# system call counts
# (c) 2010, Tom Zanussi <tzanussi@gmail.com>
# Licensed under the terms of the GNU GPL License version 2
#
# Displays system-wide system call totals, broken down by syscall.
# If a [comm] arg is specified, only syscalls called by [comm] are displayed.

from __future__ import print_function

import os
import sys

sys.path.append(os.environ['PERF_EXEC_PATH'] + \
	'/scripts/python/Perf-Trace-Util/lib/Perf/Trace')

from perf_trace_context import *
from Core import *
from Util import syscall_name

usage = "perf script -s syscall-counts.py [comm]\n";

for_comm = None

if len(sys.argv) > 2:
	sys.exit(usage)

if len(sys.argv) > 1:
	for_comm = sys.argv[1]

syscalls = autodict()

def trace_begin():
	print("Press control+C to stop and show the summary")

def trace_end():
	print_syscall_totals()

def raw_syscalls__sys_enter(event_name, context, common_cpu,
		common_secs, common_nsecs, common_pid, common_comm,
		common_callchain, id, args):
	if for_comm is not None:
		if common_comm != for_comm:
			return
	try:
		syscalls[id] += 1
	except TypeError:
		syscalls[id] = 1

def syscalls__sys_enter(event_name, context, common_cpu,
		common_secs, common_nsecs, common_pid, common_comm, id, args):
	raw_syscalls__sys_enter(**locals())

def print_syscall_totals():
	if for_comm is not None:
		print("\nsyscall events for %s:\n" % (for_comm))
	else:
		print("\nsyscall events:\n")

	print("%-40s  %10s" % ("event", "count"))
	print("%-40s  %10s" % ("----------------------------------------",
				"-----------"))

	for id, val in sorted(syscalls.items(),
			key = lambda kv: (kv[1], kv[0]), reverse = True):
		print("%-40s  %10d" % (syscall_name(id), val))
ption value='aarch64/hotplug-vcpu/v6.7-rc4'>aarch64/hotplug-vcpu/v6.7-rc4</option>
<option value='aarch64/hotplug-vcpu/v6.7-rc5'>aarch64/hotplug-vcpu/v6.7-rc5</option>
<option value='aarch64/hotplug-vcpu/v6.8-rc2'>aarch64/hotplug-vcpu/v6.8-rc2</option>
<option value='aarch64/ktext/head'>aarch64/ktext/head</option>
<option value='aarch64/ktext/v6.5'>aarch64/ktext/v6.5</option>
<option value='aarch64/ktext/v6.6-rc5'>aarch64/ktext/v6.6-rc5</option>
<option value='aarch64/ktext/v6.7'>aarch64/ktext/v6.7</option>
<option value='adfs'>adfs</option>
<option value='cex7'>cex7</option>
<option value='clearfog'>clearfog</option>
<option value='clearfog-4.10'>clearfog-4.10</option>
<option value='clearfog-4.11'>clearfog-4.11</option>
<option value='clearfog-4.12'>clearfog-4.12</option>
<option value='clearfog-4.13'>clearfog-4.13</option>
<option value='clearfog-4.9'>clearfog-4.9</option>
<option value='clkdev'>clkdev</option>
<option value='csi-v6'>csi-v6</option>
<option value='devel-stable'>devel-stable</option>
<option value='drm-armada-devel'>drm-armada-devel</option>
<option value='drm-armada-devel-4.15'>drm-armada-devel-4.15</option>
<option value='drm-armada-fixes'>drm-armada-fixes</option>
<option value='drm-armada-fixes-4.15'>drm-armada-fixes-4.15</option>
<option value='drm-dwhdmi-devel'>drm-dwhdmi-devel</option>
<option value='drm-etnaviv-devel'>drm-etnaviv-devel</option>
<option value='drm-tda9950-fixes'>drm-tda9950-fixes</option>
<option value='drm-tda998x-devel'>drm-tda998x-devel</option>
<option value='drm-tda998x-fixes'>drm-tda998x-fixes</option>
<option value='fec-testing'>fec-testing</option>
<option value='fiq'>fiq</option>
<option value='fixes'>fixes</option>
<option value='fixes-sa1111'>fixes-sa1111</option>
<option value='for-arm-soc'>for-arm-soc</option>
<option value='for-next'>for-next</option>
<option value='hb2'>hb2</option>
<option value='ktext'>ktext</option>
<option value='ktext-current'>ktext-current</option>
<option value='master' selected='selected'>master</option>
<option value='mcbin'>mcbin</option>
<option value='mvneta'>mvneta</option>
<option value='mvpp2'>mvpp2</option>
<option value='net-merged'>net-merged</option>
<option value='net-next'>net-next</option>
<option value='net-queue'>net-queue</option>
<option value='nmi'>nmi</option>
<option value='phy'>phy</option>
<option value='rtc'>rtc</option>
<option value='sa1100'>sa1100</option>
<option value='spectre'>spectre</option>
<option value='to-build'>to-build</option>
<option value='uaccess'>uaccess</option>
<option value='vcpu-rmk'>vcpu-rmk</option>
<option value='wl18xx'>wl18xx</option>
<option value='zii'>zii</option>
</select> <input type='submit' value='switch'/></form></td></tr>
<tr><td class='sub'>Russell King's ARM Linux kernel tree</td><td class='sub right'>Russell King</td></tr></table>
<table class='tabs'><tr><td>
<a href='/cgit/linux-arm.git/'>summary</a><a href='/cgit/linux-arm.git/refs/'>refs</a><a href='/cgit/linux-arm.git/log/drivers/net'>log</a><a href='/cgit/linux-arm.git/tree/drivers/net'>tree</a><a href='/cgit/linux-arm.git/commit/drivers/net'>commit</a><a class='active' href='/cgit/linux-arm.git/diff/drivers/net?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>diff</a></td><td class='form'><form class='right' method='get' action='/cgit/linux-arm.git/log/drivers/net'>
<input type='hidden' name='id2' value='e45fc85a2f371f388ff3804271375a1aedbe3744'/><select name='qt'>
<option value='grep'>log msg</option>
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<option value='range'>range</option>
</select>
<input class='txt' type='search' size='10' name='q' value=''/>
<input type='submit' value='search'/>
</form>
</td></tr></table>
<div class='path'>path: <a href='/cgit/linux-arm.git/diff/?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>root</a>/<a href='/cgit/linux-arm.git/diff/drivers?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers</a>/<a href='/cgit/linux-arm.git/diff/drivers/net?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>net</a></div><div class='content'><div class='cgit-panel'><b>diff options</b><form method='get'><input type='hidden' name='id2' value='e45fc85a2f371f388ff3804271375a1aedbe3744'/><table><tr><td colspan='2'/></tr><tr><td class='label'>context:</td><td class='ctrl'><select name='context' onchange='this.form.submit();'><option value='1'>1</option><option value='2'>2</option><option value='3' selected='selected'>3</option><option value='4'>4</option><option value='5'>5</option><option value='6'>6</option><option value='7'>7</option><option value='8'>8</option><option value='9'>9</option><option value='10'>10</option><option value='15'>15</option><option value='20'>20</option><option value='25'>25</option><option value='30'>30</option><option value='35'>35</option><option value='40'>40</option></select></td></tr><tr><td class='label'>space:</td><td class='ctrl'><select name='ignorews' onchange='this.form.submit();'><option value='0' selected='selected'>include</option><option value='1'>ignore</option></select></td></tr><tr><td class='label'>mode:</td><td class='ctrl'><select name='dt' onchange='this.form.submit();'><option value='0' selected='selected'>unified</option><option value='1'>ssdiff</option><option value='2'>stat only</option></select></td></tr><tr><td/><td class='ctrl'><noscript><input type='submit' value='reload'/></noscript></td></tr></table></form></div><div class='diffstat-header'><a href='/cgit/linux-arm.git/diff/?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>Diffstat</a> (limited to 'drivers/net')</div><table summary='diffstat' class='diffstat'><tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/Kconfig</a></td><td class='right'>382</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/Makefile</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/Space.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/Space.c</a></td><td class='right'>214</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/amt.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/amt.c</a></td><td class='right'>3452</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/appletalk/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/appletalk/Kconfig</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/appletalk/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/appletalk/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/appletalk/cops.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/appletalk/cops.c</a></td><td class='right'>1010</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/appletalk/cops.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/appletalk/cops.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/appletalk/cops_ffdrv.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/appletalk/cops_ffdrv.h</a></td><td class='right'>532</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/appletalk/cops_ltdrv.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/appletalk/cops_ltdrv.h</a></td><td class='right'>241</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/appletalk/ipddp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/appletalk/ipddp.c</a></td><td class='right'>335</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/appletalk/ipddp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/appletalk/ipddp.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/appletalk/ltpc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/appletalk/ltpc.c</a></td><td class='right'>1285</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/appletalk/ltpc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/appletalk/ltpc.h</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/arcnet/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/arcnet/Kconfig</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/arcnet/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/arcnet/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/arcnet/arc-rawmode.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/arcnet/arc-rawmode.c</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/arcnet/arc-rimi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/arcnet/arc-rimi.c</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/arcnet/arcdevice.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/arcnet/arcdevice.h</a></td><td class='right'>402</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/arcnet/arcnet.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/arcnet/arcnet.c</a></td><td class='right'>848</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/arcnet/capmode.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/arcnet/capmode.c</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/arcnet/com20020-isa.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/arcnet/com20020-isa.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/arcnet/com20020-pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/arcnet/com20020-pci.c</a></td><td class='right'>305</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/arcnet/com20020.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/arcnet/com20020.c</a></td><td class='right'>268</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/arcnet/com20020.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/arcnet/com20020.h</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/arcnet/com20020_cs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/arcnet/com20020_cs.c</a></td><td class='right'>333</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/arcnet/com9026.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/arcnet/com9026.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/arcnet/com90io.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/arcnet/com90io.c</a></td><td class='right'>224</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/arcnet/com90xx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/arcnet/com90xx.c</a></td><td class='right'>338</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/arcnet/rfc1051.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/arcnet/rfc1051.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/arcnet/rfc1201.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/arcnet/rfc1201.c</a></td><td class='right'>239</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/bareudp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/bareudp.c</a></td><td class='right'>828</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/bonding/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/bonding/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/bonding/bond_3ad.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/bonding/bond_3ad.c</a></td><td class='right'>1215</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/bonding/bond_alb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/bonding/bond_alb.c</a></td><td class='right'>485</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/bonding/bond_debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/bonding/bond_debugfs.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/bonding/bond_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/bonding/bond_main.c</a></td><td class='right'>4041</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/bonding/bond_netlink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/bonding/bond_netlink.c</a></td><td class='right'>405</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/bonding/bond_options.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/bonding/bond_options.c</a></td><td class='right'>796</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/bonding/bond_procfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/bonding/bond_procfs.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/bonding/bond_sysfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/bonding/bond_sysfs.c</a></td><td class='right'>332</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/bonding/bond_sysfs_slave.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/bonding/bond_sysfs_slave.c</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/bonding/bonding_priv.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/bonding/bonding_priv.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/caif/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/caif/Kconfig</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/caif/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/caif/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/caif/caif_hsi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/caif/caif_hsi.c</a></td><td class='right'>1481</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/caif/caif_serial.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/caif/caif_serial.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/caif/caif_spi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/caif/caif_spi.c</a></td><td class='right'>871</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/caif/caif_spi_slave.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/caif/caif_spi_slave.c</a></td><td class='right'>254</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/caif/caif_virtio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/caif/caif_virtio.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/Kconfig</a></td><td class='right'>282</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/Makefile</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/at91_can.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/at91_can.c</a></td><td class='right'>1099</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/can/bfin_can.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/bfin_can.c</a></td><td class='right'>786</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/bxcan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/bxcan.c</a></td><td class='right'>1101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/c_can/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/c_can/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/c_can/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/c_can/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/can/c_can/c_can.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/c_can/c_can.c</a></td><td class='right'>1296</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/c_can/c_can.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/c_can/c_can.h</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/c_can/c_can_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/c_can/c_can_ethtool.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/c_can/c_can_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/c_can/c_can_main.c</a></td><td class='right'>1392</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/c_can/c_can_pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/c_can/c_can_pci.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/c_can/c_can_platform.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/c_can/c_can_platform.c</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/can327.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/can327.c</a></td><td class='right'>1141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/cc770/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/cc770/Kconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/cc770/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/cc770/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/cc770/cc770.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/cc770/cc770.c</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/cc770/cc770.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/cc770/cc770.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/cc770/cc770_isa.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/cc770/cc770_isa.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/cc770/cc770_platform.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/cc770/cc770_platform.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/ctucanfd/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/ctucanfd/Kconfig</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/ctucanfd/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/ctucanfd/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/ctucanfd/ctucanfd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/ctucanfd/ctucanfd.h</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/ctucanfd/ctucanfd_base.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/ctucanfd/ctucanfd_base.c</a></td><td class='right'>1460</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/ctucanfd/ctucanfd_kframe.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/ctucanfd/ctucanfd_kframe.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/ctucanfd/ctucanfd_kregs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/ctucanfd/ctucanfd_kregs.h</a></td><td class='right'>349</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/ctucanfd/ctucanfd_pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/ctucanfd/ctucanfd_pci.c</a></td><td class='right'>290</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/ctucanfd/ctucanfd_platform.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/ctucanfd/ctucanfd_platform.c</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/can/dev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/dev.c</a></td><td class='right'>1031</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/dev/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/dev/Makefile</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/dev/bittiming.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/dev/bittiming.c</a></td><td class='right'>216</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/dev/calc_bittiming.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/dev/calc_bittiming.c</a></td><td class='right'>262</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/dev/dev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/dev/dev.c</a></td><td class='right'>661</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/dev/length.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/dev/length.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/dev/netlink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/dev/netlink.c</a></td><td class='right'>1111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/dev/rx-offload.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/dev/rx-offload.c</a></td><td class='right'>427</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/dev/skb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/dev/skb.c</a></td><td class='right'>374</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/dummy_can.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/dummy_can.c</a></td><td class='right'>285</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/esd/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/esd/Kconfig</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/esd/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/esd/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/esd/esd_402_pci-core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/esd/esd_402_pci-core.c</a></td><td class='right'>515</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/esd/esdacc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/esd/esdacc.c</a></td><td class='right'>769</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/esd/esdacc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/esd/esdacc.h</a></td><td class='right'>358</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/can/flexcan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/flexcan.c</a></td><td class='right'>1328</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/flexcan/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/flexcan/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/flexcan/flexcan-core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/flexcan/flexcan-core.c</a></td><td class='right'>2456</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/flexcan/flexcan-ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/flexcan/flexcan-ethtool.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/flexcan/flexcan.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/flexcan/flexcan.h</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/grcan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/grcan.c</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/ifi_canfd/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/ifi_canfd/Kconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/ifi_canfd/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/ifi_canfd/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/ifi_canfd/ifi_canfd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/ifi_canfd/ifi_canfd.c</a></td><td class='right'>1064</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/janz-ican3.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/janz-ican3.c</a></td><td class='right'>192</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/kvaser_pciefd/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/kvaser_pciefd/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/kvaser_pciefd/kvaser_pciefd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/kvaser_pciefd/kvaser_pciefd.h</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/kvaser_pciefd/kvaser_pciefd_core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/kvaser_pciefd/kvaser_pciefd_core.c</a></td><td class='right'>1908</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/kvaser_pciefd/kvaser_pciefd_devlink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/kvaser_pciefd/kvaser_pciefd_devlink.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/can/led.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/led.c</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/m_can/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/m_can/Kconfig</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/m_can/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/m_can/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/m_can/m_can.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/m_can/m_can.c</a></td><td class='right'>2641</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/m_can/m_can.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/m_can/m_can.h</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/m_can/m_can_pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/m_can/m_can_pci.c</a></td><td class='right'>208</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/m_can/m_can_platform.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/m_can/m_can_platform.c</a></td><td class='right'>242</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/m_can/tcan4x5x-core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/m_can/tcan4x5x-core.c</a></td><td class='right'>610</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/m_can/tcan4x5x-regmap.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/m_can/tcan4x5x-regmap.c</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/m_can/tcan4x5x.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/m_can/tcan4x5x.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/mscan/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/mscan/Kconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/mscan/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/mscan/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/mscan/mpc5xxx_can.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/mscan/mpc5xxx_can.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/mscan/mscan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/mscan/mscan.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/mscan/mscan.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/mscan/mscan.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/can/pch_can.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/pch_can.c</a></td><td class='right'>1280</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/peak_canfd/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/peak_canfd/Kconfig</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/peak_canfd/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/peak_canfd/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/peak_canfd/peak_canfd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/peak_canfd/peak_canfd.c</a></td><td class='right'>836</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/peak_canfd/peak_canfd_user.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/peak_canfd/peak_canfd_user.h</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/peak_canfd/peak_pciefd_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/peak_canfd/peak_pciefd_main.c</a></td><td class='right'>866</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/rcar/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/rcar/Kconfig</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/rcar/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/rcar/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/rcar/rcar_can.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/rcar/rcar_can.c</a></td><td class='right'>918</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/rcar/rcar_canfd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/rcar/rcar_canfd.c</a></td><td class='right'>2359</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/can/rcar_can.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/rcar_can.c</a></td><td class='right'>927</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/rockchip/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/rockchip/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/rockchip/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/rockchip/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/rockchip/rockchip_canfd-core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/rockchip/rockchip_canfd-core.c</a></td><td class='right'>962</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/rockchip/rockchip_canfd-ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/rockchip/rockchip_canfd-ethtool.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/rockchip/rockchip_canfd-rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/rockchip/rockchip_canfd-rx.c</a></td><td class='right'>299</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/rockchip/rockchip_canfd-timestamp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/rockchip/rockchip_canfd-timestamp.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/rockchip/rockchip_canfd-tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/rockchip/rockchip_canfd-tx.c</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/rockchip/rockchip_canfd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/rockchip/rockchip_canfd.h</a></td><td class='right'>553</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/sja1000/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/sja1000/Kconfig</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/sja1000/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/sja1000/Makefile</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/sja1000/ems_pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/sja1000/ems_pci.c</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/sja1000/ems_pcmcia.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/sja1000/ems_pcmcia.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/sja1000/f81601.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/sja1000/f81601.c</a></td><td class='right'>211</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/sja1000/kvaser_pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/sja1000/kvaser_pci.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/sja1000/peak_pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/sja1000/peak_pci.c</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/sja1000/peak_pcmcia.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/sja1000/peak_pcmcia.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/sja1000/plx_pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/sja1000/plx_pci.c</a></td><td class='right'>169</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/sja1000/sja1000.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/sja1000/sja1000.c</a></td><td class='right'>185</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/sja1000/sja1000.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/sja1000/sja1000.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/sja1000/sja1000_isa.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/sja1000/sja1000_isa.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/sja1000/sja1000_platform.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/sja1000/sja1000_platform.c</a></td><td class='right'>164</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/sja1000/tscan1.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/sja1000/tscan1.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/can/slcan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/slcan.c</a></td><td class='right'>780</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/slcan/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/slcan/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/slcan/slcan-core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/slcan/slcan-core.c</a></td><td class='right'>953</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/slcan/slcan-ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/slcan/slcan-ethtool.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/slcan/slcan.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/slcan/slcan.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/softing/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/softing/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/softing/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/softing/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/softing/softing.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/softing/softing.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/softing/softing_cs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/softing/softing_cs.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/softing/softing_fw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/softing/softing_fw.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/softing/softing_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/softing/softing_main.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/softing/softing_platform.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/softing/softing_platform.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/spi/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/spi/Kconfig</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/spi/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/spi/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/spi/hi311x.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/spi/hi311x.c</a></td><td class='right'>1041</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/spi/mcp251x.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/spi/mcp251x.c</a></td><td class='right'>817</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/spi/mcp251xfd/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/spi/mcp251xfd/Kconfig</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/spi/mcp251xfd/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/spi/mcp251xfd/Makefile</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/spi/mcp251xfd/mcp251xfd-chip-fifo.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/spi/mcp251xfd/mcp251xfd-chip-fifo.c</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c</a></td><td class='right'>2417</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/spi/mcp251xfd/mcp251xfd-crc16.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/spi/mcp251xfd/mcp251xfd-crc16.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/spi/mcp251xfd/mcp251xfd-dump.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/spi/mcp251xfd/mcp251xfd-dump.c</a></td><td class='right'>285</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/spi/mcp251xfd/mcp251xfd-dump.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/spi/mcp251xfd/mcp251xfd-dump.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/spi/mcp251xfd/mcp251xfd-ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/spi/mcp251xfd/mcp251xfd-ethtool.c</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/spi/mcp251xfd/mcp251xfd-ram.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/spi/mcp251xfd/mcp251xfd-ram.c</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/spi/mcp251xfd/mcp251xfd-ram.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/spi/mcp251xfd/mcp251xfd-ram.h</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/spi/mcp251xfd/mcp251xfd-regmap.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/spi/mcp251xfd/mcp251xfd-regmap.c</a></td><td class='right'>687</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/spi/mcp251xfd/mcp251xfd-ring.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/spi/mcp251xfd/mcp251xfd-ring.c</a></td><td class='right'>551</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/spi/mcp251xfd/mcp251xfd-rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/spi/mcp251xfd/mcp251xfd-rx.c</a></td><td class='right'>333</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/spi/mcp251xfd/mcp251xfd-tef.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/spi/mcp251xfd/mcp251xfd-tef.c</a></td><td class='right'>302</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/spi/mcp251xfd/mcp251xfd-timestamp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/spi/mcp251xfd/mcp251xfd-timestamp.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/spi/mcp251xfd/mcp251xfd-tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/spi/mcp251xfd/mcp251xfd-tx.c</a></td><td class='right'>244</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/spi/mcp251xfd/mcp251xfd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/spi/mcp251xfd/mcp251xfd.h</a></td><td class='right'>983</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/sun4i_can.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/sun4i_can.c</a></td><td class='right'>929</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/ti_hecc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/ti_hecc.c</a></td><td class='right'>712</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/Kconfig</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/Makefile</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/ems_usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/ems_usb.c</a></td><td class='right'>163</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/esd_usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/esd_usb.c</a></td><td class='right'>1398</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/esd_usb2.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/esd_usb2.c</a></td><td class='right'>1155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/etas_es58x/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/etas_es58x/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/etas_es58x/es581_4.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/etas_es58x/es581_4.c</a></td><td class='right'>507</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/etas_es58x/es581_4.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/etas_es58x/es581_4.h</a></td><td class='right'>207</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/etas_es58x/es58x_core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/etas_es58x/es58x_core.c</a></td><td class='right'>2272</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/etas_es58x/es58x_core.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/etas_es58x/es58x_core.h</a></td><td class='right'>750</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/etas_es58x/es58x_devlink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/etas_es58x/es58x_devlink.c</a></td><td class='right'>260</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/etas_es58x/es58x_fd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/etas_es58x/es58x_fd.c</a></td><td class='right'>565</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/etas_es58x/es58x_fd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/etas_es58x/es58x_fd.h</a></td><td class='right'>234</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/f81604.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/f81604.c</a></td><td class='right'>1204</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/gs_usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/gs_usb.c</a></td><td class='right'>1477</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/kvaser_usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/kvaser_usb.c</a></td><td class='right'>2073</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/kvaser_usb/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/kvaser_usb/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/kvaser_usb/kvaser_usb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/kvaser_usb/kvaser_usb.h</a></td><td class='right'>272</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/kvaser_usb/kvaser_usb_core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/kvaser_usb/kvaser_usb_core.c</a></td><td class='right'>1048</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/kvaser_usb/kvaser_usb_devlink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/kvaser_usb/kvaser_usb_devlink.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/kvaser_usb/kvaser_usb_hydra.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/kvaser_usb/kvaser_usb_hydra.c</a></td><td class='right'>2246</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/kvaser_usb/kvaser_usb_leaf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/kvaser_usb/kvaser_usb_leaf.c</a></td><td class='right'>2006</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/mcba_usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/mcba_usb.c</a></td><td class='right'>913</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/nct6694_canfd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/nct6694_canfd.c</a></td><td class='right'>831</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/peak_usb/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/peak_usb/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/peak_usb/pcan_ucan.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/peak_usb/pcan_ucan.h</a></td><td class='right'>223</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/peak_usb/pcan_usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/peak_usb/pcan_usb.c</a></td><td class='right'>560</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/peak_usb/pcan_usb_core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/peak_usb/pcan_usb_core.c</a></td><td class='right'>426</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/peak_usb/pcan_usb_core.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/peak_usb/pcan_usb_core.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/peak_usb/pcan_usb_fd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/peak_usb/pcan_usb_fd.c</a></td><td class='right'>576</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/peak_usb/pcan_usb_pro.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/peak_usb/pcan_usb_pro.c</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/peak_usb/pcan_usb_pro.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/peak_usb/pcan_usb_pro.h</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/ucan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/ucan.c</a></td><td class='right'>1601</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/usb/usb_8dev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/usb_8dev.c</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/vcan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/vcan.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/can/vxcan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/vxcan.c</a></td><td class='right'>313</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/can/xilinx_can.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/xilinx_can.c</a></td><td class='right'>1597</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/cris/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/cris/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/cris/eth_v10.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/cris/eth_v10.c</a></td><td class='right'>1746</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/Kconfig</a></td><td class='right'>204</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/Makefile</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/b53/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/b53/Kconfig</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/b53/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/b53/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/b53/b53_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/b53/b53_common.c</a></td><td class='right'>3333</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/b53/b53_mdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/b53/b53_mdio.c</a></td><td class='right'>403</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/b53/b53_mmap.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/b53/b53_mmap.c</a></td><td class='right'>510</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/b53/b53_priv.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/b53/b53_priv.h</a></td><td class='right'>548</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/b53/b53_regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/b53/b53_regs.h</a></td><td class='right'>600</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/b53/b53_serdes.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/b53/b53_serdes.c</a></td><td class='right'>249</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/b53/b53_serdes.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/b53/b53_serdes.h</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/b53/b53_spi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/b53/b53_spi.c</a></td><td class='right'>376</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/b53/b53_srab.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/b53/b53_srab.c</a></td><td class='right'>696</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/bcm_sf2.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/bcm_sf2.c</a></td><td class='right'>1913</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/bcm_sf2.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/bcm_sf2.h</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/bcm_sf2_cfp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/bcm_sf2_cfp.c</a></td><td class='right'>1338</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/bcm_sf2_regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/bcm_sf2_regs.h</a></td><td class='right'>376</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/dsa_loop.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/dsa_loop.c</a></td><td class='right'>476</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/hirschmann/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/hirschmann/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/hirschmann/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/hirschmann/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/hirschmann/hellcreek.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/hirschmann/hellcreek.c</a></td><td class='right'>2117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/hirschmann/hellcreek.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/hirschmann/hellcreek.h</a></td><td class='right'>323</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/hirschmann/hellcreek_hwtstamp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/hirschmann/hellcreek_hwtstamp.c</a></td><td class='right'>468</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/hirschmann/hellcreek_hwtstamp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/hirschmann/hellcreek_hwtstamp.h</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/hirschmann/hellcreek_ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/hirschmann/hellcreek_ptp.c</a></td><td class='right'>472</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/hirschmann/hellcreek_ptp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/hirschmann/hellcreek_ptp.h</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/ks8995.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/ks8995.c</a></td><td class='right'>857</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/lan9303-core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/lan9303-core.c</a></td><td class='right'>1515</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/lan9303.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/lan9303.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/lan9303_i2c.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/lan9303_i2c.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/lan9303_mdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/lan9303_mdio.c</a></td><td class='right'>177</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/lantiq/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/lantiq/Kconfig</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/lantiq/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/lantiq/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/lantiq/lantiq_gswip.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/lantiq/lantiq_gswip.c</a></td><td class='right'>518</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/lantiq/lantiq_gswip.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/lantiq/lantiq_gswip.h</a></td><td class='right'>301</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/lantiq/lantiq_gswip_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/lantiq/lantiq_gswip_common.c</a></td><td class='right'>1739</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/lantiq/lantiq_pce.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/lantiq/lantiq_pce.h</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/lantiq/mxl-gsw1xx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/lantiq/mxl-gsw1xx.c</a></td><td class='right'>733</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/lantiq/mxl-gsw1xx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/lantiq/mxl-gsw1xx.h</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/lantiq/mxl-gsw1xx_pce.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/lantiq/mxl-gsw1xx_pce.h</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/microchip/Kconfig</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/microchip/Makefile</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/ksz8.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/microchip/ksz8.c</a></td><td class='right'>2115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/ksz8.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/microchip/ksz8.h</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/ksz8863_smi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/microchip/ksz8863_smi.c</a></td><td class='right'>226</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/ksz8_reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/microchip/ksz8_reg.h</a></td><td class='right'>850</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/ksz9477.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/microchip/ksz9477.c</a></td><td class='right'>1618</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/ksz9477.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/microchip/ksz9477.h</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/ksz9477_acl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/microchip/ksz9477_acl.c</a></td><td class='right'>1436</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/ksz9477_i2c.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/microchip/ksz9477_i2c.c</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/ksz9477_reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/microchip/ksz9477_reg.h</a></td><td class='right'>1571</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/ksz9477_tc_flower.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/microchip/ksz9477_tc_flower.c</a></td><td class='right'>284</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/ksz_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/microchip/ksz_common.c</a></td><td class='right'>5571</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/ksz_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/microchip/ksz_common.h</a></td><td class='right'>977</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/ksz_dcb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/microchip/ksz_dcb.c</a></td><td class='right'>612</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/ksz_dcb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/microchip/ksz_dcb.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/ksz_ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/microchip/ksz_ptp.c</a></td><td class='right'>1188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/ksz_ptp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/microchip/ksz_ptp.h</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/ksz_ptp_reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/microchip/ksz_ptp_reg.h</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/ksz_spi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/microchip/ksz_spi.c</a></td><td class='right'>366</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/lan937x.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/microchip/lan937x.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/lan937x_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/microchip/lan937x_main.c</a></td><td class='right'>671</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/microchip/lan937x_reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/microchip/lan937x_reg.h</a></td><td class='right'>217</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mt7530-mdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mt7530-mdio.c</a></td><td class='right'>265</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mt7530-mmio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mt7530-mmio.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mt7530.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mt7530.c</a></td><td class='right'>3418</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mt7530.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mt7530.h</a></td><td class='right'>944</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6060.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6060.c</a></td><td class='right'>375</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6060.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6060.h</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6123_61_65.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6123_61_65.c</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6131.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6131.c</a></td><td class='right'>190</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6171.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6171.c</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6352.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6352.c</a></td><td class='right'>398</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx.c</a></td><td class='right'>2202</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.9%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx.h</a></td><td class='right'>439</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx/Kconfig</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx/Makefile</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/chip.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx/chip.c</a></td><td class='right'>7507</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/chip.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx/chip.h</a></td><td class='right'>846</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/devlink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx/devlink.c</a></td><td class='right'>817</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/devlink.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx/devlink.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/global1.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx/global1.c</a></td><td class='right'>679</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/global1.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx/global1.h</a></td><td class='right'>368</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/global1_atu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx/global1_atu.c</a></td><td class='right'>501</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/global1_vtu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx/global1_vtu.c</a></td><td class='right'>683</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/global2.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx/global2.c</a></td><td class='right'>1217</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/global2.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx/global2.h</a></td><td class='right'>389</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/global2_avb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx/global2_avb.c</a></td><td class='right'>239</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/global2_scratch.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx/global2_scratch.c</a></td><td class='right'>350</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/hwtstamp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx/hwtstamp.c</a></td><td class='right'>611</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/hwtstamp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx/hwtstamp.h</a></td><td class='right'>181</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/leds.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx/leds.c</a></td><td class='right'>848</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/pcs-6185.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx/pcs-6185.c</a></td><td class='right'>191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/pcs-6352.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx/pcs-6352.c</a></td><td class='right'>390</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/pcs-639x.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx/pcs-639x.c</a></td><td class='right'>970</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx/phy.c</a></td><td class='right'>281</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx/phy.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/port.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx/port.c</a></td><td class='right'>1728</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/port.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx/port.h</a></td><td class='right'>611</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/port_hidden.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx/port_hidden.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx/ptp.c</a></td><td class='right'>565</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/ptp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx/ptp.h</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/serdes.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx/serdes.c</a></td><td class='right'>546</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/serdes.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx/serdes.h</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/smi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx/smi.c</a></td><td class='right'>190</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/smi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx/smi.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/switchdev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx/switchdev.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/switchdev.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx/switchdev.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/trace.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx/trace.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/mv88e6xxx/trace.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx/trace.h</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/ocelot/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/ocelot/Kconfig</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/ocelot/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/ocelot/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/ocelot/felix.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/ocelot/felix.c</a></td><td class='right'>2463</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/ocelot/felix.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/ocelot/felix.h</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/ocelot/felix_vsc9959.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/ocelot/felix_vsc9959.c</a></td><td class='right'>2757</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/ocelot/ocelot_ext.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/ocelot/ocelot_ext.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/ocelot/seville_vsc9953.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/ocelot/seville_vsc9953.c</a></td><td class='right'>1027</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/qca/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/qca/Kconfig</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/qca/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/qca/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/qca/ar9331.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/qca/ar9331.c</a></td><td class='right'>1142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/qca/qca8k-8xxx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/qca/qca8k-8xxx.c</a></td><td class='right'>2227</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/qca/qca8k-common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/qca/qca8k-common.c</a></td><td class='right'>1257</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/qca/qca8k-leds.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/qca/qca8k-leds.c</a></td><td class='right'>487</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/qca/qca8k.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/qca/qca8k.h</a></td><td class='right'>595</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/qca/qca8k_leds.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/qca/qca8k_leds.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/realtek/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/realtek/Kconfig</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/realtek/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/realtek/Makefile</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/realtek/realtek-mdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/realtek/realtek-mdio.c</a></td><td class='right'>187</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/realtek/realtek-mdio.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/realtek/realtek-mdio.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/realtek/realtek-smi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/realtek/realtek-smi.c</a></td><td class='right'>408</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/realtek/realtek-smi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/realtek/realtek-smi.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/realtek/realtek.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/realtek/realtek.h</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/realtek/rtl8365mb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/realtek/rtl8365mb.c</a></td><td class='right'>2211</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/realtek/rtl8366-core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/realtek/rtl8366-core.c</a></td><td class='right'>444</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/realtek/rtl8366rb-leds.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/realtek/rtl8366rb-leds.c</a></td><td class='right'>177</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/realtek/rtl8366rb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/realtek/rtl8366rb.c</a></td><td class='right'>1902</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/realtek/rtl8366rb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/realtek/rtl8366rb.h</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/realtek/rtl83xx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/realtek/rtl83xx.c</a></td><td class='right'>331</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/realtek/rtl83xx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/realtek/rtl83xx.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/rzn1_a5psw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/rzn1_a5psw.c</a></td><td class='right'>1319</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/rzn1_a5psw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/rzn1_a5psw.h</a></td><td class='right'>262</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/sja1105/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/sja1105/Kconfig</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/sja1105/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/sja1105/Makefile</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/sja1105/sja1105.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/sja1105/sja1105.h</a></td><td class='right'>426</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/sja1105/sja1105_clocking.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/sja1105/sja1105_clocking.c</a></td><td class='right'>860</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/sja1105/sja1105_devlink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/sja1105/sja1105_devlink.c</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/sja1105/sja1105_dynamic_config.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/sja1105/sja1105_dynamic_config.c</a></td><td class='right'>1413</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/sja1105/sja1105_dynamic_config.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/sja1105/sja1105_dynamic_config.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/sja1105/sja1105_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/sja1105/sja1105_ethtool.c</a></td><td class='right'>633</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/sja1105/sja1105_flower.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/sja1105/sja1105_flower.c</a></td><td class='right'>545</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/sja1105/sja1105_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/sja1105/sja1105_main.c</a></td><td class='right'>3467</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/sja1105/sja1105_mdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/sja1105/sja1105_mdio.c</a></td><td class='right'>507</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/sja1105/sja1105_ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/sja1105/sja1105_ptp.c</a></td><td class='right'>970</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/sja1105/sja1105_ptp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/sja1105/sja1105_ptp.h</a></td><td class='right'>210</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/sja1105/sja1105_spi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/sja1105/sja1105_spi.c</a></td><td class='right'>977</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/sja1105/sja1105_static_config.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/sja1105/sja1105_static_config.c</a></td><td class='right'>1950</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/sja1105/sja1105_static_config.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/sja1105/sja1105_static_config.h</a></td><td class='right'>548</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/sja1105/sja1105_tas.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/sja1105/sja1105_tas.c</a></td><td class='right'>898</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/sja1105/sja1105_tas.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/sja1105/sja1105_tas.h</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/sja1105/sja1105_vl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/sja1105/sja1105_vl.c</a></td><td class='right'>802</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/sja1105/sja1105_vl.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/sja1105/sja1105_vl.h</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/vitesse-vsc73xx-core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/vitesse-vsc73xx-core.c</a></td><td class='right'>2416</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/vitesse-vsc73xx-platform.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/vitesse-vsc73xx-platform.c</a></td><td class='right'>172</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/vitesse-vsc73xx-spi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/vitesse-vsc73xx-spi.c</a></td><td class='right'>229</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/vitesse-vsc73xx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/vitesse-vsc73xx.h</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/xrs700x/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/xrs700x/Kconfig</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/xrs700x/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/xrs700x/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/xrs700x/xrs700x.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/xrs700x/xrs700x.c</a></td><td class='right'>860</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/xrs700x/xrs700x.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/xrs700x/xrs700x.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/xrs700x/xrs700x_i2c.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/xrs700x/xrs700x_i2c.c</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/xrs700x/xrs700x_mdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/xrs700x/xrs700x_mdio.c</a></td><td class='right'>180</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/xrs700x/xrs700x_reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/xrs700x/xrs700x_reg.h</a></td><td class='right'>208</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/yt921x.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/yt921x.c</a></td><td class='right'>3006</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/dsa/yt921x.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/yt921x.h</a></td><td class='right'>567</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/dummy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dummy.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/eql.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/eql.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/3com/3c509.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/3com/3c509.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/3com/3c515.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/3com/3c515.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/3com/3c574_cs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/3com/3c574_cs.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/3com/3c589_cs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/3com/3c589_cs.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/3com/3c59x.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/3com/3c59x.c</a></td><td class='right'>369</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/3com/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/3com/Kconfig</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/3com/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/3com/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/3com/typhoon.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/3com/typhoon.c</a></td><td class='right'>546</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/3com/typhoon.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/3com/typhoon.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/8390/8390.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/8390.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/8390/8390.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/8390.h</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/8390/8390p.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/8390p.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/8390/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/Kconfig</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/8390/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/8390/apne.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/apne.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/8390/ax88796.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/ax88796.c</a></td><td class='right'>339</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/8390/axnet_cs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/axnet_cs.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/8390/etherh.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/etherh.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/8390/hydra.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/hydra.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/8390/lib8390.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/lib8390.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/8390/mac8390.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/mac8390.c</a></td><td class='right'>246</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/8390/mcf8390.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/mcf8390.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/8390/ne.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/ne.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/8390/ne2k-pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/ne2k-pci.c</a></td><td class='right'>400</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/8390/pcnet_cs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/pcnet_cs.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/8390/smc-ultra.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/smc-ultra.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/8390/stnic.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/stnic.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/8390/wd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/wd.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/8390/xsurf100.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/xsurf100.c</a></td><td class='right'>377</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/8390/zorro8390.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/zorro8390.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/Kconfig</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/Makefile</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/actions/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/actions/Kconfig</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/actions/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/actions/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/actions/owl-emac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/actions/owl-emac.c</a></td><td class='right'>1612</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/actions/owl-emac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/actions/owl-emac.h</a></td><td class='right'>280</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/adaptec/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/adaptec/Kconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/adaptec/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/adaptec/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/adaptec/starfire.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/adaptec/starfire.c</a></td><td class='right'>204</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/adi/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/adi/Kconfig</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/adi/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/adi/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/adi/adin1110.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/adi/adin1110.c</a></td><td class='right'>1737</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/adi/bfin_mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/adi/bfin_mac.c</a></td><td class='right'>1933</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/adi/bfin_mac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/adi/bfin_mac.h</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aeroflex/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aeroflex/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aeroflex/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aeroflex/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aeroflex/greth.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aeroflex/greth.c</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aeroflex/greth.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aeroflex/greth.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/agere/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/agere/Kconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/agere/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/agere/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/agere/et131x.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/agere/et131x.c</a></td><td class='right'>254</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/agere/et131x.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/agere/et131x.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/airoha/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/airoha/Kconfig</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/airoha/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/airoha/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/airoha/airoha_eth.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/airoha/airoha_eth.c</a></td><td class='right'>3180</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/airoha/airoha_eth.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/airoha/airoha_eth.h</a></td><td class='right'>673</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/airoha/airoha_npu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/airoha/airoha_npu.c</a></td><td class='right'>783</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/airoha/airoha_ppe.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/airoha/airoha_ppe.c</a></td><td class='right'>1561</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/airoha/airoha_ppe_debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/airoha/airoha_ppe_debugfs.c</a></td><td class='right'>187</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/airoha/airoha_regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/airoha/airoha_regs.h</a></td><td class='right'>923</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/alacritech/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/alacritech/Kconfig</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/alacritech/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/alacritech/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/alacritech/slic.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/alacritech/slic.h</a></td><td class='right'>573</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/alacritech/slicoss.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/alacritech/slicoss.c</a></td><td class='right'>1847</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/allwinner/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/allwinner/Kconfig</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/allwinner/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/allwinner/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/allwinner/sun4i-emac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/allwinner/sun4i-emac.c</a></td><td class='right'>389</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/allwinner/sun4i-emac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/allwinner/sun4i-emac.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/alteon/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/alteon/Kconfig</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/alteon/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/alteon/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/alteon/acenic.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/alteon/acenic.c</a></td><td class='right'>317</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/alteon/acenic.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/alteon/acenic.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/altera/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/altera/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/altera/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/altera/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/altera/altera_msgdma.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/altera/altera_msgdma.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/altera/altera_msgdma.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/altera/altera_msgdma.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/altera/altera_msgdmahw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/altera/altera_msgdmahw.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/altera/altera_sgdma.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/altera/altera_sgdma.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/altera/altera_sgdma.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/altera/altera_sgdma.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/altera/altera_sgdmahw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/altera/altera_sgdmahw.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/altera/altera_tse.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/altera/altera_tse.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/altera/altera_tse_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/altera/altera_tse_ethtool.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/altera/altera_tse_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/altera/altera_tse_main.c</a></td><td class='right'>552</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/altera/altera_utils.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/altera/altera_utils.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/altera/altera_utils.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/altera/altera_utils.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amazon/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amazon/Kconfig</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amazon/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amazon/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amazon/ena/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amazon/ena/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amazon/ena/ena_admin_defs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amazon/ena/ena_admin_defs.h</a></td><td class='right'>1342</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amazon/ena/ena_com.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amazon/ena/ena_com.c</a></td><td class='right'>3231</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amazon/ena/ena_com.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amazon/ena/ena_com.h</a></td><td class='right'>1140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amazon/ena/ena_common_defs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amazon/ena/ena_common_defs.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amazon/ena/ena_debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amazon/ena/ena_debugfs.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amazon/ena/ena_debugfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amazon/ena/ena_debugfs.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amazon/ena/ena_devlink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amazon/ena/ena_devlink.c</a></td><td class='right'>210</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amazon/ena/ena_devlink.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amazon/ena/ena_devlink.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amazon/ena/ena_eth_com.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amazon/ena/ena_eth_com.c</a></td><td class='right'>654</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amazon/ena/ena_eth_com.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amazon/ena/ena_eth_com.h</a></td><td class='right'>236</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amazon/ena/ena_eth_io_defs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amazon/ena/ena_eth_io_defs.h</a></td><td class='right'>390</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amazon/ena/ena_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amazon/ena/ena_ethtool.c</a></td><td class='right'>1180</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amazon/ena/ena_netdev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amazon/ena/ena_netdev.c</a></td><td class='right'>4381</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amazon/ena/ena_netdev.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amazon/ena/ena_netdev.h</a></td><td class='right'>469</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amazon/ena/ena_pci_id_tbl.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amazon/ena/ena_pci_id_tbl.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amazon/ena/ena_phc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amazon/ena/ena_phc.c</a></td><td class='right'>233</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amazon/ena/ena_phc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amazon/ena/ena_phc.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amazon/ena/ena_regs_defs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amazon/ena/ena_regs_defs.h</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amazon/ena/ena_xdp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amazon/ena/ena_xdp.c</a></td><td class='right'>469</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amazon/ena/ena_xdp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amazon/ena/ena_xdp.h</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/7990.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/7990.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/7990.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/7990.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/Kconfig</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/a2065.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/a2065.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/am79c961a.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/am79c961a.c</a></td><td class='right'>768</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/am79c961a.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/am79c961a.h</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/amd8111e.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/amd8111e.c</a></td><td class='right'>772</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/amd8111e.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/amd8111e.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/ariadne.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/ariadne.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/atarilance.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/atarilance.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/au1000_eth.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/au1000_eth.c</a></td><td class='right'>189</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/au1000_eth.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/au1000_eth.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/declance.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/declance.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/hplance.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/hplance.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/hplance.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/hplance.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/lance.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/lance.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/mvme147.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/mvme147.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/ni65.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/ni65.c</a></td><td class='right'>1252</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/ni65.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/ni65.h</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/nmclan_cs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/nmclan_cs.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/pcnet32.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/pcnet32.c</a></td><td class='right'>533</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/pds_core/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/pds_core/Makefile</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/pds_core/adminq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/pds_core/adminq.c</a></td><td class='right'>310</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/pds_core/auxbus.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/pds_core/auxbus.c</a></td><td class='right'>256</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/pds_core/core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/pds_core/core.c</a></td><td class='right'>661</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/pds_core/core.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/pds_core/core.h</a></td><td class='right'>325</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/pds_core/debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/pds_core/debugfs.c</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/pds_core/dev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/pds_core/dev.c</a></td><td class='right'>382</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/pds_core/devlink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/pds_core/devlink.c</a></td><td class='right'>179</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/pds_core/fw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/pds_core/fw.c</a></td><td class='right'>197</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/pds_core/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/pds_core/main.c</a></td><td class='right'>609</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/sun3lance.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/sun3lance.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/sunlance.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/sunlance.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/xgbe/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/xgbe/xgbe-common.h</a></td><td class='right'>728</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-dcb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/xgbe/xgbe-dcb.c</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/xgbe/xgbe-debugfs.c</a></td><td class='right'>312</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-desc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/xgbe/xgbe-desc.c</a></td><td class='right'>230</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-dev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/xgbe/xgbe-dev.c</a></td><td class='right'>2218</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-drv.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/xgbe/xgbe-drv.c</a></td><td class='right'>1675</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c</a></td><td class='right'>679</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-hwtstamp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/xgbe/xgbe-hwtstamp.c</a></td><td class='right'>399</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-i2c.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/xgbe/xgbe-i2c.c</a></td><td class='right'>405</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/xgbe/xgbe-main.c</a></td><td class='right'>899</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/xgbe/xgbe-mdio.c</a></td><td class='right'>1514</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/xgbe/xgbe-pci.c</a></td><td class='right'>476</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-phy-v1.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/xgbe/xgbe-phy-v1.c</a></td><td class='right'>744</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c</a></td><td class='right'>3679</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-platform.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/xgbe/xgbe-platform.c</a></td><td class='right'>470</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-pps.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/xgbe/xgbe-pps.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/xgbe/xgbe-ptp.c</a></td><td class='right'>240</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-selftest.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/xgbe/xgbe-selftest.c</a></td><td class='right'>346</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe-smn.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/xgbe/xgbe-smn.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/amd/xgbe/xgbe.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/xgbe/xgbe.h</a></td><td class='right'>841</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apm/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/Kconfig</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apm/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apm/xgene-v2/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene-v2/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apm/xgene-v2/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene-v2/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apm/xgene-v2/enet.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene-v2/enet.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apm/xgene-v2/enet.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene-v2/enet.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apm/xgene-v2/ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene-v2/ethtool.c</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apm/xgene-v2/ethtool.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene-v2/ethtool.h</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apm/xgene-v2/mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene-v2/mac.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apm/xgene-v2/mac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene-v2/mac.h</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apm/xgene-v2/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene-v2/main.c</a></td><td class='right'>742</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apm/xgene-v2/main.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene-v2/main.h</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apm/xgene-v2/mdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene-v2/mdio.c</a></td><td class='right'>152</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apm/xgene-v2/ring.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene-v2/ring.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apm/xgene-v2/ring.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene-v2/ring.h</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apm/xgene/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apm/xgene/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apm/xgene/xgene_enet_cle.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene/xgene_enet_cle.c</a></td><td class='right'>822</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apm/xgene/xgene_enet_cle.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene/xgene_enet_cle.h</a></td><td class='right'>290</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apm/xgene/xgene_enet_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene/xgene_enet_ethtool.c</a></td><td class='right'>285</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apm/xgene/xgene_enet_hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene/xgene_enet_hw.c</a></td><td class='right'>613</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apm/xgene/xgene_enet_hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene/xgene_enet_hw.h</a></td><td class='right'>177</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apm/xgene/xgene_enet_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene/xgene_enet_main.c</a></td><td class='right'>1735</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apm/xgene/xgene_enet_main.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene/xgene_enet_main.h</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apm/xgene/xgene_enet_ring2.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene/xgene_enet_ring2.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apm/xgene/xgene_enet_ring2.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene/xgene_enet_ring2.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apm/xgene/xgene_enet_sgmac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene/xgene_enet_sgmac.c</a></td><td class='right'>443</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apm/xgene/xgene_enet_sgmac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene/xgene_enet_sgmac.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c</a></td><td class='right'>289</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.h</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apple/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apple/Kconfig</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apple/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apple/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apple/bmac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apple/bmac.c</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apple/bmac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apple/bmac.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apple/mace.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apple/mace.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apple/mace.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apple/mace.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/apple/macmace.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apple/macmace.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/Kconfig</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/Makefile</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_cfg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/aq_cfg.h</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/aq_common.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_drvinfo.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/aq_drvinfo.c</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_drvinfo.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/aq_drvinfo.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/aq_ethtool.c</a></td><td class='right'>1090</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_ethtool.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/aq_ethtool.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_filters.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/aq_filters.c</a></td><td class='right'>889</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_filters.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/aq_filters.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/aq_hw.h</a></td><td class='right'>409</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.c</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_macsec.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/aq_macsec.c</a></td><td class='right'>1770</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_macsec.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/aq_macsec.h</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/aq_main.c</a></td><td class='right'>505</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_main.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/aq_main.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_nic.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/aq_nic.c</a></td><td class='right'>1695</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_nic.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/aq_nic.h</a></td><td class='right'>221</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_pci_func.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/aq_pci_func.c</a></td><td class='right'>486</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_pci_func.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/aq_pci_func.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/aq_phy.c</a></td><td class='right'>172</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/aq_phy.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/aq_ptp.c</a></td><td class='right'>1415</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_ptp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/aq_ptp.h</a></td><td class='right'>163</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_ring.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/aq_ring.c</a></td><td class='right'>978</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_ring.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/aq_ring.h</a></td><td class='right'>218</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_rss.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/aq_rss.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_utils.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/aq_utils.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_vec.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/aq_vec.c</a></td><td class='right'>379</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/aq_vec.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/aq_vec.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_a0.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_a0.c</a></td><td class='right'>981</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_a0.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_a0.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_a0_internal.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_a0_internal.h</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c</a></td><td class='right'>1830</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.h</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0_internal.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0_internal.h</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh.c</a></td><td class='right'>1896</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh.h</a></td><td class='right'>893</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh_internal.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh_internal.h</a></td><td class='right'>2910</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.c</a></td><td class='right'>1099</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.h</a></td><td class='right'>642</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils_fw2x.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils_fw2x.c</a></td><td class='right'>732</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2.c</a></td><td class='right'>863</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_internal.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_internal.h</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_llh.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_llh.c</a></td><td class='right'>234</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_llh.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_llh.h</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_llh_internal.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_llh_internal.h</a></td><td class='right'>391</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_utils.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_utils.c</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_utils.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_utils.h</a></td><td class='right'>636</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_utils_fw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_utils_fw.c</a></td><td class='right'>655</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/macsec/MSS_Egress_registers.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/macsec/MSS_Egress_registers.h</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/macsec/MSS_Ingress_registers.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/macsec/MSS_Ingress_registers.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/macsec/macsec_api.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/macsec/macsec_api.c</a></td><td class='right'>2477</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/macsec/macsec_api.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/macsec/macsec_api.h</a></td><td class='right'>323</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/aquantia/atlantic/macsec/macsec_struct.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aquantia/atlantic/macsec/macsec_struct.h</a></td><td class='right'>914</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/arc/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/arc/Kconfig</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/arc/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/arc/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/arc/emac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/arc/emac.h</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/arc/emac_arc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/arc/emac_arc.c</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/arc/emac_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/arc/emac_main.c</a></td><td class='right'>410</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/arc/emac_mdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/arc/emac_mdio.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/arc/emac_rockchip.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/arc/emac_rockchip.c</a></td><td class='right'>163</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/asix/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/asix/Kconfig</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/asix/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/asix/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/asix/ax88796c_ioctl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/asix/ax88796c_ioctl.c</a></td><td class='right'>239</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/asix/ax88796c_ioctl.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/asix/ax88796c_ioctl.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/asix/ax88796c_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/asix/ax88796c_main.c</a></td><td class='right'>1166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/asix/ax88796c_main.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/asix/ax88796c_main.h</a></td><td class='right'>570</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/asix/ax88796c_spi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/asix/ax88796c_spi.c</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/asix/ax88796c_spi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/asix/ax88796c_spi.h</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/atheros/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/atheros/Kconfig</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/atheros/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/atheros/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/atheros/ag71xx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/atheros/ag71xx.c</a></td><td class='right'>2035</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/atheros/alx/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/atheros/alx/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/atheros/alx/alx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/atheros/alx/alx.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/atheros/alx/ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/atheros/alx/ethtool.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/atheros/alx/hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/atheros/alx/hw.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/atheros/alx/hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/atheros/alx/hw.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/atheros/alx/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/atheros/alx/main.c</a></td><td class='right'>1008</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/atheros/alx/reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/atheros/alx/reg.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/atheros/atl1c/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/atheros/atl1c/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/atheros/atl1c/atl1c.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/atheros/atl1c/atl1c.h</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/atheros/atl1c/atl1c_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/atheros/atl1c/atl1c_ethtool.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/atheros/atl1c/atl1c_hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/atheros/atl1c/atl1c_hw.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/atheros/atl1c/atl1c_hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/atheros/atl1c/atl1c_hw.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/atheros/atl1c/atl1c_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/atheros/atl1c/atl1c_main.c</a></td><td class='right'>858</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/atheros/atl1e/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/atheros/atl1e/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/atheros/atl1e/atl1e.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/atheros/atl1e/atl1e.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/atheros/atl1e/atl1e_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/atheros/atl1e/atl1e_ethtool.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/atheros/atl1e/atl1e_hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/atheros/atl1e/atl1e_hw.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/atheros/atl1e/atl1e_hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/atheros/atl1e/atl1e_hw.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/atheros/atl1e/atl1e_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/atheros/atl1e/atl1e_main.c</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/atheros/atl1e/atl1e_param.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/atheros/atl1e/atl1e_param.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/atheros/atlx/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/atheros/atlx/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/atheros/atlx/atl1.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/atheros/atlx/atl1.c</a></td><td class='right'>334</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/atheros/atlx/atl1.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/atheros/atlx/atl1.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/atheros/atlx/atl2.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/atheros/atlx/atl2.c</a></td><td class='right'>229</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/atheros/atlx/atl2.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/atheros/atlx/atl2.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/atheros/atlx/atlx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/atheros/atlx/atlx.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/atheros/atlx/atlx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/atheros/atlx/atlx.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/Kconfig</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/asp2/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/asp2/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/asp2/bcmasp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/asp2/bcmasp.c</a></td><td class='right'>1469</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/asp2/bcmasp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/asp2/bcmasp.h</a></td><td class='right'>600</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/asp2/bcmasp_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/asp2/bcmasp_ethtool.c</a></td><td class='right'>464</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/asp2/bcmasp_intf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/asp2/bcmasp_intf.c</a></td><td class='right'>1423</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/asp2/bcmasp_intf_defs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/asp2/bcmasp_intf_defs.h</a></td><td class='right'>256</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/b44.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/b44.c</a></td><td class='right'>353</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/b44.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/b44.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bcm4908_enet.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bcm4908_enet.c</a></td><td class='right'>798</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bcm4908_enet.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bcm4908_enet.h</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bcm63xx_enet.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bcm63xx_enet.c</a></td><td class='right'>701</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bcm63xx_enet.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bcm63xx_enet.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bcmsysport.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bcmsysport.c</a></td><td class='right'>1553</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bcmsysport.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bcmsysport.h</a></td><td class='right'>238</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bgmac-bcma-mdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bgmac-bcma-mdio.c</a></td><td class='right'>264</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bgmac-bcma.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bgmac-bcma.c</a></td><td class='right'>366</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bgmac-platform.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bgmac-platform.c</a></td><td class='right'>305</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bgmac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bgmac.c</a></td><td class='right'>1091</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bgmac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bgmac.h</a></td><td class='right'>232</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnge/Makefile</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/bnge.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnge/bnge.h</a></td><td class='right'>255</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/bnge_auxr.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnge/bnge_auxr.c</a></td><td class='right'>258</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/bnge_auxr.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnge/bnge_auxr.h</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/bnge_core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnge/bnge_core.c</a></td><td class='right'>420</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/bnge_db.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnge/bnge_db.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/bnge_devlink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnge/bnge_devlink.c</a></td><td class='right'>306</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/bnge_devlink.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnge/bnge_devlink.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/bnge_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnge/bnge_ethtool.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/bnge_ethtool.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnge/bnge_ethtool.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/bnge_hwrm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnge/bnge_hwrm.c</a></td><td class='right'>548</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/bnge_hwrm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnge/bnge_hwrm.h</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.c</a></td><td class='right'>1185</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnge/bnge_hwrm_lib.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/bnge_netdev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnge/bnge_netdev.c</a></td><td class='right'>2485</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/bnge_netdev.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnge/bnge_netdev.h</a></td><td class='right'>454</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/bnge_resc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnge/bnge_resc.c</a></td><td class='right'>617</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/bnge_resc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnge/bnge_resc.h</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/bnge_rmem.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnge/bnge_rmem.c</a></td><td class='right'>499</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnge/bnge_rmem.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnge/bnge_rmem.h</a></td><td class='right'>202</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnx2.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnx2.c</a></td><td class='right'>586</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnx2.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnx2.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnx2x/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnx2x/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnx2x/bnx2x.h</a></td><td class='right'>255</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c</a></td><td class='right'>540</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_dcb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_dcb.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_dcb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_dcb.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_dump.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_dump.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c</a></td><td class='right'>648</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_file_hdr.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_file_hdr.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h</a></td><td class='right'>309</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_init_ops.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_init_ops.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c</a></td><td class='right'>1091</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c</a></td><td class='right'>1526</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_mfw_req.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_mfw_req.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h</a></td><td class='right'>191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_self_test.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_self_test.c</a></td><td class='right'>3183</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c</a></td><td class='right'>741</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sriov.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_sriov.c</a></td><td class='right'>631</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_sriov.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_sriov.h</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_vfpf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_vfpf.c</a></td><td class='right'>302</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnx2x/bnx2x_vfpf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnx2x/bnx2x_vfpf.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnxt/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnxt/bnxt.c</a></td><td class='right'>17240</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 30.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 69.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnxt/bnxt.h</a></td><td class='right'>2991</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_coredump.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnxt/bnxt_coredump.c</a></td><td class='right'>677</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_coredump.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnxt/bnxt_coredump.h</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_dcb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnxt/bnxt_dcb.c</a></td><td class='right'>801</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_dcb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnxt/bnxt_dcb.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnxt/bnxt_debugfs.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_debugfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnxt/bnxt_debugfs.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c</a></td><td class='right'>1331</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.h</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_dim.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnxt/bnxt_dim.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c</a></td><td class='right'>5659</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_fw_hdr.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnxt/bnxt_fw_hdr.h</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_hwmon.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnxt/bnxt_hwmon.c</a></td><td class='right'>241</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_hwmon.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnxt/bnxt_hwmon.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_hwrm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnxt/bnxt_hwrm.c</a></td><td class='right'>819</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_hwrm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnxt/bnxt_hwrm.h</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_nvm_defs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnxt/bnxt_nvm_defs.h</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c</a></td><td class='right'>1139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.h</a></td><td class='right'>201</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_sriov.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnxt/bnxt_sriov.c</a></td><td class='right'>1401</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_sriov.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnxt/bnxt_sriov.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_tc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnxt/bnxt_tc.c</a></td><td class='right'>2102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_tc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnxt/bnxt_tc.h</a></td><td class='right'>255</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.c</a></td><td class='right'>533</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.h</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_vfr.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnxt/bnxt_vfr.c</a></td><td class='right'>600</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_vfr.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnxt/bnxt_vfr.h</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.c</a></td><td class='right'>475</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/cnic.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/cnic.c</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/cnic.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/cnic.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/cnic_defs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/cnic_defs.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/cnic_if.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/cnic_if.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/genet/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/genet/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/genet/bcmgenet.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/genet/bcmgenet.c</a></td><td class='right'>3775</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/genet/bcmgenet.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/genet/bcmgenet.h</a></td><td class='right'>250</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/genet/bcmgenet_wol.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/genet/bcmgenet_wol.c</a></td><td class='right'>183</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/genet/bcmmii.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/genet/bcmmii.c</a></td><td class='right'>765</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/sb1250-mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/sb1250-mac.c</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/tg3.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/tg3.c</a></td><td class='right'>1636</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/tg3.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/tg3.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/broadcom/unimac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/broadcom/unimac.h</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/brocade/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/brocade/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/brocade/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/brocade/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/brocade/bna/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/brocade/bna/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/brocade/bna/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/brocade/bna/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/brocade/bna/bfa_cee.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/brocade/bna/bfa_cee.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/brocade/bna/bfa_cee.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/brocade/bna/bfa_cee.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/brocade/bna/bfa_cs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/brocade/bna/bfa_cs.h</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/brocade/bna/bfa_defs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/brocade/bna/bfa_defs.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/brocade/bna/bfa_defs_cna.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/brocade/bna/bfa_defs_cna.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/brocade/bna/bfa_defs_mfg_comm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/brocade/bna/bfa_defs_mfg_comm.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/brocade/bna/bfa_defs_status.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/brocade/bna/bfa_defs_status.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/brocade/bna/bfa_ioc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/brocade/bna/bfa_ioc.c</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/brocade/bna/bfa_ioc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/brocade/bna/bfa_ioc.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/brocade/bna/bfa_ioc_ct.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/brocade/bna/bfa_msgq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/brocade/bna/bfa_msgq.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/brocade/bna/bfa_msgq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/brocade/bna/bfa_msgq.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/brocade/bna/bfi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/brocade/bna/bfi.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/brocade/bna/bfi_cna.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/brocade/bna/bfi_cna.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/brocade/bna/bfi_enet.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/brocade/bna/bfi_enet.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/brocade/bna/bfi_reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/brocade/bna/bfi_reg.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/brocade/bna/bna.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/brocade/bna/bna.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/brocade/bna/bna_enet.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/brocade/bna/bna_enet.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/brocade/bna/bna_hw_defs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/brocade/bna/bna_hw_defs.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/brocade/bna/bna_tx_rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/brocade/bna/bna_tx_rx.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/brocade/bna/bna_types.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/brocade/bna/bna_types.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/brocade/bna/bnad.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/brocade/bna/bnad.c</a></td><td class='right'>304</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/brocade/bna/bnad.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/brocade/bna/bnad.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/brocade/bna/bnad_debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/brocade/bna/bnad_debugfs.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/brocade/bna/bnad_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/brocade/bna/bnad_ethtool.c</a></td><td class='right'>415</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/brocade/bna/cna.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/brocade/bna/cna.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/brocade/bna/cna_fwimg.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/brocade/bna/cna_fwimg.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cadence/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cadence/Kconfig</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cadence/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cadence/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cadence/macb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cadence/macb.c</a></td><td class='right'>3029</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.3%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cadence/macb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cadence/macb.h</a></td><td class='right'>843</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cadence/macb_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cadence/macb_main.c</a></td><td class='right'>5949</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cadence/macb_pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cadence/macb_pci.c</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cadence/macb_ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cadence/macb_ptp.c</a></td><td class='right'>468</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/calxeda/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/calxeda/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/calxeda/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/calxeda/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/calxeda/xgmac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/calxeda/xgmac.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/Kconfig</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/common/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/common/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/common/cavium_ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/common/cavium_ptp.c</a></td><td class='right'>347</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/common/cavium_ptp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/common/cavium_ptp.h</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/Makefile</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c</a></td><td class='right'>1306</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.h</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/cn23xx_pf_regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/cn23xx_pf_regs.h</a></td><td class='right'>599</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/cn23xx_vf_device.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/cn23xx_vf_device.c</a></td><td class='right'>683</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/cn23xx_vf_device.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/cn23xx_vf_device.h</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/cn23xx_vf_regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/cn23xx_vf_regs.h</a></td><td class='right'>274</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/cn66xx_device.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/cn66xx_device.c</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/cn66xx_device.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/cn66xx_device.h</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/cn66xx_regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/cn66xx_regs.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/cn68xx_device.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/cn68xx_device.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/cn68xx_device.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/cn68xx_device.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/cn68xx_regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/cn68xx_regs.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/lio_core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/lio_core.c</a></td><td class='right'>1831</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/lio_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/lio_ethtool.c</a></td><td class='right'>2952</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/lio_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/lio_main.c</a></td><td class='right'>4148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 3.0%;'/><td class='none' style='width: 92.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/lio_vf_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/lio_vf_main.c</a></td><td class='right'>2427</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/lio_vf_rep.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/lio_vf_rep.c</a></td><td class='right'>672</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/lio_vf_rep.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/lio_vf_rep.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/liquidio_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/liquidio_common.h</a></td><td class='right'>716</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/liquidio_image.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/liquidio_image.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/octeon_config.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/octeon_config.h</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/octeon_console.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/octeon_console.c</a></td><td class='right'>486</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/octeon_device.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/octeon_device.c</a></td><td class='right'>819</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/octeon_device.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/octeon_device.h</a></td><td class='right'>450</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/octeon_droq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/octeon_droq.c</a></td><td class='right'>555</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/octeon_droq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/octeon_droq.h</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/octeon_iq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/octeon_iq.h</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/octeon_mailbox.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/octeon_mailbox.c</a></td><td class='right'>375</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/octeon_mailbox.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/octeon_mailbox.h</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/octeon_main.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/octeon_main.h</a></td><td class='right'>213</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/octeon_mem_ops.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/octeon_mem_ops.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/octeon_mem_ops.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/octeon_mem_ops.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/octeon_network.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/octeon_network.h</a></td><td class='right'>500</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/octeon_nic.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/octeon_nic.c</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/octeon_nic.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/octeon_nic.h</a></td><td class='right'>173</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/request_manager.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/request_manager.c</a></td><td class='right'>644</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/response_manager.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/response_manager.c</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/liquidio/response_manager.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/liquidio/response_manager.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/octeon/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/octeon/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/octeon/octeon_mgmt.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/octeon/octeon_mgmt.c</a> (renamed from drivers/net/ethernet/octeon/octeon_mgmt.c)</td><td class='right'>295</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/thunder/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/thunder/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/thunder/nic.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/thunder/nic.h</a></td><td class='right'>387</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/thunder/nic_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/thunder/nic_main.c</a></td><td class='right'>980</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/thunder/nic_reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/thunder/nic_reg.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/thunder/nicvf_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/thunder/nicvf_ethtool.c</a></td><td class='right'>562</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/thunder/nicvf_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/thunder/nicvf_main.c</a></td><td class='right'>1684</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/thunder/nicvf_queues.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/thunder/nicvf_queues.c</a></td><td class='right'>1162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/thunder/nicvf_queues.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/thunder/nicvf_queues.h</a></td><td class='right'>181</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/thunder/q_struct.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/thunder/q_struct.h</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/thunder/thunder_bgx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/thunder/thunder_bgx.c</a></td><td class='right'>1284</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/thunder/thunder_bgx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/thunder/thunder_bgx.h</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cavium/thunder/thunder_xcv.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cavium/thunder/thunder_xcv.c</a></td><td class='right'>231</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/Kconfig</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb/common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb/common.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb/cphy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb/cphy.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb/cpl5_cmd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb/cpl5_cmd.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb/cxgb2.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb/cxgb2.c</a></td><td class='right'>201</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb/elmer0.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb/elmer0.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb/espi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb/espi.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb/espi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb/espi.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb/fpga_defs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb/fpga_defs.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb/gmac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb/gmac.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb/mv88e1xxx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb/mv88e1xxx.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb/mv88e1xxx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb/mv88e1xxx.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb/mv88x201x.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb/mv88x201x.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb/my3126.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb/my3126.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb/pm3393.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb/pm3393.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb/regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb/regs.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb/sge.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb/sge.c</a></td><td class='right'>188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb/sge.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb/sge.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb/subr.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb/subr.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb/suni1x10gexp_regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb/suni1x10gexp_regs.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb/tp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb/tp.c</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb/tp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb/tp.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb/vsc7326.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb/vsc7326.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb/vsc7326_reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb/vsc7326_reg.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb3/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb3/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb3/adapter.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb3/adapter.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb3/ael1002.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb3/ael1002.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb3/aq100x.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb3/aq100x.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb3/common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb3/common.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb3/cxgb3_defs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb3/cxgb3_defs.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb3/cxgb3_ioctl.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb3/cxgb3_ioctl.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c</a></td><td class='right'>322</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb3/cxgb3_offload.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb3/cxgb3_offload.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb3/cxgb3_offload.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb3/cxgb3_offload.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb3/l2t.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb3/l2t.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb3/l2t.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb3/l2t.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb3/regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb3/regs.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb3/sge.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb3/sge.c</a></td><td class='right'>393</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb3/sge_defs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb3/sge_defs.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb3/t3_cpl.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb3/t3_hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb3/t3_hw.c</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb3/t3cdev.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb3/t3cdev.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb3/version.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb3/version.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb3/vsc8211.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb3/vsc8211.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb3/xgmac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb3/xgmac.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/clip_tbl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/clip_tbl.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/clip_tbl.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/clip_tbl.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cudbg_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/cudbg_common.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cudbg_entity.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/cudbg_entity.h</a></td><td class='right'>352</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cudbg_if.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/cudbg_if.h</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c</a></td><td class='right'>3609</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cudbg_lib.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/cudbg_lib.h</a></td><td class='right'>283</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cudbg_lib_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/cudbg_lib_common.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cudbg_zlib.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/cudbg_zlib.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cudbg_zlib.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/cudbg_zlib.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/cxgb4.h</a></td><td class='right'>1190</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c</a></td><td class='right'>279</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_dcb.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c</a></td><td class='right'>1941</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c</a></td><td class='right'>2199</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_fcoe.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_fcoe.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_filter.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_filter.c</a></td><td class='right'>2175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_filter.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_filter.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c</a></td><td class='right'>5022</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.4%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 91.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_mps.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_mps.c</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_ptp.c</a></td><td class='right'>468</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_ptp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_ptp.h</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_flower.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_flower.c</a></td><td class='right'>1149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_flower.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_flower.h</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_matchall.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_matchall.c</a></td><td class='right'>571</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_matchall.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_matchall.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_mqprio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_mqprio.c</a></td><td class='right'>722</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_mqprio.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_mqprio.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_u32.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_u32.c</a></td><td class='right'>532</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_u32.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_u32.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_u32_parse.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_u32_parse.h</a></td><td class='right'>336</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_thermal.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_thermal.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.c</a></td><td class='right'>859</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h</a></td><td class='right'>252</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/l2t.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/l2t.c</a></td><td class='right'>335</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/l2t.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/l2t.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/sched.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/sched.c</a></td><td class='right'>693</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/sched.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/sched.h</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/sge.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/sge.c</a></td><td class='right'>3095</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/smt.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/smt.c</a></td><td class='right'>248</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/smt.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/smt.h</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/srq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/srq.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/srq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/srq.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/t4_chip_type.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/t4_chip_type.h</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/t4_hw.c</a></td><td class='right'>5779</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.5%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 89.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/t4_hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/t4_hw.h</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/t4_msg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/t4_msg.h</a></td><td class='right'>1227</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/t4_pci_id_tbl.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/t4_pci_id_tbl.h</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/t4_regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/t4_regs.h</a></td><td class='right'>489</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/t4_tcb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/t4_tcb.h</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/t4_values.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/t4_values.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h</a></td><td class='right'>1042</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4/t4fw_version.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4/t4fw_version.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4vf/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4vf/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4vf/adapter.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4vf/adapter.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c</a></td><td class='right'>1376</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4vf/sge.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4vf/sge.c</a></td><td class='right'>214</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4vf/t4vf_common.h</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_defs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4vf/t4vf_defs.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c</a></td><td class='right'>896</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/inline_crypto/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/inline_crypto/Kconfig</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/inline_crypto/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/inline_crypto/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/inline_crypto/ch_ipsec/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/inline_crypto/ch_ipsec/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/inline_crypto/ch_ipsec/chcr_ipsec.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/inline_crypto/ch_ipsec/chcr_ipsec.c</a></td><td class='right'>822</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/inline_crypto/ch_ipsec/chcr_ipsec.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/inline_crypto/ch_ipsec/chcr_ipsec.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/inline_crypto/ch_ktls/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/inline_crypto/ch_ktls/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/inline_crypto/ch_ktls/chcr_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/inline_crypto/ch_ktls/chcr_common.h</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/inline_crypto/ch_ktls/chcr_ktls.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/inline_crypto/ch_ktls/chcr_ktls.c</a></td><td class='right'>2271</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/inline_crypto/ch_ktls/chcr_ktls.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/inline_crypto/ch_ktls/chcr_ktls.h</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/inline_crypto/chtls/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/inline_crypto/chtls/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls.h</a></td><td class='right'>584</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_cm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_cm.c</a></td><td class='right'>2336</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_cm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_cm.h</a></td><td class='right'>218</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_hw.c</a></td><td class='right'>462</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_io.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_io.c</a></td><td class='right'>1836</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/inline_crypto/chtls/chtls_main.c</a></td><td class='right'>642</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/libcxgb/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/libcxgb/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/libcxgb/libcxgb_cm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/libcxgb/libcxgb_cm.c</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/libcxgb/libcxgb_cm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/libcxgb/libcxgb_cm.h</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.c</a></td><td class='right'>532</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.h</a></td><td class='right'>335</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cirrus/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cirrus/Kconfig</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cirrus/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cirrus/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cirrus/cs89x0.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cirrus/cs89x0.c</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cirrus/cs89x0.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cirrus/cs89x0.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cirrus/ep93xx_eth.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cirrus/ep93xx_eth.c</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cirrus/mac89x0.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cirrus/mac89x0.c</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/Kconfig</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/cq_desc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/cq_desc.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/cq_enet_desc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/cq_enet_desc.h</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/enic.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/enic.h</a></td><td class='right'>209</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/enic_api.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/enic_api.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/enic_api.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/enic_api.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/enic_clsf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/enic_clsf.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/enic_clsf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/enic_clsf.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/enic_dev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/enic_dev.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/enic_dev.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/enic_dev.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/enic_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/enic_ethtool.c</a></td><td class='right'>491</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/enic_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/enic_main.c</a></td><td class='right'>1649</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/enic_pp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/enic_pp.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/enic_pp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/enic_pp.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/enic_res.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/enic_res.c</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/enic_res.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/enic_res.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/enic_rq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/enic_rq.c</a></td><td class='right'>436</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/enic_rq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/enic_rq.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/enic_wq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/enic_wq.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/enic_wq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/enic_wq.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/rq_enet_desc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/rq_enet_desc.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/vnic_cq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/vnic_cq.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/vnic_cq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/vnic_cq.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/vnic_dev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/vnic_dev.c</a></td><td class='right'>445</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/vnic_dev.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/vnic_dev.h</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/vnic_devcmd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/vnic_devcmd.h</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/vnic_enet.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/vnic_enet.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/vnic_intr.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/vnic_intr.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/vnic_intr.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/vnic_intr.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/vnic_nic.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/vnic_nic.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/vnic_resource.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/vnic_resource.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/vnic_rq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/vnic_rq.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/vnic_rq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/vnic_rq.h</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/vnic_rss.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/vnic_rss.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/vnic_stats.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/vnic_stats.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/vnic_vic.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/vnic_vic.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/vnic_vic.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/vnic_vic.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/vnic_wq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/vnic_wq.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/vnic_wq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/vnic_wq.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cisco/enic/wq_enet_desc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cisco/enic/wq_enet_desc.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cortina/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cortina/Kconfig</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cortina/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cortina/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cortina/gemini.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cortina/gemini.c</a></td><td class='right'>2692</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/cortina/gemini.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/cortina/gemini.h</a></td><td class='right'>958</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/davicom/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/davicom/Kconfig</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/davicom/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/davicom/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/davicom/dm9000.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/davicom/dm9000.c</a></td><td class='right'>191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/davicom/dm9000.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/davicom/dm9000.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/davicom/dm9051.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/davicom/dm9051.c</a></td><td class='right'>1258</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/davicom/dm9051.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/davicom/dm9051.h</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dec/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/dec/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dec/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/dec/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dec/tulip/21142.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/dec/tulip/21142.c</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dec/tulip/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/dec/tulip/Kconfig</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dec/tulip/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/dec/tulip/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dec/tulip/de2104x.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/dec/tulip/de2104x.c</a></td><td class='right'>332</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dec/tulip/de4x5.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/dec/tulip/de4x5.c</a></td><td class='right'>5575</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 9.8%;'/><td class='none' style='width: 90.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dec/tulip/de4x5.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/dec/tulip/de4x5.h</a></td><td class='right'>1017</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dec/tulip/dmfe.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/dec/tulip/dmfe.c</a></td><td class='right'>217</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dec/tulip/eeprom.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/dec/tulip/eeprom.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dec/tulip/interrupt.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/dec/tulip/interrupt.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dec/tulip/media.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/dec/tulip/media.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dec/tulip/pnic.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/dec/tulip/pnic.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dec/tulip/pnic2.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/dec/tulip/pnic2.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dec/tulip/timer.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/dec/tulip/timer.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dec/tulip/tulip.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/dec/tulip/tulip.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dec/tulip/tulip_core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/dec/tulip/tulip_core.c</a></td><td class='right'>290</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dec/tulip/uli526x.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/dec/tulip/uli526x.c</a></td><td class='right'>212</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dec/tulip/winbond-840.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/dec/tulip/winbond-840.c</a></td><td class='right'>204</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dec/tulip/xircom_cb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/dec/tulip/xircom_cb.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dlink/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/dlink/Kconfig</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dlink/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/dlink/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dlink/dl2k.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/dlink/dl2k.c</a></td><td class='right'>699</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dlink/dl2k.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/dlink/dl2k.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dlink/sundance.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/dlink/sundance.c</a></td><td class='right'>247</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dnet.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/dnet.c</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/dnet.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/dnet.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ec_bhf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ec_bhf.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/emulex/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/emulex/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/emulex/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/emulex/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/emulex/benet/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/emulex/benet/Kconfig</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/emulex/benet/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/emulex/benet/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/emulex/benet/be.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/emulex/benet/be.h</a></td><td class='right'>285</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/emulex/benet/be_cmds.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/emulex/benet/be_cmds.c</a></td><td class='right'>1349</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/emulex/benet/be_cmds.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/emulex/benet/be_cmds.h</a></td><td class='right'>314</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/emulex/benet/be_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/emulex/benet/be_ethtool.c</a></td><td class='right'>539</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/emulex/benet/be_hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/emulex/benet/be_hw.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/emulex/benet/be_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/emulex/benet/be_main.c</a></td><td class='right'>2633</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/emulex/benet/be_roce.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/emulex/benet/be_roce.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/emulex/benet/be_roce.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/emulex/benet/be_roce.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/engleder/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/engleder/Kconfig</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/engleder/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/engleder/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/engleder/tsnep.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/engleder/tsnep.h</a></td><td class='right'>264</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/engleder/tsnep_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/engleder/tsnep_ethtool.c</a></td><td class='right'>480</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/engleder/tsnep_hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/engleder/tsnep_hw.h</a></td><td class='right'>248</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/engleder/tsnep_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/engleder/tsnep_main.c</a></td><td class='right'>2715</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/engleder/tsnep_ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/engleder/tsnep_ptp.c</a></td><td class='right'>242</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/engleder/tsnep_rxnfc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/engleder/tsnep_rxnfc.c</a></td><td class='right'>307</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/engleder/tsnep_selftests.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/engleder/tsnep_selftests.c</a></td><td class='right'>811</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/engleder/tsnep_tc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/engleder/tsnep_tc.c</a></td><td class='right'>466</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/engleder/tsnep_xdp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/engleder/tsnep_xdp.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ethoc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ethoc.c</a></td><td class='right'>253</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ezchip/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ezchip/Kconfig</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ezchip/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ezchip/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ezchip/nps_enet.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ezchip/nps_enet.c</a></td><td class='right'>335</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ezchip/nps_enet.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ezchip/nps_enet.h</a></td><td class='right'>387</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/faraday/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/faraday/Kconfig</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/faraday/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/faraday/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/faraday/ftgmac100.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/faraday/ftgmac100.c</a></td><td class='right'>2346</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/faraday/ftgmac100.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/faraday/ftgmac100.h</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/faraday/ftmac100.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/faraday/ftmac100.c</a></td><td class='right'>211</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/faraday/ftmac100.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/faraday/ftmac100.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/fealnx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/fealnx.c</a></td><td class='right'>210</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/Kconfig</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa/Makefile</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa/dpaa_eth.c</a></td><td class='right'>3628</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa/dpaa_eth.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa/dpaa_eth.h</a></td><td class='right'>196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa/dpaa_eth_sysfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa/dpaa_eth_sysfs.c</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa/dpaa_eth_trace.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa/dpaa_eth_trace.h</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa/dpaa_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa/dpaa_ethtool.c</a></td><td class='right'>535</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa2/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa2/Kconfig</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa2/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa2/Makefile</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth-dcb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa2/dpaa2-eth-dcb.c</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth-debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa2/dpaa2-eth-debugfs.c</a></td><td class='right'>207</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth-debugfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa2/dpaa2-eth-debugfs.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth-devlink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa2/dpaa2-eth-devlink.c</a></td><td class='right'>289</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth-trace.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa2/dpaa2-eth-trace.h</a></td><td class='right'>197</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c</a></td><td class='right'>5167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.h</a></td><td class='right'>861</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa2/dpaa2-ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa2/dpaa2-ethtool.c</a></td><td class='right'>965</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c</a></td><td class='right'>586</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa2/dpaa2-ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa2/dpaa2-ptp.c</a></td><td class='right'>259</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa2/dpaa2-ptp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa2/dpaa2-ptp.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa2/dpaa2-switch-ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa2/dpaa2-switch-ethtool.c</a></td><td class='right'>221</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa2/dpaa2-switch-flower.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa2/dpaa2-switch-flower.c</a></td><td class='right'>891</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa2/dpaa2-switch.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa2/dpaa2-switch.c</a></td><td class='right'>3595</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa2/dpaa2-switch.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa2/dpaa2-switch.h</a></td><td class='right'>277</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa2/dpaa2-xsk.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa2/dpaa2-xsk.c</a></td><td class='right'>452</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa2/dpkg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa2/dpkg.h</a></td><td class='right'>481</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa2/dpmac-cmd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa2/dpmac-cmd.h</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa2/dpmac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa2/dpmac.c</a></td><td class='right'>237</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa2/dpmac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa2/dpmac.h</a></td><td class='right'>213</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa2/dpni-cmd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa2/dpni-cmd.h</a></td><td class='right'>693</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa2/dpni.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa2/dpni.c</a></td><td class='right'>2185</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa2/dpni.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa2/dpni.h</a></td><td class='right'>1119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa2/dprtc-cmd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa2/dprtc-cmd.h</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa2/dprtc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa2/dprtc.c</a></td><td class='right'>293</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa2/dprtc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa2/dprtc.h</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa2/dpsw-cmd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa2/dpsw-cmd.h</a></td><td class='right'>556</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa2/dpsw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa2/dpsw.c</a></td><td class='right'>1661</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/dpaa2/dpsw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/dpaa2/dpsw.h</a></td><td class='right'>791</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/enetc/Kconfig</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/enetc/Makefile</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/enetc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/enetc/enetc.c</a></td><td class='right'>3777</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/enetc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/enetc/enetc.h</a></td><td class='right'>708</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/enetc4_debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/enetc/enetc4_debugfs.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/enetc4_debugfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/enetc/enetc4_debugfs.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/enetc4_hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/enetc/enetc4_hw.h</a></td><td class='right'>232</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/enetc4_pf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/enetc/enetc4_pf.c</a></td><td class='right'>1102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/enetc_cbdr.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/enetc/enetc_cbdr.c</a></td><td class='right'>308</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/enetc_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/enetc/enetc_ethtool.c</a></td><td class='right'>1416</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/enetc_hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/enetc/enetc_hw.h</a></td><td class='right'>1041</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/enetc_ierb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/enetc/enetc_ierb.c</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/enetc_ierb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/enetc/enetc_ierb.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/enetc_mdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/enetc/enetc_mdio.c</a></td><td class='right'>236</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/enetc_msg.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/enetc/enetc_msg.c</a></td><td class='right'>164</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/enetc_pci_mdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/enetc/enetc_pci_mdio.c</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/enetc_pf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/enetc/enetc_pf.c</a></td><td class='right'>1112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/enetc_pf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/enetc/enetc_pf.h</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/enetc_pf_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/enetc/enetc_pf_common.c</a></td><td class='right'>439</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/enetc_pf_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/enetc/enetc_pf_common.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/enetc_ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/enetc/enetc_ptp.c</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/enetc_qos.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/enetc/enetc_qos.c</a></td><td class='right'>1689</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/enetc_vf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/enetc/enetc_vf.c</a></td><td class='right'>291</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/netc_blk_ctrl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/enetc/netc_blk_ctrl.c</a></td><td class='right'>845</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/ntmp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/enetc/ntmp.c</a></td><td class='right'>457</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/enetc/ntmp_private.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/enetc/ntmp_private.h</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fec.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/fec.h</a></td><td class='right'>273</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fec_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/fec_main.c</a></td><td class='right'>3489</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fec_mpc52xx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/fec_mpc52xx.c</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fec_mpc52xx_phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/fec_mpc52xx_phy.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fec_ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/fec_ptp.c</a></td><td class='right'>555</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fman/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/fman/Kconfig</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fman/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/fman/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fman/fman.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/fman/fman.c</a></td><td class='right'>2913</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fman/fman.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/fman/fman.h</a></td><td class='right'>384</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fman/fman_dtsec.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/fman/fman_dtsec.c</a></td><td class='right'>1502</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fman/fman_dtsec.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/fman/fman_dtsec.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fman/fman_keygen.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/fman/fman_keygen.c</a></td><td class='right'>757</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fman/fman_keygen.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/fman/fman_keygen.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fman/fman_mac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/fman/fman_mac.h</a></td><td class='right'>246</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fman/fman_memac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/fman/fman_memac.c</a></td><td class='right'>1335</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fman/fman_memac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/fman/fman_memac.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fman/fman_muram.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/fman/fman_muram.c</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fman/fman_muram.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/fman/fman_muram.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fman/fman_port.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/fman/fman_port.c</a></td><td class='right'>1921</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fman/fman_port.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/fman/fman_port.h</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fman/fman_sp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/fman/fman_sp.c</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fman/fman_sp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/fman/fman_sp.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fman/fman_tgec.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/fman/fman_tgec.c</a></td><td class='right'>816</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fman/fman_tgec.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/fman/fman_tgec.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fman/mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/fman/mac.c</a></td><td class='right'>346</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fman/mac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/fman/mac.h</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fs_enet/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/fs_enet/Kconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fs_enet/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/fs_enet/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fs_enet/fec.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/fs_enet/fec.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c</a></td><td class='right'>840</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fs_enet/fs_enet.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/fs_enet/fs_enet.h</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fs_enet/mac-fcc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/fs_enet/mac-fcc.c</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fs_enet/mac-fec.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/fs_enet/mac-fec.c</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fs_enet/mac-scc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/fs_enet/mac-scc.c</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fs_enet/mii-bitbang.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/fs_enet/mii-bitbang.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fs_enet/mii-fec.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/fs_enet/mii-fec.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/fsl_pq_mdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/fsl_pq_mdio.c</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/gianfar.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/gianfar.c</a></td><td class='right'>3322</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/gianfar.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/gianfar.h</a></td><td class='right'>243</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/gianfar_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/gianfar_ethtool.c</a></td><td class='right'>320</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/gianfar_ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/gianfar_ptp.c</a></td><td class='right'>574</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/ucc_geth.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/ucc_geth.c</a></td><td class='right'>1241</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/ucc_geth.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/ucc_geth.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/ucc_geth_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/ucc_geth_ethtool.c</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/freescale/xgmac_mdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/freescale/xgmac_mdio.c</a></td><td class='right'>334</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/fujitsu/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/fujitsu/Kconfig</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/fujitsu/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/fujitsu/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/fujitsu/fmvj18x_cs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/fujitsu/fmvj18x_cs.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/fungible/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/fungible/Kconfig</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/fungible/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/fungible/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/fungible/funcore/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/fungible/funcore/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/fungible/funcore/fun_dev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/fungible/funcore/fun_dev.c</a></td><td class='right'>833</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/fungible/funcore/fun_dev.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/fungible/funcore/fun_dev.h</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/fungible/funcore/fun_hci.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/fungible/funcore/fun_hci.h</a></td><td class='right'>1242</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/fungible/funcore/fun_queue.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/fungible/funcore/fun_queue.c</a></td><td class='right'>536</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/fungible/funcore/fun_queue.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/fungible/funcore/fun_queue.h</a></td><td class='right'>174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/fungible/funeth/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/fungible/funeth/Kconfig</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/fungible/funeth/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/fungible/funeth/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/fungible/funeth/fun_port.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/fungible/funeth/fun_port.h</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/fungible/funeth/funeth.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/fungible/funeth/funeth.h</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/fungible/funeth/funeth_devlink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/fungible/funeth/funeth_devlink.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/fungible/funeth/funeth_devlink.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/fungible/funeth/funeth_devlink.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/fungible/funeth/funeth_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/fungible/funeth/funeth_ethtool.c</a></td><td class='right'>1196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/fungible/funeth/funeth_ktls.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/fungible/funeth/funeth_ktls.c</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/fungible/funeth/funeth_ktls.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/fungible/funeth/funeth_ktls.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/fungible/funeth/funeth_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/fungible/funeth/funeth_main.c</a></td><td class='right'>2069</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/fungible/funeth/funeth_rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/fungible/funeth/funeth_rx.c</a></td><td class='right'>828</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/fungible/funeth/funeth_trace.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/fungible/funeth/funeth_trace.h</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/fungible/funeth/funeth_tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/fungible/funeth/funeth_tx.c</a></td><td class='right'>800</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/fungible/funeth/funeth_txrx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/fungible/funeth/funeth_txrx.h</a></td><td class='right'>266</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/google/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/google/Kconfig</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/google/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/google/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/google/gve/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/google/gve/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/google/gve/gve.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/google/gve/gve.h</a></td><td class='right'>1346</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/google/gve/gve_adminq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/google/gve/gve_adminq.c</a></td><td class='right'>1608</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/google/gve/gve_adminq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/google/gve/gve_adminq.h</a></td><td class='right'>660</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/google/gve/gve_buffer_mgmt_dqo.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/google/gve/gve_buffer_mgmt_dqo.c</a></td><td class='right'>344</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/google/gve/gve_desc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/google/gve/gve_desc.h</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/google/gve/gve_desc_dqo.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/google/gve/gve_desc_dqo.h</a></td><td class='right'>263</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/google/gve/gve_dqo.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/google/gve/gve_dqo.h</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/google/gve/gve_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/google/gve/gve_ethtool.c</a></td><td class='right'>985</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/google/gve/gve_flow_rule.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/google/gve/gve_flow_rule.c</a></td><td class='right'>298</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/google/gve/gve_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/google/gve/gve_main.c</a></td><td class='right'>2983</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/google/gve/gve_ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/google/gve/gve_ptp.c</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/google/gve/gve_register.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/google/gve/gve_register.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/google/gve/gve_rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/google/gve/gve_rx.c</a></td><td class='right'>1098</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/google/gve/gve_rx_dqo.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/google/gve/gve_rx_dqo.c</a></td><td class='right'>1115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/google/gve/gve_tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/google/gve/gve_tx.c</a></td><td class='right'>1042</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/google/gve/gve_tx_dqo.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/google/gve/gve_tx_dqo.c</a></td><td class='right'>1615</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/google/gve/gve_utils.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/google/gve/gve_utils.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/google/gve/gve_utils.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/google/gve/gve_utils.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/Kconfig</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hibmcge/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hibmcge/hbg_common.h</a></td><td class='right'>294</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hibmcge/hbg_debugfs.c</a></td><td class='right'>168</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_debugfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hibmcge/hbg_debugfs.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_diagnose.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hibmcge/hbg_diagnose.c</a></td><td class='right'>349</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_diagnose.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hibmcge/hbg_diagnose.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_err.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hibmcge/hbg_err.c</a></td><td class='right'>194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_err.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hibmcge/hbg_err.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hibmcge/hbg_ethtool.c</a></td><td class='right'>500</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_ethtool.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hibmcge/hbg_ethtool.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.c</a></td><td class='right'>399</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hibmcge/hbg_hw.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_irq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hibmcge/hbg_irq.c</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_irq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hibmcge/hbg_irq.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hibmcge/hbg_main.c</a></td><td class='right'>528</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_mdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hibmcge/hbg_mdio.c</a></td><td class='right'>304</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_mdio.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hibmcge/hbg_mdio.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hibmcge/hbg_reg.h</a></td><td class='right'>302</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_trace.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hibmcge/hbg_trace.h</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_txrx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hibmcge/hbg_txrx.c</a></td><td class='right'>717</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hibmcge/hbg_txrx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hibmcge/hbg_txrx.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hip04_eth.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hip04_eth.c</a></td><td class='right'>288</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hip04_mdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hip04_mdio.c</a></td><td class='right'>186</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hisi_femac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hisi_femac.c</a></td><td class='right'>974</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hix5hd2_gmac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hix5hd2_gmac.c</a></td><td class='right'>443</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns/Makefile</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns/hnae.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns/hnae.c</a></td><td class='right'>468</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns/hnae.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns/hnae.h</a></td><td class='right'>707</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns/hns_ae_adapt.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns/hns_ae_adapt.c</a></td><td class='right'>996</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c</a></td><td class='right'>738</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.c</a></td><td class='right'>1255</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.h</a></td><td class='right'>467</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c</a></td><td class='right'>3025</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.h</a></td><td class='right'>440</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c</a></td><td class='right'>704</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns/hns_dsaf_ppe.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_ppe.c</a></td><td class='right'>629</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns/hns_dsaf_ppe.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_ppe.h</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.c</a></td><td class='right'>1081</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_rcb.h</a></td><td class='right'>163</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h</a></td><td class='right'>1095</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns/hns_dsaf_xgmac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_xgmac.c</a></td><td class='right'>818</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns/hns_dsaf_xgmac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns/hns_dsaf_xgmac.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns/hns_enet.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns/hns_enet.c</a></td><td class='right'>2450</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns/hns_enet.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns/hns_enet.h</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns/hns_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns/hns_ethtool.c</a></td><td class='right'>1284</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/Makefile</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hclge_mbx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hclge_mbx.h</a></td><td class='right'>256</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hnae3.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hnae3.c</a></td><td class='right'>410</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hnae3.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hnae3.h</a></td><td class='right'>981</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c</a></td><td class='right'>685</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h</a></td><td class='right'>500</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_rss.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_rss.c</a></td><td class='right'>518</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_rss.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_rss.h</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_tqp_stats.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_tqp_stats.c</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_tqp_stats.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_tqp_stats.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3_dcbnl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3_dcbnl.c</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c</a></td><td class='right'>985</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3_enet.c</a></td><td class='right'>6076</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3_enet.h</a></td><td class='right'>761</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c</a></td><td class='right'>2232</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3_trace.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3_trace.h</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h</a></td><td class='right'>892</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c</a></td><td class='right'>682</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c</a></td><td class='right'>2956</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_devlink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_devlink.c</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_devlink.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_devlink.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c</a></td><td class='right'>3473</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h</a></td><td class='right'>269</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c</a></td><td class='right'>12935</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 22.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 77.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h</a></td><td class='right'>1178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mbx.c</a></td><td class='right'>1155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c</a></td><td class='right'>317</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c</a></td><td class='right'>560</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.h</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_regs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_regs.c</a></td><td class='right'>669</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_regs.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c</a></td><td class='right'>2161</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h</a></td><td class='right'>281</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_trace.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_trace.h</a></td><td class='right'>181</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_cmd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_cmd.h</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_devlink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_devlink.c</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_devlink.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_devlink.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c</a></td><td class='right'>3433</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h</a></td><td class='right'>300</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_mbx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_mbx.c</a></td><td class='right'>388</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_regs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_regs.c</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_regs.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_trace.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_trace.h</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hisilicon/hns_mdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hisilicon/hns_mdio.c</a></td><td class='right'>652</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hp/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hp/Kconfig</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hp/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hp/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hp/hp100.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hp/hp100.c</a></td><td class='right'>3069</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.4%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/hp/hp100.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/hp/hp100.h</a></td><td class='right'>615</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/Kconfig</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/Kconfig</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_common.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_common.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_debugfs.c</a></td><td class='right'>324</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_debugfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_debugfs.h</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_dev.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_dev.h</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_devlink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_devlink.c</a></td><td class='right'>481</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_devlink.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_devlink.h</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_ethtool.c</a></td><td class='right'>1835</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_hw_api_cmd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_hw_api_cmd.c</a></td><td class='right'>987</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_hw_api_cmd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_hw_api_cmd.h</a></td><td class='right'>203</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_hw_cmdq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_hw_cmdq.c</a></td><td class='right'>963</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_hw_cmdq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_hw_cmdq.h</a></td><td class='right'>185</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_hw_csr.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_hw_csr.h</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_hw_dev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_hw_dev.c</a></td><td class='right'>1197</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_hw_dev.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_hw_dev.h</a></td><td class='right'>660</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_hw_eqs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_hw_eqs.c</a></td><td class='right'>996</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_hw_eqs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_hw_eqs.h</a></td><td class='right'>262</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_hw_if.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_hw_if.c</a></td><td class='right'>419</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_hw_if.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_hw_if.h</a></td><td class='right'>295</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_hw_io.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_hw_io.c</a></td><td class='right'>634</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_hw_io.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_hw_io.h</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_hw_mbox.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_hw_mbox.c</a></td><td class='right'>1515</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_hw_mbox.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_hw_mbox.h</a></td><td class='right'>172</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_hw_mgmt.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_hw_mgmt.c</a></td><td class='right'>681</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_hw_mgmt.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_hw_mgmt.h</a></td><td class='right'>181</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_hw_qp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_hw_qp.c</a></td><td class='right'>971</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_hw_qp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_hw_qp.h</a></td><td class='right'>232</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_hw_qp_ctxt.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_hw_qp_ctxt.h</a></td><td class='right'>210</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_hw_wq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_hw_wq.c</a></td><td class='right'>904</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_hw_wq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_hw_wq.h</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_hw_wqe.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_hw_wqe.h</a></td><td class='right'>430</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_main.c</a></td><td class='right'>1508</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_port.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_port.c</a></td><td class='right'>1412</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_port.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_port.h</a></td><td class='right'>900</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_rx.c</a></td><td class='right'>631</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_rx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_rx.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_sriov.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_sriov.c</a></td><td class='right'>1364</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_sriov.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_sriov.h</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_tx.c</a></td><td class='right'>932</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic/hinic_tx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic/hinic_tx.h</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/Kconfig</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/Makefile</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_cmdq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_cmdq.c</a></td><td class='right'>915</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_cmdq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_cmdq.h</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_common.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_common.h</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_csr.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_csr.h</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_eqs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_eqs.c</a></td><td class='right'>776</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_eqs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_eqs.h</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_hw_cfg.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_hw_cfg.c</a></td><td class='right'>236</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_hw_cfg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_hw_cfg.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_hw_comm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_hw_comm.c</a></td><td class='right'>426</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_hw_comm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_hw_comm.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_hw_intf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_hw_intf.h</a></td><td class='right'>264</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_hwdev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_hwdev.c</a></td><td class='right'>557</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_hwdev.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_hwdev.h</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_hwif.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_hwif.c</a></td><td class='right'>436</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_hwif.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_hwif.h</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_irq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_irq.c</a></td><td class='right'>194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_lld.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_lld.c</a></td><td class='right'>421</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_lld.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_lld.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_main.c</a></td><td class='right'>409</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_mbox.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_mbox.c</a></td><td class='right'>860</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_mbox.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_mbox.h</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_mgmt.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_mgmt.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_mgmt.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_mgmt.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_mgmt_interface.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_mgmt_interface.h</a></td><td class='right'>224</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_netdev_ops.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_netdev_ops.c</a></td><td class='right'>496</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_nic_cfg.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_nic_cfg.c</a></td><td class='right'>385</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_nic_cfg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_nic_cfg.h</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_nic_dev.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_nic_dev.h</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.c</a></td><td class='right'>885</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_nic_io.h</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_pci_id_tbl.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_pci_id_tbl.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_queue_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_queue_common.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_queue_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_queue_common.h</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_rss.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_rss.c</a></td><td class='right'>336</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_rss.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_rss.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_rx.c</a></td><td class='right'>551</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_rx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_rx.h</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_tx.c</a></td><td class='right'>779</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_tx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_tx.h</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_wq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_wq.c</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/huawei/hinic3/hinic3_wq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/huawei/hinic3/hinic3_wq.h</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/i825xx/82596.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/i825xx/82596.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/i825xx/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/i825xx/Kconfig</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/i825xx/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/i825xx/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/i825xx/ether1.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/i825xx/ether1.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/i825xx/ether1.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/i825xx/ether1.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/i825xx/lasi_82596.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/i825xx/lasi_82596.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/i825xx/lib82596.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/i825xx/lib82596.c</a></td><td class='right'>168</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/i825xx/sni_82596.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/i825xx/sni_82596.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/i825xx/sun3_82586.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/i825xx/sun3_82586.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/i825xx/sun3_82586.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/i825xx/sun3_82586.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ibm/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ibm/Kconfig</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ibm/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ibm/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ibm/ehea/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ibm/ehea/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ibm/ehea/ehea.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ibm/ehea/ehea.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ibm/ehea/ehea_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ibm/ehea/ehea_ethtool.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ibm/ehea/ehea_hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ibm/ehea/ehea_hw.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ibm/ehea/ehea_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ibm/ehea/ehea_main.c</a></td><td class='right'>161</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ibm/ehea/ehea_phyp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ibm/ehea/ehea_phyp.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ibm/ehea/ehea_phyp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ibm/ehea/ehea_phyp.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ibm/ehea/ehea_qmr.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ibm/ehea/ehea_qmr.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ibm/ehea/ehea_qmr.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ibm/ehea/ehea_qmr.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ibm/emac/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ibm/emac/Kconfig</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ibm/emac/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ibm/emac/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ibm/emac/core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ibm/emac/core.c</a></td><td class='right'>794</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ibm/emac/core.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ibm/emac/core.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ibm/emac/debug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ibm/emac/debug.c</a></td><td class='right'>270</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ibm/emac/debug.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ibm/emac/debug.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ibm/emac/emac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ibm/emac/emac.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ibm/emac/mal.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ibm/emac/mal.c</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ibm/emac/mal.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ibm/emac/mal.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ibm/emac/phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ibm/emac/phy.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ibm/emac/phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ibm/emac/phy.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ibm/emac/rgmii.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ibm/emac/rgmii.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ibm/emac/rgmii.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ibm/emac/rgmii.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ibm/emac/tah.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ibm/emac/tah.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ibm/emac/tah.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ibm/emac/tah.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ibm/emac/zmii.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ibm/emac/zmii.c</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ibm/emac/zmii.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ibm/emac/zmii.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ibm/ibmveth.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ibm/ibmveth.c</a></td><td class='right'>1550</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ibm/ibmveth.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ibm/ibmveth.h</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ibm/ibmvnic.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ibm/ibmvnic.c</a></td><td class='right'>6808</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ibm/ibmvnic.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ibm/ibmvnic.h</a></td><td class='right'>1074</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/icplus/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/icplus/Kconfig</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/icplus/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/icplus/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/icplus/ipg.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/icplus/ipg.c</a></td><td class='right'>2300</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/icplus/ipg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/icplus/ipg.h</a></td><td class='right'>748</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/Kconfig</a></td><td class='right'>355</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e100.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/e100.c</a></td><td class='right'>329</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/e1000/Makefile</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000/e1000.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/e1000/e1000.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000/e1000_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/e1000/e1000_ethtool.c</a></td><td class='right'>220</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000/e1000_hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/e1000/e1000_hw.c</a></td><td class='right'>479</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000/e1000_hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/e1000/e1000_hw.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000/e1000_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/e1000/e1000_main.c</a></td><td class='right'>497</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000/e1000_osdep.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/e1000/e1000_osdep.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000/e1000_param.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/e1000/e1000_param.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000e/80003es2lan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/e1000e/80003es2lan.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000e/80003es2lan.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/e1000e/80003es2lan.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000e/82571.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/e1000e/82571.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000e/82571.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/e1000e/82571.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000e/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/e1000e/Makefile</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000e/defines.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/e1000e/defines.h</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000e/e1000.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/e1000e/e1000.h</a></td><td class='right'>216</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000e/e1000e_trace.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/e1000e/e1000e_trace.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000e/ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/e1000e/ethtool.c</a></td><td class='right'>539</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000e/hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/e1000e/hw.h</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000e/ich8lan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/e1000e/ich8lan.c</a></td><td class='right'>674</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000e/ich8lan.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/e1000e/ich8lan.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000e/mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/e1000e/mac.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000e/mac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/e1000e/mac.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000e/manage.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/e1000e/manage.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000e/manage.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/e1000e/manage.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000e/netdev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/e1000e/netdev.c</a></td><td class='right'>1607</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000e/nvm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/e1000e/nvm.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000e/nvm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/e1000e/nvm.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000e/param.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/e1000e/param.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000e/phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/e1000e/phy.c</a></td><td class='right'>269</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000e/phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/e1000e/phy.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000e/ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/e1000e/ptp.c</a></td><td class='right'>200</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/e1000e/regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/e1000e/regs.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/fm10k/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/fm10k/Makefile</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/fm10k/fm10k.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/fm10k/fm10k.h</a></td><td class='right'>252</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/fm10k/fm10k_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/fm10k/fm10k_common.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/fm10k/fm10k_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/fm10k/fm10k_common.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/fm10k/fm10k_dcbnl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/fm10k/fm10k_dcbnl.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/fm10k/fm10k_debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/fm10k/fm10k_debugfs.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/fm10k/fm10k_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/fm10k/fm10k_ethtool.c</a></td><td class='right'>569</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/fm10k/fm10k_iov.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/fm10k/fm10k_iov.c</a></td><td class='right'>319</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/fm10k/fm10k_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/fm10k/fm10k_main.c</a></td><td class='right'>464</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/fm10k/fm10k_mbx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/fm10k/fm10k_mbx.c</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/fm10k/fm10k_mbx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/fm10k/fm10k_mbx.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/fm10k/fm10k_netdev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/fm10k/fm10k_netdev.c</a></td><td class='right'>750</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/fm10k/fm10k_pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/fm10k/fm10k_pci.c</a></td><td class='right'>1294</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/fm10k/fm10k_pf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/fm10k/fm10k_pf.c</a></td><td class='right'>502</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/fm10k/fm10k_pf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/fm10k/fm10k_pf.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/fm10k/fm10k_ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/fm10k/fm10k_ptp.c</a></td><td class='right'>462</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/fm10k/fm10k_tlv.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/fm10k/fm10k_tlv.c</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/fm10k/fm10k_tlv.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/fm10k/fm10k_tlv.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/fm10k/fm10k_type.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/fm10k/fm10k_type.h</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/fm10k/fm10k_vf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/fm10k/fm10k_vf.c</a></td><td class='right'>210</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/fm10k/fm10k_vf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/fm10k/fm10k_vf.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/Makefile</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e.h</a></td><td class='right'>1349</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_adminq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_adminq.c</a></td><td class='right'>611</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_adminq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_adminq.h</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h</a></td><td class='right'>1082</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_alloc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_alloc.h</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_client.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_client.c</a></td><td class='right'>748</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_common.c</a></td><td class='right'>4060</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_dcb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_dcb.c</a></td><td class='right'>1533</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_dcb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_dcb.h</a></td><td class='right'>250</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_dcb_nl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_dcb_nl.c</a></td><td class='right'>823</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_ddp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_ddp.c</a></td><td class='right'>499</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_debug.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_debug.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_debugfs.c</a></td><td class='right'>1355</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_devids.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_devids.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_devlink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_devlink.c</a></td><td class='right'>286</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_devlink.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_devlink.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_diag.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_diag.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_diag.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_diag.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_ethtool.c</a></td><td class='right'>5198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.4%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 90.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_fcoe.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_fcoe.c</a></td><td class='right'>1568</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_fcoe.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_fcoe.h</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_hmc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_hmc.c</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_hmc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_hmc.h</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_io.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_io.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_lan_hmc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_lan_hmc.c</a></td><td class='right'>220</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_lan_hmc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_lan_hmc.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_main.c</a></td><td class='right'>13053</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 16.9%;'/><td class='rem' style='width: 5.9%;'/><td class='none' style='width: 77.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_nvm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_nvm.c</a></td><td class='right'>1355</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_osdep.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_osdep.h</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_prototype.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_prototype.h</a></td><td class='right'>722</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_ptp.c</a></td><td class='right'>1244</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_register.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_register.h</a></td><td class='right'>2703</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 4.5%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_status.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_status.h</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_trace.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_trace.h</a></td><td class='right'>258</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_txrx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_txrx.c</a></td><td class='right'>4066</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_txrx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_txrx.h</a></td><td class='right'>561</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_txrx_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_txrx_common.h</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_type.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_type.h</a></td><td class='right'>811</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_virtchnl.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_virtchnl.h</a></td><td class='right'>362</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c</a></td><td class='right'>4175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 92.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.h</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_xsk.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_xsk.c</a></td><td class='right'>790</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40e/i40e_xsk.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40e/i40e_xsk.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40evf/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40evf/Makefile</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40evf/i40e_adminq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40evf/i40e_adminq.c</a></td><td class='right'>979</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40evf/i40e_adminq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40evf/i40e_adminq.h</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40evf/i40e_adminq_cmd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40evf/i40e_adminq_cmd.h</a></td><td class='right'>2269</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40evf/i40e_alloc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40evf/i40e_alloc.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40evf/i40e_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40evf/i40e_common.c</a></td><td class='right'>636</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40evf/i40e_hmc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40evf/i40e_hmc.h</a></td><td class='right'>236</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40evf/i40e_lan_hmc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40evf/i40e_lan_hmc.h</a></td><td class='right'>181</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40evf/i40e_osdep.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40evf/i40e_osdep.h</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40evf/i40e_prototype.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40evf/i40e_prototype.h</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40evf/i40e_register.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40evf/i40e_register.h</a></td><td class='right'>3369</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.9%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40evf/i40e_status.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40evf/i40e_status.h</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40evf/i40e_txrx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40evf/i40e_txrx.c</a></td><td class='right'>1995</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.5%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40evf/i40e_txrx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40evf/i40e_txrx.h</a></td><td class='right'>301</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40evf/i40e_type.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40evf/i40e_type.h</a></td><td class='right'>1251</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40evf/i40e_virtchnl.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40evf/i40e_virtchnl.h</a></td><td class='right'>362</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40evf/i40evf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40evf/i40evf.h</a></td><td class='right'>299</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40evf/i40evf_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40evf/i40evf_ethtool.c</a></td><td class='right'>724</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40evf/i40evf_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40evf/i40evf_main.c</a></td><td class='right'>2545</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.5%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/i40evf/i40evf_virtchnl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/i40evf/i40evf_virtchnl.c</a></td><td class='right'>759</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/iavf/Makefile</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/iavf/iavf.h</a></td><td class='right'>630</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_adminq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/iavf/iavf_adminq.c</a></td><td class='right'>922</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_adminq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/iavf/iavf_adminq.h</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_adminq_cmd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/iavf/iavf_adminq_cmd.h</a></td><td class='right'>449</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_adv_rss.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/iavf/iavf_adv_rss.c</a></td><td class='right'>295</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_adv_rss.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/iavf/iavf_adv_rss.h</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_alloc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/iavf/iavf_alloc.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/iavf/iavf_common.c</a></td><td class='right'>452</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_devids.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/iavf/iavf_devids.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/iavf/iavf_ethtool.c</a></td><td class='right'>1900</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_fdir.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/iavf/iavf_fdir.c</a></td><td class='right'>927</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_fdir.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/iavf/iavf_fdir.h</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/iavf/iavf_main.c</a></td><td class='right'>5721</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_osdep.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/iavf/iavf_osdep.h</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_prototype.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/iavf/iavf_prototype.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/iavf/iavf_ptp.c</a></td><td class='right'>492</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_ptp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/iavf/iavf_ptp.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_register.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/iavf/iavf_register.h</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_status.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/iavf/iavf_status.h</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_trace.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/iavf/iavf_trace.h</a></td><td class='right'>209</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_txrx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/iavf/iavf_txrx.c</a></td><td class='right'>2407</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_txrx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/iavf/iavf_txrx.h</a></td><td class='right'>392</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_type.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/iavf/iavf_type.h</a></td><td class='right'>530</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_types.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/iavf/iavf_types.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/iavf/iavf_virtchnl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/iavf/iavf_virtchnl.c</a></td><td class='right'>2959</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/Makefile</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/devlink/devlink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/devlink/devlink.c</a></td><td class='right'>2109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/devlink/devlink.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/devlink/devlink.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/devlink/health.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/devlink/health.c</a></td><td class='right'>551</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/devlink/health.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/devlink/health.h</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/devlink/port.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/devlink/port.c</a></td><td class='right'>1001</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/devlink/port.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/devlink/port.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice.h</a></td><td class='right'>1137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_adapter.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_adapter.c</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_adapter.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_adapter.h</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_adminq_cmd.h</a></td><td class='right'>2687</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_arfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_arfs.c</a></td><td class='right'>673</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_arfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_arfs.h</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_base.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_base.c</a></td><td class='right'>1542</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_base.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_base.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_common.c</a></td><td class='right'>6593</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_common.h</a></td><td class='right'>364</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_controlq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_controlq.c</a></td><td class='right'>1261</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_controlq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_controlq.h</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_dcb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_dcb.c</a></td><td class='right'>1641</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_dcb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_dcb.h</a></td><td class='right'>200</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_dcb_lib.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_dcb_lib.c</a></td><td class='right'>1131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_dcb_lib.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_dcb_lib.h</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_dcb_nl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_dcb_nl.c</a></td><td class='right'>1146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_dcb_nl.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_dcb_nl.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_ddp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_ddp.c</a></td><td class='right'>2547</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_ddp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_ddp.h</a></td><td class='right'>475</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_debugfs.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_devids.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_devids.h</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_dpll.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_dpll.c</a></td><td class='right'>3830</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_dpll.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_dpll.h</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_eswitch.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_eswitch.c</a></td><td class='right'>635</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_eswitch.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_eswitch.h</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_eswitch_br.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_eswitch_br.c</a></td><td class='right'>1355</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_eswitch_br.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_eswitch_br.h</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_ethtool.c</a></td><td class='right'>4948</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_ethtool.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_ethtool.h</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_ethtool_fdir.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_ethtool_fdir.c</a></td><td class='right'>2080</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_fdir.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_fdir.c</a></td><td class='right'>1298</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_fdir.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_fdir.h</a></td><td class='right'>233</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_flex_pipe.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_flex_pipe.c</a></td><td class='right'>4385</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_flex_pipe.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_flex_pipe.h</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_flex_type.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_flex_type.h</a></td><td class='right'>393</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_flow.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_flow.c</a></td><td class='right'>3015</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_flow.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_flow.h</a></td><td class='right'>533</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_fltr.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_fltr.c</a></td><td class='right'>481</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_fltr.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_fltr.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_fw_update.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_fw_update.c</a></td><td class='right'>1069</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_fw_update.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_fw_update.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_gnss.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_gnss.c</a></td><td class='right'>403</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_gnss.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_gnss.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_hw_autogen.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_hw_autogen.h</a></td><td class='right'>581</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_hwmon.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_hwmon.c</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_hwmon.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_hwmon.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_idc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_idc.c</a></td><td class='right'>440</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_idc_int.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_idc_int.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_irq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_irq.c</a></td><td class='right'>275</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_irq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_irq.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_lag.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_lag.c</a></td><td class='right'>2784</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_lag.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_lag.h</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_lan_tx_rx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_lan_tx_rx.h</a></td><td class='right'>616</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_lib.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_lib.c</a></td><td class='right'>4057</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_lib.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_lib.h</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_main.c</a></td><td class='right'>9791</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 17.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 82.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_nvm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_nvm.c</a></td><td class='right'>1339</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_nvm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_nvm.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_osdep.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_osdep.h</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_parser.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_parser.c</a></td><td class='right'>2430</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_parser.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_parser.h</a></td><td class='right'>538</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_parser_rt.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_parser_rt.c</a></td><td class='right'>859</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_pf_vsi_vlan_ops.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_pf_vsi_vlan_ops.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_pf_vsi_vlan_ops.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_pf_vsi_vlan_ops.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_protocol_type.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_protocol_type.h</a></td><td class='right'>485</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_ptp.c</a></td><td class='right'>3341</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_ptp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_ptp.h</a></td><td class='right'>391</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_ptp_consts.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_ptp_consts.h</a></td><td class='right'>558</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_ptp_hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_ptp_hw.c</a></td><td class='right'>5968</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_ptp_hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_ptp_hw.h</a></td><td class='right'>786</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_repr.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_repr.c</a></td><td class='right'>549</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_repr.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_repr.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_sbq_cmd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_sbq_cmd.h</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_sched.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_sched.c</a></td><td class='right'>4447</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_sched.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_sched.h</a></td><td class='right'>179</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_sf_eth.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_sf_eth.c</a></td><td class='right'>329</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_sf_eth.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_sf_eth.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_sf_vsi_vlan_ops.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_sf_vsi_vlan_ops.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_sf_vsi_vlan_ops.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_sf_vsi_vlan_ops.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_sriov.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_sriov.c</a></td><td class='right'>1827</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_sriov.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_sriov.h</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_switch.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_switch.c</a></td><td class='right'>6656</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_switch.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_switch.h</a></td><td class='right'>421</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_tc_lib.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_tc_lib.c</a></td><td class='right'>2349</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_tc_lib.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_tc_lib.h</a></td><td class='right'>233</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_trace.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_trace.h</a></td><td class='right'>364</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_tspll.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_tspll.c</a></td><td class='right'>626</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_tspll.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_tspll.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_txrx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_txrx.c</a></td><td class='right'>2394</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_txrx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_txrx.h</a></td><td class='right'>426</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_txrx_lib.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_txrx_lib.c</a></td><td class='right'>604</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_txrx_lib.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_txrx_lib.h</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_type.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_type.h</a></td><td class='right'>1227</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_vf_lib.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_vf_lib.c</a></td><td class='right'>1419</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_vf_lib.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_vf_lib.h</a></td><td class='right'>400</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_vf_lib_private.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_vf_lib_private.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_vf_mbx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_vf_mbx.c</a></td><td class='right'>412</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_vf_mbx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_vf_mbx.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_vf_vsi_vlan_ops.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_vf_vsi_vlan_ops.c</a></td><td class='right'>248</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_vf_vsi_vlan_ops.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_vf_vsi_vlan_ops.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_vlan.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_vlan.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_vlan_mode.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_vlan_mode.c</a></td><td class='right'>438</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_vlan_mode.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_vlan_mode.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_vsi_vlan_lib.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_vsi_vlan_lib.c</a></td><td class='right'>846</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_vsi_vlan_lib.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_vsi_vlan_lib.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_vsi_vlan_ops.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_vsi_vlan_ops.c</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_vsi_vlan_ops.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_vsi_vlan_ops.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_xsk.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_xsk.c</a></td><td class='right'>939</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/ice_xsk.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/ice_xsk.h</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/virt/allowlist.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/virt/allowlist.c</a></td><td class='right'>199</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/virt/allowlist.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/virt/allowlist.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/virt/fdir.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/virt/fdir.c</a></td><td class='right'>2434</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/virt/fdir.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/virt/fdir.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/virt/queues.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/virt/queues.c</a></td><td class='right'>975</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/virt/queues.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/virt/queues.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/virt/rss.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/virt/rss.c</a></td><td class='right'>1922</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/virt/rss.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/virt/rss.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/virt/virtchnl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/virt/virtchnl.c</a></td><td class='right'>2936</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ice/virt/virtchnl.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ice/virt/virtchnl.h</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/idpf/Kconfig</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/idpf/Makefile</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/idpf/idpf.h</a></td><td class='right'>1036</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_controlq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/idpf/idpf_controlq.c</a></td><td class='right'>623</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_controlq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/idpf/idpf_controlq.h</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_controlq_api.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/idpf/idpf_controlq_api.h</a></td><td class='right'>177</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_controlq_setup.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/idpf/idpf_controlq_setup.c</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_dev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/idpf/idpf_dev.c</a></td><td class='right'>215</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_devids.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/idpf/idpf_devids.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/idpf/idpf_ethtool.c</a></td><td class='right'>1799</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_idc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/idpf/idpf_idc.c</a></td><td class='right'>503</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_lan_pf_regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/idpf/idpf_lan_pf_regs.h</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_lan_txrx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/idpf/idpf_lan_txrx.h</a></td><td class='right'>310</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_lan_vf_regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/idpf/idpf_lan_vf_regs.h</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_lib.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/idpf/idpf_lib.c</a></td><td class='right'>2623</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/idpf/idpf_main.c</a></td><td class='right'>392</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_mem.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/idpf/idpf_mem.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/idpf/idpf_ptp.c</a></td><td class='right'>1021</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_ptp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/idpf/idpf_ptp.h</a></td><td class='right'>379</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_singleq_txrx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/idpf/idpf_singleq_txrx.c</a></td><td class='right'>1183</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_txrx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/idpf/idpf_txrx.c</a></td><td class='right'>4706</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_txrx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/idpf/idpf_txrx.h</a></td><td class='right'>1118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_vf_dev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/idpf/idpf_vf_dev.c</a></td><td class='right'>200</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_virtchnl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/idpf/idpf_virtchnl.c</a></td><td class='right'>4370</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_virtchnl.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/idpf/idpf_virtchnl.h</a></td><td class='right'>189</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/idpf_virtchnl_ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/idpf/idpf_virtchnl_ptp.c</a></td><td class='right'>673</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/virtchnl2.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/idpf/virtchnl2.h</a></td><td class='right'>1813</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/virtchnl2_lan_desc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/idpf/virtchnl2_lan_desc.h</a></td><td class='right'>451</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/xdp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/idpf/xdp.c</a></td><td class='right'>486</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/xdp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/idpf/xdp.h</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/xsk.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/idpf/xsk.c</a></td><td class='right'>633</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/idpf/xsk.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/idpf/xsk.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igb/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igb/Makefile</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igb/e1000_82575.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igb/e1000_82575.c</a></td><td class='right'>194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igb/e1000_82575.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igb/e1000_82575.h</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igb/e1000_defines.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igb/e1000_defines.h</a></td><td class='right'>220</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igb/e1000_hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igb/e1000_hw.h</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igb/e1000_i210.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igb/e1000_i210.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igb/e1000_i210.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igb/e1000_i210.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igb/e1000_mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igb/e1000_mac.c</a></td><td class='right'>311</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igb/e1000_mac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igb/e1000_mac.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igb/e1000_mbx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igb/e1000_mbx.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igb/e1000_mbx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igb/e1000_mbx.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igb/e1000_nvm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igb/e1000_nvm.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igb/e1000_nvm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igb/e1000_nvm.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igb/e1000_phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igb/e1000_phy.c</a></td><td class='right'>387</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igb/e1000_phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igb/e1000_phy.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igb/e1000_regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igb/e1000_regs.h</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igb/igb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igb/igb.h</a></td><td class='right'>406</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igb/igb_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igb/igb_ethtool.c</a></td><td class='right'>1088</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igb/igb_hwmon.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igb/igb_hwmon.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igb/igb_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igb/igb_main.c</a></td><td class='right'>4923</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.2%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 91.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igb/igb_ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igb/igb_ptp.c</a></td><td class='right'>738</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igb/igb_xsk.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igb/igb_xsk.c</a></td><td class='right'>562</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igbvf/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igbvf/Makefile</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igbvf/defines.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igbvf/defines.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igbvf/ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igbvf/ethtool.c</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igbvf/igbvf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igbvf/igbvf.h</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igbvf/mbx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igbvf/mbx.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igbvf/mbx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igbvf/mbx.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igbvf/netdev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igbvf/netdev.c</a></td><td class='right'>702</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igbvf/regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igbvf/regs.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igbvf/vf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igbvf/vf.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igbvf/vf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igbvf/vf.h</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igc/Makefile</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igc/igc.h</a></td><td class='right'>801</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_base.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igc/igc_base.c</a></td><td class='right'>452</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_base.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igc/igc_base.h</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_defines.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igc/igc_defines.h</a></td><td class='right'>767</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_diag.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igc/igc_diag.c</a></td><td class='right'>185</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_diag.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igc/igc_diag.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_dump.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igc/igc_dump.c</a></td><td class='right'>318</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igc/igc_ethtool.c</a></td><td class='right'>2201</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igc/igc_hw.h</a></td><td class='right'>282</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_i225.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igc/igc_i225.c</a></td><td class='right'>641</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_i225.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igc/igc_i225.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_leds.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igc/igc_leds.c</a></td><td class='right'>302</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igc/igc_mac.c</a></td><td class='right'>871</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_mac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igc/igc_mac.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igc/igc_main.c</a></td><td class='right'>7852</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_nvm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igc/igc_nvm.c</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_nvm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igc/igc_nvm.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igc/igc_phy.c</a></td><td class='right'>780</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igc/igc_phy.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igc/igc_ptp.c</a></td><td class='right'>1345</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igc/igc_regs.h</a></td><td class='right'>367</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_tsn.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igc/igc_tsn.c</a></td><td class='right'>722</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_tsn.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igc/igc_tsn.h</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_xdp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igc/igc_xdp.c</a></td><td class='right'>164</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/igc/igc_xdp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/igc/igc_xdp.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgb/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgb/Makefile</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgb/ixgb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgb/ixgb.h</a></td><td class='right'>206</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgb/ixgb_ee.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgb/ixgb_ee.c</a></td><td class='right'>605</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgb/ixgb_ee.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgb/ixgb_ee.h</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgb/ixgb_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgb/ixgb_ethtool.c</a></td><td class='right'>660</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgb/ixgb_hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgb/ixgb_hw.c</a></td><td class='right'>1263</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgb/ixgb_hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgb/ixgb_hw.h</a></td><td class='right'>792</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgb/ixgb_ids.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgb/ixgb_ids.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgb/ixgb_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgb/ixgb_main.c</a></td><td class='right'>2368</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.1%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgb/ixgb_osdep.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgb/ixgb_osdep.h</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgb/ixgb_param.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgb/ixgb_param.c</a></td><td class='right'>469</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/Makefile</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/devlink/devlink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/devlink/devlink.c</a></td><td class='right'>558</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/devlink/devlink.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/devlink/devlink.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/devlink/region.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/devlink/region.c</a></td><td class='right'>290</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe.h</a></td><td class='right'>702</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c</a></td><td class='right'>200</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c</a></td><td class='right'>623</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_common.c</a></td><td class='right'>1541</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_common.h</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82598.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82598.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82598.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82598.h</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.h</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_debugfs.c</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_e610.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_e610.c</a></td><td class='right'>4043</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_e610.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_e610.h</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c</a></td><td class='right'>1438</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_fw_update.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_fw_update.c</a></td><td class='right'>707</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_fw_update.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_fw_update.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_ipsec.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_ipsec.c</a></td><td class='right'>1291</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_ipsec.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_ipsec.h</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c</a></td><td class='right'>293</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_main.c</a></td><td class='right'>7063</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.0%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 87.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.c</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.h</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_model.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_model.h</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c</a></td><td class='right'>1331</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c</a></td><td class='right'>1079</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c</a></td><td class='right'>1273</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_sysfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_sysfs.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_txrx_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_txrx_common.h</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_type.h</a></td><td class='right'>1024</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_type_e610.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_type_e610.h</a></td><td class='right'>1032</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c</a></td><td class='right'>329</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_x540.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_x540.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c</a></td><td class='right'>3159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_x550.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_x550.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbe/ixgbe_xsk.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbe/ixgbe_xsk.c</a></td><td class='right'>566</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbevf/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbevf/Makefile</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbevf/defines.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbevf/defines.h</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbevf/ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbevf/ethtool.c</a></td><td class='right'>480</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbevf/ipsec.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbevf/ipsec.c</a></td><td class='right'>684</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbevf/ipsec.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbevf/ipsec.h</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbevf/ixgbevf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbevf/ixgbevf.h</a></td><td class='right'>395</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c</a></td><td class='right'>2555</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbevf/mbx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbevf/mbx.c</a></td><td class='right'>349</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbevf/mbx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbevf/mbx.h</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbevf/regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbevf/regs.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbevf/vf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbevf/vf.c</a></td><td class='right'>680</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/ixgbevf/vf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/ixgbevf/vf.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/libeth/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/libeth/Kconfig</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/libeth/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/libeth/Makefile</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/libeth/priv.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/libeth/priv.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/libeth/rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/libeth/rx.c</a></td><td class='right'>273</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/libeth/tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/libeth/tx.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/libeth/xdp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/libeth/xdp.c</a></td><td class='right'>451</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/libeth/xsk.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/libeth/xsk.c</a></td><td class='right'>271</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/libie/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/libie/Kconfig</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/libie/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/libie/Makefile</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/libie/adminq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/libie/adminq.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/libie/fwlog.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/libie/fwlog.c</a></td><td class='right'>1115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/intel/libie/rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/intel/libie/rx.c</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/jme.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/jme.c</a></td><td class='right'>351</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/jme.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/jme.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/korina.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/korina.c</a></td><td class='right'>877</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/lantiq_etop.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/lantiq_etop.c</a></td><td class='right'>291</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/lantiq_xrx200.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/lantiq_xrx200.c</a></td><td class='right'>683</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/litex/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/litex/Kconfig</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/litex/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/litex/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/litex/litex_liteeth.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/litex/litex_liteeth.c</a></td><td class='right'>322</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/Kconfig</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/mv643xx_eth.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/mv643xx_eth.c</a></td><td class='right'>596</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/mvmdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/mvmdio.c</a></td><td class='right'>371</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/mvneta.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/mvneta.c</a></td><td class='right'>4108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 92.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/mvneta_bm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/mvneta_bm.c</a></td><td class='right'>499</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/mvneta_bm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/mvneta_bm.h</a></td><td class='right'>192</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/mvpp2.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/mvpp2.c</a></td><td class='right'>6525</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 11.4%;'/><td class='none' style='width: 88.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/mvpp2/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/mvpp2/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/mvpp2/mvpp2.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/mvpp2/mvpp2.h</a></td><td class='right'>1578</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c</a></td><td class='right'>1740</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.h</a></td><td class='right'>316</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/mvpp2/mvpp2_debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/mvpp2/mvpp2_debugfs.c</a></td><td class='right'>734</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c</a></td><td class='right'>7905</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c</a></td><td class='right'>2588</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.h</a></td><td class='right'>335</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/mvpp2/mvpp2_tai.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/mvpp2/mvpp2_tai.c</a></td><td class='right'>457</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeon_ep/Kconfig</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeon_ep/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep/octep_cn9k_pf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeon_ep/octep_cn9k_pf.c</a></td><td class='right'>897</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep/octep_cnxk_pf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeon_ep/octep_cnxk_pf.c</a></td><td class='right'>925</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep/octep_config.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeon_ep/octep_config.h</a></td><td class='right'>252</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep/octep_cp_version.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeon_ep/octep_cp_version.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep/octep_ctrl_mbox.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeon_ep/octep_ctrl_mbox.c</a></td><td class='right'>279</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep/octep_ctrl_mbox.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeon_ep/octep_ctrl_mbox.h</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep/octep_ctrl_net.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeon_ep/octep_ctrl_net.c</a></td><td class='right'>448</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep/octep_ctrl_net.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeon_ep/octep_ctrl_net.h</a></td><td class='right'>430</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep/octep_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeon_ep/octep_ethtool.c</a></td><td class='right'>463</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep/octep_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeon_ep/octep_main.c</a></td><td class='right'>1693</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep/octep_main.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeon_ep/octep_main.h</a></td><td class='right'>414</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep/octep_pfvf_mbox.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeon_ep/octep_pfvf_mbox.c</a></td><td class='right'>472</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep/octep_pfvf_mbox.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeon_ep/octep_pfvf_mbox.h</a></td><td class='right'>169</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep/octep_regs_cn9k_pf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeon_ep/octep_regs_cn9k_pf.h</a></td><td class='right'>390</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep/octep_regs_cnxk_pf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeon_ep/octep_regs_cnxk_pf.h</a></td><td class='right'>416</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep/octep_rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeon_ep/octep_rx.c</a></td><td class='right'>547</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep/octep_rx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeon_ep/octep_rx.h</a></td><td class='right'>224</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep/octep_tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeon_ep/octep_tx.c</a></td><td class='right'>332</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep/octep_tx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeon_ep/octep_tx.h</a></td><td class='right'>317</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep_vf/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeon_ep_vf/Kconfig</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep_vf/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeon_ep_vf/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_cn9k.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_cn9k.c</a></td><td class='right'>489</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_cnxk.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_cnxk.c</a></td><td class='right'>500</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_config.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_config.h</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_ethtool.c</a></td><td class='right'>269</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.c</a></td><td class='right'>1220</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.h</a></td><td class='right'>338</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_mbox.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_mbox.c</a></td><td class='right'>431</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_mbox.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_mbox.h</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_regs_cn9k.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_regs_cn9k.h</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_regs_cnxk.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_regs_cnxk.h</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_rx.c</a></td><td class='right'>511</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_rx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_rx.h</a></td><td class='right'>224</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_tx.c</a></td><td class='right'>331</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_tx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_tx.h</a></td><td class='right'>276</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/Kconfig</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/Makefile</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/cgx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/cgx.c</a></td><td class='right'>2060</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/cgx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/cgx.h</a></td><td class='right'>190</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/cgx_fw_if.h</a></td><td class='right'>295</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/cn20k/api.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/cn20k/api.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.c</a></td><td class='right'>218</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/cn20k/debugfs.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/cn20k/mbox_init.c</a></td><td class='right'>424</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/cn20k/nix.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/cn20k/nix.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/cn20k/npa.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/cn20k/npa.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/cn20k/reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/cn20k/reg.h</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/cn20k/struct.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/cn20k/struct.h</a></td><td class='right'>380</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/common.h</a></td><td class='right'>243</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/lmac_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/lmac_common.h</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/mbox.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/mbox.c</a></td><td class='right'>569</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/mbox.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/mbox.h</a></td><td class='right'>2483</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/mcs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/mcs.c</a></td><td class='right'>1617</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/mcs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/mcs.h</a></td><td class='right'>246</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/mcs_cnf10kb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/mcs_cnf10kb.c</a></td><td class='right'>277</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/mcs_reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/mcs_reg.h</a></td><td class='right'>1129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c</a></td><td class='right'>932</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/npc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/npc.h</a></td><td class='right'>648</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/npc_profile.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/npc_profile.h</a></td><td class='right'>15759</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 27.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 72.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/ptp.c</a></td><td class='right'>676</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/ptp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/ptp.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rpm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/rpm.c</a></td><td class='right'>812</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rpm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/rpm.h</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/rvu.c</a></td><td class='right'>3642</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/rvu.h</a></td><td class='right'>1187</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c</a></td><td class='right'>1354</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c</a></td><td class='right'>584</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c</a></td><td class='right'>1319</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c</a></td><td class='right'>4038</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c</a></td><td class='right'>1637</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.h</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c</a></td><td class='right'>6652</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c</a></td><td class='right'>614</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c</a></td><td class='right'>3608</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c</a></td><td class='right'>1818</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.c</a></td><td class='right'>2036</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_hash.h</a></td><td class='right'>237</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h</a></td><td class='right'>754</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c</a></td><td class='right'>469</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/rvu_sdp.c</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h</a></td><td class='right'>879</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/rvu_switch.c</a></td><td class='right'>294</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_trace.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/rvu_trace.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/af/rvu_trace.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/af/rvu_trace.h</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/nic/Makefile</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/cn10k.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/nic/cn10k.c</a></td><td class='right'>520</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/cn10k.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/nic/cn10k.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/cn10k_ipsec.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/nic/cn10k_ipsec.c</a></td><td class='right'>1042</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/cn10k_ipsec.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/nic/cn10k_ipsec.h</a></td><td class='right'>265</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/nic/cn10k_macsec.c</a></td><td class='right'>1815</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/cn20k.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/nic/cn20k.c</a></td><td class='right'>450</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/cn20k.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/nic/cn20k.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c</a></td><td class='right'>2158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h</a></td><td class='right'>1224</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_dcbnl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_dcbnl.c</a></td><td class='right'>489</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_devlink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_devlink.c</a></td><td class='right'>244</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_devlink.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_devlink.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_dmac_flt.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_dmac_flt.c</a></td><td class='right'>218</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c</a></td><td class='right'>1482</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c</a></td><td class='right'>1526</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c</a></td><td class='right'>3566</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_ptp.c</a></td><td class='right'>524</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_ptp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_ptp.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_reg.h</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_struct.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_struct.h</a></td><td class='right'>341</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c</a></td><td class='right'>1670</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.c</a></td><td class='right'>1584</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.h</a></td><td class='right'>191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_vf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_vf.c</a></td><td class='right'>884</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_xsk.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_xsk.c</a></td><td class='right'>245</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/otx2_xsk.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/nic/otx2_xsk.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/qos.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/nic/qos.c</a></td><td class='right'>1774</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/qos.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/nic/qos.h</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/qos_sq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/nic/qos_sq.c</a></td><td class='right'>319</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/rep.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/nic/rep.c</a></td><td class='right'>879</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/octeontx2/nic/rep.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/octeontx2/nic/rep.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/prestera/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/prestera/Kconfig</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/prestera/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/prestera/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/prestera/prestera.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/prestera/prestera.h</a></td><td class='right'>417</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/prestera/prestera_acl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/prestera/prestera_acl.c</a></td><td class='right'>927</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/prestera/prestera_acl.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/prestera/prestera_acl.h</a></td><td class='right'>209</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/prestera/prestera_counter.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/prestera/prestera_counter.c</a></td><td class='right'>474</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/prestera/prestera_counter.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/prestera/prestera_counter.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/prestera/prestera_devlink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/prestera/prestera_devlink.c</a></td><td class='right'>598</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/prestera/prestera_devlink.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/prestera/prestera_devlink.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/prestera/prestera_dsa.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/prestera/prestera_dsa.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/prestera/prestera_dsa.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/prestera/prestera_dsa.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/prestera/prestera_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/prestera/prestera_ethtool.c</a></td><td class='right'>802</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/prestera/prestera_ethtool.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/prestera/prestera_ethtool.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/prestera/prestera_flow.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/prestera/prestera_flow.c</a></td><td class='right'>315</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/prestera/prestera_flow.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/prestera/prestera_flow.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/prestera/prestera_flower.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/prestera/prestera_flower.c</a></td><td class='right'>585</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/prestera/prestera_flower.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/prestera/prestera_flower.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/prestera/prestera_hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/prestera/prestera_hw.c</a></td><td class='right'>2552</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/prestera/prestera_hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/prestera/prestera_hw.h</a></td><td class='right'>330</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/prestera/prestera_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/prestera/prestera_main.c</a></td><td class='right'>1526</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/prestera/prestera_matchall.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/prestera/prestera_matchall.c</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/prestera/prestera_matchall.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/prestera/prestera_matchall.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/prestera/prestera_pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/prestera/prestera_pci.c</a></td><td class='right'>979</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/prestera/prestera_router.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/prestera/prestera_router.c</a></td><td class='right'>1645</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/prestera/prestera_router_hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/prestera/prestera_router_hw.c</a></td><td class='right'>688</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/prestera/prestera_router_hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/prestera/prestera_router_hw.h</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/prestera/prestera_rxtx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/prestera/prestera_rxtx.c</a></td><td class='right'>829</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/prestera/prestera_rxtx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/prestera/prestera_rxtx.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/prestera/prestera_span.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/prestera/prestera_span.c</a></td><td class='right'>191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/prestera/prestera_span.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/prestera/prestera_span.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/prestera/prestera_switchdev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/prestera/prestera_switchdev.c</a></td><td class='right'>1918</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/prestera/prestera_switchdev.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/prestera/prestera_switchdev.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/pxa168_eth.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/pxa168_eth.c</a></td><td class='right'>270</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/skge.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/skge.c</a></td><td class='right'>317</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/skge.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/skge.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/sky2.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/sky2.c</a></td><td class='right'>621</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/marvell/sky2.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/marvell/sky2.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mediatek/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mediatek/Kconfig</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mediatek/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mediatek/Makefile</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mediatek/mtk_eth_path.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mediatek/mtk_eth_path.c</a></td><td class='right'>330</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mediatek/mtk_eth_soc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mediatek/mtk_eth_soc.c</a></td><td class='right'>5621</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mediatek/mtk_eth_soc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mediatek/mtk_eth_soc.h</a></td><td class='right'>1519</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mediatek/mtk_ppe.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mediatek/mtk_ppe.c</a></td><td class='right'>1110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mediatek/mtk_ppe.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mediatek/mtk_ppe.h</a></td><td class='right'>406</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mediatek/mtk_ppe_debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mediatek/mtk_ppe_debugfs.c</a></td><td class='right'>195</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mediatek/mtk_ppe_offload.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mediatek/mtk_ppe_offload.c</a></td><td class='right'>658</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mediatek/mtk_ppe_regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mediatek/mtk_ppe_regs.h</a></td><td class='right'>174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mediatek/mtk_star_emac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mediatek/mtk_star_emac.c</a></td><td class='right'>1761</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mediatek/mtk_wed.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mediatek/mtk_wed.c</a></td><td class='right'>2902</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mediatek/mtk_wed.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mediatek/mtk_wed.h</a></td><td class='right'>226</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mediatek/mtk_wed_debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mediatek/mtk_wed_debugfs.c</a></td><td class='right'>637</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mediatek/mtk_wed_mcu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mediatek/mtk_wed_mcu.c</a></td><td class='right'>407</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mediatek/mtk_wed_ops.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mediatek/mtk_wed_ops.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mediatek/mtk_wed_regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mediatek/mtk_wed_regs.h</a></td><td class='right'>815</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mediatek/mtk_wed_wo.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mediatek/mtk_wed_wo.c</a></td><td class='right'>491</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mediatek/mtk_wed_wo.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mediatek/mtk_wed_wo.h</a></td><td class='right'>283</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/Kconfig</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/alloc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/alloc.c</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/catas.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/catas.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/cmd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/cmd.c</a></td><td class='right'>328</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/cq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/cq.c</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/crdump.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/crdump.c</a></td><td class='right'>258</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/en_clock.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/en_clock.c</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/en_cq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/en_cq.c</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/en_dcb_nl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/en_dcb_nl.c</a></td><td class='right'>328</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/en_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/en_ethtool.c</a></td><td class='right'>898</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/en_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/en_main.c</a></td><td class='right'>194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/en_netdev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/en_netdev.c</a></td><td class='right'>1570</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/en_port.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/en_port.c</a></td><td class='right'>199</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/en_port.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/en_port.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/en_resources.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/en_resources.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/en_rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/en_rx.c</a></td><td class='right'>1085</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/en_selftest.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/en_selftest.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/en_tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/en_tx.c</a></td><td class='right'>823</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/eq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/eq.c</a></td><td class='right'>195</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/fw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/fw.c</a></td><td class='right'>479</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/fw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/fw.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/fw_qos.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/fw_qos.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/fw_qos.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/fw_qos.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/icm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/icm.c</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/icm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/icm.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/intf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/intf.c</a></td><td class='right'>380</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/main.c</a></td><td class='right'>1529</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/mcg.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/mcg.c</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/mlx4.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/mlx4.h</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/mlx4_en.h</a></td><td class='right'>411</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/mlx4_stats.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/mlx4_stats.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/mr.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/mr.c</a></td><td class='right'>224</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/pd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/pd.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/port.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/port.c</a></td><td class='right'>936</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/profile.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/profile.c</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/qp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/qp.c</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/resource_tracker.c</a></td><td class='right'>572</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx4/srq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx4/srq.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/Kconfig</a></td><td class='right'>218</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/Makefile</a></td><td class='right'>184</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/alloc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/alloc.c</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/cmd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/cmd.c</a></td><td class='right'>2290</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/cq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/cq.c</a></td><td class='right'>296</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/debugfs.c</a></td><td class='right'>361</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/dev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/dev.c</a></td><td class='right'>577</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/devlink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/devlink.c</a></td><td class='right'>1049</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/devlink.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/devlink.h</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/diag/cmd_tracepoint.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/diag/cmd_tracepoint.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/diag/crdump.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/diag/crdump.c</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/diag/en_rep_tracepoint.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/diag/en_rep_tracepoint.h</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/diag/en_tc_tracepoint.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/diag/en_tc_tracepoint.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/diag/en_tc_tracepoint.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/diag/en_tc_tracepoint.h</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.c</a></td><td class='right'>299</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/diag/fs_tracepoint.h</a></td><td class='right'>323</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/diag/fw_tracer.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/diag/fw_tracer.c</a></td><td class='right'>1190</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/diag/fw_tracer.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/diag/fw_tracer.h</a></td><td class='right'>205</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/diag/fw_tracer_tracepoint.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/diag/fw_tracer_tracepoint.h</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/diag/reporter_vnic.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/diag/reporter_vnic.c</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/diag/reporter_vnic.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/diag/reporter_vnic.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/diag/rsc_dump.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/diag/rsc_dump.c</a></td><td class='right'>311</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/diag/rsc_dump.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/diag/rsc_dump.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/dpll.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/dpll.c</a></td><td class='right'>552</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/ecpf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/ecpf.c</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/ecpf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/ecpf.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en.h</a></td><td class='right'>1433</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/channels.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/channels.c</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/channels.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/channels.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/dcbnl.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/dcbnl.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/devlink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/devlink.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/devlink.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/devlink.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/dim.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/dim.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/fs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/fs.h</a></td><td class='right'>228</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/fs_ethtool.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/fs_ethtool.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/fs_tt_redirect.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/fs_tt_redirect.c</a></td><td class='right'>615</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/fs_tt_redirect.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/fs_tt_redirect.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/health.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/health.c</a></td><td class='right'>238</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/health.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/health.h</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/htb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/htb.c</a></td><td class='right'>722</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/htb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/htb.h</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/hv_vhca_stats.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/hv_vhca_stats.c</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/hv_vhca_stats.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/hv_vhca_stats.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/mapping.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/mapping.c</a></td><td class='right'>268</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/mapping.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/mapping.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/mod_hdr.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/mod_hdr.c</a></td><td class='right'>216</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/mod_hdr.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/mod_hdr.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/monitor_stats.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/monitor_stats.c</a></td><td class='right'>169</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/monitor_stats.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/monitor_stats.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/params.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/params.c</a></td><td class='right'>1266</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/params.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/params.h</a></td><td class='right'>161</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/pcie_cong_event.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/pcie_cong_event.c</a></td><td class='right'>376</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/pcie_cong_event.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/pcie_cong_event.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/port.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/port.c</a></td><td class='right'>602</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/port.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/port.h</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/port_buffer.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/port_buffer.c</a></td><td class='right'>592</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/port_buffer.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/port_buffer.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/ptp.c</a></td><td class='right'>1049</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/ptp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/ptp.h</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/qos.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/qos.c</a></td><td class='right'>536</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/qos.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/qos.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/rep/bond.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/rep/bond.c</a></td><td class='right'>351</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/rep/bridge.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/rep/bridge.c</a></td><td class='right'>594</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/rep/bridge.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/rep/bridge.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/rep/neigh.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/rep/neigh.c</a></td><td class='right'>398</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/rep/neigh.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/rep/neigh.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/rep/tc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/rep/tc.c</a></td><td class='right'>764</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/rep/tc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/rep/tc.h</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/reporter_rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/reporter_rx.c</a></td><td class='right'>690</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/reporter_tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/reporter_tx.c</a></td><td class='right'>578</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/rqt.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/rqt.c</a></td><td class='right'>266</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/rqt.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/rqt.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/rss.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/rss.c</a></td><td class='right'>717</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/rss.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/rss.h</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/rx_res.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/rx_res.c</a></td><td class='right'>730</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/rx_res.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/rx_res.h</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/selq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/selq.c</a></td><td class='right'>268</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/selq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/selq.h</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/accept.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/accept.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/act.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/act.c</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/act.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/act.h</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/csum.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/csum.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/ct.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/ct.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/drop.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/drop.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/goto.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/goto.c</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/mark.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/mark.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/mirred.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/mirred.c</a></td><td class='right'>337</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/mirred_nic.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/mirred_nic.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/mpls.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/mpls.c</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/pedit.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/pedit.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/pedit.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/pedit.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/police.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/police.c</a></td><td class='right'>212</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/ptype.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/ptype.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/redirect_ingress.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/redirect_ingress.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/sample.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/sample.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/sample.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/sample.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/trap.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/trap.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/tun.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/tun.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/vlan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/vlan.c</a></td><td class='right'>203</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/vlan.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/vlan.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/vlan_mangle.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/act/vlan_mangle.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act_stats.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/act_stats.c</a></td><td class='right'>199</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/act_stats.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/act_stats.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/ct_fs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/ct_fs.h</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/ct_fs_dmfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/ct_fs_dmfs.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/ct_fs_hmfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/ct_fs_hmfs.c</a></td><td class='right'>294</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/ct_fs_smfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/ct_fs_smfs.c</a></td><td class='right'>338</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/int_port.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/int_port.c</a></td><td class='right'>459</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/int_port.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/int_port.h</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/meter.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/meter.c</a></td><td class='right'>600</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/meter.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/meter.h</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/post_act.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/post_act.c</a></td><td class='right'>181</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/post_act.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/post_act.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/post_meter.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/post_meter.c</a></td><td class='right'>460</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/post_meter.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/post_meter.h</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/sample.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/sample.c</a></td><td class='right'>655</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc/sample.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc/sample.h</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.c</a></td><td class='right'>2538</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.h</a></td><td class='right'>216</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc_priv.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc_priv.h</a></td><td class='right'>213</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun.c</a></td><td class='right'>999</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun.h</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_encap.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_encap.c</a></td><td class='right'>1891</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_encap.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_encap.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_geneve.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_geneve.c</a></td><td class='right'>355</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_gre.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_gre.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_mplsoudp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_mplsoudp.c</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_vxlan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_vxlan.c</a></td><td class='right'>260</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tir.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tir.c</a></td><td class='right'>229</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/tir.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/tir.h</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/trap.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/trap.c</a></td><td class='right'>335</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/trap.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/trap.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h</a></td><td class='right'>586</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/xdp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/xdp.c</a></td><td class='right'>969</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/xdp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/xdp.h</a></td><td class='right'>240</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/xsk/pool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/xsk/pool.c</a></td><td class='right'>230</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/xsk/pool.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/xsk/pool.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/xsk/rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/xsk/rx.c</a></td><td class='right'>337</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/xsk/rx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/xsk/rx.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/xsk/setup.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/xsk/setup.c</a></td><td class='right'>214</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/xsk/setup.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/xsk/setup.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/xsk/tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/xsk/tx.c</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en/xsk/tx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en/xsk/tx.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/en_accel.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/en_accel.h</a></td><td class='right'>276</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/fs_tcp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/fs_tcp.c</a></td><td class='right'>404</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/fs_tcp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/fs_tcp.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c</a></td><td class='right'>1364</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.h</a></td><td class='right'>397</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_fs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_fs.c</a></td><td class='right'>2922</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_offload.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_offload.c</a></td><td class='right'>634</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.c</a></td><td class='right'>364</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.h</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_stats.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_stats.c</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls.c</a></td><td class='right'>220</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls.h</a></td><td class='right'>152</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c</a></td><td class='right'>811</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_stats.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_stats.c</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c</a></td><td class='right'>958</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_txrx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_txrx.c</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_txrx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_txrx.h</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_utils.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_utils.h</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/macsec.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/macsec.c</a></td><td class='right'>1800</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/macsec.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/macsec.h</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/macsec_stats.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/macsec_stats.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp.c</a></td><td class='right'>1155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp_rxtx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp_rxtx.c</a></td><td class='right'>201</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp_rxtx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_accel/psp_rxtx.h</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_arfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_arfs.c</a></td><td class='right'>782</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_common.c</a></td><td class='right'>289</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c</a></td><td class='right'>1289</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_dim.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_dim.c</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c</a></td><td class='right'>2905</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_flow_table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_flow_table.c</a></td><td class='right'>860</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_fs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_fs.c</a></td><td class='right'>1614</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_fs_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_fs_ethtool.c</a></td><td class='right'>1019</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_main.c</a></td><td class='right'>7006</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.5%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 87.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_rep.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_rep.c</a></td><td class='right'>1823</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_rep.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_rep.h</a></td><td class='right'>286</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_rx.c</a></td><td class='right'>2850</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_selftest.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_selftest.c</a></td><td class='right'>378</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_stats.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_stats.c</a></td><td class='right'>2737</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_stats.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_stats.h</a></td><td class='right'>541</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_tc.c</a></td><td class='right'>5877</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_tc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_tc.h</a></td><td class='right'>408</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_tx.c</a></td><td class='right'>1075</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c</a></td><td class='right'>235</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/eq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/eq.c</a></td><td class='right'>1415</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/esw/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/acl/egress_lgcy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/esw/acl/egress_lgcy.c</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/acl/egress_ofld.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/esw/acl/egress_ofld.c</a></td><td class='right'>274</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/acl/helper.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/esw/acl/helper.c</a></td><td class='right'>164</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/acl/helper.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/esw/acl/helper.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/acl/ingress_lgcy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/esw/acl/ingress_lgcy.c</a></td><td class='right'>305</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/acl/ingress_ofld.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/esw/acl/ingress_ofld.c</a></td><td class='right'>429</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/acl/lgcy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/esw/acl/lgcy.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/acl/ofld.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/esw/acl/ofld.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/adj_vport.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/esw/adj_vport.c</a></td><td class='right'>202</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/bridge.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/esw/bridge.c</a></td><td class='right'>1955</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/bridge.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/esw/bridge.h</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/bridge_debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/esw/bridge_debugfs.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/bridge_mcast.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/esw/bridge_mcast.c</a></td><td class='right'>1134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/bridge_priv.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/esw/bridge_priv.h</a></td><td class='right'>251</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/devlink_port.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/esw/devlink_port.c</a></td><td class='right'>217</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/diag/bridge_tracepoint.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/esw/diag/bridge_tracepoint.h</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/diag/qos_tracepoint.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/esw/diag/qos_tracepoint.h</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/indir_table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/esw/indir_table.c</a></td><td class='right'>382</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/indir_table.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/esw/indir_table.h</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/ipsec.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/esw/ipsec.c</a></td><td class='right'>369</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/ipsec_fs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/esw/ipsec_fs.c</a></td><td class='right'>186</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/ipsec_fs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/esw/ipsec_fs.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/legacy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/esw/legacy.c</a></td><td class='right'>521</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/legacy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/esw/legacy.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c</a></td><td class='right'>2107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/qos.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/esw/qos.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/esw/vporttbl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/esw/vporttbl.c</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/eswitch.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/eswitch.c</a></td><td class='right'>2568</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/eswitch.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/eswitch.h</a></td><td class='right'>1017</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c</a></td><td class='right'>4969</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads_termtbl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads_termtbl.c</a></td><td class='right'>335</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/events.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/events.c</a></td><td class='right'>473</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/flow_table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/flow_table.c</a></td><td class='right'>422</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fpga/cmd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/fpga/cmd.c</a></td><td class='right'>235</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fpga/cmd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/fpga/cmd.h</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fpga/conn.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/fpga/conn.c</a></td><td class='right'>999</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fpga/conn.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/fpga/conn.h</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fpga/core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/fpga/core.c</a></td><td class='right'>375</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fpga/core.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/fpga/core.h</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fpga/sdk.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/fpga/sdk.c</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fpga/sdk.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/fpga/sdk.h</a></td><td class='right'>214</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c</a></td><td class='right'>1214</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.h</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fs_core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/fs_core.c</a></td><td class='right'>4313</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fs_core.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/fs_core.h</a></td><td class='right'>432</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fs_counters.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/fs_counters.c</a></td><td class='right'>597</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fs_ft_pool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/fs_ft_pool.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fs_ft_pool.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/fs_ft_pool.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fs_pool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/fs_pool.c</a></td><td class='right'>195</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fs_pool.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/fs_pool.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/fw.c</a></td><td class='right'>783</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c</a></td><td class='right'>910</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/fw_reset.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/health.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/health.c</a></td><td class='right'>875</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/hwmon.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/hwmon.c</a></td><td class='right'>423</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/hwmon.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/hwmon.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/ipoib/ethtool.c</a></td><td class='right'>313</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.c</a></td><td class='right'>861</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.h</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib_vlan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib_vlan.c</a></td><td class='right'>365</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/irq_affinity.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/irq_affinity.c</a></td><td class='right'>201</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lag/debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lag/debugfs.c</a></td><td class='right'>179</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c</a></td><td class='right'>1806</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lag/mp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lag/mp.c</a></td><td class='right'>402</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lag/mp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lag/mp.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.c</a></td><td class='right'>218</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lag/port_sel.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lag/port_sel.c</a></td><td class='right'>654</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lag/port_sel.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lag/port_sel.h</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/aso.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/aso.c</a></td><td class='right'>432</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/aso.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/aso.h</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c</a></td><td class='right'>1643</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/clock.h</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/crypto.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/crypto.c</a></td><td class='right'>774</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/crypto.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/crypto.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/devcom.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/devcom.c</a></td><td class='right'>440</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/devcom.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/devcom.h</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/dm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/dm.c</a></td><td class='right'>303</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/eq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/eq.h</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/events.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/events.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/fs_chains.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/fs_chains.c</a></td><td class='right'>813</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/fs_chains.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/fs_chains.h</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/fs_ttc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/fs_ttc.c</a></td><td class='right'>1140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/fs_ttc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/fs_ttc.h</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/geneve.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/geneve.c</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/geneve.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/geneve.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/gid.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/gid.c</a></td><td class='right'>152</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/hv.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/hv.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/hv.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/hv.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/hv_vhca.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/hv_vhca.c</a></td><td class='right'>371</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/hv_vhca.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/hv_vhca.h</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/ipsec_fs_roce.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/ipsec_fs_roce.c</a></td><td class='right'>875</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/ipsec_fs_roce.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/ipsec_fs_roce.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/macsec_fs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/macsec_fs.c</a></td><td class='right'>2409</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/macsec_fs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/macsec_fs.h</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/mlx5.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/mlx5.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/mpfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/mpfs.c</a></td><td class='right'>293</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/mpfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/mpfs.h</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/nv_param.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/nv_param.c</a></td><td class='right'>799</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/nv_param.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/nv_param.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/pci_vsc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/pci_vsc.c</a></td><td class='right'>330</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/pci_vsc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/pci_vsc.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/port_tun.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/port_tun.c</a></td><td class='right'>186</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/port_tun.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/port_tun.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/sd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/sd.c</a></td><td class='right'>532</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/sd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/sd.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/sf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/sf.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/smfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/smfs.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/smfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/smfs.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/st.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/st.c</a></td><td class='right'>185</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/tout.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/tout.c</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/tout.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/tout.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/vxlan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/vxlan.c</a></td><td class='right'>196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/lib/vxlan.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/lib/vxlan.h</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/mad.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/mad.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/main.c</a></td><td class='right'>2426</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/mcg.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/mcg.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h</a></td><td class='right'>486</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/mlx5_irq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/mlx5_irq.h</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/mr.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/mr.c</a></td><td class='right'>227</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/pagealloc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/pagealloc.c</a></td><td class='right'>701</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c</a></td><td class='right'>833</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/pci_irq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/pci_irq.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/pd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/pd.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/port.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/port.c</a></td><td class='right'>1205</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/qos.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/qos.c</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/qos.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/qos.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/qp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/qp.c</a></td><td class='right'>450</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/rdma.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/rdma.c</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/rdma.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/rdma.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/rl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/rl.c</a></td><td class='right'>460</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/sf/cmd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/sf/cmd.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/sf/dev/dev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/sf/dev/dev.c</a></td><td class='right'>406</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/sf/dev/dev.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/sf/dev/dev.h</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/sf/dev/diag/dev_tracepoint.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/sf/dev/diag/dev_tracepoint.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/sf/dev/driver.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/sf/dev/driver.c</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/sf/devlink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/sf/devlink.c</a></td><td class='right'>554</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/sf/diag/sf_tracepoint.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/sf/diag/sf_tracepoint.h</a></td><td class='right'>173</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/sf/diag/vhca_tracepoint.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/sf/diag/vhca_tracepoint.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/sf/hw_table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/sf/hw_table.c</a></td><td class='right'>412</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/sf/mlx5_ifc_vhca_event.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/sf/mlx5_ifc_vhca_event.h</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/sf/priv.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/sf/priv.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/sf/sf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/sf/sf.h</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/sf/vhca_event.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/sf/vhca_event.c</a></td><td class='right'>235</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/sf/vhca_event.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/sf/vhca_event.h</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/sriov.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/sriov.c</a></td><td class='right'>376</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/srq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/srq.c</a></td><td class='right'>541</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action.c</a></td><td class='right'>2651</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action.h</a></td><td class='right'>316</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action_ste_pool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action_ste_pool.c</a></td><td class='right'>467</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action_ste_pool.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action_ste_pool.h</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/buddy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/buddy.c</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/buddy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/buddy.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc.c</a></td><td class='right'>1226</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc.h</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc_complex.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc_complex.c</a></td><td class='right'>1101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc_complex.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/bwc_complex.h</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/cmd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/cmd.c</a></td><td class='right'>1219</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/cmd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/cmd.h</a></td><td class='right'>347</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/context.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/context.c</a></td><td class='right'>257</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/context.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/context.h</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/debug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/debug.c</a></td><td class='right'>487</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/debug.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/debug.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/definer.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/definer.c</a></td><td class='right'>2329</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/definer.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/definer.h</a></td><td class='right'>831</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws.c</a></td><td class='right'>1641</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws.h</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws_pools.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws_pools.c</a></td><td class='right'>427</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws_pools.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws_pools.h</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/internal.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/internal.h</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/matcher.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/matcher.c</a></td><td class='right'>1293</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/matcher.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/matcher.h</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws.h</a></td><td class='right'>941</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pat_arg.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pat_arg.c</a></td><td class='right'>582</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pat_arg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pat_arg.h</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pool.c</a></td><td class='right'>394</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pool.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/pool.h</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/prm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/prm.h</a></td><td class='right'>472</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/rule.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/rule.c</a></td><td class='right'>846</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/rule.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/rule.h</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/send.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/send.c</a></td><td class='right'>1358</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/send.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/send.h</a></td><td class='right'>265</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/table.c</a></td><td class='right'>494</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/table.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/table.h</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/vport.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/vport.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/vport.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/hws/vport.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_action.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_action.c</a></td><td class='right'>2245</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_arg.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_arg.c</a></td><td class='right'>273</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_buddy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_buddy.c</a></td><td class='right'>168</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_cmd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_cmd.c</a></td><td class='right'>958</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_dbg.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_dbg.c</a></td><td class='right'>1186</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_dbg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_dbg.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_definer.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_definer.c</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_domain.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_domain.c</a></td><td class='right'>557</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_fw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_fw.c</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_icm_pool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_icm_pool.c</a></td><td class='right'>576</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_matcher.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_matcher.c</a></td><td class='right'>1108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ptrn.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ptrn.c</a></td><td class='right'>244</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_rule.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_rule.c</a></td><td class='right'>1377</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_send.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_send.c</a></td><td class='right'>1318</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste.c</a></td><td class='right'>1465</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste.h</a></td><td class='right'>226</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v0.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v0.c</a></td><td class='right'>1964</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v1.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v1.c</a></td><td class='right'>2212</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v1.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v1.h</a></td><td class='right'>240</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v2.h</a></td><td class='right'>168</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v3.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_ste_v3.c</a></td><td class='right'>263</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_table.c</a></td><td class='right'>319</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_types.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_types.h</a></td><td class='right'>1598</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/fs_dr.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/fs_dr.c</a></td><td class='right'>885</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/fs_dr.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/fs_dr.h</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/mlx5_ifc_dr.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/mlx5_ifc_dr.h</a></td><td class='right'>643</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/mlx5_ifc_dr_ste_v1.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/mlx5_ifc_dr_ste_v1.h</a></td><td class='right'>469</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/mlx5dr.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/steering/sws/mlx5dr.h</a></td><td class='right'>194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/transobj.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/transobj.c</a></td><td class='right'>475</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/transobj.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/transobj.h</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/uar.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/uar.c</a></td><td class='right'>412</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/vport.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/vport.c</a></td><td class='right'>1078</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/wc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/wc.c</a></td><td class='right'>464</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/wq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/wq.c</a></td><td class='right'>194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlx5/core/wq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlx5/core/wq.h</a></td><td class='right'>206</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxbf_gige/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxbf_gige/Kconfig</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxbf_gige/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxbf_gige/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige.h</a></td><td class='right'>209</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_ethtool.c</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_intr.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_intr.c</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_main.c</a></td><td class='right'>548</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio.c</a></td><td class='right'>344</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio_bf2.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio_bf2.h</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio_bf3.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_mdio_bf3.h</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_regs.h</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c</a></td><td class='right'>364</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_tx.c</a></td><td class='right'>284</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxfw/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxfw/Kconfig</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxfw/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxfw/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxfw/mlxfw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxfw/mlxfw.h</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxfw/mlxfw_fsm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxfw/mlxfw_fsm.c</a></td><td class='right'>434</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxfw/mlxfw_mfa2.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxfw/mlxfw_mfa2.c</a></td><td class='right'>589</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxfw/mlxfw_mfa2.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxfw/mlxfw_mfa2.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxfw/mlxfw_mfa2_file.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxfw/mlxfw_mfa2_file.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxfw/mlxfw_mfa2_format.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxfw/mlxfw_mfa2_format.h</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxfw/mlxfw_mfa2_tlv.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxfw/mlxfw_mfa2_tlv.h</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxfw/mlxfw_mfa2_tlv_multi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxfw/mlxfw_mfa2_tlv_multi.c</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxfw/mlxfw_mfa2_tlv_multi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxfw/mlxfw_mfa2_tlv_multi.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/Kconfig</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/Makefile</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/cmd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/cmd.h</a></td><td class='right'>1319</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/core.c</a></td><td class='right'>3416</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/core.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/core.h</a></td><td class='right'>686</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_actions.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_actions.c</a></td><td class='right'>2258</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_actions.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_actions.h</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.c</a></td><td class='right'>561</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h</a></td><td class='right'>235</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/core_env.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/core_env.c</a></td><td class='right'>1536</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/core_env.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/core_env.h</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c</a></td><td class='right'>941</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/core_linecard_dev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/core_linecard_dev.c</a></td><td class='right'>186</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/core_linecards.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/core_linecards.c</a></td><td class='right'>1604</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/core_thermal.c</a></td><td class='right'>785</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/emad.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/emad.h</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/i2c.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/i2c.c</a></td><td class='right'>767</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/i2c.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/i2c.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/item.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/item.h</a></td><td class='right'>557</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/minimal.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/minimal.c</a></td><td class='right'>761</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/pci.c</a></td><td class='right'>2559</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/pci.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/pci.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/pci_hw.h</a></td><td class='right'>421</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/port.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/port.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/reg.h</a></td><td class='right'>13211</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 23.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 76.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/resources.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/resources.h</a></td><td class='right'>172</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum.c</a></td><td class='right'>5402</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum.h</a></td><td class='right'>1497</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum1_acl_tcam.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum1_acl_tcam.c</a></td><td class='right'>254</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum1_kvdl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum1_kvdl.c</a></td><td class='right'>427</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum1_mr_tcam.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum1_mr_tcam.c</a></td><td class='right'>342</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum2_acl_tcam.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum2_acl_tcam.c</a></td><td class='right'>280</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum2_kvdl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum2_kvdl.c</a></td><td class='right'>273</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum2_mr_tcam.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum2_mr_tcam.c</a></td><td class='right'>334</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_acl.c</a></td><td class='right'>1130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_atcam.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_atcam.c</a></td><td class='right'>644</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_bloom_filter.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_bloom_filter.c</a></td><td class='right'>539</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_ctcam.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_ctcam.c</a></td><td class='right'>233</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_erp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_erp.c</a></td><td class='right'>1588</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_flex_actions.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_flex_actions.c</a></td><td class='right'>318</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_flex_actions.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_flex_actions.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_flex_keys.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_flex_keys.c</a></td><td class='right'>366</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_tcam.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_tcam.c</a></td><td class='right'>1953</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_tcam.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_tcam.h</a></td><td class='right'>305</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_buffers.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_buffers.c</a></td><td class='right'>1798</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_cnt.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_cnt.c</a></td><td class='right'>305</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_cnt.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_cnt.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_dcb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_dcb.c</a></td><td class='right'>740</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_dpipe.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_dpipe.c</a></td><td class='right'>1322</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_dpipe.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_dpipe.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_ethtool.c</a></td><td class='right'>2121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_fid.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_fid.c</a></td><td class='right'>2496</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_flow.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_flow.c</a></td><td class='right'>295</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_flower.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_flower.c</a></td><td class='right'>909</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_ipip.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_ipip.c</a></td><td class='right'>642</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_ipip.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_ipip.h</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_kvdl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_kvdl.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_matchall.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_matchall.c</a></td><td class='right'>478</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_mr.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_mr.c</a></td><td class='right'>1072</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_mr.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_mr.h</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_mr_tcam.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_mr_tcam.c</a></td><td class='right'>615</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_mr_tcam.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_mr_tcam.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_nve.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_nve.c</a></td><td class='right'>1174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_nve.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_nve.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_nve_vxlan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_nve_vxlan.c</a></td><td class='right'>475</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_pgt.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_pgt.c</a></td><td class='right'>336</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_policer.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_policer.c</a></td><td class='right'>468</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_port_range.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_port_range.c</a></td><td class='right'>200</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c</a></td><td class='right'>1687</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.h</a></td><td class='right'>219</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_qdisc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_qdisc.c</a></td><td class='right'>2337</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c</a></td><td class='right'>11788</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 20.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 79.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_router.h</a></td><td class='right'>188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_span.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_span.c</a></td><td class='right'>1742</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_span.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_span.h</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_switchdev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_switchdev.c</a></td><td class='right'>4194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_switchdev.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_switchdev.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_trap.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_trap.c</a></td><td class='right'>1994</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/spectrum_trap.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/spectrum_trap.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/trap.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/trap.h</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mellanox/mlxsw/txheader.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mellanox/mlxsw/txheader.h</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/meta/Kconfig</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/meta/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/meta/fbnic/Makefile</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/meta/fbnic/fbnic.h</a></td><td class='right'>227</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_csr.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/meta/fbnic/fbnic_csr.c</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_csr.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/meta/fbnic/fbnic_csr.h</a></td><td class='right'>1201</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/meta/fbnic/fbnic_debugfs.c</a></td><td class='right'>271</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_devlink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/meta/fbnic/fbnic_devlink.c</a></td><td class='right'>668</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_drvinfo.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/meta/fbnic/fbnic_drvinfo.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/meta/fbnic/fbnic_ethtool.c</a></td><td class='right'>1924</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_fw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/meta/fbnic/fbnic_fw.c</a></td><td class='right'>1920</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_fw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/meta/fbnic/fbnic_fw.h</a></td><td class='right'>326</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_fw_log.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/meta/fbnic/fbnic_fw_log.c</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_fw_log.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/meta/fbnic/fbnic_fw_log.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_hw_stats.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/meta/fbnic/fbnic_hw_stats.c</a></td><td class='right'>601</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_hw_stats.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/meta/fbnic/fbnic_hw_stats.h</a></td><td class='right'>163</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_hwmon.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/meta/fbnic/fbnic_hwmon.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_irq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/meta/fbnic/fbnic_irq.c</a></td><td class='right'>313</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/meta/fbnic/fbnic_mac.c</a></td><td class='right'>934</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_mac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/meta/fbnic/fbnic_mac.h</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_mdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/meta/fbnic/fbnic_mdio.c</a></td><td class='right'>195</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_netdev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/meta/fbnic/fbnic_netdev.c</a></td><td class='right'>857</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_netdev.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/meta/fbnic/fbnic_netdev.h</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/meta/fbnic/fbnic_pci.c</a></td><td class='right'>655</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_phylink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/meta/fbnic/fbnic_phylink.c</a></td><td class='right'>311</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_rpc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/meta/fbnic/fbnic_rpc.c</a></td><td class='right'>1246</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_rpc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/meta/fbnic/fbnic_rpc.h</a></td><td class='right'>232</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_time.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/meta/fbnic/fbnic_time.c</a></td><td class='right'>303</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_tlv.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/meta/fbnic/fbnic_tlv.c</a></td><td class='right'>560</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_tlv.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/meta/fbnic/fbnic_tlv.h</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_txrx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/meta/fbnic/fbnic_txrx.c</a></td><td class='right'>2930</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/meta/fbnic/fbnic_txrx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/meta/fbnic/fbnic_txrx.h</a></td><td class='right'>201</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/micrel/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/micrel/Kconfig</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/micrel/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/micrel/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/micrel/ks8695net.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/micrel/ks8695net.c</a></td><td class='right'>1630</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/micrel/ks8695net.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/micrel/ks8695net.h</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/micrel/ks8842.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/micrel/ks8842.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/micrel/ks8851.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/micrel/ks8851.c</a></td><td class='right'>1623</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/micrel/ks8851.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/micrel/ks8851.h</a></td><td class='right'>249</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/micrel/ks8851_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/micrel/ks8851_common.c</a></td><td class='right'>1235</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/micrel/ks8851_mll.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/micrel/ks8851_mll.c</a></td><td class='right'>1695</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/micrel/ks8851_par.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/micrel/ks8851_par.c</a></td><td class='right'>346</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/micrel/ks8851_spi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/micrel/ks8851_spi.c</a></td><td class='right'>481</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/micrel/ksz884x.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/micrel/ksz884x.c</a></td><td class='right'>774</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/Kconfig</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/Makefile</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/enc28j60.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/enc28j60.c</a></td><td class='right'>648</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/enc28j60_hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/enc28j60_hw.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/encx24j600-regmap.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/encx24j600-regmap.c</a></td><td class='right'>517</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/encx24j600.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/encx24j600.c</a></td><td class='right'>1128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/encx24j600_hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/encx24j600_hw.h</a></td><td class='right'>438</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/fdma/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/fdma/Kconfig</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/fdma/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/fdma/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/fdma/fdma_api.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/fdma/fdma_api.c</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/fdma/fdma_api.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/fdma/fdma_api.h</a></td><td class='right'>243</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan743x_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan743x_ethtool.c</a></td><td class='right'>1391</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan743x_ethtool.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan743x_ethtool.h</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan743x_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan743x_main.c</a></td><td class='right'>3999</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan743x_main.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan743x_main.h</a></td><td class='right'>1212</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan743x_ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan743x_ptp.c</a></td><td class='right'>1796</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan743x_ptp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan743x_ptp.h</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan865x/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan865x/Kconfig</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan865x/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan865x/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan865x/lan865x.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan865x/lan865x.c</a></td><td class='right'>455</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan966x/Kconfig</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan966x/Makefile</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_cbs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan966x/lan966x_cbs.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_dcb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan966x/lan966x_dcb.c</a></td><td class='right'>365</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan966x/lan966x_ethtool.c</a></td><td class='right'>716</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_ets.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan966x/lan966x_ets.c</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_fdb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan966x/lan966x_fdb.c</a></td><td class='right'>289</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_fdma.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan966x/lan966x_fdma.c</a></td><td class='right'>982</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_goto.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan966x/lan966x_goto.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_ifh.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan966x/lan966x_ifh.h</a></td><td class='right'>174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_lag.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan966x/lan966x_lag.c</a></td><td class='right'>368</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan966x/lan966x_mac.c</a></td><td class='right'>592</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan966x/lan966x_main.c</a></td><td class='right'>1327</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_main.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan966x/lan966x_main.h</a></td><td class='right'>746</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_mdb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan966x/lan966x_mdb.c</a></td><td class='right'>551</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_mirror.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan966x/lan966x_mirror.c</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_mqprio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan966x/lan966x_mqprio.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_phylink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan966x/lan966x_phylink.c</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_police.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan966x/lan966x_police.c</a></td><td class='right'>226</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_port.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan966x/lan966x_port.c</a></td><td class='right'>571</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan966x/lan966x_ptp.c</a></td><td class='right'>1133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan966x/lan966x_regs.h</a></td><td class='right'>1888</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_switchdev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan966x/lan966x_switchdev.c</a></td><td class='right'>665</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_taprio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan966x/lan966x_taprio.c</a></td><td class='right'>528</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_tbf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan966x/lan966x_tbf.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_tc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan966x/lan966x_tc.c</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_tc_flower.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan966x/lan966x_tc_flower.c</a></td><td class='right'>626</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_tc_matchall.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan966x/lan966x_tc_matchall.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_vcap_ag_api.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan966x/lan966x_vcap_ag_api.c</a></td><td class='right'>3270</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_vcap_ag_api.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan966x/lan966x_vcap_ag_api.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_vcap_debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan966x/lan966x_vcap_debugfs.c</a></td><td class='right'>244</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_vcap_impl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan966x/lan966x_vcap_impl.c</a></td><td class='right'>784</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_vlan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan966x/lan966x_vlan.c</a></td><td class='right'>344</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/lan966x/lan966x_xdp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/lan966x/lan966x_xdp.c</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/Kconfig</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/Makefile</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/lan969x/lan969x.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/lan969x/lan969x.c</a></td><td class='right'>357</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/lan969x/lan969x.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/lan969x/lan969x.h</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_calendar.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_calendar.c</a></td><td class='right'>191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_fdma.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_fdma.c</a></td><td class='right'>406</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_regs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_regs.c</a></td><td class='right'>222</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_rgmii.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_rgmii.c</a></td><td class='right'>224</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_vcap_ag_api.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_vcap_ag_api.c</a></td><td class='right'>3843</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_vcap_impl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/lan969x/lan969x_vcap_impl.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_calendar.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/sparx5_calendar.c</a></td><td class='right'>612</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_dcb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/sparx5_dcb.c</a></td><td class='right'>408</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/sparx5_ethtool.c</a></td><td class='right'>1280</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_fdma.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/sparx5_fdma.c</a></td><td class='right'>486</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_mactable.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/sparx5_mactable.c</a></td><td class='right'>505</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/sparx5_main.c</a></td><td class='right'>1143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_main.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/sparx5_main.h</a></td><td class='right'>867</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h</a></td><td class='right'>8258</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 85.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_mirror.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/sparx5_mirror.c</a></td><td class='right'>240</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_netdev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/sparx5_netdev.c</a></td><td class='right'>341</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_packet.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/sparx5_packet.c</a></td><td class='right'>380</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_pgid.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/sparx5_pgid.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_phylink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/sparx5_phylink.c</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_police.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/sparx5_police.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_pool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/sparx5_pool.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_port.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/sparx5_port.c</a></td><td class='right'>1424</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_port.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/sparx5_port.h</a></td><td class='right'>191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_psfp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/sparx5_psfp.c</a></td><td class='right'>337</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c</a></td><td class='right'>696</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_qos.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/sparx5_qos.c</a></td><td class='right'>583</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_qos.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/sparx5_qos.h</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_regs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/sparx5_regs.c</a></td><td class='right'>222</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/sparx5_regs.h</a></td><td class='right'>247</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_sdlb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/sparx5_sdlb.c</a></td><td class='right'>338</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_switchdev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/sparx5_switchdev.c</a></td><td class='right'>788</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_tc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/sparx5_tc.c</a></td><td class='right'>174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_tc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/sparx5_tc.h</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_tc_flower.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/sparx5_tc_flower.c</a></td><td class='right'>1581</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_tc_matchall.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/sparx5_tc_matchall.c</a></td><td class='right'>204</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_vcap_ag_api.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/sparx5_vcap_ag_api.c</a></td><td class='right'>3874</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_vcap_ag_api.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/sparx5_vcap_ag_api.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_vcap_debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/sparx5_vcap_debugfs.c</a></td><td class='right'>471</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_vcap_debugfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/sparx5_vcap_debugfs.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.c</a></td><td class='right'>2101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/sparx5_vcap_impl.h</a></td><td class='right'>228</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/sparx5/sparx5_vlan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/sparx5/sparx5_vlan.c</a></td><td class='right'>243</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/vcap/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/vcap/Kconfig</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/vcap/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/vcap/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/vcap/vcap_ag_api.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/vcap/vcap_ag_api.h</a></td><td class='right'>906</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/vcap/vcap_api.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/vcap/vcap_api.c</a></td><td class='right'>3611</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/vcap/vcap_api.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/vcap/vcap_api.h</a></td><td class='right'>280</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/vcap/vcap_api_client.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/vcap/vcap_api_client.h</a></td><td class='right'>284</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/vcap/vcap_api_debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/vcap/vcap_api_debugfs.c</a></td><td class='right'>468</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/vcap/vcap_api_debugfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/vcap/vcap_api_debugfs.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/vcap/vcap_api_debugfs_kunit.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/vcap/vcap_api_debugfs_kunit.c</a></td><td class='right'>554</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/vcap/vcap_api_kunit.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/vcap/vcap_api_kunit.c</a></td><td class='right'>2352</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/vcap/vcap_api_private.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/vcap/vcap_api_private.h</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/vcap/vcap_model_kunit.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/vcap/vcap_model_kunit.c</a></td><td class='right'>4062</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/vcap/vcap_model_kunit.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/vcap/vcap_model_kunit.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/vcap/vcap_tc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/vcap/vcap_tc.c</a></td><td class='right'>412</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microchip/vcap/vcap_tc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microchip/vcap/vcap_tc.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microsoft/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microsoft/Kconfig</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microsoft/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microsoft/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microsoft/mana/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microsoft/mana/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microsoft/mana/gdma_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microsoft/mana/gdma_main.c</a></td><td class='right'>2238</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microsoft/mana/hw_channel.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microsoft/mana/hw_channel.c</a></td><td class='right'>926</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microsoft/mana/mana_bpf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microsoft/mana/mana_bpf.c</a></td><td class='right'>266</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microsoft/mana/mana_en.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microsoft/mana/mana_en.c</a></td><td class='right'>3724</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microsoft/mana/mana_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microsoft/mana/mana_ethtool.c</a></td><td class='right'>534</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/microsoft/mana/shm_channel.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/microsoft/mana/shm_channel.c</a></td><td class='right'>292</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/moxa/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/moxa/Kconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/moxa/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/moxa/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/moxa/moxart_ether.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/moxa/moxart_ether.c</a></td><td class='right'>207</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/moxa/moxart_ether.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/moxa/moxart_ether.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mscc/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mscc/Kconfig</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mscc/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mscc/Makefile</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mscc/ocelot.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mscc/ocelot.c</a></td><td class='right'>3331</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mscc/ocelot.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mscc/ocelot.h</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mscc/ocelot_devlink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mscc/ocelot_devlink.c</a></td><td class='right'>916</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mscc/ocelot_fdma.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mscc/ocelot_fdma.c</a></td><td class='right'>892</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mscc/ocelot_fdma.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mscc/ocelot_fdma.h</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mscc/ocelot_flower.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mscc/ocelot_flower.c</a></td><td class='right'>1042</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mscc/ocelot_io.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mscc/ocelot_io.c</a></td><td class='right'>168</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mscc/ocelot_mm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mscc/ocelot_mm.c</a></td><td class='right'>300</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mscc/ocelot_mrp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mscc/ocelot_mrp.c</a></td><td class='right'>236</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mscc/ocelot_net.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mscc/ocelot_net.c</a></td><td class='right'>1889</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mscc/ocelot_police.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mscc/ocelot_police.c</a></td><td class='right'>254</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mscc/ocelot_police.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mscc/ocelot_police.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mscc/ocelot_ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mscc/ocelot_ptp.c</a></td><td class='right'>912</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mscc/ocelot_qs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mscc/ocelot_qs.h</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mscc/ocelot_rew.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mscc/ocelot_rew.h</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mscc/ocelot_stats.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mscc/ocelot_stats.c</a></td><td class='right'>1026</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mscc/ocelot_vcap.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mscc/ocelot_vcap.c</a></td><td class='right'>1433</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mscc/ocelot_vcap.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mscc/ocelot_vcap.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mscc/ocelot_vsc7514.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mscc/ocelot_vsc7514.c</a></td><td class='right'>432</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mscc/vsc7514_regs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mscc/vsc7514_regs.c</a></td><td class='right'>685</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mucse/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mucse/Kconfig</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mucse/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mucse/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mucse/rnpgbe/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mucse/rnpgbe/Makefile</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mucse/rnpgbe/rnpgbe.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mucse/rnpgbe/rnpgbe.h</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_chip.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mucse/rnpgbe/rnpgbe_chip.c</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mucse/rnpgbe/rnpgbe_hw.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mucse/rnpgbe/rnpgbe_main.c</a></td><td class='right'>320</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx.c</a></td><td class='right'>406</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx_fw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx_fw.c</a></td><td class='right'>191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx_fw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/mucse/rnpgbe/rnpgbe_mbx_fw.h</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/myricom/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/myricom/Kconfig</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/myricom/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/myricom/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/myricom/myri10ge/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/myricom/myri10ge/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/myricom/myri10ge/myri10ge.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/myricom/myri10ge/myri10ge.c</a></td><td class='right'>523</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/myricom/myri10ge/myri10ge_mcp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/myricom/myri10ge/myri10ge_mcp.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/myricom/myri10ge/myri10ge_mcp_gen_header.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/myricom/myri10ge/myri10ge_mcp_gen_header.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/natsemi/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/natsemi/Kconfig</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/natsemi/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/natsemi/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/natsemi/jazzsonic.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/natsemi/jazzsonic.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/natsemi/macsonic.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/natsemi/macsonic.c</a></td><td class='right'>355</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/natsemi/natsemi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/natsemi/natsemi.c</a></td><td class='right'>289</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/natsemi/ns83820.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/natsemi/ns83820.c</a></td><td class='right'>278</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/natsemi/sonic.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/natsemi/sonic.c</a></td><td class='right'>544</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/natsemi/sonic.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/natsemi/sonic.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/natsemi/xtsonic.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/natsemi/xtsonic.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/neterion/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/neterion/Kconfig</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/neterion/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/neterion/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/neterion/s2io.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/neterion/s2io.c</a></td><td class='right'>625</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/neterion/s2io.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/neterion/s2io.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/neterion/vxge/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/neterion/vxge/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/neterion/vxge/vxge-config.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/neterion/vxge/vxge-config.c</a></td><td class='right'>5114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 8.9%;'/><td class='none' style='width: 91.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/neterion/vxge/vxge-config.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/neterion/vxge/vxge-config.h</a></td><td class='right'>2111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.7%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/neterion/vxge/vxge-ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/neterion/vxge/vxge-ethtool.c</a></td><td class='right'>1151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/neterion/vxge/vxge-ethtool.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/neterion/vxge/vxge-ethtool.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/neterion/vxge/vxge-main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/neterion/vxge/vxge-main.c</a></td><td class='right'>4870</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 8.5%;'/><td class='none' style='width: 91.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/neterion/vxge/vxge-main.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/neterion/vxge/vxge-main.h</a></td><td class='right'>520</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/neterion/vxge/vxge-reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/neterion/vxge/vxge-reg.h</a></td><td class='right'>4636</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 8.1%;'/><td class='none' style='width: 91.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/neterion/vxge/vxge-traffic.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/neterion/vxge/vxge-traffic.c</a></td><td class='right'>2475</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.3%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/neterion/vxge/vxge-traffic.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/neterion/vxge/vxge-traffic.h</a></td><td class='right'>2290</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/neterion/vxge/vxge-version.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/neterion/vxge/vxge-version.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/Kconfig</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/Makefile</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/abm/cls.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/abm/cls.c</a></td><td class='right'>273</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/abm/ctrl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/abm/ctrl.c</a></td><td class='right'>429</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/abm/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/abm/main.c</a></td><td class='right'>557</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/abm/main.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/abm/main.h</a></td><td class='right'>273</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/abm/qdisc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/abm/qdisc.c</a></td><td class='right'>850</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/bpf/cmsg.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/bpf/cmsg.c</a></td><td class='right'>481</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/bpf/fw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/bpf/fw.h</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/bpf/jit.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/bpf/jit.c</a></td><td class='right'>4627</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/bpf/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/bpf/main.c</a></td><td class='right'>547</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/bpf/main.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/bpf/main.h</a></td><td class='right'>615</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/bpf/offload.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/bpf/offload.c</a></td><td class='right'>620</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/bpf/verifier.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/bpf/verifier.c</a></td><td class='right'>863</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/ccm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/ccm.c</a></td><td class='right'>217</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/ccm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/ccm.h</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/ccm_mbox.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/ccm_mbox.c</a></td><td class='right'>743</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/crypto/crypto.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/crypto/crypto.h</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/crypto/fw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/crypto/fw.h</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/crypto/ipsec.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/crypto/ipsec.c</a></td><td class='right'>640</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/crypto/tls.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/crypto/tls.c</a></td><td class='right'>601</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/devlink_param.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/devlink_param.c</a></td><td class='right'>252</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/flower/action.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/flower/action.c</a></td><td class='right'>1322</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/flower/cmsg.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/flower/cmsg.c</a></td><td class='right'>383</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/flower/cmsg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/flower/cmsg.h</a></td><td class='right'>752</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/flower/conntrack.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/flower/conntrack.c</a></td><td class='right'>2300</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/flower/conntrack.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/flower/conntrack.h</a></td><td class='right'>289</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/flower/lag_conf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/flower/lag_conf.c</a></td><td class='right'>727</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/flower/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/flower/main.c</a></td><td class='right'>1032</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/flower/main.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/flower/main.h</a></td><td class='right'>732</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/flower/match.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/flower/match.c</a></td><td class='right'>722</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/flower/metadata.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/flower/metadata.c</a></td><td class='right'>726</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/flower/offload.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/flower/offload.c</a></td><td class='right'>1978</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/flower/qos_conf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/flower/qos_conf.c</a></td><td class='right'>887</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/flower/tunnel_conf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/flower/tunnel_conf.c</a></td><td class='right'>1564</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfd3/dp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfd3/dp.c</a></td><td class='right'>1413</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfd3/ipsec.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfd3/ipsec.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfd3/nfd3.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfd3/nfd3.h</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfd3/rings.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfd3/rings.c</a></td><td class='right'>279</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfd3/xsk.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfd3/xsk.c</a></td><td class='right'>409</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfdk/dp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfdk/dp.c</a></td><td class='right'>1575</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfdk/ipsec.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfdk/ipsec.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfdk/nfdk.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfdk/nfdk.h</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfdk/rings.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfdk/rings.c</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfp_abi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfp_abi.h</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfp_app.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfp_app.c</a></td><td class='right'>257</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfp_app.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfp_app.h</a></td><td class='right'>448</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfp_app_nic.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfp_app_nic.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfp_asm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfp_asm.c</a></td><td class='right'>320</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfp_asm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfp_asm.h</a></td><td class='right'>437</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfp_devlink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfp_devlink.c</a></td><td class='right'>369</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfp_hwmon.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfp_hwmon.c</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfp_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfp_main.c</a></td><td class='right'>1000</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfp_main.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfp_main.h</a></td><td class='right'>197</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfp_net.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfp_net.h</a></td><td class='right'>1056</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfp_net_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfp_net_common.c</a></td><td class='right'>2953</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfp_net_ctrl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfp_net_ctrl.c</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfp_net_ctrl.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfp_net_ctrl.h</a></td><td class='right'>585</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfp_net_debugdump.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfp_net_debugdump.c</a></td><td class='right'>774</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfp_net_debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfp_net_debugfs.c</a></td><td class='right'>186</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfp_net_dp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfp_net_dp.c</a></td><td class='right'>466</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfp_net_dp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfp_net_dp.h</a></td><td class='right'>219</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c</a></td><td class='right'>2562</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfp_net_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfp_net_main.c</a></td><td class='right'>835</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfp_net_repr.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfp_net_repr.c</a></td><td class='right'>540</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfp_net_repr.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfp_net_repr.h</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfp_net_sriov.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfp_net_sriov.c</a></td><td class='right'>311</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfp_net_sriov.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfp_net_sriov.h</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfp_net_xsk.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfp_net_xsk.c</a></td><td class='right'>174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfp_net_xsk.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfp_net_xsk.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfp_netvf_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfp_netvf_main.c</a></td><td class='right'>343</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfp_port.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfp_port.c</a></td><td class='right'>225</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfp_port.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfp_port.h</a></td><td class='right'>216</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfp_shared_buf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfp_shared_buf.c</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfpcore/crc32.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfpcore/crc32.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfpcore/nfp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfpcore/nfp.h</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000/nfp6000.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000/nfp6000.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000/nfp_xpb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000/nfp_xpb.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c</a></td><td class='right'>1368</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfpcore/nfp_arm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfpcore/nfp_arm.h</a></td><td class='right'>216</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfpcore/nfp_cpp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfpcore/nfp_cpp.h</a></td><td class='right'>432</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfpcore/nfp_cppcore.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfpcore/nfp_cppcore.c</a></td><td class='right'>1499</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfpcore/nfp_cpplib.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfpcore/nfp_cpplib.c</a></td><td class='right'>298</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfpcore/nfp_dev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfpcore/nfp_dev.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfpcore/nfp_dev.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfpcore/nfp_dev.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfpcore/nfp_hwinfo.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfpcore/nfp_hwinfo.c</a></td><td class='right'>284</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfpcore/nfp_mip.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfpcore/nfp_mip.c</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfpcore/nfp_mutex.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfpcore/nfp_mutex.c</a></td><td class='right'>368</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nffw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nffw.c</a></td><td class='right'>261</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nffw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nffw.h</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp.c</a></td><td class='right'>1120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp.h</a></td><td class='right'>344</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp_cmds.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp_cmds.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp_eth.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nsp_eth.c</a></td><td class='right'>763</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfpcore/nfp_resource.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfpcore/nfp_resource.c</a></td><td class='right'>366</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfpcore/nfp_rtsym.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfpcore/nfp_rtsym.c</a></td><td class='right'>556</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nfpcore/nfp_target.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nfpcore/nfp_target.c</a></td><td class='right'>742</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nic/dcb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nic/dcb.c</a></td><td class='right'>571</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nic/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nic/main.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netronome/nfp/nic/main.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netronome/nfp/nic/main.h</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/netx-eth.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/netx-eth.c</a></td><td class='right'>505</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ni/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ni/Kconfig</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ni/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ni/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ni/nixge.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ni/nixge.c</a></td><td class='right'>1428</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/nuvoton/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/nuvoton/Kconfig</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/nuvoton/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/nuvoton/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/nuvoton/w90p910_ether.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/nuvoton/w90p910_ether.c</a></td><td class='right'>1093</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/nvidia/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/nvidia/Kconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/nvidia/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/nvidia/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/nvidia/forcedeth.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/nvidia/forcedeth.c</a></td><td class='right'>788</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/nxp/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/nxp/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/nxp/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/nxp/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/nxp/lpc_eth.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/nxp/lpc_eth.c</a></td><td class='right'>329</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/oa_tc6.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/oa_tc6.c</a></td><td class='right'>1369</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/octeon/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/octeon/Kconfig</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/octeon/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/octeon/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/oki-semi/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/oki-semi/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/oki-semi/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/oki-semi/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/oki-semi/pch_gbe/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/oki-semi/pch_gbe/Kconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/oki-semi/pch_gbe/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/oki-semi/pch_gbe/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_api.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_api.c</a></td><td class='right'>262</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_api.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_api.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_ethtool.c</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c</a></td><td class='right'>537</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_param.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_param.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/packetengines/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/packetengines/Kconfig</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/packetengines/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/packetengines/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/packetengines/hamachi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/packetengines/hamachi.c</a></td><td class='right'>234</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/packetengines/yellowfin.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/packetengines/yellowfin.c</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pasemi/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/pasemi/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pasemi/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/pasemi/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pasemi/pasemi_mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/pasemi/pasemi_mac.c</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pasemi/pasemi_mac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/pasemi/pasemi_mac.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pasemi/pasemi_mac_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/pasemi/pasemi_mac_ethtool.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/pensando/Kconfig</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/pensando/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/pensando/ionic/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/pensando/ionic/ionic.h</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_api.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/pensando/ionic/ionic_api.h</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_aux.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/pensando/ionic/ionic_aux.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_aux.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/pensando/ionic/ionic_aux.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_bus.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/pensando/ionic/ionic_bus.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_bus_pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/pensando/ionic/ionic_bus_pci.c</a></td><td class='right'>540</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/pensando/ionic/ionic_debugfs.c</a></td><td class='right'>303</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_debugfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/pensando/ionic/ionic_debugfs.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_dev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/pensando/ionic/ionic_dev.c</a></td><td class='right'>1078</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_dev.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/pensando/ionic/ionic_dev.h</a></td><td class='right'>397</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_devlink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/pensando/ionic/ionic_devlink.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_devlink.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/pensando/ionic/ionic_devlink.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/pensando/ionic/ionic_ethtool.c</a></td><td class='right'>1174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_ethtool.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/pensando/ionic/ionic_ethtool.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_fw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/pensando/ionic/ionic_fw.c</a></td><td class='right'>201</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_if.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/pensando/ionic/ionic_if.h</a></td><td class='right'>3400</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_lif.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/pensando/ionic/ionic_lif.c</a></td><td class='right'>4108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_lif.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/pensando/ionic/ionic_lif.h</a></td><td class='right'>414</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/pensando/ionic/ionic_main.c</a></td><td class='right'>802</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_phc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/pensando/ionic/ionic_phc.c</a></td><td class='right'>661</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/pensando/ionic/ionic_regs.h</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_rx_filter.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/pensando/ionic/ionic_rx_filter.c</a></td><td class='right'>619</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_rx_filter.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/pensando/ionic/ionic_rx_filter.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_stats.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/pensando/ionic/ionic_stats.c</a></td><td class='right'>368</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_stats.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/pensando/ionic/ionic_stats.h</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_txrx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/pensando/ionic/ionic_txrx.c</a></td><td class='right'>1847</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/pensando/ionic/ionic_txrx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/pensando/ionic/ionic_txrx.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/Kconfig</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/netxen/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/netxen/Makefile</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/netxen/netxen_nic.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/netxen/netxen_nic.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/netxen/netxen_nic_ctx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/netxen/netxen_nic_ctx.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/netxen/netxen_nic_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/netxen/netxen_nic_ethtool.c</a></td><td class='right'>206</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/netxen/netxen_nic_hdr.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/netxen/netxen_nic_hdr.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/netxen/netxen_nic_init.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/netxen/netxen_nic_init.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c</a></td><td class='right'>261</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/Makefile</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed.h</a></td><td class='right'>1003</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_chain.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_chain.c</a></td><td class='right'>371</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_cxt.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_cxt.c</a></td><td class='right'>2571</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_cxt.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_cxt.h</a></td><td class='right'>367</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_dbg_hsi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_dbg_hsi.h</a></td><td class='right'>1460</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_dcbx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_dcbx.c</a></td><td class='right'>2414</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_dcbx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_dcbx.h</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_debug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_debug.c</a></td><td class='right'>8688</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 15.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 84.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_debug.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_debug.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_dev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_dev.c</a></td><td class='right'>5501</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_dev_api.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_dev_api.h</a></td><td class='right'>529</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_devlink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_devlink.c</a></td><td class='right'>245</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_devlink.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_devlink.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_fcoe.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_fcoe.c</a></td><td class='right'>1045</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_fcoe.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_fcoe.h</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_hsi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_hsi.h</a></td><td class='right'>10880</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 19.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 81.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_hw.c</a></td><td class='right'>922</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_hw.h</a></td><td class='right'>327</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c</a></td><td class='right'>1794</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_init_ops.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_init_ops.c</a></td><td class='right'>657</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_init_ops.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_init_ops.h</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_int.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_int.c</a></td><td class='right'>2423</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_int.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_int.h</a></td><td class='right'>459</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_iro_hsi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_iro_hsi.h</a></td><td class='right'>500</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_iscsi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_iscsi.c</a></td><td class='right'>1415</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_iscsi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_iscsi.h</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_iwarp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_iwarp.c</a></td><td class='right'>3262</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_iwarp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_iwarp.h</a></td><td class='right'>206</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_l2.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_l2.c</a></td><td class='right'>2920</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_l2.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_l2.h</a></td><td class='right'>454</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_ll2.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_ll2.c</a></td><td class='right'>2822</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_ll2.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_ll2.h</a></td><td class='right'>260</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_main.c</a></td><td class='right'>3205</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_mcp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_mcp.c</a></td><td class='right'>4234</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_mcp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_mcp.h</a></td><td class='right'>1396</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_mfw_hsi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_mfw_hsi.h</a></td><td class='right'>2475</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_mng_tlv.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_mng_tlv.c</a></td><td class='right'>1340</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_nvmetcp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_nvmetcp.c</a></td><td class='right'>829</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_nvmetcp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_nvmetcp.h</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_nvmetcp_fw_funcs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_nvmetcp_fw_funcs.c</a></td><td class='right'>375</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_nvmetcp_fw_funcs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_nvmetcp_fw_funcs.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_ooo.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_ooo.c</a></td><td class='right'>457</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_ooo.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_ooo.h</a></td><td class='right'>172</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_ptp.c</a></td><td class='right'>433</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_ptp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_ptp.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_rdma.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_rdma.c</a></td><td class='right'>2039</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_rdma.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_rdma.h</a></td><td class='right'>210</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_reg_addr.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_reg_addr.h</a></td><td class='right'>1725</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_roce.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_roce.c</a></td><td class='right'>1143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_roce.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_roce.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_selftest.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_selftest.c</a></td><td class='right'>185</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_selftest.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_selftest.h</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_sp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_sp.h</a></td><td class='right'>477</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_sp_commands.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_sp_commands.c</a></td><td class='right'>595</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_spq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_spq.c</a></td><td class='right'>1051</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_sriov.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_sriov.c</a></td><td class='right'>5305</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_sriov.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_sriov.h</a></td><td class='right'>501</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_vf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_vf.c</a></td><td class='right'>1707</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qed/qed_vf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qed/qed_vf.h</a></td><td class='right'>1275</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qede/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qede/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qede/qede.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qede/qede.h</a></td><td class='right'>609</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qede/qede_dcbnl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qede/qede_dcbnl.c</a></td><td class='right'>350</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qede/qede_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qede/qede_ethtool.c</a></td><td class='right'>2358</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qede/qede_filter.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qede/qede_filter.c</a></td><td class='right'>2097</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qede/qede_fp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qede/qede_fp.c</a></td><td class='right'>1806</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qede/qede_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qede/qede_main.c</a></td><td class='right'>2934</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qede/qede_ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qede/qede_ptp.c</a></td><td class='right'>561</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qede/qede_ptp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qede/qede_ptp.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qede/qede_rdma.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qede/qede_rdma.c</a></td><td class='right'>355</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qla3xxx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qla3xxx.c</a></td><td class='right'>359</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qla3xxx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qla3xxx.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qlcnic/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qlcnic/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qlcnic/qlcnic.h</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c</a></td><td class='right'>272</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_init.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_init.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_vnic.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_vnic.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qlcnic/qlcnic_ctx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_ctx.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qlcnic/qlcnic_dcb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_dcb.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qlcnic/qlcnic_dcb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_dcb.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qlcnic/qlcnic_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_ethtool.c</a></td><td class='right'>260</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_hdr.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_hw.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qlcnic/qlcnic_init.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_init.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qlcnic/qlcnic_io.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_io.c</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_main.c</a></td><td class='right'>295</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qlcnic/qlcnic_minidump.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_minidump.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_pf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_pf.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qlge/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qlge/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qlge/qlge.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qlge/qlge.h</a></td><td class='right'>2338</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.1%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qlge/qlge_dbg.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qlge/qlge_dbg.c</a></td><td class='right'>2042</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qlge/qlge_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qlge/qlge_ethtool.c</a></td><td class='right'>735</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qlge/qlge_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qlge/qlge_main.c</a></td><td class='right'>5014</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 8.8%;'/><td class='none' style='width: 91.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qlogic/qlge/qlge_mpi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qlogic/qlge/qlge_mpi.c</a></td><td class='right'>1284</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/Kconfig</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/Makefile</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/emac/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/emac/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/emac/emac-ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/emac/emac-ethtool.c</a></td><td class='right'>287</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/emac/emac-mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/emac/emac-mac.c</a></td><td class='right'>1483</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/emac/emac-mac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/emac/emac-mac.h</a></td><td class='right'>241</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/emac/emac-phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/emac/emac-phy.c</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/emac/emac-phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/emac/emac-phy.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/emac/emac-sgmii-fsm9900.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/emac/emac-sgmii-fsm9900.c</a></td><td class='right'>237</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2400.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2400.c</a></td><td class='right'>215</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2432.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/emac/emac-sgmii-qdf2432.c</a></td><td class='right'>202</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/emac/emac-sgmii.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/emac/emac-sgmii.c</a></td><td class='right'>458</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/emac/emac-sgmii.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/emac/emac-sgmii.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/emac/emac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/emac/emac.c</a></td><td class='right'>776</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/emac/emac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/emac/emac.h</a></td><td class='right'>386</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/ppe/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/ppe/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/ppe/ppe.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/ppe/ppe.c</a></td><td class='right'>239</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/ppe/ppe.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/ppe/ppe.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/ppe/ppe_config.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/ppe/ppe_config.c</a></td><td class='right'>2034</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/ppe/ppe_config.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/ppe/ppe_config.h</a></td><td class='right'>317</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/ppe/ppe_debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/ppe/ppe_debugfs.c</a></td><td class='right'>847</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/ppe/ppe_debugfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/ppe/ppe_debugfs.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/ppe/ppe_regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/ppe/ppe_regs.h</a></td><td class='right'>591</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/qca_7k.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/qca_7k.c</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/qca_7k.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/qca_7k.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/qca_7k_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/qca_7k_common.c</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/qca_7k_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/qca_7k_common.h</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/qca_debug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/qca_debug.c</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/qca_debug.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/qca_debug.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/qca_framing.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/qca_framing.c</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/qca_framing.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/qca_framing.h</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/qca_spi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/qca_spi.c</a></td><td class='right'>442</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/qca_spi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/qca_spi.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/qca_uart.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/qca_uart.c</a></td><td class='right'>402</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/rmnet/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/rmnet/Kconfig</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/rmnet/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/rmnet/Makefile</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/rmnet/rmnet_config.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/rmnet/rmnet_config.c</a></td><td class='right'>527</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/rmnet/rmnet_config.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/rmnet/rmnet_config.h</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/rmnet/rmnet_handlers.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/rmnet/rmnet_handlers.c</a></td><td class='right'>275</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/rmnet/rmnet_handlers.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/rmnet/rmnet_handlers.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/rmnet/rmnet_map.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/rmnet/rmnet_map.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/rmnet/rmnet_map_command.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/rmnet/rmnet_map_command.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/rmnet/rmnet_map_data.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/rmnet/rmnet_map_data.c</a></td><td class='right'>711</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/rmnet/rmnet_private.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/rmnet/rmnet_private.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/rmnet/rmnet_vnd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/rmnet/rmnet_vnd.c</a></td><td class='right'>409</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/qualcomm/rmnet/rmnet_vnd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/qualcomm/rmnet/rmnet_vnd.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/rdc/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/rdc/Kconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/rdc/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/rdc/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/rdc/r6040.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/rdc/r6040.c</a></td><td class='right'>281</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/realtek/8139cp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/realtek/8139cp.c</a></td><td class='right'>269</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/realtek/8139too.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/realtek/8139too.c</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/realtek/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/realtek/Kconfig</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/realtek/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/realtek/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/realtek/atp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/realtek/atp.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/realtek/atp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/realtek/atp.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/realtek/r8169.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/realtek/r8169.c</a></td><td class='right'>8375</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 14.7%;'/><td class='none' style='width: 85.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/realtek/r8169.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/realtek/r8169.h</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/realtek/r8169_firmware.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/realtek/r8169_firmware.c</a></td><td class='right'>233</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/realtek/r8169_firmware.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/realtek/r8169_firmware.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/realtek/r8169_leds.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/realtek/r8169_leds.c</a></td><td class='right'>275</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/realtek/r8169_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/realtek/r8169_main.c</a></td><td class='right'>5620</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/realtek/r8169_phy_config.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/realtek/r8169_phy_config.c</a></td><td class='right'>1354</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/realtek/rtase/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/realtek/rtase/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/realtek/rtase/rtase.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/realtek/rtase/rtase.h</a></td><td class='right'>362</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/realtek/rtase/rtase_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/realtek/rtase/rtase_main.c</a></td><td class='right'>2400</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/renesas/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/renesas/Kconfig</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/renesas/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/renesas/Makefile</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/renesas/ravb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/renesas/ravb.h</a></td><td class='right'>430</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/renesas/ravb_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/renesas/ravb_main.c</a></td><td class='right'>2923</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/renesas/ravb_ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/renesas/ravb_ptp.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/renesas/rcar_gen4_ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/renesas/rcar_gen4_ptp.c</a></td><td class='right'>187</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/renesas/rcar_gen4_ptp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/renesas/rcar_gen4_ptp.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/renesas/rswitch.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/renesas/rswitch.h</a></td><td class='right'>1074</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/renesas/rswitch_l2.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/renesas/rswitch_l2.c</a></td><td class='right'>316</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/renesas/rswitch_l2.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/renesas/rswitch_l2.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/renesas/rswitch_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/renesas/rswitch_main.c</a></td><td class='right'>2295</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/renesas/rtsn.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/renesas/rtsn.c</a></td><td class='right'>1371</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/renesas/rtsn.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/renesas/rtsn.h</a></td><td class='right'>464</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/renesas/sh_eth.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/renesas/sh_eth.c</a></td><td class='right'>2130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/renesas/sh_eth.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/renesas/sh_eth.h</a></td><td class='right'>298</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/rocker/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/rocker/Kconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/rocker/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/rocker/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/rocker/rocker.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/rocker/rocker.c</a></td><td class='right'>5320</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 9.3%;'/><td class='none' style='width: 90.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/rocker/rocker.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/rocker/rocker.h</a></td><td class='right'>585</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/rocker/rocker_hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/rocker/rocker_hw.h</a></td><td class='right'>462</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/rocker/rocker_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/rocker/rocker_main.c</a></td><td class='right'>3196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/rocker/rocker_ofdpa.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/rocker/rocker_ofdpa.c</a></td><td class='right'>2823</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/rocker/rocker_tlv.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/rocker/rocker_tlv.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/rocker/rocker_tlv.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/rocker/rocker_tlv.h</a></td><td class='right'>209</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/samsung/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/samsung/Kconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/samsung/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/samsung/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/samsung/sxgbe/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/samsung/sxgbe/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/samsung/sxgbe/sxgbe_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/samsung/sxgbe/sxgbe_common.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/samsung/sxgbe/sxgbe_desc.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/samsung/sxgbe/sxgbe_dma.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/samsung/sxgbe/sxgbe_main.c</a></td><td class='right'>204</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/samsung/sxgbe/sxgbe_mdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/samsung/sxgbe/sxgbe_mdio.c</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/samsung/sxgbe/sxgbe_mtl.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/samsung/sxgbe/sxgbe_platform.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/samsung/sxgbe/sxgbe_platform.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/samsung/sxgbe/sxgbe_reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/samsung/sxgbe/sxgbe_reg.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/samsung/sxgbe/sxgbe_xpcs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/samsung/sxgbe/sxgbe_xpcs.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/samsung/sxgbe/sxgbe_xpcs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/samsung/sxgbe/sxgbe_xpcs.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/seeq/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/seeq/Kconfig</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/seeq/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/seeq/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/seeq/ether3.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/seeq/ether3.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/seeq/ether3.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/seeq/ether3.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/seeq/sgiseeq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/seeq/sgiseeq.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/seeq/sgiseeq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/seeq/sgiseeq.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/Kconfig</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/Makefile</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/bitfield.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/bitfield.h</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/ef10.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/ef10.c</a></td><td class='right'>4022</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 93.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/ef100.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/ef100.c</a></td><td class='right'>558</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/ef100.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/ef100.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/ef100_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/ef100_ethtool.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/ef100_ethtool.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/ef100_ethtool.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/ef100_netdev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/ef100_netdev.c</a></td><td class='right'>532</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/ef100_netdev.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/ef100_netdev.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/ef100_nic.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/ef100_nic.c</a></td><td class='right'>1386</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/ef100_nic.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/ef100_nic.h</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/ef100_regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/ef100_regs.h</a></td><td class='right'>730</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/ef100_rep.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/ef100_rep.c</a></td><td class='right'>499</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/ef100_rep.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/ef100_rep.h</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/ef100_rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/ef100_rx.c</a></td><td class='right'>222</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/ef100_rx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/ef100_rx.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/ef100_sriov.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/ef100_sriov.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/ef100_sriov.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/ef100_sriov.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/ef100_tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/ef100_tx.c</a></td><td class='right'>520</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/ef100_tx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/ef100_tx.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/ef10_regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/ef10_regs.h</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/ef10_sriov.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/ef10_sriov.c</a></td><td class='right'>225</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/ef10_sriov.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/ef10_sriov.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/efx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/efx.c</a></td><td class='right'>3009</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 4.4%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/efx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/efx.h</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/efx_channels.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/efx_channels.c</a></td><td class='right'>1352</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/efx_channels.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/efx_channels.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/efx_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/efx_common.c</a></td><td class='right'>1404</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/efx_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/efx_common.h</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/efx_devlink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/efx_devlink.c</a></td><td class='right'>746</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/efx_devlink.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/efx_devlink.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/efx_reflash.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/efx_reflash.c</a></td><td class='right'>522</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/efx_reflash.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/efx_reflash.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/enum.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/enum.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/ethtool.c</a></td><td class='right'>1023</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/ethtool_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/ethtool_common.c</a></td><td class='right'>1329</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/ethtool_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/ethtool_common.h</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/falcon.c</a></td><td class='right'>2899</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.1%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/falcon/Kconfig</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/falcon/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/bitfield.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/falcon/bitfield.h</a></td><td class='right'>539</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/efx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/falcon/efx.c</a></td><td class='right'>3204</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/efx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/falcon/efx.h</a></td><td class='right'>273</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/enum.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/falcon/enum.h</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/falcon/ethtool.c</a></td><td class='right'>1359</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/falcon.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/falcon/falcon.c</a></td><td class='right'>2903</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/falcon_boards.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/falcon/falcon_boards.c</a> (renamed from drivers/net/ethernet/sfc/falcon_boards.c)</td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/farch.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/falcon/farch.c</a></td><td class='right'>2859</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/farch_regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/falcon/farch_regs.h</a></td><td class='right'>2929</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/filter.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/falcon/filter.h</a></td><td class='right'>269</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/io.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/falcon/io.h</a></td><td class='right'>285</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/mdio_10g.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/falcon/mdio_10g.c</a></td><td class='right'>332</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/mdio_10g.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/falcon/mdio_10g.h</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/mtd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/falcon/mtd.c</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/net_driver.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/falcon/net_driver.h</a></td><td class='right'>1336</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/nic.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/falcon/nic.c</a></td><td class='right'>510</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/nic.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/falcon/nic.h</a></td><td class='right'>507</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/falcon/phy.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/qt202x_phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/falcon/qt202x_phy.c</a></td><td class='right'>493</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/falcon/rx.c</a></td><td class='right'>980</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/selftest.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/falcon/selftest.c</a></td><td class='right'>816</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/selftest.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/falcon/selftest.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/tenxpress.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/falcon/tenxpress.c</a> (renamed from drivers/net/ethernet/sfc/tenxpress.c)</td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/falcon/tx.c</a></td><td class='right'>642</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/tx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/falcon/tx.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/txc43128_phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/falcon/txc43128_phy.c</a> (renamed from drivers/net/ethernet/sfc/txc43128_phy.c)</td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/falcon/workarounds.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/falcon/workarounds.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/farch.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/farch.c</a></td><td class='right'>2987</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.2%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/farch_regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/farch_regs.h</a></td><td class='right'>2932</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.1%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/filter.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/filter.h</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/fw_formats.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/fw_formats.h</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/io.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/io.h</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/mae.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/mae.c</a></td><td class='right'>2338</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/mae.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/mae.h</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/mae_counter_format.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/mae_counter_format.h</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/mcdi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/mcdi.c</a></td><td class='right'>850</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/mcdi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/mcdi.h</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/mcdi_filters.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/mcdi_filters.c</a></td><td class='right'>2308</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/mcdi_filters.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/mcdi_filters.h</a></td><td class='right'>174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/mcdi_functions.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/mcdi_functions.c</a></td><td class='right'>431</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/mcdi_functions.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/mcdi_functions.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/mcdi_mon.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/mcdi_mon.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/mcdi_pcol.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/mcdi_pcol.h</a></td><td class='right'>25487</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 37.7%;'/><td class='rem' style='width: 6.9%;'/><td class='none' style='width: 55.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/mcdi_pcol_mae.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/mcdi_pcol_mae.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/mcdi_port.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/mcdi_port.c</a></td><td class='right'>998</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/mcdi_port.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/mcdi_port.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/mcdi_port_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/mcdi_port_common.c</a></td><td class='right'>1288</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/mcdi_port_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/mcdi_port_common.h</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/mdio_10g.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/mdio_10g.c</a></td><td class='right'>323</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/mdio_10g.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/mdio_10g.h</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/mtd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/mtd.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/net_driver.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/net_driver.h</a></td><td class='right'>974</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/nic.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/nic.c</a></td><td class='right'>229</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/nic.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/nic.h</a></td><td class='right'>689</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/nic_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/nic_common.h</a></td><td class='right'>260</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/phy.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/ptp.c</a></td><td class='right'>1099</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/ptp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/ptp.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/qt202x_phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/qt202x_phy.c</a></td><td class='right'>495</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/rx.c</a></td><td class='right'>905</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/rx_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/rx_common.c</a></td><td class='right'>1045</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/rx_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/rx_common.h</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/selftest.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/selftest.c</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/selftest.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/selftest.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/Kconfig</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/Makefile</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/bitfield.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/bitfield.h</a></td><td class='right'>614</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/efx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/efx.c</a></td><td class='right'>1350</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/efx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/efx.h</a></td><td class='right'>218</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/efx_channels.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/efx_channels.c</a></td><td class='right'>1371</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/efx_channels.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/efx_channels.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/efx_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/efx_common.c</a></td><td class='right'>1398</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/efx_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/efx_common.h</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/enum.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/enum.h</a></td><td class='right'>176</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/ethtool.c</a></td><td class='right'>277</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/ethtool_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/ethtool_common.c</a></td><td class='right'>1232</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/ethtool_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/ethtool_common.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/farch.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/farch.c</a></td><td class='right'>2988</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/farch_regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/farch_regs.h</a></td><td class='right'>2929</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/filter.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/filter.h</a></td><td class='right'>309</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/io.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/io.h</a></td><td class='right'>310</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/mcdi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/mcdi.c</a></td><td class='right'>2260</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/mcdi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/mcdi.h</a></td><td class='right'>386</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/mcdi_mon.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/mcdi_mon.c</a></td><td class='right'>531</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/mcdi_pcol.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/mcdi_pcol.h</a></td><td class='right'>17204</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 30.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 69.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/mcdi_port.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/mcdi_port.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/mcdi_port.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/mcdi_port.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/mcdi_port_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/mcdi_port_common.c</a></td><td class='right'>1282</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/mcdi_port_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/mcdi_port_common.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/mtd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/mtd.c</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/net_driver.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/net_driver.h</a></td><td class='right'>1695</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/nic.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/nic.c</a></td><td class='right'>530</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/nic.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/nic.h</a></td><td class='right'>206</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/nic_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/nic_common.h</a></td><td class='right'>252</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/ptp.c</a></td><td class='right'>2196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/ptp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/ptp.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/rx.c</a></td><td class='right'>400</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/rx_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/rx_common.c</a></td><td class='right'>1037</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/rx_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/rx_common.h</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/selftest.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/selftest.c</a></td><td class='right'>819</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/selftest.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/selftest.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/siena.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/siena.c</a> (renamed from drivers/net/ethernet/sfc/siena.c)</td><td class='right'>277</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/siena_sriov.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/siena_sriov.c</a> (renamed from drivers/net/ethernet/sfc/siena_sriov.c)</td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/siena_sriov.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/siena_sriov.h</a> (renamed from drivers/net/ethernet/sfc/siena_sriov.h)</td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/sriov.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/sriov.h</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/tx.c</a></td><td class='right'>392</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/tx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/tx.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/tx_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/tx_common.c</a></td><td class='right'>448</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/tx_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/tx_common.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/vfdi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/vfdi.h</a> (renamed from drivers/net/ethernet/sfc/vfdi.h)</td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/siena/workarounds.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/siena/workarounds.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/sriov.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/sriov.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/sriov.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/sriov.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/tc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/tc.c</a></td><td class='right'>3094</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/tc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/tc.h</a></td><td class='right'>359</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/tc_bindings.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/tc_bindings.c</a></td><td class='right'>241</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/tc_bindings.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/tc_bindings.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/tc_conntrack.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/tc_conntrack.c</a></td><td class='right'>625</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/tc_conntrack.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/tc_conntrack.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/tc_counters.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/tc_counters.c</a></td><td class='right'>563</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/tc_counters.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/tc_counters.h</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/tc_encap_actions.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/tc_encap_actions.c</a></td><td class='right'>753</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/tc_encap_actions.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/tc_encap_actions.h</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/tx.c</a></td><td class='right'>1343</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/tx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/tx.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/tx_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/tx_common.c</a></td><td class='right'>488</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/tx_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/tx_common.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/tx_tso.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/tx_tso.c</a></td><td class='right'>448</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sfc/workarounds.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sfc/workarounds.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sgi/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sgi/Kconfig</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sgi/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sgi/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sgi/ioc3-eth.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sgi/ioc3-eth.c</a></td><td class='right'>1446</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sgi/meth.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sgi/meth.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sgi/meth.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sgi/meth.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/silan/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/silan/Kconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/silan/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/silan/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/silan/sc92031.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/silan/sc92031.c</a></td><td class='right'>192</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sis/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sis/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sis/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sis/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sis/sis190.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sis/sis190.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sis/sis900.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sis/sis900.c</a></td><td class='right'>348</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sis/sis900.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sis/sis900.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/smsc/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/smsc/Kconfig</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/smsc/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/smsc/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/smsc/epic100.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/smsc/epic100.c</a></td><td class='right'>190</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/smsc/smc911x.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/smsc/smc911x.c</a></td><td class='right'>2179</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.8%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/smsc/smc911x.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/smsc/smc911x.h</a></td><td class='right'>923</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/smsc/smc9194.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/smsc/smc9194.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/smsc/smc91c92_cs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/smsc/smc91c92_cs.c</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/smsc/smc91x.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/smsc/smc91x.c</a></td><td class='right'>203</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/smsc/smc91x.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/smsc/smc91x.h</a></td><td class='right'>293</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/smsc/smsc911x.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/smsc/smsc911x.c</a></td><td class='right'>613</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/smsc/smsc911x.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/smsc/smsc911x.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/smsc/smsc9420.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/smsc/smsc9420.c</a></td><td class='right'>251</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/smsc/smsc9420.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/smsc/smsc9420.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/socionext/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/socionext/Kconfig</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/socionext/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/socionext/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/socionext/netsec.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/socionext/netsec.c</a></td><td class='right'>2230</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/socionext/sni_ave.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/socionext/sni_ave.c</a></td><td class='right'>1988</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/spacemit/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/spacemit/Kconfig</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/spacemit/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/spacemit/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/spacemit/k1_emac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/spacemit/k1_emac.c</a></td><td class='right'>2162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/spacemit/k1_emac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/spacemit/k1_emac.h</a></td><td class='right'>416</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/Kconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/Kconfig</a></td><td class='right'>316</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/Makefile</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/chain_mode.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/chain_mode.c</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/common.h</a></td><td class='right'>620</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/descs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/descs.h</a></td><td class='right'>363</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/descs_com.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/descs_com.h</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c</a></td><td class='right'>373</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c</a></td><td class='right'>235</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-generic.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac-generic.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c</a></td><td class='right'>396</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac-ingenic.c</a></td><td class='right'>284</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c</a></td><td class='right'>1408</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c</a></td><td class='right'>281</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c</a></td><td class='right'>631</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson1.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac-loongson1.c</a></td><td class='right'>240</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-lpc18xx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac-lpc18xx.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c</a></td><td class='right'>685</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-meson.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac-meson.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c</a></td><td class='right'>520</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c</a></td><td class='right'>853</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-renesas-gbeth.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac-renesas-gbeth.c</a></td><td class='right'>235</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c</a></td><td class='right'>1873</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-rzn1.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac-rzn1.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-s32.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac-s32.c</a></td><td class='right'>186</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c</a></td><td class='right'>664</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-sophgo.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac-sophgo.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-sti.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac-sti.c</a></td><td class='right'>268</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c</a></td><td class='right'>685</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-sun55i.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac-sun55i.c</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c</a></td><td class='right'>1302</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-tegra.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac-tegra.c</a></td><td class='right'>403</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c</a></td><td class='right'>286</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac-visconti.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac-visconti.c</a></td><td class='right'>274</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac100.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac100.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac1000.h</a></td><td class='right'>185</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c</a></td><td class='right'>428</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c</a></td><td class='right'>291</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac4.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac4.h</a></td><td class='right'>534</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c</a></td><td class='right'>1045</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c</a></td><td class='right'>600</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.h</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c</a></td><td class='right'>607</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h</a></td><td class='right'>255</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c</a></td><td class='right'>274</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac5.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac5.c</a></td><td class='right'>574</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac5.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac5.h</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h</a></td><td class='right'>491</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c</a></td><td class='right'>1604</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwxgmac2_descs.c</a></td><td class='right'>393</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c</a></td><td class='right'>621</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/dwxlgmac2.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/dwxlgmac2.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/enh_desc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/enh_desc.c</a></td><td class='right'>353</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/hwif.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/hwif.c</a></td><td class='right'>410</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/hwif.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/hwif.h</a></td><td class='right'>707</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/mmc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/mmc.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/mmc_core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/mmc_core.c</a></td><td class='right'>725</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/norm_desc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/norm_desc.c</a></td><td class='right'>247</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/ring_mode.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/ring_mode.c</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/stmmac.h</a></td><td class='right'>429</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_est.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/stmmac_est.c</a></td><td class='right'>179</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_est.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/stmmac_est.h</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c</a></td><td class='right'>1030</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c</a></td><td class='right'>314</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c</a></td><td class='right'>275</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_libpci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/stmmac_libpci.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_libpci.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/stmmac_libpci.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/stmmac_main.c</a></td><td class='right'>8475</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.9%;'/><td class='rem' style='width: 3.0%;'/><td class='none' style='width: 85.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c</a></td><td class='right'>784</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c</a></td><td class='right'>257</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/stmmac_pcs.h</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c</a></td><td class='right'>968</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/stmmac_platform.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c</a></td><td class='right'>314</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_selftests.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/stmmac_selftests.c</a></td><td class='right'>2049</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c</a></td><td class='right'>1289</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c</a></td><td class='right'>375</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.h</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_xdp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/stmmac_xdp.c</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/stmicro/stmmac/stmmac_xdp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/stmicro/stmmac/stmmac_xdp.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sun/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sun/Kconfig</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sun/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sun/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sun/cassini.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sun/cassini.c</a></td><td class='right'>446</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sun/cassini.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sun/cassini.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sun/ldmvsw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sun/ldmvsw.c</a></td><td class='right'>478</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sun/niu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sun/niu.c</a></td><td class='right'>425</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sun/niu.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sun/niu.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sun/sunbmac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sun/sunbmac.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sun/sunbmac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sun/sunbmac.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sun/sungem.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sun/sungem.c</a></td><td class='right'>391</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sun/sungem.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sun/sungem.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sun/sunhme.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sun/sunhme.c</a></td><td class='right'>1831</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sun/sunhme.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sun/sunhme.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sun/sunqe.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sun/sunqe.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sun/sunqe.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sun/sunqe.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sun/sunvnet.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sun/sunvnet.c</a></td><td class='right'>1842</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sun/sunvnet.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sun/sunvnet.h</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sun/sunvnet_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sun/sunvnet_common.c</a></td><td class='right'>1814</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sun/sunvnet_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sun/sunvnet_common.h</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sunplus/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sunplus/Kconfig</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sunplus/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sunplus/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sunplus/spl2sw_define.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sunplus/spl2sw_define.h</a></td><td class='right'>270</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sunplus/spl2sw_desc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sunplus/spl2sw_desc.c</a></td><td class='right'>228</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sunplus/spl2sw_desc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sunplus/spl2sw_desc.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sunplus/spl2sw_driver.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sunplus/spl2sw_driver.c</a></td><td class='right'>563</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sunplus/spl2sw_int.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sunplus/spl2sw_int.c</a></td><td class='right'>273</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sunplus/spl2sw_int.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sunplus/spl2sw_int.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sunplus/spl2sw_mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sunplus/spl2sw_mac.c</a></td><td class='right'>274</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sunplus/spl2sw_mac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sunplus/spl2sw_mac.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sunplus/spl2sw_mdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sunplus/spl2sw_mdio.c</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sunplus/spl2sw_mdio.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sunplus/spl2sw_mdio.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sunplus/spl2sw_phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sunplus/spl2sw_phy.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sunplus/spl2sw_phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sunplus/spl2sw_phy.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/sunplus/spl2sw_register.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/sunplus/spl2sw_register.h</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/synopsys/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/synopsys/Kconfig</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/synopsys/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/synopsys/Makefile</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/synopsys/dwc-xlgmac-common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/synopsys/dwc-xlgmac-common.c</a></td><td class='right'>730</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/synopsys/dwc-xlgmac-desc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/synopsys/dwc-xlgmac-desc.c</a></td><td class='right'>644</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/synopsys/dwc-xlgmac-ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/synopsys/dwc-xlgmac-ethtool.c</a></td><td class='right'>268</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c</a></td><td class='right'>3147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/synopsys/dwc-xlgmac-net.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/synopsys/dwc-xlgmac-net.c</a></td><td class='right'>1350</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/synopsys/dwc-xlgmac-pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/synopsys/dwc-xlgmac-pci.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/synopsys/dwc-xlgmac-reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/synopsys/dwc-xlgmac-reg.h</a></td><td class='right'>744</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/synopsys/dwc-xlgmac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/synopsys/dwc-xlgmac.h</a></td><td class='right'>661</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/tehuti/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/tehuti/Kconfig</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/tehuti/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/tehuti/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/tehuti/tehuti.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/tehuti/tehuti.c</a></td><td class='right'>261</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/tehuti/tehuti.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/tehuti/tehuti.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/tehuti/tn40.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/tehuti/tn40.c</a></td><td class='right'>1857</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/tehuti/tn40.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/tehuti/tn40.h</a></td><td class='right'>266</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/tehuti/tn40_mdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/tehuti/tn40_mdio.c</a></td><td class='right'>220</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/tehuti/tn40_phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/tehuti/tn40_phy.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/tehuti/tn40_regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/tehuti/tn40_regs.h</a></td><td class='right'>245</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/Kconfig</a></td><td class='right'>209</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/Makefile</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/am65-cpsw-ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/am65-cpsw-ethtool.c</a></td><td class='right'>1013</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/am65-cpsw-nuss.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/am65-cpsw-nuss.c</a></td><td class='right'>3816</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/am65-cpsw-nuss.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/am65-cpsw-nuss.h</a></td><td class='right'>231</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/am65-cpsw-qos.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/am65-cpsw-qos.c</a></td><td class='right'>1343</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/am65-cpsw-qos.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/am65-cpsw-qos.h</a></td><td class='right'>227</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/am65-cpsw-switchdev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/am65-cpsw-switchdev.c</a></td><td class='right'>534</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/am65-cpsw-switchdev.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/am65-cpsw-switchdev.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/am65-cpts.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/am65-cpts.c</a></td><td class='right'>1355</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/am65-cpts.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/am65-cpts.h</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/cpmac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/cpmac.c</a></td><td class='right'>1295</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/cpsw-common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/cpsw-common.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/cpsw-phy-sel.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/cpsw-phy-sel.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/cpsw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/cpsw.c</a></td><td class='right'>2800</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/cpsw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/cpsw.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/cpsw_ale.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/cpsw_ale.c</a></td><td class='right'>1203</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/cpsw_ale.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/cpsw_ale.h</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/cpsw_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/cpsw_ethtool.c</a></td><td class='right'>735</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/cpsw_new.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/cpsw_new.c</a></td><td class='right'>2146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/cpsw_priv.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/cpsw_priv.c</a></td><td class='right'>1566</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/cpsw_priv.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/cpsw_priv.h</a></td><td class='right'>518</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/cpsw_sl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/cpsw_sl.c</a></td><td class='right'>328</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/cpsw_sl.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/cpsw_sl.h</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/cpsw_switchdev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/cpsw_switchdev.c</a></td><td class='right'>544</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/cpsw_switchdev.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/cpsw_switchdev.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/cpts.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/cpts.c</a></td><td class='right'>784</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/cpts.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/cpts.h</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/davinci_cpdma.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/davinci_cpdma.c</a></td><td class='right'>1184</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/davinci_cpdma.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/davinci_cpdma.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/davinci_emac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/davinci_emac.c</a></td><td class='right'>593</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/davinci_mdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/davinci_mdio.c</a></td><td class='right'>525</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/icssg/icss_iep.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/icssg/icss_iep.c</a></td><td class='right'>1107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/icssg/icss_iep.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/icssg/icss_iep.h</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/icssg/icssg_classifier.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/icssg/icssg_classifier.c</a></td><td class='right'>469</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/icssg/icssg_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/icssg/icssg_common.c</a></td><td class='right'>1853</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/icssg/icssg_config.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/icssg/icssg_config.c</a></td><td class='right'>864</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/icssg/icssg_config.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/icssg/icssg_config.h</a></td><td class='right'>335</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/icssg/icssg_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/icssg/icssg_ethtool.c</a></td><td class='right'>321</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/icssg/icssg_mii_cfg.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/icssg/icssg_mii_cfg.c</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/icssg/icssg_mii_rt.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/icssg/icssg_mii_rt.h</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/icssg/icssg_prueth.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/icssg/icssg_prueth.c</a></td><td class='right'>2364</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/icssg/icssg_prueth.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/icssg/icssg_prueth.h</a></td><td class='right'>526</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c</a></td><td class='right'>1250</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/icssg/icssg_queues.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/icssg/icssg_queues.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/icssg/icssg_stats.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/icssg/icssg_stats.c</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/icssg/icssg_stats.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/icssg/icssg_stats.h</a></td><td class='right'>204</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/icssg/icssg_switch_map.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/icssg/icssg_switch_map.h</a></td><td class='right'>270</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/icssg/icssg_switchdev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/icssg/icssg_switchdev.c</a></td><td class='right'>477</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/icssg/icssg_switchdev.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/icssg/icssg_switchdev.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/icssm/icssm_prueth.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/icssm/icssm_prueth.c</a></td><td class='right'>1746</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/icssm/icssm_prueth.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/icssm/icssm_prueth.h</a></td><td class='right'>262</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/icssm/icssm_prueth_ptp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/icssm/icssm_prueth_ptp.h</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/icssm/icssm_switch.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/icssm/icssm_switch.h</a></td><td class='right'>257</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/k3-cppi-desc-pool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/k3-cppi-desc-pool.c</a></td><td class='right'>172</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/k3-cppi-desc-pool.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/k3-cppi-desc-pool.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/netcp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/netcp.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/netcp_core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/netcp_core.c</a></td><td class='right'>569</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/netcp_ethss.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/netcp_ethss.c</a></td><td class='right'>1298</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/netcp_sgmii.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/netcp_sgmii.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/netcp_xgbepcsr.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/netcp_xgbepcsr.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/ti/tlan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/ti/tlan.c</a></td><td class='right'>272</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/tile/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/tile/Kconfig</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/tile/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/tile/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/tile/tilegx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/tile/tilegx.c</a></td><td class='right'>2281</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/tile/tilepro.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/tile/tilepro.c</a></td><td class='right'>2420</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.2%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/toshiba/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/toshiba/Kconfig</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/toshiba/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/toshiba/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/toshiba/ps3_gelic_net.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/toshiba/ps3_gelic_net.c</a></td><td class='right'>390</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/toshiba/ps3_gelic_net.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/toshiba/ps3_gelic_net.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/toshiba/ps3_gelic_wireless.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/toshiba/ps3_gelic_wireless.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/toshiba/ps3_gelic_wireless.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/toshiba/ps3_gelic_wireless.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/toshiba/spider_net.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/toshiba/spider_net.c</a></td><td class='right'>2571</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.5%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/toshiba/spider_net.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/toshiba/spider_net.h</a></td><td class='right'>489</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/toshiba/spider_net_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/toshiba/spider_net_ethtool.c</a></td><td class='right'>181</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/toshiba/tc35815.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/toshiba/tc35815.c</a></td><td class='right'>252</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/tundra/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/tundra/Kconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/tundra/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/tundra/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/tundra/tsi108_eth.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/tundra/tsi108_eth.c</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/tundra/tsi108_eth.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/tundra/tsi108_eth.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/vertexcom/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/vertexcom/Kconfig</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/vertexcom/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/vertexcom/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/vertexcom/mse102x.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/vertexcom/mse102x.c</a></td><td class='right'>806</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/via/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/via/Kconfig</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/via/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/via/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/via/via-rhine.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/via/via-rhine.c</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/via/via-velocity.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/via/via-velocity.c</a></td><td class='right'>409</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/via/via-velocity.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/via/via-velocity.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/Kconfig</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/libwx/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/wx_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/libwx/wx_ethtool.c</a></td><td class='right'>762</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/wx_ethtool.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/libwx/wx_ethtool.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/wx_hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/libwx/wx_hw.c</a></td><td class='right'>2977</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/wx_hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/libwx/wx_hw.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/wx_lib.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/libwx/wx_lib.c</a></td><td class='right'>3358</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/wx_lib.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/libwx/wx_lib.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/wx_mbx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/libwx/wx_mbx.c</a></td><td class='right'>419</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/wx_mbx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/libwx/wx_mbx.h</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/wx_ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/libwx/wx_ptp.c</a></td><td class='right'>905</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/wx_ptp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/libwx/wx_ptp.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/wx_sriov.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/libwx/wx_sriov.c</a></td><td class='right'>929</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/wx_sriov.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/libwx/wx_sriov.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/wx_type.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/libwx/wx_type.h</a></td><td class='right'>1507</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/wx_vf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/libwx/wx_vf.c</a></td><td class='right'>599</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/wx_vf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/libwx/wx_vf.h</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/wx_vf_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/libwx/wx_vf_common.c</a></td><td class='right'>414</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/wx_vf_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/libwx/wx_vf_common.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/wx_vf_lib.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/libwx/wx_vf_lib.c</a></td><td class='right'>292</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/libwx/wx_vf_lib.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/libwx/wx_vf_lib.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/ngbe/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/ngbe/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/ngbe/ngbe_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/ngbe/ngbe_ethtool.c</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/ngbe/ngbe_ethtool.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/ngbe/ngbe_ethtool.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/ngbe/ngbe_hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/ngbe/ngbe_hw.c</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/ngbe/ngbe_hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/ngbe/ngbe_hw.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/ngbe/ngbe_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/ngbe/ngbe_main.c</a></td><td class='right'>889</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/ngbe/ngbe_mdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/ngbe/ngbe_mdio.c</a></td><td class='right'>203</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/ngbe/ngbe_mdio.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/ngbe/ngbe_mdio.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/ngbe/ngbe_type.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/ngbe/ngbe_type.h</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/ngbevf/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/ngbevf/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/ngbevf/ngbevf_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/ngbevf/ngbevf_main.c</a></td><td class='right'>266</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/ngbevf/ngbevf_type.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/ngbevf/ngbevf_type.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/txgbe/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/txgbe/Makefile</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/txgbe/txgbe_aml.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/txgbe/txgbe_aml.c</a></td><td class='right'>530</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/txgbe/txgbe_aml.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/txgbe/txgbe_aml.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/txgbe/txgbe_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/txgbe/txgbe_ethtool.c</a></td><td class='right'>606</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/txgbe/txgbe_ethtool.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/txgbe/txgbe_ethtool.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/txgbe/txgbe_fdir.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/txgbe/txgbe_fdir.c</a></td><td class='right'>648</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/txgbe/txgbe_fdir.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/txgbe/txgbe_fdir.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/txgbe/txgbe_hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/txgbe/txgbe_hw.c</a></td><td class='right'>227</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/txgbe/txgbe_hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/txgbe/txgbe_hw.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/txgbe/txgbe_irq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/txgbe/txgbe_irq.c</a></td><td class='right'>268</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/txgbe/txgbe_irq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/txgbe/txgbe_irq.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/txgbe/txgbe_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/txgbe/txgbe_main.c</a></td><td class='right'>986</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c</a></td><td class='right'>676</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/txgbe/txgbe_phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/txgbe/txgbe_phy.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/txgbe/txgbe_type.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/txgbe/txgbe_type.h</a></td><td class='right'>482</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/txgbevf/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/txgbevf/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/txgbevf/txgbevf_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/txgbevf/txgbevf_main.c</a></td><td class='right'>331</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wangxun/txgbevf/txgbevf_type.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wangxun/txgbevf/txgbevf_type.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wiznet/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wiznet/Kconfig</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wiznet/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wiznet/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wiznet/w5100-spi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wiznet/w5100-spi.c</a></td><td class='right'>483</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wiznet/w5100.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wiznet/w5100.c</a></td><td class='right'>1091</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wiznet/w5100.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wiznet/w5100.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/wiznet/w5300.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/wiznet/w5300.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/xilinx/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/xilinx/Kconfig</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/xilinx/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/xilinx/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/xilinx/ll_temac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/xilinx/ll_temac.h</a></td><td class='right'>226</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/xilinx/ll_temac_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/xilinx/ll_temac_main.c</a></td><td class='right'>1231</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/xilinx/ll_temac_mdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/xilinx/ll_temac_mdio.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/xilinx/xilinx_axienet.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/xilinx/xilinx_axienet.h</a></td><td class='right'>430</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/xilinx/xilinx_axienet_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/xilinx/xilinx_axienet_main.c</a></td><td class='right'>2940</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c</a></td><td class='right'>238</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/xilinx/xilinx_emaclite.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/xilinx/xilinx_emaclite.c</a></td><td class='right'>512</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/xircom/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/xircom/Kconfig</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/xircom/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/xircom/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/xircom/xirc2ps_cs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/xircom/xirc2ps_cs.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/xscale/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/xscale/Kconfig</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/xscale/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/xscale/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/xscale/ixp46x_ts.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/xscale/ixp46x_ts.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/xscale/ixp4xx_eth.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/xscale/ixp4xx_eth.c</a></td><td class='right'>529</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ethernet/xscale/ptp_ixp46x.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/xscale/ptp_ixp46x.c</a></td><td class='right'>321</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/Kconfig</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/defxx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/defxx.c</a></td><td class='right'>152</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/defxx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/defxx.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/defza.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/defza.c</a></td><td class='right'>1565</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/defza.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/defza.h</a></td><td class='right'>792</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/skfp/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/skfp/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/skfp/cfm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/skfp/cfm.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/skfp/drvfbi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/skfp/drvfbi.c</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/skfp/ecm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/skfp/ecm.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/skfp/ess.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/skfp/ess.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/skfp/fplustm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/skfp/fplustm.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/skfp/h/cmtdef.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/skfp/h/cmtdef.h</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/skfp/h/fddi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/skfp/h/fddi.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/skfp/h/fddimib.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/skfp/h/fddimib.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/skfp/h/fplustm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/skfp/h/fplustm.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/skfp/h/hwmtm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/skfp/h/hwmtm.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/skfp/h/mbuf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/skfp/h/mbuf.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/skfp/h/osdef1st.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/skfp/h/osdef1st.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/skfp/h/sba.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/skfp/h/sba.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/skfp/h/sba_def.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/skfp/h/sba_def.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/skfp/h/skfbi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/skfp/h/skfbi.h</a></td><td class='right'>234</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/skfp/h/skfbiinc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/skfp/h/skfbiinc.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/skfp/h/smc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/skfp/h/smc.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/skfp/h/smt.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/skfp/h/smt.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/skfp/h/smt_p.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/skfp/h/smt_p.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/skfp/h/smtstate.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/skfp/h/smtstate.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/skfp/h/supern_2.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/skfp/h/supern_2.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/skfp/h/targethw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/skfp/h/targethw.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/skfp/h/targetos.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/skfp/h/targetos.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/skfp/h/types.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/skfp/h/types.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/skfp/hwmtm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/skfp/hwmtm.c</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/skfp/hwt.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/skfp/hwt.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/skfp/pcmplc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/skfp/pcmplc.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/skfp/pmf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/skfp/pmf.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/skfp/queue.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/skfp/queue.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/skfp/rmt.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/skfp/rmt.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/skfp/skfddi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/skfp/skfddi.c</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/skfp/smt.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/skfp/smt.c</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/skfp/smtdef.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/skfp/smtdef.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/skfp/smtinit.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/skfp/smtinit.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/skfp/smttimer.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/skfp/smttimer.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/fddi/skfp/srf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fddi/skfp/srf.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/fjes/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fjes/Makefile</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/fjes/fjes.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fjes/fjes.h</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/fjes/fjes_debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fjes/fjes_debugfs.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/fjes/fjes_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fjes/fjes_ethtool.c</a></td><td class='right'>280</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/fjes/fjes_hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fjes/fjes_hw.c</a></td><td class='right'>1323</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/fjes/fjes_hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fjes/fjes_hw.h</a></td><td class='right'>356</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/fjes/fjes_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fjes/fjes_main.c</a></td><td class='right'>1543</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/fjes/fjes_regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fjes/fjes_regs.h</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/fjes/fjes_trace.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fjes/fjes_trace.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/fjes/fjes_trace.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/fjes/fjes_trace.h</a></td><td class='right'>365</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/geneve.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/geneve.c</a></td><td class='right'>1901</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/gtp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/gtp.c</a></td><td class='right'>2544</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/hamradio/6pack.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/hamradio/6pack.c</a></td><td class='right'>274</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/hamradio/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/hamradio/Kconfig</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/hamradio/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/hamradio/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/hamradio/baycom_epp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/hamradio/baycom_epp.c</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/hamradio/baycom_par.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/hamradio/baycom_par.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/hamradio/baycom_ser_fdx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/hamradio/baycom_ser_fdx.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/hamradio/baycom_ser_hdx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/hamradio/baycom_ser_hdx.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/hamradio/bpqether.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/hamradio/bpqether.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/hamradio/dmascc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/hamradio/dmascc.c</a></td><td class='right'>1458</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/hamradio/hdlcdrv.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/hamradio/hdlcdrv.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/hamradio/mkiss.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/hamradio/mkiss.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/hamradio/scc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/hamradio/scc.c</a></td><td class='right'>164</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/hamradio/yam.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/hamradio/yam.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/hamradio/z8530.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/hamradio/z8530.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/hippi/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/hippi/Kconfig</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/hippi/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/hippi/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/hippi/rrunner.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/hippi/rrunner.c</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/hippi/rrunner.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/hippi/rrunner.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/hyperv/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/hyperv/Kconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/hyperv/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/hyperv/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/hyperv/hyperv_net.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/hyperv/hyperv_net.h</a></td><td class='right'>960</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/hyperv/netvsc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/hyperv/netvsc.c</a></td><td class='right'>1916</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/hyperv/netvsc_bpf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/hyperv/netvsc_bpf.c</a></td><td class='right'>292</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/hyperv/netvsc_drv.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/hyperv/netvsc_drv.c</a></td><td class='right'>3070</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/hyperv/netvsc_trace.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/hyperv/netvsc_trace.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/hyperv/netvsc_trace.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/hyperv/netvsc_trace.h</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/hyperv/rndis_filter.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/hyperv/rndis_filter.c</a></td><td class='right'>1322</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ieee802154/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ieee802154/Kconfig</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ieee802154/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ieee802154/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ieee802154/adf7242.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ieee802154/adf7242.c</a></td><td class='right'>1353</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ieee802154/at86rf230.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ieee802154/at86rf230.c</a></td><td class='right'>521</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ieee802154/at86rf230.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ieee802154/at86rf230.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ieee802154/atusb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ieee802154/atusb.c</a></td><td class='right'>678</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ieee802154/atusb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ieee802154/atusb.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ieee802154/ca8210.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ieee802154/ca8210.c</a></td><td class='right'>3163</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ieee802154/cc2520.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ieee802154/cc2520.c</a></td><td class='right'>318</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ieee802154/fakelb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ieee802154/fakelb.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ieee802154/mac802154_hwsim.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ieee802154/mac802154_hwsim.c</a></td><td class='right'>1092</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ieee802154/mac802154_hwsim.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ieee802154/mac802154_hwsim.h</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ieee802154/mcr20a.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ieee802154/mcr20a.c</a></td><td class='right'>1362</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ieee802154/mcr20a.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ieee802154/mcr20a.h</a></td><td class='right'>489</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ieee802154/mrf24j40.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ieee802154/mrf24j40.c</a></td><td class='right'>1458</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ifb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ifb.c</a></td><td class='right'>361</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/Kconfig</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/Makefile</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/data/ipa_data-v3.1.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/data/ipa_data-v3.1.c</a></td><td class='right'>538</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/data/ipa_data-v3.5.1.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/data/ipa_data-v3.5.1.c</a></td><td class='right'>423</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/data/ipa_data-v4.11.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/data/ipa_data-v4.11.c</a></td><td class='right'>406</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/data/ipa_data-v4.2.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/data/ipa_data-v4.2.c</a></td><td class='right'>385</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/data/ipa_data-v4.5.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/data/ipa_data-v4.5.c</a></td><td class='right'>462</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/data/ipa_data-v4.7.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/data/ipa_data-v4.7.c</a></td><td class='right'>405</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/data/ipa_data-v4.9.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/data/ipa_data-v4.9.c</a></td><td class='right'>456</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/data/ipa_data-v5.0.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/data/ipa_data-v5.0.c</a></td><td class='right'>481</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/data/ipa_data-v5.5.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/data/ipa_data-v5.5.c</a></td><td class='right'>487</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/gsi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/gsi.c</a></td><td class='right'>2433</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/gsi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/gsi.h</a></td><td class='right'>277</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/gsi_private.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/gsi_private.h</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/gsi_reg.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/gsi_reg.c</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/gsi_reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/gsi_reg.h</a></td><td class='right'>383</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/gsi_trans.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/gsi_trans.c</a></td><td class='right'>790</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/gsi_trans.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/gsi_trans.h</a></td><td class='right'>229</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/ipa.h</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_cmd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/ipa_cmd.c</a></td><td class='right'>648</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_cmd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/ipa_cmd.h</a></td><td class='right'>163</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_data.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/ipa_data.h</a></td><td class='right'>253</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_endpoint.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/ipa_endpoint.c</a></td><td class='right'>2198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_endpoint.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/ipa_endpoint.h</a></td><td class='right'>207</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_gsi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/ipa_gsi.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_gsi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/ipa_gsi.h</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_interrupt.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/ipa_interrupt.c</a></td><td class='right'>344</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_interrupt.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/ipa_interrupt.h</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/ipa_main.c</a></td><td class='right'>1019</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_mem.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/ipa_mem.c</a></td><td class='right'>683</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_mem.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/ipa_mem.h</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_modem.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/ipa_modem.c</a></td><td class='right'>498</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_modem.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/ipa_modem.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_power.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/ipa_power.c</a></td><td class='right'>308</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_power.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/ipa_power.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_qmi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/ipa_qmi.c</a></td><td class='right'>533</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_qmi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/ipa_qmi.h</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_qmi_msg.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/ipa_qmi_msg.c</a></td><td class='right'>724</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_qmi_msg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/ipa_qmi_msg.h</a></td><td class='right'>262</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_reg.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/ipa_reg.c</a></td><td class='right'>169</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/ipa_reg.h</a></td><td class='right'>647</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_resource.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/ipa_resource.c</a></td><td class='right'>177</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_resource.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/ipa_resource.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_smp2p.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/ipa_smp2p.c</a></td><td class='right'>348</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_smp2p.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/ipa_smp2p.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_sysfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/ipa_sysfs.c</a></td><td class='right'>174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_sysfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/ipa_sysfs.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/ipa_table.c</a></td><td class='right'>775</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_table.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/ipa_table.h</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_uc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/ipa_uc.c</a></td><td class='right'>260</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_uc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/ipa_uc.h</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/ipa_version.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/ipa_version.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/reg.h</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/reg/gsi_reg-v3.1.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/reg/gsi_reg-v3.1.c</a></td><td class='right'>293</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/reg/gsi_reg-v3.5.1.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/reg/gsi_reg-v3.5.1.c</a></td><td class='right'>305</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/reg/gsi_reg-v4.0.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/reg/gsi_reg-v4.0.c</a></td><td class='right'>310</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/reg/gsi_reg-v4.11.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/reg/gsi_reg-v4.11.c</a></td><td class='right'>315</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/reg/gsi_reg-v4.5.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/reg/gsi_reg-v4.5.c</a></td><td class='right'>313</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/reg/gsi_reg-v4.9.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/reg/gsi_reg-v4.9.c</a></td><td class='right'>314</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/reg/gsi_reg-v5.0.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/reg/gsi_reg-v5.0.c</a></td><td class='right'>319</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/reg/ipa_reg-v3.1.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/reg/ipa_reg-v3.1.c</a></td><td class='right'>436</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/reg/ipa_reg-v3.5.1.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/reg/ipa_reg-v3.5.1.c</a></td><td class='right'>446</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/reg/ipa_reg-v4.11.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/reg/ipa_reg-v4.11.c</a></td><td class='right'>502</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/reg/ipa_reg-v4.2.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/reg/ipa_reg-v4.2.c</a></td><td class='right'>460</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/reg/ipa_reg-v4.5.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/reg/ipa_reg-v4.5.c</a></td><td class='right'>523</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/reg/ipa_reg-v4.7.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/reg/ipa_reg-v4.7.c</a></td><td class='right'>494</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/reg/ipa_reg-v4.9.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/reg/ipa_reg-v4.9.c</a></td><td class='right'>499</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/reg/ipa_reg-v5.0.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/reg/ipa_reg-v5.0.c</a></td><td class='right'>566</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipa/reg/ipa_reg-v5.5.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipa/reg/ipa_reg-v5.5.c</a></td><td class='right'>565</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ipvlan/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipvlan/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ipvlan/ipvlan.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipvlan/ipvlan.h</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ipvlan/ipvlan_core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipvlan/ipvlan_core.c</a></td><td class='right'>445</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipvlan/ipvlan_l3s.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipvlan/ipvlan_l3s.c</a></td><td class='right'>229</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ipvlan/ipvlan_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipvlan/ipvlan_main.c</a></td><td class='right'>687</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ipvlan/ipvtap.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ipvlan/ipvtap.c</a></td><td class='right'>241</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/Kconfig</a></td><td class='right'>405</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/Makefile</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/act200l-sir.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/act200l-sir.c</a></td><td class='right'>250</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/actisys-sir.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/actisys-sir.c</a></td><td class='right'>245</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/ali-ircc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/ali-ircc.c</a></td><td class='right'>2224</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.9%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/ali-ircc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/ali-ircc.h</a></td><td class='right'>227</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/au1k_ir.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/au1k_ir.c</a></td><td class='right'>997</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/bfin_sir.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/bfin_sir.c</a></td><td class='right'>818</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/bfin_sir.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/bfin_sir.h</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/donauboe.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/donauboe.c</a></td><td class='right'>1732</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/donauboe.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/donauboe.h</a></td><td class='right'>362</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/esi-sir.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/esi-sir.c</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/girbil-sir.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/girbil-sir.c</a></td><td class='right'>252</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/irda-usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/irda-usb.c</a></td><td class='right'>1913</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/irda-usb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/irda-usb.h</a></td><td class='right'>174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/irtty-sir.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/irtty-sir.c</a></td><td class='right'>580</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/irtty-sir.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/irtty-sir.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/kingsun-sir.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/kingsun-sir.c</a></td><td class='right'>634</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/ks959-sir.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/ks959-sir.c</a></td><td class='right'>912</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/ksdazzle-sir.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/ksdazzle-sir.c</a></td><td class='right'>813</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/litelink-sir.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/litelink-sir.c</a></td><td class='right'>199</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/ma600-sir.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/ma600-sir.c</a></td><td class='right'>253</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/mcp2120-sir.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/mcp2120-sir.c</a></td><td class='right'>224</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/mcs7780.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/mcs7780.c</a></td><td class='right'>977</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/mcs7780.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/mcs7780.h</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/nsc-ircc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/nsc-ircc.c</a></td><td class='right'>2409</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.2%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/nsc-ircc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/nsc-ircc.h</a></td><td class='right'>281</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/old_belkin-sir.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/old_belkin-sir.c</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/pxaficp_ir.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/pxaficp_ir.c</a></td><td class='right'>979</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/sa1100_ir.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/sa1100_ir.c</a></td><td class='right'>1150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/sh_irda.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/sh_irda.c</a></td><td class='right'>875</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/sh_sir.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/sh_sir.c</a></td><td class='right'>811</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/sir-dev.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/sir-dev.h</a></td><td class='right'>191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/sir_dev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/sir_dev.c</a></td><td class='right'>987</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/sir_dongle.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/sir_dongle.c</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/smsc-ircc2.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/smsc-ircc2.c</a></td><td class='right'>3026</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.3%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/smsc-ircc2.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/smsc-ircc2.h</a></td><td class='right'>191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/smsc-sio.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/smsc-sio.h</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/stir4200.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/stir4200.c</a></td><td class='right'>1133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/tekram-sir.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/tekram-sir.c</a></td><td class='right'>225</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/toim3232-sir.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/toim3232-sir.c</a></td><td class='right'>368</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/via-ircc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/via-ircc.c</a></td><td class='right'>1593</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/via-ircc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/via-ircc.h</a></td><td class='right'>846</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/vlsi_ir.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/vlsi_ir.c</a></td><td class='right'>1872</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/vlsi_ir.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/vlsi_ir.h</a></td><td class='right'>757</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/w83977af.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/w83977af.h</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/w83977af_ir.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/w83977af_ir.c</a></td><td class='right'>1286</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/irda/w83977af_ir.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/irda/w83977af_ir.h</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/loopback.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/loopback.c</a></td><td class='right'>201</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/macsec.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/macsec.c</a></td><td class='right'>4490</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/macvlan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/macvlan.c</a></td><td class='right'>795</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/macvtap.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/macvtap.c</a></td><td class='right'>1318</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mctp/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mctp/Kconfig</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mctp/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mctp/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mctp/mctp-i2c.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mctp/mctp-i2c.c</a></td><td class='right'>1146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mctp/mctp-i3c.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mctp/mctp-i3c.c</a></td><td class='right'>767</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mctp/mctp-serial.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mctp/mctp-serial.c</a></td><td class='right'>634</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mctp/mctp-usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mctp/mctp-usb.c</a></td><td class='right'>390</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mdio.c</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mdio/Kconfig</a></td><td class='right'>284</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mdio/Makefile</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/acpi_mdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mdio/acpi_mdio.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/fwnode_mdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mdio/fwnode_mdio.c</a></td><td class='right'>189</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/mdio-airoha.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mdio/mdio-airoha.c</a></td><td class='right'>278</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/mdio-aspeed.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mdio/mdio-aspeed.c</a></td><td class='right'>208</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/mdio-bcm-iproc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mdio/mdio-bcm-iproc.c</a></td><td class='right'>219</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/mdio-bcm-unimac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mdio/mdio-bcm-unimac.c</a></td><td class='right'>366</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/mdio-bitbang.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mdio/mdio-bitbang.c</a></td><td class='right'>266</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/mdio-cavium.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mdio/mdio-cavium.c</a></td><td class='right'>199</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/mdio-cavium.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mdio/mdio-cavium.h</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/mdio-gpio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mdio/mdio-gpio.c</a></td><td class='right'>222</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/mdio-hisi-femac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mdio/mdio-hisi-femac.c</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/mdio-i2c.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mdio/mdio-i2c.c</a></td><td class='right'>514</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/mdio-ipq4019.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mdio/mdio-ipq4019.c</a></td><td class='right'>408</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/mdio-ipq8064.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mdio/mdio-ipq8064.c</a></td><td class='right'>177</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/mdio-moxart.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mdio/mdio-moxart.c</a> (renamed from drivers/net/phy/mdio-moxart.c)</td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/mdio-mscc-miim.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mdio/mdio-mscc-miim.c</a></td><td class='right'>391</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/mdio-mux-bcm-iproc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mdio/mdio-mux-bcm-iproc.c</a></td><td class='right'>352</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/mdio-mux-bcm6368.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mdio/mdio-mux-bcm6368.c</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/mdio-mux-gpio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mdio/mdio-mux-gpio.c</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/mdio-mux-meson-g12a.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mdio/mdio-mux-meson-g12a.c</a></td><td class='right'>361</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/mdio-mux-meson-gxl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mdio/mdio-mux-meson-gxl.c</a></td><td class='right'>163</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/mdio-mux-mmioreg.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mdio/mdio-mux-mmioreg.c</a></td><td class='right'>190</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/mdio-mux-multiplexer.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mdio/mdio-mux-multiplexer.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/mdio-mux.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mdio/mdio-mux.c</a></td><td class='right'>270</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/mdio-mvusb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mdio/mdio-mvusb.c</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/mdio-octeon.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mdio/mdio-octeon.c</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/mdio-realtek-rtl9300.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mdio/mdio-realtek-rtl9300.c</a></td><td class='right'>522</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/mdio-regmap.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mdio/mdio-regmap.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/mdio-sun4i.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mdio/mdio-sun4i.c</a> (renamed from drivers/net/phy/mdio-sun4i.c)</td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/mdio-thunder.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mdio/mdio-thunder.c</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/mdio-xgene.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mdio/mdio-xgene.c</a></td><td class='right'>451</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mdio/of_mdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mdio/of_mdio.c</a></td><td class='right'>476</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/mhi_net.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mhi_net.c</a></td><td class='right'>413</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/mii.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/mii.c</a></td><td class='right'>216</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/net_failover.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/net_failover.c</a></td><td class='right'>836</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/netconsole.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/netconsole.c</a></td><td class='right'>1736</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/netdevsim/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/netdevsim/Makefile</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/netdevsim/bpf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/netdevsim/bpf.c</a></td><td class='right'>654</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/netdevsim/bus.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/netdevsim/bus.c</a></td><td class='right'>532</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/netdevsim/dev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/netdevsim/dev.c</a></td><td class='right'>1885</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/netdevsim/ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/netdevsim/ethtool.c</a></td><td class='right'>273</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/netdevsim/fib.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/netdevsim/fib.c</a></td><td class='right'>1670</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/netdevsim/health.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/netdevsim/health.c</a></td><td class='right'>231</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/netdevsim/hwstats.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/netdevsim/hwstats.c</a></td><td class='right'>480</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/netdevsim/ipsec.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/netdevsim/ipsec.c</a></td><td class='right'>296</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/netdevsim/macsec.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/netdevsim/macsec.c</a></td><td class='right'>351</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/netdevsim/netdev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/netdevsim/netdev.c</a></td><td class='right'>1255</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/netdevsim/netdevsim.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/netdevsim/netdevsim.h</a></td><td class='right'>471</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/netdevsim/psample.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/netdevsim/psample.c</a></td><td class='right'>265</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/netdevsim/psp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/netdevsim/psp.c</a></td><td class='right'>252</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/netdevsim/udp_tunnels.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/netdevsim/udp_tunnels.c</a></td><td class='right'>210</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/netkit.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/netkit.c</a></td><td class='right'>1017</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/nlmon.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/nlmon.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ntb_netdev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ntb_netdev.c</a></td><td class='right'>164</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ovpn/Makefile</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/bind.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ovpn/bind.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/bind.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ovpn/bind.h</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/crypto.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ovpn/crypto.c</a></td><td class='right'>210</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/crypto.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ovpn/crypto.h</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/crypto_aead.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ovpn/crypto_aead.c</a></td><td class='right'>389</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/crypto_aead.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ovpn/crypto_aead.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/io.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ovpn/io.c</a></td><td class='right'>465</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/io.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ovpn/io.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ovpn/main.c</a></td><td class='right'>279</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/main.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ovpn/main.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/netlink-gen.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ovpn/netlink-gen.c</a></td><td class='right'>263</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/netlink-gen.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ovpn/netlink-gen.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/netlink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ovpn/netlink.c</a></td><td class='right'>1293</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/netlink.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ovpn/netlink.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/ovpnpriv.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ovpn/ovpnpriv.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/peer.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ovpn/peer.c</a></td><td class='right'>1364</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/peer.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ovpn/peer.h</a></td><td class='right'>163</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/pktid.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ovpn/pktid.c</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/pktid.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ovpn/pktid.h</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/proto.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ovpn/proto.h</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/skb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ovpn/skb.h</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/socket.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ovpn/socket.c</a></td><td class='right'>241</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/socket.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ovpn/socket.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/stats.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ovpn/stats.c</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/stats.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ovpn/stats.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/tcp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ovpn/tcp.c</a></td><td class='right'>619</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/tcp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ovpn/tcp.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/udp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ovpn/udp.c</a></td><td class='right'>448</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/ovpn/udp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ovpn/udp.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/pcs/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/pcs/Kconfig</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/pcs/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/pcs/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/pcs/pcs-lynx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/pcs/pcs-lynx.c</a></td><td class='right'>375</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/pcs/pcs-mtk-lynxi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/pcs/pcs-mtk-lynxi.c</a></td><td class='right'>329</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/pcs/pcs-rzn1-miic.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/pcs/pcs-rzn1-miic.c</a></td><td class='right'>770</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/pcs/pcs-xpcs-nxp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/pcs/pcs-xpcs-nxp.c</a></td><td class='right'>177</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/pcs/pcs-xpcs-plat.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/pcs/pcs-xpcs-plat.c</a></td><td class='right'>457</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/pcs/pcs-xpcs-wx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/pcs/pcs-xpcs-wx.c</a></td><td class='right'>197</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/pcs/pcs-xpcs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/pcs/pcs-xpcs.c</a></td><td class='right'>1728</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/pcs/pcs-xpcs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/pcs/pcs-xpcs.h</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/pfcp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/pfcp.c</a></td><td class='right'>298</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/Kconfig</a></td><td class='right'>563</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/Makefile</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/adin.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/adin.c</a></td><td class='right'>1049</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/adin1100.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/adin1100.c</a></td><td class='right'>354</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/air_en8811h.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/air_en8811h.c</a></td><td class='right'>1224</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/amd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/amd.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/aquantia/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/aquantia/Kconfig</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/aquantia/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/aquantia/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/aquantia/aquantia.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/aquantia/aquantia.h</a></td><td class='right'>259</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/aquantia/aquantia_firmware.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/aquantia/aquantia_firmware.c</a></td><td class='right'>385</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/aquantia/aquantia_hwmon.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/aquantia/aquantia_hwmon.c</a></td><td class='right'>216</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/aquantia/aquantia_leds.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/aquantia/aquantia_leds.c</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/aquantia/aquantia_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/aquantia/aquantia_main.c</a></td><td class='right'>1593</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/as21xxx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/as21xxx.c</a></td><td class='right'>1088</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/at803x.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/at803x.c</a></td><td class='right'>365</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/ax88796b.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/ax88796b.c</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/ax88796b_rust.rs?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/ax88796b_rust.rs</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/bcm-cygnus.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/bcm-cygnus.c</a></td><td class='right'>292</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/bcm-phy-lib.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/bcm-phy-lib.c</a></td><td class='right'>1185</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/bcm-phy-lib.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/bcm-phy-lib.h</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/bcm-phy-ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/bcm-phy-ptp.c</a></td><td class='right'>957</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/bcm54140.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/bcm54140.c</a></td><td class='right'>895</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/bcm63xx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/bcm63xx.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/bcm7xxx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/bcm7xxx.c</a></td><td class='right'>948</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/bcm84881.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/bcm84881.c</a></td><td class='right'>272</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/bcm87xx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/bcm87xx.c</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/broadcom.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/broadcom.c</a></td><td class='right'>1761</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/cicada.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/cicada.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/cortina.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/cortina.c</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/davicom.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/davicom.c</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/dp83640.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/dp83640.c</a></td><td class='right'>639</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/dp83640_reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/dp83640_reg.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/dp83822.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/dp83822.c</a></td><td class='right'>1234</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/dp83848.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/dp83848.c</a></td><td class='right'>168</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/dp83867.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/dp83867.c</a></td><td class='right'>1082</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/dp83869.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/dp83869.c</a></td><td class='right'>939</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/dp83tc811.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/dp83tc811.c</a></td><td class='right'>414</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/dp83td510.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/dp83td510.c</a></td><td class='right'>977</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/dp83tg720.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/dp83tg720.c</a></td><td class='right'>678</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/et1011c.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/et1011c.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/fixed_phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/fixed_phy.c</a></td><td class='right'>325</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/icplus.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/icplus.c</a></td><td class='right'>569</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/intel-xway.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/intel-xway.c</a></td><td class='right'>707</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/linkmode.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/linkmode.c</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/lxt.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/lxt.c</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/marvell-88q2xxx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/marvell-88q2xxx.c</a></td><td class='right'>1154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/marvell-88x2222.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/marvell-88x2222.c</a></td><td class='right'>622</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/marvell.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/marvell.c</a></td><td class='right'>4196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.4%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 92.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/marvell10g.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/marvell10g.c</a></td><td class='right'>1477</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mdio-bcm-unimac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/mdio-bcm-unimac.c</a></td><td class='right'>261</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mdio-bitbang.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/mdio-bitbang.c</a></td><td class='right'>244</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mdio-gpio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/mdio-gpio.c</a></td><td class='right'>279</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mdio-mux-gpio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/mdio-mux-gpio.c</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mdio-mux-mmioreg.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/mdio-mux-mmioreg.c</a></td><td class='right'>169</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mdio-mux.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/mdio-mux.c</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mdio-octeon.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/mdio-octeon.c</a></td><td class='right'>283</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mdio-open-alliance.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/mdio-open-alliance.h</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mdio-private.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/mdio-private.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mdio_bus.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/mdio_bus.c</a></td><td class='right'>1188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mdio_bus_provider.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/mdio_bus_provider.c</a></td><td class='right'>442</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mdio_device.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/mdio_device.c</a></td><td class='right'>296</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mdio_devres.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/mdio_devres.c</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mediatek/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/mediatek/Kconfig</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mediatek/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/mediatek/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mediatek/mtk-2p5ge.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/mediatek/mtk-2p5ge.c</a></td><td class='right'>413</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mediatek/mtk-ge-soc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/mediatek/mtk-ge-soc.c</a></td><td class='right'>1548</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mediatek/mtk-ge.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/mediatek/mtk-ge.c</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mediatek/mtk-phy-lib.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/mediatek/mtk-phy-lib.c</a></td><td class='right'>347</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mediatek/mtk.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/mediatek/mtk.h</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/meson-gxl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/meson-gxl.c</a></td><td class='right'>238</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/micrel.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/micrel.c</a></td><td class='right'>6475</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 88.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/microchip.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/microchip.c</a></td><td class='right'>524</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/microchip_rds_ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/microchip_rds_ptp.c</a></td><td class='right'>1306</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/microchip_rds_ptp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/microchip_rds_ptp.h</a></td><td class='right'>247</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/microchip_t1.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/microchip_t1.c</a></td><td class='right'>2180</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/microchip_t1s.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/microchip_t1s.c</a></td><td class='right'>610</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mii_timestamper.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/mii_timestamper.c</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/motorcomm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/motorcomm.c</a></td><td class='right'>3107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mscc/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/mscc/Makefile</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mscc/mscc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/mscc/mscc.h</a></td><td class='right'>523</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mscc/mscc_fc_buffer.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/mscc/mscc_fc_buffer.h</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mscc/mscc_mac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/mscc/mscc_mac.h</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mscc/mscc_macsec.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/mscc/mscc_macsec.c</a></td><td class='right'>1011</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mscc/mscc_macsec.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/mscc/mscc_macsec.h</a></td><td class='right'>323</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mscc/mscc_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/mscc/mscc_main.c</a></td><td class='right'>3003</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mscc/mscc_ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/mscc/mscc_ptp.c</a></td><td class='right'>1645</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mscc/mscc_ptp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/mscc/mscc_ptp.h</a></td><td class='right'>473</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mscc/mscc_serdes.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/mscc/mscc_serdes.c</a></td><td class='right'>650</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mscc/mscc_serdes.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/mscc/mscc_serdes.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mxl-86110.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/mxl-86110.c</a></td><td class='right'>978</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/mxl-gpy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/mxl-gpy.c</a></td><td class='right'>1408</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/national.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/national.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/ncn26000.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/ncn26000.c</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/nxp-c45-tja11xx-macsec.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/nxp-c45-tja11xx-macsec.c</a></td><td class='right'>1725</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/nxp-c45-tja11xx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/nxp-c45-tja11xx.c</a></td><td class='right'>2190</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/nxp-c45-tja11xx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/nxp-c45-tja11xx.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/nxp-cbtx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/nxp-cbtx.c</a></td><td class='right'>227</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/nxp-tja11xx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/nxp-tja11xx.c</a></td><td class='right'>933</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/open_alliance_helpers.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/open_alliance_helpers.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/open_alliance_helpers.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/open_alliance_helpers.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/phy-c45.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/phy-c45.c</a></td><td class='right'>1834</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/phy-caps.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/phy-caps.h</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/phy-core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/phy-core.c</a></td><td class='right'>895</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/phy.c</a></td><td class='right'>2404</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/phy_caps.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/phy_caps.c</a></td><td class='right'>380</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/phy_device.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/phy_device.c</a></td><td class='right'>3347</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/phy_led_triggers.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/phy_led_triggers.c</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/phy_link_topology.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/phy_link_topology.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/phy_package.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/phy_package.c</a></td><td class='right'>419</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/phylib-internal.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/phylib-internal.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/phylib.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/phylib.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/phylink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/phylink.c</a></td><td class='right'>4373</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/qcom/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/qcom/Kconfig</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/qcom/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/qcom/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/qcom/at803x.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/qcom/at803x.c</a></td><td class='right'>1250</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/qcom/qca807x.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/qcom/qca807x.c</a></td><td class='right'>868</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/qcom/qca808x.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/qcom/qca808x.c</a></td><td class='right'>686</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/qcom/qca83xx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/qcom/qca83xx.c</a></td><td class='right'>269</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/qcom/qcom-phy-lib.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/qcom/qcom-phy-lib.c</a></td><td class='right'>776</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/qcom/qcom.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/qcom/qcom.h</a></td><td class='right'>271</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/qsemi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/qsemi.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/qt2025.rs?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/qt2025.rs</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/realtek.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/realtek.c</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/realtek/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/realtek/Kconfig</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/realtek/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/realtek/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/realtek/realtek.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/realtek/realtek.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/realtek/realtek_hwmon.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/realtek/realtek_hwmon.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/realtek/realtek_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/realtek/realtek_main.c</a></td><td class='right'>2277</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/rockchip.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/rockchip.c</a></td><td class='right'>200</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/sfp-bus.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/sfp-bus.c</a></td><td class='right'>865</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/sfp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/sfp.c</a></td><td class='right'>3257</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/sfp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/sfp.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/smsc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/smsc.c</a></td><td class='right'>811</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/spi_ks8995.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/spi_ks8995.c</a></td><td class='right'>379</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/ste10Xp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/ste10Xp.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/stubs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/stubs.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/swphy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/swphy.c</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/swphy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/swphy.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/teranetics.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/teranetics.c</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/uPD60620.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/uPD60620.c</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/vitesse.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/vitesse.c</a></td><td class='right'>510</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/phy/xilinx_gmii2rgmii.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/phy/xilinx_gmii2rgmii.c</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/plip/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/plip/Kconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/plip/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/plip/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/plip/plip.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/plip/plip.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ppp/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ppp/Kconfig</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ppp/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ppp/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ppp/bsd_comp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ppp/bsd_comp.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ppp/ppp_async.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ppp/ppp_async.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ppp/ppp_deflate.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ppp/ppp_deflate.c</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ppp/ppp_generic.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ppp/ppp_generic.c</a></td><td class='right'>1381</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ppp/ppp_mppe.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ppp/ppp_mppe.c</a></td><td class='right'>197</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ppp/ppp_mppe.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ppp/ppp_mppe.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ppp/ppp_synctty.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ppp/ppp_synctty.c</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ppp/pppoe.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ppp/pppoe.c</a></td><td class='right'>309</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ppp/pppox.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ppp/pppox.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/ppp/pptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ppp/pptp.c</a></td><td class='right'>215</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/pse-pd/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/pse-pd/Kconfig</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/pse-pd/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/pse-pd/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/pse-pd/pd692x0.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/pse-pd/pd692x0.c</a></td><td class='right'>1883</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/pse-pd/pse_core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/pse-pd/pse_core.c</a></td><td class='right'>1978</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/pse-pd/pse_regulator.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/pse-pd/pse_regulator.c</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/pse-pd/si3474.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/pse-pd/si3474.c</a></td><td class='right'>578</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/pse-pd/tps23881.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/pse-pd/tps23881.c</a></td><td class='right'>1563</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/rionet.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/rionet.c</a></td><td class='right'>314</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/sb1000.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/sb1000.c</a></td><td class='right'>1178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/slip/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/slip/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/slip/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/slip/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/slip/slhc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/slip/slhc.c</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/slip/slip.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/slip/slip.c</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/slip/slip.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/slip/slip.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/sungem_phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/sungem_phy.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/tap.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/tap.c</a></td><td class='right'>1285</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/team/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/team/Kconfig</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/team/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/team/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/team/team.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/team/team.c</a></td><td class='right'>2947</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.2%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/team/team_core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/team/team_core.c</a></td><td class='right'>3001</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/team/team_mode_activebackup.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/team/team_mode_activebackup.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/team/team_mode_broadcast.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/team/team_mode_broadcast.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/team/team_mode_loadbalance.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/team/team_mode_loadbalance.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/team/team_mode_random.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/team/team_mode_random.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/team/team_mode_roundrobin.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/team/team_mode_roundrobin.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/team/team_nl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/team/team_nl.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/team/team_nl.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/team/team_nl.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/thunderbolt/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/thunderbolt/Kconfig</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/thunderbolt/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/thunderbolt/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/thunderbolt/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/thunderbolt/main.c</a></td><td class='right'>1470</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/thunderbolt/trace.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/thunderbolt/trace.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/thunderbolt/trace.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/thunderbolt/trace.h</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/tun.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/tun.c</a></td><td class='right'>2594</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/tun_vnet.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/tun_vnet.h</a></td><td class='right'>269</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/Kconfig</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/aqc111.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/aqc111.c</a></td><td class='right'>1498</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/aqc111.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/aqc111.h</a></td><td class='right'>232</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/asix.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/asix.h</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/asix_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/asix_common.c</a></td><td class='right'>469</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/asix_devices.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/asix_devices.c</a></td><td class='right'>895</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/ax88172a.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/ax88172a.c</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/ax88179_178a.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/ax88179_178a.c</a></td><td class='right'>830</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/catc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/catc.c</a></td><td class='right'>194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/cdc-phonet.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/cdc-phonet.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/cdc_eem.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/cdc_eem.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/cdc_ether.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/cdc_ether.c</a></td><td class='right'>569</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/cdc_mbim.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/cdc_mbim.c</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/cdc_ncm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/cdc_ncm.c</a></td><td class='right'>954</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/cdc_subset.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/cdc_subset.c</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/ch9200.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/ch9200.c</a></td><td class='right'>429</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/cx82310_eth.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/cx82310_eth.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/dm9601.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/dm9601.c</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/gl620a.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/gl620a.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/hso.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/hso.c</a></td><td class='right'>492</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/huawei_cdc_ncm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/huawei_cdc_ncm.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/int51x1.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/int51x1.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/ipheth.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/ipheth.c</a></td><td class='right'>337</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/kalmia.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/kalmia.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/kaweth.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/kaweth.c</a></td><td class='right'>378</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/lan78xx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/lan78xx.c</a></td><td class='right'>5391</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/lan78xx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/lan78xx.h</a></td><td class='right'>879</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/lg-vl600.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/lg-vl600.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/mcs7830.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/mcs7830.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/net1080.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/net1080.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/pegasus.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/pegasus.c</a></td><td class='right'>349</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/pegasus.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/pegasus.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/plusb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/plusb.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/qmi_wwan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/qmi_wwan.c</a></td><td class='right'>891</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/r8152.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/r8152.c</a></td><td class='right'>7760</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 86.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/r8153_ecm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/r8153_ecm.c</a></td><td class='right'>176</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/rndis_host.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/rndis_host.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/rtl8150.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/rtl8150.c</a></td><td class='right'>152</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/sierra_net.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/sierra_net.c</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/smsc75xx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/smsc75xx.c</a></td><td class='right'>191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/smsc75xx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/smsc75xx.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/smsc95xx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/smsc95xx.c</a></td><td class='right'>968</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/smsc95xx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/smsc95xx.h</a></td><td class='right'>498</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/sr9700.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/sr9700.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/sr9700.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/sr9700.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/sr9800.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/sr9800.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/sr9800.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/sr9800.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/usbnet.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/usbnet.c</a></td><td class='right'>788</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/usb/zaurus.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/usb/zaurus.c</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/veth.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/veth.c</a></td><td class='right'>1725</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/virtio_net.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/virtio_net.c</a></td><td class='right'>6742</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.5%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 88.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/vmxnet3/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/vmxnet3/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/vmxnet3/upt1_defs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/vmxnet3/upt1_defs.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/vmxnet3/vmxnet3_defs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/vmxnet3/vmxnet3_defs.h</a></td><td class='right'>317</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/vmxnet3/vmxnet3_drv.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/vmxnet3/vmxnet3_drv.c</a></td><td class='right'>1817</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/vmxnet3/vmxnet3_ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/vmxnet3/vmxnet3_ethtool.c</a></td><td class='right'>906</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/vmxnet3/vmxnet3_int.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/vmxnet3/vmxnet3_int.h</a></td><td class='right'>202</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/vmxnet3/vmxnet3_xdp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/vmxnet3/vmxnet3_xdp.c</a></td><td class='right'>429</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/vmxnet3/vmxnet3_xdp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/vmxnet3/vmxnet3_xdp.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/vrf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/vrf.c</a></td><td class='right'>2012</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/vsockmon.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/vsockmon.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/vxlan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/vxlan.c</a></td><td class='right'>3029</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.3%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/vxlan/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/vxlan/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/vxlan/vxlan_core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/vxlan/vxlan_core.c</a></td><td class='right'>5009</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/vxlan/vxlan_mdb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/vxlan/vxlan_mdb.c</a></td><td class='right'>1746</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/vxlan/vxlan_multicast.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/vxlan/vxlan_multicast.c</a></td><td class='right'>272</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/vxlan/vxlan_private.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/vxlan/vxlan_private.h</a></td><td class='right'>251</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/vxlan/vxlan_vnifilter.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/vxlan/vxlan_vnifilter.c</a></td><td class='right'>1005</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/.gitignore?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/.gitignore</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/Kconfig</a></td><td class='right'>231</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/Makefile</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/c101.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/c101.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/cosa.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/cosa.c</a></td><td class='right'>2051</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/cosa.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/cosa.h</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/dlci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/dlci.c</a></td><td class='right'>546</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/dscc4.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/dscc4.c</a></td><td class='right'>2053</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/farsync.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/farsync.c</a></td><td class='right'>663</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/farsync.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/farsync.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/framer/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/framer/Kconfig</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/framer/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/framer/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/framer/framer-core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/framer/framer-core.c</a></td><td class='right'>873</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/framer/pef2256/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/framer/pef2256/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/framer/pef2256/pef2256-regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/framer/pef2256/pef2256-regs.h</a></td><td class='right'>250</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/framer/pef2256/pef2256.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/framer/pef2256/pef2256.c</a></td><td class='right'>893</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/fsl_qmc_hdlc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/fsl_qmc_hdlc.c</a></td><td class='right'>808</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/fsl_ucc_hdlc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/fsl_ucc_hdlc.c</a></td><td class='right'>1303</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/fsl_ucc_hdlc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/fsl_ucc_hdlc.h</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/hd64570.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/hd64570.c</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/hd64570.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/hd64570.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/hd64572.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/hd64572.c</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/hd64572.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/hd64572.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/hdlc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/hdlc.c</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/hdlc_cisco.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/hdlc_cisco.c</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/hdlc_fr.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/hdlc_fr.c</a></td><td class='right'>481</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/hdlc_ppp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/hdlc_ppp.c</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/hdlc_raw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/hdlc_raw.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/hdlc_raw_eth.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/hdlc_raw_eth.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/hdlc_x25.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/hdlc_x25.c</a></td><td class='right'>247</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/hostess_sv11.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/hostess_sv11.c</a></td><td class='right'>352</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/ixp4xx_hss.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/ixp4xx_hss.c</a></td><td class='right'>503</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/lapbether.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/lapbether.c</a></td><td class='right'>222</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/lmc/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/lmc/Makefile</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/lmc/lmc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/lmc/lmc.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/lmc/lmc_debug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/lmc/lmc_debug.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/lmc/lmc_debug.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/lmc/lmc_debug.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/lmc/lmc_ioctl.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/lmc/lmc_ioctl.h</a></td><td class='right'>257</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/lmc/lmc_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/lmc/lmc_main.c</a></td><td class='right'>2130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.7%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/lmc/lmc_media.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/lmc/lmc_media.c</a></td><td class='right'>1211</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/lmc/lmc_proto.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/lmc/lmc_proto.c</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/lmc/lmc_proto.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/lmc/lmc_proto.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/lmc/lmc_var.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/lmc/lmc_var.h</a></td><td class='right'>470</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/n2.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/n2.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/pc300too.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/pc300too.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/pci200syn.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/pci200syn.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/sbni.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/sbni.c</a></td><td class='right'>1627</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/sbni.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/sbni.h</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/sdla.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/sdla.c</a></td><td class='right'>1662</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/sealevel.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/sealevel.c</a></td><td class='right'>398</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/slic_ds26522.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/slic_ds26522.c</a></td><td class='right'>245</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/slic_ds26522.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/slic_ds26522.h</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/wanxl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/wanxl.c</a></td><td class='right'>286</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/wanxl.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/wanxl.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/wanxlfw.S?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/wanxlfw.S</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/x25_asy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/x25_asy.c</a></td><td class='right'>827</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/x25_asy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/x25_asy.h</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/z85230.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/z85230.c</a></td><td class='right'>1795</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wan/z85230.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wan/z85230.h</a></td><td class='right'>447</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wimax/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wimax/Kconfig</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wimax/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wimax/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wimax/i2400m/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wimax/i2400m/Kconfig</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wimax/i2400m/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wimax/i2400m/Makefile</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wimax/i2400m/control.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wimax/i2400m/control.c</a></td><td class='right'>1436</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wimax/i2400m/debug-levels.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wimax/i2400m/debug-levels.h</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wimax/i2400m/debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wimax/i2400m/debugfs.c</a></td><td class='right'>371</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wimax/i2400m/driver.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wimax/i2400m/driver.c</a></td><td class='right'>1025</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wimax/i2400m/fw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wimax/i2400m/fw.c</a></td><td class='right'>1657</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wimax/i2400m/i2400m-usb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wimax/i2400m/i2400m-usb.h</a></td><td class='right'>275</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wimax/i2400m/i2400m.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wimax/i2400m/i2400m.h</a></td><td class='right'>973</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wimax/i2400m/netdev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wimax/i2400m/netdev.c</a></td><td class='right'>638</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wimax/i2400m/op-rfkill.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wimax/i2400m/op-rfkill.c</a></td><td class='right'>210</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wimax/i2400m/rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wimax/i2400m/rx.c</a></td><td class='right'>1396</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wimax/i2400m/sysfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wimax/i2400m/sysfs.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wimax/i2400m/tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wimax/i2400m/tx.c</a></td><td class='right'>1013</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wimax/i2400m/usb-debug-levels.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wimax/i2400m/usb-debug-levels.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wimax/i2400m/usb-fw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wimax/i2400m/usb-fw.c</a></td><td class='right'>364</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wimax/i2400m/usb-notif.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wimax/i2400m/usb-notif.c</a></td><td class='right'>259</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wimax/i2400m/usb-rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wimax/i2400m/usb-rx.c</a></td><td class='right'>465</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wimax/i2400m/usb-tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wimax/i2400m/usb-tx.c</a></td><td class='right'>273</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wimax/i2400m/usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wimax/i2400m/usb.c</a></td><td class='right'>817</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireguard/Makefile</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/allowedips.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireguard/allowedips.c</a></td><td class='right'>429</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/allowedips.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireguard/allowedips.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/cookie.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireguard/cookie.c</a></td><td class='right'>236</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/cookie.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireguard/cookie.h</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/device.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireguard/device.c</a></td><td class='right'>477</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/device.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireguard/device.h</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/generated/netlink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireguard/generated/netlink.c</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/generated/netlink.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireguard/generated/netlink.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireguard/main.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/messages.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireguard/messages.h</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/netlink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireguard/netlink.c</a></td><td class='right'>607</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/netlink.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireguard/netlink.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/noise.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireguard/noise.c</a></td><td class='right'>861</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/noise.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireguard/noise.h</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/peer.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireguard/peer.c</a></td><td class='right'>239</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/peer.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireguard/peer.h</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/peerlookup.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireguard/peerlookup.c</a></td><td class='right'>226</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/peerlookup.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireguard/peerlookup.h</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/queueing.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireguard/queueing.c</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/queueing.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireguard/queueing.h</a></td><td class='right'>204</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/ratelimiter.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireguard/ratelimiter.c</a></td><td class='right'>223</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/ratelimiter.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireguard/ratelimiter.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/receive.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireguard/receive.c</a></td><td class='right'>586</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/selftest/allowedips.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireguard/selftest/allowedips.c</a></td><td class='right'>727</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/selftest/counter.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireguard/selftest/counter.c</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/selftest/ratelimiter.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireguard/selftest/ratelimiter.c</a></td><td class='right'>224</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/send.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireguard/send.c</a></td><td class='right'>414</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/socket.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireguard/socket.c</a></td><td class='right'>437</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/socket.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireguard/socket.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/timers.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireguard/timers.c</a></td><td class='right'>246</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/timers.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireguard/timers.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireguard/version.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireguard/version.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/Kconfig</a></td><td class='right'>286</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/Makefile</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/admtek/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/admtek/Kconfig</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/admtek/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/admtek/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/admtek/adm8211.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/admtek/adm8211.c</a> (renamed from drivers/net/wireless/adm8211.c)</td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/admtek/adm8211.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/admtek/adm8211.h</a> (renamed from drivers/net/wireless/adm8211.h)</td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/airo.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/airo.c</a></td><td class='right'>8225</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 14.4%;'/><td class='none' style='width: 85.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/airo.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/airo.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/airo_cs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/airo_cs.c</a></td><td class='right'>222</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/Kconfig</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ar5523/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ar5523/Kconfig</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ar5523/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ar5523/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ar5523/ar5523.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ar5523/ar5523.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/Kconfig</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/Makefile</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/ahb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/ahb.c</a></td><td class='right'>862</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/ahb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/ahb.h</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/bmi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/bmi.c</a></td><td class='right'>231</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/bmi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/bmi.h</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/ce.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/ce.c</a></td><td class='right'>1432</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/ce.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/ce.h</a></td><td class='right'>377</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/core.c</a></td><td class='right'>3038</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/core.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/core.h</a></td><td class='right'>831</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/coredump.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/coredump.c</a></td><td class='right'>1666</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/coredump.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/coredump.h</a></td><td class='right'>231</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/debug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/debug.c</a></td><td class='right'>1796</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/debug.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/debug.h</a></td><td class='right'>173</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/debugfs_sta.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/debugfs_sta.c</a></td><td class='right'>602</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/hif.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/hif.h</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/htc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/htc.c</a></td><td class='right'>842</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/htc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/htc.h</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/htt.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/htt.c</a></td><td class='right'>261</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/htt.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/htt.h</a></td><td class='right'>1376</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/htt_rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/htt_rx.c</a></td><td class='right'>3251</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/htt_tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/htt_tx.c</a></td><td class='right'>1579</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/hw.c</a></td><td class='right'>1128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/hw.h</a></td><td class='right'>809</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/leds.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/leds.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/leds.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/leds.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/mac.c</a></td><td class='right'>5392</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.7%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 90.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/mac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/mac.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/p2p.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/p2p.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/p2p.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/p2p.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/pci.c</a></td><td class='right'>2155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/pci.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/pci.h</a></td><td class='right'>176</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/qmi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/qmi.c</a></td><td class='right'>1140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/qmi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/qmi.h</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/qmi_wlfw_v01.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/qmi_wlfw_v01.c</a></td><td class='right'>2309</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/qmi_wlfw_v01.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/qmi_wlfw_v01.h</a></td><td class='right'>694</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/rx_desc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/rx_desc.h</a></td><td class='right'>548</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/sdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/sdio.c</a></td><td class='right'>2678</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/sdio.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/sdio.h</a></td><td class='right'>236</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/snoc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/snoc.c</a></td><td class='right'>1895</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/snoc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/snoc.h</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/spectral.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/spectral.c</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/spectral.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/spectral.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/swap.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/swap.c</a></td><td class='right'>195</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/swap.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/swap.h</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/targaddrs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/targaddrs.h</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/testmode.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/testmode.c</a></td><td class='right'>453</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/testmode.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/testmode.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/testmode_i.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/testmode_i.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/thermal.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/thermal.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/thermal.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/thermal.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/trace.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/trace.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/trace.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/trace.h</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/txrx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/txrx.c</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/txrx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/txrx.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/usb.c</a></td><td class='right'>1130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/usb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/usb.h</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/wmi-ops.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/wmi-ops.h</a></td><td class='right'>503</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/wmi-tlv.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/wmi-tlv.c</a></td><td class='right'>1477</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/wmi-tlv.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/wmi-tlv.h</a></td><td class='right'>1100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/wmi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/wmi.c</a></td><td class='right'>4782</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 91.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/wmi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/wmi.h</a></td><td class='right'>2745</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/wow.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/wow.c</a></td><td class='right'>367</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath10k/wow.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath10k/wow.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/Kconfig</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/Makefile</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/ahb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/ahb.c</a></td><td class='right'>1319</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/ahb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/ahb.h</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/ce.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/ce.c</a></td><td class='right'>1080</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/ce.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/ce.h</a></td><td class='right'>211</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/core.c</a></td><td class='right'>2715</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/core.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/core.h</a></td><td class='right'>1354</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/coredump.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/coredump.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/coredump.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/coredump.h</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/dbring.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/dbring.c</a></td><td class='right'>401</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/dbring.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/dbring.h</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/debug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/debug.c</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/debug.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/debug.h</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/debugfs.c</a></td><td class='right'>1803</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/debugfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/debugfs.h</a></td><td class='right'>391</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/debugfs_htt_stats.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/debugfs_htt_stats.c</a></td><td class='right'>4905</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/debugfs_htt_stats.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/debugfs_htt_stats.h</a></td><td class='right'>2045</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/debugfs_sta.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/debugfs_sta.c</a></td><td class='right'>890</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/debugfs_sta.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/debugfs_sta.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/dp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/dp.c</a></td><td class='right'>1194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/dp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/dp.h</a></td><td class='right'>1694</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/dp_rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/dp_rx.c</a></td><td class='right'>5794</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/dp_rx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/dp_rx.h</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/dp_tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/dp_tx.c</a></td><td class='right'>1306</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/dp_tx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/dp_tx.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/fw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/fw.c</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/fw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/fw.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/hal.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/hal.c</a></td><td class='right'>1455</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/hal.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/hal.h</a></td><td class='right'>978</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/hal_desc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/hal_desc.h</a></td><td class='right'>2494</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/hal_rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/hal_rx.c</a></td><td class='right'>1610</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/hal_rx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/hal_rx.h</a></td><td class='right'>520</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/hal_tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/hal_tx.c</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/hal_tx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/hal_tx.h</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/hif.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/hif.h</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/htc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/htc.c</a></td><td class='right'>845</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/htc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/htc.h</a></td><td class='right'>298</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/hw.c</a></td><td class='right'>2858</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/hw.h</a></td><td class='right'>439</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/mac.c</a></td><td class='right'>10873</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 19.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 81.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/mac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/mac.h</a></td><td class='right'>184</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/mhi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/mhi.c</a></td><td class='right'>506</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/mhi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/mhi.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/p2p.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/p2p.c</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/p2p.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/p2p.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/pci.c</a></td><td class='right'>1322</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/pci.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/pci.h</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/pcic.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/pcic.c</a></td><td class='right'>865</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/pcic.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/pcic.h</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/peer.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/peer.c</a></td><td class='right'>670</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/peer.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/peer.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/qmi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/qmi.c</a></td><td class='right'>3366</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/qmi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/qmi.h</a></td><td class='right'>526</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/reg.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/reg.c</a></td><td class='right'>1066</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/reg.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/rx_desc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/rx_desc.h</a></td><td class='right'>1506</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/spectral.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/spectral.c</a></td><td class='right'>1056</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/spectral.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/spectral.h</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/testmode.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/testmode.c</a></td><td class='right'>502</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/testmode.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/testmode.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/thermal.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/thermal.c</a></td><td class='right'>230</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/thermal.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/thermal.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/trace.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/trace.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/trace.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/trace.h</a></td><td class='right'>346</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/wmi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/wmi.c</a></td><td class='right'>9909</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 17.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 82.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/wmi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/wmi.h</a></td><td class='right'>6535</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/wow.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/wow.c</a></td><td class='right'>883</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath11k/wow.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath11k/wow.h</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/Kconfig</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/Makefile</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/acpi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/acpi.c</a></td><td class='right'>510</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/acpi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/acpi.h</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/ahb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/ahb.c</a></td><td class='right'>1156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/ahb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/ahb.h</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/ce.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/ce.c</a></td><td class='right'>1051</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/ce.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/ce.h</a></td><td class='right'>193</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/core.c</a></td><td class='right'>2321</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/core.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/core.h</a></td><td class='right'>1519</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/coredump.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/coredump.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/coredump.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/coredump.h</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/dbring.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/dbring.c</a></td><td class='right'>358</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/dbring.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/dbring.h</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/debug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/debug.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/debug.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/debug.h</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/debugfs.c</a></td><td class='right'>1515</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/debugfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/debugfs.h</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/debugfs_htt_stats.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/debugfs_htt_stats.c</a></td><td class='right'>6178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/debugfs_htt_stats.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/debugfs_htt_stats.h</a></td><td class='right'>2076</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/debugfs_sta.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/debugfs_sta.c</a></td><td class='right'>337</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/debugfs_sta.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/debugfs_sta.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/dp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/dp.c</a></td><td class='right'>1841</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/dp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/dp.h</a></td><td class='right'>1976</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/dp_mon.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/dp_mon.c</a></td><td class='right'>4438</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/dp_mon.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/dp_mon.h</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/dp_rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/dp_rx.c</a></td><td class='right'>4830</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/dp_rx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/dp_rx.h</a></td><td class='right'>191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/dp_tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/dp_tx.c</a></td><td class='right'>1781</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/dp_tx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/dp_tx.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/fw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/fw.c</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/fw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/fw.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/hal.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/hal.c</a></td><td class='right'>2663</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/hal.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/hal.h</a></td><td class='right'>1181</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/hal_desc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/hal_desc.h</a></td><td class='right'>3045</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/hal_rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/hal_rx.c</a></td><td class='right'>947</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/hal_rx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/hal_rx.h</a></td><td class='right'>1171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/hal_tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/hal_tx.c</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/hal_tx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/hal_tx.h</a></td><td class='right'>200</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/hif.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/hif.h</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/htc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/htc.c</a></td><td class='right'>795</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/htc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/htc.h</a></td><td class='right'>316</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/hw.c</a></td><td class='right'>1680</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/hw.h</a></td><td class='right'>382</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/mac.c</a></td><td class='right'>14996</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 26.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 73.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/mac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/mac.h</a></td><td class='right'>209</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/mhi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/mhi.c</a></td><td class='right'>659</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/mhi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/mhi.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/p2p.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/p2p.c</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/p2p.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/p2p.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/pci.c</a></td><td class='right'>1895</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/pci.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/pci.h</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/peer.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/peer.c</a></td><td class='right'>570</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/peer.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/peer.h</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/qmi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/qmi.c</a></td><td class='right'>3917</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/qmi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/qmi.h</a></td><td class='right'>635</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/reg.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/reg.c</a></td><td class='right'>994</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/reg.h</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/rx_desc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/rx_desc.h</a></td><td class='right'>1544</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/testmode.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/testmode.c</a></td><td class='right'>395</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/testmode.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/testmode.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/trace.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/trace.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/trace.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/trace.h</a></td><td class='right'>179</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/wmi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/wmi.c</a></td><td class='right'>11230</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 19.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 80.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/wmi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/wmi.h</a></td><td class='right'>6526</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/wow.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/wow.c</a></td><td class='right'>1029</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath12k/wow.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath12k/wow.h</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath5k/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath5k/Kconfig</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath5k/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath5k/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath5k/ahb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath5k/ahb.c</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath5k/ani.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath5k/ani.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath5k/ath5k.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath5k/ath5k.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath5k/attach.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath5k/attach.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath5k/base.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath5k/base.c</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath5k/base.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath5k/base.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath5k/debug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath5k/debug.c</a></td><td class='right'>258</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath5k/desc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath5k/desc.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath5k/dma.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath5k/dma.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath5k/eeprom.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath5k/eeprom.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath5k/eeprom.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath5k/eeprom.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath5k/led.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath5k/led.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath5k/mac80211-ops.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath5k/mac80211-ops.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath5k/pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath5k/pci.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath5k/pcu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath5k/pcu.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath5k/phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath5k/phy.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath5k/qcu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath5k/qcu.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath5k/reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath5k/reg.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath5k/reset.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath5k/reset.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath5k/rfbuffer.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath5k/rfbuffer.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath5k/rfkill.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath5k/rfkill.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath5k/sysfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath5k/sysfs.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath5k/trace.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath5k/trace.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath6kl/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath6kl/Kconfig</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath6kl/bmi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath6kl/bmi.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath6kl/cfg80211.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath6kl/cfg80211.c</a></td><td class='right'>342</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath6kl/common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath6kl/common.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath6kl/core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath6kl/core.c</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath6kl/core.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath6kl/core.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath6kl/debug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath6kl/debug.c</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath6kl/debug.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath6kl/debug.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath6kl/hif.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath6kl/hif.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath6kl/hif.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath6kl/hif.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath6kl/htc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath6kl/htc.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath6kl/htc_mbox.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath6kl/htc_mbox.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath6kl/htc_pipe.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath6kl/htc_pipe.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath6kl/init.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath6kl/init.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath6kl/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath6kl/main.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath6kl/recovery.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath6kl/recovery.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath6kl/sdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath6kl/sdio.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath6kl/testmode.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath6kl/testmode.c</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath6kl/trace.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath6kl/trace.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath6kl/txrx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath6kl/txrx.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath6kl/usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath6kl/usb.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath6kl/wmi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath6kl/wmi.c</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath6kl/wmi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath6kl/wmi.h</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/Kconfig</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ahb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/ahb.c</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ani.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/ani.c</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/antenna.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/antenna.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ar5008_initvals.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/ar5008_initvals.h</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ar5008_phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/ar5008_phy.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ar9001_initvals.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/ar9001_initvals.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ar9002_calib.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/ar9002_calib.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ar9002_hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/ar9002_hw.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ar9002_initvals.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/ar9002_initvals.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ar9002_mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/ar9002_mac.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ar9002_phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/ar9002_phy.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ar9002_phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/ar9002_phy.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ar9003_aic.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/ar9003_aic.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ar9003_aic.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/ar9003_aic.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ar9003_calib.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/ar9003_calib.c</a></td><td class='right'>239</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/ar9003_eeprom.c</a></td><td class='right'>328</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/ar9003_eeprom.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ar9003_hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/ar9003_hw.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ar9003_mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/ar9003_mac.c</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ar9003_mci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/ar9003_mci.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ar9003_paprd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/ar9003_paprd.c</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ar9003_phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/ar9003_phy.c</a></td><td class='right'>195</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ar9003_phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/ar9003_phy.h</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ar9003_wow.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/ar9003_wow.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ar9330_1p1_initvals.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/ar9330_1p1_initvals.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ar9330_1p2_initvals.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/ar9330_1p2_initvals.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ar9340_initvals.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/ar9340_initvals.h</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ar9462_2p0_initvals.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/ar9462_2p0_initvals.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ar9462_2p1_initvals.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/ar9462_2p1_initvals.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ar9485_initvals.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/ar9485_initvals.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ar953x_initvals.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/ar953x_initvals.h</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ar955x_1p0_initvals.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/ar955x_1p0_initvals.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ar9565_1p0_initvals.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/ar9565_1p0_initvals.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ar956x_initvals.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/ar956x_initvals.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ar9580_1p0_initvals.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/ar9580_1p0_initvals.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ath9k.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/ath9k.h</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/ath9k_pci_owl_loader.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/ath9k_pci_owl_loader.c</a></td><td class='right'>258</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/beacon.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/beacon.c</a></td><td class='right'>260</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/btcoex.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/btcoex.c</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/btcoex.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/btcoex.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/calib.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/calib.c</a></td><td class='right'>152</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/channel.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/channel.c</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/common-beacon.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/common-beacon.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/common-debug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/common-debug.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/common-debug.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/common-debug.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/common-init.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/common-init.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/common-spectral.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/common-spectral.c</a></td><td class='right'>183</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/common-spectral.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/common-spectral.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/common.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/common.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/debug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/debug.c</a></td><td class='right'>350</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/debug.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/debug.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/debug_sta.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/debug_sta.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/dfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/dfs.c</a></td><td class='right'>176</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/dfs_debug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/dfs_debug.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/dynack.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/dynack.c</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/dynack.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/dynack.h</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/eeprom.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/eeprom.c</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/eeprom.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/eeprom.h</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/eeprom_4k.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/eeprom_4k.c</a></td><td class='right'>214</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/eeprom_9287.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/eeprom_9287.c</a></td><td class='right'>196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/eeprom_def.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/eeprom_def.c</a></td><td class='right'>236</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/gpio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/gpio.c</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/hif_usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/hif_usb.c</a></td><td class='right'>396</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/hif_usb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/hif_usb.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/htc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/htc.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/htc_drv_beacon.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/htc_drv_beacon.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/htc_drv_debug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/htc_drv_debug.c</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/htc_drv_gpio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/htc_drv_gpio.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/htc_drv_init.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/htc_drv_init.c</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/htc_drv_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/htc_drv_main.c</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/htc_drv_txrx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/htc_drv_txrx.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/htc_hst.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/htc_hst.c</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/hw.c</a></td><td class='right'>603</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/hw.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/init.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/init.c</a></td><td class='right'>302</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/link.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/link.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/mac.c</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/mac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/mac.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/main.c</a></td><td class='right'>424</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/mci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/mci.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/pci.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/recv.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/recv.c</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/reg.h</a></td><td class='right'>265</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/reg_aic.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/reg_aic.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/rng.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/rng.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/tx99.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/tx99.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/wmi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/wmi.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/wmi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/wmi.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/wow.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/wow.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/ath9k/xmit.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/ath9k/xmit.c</a></td><td class='right'>968</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/carl9170/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/carl9170/Kconfig</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/carl9170/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/carl9170/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/carl9170/carl9170.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/carl9170/carl9170.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/carl9170/cmd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/carl9170/cmd.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/carl9170/debug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/carl9170/debug.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/carl9170/fw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/carl9170/fw.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/carl9170/fwcmd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/carl9170/fwcmd.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/carl9170/fwdesc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/carl9170/fwdesc.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/carl9170/hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/carl9170/hw.h</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/carl9170/mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/carl9170/mac.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/carl9170/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/carl9170/main.c</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/carl9170/phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/carl9170/phy.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/carl9170/rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/carl9170/rx.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/carl9170/tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/carl9170/tx.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/carl9170/usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/carl9170/usb.c</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/carl9170/version.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/carl9170/version.h</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/carl9170/wlan.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/carl9170/wlan.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/debug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/debug.c</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/dfs_pattern_detector.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/dfs_pattern_detector.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/dfs_pattern_detector.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/dfs_pattern_detector.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/dfs_pri_detector.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/dfs_pri_detector.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/dfs_pri_detector.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/dfs_pri_detector.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/hw.c</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/key.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/key.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/main.c</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/regd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/regd.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/regd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/regd.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/regd_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/regd_common.h</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/spectral_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/spectral_common.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/testmode_i.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/testmode_i.h</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/trace.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/trace.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wcn36xx/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wcn36xx/Kconfig</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wcn36xx/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wcn36xx/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wcn36xx/debug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wcn36xx/debug.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wcn36xx/debug.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wcn36xx/debug.h</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wcn36xx/dxe.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wcn36xx/dxe.c</a></td><td class='right'>576</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wcn36xx/dxe.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wcn36xx/dxe.h</a></td><td class='right'>239</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wcn36xx/firmware.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wcn36xx/firmware.c</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wcn36xx/firmware.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wcn36xx/firmware.h</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wcn36xx/hal.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wcn36xx/hal.h</a></td><td class='right'>592</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wcn36xx/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wcn36xx/main.c</a></td><td class='right'>1095</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wcn36xx/pmc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wcn36xx/pmc.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wcn36xx/smd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wcn36xx/smd.c</a></td><td class='right'>2175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wcn36xx/smd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wcn36xx/smd.h</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wcn36xx/testmode.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wcn36xx/testmode.c</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wcn36xx/testmode.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wcn36xx/testmode.h</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wcn36xx/testmode_i.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wcn36xx/testmode_i.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wcn36xx/txrx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wcn36xx/txrx.c</a></td><td class='right'>516</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wcn36xx/txrx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wcn36xx/txrx.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wcn36xx/wcn36xx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wcn36xx/wcn36xx.h</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wil6210/Kconfig</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wil6210/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/boot_loader.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wil6210/boot_loader.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/cfg80211.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wil6210/cfg80211.c</a></td><td class='right'>2980</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/debug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wil6210/debug.c</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wil6210/debugfs.c</a></td><td class='right'>1988</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wil6210/ethtool.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/fw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wil6210/fw.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/fw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wil6210/fw.h</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/fw_inc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wil6210/fw_inc.c</a></td><td class='right'>476</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/interrupt.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wil6210/interrupt.c</a></td><td class='right'>602</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/ioctl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wil6210/ioctl.c</a></td><td class='right'>173</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wil6210/main.c</a></td><td class='right'>1736</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/netdev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wil6210/netdev.c</a></td><td class='right'>509</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/p2p.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wil6210/p2p.c</a></td><td class='right'>379</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/pcie_bus.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wil6210/pcie_bus.c</a></td><td class='right'>493</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/pm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wil6210/pm.c</a></td><td class='right'>462</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/pmc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wil6210/pmc.c</a></td><td class='right'>217</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/pmc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wil6210/pmc.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/rx_reorder.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wil6210/rx_reorder.c</a></td><td class='right'>360</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/trace.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wil6210/trace.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/trace.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wil6210/trace.h</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/txrx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wil6210/txrx.c</a></td><td class='right'>2106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/txrx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wil6210/txrx.h</a></td><td class='right'>265</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/txrx_edma.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wil6210/txrx_edma.c</a></td><td class='right'>1647</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/txrx_edma.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wil6210/txrx_edma.h</a></td><td class='right'>604</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/wil6210.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wil6210/wil6210.h</a></td><td class='right'>1040</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/wil_crash_dump.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wil6210/wil_crash_dump.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/wil_platform.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wil6210/wil_platform.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/wil_platform.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wil6210/wil_platform.h</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/wmi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wil6210/wmi.c</a></td><td class='right'>3359</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ath/wil6210/wmi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ath/wil6210/wmi.h</a></td><td class='right'>4363</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.3%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 92.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/atmel.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/atmel.c</a></td><td class='right'>4549</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 8.0%;'/><td class='none' style='width: 92.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/atmel.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/atmel.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/atmel/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/atmel/Kconfig</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/atmel/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/atmel/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/atmel/at76c50x-usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/atmel/at76c50x-usb.c</a> (renamed from drivers/net/wireless/at76c50x-usb.c)</td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/atmel/at76c50x-usb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/atmel/at76c50x-usb.h</a> (renamed from drivers/net/wireless/at76c50x-usb.h)</td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/atmel_cs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/atmel_cs.c</a></td><td class='right'>286</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/atmel_pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/atmel_pci.c</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43/Kconfig</a></td><td class='right'>207</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43/Makefile</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43/bus.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43/bus.c</a></td><td class='right'>265</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43/bus.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43/bus.h</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43/debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43/debugfs.c</a></td><td class='right'>826</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43/debugfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43/debugfs.h</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43/dma.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43/dma.c</a></td><td class='right'>1831</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.2%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43/dma.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43/dma.h</a></td><td class='right'>305</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43/leds.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43/leds.c</a></td><td class='right'>359</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43/leds.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43/leds.h</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43/main.c</a></td><td class='right'>5901</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 10.3%;'/><td class='none' style='width: 89.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43/main.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43/main.h</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43/pcmcia.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43/pcmcia.c</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43/pcmcia.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43/pcmcia.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43/phy_a.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43/phy_a.c</a></td><td class='right'>595</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43/phy_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43/phy_common.c</a></td><td class='right'>653</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43/phy_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43/phy_common.h</a></td><td class='right'>457</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43/phy_lcn.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43/phy_lcn.c</a></td><td class='right'>855</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43/phy_lcn.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43/phy_lcn.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43/phy_n.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43/phy_n.c</a></td><td class='right'>6726</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 11.8%;'/><td class='none' style='width: 88.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43/pio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43/pio.c</a></td><td class='right'>834</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43/pio.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43/pio.h</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43/rfkill.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43/rfkill.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43/rfkill.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43/rfkill.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43/sdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43/sdio.c</a></td><td class='right'>207</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43/sdio.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43/sdio.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43/sysfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43/sysfs.c</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43/sysfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43/sysfs.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43/wa.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43/wa.c</a></td><td class='right'>634</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43/xmit.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43/xmit.c</a></td><td class='right'>947</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43/xmit.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43/xmit.h</a></td><td class='right'>416</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43legacy/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43legacy/Kconfig</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43legacy/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43legacy/Makefile</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43legacy/debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43legacy/debugfs.c</a></td><td class='right'>500</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43legacy/debugfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43legacy/debugfs.h</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43legacy/dma.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43legacy/dma.c</a></td><td class='right'>1455</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43legacy/dma.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43legacy/dma.h</a></td><td class='right'>231</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43legacy/leds.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43legacy/leds.c</a></td><td class='right'>243</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43legacy/leds.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43legacy/leds.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43legacy/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43legacy/main.c</a></td><td class='right'>4062</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 7.1%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43legacy/main.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43legacy/main.h</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43legacy/phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43legacy/phy.c</a></td><td class='right'>2258</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43legacy/phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43legacy/phy.h</a></td><td class='right'>209</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43legacy/pio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43legacy/pio.c</a></td><td class='right'>695</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43legacy/pio.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43legacy/pio.h</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43legacy/rfkill.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43legacy/rfkill.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43legacy/rfkill.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43legacy/rfkill.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43legacy/sysfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43legacy/sysfs.c</a></td><td class='right'>238</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43legacy/sysfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43legacy/sysfs.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43legacy/xmit.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43legacy/xmit.c</a></td><td class='right'>664</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/b43legacy/xmit.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/b43legacy/xmit.h</a></td><td class='right'>261</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/Kconfig</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/Makefile</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/Makefile</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/bcdc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/bcdc.c</a></td><td class='right'>395</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/bcdc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/bcdc.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/bcmsdh.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/bcmsdh.c</a></td><td class='right'>1380</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/btcoex.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/btcoex.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/bus.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/bus.h</a></td><td class='right'>227</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/cfg80211.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/cfg80211.c</a></td><td class='right'>6214</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 10.9%;'/><td class='none' style='width: 89.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/cfg80211.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/cfg80211.h</a></td><td class='right'>504</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/chip.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/chip.c</a></td><td class='right'>1221</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/chip.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/chip.h</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/common.c</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/common.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/commonring.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/commonring.h</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/core.c</a></td><td class='right'>1213</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/core.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/core.h</a></td><td class='right'>217</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/debug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/debug.c</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/debug.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/debug.h</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/feature.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/feature.c</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/feature.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/feature.h</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/firmware.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/firmware.c</a></td><td class='right'>533</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/firmware.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/firmware.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/flowring.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/flowring.h</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/fweh.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/fweh.c</a></td><td class='right'>464</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/fweh.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/fweh.h</a></td><td class='right'>284</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/fwil.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/fwil.c</a></td><td class='right'>420</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/fwil.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/fwil.h</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/fwil_types.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/fwil_types.h</a></td><td class='right'>624</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/fwsignal.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/fwsignal.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/msgbuf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/msgbuf.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/of.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/of.c</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/of.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/of.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/p2p.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/p2p.c</a></td><td class='right'>2432</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.3%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/p2p.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/p2p.h</a></td><td class='right'>184</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/pcie.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/pcie.c</a></td><td class='right'>1975</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.5%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/pcie.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/pcie.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/proto.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/proto.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/proto.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/proto.h</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/sdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/sdio.c</a></td><td class='right'>4334</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 7.6%;'/><td class='none' style='width: 92.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/sdio.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/sdio.h</a></td><td class='right'>377</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/tracepoint.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/tracepoint.c</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/tracepoint.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/tracepoint.h</a></td><td class='right'>152</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/usb.c</a></td><td class='right'>1512</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/usb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/usb.h</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmfmac/vendor.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmfmac/vendor.h</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmsmac/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmsmac/Makefile</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmsmac/channel.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmsmac/channel.c</a></td><td class='right'>774</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmsmac/debug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmsmac/debug.c</a></td><td class='right'>270</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmsmac/debug.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmsmac/debug.h</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmsmac/dma.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmsmac/dma.c</a></td><td class='right'>1564</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmsmac/dma.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmsmac/dma.h</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmsmac/led.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmsmac/led.c</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmsmac/led.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmsmac/led.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmsmac/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmsmac/main.c</a></td><td class='right'>8139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 14.2%;'/><td class='none' style='width: 85.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmsmac/main.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmsmac/main.h</a></td><td class='right'>669</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmsmac/phy/phy_lcn.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmsmac/phy/phy_lcn.c</a></td><td class='right'>5247</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 9.2%;'/><td class='none' style='width: 90.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmsmac/phy/phy_lcn.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmsmac/phy/phy_lcn.h</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmsmac/phy/phy_n.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmsmac/phy/phy_n.c</a></td><td class='right'>28721</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 50.2%;'/><td class='none' style='width: 49.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmsmac/phy/phy_qmath.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmsmac/phy/phy_qmath.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmsmac/phy/phytbl_lcn.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmsmac/phy/phytbl_lcn.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmsmac/phy/phytbl_n.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmsmac/phy/phytbl_n.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmsmac/types.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmsmac/types.h</a></td><td class='right'>303</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmutil/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmutil/Makefile</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmutil/d11.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmutil/d11.c</a></td><td class='right'>221</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/brcmutil/utils.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/brcmutil/utils.c</a></td><td class='right'>339</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/include/brcm_hw_ids.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/include/brcm_hw_ids.h</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/include/defs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/include/defs.h</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/brcm80211/include/soc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/brcm80211/include/soc.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/Kconfig</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/Kconfig</a></td><td class='right'>189</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/Makefile</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/b43.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/b43.h</a> (renamed from drivers/net/wireless/b43/b43.h)</td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/bus.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/bus.c</a></td><td class='right'>252</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/bus.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/bus.h</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/debugfs.c</a></td><td class='right'>768</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/debugfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/debugfs.h</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/dma.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/dma.c</a></td><td class='right'>1771</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/dma.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/dma.h</a></td><td class='right'>306</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/leds.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/leds.c</a></td><td class='right'>350</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/leds.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/leds.h</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/lo.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/lo.c</a> (renamed from drivers/net/wireless/b43/lo.c)</td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/lo.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/lo.h</a> (renamed from drivers/net/wireless/b43/lo.h)</td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/main.c</a></td><td class='right'>5861</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/main.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/main.h</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/phy_a.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/phy_a.h</a> (renamed from drivers/net/wireless/b43/phy_a.h)</td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/phy_ac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/phy_ac.c</a> (renamed from drivers/net/wireless/b43/phy_ac.c)</td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/phy_ac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/phy_ac.h</a> (renamed from drivers/net/wireless/b43/phy_ac.h)</td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/phy_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/phy_common.c</a></td><td class='right'>593</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/phy_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/phy_common.h</a></td><td class='right'>446</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/phy_g.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/phy_g.c</a> (renamed from drivers/net/wireless/b43/phy_g.c)</td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/phy_g.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/phy_g.h</a> (renamed from drivers/net/wireless/b43/phy_g.h)</td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/phy_ht.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/phy_ht.c</a> (renamed from drivers/net/wireless/b43/phy_ht.c)</td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/phy_ht.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/phy_ht.h</a> (renamed from drivers/net/wireless/b43/phy_ht.h)</td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/phy_lcn.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/phy_lcn.c</a></td><td class='right'>855</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/phy_lcn.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/phy_lcn.h</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/phy_lp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/phy_lp.c</a> (renamed from drivers/net/wireless/b43/phy_lp.c)</td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/phy_lp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/phy_lp.h</a> (renamed from drivers/net/wireless/b43/phy_lp.h)</td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/phy_n.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/phy_n.c</a></td><td class='right'>6664</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/phy_n.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/phy_n.h</a> (renamed from drivers/net/wireless/b43/phy_n.h)</td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/pio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/pio.c</a></td><td class='right'>821</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/pio.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/pio.h</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/ppr.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/ppr.c</a> (renamed from drivers/net/wireless/b43/ppr.c)</td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/ppr.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/ppr.h</a> (renamed from drivers/net/wireless/b43/ppr.h)</td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/radio_2055.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/radio_2055.c</a> (renamed from drivers/net/wireless/b43/radio_2055.c)</td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/radio_2055.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/radio_2055.h</a> (renamed from drivers/net/wireless/b43/radio_2055.h)</td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/radio_2056.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/radio_2056.c</a> (renamed from drivers/net/wireless/b43/radio_2056.c)</td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/radio_2056.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/radio_2056.h</a> (renamed from drivers/net/wireless/b43/radio_2056.h)</td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/radio_2057.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/radio_2057.c</a> (renamed from drivers/net/wireless/b43/radio_2057.c)</td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/radio_2057.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/radio_2057.h</a> (renamed from drivers/net/wireless/b43/radio_2057.h)</td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/radio_2059.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/radio_2059.c</a> (renamed from drivers/net/wireless/b43/radio_2059.c)</td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/radio_2059.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/radio_2059.h</a> (renamed from drivers/net/wireless/b43/radio_2059.h)</td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/rfkill.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/rfkill.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/rfkill.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/rfkill.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/sdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/sdio.c</a></td><td class='right'>203</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/sdio.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/sdio.h</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/sysfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/sysfs.c</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/sysfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/sysfs.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/tables.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/tables.c</a> (renamed from drivers/net/wireless/b43/tables.c)</td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/tables.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/tables.h</a> (renamed from drivers/net/wireless/b43/tables.h)</td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/tables_lpphy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/tables_lpphy.c</a> (renamed from drivers/net/wireless/b43/tables_lpphy.c)</td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/tables_lpphy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/tables_lpphy.h</a> (renamed from drivers/net/wireless/b43/tables_lpphy.h)</td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/tables_nphy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/tables_nphy.c</a> (renamed from drivers/net/wireless/b43/tables_nphy.c)</td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/tables_nphy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/tables_nphy.h</a> (renamed from drivers/net/wireless/b43/tables_nphy.h)</td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/tables_phy_ht.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/tables_phy_ht.c</a> (renamed from drivers/net/wireless/b43/tables_phy_ht.c)</td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/tables_phy_ht.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/tables_phy_ht.h</a> (renamed from drivers/net/wireless/b43/tables_phy_ht.h)</td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/tables_phy_lcn.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/tables_phy_lcn.c</a> (renamed from drivers/net/wireless/b43/tables_phy_lcn.c)</td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/tables_phy_lcn.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/tables_phy_lcn.h</a> (renamed from drivers/net/wireless/b43/tables_phy_lcn.h)</td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/wa.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/wa.c</a></td><td class='right'>376</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/wa.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/wa.h</a> (renamed from drivers/net/wireless/b43/wa.h)</td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/xmit.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/xmit.c</a></td><td class='right'>913</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43/xmit.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43/xmit.h</a></td><td class='right'>417</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43legacy/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43legacy/Kconfig</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43legacy/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43legacy/Makefile</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43legacy/b43legacy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43legacy/b43legacy.h</a> (renamed from drivers/net/wireless/b43legacy/b43legacy.h)</td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43legacy/debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43legacy/debugfs.c</a></td><td class='right'>447</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43legacy/debugfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43legacy/debugfs.h</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43legacy/dma.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43legacy/dma.c</a></td><td class='right'>1370</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43legacy/dma.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43legacy/dma.h</a></td><td class='right'>232</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43legacy/ilt.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43legacy/ilt.c</a> (renamed from drivers/net/wireless/b43legacy/ilt.c)</td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43legacy/ilt.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43legacy/ilt.h</a> (renamed from drivers/net/wireless/b43legacy/ilt.h)</td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43legacy/leds.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43legacy/leds.c</a></td><td class='right'>230</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43legacy/leds.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43legacy/leds.h</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43legacy/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43legacy/main.c</a></td><td class='right'>4035</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43legacy/main.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43legacy/main.h</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43legacy/phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43legacy/phy.c</a></td><td class='right'>2233</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43legacy/phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43legacy/phy.h</a></td><td class='right'>196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43legacy/pio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43legacy/pio.c</a></td><td class='right'>681</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43legacy/pio.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43legacy/pio.h</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43legacy/radio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43legacy/radio.c</a> (renamed from drivers/net/wireless/b43legacy/radio.c)</td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43legacy/radio.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43legacy/radio.h</a> (renamed from drivers/net/wireless/b43legacy/radio.h)</td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43legacy/rfkill.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43legacy/rfkill.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43legacy/rfkill.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43legacy/rfkill.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43legacy/sysfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43legacy/sysfs.c</a></td><td class='right'>222</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43legacy/sysfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43legacy/sysfs.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43legacy/xmit.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43legacy/xmit.c</a></td><td class='right'>652</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/b43legacy/xmit.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/b43legacy/xmit.h</a></td><td class='right'>262</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/Kconfig</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/Makefile</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/Kconfig</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/Makefile</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/acpi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/acpi.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bca/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/bca/Makefile</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bca/core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/bca/core.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bca/module.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/bca/module.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bca/vops.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/bca/vops.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcdc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcdc.c</a></td><td class='right'>490</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcdc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcdc.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c</a></td><td class='right'>1269</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/btcoex.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/btcoex.c</a> (renamed from drivers/net/wireless/brcm80211/brcmfmac/btcoex.c)</td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/btcoex.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/btcoex.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bus.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/bus.h</a></td><td class='right'>342</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c</a></td><td class='right'>8499</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 85.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.h</a></td><td class='right'>498</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c</a></td><td class='right'>1472</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.h</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.c</a></td><td class='right'>637</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/common.h</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/commonring.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/commonring.c</a> (renamed from drivers/net/wireless/brcm80211/brcmfmac/commonring.c)</td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/commonring.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/commonring.h</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/core.c</a></td><td class='right'>1576</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/core.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/core.h</a></td><td class='right'>228</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cyw/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/cyw/Makefile</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cyw/core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/cyw/core.c</a></td><td class='right'>373</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cyw/fwil_types.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/cyw/fwil_types.h</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cyw/module.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/cyw/module.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cyw/vops.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/cyw/vops.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/debug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/debug.c</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/debug.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/debug.h</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/dmi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/dmi.c</a></td><td class='right'>229</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/feature.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/feature.c</a></td><td class='right'>385</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/feature.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/feature.h</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/firmware.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/firmware.c</a></td><td class='right'>863</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/firmware.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/firmware.h</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/flowring.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/flowring.c</a> (renamed from drivers/net/wireless/brcm80211/brcmfmac/flowring.c)</td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/flowring.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/flowring.h</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fweh.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/fweh.c</a></td><td class='right'>514</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fweh.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/fweh.h</a></td><td class='right'>401</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwil.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwil.c</a></td><td class='right'>432</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwil.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwil.h</a></td><td class='right'>224</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwil_types.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwil_types.h</a></td><td class='right'>1239</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwsignal.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwsignal.c</a> (renamed from drivers/net/wireless/brcm80211/brcmfmac/fwsignal.c)</td><td class='right'>732</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwsignal.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwsignal.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwvid.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwvid.c</a></td><td class='right'>200</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwvid.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwvid.h</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/msgbuf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/msgbuf.c</a> (renamed from drivers/net/wireless/brcm80211/brcmfmac/msgbuf.c)</td><td class='right'>367</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/msgbuf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/msgbuf.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/of.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/of.c</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/of.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/of.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/p2p.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/p2p.c</a></td><td class='right'>2538</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/p2p.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/p2p.h</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c</a></td><td class='right'>2785</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pno.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/pno.c</a></td><td class='right'>595</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pno.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/pno.h</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/proto.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/proto.c</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/proto.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/proto.h</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c</a></td><td class='right'>4650</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.h</a></td><td class='right'>370</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/tracepoint.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/tracepoint.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/tracepoint.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/tracepoint.h</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/usb.c</a></td><td class='right'>1604</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/usb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/usb.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/vendor.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/vendor.c</a> (renamed from drivers/net/wireless/brcm80211/brcmfmac/vendor.c)</td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/vendor.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/vendor.h</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/wcc/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/wcc/Makefile</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/wcc/core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/wcc/core.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/wcc/module.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/wcc/module.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/wcc/vops.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/wcc/vops.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/xtlv.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/xtlv.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmfmac/xtlv.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmfmac/xtlv.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/Makefile</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/aiutils.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/aiutils.c</a> (renamed from drivers/net/wireless/brcm80211/brcmsmac/aiutils.c)</td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/aiutils.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/aiutils.h</a> (renamed from drivers/net/wireless/brcm80211/brcmsmac/aiutils.h)</td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/ampdu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/ampdu.c</a> (renamed from drivers/net/wireless/brcm80211/brcmsmac/ampdu.c)</td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/ampdu.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/ampdu.h</a> (renamed from drivers/net/wireless/brcm80211/brcmsmac/ampdu.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/antsel.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/antsel.c</a> (renamed from drivers/net/wireless/brcm80211/brcmsmac/antsel.c)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/antsel.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/antsel.h</a> (renamed from drivers/net/wireless/brcm80211/brcmsmac/antsel.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/brcms_trace_brcmsmac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/brcms_trace_brcmsmac.h</a> (renamed from drivers/net/wireless/brcm80211/brcmsmac/brcms_trace_brcmsmac.h)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/brcms_trace_brcmsmac_msg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/brcms_trace_brcmsmac_msg.h</a> (renamed from drivers/net/wireless/brcm80211/brcmsmac/brcms_trace_brcmsmac_msg.h)</td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/brcms_trace_brcmsmac_tx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/brcms_trace_brcmsmac_tx.h</a> (renamed from drivers/net/wireless/brcm80211/brcmsmac/brcms_trace_brcmsmac_tx.h)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/brcms_trace_events.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/brcms_trace_events.c</a> (renamed from drivers/net/wireless/brcm80211/brcmsmac/brcms_trace_events.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/brcms_trace_events.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/brcms_trace_events.h</a> (renamed from drivers/net/wireless/brcm80211/brcmsmac/brcms_trace_events.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/channel.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/channel.c</a></td><td class='right'>771</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/channel.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/channel.h</a> (renamed from drivers/net/wireless/brcm80211/brcmsmac/channel.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/d11.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/d11.h</a> (renamed from drivers/net/wireless/brcm80211/brcmsmac/d11.h)</td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/debug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/debug.c</a></td><td class='right'>246</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/debug.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/debug.h</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/dma.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/dma.c</a></td><td class='right'>1556</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/dma.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/dma.h</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/led.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/led.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/led.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/led.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/mac80211_if.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/mac80211_if.c</a> (renamed from drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.c)</td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/mac80211_if.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/mac80211_if.h</a> (renamed from drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.h)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c</a></td><td class='right'>8065</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 85.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.h</a></td><td class='right'>670</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_cmn.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_cmn.c</a> (renamed from drivers/net/wireless/brcm80211/brcmsmac/phy/phy_cmn.c)</td><td class='right'>476</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_hal.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_hal.h</a> (renamed from drivers/net/wireless/brcm80211/brcmsmac/phy/phy_hal.h)</td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_int.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_int.h</a> (renamed from drivers/net/wireless/brcm80211/brcmsmac/phy/phy_int.h)</td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c</a></td><td class='right'>5151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.h</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_n.c</a></td><td class='right'>28572</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 50.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 50.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.c</a> (renamed from drivers/net/wireless/brcm80211/brcmsmac/phy/phy_qmath.c)</td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_qmath.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_radio.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_radio.h</a> (renamed from drivers/net/wireless/brcm80211/brcmsmac/phy/phy_radio.h)</td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phyreg_n.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phyreg_n.h</a> (renamed from drivers/net/wireless/brcm80211/brcmsmac/phy/phyreg_n.h)</td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phytbl_lcn.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phytbl_lcn.c</a> (renamed from drivers/net/wireless/brcm80211/brcmsmac/phy/phytbl_lcn.c)</td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phytbl_lcn.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phytbl_lcn.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phytbl_n.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phytbl_n.c</a> (renamed from drivers/net/wireless/brcm80211/brcmsmac/phy/phytbl_n.c)</td><td class='right'>743</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phytbl_n.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phytbl_n.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy_shim.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy_shim.c</a> (renamed from drivers/net/wireless/brcm80211/brcmsmac/phy_shim.c)</td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy_shim.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy_shim.h</a> (renamed from drivers/net/wireless/brcm80211/brcmsmac/phy_shim.h)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/pmu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/pmu.c</a> (renamed from drivers/net/wireless/brcm80211/brcmsmac/pmu.c)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/pmu.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/pmu.h</a> (renamed from drivers/net/wireless/brcm80211/brcmsmac/pmu.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/pub.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/pub.h</a> (renamed from drivers/net/wireless/brcm80211/brcmsmac/pub.h)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/rate.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/rate.c</a> (renamed from drivers/net/wireless/brcm80211/brcmsmac/rate.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/rate.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/rate.h</a> (renamed from drivers/net/wireless/brcm80211/brcmsmac/rate.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/scb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/scb.h</a> (renamed from drivers/net/wireless/brcm80211/brcmsmac/scb.h)</td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/stf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/stf.c</a> (renamed from drivers/net/wireless/brcm80211/brcmsmac/stf.c)</td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/stf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/stf.h</a> (renamed from drivers/net/wireless/brcm80211/brcmsmac/stf.h)</td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/types.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/types.h</a></td><td class='right'>294</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/ucode_loader.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/ucode_loader.c</a> (renamed from drivers/net/wireless/brcm80211/brcmsmac/ucode_loader.c)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmsmac/ucode_loader.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmsmac/ucode_loader.h</a> (renamed from drivers/net/wireless/brcm80211/brcmsmac/ucode_loader.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmutil/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmutil/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmutil/d11.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmutil/d11.c</a></td><td class='right'>247</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/brcmutil/utils.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/brcmutil/utils.c</a></td><td class='right'>327</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/include/brcm_hw_ids.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/include/brcm_hw_ids.h</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/include/brcmu_d11.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/include/brcmu_d11.h</a> (renamed from drivers/net/wireless/brcm80211/include/brcmu_d11.h)</td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/include/brcmu_utils.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/include/brcmu_utils.h</a> (renamed from drivers/net/wireless/brcm80211/include/brcmu_utils.h)</td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/include/brcmu_wifi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/include/brcmu_wifi.h</a> (renamed from drivers/net/wireless/brcm80211/include/brcmu_wifi.h)</td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/include/chipcommon.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/include/chipcommon.h</a> (renamed from drivers/net/wireless/brcm80211/include/chipcommon.h)</td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/include/defs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/include/defs.h</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/broadcom/brcm80211/include/soc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/broadcom/brcm80211/include/soc.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/cw1200/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/cw1200/Kconfig</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/cw1200/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/cw1200/Makefile</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/cw1200/bh.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/cw1200/bh.c</a></td><td class='right'>619</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/cw1200/bh.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/cw1200/bh.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/cw1200/debug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/cw1200/debug.c</a></td><td class='right'>430</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/cw1200/debug.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/cw1200/debug.h</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/cw1200/fwio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/cw1200/fwio.c</a></td><td class='right'>526</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/cw1200/fwio.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/cw1200/fwio.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/cw1200/hwio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/cw1200/hwio.c</a></td><td class='right'>312</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/cw1200/hwio.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/cw1200/hwio.h</a></td><td class='right'>247</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/cw1200/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/cw1200/main.c</a></td><td class='right'>601</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/cw1200/pm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/cw1200/pm.c</a></td><td class='right'>367</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/cw1200/queue.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/cw1200/queue.c</a></td><td class='right'>581</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/cw1200/queue.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/cw1200/queue.h</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/cw1200/scan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/cw1200/scan.c</a></td><td class='right'>463</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/cw1200/scan.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/cw1200/scan.h</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/cw1200/sta.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/cw1200/sta.c</a></td><td class='right'>2399</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.2%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/cw1200/sta.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/cw1200/sta.h</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/cw1200/txrx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/cw1200/txrx.c</a></td><td class='right'>1472</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/cw1200/txrx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/cw1200/txrx.h</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/hostap/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/hostap/Kconfig</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/hostap/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/hostap/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/hostap/hostap.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/hostap/hostap.h</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/hostap/hostap_80211.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/hostap/hostap_80211.h</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/hostap/hostap_80211_rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/hostap/hostap_80211_rx.c</a></td><td class='right'>1117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/hostap/hostap_80211_tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/hostap/hostap_80211_tx.c</a></td><td class='right'>553</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/hostap/hostap_ap.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/hostap/hostap_ap.c</a></td><td class='right'>3339</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.8%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/hostap/hostap_ap.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/hostap/hostap_ap.h</a></td><td class='right'>263</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/hostap/hostap_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/hostap/hostap_common.h</a></td><td class='right'>419</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/hostap/hostap_config.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/hostap/hostap_config.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/hostap/hostap_cs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/hostap/hostap_cs.c</a></td><td class='right'>708</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/hostap/hostap_download.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/hostap/hostap_download.c</a></td><td class='right'>812</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/hostap/hostap_hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/hostap/hostap_hw.c</a></td><td class='right'>3424</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.0%;'/><td class='none' style='width: 94.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/hostap/hostap_info.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/hostap/hostap_info.c</a></td><td class='right'>507</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/hostap/hostap_ioctl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/hostap/hostap_ioctl.c</a></td><td class='right'>4054</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 7.1%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/hostap/hostap_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/hostap/hostap_main.c</a></td><td class='right'>1140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/hostap/hostap_pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/hostap/hostap_pci.c</a></td><td class='right'>459</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/hostap/hostap_plx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/hostap/hostap_plx.c</a></td><td class='right'>618</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/hostap/hostap_proc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/hostap/hostap_proc.c</a></td><td class='right'>499</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/hostap/hostap_wlan.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/hostap/hostap_wlan.h</a></td><td class='right'>1047</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/Kconfig</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/ipw2x00/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/ipw2x00/Kconfig</a></td><td class='right'>186</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/ipw2x00/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/ipw2x00/Makefile</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/ipw2x00/ipw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/ipw2x00/ipw.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/ipw2x00/ipw2100.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/ipw2x00/ipw2100.c</a> (renamed from drivers/net/wireless/ipw2x00/ipw2100.c)</td><td class='right'>463</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/ipw2x00/ipw2100.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/ipw2x00/ipw2100.h</a> (renamed from drivers/net/wireless/ipw2x00/ipw2100.h)</td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/ipw2x00/ipw2200.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/ipw2x00/ipw2200.c</a> (renamed from drivers/net/wireless/ipw2x00/ipw2200.c)</td><td class='right'>615</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/ipw2x00/ipw2200.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/ipw2x00/ipw2200.h</a> (renamed from drivers/net/wireless/ipw2x00/ipw2200.h)</td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/ipw2x00/libipw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/ipw2x00/libipw.h</a> (renamed from drivers/net/wireless/ipw2x00/libipw.h)</td><td class='right'>197</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/ipw2x00/libipw_crypto.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/ipw2x00/libipw_crypto.c</a></td><td class='right'>246</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/ipw2x00/libipw_crypto_ccmp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/ipw2x00/libipw_crypto_ccmp.c</a></td><td class='right'>438</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/ipw2x00/libipw_crypto_tkip.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/ipw2x00/libipw_crypto_tkip.c</a></td><td class='right'>728</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/ipw2x00/libipw_crypto_wep.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/ipw2x00/libipw_crypto_wep.c</a></td><td class='right'>247</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/ipw2x00/libipw_geo.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/ipw2x00/libipw_geo.c</a> (renamed from drivers/net/wireless/ipw2x00/libipw_geo.c)</td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/ipw2x00/libipw_module.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/ipw2x00/libipw_module.c</a> (renamed from drivers/net/wireless/ipw2x00/libipw_module.c)</td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/ipw2x00/libipw_rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/ipw2x00/libipw_rx.c</a> (renamed from drivers/net/wireless/ipw2x00/libipw_rx.c)</td><td class='right'>188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/ipw2x00/libipw_spy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/ipw2x00/libipw_spy.c</a></td><td class='right'>233</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/ipw2x00/libipw_tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/ipw2x00/libipw_tx.c</a> (renamed from drivers/net/wireless/ipw2x00/libipw_tx.c)</td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/ipw2x00/libipw_wx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/ipw2x00/libipw_wx.c</a> (renamed from drivers/net/wireless/ipw2x00/libipw_wx.c)</td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlegacy/3945-debug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlegacy/3945-debug.c</a> (renamed from drivers/net/wireless/iwlegacy/3945-debug.c)</td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlegacy/3945-mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlegacy/3945-mac.c</a> (renamed from drivers/net/wireless/iwlegacy/3945-mac.c)</td><td class='right'>303</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlegacy/3945-rs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlegacy/3945-rs.c</a> (renamed from drivers/net/wireless/iwlegacy/3945-rs.c)</td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlegacy/3945.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlegacy/3945.c</a> (renamed from drivers/net/wireless/iwlegacy/3945.c)</td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlegacy/3945.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlegacy/3945.h</a> (renamed from drivers/net/wireless/iwlegacy/3945.h)</td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlegacy/4965-calib.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlegacy/4965-calib.c</a> (renamed from drivers/net/wireless/iwlegacy/4965-calib.c)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlegacy/4965-debug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlegacy/4965-debug.c</a> (renamed from drivers/net/wireless/iwlegacy/4965-debug.c)</td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlegacy/4965-mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlegacy/4965-mac.c</a> (renamed from drivers/net/wireless/iwlegacy/4965-mac.c)</td><td class='right'>369</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlegacy/4965-rs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlegacy/4965-rs.c</a> (renamed from drivers/net/wireless/iwlegacy/4965-rs.c)</td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlegacy/4965.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlegacy/4965.c</a> (renamed from drivers/net/wireless/iwlegacy/4965.c)</td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlegacy/4965.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlegacy/4965.h</a> (renamed from drivers/net/wireless/iwlegacy/4965.h)</td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlegacy/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlegacy/Kconfig</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlegacy/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlegacy/Makefile</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlegacy/commands.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlegacy/commands.h</a></td><td class='right'>3385</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlegacy/common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlegacy/common.c</a></td><td class='right'>5551</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlegacy/common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlegacy/common.h</a></td><td class='right'>3064</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlegacy/csr.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlegacy/csr.h</a> (renamed from drivers/net/wireless/iwlegacy/csr.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlegacy/debug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlegacy/debug.c</a></td><td class='right'>1379</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlegacy/iwl-spectrum.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlegacy/iwl-spectrum.h</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlegacy/prph.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlegacy/prph.h</a> (renamed from drivers/net/wireless/iwlegacy/prph.h)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/Kconfig</a></td><td class='right'>185</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/Makefile</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/1000.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/cfg/1000.c</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/2000.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/cfg/2000.c</a></td><td class='right'>199</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/22000.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/cfg/22000.c</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/5000.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/cfg/5000.c</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/6000.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/cfg/6000.c</a></td><td class='right'>357</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/7000.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/cfg/7000.c</a></td><td class='right'>235</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/8000.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/cfg/8000.c</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/9000.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/cfg/9000.c</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/ax210.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/cfg/ax210.c</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/bz.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/cfg/bz.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/dr.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/cfg/dr.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/rf-fm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/cfg/rf-fm.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/rf-gf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/cfg/rf-gf.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/rf-hr.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/cfg/rf-hr.c</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/rf-jf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/cfg/rf-jf.c</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/rf-pe.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/cfg/rf-pe.c</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/rf-wh.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/cfg/rf-wh.c</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/cfg/sc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/cfg/sc.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/dvm/Makefile</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/agn.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/dvm/agn.h</a> (renamed from drivers/net/wireless/iwlwifi/dvm/agn.h)</td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/calib.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/dvm/calib.c</a> (renamed from drivers/net/wireless/iwlwifi/dvm/calib.c)</td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/calib.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/dvm/calib.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/commands.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/dvm/commands.h</a></td><td class='right'>3939</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/dvm/debugfs.c</a></td><td class='right'>2383</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/dev.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/dvm/dev.h</a></td><td class='right'>927</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/devices.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/dvm/devices.c</a> (renamed from drivers/net/wireless/iwlwifi/dvm/devices.c)</td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/eeprom.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/dvm/eeprom.c</a></td><td class='right'>1144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/led.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/dvm/led.c</a></td><td class='right'>208</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/led.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/dvm/led.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/lib.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/dvm/lib.c</a> (renamed from drivers/net/wireless/iwlwifi/dvm/lib.c)</td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/mac80211.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/dvm/mac80211.c</a></td><td class='right'>1628</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/dvm/main.c</a></td><td class='right'>2183</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/power.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/dvm/power.c</a></td><td class='right'>377</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/power.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/dvm/power.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/rs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/dvm/rs.c</a></td><td class='right'>3290</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/rs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/dvm/rs.h</a></td><td class='right'>402</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/dvm/rx.c</a></td><td class='right'>1021</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/rxon.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/dvm/rxon.c</a> (renamed from drivers/net/wireless/iwlwifi/dvm/rxon.c)</td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/scan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/dvm/scan.c</a></td><td class='right'>1062</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/sta.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/dvm/sta.c</a></td><td class='right'>1425</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/tt.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/dvm/tt.c</a></td><td class='right'>657</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/tt.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/dvm/tt.h</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/dvm/tx.c</a></td><td class='right'>1392</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/dvm/ucode.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/dvm/ucode.c</a> (renamed from drivers/net/wireless/iwlwifi/dvm/ucode.c)</td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/acpi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/acpi.c</a></td><td class='right'>1083</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/acpi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/acpi.h</a></td><td class='right'>271</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/alive.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/api/alive.h</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/binding.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/api/binding.h</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/cmdhdr.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/api/cmdhdr.h</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/coex.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/api/coex.h</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/commands.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/api/commands.h</a></td><td class='right'>662</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/config.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/api/config.h</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/context.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/api/context.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/d3.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/api/d3.h</a></td><td class='right'>997</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/datapath.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/api/datapath.h</a></td><td class='right'>701</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/dbg-tlv.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/api/dbg-tlv.h</a></td><td class='right'>584</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/debug.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/api/debug.h</a></td><td class='right'>556</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/dhc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/api/dhc.h</a></td><td class='right'>226</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/filter.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/api/filter.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/led.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/api/led.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/location.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/api/location.h</a></td><td class='right'>1943</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/mac-cfg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/api/mac-cfg.h</a></td><td class='right'>993</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/mac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/api/mac.h</a></td><td class='right'>793</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/nvm-reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/api/nvm-reg.h</a></td><td class='right'>693</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/offload.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/api/offload.h</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/paging.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/api/paging.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/phy-ctxt.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/api/phy-ctxt.h</a></td><td class='right'>177</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/api/phy.h</a></td><td class='right'>237</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/power.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/api/power.h</a></td><td class='right'>790</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/rfi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/api/rfi.h</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/rs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/api/rs.h</a></td><td class='right'>892</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/rx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/api/rx.h</a></td><td class='right'>1330</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/scan.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/api/scan.h</a></td><td class='right'>1316</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/sf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/api/sf.h</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/sta.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/api/sta.h</a></td><td class='right'>497</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/stats.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/api/stats.h</a></td><td class='right'>1090</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/system.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/api/system.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/tdls.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/api/tdls.h</a></td><td class='right'>161</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/time-event.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/api/time-event.h</a></td><td class='right'>519</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/tx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/api/tx.h</a></td><td class='right'>979</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/api/txq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/api/txq.h</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/dbg.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/dbg.c</a></td><td class='right'>3480</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/dbg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/dbg.h</a></td><td class='right'>344</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/debugfs.c</a></td><td class='right'>453</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/debugfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/debugfs.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/dhc-utils.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/dhc-utils.h</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/dump.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/dump.c</a></td><td class='right'>508</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/error-dump.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/error-dump.h</a></td><td class='right'>576</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/file.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/file.h</a></td><td class='right'>1084</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/img.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/img.c</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/img.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/img.h</a></td><td class='right'>285</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/init.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/init.c</a></td><td class='right'>164</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/notif-wait.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/notif-wait.c</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/notif-wait.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/notif-wait.h</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/paging.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/paging.c</a></td><td class='right'>296</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/pnvm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/pnvm.c</a></td><td class='right'>481</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/pnvm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/pnvm.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/regulatory.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/regulatory.c</a></td><td class='right'>743</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/regulatory.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/regulatory.h</a></td><td class='right'>267</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/rs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/rs.c</a></td><td class='right'>161</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/runtime.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/runtime.h</a></td><td class='right'>256</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/smem.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/smem.c</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/uefi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/uefi.c</a></td><td class='right'>845</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/fw/uefi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/fw/uefi.h</a></td><td class='right'>393</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-agn-hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/iwl-agn-hw.h</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-config.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/iwl-config.h</a></td><td class='right'>752</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-csr.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/iwl-csr.h</a></td><td class='right'>660</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.c</a></td><td class='right'>1404</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.h</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-debug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/iwl-debug.c</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-debug.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/iwl-debug.h</a> (renamed from drivers/net/wireless/iwlwifi/iwl-debug.h)</td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-devtrace-data.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/iwl-devtrace-data.h</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-devtrace-io.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/iwl-devtrace-io.h</a></td><td class='right'>194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-devtrace-iwlwifi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/iwl-devtrace-iwlwifi.h</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-devtrace-msg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/iwl-devtrace-msg.h</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-devtrace-ucode.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/iwl-devtrace-ucode.h</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-devtrace.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/iwl-devtrace.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-devtrace.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/iwl-devtrace.h</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-drv.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/iwl-drv.c</a></td><td class='right'>2174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-drv.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/iwl-drv.h</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-fh.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/iwl-fh.h</a></td><td class='right'>735</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-io.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/iwl-io.c</a></td><td class='right'>439</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-io.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/iwl-io.h</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-modparams.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/iwl-modparams.h</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c</a></td><td class='right'>2121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.h</a></td><td class='right'>189</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-nvm-utils.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/iwl-nvm-utils.c</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-nvm-utils.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/iwl-nvm-utils.h</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-op-mode.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/iwl-op-mode.h</a></td><td class='right'>300</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-phy-db.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/iwl-phy-db.c</a></td><td class='right'>438</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-phy-db.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/iwl-phy-db.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-prph.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/iwl-prph.h</a></td><td class='right'>542</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-scd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/iwl-scd.h</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-trans.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/iwl-trans.c</a></td><td class='right'>824</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-trans.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/iwl-trans.h</a></td><td class='right'>1265</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-utils.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/iwl-utils.c</a></td><td class='right'>195</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/iwl-utils.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/iwl-utils.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mei/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mei/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mei/internal.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mei/internal.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mei/iwl-mei.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mei/iwl-mei.h</a></td><td class='right'>542</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mei/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mei/main.c</a></td><td class='right'>2216</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mei/net.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mei/net.c</a></td><td class='right'>412</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mei/sap.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mei/sap.h</a></td><td class='right'>784</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mei/trace-data.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mei/trace-data.h</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mei/trace.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mei/trace.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mei/trace.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mei/trace.h</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/Makefile</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/agg.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/agg.c</a></td><td class='right'>677</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/agg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/agg.h</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/ap.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/ap.c</a></td><td class='right'>363</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/ap.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/ap.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/coex.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/coex.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/coex.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/coex.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/constants.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/constants.h</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/d3.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/d3.c</a></td><td class='right'>2065</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/d3.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/d3.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/debugfs.c</a></td><td class='right'>1113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/debugfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/debugfs.h</a></td><td class='right'>244</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/ftm-initiator.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/ftm-initiator.c</a></td><td class='right'>451</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/ftm-initiator.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/ftm-initiator.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/fw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/fw.c</a></td><td class='right'>548</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/hcmd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/hcmd.h</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/iface.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/iface.c</a></td><td class='right'>703</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/iface.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/iface.h</a></td><td class='right'>250</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/key.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/key.c</a></td><td class='right'>408</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/key.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/key.h</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/led.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/led.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/led.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/led.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/link.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/link.c</a></td><td class='right'>909</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/link.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/link.h</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/low_latency.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/low_latency.c</a></td><td class='right'>336</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/low_latency.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/low_latency.h</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/mac80211.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/mac80211.c</a></td><td class='right'>2702</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/mac80211.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/mac80211.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/mcc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/mcc.c</a></td><td class='right'>285</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/mcc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/mcc.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/mld.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/mld.c</a></td><td class='right'>776</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/mld.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/mld.h</a></td><td class='right'>615</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/mlo.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/mlo.c</a></td><td class='right'>1199</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/mlo.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/mlo.h</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/notif.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/notif.c</a></td><td class='right'>719</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/notif.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/notif.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/phy.c</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/phy.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/power.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/power.c</a></td><td class='right'>391</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/power.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/power.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/ptp.c</a></td><td class='right'>321</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/ptp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/ptp.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/regulatory.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/regulatory.c</a></td><td class='right'>383</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/regulatory.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/regulatory.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/roc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/roc.c</a></td><td class='right'>261</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/roc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/roc.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/rx.c</a></td><td class='right'>2264</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/rx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/rx.h</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/scan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/scan.c</a></td><td class='right'>2179</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/scan.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/scan.h</a></td><td class='right'>173</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/session-protect.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/session-protect.c</a></td><td class='right'>222</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/session-protect.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/session-protect.h</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/sta.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/sta.c</a></td><td class='right'>1319</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/sta.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/sta.h</a></td><td class='right'>273</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/stats.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/stats.c</a></td><td class='right'>521</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/stats.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/stats.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/tests/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/tests/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/tests/agg.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/tests/agg.c</a></td><td class='right'>663</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/tests/hcmd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/tests/hcmd.c</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/tests/link-selection.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/tests/link-selection.c</a></td><td class='right'>339</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/tests/link.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/tests/link.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/tests/module.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/tests/module.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/tests/rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/tests/rx.c</a></td><td class='right'>353</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/tests/utils.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/tests/utils.c</a></td><td class='right'>503</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/tests/utils.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/tests/utils.h</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/thermal.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/thermal.c</a></td><td class='right'>467</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/thermal.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/thermal.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/time_sync.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/time_sync.c</a></td><td class='right'>240</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/time_sync.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/time_sync.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/tlc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/tlc.c</a></td><td class='right'>739</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/tlc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/tlc.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/tx.c</a></td><td class='right'>1394</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mld/tx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mld/tx.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/Makefile</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/binding.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/binding.c</a></td><td class='right'>173</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/coex.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/coex.c</a></td><td class='right'>714</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/constants.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/constants.h</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/d3.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/d3.c</a></td><td class='right'>3303</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/debugfs-vif.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/debugfs-vif.c</a></td><td class='right'>911</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/debugfs.c</a></td><td class='right'>2200</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/debugfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/debugfs.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/ftm-initiator.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/ftm-initiator.c</a></td><td class='right'>1454</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/ftm-responder.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/ftm-responder.c</a></td><td class='right'>430</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/fw-api.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/fw-api.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/fw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/fw.c</a></td><td class='right'>1637</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/led.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/led.c</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/link.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/link.c</a></td><td class='right'>319</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/mac-ctxt.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/mac-ctxt.c</a></td><td class='right'>1916</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c</a></td><td class='right'>6489</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/mld-key.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/mld-key.c</a></td><td class='right'>408</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/mld-mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/mld-mac.c</a></td><td class='right'>335</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/mld-mac80211.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/mld-mac80211.c</a></td><td class='right'>1283</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/mld-sta.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/mld-sta.c</a></td><td class='right'>1226</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/mvm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/mvm.h</a></td><td class='right'>2902</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/nvm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/nvm.c</a></td><td class='right'>642</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/offloading.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/offloading.c</a></td><td class='right'>214</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/ops.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/ops.c</a></td><td class='right'>2143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/phy-ctxt.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/phy-ctxt.c</a></td><td class='right'>395</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/power.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/power.c</a></td><td class='right'>991</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/ptp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/ptp.c</a></td><td class='right'>326</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/quota.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/quota.c</a></td><td class='right'>258</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/rfi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/rfi.c</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/rs-fw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/rs-fw.c</a></td><td class='right'>735</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/rs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/rs.c</a></td><td class='right'>4180</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/rs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/rs.h</a></td><td class='right'>455</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/rx.c</a></td><td class='right'>1240</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c</a></td><td class='right'>2631</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/scan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/scan.c</a></td><td class='right'>3647</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/sf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/sf.c</a></td><td class='right'>288</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/sta.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/sta.c</a></td><td class='right'>4318</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/sta.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/sta.h</a></td><td class='right'>662</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/tdls.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/tdls.c</a></td><td class='right'>664</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/testmode.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/testmode.h</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/tests/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/tests/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/tests/hcmd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/tests/hcmd.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/tests/module.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/tests/module.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/time-event.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/time-event.c</a></td><td class='right'>1502</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/time-event.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/time-event.h</a></td><td class='right'>229</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/time-sync.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/time-sync.c</a></td><td class='right'>173</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/time-sync.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/time-sync.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/tt.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/tt.c</a></td><td class='right'>864</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/tx.c</a></td><td class='right'>2312</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/utils.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/utils.c</a></td><td class='right'>1409</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/mvm/vendor-cmd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/mvm/vendor-cmd.c</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/ctxt-info-v2.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/pcie/ctxt-info-v2.c</a></td><td class='right'>618</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/ctxt-info.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/pcie/ctxt-info.c</a></td><td class='right'>264</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/drv.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/pcie/drv.c</a></td><td class='right'>1345</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/internal.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/internal.h</a></td><td class='right'>1172</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/rx.c</a></td><td class='right'>2488</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/trans-gen2.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/trans-gen2.c</a></td><td class='right'>654</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/trans.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/trans.c</a></td><td class='right'>4367</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/tx-gen2.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/tx-gen2.c</a></td><td class='right'>1434</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/tx.c</a></td><td class='right'>2689</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/iwl-context-info-v2.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/pcie/iwl-context-info-v2.h</a></td><td class='right'>344</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/iwl-context-info.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/pcie/iwl-context-info.h</a></td><td class='right'>197</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/utils.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/pcie/utils.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/pcie/utils.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/pcie/utils.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/tests/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/tests/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/tests/devinfo.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/tests/devinfo.c</a></td><td class='right'>316</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/tests/module.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/tests/module.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/tests/nvm_parse.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/tests/nvm_parse.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intel/iwlwifi/tests/utils.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intel/iwlwifi/tests/utils.c</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intersil/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intersil/Kconfig</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intersil/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intersil/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intersil/p54/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intersil/p54/Kconfig</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intersil/p54/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intersil/p54/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intersil/p54/eeprom.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intersil/p54/eeprom.c</a></td><td class='right'>981</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intersil/p54/eeprom.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intersil/p54/eeprom.h</a></td><td class='right'>242</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intersil/p54/fwio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intersil/p54/fwio.c</a></td><td class='right'>761</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intersil/p54/led.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intersil/p54/led.c</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intersil/p54/lmac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intersil/p54/lmac.h</a> (renamed from drivers/net/wireless/p54/lmac.h)</td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intersil/p54/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intersil/p54/main.c</a></td><td class='right'>867</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intersil/p54/p54.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intersil/p54/p54.h</a> (renamed from drivers/net/wireless/p54/p54.h)</td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intersil/p54/p54pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intersil/p54/p54pci.c</a> (renamed from drivers/net/wireless/p54/p54pci.c)</td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intersil/p54/p54pci.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intersil/p54/p54pci.h</a> (renamed from drivers/net/wireless/p54/p54pci.h)</td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intersil/p54/p54spi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intersil/p54/p54spi.c</a> (renamed from drivers/net/wireless/p54/p54spi.c)</td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intersil/p54/p54spi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intersil/p54/p54spi.h</a> (renamed from drivers/net/wireless/p54/p54spi.h)</td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intersil/p54/p54spi_eeprom.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intersil/p54/p54spi_eeprom.h</a> (renamed from drivers/net/wireless/p54/p54spi_eeprom.h)</td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intersil/p54/p54usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intersil/p54/p54usb.c</a> (renamed from drivers/net/wireless/p54/p54usb.c)</td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intersil/p54/p54usb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intersil/p54/p54usb.h</a> (renamed from drivers/net/wireless/p54/p54usb.h)</td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/intersil/p54/txrx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/intersil/p54/txrx.c</a></td><td class='right'>947</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ipw2x00/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ipw2x00/Kconfig</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ipw2x00/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ipw2x00/Makefile</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ipw2x00/ipw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ipw2x00/ipw.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlegacy/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlegacy/Kconfig</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlegacy/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlegacy/Makefile</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlegacy/commands.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlegacy/commands.h</a></td><td class='right'>3370</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.9%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlegacy/common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlegacy/common.c</a></td><td class='right'>5586</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 9.8%;'/><td class='none' style='width: 90.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlegacy/common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlegacy/common.h</a></td><td class='right'>3084</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.4%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlegacy/debug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlegacy/debug.c</a></td><td class='right'>1430</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlegacy/iwl-spectrum.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlegacy/iwl-spectrum.h</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/Kconfig</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/Makefile</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/dvm/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/dvm/Makefile</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/dvm/calib.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/dvm/calib.h</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/dvm/commands.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/dvm/commands.h</a></td><td class='right'>4008</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 7.0%;'/><td class='none' style='width: 93.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/dvm/debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/dvm/debugfs.c</a></td><td class='right'>2445</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.3%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/dvm/dev.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/dvm/dev.h</a></td><td class='right'>948</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/dvm/led.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/dvm/led.c</a></td><td class='right'>223</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/dvm/led.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/dvm/led.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/dvm/mac80211.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/dvm/mac80211.c</a></td><td class='right'>1643</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/dvm/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/dvm/main.c</a></td><td class='right'>2089</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.7%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/dvm/power.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/dvm/power.c</a></td><td class='right'>395</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/dvm/power.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/dvm/power.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/dvm/rs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/dvm/rs.c</a></td><td class='right'>3347</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.9%;'/><td class='none' style='width: 94.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/dvm/rs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/dvm/rs.h</a></td><td class='right'>426</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/dvm/rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/dvm/rx.c</a></td><td class='right'>1132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/dvm/scan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/dvm/scan.c</a></td><td class='right'>1084</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/dvm/sta.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/dvm/sta.c</a></td><td class='right'>1475</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/dvm/tt.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/dvm/tt.c</a></td><td class='right'>685</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/dvm/tt.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/dvm/tt.h</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/dvm/tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/dvm/tx.c</a></td><td class='right'>1418</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-1000.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-1000.c</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-2000.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-2000.c</a></td><td class='right'>216</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-5000.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-5000.c</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-6000.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-6000.c</a></td><td class='right'>389</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-7000.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-7000.c</a></td><td class='right'>353</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-8000.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-8000.c</a></td><td class='right'>225</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-agn-hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-agn-hw.h</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-config.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-config.h</a></td><td class='right'>435</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-csr.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-csr.h</a></td><td class='right'>549</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-debug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-debug.c</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-devtrace-data.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-devtrace-data.h</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-devtrace-io.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-devtrace-io.h</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-devtrace-iwlwifi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-devtrace-iwlwifi.h</a></td><td class='right'>205</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-devtrace-msg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-devtrace-msg.h</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-devtrace-ucode.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-devtrace-ucode.h</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-devtrace.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-devtrace.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-devtrace.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-devtrace.h</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-drv.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-drv.c</a></td><td class='right'>1636</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-drv.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-drv.h</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-eeprom-parse.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-eeprom-parse.c</a></td><td class='right'>947</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-eeprom-parse.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-eeprom-parse.h</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-eeprom-read.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-eeprom-read.c</a></td><td class='right'>464</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-eeprom-read.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-eeprom-read.h</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-fh.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-fh.h</a></td><td class='right'>541</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-fw-error-dump.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-fw-error-dump.h</a></td><td class='right'>287</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-fw-file.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-fw-file.h</a></td><td class='right'>721</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-fw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-fw.h</a></td><td class='right'>254</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-io.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-io.c</a></td><td class='right'>266</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-io.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-io.h</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-modparams.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-modparams.h</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-notif-wait.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-notif-wait.c</a></td><td class='right'>191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-notif-wait.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-notif-wait.h</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-nvm-parse.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-nvm-parse.c</a></td><td class='right'>831</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-nvm-parse.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-nvm-parse.h</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-op-mode.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-op-mode.h</a></td><td class='right'>274</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-phy-db.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-phy-db.c</a></td><td class='right'>471</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-phy-db.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-phy-db.h</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-prph.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-prph.h</a></td><td class='right'>389</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-scd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-scd.h</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-trans.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-trans.c</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/iwl-trans.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/iwl-trans.h</a></td><td class='right'>1031</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/Makefile</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/binding.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/binding.c</a></td><td class='right'>211</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/coex.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/coex.c</a></td><td class='right'>1005</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/coex_legacy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/coex_legacy.c</a></td><td class='right'>1324</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/constants.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/constants.h</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/d3.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/d3.c</a></td><td class='right'>2068</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/debugfs-vif.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/debugfs-vif.c</a></td><td class='right'>706</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/debugfs.c</a></td><td class='right'>1616</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/debugfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/debugfs.h</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/fw-api-coex.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/fw-api-coex.h</a></td><td class='right'>476</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/fw-api-d3.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/fw-api-d3.h</a></td><td class='right'>420</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/fw-api-mac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/fw-api-mac.h</a></td><td class='right'>387</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/fw-api-power.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/fw-api-power.h</a></td><td class='right'>452</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/fw-api-rs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/fw-api-rs.h</a></td><td class='right'>389</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/fw-api-scan.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/fw-api-scan.h</a></td><td class='right'>876</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/fw-api-sta.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/fw-api-sta.h</a></td><td class='right'>414</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/fw-api-stats.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/fw-api-stats.h</a></td><td class='right'>317</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/fw-api-tx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/fw-api-tx.h</a></td><td class='right'>634</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/fw-api.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/fw-api.h</a></td><td class='right'>1800</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/fw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/fw.c</a></td><td class='right'>849</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/led.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/led.c</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/mac-ctxt.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/mac-ctxt.c</a></td><td class='right'>1438</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/mac80211.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/mac80211.c</a></td><td class='right'>4188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 7.3%;'/><td class='none' style='width: 92.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/mvm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/mvm.h</a></td><td class='right'>1504</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/nvm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/nvm.c</a></td><td class='right'>873</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/offloading.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/offloading.c</a></td><td class='right'>217</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/ops.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/ops.c</a></td><td class='right'>1336</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/phy-ctxt.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/phy-ctxt.c</a></td><td class='right'>295</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/power.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/power.c</a></td><td class='right'>1039</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/quota.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/quota.c</a></td><td class='right'>328</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/rs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/rs.c</a></td><td class='right'>3757</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.6%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/rs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/rs.h</a></td><td class='right'>382</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/rx.c</a></td><td class='right'>632</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/scan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/scan.c</a></td><td class='right'>1585</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.8%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/sf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/sf.c</a></td><td class='right'>340</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/sta.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/sta.c</a></td><td class='right'>1769</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/sta.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/sta.h</a></td><td class='right'>427</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/tdls.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/tdls.c</a></td><td class='right'>737</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/testmode.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/testmode.h</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/time-event.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/time-event.c</a></td><td class='right'>876</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/time-event.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/time-event.h</a></td><td class='right'>250</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/tt.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/tt.c</a></td><td class='right'>446</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/tx.c</a></td><td class='right'>1102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/mvm/utils.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/mvm/utils.c</a></td><td class='right'>991</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/pcie/drv.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/pcie/drv.c</a></td><td class='right'>683</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/pcie/internal.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/pcie/internal.h</a></td><td class='right'>523</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/pcie/rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/pcie/rx.c</a></td><td class='right'>1236</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/pcie/trans.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/pcie/trans.c</a></td><td class='right'>2643</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.6%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/iwlwifi/pcie/tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/iwlwifi/pcie/tx.c</a></td><td class='right'>1915</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/libertas/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/libertas/Kconfig</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/libertas/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/libertas/Makefile</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/libertas/cfg.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/libertas/cfg.c</a></td><td class='right'>2215</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.9%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/libertas/cfg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/libertas/cfg.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/libertas/cmd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/libertas/cmd.c</a></td><td class='right'>1725</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/libertas/cmd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/libertas/cmd.h</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/libertas/debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/libertas/debugfs.c</a></td><td class='right'>989</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/libertas/debugfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/libertas/debugfs.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/libertas/decl.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/libertas/decl.h</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/libertas/defs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/libertas/defs.h</a></td><td class='right'>394</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/libertas/dev.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/libertas/dev.h</a></td><td class='right'>211</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/libertas/ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/libertas/ethtool.c</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/libertas/firmware.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/libertas/firmware.c</a></td><td class='right'>227</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/libertas/if_cs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/libertas/if_cs.c</a></td><td class='right'>1006</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/libertas/if_usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/libertas/if_usb.c</a></td><td class='right'>1018</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/libertas/if_usb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/libertas/if_usb.h</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/libertas/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/libertas/main.c</a></td><td class='right'>1225</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/libertas/rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/libertas/rx.c</a></td><td class='right'>286</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/libertas/tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/libertas/tx.c</a></td><td class='right'>207</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/libertas/types.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/libertas/types.h</a></td><td class='right'>268</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/libertas_tf/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/libertas_tf/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/libertas_tf/cmd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/libertas_tf/cmd.c</a></td><td class='right'>807</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/libertas_tf/if_usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/libertas_tf/if_usb.c</a></td><td class='right'>928</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/libertas_tf/if_usb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/libertas_tf/if_usb.h</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/libertas_tf/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/libertas_tf/main.c</a></td><td class='right'>766</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mac80211_hwsim.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mac80211_hwsim.c</a></td><td class='right'>3304</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.8%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mac80211_hwsim.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mac80211_hwsim.h</a></td><td class='right'>173</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/Kconfig</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/libertas/Kconfig</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/LICENSE?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/libertas/LICENSE</a> (renamed from drivers/net/wireless/libertas/LICENSE)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/libertas/Makefile</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/README?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/libertas/README</a> (renamed from drivers/net/wireless/libertas/README)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/cfg.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/libertas/cfg.c</a></td><td class='right'>2220</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/cfg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/libertas/cfg.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/cmd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/libertas/cmd.c</a></td><td class='right'>1471</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/cmd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/libertas/cmd.h</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/cmdresp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/libertas/cmdresp.c</a> (renamed from drivers/net/wireless/libertas/cmdresp.c)</td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/libertas/debugfs.c</a></td><td class='right'>931</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/debugfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/libertas/debugfs.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/decl.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/libertas/decl.h</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/defs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/libertas/defs.h</a></td><td class='right'>385</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/dev.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/libertas/dev.h</a></td><td class='right'>208</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/libertas/ethtool.c</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/firmware.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/libertas/firmware.c</a></td><td class='right'>228</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/host.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/libertas/host.h</a> (renamed from drivers/net/wireless/libertas/host.h)</td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/if_sdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/libertas/if_sdio.c</a> (renamed from drivers/net/wireless/libertas/if_sdio.c)</td><td class='right'>207</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/if_sdio.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/libertas/if_sdio.h</a> (renamed from drivers/net/wireless/libertas/if_sdio.h)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/if_spi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/libertas/if_spi.c</a> (renamed from drivers/net/wireless/libertas/if_spi.c)</td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/if_spi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/libertas/if_spi.h</a> (renamed from drivers/net/wireless/libertas/if_spi.h)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/if_usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/libertas/if_usb.c</a></td><td class='right'>999</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/if_usb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/libertas/if_usb.h</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/libertas/main.c</a></td><td class='right'>1073</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/mesh.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/libertas/mesh.c</a> (renamed from drivers/net/wireless/libertas/mesh.c)</td><td class='right'>342</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/mesh.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/libertas/mesh.h</a> (renamed from drivers/net/wireless/libertas/mesh.h)</td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/radiotap.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/libertas/radiotap.h</a> (renamed from drivers/net/wireless/libertas/radiotap.h)</td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/libertas/rx.c</a></td><td class='right'>271</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/libertas/tx.c</a></td><td class='right'>206</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas/types.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/libertas/types.h</a></td><td class='right'>270</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas_tf/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/libertas_tf/Kconfig</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas_tf/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/libertas_tf/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas_tf/cmd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/libertas_tf/cmd.c</a></td><td class='right'>802</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas_tf/deb_defs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/libertas_tf/deb_defs.h</a> (renamed from drivers/net/wireless/libertas_tf/deb_defs.h)</td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas_tf/if_usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/libertas_tf/if_usb.c</a></td><td class='right'>922</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas_tf/if_usb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/libertas_tf/if_usb.h</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas_tf/libertas_tf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/libertas_tf/libertas_tf.h</a> (renamed from drivers/net/wireless/libertas_tf/libertas_tf.h)</td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/libertas_tf/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/libertas_tf/main.c</a></td><td class='right'>732</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/11ac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/11ac.c</a> (renamed from drivers/net/wireless/mwifiex/11ac.c)</td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/11ac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/11ac.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/11h.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/11h.c</a> (renamed from drivers/net/wireless/mwifiex/11h.c)</td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/11n.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/11n.c</a> (renamed from drivers/net/wireless/mwifiex/11n.c)</td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/11n.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/11n.h</a> (renamed from drivers/net/wireless/mwifiex/11n.h)</td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/11n_aggr.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/11n_aggr.c</a></td><td class='right'>294</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/11n_aggr.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/11n_aggr.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/11n_rxreorder.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/11n_rxreorder.c</a> (renamed from drivers/net/wireless/mwifiex/11n_rxreorder.c)</td><td class='right'>303</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/11n_rxreorder.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/11n_rxreorder.h</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/Kconfig</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/Makefile</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/README?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/README</a> (renamed from drivers/net/wireless/mwifiex/README)</td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/cfg80211.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/cfg80211.c</a></td><td class='right'>4923</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/cfg80211.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/cfg80211.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/cfp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/cfp.c</a> (renamed from drivers/net/wireless/mwifiex/cfp.c)</td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/cmdevt.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/cmdevt.c</a> (renamed from drivers/net/wireless/mwifiex/cmdevt.c)</td><td class='right'>615</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/debugfs.c</a></td><td class='right'>1006</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/decl.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/decl.h</a></td><td class='right'>324</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/ethtool.c</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/fw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/fw.h</a></td><td class='right'>2466</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/ie.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/ie.c</a> (renamed from drivers/net/wireless/mwifiex/ie.c)</td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/init.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/init.c</a></td><td class='right'>718</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/ioctl.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/ioctl.h</a> (renamed from drivers/net/wireless/mwifiex/ioctl.h)</td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/join.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/join.c</a> (renamed from drivers/net/wireless/mwifiex/join.c)</td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/main.c</a></td><td class='right'>1877</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/main.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/main.h</a></td><td class='right'>1700</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/pcie.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/pcie.c</a></td><td class='right'>3283</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/pcie.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/pcie.h</a></td><td class='right'>290</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/pcie_quirks.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/pcie_quirks.c</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/pcie_quirks.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/pcie_quirks.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/scan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/scan.c</a></td><td class='right'>2966</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/sdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/sdio.c</a></td><td class='right'>3214</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/sdio.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/sdio.h</a></td><td class='right'>379</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/sta_cmd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/sta_cmd.c</a> (renamed from drivers/net/wireless/mwifiex/sta_cmd.c)</td><td class='right'>797</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/sta_cmdresp.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/sta_cmdresp.c</a> (renamed from drivers/net/wireless/mwifiex/sta_cmdresp.c)</td><td class='right'>385</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/sta_event.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/sta_event.c</a></td><td class='right'>1098</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/sta_ioctl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/sta_ioctl.c</a> (renamed from drivers/net/wireless/mwifiex/sta_ioctl.c)</td><td class='right'>338</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/sta_rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/sta_rx.c</a> (renamed from drivers/net/wireless/mwifiex/sta_rx.c)</td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/sta_tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/sta_tx.c</a></td><td class='right'>222</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/tdls.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/tdls.c</a></td><td class='right'>1561</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/txrx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/txrx.c</a></td><td class='right'>374</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/uap_cmd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/uap_cmd.c</a> (renamed from drivers/net/wireless/mwifiex/uap_cmd.c)</td><td class='right'>369</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/uap_event.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/uap_event.c</a></td><td class='right'>327</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/uap_txrx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/uap_txrx.c</a></td><td class='right'>530</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/usb.c</a></td><td class='right'>1613</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/usb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/usb.h</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/util.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/util.c</a></td><td class='right'>843</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/util.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/util.h</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/wmm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/wmm.c</a> (renamed from drivers/net/wireless/mwifiex/wmm.c)</td><td class='right'>408</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwifiex/wmm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwifiex/wmm.h</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/marvell/mwl8k.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/marvell/mwl8k.c</a> (renamed from drivers/net/wireless/mwl8k.c)</td><td class='right'>562</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/Kconfig</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/Kconfig</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/Makefile</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/agg-rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/agg-rx.c</a></td><td class='right'>303</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/channel.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/channel.c</a></td><td class='right'>416</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/debugfs.c</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/dma.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/dma.c</a></td><td class='right'>1192</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/dma.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/dma.h</a></td><td class='right'>214</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/eeprom.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/eeprom.c</a></td><td class='right'>467</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mac80211.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mac80211.c</a></td><td class='right'>2123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mcu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mcu.c</a></td><td class='right'>161</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mmio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mmio.c</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76.h</a></td><td class='right'>2110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7603/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7603/Kconfig</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7603/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7603/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7603/beacon.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7603/beacon.c</a></td><td class='right'>225</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7603/core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7603/core.c</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7603/debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7603/debugfs.c</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7603/dma.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7603/dma.c</a></td><td class='right'>260</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7603/eeprom.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7603/eeprom.c</a></td><td class='right'>187</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7603/eeprom.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7603/eeprom.h</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7603/init.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7603/init.c</a></td><td class='right'>571</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7603/mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7603/mac.c</a></td><td class='right'>1885</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7603/mac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7603/mac.h</a></td><td class='right'>242</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7603/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7603/main.c</a></td><td class='right'>755</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7603/mcu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7603/mcu.c</a></td><td class='right'>432</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7603/mcu.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7603/mcu.h</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7603/mt7603.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7603/mt7603.h</a></td><td class='right'>262</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7603/pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7603/pci.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7603/regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7603/regs.h</a></td><td class='right'>780</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7603/soc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7603/soc.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7615/Kconfig</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7615/Makefile</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7615/debugfs.c</a></td><td class='right'>609</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/dma.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7615/dma.c</a></td><td class='right'>316</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/eeprom.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7615/eeprom.c</a></td><td class='right'>356</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/eeprom.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7615/eeprom.h</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/init.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7615/init.c</a></td><td class='right'>650</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7615/mac.c</a></td><td class='right'>2360</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/mac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7615/mac.h</a></td><td class='right'>325</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7615/main.c</a></td><td class='right'>1372</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/mcu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7615/mcu.c</a></td><td class='right'>2566</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/mcu.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7615/mcu.h</a></td><td class='right'>243</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/mmio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7615/mmio.c</a></td><td class='right'>275</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/mt7615.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7615/mt7615.h</a></td><td class='right'>557</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/mt7615_trace.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7615/mt7615_trace.h</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7615/pci.c</a></td><td class='right'>206</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/pci_init.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7615/pci_init.c</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/pci_mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7615/pci_mac.c</a></td><td class='right'>295</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7615/regs.h</a></td><td class='right'>621</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/sdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7615/sdio.c</a></td><td class='right'>258</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/sdio_mcu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7615/sdio_mcu.c</a></td><td class='right'>180</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/soc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7615/soc.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/testmode.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7615/testmode.c</a></td><td class='right'>376</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/trace.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7615/trace.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7615/usb.c</a></td><td class='right'>286</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/usb_mcu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7615/usb_mcu.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7615/usb_sdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7615/usb_sdio.c</a></td><td class='right'>353</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76_connac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76_connac.h</a></td><td class='right'>461</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76_connac2_mac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76_connac2_mac.h</a></td><td class='right'>365</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76_connac3_mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76_connac3_mac.c</a></td><td class='right'>268</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76_connac3_mac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76_connac3_mac.h</a></td><td class='right'>400</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c</a></td><td class='right'>1210</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.c</a></td><td class='right'>3266</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.h</a></td><td class='right'>2070</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x0/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x0/Kconfig</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x0/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x0/Makefile</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x0/eeprom.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x0/eeprom.c</a></td><td class='right'>350</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x0/eeprom.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x0/eeprom.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x0/init.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x0/init.c</a></td><td class='right'>266</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x0/initvals.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x0/initvals.h</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x0/initvals_init.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x0/initvals_init.h</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x0/initvals_phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x0/initvals_phy.h</a></td><td class='right'>633</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x0/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x0/main.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x0/mcu.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x0/mcu.h</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x0/mt76x0.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x0/mt76x0.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x0/pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x0/pci.c</a></td><td class='right'>327</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x0/pci_mcu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x0/pci_mcu.c</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x0/phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x0/phy.c</a></td><td class='right'>1215</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x0/phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x0/phy.h</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x0/usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x0/usb.c</a></td><td class='right'>359</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x0/usb_mcu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x0/usb_mcu.c</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x02.h</a></td><td class='right'>284</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_beacon.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x02_beacon.c</a></td><td class='right'>215</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x02_debugfs.c</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_dfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x02_dfs.c</a></td><td class='right'>892</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_dfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x02_dfs.h</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_dma.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x02_dma.h</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_eeprom.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x02_eeprom.c</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_eeprom.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x02_eeprom.h</a></td><td class='right'>185</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x02_mac.c</a></td><td class='right'>1238</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_mac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x02_mac.h</a></td><td class='right'>208</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_mcu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x02_mcu.c</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_mcu.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x02_mcu.h</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c</a></td><td class='right'>565</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x02_phy.c</a></td><td class='right'>204</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x02_phy.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x02_regs.h</a></td><td class='right'>708</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_trace.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x02_trace.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_trace.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x02_trace.h</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_txrx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x02_txrx.c</a></td><td class='right'>183</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_usb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x02_usb.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_usb_core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x02_usb_core.c</a></td><td class='right'>286</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_usb_mcu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x02_usb_mcu.c</a></td><td class='right'>297</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x02_util.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x02_util.c</a></td><td class='right'>699</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x2/Kconfig</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x2/Makefile</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/eeprom.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x2/eeprom.c</a></td><td class='right'>512</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/eeprom.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x2/eeprom.h</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/init.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x2/init.c</a></td><td class='right'>204</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x2/mac.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/mac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x2/mac.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/mcu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x2/mcu.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/mcu.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x2/mcu.h</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/mt76x2.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x2/mt76x2.h</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/mt76x2u.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x2/mt76x2u.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x2/pci.c</a></td><td class='right'>187</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/pci_init.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x2/pci_init.c</a></td><td class='right'>320</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/pci_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x2/pci_main.c</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/pci_mcu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x2/pci_mcu.c</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/pci_phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x2/pci_phy.c</a></td><td class='right'>311</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x2/phy.c</a></td><td class='right'>349</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x2/usb.c</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/usb_init.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x2/usb_init.c</a></td><td class='right'>261</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/usb_mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x2/usb_mac.c</a></td><td class='right'>174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/usb_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x2/usb_main.c</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/usb_mcu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x2/usb_mcu.c</a></td><td class='right'>255</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt76x2/usb_phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt76x2/usb_phy.c</a></td><td class='right'>201</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7915/Kconfig</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7915/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/coredump.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7915/coredump.c</a></td><td class='right'>411</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/coredump.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7915/coredump.h</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7915/debugfs.c</a></td><td class='right'>1487</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/dma.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7915/dma.c</a></td><td class='right'>655</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/eeprom.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7915/eeprom.c</a></td><td class='right'>409</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/eeprom.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7915/eeprom.h</a></td><td class='right'>203</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/init.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7915/init.c</a></td><td class='right'>1304</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7915/mac.c</a></td><td class='right'>2402</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/mac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7915/mac.h</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7915/main.c</a></td><td class='right'>1818</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/mcu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7915/mcu.c</a></td><td class='right'>4126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/mcu.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7915/mcu.h</a></td><td class='right'>524</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/mmio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7915/mmio.c</a></td><td class='right'>1004</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/mt7915.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7915/mt7915.h</a></td><td class='right'>621</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7915/pci.c</a></td><td class='right'>242</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7915/regs.h</a></td><td class='right'>1229</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/soc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7915/soc.c</a></td><td class='right'>1312</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/testmode.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7915/testmode.c</a></td><td class='right'>790</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7915/testmode.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7915/testmode.h</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7921/Kconfig</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7921/Makefile</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7921/debugfs.c</a></td><td class='right'>296</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/init.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7921/init.c</a></td><td class='right'>350</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7921/mac.c</a></td><td class='right'>868</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7921/main.c</a></td><td class='right'>1590</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/mcu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7921/mcu.c</a></td><td class='right'>1492</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/mcu.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7921/mcu.h</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/mt7921.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7921/mt7921.h</a></td><td class='right'>338</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7921/pci.c</a></td><td class='right'>585</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/pci_mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7921/pci_mac.c</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/pci_mcu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7921/pci_mcu.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7921/regs.h</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/sdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7921/sdio.c</a></td><td class='right'>333</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/sdio_mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7921/sdio_mac.c</a></td><td class='right'>199</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/sdio_mcu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7921/sdio_mcu.c</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/testmode.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7921/testmode.c</a></td><td class='right'>196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7921/usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7921/usb.c</a></td><td class='right'>348</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7925/Kconfig</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7925/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7925/debugfs.c</a></td><td class='right'>319</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/init.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7925/init.c</a></td><td class='right'>281</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7925/mac.c</a></td><td class='right'>1497</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/mac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7925/mac.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7925/main.c</a></td><td class='right'>2229</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/mcu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7925/mcu.c</a></td><td class='right'>3903</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/mcu.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7925/mcu.h</a></td><td class='right'>714</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/mt7925.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7925/mt7925.h</a></td><td class='right'>380</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7925/pci.c</a></td><td class='right'>639</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/pci_mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7925/pci_mac.c</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/pci_mcu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7925/pci_mcu.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/regd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7925/regd.c</a></td><td class='right'>265</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/regd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7925/regd.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7925/regs.h</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/testmode.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7925/testmode.c</a></td><td class='right'>201</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7925/usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7925/usb.c</a></td><td class='right'>346</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt792x.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt792x.h</a></td><td class='right'>537</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt792x_acpi_sar.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt792x_acpi_sar.c</a></td><td class='right'>486</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt792x_acpi_sar.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt792x_acpi_sar.h</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt792x_core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt792x_core.c</a></td><td class='right'>986</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt792x_debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt792x_debugfs.c</a></td><td class='right'>168</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt792x_dma.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt792x_dma.c</a></td><td class='right'>372</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt792x_mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt792x_mac.c</a></td><td class='right'>384</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt792x_regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt792x_regs.h</a></td><td class='right'>487</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt792x_trace.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt792x_trace.c</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt792x_trace.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt792x_trace.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt792x_usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt792x_usb.c</a></td><td class='right'>317</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7996/Kconfig</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7996/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/coredump.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7996/coredump.c</a></td><td class='right'>268</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/coredump.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7996/coredump.h</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7996/debugfs.c</a></td><td class='right'>1056</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/dma.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7996/dma.c</a></td><td class='right'>1005</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/eeprom.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7996/eeprom.c</a></td><td class='right'>405</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/eeprom.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7996/eeprom.h</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/init.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7996/init.c</a></td><td class='right'>1745</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7996/mac.c</a></td><td class='right'>3321</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/mac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7996/mac.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7996/main.c</a></td><td class='right'>2340</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/mcu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7996/mcu.c</a></td><td class='right'>4889</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/mcu.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7996/mcu.h</a></td><td class='right'>974</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/mmio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7996/mmio.c</a></td><td class='right'>892</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/mt7996.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7996/mt7996.h</a></td><td class='right'>902</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/npu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7996/npu.c</a></td><td class='right'>352</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7996/pci.c</a></td><td class='right'>269</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/mt7996/regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/mt7996/regs.h</a></td><td class='right'>791</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/npu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/npu.c</a></td><td class='right'>501</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/pci.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/scan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/scan.c</a></td><td class='right'>174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/sdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/sdio.c</a></td><td class='right'>681</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/sdio.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/sdio.h</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/sdio_txrx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/sdio_txrx.c</a></td><td class='right'>390</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/testmode.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/testmode.c</a></td><td class='right'>676</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/testmode.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/testmode.h</a></td><td class='right'>200</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/trace.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/trace.c</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/trace.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/trace.h</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/tx.c</a></td><td class='right'>929</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/usb.c</a></td><td class='right'>1139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/usb_trace.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/usb_trace.c</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/usb_trace.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/usb_trace.h</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/util.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/util.c</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/util.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/util.h</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt76/wed.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt76/wed.c</a></td><td class='right'>209</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt7601u/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt7601u/Kconfig</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt7601u/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt7601u/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt7601u/core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt7601u/core.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt7601u/debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt7601u/debugfs.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt7601u/dma.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt7601u/dma.c</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt7601u/dma.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt7601u/dma.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt7601u/eeprom.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt7601u/eeprom.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt7601u/eeprom.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt7601u/eeprom.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt7601u/init.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt7601u/init.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt7601u/initvals.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt7601u/initvals.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt7601u/initvals_phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt7601u/initvals_phy.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt7601u/mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt7601u/mac.c</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt7601u/mac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt7601u/mac.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt7601u/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt7601u/main.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt7601u/mcu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt7601u/mcu.c</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt7601u/mcu.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt7601u/mcu.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt7601u/mt7601u.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt7601u/mt7601u.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt7601u/phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt7601u/phy.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt7601u/regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt7601u/regs.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt7601u/trace.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt7601u/trace.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt7601u/trace.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt7601u/trace.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt7601u/tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt7601u/tx.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt7601u/usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt7601u/usb.c</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt7601u/usb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt7601u/usb.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt7601u/util.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt7601u/util.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mediatek/mt7601u/util.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mediatek/mt7601u/util.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/microchip/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/microchip/Kconfig</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/microchip/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/microchip/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/microchip/wilc1000/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/microchip/wilc1000/Kconfig</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/microchip/wilc1000/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/microchip/wilc1000/Makefile</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/microchip/wilc1000/cfg80211.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/microchip/wilc1000/cfg80211.c</a></td><td class='right'>1892</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/microchip/wilc1000/cfg80211.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/microchip/wilc1000/cfg80211.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/microchip/wilc1000/fw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/microchip/wilc1000/fw.h</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/microchip/wilc1000/hif.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/microchip/wilc1000/hif.c</a></td><td class='right'>2021</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/microchip/wilc1000/hif.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/microchip/wilc1000/hif.h</a></td><td class='right'>220</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/microchip/wilc1000/mon.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/microchip/wilc1000/mon.c</a></td><td class='right'>258</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/microchip/wilc1000/netdev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/microchip/wilc1000/netdev.c</a></td><td class='right'>1025</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/microchip/wilc1000/netdev.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/microchip/wilc1000/netdev.h</a></td><td class='right'>305</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/microchip/wilc1000/sdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/microchip/wilc1000/sdio.c</a></td><td class='right'>1076</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/microchip/wilc1000/spi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/microchip/wilc1000/spi.c</a></td><td class='right'>1374</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/microchip/wilc1000/wlan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/microchip/wilc1000/wlan.c</a></td><td class='right'>1810</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/microchip/wilc1000/wlan.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/microchip/wilc1000/wlan.h</a></td><td class='right'>475</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/microchip/wilc1000/wlan_cfg.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/microchip/wilc1000/wlan_cfg.c</a></td><td class='right'>433</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/microchip/wilc1000/wlan_cfg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/microchip/wilc1000/wlan_cfg.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/microchip/wilc1000/wlan_if.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/microchip/wilc1000/wlan_if.h</a></td><td class='right'>814</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mwifiex/11ac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mwifiex/11ac.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mwifiex/11n_aggr.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mwifiex/11n_aggr.c</a></td><td class='right'>324</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mwifiex/11n_aggr.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mwifiex/11n_aggr.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mwifiex/11n_rxreorder.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mwifiex/11n_rxreorder.h</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mwifiex/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mwifiex/Kconfig</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mwifiex/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mwifiex/Makefile</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mwifiex/cfg80211.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mwifiex/cfg80211.c</a></td><td class='right'>3761</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.6%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mwifiex/cfg80211.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mwifiex/cfg80211.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mwifiex/debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mwifiex/debugfs.c</a></td><td class='right'>953</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mwifiex/decl.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mwifiex/decl.h</a></td><td class='right'>270</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mwifiex/ethtool.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mwifiex/ethtool.c</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mwifiex/fw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mwifiex/fw.h</a></td><td class='right'>2052</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mwifiex/init.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mwifiex/init.c</a></td><td class='right'>785</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mwifiex/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mwifiex/main.c</a></td><td class='right'>1428</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mwifiex/main.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mwifiex/main.h</a></td><td class='right'>1532</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mwifiex/pcie.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mwifiex/pcie.c</a></td><td class='right'>2733</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.8%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mwifiex/pcie.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mwifiex/pcie.h</a></td><td class='right'>339</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mwifiex/scan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mwifiex/scan.c</a></td><td class='right'>2500</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.4%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mwifiex/sdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mwifiex/sdio.c</a></td><td class='right'>2512</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.4%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mwifiex/sdio.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mwifiex/sdio.h</a></td><td class='right'>595</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mwifiex/sta_event.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mwifiex/sta_event.c</a></td><td class='right'>603</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mwifiex/sta_tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mwifiex/sta_tx.c</a></td><td class='right'>241</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mwifiex/tdls.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mwifiex/tdls.c</a></td><td class='right'>1418</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mwifiex/txrx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mwifiex/txrx.c</a></td><td class='right'>379</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mwifiex/uap_event.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mwifiex/uap_event.c</a></td><td class='right'>323</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mwifiex/uap_txrx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mwifiex/uap_txrx.c</a></td><td class='right'>433</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mwifiex/usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mwifiex/usb.c</a></td><td class='right'>1121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mwifiex/usb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mwifiex/usb.h</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mwifiex/util.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mwifiex/util.c</a></td><td class='right'>692</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mwifiex/util.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mwifiex/util.h</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/mwifiex/wmm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/mwifiex/wmm.h</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/orinoco/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/orinoco/Kconfig</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/orinoco/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/orinoco/Makefile</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/orinoco/airport.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/orinoco/airport.c</a></td><td class='right'>267</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/orinoco/cfg.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/orinoco/cfg.c</a></td><td class='right'>291</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/orinoco/cfg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/orinoco/cfg.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/orinoco/fw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/orinoco/fw.c</a></td><td class='right'>387</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/orinoco/fw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/orinoco/fw.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/orinoco/hermes.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/orinoco/hermes.c</a></td><td class='right'>777</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/orinoco/hermes.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/orinoco/hermes.h</a></td><td class='right'>520</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/orinoco/hermes_dld.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/orinoco/hermes_dld.c</a></td><td class='right'>477</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/orinoco/hermes_dld.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/orinoco/hermes_dld.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/orinoco/hermes_rid.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/orinoco/hermes_rid.h</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/orinoco/hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/orinoco/hw.c</a></td><td class='right'>1356</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/orinoco/hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/orinoco/hw.h</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/orinoco/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/orinoco/main.c</a></td><td class='right'>2431</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.3%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/orinoco/main.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/orinoco/main.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/orinoco/mic.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/orinoco/mic.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/orinoco/mic.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/orinoco/mic.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/orinoco/orinoco.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/orinoco/orinoco.h</a></td><td class='right'>253</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/orinoco/orinoco_cs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/orinoco/orinoco_cs.c</a></td><td class='right'>340</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/orinoco/orinoco_nortel.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/orinoco/orinoco_nortel.c</a></td><td class='right'>320</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/orinoco/orinoco_pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/orinoco/orinoco_pci.c</a></td><td class='right'>263</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/orinoco/orinoco_pci.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/orinoco/orinoco_pci.h</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/orinoco/orinoco_plx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/orinoco/orinoco_plx.c</a></td><td class='right'>368</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/orinoco/orinoco_tmd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/orinoco/orinoco_tmd.c</a></td><td class='right'>246</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/orinoco/orinoco_usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/orinoco/orinoco_usb.c</a></td><td class='right'>1745</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/orinoco/scan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/orinoco/scan.c</a></td><td class='right'>251</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/orinoco/scan.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/orinoco/scan.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/orinoco/spectrum_cs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/orinoco/spectrum_cs.c</a></td><td class='right'>320</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/orinoco/wext.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/orinoco/wext.c</a></td><td class='right'>1413</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/orinoco/wext.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/orinoco/wext.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/p54/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/p54/Kconfig</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/p54/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/p54/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/p54/eeprom.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/p54/eeprom.c</a></td><td class='right'>982</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/p54/eeprom.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/p54/eeprom.h</a></td><td class='right'>245</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/p54/fwio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/p54/fwio.c</a></td><td class='right'>764</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/p54/led.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/p54/led.c</a></td><td class='right'>161</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/p54/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/p54/main.c</a></td><td class='right'>867</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/p54/txrx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/p54/txrx.c</a></td><td class='right'>940</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/prism54/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/prism54/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/prism54/isl_38xx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/prism54/isl_38xx.c</a></td><td class='right'>255</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/prism54/isl_38xx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/prism54/isl_38xx.h</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/prism54/isl_ioctl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/prism54/isl_ioctl.c</a></td><td class='right'>2910</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.1%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/prism54/isl_ioctl.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/prism54/isl_ioctl.h</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/prism54/isl_oid.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/prism54/isl_oid.h</a></td><td class='right'>504</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/prism54/islpci_dev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/prism54/islpci_dev.c</a></td><td class='right'>963</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/prism54/islpci_dev.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/prism54/islpci_dev.h</a></td><td class='right'>216</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/prism54/islpci_eth.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/prism54/islpci_eth.c</a></td><td class='right'>506</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/prism54/islpci_eth.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/prism54/islpci_eth.h</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/prism54/islpci_hotplug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/prism54/islpci_hotplug.c</a></td><td class='right'>339</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/prism54/islpci_mgt.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/prism54/islpci_mgt.c</a></td><td class='right'>502</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/prism54/islpci_mgt.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/prism54/islpci_mgt.h</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/prism54/oid_mgt.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/prism54/oid_mgt.c</a></td><td class='right'>901</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/prism54/oid_mgt.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/prism54/oid_mgt.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/prism54/prismcompat.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/prism54/prismcompat.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/purelifi/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/purelifi/Kconfig</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/purelifi/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/purelifi/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/purelifi/plfxlc/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/purelifi/plfxlc/Kconfig</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/purelifi/plfxlc/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/purelifi/plfxlc/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/purelifi/plfxlc/chip.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/purelifi/plfxlc/chip.c</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/purelifi/plfxlc/chip.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/purelifi/plfxlc/chip.h</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/purelifi/plfxlc/firmware.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/purelifi/plfxlc/firmware.c</a></td><td class='right'>276</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/purelifi/plfxlc/intf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/purelifi/plfxlc/intf.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/purelifi/plfxlc/mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/purelifi/plfxlc/mac.c</a></td><td class='right'>759</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/purelifi/plfxlc/mac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/purelifi/plfxlc/mac.h</a></td><td class='right'>184</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/purelifi/plfxlc/usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/purelifi/plfxlc/usb.c</a></td><td class='right'>896</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/purelifi/plfxlc/usb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/purelifi/plfxlc/usb.h</a></td><td class='right'>198</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/quantenna/Kconfig</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/quantenna/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/qtnfmac/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/quantenna/qtnfmac/Kconfig</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/qtnfmac/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/quantenna/qtnfmac/Makefile</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/qtnfmac/bus.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/quantenna/qtnfmac/bus.h</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/qtnfmac/cfg80211.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/quantenna/qtnfmac/cfg80211.c</a></td><td class='right'>1291</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/qtnfmac/cfg80211.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/quantenna/qtnfmac/cfg80211.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/qtnfmac/commands.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/quantenna/qtnfmac/commands.c</a></td><td class='right'>2770</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/qtnfmac/commands.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/quantenna/qtnfmac/commands.h</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/qtnfmac/core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/quantenna/qtnfmac/core.c</a></td><td class='right'>933</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/qtnfmac/core.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/quantenna/qtnfmac/core.h</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/qtnfmac/debug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/quantenna/qtnfmac/debug.c</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/qtnfmac/debug.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/quantenna/qtnfmac/debug.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/qtnfmac/event.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/quantenna/qtnfmac/event.c</a></td><td class='right'>797</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/qtnfmac/event.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/quantenna/qtnfmac/event.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/qtnfmac/pcie/pcie.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/quantenna/qtnfmac/pcie/pcie.c</a></td><td class='right'>493</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/qtnfmac/pcie/pcie_priv.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/quantenna/qtnfmac/pcie/pcie_priv.h</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/qtnfmac/pcie/pearl_pcie.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/quantenna/qtnfmac/pcie/pearl_pcie.c</a></td><td class='right'>1199</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/qtnfmac/pcie/pearl_pcie_ipc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/quantenna/qtnfmac/pcie/pearl_pcie_ipc.h</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/qtnfmac/pcie/pearl_pcie_regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/quantenna/qtnfmac/pcie/pearl_pcie_regs.h</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie.c</a></td><td class='right'>1236</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie_ipc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie_ipc.h</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie_regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/quantenna/qtnfmac/pcie/topaz_pcie_regs.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/qtnfmac/qlink.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/quantenna/qtnfmac/qlink.h</a></td><td class='right'>1891</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/qtnfmac/qlink_util.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/quantenna/qtnfmac/qlink_util.c</a></td><td class='right'>303</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/qtnfmac/qlink_util.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/quantenna/qtnfmac/qlink_util.h</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/qtnfmac/qtn_hw_ids.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/quantenna/qtnfmac/qtn_hw_ids.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/qtnfmac/shm_ipc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/quantenna/qtnfmac/shm_ipc.c</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/qtnfmac/shm_ipc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/quantenna/qtnfmac/shm_ipc.h</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/qtnfmac/shm_ipc_defs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/quantenna/qtnfmac/shm_ipc_defs.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/qtnfmac/switchdev.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/quantenna/qtnfmac/switchdev.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/qtnfmac/trans.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/quantenna/qtnfmac/trans.c</a></td><td class='right'>213</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/qtnfmac/trans.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/quantenna/qtnfmac/trans.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/qtnfmac/util.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/quantenna/qtnfmac/util.c</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/quantenna/qtnfmac/util.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/quantenna/qtnfmac/util.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/Kconfig</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/Kconfig</a></td><td class='right'>265</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/Makefile</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2400pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt2400pci.c</a> (renamed from drivers/net/wireless/rt2x00/rt2400pci.c)</td><td class='right'>243</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2400pci.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt2400pci.h</a> (renamed from drivers/net/wireless/rt2x00/rt2400pci.h)</td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2500pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt2500pci.c</a> (renamed from drivers/net/wireless/rt2x00/rt2500pci.c)</td><td class='right'>252</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2500pci.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt2500pci.h</a> (renamed from drivers/net/wireless/rt2x00/rt2500pci.h)</td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2500usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt2500usb.c</a> (renamed from drivers/net/wireless/rt2x00/rt2500usb.c)</td><td class='right'>227</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2500usb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt2500usb.h</a> (renamed from drivers/net/wireless/rt2x00/rt2500usb.h)</td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2800.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt2800.h</a> (renamed from drivers/net/wireless/rt2x00/rt2800.h)</td><td class='right'>309</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2800lib.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt2800lib.c</a></td><td class='right'>12347</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 21.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 78.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2800lib.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt2800lib.h</a></td><td class='right'>276</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2800mmio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt2800mmio.c</a></td><td class='right'>859</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2800mmio.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt2800mmio.h</a> (renamed from drivers/net/wireless/rt2x00/rt2800mmio.h)</td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2800pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt2800pci.c</a> (renamed from drivers/net/wireless/rt2x00/rt2800pci.c)</td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2800pci.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt2800pci.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2800soc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt2800soc.c</a></td><td class='right'>366</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2800usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt2800usb.c</a> (renamed from drivers/net/wireless/rt2x00/rt2800usb.c)</td><td class='right'>293</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2800usb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt2800usb.h</a> (renamed from drivers/net/wireless/rt2x00/rt2800usb.h)</td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2x00.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt2x00.h</a> (renamed from drivers/net/wireless/rt2x00/rt2x00.h)</td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2x00config.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt2x00config.c</a> (renamed from drivers/net/wireless/rt2x00/rt2x00config.c)</td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2x00crypto.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt2x00crypto.c</a> (renamed from drivers/net/wireless/rt2x00/rt2x00crypto.c)</td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2x00debug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt2x00debug.c</a></td><td class='right'>723</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2x00debug.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt2x00debug.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt2x00dev.c</a> (renamed from drivers/net/wireless/rt2x00/rt2x00dev.c)</td><td class='right'>401</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2x00dump.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt2x00dump.h</a> (renamed from drivers/net/wireless/rt2x00/rt2x00dump.h)</td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2x00firmware.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt2x00firmware.c</a> (renamed from drivers/net/wireless/rt2x00/rt2x00firmware.c)</td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2x00leds.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt2x00leds.c</a> (renamed from drivers/net/wireless/rt2x00/rt2x00leds.c)</td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2x00leds.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt2x00leds.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2x00lib.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt2x00lib.h</a> (renamed from drivers/net/wireless/rt2x00/rt2x00lib.h)</td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2x00link.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt2x00link.c</a></td><td class='right'>428</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2x00mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt2x00mac.c</a> (renamed from drivers/net/wireless/rt2x00/rt2x00mac.c)</td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2x00mmio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt2x00mmio.c</a> (renamed from drivers/net/wireless/rt2x00/rt2x00mmio.c)</td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2x00mmio.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt2x00mmio.h</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2x00pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt2x00pci.c</a></td><td class='right'>197</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2x00pci.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt2x00pci.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2x00queue.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt2x00queue.c</a> (renamed from drivers/net/wireless/rt2x00/rt2x00queue.c)</td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2x00queue.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt2x00queue.h</a> (renamed from drivers/net/wireless/rt2x00/rt2x00queue.h)</td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2x00reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt2x00reg.h</a> (renamed from drivers/net/wireless/rt2x00/rt2x00reg.h)</td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2x00usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt2x00usb.c</a> (renamed from drivers/net/wireless/rt2x00/rt2x00usb.c)</td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt2x00usb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt2x00usb.h</a> (renamed from drivers/net/wireless/rt2x00/rt2x00usb.h)</td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt61pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt61pci.c</a> (renamed from drivers/net/wireless/rt2x00/rt61pci.c)</td><td class='right'>463</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt61pci.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt61pci.h</a> (renamed from drivers/net/wireless/rt2x00/rt61pci.h)</td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt73usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt73usb.c</a> (renamed from drivers/net/wireless/rt2x00/rt73usb.c)</td><td class='right'>255</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ralink/rt2x00/rt73usb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ralink/rt2x00/rt73usb.h</a> (renamed from drivers/net/wireless/rt2x00/rt73usb.h)</td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ray_cs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ray_cs.c</a></td><td class='right'>2850</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.0%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ray_cs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ray_cs.h</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rayctl.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rayctl.h</a></td><td class='right'>733</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/Kconfig</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/Makefile</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl818x/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtl818x/Kconfig</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl818x/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtl818x/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl818x/rtl8180/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtl818x/rtl8180/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl818x/rtl8180/dev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtl818x/rtl8180/dev.c</a></td><td class='right'>1991</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl818x/rtl8180/grf5101.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtl818x/rtl8180/grf5101.c</a> (renamed from drivers/net/wireless/rtl818x/rtl8180/grf5101.c)</td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl818x/rtl8180/grf5101.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtl818x/rtl8180/grf5101.h</a> (renamed from drivers/net/wireless/rtl818x/rtl8180/grf5101.h)</td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl818x/rtl8180/max2820.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtl818x/rtl8180/max2820.c</a> (renamed from drivers/net/wireless/rtl818x/rtl8180/max2820.c)</td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl818x/rtl8180/max2820.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtl818x/rtl8180/max2820.h</a> (renamed from drivers/net/wireless/rtl818x/rtl8180/max2820.h)</td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl818x/rtl8180/rtl8180.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtl818x/rtl8180/rtl8180.h</a> (renamed from drivers/net/wireless/rtl818x/rtl8180/rtl8180.h)</td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl818x/rtl8180/rtl8225.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtl818x/rtl8180/rtl8225.c</a></td><td class='right'>767</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl818x/rtl8180/rtl8225.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtl818x/rtl8180/rtl8225.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl818x/rtl8180/rtl8225se.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtl818x/rtl8180/rtl8225se.c</a> (renamed from drivers/net/wireless/rtl818x/rtl8180/rtl8225se.c)</td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl818x/rtl8180/rtl8225se.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtl818x/rtl8180/rtl8225se.h</a> (renamed from drivers/net/wireless/rtl818x/rtl8180/rtl8225se.h)</td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl818x/rtl8180/sa2400.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtl818x/rtl8180/sa2400.c</a> (renamed from drivers/net/wireless/rtl818x/rtl8180/sa2400.c)</td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl818x/rtl8180/sa2400.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtl818x/rtl8180/sa2400.h</a> (renamed from drivers/net/wireless/rtl818x/rtl8180/sa2400.h)</td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl818x/rtl8187/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtl818x/rtl8187/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl818x/rtl8187/dev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtl818x/rtl8187/dev.c</a></td><td class='right'>1701</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl818x/rtl8187/leds.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtl818x/rtl8187/leds.c</a></td><td class='right'>242</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl818x/rtl8187/leds.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtl818x/rtl8187/leds.h</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl818x/rtl8187/rfkill.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtl818x/rtl8187/rfkill.c</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl818x/rtl8187/rfkill.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtl818x/rtl8187/rfkill.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl818x/rtl8187/rtl8187.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtl818x/rtl8187/rtl8187.h</a></td><td class='right'>210</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl818x/rtl8187/rtl8225.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtl818x/rtl8187/rtl8225.c</a></td><td class='right'>1044</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl818x/rtl8187/rtl8225.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtl818x/rtl8187/rtl8225.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl818x/rtl818x.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtl818x/rtl818x.h</a> (renamed from drivers/net/wireless/rtl818x/rtl818x.h)</td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl8xxxu/8188e.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtl8xxxu/8188e.c</a></td><td class='right'>1885</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl8xxxu/8188f.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtl8xxxu/8188f.c</a></td><td class='right'>1765</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl8xxxu/8192c.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtl8xxxu/8192c.c</a></td><td class='right'>741</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl8xxxu/8192e.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtl8xxxu/8192e.c</a></td><td class='right'>1767</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl8xxxu/8192f.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtl8xxxu/8192f.c</a></td><td class='right'>2091</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl8xxxu/8710b.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtl8xxxu/8710b.c</a></td><td class='right'>1875</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl8xxxu/8723a.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtl8xxxu/8723a.c</a></td><td class='right'>648</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl8xxxu/8723b.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtl8xxxu/8723b.c</a></td><td class='right'>1767</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl8xxxu/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtl8xxxu/Kconfig</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl8xxxu/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtl8xxxu/Makefile</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl8xxxu/core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtl8xxxu/core.c</a></td><td class='right'>8239</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 85.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl8xxxu/regs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtl8xxxu/regs.h</a></td><td class='right'>1382</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h</a></td><td class='right'>2174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/Kconfig</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/Makefile</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/base.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/base.c</a></td><td class='right'>2732</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/base.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/base.h</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/btcoexist/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/btcoexist/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/btcoexist/halbt_precomp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/btcoexist/halbt_precomp.h</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8192e2ant.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8192e2ant.c</a></td><td class='right'>3196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8192e2ant.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8192e2ant.h</a></td><td class='right'>163</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8723b1ant.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8723b1ant.c</a></td><td class='right'>3437</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8723b1ant.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8723b1ant.h</a></td><td class='right'>203</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8723b2ant.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8723b2ant.c</a></td><td class='right'>4240</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8723b2ant.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8723b2ant.h</a> (renamed from drivers/net/wireless/rtlwifi/btcoexist/halbtc8723b2ant.h)</td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8821a1ant.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8821a1ant.c</a></td><td class='right'>2967</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8821a1ant.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8821a1ant.h</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8821a2ant.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8821a2ant.c</a></td><td class='right'>4205</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8821a2ant.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8821a2ant.h</a></td><td class='right'>211</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8822bwifionly.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8822bwifionly.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8822bwifionly.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtc8822bwifionly.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.c</a></td><td class='right'>1893</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/btcoexist/halbtcoutsrc.h</a></td><td class='right'>824</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/btcoexist/rtl_btc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/btcoexist/rtl_btc.c</a></td><td class='right'>534</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/btcoexist/rtl_btc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/btcoexist/rtl_btc.h</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/cam.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/cam.c</a></td><td class='right'>321</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/cam.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/cam.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/core.c</a></td><td class='right'>1958</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/core.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/core.h</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/debug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/debug.c</a></td><td class='right'>514</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/debug.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/debug.h</a></td><td class='right'>209</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/efuse.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/efuse.c</a></td><td class='right'>1373</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/efuse.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/efuse.h</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/pci.c</a></td><td class='right'>2363</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/pci.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/pci.h</a></td><td class='right'>282</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/ps.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/ps.c</a></td><td class='right'>983</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/ps.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/ps.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/pwrseqcmd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/pwrseqcmd.h</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rc.c</a></td><td class='right'>318</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rc.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/regd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/regd.c</a></td><td class='right'>434</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/regd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/regd.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8188ee/Makefile</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/def.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8188ee/def.h</a></td><td class='right'>183</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/dm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8188ee/dm.c</a></td><td class='right'>1784</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/dm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8188ee/dm.h</a></td><td class='right'>260</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/fw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8188ee/fw.c</a></td><td class='right'>721</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/fw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8188ee/fw.h</a></td><td class='right'>233</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8188ee/hw.c</a></td><td class='right'>2515</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8188ee/hw.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/led.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8188ee/led.c</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/led.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8188ee/led.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c</a></td><td class='right'>2293</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.h</a></td><td class='right'>211</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/pwrseq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8188ee/pwrseq.c</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/pwrseq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8188ee/pwrseq.h</a></td><td class='right'>289</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8188ee/reg.h</a></td><td class='right'>2249</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/rf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8188ee/rf.c</a></td><td class='right'>486</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/rf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8188ee/rf.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/sw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8188ee/sw.c</a></td><td class='right'>390</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8188ee/table.c</a></td><td class='right'>615</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/table.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8188ee/table.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/trx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8188ee/trx.c</a></td><td class='right'>832</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/trx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8188ee/trx.h</a></td><td class='right'>801</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192c/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192c/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192c/dm_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192c/dm_common.c</a></td><td class='right'>1738</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192c/dm_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192c/dm_common.h</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192c/fw_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192c/fw_common.c</a></td><td class='right'>770</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192c/fw_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192c/fw_common.h</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192c/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192c/main.c</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192c/phy_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192c/phy_common.c</a></td><td class='right'>1615</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192c/phy_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192c/phy_common.h</a></td><td class='right'>227</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ce/Makefile</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/def.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ce/def.h</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/dm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ce/dm.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/dm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ce/dm.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ce/hw.c</a></td><td class='right'>2324</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ce/hw.h</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/led.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ce/led.c</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/led.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ce/led.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ce/phy.c</a></td><td class='right'>517</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ce/phy.h</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h</a></td><td class='right'>2030</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/rf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ce/rf.c</a></td><td class='right'>482</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/rf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ce/rf.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/sw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ce/sw.c</a></td><td class='right'>370</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ce/table.c</a></td><td class='right'>1195</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/table.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ce/table.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/trx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ce/trx.c</a></td><td class='right'>686</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/trx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ce/trx.h</a></td><td class='right'>531</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192cu/Makefile</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/def.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192cu/def.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/dm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192cu/dm.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/dm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192cu/dm.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192cu/hw.c</a></td><td class='right'>2171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192cu/hw.h</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/led.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192cu/led.c</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/led.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192cu/led.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192cu/mac.c</a></td><td class='right'>747</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/mac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192cu/mac.h</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192cu/phy.c</a></td><td class='right'>509</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192cu/phy.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192cu/reg.h</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/rf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192cu/rf.c</a></td><td class='right'>442</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/rf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192cu/rf.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/sw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192cu/sw.c</a></td><td class='right'>385</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192cu/table.c</a></td><td class='right'>1862</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/table.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192cu/table.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/trx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192cu/trx.c</a></td><td class='right'>643</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/trx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192cu/trx.h</a></td><td class='right'>397</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192d/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192d/Makefile</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192d/def.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192d/def.h</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192d/dm_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192d/dm_common.c</a></td><td class='right'>1061</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192d/dm_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192d/dm_common.h</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192d/fw_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192d/fw_common.c</a></td><td class='right'>370</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192d/fw_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192d/fw_common.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192d/hw_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192d/hw_common.c</a></td><td class='right'>1225</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192d/hw_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192d/hw_common.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192d/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192d/main.c</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192d/phy_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192d/phy_common.c</a></td><td class='right'>856</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192d/phy_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192d/phy_common.h</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192d/reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192d/reg.h</a></td><td class='right'>1393</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192d/rf_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192d/rf_common.c</a></td><td class='right'>359</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192d/rf_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192d/rf_common.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192d/trx_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192d/trx_common.c</a></td><td class='right'>516</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192d/trx_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192d/trx_common.h</a></td><td class='right'>405</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/Makefile</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/dm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/dm.c</a></td><td class='right'>184</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/dm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/dm.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/fw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/fw.c</a></td><td class='right'>320</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/fw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/fw.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/hw.c</a></td><td class='right'>1087</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/hw.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/led.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/led.c</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/led.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/led.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/phy.c</a></td><td class='right'>2726</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/phy.h</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/rf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/rf.c</a></td><td class='right'>227</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/rf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/rf.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/sw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/sw.c</a></td><td class='right'>397</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/sw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/sw.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/table.c</a></td><td class='right'>1663</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/table.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/table.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/trx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/trx.c</a></td><td class='right'>314</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192de/trx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192de/trx.h</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192du/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192du/Makefile</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192du/dm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192du/dm.c</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192du/dm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192du/dm.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192du/fw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192du/fw.c</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192du/fw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192du/fw.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192du/hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192du/hw.c</a></td><td class='right'>1212</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192du/hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192du/hw.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192du/led.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192du/led.c</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192du/led.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192du/led.h</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192du/phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192du/phy.c</a></td><td class='right'>3118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192du/phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192du/phy.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192du/rf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192du/rf.c</a></td><td class='right'>240</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192du/rf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192du/rf.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192du/sw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192du/sw.c</a></td><td class='right'>394</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192du/table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192du/table.c</a></td><td class='right'>1675</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192du/table.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192du/table.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192du/trx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192du/trx.c</a></td><td class='right'>372</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192du/trx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192du/trx.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ee/Makefile</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/def.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ee/def.h</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/dm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ee/dm.c</a></td><td class='right'>1086</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/dm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ee/dm.h</a></td><td class='right'>229</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/fw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ee/fw.c</a></td><td class='right'>863</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/fw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ee/fw.h</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ee/hw.c</a></td><td class='right'>2609</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ee/hw.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/led.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ee/led.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/led.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ee/led.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c</a></td><td class='right'>3164</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.h</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/pwrseq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ee/pwrseq.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/pwrseq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ee/pwrseq.h</a></td><td class='right'>318</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ee/reg.h</a></td><td class='right'>2211</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/rf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ee/rf.c</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/rf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ee/rf.h</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/sw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ee/sw.c</a></td><td class='right'>378</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ee/table.c</a></td><td class='right'>858</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/table.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ee/table.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/trx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ee/trx.c</a></td><td class='right'>1045</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/trx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192ee/trx.h</a></td><td class='right'>744</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192se/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192se/Makefile</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192se/def.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192se/def.h</a></td><td class='right'>431</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192se/dm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192se/dm.c</a></td><td class='right'>717</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192se/dm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192se/dm.h</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192se/fw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192se/fw.c</a></td><td class='right'>616</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192se/fw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192se/fw.h</a></td><td class='right'>350</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192se/hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192se/hw.c</a></td><td class='right'>2512</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192se/hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192se/hw.h</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192se/led.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192se/led.c</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192se/led.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192se/led.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192se/phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192se/phy.c</a></td><td class='right'>1610</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192se/phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192se/phy.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192se/reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192se/reg.h</a></td><td class='right'>1143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192se/rf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192se/rf.c</a></td><td class='right'>507</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192se/rf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192se/rf.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192se/sw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192se/sw.c</a></td><td class='right'>418</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192se/table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192se/table.c</a></td><td class='right'>607</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192se/table.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192se/table.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192se/trx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192se/trx.c</a></td><td class='right'>638</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8192se/trx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8192se/trx.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723ae/Makefile</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/btc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723ae/btc.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/def.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723ae/def.h</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/dm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723ae/dm.c</a></td><td class='right'>840</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/dm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723ae/dm.h</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/fw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723ae/fw.c</a></td><td class='right'>581</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/fw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723ae/fw.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/hal_bt_coexist.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723ae/hal_bt_coexist.c</a></td><td class='right'>515</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/hal_bt_coexist.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723ae/hal_bt_coexist.h</a> (renamed from drivers/net/wireless/rtlwifi/rtl8723ae/hal_bt_coexist.h)</td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/hal_btc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723ae/hal_btc.c</a></td><td class='right'>1756</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/hal_btc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723ae/hal_btc.h</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723ae/hw.c</a></td><td class='right'>2393</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723ae/hw.h</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/led.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723ae/led.c</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/led.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723ae/led.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723ae/phy.c</a></td><td class='right'>1665</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723ae/phy.h</a></td><td class='right'>180</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/pwrseq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723ae/pwrseq.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/pwrseq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723ae/pwrseq.h</a></td><td class='right'>318</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723ae/reg.h</a></td><td class='right'>2098</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/rf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723ae/rf.c</a></td><td class='right'>491</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/rf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723ae/rf.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/sw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723ae/sw.c</a></td><td class='right'>386</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723ae/table.c</a></td><td class='right'>704</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/table.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723ae/table.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/trx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723ae/trx.c</a></td><td class='right'>687</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/trx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723ae/trx.h</a></td><td class='right'>534</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723be/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723be/Makefile</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723be/def.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723be/def.h</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723be/dm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723be/dm.c</a></td><td class='right'>1266</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723be/dm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723be/dm.h</a></td><td class='right'>248</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723be/fw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723be/fw.c</a></td><td class='right'>685</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723be/fw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723be/fw.h</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723be/hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723be/hw.c</a></td><td class='right'>2724</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723be/hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723be/hw.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723be/led.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723be/led.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723be/led.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723be/led.h</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.c</a></td><td class='right'>2656</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723be/phy.h</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723be/pwrseq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723be/pwrseq.c</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723be/pwrseq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723be/pwrseq.h</a></td><td class='right'>401</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723be/reg.h</a></td><td class='right'>2273</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723be/rf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723be/rf.c</a></td><td class='right'>489</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723be/rf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723be/rf.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723be/sw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723be/sw.c</a></td><td class='right'>394</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723be/table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723be/table.c</a></td><td class='right'>597</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723be/table.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723be/table.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723be/trx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723be/trx.c</a></td><td class='right'>743</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723be/trx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723be/trx.h</a></td><td class='right'>646</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723com/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723com/Makefile</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723com/dm_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723com/dm_common.c</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723com/dm_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723com/dm_common.h</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723com/fw_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723com/fw_common.c</a></td><td class='right'>217</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723com/fw_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723com/fw_common.h</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723com/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723com/main.c</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723com/phy_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723com/phy_common.c</a></td><td class='right'>411</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8723com/phy_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8723com/phy_common.h</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8821ae/Makefile</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/def.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8821ae/def.h</a></td><td class='right'>269</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/dm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8821ae/dm.c</a></td><td class='right'>2795</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/dm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8821ae/dm.h</a></td><td class='right'>293</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/fw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8821ae/fw.c</a></td><td class='right'>1901</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/fw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8821ae/fw.h</a></td><td class='right'>293</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8821ae/hw.c</a></td><td class='right'>4038</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8821ae/hw.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/led.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8821ae/led.c</a></td><td class='right'>191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/led.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8821ae/led.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.c</a></td><td class='right'>4787</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.h</a></td><td class='right'>236</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/pwrseq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8821ae/pwrseq.c</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/pwrseq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8821ae/pwrseq.h</a></td><td class='right'>716</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8821ae/reg.h</a></td><td class='right'>2444</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/rf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8821ae/rf.c</a></td><td class='right'>440</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/rf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8821ae/rf.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/sw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8821ae/sw.c</a></td><td class='right'>446</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8821ae/table.c</a></td><td class='right'>4033</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/table.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8821ae/table.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/trx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8821ae/trx.c</a></td><td class='right'>990</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/trx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/rtl8821ae/trx.h</a></td><td class='right'>652</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/stats.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/stats.c</a></td><td class='right'>247</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/stats.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/stats.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/usb.c</a></td><td class='right'>1079</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/usb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/usb.h</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtlwifi/wifi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtlwifi/wifi.h</a></td><td class='right'>3038</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/Kconfig</a></td><td class='right'>271</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/Makefile</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/bf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/bf.c</a></td><td class='right'>416</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/bf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/bf.h</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/coex.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/coex.c</a></td><td class='right'>4188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/coex.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/coex.h</a></td><td class='right'>433</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/debug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/debug.c</a></td><td class='right'>1375</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/debug.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/debug.h</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/efuse.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/efuse.c</a></td><td class='right'>187</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/efuse.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/efuse.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/fw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/fw.c</a></td><td class='right'>2468</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/fw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/fw.h</a></td><td class='right'>900</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/hci.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/hci.h</a></td><td class='right'>289</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/led.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/led.c</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/led.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/led.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/mac.c</a></td><td class='right'>1421</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/mac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/mac.h</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/mac80211.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/mac80211.c</a></td><td class='right'>991</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/main.c</a></td><td class='right'>2488</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/main.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/main.h</a></td><td class='right'>2280</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/pci.c</a></td><td class='right'>1887</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/pci.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/pci.h</a></td><td class='right'>280</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/phy.c</a></td><td class='right'>2679</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/phy.h</a></td><td class='right'>202</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/ps.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/ps.c</a></td><td class='right'>343</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/ps.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/ps.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/reg.h</a></td><td class='right'>1004</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/regd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/regd.c</a></td><td class='right'>541</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/regd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/regd.h</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8703b.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8703b.c</a></td><td class='right'>2003</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8703b.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8703b.h</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8703b_tables.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8703b_tables.c</a></td><td class='right'>902</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8703b_tables.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8703b_tables.h</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8723cs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8723cs.c</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8723d.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8723d.c</a></td><td class='right'>2207</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8723d.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8723d.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8723d_table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8723d_table.c</a></td><td class='right'>1196</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8723d_table.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8723d_table.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8723de.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8723de.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8723ds.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8723ds.c</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8723du.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8723du.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8723x.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8723x.c</a></td><td class='right'>788</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8723x.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8723x.h</a></td><td class='right'>524</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8812a.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8812a.c</a></td><td class='right'>1125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8812a.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8812a.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8812a_table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8812a_table.c</a></td><td class='right'>2812</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8812a_table.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8812a_table.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8812au.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8812au.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8814a.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8814a.c</a></td><td class='right'>2270</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8814a.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8814a.h</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8814a_table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8814a_table.c</a></td><td class='right'>23930</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 41.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 58.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8814a_table.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8814a_table.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8814ae.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8814ae.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8814au.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8814au.c</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8821a.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8821a.c</a></td><td class='right'>1226</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8821a.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8821a.h</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8821a_table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8821a_table.c</a></td><td class='right'>2350</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8821a_table.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8821a_table.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8821au.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8821au.c</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8821c.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8821c.c</a></td><td class='right'>2064</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8821c.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8821c.h</a></td><td class='right'>286</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8821c_table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8821c_table.c</a></td><td class='right'>7504</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8821c_table.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8821c_table.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8821ce.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8821ce.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8821cs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8821cs.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8821cu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8821cu.c</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8822b.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8822b.c</a></td><td class='right'>2612</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8822b.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8822b.h</a></td><td class='right'>189</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8822b_table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8822b_table.c</a></td><td class='right'>22204</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 38.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 61.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8822b_table.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8822b_table.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8822be.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8822be.c</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8822bs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8822bs.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8822bu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8822bu.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8822c.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8822c.c</a></td><td class='right'>5445</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8822c.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8822c.h</a></td><td class='right'>429</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8822c_table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8822c_table.c</a></td><td class='right'>46105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 80.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 19.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8822c_table.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8822c_table.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8822ce.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8822ce.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8822cs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8822cs.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw8822cu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw8822cu.c</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw88xxa.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw88xxa.c</a></td><td class='right'>1989</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rtw88xxa.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rtw88xxa.h</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rx.c</a></td><td class='right'>314</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/rx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/rx.h</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/sar.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/sar.c</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/sar.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/sar.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/sdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/sdio.c</a></td><td class='right'>1437</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/sdio.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/sdio.h</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/sec.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/sec.c</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/sec.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/sec.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/tx.c</a></td><td class='right'>752</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/tx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/tx.h</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/usb.c</a></td><td class='right'>1381</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/usb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/usb.h</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/util.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/util.c</a></td><td class='right'>208</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/util.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/util.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/wow.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/wow.c</a></td><td class='right'>913</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw88/wow.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw88/wow.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/Kconfig</a></td><td class='right'>181</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/Makefile</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/acpi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/acpi.c</a></td><td class='right'>1281</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/acpi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/acpi.h</a></td><td class='right'>298</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/cam.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/cam.c</a></td><td class='right'>1142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/cam.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/cam.h</a></td><td class='right'>352</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/chan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/chan.c</a></td><td class='right'>3448</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/chan.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/chan.h</a></td><td class='right'>223</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/coex.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/coex.c</a></td><td class='right'>11906</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 20.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 79.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/coex.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/coex.h</a></td><td class='right'>387</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/core.c</a></td><td class='right'>6648</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/core.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/core.h</a></td><td class='right'>7686</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 13.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 86.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/debug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/debug.c</a></td><td class='right'>4869</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/debug.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/debug.h</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/efuse.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/efuse.c</a></td><td class='right'>506</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/efuse.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/efuse.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/efuse_be.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/efuse_be.c</a></td><td class='right'>514</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/fw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/fw.c</a></td><td class='right'>10212</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 17.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 82.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/fw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/fw.h</a></td><td class='right'>5333</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/mac.c</a></td><td class='right'>7240</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/mac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/mac.h</a></td><td class='right'>1722</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/mac80211.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/mac80211.c</a></td><td class='right'>2006</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/mac_be.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/mac_be.c</a></td><td class='right'>2657</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/pci.c</a></td><td class='right'>4842</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/pci.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/pci.h</a></td><td class='right'>1930</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/pci_be.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/pci_be.c</a></td><td class='right'>708</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/phy.c</a></td><td class='right'>8089</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 85.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/phy.h</a></td><td class='right'>1064</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/phy_be.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/phy_be.c</a></td><td class='right'>1021</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/ps.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/ps.c</a></td><td class='right'>591</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/ps.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/ps.h</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/reg.h</a></td><td class='right'>9522</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 16.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 83.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/regd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/regd.c</a></td><td class='right'>1185</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8851b.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8851b.c</a></td><td class='right'>2721</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8851b.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8851b.h</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c</a></td><td class='right'>3784</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk_table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8851b_rfk_table.c</a></td><td class='right'>499</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk_table.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8851b_rfk_table.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8851b_table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8851b_table.c</a></td><td class='right'>14916</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 26.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 73.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8851b_table.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8851b_table.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8851be.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8851be.c</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8851bu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8851bu.c</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852a.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852a.c</a></td><td class='right'>2406</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852a.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852a.h</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852a_rfk.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852a_rfk.c</a></td><td class='right'>3866</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852a_rfk.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852a_rfk.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852a_rfk_table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852a_rfk_table.c</a></td><td class='right'>1607</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852a_rfk_table.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852a_rfk_table.h</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852a_table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852a_table.c</a></td><td class='right'>51062</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 89.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 10.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852a_table.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852a_table.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852ae.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852ae.c</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852au.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852au.c</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852b.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852b.c</a></td><td class='right'>1033</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852b.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852b.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852b_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852b_common.c</a></td><td class='right'>2106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852b_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852b_common.h</a></td><td class='right'>400</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c</a></td><td class='right'>4212</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk_table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852b_rfk_table.c</a></td><td class='right'>794</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk_table.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852b_rfk_table.h</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852b_table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852b_table.c</a></td><td class='right'>22927</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 40.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 59.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852b_table.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852b_table.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852be.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852be.c</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852bt.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852bt.c</a></td><td class='right'>890</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852bt.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852bt.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852bt_rfk.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852bt_rfk.c</a></td><td class='right'>4279</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852bt_rfk.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852bt_rfk.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852bt_rfk_table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852bt_rfk_table.c</a></td><td class='right'>490</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852bt_rfk_table.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852bt_rfk_table.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852bte.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852bte.c</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852bu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852bu.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852c.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852c.c</a></td><td class='right'>3251</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852c.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852c.h</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c</a></td><td class='right'>4491</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852c_rfk_table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852c_rfk_table.c</a></td><td class='right'>781</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852c_rfk_table.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852c_rfk_table.h</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852c_table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852c_table.c</a></td><td class='right'>57159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 100.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 0.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852c_table.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852c_table.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852ce.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852ce.c</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8852cu.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8852cu.c</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8922a.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8922a.c</a></td><td class='right'>3009</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8922a.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8922a.h</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8922a_rfk.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8922a_rfk.c</a></td><td class='right'>353</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8922a_rfk.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8922a_rfk.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/rtw8922ae.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/rtw8922ae.c</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/sar.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/sar.c</a></td><td class='right'>907</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/sar.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/sar.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/ser.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/ser.c</a></td><td class='right'>846</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/ser.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/ser.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/txrx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/txrx.h</a></td><td class='right'>760</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/usb.c</a></td><td class='right'>1071</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/usb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/usb.h</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/util.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/util.c</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/util.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/util.h</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/wow.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/wow.c</a></td><td class='right'>1820</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/realtek/rtw89/wow.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/realtek/rtw89/wow.h</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rndis_wlan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rndis_wlan.c</a></td><td class='right'>3768</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.6%;'/><td class='none' style='width: 93.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rsi/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rsi/Kconfig</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rsi/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rsi/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rsi/rsi_91x_coex.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rsi/rsi_91x_coex.c</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rsi/rsi_91x_core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rsi/rsi_91x_core.c</a></td><td class='right'>176</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rsi/rsi_91x_debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rsi/rsi_91x_debugfs.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rsi/rsi_91x_hal.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rsi/rsi_91x_hal.c</a></td><td class='right'>1168</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rsi/rsi_91x_mac80211.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rsi/rsi_91x_mac80211.c</a></td><td class='right'>1465</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rsi/rsi_91x_main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rsi/rsi_91x_main.c</a></td><td class='right'>197</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rsi/rsi_91x_mgmt.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rsi/rsi_91x_mgmt.c</a></td><td class='right'>1480</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rsi/rsi_91x_pkt.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rsi/rsi_91x_pkt.c</a></td><td class='right'>213</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rsi/rsi_91x_ps.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rsi/rsi_91x_ps.c</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rsi/rsi_91x_sdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rsi/rsi_91x_sdio.c</a></td><td class='right'>926</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rsi/rsi_91x_sdio_ops.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rsi/rsi_91x_sdio_ops.c</a></td><td class='right'>417</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rsi/rsi_91x_usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rsi/rsi_91x_usb.c</a></td><td class='right'>618</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rsi/rsi_91x_usb_ops.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rsi/rsi_91x_usb_ops.c</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rsi/rsi_boot_params.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rsi/rsi_boot_params.h</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rsi/rsi_coex.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rsi/rsi_coex.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rsi/rsi_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rsi/rsi_common.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rsi/rsi_debugfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rsi/rsi_debugfs.h</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rsi/rsi_hal.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rsi/rsi_hal.h</a></td><td class='right'>230</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rsi/rsi_main.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rsi/rsi_main.h</a></td><td class='right'>250</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rsi/rsi_mgmt.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rsi/rsi_mgmt.h</a></td><td class='right'>491</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rsi/rsi_ps.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rsi/rsi_ps.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rsi/rsi_sdio.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rsi/rsi_sdio.h</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rsi/rsi_usb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rsi/rsi_usb.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rt2x00/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rt2x00/Kconfig</a></td><td class='right'>270</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rt2x00/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rt2x00/Makefile</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rt2x00/rt2800lib.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rt2x00/rt2800lib.c</a></td><td class='right'>8021</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 14.0%;'/><td class='none' style='width: 86.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rt2x00/rt2800lib.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rt2x00/rt2800lib.h</a></td><td class='right'>232</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rt2x00/rt2800mmio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rt2x00/rt2800mmio.c</a></td><td class='right'>871</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rt2x00/rt2800pci.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rt2x00/rt2800pci.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rt2x00/rt2800soc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rt2x00/rt2800soc.c</a></td><td class='right'>260</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rt2x00/rt2x00debug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rt2x00/rt2x00debug.c</a></td><td class='right'>800</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rt2x00/rt2x00debug.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rt2x00/rt2x00debug.h</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rt2x00/rt2x00leds.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rt2x00/rt2x00leds.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rt2x00/rt2x00link.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rt2x00/rt2x00link.c</a></td><td class='right'>498</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rt2x00/rt2x00mmio.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rt2x00/rt2x00mmio.h</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rt2x00/rt2x00pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rt2x00/rt2x00pci.c</a></td><td class='right'>221</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rt2x00/rt2x00pci.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rt2x00/rt2x00pci.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rt2x00/rt2x00soc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rt2x00/rt2x00soc.c</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rt2x00/rt2x00soc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rt2x00/rt2x00soc.h</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtl818x/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtl818x/Kconfig</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtl818x/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtl818x/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtl818x/rtl8180/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtl818x/rtl8180/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtl818x/rtl8180/dev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtl818x/rtl8180/dev.c</a></td><td class='right'>1991</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.5%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtl818x/rtl8180/rtl8225.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtl818x/rtl8180/rtl8225.c</a></td><td class='right'>770</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtl818x/rtl8180/rtl8225.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtl818x/rtl8180/rtl8225.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtl818x/rtl8187/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtl818x/rtl8187/Makefile</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtl818x/rtl8187/dev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtl818x/rtl8187/dev.c</a></td><td class='right'>1684</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtl818x/rtl8187/leds.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtl818x/rtl8187/leds.c</a></td><td class='right'>245</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtl818x/rtl8187/leds.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtl818x/rtl8187/leds.h</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtl818x/rtl8187/rfkill.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtl818x/rtl8187/rfkill.c</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtl818x/rtl8187/rfkill.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtl818x/rtl8187/rfkill.h</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtl818x/rtl8187/rtl8187.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtl818x/rtl8187/rtl8187.h</a></td><td class='right'>288</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtl818x/rtl8187/rtl8225.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtl818x/rtl8187/rtl8225.c</a></td><td class='right'>961</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtl818x/rtl8187/rtl8225.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtl818x/rtl8187/rtl8225.h</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/Kconfig</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/Makefile</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/base.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/base.c</a></td><td class='right'>2176</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.8%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/base.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/base.h</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/btcoexist/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/btcoexist/Makefile</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/btcoexist/halbt_precomp.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/btcoexist/halbt_precomp.h</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/btcoexist/halbtc8192e2ant.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/btcoexist/halbtc8192e2ant.c</a></td><td class='right'>3849</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.7%;'/><td class='none' style='width: 93.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/btcoexist/halbtc8192e2ant.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/btcoexist/halbtc8192e2ant.h</a></td><td class='right'>185</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/btcoexist/halbtc8723b1ant.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/btcoexist/halbtc8723b1ant.c</a></td><td class='right'>3170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.5%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/btcoexist/halbtc8723b1ant.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/btcoexist/halbtc8723b1ant.h</a></td><td class='right'>184</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/btcoexist/halbtc8723b2ant.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/btcoexist/halbtc8723b2ant.c</a></td><td class='right'>3717</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.5%;'/><td class='none' style='width: 93.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/btcoexist/halbtc8821a1ant.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/btcoexist/halbtc8821a1ant.c</a></td><td class='right'>2970</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.2%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/btcoexist/halbtc8821a1ant.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/btcoexist/halbtc8821a1ant.h</a></td><td class='right'>188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/btcoexist/halbtc8821a2ant.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/btcoexist/halbtc8821a2ant.c</a></td><td class='right'>3879</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.8%;'/><td class='none' style='width: 93.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/btcoexist/halbtc8821a2ant.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/btcoexist/halbtc8821a2ant.h</a></td><td class='right'>205</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/btcoexist/halbtcoutsrc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/btcoexist/halbtcoutsrc.c</a></td><td class='right'>987</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/btcoexist/halbtcoutsrc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/btcoexist/halbtcoutsrc.h</a></td><td class='right'>545</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/btcoexist/rtl_btc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/btcoexist/rtl_btc.c</a></td><td class='right'>231</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/btcoexist/rtl_btc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/btcoexist/rtl_btc.h</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/cam.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/cam.c</a></td><td class='right'>347</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/cam.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/cam.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/core.c</a></td><td class='right'>1924</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/core.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/core.h</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/debug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/debug.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/debug.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/debug.h</a></td><td class='right'>241</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/efuse.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/efuse.c</a></td><td class='right'>1245</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/efuse.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/efuse.h</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/pci.c</a></td><td class='right'>2478</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.3%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/pci.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/pci.h</a></td><td class='right'>335</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/ps.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/ps.c</a></td><td class='right'>1004</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/ps.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/ps.h</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/pwrseqcmd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/pwrseqcmd.h</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rc.c</a></td><td class='right'>302</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rc.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/regd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/regd.c</a></td><td class='right'>473</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/regd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/regd.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8188ee/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8188ee/Makefile</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8188ee/def.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8188ee/def.h</a></td><td class='right'>269</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8188ee/dm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8188ee/dm.c</a></td><td class='right'>1805</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.2%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8188ee/dm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8188ee/dm.h</a></td><td class='right'>286</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8188ee/fw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8188ee/fw.c</a></td><td class='right'>815</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8188ee/fw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8188ee/fw.h</a></td><td class='right'>304</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8188ee/hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8188ee/hw.c</a></td><td class='right'>2599</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.5%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8188ee/hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8188ee/hw.h</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8188ee/led.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8188ee/led.c</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8188ee/led.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8188ee/led.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8188ee/phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8188ee/phy.c</a></td><td class='right'>2343</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.1%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8188ee/phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8188ee/phy.h</a></td><td class='right'>233</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8188ee/pwrseq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8188ee/pwrseq.c</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8188ee/pwrseq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8188ee/pwrseq.h</a></td><td class='right'>311</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8188ee/reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8188ee/reg.h</a></td><td class='right'>2271</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8188ee/rf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8188ee/rf.c</a></td><td class='right'>509</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8188ee/rf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8188ee/rf.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8188ee/sw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8188ee/sw.c</a></td><td class='right'>419</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8188ee/sw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8188ee/sw.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8188ee/table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8188ee/table.c</a></td><td class='right'>639</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8188ee/table.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8188ee/table.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8188ee/trx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8188ee/trx.c</a></td><td class='right'>858</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8188ee/trx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8188ee/trx.h</a></td><td class='right'>796</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192c/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192c/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192c/dm_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192c/dm_common.c</a></td><td class='right'>1779</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192c/dm_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192c/dm_common.h</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192c/fw_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192c/fw_common.c</a></td><td class='right'>867</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192c/fw_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192c/fw_common.h</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192c/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192c/main.c</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192c/phy_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192c/phy_common.c</a></td><td class='right'>1659</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192c/phy_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192c/phy_common.h</a></td><td class='right'>254</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ce/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ce/Makefile</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ce/def.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ce/def.h</a></td><td class='right'>197</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ce/dm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ce/dm.c</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ce/dm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ce/dm.h</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ce/hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ce/hw.c</a></td><td class='right'>2426</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.2%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ce/hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ce/hw.h</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ce/led.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ce/led.c</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ce/led.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ce/led.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ce/phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ce/phy.c</a></td><td class='right'>577</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ce/phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ce/phy.h</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ce/reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ce/reg.h</a></td><td class='right'>2057</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ce/rf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ce/rf.c</a></td><td class='right'>509</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ce/rf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ce/rf.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ce/sw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ce/sw.c</a></td><td class='right'>394</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ce/sw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ce/sw.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ce/table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ce/table.c</a></td><td class='right'>1224</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ce/table.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ce/table.h</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ce/trx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ce/trx.c</a></td><td class='right'>768</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ce/trx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ce/trx.h</a></td><td class='right'>732</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192cu/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192cu/Makefile</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192cu/def.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192cu/def.h</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192cu/dm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192cu/dm.c</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192cu/dm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192cu/dm.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192cu/hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192cu/hw.c</a></td><td class='right'>2397</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.2%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192cu/hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192cu/hw.h</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192cu/led.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192cu/led.c</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192cu/led.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192cu/led.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192cu/mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192cu/mac.c</a></td><td class='right'>930</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192cu/mac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192cu/mac.h</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192cu/phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192cu/phy.c</a></td><td class='right'>539</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192cu/phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192cu/phy.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192cu/reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192cu/reg.h</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192cu/rf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192cu/rf.c</a></td><td class='right'>475</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192cu/rf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192cu/rf.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192cu/sw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192cu/sw.c</a></td><td class='right'>411</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192cu/sw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192cu/sw.h</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192cu/table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192cu/table.c</a></td><td class='right'>1888</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192cu/table.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192cu/table.h</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192cu/trx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192cu/trx.c</a></td><td class='right'>686</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192cu/trx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192cu/trx.h</a></td><td class='right'>435</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192de/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192de/Makefile</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192de/def.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192de/def.h</a></td><td class='right'>232</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192de/dm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192de/dm.c</a></td><td class='right'>1316</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192de/dm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192de/dm.h</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192de/fw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192de/fw.c</a></td><td class='right'>763</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192de/fw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192de/fw.h</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192de/hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192de/hw.c</a></td><td class='right'>2307</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192de/hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192de/hw.h</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192de/led.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192de/led.c</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192de/led.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192de/led.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192de/phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192de/phy.c</a></td><td class='right'>3609</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.3%;'/><td class='none' style='width: 93.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192de/phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192de/phy.h</a></td><td class='right'>173</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192de/reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192de/reg.h</a></td><td class='right'>1299</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192de/rf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192de/rf.c</a></td><td class='right'>623</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192de/rf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192de/rf.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192de/sw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192de/sw.c</a></td><td class='right'>419</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192de/sw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192de/sw.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192de/table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192de/table.c</a></td><td class='right'>1690</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192de/table.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192de/table.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192de/trx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192de/trx.c</a></td><td class='right'>871</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192de/trx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192de/trx.h</a></td><td class='right'>748</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ee/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ee/Makefile</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ee/def.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ee/def.h</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ee/dm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ee/dm.c</a></td><td class='right'>1236</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ee/dm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ee/dm.h</a></td><td class='right'>251</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ee/fw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ee/fw.c</a></td><td class='right'>902</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ee/fw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ee/fw.h</a></td><td class='right'>208</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ee/hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ee/hw.c</a></td><td class='right'>2666</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.7%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ee/hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ee/hw.h</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ee/led.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ee/led.c</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ee/led.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ee/led.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ee/phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ee/phy.c</a></td><td class='right'>3219</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.6%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ee/phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ee/phy.h</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ee/pwrseq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ee/pwrseq.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ee/pwrseq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ee/pwrseq.h</a></td><td class='right'>340</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ee/reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ee/reg.h</a></td><td class='right'>2233</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.9%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ee/rf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ee/rf.c</a></td><td class='right'>152</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ee/rf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ee/rf.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ee/sw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ee/sw.c</a></td><td class='right'>398</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ee/sw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ee/sw.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ee/table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ee/table.c</a></td><td class='right'>882</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ee/table.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ee/table.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ee/trx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ee/trx.c</a></td><td class='right'>1129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192ee/trx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192ee/trx.h</a></td><td class='right'>862</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192se/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192se/Makefile</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192se/def.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192se/def.h</a></td><td class='right'>555</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192se/dm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192se/dm.c</a></td><td class='right'>742</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192se/dm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192se/dm.h</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192se/fw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192se/fw.c</a></td><td class='right'>652</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192se/fw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192se/fw.h</a></td><td class='right'>375</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192se/hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192se/hw.c</a></td><td class='right'>2548</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.5%;'/><td class='none' style='width: 95.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192se/hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192se/hw.h</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192se/led.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192se/led.c</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192se/led.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192se/led.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192se/phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192se/phy.c</a></td><td class='right'>1658</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192se/phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192se/phy.h</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192se/reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192se/reg.h</a></td><td class='right'>1168</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192se/rf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192se/rf.c</a></td><td class='right'>535</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192se/rf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192se/rf.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192se/sw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192se/sw.c</a></td><td class='right'>442</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192se/sw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192se/sw.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192se/table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192se/table.c</a></td><td class='right'>634</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192se/table.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192se/table.h</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192se/trx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192se/trx.c</a></td><td class='right'>658</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8192se/trx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8192se/trx.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723ae/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723ae/Makefile</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723ae/btc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723ae/btc.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723ae/def.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723ae/def.h</a></td><td class='right'>238</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723ae/dm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723ae/dm.c</a></td><td class='right'>881</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723ae/dm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723ae/dm.h</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723ae/fw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723ae/fw.c</a></td><td class='right'>603</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723ae/fw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723ae/fw.h</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723ae/hal_bt_coexist.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723ae/hal_bt_coexist.c</a></td><td class='right'>537</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723ae/hal_btc.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723ae/hal_btc.c</a></td><td class='right'>1780</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723ae/hal_btc.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723ae/hal_btc.h</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723ae/hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723ae/hw.c</a></td><td class='right'>2482</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.3%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723ae/hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723ae/hw.h</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723ae/led.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723ae/led.c</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723ae/led.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723ae/led.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723ae/phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723ae/phy.c</a></td><td class='right'>1705</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723ae/phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723ae/phy.h</a></td><td class='right'>202</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723ae/pwrseq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723ae/pwrseq.c</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723ae/pwrseq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723ae/pwrseq.h</a></td><td class='right'>340</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723ae/reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723ae/reg.h</a></td><td class='right'>2120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.7%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723ae/rf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723ae/rf.c</a></td><td class='right'>514</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723ae/rf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723ae/rf.h</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723ae/sw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723ae/sw.c</a></td><td class='right'>405</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723ae/sw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723ae/sw.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723ae/table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723ae/table.c</a></td><td class='right'>732</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723ae/table.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723ae/table.h</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723ae/trx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723ae/trx.c</a></td><td class='right'>717</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723ae/trx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723ae/trx.h</a></td><td class='right'>721</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723be/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723be/Makefile</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723be/def.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723be/def.h</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723be/dm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723be/dm.c</a></td><td class='right'>1298</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723be/dm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723be/dm.h</a></td><td class='right'>267</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723be/fw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723be/fw.c</a></td><td class='right'>640</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723be/fw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723be/fw.h</a></td><td class='right'>152</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723be/hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723be/hw.c</a></td><td class='right'>2734</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.8%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723be/hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723be/hw.h</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723be/led.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723be/led.c</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723be/led.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723be/led.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723be/phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723be/phy.c</a></td><td class='right'>2730</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.8%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723be/phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723be/phy.h</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723be/pwrseq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723be/pwrseq.c</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723be/pwrseq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723be/pwrseq.h</a></td><td class='right'>423</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723be/reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723be/reg.h</a></td><td class='right'>2295</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723be/rf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723be/rf.c</a></td><td class='right'>512</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723be/rf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723be/rf.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723be/sw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723be/sw.c</a></td><td class='right'>410</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723be/sw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723be/sw.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723be/table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723be/table.c</a></td><td class='right'>577</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723be/table.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723be/table.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723be/trx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723be/trx.c</a></td><td class='right'>783</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723be/trx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723be/trx.h</a></td><td class='right'>625</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723com/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723com/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723com/dm_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723com/dm_common.c</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723com/dm_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723com/dm_common.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723com/fw_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723com/fw_common.c</a></td><td class='right'>339</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723com/fw_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723com/fw_common.h</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723com/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723com/main.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723com/phy_common.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723com/phy_common.c</a></td><td class='right'>447</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8723com/phy_common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8723com/phy_common.h</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8821ae/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8821ae/Makefile</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8821ae/def.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8821ae/def.h</a></td><td class='right'>355</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8821ae/dm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8821ae/dm.c</a></td><td class='right'>2988</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.2%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8821ae/dm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8821ae/dm.h</a></td><td class='right'>315</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8821ae/fw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8821ae/fw.c</a></td><td class='right'>1857</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.2%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8821ae/fw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8821ae/fw.h</a></td><td class='right'>351</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8821ae/hw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8821ae/hw.c</a></td><td class='right'>4199</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 7.3%;'/><td class='none' style='width: 92.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8821ae/hw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8821ae/hw.h</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8821ae/led.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8821ae/led.c</a></td><td class='right'>237</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8821ae/led.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8821ae/led.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8821ae/phy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8821ae/phy.c</a></td><td class='right'>4858</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 8.5%;'/><td class='none' style='width: 91.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8821ae/phy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8821ae/phy.h</a></td><td class='right'>259</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8821ae/pwrseq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8821ae/pwrseq.c</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8821ae/pwrseq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8821ae/pwrseq.h</a></td><td class='right'>738</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8821ae/reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8821ae/reg.h</a></td><td class='right'>2464</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.3%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8821ae/rf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8821ae/rf.c</a></td><td class='right'>465</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8821ae/rf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8821ae/rf.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8821ae/sw.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8821ae/sw.c</a></td><td class='right'>458</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8821ae/sw.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8821ae/sw.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8821ae/table.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8821ae/table.c</a></td><td class='right'>4572</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 8.0%;'/><td class='none' style='width: 92.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8821ae/table.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8821ae/table.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8821ae/trx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8821ae/trx.c</a></td><td class='right'>1024</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/rtl8821ae/trx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/rtl8821ae/trx.h</a></td><td class='right'>620</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/stats.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/stats.c</a></td><td class='right'>268</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/stats.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/stats.h</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/usb.c</a></td><td class='right'>1188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/usb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/usb.h</a></td><td class='right'>169</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/rtlwifi/wifi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/rtlwifi/wifi.h</a></td><td class='right'>3017</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.3%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/Kconfig</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/wfx/Kconfig</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/wfx/Makefile</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/bh.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/wfx/bh.c</a></td><td class='right'>324</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/bh.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/wfx/bh.h</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/bus.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/wfx/bus.h</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/bus_sdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/wfx/bus_sdio.c</a></td><td class='right'>326</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/bus_spi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/wfx/bus_spi.c</a></td><td class='right'>321</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/data_rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/wfx/data_rx.c</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/data_rx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/wfx/data_rx.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/data_tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/wfx/data_tx.c</a></td><td class='right'>594</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/data_tx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/wfx/data_tx.h</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/debug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/wfx/debug.c</a></td><td class='right'>331</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/debug.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/wfx/debug.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/fwio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/wfx/fwio.c</a></td><td class='right'>388</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/fwio.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/wfx/fwio.h</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/hif_api_cmd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/wfx/hif_api_cmd.h</a></td><td class='right'>553</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/hif_api_general.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/wfx/hif_api_general.h</a></td><td class='right'>252</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/hif_api_mib.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/wfx/hif_api_mib.h</a></td><td class='right'>346</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/hif_rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/wfx/hif_rx.c</a></td><td class='right'>391</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/hif_rx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/wfx/hif_rx.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/hif_tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/wfx/hif_tx.c</a></td><td class='right'>537</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/hif_tx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/wfx/hif_tx.h</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/hif_tx_mib.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/wfx/hif_tx_mib.c</a></td><td class='right'>307</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/hif_tx_mib.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/wfx/hif_tx_mib.h</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/hwio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/wfx/hwio.c</a></td><td class='right'>332</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/hwio.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/wfx/hwio.h</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/key.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/wfx/key.c</a></td><td class='right'>227</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/key.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/wfx/key.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/wfx/main.c</a></td><td class='right'>525</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/main.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/wfx/main.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/queue.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/wfx/queue.c</a></td><td class='right'>322</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/queue.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/wfx/queue.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/scan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/wfx/scan.c</a></td><td class='right'>209</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/scan.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/wfx/scan.h</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/sta.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/wfx/sta.c</a></td><td class='right'>841</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/sta.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/wfx/sta.h</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/traces.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/wfx/traces.h</a></td><td class='right'>496</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/silabs/wfx/wfx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/silabs/wfx/wfx.h</a></td><td class='right'>169</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/st/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/st/Kconfig</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/st/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/st/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/st/cw1200/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/st/cw1200/Kconfig</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/st/cw1200/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/st/cw1200/Makefile</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/st/cw1200/bh.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/st/cw1200/bh.c</a></td><td class='right'>608</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/st/cw1200/bh.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/st/cw1200/bh.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/st/cw1200/cw1200.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/st/cw1200/cw1200.h</a> (renamed from drivers/net/wireless/cw1200/cw1200.h)</td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/st/cw1200/cw1200_sdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/st/cw1200/cw1200_sdio.c</a> (renamed from drivers/net/wireless/cw1200/cw1200_sdio.c)</td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/st/cw1200/cw1200_spi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/st/cw1200/cw1200_spi.c</a> (renamed from drivers/net/wireless/cw1200/cw1200_spi.c)</td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/st/cw1200/debug.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/st/cw1200/debug.c</a></td><td class='right'>389</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/st/cw1200/debug.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/st/cw1200/debug.h</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/st/cw1200/fwio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/st/cw1200/fwio.c</a></td><td class='right'>523</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/st/cw1200/fwio.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/st/cw1200/fwio.h</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/st/cw1200/hwbus.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/st/cw1200/hwbus.h</a> (renamed from drivers/net/wireless/cw1200/hwbus.h)</td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/st/cw1200/hwio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/st/cw1200/hwio.c</a></td><td class='right'>309</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/st/cw1200/hwio.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/st/cw1200/hwio.h</a></td><td class='right'>244</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/st/cw1200/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/st/cw1200/main.c</a></td><td class='right'>609</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/st/cw1200/pm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/st/cw1200/pm.c</a></td><td class='right'>363</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/st/cw1200/pm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/st/cw1200/pm.h</a> (renamed from drivers/net/wireless/cw1200/pm.h)</td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/st/cw1200/queue.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/st/cw1200/queue.c</a></td><td class='right'>552</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/st/cw1200/queue.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/st/cw1200/queue.h</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/st/cw1200/scan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/st/cw1200/scan.c</a></td><td class='right'>462</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/st/cw1200/scan.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/st/cw1200/scan.h</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/st/cw1200/sta.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/st/cw1200/sta.c</a></td><td class='right'>2390</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/st/cw1200/sta.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/st/cw1200/sta.h</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/st/cw1200/txrx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/st/cw1200/txrx.c</a></td><td class='right'>1465</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/st/cw1200/txrx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/st/cw1200/txrx.h</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/st/cw1200/wsm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/st/cw1200/wsm.c</a> (renamed from drivers/net/wireless/cw1200/wsm.c)</td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/st/cw1200/wsm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/st/cw1200/wsm.h</a> (renamed from drivers/net/wireless/cw1200/wsm.h)</td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/Kconfig</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/Makefile</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wilink_platform_data.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wilink_platform_data.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl1251/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl1251/Kconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl1251/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl1251/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl1251/acx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl1251/acx.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl1251/acx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl1251/acx.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl1251/boot.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl1251/boot.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl1251/boot.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl1251/boot.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl1251/cmd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl1251/cmd.c</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl1251/cmd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl1251/cmd.h</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl1251/debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl1251/debugfs.c</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl1251/debugfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl1251/debugfs.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl1251/event.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl1251/event.c</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl1251/event.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl1251/event.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl1251/init.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl1251/init.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl1251/init.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl1251/init.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl1251/io.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl1251/io.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl1251/io.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl1251/io.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl1251/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl1251/main.c</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl1251/ps.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl1251/ps.c</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl1251/ps.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl1251/ps.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl1251/reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl1251/reg.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl1251/rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl1251/rx.c</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl1251/rx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl1251/rx.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl1251/sdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl1251/sdio.c</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl1251/spi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl1251/spi.c</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl1251/spi.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl1251/spi.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl1251/tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl1251/tx.c</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl1251/tx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl1251/tx.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl1251/wl1251.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl1251/wl1251.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl1251/wl12xx_80211.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl1251/wl12xx_80211.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl12xx/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl12xx/Kconfig</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl12xx/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl12xx/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl12xx/acx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl12xx/acx.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl12xx/acx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl12xx/acx.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl12xx/cmd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl12xx/cmd.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl12xx/cmd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl12xx/cmd.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl12xx/conf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl12xx/conf.h</a></td><td class='right'>249</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl12xx/debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl12xx/debugfs.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl12xx/debugfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl12xx/debugfs.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl12xx/event.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl12xx/event.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl12xx/event.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl12xx/event.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl12xx/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl12xx/main.c</a></td><td class='right'>163</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl12xx/reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl12xx/reg.h</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl12xx/scan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl12xx/scan.c</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl12xx/scan.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl12xx/scan.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl12xx/wl12xx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl12xx/wl12xx.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl18xx/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl18xx/Kconfig</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl18xx/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl18xx/Makefile</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl18xx/acx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl18xx/acx.c</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl18xx/acx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl18xx/acx.h</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl18xx/cmd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl18xx/cmd.c</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl18xx/cmd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl18xx/cmd.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl18xx/conf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl18xx/conf.h</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl18xx/debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl18xx/debugfs.c</a></td><td class='right'>338</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl18xx/debugfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl18xx/debugfs.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl18xx/event.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl18xx/event.c</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl18xx/event.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl18xx/event.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl18xx/io.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl18xx/io.c</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl18xx/io.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl18xx/io.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl18xx/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl18xx/main.c</a></td><td class='right'>355</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl18xx/reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl18xx/reg.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl18xx/scan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl18xx/scan.c</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl18xx/scan.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl18xx/scan.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl18xx/tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl18xx/tx.c</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl18xx/tx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl18xx/tx.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wl18xx/wl18xx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wl18xx/wl18xx.h</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/Kconfig</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/acx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/acx.c</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/acx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/acx.h</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/boot.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/boot.c</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/boot.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/boot.h</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/cmd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/cmd.c</a></td><td class='right'>225</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/cmd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/cmd.h</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/conf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/conf.h</a></td><td class='right'>266</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/debug.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/debug.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/debugfs.c</a></td><td class='right'>184</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/debugfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/debugfs.h</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/event.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/event.c</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/event.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/event.h</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/hw_ops.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/hw_ops.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/ini.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/ini.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/init.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/init.c</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/init.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/init.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/io.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/io.c</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/io.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/io.h</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/main.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/main.c</a></td><td class='right'>1143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/ps.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/ps.c</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/ps.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/ps.h</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/rx.c</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/rx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/rx.h</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/scan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/scan.c</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/scan.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/scan.h</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/sdio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/sdio.c</a></td><td class='right'>215</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/spi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/spi.c</a></td><td class='right'>227</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/sysfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/sysfs.c</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/sysfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/sysfs.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/testmode.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/testmode.c</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/testmode.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/testmode.h</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/tx.c</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/tx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/tx.h</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/vendor_cmd.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/vendor_cmd.c</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/vendor_cmd.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/vendor_cmd.h</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/wl12xx_80211.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/wl12xx_80211.h</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/wlcore.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/wlcore.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/ti/wlcore/wlcore_i.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/ti/wlcore/wlcore_i.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/virtual/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/virtual/Kconfig</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/virtual/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/virtual/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/virtual/mac80211_hwsim.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/virtual/mac80211_hwsim.c</a></td><td class='right'>7235</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/virtual/mac80211_hwsim.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/virtual/mac80211_hwsim.h</a></td><td class='right'>346</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/virtual/virt_wifi.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/virtual/virt_wifi.c</a></td><td class='right'>715</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/wl3501.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/wl3501.h</a></td><td class='right'>615</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/wl3501_cs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/wl3501_cs.c</a></td><td class='right'>2021</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.5%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/zd1201.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/zd1201.c</a></td><td class='right'>1913</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/zd1201.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/zd1201.h</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/zd1211rw/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/zd1211rw/Kconfig</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/zd1211rw/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/zd1211rw/Makefile</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/zd1211rw/zd_def.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/zd1211rw/zd_def.h</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/zydas/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/zydas/Kconfig</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/zydas/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/zydas/Makefile</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/zydas/zd1211rw/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/zydas/zd1211rw/Kconfig</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/zydas/zd1211rw/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/zydas/zd1211rw/Makefile</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/zydas/zd1211rw/zd_chip.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/zydas/zd1211rw/zd_chip.c</a> (renamed from drivers/net/wireless/zd1211rw/zd_chip.c)</td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/zydas/zd1211rw/zd_chip.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/zydas/zd1211rw/zd_chip.h</a> (renamed from drivers/net/wireless/zd1211rw/zd_chip.h)</td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/zydas/zd1211rw/zd_def.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/zydas/zd1211rw/zd_def.h</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/zydas/zd1211rw/zd_mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/zydas/zd1211rw/zd_mac.c</a> (renamed from drivers/net/wireless/zd1211rw/zd_mac.c)</td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/zydas/zd1211rw/zd_mac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/zydas/zd1211rw/zd_mac.h</a> (renamed from drivers/net/wireless/zd1211rw/zd_mac.h)</td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/zydas/zd1211rw/zd_rf.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/zydas/zd1211rw/zd_rf.c</a> (renamed from drivers/net/wireless/zd1211rw/zd_rf.c)</td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/zydas/zd1211rw/zd_rf.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/zydas/zd1211rw/zd_rf.h</a> (renamed from drivers/net/wireless/zd1211rw/zd_rf.h)</td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/zydas/zd1211rw/zd_rf_al2230.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/zydas/zd1211rw/zd_rf_al2230.c</a> (renamed from drivers/net/wireless/zd1211rw/zd_rf_al2230.c)</td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/zydas/zd1211rw/zd_rf_al7230b.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/zydas/zd1211rw/zd_rf_al7230b.c</a> (renamed from drivers/net/wireless/zd1211rw/zd_rf_al7230b.c)</td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/zydas/zd1211rw/zd_rf_rf2959.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/zydas/zd1211rw/zd_rf_rf2959.c</a> (renamed from drivers/net/wireless/zd1211rw/zd_rf_rf2959.c)</td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/zydas/zd1211rw/zd_rf_uw2453.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/zydas/zd1211rw/zd_rf_uw2453.c</a> (renamed from drivers/net/wireless/zd1211rw/zd_rf_uw2453.c)</td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/zydas/zd1211rw/zd_usb.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/zydas/zd1211rw/zd_usb.c</a> (renamed from drivers/net/wireless/zd1211rw/zd_usb.c)</td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/drivers/net/wireless/zydas/zd1211rw/zd_usb.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wireless/zydas/zd1211rw/zd_usb.h</a> (renamed from drivers/net/wireless/zd1211rw/zd_usb.h)</td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/Kconfig?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/Kconfig</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/Makefile</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/Makefile</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_chnl_cfg.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_chnl_cfg.c</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_chnl_cfg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_chnl_cfg.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_coredump.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_coredump.c</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_coredump.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_coredump.h</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_debugfs.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_debugfs.c</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_debugfs.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_debugfs.h</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_devlink.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_devlink.c</a></td><td class='right'>324</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_devlink.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_devlink.h</a></td><td class='right'>205</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_flash.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_flash.c</a></td><td class='right'>594</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_flash.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_flash.h</a></td><td class='right'>229</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_imem.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_imem.c</a></td><td class='right'>1499</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_imem.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_imem.h</a></td><td class='right'>590</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_imem_ops.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_imem_ops.c</a></td><td class='right'>658</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_imem_ops.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_imem_ops.h</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_irq.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_irq.c</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_irq.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_irq.h</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_mmio.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_mmio.c</a></td><td class='right'>227</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_mmio.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_mmio.h</a></td><td class='right'>183</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_mux.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_mux.c</a></td><td class='right'>483</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_mux.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_mux.h</a></td><td class='right'>442</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_mux_codec.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_mux_codec.c</a></td><td class='right'>1553</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_mux_codec.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_mux_codec.h</a></td><td class='right'>325</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_pcie.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_pcie.c</a></td><td class='right'>586</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_pcie.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_pcie.h</a></td><td class='right'>210</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_pm.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_pm.c</a></td><td class='right'>333</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_pm.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_pm.h</a></td><td class='right'>207</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_port.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_port.c</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_port.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_port.h</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_protocol.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_protocol.c</a></td><td class='right'>283</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_protocol.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_protocol.h</a></td><td class='right'>237</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_protocol_ops.c</a></td><td class='right'>541</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_protocol_ops.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_protocol_ops.h</a></td><td class='right'>444</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_task_queue.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_task_queue.c</a></td><td class='right'>202</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_task_queue.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_task_queue.h</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_trace.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_trace.c</a></td><td class='right'>181</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_trace.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_trace.h</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_uevent.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_uevent.c</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_uevent.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_uevent.h</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_wwan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_wwan.c</a></td><td class='right'>316</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/iosm/iosm_ipc_wwan.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/iosm/iosm_ipc_wwan.h</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/mhi_wwan_ctrl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/mhi_wwan_ctrl.c</a></td><td class='right'>285</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/mhi_wwan_mbim.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/mhi_wwan_mbim.c</a></td><td class='right'>670</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/qcom_bam_dmux.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/qcom_bam_dmux.c</a></td><td class='right'>908</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/rpmsg_wwan_ctrl.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/rpmsg_wwan_ctrl.c</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/t7xx/Makefile</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_cldma.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/t7xx/t7xx_cldma.c</a></td><td class='right'>281</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_cldma.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/t7xx/t7xx_cldma.h</a></td><td class='right'>180</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_dpmaif.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/t7xx/t7xx_dpmaif.c</a></td><td class='right'>1281</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_dpmaif.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/t7xx/t7xx_dpmaif.h</a></td><td class='right'>179</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_hif_cldma.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/t7xx/t7xx_hif_cldma.c</a></td><td class='right'>1362</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_hif_cldma.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/t7xx/t7xx_hif_cldma.h</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_hif_dpmaif.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/t7xx/t7xx_hif_dpmaif.c</a></td><td class='right'>583</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_hif_dpmaif.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/t7xx/t7xx_hif_dpmaif.h</a></td><td class='right'>202</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_hif_dpmaif_rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/t7xx/t7xx_hif_dpmaif_rx.c</a></td><td class='right'>1168</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_hif_dpmaif_rx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/t7xx/t7xx_hif_dpmaif_rx.h</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_hif_dpmaif_tx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/t7xx/t7xx_hif_dpmaif_tx.c</a></td><td class='right'>682</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_hif_dpmaif_tx.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/t7xx/t7xx_hif_dpmaif_tx.h</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_mhccif.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/t7xx/t7xx_mhccif.c</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_mhccif.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/t7xx/t7xx_mhccif.h</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_modem_ops.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/t7xx/t7xx_modem_ops.c</a></td><td class='right'>817</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_modem_ops.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/t7xx/t7xx_modem_ops.h</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_netdev.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/t7xx/t7xx_netdev.c</a></td><td class='right'>529</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_netdev.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/t7xx/t7xx_netdev.h</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_pci.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/t7xx/t7xx_pci.c</a></td><td class='right'>961</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_pci.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/t7xx/t7xx_pci.h</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_pcie_mac.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/t7xx/t7xx_pcie_mac.c</a></td><td class='right'>262</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_pcie_mac.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/t7xx/t7xx_pcie_mac.h</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_port.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/t7xx/t7xx_port.h</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_port_ctrl_msg.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/t7xx/t7xx_port_ctrl_msg.c</a></td><td class='right'>277</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_port_proxy.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/t7xx/t7xx_port_proxy.c</a></td><td class='right'>655</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_port_proxy.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/t7xx/t7xx_port_proxy.h</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_port_trace.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/t7xx/t7xx_port_trace.c</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_port_wwan.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/t7xx/t7xx_port_wwan.c</a></td><td class='right'>247</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_reg.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/t7xx/t7xx_reg.h</a></td><td class='right'>372</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_state_monitor.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/t7xx/t7xx_state_monitor.c</a></td><td class='right'>648</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/t7xx/t7xx_state_monitor.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/t7xx/t7xx_state_monitor.h</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/wwan_core.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/wwan_core.c</a></td><td class='right'>1271</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/wwan/wwan_hwsim.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/wwan/wwan_hwsim.c</a></td><td class='right'>559</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/xen-netback/Makefile?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/xen-netback/Makefile</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/xen-netback/common.h?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/xen-netback/common.h</a></td><td class='right'>205</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/xen-netback/hash.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/xen-netback/hash.c</a></td><td class='right'>467</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/xen-netback/interface.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/xen-netback/interface.c</a></td><td class='right'>434</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/xen-netback/netback.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/xen-netback/netback.c</a></td><td class='right'>1426</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/drivers/net/xen-netback/rx.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/xen-netback/rx.c</a></td><td class='right'>680</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/xen-netback/xenbus.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/xen-netback/xenbus.c</a></td><td class='right'>744</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/drivers/net/xen-netfront.c?id2=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/xen-netfront.c</a></td><td class='right'>1377</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
</table><div class='diffstat-summary'>7629 files changed, 3669695 insertions, 939386 deletions</div><table summary='diff' class='diff'><tr><td><div class='head'>diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig<br/>index c18f9e62a9fa..ac12eaf11755 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/Kconfig?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/Kconfig</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> #</div><div class='ctx'> # Network device configuration</div><div class='ctx'> #</div><div class='hunk'>@@ -6,7 +7,7 @@ menuconfig NETDEVICES</div><div class='ctx'> 	default y if UML</div><div class='ctx'> 	depends on NET</div><div class='ctx'> 	bool "Network device support"</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  You can say N here if you don't intend to connect your Linux box to</div><div class='ctx'> 	  any other computer at all.</div><div class='ctx'> </div><div class='hunk'>@@ -31,7 +32,7 @@ config MII</div><div class='ctx'> config NET_CORE</div><div class='ctx'> 	default y</div><div class='ctx'> 	bool "Network core driver support"</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  You can say N here if you do not intend to use any of the</div><div class='ctx'> 	  networking core drivers (i.e. VLAN, bridging, bonding, etc.)</div><div class='ctx'> </div><div class='hunk'>@@ -41,7 +42,8 @@ config BONDING</div><div class='ctx'> 	tristate "Bonding driver support"</div><div class='ctx'> 	depends on INET</div><div class='ctx'> 	depends on IPV6 || IPV6=n</div><div class='del'>-	---help---</div><div class='add'>+	depends on TLS || TLS_DEVICE=n</div><div class='add'>+	help</div><div class='ctx'> 	  Say 'Y' or 'M' if you wish to be able to 'bond' multiple Ethernet</div><div class='ctx'> 	  Channels together. This is called 'Etherchannel' by Cisco,</div><div class='ctx'> 	  'Trunking' by Sun, 802.3ad by the IEEE, and 'Bonding' in Linux.</div><div class='hunk'>@@ -49,7 +51,7 @@ config BONDING</div><div class='ctx'> 	  The driver supports multiple bonding modes to allow for both high</div><div class='ctx'> 	  performance and high availability operation.</div><div class='ctx'> </div><div class='del'>-	  Refer to &lt;file:Documentation/networking/bonding.txt&gt; for more</div><div class='add'>+	  Refer to &lt;file:Documentation/networking/bonding.rst&gt; for more</div><div class='ctx'> 	  information.</div><div class='ctx'> </div><div class='ctx'> 	  To compile this driver as a module, choose M here: the module</div><div class='hunk'>@@ -57,23 +59,67 @@ config BONDING</div><div class='ctx'> </div><div class='ctx'> config DUMMY</div><div class='ctx'> 	tristate "Dummy net driver support"</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  This is essentially a bit-bucket device (i.e. traffic you send to</div><div class='ctx'> 	  this device is consigned into oblivion) with a configurable IP</div><div class='ctx'> 	  address. It is most commonly used in order to make your currently</div><div class='ctx'> 	  inactive SLIP address seem like a real address for local programs.</div><div class='del'>-	  If you use SLIP or PPP, you might want to say Y here. Since this</div><div class='del'>-	  thing often comes in handy, the default is Y. It won't enlarge your</div><div class='del'>-	  kernel either. What a deal. Read about it in the Network</div><div class='add'>+	  If you use SLIP or PPP, you might want to say Y here. It won't</div><div class='add'>+	  enlarge your kernel. What a deal. Read about it in the Network</div><div class='ctx'> 	  Administrator's Guide, available from</div><div class='ctx'> 	  &lt;http://www.tldp.org/docs.html#guide&gt;.</div><div class='ctx'> </div><div class='ctx'> 	  To compile this driver as a module, choose M here: the module</div><div class='ctx'> 	  will be called dummy.</div><div class='ctx'> </div><div class='add'>+config WIREGUARD</div><div class='add'>+	tristate "WireGuard secure network tunnel"</div><div class='add'>+	depends on NET &amp;&amp; INET</div><div class='add'>+	depends on IPV6 || !IPV6</div><div class='add'>+	select NET_UDP_TUNNEL</div><div class='add'>+	select DST_CACHE</div><div class='add'>+	select CRYPTO_LIB_CURVE25519</div><div class='add'>+	select CRYPTO_LIB_CHACHA20POLY1305</div><div class='add'>+	select CRYPTO_LIB_UTILS</div><div class='add'>+	help</div><div class='add'>+	  WireGuard is a secure, fast, and easy to use replacement for IPSec</div><div class='add'>+	  that uses modern cryptography and clever networking tricks. It's</div><div class='add'>+	  designed to be fairly general purpose and abstract enough to fit most</div><div class='add'>+	  use cases, while at the same time remaining extremely simple to</div><div class='add'>+	  configure. See www.wireguard.com for more info.</div><div class='add'>+</div><div class='add'>+	  It's safe to say Y or M here, as the driver is very lightweight and</div><div class='add'>+	  is only in use when an administrator chooses to add an interface.</div><div class='add'>+</div><div class='add'>+config WIREGUARD_DEBUG</div><div class='add'>+	bool "Debugging checks and verbose messages"</div><div class='add'>+	depends on WIREGUARD</div><div class='add'>+	help</div><div class='add'>+	  This will write log messages for handshake and other events</div><div class='add'>+	  that occur for a WireGuard interface. It will also perform some</div><div class='add'>+	  extra validation checks and unit tests at various points. This is</div><div class='add'>+	  only useful for debugging.</div><div class='add'>+</div><div class='add'>+	  Say N here unless you know what you're doing.</div><div class='add'>+</div><div class='add'>+config OVPN</div><div class='add'>+	tristate "OpenVPN data channel offload"</div><div class='add'>+	depends on NET &amp;&amp; INET</div><div class='add'>+	depends on IPV6 || !IPV6</div><div class='add'>+	select DST_CACHE</div><div class='add'>+	select NET_UDP_TUNNEL</div><div class='add'>+	select CRYPTO</div><div class='add'>+	select CRYPTO_AES</div><div class='add'>+	select CRYPTO_GCM</div><div class='add'>+	select CRYPTO_CHACHA20POLY1305</div><div class='add'>+	select STREAM_PARSER</div><div class='add'>+	help</div><div class='add'>+	  This module enhances the performance of the OpenVPN userspace software</div><div class='add'>+	  by offloading the data channel processing to kernelspace.</div><div class='add'>+</div><div class='ctx'> config EQUALIZER</div><div class='ctx'> 	tristate "EQL (serial line load balancing) support"</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  If you have two serial connections to some other computer (this</div><div class='ctx'> 	  usually requires two modems and two telephone lines) and you use</div><div class='ctx'> 	  SLIP (the protocol for sending Internet traffic over telephone</div><div class='hunk'>@@ -83,7 +129,7 @@ config EQUALIZER</div><div class='ctx'> 	  Linux driver or with a Livingston Portmaster 2e.</div><div class='ctx'> </div><div class='ctx'> 	  Say Y if you want this and read</div><div class='del'>-	  &lt;file:Documentation/networking/eql.txt&gt;.  You may also want to read</div><div class='add'>+	  &lt;file:Documentation/networking/eql.rst&gt;.  You may also want to read</div><div class='ctx'> 	  section 6.2 of the NET-3-HOWTO, available from</div><div class='ctx'> 	  &lt;http://www.tldp.org/docs.html#howto&gt;.</div><div class='ctx'> </div><div class='hunk'>@@ -105,8 +151,9 @@ config NET_FC</div><div class='ctx'> </div><div class='ctx'> config IFB</div><div class='ctx'> 	tristate "Intermediate Functional Block support"</div><div class='del'>-	depends on NET_CLS_ACT</div><div class='del'>-	---help---</div><div class='add'>+	depends on NET_ACT_MIRRED || NFT_FWD_NETDEV</div><div class='add'>+	select NET_REDIRECT</div><div class='add'>+	help</div><div class='ctx'> 	  This is an intermediate driver that allows sharing of</div><div class='ctx'> 	  resources.</div><div class='ctx'> 	  To compile this driver as a module, choose M here: the module</div><div class='hunk'>@@ -120,7 +167,7 @@ source "drivers/net/team/Kconfig"</div><div class='ctx'> </div><div class='ctx'> config MACVLAN</div><div class='ctx'> 	tristate "MAC-VLAN support"</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  This allows one to create virtual interfaces that map packets to</div><div class='ctx'> 	  or from specific MAC addresses to a particular interface.</div><div class='ctx'> </div><div class='hunk'>@@ -136,6 +183,7 @@ config MACVTAP</div><div class='ctx'> 	tristate "MAC-VLAN based tap driver"</div><div class='ctx'> 	depends on MACVLAN</div><div class='ctx'> 	depends on INET</div><div class='add'>+	select TAP</div><div class='ctx'> 	help</div><div class='ctx'> 	  This adds a specialized tap character device driver that is based</div><div class='ctx'> 	  on the MAC-VLAN network interface, called macvtap. A macvtap device</div><div class='hunk'>@@ -145,31 +193,50 @@ config MACVTAP</div><div class='ctx'> 	  To compile this driver as a module, choose M here: the module</div><div class='ctx'> 	  will be called macvtap.</div><div class='ctx'> </div><div class='add'>+config IPVLAN_L3S</div><div class='add'>+	depends on NETFILTER</div><div class='add'>+	depends on IPVLAN</div><div class='add'>+	def_bool y</div><div class='add'>+	select NET_L3_MASTER_DEV</div><div class='ctx'> </div><div class='ctx'> config IPVLAN</div><div class='del'>-    tristate "IP-VLAN support"</div><div class='del'>-    depends on INET</div><div class='del'>-    depends on IPV6</div><div class='del'>-    ---help---</div><div class='del'>-      This allows one to create virtual devices off of a main interface</div><div class='del'>-      and packets will be delivered based on the dest L3 (IPv6/IPv4 addr)</div><div class='del'>-      on packets. All interfaces (including the main interface) share L2</div><div class='del'>-      making it transparent to the connected L2 switch.</div><div class='add'>+	tristate "IP-VLAN support"</div><div class='add'>+	depends on INET</div><div class='add'>+	depends on IPV6 || !IPV6</div><div class='add'>+	help</div><div class='add'>+	  This allows one to create virtual devices off of a main interface</div><div class='add'>+	  and packets will be delivered based on the dest L3 (IPv6/IPv4 addr)</div><div class='add'>+	  on packets. All interfaces (including the main interface) share L2</div><div class='add'>+	  making it transparent to the connected L2 switch.</div><div class='ctx'> </div><div class='del'>-      Ipvlan devices can be added using the "ip" command from the</div><div class='del'>-      iproute2 package starting with the iproute2-3.19 release:</div><div class='add'>+	  Ipvlan devices can be added using the "ip" command from the</div><div class='add'>+	  iproute2 package starting with the iproute2-3.19 release:</div><div class='ctx'> </div><div class='del'>-      "ip link add link &lt;main-dev&gt; [ NAME ] type ipvlan"</div><div class='add'>+	  "ip link add link &lt;main-dev&gt; [ NAME ] type ipvlan"</div><div class='ctx'> </div><div class='del'>-      To compile this driver as a module, choose M here: the module</div><div class='del'>-      will be called ipvlan.</div><div class='add'>+	  To compile this driver as a module, choose M here: the module</div><div class='add'>+	  will be called ipvlan.</div><div class='ctx'> </div><div class='add'>+config IPVTAP</div><div class='add'>+	tristate "IP-VLAN based tap driver"</div><div class='add'>+	depends on IPVLAN</div><div class='add'>+	depends on INET</div><div class='add'>+	select TAP</div><div class='add'>+	help</div><div class='add'>+	  This adds a specialized tap character device driver that is based</div><div class='add'>+	  on the IP-VLAN network interface, called ipvtap. An ipvtap device</div><div class='add'>+	  can be added in the same way as a ipvlan device, using 'type</div><div class='add'>+	  ipvtap', and then be accessed through the tap user space interface.</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose M here: the module</div><div class='add'>+	  will be called ipvtap.</div><div class='ctx'> </div><div class='ctx'> config VXLAN</div><div class='del'>-       tristate "Virtual eXtensible Local Area Network (VXLAN)"</div><div class='del'>-       depends on INET</div><div class='del'>-       select NET_UDP_TUNNEL</div><div class='del'>-       ---help---</div><div class='add'>+	tristate "Virtual eXtensible Local Area Network (VXLAN)"</div><div class='add'>+	depends on INET</div><div class='add'>+	select NET_UDP_TUNNEL</div><div class='add'>+	select GRO_CELLS</div><div class='add'>+	help</div><div class='ctx'> 	  This allows one to create vxlan virtual interfaces that provide</div><div class='ctx'> 	  Layer 2 Networks over Layer 3 Networks. VXLAN is often used</div><div class='ctx'> 	  to tunnel virtual network infrastructure in virtualized environments.</div><div class='hunk'>@@ -180,10 +247,12 @@ config VXLAN</div><div class='ctx'> 	  will be called vxlan.</div><div class='ctx'> </div><div class='ctx'> config GENEVE</div><div class='del'>-       tristate "Generic Network Virtualization Encapsulation netdev"</div><div class='del'>-       depends on INET &amp;&amp; GENEVE_CORE</div><div class='del'>-       select NET_IP_TUNNEL</div><div class='del'>-       ---help---</div><div class='add'>+	tristate "Generic Network Virtualization Encapsulation"</div><div class='add'>+	depends on INET</div><div class='add'>+	depends on IPV6 || !IPV6</div><div class='add'>+	select NET_UDP_TUNNEL</div><div class='add'>+	select GRO_CELLS</div><div class='add'>+	help</div><div class='ctx'> 	  This allows one to create geneve virtual interfaces that provide</div><div class='ctx'> 	  Layer 2 Networks over Layer 3 Networks. GENEVE is often used</div><div class='ctx'> 	  to tunnel virtual network infrastructure in virtualized environments.</div><div class='hunk'>@@ -193,11 +262,80 @@ config GENEVE</div><div class='ctx'> 	  To compile this driver as a module, choose M here: the module</div><div class='ctx'> 	  will be called geneve.</div><div class='ctx'> </div><div class='add'>+config BAREUDP</div><div class='add'>+	tristate "Bare UDP Encapsulation"</div><div class='add'>+	depends on INET</div><div class='add'>+	depends on IPV6 || !IPV6</div><div class='add'>+	select NET_UDP_TUNNEL</div><div class='add'>+	select GRO_CELLS</div><div class='add'>+	help</div><div class='add'>+	  This adds a bare UDP tunnel module for tunnelling different</div><div class='add'>+	  kinds of traffic like MPLS, IP, etc. inside a UDP tunnel.</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose M here: the module</div><div class='add'>+	  will be called bareudp.</div><div class='add'>+</div><div class='add'>+config GTP</div><div class='add'>+	tristate "GPRS Tunneling Protocol datapath (GTP-U)"</div><div class='add'>+	depends on INET</div><div class='add'>+	select NET_UDP_TUNNEL</div><div class='add'>+	help</div><div class='add'>+	  This allows one to create gtp virtual interfaces that provide</div><div class='add'>+	  the GPRS Tunneling Protocol datapath (GTP-U). This tunneling protocol</div><div class='add'>+	  is used to prevent subscribers from accessing mobile carrier core</div><div class='add'>+	  network infrastructure. This driver requires a userspace software that</div><div class='add'>+	  implements the signaling protocol (GTP-C) to update its PDP context</div><div class='add'>+	  base, such as OpenGGSN &lt;http://git.osmocom.org/openggsn/). This</div><div class='add'>+	  tunneling protocol is implemented according to the GSM TS 09.60 and</div><div class='add'>+	  3GPP TS 29.060 standards.</div><div class='add'>+</div><div class='add'>+	  To compile this drivers as a module, choose M here: the module</div><div class='add'>+	  will be called gtp.</div><div class='add'>+</div><div class='add'>+config PFCP</div><div class='add'>+	tristate "Packet Forwarding Control Protocol (PFCP)"</div><div class='add'>+	depends on INET</div><div class='add'>+	select NET_UDP_TUNNEL</div><div class='add'>+	help</div><div class='add'>+	  This allows one to create PFCP virtual interfaces that allows to</div><div class='add'>+	  set up software and hardware offload of PFCP packets.</div><div class='add'>+	  Note that this module does not support PFCP protocol in the kernel space.</div><div class='add'>+	  There is no support for parsing any PFCP messages.</div><div class='add'>+</div><div class='add'>+	  To compile this drivers as a module, choose M here: the module</div><div class='add'>+	  will be called pfcp.</div><div class='add'>+</div><div class='add'>+config AMT</div><div class='add'>+	tristate "Automatic Multicast Tunneling (AMT)"</div><div class='add'>+	depends on INET &amp;&amp; IP_MULTICAST</div><div class='add'>+	depends on IPV6 || !IPV6</div><div class='add'>+	select NET_UDP_TUNNEL</div><div class='add'>+	help</div><div class='add'>+	  This allows one to create AMT(Automatic Multicast Tunneling)</div><div class='add'>+	  virtual interfaces that provide multicast tunneling.</div><div class='add'>+	  There are two roles, Gateway, and Relay.</div><div class='add'>+	  Gateway Encapsulates IGMP/MLD traffic from listeners to the Relay.</div><div class='add'>+	  Gateway Decapsulates multicast traffic from the Relay to Listeners.</div><div class='add'>+	  Relay Encapsulates multicast traffic from Sources to Gateway.</div><div class='add'>+	  Relay Decapsulates IGMP/MLD traffic from Gateway.</div><div class='add'>+</div><div class='add'>+	  To compile this drivers as a module, choose M here: the module</div><div class='add'>+	  will be called amt.</div><div class='add'>+</div><div class='add'>+config MACSEC</div><div class='add'>+	tristate "IEEE 802.1AE MAC-level encryption (MACsec)"</div><div class='add'>+	select CRYPTO</div><div class='add'>+	select CRYPTO_AES</div><div class='add'>+	select CRYPTO_GCM</div><div class='add'>+	select GRO_CELLS</div><div class='add'>+	help</div><div class='add'>+	   MACsec is an encryption standard for Ethernet.</div><div class='add'>+</div><div class='ctx'> config NETCONSOLE</div><div class='ctx'> 	tristate "Network console logging support"</div><div class='del'>-	---help---</div><div class='del'>-	If you want to log kernel messages over the network, enable this.</div><div class='del'>-	See &lt;file:Documentation/networking/netconsole.txt&gt; for details.</div><div class='add'>+	help</div><div class='add'>+	  If you want to log kernel messages over the network, enable this.</div><div class='add'>+	  See &lt;file:Documentation/networking/netconsole.rst&gt; for details.</div><div class='ctx'> </div><div class='ctx'> config NETCONSOLE_DYNAMIC</div><div class='ctx'> 	bool "Dynamic reconfiguration of logging targets"</div><div class='hunk'>@@ -207,11 +345,32 @@ config NETCONSOLE_DYNAMIC</div><div class='ctx'> 	  This option enables the ability to dynamically reconfigure target</div><div class='ctx'> 	  parameters (interface, IP addresses, port numbers, MAC addresses)</div><div class='ctx'> 	  at runtime through a userspace interface exported using configfs.</div><div class='del'>-	  See &lt;file:Documentation/networking/netconsole.txt&gt; for details.</div><div class='add'>+	  See &lt;file:Documentation/networking/netconsole.rst&gt; for details.</div><div class='add'>+</div><div class='add'>+config NETCONSOLE_EXTENDED_LOG</div><div class='add'>+	bool "Set kernel extended message by default"</div><div class='add'>+	depends on NETCONSOLE</div><div class='add'>+	default n</div><div class='add'>+	help</div><div class='add'>+	  Set extended log support for netconsole message. If this option is</div><div class='add'>+	  set, log messages are transmitted with extended metadata header in a</div><div class='add'>+	  format similar to /dev/kmsg.  See</div><div class='add'>+	  &lt;file:Documentation/networking/netconsole.rst&gt; for details.</div><div class='add'>+</div><div class='add'>+config NETCONSOLE_PREPEND_RELEASE</div><div class='add'>+	bool "Prepend kernel release version in the message by default"</div><div class='add'>+	depends on NETCONSOLE_EXTENDED_LOG</div><div class='add'>+	default n</div><div class='add'>+	help</div><div class='add'>+	  Set kernel release to be prepended to each netconsole message by</div><div class='add'>+	  default. If this option is set, the kernel release is prepended into</div><div class='add'>+	  the first field of every netconsole message, so, the netconsole</div><div class='add'>+	  server/peer can easily identify what kernel release is logging each</div><div class='add'>+	  message.  See &lt;file:Documentation/networking/netconsole.rst&gt; for</div><div class='add'>+	  details.</div><div class='ctx'> </div><div class='ctx'> config NETPOLL</div><div class='ctx'> 	def_bool NETCONSOLE</div><div class='del'>-	select SRCU</div><div class='ctx'> </div><div class='ctx'> config NET_POLL_CONTROLLER</div><div class='ctx'> 	def_bool NETPOLL</div><div class='hunk'>@@ -238,7 +397,7 @@ config TUN</div><div class='ctx'> 	tristate "Universal TUN/TAP device driver support"</div><div class='ctx'> 	depends on INET</div><div class='ctx'> 	select CRC32</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  TUN/TAP provides packet reception and transmission for user space</div><div class='ctx'> 	  programs.  It can be viewed as a simple Point-to-Point or Ethernet</div><div class='ctx'> 	  device, which instead of receiving packets from a physical media,</div><div class='hunk'>@@ -250,7 +409,7 @@ config TUN</div><div class='ctx'> 	  devices, driver will automatically delete tunXX or tapXX device and</div><div class='ctx'> 	  all routes corresponding to it.</div><div class='ctx'> </div><div class='del'>-	  Please read &lt;file:Documentation/networking/tuntap.txt&gt; for more</div><div class='add'>+	  Please read &lt;file:Documentation/networking/tuntap.rst&gt; for more</div><div class='ctx'> 	  information.</div><div class='ctx'> </div><div class='ctx'> 	  To compile this driver as a module, choose M here: the module</div><div class='hunk'>@@ -258,10 +417,16 @@ config TUN</div><div class='ctx'> </div><div class='ctx'> 	  If you don't know what to use this for, you don't need it.</div><div class='ctx'> </div><div class='add'>+config TAP</div><div class='add'>+	tristate</div><div class='add'>+	help</div><div class='add'>+	  This option is selected by any driver implementing tap user space</div><div class='add'>+	  interface for a virtual interface to re-use core tap functionality.</div><div class='add'>+</div><div class='ctx'> config TUN_VNET_CROSS_LE</div><div class='ctx'> 	bool "Support for cross-endian vnet headers on little-endian kernels"</div><div class='ctx'> 	default n</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  This option allows TUN/TAP and MACVTAP device drivers in a</div><div class='ctx'> 	  little-endian kernel to parse vnet headers that come from a</div><div class='ctx'> 	  big-endian legacy virtio device.</div><div class='hunk'>@@ -274,7 +439,8 @@ config TUN_VNET_CROSS_LE</div><div class='ctx'> </div><div class='ctx'> config VETH</div><div class='ctx'> 	tristate "Virtual ethernet pair device"</div><div class='del'>-	---help---</div><div class='add'>+	select PAGE_POOL</div><div class='add'>+	help</div><div class='ctx'> 	  This device is a local ethernet tunnel. Devices are created in pairs.</div><div class='ctx'> 	  When one end receives the packet it appears on its pair and vice</div><div class='ctx'> 	  versa.</div><div class='hunk'>@@ -282,14 +448,15 @@ config VETH</div><div class='ctx'> config VIRTIO_NET</div><div class='ctx'> 	tristate "Virtio network driver"</div><div class='ctx'> 	depends on VIRTIO</div><div class='del'>-	select AVERAGE</div><div class='del'>-	---help---</div><div class='add'>+	select NET_FAILOVER</div><div class='add'>+	select DIMLIB</div><div class='add'>+	help</div><div class='ctx'> 	  This is the virtual network driver for virtio.  It can be used with</div><div class='del'>-	  lguest or QEMU based VMMs (like KVM or Xen).  Say Y or M.</div><div class='add'>+	  QEMU based VMMs (like KVM or Xen).  Say Y or M.</div><div class='ctx'> </div><div class='ctx'> config NLMON</div><div class='ctx'> 	tristate "Virtual netlink monitoring device"</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  This option enables a monitoring net device for netlink skbs. The</div><div class='ctx'> 	  purpose of this is to analyze netlink messages with packet sockets.</div><div class='ctx'> 	  Thus applications like tcpdump will be able to see local netlink</div><div class='hunk'>@@ -297,6 +464,41 @@ config NLMON</div><div class='ctx'> 	  diagnostics, etc. This is mostly intended for developers or support</div><div class='ctx'> 	  to debug netlink issues. If unsure, say N.</div><div class='ctx'> </div><div class='add'>+config NETKIT</div><div class='add'>+	bool "BPF-programmable network device"</div><div class='add'>+	depends on BPF_SYSCALL</div><div class='add'>+	help</div><div class='add'>+	  The netkit device is a virtual networking device where BPF programs</div><div class='add'>+	  can be attached to the device(s) transmission routine in order to</div><div class='add'>+	  implement the driver's internal logic. The device can be configured</div><div class='add'>+	  to operate in L3 or L2 mode. If unsure, say N.</div><div class='add'>+</div><div class='add'>+config NET_VRF</div><div class='add'>+	tristate "Virtual Routing and Forwarding (Lite)"</div><div class='add'>+	depends on IP_MULTIPLE_TABLES</div><div class='add'>+	depends on NET_L3_MASTER_DEV</div><div class='add'>+	depends on IPV6 || IPV6=n</div><div class='add'>+	depends on IPV6_MULTIPLE_TABLES || IPV6=n</div><div class='add'>+	help</div><div class='add'>+	  This option enables the support for mapping interfaces into VRF's. The</div><div class='add'>+	  support enables VRF devices.</div><div class='add'>+</div><div class='add'>+config VSOCKMON</div><div class='add'>+	tristate "Virtual vsock monitoring device"</div><div class='add'>+	depends on VHOST_VSOCK</div><div class='add'>+	help</div><div class='add'>+	  This option enables a monitoring net device for vsock sockets. It is</div><div class='add'>+	  mostly intended for developers or support to debug vsock issues. If</div><div class='add'>+	  unsure, say N.</div><div class='add'>+</div><div class='add'>+config MHI_NET</div><div class='add'>+	tristate "MHI network driver"</div><div class='add'>+	depends on MHI_BUS</div><div class='add'>+	help</div><div class='add'>+	  This is the network driver for MHI bus.  It can be used with</div><div class='add'>+	  QCOM based WWAN modems for IP or QMAP/rmnet protocol (like SDX55).</div><div class='add'>+	  Say Y or M.</div><div class='add'>+</div><div class='ctx'> endif # NET_CORE</div><div class='ctx'> </div><div class='ctx'> config SUNGEM_PHY</div><div class='hunk'>@@ -316,32 +518,20 @@ source "drivers/net/fddi/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source "drivers/net/hippi/Kconfig"</div><div class='ctx'> </div><div class='del'>-config NET_SB1000</div><div class='del'>-	tristate "General Instruments Surfboard 1000"</div><div class='del'>-	depends on PNP</div><div class='del'>-	---help---</div><div class='del'>-	  This is a driver for the General Instrument (also known as</div><div class='del'>-	  NextLevel) SURFboard 1000 internal</div><div class='del'>-	  cable modem. This is an ISA card which is used by a number of cable</div><div class='del'>-	  TV companies to provide cable modem access. It's a one-way</div><div class='del'>-	  downstream-only cable modem, meaning that your upstream net link is</div><div class='del'>-	  provided by your regular phone modem.</div><div class='del'>-</div><div class='del'>-	  At present this driver only compiles as a module, so say M here if</div><div class='del'>-	  you have this card. The module will be called sb1000. Then read</div><div class='del'>-	  &lt;file:Documentation/networking/README.sb1000&gt; for information on how</div><div class='del'>-	  to use this module, as it needs special ppp scripts for establishing</div><div class='del'>-	  a connection. Further documentation and the necessary scripts can be</div><div class='del'>-	  found at:</div><div class='del'>-</div><div class='del'>-	  &lt;http://www.jacksonville.net/~fventuri/&gt;</div><div class='del'>-	  &lt;http://home.adelphia.net/~siglercm/sb1000.html&gt;</div><div class='del'>-	  &lt;http://linuxpower.cx/~cable/&gt;</div><div class='del'>-</div><div class='del'>-	  If you don't have this card, of course say N.</div><div class='add'>+source "drivers/net/ipa/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source "drivers/net/phy/Kconfig"</div><div class='ctx'> </div><div class='add'>+source "drivers/net/pse-pd/Kconfig"</div><div class='add'>+</div><div class='add'>+source "drivers/net/can/Kconfig"</div><div class='add'>+</div><div class='add'>+source "drivers/net/mctp/Kconfig"</div><div class='add'>+</div><div class='add'>+source "drivers/net/mdio/Kconfig"</div><div class='add'>+</div><div class='add'>+source "drivers/net/pcs/Kconfig"</div><div class='add'>+</div><div class='ctx'> source "drivers/net/plip/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source "drivers/net/ppp/Kconfig"</div><div class='hunk'>@@ -354,16 +544,17 @@ source "drivers/net/usb/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source "drivers/net/wireless/Kconfig"</div><div class='ctx'> </div><div class='del'>-source "drivers/net/wimax/Kconfig"</div><div class='del'>-</div><div class='ctx'> source "drivers/net/wan/Kconfig"</div><div class='ctx'> </div><div class='ctx'> source "drivers/net/ieee802154/Kconfig"</div><div class='ctx'> </div><div class='add'>+source "drivers/net/wwan/Kconfig"</div><div class='add'>+</div><div class='ctx'> config XEN_NETDEV_FRONTEND</div><div class='ctx'> 	tristate "Xen network device frontend driver"</div><div class='ctx'> 	depends on XEN</div><div class='ctx'> 	select XEN_XENBUS_FRONTEND</div><div class='add'>+	select PAGE_POOL</div><div class='ctx'> 	default y</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver provides support for Xen paravirtual network</div><div class='hunk'>@@ -402,11 +593,58 @@ config XEN_NETDEV_BACKEND</div><div class='ctx'> config VMXNET3</div><div class='ctx'> 	tristate "VMware VMXNET3 ethernet driver"</div><div class='ctx'> 	depends on PCI &amp;&amp; INET</div><div class='add'>+	depends on PAGE_SIZE_LESS_THAN_64KB</div><div class='add'>+	select PAGE_POOL</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver supports VMware's vmxnet3 virtual ethernet NIC.</div><div class='ctx'> 	  To compile this driver as a module, choose M here: the</div><div class='ctx'> 	  module will be called vmxnet3.</div><div class='ctx'> </div><div class='add'>+config FUJITSU_ES</div><div class='add'>+	tristate "FUJITSU Extended Socket Network Device driver"</div><div class='add'>+	depends on ACPI</div><div class='add'>+	help</div><div class='add'>+	  This driver provides support for Extended Socket network device</div><div class='add'>+	  on Extended Partitioning of FUJITSU PRIMEQUEST 2000 E2 series.</div><div class='add'>+</div><div class='add'>+source "drivers/net/thunderbolt/Kconfig"</div><div class='ctx'> source "drivers/net/hyperv/Kconfig"</div><div class='ctx'> </div><div class='add'>+config NETDEVSIM</div><div class='add'>+	tristate "Simulated networking device"</div><div class='add'>+	depends on DEBUG_FS</div><div class='add'>+	depends on INET</div><div class='add'>+	depends on IPV6 || IPV6=n</div><div class='add'>+	depends on PSAMPLE || PSAMPLE=n</div><div class='add'>+	depends on PTP_1588_CLOCK_MOCK || PTP_1588_CLOCK_MOCK=n</div><div class='add'>+	select NET_DEVLINK</div><div class='add'>+	select PAGE_POOL</div><div class='add'>+	select NET_SHAPER</div><div class='add'>+	help</div><div class='add'>+	  This driver is a developer testing tool and software model that can</div><div class='add'>+	  be used to test various control path networking APIs, especially</div><div class='add'>+	  HW-offload related.</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose M here: the module</div><div class='add'>+	  will be called netdevsim.</div><div class='add'>+</div><div class='add'>+config NET_FAILOVER</div><div class='add'>+	tristate "Failover driver"</div><div class='add'>+	select FAILOVER</div><div class='add'>+	help</div><div class='add'>+	  This provides an automated failover mechanism via APIs to create</div><div class='add'>+	  and destroy a failover master netdev and manages a primary and</div><div class='add'>+	  standby slave netdevs that get registered via the generic failover</div><div class='add'>+	  infrastructure. This can be used by paravirtual drivers to enable</div><div class='add'>+	  an alternate low latency datapath. It also enables live migration of</div><div class='add'>+	  a VM with direct attached VF by failing over to the paravirtual</div><div class='add'>+	  datapath when the VF is unplugged.</div><div class='add'>+</div><div class='add'>+config NETDEV_LEGACY_INIT</div><div class='add'>+	bool</div><div class='add'>+	depends on ISA</div><div class='add'>+	help</div><div class='add'>+	  Drivers that call netdev_boot_setup_check() should select this</div><div class='add'>+	  symbol, everything else no longer needs it.</div><div class='add'>+</div><div class='ctx'> endif # NETDEVICES</div><div class='head'>diff --git a/drivers/net/Makefile b/drivers/net/Makefile<br/>index c12cb22478a7..73bc63ecd65f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/Makefile?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/Makefile</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> #</div><div class='ctx'> # Makefile for the Linux network device drivers.</div><div class='ctx'> #</div><div class='hunk'>@@ -7,39 +8,56 @@</div><div class='ctx'> #</div><div class='ctx'> obj-$(CONFIG_BONDING) += bonding/</div><div class='ctx'> obj-$(CONFIG_IPVLAN) += ipvlan/</div><div class='add'>+obj-$(CONFIG_IPVTAP) += ipvlan/</div><div class='ctx'> obj-$(CONFIG_DUMMY) += dummy.o</div><div class='add'>+obj-$(CONFIG_WIREGUARD) += wireguard/</div><div class='add'>+obj-$(CONFIG_OVPN) += ovpn/</div><div class='ctx'> obj-$(CONFIG_EQUALIZER) += eql.o</div><div class='ctx'> obj-$(CONFIG_IFB) += ifb.o</div><div class='add'>+obj-$(CONFIG_MACSEC) += macsec.o</div><div class='add'>+obj-$(CONFIG_AMT) += amt.o</div><div class='ctx'> obj-$(CONFIG_MACVLAN) += macvlan.o</div><div class='ctx'> obj-$(CONFIG_MACVTAP) += macvtap.o</div><div class='ctx'> obj-$(CONFIG_MII) += mii.o</div><div class='ctx'> obj-$(CONFIG_MDIO) += mdio.o</div><div class='del'>-obj-$(CONFIG_NET) += Space.o loopback.o</div><div class='add'>+obj-$(CONFIG_NET) += loopback.o</div><div class='add'>+obj-$(CONFIG_NETDEV_LEGACY_INIT) += Space.o</div><div class='ctx'> obj-$(CONFIG_NETCONSOLE) += netconsole.o</div><div class='del'>-obj-$(CONFIG_PHYLIB) += phy/</div><div class='add'>+obj-$(CONFIG_NETKIT) += netkit.o</div><div class='add'>+obj-y += phy/</div><div class='add'>+obj-y += pse-pd/</div><div class='add'>+obj-y += mdio/</div><div class='add'>+obj-y += pcs/</div><div class='ctx'> obj-$(CONFIG_RIONET) += rionet.o</div><div class='ctx'> obj-$(CONFIG_NET_TEAM) += team/</div><div class='ctx'> obj-$(CONFIG_TUN) += tun.o</div><div class='add'>+obj-$(CONFIG_TAP) += tap.o</div><div class='ctx'> obj-$(CONFIG_VETH) += veth.o</div><div class='ctx'> obj-$(CONFIG_VIRTIO_NET) += virtio_net.o</div><div class='del'>-obj-$(CONFIG_VXLAN) += vxlan.o</div><div class='add'>+obj-$(CONFIG_VXLAN) += vxlan/</div><div class='ctx'> obj-$(CONFIG_GENEVE) += geneve.o</div><div class='add'>+obj-$(CONFIG_BAREUDP) += bareudp.o</div><div class='add'>+obj-$(CONFIG_GTP) += gtp.o</div><div class='ctx'> obj-$(CONFIG_NLMON) += nlmon.o</div><div class='add'>+obj-$(CONFIG_PFCP) += pfcp.o</div><div class='add'>+obj-$(CONFIG_NET_VRF) += vrf.o</div><div class='add'>+obj-$(CONFIG_VSOCKMON) += vsockmon.o</div><div class='add'>+obj-$(CONFIG_MHI_NET) += mhi_net.o</div><div class='ctx'> </div><div class='ctx'> #</div><div class='ctx'> # Networking Drivers</div><div class='ctx'> #</div><div class='ctx'> obj-$(CONFIG_ARCNET) += arcnet/</div><div class='del'>-obj-$(CONFIG_DEV_APPLETALK) += appletalk/</div><div class='ctx'> obj-$(CONFIG_CAIF) += caif/</div><div class='ctx'> obj-$(CONFIG_CAN) += can/</div><div class='del'>-obj-$(CONFIG_ETRAX_ETHERNET) += cris/</div><div class='del'>-obj-$(CONFIG_NET_DSA) += dsa/</div><div class='add'>+ifdef CONFIG_NET_DSA</div><div class='add'>+obj-y += dsa/</div><div class='add'>+endif</div><div class='ctx'> obj-$(CONFIG_ETHERNET) += ethernet/</div><div class='ctx'> obj-$(CONFIG_FDDI) += fddi/</div><div class='ctx'> obj-$(CONFIG_HIPPI) += hippi/</div><div class='ctx'> obj-$(CONFIG_HAMRADIO) += hamradio/</div><div class='del'>-obj-$(CONFIG_IRDA) += irda/</div><div class='add'>+obj-$(CONFIG_QCOM_IPA) += ipa/</div><div class='ctx'> obj-$(CONFIG_PLIP) += plip/</div><div class='ctx'> obj-$(CONFIG_PPP) += ppp/</div><div class='ctx'> obj-$(CONFIG_PPP_ASYNC) += ppp/</div><div class='hunk'>@@ -52,12 +70,12 @@ obj-$(CONFIG_PPPOL2TP) += ppp/</div><div class='ctx'> obj-$(CONFIG_PPTP) += ppp/</div><div class='ctx'> obj-$(CONFIG_SLIP) += slip/</div><div class='ctx'> obj-$(CONFIG_SLHC) += slip/</div><div class='del'>-obj-$(CONFIG_NET_SB1000) += sb1000.o</div><div class='ctx'> obj-$(CONFIG_SUNGEM_PHY) += sungem_phy.o</div><div class='ctx'> obj-$(CONFIG_WAN) += wan/</div><div class='ctx'> obj-$(CONFIG_WLAN) += wireless/</div><div class='del'>-obj-$(CONFIG_WIMAX) += wimax/</div><div class='ctx'> obj-$(CONFIG_IEEE802154) += ieee802154/</div><div class='add'>+obj-$(CONFIG_WWAN) += wwan/</div><div class='add'>+obj-$(CONFIG_MCTP) += mctp/</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_VMXNET3) += vmxnet3/</div><div class='ctx'> obj-$(CONFIG_XEN_NETDEV_FRONTEND) += xen-netfront.o</div><div class='hunk'>@@ -67,3 +85,8 @@ obj-$(CONFIG_USB_NET_DRIVERS) += usb/</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_HYPERV_NET) += hyperv/</div><div class='ctx'> obj-$(CONFIG_NTB_NETDEV) += ntb_netdev.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_FUJITSU_ES) += fjes/</div><div class='add'>+obj-$(CONFIG_USB4_NET) += thunderbolt/</div><div class='add'>+obj-$(CONFIG_NETDEVSIM) += netdevsim/</div><div class='add'>+obj-$(CONFIG_NET_FAILOVER) += net_failover.o</div><div class='head'>diff --git a/drivers/net/Space.c b/drivers/net/Space.c<br/>index 67977f15af25..c01e2c2f7d6c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/Space.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/Space.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/Space.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/Space.c</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='ctx'> /*</div><div class='ctx'>  * INET		An implementation of the TCP/IP protocol suite for the LINUX</div><div class='ctx'>  *		operating system.  INET is implemented using the  BSD Socket</div><div class='hunk'>@@ -21,11 +22,6 @@</div><div class='ctx'>  *		Paul Gortmaker (06/98):</div><div class='ctx'>  *		 - sort probes in a sane way, make sure all (safe) probes</div><div class='ctx'>  *		   get run once &amp; failed autoprobes don't autoprobe again.</div><div class='del'>- *</div><div class='del'>- *		This program is free software; you can redistribute it and/or</div><div class='del'>- *		modify it under the terms of the GNU General Public License</div><div class='del'>- *		as published by the Free Software Foundation; either version</div><div class='del'>- *		2 of the License, or (at your option) any later version.</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='hunk'>@@ -34,9 +30,150 @@</div><div class='ctx'> #include &lt;linux/netlink.h&gt;</div><div class='ctx'> #include &lt;net/Space.h&gt;</div><div class='ctx'> </div><div class='add'>+/*</div><div class='add'>+ * This structure holds boot-time configured netdevice settings. They</div><div class='add'>+ * are then used in the device probing.</div><div class='add'>+ */</div><div class='add'>+struct netdev_boot_setup {</div><div class='add'>+	char name[IFNAMSIZ];</div><div class='add'>+	struct ifmap map;</div><div class='add'>+};</div><div class='add'>+#define NETDEV_BOOT_SETUP_MAX 8</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/******************************************************************************</div><div class='add'>+ *</div><div class='add'>+ *		      Device Boot-time Settings Routines</div><div class='add'>+ *</div><div class='add'>+ ******************************************************************************/</div><div class='add'>+</div><div class='add'>+/* Boot time configuration table */</div><div class='add'>+static struct netdev_boot_setup dev_boot_setup[NETDEV_BOOT_SETUP_MAX];</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ *	netdev_boot_setup_add	- add new setup entry</div><div class='add'>+ *	@name: name of the device</div><div class='add'>+ *	@map: configured settings for the device</div><div class='add'>+ *</div><div class='add'>+ *	Adds new setup entry to the dev_boot_setup list.  The function</div><div class='add'>+ *	returns 0 on error and 1 on success.  This is a generic routine to</div><div class='add'>+ *	all netdevices.</div><div class='add'>+ */</div><div class='add'>+static int netdev_boot_setup_add(char *name, struct ifmap *map)</div><div class='add'>+{</div><div class='add'>+	struct netdev_boot_setup *s;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	s = dev_boot_setup;</div><div class='add'>+	for (i = 0; i &lt; NETDEV_BOOT_SETUP_MAX; i++) {</div><div class='add'>+		if (s[i].name[0] == '\0' || s[i].name[0] == ' ') {</div><div class='add'>+			strscpy_pad(s[i].name, name);</div><div class='add'>+			memcpy(&amp;s[i].map, map, sizeof(s[i].map));</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return i &gt;= NETDEV_BOOT_SETUP_MAX ? 0 : 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * netdev_boot_setup_check	- check boot time settings</div><div class='add'>+ * @dev: the netdevice</div><div class='add'>+ *</div><div class='add'>+ * Check boot time settings for the device.</div><div class='add'>+ * The found settings are set for the device to be used</div><div class='add'>+ * later in the device probing.</div><div class='add'>+ * Returns 0 if no settings found, 1 if they are.</div><div class='add'>+ */</div><div class='add'>+int netdev_boot_setup_check(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct netdev_boot_setup *s = dev_boot_setup;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; NETDEV_BOOT_SETUP_MAX; i++) {</div><div class='add'>+		if (s[i].name[0] != '\0' &amp;&amp; s[i].name[0] != ' ' &amp;&amp;</div><div class='add'>+		    !strcmp(dev-&gt;name, s[i].name)) {</div><div class='add'>+			dev-&gt;irq = s[i].map.irq;</div><div class='add'>+			dev-&gt;base_addr = s[i].map.base_addr;</div><div class='add'>+			dev-&gt;mem_start = s[i].map.mem_start;</div><div class='add'>+			dev-&gt;mem_end = s[i].map.mem_end;</div><div class='add'>+			return 1;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(netdev_boot_setup_check);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * netdev_boot_base	- get address from boot time settings</div><div class='add'>+ * @prefix: prefix for network device</div><div class='add'>+ * @unit: id for network device</div><div class='add'>+ *</div><div class='add'>+ * Check boot time settings for the base address of device.</div><div class='add'>+ * The found settings are set for the device to be used</div><div class='add'>+ * later in the device probing.</div><div class='add'>+ * Returns 0 if no settings found.</div><div class='add'>+ */</div><div class='add'>+static unsigned long netdev_boot_base(const char *prefix, int unit)</div><div class='add'>+{</div><div class='add'>+	const struct netdev_boot_setup *s = dev_boot_setup;</div><div class='add'>+	char name[IFNAMSIZ];</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	sprintf(name, "%s%d", prefix, unit);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * If device already registered then return base of 1</div><div class='add'>+	 * to indicate not to probe for this interface</div><div class='add'>+	 */</div><div class='add'>+	if (__dev_get_by_name(&amp;init_net, name))</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; NETDEV_BOOT_SETUP_MAX; i++)</div><div class='add'>+		if (!strcmp(name, s[i].name))</div><div class='add'>+			return s[i].map.base_addr;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Saves at boot time configured settings for any netdevice.</div><div class='add'>+ */</div><div class='add'>+static int __init netdev_boot_setup(char *str)</div><div class='add'>+{</div><div class='add'>+	int ints[5];</div><div class='add'>+	struct ifmap map;</div><div class='add'>+</div><div class='add'>+	str = get_options(str, ARRAY_SIZE(ints), ints);</div><div class='add'>+	if (!str || !*str)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Save settings */</div><div class='add'>+	memset(&amp;map, 0, sizeof(map));</div><div class='add'>+	if (ints[0] &gt; 0)</div><div class='add'>+		map.irq = ints[1];</div><div class='add'>+	if (ints[0] &gt; 1)</div><div class='add'>+		map.base_addr = ints[2];</div><div class='add'>+	if (ints[0] &gt; 2)</div><div class='add'>+		map.mem_start = ints[3];</div><div class='add'>+	if (ints[0] &gt; 3)</div><div class='add'>+		map.mem_end = ints[4];</div><div class='add'>+</div><div class='add'>+	/* Add new entry to the list */</div><div class='add'>+	return netdev_boot_setup_add(str, &amp;map);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+__setup("netdev=", netdev_boot_setup);</div><div class='add'>+</div><div class='add'>+static int __init ether_boot_setup(char *str)</div><div class='add'>+{</div><div class='add'>+	return netdev_boot_setup(str);</div><div class='add'>+}</div><div class='add'>+__setup("ether=", ether_boot_setup);</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> /* A unified ethernet device probe.  This is the easiest way to have every</div><div class='del'>-   ethernet adaptor have the name "eth[0123...]".</div><div class='del'>-   */</div><div class='add'>+ * ethernet adaptor have the name "eth[0123...]".</div><div class='add'>+ */</div><div class='ctx'> </div><div class='ctx'> struct devprobe2 {</div><div class='ctx'> 	struct net_device *(*probe)(int unit);</div><div class='hunk'>@@ -46,6 +183,7 @@ struct devprobe2 {</div><div class='ctx'> static int __init probe_list2(int unit, struct devprobe2 *p, int autoprobe)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev;</div><div class='add'>+</div><div class='ctx'> 	for (; p-&gt;probe; p++) {</div><div class='ctx'> 		if (autoprobe &amp;&amp; p-&gt;status)</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -58,14 +196,10 @@ static int __init probe_list2(int unit, struct devprobe2 *p, int autoprobe)</div><div class='ctx'> 	return -ENODEV;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * ISA probes that touch addresses &lt; 0x400 (including those that also</div><div class='add'>+/* ISA probes that touch addresses &lt; 0x400 (including those that also</div><div class='ctx'>  * look for EISA/PCI cards in addition to ISA cards).</div><div class='ctx'>  */</div><div class='ctx'> static struct devprobe2 isa_probes[] __initdata = {</div><div class='del'>-#if defined(CONFIG_HP100) &amp;&amp; defined(CONFIG_ISA)	/* ISA, EISA */</div><div class='del'>-	{hp100_probe, 0},</div><div class='del'>-#endif</div><div class='ctx'> #ifdef CONFIG_3C515</div><div class='ctx'> 	{tc515_probe, 0},</div><div class='ctx'> #endif</div><div class='hunk'>@@ -84,47 +218,13 @@ static struct devprobe2 isa_probes[] __initdata = {</div><div class='ctx'> #ifdef CONFIG_SMC9194</div><div class='ctx'> 	{smc_init, 0},</div><div class='ctx'> #endif</div><div class='del'>-#ifdef CONFIG_CS89x0</div><div class='del'>-#ifndef CONFIG_CS89x0_PLATFORM</div><div class='del'>- 	{cs89x0_probe, 0},</div><div class='del'>-#endif</div><div class='del'>-#endif</div><div class='del'>-#if defined(CONFIG_MVME16x_NET) || defined(CONFIG_BVME6000_NET)	/* Intel I82596 */</div><div class='del'>-	{i82596_probe, 0},</div><div class='del'>-#endif</div><div class='del'>-#ifdef CONFIG_NI65</div><div class='del'>-	{ni65_probe, 0},</div><div class='add'>+#ifdef CONFIG_CS89x0_ISA</div><div class='add'>+	{cs89x0_probe, 0},</div><div class='ctx'> #endif</div><div class='ctx'> 	{NULL, 0},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct devprobe2 m68k_probes[] __initdata = {</div><div class='del'>-#ifdef CONFIG_ATARILANCE	/* Lance-based Atari ethernet boards */</div><div class='del'>-	{atarilance_probe, 0},</div><div class='del'>-#endif</div><div class='del'>-#ifdef CONFIG_SUN3LANCE         /* sun3 onboard Lance chip */</div><div class='del'>-	{sun3lance_probe, 0},</div><div class='del'>-#endif</div><div class='del'>-#ifdef CONFIG_SUN3_82586        /* sun3 onboard Intel 82586 chip */</div><div class='del'>-	{sun3_82586_probe, 0},</div><div class='del'>-#endif</div><div class='del'>-#ifdef CONFIG_APNE		/* A1200 PCMCIA NE2000 */</div><div class='del'>-	{apne_probe, 0},</div><div class='del'>-#endif</div><div class='del'>-#ifdef CONFIG_MVME147_NET	/* MVME147 internal Ethernet */</div><div class='del'>-	{mvme147lance_probe, 0},</div><div class='del'>-#endif</div><div class='del'>-#ifdef CONFIG_MAC8390           /* NuBus NS8390-based cards */</div><div class='del'>-	{mac8390_probe, 0},</div><div class='del'>-#endif</div><div class='del'>-#ifdef CONFIG_MAC89x0</div><div class='del'>- 	{mac89x0_probe, 0},</div><div class='del'>-#endif</div><div class='del'>-	{NULL, 0},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Unified ethernet device probe, segmented per architecture and</div><div class='add'>+/* Unified ethernet device probe, segmented per architecture and</div><div class='ctx'>  * per bus interface. This drives the legacy devices only for now.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='hunk'>@@ -135,8 +235,7 @@ static void __init ethif_probe2(int unit)</div><div class='ctx'> 	if (base_addr == 1)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	(void)(	probe_list2(unit, m68k_probes, base_addr == 0) &amp;&amp;</div><div class='del'>-		probe_list2(unit, isa_probes, base_addr == 0));</div><div class='add'>+	probe_list2(unit, isa_probes, base_addr == 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*  Statically configured drivers -- order matters here. */</div><div class='hunk'>@@ -144,22 +243,9 @@ static int __init net_olddevs_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int num;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SBNI</div><div class='del'>-	for (num = 0; num &lt; 8; ++num)</div><div class='del'>-		sbni_probe(num);</div><div class='del'>-#endif</div><div class='ctx'> 	for (num = 0; num &lt; 8; ++num)</div><div class='ctx'> 		ethif_probe2(num);</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_COPS</div><div class='del'>-	cops_probe(0);</div><div class='del'>-	cops_probe(1);</div><div class='del'>-	cops_probe(2);</div><div class='del'>-#endif</div><div class='del'>-#ifdef CONFIG_LTPC</div><div class='del'>-	ltpc_probe();</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/amt.c b/drivers/net/amt.c<br/>new file mode 100644<br/>index 000000000000..902c817a0dea<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/amt.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/amt.c</a></div><div class='hunk'>@@ -0,0 +1,3452 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/* Copyright (c) 2021 Taehee Yoo &lt;ap420073@gmail.com&gt; */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/skbuff.h&gt;</div><div class='add'>+#include &lt;linux/udp.h&gt;</div><div class='add'>+#include &lt;linux/jhash.h&gt;</div><div class='add'>+#include &lt;linux/if_tunnel.h&gt;</div><div class='add'>+#include &lt;linux/net.h&gt;</div><div class='add'>+#include &lt;linux/igmp.h&gt;</div><div class='add'>+#include &lt;linux/workqueue.h&gt;</div><div class='add'>+#include &lt;net/flow.h&gt;</div><div class='add'>+#include &lt;net/pkt_sched.h&gt;</div><div class='add'>+#include &lt;net/net_namespace.h&gt;</div><div class='add'>+#include &lt;net/ip.h&gt;</div><div class='add'>+#include &lt;net/udp.h&gt;</div><div class='add'>+#include &lt;net/udp_tunnel.h&gt;</div><div class='add'>+#include &lt;net/icmp.h&gt;</div><div class='add'>+#include &lt;net/mld.h&gt;</div><div class='add'>+#include &lt;net/amt.h&gt;</div><div class='add'>+#include &lt;uapi/linux/amt.h&gt;</div><div class='add'>+#include &lt;linux/security.h&gt;</div><div class='add'>+#include &lt;net/gro_cells.h&gt;</div><div class='add'>+#include &lt;net/ipv6.h&gt;</div><div class='add'>+#include &lt;net/if_inet6.h&gt;</div><div class='add'>+#include &lt;net/ndisc.h&gt;</div><div class='add'>+#include &lt;net/addrconf.h&gt;</div><div class='add'>+#include &lt;net/ip6_route.h&gt;</div><div class='add'>+#include &lt;net/inet_common.h&gt;</div><div class='add'>+#include &lt;net/inet_dscp.h&gt;</div><div class='add'>+#include &lt;net/ip6_checksum.h&gt;</div><div class='add'>+</div><div class='add'>+static struct workqueue_struct *amt_wq;</div><div class='add'>+</div><div class='add'>+static HLIST_HEAD(source_gc_list);</div><div class='add'>+/* Lock for source_gc_list */</div><div class='add'>+static spinlock_t source_gc_lock;</div><div class='add'>+static struct delayed_work source_gc_wq;</div><div class='add'>+static char *status_str[] = {</div><div class='add'>+	"AMT_STATUS_INIT",</div><div class='add'>+	"AMT_STATUS_SENT_DISCOVERY",</div><div class='add'>+	"AMT_STATUS_RECEIVED_DISCOVERY",</div><div class='add'>+	"AMT_STATUS_SENT_ADVERTISEMENT",</div><div class='add'>+	"AMT_STATUS_RECEIVED_ADVERTISEMENT",</div><div class='add'>+	"AMT_STATUS_SENT_REQUEST",</div><div class='add'>+	"AMT_STATUS_RECEIVED_REQUEST",</div><div class='add'>+	"AMT_STATUS_SENT_QUERY",</div><div class='add'>+	"AMT_STATUS_RECEIVED_QUERY",</div><div class='add'>+	"AMT_STATUS_SENT_UPDATE",</div><div class='add'>+	"AMT_STATUS_RECEIVED_UPDATE",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static char *type_str[] = {</div><div class='add'>+	"", /* Type 0 is not defined */</div><div class='add'>+	"AMT_MSG_DISCOVERY",</div><div class='add'>+	"AMT_MSG_ADVERTISEMENT",</div><div class='add'>+	"AMT_MSG_REQUEST",</div><div class='add'>+	"AMT_MSG_MEMBERSHIP_QUERY",</div><div class='add'>+	"AMT_MSG_MEMBERSHIP_UPDATE",</div><div class='add'>+	"AMT_MSG_MULTICAST_DATA",</div><div class='add'>+	"AMT_MSG_TEARDOWN",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static char *action_str[] = {</div><div class='add'>+	"AMT_ACT_GMI",</div><div class='add'>+	"AMT_ACT_GMI_ZERO",</div><div class='add'>+	"AMT_ACT_GT",</div><div class='add'>+	"AMT_ACT_STATUS_FWD_NEW",</div><div class='add'>+	"AMT_ACT_STATUS_D_FWD_NEW",</div><div class='add'>+	"AMT_ACT_STATUS_NONE_NEW",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct igmpv3_grec igmpv3_zero_grec;</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+#define MLD2_ALL_NODE_INIT { { { 0xff, 0x02, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x01 } } }</div><div class='add'>+static struct in6_addr mld2_all_node = MLD2_ALL_NODE_INIT;</div><div class='add'>+static struct mld2_grec mldv2_zero_grec;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static struct amt_skb_cb *amt_skb_cb(struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	BUILD_BUG_ON(sizeof(struct amt_skb_cb) + sizeof(struct tc_skb_cb) &gt;</div><div class='add'>+		     sizeof_field(struct sk_buff, cb));</div><div class='add'>+</div><div class='add'>+	return (struct amt_skb_cb *)((void *)skb-&gt;cb +</div><div class='add'>+		sizeof(struct tc_skb_cb));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __amt_source_gc_work(void)</div><div class='add'>+{</div><div class='add'>+	struct amt_source_node *snode;</div><div class='add'>+	struct hlist_head gc_list;</div><div class='add'>+	struct hlist_node *t;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;source_gc_lock);</div><div class='add'>+	hlist_move_list(&amp;source_gc_list, &amp;gc_list);</div><div class='add'>+	spin_unlock_bh(&amp;source_gc_lock);</div><div class='add'>+</div><div class='add'>+	hlist_for_each_entry_safe(snode, t, &amp;gc_list, node) {</div><div class='add'>+		hlist_del_rcu(&amp;snode-&gt;node);</div><div class='add'>+		kfree_rcu(snode, rcu);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amt_source_gc_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	__amt_source_gc_work();</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;source_gc_lock);</div><div class='add'>+	mod_delayed_work(amt_wq, &amp;source_gc_wq,</div><div class='add'>+			 msecs_to_jiffies(AMT_GC_INTERVAL));</div><div class='add'>+	spin_unlock_bh(&amp;source_gc_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool amt_addr_equal(union amt_addr *a, union amt_addr *b)</div><div class='add'>+{</div><div class='add'>+	return !memcmp(a, b, sizeof(union amt_addr));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 amt_source_hash(struct amt_tunnel_list *tunnel, union amt_addr *src)</div><div class='add'>+{</div><div class='add'>+	u32 hash = jhash(src, sizeof(*src), tunnel-&gt;amt-&gt;hash_seed);</div><div class='add'>+</div><div class='add'>+	return reciprocal_scale(hash, tunnel-&gt;amt-&gt;hash_buckets);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool amt_status_filter(struct amt_source_node *snode,</div><div class='add'>+			      enum amt_filter filter)</div><div class='add'>+{</div><div class='add'>+	bool rc = false;</div><div class='add'>+</div><div class='add'>+	switch (filter) {</div><div class='add'>+	case AMT_FILTER_FWD:</div><div class='add'>+		if (snode-&gt;status == AMT_SOURCE_STATUS_FWD &amp;&amp;</div><div class='add'>+		    snode-&gt;flags == AMT_SOURCE_OLD)</div><div class='add'>+			rc = true;</div><div class='add'>+		break;</div><div class='add'>+	case AMT_FILTER_D_FWD:</div><div class='add'>+		if (snode-&gt;status == AMT_SOURCE_STATUS_D_FWD &amp;&amp;</div><div class='add'>+		    snode-&gt;flags == AMT_SOURCE_OLD)</div><div class='add'>+			rc = true;</div><div class='add'>+		break;</div><div class='add'>+	case AMT_FILTER_FWD_NEW:</div><div class='add'>+		if (snode-&gt;status == AMT_SOURCE_STATUS_FWD &amp;&amp;</div><div class='add'>+		    snode-&gt;flags == AMT_SOURCE_NEW)</div><div class='add'>+			rc = true;</div><div class='add'>+		break;</div><div class='add'>+	case AMT_FILTER_D_FWD_NEW:</div><div class='add'>+		if (snode-&gt;status == AMT_SOURCE_STATUS_D_FWD &amp;&amp;</div><div class='add'>+		    snode-&gt;flags == AMT_SOURCE_NEW)</div><div class='add'>+			rc = true;</div><div class='add'>+		break;</div><div class='add'>+	case AMT_FILTER_ALL:</div><div class='add'>+		rc = true;</div><div class='add'>+		break;</div><div class='add'>+	case AMT_FILTER_NONE_NEW:</div><div class='add'>+		if (snode-&gt;status == AMT_SOURCE_STATUS_NONE &amp;&amp;</div><div class='add'>+		    snode-&gt;flags == AMT_SOURCE_NEW)</div><div class='add'>+			rc = true;</div><div class='add'>+		break;</div><div class='add'>+	case AMT_FILTER_BOTH:</div><div class='add'>+		if ((snode-&gt;status == AMT_SOURCE_STATUS_D_FWD ||</div><div class='add'>+		     snode-&gt;status == AMT_SOURCE_STATUS_FWD) &amp;&amp;</div><div class='add'>+		    snode-&gt;flags == AMT_SOURCE_OLD)</div><div class='add'>+			rc = true;</div><div class='add'>+		break;</div><div class='add'>+	case AMT_FILTER_BOTH_NEW:</div><div class='add'>+		if ((snode-&gt;status == AMT_SOURCE_STATUS_D_FWD ||</div><div class='add'>+		     snode-&gt;status == AMT_SOURCE_STATUS_FWD) &amp;&amp;</div><div class='add'>+		    snode-&gt;flags == AMT_SOURCE_NEW)</div><div class='add'>+			rc = true;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		WARN_ON_ONCE(1);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct amt_source_node *amt_lookup_src(struct amt_tunnel_list *tunnel,</div><div class='add'>+					      struct amt_group_node *gnode,</div><div class='add'>+					      enum amt_filter filter,</div><div class='add'>+					      union amt_addr *src)</div><div class='add'>+{</div><div class='add'>+	u32 hash = amt_source_hash(tunnel, src);</div><div class='add'>+	struct amt_source_node *snode;</div><div class='add'>+</div><div class='add'>+	hlist_for_each_entry_rcu(snode, &amp;gnode-&gt;sources[hash], node)</div><div class='add'>+		if (amt_status_filter(snode, filter) &amp;&amp;</div><div class='add'>+		    amt_addr_equal(&amp;snode-&gt;source_addr, src))</div><div class='add'>+			return snode;</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 amt_group_hash(struct amt_tunnel_list *tunnel, union amt_addr *group)</div><div class='add'>+{</div><div class='add'>+	u32 hash = jhash(group, sizeof(*group), tunnel-&gt;amt-&gt;hash_seed);</div><div class='add'>+</div><div class='add'>+	return reciprocal_scale(hash, tunnel-&gt;amt-&gt;hash_buckets);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct amt_group_node *amt_lookup_group(struct amt_tunnel_list *tunnel,</div><div class='add'>+					       union amt_addr *group,</div><div class='add'>+					       union amt_addr *host,</div><div class='add'>+					       bool v6)</div><div class='add'>+{</div><div class='add'>+	u32 hash = amt_group_hash(tunnel, group);</div><div class='add'>+	struct amt_group_node *gnode;</div><div class='add'>+</div><div class='add'>+	hlist_for_each_entry_rcu(gnode, &amp;tunnel-&gt;groups[hash], node) {</div><div class='add'>+		if (amt_addr_equal(&amp;gnode-&gt;group_addr, group) &amp;&amp;</div><div class='add'>+		    amt_addr_equal(&amp;gnode-&gt;host_addr, host) &amp;&amp;</div><div class='add'>+		    gnode-&gt;v6 == v6)</div><div class='add'>+			return gnode;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amt_destroy_source(struct amt_source_node *snode)</div><div class='add'>+{</div><div class='add'>+	struct amt_group_node *gnode = snode-&gt;gnode;</div><div class='add'>+	struct amt_tunnel_list *tunnel;</div><div class='add'>+</div><div class='add'>+	tunnel = gnode-&gt;tunnel_list;</div><div class='add'>+</div><div class='add'>+	if (!gnode-&gt;v6) {</div><div class='add'>+		netdev_dbg(snode-&gt;gnode-&gt;amt-&gt;dev,</div><div class='add'>+			   "Delete source %pI4 from %pI4\n",</div><div class='add'>+			   &amp;snode-&gt;source_addr.ip4,</div><div class='add'>+			   &amp;gnode-&gt;group_addr.ip4);</div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+	} else {</div><div class='add'>+		netdev_dbg(snode-&gt;gnode-&gt;amt-&gt;dev,</div><div class='add'>+			   "Delete source %pI6 from %pI6\n",</div><div class='add'>+			   &amp;snode-&gt;source_addr.ip6,</div><div class='add'>+			   &amp;gnode-&gt;group_addr.ip6);</div><div class='add'>+#endif</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cancel_delayed_work(&amp;snode-&gt;source_timer);</div><div class='add'>+	hlist_del_init_rcu(&amp;snode-&gt;node);</div><div class='add'>+	tunnel-&gt;nr_sources--;</div><div class='add'>+	gnode-&gt;nr_sources--;</div><div class='add'>+	spin_lock_bh(&amp;source_gc_lock);</div><div class='add'>+	hlist_add_head_rcu(&amp;snode-&gt;node, &amp;source_gc_list);</div><div class='add'>+	spin_unlock_bh(&amp;source_gc_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amt_del_group(struct amt_dev *amt, struct amt_group_node *gnode)</div><div class='add'>+{</div><div class='add'>+	struct amt_source_node *snode;</div><div class='add'>+	struct hlist_node *t;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (cancel_delayed_work(&amp;gnode-&gt;group_timer))</div><div class='add'>+		dev_put(amt-&gt;dev);</div><div class='add'>+	hlist_del_rcu(&amp;gnode-&gt;node);</div><div class='add'>+	gnode-&gt;tunnel_list-&gt;nr_groups--;</div><div class='add'>+</div><div class='add'>+	if (!gnode-&gt;v6)</div><div class='add'>+		netdev_dbg(amt-&gt;dev, "Leave group %pI4\n",</div><div class='add'>+			   &amp;gnode-&gt;group_addr.ip4);</div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+	else</div><div class='add'>+		netdev_dbg(amt-&gt;dev, "Leave group %pI6\n",</div><div class='add'>+			   &amp;gnode-&gt;group_addr.ip6);</div><div class='add'>+#endif</div><div class='add'>+	for (i = 0; i &lt; amt-&gt;hash_buckets; i++)</div><div class='add'>+		hlist_for_each_entry_safe(snode, t, &amp;gnode-&gt;sources[i], node)</div><div class='add'>+			amt_destroy_source(snode);</div><div class='add'>+</div><div class='add'>+	/* tunnel-&gt;lock was acquired outside of amt_del_group()</div><div class='add'>+	 * But rcu_read_lock() was acquired too so It's safe.</div><div class='add'>+	 */</div><div class='add'>+	kfree_rcu(gnode, rcu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* If a source timer expires with a router filter-mode for the group of</div><div class='add'>+ * INCLUDE, the router concludes that traffic from this particular</div><div class='add'>+ * source is no longer desired on the attached network, and deletes the</div><div class='add'>+ * associated source record.</div><div class='add'>+ */</div><div class='add'>+static void amt_source_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct amt_source_node *snode = container_of(to_delayed_work(work),</div><div class='add'>+						     struct amt_source_node,</div><div class='add'>+						     source_timer);</div><div class='add'>+	struct amt_group_node *gnode = snode-&gt;gnode;</div><div class='add'>+	struct amt_dev *amt = gnode-&gt;amt;</div><div class='add'>+	struct amt_tunnel_list *tunnel;</div><div class='add'>+</div><div class='add'>+	tunnel = gnode-&gt;tunnel_list;</div><div class='add'>+	spin_lock_bh(&amp;tunnel-&gt;lock);</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	if (gnode-&gt;filter_mode == MCAST_INCLUDE) {</div><div class='add'>+		amt_destroy_source(snode);</div><div class='add'>+		if (!gnode-&gt;nr_sources)</div><div class='add'>+			amt_del_group(amt, gnode);</div><div class='add'>+	} else {</div><div class='add'>+		/* When a router filter-mode for a group is EXCLUDE,</div><div class='add'>+		 * source records are only deleted when the group timer expires</div><div class='add'>+		 */</div><div class='add'>+		snode-&gt;status = AMT_SOURCE_STATUS_D_FWD;</div><div class='add'>+	}</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+	spin_unlock_bh(&amp;tunnel-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amt_act_src(struct amt_tunnel_list *tunnel,</div><div class='add'>+			struct amt_group_node *gnode,</div><div class='add'>+			struct amt_source_node *snode,</div><div class='add'>+			enum amt_act act)</div><div class='add'>+{</div><div class='add'>+	struct amt_dev *amt = tunnel-&gt;amt;</div><div class='add'>+</div><div class='add'>+	switch (act) {</div><div class='add'>+	case AMT_ACT_GMI:</div><div class='add'>+		mod_delayed_work(amt_wq, &amp;snode-&gt;source_timer,</div><div class='add'>+				 msecs_to_jiffies(amt_gmi(amt)));</div><div class='add'>+		break;</div><div class='add'>+	case AMT_ACT_GMI_ZERO:</div><div class='add'>+		cancel_delayed_work(&amp;snode-&gt;source_timer);</div><div class='add'>+		break;</div><div class='add'>+	case AMT_ACT_GT:</div><div class='add'>+		mod_delayed_work(amt_wq, &amp;snode-&gt;source_timer,</div><div class='add'>+				 gnode-&gt;group_timer.timer.expires);</div><div class='add'>+		break;</div><div class='add'>+	case AMT_ACT_STATUS_FWD_NEW:</div><div class='add'>+		snode-&gt;status = AMT_SOURCE_STATUS_FWD;</div><div class='add'>+		snode-&gt;flags = AMT_SOURCE_NEW;</div><div class='add'>+		break;</div><div class='add'>+	case AMT_ACT_STATUS_D_FWD_NEW:</div><div class='add'>+		snode-&gt;status = AMT_SOURCE_STATUS_D_FWD;</div><div class='add'>+		snode-&gt;flags = AMT_SOURCE_NEW;</div><div class='add'>+		break;</div><div class='add'>+	case AMT_ACT_STATUS_NONE_NEW:</div><div class='add'>+		cancel_delayed_work(&amp;snode-&gt;source_timer);</div><div class='add'>+		snode-&gt;status = AMT_SOURCE_STATUS_NONE;</div><div class='add'>+		snode-&gt;flags = AMT_SOURCE_NEW;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		WARN_ON_ONCE(1);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!gnode-&gt;v6)</div><div class='add'>+		netdev_dbg(amt-&gt;dev, "Source %pI4 from %pI4 Acted %s\n",</div><div class='add'>+			   &amp;snode-&gt;source_addr.ip4,</div><div class='add'>+			   &amp;gnode-&gt;group_addr.ip4,</div><div class='add'>+			   action_str[act]);</div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+	else</div><div class='add'>+		netdev_dbg(amt-&gt;dev, "Source %pI6 from %pI6 Acted %s\n",</div><div class='add'>+			   &amp;snode-&gt;source_addr.ip6,</div><div class='add'>+			   &amp;gnode-&gt;group_addr.ip6,</div><div class='add'>+			   action_str[act]);</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct amt_source_node *amt_alloc_snode(struct amt_group_node *gnode,</div><div class='add'>+					       union amt_addr *src)</div><div class='add'>+{</div><div class='add'>+	struct amt_source_node *snode;</div><div class='add'>+</div><div class='add'>+	snode = kzalloc(sizeof(*snode), GFP_ATOMIC);</div><div class='add'>+	if (!snode)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;snode-&gt;source_addr, src, sizeof(union amt_addr));</div><div class='add'>+	snode-&gt;gnode = gnode;</div><div class='add'>+	snode-&gt;status = AMT_SOURCE_STATUS_NONE;</div><div class='add'>+	snode-&gt;flags = AMT_SOURCE_NEW;</div><div class='add'>+	INIT_HLIST_NODE(&amp;snode-&gt;node);</div><div class='add'>+	INIT_DELAYED_WORK(&amp;snode-&gt;source_timer, amt_source_work);</div><div class='add'>+</div><div class='add'>+	return snode;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* RFC 3810 - 7.2.2.  Definition of Filter Timers</div><div class='add'>+ *</div><div class='add'>+ *  Router Mode          Filter Timer         Actions/Comments</div><div class='add'>+ *  -----------       -----------------       ----------------</div><div class='add'>+ *</div><div class='add'>+ *    INCLUDE             Not Used            All listeners in</div><div class='add'>+ *                                            INCLUDE mode.</div><div class='add'>+ *</div><div class='add'>+ *    EXCLUDE             Timer &gt; 0           At least one listener</div><div class='add'>+ *                                            in EXCLUDE mode.</div><div class='add'>+ *</div><div class='add'>+ *    EXCLUDE             Timer == 0          No more listeners in</div><div class='add'>+ *                                            EXCLUDE mode for the</div><div class='add'>+ *                                            multicast address.</div><div class='add'>+ *                                            If the Requested List</div><div class='add'>+ *                                            is empty, delete</div><div class='add'>+ *                                            Multicast Address</div><div class='add'>+ *                                            Record.  If not, switch</div><div class='add'>+ *                                            to INCLUDE filter mode;</div><div class='add'>+ *                                            the sources in the</div><div class='add'>+ *                                            Requested List are</div><div class='add'>+ *                                            moved to the Include</div><div class='add'>+ *                                            List, and the Exclude</div><div class='add'>+ *                                            List is deleted.</div><div class='add'>+ */</div><div class='add'>+static void amt_group_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct amt_group_node *gnode = container_of(to_delayed_work(work),</div><div class='add'>+						    struct amt_group_node,</div><div class='add'>+						    group_timer);</div><div class='add'>+	struct amt_tunnel_list *tunnel = gnode-&gt;tunnel_list;</div><div class='add'>+	struct amt_dev *amt = gnode-&gt;amt;</div><div class='add'>+	struct amt_source_node *snode;</div><div class='add'>+	bool delete_group = true;</div><div class='add'>+	struct hlist_node *t;</div><div class='add'>+	int i, buckets;</div><div class='add'>+</div><div class='add'>+	buckets = amt-&gt;hash_buckets;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;tunnel-&gt;lock);</div><div class='add'>+	if (gnode-&gt;filter_mode == MCAST_INCLUDE) {</div><div class='add'>+		/* Not Used */</div><div class='add'>+		spin_unlock_bh(&amp;tunnel-&gt;lock);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	for (i = 0; i &lt; buckets; i++) {</div><div class='add'>+		hlist_for_each_entry_safe(snode, t,</div><div class='add'>+					  &amp;gnode-&gt;sources[i], node) {</div><div class='add'>+			if (!delayed_work_pending(&amp;snode-&gt;source_timer) ||</div><div class='add'>+			    snode-&gt;status == AMT_SOURCE_STATUS_D_FWD) {</div><div class='add'>+				amt_destroy_source(snode);</div><div class='add'>+			} else {</div><div class='add'>+				delete_group = false;</div><div class='add'>+				snode-&gt;status = AMT_SOURCE_STATUS_FWD;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	if (delete_group)</div><div class='add'>+		amt_del_group(amt, gnode);</div><div class='add'>+	else</div><div class='add'>+		gnode-&gt;filter_mode = MCAST_INCLUDE;</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+	spin_unlock_bh(&amp;tunnel-&gt;lock);</div><div class='add'>+out:</div><div class='add'>+	dev_put(amt-&gt;dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Non-existent group is created as INCLUDE {empty}:</div><div class='add'>+ *</div><div class='add'>+ * RFC 3376 - 5.1. Action on Change of Interface State</div><div class='add'>+ *</div><div class='add'>+ * If no interface state existed for that multicast address before</div><div class='add'>+ * the change (i.e., the change consisted of creating a new</div><div class='add'>+ * per-interface record), or if no state exists after the change</div><div class='add'>+ * (i.e., the change consisted of deleting a per-interface record),</div><div class='add'>+ * then the "non-existent" state is considered to have a filter mode</div><div class='add'>+ * of INCLUDE and an empty source list.</div><div class='add'>+ */</div><div class='add'>+static struct amt_group_node *amt_add_group(struct amt_dev *amt,</div><div class='add'>+					    struct amt_tunnel_list *tunnel,</div><div class='add'>+					    union amt_addr *group,</div><div class='add'>+					    union amt_addr *host,</div><div class='add'>+					    bool v6)</div><div class='add'>+{</div><div class='add'>+	struct amt_group_node *gnode;</div><div class='add'>+	u32 hash;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (tunnel-&gt;nr_groups &gt;= amt-&gt;max_groups)</div><div class='add'>+		return ERR_PTR(-ENOSPC);</div><div class='add'>+</div><div class='add'>+	gnode = kzalloc(sizeof(*gnode) +</div><div class='add'>+			(sizeof(struct hlist_head) * amt-&gt;hash_buckets),</div><div class='add'>+			GFP_ATOMIC);</div><div class='add'>+	if (unlikely(!gnode))</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	gnode-&gt;amt = amt;</div><div class='add'>+	gnode-&gt;group_addr = *group;</div><div class='add'>+	gnode-&gt;host_addr = *host;</div><div class='add'>+	gnode-&gt;v6 = v6;</div><div class='add'>+	gnode-&gt;tunnel_list = tunnel;</div><div class='add'>+	gnode-&gt;filter_mode = MCAST_INCLUDE;</div><div class='add'>+	INIT_HLIST_NODE(&amp;gnode-&gt;node);</div><div class='add'>+	INIT_DELAYED_WORK(&amp;gnode-&gt;group_timer, amt_group_work);</div><div class='add'>+	for (i = 0; i &lt; amt-&gt;hash_buckets; i++)</div><div class='add'>+		INIT_HLIST_HEAD(&amp;gnode-&gt;sources[i]);</div><div class='add'>+</div><div class='add'>+	hash = amt_group_hash(tunnel, group);</div><div class='add'>+	hlist_add_head_rcu(&amp;gnode-&gt;node, &amp;tunnel-&gt;groups[hash]);</div><div class='add'>+	tunnel-&gt;nr_groups++;</div><div class='add'>+</div><div class='add'>+	if (!gnode-&gt;v6)</div><div class='add'>+		netdev_dbg(amt-&gt;dev, "Join group %pI4\n",</div><div class='add'>+			   &amp;gnode-&gt;group_addr.ip4);</div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+	else</div><div class='add'>+		netdev_dbg(amt-&gt;dev, "Join group %pI6\n",</div><div class='add'>+			   &amp;gnode-&gt;group_addr.ip6);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	return gnode;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct sk_buff *amt_build_igmp_gq(struct amt_dev *amt)</div><div class='add'>+{</div><div class='add'>+	u8 ra[AMT_IPHDR_OPTS] = { IPOPT_RA, 4, 0, 0 };</div><div class='add'>+	int hlen = LL_RESERVED_SPACE(amt-&gt;dev);</div><div class='add'>+	int tlen = amt-&gt;dev-&gt;needed_tailroom;</div><div class='add'>+	struct igmpv3_query *ihv3;</div><div class='add'>+	void *csum_start = NULL;</div><div class='add'>+	__sum16 *csum = NULL;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct ethhdr *eth;</div><div class='add'>+	struct iphdr *iph;</div><div class='add'>+	unsigned int len;</div><div class='add'>+	int offset;</div><div class='add'>+</div><div class='add'>+	len = hlen + tlen + sizeof(*iph) + AMT_IPHDR_OPTS + sizeof(*ihv3);</div><div class='add'>+	skb = netdev_alloc_skb_ip_align(amt-&gt;dev, len);</div><div class='add'>+	if (!skb)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	skb_reserve(skb, hlen);</div><div class='add'>+	skb_push(skb, sizeof(*eth));</div><div class='add'>+	skb-&gt;protocol = htons(ETH_P_IP);</div><div class='add'>+	skb_reset_mac_header(skb);</div><div class='add'>+	skb-&gt;priority = TC_PRIO_CONTROL;</div><div class='add'>+	skb_put(skb, sizeof(*iph));</div><div class='add'>+	skb_put_data(skb, ra, sizeof(ra));</div><div class='add'>+	skb_put(skb, sizeof(*ihv3));</div><div class='add'>+	skb_pull(skb, sizeof(*eth));</div><div class='add'>+	skb_reset_network_header(skb);</div><div class='add'>+</div><div class='add'>+	iph		= ip_hdr(skb);</div><div class='add'>+	iph-&gt;version	= 4;</div><div class='add'>+	iph-&gt;ihl	= (sizeof(struct iphdr) + AMT_IPHDR_OPTS) &gt;&gt; 2;</div><div class='add'>+	iph-&gt;tos	= AMT_TOS;</div><div class='add'>+	iph-&gt;tot_len	= htons(sizeof(*iph) + AMT_IPHDR_OPTS + sizeof(*ihv3));</div><div class='add'>+	iph-&gt;frag_off	= htons(IP_DF);</div><div class='add'>+	iph-&gt;ttl	= 1;</div><div class='add'>+	iph-&gt;id		= 0;</div><div class='add'>+	iph-&gt;protocol	= IPPROTO_IGMP;</div><div class='add'>+	iph-&gt;daddr	= htonl(INADDR_ALLHOSTS_GROUP);</div><div class='add'>+	iph-&gt;saddr	= htonl(INADDR_ANY);</div><div class='add'>+	ip_send_check(iph);</div><div class='add'>+</div><div class='add'>+	eth = eth_hdr(skb);</div><div class='add'>+	ether_addr_copy(eth-&gt;h_source, amt-&gt;dev-&gt;dev_addr);</div><div class='add'>+	ip_eth_mc_map(htonl(INADDR_ALLHOSTS_GROUP), eth-&gt;h_dest);</div><div class='add'>+	eth-&gt;h_proto = htons(ETH_P_IP);</div><div class='add'>+</div><div class='add'>+	ihv3		= skb_pull(skb, sizeof(*iph) + AMT_IPHDR_OPTS);</div><div class='add'>+	skb_reset_transport_header(skb);</div><div class='add'>+	ihv3-&gt;type	= IGMP_HOST_MEMBERSHIP_QUERY;</div><div class='add'>+	ihv3-&gt;code	= 1;</div><div class='add'>+	ihv3-&gt;group	= 0;</div><div class='add'>+	ihv3-&gt;qqic	= amt-&gt;qi;</div><div class='add'>+	ihv3-&gt;nsrcs	= 0;</div><div class='add'>+	ihv3-&gt;resv	= 0;</div><div class='add'>+	ihv3-&gt;suppress	= false;</div><div class='add'>+	ihv3-&gt;qrv	= READ_ONCE(amt-&gt;net-&gt;ipv4.sysctl_igmp_qrv);</div><div class='add'>+	ihv3-&gt;csum	= 0;</div><div class='add'>+	csum		= &amp;ihv3-&gt;csum;</div><div class='add'>+	csum_start	= (void *)ihv3;</div><div class='add'>+	*csum		= ip_compute_csum(csum_start, sizeof(*ihv3));</div><div class='add'>+	offset		= skb_transport_offset(skb);</div><div class='add'>+	skb-&gt;csum	= skb_checksum(skb, offset, skb-&gt;len - offset, 0);</div><div class='add'>+	skb-&gt;ip_summed	= CHECKSUM_NONE;</div><div class='add'>+</div><div class='add'>+	skb_push(skb, sizeof(*eth) + sizeof(*iph) + AMT_IPHDR_OPTS);</div><div class='add'>+</div><div class='add'>+	return skb;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amt_update_gw_status(struct amt_dev *amt, enum amt_status status,</div><div class='add'>+				 bool validate)</div><div class='add'>+{</div><div class='add'>+	if (validate &amp;&amp; amt-&gt;status &gt;= status)</div><div class='add'>+		return;</div><div class='add'>+	netdev_dbg(amt-&gt;dev, "Update GW status %s -&gt; %s",</div><div class='add'>+		   status_str[amt-&gt;status], status_str[status]);</div><div class='add'>+	WRITE_ONCE(amt-&gt;status, status);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __amt_update_relay_status(struct amt_tunnel_list *tunnel,</div><div class='add'>+				      enum amt_status status,</div><div class='add'>+				      bool validate)</div><div class='add'>+{</div><div class='add'>+	if (validate &amp;&amp; tunnel-&gt;status &gt;= status)</div><div class='add'>+		return;</div><div class='add'>+	netdev_dbg(tunnel-&gt;amt-&gt;dev,</div><div class='add'>+		   "Update Tunnel(IP = %pI4, PORT = %u) status %s -&gt; %s",</div><div class='add'>+		   &amp;tunnel-&gt;ip4, ntohs(tunnel-&gt;source_port),</div><div class='add'>+		   status_str[tunnel-&gt;status], status_str[status]);</div><div class='add'>+	tunnel-&gt;status = status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amt_update_relay_status(struct amt_tunnel_list *tunnel,</div><div class='add'>+				    enum amt_status status, bool validate)</div><div class='add'>+{</div><div class='add'>+	spin_lock_bh(&amp;tunnel-&gt;lock);</div><div class='add'>+	__amt_update_relay_status(tunnel, status, validate);</div><div class='add'>+	spin_unlock_bh(&amp;tunnel-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amt_send_discovery(struct amt_dev *amt)</div><div class='add'>+{</div><div class='add'>+	struct amt_header_discovery *amtd;</div><div class='add'>+	int hlen, tlen, offset;</div><div class='add'>+	struct socket *sock;</div><div class='add'>+	struct udphdr *udph;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct iphdr *iph;</div><div class='add'>+	struct rtable *rt;</div><div class='add'>+	struct flowi4 fl4;</div><div class='add'>+	u32 len;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	sock = rcu_dereference(amt-&gt;sock);</div><div class='add'>+	if (!sock)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (!netif_running(amt-&gt;stream_dev) || !netif_running(amt-&gt;dev))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	rt = ip_route_output_ports(amt-&gt;net, &amp;fl4, sock-&gt;sk,</div><div class='add'>+				   amt-&gt;discovery_ip, amt-&gt;local_ip,</div><div class='add'>+				   amt-&gt;gw_port, amt-&gt;relay_port,</div><div class='add'>+				   IPPROTO_UDP, 0,</div><div class='add'>+				   amt-&gt;stream_dev-&gt;ifindex);</div><div class='add'>+	if (IS_ERR(rt)) {</div><div class='add'>+		amt-&gt;dev-&gt;stats.tx_errors++;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hlen = LL_RESERVED_SPACE(amt-&gt;dev);</div><div class='add'>+	tlen = amt-&gt;dev-&gt;needed_tailroom;</div><div class='add'>+	len = hlen + tlen + sizeof(*iph) + sizeof(*udph) + sizeof(*amtd);</div><div class='add'>+	skb = netdev_alloc_skb_ip_align(amt-&gt;dev, len);</div><div class='add'>+	if (!skb) {</div><div class='add'>+		ip_rt_put(rt);</div><div class='add'>+		amt-&gt;dev-&gt;stats.tx_errors++;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb-&gt;priority = TC_PRIO_CONTROL;</div><div class='add'>+	skb_dst_set(skb, &amp;rt-&gt;dst);</div><div class='add'>+</div><div class='add'>+	len = sizeof(*iph) + sizeof(*udph) + sizeof(*amtd);</div><div class='add'>+	skb_reset_network_header(skb);</div><div class='add'>+	skb_put(skb, len);</div><div class='add'>+	amtd = skb_pull(skb, sizeof(*iph) + sizeof(*udph));</div><div class='add'>+	amtd-&gt;version	= 0;</div><div class='add'>+	amtd-&gt;type	= AMT_MSG_DISCOVERY;</div><div class='add'>+	amtd-&gt;reserved	= 0;</div><div class='add'>+	amtd-&gt;nonce	= amt-&gt;nonce;</div><div class='add'>+	skb_push(skb, sizeof(*udph));</div><div class='add'>+	skb_reset_transport_header(skb);</div><div class='add'>+	udph		= udp_hdr(skb);</div><div class='add'>+	udph-&gt;source	= amt-&gt;gw_port;</div><div class='add'>+	udph-&gt;dest	= amt-&gt;relay_port;</div><div class='add'>+	udph-&gt;len	= htons(sizeof(*udph) + sizeof(*amtd));</div><div class='add'>+	udph-&gt;check	= 0;</div><div class='add'>+	offset = skb_transport_offset(skb);</div><div class='add'>+	skb-&gt;csum = skb_checksum(skb, offset, skb-&gt;len - offset, 0);</div><div class='add'>+	udph-&gt;check = csum_tcpudp_magic(amt-&gt;local_ip, amt-&gt;discovery_ip,</div><div class='add'>+					sizeof(*udph) + sizeof(*amtd),</div><div class='add'>+					IPPROTO_UDP, skb-&gt;csum);</div><div class='add'>+</div><div class='add'>+	skb_push(skb, sizeof(*iph));</div><div class='add'>+	iph		= ip_hdr(skb);</div><div class='add'>+	iph-&gt;version	= 4;</div><div class='add'>+	iph-&gt;ihl	= (sizeof(struct iphdr)) &gt;&gt; 2;</div><div class='add'>+	iph-&gt;tos	= AMT_TOS;</div><div class='add'>+	iph-&gt;frag_off	= 0;</div><div class='add'>+	iph-&gt;ttl	= ip4_dst_hoplimit(&amp;rt-&gt;dst);</div><div class='add'>+	iph-&gt;daddr	= amt-&gt;discovery_ip;</div><div class='add'>+	iph-&gt;saddr	= amt-&gt;local_ip;</div><div class='add'>+	iph-&gt;protocol	= IPPROTO_UDP;</div><div class='add'>+	iph-&gt;tot_len	= htons(len);</div><div class='add'>+</div><div class='add'>+	skb-&gt;ip_summed = CHECKSUM_NONE;</div><div class='add'>+	ip_select_ident(amt-&gt;net, skb, NULL);</div><div class='add'>+	ip_send_check(iph);</div><div class='add'>+	err = ip_local_out(amt-&gt;net, sock-&gt;sk, skb);</div><div class='add'>+	if (unlikely(net_xmit_eval(err)))</div><div class='add'>+		amt-&gt;dev-&gt;stats.tx_errors++;</div><div class='add'>+</div><div class='add'>+	amt_update_gw_status(amt, AMT_STATUS_SENT_DISCOVERY, true);</div><div class='add'>+out:</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amt_send_request(struct amt_dev *amt, bool v6)</div><div class='add'>+{</div><div class='add'>+	struct amt_header_request *amtrh;</div><div class='add'>+	int hlen, tlen, offset;</div><div class='add'>+	struct socket *sock;</div><div class='add'>+	struct udphdr *udph;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct iphdr *iph;</div><div class='add'>+	struct rtable *rt;</div><div class='add'>+	struct flowi4 fl4;</div><div class='add'>+	u32 len;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	sock = rcu_dereference(amt-&gt;sock);</div><div class='add'>+	if (!sock)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (!netif_running(amt-&gt;stream_dev) || !netif_running(amt-&gt;dev))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	rt = ip_route_output_ports(amt-&gt;net, &amp;fl4, sock-&gt;sk,</div><div class='add'>+				   amt-&gt;remote_ip, amt-&gt;local_ip,</div><div class='add'>+				   amt-&gt;gw_port, amt-&gt;relay_port,</div><div class='add'>+				   IPPROTO_UDP, 0,</div><div class='add'>+				   amt-&gt;stream_dev-&gt;ifindex);</div><div class='add'>+	if (IS_ERR(rt)) {</div><div class='add'>+		amt-&gt;dev-&gt;stats.tx_errors++;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hlen = LL_RESERVED_SPACE(amt-&gt;dev);</div><div class='add'>+	tlen = amt-&gt;dev-&gt;needed_tailroom;</div><div class='add'>+	len = hlen + tlen + sizeof(*iph) + sizeof(*udph) + sizeof(*amtrh);</div><div class='add'>+	skb = netdev_alloc_skb_ip_align(amt-&gt;dev, len);</div><div class='add'>+	if (!skb) {</div><div class='add'>+		ip_rt_put(rt);</div><div class='add'>+		amt-&gt;dev-&gt;stats.tx_errors++;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb-&gt;priority = TC_PRIO_CONTROL;</div><div class='add'>+	skb_dst_set(skb, &amp;rt-&gt;dst);</div><div class='add'>+</div><div class='add'>+	len = sizeof(*iph) + sizeof(*udph) + sizeof(*amtrh);</div><div class='add'>+	skb_reset_network_header(skb);</div><div class='add'>+	skb_put(skb, len);</div><div class='add'>+	amtrh = skb_pull(skb, sizeof(*iph) + sizeof(*udph));</div><div class='add'>+	amtrh-&gt;version	 = 0;</div><div class='add'>+	amtrh-&gt;type	 = AMT_MSG_REQUEST;</div><div class='add'>+	amtrh-&gt;reserved1 = 0;</div><div class='add'>+	amtrh-&gt;p	 = v6;</div><div class='add'>+	amtrh-&gt;reserved2 = 0;</div><div class='add'>+	amtrh-&gt;nonce	 = amt-&gt;nonce;</div><div class='add'>+	skb_push(skb, sizeof(*udph));</div><div class='add'>+	skb_reset_transport_header(skb);</div><div class='add'>+	udph		= udp_hdr(skb);</div><div class='add'>+	udph-&gt;source	= amt-&gt;gw_port;</div><div class='add'>+	udph-&gt;dest	= amt-&gt;relay_port;</div><div class='add'>+	udph-&gt;len	= htons(sizeof(*amtrh) + sizeof(*udph));</div><div class='add'>+	udph-&gt;check	= 0;</div><div class='add'>+	offset = skb_transport_offset(skb);</div><div class='add'>+	skb-&gt;csum = skb_checksum(skb, offset, skb-&gt;len - offset, 0);</div><div class='add'>+	udph-&gt;check = csum_tcpudp_magic(amt-&gt;local_ip, amt-&gt;remote_ip,</div><div class='add'>+					sizeof(*udph) + sizeof(*amtrh),</div><div class='add'>+					IPPROTO_UDP, skb-&gt;csum);</div><div class='add'>+</div><div class='add'>+	skb_push(skb, sizeof(*iph));</div><div class='add'>+	iph		= ip_hdr(skb);</div><div class='add'>+	iph-&gt;version	= 4;</div><div class='add'>+	iph-&gt;ihl	= (sizeof(struct iphdr)) &gt;&gt; 2;</div><div class='add'>+	iph-&gt;tos	= AMT_TOS;</div><div class='add'>+	iph-&gt;frag_off	= 0;</div><div class='add'>+	iph-&gt;ttl	= ip4_dst_hoplimit(&amp;rt-&gt;dst);</div><div class='add'>+	iph-&gt;daddr	= amt-&gt;remote_ip;</div><div class='add'>+	iph-&gt;saddr	= amt-&gt;local_ip;</div><div class='add'>+	iph-&gt;protocol	= IPPROTO_UDP;</div><div class='add'>+	iph-&gt;tot_len	= htons(len);</div><div class='add'>+</div><div class='add'>+	skb-&gt;ip_summed = CHECKSUM_NONE;</div><div class='add'>+	ip_select_ident(amt-&gt;net, skb, NULL);</div><div class='add'>+	ip_send_check(iph);</div><div class='add'>+	err = ip_local_out(amt-&gt;net, sock-&gt;sk, skb);</div><div class='add'>+	if (unlikely(net_xmit_eval(err)))</div><div class='add'>+		amt-&gt;dev-&gt;stats.tx_errors++;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amt_send_igmp_gq(struct amt_dev *amt,</div><div class='add'>+			     struct amt_tunnel_list *tunnel)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	skb = amt_build_igmp_gq(amt);</div><div class='add'>+	if (!skb)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	amt_skb_cb(skb)-&gt;tunnel = tunnel;</div><div class='add'>+	dev_queue_xmit(skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+static struct sk_buff *amt_build_mld_gq(struct amt_dev *amt)</div><div class='add'>+{</div><div class='add'>+	u8 ra[AMT_IP6HDR_OPTS] = { IPPROTO_ICMPV6, 0, IPV6_TLV_ROUTERALERT,</div><div class='add'>+				   2, 0, 0, IPV6_TLV_PAD1, IPV6_TLV_PAD1 };</div><div class='add'>+	int hlen = LL_RESERVED_SPACE(amt-&gt;dev);</div><div class='add'>+	int tlen = amt-&gt;dev-&gt;needed_tailroom;</div><div class='add'>+	struct mld2_query *mld2q;</div><div class='add'>+	void *csum_start = NULL;</div><div class='add'>+	struct ipv6hdr *ip6h;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct ethhdr *eth;</div><div class='add'>+	u32 len;</div><div class='add'>+</div><div class='add'>+	len = hlen + tlen + sizeof(*ip6h) + sizeof(ra) + sizeof(*mld2q);</div><div class='add'>+	skb = netdev_alloc_skb_ip_align(amt-&gt;dev, len);</div><div class='add'>+	if (!skb)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	skb_reserve(skb, hlen);</div><div class='add'>+	skb_push(skb, sizeof(*eth));</div><div class='add'>+	skb_reset_mac_header(skb);</div><div class='add'>+	eth = eth_hdr(skb);</div><div class='add'>+	skb-&gt;priority = TC_PRIO_CONTROL;</div><div class='add'>+	skb-&gt;protocol = htons(ETH_P_IPV6);</div><div class='add'>+	skb_put_zero(skb, sizeof(*ip6h));</div><div class='add'>+	skb_put_data(skb, ra, sizeof(ra));</div><div class='add'>+	skb_put_zero(skb, sizeof(*mld2q));</div><div class='add'>+	skb_pull(skb, sizeof(*eth));</div><div class='add'>+	skb_reset_network_header(skb);</div><div class='add'>+	ip6h			= ipv6_hdr(skb);</div><div class='add'>+	ip6h-&gt;payload_len	= htons(sizeof(ra) + sizeof(*mld2q));</div><div class='add'>+	ip6h-&gt;nexthdr		= NEXTHDR_HOP;</div><div class='add'>+	ip6h-&gt;hop_limit		= 1;</div><div class='add'>+	ip6h-&gt;daddr		= mld2_all_node;</div><div class='add'>+	ip6_flow_hdr(ip6h, 0, 0);</div><div class='add'>+</div><div class='add'>+	if (ipv6_dev_get_saddr(amt-&gt;net, amt-&gt;dev, &amp;ip6h-&gt;daddr, 0,</div><div class='add'>+			       &amp;ip6h-&gt;saddr)) {</div><div class='add'>+		amt-&gt;dev-&gt;stats.tx_errors++;</div><div class='add'>+		kfree_skb(skb);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	eth-&gt;h_proto = htons(ETH_P_IPV6);</div><div class='add'>+	ether_addr_copy(eth-&gt;h_source, amt-&gt;dev-&gt;dev_addr);</div><div class='add'>+	ipv6_eth_mc_map(&amp;mld2_all_node, eth-&gt;h_dest);</div><div class='add'>+</div><div class='add'>+	skb_pull(skb, sizeof(*ip6h) + sizeof(ra));</div><div class='add'>+	skb_reset_transport_header(skb);</div><div class='add'>+	mld2q			= (struct mld2_query *)icmp6_hdr(skb);</div><div class='add'>+	mld2q-&gt;mld2q_mrc	= htons(1);</div><div class='add'>+	mld2q-&gt;mld2q_type	= ICMPV6_MGM_QUERY;</div><div class='add'>+	mld2q-&gt;mld2q_code	= 0;</div><div class='add'>+	mld2q-&gt;mld2q_cksum	= 0;</div><div class='add'>+	mld2q-&gt;mld2q_resv1	= 0;</div><div class='add'>+	mld2q-&gt;mld2q_resv2	= 0;</div><div class='add'>+	mld2q-&gt;mld2q_suppress	= 0;</div><div class='add'>+	mld2q-&gt;mld2q_qrv	= amt-&gt;qrv;</div><div class='add'>+	mld2q-&gt;mld2q_nsrcs	= 0;</div><div class='add'>+	mld2q-&gt;mld2q_qqic	= amt-&gt;qi;</div><div class='add'>+	csum_start		= (void *)mld2q;</div><div class='add'>+	mld2q-&gt;mld2q_cksum = csum_ipv6_magic(&amp;ip6h-&gt;saddr, &amp;ip6h-&gt;daddr,</div><div class='add'>+					     sizeof(*mld2q),</div><div class='add'>+					     IPPROTO_ICMPV6,</div><div class='add'>+					     csum_partial(csum_start,</div><div class='add'>+							  sizeof(*mld2q), 0));</div><div class='add'>+</div><div class='add'>+	skb-&gt;ip_summed = CHECKSUM_NONE;</div><div class='add'>+	skb_push(skb, sizeof(*eth) + sizeof(*ip6h) + sizeof(ra));</div><div class='add'>+	return skb;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amt_send_mld_gq(struct amt_dev *amt, struct amt_tunnel_list *tunnel)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	skb = amt_build_mld_gq(amt);</div><div class='add'>+	if (!skb)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	amt_skb_cb(skb)-&gt;tunnel = tunnel;</div><div class='add'>+	dev_queue_xmit(skb);</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static void amt_send_mld_gq(struct amt_dev *amt, struct amt_tunnel_list *tunnel)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static bool amt_queue_event(struct amt_dev *amt, enum amt_event event,</div><div class='add'>+			    struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	int index;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;amt-&gt;lock);</div><div class='add'>+	if (amt-&gt;nr_events &gt;= AMT_MAX_EVENTS) {</div><div class='add'>+		spin_unlock_bh(&amp;amt-&gt;lock);</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	index = (amt-&gt;event_idx + amt-&gt;nr_events) % AMT_MAX_EVENTS;</div><div class='add'>+	amt-&gt;events[index].event = event;</div><div class='add'>+	amt-&gt;events[index].skb = skb;</div><div class='add'>+	amt-&gt;nr_events++;</div><div class='add'>+	amt-&gt;event_idx %= AMT_MAX_EVENTS;</div><div class='add'>+	queue_work(amt_wq, &amp;amt-&gt;event_wq);</div><div class='add'>+	spin_unlock_bh(&amp;amt-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amt_secret_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct amt_dev *amt = container_of(to_delayed_work(work),</div><div class='add'>+					   struct amt_dev,</div><div class='add'>+					   secret_wq);</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;amt-&gt;lock);</div><div class='add'>+	get_random_bytes(&amp;amt-&gt;key, sizeof(siphash_key_t));</div><div class='add'>+	spin_unlock_bh(&amp;amt-&gt;lock);</div><div class='add'>+	mod_delayed_work(amt_wq, &amp;amt-&gt;secret_wq,</div><div class='add'>+			 msecs_to_jiffies(AMT_SECRET_TIMEOUT));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amt_event_send_discovery(struct amt_dev *amt)</div><div class='add'>+{</div><div class='add'>+	if (amt-&gt;status &gt; AMT_STATUS_SENT_DISCOVERY)</div><div class='add'>+		goto out;</div><div class='add'>+	get_random_bytes(&amp;amt-&gt;nonce, sizeof(__be32));</div><div class='add'>+</div><div class='add'>+	amt_send_discovery(amt);</div><div class='add'>+out:</div><div class='add'>+	mod_delayed_work(amt_wq, &amp;amt-&gt;discovery_wq,</div><div class='add'>+			 msecs_to_jiffies(AMT_DISCOVERY_TIMEOUT));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amt_discovery_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct amt_dev *amt = container_of(to_delayed_work(work),</div><div class='add'>+					   struct amt_dev,</div><div class='add'>+					   discovery_wq);</div><div class='add'>+</div><div class='add'>+	if (amt_queue_event(amt, AMT_EVENT_SEND_DISCOVERY, NULL))</div><div class='add'>+		mod_delayed_work(amt_wq, &amp;amt-&gt;discovery_wq,</div><div class='add'>+				 msecs_to_jiffies(AMT_DISCOVERY_TIMEOUT));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amt_event_send_request(struct amt_dev *amt)</div><div class='add'>+{</div><div class='add'>+	u32 exp;</div><div class='add'>+</div><div class='add'>+	if (amt-&gt;status &lt; AMT_STATUS_RECEIVED_ADVERTISEMENT)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (amt-&gt;req_cnt &gt; AMT_MAX_REQ_COUNT) {</div><div class='add'>+		netdev_dbg(amt-&gt;dev, "Gateway is not ready");</div><div class='add'>+		amt-&gt;qi = AMT_INIT_REQ_TIMEOUT;</div><div class='add'>+		WRITE_ONCE(amt-&gt;ready4, false);</div><div class='add'>+		WRITE_ONCE(amt-&gt;ready6, false);</div><div class='add'>+		amt-&gt;remote_ip = 0;</div><div class='add'>+		amt_update_gw_status(amt, AMT_STATUS_INIT, false);</div><div class='add'>+		amt-&gt;req_cnt = 0;</div><div class='add'>+		amt-&gt;nonce = 0;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!amt-&gt;req_cnt) {</div><div class='add'>+		WRITE_ONCE(amt-&gt;ready4, false);</div><div class='add'>+		WRITE_ONCE(amt-&gt;ready6, false);</div><div class='add'>+		get_random_bytes(&amp;amt-&gt;nonce, sizeof(__be32));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	amt_send_request(amt, false);</div><div class='add'>+	amt_send_request(amt, true);</div><div class='add'>+	amt_update_gw_status(amt, AMT_STATUS_SENT_REQUEST, true);</div><div class='add'>+	amt-&gt;req_cnt++;</div><div class='add'>+out:</div><div class='add'>+	exp = min_t(u32, (1 * (1 &lt;&lt; amt-&gt;req_cnt)), AMT_MAX_REQ_TIMEOUT);</div><div class='add'>+	mod_delayed_work(amt_wq, &amp;amt-&gt;req_wq, secs_to_jiffies(exp));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amt_req_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct amt_dev *amt = container_of(to_delayed_work(work),</div><div class='add'>+					   struct amt_dev,</div><div class='add'>+					   req_wq);</div><div class='add'>+</div><div class='add'>+	if (amt_queue_event(amt, AMT_EVENT_SEND_REQUEST, NULL))</div><div class='add'>+		mod_delayed_work(amt_wq, &amp;amt-&gt;req_wq,</div><div class='add'>+				 msecs_to_jiffies(100));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool amt_send_membership_update(struct amt_dev *amt,</div><div class='add'>+				       struct sk_buff *skb,</div><div class='add'>+				       bool v6)</div><div class='add'>+{</div><div class='add'>+	struct amt_header_membership_update *amtmu;</div><div class='add'>+	struct socket *sock;</div><div class='add'>+	struct iphdr *iph;</div><div class='add'>+	struct flowi4 fl4;</div><div class='add'>+	struct rtable *rt;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	sock = rcu_dereference_bh(amt-&gt;sock);</div><div class='add'>+	if (!sock)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	err = skb_cow_head(skb, LL_RESERVED_SPACE(amt-&gt;dev) + sizeof(*amtmu) +</div><div class='add'>+			   sizeof(*iph) + sizeof(struct udphdr));</div><div class='add'>+	if (err)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	skb_reset_inner_headers(skb);</div><div class='add'>+	memset(&amp;fl4, 0, sizeof(struct flowi4));</div><div class='add'>+	fl4.flowi4_oif         = amt-&gt;stream_dev-&gt;ifindex;</div><div class='add'>+	fl4.daddr              = amt-&gt;remote_ip;</div><div class='add'>+	fl4.saddr              = amt-&gt;local_ip;</div><div class='add'>+	fl4.flowi4_dscp        = inet_dsfield_to_dscp(AMT_TOS);</div><div class='add'>+	fl4.flowi4_proto       = IPPROTO_UDP;</div><div class='add'>+	rt = ip_route_output_key(amt-&gt;net, &amp;fl4);</div><div class='add'>+	if (IS_ERR(rt)) {</div><div class='add'>+		netdev_dbg(amt-&gt;dev, "no route to %pI4\n", &amp;amt-&gt;remote_ip);</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	amtmu			= skb_push(skb, sizeof(*amtmu));</div><div class='add'>+	amtmu-&gt;version		= 0;</div><div class='add'>+	amtmu-&gt;type		= AMT_MSG_MEMBERSHIP_UPDATE;</div><div class='add'>+	amtmu-&gt;reserved		= 0;</div><div class='add'>+	amtmu-&gt;nonce		= amt-&gt;nonce;</div><div class='add'>+	amtmu-&gt;response_mac	= amt-&gt;mac;</div><div class='add'>+</div><div class='add'>+	if (!v6)</div><div class='add'>+		skb_set_inner_protocol(skb, htons(ETH_P_IP));</div><div class='add'>+	else</div><div class='add'>+		skb_set_inner_protocol(skb, htons(ETH_P_IPV6));</div><div class='add'>+	udp_tunnel_xmit_skb(rt, sock-&gt;sk, skb,</div><div class='add'>+			    fl4.saddr,</div><div class='add'>+			    fl4.daddr,</div><div class='add'>+			    AMT_TOS,</div><div class='add'>+			    ip4_dst_hoplimit(&amp;rt-&gt;dst),</div><div class='add'>+			    0,</div><div class='add'>+			    amt-&gt;gw_port,</div><div class='add'>+			    amt-&gt;relay_port,</div><div class='add'>+			    false,</div><div class='add'>+			    false,</div><div class='add'>+			    0);</div><div class='add'>+	amt_update_gw_status(amt, AMT_STATUS_SENT_UPDATE, true);</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amt_send_multicast_data(struct amt_dev *amt,</div><div class='add'>+				    const struct sk_buff *oskb,</div><div class='add'>+				    struct amt_tunnel_list *tunnel,</div><div class='add'>+				    bool v6)</div><div class='add'>+{</div><div class='add'>+	struct amt_header_mcast_data *amtmd;</div><div class='add'>+	struct socket *sock;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct iphdr *iph;</div><div class='add'>+	struct flowi4 fl4;</div><div class='add'>+	struct rtable *rt;</div><div class='add'>+</div><div class='add'>+	sock = rcu_dereference_bh(amt-&gt;sock);</div><div class='add'>+	if (!sock)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	skb = skb_copy_expand(oskb, sizeof(*amtmd) + sizeof(*iph) +</div><div class='add'>+			      sizeof(struct udphdr), 0, GFP_ATOMIC);</div><div class='add'>+	if (!skb)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	skb_reset_inner_headers(skb);</div><div class='add'>+	memset(&amp;fl4, 0, sizeof(struct flowi4));</div><div class='add'>+	fl4.flowi4_oif         = amt-&gt;stream_dev-&gt;ifindex;</div><div class='add'>+	fl4.daddr              = tunnel-&gt;ip4;</div><div class='add'>+	fl4.saddr              = amt-&gt;local_ip;</div><div class='add'>+	fl4.flowi4_proto       = IPPROTO_UDP;</div><div class='add'>+	rt = ip_route_output_key(amt-&gt;net, &amp;fl4);</div><div class='add'>+	if (IS_ERR(rt)) {</div><div class='add'>+		netdev_dbg(amt-&gt;dev, "no route to %pI4\n", &amp;tunnel-&gt;ip4);</div><div class='add'>+		kfree_skb(skb);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	amtmd = skb_push(skb, sizeof(*amtmd));</div><div class='add'>+	amtmd-&gt;version = 0;</div><div class='add'>+	amtmd-&gt;reserved = 0;</div><div class='add'>+	amtmd-&gt;type = AMT_MSG_MULTICAST_DATA;</div><div class='add'>+</div><div class='add'>+	if (!v6)</div><div class='add'>+		skb_set_inner_protocol(skb, htons(ETH_P_IP));</div><div class='add'>+	else</div><div class='add'>+		skb_set_inner_protocol(skb, htons(ETH_P_IPV6));</div><div class='add'>+	udp_tunnel_xmit_skb(rt, sock-&gt;sk, skb,</div><div class='add'>+			    fl4.saddr,</div><div class='add'>+			    fl4.daddr,</div><div class='add'>+			    AMT_TOS,</div><div class='add'>+			    ip4_dst_hoplimit(&amp;rt-&gt;dst),</div><div class='add'>+			    0,</div><div class='add'>+			    amt-&gt;relay_port,</div><div class='add'>+			    tunnel-&gt;source_port,</div><div class='add'>+			    false,</div><div class='add'>+			    false,</div><div class='add'>+			    0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool amt_send_membership_query(struct amt_dev *amt,</div><div class='add'>+				      struct sk_buff *skb,</div><div class='add'>+				      struct amt_tunnel_list *tunnel,</div><div class='add'>+				      bool v6)</div><div class='add'>+{</div><div class='add'>+	struct amt_header_membership_query *amtmq;</div><div class='add'>+	struct socket *sock;</div><div class='add'>+	struct rtable *rt;</div><div class='add'>+	struct flowi4 fl4;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	sock = rcu_dereference_bh(amt-&gt;sock);</div><div class='add'>+	if (!sock)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	err = skb_cow_head(skb, LL_RESERVED_SPACE(amt-&gt;dev) + sizeof(*amtmq) +</div><div class='add'>+			   sizeof(struct iphdr) + sizeof(struct udphdr));</div><div class='add'>+	if (err)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	skb_reset_inner_headers(skb);</div><div class='add'>+	memset(&amp;fl4, 0, sizeof(struct flowi4));</div><div class='add'>+	fl4.flowi4_oif         = amt-&gt;stream_dev-&gt;ifindex;</div><div class='add'>+	fl4.daddr              = tunnel-&gt;ip4;</div><div class='add'>+	fl4.saddr              = amt-&gt;local_ip;</div><div class='add'>+	fl4.flowi4_dscp        = inet_dsfield_to_dscp(AMT_TOS);</div><div class='add'>+	fl4.flowi4_proto       = IPPROTO_UDP;</div><div class='add'>+	rt = ip_route_output_key(amt-&gt;net, &amp;fl4);</div><div class='add'>+	if (IS_ERR(rt)) {</div><div class='add'>+		netdev_dbg(amt-&gt;dev, "no route to %pI4\n", &amp;tunnel-&gt;ip4);</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	amtmq		= skb_push(skb, sizeof(*amtmq));</div><div class='add'>+	amtmq-&gt;version	= 0;</div><div class='add'>+	amtmq-&gt;type	= AMT_MSG_MEMBERSHIP_QUERY;</div><div class='add'>+	amtmq-&gt;reserved = 0;</div><div class='add'>+	amtmq-&gt;l	= 0;</div><div class='add'>+	amtmq-&gt;g	= 0;</div><div class='add'>+	amtmq-&gt;nonce	= tunnel-&gt;nonce;</div><div class='add'>+	amtmq-&gt;response_mac = tunnel-&gt;mac;</div><div class='add'>+</div><div class='add'>+	if (!v6)</div><div class='add'>+		skb_set_inner_protocol(skb, htons(ETH_P_IP));</div><div class='add'>+	else</div><div class='add'>+		skb_set_inner_protocol(skb, htons(ETH_P_IPV6));</div><div class='add'>+	udp_tunnel_xmit_skb(rt, sock-&gt;sk, skb,</div><div class='add'>+			    fl4.saddr,</div><div class='add'>+			    fl4.daddr,</div><div class='add'>+			    AMT_TOS,</div><div class='add'>+			    ip4_dst_hoplimit(&amp;rt-&gt;dst),</div><div class='add'>+			    0,</div><div class='add'>+			    amt-&gt;relay_port,</div><div class='add'>+			    tunnel-&gt;source_port,</div><div class='add'>+			    false,</div><div class='add'>+			    false,</div><div class='add'>+			    0);</div><div class='add'>+	amt_update_relay_status(tunnel, AMT_STATUS_SENT_QUERY, true);</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static netdev_tx_t amt_dev_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct amt_dev *amt = netdev_priv(dev);</div><div class='add'>+	struct amt_tunnel_list *tunnel;</div><div class='add'>+	struct amt_group_node *gnode;</div><div class='add'>+	union amt_addr group = {0,};</div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+	struct ipv6hdr *ip6h;</div><div class='add'>+	struct mld_msg *mld;</div><div class='add'>+#endif</div><div class='add'>+	bool report = false;</div><div class='add'>+	struct igmphdr *ih;</div><div class='add'>+	bool query = false;</div><div class='add'>+	struct iphdr *iph;</div><div class='add'>+	bool data = false;</div><div class='add'>+	bool v6 = false;</div><div class='add'>+	u32 hash;</div><div class='add'>+</div><div class='add'>+	iph = ip_hdr(skb);</div><div class='add'>+	if (iph-&gt;version == 4) {</div><div class='add'>+		if (!ipv4_is_multicast(iph-&gt;daddr))</div><div class='add'>+			goto free;</div><div class='add'>+</div><div class='add'>+		if (!ip_mc_check_igmp(skb)) {</div><div class='add'>+			ih = igmp_hdr(skb);</div><div class='add'>+			switch (ih-&gt;type) {</div><div class='add'>+			case IGMPV3_HOST_MEMBERSHIP_REPORT:</div><div class='add'>+			case IGMP_HOST_MEMBERSHIP_REPORT:</div><div class='add'>+				report = true;</div><div class='add'>+				break;</div><div class='add'>+			case IGMP_HOST_MEMBERSHIP_QUERY:</div><div class='add'>+				query = true;</div><div class='add'>+				break;</div><div class='add'>+			default:</div><div class='add'>+				goto free;</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			data = true;</div><div class='add'>+		}</div><div class='add'>+		v6 = false;</div><div class='add'>+		group.ip4 = iph-&gt;daddr;</div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+	} else if (iph-&gt;version == 6) {</div><div class='add'>+		ip6h = ipv6_hdr(skb);</div><div class='add'>+		if (!ipv6_addr_is_multicast(&amp;ip6h-&gt;daddr))</div><div class='add'>+			goto free;</div><div class='add'>+</div><div class='add'>+		if (!ipv6_mc_check_mld(skb)) {</div><div class='add'>+			mld = (struct mld_msg *)skb_transport_header(skb);</div><div class='add'>+			switch (mld-&gt;mld_type) {</div><div class='add'>+			case ICMPV6_MGM_REPORT:</div><div class='add'>+			case ICMPV6_MLD2_REPORT:</div><div class='add'>+				report = true;</div><div class='add'>+				break;</div><div class='add'>+			case ICMPV6_MGM_QUERY:</div><div class='add'>+				query = true;</div><div class='add'>+				break;</div><div class='add'>+			default:</div><div class='add'>+				goto free;</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			data = true;</div><div class='add'>+		}</div><div class='add'>+		v6 = true;</div><div class='add'>+		group.ip6 = ip6h-&gt;daddr;</div><div class='add'>+#endif</div><div class='add'>+	} else {</div><div class='add'>+		dev-&gt;stats.tx_errors++;</div><div class='add'>+		goto free;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!pskb_may_pull(skb, sizeof(struct ethhdr)))</div><div class='add'>+		goto free;</div><div class='add'>+</div><div class='add'>+	skb_pull(skb, sizeof(struct ethhdr));</div><div class='add'>+</div><div class='add'>+	if (amt-&gt;mode == AMT_MODE_GATEWAY) {</div><div class='add'>+		/* Gateway only passes IGMP/MLD packets */</div><div class='add'>+		if (!report)</div><div class='add'>+			goto free;</div><div class='add'>+		if ((!v6 &amp;&amp; !READ_ONCE(amt-&gt;ready4)) ||</div><div class='add'>+		    (v6 &amp;&amp; !READ_ONCE(amt-&gt;ready6)))</div><div class='add'>+			goto free;</div><div class='add'>+		if (amt_send_membership_update(amt, skb,  v6))</div><div class='add'>+			goto free;</div><div class='add'>+		goto unlock;</div><div class='add'>+	} else if (amt-&gt;mode == AMT_MODE_RELAY) {</div><div class='add'>+		if (query) {</div><div class='add'>+			tunnel = amt_skb_cb(skb)-&gt;tunnel;</div><div class='add'>+			if (!tunnel) {</div><div class='add'>+				WARN_ON(1);</div><div class='add'>+				goto free;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			/* Do not forward unexpected query */</div><div class='add'>+			if (amt_send_membership_query(amt, skb, tunnel, v6))</div><div class='add'>+				goto free;</div><div class='add'>+			goto unlock;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!data)</div><div class='add'>+			goto free;</div><div class='add'>+		list_for_each_entry_rcu(tunnel, &amp;amt-&gt;tunnel_list, list) {</div><div class='add'>+			hash = amt_group_hash(tunnel, &amp;group);</div><div class='add'>+			hlist_for_each_entry_rcu(gnode, &amp;tunnel-&gt;groups[hash],</div><div class='add'>+						 node) {</div><div class='add'>+				if (!v6) {</div><div class='add'>+					if (gnode-&gt;group_addr.ip4 == iph-&gt;daddr)</div><div class='add'>+						goto found;</div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+				} else {</div><div class='add'>+					if (ipv6_addr_equal(&amp;gnode-&gt;group_addr.ip6,</div><div class='add'>+							    &amp;ip6h-&gt;daddr))</div><div class='add'>+						goto found;</div><div class='add'>+#endif</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+			continue;</div><div class='add'>+found:</div><div class='add'>+			amt_send_multicast_data(amt, skb, tunnel, v6);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_kfree_skb(skb);</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+free:</div><div class='add'>+	dev_kfree_skb(skb);</div><div class='add'>+unlock:</div><div class='add'>+	dev-&gt;stats.tx_dropped++;</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int amt_parse_type(struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct amt_header *amth;</div><div class='add'>+</div><div class='add'>+	if (!pskb_may_pull(skb, sizeof(struct udphdr) +</div><div class='add'>+			   sizeof(struct amt_header)))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	amth = (struct amt_header *)(udp_hdr(skb) + 1);</div><div class='add'>+</div><div class='add'>+	if (amth-&gt;version != 0)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	if (amth-&gt;type &gt;= __AMT_MSG_MAX || !amth-&gt;type)</div><div class='add'>+		return -1;</div><div class='add'>+	return amth-&gt;type;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amt_clear_groups(struct amt_tunnel_list *tunnel)</div><div class='add'>+{</div><div class='add'>+	struct amt_dev *amt = tunnel-&gt;amt;</div><div class='add'>+	struct amt_group_node *gnode;</div><div class='add'>+	struct hlist_node *t;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;tunnel-&gt;lock);</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	for (i = 0; i &lt; amt-&gt;hash_buckets; i++)</div><div class='add'>+		hlist_for_each_entry_safe(gnode, t, &amp;tunnel-&gt;groups[i], node)</div><div class='add'>+			amt_del_group(amt, gnode);</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+	spin_unlock_bh(&amp;tunnel-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amt_tunnel_expire(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct amt_tunnel_list *tunnel = container_of(to_delayed_work(work),</div><div class='add'>+						      struct amt_tunnel_list,</div><div class='add'>+						      gc_wq);</div><div class='add'>+	struct amt_dev *amt = tunnel-&gt;amt;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;amt-&gt;lock);</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	list_del_rcu(&amp;tunnel-&gt;list);</div><div class='add'>+	amt-&gt;nr_tunnels--;</div><div class='add'>+	amt_clear_groups(tunnel);</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+	spin_unlock_bh(&amp;amt-&gt;lock);</div><div class='add'>+	kfree_rcu(tunnel, rcu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amt_cleanup_srcs(struct amt_dev *amt,</div><div class='add'>+			     struct amt_tunnel_list *tunnel,</div><div class='add'>+			     struct amt_group_node *gnode)</div><div class='add'>+{</div><div class='add'>+	struct amt_source_node *snode;</div><div class='add'>+	struct hlist_node *t;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Delete old sources */</div><div class='add'>+	for (i = 0; i &lt; amt-&gt;hash_buckets; i++) {</div><div class='add'>+		hlist_for_each_entry_safe(snode, t, &amp;gnode-&gt;sources[i], node) {</div><div class='add'>+			if (snode-&gt;flags == AMT_SOURCE_OLD)</div><div class='add'>+				amt_destroy_source(snode);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* switch from new to old */</div><div class='add'>+	for (i = 0; i &lt; amt-&gt;hash_buckets; i++)  {</div><div class='add'>+		hlist_for_each_entry_rcu(snode, &amp;gnode-&gt;sources[i], node) {</div><div class='add'>+			snode-&gt;flags = AMT_SOURCE_OLD;</div><div class='add'>+			if (!gnode-&gt;v6)</div><div class='add'>+				netdev_dbg(snode-&gt;gnode-&gt;amt-&gt;dev,</div><div class='add'>+					   "Add source as OLD %pI4 from %pI4\n",</div><div class='add'>+					   &amp;snode-&gt;source_addr.ip4,</div><div class='add'>+					   &amp;gnode-&gt;group_addr.ip4);</div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+			else</div><div class='add'>+				netdev_dbg(snode-&gt;gnode-&gt;amt-&gt;dev,</div><div class='add'>+					   "Add source as OLD %pI6 from %pI6\n",</div><div class='add'>+					   &amp;snode-&gt;source_addr.ip6,</div><div class='add'>+					   &amp;gnode-&gt;group_addr.ip6);</div><div class='add'>+#endif</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amt_add_srcs(struct amt_dev *amt, struct amt_tunnel_list *tunnel,</div><div class='add'>+			 struct amt_group_node *gnode, void *grec,</div><div class='add'>+			 bool v6)</div><div class='add'>+{</div><div class='add'>+	struct igmpv3_grec *igmp_grec;</div><div class='add'>+	struct amt_source_node *snode;</div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+	struct mld2_grec *mld_grec;</div><div class='add'>+#endif</div><div class='add'>+	union amt_addr src = {0,};</div><div class='add'>+	u16 nsrcs;</div><div class='add'>+	u32 hash;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!v6) {</div><div class='add'>+		igmp_grec = grec;</div><div class='add'>+		nsrcs = ntohs(igmp_grec-&gt;grec_nsrcs);</div><div class='add'>+	} else {</div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+		mld_grec = grec;</div><div class='add'>+		nsrcs = ntohs(mld_grec-&gt;grec_nsrcs);</div><div class='add'>+#else</div><div class='add'>+	return;</div><div class='add'>+#endif</div><div class='add'>+	}</div><div class='add'>+	for (i = 0; i &lt; nsrcs; i++) {</div><div class='add'>+		if (tunnel-&gt;nr_sources &gt;= amt-&gt;max_sources)</div><div class='add'>+			return;</div><div class='add'>+		if (!v6)</div><div class='add'>+			src.ip4 = igmp_grec-&gt;grec_src[i];</div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+		else</div><div class='add'>+			memcpy(&amp;src.ip6, &amp;mld_grec-&gt;grec_src[i],</div><div class='add'>+			       sizeof(struct in6_addr));</div><div class='add'>+#endif</div><div class='add'>+		if (amt_lookup_src(tunnel, gnode, AMT_FILTER_ALL, &amp;src))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		snode = amt_alloc_snode(gnode, &amp;src);</div><div class='add'>+		if (snode) {</div><div class='add'>+			hash = amt_source_hash(tunnel, &amp;snode-&gt;source_addr);</div><div class='add'>+			hlist_add_head_rcu(&amp;snode-&gt;node, &amp;gnode-&gt;sources[hash]);</div><div class='add'>+			tunnel-&gt;nr_sources++;</div><div class='add'>+			gnode-&gt;nr_sources++;</div><div class='add'>+</div><div class='add'>+			if (!gnode-&gt;v6)</div><div class='add'>+				netdev_dbg(snode-&gt;gnode-&gt;amt-&gt;dev,</div><div class='add'>+					   "Add source as NEW %pI4 from %pI4\n",</div><div class='add'>+					   &amp;snode-&gt;source_addr.ip4,</div><div class='add'>+					   &amp;gnode-&gt;group_addr.ip4);</div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+			else</div><div class='add'>+				netdev_dbg(snode-&gt;gnode-&gt;amt-&gt;dev,</div><div class='add'>+					   "Add source as NEW %pI6 from %pI6\n",</div><div class='add'>+					   &amp;snode-&gt;source_addr.ip6,</div><div class='add'>+					   &amp;gnode-&gt;group_addr.ip6);</div><div class='add'>+#endif</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Router State   Report Rec'd New Router State</div><div class='add'>+ * ------------   ------------ ----------------</div><div class='add'>+ * EXCLUDE (X,Y)  IS_IN (A)    EXCLUDE (X+A,Y-A)</div><div class='add'>+ *</div><div class='add'>+ * -----------+-----------+-----------+</div><div class='add'>+ *            |    OLD    |    NEW    |</div><div class='add'>+ * -----------+-----------+-----------+</div><div class='add'>+ *    FWD     |     X     |    X+A    |</div><div class='add'>+ * -----------+-----------+-----------+</div><div class='add'>+ *    D_FWD   |     Y     |    Y-A    |</div><div class='add'>+ * -----------+-----------+-----------+</div><div class='add'>+ *    NONE    |           |     A     |</div><div class='add'>+ * -----------+-----------+-----------+</div><div class='add'>+ *</div><div class='add'>+ * a) Received sources are NONE/NEW</div><div class='add'>+ * b) All NONE will be deleted by amt_cleanup_srcs().</div><div class='add'>+ * c) All OLD will be deleted by amt_cleanup_srcs().</div><div class='add'>+ * d) After delete, NEW source will be switched to OLD.</div><div class='add'>+ */</div><div class='add'>+static void amt_lookup_act_srcs(struct amt_tunnel_list *tunnel,</div><div class='add'>+				struct amt_group_node *gnode,</div><div class='add'>+				void *grec,</div><div class='add'>+				enum amt_ops ops,</div><div class='add'>+				enum amt_filter filter,</div><div class='add'>+				enum amt_act act,</div><div class='add'>+				bool v6)</div><div class='add'>+{</div><div class='add'>+	struct amt_dev *amt = tunnel-&gt;amt;</div><div class='add'>+	struct amt_source_node *snode;</div><div class='add'>+	struct igmpv3_grec *igmp_grec;</div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+	struct mld2_grec *mld_grec;</div><div class='add'>+#endif</div><div class='add'>+	union amt_addr src = {0,};</div><div class='add'>+	struct hlist_node *t;</div><div class='add'>+	u16 nsrcs;</div><div class='add'>+	int i, j;</div><div class='add'>+</div><div class='add'>+	if (!v6) {</div><div class='add'>+		igmp_grec = grec;</div><div class='add'>+		nsrcs = ntohs(igmp_grec-&gt;grec_nsrcs);</div><div class='add'>+	} else {</div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+		mld_grec = grec;</div><div class='add'>+		nsrcs = ntohs(mld_grec-&gt;grec_nsrcs);</div><div class='add'>+#else</div><div class='add'>+	return;</div><div class='add'>+#endif</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memset(&amp;src, 0, sizeof(union amt_addr));</div><div class='add'>+	switch (ops) {</div><div class='add'>+	case AMT_OPS_INT:</div><div class='add'>+		/* A*B */</div><div class='add'>+		for (i = 0; i &lt; nsrcs; i++) {</div><div class='add'>+			if (!v6)</div><div class='add'>+				src.ip4 = igmp_grec-&gt;grec_src[i];</div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+			else</div><div class='add'>+				memcpy(&amp;src.ip6, &amp;mld_grec-&gt;grec_src[i],</div><div class='add'>+				       sizeof(struct in6_addr));</div><div class='add'>+#endif</div><div class='add'>+			snode = amt_lookup_src(tunnel, gnode, filter, &amp;src);</div><div class='add'>+			if (!snode)</div><div class='add'>+				continue;</div><div class='add'>+			amt_act_src(tunnel, gnode, snode, act);</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case AMT_OPS_UNI:</div><div class='add'>+		/* A+B */</div><div class='add'>+		for (i = 0; i &lt; amt-&gt;hash_buckets; i++) {</div><div class='add'>+			hlist_for_each_entry_safe(snode, t, &amp;gnode-&gt;sources[i],</div><div class='add'>+						  node) {</div><div class='add'>+				if (amt_status_filter(snode, filter))</div><div class='add'>+					amt_act_src(tunnel, gnode, snode, act);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		for (i = 0; i &lt; nsrcs; i++) {</div><div class='add'>+			if (!v6)</div><div class='add'>+				src.ip4 = igmp_grec-&gt;grec_src[i];</div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+			else</div><div class='add'>+				memcpy(&amp;src.ip6, &amp;mld_grec-&gt;grec_src[i],</div><div class='add'>+				       sizeof(struct in6_addr));</div><div class='add'>+#endif</div><div class='add'>+			snode = amt_lookup_src(tunnel, gnode, filter, &amp;src);</div><div class='add'>+			if (!snode)</div><div class='add'>+				continue;</div><div class='add'>+			amt_act_src(tunnel, gnode, snode, act);</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case AMT_OPS_SUB:</div><div class='add'>+		/* A-B */</div><div class='add'>+		for (i = 0; i &lt; amt-&gt;hash_buckets; i++) {</div><div class='add'>+			hlist_for_each_entry_safe(snode, t, &amp;gnode-&gt;sources[i],</div><div class='add'>+						  node) {</div><div class='add'>+				if (!amt_status_filter(snode, filter))</div><div class='add'>+					continue;</div><div class='add'>+				for (j = 0; j &lt; nsrcs; j++) {</div><div class='add'>+					if (!v6)</div><div class='add'>+						src.ip4 = igmp_grec-&gt;grec_src[j];</div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+					else</div><div class='add'>+						memcpy(&amp;src.ip6,</div><div class='add'>+						       &amp;mld_grec-&gt;grec_src[j],</div><div class='add'>+						       sizeof(struct in6_addr));</div><div class='add'>+#endif</div><div class='add'>+					if (amt_addr_equal(&amp;snode-&gt;source_addr,</div><div class='add'>+							   &amp;src))</div><div class='add'>+						goto out_sub;</div><div class='add'>+				}</div><div class='add'>+				amt_act_src(tunnel, gnode, snode, act);</div><div class='add'>+				continue;</div><div class='add'>+out_sub:;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case AMT_OPS_SUB_REV:</div><div class='add'>+		/* B-A */</div><div class='add'>+		for (i = 0; i &lt; nsrcs; i++) {</div><div class='add'>+			if (!v6)</div><div class='add'>+				src.ip4 = igmp_grec-&gt;grec_src[i];</div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+			else</div><div class='add'>+				memcpy(&amp;src.ip6, &amp;mld_grec-&gt;grec_src[i],</div><div class='add'>+				       sizeof(struct in6_addr));</div><div class='add'>+#endif</div><div class='add'>+			snode = amt_lookup_src(tunnel, gnode, AMT_FILTER_ALL,</div><div class='add'>+					       &amp;src);</div><div class='add'>+			if (!snode) {</div><div class='add'>+				snode = amt_lookup_src(tunnel, gnode,</div><div class='add'>+						       filter, &amp;src);</div><div class='add'>+				if (snode)</div><div class='add'>+					amt_act_src(tunnel, gnode, snode, act);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		netdev_dbg(amt-&gt;dev, "Invalid type\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amt_mcast_is_in_handler(struct amt_dev *amt,</div><div class='add'>+				    struct amt_tunnel_list *tunnel,</div><div class='add'>+				    struct amt_group_node *gnode,</div><div class='add'>+				    void *grec, void *zero_grec, bool v6)</div><div class='add'>+{</div><div class='add'>+	if (gnode-&gt;filter_mode == MCAST_INCLUDE) {</div><div class='add'>+/* Router State   Report Rec'd New Router State        Actions</div><div class='add'>+ * ------------   ------------ ----------------        -------</div><div class='add'>+ * INCLUDE (A)    IS_IN (B)    INCLUDE (A+B)           (B)=GMI</div><div class='add'>+ */</div><div class='add'>+		/* Update IS_IN (B) as FWD/NEW */</div><div class='add'>+		amt_lookup_act_srcs(tunnel, gnode, grec, AMT_OPS_UNI,</div><div class='add'>+				    AMT_FILTER_NONE_NEW,</div><div class='add'>+				    AMT_ACT_STATUS_FWD_NEW,</div><div class='add'>+				    v6);</div><div class='add'>+		/* Update INCLUDE (A) as NEW */</div><div class='add'>+		amt_lookup_act_srcs(tunnel, gnode, grec, AMT_OPS_UNI,</div><div class='add'>+				    AMT_FILTER_FWD,</div><div class='add'>+				    AMT_ACT_STATUS_FWD_NEW,</div><div class='add'>+				    v6);</div><div class='add'>+		/* (B)=GMI */</div><div class='add'>+		amt_lookup_act_srcs(tunnel, gnode, grec, AMT_OPS_INT,</div><div class='add'>+				    AMT_FILTER_FWD_NEW,</div><div class='add'>+				    AMT_ACT_GMI,</div><div class='add'>+				    v6);</div><div class='add'>+	} else {</div><div class='add'>+/* State        Actions</div><div class='add'>+ * ------------   ------------ ----------------        -------</div><div class='add'>+ * EXCLUDE (X,Y)  IS_IN (A)    EXCLUDE (X+A,Y-A)       (A)=GMI</div><div class='add'>+ */</div><div class='add'>+		/* Update (A) in (X, Y) as NONE/NEW */</div><div class='add'>+		amt_lookup_act_srcs(tunnel, gnode, grec, AMT_OPS_INT,</div><div class='add'>+				    AMT_FILTER_BOTH,</div><div class='add'>+				    AMT_ACT_STATUS_NONE_NEW,</div><div class='add'>+				    v6);</div><div class='add'>+		/* Update FWD/OLD as FWD/NEW */</div><div class='add'>+		amt_lookup_act_srcs(tunnel, gnode, zero_grec, AMT_OPS_UNI,</div><div class='add'>+				    AMT_FILTER_FWD,</div><div class='add'>+				    AMT_ACT_STATUS_FWD_NEW,</div><div class='add'>+				    v6);</div><div class='add'>+		/* Update IS_IN (A) as FWD/NEW */</div><div class='add'>+		amt_lookup_act_srcs(tunnel, gnode, grec, AMT_OPS_INT,</div><div class='add'>+				    AMT_FILTER_NONE_NEW,</div><div class='add'>+				    AMT_ACT_STATUS_FWD_NEW,</div><div class='add'>+				    v6);</div><div class='add'>+		/* Update EXCLUDE (, Y-A) as D_FWD_NEW */</div><div class='add'>+		amt_lookup_act_srcs(tunnel, gnode, grec, AMT_OPS_SUB,</div><div class='add'>+				    AMT_FILTER_D_FWD,</div><div class='add'>+				    AMT_ACT_STATUS_D_FWD_NEW,</div><div class='add'>+				    v6);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amt_mcast_is_ex_handler(struct amt_dev *amt,</div><div class='add'>+				    struct amt_tunnel_list *tunnel,</div><div class='add'>+				    struct amt_group_node *gnode,</div><div class='add'>+				    void *grec, void *zero_grec, bool v6)</div><div class='add'>+{</div><div class='add'>+	if (gnode-&gt;filter_mode == MCAST_INCLUDE) {</div><div class='add'>+/* Router State   Report Rec'd  New Router State         Actions</div><div class='add'>+ * ------------   ------------  ----------------         -------</div><div class='add'>+ * INCLUDE (A)    IS_EX (B)     EXCLUDE (A*B,B-A)        (B-A)=0</div><div class='add'>+ *                                                       Delete (A-B)</div><div class='add'>+ *                                                       Group Timer=GMI</div><div class='add'>+ */</div><div class='add'>+		/* EXCLUDE(A*B, ) */</div><div class='add'>+		amt_lookup_act_srcs(tunnel, gnode, grec, AMT_OPS_INT,</div><div class='add'>+				    AMT_FILTER_FWD,</div><div class='add'>+				    AMT_ACT_STATUS_FWD_NEW,</div><div class='add'>+				    v6);</div><div class='add'>+		/* EXCLUDE(, B-A) */</div><div class='add'>+		amt_lookup_act_srcs(tunnel, gnode, grec, AMT_OPS_SUB_REV,</div><div class='add'>+				    AMT_FILTER_FWD,</div><div class='add'>+				    AMT_ACT_STATUS_D_FWD_NEW,</div><div class='add'>+				    v6);</div><div class='add'>+		/* (B-A)=0 */</div><div class='add'>+		amt_lookup_act_srcs(tunnel, gnode, zero_grec, AMT_OPS_UNI,</div><div class='add'>+				    AMT_FILTER_D_FWD_NEW,</div><div class='add'>+				    AMT_ACT_GMI_ZERO,</div><div class='add'>+				    v6);</div><div class='add'>+		/* Group Timer=GMI */</div><div class='add'>+		if (!mod_delayed_work(amt_wq, &amp;gnode-&gt;group_timer,</div><div class='add'>+				      msecs_to_jiffies(amt_gmi(amt))))</div><div class='add'>+			dev_hold(amt-&gt;dev);</div><div class='add'>+		gnode-&gt;filter_mode = MCAST_EXCLUDE;</div><div class='add'>+		/* Delete (A-B) will be worked by amt_cleanup_srcs(). */</div><div class='add'>+	} else {</div><div class='add'>+/* Router State   Report Rec'd  New Router State	Actions</div><div class='add'>+ * ------------   ------------  ----------------	-------</div><div class='add'>+ * EXCLUDE (X,Y)  IS_EX (A)     EXCLUDE (A-Y,Y*A)	(A-X-Y)=GMI</div><div class='add'>+ *							Delete (X-A)</div><div class='add'>+ *							Delete (Y-A)</div><div class='add'>+ *							Group Timer=GMI</div><div class='add'>+ */</div><div class='add'>+		/* EXCLUDE (A-Y, ) */</div><div class='add'>+		amt_lookup_act_srcs(tunnel, gnode, grec, AMT_OPS_SUB_REV,</div><div class='add'>+				    AMT_FILTER_D_FWD,</div><div class='add'>+				    AMT_ACT_STATUS_FWD_NEW,</div><div class='add'>+				    v6);</div><div class='add'>+		/* EXCLUDE (, Y*A ) */</div><div class='add'>+		amt_lookup_act_srcs(tunnel, gnode, grec, AMT_OPS_INT,</div><div class='add'>+				    AMT_FILTER_D_FWD,</div><div class='add'>+				    AMT_ACT_STATUS_D_FWD_NEW,</div><div class='add'>+				    v6);</div><div class='add'>+		/* (A-X-Y)=GMI */</div><div class='add'>+		amt_lookup_act_srcs(tunnel, gnode, grec, AMT_OPS_SUB_REV,</div><div class='add'>+				    AMT_FILTER_BOTH_NEW,</div><div class='add'>+				    AMT_ACT_GMI,</div><div class='add'>+				    v6);</div><div class='add'>+		/* Group Timer=GMI */</div><div class='add'>+		if (!mod_delayed_work(amt_wq, &amp;gnode-&gt;group_timer,</div><div class='add'>+				      msecs_to_jiffies(amt_gmi(amt))))</div><div class='add'>+			dev_hold(amt-&gt;dev);</div><div class='add'>+		/* Delete (X-A), (Y-A) will be worked by amt_cleanup_srcs(). */</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amt_mcast_to_in_handler(struct amt_dev *amt,</div><div class='add'>+				    struct amt_tunnel_list *tunnel,</div><div class='add'>+				    struct amt_group_node *gnode,</div><div class='add'>+				    void *grec, void *zero_grec, bool v6)</div><div class='add'>+{</div><div class='add'>+	if (gnode-&gt;filter_mode == MCAST_INCLUDE) {</div><div class='add'>+/* Router State   Report Rec'd New Router State        Actions</div><div class='add'>+ * ------------   ------------ ----------------        -------</div><div class='add'>+ * INCLUDE (A)    TO_IN (B)    INCLUDE (A+B)           (B)=GMI</div><div class='add'>+ *						       Send Q(G,A-B)</div><div class='add'>+ */</div><div class='add'>+		/* Update TO_IN (B) sources as FWD/NEW */</div><div class='add'>+		amt_lookup_act_srcs(tunnel, gnode, grec, AMT_OPS_UNI,</div><div class='add'>+				    AMT_FILTER_NONE_NEW,</div><div class='add'>+				    AMT_ACT_STATUS_FWD_NEW,</div><div class='add'>+				    v6);</div><div class='add'>+		/* Update INCLUDE (A) sources as NEW */</div><div class='add'>+		amt_lookup_act_srcs(tunnel, gnode, grec, AMT_OPS_UNI,</div><div class='add'>+				    AMT_FILTER_FWD,</div><div class='add'>+				    AMT_ACT_STATUS_FWD_NEW,</div><div class='add'>+				    v6);</div><div class='add'>+		/* (B)=GMI */</div><div class='add'>+		amt_lookup_act_srcs(tunnel, gnode, grec, AMT_OPS_INT,</div><div class='add'>+				    AMT_FILTER_FWD_NEW,</div><div class='add'>+				    AMT_ACT_GMI,</div><div class='add'>+				    v6);</div><div class='add'>+	} else {</div><div class='add'>+/* Router State   Report Rec'd New Router State        Actions</div><div class='add'>+ * ------------   ------------ ----------------        -------</div><div class='add'>+ * EXCLUDE (X,Y)  TO_IN (A)    EXCLUDE (X+A,Y-A)       (A)=GMI</div><div class='add'>+ *						       Send Q(G,X-A)</div><div class='add'>+ *						       Send Q(G)</div><div class='add'>+ */</div><div class='add'>+		/* Update TO_IN (A) sources as FWD/NEW */</div><div class='add'>+		amt_lookup_act_srcs(tunnel, gnode, grec, AMT_OPS_UNI,</div><div class='add'>+				    AMT_FILTER_NONE_NEW,</div><div class='add'>+				    AMT_ACT_STATUS_FWD_NEW,</div><div class='add'>+				    v6);</div><div class='add'>+		/* Update EXCLUDE(X,) sources as FWD/NEW */</div><div class='add'>+		amt_lookup_act_srcs(tunnel, gnode, grec, AMT_OPS_UNI,</div><div class='add'>+				    AMT_FILTER_FWD,</div><div class='add'>+				    AMT_ACT_STATUS_FWD_NEW,</div><div class='add'>+				    v6);</div><div class='add'>+		/* EXCLUDE (, Y-A)</div><div class='add'>+		 * (A) are already switched to FWD_NEW.</div><div class='add'>+		 * So, D_FWD/OLD -&gt; D_FWD/NEW is okay.</div><div class='add'>+		 */</div><div class='add'>+		amt_lookup_act_srcs(tunnel, gnode, zero_grec, AMT_OPS_UNI,</div><div class='add'>+				    AMT_FILTER_D_FWD,</div><div class='add'>+				    AMT_ACT_STATUS_D_FWD_NEW,</div><div class='add'>+				    v6);</div><div class='add'>+		/* (A)=GMI</div><div class='add'>+		 * Only FWD_NEW will have (A) sources.</div><div class='add'>+		 */</div><div class='add'>+		amt_lookup_act_srcs(tunnel, gnode, grec, AMT_OPS_INT,</div><div class='add'>+				    AMT_FILTER_FWD_NEW,</div><div class='add'>+				    AMT_ACT_GMI,</div><div class='add'>+				    v6);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amt_mcast_to_ex_handler(struct amt_dev *amt,</div><div class='add'>+				    struct amt_tunnel_list *tunnel,</div><div class='add'>+				    struct amt_group_node *gnode,</div><div class='add'>+				    void *grec, void *zero_grec, bool v6)</div><div class='add'>+{</div><div class='add'>+	if (gnode-&gt;filter_mode == MCAST_INCLUDE) {</div><div class='add'>+/* Router State   Report Rec'd New Router State        Actions</div><div class='add'>+ * ------------   ------------ ----------------        -------</div><div class='add'>+ * INCLUDE (A)    TO_EX (B)    EXCLUDE (A*B,B-A)       (B-A)=0</div><div class='add'>+ *						       Delete (A-B)</div><div class='add'>+ *						       Send Q(G,A*B)</div><div class='add'>+ *						       Group Timer=GMI</div><div class='add'>+ */</div><div class='add'>+		/* EXCLUDE (A*B, ) */</div><div class='add'>+		amt_lookup_act_srcs(tunnel, gnode, grec, AMT_OPS_INT,</div><div class='add'>+				    AMT_FILTER_FWD,</div><div class='add'>+				    AMT_ACT_STATUS_FWD_NEW,</div><div class='add'>+				    v6);</div><div class='add'>+		/* EXCLUDE (, B-A) */</div><div class='add'>+		amt_lookup_act_srcs(tunnel, gnode, grec, AMT_OPS_SUB_REV,</div><div class='add'>+				    AMT_FILTER_FWD,</div><div class='add'>+				    AMT_ACT_STATUS_D_FWD_NEW,</div><div class='add'>+				    v6);</div><div class='add'>+		/* (B-A)=0 */</div><div class='add'>+		amt_lookup_act_srcs(tunnel, gnode, zero_grec, AMT_OPS_UNI,</div><div class='add'>+				    AMT_FILTER_D_FWD_NEW,</div><div class='add'>+				    AMT_ACT_GMI_ZERO,</div><div class='add'>+				    v6);</div><div class='add'>+		/* Group Timer=GMI */</div><div class='add'>+		if (!mod_delayed_work(amt_wq, &amp;gnode-&gt;group_timer,</div><div class='add'>+				      msecs_to_jiffies(amt_gmi(amt))))</div><div class='add'>+			dev_hold(amt-&gt;dev);</div><div class='add'>+		gnode-&gt;filter_mode = MCAST_EXCLUDE;</div><div class='add'>+		/* Delete (A-B) will be worked by amt_cleanup_srcs(). */</div><div class='add'>+	} else {</div><div class='add'>+/* Router State   Report Rec'd New Router State        Actions</div><div class='add'>+ * ------------   ------------ ----------------        -------</div><div class='add'>+ * EXCLUDE (X,Y)  TO_EX (A)    EXCLUDE (A-Y,Y*A)       (A-X-Y)=Group Timer</div><div class='add'>+ *						       Delete (X-A)</div><div class='add'>+ *						       Delete (Y-A)</div><div class='add'>+ *						       Send Q(G,A-Y)</div><div class='add'>+ *						       Group Timer=GMI</div><div class='add'>+ */</div><div class='add'>+		/* Update (A-X-Y) as NONE/OLD */</div><div class='add'>+		amt_lookup_act_srcs(tunnel, gnode, grec, AMT_OPS_SUB_REV,</div><div class='add'>+				    AMT_FILTER_BOTH,</div><div class='add'>+				    AMT_ACT_GT,</div><div class='add'>+				    v6);</div><div class='add'>+		/* EXCLUDE (A-Y, ) */</div><div class='add'>+		amt_lookup_act_srcs(tunnel, gnode, grec, AMT_OPS_SUB_REV,</div><div class='add'>+				    AMT_FILTER_D_FWD,</div><div class='add'>+				    AMT_ACT_STATUS_FWD_NEW,</div><div class='add'>+				    v6);</div><div class='add'>+		/* EXCLUDE (, Y*A) */</div><div class='add'>+		amt_lookup_act_srcs(tunnel, gnode, grec, AMT_OPS_INT,</div><div class='add'>+				    AMT_FILTER_D_FWD,</div><div class='add'>+				    AMT_ACT_STATUS_D_FWD_NEW,</div><div class='add'>+				    v6);</div><div class='add'>+		/* Group Timer=GMI */</div><div class='add'>+		if (!mod_delayed_work(amt_wq, &amp;gnode-&gt;group_timer,</div><div class='add'>+				      msecs_to_jiffies(amt_gmi(amt))))</div><div class='add'>+			dev_hold(amt-&gt;dev);</div><div class='add'>+		/* Delete (X-A), (Y-A) will be worked by amt_cleanup_srcs(). */</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amt_mcast_allow_handler(struct amt_dev *amt,</div><div class='add'>+				    struct amt_tunnel_list *tunnel,</div><div class='add'>+				    struct amt_group_node *gnode,</div><div class='add'>+				    void *grec, void *zero_grec, bool v6)</div><div class='add'>+{</div><div class='add'>+	if (gnode-&gt;filter_mode == MCAST_INCLUDE) {</div><div class='add'>+/* Router State   Report Rec'd New Router State        Actions</div><div class='add'>+ * ------------   ------------ ----------------        -------</div><div class='add'>+ * INCLUDE (A)    ALLOW (B)    INCLUDE (A+B)	       (B)=GMI</div><div class='add'>+ */</div><div class='add'>+		/* INCLUDE (A+B) */</div><div class='add'>+		amt_lookup_act_srcs(tunnel, gnode, grec, AMT_OPS_UNI,</div><div class='add'>+				    AMT_FILTER_FWD,</div><div class='add'>+				    AMT_ACT_STATUS_FWD_NEW,</div><div class='add'>+				    v6);</div><div class='add'>+		/* (B)=GMI */</div><div class='add'>+		amt_lookup_act_srcs(tunnel, gnode, grec, AMT_OPS_INT,</div><div class='add'>+				    AMT_FILTER_FWD_NEW,</div><div class='add'>+				    AMT_ACT_GMI,</div><div class='add'>+				    v6);</div><div class='add'>+	} else {</div><div class='add'>+/* Router State   Report Rec'd New Router State        Actions</div><div class='add'>+ * ------------   ------------ ----------------        -------</div><div class='add'>+ * EXCLUDE (X,Y)  ALLOW (A)    EXCLUDE (X+A,Y-A)       (A)=GMI</div><div class='add'>+ */</div><div class='add'>+		/* EXCLUDE (X+A, ) */</div><div class='add'>+		amt_lookup_act_srcs(tunnel, gnode, grec, AMT_OPS_UNI,</div><div class='add'>+				    AMT_FILTER_FWD,</div><div class='add'>+				    AMT_ACT_STATUS_FWD_NEW,</div><div class='add'>+				    v6);</div><div class='add'>+		/* EXCLUDE (, Y-A) */</div><div class='add'>+		amt_lookup_act_srcs(tunnel, gnode, grec, AMT_OPS_SUB,</div><div class='add'>+				    AMT_FILTER_D_FWD,</div><div class='add'>+				    AMT_ACT_STATUS_D_FWD_NEW,</div><div class='add'>+				    v6);</div><div class='add'>+		/* (A)=GMI</div><div class='add'>+		 * All (A) source are now FWD/NEW status.</div><div class='add'>+		 */</div><div class='add'>+		amt_lookup_act_srcs(tunnel, gnode, grec, AMT_OPS_INT,</div><div class='add'>+				    AMT_FILTER_FWD_NEW,</div><div class='add'>+				    AMT_ACT_GMI,</div><div class='add'>+				    v6);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amt_mcast_block_handler(struct amt_dev *amt,</div><div class='add'>+				    struct amt_tunnel_list *tunnel,</div><div class='add'>+				    struct amt_group_node *gnode,</div><div class='add'>+				    void *grec, void *zero_grec, bool v6)</div><div class='add'>+{</div><div class='add'>+	if (gnode-&gt;filter_mode == MCAST_INCLUDE) {</div><div class='add'>+/* Router State   Report Rec'd New Router State        Actions</div><div class='add'>+ * ------------   ------------ ----------------        -------</div><div class='add'>+ * INCLUDE (A)    BLOCK (B)    INCLUDE (A)             Send Q(G,A*B)</div><div class='add'>+ */</div><div class='add'>+		/* INCLUDE (A) */</div><div class='add'>+		amt_lookup_act_srcs(tunnel, gnode, zero_grec, AMT_OPS_UNI,</div><div class='add'>+				    AMT_FILTER_FWD,</div><div class='add'>+				    AMT_ACT_STATUS_FWD_NEW,</div><div class='add'>+				    v6);</div><div class='add'>+	} else {</div><div class='add'>+/* Router State   Report Rec'd New Router State        Actions</div><div class='add'>+ * ------------   ------------ ----------------        -------</div><div class='add'>+ * EXCLUDE (X,Y)  BLOCK (A)    EXCLUDE (X+(A-Y),Y)     (A-X-Y)=Group Timer</div><div class='add'>+ *						       Send Q(G,A-Y)</div><div class='add'>+ */</div><div class='add'>+		/* (A-X-Y)=Group Timer */</div><div class='add'>+		amt_lookup_act_srcs(tunnel, gnode, grec, AMT_OPS_SUB_REV,</div><div class='add'>+				    AMT_FILTER_BOTH,</div><div class='add'>+				    AMT_ACT_GT,</div><div class='add'>+				    v6);</div><div class='add'>+		/* EXCLUDE (X, ) */</div><div class='add'>+		amt_lookup_act_srcs(tunnel, gnode, grec, AMT_OPS_UNI,</div><div class='add'>+				    AMT_FILTER_FWD,</div><div class='add'>+				    AMT_ACT_STATUS_FWD_NEW,</div><div class='add'>+				    v6);</div><div class='add'>+		/* EXCLUDE (X+(A-Y) */</div><div class='add'>+		amt_lookup_act_srcs(tunnel, gnode, grec, AMT_OPS_SUB_REV,</div><div class='add'>+				    AMT_FILTER_D_FWD,</div><div class='add'>+				    AMT_ACT_STATUS_FWD_NEW,</div><div class='add'>+				    v6);</div><div class='add'>+		/* EXCLUDE (, Y) */</div><div class='add'>+		amt_lookup_act_srcs(tunnel, gnode, grec, AMT_OPS_UNI,</div><div class='add'>+				    AMT_FILTER_D_FWD,</div><div class='add'>+				    AMT_ACT_STATUS_D_FWD_NEW,</div><div class='add'>+				    v6);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* RFC 3376</div><div class='add'>+ * 7.3.2. In the Presence of Older Version Group Members</div><div class='add'>+ *</div><div class='add'>+ * When Group Compatibility Mode is IGMPv2, a router internally</div><div class='add'>+ * translates the following IGMPv2 messages for that group to their</div><div class='add'>+ * IGMPv3 equivalents:</div><div class='add'>+ *</div><div class='add'>+ * IGMPv2 Message                IGMPv3 Equivalent</div><div class='add'>+ * --------------                -----------------</div><div class='add'>+ * Report                        IS_EX( {} )</div><div class='add'>+ * Leave                         TO_IN( {} )</div><div class='add'>+ */</div><div class='add'>+static void amt_igmpv2_report_handler(struct amt_dev *amt, struct sk_buff *skb,</div><div class='add'>+				      struct amt_tunnel_list *tunnel)</div><div class='add'>+{</div><div class='add'>+	struct igmphdr *ih = igmp_hdr(skb);</div><div class='add'>+	struct iphdr *iph = ip_hdr(skb);</div><div class='add'>+	struct amt_group_node *gnode;</div><div class='add'>+	union amt_addr group, host;</div><div class='add'>+</div><div class='add'>+	memset(&amp;group, 0, sizeof(union amt_addr));</div><div class='add'>+	group.ip4 = ih-&gt;group;</div><div class='add'>+	memset(&amp;host, 0, sizeof(union amt_addr));</div><div class='add'>+	host.ip4 = iph-&gt;saddr;</div><div class='add'>+</div><div class='add'>+	gnode = amt_lookup_group(tunnel, &amp;group, &amp;host, false);</div><div class='add'>+	if (!gnode) {</div><div class='add'>+		gnode = amt_add_group(amt, tunnel, &amp;group, &amp;host, false);</div><div class='add'>+		if (!IS_ERR(gnode)) {</div><div class='add'>+			gnode-&gt;filter_mode = MCAST_EXCLUDE;</div><div class='add'>+			if (!mod_delayed_work(amt_wq, &amp;gnode-&gt;group_timer,</div><div class='add'>+					      msecs_to_jiffies(amt_gmi(amt))))</div><div class='add'>+				dev_hold(amt-&gt;dev);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* RFC 3376</div><div class='add'>+ * 7.3.2. In the Presence of Older Version Group Members</div><div class='add'>+ *</div><div class='add'>+ * When Group Compatibility Mode is IGMPv2, a router internally</div><div class='add'>+ * translates the following IGMPv2 messages for that group to their</div><div class='add'>+ * IGMPv3 equivalents:</div><div class='add'>+ *</div><div class='add'>+ * IGMPv2 Message                IGMPv3 Equivalent</div><div class='add'>+ * --------------                -----------------</div><div class='add'>+ * Report                        IS_EX( {} )</div><div class='add'>+ * Leave                         TO_IN( {} )</div><div class='add'>+ */</div><div class='add'>+static void amt_igmpv2_leave_handler(struct amt_dev *amt, struct sk_buff *skb,</div><div class='add'>+				     struct amt_tunnel_list *tunnel)</div><div class='add'>+{</div><div class='add'>+	struct igmphdr *ih = igmp_hdr(skb);</div><div class='add'>+	struct iphdr *iph = ip_hdr(skb);</div><div class='add'>+	struct amt_group_node *gnode;</div><div class='add'>+	union amt_addr group, host;</div><div class='add'>+</div><div class='add'>+	memset(&amp;group, 0, sizeof(union amt_addr));</div><div class='add'>+	group.ip4 = ih-&gt;group;</div><div class='add'>+	memset(&amp;host, 0, sizeof(union amt_addr));</div><div class='add'>+	host.ip4 = iph-&gt;saddr;</div><div class='add'>+</div><div class='add'>+	gnode = amt_lookup_group(tunnel, &amp;group, &amp;host, false);</div><div class='add'>+	if (gnode)</div><div class='add'>+		amt_del_group(amt, gnode);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amt_igmpv3_report_handler(struct amt_dev *amt, struct sk_buff *skb,</div><div class='add'>+				      struct amt_tunnel_list *tunnel)</div><div class='add'>+{</div><div class='add'>+	struct igmpv3_report *ihrv3 = igmpv3_report_hdr(skb);</div><div class='add'>+	int len = skb_transport_offset(skb) + sizeof(*ihrv3);</div><div class='add'>+	void *zero_grec = (void *)&amp;igmpv3_zero_grec;</div><div class='add'>+	struct iphdr *iph = ip_hdr(skb);</div><div class='add'>+	struct amt_group_node *gnode;</div><div class='add'>+	union amt_addr group, host;</div><div class='add'>+	struct igmpv3_grec *grec;</div><div class='add'>+	u16 nsrcs;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ntohs(ihrv3-&gt;ngrec); i++) {</div><div class='add'>+		len += sizeof(*grec);</div><div class='add'>+		if (!ip_mc_may_pull(skb, len))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		grec = (void *)(skb-&gt;data + len - sizeof(*grec));</div><div class='add'>+		nsrcs = ntohs(grec-&gt;grec_nsrcs);</div><div class='add'>+</div><div class='add'>+		len += nsrcs * sizeof(__be32);</div><div class='add'>+		if (!ip_mc_may_pull(skb, len))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		memset(&amp;group, 0, sizeof(union amt_addr));</div><div class='add'>+		group.ip4 = grec-&gt;grec_mca;</div><div class='add'>+		memset(&amp;host, 0, sizeof(union amt_addr));</div><div class='add'>+		host.ip4 = iph-&gt;saddr;</div><div class='add'>+		gnode = amt_lookup_group(tunnel, &amp;group, &amp;host, false);</div><div class='add'>+		if (!gnode) {</div><div class='add'>+			gnode = amt_add_group(amt, tunnel, &amp;group, &amp;host,</div><div class='add'>+					      false);</div><div class='add'>+			if (IS_ERR(gnode))</div><div class='add'>+				continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		amt_add_srcs(amt, tunnel, gnode, grec, false);</div><div class='add'>+		switch (grec-&gt;grec_type) {</div><div class='add'>+		case IGMPV3_MODE_IS_INCLUDE:</div><div class='add'>+			amt_mcast_is_in_handler(amt, tunnel, gnode, grec,</div><div class='add'>+						zero_grec, false);</div><div class='add'>+			break;</div><div class='add'>+		case IGMPV3_MODE_IS_EXCLUDE:</div><div class='add'>+			amt_mcast_is_ex_handler(amt, tunnel, gnode, grec,</div><div class='add'>+						zero_grec, false);</div><div class='add'>+			break;</div><div class='add'>+		case IGMPV3_CHANGE_TO_INCLUDE:</div><div class='add'>+			amt_mcast_to_in_handler(amt, tunnel, gnode, grec,</div><div class='add'>+						zero_grec, false);</div><div class='add'>+			break;</div><div class='add'>+		case IGMPV3_CHANGE_TO_EXCLUDE:</div><div class='add'>+			amt_mcast_to_ex_handler(amt, tunnel, gnode, grec,</div><div class='add'>+						zero_grec, false);</div><div class='add'>+			break;</div><div class='add'>+		case IGMPV3_ALLOW_NEW_SOURCES:</div><div class='add'>+			amt_mcast_allow_handler(amt, tunnel, gnode, grec,</div><div class='add'>+						zero_grec, false);</div><div class='add'>+			break;</div><div class='add'>+		case IGMPV3_BLOCK_OLD_SOURCES:</div><div class='add'>+			amt_mcast_block_handler(amt, tunnel, gnode, grec,</div><div class='add'>+						zero_grec, false);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		amt_cleanup_srcs(amt, tunnel, gnode);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* caller held tunnel-&gt;lock */</div><div class='add'>+static void amt_igmp_report_handler(struct amt_dev *amt, struct sk_buff *skb,</div><div class='add'>+				    struct amt_tunnel_list *tunnel)</div><div class='add'>+{</div><div class='add'>+	struct igmphdr *ih = igmp_hdr(skb);</div><div class='add'>+</div><div class='add'>+	switch (ih-&gt;type) {</div><div class='add'>+	case IGMPV3_HOST_MEMBERSHIP_REPORT:</div><div class='add'>+		amt_igmpv3_report_handler(amt, skb, tunnel);</div><div class='add'>+		break;</div><div class='add'>+	case IGMPV2_HOST_MEMBERSHIP_REPORT:</div><div class='add'>+		amt_igmpv2_report_handler(amt, skb, tunnel);</div><div class='add'>+		break;</div><div class='add'>+	case IGMP_HOST_LEAVE_MESSAGE:</div><div class='add'>+		amt_igmpv2_leave_handler(amt, skb, tunnel);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+/* RFC 3810</div><div class='add'>+ * 8.3.2. In the Presence of MLDv1 Multicast Address Listeners</div><div class='add'>+ *</div><div class='add'>+ * When Multicast Address Compatibility Mode is MLDv2, a router acts</div><div class='add'>+ * using the MLDv2 protocol for that multicast address.  When Multicast</div><div class='add'>+ * Address Compatibility Mode is MLDv1, a router internally translates</div><div class='add'>+ * the following MLDv1 messages for that multicast address to their</div><div class='add'>+ * MLDv2 equivalents:</div><div class='add'>+ *</div><div class='add'>+ * MLDv1 Message                 MLDv2 Equivalent</div><div class='add'>+ * --------------                -----------------</div><div class='add'>+ * Report                        IS_EX( {} )</div><div class='add'>+ * Done                          TO_IN( {} )</div><div class='add'>+ */</div><div class='add'>+static void amt_mldv1_report_handler(struct amt_dev *amt, struct sk_buff *skb,</div><div class='add'>+				     struct amt_tunnel_list *tunnel)</div><div class='add'>+{</div><div class='add'>+	struct mld_msg *mld = (struct mld_msg *)icmp6_hdr(skb);</div><div class='add'>+	struct ipv6hdr *ip6h = ipv6_hdr(skb);</div><div class='add'>+	struct amt_group_node *gnode;</div><div class='add'>+	union amt_addr group, host;</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;group.ip6, &amp;mld-&gt;mld_mca, sizeof(struct in6_addr));</div><div class='add'>+	memcpy(&amp;host.ip6, &amp;ip6h-&gt;saddr, sizeof(struct in6_addr));</div><div class='add'>+</div><div class='add'>+	gnode = amt_lookup_group(tunnel, &amp;group, &amp;host, true);</div><div class='add'>+	if (!gnode) {</div><div class='add'>+		gnode = amt_add_group(amt, tunnel, &amp;group, &amp;host, true);</div><div class='add'>+		if (!IS_ERR(gnode)) {</div><div class='add'>+			gnode-&gt;filter_mode = MCAST_EXCLUDE;</div><div class='add'>+			if (!mod_delayed_work(amt_wq, &amp;gnode-&gt;group_timer,</div><div class='add'>+					      msecs_to_jiffies(amt_gmi(amt))))</div><div class='add'>+				dev_hold(amt-&gt;dev);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* RFC 3810</div><div class='add'>+ * 8.3.2. In the Presence of MLDv1 Multicast Address Listeners</div><div class='add'>+ *</div><div class='add'>+ * When Multicast Address Compatibility Mode is MLDv2, a router acts</div><div class='add'>+ * using the MLDv2 protocol for that multicast address.  When Multicast</div><div class='add'>+ * Address Compatibility Mode is MLDv1, a router internally translates</div><div class='add'>+ * the following MLDv1 messages for that multicast address to their</div><div class='add'>+ * MLDv2 equivalents:</div><div class='add'>+ *</div><div class='add'>+ * MLDv1 Message                 MLDv2 Equivalent</div><div class='add'>+ * --------------                -----------------</div><div class='add'>+ * Report                        IS_EX( {} )</div><div class='add'>+ * Done                          TO_IN( {} )</div><div class='add'>+ */</div><div class='add'>+static void amt_mldv1_leave_handler(struct amt_dev *amt, struct sk_buff *skb,</div><div class='add'>+				    struct amt_tunnel_list *tunnel)</div><div class='add'>+{</div><div class='add'>+	struct mld_msg *mld = (struct mld_msg *)icmp6_hdr(skb);</div><div class='add'>+	struct iphdr *iph = ip_hdr(skb);</div><div class='add'>+	struct amt_group_node *gnode;</div><div class='add'>+	union amt_addr group, host;</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;group.ip6, &amp;mld-&gt;mld_mca, sizeof(struct in6_addr));</div><div class='add'>+	memset(&amp;host, 0, sizeof(union amt_addr));</div><div class='add'>+	host.ip4 = iph-&gt;saddr;</div><div class='add'>+</div><div class='add'>+	gnode = amt_lookup_group(tunnel, &amp;group, &amp;host, true);</div><div class='add'>+	if (gnode) {</div><div class='add'>+		amt_del_group(amt, gnode);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amt_mldv2_report_handler(struct amt_dev *amt, struct sk_buff *skb,</div><div class='add'>+				     struct amt_tunnel_list *tunnel)</div><div class='add'>+{</div><div class='add'>+	struct mld2_report *mld2r = (struct mld2_report *)icmp6_hdr(skb);</div><div class='add'>+	int len = skb_transport_offset(skb) + sizeof(*mld2r);</div><div class='add'>+	void *zero_grec = (void *)&amp;mldv2_zero_grec;</div><div class='add'>+	struct ipv6hdr *ip6h = ipv6_hdr(skb);</div><div class='add'>+	struct amt_group_node *gnode;</div><div class='add'>+	union amt_addr group, host;</div><div class='add'>+	struct mld2_grec *grec;</div><div class='add'>+	u16 nsrcs;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ntohs(mld2r-&gt;mld2r_ngrec); i++) {</div><div class='add'>+		len += sizeof(*grec);</div><div class='add'>+		if (!ipv6_mc_may_pull(skb, len))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		grec = (void *)(skb-&gt;data + len - sizeof(*grec));</div><div class='add'>+		nsrcs = ntohs(grec-&gt;grec_nsrcs);</div><div class='add'>+</div><div class='add'>+		len += nsrcs * sizeof(struct in6_addr);</div><div class='add'>+		if (!ipv6_mc_may_pull(skb, len))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		memset(&amp;group, 0, sizeof(union amt_addr));</div><div class='add'>+		group.ip6 = grec-&gt;grec_mca;</div><div class='add'>+		memset(&amp;host, 0, sizeof(union amt_addr));</div><div class='add'>+		host.ip6 = ip6h-&gt;saddr;</div><div class='add'>+		gnode = amt_lookup_group(tunnel, &amp;group, &amp;host, true);</div><div class='add'>+		if (!gnode) {</div><div class='add'>+			gnode = amt_add_group(amt, tunnel, &amp;group, &amp;host,</div><div class='add'>+					      ETH_P_IPV6);</div><div class='add'>+			if (IS_ERR(gnode))</div><div class='add'>+				continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		amt_add_srcs(amt, tunnel, gnode, grec, true);</div><div class='add'>+		switch (grec-&gt;grec_type) {</div><div class='add'>+		case MLD2_MODE_IS_INCLUDE:</div><div class='add'>+			amt_mcast_is_in_handler(amt, tunnel, gnode, grec,</div><div class='add'>+						zero_grec, true);</div><div class='add'>+			break;</div><div class='add'>+		case MLD2_MODE_IS_EXCLUDE:</div><div class='add'>+			amt_mcast_is_ex_handler(amt, tunnel, gnode, grec,</div><div class='add'>+						zero_grec, true);</div><div class='add'>+			break;</div><div class='add'>+		case MLD2_CHANGE_TO_INCLUDE:</div><div class='add'>+			amt_mcast_to_in_handler(amt, tunnel, gnode, grec,</div><div class='add'>+						zero_grec, true);</div><div class='add'>+			break;</div><div class='add'>+		case MLD2_CHANGE_TO_EXCLUDE:</div><div class='add'>+			amt_mcast_to_ex_handler(amt, tunnel, gnode, grec,</div><div class='add'>+						zero_grec, true);</div><div class='add'>+			break;</div><div class='add'>+		case MLD2_ALLOW_NEW_SOURCES:</div><div class='add'>+			amt_mcast_allow_handler(amt, tunnel, gnode, grec,</div><div class='add'>+						zero_grec, true);</div><div class='add'>+			break;</div><div class='add'>+		case MLD2_BLOCK_OLD_SOURCES:</div><div class='add'>+			amt_mcast_block_handler(amt, tunnel, gnode, grec,</div><div class='add'>+						zero_grec, true);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		amt_cleanup_srcs(amt, tunnel, gnode);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* caller held tunnel-&gt;lock */</div><div class='add'>+static void amt_mld_report_handler(struct amt_dev *amt, struct sk_buff *skb,</div><div class='add'>+				   struct amt_tunnel_list *tunnel)</div><div class='add'>+{</div><div class='add'>+	struct mld_msg *mld = (struct mld_msg *)icmp6_hdr(skb);</div><div class='add'>+</div><div class='add'>+	switch (mld-&gt;mld_type) {</div><div class='add'>+	case ICMPV6_MGM_REPORT:</div><div class='add'>+		amt_mldv1_report_handler(amt, skb, tunnel);</div><div class='add'>+		break;</div><div class='add'>+	case ICMPV6_MLD2_REPORT:</div><div class='add'>+		amt_mldv2_report_handler(amt, skb, tunnel);</div><div class='add'>+		break;</div><div class='add'>+	case ICMPV6_MGM_REDUCTION:</div><div class='add'>+		amt_mldv1_leave_handler(amt, skb, tunnel);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static bool amt_advertisement_handler(struct amt_dev *amt, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct amt_header_advertisement *amta;</div><div class='add'>+	int hdr_size;</div><div class='add'>+</div><div class='add'>+	hdr_size = sizeof(*amta) + sizeof(struct udphdr);</div><div class='add'>+	if (!pskb_may_pull(skb, hdr_size))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	amta = (struct amt_header_advertisement *)(udp_hdr(skb) + 1);</div><div class='add'>+	if (!amta-&gt;ip4)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	if (amta-&gt;reserved || amta-&gt;version)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	if (ipv4_is_loopback(amta-&gt;ip4) || ipv4_is_multicast(amta-&gt;ip4) ||</div><div class='add'>+	    ipv4_is_zeronet(amta-&gt;ip4))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	if (amt-&gt;status != AMT_STATUS_SENT_DISCOVERY ||</div><div class='add'>+	    amt-&gt;nonce != amta-&gt;nonce)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	amt-&gt;remote_ip = amta-&gt;ip4;</div><div class='add'>+	netdev_dbg(amt-&gt;dev, "advertised remote ip = %pI4\n", &amp;amt-&gt;remote_ip);</div><div class='add'>+	mod_delayed_work(amt_wq, &amp;amt-&gt;req_wq, 0);</div><div class='add'>+</div><div class='add'>+	amt_update_gw_status(amt, AMT_STATUS_RECEIVED_ADVERTISEMENT, true);</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool amt_multicast_data_handler(struct amt_dev *amt, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct amt_header_mcast_data *amtmd;</div><div class='add'>+	int hdr_size, len, err;</div><div class='add'>+	struct ethhdr *eth;</div><div class='add'>+	struct iphdr *iph;</div><div class='add'>+</div><div class='add'>+	if (READ_ONCE(amt-&gt;status) != AMT_STATUS_SENT_UPDATE)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	hdr_size = sizeof(*amtmd) + sizeof(struct udphdr);</div><div class='add'>+	if (!pskb_may_pull(skb, hdr_size))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	amtmd = (struct amt_header_mcast_data *)(udp_hdr(skb) + 1);</div><div class='add'>+	if (amtmd-&gt;reserved || amtmd-&gt;version)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	if (iptunnel_pull_header(skb, hdr_size, htons(ETH_P_IP), false))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	skb_reset_network_header(skb);</div><div class='add'>+	skb_push(skb, sizeof(*eth));</div><div class='add'>+	skb_reset_mac_header(skb);</div><div class='add'>+	skb_pull(skb, sizeof(*eth));</div><div class='add'>+	eth = eth_hdr(skb);</div><div class='add'>+</div><div class='add'>+	if (!pskb_may_pull(skb, sizeof(*iph)))</div><div class='add'>+		return true;</div><div class='add'>+	iph = ip_hdr(skb);</div><div class='add'>+</div><div class='add'>+	if (iph-&gt;version == 4) {</div><div class='add'>+		if (!ipv4_is_multicast(iph-&gt;daddr))</div><div class='add'>+			return true;</div><div class='add'>+		skb-&gt;protocol = htons(ETH_P_IP);</div><div class='add'>+		eth-&gt;h_proto = htons(ETH_P_IP);</div><div class='add'>+		ip_eth_mc_map(iph-&gt;daddr, eth-&gt;h_dest);</div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+	} else if (iph-&gt;version == 6) {</div><div class='add'>+		struct ipv6hdr *ip6h;</div><div class='add'>+</div><div class='add'>+		if (!pskb_may_pull(skb, sizeof(*ip6h)))</div><div class='add'>+			return true;</div><div class='add'>+</div><div class='add'>+		ip6h = ipv6_hdr(skb);</div><div class='add'>+		if (!ipv6_addr_is_multicast(&amp;ip6h-&gt;daddr))</div><div class='add'>+			return true;</div><div class='add'>+		skb-&gt;protocol = htons(ETH_P_IPV6);</div><div class='add'>+		eth-&gt;h_proto = htons(ETH_P_IPV6);</div><div class='add'>+		ipv6_eth_mc_map(&amp;ip6h-&gt;daddr, eth-&gt;h_dest);</div><div class='add'>+#endif</div><div class='add'>+	} else {</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb-&gt;pkt_type = PACKET_MULTICAST;</div><div class='add'>+	skb-&gt;ip_summed = CHECKSUM_NONE;</div><div class='add'>+	len = skb-&gt;len;</div><div class='add'>+	err = gro_cells_receive(&amp;amt-&gt;gro_cells, skb);</div><div class='add'>+	if (likely(err == NET_RX_SUCCESS))</div><div class='add'>+		dev_sw_netstats_rx_add(amt-&gt;dev, len);</div><div class='add'>+	else</div><div class='add'>+		amt-&gt;dev-&gt;stats.rx_dropped++;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool amt_membership_query_handler(struct amt_dev *amt,</div><div class='add'>+					 struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct amt_header_membership_query *amtmq;</div><div class='add'>+	struct igmpv3_query *ihv3;</div><div class='add'>+	struct ethhdr *eth, *oeth;</div><div class='add'>+	struct iphdr *iph;</div><div class='add'>+	int hdr_size, len;</div><div class='add'>+</div><div class='add'>+	hdr_size = sizeof(*amtmq) + sizeof(struct udphdr);</div><div class='add'>+	if (!pskb_may_pull(skb, hdr_size))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	amtmq = (struct amt_header_membership_query *)(udp_hdr(skb) + 1);</div><div class='add'>+	if (amtmq-&gt;reserved || amtmq-&gt;version)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	if (amtmq-&gt;nonce != amt-&gt;nonce)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	hdr_size -= sizeof(*eth);</div><div class='add'>+	if (iptunnel_pull_header(skb, hdr_size, htons(ETH_P_TEB), false))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	oeth = eth_hdr(skb);</div><div class='add'>+	skb_reset_mac_header(skb);</div><div class='add'>+	skb_pull(skb, sizeof(*eth));</div><div class='add'>+	skb_reset_network_header(skb);</div><div class='add'>+	eth = eth_hdr(skb);</div><div class='add'>+	if (!pskb_may_pull(skb, sizeof(*iph)))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	iph = ip_hdr(skb);</div><div class='add'>+	if (iph-&gt;version == 4) {</div><div class='add'>+		if (READ_ONCE(amt-&gt;ready4))</div><div class='add'>+			return true;</div><div class='add'>+</div><div class='add'>+		if (!pskb_may_pull(skb, sizeof(*iph) + AMT_IPHDR_OPTS +</div><div class='add'>+				   sizeof(*ihv3)))</div><div class='add'>+			return true;</div><div class='add'>+</div><div class='add'>+		if (!ipv4_is_multicast(iph-&gt;daddr))</div><div class='add'>+			return true;</div><div class='add'>+</div><div class='add'>+		ihv3 = skb_pull(skb, sizeof(*iph) + AMT_IPHDR_OPTS);</div><div class='add'>+		skb_reset_transport_header(skb);</div><div class='add'>+		skb_push(skb, sizeof(*iph) + AMT_IPHDR_OPTS);</div><div class='add'>+		WRITE_ONCE(amt-&gt;ready4, true);</div><div class='add'>+		amt-&gt;mac = amtmq-&gt;response_mac;</div><div class='add'>+		amt-&gt;req_cnt = 0;</div><div class='add'>+		amt-&gt;qi = ihv3-&gt;qqic;</div><div class='add'>+		skb-&gt;protocol = htons(ETH_P_IP);</div><div class='add'>+		eth-&gt;h_proto = htons(ETH_P_IP);</div><div class='add'>+		ip_eth_mc_map(iph-&gt;daddr, eth-&gt;h_dest);</div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+	} else if (iph-&gt;version == 6) {</div><div class='add'>+		struct mld2_query *mld2q;</div><div class='add'>+		struct ipv6hdr *ip6h;</div><div class='add'>+</div><div class='add'>+		if (READ_ONCE(amt-&gt;ready6))</div><div class='add'>+			return true;</div><div class='add'>+</div><div class='add'>+		if (!pskb_may_pull(skb, sizeof(*ip6h) + AMT_IP6HDR_OPTS +</div><div class='add'>+				   sizeof(*mld2q)))</div><div class='add'>+			return true;</div><div class='add'>+</div><div class='add'>+		ip6h = ipv6_hdr(skb);</div><div class='add'>+		if (!ipv6_addr_is_multicast(&amp;ip6h-&gt;daddr))</div><div class='add'>+			return true;</div><div class='add'>+</div><div class='add'>+		mld2q = skb_pull(skb, sizeof(*ip6h) + AMT_IP6HDR_OPTS);</div><div class='add'>+		skb_reset_transport_header(skb);</div><div class='add'>+		skb_push(skb, sizeof(*ip6h) + AMT_IP6HDR_OPTS);</div><div class='add'>+		WRITE_ONCE(amt-&gt;ready6, true);</div><div class='add'>+		amt-&gt;mac = amtmq-&gt;response_mac;</div><div class='add'>+		amt-&gt;req_cnt = 0;</div><div class='add'>+		amt-&gt;qi = mld2q-&gt;mld2q_qqic;</div><div class='add'>+		skb-&gt;protocol = htons(ETH_P_IPV6);</div><div class='add'>+		eth-&gt;h_proto = htons(ETH_P_IPV6);</div><div class='add'>+		ipv6_eth_mc_map(&amp;ip6h-&gt;daddr, eth-&gt;h_dest);</div><div class='add'>+#endif</div><div class='add'>+	} else {</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ether_addr_copy(eth-&gt;h_source, oeth-&gt;h_source);</div><div class='add'>+	skb-&gt;pkt_type = PACKET_MULTICAST;</div><div class='add'>+	skb-&gt;ip_summed = CHECKSUM_NONE;</div><div class='add'>+	len = skb-&gt;len;</div><div class='add'>+	local_bh_disable();</div><div class='add'>+	if (__netif_rx(skb) == NET_RX_SUCCESS) {</div><div class='add'>+		amt_update_gw_status(amt, AMT_STATUS_RECEIVED_QUERY, true);</div><div class='add'>+		dev_sw_netstats_rx_add(amt-&gt;dev, len);</div><div class='add'>+	} else {</div><div class='add'>+		amt-&gt;dev-&gt;stats.rx_dropped++;</div><div class='add'>+	}</div><div class='add'>+	local_bh_enable();</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool amt_update_handler(struct amt_dev *amt, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct amt_header_membership_update *amtmu;</div><div class='add'>+	struct amt_tunnel_list *tunnel;</div><div class='add'>+	struct ethhdr *eth;</div><div class='add'>+	struct iphdr *iph;</div><div class='add'>+	int len, hdr_size;</div><div class='add'>+</div><div class='add'>+	iph = ip_hdr(skb);</div><div class='add'>+</div><div class='add'>+	hdr_size = sizeof(*amtmu) + sizeof(struct udphdr);</div><div class='add'>+	if (!pskb_may_pull(skb, hdr_size))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	amtmu = (struct amt_header_membership_update *)(udp_hdr(skb) + 1);</div><div class='add'>+	if (amtmu-&gt;reserved || amtmu-&gt;version)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	if (iptunnel_pull_header(skb, hdr_size, skb-&gt;protocol, false))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	skb_reset_network_header(skb);</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_rcu(tunnel, &amp;amt-&gt;tunnel_list, list) {</div><div class='add'>+		if (tunnel-&gt;ip4 == iph-&gt;saddr) {</div><div class='add'>+			if ((amtmu-&gt;nonce == tunnel-&gt;nonce &amp;&amp;</div><div class='add'>+			     amtmu-&gt;response_mac == tunnel-&gt;mac)) {</div><div class='add'>+				mod_delayed_work(amt_wq, &amp;tunnel-&gt;gc_wq,</div><div class='add'>+						 msecs_to_jiffies(amt_gmi(amt))</div><div class='add'>+								  * 3);</div><div class='add'>+				goto report;</div><div class='add'>+			} else {</div><div class='add'>+				netdev_dbg(amt-&gt;dev, "Invalid MAC\n");</div><div class='add'>+				return true;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+</div><div class='add'>+report:</div><div class='add'>+	if (!pskb_may_pull(skb, sizeof(*iph)))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	iph = ip_hdr(skb);</div><div class='add'>+	if (iph-&gt;version == 4) {</div><div class='add'>+		if (ip_mc_check_igmp(skb)) {</div><div class='add'>+			netdev_dbg(amt-&gt;dev, "Invalid IGMP\n");</div><div class='add'>+			return true;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		spin_lock_bh(&amp;tunnel-&gt;lock);</div><div class='add'>+		amt_igmp_report_handler(amt, skb, tunnel);</div><div class='add'>+		spin_unlock_bh(&amp;tunnel-&gt;lock);</div><div class='add'>+</div><div class='add'>+		skb_push(skb, sizeof(struct ethhdr));</div><div class='add'>+		skb_reset_mac_header(skb);</div><div class='add'>+		eth = eth_hdr(skb);</div><div class='add'>+		skb-&gt;protocol = htons(ETH_P_IP);</div><div class='add'>+		eth-&gt;h_proto = htons(ETH_P_IP);</div><div class='add'>+		ip_eth_mc_map(iph-&gt;daddr, eth-&gt;h_dest);</div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+	} else if (iph-&gt;version == 6) {</div><div class='add'>+		struct ipv6hdr *ip6h = ipv6_hdr(skb);</div><div class='add'>+</div><div class='add'>+		if (ipv6_mc_check_mld(skb)) {</div><div class='add'>+			netdev_dbg(amt-&gt;dev, "Invalid MLD\n");</div><div class='add'>+			return true;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		spin_lock_bh(&amp;tunnel-&gt;lock);</div><div class='add'>+		amt_mld_report_handler(amt, skb, tunnel);</div><div class='add'>+		spin_unlock_bh(&amp;tunnel-&gt;lock);</div><div class='add'>+</div><div class='add'>+		skb_push(skb, sizeof(struct ethhdr));</div><div class='add'>+		skb_reset_mac_header(skb);</div><div class='add'>+		eth = eth_hdr(skb);</div><div class='add'>+		skb-&gt;protocol = htons(ETH_P_IPV6);</div><div class='add'>+		eth-&gt;h_proto = htons(ETH_P_IPV6);</div><div class='add'>+		ipv6_eth_mc_map(&amp;ip6h-&gt;daddr, eth-&gt;h_dest);</div><div class='add'>+#endif</div><div class='add'>+	} else {</div><div class='add'>+		netdev_dbg(amt-&gt;dev, "Unsupported Protocol\n");</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb_pull(skb, sizeof(struct ethhdr));</div><div class='add'>+	skb-&gt;pkt_type = PACKET_MULTICAST;</div><div class='add'>+	skb-&gt;ip_summed = CHECKSUM_NONE;</div><div class='add'>+	len = skb-&gt;len;</div><div class='add'>+	if (__netif_rx(skb) == NET_RX_SUCCESS) {</div><div class='add'>+		amt_update_relay_status(tunnel, AMT_STATUS_RECEIVED_UPDATE,</div><div class='add'>+					true);</div><div class='add'>+		dev_sw_netstats_rx_add(amt-&gt;dev, len);</div><div class='add'>+	} else {</div><div class='add'>+		amt-&gt;dev-&gt;stats.rx_dropped++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amt_send_advertisement(struct amt_dev *amt, __be32 nonce,</div><div class='add'>+				   __be32 daddr, __be16 dport)</div><div class='add'>+{</div><div class='add'>+	struct amt_header_advertisement *amta;</div><div class='add'>+	int hlen, tlen, offset;</div><div class='add'>+	struct socket *sock;</div><div class='add'>+	struct udphdr *udph;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct iphdr *iph;</div><div class='add'>+	struct rtable *rt;</div><div class='add'>+	struct flowi4 fl4;</div><div class='add'>+	u32 len;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	sock = rcu_dereference(amt-&gt;sock);</div><div class='add'>+	if (!sock)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (!netif_running(amt-&gt;stream_dev) || !netif_running(amt-&gt;dev))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	rt = ip_route_output_ports(amt-&gt;net, &amp;fl4, sock-&gt;sk,</div><div class='add'>+				   daddr, amt-&gt;local_ip,</div><div class='add'>+				   dport, amt-&gt;relay_port,</div><div class='add'>+				   IPPROTO_UDP, 0,</div><div class='add'>+				   amt-&gt;stream_dev-&gt;ifindex);</div><div class='add'>+	if (IS_ERR(rt)) {</div><div class='add'>+		amt-&gt;dev-&gt;stats.tx_errors++;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hlen = LL_RESERVED_SPACE(amt-&gt;dev);</div><div class='add'>+	tlen = amt-&gt;dev-&gt;needed_tailroom;</div><div class='add'>+	len = hlen + tlen + sizeof(*iph) + sizeof(*udph) + sizeof(*amta);</div><div class='add'>+	skb = netdev_alloc_skb_ip_align(amt-&gt;dev, len);</div><div class='add'>+	if (!skb) {</div><div class='add'>+		ip_rt_put(rt);</div><div class='add'>+		amt-&gt;dev-&gt;stats.tx_errors++;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb-&gt;priority = TC_PRIO_CONTROL;</div><div class='add'>+	skb_dst_set(skb, &amp;rt-&gt;dst);</div><div class='add'>+</div><div class='add'>+	len = sizeof(*iph) + sizeof(*udph) + sizeof(*amta);</div><div class='add'>+	skb_reset_network_header(skb);</div><div class='add'>+	skb_put(skb, len);</div><div class='add'>+	amta = skb_pull(skb, sizeof(*iph) + sizeof(*udph));</div><div class='add'>+	amta-&gt;version	= 0;</div><div class='add'>+	amta-&gt;type	= AMT_MSG_ADVERTISEMENT;</div><div class='add'>+	amta-&gt;reserved	= 0;</div><div class='add'>+	amta-&gt;nonce	= nonce;</div><div class='add'>+	amta-&gt;ip4	= amt-&gt;local_ip;</div><div class='add'>+	skb_push(skb, sizeof(*udph));</div><div class='add'>+	skb_reset_transport_header(skb);</div><div class='add'>+	udph		= udp_hdr(skb);</div><div class='add'>+	udph-&gt;source	= amt-&gt;relay_port;</div><div class='add'>+	udph-&gt;dest	= dport;</div><div class='add'>+	udph-&gt;len	= htons(sizeof(*amta) + sizeof(*udph));</div><div class='add'>+	udph-&gt;check	= 0;</div><div class='add'>+	offset = skb_transport_offset(skb);</div><div class='add'>+	skb-&gt;csum = skb_checksum(skb, offset, skb-&gt;len - offset, 0);</div><div class='add'>+	udph-&gt;check = csum_tcpudp_magic(amt-&gt;local_ip, daddr,</div><div class='add'>+					sizeof(*udph) + sizeof(*amta),</div><div class='add'>+					IPPROTO_UDP, skb-&gt;csum);</div><div class='add'>+</div><div class='add'>+	skb_push(skb, sizeof(*iph));</div><div class='add'>+	iph		= ip_hdr(skb);</div><div class='add'>+	iph-&gt;version	= 4;</div><div class='add'>+	iph-&gt;ihl	= (sizeof(struct iphdr)) &gt;&gt; 2;</div><div class='add'>+	iph-&gt;tos	= AMT_TOS;</div><div class='add'>+	iph-&gt;frag_off	= 0;</div><div class='add'>+	iph-&gt;ttl	= ip4_dst_hoplimit(&amp;rt-&gt;dst);</div><div class='add'>+	iph-&gt;daddr	= daddr;</div><div class='add'>+	iph-&gt;saddr	= amt-&gt;local_ip;</div><div class='add'>+	iph-&gt;protocol	= IPPROTO_UDP;</div><div class='add'>+	iph-&gt;tot_len	= htons(len);</div><div class='add'>+</div><div class='add'>+	skb-&gt;ip_summed = CHECKSUM_NONE;</div><div class='add'>+	ip_select_ident(amt-&gt;net, skb, NULL);</div><div class='add'>+	ip_send_check(iph);</div><div class='add'>+	err = ip_local_out(amt-&gt;net, sock-&gt;sk, skb);</div><div class='add'>+	if (unlikely(net_xmit_eval(err)))</div><div class='add'>+		amt-&gt;dev-&gt;stats.tx_errors++;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool amt_discovery_handler(struct amt_dev *amt, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct amt_header_discovery *amtd;</div><div class='add'>+	struct udphdr *udph;</div><div class='add'>+	struct iphdr *iph;</div><div class='add'>+</div><div class='add'>+	if (!pskb_may_pull(skb, sizeof(*udph) + sizeof(*amtd)))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	iph = ip_hdr(skb);</div><div class='add'>+	udph = udp_hdr(skb);</div><div class='add'>+	amtd = (struct amt_header_discovery *)(udp_hdr(skb) + 1);</div><div class='add'>+</div><div class='add'>+	if (amtd-&gt;reserved || amtd-&gt;version)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	amt_send_advertisement(amt, amtd-&gt;nonce, iph-&gt;saddr, udph-&gt;source);</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool amt_request_handler(struct amt_dev *amt, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct amt_header_request *amtrh;</div><div class='add'>+	struct amt_tunnel_list *tunnel;</div><div class='add'>+	unsigned long long key;</div><div class='add'>+	struct udphdr *udph;</div><div class='add'>+	struct iphdr *iph;</div><div class='add'>+	u64 mac;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!pskb_may_pull(skb, sizeof(*udph) + sizeof(*amtrh)))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	iph = ip_hdr(skb);</div><div class='add'>+	udph = udp_hdr(skb);</div><div class='add'>+	amtrh = (struct amt_header_request *)(udp_hdr(skb) + 1);</div><div class='add'>+</div><div class='add'>+	if (amtrh-&gt;reserved1 || amtrh-&gt;reserved2 || amtrh-&gt;version)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_rcu(tunnel, &amp;amt-&gt;tunnel_list, list)</div><div class='add'>+		if (tunnel-&gt;ip4 == iph-&gt;saddr)</div><div class='add'>+			goto send;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;amt-&gt;lock);</div><div class='add'>+	if (amt-&gt;nr_tunnels &gt;= amt-&gt;max_tunnels) {</div><div class='add'>+		spin_unlock_bh(&amp;amt-&gt;lock);</div><div class='add'>+		icmp_ndo_send(skb, ICMP_DEST_UNREACH, ICMP_HOST_UNREACH, 0);</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tunnel = kzalloc(sizeof(*tunnel) +</div><div class='add'>+			 (sizeof(struct hlist_head) * amt-&gt;hash_buckets),</div><div class='add'>+			 GFP_ATOMIC);</div><div class='add'>+	if (!tunnel) {</div><div class='add'>+		spin_unlock_bh(&amp;amt-&gt;lock);</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tunnel-&gt;source_port = udph-&gt;source;</div><div class='add'>+	tunnel-&gt;ip4 = iph-&gt;saddr;</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;key, &amp;tunnel-&gt;key, sizeof(unsigned long long));</div><div class='add'>+	tunnel-&gt;amt = amt;</div><div class='add'>+	spin_lock_init(&amp;tunnel-&gt;lock);</div><div class='add'>+	for (i = 0; i &lt; amt-&gt;hash_buckets; i++)</div><div class='add'>+		INIT_HLIST_HEAD(&amp;tunnel-&gt;groups[i]);</div><div class='add'>+</div><div class='add'>+	INIT_DELAYED_WORK(&amp;tunnel-&gt;gc_wq, amt_tunnel_expire);</div><div class='add'>+</div><div class='add'>+	list_add_tail_rcu(&amp;tunnel-&gt;list, &amp;amt-&gt;tunnel_list);</div><div class='add'>+	tunnel-&gt;key = amt-&gt;key;</div><div class='add'>+	__amt_update_relay_status(tunnel, AMT_STATUS_RECEIVED_REQUEST, true);</div><div class='add'>+	amt-&gt;nr_tunnels++;</div><div class='add'>+	mod_delayed_work(amt_wq, &amp;tunnel-&gt;gc_wq,</div><div class='add'>+			 msecs_to_jiffies(amt_gmi(amt)));</div><div class='add'>+	spin_unlock_bh(&amp;amt-&gt;lock);</div><div class='add'>+</div><div class='add'>+send:</div><div class='add'>+	tunnel-&gt;nonce = amtrh-&gt;nonce;</div><div class='add'>+	mac = siphash_3u32((__force u32)tunnel-&gt;ip4,</div><div class='add'>+			   (__force u32)tunnel-&gt;source_port,</div><div class='add'>+			   (__force u32)tunnel-&gt;nonce,</div><div class='add'>+			   &amp;tunnel-&gt;key);</div><div class='add'>+	tunnel-&gt;mac = mac &gt;&gt; 16;</div><div class='add'>+</div><div class='add'>+	if (!netif_running(amt-&gt;dev) || !netif_running(amt-&gt;stream_dev))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	if (!amtrh-&gt;p)</div><div class='add'>+		amt_send_igmp_gq(amt, tunnel);</div><div class='add'>+	else</div><div class='add'>+		amt_send_mld_gq(amt, tunnel);</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amt_gw_rcv(struct amt_dev *amt, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	int type = amt_parse_type(skb);</div><div class='add'>+	int err = 1;</div><div class='add'>+</div><div class='add'>+	if (type == -1)</div><div class='add'>+		goto drop;</div><div class='add'>+</div><div class='add'>+	if (amt-&gt;mode == AMT_MODE_GATEWAY) {</div><div class='add'>+		switch (type) {</div><div class='add'>+		case AMT_MSG_ADVERTISEMENT:</div><div class='add'>+			err = amt_advertisement_handler(amt, skb);</div><div class='add'>+			break;</div><div class='add'>+		case AMT_MSG_MEMBERSHIP_QUERY:</div><div class='add'>+			err = amt_membership_query_handler(amt, skb);</div><div class='add'>+			if (!err)</div><div class='add'>+				return;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			netdev_dbg(amt-&gt;dev, "Invalid type of Gateway\n");</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+drop:</div><div class='add'>+	if (err) {</div><div class='add'>+		amt-&gt;dev-&gt;stats.rx_dropped++;</div><div class='add'>+		kfree_skb(skb);</div><div class='add'>+	} else {</div><div class='add'>+		consume_skb(skb);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int amt_rcv(struct sock *sk, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct amt_dev *amt;</div><div class='add'>+	struct iphdr *iph;</div><div class='add'>+	int type;</div><div class='add'>+	bool err;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock_bh();</div><div class='add'>+	amt = rcu_dereference_sk_user_data(sk);</div><div class='add'>+	if (!amt) {</div><div class='add'>+		err = true;</div><div class='add'>+		kfree_skb(skb);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb-&gt;dev = amt-&gt;dev;</div><div class='add'>+	iph = ip_hdr(skb);</div><div class='add'>+	type = amt_parse_type(skb);</div><div class='add'>+	if (type == -1) {</div><div class='add'>+		err = true;</div><div class='add'>+		goto drop;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (amt-&gt;mode == AMT_MODE_GATEWAY) {</div><div class='add'>+		switch (type) {</div><div class='add'>+		case AMT_MSG_ADVERTISEMENT:</div><div class='add'>+			if (iph-&gt;saddr != amt-&gt;discovery_ip) {</div><div class='add'>+				netdev_dbg(amt-&gt;dev, "Invalid Relay IP\n");</div><div class='add'>+				err = true;</div><div class='add'>+				goto drop;</div><div class='add'>+			}</div><div class='add'>+			if (amt_queue_event(amt, AMT_EVENT_RECEIVE, skb)) {</div><div class='add'>+				netdev_dbg(amt-&gt;dev, "AMT Event queue full\n");</div><div class='add'>+				err = true;</div><div class='add'>+				goto drop;</div><div class='add'>+			}</div><div class='add'>+			goto out;</div><div class='add'>+		case AMT_MSG_MULTICAST_DATA:</div><div class='add'>+			if (iph-&gt;saddr != amt-&gt;remote_ip) {</div><div class='add'>+				netdev_dbg(amt-&gt;dev, "Invalid Relay IP\n");</div><div class='add'>+				err = true;</div><div class='add'>+				goto drop;</div><div class='add'>+			}</div><div class='add'>+			err = amt_multicast_data_handler(amt, skb);</div><div class='add'>+			if (err)</div><div class='add'>+				goto drop;</div><div class='add'>+			else</div><div class='add'>+				goto out;</div><div class='add'>+		case AMT_MSG_MEMBERSHIP_QUERY:</div><div class='add'>+			if (iph-&gt;saddr != amt-&gt;remote_ip) {</div><div class='add'>+				netdev_dbg(amt-&gt;dev, "Invalid Relay IP\n");</div><div class='add'>+				err = true;</div><div class='add'>+				goto drop;</div><div class='add'>+			}</div><div class='add'>+			if (amt_queue_event(amt, AMT_EVENT_RECEIVE, skb)) {</div><div class='add'>+				netdev_dbg(amt-&gt;dev, "AMT Event queue full\n");</div><div class='add'>+				err = true;</div><div class='add'>+				goto drop;</div><div class='add'>+			}</div><div class='add'>+			goto out;</div><div class='add'>+		default:</div><div class='add'>+			err = true;</div><div class='add'>+			netdev_dbg(amt-&gt;dev, "Invalid type of Gateway\n");</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		switch (type) {</div><div class='add'>+		case AMT_MSG_DISCOVERY:</div><div class='add'>+			err = amt_discovery_handler(amt, skb);</div><div class='add'>+			break;</div><div class='add'>+		case AMT_MSG_REQUEST:</div><div class='add'>+			err = amt_request_handler(amt, skb);</div><div class='add'>+			break;</div><div class='add'>+		case AMT_MSG_MEMBERSHIP_UPDATE:</div><div class='add'>+			err = amt_update_handler(amt, skb);</div><div class='add'>+			if (err)</div><div class='add'>+				goto drop;</div><div class='add'>+			else</div><div class='add'>+				goto out;</div><div class='add'>+		default:</div><div class='add'>+			err = true;</div><div class='add'>+			netdev_dbg(amt-&gt;dev, "Invalid type of relay\n");</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+drop:</div><div class='add'>+	if (err) {</div><div class='add'>+		amt-&gt;dev-&gt;stats.rx_dropped++;</div><div class='add'>+		kfree_skb(skb);</div><div class='add'>+	} else {</div><div class='add'>+		consume_skb(skb);</div><div class='add'>+	}</div><div class='add'>+out:</div><div class='add'>+	rcu_read_unlock_bh();</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amt_event_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct amt_dev *amt = container_of(work, struct amt_dev, event_wq);</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	u8 event;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; AMT_MAX_EVENTS; i++) {</div><div class='add'>+		spin_lock_bh(&amp;amt-&gt;lock);</div><div class='add'>+		if (amt-&gt;nr_events == 0) {</div><div class='add'>+			spin_unlock_bh(&amp;amt-&gt;lock);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+		event = amt-&gt;events[amt-&gt;event_idx].event;</div><div class='add'>+		skb = amt-&gt;events[amt-&gt;event_idx].skb;</div><div class='add'>+		amt-&gt;events[amt-&gt;event_idx].event = AMT_EVENT_NONE;</div><div class='add'>+		amt-&gt;events[amt-&gt;event_idx].skb = NULL;</div><div class='add'>+		amt-&gt;nr_events--;</div><div class='add'>+		amt-&gt;event_idx++;</div><div class='add'>+		amt-&gt;event_idx %= AMT_MAX_EVENTS;</div><div class='add'>+		spin_unlock_bh(&amp;amt-&gt;lock);</div><div class='add'>+</div><div class='add'>+		switch (event) {</div><div class='add'>+		case AMT_EVENT_RECEIVE:</div><div class='add'>+			amt_gw_rcv(amt, skb);</div><div class='add'>+			break;</div><div class='add'>+		case AMT_EVENT_SEND_DISCOVERY:</div><div class='add'>+			amt_event_send_discovery(amt);</div><div class='add'>+			break;</div><div class='add'>+		case AMT_EVENT_SEND_REQUEST:</div><div class='add'>+			amt_event_send_request(amt);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			kfree_skb(skb);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int amt_err_lookup(struct sock *sk, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct amt_dev *amt;</div><div class='add'>+	int type;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock_bh();</div><div class='add'>+	amt = rcu_dereference_sk_user_data(sk);</div><div class='add'>+	if (!amt)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (amt-&gt;mode != AMT_MODE_GATEWAY)</div><div class='add'>+		goto drop;</div><div class='add'>+</div><div class='add'>+	type = amt_parse_type(skb);</div><div class='add'>+	if (type == -1)</div><div class='add'>+		goto drop;</div><div class='add'>+</div><div class='add'>+	netdev_dbg(amt-&gt;dev, "Received IGMP Unreachable of %s\n",</div><div class='add'>+		   type_str[type]);</div><div class='add'>+	switch (type) {</div><div class='add'>+	case AMT_MSG_DISCOVERY:</div><div class='add'>+		break;</div><div class='add'>+	case AMT_MSG_REQUEST:</div><div class='add'>+	case AMT_MSG_MEMBERSHIP_UPDATE:</div><div class='add'>+		if (READ_ONCE(amt-&gt;status) &gt;= AMT_STATUS_RECEIVED_ADVERTISEMENT)</div><div class='add'>+			mod_delayed_work(amt_wq, &amp;amt-&gt;req_wq, 0);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		goto drop;</div><div class='add'>+	}</div><div class='add'>+out:</div><div class='add'>+	rcu_read_unlock_bh();</div><div class='add'>+	return 0;</div><div class='add'>+drop:</div><div class='add'>+	rcu_read_unlock_bh();</div><div class='add'>+	amt-&gt;dev-&gt;stats.rx_dropped++;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct socket *amt_create_sock(struct net *net, __be16 port)</div><div class='add'>+{</div><div class='add'>+	struct udp_port_cfg udp_conf;</div><div class='add'>+	struct socket *sock;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	memset(&amp;udp_conf, 0, sizeof(udp_conf));</div><div class='add'>+	udp_conf.family = AF_INET;</div><div class='add'>+	udp_conf.local_ip.s_addr = htonl(INADDR_ANY);</div><div class='add'>+</div><div class='add'>+	udp_conf.local_udp_port = port;</div><div class='add'>+</div><div class='add'>+	err = udp_sock_create(net, &amp;udp_conf, &amp;sock);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		return ERR_PTR(err);</div><div class='add'>+</div><div class='add'>+	return sock;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int amt_socket_create(struct amt_dev *amt)</div><div class='add'>+{</div><div class='add'>+	struct udp_tunnel_sock_cfg tunnel_cfg;</div><div class='add'>+	struct socket *sock;</div><div class='add'>+</div><div class='add'>+	sock = amt_create_sock(amt-&gt;net, amt-&gt;relay_port);</div><div class='add'>+	if (IS_ERR(sock))</div><div class='add'>+		return PTR_ERR(sock);</div><div class='add'>+</div><div class='add'>+	/* Mark socket as an encapsulation socket */</div><div class='add'>+	memset(&amp;tunnel_cfg, 0, sizeof(tunnel_cfg));</div><div class='add'>+	tunnel_cfg.sk_user_data = amt;</div><div class='add'>+	tunnel_cfg.encap_type = 1;</div><div class='add'>+	tunnel_cfg.encap_rcv = amt_rcv;</div><div class='add'>+	tunnel_cfg.encap_err_lookup = amt_err_lookup;</div><div class='add'>+	tunnel_cfg.encap_destroy = NULL;</div><div class='add'>+	setup_udp_tunnel_sock(amt-&gt;net, sock, &amp;tunnel_cfg);</div><div class='add'>+</div><div class='add'>+	rcu_assign_pointer(amt-&gt;sock, sock);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int amt_dev_open(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct amt_dev *amt = netdev_priv(dev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	amt-&gt;ready4 = false;</div><div class='add'>+	amt-&gt;ready6 = false;</div><div class='add'>+	amt-&gt;event_idx = 0;</div><div class='add'>+	amt-&gt;nr_events = 0;</div><div class='add'>+</div><div class='add'>+	err = amt_socket_create(amt);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	amt-&gt;req_cnt = 0;</div><div class='add'>+	amt-&gt;remote_ip = 0;</div><div class='add'>+	amt-&gt;nonce = 0;</div><div class='add'>+	get_random_bytes(&amp;amt-&gt;key, sizeof(siphash_key_t));</div><div class='add'>+</div><div class='add'>+	amt-&gt;status = AMT_STATUS_INIT;</div><div class='add'>+	if (amt-&gt;mode == AMT_MODE_GATEWAY) {</div><div class='add'>+		mod_delayed_work(amt_wq, &amp;amt-&gt;discovery_wq, 0);</div><div class='add'>+		mod_delayed_work(amt_wq, &amp;amt-&gt;req_wq, 0);</div><div class='add'>+	} else if (amt-&gt;mode == AMT_MODE_RELAY) {</div><div class='add'>+		mod_delayed_work(amt_wq, &amp;amt-&gt;secret_wq,</div><div class='add'>+				 msecs_to_jiffies(AMT_SECRET_TIMEOUT));</div><div class='add'>+	}</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int amt_dev_stop(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct amt_dev *amt = netdev_priv(dev);</div><div class='add'>+	struct amt_tunnel_list *tunnel, *tmp;</div><div class='add'>+	struct socket *sock;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	cancel_delayed_work_sync(&amp;amt-&gt;req_wq);</div><div class='add'>+	cancel_delayed_work_sync(&amp;amt-&gt;discovery_wq);</div><div class='add'>+	cancel_delayed_work_sync(&amp;amt-&gt;secret_wq);</div><div class='add'>+</div><div class='add'>+	/* shutdown */</div><div class='add'>+	sock = rtnl_dereference(amt-&gt;sock);</div><div class='add'>+	RCU_INIT_POINTER(amt-&gt;sock, NULL);</div><div class='add'>+	synchronize_net();</div><div class='add'>+	if (sock)</div><div class='add'>+		udp_tunnel_sock_release(sock);</div><div class='add'>+</div><div class='add'>+	cancel_work_sync(&amp;amt-&gt;event_wq);</div><div class='add'>+	for (i = 0; i &lt; AMT_MAX_EVENTS; i++) {</div><div class='add'>+		skb = amt-&gt;events[i].skb;</div><div class='add'>+		kfree_skb(skb);</div><div class='add'>+		amt-&gt;events[i].event = AMT_EVENT_NONE;</div><div class='add'>+		amt-&gt;events[i].skb = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	amt-&gt;ready4 = false;</div><div class='add'>+	amt-&gt;ready6 = false;</div><div class='add'>+	amt-&gt;req_cnt = 0;</div><div class='add'>+	amt-&gt;remote_ip = 0;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_safe(tunnel, tmp, &amp;amt-&gt;tunnel_list, list) {</div><div class='add'>+		list_del_rcu(&amp;tunnel-&gt;list);</div><div class='add'>+		amt-&gt;nr_tunnels--;</div><div class='add'>+		cancel_delayed_work_sync(&amp;tunnel-&gt;gc_wq);</div><div class='add'>+		amt_clear_groups(tunnel);</div><div class='add'>+		kfree_rcu(tunnel, rcu);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct device_type amt_type = {</div><div class='add'>+	.name = "amt",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int amt_dev_init(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct amt_dev *amt = netdev_priv(dev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	amt-&gt;dev = dev;</div><div class='add'>+</div><div class='add'>+	err = gro_cells_init(&amp;amt-&gt;gro_cells, dev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amt_dev_uninit(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct amt_dev *amt = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	gro_cells_destroy(&amp;amt-&gt;gro_cells);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops amt_netdev_ops = {</div><div class='add'>+	.ndo_init               = amt_dev_init,</div><div class='add'>+	.ndo_uninit             = amt_dev_uninit,</div><div class='add'>+	.ndo_open		= amt_dev_open,</div><div class='add'>+	.ndo_stop		= amt_dev_stop,</div><div class='add'>+	.ndo_start_xmit         = amt_dev_xmit,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void amt_link_setup(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	dev-&gt;netdev_ops         = &amp;amt_netdev_ops;</div><div class='add'>+	dev-&gt;needs_free_netdev  = true;</div><div class='add'>+	SET_NETDEV_DEVTYPE(dev, &amp;amt_type);</div><div class='add'>+	dev-&gt;min_mtu		= ETH_MIN_MTU;</div><div class='add'>+	dev-&gt;max_mtu		= ETH_MAX_MTU;</div><div class='add'>+	dev-&gt;type		= ARPHRD_NONE;</div><div class='add'>+	dev-&gt;flags		= IFF_POINTOPOINT | IFF_NOARP | IFF_MULTICAST;</div><div class='add'>+	dev-&gt;hard_header_len	= 0;</div><div class='add'>+	dev-&gt;addr_len		= 0;</div><div class='add'>+	dev-&gt;priv_flags		|= IFF_NO_QUEUE;</div><div class='add'>+	dev-&gt;lltx		= true;</div><div class='add'>+	dev-&gt;netns_immutable	= true;</div><div class='add'>+	dev-&gt;features		|= NETIF_F_GSO_SOFTWARE;</div><div class='add'>+	dev-&gt;hw_features	|= NETIF_F_SG | NETIF_F_HW_CSUM;</div><div class='add'>+	dev-&gt;hw_features	|= NETIF_F_FRAGLIST | NETIF_F_RXCSUM;</div><div class='add'>+	dev-&gt;hw_features	|= NETIF_F_GSO_SOFTWARE;</div><div class='add'>+	dev-&gt;pcpu_stat_type	= NETDEV_PCPU_STAT_TSTATS;</div><div class='add'>+	eth_hw_addr_random(dev);</div><div class='add'>+	eth_zero_addr(dev-&gt;broadcast);</div><div class='add'>+	ether_setup(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct nla_policy amt_policy[IFLA_AMT_MAX + 1] = {</div><div class='add'>+	[IFLA_AMT_MODE]		= { .type = NLA_U32 },</div><div class='add'>+	[IFLA_AMT_RELAY_PORT]	= { .type = NLA_U16 },</div><div class='add'>+	[IFLA_AMT_GATEWAY_PORT]	= { .type = NLA_U16 },</div><div class='add'>+	[IFLA_AMT_LINK]		= { .type = NLA_U32 },</div><div class='add'>+	[IFLA_AMT_LOCAL_IP]	= { .len = sizeof_field(struct iphdr, daddr) },</div><div class='add'>+	[IFLA_AMT_REMOTE_IP]	= { .len = sizeof_field(struct iphdr, daddr) },</div><div class='add'>+	[IFLA_AMT_DISCOVERY_IP]	= { .len = sizeof_field(struct iphdr, daddr) },</div><div class='add'>+	[IFLA_AMT_MAX_TUNNELS]	= { .type = NLA_U32 },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int amt_validate(struct nlattr *tb[], struct nlattr *data[],</div><div class='add'>+			struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	if (!data)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!data[IFLA_AMT_LINK]) {</div><div class='add'>+		NL_SET_ERR_MSG_ATTR(extack, data[IFLA_AMT_LINK],</div><div class='add'>+				    "Link attribute is required");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!data[IFLA_AMT_MODE]) {</div><div class='add'>+		NL_SET_ERR_MSG_ATTR(extack, data[IFLA_AMT_MODE],</div><div class='add'>+				    "Mode attribute is required");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (nla_get_u32(data[IFLA_AMT_MODE]) &gt; AMT_MODE_MAX) {</div><div class='add'>+		NL_SET_ERR_MSG_ATTR(extack, data[IFLA_AMT_MODE],</div><div class='add'>+				    "Mode attribute is not valid");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!data[IFLA_AMT_LOCAL_IP]) {</div><div class='add'>+		NL_SET_ERR_MSG_ATTR(extack, data[IFLA_AMT_DISCOVERY_IP],</div><div class='add'>+				    "Local attribute is required");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!data[IFLA_AMT_DISCOVERY_IP] &amp;&amp;</div><div class='add'>+	    nla_get_u32(data[IFLA_AMT_MODE]) == AMT_MODE_GATEWAY) {</div><div class='add'>+		NL_SET_ERR_MSG_ATTR(extack, data[IFLA_AMT_LOCAL_IP],</div><div class='add'>+				    "Discovery attribute is required");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int amt_newlink(struct net_device *dev,</div><div class='add'>+		       struct rtnl_newlink_params *params,</div><div class='add'>+		       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct net *link_net = rtnl_newlink_link_net(params);</div><div class='add'>+	struct amt_dev *amt = netdev_priv(dev);</div><div class='add'>+	struct nlattr **data = params-&gt;data;</div><div class='add'>+	struct nlattr **tb = params-&gt;tb;</div><div class='add'>+	int err = -EINVAL;</div><div class='add'>+</div><div class='add'>+	amt-&gt;net = link_net;</div><div class='add'>+	amt-&gt;mode = nla_get_u32(data[IFLA_AMT_MODE]);</div><div class='add'>+</div><div class='add'>+	if (data[IFLA_AMT_MAX_TUNNELS] &amp;&amp;</div><div class='add'>+	    nla_get_u32(data[IFLA_AMT_MAX_TUNNELS]))</div><div class='add'>+		amt-&gt;max_tunnels = nla_get_u32(data[IFLA_AMT_MAX_TUNNELS]);</div><div class='add'>+	else</div><div class='add'>+		amt-&gt;max_tunnels = AMT_MAX_TUNNELS;</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;amt-&gt;lock);</div><div class='add'>+	amt-&gt;max_groups = AMT_MAX_GROUP;</div><div class='add'>+	amt-&gt;max_sources = AMT_MAX_SOURCE;</div><div class='add'>+	amt-&gt;hash_buckets = AMT_HSIZE;</div><div class='add'>+	amt-&gt;nr_tunnels = 0;</div><div class='add'>+	get_random_bytes(&amp;amt-&gt;hash_seed, sizeof(amt-&gt;hash_seed));</div><div class='add'>+	amt-&gt;stream_dev = dev_get_by_index(link_net,</div><div class='add'>+					   nla_get_u32(data[IFLA_AMT_LINK]));</div><div class='add'>+	if (!amt-&gt;stream_dev) {</div><div class='add'>+		NL_SET_ERR_MSG_ATTR(extack, tb[IFLA_AMT_LINK],</div><div class='add'>+				    "Can't find stream device");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (amt-&gt;stream_dev-&gt;type != ARPHRD_ETHER) {</div><div class='add'>+		NL_SET_ERR_MSG_ATTR(extack, tb[IFLA_AMT_LINK],</div><div class='add'>+				    "Invalid stream device type");</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	amt-&gt;local_ip = nla_get_in_addr(data[IFLA_AMT_LOCAL_IP]);</div><div class='add'>+	if (ipv4_is_loopback(amt-&gt;local_ip) ||</div><div class='add'>+	    ipv4_is_zeronet(amt-&gt;local_ip) ||</div><div class='add'>+	    ipv4_is_multicast(amt-&gt;local_ip)) {</div><div class='add'>+		NL_SET_ERR_MSG_ATTR(extack, tb[IFLA_AMT_LOCAL_IP],</div><div class='add'>+				    "Invalid Local address");</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	amt-&gt;relay_port = nla_get_be16_default(data[IFLA_AMT_RELAY_PORT],</div><div class='add'>+					       htons(IANA_AMT_UDP_PORT));</div><div class='add'>+</div><div class='add'>+	amt-&gt;gw_port = nla_get_be16_default(data[IFLA_AMT_GATEWAY_PORT],</div><div class='add'>+					    htons(IANA_AMT_UDP_PORT));</div><div class='add'>+</div><div class='add'>+	if (!amt-&gt;relay_port) {</div><div class='add'>+		NL_SET_ERR_MSG_ATTR(extack, tb[IFLA_AMT_DISCOVERY_IP],</div><div class='add'>+				    "relay port must not be 0");</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+	if (amt-&gt;mode == AMT_MODE_RELAY) {</div><div class='add'>+		amt-&gt;qrv = READ_ONCE(amt-&gt;net-&gt;ipv4.sysctl_igmp_qrv);</div><div class='add'>+		amt-&gt;qri = 10;</div><div class='add'>+		dev-&gt;needed_headroom = amt-&gt;stream_dev-&gt;needed_headroom +</div><div class='add'>+				       AMT_RELAY_HLEN;</div><div class='add'>+		dev-&gt;mtu = amt-&gt;stream_dev-&gt;mtu - AMT_RELAY_HLEN;</div><div class='add'>+		dev-&gt;max_mtu = dev-&gt;mtu;</div><div class='add'>+		dev-&gt;min_mtu = ETH_MIN_MTU + AMT_RELAY_HLEN;</div><div class='add'>+	} else {</div><div class='add'>+		if (!data[IFLA_AMT_DISCOVERY_IP]) {</div><div class='add'>+			NL_SET_ERR_MSG_ATTR(extack, tb[IFLA_AMT_DISCOVERY_IP],</div><div class='add'>+					    "discovery must be set in gateway mode");</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+		if (!amt-&gt;gw_port) {</div><div class='add'>+			NL_SET_ERR_MSG_ATTR(extack, tb[IFLA_AMT_DISCOVERY_IP],</div><div class='add'>+					    "gateway port must not be 0");</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+		amt-&gt;remote_ip = 0;</div><div class='add'>+		amt-&gt;discovery_ip = nla_get_in_addr(data[IFLA_AMT_DISCOVERY_IP]);</div><div class='add'>+		if (ipv4_is_loopback(amt-&gt;discovery_ip) ||</div><div class='add'>+		    ipv4_is_zeronet(amt-&gt;discovery_ip) ||</div><div class='add'>+		    ipv4_is_multicast(amt-&gt;discovery_ip)) {</div><div class='add'>+			NL_SET_ERR_MSG_ATTR(extack, tb[IFLA_AMT_DISCOVERY_IP],</div><div class='add'>+					    "discovery must be unicast");</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		dev-&gt;needed_headroom = amt-&gt;stream_dev-&gt;needed_headroom +</div><div class='add'>+				       AMT_GW_HLEN;</div><div class='add'>+		dev-&gt;mtu = amt-&gt;stream_dev-&gt;mtu - AMT_GW_HLEN;</div><div class='add'>+		dev-&gt;max_mtu = dev-&gt;mtu;</div><div class='add'>+		dev-&gt;min_mtu = ETH_MIN_MTU + AMT_GW_HLEN;</div><div class='add'>+	}</div><div class='add'>+	amt-&gt;qi = AMT_INIT_QUERY_INTERVAL;</div><div class='add'>+</div><div class='add'>+	err = register_netdevice(dev);</div><div class='add'>+	if (err &lt; 0) {</div><div class='add'>+		netdev_dbg(dev, "failed to register new netdev %d\n", err);</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = netdev_upper_dev_link(amt-&gt;stream_dev, dev, extack);</div><div class='add'>+	if (err &lt; 0) {</div><div class='add'>+		unregister_netdevice(dev);</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	INIT_DELAYED_WORK(&amp;amt-&gt;discovery_wq, amt_discovery_work);</div><div class='add'>+	INIT_DELAYED_WORK(&amp;amt-&gt;req_wq, amt_req_work);</div><div class='add'>+	INIT_DELAYED_WORK(&amp;amt-&gt;secret_wq, amt_secret_work);</div><div class='add'>+	INIT_WORK(&amp;amt-&gt;event_wq, amt_event_work);</div><div class='add'>+	INIT_LIST_HEAD(&amp;amt-&gt;tunnel_list);</div><div class='add'>+	return 0;</div><div class='add'>+err:</div><div class='add'>+	dev_put(amt-&gt;stream_dev);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void amt_dellink(struct net_device *dev, struct list_head *head)</div><div class='add'>+{</div><div class='add'>+	struct amt_dev *amt = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	unregister_netdevice_queue(dev, head);</div><div class='add'>+	netdev_upper_dev_unlink(amt-&gt;stream_dev, dev);</div><div class='add'>+	dev_put(amt-&gt;stream_dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t amt_get_size(const struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	return nla_total_size(sizeof(__u32)) + /* IFLA_AMT_MODE */</div><div class='add'>+	       nla_total_size(sizeof(__u16)) + /* IFLA_AMT_RELAY_PORT */</div><div class='add'>+	       nla_total_size(sizeof(__u16)) + /* IFLA_AMT_GATEWAY_PORT */</div><div class='add'>+	       nla_total_size(sizeof(__u32)) + /* IFLA_AMT_LINK */</div><div class='add'>+	       nla_total_size(sizeof(__u32)) + /* IFLA_MAX_TUNNELS */</div><div class='add'>+	       nla_total_size(sizeof(struct iphdr)) + /* IFLA_AMT_DISCOVERY_IP */</div><div class='add'>+	       nla_total_size(sizeof(struct iphdr)) + /* IFLA_AMT_REMOTE_IP */</div><div class='add'>+	       nla_total_size(sizeof(struct iphdr)); /* IFLA_AMT_LOCAL_IP */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int amt_fill_info(struct sk_buff *skb, const struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct amt_dev *amt = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	if (nla_put_u32(skb, IFLA_AMT_MODE, amt-&gt;mode))</div><div class='add'>+		goto nla_put_failure;</div><div class='add'>+	if (nla_put_be16(skb, IFLA_AMT_RELAY_PORT, amt-&gt;relay_port))</div><div class='add'>+		goto nla_put_failure;</div><div class='add'>+	if (nla_put_be16(skb, IFLA_AMT_GATEWAY_PORT, amt-&gt;gw_port))</div><div class='add'>+		goto nla_put_failure;</div><div class='add'>+	if (nla_put_u32(skb, IFLA_AMT_LINK, amt-&gt;stream_dev-&gt;ifindex))</div><div class='add'>+		goto nla_put_failure;</div><div class='add'>+	if (nla_put_in_addr(skb, IFLA_AMT_LOCAL_IP, amt-&gt;local_ip))</div><div class='add'>+		goto nla_put_failure;</div><div class='add'>+	if (nla_put_in_addr(skb, IFLA_AMT_DISCOVERY_IP, amt-&gt;discovery_ip))</div><div class='add'>+		goto nla_put_failure;</div><div class='add'>+	if (amt-&gt;remote_ip)</div><div class='add'>+		if (nla_put_in_addr(skb, IFLA_AMT_REMOTE_IP, amt-&gt;remote_ip))</div><div class='add'>+			goto nla_put_failure;</div><div class='add'>+	if (nla_put_u32(skb, IFLA_AMT_MAX_TUNNELS, amt-&gt;max_tunnels))</div><div class='add'>+		goto nla_put_failure;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+nla_put_failure:</div><div class='add'>+	return -EMSGSIZE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct rtnl_link_ops amt_link_ops __read_mostly = {</div><div class='add'>+	.kind		= "amt",</div><div class='add'>+	.maxtype	= IFLA_AMT_MAX,</div><div class='add'>+	.policy		= amt_policy,</div><div class='add'>+	.priv_size	= sizeof(struct amt_dev),</div><div class='add'>+	.setup		= amt_link_setup,</div><div class='add'>+	.validate	= amt_validate,</div><div class='add'>+	.newlink	= amt_newlink,</div><div class='add'>+	.dellink	= amt_dellink,</div><div class='add'>+	.get_size       = amt_get_size,</div><div class='add'>+	.fill_info      = amt_fill_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct net_device *amt_lookup_upper_dev(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct net_device *upper_dev;</div><div class='add'>+	struct amt_dev *amt;</div><div class='add'>+</div><div class='add'>+	for_each_netdev(dev_net(dev), upper_dev) {</div><div class='add'>+		if (netif_is_amt(upper_dev)) {</div><div class='add'>+			amt = netdev_priv(upper_dev);</div><div class='add'>+			if (amt-&gt;stream_dev == dev)</div><div class='add'>+				return upper_dev;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int amt_device_event(struct notifier_block *unused,</div><div class='add'>+			    unsigned long event, void *ptr)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = netdev_notifier_info_to_dev(ptr);</div><div class='add'>+	struct net_device *upper_dev;</div><div class='add'>+	struct amt_dev *amt;</div><div class='add'>+	LIST_HEAD(list);</div><div class='add'>+	int new_mtu;</div><div class='add'>+</div><div class='add'>+	upper_dev = amt_lookup_upper_dev(dev);</div><div class='add'>+	if (!upper_dev)</div><div class='add'>+		return NOTIFY_DONE;</div><div class='add'>+	amt = netdev_priv(upper_dev);</div><div class='add'>+</div><div class='add'>+	switch (event) {</div><div class='add'>+	case NETDEV_UNREGISTER:</div><div class='add'>+		amt_dellink(amt-&gt;dev, &amp;list);</div><div class='add'>+		unregister_netdevice_many(&amp;list);</div><div class='add'>+		break;</div><div class='add'>+	case NETDEV_CHANGEMTU:</div><div class='add'>+		if (amt-&gt;mode == AMT_MODE_RELAY)</div><div class='add'>+			new_mtu = dev-&gt;mtu - AMT_RELAY_HLEN;</div><div class='add'>+		else</div><div class='add'>+			new_mtu = dev-&gt;mtu - AMT_GW_HLEN;</div><div class='add'>+</div><div class='add'>+		dev_set_mtu(amt-&gt;dev, new_mtu);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NOTIFY_DONE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct notifier_block amt_notifier_block __read_mostly = {</div><div class='add'>+	.notifier_call = amt_device_event,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init amt_init(void)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = register_netdevice_notifier(&amp;amt_notifier_block);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	err = rtnl_link_register(&amp;amt_link_ops);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto unregister_notifier;</div><div class='add'>+</div><div class='add'>+	amt_wq = alloc_workqueue("amt", WQ_UNBOUND, 0);</div><div class='add'>+	if (!amt_wq) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto rtnl_unregister;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;source_gc_lock);</div><div class='add'>+	spin_lock_bh(&amp;source_gc_lock);</div><div class='add'>+	INIT_DELAYED_WORK(&amp;source_gc_wq, amt_source_gc_work);</div><div class='add'>+	mod_delayed_work(amt_wq, &amp;source_gc_wq,</div><div class='add'>+			 msecs_to_jiffies(AMT_GC_INTERVAL));</div><div class='add'>+	spin_unlock_bh(&amp;source_gc_lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+rtnl_unregister:</div><div class='add'>+	rtnl_link_unregister(&amp;amt_link_ops);</div><div class='add'>+unregister_notifier:</div><div class='add'>+	unregister_netdevice_notifier(&amp;amt_notifier_block);</div><div class='add'>+err:</div><div class='add'>+	pr_err("error loading AMT module loaded\n");</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+late_initcall(amt_init);</div><div class='add'>+</div><div class='add'>+static void __exit amt_fini(void)</div><div class='add'>+{</div><div class='add'>+	rtnl_link_unregister(&amp;amt_link_ops);</div><div class='add'>+	unregister_netdevice_notifier(&amp;amt_notifier_block);</div><div class='add'>+	cancel_delayed_work_sync(&amp;source_gc_wq);</div><div class='add'>+	__amt_source_gc_work();</div><div class='add'>+	destroy_workqueue(amt_wq);</div><div class='add'>+}</div><div class='add'>+module_exit(amt_fini);</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_DESCRIPTION("Driver for Automatic Multicast Tunneling (AMT)");</div><div class='add'>+MODULE_AUTHOR("Taehee Yoo &lt;ap420073@gmail.com&gt;");</div><div class='add'>+MODULE_ALIAS_RTNL_LINK("amt");</div><div class='head'>diff --git a/drivers/net/appletalk/Kconfig b/drivers/net/appletalk/Kconfig<br/>deleted file mode 100644<br/>index dc6b78e5342f..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/appletalk/Kconfig?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/appletalk/Kconfig</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,109 +0,0 @@</div><div class='del'>-#</div><div class='del'>-# Appletalk driver configuration</div><div class='del'>-#</div><div class='del'>-config ATALK</div><div class='del'>-	tristate "Appletalk protocol support"</div><div class='del'>-	select LLC</div><div class='del'>-	---help---</div><div class='del'>-	  AppleTalk is the protocol that Apple computers can use to communicate</div><div class='del'>-	  on a network.  If your Linux box is connected to such a network and you</div><div class='del'>-	  wish to connect to it, say Y.  You will need to use the netatalk package</div><div class='del'>-	  so that your Linux box can act as a print and file server for Macs as</div><div class='del'>-	  well as access AppleTalk printers.  Check out</div><div class='del'>-	  &lt;http://www.zettabyte.net/netatalk/&gt; on the WWW for details.</div><div class='del'>-	  EtherTalk is the name used for AppleTalk over Ethernet and the</div><div class='del'>-	  cheaper and slower LocalTalk is AppleTalk over a proprietary Apple</div><div class='del'>-	  network using serial links.  EtherTalk and LocalTalk are fully</div><div class='del'>-	  supported by Linux.</div><div class='del'>-</div><div class='del'>-	  General information about how to connect Linux, Windows machines and</div><div class='del'>-	  Macs is on the WWW at &lt;http://www.eats.com/linux_mac_win.html&gt;.  The</div><div class='del'>-	  NET3-4-HOWTO, available from</div><div class='del'>-	  &lt;http://www.tldp.org/docs.html#howto&gt;, contains valuable</div><div class='del'>-	  information as well.</div><div class='del'>-</div><div class='del'>-	  To compile this driver as a module, choose M here: the module will be</div><div class='del'>-	  called appletalk. You almost certainly want to compile it as a</div><div class='del'>-	  module so you can restart your AppleTalk stack without rebooting</div><div class='del'>-	  your machine. I hear that the GNU boycott of Apple is over, so</div><div class='del'>-	  even politically correct people are allowed to say Y here.</div><div class='del'>-</div><div class='del'>-config DEV_APPLETALK</div><div class='del'>-	tristate "Appletalk interfaces support"</div><div class='del'>-	depends on ATALK</div><div class='del'>-	help</div><div class='del'>-	  AppleTalk is the protocol that Apple computers can use to communicate</div><div class='del'>-	  on a network.  If your Linux box is connected to such a network, and wish</div><div class='del'>-	  to do IP over it, or you have a LocalTalk card and wish to use it to</div><div class='del'>-	  connect to the AppleTalk network, say Y.</div><div class='del'>-	  </div><div class='del'>-</div><div class='del'>-config LTPC</div><div class='del'>-	tristate "Apple/Farallon LocalTalk PC support"</div><div class='del'>-	depends on DEV_APPLETALK &amp;&amp; (ISA || EISA) &amp;&amp; ISA_DMA_API &amp;&amp; VIRT_TO_BUS</div><div class='del'>-	help</div><div class='del'>-	  This allows you to use the AppleTalk PC card to connect to LocalTalk</div><div class='del'>-	  networks. The card is also known as the Farallon PhoneNet PC card.</div><div class='del'>-	  If you are in doubt, this card is the one with the 65C02 chip on it.</div><div class='del'>-	  You also need version 1.3.3 or later of the netatalk package.</div><div class='del'>-	  This driver is experimental, which means that it may not work.</div><div class='del'>-	  See the file &lt;file:Documentation/networking/ltpc.txt&gt;.</div><div class='del'>-</div><div class='del'>-config COPS</div><div class='del'>-	tristate "COPS LocalTalk PC support"</div><div class='del'>-	depends on DEV_APPLETALK &amp;&amp; (ISA || EISA)</div><div class='del'>-	help</div><div class='del'>-	  This allows you to use COPS AppleTalk cards to connect to LocalTalk</div><div class='del'>-	  networks. You also need version 1.3.3 or later of the netatalk</div><div class='del'>-	  package. This driver is experimental, which means that it may not</div><div class='del'>-	  work. This driver will only work if you choose "AppleTalk DDP"</div><div class='del'>-	  networking support, above.</div><div class='del'>-	  Please read the file &lt;file:Documentation/networking/cops.txt&gt;.</div><div class='del'>-</div><div class='del'>-config COPS_DAYNA</div><div class='del'>-	bool "Dayna firmware support"</div><div class='del'>-	depends on COPS</div><div class='del'>-	help</div><div class='del'>-	  Support COPS compatible cards with Dayna style firmware (Dayna</div><div class='del'>-	  DL2000/ Daynatalk/PC (half length), COPS LT-95, Farallon PhoneNET PC</div><div class='del'>-	  III, Farallon PhoneNET PC II).</div><div class='del'>-</div><div class='del'>-config COPS_TANGENT</div><div class='del'>-	bool "Tangent firmware support"</div><div class='del'>-	depends on COPS</div><div class='del'>-	help</div><div class='del'>-	  Support COPS compatible cards with Tangent style firmware (Tangent</div><div class='del'>-	  ATB_II, Novell NL-1000, Daystar Digital LT-200.</div><div class='del'>-</div><div class='del'>-config IPDDP</div><div class='del'>-	tristate "Appletalk-IP driver support"</div><div class='del'>-	depends on DEV_APPLETALK &amp;&amp; ATALK</div><div class='del'>-	---help---</div><div class='del'>-	  This allows IP networking for users who only have AppleTalk</div><div class='del'>-	  networking available. This feature is experimental. With this</div><div class='del'>-	  driver, you can encapsulate IP inside AppleTalk (e.g. if your Linux</div><div class='del'>-	  box is stuck on an AppleTalk only network) or decapsulate (e.g. if</div><div class='del'>-	  you want your Linux box to act as an Internet gateway for a zoo of</div><div class='del'>-	  AppleTalk connected Macs). Please see the file</div><div class='del'>-	  &lt;file:Documentation/networking/ipddp.txt&gt; for more information.</div><div class='del'>-</div><div class='del'>-	  If you say Y here, the AppleTalk-IP support will be compiled into</div><div class='del'>-	  the kernel. In this case, you can either use encapsulation or</div><div class='del'>-	  decapsulation, but not both. With the following two questions, you</div><div class='del'>-	  decide which one you want.</div><div class='del'>-</div><div class='del'>-	  To compile the AppleTalk-IP support as a module, choose M here: the</div><div class='del'>-	  module will be called ipddp.</div><div class='del'>-	  In this case, you will be able to use both encapsulation and</div><div class='del'>-	  decapsulation simultaneously, by loading two copies of the module</div><div class='del'>-	  and specifying different values for the module option ipddp_mode.</div><div class='del'>-</div><div class='del'>-config IPDDP_ENCAP</div><div class='del'>-	bool "IP to Appletalk-IP Encapsulation support"</div><div class='del'>-	depends on IPDDP</div><div class='del'>-	help</div><div class='del'>-	  If you say Y here, the AppleTalk-IP code will be able to encapsulate</div><div class='del'>-	  IP packets inside AppleTalk frames; this is useful if your Linux box</div><div class='del'>-	  is stuck on an AppleTalk network (which hopefully contains a</div><div class='del'>-	  decapsulator somewhere). Please see</div><div class='del'>-	  &lt;file:Documentation/networking/ipddp.txt&gt; for more information.</div><div class='head'>diff --git a/drivers/net/appletalk/Makefile b/drivers/net/appletalk/Makefile<br/>deleted file mode 100644<br/>index 6cfc705f7c5c..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/appletalk/Makefile?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/appletalk/Makefile</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,7 +0,0 @@</div><div class='del'>-#</div><div class='del'>-# Makefile for drivers/net/appletalk</div><div class='del'>-#</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_IPDDP) += ipddp.o</div><div class='del'>-obj-$(CONFIG_COPS) += cops.o</div><div class='del'>-obj-$(CONFIG_LTPC) += ltpc.o</div><div class='head'>diff --git a/drivers/net/appletalk/cops.c b/drivers/net/appletalk/cops.c<br/>deleted file mode 100644<br/>index 7f2a032c354c..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/appletalk/cops.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/appletalk/cops.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,1010 +0,0 @@</div><div class='del'>-/*      cops.c: LocalTalk driver for Linux.</div><div class='del'>- *</div><div class='del'>- *	Authors:</div><div class='del'>- *      - Jay Schulist &lt;jschlst@samba.org&gt;</div><div class='del'>- *</div><div class='del'>- *	With more than a little help from;</div><div class='del'>- *	- Alan Cox &lt;alan@lxorguk.ukuu.org.uk&gt;</div><div class='del'>- *</div><div class='del'>- *      Derived from:</div><div class='del'>- *      - skeleton.c: A network driver outline for linux.</div><div class='del'>- *        Written 1993-94 by Donald Becker.</div><div class='del'>- *	- ltpc.c: A driver for the LocalTalk PC card.</div><div class='del'>- *	  Written by Bradford W. Johnson.</div><div class='del'>- *</div><div class='del'>- *      Copyright 1993 United States Government as represented by the</div><div class='del'>- *      Director, National Security Agency.</div><div class='del'>- *</div><div class='del'>- *      This software may be used and distributed according to the terms</div><div class='del'>- *      of the GNU General Public License, incorporated herein by reference.</div><div class='del'>- *</div><div class='del'>- *	Changes:</div><div class='del'>- *	19970608	Alan Cox	Allowed dual card type support</div><div class='del'>- *					Can set board type in insmod</div><div class='del'>- *					Hooks for cops_setup routine</div><div class='del'>- *					(not yet implemented).</div><div class='del'>- *	19971101	Jay Schulist	Fixes for multiple lt* devices.</div><div class='del'>- *	19980607	Steven Hirsch	Fixed the badly broken support</div><div class='del'>- *					for Tangent type cards. Only</div><div class='del'>- *                                      tested on Daystar LT200. Some</div><div class='del'>- *                                      cleanup of formatting and program</div><div class='del'>- *                                      logic.  Added emacs 'local-vars'</div><div class='del'>- *                                      setup for Jay's brace style.</div><div class='del'>- *	20000211	Alan Cox	Cleaned up for softnet</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static const char *version =</div><div class='del'>-"cops.c:v0.04 6/7/98 Jay Schulist &lt;jschlst@samba.org&gt;\n";</div><div class='del'>-/*</div><div class='del'>- *  Sources:</div><div class='del'>- *      COPS Localtalk SDK. This provides almost all of the information</div><div class='del'>- *      needed.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * insmod/modprobe configurable stuff.</div><div class='del'>- *	- IO Port, choose one your card supports or 0 if you dare.</div><div class='del'>- *	- IRQ, also choose one your card supports or nothing and let</div><div class='del'>- *	  the driver figure it out.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/fcntl.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/ptrace.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;linux/in.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/etherdevice.h&gt;</div><div class='del'>-#include &lt;linux/skbuff.h&gt;</div><div class='del'>-#include &lt;linux/if_arp.h&gt;</div><div class='del'>-#include &lt;linux/if_ltalk.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;	/* For udelay() */</div><div class='del'>-#include &lt;linux/atalk.h&gt;</div><div class='del'>-#include &lt;linux/spinlock.h&gt;</div><div class='del'>-#include &lt;linux/bitops.h&gt;</div><div class='del'>-#include &lt;linux/jiffies.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/dma.h&gt;</div><div class='del'>-</div><div class='del'>-#include "cops.h"		/* Our Stuff */</div><div class='del'>-#include "cops_ltdrv.h"		/* Firmware code for Tangent type cards. */</div><div class='del'>-#include "cops_ffdrv.h"		/* Firmware code for Dayna type cards. */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *      The name of the card. Is used for messages and in the requests for</div><div class='del'>- *      io regions, irqs and dma channels</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static const char *cardname = "cops";</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_COPS_DAYNA</div><div class='del'>-static int board_type = DAYNA;	/* Module exported */</div><div class='del'>-#else</div><div class='del'>-static int board_type = TANGENT;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static int io = 0x240;		/* Default IO for Dayna */</div><div class='del'>-static int irq = 5;		/* Default IRQ */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *	COPS Autoprobe information.</div><div class='del'>- *	Right now if port address is right but IRQ is not 5 this will</div><div class='del'>- *      return a 5 no matter what since we will still get a status response.</div><div class='del'>- *      Need one more additional check to narrow down after we have gotten</div><div class='del'>- *      the ioaddr. But since only other possible IRQs is 3 and 4 so no real</div><div class='del'>- *	hurry on this. I *STRONGLY* recommend using IRQ 5 for your card with</div><div class='del'>- *	this driver.</div><div class='del'>- * </div><div class='del'>- *	This driver has 2 modes and they are: Dayna mode and Tangent mode.</div><div class='del'>- *	Each mode corresponds with the type of card. It has been found</div><div class='del'>- *	that there are 2 main types of cards and all other cards are</div><div class='del'>- *	the same and just have different names or only have minor differences</div><div class='del'>- *	such as more IO ports. As this driver is tested it will</div><div class='del'>- *	become more clear on exactly what cards are supported. The driver</div><div class='del'>- *	defaults to using Dayna mode. To change the drivers mode, simply</div><div class='del'>- *	select Dayna or Tangent mode when configuring the kernel.</div><div class='del'>- *</div><div class='del'>- *      This driver should support:</div><div class='del'>- *      TANGENT driver mode:</div><div class='del'>- *              Tangent ATB-II, Novell NL-1000, Daystar Digital LT-200,</div><div class='del'>- *		COPS LT-1</div><div class='del'>- *      DAYNA driver mode:</div><div class='del'>- *              Dayna DL2000/DaynaTalk PC (Half Length), COPS LT-95, </div><div class='del'>- *		Farallon PhoneNET PC III, Farallon PhoneNET PC II</div><div class='del'>- *	Other cards possibly supported mode unknown though:</div><div class='del'>- *		Dayna DL2000 (Full length), COPS LT/M (Micro-Channel)</div><div class='del'>- *</div><div class='del'>- *	Cards NOT supported by this driver but supported by the ltpc.c</div><div class='del'>- *	driver written by Bradford W. Johnson &lt;johns393@maroon.tc.umn.edu&gt;</div><div class='del'>- *		Farallon PhoneNET PC</div><div class='del'>- *		Original Apple LocalTalk PC card</div><div class='del'>- * </div><div class='del'>- *      N.B.</div><div class='del'>- *</div><div class='del'>- *      The Daystar Digital LT200 boards do not support interrupt-driven</div><div class='del'>- *      IO.  You must specify 'irq=0xff' as a module parameter to invoke</div><div class='del'>- *      polled mode.  I also believe that the port probing logic is quite</div><div class='del'>- *      dangerous at best and certainly hopeless for a polled card.  Best to </div><div class='del'>- *      specify both. - Steve H.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Zero terminated list of IO ports to probe.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static unsigned int ports[] = { </div><div class='del'>-	0x240, 0x340, 0x200, 0x210, 0x220, 0x230, 0x260, </div><div class='del'>-	0x2A0, 0x300, 0x310, 0x320, 0x330, 0x350, 0x360,</div><div class='del'>-	0</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Zero terminated list of IRQ ports to probe.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int cops_irqlist[] = {</div><div class='del'>-	5, 4, 3, 0 </div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct timer_list cops_timer;</div><div class='del'>-</div><div class='del'>-/* use 0 for production, 1 for verification, 2 for debug, 3 for verbose debug */</div><div class='del'>-#ifndef COPS_DEBUG</div><div class='del'>-#define COPS_DEBUG 1 </div><div class='del'>-#endif</div><div class='del'>-static unsigned int cops_debug = COPS_DEBUG;</div><div class='del'>-</div><div class='del'>-/* The number of low I/O ports used by the card. */</div><div class='del'>-#define COPS_IO_EXTENT       8</div><div class='del'>-</div><div class='del'>-/* Information that needs to be kept for each board. */</div><div class='del'>-</div><div class='del'>-struct cops_local</div><div class='del'>-{</div><div class='del'>-        int board;			/* Holds what board type is. */</div><div class='del'>-	int nodeid;			/* Set to 1 once have nodeid. */</div><div class='del'>-        unsigned char node_acquire;	/* Node ID when acquired. */</div><div class='del'>-        struct atalk_addr node_addr;	/* Full node address */</div><div class='del'>-	spinlock_t lock;		/* RX/TX lock */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Index to functions, as function prototypes. */</div><div class='del'>-static int  cops_probe1 (struct net_device *dev, int ioaddr);</div><div class='del'>-static int  cops_irq (int ioaddr, int board);</div><div class='del'>-</div><div class='del'>-static int  cops_open (struct net_device *dev);</div><div class='del'>-static int  cops_jumpstart (struct net_device *dev);</div><div class='del'>-static void cops_reset (struct net_device *dev, int sleep);</div><div class='del'>-static void cops_load (struct net_device *dev);</div><div class='del'>-static int  cops_nodeid (struct net_device *dev, int nodeid);</div><div class='del'>-</div><div class='del'>-static irqreturn_t cops_interrupt (int irq, void *dev_id);</div><div class='del'>-static void cops_poll (unsigned long ltdev);</div><div class='del'>-static void cops_timeout(struct net_device *dev);</div><div class='del'>-static void cops_rx (struct net_device *dev);</div><div class='del'>-static netdev_tx_t  cops_send_packet (struct sk_buff *skb,</div><div class='del'>-					    struct net_device *dev);</div><div class='del'>-static void set_multicast_list (struct net_device *dev);</div><div class='del'>-static int  cops_ioctl (struct net_device *dev, struct ifreq *rq, int cmd);</div><div class='del'>-static int  cops_close (struct net_device *dev);</div><div class='del'>-</div><div class='del'>-static void cleanup_card(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	if (dev-&gt;irq)</div><div class='del'>-		free_irq(dev-&gt;irq, dev);</div><div class='del'>-	release_region(dev-&gt;base_addr, COPS_IO_EXTENT);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *      Check for a network adaptor of this type, and return '0' iff one exists.</div><div class='del'>- *      If dev-&gt;base_addr == 0, probe all likely locations.</div><div class='del'>- *      If dev-&gt;base_addr in [1..0x1ff], always return failure.</div><div class='del'>- *        otherwise go with what we pass in.</div><div class='del'>- */</div><div class='del'>-struct net_device * __init cops_probe(int unit)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev;</div><div class='del'>-	unsigned *port;</div><div class='del'>-	int base_addr;</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	dev = alloc_ltalkdev(sizeof(struct cops_local));</div><div class='del'>-	if (!dev)</div><div class='del'>-		return ERR_PTR(-ENOMEM);</div><div class='del'>-</div><div class='del'>-	if (unit &gt;= 0) {</div><div class='del'>-		sprintf(dev-&gt;name, "lt%d", unit);</div><div class='del'>-		netdev_boot_setup_check(dev);</div><div class='del'>-		irq = dev-&gt;irq;</div><div class='del'>-		base_addr = dev-&gt;base_addr;</div><div class='del'>-	} else {</div><div class='del'>-		base_addr = dev-&gt;base_addr = io;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (base_addr &gt; 0x1ff) {    /* Check a single specified location. */</div><div class='del'>-		err = cops_probe1(dev, base_addr);</div><div class='del'>-	} else if (base_addr != 0) { /* Don't probe at all. */</div><div class='del'>-		err = -ENXIO;</div><div class='del'>-	} else {</div><div class='del'>-		/* FIXME  Does this really work for cards which generate irq?</div><div class='del'>-		 * It's definitely N.G. for polled Tangent. sh</div><div class='del'>-		 * Dayna cards don't autoprobe well at all, but if your card is</div><div class='del'>-		 * at IRQ 5 &amp; IO 0x240 we find it every time. ;) JS</div><div class='del'>-		 */</div><div class='del'>-		for (port = ports; *port &amp;&amp; cops_probe1(dev, *port) &lt; 0; port++)</div><div class='del'>-			;</div><div class='del'>-		if (!*port)</div><div class='del'>-			err = -ENODEV;</div><div class='del'>-	}</div><div class='del'>-	if (err)</div><div class='del'>-		goto out;</div><div class='del'>-	err = register_netdev(dev);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out1;</div><div class='del'>-	return dev;</div><div class='del'>-out1:</div><div class='del'>-	cleanup_card(dev);</div><div class='del'>-out:</div><div class='del'>-	free_netdev(dev);</div><div class='del'>-	return ERR_PTR(err);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct net_device_ops cops_netdev_ops = {</div><div class='del'>-	.ndo_open               = cops_open,</div><div class='del'>-        .ndo_stop               = cops_close,</div><div class='del'>-	.ndo_start_xmit   	= cops_send_packet,</div><div class='del'>-	.ndo_tx_timeout		= cops_timeout,</div><div class='del'>-        .ndo_do_ioctl           = cops_ioctl,</div><div class='del'>-	.ndo_set_rx_mode	= set_multicast_list,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *      This is the real probe routine. Linux has a history of friendly device</div><div class='del'>- *      probes on the ISA bus. A good device probes avoids doing writes, and</div><div class='del'>- *      verifies that the correct device exists and functions.</div><div class='del'>- */</div><div class='del'>-static int __init cops_probe1(struct net_device *dev, int ioaddr)</div><div class='del'>-{</div><div class='del'>-        struct cops_local *lp;</div><div class='del'>-	static unsigned version_printed;</div><div class='del'>-	int board = board_type;</div><div class='del'>-	int retval;</div><div class='del'>-	</div><div class='del'>-        if(cops_debug &amp;&amp; version_printed++ == 0)</div><div class='del'>-		printk("%s", version);</div><div class='del'>-</div><div class='del'>-	/* Grab the region so no one else tries to probe our ioports. */</div><div class='del'>-	if (!request_region(ioaddr, COPS_IO_EXTENT, dev-&gt;name))</div><div class='del'>-		return -EBUSY;</div><div class='del'>-</div><div class='del'>-        /*</div><div class='del'>-         * Since this board has jumpered interrupts, allocate the interrupt</div><div class='del'>-         * vector now. There is no point in waiting since no other device</div><div class='del'>-         * can use the interrupt, and this marks the irq as busy. Jumpered</div><div class='del'>-         * interrupts are typically not reported by the boards, and we must</div><div class='del'>-         * used AutoIRQ to find them.</div><div class='del'>-	 */</div><div class='del'>-	dev-&gt;irq = irq;</div><div class='del'>-	switch (dev-&gt;irq)</div><div class='del'>-	{</div><div class='del'>-		case 0:</div><div class='del'>-			/* COPS AutoIRQ routine */</div><div class='del'>-			dev-&gt;irq = cops_irq(ioaddr, board);</div><div class='del'>-			if (dev-&gt;irq)</div><div class='del'>-				break;</div><div class='del'>-			/* No IRQ found on this port, fallthrough */</div><div class='del'>-		case 1:</div><div class='del'>-			retval = -EINVAL;</div><div class='del'>-			goto err_out;</div><div class='del'>-</div><div class='del'>-		/* Fixup for users that don't know that IRQ 2 is really</div><div class='del'>-		 * IRQ 9, or don't know which one to set.</div><div class='del'>-		 */</div><div class='del'>-		case 2:</div><div class='del'>-			dev-&gt;irq = 9;</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		/* Polled operation requested. Although irq of zero passed as</div><div class='del'>-		 * a parameter tells the init routines to probe, we'll</div><div class='del'>-		 * overload it to denote polled operation at runtime.</div><div class='del'>-		 */</div><div class='del'>-		case 0xff:</div><div class='del'>-			dev-&gt;irq = 0;</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		default:</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Reserve any actual interrupt. */</div><div class='del'>-	if (dev-&gt;irq) {</div><div class='del'>-		retval = request_irq(dev-&gt;irq, cops_interrupt, 0, dev-&gt;name, dev);</div><div class='del'>-		if (retval)</div><div class='del'>-			goto err_out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev-&gt;base_addr = ioaddr;</div><div class='del'>-</div><div class='del'>-        lp = netdev_priv(dev);</div><div class='del'>-        spin_lock_init(&amp;lp-&gt;lock);</div><div class='del'>-</div><div class='del'>-	/* Copy local board variable to lp struct. */</div><div class='del'>-	lp-&gt;board               = board;</div><div class='del'>-</div><div class='del'>-	dev-&gt;netdev_ops 	= &amp;cops_netdev_ops;</div><div class='del'>-	dev-&gt;watchdog_timeo	= HZ * 2;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	/* Tell the user where the card is and what mode we're in. */</div><div class='del'>-	if(board==DAYNA)</div><div class='del'>-		printk("%s: %s at %#3x, using IRQ %d, in Dayna mode.\n", </div><div class='del'>-			dev-&gt;name, cardname, ioaddr, dev-&gt;irq);</div><div class='del'>-	if(board==TANGENT) {</div><div class='del'>-		if(dev-&gt;irq)</div><div class='del'>-			printk("%s: %s at %#3x, IRQ %d, in Tangent mode\n", </div><div class='del'>-				dev-&gt;name, cardname, ioaddr, dev-&gt;irq);</div><div class='del'>-		else</div><div class='del'>-			printk("%s: %s at %#3x, using polled IO, in Tangent mode.\n", </div><div class='del'>-				dev-&gt;name, cardname, ioaddr);</div><div class='del'>-</div><div class='del'>-	}</div><div class='del'>-        return 0;</div><div class='del'>-</div><div class='del'>-err_out:</div><div class='del'>-	release_region(ioaddr, COPS_IO_EXTENT);</div><div class='del'>-	return retval;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init cops_irq (int ioaddr, int board)</div><div class='del'>-{       /*</div><div class='del'>-         * This does not use the IRQ to determine where the IRQ is. We just</div><div class='del'>-         * assume that when we get a correct status response that it's the IRQ.</div><div class='del'>-         * This really just verifies the IO port but since we only have access</div><div class='del'>-         * to such a small number of IRQs (5, 4, 3) this is not bad.</div><div class='del'>-         * This will probably not work for more than one card.</div><div class='del'>-         */</div><div class='del'>-        int irqaddr=0;</div><div class='del'>-        int i, x, status;</div><div class='del'>-</div><div class='del'>-        if(board==DAYNA)</div><div class='del'>-        {</div><div class='del'>-                outb(0, ioaddr+DAYNA_RESET);</div><div class='del'>-                inb(ioaddr+DAYNA_RESET);</div><div class='del'>-                mdelay(333);</div><div class='del'>-        }</div><div class='del'>-        if(board==TANGENT)</div><div class='del'>-        {</div><div class='del'>-                inb(ioaddr);</div><div class='del'>-                outb(0, ioaddr);</div><div class='del'>-                outb(0, ioaddr+TANG_RESET);</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        for(i=0; cops_irqlist[i] !=0; i++)</div><div class='del'>-        {</div><div class='del'>-                irqaddr = cops_irqlist[i];</div><div class='del'>-                for(x = 0xFFFF; x&gt;0; x --)    /* wait for response */</div><div class='del'>-                {</div><div class='del'>-                        if(board==DAYNA)</div><div class='del'>-                        {</div><div class='del'>-                                status = (inb(ioaddr+DAYNA_CARD_STATUS)&amp;3);</div><div class='del'>-                                if(status == 1)</div><div class='del'>-                                        return irqaddr;</div><div class='del'>-                        }</div><div class='del'>-                        if(board==TANGENT)</div><div class='del'>-                        {</div><div class='del'>-                                if((inb(ioaddr+TANG_CARD_STATUS)&amp; TANG_TX_READY) !=0)</div><div class='del'>-                                        return irqaddr;</div><div class='del'>-                        }</div><div class='del'>-                }</div><div class='del'>-        }</div><div class='del'>-        return 0;       /* no IRQ found */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Open/initialize the board. This is called (in the current kernel)</div><div class='del'>- * sometime after booting when the 'ifconfig' program is run.</div><div class='del'>- */</div><div class='del'>-static int cops_open(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-    struct cops_local *lp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	if(dev-&gt;irq==0)</div><div class='del'>-	{</div><div class='del'>-		/*</div><div class='del'>-		 * I don't know if the Dayna-style boards support polled </div><div class='del'>-		 * operation.  For now, only allow it for Tangent.</div><div class='del'>-		 */</div><div class='del'>-		if(lp-&gt;board==TANGENT)	/* Poll 20 times per second */</div><div class='del'>-		{</div><div class='del'>-		    init_timer(&amp;cops_timer);</div><div class='del'>-		    cops_timer.function = cops_poll;</div><div class='del'>-		    cops_timer.data 	= (unsigned long)dev;</div><div class='del'>-		    cops_timer.expires 	= jiffies + HZ/20;</div><div class='del'>-		    add_timer(&amp;cops_timer);</div><div class='del'>-		} </div><div class='del'>-		else </div><div class='del'>-		{</div><div class='del'>-			printk(KERN_WARNING "%s: No irq line set\n", dev-&gt;name);</div><div class='del'>-			return -EAGAIN;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	cops_jumpstart(dev);	/* Start the card up. */</div><div class='del'>-</div><div class='del'>-	netif_start_queue(dev);</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *	This allows for a dynamic start/restart of the entire card.</div><div class='del'>- */</div><div class='del'>-static int cops_jumpstart(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct cops_local *lp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-         *      Once the card has the firmware loaded and has acquired</div><div class='del'>-         *      the nodeid, if it is reset it will lose it all.</div><div class='del'>-         */</div><div class='del'>-        cops_reset(dev,1);	/* Need to reset card before load firmware. */</div><div class='del'>-        cops_load(dev);		/* Load the firmware. */</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 *	If atalkd already gave us a nodeid we will use that</div><div class='del'>-	 *	one again, else we wait for atalkd to give us a nodeid</div><div class='del'>-	 *	in cops_ioctl. This may cause a problem if someone steals</div><div class='del'>-	 *	our nodeid while we are resetting.</div><div class='del'>-	 */	</div><div class='del'>-	if(lp-&gt;nodeid == 1)</div><div class='del'>-		cops_nodeid(dev,lp-&gt;node_acquire);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void tangent_wait_reset(int ioaddr)</div><div class='del'>-{</div><div class='del'>-	int timeout=0;</div><div class='del'>-</div><div class='del'>-	while(timeout++ &lt; 5 &amp;&amp; (inb(ioaddr+TANG_CARD_STATUS)&amp;TANG_TX_READY)==0)</div><div class='del'>-		mdelay(1);   /* Wait 1 second */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *      Reset the LocalTalk board.</div><div class='del'>- */</div><div class='del'>-static void cops_reset(struct net_device *dev, int sleep)</div><div class='del'>-{</div><div class='del'>-        struct cops_local *lp = netdev_priv(dev);</div><div class='del'>-        int ioaddr=dev-&gt;base_addr;</div><div class='del'>-</div><div class='del'>-        if(lp-&gt;board==TANGENT)</div><div class='del'>-        {</div><div class='del'>-                inb(ioaddr);		/* Clear request latch. */</div><div class='del'>-                outb(0,ioaddr);		/* Clear the TANG_TX_READY flop. */</div><div class='del'>-                outb(0, ioaddr+TANG_RESET);	/* Reset the adapter. */</div><div class='del'>-</div><div class='del'>-		tangent_wait_reset(ioaddr);</div><div class='del'>-                outb(0, ioaddr+TANG_CLEAR_INT);</div><div class='del'>-        }</div><div class='del'>-        if(lp-&gt;board==DAYNA)</div><div class='del'>-        {</div><div class='del'>-                outb(0, ioaddr+DAYNA_RESET);	/* Assert the reset port */</div><div class='del'>-                inb(ioaddr+DAYNA_RESET);	/* Clear the reset */</div><div class='del'>-		if (sleep)</div><div class='del'>-			msleep(333);</div><div class='del'>-		else</div><div class='del'>-			mdelay(333);</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-	netif_wake_queue(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cops_load (struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct ifreq ifr;</div><div class='del'>-        struct ltfirmware *ltf= (struct ltfirmware *)&amp;ifr.ifr_ifru;</div><div class='del'>-        struct cops_local *lp = netdev_priv(dev);</div><div class='del'>-        int ioaddr=dev-&gt;base_addr;</div><div class='del'>-	int length, i = 0;</div><div class='del'>-</div><div class='del'>-        strcpy(ifr.ifr_name,"lt0");</div><div class='del'>-</div><div class='del'>-        /* Get card's firmware code and do some checks on it. */</div><div class='del'>-#ifdef CONFIG_COPS_DAYNA        </div><div class='del'>-        if(lp-&gt;board==DAYNA)</div><div class='del'>-        {</div><div class='del'>-                ltf-&gt;length=sizeof(ffdrv_code);</div><div class='del'>-                ltf-&gt;data=ffdrv_code;</div><div class='del'>-        }</div><div class='del'>-        else</div><div class='del'>-#endif        </div><div class='del'>-#ifdef CONFIG_COPS_TANGENT</div><div class='del'>-        if(lp-&gt;board==TANGENT)</div><div class='del'>-        {</div><div class='del'>-                ltf-&gt;length=sizeof(ltdrv_code);</div><div class='del'>-                ltf-&gt;data=ltdrv_code;</div><div class='del'>-        }</div><div class='del'>-        else</div><div class='del'>-#endif</div><div class='del'>-	{</div><div class='del'>-		printk(KERN_INFO "%s; unsupported board type.\n", dev-&gt;name);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	</div><div class='del'>-        /* Check to make sure firmware is correct length. */</div><div class='del'>-        if(lp-&gt;board==DAYNA &amp;&amp; ltf-&gt;length!=5983)</div><div class='del'>-        {</div><div class='del'>-                printk(KERN_WARNING "%s: Firmware is not length of FFDRV.BIN.\n", dev-&gt;name);</div><div class='del'>-                return;</div><div class='del'>-        }</div><div class='del'>-        if(lp-&gt;board==TANGENT &amp;&amp; ltf-&gt;length!=2501)</div><div class='del'>-        {</div><div class='del'>-                printk(KERN_WARNING "%s: Firmware is not length of DRVCODE.BIN.\n", dev-&gt;name);</div><div class='del'>-                return;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        if(lp-&gt;board==DAYNA)</div><div class='del'>-        {</div><div class='del'>-                /*</div><div class='del'>-                 *      We must wait for a status response</div><div class='del'>-                 *      with the DAYNA board.</div><div class='del'>-                 */</div><div class='del'>-                while(++i&lt;65536)</div><div class='del'>-                {</div><div class='del'>-                       if((inb(ioaddr+DAYNA_CARD_STATUS)&amp;3)==1)</div><div class='del'>-                                break;</div><div class='del'>-                }</div><div class='del'>-</div><div class='del'>-                if(i==65536)</div><div class='del'>-                        return;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        /*</div><div class='del'>-         *      Upload the firmware and kick. Byte-by-byte works nicely here.</div><div class='del'>-         */</div><div class='del'>-	i=0;</div><div class='del'>-        length = ltf-&gt;length;</div><div class='del'>-        while(length--)</div><div class='del'>-        {</div><div class='del'>-                outb(ltf-&gt;data[i], ioaddr);</div><div class='del'>-                i++;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-	if(cops_debug &gt; 1)</div><div class='del'>-		printk("%s: Uploaded firmware - %d bytes of %d bytes.\n", </div><div class='del'>-			dev-&gt;name, i, ltf-&gt;length);</div><div class='del'>-</div><div class='del'>-        if(lp-&gt;board==DAYNA) 	/* Tell Dayna to run the firmware code. */</div><div class='del'>-                outb(1, ioaddr+DAYNA_INT_CARD);</div><div class='del'>-	else			/* Tell Tang to run the firmware code. */</div><div class='del'>-		inb(ioaddr);</div><div class='del'>-</div><div class='del'>-        if(lp-&gt;board==TANGENT)</div><div class='del'>-        {</div><div class='del'>-                tangent_wait_reset(ioaddr);</div><div class='del'>-                inb(ioaddr);	/* Clear initial ready signal. */</div><div class='del'>-        }</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * 	Get the LocalTalk Nodeid from the card. We can suggest</div><div class='del'>- *	any nodeid 1-254. The card will try and get that exact</div><div class='del'>- *	address else we can specify 0 as the nodeid and the card</div><div class='del'>- *	will autoprobe for a nodeid.</div><div class='del'>- */</div><div class='del'>-static int cops_nodeid (struct net_device *dev, int nodeid)</div><div class='del'>-{</div><div class='del'>-	struct cops_local *lp = netdev_priv(dev);</div><div class='del'>-	int ioaddr = dev-&gt;base_addr;</div><div class='del'>-</div><div class='del'>-	if(lp-&gt;board == DAYNA)</div><div class='del'>-        {</div><div class='del'>-        	/* Empty any pending adapter responses. */</div><div class='del'>-                while((inb(ioaddr+DAYNA_CARD_STATUS)&amp;DAYNA_TX_READY)==0)</div><div class='del'>-                {</div><div class='del'>-			outb(0, ioaddr+COPS_CLEAR_INT);	/* Clear interrupts. */</div><div class='del'>-        		if((inb(ioaddr+DAYNA_CARD_STATUS)&amp;0x03)==DAYNA_RX_REQUEST)</div><div class='del'>-                		cops_rx(dev);	/* Kick any packets waiting. */</div><div class='del'>-			schedule();</div><div class='del'>-                }</div><div class='del'>-</div><div class='del'>-                outb(2, ioaddr);       	/* Output command packet length as 2. */</div><div class='del'>-                outb(0, ioaddr);</div><div class='del'>-                outb(LAP_INIT, ioaddr);	/* Send LAP_INIT command byte. */</div><div class='del'>-                outb(nodeid, ioaddr);  	/* Suggest node address. */</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-	if(lp-&gt;board == TANGENT)</div><div class='del'>-        {</div><div class='del'>-                /* Empty any pending adapter responses. */</div><div class='del'>-                while(inb(ioaddr+TANG_CARD_STATUS)&amp;TANG_RX_READY)</div><div class='del'>-                {</div><div class='del'>-			outb(0, ioaddr+COPS_CLEAR_INT);	/* Clear interrupt. */</div><div class='del'>-                	cops_rx(dev);          	/* Kick out packets waiting. */</div><div class='del'>-			schedule();</div><div class='del'>-                }</div><div class='del'>-</div><div class='del'>-		/* Not sure what Tangent does if nodeid picked is used. */</div><div class='del'>-                if(nodeid == 0)	         		/* Seed. */</div><div class='del'>-                	nodeid = jiffies&amp;0xFF;		/* Get a random try */</div><div class='del'>-                outb(2, ioaddr);        		/* Command length LSB */</div><div class='del'>-                outb(0, ioaddr);       			/* Command length MSB */</div><div class='del'>-                outb(LAP_INIT, ioaddr); 		/* Send LAP_INIT byte */</div><div class='del'>-                outb(nodeid, ioaddr); 		  	/* LAP address hint. */</div><div class='del'>-                outb(0xFF, ioaddr);     		/* Int. level to use */</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-	lp-&gt;node_acquire=0;		/* Set nodeid holder to 0. */</div><div class='del'>-        while(lp-&gt;node_acquire==0)	/* Get *True* nodeid finally. */</div><div class='del'>-	{</div><div class='del'>-		outb(0, ioaddr+COPS_CLEAR_INT);	/* Clear any interrupt. */</div><div class='del'>-</div><div class='del'>-		if(lp-&gt;board == DAYNA)</div><div class='del'>-		{</div><div class='del'>-                	if((inb(ioaddr+DAYNA_CARD_STATUS)&amp;0x03)==DAYNA_RX_REQUEST)</div><div class='del'>-                		cops_rx(dev);	/* Grab the nodeid put in lp-&gt;node_acquire. */</div><div class='del'>-		}</div><div class='del'>-		if(lp-&gt;board == TANGENT)</div><div class='del'>-		{	</div><div class='del'>-			if(inb(ioaddr+TANG_CARD_STATUS)&amp;TANG_RX_READY)</div><div class='del'>-                                cops_rx(dev);   /* Grab the nodeid put in lp-&gt;node_acquire. */</div><div class='del'>-		}</div><div class='del'>-		schedule();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if(cops_debug &gt; 1)</div><div class='del'>-		printk(KERN_DEBUG "%s: Node ID %d has been acquired.\n", </div><div class='del'>-			dev-&gt;name, lp-&gt;node_acquire);</div><div class='del'>-</div><div class='del'>-	lp-&gt;nodeid=1;	/* Set got nodeid to 1. */</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *	Poll the Tangent type cards to see if we have work.</div><div class='del'>- */</div><div class='del'>- </div><div class='del'>-static void cops_poll(unsigned long ltdev)</div><div class='del'>-{</div><div class='del'>-	int ioaddr, status;</div><div class='del'>-	int boguscount = 0;</div><div class='del'>-</div><div class='del'>-	struct net_device *dev = (struct net_device *)ltdev;</div><div class='del'>-</div><div class='del'>-	del_timer(&amp;cops_timer);</div><div class='del'>-</div><div class='del'>-	if(dev == NULL)</div><div class='del'>-		return;	/* We've been downed */</div><div class='del'>-</div><div class='del'>-	ioaddr = dev-&gt;base_addr;</div><div class='del'>-	do {</div><div class='del'>-		status=inb(ioaddr+TANG_CARD_STATUS);</div><div class='del'>-		if(status &amp; TANG_RX_READY)</div><div class='del'>-			cops_rx(dev);</div><div class='del'>-		if(status &amp; TANG_TX_READY)</div><div class='del'>-			netif_wake_queue(dev);</div><div class='del'>-		status = inb(ioaddr+TANG_CARD_STATUS);</div><div class='del'>-	} while((++boguscount &lt; 20) &amp;&amp; (status&amp;(TANG_RX_READY|TANG_TX_READY)));</div><div class='del'>-</div><div class='del'>-	/* poll 20 times per second */</div><div class='del'>-	cops_timer.expires = jiffies + HZ/20;</div><div class='del'>-	add_timer(&amp;cops_timer);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *      The typical workload of the driver:</div><div class='del'>- *      Handle the network interface interrupts.</div><div class='del'>- */</div><div class='del'>-static irqreturn_t cops_interrupt(int irq, void *dev_id)</div><div class='del'>-{</div><div class='del'>-        struct net_device *dev = dev_id;</div><div class='del'>-        struct cops_local *lp;</div><div class='del'>-        int ioaddr, status;</div><div class='del'>-        int boguscount = 0;</div><div class='del'>-</div><div class='del'>-        ioaddr = dev-&gt;base_addr;</div><div class='del'>-        lp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	if(lp-&gt;board==DAYNA)</div><div class='del'>-	{</div><div class='del'>-		do {</div><div class='del'>-			outb(0, ioaddr + COPS_CLEAR_INT);</div><div class='del'>-                       	status=inb(ioaddr+DAYNA_CARD_STATUS);</div><div class='del'>-                       	if((status&amp;0x03)==DAYNA_RX_REQUEST)</div><div class='del'>-                       	        cops_rx(dev);</div><div class='del'>-                	netif_wake_queue(dev);</div><div class='del'>-		} while(++boguscount &lt; 20);</div><div class='del'>-	}</div><div class='del'>-	else</div><div class='del'>-	{</div><div class='del'>-		do {</div><div class='del'>-                       	status=inb(ioaddr+TANG_CARD_STATUS);</div><div class='del'>-			if(status &amp; TANG_RX_READY)</div><div class='del'>-				cops_rx(dev);</div><div class='del'>-			if(status &amp; TANG_TX_READY)</div><div class='del'>-				netif_wake_queue(dev);</div><div class='del'>-			status=inb(ioaddr+TANG_CARD_STATUS);</div><div class='del'>-		} while((++boguscount &lt; 20) &amp;&amp; (status&amp;(TANG_RX_READY|TANG_TX_READY)));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-        return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *      We have a good packet(s), get it/them out of the buffers.</div><div class='del'>- */</div><div class='del'>-static void cops_rx(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        int pkt_len = 0;</div><div class='del'>-        int rsp_type = 0;</div><div class='del'>-        struct sk_buff *skb = NULL;</div><div class='del'>-        struct cops_local *lp = netdev_priv(dev);</div><div class='del'>-        int ioaddr = dev-&gt;base_addr;</div><div class='del'>-        int boguscount = 0;</div><div class='del'>-        unsigned long flags;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;lp-&gt;lock, flags);</div><div class='del'>-	</div><div class='del'>-        if(lp-&gt;board==DAYNA)</div><div class='del'>-        {</div><div class='del'>-                outb(0, ioaddr);                /* Send out Zero length. */</div><div class='del'>-                outb(0, ioaddr);</div><div class='del'>-                outb(DATA_READ, ioaddr);        /* Send read command out. */</div><div class='del'>-</div><div class='del'>-                /* Wait for DMA to turn around. */</div><div class='del'>-                while(++boguscount&lt;1000000)</div><div class='del'>-                {</div><div class='del'>-			barrier();</div><div class='del'>-                        if((inb(ioaddr+DAYNA_CARD_STATUS)&amp;0x03)==DAYNA_RX_READY)</div><div class='del'>-                                break;</div><div class='del'>-                }</div><div class='del'>-</div><div class='del'>-                if(boguscount==1000000)</div><div class='del'>-                {</div><div class='del'>-                        printk(KERN_WARNING "%s: DMA timed out.\n",dev-&gt;name);</div><div class='del'>-			spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);</div><div class='del'>-                        return;</div><div class='del'>-                }</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        /* Get response length. */</div><div class='del'>-	if(lp-&gt;board==DAYNA)</div><div class='del'>-        	pkt_len = inb(ioaddr) &amp; 0xFF;</div><div class='del'>-	else</div><div class='del'>-		pkt_len = inb(ioaddr) &amp; 0x00FF;</div><div class='del'>-        pkt_len |= (inb(ioaddr) &lt;&lt; 8);</div><div class='del'>-        /* Input IO code. */</div><div class='del'>-        rsp_type=inb(ioaddr);</div><div class='del'>-</div><div class='del'>-        /* Malloc up new buffer. */</div><div class='del'>-        skb = dev_alloc_skb(pkt_len);</div><div class='del'>-        if(skb == NULL)</div><div class='del'>-        {</div><div class='del'>-                printk(KERN_WARNING "%s: Memory squeeze, dropping packet.\n",</div><div class='del'>-			dev-&gt;name);</div><div class='del'>-                dev-&gt;stats.rx_dropped++;</div><div class='del'>-                while(pkt_len--)        /* Discard packet */</div><div class='del'>-                        inb(ioaddr);</div><div class='del'>-                spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);</div><div class='del'>-                return;</div><div class='del'>-        }</div><div class='del'>-        skb-&gt;dev = dev;</div><div class='del'>-        skb_put(skb, pkt_len);</div><div class='del'>-        skb-&gt;protocol = htons(ETH_P_LOCALTALK);</div><div class='del'>-</div><div class='del'>-        insb(ioaddr, skb-&gt;data, pkt_len);               /* Eat the Data */</div><div class='del'>-</div><div class='del'>-        if(lp-&gt;board==DAYNA)</div><div class='del'>-                outb(1, ioaddr+DAYNA_INT_CARD);         /* Interrupt the card */</div><div class='del'>-</div><div class='del'>-        spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);  /* Restore interrupts. */</div><div class='del'>-</div><div class='del'>-        /* Check for bad response length */</div><div class='del'>-        if(pkt_len &lt; 0 || pkt_len &gt; MAX_LLAP_SIZE)</div><div class='del'>-        {</div><div class='del'>-		printk(KERN_WARNING "%s: Bad packet length of %d bytes.\n", </div><div class='del'>-			dev-&gt;name, pkt_len);</div><div class='del'>-                dev-&gt;stats.tx_errors++;</div><div class='del'>-                dev_kfree_skb_any(skb);</div><div class='del'>-                return;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        /* Set nodeid and then get out. */</div><div class='del'>-        if(rsp_type == LAP_INIT_RSP)</div><div class='del'>-        {	/* Nodeid taken from received packet. */</div><div class='del'>-                lp-&gt;node_acquire = skb-&gt;data[0];</div><div class='del'>-                dev_kfree_skb_any(skb);</div><div class='del'>-                return;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        /* One last check to make sure we have a good packet. */</div><div class='del'>-        if(rsp_type != LAP_RESPONSE)</div><div class='del'>-        {</div><div class='del'>-                printk(KERN_WARNING "%s: Bad packet type %d.\n", dev-&gt;name, rsp_type);</div><div class='del'>-                dev-&gt;stats.tx_errors++;</div><div class='del'>-                dev_kfree_skb_any(skb);</div><div class='del'>-                return;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        skb_reset_mac_header(skb);    /* Point to entire packet. */</div><div class='del'>-        skb_pull(skb,3);</div><div class='del'>-        skb_reset_transport_header(skb);    /* Point to data (Skip header). */</div><div class='del'>-</div><div class='del'>-        /* Update the counters. */</div><div class='del'>-        dev-&gt;stats.rx_packets++;</div><div class='del'>-        dev-&gt;stats.rx_bytes += skb-&gt;len;</div><div class='del'>-</div><div class='del'>-        /* Send packet to a higher place. */</div><div class='del'>-        netif_rx(skb);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cops_timeout(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct cops_local *lp = netdev_priv(dev);</div><div class='del'>-        int ioaddr = dev-&gt;base_addr;</div><div class='del'>-</div><div class='del'>-	dev-&gt;stats.tx_errors++;</div><div class='del'>-        if(lp-&gt;board==TANGENT)</div><div class='del'>-        {</div><div class='del'>-		if((inb(ioaddr+TANG_CARD_STATUS)&amp;TANG_TX_READY)==0)</div><div class='del'>-               		printk(KERN_WARNING "%s: No TX complete interrupt.\n", dev-&gt;name);</div><div class='del'>-	}</div><div class='del'>-	printk(KERN_WARNING "%s: Transmit timed out.\n", dev-&gt;name);</div><div class='del'>-	cops_jumpstart(dev);	/* Restart the card. */</div><div class='del'>-	dev-&gt;trans_start = jiffies; /* prevent tx timeout */</div><div class='del'>-	netif_wake_queue(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *	Make the card transmit a LocalTalk packet.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static netdev_tx_t cops_send_packet(struct sk_buff *skb,</div><div class='del'>-					  struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        struct cops_local *lp = netdev_priv(dev);</div><div class='del'>-        int ioaddr = dev-&gt;base_addr;</div><div class='del'>-        unsigned long flags;</div><div class='del'>-</div><div class='del'>-        /*</div><div class='del'>-         * Block a timer-based transmit from overlapping. </div><div class='del'>-	 */</div><div class='del'>-	 </div><div class='del'>-	netif_stop_queue(dev);</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;lp-&gt;lock, flags);</div><div class='del'>-	if(lp-&gt;board == DAYNA)	 /* Wait for adapter transmit buffer. */</div><div class='del'>-		while((inb(ioaddr+DAYNA_CARD_STATUS)&amp;DAYNA_TX_READY)==0)</div><div class='del'>-			cpu_relax();</div><div class='del'>-	if(lp-&gt;board == TANGENT) /* Wait for adapter transmit buffer. */</div><div class='del'>-		while((inb(ioaddr+TANG_CARD_STATUS)&amp;TANG_TX_READY)==0)</div><div class='del'>-			cpu_relax();</div><div class='del'>-</div><div class='del'>-	/* Output IO length. */</div><div class='del'>-	outb(skb-&gt;len, ioaddr);</div><div class='del'>-	if(lp-&gt;board == DAYNA)</div><div class='del'>-               	outb(skb-&gt;len &gt;&gt; 8, ioaddr);</div><div class='del'>-	else</div><div class='del'>-		outb((skb-&gt;len &gt;&gt; 8)&amp;0x0FF, ioaddr);</div><div class='del'>-</div><div class='del'>-	/* Output IO code. */</div><div class='del'>-	outb(LAP_WRITE, ioaddr);</div><div class='del'>-</div><div class='del'>-	if(lp-&gt;board == DAYNA)	/* Check the transmit buffer again. */</div><div class='del'>-        	while((inb(ioaddr+DAYNA_CARD_STATUS)&amp;DAYNA_TX_READY)==0);</div><div class='del'>-</div><div class='del'>-	outsb(ioaddr, skb-&gt;data, skb-&gt;len);	/* Send out the data. */</div><div class='del'>-</div><div class='del'>-	if(lp-&gt;board==DAYNA)	/* Dayna requires you kick the card */</div><div class='del'>-		outb(1, ioaddr+DAYNA_INT_CARD);</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);	/* Restore interrupts. */</div><div class='del'>-</div><div class='del'>-	/* Done sending packet, update counters and cleanup. */</div><div class='del'>-	dev-&gt;stats.tx_packets++;</div><div class='del'>-	dev-&gt;stats.tx_bytes += skb-&gt;len;</div><div class='del'>-	dev_kfree_skb (skb);</div><div class='del'>-	return NETDEV_TX_OK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *	Dummy function to keep the Appletalk layer happy.</div><div class='del'>- */</div><div class='del'>- </div><div class='del'>-static void set_multicast_list(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-        if(cops_debug &gt;= 3)</div><div class='del'>-		printk("%s: set_multicast_list executed\n", dev-&gt;name);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *      System ioctls for the COPS LocalTalk card.</div><div class='del'>- */</div><div class='del'>- </div><div class='del'>-static int cops_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)</div><div class='del'>-{</div><div class='del'>-        struct cops_local *lp = netdev_priv(dev);</div><div class='del'>-        struct sockaddr_at *sa = (struct sockaddr_at *)&amp;ifr-&gt;ifr_addr;</div><div class='del'>-        struct atalk_addr *aa = &amp;lp-&gt;node_addr;</div><div class='del'>-</div><div class='del'>-        switch(cmd)</div><div class='del'>-        {</div><div class='del'>-                case SIOCSIFADDR:</div><div class='del'>-			/* Get and set the nodeid and network # atalkd wants. */</div><div class='del'>-			cops_nodeid(dev, sa-&gt;sat_addr.s_node);</div><div class='del'>-			aa-&gt;s_net               = sa-&gt;sat_addr.s_net;</div><div class='del'>-                        aa-&gt;s_node              = lp-&gt;node_acquire;</div><div class='del'>-</div><div class='del'>-			/* Set broardcast address. */</div><div class='del'>-                        dev-&gt;broadcast[0]       = 0xFF;</div><div class='del'>-			</div><div class='del'>-			/* Set hardware address. */</div><div class='del'>-                        dev-&gt;dev_addr[0]        = aa-&gt;s_node;</div><div class='del'>-                        dev-&gt;addr_len           = 1;</div><div class='del'>-                        return 0;</div><div class='del'>-</div><div class='del'>-                case SIOCGIFADDR:</div><div class='del'>-                        sa-&gt;sat_addr.s_net      = aa-&gt;s_net;</div><div class='del'>-                        sa-&gt;sat_addr.s_node     = aa-&gt;s_node;</div><div class='del'>-                        return 0;</div><div class='del'>-</div><div class='del'>-                default:</div><div class='del'>-                        return -EOPNOTSUPP;</div><div class='del'>-        }</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *	The inverse routine to cops_open().</div><div class='del'>- */</div><div class='del'>- </div><div class='del'>-static int cops_close(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct cops_local *lp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	/* If we were running polled, yank the timer.</div><div class='del'>-	 */</div><div class='del'>-	if(lp-&gt;board==TANGENT &amp;&amp; dev-&gt;irq==0)</div><div class='del'>-		del_timer(&amp;cops_timer);</div><div class='del'>-</div><div class='del'>-	netif_stop_queue(dev);</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#ifdef MODULE</div><div class='del'>-static struct net_device *cops_dev;</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-module_param(io, int, 0);</div><div class='del'>-module_param(irq, int, 0);</div><div class='del'>-module_param(board_type, int, 0);</div><div class='del'>-</div><div class='del'>-static int __init cops_module_init(void)</div><div class='del'>-{</div><div class='del'>-	if (io == 0)</div><div class='del'>-		printk(KERN_WARNING "%s: You shouldn't autoprobe with insmod\n",</div><div class='del'>-			cardname);</div><div class='del'>-	cops_dev = cops_probe(-1);</div><div class='del'>-	return PTR_ERR_OR_ZERO(cops_dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit cops_module_exit(void)</div><div class='del'>-{</div><div class='del'>-	unregister_netdev(cops_dev);</div><div class='del'>-	cleanup_card(cops_dev);</div><div class='del'>-	free_netdev(cops_dev);</div><div class='del'>-}</div><div class='del'>-module_init(cops_module_init);</div><div class='del'>-module_exit(cops_module_exit);</div><div class='del'>-#endif /* MODULE */</div><div class='head'>diff --git a/drivers/net/appletalk/cops.h b/drivers/net/appletalk/cops.h<br/>deleted file mode 100644<br/>index fd2750b269c8..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/appletalk/cops.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/appletalk/cops.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,60 +0,0 @@</div><div class='del'>-/*      cops.h: LocalTalk driver for Linux.</div><div class='del'>- *</div><div class='del'>- *      Authors:</div><div class='del'>- *      - Jay Schulist &lt;jschlst@samba.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __LINUX_COPSLTALK_H</div><div class='del'>-#define __LINUX_COPSLTALK_H</div><div class='del'>-</div><div class='del'>-#ifdef __KERNEL__</div><div class='del'>-</div><div class='del'>-/* Max LLAP size we will accept. */</div><div class='del'>-#define MAX_LLAP_SIZE		603</div><div class='del'>-</div><div class='del'>-/* Tangent */</div><div class='del'>-#define TANG_CARD_STATUS        1</div><div class='del'>-#define TANG_CLEAR_INT          1</div><div class='del'>-#define TANG_RESET              3</div><div class='del'>-</div><div class='del'>-#define TANG_TX_READY           1</div><div class='del'>-#define TANG_RX_READY           2</div><div class='del'>-</div><div class='del'>-/* Dayna */</div><div class='del'>-#define DAYNA_CMD_DATA          0</div><div class='del'>-#define DAYNA_CLEAR_INT         1</div><div class='del'>-#define DAYNA_CARD_STATUS       2</div><div class='del'>-#define DAYNA_INT_CARD          3</div><div class='del'>-#define DAYNA_RESET             4</div><div class='del'>-</div><div class='del'>-#define DAYNA_RX_READY          0</div><div class='del'>-#define DAYNA_TX_READY          1</div><div class='del'>-#define DAYNA_RX_REQUEST        3</div><div class='del'>-</div><div class='del'>-/* Same on both card types */</div><div class='del'>-#define COPS_CLEAR_INT  1</div><div class='del'>-</div><div class='del'>-/* LAP response codes received from the cards. */</div><div class='del'>-#define LAP_INIT        1       /* Init cmd */</div><div class='del'>-#define LAP_INIT_RSP    2       /* Init response */</div><div class='del'>-#define LAP_WRITE       3       /* Write cmd */</div><div class='del'>-#define DATA_READ       4       /* Data read */</div><div class='del'>-#define LAP_RESPONSE    4       /* Received ALAP frame response */</div><div class='del'>-#define LAP_GETSTAT     5       /* Get LAP and HW status */</div><div class='del'>-#define LAP_RSPSTAT     6       /* Status response */</div><div class='del'>-</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *	Structure to hold the firmware information.</div><div class='del'>- */</div><div class='del'>-struct ltfirmware</div><div class='del'>-{</div><div class='del'>-        unsigned int length;</div><div class='del'>-        const unsigned char *data;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define DAYNA 1</div><div class='del'>-#define TANGENT 2</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/drivers/net/appletalk/cops_ffdrv.h b/drivers/net/appletalk/cops_ffdrv.h<br/>deleted file mode 100644<br/>index b02005087c1b..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/appletalk/cops_ffdrv.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/appletalk/cops_ffdrv.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,532 +0,0 @@</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *	The firmware this driver downloads into the Localtalk card is a</div><div class='del'>- *	separate program and is not GPL'd source code, even though the Linux</div><div class='del'>- *	side driver and the routine that loads this data into the card are.</div><div class='del'>- *	</div><div class='del'>- *	It is taken from the COPS SDK and is under the following license</div><div class='del'>- *</div><div class='del'>- *	This material is licensed to you strictly for use in conjunction with</div><div class='del'>- *	the use of COPS LocalTalk adapters.</div><div class='del'>- *	There is no charge for this SDK. And no waranty express or implied</div><div class='del'>- *	about its fitness for any purpose. However, we will cheerefully</div><div class='del'>- *	refund every penny you paid for this SDK...</div><div class='del'>- *	Regards,</div><div class='del'>- *</div><div class='del'>- *	Thomas F. Divine</div><div class='del'>- *	Chief Scientist</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*      cops_ffdrv.h: LocalTalk driver firmware dump for Linux.</div><div class='del'>- *</div><div class='del'>- *      Authors:</div><div class='del'>- *      - Jay Schulist &lt;jschlst@samba.org&gt;</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_COPS_DAYNA</div><div class='del'>-</div><div class='del'>-static const unsigned char ffdrv_code[] = {</div><div class='del'>-	58,3,0,50,228,149,33,255,255,34,226,149,</div><div class='del'>-	249,17,40,152,33,202,154,183,237,82,77,68,</div><div class='del'>-	11,107,98,19,54,0,237,176,175,50,80,0,</div><div class='del'>-	62,128,237,71,62,32,237,57,51,62,12,237,</div><div class='del'>-	57,50,237,57,54,62,6,237,57,52,62,12,</div><div class='del'>-	237,57,49,33,107,137,34,32,128,33,83,130,</div><div class='del'>-	34,40,128,33,86,130,34,42,128,33,112,130,</div><div class='del'>-	34,36,128,33,211,130,34,38,128,62,0,237,</div><div class='del'>-	57,16,33,63,148,34,34,128,237,94,205,15,</div><div class='del'>-	130,251,205,168,145,24,141,67,111,112,121,114,</div><div class='del'>-	105,103,104,116,32,40,67,41,32,49,57,56,</div><div class='del'>-	56,32,45,32,68,97,121,110,97,32,67,111,</div><div class='del'>-	109,109,117,110,105,99,97,116,105,111,110,115,</div><div class='del'>-	32,32,32,65,108,108,32,114,105,103,104,116,</div><div class='del'>-	115,32,114,101,115,101,114,118,101,100,46,32,</div><div class='del'>-	32,40,68,40,68,7,16,8,34,7,22,6,</div><div class='del'>-	16,5,12,4,8,3,6,140,0,16,39,128,</div><div class='del'>-	0,4,96,10,224,6,0,7,126,2,64,11,</div><div class='del'>-	118,12,6,13,0,14,193,15,0,5,96,3,</div><div class='del'>-	192,1,64,9,8,62,9,211,66,62,192,211,</div><div class='del'>-	66,62,100,61,32,253,6,28,33,205,129,14,</div><div class='del'>-	66,237,163,194,253,129,6,28,33,205,129,14,</div><div class='del'>-	64,237,163,194,9,130,201,62,47,50,71,152,</div><div class='del'>-	62,47,211,68,58,203,129,237,57,20,58,204,</div><div class='del'>-	129,237,57,21,33,77,152,54,132,205,233,129,</div><div class='del'>-	58,228,149,254,209,40,6,56,4,62,0,24,</div><div class='del'>-	2,219,96,33,233,149,119,230,62,33,232,149,</div><div class='del'>-	119,213,33,8,152,17,7,0,25,119,19,25,</div><div class='del'>-	119,209,201,251,237,77,245,197,213,229,221,229,</div><div class='del'>-	205,233,129,62,1,50,106,137,205,158,139,221,</div><div class='del'>-	225,225,209,193,241,251,237,77,245,197,213,219,</div><div class='del'>-	72,237,56,16,230,46,237,57,16,237,56,12,</div><div class='del'>-	58,72,152,183,32,26,6,20,17,128,2,237,</div><div class='del'>-	56,46,187,32,35,237,56,47,186,32,29,219,</div><div class='del'>-	72,230,1,32,3,5,32,232,175,50,72,152,</div><div class='del'>-	229,221,229,62,1,50,106,137,205,158,139,221,</div><div class='del'>-	225,225,24,25,62,1,50,72,152,58,201,129,</div><div class='del'>-	237,57,12,58,202,129,237,57,13,237,56,16,</div><div class='del'>-	246,17,237,57,16,209,193,241,251,237,77,245,</div><div class='del'>-	197,229,213,221,229,237,56,16,230,17,237,57,</div><div class='del'>-	16,237,56,20,58,34,152,246,16,246,8,211,</div><div class='del'>-	68,62,6,61,32,253,58,34,152,246,8,211,</div><div class='del'>-	68,58,203,129,237,57,20,58,204,129,237,57,</div><div class='del'>-	21,237,56,16,246,34,237,57,16,221,225,209,</div><div class='del'>-	225,193,241,251,237,77,33,2,0,57,126,230,</div><div class='del'>-	3,237,100,1,40,2,246,128,230,130,245,62,</div><div class='del'>-	5,211,64,241,211,64,201,229,213,243,237,56,</div><div class='del'>-	16,230,46,237,57,16,237,56,12,251,70,35,</div><div class='del'>-	35,126,254,175,202,77,133,254,129,202,15,133,</div><div class='del'>-	230,128,194,191,132,43,58,44,152,119,33,76,</div><div class='del'>-	152,119,35,62,132,119,120,254,255,40,4,58,</div><div class='del'>-	49,152,119,219,72,43,43,112,17,3,0,237,</div><div class='del'>-	56,52,230,248,237,57,52,219,72,230,1,194,</div><div class='del'>-	141,131,209,225,237,56,52,246,6,237,57,52,</div><div class='del'>-	62,1,55,251,201,62,3,211,66,62,192,211,</div><div class='del'>-	66,62,48,211,66,0,0,219,66,230,1,40,</div><div class='del'>-	4,219,67,24,240,205,203,135,58,75,152,254,</div><div class='del'>-	255,202,128,132,58,49,152,254,161,250,207,131,</div><div class='del'>-	58,34,152,211,68,62,10,211,66,62,128,211,</div><div class='del'>-	66,62,11,211,66,62,6,211,66,24,0,62,</div><div class='del'>-	14,211,66,62,33,211,66,62,1,211,66,62,</div><div class='del'>-	64,211,66,62,3,211,66,62,209,211,66,62,</div><div class='del'>-	100,71,219,66,230,1,32,6,5,32,247,195,</div><div class='del'>-	248,132,219,67,71,58,44,152,184,194,248,132,</div><div class='del'>-	62,100,71,219,66,230,1,32,6,5,32,247,</div><div class='del'>-	195,248,132,219,67,62,100,71,219,66,230,1,</div><div class='del'>-	32,6,5,32,247,195,248,132,219,67,254,133,</div><div class='del'>-	32,7,62,0,50,74,152,24,17,254,173,32,</div><div class='del'>-	7,62,1,50,74,152,24,6,254,141,194,248,</div><div class='del'>-	132,71,209,225,58,49,152,254,132,32,10,62,</div><div class='del'>-	50,205,2,134,205,144,135,24,27,254,140,32,</div><div class='del'>-	15,62,110,205,2,134,62,141,184,32,5,205,</div><div class='del'>-	144,135,24,8,62,10,205,2,134,205,8,134,</div><div class='del'>-	62,1,50,106,137,205,158,139,237,56,52,246,</div><div class='del'>-	6,237,57,52,175,183,251,201,62,20,135,237,</div><div class='del'>-	57,20,175,237,57,21,237,56,16,246,2,237,</div><div class='del'>-	57,16,237,56,20,95,237,56,21,123,254,10,</div><div class='del'>-	48,244,237,56,16,230,17,237,57,16,209,225,</div><div class='del'>-	205,144,135,62,1,50,106,137,205,158,139,237,</div><div class='del'>-	56,52,246,6,237,57,52,175,183,251,201,209,</div><div class='del'>-	225,243,219,72,230,1,40,13,62,10,211,66,</div><div class='del'>-	0,0,219,66,230,192,202,226,132,237,56,52,</div><div class='del'>-	246,6,237,57,52,62,1,55,251,201,205,203,</div><div class='del'>-	135,62,1,50,106,137,205,158,139,237,56,52,</div><div class='del'>-	246,6,237,57,52,183,251,201,209,225,62,1,</div><div class='del'>-	50,106,137,205,158,139,237,56,52,246,6,237,</div><div class='del'>-	57,52,62,2,55,251,201,209,225,243,219,72,</div><div class='del'>-	230,1,202,213,132,62,10,211,66,0,0,219,</div><div class='del'>-	66,230,192,194,213,132,229,62,1,50,106,137,</div><div class='del'>-	42,40,152,205,65,143,225,17,3,0,205,111,</div><div class='del'>-	136,62,6,211,66,58,44,152,211,66,237,56,</div><div class='del'>-	52,246,6,237,57,52,183,251,201,209,197,237,</div><div class='del'>-	56,52,230,248,237,57,52,219,72,230,1,32,</div><div class='del'>-	15,193,225,237,56,52,246,6,237,57,52,62,</div><div class='del'>-	1,55,251,201,14,23,58,37,152,254,0,40,</div><div class='del'>-	14,14,2,254,1,32,5,62,140,119,24,3,</div><div class='del'>-	62,132,119,43,43,197,205,203,135,193,62,1,</div><div class='del'>-	211,66,62,64,211,66,62,3,211,66,62,193,</div><div class='del'>-	211,66,62,100,203,39,71,219,66,230,1,32,</div><div class='del'>-	6,5,32,247,195,229,133,33,238,151,219,67,</div><div class='del'>-	71,58,44,152,184,194,229,133,119,62,100,71,</div><div class='del'>-	219,66,230,1,32,6,5,32,247,195,229,133,</div><div class='del'>-	219,67,35,119,13,32,234,193,225,62,1,50,</div><div class='del'>-	106,137,205,158,139,237,56,52,246,6,237,57,</div><div class='del'>-	52,175,183,251,201,33,234,151,35,35,62,255,</div><div class='del'>-	119,193,225,62,1,50,106,137,205,158,139,237,</div><div class='del'>-	56,52,246,6,237,57,52,175,251,201,243,61,</div><div class='del'>-	32,253,251,201,62,3,211,66,62,192,211,66,</div><div class='del'>-	58,49,152,254,140,32,19,197,229,213,17,181,</div><div class='del'>-	129,33,185,129,1,2,0,237,176,209,225,193,</div><div class='del'>-	24,27,229,213,33,187,129,58,49,152,230,15,</div><div class='del'>-	87,30,2,237,92,25,17,181,129,126,18,19,</div><div class='del'>-	35,126,18,209,225,58,34,152,246,8,211,68,</div><div class='del'>-	58,49,152,254,165,40,14,254,164,40,10,62,</div><div class='del'>-	10,211,66,62,224,211,66,24,25,58,74,152,</div><div class='del'>-	254,0,40,10,62,10,211,66,62,160,211,66,</div><div class='del'>-	24,8,62,10,211,66,62,128,211,66,62,11,</div><div class='del'>-	211,66,62,6,211,66,205,147,143,62,5,211,</div><div class='del'>-	66,62,224,211,66,62,5,211,66,62,96,211,</div><div class='del'>-	66,62,5,61,32,253,62,5,211,66,62,224,</div><div class='del'>-	211,66,62,14,61,32,253,62,5,211,66,62,</div><div class='del'>-	233,211,66,62,128,211,66,58,181,129,61,32,</div><div class='del'>-	253,62,1,211,66,62,192,211,66,1,254,19,</div><div class='del'>-	237,56,46,187,32,6,13,32,247,195,226,134,</div><div class='del'>-	62,192,211,66,0,0,219,66,203,119,40,250,</div><div class='del'>-	219,66,203,87,40,250,243,237,56,16,230,17,</div><div class='del'>-	237,57,16,237,56,20,251,62,5,211,66,62,</div><div class='del'>-	224,211,66,58,182,129,61,32,253,229,33,181,</div><div class='del'>-	129,58,183,129,203,63,119,35,58,184,129,119,</div><div class='del'>-	225,62,10,211,66,62,224,211,66,62,11,211,</div><div class='del'>-	66,62,118,211,66,62,47,211,68,62,5,211,</div><div class='del'>-	66,62,233,211,66,58,181,129,61,32,253,62,</div><div class='del'>-	5,211,66,62,224,211,66,58,182,129,61,32,</div><div class='del'>-	253,62,5,211,66,62,96,211,66,201,229,213,</div><div class='del'>-	58,50,152,230,15,87,30,2,237,92,33,187,</div><div class='del'>-	129,25,17,181,129,126,18,35,19,126,18,209,</div><div class='del'>-	225,58,71,152,246,8,211,68,58,50,152,254,</div><div class='del'>-	165,40,14,254,164,40,10,62,10,211,66,62,</div><div class='del'>-	224,211,66,24,8,62,10,211,66,62,128,211,</div><div class='del'>-	66,62,11,211,66,62,6,211,66,195,248,135,</div><div class='del'>-	62,3,211,66,62,192,211,66,197,229,213,17,</div><div class='del'>-	181,129,33,183,129,1,2,0,237,176,209,225,</div><div class='del'>-	193,62,47,211,68,62,10,211,66,62,224,211,</div><div class='del'>-	66,62,11,211,66,62,118,211,66,62,1,211,</div><div class='del'>-	66,62,0,211,66,205,147,143,195,16,136,62,</div><div class='del'>-	3,211,66,62,192,211,66,197,229,213,17,181,</div><div class='del'>-	129,33,183,129,1,2,0,237,176,209,225,193,</div><div class='del'>-	62,47,211,68,62,10,211,66,62,224,211,66,</div><div class='del'>-	62,11,211,66,62,118,211,66,205,147,143,62,</div><div class='del'>-	5,211,66,62,224,211,66,62,5,211,66,62,</div><div class='del'>-	96,211,66,62,5,61,32,253,62,5,211,66,</div><div class='del'>-	62,224,211,66,62,14,61,32,253,62,5,211,</div><div class='del'>-	66,62,233,211,66,62,128,211,66,58,181,129,</div><div class='del'>-	61,32,253,62,1,211,66,62,192,211,66,1,</div><div class='del'>-	254,19,237,56,46,187,32,6,13,32,247,195,</div><div class='del'>-	88,136,62,192,211,66,0,0,219,66,203,119,</div><div class='del'>-	40,250,219,66,203,87,40,250,62,5,211,66,</div><div class='del'>-	62,224,211,66,58,182,129,61,32,253,62,5,</div><div class='del'>-	211,66,62,96,211,66,201,197,14,67,6,0,</div><div class='del'>-	62,3,211,66,62,192,211,66,62,48,211,66,</div><div class='del'>-	0,0,219,66,230,1,40,4,219,67,24,240,</div><div class='del'>-	62,5,211,66,62,233,211,66,62,128,211,66,</div><div class='del'>-	58,181,129,61,32,253,237,163,29,62,192,211,</div><div class='del'>-	66,219,66,230,4,40,250,237,163,29,32,245,</div><div class='del'>-	219,66,230,4,40,250,62,255,71,219,66,230,</div><div class='del'>-	4,40,3,5,32,247,219,66,230,4,40,250,</div><div class='del'>-	62,5,211,66,62,224,211,66,58,182,129,61,</div><div class='del'>-	32,253,62,5,211,66,62,96,211,66,58,71,</div><div class='del'>-	152,254,1,202,18,137,62,16,211,66,62,56,</div><div class='del'>-	211,66,62,14,211,66,62,33,211,66,62,1,</div><div class='del'>-	211,66,62,248,211,66,237,56,48,246,153,230,</div><div class='del'>-	207,237,57,48,62,3,211,66,62,221,211,66,</div><div class='del'>-	193,201,58,71,152,211,68,62,10,211,66,62,</div><div class='del'>-	128,211,66,62,11,211,66,62,6,211,66,62,</div><div class='del'>-	6,211,66,58,44,152,211,66,62,16,211,66,</div><div class='del'>-	62,56,211,66,62,48,211,66,0,0,62,14,</div><div class='del'>-	211,66,62,33,211,66,62,1,211,66,62,248,</div><div class='del'>-	211,66,237,56,48,246,145,246,8,230,207,237,</div><div class='del'>-	57,48,62,3,211,66,62,221,211,66,193,201,</div><div class='del'>-	44,3,1,0,70,69,1,245,197,213,229,175,</div><div class='del'>-	50,72,152,237,56,16,230,46,237,57,16,237,</div><div class='del'>-	56,12,62,1,211,66,0,0,219,66,95,230,</div><div class='del'>-	160,32,3,195,20,139,123,230,96,194,72,139,</div><div class='del'>-	62,48,211,66,62,1,211,66,62,64,211,66,</div><div class='del'>-	237,91,40,152,205,207,143,25,43,55,237,82,</div><div class='del'>-	218,70,139,34,42,152,98,107,58,44,152,190,</div><div class='del'>-	194,210,138,35,35,62,130,190,194,200,137,62,</div><div class='del'>-	1,50,48,152,62,175,190,202,82,139,62,132,</div><div class='del'>-	190,32,44,50,50,152,62,47,50,71,152,229,</div><div class='del'>-	175,50,106,137,42,40,152,205,65,143,225,54,</div><div class='del'>-	133,43,70,58,44,152,119,43,112,17,3,0,</div><div class='del'>-	62,10,205,2,134,205,111,136,195,158,138,62,</div><div class='del'>-	140,190,32,19,50,50,152,58,233,149,230,4,</div><div class='del'>-	202,222,138,62,1,50,71,152,195,219,137,126,</div><div class='del'>-	254,160,250,185,138,254,166,242,185,138,50,50,</div><div class='del'>-	152,43,126,35,229,213,33,234,149,95,22,0,</div><div class='del'>-	25,126,254,132,40,18,254,140,40,14,58,50,</div><div class='del'>-	152,230,15,87,126,31,21,242,65,138,56,2,</div><div class='del'>-	175,119,58,50,152,230,15,87,58,233,149,230,</div><div class='del'>-	62,31,21,242,85,138,218,98,138,209,225,195,</div><div class='del'>-	20,139,58,50,152,33,100,137,230,15,95,22,</div><div class='del'>-	0,25,126,50,71,152,209,225,58,50,152,254,</div><div class='del'>-	164,250,135,138,58,73,152,254,0,40,4,54,</div><div class='del'>-	173,24,2,54,133,43,70,58,44,152,119,43,</div><div class='del'>-	112,17,3,0,205,70,135,175,50,106,137,205,</div><div class='del'>-	208,139,58,199,129,237,57,12,58,200,129,237,</div><div class='del'>-	57,13,237,56,16,246,17,237,57,16,225,209,</div><div class='del'>-	193,241,251,237,77,62,129,190,194,227,138,54,</div><div class='del'>-	130,43,70,58,44,152,119,43,112,17,3,0,</div><div class='del'>-	205,144,135,195,20,139,35,35,126,254,132,194,</div><div class='del'>-	227,138,175,50,106,137,205,158,139,24,42,58,</div><div class='del'>-	201,154,254,1,40,7,62,1,50,106,137,24,</div><div class='del'>-	237,58,106,137,254,1,202,222,138,62,128,166,</div><div class='del'>-	194,222,138,221,229,221,33,67,152,205,127,142,</div><div class='del'>-	205,109,144,221,225,225,209,193,241,251,237,77,</div><div class='del'>-	58,106,137,254,1,202,44,139,58,50,152,254,</div><div class='del'>-	164,250,44,139,58,73,152,238,1,50,73,152,</div><div class='del'>-	221,229,221,33,51,152,205,127,142,221,225,62,</div><div class='del'>-	1,50,106,137,205,158,139,195,13,139,24,208,</div><div class='del'>-	24,206,24,204,230,64,40,3,195,20,139,195,</div><div class='del'>-	20,139,43,126,33,8,152,119,35,58,44,152,</div><div class='del'>-	119,43,237,91,35,152,205,203,135,205,158,139,</div><div class='del'>-	195,13,139,175,50,78,152,62,3,211,66,62,</div><div class='del'>-	192,211,66,201,197,33,4,0,57,126,35,102,</div><div class='del'>-	111,62,1,50,106,137,219,72,205,141,139,193,</div><div class='del'>-	201,62,1,50,78,152,34,40,152,54,0,35,</div><div class='del'>-	35,54,0,195,163,139,58,78,152,183,200,229,</div><div class='del'>-	33,181,129,58,183,129,119,35,58,184,129,119,</div><div class='del'>-	225,62,47,211,68,62,14,211,66,62,193,211,</div><div class='del'>-	66,62,10,211,66,62,224,211,66,62,11,211,</div><div class='del'>-	66,62,118,211,66,195,3,140,58,78,152,183,</div><div class='del'>-	200,58,71,152,211,68,254,69,40,4,254,70,</div><div class='del'>-	32,17,58,73,152,254,0,40,10,62,10,211,</div><div class='del'>-	66,62,160,211,66,24,8,62,10,211,66,62,</div><div class='del'>-	128,211,66,62,11,211,66,62,6,211,66,62,</div><div class='del'>-	6,211,66,58,44,152,211,66,62,16,211,66,</div><div class='del'>-	62,56,211,66,62,48,211,66,0,0,219,66,</div><div class='del'>-	230,1,40,4,219,67,24,240,62,14,211,66,</div><div class='del'>-	62,33,211,66,42,40,152,205,65,143,62,1,</div><div class='del'>-	211,66,62,248,211,66,237,56,48,246,145,246,</div><div class='del'>-	8,230,207,237,57,48,62,3,211,66,62,221,</div><div class='del'>-	211,66,201,62,16,211,66,62,56,211,66,62,</div><div class='del'>-	48,211,66,0,0,219,66,230,1,40,4,219,</div><div class='del'>-	67,24,240,62,14,211,66,62,33,211,66,62,</div><div class='del'>-	1,211,66,62,248,211,66,237,56,48,246,153,</div><div class='del'>-	230,207,237,57,48,62,3,211,66,62,221,211,</div><div class='del'>-	66,201,229,213,33,234,149,95,22,0,25,126,</div><div class='del'>-	254,132,40,4,254,140,32,2,175,119,123,209,</div><div class='del'>-	225,201,6,8,14,0,31,48,1,12,16,250,</div><div class='del'>-	121,201,33,4,0,57,94,35,86,33,2,0,</div><div class='del'>-	57,126,35,102,111,221,229,34,89,152,237,83,</div><div class='del'>-	91,152,221,33,63,152,205,127,142,58,81,152,</div><div class='del'>-	50,82,152,58,80,152,135,50,80,152,205,162,</div><div class='del'>-	140,254,3,56,16,58,81,152,135,60,230,15,</div><div class='del'>-	50,81,152,175,50,80,152,24,23,58,79,152,</div><div class='del'>-	205,162,140,254,3,48,13,58,81,152,203,63,</div><div class='del'>-	50,81,152,62,255,50,79,152,58,81,152,50,</div><div class='del'>-	82,152,58,79,152,135,50,79,152,62,32,50,</div><div class='del'>-	83,152,50,84,152,237,56,16,230,17,237,57,</div><div class='del'>-	16,219,72,62,192,50,93,152,62,93,50,94,</div><div class='del'>-	152,58,93,152,61,50,93,152,32,9,58,94,</div><div class='del'>-	152,61,50,94,152,40,44,62,170,237,57,20,</div><div class='del'>-	175,237,57,21,237,56,16,246,2,237,57,16,</div><div class='del'>-	219,72,230,1,202,29,141,237,56,20,71,237,</div><div class='del'>-	56,21,120,254,10,48,237,237,56,16,230,17,</div><div class='del'>-	237,57,16,243,62,14,211,66,62,65,211,66,</div><div class='del'>-	251,58,39,152,23,23,60,50,39,152,71,58,</div><div class='del'>-	82,152,160,230,15,40,22,71,14,10,219,66,</div><div class='del'>-	230,16,202,186,141,219,72,230,1,202,186,141,</div><div class='del'>-	13,32,239,16,235,42,89,152,237,91,91,152,</div><div class='del'>-	205,47,131,48,7,61,202,186,141,195,227,141,</div><div class='del'>-	221,225,33,0,0,201,221,33,55,152,205,127,</div><div class='del'>-	142,58,84,152,61,50,84,152,40,19,58,82,</div><div class='del'>-	152,246,1,50,82,152,58,79,152,246,1,50,</div><div class='del'>-	79,152,195,29,141,221,225,33,1,0,201,221,</div><div class='del'>-	33,59,152,205,127,142,58,80,152,246,1,50,</div><div class='del'>-	80,152,58,82,152,135,246,1,50,82,152,58,</div><div class='del'>-	83,152,61,50,83,152,194,29,141,221,225,33,</div><div class='del'>-	2,0,201,221,229,33,0,0,57,17,4,0,</div><div class='del'>-	25,126,50,44,152,230,128,50,85,152,58,85,</div><div class='del'>-	152,183,40,6,221,33,88,2,24,4,221,33,</div><div class='del'>-	150,0,58,44,152,183,40,53,60,40,50,60,</div><div class='del'>-	40,47,61,61,33,86,152,119,35,119,35,54,</div><div class='del'>-	129,175,50,48,152,221,43,221,229,225,124,181,</div><div class='del'>-	40,42,33,86,152,17,3,0,205,189,140,17,</div><div class='del'>-	232,3,27,123,178,32,251,58,48,152,183,40,</div><div class='del'>-	224,58,44,152,71,62,7,128,230,127,71,58,</div><div class='del'>-	85,152,176,50,44,152,24,162,221,225,201,183,</div><div class='del'>-	221,52,0,192,221,52,1,192,221,52,2,192,</div><div class='del'>-	221,52,3,192,55,201,245,62,1,211,100,241,</div><div class='del'>-	201,245,62,1,211,96,241,201,33,2,0,57,</div><div class='del'>-	126,35,102,111,237,56,48,230,175,237,57,48,</div><div class='del'>-	62,48,237,57,49,125,237,57,32,124,237,57,</div><div class='del'>-	33,62,0,237,57,34,62,88,237,57,35,62,</div><div class='del'>-	0,237,57,36,237,57,37,33,128,2,125,237,</div><div class='del'>-	57,38,124,237,57,39,237,56,48,246,97,230,</div><div class='del'>-	207,237,57,48,62,0,237,57,0,62,0,211,</div><div class='del'>-	96,211,100,201,33,2,0,57,126,35,102,111,</div><div class='del'>-	237,56,48,230,175,237,57,48,62,12,237,57,</div><div class='del'>-	49,62,76,237,57,32,62,0,237,57,33,237,</div><div class='del'>-	57,34,125,237,57,35,124,237,57,36,62,0,</div><div class='del'>-	237,57,37,33,128,2,125,237,57,38,124,237,</div><div class='del'>-	57,39,237,56,48,246,97,230,207,237,57,48,</div><div class='del'>-	62,1,211,96,201,33,2,0,57,126,35,102,</div><div class='del'>-	111,229,237,56,48,230,87,237,57,48,125,237,</div><div class='del'>-	57,40,124,237,57,41,62,0,237,57,42,62,</div><div class='del'>-	67,237,57,43,62,0,237,57,44,58,106,137,</div><div class='del'>-	254,1,32,5,33,6,0,24,3,33,128,2,</div><div class='del'>-	125,237,57,46,124,237,57,47,237,56,50,230,</div><div class='del'>-	252,246,2,237,57,50,225,201,33,4,0,57,</div><div class='del'>-	94,35,86,33,2,0,57,126,35,102,111,237,</div><div class='del'>-	56,48,230,87,237,57,48,125,237,57,40,124,</div><div class='del'>-	237,57,41,62,0,237,57,42,62,67,237,57,</div><div class='del'>-	43,62,0,237,57,44,123,237,57,46,122,237,</div><div class='del'>-	57,47,237,56,50,230,244,246,0,237,57,50,</div><div class='del'>-	237,56,48,246,145,230,207,237,57,48,201,213,</div><div class='del'>-	237,56,46,95,237,56,47,87,237,56,46,111,</div><div class='del'>-	237,56,47,103,183,237,82,32,235,33,128,2,</div><div class='del'>-	183,237,82,209,201,213,237,56,38,95,237,56,</div><div class='del'>-	39,87,237,56,38,111,237,56,39,103,183,237,</div><div class='del'>-	82,32,235,33,128,2,183,237,82,209,201,245,</div><div class='del'>-	197,1,52,0,237,120,230,253,237,121,193,241,</div><div class='del'>-	201,245,197,1,52,0,237,120,246,2,237,121,</div><div class='del'>-	193,241,201,33,2,0,57,126,35,102,111,126,</div><div class='del'>-	35,110,103,201,33,0,0,34,102,152,34,96,</div><div class='del'>-	152,34,98,152,33,202,154,34,104,152,237,91,</div><div class='del'>-	104,152,42,226,149,183,237,82,17,0,255,25,</div><div class='del'>-	34,100,152,203,124,40,6,33,0,125,34,100,</div><div class='del'>-	152,42,104,152,35,35,35,229,205,120,139,193,</div><div class='del'>-	201,205,186,149,229,42,40,152,35,35,35,229,</div><div class='del'>-	205,39,144,193,124,230,3,103,221,117,254,221,</div><div class='del'>-	116,255,237,91,42,152,35,35,35,183,237,82,</div><div class='del'>-	32,12,17,5,0,42,42,152,205,171,149,242,</div><div class='del'>-	169,144,42,40,152,229,205,120,139,193,195,198,</div><div class='del'>-	149,237,91,42,152,42,98,152,25,34,98,152,</div><div class='del'>-	19,19,19,42,102,152,25,34,102,152,237,91,</div><div class='del'>-	100,152,33,158,253,25,237,91,102,152,205,171,</div><div class='del'>-	149,242,214,144,33,0,0,34,102,152,62,1,</div><div class='del'>-	50,95,152,205,225,144,195,198,149,58,95,152,</div><div class='del'>-	183,200,237,91,96,152,42,102,152,205,171,149,</div><div class='del'>-	242,5,145,237,91,102,152,33,98,2,25,237,</div><div class='del'>-	91,96,152,205,171,149,250,37,145,237,91,96,</div><div class='del'>-	152,42,102,152,183,237,82,32,7,42,98,152,</div><div class='del'>-	125,180,40,13,237,91,102,152,42,96,152,205,</div><div class='del'>-	171,149,242,58,145,237,91,104,152,42,102,152,</div><div class='del'>-	25,35,35,35,229,205,120,139,193,175,50,95,</div><div class='del'>-	152,201,195,107,139,205,206,149,250,255,243,205,</div><div class='del'>-	225,144,251,58,230,149,183,194,198,149,17,1,</div><div class='del'>-	0,42,98,152,205,171,149,250,198,149,62,1,</div><div class='del'>-	50,230,149,237,91,96,152,42,104,152,25,221,</div><div class='del'>-	117,252,221,116,253,237,91,104,152,42,96,152,</div><div class='del'>-	25,35,35,35,221,117,254,221,116,255,35,35,</div><div class='del'>-	35,229,205,39,144,124,230,3,103,35,35,35,</div><div class='del'>-	221,117,250,221,116,251,235,221,110,252,221,102,</div><div class='del'>-	253,115,35,114,35,54,4,62,1,211,100,211,</div><div class='del'>-	84,195,198,149,33,0,0,34,102,152,34,96,</div><div class='del'>-	152,34,98,152,33,202,154,34,104,152,237,91,</div><div class='del'>-	104,152,42,226,149,183,237,82,17,0,255,25,</div><div class='del'>-	34,100,152,33,109,152,54,0,33,107,152,229,</div><div class='del'>-	205,240,142,193,62,47,50,34,152,62,132,50,</div><div class='del'>-	49,152,205,241,145,205,61,145,58,39,152,60,</div><div class='del'>-	50,39,152,24,241,205,206,149,251,255,33,109,</div><div class='del'>-	152,126,183,202,198,149,110,221,117,251,33,109,</div><div class='del'>-	152,54,0,221,126,251,254,1,40,28,254,3,</div><div class='del'>-	40,101,254,4,202,190,147,254,5,202,147,147,</div><div class='del'>-	254,8,40,87,33,107,152,229,205,240,142,195,</div><div class='del'>-	198,149,58,201,154,183,32,21,33,111,152,126,</div><div class='del'>-	50,229,149,205,52,144,33,110,152,110,38,0,</div><div class='del'>-	229,205,11,142,193,237,91,96,152,42,104,152,</div><div class='del'>-	25,221,117,254,221,116,255,35,35,54,2,17,</div><div class='del'>-	2,0,43,43,115,35,114,58,44,152,35,35,</div><div class='del'>-	119,58,228,149,35,119,62,1,211,100,211,84,</div><div class='del'>-	62,1,50,201,154,24,169,205,153,142,58,231,</div><div class='del'>-	149,183,40,250,175,50,231,149,33,110,152,126,</div><div class='del'>-	254,255,40,91,58,233,149,230,63,183,40,83,</div><div class='del'>-	94,22,0,33,234,149,25,126,183,40,13,33,</div><div class='del'>-	110,152,94,33,234,150,25,126,254,3,32,36,</div><div class='del'>-	205,81,148,125,180,33,110,152,94,22,0,40,</div><div class='del'>-	17,33,234,149,25,54,0,33,107,152,229,205,</div><div class='del'>-	240,142,193,195,198,149,33,234,150,25,54,0,</div><div class='del'>-	33,110,152,94,22,0,33,234,149,25,126,50,</div><div class='del'>-	49,152,254,132,32,37,62,47,50,34,152,42,</div><div class='del'>-	107,152,229,33,110,152,229,205,174,140,193,193,</div><div class='del'>-	125,180,33,110,152,94,22,0,33,234,150,202,</div><div class='del'>-	117,147,25,52,195,120,147,58,49,152,254,140,</div><div class='del'>-	32,7,62,1,50,34,152,24,210,62,32,50,</div><div class='del'>-	106,152,24,19,58,49,152,95,58,106,152,163,</div><div class='del'>-	183,58,106,152,32,11,203,63,50,106,152,58,</div><div class='del'>-	106,152,183,32,231,254,2,40,51,254,4,40,</div><div class='del'>-	38,254,8,40,26,254,16,40,13,254,32,32,</div><div class='del'>-	158,62,165,50,49,152,62,69,24,190,62,164,</div><div class='del'>-	50,49,152,62,70,24,181,62,163,50,49,152,</div><div class='del'>-	175,24,173,62,162,50,49,152,62,1,24,164,</div><div class='del'>-	62,161,50,49,152,62,3,24,155,25,54,0,</div><div class='del'>-	221,126,251,254,8,40,7,58,230,149,183,202,</div><div class='del'>-	32,146,33,107,152,229,205,240,142,193,211,84,</div><div class='del'>-	195,198,149,237,91,96,152,42,104,152,25,221,</div><div class='del'>-	117,254,221,116,255,35,35,54,6,17,2,0,</div><div class='del'>-	43,43,115,35,114,58,228,149,35,35,119,58,</div><div class='del'>-	233,149,35,119,205,146,142,195,32,146,237,91,</div><div class='del'>-	96,152,42,104,152,25,229,205,160,142,193,58,</div><div class='del'>-	231,149,183,40,250,175,50,231,149,243,237,91,</div><div class='del'>-	96,152,42,104,152,25,221,117,254,221,116,255,</div><div class='del'>-	78,35,70,221,113,252,221,112,253,89,80,42,</div><div class='del'>-	98,152,183,237,82,34,98,152,203,124,40,19,</div><div class='del'>-	33,0,0,34,98,152,34,102,152,34,96,152,</div><div class='del'>-	62,1,50,95,152,24,40,221,94,252,221,86,</div><div class='del'>-	253,19,19,19,42,96,152,25,34,96,152,237,</div><div class='del'>-	91,100,152,33,158,253,25,237,91,96,152,205,</div><div class='del'>-	171,149,242,55,148,33,0,0,34,96,152,175,</div><div class='del'>-	50,230,149,251,195,32,146,245,62,1,50,231,</div><div class='del'>-	149,62,16,237,57,0,211,80,241,251,237,77,</div><div class='del'>-	201,205,186,149,229,229,33,0,0,34,37,152,</div><div class='del'>-	33,110,152,126,50,234,151,58,44,152,33,235,</div><div class='del'>-	151,119,221,54,253,0,221,54,254,0,195,230,</div><div class='del'>-	148,33,236,151,54,175,33,3,0,229,33,234,</div><div class='del'>-	151,229,205,174,140,193,193,33,236,151,126,254,</div><div class='del'>-	255,40,74,33,245,151,110,221,117,255,33,249,</div><div class='del'>-	151,126,221,166,255,221,119,255,33,253,151,126,</div><div class='del'>-	221,166,255,221,119,255,58,232,149,95,221,126,</div><div class='del'>-	255,163,221,119,255,183,40,15,230,191,33,110,</div><div class='del'>-	152,94,22,0,33,234,149,25,119,24,12,33,</div><div class='del'>-	110,152,94,22,0,33,234,149,25,54,132,33,</div><div class='del'>-	0,0,195,198,149,221,110,253,221,102,254,35,</div><div class='del'>-	221,117,253,221,116,254,17,32,0,221,110,253,</div><div class='del'>-	221,102,254,205,171,149,250,117,148,58,233,149,</div><div class='del'>-	203,87,40,84,33,1,0,34,37,152,221,54,</div><div class='del'>-	253,0,221,54,254,0,24,53,33,236,151,54,</div><div class='del'>-	175,33,3,0,229,33,234,151,229,205,174,140,</div><div class='del'>-	193,193,33,236,151,126,254,255,40,14,33,110,</div><div class='del'>-	152,94,22,0,33,234,149,25,54,140,24,159,</div><div class='del'>-	221,110,253,221,102,254,35,221,117,253,221,116,</div><div class='del'>-	254,17,32,0,221,110,253,221,102,254,205,171,</div><div class='del'>-	149,250,12,149,33,2,0,34,37,152,221,54,</div><div class='del'>-	253,0,221,54,254,0,24,54,33,236,151,54,</div><div class='del'>-	175,33,3,0,229,33,234,151,229,205,174,140,</div><div class='del'>-	193,193,33,236,151,126,254,255,40,15,33,110,</div><div class='del'>-	152,94,22,0,33,234,149,25,54,132,195,211,</div><div class='del'>-	148,221,110,253,221,102,254,35,221,117,253,221,</div><div class='del'>-	116,254,17,32,0,221,110,253,221,102,254,205,</div><div class='del'>-	171,149,250,96,149,33,1,0,195,198,149,124,</div><div class='del'>-	170,250,179,149,237,82,201,124,230,128,237,82,</div><div class='del'>-	60,201,225,253,229,221,229,221,33,0,0,221,</div><div class='del'>-	57,233,221,249,221,225,253,225,201,233,225,253,</div><div class='del'>-	229,221,229,221,33,0,0,221,57,94,35,86,</div><div class='del'>-	35,235,57,249,235,233,0,0,0,0,0,0,</div><div class='del'>-	62,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	175,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,133,1,0,0,0,63,</div><div class='del'>-	255,255,255,255,0,0,0,63,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,24,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0</div><div class='del'>-	} ;</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/drivers/net/appletalk/cops_ltdrv.h b/drivers/net/appletalk/cops_ltdrv.h<br/>deleted file mode 100644<br/>index c699b1ad31da..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/appletalk/cops_ltdrv.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/appletalk/cops_ltdrv.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,241 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *	The firmware this driver downloads into the Localtalk card is a</div><div class='del'>- *	separate program and is not GPL'd source code, even though the Linux</div><div class='del'>- *	side driver and the routine that loads this data into the card are.</div><div class='del'>- *	</div><div class='del'>- *	It is taken from the COPS SDK and is under the following license</div><div class='del'>- *</div><div class='del'>- *	This material is licensed to you strictly for use in conjunction with</div><div class='del'>- *	the use of COPS LocalTalk adapters.</div><div class='del'>- *	There is no charge for this SDK. And no waranty express or implied</div><div class='del'>- *	about its fitness for any purpose. However, we will cheerefully</div><div class='del'>- *	refund every penny you paid for this SDK...</div><div class='del'>- *	Regards,</div><div class='del'>- *</div><div class='del'>- *	Thomas F. Divine</div><div class='del'>- *	Chief Scientist</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*      cops_ltdrv.h: LocalTalk driver firmware dump for Linux.</div><div class='del'>- *</div><div class='del'>- *      Authors:</div><div class='del'>- *      - Jay Schulist &lt;jschlst@samba.org&gt;</div><div class='del'>- */</div><div class='del'>- </div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_COPS_TANGENT</div><div class='del'>-</div><div class='del'>-static const unsigned char ltdrv_code[] = {</div><div class='del'>-	58,3,0,50,148,10,33,143,15,62,85,119,</div><div class='del'>-	190,32,9,62,170,119,190,32,3,35,24,241,</div><div class='del'>-	34,146,10,249,17,150,10,33,143,15,183,237,</div><div class='del'>-	82,77,68,11,107,98,19,54,0,237,176,62,</div><div class='del'>-	16,237,57,51,62,0,237,57,50,237,57,54,</div><div class='del'>-	62,12,237,57,49,62,195,33,39,2,50,56,</div><div class='del'>-	0,34,57,0,237,86,205,30,2,251,205,60,</div><div class='del'>-	10,24,169,67,111,112,121,114,105,103,104,116,</div><div class='del'>-	32,40,99,41,32,49,57,56,56,45,49,57,</div><div class='del'>-	57,50,44,32,80,114,105,110,116,105,110,103,</div><div class='del'>-	32,67,111,109,109,117,110,105,99,97,116,105,</div><div class='del'>-	111,110,115,32,65,115,115,111,99,105,97,116,</div><div class='del'>-	101,115,44,32,73,110,99,46,65,108,108,32,</div><div class='del'>-	114,105,103,104,116,115,32,114,101,115,101,114,</div><div class='del'>-	118,101,100,46,32,32,4,4,22,40,255,60,</div><div class='del'>-	4,96,10,224,6,0,7,126,2,64,11,246,</div><div class='del'>-	12,6,13,0,14,193,15,0,5,96,3,192,</div><div class='del'>-	1,0,9,8,62,3,211,82,62,192,211,82,</div><div class='del'>-	201,62,3,211,82,62,213,211,82,201,62,5,</div><div class='del'>-	211,82,62,224,211,82,201,62,5,211,82,62,</div><div class='del'>-	224,211,82,201,62,5,211,82,62,96,211,82,</div><div class='del'>-	201,6,28,33,180,1,14,82,237,163,194,4,</div><div class='del'>-	2,33,39,2,34,64,0,58,3,0,230,1,</div><div class='del'>-	192,62,11,237,121,62,118,237,121,201,33,182,</div><div class='del'>-	10,54,132,205,253,1,201,245,197,213,229,42,</div><div class='del'>-	150,10,14,83,17,98,2,67,20,237,162,58,</div><div class='del'>-	179,1,95,219,82,230,1,32,6,29,32,247,</div><div class='del'>-	195,17,3,62,1,211,82,219,82,95,230,160,</div><div class='del'>-	32,10,237,162,32,225,21,32,222,195,15,3,</div><div class='del'>-	237,162,123,230,96,194,21,3,62,48,211,82,</div><div class='del'>-	62,1,211,82,175,211,82,237,91,150,10,43,</div><div class='del'>-	55,237,82,218,19,3,34,152,10,98,107,58,</div><div class='del'>-	154,10,190,32,81,62,1,50,158,10,35,35,</div><div class='del'>-	62,132,190,32,44,54,133,43,70,58,154,10,</div><div class='del'>-	119,43,112,17,3,0,205,137,3,62,16,211,</div><div class='del'>-	82,62,56,211,82,205,217,1,42,150,10,14,</div><div class='del'>-	83,17,98,2,67,20,58,178,1,95,195,59,</div><div class='del'>-	2,62,129,190,194,227,2,54,130,43,70,58,</div><div class='del'>-	154,10,119,43,112,17,3,0,205,137,3,195,</div><div class='del'>-	254,2,35,35,126,254,132,194,227,2,205,61,</div><div class='del'>-	3,24,20,62,128,166,194,222,2,221,229,221,</div><div class='del'>-	33,175,10,205,93,6,205,144,7,221,225,225,</div><div class='del'>-	209,193,241,251,237,77,221,229,221,33,159,10,</div><div class='del'>-	205,93,6,221,225,205,61,3,195,247,2,24,</div><div class='del'>-	237,24,235,24,233,230,64,40,2,24,227,24,</div><div class='del'>-	225,175,50,179,10,205,208,1,201,197,33,4,</div><div class='del'>-	0,57,126,35,102,111,205,51,3,193,201,62,</div><div class='del'>-	1,50,179,10,34,150,10,54,0,58,179,10,</div><div class='del'>-	183,200,62,14,211,82,62,193,211,82,62,10,</div><div class='del'>-	211,82,62,224,211,82,62,6,211,82,58,154,</div><div class='del'>-	10,211,82,62,16,211,82,62,56,211,82,62,</div><div class='del'>-	48,211,82,219,82,230,1,40,4,219,83,24,</div><div class='del'>-	242,62,14,211,82,62,33,211,82,62,1,211,</div><div class='del'>-	82,62,9,211,82,62,32,211,82,205,217,1,</div><div class='del'>-	201,14,83,205,208,1,24,23,14,83,205,208,</div><div class='del'>-	1,205,226,1,58,174,1,61,32,253,205,244,</div><div class='del'>-	1,58,174,1,61,32,253,205,226,1,58,175,</div><div class='del'>-	1,61,32,253,62,5,211,82,62,233,211,82,</div><div class='del'>-	62,128,211,82,58,176,1,61,32,253,237,163,</div><div class='del'>-	27,62,192,211,82,219,82,230,4,40,250,237,</div><div class='del'>-	163,27,122,179,32,243,219,82,230,4,40,250,</div><div class='del'>-	58,178,1,71,219,82,230,4,40,3,5,32,</div><div class='del'>-	247,219,82,230,4,40,250,205,235,1,58,177,</div><div class='del'>-	1,61,32,253,205,244,1,201,229,213,35,35,</div><div class='del'>-	126,230,128,194,145,4,43,58,154,10,119,43,</div><div class='del'>-	70,33,181,10,119,43,112,17,3,0,243,62,</div><div class='del'>-	10,211,82,219,82,230,128,202,41,4,209,225,</div><div class='del'>-	62,1,55,251,201,205,144,3,58,180,10,254,</div><div class='del'>-	255,202,127,4,205,217,1,58,178,1,71,219,</div><div class='del'>-	82,230,1,32,6,5,32,247,195,173,4,219,</div><div class='del'>-	83,71,58,154,10,184,194,173,4,58,178,1,</div><div class='del'>-	71,219,82,230,1,32,6,5,32,247,195,173,</div><div class='del'>-	4,219,83,58,178,1,71,219,82,230,1,32,</div><div class='del'>-	6,5,32,247,195,173,4,219,83,254,133,194,</div><div class='del'>-	173,4,58,179,1,24,4,58,179,1,135,61,</div><div class='del'>-	32,253,209,225,205,137,3,205,61,3,183,251,</div><div class='del'>-	201,209,225,243,62,10,211,82,219,82,230,128,</div><div class='del'>-	202,164,4,62,1,55,251,201,205,144,3,205,</div><div class='del'>-	61,3,183,251,201,209,225,62,2,55,251,201,</div><div class='del'>-	243,62,14,211,82,62,33,211,82,251,201,33,</div><div class='del'>-	4,0,57,94,35,86,33,2,0,57,126,35,</div><div class='del'>-	102,111,221,229,34,193,10,237,83,195,10,221,</div><div class='del'>-	33,171,10,205,93,6,58,185,10,50,186,10,</div><div class='del'>-	58,184,10,135,50,184,10,205,112,6,254,3,</div><div class='del'>-	56,16,58,185,10,135,60,230,15,50,185,10,</div><div class='del'>-	175,50,184,10,24,23,58,183,10,205,112,6,</div><div class='del'>-	254,3,48,13,58,185,10,203,63,50,185,10,</div><div class='del'>-	62,255,50,183,10,58,185,10,50,186,10,58,</div><div class='del'>-	183,10,135,50,183,10,62,32,50,187,10,50,</div><div class='del'>-	188,10,6,255,219,82,230,16,32,3,5,32,</div><div class='del'>-	247,205,180,4,6,40,219,82,230,16,40,3,</div><div class='del'>-	5,32,247,62,10,211,82,219,82,230,128,194,</div><div class='del'>-	46,5,219,82,230,16,40,214,237,95,71,58,</div><div class='del'>-	186,10,160,230,15,40,32,71,14,10,62,10,</div><div class='del'>-	211,82,219,82,230,128,202,119,5,205,180,4,</div><div class='del'>-	195,156,5,219,82,230,16,202,156,5,13,32,</div><div class='del'>-	229,16,225,42,193,10,237,91,195,10,205,252,</div><div class='del'>-	3,48,7,61,202,156,5,195,197,5,221,225,</div><div class='del'>-	33,0,0,201,221,33,163,10,205,93,6,58,</div><div class='del'>-	188,10,61,50,188,10,40,19,58,186,10,246,</div><div class='del'>-	1,50,186,10,58,183,10,246,1,50,183,10,</div><div class='del'>-	195,46,5,221,225,33,1,0,201,221,33,167,</div><div class='del'>-	10,205,93,6,58,184,10,246,1,50,184,10,</div><div class='del'>-	58,186,10,135,246,1,50,186,10,58,187,10,</div><div class='del'>-	61,50,187,10,194,46,5,221,225,33,2,0,</div><div class='del'>-	201,221,229,33,0,0,57,17,4,0,25,126,</div><div class='del'>-	50,154,10,230,128,50,189,10,58,189,10,183,</div><div class='del'>-	40,6,221,33,88,2,24,4,221,33,150,0,</div><div class='del'>-	58,154,10,183,40,49,60,40,46,61,33,190,</div><div class='del'>-	10,119,35,119,35,54,129,175,50,158,10,221,</div><div class='del'>-	43,221,229,225,124,181,40,42,33,190,10,17,</div><div class='del'>-	3,0,205,206,4,17,232,3,27,123,178,32,</div><div class='del'>-	251,58,158,10,183,40,224,58,154,10,71,62,</div><div class='del'>-	7,128,230,127,71,58,189,10,176,50,154,10,</div><div class='del'>-	24,166,221,225,201,183,221,52,0,192,221,52,</div><div class='del'>-	1,192,221,52,2,192,221,52,3,192,55,201,</div><div class='del'>-	6,8,14,0,31,48,1,12,16,250,121,201,</div><div class='del'>-	33,2,0,57,94,35,86,35,78,35,70,35,</div><div class='del'>-	126,35,102,105,79,120,68,103,237,176,201,33,</div><div class='del'>-	2,0,57,126,35,102,111,62,17,237,57,48,</div><div class='del'>-	125,237,57,40,124,237,57,41,62,0,237,57,</div><div class='del'>-	42,62,64,237,57,43,62,0,237,57,44,33,</div><div class='del'>-	128,2,125,237,57,46,124,237,57,47,62,145,</div><div class='del'>-	237,57,48,211,68,58,149,10,211,66,201,33,</div><div class='del'>-	2,0,57,126,35,102,111,62,33,237,57,48,</div><div class='del'>-	62,64,237,57,32,62,0,237,57,33,237,57,</div><div class='del'>-	34,125,237,57,35,124,237,57,36,62,0,237,</div><div class='del'>-	57,37,33,128,2,125,237,57,38,124,237,57,</div><div class='del'>-	39,62,97,237,57,48,211,67,58,149,10,211,</div><div class='del'>-	66,201,237,56,46,95,237,56,47,87,237,56,</div><div class='del'>-	46,111,237,56,47,103,183,237,82,32,235,33,</div><div class='del'>-	128,2,183,237,82,201,237,56,38,95,237,56,</div><div class='del'>-	39,87,237,56,38,111,237,56,39,103,183,237,</div><div class='del'>-	82,32,235,33,128,2,183,237,82,201,205,106,</div><div class='del'>-	10,221,110,6,221,102,7,126,35,110,103,195,</div><div class='del'>-	118,10,205,106,10,33,0,0,34,205,10,34,</div><div class='del'>-	198,10,34,200,10,33,143,15,34,207,10,237,</div><div class='del'>-	91,207,10,42,146,10,183,237,82,17,0,255,</div><div class='del'>-	25,34,203,10,203,124,40,6,33,0,125,34,</div><div class='del'>-	203,10,42,207,10,229,205,37,3,195,118,10,</div><div class='del'>-	205,106,10,229,42,150,10,35,35,35,229,205,</div><div class='del'>-	70,7,193,124,230,3,103,221,117,254,221,116,</div><div class='del'>-	255,237,91,152,10,35,35,35,183,237,82,32,</div><div class='del'>-	12,17,5,0,42,152,10,205,91,10,242,203,</div><div class='del'>-	7,42,150,10,229,205,37,3,195,118,10,237,</div><div class='del'>-	91,152,10,42,200,10,25,34,200,10,42,205,</div><div class='del'>-	10,25,34,205,10,237,91,203,10,33,158,253,</div><div class='del'>-	25,237,91,205,10,205,91,10,242,245,7,33,</div><div class='del'>-	0,0,34,205,10,62,1,50,197,10,205,5,</div><div class='del'>-	8,33,0,0,57,249,195,118,10,205,106,10,</div><div class='del'>-	58,197,10,183,202,118,10,237,91,198,10,42,</div><div class='del'>-	205,10,205,91,10,242,46,8,237,91,205,10,</div><div class='del'>-	33,98,2,25,237,91,198,10,205,91,10,250,</div><div class='del'>-	78,8,237,91,198,10,42,205,10,183,237,82,</div><div class='del'>-	32,7,42,200,10,125,180,40,13,237,91,205,</div><div class='del'>-	10,42,198,10,205,91,10,242,97,8,237,91,</div><div class='del'>-	207,10,42,205,10,25,229,205,37,3,175,50,</div><div class='del'>-	197,10,195,118,10,205,29,3,33,0,0,57,</div><div class='del'>-	249,195,118,10,205,106,10,58,202,10,183,40,</div><div class='del'>-	22,205,14,7,237,91,209,10,19,19,19,205,</div><div class='del'>-	91,10,242,139,8,33,1,0,195,118,10,33,</div><div class='del'>-	0,0,195,118,10,205,126,10,252,255,205,108,</div><div class='del'>-	8,125,180,194,118,10,237,91,200,10,33,0,</div><div class='del'>-	0,205,91,10,242,118,10,237,91,207,10,42,</div><div class='del'>-	198,10,25,221,117,254,221,116,255,35,35,35,</div><div class='del'>-	229,205,70,7,193,124,230,3,103,35,35,35,</div><div class='del'>-	221,117,252,221,116,253,229,221,110,254,221,102,</div><div class='del'>-	255,229,33,212,10,229,205,124,6,193,193,221,</div><div class='del'>-	110,252,221,102,253,34,209,10,33,211,10,54,</div><div class='del'>-	4,33,209,10,227,205,147,6,193,62,1,50,</div><div class='del'>-	202,10,243,221,94,252,221,86,253,42,200,10,</div><div class='del'>-	183,237,82,34,200,10,203,124,40,17,33,0,</div><div class='del'>-	0,34,200,10,34,205,10,34,198,10,50,197,</div><div class='del'>-	10,24,37,221,94,252,221,86,253,42,198,10,</div><div class='del'>-	25,34,198,10,237,91,203,10,33,158,253,25,</div><div class='del'>-	237,91,198,10,205,91,10,242,68,9,33,0,</div><div class='del'>-	0,34,198,10,205,5,8,33,0,0,57,249,</div><div class='del'>-	251,195,118,10,205,106,10,33,49,13,126,183,</div><div class='del'>-	40,16,205,42,7,237,91,47,13,19,19,19,</div><div class='del'>-	205,91,10,242,117,9,58,142,15,198,1,50,</div><div class='del'>-	142,15,195,118,10,33,49,13,126,254,1,40,</div><div class='del'>-	25,254,3,202,7,10,254,5,202,21,10,33,</div><div class='del'>-	49,13,54,0,33,47,13,229,205,207,6,195,</div><div class='del'>-	118,10,58,141,15,183,32,72,33,51,13,126,</div><div class='del'>-	50,149,10,205,86,7,33,50,13,126,230,127,</div><div class='del'>-	183,32,40,58,142,15,230,127,50,142,15,183,</div><div class='del'>-	32,5,198,1,50,142,15,33,50,13,126,111,</div><div class='del'>-	23,159,103,203,125,58,142,15,40,5,198,128,</div><div class='del'>-	50,142,15,33,50,13,119,33,50,13,126,111,</div><div class='del'>-	23,159,103,229,205,237,5,193,33,211,10,54,</div><div class='del'>-	2,33,2,0,34,209,10,58,154,10,33,212,</div><div class='del'>-	10,119,58,148,10,33,213,10,119,33,209,10,</div><div class='del'>-	229,205,147,6,193,24,128,42,47,13,229,33,</div><div class='del'>-	50,13,229,205,191,4,193,24,239,33,211,10,</div><div class='del'>-	54,6,33,3,0,34,209,10,58,154,10,33,</div><div class='del'>-	212,10,119,58,148,10,33,213,10,119,33,214,</div><div class='del'>-	10,54,5,33,209,10,229,205,147,6,24,200,</div><div class='del'>-	205,106,10,33,49,13,54,0,33,47,13,229,</div><div class='del'>-	205,207,6,33,209,10,227,205,147,6,193,205,</div><div class='del'>-	80,9,205,145,8,24,248,124,170,250,99,10,</div><div class='del'>-	237,82,201,124,230,128,237,82,60,201,225,253,</div><div class='del'>-	229,221,229,221,33,0,0,221,57,233,221,249,</div><div class='del'>-	221,225,253,225,201,233,225,253,229,221,229,221,</div><div class='del'>-	33,0,0,221,57,94,35,86,35,235,57,249,</div><div class='del'>-	235,233,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0,0,0,0,0,0,0,0,</div><div class='del'>-	0,0,0,0,0</div><div class='del'>-	} ;</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/drivers/net/appletalk/ipddp.c b/drivers/net/appletalk/ipddp.c<br/>deleted file mode 100644<br/>index e90c6a7333d7..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/appletalk/ipddp.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/appletalk/ipddp.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,335 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *	ipddp.c: IP to Appletalk-IP Encapsulation driver for Linux</div><div class='del'>- *		 Appletalk-IP to IP Decapsulation driver for Linux</div><div class='del'>- *</div><div class='del'>- *	Authors:</div><div class='del'>- *      - DDP-IP Encap by: Bradford W. Johnson &lt;johns393@maroon.tc.umn.edu&gt;</div><div class='del'>- *	- DDP-IP Decap by: Jay Schulist &lt;jschlst@samba.org&gt;</div><div class='del'>- *</div><div class='del'>- *	Derived from:</div><div class='del'>- *	- Almost all code already existed in net/appletalk/ddp.c I just</div><div class='del'>- *	  moved/reorginized it into a driver file. Original IP-over-DDP code</div><div class='del'>- *	  was done by Bradford W. Johnson &lt;johns393@maroon.tc.umn.edu&gt;</div><div class='del'>- *      - skeleton.c: A network driver outline for linux.</div><div class='del'>- *        Written 1993-94 by Donald Becker.</div><div class='del'>- *	- dummy.c: A dummy net driver. By Nick Holloway.</div><div class='del'>- *	- MacGate: A user space Daemon for Appletalk-IP Decap for</div><div class='del'>- *	  Linux by Jay Schulist &lt;jschlst@samba.org&gt;</div><div class='del'>- *</div><div class='del'>- *      Copyright 1993 United States Government as represented by the</div><div class='del'>- *      Director, National Security Agency.</div><div class='del'>- *</div><div class='del'>- *      This software may be used and distributed according to the terms</div><div class='del'>- *      of the GNU General Public License, incorporated herein by reference.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/etherdevice.h&gt;</div><div class='del'>-#include &lt;linux/ip.h&gt;</div><div class='del'>-#include &lt;linux/atalk.h&gt;</div><div class='del'>-#include &lt;linux/if_arp.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;net/route.h&gt;</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='del'>-</div><div class='del'>-#include "ipddp.h"		/* Our stuff */</div><div class='del'>-</div><div class='del'>-static const char version[] = KERN_INFO "ipddp.c:v0.01 8/28/97 Bradford W. Johnson &lt;johns393@maroon.tc.umn.edu&gt;\n";</div><div class='del'>-</div><div class='del'>-static struct ipddp_route *ipddp_route_list;</div><div class='del'>-static DEFINE_SPINLOCK(ipddp_route_lock);</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_IPDDP_ENCAP</div><div class='del'>-static int ipddp_mode = IPDDP_ENCAP;</div><div class='del'>-#else</div><div class='del'>-static int ipddp_mode = IPDDP_DECAP;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/* Index to functions, as function prototypes. */</div><div class='del'>-static netdev_tx_t ipddp_xmit(struct sk_buff *skb,</div><div class='del'>-				    struct net_device *dev);</div><div class='del'>-static int ipddp_create(struct ipddp_route *new_rt);</div><div class='del'>-static int ipddp_delete(struct ipddp_route *rt);</div><div class='del'>-static struct ipddp_route* __ipddp_find_route(struct ipddp_route *rt);</div><div class='del'>-static int ipddp_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);</div><div class='del'>-</div><div class='del'>-static const struct net_device_ops ipddp_netdev_ops = {</div><div class='del'>-	.ndo_start_xmit		= ipddp_xmit,</div><div class='del'>-	.ndo_do_ioctl   	= ipddp_ioctl,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='del'>-	.ndo_set_mac_address 	= eth_mac_addr,</div><div class='del'>-	.ndo_validate_addr	= eth_validate_addr,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct net_device * __init ipddp_init(void)</div><div class='del'>-{</div><div class='del'>-	static unsigned version_printed;</div><div class='del'>-	struct net_device *dev;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	dev = alloc_etherdev(0);</div><div class='del'>-	if (!dev)</div><div class='del'>-		return ERR_PTR(-ENOMEM);</div><div class='del'>-</div><div class='del'>-	netif_keep_dst(dev);</div><div class='del'>-	strcpy(dev-&gt;name, "ipddp%d");</div><div class='del'>-</div><div class='del'>-	if (version_printed++ == 0)</div><div class='del'>-                printk(version);</div><div class='del'>-</div><div class='del'>-	/* Initialize the device structure. */</div><div class='del'>-	dev-&gt;netdev_ops = &amp;ipddp_netdev_ops;</div><div class='del'>-</div><div class='del'>-        dev-&gt;type = ARPHRD_IPDDP;       	/* IP over DDP tunnel */</div><div class='del'>-        dev-&gt;mtu = 585;</div><div class='del'>-        dev-&gt;flags |= IFF_NOARP;</div><div class='del'>-</div><div class='del'>-        /*</div><div class='del'>-         *      The worst case header we will need is currently a</div><div class='del'>-         *      ethernet header (14 bytes) and a ddp header (sizeof ddpehdr+1)</div><div class='del'>-         *      We send over SNAP so that takes another 8 bytes.</div><div class='del'>-         */</div><div class='del'>-        dev-&gt;hard_header_len = 14+8+sizeof(struct ddpehdr)+1;</div><div class='del'>-</div><div class='del'>-	err = register_netdev(dev);</div><div class='del'>-	if (err) {</div><div class='del'>-		free_netdev(dev);</div><div class='del'>-		return ERR_PTR(err);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Let the user now what mode we are in */</div><div class='del'>-	if(ipddp_mode == IPDDP_ENCAP)</div><div class='del'>-		printk("%s: Appletalk-IP Encap. mode by Bradford W. Johnson &lt;johns393@maroon.tc.umn.edu&gt;\n", </div><div class='del'>-			dev-&gt;name);</div><div class='del'>-	if(ipddp_mode == IPDDP_DECAP)</div><div class='del'>-		printk("%s: Appletalk-IP Decap. mode by Jay Schulist &lt;jschlst@samba.org&gt;\n", </div><div class='del'>-			dev-&gt;name);</div><div class='del'>-</div><div class='del'>-        return dev;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Transmit LLAP/ELAP frame using aarp_send_ddp.</div><div class='del'>- */</div><div class='del'>-static netdev_tx_t ipddp_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	__be32 paddr = skb_rtable(skb)-&gt;rt_gateway;</div><div class='del'>-        struct ddpehdr *ddp;</div><div class='del'>-        struct ipddp_route *rt;</div><div class='del'>-        struct atalk_addr *our_addr;</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;ipddp_route_lock);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-         * Find appropriate route to use, based only on IP number.</div><div class='del'>-         */</div><div class='del'>-        for(rt = ipddp_route_list; rt != NULL; rt = rt-&gt;next)</div><div class='del'>-        {</div><div class='del'>-                if(rt-&gt;ip == paddr)</div><div class='del'>-                        break;</div><div class='del'>-        }</div><div class='del'>-        if(rt == NULL) {</div><div class='del'>-		spin_unlock(&amp;ipddp_route_lock);</div><div class='del'>-                return NETDEV_TX_OK;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-        our_addr = atalk_find_dev_addr(rt-&gt;dev);</div><div class='del'>-</div><div class='del'>-	if(ipddp_mode == IPDDP_DECAP)</div><div class='del'>-		/* </div><div class='del'>-		 * Pull off the excess room that should not be there.</div><div class='del'>-		 * This is due to a hard-header problem. This is the</div><div class='del'>-		 * quick fix for now though, till it breaks.</div><div class='del'>-		 */</div><div class='del'>-		skb_pull(skb, 35-(sizeof(struct ddpehdr)+1));</div><div class='del'>-</div><div class='del'>-	/* Create the Extended DDP header */</div><div class='del'>-	ddp = (struct ddpehdr *)skb-&gt;data;</div><div class='del'>-        ddp-&gt;deh_len_hops = htons(skb-&gt;len + (1&lt;&lt;10));</div><div class='del'>-        ddp-&gt;deh_sum = 0;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-         * For Localtalk we need aarp_send_ddp to strip the</div><div class='del'>-         * long DDP header and place a shot DDP header on it.</div><div class='del'>-         */</div><div class='del'>-        if(rt-&gt;dev-&gt;type == ARPHRD_LOCALTLK)</div><div class='del'>-        {</div><div class='del'>-                ddp-&gt;deh_dnet  = 0;   /* FIXME more hops?? */</div><div class='del'>-                ddp-&gt;deh_snet  = 0;</div><div class='del'>-        }</div><div class='del'>-        else</div><div class='del'>-        {</div><div class='del'>-                ddp-&gt;deh_dnet  = rt-&gt;at.s_net;   /* FIXME more hops?? */</div><div class='del'>-                ddp-&gt;deh_snet  = our_addr-&gt;s_net;</div><div class='del'>-        }</div><div class='del'>-        ddp-&gt;deh_dnode = rt-&gt;at.s_node;</div><div class='del'>-        ddp-&gt;deh_snode = our_addr-&gt;s_node;</div><div class='del'>-        ddp-&gt;deh_dport = 72;</div><div class='del'>-        ddp-&gt;deh_sport = 72;</div><div class='del'>-</div><div class='del'>-        *((__u8 *)(ddp+1)) = 22;        	/* ddp type = IP */</div><div class='del'>-</div><div class='del'>-        skb-&gt;protocol = htons(ETH_P_ATALK);     /* Protocol has changed */</div><div class='del'>-</div><div class='del'>-	dev-&gt;stats.tx_packets++;</div><div class='del'>-	dev-&gt;stats.tx_bytes += skb-&gt;len;</div><div class='del'>-</div><div class='del'>-	aarp_send_ddp(rt-&gt;dev, skb, &amp;rt-&gt;at, NULL);</div><div class='del'>-</div><div class='del'>-	spin_unlock(&amp;ipddp_route_lock);</div><div class='del'>-</div><div class='del'>-        return NETDEV_TX_OK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Create a routing entry. We first verify that the</div><div class='del'>- * record does not already exist. If it does we return -EEXIST</div><div class='del'>- */</div><div class='del'>-static int ipddp_create(struct ipddp_route *new_rt)</div><div class='del'>-{</div><div class='del'>-        struct ipddp_route *rt = kmalloc(sizeof(*rt), GFP_KERNEL);</div><div class='del'>-</div><div class='del'>-        if (rt == NULL)</div><div class='del'>-                return -ENOMEM;</div><div class='del'>-</div><div class='del'>-        rt-&gt;ip = new_rt-&gt;ip;</div><div class='del'>-        rt-&gt;at = new_rt-&gt;at;</div><div class='del'>-        rt-&gt;next = NULL;</div><div class='del'>-        if ((rt-&gt;dev = atrtr_get_dev(&amp;rt-&gt;at)) == NULL) {</div><div class='del'>-		kfree(rt);</div><div class='del'>-                return -ENETUNREACH;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-	spin_lock_bh(&amp;ipddp_route_lock);</div><div class='del'>-	if (__ipddp_find_route(rt)) {</div><div class='del'>-		spin_unlock_bh(&amp;ipddp_route_lock);</div><div class='del'>-		kfree(rt);</div><div class='del'>-		return -EEXIST;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-        rt-&gt;next = ipddp_route_list;</div><div class='del'>-        ipddp_route_list = rt;</div><div class='del'>-</div><div class='del'>-	spin_unlock_bh(&amp;ipddp_route_lock);</div><div class='del'>-</div><div class='del'>-        return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Delete a route, we only delete a FULL match.</div><div class='del'>- * If route does not exist we return -ENOENT.</div><div class='del'>- */</div><div class='del'>-static int ipddp_delete(struct ipddp_route *rt)</div><div class='del'>-{</div><div class='del'>-        struct ipddp_route **r = &amp;ipddp_route_list;</div><div class='del'>-        struct ipddp_route *tmp;</div><div class='del'>-</div><div class='del'>-	spin_lock_bh(&amp;ipddp_route_lock);</div><div class='del'>-        while((tmp = *r) != NULL)</div><div class='del'>-        {</div><div class='del'>-                if(tmp-&gt;ip == rt-&gt;ip &amp;&amp;</div><div class='del'>-		   tmp-&gt;at.s_net == rt-&gt;at.s_net &amp;&amp;</div><div class='del'>-		   tmp-&gt;at.s_node == rt-&gt;at.s_node)</div><div class='del'>-                {</div><div class='del'>-                        *r = tmp-&gt;next;</div><div class='del'>-			spin_unlock_bh(&amp;ipddp_route_lock);</div><div class='del'>-                        kfree(tmp);</div><div class='del'>-                        return 0;</div><div class='del'>-                }</div><div class='del'>-                r = &amp;tmp-&gt;next;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-	spin_unlock_bh(&amp;ipddp_route_lock);</div><div class='del'>-        return -ENOENT;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Find a routing entry, we only return a FULL match</div><div class='del'>- */</div><div class='del'>-static struct ipddp_route* __ipddp_find_route(struct ipddp_route *rt)</div><div class='del'>-{</div><div class='del'>-        struct ipddp_route *f;</div><div class='del'>-</div><div class='del'>-        for(f = ipddp_route_list; f != NULL; f = f-&gt;next)</div><div class='del'>-        {</div><div class='del'>-                if(f-&gt;ip == rt-&gt;ip &amp;&amp;</div><div class='del'>-		   f-&gt;at.s_net == rt-&gt;at.s_net &amp;&amp;</div><div class='del'>-		   f-&gt;at.s_node == rt-&gt;at.s_node)</div><div class='del'>-                        return f;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-        return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ipddp_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)</div><div class='del'>-{</div><div class='del'>-        struct ipddp_route __user *rt = ifr-&gt;ifr_data;</div><div class='del'>-        struct ipddp_route rcp, rcp2, *rp;</div><div class='del'>-</div><div class='del'>-        if(!capable(CAP_NET_ADMIN))</div><div class='del'>-                return -EPERM;</div><div class='del'>-</div><div class='del'>-	if(copy_from_user(&amp;rcp, rt, sizeof(rcp)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-        switch(cmd)</div><div class='del'>-        {</div><div class='del'>-		case SIOCADDIPDDPRT:</div><div class='del'>-                        return ipddp_create(&amp;rcp);</div><div class='del'>-</div><div class='del'>-                case SIOCFINDIPDDPRT:</div><div class='del'>-			spin_lock_bh(&amp;ipddp_route_lock);</div><div class='del'>-			rp = __ipddp_find_route(&amp;rcp);</div><div class='del'>-			if (rp)</div><div class='del'>-				memcpy(&amp;rcp2, rp, sizeof(rcp2));</div><div class='del'>-			spin_unlock_bh(&amp;ipddp_route_lock);</div><div class='del'>-</div><div class='del'>-			if (rp) {</div><div class='del'>-				if (copy_to_user(rt, &amp;rcp2,</div><div class='del'>-						 sizeof(struct ipddp_route)))</div><div class='del'>-					return -EFAULT;</div><div class='del'>-				return 0;</div><div class='del'>-			} else</div><div class='del'>-				return -ENOENT;</div><div class='del'>-</div><div class='del'>-                case SIOCDELIPDDPRT:</div><div class='del'>-                        return ipddp_delete(&amp;rcp);</div><div class='del'>-</div><div class='del'>-                default:</div><div class='del'>-                        return -EINVAL;</div><div class='del'>-        }</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct net_device *dev_ipddp;</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-module_param(ipddp_mode, int, 0);</div><div class='del'>-</div><div class='del'>-static int __init ipddp_init_module(void)</div><div class='del'>-{</div><div class='del'>-	dev_ipddp = ipddp_init();</div><div class='del'>-        if (IS_ERR(dev_ipddp))</div><div class='del'>-                return PTR_ERR(dev_ipddp);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit ipddp_cleanup_module(void)</div><div class='del'>-{</div><div class='del'>-        struct ipddp_route *p;</div><div class='del'>-</div><div class='del'>-	unregister_netdev(dev_ipddp);</div><div class='del'>-        free_netdev(dev_ipddp);</div><div class='del'>-</div><div class='del'>-        while (ipddp_route_list) {</div><div class='del'>-                p = ipddp_route_list-&gt;next;</div><div class='del'>-                kfree(ipddp_route_list);</div><div class='del'>-                ipddp_route_list = p;</div><div class='del'>-        }</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(ipddp_init_module);</div><div class='del'>-module_exit(ipddp_cleanup_module);</div><div class='head'>diff --git a/drivers/net/appletalk/ipddp.h b/drivers/net/appletalk/ipddp.h<br/>deleted file mode 100644<br/>index 531519da99a3..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/appletalk/ipddp.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/appletalk/ipddp.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,27 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *	ipddp.h: Header for IP-over-DDP driver for Linux.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __LINUX_IPDDP_H</div><div class='del'>-#define __LINUX_IPDDP_H</div><div class='del'>-</div><div class='del'>-#ifdef __KERNEL__</div><div class='del'>-</div><div class='del'>-#define SIOCADDIPDDPRT   (SIOCDEVPRIVATE)</div><div class='del'>-#define SIOCDELIPDDPRT   (SIOCDEVPRIVATE+1)</div><div class='del'>-#define SIOCFINDIPDDPRT  (SIOCDEVPRIVATE+2)</div><div class='del'>-</div><div class='del'>-struct ipddp_route</div><div class='del'>-{</div><div class='del'>-        struct net_device *dev;             /* Carrier device */</div><div class='del'>-        __be32 ip;                       /* IP address */</div><div class='del'>-        struct atalk_addr at;              /* Gateway appletalk address */</div><div class='del'>-        int flags;</div><div class='del'>-        struct ipddp_route *next;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define IPDDP_ENCAP	1</div><div class='del'>-#define IPDDP_DECAP	2</div><div class='del'>-</div><div class='del'>-#endif	/* __KERNEL__ */</div><div class='del'>-#endif	/* __LINUX_IPDDP_H */</div><div class='head'>diff --git a/drivers/net/appletalk/ltpc.c b/drivers/net/appletalk/ltpc.c<br/>deleted file mode 100644<br/>index 01e2ac55c137..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/appletalk/ltpc.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/appletalk/ltpc.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,1285 +0,0 @@</div><div class='del'>-/***    ltpc.c -- a driver for the LocalTalk PC card.</div><div class='del'>- *</div><div class='del'>- *      Copyright (c) 1995,1996 Bradford W. Johnson &lt;johns393@maroon.tc.umn.edu&gt;</div><div class='del'>- *</div><div class='del'>- *      This software may be used and distributed according to the terms</div><div class='del'>- *      of the GNU General Public License, incorporated herein by reference.</div><div class='del'>- *</div><div class='del'>- *      This is ALPHA code at best.  It may not work for you.  It may</div><div class='del'>- *      damage your equipment.  It may damage your relations with other</div><div class='del'>- *      users of your network.  Use it at your own risk!</div><div class='del'>- *</div><div class='del'>- *      Based in part on:</div><div class='del'>- *      skeleton.c      by Donald Becker</div><div class='del'>- *      dummy.c         by Nick Holloway and Alan Cox</div><div class='del'>- *      loopback.c      by Ross Biro, Fred van Kampen, Donald Becker</div><div class='del'>- *      the netatalk source code (UMICH)</div><div class='del'>- *      lots of work on the card...</div><div class='del'>- *</div><div class='del'>- *      I do not have access to the (proprietary) SDK that goes with the card.</div><div class='del'>- *      If you do, I don't want to know about it, and you can probably write</div><div class='del'>- *      a better driver yourself anyway.  This does mean that the pieces that</div><div class='del'>- *      talk to the card are guesswork on my part, so use at your own risk!</div><div class='del'>- *</div><div class='del'>- *      This is my first try at writing Linux networking code, and is also</div><div class='del'>- *      guesswork.  Again, use at your own risk!  (Although on this part, I'd</div><div class='del'>- *      welcome suggestions)</div><div class='del'>- *</div><div class='del'>- *      This is a loadable kernel module which seems to work at my site</div><div class='del'>- *      consisting of a 1.2.13 linux box running netatalk 1.3.3, and with</div><div class='del'>- *      the kernel support from 1.3.3b2 including patches routing.patch</div><div class='del'>- *      and ddp.disappears.from.chooser.  In order to run it, you will need</div><div class='del'>- *      to patch ddp.c and aarp.c in the kernel, but only a little...</div><div class='del'>- *</div><div class='del'>- *      I'm fairly confident that while this is arguably badly written, the</div><div class='del'>- *      problems that people experience will be "higher level", that is, with</div><div class='del'>- *      complications in the netatalk code.  The driver itself doesn't do</div><div class='del'>- *      anything terribly complicated -- it pretends to be an ether device</div><div class='del'>- *      as far as netatalk is concerned, strips the DDP data out of the ether</div><div class='del'>- *      frame and builds a LLAP packet to send out the card.  In the other</div><div class='del'>- *      direction, it receives LLAP frames from the card and builds a fake</div><div class='del'>- *      ether packet that it then tosses up to the networking code.  You can</div><div class='del'>- *      argue (correctly) that this is an ugly way to do things, but it</div><div class='del'>- *      requires a minimal amount of fooling with the code in ddp.c and aarp.c.</div><div class='del'>- *</div><div class='del'>- *      The card will do a lot more than is used here -- I *think* it has the</div><div class='del'>- *      layers up through ATP.  Even if you knew how that part works (which I</div><div class='del'>- *      don't) it would be a big job to carve up the kernel ddp code to insert</div><div class='del'>- *      things at a higher level, and probably a bad idea...</div><div class='del'>- *</div><div class='del'>- *      There are a number of other cards that do LocalTalk on the PC.  If</div><div class='del'>- *      nobody finds any insurmountable (at the netatalk level) problems</div><div class='del'>- *      here, this driver should encourage people to put some work into the</div><div class='del'>- *      other cards (some of which I gather are still commercially available)</div><div class='del'>- *      and also to put hooks for LocalTalk into the official ddp code.</div><div class='del'>- *</div><div class='del'>- *      I welcome comments and suggestions.  This is my first try at Linux</div><div class='del'>- *      networking stuff, and there are probably lots of things that I did</div><div class='del'>- *      suboptimally.  </div><div class='del'>- *</div><div class='del'>- ***/</div><div class='del'>-</div><div class='del'>-/***</div><div class='del'>- *</div><div class='del'>- * $Log: ltpc.c,v $</div><div class='del'>- * Revision 1.1.2.1  2000/03/01 05:35:07  jgarzik</div><div class='del'>- * at and tr cleanup</div><div class='del'>- *</div><div class='del'>- * Revision 1.8  1997/01/28 05:44:54  bradford</div><div class='del'>- * Clean up for non-module a little.</div><div class='del'>- * Hacked about a bit to clean things up - Alan Cox </div><div class='del'>- * Probably broken it from the origina 1.8</div><div class='del'>- *</div><div class='del'>-</div><div class='del'>- * 1998/11/09: David Huggins-Daines &lt;dhd@debian.org&gt;</div><div class='del'>- * Cleaned up the initialization code to use the standard autoirq methods,</div><div class='del'>-   and to probe for things in the standard order of i/o, irq, dma.  This</div><div class='del'>-   removes the "reset the reset" hack, because I couldn't figure out an</div><div class='del'>-   easy way to get the card to trigger an interrupt after it.</div><div class='del'>- * Added support for passing configuration parameters on the kernel command</div><div class='del'>-   line and through insmod</div><div class='del'>- * Changed the device name from "ltalk0" to "lt0", both to conform with the</div><div class='del'>-   other localtalk driver, and to clear up the inconsistency between the</div><div class='del'>-   module and the non-module versions of the driver :-)</div><div class='del'>- * Added a bunch of comments (I was going to make some enums for the state</div><div class='del'>-   codes and the register offsets, but I'm still not sure exactly what their</div><div class='del'>-   semantics are)</div><div class='del'>- * Don't poll anymore in interrupt-driven mode</div><div class='del'>- * It seems to work as a module now (as of 2.1.127), but I don't think</div><div class='del'>-   I'm responsible for that...</div><div class='del'>-</div><div class='del'>- *</div><div class='del'>- * Revision 1.7  1996/12/12 03:42:33  bradford</div><div class='del'>- * DMA alloc cribbed from 3c505.c.</div><div class='del'>- *</div><div class='del'>- * Revision 1.6  1996/12/12 03:18:58  bradford</div><div class='del'>- * Added virt_to_bus; works in 2.1.13.</div><div class='del'>- *</div><div class='del'>- * Revision 1.5  1996/12/12 03:13:22  root</div><div class='del'>- * xmitQel initialization -- think through better though.</div><div class='del'>- *</div><div class='del'>- * Revision 1.4  1996/06/18 14:55:55  root</div><div class='del'>- * Change names to ltpc. Tabs. Took a shot at dma alloc,</div><div class='del'>- * although more needs to be done eventually.</div><div class='del'>- *</div><div class='del'>- * Revision 1.3  1996/05/22 14:59:39  root</div><div class='del'>- * Change dev-&gt;open, dev-&gt;close to track dummy.c in 1.99.(around 7)</div><div class='del'>- *</div><div class='del'>- * Revision 1.2  1996/05/22 14:58:24  root</div><div class='del'>- * Change tabs mostly.</div><div class='del'>- *</div><div class='del'>- * Revision 1.1  1996/04/23 04:45:09  root</div><div class='del'>- * Initial revision</div><div class='del'>- *</div><div class='del'>- * Revision 0.16  1996/03/05 15:59:56  root</div><div class='del'>- * Change ARPHRD_LOCALTLK definition to the "real" one.</div><div class='del'>- *</div><div class='del'>- * Revision 0.15  1996/03/05 06:28:30  root</div><div class='del'>- * Changes for kernel 1.3.70.  Still need a few patches to kernel, but</div><div class='del'>- * it's getting closer.</div><div class='del'>- *</div><div class='del'>- * Revision 0.14  1996/02/25 17:38:32  root</div><div class='del'>- * More cleanups.  Removed query to card on get_stats.</div><div class='del'>- *</div><div class='del'>- * Revision 0.13  1996/02/21  16:27:40  root</div><div class='del'>- * Refix debug_print_skb.  Fix mac.raw gotcha that appeared in 1.3.65.</div><div class='del'>- * Clean up receive code a little.</div><div class='del'>- *</div><div class='del'>- * Revision 0.12  1996/02/19  16:34:53  root</div><div class='del'>- * Fix debug_print_skb.  Kludge outgoing snet to 0 when using startup</div><div class='del'>- * range.  Change debug to mask: 1 for verbose, 2 for higher level stuff</div><div class='del'>- * including packet printing, 4 for lower level (card i/o) stuff.</div><div class='del'>- *</div><div class='del'>- * Revision 0.11  1996/02/12  15:53:38  root</div><div class='del'>- * Added router sends (requires new aarp.c patch)</div><div class='del'>- *</div><div class='del'>- * Revision 0.10  1996/02/11  00:19:35  root</div><div class='del'>- * Change source LTALK_LOGGING debug switch to insmod ... debug=2.</div><div class='del'>- *</div><div class='del'>- * Revision 0.9  1996/02/10  23:59:35  root</div><div class='del'>- * Fixed those fixes for 1.2 -- DANGER!  The at.h that comes with netatalk</div><div class='del'>- * has a *different* definition of struct sockaddr_at than the Linux kernel</div><div class='del'>- * does.  This is an "insidious and invidious" bug...</div><div class='del'>- * (Actually the preceding comment is false -- it's the atalk.h in the</div><div class='del'>- * ancient atalk-0.06 that's the problem)</div><div class='del'>- *</div><div class='del'>- * Revision 0.8  1996/02/10 19:09:00  root</div><div class='del'>- * Merge 1.3 changes.  Tested OK under 1.3.60.</div><div class='del'>- *</div><div class='del'>- * Revision 0.7  1996/02/10 17:56:56  root</div><div class='del'>- * Added debug=1 parameter on insmod for debugging prints.  Tried</div><div class='del'>- * to fix timer unload on rmmod, but I don't think that's the problem.</div><div class='del'>- *</div><div class='del'>- * Revision 0.6  1995/12/31  19:01:09  root</div><div class='del'>- * Clean up rmmod, irq comments per feedback from Corin Anderson (Thanks Corey!)</div><div class='del'>- * Clean up initial probing -- sometimes the card wakes up latched in reset.</div><div class='del'>- *</div><div class='del'>- * Revision 0.5  1995/12/22  06:03:44  root</div><div class='del'>- * Added comments in front and cleaned up a bit.</div><div class='del'>- * This version sent out to people.</div><div class='del'>- *</div><div class='del'>- * Revision 0.4  1995/12/18  03:46:44  root</div><div class='del'>- * Return shortDDP to longDDP fake to 0/0.  Added command structs.</div><div class='del'>- *</div><div class='del'>- ***/</div><div class='del'>-</div><div class='del'>-/* ltpc jumpers are:</div><div class='del'>-*</div><div class='del'>-*	Interrupts -- set at most one.  If none are set, the driver uses</div><div class='del'>-*	polled mode.  Because the card was developed in the XT era, the</div><div class='del'>-*	original documentation refers to IRQ2.  Since you'll be running</div><div class='del'>-*	this on an AT (or later) class machine, that really means IRQ9.</div><div class='del'>-*</div><div class='del'>-*	SW1	IRQ 4</div><div class='del'>-*	SW2	IRQ 3</div><div class='del'>-*	SW3	IRQ 9 (2 in original card documentation only applies to XT)</div><div class='del'>-*</div><div class='del'>-*</div><div class='del'>-*	DMA -- choose DMA 1 or 3, and set both corresponding switches.</div><div class='del'>-*</div><div class='del'>-*	SW4	DMA 3</div><div class='del'>-*	SW5	DMA 1</div><div class='del'>-*	SW6	DMA 3</div><div class='del'>-*	SW7	DMA 1</div><div class='del'>-*</div><div class='del'>-*</div><div class='del'>-*	I/O address -- choose one.  </div><div class='del'>-*</div><div class='del'>-*	SW8	220 / 240</div><div class='del'>-*/</div><div class='del'>-</div><div class='del'>-/*	To have some stuff logged, do </div><div class='del'>-*	insmod ltpc.o debug=1</div><div class='del'>-*</div><div class='del'>-*	For a whole bunch of stuff, use higher numbers.</div><div class='del'>-*</div><div class='del'>-*	The default is 0, i.e. no messages except for the probe results.</div><div class='del'>-*/</div><div class='del'>-</div><div class='del'>-/* insmod-tweakable variables */</div><div class='del'>-static int debug;</div><div class='del'>-#define DEBUG_VERBOSE 1</div><div class='del'>-#define DEBUG_UPPER 2</div><div class='del'>-#define DEBUG_LOWER 4</div><div class='del'>-</div><div class='del'>-static int io;</div><div class='del'>-static int irq;</div><div class='del'>-static int dma;</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/fcntl.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/ptrace.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;linux/spinlock.h&gt;</div><div class='del'>-#include &lt;linux/in.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/etherdevice.h&gt;</div><div class='del'>-#include &lt;linux/skbuff.h&gt;</div><div class='del'>-#include &lt;linux/if_arp.h&gt;</div><div class='del'>-#include &lt;linux/if_ltalk.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/timer.h&gt;</div><div class='del'>-#include &lt;linux/atalk.h&gt;</div><div class='del'>-#include &lt;linux/bitops.h&gt;</div><div class='del'>-#include &lt;linux/gfp.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/dma.h&gt;</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-</div><div class='del'>-/* our stuff */</div><div class='del'>-#include "ltpc.h"</div><div class='del'>-</div><div class='del'>-static DEFINE_SPINLOCK(txqueue_lock);</div><div class='del'>-static DEFINE_SPINLOCK(mbox_lock);</div><div class='del'>-</div><div class='del'>-/* function prototypes */</div><div class='del'>-static int do_read(struct net_device *dev, void *cbuf, int cbuflen,</div><div class='del'>-	void *dbuf, int dbuflen);</div><div class='del'>-static int sendup_buffer (struct net_device *dev);</div><div class='del'>-</div><div class='del'>-/* Dma Memory related stuff, cribbed directly from 3c505.c */</div><div class='del'>-</div><div class='del'>-static unsigned long dma_mem_alloc(int size)</div><div class='del'>-{</div><div class='del'>-        int order = get_order(size);</div><div class='del'>-</div><div class='del'>-        return __get_dma_pages(GFP_KERNEL, order);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* DMA data buffer, DMA command buffer */</div><div class='del'>-static unsigned char *ltdmabuf;</div><div class='del'>-static unsigned char *ltdmacbuf;</div><div class='del'>-</div><div class='del'>-/* private struct, holds our appletalk address */</div><div class='del'>-</div><div class='del'>-struct ltpc_private</div><div class='del'>-{</div><div class='del'>-	struct atalk_addr my_addr;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* transmit queue element struct */</div><div class='del'>-</div><div class='del'>-struct xmitQel {</div><div class='del'>-	struct xmitQel *next;</div><div class='del'>-	/* command buffer */</div><div class='del'>-	unsigned char *cbuf;</div><div class='del'>-	short cbuflen;</div><div class='del'>-	/* data buffer */</div><div class='del'>-	unsigned char *dbuf;</div><div class='del'>-	short dbuflen;</div><div class='del'>-	unsigned char QWrite;	/* read or write data */</div><div class='del'>-	unsigned char mailbox;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* the transmit queue itself */</div><div class='del'>-</div><div class='del'>-static struct xmitQel *xmQhd, *xmQtl;</div><div class='del'>-</div><div class='del'>-static void enQ(struct xmitQel *qel)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	qel-&gt;next = NULL;</div><div class='del'>-	</div><div class='del'>-	spin_lock_irqsave(&amp;txqueue_lock, flags);</div><div class='del'>-	if (xmQtl) {</div><div class='del'>-		xmQtl-&gt;next = qel;</div><div class='del'>-	} else {</div><div class='del'>-		xmQhd = qel;</div><div class='del'>-	}</div><div class='del'>-	xmQtl = qel;</div><div class='del'>-	spin_unlock_irqrestore(&amp;txqueue_lock, flags);</div><div class='del'>-</div><div class='del'>-	if (debug &amp; DEBUG_LOWER)</div><div class='del'>-		printk("enqueued a 0x%02x command\n",qel-&gt;cbuf[0]);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct xmitQel *deQ(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	int i;</div><div class='del'>-	struct xmitQel *qel=NULL;</div><div class='del'>-	</div><div class='del'>-	spin_lock_irqsave(&amp;txqueue_lock, flags);</div><div class='del'>-	if (xmQhd) {</div><div class='del'>-		qel = xmQhd;</div><div class='del'>-		xmQhd = qel-&gt;next;</div><div class='del'>-		if(!xmQhd) xmQtl = NULL;</div><div class='del'>-	}</div><div class='del'>-	spin_unlock_irqrestore(&amp;txqueue_lock, flags);</div><div class='del'>-</div><div class='del'>-	if ((debug &amp; DEBUG_LOWER) &amp;&amp; qel) {</div><div class='del'>-		int n;</div><div class='del'>-		printk(KERN_DEBUG "ltpc: dequeued command ");</div><div class='del'>-		n = qel-&gt;cbuflen;</div><div class='del'>-		if (n&gt;100) n=100;</div><div class='del'>-		for(i=0;i&lt;n;i++) printk("%02x ",qel-&gt;cbuf[i]);</div><div class='del'>-		printk("\n");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return qel;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* and... the queue elements we'll be using */</div><div class='del'>-static struct xmitQel qels[16];</div><div class='del'>-</div><div class='del'>-/* and their corresponding mailboxes */</div><div class='del'>-static unsigned char mailbox[16];</div><div class='del'>-static unsigned char mboxinuse[16] = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};</div><div class='del'>-</div><div class='del'>-static int wait_timeout(struct net_device *dev, int c)</div><div class='del'>-{</div><div class='del'>-	/* returns true if it stayed c */</div><div class='del'>-	/* this uses base+6, but it's ok */</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* twenty second or so total */</div><div class='del'>-</div><div class='del'>-	for(i=0;i&lt;200000;i++) {</div><div class='del'>-		if ( c != inb_p(dev-&gt;base_addr+6) ) return 0;</div><div class='del'>-		udelay(100);</div><div class='del'>-	}</div><div class='del'>-	return 1; /* timed out */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* get the first free mailbox */</div><div class='del'>-</div><div class='del'>-static int getmbox(void)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;mbox_lock, flags);</div><div class='del'>-	for(i=1;i&lt;16;i++) if(!mboxinuse[i]) {</div><div class='del'>-		mboxinuse[i]=1;</div><div class='del'>-		spin_unlock_irqrestore(&amp;mbox_lock, flags);</div><div class='del'>-		return i;</div><div class='del'>-	}</div><div class='del'>-	spin_unlock_irqrestore(&amp;mbox_lock, flags);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* read a command from the card */</div><div class='del'>-static void handlefc(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	/* called *only* from idle, non-reentrant */</div><div class='del'>-	int dma = dev-&gt;dma;</div><div class='del'>-	int base = dev-&gt;base_addr;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	flags=claim_dma_lock();</div><div class='del'>-	disable_dma(dma);</div><div class='del'>-	clear_dma_ff(dma);</div><div class='del'>-	set_dma_mode(dma,DMA_MODE_READ);</div><div class='del'>-	set_dma_addr(dma,virt_to_bus(ltdmacbuf));</div><div class='del'>-	set_dma_count(dma,50);</div><div class='del'>-	enable_dma(dma);</div><div class='del'>-	release_dma_lock(flags);</div><div class='del'>-</div><div class='del'>-	inb_p(base+3);</div><div class='del'>-	inb_p(base+2);</div><div class='del'>-</div><div class='del'>-	if ( wait_timeout(dev,0xfc) ) printk("timed out in handlefc\n");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* read data from the card */</div><div class='del'>-static void handlefd(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	int dma = dev-&gt;dma;</div><div class='del'>-	int base = dev-&gt;base_addr;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	flags=claim_dma_lock();</div><div class='del'>-	disable_dma(dma);</div><div class='del'>-	clear_dma_ff(dma);</div><div class='del'>-	set_dma_mode(dma,DMA_MODE_READ);</div><div class='del'>-	set_dma_addr(dma,virt_to_bus(ltdmabuf));</div><div class='del'>-	set_dma_count(dma,800);</div><div class='del'>-	enable_dma(dma);</div><div class='del'>-	release_dma_lock(flags);</div><div class='del'>-</div><div class='del'>-	inb_p(base+3);</div><div class='del'>-	inb_p(base+2);</div><div class='del'>-</div><div class='del'>-	if ( wait_timeout(dev,0xfd) ) printk("timed out in handlefd\n");</div><div class='del'>-	sendup_buffer(dev);</div><div class='del'>-} </div><div class='del'>-</div><div class='del'>-static void handlewrite(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	/* called *only* from idle, non-reentrant */</div><div class='del'>-	/* on entry, 0xfb and ltdmabuf holds data */</div><div class='del'>-	int dma = dev-&gt;dma;</div><div class='del'>-	int base = dev-&gt;base_addr;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	</div><div class='del'>-	flags=claim_dma_lock();</div><div class='del'>-	disable_dma(dma);</div><div class='del'>-	clear_dma_ff(dma);</div><div class='del'>-	set_dma_mode(dma,DMA_MODE_WRITE);</div><div class='del'>-	set_dma_addr(dma,virt_to_bus(ltdmabuf));</div><div class='del'>-	set_dma_count(dma,800);</div><div class='del'>-	enable_dma(dma);</div><div class='del'>-	release_dma_lock(flags);</div><div class='del'>-	</div><div class='del'>-	inb_p(base+3);</div><div class='del'>-	inb_p(base+2);</div><div class='del'>-</div><div class='del'>-	if ( wait_timeout(dev,0xfb) ) {</div><div class='del'>-		flags=claim_dma_lock();</div><div class='del'>-		printk("timed out in handlewrite, dma res %d\n",</div><div class='del'>-			get_dma_residue(dev-&gt;dma) );</div><div class='del'>-		release_dma_lock(flags);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void handleread(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	/* on entry, 0xfb */</div><div class='del'>-	/* on exit, ltdmabuf holds data */</div><div class='del'>-	int dma = dev-&gt;dma;</div><div class='del'>-	int base = dev-&gt;base_addr;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	</div><div class='del'>-	flags=claim_dma_lock();</div><div class='del'>-	disable_dma(dma);</div><div class='del'>-	clear_dma_ff(dma);</div><div class='del'>-	set_dma_mode(dma,DMA_MODE_READ);</div><div class='del'>-	set_dma_addr(dma,virt_to_bus(ltdmabuf));</div><div class='del'>-	set_dma_count(dma,800);</div><div class='del'>-	enable_dma(dma);</div><div class='del'>-	release_dma_lock(flags);</div><div class='del'>-</div><div class='del'>-	inb_p(base+3);</div><div class='del'>-	inb_p(base+2);</div><div class='del'>-	if ( wait_timeout(dev,0xfb) ) printk("timed out in handleread\n");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void handlecommand(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	/* on entry, 0xfa and ltdmacbuf holds command */</div><div class='del'>-	int dma = dev-&gt;dma;</div><div class='del'>-	int base = dev-&gt;base_addr;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	flags=claim_dma_lock();</div><div class='del'>-	disable_dma(dma);</div><div class='del'>-	clear_dma_ff(dma);</div><div class='del'>-	set_dma_mode(dma,DMA_MODE_WRITE);</div><div class='del'>-	set_dma_addr(dma,virt_to_bus(ltdmacbuf));</div><div class='del'>-	set_dma_count(dma,50);</div><div class='del'>-	enable_dma(dma);</div><div class='del'>-	release_dma_lock(flags);</div><div class='del'>-	inb_p(base+3);</div><div class='del'>-	inb_p(base+2);</div><div class='del'>-	if ( wait_timeout(dev,0xfa) ) printk("timed out in handlecommand\n");</div><div class='del'>-} </div><div class='del'>-</div><div class='del'>-/* ready made command for getting the result from the card */</div><div class='del'>-static unsigned char rescbuf[2] = {LT_GETRESULT,0};</div><div class='del'>-static unsigned char resdbuf[2];</div><div class='del'>-</div><div class='del'>-static int QInIdle;</div><div class='del'>-</div><div class='del'>-/* idle expects to be called with the IRQ line high -- either because of</div><div class='del'>- * an interrupt, or because the line is tri-stated</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void idle(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	int state;</div><div class='del'>-	/* FIXME This is initialized to shut the warning up, but I need to</div><div class='del'>-	 * think this through again.</div><div class='del'>-	 */</div><div class='del'>-	struct xmitQel *q = NULL;</div><div class='del'>-	int oops;</div><div class='del'>-	int i;</div><div class='del'>-	int base = dev-&gt;base_addr;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;txqueue_lock, flags);</div><div class='del'>-	if(QInIdle) {</div><div class='del'>-		spin_unlock_irqrestore(&amp;txqueue_lock, flags);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	QInIdle = 1;</div><div class='del'>-	spin_unlock_irqrestore(&amp;txqueue_lock, flags);</div><div class='del'>-</div><div class='del'>-	/* this tri-states the IRQ line */</div><div class='del'>-	(void) inb_p(base+6);</div><div class='del'>-</div><div class='del'>-	oops = 100;</div><div class='del'>-</div><div class='del'>-loop:</div><div class='del'>-	if (0&gt;oops--) { </div><div class='del'>-		printk("idle: looped too many times\n");</div><div class='del'>-		goto done;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	state = inb_p(base+6);</div><div class='del'>-	if (state != inb_p(base+6)) goto loop;</div><div class='del'>-</div><div class='del'>-	switch(state) {</div><div class='del'>-		case 0xfc:</div><div class='del'>-			/* incoming command */</div><div class='del'>-			if (debug &amp; DEBUG_LOWER) printk("idle: fc\n");</div><div class='del'>-			handlefc(dev); </div><div class='del'>-			break;</div><div class='del'>-		case 0xfd:</div><div class='del'>-			/* incoming data */</div><div class='del'>-			if(debug &amp; DEBUG_LOWER) printk("idle: fd\n");</div><div class='del'>-			handlefd(dev); </div><div class='del'>-			break;</div><div class='del'>-		case 0xf9:</div><div class='del'>-			/* result ready */</div><div class='del'>-			if (debug &amp; DEBUG_LOWER) printk("idle: f9\n");</div><div class='del'>-			if(!mboxinuse[0]) {</div><div class='del'>-				mboxinuse[0] = 1;</div><div class='del'>-				qels[0].cbuf = rescbuf;</div><div class='del'>-				qels[0].cbuflen = 2;</div><div class='del'>-				qels[0].dbuf = resdbuf;</div><div class='del'>-				qels[0].dbuflen = 2;</div><div class='del'>-				qels[0].QWrite = 0;</div><div class='del'>-				qels[0].mailbox = 0;</div><div class='del'>-				enQ(&amp;qels[0]);</div><div class='del'>-			}</div><div class='del'>-			inb_p(dev-&gt;base_addr+1);</div><div class='del'>-			inb_p(dev-&gt;base_addr+0);</div><div class='del'>-			if( wait_timeout(dev,0xf9) )</div><div class='del'>-				printk("timed out idle f9\n");</div><div class='del'>-			break;</div><div class='del'>-		case 0xf8:</div><div class='del'>-			/* ?? */</div><div class='del'>-			if (xmQhd) {</div><div class='del'>-				inb_p(dev-&gt;base_addr+1);</div><div class='del'>-				inb_p(dev-&gt;base_addr+0);</div><div class='del'>-				if(wait_timeout(dev,0xf8) )</div><div class='del'>-					printk("timed out idle f8\n");</div><div class='del'>-			} else {</div><div class='del'>-				goto done;</div><div class='del'>-			}</div><div class='del'>-			break;</div><div class='del'>-		case 0xfa:</div><div class='del'>-			/* waiting for command */</div><div class='del'>-			if(debug &amp; DEBUG_LOWER) printk("idle: fa\n");</div><div class='del'>-			if (xmQhd) {</div><div class='del'>-				q=deQ();</div><div class='del'>-				memcpy(ltdmacbuf,q-&gt;cbuf,q-&gt;cbuflen);</div><div class='del'>-				ltdmacbuf[1] = q-&gt;mailbox;</div><div class='del'>-				if (debug&gt;1) { </div><div class='del'>-					int n;</div><div class='del'>-					printk("ltpc: sent command     ");</div><div class='del'>-					n = q-&gt;cbuflen;</div><div class='del'>-					if (n&gt;100) n=100;</div><div class='del'>-					for(i=0;i&lt;n;i++)</div><div class='del'>-						printk("%02x ",ltdmacbuf[i]);</div><div class='del'>-					printk("\n");</div><div class='del'>-				}</div><div class='del'>-				handlecommand(dev);</div><div class='del'>-					if(0xfa==inb_p(base+6)) {</div><div class='del'>-						/* we timed out, so return */</div><div class='del'>-						goto done;</div><div class='del'>-					} </div><div class='del'>-			} else {</div><div class='del'>-				/* we don't seem to have a command */</div><div class='del'>-				if (!mboxinuse[0]) {</div><div class='del'>-					mboxinuse[0] = 1;</div><div class='del'>-					qels[0].cbuf = rescbuf;</div><div class='del'>-					qels[0].cbuflen = 2;</div><div class='del'>-					qels[0].dbuf = resdbuf;</div><div class='del'>-					qels[0].dbuflen = 2;</div><div class='del'>-					qels[0].QWrite = 0;</div><div class='del'>-					qels[0].mailbox = 0;</div><div class='del'>-					enQ(&amp;qels[0]);</div><div class='del'>-				} else {</div><div class='del'>-					printk("trouble: response command already queued\n");</div><div class='del'>-					goto done;</div><div class='del'>-				}</div><div class='del'>-			} </div><div class='del'>-			break;</div><div class='del'>-		case 0Xfb:</div><div class='del'>-			/* data transfer ready */</div><div class='del'>-			if(debug &amp; DEBUG_LOWER) printk("idle: fb\n");</div><div class='del'>-			if(q-&gt;QWrite) {</div><div class='del'>-				memcpy(ltdmabuf,q-&gt;dbuf,q-&gt;dbuflen);</div><div class='del'>-				handlewrite(dev);</div><div class='del'>-			} else {</div><div class='del'>-				handleread(dev);</div><div class='del'>-				/* non-zero mailbox numbers are for</div><div class='del'>-				   commmands, 0 is for GETRESULT</div><div class='del'>-				   requests */</div><div class='del'>-				if(q-&gt;mailbox) {</div><div class='del'>-					memcpy(q-&gt;dbuf,ltdmabuf,q-&gt;dbuflen);</div><div class='del'>-				} else { </div><div class='del'>-					/* this was a result */</div><div class='del'>-					mailbox[ 0x0f &amp; ltdmabuf[0] ] = ltdmabuf[1];</div><div class='del'>-					mboxinuse[0]=0;</div><div class='del'>-				}</div><div class='del'>-			}</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-	goto loop;</div><div class='del'>-</div><div class='del'>-done:</div><div class='del'>-	QInIdle=0;</div><div class='del'>-</div><div class='del'>-	/* now set the interrupts back as appropriate */</div><div class='del'>-	/* the first read takes it out of tri-state (but still high) */</div><div class='del'>-	/* the second resets it */</div><div class='del'>-	/* note that after this point, any read of base+6 will</div><div class='del'>-	   trigger an interrupt */</div><div class='del'>-</div><div class='del'>-	if (dev-&gt;irq) {</div><div class='del'>-		inb_p(base+7);</div><div class='del'>-		inb_p(base+7);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int do_write(struct net_device *dev, void *cbuf, int cbuflen,</div><div class='del'>-	void *dbuf, int dbuflen)</div><div class='del'>-{</div><div class='del'>-</div><div class='del'>-	int i = getmbox();</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if(i) {</div><div class='del'>-		qels[i].cbuf = cbuf;</div><div class='del'>-		qels[i].cbuflen = cbuflen;</div><div class='del'>-		qels[i].dbuf = dbuf;</div><div class='del'>-		qels[i].dbuflen = dbuflen;</div><div class='del'>-		qels[i].QWrite = 1;</div><div class='del'>-		qels[i].mailbox = i;  /* this should be initted rather */</div><div class='del'>-		enQ(&amp;qels[i]);</div><div class='del'>-		idle(dev);</div><div class='del'>-		ret = mailbox[i];</div><div class='del'>-		mboxinuse[i]=0;</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-	printk("ltpc: could not allocate mbox\n");</div><div class='del'>-	return -1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int do_read(struct net_device *dev, void *cbuf, int cbuflen,</div><div class='del'>-	void *dbuf, int dbuflen)</div><div class='del'>-{</div><div class='del'>-</div><div class='del'>-	int i = getmbox();</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if(i) {</div><div class='del'>-		qels[i].cbuf = cbuf;</div><div class='del'>-		qels[i].cbuflen = cbuflen;</div><div class='del'>-		qels[i].dbuf = dbuf;</div><div class='del'>-		qels[i].dbuflen = dbuflen;</div><div class='del'>-		qels[i].QWrite = 0;</div><div class='del'>-		qels[i].mailbox = i;  /* this should be initted rather */</div><div class='del'>-		enQ(&amp;qels[i]);</div><div class='del'>-		idle(dev);</div><div class='del'>-		ret = mailbox[i];</div><div class='del'>-		mboxinuse[i]=0;</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-	printk("ltpc: could not allocate mbox\n");</div><div class='del'>-	return -1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* end of idle handlers -- what should be seen is do_read, do_write */</div><div class='del'>-</div><div class='del'>-static struct timer_list ltpc_timer;</div><div class='del'>-</div><div class='del'>-static netdev_tx_t ltpc_xmit(struct sk_buff *skb, struct net_device *dev);</div><div class='del'>-</div><div class='del'>-static int read_30 ( struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	lt_command c;</div><div class='del'>-	c.getflags.command = LT_GETFLAGS;</div><div class='del'>-	return do_read(dev, &amp;c, sizeof(c.getflags),&amp;c,0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int set_30 (struct net_device *dev,int x)</div><div class='del'>-{</div><div class='del'>-	lt_command c;</div><div class='del'>-	c.setflags.command = LT_SETFLAGS;</div><div class='del'>-	c.setflags.flags = x;</div><div class='del'>-	return do_write(dev, &amp;c, sizeof(c.setflags),&amp;c,0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* LLAP to DDP translation */</div><div class='del'>-</div><div class='del'>-static int sendup_buffer (struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	/* on entry, command is in ltdmacbuf, data in ltdmabuf */</div><div class='del'>-	/* called from idle, non-reentrant */</div><div class='del'>-</div><div class='del'>-	int dnode, snode, llaptype, len; </div><div class='del'>-	int sklen;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	struct lt_rcvlap *ltc = (struct lt_rcvlap *) ltdmacbuf;</div><div class='del'>-</div><div class='del'>-	if (ltc-&gt;command != LT_RCVLAP) {</div><div class='del'>-		printk("unknown command 0x%02x from ltpc card\n",ltc-&gt;command);</div><div class='del'>-		return -1;</div><div class='del'>-	}</div><div class='del'>-	dnode = ltc-&gt;dnode;</div><div class='del'>-	snode = ltc-&gt;snode;</div><div class='del'>-	llaptype = ltc-&gt;laptype;</div><div class='del'>-	len = ltc-&gt;length; </div><div class='del'>-</div><div class='del'>-	sklen = len;</div><div class='del'>-	if (llaptype == 1) </div><div class='del'>-		sklen += 8;  /* correct for short ddp */</div><div class='del'>-	if(sklen &gt; 800) {</div><div class='del'>-		printk(KERN_INFO "%s: nonsense length in ltpc command 0x14: 0x%08x\n",</div><div class='del'>-			dev-&gt;name,sklen);</div><div class='del'>-		return -1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if ( (llaptype==0) || (llaptype&gt;2) ) {</div><div class='del'>-		printk(KERN_INFO "%s: unknown LLAP type: %d\n",dev-&gt;name,llaptype);</div><div class='del'>-		return -1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	skb = dev_alloc_skb(3+sklen);</div><div class='del'>-	if (skb == NULL) </div><div class='del'>-	{</div><div class='del'>-		printk("%s: dropping packet due to memory squeeze.\n",</div><div class='del'>-			dev-&gt;name);</div><div class='del'>-		return -1;</div><div class='del'>-	}</div><div class='del'>-	skb-&gt;dev = dev;</div><div class='del'>-</div><div class='del'>-	if (sklen &gt; len)</div><div class='del'>-		skb_reserve(skb,8);</div><div class='del'>-	skb_put(skb,len+3);</div><div class='del'>-	skb-&gt;protocol = htons(ETH_P_LOCALTALK);</div><div class='del'>-	/* add LLAP header */</div><div class='del'>-	skb-&gt;data[0] = dnode;</div><div class='del'>-	skb-&gt;data[1] = snode;</div><div class='del'>-	skb-&gt;data[2] = llaptype;</div><div class='del'>-	skb_reset_mac_header(skb);	/* save pointer to llap header */</div><div class='del'>-	skb_pull(skb,3);</div><div class='del'>-</div><div class='del'>-	/* copy ddp(s,e)hdr + contents */</div><div class='del'>-	skb_copy_to_linear_data(skb, ltdmabuf, len);</div><div class='del'>-</div><div class='del'>-	skb_reset_transport_header(skb);</div><div class='del'>-</div><div class='del'>-	dev-&gt;stats.rx_packets++;</div><div class='del'>-	dev-&gt;stats.rx_bytes += skb-&gt;len;</div><div class='del'>-</div><div class='del'>-	/* toss it onwards */</div><div class='del'>-	netif_rx(skb);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* the handler for the board interrupt */</div><div class='del'>- </div><div class='del'>-static irqreturn_t</div><div class='del'>-ltpc_interrupt(int irq, void *dev_id)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = dev_id;</div><div class='del'>-</div><div class='del'>-	if (dev==NULL) {</div><div class='del'>-		printk("ltpc_interrupt: unknown device.\n");</div><div class='del'>-		return IRQ_NONE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	inb_p(dev-&gt;base_addr+6);  /* disable further interrupts from board */</div><div class='del'>-</div><div class='del'>-	idle(dev); /* handle whatever is coming in */</div><div class='del'>- </div><div class='del'>-	/* idle re-enables interrupts from board */ </div><div class='del'>-</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/***</div><div class='del'>- *</div><div class='del'>- *    The ioctls that the driver responds to are:</div><div class='del'>- *</div><div class='del'>- *    SIOCSIFADDR -- do probe using the passed node hint.</div><div class='del'>- *    SIOCGIFADDR -- return net, node.</div><div class='del'>- *</div><div class='del'>- *    some of this stuff should be done elsewhere.</div><div class='del'>- *</div><div class='del'>- ***/</div><div class='del'>-</div><div class='del'>-static int ltpc_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)</div><div class='del'>-{</div><div class='del'>-	struct sockaddr_at *sa = (struct sockaddr_at *) &amp;ifr-&gt;ifr_addr;</div><div class='del'>-	/* we'll keep the localtalk node address in dev-&gt;pa_addr */</div><div class='del'>-	struct ltpc_private *ltpc_priv = netdev_priv(dev);</div><div class='del'>-	struct atalk_addr *aa = &amp;ltpc_priv-&gt;my_addr;</div><div class='del'>-	struct lt_init c;</div><div class='del'>-	int ltflags;</div><div class='del'>-</div><div class='del'>-	if(debug &amp; DEBUG_VERBOSE) printk("ltpc_ioctl called\n");</div><div class='del'>-</div><div class='del'>-	switch(cmd) {</div><div class='del'>-		case SIOCSIFADDR:</div><div class='del'>-</div><div class='del'>-			aa-&gt;s_net  = sa-&gt;sat_addr.s_net;</div><div class='del'>-      </div><div class='del'>-			/* this does the probe and returns the node addr */</div><div class='del'>-			c.command = LT_INIT;</div><div class='del'>-			c.hint = sa-&gt;sat_addr.s_node;</div><div class='del'>-</div><div class='del'>-			aa-&gt;s_node = do_read(dev,&amp;c,sizeof(c),&amp;c,0);</div><div class='del'>-</div><div class='del'>-			/* get all llap frames raw */</div><div class='del'>-			ltflags = read_30(dev);</div><div class='del'>-			ltflags |= LT_FLAG_ALLLAP;</div><div class='del'>-			set_30 (dev,ltflags);  </div><div class='del'>-</div><div class='del'>-			dev-&gt;broadcast[0] = 0xFF;</div><div class='del'>-			dev-&gt;dev_addr[0] = aa-&gt;s_node;</div><div class='del'>-</div><div class='del'>-			dev-&gt;addr_len=1;</div><div class='del'>-   </div><div class='del'>-			return 0;</div><div class='del'>-</div><div class='del'>-		case SIOCGIFADDR:</div><div class='del'>-</div><div class='del'>-			sa-&gt;sat_addr.s_net = aa-&gt;s_net;</div><div class='del'>-			sa-&gt;sat_addr.s_node = aa-&gt;s_node;</div><div class='del'>-</div><div class='del'>-			return 0;</div><div class='del'>-</div><div class='del'>-		default: </div><div class='del'>-			return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void set_multicast_list(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	/* This needs to be present to keep netatalk happy. */</div><div class='del'>-	/* Actually netatalk needs fixing! */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ltpc_poll_counter;</div><div class='del'>-</div><div class='del'>-static void ltpc_poll(unsigned long l)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = (struct net_device *) l;</div><div class='del'>-</div><div class='del'>-	del_timer(&amp;ltpc_timer);</div><div class='del'>-</div><div class='del'>-	if(debug &amp; DEBUG_VERBOSE) {</div><div class='del'>-		if (!ltpc_poll_counter) {</div><div class='del'>-			ltpc_poll_counter = 50;</div><div class='del'>-			printk("ltpc poll is alive\n");</div><div class='del'>-		}</div><div class='del'>-		ltpc_poll_counter--;</div><div class='del'>-	}</div><div class='del'>-  </div><div class='del'>-	if (!dev)</div><div class='del'>-		return;  /* we've been downed */</div><div class='del'>-</div><div class='del'>-	/* poll 20 times per second */</div><div class='del'>-	idle(dev);</div><div class='del'>-	ltpc_timer.expires = jiffies + HZ/20;</div><div class='del'>-	</div><div class='del'>-	add_timer(&amp;ltpc_timer);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* DDP to LLAP translation */</div><div class='del'>-</div><div class='del'>-static netdev_tx_t ltpc_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	/* in kernel 1.3.xx, on entry skb-&gt;data points to ddp header,</div><div class='del'>-	 * and skb-&gt;len is the length of the ddp data + ddp header</div><div class='del'>-	 */</div><div class='del'>-	int i;</div><div class='del'>-	struct lt_sendlap cbuf;</div><div class='del'>-	unsigned char *hdr;</div><div class='del'>-</div><div class='del'>-	cbuf.command = LT_SENDLAP;</div><div class='del'>-	cbuf.dnode = skb-&gt;data[0];</div><div class='del'>-	cbuf.laptype = skb-&gt;data[2];</div><div class='del'>-	skb_pull(skb,3);	/* skip past LLAP header */</div><div class='del'>-	cbuf.length = skb-&gt;len;	/* this is host order */</div><div class='del'>-	skb_reset_transport_header(skb);</div><div class='del'>-</div><div class='del'>-	if(debug &amp; DEBUG_UPPER) {</div><div class='del'>-		printk("command ");</div><div class='del'>-		for(i=0;i&lt;6;i++)</div><div class='del'>-			printk("%02x ",((unsigned char *)&amp;cbuf)[i]);</div><div class='del'>-		printk("\n");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	hdr = skb_transport_header(skb);</div><div class='del'>-	do_write(dev, &amp;cbuf, sizeof(cbuf), hdr, skb-&gt;len);</div><div class='del'>-</div><div class='del'>-	if(debug &amp; DEBUG_UPPER) {</div><div class='del'>-		printk("sent %d ddp bytes\n",skb-&gt;len);</div><div class='del'>-		for (i = 0; i &lt; skb-&gt;len; i++)</div><div class='del'>-			printk("%02x ", hdr[i]);</div><div class='del'>-		printk("\n");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev-&gt;stats.tx_packets++;</div><div class='del'>-	dev-&gt;stats.tx_bytes += skb-&gt;len;</div><div class='del'>-</div><div class='del'>-	dev_kfree_skb(skb);</div><div class='del'>-	return NETDEV_TX_OK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* initialization stuff */</div><div class='del'>-  </div><div class='del'>-static int __init ltpc_probe_dma(int base, int dma)</div><div class='del'>-{</div><div class='del'>-	int want = (dma == 3) ? 2 : (dma == 1) ? 1 : 3;</div><div class='del'>-  	unsigned long timeout;</div><div class='del'>-  	unsigned long f;</div><div class='del'>-  </div><div class='del'>-  	if (want &amp; 1) {</div><div class='del'>-		if (request_dma(1,"ltpc")) {</div><div class='del'>-			want &amp;= ~1;</div><div class='del'>-		} else {</div><div class='del'>-			f=claim_dma_lock();</div><div class='del'>-			disable_dma(1);</div><div class='del'>-			clear_dma_ff(1);</div><div class='del'>-			set_dma_mode(1,DMA_MODE_WRITE);</div><div class='del'>-			set_dma_addr(1,virt_to_bus(ltdmabuf));</div><div class='del'>-			set_dma_count(1,sizeof(struct lt_mem));</div><div class='del'>-			enable_dma(1);</div><div class='del'>-			release_dma_lock(f);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	if (want &amp; 2) {</div><div class='del'>-		if (request_dma(3,"ltpc")) {</div><div class='del'>-			want &amp;= ~2;</div><div class='del'>-		} else {</div><div class='del'>-			f=claim_dma_lock();</div><div class='del'>-			disable_dma(3);</div><div class='del'>-			clear_dma_ff(3);</div><div class='del'>-			set_dma_mode(3,DMA_MODE_WRITE);</div><div class='del'>-			set_dma_addr(3,virt_to_bus(ltdmabuf));</div><div class='del'>-			set_dma_count(3,sizeof(struct lt_mem));</div><div class='del'>-			enable_dma(3);</div><div class='del'>-			release_dma_lock(f);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	/* set up request */</div><div class='del'>-</div><div class='del'>-	/* FIXME -- do timings better! */</div><div class='del'>-</div><div class='del'>-	ltdmabuf[0] = LT_READMEM;</div><div class='del'>-	ltdmabuf[1] = 1;  /* mailbox */</div><div class='del'>-	ltdmabuf[2] = 0; ltdmabuf[3] = 0;  /* address */</div><div class='del'>-	ltdmabuf[4] = 0; ltdmabuf[5] = 1;  /* read 0x0100 bytes */</div><div class='del'>-	ltdmabuf[6] = 0; /* dunno if this is necessary */</div><div class='del'>-</div><div class='del'>-	inb_p(io+1);</div><div class='del'>-	inb_p(io+0);</div><div class='del'>-	timeout = jiffies+100*HZ/100;</div><div class='del'>-	while(time_before(jiffies, timeout)) {</div><div class='del'>-		if ( 0xfa == inb_p(io+6) ) break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	inb_p(io+3);</div><div class='del'>-	inb_p(io+2);</div><div class='del'>-	while(time_before(jiffies, timeout)) {</div><div class='del'>-		if ( 0xfb == inb_p(io+6) ) break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* release the other dma channel (if we opened both of them) */</div><div class='del'>-</div><div class='del'>-	if ((want &amp; 2) &amp;&amp; (get_dma_residue(3)==sizeof(struct lt_mem))) {</div><div class='del'>-		want &amp;= ~2;</div><div class='del'>-		free_dma(3);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if ((want &amp; 1) &amp;&amp; (get_dma_residue(1)==sizeof(struct lt_mem))) {</div><div class='del'>-		want &amp;= ~1;</div><div class='del'>-		free_dma(1);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!want)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	return (want &amp; 2) ? 3 : 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct net_device_ops ltpc_netdev = {</div><div class='del'>-	.ndo_start_xmit		= ltpc_xmit,</div><div class='del'>-	.ndo_do_ioctl		= ltpc_ioctl,</div><div class='del'>-	.ndo_set_rx_mode	= set_multicast_list,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct net_device * __init ltpc_probe(void)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev;</div><div class='del'>-	int err = -ENOMEM;</div><div class='del'>-	int x=0,y=0;</div><div class='del'>-	int autoirq;</div><div class='del'>-	unsigned long f;</div><div class='del'>-	unsigned long timeout;</div><div class='del'>-</div><div class='del'>-	dev = alloc_ltalkdev(sizeof(struct ltpc_private));</div><div class='del'>-	if (!dev)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	/* probe for the I/O port address */</div><div class='del'>-	</div><div class='del'>-	if (io != 0x240 &amp;&amp; request_region(0x220,8,"ltpc")) {</div><div class='del'>-		x = inb_p(0x220+6);</div><div class='del'>-		if ( (x!=0xff) &amp;&amp; (x&gt;=0xf0) ) {</div><div class='del'>-			io = 0x220;</div><div class='del'>-			goto got_port;</div><div class='del'>-		}</div><div class='del'>-		release_region(0x220,8);</div><div class='del'>-	}</div><div class='del'>-	if (io != 0x220 &amp;&amp; request_region(0x240,8,"ltpc")) {</div><div class='del'>-		y = inb_p(0x240+6);</div><div class='del'>-		if ( (y!=0xff) &amp;&amp; (y&gt;=0xf0) ){ </div><div class='del'>-			io = 0x240;</div><div class='del'>-			goto got_port;</div><div class='del'>-		}</div><div class='del'>-		release_region(0x240,8);</div><div class='del'>-	} </div><div class='del'>-</div><div class='del'>-	/* give up in despair */</div><div class='del'>-	printk(KERN_ERR "LocalTalk card not found; 220 = %02x, 240 = %02x.\n", x,y);</div><div class='del'>-	err = -ENODEV;</div><div class='del'>-	goto out1;</div><div class='del'>-</div><div class='del'>- got_port:</div><div class='del'>-	/* probe for the IRQ line */</div><div class='del'>-	if (irq &lt; 2) {</div><div class='del'>-		unsigned long irq_mask;</div><div class='del'>-</div><div class='del'>-		irq_mask = probe_irq_on();</div><div class='del'>-		/* reset the interrupt line */</div><div class='del'>-		inb_p(io+7);</div><div class='del'>-		inb_p(io+7);</div><div class='del'>-		/* trigger an interrupt (I hope) */</div><div class='del'>-		inb_p(io+6);</div><div class='del'>-		mdelay(2);</div><div class='del'>-		autoirq = probe_irq_off(irq_mask);</div><div class='del'>-</div><div class='del'>-		if (autoirq == 0) {</div><div class='del'>-			printk(KERN_ERR "ltpc: probe at %#x failed to detect IRQ line.\n", io);</div><div class='del'>-		} else {</div><div class='del'>-			irq = autoirq;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* allocate a DMA buffer */</div><div class='del'>-	ltdmabuf = (unsigned char *) dma_mem_alloc(1000);</div><div class='del'>-	if (!ltdmabuf) {</div><div class='del'>-		printk(KERN_ERR "ltpc: mem alloc failed\n");</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto out2;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ltdmacbuf = &amp;ltdmabuf[800];</div><div class='del'>-</div><div class='del'>-	if(debug &amp; DEBUG_VERBOSE) {</div><div class='del'>-		printk("ltdmabuf pointer %08lx\n",(unsigned long) ltdmabuf);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* reset the card */</div><div class='del'>-</div><div class='del'>-	inb_p(io+1);</div><div class='del'>-	inb_p(io+3);</div><div class='del'>-</div><div class='del'>-	msleep(20);</div><div class='del'>-</div><div class='del'>-	inb_p(io+0);</div><div class='del'>-	inb_p(io+2);</div><div class='del'>-	inb_p(io+7); /* clear reset */</div><div class='del'>-	inb_p(io+4); </div><div class='del'>-	inb_p(io+5);</div><div class='del'>-	inb_p(io+5); /* enable dma */</div><div class='del'>-	inb_p(io+6); /* tri-state interrupt line */</div><div class='del'>-</div><div class='del'>-	ssleep(1);</div><div class='del'>-	</div><div class='del'>-	/* now, figure out which dma channel we're using, unless it's</div><div class='del'>-	   already been specified */</div><div class='del'>-	/* well, 0 is a legal DMA channel, but the LTPC card doesn't</div><div class='del'>-	   use it... */</div><div class='del'>-	dma = ltpc_probe_dma(io, dma);</div><div class='del'>-	if (!dma) {  /* no dma channel */</div><div class='del'>-		printk(KERN_ERR "No DMA channel found on ltpc card.\n");</div><div class='del'>-		err = -ENODEV;</div><div class='del'>-		goto out3;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* print out friendly message */</div><div class='del'>-	if(irq)</div><div class='del'>-		printk(KERN_INFO "Apple/Farallon LocalTalk-PC card at %03x, IR%d, DMA%d.\n",io,irq,dma);</div><div class='del'>-	else</div><div class='del'>-		printk(KERN_INFO "Apple/Farallon LocalTalk-PC card at %03x, DMA%d.  Using polled mode.\n",io,dma);</div><div class='del'>-</div><div class='del'>-	dev-&gt;netdev_ops = &amp;ltpc_netdev;</div><div class='del'>-	dev-&gt;base_addr = io;</div><div class='del'>-	dev-&gt;irq = irq;</div><div class='del'>-	dev-&gt;dma = dma;</div><div class='del'>-</div><div class='del'>-	/* the card will want to send a result at this point */</div><div class='del'>-	/* (I think... leaving out this part makes the kernel crash,</div><div class='del'>-           so I put it back in...) */</div><div class='del'>-</div><div class='del'>-	f=claim_dma_lock();</div><div class='del'>-	disable_dma(dma);</div><div class='del'>-	clear_dma_ff(dma);</div><div class='del'>-	set_dma_mode(dma,DMA_MODE_READ);</div><div class='del'>-	set_dma_addr(dma,virt_to_bus(ltdmabuf));</div><div class='del'>-	set_dma_count(dma,0x100);</div><div class='del'>-	enable_dma(dma);</div><div class='del'>-	release_dma_lock(f);</div><div class='del'>-</div><div class='del'>-	(void) inb_p(io+3);</div><div class='del'>-	(void) inb_p(io+2);</div><div class='del'>-	timeout = jiffies+100*HZ/100;</div><div class='del'>-</div><div class='del'>-	while(time_before(jiffies, timeout)) {</div><div class='del'>-		if( 0xf9 == inb_p(io+6))</div><div class='del'>-			break;</div><div class='del'>-		schedule();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if(debug &amp; DEBUG_VERBOSE) {</div><div class='del'>-		printk("setting up timer and irq\n");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* grab it and don't let go :-) */</div><div class='del'>-	if (irq &amp;&amp; request_irq( irq, ltpc_interrupt, 0, "ltpc", dev) &gt;= 0)</div><div class='del'>-	{</div><div class='del'>-		(void) inb_p(io+7);  /* enable interrupts from board */</div><div class='del'>-		(void) inb_p(io+7);  /* and reset irq line */</div><div class='del'>-	} else {</div><div class='del'>-		if( irq )</div><div class='del'>-			printk(KERN_ERR "ltpc: IRQ already in use, using polled mode.\n");</div><div class='del'>-		dev-&gt;irq = 0;</div><div class='del'>-		/* polled mode -- 20 times per second */</div><div class='del'>-		/* this is really, really slow... should it poll more often? */</div><div class='del'>-		init_timer(&amp;ltpc_timer);</div><div class='del'>-		ltpc_timer.function=ltpc_poll;</div><div class='del'>-		ltpc_timer.data = (unsigned long) dev;</div><div class='del'>-</div><div class='del'>-		ltpc_timer.expires = jiffies + HZ/20;</div><div class='del'>-		add_timer(&amp;ltpc_timer);</div><div class='del'>-	}</div><div class='del'>-	err = register_netdev(dev);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out4;</div><div class='del'>-</div><div class='del'>-	return NULL;</div><div class='del'>-out4:</div><div class='del'>-	del_timer_sync(&amp;ltpc_timer);</div><div class='del'>-	if (dev-&gt;irq)</div><div class='del'>-		free_irq(dev-&gt;irq, dev);</div><div class='del'>-out3:</div><div class='del'>-	free_pages((unsigned long)ltdmabuf, get_order(1000));</div><div class='del'>-out2:</div><div class='del'>-	release_region(io, 8);</div><div class='del'>-out1:</div><div class='del'>-	free_netdev(dev);</div><div class='del'>-out:</div><div class='del'>-	return ERR_PTR(err);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifndef MODULE</div><div class='del'>-/* handles "ltpc=io,irq,dma" kernel command lines */</div><div class='del'>-static int __init ltpc_setup(char *str)</div><div class='del'>-{</div><div class='del'>-	int ints[5];</div><div class='del'>-</div><div class='del'>-	str = get_options(str, ARRAY_SIZE(ints), ints);</div><div class='del'>-</div><div class='del'>-	if (ints[0] == 0) {</div><div class='del'>-		if (str &amp;&amp; !strncmp(str, "auto", 4)) {</div><div class='del'>-			/* do nothing :-) */</div><div class='del'>-		}</div><div class='del'>-		else {</div><div class='del'>-			/* usage message */</div><div class='del'>-			printk (KERN_ERR</div><div class='del'>-				"ltpc: usage: ltpc=auto|iobase[,irq[,dma]]\n");</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		io = ints[1];</div><div class='del'>-		if (ints[0] &gt; 1) {</div><div class='del'>-			irq = ints[2];</div><div class='del'>-		}</div><div class='del'>-		if (ints[0] &gt; 2) {</div><div class='del'>-			dma = ints[3];</div><div class='del'>-		}</div><div class='del'>-		/* ignore any other parameters */</div><div class='del'>-	}</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__setup("ltpc=", ltpc_setup);</div><div class='del'>-#endif /* MODULE */</div><div class='del'>-</div><div class='del'>-static struct net_device *dev_ltpc;</div><div class='del'>-</div><div class='del'>-#ifdef MODULE</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-module_param(debug, int, 0);</div><div class='del'>-module_param(io, int, 0);</div><div class='del'>-module_param(irq, int, 0);</div><div class='del'>-module_param(dma, int, 0);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int __init ltpc_module_init(void)</div><div class='del'>-{</div><div class='del'>-        if(io == 0)</div><div class='del'>-		printk(KERN_NOTICE</div><div class='del'>-		       "ltpc: Autoprobing is not recommended for modules\n");</div><div class='del'>-</div><div class='del'>-	dev_ltpc = ltpc_probe();</div><div class='del'>-	return PTR_ERR_OR_ZERO(dev_ltpc);</div><div class='del'>-}</div><div class='del'>-module_init(ltpc_module_init);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static void __exit ltpc_cleanup(void)</div><div class='del'>-{</div><div class='del'>-</div><div class='del'>-	if(debug &amp; DEBUG_VERBOSE) printk("unregister_netdev\n");</div><div class='del'>-	unregister_netdev(dev_ltpc);</div><div class='del'>-</div><div class='del'>-	ltpc_timer.data = 0;  /* signal the poll routine that we're done */</div><div class='del'>-</div><div class='del'>-	del_timer_sync(&amp;ltpc_timer);</div><div class='del'>-</div><div class='del'>-	if(debug &amp; DEBUG_VERBOSE) printk("freeing irq\n");</div><div class='del'>-</div><div class='del'>-	if (dev_ltpc-&gt;irq)</div><div class='del'>-		free_irq(dev_ltpc-&gt;irq, dev_ltpc);</div><div class='del'>-</div><div class='del'>-	if(debug &amp; DEBUG_VERBOSE) printk("freeing dma\n");</div><div class='del'>-</div><div class='del'>-	if (dev_ltpc-&gt;dma)</div><div class='del'>-		free_dma(dev_ltpc-&gt;dma);</div><div class='del'>-</div><div class='del'>-	if(debug &amp; DEBUG_VERBOSE) printk("freeing ioaddr\n");</div><div class='del'>-</div><div class='del'>-	if (dev_ltpc-&gt;base_addr)</div><div class='del'>-		release_region(dev_ltpc-&gt;base_addr,8);</div><div class='del'>-</div><div class='del'>-	free_netdev(dev_ltpc);</div><div class='del'>-</div><div class='del'>-	if(debug &amp; DEBUG_VERBOSE) printk("free_pages\n");</div><div class='del'>-</div><div class='del'>-	free_pages( (unsigned long) ltdmabuf, get_order(1000));</div><div class='del'>-</div><div class='del'>-	if(debug &amp; DEBUG_VERBOSE) printk("returning from cleanup_module\n");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_exit(ltpc_cleanup);</div><div class='head'>diff --git a/drivers/net/appletalk/ltpc.h b/drivers/net/appletalk/ltpc.h<br/>deleted file mode 100644<br/>index cd30544a3729..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/appletalk/ltpc.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/appletalk/ltpc.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,73 +0,0 @@</div><div class='del'>-/***   ltpc.h</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- ***/</div><div class='del'>-</div><div class='del'>-#define LT_GETRESULT  0x00</div><div class='del'>-#define LT_WRITEMEM   0x01</div><div class='del'>-#define LT_READMEM    0x02</div><div class='del'>-#define LT_GETFLAGS   0x04</div><div class='del'>-#define LT_SETFLAGS   0x05</div><div class='del'>-#define LT_INIT       0x10</div><div class='del'>-#define LT_SENDLAP    0x13</div><div class='del'>-#define LT_RCVLAP     0x14</div><div class='del'>-</div><div class='del'>-/* the flag that we care about */</div><div class='del'>-#define LT_FLAG_ALLLAP 0x04</div><div class='del'>-</div><div class='del'>-struct lt_getresult {</div><div class='del'>-	unsigned char command;</div><div class='del'>-	unsigned char mailbox;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct lt_mem {</div><div class='del'>-	unsigned char command;</div><div class='del'>-	unsigned char mailbox;</div><div class='del'>-	unsigned short addr;	/* host order */</div><div class='del'>-	unsigned short length;	/* host order */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct lt_setflags {</div><div class='del'>-	unsigned char command;</div><div class='del'>-	unsigned char mailbox;</div><div class='del'>-	unsigned char flags;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct lt_getflags {</div><div class='del'>-	unsigned char command;</div><div class='del'>-	unsigned char mailbox;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct lt_init {</div><div class='del'>-	unsigned char command;</div><div class='del'>-	unsigned char mailbox;</div><div class='del'>-	unsigned char hint;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct lt_sendlap {</div><div class='del'>-	unsigned char command;</div><div class='del'>-	unsigned char mailbox;</div><div class='del'>-	unsigned char dnode;</div><div class='del'>-	unsigned char laptype;</div><div class='del'>-	unsigned short length;	/* host order */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct lt_rcvlap {</div><div class='del'>-	unsigned char command;</div><div class='del'>-	unsigned char dnode;</div><div class='del'>-	unsigned char snode;</div><div class='del'>-	unsigned char laptype;</div><div class='del'>-	unsigned short length;	/* host order */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-union lt_command {</div><div class='del'>-	struct lt_getresult getresult;</div><div class='del'>-	struct lt_mem mem;</div><div class='del'>-	struct lt_setflags setflags;</div><div class='del'>-	struct lt_getflags getflags;</div><div class='del'>-	struct lt_init init;</div><div class='del'>-	struct lt_sendlap sendlap;</div><div class='del'>-	struct lt_rcvlap rcvlap;</div><div class='del'>-};</div><div class='del'>-typedef union lt_command lt_command;</div><div class='del'>-</div><div class='head'>diff --git a/drivers/net/arcnet/Kconfig b/drivers/net/arcnet/Kconfig<br/>index 2a9c3c3abe9b..d1d07a1d4fbc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/arcnet/Kconfig?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/arcnet/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/arcnet/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/arcnet/Kconfig</a></div><div class='hunk'>@@ -1,14 +1,15 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> #</div><div class='ctx'> # Arcnet configuration</div><div class='ctx'> #</div><div class='ctx'> </div><div class='ctx'> menuconfig ARCNET</div><div class='del'>-	depends on NETDEVICES &amp;&amp; (ISA || PCI || PCMCIA)</div><div class='add'>+	depends on NETDEVICES &amp;&amp; (ISA || PCI || PCMCIA) &amp;&amp; HAS_IOPORT</div><div class='ctx'> 	tristate "ARCnet support"</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  If you have a network card of this type, say Y and check out the</div><div class='ctx'> 	  (arguably) beautiful poetry in</div><div class='del'>-	  &lt;file:Documentation/networking/arcnet.txt&gt;.</div><div class='add'>+	  &lt;file:Documentation/networking/arcnet.rst&gt;.</div><div class='ctx'> </div><div class='ctx'> 	  You need both this driver, and the driver for the particular ARCnet</div><div class='ctx'> 	  chipset of your card. If you don't know, then it's probably a</div><div class='hunk'>@@ -27,12 +28,12 @@ config ARCNET_1201</div><div class='ctx'> 	  arc0 device.  You need to say Y here to communicate with</div><div class='ctx'> 	  industry-standard RFC1201 implementations, like the arcether.com</div><div class='ctx'> 	  packet driver or most DOS/Windows ODI drivers.  Please read the</div><div class='del'>-	  ARCnet documentation in &lt;file:Documentation/networking/arcnet.txt&gt;</div><div class='add'>+	  ARCnet documentation in &lt;file:Documentation/networking/arcnet.rst&gt;</div><div class='ctx'> 	  for more information about using arc0.</div><div class='ctx'> </div><div class='ctx'> config ARCNET_1051</div><div class='ctx'> 	tristate "Enable old ARCNet packet format (RFC 1051)"</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  This allows you to use RFC1051 with your ARCnet card via the virtual</div><div class='ctx'> 	  arc0s device. You only need arc0s if you want to talk to ARCnet</div><div class='ctx'> 	  software complying with the "old" standard, specifically, the DOS</div><div class='hunk'>@@ -41,7 +42,7 @@ config ARCNET_1051</div><div class='ctx'> 	  industry-standard RFC1201 implementations, like the arcether.com</div><div class='ctx'> 	  packet driver or most DOS/Windows ODI drivers. RFC1201 is included</div><div class='ctx'> 	  automatically as the arc0 device. Please read the ARCnet</div><div class='del'>-	  documentation in &lt;file:Documentation/networking/arcnet.txt&gt; for more</div><div class='add'>+	  documentation in &lt;file:Documentation/networking/arcnet.rst&gt; for more</div><div class='ctx'> 	  information about using arc0e and arc0s.</div><div class='ctx'> </div><div class='ctx'> config ARCNET_RAW</div><div class='hunk'>@@ -55,19 +56,19 @@ config ARCNET_CAP</div><div class='ctx'> 	tristate "Enable CAP mode packet interface"</div><div class='ctx'> 	help</div><div class='ctx'> 	  ARCnet "cap mode" packet encapsulation. Used to get the hardware</div><div class='del'>-          acknowledge back to userspace. After the initial protocol byte every</div><div class='del'>-          packet is stuffed with an extra 4 byte "cookie" which doesn't</div><div class='del'>-          actually appear on the network. After transmit the driver will send</div><div class='del'>-          back a packet with protocol byte 0 containing the status of the</div><div class='del'>-          transmission:</div><div class='del'>-             0=no hardware acknowledge</div><div class='del'>-             1=excessive nak</div><div class='del'>-             2=transmission accepted by the receiver hardware</div><div class='add'>+	  acknowledge back to userspace. After the initial protocol byte every</div><div class='add'>+	  packet is stuffed with an extra 4 byte "cookie" which doesn't</div><div class='add'>+	  actually appear on the network. After transmit the driver will send</div><div class='add'>+	  back a packet with protocol byte 0 containing the status of the</div><div class='add'>+	  transmission:</div><div class='add'>+	     0=no hardware acknowledge</div><div class='add'>+	     1=excessive nak</div><div class='add'>+	     2=transmission accepted by the receiver hardware</div><div class='ctx'> </div><div class='del'>-          Received packets are also stuffed with the extra 4 bytes but it will</div><div class='del'>-          be random data.</div><div class='add'>+	  Received packets are also stuffed with the extra 4 bytes but it will</div><div class='add'>+	  be random data.</div><div class='ctx'> </div><div class='del'>-          Cap only listens to protocol 1-8.</div><div class='add'>+	  Cap only listens to protocol 1-8.</div><div class='ctx'> </div><div class='ctx'> config ARCNET_COM90xx</div><div class='ctx'> 	tristate "ARCnet COM90xx (normal) chipset driver"</div><div class='hunk'>@@ -81,7 +82,7 @@ config ARCNET_COM90xx</div><div class='ctx'> </div><div class='ctx'> config ARCNET_COM90xxIO</div><div class='ctx'> 	tristate "ARCnet COM90xx (IO mapped) chipset driver"</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  This is the chipset driver for the COM90xx cards, using them in</div><div class='ctx'> 	  IO-mapped mode instead of memory-mapped mode. This is slower than</div><div class='ctx'> 	  the normal driver. Only use it if your card doesn't support shared</div><div class='hunk'>@@ -92,7 +93,7 @@ config ARCNET_COM90xxIO</div><div class='ctx'> </div><div class='ctx'> config ARCNET_RIM_I</div><div class='ctx'> 	tristate "ARCnet COM90xx (RIM I) chipset driver"</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  This is yet another chipset driver for the COM90xx cards, but this</div><div class='ctx'> 	  time only using memory-mapped mode, and no IO ports at all. This</div><div class='ctx'> 	  driver is completely untested, so if you have one of these cards,</div><div class='hunk'>@@ -103,6 +104,7 @@ config ARCNET_RIM_I</div><div class='ctx'> </div><div class='ctx'> config ARCNET_COM20020</div><div class='ctx'> 	tristate "ARCnet COM20020 chipset driver"</div><div class='add'>+	depends on LEDS_CLASS</div><div class='ctx'> 	help</div><div class='ctx'> 	  This is the driver for the new COM20020 chipset. It supports such</div><div class='ctx'> 	  things as promiscuous mode, so packet sniffing is possible, and</div><div class='head'>diff --git a/drivers/net/arcnet/Makefile b/drivers/net/arcnet/Makefile<br/>index 5ce8ee63e435..53525e8ea130 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/arcnet/Makefile?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/arcnet/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/arcnet/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/arcnet/Makefile</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> # Makefile for linux/drivers/net/arcnet</div><div class='ctx'> #</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/arcnet/arc-rawmode.c b/drivers/net/arcnet/arc-rawmode.c<br/>index 705e6ce2eb90..57f1729066f2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/arcnet/arc-rawmode.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/arcnet/arc-rawmode.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/arcnet/arc-rawmode.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/arcnet/arc-rawmode.c</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Linux ARCnet driver - "raw mode" packet encapsulation (no soft headers)</div><div class='del'>- * </div><div class='add'>+ *</div><div class='ctx'>  * Written 1994-1999 by Avery Pennarun.</div><div class='ctx'>  * Derived from skeleton.c by Donald Becker.</div><div class='ctx'>  *</div><div class='hunk'>@@ -24,6 +24,8 @@</div><div class='ctx'>  * **********************</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#define pr_fmt(fmt) "arcnet:" KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/gfp.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='hunk'>@@ -31,58 +33,7 @@</div><div class='ctx'> #include &lt;net/arp.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/skbuff.h&gt;</div><div class='del'>-#include &lt;linux/arcdevice.h&gt;</div><div class='del'>-</div><div class='del'>-#define VERSION "arcnet: raw mode (`r') encapsulation support loaded.\n"</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static void rx(struct net_device *dev, int bufnum,</div><div class='del'>-	       struct archdr *pkthdr, int length);</div><div class='del'>-static int build_header(struct sk_buff *skb, struct net_device *dev,</div><div class='del'>-			unsigned short type, uint8_t daddr);</div><div class='del'>-static int prepare_tx(struct net_device *dev, struct archdr *pkt, int length,</div><div class='del'>-		      int bufnum);</div><div class='del'>-</div><div class='del'>-static struct ArcProto rawmode_proto =</div><div class='del'>-{</div><div class='del'>-	.suffix		= 'r',</div><div class='del'>-	.mtu		= XMTU,</div><div class='del'>-	.rx		= rx,</div><div class='del'>-	.build_header	= build_header,</div><div class='del'>-	.prepare_tx	= prepare_tx,</div><div class='del'>-	.continue_tx    = NULL,</div><div class='del'>-	.ack_tx         = NULL</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int __init arcnet_raw_init(void)</div><div class='del'>-{</div><div class='del'>-	int count;</div><div class='del'>-</div><div class='del'>-	printk(VERSION);</div><div class='del'>-</div><div class='del'>-	for (count = 0; count &lt; 256; count++)</div><div class='del'>-		if (arc_proto_map[count] == arc_proto_default)</div><div class='del'>-			arc_proto_map[count] = &amp;rawmode_proto;</div><div class='del'>-</div><div class='del'>-	/* for raw mode, we only set the bcast proto if there's no better one */</div><div class='del'>-	if (arc_bcast_proto == arc_proto_default)</div><div class='del'>-		arc_bcast_proto = &amp;rawmode_proto;</div><div class='del'>-</div><div class='del'>-	arc_proto_default = &amp;rawmode_proto;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit arcnet_raw_exit(void)</div><div class='del'>-{</div><div class='del'>-	arcnet_unregister_proto(&amp;rawmode_proto);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(arcnet_raw_init);</div><div class='del'>-module_exit(arcnet_raw_exit);</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-</div><div class='add'>+#include "arcdevice.h"</div><div class='ctx'> </div><div class='ctx'> /* packet receiver */</div><div class='ctx'> static void rx(struct net_device *dev, int bufnum,</div><div class='hunk'>@@ -93,7 +44,7 @@ static void rx(struct net_device *dev, int bufnum,</div><div class='ctx'> 	struct archdr *pkt = pkthdr;</div><div class='ctx'> 	int ofs;</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_DURING, "it's a raw packet (length=%d)\n", length);</div><div class='add'>+	arc_printk(D_DURING, dev, "it's a raw packet (length=%d)\n", length);</div><div class='ctx'> </div><div class='ctx'> 	if (length &gt; MTU)</div><div class='ctx'> 		ofs = 512 - length;</div><div class='hunk'>@@ -101,15 +52,14 @@ static void rx(struct net_device *dev, int bufnum,</div><div class='ctx'> 		ofs = 256 - length;</div><div class='ctx'> </div><div class='ctx'> 	skb = alloc_skb(length + ARC_HDR_SIZE, GFP_ATOMIC);</div><div class='del'>-	if (skb == NULL) {</div><div class='del'>-		BUGMSG(D_NORMAL, "Memory squeeze, dropping packet.\n");</div><div class='add'>+	if (!skb) {</div><div class='ctx'> 		dev-&gt;stats.rx_dropped++;</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	skb_put(skb, length + ARC_HDR_SIZE);</div><div class='ctx'> 	skb-&gt;dev = dev;</div><div class='ctx'> </div><div class='del'>-	pkt = (struct archdr *) skb-&gt;data;</div><div class='add'>+	pkt = (struct archdr *)skb-&gt;data;</div><div class='ctx'> </div><div class='ctx'> 	skb_reset_mac_header(skb);</div><div class='ctx'> 	skb_pull(skb, ARC_HDR_SIZE);</div><div class='hunk'>@@ -121,38 +71,35 @@ static void rx(struct net_device *dev, int bufnum,</div><div class='ctx'> 				      pkt-&gt;soft.raw + sizeof(pkt-&gt;soft),</div><div class='ctx'> 				      length - sizeof(pkt-&gt;soft));</div><div class='ctx'> </div><div class='del'>-	BUGLVL(D_SKB) arcnet_dump_skb(dev, skb, "rx");</div><div class='add'>+	if (BUGLVL(D_SKB))</div><div class='add'>+		arcnet_dump_skb(dev, skb, "rx");</div><div class='ctx'> </div><div class='ctx'> 	skb-&gt;protocol = cpu_to_be16(ETH_P_ARCNET);</div><div class='ctx'> 	netif_rx(skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Create the ARCnet hard/soft headers for raw mode.</div><div class='add'>+/* Create the ARCnet hard/soft headers for raw mode.</div><div class='ctx'>  * There aren't any soft headers in raw mode - not even the protocol id.</div><div class='ctx'>  */</div><div class='ctx'> static int build_header(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> 			unsigned short type, uint8_t daddr)</div><div class='ctx'> {</div><div class='ctx'> 	int hdr_size = ARC_HDR_SIZE;</div><div class='del'>-	struct archdr *pkt = (struct archdr *) skb_push(skb, hdr_size);</div><div class='add'>+	struct archdr *pkt = skb_push(skb, hdr_size);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Set the source hardware address.</div><div class='add'>+	/* Set the source hardware address.</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * This is pretty pointless for most purposes, but it can help in</div><div class='del'>-	 * debugging.  ARCnet does not allow us to change the source address in</div><div class='del'>-	 * the actual packet sent)</div><div class='add'>+	 * debugging.  ARCnet does not allow us to change the source address</div><div class='add'>+	 * in the actual packet sent.</div><div class='ctx'> 	 */</div><div class='ctx'> 	pkt-&gt;hard.source = *dev-&gt;dev_addr;</div><div class='ctx'> </div><div class='ctx'> 	/* see linux/net/ethernet/eth.c to see where I got the following */</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;flags &amp; (IFF_LOOPBACK | IFF_NOARP)) {</div><div class='del'>-		/* </div><div class='del'>-		 * FIXME: fill in the last byte of the dest ipaddr here to better</div><div class='del'>-		 * comply with RFC1051 in "noarp" mode.</div><div class='add'>+		/* FIXME: fill in the last byte of the dest ipaddr here</div><div class='add'>+		 * to better comply with RFC1051 in "noarp" mode.</div><div class='ctx'> 		 */</div><div class='ctx'> 		pkt-&gt;hard.dest = 0;</div><div class='ctx'> 		return hdr_size;</div><div class='hunk'>@@ -163,7 +110,6 @@ static int build_header(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> 	return hdr_size;	/* success */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> static int prepare_tx(struct net_device *dev, struct archdr *pkt, int length,</div><div class='ctx'> 		      int bufnum)</div><div class='ctx'> {</div><div class='hunk'>@@ -171,15 +117,16 @@ static int prepare_tx(struct net_device *dev, struct archdr *pkt, int length,</div><div class='ctx'> 	struct arc_hardware *hard = &amp;pkt-&gt;hard;</div><div class='ctx'> 	int ofs;</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_DURING, "prepare_tx: txbufs=%d/%d/%d\n",</div><div class='del'>-	       lp-&gt;next_tx, lp-&gt;cur_tx, bufnum);</div><div class='add'>+	arc_printk(D_DURING, dev, "prepare_tx: txbufs=%d/%d/%d\n",</div><div class='add'>+		   lp-&gt;next_tx, lp-&gt;cur_tx, bufnum);</div><div class='ctx'> </div><div class='del'>-	length -= ARC_HDR_SIZE;	/* hard header is not included in packet length */</div><div class='add'>+	/* hard header is not included in packet length */</div><div class='add'>+	length -= ARC_HDR_SIZE;</div><div class='ctx'> </div><div class='ctx'> 	if (length &gt; XMTU) {</div><div class='ctx'> 		/* should never happen! other people already check for this. */</div><div class='del'>-		BUGMSG(D_NORMAL, "Bug!  prepare_tx with size %d (&gt; %d)\n",</div><div class='del'>-		       length, XMTU);</div><div class='add'>+		arc_printk(D_NORMAL, dev, "Bug!  prepare_tx with size %d (&gt; %d)\n",</div><div class='add'>+			   length, XMTU);</div><div class='ctx'> 		length = XMTU;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (length &gt;= MinTU) {</div><div class='hunk'>@@ -188,11 +135,12 @@ static int prepare_tx(struct net_device *dev, struct archdr *pkt, int length,</div><div class='ctx'> 	} else if (length &gt; MTU) {</div><div class='ctx'> 		hard-&gt;offset[0] = 0;</div><div class='ctx'> 		hard-&gt;offset[1] = ofs = 512 - length - 3;</div><div class='del'>-	} else</div><div class='add'>+	} else {</div><div class='ctx'> 		hard-&gt;offset[0] = ofs = 256 - length;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_DURING, "prepare_tx: length=%d ofs=%d\n",</div><div class='del'>-	       length,ofs);</div><div class='add'>+	arc_printk(D_DURING, dev, "prepare_tx: length=%d ofs=%d\n",</div><div class='add'>+		   length, ofs);</div><div class='ctx'> </div><div class='ctx'> 	lp-&gt;hw.copy_to_card(dev, bufnum, 0, hard, ARC_HDR_SIZE);</div><div class='ctx'> 	lp-&gt;hw.copy_to_card(dev, bufnum, ofs, &amp;pkt-&gt;soft, length);</div><div class='hunk'>@@ -201,3 +149,42 @@ static int prepare_tx(struct net_device *dev, struct archdr *pkt, int length,</div><div class='ctx'> </div><div class='ctx'> 	return 1;		/* done */</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static struct ArcProto rawmode_proto = {</div><div class='add'>+	.suffix		= 'r',</div><div class='add'>+	.mtu		= XMTU,</div><div class='add'>+	.rx		= rx,</div><div class='add'>+	.build_header	= build_header,</div><div class='add'>+	.prepare_tx	= prepare_tx,</div><div class='add'>+	.continue_tx    = NULL,</div><div class='add'>+	.ack_tx         = NULL</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init arcnet_raw_init(void)</div><div class='add'>+{</div><div class='add'>+	int count;</div><div class='add'>+</div><div class='add'>+	pr_info("raw mode (`r') encapsulation support loaded\n");</div><div class='add'>+</div><div class='add'>+	for (count = 0; count &lt; 256; count++)</div><div class='add'>+		if (arc_proto_map[count] == arc_proto_default)</div><div class='add'>+			arc_proto_map[count] = &amp;rawmode_proto;</div><div class='add'>+</div><div class='add'>+	/* for raw mode, we only set the bcast proto if there's no better one */</div><div class='add'>+	if (arc_bcast_proto == arc_proto_default)</div><div class='add'>+		arc_bcast_proto = &amp;rawmode_proto;</div><div class='add'>+</div><div class='add'>+	arc_proto_default = &amp;rawmode_proto;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit arcnet_raw_exit(void)</div><div class='add'>+{</div><div class='add'>+	arcnet_unregister_proto(&amp;rawmode_proto);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(arcnet_raw_init);</div><div class='add'>+module_exit(arcnet_raw_exit);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("ARCnet raw mode packet interface module");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/arcnet/arc-rimi.c b/drivers/net/arcnet/arc-rimi.c<br/>index b8b4c7ba884f..53d10a04d1bd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/arcnet/arc-rimi.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/arcnet/arc-rimi.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/arcnet/arc-rimi.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/arcnet/arc-rimi.c</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Linux ARCnet driver - "RIM I" (entirely mem-mapped) cards</div><div class='del'>- * </div><div class='add'>+ *</div><div class='ctx'>  * Written 1994-1999 by Avery Pennarun.</div><div class='ctx'>  * Written 1999-2000 by Martin Mares &lt;mj@ucw.cz&gt;.</div><div class='ctx'>  * Derived from skeleton.c by Donald Becker.</div><div class='hunk'>@@ -24,21 +24,22 @@</div><div class='ctx'>  *</div><div class='ctx'>  * **********************</div><div class='ctx'>  */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) "arcnet:" KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/moduleparam.h&gt;</div><div class='ctx'> #include &lt;linux/ioport.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/bootmem.h&gt;</div><div class='add'>+#include &lt;linux/memblock.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;linux/arcdevice.h&gt;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define VERSION "arcnet: RIM I (entirely mem-mapped) support\n"</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "arcdevice.h"</div><div class='add'>+#include "com9026.h"</div><div class='ctx'> </div><div class='ctx'> /* Internal function declarations */</div><div class='ctx'> </div><div class='hunk'>@@ -50,66 +51,46 @@ static void arcrimi_setmask(struct net_device *dev, int mask);</div><div class='ctx'> static int arcrimi_reset(struct net_device *dev, int really_reset);</div><div class='ctx'> static void arcrimi_copy_to_card(struct net_device *dev, int bufnum, int offset,</div><div class='ctx'> 				 void *buf, int count);</div><div class='del'>-static void arcrimi_copy_from_card(struct net_device *dev, int bufnum, int offset,</div><div class='del'>-				   void *buf, int count);</div><div class='add'>+static void arcrimi_copy_from_card(struct net_device *dev, int bufnum,</div><div class='add'>+				   int offset, void *buf, int count);</div><div class='ctx'> </div><div class='ctx'> /* Handy defines for ARCnet specific stuff */</div><div class='ctx'> </div><div class='ctx'> /* Amount of I/O memory used by the card */</div><div class='del'>-#define BUFFER_SIZE (512)</div><div class='del'>-#define MIRROR_SIZE (BUFFER_SIZE*4)</div><div class='add'>+#define BUFFER_SIZE	(512)</div><div class='add'>+#define MIRROR_SIZE	(BUFFER_SIZE * 4)</div><div class='ctx'> </div><div class='del'>-/* COM 9026 controller chip --&gt; ARCnet register addresses */</div><div class='del'>-#define _INTMASK (ioaddr+0)	/* writable */</div><div class='del'>-#define _STATUS  (ioaddr+0)	/* readable */</div><div class='del'>-#define _COMMAND (ioaddr+1)	/* writable, returns random vals on read (?) */</div><div class='del'>-#define _RESET  (ioaddr+8)	/* software reset (on read) */</div><div class='del'>-#define _MEMDATA  (ioaddr+12)	/* Data port for IO-mapped memory */</div><div class='del'>-#define _ADDR_HI  (ioaddr+15)	/* Control registers for said */</div><div class='del'>-#define _ADDR_LO  (ioaddr+14)</div><div class='del'>-#define _CONFIG  (ioaddr+2)	/* Configuration register */</div><div class='del'>-</div><div class='del'>-#undef ASTATUS</div><div class='del'>-#undef ACOMMAND</div><div class='del'>-#undef AINTMASK</div><div class='del'>-</div><div class='del'>-#define ASTATUS()	readb(_STATUS)</div><div class='del'>-#define ACOMMAND(cmd)	writeb((cmd),_COMMAND)</div><div class='del'>-#define AINTMASK(msk)	writeb((msk),_INTMASK)</div><div class='del'>-#define SETCONF()	writeb(lp-&gt;config,_CONFIG)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * We cannot probe for a RIM I card; one reason is I don't know how to reset</div><div class='add'>+/* We cannot probe for a RIM I card; one reason is I don't know how to reset</div><div class='ctx'>  * them.  In fact, we can't even get their node ID automatically.  So, we</div><div class='ctx'>  * need to be passed a specific shmem address, IRQ, and node ID.</div><div class='ctx'>  */</div><div class='ctx'> static int __init arcrimi_probe(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	BUGLVL(D_NORMAL) printk(VERSION);</div><div class='del'>-	BUGLVL(D_NORMAL) printk("E-mail me if you actually test the RIM I driver, please!\n");</div><div class='del'>-</div><div class='del'>-	BUGLVL(D_NORMAL) printk("Given: node %02Xh, shmem %lXh, irq %d\n",</div><div class='del'>-	       dev-&gt;dev_addr[0], dev-&gt;mem_start, dev-&gt;irq);</div><div class='add'>+	if (BUGLVL(D_NORMAL)) {</div><div class='add'>+		pr_info("%s\n", "RIM I (entirely mem-mapped) support");</div><div class='add'>+		pr_info("E-mail me if you actually test the RIM I driver, please!\n");</div><div class='add'>+		pr_info("Given: node %02Xh, shmem %lXh, irq %d\n",</div><div class='add'>+			dev-&gt;dev_addr[0], dev-&gt;mem_start, dev-&gt;irq);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;mem_start &lt;= 0 || dev-&gt;irq &lt;= 0) {</div><div class='del'>-		BUGLVL(D_NORMAL) printk("No autoprobe for RIM I; you "</div><div class='del'>-		       "must specify the shmem and irq!\n");</div><div class='add'>+		if (BUGLVL(D_NORMAL))</div><div class='add'>+			pr_err("No autoprobe for RIM I; you must specify the shmem and irq!\n");</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (dev-&gt;dev_addr[0] == 0) {</div><div class='del'>-		BUGLVL(D_NORMAL) printk("You need to specify your card's station "</div><div class='del'>-		       "ID!\n");</div><div class='add'>+		if (BUGLVL(D_NORMAL))</div><div class='add'>+			pr_err("You need to specify your card's station ID!\n");</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='del'>-	/*</div><div class='del'>-	 * Grab the memory region at mem_start for MIRROR_SIZE bytes.</div><div class='add'>+	/* Grab the memory region at mem_start for MIRROR_SIZE bytes.</div><div class='ctx'> 	 * Later in arcrimi_found() the real size will be determined</div><div class='ctx'> 	 * and this reserve will be released and the correct size</div><div class='ctx'> 	 * will be taken.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!request_mem_region(dev-&gt;mem_start, MIRROR_SIZE, "arcnet (90xx)")) {</div><div class='del'>-		BUGLVL(D_NORMAL) printk("Card memory already allocated\n");</div><div class='add'>+		if (BUGLVL(D_NORMAL))</div><div class='add'>+			pr_notice("Card memory already allocated\n");</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> 	return arcrimi_found(dev);</div><div class='hunk'>@@ -125,7 +106,7 @@ static int check_mirror(unsigned long addr, size_t size)</div><div class='ctx'> </div><div class='ctx'> 	p = ioremap(addr, size);</div><div class='ctx'> 	if (p) {</div><div class='del'>-		if (readb(p) == TESTvalue)</div><div class='add'>+		if (arcnet_readb(p, COM9026_REG_R_STATUS) == TESTvalue)</div><div class='ctx'> 			res = 1;</div><div class='ctx'> 		else</div><div class='ctx'> 			res = 0;</div><div class='hunk'>@@ -136,9 +117,8 @@ static int check_mirror(unsigned long addr, size_t size)</div><div class='ctx'> 	return res;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Set up the struct net_device associated with this card.  Called after</div><div class='del'>- * probing succeeds.</div><div class='add'>+/* Set up the struct net_device associated with this card.</div><div class='add'>+ * Called after probing succeeds.</div><div class='ctx'>  */</div><div class='ctx'> static int __init arcrimi_found(struct net_device *dev)</div><div class='ctx'> {</div><div class='hunk'>@@ -151,7 +131,7 @@ static int __init arcrimi_found(struct net_device *dev)</div><div class='ctx'> 	p = ioremap(dev-&gt;mem_start, MIRROR_SIZE);</div><div class='ctx'> 	if (!p) {</div><div class='ctx'> 		release_mem_region(dev-&gt;mem_start, MIRROR_SIZE);</div><div class='del'>-		BUGMSG(D_NORMAL, "Can't ioremap\n");</div><div class='add'>+		arc_printk(D_NORMAL, dev, "Can't ioremap\n");</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -159,13 +139,14 @@ static int __init arcrimi_found(struct net_device *dev)</div><div class='ctx'> 	if (request_irq(dev-&gt;irq, arcnet_interrupt, 0, "arcnet (RIM I)", dev)) {</div><div class='ctx'> 		iounmap(p);</div><div class='ctx'> 		release_mem_region(dev-&gt;mem_start, MIRROR_SIZE);</div><div class='del'>-		BUGMSG(D_NORMAL, "Can't get IRQ %d!\n", dev-&gt;irq);</div><div class='add'>+		arc_printk(D_NORMAL, dev, "Can't get IRQ %d!\n", dev-&gt;irq);</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	shmem = dev-&gt;mem_start;</div><div class='del'>-	writeb(TESTvalue, p);</div><div class='del'>-	writeb(dev-&gt;dev_addr[0], p + 1);	/* actually the node ID */</div><div class='add'>+	arcnet_writeb(TESTvalue, p, COM9026_REG_W_INTMASK);</div><div class='add'>+	arcnet_writeb(TESTvalue, p, COM9026_REG_W_COMMAND);</div><div class='add'>+					/* actually the station/node ID */</div><div class='ctx'> </div><div class='ctx'> 	/* find the real shared memory start/end points, including mirrors */</div><div class='ctx'> </div><div class='hunk'>@@ -174,7 +155,7 @@ static int __init arcrimi_found(struct net_device *dev)</div><div class='ctx'> 	 * 2k (or there are no mirrors at all) but on some, it's 4k.</div><div class='ctx'> 	 */</div><div class='ctx'> 	mirror_size = MIRROR_SIZE;</div><div class='del'>-	if (readb(p) == TESTvalue &amp;&amp;</div><div class='add'>+	if (arcnet_readb(p, COM9026_REG_R_STATUS) == TESTvalue &amp;&amp;</div><div class='ctx'> 	    check_mirror(shmem - MIRROR_SIZE, MIRROR_SIZE) == 0 &amp;&amp;</div><div class='ctx'> 	    check_mirror(shmem - 2 * MIRROR_SIZE, MIRROR_SIZE) == 1)</div><div class='ctx'> 		mirror_size = 2 * MIRROR_SIZE;</div><div class='hunk'>@@ -204,8 +185,7 @@ static int __init arcrimi_found(struct net_device *dev)</div><div class='ctx'> 	lp-&gt;hw.copy_to_card = arcrimi_copy_to_card;</div><div class='ctx'> 	lp-&gt;hw.copy_from_card = arcrimi_copy_from_card;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * re-reserve the memory region - arcrimi_probe() alloced this reqion</div><div class='add'>+	/* re-reserve the memory region - arcrimi_probe() alloced this reqion</div><div class='ctx'> 	 * but didn't know the real size.  Free that region and then re-get</div><div class='ctx'> 	 * with the correct size.  There is a VERY slim chance this could</div><div class='ctx'> 	 * fail.</div><div class='hunk'>@@ -215,24 +195,26 @@ static int __init arcrimi_found(struct net_device *dev)</div><div class='ctx'> 	if (!request_mem_region(dev-&gt;mem_start,</div><div class='ctx'> 				dev-&gt;mem_end - dev-&gt;mem_start + 1,</div><div class='ctx'> 				"arcnet (90xx)")) {</div><div class='del'>-		BUGMSG(D_NORMAL, "Card memory already allocated\n");</div><div class='add'>+		arc_printk(D_NORMAL, dev, "Card memory already allocated\n");</div><div class='ctx'> 		goto err_free_irq;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	lp-&gt;mem_start = ioremap(dev-&gt;mem_start, dev-&gt;mem_end - dev-&gt;mem_start + 1);</div><div class='add'>+	lp-&gt;mem_start = ioremap(dev-&gt;mem_start,</div><div class='add'>+				dev-&gt;mem_end - dev-&gt;mem_start + 1);</div><div class='ctx'> 	if (!lp-&gt;mem_start) {</div><div class='del'>-		BUGMSG(D_NORMAL, "Can't remap device memory!\n");</div><div class='add'>+		arc_printk(D_NORMAL, dev, "Can't remap device memory!\n");</div><div class='ctx'> 		goto err_release_mem;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* get and check the station ID from offset 1 in shmem */</div><div class='del'>-	dev-&gt;dev_addr[0] = readb(lp-&gt;mem_start + 1);</div><div class='add'>+	arcnet_set_addr(dev, arcnet_readb(lp-&gt;mem_start,</div><div class='add'>+					  COM9026_REG_R_STATION));</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_NORMAL, "ARCnet RIM I: station %02Xh found at IRQ %d, "</div><div class='del'>-	       "ShMem %lXh (%ld*%d bytes).\n",</div><div class='del'>-	       dev-&gt;dev_addr[0],</div><div class='del'>-	       dev-&gt;irq, dev-&gt;mem_start,</div><div class='del'>-	 (dev-&gt;mem_end - dev-&gt;mem_start + 1) / mirror_size, mirror_size);</div><div class='add'>+	arc_printk(D_NORMAL, dev, "ARCnet RIM I: station %02Xh found at IRQ %d, ShMem %lXh (%ld*%d bytes)\n",</div><div class='add'>+		   dev-&gt;dev_addr[0],</div><div class='add'>+		   dev-&gt;irq, dev-&gt;mem_start,</div><div class='add'>+		   (dev-&gt;mem_end - dev-&gt;mem_start + 1) / mirror_size,</div><div class='add'>+		   mirror_size);</div><div class='ctx'> </div><div class='ctx'> 	err = register_netdev(dev);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -249,9 +231,7 @@ err_free_irq:</div><div class='ctx'> 	return -EIO;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Do a hardware reset on the card, and set up necessary registers.</div><div class='add'>+/* Do a hardware reset on the card, and set up necessary registers.</div><div class='ctx'>  *</div><div class='ctx'>  * This should be called as little as possible, because it disrupts the</div><div class='ctx'>  * token on the network (causes a RECON) and requires a significant delay.</div><div class='hunk'>@@ -263,17 +243,19 @@ static int arcrimi_reset(struct net_device *dev, int really_reset)</div><div class='ctx'> 	struct arcnet_local *lp = netdev_priv(dev);</div><div class='ctx'> 	void __iomem *ioaddr = lp-&gt;mem_start + 0x800;</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_INIT, "Resetting %s (status=%02Xh)\n", dev-&gt;name, ASTATUS());</div><div class='add'>+	arc_printk(D_INIT, dev, "Resetting %s (status=%02Xh)\n",</div><div class='add'>+		   dev-&gt;name, arcnet_readb(ioaddr, COM9026_REG_R_STATUS));</div><div class='ctx'> </div><div class='ctx'> 	if (really_reset) {</div><div class='del'>-		writeb(TESTvalue, ioaddr - 0x800);	/* fake reset */</div><div class='add'>+		arcnet_writeb(TESTvalue, ioaddr, -0x800);	/* fake reset */</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='del'>-	ACOMMAND(CFLAGScmd | RESETclear);	/* clear flags &amp; end reset */</div><div class='del'>-	ACOMMAND(CFLAGScmd | CONFIGclear);</div><div class='add'>+	/* clear flags &amp; end reset */</div><div class='add'>+	arcnet_writeb(CFLAGScmd | RESETclear, ioaddr, COM9026_REG_W_COMMAND);</div><div class='add'>+	arcnet_writeb(CFLAGScmd | CONFIGclear, ioaddr, COM9026_REG_W_COMMAND);</div><div class='ctx'> </div><div class='ctx'> 	/* enable extended (512-byte) packets */</div><div class='del'>-	ACOMMAND(CONFIGcmd | EXTconf);</div><div class='add'>+	arcnet_writeb(CONFIGcmd | EXTconf, ioaddr, COM9026_REG_W_COMMAND);</div><div class='ctx'> </div><div class='ctx'> 	/* done!  return success. */</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -284,7 +266,7 @@ static void arcrimi_setmask(struct net_device *dev, int mask)</div><div class='ctx'> 	struct arcnet_local *lp = netdev_priv(dev);</div><div class='ctx'> 	void __iomem *ioaddr = lp-&gt;mem_start + 0x800;</div><div class='ctx'> </div><div class='del'>-	AINTMASK(mask);</div><div class='add'>+	arcnet_writeb(mask, ioaddr, COM9026_REG_W_INTMASK);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int arcrimi_status(struct net_device *dev)</div><div class='hunk'>@@ -292,7 +274,7 @@ static int arcrimi_status(struct net_device *dev)</div><div class='ctx'> 	struct arcnet_local *lp = netdev_priv(dev);</div><div class='ctx'> 	void __iomem *ioaddr = lp-&gt;mem_start + 0x800;</div><div class='ctx'> </div><div class='del'>-	return ASTATUS();</div><div class='add'>+	return arcnet_readb(ioaddr, COM9026_REG_R_STATUS);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void arcrimi_command(struct net_device *dev, int cmd)</div><div class='hunk'>@@ -300,7 +282,7 @@ static void arcrimi_command(struct net_device *dev, int cmd)</div><div class='ctx'> 	struct arcnet_local *lp = netdev_priv(dev);</div><div class='ctx'> 	void __iomem *ioaddr = lp-&gt;mem_start + 0x800;</div><div class='ctx'> </div><div class='del'>-	ACOMMAND(cmd);</div><div class='add'>+	arcnet_writeb(cmd, ioaddr, COM9026_REG_W_COMMAND);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void arcrimi_copy_to_card(struct net_device *dev, int bufnum, int offset,</div><div class='hunk'>@@ -308,16 +290,17 @@ static void arcrimi_copy_to_card(struct net_device *dev, int bufnum, int offset,</div><div class='ctx'> {</div><div class='ctx'> 	struct arcnet_local *lp = netdev_priv(dev);</div><div class='ctx'> 	void __iomem *memaddr = lp-&gt;mem_start + 0x800 + bufnum * 512 + offset;</div><div class='del'>-	TIME("memcpy_toio", count, memcpy_toio(memaddr, buf, count));</div><div class='del'>-}</div><div class='ctx'> </div><div class='add'>+	TIME(dev, "memcpy_toio", count, memcpy_toio(memaddr, buf, count));</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-static void arcrimi_copy_from_card(struct net_device *dev, int bufnum, int offset,</div><div class='del'>-				   void *buf, int count)</div><div class='add'>+static void arcrimi_copy_from_card(struct net_device *dev, int bufnum,</div><div class='add'>+				   int offset, void *buf, int count)</div><div class='ctx'> {</div><div class='ctx'> 	struct arcnet_local *lp = netdev_priv(dev);</div><div class='ctx'> 	void __iomem *memaddr = lp-&gt;mem_start + 0x800 + bufnum * 512 + offset;</div><div class='del'>-	TIME("memcpy_fromio", count, memcpy_fromio(buf, memaddr, count));</div><div class='add'>+</div><div class='add'>+	TIME(dev, "memcpy_fromio", count, memcpy_fromio(buf, memaddr, count));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int node;</div><div class='hunk'>@@ -329,6 +312,7 @@ module_param(node, int, 0);</div><div class='ctx'> module_param(io, int, 0);</div><div class='ctx'> module_param(irq, int, 0);</div><div class='ctx'> module_param_string(device, device, sizeof(device), 0);</div><div class='add'>+MODULE_DESCRIPTION("ARCnet COM90xx RIM I chipset driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='ctx'> static struct net_device *my_dev;</div><div class='hunk'>@@ -342,7 +326,7 @@ static int __init arc_rimi_init(void)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	if (node &amp;&amp; node != 0xff)</div><div class='del'>-		dev-&gt;dev_addr[0] = node;</div><div class='add'>+		arcnet_set_addr(dev, node);</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;mem_start = io;</div><div class='ctx'> 	dev-&gt;irq = irq;</div><div class='hunk'>@@ -350,7 +334,7 @@ static int __init arc_rimi_init(void)</div><div class='ctx'> 		dev-&gt;irq = 9;</div><div class='ctx'> </div><div class='ctx'> 	if (arcrimi_probe(dev)) {</div><div class='del'>-		free_netdev(dev);</div><div class='add'>+		free_arcdev(dev);</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -367,23 +351,27 @@ static void __exit arc_rimi_exit(void)</div><div class='ctx'> 	iounmap(lp-&gt;mem_start);</div><div class='ctx'> 	release_mem_region(dev-&gt;mem_start, dev-&gt;mem_end - dev-&gt;mem_start + 1);</div><div class='ctx'> 	free_irq(dev-&gt;irq, dev);</div><div class='del'>-	free_netdev(dev);</div><div class='add'>+	free_arcdev(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifndef MODULE</div><div class='ctx'> static int __init arcrimi_setup(char *s)</div><div class='ctx'> {</div><div class='ctx'> 	int ints[8];</div><div class='add'>+</div><div class='ctx'> 	s = get_options(s, 8, ints);</div><div class='ctx'> 	if (!ints[0])</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	switch (ints[0]) {</div><div class='ctx'> 	default:		/* ERROR */</div><div class='del'>-		printk("arcrimi: Too many arguments.\n");</div><div class='add'>+		pr_err("Too many arguments\n");</div><div class='add'>+		fallthrough;</div><div class='ctx'> 	case 3:		/* Node ID */</div><div class='ctx'> 		node = ints[3];</div><div class='add'>+		fallthrough;</div><div class='ctx'> 	case 2:		/* IRQ */</div><div class='ctx'> 		irq = ints[2];</div><div class='add'>+		fallthrough;</div><div class='ctx'> 	case 1:		/* IO address */</div><div class='ctx'> 		io = ints[1];</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/arcnet/arcdevice.h b/drivers/net/arcnet/arcdevice.h<br/>new file mode 100644<br/>index 000000000000..bee60b377d7c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/arcnet/arcdevice.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/arcnet/arcdevice.h</a></div><div class='hunk'>@@ -0,0 +1,402 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+/*</div><div class='add'>+ * INET         An implementation of the TCP/IP protocol suite for the LINUX</div><div class='add'>+ *              operating system.  NET  is implemented using the  BSD Socket</div><div class='add'>+ *              interface as the means of communication with the user level.</div><div class='add'>+ *</div><div class='add'>+ *              Definitions used by the ARCnet driver.</div><div class='add'>+ *</div><div class='add'>+ * Authors:     Avery Pennarun and David Woodhouse</div><div class='add'>+ */</div><div class='add'>+#ifndef _LINUX_ARCDEVICE_H</div><div class='add'>+#define _LINUX_ARCDEVICE_H</div><div class='add'>+</div><div class='add'>+#include &lt;asm/timex.h&gt;</div><div class='add'>+#include &lt;linux/if_arcnet.h&gt;</div><div class='add'>+</div><div class='add'>+#ifdef __KERNEL__</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/workqueue.h&gt;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * RECON_THRESHOLD is the maximum number of RECON messages to receive</div><div class='add'>+ * within one minute before printing a "cabling problem" warning. The</div><div class='add'>+ * default value should be fine.</div><div class='add'>+ *</div><div class='add'>+ * After that, a "cabling restored" message will be printed on the next IRQ</div><div class='add'>+ * if no RECON messages have been received for 10 seconds.</div><div class='add'>+ *</div><div class='add'>+ * Do not define RECON_THRESHOLD at all if you want to disable this feature.</div><div class='add'>+ */</div><div class='add'>+#define RECON_THRESHOLD 30</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Define this to the minimum "timeout" value.  If a transmit takes longer</div><div class='add'>+ * than TX_TIMEOUT jiffies, Linux will abort the TX and retry.  On a large</div><div class='add'>+ * network, or one with heavy network traffic, this timeout may need to be</div><div class='add'>+ * increased.  The larger it is, though, the longer it will be between</div><div class='add'>+ * necessary transmits - don't set this too high.</div><div class='add'>+ */</div><div class='add'>+#define TX_TIMEOUT (HZ * 200 / 1000)</div><div class='add'>+</div><div class='add'>+/* Display warnings about the driver being an ALPHA version. */</div><div class='add'>+#undef ALPHA_WARNING</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Debugging bitflags: each option can be enabled individually.</div><div class='add'>+ *</div><div class='add'>+ * Note: only debug flags included in the ARCNET_DEBUG_MAX define will</div><div class='add'>+ *   actually be available.  GCC will (at least, GCC 2.7.0 will) notice</div><div class='add'>+ *   lines using a BUGLVL not in ARCNET_DEBUG_MAX and automatically optimize</div><div class='add'>+ *   them out.</div><div class='add'>+ */</div><div class='add'>+#define D_NORMAL	1	/* important operational info             */</div><div class='add'>+#define D_EXTRA		2	/* useful, but non-vital information      */</div><div class='add'>+#define	D_INIT		4	/* show init/probe messages               */</div><div class='add'>+#define D_INIT_REASONS	8	/* show reasons for discarding probes     */</div><div class='add'>+#define D_RECON		32	/* print a message whenever token is lost */</div><div class='add'>+#define D_PROTO		64	/* debug auto-protocol support            */</div><div class='add'>+/* debug levels below give LOTS of output during normal operation! */</div><div class='add'>+#define D_DURING	128	/* trace operations (including irq's)     */</div><div class='add'>+#define D_TX	        256	/* show tx packets                        */</div><div class='add'>+#define D_RX		512	/* show rx packets                        */</div><div class='add'>+#define D_SKB		1024	/* show skb's                             */</div><div class='add'>+#define D_SKB_SIZE	2048	/* show skb sizes			  */</div><div class='add'>+#define D_TIMING	4096	/* show time needed to copy buffers to card */</div><div class='add'>+#define D_DEBUG         8192    /* Very detailed debug line for line */</div><div class='add'>+</div><div class='add'>+#ifndef ARCNET_DEBUG_MAX</div><div class='add'>+#define ARCNET_DEBUG_MAX (127)	/* change to ~0 if you want detailed debugging */</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef ARCNET_DEBUG</div><div class='add'>+#define ARCNET_DEBUG (D_NORMAL | D_EXTRA)</div><div class='add'>+#endif</div><div class='add'>+extern int arcnet_debug;</div><div class='add'>+</div><div class='add'>+#define BUGLVL(x)	((x) &amp; ARCNET_DEBUG_MAX &amp; arcnet_debug)</div><div class='add'>+</div><div class='add'>+/* macros to simplify debug checking */</div><div class='add'>+#define arc_printk(x, dev, fmt, ...)					\</div><div class='add'>+do {									\</div><div class='add'>+	if (BUGLVL(x)) {						\</div><div class='add'>+		if ((x) == D_NORMAL)					\</div><div class='add'>+			netdev_warn(dev, fmt, ##__VA_ARGS__);		\</div><div class='add'>+		else if ((x) &lt; D_DURING)				\</div><div class='add'>+			netdev_info(dev, fmt, ##__VA_ARGS__);		\</div><div class='add'>+		else							\</div><div class='add'>+			netdev_dbg(dev, fmt, ##__VA_ARGS__);		\</div><div class='add'>+	}								\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+#define arc_cont(x, fmt, ...)						\</div><div class='add'>+do {									\</div><div class='add'>+	if (BUGLVL(x))							\</div><div class='add'>+		pr_cont(fmt, ##__VA_ARGS__);				\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+/* see how long a function call takes to run, expressed in CPU cycles */</div><div class='add'>+#define TIME(dev, name, bytes, call)					\</div><div class='add'>+do {									\</div><div class='add'>+	if (BUGLVL(D_TIMING)) {						\</div><div class='add'>+		unsigned long _x, _y;					\</div><div class='add'>+		_x = get_cycles();					\</div><div class='add'>+		call;							\</div><div class='add'>+		_y = get_cycles();					\</div><div class='add'>+		arc_printk(D_TIMING, dev,				\</div><div class='add'>+			   "%s: %d bytes in %lu cycles == %lu Kbytes/100Mcycle\n", \</div><div class='add'>+			   name, bytes, _y - _x,			\</div><div class='add'>+			   100000000 / 1024 * bytes / (_y - _x + 1));	\</div><div class='add'>+	} else {							\</div><div class='add'>+		call;							\</div><div class='add'>+	}								\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Time needed to reset the card - in ms (milliseconds).  This works on my</div><div class='add'>+ * SMC PC100.  I can't find a reference that tells me just how long I</div><div class='add'>+ * should wait.</div><div class='add'>+ */</div><div class='add'>+#define RESETtime (300)</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * These are the max/min lengths of packet payload, not including the</div><div class='add'>+ * arc_hardware header, but definitely including the soft header.</div><div class='add'>+ *</div><div class='add'>+ * Note: packet sizes 254, 255, 256 are impossible because of the way</div><div class='add'>+ * ARCnet registers work  That's why RFC1201 defines "exception" packets.</div><div class='add'>+ * In non-RFC1201 protocols, we have to just tack some extra bytes on the</div><div class='add'>+ * end.</div><div class='add'>+ */</div><div class='add'>+#define MTU	253		/* normal packet max size */</div><div class='add'>+#define MinTU	257		/* extended packet min size */</div><div class='add'>+#define XMTU	508		/* extended packet max size */</div><div class='add'>+</div><div class='add'>+/* status/interrupt mask bit fields */</div><div class='add'>+#define TXFREEflag	0x01	/* transmitter available */</div><div class='add'>+#define TXACKflag       0x02	/* transmitted msg. ackd */</div><div class='add'>+#define RECONflag       0x04	/* network reconfigured */</div><div class='add'>+#define TESTflag        0x08	/* test flag */</div><div class='add'>+#define EXCNAKflag      0x08    /* excesive nak flag */</div><div class='add'>+#define RESETflag       0x10	/* power-on-reset */</div><div class='add'>+#define RES1flag        0x20	/* reserved - usually set by jumper */</div><div class='add'>+#define RES2flag        0x40	/* reserved - usually set by jumper */</div><div class='add'>+#define NORXflag        0x80	/* receiver inhibited */</div><div class='add'>+</div><div class='add'>+/* Flags used for IO-mapped memory operations */</div><div class='add'>+#define AUTOINCflag     0x40	/* Increase location with each access */</div><div class='add'>+#define IOMAPflag       0x02	/* (for 90xx) Use IO mapped memory, not mmap */</div><div class='add'>+#define ENABLE16flag    0x80	/* (for 90xx) Enable 16-bit mode */</div><div class='add'>+</div><div class='add'>+/* in the command register, the following bits have these meanings:</div><div class='add'>+ *                0-2     command</div><div class='add'>+ *                3-4     page number (for enable rcv/xmt command)</div><div class='add'>+ *                 7      receive broadcasts</div><div class='add'>+ */</div><div class='add'>+#define NOTXcmd         0x01	/* disable transmitter */</div><div class='add'>+#define NORXcmd         0x02	/* disable receiver */</div><div class='add'>+#define TXcmd           0x03	/* enable transmitter */</div><div class='add'>+#define RXcmd           0x04	/* enable receiver */</div><div class='add'>+#define CONFIGcmd       0x05	/* define configuration */</div><div class='add'>+#define CFLAGScmd       0x06	/* clear flags */</div><div class='add'>+#define TESTcmd         0x07	/* load test flags */</div><div class='add'>+#define STARTIOcmd      0x18	/* start internal operation */</div><div class='add'>+</div><div class='add'>+/* flags for "clear flags" command */</div><div class='add'>+#define RESETclear      0x08	/* power-on-reset */</div><div class='add'>+#define CONFIGclear     0x10	/* system reconfigured */</div><div class='add'>+</div><div class='add'>+#define EXCNAKclear     0x0E    /* Clear and acknowledge the excive nak bit */</div><div class='add'>+</div><div class='add'>+/* flags for "load test flags" command */</div><div class='add'>+#define TESTload        0x08	/* test flag (diagnostic) */</div><div class='add'>+</div><div class='add'>+/* byte deposited into first address of buffers on reset */</div><div class='add'>+#define TESTvalue       0321	/* that's octal for 0xD1 :) */</div><div class='add'>+</div><div class='add'>+/* for "enable receiver" command */</div><div class='add'>+#define RXbcasts        0x80	/* receive broadcasts */</div><div class='add'>+</div><div class='add'>+/* flags for "define configuration" command */</div><div class='add'>+#define NORMALconf      0x00	/* 1-249 byte packets */</div><div class='add'>+#define EXTconf         0x08	/* 250-504 byte packets */</div><div class='add'>+</div><div class='add'>+/* card feature flags, set during auto-detection.</div><div class='add'>+ * (currently only used by com20020pci)</div><div class='add'>+ */</div><div class='add'>+#define ARC_IS_5MBIT    1   /* card default speed is 5MBit */</div><div class='add'>+#define ARC_CAN_10MBIT  2   /* card uses COM20022, supporting 10MBit,</div><div class='add'>+				 but default is 2.5MBit. */</div><div class='add'>+#define ARC_HAS_LED     4   /* card has software controlled LEDs */</div><div class='add'>+#define ARC_HAS_ROTARY  8   /* card has rotary encoder */</div><div class='add'>+</div><div class='add'>+/* information needed to define an encapsulation driver */</div><div class='add'>+struct ArcProto {</div><div class='add'>+	char suffix;		/* a for RFC1201, e for ether-encap, etc. */</div><div class='add'>+	int mtu;		/* largest possible packet */</div><div class='add'>+	int is_ip;              /* This is a ip plugin - not a raw thing */</div><div class='add'>+</div><div class='add'>+	void (*rx)(struct net_device *dev, int bufnum,</div><div class='add'>+		   struct archdr *pkthdr, int length);</div><div class='add'>+	int (*build_header)(struct sk_buff *skb, struct net_device *dev,</div><div class='add'>+			    unsigned short ethproto, uint8_t daddr);</div><div class='add'>+</div><div class='add'>+	/* these functions return '1' if the skb can now be freed */</div><div class='add'>+	int (*prepare_tx)(struct net_device *dev, struct archdr *pkt,</div><div class='add'>+			  int length, int bufnum);</div><div class='add'>+	int (*continue_tx)(struct net_device *dev, int bufnum);</div><div class='add'>+	int (*ack_tx)(struct net_device *dev, int acked);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+extern struct ArcProto *arc_proto_map[256], *arc_proto_default,</div><div class='add'>+	*arc_bcast_proto, *arc_raw_proto;</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * "Incoming" is information needed for each address that could be sending</div><div class='add'>+ * to us.  Mostly for partially-received split packets.</div><div class='add'>+ */</div><div class='add'>+struct Incoming {</div><div class='add'>+	struct sk_buff *skb;	/* packet data buffer             */</div><div class='add'>+	__be16 sequence;	/* sequence number of assembly    */</div><div class='add'>+	uint8_t lastpacket,	/* number of last packet (from 1) */</div><div class='add'>+		numpackets;	/* number of packets in split     */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* only needed for RFC1201 */</div><div class='add'>+struct Outgoing {</div><div class='add'>+	struct ArcProto *proto;	/* protocol driver that owns this:</div><div class='add'>+				 *   if NULL, no packet is pending.</div><div class='add'>+				 */</div><div class='add'>+	struct sk_buff *skb;	/* buffer from upper levels */</div><div class='add'>+	struct archdr *pkt;	/* a pointer into the skb */</div><div class='add'>+	uint16_t length,	/* bytes total */</div><div class='add'>+		dataleft,	/* bytes left */</div><div class='add'>+		segnum,		/* segment being sent */</div><div class='add'>+		numsegs;	/* number of segments */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ARCNET_LED_NAME_SZ (IFNAMSIZ + 6)</div><div class='add'>+</div><div class='add'>+struct arcnet_local {</div><div class='add'>+	uint8_t config,		/* current value of CONFIG register */</div><div class='add'>+		timeout,	/* Extended timeout for COM20020 */</div><div class='add'>+		backplane,	/* Backplane flag for COM20020 */</div><div class='add'>+		clockp,		/* COM20020 clock divider */</div><div class='add'>+		clockm,		/* COM20020 clock multiplier flag */</div><div class='add'>+		setup,		/* Contents of setup1 register */</div><div class='add'>+		setup2,		/* Contents of setup2 register */</div><div class='add'>+		intmask;	/* current value of INTMASK register */</div><div class='add'>+	uint8_t default_proto[256];	/* default encap to use for each host */</div><div class='add'>+	int	cur_tx,		/* buffer used by current transmit, or -1 */</div><div class='add'>+		next_tx,	/* buffer where a packet is ready to send */</div><div class='add'>+		cur_rx;		/* current receive buffer */</div><div class='add'>+	int	lastload_dest,	/* can last loaded packet be acked? */</div><div class='add'>+		lasttrans_dest;	/* can last TX'd packet be acked? */</div><div class='add'>+	int	timed_out;	/* need to process TX timeout and drop packet */</div><div class='add'>+	unsigned long last_timeout;	/* time of last reported timeout */</div><div class='add'>+	char *card_name;	/* card ident string */</div><div class='add'>+	int card_flags;		/* special card features */</div><div class='add'>+</div><div class='add'>+	/* On preemtive and SMB a lock is needed */</div><div class='add'>+	spinlock_t lock;</div><div class='add'>+</div><div class='add'>+	struct led_trigger *tx_led_trig;</div><div class='add'>+	char tx_led_trig_name[ARCNET_LED_NAME_SZ];</div><div class='add'>+	struct led_trigger *recon_led_trig;</div><div class='add'>+	char recon_led_trig_name[ARCNET_LED_NAME_SZ];</div><div class='add'>+</div><div class='add'>+	struct timer_list	timer;</div><div class='add'>+</div><div class='add'>+	struct net_device *dev;</div><div class='add'>+	int reply_status;</div><div class='add'>+	struct work_struct reply_work;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Buffer management: an ARCnet card has 4 x 512-byte buffers, each of</div><div class='add'>+	 * which can be used for either sending or receiving.  The new dynamic</div><div class='add'>+	 * buffer management routines use a simple circular queue of available</div><div class='add'>+	 * buffers, and take them as they're needed.  This way, we simplify</div><div class='add'>+	 * situations in which we (for example) want to pre-load a transmit</div><div class='add'>+	 * buffer, or start receiving while we copy a received packet to</div><div class='add'>+	 * memory.</div><div class='add'>+	 *</div><div class='add'>+	 * The rules: only the interrupt handler is allowed to _add_ buffers to</div><div class='add'>+	 * the queue; thus, this doesn't require a lock.  Both the interrupt</div><div class='add'>+	 * handler and the transmit function will want to _remove_ buffers, so</div><div class='add'>+	 * we need to handle the situation where they try to do it at the same</div><div class='add'>+	 * time.</div><div class='add'>+	 *</div><div class='add'>+	 * If next_buf == first_free_buf, the queue is empty.  Since there are</div><div class='add'>+	 * only four possible buffers, the queue should never be full.</div><div class='add'>+	 */</div><div class='add'>+	atomic_t buf_lock;</div><div class='add'>+	int buf_queue[5];</div><div class='add'>+	int next_buf, first_free_buf;</div><div class='add'>+</div><div class='add'>+	/* network "reconfiguration" handling */</div><div class='add'>+	unsigned long first_recon; /* time of "first" RECON message to count */</div><div class='add'>+	unsigned long last_recon;  /* time of most recent RECON */</div><div class='add'>+	int num_recons;		/* number of RECONs between first and last. */</div><div class='add'>+	int network_down;	/* do we think the network is down? */</div><div class='add'>+</div><div class='add'>+	int excnak_pending;    /* We just got an excesive nak interrupt */</div><div class='add'>+</div><div class='add'>+	/* RESET flag handling */</div><div class='add'>+	int reset_in_progress;</div><div class='add'>+	struct work_struct reset_work;</div><div class='add'>+</div><div class='add'>+	struct {</div><div class='add'>+		uint16_t sequence;	/* sequence number (incs with each packet) */</div><div class='add'>+		__be16 aborted_seq;</div><div class='add'>+</div><div class='add'>+		struct Incoming incoming[256];	/* one from each address */</div><div class='add'>+	} rfc1201;</div><div class='add'>+</div><div class='add'>+	/* really only used by rfc1201, but we'll pretend it's not */</div><div class='add'>+	struct Outgoing outgoing;	/* packet currently being sent */</div><div class='add'>+</div><div class='add'>+	/* hardware-specific functions */</div><div class='add'>+	struct {</div><div class='add'>+		struct module *owner;</div><div class='add'>+		void (*command)(struct net_device *dev, int cmd);</div><div class='add'>+		int (*status)(struct net_device *dev);</div><div class='add'>+		void (*intmask)(struct net_device *dev, int mask);</div><div class='add'>+		int (*reset)(struct net_device *dev, int really_reset);</div><div class='add'>+		void (*open)(struct net_device *dev);</div><div class='add'>+		void (*close)(struct net_device *dev);</div><div class='add'>+		void (*datatrigger) (struct net_device * dev, int enable);</div><div class='add'>+		void (*recontrigger) (struct net_device * dev, int enable);</div><div class='add'>+</div><div class='add'>+		void (*copy_to_card)(struct net_device *dev, int bufnum,</div><div class='add'>+				     int offset, void *buf, int count);</div><div class='add'>+		void (*copy_from_card)(struct net_device *dev, int bufnum,</div><div class='add'>+				       int offset, void *buf, int count);</div><div class='add'>+	} hw;</div><div class='add'>+</div><div class='add'>+	void __iomem *mem_start;	/* pointer to ioremap'ed MMIO */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum arcnet_led_event {</div><div class='add'>+	ARCNET_LED_EVENT_RECON,</div><div class='add'>+	ARCNET_LED_EVENT_OPEN,</div><div class='add'>+	ARCNET_LED_EVENT_STOP,</div><div class='add'>+	ARCNET_LED_EVENT_TX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void arcnet_led_event(struct net_device *netdev, enum arcnet_led_event event);</div><div class='add'>+void devm_arcnet_led_init(struct net_device *netdev, int index, int subid);</div><div class='add'>+</div><div class='add'>+#if ARCNET_DEBUG_MAX &amp; D_SKB</div><div class='add'>+void arcnet_dump_skb(struct net_device *dev, struct sk_buff *skb, char *desc);</div><div class='add'>+#else</div><div class='add'>+static inline</div><div class='add'>+void arcnet_dump_skb(struct net_device *dev, struct sk_buff *skb, char *desc)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+void arcnet_unregister_proto(struct ArcProto *proto);</div><div class='add'>+irqreturn_t arcnet_interrupt(int irq, void *dev_id);</div><div class='add'>+</div><div class='add'>+struct net_device *alloc_arcdev(const char *name);</div><div class='add'>+void free_arcdev(struct net_device *dev);</div><div class='add'>+</div><div class='add'>+int arcnet_open(struct net_device *dev);</div><div class='add'>+int arcnet_close(struct net_device *dev);</div><div class='add'>+netdev_tx_t arcnet_send_packet(struct sk_buff *skb,</div><div class='add'>+			       struct net_device *dev);</div><div class='add'>+void arcnet_timeout(struct net_device *dev, unsigned int txqueue);</div><div class='add'>+</div><div class='add'>+static inline void arcnet_set_addr(struct net_device *dev, u8 addr)</div><div class='add'>+{</div><div class='add'>+	dev_addr_set(dev, &amp;addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* I/O equivalents */</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_SA1100_CT6001</div><div class='add'>+#define BUS_ALIGN  2  /* 8 bit device on a 16 bit bus - needs padding */</div><div class='add'>+#else</div><div class='add'>+#define BUS_ALIGN  1</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/* addr and offset allow register like names to define the actual IO  address.</div><div class='add'>+ * A configuration option multiplies the offset for alignment.</div><div class='add'>+ */</div><div class='add'>+#define arcnet_inb(addr, offset)					\</div><div class='add'>+	inb((addr) + BUS_ALIGN * (offset))</div><div class='add'>+#define arcnet_outb(value, addr, offset)				\</div><div class='add'>+	outb(value, (addr) + BUS_ALIGN * (offset))</div><div class='add'>+</div><div class='add'>+#define arcnet_insb(addr, offset, buffer, count)			\</div><div class='add'>+	insb((addr) + BUS_ALIGN * (offset), buffer, count)</div><div class='add'>+#define arcnet_outsb(addr, offset, buffer, count)			\</div><div class='add'>+	outsb((addr) + BUS_ALIGN * (offset), buffer, count)</div><div class='add'>+</div><div class='add'>+#define arcnet_readb(addr, offset)					\</div><div class='add'>+	readb((addr) + (offset))</div><div class='add'>+#define arcnet_writeb(value, addr, offset)				\</div><div class='add'>+	writeb(value, (addr) + (offset))</div><div class='add'>+</div><div class='add'>+#endif				/* __KERNEL__ */</div><div class='add'>+#endif				/* _LINUX_ARCDEVICE_H */</div><div class='head'>diff --git a/drivers/net/arcnet/arcnet.c b/drivers/net/arcnet/arcnet.c<br/>index 10f71c732b59..882972604c82 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/arcnet/arcnet.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/arcnet/arcnet.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/arcnet/arcnet.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/arcnet/arcnet.c</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Linux ARCnet driver - device-independent routines</div><div class='del'>- * </div><div class='add'>+ *</div><div class='ctx'>  * Written 1997 by David Woodhouse.</div><div class='ctx'>  * Written 1994-1999 by Avery Pennarun.</div><div class='ctx'>  * Written 1999-2000 by Martin Mares &lt;mj@ucw.cz&gt;.</div><div class='hunk'>@@ -20,12 +20,12 @@</div><div class='ctx'>  * modified by SRC, incorporated herein by reference.</div><div class='ctx'>  *</div><div class='ctx'>  * **********************</div><div class='del'>- * </div><div class='add'>+ *</div><div class='ctx'>  * The change log is now in a file called ChangeLog in this directory.</div><div class='ctx'>  *</div><div class='ctx'>  * Sources:</div><div class='ctx'>  *  - Crynwr arcnet.com/arcether.com packet drivers.</div><div class='del'>- *  - arcnet.c v0.00 dated 1/1/94 and apparently by </div><div class='add'>+ *  - arcnet.c v0.00 dated 1/1/94 and apparently by</div><div class='ctx'>  *     Donald Becker - it didn't work :)</div><div class='ctx'>  *  - skeleton.c v0.05 dated 11/16/93 by Donald Becker</div><div class='ctx'>  *     (from Linux Kernel 1.1.45)</div><div class='hunk'>@@ -41,7 +41,7 @@</div><div class='ctx'>  *     &lt;jojo@repas.de&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#define VERSION "arcnet: v3.94 BETA 2007/02/08 - by Avery Pennarun et al.\n"</div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='hunk'>@@ -50,8 +50,14 @@</div><div class='ctx'> #include &lt;linux/if_arp.h&gt;</div><div class='ctx'> #include &lt;net/arp.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/arcdevice.h&gt;</div><div class='ctx'> #include &lt;linux/jiffies.h&gt;</div><div class='add'>+#include &lt;linux/errqueue.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/leds.h&gt;</div><div class='add'>+#include &lt;linux/workqueue.h&gt;</div><div class='add'>+</div><div class='add'>+#include "arcdevice.h"</div><div class='add'>+#include "com9026.h"</div><div class='ctx'> </div><div class='ctx'> /* "do nothing" functions for protocol drivers */</div><div class='ctx'> static void null_rx(struct net_device *dev, int bufnum,</div><div class='hunk'>@@ -63,17 +69,24 @@ static int null_prepare_tx(struct net_device *dev, struct archdr *pkt,</div><div class='ctx'> </div><div class='ctx'> static void arcnet_rx(struct net_device *dev, int bufnum);</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * one ArcProto per possible proto ID.  None of the elements of</div><div class='add'>+/* one ArcProto per possible proto ID.  None of the elements of</div><div class='ctx'>  * arc_proto_map are allowed to be NULL; they will get set to</div><div class='ctx'>  * arc_proto_default instead.  It also must not be NULL; if you would like</div><div class='ctx'>  * to set it to NULL, set it to &amp;arc_proto_null instead.</div><div class='ctx'>  */</div><div class='del'>- struct ArcProto *arc_proto_map[256], *arc_proto_default,</div><div class='del'>-   *arc_bcast_proto, *arc_raw_proto;</div><div class='add'>+struct ArcProto *arc_proto_map[256];</div><div class='add'>+EXPORT_SYMBOL(arc_proto_map);</div><div class='ctx'> </div><div class='del'>-static struct ArcProto arc_proto_null =</div><div class='del'>-{</div><div class='add'>+struct ArcProto *arc_proto_default;</div><div class='add'>+EXPORT_SYMBOL(arc_proto_default);</div><div class='add'>+</div><div class='add'>+struct ArcProto *arc_bcast_proto;</div><div class='add'>+EXPORT_SYMBOL(arc_bcast_proto);</div><div class='add'>+</div><div class='add'>+struct ArcProto *arc_raw_proto;</div><div class='add'>+EXPORT_SYMBOL(arc_raw_proto);</div><div class='add'>+</div><div class='add'>+static struct ArcProto arc_proto_null = {</div><div class='ctx'> 	.suffix		= '?',</div><div class='ctx'> 	.mtu		= XMTU,</div><div class='ctx'> 	.is_ip          = 0,</div><div class='hunk'>@@ -86,19 +99,7 @@ static struct ArcProto arc_proto_null =</div><div class='ctx'> </div><div class='ctx'> /* Exported function prototypes */</div><div class='ctx'> int arcnet_debug = ARCNET_DEBUG;</div><div class='del'>-</div><div class='del'>-EXPORT_SYMBOL(arc_proto_map);</div><div class='del'>-EXPORT_SYMBOL(arc_proto_default);</div><div class='del'>-EXPORT_SYMBOL(arc_bcast_proto);</div><div class='del'>-EXPORT_SYMBOL(arc_raw_proto);</div><div class='del'>-EXPORT_SYMBOL(arcnet_unregister_proto);</div><div class='ctx'> EXPORT_SYMBOL(arcnet_debug);</div><div class='del'>-EXPORT_SYMBOL(alloc_arcdev);</div><div class='del'>-EXPORT_SYMBOL(arcnet_interrupt);</div><div class='del'>-EXPORT_SYMBOL(arcnet_open);</div><div class='del'>-EXPORT_SYMBOL(arcnet_close);</div><div class='del'>-EXPORT_SYMBOL(arcnet_send_packet);</div><div class='del'>-EXPORT_SYMBOL(arcnet_timeout);</div><div class='ctx'> </div><div class='ctx'> /* Internal function prototypes */</div><div class='ctx'> static int arcnet_header(struct sk_buff *skb, struct net_device *dev,</div><div class='hunk'>@@ -108,6 +109,7 @@ static int go_tx(struct net_device *dev);</div><div class='ctx'> </div><div class='ctx'> static int debug = ARCNET_DEBUG;</div><div class='ctx'> module_param(debug, int, 0);</div><div class='add'>+MODULE_DESCRIPTION("ARCnet core driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='ctx'> static int __init arcnet_init(void)</div><div class='hunk'>@@ -116,29 +118,20 @@ static int __init arcnet_init(void)</div><div class='ctx'> </div><div class='ctx'> 	arcnet_debug = debug;</div><div class='ctx'> </div><div class='del'>-	printk("arcnet loaded.\n");</div><div class='del'>-</div><div class='del'>-#ifdef ALPHA_WARNING</div><div class='del'>-	BUGLVL(D_EXTRA) {</div><div class='del'>-		printk("arcnet: ***\n"</div><div class='del'>-		"arcnet: * Read arcnet.txt for important release notes!\n"</div><div class='del'>-		       "arcnet: *\n"</div><div class='del'>-		       "arcnet: * This is an ALPHA version! (Last stable release: v3.02)  E-mail\n"</div><div class='del'>-		       "arcnet: * me if you have any questions, comments, or bug reports.\n"</div><div class='del'>-		       "arcnet: ***\n");</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='add'>+	pr_info("arcnet loaded\n");</div><div class='ctx'> </div><div class='ctx'> 	/* initialize the protocol map */</div><div class='ctx'> 	arc_raw_proto = arc_proto_default = arc_bcast_proto = &amp;arc_proto_null;</div><div class='ctx'> 	for (count = 0; count &lt; 256; count++)</div><div class='ctx'> 		arc_proto_map[count] = arc_proto_default;</div><div class='ctx'> </div><div class='del'>-	BUGLVL(D_DURING)</div><div class='del'>-	    printk("arcnet: struct sizes: %Zd %Zd %Zd %Zd %Zd\n",</div><div class='del'>-		 sizeof(struct arc_hardware), sizeof(struct arc_rfc1201),</div><div class='del'>-		sizeof(struct arc_rfc1051), sizeof(struct arc_eth_encap),</div><div class='del'>-		   sizeof(struct archdr));</div><div class='add'>+	if (BUGLVL(D_DURING))</div><div class='add'>+		pr_info("struct sizes: %zd %zd %zd %zd %zd\n",</div><div class='add'>+			sizeof(struct arc_hardware),</div><div class='add'>+			sizeof(struct arc_rfc1201),</div><div class='add'>+			sizeof(struct arc_rfc1051),</div><div class='add'>+			sizeof(struct arc_eth_encap),</div><div class='add'>+			sizeof(struct archdr));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -150,9 +143,7 @@ static void __exit arcnet_exit(void)</div><div class='ctx'> module_init(arcnet_init);</div><div class='ctx'> module_exit(arcnet_exit);</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Dump the contents of an sk_buff</div><div class='del'>- */</div><div class='add'>+/* Dump the contents of an sk_buff */</div><div class='ctx'> #if ARCNET_DEBUG_MAX &amp; D_SKB</div><div class='ctx'> void arcnet_dump_skb(struct net_device *dev,</div><div class='ctx'> 		     struct sk_buff *skb, char *desc)</div><div class='hunk'>@@ -164,14 +155,10 @@ void arcnet_dump_skb(struct net_device *dev,</div><div class='ctx'> 	print_hex_dump(KERN_DEBUG, hdr, DUMP_PREFIX_OFFSET,</div><div class='ctx'> 		       16, 1, skb-&gt;data, skb-&gt;len, true);</div><div class='ctx'> }</div><div class='del'>-</div><div class='ctx'> EXPORT_SYMBOL(arcnet_dump_skb);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Dump the contents of an ARCnet buffer</div><div class='del'>- */</div><div class='add'>+/* Dump the contents of an ARCnet buffer */</div><div class='ctx'> #if (ARCNET_DEBUG_MAX &amp; (D_RX | D_TX))</div><div class='ctx'> static void arcnet_dump_packet(struct net_device *dev, int bufnum,</div><div class='ctx'> 			       char *desc, int take_arcnet_lock)</div><div class='hunk'>@@ -183,12 +170,13 @@ static void arcnet_dump_packet(struct net_device *dev, int bufnum,</div><div class='ctx'> 	char hdr[32];</div><div class='ctx'> </div><div class='ctx'> 	/* hw.copy_from_card expects IRQ context so take the IRQ lock</div><div class='del'>-	   to keep it single threaded */</div><div class='del'>-	if(take_arcnet_lock)</div><div class='add'>+	 * to keep it single threaded</div><div class='add'>+	 */</div><div class='add'>+	if (take_arcnet_lock)</div><div class='ctx'> 		spin_lock_irqsave(&amp;lp-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	lp-&gt;hw.copy_from_card(dev, bufnum, 0, buf, 512);</div><div class='del'>-	if(take_arcnet_lock)</div><div class='add'>+	if (take_arcnet_lock)</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	/* if the offset[0] byte is nonzero, this is a 256-byte packet */</div><div class='hunk'>@@ -202,13 +190,72 @@ static void arcnet_dump_packet(struct net_device *dev, int bufnum,</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='ctx'> </div><div class='del'>-#define arcnet_dump_packet(dev, bufnum, desc,take_arcnet_lock) do { } while (0)</div><div class='add'>+#define arcnet_dump_packet(dev, bufnum, desc, take_arcnet_lock) do { } while (0)</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+/* Trigger a LED event in response to a ARCNET device event */</div><div class='add'>+void arcnet_led_event(struct net_device *dev, enum arcnet_led_event event)</div><div class='add'>+{</div><div class='add'>+	struct arcnet_local *lp = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Unregister a protocol driver from the arc_proto_map.  Protocol drivers</div><div class='add'>+	switch (event) {</div><div class='add'>+	case ARCNET_LED_EVENT_RECON:</div><div class='add'>+		led_trigger_blink_oneshot(lp-&gt;recon_led_trig, 350, 350, 0);</div><div class='add'>+		break;</div><div class='add'>+	case ARCNET_LED_EVENT_OPEN:</div><div class='add'>+		led_trigger_event(lp-&gt;tx_led_trig, LED_OFF);</div><div class='add'>+		led_trigger_event(lp-&gt;recon_led_trig, LED_OFF);</div><div class='add'>+		break;</div><div class='add'>+	case ARCNET_LED_EVENT_STOP:</div><div class='add'>+		led_trigger_event(lp-&gt;tx_led_trig, LED_OFF);</div><div class='add'>+		led_trigger_event(lp-&gt;recon_led_trig, LED_OFF);</div><div class='add'>+		break;</div><div class='add'>+	case ARCNET_LED_EVENT_TX:</div><div class='add'>+		led_trigger_blink_oneshot(lp-&gt;tx_led_trig, 50, 50, 0);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(arcnet_led_event);</div><div class='add'>+</div><div class='add'>+static void arcnet_led_release(struct device *gendev, void *res)</div><div class='add'>+{</div><div class='add'>+	struct arcnet_local *lp = netdev_priv(to_net_dev(gendev));</div><div class='add'>+</div><div class='add'>+	led_trigger_unregister_simple(lp-&gt;tx_led_trig);</div><div class='add'>+	led_trigger_unregister_simple(lp-&gt;recon_led_trig);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Register ARCNET LED triggers for a arcnet device</div><div class='add'>+ *</div><div class='add'>+ * This is normally called from a driver's probe function</div><div class='add'>+ */</div><div class='add'>+void devm_arcnet_led_init(struct net_device *netdev, int index, int subid)</div><div class='add'>+{</div><div class='add'>+	struct arcnet_local *lp = netdev_priv(netdev);</div><div class='add'>+	void *res;</div><div class='add'>+</div><div class='add'>+	res = devres_alloc(arcnet_led_release, 0, GFP_KERNEL);</div><div class='add'>+	if (!res) {</div><div class='add'>+		netdev_err(netdev, "cannot register LED triggers\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	snprintf(lp-&gt;tx_led_trig_name, sizeof(lp-&gt;tx_led_trig_name),</div><div class='add'>+		 "arc%d-%d-tx", index, subid);</div><div class='add'>+	snprintf(lp-&gt;recon_led_trig_name, sizeof(lp-&gt;recon_led_trig_name),</div><div class='add'>+		 "arc%d-%d-recon", index, subid);</div><div class='add'>+</div><div class='add'>+	led_trigger_register_simple(lp-&gt;tx_led_trig_name,</div><div class='add'>+				    &amp;lp-&gt;tx_led_trig);</div><div class='add'>+	led_trigger_register_simple(lp-&gt;recon_led_trig_name,</div><div class='add'>+				    &amp;lp-&gt;recon_led_trig);</div><div class='add'>+</div><div class='add'>+	devres_add(&amp;netdev-&gt;dev, res);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(devm_arcnet_led_init);</div><div class='add'>+</div><div class='add'>+/* Unregister a protocol driver from the arc_proto_map.  Protocol drivers</div><div class='ctx'>  * are responsible for registering themselves, but the unregister routine</div><div class='ctx'>  * is pretty generic so we'll do it here.</div><div class='ctx'>  */</div><div class='hunk'>@@ -228,12 +275,11 @@ void arcnet_unregister_proto(struct ArcProto *proto)</div><div class='ctx'> 			arc_proto_map[count] = arc_proto_default;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(arcnet_unregister_proto);</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Add a buffer to the queue.  Only the interrupt handler is allowed to do</div><div class='add'>+/* Add a buffer to the queue.  Only the interrupt handler is allowed to do</div><div class='ctx'>  * this, unless interrupts are disabled.</div><div class='del'>- * </div><div class='add'>+ *</div><div class='ctx'>  * Note: we don't check for a full queue, since there aren't enough buffers</div><div class='ctx'>  * to more than fill it.</div><div class='ctx'>  */</div><div class='hunk'>@@ -245,19 +291,17 @@ static void release_arcbuf(struct net_device *dev, int bufnum)</div><div class='ctx'> 	lp-&gt;buf_queue[lp-&gt;first_free_buf++] = bufnum;</div><div class='ctx'> 	lp-&gt;first_free_buf %= 5;</div><div class='ctx'> </div><div class='del'>-	BUGLVL(D_DURING) {</div><div class='del'>-		BUGMSG(D_DURING, "release_arcbuf: freed #%d; buffer queue is now: ",</div><div class='del'>-		       bufnum);</div><div class='del'>-		for (i = lp-&gt;next_buf; i != lp-&gt;first_free_buf; i = (i+1) % 5)</div><div class='del'>-			BUGMSG2(D_DURING, "#%d ", lp-&gt;buf_queue[i]);</div><div class='del'>-		BUGMSG2(D_DURING, "\n");</div><div class='add'>+	if (BUGLVL(D_DURING)) {</div><div class='add'>+		arc_printk(D_DURING, dev, "release_arcbuf: freed #%d; buffer queue is now: ",</div><div class='add'>+			   bufnum);</div><div class='add'>+		for (i = lp-&gt;next_buf; i != lp-&gt;first_free_buf; i = (i + 1) % 5)</div><div class='add'>+			arc_cont(D_DURING, "#%d ", lp-&gt;buf_queue[i]);</div><div class='add'>+		arc_cont(D_DURING, "\n");</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Get a buffer from the queue.  If this returns -1, there are no buffers</div><div class='del'>- * available.</div><div class='add'>+/* Get a buffer from the queue.</div><div class='add'>+ * If this returns -1, there are no buffers available.</div><div class='ctx'>  */</div><div class='ctx'> static int get_arcbuf(struct net_device *dev)</div><div class='ctx'> {</div><div class='hunk'>@@ -266,34 +310,32 @@ static int get_arcbuf(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	if (!atomic_dec_and_test(&amp;lp-&gt;buf_lock)) {</div><div class='ctx'> 		/* already in this function */</div><div class='del'>-		BUGMSG(D_NORMAL, "get_arcbuf: overlap (%d)!\n",</div><div class='del'>-		       lp-&gt;buf_lock.counter);</div><div class='del'>-	}</div><div class='del'>-	else {			/* we can continue */</div><div class='add'>+		arc_printk(D_NORMAL, dev, "get_arcbuf: overlap (%d)!\n",</div><div class='add'>+			   lp-&gt;buf_lock.counter);</div><div class='add'>+	} else {			/* we can continue */</div><div class='ctx'> 		if (lp-&gt;next_buf &gt;= 5)</div><div class='ctx'> 			lp-&gt;next_buf -= 5;</div><div class='ctx'> </div><div class='del'>-		if (lp-&gt;next_buf == lp-&gt;first_free_buf)</div><div class='del'>-			BUGMSG(D_NORMAL, "get_arcbuf: BUG: no buffers are available??\n");</div><div class='del'>-		else {</div><div class='add'>+		if (lp-&gt;next_buf == lp-&gt;first_free_buf) {</div><div class='add'>+			arc_printk(D_NORMAL, dev, "get_arcbuf: BUG: no buffers are available??\n");</div><div class='add'>+		} else {</div><div class='ctx'> 			buf = lp-&gt;buf_queue[lp-&gt;next_buf++];</div><div class='ctx'> 			lp-&gt;next_buf %= 5;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-	BUGLVL(D_DURING) {</div><div class='del'>-		BUGMSG(D_DURING, "get_arcbuf: got #%d; buffer queue is now: ", buf);</div><div class='del'>-		for (i = lp-&gt;next_buf; i != lp-&gt;first_free_buf; i = (i+1) % 5)</div><div class='del'>-			BUGMSG2(D_DURING, "#%d ", lp-&gt;buf_queue[i]);</div><div class='del'>-		BUGMSG2(D_DURING, "\n");</div><div class='add'>+	if (BUGLVL(D_DURING)) {</div><div class='add'>+		arc_printk(D_DURING, dev, "get_arcbuf: got #%d; buffer queue is now: ",</div><div class='add'>+			   buf);</div><div class='add'>+		for (i = lp-&gt;next_buf; i != lp-&gt;first_free_buf; i = (i + 1) % 5)</div><div class='add'>+			arc_cont(D_DURING, "#%d ", lp-&gt;buf_queue[i]);</div><div class='add'>+		arc_cont(D_DURING, "\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	atomic_inc(&amp;lp-&gt;buf_lock);</div><div class='ctx'> 	return buf;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> static int choose_mtu(void)</div><div class='ctx'> {</div><div class='ctx'> 	int count, mtu = 65535;</div><div class='hunk'>@@ -326,7 +368,7 @@ static void arcdev_setup(struct net_device *dev)</div><div class='ctx'> 	dev-&gt;type = ARPHRD_ARCNET;</div><div class='ctx'> 	dev-&gt;netdev_ops = &amp;arcnet_netdev_ops;</div><div class='ctx'> 	dev-&gt;header_ops = &amp;arcnet_header_ops;</div><div class='del'>-	dev-&gt;hard_header_len = sizeof(struct archdr);</div><div class='add'>+	dev-&gt;hard_header_len = sizeof(struct arc_hardware);</div><div class='ctx'> 	dev-&gt;mtu = choose_mtu();</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;addr_len = ARCNET_ALEN;</div><div class='hunk'>@@ -336,9 +378,99 @@ static void arcdev_setup(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	/* New-style flags. */</div><div class='ctx'> 	dev-&gt;flags = IFF_BROADCAST;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void arcnet_timer(struct timer_list *t)</div><div class='add'>+{</div><div class='add'>+	struct arcnet_local *lp = timer_container_of(lp, t, timer);</div><div class='add'>+	struct net_device *dev = lp-&gt;dev;</div><div class='ctx'> </div><div class='add'>+	spin_lock_irq(&amp;lp-&gt;lock);</div><div class='add'>+</div><div class='add'>+	if (!lp-&gt;reset_in_progress &amp;&amp; !netif_carrier_ok(dev)) {</div><div class='add'>+		netif_carrier_on(dev);</div><div class='add'>+		netdev_info(dev, "link up\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_unlock_irq(&amp;lp-&gt;lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void reset_device_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct arcnet_local *lp;</div><div class='add'>+	struct net_device *dev;</div><div class='add'>+</div><div class='add'>+	lp = container_of(work, struct arcnet_local, reset_work);</div><div class='add'>+	dev = lp-&gt;dev;</div><div class='add'>+</div><div class='add'>+	/* Do not bring the network interface back up if an ifdown</div><div class='add'>+	 * was already done.</div><div class='add'>+	 */</div><div class='add'>+	if (!netif_running(dev) || !lp-&gt;reset_in_progress)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	rtnl_lock();</div><div class='add'>+</div><div class='add'>+	/* Do another check, in case of an ifdown that was triggered in</div><div class='add'>+	 * the small race window between the exit condition above and</div><div class='add'>+	 * acquiring RTNL.</div><div class='add'>+	 */</div><div class='add'>+	if (!netif_running(dev) || !lp-&gt;reset_in_progress)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	dev_close(dev);</div><div class='add'>+	dev_open(dev, NULL);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void arcnet_reply_work(struct work_struct *t)</div><div class='add'>+{</div><div class='add'>+	struct arcnet_local *lp = from_work(lp, t, reply_work);</div><div class='add'>+</div><div class='add'>+	struct sk_buff *ackskb, *skb;</div><div class='add'>+	struct sock_exterr_skb *serr;</div><div class='add'>+	struct sock *sk;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	local_irq_disable();</div><div class='add'>+	skb = lp-&gt;outgoing.skb;</div><div class='add'>+	if (!skb || !skb-&gt;sk) {</div><div class='add'>+		local_irq_enable();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sock_hold(skb-&gt;sk);</div><div class='add'>+	sk = skb-&gt;sk;</div><div class='add'>+	ackskb = skb_clone_sk(skb);</div><div class='add'>+	sock_put(skb-&gt;sk);</div><div class='add'>+</div><div class='add'>+	if (!ackskb) {</div><div class='add'>+		local_irq_enable();</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	serr = SKB_EXT_ERR(ackskb);</div><div class='add'>+	memset(serr, 0, sizeof(*serr));</div><div class='add'>+	serr-&gt;ee.ee_errno = ENOMSG;</div><div class='add'>+	serr-&gt;ee.ee_origin = SO_EE_ORIGIN_TXSTATUS;</div><div class='add'>+	serr-&gt;ee.ee_data = skb_shinfo(skb)-&gt;tskey;</div><div class='add'>+	serr-&gt;ee.ee_info = lp-&gt;reply_status;</div><div class='add'>+</div><div class='add'>+	/* finally erasing outgoing skb */</div><div class='add'>+	dev_kfree_skb(lp-&gt;outgoing.skb);</div><div class='add'>+	lp-&gt;outgoing.skb = NULL;</div><div class='add'>+</div><div class='add'>+	ackskb-&gt;dev = lp-&gt;dev;</div><div class='add'>+</div><div class='add'>+	ret = sock_queue_err_skb(sk, ackskb);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_kfree_skb_irq(ackskb);</div><div class='add'>+</div><div class='add'>+	local_irq_enable();</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct net_device *alloc_arcdev(const char *name)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev;</div><div class='hunk'>@@ -346,16 +478,32 @@ struct net_device *alloc_arcdev(const char *name)</div><div class='ctx'> 	dev = alloc_netdev(sizeof(struct arcnet_local),</div><div class='ctx'> 			   name &amp;&amp; *name ? name : "arc%d", NET_NAME_UNKNOWN,</div><div class='ctx'> 			   arcdev_setup);</div><div class='del'>-	if(dev) {</div><div class='add'>+	if (dev) {</div><div class='ctx'> 		struct arcnet_local *lp = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+		lp-&gt;dev = dev;</div><div class='ctx'> 		spin_lock_init(&amp;lp-&gt;lock);</div><div class='add'>+		timer_setup(&amp;lp-&gt;timer, arcnet_timer, 0);</div><div class='add'>+		INIT_WORK(&amp;lp-&gt;reset_work, reset_device_work);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return dev;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(alloc_arcdev);</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Open/initialize the board.  This is called sometime after booting when</div><div class='add'>+void free_arcdev(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct arcnet_local *lp = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	/* Do not cancel this at -&gt;ndo_close(), as the workqueue itself</div><div class='add'>+	 * indirectly calls the ifdown path through dev_close().</div><div class='add'>+	 */</div><div class='add'>+	cancel_work_sync(&amp;lp-&gt;reset_work);</div><div class='add'>+	free_netdev(dev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(free_arcdev);</div><div class='add'>+</div><div class='add'>+/* Open/initialize the board.  This is called sometime after booting when</div><div class='ctx'>  * the 'ifconfig' program is run.</div><div class='ctx'>  *</div><div class='ctx'>  * This routine should set everything up anew at each open, even registers</div><div class='hunk'>@@ -367,34 +515,35 @@ int arcnet_open(struct net_device *dev)</div><div class='ctx'> 	struct arcnet_local *lp = netdev_priv(dev);</div><div class='ctx'> 	int count, newmtu, error;</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_INIT,"opened.");</div><div class='add'>+	arc_printk(D_INIT, dev, "opened.");</div><div class='ctx'> </div><div class='ctx'> 	if (!try_module_get(lp-&gt;hw.owner))</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	BUGLVL(D_PROTO) {</div><div class='del'>-		BUGMSG(D_PROTO, "protocol map (default is '%c'): ",</div><div class='del'>-		       arc_proto_default-&gt;suffix);</div><div class='add'>+	if (BUGLVL(D_PROTO)) {</div><div class='add'>+		arc_printk(D_PROTO, dev, "protocol map (default is '%c'): ",</div><div class='add'>+			   arc_proto_default-&gt;suffix);</div><div class='ctx'> 		for (count = 0; count &lt; 256; count++)</div><div class='del'>-			BUGMSG2(D_PROTO, "%c", arc_proto_map[count]-&gt;suffix);</div><div class='del'>-		BUGMSG2(D_PROTO, "\n");</div><div class='add'>+			arc_cont(D_PROTO, "%c", arc_proto_map[count]-&gt;suffix);</div><div class='add'>+		arc_cont(D_PROTO, "\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	INIT_WORK(&amp;lp-&gt;reply_work, arcnet_reply_work);</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_INIT, "arcnet_open: resetting card.\n");</div><div class='add'>+	arc_printk(D_INIT, dev, "arcnet_open: resetting card.\n");</div><div class='ctx'> </div><div class='ctx'> 	/* try to put the card in a defined state - if it fails the first</div><div class='ctx'> 	 * time, actually reset it.</div><div class='ctx'> 	 */</div><div class='ctx'> 	error = -ENODEV;</div><div class='del'>-	if (ARCRESET(0) &amp;&amp; ARCRESET(1))</div><div class='add'>+	if (lp-&gt;hw.reset(dev, 0) &amp;&amp; lp-&gt;hw.reset(dev, 1))</div><div class='ctx'> 		goto out_module_put;</div><div class='ctx'> </div><div class='ctx'> 	newmtu = choose_mtu();</div><div class='ctx'> 	if (newmtu &lt; dev-&gt;mtu)</div><div class='ctx'> 		dev-&gt;mtu = newmtu;</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_INIT, "arcnet_open: mtu: %d.\n", dev-&gt;mtu);</div><div class='add'>+	arc_printk(D_INIT, dev, "arcnet_open: mtu: %d.\n", dev-&gt;mtu);</div><div class='ctx'> </div><div class='ctx'> 	/* autodetect the encapsulation for each host. */</div><div class='ctx'> 	memset(lp-&gt;default_proto, 0, sizeof(lp-&gt;default_proto));</div><div class='hunk'>@@ -425,60 +574,71 @@ int arcnet_open(struct net_device *dev)</div><div class='ctx'> 		lp-&gt;hw.open(dev);</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;dev_addr[0] == 0)</div><div class='del'>-		BUGMSG(D_NORMAL, "WARNING!  Station address 00 is reserved "</div><div class='del'>-		       "for broadcasts!\n");</div><div class='add'>+		arc_printk(D_NORMAL, dev, "WARNING!  Station address 00 is reserved for broadcasts!\n");</div><div class='ctx'> 	else if (dev-&gt;dev_addr[0] == 255)</div><div class='del'>-		BUGMSG(D_NORMAL, "WARNING!  Station address FF may confuse "</div><div class='del'>-		       "DOS networking programs!\n");</div><div class='add'>+		arc_printk(D_NORMAL, dev, "WARNING!  Station address FF may confuse DOS networking programs!\n");</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_DEBUG, "%s: %d: %s\n",__FILE__,__LINE__,__func__);</div><div class='del'>-	if (ASTATUS() &amp; RESETflag) {</div><div class='del'>-	  	BUGMSG(D_DEBUG, "%s: %d: %s\n",__FILE__,__LINE__,__func__);</div><div class='del'>-		ACOMMAND(CFLAGScmd | RESETclear);</div><div class='add'>+	arc_printk(D_DEBUG, dev, "%s: %d: %s\n", __FILE__, __LINE__, __func__);</div><div class='add'>+	if (lp-&gt;hw.status(dev) &amp; RESETflag) {</div><div class='add'>+		arc_printk(D_DEBUG, dev, "%s: %d: %s\n",</div><div class='add'>+			   __FILE__, __LINE__, __func__);</div><div class='add'>+		lp-&gt;hw.command(dev, CFLAGScmd | RESETclear);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-	BUGMSG(D_DEBUG, "%s: %d: %s\n",__FILE__,__LINE__,__func__);</div><div class='add'>+	arc_printk(D_DEBUG, dev, "%s: %d: %s\n", __FILE__, __LINE__, __func__);</div><div class='ctx'> 	/* make sure we're ready to receive IRQ's. */</div><div class='del'>-	AINTMASK(0);</div><div class='add'>+	lp-&gt;hw.intmask(dev, 0);</div><div class='ctx'> 	udelay(1);		/* give it time to set the mask before</div><div class='ctx'> 				 * we reset it again. (may not even be</div><div class='ctx'> 				 * necessary)</div><div class='ctx'> 				 */</div><div class='del'>-	BUGMSG(D_DEBUG, "%s: %d: %s\n",__FILE__,__LINE__,__func__);</div><div class='add'>+	arc_printk(D_DEBUG, dev, "%s: %d: %s\n", __FILE__, __LINE__, __func__);</div><div class='ctx'> 	lp-&gt;intmask = NORXflag | RECONflag;</div><div class='del'>-	AINTMASK(lp-&gt;intmask);</div><div class='del'>-	BUGMSG(D_DEBUG, "%s: %d: %s\n",__FILE__,__LINE__,__func__);</div><div class='add'>+	lp-&gt;hw.intmask(dev, lp-&gt;intmask);</div><div class='add'>+	arc_printk(D_DEBUG, dev, "%s: %d: %s\n", __FILE__, __LINE__, __func__);</div><div class='ctx'> </div><div class='add'>+	netif_carrier_off(dev);</div><div class='ctx'> 	netif_start_queue(dev);</div><div class='add'>+	mod_timer(&amp;lp-&gt;timer, jiffies + msecs_to_jiffies(1000));</div><div class='ctx'> </div><div class='add'>+	arcnet_led_event(dev, ARCNET_LED_EVENT_OPEN);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'>  out_module_put:</div><div class='ctx'> 	module_put(lp-&gt;hw.owner);</div><div class='ctx'> 	return error;</div><div class='ctx'> }</div><div class='del'>-</div><div class='add'>+EXPORT_SYMBOL(arcnet_open);</div><div class='ctx'> </div><div class='ctx'> /* The inverse routine to arcnet_open - shuts down the card. */</div><div class='ctx'> int arcnet_close(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct arcnet_local *lp = netdev_priv(dev);</div><div class='ctx'> </div><div class='add'>+	arcnet_led_event(dev, ARCNET_LED_EVENT_STOP);</div><div class='add'>+	timer_delete_sync(&amp;lp-&gt;timer);</div><div class='add'>+</div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='add'>+	netif_carrier_off(dev);</div><div class='add'>+</div><div class='add'>+	cancel_work_sync(&amp;lp-&gt;reply_work);</div><div class='ctx'> </div><div class='ctx'> 	/* flush TX and disable RX */</div><div class='del'>-	AINTMASK(0);</div><div class='del'>-	ACOMMAND(NOTXcmd);	/* stop transmit */</div><div class='del'>-	ACOMMAND(NORXcmd);	/* disable receive */</div><div class='add'>+	lp-&gt;hw.intmask(dev, 0);</div><div class='add'>+	lp-&gt;hw.command(dev, NOTXcmd);	/* stop transmit */</div><div class='add'>+	lp-&gt;hw.command(dev, NORXcmd);	/* disable receive */</div><div class='ctx'> 	mdelay(1);</div><div class='ctx'> </div><div class='ctx'> 	/* shut down the card */</div><div class='ctx'> 	lp-&gt;hw.close(dev);</div><div class='add'>+</div><div class='add'>+	/* reset counters */</div><div class='add'>+	lp-&gt;reset_in_progress = 0;</div><div class='add'>+</div><div class='ctx'> 	module_put(lp-&gt;hw.owner);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-</div><div class='add'>+EXPORT_SYMBOL(arcnet_close);</div><div class='ctx'> </div><div class='ctx'> static int arcnet_header(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> 			 unsigned short type, const void *daddr,</div><div class='hunk'>@@ -488,48 +648,44 @@ static int arcnet_header(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> 	uint8_t _daddr, proto_num;</div><div class='ctx'> 	struct ArcProto *proto;</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_DURING,</div><div class='del'>-	    "create header from %d to %d; protocol %d (%Xh); size %u.\n",</div><div class='del'>-	       saddr ? *(uint8_t *) saddr : -1,</div><div class='del'>-	       daddr ? *(uint8_t *) daddr : -1,</div><div class='del'>-	       type, type, len);</div><div class='del'>-</div><div class='del'>-	if (skb-&gt;len!=0 &amp;&amp; len != skb-&gt;len)</div><div class='del'>-		BUGMSG(D_NORMAL, "arcnet_header: Yikes!  skb-&gt;len(%d) != len(%d)!\n",</div><div class='del'>-		       skb-&gt;len, len);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-  	/* Type is host order - ? */</div><div class='del'>-  	if(type == ETH_P_ARCNET) {</div><div class='del'>-  		proto = arc_raw_proto;</div><div class='del'>-  		BUGMSG(D_DEBUG, "arc_raw_proto used. proto='%c'\n",proto-&gt;suffix);</div><div class='del'>-  		_daddr = daddr ? *(uint8_t *) daddr : 0;</div><div class='del'>-  	}</div><div class='del'>-	else if (!daddr) {</div><div class='del'>-		/*</div><div class='del'>-		 * if the dest addr isn't provided, we can't choose an encapsulation!</div><div class='del'>-		 * Store the packet type (eg. ETH_P_IP) for now, and we'll push on a</div><div class='del'>-		 * real header when we do rebuild_header.</div><div class='del'>-		 */</div><div class='del'>-		*(uint16_t *) skb_push(skb, 2) = type;</div><div class='del'>-		/*</div><div class='del'>-		 * XXX: Why not use skb-&gt;mac_len?</div><div class='add'>+	arc_printk(D_DURING, dev,</div><div class='add'>+		   "create header from %d to %d; protocol %d (%Xh); size %u.\n",</div><div class='add'>+		   saddr ? *(uint8_t *)saddr : -1,</div><div class='add'>+		   daddr ? *(uint8_t *)daddr : -1,</div><div class='add'>+		   type, type, len);</div><div class='add'>+</div><div class='add'>+	if (skb-&gt;len != 0 &amp;&amp; len != skb-&gt;len)</div><div class='add'>+		arc_printk(D_NORMAL, dev, "arcnet_header: Yikes!  skb-&gt;len(%d) != len(%d)!\n",</div><div class='add'>+			   skb-&gt;len, len);</div><div class='add'>+</div><div class='add'>+	/* Type is host order - ? */</div><div class='add'>+	if (type == ETH_P_ARCNET) {</div><div class='add'>+		proto = arc_raw_proto;</div><div class='add'>+		arc_printk(D_DEBUG, dev, "arc_raw_proto used. proto='%c'\n",</div><div class='add'>+			   proto-&gt;suffix);</div><div class='add'>+		_daddr = daddr ? *(uint8_t *)daddr : 0;</div><div class='add'>+	} else if (!daddr) {</div><div class='add'>+		/* if the dest addr isn't provided, we can't choose an</div><div class='add'>+		 * encapsulation!  Store the packet type (eg. ETH_P_IP)</div><div class='add'>+		 * for now, and we'll push on a real header when we do</div><div class='add'>+		 * rebuild_header.</div><div class='ctx'> 		 */</div><div class='add'>+		*(uint16_t *)skb_push(skb, 2) = type;</div><div class='add'>+		/* XXX: Why not use skb-&gt;mac_len? */</div><div class='ctx'> 		if (skb-&gt;network_header - skb-&gt;mac_header != 2)</div><div class='del'>-			BUGMSG(D_NORMAL, "arcnet_header: Yikes!  diff (%d) is not 2!\n",</div><div class='del'>-			       (int)(skb-&gt;network_header - skb-&gt;mac_header));</div><div class='add'>+			arc_printk(D_NORMAL, dev, "arcnet_header: Yikes!  diff (%u) is not 2!\n",</div><div class='add'>+				   skb-&gt;network_header - skb-&gt;mac_header);</div><div class='ctx'> 		return -2;	/* return error -- can't transmit yet! */</div><div class='del'>-	}</div><div class='del'>-	else {</div><div class='add'>+	} else {</div><div class='ctx'> 		/* otherwise, we can just add the header as usual. */</div><div class='del'>-		_daddr = *(uint8_t *) daddr;</div><div class='add'>+		_daddr = *(uint8_t *)daddr;</div><div class='ctx'> 		proto_num = lp-&gt;default_proto[_daddr];</div><div class='ctx'> 		proto = arc_proto_map[proto_num];</div><div class='del'>-		BUGMSG(D_DURING, "building header for %02Xh using protocol '%c'\n",</div><div class='del'>-		       proto_num, proto-&gt;suffix);</div><div class='add'>+		arc_printk(D_DURING, dev, "building header for %02Xh using protocol '%c'\n",</div><div class='add'>+			   proto_num, proto-&gt;suffix);</div><div class='ctx'> 		if (proto == &amp;arc_proto_null &amp;&amp; arc_bcast_proto != proto) {</div><div class='del'>-			BUGMSG(D_DURING, "actually, let's use '%c' instead.\n",</div><div class='del'>-			       arc_bcast_proto-&gt;suffix);</div><div class='add'>+			arc_printk(D_DURING, dev, "actually, let's use '%c' instead.\n",</div><div class='add'>+				   arc_bcast_proto-&gt;suffix);</div><div class='ctx'> 			proto = arc_bcast_proto;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -538,7 +694,7 @@ static int arcnet_header(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> /* Called by the kernel in order to transmit a packet. */</div><div class='ctx'> netdev_tx_t arcnet_send_packet(struct sk_buff *skb,</div><div class='del'>-				     struct net_device *dev)</div><div class='add'>+			       struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct arcnet_local *lp = netdev_priv(dev);</div><div class='ctx'> 	struct archdr *pkt;</div><div class='hunk'>@@ -546,23 +702,24 @@ netdev_tx_t arcnet_send_packet(struct sk_buff *skb,</div><div class='ctx'> 	struct ArcProto *proto;</div><div class='ctx'> 	int txbuf;</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-	int freeskb, retval;</div><div class='add'>+	int retval;</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_DURING,</div><div class='del'>-	       "transmit requested (status=%Xh, txbufs=%d/%d, len=%d, protocol %x)\n",</div><div class='del'>-	       ASTATUS(), lp-&gt;cur_tx, lp-&gt;next_tx, skb-&gt;len,skb-&gt;protocol);</div><div class='add'>+	arc_printk(D_DURING, dev,</div><div class='add'>+		   "transmit requested (status=%Xh, txbufs=%d/%d, len=%d, protocol %x)\n",</div><div class='add'>+		   lp-&gt;hw.status(dev), lp-&gt;cur_tx, lp-&gt;next_tx, skb-&gt;len, skb-&gt;protocol);</div><div class='ctx'> </div><div class='del'>-	pkt = (struct archdr *) skb-&gt;data;</div><div class='add'>+	pkt = (struct archdr *)skb-&gt;data;</div><div class='ctx'> 	soft = &amp;pkt-&gt;soft.rfc1201;</div><div class='ctx'> 	proto = arc_proto_map[soft-&gt;proto];</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_SKB_SIZE, "skb: transmitting %d bytes to %02X\n",</div><div class='del'>-		skb-&gt;len, pkt-&gt;hard.dest);</div><div class='del'>-	BUGLVL(D_SKB) arcnet_dump_skb(dev, skb, "tx");</div><div class='add'>+	arc_printk(D_SKB_SIZE, dev, "skb: transmitting %d bytes to %02X\n",</div><div class='add'>+		   skb-&gt;len, pkt-&gt;hard.dest);</div><div class='add'>+	if (BUGLVL(D_SKB))</div><div class='add'>+		arcnet_dump_skb(dev, skb, "tx");</div><div class='ctx'> </div><div class='ctx'> 	/* fits in one packet? */</div><div class='ctx'> 	if (skb-&gt;len - ARC_HDR_SIZE &gt; XMTU &amp;&amp; !proto-&gt;continue_tx) {</div><div class='del'>-		BUGMSG(D_NORMAL, "fixme: packet too large: compensating badly!\n");</div><div class='add'>+		arc_printk(D_NORMAL, dev, "fixme: packet too large: compensating badly!\n");</div><div class='ctx'> 		dev_kfree_skb(skb);</div><div class='ctx'> 		return NETDEV_TX_OK;	/* don't try again */</div><div class='ctx'> 	}</div><div class='hunk'>@@ -571,96 +728,94 @@ netdev_tx_t arcnet_send_packet(struct sk_buff *skb,</div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;lp-&gt;lock, flags);</div><div class='del'>-	AINTMASK(0);</div><div class='del'>-	if(lp-&gt;next_tx == -1)</div><div class='add'>+	lp-&gt;hw.intmask(dev, 0);</div><div class='add'>+	if (lp-&gt;next_tx == -1)</div><div class='ctx'> 		txbuf = get_arcbuf(dev);</div><div class='del'>-	else {</div><div class='add'>+	else</div><div class='ctx'> 		txbuf = -1;</div><div class='del'>-	}</div><div class='add'>+</div><div class='ctx'> 	if (txbuf != -1) {</div><div class='add'>+		lp-&gt;outgoing.skb = skb;</div><div class='ctx'> 		if (proto-&gt;prepare_tx(dev, pkt, skb-&gt;len, txbuf) &amp;&amp;</div><div class='ctx'> 		    !proto-&gt;ack_tx) {</div><div class='ctx'> 			/* done right away and we don't want to acknowledge</div><div class='del'>-			   the package later - forget about it now */</div><div class='add'>+			 *  the package later - forget about it now</div><div class='add'>+			 */</div><div class='ctx'> 			dev-&gt;stats.tx_bytes += skb-&gt;len;</div><div class='del'>-			freeskb = 1;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			/* do it the 'split' way */</div><div class='ctx'> 			lp-&gt;outgoing.proto = proto;</div><div class='ctx'> 			lp-&gt;outgoing.skb = skb;</div><div class='ctx'> 			lp-&gt;outgoing.pkt = pkt;</div><div class='ctx'> </div><div class='del'>-			freeskb = 0;</div><div class='del'>-</div><div class='ctx'> 			if (proto-&gt;continue_tx &amp;&amp;</div><div class='ctx'> 			    proto-&gt;continue_tx(dev, txbuf)) {</div><div class='del'>-			  BUGMSG(D_NORMAL,</div><div class='del'>-				 "bug! continue_tx finished the first time! "</div><div class='del'>-				 "(proto='%c')\n", proto-&gt;suffix);</div><div class='add'>+				arc_printk(D_NORMAL, dev,</div><div class='add'>+					   "bug! continue_tx finished the first time! (proto='%c')\n",</div><div class='add'>+					   proto-&gt;suffix);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 		retval = NETDEV_TX_OK;</div><div class='ctx'> 		lp-&gt;next_tx = txbuf;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		retval = NETDEV_TX_BUSY;</div><div class='del'>-		freeskb = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_DEBUG, "%s: %d: %s, status: %x\n",__FILE__,__LINE__,__func__,ASTATUS());</div><div class='add'>+	arc_printk(D_DEBUG, dev, "%s: %d: %s, status: %x\n",</div><div class='add'>+		   __FILE__, __LINE__, __func__, lp-&gt;hw.status(dev));</div><div class='ctx'> 	/* make sure we didn't ignore a TX IRQ while we were in here */</div><div class='del'>-	AINTMASK(0);</div><div class='add'>+	lp-&gt;hw.intmask(dev, 0);</div><div class='add'>+</div><div class='add'>+	arc_printk(D_DEBUG, dev, "%s: %d: %s\n", __FILE__, __LINE__, __func__);</div><div class='add'>+	lp-&gt;intmask |= TXFREEflag | EXCNAKflag;</div><div class='add'>+	lp-&gt;hw.intmask(dev, lp-&gt;intmask);</div><div class='add'>+	arc_printk(D_DEBUG, dev, "%s: %d: %s, status: %x\n",</div><div class='add'>+		   __FILE__, __LINE__, __func__, lp-&gt;hw.status(dev));</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_DEBUG, "%s: %d: %s\n",__FILE__,__LINE__,__func__);</div><div class='del'>-	lp-&gt;intmask |= TXFREEflag|EXCNAKflag;</div><div class='del'>-	AINTMASK(lp-&gt;intmask);</div><div class='del'>-	BUGMSG(D_DEBUG, "%s: %d: %s, status: %x\n",__FILE__,__LINE__,__func__,ASTATUS());</div><div class='add'>+	arcnet_led_event(dev, ARCNET_LED_EVENT_TX);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);</div><div class='del'>-	if (freeskb) {</div><div class='del'>-		dev_kfree_skb(skb);</div><div class='del'>-	}</div><div class='ctx'> 	return retval;		/* no need to try again */</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(arcnet_send_packet);</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Actually start transmitting a packet that was loaded into a buffer</div><div class='add'>+/* Actually start transmitting a packet that was loaded into a buffer</div><div class='ctx'>  * by prepare_tx.  This should _only_ be called by the interrupt handler.</div><div class='ctx'>  */</div><div class='ctx'> static int go_tx(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct arcnet_local *lp = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_DURING, "go_tx: status=%Xh, intmask=%Xh, next_tx=%d, cur_tx=%d\n",</div><div class='del'>-	       ASTATUS(), lp-&gt;intmask, lp-&gt;next_tx, lp-&gt;cur_tx);</div><div class='add'>+	arc_printk(D_DURING, dev, "go_tx: status=%Xh, intmask=%Xh, next_tx=%d, cur_tx=%d\n",</div><div class='add'>+		   lp-&gt;hw.status(dev), lp-&gt;intmask, lp-&gt;next_tx, lp-&gt;cur_tx);</div><div class='ctx'> </div><div class='ctx'> 	if (lp-&gt;cur_tx != -1 || lp-&gt;next_tx == -1)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	BUGLVL(D_TX) arcnet_dump_packet(dev, lp-&gt;next_tx, "go_tx", 0);</div><div class='add'>+	if (BUGLVL(D_TX))</div><div class='add'>+		arcnet_dump_packet(dev, lp-&gt;next_tx, "go_tx", 0);</div><div class='ctx'> </div><div class='ctx'> 	lp-&gt;cur_tx = lp-&gt;next_tx;</div><div class='ctx'> 	lp-&gt;next_tx = -1;</div><div class='ctx'> </div><div class='ctx'> 	/* start sending */</div><div class='del'>-	ACOMMAND(TXcmd | (lp-&gt;cur_tx &lt;&lt; 3));</div><div class='add'>+	lp-&gt;hw.command(dev, TXcmd | (lp-&gt;cur_tx &lt;&lt; 3));</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;stats.tx_packets++;</div><div class='ctx'> 	lp-&gt;lasttrans_dest = lp-&gt;lastload_dest;</div><div class='ctx'> 	lp-&gt;lastload_dest = 0;</div><div class='ctx'> 	lp-&gt;excnak_pending = 0;</div><div class='del'>-	lp-&gt;intmask |= TXFREEflag|EXCNAKflag;</div><div class='add'>+	lp-&gt;intmask |= TXFREEflag | EXCNAKflag;</div><div class='ctx'> </div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> /* Called by the kernel when transmit times out */</div><div class='del'>-void arcnet_timeout(struct net_device *dev)</div><div class='add'>+void arcnet_timeout(struct net_device *dev, unsigned int txqueue)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	struct arcnet_local *lp = netdev_priv(dev);</div><div class='del'>-	int status = ASTATUS();</div><div class='add'>+	int status = lp-&gt;hw.status(dev);</div><div class='ctx'> 	char *msg;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;lp-&gt;lock, flags);</div><div class='hunk'>@@ -670,30 +825,29 @@ void arcnet_timeout(struct net_device *dev)</div><div class='ctx'> 		msg = "";</div><div class='ctx'> 		dev-&gt;stats.tx_aborted_errors++;</div><div class='ctx'> 		lp-&gt;timed_out = 1;</div><div class='del'>-		ACOMMAND(NOTXcmd | (lp-&gt;cur_tx &lt;&lt; 3));</div><div class='add'>+		lp-&gt;hw.command(dev, NOTXcmd | (lp-&gt;cur_tx &lt;&lt; 3));</div><div class='ctx'> 	}</div><div class='ctx'> 	dev-&gt;stats.tx_errors++;</div><div class='ctx'> </div><div class='ctx'> 	/* make sure we didn't miss a TX or a EXC NAK IRQ */</div><div class='del'>-	AINTMASK(0);</div><div class='del'>-	lp-&gt;intmask |= TXFREEflag|EXCNAKflag;</div><div class='del'>-	AINTMASK(lp-&gt;intmask);</div><div class='del'>-	</div><div class='add'>+	lp-&gt;hw.intmask(dev, 0);</div><div class='add'>+	lp-&gt;intmask |= TXFREEflag | EXCNAKflag;</div><div class='add'>+	lp-&gt;hw.intmask(dev, lp-&gt;intmask);</div><div class='add'>+</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);</div><div class='ctx'> </div><div class='del'>-	if (time_after(jiffies, lp-&gt;last_timeout + 10*HZ)) {</div><div class='del'>-		BUGMSG(D_EXTRA, "tx timed out%s (status=%Xh, intmask=%Xh, dest=%02Xh)\n",</div><div class='del'>-		       msg, status, lp-&gt;intmask, lp-&gt;lasttrans_dest);</div><div class='add'>+	if (time_after(jiffies, lp-&gt;last_timeout + 10 * HZ)) {</div><div class='add'>+		arc_printk(D_EXTRA, dev, "tx timed out%s (status=%Xh, intmask=%Xh, dest=%02Xh)\n",</div><div class='add'>+			   msg, status, lp-&gt;intmask, lp-&gt;lasttrans_dest);</div><div class='ctx'> 		lp-&gt;last_timeout = jiffies;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (lp-&gt;cur_tx == -1)</div><div class='ctx'> 		netif_wake_queue(dev);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(arcnet_timeout);</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The typical workload of the driver: Handle the network interface</div><div class='add'>+/* The typical workload of the driver: Handle the network interface</div><div class='ctx'>  * interrupts. Establish which device needs attention, and call the correct</div><div class='ctx'>  * chipset interrupt handler.</div><div class='ctx'>  */</div><div class='hunk'>@@ -702,128 +856,136 @@ irqreturn_t arcnet_interrupt(int irq, void *dev_id)</div><div class='ctx'> 	struct net_device *dev = dev_id;</div><div class='ctx'> 	struct arcnet_local *lp;</div><div class='ctx'> 	int recbuf, status, diagstatus, didsomething, boguscount;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> 	int retval = IRQ_NONE;</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_DURING, "\n");</div><div class='add'>+	arc_printk(D_DURING, dev, "\n");</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_DURING, "in arcnet_interrupt\n");</div><div class='add'>+	arc_printk(D_DURING, dev, "in arcnet_interrupt\n");</div><div class='ctx'> </div><div class='ctx'> 	lp = netdev_priv(dev);</div><div class='ctx'> 	BUG_ON(!lp);</div><div class='del'>-		</div><div class='del'>-	spin_lock(&amp;lp-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * RESET flag was enabled - if device is not running, we must clear it right</div><div class='del'>-	 * away (but nothing else).</div><div class='add'>+	spin_lock_irqsave(&amp;lp-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	if (lp-&gt;reset_in_progress)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* RESET flag was enabled - if device is not running, we must</div><div class='add'>+	 * clear it right away (but nothing else).</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!netif_running(dev)) {</div><div class='del'>-		if (ASTATUS() &amp; RESETflag)</div><div class='del'>-			ACOMMAND(CFLAGScmd | RESETclear);</div><div class='del'>-		AINTMASK(0);</div><div class='del'>-		spin_unlock(&amp;lp-&gt;lock);</div><div class='add'>+		if (lp-&gt;hw.status(dev) &amp; RESETflag)</div><div class='add'>+			lp-&gt;hw.command(dev, CFLAGScmd | RESETclear);</div><div class='add'>+		lp-&gt;hw.intmask(dev, 0);</div><div class='add'>+		spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);</div><div class='ctx'> 		return retval;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_DURING, "in arcnet_inthandler (status=%Xh, intmask=%Xh)\n",</div><div class='del'>-	       ASTATUS(), lp-&gt;intmask);</div><div class='add'>+	arc_printk(D_DURING, dev, "in arcnet_inthandler (status=%Xh, intmask=%Xh)\n",</div><div class='add'>+		   lp-&gt;hw.status(dev), lp-&gt;intmask);</div><div class='ctx'> </div><div class='ctx'> 	boguscount = 5;</div><div class='ctx'> 	do {</div><div class='del'>-		status = ASTATUS();</div><div class='del'>-                diagstatus = (status &gt;&gt; 8) &amp; 0xFF;</div><div class='add'>+		status = lp-&gt;hw.status(dev);</div><div class='add'>+		diagstatus = (status &gt;&gt; 8) &amp; 0xFF;</div><div class='ctx'> </div><div class='del'>-		BUGMSG(D_DEBUG, "%s: %d: %s: status=%x\n",</div><div class='del'>-			__FILE__,__LINE__,__func__,status);</div><div class='add'>+		arc_printk(D_DEBUG, dev, "%s: %d: %s: status=%x\n",</div><div class='add'>+			   __FILE__, __LINE__, __func__, status);</div><div class='ctx'> 		didsomething = 0;</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * RESET flag was enabled - card is resetting and if RX is</div><div class='add'>+		/* RESET flag was enabled - card is resetting and if RX is</div><div class='ctx'> 		 * disabled, it's NOT because we just got a packet.</div><div class='del'>-		 * </div><div class='del'>-		 * The card is in an undefined state.  Clear it out and start over.</div><div class='add'>+		 *</div><div class='add'>+		 * The card is in an undefined state.</div><div class='add'>+		 * Clear it out and start over.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (status &amp; RESETflag) {</div><div class='del'>-			BUGMSG(D_NORMAL, "spurious reset (status=%Xh)\n", status);</div><div class='del'>-			arcnet_close(dev);</div><div class='del'>-			arcnet_open(dev);</div><div class='add'>+			arc_printk(D_NORMAL, dev, "spurious reset (status=%Xh)\n",</div><div class='add'>+				   status);</div><div class='add'>+</div><div class='add'>+			lp-&gt;reset_in_progress = 1;</div><div class='add'>+			netif_stop_queue(dev);</div><div class='add'>+			netif_carrier_off(dev);</div><div class='add'>+			schedule_work(&amp;lp-&gt;reset_work);</div><div class='ctx'> </div><div class='ctx'> 			/* get out of the interrupt handler! */</div><div class='del'>-			break;</div><div class='add'>+			goto out;</div><div class='ctx'> 		}</div><div class='del'>-		/* </div><div class='del'>-		 * RX is inhibited - we must have received something. Prepare to</div><div class='del'>-		 * receive into the next buffer.</div><div class='del'>-		 * </div><div class='del'>-		 * We don't actually copy the received packet from the card until</div><div class='del'>-		 * after the transmit handler runs (and possibly launches the next</div><div class='del'>-		 * tx); this should improve latency slightly if we get both types</div><div class='del'>-		 * of interrupts at once. </div><div class='add'>+		/* RX is inhibited - we must have received something.</div><div class='add'>+		 * Prepare to receive into the next buffer.</div><div class='add'>+		 *</div><div class='add'>+		 * We don't actually copy the received packet from the card</div><div class='add'>+		 * until after the transmit handler runs (and possibly</div><div class='add'>+		 * launches the next tx); this should improve latency slightly</div><div class='add'>+		 * if we get both types of interrupts at once.</div><div class='ctx'> 		 */</div><div class='ctx'> 		recbuf = -1;</div><div class='ctx'> 		if (status &amp; lp-&gt;intmask &amp; NORXflag) {</div><div class='ctx'> 			recbuf = lp-&gt;cur_rx;</div><div class='del'>-			BUGMSG(D_DURING, "Buffer #%d: receive irq (status=%Xh)\n",</div><div class='del'>-			       recbuf, status);</div><div class='add'>+			arc_printk(D_DURING, dev, "Buffer #%d: receive irq (status=%Xh)\n",</div><div class='add'>+				   recbuf, status);</div><div class='ctx'> </div><div class='ctx'> 			lp-&gt;cur_rx = get_arcbuf(dev);</div><div class='ctx'> 			if (lp-&gt;cur_rx != -1) {</div><div class='del'>-				BUGMSG(D_DURING, "enabling receive to buffer #%d\n",</div><div class='del'>-				       lp-&gt;cur_rx);</div><div class='del'>-				ACOMMAND(RXcmd | (lp-&gt;cur_rx &lt;&lt; 3) | RXbcasts);</div><div class='add'>+				arc_printk(D_DURING, dev, "enabling receive to buffer #%d\n",</div><div class='add'>+					   lp-&gt;cur_rx);</div><div class='add'>+				lp-&gt;hw.command(dev, RXcmd | (lp-&gt;cur_rx &lt;&lt; 3) | RXbcasts);</div><div class='ctx'> 			}</div><div class='ctx'> 			didsomething++;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if((diagstatus &amp; EXCNAKflag)) {</div><div class='del'>-			BUGMSG(D_DURING, "EXCNAK IRQ (diagstat=%Xh)\n",</div><div class='del'>-			       diagstatus);</div><div class='add'>+		if ((diagstatus &amp; EXCNAKflag)) {</div><div class='add'>+			arc_printk(D_DURING, dev, "EXCNAK IRQ (diagstat=%Xh)\n",</div><div class='add'>+				   diagstatus);</div><div class='ctx'> </div><div class='del'>-                        ACOMMAND(NOTXcmd);      /* disable transmit */</div><div class='del'>-                        lp-&gt;excnak_pending = 1;</div><div class='add'>+			lp-&gt;hw.command(dev, NOTXcmd);      /* disable transmit */</div><div class='add'>+			lp-&gt;excnak_pending = 1;</div><div class='ctx'> </div><div class='del'>-                        ACOMMAND(EXCNAKclear);</div><div class='add'>+			lp-&gt;hw.command(dev, EXCNAKclear);</div><div class='ctx'> 			lp-&gt;intmask &amp;= ~(EXCNAKflag);</div><div class='del'>-                        didsomething++;</div><div class='del'>-                }</div><div class='del'>-</div><div class='add'>+			didsomething++;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		/* a transmit finished, and we're interested in it. */</div><div class='ctx'> 		if ((status &amp; lp-&gt;intmask &amp; TXFREEflag) || lp-&gt;timed_out) {</div><div class='del'>-			lp-&gt;intmask &amp;= ~(TXFREEflag|EXCNAKflag);</div><div class='add'>+			int ackstatus;</div><div class='add'>+			lp-&gt;intmask &amp;= ~(TXFREEflag | EXCNAKflag);</div><div class='ctx'> </div><div class='del'>-			BUGMSG(D_DURING, "TX IRQ (stat=%Xh)\n", status);</div><div class='add'>+			if (status &amp; TXACKflag)</div><div class='add'>+				ackstatus = 2;</div><div class='add'>+			else if (lp-&gt;excnak_pending)</div><div class='add'>+				ackstatus = 1;</div><div class='add'>+			else</div><div class='add'>+				ackstatus = 0;</div><div class='add'>+</div><div class='add'>+			arc_printk(D_DURING, dev, "TX IRQ (stat=%Xh)\n",</div><div class='add'>+				   status);</div><div class='ctx'> </div><div class='ctx'> 			if (lp-&gt;cur_tx != -1 &amp;&amp; !lp-&gt;timed_out) {</div><div class='del'>-				if(!(status &amp; TXACKflag)) {</div><div class='add'>+				if (!(status &amp; TXACKflag)) {</div><div class='ctx'> 					if (lp-&gt;lasttrans_dest != 0) {</div><div class='del'>-						BUGMSG(D_EXTRA,</div><div class='del'>-						       "transmit was not acknowledged! "</div><div class='del'>-						       "(status=%Xh, dest=%02Xh)\n",</div><div class='del'>-						       status, lp-&gt;lasttrans_dest);</div><div class='add'>+						arc_printk(D_EXTRA, dev,</div><div class='add'>+							   "transmit was not acknowledged! (status=%Xh, dest=%02Xh)\n",</div><div class='add'>+							   status,</div><div class='add'>+							   lp-&gt;lasttrans_dest);</div><div class='ctx'> 						dev-&gt;stats.tx_errors++;</div><div class='ctx'> 						dev-&gt;stats.tx_carrier_errors++;</div><div class='ctx'> 					} else {</div><div class='del'>-						BUGMSG(D_DURING,</div><div class='del'>-						       "broadcast was not acknowledged; that's normal "</div><div class='del'>-						       "(status=%Xh, dest=%02Xh)\n",</div><div class='del'>-						       status, lp-&gt;lasttrans_dest);</div><div class='add'>+						arc_printk(D_DURING, dev,</div><div class='add'>+							   "broadcast was not acknowledged; that's normal (status=%Xh, dest=%02Xh)\n",</div><div class='add'>+							   status,</div><div class='add'>+							   lp-&gt;lasttrans_dest);</div><div class='ctx'> 					}</div><div class='ctx'> 				}</div><div class='ctx'> </div><div class='ctx'> 				if (lp-&gt;outgoing.proto &amp;&amp;</div><div class='ctx'> 				    lp-&gt;outgoing.proto-&gt;ack_tx) {</div><div class='del'>-				  int ackstatus;</div><div class='del'>-				  if(status &amp; TXACKflag)</div><div class='del'>-                                    ackstatus=2;</div><div class='del'>-                                  else if(lp-&gt;excnak_pending)</div><div class='del'>-                                    ackstatus=1;</div><div class='del'>-                                  else</div><div class='del'>-                                    ackstatus=0;</div><div class='del'>-</div><div class='del'>-                                  lp-&gt;outgoing.proto</div><div class='del'>-                                    -&gt;ack_tx(dev, ackstatus);</div><div class='add'>+					lp-&gt;outgoing.proto</div><div class='add'>+						-&gt;ack_tx(dev, ackstatus);</div><div class='ctx'> 				}</div><div class='add'>+				lp-&gt;reply_status = ackstatus;</div><div class='add'>+				queue_work(system_bh_highpri_wq, &amp;lp-&gt;reply_work);</div><div class='ctx'> 			}</div><div class='ctx'> 			if (lp-&gt;cur_tx != -1)</div><div class='ctx'> 				release_arcbuf(dev, lp-&gt;cur_tx);</div><div class='hunk'>@@ -836,17 +998,18 @@ irqreturn_t arcnet_interrupt(int irq, void *dev_id)</div><div class='ctx'> 			go_tx(dev);</div><div class='ctx'> </div><div class='ctx'> 			/* continue a split packet, if any */</div><div class='del'>-			if (lp-&gt;outgoing.proto &amp;&amp; lp-&gt;outgoing.proto-&gt;continue_tx) {</div><div class='add'>+			if (lp-&gt;outgoing.proto &amp;&amp;</div><div class='add'>+			    lp-&gt;outgoing.proto-&gt;continue_tx) {</div><div class='ctx'> 				int txbuf = get_arcbuf(dev);</div><div class='add'>+</div><div class='ctx'> 				if (txbuf != -1) {</div><div class='ctx'> 					if (lp-&gt;outgoing.proto-&gt;continue_tx(dev, txbuf)) {</div><div class='ctx'> 						/* that was the last segment */</div><div class='ctx'> 						dev-&gt;stats.tx_bytes += lp-&gt;outgoing.skb-&gt;len;</div><div class='del'>-						if(!lp-&gt;outgoing.proto-&gt;ack_tx)</div><div class='del'>-						  {</div><div class='del'>-						    dev_kfree_skb_irq(lp-&gt;outgoing.skb);</div><div class='del'>-						    lp-&gt;outgoing.proto = NULL;</div><div class='del'>-						  }</div><div class='add'>+						if (!lp-&gt;outgoing.proto-&gt;ack_tx) {</div><div class='add'>+							dev_kfree_skb_irq(lp-&gt;outgoing.skb);</div><div class='add'>+							lp-&gt;outgoing.proto = NULL;</div><div class='add'>+						}</div><div class='ctx'> 					}</div><div class='ctx'> 					lp-&gt;next_tx = txbuf;</div><div class='ctx'> 				}</div><div class='hunk'>@@ -857,7 +1020,8 @@ irqreturn_t arcnet_interrupt(int irq, void *dev_id)</div><div class='ctx'> 		}</div><div class='ctx'> 		/* now process the received packet, if any */</div><div class='ctx'> 		if (recbuf != -1) {</div><div class='del'>-			BUGLVL(D_RX) arcnet_dump_packet(dev, recbuf, "rx irq", 0);</div><div class='add'>+			if (BUGLVL(D_RX))</div><div class='add'>+				arcnet_dump_packet(dev, recbuf, "rx irq", 0);</div><div class='ctx'> </div><div class='ctx'> 			arcnet_rx(dev, recbuf);</div><div class='ctx'> 			release_arcbuf(dev, recbuf);</div><div class='hunk'>@@ -865,32 +1029,39 @@ irqreturn_t arcnet_interrupt(int irq, void *dev_id)</div><div class='ctx'> 			didsomething++;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (status &amp; lp-&gt;intmask &amp; RECONflag) {</div><div class='del'>-			ACOMMAND(CFLAGScmd | CONFIGclear);</div><div class='add'>+			lp-&gt;hw.command(dev, CFLAGScmd | CONFIGclear);</div><div class='ctx'> 			dev-&gt;stats.tx_carrier_errors++;</div><div class='ctx'> </div><div class='del'>-			BUGMSG(D_RECON, "Network reconfiguration detected (status=%Xh)\n",</div><div class='del'>-			       status);</div><div class='add'>+			arc_printk(D_RECON, dev, "Network reconfiguration detected (status=%Xh)\n",</div><div class='add'>+				   status);</div><div class='add'>+			if (netif_carrier_ok(dev)) {</div><div class='add'>+				netif_carrier_off(dev);</div><div class='add'>+				netdev_info(dev, "link down\n");</div><div class='add'>+			}</div><div class='add'>+			mod_timer(&amp;lp-&gt;timer, jiffies + msecs_to_jiffies(1000));</div><div class='add'>+</div><div class='add'>+			arcnet_led_event(dev, ARCNET_LED_EVENT_RECON);</div><div class='ctx'> 			/* MYRECON bit is at bit 7 of diagstatus */</div><div class='del'>-			if(diagstatus &amp; 0x80)</div><div class='del'>-				BUGMSG(D_RECON,"Put out that recon myself\n");</div><div class='add'>+			if (diagstatus &amp; 0x80)</div><div class='add'>+				arc_printk(D_RECON, dev, "Put out that recon myself\n");</div><div class='ctx'> </div><div class='ctx'> 			/* is the RECON info empty or old? */</div><div class='ctx'> 			if (!lp-&gt;first_recon || !lp-&gt;last_recon ||</div><div class='ctx'> 			    time_after(jiffies, lp-&gt;last_recon + HZ * 10)) {</div><div class='ctx'> 				if (lp-&gt;network_down)</div><div class='del'>-					BUGMSG(D_NORMAL, "reconfiguration detected: cabling restored?\n");</div><div class='add'>+					arc_printk(D_NORMAL, dev, "reconfiguration detected: cabling restored?\n");</div><div class='ctx'> 				lp-&gt;first_recon = lp-&gt;last_recon = jiffies;</div><div class='ctx'> 				lp-&gt;num_recons = lp-&gt;network_down = 0;</div><div class='ctx'> </div><div class='del'>-				BUGMSG(D_DURING, "recon: clearing counters.\n");</div><div class='add'>+				arc_printk(D_DURING, dev, "recon: clearing counters.\n");</div><div class='ctx'> 			} else {	/* add to current RECON counter */</div><div class='ctx'> 				lp-&gt;last_recon = jiffies;</div><div class='ctx'> 				lp-&gt;num_recons++;</div><div class='ctx'> </div><div class='del'>-				BUGMSG(D_DURING, "recon: counter=%d, time=%lds, net=%d\n",</div><div class='del'>-				       lp-&gt;num_recons,</div><div class='del'>-				 (lp-&gt;last_recon - lp-&gt;first_recon) / HZ,</div><div class='del'>-				       lp-&gt;network_down);</div><div class='add'>+				arc_printk(D_DURING, dev, "recon: counter=%d, time=%lds, net=%d\n",</div><div class='add'>+					   lp-&gt;num_recons,</div><div class='add'>+					   (lp-&gt;last_recon - lp-&gt;first_recon) / HZ,</div><div class='add'>+					   lp-&gt;network_down);</div><div class='ctx'> </div><div class='ctx'> 				/* if network is marked up;</div><div class='ctx'> 				 * and first_recon and last_recon are 60+ apart;</div><div class='hunk'>@@ -902,93 +1073,95 @@ irqreturn_t arcnet_interrupt(int irq, void *dev_id)</div><div class='ctx'> 				    (lp-&gt;last_recon - lp-&gt;first_recon) &lt;= HZ * 60 &amp;&amp;</div><div class='ctx'> 				    lp-&gt;num_recons &gt;= RECON_THRESHOLD) {</div><div class='ctx'> 					lp-&gt;network_down = 1;</div><div class='del'>-					BUGMSG(D_NORMAL, "many reconfigurations detected: cabling problem?\n");</div><div class='add'>+					arc_printk(D_NORMAL, dev, "many reconfigurations detected: cabling problem?\n");</div><div class='ctx'> 				} else if (!lp-&gt;network_down &amp;&amp;</div><div class='ctx'> 					   lp-&gt;last_recon - lp-&gt;first_recon &gt; HZ * 60) {</div><div class='del'>-					/* reset counters if we've gone for over a minute. */</div><div class='add'>+					/* reset counters if we've gone for</div><div class='add'>+					 *  over a minute.</div><div class='add'>+					 */</div><div class='ctx'> 					lp-&gt;first_recon = lp-&gt;last_recon;</div><div class='ctx'> 					lp-&gt;num_recons = 1;</div><div class='ctx'> 				}</div><div class='ctx'> 			}</div><div class='ctx'> 		} else if (lp-&gt;network_down &amp;&amp;</div><div class='del'>-				time_after(jiffies, lp-&gt;last_recon + HZ * 10)) {</div><div class='add'>+			   time_after(jiffies, lp-&gt;last_recon + HZ * 10)) {</div><div class='ctx'> 			if (lp-&gt;network_down)</div><div class='del'>-				BUGMSG(D_NORMAL, "cabling restored?\n");</div><div class='add'>+				arc_printk(D_NORMAL, dev, "cabling restored?\n");</div><div class='ctx'> 			lp-&gt;first_recon = lp-&gt;last_recon = 0;</div><div class='ctx'> 			lp-&gt;num_recons = lp-&gt;network_down = 0;</div><div class='ctx'> </div><div class='del'>-			BUGMSG(D_DURING, "not recon: clearing counters anyway.\n");</div><div class='add'>+			arc_printk(D_DURING, dev, "not recon: clearing counters anyway.\n");</div><div class='add'>+			netif_carrier_on(dev);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if(didsomething) {</div><div class='add'>+		if (didsomething)</div><div class='ctx'> 			retval |= IRQ_HANDLED;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	while (--boguscount &amp;&amp; didsomething);</div><div class='del'>-</div><div class='del'>-	BUGMSG(D_DURING, "arcnet_interrupt complete (status=%Xh, count=%d)\n",</div><div class='del'>-	       ASTATUS(), boguscount);</div><div class='del'>-	BUGMSG(D_DURING, "\n");</div><div class='add'>+	} while (--boguscount &amp;&amp; didsomething);</div><div class='ctx'> </div><div class='add'>+	arc_printk(D_DURING, dev, "arcnet_interrupt complete (status=%Xh, count=%d)\n",</div><div class='add'>+		   lp-&gt;hw.status(dev), boguscount);</div><div class='add'>+	arc_printk(D_DURING, dev, "\n");</div><div class='ctx'> </div><div class='del'>-	AINTMASK(0);</div><div class='add'>+	lp-&gt;hw.intmask(dev, 0);</div><div class='ctx'> 	udelay(1);</div><div class='del'>-	AINTMASK(lp-&gt;intmask);</div><div class='del'>-	</div><div class='del'>-	spin_unlock(&amp;lp-&gt;lock);</div><div class='add'>+	lp-&gt;hw.intmask(dev, lp-&gt;intmask);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);</div><div class='ctx'> 	return retval;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL(arcnet_interrupt);</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * This is a generic packet receiver that calls arcnet??_rx depending on the</div><div class='add'>+/* This is a generic packet receiver that calls arcnet??_rx depending on the</div><div class='ctx'>  * protocol ID found.</div><div class='ctx'>  */</div><div class='ctx'> static void arcnet_rx(struct net_device *dev, int bufnum)</div><div class='ctx'> {</div><div class='ctx'> 	struct arcnet_local *lp = netdev_priv(dev);</div><div class='del'>-	struct archdr pkt;</div><div class='add'>+	union {</div><div class='add'>+		struct archdr pkt;</div><div class='add'>+		char buf[512];</div><div class='add'>+	} rxdata;</div><div class='ctx'> 	struct arc_rfc1201 *soft;</div><div class='ctx'> 	int length, ofs;</div><div class='ctx'> </div><div class='del'>-	soft = &amp;pkt.soft.rfc1201;</div><div class='add'>+	soft = &amp;rxdata.pkt.soft.rfc1201;</div><div class='ctx'> </div><div class='del'>-	lp-&gt;hw.copy_from_card(dev, bufnum, 0, &amp;pkt, ARC_HDR_SIZE);</div><div class='del'>-	if (pkt.hard.offset[0]) {</div><div class='del'>-		ofs = pkt.hard.offset[0];</div><div class='add'>+	lp-&gt;hw.copy_from_card(dev, bufnum, 0, &amp;rxdata.pkt, ARC_HDR_SIZE);</div><div class='add'>+	if (rxdata.pkt.hard.offset[0]) {</div><div class='add'>+		ofs = rxdata.pkt.hard.offset[0];</div><div class='ctx'> 		length = 256 - ofs;</div><div class='ctx'> 	} else {</div><div class='del'>-		ofs = pkt.hard.offset[1];</div><div class='add'>+		ofs = rxdata.pkt.hard.offset[1];</div><div class='ctx'> 		length = 512 - ofs;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* get the full header, if possible */</div><div class='del'>-	if (sizeof(pkt.soft) &lt;= length)</div><div class='del'>-		lp-&gt;hw.copy_from_card(dev, bufnum, ofs, soft, sizeof(pkt.soft));</div><div class='del'>-	else {</div><div class='del'>-		memset(&amp;pkt.soft, 0, sizeof(pkt.soft));</div><div class='add'>+	if (sizeof(rxdata.pkt.soft) &lt;= length) {</div><div class='add'>+		lp-&gt;hw.copy_from_card(dev, bufnum, ofs, soft, sizeof(rxdata.pkt.soft));</div><div class='add'>+	} else {</div><div class='add'>+		memset(&amp;rxdata.pkt.soft, 0, sizeof(rxdata.pkt.soft));</div><div class='ctx'> 		lp-&gt;hw.copy_from_card(dev, bufnum, ofs, soft, length);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_DURING, "Buffer #%d: received packet from %02Xh to %02Xh "</div><div class='del'>-	       "(%d+4 bytes)\n",</div><div class='del'>-	       bufnum, pkt.hard.source, pkt.hard.dest, length);</div><div class='add'>+	arc_printk(D_DURING, dev, "Buffer #%d: received packet from %02Xh to %02Xh (%d+4 bytes)\n",</div><div class='add'>+		   bufnum, rxdata.pkt.hard.source, rxdata.pkt.hard.dest, length);</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;stats.rx_packets++;</div><div class='ctx'> 	dev-&gt;stats.rx_bytes += length + ARC_HDR_SIZE;</div><div class='ctx'> </div><div class='ctx'> 	/* call the right receiver for the protocol */</div><div class='ctx'> 	if (arc_proto_map[soft-&gt;proto]-&gt;is_ip) {</div><div class='del'>-		BUGLVL(D_PROTO) {</div><div class='add'>+		if (BUGLVL(D_PROTO)) {</div><div class='ctx'> 			struct ArcProto</div><div class='del'>-			*oldp = arc_proto_map[lp-&gt;default_proto[pkt.hard.source]],</div><div class='add'>+			*oldp = arc_proto_map[lp-&gt;default_proto[rxdata.pkt.hard.source]],</div><div class='ctx'> 			*newp = arc_proto_map[soft-&gt;proto];</div><div class='ctx'> </div><div class='ctx'> 			if (oldp != newp) {</div><div class='del'>-				BUGMSG(D_PROTO,</div><div class='del'>-				       "got protocol %02Xh; encap for host %02Xh is now '%c'"</div><div class='del'>-				       " (was '%c')\n", soft-&gt;proto, pkt.hard.source,</div><div class='del'>-				       newp-&gt;suffix, oldp-&gt;suffix);</div><div class='add'>+				arc_printk(D_PROTO, dev,</div><div class='add'>+					   "got protocol %02Xh; encap for host %02Xh is now '%c' (was '%c')\n",</div><div class='add'>+					   soft-&gt;proto, rxdata.pkt.hard.source,</div><div class='add'>+					   newp-&gt;suffix, oldp-&gt;suffix);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -996,36 +1169,33 @@ static void arcnet_rx(struct net_device *dev, int bufnum)</div><div class='ctx'> 		lp-&gt;default_proto[0] = soft-&gt;proto;</div><div class='ctx'> </div><div class='ctx'> 		/* in striking contrast, the following isn't a hack. */</div><div class='del'>-		lp-&gt;default_proto[pkt.hard.source] = soft-&gt;proto;</div><div class='add'>+		lp-&gt;default_proto[rxdata.pkt.hard.source] = soft-&gt;proto;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* call the protocol-specific receiver. */</div><div class='del'>-	arc_proto_map[soft-&gt;proto]-&gt;rx(dev, bufnum, &amp;pkt, length);</div><div class='add'>+	arc_proto_map[soft-&gt;proto]-&gt;rx(dev, bufnum, &amp;rxdata.pkt, length);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> static void null_rx(struct net_device *dev, int bufnum,</div><div class='ctx'> 		    struct archdr *pkthdr, int length)</div><div class='ctx'> {</div><div class='del'>-	BUGMSG(D_PROTO,</div><div class='del'>-	"rx: don't know how to deal with proto %02Xh from host %02Xh.\n",</div><div class='del'>-	       pkthdr-&gt;soft.rfc1201.proto, pkthdr-&gt;hard.source);</div><div class='add'>+	arc_printk(D_PROTO, dev,</div><div class='add'>+		   "rx: don't know how to deal with proto %02Xh from host %02Xh.\n",</div><div class='add'>+		   pkthdr-&gt;soft.rfc1201.proto, pkthdr-&gt;hard.source);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> static int null_build_header(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> 			     unsigned short type, uint8_t daddr)</div><div class='ctx'> {</div><div class='ctx'> 	struct arcnet_local *lp = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_PROTO,</div><div class='del'>-	       "tx: can't build header for encap %02Xh; load a protocol driver.\n",</div><div class='del'>-	       lp-&gt;default_proto[daddr]);</div><div class='add'>+	arc_printk(D_PROTO, dev,</div><div class='add'>+		   "tx: can't build header for encap %02Xh; load a protocol driver.\n",</div><div class='add'>+		   lp-&gt;default_proto[daddr]);</div><div class='ctx'> </div><div class='ctx'> 	/* always fails */</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> /* the "do nothing" prepare_tx function warns that there's nothing to do. */</div><div class='ctx'> static int null_prepare_tx(struct net_device *dev, struct archdr *pkt,</div><div class='ctx'> 			   int length, int bufnum)</div><div class='hunk'>@@ -1033,7 +1203,7 @@ static int null_prepare_tx(struct net_device *dev, struct archdr *pkt,</div><div class='ctx'> 	struct arcnet_local *lp = netdev_priv(dev);</div><div class='ctx'> 	struct arc_hardware newpkt;</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_PROTO, "tx: no encap for this host; load a protocol driver.\n");</div><div class='add'>+	arc_printk(D_PROTO, dev, "tx: no encap for this host; load a protocol driver.\n");</div><div class='ctx'> </div><div class='ctx'> 	/* send a packet to myself -- will never get received, of course */</div><div class='ctx'> 	newpkt.source = newpkt.dest = dev-&gt;dev_addr[0];</div><div class='head'>diff --git a/drivers/net/arcnet/capmode.c b/drivers/net/arcnet/capmode.c<br/>index 42fce91b71fc..7a0a79973769 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/arcnet/capmode.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/arcnet/capmode.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/arcnet/capmode.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/arcnet/capmode.c</a></div><div class='hunk'>@@ -26,6 +26,8 @@</div><div class='ctx'>  * **********************</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#define pr_fmt(fmt) "arcnet:" KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/gfp.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='hunk'>@@ -33,9 +35,8 @@</div><div class='ctx'> #include &lt;net/arp.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/skbuff.h&gt;</div><div class='del'>-#include &lt;linux/arcdevice.h&gt;</div><div class='ctx'> </div><div class='del'>-#define VERSION "arcnet: cap mode (`c') encapsulation support loaded.\n"</div><div class='add'>+#include "arcdevice.h"</div><div class='ctx'> </div><div class='ctx'> /* packet receiver */</div><div class='ctx'> static void rx(struct net_device *dev, int bufnum,</div><div class='hunk'>@@ -43,11 +44,12 @@ static void rx(struct net_device *dev, int bufnum,</div><div class='ctx'> {</div><div class='ctx'> 	struct arcnet_local *lp = netdev_priv(dev);</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='del'>-	struct archdr *pkt = pkthdr;</div><div class='add'>+	struct archdr *pkt;</div><div class='ctx'> 	char *pktbuf, *pkthdrbuf;</div><div class='ctx'> 	int ofs;</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_DURING, "it's a raw(cap) packet (length=%d)\n", length);</div><div class='add'>+	arc_printk(D_DURING, dev, "it's a raw(cap) packet (length=%d)\n",</div><div class='add'>+		   length);</div><div class='ctx'> </div><div class='ctx'> 	if (length &gt;= MinTU)</div><div class='ctx'> 		ofs = 512 - length;</div><div class='hunk'>@@ -55,8 +57,7 @@ static void rx(struct net_device *dev, int bufnum,</div><div class='ctx'> 		ofs = 256 - length;</div><div class='ctx'> </div><div class='ctx'> 	skb = alloc_skb(length + ARC_HDR_SIZE + sizeof(int), GFP_ATOMIC);</div><div class='del'>-	if (skb == NULL) {</div><div class='del'>-		BUGMSG(D_NORMAL, "Memory squeeze, dropping packet.\n");</div><div class='add'>+	if (!skb) {</div><div class='ctx'> 		dev-&gt;stats.rx_dropped++;</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -66,17 +67,17 @@ static void rx(struct net_device *dev, int bufnum,</div><div class='ctx'> 	pkt = (struct archdr *)skb_mac_header(skb);</div><div class='ctx'> 	skb_pull(skb, ARC_HDR_SIZE);</div><div class='ctx'> </div><div class='del'>-	/* up to sizeof(pkt-&gt;soft) has already been copied from the card */</div><div class='del'>-	/* squeeze in an int for the cap encapsulation */</div><div class='del'>-</div><div class='del'>-	/* use these variables to be sure we count in bytes, not in</div><div class='del'>-	   sizeof(struct archdr) */</div><div class='del'>-	pktbuf=(char*)pkt;</div><div class='del'>-	pkthdrbuf=(char*)pkthdr;</div><div class='del'>-	memcpy(pktbuf, pkthdrbuf, ARC_HDR_SIZE+sizeof(pkt-&gt;soft.cap.proto));</div><div class='del'>-	memcpy(pktbuf+ARC_HDR_SIZE+sizeof(pkt-&gt;soft.cap.proto)+sizeof(int),</div><div class='del'>-	       pkthdrbuf+ARC_HDR_SIZE+sizeof(pkt-&gt;soft.cap.proto),</div><div class='del'>-	       sizeof(struct archdr)-ARC_HDR_SIZE-sizeof(pkt-&gt;soft.cap.proto));</div><div class='add'>+	/* up to sizeof(pkt-&gt;soft) has already been copied from the card</div><div class='add'>+	 * squeeze in an int for the cap encapsulation</div><div class='add'>+	 * use these variables to be sure we count in bytes, not in</div><div class='add'>+	 * sizeof(struct archdr)</div><div class='add'>+	 */</div><div class='add'>+	pktbuf = (char *)pkt;</div><div class='add'>+	pkthdrbuf = (char *)pkthdr;</div><div class='add'>+	memcpy(pktbuf, pkthdrbuf, ARC_HDR_SIZE + sizeof(pkt-&gt;soft.cap.proto));</div><div class='add'>+	memcpy(pktbuf + ARC_HDR_SIZE + sizeof(pkt-&gt;soft.cap.proto) + sizeof(int),</div><div class='add'>+	       pkthdrbuf + ARC_HDR_SIZE + sizeof(pkt-&gt;soft.cap.proto),</div><div class='add'>+	       sizeof(struct archdr) - ARC_HDR_SIZE - sizeof(pkt-&gt;soft.cap.proto));</div><div class='ctx'> </div><div class='ctx'> 	if (length &gt; sizeof(pkt-&gt;soft))</div><div class='ctx'> 		lp-&gt;hw.copy_from_card(dev, bufnum, ofs + sizeof(pkt-&gt;soft),</div><div class='hunk'>@@ -84,15 +85,14 @@ static void rx(struct net_device *dev, int bufnum,</div><div class='ctx'> 				      + sizeof(int),</div><div class='ctx'> 				      length - sizeof(pkt-&gt;soft));</div><div class='ctx'> </div><div class='del'>-	BUGLVL(D_SKB) arcnet_dump_skb(dev, skb, "rx");</div><div class='add'>+	if (BUGLVL(D_SKB))</div><div class='add'>+		arcnet_dump_skb(dev, skb, "rx");</div><div class='ctx'> </div><div class='ctx'> 	skb-&gt;protocol = cpu_to_be16(ETH_P_ARCNET);</div><div class='ctx'> 	netif_rx(skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Create the ARCnet hard/soft headers for cap mode.</div><div class='add'>+/* Create the ARCnet hard/soft headers for cap mode.</div><div class='ctx'>  * There aren't any soft headers in cap mode - not even the protocol id.</div><div class='ctx'>  */</div><div class='ctx'> static int build_header(struct sk_buff *skb,</div><div class='hunk'>@@ -101,12 +101,12 @@ static int build_header(struct sk_buff *skb,</div><div class='ctx'> 			uint8_t daddr)</div><div class='ctx'> {</div><div class='ctx'> 	int hdr_size = ARC_HDR_SIZE;</div><div class='del'>-	struct archdr *pkt = (struct archdr *) skb_push(skb, hdr_size);</div><div class='add'>+	struct archdr *pkt = skb_push(skb, hdr_size);</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_PROTO, "Preparing header for cap packet %x.\n",</div><div class='del'>-	       *((int*)&amp;pkt-&gt;soft.cap.cookie[0]));</div><div class='del'>-	/*</div><div class='del'>-	 * Set the source hardware address.</div><div class='add'>+	arc_printk(D_PROTO, dev, "Preparing header for cap packet %x.\n",</div><div class='add'>+		   *((int *)&amp;pkt-&gt;soft.cap.cookie[0]));</div><div class='add'>+</div><div class='add'>+	/* Set the source hardware address.</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * This is pretty pointless for most purposes, but it can help in</div><div class='ctx'> 	 * debugging.  ARCnet does not allow us to change the source address in</div><div class='hunk'>@@ -117,9 +117,8 @@ static int build_header(struct sk_buff *skb,</div><div class='ctx'> 	/* see linux/net/ethernet/eth.c to see where I got the following */</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;flags &amp; (IFF_LOOPBACK | IFF_NOARP)) {</div><div class='del'>-		/*</div><div class='del'>-		 * FIXME: fill in the last byte of the dest ipaddr here to better</div><div class='del'>-		 * comply with RFC1051 in "noarp" mode.</div><div class='add'>+		/* FIXME: fill in the last byte of the dest ipaddr here to</div><div class='add'>+		 * better comply with RFC1051 in "noarp" mode.</div><div class='ctx'> 		 */</div><div class='ctx'> 		pkt-&gt;hard.dest = 0;</div><div class='ctx'> 		return hdr_size;</div><div class='hunk'>@@ -130,7 +129,6 @@ static int build_header(struct sk_buff *skb,</div><div class='ctx'> 	return hdr_size;	/* success */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> static int prepare_tx(struct net_device *dev, struct archdr *pkt, int length,</div><div class='ctx'> 		      int bufnum)</div><div class='ctx'> {</div><div class='hunk'>@@ -138,22 +136,21 @@ static int prepare_tx(struct net_device *dev, struct archdr *pkt, int length,</div><div class='ctx'> 	struct arc_hardware *hard = &amp;pkt-&gt;hard;</div><div class='ctx'> 	int ofs;</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> 	/* hard header is not included in packet length */</div><div class='ctx'> 	length -= ARC_HDR_SIZE;</div><div class='ctx'> 	/* And neither is the cookie field */</div><div class='ctx'> 	length -= sizeof(int);</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_DURING, "prepare_tx: txbufs=%d/%d/%d\n",</div><div class='del'>-	       lp-&gt;next_tx, lp-&gt;cur_tx, bufnum);</div><div class='add'>+	arc_printk(D_DURING, dev, "prepare_tx: txbufs=%d/%d/%d\n",</div><div class='add'>+		   lp-&gt;next_tx, lp-&gt;cur_tx, bufnum);</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_PROTO, "Sending for cap packet %x.\n",</div><div class='del'>-	       *((int*)&amp;pkt-&gt;soft.cap.cookie[0]));</div><div class='add'>+	arc_printk(D_PROTO, dev, "Sending for cap packet %x.\n",</div><div class='add'>+		   *((int *)&amp;pkt-&gt;soft.cap.cookie[0]));</div><div class='ctx'> </div><div class='ctx'> 	if (length &gt; XMTU) {</div><div class='ctx'> 		/* should never happen! other people already check for this. */</div><div class='del'>-		BUGMSG(D_NORMAL, "Bug!  prepare_tx with size %d (&gt; %d)\n",</div><div class='del'>-		       length, XMTU);</div><div class='add'>+		arc_printk(D_NORMAL, dev, "Bug!  prepare_tx with size %d (&gt; %d)\n",</div><div class='add'>+			   length, XMTU);</div><div class='ctx'> 		length = XMTU;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (length &gt; MinTU) {</div><div class='hunk'>@@ -162,11 +159,12 @@ static int prepare_tx(struct net_device *dev, struct archdr *pkt, int length,</div><div class='ctx'> 	} else if (length &gt; MTU) {</div><div class='ctx'> 		hard-&gt;offset[0] = 0;</div><div class='ctx'> 		hard-&gt;offset[1] = ofs = 512 - length - 3;</div><div class='del'>-	} else</div><div class='add'>+	} else {</div><div class='ctx'> 		hard-&gt;offset[0] = ofs = 256 - length;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_DURING, "prepare_tx: length=%d ofs=%d\n",</div><div class='del'>-	       length,ofs);</div><div class='add'>+	arc_printk(D_DURING, dev, "prepare_tx: length=%d ofs=%d\n",</div><div class='add'>+		   length, ofs);</div><div class='ctx'> </div><div class='ctx'> 	/* Copy the arcnet-header + the protocol byte down: */</div><div class='ctx'> 	lp-&gt;hw.copy_to_card(dev, bufnum, 0, hard, ARC_HDR_SIZE);</div><div class='hunk'>@@ -174,9 +172,10 @@ static int prepare_tx(struct net_device *dev, struct archdr *pkt, int length,</div><div class='ctx'> 			    sizeof(pkt-&gt;soft.cap.proto));</div><div class='ctx'> </div><div class='ctx'> 	/* Skip the extra integer we have written into it as a cookie</div><div class='del'>-	   but write the rest of the message: */</div><div class='del'>-	lp-&gt;hw.copy_to_card(dev, bufnum, ofs+1,</div><div class='del'>-			    ((unsigned char*)&amp;pkt-&gt;soft.cap.mes),length-1);</div><div class='add'>+	 * but write the rest of the message:</div><div class='add'>+	 */</div><div class='add'>+	lp-&gt;hw.copy_to_card(dev, bufnum, ofs + 1,</div><div class='add'>+			    ((unsigned char *)&amp;pkt-&gt;soft.cap.mes), length - 1);</div><div class='ctx'> </div><div class='ctx'> 	lp-&gt;lastload_dest = hard-&gt;dest;</div><div class='ctx'> </div><div class='hunk'>@@ -188,21 +187,20 @@ static int ack_tx(struct net_device *dev, int acked)</div><div class='ctx'> 	struct arcnet_local *lp = netdev_priv(dev);</div><div class='ctx'> 	struct sk_buff *ackskb;</div><div class='ctx'> 	struct archdr *ackpkt;</div><div class='del'>-	int length=sizeof(struct arc_cap);</div><div class='add'>+	int length = sizeof(struct arc_cap);</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_DURING, "capmode: ack_tx: protocol: %x: result: %d\n",</div><div class='del'>-		lp-&gt;outgoing.skb-&gt;protocol, acked);</div><div class='add'>+	arc_printk(D_DURING, dev, "capmode: ack_tx: protocol: %x: result: %d\n",</div><div class='add'>+		   lp-&gt;outgoing.skb-&gt;protocol, acked);</div><div class='ctx'> </div><div class='del'>-	BUGLVL(D_SKB) arcnet_dump_skb(dev, lp-&gt;outgoing.skb, "ack_tx");</div><div class='add'>+	if (BUGLVL(D_SKB))</div><div class='add'>+		arcnet_dump_skb(dev, lp-&gt;outgoing.skb, "ack_tx");</div><div class='ctx'> </div><div class='ctx'> 	/* Now alloc a skb to send back up through the layers: */</div><div class='del'>-	ackskb = alloc_skb(length + ARC_HDR_SIZE , GFP_ATOMIC);</div><div class='del'>-	if (ackskb == NULL) {</div><div class='del'>-		BUGMSG(D_NORMAL, "Memory squeeze, can't acknowledge.\n");</div><div class='add'>+	ackskb = alloc_skb(length + ARC_HDR_SIZE, GFP_ATOMIC);</div><div class='add'>+	if (!ackskb)</div><div class='ctx'> 		goto free_outskb;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	skb_put(ackskb, length + ARC_HDR_SIZE );</div><div class='add'>+	skb_put(ackskb, length + ARC_HDR_SIZE);</div><div class='ctx'> 	ackskb-&gt;dev = dev;</div><div class='ctx'> </div><div class='ctx'> 	skb_reset_mac_header(ackskb);</div><div class='hunk'>@@ -212,39 +210,40 @@ static int ack_tx(struct net_device *dev, int acked)</div><div class='ctx'> 	skb_copy_from_linear_data(lp-&gt;outgoing.skb, ackpkt,</div><div class='ctx'> 				  ARC_HDR_SIZE + sizeof(struct arc_cap));</div><div class='ctx'> 	ackpkt-&gt;soft.cap.proto = 0; /* using protocol 0 for acknowledge */</div><div class='del'>-	ackpkt-&gt;soft.cap.mes.ack=acked;</div><div class='add'>+	ackpkt-&gt;soft.cap.mes.ack = acked;</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_PROTO, "Ackknowledge for cap packet %x.\n",</div><div class='del'>-			*((int*)&amp;ackpkt-&gt;soft.cap.cookie[0]));</div><div class='add'>+	arc_printk(D_PROTO, dev, "Acknowledge for cap packet %x.\n",</div><div class='add'>+		   *((int *)&amp;ackpkt-&gt;soft.cap.cookie[0]));</div><div class='ctx'> </div><div class='ctx'> 	ackskb-&gt;protocol = cpu_to_be16(ETH_P_ARCNET);</div><div class='ctx'> </div><div class='del'>-	BUGLVL(D_SKB) arcnet_dump_skb(dev, ackskb, "ack_tx_recv");</div><div class='add'>+	if (BUGLVL(D_SKB))</div><div class='add'>+		arcnet_dump_skb(dev, ackskb, "ack_tx_recv");</div><div class='ctx'> 	netif_rx(ackskb);</div><div class='ctx'> </div><div class='ctx'> free_outskb:</div><div class='ctx'> 	dev_kfree_skb_irq(lp-&gt;outgoing.skb);</div><div class='del'>-	lp-&gt;outgoing.proto = NULL; /* We are always finished when in this protocol */</div><div class='add'>+	lp-&gt;outgoing.proto = NULL;</div><div class='add'>+			/* We are always finished when in this protocol */</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct ArcProto capmode_proto =</div><div class='del'>-{</div><div class='del'>-	'r',</div><div class='del'>-	XMTU,</div><div class='del'>-	0,</div><div class='del'>-	rx,</div><div class='del'>-	build_header,</div><div class='del'>-	prepare_tx,</div><div class='del'>-	NULL,</div><div class='del'>-	ack_tx</div><div class='add'>+static struct ArcProto capmode_proto = {</div><div class='add'>+	.suffix		= 'r',</div><div class='add'>+	.mtu		= XMTU,</div><div class='add'>+	.rx		= rx,</div><div class='add'>+	.build_header	= build_header,</div><div class='add'>+	.prepare_tx	= prepare_tx,</div><div class='add'>+	.ack_tx		= ack_tx</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void arcnet_cap_init(void)</div><div class='add'>+static int __init capmode_module_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int count;</div><div class='ctx'> </div><div class='add'>+	pr_info("cap mode (`c') encapsulation support loaded\n");</div><div class='add'>+</div><div class='ctx'> 	for (count = 1; count &lt;= 8; count++)</div><div class='ctx'> 		if (arc_proto_map[count] == arc_proto_default)</div><div class='ctx'> 			arc_proto_map[count] = &amp;capmode_proto;</div><div class='hunk'>@@ -255,12 +254,7 @@ static void arcnet_cap_init(void)</div><div class='ctx'> </div><div class='ctx'> 	arc_proto_default = &amp;capmode_proto;</div><div class='ctx'> 	arc_raw_proto = &amp;capmode_proto;</div><div class='del'>-}</div><div class='ctx'> </div><div class='del'>-static int __init capmode_module_init(void)</div><div class='del'>-{</div><div class='del'>-	printk(VERSION);</div><div class='del'>-	arcnet_cap_init();</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -271,4 +265,5 @@ static void __exit capmode_module_exit(void)</div><div class='ctx'> module_init(capmode_module_init);</div><div class='ctx'> module_exit(capmode_module_exit);</div><div class='ctx'> </div><div class='add'>+MODULE_DESCRIPTION("ARCnet CAP mode packet interface module");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/arcnet/com20020-isa.c b/drivers/net/arcnet/com20020-isa.c<br/>index 45c61a2c5fbd..fef2ac2852a8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/arcnet/com20020-isa.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/arcnet/com20020-isa.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/arcnet/com20020-isa.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/arcnet/com20020-isa.c</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Linux ARCnet driver - COM20020 chipset support</div><div class='del'>- * </div><div class='add'>+ *</div><div class='ctx'>  * Written 1997 by David Woodhouse.</div><div class='ctx'>  * Written 1994-1999 by Avery Pennarun.</div><div class='ctx'>  * Written 1999-2000 by Martin Mares &lt;mj@ucw.cz&gt;.</div><div class='hunk'>@@ -25,6 +25,9 @@</div><div class='ctx'>  *</div><div class='ctx'>  * **********************</div><div class='ctx'>  */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) "arcnet:" KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/moduleparam.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='hunk'>@@ -35,17 +38,13 @@</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/bootmem.h&gt;</div><div class='del'>-#include &lt;linux/arcdevice.h&gt;</div><div class='del'>-#include &lt;linux/com20020.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='add'>+#include &lt;linux/memblock.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='ctx'> </div><div class='del'>-#define VERSION "arcnet: COM20020 ISA support (by David Woodhouse et al.)\n"</div><div class='add'>+#include "arcdevice.h"</div><div class='add'>+#include "com20020.h"</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * We cannot (yet) probe for an IO mapped card, although we can check that</div><div class='add'>+/* We cannot (yet) probe for an IO mapped card, although we can check that</div><div class='ctx'>  * it's where we were told it was, and even do autoirq.</div><div class='ctx'>  */</div><div class='ctx'> static int __init com20020isa_probe(struct net_device *dev)</div><div class='hunk'>@@ -55,21 +54,21 @@ static int __init com20020isa_probe(struct net_device *dev)</div><div class='ctx'> 	struct arcnet_local *lp = netdev_priv(dev);</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	BUGLVL(D_NORMAL) printk(VERSION);</div><div class='add'>+	if (BUGLVL(D_NORMAL))</div><div class='add'>+		pr_info("%s\n", "COM20020 ISA support (by David Woodhouse et al.)");</div><div class='ctx'> </div><div class='ctx'> 	ioaddr = dev-&gt;base_addr;</div><div class='ctx'> 	if (!ioaddr) {</div><div class='del'>-		BUGMSG(D_NORMAL, "No autoprobe (yet) for IO mapped cards; you "</div><div class='del'>-		       "must specify the base address!\n");</div><div class='add'>+		arc_printk(D_NORMAL, dev, "No autoprobe (yet) for IO mapped cards; you must specify the base address!\n");</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (!request_region(ioaddr, ARCNET_TOTAL_SIZE, "arcnet (COM20020)")) {</div><div class='del'>-		BUGMSG(D_NORMAL, "IO region %xh-%xh already allocated.\n",</div><div class='del'>-		       ioaddr, ioaddr + ARCNET_TOTAL_SIZE - 1);</div><div class='add'>+		arc_printk(D_NORMAL, dev, "IO region %xh-%xh already allocated.\n",</div><div class='add'>+			   ioaddr, ioaddr + ARCNET_TOTAL_SIZE - 1);</div><div class='ctx'> 		return -ENXIO;</div><div class='ctx'> 	}</div><div class='del'>-	if (ASTATUS() == 0xFF) {</div><div class='del'>-		BUGMSG(D_NORMAL, "IO address %x empty\n", ioaddr);</div><div class='add'>+	if (arcnet_inb(ioaddr, COM20020_REG_R_STATUS) == 0xFF) {</div><div class='add'>+		arc_printk(D_NORMAL, dev, "IO address %x empty\n", ioaddr);</div><div class='ctx'> 		err = -ENODEV;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -83,23 +82,24 @@ static int __init com20020isa_probe(struct net_device *dev)</div><div class='ctx'> 		 * card has just reset and the NORXflag is on until</div><div class='ctx'> 		 * we tell it to start receiving.</div><div class='ctx'> 		 */</div><div class='del'>-		BUGMSG(D_INIT_REASONS, "intmask was %02Xh\n", inb(_INTMASK));</div><div class='del'>-		outb(0, _INTMASK);</div><div class='add'>+		arc_printk(D_INIT_REASONS, dev, "intmask was %02Xh\n",</div><div class='add'>+			   arcnet_inb(ioaddr, COM20020_REG_R_STATUS));</div><div class='add'>+		arcnet_outb(0, ioaddr, COM20020_REG_W_INTMASK);</div><div class='ctx'> 		airqmask = probe_irq_on();</div><div class='del'>-		outb(NORXflag, _INTMASK);</div><div class='add'>+		arcnet_outb(NORXflag, ioaddr, COM20020_REG_W_INTMASK);</div><div class='ctx'> 		udelay(1);</div><div class='del'>-		outb(0, _INTMASK);</div><div class='add'>+		arcnet_outb(0, ioaddr, COM20020_REG_W_INTMASK);</div><div class='ctx'> 		dev-&gt;irq = probe_irq_off(airqmask);</div><div class='ctx'> </div><div class='ctx'> 		if ((int)dev-&gt;irq &lt;= 0) {</div><div class='del'>-			BUGMSG(D_INIT_REASONS, "Autoprobe IRQ failed first time\n");</div><div class='add'>+			arc_printk(D_INIT_REASONS, dev, "Autoprobe IRQ failed first time\n");</div><div class='ctx'> 			airqmask = probe_irq_on();</div><div class='del'>-			outb(NORXflag, _INTMASK);</div><div class='add'>+			arcnet_outb(NORXflag, ioaddr, COM20020_REG_W_INTMASK);</div><div class='ctx'> 			udelay(5);</div><div class='del'>-			outb(0, _INTMASK);</div><div class='add'>+			arcnet_outb(0, ioaddr, COM20020_REG_W_INTMASK);</div><div class='ctx'> 			dev-&gt;irq = probe_irq_off(airqmask);</div><div class='ctx'> 			if ((int)dev-&gt;irq &lt;= 0) {</div><div class='del'>-				BUGMSG(D_NORMAL, "Autoprobe IRQ failed.\n");</div><div class='add'>+				arc_printk(D_NORMAL, dev, "Autoprobe IRQ failed.\n");</div><div class='ctx'> 				err = -ENODEV;</div><div class='ctx'> 				goto out;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -107,7 +107,9 @@ static int __init com20020isa_probe(struct net_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	lp-&gt;card_name = "ISA COM20020";</div><div class='del'>-	if ((err = com20020_found(dev, 0)) != 0)</div><div class='add'>+</div><div class='add'>+	err = com20020_found(dev, 0);</div><div class='add'>+	if (err != 0)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -127,14 +129,15 @@ static int clockp = 0;</div><div class='ctx'> static int clockm = 0;</div><div class='ctx'> </div><div class='ctx'> module_param(node, int, 0);</div><div class='del'>-module_param(io, int, 0);</div><div class='del'>-module_param(irq, int, 0);</div><div class='add'>+module_param_hw(io, int, ioport, 0);</div><div class='add'>+module_param_hw(irq, int, irq, 0);</div><div class='ctx'> module_param_string(device, device, sizeof(device), 0);</div><div class='ctx'> module_param(timeout, int, 0);</div><div class='ctx'> module_param(backplane, int, 0);</div><div class='ctx'> module_param(clockp, int, 0);</div><div class='ctx'> module_param(clockm, int, 0);</div><div class='ctx'> </div><div class='add'>+MODULE_DESCRIPTION("ARCnet COM20020 chipset ISA driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='ctx'> static struct net_device *my_dev;</div><div class='hunk'>@@ -149,7 +152,7 @@ static int __init com20020_init(void)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	if (node &amp;&amp; node != 0xff)</div><div class='del'>-		dev-&gt;dev_addr[0] = node;</div><div class='add'>+		arcnet_set_addr(dev, node);</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;netdev_ops = &amp;com20020_netdev_ops;</div><div class='ctx'> </div><div class='hunk'>@@ -167,7 +170,7 @@ static int __init com20020_init(void)</div><div class='ctx'> 		dev-&gt;irq = 9;</div><div class='ctx'> </div><div class='ctx'> 	if (com20020isa_probe(dev)) {</div><div class='del'>-		free_netdev(dev);</div><div class='add'>+		free_arcdev(dev);</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -180,7 +183,7 @@ static void __exit com20020_exit(void)</div><div class='ctx'> 	unregister_netdev(my_dev);</div><div class='ctx'> 	free_irq(my_dev-&gt;irq, my_dev);</div><div class='ctx'> 	release_region(my_dev-&gt;base_addr, ARCNET_TOTAL_SIZE);</div><div class='del'>-	free_netdev(my_dev);</div><div class='add'>+	free_arcdev(my_dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifndef MODULE</div><div class='hunk'>@@ -194,17 +197,23 @@ static int __init com20020isa_setup(char *s)</div><div class='ctx'> </div><div class='ctx'> 	switch (ints[0]) {</div><div class='ctx'> 	default:		/* ERROR */</div><div class='del'>-		printk("com90xx: Too many arguments.\n");</div><div class='add'>+		pr_info("Too many arguments\n");</div><div class='add'>+		fallthrough;</div><div class='ctx'> 	case 6:		/* Timeout */</div><div class='ctx'> 		timeout = ints[6];</div><div class='add'>+		fallthrough;</div><div class='ctx'> 	case 5:		/* CKP value */</div><div class='ctx'> 		clockp = ints[5];</div><div class='add'>+		fallthrough;</div><div class='ctx'> 	case 4:		/* Backplane flag */</div><div class='ctx'> 		backplane = ints[4];</div><div class='add'>+		fallthrough;</div><div class='ctx'> 	case 3:		/* Node ID */</div><div class='ctx'> 		node = ints[3];</div><div class='add'>+		fallthrough;</div><div class='ctx'> 	case 2:		/* IRQ */</div><div class='ctx'> 		irq = ints[2];</div><div class='add'>+		fallthrough;</div><div class='ctx'> 	case 1:		/* IO address */</div><div class='ctx'> 		io = ints[1];</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/arcnet/com20020-pci.c b/drivers/net/arcnet/com20020-pci.c<br/>index 96edc1346124..0472bcdff130 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/arcnet/com20020-pci.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/arcnet/com20020-pci.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/arcnet/com20020-pci.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/arcnet/com20020-pci.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Linux ARCnet driver - COM20020 PCI support</div><div class='ctx'>  * Contemporary Controls PCI20 and SOHARD SH-ARC PCI</div><div class='del'>- * </div><div class='add'>+ *</div><div class='ctx'>  * Written 1994-1999 by Avery Pennarun,</div><div class='ctx'>  *    based on an ISA version by David Woodhouse.</div><div class='ctx'>  * Written 1999-2000 by Martin Mares &lt;mj@ucw.cz&gt;.</div><div class='hunk'>@@ -26,6 +26,9 @@</div><div class='ctx'>  *</div><div class='ctx'>  * **********************</div><div class='ctx'>  */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) "arcnet:" KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/moduleparam.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='hunk'>@@ -36,14 +39,12 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/pci.h&gt;</div><div class='del'>-#include &lt;linux/arcdevice.h&gt;</div><div class='del'>-#include &lt;linux/com20020.h&gt;</div><div class='ctx'> #include &lt;linux/list.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/leds.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define VERSION "arcnet: COM20020 PCI support\n"</div><div class='add'>+#include "arcdevice.h"</div><div class='add'>+#include "com20020.h"</div><div class='ctx'> </div><div class='ctx'> /* Module parameters */</div><div class='ctx'> </div><div class='hunk'>@@ -60,19 +61,75 @@ module_param(timeout, int, 0);</div><div class='ctx'> module_param(backplane, int, 0);</div><div class='ctx'> module_param(clockp, int, 0);</div><div class='ctx'> module_param(clockm, int, 0);</div><div class='add'>+MODULE_DESCRIPTION("ARCnet COM20020 chipset PCI driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='add'>+static void led_tx_set(struct led_classdev *led_cdev,</div><div class='add'>+			     enum led_brightness value)</div><div class='add'>+{</div><div class='add'>+	struct com20020_dev *card;</div><div class='add'>+	struct com20020_priv *priv;</div><div class='add'>+	struct com20020_pci_card_info *ci;</div><div class='add'>+</div><div class='add'>+	card = container_of(led_cdev, struct com20020_dev, tx_led);</div><div class='add'>+</div><div class='add'>+	priv = card-&gt;pci_priv;</div><div class='add'>+	ci = priv-&gt;ci;</div><div class='add'>+</div><div class='add'>+	outb(!!value, priv-&gt;misc + ci-&gt;leds[card-&gt;index].green);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void led_recon_set(struct led_classdev *led_cdev,</div><div class='add'>+			     enum led_brightness value)</div><div class='add'>+{</div><div class='add'>+	struct com20020_dev *card;</div><div class='add'>+	struct com20020_priv *priv;</div><div class='add'>+	struct com20020_pci_card_info *ci;</div><div class='add'>+</div><div class='add'>+	card = container_of(led_cdev, struct com20020_dev, recon_led);</div><div class='add'>+</div><div class='add'>+	priv = card-&gt;pci_priv;</div><div class='add'>+	ci = priv-&gt;ci;</div><div class='add'>+</div><div class='add'>+	outb(!!value, priv-&gt;misc + ci-&gt;leds[card-&gt;index].red);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t backplane_mode_show(struct device *dev,</div><div class='add'>+				   struct device_attribute *attr,</div><div class='add'>+				   char *buf)</div><div class='add'>+{</div><div class='add'>+	struct net_device *net_dev = to_net_dev(dev);</div><div class='add'>+	struct arcnet_local *lp = netdev_priv(net_dev);</div><div class='add'>+</div><div class='add'>+	return sprintf(buf, "%s\n", lp-&gt;backplane ? "true" : "false");</div><div class='add'>+}</div><div class='add'>+static DEVICE_ATTR_RO(backplane_mode);</div><div class='add'>+</div><div class='add'>+static struct attribute *com20020_state_attrs[] = {</div><div class='add'>+	&amp;dev_attr_backplane_mode.attr,</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct attribute_group com20020_state_group = {</div><div class='add'>+	.name = NULL,</div><div class='add'>+	.attrs = com20020_state_attrs,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static void com20020pci_remove(struct pci_dev *pdev);</div><div class='ctx'> </div><div class='del'>-static int com20020pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='add'>+static int com20020pci_probe(struct pci_dev *pdev,</div><div class='add'>+			     const struct pci_device_id *id)</div><div class='ctx'> {</div><div class='ctx'> 	struct com20020_pci_card_info *ci;</div><div class='add'>+	struct com20020_pci_channel_map *mm;</div><div class='ctx'> 	struct net_device *dev;</div><div class='ctx'> 	struct arcnet_local *lp;</div><div class='ctx'> 	struct com20020_priv *priv;</div><div class='ctx'> 	int i, ioaddr, ret;</div><div class='ctx'> 	struct resource *r;</div><div class='ctx'> </div><div class='add'>+	ret = 0;</div><div class='add'>+</div><div class='ctx'> 	if (pci_enable_device(pdev))</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> </div><div class='hunk'>@@ -82,46 +139,67 @@ static int com20020pci_probe(struct pci_dev *pdev, const struct pci_device_id *i</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	ci = (struct com20020_pci_card_info *)id-&gt;driver_data;</div><div class='add'>+	if (!ci)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='ctx'> 	priv-&gt;ci = ci;</div><div class='add'>+	mm = &amp;ci-&gt;misc_map;</div><div class='add'>+</div><div class='add'>+	pci_set_drvdata(pdev, priv);</div><div class='ctx'> </div><div class='ctx'> 	INIT_LIST_HEAD(&amp;priv-&gt;list_dev);</div><div class='ctx'> </div><div class='add'>+	if (mm-&gt;size) {</div><div class='add'>+		ioaddr = pci_resource_start(pdev, mm-&gt;bar) + mm-&gt;offset;</div><div class='add'>+		r = devm_request_region(&amp;pdev-&gt;dev, ioaddr, mm-&gt;size,</div><div class='add'>+					"com20020-pci");</div><div class='add'>+		if (!r) {</div><div class='add'>+			pr_err("IO region %xh-%xh already allocated.\n",</div><div class='add'>+			       ioaddr, ioaddr + mm-&gt;size - 1);</div><div class='add'>+			return -EBUSY;</div><div class='add'>+		}</div><div class='add'>+		priv-&gt;misc = ioaddr;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; ci-&gt;devcount; i++) {</div><div class='ctx'> 		struct com20020_pci_channel_map *cm = &amp;ci-&gt;chan_map_tbl[i];</div><div class='ctx'> 		struct com20020_dev *card;</div><div class='add'>+		int dev_id_mask = 0xf;</div><div class='ctx'> </div><div class='ctx'> 		dev = alloc_arcdev(device);</div><div class='ctx'> 		if (!dev) {</div><div class='ctx'> 			ret = -ENOMEM;</div><div class='del'>-			goto out_port;</div><div class='add'>+			break;</div><div class='ctx'> 		}</div><div class='add'>+		dev-&gt;dev_port = i;</div><div class='ctx'> </div><div class='ctx'> 		dev-&gt;netdev_ops = &amp;com20020_netdev_ops;</div><div class='ctx'> </div><div class='ctx'> 		lp = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-		BUGMSG(D_NORMAL, "%s Controls\n", ci-&gt;name);</div><div class='add'>+		arc_printk(D_NORMAL, dev, "%s Controls\n", ci-&gt;name);</div><div class='ctx'> 		ioaddr = pci_resource_start(pdev, cm-&gt;bar) + cm-&gt;offset;</div><div class='ctx'> </div><div class='ctx'> 		r = devm_request_region(&amp;pdev-&gt;dev, ioaddr, cm-&gt;size,</div><div class='ctx'> 					"com20020-pci");</div><div class='ctx'> 		if (!r) {</div><div class='del'>-			pr_err("IO region %xh-%xh already allocated.\n",</div><div class='add'>+			pr_err("IO region %xh-%xh already allocated\n",</div><div class='ctx'> 			       ioaddr, ioaddr + cm-&gt;size - 1);</div><div class='ctx'> 			ret = -EBUSY;</div><div class='del'>-			goto out_port;</div><div class='add'>+			goto err_free_arcdev;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Dummy access after Reset</div><div class='ctx'> 		 * ARCNET controller needs</div><div class='ctx'> 		 * this access to detect bustype</div><div class='ctx'> 		 */</div><div class='del'>-		outb(0x00, ioaddr + 1);</div><div class='del'>-		inb(ioaddr + 1);</div><div class='add'>+		arcnet_outb(0x00, ioaddr, COM20020_REG_W_COMMAND);</div><div class='add'>+		arcnet_inb(ioaddr, COM20020_REG_R_DIAGSTAT);</div><div class='ctx'> </div><div class='add'>+		SET_NETDEV_DEV(dev, &amp;pdev-&gt;dev);</div><div class='ctx'> 		dev-&gt;base_addr = ioaddr;</div><div class='del'>-		dev-&gt;dev_addr[0] = node;</div><div class='add'>+		arcnet_set_addr(dev, node);</div><div class='add'>+		dev-&gt;sysfs_groups[0] = &amp;com20020_state_group;</div><div class='ctx'> 		dev-&gt;irq = pdev-&gt;irq;</div><div class='ctx'> 		lp-&gt;card_name = "PCI COM20020";</div><div class='ctx'> 		lp-&gt;card_flags = ci-&gt;flags;</div><div class='hunk'>@@ -131,42 +209,99 @@ static int com20020pci_probe(struct pci_dev *pdev, const struct pci_device_id *i</div><div class='ctx'> 		lp-&gt;timeout = timeout;</div><div class='ctx'> 		lp-&gt;hw.owner = THIS_MODULE;</div><div class='ctx'> </div><div class='del'>-		if (ASTATUS() == 0xFF) {</div><div class='add'>+		lp-&gt;backplane = (inb(priv-&gt;misc) &gt;&gt; (2 + i)) &amp; 0x1;</div><div class='add'>+</div><div class='add'>+		if (!strncmp(ci-&gt;name, "EAE PLX-PCI FB2", 15))</div><div class='add'>+			lp-&gt;backplane = 1;</div><div class='add'>+</div><div class='add'>+		if (ci-&gt;flags &amp; ARC_HAS_ROTARY) {</div><div class='add'>+			/* Get the dev_id from the PLX rotary coder */</div><div class='add'>+			if (!strncmp(ci-&gt;name, "EAE PLX-PCI MA1", 15))</div><div class='add'>+				dev_id_mask = 0x3;</div><div class='add'>+			dev-&gt;dev_id = (inb(priv-&gt;misc + ci-&gt;rotary) &gt;&gt; 4) &amp; dev_id_mask;</div><div class='add'>+			snprintf(dev-&gt;name, sizeof(dev-&gt;name), "arc%d-%d", dev-&gt;dev_id, i);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (arcnet_inb(ioaddr, COM20020_REG_R_STATUS) == 0xFF) {</div><div class='ctx'> 			pr_err("IO address %Xh is empty!\n", ioaddr);</div><div class='ctx'> 			ret = -EIO;</div><div class='del'>-			goto out_port;</div><div class='add'>+			goto err_free_arcdev;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (com20020_check(dev)) {</div><div class='ctx'> 			ret = -EIO;</div><div class='del'>-			goto out_port;</div><div class='add'>+			goto err_free_arcdev;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		ret = com20020_found(dev, IRQF_SHARED);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto err_free_arcdev;</div><div class='add'>+</div><div class='ctx'> 		card = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(struct com20020_dev),</div><div class='ctx'> 				    GFP_KERNEL);</div><div class='ctx'> 		if (!card) {</div><div class='del'>-			pr_err("%s out of memory!\n", __func__);</div><div class='del'>-			return -ENOMEM;</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto err_free_arcdev;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		card-&gt;index = i;</div><div class='ctx'> 		card-&gt;pci_priv = priv;</div><div class='del'>-		card-&gt;dev = dev;</div><div class='ctx'> </div><div class='del'>-		dev_set_drvdata(&amp;dev-&gt;dev, card);</div><div class='del'>-</div><div class='del'>-		ret = com20020_found(dev, IRQF_SHARED);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto out_port;</div><div class='add'>+		if (ci-&gt;flags &amp; ARC_HAS_LED) {</div><div class='add'>+			card-&gt;tx_led.brightness_set = led_tx_set;</div><div class='add'>+			card-&gt;tx_led.default_trigger = devm_kasprintf(&amp;pdev-&gt;dev,</div><div class='add'>+							GFP_KERNEL, "arc%d-%d-tx",</div><div class='add'>+							dev-&gt;dev_id, i);</div><div class='add'>+			if (!card-&gt;tx_led.default_trigger) {</div><div class='add'>+				ret = -ENOMEM;</div><div class='add'>+				goto err_free_arcdev;</div><div class='add'>+			}</div><div class='add'>+			card-&gt;tx_led.name = devm_kasprintf(&amp;pdev-&gt;dev, GFP_KERNEL,</div><div class='add'>+							"pci:green:tx:%d-%d",</div><div class='add'>+							dev-&gt;dev_id, i);</div><div class='add'>+			if (!card-&gt;tx_led.name) {</div><div class='add'>+				ret = -ENOMEM;</div><div class='add'>+				goto err_free_arcdev;</div><div class='add'>+			}</div><div class='add'>+			card-&gt;tx_led.dev = &amp;dev-&gt;dev;</div><div class='add'>+			card-&gt;recon_led.brightness_set = led_recon_set;</div><div class='add'>+			card-&gt;recon_led.default_trigger = devm_kasprintf(&amp;pdev-&gt;dev,</div><div class='add'>+							GFP_KERNEL, "arc%d-%d-recon",</div><div class='add'>+							dev-&gt;dev_id, i);</div><div class='add'>+			if (!card-&gt;recon_led.default_trigger) {</div><div class='add'>+				ret = -ENOMEM;</div><div class='add'>+				goto err_free_arcdev;</div><div class='add'>+			}</div><div class='add'>+			card-&gt;recon_led.name = devm_kasprintf(&amp;pdev-&gt;dev, GFP_KERNEL,</div><div class='add'>+							"pci:red:recon:%d-%d",</div><div class='add'>+							dev-&gt;dev_id, i);</div><div class='add'>+			if (!card-&gt;recon_led.name) {</div><div class='add'>+				ret = -ENOMEM;</div><div class='add'>+				goto err_free_arcdev;</div><div class='add'>+			}</div><div class='add'>+			card-&gt;recon_led.dev = &amp;dev-&gt;dev;</div><div class='add'>+</div><div class='add'>+			ret = devm_led_classdev_register(&amp;pdev-&gt;dev, &amp;card-&gt;tx_led);</div><div class='add'>+			if (ret)</div><div class='add'>+				goto err_free_arcdev;</div><div class='add'>+</div><div class='add'>+			ret = devm_led_classdev_register(&amp;pdev-&gt;dev, &amp;card-&gt;recon_led);</div><div class='add'>+			if (ret)</div><div class='add'>+				goto err_free_arcdev;</div><div class='add'>+</div><div class='add'>+			dev_set_drvdata(&amp;dev-&gt;dev, card);</div><div class='add'>+			devm_arcnet_led_init(dev, dev-&gt;dev_id, i);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='add'>+		card-&gt;dev = dev;</div><div class='ctx'> 		list_add(&amp;card-&gt;list, &amp;priv-&gt;list_dev);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pci_set_drvdata(pdev, priv);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+		continue;</div><div class='ctx'> </div><div class='del'>-out_port:</div><div class='del'>-	com20020pci_remove(pdev);</div><div class='add'>+err_free_arcdev:</div><div class='add'>+		free_arcdev(dev);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	if (ret)</div><div class='add'>+		com20020pci_remove(pdev);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -182,7 +317,7 @@ static void com20020pci_remove(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> 		unregister_netdev(dev);</div><div class='ctx'> 		free_irq(dev-&gt;irq, dev);</div><div class='del'>-		free_netdev(dev);</div><div class='add'>+		free_arcdev(dev);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -190,7 +325,11 @@ static struct com20020_pci_card_info card_info_10mbit = {</div><div class='ctx'> 	.name = "ARC-PCI",</div><div class='ctx'> 	.devcount = 1,</div><div class='ctx'> 	.chan_map_tbl = {</div><div class='del'>-		{ 2, 0x00, 0x08 },</div><div class='add'>+		{</div><div class='add'>+			.bar = 2,</div><div class='add'>+			.offset = 0x00,</div><div class='add'>+			.size = 0x08,</div><div class='add'>+		},</div><div class='ctx'> 	},</div><div class='ctx'> 	.flags = ARC_CAN_10MBIT,</div><div class='ctx'> };</div><div class='hunk'>@@ -199,17 +338,25 @@ static struct com20020_pci_card_info card_info_5mbit = {</div><div class='ctx'> 	.name = "ARC-PCI",</div><div class='ctx'> 	.devcount = 1,</div><div class='ctx'> 	.chan_map_tbl = {</div><div class='del'>-		{ 2, 0x00, 0x08 },</div><div class='add'>+		{</div><div class='add'>+			.bar = 2,</div><div class='add'>+			.offset = 0x00,</div><div class='add'>+			.size = 0x08,</div><div class='add'>+		},</div><div class='ctx'> 	},</div><div class='ctx'> 	.flags = ARC_IS_5MBIT,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct com20020_pci_card_info card_info_sohard = {</div><div class='del'>-	.name = "PLX-PCI",</div><div class='add'>+	.name = "SOHARD SH ARC-PCI",</div><div class='ctx'> 	.devcount = 1,</div><div class='ctx'> 	/* SOHARD needs PCI base addr 4 */</div><div class='ctx'> 	.chan_map_tbl = {</div><div class='del'>-		{4, 0x00, 0x08},</div><div class='add'>+		{</div><div class='add'>+			.bar = 4,</div><div class='add'>+			.offset = 0x00,</div><div class='add'>+			.size = 0x08</div><div class='add'>+		},</div><div class='ctx'> 	},</div><div class='ctx'> 	.flags = ARC_CAN_10MBIT,</div><div class='ctx'> };</div><div class='hunk'>@@ -218,19 +365,82 @@ static struct com20020_pci_card_info card_info_eae_arc1 = {</div><div class='ctx'> 	.name = "EAE PLX-PCI ARC1",</div><div class='ctx'> 	.devcount = 1,</div><div class='ctx'> 	.chan_map_tbl = {</div><div class='del'>-		{ 2, 0x00, 0x08 },</div><div class='add'>+		{</div><div class='add'>+			.bar = 2,</div><div class='add'>+			.offset = 0x00,</div><div class='add'>+			.size = 0x08,</div><div class='add'>+		},</div><div class='ctx'> 	},</div><div class='del'>-	.flags = ARC_CAN_10MBIT,</div><div class='add'>+	.misc_map = {</div><div class='add'>+		.bar = 2,</div><div class='add'>+		.offset = 0x10,</div><div class='add'>+		.size = 0x04,</div><div class='add'>+	},</div><div class='add'>+	.leds = {</div><div class='add'>+		{</div><div class='add'>+			.green = 0x0,</div><div class='add'>+			.red = 0x1,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.rotary = 0x0,</div><div class='add'>+	.flags = ARC_HAS_ROTARY | ARC_HAS_LED | ARC_CAN_10MBIT,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct com20020_pci_card_info card_info_eae_ma1 = {</div><div class='ctx'> 	.name = "EAE PLX-PCI MA1",</div><div class='ctx'> 	.devcount = 2,</div><div class='ctx'> 	.chan_map_tbl = {</div><div class='del'>-		{ 2, 0x00, 0x08 },</div><div class='del'>-		{ 2, 0x08, 0x08 }</div><div class='add'>+		{</div><div class='add'>+			.bar = 2,</div><div class='add'>+			.offset = 0x00,</div><div class='add'>+			.size = 0x08,</div><div class='add'>+		}, {</div><div class='add'>+			.bar = 2,</div><div class='add'>+			.offset = 0x08,</div><div class='add'>+			.size = 0x08,</div><div class='add'>+		}</div><div class='ctx'> 	},</div><div class='del'>-	.flags = ARC_CAN_10MBIT,</div><div class='add'>+	.misc_map = {</div><div class='add'>+		.bar = 2,</div><div class='add'>+		.offset = 0x10,</div><div class='add'>+		.size = 0x04,</div><div class='add'>+	},</div><div class='add'>+	.leds = {</div><div class='add'>+		{</div><div class='add'>+			.green = 0x0,</div><div class='add'>+			.red = 0x1,</div><div class='add'>+		}, {</div><div class='add'>+			.green = 0x2,</div><div class='add'>+			.red = 0x3,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.rotary = 0x0,</div><div class='add'>+	.flags = ARC_HAS_ROTARY | ARC_HAS_LED | ARC_CAN_10MBIT,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct com20020_pci_card_info card_info_eae_fb2 = {</div><div class='add'>+	.name = "EAE PLX-PCI FB2",</div><div class='add'>+	.devcount = 1,</div><div class='add'>+	.chan_map_tbl = {</div><div class='add'>+		{</div><div class='add'>+			.bar = 2,</div><div class='add'>+			.offset = 0x00,</div><div class='add'>+			.size = 0x08,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.misc_map = {</div><div class='add'>+		.bar = 2,</div><div class='add'>+		.offset = 0x10,</div><div class='add'>+		.size = 0x04,</div><div class='add'>+	},</div><div class='add'>+	.leds = {</div><div class='add'>+		{</div><div class='add'>+			.green = 0x0,</div><div class='add'>+			.red = 0x1,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	.rotary = 0x0,</div><div class='add'>+	.flags = ARC_HAS_ROTARY | ARC_HAS_LED | ARC_CAN_10MBIT,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct pci_device_id com20020pci_id_table[] = {</div><div class='hunk'>@@ -379,6 +589,12 @@ static const struct pci_device_id com20020pci_id_table[] = {</div><div class='ctx'> 		(kernel_ulong_t)&amp;card_info_eae_ma1</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='add'>+		0x10B5, 0x9050,</div><div class='add'>+		0x10B5, 0x3294,</div><div class='add'>+		0, 0,</div><div class='add'>+		(kernel_ulong_t)&amp;card_info_eae_fb2</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='ctx'> 		0x14BA, 0x6000,</div><div class='ctx'> 		PCI_ANY_ID, PCI_ANY_ID,</div><div class='ctx'> 		0, 0,</div><div class='hunk'>@@ -404,7 +620,8 @@ static struct pci_driver com20020pci_driver = {</div><div class='ctx'> </div><div class='ctx'> static int __init com20020pci_init(void)</div><div class='ctx'> {</div><div class='del'>-	BUGLVL(D_NORMAL) printk(VERSION);</div><div class='add'>+	if (BUGLVL(D_NORMAL))</div><div class='add'>+		pr_info("%s\n", "COM20020 PCI support");</div><div class='ctx'> 	return pci_register_driver(&amp;com20020pci_driver);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/arcnet/com20020.c b/drivers/net/arcnet/com20020.c<br/>index 1a8437842fbc..a0053e3992a3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/arcnet/com20020.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/arcnet/com20020.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/arcnet/com20020.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/arcnet/com20020.c</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Linux ARCnet driver - COM20020 chipset support</div><div class='del'>- * </div><div class='add'>+ *</div><div class='ctx'>  * Written 1997 by David Woodhouse.</div><div class='ctx'>  * Written 1994-1999 by Avery Pennarun.</div><div class='ctx'>  * Written 1999 by Martin Mares &lt;mj@ucw.cz&gt;.</div><div class='hunk'>@@ -25,6 +25,9 @@</div><div class='ctx'>  *</div><div class='ctx'>  * **********************</div><div class='ctx'>  */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) "arcnet:" KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='hunk'>@@ -34,17 +37,16 @@</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/arcdevice.h&gt;</div><div class='del'>-#include &lt;linux/com20020.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='add'>+#include "arcdevice.h"</div><div class='add'>+#include "com20020.h"</div><div class='ctx'> </div><div class='del'>-#define VERSION "arcnet: COM20020 chipset support (by David Woodhouse et al.)\n"</div><div class='del'>-</div><div class='del'>-static char *clockrates[] =</div><div class='del'>-{"10 Mb/s", "Reserved", "5 Mb/s",</div><div class='del'>- "2.5 Mb/s", "1.25Mb/s", "625 Kb/s", "312.5 Kb/s",</div><div class='del'>- "156.25 Kb/s", "Reserved", "Reserved", "Reserved"};</div><div class='add'>+static const char * const clockrates[] = {</div><div class='add'>+	"XXXXXXX", "XXXXXXXX", "XXXXXX", "2.5 Mb/s",</div><div class='add'>+	"1.25Mb/s", "625 Kb/s", "312.5 Kb/s", "156.25 Kb/s",</div><div class='add'>+	"Reserved", "Reserved", "Reserved"</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> static void com20020_command(struct net_device *dev, int command);</div><div class='ctx'> static int com20020_status(struct net_device *dev);</div><div class='hunk'>@@ -63,35 +65,38 @@ static void com20020_copy_from_card(struct net_device *dev, int bufnum,</div><div class='ctx'> 	int ioaddr = dev-&gt;base_addr, ofs = 512 * bufnum + offset;</div><div class='ctx'> </div><div class='ctx'> 	/* set up the address register */</div><div class='del'>-	outb((ofs &gt;&gt; 8) | RDDATAflag | AUTOINCflag, _ADDR_HI);</div><div class='del'>-	outb(ofs &amp; 0xff, _ADDR_LO);</div><div class='add'>+	arcnet_outb((ofs &gt;&gt; 8) | RDDATAflag | AUTOINCflag,</div><div class='add'>+		    ioaddr, COM20020_REG_W_ADDR_HI);</div><div class='add'>+	arcnet_outb(ofs &amp; 0xff, ioaddr, COM20020_REG_W_ADDR_LO);</div><div class='ctx'> </div><div class='ctx'> 	/* copy the data */</div><div class='del'>-	TIME("insb", count, insb(_MEMDATA, buf, count));</div><div class='add'>+	TIME(dev, "insb", count,</div><div class='add'>+	     arcnet_insb(ioaddr, COM20020_REG_RW_MEMDATA, buf, count));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> static void com20020_copy_to_card(struct net_device *dev, int bufnum,</div><div class='ctx'> 				  int offset, void *buf, int count)</div><div class='ctx'> {</div><div class='ctx'> 	int ioaddr = dev-&gt;base_addr, ofs = 512 * bufnum + offset;</div><div class='ctx'> </div><div class='ctx'> 	/* set up the address register */</div><div class='del'>-	outb((ofs &gt;&gt; 8) | AUTOINCflag, _ADDR_HI);</div><div class='del'>-	outb(ofs &amp; 0xff, _ADDR_LO);</div><div class='add'>+	arcnet_outb((ofs &gt;&gt; 8) | AUTOINCflag, ioaddr, COM20020_REG_W_ADDR_HI);</div><div class='add'>+	arcnet_outb(ofs &amp; 0xff, ioaddr, COM20020_REG_W_ADDR_LO);</div><div class='ctx'> </div><div class='ctx'> 	/* copy the data */</div><div class='del'>-	TIME("outsb", count, outsb(_MEMDATA, buf, count));</div><div class='add'>+	TIME(dev, "outsb", count,</div><div class='add'>+	     arcnet_outsb(ioaddr, COM20020_REG_RW_MEMDATA, buf, count));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> /* Reset the card and check some basic stuff during the detection stage. */</div><div class='ctx'> int com20020_check(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	int ioaddr = dev-&gt;base_addr, status;</div><div class='ctx'> 	struct arcnet_local *lp = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	ARCRESET0;</div><div class='add'>+	arcnet_outb(XTOcfg(3) | RESETcfg, ioaddr, COM20020_REG_W_CONFIG);</div><div class='add'>+	udelay(5);</div><div class='add'>+	arcnet_outb(XTOcfg(3), ioaddr, COM20020_REG_W_CONFIG);</div><div class='ctx'> 	mdelay(RESETtime);</div><div class='ctx'> </div><div class='ctx'> 	lp-&gt;setup = lp-&gt;clockm ? 0 : (lp-&gt;clockp &lt;&lt; 1);</div><div class='hunk'>@@ -101,49 +106,46 @@ int com20020_check(struct net_device *dev)</div><div class='ctx'> 	/* Enable P1Mode for backplane mode */</div><div class='ctx'> 	lp-&gt;setup = lp-&gt;setup | P1MODE;</div><div class='ctx'> </div><div class='del'>-	SET_SUBADR(SUB_SETUP1);</div><div class='del'>-	outb(lp-&gt;setup, _XREG);</div><div class='add'>+	com20020_set_subaddress(lp, ioaddr, SUB_SETUP1);</div><div class='add'>+	arcnet_outb(lp-&gt;setup, ioaddr, COM20020_REG_W_XREG);</div><div class='add'>+</div><div class='add'>+	if (lp-&gt;clockm != 0) {</div><div class='add'>+		com20020_set_subaddress(lp, ioaddr, SUB_SETUP2);</div><div class='add'>+		arcnet_outb(lp-&gt;setup2, ioaddr, COM20020_REG_W_XREG);</div><div class='ctx'> </div><div class='del'>-	if (lp-&gt;clockm != 0)</div><div class='del'>-	{</div><div class='del'>-		SET_SUBADR(SUB_SETUP2);</div><div class='del'>-		outb(lp-&gt;setup2, _XREG);</div><div class='del'>-	</div><div class='ctx'> 		/* must now write the magic "restart operation" command */</div><div class='ctx'> 		mdelay(1);</div><div class='del'>-		outb(0x18, _COMMAND);</div><div class='add'>+		arcnet_outb(STARTIOcmd, ioaddr, COM20020_REG_W_COMMAND);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	lp-&gt;config = 0x21 | (lp-&gt;timeout &lt;&lt; 3) | (lp-&gt;backplane &lt;&lt; 2);</div><div class='add'>+	lp-&gt;config = (lp-&gt;timeout &lt;&lt; 3) | (lp-&gt;backplane &lt;&lt; 2) | SUB_NODE;</div><div class='ctx'> 	/* set node ID to 0x42 (but transmitter is disabled, so it's okay) */</div><div class='del'>-	SETCONF;</div><div class='del'>-	outb(0x42, ioaddr + BUS_ALIGN*7);</div><div class='add'>+	arcnet_outb(lp-&gt;config, ioaddr, COM20020_REG_W_CONFIG);</div><div class='add'>+	arcnet_outb(0x42, ioaddr, COM20020_REG_W_XREG);</div><div class='ctx'> </div><div class='del'>-	status = ASTATUS();</div><div class='add'>+	status = arcnet_inb(ioaddr, COM20020_REG_R_STATUS);</div><div class='ctx'> </div><div class='ctx'> 	if ((status &amp; 0x99) != (NORXflag | TXFREEflag | RESETflag)) {</div><div class='del'>-		BUGMSG(D_NORMAL, "status invalid (%Xh).\n", status);</div><div class='add'>+		arc_printk(D_NORMAL, dev, "status invalid (%Xh).\n", status);</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='del'>-	BUGMSG(D_INIT_REASONS, "status after reset: %X\n", status);</div><div class='del'>-</div><div class='del'>-	/* Enable TX */</div><div class='del'>-	outb(0x39, _CONFIG);</div><div class='del'>-	outb(inb(ioaddr + BUS_ALIGN*8), ioaddr + BUS_ALIGN*7);</div><div class='del'>-</div><div class='del'>-	ACOMMAND(CFLAGScmd | RESETclear | CONFIGclear);</div><div class='add'>+	arc_printk(D_INIT_REASONS, dev, "status after reset: %X\n", status);</div><div class='ctx'> </div><div class='del'>-	status = ASTATUS();</div><div class='del'>-	BUGMSG(D_INIT_REASONS, "status after reset acknowledged: %X\n",</div><div class='del'>-	       status);</div><div class='add'>+	arcnet_outb(CFLAGScmd | RESETclear | CONFIGclear,</div><div class='add'>+		    ioaddr, COM20020_REG_W_COMMAND);</div><div class='add'>+	status = arcnet_inb(ioaddr, COM20020_REG_R_STATUS);</div><div class='add'>+	arc_printk(D_INIT_REASONS, dev, "status after reset acknowledged: %X\n",</div><div class='add'>+		   status);</div><div class='ctx'> </div><div class='ctx'> 	/* Read first location of memory */</div><div class='del'>-	outb(0 | RDDATAflag | AUTOINCflag, _ADDR_HI);</div><div class='del'>-	outb(0, _ADDR_LO);</div><div class='del'>-</div><div class='del'>-	if ((status = inb(_MEMDATA)) != TESTvalue) {</div><div class='del'>-		BUGMSG(D_NORMAL, "Signature byte not found (%02Xh != D1h).\n",</div><div class='del'>-		       status);</div><div class='add'>+	arcnet_outb(0 | RDDATAflag | AUTOINCflag,</div><div class='add'>+		    ioaddr, COM20020_REG_W_ADDR_HI);</div><div class='add'>+	arcnet_outb(0, ioaddr, COM20020_REG_W_ADDR_LO);</div><div class='add'>+</div><div class='add'>+	status = arcnet_inb(ioaddr, COM20020_REG_RW_MEMDATA);</div><div class='add'>+	if (status != TESTvalue) {</div><div class='add'>+		arc_printk(D_NORMAL, dev, "Signature byte not found (%02Xh != D1h).\n",</div><div class='add'>+			   status);</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -155,16 +157,40 @@ static int com20020_set_hwaddr(struct net_device *dev, void *addr)</div><div class='ctx'> 	struct arcnet_local *lp = netdev_priv(dev);</div><div class='ctx'> 	struct sockaddr *hwaddr = addr;</div><div class='ctx'> </div><div class='del'>-	memcpy(dev-&gt;dev_addr, hwaddr-&gt;sa_data, 1);</div><div class='del'>-	SET_SUBADR(SUB_NODE);</div><div class='del'>-	outb(dev-&gt;dev_addr[0], _XREG);</div><div class='add'>+	dev_addr_set(dev, hwaddr-&gt;sa_data);</div><div class='add'>+	com20020_set_subaddress(lp, ioaddr, SUB_NODE);</div><div class='add'>+	arcnet_outb(dev-&gt;dev_addr[0], ioaddr, COM20020_REG_W_XREG);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int com20020_netdev_open(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	int ioaddr = dev-&gt;base_addr;</div><div class='add'>+	struct arcnet_local *lp = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	lp-&gt;config |= TXENcfg;</div><div class='add'>+	arcnet_outb(lp-&gt;config, ioaddr, COM20020_REG_W_CONFIG);</div><div class='add'>+</div><div class='add'>+	return arcnet_open(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int com20020_netdev_close(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	int ioaddr = dev-&gt;base_addr;</div><div class='add'>+	struct arcnet_local *lp = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	arcnet_close(dev);</div><div class='add'>+</div><div class='add'>+	/* disable transmitter */</div><div class='add'>+	lp-&gt;config &amp;= ~TXENcfg;</div><div class='add'>+	arcnet_outb(lp-&gt;config, ioaddr, COM20020_REG_W_CONFIG);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> const struct net_device_ops com20020_netdev_ops = {</div><div class='del'>-	.ndo_open	= arcnet_open,</div><div class='del'>-	.ndo_stop	= arcnet_close,</div><div class='add'>+	.ndo_open	= com20020_netdev_open,</div><div class='add'>+	.ndo_stop	= com20020_netdev_close,</div><div class='ctx'> 	.ndo_start_xmit = arcnet_send_packet,</div><div class='ctx'> 	.ndo_tx_timeout = arcnet_timeout,</div><div class='ctx'> 	.ndo_set_mac_address = com20020_set_hwaddr,</div><div class='hunk'>@@ -192,48 +218,52 @@ int com20020_found(struct net_device *dev, int shared)</div><div class='ctx'> 	lp-&gt;hw.copy_from_card = com20020_copy_from_card;</div><div class='ctx'> 	lp-&gt;hw.close = com20020_close;</div><div class='ctx'> </div><div class='add'>+	/* FIXME: do this some other way! */</div><div class='ctx'> 	if (!dev-&gt;dev_addr[0])</div><div class='del'>-		dev-&gt;dev_addr[0] = inb(ioaddr + BUS_ALIGN*8);	/* FIXME: do this some other way! */</div><div class='add'>+		arcnet_set_addr(dev, arcnet_inb(ioaddr, 8));</div><div class='ctx'> </div><div class='del'>-	SET_SUBADR(SUB_SETUP1);</div><div class='del'>-	outb(lp-&gt;setup, _XREG);</div><div class='add'>+	com20020_set_subaddress(lp, ioaddr, SUB_SETUP1);</div><div class='add'>+	arcnet_outb(lp-&gt;setup, ioaddr, COM20020_REG_W_XREG);</div><div class='add'>+</div><div class='add'>+	if (lp-&gt;card_flags &amp; ARC_CAN_10MBIT) {</div><div class='add'>+		com20020_set_subaddress(lp, ioaddr, SUB_SETUP2);</div><div class='add'>+		arcnet_outb(lp-&gt;setup2, ioaddr, COM20020_REG_W_XREG);</div><div class='ctx'> </div><div class='del'>-	if (lp-&gt;card_flags &amp; ARC_CAN_10MBIT)</div><div class='del'>-	{</div><div class='del'>-		SET_SUBADR(SUB_SETUP2);</div><div class='del'>-		outb(lp-&gt;setup2, _XREG);</div><div class='del'>-	</div><div class='ctx'> 		/* must now write the magic "restart operation" command */</div><div class='ctx'> 		mdelay(1);</div><div class='del'>-		outb(0x18, _COMMAND);</div><div class='add'>+		arcnet_outb(STARTIOcmd, ioaddr, COM20020_REG_W_COMMAND);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	lp-&gt;config = 0x20 | (lp-&gt;timeout &lt;&lt; 3) | (lp-&gt;backplane &lt;&lt; 2) | 1;</div><div class='add'>+	lp-&gt;config = (lp-&gt;timeout &lt;&lt; 3) | (lp-&gt;backplane &lt;&lt; 2) | SUB_NODE;</div><div class='ctx'> 	/* Default 0x38 + register: Node ID */</div><div class='del'>-	SETCONF;</div><div class='del'>-	outb(dev-&gt;dev_addr[0], _XREG);</div><div class='add'>+	arcnet_outb(lp-&gt;config, ioaddr, COM20020_REG_W_CONFIG);</div><div class='add'>+	arcnet_outb(dev-&gt;dev_addr[0], ioaddr, COM20020_REG_W_XREG);</div><div class='ctx'> </div><div class='ctx'> 	/* reserve the irq */</div><div class='ctx'> 	if (request_irq(dev-&gt;irq, arcnet_interrupt, shared,</div><div class='ctx'> 			"arcnet (COM20020)", dev)) {</div><div class='del'>-		BUGMSG(D_NORMAL, "Can't get IRQ %d!\n", dev-&gt;irq);</div><div class='add'>+		arc_printk(D_NORMAL, dev, "Can't get IRQ %d!\n", dev-&gt;irq);</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dev-&gt;base_addr = ioaddr;</div><div class='del'>-</div><div class='del'>-	BUGMSG(D_NORMAL, "%s: station %02Xh found at %03lXh, IRQ %d.\n",</div><div class='del'>-	       lp-&gt;card_name, dev-&gt;dev_addr[0], dev-&gt;base_addr, dev-&gt;irq);</div><div class='add'>+	arc_printk(D_NORMAL, dev, "%s: station %02Xh found at %03lXh, IRQ %d.\n",</div><div class='add'>+		   lp-&gt;card_name, dev-&gt;dev_addr[0], dev-&gt;base_addr, dev-&gt;irq);</div><div class='ctx'> </div><div class='ctx'> 	if (lp-&gt;backplane)</div><div class='del'>-		BUGMSG(D_NORMAL, "Using backplane mode.\n");</div><div class='add'>+		arc_printk(D_NORMAL, dev, "Using backplane mode.\n");</div><div class='ctx'> </div><div class='ctx'> 	if (lp-&gt;timeout != 3)</div><div class='del'>-		BUGMSG(D_NORMAL, "Using extended timeout value of %d.\n", lp-&gt;timeout);</div><div class='del'>-</div><div class='del'>-	BUGMSG(D_NORMAL, "Using CKP %d - data rate %s.\n",</div><div class='del'>-	       lp-&gt;setup &gt;&gt; 1, </div><div class='del'>-	       clockrates[3 - ((lp-&gt;setup2 &amp; 0xF0) &gt;&gt; 4) + ((lp-&gt;setup &amp; 0x0F) &gt;&gt; 1)]);</div><div class='add'>+		arc_printk(D_NORMAL, dev, "Using extended timeout value of %d\n",</div><div class='add'>+			   lp-&gt;timeout);</div><div class='add'>+</div><div class='add'>+	arc_printk(D_NORMAL, dev, "Using CKP %d - data rate %s\n",</div><div class='add'>+		   lp-&gt;setup &gt;&gt; 1,</div><div class='add'>+		   clockrates[3 -</div><div class='add'>+			      ((lp-&gt;setup2 &amp; 0xF0) &gt;&gt; 4) +</div><div class='add'>+			      ((lp-&gt;setup &amp; 0x0F) &gt;&gt; 1)]);</div><div class='add'>+			/* The clockrates array index looks very fragile.</div><div class='add'>+			 * It seems like it could have negative indexing.</div><div class='add'>+			 */</div><div class='ctx'> </div><div class='ctx'> 	if (register_netdev(dev)) {</div><div class='ctx'> 		free_irq(dev-&gt;irq, dev);</div><div class='hunk'>@@ -242,10 +272,8 @@ int com20020_found(struct net_device *dev, int shared)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/* </div><div class='del'>- * Do a hardware reset on the card, and set up necessary registers.</div><div class='del'>- * </div><div class='add'>+/* Do a hardware reset on the card, and set up necessary registers.</div><div class='add'>+ *</div><div class='ctx'>  * This should be called as little as possible, because it disrupts the</div><div class='ctx'>  * token on the network (causes a RECON) and requires a significant delay.</div><div class='ctx'>  *</div><div class='hunk'>@@ -257,65 +285,71 @@ static int com20020_reset(struct net_device *dev, int really_reset)</div><div class='ctx'> 	u_int ioaddr = dev-&gt;base_addr;</div><div class='ctx'> 	u_char inbyte;</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_DEBUG, "%s: %d: %s: dev: %p, lp: %p, dev-&gt;name: %s\n",</div><div class='del'>-		__FILE__,__LINE__,__func__,dev,lp,dev-&gt;name);</div><div class='del'>-	BUGMSG(D_INIT, "Resetting %s (status=%02Xh)\n",</div><div class='del'>-	       dev-&gt;name, ASTATUS());</div><div class='add'>+	arc_printk(D_DEBUG, dev, "%s: %d: %s: dev: %p, lp: %p, dev-&gt;name: %s\n",</div><div class='add'>+		   __FILE__, __LINE__, __func__, dev, lp, dev-&gt;name);</div><div class='add'>+	arc_printk(D_INIT, dev, "Resetting %s (status=%02Xh)\n",</div><div class='add'>+		   dev-&gt;name, arcnet_inb(ioaddr, COM20020_REG_R_STATUS));</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_DEBUG, "%s: %d: %s\n",__FILE__,__LINE__,__func__);</div><div class='del'>-	lp-&gt;config = TXENcfg | (lp-&gt;timeout &lt;&lt; 3) | (lp-&gt;backplane &lt;&lt; 2);</div><div class='add'>+	arc_printk(D_DEBUG, dev, "%s: %d: %s\n", __FILE__, __LINE__, __func__);</div><div class='add'>+	lp-&gt;config |= (lp-&gt;timeout &lt;&lt; 3) | (lp-&gt;backplane &lt;&lt; 2);</div><div class='ctx'> 	/* power-up defaults */</div><div class='del'>-	SETCONF;</div><div class='del'>-	BUGMSG(D_DEBUG, "%s: %d: %s\n",__FILE__,__LINE__,__func__);</div><div class='add'>+	arcnet_outb(lp-&gt;config, ioaddr, COM20020_REG_W_CONFIG);</div><div class='add'>+	arc_printk(D_DEBUG, dev, "%s: %d: %s\n", __FILE__, __LINE__, __func__);</div><div class='ctx'> </div><div class='ctx'> 	if (really_reset) {</div><div class='ctx'> 		/* reset the card */</div><div class='del'>-		ARCRESET;</div><div class='del'>-		mdelay(RESETtime * 2);	/* COM20020 seems to be slower sometimes */</div><div class='add'>+		arcnet_outb(lp-&gt;config | RESETcfg, ioaddr, COM20020_REG_W_CONFIG);</div><div class='add'>+		udelay(5);</div><div class='add'>+		arcnet_outb(lp-&gt;config, ioaddr, COM20020_REG_W_CONFIG);</div><div class='add'>+		mdelay(RESETtime * 2);</div><div class='add'>+				/* COM20020 seems to be slower sometimes */</div><div class='ctx'> 	}</div><div class='ctx'> 	/* clear flags &amp; end reset */</div><div class='del'>-	BUGMSG(D_DEBUG, "%s: %d: %s\n",__FILE__,__LINE__,__func__);</div><div class='del'>-	ACOMMAND(CFLAGScmd | RESETclear | CONFIGclear);</div><div class='add'>+	arc_printk(D_DEBUG, dev, "%s: %d: %s\n", __FILE__, __LINE__, __func__);</div><div class='add'>+	arcnet_outb(CFLAGScmd | RESETclear | CONFIGclear,</div><div class='add'>+		    ioaddr, COM20020_REG_W_COMMAND);</div><div class='ctx'> </div><div class='ctx'> 	/* verify that the ARCnet signature byte is present */</div><div class='del'>-	BUGMSG(D_DEBUG, "%s: %d: %s\n",__FILE__,__LINE__,__func__);</div><div class='add'>+	arc_printk(D_DEBUG, dev, "%s: %d: %s\n", __FILE__, __LINE__, __func__);</div><div class='ctx'> </div><div class='ctx'> 	com20020_copy_from_card(dev, 0, 0, &amp;inbyte, 1);</div><div class='del'>-	BUGMSG(D_DEBUG, "%s: %d: %s\n",__FILE__,__LINE__,__func__);</div><div class='add'>+	arc_printk(D_DEBUG, dev, "%s: %d: %s\n", __FILE__, __LINE__, __func__);</div><div class='ctx'> 	if (inbyte != TESTvalue) {</div><div class='del'>-		BUGMSG(D_DEBUG, "%s: %d: %s\n",__FILE__,__LINE__,__func__);</div><div class='del'>-		BUGMSG(D_NORMAL, "reset failed: TESTvalue not present.\n");</div><div class='add'>+		arc_printk(D_DEBUG, dev, "%s: %d: %s\n",</div><div class='add'>+			   __FILE__, __LINE__, __func__);</div><div class='add'>+		arc_printk(D_NORMAL, dev, "reset failed: TESTvalue not present.\n");</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* enable extended (512-byte) packets */</div><div class='del'>-	ACOMMAND(CONFIGcmd | EXTconf);</div><div class='del'>-	BUGMSG(D_DEBUG, "%s: %d: %s\n",__FILE__,__LINE__,__func__);</div><div class='add'>+	arcnet_outb(CONFIGcmd | EXTconf, ioaddr, COM20020_REG_W_COMMAND);</div><div class='add'>+</div><div class='add'>+	arc_printk(D_DEBUG, dev, "%s: %d: %s\n", __FILE__, __LINE__, __func__);</div><div class='ctx'> </div><div class='ctx'> 	/* done!  return success. */</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> static void com20020_setmask(struct net_device *dev, int mask)</div><div class='ctx'> {</div><div class='ctx'> 	u_int ioaddr = dev-&gt;base_addr;</div><div class='del'>-	BUGMSG(D_DURING, "Setting mask to %x at %x\n",mask,ioaddr);</div><div class='del'>-	AINTMASK(mask);</div><div class='del'>-}</div><div class='ctx'> </div><div class='add'>+	arc_printk(D_DURING, dev, "Setting mask to %x at %x\n", mask, ioaddr);</div><div class='add'>+	arcnet_outb(mask, ioaddr, COM20020_REG_W_INTMASK);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static void com20020_command(struct net_device *dev, int cmd)</div><div class='ctx'> {</div><div class='ctx'> 	u_int ioaddr = dev-&gt;base_addr;</div><div class='del'>-	ACOMMAND(cmd);</div><div class='del'>-}</div><div class='ctx'> </div><div class='add'>+	arcnet_outb(cmd, ioaddr, COM20020_REG_W_COMMAND);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static int com20020_status(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	u_int ioaddr = dev-&gt;base_addr;</div><div class='ctx'> </div><div class='del'>-	return ASTATUS() + (ADIAGSTATUS()&lt;&lt;8);</div><div class='add'>+	return arcnet_inb(ioaddr, COM20020_REG_R_STATUS) +</div><div class='add'>+		(arcnet_inb(ioaddr, COM20020_REG_R_DIAGSTAT) &lt;&lt; 8);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void com20020_close(struct net_device *dev)</div><div class='hunk'>@@ -325,7 +359,7 @@ static void com20020_close(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	/* disable transmitter */</div><div class='ctx'> 	lp-&gt;config &amp;= ~TXENcfg;</div><div class='del'>-	SETCONF;</div><div class='add'>+	arcnet_outb(lp-&gt;config, ioaddr, COM20020_REG_W_CONFIG);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Set or clear the multicast filter for this adaptor.</div><div class='hunk'>@@ -340,20 +374,20 @@ static void com20020_set_mc_list(struct net_device *dev)</div><div class='ctx'> 	struct arcnet_local *lp = netdev_priv(dev);</div><div class='ctx'> 	int ioaddr = dev-&gt;base_addr;</div><div class='ctx'> </div><div class='del'>-	if ((dev-&gt;flags &amp; IFF_PROMISC) &amp;&amp; (dev-&gt;flags &amp; IFF_UP)) {	/* Enable promiscuous mode */</div><div class='add'>+	if ((dev-&gt;flags &amp; IFF_PROMISC) &amp;&amp; (dev-&gt;flags &amp; IFF_UP)) {</div><div class='add'>+		/* Enable promiscuous mode */</div><div class='ctx'> 		if (!(lp-&gt;setup &amp; PROMISCset))</div><div class='del'>-			BUGMSG(D_NORMAL, "Setting promiscuous flag...\n");</div><div class='del'>-		SET_SUBADR(SUB_SETUP1);</div><div class='add'>+			arc_printk(D_NORMAL, dev, "Setting promiscuous flag...\n");</div><div class='add'>+		com20020_set_subaddress(lp, ioaddr, SUB_SETUP1);</div><div class='ctx'> 		lp-&gt;setup |= PROMISCset;</div><div class='del'>-		outb(lp-&gt;setup, _XREG);</div><div class='del'>-	} else</div><div class='add'>+		arcnet_outb(lp-&gt;setup, ioaddr, COM20020_REG_W_XREG);</div><div class='add'>+	} else {</div><div class='ctx'> 		/* Disable promiscuous mode, use normal mode */</div><div class='del'>-	{</div><div class='ctx'> 		if ((lp-&gt;setup &amp; PROMISCset))</div><div class='del'>-			BUGMSG(D_NORMAL, "Resetting promiscuous flag...\n");</div><div class='del'>-		SET_SUBADR(SUB_SETUP1);</div><div class='add'>+			arc_printk(D_NORMAL, dev, "Resetting promiscuous flag...\n");</div><div class='add'>+		com20020_set_subaddress(lp, ioaddr, SUB_SETUP1);</div><div class='ctx'> 		lp-&gt;setup &amp;= ~PROMISCset;</div><div class='del'>-		outb(lp-&gt;setup, _XREG);</div><div class='add'>+		arcnet_outb(lp-&gt;setup, ioaddr, COM20020_REG_W_XREG);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -365,13 +399,15 @@ EXPORT_SYMBOL(com20020_found);</div><div class='ctx'> EXPORT_SYMBOL(com20020_netdev_ops);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+MODULE_DESCRIPTION("ARCnet COM20020 chipset core driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='ctx'> #ifdef MODULE</div><div class='ctx'> </div><div class='ctx'> static int __init com20020_module_init(void)</div><div class='ctx'> {</div><div class='del'>-	BUGLVL(D_NORMAL) printk(VERSION);</div><div class='add'>+	if (BUGLVL(D_NORMAL))</div><div class='add'>+		pr_info("%s\n", "COM20020 chipset support (by David Woodhouse et al.)");</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/arcnet/com20020.h b/drivers/net/arcnet/com20020.h<br/>new file mode 100644<br/>index 000000000000..0bcc5d0a6903<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/arcnet/com20020.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/arcnet/com20020.h</a></div><div class='hunk'>@@ -0,0 +1,132 @@</div><div class='add'>+/*</div><div class='add'>+ * Linux ARCnet driver - COM20020 chipset support - function declarations</div><div class='add'>+ *</div><div class='add'>+ * Written 1997 by David Woodhouse.</div><div class='add'>+ * Written 1994-1999 by Avery Pennarun.</div><div class='add'>+ * Derived from skeleton.c by Donald Becker.</div><div class='add'>+ *</div><div class='add'>+ * Special thanks to Contemporary Controls, Inc. (www.ccontrols.com)</div><div class='add'>+ *  for sponsoring the further development of this driver.</div><div class='add'>+ *</div><div class='add'>+ * **********************</div><div class='add'>+ *</div><div class='add'>+ * The original copyright of skeleton.c was as follows:</div><div class='add'>+ *</div><div class='add'>+ * skeleton.c Written 1993 by Donald Becker.</div><div class='add'>+ * Copyright 1993 United States Government as represented by the</div><div class='add'>+ * Director, National Security Agency.  This software may only be used</div><div class='add'>+ * and distributed according to the terms of the GNU General Public License as</div><div class='add'>+ * modified by SRC, incorporated herein by reference.</div><div class='add'>+ *</div><div class='add'>+ * **********************</div><div class='add'>+ *</div><div class='add'>+ * For more details, see drivers/net/arcnet.c</div><div class='add'>+ *</div><div class='add'>+ * **********************</div><div class='add'>+ */</div><div class='add'>+#ifndef __COM20020_H</div><div class='add'>+#define __COM20020_H</div><div class='add'>+#include &lt;linux/leds.h&gt;</div><div class='add'>+</div><div class='add'>+int com20020_check(struct net_device *dev);</div><div class='add'>+int com20020_found(struct net_device *dev, int shared);</div><div class='add'>+extern const struct net_device_ops com20020_netdev_ops;</div><div class='add'>+</div><div class='add'>+/* The number of low I/O ports used by the card. */</div><div class='add'>+#define ARCNET_TOTAL_SIZE 8</div><div class='add'>+</div><div class='add'>+#define PLX_PCI_MAX_CARDS 2</div><div class='add'>+</div><div class='add'>+struct ledoffsets {</div><div class='add'>+	int green;</div><div class='add'>+	int red;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct com20020_pci_channel_map {</div><div class='add'>+	u32 bar;</div><div class='add'>+	u32 offset;</div><div class='add'>+	u32 size;               /* 0x00 - auto, e.g. length of entire bar */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct com20020_pci_card_info {</div><div class='add'>+	const char *name;</div><div class='add'>+	int devcount;</div><div class='add'>+</div><div class='add'>+	struct com20020_pci_channel_map chan_map_tbl[PLX_PCI_MAX_CARDS];</div><div class='add'>+	struct com20020_pci_channel_map misc_map;</div><div class='add'>+</div><div class='add'>+	struct ledoffsets leds[PLX_PCI_MAX_CARDS];</div><div class='add'>+	int rotary;</div><div class='add'>+</div><div class='add'>+	unsigned int flags;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct com20020_priv {</div><div class='add'>+	struct com20020_pci_card_info *ci;</div><div class='add'>+	struct list_head list_dev;</div><div class='add'>+	resource_size_t misc;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct com20020_dev {</div><div class='add'>+	struct list_head list;</div><div class='add'>+	struct net_device *dev;</div><div class='add'>+</div><div class='add'>+	struct led_classdev tx_led;</div><div class='add'>+	struct led_classdev recon_led;</div><div class='add'>+</div><div class='add'>+	struct com20020_priv *pci_priv;</div><div class='add'>+	int index;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define COM20020_REG_W_INTMASK	0	/* writable */</div><div class='add'>+#define COM20020_REG_R_STATUS	0	/* readable */</div><div class='add'>+#define COM20020_REG_W_COMMAND	1	/* standard arcnet commands */</div><div class='add'>+#define COM20020_REG_R_DIAGSTAT	1	/* diagnostic status */</div><div class='add'>+#define COM20020_REG_W_ADDR_HI	2	/* control for IO-mapped memory */</div><div class='add'>+#define COM20020_REG_W_ADDR_LO	3</div><div class='add'>+#define COM20020_REG_RW_MEMDATA	4	/* data port for IO-mapped memory */</div><div class='add'>+#define COM20020_REG_W_SUBADR	5	/* the extended port _XREG refers to */</div><div class='add'>+#define COM20020_REG_W_CONFIG	6	/* configuration */</div><div class='add'>+#define COM20020_REG_W_XREG	7	/* extra</div><div class='add'>+					 * (indexed by _CONFIG or _SUBADDR)</div><div class='add'>+					 */</div><div class='add'>+</div><div class='add'>+/* in the ADDR_HI register */</div><div class='add'>+#define RDDATAflag	0x80	/* next access is a read (not a write) */</div><div class='add'>+</div><div class='add'>+/* in the DIAGSTAT register */</div><div class='add'>+#define NEWNXTIDflag	0x02	/* ID to which token is passed has changed */</div><div class='add'>+</div><div class='add'>+/* in the CONFIG register */</div><div class='add'>+#define RESETcfg	0x80	/* put card in reset state */</div><div class='add'>+#define TXENcfg		0x20	/* enable TX */</div><div class='add'>+#define XTOcfg(x)	((x) &lt;&lt; 3)	/* extended timeout */</div><div class='add'>+</div><div class='add'>+/* in SETUP register */</div><div class='add'>+#define PROMISCset	0x10	/* enable RCV_ALL */</div><div class='add'>+#define P1MODE		0x80    /* enable P1-MODE for Backplane */</div><div class='add'>+#define SLOWARB		0x01    /* enable Slow Arbitration for &gt;=5Mbps */</div><div class='add'>+</div><div class='add'>+/* COM2002x */</div><div class='add'>+#define SUB_TENTATIVE	0	/* tentative node ID */</div><div class='add'>+#define SUB_NODE	1	/* node ID */</div><div class='add'>+#define SUB_SETUP1	2	/* various options */</div><div class='add'>+#define SUB_TEST	3	/* test/diag register */</div><div class='add'>+</div><div class='add'>+/* COM20022 only */</div><div class='add'>+#define SUB_SETUP2	4	/* sundry options */</div><div class='add'>+#define SUB_BUSCTL	5	/* bus control options */</div><div class='add'>+#define SUB_DMACOUNT	6	/* DMA count options */</div><div class='add'>+</div><div class='add'>+static inline void com20020_set_subaddress(struct arcnet_local *lp,</div><div class='add'>+					   int ioaddr, int val)</div><div class='add'>+{</div><div class='add'>+	if (val &lt; 4) {</div><div class='add'>+		lp-&gt;config = (lp-&gt;config &amp; ~0x03) | val;</div><div class='add'>+		arcnet_outb(lp-&gt;config, ioaddr, COM20020_REG_W_CONFIG);</div><div class='add'>+	} else {</div><div class='add'>+		arcnet_outb(val, ioaddr, COM20020_REG_W_SUBADR);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* __COM20020_H */</div><div class='head'>diff --git a/drivers/net/arcnet/com20020_cs.c b/drivers/net/arcnet/com20020_cs.c<br/>index 057d9582132a..75f08aa7528b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/arcnet/com20020_cs.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/arcnet/com20020_cs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/arcnet/com20020_cs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/arcnet/com20020_cs.c</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Linux ARCnet driver - COM20020 PCMCIA support</div><div class='del'>- * </div><div class='add'>+ *</div><div class='ctx'>  * Written 1994-1999 by Avery Pennarun,</div><div class='ctx'>  *    based on an ISA version by David Woodhouse.</div><div class='ctx'>  * Derived from ibmtr_cs.c by Steve Kipisz (pcmcia-cs 3.1.4)</div><div class='hunk'>@@ -19,18 +19,21 @@</div><div class='ctx'>  * Director, National Security Agency.  This software may only be used</div><div class='ctx'>  * and distributed according to the terms of the GNU General Public License as</div><div class='ctx'>  * modified by SRC, incorporated herein by reference.</div><div class='del'>- * </div><div class='add'>+ *</div><div class='ctx'>  * **********************</div><div class='ctx'>  * Changes:</div><div class='ctx'>  * Arnaldo Carvalho de Melo &lt;acme@conectiva.com.br&gt; - 08/08/2000</div><div class='ctx'>  * - reorganize kmallocs in com20020_attach, checking all for failure</div><div class='ctx'>  *   and releasing the previous allocations if one fails</div><div class='ctx'>  * **********************</div><div class='del'>- * </div><div class='add'>+ *</div><div class='ctx'>  * For more details, see drivers/net/arcnet.c</div><div class='ctx'>  *</div><div class='ctx'>  * **********************</div><div class='ctx'>  */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) "arcnet:" KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/ptrace.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='hunk'>@@ -39,51 +42,44 @@</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/arcdevice.h&gt;</div><div class='del'>-#include &lt;linux/com20020.h&gt;</div><div class='del'>-</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;pcmcia/cistpl.h&gt;</div><div class='ctx'> #include &lt;pcmcia/ds.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-</div><div class='del'>-#define VERSION "arcnet: COM20020 PCMCIA support loaded.\n"</div><div class='del'>-</div><div class='add'>+#include "arcdevice.h"</div><div class='add'>+#include "com20020.h"</div><div class='ctx'> </div><div class='ctx'> static void regdump(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> #ifdef DEBUG</div><div class='del'>-    int ioaddr = dev-&gt;base_addr;</div><div class='del'>-    int count;</div><div class='del'>-    </div><div class='del'>-    netdev_dbg(dev, "register dump:\n");</div><div class='del'>-    for (count = ioaddr; count &lt; ioaddr + 16; count++)</div><div class='del'>-    {</div><div class='del'>-	if (!(count % 16))</div><div class='del'>-	    pr_cont("%04X:", count);</div><div class='del'>-	pr_cont(" %02X", inb(count));</div><div class='del'>-    }</div><div class='del'>-    pr_cont("\n");</div><div class='del'>-    </div><div class='del'>-    netdev_dbg(dev, "buffer0 dump:\n");</div><div class='add'>+	int ioaddr = dev-&gt;base_addr;</div><div class='add'>+	int count;</div><div class='add'>+</div><div class='add'>+	netdev_dbg(dev, "register dump:\n");</div><div class='add'>+	for (count = 0; count &lt; 16; count++) {</div><div class='add'>+		if (!(count % 16))</div><div class='add'>+			pr_cont("%04X:", ioaddr + count);</div><div class='add'>+		pr_cont(" %02X", arcnet_inb(ioaddr, count));</div><div class='add'>+	}</div><div class='add'>+	pr_cont("\n");</div><div class='add'>+</div><div class='add'>+	netdev_dbg(dev, "buffer0 dump:\n");</div><div class='ctx'> 	/* set up the address register */</div><div class='del'>-        count = 0;</div><div class='del'>-	outb((count &gt;&gt; 8) | RDDATAflag | AUTOINCflag, _ADDR_HI);</div><div class='del'>-	outb(count &amp; 0xff, _ADDR_LO);</div><div class='del'>-    </div><div class='del'>-    for (count = 0; count &lt; 256+32; count++)</div><div class='del'>-    {</div><div class='del'>-	if (!(count % 16))</div><div class='del'>-	    pr_cont("%04X:", count);</div><div class='del'>-	</div><div class='del'>-	/* copy the data */</div><div class='del'>-	pr_cont(" %02X", inb(_MEMDATA));</div><div class='del'>-    }</div><div class='del'>-    pr_cont("\n");</div><div class='del'>-#endif</div><div class='del'>-}</div><div class='add'>+	count = 0;</div><div class='add'>+	arcnet_outb((count &gt;&gt; 8) | RDDATAflag | AUTOINCflag,</div><div class='add'>+		    ioaddr, COM20020_REG_W_ADDR_HI);</div><div class='add'>+	arcnet_outb(count &amp; 0xff, ioaddr, COM20020_REG_W_ADDR_LO);</div><div class='ctx'> </div><div class='add'>+	for (count = 0; count &lt; 256 + 32; count++) {</div><div class='add'>+		if (!(count % 16))</div><div class='add'>+			pr_cont("%04X:", count);</div><div class='ctx'> </div><div class='add'>+		/* copy the data */</div><div class='add'>+		pr_cont(" %02X", arcnet_inb(ioaddr, COM20020_REG_RW_MEMDATA));</div><div class='add'>+	}</div><div class='add'>+	pr_cont("\n");</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /*====================================================================*/</div><div class='ctx'> </div><div class='hunk'>@@ -101,6 +97,7 @@ module_param(backplane, int, 0);</div><div class='ctx'> module_param(clockp, int, 0);</div><div class='ctx'> module_param(clockm, int, 0);</div><div class='ctx'> </div><div class='add'>+MODULE_DESCRIPTION("ARCnet COM20020 chipset PCMCIA driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='ctx'> /*====================================================================*/</div><div class='hunk'>@@ -114,169 +111,168 @@ static void com20020_detach(struct pcmcia_device *p_dev);</div><div class='ctx'> </div><div class='ctx'> static int com20020_probe(struct pcmcia_device *p_dev)</div><div class='ctx'> {</div><div class='del'>-    struct com20020_dev *info;</div><div class='del'>-    struct net_device *dev;</div><div class='del'>-    struct arcnet_local *lp;</div><div class='add'>+	struct com20020_dev *info;</div><div class='add'>+	struct net_device *dev;</div><div class='add'>+	struct arcnet_local *lp;</div><div class='add'>+	int ret = -ENOMEM;</div><div class='ctx'> </div><div class='del'>-    dev_dbg(&amp;p_dev-&gt;dev, "com20020_attach()\n");</div><div class='add'>+	dev_dbg(&amp;p_dev-&gt;dev, "com20020_attach()\n");</div><div class='ctx'> </div><div class='del'>-    /* Create new network device */</div><div class='del'>-    info = kzalloc(sizeof(*info), GFP_KERNEL);</div><div class='del'>-    if (!info)</div><div class='del'>-	goto fail_alloc_info;</div><div class='add'>+	/* Create new network device */</div><div class='add'>+	info = kzalloc(sizeof(*info), GFP_KERNEL);</div><div class='add'>+	if (!info)</div><div class='add'>+		goto fail_alloc_info;</div><div class='ctx'> </div><div class='del'>-    dev = alloc_arcdev("");</div><div class='del'>-    if (!dev)</div><div class='del'>-	goto fail_alloc_dev;</div><div class='add'>+	dev = alloc_arcdev("");</div><div class='add'>+	if (!dev)</div><div class='add'>+		goto fail_alloc_dev;</div><div class='ctx'> </div><div class='del'>-    lp = netdev_priv(dev);</div><div class='del'>-    lp-&gt;timeout = timeout;</div><div class='del'>-    lp-&gt;backplane = backplane;</div><div class='del'>-    lp-&gt;clockp = clockp;</div><div class='del'>-    lp-&gt;clockm = clockm &amp; 3;</div><div class='del'>-    lp-&gt;hw.owner = THIS_MODULE;</div><div class='add'>+	lp = netdev_priv(dev);</div><div class='add'>+	lp-&gt;timeout = timeout;</div><div class='add'>+	lp-&gt;backplane = backplane;</div><div class='add'>+	lp-&gt;clockp = clockp;</div><div class='add'>+	lp-&gt;clockm = clockm &amp; 3;</div><div class='add'>+	lp-&gt;hw.owner = THIS_MODULE;</div><div class='ctx'> </div><div class='del'>-    /* fill in our module parameters as defaults */</div><div class='del'>-    dev-&gt;dev_addr[0] = node;</div><div class='add'>+	/* fill in our module parameters as defaults */</div><div class='add'>+	arcnet_set_addr(dev, node);</div><div class='ctx'> </div><div class='del'>-    p_dev-&gt;resource[0]-&gt;flags |= IO_DATA_PATH_WIDTH_8;</div><div class='del'>-    p_dev-&gt;resource[0]-&gt;end = 16;</div><div class='del'>-    p_dev-&gt;config_flags |= CONF_ENABLE_IRQ;</div><div class='add'>+	p_dev-&gt;resource[0]-&gt;flags |= IO_DATA_PATH_WIDTH_8;</div><div class='add'>+	p_dev-&gt;resource[0]-&gt;end = 16;</div><div class='add'>+	p_dev-&gt;config_flags |= CONF_ENABLE_IRQ;</div><div class='ctx'> </div><div class='del'>-    info-&gt;dev = dev;</div><div class='del'>-    p_dev-&gt;priv = info;</div><div class='add'>+	info-&gt;dev = dev;</div><div class='add'>+	p_dev-&gt;priv = info;</div><div class='ctx'> </div><div class='del'>-    return com20020_config(p_dev);</div><div class='add'>+	ret = com20020_config(p_dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto fail_config;</div><div class='ctx'> </div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+fail_config:</div><div class='add'>+	free_arcdev(dev);</div><div class='ctx'> fail_alloc_dev:</div><div class='del'>-    kfree(info);</div><div class='add'>+	kfree(info);</div><div class='ctx'> fail_alloc_info:</div><div class='del'>-    return -ENOMEM;</div><div class='add'>+	return ret;</div><div class='ctx'> } /* com20020_attach */</div><div class='ctx'> </div><div class='ctx'> static void com20020_detach(struct pcmcia_device *link)</div><div class='ctx'> {</div><div class='del'>-    struct com20020_dev *info = link-&gt;priv;</div><div class='del'>-    struct net_device *dev = info-&gt;dev;</div><div class='add'>+	struct com20020_dev *info = link-&gt;priv;</div><div class='add'>+	struct net_device *dev = info-&gt;dev;</div><div class='ctx'> </div><div class='del'>-    dev_dbg(&amp;link-&gt;dev, "detach...\n");</div><div class='add'>+	dev_dbg(&amp;link-&gt;dev, "detach...\n");</div><div class='ctx'> </div><div class='del'>-    dev_dbg(&amp;link-&gt;dev, "com20020_detach\n");</div><div class='add'>+	dev_dbg(&amp;link-&gt;dev, "com20020_detach\n");</div><div class='ctx'> </div><div class='del'>-    dev_dbg(&amp;link-&gt;dev, "unregister...\n");</div><div class='add'>+	dev_dbg(&amp;link-&gt;dev, "unregister...\n");</div><div class='ctx'> </div><div class='del'>-    unregister_netdev(dev);</div><div class='add'>+	unregister_netdev(dev);</div><div class='ctx'> </div><div class='del'>-    /*</div><div class='del'>-     * this is necessary because we register our IRQ separately</div><div class='del'>-     * from card services.</div><div class='del'>-     */</div><div class='del'>-    if (dev-&gt;irq)</div><div class='del'>-	    free_irq(dev-&gt;irq, dev);</div><div class='add'>+	/* this is necessary because we register our IRQ separately</div><div class='add'>+	 * from card services.</div><div class='add'>+	 */</div><div class='add'>+	if (dev-&gt;irq)</div><div class='add'>+		free_irq(dev-&gt;irq, dev);</div><div class='ctx'> </div><div class='del'>-    com20020_release(link);</div><div class='add'>+	com20020_release(link);</div><div class='ctx'> </div><div class='del'>-    /* Unlink device structure, free bits */</div><div class='del'>-    dev_dbg(&amp;link-&gt;dev, "unlinking...\n");</div><div class='del'>-    if (link-&gt;priv)</div><div class='del'>-    {</div><div class='del'>-	dev = info-&gt;dev;</div><div class='del'>-	if (dev)</div><div class='del'>-	{</div><div class='del'>-	    dev_dbg(&amp;link-&gt;dev, "kfree...\n");</div><div class='del'>-	    free_netdev(dev);</div><div class='add'>+	/* Unlink device structure, free bits */</div><div class='add'>+	dev_dbg(&amp;link-&gt;dev, "unlinking...\n");</div><div class='add'>+	if (link-&gt;priv) {</div><div class='add'>+		dev = info-&gt;dev;</div><div class='add'>+		if (dev) {</div><div class='add'>+			dev_dbg(&amp;link-&gt;dev, "kfree...\n");</div><div class='add'>+			free_arcdev(dev);</div><div class='add'>+		}</div><div class='add'>+		dev_dbg(&amp;link-&gt;dev, "kfree2...\n");</div><div class='add'>+		kfree(info);</div><div class='ctx'> 	}</div><div class='del'>-	dev_dbg(&amp;link-&gt;dev, "kfree2...\n");</div><div class='del'>-	kfree(info);</div><div class='del'>-    }</div><div class='ctx'> </div><div class='ctx'> } /* com20020_detach */</div><div class='ctx'> </div><div class='ctx'> static int com20020_config(struct pcmcia_device *link)</div><div class='ctx'> {</div><div class='del'>-    struct arcnet_local *lp;</div><div class='del'>-    struct com20020_dev *info;</div><div class='del'>-    struct net_device *dev;</div><div class='del'>-    int i, ret;</div><div class='del'>-    int ioaddr;</div><div class='add'>+	struct arcnet_local *lp;</div><div class='add'>+	struct com20020_dev *info;</div><div class='add'>+	struct net_device *dev;</div><div class='add'>+	int i, ret;</div><div class='add'>+	int ioaddr;</div><div class='add'>+</div><div class='add'>+	info = link-&gt;priv;</div><div class='add'>+	dev = info-&gt;dev;</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;link-&gt;dev, "config...\n");</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;link-&gt;dev, "com20020_config\n");</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;link-&gt;dev, "baseport1 is %Xh\n",</div><div class='add'>+		(unsigned int)link-&gt;resource[0]-&gt;start);</div><div class='add'>+</div><div class='add'>+	i = -ENODEV;</div><div class='add'>+	link-&gt;io_lines = 16;</div><div class='add'>+</div><div class='add'>+	if (!link-&gt;resource[0]-&gt;start) {</div><div class='add'>+		for (ioaddr = 0x100; ioaddr &lt; 0x400; ioaddr += 0x10) {</div><div class='add'>+			link-&gt;resource[0]-&gt;start = ioaddr;</div><div class='add'>+			i = pcmcia_request_io(link);</div><div class='add'>+			if (i == 0)</div><div class='add'>+				break;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		i = pcmcia_request_io(link);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-    info = link-&gt;priv;</div><div class='del'>-    dev = info-&gt;dev;</div><div class='add'>+	if (i != 0) {</div><div class='add'>+		dev_dbg(&amp;link-&gt;dev, "requestIO failed totally!\n");</div><div class='add'>+		goto failed;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ioaddr = dev-&gt;base_addr = link-&gt;resource[0]-&gt;start;</div><div class='add'>+	dev_dbg(&amp;link-&gt;dev, "got ioaddr %Xh\n", ioaddr);</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;link-&gt;dev, "request IRQ %d\n",</div><div class='add'>+		link-&gt;irq);</div><div class='add'>+	if (!link-&gt;irq) {</div><div class='add'>+		dev_dbg(&amp;link-&gt;dev, "requestIRQ failed totally!\n");</div><div class='add'>+		goto failed;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev-&gt;irq = link-&gt;irq;</div><div class='ctx'> </div><div class='del'>-    dev_dbg(&amp;link-&gt;dev, "config...\n");</div><div class='add'>+	ret = pcmcia_enable_device(link);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto failed;</div><div class='ctx'> </div><div class='del'>-    dev_dbg(&amp;link-&gt;dev, "com20020_config\n");</div><div class='add'>+	if (com20020_check(dev)) {</div><div class='add'>+		regdump(dev);</div><div class='add'>+		goto failed;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	lp = netdev_priv(dev);</div><div class='add'>+	lp-&gt;card_name = "PCMCIA COM20020";</div><div class='add'>+	lp-&gt;card_flags = ARC_CAN_10MBIT; /* pretend all of them can 10Mbit */</div><div class='ctx'> </div><div class='del'>-    dev_dbg(&amp;link-&gt;dev, "baseport1 is %Xh\n",</div><div class='del'>-	    (unsigned int) link-&gt;resource[0]-&gt;start);</div><div class='add'>+	SET_NETDEV_DEV(dev, &amp;link-&gt;dev);</div><div class='ctx'> </div><div class='del'>-    i = -ENODEV;</div><div class='del'>-    link-&gt;io_lines = 16;</div><div class='add'>+	i = com20020_found(dev, 0);	/* calls register_netdev */</div><div class='ctx'> </div><div class='del'>-    if (!link-&gt;resource[0]-&gt;start)</div><div class='del'>-    {</div><div class='del'>-	for (ioaddr = 0x100; ioaddr &lt; 0x400; ioaddr += 0x10)</div><div class='del'>-	{</div><div class='del'>-	    link-&gt;resource[0]-&gt;start = ioaddr;</div><div class='del'>-	    i = pcmcia_request_io(link);</div><div class='del'>-	    if (i == 0)</div><div class='del'>-		break;</div><div class='add'>+	if (i != 0) {</div><div class='add'>+		dev_notice(&amp;link-&gt;dev,</div><div class='add'>+			   "com20020_found() failed\n");</div><div class='add'>+		goto failed;</div><div class='ctx'> 	}</div><div class='del'>-    }</div><div class='del'>-    else</div><div class='del'>-	i = pcmcia_request_io(link);</div><div class='del'>-    </div><div class='del'>-    if (i != 0)</div><div class='del'>-    {</div><div class='del'>-	dev_dbg(&amp;link-&gt;dev, "requestIO failed totally!\n");</div><div class='del'>-	goto failed;</div><div class='del'>-    }</div><div class='del'>-	</div><div class='del'>-    ioaddr = dev-&gt;base_addr = link-&gt;resource[0]-&gt;start;</div><div class='del'>-    dev_dbg(&amp;link-&gt;dev, "got ioaddr %Xh\n", ioaddr);</div><div class='del'>-</div><div class='del'>-    dev_dbg(&amp;link-&gt;dev, "request IRQ %d\n",</div><div class='del'>-	    link-&gt;irq);</div><div class='del'>-    if (!link-&gt;irq)</div><div class='del'>-    {</div><div class='del'>-	dev_dbg(&amp;link-&gt;dev, "requestIRQ failed totally!\n");</div><div class='del'>-	goto failed;</div><div class='del'>-    }</div><div class='del'>-</div><div class='del'>-    dev-&gt;irq = link-&gt;irq;</div><div class='del'>-</div><div class='del'>-    ret = pcmcia_enable_device(link);</div><div class='del'>-    if (ret)</div><div class='del'>-	    goto failed;</div><div class='del'>-</div><div class='del'>-    if (com20020_check(dev))</div><div class='del'>-    {</div><div class='del'>-	regdump(dev);</div><div class='del'>-	goto failed;</div><div class='del'>-    }</div><div class='del'>-    </div><div class='del'>-    lp = netdev_priv(dev);</div><div class='del'>-    lp-&gt;card_name = "PCMCIA COM20020";</div><div class='del'>-    lp-&gt;card_flags = ARC_CAN_10MBIT; /* pretend all of them can 10Mbit */</div><div class='del'>-</div><div class='del'>-    SET_NETDEV_DEV(dev, &amp;link-&gt;dev);</div><div class='del'>-</div><div class='del'>-    i = com20020_found(dev, 0);	/* calls register_netdev */</div><div class='del'>-    </div><div class='del'>-    if (i != 0) {</div><div class='del'>-	dev_notice(&amp;link-&gt;dev,</div><div class='del'>-		   "com20020_found() failed\n");</div><div class='del'>-	goto failed;</div><div class='del'>-    }</div><div class='del'>-</div><div class='del'>-    netdev_dbg(dev, "port %#3lx, irq %d\n",</div><div class='del'>-	       dev-&gt;base_addr, dev-&gt;irq);</div><div class='del'>-    return 0;</div><div class='add'>+</div><div class='add'>+	netdev_dbg(dev, "port %#3lx, irq %d\n",</div><div class='add'>+		   dev-&gt;base_addr, dev-&gt;irq);</div><div class='add'>+	return 0;</div><div class='ctx'> </div><div class='ctx'> failed:</div><div class='del'>-    dev_dbg(&amp;link-&gt;dev, "com20020_config failed...\n");</div><div class='del'>-    com20020_release(link);</div><div class='del'>-    return -ENODEV;</div><div class='add'>+	dev_dbg(&amp;link-&gt;dev, "com20020_config failed...\n");</div><div class='add'>+	com20020_release(link);</div><div class='add'>+	return -ENODEV;</div><div class='ctx'> } /* com20020_config */</div><div class='ctx'> </div><div class='ctx'> static void com20020_release(struct pcmcia_device *link)</div><div class='hunk'>@@ -304,7 +300,10 @@ static int com20020_resume(struct pcmcia_device *link)</div><div class='ctx'> 	if (link-&gt;open) {</div><div class='ctx'> 		int ioaddr = dev-&gt;base_addr;</div><div class='ctx'> 		struct arcnet_local *lp = netdev_priv(dev);</div><div class='del'>-		ARCRESET;</div><div class='add'>+</div><div class='add'>+		arcnet_outb(lp-&gt;config | 0x80, ioaddr, COM20020_REG_W_CONFIG);</div><div class='add'>+		udelay(5);</div><div class='add'>+		arcnet_outb(lp-&gt;config, ioaddr, COM20020_REG_W_CONFIG);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -312,9 +311,9 @@ static int com20020_resume(struct pcmcia_device *link)</div><div class='ctx'> </div><div class='ctx'> static const struct pcmcia_device_id com20020_ids[] = {</div><div class='ctx'> 	PCMCIA_DEVICE_PROD_ID12("Contemporary Control Systems, Inc.",</div><div class='del'>-			"PCM20 Arcnet Adapter", 0x59991666, 0x95dfffaf),</div><div class='add'>+				"PCM20 Arcnet Adapter", 0x59991666, 0x95dfffaf),</div><div class='ctx'> 	PCMCIA_DEVICE_PROD_ID12("SoHard AG",</div><div class='del'>-			"SH ARC PCMCIA", 0xf8991729, 0x69dff0c7),</div><div class='add'>+				"SH ARC PCMCIA", 0xf8991729, 0x69dff0c7),</div><div class='ctx'> 	PCMCIA_DEVICE_NULL</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(pcmcia, com20020_ids);</div><div class='head'>diff --git a/drivers/net/arcnet/com9026.h b/drivers/net/arcnet/com9026.h<br/>new file mode 100644<br/>index 000000000000..6adbc18711e0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/arcnet/com9026.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/arcnet/com9026.h</a></div><div class='hunk'>@@ -0,0 +1,18 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+#ifndef __COM9026_H</div><div class='add'>+#define __COM9026_H</div><div class='add'>+</div><div class='add'>+/* COM 9026 controller chip --&gt; ARCnet register addresses */</div><div class='add'>+</div><div class='add'>+#define COM9026_REG_W_INTMASK	0	/* writable */</div><div class='add'>+#define COM9026_REG_R_STATUS	0	/* readable */</div><div class='add'>+#define COM9026_REG_W_COMMAND	1	/* writable, returns random vals on read (?) */</div><div class='add'>+#define COM9026_REG_RW_CONFIG	2	/* Configuration register */</div><div class='add'>+#define COM9026_REG_R_RESET	8	/* software reset (on read) */</div><div class='add'>+#define COM9026_REG_RW_MEMDATA	12	/* Data port for IO-mapped memory */</div><div class='add'>+#define COM9026_REG_W_ADDR_LO	14	/* Control registers for said */</div><div class='add'>+#define COM9026_REG_W_ADDR_HI	15</div><div class='add'>+</div><div class='add'>+#define COM9026_REG_R_STATION	1	/* Station ID */</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/arcnet/com90io.c b/drivers/net/arcnet/com90io.c<br/>index 487d780ebbdf..3b463fbc6402 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/arcnet/com90io.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/arcnet/com90io.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/arcnet/com90io.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/arcnet/com90io.c</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Linux ARCnet driver - COM90xx chipset (IO-mapped buffers)</div><div class='del'>- * </div><div class='add'>+ *</div><div class='ctx'>  * Written 1997 by David Woodhouse.</div><div class='ctx'>  * Written 1994-1999 by Avery Pennarun.</div><div class='ctx'>  * Written 1999-2000 by Martin Mares &lt;mj@ucw.cz&gt;.</div><div class='hunk'>@@ -25,21 +25,22 @@</div><div class='ctx'>  *</div><div class='ctx'>  * **********************</div><div class='ctx'>  */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) "arcnet:" KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/moduleparam.h&gt;</div><div class='ctx'> #include &lt;linux/ioport.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/bootmem.h&gt;</div><div class='add'>+#include &lt;linux/memblock.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;linux/arcdevice.h&gt;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define VERSION "arcnet: COM90xx IO-mapped mode support (by David Woodhouse et el.)\n"</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "arcdevice.h"</div><div class='add'>+#include "com9026.h"</div><div class='ctx'> </div><div class='ctx'> /* Internal function declarations */</div><div class='ctx'> </div><div class='hunk'>@@ -50,35 +51,14 @@ static void com90io_setmask(struct net_device *dev, int mask);</div><div class='ctx'> static int com90io_reset(struct net_device *dev, int really_reset);</div><div class='ctx'> static void com90io_copy_to_card(struct net_device *dev, int bufnum, int offset,</div><div class='ctx'> 				 void *buf, int count);</div><div class='del'>-static void com90io_copy_from_card(struct net_device *dev, int bufnum, int offset,</div><div class='del'>-				   void *buf, int count);</div><div class='del'>-</div><div class='add'>+static void com90io_copy_from_card(struct net_device *dev, int bufnum,</div><div class='add'>+				   int offset, void *buf, int count);</div><div class='ctx'> </div><div class='ctx'> /* Handy defines for ARCnet specific stuff */</div><div class='ctx'> </div><div class='ctx'> /* The number of low I/O ports used by the card. */</div><div class='ctx'> #define ARCNET_TOTAL_SIZE 16</div><div class='ctx'> </div><div class='del'>-/* COM 9026 controller chip --&gt; ARCnet register addresses */</div><div class='del'>-#define _INTMASK (ioaddr+0)	/* writable */</div><div class='del'>-#define _STATUS  (ioaddr+0)	/* readable */</div><div class='del'>-#define _COMMAND (ioaddr+1)	/* writable, returns random vals on read (?) */</div><div class='del'>-#define _RESET  (ioaddr+8)	/* software reset (on read) */</div><div class='del'>-#define _MEMDATA  (ioaddr+12)	/* Data port for IO-mapped memory */</div><div class='del'>-#define _ADDR_HI  (ioaddr+15)	/* Control registers for said */</div><div class='del'>-#define _ADDR_LO  (ioaddr+14)</div><div class='del'>-#define _CONFIG  (ioaddr+2)	/* Configuration register */</div><div class='del'>-</div><div class='del'>-#undef ASTATUS</div><div class='del'>-#undef ACOMMAND</div><div class='del'>-#undef AINTMASK</div><div class='del'>-</div><div class='del'>-#define ASTATUS()	inb(_STATUS)</div><div class='del'>-#define ACOMMAND(cmd) outb((cmd),_COMMAND)</div><div class='del'>-#define AINTMASK(msk)	outb((msk),_INTMASK)</div><div class='del'>-#define SETCONF() 	outb((lp-&gt;config),_CONFIG)</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> /****************************************************************************</div><div class='ctx'>  *                                                                          *</div><div class='ctx'>  * IO-mapped operation routines                                             *</div><div class='hunk'>@@ -92,58 +72,59 @@ static u_char get_buffer_byte(struct net_device *dev, unsigned offset)</div><div class='ctx'> {</div><div class='ctx'> 	int ioaddr = dev-&gt;base_addr;</div><div class='ctx'> </div><div class='del'>-	outb(offset &gt;&gt; 8, _ADDR_HI);</div><div class='del'>-	outb(offset &amp; 0xff, _ADDR_LO);</div><div class='add'>+	arcnet_outb(offset &gt;&gt; 8, ioaddr, COM9026_REG_W_ADDR_HI);</div><div class='add'>+	arcnet_outb(offset &amp; 0xff, ioaddr, COM9026_REG_W_ADDR_LO);</div><div class='ctx'> </div><div class='del'>-	return inb(_MEMDATA);</div><div class='add'>+	return arcnet_inb(ioaddr, COM9026_REG_RW_MEMDATA);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef ONE_AT_A_TIME_TX</div><div class='del'>-static void put_buffer_byte(struct net_device *dev, unsigned offset, u_char datum)</div><div class='add'>+static void put_buffer_byte(struct net_device *dev, unsigned offset,</div><div class='add'>+			    u_char datum)</div><div class='ctx'> {</div><div class='ctx'> 	int ioaddr = dev-&gt;base_addr;</div><div class='ctx'> </div><div class='del'>-	outb(offset &gt;&gt; 8, _ADDR_HI);</div><div class='del'>-	outb(offset &amp; 0xff, _ADDR_LO);</div><div class='add'>+	arcnet_outb(offset &gt;&gt; 8, ioaddr, COM9026_REG_W_ADDR_HI);</div><div class='add'>+	arcnet_outb(offset &amp; 0xff, ioaddr, COM9026_REG_W_ADDR_LO);</div><div class='ctx'> </div><div class='del'>-	outb(datum, _MEMDATA);</div><div class='add'>+	arcnet_outb(datum, ioaddr, COM9026_REG_RW_MEMDATA);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-static void get_whole_buffer(struct net_device *dev, unsigned offset, unsigned length, char *dest)</div><div class='add'>+static void get_whole_buffer(struct net_device *dev, unsigned offset,</div><div class='add'>+			     unsigned length, char *dest)</div><div class='ctx'> {</div><div class='ctx'> 	int ioaddr = dev-&gt;base_addr;</div><div class='ctx'> </div><div class='del'>-	outb((offset &gt;&gt; 8) | AUTOINCflag, _ADDR_HI);</div><div class='del'>-	outb(offset &amp; 0xff, _ADDR_LO);</div><div class='add'>+	arcnet_outb((offset &gt;&gt; 8) | AUTOINCflag, ioaddr, COM9026_REG_W_ADDR_HI);</div><div class='add'>+	arcnet_outb(offset &amp; 0xff, ioaddr, COM9026_REG_W_ADDR_LO);</div><div class='ctx'> </div><div class='ctx'> 	while (length--)</div><div class='ctx'> #ifdef ONE_AT_A_TIME_RX</div><div class='ctx'> 		*(dest++) = get_buffer_byte(dev, offset++);</div><div class='ctx'> #else</div><div class='del'>-		*(dest++) = inb(_MEMDATA);</div><div class='add'>+		*(dest++) = arcnet_inb(ioaddr, COM9026_REG_RW_MEMDATA);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void put_whole_buffer(struct net_device *dev, unsigned offset, unsigned length, char *dest)</div><div class='add'>+static void put_whole_buffer(struct net_device *dev, unsigned offset,</div><div class='add'>+			     unsigned length, char *dest)</div><div class='ctx'> {</div><div class='ctx'> 	int ioaddr = dev-&gt;base_addr;</div><div class='ctx'> </div><div class='del'>-	outb((offset &gt;&gt; 8) | AUTOINCflag, _ADDR_HI);</div><div class='del'>-	outb(offset &amp; 0xff, _ADDR_LO);</div><div class='add'>+	arcnet_outb((offset &gt;&gt; 8) | AUTOINCflag, ioaddr, COM9026_REG_W_ADDR_HI);</div><div class='add'>+	arcnet_outb(offset &amp; 0xff, ioaddr,COM9026_REG_W_ADDR_LO);</div><div class='ctx'> </div><div class='ctx'> 	while (length--)</div><div class='ctx'> #ifdef ONE_AT_A_TIME_TX</div><div class='ctx'> 		put_buffer_byte(dev, offset++, *(dest++));</div><div class='ctx'> #else</div><div class='del'>-		outb(*(dest++), _MEMDATA);</div><div class='add'>+		arcnet_outb(*(dest++), ioaddr, COM9026_REG_RW_MEMDATA);</div><div class='ctx'> #endif</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * We cannot probe for an IO mapped card either, although we can check that</div><div class='add'>+/* We cannot probe for an IO mapped card either, although we can check that</div><div class='ctx'>  * it's where we were told it was, and even autoirq</div><div class='ctx'>  */</div><div class='ctx'> static int __init com90io_probe(struct net_device *dev)</div><div class='hunk'>@@ -151,71 +132,78 @@ static int __init com90io_probe(struct net_device *dev)</div><div class='ctx'> 	int ioaddr = dev-&gt;base_addr, status;</div><div class='ctx'> 	unsigned long airqmask;</div><div class='ctx'> </div><div class='del'>-	BUGLVL(D_NORMAL) printk(VERSION);</div><div class='del'>-	BUGLVL(D_NORMAL) printk("E-mail me if you actually test this driver, please!\n");</div><div class='add'>+	if (BUGLVL(D_NORMAL)) {</div><div class='add'>+		pr_info("%s\n", "COM90xx IO-mapped mode support (by David Woodhouse et el.)");</div><div class='add'>+		pr_info("E-mail me if you actually test this driver, please!\n");</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (!ioaddr) {</div><div class='del'>-		BUGMSG(D_NORMAL, "No autoprobe for IO mapped cards; you "</div><div class='del'>-		       "must specify the base address!\n");</div><div class='add'>+		arc_printk(D_NORMAL, dev, "No autoprobe for IO mapped cards; you must specify the base address!\n");</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (!request_region(ioaddr, ARCNET_TOTAL_SIZE, "com90io probe")) {</div><div class='del'>-		BUGMSG(D_INIT_REASONS, "IO request_region %x-%x failed.\n",</div><div class='del'>-		       ioaddr, ioaddr + ARCNET_TOTAL_SIZE - 1);</div><div class='add'>+		arc_printk(D_INIT_REASONS, dev, "IO request_region %x-%x failed\n",</div><div class='add'>+			   ioaddr, ioaddr + ARCNET_TOTAL_SIZE - 1);</div><div class='ctx'> 		return -ENXIO;</div><div class='ctx'> 	}</div><div class='del'>-	if (ASTATUS() == 0xFF) {</div><div class='del'>-		BUGMSG(D_INIT_REASONS, "IO address %x empty\n", ioaddr);</div><div class='add'>+	if (arcnet_inb(ioaddr, COM9026_REG_R_STATUS) == 0xFF) {</div><div class='add'>+		arc_printk(D_INIT_REASONS, dev, "IO address %x empty\n",</div><div class='add'>+			   ioaddr);</div><div class='ctx'> 		goto err_out;</div><div class='ctx'> 	}</div><div class='del'>-	inb(_RESET);</div><div class='add'>+	arcnet_inb(ioaddr, COM9026_REG_R_RESET);</div><div class='ctx'> 	mdelay(RESETtime);</div><div class='ctx'> </div><div class='del'>-	status = ASTATUS();</div><div class='add'>+	status = arcnet_inb(ioaddr, COM9026_REG_R_STATUS);</div><div class='ctx'> </div><div class='ctx'> 	if ((status &amp; 0x9D) != (NORXflag | RECONflag | TXFREEflag | RESETflag)) {</div><div class='del'>-		BUGMSG(D_INIT_REASONS, "Status invalid (%Xh).\n", status);</div><div class='add'>+		arc_printk(D_INIT_REASONS, dev, "Status invalid (%Xh)\n",</div><div class='add'>+			   status);</div><div class='ctx'> 		goto err_out;</div><div class='ctx'> 	}</div><div class='del'>-	BUGMSG(D_INIT_REASONS, "Status after reset: %X\n", status);</div><div class='add'>+	arc_printk(D_INIT_REASONS, dev, "Status after reset: %X\n", status);</div><div class='ctx'> </div><div class='del'>-	ACOMMAND(CFLAGScmd | RESETclear | CONFIGclear);</div><div class='add'>+	arcnet_outb(CFLAGScmd | RESETclear | CONFIGclear,</div><div class='add'>+		    ioaddr, COM9026_REG_W_COMMAND);</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_INIT_REASONS, "Status after reset acknowledged: %X\n", status);</div><div class='add'>+	arc_printk(D_INIT_REASONS, dev, "Status after reset acknowledged: %X\n",</div><div class='add'>+		   status);</div><div class='ctx'> </div><div class='del'>-	status = ASTATUS();</div><div class='add'>+	status = arcnet_inb(ioaddr, COM9026_REG_R_STATUS);</div><div class='ctx'> </div><div class='ctx'> 	if (status &amp; RESETflag) {</div><div class='del'>-		BUGMSG(D_INIT_REASONS, "Eternal reset (status=%Xh)\n", status);</div><div class='add'>+		arc_printk(D_INIT_REASONS, dev, "Eternal reset (status=%Xh)\n",</div><div class='add'>+			   status);</div><div class='ctx'> 		goto err_out;</div><div class='ctx'> 	}</div><div class='del'>-	outb((0x16 | IOMAPflag) &amp; ~ENABLE16flag, _CONFIG);</div><div class='add'>+	arcnet_outb((0x16 | IOMAPflag) &amp; ~ENABLE16flag,</div><div class='add'>+		    ioaddr, COM9026_REG_RW_CONFIG);</div><div class='ctx'> </div><div class='ctx'> 	/* Read first loc'n of memory */</div><div class='ctx'> </div><div class='del'>-	outb(AUTOINCflag, _ADDR_HI);</div><div class='del'>-	outb(0, _ADDR_LO);</div><div class='add'>+	arcnet_outb(AUTOINCflag, ioaddr, COM9026_REG_W_ADDR_HI);</div><div class='add'>+	arcnet_outb(0, ioaddr,  COM9026_REG_W_ADDR_LO);</div><div class='ctx'> </div><div class='del'>-	if ((status = inb(_MEMDATA)) != 0xd1) {</div><div class='del'>-		BUGMSG(D_INIT_REASONS, "Signature byte not found"</div><div class='del'>-		       " (%Xh instead).\n", status);</div><div class='add'>+	status = arcnet_inb(ioaddr, COM9026_REG_RW_MEMDATA);</div><div class='add'>+	if (status != 0xd1) {</div><div class='add'>+		arc_printk(D_INIT_REASONS, dev, "Signature byte not found (%Xh instead).\n",</div><div class='add'>+			   status);</div><div class='ctx'> 		goto err_out;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (!dev-&gt;irq) {</div><div class='del'>-		/*</div><div class='del'>-		 * if we do this, we're sure to get an IRQ since the</div><div class='add'>+		/* if we do this, we're sure to get an IRQ since the</div><div class='ctx'> 		 * card has just reset and the NORXflag is on until</div><div class='ctx'> 		 * we tell it to start receiving.</div><div class='ctx'> 		 */</div><div class='ctx'> </div><div class='ctx'> 		airqmask = probe_irq_on();</div><div class='del'>-		outb(NORXflag, _INTMASK);</div><div class='add'>+		arcnet_outb(NORXflag, ioaddr, COM9026_REG_W_INTMASK);</div><div class='ctx'> 		udelay(1);</div><div class='del'>-		outb(0, _INTMASK);</div><div class='add'>+		arcnet_outb(0, ioaddr, COM9026_REG_W_INTMASK);</div><div class='ctx'> 		dev-&gt;irq = probe_irq_off(airqmask);</div><div class='ctx'> </div><div class='ctx'> 		if ((int)dev-&gt;irq &lt;= 0) {</div><div class='del'>-			BUGMSG(D_INIT_REASONS, "Autoprobe IRQ failed\n");</div><div class='add'>+			arc_printk(D_INIT_REASONS, dev, "Autoprobe IRQ failed\n");</div><div class='ctx'> 			goto err_out;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -227,7 +215,6 @@ err_out:</div><div class='ctx'> 	return -ENODEV;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> /* Set up the struct net_device associated with this card.  Called after</div><div class='ctx'>  * probing succeeds.</div><div class='ctx'>  */</div><div class='hunk'>@@ -238,12 +225,14 @@ static int __init com90io_found(struct net_device *dev)</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	/* Reserve the irq */</div><div class='del'>-	if (request_irq(dev-&gt;irq, arcnet_interrupt, 0, "arcnet (COM90xx-IO)", dev)) {</div><div class='del'>-		BUGMSG(D_NORMAL, "Can't get IRQ %d!\n", dev-&gt;irq);</div><div class='add'>+	if (request_irq(dev-&gt;irq, arcnet_interrupt, 0,</div><div class='add'>+			"arcnet (COM90xx-IO)", dev)) {</div><div class='add'>+		arc_printk(D_NORMAL, dev, "Can't get IRQ %d!\n", dev-&gt;irq);</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Reserve the I/O region */</div><div class='del'>-	if (!request_region(dev-&gt;base_addr, ARCNET_TOTAL_SIZE, "arcnet (COM90xx-IO)")) {</div><div class='add'>+	if (!request_region(dev-&gt;base_addr, ARCNET_TOTAL_SIZE,</div><div class='add'>+			    "arcnet (COM90xx-IO)")) {</div><div class='ctx'> 		free_irq(dev-&gt;irq, dev);</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -259,29 +248,28 @@ static int __init com90io_found(struct net_device *dev)</div><div class='ctx'> 	lp-&gt;hw.copy_from_card = com90io_copy_from_card;</div><div class='ctx'> </div><div class='ctx'> 	lp-&gt;config = (0x16 | IOMAPflag) &amp; ~ENABLE16flag;</div><div class='del'>-	SETCONF();</div><div class='add'>+	arcnet_outb(lp-&gt;config, ioaddr, COM9026_REG_RW_CONFIG);</div><div class='ctx'> </div><div class='ctx'> 	/* get and check the station ID from offset 1 in shmem */</div><div class='ctx'> </div><div class='del'>-	dev-&gt;dev_addr[0] = get_buffer_byte(dev, 1);</div><div class='add'>+	arcnet_set_addr(dev, get_buffer_byte(dev, 1));</div><div class='ctx'> </div><div class='ctx'> 	err = register_netdev(dev);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		outb((inb(_CONFIG) &amp; ~IOMAPflag), _CONFIG);</div><div class='add'>+		arcnet_outb(arcnet_inb(ioaddr, COM9026_REG_RW_CONFIG) &amp; ~IOMAPflag,</div><div class='add'>+			    ioaddr, COM9026_REG_RW_CONFIG);</div><div class='ctx'> 		free_irq(dev-&gt;irq, dev);</div><div class='ctx'> 		release_region(dev-&gt;base_addr, ARCNET_TOTAL_SIZE);</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_NORMAL, "COM90IO: station %02Xh found at %03lXh, IRQ %d.\n",</div><div class='del'>-	       dev-&gt;dev_addr[0], dev-&gt;base_addr, dev-&gt;irq);</div><div class='add'>+	arc_printk(D_NORMAL, dev, "COM90IO: station %02Xh found at %03lXh, IRQ %d.\n",</div><div class='add'>+		   dev-&gt;dev_addr[0], dev-&gt;base_addr, dev-&gt;irq);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Do a hardware reset on the card, and set up necessary registers.</div><div class='add'>+/* Do a hardware reset on the card, and set up necessary registers.</div><div class='ctx'>  *</div><div class='ctx'>  * This should be called as little as possible, because it disrupts the</div><div class='ctx'>  * token on the network (causes a RECON) and requires a significant delay.</div><div class='hunk'>@@ -293,90 +281,93 @@ static int com90io_reset(struct net_device *dev, int really_reset)</div><div class='ctx'> 	struct arcnet_local *lp = netdev_priv(dev);</div><div class='ctx'> 	short ioaddr = dev-&gt;base_addr;</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_INIT, "Resetting %s (status=%02Xh)\n", dev-&gt;name, ASTATUS());</div><div class='add'>+	arc_printk(D_INIT, dev, "Resetting %s (status=%02Xh)\n",</div><div class='add'>+		   dev-&gt;name, arcnet_inb(ioaddr, COM9026_REG_R_STATUS));</div><div class='ctx'> </div><div class='ctx'> 	if (really_reset) {</div><div class='ctx'> 		/* reset the card */</div><div class='del'>-		inb(_RESET);</div><div class='add'>+		arcnet_inb(ioaddr, COM9026_REG_R_RESET);</div><div class='ctx'> 		mdelay(RESETtime);</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Set the thing to IO-mapped, 8-bit  mode */</div><div class='ctx'> 	lp-&gt;config = (0x1C | IOMAPflag) &amp; ~ENABLE16flag;</div><div class='del'>-	SETCONF();</div><div class='add'>+	arcnet_outb(lp-&gt;config, ioaddr, COM9026_REG_RW_CONFIG);</div><div class='ctx'> </div><div class='del'>-	ACOMMAND(CFLAGScmd | RESETclear);	/* clear flags &amp; end reset */</div><div class='del'>-	ACOMMAND(CFLAGScmd | CONFIGclear);</div><div class='add'>+	arcnet_outb(CFLAGScmd | RESETclear, ioaddr, COM9026_REG_W_COMMAND);</div><div class='add'>+					/* clear flags &amp; end reset */</div><div class='add'>+	arcnet_outb(CFLAGScmd | CONFIGclear, ioaddr, COM9026_REG_W_COMMAND);</div><div class='ctx'> </div><div class='ctx'> 	/* verify that the ARCnet signature byte is present */</div><div class='ctx'> 	if (get_buffer_byte(dev, 0) != TESTvalue) {</div><div class='del'>-		BUGMSG(D_NORMAL, "reset failed: TESTvalue not present.\n");</div><div class='add'>+		arc_printk(D_NORMAL, dev, "reset failed: TESTvalue not present.\n");</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* enable extended (512-byte) packets */</div><div class='del'>-	ACOMMAND(CONFIGcmd | EXTconf);</div><div class='del'>-</div><div class='add'>+	arcnet_outb(CONFIGcmd | EXTconf, ioaddr, COM9026_REG_W_COMMAND);</div><div class='ctx'> 	/* done!  return success. */</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> static void com90io_command(struct net_device *dev, int cmd)</div><div class='ctx'> {</div><div class='ctx'> 	short ioaddr = dev-&gt;base_addr;</div><div class='ctx'> </div><div class='del'>-	ACOMMAND(cmd);</div><div class='add'>+	arcnet_outb(cmd, ioaddr, COM9026_REG_W_COMMAND);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> static int com90io_status(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	short ioaddr = dev-&gt;base_addr;</div><div class='ctx'> </div><div class='del'>-	return ASTATUS();</div><div class='add'>+	return arcnet_inb(ioaddr, COM9026_REG_R_STATUS);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> static void com90io_setmask(struct net_device *dev, int mask)</div><div class='ctx'> {</div><div class='ctx'> 	short ioaddr = dev-&gt;base_addr;</div><div class='ctx'> </div><div class='del'>-	AINTMASK(mask);</div><div class='add'>+	arcnet_outb(mask, ioaddr, COM9026_REG_W_INTMASK);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void com90io_copy_to_card(struct net_device *dev, int bufnum, int offset,</div><div class='del'>-				 void *buf, int count)</div><div class='add'>+static void com90io_copy_to_card(struct net_device *dev, int bufnum,</div><div class='add'>+				 int offset, void *buf, int count)</div><div class='ctx'> {</div><div class='del'>-	TIME("put_whole_buffer", count, put_whole_buffer(dev, bufnum * 512 + offset, count, buf));</div><div class='add'>+	TIME(dev, "put_whole_buffer", count,</div><div class='add'>+	     put_whole_buffer(dev, bufnum * 512 + offset, count, buf));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-static void com90io_copy_from_card(struct net_device *dev, int bufnum, int offset,</div><div class='del'>-				   void *buf, int count)</div><div class='add'>+static void com90io_copy_from_card(struct net_device *dev, int bufnum,</div><div class='add'>+				   int offset, void *buf, int count)</div><div class='ctx'> {</div><div class='del'>-	TIME("get_whole_buffer", count, get_whole_buffer(dev, bufnum * 512 + offset, count, buf));</div><div class='add'>+	TIME(dev, "get_whole_buffer", count,</div><div class='add'>+	     get_whole_buffer(dev, bufnum * 512 + offset, count, buf));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int io;			/* use the insmod io= irq= shmem= options */</div><div class='ctx'> static int irq;</div><div class='ctx'> static char device[9];		/* use eg. device=arc1 to change name */</div><div class='ctx'> </div><div class='del'>-module_param(io, int, 0);</div><div class='del'>-module_param(irq, int, 0);</div><div class='add'>+module_param_hw(io, int, ioport, 0);</div><div class='add'>+module_param_hw(irq, int, irq, 0);</div><div class='ctx'> module_param_string(device, device, sizeof(device), 0);</div><div class='add'>+MODULE_DESCRIPTION("ARCnet COM90xx IO mapped chipset driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='ctx'> #ifndef MODULE</div><div class='ctx'> static int __init com90io_setup(char *s)</div><div class='ctx'> {</div><div class='ctx'> 	int ints[4];</div><div class='add'>+</div><div class='ctx'> 	s = get_options(s, 4, ints);</div><div class='ctx'> 	if (!ints[0])</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	switch (ints[0]) {</div><div class='ctx'> 	default:		/* ERROR */</div><div class='del'>-		printk("com90io: Too many arguments.\n");</div><div class='add'>+		pr_err("Too many arguments\n");</div><div class='add'>+		fallthrough;</div><div class='ctx'> 	case 2:		/* IRQ */</div><div class='ctx'> 		irq = ints[2];</div><div class='add'>+		fallthrough;</div><div class='ctx'> 	case 1:		/* IO address */</div><div class='ctx'> 		io = ints[1];</div><div class='ctx'> 	}</div><div class='hunk'>@@ -406,7 +397,7 @@ static int __init com90io_init(void)</div><div class='ctx'> 	err = com90io_probe(dev);</div><div class='ctx'> </div><div class='ctx'> 	if (err) {</div><div class='del'>-		free_netdev(dev);</div><div class='add'>+		free_arcdev(dev);</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -421,12 +412,15 @@ static void __exit com90io_exit(void)</div><div class='ctx'> </div><div class='ctx'> 	unregister_netdev(dev);</div><div class='ctx'> </div><div class='del'>-	/* Set the thing back to MMAP mode, in case the old driver is loaded later */</div><div class='del'>-	outb((inb(_CONFIG) &amp; ~IOMAPflag), _CONFIG);</div><div class='add'>+	/* In case the old driver is loaded later,</div><div class='add'>+	 * set the thing back to MMAP mode</div><div class='add'>+	 */</div><div class='add'>+	arcnet_outb(arcnet_inb(ioaddr, COM9026_REG_RW_CONFIG) &amp; ~IOMAPflag,</div><div class='add'>+		    ioaddr, COM9026_REG_RW_CONFIG);</div><div class='ctx'> </div><div class='ctx'> 	free_irq(dev-&gt;irq, dev);</div><div class='ctx'> 	release_region(dev-&gt;base_addr, ARCNET_TOTAL_SIZE);</div><div class='del'>-	free_netdev(dev);</div><div class='add'>+	free_arcdev(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> module_init(com90io_init)</div><div class='head'>diff --git a/drivers/net/arcnet/com90xx.c b/drivers/net/arcnet/com90xx.c<br/>index b80fbe40aa0e..b3b287c16561 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/arcnet/com90xx.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/arcnet/com90xx.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/arcnet/com90xx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/arcnet/com90xx.c</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Linux ARCnet driver - COM90xx chipset (memory-mapped buffers)</div><div class='del'>- * </div><div class='add'>+ *</div><div class='ctx'>  * Written 1994-1999 by Avery Pennarun.</div><div class='ctx'>  * Written 1999 by Martin Mares &lt;mj@ucw.cz&gt;.</div><div class='ctx'>  * Derived from skeleton.c by Donald Becker.</div><div class='hunk'>@@ -24,6 +24,9 @@</div><div class='ctx'>  *</div><div class='ctx'>  * **********************</div><div class='ctx'>  */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) "arcnet:" KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/moduleparam.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='hunk'>@@ -32,12 +35,10 @@</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;linux/arcdevice.h&gt;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#define VERSION "arcnet: COM90xx chipset support\n"</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='ctx'> </div><div class='add'>+#include "arcdevice.h"</div><div class='add'>+#include "com9026.h"</div><div class='ctx'> </div><div class='ctx'> /* Define this to speed up the autoprobe by assuming if only one io port and</div><div class='ctx'>  * shmem are left in the list at Stage 5, they must correspond to each</div><div class='hunk'>@@ -53,7 +54,6 @@</div><div class='ctx'>  */</div><div class='ctx'> #undef FAST_PROBE</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> /* Internal function declarations */</div><div class='ctx'> static int com90xx_found(int ioaddr, int airq, u_long shmem, void __iomem *);</div><div class='ctx'> static void com90xx_command(struct net_device *dev, int command);</div><div class='hunk'>@@ -62,8 +62,8 @@ static void com90xx_setmask(struct net_device *dev, int mask);</div><div class='ctx'> static int com90xx_reset(struct net_device *dev, int really_reset);</div><div class='ctx'> static void com90xx_copy_to_card(struct net_device *dev, int bufnum, int offset,</div><div class='ctx'> 				 void *buf, int count);</div><div class='del'>-static void com90xx_copy_from_card(struct net_device *dev, int bufnum, int offset,</div><div class='del'>-				   void *buf, int count);</div><div class='add'>+static void com90xx_copy_from_card(struct net_device *dev, int bufnum,</div><div class='add'>+				   int offset, void *buf, int count);</div><div class='ctx'> </div><div class='ctx'> /* Known ARCnet cards */</div><div class='ctx'> </div><div class='hunk'>@@ -77,26 +77,7 @@ static int numcards;</div><div class='ctx'> </div><div class='ctx'> /* Amount of I/O memory used by the card */</div><div class='ctx'> #define BUFFER_SIZE (512)</div><div class='del'>-#define MIRROR_SIZE (BUFFER_SIZE*4)</div><div class='del'>-</div><div class='del'>-/* COM 9026 controller chip --&gt; ARCnet register addresses */</div><div class='del'>-#define _INTMASK (ioaddr+0)	/* writable */</div><div class='del'>-#define _STATUS  (ioaddr+0)	/* readable */</div><div class='del'>-#define _COMMAND (ioaddr+1)	/* writable, returns random vals on read (?) */</div><div class='del'>-#define _CONFIG  (ioaddr+2)	/* Configuration register */</div><div class='del'>-#define _RESET   (ioaddr+8)	/* software reset (on read) */</div><div class='del'>-#define _MEMDATA (ioaddr+12)	/* Data port for IO-mapped memory */</div><div class='del'>-#define _ADDR_HI (ioaddr+15)	/* Control registers for said */</div><div class='del'>-#define _ADDR_LO (ioaddr+14)</div><div class='del'>-</div><div class='del'>-#undef ASTATUS</div><div class='del'>-#undef ACOMMAND</div><div class='del'>-#undef AINTMASK</div><div class='del'>-</div><div class='del'>-#define ASTATUS()	inb(_STATUS)</div><div class='del'>-#define ACOMMAND(cmd) 	outb((cmd),_COMMAND)</div><div class='del'>-#define AINTMASK(msk)	outb((msk),_INTMASK)</div><div class='del'>-</div><div class='add'>+#define MIRROR_SIZE (BUFFER_SIZE * 4)</div><div class='ctx'> </div><div class='ctx'> static int com90xx_skip_probe __initdata = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -107,8 +88,8 @@ static int irq;</div><div class='ctx'> static int shmem;</div><div class='ctx'> static char device[9];		/* use eg. device=arc1 to change name */</div><div class='ctx'> </div><div class='del'>-module_param(io, int, 0);</div><div class='del'>-module_param(irq, int, 0);</div><div class='add'>+module_param_hw(io, int, ioport, 0);</div><div class='add'>+module_param_hw(irq, int, irq, 0);</div><div class='ctx'> module_param(shmem, int, 0);</div><div class='ctx'> module_param_string(device, device, sizeof(device), 0);</div><div class='ctx'> </div><div class='hunk'>@@ -116,8 +97,7 @@ static void __init com90xx_probe(void)</div><div class='ctx'> {</div><div class='ctx'> 	int count, status, ioaddr, numprint, airq, openparen = 0;</div><div class='ctx'> 	unsigned long airqmask;</div><div class='del'>-	int ports[(0x3f0 - 0x200) / 16 + 1] =</div><div class='del'>-	{0};</div><div class='add'>+	int ports[(0x3f0 - 0x200) / 16 + 1] = {	0 };</div><div class='ctx'> 	unsigned long *shmems;</div><div class='ctx'> 	void __iomem **iomem;</div><div class='ctx'> 	int numports, numshmems, *port;</div><div class='hunk'>@@ -127,18 +107,19 @@ static void __init com90xx_probe(void)</div><div class='ctx'> 	if (!io &amp;&amp; !irq &amp;&amp; !shmem &amp;&amp; !*device &amp;&amp; com90xx_skip_probe)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	shmems = kzalloc(((0x100000-0xa0000) / 0x800) * sizeof(unsigned long),</div><div class='add'>+	shmems = kzalloc(((0x100000 - 0xa0000) / 0x800) * sizeof(unsigned long),</div><div class='ctx'> 			 GFP_KERNEL);</div><div class='ctx'> 	if (!shmems)</div><div class='ctx'> 		return;</div><div class='del'>-	iomem = kzalloc(((0x100000-0xa0000) / 0x800) * sizeof(void __iomem *),</div><div class='del'>-			 GFP_KERNEL);</div><div class='add'>+	iomem = kzalloc(((0x100000 - 0xa0000) / 0x800) * sizeof(void __iomem *),</div><div class='add'>+			GFP_KERNEL);</div><div class='ctx'> 	if (!iomem) {</div><div class='ctx'> 		kfree(shmems);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	BUGLVL(D_NORMAL) printk(VERSION);</div><div class='add'>+	if (BUGLVL(D_NORMAL))</div><div class='add'>+		pr_info("%s\n", "COM90xx chipset support");</div><div class='ctx'> </div><div class='ctx'> 	/* set up the arrays where we'll store the possible probe addresses */</div><div class='ctx'> 	numports = numshmems = 0;</div><div class='hunk'>@@ -161,38 +142,43 @@ static void __init com90xx_probe(void)</div><div class='ctx'> 		numprint++;</div><div class='ctx'> 		numprint %= 8;</div><div class='ctx'> 		if (!numprint) {</div><div class='del'>-			BUGMSG2(D_INIT, "\n");</div><div class='del'>-			BUGMSG2(D_INIT, "S1: ");</div><div class='add'>+			arc_cont(D_INIT, "\n");</div><div class='add'>+			arc_cont(D_INIT, "S1: ");</div><div class='ctx'> 		}</div><div class='del'>-		BUGMSG2(D_INIT, "%Xh ", *port);</div><div class='add'>+		arc_cont(D_INIT, "%Xh ", *port);</div><div class='ctx'> </div><div class='ctx'> 		ioaddr = *port;</div><div class='ctx'> </div><div class='del'>-		if (!request_region(*port, ARCNET_TOTAL_SIZE, "arcnet (90xx)")) {</div><div class='del'>-			BUGMSG2(D_INIT_REASONS, "(request_region)\n");</div><div class='del'>-			BUGMSG2(D_INIT_REASONS, "S1: ");</div><div class='del'>-			BUGLVL(D_INIT_REASONS) numprint = 0;</div><div class='add'>+		if (!request_region(*port, ARCNET_TOTAL_SIZE,</div><div class='add'>+				    "arcnet (90xx)")) {</div><div class='add'>+			arc_cont(D_INIT_REASONS, "(request_region)\n");</div><div class='add'>+			arc_cont(D_INIT_REASONS, "S1: ");</div><div class='add'>+			if (BUGLVL(D_INIT_REASONS))</div><div class='add'>+				numprint = 0;</div><div class='ctx'> 			*port-- = ports[--numports];</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='del'>-		if (ASTATUS() == 0xFF) {</div><div class='del'>-			BUGMSG2(D_INIT_REASONS, "(empty)\n");</div><div class='del'>-			BUGMSG2(D_INIT_REASONS, "S1: ");</div><div class='del'>-			BUGLVL(D_INIT_REASONS) numprint = 0;</div><div class='add'>+		if (arcnet_inb(ioaddr, COM9026_REG_R_STATUS) == 0xFF) {</div><div class='add'>+			arc_cont(D_INIT_REASONS, "(empty)\n");</div><div class='add'>+			arc_cont(D_INIT_REASONS, "S1: ");</div><div class='add'>+			if (BUGLVL(D_INIT_REASONS))</div><div class='add'>+				numprint = 0;</div><div class='ctx'> 			release_region(*port, ARCNET_TOTAL_SIZE);</div><div class='ctx'> 			*port-- = ports[--numports];</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='del'>-		inb(_RESET);	/* begin resetting card */</div><div class='add'>+		/* begin resetting card */</div><div class='add'>+		arcnet_inb(ioaddr, COM9026_REG_R_RESET);</div><div class='ctx'> </div><div class='del'>-		BUGMSG2(D_INIT_REASONS, "\n");</div><div class='del'>-		BUGMSG2(D_INIT_REASONS, "S1: ");</div><div class='del'>-		BUGLVL(D_INIT_REASONS) numprint = 0;</div><div class='add'>+		arc_cont(D_INIT_REASONS, "\n");</div><div class='add'>+		arc_cont(D_INIT_REASONS, "S1: ");</div><div class='add'>+		if (BUGLVL(D_INIT_REASONS))</div><div class='add'>+			numprint = 0;</div><div class='ctx'> 	}</div><div class='del'>-	BUGMSG2(D_INIT, "\n");</div><div class='add'>+	arc_cont(D_INIT, "\n");</div><div class='ctx'> </div><div class='ctx'> 	if (!numports) {</div><div class='del'>-		BUGMSG2(D_NORMAL, "S1: No ARCnet cards found.\n");</div><div class='add'>+		arc_cont(D_NORMAL, "S1: No ARCnet cards found.\n");</div><div class='ctx'> 		kfree(shmems);</div><div class='ctx'> 		kfree(iomem);</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -206,12 +192,12 @@ static void __init com90xx_probe(void)</div><div class='ctx'> 		numprint++;</div><div class='ctx'> 		numprint %= 8;</div><div class='ctx'> 		if (!numprint) {</div><div class='del'>-			BUGMSG2(D_INIT, "\n");</div><div class='del'>-			BUGMSG2(D_INIT, "S2: ");</div><div class='add'>+			arc_cont(D_INIT, "\n");</div><div class='add'>+			arc_cont(D_INIT, "S2: ");</div><div class='ctx'> 		}</div><div class='del'>-		BUGMSG2(D_INIT, "%Xh ", *port);</div><div class='add'>+		arc_cont(D_INIT, "%Xh ", *port);</div><div class='ctx'> 	}</div><div class='del'>-	BUGMSG2(D_INIT, "\n");</div><div class='add'>+	arc_cont(D_INIT, "\n");</div><div class='ctx'> 	mdelay(RESETtime);</div><div class='ctx'> </div><div class='ctx'> 	/* Stage 3: abandon any shmem addresses that don't have the signature</div><div class='hunk'>@@ -224,29 +210,33 @@ static void __init com90xx_probe(void)</div><div class='ctx'> 		numprint++;</div><div class='ctx'> 		numprint %= 8;</div><div class='ctx'> 		if (!numprint) {</div><div class='del'>-			BUGMSG2(D_INIT, "\n");</div><div class='del'>-			BUGMSG2(D_INIT, "S3: ");</div><div class='add'>+			arc_cont(D_INIT, "\n");</div><div class='add'>+			arc_cont(D_INIT, "S3: ");</div><div class='ctx'> 		}</div><div class='del'>-		BUGMSG2(D_INIT, "%lXh ", *p);</div><div class='add'>+		arc_cont(D_INIT, "%lXh ", *p);</div><div class='ctx'> </div><div class='ctx'> 		if (!request_mem_region(*p, MIRROR_SIZE, "arcnet (90xx)")) {</div><div class='del'>-			BUGMSG2(D_INIT_REASONS, "(request_mem_region)\n");</div><div class='del'>-			BUGMSG2(D_INIT_REASONS, "Stage 3: ");</div><div class='del'>-			BUGLVL(D_INIT_REASONS) numprint = 0;</div><div class='add'>+			arc_cont(D_INIT_REASONS, "(request_mem_region)\n");</div><div class='add'>+			arc_cont(D_INIT_REASONS, "Stage 3: ");</div><div class='add'>+			if (BUGLVL(D_INIT_REASONS))</div><div class='add'>+				numprint = 0;</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='ctx'> 		base = ioremap(*p, MIRROR_SIZE);</div><div class='ctx'> 		if (!base) {</div><div class='del'>-			BUGMSG2(D_INIT_REASONS, "(ioremap)\n");</div><div class='del'>-			BUGMSG2(D_INIT_REASONS, "Stage 3: ");</div><div class='del'>-			BUGLVL(D_INIT_REASONS) numprint = 0;</div><div class='add'>+			arc_cont(D_INIT_REASONS, "(ioremap)\n");</div><div class='add'>+			arc_cont(D_INIT_REASONS, "Stage 3: ");</div><div class='add'>+			if (BUGLVL(D_INIT_REASONS))</div><div class='add'>+				numprint = 0;</div><div class='ctx'> 			goto out1;</div><div class='ctx'> 		}</div><div class='del'>-		if (readb(base) != TESTvalue) {</div><div class='del'>-			BUGMSG2(D_INIT_REASONS, "(%02Xh != %02Xh)\n",</div><div class='del'>-				readb(base), TESTvalue);</div><div class='del'>-			BUGMSG2(D_INIT_REASONS, "S3: ");</div><div class='del'>-			BUGLVL(D_INIT_REASONS) numprint = 0;</div><div class='add'>+		if (arcnet_readb(base, COM9026_REG_R_STATUS) != TESTvalue) {</div><div class='add'>+			arc_cont(D_INIT_REASONS, "(%02Xh != %02Xh)\n",</div><div class='add'>+				 arcnet_readb(base, COM9026_REG_R_STATUS),</div><div class='add'>+				 TESTvalue);</div><div class='add'>+			arc_cont(D_INIT_REASONS, "S3: ");</div><div class='add'>+			if (BUGLVL(D_INIT_REASONS))</div><div class='add'>+				numprint = 0;</div><div class='ctx'> 			goto out2;</div><div class='ctx'> 		}</div><div class='ctx'> 		/* By writing 0x42 to the TESTvalue location, we also make</div><div class='hunk'>@@ -254,15 +244,16 @@ static void __init com90xx_probe(void)</div><div class='ctx'> 		 * in another pass through this loop, they will be discarded</div><div class='ctx'> 		 * because *cptr != TESTvalue.</div><div class='ctx'> 		 */</div><div class='del'>-		writeb(0x42, base);</div><div class='del'>-		if (readb(base) != 0x42) {</div><div class='del'>-			BUGMSG2(D_INIT_REASONS, "(read only)\n");</div><div class='del'>-			BUGMSG2(D_INIT_REASONS, "S3: ");</div><div class='add'>+		arcnet_writeb(0x42, base, COM9026_REG_W_INTMASK);</div><div class='add'>+		if (arcnet_readb(base, COM9026_REG_R_STATUS) != 0x42) {</div><div class='add'>+			arc_cont(D_INIT_REASONS, "(read only)\n");</div><div class='add'>+			arc_cont(D_INIT_REASONS, "S3: ");</div><div class='ctx'> 			goto out2;</div><div class='ctx'> 		}</div><div class='del'>-		BUGMSG2(D_INIT_REASONS, "\n");</div><div class='del'>-		BUGMSG2(D_INIT_REASONS, "S3: ");</div><div class='del'>-		BUGLVL(D_INIT_REASONS) numprint = 0;</div><div class='add'>+		arc_cont(D_INIT_REASONS, "\n");</div><div class='add'>+		arc_cont(D_INIT_REASONS, "S3: ");</div><div class='add'>+		if (BUGLVL(D_INIT_REASONS))</div><div class='add'>+			numprint = 0;</div><div class='ctx'> 		iomem[index] = base;</div><div class='ctx'> 		continue;</div><div class='ctx'> 	out2:</div><div class='hunk'>@@ -273,10 +264,10 @@ static void __init com90xx_probe(void)</div><div class='ctx'> 		*p-- = shmems[--numshmems];</div><div class='ctx'> 		index--;</div><div class='ctx'> 	}</div><div class='del'>-	BUGMSG2(D_INIT, "\n");</div><div class='add'>+	arc_cont(D_INIT, "\n");</div><div class='ctx'> </div><div class='ctx'> 	if (!numshmems) {</div><div class='del'>-		BUGMSG2(D_NORMAL, "S3: No ARCnet cards found.\n");</div><div class='add'>+		arc_cont(D_NORMAL, "S3: No ARCnet cards found.\n");</div><div class='ctx'> 		for (port = &amp;ports[0]; port &lt; ports + numports; port++)</div><div class='ctx'> 			release_region(*port, ARCNET_TOTAL_SIZE);</div><div class='ctx'> 		kfree(shmems);</div><div class='hunk'>@@ -291,12 +282,12 @@ static void __init com90xx_probe(void)</div><div class='ctx'> 		numprint++;</div><div class='ctx'> 		numprint %= 8;</div><div class='ctx'> 		if (!numprint) {</div><div class='del'>-			BUGMSG2(D_INIT, "\n");</div><div class='del'>-			BUGMSG2(D_INIT, "S4: ");</div><div class='add'>+			arc_cont(D_INIT, "\n");</div><div class='add'>+			arc_cont(D_INIT, "S4: ");</div><div class='ctx'> 		}</div><div class='del'>-		BUGMSG2(D_INIT, "%lXh ", *p);</div><div class='add'>+		arc_cont(D_INIT, "%lXh ", *p);</div><div class='ctx'> 	}</div><div class='del'>-	BUGMSG2(D_INIT, "\n");</div><div class='add'>+	arc_cont(D_INIT, "\n");</div><div class='ctx'> </div><div class='ctx'> 	/* Stage 5: for any ports that have the correct status, can disable</div><div class='ctx'> 	 * the RESET flag, and (if no irq is given) generate an autoirq,</div><div class='hunk'>@@ -308,33 +299,37 @@ static void __init com90xx_probe(void)</div><div class='ctx'> 	numprint = -1;</div><div class='ctx'> 	for (port = &amp;ports[0]; port &lt; ports + numports; port++) {</div><div class='ctx'> 		int found = 0;</div><div class='add'>+</div><div class='ctx'> 		numprint++;</div><div class='ctx'> 		numprint %= 8;</div><div class='ctx'> 		if (!numprint) {</div><div class='del'>-			BUGMSG2(D_INIT, "\n");</div><div class='del'>-			BUGMSG2(D_INIT, "S5: ");</div><div class='add'>+			arc_cont(D_INIT, "\n");</div><div class='add'>+			arc_cont(D_INIT, "S5: ");</div><div class='ctx'> 		}</div><div class='del'>-		BUGMSG2(D_INIT, "%Xh ", *port);</div><div class='add'>+		arc_cont(D_INIT, "%Xh ", *port);</div><div class='ctx'> </div><div class='ctx'> 		ioaddr = *port;</div><div class='del'>-		status = ASTATUS();</div><div class='add'>+		status = arcnet_inb(ioaddr, COM9026_REG_R_STATUS);</div><div class='ctx'> </div><div class='ctx'> 		if ((status &amp; 0x9D)</div><div class='ctx'> 		    != (NORXflag | RECONflag | TXFREEflag | RESETflag)) {</div><div class='del'>-			BUGMSG2(D_INIT_REASONS, "(status=%Xh)\n", status);</div><div class='del'>-			BUGMSG2(D_INIT_REASONS, "S5: ");</div><div class='del'>-			BUGLVL(D_INIT_REASONS) numprint = 0;</div><div class='add'>+			arc_cont(D_INIT_REASONS, "(status=%Xh)\n", status);</div><div class='add'>+			arc_cont(D_INIT_REASONS, "S5: ");</div><div class='add'>+			if (BUGLVL(D_INIT_REASONS))</div><div class='add'>+				numprint = 0;</div><div class='ctx'> 			release_region(*port, ARCNET_TOTAL_SIZE);</div><div class='ctx'> 			*port-- = ports[--numports];</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='del'>-		ACOMMAND(CFLAGScmd | RESETclear | CONFIGclear);</div><div class='del'>-		status = ASTATUS();</div><div class='add'>+		arcnet_outb(CFLAGScmd | RESETclear | CONFIGclear,</div><div class='add'>+			    ioaddr, COM9026_REG_W_COMMAND);</div><div class='add'>+		status = arcnet_inb(ioaddr, COM9026_REG_R_STATUS);</div><div class='ctx'> 		if (status &amp; RESETflag) {</div><div class='del'>-			BUGMSG2(D_INIT_REASONS, " (eternal reset, status=%Xh)\n",</div><div class='del'>-				status);</div><div class='del'>-			BUGMSG2(D_INIT_REASONS, "S5: ");</div><div class='del'>-			BUGLVL(D_INIT_REASONS) numprint = 0;</div><div class='add'>+			arc_cont(D_INIT_REASONS, " (eternal reset, status=%Xh)\n",</div><div class='add'>+				 status);</div><div class='add'>+			arc_cont(D_INIT_REASONS, "S5: ");</div><div class='add'>+			if (BUGLVL(D_INIT_REASONS))</div><div class='add'>+				numprint = 0;</div><div class='ctx'> 			release_region(*port, ARCNET_TOTAL_SIZE);</div><div class='ctx'> 			*port-- = ports[--numports];</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -348,15 +343,16 @@ static void __init com90xx_probe(void)</div><div class='ctx'> 			 * we tell it to start receiving.</div><div class='ctx'> 			 */</div><div class='ctx'> 			airqmask = probe_irq_on();</div><div class='del'>-			AINTMASK(NORXflag);</div><div class='add'>+			arcnet_outb(NORXflag, ioaddr, COM9026_REG_W_INTMASK);</div><div class='ctx'> 			udelay(1);</div><div class='del'>-			AINTMASK(0);</div><div class='add'>+			arcnet_outb(0, ioaddr, COM9026_REG_W_INTMASK);</div><div class='ctx'> 			airq = probe_irq_off(airqmask);</div><div class='ctx'> </div><div class='ctx'> 			if (airq &lt;= 0) {</div><div class='del'>-				BUGMSG2(D_INIT_REASONS, "(airq=%d)\n", airq);</div><div class='del'>-				BUGMSG2(D_INIT_REASONS, "S5: ");</div><div class='del'>-				BUGLVL(D_INIT_REASONS) numprint = 0;</div><div class='add'>+				arc_cont(D_INIT_REASONS, "(airq=%d)\n", airq);</div><div class='add'>+				arc_cont(D_INIT_REASONS, "S5: ");</div><div class='add'>+				if (BUGLVL(D_INIT_REASONS))</div><div class='add'>+					numprint = 0;</div><div class='ctx'> 				release_region(*port, ARCNET_TOTAL_SIZE);</div><div class='ctx'> 				*port-- = ports[--numports];</div><div class='ctx'> 				continue;</div><div class='hunk'>@@ -365,7 +361,7 @@ static void __init com90xx_probe(void)</div><div class='ctx'> 			airq = irq;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		BUGMSG2(D_INIT, "(%d,", airq);</div><div class='add'>+		arc_cont(D_INIT, "(%d,", airq);</div><div class='ctx'> 		openparen = 1;</div><div class='ctx'> </div><div class='ctx'> 		/* Everything seems okay.  But which shmem, if any, puts</div><div class='hunk'>@@ -376,14 +372,15 @@ static void __init com90xx_probe(void)</div><div class='ctx'> 		 */</div><div class='ctx'> #ifdef FAST_PROBE</div><div class='ctx'> 		if (numports &gt; 1 || numshmems &gt; 1) {</div><div class='del'>-			inb(_RESET);</div><div class='add'>+			arcnet_inb(ioaddr, COM9026_REG_R_RESET);</div><div class='ctx'> 			mdelay(RESETtime);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			/* just one shmem and port, assume they match */</div><div class='del'>-			writeb(TESTvalue, iomem[0]);</div><div class='add'>+			arcnet_writeb(TESTvalue, iomem[0],</div><div class='add'>+				      COM9026_REG_W_INTMASK);</div><div class='ctx'> 		}</div><div class='ctx'> #else</div><div class='del'>-		inb(_RESET);</div><div class='add'>+		arcnet_inb(ioaddr, COM9026_REG_R_RESET);</div><div class='ctx'> 		mdelay(RESETtime);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -391,8 +388,8 @@ static void __init com90xx_probe(void)</div><div class='ctx'> 			u_long ptr = shmems[index];</div><div class='ctx'> 			void __iomem *base = iomem[index];</div><div class='ctx'> </div><div class='del'>-			if (readb(base) == TESTvalue) {	/* found one */</div><div class='del'>-				BUGMSG2(D_INIT, "%lXh)\n", *p);</div><div class='add'>+			if (arcnet_readb(base, COM9026_REG_R_STATUS) == TESTvalue) {	/* found one */</div><div class='add'>+				arc_cont(D_INIT, "%lXh)\n", *p);</div><div class='ctx'> 				openparen = 0;</div><div class='ctx'> </div><div class='ctx'> 				/* register the card */</div><div class='hunk'>@@ -405,25 +402,30 @@ static void __init com90xx_probe(void)</div><div class='ctx'> 				iomem[index] = iomem[numshmems];</div><div class='ctx'> 				break;	/* go to the next I/O port */</div><div class='ctx'> 			} else {</div><div class='del'>-				BUGMSG2(D_INIT_REASONS, "%Xh-", readb(base));</div><div class='add'>+				arc_cont(D_INIT_REASONS, "%Xh-",</div><div class='add'>+					 arcnet_readb(base, COM9026_REG_R_STATUS));</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (openparen) {</div><div class='del'>-			BUGLVL(D_INIT) printk("no matching shmem)\n");</div><div class='del'>-			BUGLVL(D_INIT_REASONS) printk("S5: ");</div><div class='del'>-			BUGLVL(D_INIT_REASONS) numprint = 0;</div><div class='add'>+			if (BUGLVL(D_INIT))</div><div class='add'>+				pr_cont("no matching shmem)\n");</div><div class='add'>+			if (BUGLVL(D_INIT_REASONS)) {</div><div class='add'>+				pr_cont("S5: ");</div><div class='add'>+				numprint = 0;</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> 		if (!found)</div><div class='ctx'> 			release_region(*port, ARCNET_TOTAL_SIZE);</div><div class='ctx'> 		*port-- = ports[--numports];</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	BUGLVL(D_INIT_REASONS) printk("\n");</div><div class='add'>+	if (BUGLVL(D_INIT_REASONS))</div><div class='add'>+		pr_cont("\n");</div><div class='ctx'> </div><div class='ctx'> 	/* Now put back TESTvalue on all leftover shmems. */</div><div class='ctx'> 	for (index = 0; index &lt; numshmems; index++) {</div><div class='del'>-		writeb(TESTvalue, iomem[index]);</div><div class='add'>+		arcnet_writeb(TESTvalue, iomem[index], COM9026_REG_W_INTMASK);</div><div class='ctx'> 		iounmap(iomem[index]);</div><div class='ctx'> 		release_mem_region(shmems[index], MIRROR_SIZE);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -431,7 +433,7 @@ static void __init com90xx_probe(void)</div><div class='ctx'> 	kfree(iomem);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int check_mirror(unsigned long addr, size_t size)</div><div class='add'>+static int __init check_mirror(unsigned long addr, size_t size)</div><div class='ctx'> {</div><div class='ctx'> 	void __iomem *p;</div><div class='ctx'> 	int res = -1;</div><div class='hunk'>@@ -441,7 +443,7 @@ static int check_mirror(unsigned long addr, size_t size)</div><div class='ctx'> </div><div class='ctx'> 	p = ioremap(addr, size);</div><div class='ctx'> 	if (p) {</div><div class='del'>-		if (readb(p) == TESTvalue)</div><div class='add'>+		if (arcnet_readb(p, COM9026_REG_R_STATUS) == TESTvalue)</div><div class='ctx'> 			res = 1;</div><div class='ctx'> 		else</div><div class='ctx'> 			res = 0;</div><div class='hunk'>@@ -455,7 +457,8 @@ static int check_mirror(unsigned long addr, size_t size)</div><div class='ctx'> /* Set up the struct net_device associated with this card.  Called after</div><div class='ctx'>  * probing succeeds.</div><div class='ctx'>  */</div><div class='del'>-static int __init com90xx_found(int ioaddr, int airq, u_long shmem, void __iomem *p)</div><div class='add'>+static int __init com90xx_found(int ioaddr, int airq, u_long shmem,</div><div class='add'>+				void __iomem *p)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = NULL;</div><div class='ctx'> 	struct arcnet_local *lp;</div><div class='hunk'>@@ -465,7 +468,7 @@ static int __init com90xx_found(int ioaddr, int airq, u_long shmem, void __iomem</div><div class='ctx'> 	/* allocate struct net_device */</div><div class='ctx'> 	dev = alloc_arcdev(device);</div><div class='ctx'> 	if (!dev) {</div><div class='del'>-		BUGMSG2(D_NORMAL, "com90xx: Can't allocate device!\n");</div><div class='add'>+		arc_cont(D_NORMAL, "com90xx: Can't allocate device!\n");</div><div class='ctx'> 		iounmap(p);</div><div class='ctx'> 		release_mem_region(shmem, MIRROR_SIZE);</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -478,7 +481,7 @@ static int __init com90xx_found(int ioaddr, int airq, u_long shmem, void __iomem</div><div class='ctx'> 	 * 2k (or there are no mirrors at all) but on some, it's 4k.</div><div class='ctx'> 	 */</div><div class='ctx'> 	mirror_size = MIRROR_SIZE;</div><div class='del'>-	if (readb(p) == TESTvalue &amp;&amp;</div><div class='add'>+	if (arcnet_readb(p, COM9026_REG_R_STATUS) == TESTvalue &amp;&amp;</div><div class='ctx'> 	    check_mirror(shmem - MIRROR_SIZE, MIRROR_SIZE) == 0 &amp;&amp;</div><div class='ctx'> 	    check_mirror(shmem - 2 * MIRROR_SIZE, MIRROR_SIZE) == 1)</div><div class='ctx'> 		mirror_size = 2 * MIRROR_SIZE;</div><div class='hunk'>@@ -499,12 +502,14 @@ static int __init com90xx_found(int ioaddr, int airq, u_long shmem, void __iomem</div><div class='ctx'> 	iounmap(p);</div><div class='ctx'> 	release_mem_region(shmem, MIRROR_SIZE);</div><div class='ctx'> </div><div class='del'>-	if (!request_mem_region(dev-&gt;mem_start, dev-&gt;mem_end - dev-&gt;mem_start + 1, "arcnet (90xx)"))</div><div class='add'>+	if (!request_mem_region(dev-&gt;mem_start,</div><div class='add'>+				dev-&gt;mem_end - dev-&gt;mem_start + 1,</div><div class='add'>+				"arcnet (90xx)"))</div><div class='ctx'> 		goto err_free_dev;</div><div class='ctx'> </div><div class='ctx'> 	/* reserve the irq */</div><div class='ctx'> 	if (request_irq(airq, arcnet_interrupt, 0, "arcnet (90xx)", dev)) {</div><div class='del'>-		BUGMSG(D_NORMAL, "Can't get IRQ %d!\n", airq);</div><div class='add'>+		arc_printk(D_NORMAL, dev, "Can't get IRQ %d!\n", airq);</div><div class='ctx'> 		goto err_release_mem;</div><div class='ctx'> 	}</div><div class='ctx'> 	dev-&gt;irq = airq;</div><div class='hunk'>@@ -518,22 +523,24 @@ static int __init com90xx_found(int ioaddr, int airq, u_long shmem, void __iomem</div><div class='ctx'> 	lp-&gt;hw.owner = THIS_MODULE;</div><div class='ctx'> 	lp-&gt;hw.copy_to_card = com90xx_copy_to_card;</div><div class='ctx'> 	lp-&gt;hw.copy_from_card = com90xx_copy_from_card;</div><div class='del'>-	lp-&gt;mem_start = ioremap(dev-&gt;mem_start, dev-&gt;mem_end - dev-&gt;mem_start + 1);</div><div class='add'>+	lp-&gt;mem_start = ioremap(dev-&gt;mem_start,</div><div class='add'>+				dev-&gt;mem_end - dev-&gt;mem_start + 1);</div><div class='ctx'> 	if (!lp-&gt;mem_start) {</div><div class='del'>-		BUGMSG(D_NORMAL, "Can't remap device memory!\n");</div><div class='add'>+		arc_printk(D_NORMAL, dev, "Can't remap device memory!\n");</div><div class='ctx'> 		goto err_free_irq;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* get and check the station ID from offset 1 in shmem */</div><div class='del'>-	dev-&gt;dev_addr[0] = readb(lp-&gt;mem_start + 1);</div><div class='add'>+	arcnet_set_addr(dev, arcnet_readb(lp-&gt;mem_start,</div><div class='add'>+					  COM9026_REG_R_STATION));</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;base_addr = ioaddr;</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_NORMAL, "COM90xx station %02Xh found at %03lXh, IRQ %d, "</div><div class='del'>-	       "ShMem %lXh (%ld*%xh).\n",</div><div class='del'>-	       dev-&gt;dev_addr[0],</div><div class='del'>-	       dev-&gt;base_addr, dev-&gt;irq, dev-&gt;mem_start,</div><div class='del'>-	 (dev-&gt;mem_end - dev-&gt;mem_start + 1) / mirror_size, mirror_size);</div><div class='add'>+	arc_printk(D_NORMAL, dev, "COM90xx station %02Xh found at %03lXh, IRQ %d, ShMem %lXh (%ld*%xh).\n",</div><div class='add'>+		   dev-&gt;dev_addr[0],</div><div class='add'>+		   dev-&gt;base_addr, dev-&gt;irq, dev-&gt;mem_start,</div><div class='add'>+		   (dev-&gt;mem_end - dev-&gt;mem_start + 1) / mirror_size,</div><div class='add'>+		   mirror_size);</div><div class='ctx'> </div><div class='ctx'> 	if (register_netdev(dev))</div><div class='ctx'> 		goto err_unmap;</div><div class='hunk'>@@ -548,38 +555,33 @@ err_free_irq:</div><div class='ctx'> err_release_mem:</div><div class='ctx'> 	release_mem_region(dev-&gt;mem_start, dev-&gt;mem_end - dev-&gt;mem_start + 1);</div><div class='ctx'> err_free_dev:</div><div class='del'>-	free_netdev(dev);</div><div class='add'>+	free_arcdev(dev);</div><div class='ctx'> 	return -EIO;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> static void com90xx_command(struct net_device *dev, int cmd)</div><div class='ctx'> {</div><div class='ctx'> 	short ioaddr = dev-&gt;base_addr;</div><div class='ctx'> </div><div class='del'>-	ACOMMAND(cmd);</div><div class='add'>+	arcnet_outb(cmd, ioaddr, COM9026_REG_W_COMMAND);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> static int com90xx_status(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	short ioaddr = dev-&gt;base_addr;</div><div class='ctx'> </div><div class='del'>-	return ASTATUS();</div><div class='add'>+	return arcnet_inb(ioaddr, COM9026_REG_R_STATUS);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> static void com90xx_setmask(struct net_device *dev, int mask)</div><div class='ctx'> {</div><div class='ctx'> 	short ioaddr = dev-&gt;base_addr;</div><div class='ctx'> </div><div class='del'>-	AINTMASK(mask);</div><div class='add'>+	arcnet_outb(mask, ioaddr, COM9026_REG_W_INTMASK);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Do a hardware reset on the card, and set up necessary registers.</div><div class='del'>- * </div><div class='add'>+/* Do a hardware reset on the card, and set up necessary registers.</div><div class='add'>+ *</div><div class='ctx'>  * This should be called as little as possible, because it disrupts the</div><div class='ctx'>  * token on the network (causes a RECON) and requires a significant delay.</div><div class='ctx'>  *</div><div class='hunk'>@@ -590,54 +592,60 @@ static int com90xx_reset(struct net_device *dev, int really_reset)</div><div class='ctx'> 	struct arcnet_local *lp = netdev_priv(dev);</div><div class='ctx'> 	short ioaddr = dev-&gt;base_addr;</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_INIT, "Resetting (status=%02Xh)\n", ASTATUS());</div><div class='add'>+	arc_printk(D_INIT, dev, "Resetting (status=%02Xh)\n",</div><div class='add'>+		   arcnet_inb(ioaddr, COM9026_REG_R_STATUS));</div><div class='ctx'> </div><div class='ctx'> 	if (really_reset) {</div><div class='ctx'> 		/* reset the card */</div><div class='del'>-		inb(_RESET);</div><div class='add'>+		arcnet_inb(ioaddr, COM9026_REG_R_RESET);</div><div class='ctx'> 		mdelay(RESETtime);</div><div class='ctx'> 	}</div><div class='del'>-	ACOMMAND(CFLAGScmd | RESETclear);	/* clear flags &amp; end reset */</div><div class='del'>-	ACOMMAND(CFLAGScmd | CONFIGclear);</div><div class='add'>+	/* clear flags &amp; end reset */</div><div class='add'>+	arcnet_outb(CFLAGScmd | RESETclear, ioaddr, COM9026_REG_W_COMMAND);</div><div class='add'>+	arcnet_outb(CFLAGScmd | CONFIGclear, ioaddr, COM9026_REG_W_COMMAND);</div><div class='ctx'> </div><div class='add'>+#if 0</div><div class='ctx'> 	/* don't do this until we verify that it doesn't hurt older cards! */</div><div class='del'>-	/* outb(inb(_CONFIG) | ENABLE16flag, _CONFIG); */</div><div class='add'>+	arcnet_outb(arcnet_inb(ioaddr, COM9026_REG_RW_CONFIG) | ENABLE16flag,</div><div class='add'>+		    ioaddr, COM9026_REG_RW_CONFIG);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	/* verify that the ARCnet signature byte is present */</div><div class='del'>-	if (readb(lp-&gt;mem_start) != TESTvalue) {</div><div class='add'>+	if (arcnet_readb(lp-&gt;mem_start, COM9026_REG_R_STATUS) != TESTvalue) {</div><div class='ctx'> 		if (really_reset)</div><div class='del'>-			BUGMSG(D_NORMAL, "reset failed: TESTvalue not present.\n");</div><div class='add'>+			arc_printk(D_NORMAL, dev, "reset failed: TESTvalue not present.\n");</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* enable extended (512-byte) packets */</div><div class='del'>-	ACOMMAND(CONFIGcmd | EXTconf);</div><div class='add'>+	arcnet_outb(CONFIGcmd | EXTconf, ioaddr, COM9026_REG_W_COMMAND);</div><div class='ctx'> </div><div class='ctx'> 	/* clean out all the memory to make debugging make more sense :) */</div><div class='del'>-	BUGLVL(D_DURING)</div><div class='del'>-	    memset_io(lp-&gt;mem_start, 0x42, 2048);</div><div class='add'>+	if (BUGLVL(D_DURING))</div><div class='add'>+		memset_io(lp-&gt;mem_start, 0x42, 2048);</div><div class='ctx'> </div><div class='ctx'> 	/* done!  return success. */</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void com90xx_copy_to_card(struct net_device *dev, int bufnum, int offset,</div><div class='del'>-				 void *buf, int count)</div><div class='add'>+static void com90xx_copy_to_card(struct net_device *dev, int bufnum,</div><div class='add'>+				 int offset, void *buf, int count)</div><div class='ctx'> {</div><div class='ctx'> 	struct arcnet_local *lp = netdev_priv(dev);</div><div class='ctx'> 	void __iomem *memaddr = lp-&gt;mem_start + bufnum * 512 + offset;</div><div class='del'>-	TIME("memcpy_toio", count, memcpy_toio(memaddr, buf, count));</div><div class='del'>-}</div><div class='ctx'> </div><div class='add'>+	TIME(dev, "memcpy_toio", count, memcpy_toio(memaddr, buf, count));</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-static void com90xx_copy_from_card(struct net_device *dev, int bufnum, int offset,</div><div class='del'>-				   void *buf, int count)</div><div class='add'>+static void com90xx_copy_from_card(struct net_device *dev, int bufnum,</div><div class='add'>+				   int offset, void *buf, int count)</div><div class='ctx'> {</div><div class='ctx'> 	struct arcnet_local *lp = netdev_priv(dev);</div><div class='ctx'> 	void __iomem *memaddr = lp-&gt;mem_start + bufnum * 512 + offset;</div><div class='del'>-	TIME("memcpy_fromio", count, memcpy_fromio(buf, memaddr, count));</div><div class='del'>-}</div><div class='ctx'> </div><div class='add'>+	TIME(dev, "memcpy_fromio", count, memcpy_fromio(buf, memaddr, count));</div><div class='add'>+}</div><div class='ctx'> </div><div class='add'>+MODULE_DESCRIPTION("ARCnet COM90xx normal chipset driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='ctx'> static int __init com90xx_init(void)</div><div class='hunk'>@@ -664,8 +672,9 @@ static void __exit com90xx_exit(void)</div><div class='ctx'> 		free_irq(dev-&gt;irq, dev);</div><div class='ctx'> 		iounmap(lp-&gt;mem_start);</div><div class='ctx'> 		release_region(dev-&gt;base_addr, ARCNET_TOTAL_SIZE);</div><div class='del'>-		release_mem_region(dev-&gt;mem_start, dev-&gt;mem_end - dev-&gt;mem_start + 1);</div><div class='del'>-		free_netdev(dev);</div><div class='add'>+		release_mem_region(dev-&gt;mem_start,</div><div class='add'>+				   dev-&gt;mem_end - dev-&gt;mem_start + 1);</div><div class='add'>+		free_arcdev(dev);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -679,17 +688,20 @@ static int __init com90xx_setup(char *s)</div><div class='ctx'> </div><div class='ctx'> 	s = get_options(s, 8, ints);</div><div class='ctx'> 	if (!ints[0] &amp;&amp; !*s) {</div><div class='del'>-		printk("com90xx: Disabled.\n");</div><div class='add'>+		pr_notice("Disabled\n");</div><div class='ctx'> 		return 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	switch (ints[0]) {</div><div class='ctx'> 	default:		/* ERROR */</div><div class='del'>-		printk("com90xx: Too many arguments.\n");</div><div class='add'>+		pr_err("Too many arguments\n");</div><div class='add'>+		fallthrough;</div><div class='ctx'> 	case 3:		/* Mem address */</div><div class='ctx'> 		shmem = ints[3];</div><div class='add'>+		fallthrough;</div><div class='ctx'> 	case 2:		/* IRQ */</div><div class='ctx'> 		irq = ints[2];</div><div class='add'>+		fallthrough;</div><div class='ctx'> 	case 1:		/* IO address */</div><div class='ctx'> 		io = ints[1];</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/arcnet/rfc1051.c b/drivers/net/arcnet/rfc1051.c<br/>index f81db4070a57..46519ca63a0a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/arcnet/rfc1051.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/arcnet/rfc1051.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/arcnet/rfc1051.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/arcnet/rfc1051.c</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Linux ARCnet driver - RFC1051 ("simple" standard) packet encapsulation</div><div class='del'>- * </div><div class='add'>+ *</div><div class='ctx'>  * Written 1994-1999 by Avery Pennarun.</div><div class='ctx'>  * Derived from skeleton.c by Donald Becker.</div><div class='ctx'>  *</div><div class='hunk'>@@ -23,6 +23,9 @@</div><div class='ctx'>  *</div><div class='ctx'>  * **********************</div><div class='ctx'>  */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) "arcnet:" KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/gfp.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='hunk'>@@ -30,10 +33,8 @@</div><div class='ctx'> #include &lt;net/arp.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/skbuff.h&gt;</div><div class='del'>-#include &lt;linux/arcdevice.h&gt;</div><div class='del'>-</div><div class='del'>-#define VERSION "arcnet: RFC1051 \"simple standard\" (`s') encapsulation support loaded.\n"</div><div class='ctx'> </div><div class='add'>+#include "arcdevice.h"</div><div class='ctx'> </div><div class='ctx'> static __be16 type_trans(struct sk_buff *skb, struct net_device *dev);</div><div class='ctx'> static void rx(struct net_device *dev, int bufnum,</div><div class='hunk'>@@ -43,9 +44,7 @@ static int build_header(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> static int prepare_tx(struct net_device *dev, struct archdr *pkt, int length,</div><div class='ctx'> 		      int bufnum);</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-static struct ArcProto rfc1051_proto =</div><div class='del'>-{</div><div class='add'>+static struct ArcProto rfc1051_proto = {</div><div class='ctx'> 	.suffix		= 's',</div><div class='ctx'> 	.mtu		= XMTU - RFC1051_HDR_SIZE,</div><div class='ctx'> 	.is_ip          = 1,</div><div class='hunk'>@@ -56,10 +55,9 @@ static struct ArcProto rfc1051_proto =</div><div class='ctx'> 	.ack_tx         = NULL</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> static int __init arcnet_rfc1051_init(void)</div><div class='ctx'> {</div><div class='del'>-	printk(VERSION);</div><div class='add'>+	pr_info("%s\n", "RFC1051 \"simple standard\" (`s') encapsulation support loaded");</div><div class='ctx'> </div><div class='ctx'> 	arc_proto_map[ARC_P_IP_RFC1051]</div><div class='ctx'> 	    = arc_proto_map[ARC_P_ARP_RFC1051]</div><div class='hunk'>@@ -80,16 +78,16 @@ static void __exit arcnet_rfc1051_exit(void)</div><div class='ctx'> module_init(arcnet_rfc1051_init);</div><div class='ctx'> module_exit(arcnet_rfc1051_exit);</div><div class='ctx'> </div><div class='add'>+MODULE_DESCRIPTION("ARCNet packet format (RFC 1051) module");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Determine a packet's protocol ID.</div><div class='del'>- * </div><div class='add'>+/* Determine a packet's protocol ID.</div><div class='add'>+ *</div><div class='ctx'>  * With ARCnet we have to convert everything to Ethernet-style stuff.</div><div class='ctx'>  */</div><div class='ctx'> static __be16 type_trans(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct archdr *pkt = (struct archdr *) skb-&gt;data;</div><div class='add'>+	struct archdr *pkt = (struct archdr *)skb-&gt;data;</div><div class='ctx'> 	struct arc_rfc1051 *soft = &amp;pkt-&gt;soft.rfc1051;</div><div class='ctx'> 	int hdr_size = ARC_HDR_SIZE + RFC1051_HDR_SIZE;</div><div class='ctx'> </div><div class='hunk'>@@ -97,9 +95,9 @@ static __be16 type_trans(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	skb_reset_mac_header(skb);</div><div class='ctx'> 	skb_pull(skb, hdr_size);</div><div class='ctx'> </div><div class='del'>-	if (pkt-&gt;hard.dest == 0)</div><div class='add'>+	if (pkt-&gt;hard.dest == 0) {</div><div class='ctx'> 		skb-&gt;pkt_type = PACKET_BROADCAST;</div><div class='del'>-	else if (dev-&gt;flags &amp; IFF_PROMISC) {</div><div class='add'>+	} else if (dev-&gt;flags &amp; IFF_PROMISC) {</div><div class='ctx'> 		/* if we're not sending to ourselves :) */</div><div class='ctx'> 		if (pkt-&gt;hard.dest != dev-&gt;dev_addr[0])</div><div class='ctx'> 			skb-&gt;pkt_type = PACKET_OTHERHOST;</div><div class='hunk'>@@ -120,7 +118,6 @@ static __be16 type_trans(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	return htons(ETH_P_IP);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> /* packet receiver */</div><div class='ctx'> static void rx(struct net_device *dev, int bufnum,</div><div class='ctx'> 	       struct archdr *pkthdr, int length)</div><div class='hunk'>@@ -130,7 +127,7 @@ static void rx(struct net_device *dev, int bufnum,</div><div class='ctx'> 	struct archdr *pkt = pkthdr;</div><div class='ctx'> 	int ofs;</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_DURING, "it's a raw packet (length=%d)\n", length);</div><div class='add'>+	arc_printk(D_DURING, dev, "it's a raw packet (length=%d)\n", length);</div><div class='ctx'> </div><div class='ctx'> 	if (length &gt;= MinTU)</div><div class='ctx'> 		ofs = 512 - length;</div><div class='hunk'>@@ -138,15 +135,14 @@ static void rx(struct net_device *dev, int bufnum,</div><div class='ctx'> 		ofs = 256 - length;</div><div class='ctx'> </div><div class='ctx'> 	skb = alloc_skb(length + ARC_HDR_SIZE, GFP_ATOMIC);</div><div class='del'>-	if (skb == NULL) {</div><div class='del'>-		BUGMSG(D_NORMAL, "Memory squeeze, dropping packet.\n");</div><div class='add'>+	if (!skb) {</div><div class='ctx'> 		dev-&gt;stats.rx_dropped++;</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	skb_put(skb, length + ARC_HDR_SIZE);</div><div class='ctx'> 	skb-&gt;dev = dev;</div><div class='ctx'> </div><div class='del'>-	pkt = (struct archdr *) skb-&gt;data;</div><div class='add'>+	pkt = (struct archdr *)skb-&gt;data;</div><div class='ctx'> </div><div class='ctx'> 	/* up to sizeof(pkt-&gt;soft) has already been copied from the card */</div><div class='ctx'> 	memcpy(pkt, pkthdr, sizeof(struct archdr));</div><div class='hunk'>@@ -155,21 +151,19 @@ static void rx(struct net_device *dev, int bufnum,</div><div class='ctx'> 				      pkt-&gt;soft.raw + sizeof(pkt-&gt;soft),</div><div class='ctx'> 				      length - sizeof(pkt-&gt;soft));</div><div class='ctx'> </div><div class='del'>-	BUGLVL(D_SKB) arcnet_dump_skb(dev, skb, "rx");</div><div class='add'>+	if (BUGLVL(D_SKB))</div><div class='add'>+		arcnet_dump_skb(dev, skb, "rx");</div><div class='ctx'> </div><div class='ctx'> 	skb-&gt;protocol = type_trans(skb, dev);</div><div class='ctx'> 	netif_rx(skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Create the ARCnet hard/soft headers for RFC1051.</div><div class='del'>- */</div><div class='add'>+/* Create the ARCnet hard/soft headers for RFC1051 */</div><div class='ctx'> static int build_header(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> 			unsigned short type, uint8_t daddr)</div><div class='ctx'> {</div><div class='ctx'> 	int hdr_size = ARC_HDR_SIZE + RFC1051_HDR_SIZE;</div><div class='del'>-	struct archdr *pkt = (struct archdr *) skb_push(skb, hdr_size);</div><div class='add'>+	struct archdr *pkt = skb_push(skb, hdr_size);</div><div class='ctx'> 	struct arc_rfc1051 *soft = &amp;pkt-&gt;soft.rfc1051;</div><div class='ctx'> </div><div class='ctx'> 	/* set the protocol ID according to RFC1051 */</div><div class='hunk'>@@ -181,29 +175,26 @@ static int build_header(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> 		soft-&gt;proto = ARC_P_ARP_RFC1051;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		BUGMSG(D_NORMAL, "RFC1051: I don't understand protocol %d (%Xh)\n",</div><div class='del'>-		       type, type);</div><div class='add'>+		arc_printk(D_NORMAL, dev, "RFC1051: I don't understand protocol %d (%Xh)\n",</div><div class='add'>+			   type, type);</div><div class='ctx'> 		dev-&gt;stats.tx_errors++;</div><div class='ctx'> 		dev-&gt;stats.tx_aborted_errors++;</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Set the source hardware address.</div><div class='add'>+	/* Set the source hardware address.</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * This is pretty pointless for most purposes, but it can help in</div><div class='del'>-	 * debugging.  ARCnet does not allow us to change the source address in</div><div class='del'>-	 * the actual packet sent)</div><div class='add'>+	 * debugging.  ARCnet does not allow us to change the source address</div><div class='add'>+	 * in the actual packet sent.</div><div class='ctx'> 	 */</div><div class='ctx'> 	pkt-&gt;hard.source = *dev-&gt;dev_addr;</div><div class='ctx'> </div><div class='ctx'> 	/* see linux/net/ethernet/eth.c to see where I got the following */</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;flags &amp; (IFF_LOOPBACK | IFF_NOARP)) {</div><div class='del'>-		/* </div><div class='del'>-		 * FIXME: fill in the last byte of the dest ipaddr here to better</div><div class='del'>-		 * comply with RFC1051 in "noarp" mode.</div><div class='add'>+		/* FIXME: fill in the last byte of the dest ipaddr here to</div><div class='add'>+		 * better comply with RFC1051 in "noarp" mode.</div><div class='ctx'> 		 */</div><div class='ctx'> 		pkt-&gt;hard.dest = 0;</div><div class='ctx'> 		return hdr_size;</div><div class='hunk'>@@ -214,7 +205,6 @@ static int build_header(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> 	return hdr_size;	/* success */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> static int prepare_tx(struct net_device *dev, struct archdr *pkt, int length,</div><div class='ctx'> 		      int bufnum)</div><div class='ctx'> {</div><div class='hunk'>@@ -222,15 +212,16 @@ static int prepare_tx(struct net_device *dev, struct archdr *pkt, int length,</div><div class='ctx'> 	struct arc_hardware *hard = &amp;pkt-&gt;hard;</div><div class='ctx'> 	int ofs;</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_DURING, "prepare_tx: txbufs=%d/%d/%d\n",</div><div class='del'>-	       lp-&gt;next_tx, lp-&gt;cur_tx, bufnum);</div><div class='add'>+	arc_printk(D_DURING, dev, "prepare_tx: txbufs=%d/%d/%d\n",</div><div class='add'>+		   lp-&gt;next_tx, lp-&gt;cur_tx, bufnum);</div><div class='ctx'> </div><div class='del'>-	length -= ARC_HDR_SIZE;	/* hard header is not included in packet length */</div><div class='add'>+	/* hard header is not included in packet length */</div><div class='add'>+	length -= ARC_HDR_SIZE;</div><div class='ctx'> </div><div class='ctx'> 	if (length &gt; XMTU) {</div><div class='ctx'> 		/* should never happen! other people already check for this. */</div><div class='del'>-		BUGMSG(D_NORMAL, "Bug!  prepare_tx with size %d (&gt; %d)\n",</div><div class='del'>-		       length, XMTU);</div><div class='add'>+		arc_printk(D_NORMAL, dev, "Bug!  prepare_tx with size %d (&gt; %d)\n",</div><div class='add'>+			   length, XMTU);</div><div class='ctx'> 		length = XMTU;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (length &gt; MinTU) {</div><div class='hunk'>@@ -239,8 +230,9 @@ static int prepare_tx(struct net_device *dev, struct archdr *pkt, int length,</div><div class='ctx'> 	} else if (length &gt; MTU) {</div><div class='ctx'> 		hard-&gt;offset[0] = 0;</div><div class='ctx'> 		hard-&gt;offset[1] = ofs = 512 - length - 3;</div><div class='del'>-	} else</div><div class='add'>+	} else {</div><div class='ctx'> 		hard-&gt;offset[0] = ofs = 256 - length;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	lp-&gt;hw.copy_to_card(dev, bufnum, 0, hard, ARC_HDR_SIZE);</div><div class='ctx'> 	lp-&gt;hw.copy_to_card(dev, bufnum, ofs, &amp;pkt-&gt;soft, length);</div><div class='head'>diff --git a/drivers/net/arcnet/rfc1201.c b/drivers/net/arcnet/rfc1201.c<br/>index b71431aae084..0edf35d971c5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/arcnet/rfc1201.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/arcnet/rfc1201.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/arcnet/rfc1201.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/arcnet/rfc1201.c</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Linux ARCnet driver - RFC1201 (standard) packet encapsulation</div><div class='del'>- * </div><div class='add'>+ *</div><div class='ctx'>  * Written 1994-1999 by Avery Pennarun.</div><div class='ctx'>  * Derived from skeleton.c by Donald Becker.</div><div class='ctx'>  *</div><div class='hunk'>@@ -23,17 +23,20 @@</div><div class='ctx'>  *</div><div class='ctx'>  * **********************</div><div class='ctx'>  */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) "arcnet:" KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='ctx'> #include &lt;linux/gfp.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/if_arp.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/skbuff.h&gt;</div><div class='del'>-#include &lt;linux/arcdevice.h&gt;</div><div class='ctx'> </div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-#define VERSION "arcnet: RFC1201 \"standard\" (`a') encapsulation support loaded.\n"</div><div class='add'>+#include "arcdevice.h"</div><div class='ctx'> </div><div class='add'>+MODULE_DESCRIPTION("ARCNet packet format (RFC 1201) module");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='ctx'> static __be16 type_trans(struct sk_buff *skb, struct net_device *dev);</div><div class='ctx'> static void rx(struct net_device *dev, int bufnum,</div><div class='hunk'>@@ -44,8 +47,7 @@ static int prepare_tx(struct net_device *dev, struct archdr *pkt, int length,</div><div class='ctx'> 		      int bufnum);</div><div class='ctx'> static int continue_tx(struct net_device *dev, int bufnum);</div><div class='ctx'> </div><div class='del'>-static struct ArcProto rfc1201_proto =</div><div class='del'>-{</div><div class='add'>+static struct ArcProto rfc1201_proto = {</div><div class='ctx'> 	.suffix		= 'a',</div><div class='ctx'> 	.mtu		= 1500,	/* could be more, but some receivers can't handle it... */</div><div class='ctx'> 	.is_ip          = 1,    /* This is for sending IP and ARP packages */</div><div class='hunk'>@@ -56,10 +58,9 @@ static struct ArcProto rfc1201_proto =</div><div class='ctx'> 	.ack_tx         = NULL</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> static int __init arcnet_rfc1201_init(void)</div><div class='ctx'> {</div><div class='del'>-	printk(VERSION);</div><div class='add'>+	pr_info("%s\n", "RFC1201 \"standard\" (`a') encapsulation support loaded");</div><div class='ctx'> </div><div class='ctx'> 	arc_proto_map[ARC_P_IP]</div><div class='ctx'> 	    = arc_proto_map[ARC_P_IPV6]</div><div class='hunk'>@@ -84,14 +85,13 @@ static void __exit arcnet_rfc1201_exit(void)</div><div class='ctx'> module_init(arcnet_rfc1201_init);</div><div class='ctx'> module_exit(arcnet_rfc1201_exit);</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Determine a packet's protocol ID.</div><div class='del'>- * </div><div class='add'>+/* Determine a packet's protocol ID.</div><div class='add'>+ *</div><div class='ctx'>  * With ARCnet we have to convert everything to Ethernet-style stuff.</div><div class='ctx'>  */</div><div class='ctx'> static __be16 type_trans(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct archdr *pkt = (struct archdr *) skb-&gt;data;</div><div class='add'>+	struct archdr *pkt = (struct archdr *)skb-&gt;data;</div><div class='ctx'> 	struct arc_rfc1201 *soft = &amp;pkt-&gt;soft.rfc1201;</div><div class='ctx'> 	int hdr_size = ARC_HDR_SIZE + RFC1201_HDR_SIZE;</div><div class='ctx'> </div><div class='hunk'>@@ -99,9 +99,9 @@ static __be16 type_trans(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	skb_reset_mac_header(skb);</div><div class='ctx'> 	skb_pull(skb, hdr_size);</div><div class='ctx'> </div><div class='del'>-	if (pkt-&gt;hard.dest == 0)</div><div class='add'>+	if (pkt-&gt;hard.dest == 0) {</div><div class='ctx'> 		skb-&gt;pkt_type = PACKET_BROADCAST;</div><div class='del'>-	else if (dev-&gt;flags &amp; IFF_PROMISC) {</div><div class='add'>+	} else if (dev-&gt;flags &amp; IFF_PROMISC) {</div><div class='ctx'> 		/* if we're not sending to ourselves :) */</div><div class='ctx'> 		if (pkt-&gt;hard.dest != dev-&gt;dev_addr[0])</div><div class='ctx'> 			skb-&gt;pkt_type = PACKET_OTHERHOST;</div><div class='hunk'>@@ -129,7 +129,6 @@ static __be16 type_trans(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	return htons(ETH_P_IP);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> /* packet receiver */</div><div class='ctx'> static void rx(struct net_device *dev, int bufnum,</div><div class='ctx'> 	       struct archdr *pkthdr, int length)</div><div class='hunk'>@@ -141,7 +140,8 @@ static void rx(struct net_device *dev, int bufnum,</div><div class='ctx'> 	int saddr = pkt-&gt;hard.source, ofs;</div><div class='ctx'> 	struct Incoming *in = &amp;lp-&gt;rfc1201.incoming[saddr];</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_DURING, "it's an RFC1201 packet (length=%d)\n", length);</div><div class='add'>+	arc_printk(D_DURING, dev, "it's an RFC1201 packet (length=%d)\n",</div><div class='add'>+		   length);</div><div class='ctx'> </div><div class='ctx'> 	if (length &gt;= MinTU)</div><div class='ctx'> 		ofs = 512 - length;</div><div class='hunk'>@@ -149,11 +149,11 @@ static void rx(struct net_device *dev, int bufnum,</div><div class='ctx'> 		ofs = 256 - length;</div><div class='ctx'> </div><div class='ctx'> 	if (soft-&gt;split_flag == 0xFF) {		/* Exception Packet */</div><div class='del'>-		if (length &gt;= 4 + RFC1201_HDR_SIZE)</div><div class='del'>-			BUGMSG(D_DURING, "compensating for exception packet\n");</div><div class='del'>-		else {</div><div class='del'>-			BUGMSG(D_EXTRA, "short RFC1201 exception packet from %02Xh",</div><div class='del'>-			       saddr);</div><div class='add'>+		if (length &gt;= 4 + RFC1201_HDR_SIZE) {</div><div class='add'>+			arc_printk(D_DURING, dev, "compensating for exception packet\n");</div><div class='add'>+		} else {</div><div class='add'>+			arc_printk(D_EXTRA, dev, "short RFC1201 exception packet from %02Xh",</div><div class='add'>+				   saddr);</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -164,12 +164,13 @@ static void rx(struct net_device *dev, int bufnum,</div><div class='ctx'> 				      soft, sizeof(pkt-&gt;soft));</div><div class='ctx'> 	}</div><div class='ctx'> 	if (!soft-&gt;split_flag) {	/* not split */</div><div class='del'>-		BUGMSG(D_RX, "incoming is not split (splitflag=%d)\n",</div><div class='del'>-		       soft-&gt;split_flag);</div><div class='add'>+		arc_printk(D_RX, dev, "incoming is not split (splitflag=%d)\n",</div><div class='add'>+			   soft-&gt;split_flag);</div><div class='ctx'> </div><div class='ctx'> 		if (in-&gt;skb) {	/* already assembling one! */</div><div class='del'>-			BUGMSG(D_EXTRA, "aborting assembly (seq=%d) for unsplit packet (splitflag=%d, seq=%d)\n",</div><div class='del'>-			 in-&gt;sequence, soft-&gt;split_flag, soft-&gt;sequence);</div><div class='add'>+			arc_printk(D_EXTRA, dev, "aborting assembly (seq=%d) for unsplit packet (splitflag=%d, seq=%d)\n",</div><div class='add'>+				   in-&gt;sequence, soft-&gt;split_flag,</div><div class='add'>+				   soft-&gt;sequence);</div><div class='ctx'> 			lp-&gt;rfc1201.aborted_seq = soft-&gt;sequence;</div><div class='ctx'> 			dev_kfree_skb_irq(in-&gt;skb);</div><div class='ctx'> 			dev-&gt;stats.rx_errors++;</div><div class='hunk'>@@ -179,82 +180,86 @@ static void rx(struct net_device *dev, int bufnum,</div><div class='ctx'> 		in-&gt;sequence = soft-&gt;sequence;</div><div class='ctx'> </div><div class='ctx'> 		skb = alloc_skb(length + ARC_HDR_SIZE, GFP_ATOMIC);</div><div class='del'>-		if (skb == NULL) {</div><div class='del'>-			BUGMSG(D_NORMAL, "Memory squeeze, dropping packet.\n");</div><div class='add'>+		if (!skb) {</div><div class='ctx'> 			dev-&gt;stats.rx_dropped++;</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='ctx'> 		skb_put(skb, length + ARC_HDR_SIZE);</div><div class='ctx'> 		skb-&gt;dev = dev;</div><div class='ctx'> </div><div class='del'>-		pkt = (struct archdr *) skb-&gt;data;</div><div class='add'>+		pkt = (struct archdr *)skb-&gt;data;</div><div class='ctx'> 		soft = &amp;pkt-&gt;soft.rfc1201;</div><div class='ctx'> </div><div class='del'>-		/* up to sizeof(pkt-&gt;soft) has already been copied from the card */</div><div class='add'>+		/* up to sizeof(pkt-&gt;soft) has already</div><div class='add'>+		 * been copied from the card</div><div class='add'>+		 */</div><div class='ctx'> 		memcpy(pkt, pkthdr, sizeof(struct archdr));</div><div class='ctx'> 		if (length &gt; sizeof(pkt-&gt;soft))</div><div class='del'>-			lp-&gt;hw.copy_from_card(dev, bufnum, ofs + sizeof(pkt-&gt;soft),</div><div class='del'>-				       pkt-&gt;soft.raw + sizeof(pkt-&gt;soft),</div><div class='add'>+			lp-&gt;hw.copy_from_card(dev, bufnum,</div><div class='add'>+					      ofs + sizeof(pkt-&gt;soft),</div><div class='add'>+					      pkt-&gt;soft.raw + sizeof(pkt-&gt;soft),</div><div class='ctx'> 					      length - sizeof(pkt-&gt;soft));</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * ARP packets have problems when sent from some DOS systems: the</div><div class='del'>-		 * source address is always 0!  So we take the hardware source addr</div><div class='del'>-		 * (which is impossible to fumble) and insert it ourselves.</div><div class='add'>+		/* ARP packets have problems when sent from some DOS systems:</div><div class='add'>+		 * the source address is always 0!</div><div class='add'>+		 * So we take the hardware source addr (which is impossible</div><div class='add'>+		 * to fumble) and insert it ourselves.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (soft-&gt;proto == ARC_P_ARP) {</div><div class='del'>-			struct arphdr *arp = (struct arphdr *) soft-&gt;payload;</div><div class='add'>+			struct arphdr *arp = (struct arphdr *)soft-&gt;payload;</div><div class='ctx'> </div><div class='ctx'> 			/* make sure addresses are the right length */</div><div class='ctx'> 			if (arp-&gt;ar_hln == 1 &amp;&amp; arp-&gt;ar_pln == 4) {</div><div class='del'>-				uint8_t *cptr = (uint8_t *) arp + sizeof(struct arphdr);</div><div class='add'>+				uint8_t *cptr = (uint8_t *)arp + sizeof(struct arphdr);</div><div class='ctx'> </div><div class='ctx'> 				if (!*cptr) {	/* is saddr = 00? */</div><div class='del'>-					BUGMSG(D_EXTRA,</div><div class='del'>-					       "ARP source address was 00h, set to %02Xh.\n",</div><div class='del'>-					       saddr);</div><div class='add'>+					arc_printk(D_EXTRA, dev,</div><div class='add'>+						   "ARP source address was 00h, set to %02Xh\n",</div><div class='add'>+						   saddr);</div><div class='ctx'> 					dev-&gt;stats.rx_crc_errors++;</div><div class='ctx'> 					*cptr = saddr;</div><div class='ctx'> 				} else {</div><div class='del'>-					BUGMSG(D_DURING, "ARP source address (%Xh) is fine.\n",</div><div class='del'>-					       *cptr);</div><div class='add'>+					arc_printk(D_DURING, dev, "ARP source address (%Xh) is fine.\n",</div><div class='add'>+						   *cptr);</div><div class='ctx'> 				}</div><div class='ctx'> 			} else {</div><div class='del'>-				BUGMSG(D_NORMAL, "funny-shaped ARP packet. (%Xh, %Xh)\n",</div><div class='del'>-				       arp-&gt;ar_hln, arp-&gt;ar_pln);</div><div class='add'>+				arc_printk(D_NORMAL, dev, "funny-shaped ARP packet. (%Xh, %Xh)\n",</div><div class='add'>+					   arp-&gt;ar_hln, arp-&gt;ar_pln);</div><div class='ctx'> 				dev-&gt;stats.rx_errors++;</div><div class='ctx'> 				dev-&gt;stats.rx_crc_errors++;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='del'>-		BUGLVL(D_SKB) arcnet_dump_skb(dev, skb, "rx");</div><div class='add'>+		if (BUGLVL(D_SKB))</div><div class='add'>+			arcnet_dump_skb(dev, skb, "rx");</div><div class='ctx'> </div><div class='ctx'> 		skb-&gt;protocol = type_trans(skb, dev);</div><div class='ctx'> 		netif_rx(skb);</div><div class='ctx'> 	} else {		/* split packet */</div><div class='del'>-		/*</div><div class='del'>-		 * NOTE: MSDOS ARP packet correction should only need to apply to</div><div class='del'>-		 * unsplit packets, since ARP packets are so short.</div><div class='add'>+		/* NOTE: MSDOS ARP packet correction should only need to</div><div class='add'>+		 * apply to unsplit packets, since ARP packets are so short.</div><div class='ctx'> 		 *</div><div class='del'>-		 * My interpretation of the RFC1201 document is that if a packet is</div><div class='del'>-		 * received out of order, the entire assembly process should be</div><div class='del'>-		 * aborted.</div><div class='add'>+		 * My interpretation of the RFC1201 document is that if a</div><div class='add'>+		 * packet is received out of order, the entire assembly</div><div class='add'>+		 * process should be aborted.</div><div class='ctx'> 		 *</div><div class='del'>-		 * The RFC also mentions "it is possible for successfully received</div><div class='del'>-		 * packets to be retransmitted." As of 0.40 all previously received</div><div class='del'>-		 * packets are allowed, not just the most recent one.</div><div class='add'>+		 * The RFC also mentions "it is possible for successfully</div><div class='add'>+		 * received packets to be retransmitted." As of 0.40 all</div><div class='add'>+		 * previously received packets are allowed, not just the</div><div class='add'>+		 * most recent one.</div><div class='ctx'> 		 *</div><div class='del'>-		 * We allow multiple assembly processes, one for each ARCnet card</div><div class='del'>-		 * possible on the network.  Seems rather like a waste of memory,</div><div class='del'>-		 * but there's no other way to be reliable.</div><div class='add'>+		 * We allow multiple assembly processes, one for each</div><div class='add'>+		 * ARCnet card possible on the network.</div><div class='add'>+		 * Seems rather like a waste of memory, but there's no</div><div class='add'>+		 * other way to be reliable.</div><div class='ctx'> 		 */</div><div class='ctx'> </div><div class='del'>-		BUGMSG(D_RX, "packet is split (splitflag=%d, seq=%d)\n",</div><div class='del'>-		       soft-&gt;split_flag, in-&gt;sequence);</div><div class='add'>+		arc_printk(D_RX, dev, "packet is split (splitflag=%d, seq=%d)\n",</div><div class='add'>+			   soft-&gt;split_flag, in-&gt;sequence);</div><div class='ctx'> </div><div class='ctx'> 		if (in-&gt;skb &amp;&amp; in-&gt;sequence != soft-&gt;sequence) {</div><div class='del'>-			BUGMSG(D_EXTRA, "wrong seq number (saddr=%d, expected=%d, seq=%d, splitflag=%d)\n",</div><div class='del'>-			       saddr, in-&gt;sequence, soft-&gt;sequence,</div><div class='del'>-			       soft-&gt;split_flag);</div><div class='add'>+			arc_printk(D_EXTRA, dev, "wrong seq number (saddr=%d, expected=%d, seq=%d, splitflag=%d)\n",</div><div class='add'>+				   saddr, in-&gt;sequence, soft-&gt;sequence,</div><div class='add'>+				   soft-&gt;split_flag);</div><div class='ctx'> 			dev_kfree_skb_irq(in-&gt;skb);</div><div class='ctx'> 			in-&gt;skb = NULL;</div><div class='ctx'> 			dev-&gt;stats.rx_errors++;</div><div class='hunk'>@@ -262,24 +267,23 @@ static void rx(struct net_device *dev, int bufnum,</div><div class='ctx'> 			in-&gt;lastpacket = in-&gt;numpackets = 0;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (soft-&gt;split_flag &amp; 1) {	/* first packet in split */</div><div class='del'>-			BUGMSG(D_RX, "brand new splitpacket (splitflag=%d)\n",</div><div class='del'>-			       soft-&gt;split_flag);</div><div class='add'>+			arc_printk(D_RX, dev, "brand new splitpacket (splitflag=%d)\n",</div><div class='add'>+				   soft-&gt;split_flag);</div><div class='ctx'> 			if (in-&gt;skb) {	/* already assembling one! */</div><div class='del'>-				BUGMSG(D_EXTRA, "aborting previous (seq=%d) assembly "</div><div class='del'>-				       "(splitflag=%d, seq=%d)\n",</div><div class='del'>-				       in-&gt;sequence, soft-&gt;split_flag,</div><div class='del'>-				       soft-&gt;sequence);</div><div class='add'>+				arc_printk(D_EXTRA, dev, "aborting previous (seq=%d) assembly (splitflag=%d, seq=%d)\n",</div><div class='add'>+					   in-&gt;sequence, soft-&gt;split_flag,</div><div class='add'>+					   soft-&gt;sequence);</div><div class='ctx'> 				dev-&gt;stats.rx_errors++;</div><div class='ctx'> 				dev-&gt;stats.rx_missed_errors++;</div><div class='ctx'> 				dev_kfree_skb_irq(in-&gt;skb);</div><div class='ctx'> 			}</div><div class='ctx'> 			in-&gt;sequence = soft-&gt;sequence;</div><div class='del'>-			in-&gt;numpackets = ((unsigned) soft-&gt;split_flag &gt;&gt; 1) + 2;</div><div class='add'>+			in-&gt;numpackets = ((unsigned)soft-&gt;split_flag &gt;&gt; 1) + 2;</div><div class='ctx'> 			in-&gt;lastpacket = 1;</div><div class='ctx'> </div><div class='ctx'> 			if (in-&gt;numpackets &gt; 16) {</div><div class='del'>-				BUGMSG(D_EXTRA, "incoming packet more than 16 segments; dropping. (splitflag=%d)\n",</div><div class='del'>-				       soft-&gt;split_flag);</div><div class='add'>+				arc_printk(D_EXTRA, dev, "incoming packet more than 16 segments; dropping. (splitflag=%d)\n",</div><div class='add'>+					   soft-&gt;split_flag);</div><div class='ctx'> 				lp-&gt;rfc1201.aborted_seq = soft-&gt;sequence;</div><div class='ctx'> 				dev-&gt;stats.rx_errors++;</div><div class='ctx'> 				dev-&gt;stats.rx_length_errors++;</div><div class='hunk'>@@ -287,14 +291,14 @@ static void rx(struct net_device *dev, int bufnum,</div><div class='ctx'> 			}</div><div class='ctx'> 			in-&gt;skb = skb = alloc_skb(508 * in-&gt;numpackets + ARC_HDR_SIZE,</div><div class='ctx'> 						  GFP_ATOMIC);</div><div class='del'>-			if (skb == NULL) {</div><div class='del'>-				BUGMSG(D_NORMAL, "(split) memory squeeze, dropping packet.\n");</div><div class='add'>+			if (!skb) {</div><div class='add'>+				arc_printk(D_NORMAL, dev, "(split) memory squeeze, dropping packet.\n");</div><div class='ctx'> 				lp-&gt;rfc1201.aborted_seq = soft-&gt;sequence;</div><div class='ctx'> 				dev-&gt;stats.rx_dropped++;</div><div class='ctx'> 				return;</div><div class='ctx'> 			}</div><div class='ctx'> 			skb-&gt;dev = dev;</div><div class='del'>-			pkt = (struct archdr *) skb-&gt;data;</div><div class='add'>+			pkt = (struct archdr *)skb-&gt;data;</div><div class='ctx'> 			soft = &amp;pkt-&gt;soft.rfc1201;</div><div class='ctx'> </div><div class='ctx'> 			memcpy(pkt, pkthdr, ARC_HDR_SIZE + RFC1201_HDR_SIZE);</div><div class='hunk'>@@ -302,37 +306,37 @@ static void rx(struct net_device *dev, int bufnum,</div><div class='ctx'> </div><div class='ctx'> 			soft-&gt;split_flag = 0;	/* end result won't be split */</div><div class='ctx'> 		} else {	/* not first packet */</div><div class='del'>-			int packetnum = ((unsigned) soft-&gt;split_flag &gt;&gt; 1) + 1;</div><div class='add'>+			int packetnum = ((unsigned)soft-&gt;split_flag &gt;&gt; 1) + 1;</div><div class='ctx'> </div><div class='del'>-			/*</div><div class='del'>-			 * if we're not assembling, there's no point trying to</div><div class='add'>+			/* if we're not assembling, there's no point trying to</div><div class='ctx'> 			 * continue.</div><div class='ctx'> 			 */</div><div class='ctx'> 			if (!in-&gt;skb) {</div><div class='ctx'> 				if (lp-&gt;rfc1201.aborted_seq != soft-&gt;sequence) {</div><div class='del'>-					BUGMSG(D_EXTRA, "can't continue split without starting "</div><div class='del'>-					       "first! (splitflag=%d, seq=%d, aborted=%d)\n",</div><div class='del'>-					soft-&gt;split_flag, soft-&gt;sequence,</div><div class='del'>-					       lp-&gt;rfc1201.aborted_seq);</div><div class='add'>+					arc_printk(D_EXTRA, dev, "can't continue split without starting first! (splitflag=%d, seq=%d, aborted=%d)\n",</div><div class='add'>+						   soft-&gt;split_flag,</div><div class='add'>+						   soft-&gt;sequence,</div><div class='add'>+						   lp-&gt;rfc1201.aborted_seq);</div><div class='ctx'> 					dev-&gt;stats.rx_errors++;</div><div class='ctx'> 					dev-&gt;stats.rx_missed_errors++;</div><div class='ctx'> 				}</div><div class='ctx'> 				return;</div><div class='ctx'> 			}</div><div class='ctx'> 			in-&gt;lastpacket++;</div><div class='del'>-			if (packetnum != in-&gt;lastpacket) {	/* not the right flag! */</div><div class='add'>+			/* if not the right flag */</div><div class='add'>+			if (packetnum != in-&gt;lastpacket) {</div><div class='ctx'> 				/* harmless duplicate? ignore. */</div><div class='ctx'> 				if (packetnum &lt;= in-&gt;lastpacket - 1) {</div><div class='del'>-					BUGMSG(D_EXTRA, "duplicate splitpacket ignored! (splitflag=%d)\n",</div><div class='del'>-					       soft-&gt;split_flag);</div><div class='add'>+					arc_printk(D_EXTRA, dev, "duplicate splitpacket ignored! (splitflag=%d)\n",</div><div class='add'>+						   soft-&gt;split_flag);</div><div class='ctx'> 					dev-&gt;stats.rx_errors++;</div><div class='ctx'> 					dev-&gt;stats.rx_frame_errors++;</div><div class='ctx'> 					return;</div><div class='ctx'> 				}</div><div class='ctx'> 				/* "bad" duplicate, kill reassembly */</div><div class='del'>-				BUGMSG(D_EXTRA, "out-of-order splitpacket, reassembly "</div><div class='del'>-				       "(seq=%d) aborted (splitflag=%d, seq=%d)\n",</div><div class='del'>-				       in-&gt;sequence, soft-&gt;split_flag, soft-&gt;sequence);</div><div class='add'>+				arc_printk(D_EXTRA, dev, "out-of-order splitpacket, reassembly (seq=%d) aborted (splitflag=%d, seq=%d)\n",</div><div class='add'>+					   in-&gt;sequence, soft-&gt;split_flag,</div><div class='add'>+					   soft-&gt;sequence);</div><div class='ctx'> 				lp-&gt;rfc1201.aborted_seq = soft-&gt;sequence;</div><div class='ctx'> 				dev_kfree_skb_irq(in-&gt;skb);</div><div class='ctx'> 				in-&gt;skb = NULL;</div><div class='hunk'>@@ -341,7 +345,7 @@ static void rx(struct net_device *dev, int bufnum,</div><div class='ctx'> 				in-&gt;lastpacket = in-&gt;numpackets = 0;</div><div class='ctx'> 				return;</div><div class='ctx'> 			}</div><div class='del'>-			pkt = (struct archdr *) in-&gt;skb-&gt;data;</div><div class='add'>+			pkt = (struct archdr *)in-&gt;skb-&gt;data;</div><div class='ctx'> 			soft = &amp;pkt-&gt;soft.rfc1201;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -357,11 +361,12 @@ static void rx(struct net_device *dev, int bufnum,</div><div class='ctx'> 			in-&gt;skb = NULL;</div><div class='ctx'> 			in-&gt;lastpacket = in-&gt;numpackets = 0;</div><div class='ctx'> </div><div class='del'>-	    BUGMSG(D_SKB_SIZE, "skb: received %d bytes from %02X (unsplit)\n",</div><div class='del'>-    		skb-&gt;len, pkt-&gt;hard.source);</div><div class='del'>-	    BUGMSG(D_SKB_SIZE, "skb: received %d bytes from %02X (split)\n",</div><div class='del'>-    		skb-&gt;len, pkt-&gt;hard.source);</div><div class='del'>-			BUGLVL(D_SKB) arcnet_dump_skb(dev, skb, "rx");</div><div class='add'>+			arc_printk(D_SKB_SIZE, dev, "skb: received %d bytes from %02X (unsplit)\n",</div><div class='add'>+				   skb-&gt;len, pkt-&gt;hard.source);</div><div class='add'>+			arc_printk(D_SKB_SIZE, dev, "skb: received %d bytes from %02X (split)\n",</div><div class='add'>+				   skb-&gt;len, pkt-&gt;hard.source);</div><div class='add'>+			if (BUGLVL(D_SKB))</div><div class='add'>+				arcnet_dump_skb(dev, skb, "rx");</div><div class='ctx'> </div><div class='ctx'> 			skb-&gt;protocol = type_trans(skb, dev);</div><div class='ctx'> 			netif_rx(skb);</div><div class='hunk'>@@ -369,14 +374,13 @@ static void rx(struct net_device *dev, int bufnum,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> /* Create the ARCnet hard/soft headers for RFC1201. */</div><div class='ctx'> static int build_header(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> 			unsigned short type, uint8_t daddr)</div><div class='ctx'> {</div><div class='ctx'> 	struct arcnet_local *lp = netdev_priv(dev);</div><div class='ctx'> 	int hdr_size = ARC_HDR_SIZE + RFC1201_HDR_SIZE;</div><div class='del'>-	struct archdr *pkt = (struct archdr *) skb_push(skb, hdr_size);</div><div class='add'>+	struct archdr *pkt = skb_push(skb, hdr_size);</div><div class='ctx'> 	struct arc_rfc1201 *soft = &amp;pkt-&gt;soft.rfc1201;</div><div class='ctx'> </div><div class='ctx'> 	/* set the protocol ID according to RFC1201 */</div><div class='hunk'>@@ -402,19 +406,18 @@ static int build_header(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> 		soft-&gt;proto = ARC_P_ATALK;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		BUGMSG(D_NORMAL, "RFC1201: I don't understand protocol %d (%Xh)\n",</div><div class='del'>-		       type, type);</div><div class='add'>+		arc_printk(D_NORMAL, dev, "RFC1201: I don't understand protocol %d (%Xh)\n",</div><div class='add'>+			   type, type);</div><div class='ctx'> 		dev-&gt;stats.tx_errors++;</div><div class='ctx'> 		dev-&gt;stats.tx_aborted_errors++;</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Set the source hardware address.</div><div class='add'>+	/* Set the source hardware address.</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * This is pretty pointless for most purposes, but it can help in</div><div class='del'>-	 * debugging.  ARCnet does not allow us to change the source address in</div><div class='del'>-	 * the actual packet sent)</div><div class='add'>+	 * debugging.  ARCnet does not allow us to change the source address</div><div class='add'>+	 * in the actual packet sent.</div><div class='ctx'> 	 */</div><div class='ctx'> 	pkt-&gt;hard.source = *dev-&gt;dev_addr;</div><div class='ctx'> </div><div class='hunk'>@@ -424,10 +427,10 @@ static int build_header(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> 	/* see linux/net/ethernet/eth.c to see where I got the following */</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;flags &amp; (IFF_LOOPBACK | IFF_NOARP)) {</div><div class='del'>-		/* </div><div class='del'>-		 * FIXME: fill in the last byte of the dest ipaddr here to better</div><div class='del'>-		 * comply with RFC1051 in "noarp" mode.  For now, always broadcasting</div><div class='del'>-		 * will probably at least get packets sent out :)</div><div class='add'>+		/* FIXME: fill in the last byte of the dest ipaddr here</div><div class='add'>+		 * to better comply with RFC1051 in "noarp" mode.</div><div class='add'>+		 * For now, always broadcasting will probably at least get</div><div class='add'>+		 * packets sent out :)</div><div class='ctx'> 		 */</div><div class='ctx'> 		pkt-&gt;hard.dest = 0;</div><div class='ctx'> 		return hdr_size;</div><div class='hunk'>@@ -437,7 +440,6 @@ static int build_header(struct sk_buff *skb, struct net_device *dev,</div><div class='ctx'> 	return hdr_size;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> static void load_pkt(struct net_device *dev, struct arc_hardware *hard,</div><div class='ctx'> 		     struct arc_rfc1201 *soft, int softlen, int bufnum)</div><div class='ctx'> {</div><div class='hunk'>@@ -461,8 +463,9 @@ static void load_pkt(struct net_device *dev, struct arc_hardware *hard,</div><div class='ctx'> 		hard-&gt;offset[1] = ofs - RFC1201_HDR_SIZE;</div><div class='ctx'> 		lp-&gt;hw.copy_to_card(dev, bufnum, ofs - RFC1201_HDR_SIZE,</div><div class='ctx'> 				    &amp;excsoft, RFC1201_HDR_SIZE);</div><div class='del'>-	} else</div><div class='add'>+	} else {</div><div class='ctx'> 		hard-&gt;offset[0] = ofs = 256 - softlen;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	lp-&gt;hw.copy_to_card(dev, bufnum, 0, hard, ARC_HDR_SIZE);</div><div class='ctx'> 	lp-&gt;hw.copy_to_card(dev, bufnum, ofs, soft, softlen);</div><div class='hunk'>@@ -470,7 +473,6 @@ static void load_pkt(struct net_device *dev, struct arc_hardware *hard,</div><div class='ctx'> 	lp-&gt;lastload_dest = hard-&gt;dest;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> static int prepare_tx(struct net_device *dev, struct archdr *pkt, int length,</div><div class='ctx'> 		      int bufnum)</div><div class='ctx'> {</div><div class='hunk'>@@ -478,11 +480,11 @@ static int prepare_tx(struct net_device *dev, struct archdr *pkt, int length,</div><div class='ctx'> 	const int maxsegsize = XMTU - RFC1201_HDR_SIZE;</div><div class='ctx'> 	struct Outgoing *out;</div><div class='ctx'> </div><div class='add'>+	arc_printk(D_DURING, dev, "prepare_tx: txbufs=%d/%d/%d\n",</div><div class='add'>+		   lp-&gt;next_tx, lp-&gt;cur_tx, bufnum);</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_DURING, "prepare_tx: txbufs=%d/%d/%d\n",</div><div class='del'>-	       lp-&gt;next_tx, lp-&gt;cur_tx, bufnum);</div><div class='del'>-</div><div class='del'>-	length -= ARC_HDR_SIZE;	/* hard header is not included in packet length */</div><div class='add'>+	/* hard header is not included in packet length */</div><div class='add'>+	length -= ARC_HDR_SIZE;</div><div class='ctx'> 	pkt-&gt;soft.rfc1201.split_flag = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* need to do a split packet? */</div><div class='hunk'>@@ -494,9 +496,9 @@ static int prepare_tx(struct net_device *dev, struct archdr *pkt, int length,</div><div class='ctx'> 		out-&gt;numsegs = (out-&gt;dataleft + maxsegsize - 1) / maxsegsize;</div><div class='ctx'> 		out-&gt;segnum = 0;</div><div class='ctx'> </div><div class='del'>-		BUGMSG(D_DURING, "rfc1201 prep_tx: ready for %d-segment split "</div><div class='del'>-		       "(%d bytes, seq=%d)\n", out-&gt;numsegs, out-&gt;length,</div><div class='del'>-		       pkt-&gt;soft.rfc1201.sequence);</div><div class='add'>+		arc_printk(D_DURING, dev, "rfc1201 prep_tx: ready for %d-segment split (%d bytes, seq=%d)\n",</div><div class='add'>+			   out-&gt;numsegs, out-&gt;length,</div><div class='add'>+			   pkt-&gt;soft.rfc1201.sequence);</div><div class='ctx'> </div><div class='ctx'> 		return 0;	/* not done */</div><div class='ctx'> 	}</div><div class='hunk'>@@ -506,7 +508,6 @@ static int prepare_tx(struct net_device *dev, struct archdr *pkt, int length,</div><div class='ctx'> 	return 1;		/* done */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> static int continue_tx(struct net_device *dev, int bufnum)</div><div class='ctx'> {</div><div class='ctx'> 	struct arcnet_local *lp = netdev_priv(dev);</div><div class='hunk'>@@ -516,9 +517,9 @@ static int continue_tx(struct net_device *dev, int bufnum)</div><div class='ctx'> 	int maxsegsize = XMTU - RFC1201_HDR_SIZE;</div><div class='ctx'> 	int seglen;</div><div class='ctx'> </div><div class='del'>-	BUGMSG(D_DURING,</div><div class='del'>-	  "rfc1201 continue_tx: loading segment %d(+1) of %d (seq=%d)\n",</div><div class='del'>-	       out-&gt;segnum, out-&gt;numsegs, soft-&gt;sequence);</div><div class='add'>+	arc_printk(D_DURING, dev,</div><div class='add'>+		   "rfc1201 continue_tx: loading segment %d(+1) of %d (seq=%d)\n",</div><div class='add'>+		   out-&gt;segnum, out-&gt;numsegs, soft-&gt;sequence);</div><div class='ctx'> </div><div class='ctx'> 	/* the "new" soft header comes right before the data chunk */</div><div class='ctx'> 	newsoft = (struct arc_rfc1201 *)</div><div class='head'>diff --git a/drivers/net/bareudp.c b/drivers/net/bareudp.c<br/>new file mode 100644<br/>index 000000000000..0df3208783ad<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/bareudp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/bareudp.c</a></div><div class='hunk'>@@ -0,0 +1,828 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Bareudp: UDP  tunnel encasulation for different Payload types like</div><div class='add'>+ * MPLS, NSH, IP, etc.</div><div class='add'>+ * Copyright (c) 2019 Nokia, Inc.</div><div class='add'>+ * Authors:  Martin Varghese, &lt;martin.varghese@nokia.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/hash.h&gt;</div><div class='add'>+#include &lt;net/dst_metadata.h&gt;</div><div class='add'>+#include &lt;net/gro_cells.h&gt;</div><div class='add'>+#include &lt;net/rtnetlink.h&gt;</div><div class='add'>+#include &lt;net/protocol.h&gt;</div><div class='add'>+#include &lt;net/ip6_tunnel.h&gt;</div><div class='add'>+#include &lt;net/ip_tunnels.h&gt;</div><div class='add'>+#include &lt;net/udp_tunnel.h&gt;</div><div class='add'>+#include &lt;net/bareudp.h&gt;</div><div class='add'>+</div><div class='add'>+#define BAREUDP_BASE_HLEN sizeof(struct udphdr)</div><div class='add'>+#define BAREUDP_IPV4_HLEN (sizeof(struct iphdr) + \</div><div class='add'>+			   sizeof(struct udphdr))</div><div class='add'>+#define BAREUDP_IPV6_HLEN (sizeof(struct ipv6hdr) + \</div><div class='add'>+			   sizeof(struct udphdr))</div><div class='add'>+</div><div class='add'>+static bool log_ecn_error = true;</div><div class='add'>+module_param(log_ecn_error, bool, 0644);</div><div class='add'>+MODULE_PARM_DESC(log_ecn_error, "Log packets received with corrupted ECN");</div><div class='add'>+</div><div class='add'>+/* per-network namespace private data for this module */</div><div class='add'>+</div><div class='add'>+static unsigned int bareudp_net_id;</div><div class='add'>+</div><div class='add'>+struct bareudp_net {</div><div class='add'>+	struct list_head        bareudp_list;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct bareudp_conf {</div><div class='add'>+	__be16 ethertype;</div><div class='add'>+	__be16 port;</div><div class='add'>+	u16 sport_min;</div><div class='add'>+	bool multi_proto_mode;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Pseudo network device */</div><div class='add'>+struct bareudp_dev {</div><div class='add'>+	struct net         *net;        /* netns for packet i/o */</div><div class='add'>+	struct net_device  *dev;        /* netdev for bareudp tunnel */</div><div class='add'>+	__be16		   ethertype;</div><div class='add'>+	__be16             port;</div><div class='add'>+	u16	           sport_min;</div><div class='add'>+	bool               multi_proto_mode;</div><div class='add'>+	struct socket      __rcu *sock;</div><div class='add'>+	struct list_head   next;        /* bareudp node  on namespace list */</div><div class='add'>+	struct gro_cells   gro_cells;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int bareudp_udp_encap_recv(struct sock *sk, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct metadata_dst *tun_dst = NULL;</div><div class='add'>+	IP_TUNNEL_DECLARE_FLAGS(key) = { };</div><div class='add'>+	struct bareudp_dev *bareudp;</div><div class='add'>+	unsigned short family;</div><div class='add'>+	unsigned int len;</div><div class='add'>+	__be16 proto;</div><div class='add'>+	void *oiph;</div><div class='add'>+	int err;</div><div class='add'>+	int nh;</div><div class='add'>+</div><div class='add'>+	bareudp = rcu_dereference_sk_user_data(sk);</div><div class='add'>+	if (!bareudp)</div><div class='add'>+		goto drop;</div><div class='add'>+</div><div class='add'>+	if (skb-&gt;protocol ==  htons(ETH_P_IP))</div><div class='add'>+		family = AF_INET;</div><div class='add'>+	else</div><div class='add'>+		family = AF_INET6;</div><div class='add'>+</div><div class='add'>+	if (bareudp-&gt;ethertype == htons(ETH_P_IP)) {</div><div class='add'>+		__u8 ipversion;</div><div class='add'>+</div><div class='add'>+		if (skb_copy_bits(skb, BAREUDP_BASE_HLEN, &amp;ipversion,</div><div class='add'>+				  sizeof(ipversion))) {</div><div class='add'>+			dev_dstats_rx_dropped(bareudp-&gt;dev);</div><div class='add'>+			goto drop;</div><div class='add'>+		}</div><div class='add'>+		ipversion &gt;&gt;= 4;</div><div class='add'>+</div><div class='add'>+		if (ipversion == 4) {</div><div class='add'>+			proto = htons(ETH_P_IP);</div><div class='add'>+		} else if (ipversion == 6 &amp;&amp; bareudp-&gt;multi_proto_mode) {</div><div class='add'>+			proto = htons(ETH_P_IPV6);</div><div class='add'>+		} else {</div><div class='add'>+			dev_dstats_rx_dropped(bareudp-&gt;dev);</div><div class='add'>+			goto drop;</div><div class='add'>+		}</div><div class='add'>+	} else if (bareudp-&gt;ethertype == htons(ETH_P_MPLS_UC)) {</div><div class='add'>+		struct iphdr *tunnel_hdr;</div><div class='add'>+</div><div class='add'>+		tunnel_hdr = (struct iphdr *)skb_network_header(skb);</div><div class='add'>+		if (tunnel_hdr-&gt;version == 4) {</div><div class='add'>+			if (!ipv4_is_multicast(tunnel_hdr-&gt;daddr)) {</div><div class='add'>+				proto = bareudp-&gt;ethertype;</div><div class='add'>+			} else if (bareudp-&gt;multi_proto_mode &amp;&amp;</div><div class='add'>+				   ipv4_is_multicast(tunnel_hdr-&gt;daddr)) {</div><div class='add'>+				proto = htons(ETH_P_MPLS_MC);</div><div class='add'>+			} else {</div><div class='add'>+				dev_dstats_rx_dropped(bareudp-&gt;dev);</div><div class='add'>+				goto drop;</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			int addr_type;</div><div class='add'>+			struct ipv6hdr *tunnel_hdr_v6;</div><div class='add'>+</div><div class='add'>+			tunnel_hdr_v6 = (struct ipv6hdr *)skb_network_header(skb);</div><div class='add'>+			addr_type =</div><div class='add'>+			ipv6_addr_type((struct in6_addr *)&amp;tunnel_hdr_v6-&gt;daddr);</div><div class='add'>+			if (!(addr_type &amp; IPV6_ADDR_MULTICAST)) {</div><div class='add'>+				proto = bareudp-&gt;ethertype;</div><div class='add'>+			} else if (bareudp-&gt;multi_proto_mode &amp;&amp;</div><div class='add'>+				   (addr_type &amp; IPV6_ADDR_MULTICAST)) {</div><div class='add'>+				proto = htons(ETH_P_MPLS_MC);</div><div class='add'>+			} else {</div><div class='add'>+				dev_dstats_rx_dropped(bareudp-&gt;dev);</div><div class='add'>+				goto drop;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		proto = bareudp-&gt;ethertype;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (iptunnel_pull_header(skb, BAREUDP_BASE_HLEN,</div><div class='add'>+				 proto,</div><div class='add'>+				 !net_eq(bareudp-&gt;net,</div><div class='add'>+				 dev_net(bareudp-&gt;dev)))) {</div><div class='add'>+		dev_dstats_rx_dropped(bareudp-&gt;dev);</div><div class='add'>+		goto drop;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	__set_bit(IP_TUNNEL_KEY_BIT, key);</div><div class='add'>+</div><div class='add'>+	tun_dst = udp_tun_rx_dst(skb, family, key, 0, 0);</div><div class='add'>+	if (!tun_dst) {</div><div class='add'>+		dev_dstats_rx_dropped(bareudp-&gt;dev);</div><div class='add'>+		goto drop;</div><div class='add'>+	}</div><div class='add'>+	skb_dst_set(skb, &amp;tun_dst-&gt;dst);</div><div class='add'>+	skb-&gt;dev = bareudp-&gt;dev;</div><div class='add'>+	skb_reset_mac_header(skb);</div><div class='add'>+</div><div class='add'>+	/* Save offset of outer header relative to skb-&gt;head,</div><div class='add'>+	 * because we are going to reset the network header to the inner header</div><div class='add'>+	 * and might change skb-&gt;head.</div><div class='add'>+	 */</div><div class='add'>+	nh = skb_network_header(skb) - skb-&gt;head;</div><div class='add'>+</div><div class='add'>+	skb_reset_network_header(skb);</div><div class='add'>+</div><div class='add'>+	if (!pskb_inet_may_pull(skb)) {</div><div class='add'>+		DEV_STATS_INC(bareudp-&gt;dev, rx_length_errors);</div><div class='add'>+		DEV_STATS_INC(bareudp-&gt;dev, rx_errors);</div><div class='add'>+		goto drop;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Get the outer header. */</div><div class='add'>+	oiph = skb-&gt;head + nh;</div><div class='add'>+</div><div class='add'>+	if (!ipv6_mod_enabled() || family == AF_INET)</div><div class='add'>+		err = IP_ECN_decapsulate(oiph, skb);</div><div class='add'>+	else</div><div class='add'>+		err = IP6_ECN_decapsulate(oiph, skb);</div><div class='add'>+</div><div class='add'>+	if (unlikely(err)) {</div><div class='add'>+		if (log_ecn_error) {</div><div class='add'>+			if  (!ipv6_mod_enabled() || family == AF_INET)</div><div class='add'>+				net_info_ratelimited("non-ECT from %pI4 "</div><div class='add'>+						     "with TOS=%#x\n",</div><div class='add'>+						     &amp;((struct iphdr *)oiph)-&gt;saddr,</div><div class='add'>+						     ((struct iphdr *)oiph)-&gt;tos);</div><div class='add'>+			else</div><div class='add'>+				net_info_ratelimited("non-ECT from %pI6\n",</div><div class='add'>+						     &amp;((struct ipv6hdr *)oiph)-&gt;saddr);</div><div class='add'>+		}</div><div class='add'>+		if (err &gt; 1) {</div><div class='add'>+			DEV_STATS_INC(bareudp-&gt;dev, rx_frame_errors);</div><div class='add'>+			DEV_STATS_INC(bareudp-&gt;dev, rx_errors);</div><div class='add'>+			goto drop;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	len = skb-&gt;len;</div><div class='add'>+	err = gro_cells_receive(&amp;bareudp-&gt;gro_cells, skb);</div><div class='add'>+	if (likely(err == NET_RX_SUCCESS))</div><div class='add'>+		dev_dstats_rx_add(bareudp-&gt;dev, len);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+drop:</div><div class='add'>+	/* Consume bad packet */</div><div class='add'>+	kfree_skb(skb);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bareudp_err_lookup(struct sock *sk, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bareudp_init(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct bareudp_dev *bareudp = netdev_priv(dev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = gro_cells_init(&amp;bareudp-&gt;gro_cells, dev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bareudp_uninit(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct bareudp_dev *bareudp = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	gro_cells_destroy(&amp;bareudp-&gt;gro_cells);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct socket *bareudp_create_sock(struct net *net, __be16 port)</div><div class='add'>+{</div><div class='add'>+	struct udp_port_cfg udp_conf;</div><div class='add'>+	struct socket *sock;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	memset(&amp;udp_conf, 0, sizeof(udp_conf));</div><div class='add'>+</div><div class='add'>+	if (ipv6_mod_enabled())</div><div class='add'>+		udp_conf.family = AF_INET6;</div><div class='add'>+	else</div><div class='add'>+		udp_conf.family = AF_INET;</div><div class='add'>+</div><div class='add'>+	udp_conf.local_udp_port = port;</div><div class='add'>+	/* Open UDP socket */</div><div class='add'>+	err = udp_sock_create(net, &amp;udp_conf, &amp;sock);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		return ERR_PTR(err);</div><div class='add'>+</div><div class='add'>+	udp_allow_gso(sock-&gt;sk);</div><div class='add'>+	return sock;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Create new listen socket if needed */</div><div class='add'>+static int bareudp_socket_create(struct bareudp_dev *bareudp, __be16 port)</div><div class='add'>+{</div><div class='add'>+	struct udp_tunnel_sock_cfg tunnel_cfg;</div><div class='add'>+	struct socket *sock;</div><div class='add'>+</div><div class='add'>+	sock = bareudp_create_sock(bareudp-&gt;net, port);</div><div class='add'>+	if (IS_ERR(sock))</div><div class='add'>+		return PTR_ERR(sock);</div><div class='add'>+</div><div class='add'>+	/* Mark socket as an encapsulation socket */</div><div class='add'>+	memset(&amp;tunnel_cfg, 0, sizeof(tunnel_cfg));</div><div class='add'>+	tunnel_cfg.sk_user_data = bareudp;</div><div class='add'>+	tunnel_cfg.encap_type = 1;</div><div class='add'>+	tunnel_cfg.encap_rcv = bareudp_udp_encap_recv;</div><div class='add'>+	tunnel_cfg.encap_err_lookup = bareudp_err_lookup;</div><div class='add'>+	tunnel_cfg.encap_destroy = NULL;</div><div class='add'>+	setup_udp_tunnel_sock(bareudp-&gt;net, sock, &amp;tunnel_cfg);</div><div class='add'>+</div><div class='add'>+	rcu_assign_pointer(bareudp-&gt;sock, sock);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bareudp_open(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct bareudp_dev *bareudp = netdev_priv(dev);</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	ret =  bareudp_socket_create(bareudp, bareudp-&gt;port);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bareudp_sock_release(struct bareudp_dev *bareudp)</div><div class='add'>+{</div><div class='add'>+	struct socket *sock;</div><div class='add'>+</div><div class='add'>+	sock = bareudp-&gt;sock;</div><div class='add'>+	rcu_assign_pointer(bareudp-&gt;sock, NULL);</div><div class='add'>+	synchronize_net();</div><div class='add'>+	udp_tunnel_sock_release(sock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bareudp_stop(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct bareudp_dev *bareudp = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	bareudp_sock_release(bareudp);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bareudp_xmit_skb(struct sk_buff *skb, struct net_device *dev,</div><div class='add'>+			    struct bareudp_dev *bareudp,</div><div class='add'>+			    const struct ip_tunnel_info *info)</div><div class='add'>+{</div><div class='add'>+	bool udp_sum = test_bit(IP_TUNNEL_CSUM_BIT, info-&gt;key.tun_flags);</div><div class='add'>+	bool xnet = !net_eq(bareudp-&gt;net, dev_net(bareudp-&gt;dev));</div><div class='add'>+	bool use_cache = ip_tunnel_dst_cache_usable(skb, info);</div><div class='add'>+	struct socket *sock = rcu_dereference(bareudp-&gt;sock);</div><div class='add'>+	const struct ip_tunnel_key *key = &amp;info-&gt;key;</div><div class='add'>+	struct rtable *rt;</div><div class='add'>+	__be16 sport, df;</div><div class='add'>+	int min_headroom;</div><div class='add'>+	__u8 tos, ttl;</div><div class='add'>+	__be32 saddr;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (skb_vlan_inet_prepare(skb, skb-&gt;protocol != htons(ETH_P_TEB)))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!sock)</div><div class='add'>+		return -ESHUTDOWN;</div><div class='add'>+</div><div class='add'>+	sport = udp_flow_src_port(bareudp-&gt;net, skb,</div><div class='add'>+				  bareudp-&gt;sport_min, USHRT_MAX,</div><div class='add'>+				  true);</div><div class='add'>+	rt = udp_tunnel_dst_lookup(skb, dev, bareudp-&gt;net, 0, &amp;saddr, &amp;info-&gt;key,</div><div class='add'>+				   sport, bareudp-&gt;port, key-&gt;tos,</div><div class='add'>+				   use_cache ?</div><div class='add'>+				   (struct dst_cache *)&amp;info-&gt;dst_cache : NULL);</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(rt))</div><div class='add'>+		return PTR_ERR(rt);</div><div class='add'>+</div><div class='add'>+	skb_tunnel_check_pmtu(skb, &amp;rt-&gt;dst,</div><div class='add'>+			      BAREUDP_IPV4_HLEN + info-&gt;options_len, false);</div><div class='add'>+</div><div class='add'>+	tos = ip_tunnel_ecn_encap(key-&gt;tos, ip_hdr(skb), skb);</div><div class='add'>+	ttl = key-&gt;ttl;</div><div class='add'>+	df = test_bit(IP_TUNNEL_DONT_FRAGMENT_BIT, key-&gt;tun_flags) ?</div><div class='add'>+	     htons(IP_DF) : 0;</div><div class='add'>+	skb_scrub_packet(skb, xnet);</div><div class='add'>+</div><div class='add'>+	err = -ENOSPC;</div><div class='add'>+	if (!skb_pull(skb, skb_network_offset(skb)))</div><div class='add'>+		goto free_dst;</div><div class='add'>+</div><div class='add'>+	min_headroom = LL_RESERVED_SPACE(rt-&gt;dst.dev) + rt-&gt;dst.header_len +</div><div class='add'>+		BAREUDP_BASE_HLEN + info-&gt;options_len + sizeof(struct iphdr);</div><div class='add'>+</div><div class='add'>+	err = skb_cow_head(skb, min_headroom);</div><div class='add'>+	if (unlikely(err))</div><div class='add'>+		goto free_dst;</div><div class='add'>+</div><div class='add'>+	err = udp_tunnel_handle_offloads(skb, udp_sum);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_dst;</div><div class='add'>+</div><div class='add'>+	skb_set_inner_protocol(skb, bareudp-&gt;ethertype);</div><div class='add'>+	udp_tunnel_xmit_skb(rt, sock-&gt;sk, skb, saddr, info-&gt;key.u.ipv4.dst,</div><div class='add'>+			    tos, ttl, df, sport, bareudp-&gt;port,</div><div class='add'>+			    !net_eq(bareudp-&gt;net, dev_net(bareudp-&gt;dev)),</div><div class='add'>+			    !test_bit(IP_TUNNEL_CSUM_BIT, info-&gt;key.tun_flags),</div><div class='add'>+			    0);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+free_dst:</div><div class='add'>+	dst_release(&amp;rt-&gt;dst);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bareudp6_xmit_skb(struct sk_buff *skb, struct net_device *dev,</div><div class='add'>+			     struct bareudp_dev *bareudp,</div><div class='add'>+			     const struct ip_tunnel_info *info)</div><div class='add'>+{</div><div class='add'>+	bool udp_sum = test_bit(IP_TUNNEL_CSUM_BIT, info-&gt;key.tun_flags);</div><div class='add'>+	bool xnet = !net_eq(bareudp-&gt;net, dev_net(bareudp-&gt;dev));</div><div class='add'>+	bool use_cache = ip_tunnel_dst_cache_usable(skb, info);</div><div class='add'>+	struct socket *sock  = rcu_dereference(bareudp-&gt;sock);</div><div class='add'>+	const struct ip_tunnel_key *key = &amp;info-&gt;key;</div><div class='add'>+	struct dst_entry *dst = NULL;</div><div class='add'>+	struct in6_addr saddr, daddr;</div><div class='add'>+	int min_headroom;</div><div class='add'>+	__u8 prio, ttl;</div><div class='add'>+	__be16 sport;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (skb_vlan_inet_prepare(skb, skb-&gt;protocol != htons(ETH_P_TEB)))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!sock)</div><div class='add'>+		return -ESHUTDOWN;</div><div class='add'>+</div><div class='add'>+	sport = udp_flow_src_port(bareudp-&gt;net, skb,</div><div class='add'>+				  bareudp-&gt;sport_min, USHRT_MAX,</div><div class='add'>+				  true);</div><div class='add'>+	dst = udp_tunnel6_dst_lookup(skb, dev, bareudp-&gt;net, sock, 0, &amp;saddr,</div><div class='add'>+				     key, sport, bareudp-&gt;port, key-&gt;tos,</div><div class='add'>+				     use_cache ?</div><div class='add'>+				     (struct dst_cache *) &amp;info-&gt;dst_cache : NULL);</div><div class='add'>+	if (IS_ERR(dst))</div><div class='add'>+		return PTR_ERR(dst);</div><div class='add'>+</div><div class='add'>+	skb_tunnel_check_pmtu(skb, dst, BAREUDP_IPV6_HLEN + info-&gt;options_len,</div><div class='add'>+			      false);</div><div class='add'>+</div><div class='add'>+	prio = ip_tunnel_ecn_encap(key-&gt;tos, ip_hdr(skb), skb);</div><div class='add'>+	ttl = key-&gt;ttl;</div><div class='add'>+</div><div class='add'>+	skb_scrub_packet(skb, xnet);</div><div class='add'>+</div><div class='add'>+	err = -ENOSPC;</div><div class='add'>+	if (!skb_pull(skb, skb_network_offset(skb)))</div><div class='add'>+		goto free_dst;</div><div class='add'>+</div><div class='add'>+	min_headroom = LL_RESERVED_SPACE(dst-&gt;dev) + dst-&gt;header_len +</div><div class='add'>+		BAREUDP_BASE_HLEN + info-&gt;options_len + sizeof(struct ipv6hdr);</div><div class='add'>+</div><div class='add'>+	err = skb_cow_head(skb, min_headroom);</div><div class='add'>+	if (unlikely(err))</div><div class='add'>+		goto free_dst;</div><div class='add'>+</div><div class='add'>+	err = udp_tunnel_handle_offloads(skb, udp_sum);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_dst;</div><div class='add'>+</div><div class='add'>+	daddr = info-&gt;key.u.ipv6.dst;</div><div class='add'>+	udp_tunnel6_xmit_skb(dst, sock-&gt;sk, skb, dev,</div><div class='add'>+			     &amp;saddr, &amp;daddr, prio, ttl,</div><div class='add'>+			     info-&gt;key.label, sport, bareudp-&gt;port,</div><div class='add'>+			     !test_bit(IP_TUNNEL_CSUM_BIT,</div><div class='add'>+				       info-&gt;key.tun_flags),</div><div class='add'>+			     0);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+free_dst:</div><div class='add'>+	dst_release(dst);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool bareudp_proto_valid(struct bareudp_dev *bareudp, __be16 proto)</div><div class='add'>+{</div><div class='add'>+	if (bareudp-&gt;ethertype == proto)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	if (!bareudp-&gt;multi_proto_mode)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (bareudp-&gt;ethertype == htons(ETH_P_MPLS_UC) &amp;&amp;</div><div class='add'>+	    proto == htons(ETH_P_MPLS_MC))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	if (bareudp-&gt;ethertype == htons(ETH_P_IP) &amp;&amp;</div><div class='add'>+	    proto == htons(ETH_P_IPV6))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static netdev_tx_t bareudp_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct bareudp_dev *bareudp = netdev_priv(dev);</div><div class='add'>+	struct ip_tunnel_info *info = NULL;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!bareudp_proto_valid(bareudp, skb-&gt;protocol)) {</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto tx_error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	info = skb_tunnel_info(skb);</div><div class='add'>+	if (unlikely(!info || !(info-&gt;mode &amp; IP_TUNNEL_INFO_TX))) {</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto tx_error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	if (ipv6_mod_enabled() &amp;&amp; info-&gt;mode &amp; IP_TUNNEL_INFO_IPV6)</div><div class='add'>+		err = bareudp6_xmit_skb(skb, dev, bareudp, info);</div><div class='add'>+	else</div><div class='add'>+		err = bareudp_xmit_skb(skb, dev, bareudp, info);</div><div class='add'>+</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+	if (likely(!err))</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+tx_error:</div><div class='add'>+	dev_kfree_skb(skb);</div><div class='add'>+</div><div class='add'>+	if (err == -ELOOP)</div><div class='add'>+		DEV_STATS_INC(dev, collisions);</div><div class='add'>+	else if (err == -ENETUNREACH)</div><div class='add'>+		DEV_STATS_INC(dev, tx_carrier_errors);</div><div class='add'>+</div><div class='add'>+	DEV_STATS_INC(dev, tx_errors);</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bareudp_fill_metadata_dst(struct net_device *dev,</div><div class='add'>+				     struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct ip_tunnel_info *info = skb_tunnel_info(skb);</div><div class='add'>+	struct bareudp_dev *bareudp = netdev_priv(dev);</div><div class='add'>+	bool use_cache;</div><div class='add'>+	__be16 sport;</div><div class='add'>+</div><div class='add'>+	use_cache = ip_tunnel_dst_cache_usable(skb, info);</div><div class='add'>+	sport = udp_flow_src_port(bareudp-&gt;net, skb,</div><div class='add'>+				  bareudp-&gt;sport_min, USHRT_MAX,</div><div class='add'>+				  true);</div><div class='add'>+</div><div class='add'>+	if (!ipv6_mod_enabled() || ip_tunnel_info_af(info) == AF_INET) {</div><div class='add'>+		struct rtable *rt;</div><div class='add'>+		__be32 saddr;</div><div class='add'>+</div><div class='add'>+		rt = udp_tunnel_dst_lookup(skb, dev, bareudp-&gt;net, 0, &amp;saddr,</div><div class='add'>+					   &amp;info-&gt;key, sport, bareudp-&gt;port,</div><div class='add'>+					   info-&gt;key.tos,</div><div class='add'>+					   use_cache ? &amp;info-&gt;dst_cache : NULL);</div><div class='add'>+		if (IS_ERR(rt))</div><div class='add'>+			return PTR_ERR(rt);</div><div class='add'>+</div><div class='add'>+		ip_rt_put(rt);</div><div class='add'>+		info-&gt;key.u.ipv4.src = saddr;</div><div class='add'>+	} else if (ip_tunnel_info_af(info) == AF_INET6) {</div><div class='add'>+		struct dst_entry *dst;</div><div class='add'>+		struct in6_addr saddr;</div><div class='add'>+		struct socket *sock = rcu_dereference(bareudp-&gt;sock);</div><div class='add'>+</div><div class='add'>+		dst = udp_tunnel6_dst_lookup(skb, dev, bareudp-&gt;net, sock,</div><div class='add'>+					     0, &amp;saddr, &amp;info-&gt;key,</div><div class='add'>+					     sport, bareudp-&gt;port, info-&gt;key.tos,</div><div class='add'>+					     use_cache ? &amp;info-&gt;dst_cache : NULL);</div><div class='add'>+		if (IS_ERR(dst))</div><div class='add'>+			return PTR_ERR(dst);</div><div class='add'>+</div><div class='add'>+		dst_release(dst);</div><div class='add'>+		info-&gt;key.u.ipv6.src = saddr;</div><div class='add'>+	} else {</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	info-&gt;key.tp_src = sport;</div><div class='add'>+	info-&gt;key.tp_dst = bareudp-&gt;port;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops bareudp_netdev_ops = {</div><div class='add'>+	.ndo_init               = bareudp_init,</div><div class='add'>+	.ndo_uninit             = bareudp_uninit,</div><div class='add'>+	.ndo_open               = bareudp_open,</div><div class='add'>+	.ndo_stop               = bareudp_stop,</div><div class='add'>+	.ndo_start_xmit         = bareudp_xmit,</div><div class='add'>+	.ndo_fill_metadata_dst  = bareudp_fill_metadata_dst,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct nla_policy bareudp_policy[IFLA_BAREUDP_MAX + 1] = {</div><div class='add'>+	[IFLA_BAREUDP_PORT]                = { .type = NLA_U16 },</div><div class='add'>+	[IFLA_BAREUDP_ETHERTYPE]	   = { .type = NLA_U16 },</div><div class='add'>+	[IFLA_BAREUDP_SRCPORT_MIN]         = { .type = NLA_U16 },</div><div class='add'>+	[IFLA_BAREUDP_MULTIPROTO_MODE]     = { .type = NLA_FLAG },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Info for udev, that this is a virtual tunnel endpoint */</div><div class='add'>+static const struct device_type bareudp_type = {</div><div class='add'>+	.name = "bareudp",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Initialize the device structure. */</div><div class='add'>+static void bareudp_setup(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	dev-&gt;netdev_ops = &amp;bareudp_netdev_ops;</div><div class='add'>+	dev-&gt;needs_free_netdev = true;</div><div class='add'>+	SET_NETDEV_DEVTYPE(dev, &amp;bareudp_type);</div><div class='add'>+	dev-&gt;features    |= NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_FRAGLIST;</div><div class='add'>+	dev-&gt;features    |= NETIF_F_RXCSUM;</div><div class='add'>+	dev-&gt;features    |= NETIF_F_GSO_SOFTWARE;</div><div class='add'>+	dev-&gt;hw_features |= NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_FRAGLIST;</div><div class='add'>+	dev-&gt;hw_features |= NETIF_F_RXCSUM;</div><div class='add'>+	dev-&gt;hw_features |= NETIF_F_GSO_SOFTWARE;</div><div class='add'>+	dev-&gt;hard_header_len = 0;</div><div class='add'>+	dev-&gt;addr_len = 0;</div><div class='add'>+	dev-&gt;mtu = ETH_DATA_LEN;</div><div class='add'>+	dev-&gt;min_mtu = IPV4_MIN_MTU;</div><div class='add'>+	dev-&gt;max_mtu = IP_MAX_MTU - BAREUDP_BASE_HLEN;</div><div class='add'>+	dev-&gt;type = ARPHRD_NONE;</div><div class='add'>+	netif_keep_dst(dev);</div><div class='add'>+	dev-&gt;priv_flags |= IFF_NO_QUEUE;</div><div class='add'>+	dev-&gt;lltx = true;</div><div class='add'>+	dev-&gt;flags = IFF_POINTOPOINT | IFF_NOARP | IFF_MULTICAST;</div><div class='add'>+	dev-&gt;pcpu_stat_type = NETDEV_PCPU_STAT_DSTATS;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bareudp_validate(struct nlattr *tb[], struct nlattr *data[],</div><div class='add'>+			    struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	if (!data) {</div><div class='add'>+		NL_SET_ERR_MSG(extack,</div><div class='add'>+			       "Not enough attributes provided to perform the operation");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bareudp2info(struct nlattr *data[], struct bareudp_conf *conf,</div><div class='add'>+			struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	memset(conf, 0, sizeof(*conf));</div><div class='add'>+</div><div class='add'>+	if (!data[IFLA_BAREUDP_PORT]) {</div><div class='add'>+		NL_SET_ERR_MSG(extack, "port not specified");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (!data[IFLA_BAREUDP_ETHERTYPE]) {</div><div class='add'>+		NL_SET_ERR_MSG(extack, "ethertype not specified");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	conf-&gt;port = nla_get_u16(data[IFLA_BAREUDP_PORT]);</div><div class='add'>+	conf-&gt;ethertype = nla_get_u16(data[IFLA_BAREUDP_ETHERTYPE]);</div><div class='add'>+</div><div class='add'>+	if (data[IFLA_BAREUDP_SRCPORT_MIN])</div><div class='add'>+		conf-&gt;sport_min =  nla_get_u16(data[IFLA_BAREUDP_SRCPORT_MIN]);</div><div class='add'>+</div><div class='add'>+	if (data[IFLA_BAREUDP_MULTIPROTO_MODE])</div><div class='add'>+		conf-&gt;multi_proto_mode = true;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct bareudp_dev *bareudp_find_dev(struct bareudp_net *bn,</div><div class='add'>+					    const struct bareudp_conf *conf)</div><div class='add'>+{</div><div class='add'>+	struct bareudp_dev *bareudp, *t = NULL;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(bareudp, &amp;bn-&gt;bareudp_list, next) {</div><div class='add'>+		if (conf-&gt;port == bareudp-&gt;port)</div><div class='add'>+			t = bareudp;</div><div class='add'>+	}</div><div class='add'>+	return t;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bareudp_configure(struct net *net, struct net_device *dev,</div><div class='add'>+			     struct bareudp_conf *conf,</div><div class='add'>+			     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct bareudp_net *bn = net_generic(net, bareudp_net_id);</div><div class='add'>+	struct bareudp_dev *t, *bareudp = netdev_priv(dev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	bareudp-&gt;net = net;</div><div class='add'>+	bareudp-&gt;dev = dev;</div><div class='add'>+	t = bareudp_find_dev(bn, conf);</div><div class='add'>+	if (t) {</div><div class='add'>+		NL_SET_ERR_MSG(extack, "Another bareudp device using the same port already exists");</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (conf-&gt;multi_proto_mode &amp;&amp;</div><div class='add'>+	    (conf-&gt;ethertype != htons(ETH_P_MPLS_UC) &amp;&amp;</div><div class='add'>+	     conf-&gt;ethertype != htons(ETH_P_IP))) {</div><div class='add'>+		NL_SET_ERR_MSG(extack, "Cannot set multiproto mode for this ethertype (only IPv4 and unicast MPLS are supported)");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bareudp-&gt;port = conf-&gt;port;</div><div class='add'>+	bareudp-&gt;ethertype = conf-&gt;ethertype;</div><div class='add'>+	bareudp-&gt;sport_min = conf-&gt;sport_min;</div><div class='add'>+	bareudp-&gt;multi_proto_mode = conf-&gt;multi_proto_mode;</div><div class='add'>+</div><div class='add'>+	err = register_netdevice(dev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	list_add(&amp;bareudp-&gt;next, &amp;bn-&gt;bareudp_list);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bareudp_link_config(struct net_device *dev,</div><div class='add'>+			       struct nlattr *tb[])</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (tb[IFLA_MTU]) {</div><div class='add'>+		err = dev_set_mtu(dev, nla_get_u32(tb[IFLA_MTU]));</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bareudp_dellink(struct net_device *dev, struct list_head *head)</div><div class='add'>+{</div><div class='add'>+	struct bareudp_dev *bareudp = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	list_del(&amp;bareudp-&gt;next);</div><div class='add'>+	unregister_netdevice_queue(dev, head);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bareudp_newlink(struct net_device *dev,</div><div class='add'>+			   struct rtnl_newlink_params *params,</div><div class='add'>+			   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct net *link_net = rtnl_newlink_link_net(params);</div><div class='add'>+	struct nlattr **data = params-&gt;data;</div><div class='add'>+	struct nlattr **tb = params-&gt;tb;</div><div class='add'>+	struct bareudp_conf conf;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = bareudp2info(data, &amp;conf, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = bareudp_configure(link_net, dev, &amp;conf, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = bareudp_link_config(dev, tb);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_unconfig;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_unconfig:</div><div class='add'>+	bareudp_dellink(dev, NULL);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t bareudp_get_size(const struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	return  nla_total_size(sizeof(__be16)) +  /* IFLA_BAREUDP_PORT */</div><div class='add'>+		nla_total_size(sizeof(__be16)) +  /* IFLA_BAREUDP_ETHERTYPE */</div><div class='add'>+		nla_total_size(sizeof(__u16))  +  /* IFLA_BAREUDP_SRCPORT_MIN */</div><div class='add'>+		nla_total_size(0)              +  /* IFLA_BAREUDP_MULTIPROTO_MODE */</div><div class='add'>+		0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bareudp_fill_info(struct sk_buff *skb, const struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct bareudp_dev *bareudp = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	if (nla_put_be16(skb, IFLA_BAREUDP_PORT, bareudp-&gt;port))</div><div class='add'>+		goto nla_put_failure;</div><div class='add'>+	if (nla_put_be16(skb, IFLA_BAREUDP_ETHERTYPE, bareudp-&gt;ethertype))</div><div class='add'>+		goto nla_put_failure;</div><div class='add'>+	if (nla_put_u16(skb, IFLA_BAREUDP_SRCPORT_MIN, bareudp-&gt;sport_min))</div><div class='add'>+		goto nla_put_failure;</div><div class='add'>+	if (bareudp-&gt;multi_proto_mode &amp;&amp;</div><div class='add'>+	    nla_put_flag(skb, IFLA_BAREUDP_MULTIPROTO_MODE))</div><div class='add'>+		goto nla_put_failure;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+nla_put_failure:</div><div class='add'>+	return -EMSGSIZE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct rtnl_link_ops bareudp_link_ops __read_mostly = {</div><div class='add'>+	.kind           = "bareudp",</div><div class='add'>+	.maxtype        = IFLA_BAREUDP_MAX,</div><div class='add'>+	.policy         = bareudp_policy,</div><div class='add'>+	.priv_size      = sizeof(struct bareudp_dev),</div><div class='add'>+	.setup          = bareudp_setup,</div><div class='add'>+	.validate       = bareudp_validate,</div><div class='add'>+	.newlink        = bareudp_newlink,</div><div class='add'>+	.dellink        = bareudp_dellink,</div><div class='add'>+	.get_size       = bareudp_get_size,</div><div class='add'>+	.fill_info      = bareudp_fill_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static __net_init int bareudp_init_net(struct net *net)</div><div class='add'>+{</div><div class='add'>+	struct bareudp_net *bn = net_generic(net, bareudp_net_id);</div><div class='add'>+</div><div class='add'>+	INIT_LIST_HEAD(&amp;bn-&gt;bareudp_list);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __net_exit bareudp_exit_rtnl_net(struct net *net,</div><div class='add'>+					     struct list_head *dev_kill_list)</div><div class='add'>+{</div><div class='add'>+	struct bareudp_net *bn = net_generic(net, bareudp_net_id);</div><div class='add'>+	struct bareudp_dev *bareudp, *next;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_safe(bareudp, next, &amp;bn-&gt;bareudp_list, next)</div><div class='add'>+		bareudp_dellink(bareudp-&gt;dev, dev_kill_list);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct pernet_operations bareudp_net_ops = {</div><div class='add'>+	.init = bareudp_init_net,</div><div class='add'>+	.exit_rtnl = bareudp_exit_rtnl_net,</div><div class='add'>+	.id   = &amp;bareudp_net_id,</div><div class='add'>+	.size = sizeof(struct bareudp_net),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init bareudp_init_module(void)</div><div class='add'>+{</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = register_pernet_subsys(&amp;bareudp_net_ops);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out1;</div><div class='add'>+</div><div class='add'>+	rc = rtnl_link_register(&amp;bareudp_link_ops);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out2;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+out2:</div><div class='add'>+	unregister_pernet_subsys(&amp;bareudp_net_ops);</div><div class='add'>+out1:</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+late_initcall(bareudp_init_module);</div><div class='add'>+</div><div class='add'>+static void __exit bareudp_cleanup_module(void)</div><div class='add'>+{</div><div class='add'>+	rtnl_link_unregister(&amp;bareudp_link_ops);</div><div class='add'>+	unregister_pernet_subsys(&amp;bareudp_net_ops);</div><div class='add'>+}</div><div class='add'>+module_exit(bareudp_cleanup_module);</div><div class='add'>+</div><div class='add'>+MODULE_ALIAS_RTNL_LINK("bareudp");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_AUTHOR("Martin Varghese &lt;martin.varghese@nokia.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Interface driver for UDP encapsulated traffic");</div><div class='head'>diff --git a/drivers/net/bonding/Makefile b/drivers/net/bonding/Makefile<br/>index 6f4e80853ed4..30e8ae3da2da 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/bonding/Makefile?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/bonding/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/bonding/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/bonding/Makefile</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> #</div><div class='ctx'> # Makefile for the Ethernet Bonding driver</div><div class='ctx'> #</div><div class='head'>diff --git a/drivers/net/bonding/bond_3ad.c b/drivers/net/bonding/bond_3ad.c<br/>index 7fde4d5c2b28..1a8de2bf8655 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/bonding/bond_3ad.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/bonding/bond_3ad.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/bonding/bond_3ad.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/bonding/bond_3ad.c</a></div><div class='hunk'>@@ -1,23 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright(c) 1999 - 2004 Intel Corporation. All rights reserved.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms of the GNU General Public License as published by the Free</div><div class='del'>- * Software Foundation; either version 2 of the License, or (at your option)</div><div class='del'>- * any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful, but WITHOUT</div><div class='del'>- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or</div><div class='del'>- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for</div><div class='del'>- * more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License along with</div><div class='del'>- * this program; if not, write to the Free Software Foundation, Inc., 59</div><div class='del'>- * Temple Place - Suite 330, Boston, MA  02111-1307, USA.</div><div class='del'>- *</div><div class='del'>- * The full GNU General Public License is included in this distribution in the</div><div class='del'>- * file called LICENSE.</div><div class='del'>- *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/skbuff.h&gt;</div><div class='hunk'>@@ -31,6 +14,7 @@</div><div class='ctx'> #include &lt;net/net_namespace.h&gt;</div><div class='ctx'> #include &lt;net/bonding.h&gt;</div><div class='ctx'> #include &lt;net/bond_3ad.h&gt;</div><div class='add'>+#include &lt;net/netlink.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* General definitions */</div><div class='ctx'> #define AD_SHORT_TIMEOUT           1</div><div class='hunk'>@@ -47,16 +31,6 @@</div><div class='ctx'> #define AD_CHURN_DETECTION_TIME    60</div><div class='ctx'> #define AD_AGGREGATE_WAIT_TIME     2</div><div class='ctx'> </div><div class='del'>-/* Port state definitions (43.4.2.2 in the 802.3ad standard) */</div><div class='del'>-#define AD_STATE_LACP_ACTIVITY   0x1</div><div class='del'>-#define AD_STATE_LACP_TIMEOUT    0x2</div><div class='del'>-#define AD_STATE_AGGREGATION     0x4</div><div class='del'>-#define AD_STATE_SYNCHRONIZATION 0x8</div><div class='del'>-#define AD_STATE_COLLECTING      0x10</div><div class='del'>-#define AD_STATE_DISTRIBUTING    0x20</div><div class='del'>-#define AD_STATE_DEFAULTED       0x40</div><div class='del'>-#define AD_STATE_EXPIRED         0x80</div><div class='del'>-</div><div class='ctx'> /* Port Variables definitions used by the State Machines (43.4.7 in the</div><div class='ctx'>  * 802.3ad standard)</div><div class='ctx'>  */</div><div class='hunk'>@@ -90,21 +64,31 @@ enum ad_link_speed_type {</div><div class='ctx'> 	AD_LINK_SPEED_100MBPS,</div><div class='ctx'> 	AD_LINK_SPEED_1000MBPS,</div><div class='ctx'> 	AD_LINK_SPEED_2500MBPS,</div><div class='add'>+	AD_LINK_SPEED_5000MBPS,</div><div class='ctx'> 	AD_LINK_SPEED_10000MBPS,</div><div class='add'>+	AD_LINK_SPEED_14000MBPS,</div><div class='ctx'> 	AD_LINK_SPEED_20000MBPS,</div><div class='add'>+	AD_LINK_SPEED_25000MBPS,</div><div class='ctx'> 	AD_LINK_SPEED_40000MBPS,</div><div class='del'>-	AD_LINK_SPEED_56000MBPS</div><div class='add'>+	AD_LINK_SPEED_50000MBPS,</div><div class='add'>+	AD_LINK_SPEED_56000MBPS,</div><div class='add'>+	AD_LINK_SPEED_100000MBPS,</div><div class='add'>+	AD_LINK_SPEED_200000MBPS,</div><div class='add'>+	AD_LINK_SPEED_400000MBPS,</div><div class='add'>+	AD_LINK_SPEED_800000MBPS,</div><div class='add'>+	AD_LINK_SPEED_1600000MBPS,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* compare MAC addresses */</div><div class='ctx'> #define MAC_ADDRESS_EQUAL(A, B)	\</div><div class='ctx'> 	ether_addr_equal_64bits((const u8 *)A, (const u8 *)B)</div><div class='ctx'> </div><div class='del'>-static struct mac_addr null_mac_addr = { { 0, 0, 0, 0, 0, 0 } };</div><div class='del'>-static u16 ad_ticks_per_sec;</div><div class='add'>+static const u16 ad_ticks_per_sec = 1000 / AD_TIMER_INTERVAL;</div><div class='ctx'> static const int ad_delta_in_ticks = (AD_TIMER_INTERVAL * HZ) / 1000;</div><div class='ctx'> </div><div class='del'>-static const u8 lacpdu_mcast_addr[ETH_ALEN] = MULTICAST_LACPDU_ADDR;</div><div class='add'>+const u8 lacpdu_mcast_addr[ETH_ALEN + 2] __long_aligned = {</div><div class='add'>+	0x01, 0x80, 0xC2, 0x00, 0x00, 0x02</div><div class='add'>+};</div><div class='ctx'> </div><div class='ctx'> /* ================= main 802.3ad protocol functions ================== */</div><div class='ctx'> static int ad_lacpdu_send(struct port *port);</div><div class='hunk'>@@ -118,7 +102,10 @@ static void ad_agg_selection_logic(struct aggregator *aggregator,</div><div class='ctx'> 				   bool *update_slave_arr);</div><div class='ctx'> static void ad_clear_agg(struct aggregator *aggregator);</div><div class='ctx'> static void ad_initialize_agg(struct aggregator *aggregator);</div><div class='del'>-static void ad_initialize_port(struct port *port, int lacp_fast);</div><div class='add'>+static void ad_initialize_port(struct port *port, const struct bond_params *bond_params);</div><div class='add'>+static void ad_enable_collecting(struct port *port);</div><div class='add'>+static void ad_disable_distributing(struct port *port,</div><div class='add'>+				    bool *update_slave_arr);</div><div class='ctx'> static void ad_enable_collecting_distributing(struct port *port,</div><div class='ctx'> 					      bool *update_slave_arr);</div><div class='ctx'> static void ad_disable_collecting_distributing(struct port *port,</div><div class='hunk'>@@ -127,6 +114,7 @@ static void ad_marker_info_received(struct bond_marker *marker_info,</div><div class='ctx'> 				    struct port *port);</div><div class='ctx'> static void ad_marker_response_received(struct bond_marker *marker,</div><div class='ctx'> 					struct port *port);</div><div class='add'>+static void ad_update_actor_keys(struct port *port, bool reset);</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /* ================= api to bonding and kernel code ================== */</div><div class='hunk'>@@ -147,7 +135,7 @@ static inline struct bonding *__get_bond_by_port(struct port *port)</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * __get_first_agg - get the first aggregator in the bond</div><div class='del'>- * @bond: the bond we're looking at</div><div class='add'>+ * @port: the port we're looking at</div><div class='ctx'>  *</div><div class='ctx'>  * Return the aggregator of the first slave in @bond, or %NULL if it can't be</div><div class='ctx'>  * found.</div><div class='hunk'>@@ -184,8 +172,37 @@ static inline int __agg_has_partner(struct aggregator *agg)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * __disable_distributing_port - disable the port's slave for distributing.</div><div class='add'>+ * Port will still be able to collect.</div><div class='add'>+ * @port: the port we're looking at</div><div class='add'>+ *</div><div class='add'>+ * This will disable only distributing on the port's slave.</div><div class='add'>+ */</div><div class='add'>+static void __disable_distributing_port(struct port *port)</div><div class='add'>+{</div><div class='add'>+	bond_set_slave_tx_disabled_flags(port-&gt;slave, BOND_SLAVE_NOTIFY_LATER);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * __enable_collecting_port - enable the port's slave for collecting,</div><div class='add'>+ * if it's up</div><div class='add'>+ * @port: the port we're looking at</div><div class='add'>+ *</div><div class='add'>+ * This will enable only collecting on the port's slave.</div><div class='add'>+ */</div><div class='add'>+static void __enable_collecting_port(struct port *port)</div><div class='add'>+{</div><div class='add'>+	struct slave *slave = port-&gt;slave;</div><div class='add'>+</div><div class='add'>+	if (slave-&gt;link == BOND_LINK_UP &amp;&amp; bond_slave_is_up(slave))</div><div class='add'>+		bond_set_slave_rx_enabled_flags(slave, BOND_SLAVE_NOTIFY_LATER);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * __disable_port - disable the port's slave</div><div class='ctx'>  * @port: the port we're looking at</div><div class='add'>+ *</div><div class='add'>+ * This will disable both collecting and distributing on the port's slave.</div><div class='ctx'>  */</div><div class='ctx'> static inline void __disable_port(struct port *port)</div><div class='ctx'> {</div><div class='hunk'>@@ -195,6 +212,8 @@ static inline void __disable_port(struct port *port)</div><div class='ctx'> /**</div><div class='ctx'>  * __enable_port - enable the port's slave, if it's up</div><div class='ctx'>  * @port: the port we're looking at</div><div class='add'>+ *</div><div class='add'>+ * This will enable both collecting and distributing on the port's slave.</div><div class='ctx'>  */</div><div class='ctx'> static inline void __enable_port(struct port *port)</div><div class='ctx'> {</div><div class='hunk'>@@ -205,10 +224,27 @@ static inline void __enable_port(struct port *port)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * __port_is_enabled - check if the port's slave is in active state</div><div class='add'>+ * __port_move_to_attached_state - check if port should transition back to attached</div><div class='add'>+ * state.</div><div class='add'>+ * @port: the port we're looking at</div><div class='add'>+ */</div><div class='add'>+static bool __port_move_to_attached_state(struct port *port)</div><div class='add'>+{</div><div class='add'>+	if (!(port-&gt;sm_vars &amp; AD_PORT_SELECTED) ||</div><div class='add'>+	    (port-&gt;sm_vars &amp; AD_PORT_STANDBY) ||</div><div class='add'>+	    !(port-&gt;partner_oper.port_state &amp; LACP_STATE_SYNCHRONIZATION) ||</div><div class='add'>+	    !(port-&gt;actor_oper_port_state &amp; LACP_STATE_SYNCHRONIZATION))</div><div class='add'>+		port-&gt;sm_mux_state = AD_MUX_ATTACHED;</div><div class='add'>+</div><div class='add'>+	return port-&gt;sm_mux_state == AD_MUX_ATTACHED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * __port_is_collecting_distributing - check if the port's slave is in the</div><div class='add'>+ * combined collecting/distributing state</div><div class='ctx'>  * @port: the port we're looking at</div><div class='ctx'>  */</div><div class='del'>-static inline int __port_is_enabled(struct port *port)</div><div class='add'>+static int __port_is_collecting_distributing(struct port *port)</div><div class='ctx'> {</div><div class='ctx'> 	return bond_is_active_slave(port-&gt;slave);</div><div class='ctx'> }</div><div class='hunk'>@@ -240,7 +276,7 @@ static inline int __check_agg_selection_timer(struct port *port)</div><div class='ctx'> 	if (bond == NULL)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	return BOND_AD_INFO(bond).agg_select_timer ? 1 : 0;</div><div class='add'>+	return atomic_read(&amp;BOND_AD_INFO(bond).agg_select_timer) ? 1 : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -253,10 +289,19 @@ static inline int __check_agg_selection_timer(struct port *port)</div><div class='ctx'>  *     %AD_LINK_SPEED_100MBPS,</div><div class='ctx'>  *     %AD_LINK_SPEED_1000MBPS,</div><div class='ctx'>  *     %AD_LINK_SPEED_2500MBPS,</div><div class='add'>+ *     %AD_LINK_SPEED_5000MBPS,</div><div class='ctx'>  *     %AD_LINK_SPEED_10000MBPS</div><div class='add'>+ *     %AD_LINK_SPEED_14000MBPS,</div><div class='ctx'>  *     %AD_LINK_SPEED_20000MBPS</div><div class='add'>+ *     %AD_LINK_SPEED_25000MBPS</div><div class='ctx'>  *     %AD_LINK_SPEED_40000MBPS</div><div class='add'>+ *     %AD_LINK_SPEED_50000MBPS</div><div class='ctx'>  *     %AD_LINK_SPEED_56000MBPS</div><div class='add'>+ *     %AD_LINK_SPEED_100000MBPS</div><div class='add'>+ *     %AD_LINK_SPEED_200000MBPS</div><div class='add'>+ *     %AD_LINK_SPEED_400000MBPS</div><div class='add'>+ *     %AD_LINK_SPEED_800000MBPS</div><div class='add'>+ *     %AD_LINK_SPEED_1600000MBPS</div><div class='ctx'>  */</div><div class='ctx'> static u16 __get_link_speed(struct port *port)</div><div class='ctx'> {</div><div class='hunk'>@@ -288,31 +333,72 @@ static u16 __get_link_speed(struct port *port)</div><div class='ctx'> 			speed = AD_LINK_SPEED_2500MBPS;</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='add'>+		case SPEED_5000:</div><div class='add'>+			speed = AD_LINK_SPEED_5000MBPS;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='ctx'> 		case SPEED_10000:</div><div class='ctx'> 			speed = AD_LINK_SPEED_10000MBPS;</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='add'>+		case SPEED_14000:</div><div class='add'>+			speed = AD_LINK_SPEED_14000MBPS;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='ctx'> 		case SPEED_20000:</div><div class='ctx'> 			speed = AD_LINK_SPEED_20000MBPS;</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='add'>+		case SPEED_25000:</div><div class='add'>+			speed = AD_LINK_SPEED_25000MBPS;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='ctx'> 		case SPEED_40000:</div><div class='ctx'> 			speed = AD_LINK_SPEED_40000MBPS;</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='add'>+		case SPEED_50000:</div><div class='add'>+			speed = AD_LINK_SPEED_50000MBPS;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='ctx'> 		case SPEED_56000:</div><div class='ctx'> 			speed = AD_LINK_SPEED_56000MBPS;</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='add'>+		case SPEED_100000:</div><div class='add'>+			speed = AD_LINK_SPEED_100000MBPS;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case SPEED_200000:</div><div class='add'>+			speed = AD_LINK_SPEED_200000MBPS;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case SPEED_400000:</div><div class='add'>+			speed = AD_LINK_SPEED_400000MBPS;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case SPEED_800000:</div><div class='add'>+			speed = AD_LINK_SPEED_800000MBPS;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case SPEED_1600000:</div><div class='add'>+			speed = AD_LINK_SPEED_1600000MBPS;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='ctx'> 		default:</div><div class='ctx'> 			/* unknown speed value from ethtool. shouldn't happen */</div><div class='add'>+			if (slave-&gt;speed != SPEED_UNKNOWN)</div><div class='add'>+				pr_err_once("%s: (slave %s): unknown ethtool speed (%d) for port %d (set it to 0)\n",</div><div class='add'>+					    slave-&gt;bond-&gt;dev-&gt;name,</div><div class='add'>+					    slave-&gt;dev-&gt;name, slave-&gt;speed,</div><div class='add'>+					    port-&gt;actor_port_number);</div><div class='ctx'> 			speed = 0;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	netdev_dbg(slave-&gt;bond-&gt;dev, "Port %d Received link speed %d update from adapter\n",</div><div class='del'>-		   port-&gt;actor_port_number, speed);</div><div class='add'>+	slave_dbg(slave-&gt;bond-&gt;dev, slave-&gt;dev, "Port %d Received link speed %d update from adapter\n",</div><div class='add'>+		  port-&gt;actor_port_number, speed);</div><div class='ctx'> 	return speed;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -327,31 +413,38 @@ static u16 __get_link_speed(struct port *port)</div><div class='ctx'> static u8 __get_duplex(struct port *port)</div><div class='ctx'> {</div><div class='ctx'> 	struct slave *slave = port-&gt;slave;</div><div class='del'>-	u8 retval;</div><div class='add'>+	u8 retval = 0x0;</div><div class='ctx'> </div><div class='ctx'> 	/* handling a special case: when the configuration starts with</div><div class='ctx'> 	 * link down, it sets the duplex to 0.</div><div class='ctx'> 	 */</div><div class='del'>-	if (slave-&gt;link != BOND_LINK_UP) {</div><div class='del'>-		retval = 0x0;</div><div class='del'>-	} else {</div><div class='add'>+	if (slave-&gt;link == BOND_LINK_UP) {</div><div class='ctx'> 		switch (slave-&gt;duplex) {</div><div class='ctx'> 		case DUPLEX_FULL:</div><div class='ctx'> 			retval = 0x1;</div><div class='del'>-			netdev_dbg(slave-&gt;bond-&gt;dev, "Port %d Received status full duplex update from adapter\n",</div><div class='del'>-				   port-&gt;actor_port_number);</div><div class='add'>+			slave_dbg(slave-&gt;bond-&gt;dev, slave-&gt;dev, "Port %d Received status full duplex update from adapter\n",</div><div class='add'>+				  port-&gt;actor_port_number);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case DUPLEX_HALF:</div><div class='ctx'> 		default:</div><div class='ctx'> 			retval = 0x0;</div><div class='del'>-			netdev_dbg(slave-&gt;bond-&gt;dev, "Port %d Received status NOT full duplex update from adapter\n",</div><div class='del'>-				   port-&gt;actor_port_number);</div><div class='add'>+			slave_dbg(slave-&gt;bond-&gt;dev, slave-&gt;dev, "Port %d Received status NOT full duplex update from adapter\n",</div><div class='add'>+				  port-&gt;actor_port_number);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	return retval;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void __ad_actor_update_port(struct port *port)</div><div class='add'>+{</div><div class='add'>+	const struct bonding *bond = bond_get_bond_by_slave(port-&gt;slave);</div><div class='add'>+</div><div class='add'>+	port-&gt;actor_system = BOND_AD_INFO(bond).system.sys_mac_addr;</div><div class='add'>+	port-&gt;actor_system_priority = BOND_AD_INFO(bond).system.sys_priority;</div><div class='add'>+	port-&gt;actor_port_priority = SLAVE_AD_INFO(port-&gt;slave)-&gt;port_priority;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Conversions */</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -428,8 +521,8 @@ static void __choose_matched(struct lacpdu *lacpdu, struct port *port)</div><div class='ctx'> 	     MAC_ADDRESS_EQUAL(&amp;(lacpdu-&gt;partner_system), &amp;(port-&gt;actor_system)) &amp;&amp;</div><div class='ctx'> 	     (ntohs(lacpdu-&gt;partner_system_priority) == port-&gt;actor_system_priority) &amp;&amp;</div><div class='ctx'> 	     (ntohs(lacpdu-&gt;partner_key) == port-&gt;actor_oper_port_key) &amp;&amp;</div><div class='del'>-	     ((lacpdu-&gt;partner_state &amp; AD_STATE_AGGREGATION) == (port-&gt;actor_oper_port_state &amp; AD_STATE_AGGREGATION))) ||</div><div class='del'>-	    ((lacpdu-&gt;actor_state &amp; AD_STATE_AGGREGATION) == 0)</div><div class='add'>+	     ((lacpdu-&gt;partner_state &amp; LACP_STATE_AGGREGATION) == (port-&gt;actor_oper_port_state &amp; LACP_STATE_AGGREGATION))) ||</div><div class='add'>+	    ((lacpdu-&gt;actor_state &amp; LACP_STATE_AGGREGATION) == 0)</div><div class='ctx'> 		) {</div><div class='ctx'> 		port-&gt;sm_vars |= AD_PORT_MATCHED;</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -463,18 +556,20 @@ static void __record_pdu(struct lacpdu *lacpdu, struct port *port)</div><div class='ctx'> 		partner-&gt;port_state = lacpdu-&gt;actor_state;</div><div class='ctx'> </div><div class='ctx'> 		/* set actor_oper_port_state.defaulted to FALSE */</div><div class='del'>-		port-&gt;actor_oper_port_state &amp;= ~AD_STATE_DEFAULTED;</div><div class='add'>+		port-&gt;actor_oper_port_state &amp;= ~LACP_STATE_DEFAULTED;</div><div class='ctx'> </div><div class='ctx'> 		/* set the partner sync. to on if the partner is sync,</div><div class='ctx'> 		 * and the port is matched</div><div class='ctx'> 		 */</div><div class='ctx'> 		if ((port-&gt;sm_vars &amp; AD_PORT_MATCHED) &amp;&amp;</div><div class='del'>-		    (lacpdu-&gt;actor_state &amp; AD_STATE_SYNCHRONIZATION)) {</div><div class='del'>-			partner-&gt;port_state |= AD_STATE_SYNCHRONIZATION;</div><div class='del'>-			pr_debug("%s partner sync=1\n", port-&gt;slave-&gt;dev-&gt;name);</div><div class='add'>+		    (lacpdu-&gt;actor_state &amp; LACP_STATE_SYNCHRONIZATION)) {</div><div class='add'>+			partner-&gt;port_state |= LACP_STATE_SYNCHRONIZATION;</div><div class='add'>+			slave_dbg(port-&gt;slave-&gt;bond-&gt;dev, port-&gt;slave-&gt;dev,</div><div class='add'>+				  "partner sync=1\n");</div><div class='ctx'> 		} else {</div><div class='del'>-			partner-&gt;port_state &amp;= ~AD_STATE_SYNCHRONIZATION;</div><div class='del'>-			pr_debug("%s partner sync=0\n", port-&gt;slave-&gt;dev-&gt;name);</div><div class='add'>+			partner-&gt;port_state &amp;= ~LACP_STATE_SYNCHRONIZATION;</div><div class='add'>+			slave_dbg(port-&gt;slave-&gt;bond-&gt;dev, port-&gt;slave-&gt;dev,</div><div class='add'>+				  "partner sync=0\n");</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -495,7 +590,7 @@ static void __record_default(struct port *port)</div><div class='ctx'> 		       sizeof(struct port_params));</div><div class='ctx'> </div><div class='ctx'> 		/* set actor_oper_port_state.defaulted to true */</div><div class='del'>-		port-&gt;actor_oper_port_state |= AD_STATE_DEFAULTED;</div><div class='add'>+		port-&gt;actor_oper_port_state |= LACP_STATE_DEFAULTED;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -525,7 +620,7 @@ static void __update_selected(struct lacpdu *lacpdu, struct port *port)</div><div class='ctx'> 		    !MAC_ADDRESS_EQUAL(&amp;lacpdu-&gt;actor_system, &amp;partner-&gt;system) ||</div><div class='ctx'> 		    ntohs(lacpdu-&gt;actor_system_priority) != partner-&gt;system_priority ||</div><div class='ctx'> 		    ntohs(lacpdu-&gt;actor_key) != partner-&gt;key ||</div><div class='del'>-		    (lacpdu-&gt;actor_state &amp; AD_STATE_AGGREGATION) != (partner-&gt;port_state &amp; AD_STATE_AGGREGATION)) {</div><div class='add'>+		    (lacpdu-&gt;actor_state &amp; LACP_STATE_AGGREGATION) != (partner-&gt;port_state &amp; LACP_STATE_AGGREGATION)) {</div><div class='ctx'> 			port-&gt;sm_vars &amp;= ~AD_PORT_SELECTED;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -557,8 +652,8 @@ static void __update_default_selected(struct port *port)</div><div class='ctx'> 		    !MAC_ADDRESS_EQUAL(&amp;admin-&gt;system, &amp;oper-&gt;system) ||</div><div class='ctx'> 		    admin-&gt;system_priority != oper-&gt;system_priority ||</div><div class='ctx'> 		    admin-&gt;key != oper-&gt;key ||</div><div class='del'>-		    (admin-&gt;port_state &amp; AD_STATE_AGGREGATION)</div><div class='del'>-			!= (oper-&gt;port_state &amp; AD_STATE_AGGREGATION)) {</div><div class='add'>+		    (admin-&gt;port_state &amp; LACP_STATE_AGGREGATION)</div><div class='add'>+			!= (oper-&gt;port_state &amp; LACP_STATE_AGGREGATION)) {</div><div class='ctx'> 			port-&gt;sm_vars &amp;= ~AD_PORT_SELECTED;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -588,10 +683,10 @@ static void __update_ntt(struct lacpdu *lacpdu, struct port *port)</div><div class='ctx'> 		    !MAC_ADDRESS_EQUAL(&amp;(lacpdu-&gt;partner_system), &amp;(port-&gt;actor_system)) ||</div><div class='ctx'> 		    (ntohs(lacpdu-&gt;partner_system_priority) != port-&gt;actor_system_priority) ||</div><div class='ctx'> 		    (ntohs(lacpdu-&gt;partner_key) != port-&gt;actor_oper_port_key) ||</div><div class='del'>-		    ((lacpdu-&gt;partner_state &amp; AD_STATE_LACP_ACTIVITY) != (port-&gt;actor_oper_port_state &amp; AD_STATE_LACP_ACTIVITY)) ||</div><div class='del'>-		    ((lacpdu-&gt;partner_state &amp; AD_STATE_LACP_TIMEOUT) != (port-&gt;actor_oper_port_state &amp; AD_STATE_LACP_TIMEOUT)) ||</div><div class='del'>-		    ((lacpdu-&gt;partner_state &amp; AD_STATE_SYNCHRONIZATION) != (port-&gt;actor_oper_port_state &amp; AD_STATE_SYNCHRONIZATION)) ||</div><div class='del'>-		    ((lacpdu-&gt;partner_state &amp; AD_STATE_AGGREGATION) != (port-&gt;actor_oper_port_state &amp; AD_STATE_AGGREGATION))</div><div class='add'>+		    ((lacpdu-&gt;partner_state &amp; LACP_STATE_LACP_ACTIVITY) != (port-&gt;actor_oper_port_state &amp; LACP_STATE_LACP_ACTIVITY)) ||</div><div class='add'>+		    ((lacpdu-&gt;partner_state &amp; LACP_STATE_LACP_TIMEOUT) != (port-&gt;actor_oper_port_state &amp; LACP_STATE_LACP_TIMEOUT)) ||</div><div class='add'>+		    ((lacpdu-&gt;partner_state &amp; LACP_STATE_SYNCHRONIZATION) != (port-&gt;actor_oper_port_state &amp; LACP_STATE_SYNCHRONIZATION)) ||</div><div class='add'>+		    ((lacpdu-&gt;partner_state &amp; LACP_STATE_AGGREGATION) != (port-&gt;actor_oper_port_state &amp; LACP_STATE_AGGREGATION))</div><div class='ctx'> 		   ) {</div><div class='ctx'> 			port-&gt;ntt = true;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -644,6 +739,32 @@ static void __set_agg_ports_ready(struct aggregator *aggregator, int val)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int __agg_active_ports(struct aggregator *agg)</div><div class='add'>+{</div><div class='add'>+	struct port *port;</div><div class='add'>+	int active = 0;</div><div class='add'>+</div><div class='add'>+	for (port = agg-&gt;lag_ports; port;</div><div class='add'>+	     port = port-&gt;next_port_in_aggregator) {</div><div class='add'>+		if (port-&gt;is_enabled)</div><div class='add'>+			active++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return active;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int __agg_ports_priority(const struct aggregator *agg)</div><div class='add'>+{</div><div class='add'>+	struct port *port = agg-&gt;lag_ports;</div><div class='add'>+	unsigned int prio = 0;</div><div class='add'>+</div><div class='add'>+	for (; port; port = port-&gt;next_port_in_aggregator)</div><div class='add'>+		if (port-&gt;is_enabled)</div><div class='add'>+			prio += port-&gt;actor_port_priority;</div><div class='add'>+</div><div class='add'>+	return prio;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * __get_agg_bandwidth - get the total bandwidth of an aggregator</div><div class='ctx'>  * @aggregator: the aggregator we're looking at</div><div class='hunk'>@@ -651,36 +772,64 @@ static void __set_agg_ports_ready(struct aggregator *aggregator, int val)</div><div class='ctx'>  */</div><div class='ctx'> static u32 __get_agg_bandwidth(struct aggregator *aggregator)</div><div class='ctx'> {</div><div class='add'>+	int nports = __agg_active_ports(aggregator);</div><div class='ctx'> 	u32 bandwidth = 0;</div><div class='ctx'> </div><div class='del'>-	if (aggregator-&gt;num_of_ports) {</div><div class='add'>+	if (nports) {</div><div class='ctx'> 		switch (__get_link_speed(aggregator-&gt;lag_ports)) {</div><div class='ctx'> 		case AD_LINK_SPEED_1MBPS:</div><div class='del'>-			bandwidth = aggregator-&gt;num_of_ports;</div><div class='add'>+			bandwidth = nports;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case AD_LINK_SPEED_10MBPS:</div><div class='del'>-			bandwidth = aggregator-&gt;num_of_ports * 10;</div><div class='add'>+			bandwidth = nports * 10;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case AD_LINK_SPEED_100MBPS:</div><div class='del'>-			bandwidth = aggregator-&gt;num_of_ports * 100;</div><div class='add'>+			bandwidth = nports * 100;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case AD_LINK_SPEED_1000MBPS:</div><div class='del'>-			bandwidth = aggregator-&gt;num_of_ports * 1000;</div><div class='add'>+			bandwidth = nports * 1000;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case AD_LINK_SPEED_2500MBPS:</div><div class='del'>-			bandwidth = aggregator-&gt;num_of_ports * 2500;</div><div class='add'>+			bandwidth = nports * 2500;</div><div class='add'>+			break;</div><div class='add'>+		case AD_LINK_SPEED_5000MBPS:</div><div class='add'>+			bandwidth = nports * 5000;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case AD_LINK_SPEED_10000MBPS:</div><div class='del'>-			bandwidth = aggregator-&gt;num_of_ports * 10000;</div><div class='add'>+			bandwidth = nports * 10000;</div><div class='add'>+			break;</div><div class='add'>+		case AD_LINK_SPEED_14000MBPS:</div><div class='add'>+			bandwidth = nports * 14000;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case AD_LINK_SPEED_20000MBPS:</div><div class='del'>-			bandwidth = aggregator-&gt;num_of_ports * 20000;</div><div class='add'>+			bandwidth = nports * 20000;</div><div class='add'>+			break;</div><div class='add'>+		case AD_LINK_SPEED_25000MBPS:</div><div class='add'>+			bandwidth = nports * 25000;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case AD_LINK_SPEED_40000MBPS:</div><div class='del'>-			bandwidth = aggregator-&gt;num_of_ports * 40000;</div><div class='add'>+			bandwidth = nports * 40000;</div><div class='add'>+			break;</div><div class='add'>+		case AD_LINK_SPEED_50000MBPS:</div><div class='add'>+			bandwidth = nports * 50000;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case AD_LINK_SPEED_56000MBPS:</div><div class='del'>-			bandwidth = aggregator-&gt;num_of_ports * 56000;</div><div class='add'>+			bandwidth = nports * 56000;</div><div class='add'>+			break;</div><div class='add'>+		case AD_LINK_SPEED_100000MBPS:</div><div class='add'>+			bandwidth = nports * 100000;</div><div class='add'>+			break;</div><div class='add'>+		case AD_LINK_SPEED_200000MBPS:</div><div class='add'>+			bandwidth = nports * 200000;</div><div class='add'>+			break;</div><div class='add'>+		case AD_LINK_SPEED_400000MBPS:</div><div class='add'>+			bandwidth = nports * 400000;</div><div class='add'>+			break;</div><div class='add'>+		case AD_LINK_SPEED_800000MBPS:</div><div class='add'>+			bandwidth = nports * 800000;</div><div class='add'>+			break;</div><div class='add'>+		case AD_LINK_SPEED_1600000MBPS:</div><div class='add'>+			bandwidth = nports * 1600000;</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			bandwidth = 0; /* to silence the compiler */</div><div class='hunk'>@@ -730,8 +879,9 @@ static inline void __update_lacpdu_from_port(struct port *port)</div><div class='ctx'> 	lacpdu-&gt;actor_port_priority = htons(port-&gt;actor_port_priority);</div><div class='ctx'> 	lacpdu-&gt;actor_port = htons(port-&gt;actor_port_number);</div><div class='ctx'> 	lacpdu-&gt;actor_state = port-&gt;actor_oper_port_state;</div><div class='del'>-	pr_debug("update lacpdu: %s, actor port state %x\n",</div><div class='del'>-		 port-&gt;slave-&gt;dev-&gt;name, port-&gt;actor_oper_port_state);</div><div class='add'>+	slave_dbg(port-&gt;slave-&gt;bond-&gt;dev, port-&gt;slave-&gt;dev,</div><div class='add'>+		  "update lacpdu: actor port state %x\n",</div><div class='add'>+		  port-&gt;actor_oper_port_state);</div><div class='ctx'> </div><div class='ctx'> 	/* lacpdu-&gt;reserved_3_1              initialized</div><div class='ctx'> 	 * lacpdu-&gt;tlv_type_partner_info     initialized</div><div class='hunk'>@@ -776,13 +926,16 @@ static int ad_lacpdu_send(struct port *port)</div><div class='ctx'> 	if (!skb)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='add'>+	atomic64_inc(&amp;SLAVE_AD_INFO(slave)-&gt;stats.lacpdu_tx);</div><div class='add'>+	atomic64_inc(&amp;BOND_AD_INFO(slave-&gt;bond).stats.lacpdu_tx);</div><div class='add'>+</div><div class='ctx'> 	skb-&gt;dev = slave-&gt;dev;</div><div class='ctx'> 	skb_reset_mac_header(skb);</div><div class='ctx'> 	skb-&gt;network_header = skb-&gt;mac_header + ETH_HLEN;</div><div class='ctx'> 	skb-&gt;protocol = PKT_TYPE_LACPDU;</div><div class='ctx'> 	skb-&gt;priority = TC_PRIO_CONTROL;</div><div class='ctx'> </div><div class='del'>-	lacpdu_header = (struct lacpdu_header *)skb_put(skb, length);</div><div class='add'>+	lacpdu_header = skb_put(skb, length);</div><div class='ctx'> </div><div class='ctx'> 	ether_addr_copy(lacpdu_header-&gt;hdr.h_dest, lacpdu_mcast_addr);</div><div class='ctx'> 	/* Note: source address is set to be the member's PERMANENT address,</div><div class='hunk'>@@ -817,6 +970,17 @@ static int ad_marker_send(struct port *port, struct bond_marker *marker)</div><div class='ctx'> 	if (!skb)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='add'>+	switch (marker-&gt;tlv_type) {</div><div class='add'>+	case AD_MARKER_INFORMATION_SUBTYPE:</div><div class='add'>+		atomic64_inc(&amp;SLAVE_AD_INFO(slave)-&gt;stats.marker_tx);</div><div class='add'>+		atomic64_inc(&amp;BOND_AD_INFO(slave-&gt;bond).stats.marker_tx);</div><div class='add'>+		break;</div><div class='add'>+	case AD_MARKER_RESPONSE_SUBTYPE:</div><div class='add'>+		atomic64_inc(&amp;SLAVE_AD_INFO(slave)-&gt;stats.marker_resp_tx);</div><div class='add'>+		atomic64_inc(&amp;BOND_AD_INFO(slave-&gt;bond).stats.marker_resp_tx);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	skb_reserve(skb, 16);</div><div class='ctx'> </div><div class='ctx'> 	skb-&gt;dev = slave-&gt;dev;</div><div class='hunk'>@@ -824,7 +988,7 @@ static int ad_marker_send(struct port *port, struct bond_marker *marker)</div><div class='ctx'> 	skb-&gt;network_header = skb-&gt;mac_header + ETH_HLEN;</div><div class='ctx'> 	skb-&gt;protocol = PKT_TYPE_LACPDU;</div><div class='ctx'> </div><div class='del'>-	marker_header = (struct bond_marker_header *)skb_put(skb, length);</div><div class='add'>+	marker_header = skb_put(skb, length);</div><div class='ctx'> </div><div class='ctx'> 	ether_addr_copy(marker_header-&gt;hdr.h_dest, lacpdu_mcast_addr);</div><div class='ctx'> 	/* Note: source address is set to be the member's PERMANENT address,</div><div class='hunk'>@@ -840,6 +1004,17 @@ static int ad_marker_send(struct port *port, struct bond_marker *marker)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ad_cond_set_peer_notif(struct port *port)</div><div class='add'>+{</div><div class='add'>+	struct bonding *bond = port-&gt;slave-&gt;bond;</div><div class='add'>+</div><div class='add'>+	if (bond-&gt;params.broadcast_neighbor &amp;&amp; rtnl_trylock()) {</div><div class='add'>+		bond-&gt;send_peer_notif = bond-&gt;params.num_peer_notif *</div><div class='add'>+			max(1, bond-&gt;params.peer_notif_delay);</div><div class='add'>+		rtnl_unlock();</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * ad_mux_machine - handle a port's mux state machine</div><div class='ctx'>  * @port: the port we're looking at</div><div class='hunk'>@@ -847,6 +1022,7 @@ static int ad_marker_send(struct port *port, struct bond_marker *marker)</div><div class='ctx'>  */</div><div class='ctx'> static void ad_mux_machine(struct port *port, bool *update_slave_arr)</div><div class='ctx'> {</div><div class='add'>+	struct bonding *bond = __get_bond_by_port(port);</div><div class='ctx'> 	mux_states_t last_state;</div><div class='ctx'> </div><div class='ctx'> 	/* keep current State Machine state to compare later if it was</div><div class='hunk'>@@ -902,11 +1078,15 @@ static void ad_mux_machine(struct port *port, bool *update_slave_arr)</div><div class='ctx'> 			 * edable port will take place only after this timer)</div><div class='ctx'> 			 */</div><div class='ctx'> 			if ((port-&gt;sm_vars &amp; AD_PORT_SELECTED) &amp;&amp;</div><div class='del'>-			    (port-&gt;partner_oper.port_state &amp; AD_STATE_SYNCHRONIZATION) &amp;&amp;</div><div class='add'>+			    (port-&gt;partner_oper.port_state &amp; LACP_STATE_SYNCHRONIZATION) &amp;&amp;</div><div class='ctx'> 			    !__check_agg_selection_timer(port)) {</div><div class='del'>-				if (port-&gt;aggregator-&gt;is_active)</div><div class='del'>-					port-&gt;sm_mux_state =</div><div class='del'>-					    AD_MUX_COLLECTING_DISTRIBUTING;</div><div class='add'>+				if (port-&gt;aggregator-&gt;is_active) {</div><div class='add'>+					int state = AD_MUX_COLLECTING_DISTRIBUTING;</div><div class='add'>+</div><div class='add'>+					if (!bond-&gt;params.coupled_control)</div><div class='add'>+						state = AD_MUX_COLLECTING;</div><div class='add'>+					port-&gt;sm_mux_state = state;</div><div class='add'>+				}</div><div class='ctx'> 			} else if (!(port-&gt;sm_vars &amp; AD_PORT_SELECTED) ||</div><div class='ctx'> 				   (port-&gt;sm_vars &amp; AD_PORT_STANDBY)) {</div><div class='ctx'> 				/* if UNSELECTED or STANDBY */</div><div class='hunk'>@@ -920,15 +1100,49 @@ static void ad_mux_machine(struct port *port, bool *update_slave_arr)</div><div class='ctx'> 				port-&gt;sm_mux_state = AD_MUX_DETACHED;</div><div class='ctx'> 			} else if (port-&gt;aggregator-&gt;is_active) {</div><div class='ctx'> 				port-&gt;actor_oper_port_state |=</div><div class='del'>-				    AD_STATE_SYNCHRONIZATION;</div><div class='add'>+				    LACP_STATE_SYNCHRONIZATION;</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='ctx'> 		case AD_MUX_COLLECTING_DISTRIBUTING:</div><div class='add'>+			if (!__port_move_to_attached_state(port)) {</div><div class='add'>+				/* if port state hasn't changed make</div><div class='add'>+				 * sure that a collecting distributing</div><div class='add'>+				 * port in an active aggregator is enabled</div><div class='add'>+				 */</div><div class='add'>+				if (port-&gt;aggregator-&gt;is_active &amp;&amp;</div><div class='add'>+				    !__port_is_collecting_distributing(port)) {</div><div class='add'>+					__enable_port(port);</div><div class='add'>+					*update_slave_arr = true;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		case AD_MUX_COLLECTING:</div><div class='add'>+			if (!__port_move_to_attached_state(port)) {</div><div class='add'>+				if ((port-&gt;sm_vars &amp; AD_PORT_SELECTED) &amp;&amp;</div><div class='add'>+				    (port-&gt;partner_oper.port_state &amp; LACP_STATE_SYNCHRONIZATION) &amp;&amp;</div><div class='add'>+				    (port-&gt;partner_oper.port_state &amp; LACP_STATE_COLLECTING)) {</div><div class='add'>+					port-&gt;sm_mux_state = AD_MUX_DISTRIBUTING;</div><div class='add'>+				} else {</div><div class='add'>+					/* If port state hasn't changed, make sure that a collecting</div><div class='add'>+					 * port is enabled for an active aggregator.</div><div class='add'>+					 */</div><div class='add'>+					struct slave *slave = port-&gt;slave;</div><div class='add'>+</div><div class='add'>+					if (port-&gt;aggregator-&gt;is_active &amp;&amp;</div><div class='add'>+					    bond_is_slave_rx_disabled(slave)) {</div><div class='add'>+						ad_enable_collecting(port);</div><div class='add'>+						*update_slave_arr = true;</div><div class='add'>+					}</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		case AD_MUX_DISTRIBUTING:</div><div class='ctx'> 			if (!(port-&gt;sm_vars &amp; AD_PORT_SELECTED) ||</div><div class='ctx'> 			    (port-&gt;sm_vars &amp; AD_PORT_STANDBY) ||</div><div class='del'>-			    !(port-&gt;partner_oper.port_state &amp; AD_STATE_SYNCHRONIZATION) ||</div><div class='del'>-			    !(port-&gt;actor_oper_port_state &amp; AD_STATE_SYNCHRONIZATION)) {</div><div class='del'>-				port-&gt;sm_mux_state = AD_MUX_ATTACHED;</div><div class='add'>+			    !(port-&gt;partner_oper.port_state &amp; LACP_STATE_COLLECTING) ||</div><div class='add'>+			    !(port-&gt;partner_oper.port_state &amp; LACP_STATE_SYNCHRONIZATION) ||</div><div class='add'>+			    !(port-&gt;actor_oper_port_state &amp; LACP_STATE_SYNCHRONIZATION)) {</div><div class='add'>+				port-&gt;sm_mux_state = AD_MUX_COLLECTING;</div><div class='ctx'> 			} else {</div><div class='ctx'> 				/* if port state hasn't changed make</div><div class='ctx'> 				 * sure that a collecting distributing</div><div class='hunk'>@@ -936,9 +1150,9 @@ static void ad_mux_machine(struct port *port, bool *update_slave_arr)</div><div class='ctx'> 				 */</div><div class='ctx'> 				if (port-&gt;aggregator &amp;&amp;</div><div class='ctx'> 				    port-&gt;aggregator-&gt;is_active &amp;&amp;</div><div class='del'>-				    !__port_is_enabled(port)) {</div><div class='del'>-</div><div class='add'>+				    !__port_is_collecting_distributing(port)) {</div><div class='ctx'> 					__enable_port(port);</div><div class='add'>+					*update_slave_arr = true;</div><div class='ctx'> 				}</div><div class='ctx'> 			}</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -949,18 +1163,18 @@ static void ad_mux_machine(struct port *port, bool *update_slave_arr)</div><div class='ctx'> </div><div class='ctx'> 	/* check if the state machine was changed */</div><div class='ctx'> 	if (port-&gt;sm_mux_state != last_state) {</div><div class='del'>-		pr_debug("Mux Machine: Port=%d (%s), Last State=%d, Curr State=%d\n",</div><div class='del'>-			 port-&gt;actor_port_number,</div><div class='del'>-			 port-&gt;slave-&gt;dev-&gt;name,</div><div class='del'>-			 last_state,</div><div class='del'>-			 port-&gt;sm_mux_state);</div><div class='add'>+		slave_dbg(port-&gt;slave-&gt;bond-&gt;dev, port-&gt;slave-&gt;dev,</div><div class='add'>+			  "Mux Machine: Port=%d, Last State=%d, Curr State=%d\n",</div><div class='add'>+			  port-&gt;actor_port_number,</div><div class='add'>+			  last_state,</div><div class='add'>+			  port-&gt;sm_mux_state);</div><div class='ctx'> 		switch (port-&gt;sm_mux_state) {</div><div class='ctx'> 		case AD_MUX_DETACHED:</div><div class='del'>-			port-&gt;actor_oper_port_state &amp;= ~AD_STATE_SYNCHRONIZATION;</div><div class='add'>+			port-&gt;actor_oper_port_state &amp;= ~LACP_STATE_SYNCHRONIZATION;</div><div class='ctx'> 			ad_disable_collecting_distributing(port,</div><div class='ctx'> 							   update_slave_arr);</div><div class='del'>-			port-&gt;actor_oper_port_state &amp;= ~AD_STATE_COLLECTING;</div><div class='del'>-			port-&gt;actor_oper_port_state &amp;= ~AD_STATE_DISTRIBUTING;</div><div class='add'>+			port-&gt;actor_oper_port_state &amp;= ~LACP_STATE_COLLECTING;</div><div class='add'>+			port-&gt;actor_oper_port_state &amp;= ~LACP_STATE_DISTRIBUTING;</div><div class='ctx'> 			port-&gt;ntt = true;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case AD_MUX_WAITING:</div><div class='hunk'>@@ -969,24 +1183,38 @@ static void ad_mux_machine(struct port *port, bool *update_slave_arr)</div><div class='ctx'> 		case AD_MUX_ATTACHED:</div><div class='ctx'> 			if (port-&gt;aggregator-&gt;is_active)</div><div class='ctx'> 				port-&gt;actor_oper_port_state |=</div><div class='del'>-				    AD_STATE_SYNCHRONIZATION;</div><div class='add'>+				    LACP_STATE_SYNCHRONIZATION;</div><div class='ctx'> 			else</div><div class='ctx'> 				port-&gt;actor_oper_port_state &amp;=</div><div class='del'>-				    ~AD_STATE_SYNCHRONIZATION;</div><div class='del'>-			port-&gt;actor_oper_port_state &amp;= ~AD_STATE_COLLECTING;</div><div class='del'>-			port-&gt;actor_oper_port_state &amp;= ~AD_STATE_DISTRIBUTING;</div><div class='add'>+				    ~LACP_STATE_SYNCHRONIZATION;</div><div class='add'>+			port-&gt;actor_oper_port_state &amp;= ~LACP_STATE_COLLECTING;</div><div class='add'>+			port-&gt;actor_oper_port_state &amp;= ~LACP_STATE_DISTRIBUTING;</div><div class='ctx'> 			ad_disable_collecting_distributing(port,</div><div class='ctx'> 							   update_slave_arr);</div><div class='ctx'> 			port-&gt;ntt = true;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case AD_MUX_COLLECTING_DISTRIBUTING:</div><div class='del'>-			port-&gt;actor_oper_port_state |= AD_STATE_COLLECTING;</div><div class='del'>-			port-&gt;actor_oper_port_state |= AD_STATE_DISTRIBUTING;</div><div class='del'>-			port-&gt;actor_oper_port_state |= AD_STATE_SYNCHRONIZATION;</div><div class='add'>+			port-&gt;actor_oper_port_state |= LACP_STATE_COLLECTING;</div><div class='add'>+			port-&gt;actor_oper_port_state |= LACP_STATE_DISTRIBUTING;</div><div class='add'>+			port-&gt;actor_oper_port_state |= LACP_STATE_SYNCHRONIZATION;</div><div class='ctx'> 			ad_enable_collecting_distributing(port,</div><div class='ctx'> 							  update_slave_arr);</div><div class='ctx'> 			port-&gt;ntt = true;</div><div class='ctx'> 			break;</div><div class='add'>+		case AD_MUX_COLLECTING:</div><div class='add'>+			port-&gt;actor_oper_port_state |= LACP_STATE_COLLECTING;</div><div class='add'>+			port-&gt;actor_oper_port_state &amp;= ~LACP_STATE_DISTRIBUTING;</div><div class='add'>+			port-&gt;actor_oper_port_state |= LACP_STATE_SYNCHRONIZATION;</div><div class='add'>+			ad_enable_collecting(port);</div><div class='add'>+			ad_disable_distributing(port, update_slave_arr);</div><div class='add'>+			port-&gt;ntt = true;</div><div class='add'>+			break;</div><div class='add'>+		case AD_MUX_DISTRIBUTING:</div><div class='add'>+			port-&gt;actor_oper_port_state |= LACP_STATE_DISTRIBUTING;</div><div class='add'>+			port-&gt;actor_oper_port_state |= LACP_STATE_SYNCHRONIZATION;</div><div class='add'>+			ad_enable_collecting_distributing(port,</div><div class='add'>+							  update_slave_arr);</div><div class='add'>+			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1011,6 +1239,10 @@ static void ad_rx_machine(struct lacpdu *lacpdu, struct port *port)</div><div class='ctx'> 	 */</div><div class='ctx'> 	last_state = port-&gt;sm_rx_state;</div><div class='ctx'> </div><div class='add'>+	if (lacpdu) {</div><div class='add'>+		atomic64_inc(&amp;SLAVE_AD_INFO(port-&gt;slave)-&gt;stats.lacpdu_rx);</div><div class='add'>+		atomic64_inc(&amp;BOND_AD_INFO(port-&gt;slave-&gt;bond).stats.lacpdu_rx);</div><div class='add'>+	}</div><div class='ctx'> 	/* check if state machine should change state */</div><div class='ctx'> </div><div class='ctx'> 	/* first, check if port was reinitialized */</div><div class='hunk'>@@ -1018,8 +1250,7 @@ static void ad_rx_machine(struct lacpdu *lacpdu, struct port *port)</div><div class='ctx'> 		port-&gt;sm_rx_state = AD_RX_INITIALIZE;</div><div class='ctx'> 		port-&gt;sm_vars |= AD_PORT_CHURNED;</div><div class='ctx'> 	/* check if port is not enabled */</div><div class='del'>-	} else if (!(port-&gt;sm_vars &amp; AD_PORT_BEGIN)</div><div class='del'>-		 &amp;&amp; !port-&gt;is_enabled &amp;&amp; !(port-&gt;sm_vars &amp; AD_PORT_MOVED))</div><div class='add'>+	} else if (!(port-&gt;sm_vars &amp; AD_PORT_BEGIN) &amp;&amp; !port-&gt;is_enabled)</div><div class='ctx'> 		port-&gt;sm_rx_state = AD_RX_PORT_DISABLED;</div><div class='ctx'> 	/* check if new lacpdu arrived */</div><div class='ctx'> 	else if (lacpdu &amp;&amp; ((port-&gt;sm_rx_state == AD_RX_EXPIRED) ||</div><div class='hunk'>@@ -1047,11 +1278,8 @@ static void ad_rx_machine(struct lacpdu *lacpdu, struct port *port)</div><div class='ctx'> 			/* if no lacpdu arrived and no timer is on */</div><div class='ctx'> 			switch (port-&gt;sm_rx_state) {</div><div class='ctx'> 			case AD_RX_PORT_DISABLED:</div><div class='del'>-				if (port-&gt;sm_vars &amp; AD_PORT_MOVED)</div><div class='del'>-					port-&gt;sm_rx_state = AD_RX_INITIALIZE;</div><div class='del'>-				else if (port-&gt;is_enabled</div><div class='del'>-					 &amp;&amp; (port-&gt;sm_vars</div><div class='del'>-					     &amp; AD_PORT_LACP_ENABLED))</div><div class='add'>+				if (port-&gt;is_enabled &amp;&amp;</div><div class='add'>+				    (port-&gt;sm_vars &amp; AD_PORT_LACP_ENABLED))</div><div class='ctx'> 					port-&gt;sm_rx_state = AD_RX_EXPIRED;</div><div class='ctx'> 				else if (port-&gt;is_enabled</div><div class='ctx'> 					 &amp;&amp; ((port-&gt;sm_vars</div><div class='hunk'>@@ -1067,11 +1295,11 @@ static void ad_rx_machine(struct lacpdu *lacpdu, struct port *port)</div><div class='ctx'> </div><div class='ctx'> 	/* check if the State machine was changed or new lacpdu arrived */</div><div class='ctx'> 	if ((port-&gt;sm_rx_state != last_state) || (lacpdu)) {</div><div class='del'>-		pr_debug("Rx Machine: Port=%d (%s), Last State=%d, Curr State=%d\n",</div><div class='del'>-			 port-&gt;actor_port_number,</div><div class='del'>-			 port-&gt;slave-&gt;dev-&gt;name,</div><div class='del'>-			 last_state,</div><div class='del'>-			 port-&gt;sm_rx_state);</div><div class='add'>+		slave_dbg(port-&gt;slave-&gt;bond-&gt;dev, port-&gt;slave-&gt;dev,</div><div class='add'>+			  "Rx Machine: Port=%d, Last State=%d, Curr State=%d\n",</div><div class='add'>+			  port-&gt;actor_port_number,</div><div class='add'>+			  last_state,</div><div class='add'>+			  port-&gt;sm_rx_state);</div><div class='ctx'> 		switch (port-&gt;sm_rx_state) {</div><div class='ctx'> 		case AD_RX_INITIALIZE:</div><div class='ctx'> 			if (!(port-&gt;actor_oper_port_key &amp; AD_DUPLEX_KEY_MASKS))</div><div class='hunk'>@@ -1080,20 +1308,19 @@ static void ad_rx_machine(struct lacpdu *lacpdu, struct port *port)</div><div class='ctx'> 				port-&gt;sm_vars |= AD_PORT_LACP_ENABLED;</div><div class='ctx'> 			port-&gt;sm_vars &amp;= ~AD_PORT_SELECTED;</div><div class='ctx'> 			__record_default(port);</div><div class='del'>-			port-&gt;actor_oper_port_state &amp;= ~AD_STATE_EXPIRED;</div><div class='del'>-			port-&gt;sm_vars &amp;= ~AD_PORT_MOVED;</div><div class='add'>+			port-&gt;actor_oper_port_state &amp;= ~LACP_STATE_EXPIRED;</div><div class='ctx'> 			port-&gt;sm_rx_state = AD_RX_PORT_DISABLED;</div><div class='ctx'> </div><div class='del'>-			/* Fall Through */</div><div class='add'>+			fallthrough;</div><div class='ctx'> 		case AD_RX_PORT_DISABLED:</div><div class='ctx'> 			port-&gt;sm_vars &amp;= ~AD_PORT_MATCHED;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case AD_RX_LACP_DISABLED:</div><div class='ctx'> 			port-&gt;sm_vars &amp;= ~AD_PORT_SELECTED;</div><div class='ctx'> 			__record_default(port);</div><div class='del'>-			port-&gt;partner_oper.port_state &amp;= ~AD_STATE_AGGREGATION;</div><div class='add'>+			port-&gt;partner_oper.port_state &amp;= ~LACP_STATE_AGGREGATION;</div><div class='ctx'> 			port-&gt;sm_vars |= AD_PORT_MATCHED;</div><div class='del'>-			port-&gt;actor_oper_port_state &amp;= ~AD_STATE_EXPIRED;</div><div class='add'>+			port-&gt;actor_oper_port_state &amp;= ~LACP_STATE_EXPIRED;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case AD_RX_EXPIRED:</div><div class='ctx'> 			/* Reset of the Synchronization flag (Standard 43.4.12)</div><div class='hunk'>@@ -1102,34 +1329,39 @@ static void ad_rx_machine(struct lacpdu *lacpdu, struct port *port)</div><div class='ctx'> 			 * case of EXPIRED even if LINK_DOWN didn't arrive for</div><div class='ctx'> 			 * the port.</div><div class='ctx'> 			 */</div><div class='del'>-			port-&gt;partner_oper.port_state &amp;= ~AD_STATE_SYNCHRONIZATION;</div><div class='ctx'> 			port-&gt;sm_vars &amp;= ~AD_PORT_MATCHED;</div><div class='del'>-			port-&gt;partner_oper.port_state |= AD_STATE_LACP_TIMEOUT;</div><div class='del'>-			port-&gt;partner_oper.port_state |= AD_STATE_LACP_ACTIVITY;</div><div class='add'>+			/* Based on IEEE 8021AX-2014, Figure 6-18 - Receive</div><div class='add'>+			 * machine state diagram, the statue should be</div><div class='add'>+			 * Partner_Oper_Port_State.Synchronization = FALSE;</div><div class='add'>+			 * Partner_Oper_Port_State.LACP_Timeout = Short Timeout;</div><div class='add'>+			 * start current_while_timer(Short Timeout);</div><div class='add'>+			 * Actor_Oper_Port_State.Expired = TRUE;</div><div class='add'>+			 */</div><div class='add'>+			port-&gt;partner_oper.port_state &amp;= ~LACP_STATE_SYNCHRONIZATION;</div><div class='add'>+			port-&gt;partner_oper.port_state |= LACP_STATE_LACP_TIMEOUT;</div><div class='ctx'> 			port-&gt;sm_rx_timer_counter = __ad_timer_to_ticks(AD_CURRENT_WHILE_TIMER, (u16)(AD_SHORT_TIMEOUT));</div><div class='del'>-			port-&gt;actor_oper_port_state |= AD_STATE_EXPIRED;</div><div class='add'>+			port-&gt;actor_oper_port_state |= LACP_STATE_EXPIRED;</div><div class='ctx'> 			port-&gt;sm_vars |= AD_PORT_CHURNED;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case AD_RX_DEFAULTED:</div><div class='ctx'> 			__update_default_selected(port);</div><div class='ctx'> 			__record_default(port);</div><div class='ctx'> 			port-&gt;sm_vars |= AD_PORT_MATCHED;</div><div class='del'>-			port-&gt;actor_oper_port_state &amp;= ~AD_STATE_EXPIRED;</div><div class='add'>+			port-&gt;actor_oper_port_state &amp;= ~LACP_STATE_EXPIRED;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case AD_RX_CURRENT:</div><div class='ctx'> 			/* detect loopback situation */</div><div class='ctx'> 			if (MAC_ADDRESS_EQUAL(&amp;(lacpdu-&gt;actor_system),</div><div class='ctx'> 					      &amp;(port-&gt;actor_system))) {</div><div class='del'>-				netdev_err(port-&gt;slave-&gt;bond-&gt;dev, "An illegal loopback occurred on adapter (%s)\n"</div><div class='del'>-				       "Check the configuration to verify that all adapters are connected to 802.3ad compliant switch ports\n",</div><div class='del'>-				       port-&gt;slave-&gt;dev-&gt;name);</div><div class='add'>+				slave_err(port-&gt;slave-&gt;bond-&gt;dev, port-&gt;slave-&gt;dev, "An illegal loopback occurred on slave\n"</div><div class='add'>+					  "Check the configuration to verify that all adapters are connected to 802.3ad compliant switch ports\n");</div><div class='ctx'> 				return;</div><div class='ctx'> 			}</div><div class='ctx'> 			__update_selected(lacpdu, port);</div><div class='ctx'> 			__update_ntt(lacpdu, port);</div><div class='ctx'> 			__record_pdu(lacpdu, port);</div><div class='del'>-			port-&gt;sm_rx_timer_counter = __ad_timer_to_ticks(AD_CURRENT_WHILE_TIMER, (u16)(port-&gt;actor_oper_port_state &amp; AD_STATE_LACP_TIMEOUT));</div><div class='del'>-			port-&gt;actor_oper_port_state &amp;= ~AD_STATE_EXPIRED;</div><div class='add'>+			port-&gt;sm_rx_timer_counter = __ad_timer_to_ticks(AD_CURRENT_WHILE_TIMER, (u16)(port-&gt;actor_oper_port_state &amp; LACP_STATE_LACP_TIMEOUT));</div><div class='add'>+			port-&gt;actor_oper_port_state &amp;= ~LACP_STATE_EXPIRED;</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -1150,14 +1382,14 @@ static void ad_churn_machine(struct port *port)</div><div class='ctx'> 		port-&gt;sm_churn_partner_state = AD_CHURN_MONITOR;</div><div class='ctx'> 		port-&gt;sm_churn_actor_timer_counter =</div><div class='ctx'> 			__ad_timer_to_ticks(AD_ACTOR_CHURN_TIMER, 0);</div><div class='del'>-		 port-&gt;sm_churn_partner_timer_counter =</div><div class='add'>+		port-&gt;sm_churn_partner_timer_counter =</div><div class='ctx'> 			 __ad_timer_to_ticks(AD_PARTNER_CHURN_TIMER, 0);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (port-&gt;sm_churn_actor_timer_counter &amp;&amp;</div><div class='ctx'> 	    !(--port-&gt;sm_churn_actor_timer_counter) &amp;&amp;</div><div class='ctx'> 	    port-&gt;sm_churn_actor_state == AD_CHURN_MONITOR) {</div><div class='del'>-		if (port-&gt;actor_oper_port_state &amp; AD_STATE_SYNCHRONIZATION) {</div><div class='add'>+		if (port-&gt;actor_oper_port_state &amp; LACP_STATE_SYNCHRONIZATION) {</div><div class='ctx'> 			port-&gt;sm_churn_actor_state = AD_NO_CHURN;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			port-&gt;churn_actor_count++;</div><div class='hunk'>@@ -1167,7 +1399,7 @@ static void ad_churn_machine(struct port *port)</div><div class='ctx'> 	if (port-&gt;sm_churn_partner_timer_counter &amp;&amp;</div><div class='ctx'> 	    !(--port-&gt;sm_churn_partner_timer_counter) &amp;&amp;</div><div class='ctx'> 	    port-&gt;sm_churn_partner_state == AD_CHURN_MONITOR) {</div><div class='del'>-		if (port-&gt;partner_oper.port_state &amp; AD_STATE_SYNCHRONIZATION) {</div><div class='add'>+		if (port-&gt;partner_oper.port_state &amp; LACP_STATE_SYNCHRONIZATION) {</div><div class='ctx'> 			port-&gt;sm_churn_partner_state = AD_NO_CHURN;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			port-&gt;churn_partner_count++;</div><div class='hunk'>@@ -1185,25 +1417,28 @@ static void ad_tx_machine(struct port *port)</div><div class='ctx'> 	/* check if tx timer expired, to verify that we do not send more than</div><div class='ctx'> 	 * 3 packets per second</div><div class='ctx'> 	 */</div><div class='del'>-	if (port-&gt;sm_tx_timer_counter &amp;&amp; !(--port-&gt;sm_tx_timer_counter)) {</div><div class='add'>+	if (!port-&gt;sm_tx_timer_counter || !(--port-&gt;sm_tx_timer_counter)) {</div><div class='ctx'> 		/* check if there is something to send */</div><div class='ctx'> 		if (port-&gt;ntt &amp;&amp; (port-&gt;sm_vars &amp; AD_PORT_LACP_ENABLED)) {</div><div class='ctx'> 			__update_lacpdu_from_port(port);</div><div class='ctx'> </div><div class='ctx'> 			if (ad_lacpdu_send(port) &gt;= 0) {</div><div class='del'>-				pr_debug("Sent LACPDU on port %d\n",</div><div class='del'>-					 port-&gt;actor_port_number);</div><div class='add'>+				slave_dbg(port-&gt;slave-&gt;bond-&gt;dev,</div><div class='add'>+					  port-&gt;slave-&gt;dev,</div><div class='add'>+					  "Sent LACPDU on port %d\n",</div><div class='add'>+					  port-&gt;actor_port_number);</div><div class='ctx'> </div><div class='ctx'> 				/* mark ntt as false, so it will not be sent</div><div class='ctx'> 				 * again until demanded</div><div class='ctx'> 				 */</div><div class='ctx'> 				port-&gt;ntt = false;</div><div class='add'>+</div><div class='add'>+				/* restart tx timer(to verify that we will not</div><div class='add'>+				 * exceed AD_MAX_TX_IN_SECOND</div><div class='add'>+				 */</div><div class='add'>+				port-&gt;sm_tx_timer_counter = ad_ticks_per_sec / AD_MAX_TX_IN_SECOND;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='del'>-		/* restart tx timer(to verify that we will not exceed</div><div class='del'>-		 * AD_MAX_TX_IN_SECOND</div><div class='del'>-		 */</div><div class='del'>-		port-&gt;sm_tx_timer_counter = ad_ticks_per_sec/AD_MAX_TX_IN_SECOND;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1222,8 +1457,7 @@ static void ad_periodic_machine(struct port *port)</div><div class='ctx'> </div><div class='ctx'> 	/* check if port was reinitialized */</div><div class='ctx'> 	if (((port-&gt;sm_vars &amp; AD_PORT_BEGIN) || !(port-&gt;sm_vars &amp; AD_PORT_LACP_ENABLED) || !port-&gt;is_enabled) ||</div><div class='del'>-	    (!(port-&gt;actor_oper_port_state &amp; AD_STATE_LACP_ACTIVITY) &amp;&amp; !(port-&gt;partner_oper.port_state &amp; AD_STATE_LACP_ACTIVITY))</div><div class='del'>-	   ) {</div><div class='add'>+	    (!(port-&gt;actor_oper_port_state &amp; LACP_STATE_LACP_ACTIVITY) &amp;&amp; !(port-&gt;partner_oper.port_state &amp; LACP_STATE_LACP_ACTIVITY))) {</div><div class='ctx'> 		port-&gt;sm_periodic_state = AD_NO_PERIODIC;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* check if state machine should change state */</div><div class='hunk'>@@ -1239,11 +1473,11 @@ static void ad_periodic_machine(struct port *port)</div><div class='ctx'> 			switch (port-&gt;sm_periodic_state) {</div><div class='ctx'> 			case AD_FAST_PERIODIC:</div><div class='ctx'> 				if (!(port-&gt;partner_oper.port_state</div><div class='del'>-				      &amp; AD_STATE_LACP_TIMEOUT))</div><div class='add'>+				      &amp; LACP_STATE_LACP_TIMEOUT))</div><div class='ctx'> 					port-&gt;sm_periodic_state = AD_SLOW_PERIODIC;</div><div class='ctx'> 				break;</div><div class='ctx'> 			case AD_SLOW_PERIODIC:</div><div class='del'>-				if ((port-&gt;partner_oper.port_state &amp; AD_STATE_LACP_TIMEOUT)) {</div><div class='add'>+				if ((port-&gt;partner_oper.port_state &amp; LACP_STATE_LACP_TIMEOUT)) {</div><div class='ctx'> 					port-&gt;sm_periodic_timer_counter = 0;</div><div class='ctx'> 					port-&gt;sm_periodic_state = AD_PERIODIC_TX;</div><div class='ctx'> 				}</div><div class='hunk'>@@ -1259,7 +1493,7 @@ static void ad_periodic_machine(struct port *port)</div><div class='ctx'> 			break;</div><div class='ctx'> 		case AD_PERIODIC_TX:</div><div class='ctx'> 			if (!(port-&gt;partner_oper.port_state &amp;</div><div class='del'>-			    AD_STATE_LACP_TIMEOUT))</div><div class='add'>+			    LACP_STATE_LACP_TIMEOUT))</div><div class='ctx'> 				port-&gt;sm_periodic_state = AD_SLOW_PERIODIC;</div><div class='ctx'> 			else</div><div class='ctx'> 				port-&gt;sm_periodic_state = AD_FAST_PERIODIC;</div><div class='hunk'>@@ -1271,9 +1505,10 @@ static void ad_periodic_machine(struct port *port)</div><div class='ctx'> </div><div class='ctx'> 	/* check if the state machine was changed */</div><div class='ctx'> 	if (port-&gt;sm_periodic_state != last_state) {</div><div class='del'>-		pr_debug("Periodic Machine: Port=%d, Last State=%d, Curr State=%d\n",</div><div class='del'>-			 port-&gt;actor_port_number, last_state,</div><div class='del'>-			 port-&gt;sm_periodic_state);</div><div class='add'>+		slave_dbg(port-&gt;slave-&gt;bond-&gt;dev, port-&gt;slave-&gt;dev,</div><div class='add'>+			  "Periodic Machine: Port=%d, Last State=%d, Curr State=%d\n",</div><div class='add'>+			  port-&gt;actor_port_number, last_state,</div><div class='add'>+			  port-&gt;sm_periodic_state);</div><div class='ctx'> 		switch (port-&gt;sm_periodic_state) {</div><div class='ctx'> 		case AD_NO_PERIODIC:</div><div class='ctx'> 			port-&gt;sm_periodic_timer_counter = 0;</div><div class='hunk'>@@ -1349,9 +1584,9 @@ static void ad_port_selection_logic(struct port *port, bool *update_slave_arr)</div><div class='ctx'> 				port-&gt;next_port_in_aggregator = NULL;</div><div class='ctx'> 				port-&gt;actor_port_aggregator_identifier = 0;</div><div class='ctx'> </div><div class='del'>-				netdev_dbg(bond-&gt;dev, "Port %d left LAG %d\n",</div><div class='del'>-					   port-&gt;actor_port_number,</div><div class='del'>-					   temp_aggregator-&gt;aggregator_identifier);</div><div class='add'>+				slave_dbg(bond-&gt;dev, port-&gt;slave-&gt;dev, "Port %d left LAG %d\n",</div><div class='add'>+					  port-&gt;actor_port_number,</div><div class='add'>+					  temp_aggregator-&gt;aggregator_identifier);</div><div class='ctx'> 				/* if the aggregator is empty, clear its</div><div class='ctx'> 				 * parameters, and set it ready to be attached</div><div class='ctx'> 				 */</div><div class='hunk'>@@ -1364,10 +1599,10 @@ static void ad_port_selection_logic(struct port *port, bool *update_slave_arr)</div><div class='ctx'> 			/* meaning: the port was related to an aggregator</div><div class='ctx'> 			 * but was not on the aggregator port list</div><div class='ctx'> 			 */</div><div class='del'>-			net_warn_ratelimited("%s: Warning: Port %d (on %s) was related to aggregator %d but was not on its port list\n",</div><div class='add'>+			net_warn_ratelimited("%s: (slave %s): Warning: Port %d was related to aggregator %d but was not on its port list\n",</div><div class='ctx'> 					     port-&gt;slave-&gt;bond-&gt;dev-&gt;name,</div><div class='del'>-					     port-&gt;actor_port_number,</div><div class='ctx'> 					     port-&gt;slave-&gt;dev-&gt;name,</div><div class='add'>+					     port-&gt;actor_port_number,</div><div class='ctx'> 					     port-&gt;aggregator-&gt;aggregator_identifier);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1387,7 +1622,7 @@ static void ad_port_selection_logic(struct port *port, bool *update_slave_arr)</div><div class='ctx'> 		     (aggregator-&gt;partner_system_priority == port-&gt;partner_oper.system_priority) &amp;&amp;</div><div class='ctx'> 		     (aggregator-&gt;partner_oper_aggregator_key == port-&gt;partner_oper.key)</div><div class='ctx'> 		    ) &amp;&amp;</div><div class='del'>-		    ((!MAC_ADDRESS_EQUAL(&amp;(port-&gt;partner_oper.system), &amp;(null_mac_addr)) &amp;&amp; /* partner answers */</div><div class='add'>+		    ((__agg_has_partner(aggregator) &amp;&amp; /* partner answers */</div><div class='ctx'> 		      !aggregator-&gt;is_individual)  /* but is not individual OR */</div><div class='ctx'> 		    )</div><div class='ctx'> 		   ) {</div><div class='hunk'>@@ -1398,9 +1633,9 @@ static void ad_port_selection_logic(struct port *port, bool *update_slave_arr)</div><div class='ctx'> 			port-&gt;next_port_in_aggregator = aggregator-&gt;lag_ports;</div><div class='ctx'> 			port-&gt;aggregator-&gt;num_of_ports++;</div><div class='ctx'> 			aggregator-&gt;lag_ports = port;</div><div class='del'>-			netdev_dbg(bond-&gt;dev, "Port %d joined LAG %d(existing LAG)\n",</div><div class='del'>-				   port-&gt;actor_port_number,</div><div class='del'>-				   port-&gt;aggregator-&gt;aggregator_identifier);</div><div class='add'>+			slave_dbg(bond-&gt;dev, slave-&gt;dev, "Port %d joined LAG %d (existing LAG)\n",</div><div class='add'>+				  port-&gt;actor_port_number,</div><div class='add'>+				  port-&gt;aggregator-&gt;aggregator_identifier);</div><div class='ctx'> </div><div class='ctx'> 			/* mark this port as selected */</div><div class='ctx'> 			port-&gt;sm_vars |= AD_PORT_SELECTED;</div><div class='hunk'>@@ -1445,12 +1680,14 @@ static void ad_port_selection_logic(struct port *port, bool *update_slave_arr)</div><div class='ctx'> 			/* mark this port as selected */</div><div class='ctx'> 			port-&gt;sm_vars |= AD_PORT_SELECTED;</div><div class='ctx'> </div><div class='del'>-			netdev_dbg(bond-&gt;dev, "Port %d joined LAG %d(new LAG)\n",</div><div class='del'>-				   port-&gt;actor_port_number,</div><div class='del'>-				   port-&gt;aggregator-&gt;aggregator_identifier);</div><div class='add'>+			slave_dbg(bond-&gt;dev, port-&gt;slave-&gt;dev, "Port %d joined LAG %d (new LAG)\n",</div><div class='add'>+				  port-&gt;actor_port_number,</div><div class='add'>+				  port-&gt;aggregator-&gt;aggregator_identifier);</div><div class='ctx'> 		} else {</div><div class='del'>-			netdev_err(bond-&gt;dev, "Port %d (on %s) did not find a suitable aggregator\n",</div><div class='del'>-			       port-&gt;actor_port_number, port-&gt;slave-&gt;dev-&gt;name);</div><div class='add'>+			slave_err(bond-&gt;dev, port-&gt;slave-&gt;dev,</div><div class='add'>+				  "Port %d did not find a suitable aggregator\n",</div><div class='add'>+				  port-&gt;actor_port_number);</div><div class='add'>+			return;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	/* if all aggregator's ports are READY_N == TRUE, set ready=TRUE</div><div class='hunk'>@@ -1464,7 +1701,7 @@ static void ad_port_selection_logic(struct port *port, bool *update_slave_arr)</div><div class='ctx'> 	ad_agg_selection_logic(aggregator, update_slave_arr);</div><div class='ctx'> </div><div class='ctx'> 	if (!port-&gt;aggregator-&gt;is_active)</div><div class='del'>-		port-&gt;actor_oper_port_state &amp;= ~AD_STATE_SYNCHRONIZATION;</div><div class='add'>+		port-&gt;actor_oper_port_state &amp;= ~LACP_STATE_SYNCHRONIZATION;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Decide if "agg" is a better choice for the new active aggregator that</div><div class='hunk'>@@ -1492,6 +1729,9 @@ static struct aggregator *ad_agg_selection_test(struct aggregator *best,</div><div class='ctx'> 	 * 4.  Therefore, current and best both have partner replies or</div><div class='ctx'> 	 *     both do not, so perform selection policy:</div><div class='ctx'> 	 *</div><div class='add'>+	 * BOND_AD_PRIO: Select by total priority of ports. If priority</div><div class='add'>+	 *     is equal, select by count.</div><div class='add'>+	 *</div><div class='ctx'> 	 * BOND_AD_COUNT: Select by count of ports.  If count is equal,</div><div class='ctx'> 	 *     select by bandwidth.</div><div class='ctx'> 	 *</div><div class='hunk'>@@ -1513,14 +1753,22 @@ static struct aggregator *ad_agg_selection_test(struct aggregator *best,</div><div class='ctx'> 		return best;</div><div class='ctx'> </div><div class='ctx'> 	switch (__get_agg_selection_mode(curr-&gt;lag_ports)) {</div><div class='add'>+	case BOND_AD_PRIO:</div><div class='add'>+		if (__agg_ports_priority(curr) &gt; __agg_ports_priority(best))</div><div class='add'>+			return curr;</div><div class='add'>+</div><div class='add'>+		if (__agg_ports_priority(curr) &lt; __agg_ports_priority(best))</div><div class='add'>+			return best;</div><div class='add'>+</div><div class='add'>+		fallthrough;</div><div class='ctx'> 	case BOND_AD_COUNT:</div><div class='del'>-		if (curr-&gt;num_of_ports &gt; best-&gt;num_of_ports)</div><div class='add'>+		if (__agg_active_ports(curr) &gt; __agg_active_ports(best))</div><div class='ctx'> 			return curr;</div><div class='ctx'> </div><div class='del'>-		if (curr-&gt;num_of_ports &lt; best-&gt;num_of_ports)</div><div class='add'>+		if (__agg_active_ports(curr) &lt; __agg_active_ports(best))</div><div class='ctx'> 			return best;</div><div class='ctx'> </div><div class='del'>-		/*FALLTHROUGH*/</div><div class='add'>+		fallthrough;</div><div class='ctx'> 	case BOND_AD_STABLE:</div><div class='ctx'> 	case BOND_AD_BANDWIDTH:</div><div class='ctx'> 		if (__get_agg_bandwidth(curr) &gt; __get_agg_bandwidth(best))</div><div class='hunk'>@@ -1529,8 +1777,9 @@ static struct aggregator *ad_agg_selection_test(struct aggregator *best,</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='del'>-		net_warn_ratelimited("%s: Impossible agg select mode %d\n",</div><div class='add'>+		net_warn_ratelimited("%s: (slave %s): Impossible agg select mode %d\n",</div><div class='ctx'> 				     curr-&gt;slave-&gt;bond-&gt;dev-&gt;name,</div><div class='add'>+				     curr-&gt;slave-&gt;dev-&gt;name,</div><div class='ctx'> 				     __get_agg_selection_mode(curr-&gt;lag_ports));</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1545,13 +1794,19 @@ static int agg_device_up(const struct aggregator *agg)</div><div class='ctx'> 	if (!port)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	return netif_running(port-&gt;slave-&gt;dev) &amp;&amp;</div><div class='del'>-	       netif_carrier_ok(port-&gt;slave-&gt;dev);</div><div class='add'>+	for (port = agg-&gt;lag_ports; port;</div><div class='add'>+	     port = port-&gt;next_port_in_aggregator) {</div><div class='add'>+		if (netif_running(port-&gt;slave-&gt;dev) &amp;&amp;</div><div class='add'>+		    netif_carrier_ok(port-&gt;slave-&gt;dev))</div><div class='add'>+			return 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * ad_agg_selection_logic - select an aggregation group for a team</div><div class='del'>- * @aggregator: the aggregator we're looking at</div><div class='add'>+ * @agg: the aggregator we're looking at</div><div class='ctx'>  * @update_slave_arr: Does slave array need update?</div><div class='ctx'>  *</div><div class='ctx'>  * It is assumed that only one aggregator may be selected for a team.</div><div class='hunk'>@@ -1571,6 +1826,10 @@ static int agg_device_up(const struct aggregator *agg)</div><div class='ctx'>  * (slaves), and reselect whenever a link state change takes place or the</div><div class='ctx'>  * set of slaves in the bond changes.</div><div class='ctx'>  *</div><div class='add'>+ * BOND_AD_PRIO: select the aggregator with highest total priority of ports</div><div class='add'>+ * (slaves), and reselect whenever a link state change takes place or the</div><div class='add'>+ * set of slaves in the bond changes.</div><div class='add'>+ *</div><div class='ctx'>  * FIXME: this function MUST be called with the first agg in the bond, or</div><div class='ctx'>  * __get_active_agg() won't work correctly. This function should be better</div><div class='ctx'>  * called with the bond itself, and retrieve the first agg from it.</div><div class='hunk'>@@ -1594,7 +1853,7 @@ static void ad_agg_selection_logic(struct aggregator *agg,</div><div class='ctx'> </div><div class='ctx'> 		agg-&gt;is_active = 0;</div><div class='ctx'> </div><div class='del'>-		if (agg-&gt;num_of_ports &amp;&amp; agg_device_up(agg))</div><div class='add'>+		if (__agg_active_ports(agg) &amp;&amp; agg_device_up(agg))</div><div class='ctx'> 			best = ad_agg_selection_test(best, agg);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1606,7 +1865,7 @@ static void ad_agg_selection_logic(struct aggregator *agg,</div><div class='ctx'> 		 * answering partner.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (active &amp;&amp; active-&gt;lag_ports &amp;&amp;</div><div class='del'>-		    active-&gt;lag_ports-&gt;is_enabled &amp;&amp;</div><div class='add'>+		    __agg_active_ports(active) &amp;&amp;</div><div class='ctx'> 		    (__agg_has_partner(active) ||</div><div class='ctx'> 		     (!__agg_has_partner(active) &amp;&amp;</div><div class='ctx'> 		     !__agg_has_partner(best)))) {</div><div class='hunk'>@@ -1625,36 +1884,37 @@ static void ad_agg_selection_logic(struct aggregator *agg,</div><div class='ctx'> </div><div class='ctx'> 	/* if there is new best aggregator, activate it */</div><div class='ctx'> 	if (best) {</div><div class='del'>-		netdev_dbg(bond-&gt;dev, "best Agg=%d; P=%d; a k=%d; p k=%d; Ind=%d; Act=%d\n",</div><div class='add'>+		netdev_dbg(bond-&gt;dev, "(slave %s): best Agg=%d; P=%d; a k=%d; p k=%d; Ind=%d; Act=%d\n",</div><div class='add'>+			   best-&gt;slave ? best-&gt;slave-&gt;dev-&gt;name : "NULL",</div><div class='ctx'> 			   best-&gt;aggregator_identifier, best-&gt;num_of_ports,</div><div class='ctx'> 			   best-&gt;actor_oper_aggregator_key,</div><div class='ctx'> 			   best-&gt;partner_oper_aggregator_key,</div><div class='ctx'> 			   best-&gt;is_individual, best-&gt;is_active);</div><div class='del'>-		netdev_dbg(bond-&gt;dev, "best ports %p slave %p %s\n",</div><div class='del'>-			   best-&gt;lag_ports, best-&gt;slave,</div><div class='del'>-			   best-&gt;slave ? best-&gt;slave-&gt;dev-&gt;name : "NULL");</div><div class='add'>+		netdev_dbg(bond-&gt;dev, "(slave %s): best ports %p slave %p\n",</div><div class='add'>+			   best-&gt;slave ? best-&gt;slave-&gt;dev-&gt;name : "NULL",</div><div class='add'>+			   best-&gt;lag_ports, best-&gt;slave);</div><div class='ctx'> </div><div class='ctx'> 		bond_for_each_slave_rcu(bond, slave, iter) {</div><div class='ctx'> 			agg = &amp;(SLAVE_AD_INFO(slave)-&gt;aggregator);</div><div class='ctx'> </div><div class='del'>-			netdev_dbg(bond-&gt;dev, "Agg=%d; P=%d; a k=%d; p k=%d; Ind=%d; Act=%d\n",</div><div class='del'>-				   agg-&gt;aggregator_identifier, agg-&gt;num_of_ports,</div><div class='del'>-				   agg-&gt;actor_oper_aggregator_key,</div><div class='del'>-				   agg-&gt;partner_oper_aggregator_key,</div><div class='del'>-				   agg-&gt;is_individual, agg-&gt;is_active);</div><div class='add'>+			slave_dbg(bond-&gt;dev, slave-&gt;dev, "Agg=%d; P=%d; a k=%d; p k=%d; Ind=%d; Act=%d\n",</div><div class='add'>+				  agg-&gt;aggregator_identifier, agg-&gt;num_of_ports,</div><div class='add'>+				  agg-&gt;actor_oper_aggregator_key,</div><div class='add'>+				  agg-&gt;partner_oper_aggregator_key,</div><div class='add'>+				  agg-&gt;is_individual, agg-&gt;is_active);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		/* check if any partner replys */</div><div class='del'>-		if (best-&gt;is_individual) {</div><div class='add'>+		/* check if any partner replies */</div><div class='add'>+		if (best-&gt;is_individual)</div><div class='ctx'> 			net_warn_ratelimited("%s: Warning: No 802.3ad response from the link partner for any adapters in the bond\n",</div><div class='del'>-					     best-&gt;slave ?</div><div class='del'>-					     best-&gt;slave-&gt;bond-&gt;dev-&gt;name : "NULL");</div><div class='del'>-		}</div><div class='add'>+					     bond-&gt;dev-&gt;name);</div><div class='ctx'> </div><div class='ctx'> 		best-&gt;is_active = 1;</div><div class='del'>-		netdev_dbg(bond-&gt;dev, "LAG %d chosen as the active LAG\n",</div><div class='add'>+		netdev_dbg(bond-&gt;dev, "(slave %s): LAG %d chosen as the active LAG\n",</div><div class='add'>+			   best-&gt;slave ? best-&gt;slave-&gt;dev-&gt;name : "NULL",</div><div class='ctx'> 			   best-&gt;aggregator_identifier);</div><div class='del'>-		netdev_dbg(bond-&gt;dev, "Agg=%d; P=%d; a k=%d; p k=%d; Ind=%d; Act=%d\n",</div><div class='add'>+		netdev_dbg(bond-&gt;dev, "(slave %s): Agg=%d; P=%d; a k=%d; p k=%d; Ind=%d; Act=%d\n",</div><div class='add'>+			   best-&gt;slave ? best-&gt;slave-&gt;dev-&gt;name : "NULL",</div><div class='ctx'> 			   best-&gt;aggregator_identifier, best-&gt;num_of_ports,</div><div class='ctx'> 			   best-&gt;actor_oper_aggregator_key,</div><div class='ctx'> 			   best-&gt;partner_oper_aggregator_key,</div><div class='hunk'>@@ -1684,6 +1944,7 @@ static void ad_agg_selection_logic(struct aggregator *agg,</div><div class='ctx'> 			     port = port-&gt;next_port_in_aggregator) {</div><div class='ctx'> 				__enable_port(port);</div><div class='ctx'> 			}</div><div class='add'>+			*update_slave_arr = true;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1702,7 +1963,7 @@ static void ad_clear_agg(struct aggregator *aggregator)</div><div class='ctx'> 		aggregator-&gt;is_individual = false;</div><div class='ctx'> 		aggregator-&gt;actor_admin_aggregator_key = 0;</div><div class='ctx'> 		aggregator-&gt;actor_oper_aggregator_key = 0;</div><div class='del'>-		aggregator-&gt;partner_system = null_mac_addr;</div><div class='add'>+		eth_zero_addr(aggregator-&gt;partner_system.mac_addr_value);</div><div class='ctx'> 		aggregator-&gt;partner_system_priority = 0;</div><div class='ctx'> 		aggregator-&gt;partner_oper_aggregator_key = 0;</div><div class='ctx'> 		aggregator-&gt;receive_state = 0;</div><div class='hunk'>@@ -1710,7 +1971,9 @@ static void ad_clear_agg(struct aggregator *aggregator)</div><div class='ctx'> 		aggregator-&gt;lag_ports = NULL;</div><div class='ctx'> 		aggregator-&gt;is_active = 0;</div><div class='ctx'> 		aggregator-&gt;num_of_ports = 0;</div><div class='del'>-		pr_debug("LAG %d was cleared\n",</div><div class='add'>+		pr_debug("%s: LAG %d was cleared\n",</div><div class='add'>+			 aggregator-&gt;slave ?</div><div class='add'>+			 aggregator-&gt;slave-&gt;dev-&gt;name : "NULL",</div><div class='ctx'> 			 aggregator-&gt;aggregator_identifier);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -1724,7 +1987,7 @@ static void ad_initialize_agg(struct aggregator *aggregator)</div><div class='ctx'> 	if (aggregator) {</div><div class='ctx'> 		ad_clear_agg(aggregator);</div><div class='ctx'> </div><div class='del'>-		aggregator-&gt;aggregator_mac_address = null_mac_addr;</div><div class='add'>+		eth_zero_addr(aggregator-&gt;aggregator_mac_address.mac_addr_value);</div><div class='ctx'> 		aggregator-&gt;aggregator_identifier = 0;</div><div class='ctx'> 		aggregator-&gt;slave = NULL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1732,17 +1995,17 @@ static void ad_initialize_agg(struct aggregator *aggregator)</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * ad_initialize_port - initialize a given port's parameters</div><div class='del'>- * @aggregator: the aggregator we're looking at</div><div class='del'>- * @lacp_fast: boolean. whether fast periodic should be used</div><div class='add'>+ * @port: the port we're looking at</div><div class='add'>+ * @bond_params: bond parameters we will use</div><div class='ctx'>  */</div><div class='del'>-static void ad_initialize_port(struct port *port, int lacp_fast)</div><div class='add'>+static void ad_initialize_port(struct port *port, const struct bond_params *bond_params)</div><div class='ctx'> {</div><div class='ctx'> 	static const struct port_params tmpl = {</div><div class='ctx'> 		.system_priority = 0xffff,</div><div class='ctx'> 		.key             = 1,</div><div class='ctx'> 		.port_number     = 1,</div><div class='ctx'> 		.port_priority   = 0xff,</div><div class='del'>-		.port_state      = 1,</div><div class='add'>+		.port_state      = 0,</div><div class='ctx'> 	};</div><div class='ctx'> 	static const struct lacpdu lacpdu = {</div><div class='ctx'> 		.subtype		= 0x01,</div><div class='hunk'>@@ -1760,13 +2023,15 @@ static void ad_initialize_port(struct port *port, int lacp_fast)</div><div class='ctx'> 		port-&gt;actor_port_priority = 0xff;</div><div class='ctx'> 		port-&gt;actor_port_aggregator_identifier = 0;</div><div class='ctx'> 		port-&gt;ntt = false;</div><div class='del'>-		port-&gt;actor_admin_port_state = AD_STATE_AGGREGATION |</div><div class='del'>-					       AD_STATE_LACP_ACTIVITY;</div><div class='del'>-		port-&gt;actor_oper_port_state  = AD_STATE_AGGREGATION |</div><div class='del'>-					       AD_STATE_LACP_ACTIVITY;</div><div class='add'>+		port-&gt;actor_admin_port_state = LACP_STATE_AGGREGATION;</div><div class='add'>+		port-&gt;actor_oper_port_state  = LACP_STATE_AGGREGATION;</div><div class='add'>+		if (bond_params-&gt;lacp_active) {</div><div class='add'>+			port-&gt;actor_admin_port_state |= LACP_STATE_LACP_ACTIVITY;</div><div class='add'>+			port-&gt;actor_oper_port_state  |= LACP_STATE_LACP_ACTIVITY;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-		if (lacp_fast)</div><div class='del'>-			port-&gt;actor_oper_port_state |= AD_STATE_LACP_TIMEOUT;</div><div class='add'>+		if (bond_params-&gt;lacp_fast)</div><div class='add'>+			port-&gt;actor_oper_port_state |= LACP_STATE_LACP_TIMEOUT;</div><div class='ctx'> </div><div class='ctx'> 		memcpy(&amp;port-&gt;partner_admin, &amp;tmpl, sizeof(tmpl));</div><div class='ctx'> 		memcpy(&amp;port-&gt;partner_oper, &amp;tmpl, sizeof(tmpl));</div><div class='hunk'>@@ -1797,6 +2062,43 @@ static void ad_initialize_port(struct port *port, int lacp_fast)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * ad_enable_collecting - enable a port's receive</div><div class='add'>+ * @port: the port we're looking at</div><div class='add'>+ *</div><div class='add'>+ * Enable @port if it's in an active aggregator</div><div class='add'>+ */</div><div class='add'>+static void ad_enable_collecting(struct port *port)</div><div class='add'>+{</div><div class='add'>+	if (port-&gt;aggregator-&gt;is_active) {</div><div class='add'>+		struct slave *slave = port-&gt;slave;</div><div class='add'>+</div><div class='add'>+		slave_dbg(slave-&gt;bond-&gt;dev, slave-&gt;dev,</div><div class='add'>+			  "Enabling collecting on port %d (LAG %d)\n",</div><div class='add'>+			  port-&gt;actor_port_number,</div><div class='add'>+			  port-&gt;aggregator-&gt;aggregator_identifier);</div><div class='add'>+		__enable_collecting_port(port);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ad_disable_distributing - disable a port's transmit</div><div class='add'>+ * @port: the port we're looking at</div><div class='add'>+ * @update_slave_arr: Does slave array need update?</div><div class='add'>+ */</div><div class='add'>+static void ad_disable_distributing(struct port *port, bool *update_slave_arr)</div><div class='add'>+{</div><div class='add'>+	if (port-&gt;aggregator &amp;&amp; __agg_has_partner(port-&gt;aggregator)) {</div><div class='add'>+		slave_dbg(port-&gt;slave-&gt;bond-&gt;dev, port-&gt;slave-&gt;dev,</div><div class='add'>+			  "Disabling distributing on port %d (LAG %d)\n",</div><div class='add'>+			  port-&gt;actor_port_number,</div><div class='add'>+			  port-&gt;aggregator-&gt;aggregator_identifier);</div><div class='add'>+		__disable_distributing_port(port);</div><div class='add'>+		/* Slave array needs an update */</div><div class='add'>+		*update_slave_arr = true;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * ad_enable_collecting_distributing - enable a port's transmit/receive</div><div class='ctx'>  * @port: the port we're looking at</div><div class='ctx'>  * @update_slave_arr: Does slave array need update?</div><div class='hunk'>@@ -1807,12 +2109,15 @@ static void ad_enable_collecting_distributing(struct port *port,</div><div class='ctx'> 					      bool *update_slave_arr)</div><div class='ctx'> {</div><div class='ctx'> 	if (port-&gt;aggregator-&gt;is_active) {</div><div class='del'>-		pr_debug("Enabling port %d(LAG %d)\n",</div><div class='del'>-			 port-&gt;actor_port_number,</div><div class='del'>-			 port-&gt;aggregator-&gt;aggregator_identifier);</div><div class='add'>+		slave_dbg(port-&gt;slave-&gt;bond-&gt;dev, port-&gt;slave-&gt;dev,</div><div class='add'>+			  "Enabling port %d (LAG %d)\n",</div><div class='add'>+			  port-&gt;actor_port_number,</div><div class='add'>+			  port-&gt;aggregator-&gt;aggregator_identifier);</div><div class='ctx'> 		__enable_port(port);</div><div class='ctx'> 		/* Slave array needs update */</div><div class='ctx'> 		*update_slave_arr = true;</div><div class='add'>+		/* Should notify peers if possible */</div><div class='add'>+		ad_cond_set_peer_notif(port);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1824,12 +2129,11 @@ static void ad_enable_collecting_distributing(struct port *port,</div><div class='ctx'> static void ad_disable_collecting_distributing(struct port *port,</div><div class='ctx'> 					       bool *update_slave_arr)</div><div class='ctx'> {</div><div class='del'>-	if (port-&gt;aggregator &amp;&amp;</div><div class='del'>-	    !MAC_ADDRESS_EQUAL(&amp;(port-&gt;aggregator-&gt;partner_system),</div><div class='del'>-			       &amp;(null_mac_addr))) {</div><div class='del'>-		pr_debug("Disabling port %d(LAG %d)\n",</div><div class='del'>-			 port-&gt;actor_port_number,</div><div class='del'>-			 port-&gt;aggregator-&gt;aggregator_identifier);</div><div class='add'>+	if (port-&gt;aggregator &amp;&amp; __agg_has_partner(port-&gt;aggregator)) {</div><div class='add'>+		slave_dbg(port-&gt;slave-&gt;bond-&gt;dev, port-&gt;slave-&gt;dev,</div><div class='add'>+			  "Disabling port %d (LAG %d)\n",</div><div class='add'>+			  port-&gt;actor_port_number,</div><div class='add'>+			  port-&gt;aggregator-&gt;aggregator_identifier);</div><div class='ctx'> 		__disable_port(port);</div><div class='ctx'> 		/* Slave array needs an update */</div><div class='ctx'> 		*update_slave_arr = true;</div><div class='hunk'>@@ -1842,20 +2146,23 @@ static void ad_disable_collecting_distributing(struct port *port,</div><div class='ctx'>  * @port: the port we're looking at</div><div class='ctx'>  */</div><div class='ctx'> static void ad_marker_info_received(struct bond_marker *marker_info,</div><div class='del'>-	struct port *port)</div><div class='add'>+				    struct port *port)</div><div class='ctx'> {</div><div class='ctx'> 	struct bond_marker marker;</div><div class='ctx'> </div><div class='add'>+	atomic64_inc(&amp;SLAVE_AD_INFO(port-&gt;slave)-&gt;stats.marker_rx);</div><div class='add'>+	atomic64_inc(&amp;BOND_AD_INFO(port-&gt;slave-&gt;bond).stats.marker_rx);</div><div class='add'>+</div><div class='ctx'> 	/* copy the received marker data to the response marker */</div><div class='ctx'> 	memcpy(&amp;marker, marker_info, sizeof(struct bond_marker));</div><div class='ctx'> 	/* change the marker subtype to marker response */</div><div class='ctx'> 	marker.tlv_type = AD_MARKER_RESPONSE_SUBTYPE;</div><div class='ctx'> </div><div class='ctx'> 	/* send the marker response */</div><div class='del'>-	if (ad_marker_send(port, &amp;marker) &gt;= 0) {</div><div class='del'>-		pr_debug("Sent Marker Response on port %d\n",</div><div class='del'>-			 port-&gt;actor_port_number);</div><div class='del'>-	}</div><div class='add'>+	if (ad_marker_send(port, &amp;marker) &gt;= 0)</div><div class='add'>+		slave_dbg(port-&gt;slave-&gt;bond-&gt;dev, port-&gt;slave-&gt;dev,</div><div class='add'>+			  "Sent Marker Response on port %d\n",</div><div class='add'>+			  port-&gt;actor_port_number);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1870,8 +2177,9 @@ static void ad_marker_info_received(struct bond_marker *marker_info,</div><div class='ctx'> static void ad_marker_response_received(struct bond_marker *marker,</div><div class='ctx'> 					struct port *port)</div><div class='ctx'> {</div><div class='del'>-	marker = NULL;</div><div class='del'>-	port = NULL;</div><div class='add'>+	atomic64_inc(&amp;SLAVE_AD_INFO(port-&gt;slave)-&gt;stats.marker_resp_rx);</div><div class='add'>+	atomic64_inc(&amp;BOND_AD_INFO(port-&gt;slave-&gt;bond).stats.marker_resp_rx);</div><div class='add'>+</div><div class='ctx'> 	/* DO NOTHING, SINCE WE DECIDED NOT TO IMPLEMENT THIS FEATURE FOR NOW */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1883,6 +2191,7 @@ static void ad_marker_response_received(struct bond_marker *marker,</div><div class='ctx'> /**</div><div class='ctx'>  * bond_3ad_initiate_agg_selection - initate aggregator selection</div><div class='ctx'>  * @bond: bonding struct</div><div class='add'>+ * @timeout: timeout value to set</div><div class='ctx'>  *</div><div class='ctx'>  * Set the aggregation selection timer, to initiate an agg selection in</div><div class='ctx'>  * the very near future.  Called during first initialization, and during</div><div class='hunk'>@@ -1890,42 +2199,30 @@ static void ad_marker_response_received(struct bond_marker *marker,</div><div class='ctx'>  */</div><div class='ctx'> void bond_3ad_initiate_agg_selection(struct bonding *bond, int timeout)</div><div class='ctx'> {</div><div class='del'>-	BOND_AD_INFO(bond).agg_select_timer = timeout;</div><div class='add'>+	atomic_set(&amp;BOND_AD_INFO(bond).agg_select_timer, timeout);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * bond_3ad_initialize - initialize a bond's 802.3ad parameters and structures</div><div class='ctx'>  * @bond: bonding struct to work on</div><div class='del'>- * @tick_resolution: tick duration (millisecond resolution)</div><div class='ctx'>  *</div><div class='ctx'>  * Can be called only after the mac address of the bond is set.</div><div class='ctx'>  */</div><div class='del'>-void bond_3ad_initialize(struct bonding *bond, u16 tick_resolution)</div><div class='add'>+void bond_3ad_initialize(struct bonding *bond)</div><div class='ctx'> {</div><div class='del'>-	/* check that the bond is not initialized yet */</div><div class='del'>-	if (!MAC_ADDRESS_EQUAL(&amp;(BOND_AD_INFO(bond).system.sys_mac_addr),</div><div class='del'>-				bond-&gt;dev-&gt;dev_addr)) {</div><div class='del'>-</div><div class='del'>-		BOND_AD_INFO(bond).aggregator_identifier = 0;</div><div class='del'>-</div><div class='del'>-		BOND_AD_INFO(bond).system.sys_priority =</div><div class='del'>-			bond-&gt;params.ad_actor_sys_prio;</div><div class='del'>-		if (is_zero_ether_addr(bond-&gt;params.ad_actor_system))</div><div class='del'>-			BOND_AD_INFO(bond).system.sys_mac_addr =</div><div class='del'>-			    *((struct mac_addr *)bond-&gt;dev-&gt;dev_addr);</div><div class='del'>-		else</div><div class='del'>-			BOND_AD_INFO(bond).system.sys_mac_addr =</div><div class='del'>-			    *((struct mac_addr *)bond-&gt;params.ad_actor_system);</div><div class='del'>-</div><div class='del'>-		/* initialize how many times this module is called in one</div><div class='del'>-		 * second (should be about every 100ms)</div><div class='del'>-		 */</div><div class='del'>-		ad_ticks_per_sec = tick_resolution;</div><div class='del'>-</div><div class='del'>-		bond_3ad_initiate_agg_selection(bond,</div><div class='del'>-						AD_AGGREGATOR_SELECTION_TIMER *</div><div class='del'>-						ad_ticks_per_sec);</div><div class='del'>-	}</div><div class='add'>+	BOND_AD_INFO(bond).aggregator_identifier = 0;</div><div class='add'>+	BOND_AD_INFO(bond).system.sys_priority =</div><div class='add'>+		bond-&gt;params.ad_actor_sys_prio;</div><div class='add'>+	if (is_zero_ether_addr(bond-&gt;params.ad_actor_system))</div><div class='add'>+		BOND_AD_INFO(bond).system.sys_mac_addr =</div><div class='add'>+		    *((struct mac_addr *)bond-&gt;dev-&gt;dev_addr);</div><div class='add'>+	else</div><div class='add'>+		BOND_AD_INFO(bond).system.sys_mac_addr =</div><div class='add'>+		    *((struct mac_addr *)bond-&gt;params.ad_actor_system);</div><div class='add'>+</div><div class='add'>+	bond_3ad_initiate_agg_selection(bond,</div><div class='add'>+					AD_AGGREGATOR_SELECTION_TIMER *</div><div class='add'>+					ad_ticks_per_sec);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1947,7 +2244,10 @@ void bond_3ad_bind_slave(struct slave *slave)</div><div class='ctx'> 		/* port initialization */</div><div class='ctx'> 		port = &amp;(SLAVE_AD_INFO(slave)-&gt;port);</div><div class='ctx'> </div><div class='del'>-		ad_initialize_port(port, bond-&gt;params.lacp_fast);</div><div class='add'>+		ad_initialize_port(port, &amp;bond-&gt;params);</div><div class='add'>+</div><div class='add'>+		/* Port priority is initialized. Update it to slave's ad info */</div><div class='add'>+		SLAVE_AD_INFO(slave)-&gt;port_priority = port-&gt;actor_port_priority;</div><div class='ctx'> </div><div class='ctx'> 		port-&gt;slave = slave;</div><div class='ctx'> 		port-&gt;actor_port_number = SLAVE_AD_INFO(slave)-&gt;id;</div><div class='hunk'>@@ -1955,18 +2255,9 @@ void bond_3ad_bind_slave(struct slave *slave)</div><div class='ctx'> 		 * user key</div><div class='ctx'> 		 */</div><div class='ctx'> 		port-&gt;actor_admin_port_key = bond-&gt;params.ad_user_port_key &lt;&lt; 6;</div><div class='del'>-		port-&gt;actor_admin_port_key |= __get_duplex(port);</div><div class='del'>-		port-&gt;actor_admin_port_key |= (__get_link_speed(port) &lt;&lt; 1);</div><div class='del'>-		port-&gt;actor_oper_port_key = port-&gt;actor_admin_port_key;</div><div class='del'>-		/* if the port is not full duplex, then the port should be not</div><div class='del'>-		 * lacp Enabled</div><div class='del'>-		 */</div><div class='del'>-		if (!(port-&gt;actor_oper_port_key &amp; AD_DUPLEX_KEY_MASKS))</div><div class='del'>-			port-&gt;sm_vars &amp;= ~AD_PORT_LACP_ENABLED;</div><div class='add'>+		ad_update_actor_keys(port, false);</div><div class='ctx'> 		/* actor system is the bond's system */</div><div class='del'>-		port-&gt;actor_system = BOND_AD_INFO(bond).system.sys_mac_addr;</div><div class='del'>-		port-&gt;actor_system_priority =</div><div class='del'>-		    BOND_AD_INFO(bond).system.sys_priority;</div><div class='add'>+		__ad_actor_update_port(port);</div><div class='ctx'> 		/* tx timer(to verify that no more than MAX_TX_IN_SECOND</div><div class='ctx'> 		 * lacpdu's are sent in one second)</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -2012,16 +2303,18 @@ void bond_3ad_unbind_slave(struct slave *slave)</div><div class='ctx'> </div><div class='ctx'> 	/* if slave is null, the whole port is not initialized */</div><div class='ctx'> 	if (!port-&gt;slave) {</div><div class='del'>-		netdev_warn(bond-&gt;dev, "Trying to unbind an uninitialized port on %s\n",</div><div class='del'>-			    slave-&gt;dev-&gt;name);</div><div class='add'>+		slave_warn(bond-&gt;dev, slave-&gt;dev, "Trying to unbind an uninitialized port\n");</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	netdev_dbg(bond-&gt;dev, "Unbinding Link Aggregation Group %d\n",</div><div class='del'>-		   aggregator-&gt;aggregator_identifier);</div><div class='add'>+	slave_dbg(bond-&gt;dev, slave-&gt;dev, "Unbinding Link Aggregation Group %d\n",</div><div class='add'>+		  aggregator-&gt;aggregator_identifier);</div><div class='ctx'> </div><div class='ctx'> 	/* Tell the partner that this port is not suitable for aggregation */</div><div class='del'>-	port-&gt;actor_oper_port_state &amp;= ~AD_STATE_AGGREGATION;</div><div class='add'>+	port-&gt;actor_oper_port_state &amp;= ~LACP_STATE_SYNCHRONIZATION;</div><div class='add'>+	port-&gt;actor_oper_port_state &amp;= ~LACP_STATE_COLLECTING;</div><div class='add'>+	port-&gt;actor_oper_port_state &amp;= ~LACP_STATE_DISTRIBUTING;</div><div class='add'>+	port-&gt;actor_oper_port_state &amp;= ~LACP_STATE_AGGREGATION;</div><div class='ctx'> 	__update_lacpdu_from_port(port);</div><div class='ctx'> 	ad_lacpdu_send(port);</div><div class='ctx'> </div><div class='hunk'>@@ -2053,14 +2346,14 @@ void bond_3ad_unbind_slave(struct slave *slave)</div><div class='ctx'> 			 * new aggregator</div><div class='ctx'> 			 */</div><div class='ctx'> 			if ((new_aggregator) &amp;&amp; ((!new_aggregator-&gt;lag_ports) || ((new_aggregator-&gt;lag_ports == port) &amp;&amp; !new_aggregator-&gt;lag_ports-&gt;next_port_in_aggregator))) {</div><div class='del'>-				netdev_dbg(bond-&gt;dev, "Some port(s) related to LAG %d - replacing with LAG %d\n",</div><div class='del'>-					   aggregator-&gt;aggregator_identifier,</div><div class='del'>-					   new_aggregator-&gt;aggregator_identifier);</div><div class='add'>+				slave_dbg(bond-&gt;dev, slave-&gt;dev, "Some port(s) related to LAG %d - replacing with LAG %d\n",</div><div class='add'>+					  aggregator-&gt;aggregator_identifier,</div><div class='add'>+					  new_aggregator-&gt;aggregator_identifier);</div><div class='ctx'> </div><div class='ctx'> 				if ((new_aggregator-&gt;lag_ports == port) &amp;&amp;</div><div class='ctx'> 				    new_aggregator-&gt;is_active) {</div><div class='del'>-					netdev_info(bond-&gt;dev, "Removing an active aggregator\n");</div><div class='del'>-					 select_new_active_agg = 1;</div><div class='add'>+					slave_info(bond-&gt;dev, slave-&gt;dev, "Removing an active aggregator\n");</div><div class='add'>+					select_new_active_agg = 1;</div><div class='ctx'> 				}</div><div class='ctx'> </div><div class='ctx'> 				new_aggregator-&gt;is_individual = aggregator-&gt;is_individual;</div><div class='hunk'>@@ -2090,7 +2383,7 @@ void bond_3ad_unbind_slave(struct slave *slave)</div><div class='ctx'> 					ad_agg_selection_logic(__get_first_agg(port),</div><div class='ctx'> 							       &amp;dummy_slave_update);</div><div class='ctx'> 			} else {</div><div class='del'>-				netdev_warn(bond-&gt;dev, "unbinding aggregator, and could not find a new aggregator for its ports\n");</div><div class='add'>+				slave_warn(bond-&gt;dev, slave-&gt;dev, "unbinding aggregator, and could not find a new aggregator for its ports\n");</div><div class='ctx'> 			}</div><div class='ctx'> 		} else {</div><div class='ctx'> 			/* in case that the only port related to this</div><div class='hunk'>@@ -2099,7 +2392,7 @@ void bond_3ad_unbind_slave(struct slave *slave)</div><div class='ctx'> 			select_new_active_agg = aggregator-&gt;is_active;</div><div class='ctx'> 			ad_clear_agg(aggregator);</div><div class='ctx'> 			if (select_new_active_agg) {</div><div class='del'>-				netdev_info(bond-&gt;dev, "Removing an active aggregator\n");</div><div class='add'>+				slave_info(bond-&gt;dev, slave-&gt;dev, "Removing an active aggregator\n");</div><div class='ctx'> 				/* select new active aggregator */</div><div class='ctx'> 				temp_aggregator = __get_first_agg(port);</div><div class='ctx'> 				if (temp_aggregator)</div><div class='hunk'>@@ -2109,7 +2402,7 @@ void bond_3ad_unbind_slave(struct slave *slave)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	netdev_dbg(bond-&gt;dev, "Unbinding port %d\n", port-&gt;actor_port_number);</div><div class='add'>+	slave_dbg(bond-&gt;dev, slave-&gt;dev, "Unbinding port %d\n", port-&gt;actor_port_number);</div><div class='ctx'> </div><div class='ctx'> 	/* find the aggregator that this port is connected to */</div><div class='ctx'> 	bond_for_each_slave(bond, slave_iter, iter) {</div><div class='hunk'>@@ -2128,11 +2421,12 @@ void bond_3ad_unbind_slave(struct slave *slave)</div><div class='ctx'> 				else</div><div class='ctx'> 					temp_aggregator-&gt;lag_ports = temp_port-&gt;next_port_in_aggregator;</div><div class='ctx'> 				temp_aggregator-&gt;num_of_ports--;</div><div class='del'>-				if (temp_aggregator-&gt;num_of_ports == 0) {</div><div class='add'>+				if (__agg_active_ports(temp_aggregator) == 0) {</div><div class='ctx'> 					select_new_active_agg = temp_aggregator-&gt;is_active;</div><div class='del'>-					ad_clear_agg(temp_aggregator);</div><div class='add'>+					if (temp_aggregator-&gt;num_of_ports == 0)</div><div class='add'>+						ad_clear_agg(temp_aggregator);</div><div class='ctx'> 					if (select_new_active_agg) {</div><div class='del'>-						netdev_info(bond-&gt;dev, "Removing an active aggregator\n");</div><div class='add'>+						slave_info(bond-&gt;dev, slave-&gt;dev, "Removing an active aggregator\n");</div><div class='ctx'> 						/* select new active aggregator */</div><div class='ctx'> 						ad_agg_selection_logic(__get_first_agg(port),</div><div class='ctx'> 							               &amp;dummy_slave_update);</div><div class='hunk'>@@ -2149,9 +2443,63 @@ out:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * bond_3ad_state_machine_handler - handle state machines timeout</div><div class='add'>+ * bond_3ad_update_ad_actor_settings - reflect change of actor settings to ports</div><div class='ctx'>  * @bond: bonding struct to work on</div><div class='ctx'>  *</div><div class='add'>+ * If an ad_actor setting gets changed we need to update the individual port</div><div class='add'>+ * settings so the bond device will use the new values when it gets upped.</div><div class='add'>+ */</div><div class='add'>+void bond_3ad_update_ad_actor_settings(struct bonding *bond)</div><div class='add'>+{</div><div class='add'>+	struct list_head *iter;</div><div class='add'>+	struct slave *slave;</div><div class='add'>+</div><div class='add'>+	ASSERT_RTNL();</div><div class='add'>+</div><div class='add'>+	BOND_AD_INFO(bond).system.sys_priority = bond-&gt;params.ad_actor_sys_prio;</div><div class='add'>+	if (is_zero_ether_addr(bond-&gt;params.ad_actor_system))</div><div class='add'>+		BOND_AD_INFO(bond).system.sys_mac_addr =</div><div class='add'>+		    *((struct mac_addr *)bond-&gt;dev-&gt;dev_addr);</div><div class='add'>+	else</div><div class='add'>+		BOND_AD_INFO(bond).system.sys_mac_addr =</div><div class='add'>+		    *((struct mac_addr *)bond-&gt;params.ad_actor_system);</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;bond-&gt;mode_lock);</div><div class='add'>+	bond_for_each_slave(bond, slave, iter) {</div><div class='add'>+		struct port *port = &amp;(SLAVE_AD_INFO(slave))-&gt;port;</div><div class='add'>+</div><div class='add'>+		__ad_actor_update_port(port);</div><div class='add'>+		port-&gt;ntt = true;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_bh(&amp;bond-&gt;mode_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * bond_agg_timer_advance - advance agg_select_timer</div><div class='add'>+ * @bond:  bonding structure</div><div class='add'>+ *</div><div class='add'>+ * Return true when agg_select_timer reaches 0.</div><div class='add'>+ */</div><div class='add'>+static bool bond_agg_timer_advance(struct bonding *bond)</div><div class='add'>+{</div><div class='add'>+	int val, nval;</div><div class='add'>+</div><div class='add'>+	while (1) {</div><div class='add'>+		val = atomic_read(&amp;BOND_AD_INFO(bond).agg_select_timer);</div><div class='add'>+		if (!val)</div><div class='add'>+			return false;</div><div class='add'>+		nval = val - 1;</div><div class='add'>+		if (atomic_cmpxchg(&amp;BOND_AD_INFO(bond).agg_select_timer,</div><div class='add'>+				   val, nval) == val)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+	return nval == 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * bond_3ad_state_machine_handler - handle state machines timeout</div><div class='add'>+ * @work: work context to fetch bonding struct to work on from</div><div class='add'>+ *</div><div class='ctx'>  * The state machine handling concept in this module is to check every tick</div><div class='ctx'>  * which state machine should operate any function. The execution order is</div><div class='ctx'>  * round robin, so when we have an interaction between state machines, the</div><div class='hunk'>@@ -2183,9 +2531,7 @@ void bond_3ad_state_machine_handler(struct work_struct *work)</div><div class='ctx'> 	if (!bond_has_slaves(bond))</div><div class='ctx'> 		goto re_arm;</div><div class='ctx'> </div><div class='del'>-	/* check if agg_select_timer timer after initialize is timed out */</div><div class='del'>-	if (BOND_AD_INFO(bond).agg_select_timer &amp;&amp;</div><div class='del'>-	    !(--BOND_AD_INFO(bond).agg_select_timer)) {</div><div class='add'>+	if (bond_agg_timer_advance(bond)) {</div><div class='ctx'> 		slave = bond_first_slave_rcu(bond);</div><div class='ctx'> 		port = slave ? &amp;(SLAVE_AD_INFO(slave)-&gt;port) : NULL;</div><div class='ctx'> </div><div class='hunk'>@@ -2248,109 +2594,127 @@ re_arm:</div><div class='ctx'>  * bond_3ad_rx_indication - handle a received frame</div><div class='ctx'>  * @lacpdu: received lacpdu</div><div class='ctx'>  * @slave: slave struct to work on</div><div class='del'>- * @length: length of the data received</div><div class='ctx'>  *</div><div class='ctx'>  * It is assumed that frames that were sent on this NIC don't returned as new</div><div class='ctx'>  * received frames (loopback). Since only the payload is given to this</div><div class='ctx'>  * function, it check for loopback.</div><div class='ctx'>  */</div><div class='del'>-static int bond_3ad_rx_indication(struct lacpdu *lacpdu, struct slave *slave,</div><div class='del'>-				  u16 length)</div><div class='add'>+static int bond_3ad_rx_indication(struct lacpdu *lacpdu, struct slave *slave)</div><div class='ctx'> {</div><div class='del'>-	struct port *port;</div><div class='add'>+	struct bonding *bond = slave-&gt;bond;</div><div class='ctx'> 	int ret = RX_HANDLER_ANOTHER;</div><div class='add'>+	struct bond_marker *marker;</div><div class='add'>+	struct port *port;</div><div class='add'>+	atomic64_t *stat;</div><div class='ctx'> </div><div class='del'>-	if (length &gt;= sizeof(struct lacpdu)) {</div><div class='del'>-</div><div class='del'>-		port = &amp;(SLAVE_AD_INFO(slave)-&gt;port);</div><div class='del'>-</div><div class='del'>-		if (!port-&gt;slave) {</div><div class='del'>-			net_warn_ratelimited("%s: Warning: port of slave %s is uninitialized\n",</div><div class='del'>-					     slave-&gt;dev-&gt;name, slave-&gt;bond-&gt;dev-&gt;name);</div><div class='del'>-			return ret;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		switch (lacpdu-&gt;subtype) {</div><div class='del'>-		case AD_TYPE_LACPDU:</div><div class='del'>-			ret = RX_HANDLER_CONSUMED;</div><div class='del'>-			netdev_dbg(slave-&gt;bond-&gt;dev,</div><div class='del'>-				   "Received LACPDU on port %d slave %s\n",</div><div class='del'>-				   port-&gt;actor_port_number,</div><div class='del'>-				   slave-&gt;dev-&gt;name);</div><div class='del'>-			/* Protect against concurrent state machines */</div><div class='del'>-			spin_lock(&amp;slave-&gt;bond-&gt;mode_lock);</div><div class='del'>-			ad_rx_machine(lacpdu, port);</div><div class='del'>-			spin_unlock(&amp;slave-&gt;bond-&gt;mode_lock);</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		case AD_TYPE_MARKER:</div><div class='del'>-			ret = RX_HANDLER_CONSUMED;</div><div class='del'>-			/* No need to convert fields to Little Endian since we</div><div class='del'>-			 * don't use the marker's fields.</div><div class='del'>-			 */</div><div class='del'>-</div><div class='del'>-			switch (((struct bond_marker *)lacpdu)-&gt;tlv_type) {</div><div class='del'>-			case AD_MARKER_INFORMATION_SUBTYPE:</div><div class='del'>-				netdev_dbg(slave-&gt;bond-&gt;dev, "Received Marker Information on port %d\n",</div><div class='del'>-					   port-&gt;actor_port_number);</div><div class='del'>-				ad_marker_info_received((struct bond_marker *)lacpdu, port);</div><div class='del'>-				break;</div><div class='del'>-</div><div class='del'>-			case AD_MARKER_RESPONSE_SUBTYPE:</div><div class='del'>-				netdev_dbg(slave-&gt;bond-&gt;dev, "Received Marker Response on port %d\n",</div><div class='del'>-					   port-&gt;actor_port_number);</div><div class='del'>-				ad_marker_response_received((struct bond_marker *)lacpdu, port);</div><div class='del'>-				break;</div><div class='add'>+	port = &amp;(SLAVE_AD_INFO(slave)-&gt;port);</div><div class='add'>+	if (!port-&gt;slave) {</div><div class='add'>+		net_warn_ratelimited("%s: Warning: port of slave %s is uninitialized\n",</div><div class='add'>+				     slave-&gt;dev-&gt;name, slave-&gt;bond-&gt;dev-&gt;name);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-			default:</div><div class='del'>-				netdev_dbg(slave-&gt;bond-&gt;dev, "Received an unknown Marker subtype on slot %d\n",</div><div class='del'>-					   port-&gt;actor_port_number);</div><div class='del'>-			}</div><div class='add'>+	switch (lacpdu-&gt;subtype) {</div><div class='add'>+	case AD_TYPE_LACPDU:</div><div class='add'>+		ret = RX_HANDLER_CONSUMED;</div><div class='add'>+		slave_dbg(slave-&gt;bond-&gt;dev, slave-&gt;dev,</div><div class='add'>+			  "Received LACPDU on port %d\n",</div><div class='add'>+			  port-&gt;actor_port_number);</div><div class='add'>+		/* Protect against concurrent state machines */</div><div class='add'>+		spin_lock(&amp;slave-&gt;bond-&gt;mode_lock);</div><div class='add'>+		ad_rx_machine(lacpdu, port);</div><div class='add'>+		spin_unlock(&amp;slave-&gt;bond-&gt;mode_lock);</div><div class='add'>+		break;</div><div class='add'>+	case AD_TYPE_MARKER:</div><div class='add'>+		ret = RX_HANDLER_CONSUMED;</div><div class='add'>+		/* No need to convert fields to Little Endian since we</div><div class='add'>+		 * don't use the marker's fields.</div><div class='add'>+		 */</div><div class='add'>+		marker = (struct bond_marker *)lacpdu;</div><div class='add'>+		switch (marker-&gt;tlv_type) {</div><div class='add'>+		case AD_MARKER_INFORMATION_SUBTYPE:</div><div class='add'>+			slave_dbg(slave-&gt;bond-&gt;dev, slave-&gt;dev, "Received Marker Information on port %d\n",</div><div class='add'>+				  port-&gt;actor_port_number);</div><div class='add'>+			ad_marker_info_received(marker, port);</div><div class='add'>+			break;</div><div class='add'>+		case AD_MARKER_RESPONSE_SUBTYPE:</div><div class='add'>+			slave_dbg(slave-&gt;bond-&gt;dev, slave-&gt;dev, "Received Marker Response on port %d\n",</div><div class='add'>+				  port-&gt;actor_port_number);</div><div class='add'>+			ad_marker_response_received(marker, port);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			slave_dbg(slave-&gt;bond-&gt;dev, slave-&gt;dev, "Received an unknown Marker subtype on port %d\n",</div><div class='add'>+				  port-&gt;actor_port_number);</div><div class='add'>+			stat = &amp;SLAVE_AD_INFO(slave)-&gt;stats.marker_unknown_rx;</div><div class='add'>+			atomic64_inc(stat);</div><div class='add'>+			stat = &amp;BOND_AD_INFO(bond).stats.marker_unknown_rx;</div><div class='add'>+			atomic64_inc(stat);</div><div class='ctx'> 		}</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		atomic64_inc(&amp;SLAVE_AD_INFO(slave)-&gt;stats.lacpdu_unknown_rx);</div><div class='add'>+		atomic64_inc(&amp;BOND_AD_INFO(bond).stats.lacpdu_unknown_rx);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * bond_3ad_adapter_speed_changed - handle a slave's speed change indication</div><div class='del'>- * @slave: slave struct to work on</div><div class='add'>+ * ad_update_actor_keys - Update the oper / admin keys for a port based on</div><div class='add'>+ * its current speed and duplex settings.</div><div class='ctx'>  *</div><div class='del'>- * Handle reselection of aggregator (if needed) for this port.</div><div class='add'>+ * @port: the port we'are looking at</div><div class='add'>+ * @reset: Boolean to just reset the speed and the duplex part of the key</div><div class='add'>+ *</div><div class='add'>+ * The logic to change the oper / admin keys is:</div><div class='add'>+ * (a) A full duplex port can participate in LACP with partner.</div><div class='add'>+ * (b) When the speed is changed, LACP need to be reinitiated.</div><div class='ctx'>  */</div><div class='del'>-void bond_3ad_adapter_speed_changed(struct slave *slave)</div><div class='add'>+static void ad_update_actor_keys(struct port *port, bool reset)</div><div class='ctx'> {</div><div class='del'>-	struct port *port;</div><div class='del'>-</div><div class='del'>-	port = &amp;(SLAVE_AD_INFO(slave)-&gt;port);</div><div class='del'>-</div><div class='del'>-	/* if slave is null, the whole port is not initialized */</div><div class='del'>-	if (!port-&gt;slave) {</div><div class='del'>-		netdev_warn(slave-&gt;bond-&gt;dev, "speed changed for uninitialized port on %s\n",</div><div class='del'>-			    slave-&gt;dev-&gt;name);</div><div class='del'>-		return;</div><div class='add'>+	u8 duplex = 0;</div><div class='add'>+	u16 ospeed = 0, speed = 0;</div><div class='add'>+	u16 old_oper_key = port-&gt;actor_oper_port_key;</div><div class='add'>+</div><div class='add'>+	port-&gt;actor_admin_port_key &amp;= ~(AD_SPEED_KEY_MASKS|AD_DUPLEX_KEY_MASKS);</div><div class='add'>+	if (!reset) {</div><div class='add'>+		speed = __get_link_speed(port);</div><div class='add'>+		ospeed = (old_oper_key &amp; AD_SPEED_KEY_MASKS) &gt;&gt; 1;</div><div class='add'>+		duplex = __get_duplex(port);</div><div class='add'>+		port-&gt;actor_admin_port_key |= (speed &lt;&lt; 1) | duplex;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	spin_lock_bh(&amp;slave-&gt;bond-&gt;mode_lock);</div><div class='del'>-</div><div class='del'>-	port-&gt;actor_admin_port_key &amp;= ~AD_SPEED_KEY_MASKS;</div><div class='del'>-	port-&gt;actor_admin_port_key |= __get_link_speed(port) &lt;&lt; 1;</div><div class='ctx'> 	port-&gt;actor_oper_port_key = port-&gt;actor_admin_port_key;</div><div class='del'>-	netdev_dbg(slave-&gt;bond-&gt;dev, "Port %d changed speed\n", port-&gt;actor_port_number);</div><div class='del'>-	/* there is no need to reselect a new aggregator, just signal the</div><div class='del'>-	 * state machines to reinitialize</div><div class='del'>-	 */</div><div class='del'>-	port-&gt;sm_vars |= AD_PORT_BEGIN;</div><div class='ctx'> </div><div class='del'>-	spin_unlock_bh(&amp;slave-&gt;bond-&gt;mode_lock);</div><div class='add'>+	if (old_oper_key != port-&gt;actor_oper_port_key) {</div><div class='add'>+		/* Only 'duplex' port participates in LACP */</div><div class='add'>+		if (duplex)</div><div class='add'>+			port-&gt;sm_vars |= AD_PORT_LACP_ENABLED;</div><div class='add'>+		else</div><div class='add'>+			port-&gt;sm_vars &amp;= ~AD_PORT_LACP_ENABLED;</div><div class='add'>+</div><div class='add'>+		if (!reset) {</div><div class='add'>+			if (!speed) {</div><div class='add'>+				slave_err(port-&gt;slave-&gt;bond-&gt;dev,</div><div class='add'>+					  port-&gt;slave-&gt;dev,</div><div class='add'>+					  "speed changed to 0 on port %d\n",</div><div class='add'>+					  port-&gt;actor_port_number);</div><div class='add'>+			} else if (duplex &amp;&amp; ospeed != speed) {</div><div class='add'>+				/* Speed change restarts LACP state-machine */</div><div class='add'>+				port-&gt;sm_vars |= AD_PORT_BEGIN;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * bond_3ad_adapter_duplex_changed - handle a slave's duplex change indication</div><div class='add'>+ * bond_3ad_adapter_speed_duplex_changed - handle a slave's speed / duplex</div><div class='add'>+ * change indication</div><div class='add'>+ *</div><div class='ctx'>  * @slave: slave struct to work on</div><div class='ctx'>  *</div><div class='ctx'>  * Handle reselection of aggregator (if needed) for this port.</div><div class='ctx'>  */</div><div class='del'>-void bond_3ad_adapter_duplex_changed(struct slave *slave)</div><div class='add'>+void bond_3ad_adapter_speed_duplex_changed(struct slave *slave)</div><div class='ctx'> {</div><div class='ctx'> 	struct port *port;</div><div class='ctx'> </div><div class='hunk'>@@ -2358,45 +2722,36 @@ void bond_3ad_adapter_duplex_changed(struct slave *slave)</div><div class='ctx'> </div><div class='ctx'> 	/* if slave is null, the whole port is not initialized */</div><div class='ctx'> 	if (!port-&gt;slave) {</div><div class='del'>-		netdev_warn(slave-&gt;bond-&gt;dev, "duplex changed for uninitialized port on %s\n",</div><div class='del'>-			    slave-&gt;dev-&gt;name);</div><div class='add'>+		slave_warn(slave-&gt;bond-&gt;dev, slave-&gt;dev,</div><div class='add'>+			   "speed/duplex changed for uninitialized port\n");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_bh(&amp;slave-&gt;bond-&gt;mode_lock);</div><div class='del'>-</div><div class='del'>-	port-&gt;actor_admin_port_key &amp;= ~AD_DUPLEX_KEY_MASKS;</div><div class='del'>-	port-&gt;actor_admin_port_key |= __get_duplex(port);</div><div class='del'>-	port-&gt;actor_oper_port_key = port-&gt;actor_admin_port_key;</div><div class='del'>-	netdev_dbg(slave-&gt;bond-&gt;dev, "Port %d slave %s changed duplex\n",</div><div class='del'>-		   port-&gt;actor_port_number, slave-&gt;dev-&gt;name);</div><div class='del'>-	if (port-&gt;actor_oper_port_key &amp; AD_DUPLEX_KEY_MASKS)</div><div class='del'>-		port-&gt;sm_vars |= AD_PORT_LACP_ENABLED;</div><div class='del'>-	/* there is no need to reselect a new aggregator, just signal the</div><div class='del'>-	 * state machines to reinitialize</div><div class='del'>-	 */</div><div class='del'>-	port-&gt;sm_vars |= AD_PORT_BEGIN;</div><div class='del'>-</div><div class='add'>+	ad_update_actor_keys(port, false);</div><div class='ctx'> 	spin_unlock_bh(&amp;slave-&gt;bond-&gt;mode_lock);</div><div class='add'>+	slave_dbg(slave-&gt;bond-&gt;dev, slave-&gt;dev, "Port %d changed speed/duplex\n",</div><div class='add'>+		  port-&gt;actor_port_number);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * bond_3ad_handle_link_change - handle a slave's link status change indication</div><div class='ctx'>  * @slave: slave struct to work on</div><div class='del'>- * @status: whether the link is now up or down</div><div class='add'>+ * @link: whether the link is now up or down</div><div class='ctx'>  *</div><div class='ctx'>  * Handle reselection of aggregator (if needed) for this port.</div><div class='ctx'>  */</div><div class='ctx'> void bond_3ad_handle_link_change(struct slave *slave, char link)</div><div class='ctx'> {</div><div class='add'>+	struct aggregator *agg;</div><div class='ctx'> 	struct port *port;</div><div class='add'>+	bool dummy;</div><div class='ctx'> </div><div class='ctx'> 	port = &amp;(SLAVE_AD_INFO(slave)-&gt;port);</div><div class='ctx'> </div><div class='ctx'> 	/* if slave is null, the whole port is not initialized */</div><div class='ctx'> 	if (!port-&gt;slave) {</div><div class='del'>-		netdev_warn(slave-&gt;bond-&gt;dev, "link status changed for uninitialized port on %s\n",</div><div class='del'>-			    slave-&gt;dev-&gt;name);</div><div class='add'>+		slave_warn(slave-&gt;bond-&gt;dev, slave-&gt;dev, "link status changed for uninitialized port\n");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2408,29 +2763,23 @@ void bond_3ad_handle_link_change(struct slave *slave, char link)</div><div class='ctx'> 	 * on link up we are forcing recheck on the duplex and speed since</div><div class='ctx'> 	 * some of he adaptors(ce1000.lan) report.</div><div class='ctx'> 	 */</div><div class='del'>-	port-&gt;actor_admin_port_key &amp;= ~(AD_DUPLEX_KEY_MASKS|AD_SPEED_KEY_MASKS);</div><div class='ctx'> 	if (link == BOND_LINK_UP) {</div><div class='ctx'> 		port-&gt;is_enabled = true;</div><div class='del'>-		port-&gt;actor_admin_port_key |=</div><div class='del'>-			(__get_link_speed(port) &lt;&lt; 1) | __get_duplex(port);</div><div class='del'>-		if (port-&gt;actor_admin_port_key &amp; AD_DUPLEX_KEY_MASKS)</div><div class='del'>-			port-&gt;sm_vars |= AD_PORT_LACP_ENABLED;</div><div class='add'>+		ad_update_actor_keys(port, false);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* link has failed */</div><div class='ctx'> 		port-&gt;is_enabled = false;</div><div class='del'>-		port-&gt;sm_vars &amp;= ~AD_PORT_LACP_ENABLED;</div><div class='add'>+		ad_update_actor_keys(port, true);</div><div class='ctx'> 	}</div><div class='del'>-	port-&gt;actor_oper_port_key = port-&gt;actor_admin_port_key;</div><div class='del'>-	netdev_dbg(slave-&gt;bond-&gt;dev, "Port %d changed link status to %s\n",</div><div class='del'>-		   port-&gt;actor_port_number,</div><div class='del'>-		   link == BOND_LINK_UP ? "UP" : "DOWN");</div><div class='del'>-	/* there is no need to reselect a new aggregator, just signal the</div><div class='del'>-	 * state machines to reinitialize</div><div class='del'>-	 */</div><div class='del'>-	port-&gt;sm_vars |= AD_PORT_BEGIN;</div><div class='add'>+	agg = __get_first_agg(port);</div><div class='add'>+	ad_agg_selection_logic(agg, &amp;dummy);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_bh(&amp;slave-&gt;bond-&gt;mode_lock);</div><div class='ctx'> </div><div class='add'>+	slave_dbg(slave-&gt;bond-&gt;dev, slave-&gt;dev, "Port %d changed link status to %s\n",</div><div class='add'>+		  port-&gt;actor_port_number,</div><div class='add'>+		  link == BOND_LINK_UP ? "UP" : "DOWN");</div><div class='add'>+</div><div class='ctx'> 	/* RTNL is held and mode_lock is released so it's safe</div><div class='ctx'> 	 * to update slave_array here.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -2439,7 +2788,7 @@ void bond_3ad_handle_link_change(struct slave *slave, char link)</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * bond_3ad_set_carrier - set link state for bonding master</div><div class='del'>- * @bond - bonding structure</div><div class='add'>+ * @bond: bonding structure</div><div class='ctx'>  *</div><div class='ctx'>  * if we have an active aggregator, we're up, if not, we're down.</div><div class='ctx'>  * Presumes that we cannot have an active aggregator if there are</div><div class='hunk'>@@ -2465,7 +2814,7 @@ int bond_3ad_set_carrier(struct bonding *bond)</div><div class='ctx'> 	active = __get_active_agg(&amp;(SLAVE_AD_INFO(first_slave)-&gt;aggregator));</div><div class='ctx'> 	if (active) {</div><div class='ctx'> 		/* are enough slaves available to consider link up? */</div><div class='del'>-		if (active-&gt;num_of_ports &lt; bond-&gt;params.min_links) {</div><div class='add'>+		if (__agg_active_ports(active) &lt; bond-&gt;params.min_links) {</div><div class='ctx'> 			if (netif_carrier_ok(bond-&gt;dev)) {</div><div class='ctx'> 				netif_carrier_off(bond-&gt;dev);</div><div class='ctx'> 				goto out;</div><div class='hunk'>@@ -2510,7 +2859,7 @@ int __bond_3ad_get_active_agg_info(struct bonding *bond,</div><div class='ctx'> 		return -1;</div><div class='ctx'> </div><div class='ctx'> 	ad_info-&gt;aggregator_id = aggregator-&gt;aggregator_identifier;</div><div class='del'>-	ad_info-&gt;ports = aggregator-&gt;num_of_ports;</div><div class='add'>+	ad_info-&gt;ports = __agg_active_ports(aggregator);</div><div class='ctx'> 	ad_info-&gt;actor_key = aggregator-&gt;actor_oper_aggregator_key;</div><div class='ctx'> 	ad_info-&gt;partner_key = aggregator-&gt;partner_oper_aggregator_key;</div><div class='ctx'> 	ether_addr_copy(ad_info-&gt;partner_system,</div><div class='hunk'>@@ -2541,15 +2890,18 @@ int bond_3ad_lacpdu_recv(const struct sk_buff *skb, struct bonding *bond,</div><div class='ctx'> 		return RX_HANDLER_ANOTHER;</div><div class='ctx'> </div><div class='ctx'> 	lacpdu = skb_header_pointer(skb, 0, sizeof(_lacpdu), &amp;_lacpdu);</div><div class='del'>-	if (!lacpdu)</div><div class='add'>+	if (!lacpdu) {</div><div class='add'>+		atomic64_inc(&amp;SLAVE_AD_INFO(slave)-&gt;stats.lacpdu_illegal_rx);</div><div class='add'>+		atomic64_inc(&amp;BOND_AD_INFO(bond).stats.lacpdu_illegal_rx);</div><div class='ctx'> 		return RX_HANDLER_ANOTHER;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	return bond_3ad_rx_indication(lacpdu, slave, skb-&gt;len);</div><div class='add'>+	return bond_3ad_rx_indication(lacpdu, slave);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * bond_3ad_update_lacp_rate - change the lacp rate</div><div class='del'>- * @bond - bonding struct</div><div class='add'>+ * @bond: bonding struct</div><div class='ctx'>  *</div><div class='ctx'>  * When modify lacp_rate parameter via sysfs,</div><div class='ctx'>  * update actor_oper_port_state of each port.</div><div class='hunk'>@@ -2570,9 +2922,92 @@ void bond_3ad_update_lacp_rate(struct bonding *bond)</div><div class='ctx'> 	bond_for_each_slave(bond, slave, iter) {</div><div class='ctx'> 		port = &amp;(SLAVE_AD_INFO(slave)-&gt;port);</div><div class='ctx'> 		if (lacp_fast)</div><div class='del'>-			port-&gt;actor_oper_port_state |= AD_STATE_LACP_TIMEOUT;</div><div class='add'>+			port-&gt;actor_oper_port_state |= LACP_STATE_LACP_TIMEOUT;</div><div class='add'>+		else</div><div class='add'>+			port-&gt;actor_oper_port_state &amp;= ~LACP_STATE_LACP_TIMEOUT;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_bh(&amp;bond-&gt;mode_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * bond_3ad_update_lacp_active - change the lacp active</div><div class='add'>+ * @bond: bonding struct</div><div class='add'>+ *</div><div class='add'>+ * Update actor_oper_port_state when lacp_active is modified.</div><div class='add'>+ */</div><div class='add'>+void bond_3ad_update_lacp_active(struct bonding *bond)</div><div class='add'>+{</div><div class='add'>+	struct port *port = NULL;</div><div class='add'>+	struct list_head *iter;</div><div class='add'>+	struct slave *slave;</div><div class='add'>+	int lacp_active;</div><div class='add'>+</div><div class='add'>+	lacp_active = bond-&gt;params.lacp_active;</div><div class='add'>+	spin_lock_bh(&amp;bond-&gt;mode_lock);</div><div class='add'>+	bond_for_each_slave(bond, slave, iter) {</div><div class='add'>+		port = &amp;(SLAVE_AD_INFO(slave)-&gt;port);</div><div class='add'>+		if (lacp_active)</div><div class='add'>+			port-&gt;actor_oper_port_state |= LACP_STATE_LACP_ACTIVITY;</div><div class='ctx'> 		else</div><div class='del'>-			port-&gt;actor_oper_port_state &amp;= ~AD_STATE_LACP_TIMEOUT;</div><div class='add'>+			port-&gt;actor_oper_port_state &amp;= ~LACP_STATE_LACP_ACTIVITY;</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_unlock_bh(&amp;bond-&gt;mode_lock);</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+size_t bond_3ad_stats_size(void)</div><div class='add'>+{</div><div class='add'>+	return nla_total_size_64bit(sizeof(u64)) + /* BOND_3AD_STAT_LACPDU_RX */</div><div class='add'>+	       nla_total_size_64bit(sizeof(u64)) + /* BOND_3AD_STAT_LACPDU_TX */</div><div class='add'>+	       nla_total_size_64bit(sizeof(u64)) + /* BOND_3AD_STAT_LACPDU_UNKNOWN_RX */</div><div class='add'>+	       nla_total_size_64bit(sizeof(u64)) + /* BOND_3AD_STAT_LACPDU_ILLEGAL_RX */</div><div class='add'>+	       nla_total_size_64bit(sizeof(u64)) + /* BOND_3AD_STAT_MARKER_RX */</div><div class='add'>+	       nla_total_size_64bit(sizeof(u64)) + /* BOND_3AD_STAT_MARKER_TX */</div><div class='add'>+	       nla_total_size_64bit(sizeof(u64)) + /* BOND_3AD_STAT_MARKER_RESP_RX */</div><div class='add'>+	       nla_total_size_64bit(sizeof(u64)) + /* BOND_3AD_STAT_MARKER_RESP_TX */</div><div class='add'>+	       nla_total_size_64bit(sizeof(u64)); /* BOND_3AD_STAT_MARKER_UNKNOWN_RX */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bond_3ad_stats_fill(struct sk_buff *skb, struct bond_3ad_stats *stats)</div><div class='add'>+{</div><div class='add'>+	u64 val;</div><div class='add'>+</div><div class='add'>+	val = atomic64_read(&amp;stats-&gt;lacpdu_rx);</div><div class='add'>+	if (nla_put_u64_64bit(skb, BOND_3AD_STAT_LACPDU_RX, val,</div><div class='add'>+			      BOND_3AD_STAT_PAD))</div><div class='add'>+		return -EMSGSIZE;</div><div class='add'>+	val = atomic64_read(&amp;stats-&gt;lacpdu_tx);</div><div class='add'>+	if (nla_put_u64_64bit(skb, BOND_3AD_STAT_LACPDU_TX, val,</div><div class='add'>+			      BOND_3AD_STAT_PAD))</div><div class='add'>+		return -EMSGSIZE;</div><div class='add'>+	val = atomic64_read(&amp;stats-&gt;lacpdu_unknown_rx);</div><div class='add'>+	if (nla_put_u64_64bit(skb, BOND_3AD_STAT_LACPDU_UNKNOWN_RX, val,</div><div class='add'>+			      BOND_3AD_STAT_PAD))</div><div class='add'>+		return -EMSGSIZE;</div><div class='add'>+	val = atomic64_read(&amp;stats-&gt;lacpdu_illegal_rx);</div><div class='add'>+	if (nla_put_u64_64bit(skb, BOND_3AD_STAT_LACPDU_ILLEGAL_RX, val,</div><div class='add'>+			      BOND_3AD_STAT_PAD))</div><div class='add'>+		return -EMSGSIZE;</div><div class='add'>+</div><div class='add'>+	val = atomic64_read(&amp;stats-&gt;marker_rx);</div><div class='add'>+	if (nla_put_u64_64bit(skb, BOND_3AD_STAT_MARKER_RX, val,</div><div class='add'>+			      BOND_3AD_STAT_PAD))</div><div class='add'>+		return -EMSGSIZE;</div><div class='add'>+	val = atomic64_read(&amp;stats-&gt;marker_tx);</div><div class='add'>+	if (nla_put_u64_64bit(skb, BOND_3AD_STAT_MARKER_TX, val,</div><div class='add'>+			      BOND_3AD_STAT_PAD))</div><div class='add'>+		return -EMSGSIZE;</div><div class='add'>+	val = atomic64_read(&amp;stats-&gt;marker_resp_rx);</div><div class='add'>+	if (nla_put_u64_64bit(skb, BOND_3AD_STAT_MARKER_RESP_RX, val,</div><div class='add'>+			      BOND_3AD_STAT_PAD))</div><div class='add'>+		return -EMSGSIZE;</div><div class='add'>+	val = atomic64_read(&amp;stats-&gt;marker_resp_tx);</div><div class='add'>+	if (nla_put_u64_64bit(skb, BOND_3AD_STAT_MARKER_RESP_TX, val,</div><div class='add'>+			      BOND_3AD_STAT_PAD))</div><div class='add'>+		return -EMSGSIZE;</div><div class='add'>+	val = atomic64_read(&amp;stats-&gt;marker_unknown_rx);</div><div class='add'>+	if (nla_put_u64_64bit(skb, BOND_3AD_STAT_MARKER_UNKNOWN_RX, val,</div><div class='add'>+			      BOND_3AD_STAT_PAD))</div><div class='add'>+		return -EMSGSIZE;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/bonding/bond_alb.c b/drivers/net/bonding/bond_alb.c<br/>index bb9e9fc45e1b..2d37b07c8215 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/bonding/bond_alb.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/bonding/bond_alb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/bonding/bond_alb.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/bonding/bond_alb.c</a></div><div class='hunk'>@@ -1,22 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright(c) 1999 - 2004 Intel Corporation. All rights reserved.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms of the GNU General Public License as published by the</div><div class='del'>- * Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY</div><div class='del'>- * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License</div><div class='del'>- * for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License along</div><div class='del'>- * with this program; if not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='del'>- *</div><div class='del'>- * The full GNU General Public License is included in this distribution in the</div><div class='del'>- * file called LICENSE.</div><div class='del'>- *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/skbuff.h&gt;</div><div class='hunk'>@@ -33,22 +17,14 @@</div><div class='ctx'> #include &lt;linux/if_bonding.h&gt;</div><div class='ctx'> #include &lt;linux/if_vlan.h&gt;</div><div class='ctx'> #include &lt;linux/in.h&gt;</div><div class='del'>-#include &lt;net/ipx.h&gt;</div><div class='ctx'> #include &lt;net/arp.h&gt;</div><div class='ctx'> #include &lt;net/ipv6.h&gt;</div><div class='add'>+#include &lt;net/ndisc.h&gt;</div><div class='ctx'> #include &lt;asm/byteorder.h&gt;</div><div class='ctx'> #include &lt;net/bonding.h&gt;</div><div class='ctx'> #include &lt;net/bond_alb.h&gt;</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#ifndef __long_aligned</div><div class='del'>-#define __long_aligned __attribute__((aligned((sizeof(long)))))</div><div class='del'>-#endif</div><div class='del'>-static const u8 mac_bcast[ETH_ALEN] __long_aligned = {</div><div class='del'>-	0xff, 0xff, 0xff, 0xff, 0xff, 0xff</div><div class='del'>-};</div><div class='del'>-static const u8 mac_v6_allmcast[ETH_ALEN] __long_aligned = {</div><div class='add'>+static const u8 mac_v6_allmcast[ETH_ALEN + 2] __long_aligned = {</div><div class='ctx'> 	0x33, 0x33, 0x00, 0x00, 0x00, 0x01</div><div class='ctx'> };</div><div class='ctx'> static const int alb_delta_in_ticks = HZ / ALB_TIMER_TICKS_PER_SEC;</div><div class='hunk'>@@ -74,13 +50,8 @@ struct arp_pkt {</div><div class='ctx'> };</div><div class='ctx'> #pragma pack()</div><div class='ctx'> </div><div class='del'>-static inline struct arp_pkt *arp_pkt(const struct sk_buff *skb)</div><div class='del'>-{</div><div class='del'>-	return (struct arp_pkt *)skb_network_header(skb);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* Forward declaration */</div><div class='del'>-static void alb_send_learning_packets(struct slave *slave, u8 mac_addr[],</div><div class='add'>+static void alb_send_learning_packets(struct slave *slave, const u8 mac_addr[],</div><div class='ctx'> 				      bool strict_match);</div><div class='ctx'> static void rlb_purge_src_ip(struct bonding *bond, struct arp_pkt *arp);</div><div class='ctx'> static void rlb_src_unlink(struct bonding *bond, u32 index);</div><div class='hunk'>@@ -133,6 +104,7 @@ static void __tlb_clear_slave(struct bonding *bond, struct slave *slave,</div><div class='ctx'> 		index = SLAVE_TLB_INFO(slave).head;</div><div class='ctx'> 		while (index != TLB_NULL_INDEX) {</div><div class='ctx'> 			u32 next_index = tx_hash_table[index].next;</div><div class='add'>+</div><div class='ctx'> 			tlb_init_table_entry(&amp;tx_hash_table[index], save_load);</div><div class='ctx'> 			index = next_index;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -159,7 +131,7 @@ static int tlb_initialize(struct bonding *bond)</div><div class='ctx'> </div><div class='ctx'> 	new_hashtbl = kzalloc(size, GFP_KERNEL);</div><div class='ctx'> 	if (!new_hashtbl)</div><div class='del'>-		return -1;</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_bh(&amp;bond-&gt;mode_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -257,7 +229,7 @@ static struct slave *tlb_choose_channel(struct bonding *bond, u32 hash_index,</div><div class='ctx'> {</div><div class='ctx'> 	struct slave *tx_slave;</div><div class='ctx'> </div><div class='del'>-	/* We don't need to disable softirq here, becase</div><div class='add'>+	/* We don't need to disable softirq here, because</div><div class='ctx'> 	 * tlb_choose_channel() is only called by bond_alb_xmit()</div><div class='ctx'> 	 * which already has softirq disabled.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -324,7 +296,7 @@ static int rlb_arp_recv(const struct sk_buff *skb, struct bonding *bond,</div><div class='ctx'> 	if (arp-&gt;op_code == htons(ARPOP_REPLY)) {</div><div class='ctx'> 		/* update rx hash table for this ARP */</div><div class='ctx'> 		rlb_update_entry_from_arp(bond, arp);</div><div class='del'>-		netdev_dbg(bond-&gt;dev, "Server received an ARP Reply from client\n");</div><div class='add'>+		slave_dbg(bond-&gt;dev, slave-&gt;dev, "Server received an ARP Reply from client\n");</div><div class='ctx'> 	}</div><div class='ctx'> out:</div><div class='ctx'> 	return RX_HANDLER_ANOTHER;</div><div class='hunk'>@@ -382,7 +354,8 @@ static struct slave *rlb_next_rx_slave(struct bonding *bond)</div><div class='ctx'>  *</div><div class='ctx'>  * Caller must hold RTNL</div><div class='ctx'>  */</div><div class='del'>-static void rlb_teach_disabled_mac_on_primary(struct bonding *bond, u8 addr[])</div><div class='add'>+static void rlb_teach_disabled_mac_on_primary(struct bonding *bond,</div><div class='add'>+					      const u8 addr[])</div><div class='ctx'> {</div><div class='ctx'> 	struct slave *curr_active = rtnl_dereference(bond-&gt;curr_active_slave);</div><div class='ctx'> </div><div class='hunk'>@@ -423,8 +396,7 @@ static void rlb_clear_slave(struct bonding *bond, struct slave *slave)</div><div class='ctx'> </div><div class='ctx'> 			if (assigned_slave) {</div><div class='ctx'> 				rx_hash_table[index].slave = assigned_slave;</div><div class='del'>-				if (!ether_addr_equal_64bits(rx_hash_table[index].mac_dst,</div><div class='del'>-							     mac_bcast)) {</div><div class='add'>+				if (is_valid_ether_addr(rx_hash_table[index].mac_dst)) {</div><div class='ctx'> 					bond_info-&gt;rx_hashtbl[index].ntt = 1;</div><div class='ctx'> 					bond_info-&gt;rx_ntt = 1;</div><div class='ctx'> 					/* A slave has been removed from the</div><div class='hunk'>@@ -453,7 +425,7 @@ static void rlb_update_client(struct rlb_client_info *client_info)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	if (!client_info-&gt;slave)</div><div class='add'>+	if (!client_info-&gt;slave || !is_valid_ether_addr(client_info-&gt;mac_dst))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; RLB_ARP_BURST_SIZE; i++) {</div><div class='hunk'>@@ -467,8 +439,9 @@ static void rlb_update_client(struct rlb_client_info *client_info)</div><div class='ctx'> 				 client_info-&gt;slave-&gt;dev-&gt;dev_addr,</div><div class='ctx'> 				 client_info-&gt;mac_dst);</div><div class='ctx'> 		if (!skb) {</div><div class='del'>-			netdev_err(client_info-&gt;slave-&gt;bond-&gt;dev,</div><div class='del'>-				   "failed to create an ARP packet\n");</div><div class='add'>+			slave_err(client_info-&gt;slave-&gt;bond-&gt;dev,</div><div class='add'>+				  client_info-&gt;slave-&gt;dev,</div><div class='add'>+				  "failed to create an ARP packet\n");</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -527,7 +500,7 @@ static void rlb_req_update_slave_clients(struct bonding *bond, struct slave *sla</div><div class='ctx'> 		client_info = &amp;(bond_info-&gt;rx_hashtbl[hash_index]);</div><div class='ctx'> </div><div class='ctx'> 		if ((client_info-&gt;slave == slave) &amp;&amp;</div><div class='del'>-		    !ether_addr_equal_64bits(client_info-&gt;mac_dst, mac_bcast)) {</div><div class='add'>+		    is_valid_ether_addr(client_info-&gt;mac_dst)) {</div><div class='ctx'> 			client_info-&gt;ntt = 1;</div><div class='ctx'> 			ntt = 1;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -568,7 +541,7 @@ static void rlb_req_update_subnet_clients(struct bonding *bond, __be32 src_ip)</div><div class='ctx'> 		if ((client_info-&gt;ip_src == src_ip) &amp;&amp;</div><div class='ctx'> 		    !ether_addr_equal_64bits(client_info-&gt;slave-&gt;dev-&gt;dev_addr,</div><div class='ctx'> 					     bond-&gt;dev-&gt;dev_addr) &amp;&amp;</div><div class='del'>-		    !ether_addr_equal_64bits(client_info-&gt;mac_dst, mac_bcast)) {</div><div class='add'>+		    is_valid_ether_addr(client_info-&gt;mac_dst)) {</div><div class='ctx'> 			client_info-&gt;ntt = 1;</div><div class='ctx'> 			bond_info-&gt;rx_ntt = 1;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -577,10 +550,11 @@ static void rlb_req_update_subnet_clients(struct bonding *bond, __be32 src_ip)</div><div class='ctx'> 	spin_unlock(&amp;bond-&gt;mode_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct slave *rlb_choose_channel(struct sk_buff *skb, struct bonding *bond)</div><div class='add'>+static struct slave *rlb_choose_channel(struct sk_buff *skb,</div><div class='add'>+					struct bonding *bond,</div><div class='add'>+					const struct arp_pkt *arp)</div><div class='ctx'> {</div><div class='ctx'> 	struct alb_bond_info *bond_info = &amp;(BOND_ALB_INFO(bond));</div><div class='del'>-	struct arp_pkt *arp = arp_pkt(skb);</div><div class='ctx'> 	struct slave *assigned_slave, *curr_active_slave;</div><div class='ctx'> 	struct rlb_client_info *client_info;</div><div class='ctx'> 	u32 hash_index = 0;</div><div class='hunk'>@@ -596,7 +570,7 @@ static struct slave *rlb_choose_channel(struct sk_buff *skb, struct bonding *bon</div><div class='ctx'> 		if ((client_info-&gt;ip_src == arp-&gt;ip_src) &amp;&amp;</div><div class='ctx'> 		    (client_info-&gt;ip_dst == arp-&gt;ip_dst)) {</div><div class='ctx'> 			/* the entry is already assigned to this client */</div><div class='del'>-			if (!ether_addr_equal_64bits(arp-&gt;mac_dst, mac_bcast)) {</div><div class='add'>+			if (!is_broadcast_ether_addr(arp-&gt;mac_dst)) {</div><div class='ctx'> 				/* update mac address from arp */</div><div class='ctx'> 				ether_addr_copy(client_info-&gt;mac_dst, arp-&gt;mac_dst);</div><div class='ctx'> 			}</div><div class='hunk'>@@ -636,7 +610,7 @@ static struct slave *rlb_choose_channel(struct sk_buff *skb, struct bonding *bon</div><div class='ctx'> </div><div class='ctx'> 		client_info-&gt;ip_src = arp-&gt;ip_src;</div><div class='ctx'> 		client_info-&gt;ip_dst = arp-&gt;ip_dst;</div><div class='del'>-		/* arp-&gt;mac_dst is broadcast for arp reqeusts.</div><div class='add'>+		/* arp-&gt;mac_dst is broadcast for arp requests.</div><div class='ctx'> 		 * will be updated with clients actual unicast mac address</div><div class='ctx'> 		 * upon receiving an arp reply.</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -644,7 +618,7 @@ static struct slave *rlb_choose_channel(struct sk_buff *skb, struct bonding *bon</div><div class='ctx'> 		ether_addr_copy(client_info-&gt;mac_src, arp-&gt;mac_src);</div><div class='ctx'> 		client_info-&gt;slave = assigned_slave;</div><div class='ctx'> </div><div class='del'>-		if (!ether_addr_equal_64bits(client_info-&gt;mac_dst, mac_bcast)) {</div><div class='add'>+		if (is_valid_ether_addr(client_info-&gt;mac_dst)) {</div><div class='ctx'> 			client_info-&gt;ntt = 1;</div><div class='ctx'> 			bond-&gt;alb_info.rx_ntt = 1;</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -656,6 +630,7 @@ static struct slave *rlb_choose_channel(struct sk_buff *skb, struct bonding *bon</div><div class='ctx'> </div><div class='ctx'> 		if (!client_info-&gt;assigned) {</div><div class='ctx'> 			u32 prev_tbl_head = bond_info-&gt;rx_hashtbl_used_head;</div><div class='add'>+</div><div class='ctx'> 			bond_info-&gt;rx_hashtbl_used_head = hash_index;</div><div class='ctx'> 			client_info-&gt;used_next = prev_tbl_head;</div><div class='ctx'> 			if (prev_tbl_head != RLB_NULL_INDEX) {</div><div class='hunk'>@@ -677,28 +652,44 @@ static struct slave *rlb_choose_channel(struct sk_buff *skb, struct bonding *bon</div><div class='ctx'>  */</div><div class='ctx'> static struct slave *rlb_arp_xmit(struct sk_buff *skb, struct bonding *bond)</div><div class='ctx'> {</div><div class='del'>-	struct arp_pkt *arp = arp_pkt(skb);</div><div class='ctx'> 	struct slave *tx_slave = NULL;</div><div class='add'>+	struct net_device *dev;</div><div class='add'>+	struct arp_pkt *arp;</div><div class='add'>+</div><div class='add'>+	if (!pskb_network_may_pull(skb, sizeof(*arp)))</div><div class='add'>+		return NULL;</div><div class='add'>+	arp = (struct arp_pkt *)skb_network_header(skb);</div><div class='ctx'> </div><div class='del'>-	/* Don't modify or load balance ARPs that do not originate locally</div><div class='del'>-	 * (e.g.,arrive via a bridge).</div><div class='add'>+	/* Don't modify or load balance ARPs that do not originate</div><div class='add'>+	 * from the bond itself or a VLAN directly above the bond.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!bond_slave_has_mac_rx(bond, arp-&gt;mac_src))</div><div class='add'>+	if (!bond_slave_has_mac_rcu(bond, arp-&gt;mac_src))</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='add'>+	dev = ip_dev_find(dev_net(bond-&gt;dev), arp-&gt;ip_src);</div><div class='add'>+	if (dev) {</div><div class='add'>+		if (netif_is_any_bridge_master(dev)) {</div><div class='add'>+			dev_put(dev);</div><div class='add'>+			return NULL;</div><div class='add'>+		}</div><div class='add'>+		dev_put(dev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (arp-&gt;op_code == htons(ARPOP_REPLY)) {</div><div class='ctx'> 		/* the arp must be sent on the selected rx channel */</div><div class='del'>-		tx_slave = rlb_choose_channel(skb, bond);</div><div class='add'>+		tx_slave = rlb_choose_channel(skb, bond, arp);</div><div class='ctx'> 		if (tx_slave)</div><div class='del'>-			ether_addr_copy(arp-&gt;mac_src, tx_slave-&gt;dev-&gt;dev_addr);</div><div class='del'>-		netdev_dbg(bond-&gt;dev, "Server sent ARP Reply packet\n");</div><div class='add'>+			bond_hw_addr_copy(arp-&gt;mac_src, tx_slave-&gt;dev-&gt;dev_addr,</div><div class='add'>+					  tx_slave-&gt;dev-&gt;addr_len);</div><div class='add'>+		netdev_dbg(bond-&gt;dev, "(slave %s): Server sent ARP Reply packet\n",</div><div class='add'>+			   tx_slave ? tx_slave-&gt;dev-&gt;name : "NULL");</div><div class='ctx'> 	} else if (arp-&gt;op_code == htons(ARPOP_REQUEST)) {</div><div class='ctx'> 		/* Create an entry in the rx_hashtbl for this client as a</div><div class='ctx'> 		 * place holder.</div><div class='ctx'> 		 * When the arp reply is received the entry will be updated</div><div class='ctx'> 		 * with the correct unicast address of the client.</div><div class='ctx'> 		 */</div><div class='del'>-		rlb_choose_channel(skb, bond);</div><div class='add'>+		tx_slave = rlb_choose_channel(skb, bond, arp);</div><div class='ctx'> </div><div class='ctx'> 		/* The ARP reply packets must be delayed so that</div><div class='ctx'> 		 * they can cancel out the influence of the ARP request.</div><div class='hunk'>@@ -711,7 +702,8 @@ static struct slave *rlb_arp_xmit(struct sk_buff *skb, struct bonding *bond)</div><div class='ctx'> 		 * updated with their assigned mac.</div><div class='ctx'> 		 */</div><div class='ctx'> 		rlb_req_update_subnet_clients(bond, arp-&gt;ip_src);</div><div class='del'>-		netdev_dbg(bond-&gt;dev, "Server sent ARP Request packet\n");</div><div class='add'>+		netdev_dbg(bond-&gt;dev, "(slave %s): Server sent ARP Request packet\n",</div><div class='add'>+			   tx_slave ? tx_slave-&gt;dev-&gt;name : "NULL");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return tx_slave;</div><div class='hunk'>@@ -735,8 +727,10 @@ static void rlb_rebalance(struct bonding *bond)</div><div class='ctx'> 		assigned_slave = __rlb_next_rx_slave(bond);</div><div class='ctx'> 		if (assigned_slave &amp;&amp; (client_info-&gt;slave != assigned_slave)) {</div><div class='ctx'> 			client_info-&gt;slave = assigned_slave;</div><div class='del'>-			client_info-&gt;ntt = 1;</div><div class='del'>-			ntt = 1;</div><div class='add'>+			if (!is_zero_ether_addr(client_info-&gt;mac_dst)) {</div><div class='add'>+				client_info-&gt;ntt = 1;</div><div class='add'>+				ntt = 1;</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -849,9 +843,10 @@ static void rlb_purge_src_ip(struct bonding *bond, struct arp_pkt *arp)</div><div class='ctx'> 	while (index != RLB_NULL_INDEX) {</div><div class='ctx'> 		struct rlb_client_info *entry = &amp;(bond_info-&gt;rx_hashtbl[index]);</div><div class='ctx'> 		u32 next_index = entry-&gt;src_next;</div><div class='add'>+</div><div class='ctx'> 		if (entry-&gt;ip_src == arp-&gt;ip_src &amp;&amp;</div><div class='ctx'> 		    !ether_addr_equal_64bits(arp-&gt;mac_src, entry-&gt;mac_src))</div><div class='del'>-				rlb_delete_table_entry(bond, index);</div><div class='add'>+			rlb_delete_table_entry(bond, index);</div><div class='ctx'> 		index = next_index;</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_unlock_bh(&amp;bond-&gt;mode_lock);</div><div class='hunk'>@@ -921,13 +916,12 @@ static void rlb_clear_vlan(struct bonding *bond, unsigned short vlan_id)</div><div class='ctx'> </div><div class='ctx'> /*********************** tlb/rlb shared functions *********************/</div><div class='ctx'> </div><div class='del'>-static void alb_send_lp_vid(struct slave *slave, u8 mac_addr[],</div><div class='add'>+static void alb_send_lp_vid(struct slave *slave, const u8 mac_addr[],</div><div class='ctx'> 			    __be16 vlan_proto, u16 vid)</div><div class='ctx'> {</div><div class='ctx'> 	struct learning_pkt pkt;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	int size = sizeof(struct learning_pkt);</div><div class='del'>-	char *data;</div><div class='ctx'> </div><div class='ctx'> 	memset(&amp;pkt, 0, size);</div><div class='ctx'> 	ether_addr_copy(pkt.mac_dst, mac_addr);</div><div class='hunk'>@@ -938,8 +932,7 @@ static void alb_send_lp_vid(struct slave *slave, u8 mac_addr[],</div><div class='ctx'> 	if (!skb)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	data = skb_put(skb, size);</div><div class='del'>-	memcpy(data, &amp;pkt, size);</div><div class='add'>+	skb_put_data(skb, &amp;pkt, size);</div><div class='ctx'> </div><div class='ctx'> 	skb_reset_mac_header(skb);</div><div class='ctx'> 	skb-&gt;network_header = skb-&gt;mac_header + ETH_HLEN;</div><div class='hunk'>@@ -947,20 +940,74 @@ static void alb_send_lp_vid(struct slave *slave, u8 mac_addr[],</div><div class='ctx'> 	skb-&gt;priority = TC_PRIO_CONTROL;</div><div class='ctx'> 	skb-&gt;dev = slave-&gt;dev;</div><div class='ctx'> </div><div class='add'>+	slave_dbg(slave-&gt;bond-&gt;dev, slave-&gt;dev,</div><div class='add'>+		  "Send learning packet: mac %pM vlan %d\n", mac_addr, vid);</div><div class='add'>+</div><div class='ctx'> 	if (vid)</div><div class='ctx'> 		__vlan_hwaccel_put_tag(skb, vlan_proto, vid);</div><div class='ctx'> </div><div class='ctx'> 	dev_queue_xmit(skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void alb_send_learning_packets(struct slave *slave, u8 mac_addr[],</div><div class='del'>-				      bool strict_match)</div><div class='add'>+struct alb_walk_data {</div><div class='add'>+	struct bonding *bond;</div><div class='add'>+	struct slave *slave;</div><div class='add'>+	const u8 *mac_addr;</div><div class='add'>+	bool strict_match;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int alb_upper_dev_walk(struct net_device *upper,</div><div class='add'>+			      struct netdev_nested_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	struct bonding *bond = bond_get_bond_by_slave(slave);</div><div class='del'>-	struct net_device *upper;</div><div class='del'>-	struct list_head *iter;</div><div class='add'>+	struct alb_walk_data *data = (struct alb_walk_data *)priv-&gt;data;</div><div class='add'>+	bool strict_match = data-&gt;strict_match;</div><div class='add'>+	const u8 *mac_addr = data-&gt;mac_addr;</div><div class='add'>+	struct bonding *bond = data-&gt;bond;</div><div class='add'>+	struct slave *slave = data-&gt;slave;</div><div class='ctx'> 	struct bond_vlan_tag *tags;</div><div class='ctx'> </div><div class='add'>+	if (is_vlan_dev(upper) &amp;&amp;</div><div class='add'>+	    bond-&gt;dev-&gt;lower_level == upper-&gt;lower_level - 1) {</div><div class='add'>+		if (upper-&gt;addr_assign_type == NET_ADDR_STOLEN) {</div><div class='add'>+			alb_send_lp_vid(slave, mac_addr,</div><div class='add'>+					vlan_dev_vlan_proto(upper),</div><div class='add'>+					vlan_dev_vlan_id(upper));</div><div class='add'>+		} else {</div><div class='add'>+			alb_send_lp_vid(slave, upper-&gt;dev_addr,</div><div class='add'>+					vlan_dev_vlan_proto(upper),</div><div class='add'>+					vlan_dev_vlan_id(upper));</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* If this is a macvlan device, then only send updates</div><div class='add'>+	 * when strict_match is turned off.</div><div class='add'>+	 */</div><div class='add'>+	if (netif_is_macvlan(upper) &amp;&amp; !strict_match) {</div><div class='add'>+		tags = bond_verify_device_path(bond-&gt;dev, upper, 0);</div><div class='add'>+		if (IS_ERR_OR_NULL(tags))</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		alb_send_lp_vid(slave, upper-&gt;dev_addr,</div><div class='add'>+				tags[0].vlan_proto, tags[0].vlan_id);</div><div class='add'>+		kfree(tags);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void alb_send_learning_packets(struct slave *slave, const u8 mac_addr[],</div><div class='add'>+				      bool strict_match)</div><div class='add'>+{</div><div class='add'>+	struct bonding *bond = bond_get_bond_by_slave(slave);</div><div class='add'>+	struct netdev_nested_priv priv;</div><div class='add'>+	struct alb_walk_data data = {</div><div class='add'>+		.strict_match = strict_match,</div><div class='add'>+		.mac_addr = mac_addr,</div><div class='add'>+		.slave = slave,</div><div class='add'>+		.bond = bond,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	priv.data = (void *)&amp;data;</div><div class='ctx'> 	/* send untagged */</div><div class='ctx'> 	alb_send_lp_vid(slave, mac_addr, 0, 0);</div><div class='ctx'> </div><div class='hunk'>@@ -968,54 +1015,28 @@ static void alb_send_learning_packets(struct slave *slave, u8 mac_addr[],</div><div class='ctx'> 	 * for that device.</div><div class='ctx'> 	 */</div><div class='ctx'> 	rcu_read_lock();</div><div class='del'>-	netdev_for_each_all_upper_dev_rcu(bond-&gt;dev, upper, iter) {</div><div class='del'>-		if (is_vlan_dev(upper) &amp;&amp; vlan_get_encap_level(upper) == 0) {</div><div class='del'>-			if (strict_match &amp;&amp;</div><div class='del'>-			    ether_addr_equal_64bits(mac_addr,</div><div class='del'>-						    upper-&gt;dev_addr)) {</div><div class='del'>-				alb_send_lp_vid(slave, mac_addr,</div><div class='del'>-						vlan_dev_vlan_proto(upper),</div><div class='del'>-						vlan_dev_vlan_id(upper));</div><div class='del'>-			} else if (!strict_match) {</div><div class='del'>-				alb_send_lp_vid(slave, upper-&gt;dev_addr,</div><div class='del'>-						vlan_dev_vlan_proto(upper),</div><div class='del'>-						vlan_dev_vlan_id(upper));</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* If this is a macvlan device, then only send updates</div><div class='del'>-		 * when strict_match is turned off.</div><div class='del'>-		 */</div><div class='del'>-		if (netif_is_macvlan(upper) &amp;&amp; !strict_match) {</div><div class='del'>-			tags = bond_verify_device_path(bond-&gt;dev, upper, 0);</div><div class='del'>-			if (IS_ERR_OR_NULL(tags))</div><div class='del'>-				BUG();</div><div class='del'>-			alb_send_lp_vid(slave, upper-&gt;dev_addr,</div><div class='del'>-					tags[0].vlan_proto, tags[0].vlan_id);</div><div class='del'>-			kfree(tags);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	netdev_walk_all_upper_dev_rcu(bond-&gt;dev, alb_upper_dev_walk, &amp;priv);</div><div class='ctx'> 	rcu_read_unlock();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int alb_set_slave_mac_addr(struct slave *slave, u8 addr[])</div><div class='add'>+static int alb_set_slave_mac_addr(struct slave *slave, const u8 addr[],</div><div class='add'>+				  unsigned int len)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = slave-&gt;dev;</div><div class='del'>-	struct sockaddr s_addr;</div><div class='add'>+	struct sockaddr_storage ss;</div><div class='ctx'> </div><div class='ctx'> 	if (BOND_MODE(slave-&gt;bond) == BOND_MODE_TLB) {</div><div class='del'>-		memcpy(dev-&gt;dev_addr, addr, dev-&gt;addr_len);</div><div class='add'>+		__dev_addr_set(dev, addr, len);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* for rlb each slave must have a unique hw mac addresses so that</div><div class='ctx'> 	 * each slave will receive packets destined to a different mac</div><div class='ctx'> 	 */</div><div class='del'>-	memcpy(s_addr.sa_data, addr, dev-&gt;addr_len);</div><div class='del'>-	s_addr.sa_family = dev-&gt;type;</div><div class='del'>-	if (dev_set_mac_address(dev, &amp;s_addr)) {</div><div class='del'>-		netdev_err(slave-&gt;bond-&gt;dev, "dev_set_mac_address of dev %s failed! ALB mode requires that the base driver support setting the hw address also when the network device's interface is open\n",</div><div class='del'>-			   dev-&gt;name);</div><div class='add'>+	memcpy(ss.__data, addr, len);</div><div class='add'>+	ss.ss_family = dev-&gt;type;</div><div class='add'>+	if (dev_set_mac_address(dev, &amp;ss, NULL)) {</div><div class='add'>+		slave_err(slave-&gt;bond-&gt;dev, dev, "dev_set_mac_address on slave failed! ALB mode requires that the base driver support setting the hw address also when the network device's interface is open\n");</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1027,11 +1048,14 @@ static int alb_set_slave_mac_addr(struct slave *slave, u8 addr[])</div><div class='ctx'>  */</div><div class='ctx'> static void alb_swap_mac_addr(struct slave *slave1, struct slave *slave2)</div><div class='ctx'> {</div><div class='del'>-	u8 tmp_mac_addr[ETH_ALEN];</div><div class='add'>+	u8 tmp_mac_addr[MAX_ADDR_LEN];</div><div class='ctx'> </div><div class='del'>-	ether_addr_copy(tmp_mac_addr, slave1-&gt;dev-&gt;dev_addr);</div><div class='del'>-	alb_set_slave_mac_addr(slave1, slave2-&gt;dev-&gt;dev_addr);</div><div class='del'>-	alb_set_slave_mac_addr(slave2, tmp_mac_addr);</div><div class='add'>+	bond_hw_addr_copy(tmp_mac_addr, slave1-&gt;dev-&gt;dev_addr,</div><div class='add'>+			  slave1-&gt;dev-&gt;addr_len);</div><div class='add'>+	alb_set_slave_mac_addr(slave1, slave2-&gt;dev-&gt;dev_addr,</div><div class='add'>+			       slave2-&gt;dev-&gt;addr_len);</div><div class='add'>+	alb_set_slave_mac_addr(slave2, tmp_mac_addr,</div><div class='add'>+			       slave1-&gt;dev-&gt;addr_len);</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1089,7 +1113,7 @@ static void alb_fasten_mac_swap(struct bonding *bond, struct slave *slave1,</div><div class='ctx'>  * If @slave's permanent hw address is different both from its current</div><div class='ctx'>  * address and from @bond's address, then somewhere in the bond there's</div><div class='ctx'>  * a slave that has @slave's permanet address as its current address.</div><div class='del'>- * We'll make sure that that slave no longer uses @slave's permanent address.</div><div class='add'>+ * We'll make sure that slave no longer uses @slave's permanent address.</div><div class='ctx'>  *</div><div class='ctx'>  * Caller must hold RTNL and no other locks</div><div class='ctx'>  */</div><div class='hunk'>@@ -1158,7 +1182,8 @@ static int alb_handle_addr_collision_on_attach(struct bonding *bond, struct slav</div><div class='ctx'> 		/* Try setting slave mac to bond address and fall-through</div><div class='ctx'> 		 * to code handling that situation below...</div><div class='ctx'> 		 */</div><div class='del'>-		alb_set_slave_mac_addr(slave, bond-&gt;dev-&gt;dev_addr);</div><div class='add'>+		alb_set_slave_mac_addr(slave, bond-&gt;dev-&gt;dev_addr,</div><div class='add'>+				       bond-&gt;dev-&gt;addr_len);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* The slave's address is equal to the address of the bond.</div><div class='hunk'>@@ -1183,14 +1208,14 @@ static int alb_handle_addr_collision_on_attach(struct bonding *bond, struct slav</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (free_mac_slave) {</div><div class='del'>-		alb_set_slave_mac_addr(slave, free_mac_slave-&gt;perm_hwaddr);</div><div class='add'>+		alb_set_slave_mac_addr(slave, free_mac_slave-&gt;perm_hwaddr,</div><div class='add'>+				       free_mac_slave-&gt;dev-&gt;addr_len);</div><div class='ctx'> </div><div class='del'>-		netdev_warn(bond-&gt;dev, "the hw address of slave %s is in use by the bond; giving it the hw address of %s\n",</div><div class='del'>-			    slave-&gt;dev-&gt;name, free_mac_slave-&gt;dev-&gt;name);</div><div class='add'>+		slave_warn(bond-&gt;dev, slave-&gt;dev, "the slave hw address is in use by the bond; giving it the hw address of %s\n",</div><div class='add'>+			   free_mac_slave-&gt;dev-&gt;name);</div><div class='ctx'> </div><div class='ctx'> 	} else if (has_bond_addr) {</div><div class='del'>-		netdev_err(bond-&gt;dev, "the hw address of slave %s is in use by the bond; couldn't find a slave with a free hw address to give it (this should not have happened)\n",</div><div class='del'>-			   slave-&gt;dev-&gt;name);</div><div class='add'>+		slave_err(bond-&gt;dev, slave-&gt;dev, "the slave hw address is in use by the bond; couldn't find a slave with a free hw address to give it (this should not have happened)\n");</div><div class='ctx'> 		return -EFAULT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1199,8 +1224,8 @@ static int alb_handle_addr_collision_on_attach(struct bonding *bond, struct slav</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * alb_set_mac_address</div><div class='del'>- * @bond:</div><div class='del'>- * @addr:</div><div class='add'>+ * @bond: bonding we're working on</div><div class='add'>+ * @addr: MAC address to set</div><div class='ctx'>  *</div><div class='ctx'>  * In TLB mode all slaves are configured to the bond's hw address, but set</div><div class='ctx'>  * their dev_addr field to different addresses (based on their permanent hw</div><div class='hunk'>@@ -1215,8 +1240,8 @@ static int alb_set_mac_address(struct bonding *bond, void *addr)</div><div class='ctx'> {</div><div class='ctx'> 	struct slave *slave, *rollback_slave;</div><div class='ctx'> 	struct list_head *iter;</div><div class='del'>-	struct sockaddr sa;</div><div class='del'>-	char tmp_addr[ETH_ALEN];</div><div class='add'>+	struct sockaddr_storage ss;</div><div class='add'>+	char tmp_addr[MAX_ADDR_LEN];</div><div class='ctx'> 	int res;</div><div class='ctx'> </div><div class='ctx'> 	if (bond-&gt;alb_info.rlb_enabled)</div><div class='hunk'>@@ -1224,12 +1249,13 @@ static int alb_set_mac_address(struct bonding *bond, void *addr)</div><div class='ctx'> </div><div class='ctx'> 	bond_for_each_slave(bond, slave, iter) {</div><div class='ctx'> 		/* save net_device's current hw address */</div><div class='del'>-		ether_addr_copy(tmp_addr, slave-&gt;dev-&gt;dev_addr);</div><div class='add'>+		bond_hw_addr_copy(tmp_addr, slave-&gt;dev-&gt;dev_addr,</div><div class='add'>+				  slave-&gt;dev-&gt;addr_len);</div><div class='ctx'> </div><div class='del'>-		res = dev_set_mac_address(slave-&gt;dev, addr);</div><div class='add'>+		res = dev_set_mac_address(slave-&gt;dev, addr, NULL);</div><div class='ctx'> </div><div class='ctx'> 		/* restore net_device's hw address */</div><div class='del'>-		ether_addr_copy(slave-&gt;dev-&gt;dev_addr, tmp_addr);</div><div class='add'>+		dev_addr_set(slave-&gt;dev, tmp_addr);</div><div class='ctx'> </div><div class='ctx'> 		if (res)</div><div class='ctx'> 			goto unwind;</div><div class='hunk'>@@ -1238,22 +1264,44 @@ static int alb_set_mac_address(struct bonding *bond, void *addr)</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> unwind:</div><div class='del'>-	memcpy(sa.sa_data, bond-&gt;dev-&gt;dev_addr, bond-&gt;dev-&gt;addr_len);</div><div class='del'>-	sa.sa_family = bond-&gt;dev-&gt;type;</div><div class='add'>+	memcpy(ss.__data, bond-&gt;dev-&gt;dev_addr, bond-&gt;dev-&gt;addr_len);</div><div class='add'>+	ss.ss_family = bond-&gt;dev-&gt;type;</div><div class='ctx'> </div><div class='ctx'> 	/* unwind from head to the slave that failed */</div><div class='ctx'> 	bond_for_each_slave(bond, rollback_slave, iter) {</div><div class='ctx'> 		if (rollback_slave == slave)</div><div class='ctx'> 			break;</div><div class='del'>-		ether_addr_copy(tmp_addr, rollback_slave-&gt;dev-&gt;dev_addr);</div><div class='del'>-		dev_set_mac_address(rollback_slave-&gt;dev, &amp;sa);</div><div class='del'>-		ether_addr_copy(rollback_slave-&gt;dev-&gt;dev_addr, tmp_addr);</div><div class='add'>+		bond_hw_addr_copy(tmp_addr, rollback_slave-&gt;dev-&gt;dev_addr,</div><div class='add'>+				  rollback_slave-&gt;dev-&gt;addr_len);</div><div class='add'>+		dev_set_mac_address(rollback_slave-&gt;dev, &amp;ss, NULL);</div><div class='add'>+		dev_addr_set(rollback_slave-&gt;dev, tmp_addr);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return res;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/************************ exported alb funcions ************************/</div><div class='add'>+/* determine if the packet is NA or NS */</div><div class='add'>+static bool alb_determine_nd(struct sk_buff *skb, struct bonding *bond)</div><div class='add'>+{</div><div class='add'>+	struct ipv6hdr *ip6hdr;</div><div class='add'>+	struct icmp6hdr *hdr;</div><div class='add'>+</div><div class='add'>+	if (!pskb_network_may_pull(skb, sizeof(*ip6hdr)))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	ip6hdr = ipv6_hdr(skb);</div><div class='add'>+	if (ip6hdr-&gt;nexthdr != IPPROTO_ICMPV6)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (!pskb_network_may_pull(skb, sizeof(*ip6hdr) + sizeof(*hdr)))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	hdr = icmp6_hdr(skb);</div><div class='add'>+	return hdr-&gt;icmp6_type == NDISC_NEIGHBOUR_ADVERTISEMENT ||</div><div class='add'>+		hdr-&gt;icmp6_type == NDISC_NEIGHBOUR_SOLICITATION;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/************************ exported alb functions ************************/</div><div class='ctx'> </div><div class='ctx'> int bond_alb_initialize(struct bonding *bond, int rlb_enabled)</div><div class='ctx'> {</div><div class='hunk'>@@ -1264,12 +1312,12 @@ int bond_alb_initialize(struct bonding *bond, int rlb_enabled)</div><div class='ctx'> 		return res;</div><div class='ctx'> </div><div class='ctx'> 	if (rlb_enabled) {</div><div class='del'>-		bond-&gt;alb_info.rlb_enabled = 1;</div><div class='ctx'> 		res = rlb_initialize(bond);</div><div class='ctx'> 		if (res) {</div><div class='ctx'> 			tlb_deinitialize(bond);</div><div class='ctx'> 			return res;</div><div class='ctx'> 		}</div><div class='add'>+		bond-&gt;alb_info.rlb_enabled = 1;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		bond-&gt;alb_info.rlb_enabled = 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1287,8 +1335,8 @@ void bond_alb_deinitialize(struct bonding *bond)</div><div class='ctx'> 		rlb_deinitialize(bond);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int bond_do_alb_xmit(struct sk_buff *skb, struct bonding *bond,</div><div class='del'>-			    struct slave *tx_slave)</div><div class='add'>+static netdev_tx_t bond_do_alb_xmit(struct sk_buff *skb, struct bonding *bond,</div><div class='add'>+				    struct slave *tx_slave)</div><div class='ctx'> {</div><div class='ctx'> 	struct alb_bond_info *bond_info = &amp;(BOND_ALB_INFO(bond));</div><div class='ctx'> 	struct ethhdr *eth_data = eth_hdr(skb);</div><div class='hunk'>@@ -1306,8 +1354,7 @@ static int bond_do_alb_xmit(struct sk_buff *skb, struct bonding *bond,</div><div class='ctx'> 					tx_slave-&gt;dev-&gt;dev_addr);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		bond_dev_queue_xmit(bond, skb, tx_slave-&gt;dev);</div><div class='del'>-		goto out;</div><div class='add'>+		return bond_dev_queue_xmit(bond, skb, tx_slave-&gt;dev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (tx_slave &amp;&amp; bond-&gt;params.tlb_dynamic_lb) {</div><div class='hunk'>@@ -1317,16 +1364,14 @@ static int bond_do_alb_xmit(struct sk_buff *skb, struct bonding *bond,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* no suitable interface, frame not sent */</div><div class='del'>-	bond_tx_drop(bond-&gt;dev, skb);</div><div class='del'>-out:</div><div class='del'>-	return NETDEV_TX_OK;</div><div class='add'>+	return bond_tx_drop(bond-&gt;dev, skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int bond_tlb_xmit(struct sk_buff *skb, struct net_device *bond_dev)</div><div class='add'>+struct slave *bond_xmit_tlb_slave_get(struct bonding *bond,</div><div class='add'>+				      struct sk_buff *skb)</div><div class='ctx'> {</div><div class='del'>-	struct bonding *bond = netdev_priv(bond_dev);</div><div class='del'>-	struct ethhdr *eth_data;</div><div class='ctx'> 	struct slave *tx_slave = NULL;</div><div class='add'>+	struct ethhdr *eth_data;</div><div class='ctx'> 	u32 hash_index;</div><div class='ctx'> </div><div class='ctx'> 	skb_reset_mac_header(skb);</div><div class='hunk'>@@ -1335,10 +1380,11 @@ int bond_tlb_xmit(struct sk_buff *skb, struct net_device *bond_dev)</div><div class='ctx'> 	/* Do not TX balance any multicast or broadcast */</div><div class='ctx'> 	if (!is_multicast_ether_addr(eth_data-&gt;h_dest)) {</div><div class='ctx'> 		switch (skb-&gt;protocol) {</div><div class='del'>-		case htons(ETH_P_IP):</div><div class='del'>-		case htons(ETH_P_IPX):</div><div class='del'>-		    /* In case of IPX, it will falback to L2 hash */</div><div class='ctx'> 		case htons(ETH_P_IPV6):</div><div class='add'>+			if (alb_determine_nd(skb, bond))</div><div class='add'>+				break;</div><div class='add'>+			fallthrough;</div><div class='add'>+		case htons(ETH_P_IP):</div><div class='ctx'> 			hash_index = bond_xmit_hash(bond, skb);</div><div class='ctx'> 			if (bond-&gt;params.tlb_dynamic_lb) {</div><div class='ctx'> 				tx_slave = tlb_choose_channel(bond,</div><div class='hunk'>@@ -1348,8 +1394,8 @@ int bond_tlb_xmit(struct sk_buff *skb, struct net_device *bond_dev)</div><div class='ctx'> 				struct bond_up_slave *slaves;</div><div class='ctx'> 				unsigned int count;</div><div class='ctx'> </div><div class='del'>-				slaves = rcu_dereference(bond-&gt;slave_arr);</div><div class='del'>-				count = slaves ? ACCESS_ONCE(slaves-&gt;count) : 0;</div><div class='add'>+				slaves = rcu_dereference(bond-&gt;usable_slaves);</div><div class='add'>+				count = slaves ? READ_ONCE(slaves-&gt;count) : 0;</div><div class='ctx'> 				if (likely(count))</div><div class='ctx'> 					tx_slave = slaves-&gt;arr[hash_index %</div><div class='ctx'> 							       count];</div><div class='hunk'>@@ -1357,44 +1403,58 @@ int bond_tlb_xmit(struct sk_buff *skb, struct net_device *bond_dev)</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	return bond_do_alb_xmit(skb, bond, tx_slave);</div><div class='add'>+	return tx_slave;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int bond_alb_xmit(struct sk_buff *skb, struct net_device *bond_dev)</div><div class='add'>+netdev_tx_t bond_tlb_xmit(struct sk_buff *skb, struct net_device *bond_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct bonding *bond = netdev_priv(bond_dev);</div><div class='del'>-	struct ethhdr *eth_data;</div><div class='add'>+	struct slave *tx_slave;</div><div class='add'>+</div><div class='add'>+	tx_slave = bond_xmit_tlb_slave_get(bond, skb);</div><div class='add'>+	return bond_do_alb_xmit(skb, bond, tx_slave);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct slave *bond_xmit_alb_slave_get(struct bonding *bond,</div><div class='add'>+				      struct sk_buff *skb)</div><div class='add'>+{</div><div class='ctx'> 	struct alb_bond_info *bond_info = &amp;(BOND_ALB_INFO(bond));</div><div class='del'>-	struct slave *tx_slave = NULL;</div><div class='ctx'> 	static const __be32 ip_bcast = htonl(0xffffffff);</div><div class='del'>-	int hash_size = 0;</div><div class='add'>+	struct slave *tx_slave = NULL;</div><div class='add'>+	const u8 *hash_start = NULL;</div><div class='ctx'> 	bool do_tx_balance = true;</div><div class='add'>+	struct ethhdr *eth_data;</div><div class='ctx'> 	u32 hash_index = 0;</div><div class='del'>-	const u8 *hash_start = NULL;</div><div class='del'>-	struct ipv6hdr *ip6hdr;</div><div class='add'>+	int hash_size = 0;</div><div class='ctx'> </div><div class='ctx'> 	skb_reset_mac_header(skb);</div><div class='ctx'> 	eth_data = eth_hdr(skb);</div><div class='ctx'> </div><div class='ctx'> 	switch (ntohs(skb-&gt;protocol)) {</div><div class='ctx'> 	case ETH_P_IP: {</div><div class='del'>-		const struct iphdr *iph = ip_hdr(skb);</div><div class='add'>+		const struct iphdr *iph;</div><div class='ctx'> </div><div class='del'>-		if (ether_addr_equal_64bits(eth_data-&gt;h_dest, mac_bcast) ||</div><div class='del'>-		    (iph-&gt;daddr == ip_bcast) ||</div><div class='del'>-		    (iph-&gt;protocol == IPPROTO_IGMP)) {</div><div class='add'>+		if (is_broadcast_ether_addr(eth_data-&gt;h_dest) ||</div><div class='add'>+		    !pskb_network_may_pull(skb, sizeof(*iph))) {</div><div class='add'>+			do_tx_balance = false;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		iph = ip_hdr(skb);</div><div class='add'>+		if (iph-&gt;daddr == ip_bcast || iph-&gt;protocol == IPPROTO_IGMP) {</div><div class='ctx'> 			do_tx_balance = false;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> 		hash_start = (char *)&amp;(iph-&gt;daddr);</div><div class='ctx'> 		hash_size = sizeof(iph-&gt;daddr);</div><div class='del'>-	}</div><div class='ctx'> 		break;</div><div class='del'>-	case ETH_P_IPV6:</div><div class='add'>+	}</div><div class='add'>+	case ETH_P_IPV6: {</div><div class='add'>+		const struct ipv6hdr *ip6hdr;</div><div class='add'>+</div><div class='ctx'> 		/* IPv6 doesn't really use broadcast mac address, but leave</div><div class='ctx'> 		 * that here just in case.</div><div class='ctx'> 		 */</div><div class='del'>-		if (ether_addr_equal_64bits(eth_data-&gt;h_dest, mac_bcast)) {</div><div class='add'>+		if (is_broadcast_ether_addr(eth_data-&gt;h_dest)) {</div><div class='ctx'> 			do_tx_balance = false;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1407,7 +1467,13 @@ int bond_alb_xmit(struct sk_buff *skb, struct net_device *bond_dev)</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		/* Additianally, DAD probes should not be tx-balanced as that</div><div class='add'>+		if (alb_determine_nd(skb, bond)) {</div><div class='add'>+			do_tx_balance = false;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* The IPv6 header is pulled by alb_determine_nd */</div><div class='add'>+		/* Additionally, DAD probes should not be tx-balanced as that</div><div class='ctx'> 		 * will lead to false positives for duplicate addresses and</div><div class='ctx'> 		 * prevent address configuration from working.</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -1417,28 +1483,10 @@ int bond_alb_xmit(struct sk_buff *skb, struct net_device *bond_dev)</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		hash_start = (char *)&amp;(ipv6_hdr(skb)-&gt;daddr);</div><div class='del'>-		hash_size = sizeof(ipv6_hdr(skb)-&gt;daddr);</div><div class='del'>-		break;</div><div class='del'>-	case ETH_P_IPX:</div><div class='del'>-		if (ipx_hdr(skb)-&gt;ipx_checksum != IPX_NO_CHECKSUM) {</div><div class='del'>-			/* something is wrong with this packet */</div><div class='del'>-			do_tx_balance = false;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (ipx_hdr(skb)-&gt;ipx_type != IPX_TYPE_NCP) {</div><div class='del'>-			/* The only protocol worth balancing in</div><div class='del'>-			 * this family since it has an "ARP" like</div><div class='del'>-			 * mechanism</div><div class='del'>-			 */</div><div class='del'>-			do_tx_balance = false;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		hash_start = (char *)eth_data-&gt;h_dest;</div><div class='del'>-		hash_size = ETH_ALEN;</div><div class='add'>+		hash_start = (char *)&amp;ip6hdr-&gt;daddr;</div><div class='add'>+		hash_size = sizeof(ip6hdr-&gt;daddr);</div><div class='ctx'> 		break;</div><div class='add'>+	}</div><div class='ctx'> 	case ETH_P_ARP:</div><div class='ctx'> 		do_tx_balance = false;</div><div class='ctx'> 		if (bond_info-&gt;rlb_enabled)</div><div class='hunk'>@@ -1450,10 +1498,34 @@ int bond_alb_xmit(struct sk_buff *skb, struct net_device *bond_dev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (do_tx_balance) {</div><div class='del'>-		hash_index = _simple_hash(hash_start, hash_size);</div><div class='del'>-		tx_slave = tlb_choose_channel(bond, hash_index, skb-&gt;len);</div><div class='add'>+		if (bond-&gt;params.tlb_dynamic_lb) {</div><div class='add'>+			hash_index = _simple_hash(hash_start, hash_size);</div><div class='add'>+			tx_slave = tlb_choose_channel(bond, hash_index, skb-&gt;len);</div><div class='add'>+		} else {</div><div class='add'>+			/*</div><div class='add'>+			 * do_tx_balance means we are free to select the tx_slave</div><div class='add'>+			 * So we do exactly what tlb would do for hash selection</div><div class='add'>+			 */</div><div class='add'>+</div><div class='add'>+			struct bond_up_slave *slaves;</div><div class='add'>+			unsigned int count;</div><div class='add'>+</div><div class='add'>+			slaves = rcu_dereference(bond-&gt;usable_slaves);</div><div class='add'>+			count = slaves ? READ_ONCE(slaves-&gt;count) : 0;</div><div class='add'>+			if (likely(count))</div><div class='add'>+				tx_slave = slaves-&gt;arr[bond_xmit_hash(bond, skb) %</div><div class='add'>+						       count];</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='add'>+	return tx_slave;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+netdev_tx_t bond_alb_xmit(struct sk_buff *skb, struct net_device *bond_dev)</div><div class='add'>+{</div><div class='add'>+	struct bonding *bond = netdev_priv(bond_dev);</div><div class='add'>+	struct slave *tx_slave = NULL;</div><div class='ctx'> </div><div class='add'>+	tx_slave = bond_xmit_alb_slave_get(bond, skb);</div><div class='ctx'> 	return bond_do_alb_xmit(skb, bond, tx_slave);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1466,14 +1538,14 @@ void bond_alb_monitor(struct work_struct *work)</div><div class='ctx'> 	struct slave *slave;</div><div class='ctx'> </div><div class='ctx'> 	if (!bond_has_slaves(bond)) {</div><div class='del'>-		bond_info-&gt;tx_rebalance_counter = 0;</div><div class='add'>+		atomic_set(&amp;bond_info-&gt;tx_rebalance_counter, 0);</div><div class='ctx'> 		bond_info-&gt;lp_counter = 0;</div><div class='ctx'> 		goto re_arm;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	rcu_read_lock();</div><div class='ctx'> </div><div class='del'>-	bond_info-&gt;tx_rebalance_counter++;</div><div class='add'>+	atomic_inc(&amp;bond_info-&gt;tx_rebalance_counter);</div><div class='ctx'> 	bond_info-&gt;lp_counter++;</div><div class='ctx'> </div><div class='ctx'> 	/* send learning packets */</div><div class='hunk'>@@ -1482,7 +1554,7 @@ void bond_alb_monitor(struct work_struct *work)</div><div class='ctx'> </div><div class='ctx'> 		bond_for_each_slave_rcu(bond, slave, iter) {</div><div class='ctx'> 			/* If updating current_active, use all currently</div><div class='del'>-			 * user mac addreses (!strict_match).  Otherwise, only</div><div class='add'>+			 * user mac addresses (!strict_match).  Otherwise, only</div><div class='ctx'> 			 * use mac of the slave device.</div><div class='ctx'> 			 * In RLB mode, we always use strict matches.</div><div class='ctx'> 			 */</div><div class='hunk'>@@ -1495,7 +1567,7 @@ void bond_alb_monitor(struct work_struct *work)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* rebalance tx traffic */</div><div class='del'>-	if (bond_info-&gt;tx_rebalance_counter &gt;= BOND_TLB_REBALANCE_TICKS) {</div><div class='add'>+	if (atomic_read(&amp;bond_info-&gt;tx_rebalance_counter) &gt;= BOND_TLB_REBALANCE_TICKS) {</div><div class='ctx'> 		bond_for_each_slave_rcu(bond, slave, iter) {</div><div class='ctx'> 			tlb_clear_slave(bond, slave, 1);</div><div class='ctx'> 			if (slave == rcu_access_pointer(bond-&gt;curr_active_slave)) {</div><div class='hunk'>@@ -1505,7 +1577,7 @@ void bond_alb_monitor(struct work_struct *work)</div><div class='ctx'> 				bond_info-&gt;unbalanced_load = 0;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='del'>-		bond_info-&gt;tx_rebalance_counter = 0;</div><div class='add'>+		atomic_set(&amp;bond_info-&gt;tx_rebalance_counter, 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (bond_info-&gt;rlb_enabled) {</div><div class='hunk'>@@ -1563,7 +1635,8 @@ int bond_alb_init_slave(struct bonding *bond, struct slave *slave)</div><div class='ctx'> {</div><div class='ctx'> 	int res;</div><div class='ctx'> </div><div class='del'>-	res = alb_set_slave_mac_addr(slave, slave-&gt;perm_hwaddr);</div><div class='add'>+	res = alb_set_slave_mac_addr(slave, slave-&gt;perm_hwaddr,</div><div class='add'>+				     slave-&gt;dev-&gt;addr_len);</div><div class='ctx'> 	if (res)</div><div class='ctx'> 		return res;</div><div class='ctx'> </div><div class='hunk'>@@ -1574,7 +1647,8 @@ int bond_alb_init_slave(struct bonding *bond, struct slave *slave)</div><div class='ctx'> 	tlb_init_slave(slave);</div><div class='ctx'> </div><div class='ctx'> 	/* order a rebalance ASAP */</div><div class='del'>-	bond-&gt;alb_info.tx_rebalance_counter = BOND_TLB_REBALANCE_TICKS;</div><div class='add'>+	atomic_set(&amp;bond-&gt;alb_info.tx_rebalance_counter,</div><div class='add'>+		   BOND_TLB_REBALANCE_TICKS);</div><div class='ctx'> </div><div class='ctx'> 	if (bond-&gt;alb_info.rlb_enabled)</div><div class='ctx'> 		bond-&gt;alb_info.rlb_rebalance = 1;</div><div class='hunk'>@@ -1611,7 +1685,8 @@ void bond_alb_handle_link_change(struct bonding *bond, struct slave *slave, char</div><div class='ctx'> 			rlb_clear_slave(bond, slave);</div><div class='ctx'> 	} else if (link == BOND_LINK_UP) {</div><div class='ctx'> 		/* order a rebalance ASAP */</div><div class='del'>-		bond_info-&gt;tx_rebalance_counter = BOND_TLB_REBALANCE_TICKS;</div><div class='add'>+		atomic_set(&amp;bond_info-&gt;tx_rebalance_counter,</div><div class='add'>+			   BOND_TLB_REBALANCE_TICKS);</div><div class='ctx'> 		if (bond-&gt;alb_info.rlb_enabled) {</div><div class='ctx'> 			bond-&gt;alb_info.rlb_rebalance = 1;</div><div class='ctx'> 			/* If the updelay module parameter is smaller than the</div><div class='hunk'>@@ -1677,17 +1752,19 @@ void bond_alb_handle_active_change(struct bonding *bond, struct slave *new_slave</div><div class='ctx'> 	 * and thus filter bond-&gt;dev_addr's packets, so force bond's mac</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (BOND_MODE(bond) == BOND_MODE_TLB) {</div><div class='del'>-		struct sockaddr sa;</div><div class='del'>-		u8 tmp_addr[ETH_ALEN];</div><div class='add'>+		struct sockaddr_storage ss;</div><div class='add'>+		u8 tmp_addr[MAX_ADDR_LEN];</div><div class='ctx'> </div><div class='del'>-		ether_addr_copy(tmp_addr, new_slave-&gt;dev-&gt;dev_addr);</div><div class='add'>+		bond_hw_addr_copy(tmp_addr, new_slave-&gt;dev-&gt;dev_addr,</div><div class='add'>+				  new_slave-&gt;dev-&gt;addr_len);</div><div class='ctx'> </div><div class='del'>-		memcpy(sa.sa_data, bond-&gt;dev-&gt;dev_addr, bond-&gt;dev-&gt;addr_len);</div><div class='del'>-		sa.sa_family = bond-&gt;dev-&gt;type;</div><div class='add'>+		bond_hw_addr_copy(ss.__data, bond-&gt;dev-&gt;dev_addr,</div><div class='add'>+				  bond-&gt;dev-&gt;addr_len);</div><div class='add'>+		ss.ss_family = bond-&gt;dev-&gt;type;</div><div class='ctx'> 		/* we don't care if it can't change its mac, best effort */</div><div class='del'>-		dev_set_mac_address(new_slave-&gt;dev, &amp;sa);</div><div class='add'>+		dev_set_mac_address(new_slave-&gt;dev, &amp;ss, NULL);</div><div class='ctx'> </div><div class='del'>-		ether_addr_copy(new_slave-&gt;dev-&gt;dev_addr, tmp_addr);</div><div class='add'>+		dev_addr_set(new_slave-&gt;dev, tmp_addr);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* curr_active_slave must be set before calling alb_swap_mac_addr */</div><div class='hunk'>@@ -1697,7 +1774,8 @@ void bond_alb_handle_active_change(struct bonding *bond, struct slave *new_slave</div><div class='ctx'> 		alb_fasten_mac_swap(bond, swap_slave, new_slave);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* set the new_slave to the bond mac address */</div><div class='del'>-		alb_set_slave_mac_addr(new_slave, bond-&gt;dev-&gt;dev_addr);</div><div class='add'>+		alb_set_slave_mac_addr(new_slave, bond-&gt;dev-&gt;dev_addr,</div><div class='add'>+				       bond-&gt;dev-&gt;addr_len);</div><div class='ctx'> 		alb_send_learning_packets(new_slave, bond-&gt;dev-&gt;dev_addr,</div><div class='ctx'> 					  false);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1707,19 +1785,19 @@ void bond_alb_handle_active_change(struct bonding *bond, struct slave *new_slave</div><div class='ctx'> int bond_alb_set_mac_address(struct net_device *bond_dev, void *addr)</div><div class='ctx'> {</div><div class='ctx'> 	struct bonding *bond = netdev_priv(bond_dev);</div><div class='del'>-	struct sockaddr *sa = addr;</div><div class='add'>+	struct sockaddr_storage *ss = addr;</div><div class='ctx'> 	struct slave *curr_active;</div><div class='ctx'> 	struct slave *swap_slave;</div><div class='ctx'> 	int res;</div><div class='ctx'> </div><div class='del'>-	if (!is_valid_ether_addr(sa-&gt;sa_data))</div><div class='add'>+	if (!is_valid_ether_addr(ss-&gt;__data))</div><div class='ctx'> 		return -EADDRNOTAVAIL;</div><div class='ctx'> </div><div class='ctx'> 	res = alb_set_mac_address(bond, addr);</div><div class='ctx'> 	if (res)</div><div class='ctx'> 		return res;</div><div class='ctx'> </div><div class='del'>-	memcpy(bond_dev-&gt;dev_addr, sa-&gt;sa_data, bond_dev-&gt;addr_len);</div><div class='add'>+	dev_addr_set(bond_dev, ss-&gt;__data);</div><div class='ctx'> </div><div class='ctx'> 	/* If there is no curr_active_slave there is nothing else to do.</div><div class='ctx'> 	 * Otherwise we'll need to pass the new address to it and handle</div><div class='hunk'>@@ -1735,7 +1813,8 @@ int bond_alb_set_mac_address(struct net_device *bond_dev, void *addr)</div><div class='ctx'> 		alb_swap_mac_addr(swap_slave, curr_active);</div><div class='ctx'> 		alb_fasten_mac_swap(bond, swap_slave, curr_active);</div><div class='ctx'> 	} else {</div><div class='del'>-		alb_set_slave_mac_addr(curr_active, bond_dev-&gt;dev_addr);</div><div class='add'>+		alb_set_slave_mac_addr(curr_active, bond_dev-&gt;dev_addr,</div><div class='add'>+				       bond_dev-&gt;addr_len);</div><div class='ctx'> </div><div class='ctx'> 		alb_send_learning_packets(curr_active,</div><div class='ctx'> 					  bond_dev-&gt;dev_addr, false);</div><div class='head'>diff --git a/drivers/net/bonding/bond_debugfs.c b/drivers/net/bonding/bond_debugfs.c<br/>index e52e25a977fa..8adbec7c5084 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/bonding/bond_debugfs.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/bonding/bond_debugfs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/bonding/bond_debugfs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/bonding/bond_debugfs.c</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='hunk'>@@ -44,69 +45,37 @@ static int bond_debug_rlb_hash_show(struct seq_file *m, void *v)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-static int bond_debug_rlb_hash_open(struct inode *inode, struct file *file)</div><div class='del'>-{</div><div class='del'>-	return single_open(file, bond_debug_rlb_hash_show, inode-&gt;i_private);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct file_operations bond_debug_rlb_hash_fops = {</div><div class='del'>-	.owner		= THIS_MODULE,</div><div class='del'>-	.open		= bond_debug_rlb_hash_open,</div><div class='del'>-	.read		= seq_read,</div><div class='del'>-	.llseek		= seq_lseek,</div><div class='del'>-	.release	= single_release,</div><div class='del'>-};</div><div class='add'>+DEFINE_SHOW_ATTRIBUTE(bond_debug_rlb_hash);</div><div class='ctx'> </div><div class='ctx'> void bond_debug_register(struct bonding *bond)</div><div class='ctx'> {</div><div class='del'>-	if (!bonding_debug_root)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='ctx'> 	bond-&gt;debug_dir =</div><div class='ctx'> 		debugfs_create_dir(bond-&gt;dev-&gt;name, bonding_debug_root);</div><div class='ctx'> </div><div class='del'>-	if (!bond-&gt;debug_dir) {</div><div class='del'>-		netdev_warn(bond-&gt;dev, "failed to register to debugfs\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	debugfs_create_file("rlb_hash_table", 0400, bond-&gt;debug_dir,</div><div class='ctx'> 				bond, &amp;bond_debug_rlb_hash_fops);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void bond_debug_unregister(struct bonding *bond)</div><div class='ctx'> {</div><div class='del'>-	if (!bonding_debug_root)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='ctx'> 	debugfs_remove_recursive(bond-&gt;debug_dir);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void bond_debug_reregister(struct bonding *bond)</div><div class='ctx'> {</div><div class='del'>-	struct dentry *d;</div><div class='del'>-</div><div class='del'>-	if (!bonding_debug_root)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	d = debugfs_rename(bonding_debug_root, bond-&gt;debug_dir,</div><div class='del'>-			   bonding_debug_root, bond-&gt;dev-&gt;name);</div><div class='del'>-	if (d) {</div><div class='del'>-		bond-&gt;debug_dir = d;</div><div class='del'>-	} else {</div><div class='add'>+	int err = debugfs_change_name(bond-&gt;debug_dir, "%s", bond-&gt;dev-&gt;name);</div><div class='add'>+	if (err) {</div><div class='ctx'> 		netdev_warn(bond-&gt;dev, "failed to reregister, so just unregister old one\n");</div><div class='ctx'> 		bond_debug_unregister(bond);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void bond_create_debugfs(void)</div><div class='add'>+void __init bond_create_debugfs(void)</div><div class='ctx'> {</div><div class='ctx'> 	bonding_debug_root = debugfs_create_dir("bonding", NULL);</div><div class='ctx'> </div><div class='del'>-	if (!bonding_debug_root) {</div><div class='add'>+	if (IS_ERR(bonding_debug_root))</div><div class='ctx'> 		pr_warn("Warning: Cannot create bonding directory in debugfs\n");</div><div class='del'>-	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void bond_destroy_debugfs(void)</div><div class='hunk'>@@ -130,7 +99,7 @@ void bond_debug_reregister(struct bonding *bond)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void bond_create_debugfs(void)</div><div class='add'>+void __init bond_create_debugfs(void)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c<br/>index a98dd4f1b0e3..3d56339a8a10 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/bonding/bond_main.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/bonding/bond_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/bonding/bond_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/bonding/bond_main.c</a></div><div class='hunk'>@@ -1,8 +1,9 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-1.0+</div><div class='ctx'> /*</div><div class='ctx'>  * originally based on the dummy device.</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright 1999, Thomas Davis, tadavis@lbl.gov.</div><div class='del'>- * Licensed under the GPL. Based on dummy.c, and eql.c devices.</div><div class='add'>+ * Based on dummy.c, and eql.c devices.</div><div class='ctx'>  *</div><div class='ctx'>  * bonding.c: an Ethernet Bonding driver</div><div class='ctx'>  *</div><div class='hunk'>@@ -35,12 +36,15 @@</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/fcntl.h&gt;</div><div class='add'>+#include &lt;linux/filter.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/ptrace.h&gt;</div><div class='ctx'> #include &lt;linux/ioport.h&gt;</div><div class='ctx'> #include &lt;linux/in.h&gt;</div><div class='ctx'> #include &lt;net/ip.h&gt;</div><div class='ctx'> #include &lt;linux/ip.h&gt;</div><div class='add'>+#include &lt;linux/icmp.h&gt;</div><div class='add'>+#include &lt;linux/icmpv6.h&gt;</div><div class='ctx'> #include &lt;linux/tcp.h&gt;</div><div class='ctx'> #include &lt;linux/udp.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='hunk'>@@ -69,6 +73,7 @@</div><div class='ctx'> #include &lt;linux/ethtool.h&gt;</div><div class='ctx'> #include &lt;linux/if_vlan.h&gt;</div><div class='ctx'> #include &lt;linux/if_bonding.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='ctx'> #include &lt;linux/jiffies.h&gt;</div><div class='ctx'> #include &lt;linux/preempt.h&gt;</div><div class='ctx'> #include &lt;net/route.h&gt;</div><div class='hunk'>@@ -77,10 +82,16 @@</div><div class='ctx'> #include &lt;net/pkt_sched.h&gt;</div><div class='ctx'> #include &lt;linux/rculist.h&gt;</div><div class='ctx'> #include &lt;net/flow_dissector.h&gt;</div><div class='del'>-#include &lt;net/switchdev.h&gt;</div><div class='add'>+#include &lt;net/xfrm.h&gt;</div><div class='ctx'> #include &lt;net/bonding.h&gt;</div><div class='ctx'> #include &lt;net/bond_3ad.h&gt;</div><div class='ctx'> #include &lt;net/bond_alb.h&gt;</div><div class='add'>+#if IS_ENABLED(CONFIG_TLS_DEVICE)</div><div class='add'>+#include &lt;net/tls.h&gt;</div><div class='add'>+#endif</div><div class='add'>+#include &lt;net/ip6_route.h&gt;</div><div class='add'>+#include &lt;net/netdev_lock.h&gt;</div><div class='add'>+#include &lt;net/xdp.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "bonding_priv.h"</div><div class='ctx'> </div><div class='hunk'>@@ -131,8 +142,7 @@ module_param(downdelay, int, 0);</div><div class='ctx'> MODULE_PARM_DESC(downdelay, "Delay before considering link down, "</div><div class='ctx'> 			    "in milliseconds");</div><div class='ctx'> module_param(use_carrier, int, 0);</div><div class='del'>-MODULE_PARM_DESC(use_carrier, "Use netif_carrier_ok (vs MII ioctls) in miimon; "</div><div class='del'>-			      "0 for off, 1 for on (default)");</div><div class='add'>+MODULE_PARM_DESC(use_carrier, "option obsolete, use_carrier cannot be disabled");</div><div class='ctx'> module_param(mode, charp, 0);</div><div class='ctx'> MODULE_PARM_DESC(mode, "Mode of operation; 0 for balance-rr, "</div><div class='ctx'> 		       "1 for active-backup, 2 for balance-xor, "</div><div class='hunk'>@@ -152,17 +162,17 @@ module_param(lacp_rate, charp, 0);</div><div class='ctx'> MODULE_PARM_DESC(lacp_rate, "LACPDU tx rate to request from 802.3ad partner; "</div><div class='ctx'> 			    "0 for slow, 1 for fast");</div><div class='ctx'> module_param(ad_select, charp, 0);</div><div class='del'>-MODULE_PARM_DESC(ad_select, "803.ad aggregation selection logic; "</div><div class='add'>+MODULE_PARM_DESC(ad_select, "802.3ad aggregation selection logic; "</div><div class='ctx'> 			    "0 for stable (default), 1 for bandwidth, "</div><div class='ctx'> 			    "2 for count");</div><div class='ctx'> module_param(min_links, int, 0);</div><div class='ctx'> MODULE_PARM_DESC(min_links, "Minimum number of available links before turning on carrier");</div><div class='ctx'> </div><div class='ctx'> module_param(xmit_hash_policy, charp, 0);</div><div class='del'>-MODULE_PARM_DESC(xmit_hash_policy, "balance-xor and 802.3ad hashing method; "</div><div class='add'>+MODULE_PARM_DESC(xmit_hash_policy, "balance-alb, balance-tlb, balance-xor, 802.3ad hashing method; "</div><div class='ctx'> 				   "0 for layer 2 (default), 1 for layer 3+4, "</div><div class='ctx'> 				   "2 for layer 2+3, 3 for encap layer 2+3, "</div><div class='del'>-				   "4 for encap layer 3+4");</div><div class='add'>+				   "4 for encap layer 3+4, 5 for vlan+srcmac");</div><div class='ctx'> module_param(arp_interval, int, 0);</div><div class='ctx'> MODULE_PARM_DESC(arp_interval, "arp interval in milliseconds");</div><div class='ctx'> module_param_array(arp_ip_target, charp, NULL, 0);</div><div class='hunk'>@@ -199,21 +209,65 @@ MODULE_PARM_DESC(lp_interval, "The number of seconds between instances where "</div><div class='ctx'> atomic_t netpoll_block_tx = ATOMIC_INIT(0);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-int bond_net_id __read_mostly;</div><div class='add'>+unsigned int bond_net_id __read_mostly;</div><div class='add'>+</div><div class='add'>+DEFINE_STATIC_KEY_FALSE(bond_bcast_neigh_enabled);</div><div class='add'>+</div><div class='add'>+static const struct flow_dissector_key flow_keys_bonding_keys[] = {</div><div class='add'>+	{</div><div class='add'>+		.key_id = FLOW_DISSECTOR_KEY_CONTROL,</div><div class='add'>+		.offset = offsetof(struct flow_keys, control),</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.key_id = FLOW_DISSECTOR_KEY_BASIC,</div><div class='add'>+		.offset = offsetof(struct flow_keys, basic),</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.key_id = FLOW_DISSECTOR_KEY_IPV4_ADDRS,</div><div class='add'>+		.offset = offsetof(struct flow_keys, addrs.v4addrs),</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.key_id = FLOW_DISSECTOR_KEY_IPV6_ADDRS,</div><div class='add'>+		.offset = offsetof(struct flow_keys, addrs.v6addrs),</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.key_id = FLOW_DISSECTOR_KEY_TIPC,</div><div class='add'>+		.offset = offsetof(struct flow_keys, addrs.tipckey),</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.key_id = FLOW_DISSECTOR_KEY_PORTS,</div><div class='add'>+		.offset = offsetof(struct flow_keys, ports),</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.key_id = FLOW_DISSECTOR_KEY_ICMP,</div><div class='add'>+		.offset = offsetof(struct flow_keys, icmp),</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.key_id = FLOW_DISSECTOR_KEY_VLAN,</div><div class='add'>+		.offset = offsetof(struct flow_keys, vlan),</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.key_id = FLOW_DISSECTOR_KEY_FLOW_LABEL,</div><div class='add'>+		.offset = offsetof(struct flow_keys, tags),</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.key_id = FLOW_DISSECTOR_KEY_GRE_KEYID,</div><div class='add'>+		.offset = offsetof(struct flow_keys, keyid),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-static __be32 arp_target[BOND_MAX_ARP_TARGETS];</div><div class='del'>-static int arp_ip_count;</div><div class='del'>-static int bond_mode	= BOND_MODE_ROUNDROBIN;</div><div class='del'>-static int xmit_hashtype = BOND_XMIT_POLICY_LAYER2;</div><div class='del'>-static int lacp_fast;</div><div class='add'>+static struct flow_dissector flow_keys_bonding __read_mostly;</div><div class='ctx'> </div><div class='ctx'> /*-------------------------- Forward declarations ---------------------------*/</div><div class='ctx'> </div><div class='ctx'> static int bond_init(struct net_device *bond_dev);</div><div class='ctx'> static void bond_uninit(struct net_device *bond_dev);</div><div class='del'>-static struct rtnl_link_stats64 *bond_get_stats(struct net_device *bond_dev,</div><div class='del'>-						struct rtnl_link_stats64 *stats);</div><div class='add'>+static void bond_get_stats(struct net_device *bond_dev,</div><div class='add'>+			   struct rtnl_link_stats64 *stats);</div><div class='ctx'> static void bond_slave_arr_handler(struct work_struct *work);</div><div class='add'>+static bool bond_time_in_interval(struct bonding *bond, unsigned long last_act,</div><div class='add'>+				  int mod);</div><div class='add'>+static void bond_netdev_notify_work(struct work_struct *work);</div><div class='ctx'> </div><div class='ctx'> /*---------------------------- General routines -----------------------------*/</div><div class='ctx'> </div><div class='hunk'>@@ -235,8 +289,6 @@ const char *bond_mode_name(int mode)</div><div class='ctx'> 	return names[mode];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*---------------------------------- VLAN -----------------------------------*/</div><div class='del'>-</div><div class='ctx'> /**</div><div class='ctx'>  * bond_dev_queue_xmit - Prepare skb for xmit.</div><div class='ctx'>  *</div><div class='hunk'>@@ -244,21 +296,55 @@ const char *bond_mode_name(int mode)</div><div class='ctx'>  * @skb: hw accel VLAN tagged skb to transmit</div><div class='ctx'>  * @slave_dev: slave that is supposed to xmit this skbuff</div><div class='ctx'>  */</div><div class='del'>-void bond_dev_queue_xmit(struct bonding *bond, struct sk_buff *skb,</div><div class='add'>+netdev_tx_t bond_dev_queue_xmit(struct bonding *bond, struct sk_buff *skb,</div><div class='ctx'> 			struct net_device *slave_dev)</div><div class='ctx'> {</div><div class='ctx'> 	skb-&gt;dev = slave_dev;</div><div class='ctx'> </div><div class='ctx'> 	BUILD_BUG_ON(sizeof(skb-&gt;queue_mapping) !=</div><div class='ctx'> 		     sizeof(qdisc_skb_cb(skb)-&gt;slave_dev_queue_mapping));</div><div class='del'>-	skb-&gt;queue_mapping = qdisc_skb_cb(skb)-&gt;slave_dev_queue_mapping;</div><div class='add'>+	skb_set_queue_mapping(skb, qdisc_skb_cb(skb)-&gt;slave_dev_queue_mapping);</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(netpoll_tx_running(bond-&gt;dev)))</div><div class='del'>-		bond_netpoll_send_skb(bond_get_slave_by_dev(bond, slave_dev), skb);</div><div class='del'>-	else</div><div class='del'>-		dev_queue_xmit(skb);</div><div class='add'>+		return bond_netpoll_send_skb(bond_get_slave_by_dev(bond, slave_dev), skb);</div><div class='add'>+</div><div class='add'>+	return dev_queue_xmit(skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool bond_sk_check(struct bonding *bond)</div><div class='add'>+{</div><div class='add'>+	switch (BOND_MODE(bond)) {</div><div class='add'>+	case BOND_MODE_8023AD:</div><div class='add'>+	case BOND_MODE_XOR:</div><div class='add'>+		if (bond-&gt;params.xmit_policy == BOND_XMIT_POLICY_LAYER34)</div><div class='add'>+			return true;</div><div class='add'>+		fallthrough;</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool bond_xdp_check(struct bonding *bond, int mode)</div><div class='add'>+{</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case BOND_MODE_ROUNDROBIN:</div><div class='add'>+	case BOND_MODE_ACTIVEBACKUP:</div><div class='add'>+		return true;</div><div class='add'>+	case BOND_MODE_8023AD:</div><div class='add'>+	case BOND_MODE_XOR:</div><div class='add'>+		/* vlan+srcmac is not supported with XDP as in most cases the 802.1q</div><div class='add'>+		 * payload is not in the packet due to hardware offload.</div><div class='add'>+		 */</div><div class='add'>+		if (bond-&gt;params.xmit_policy != BOND_XMIT_POLICY_VLAN_SRCMAC)</div><div class='add'>+			return true;</div><div class='add'>+		fallthrough;</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*---------------------------------- VLAN -----------------------------------*/</div><div class='add'>+</div><div class='ctx'> /* In the following 2 functions, bond_vlan_rx_add_vid and bond_vlan_rx_kill_vid,</div><div class='ctx'>  * We don't protect the slave list iteration with a lock because:</div><div class='ctx'>  * a. This operation is performed in IOCTL context,</div><div class='hunk'>@@ -278,6 +364,7 @@ void bond_dev_queue_xmit(struct bonding *bond, struct sk_buff *skb,</div><div class='ctx'> /**</div><div class='ctx'>  * bond_vlan_rx_add_vid - Propagates adding an id to slaves</div><div class='ctx'>  * @bond_dev: bonding net device that got called</div><div class='add'>+ * @proto: network protocol ID</div><div class='ctx'>  * @vid: vlan id being added</div><div class='ctx'>  */</div><div class='ctx'> static int bond_vlan_rx_add_vid(struct net_device *bond_dev,</div><div class='hunk'>@@ -311,6 +398,7 @@ unwind:</div><div class='ctx'> /**</div><div class='ctx'>  * bond_vlan_rx_kill_vid - Propagates deleting an id to slaves</div><div class='ctx'>  * @bond_dev: bonding net device that got called</div><div class='add'>+ * @proto: network protocol ID</div><div class='ctx'>  * @vid: vlan id being removed</div><div class='ctx'>  */</div><div class='ctx'> static int bond_vlan_rx_kill_vid(struct net_device *bond_dev,</div><div class='hunk'>@@ -329,6 +417,331 @@ static int bond_vlan_rx_kill_vid(struct net_device *bond_dev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/*---------------------------------- XFRM -----------------------------------*/</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_XFRM_OFFLOAD</div><div class='add'>+/**</div><div class='add'>+ * bond_ipsec_dev - Get active device for IPsec offload</div><div class='add'>+ * @xs: pointer to transformer state struct</div><div class='add'>+ *</div><div class='add'>+ * Context: caller must hold rcu_read_lock.</div><div class='add'>+ *</div><div class='add'>+ * Return: the device for ipsec offload, or NULL if not exist.</div><div class='add'>+ **/</div><div class='add'>+static struct net_device *bond_ipsec_dev(struct xfrm_state *xs)</div><div class='add'>+{</div><div class='add'>+	struct net_device *bond_dev = xs-&gt;xso.dev;</div><div class='add'>+	struct bonding *bond;</div><div class='add'>+	struct slave *slave;</div><div class='add'>+</div><div class='add'>+	bond = netdev_priv(bond_dev);</div><div class='add'>+	if (BOND_MODE(bond) != BOND_MODE_ACTIVEBACKUP)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	slave = rcu_dereference(bond-&gt;curr_active_slave);</div><div class='add'>+	if (!slave)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (!xs-&gt;xso.real_dev)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (xs-&gt;xso.real_dev != slave-&gt;dev)</div><div class='add'>+		pr_warn_ratelimited("%s: (slave %s): not same with IPsec offload real dev %s\n",</div><div class='add'>+				    bond_dev-&gt;name, slave-&gt;dev-&gt;name, xs-&gt;xso.real_dev-&gt;name);</div><div class='add'>+</div><div class='add'>+	return slave-&gt;dev;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * bond_ipsec_add_sa - program device with a security association</div><div class='add'>+ * @bond_dev: pointer to the bond net device</div><div class='add'>+ * @xs: pointer to transformer state struct</div><div class='add'>+ * @extack: extack point to fill failure reason</div><div class='add'>+ **/</div><div class='add'>+static int bond_ipsec_add_sa(struct net_device *bond_dev,</div><div class='add'>+			     struct xfrm_state *xs,</div><div class='add'>+			     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct net_device *real_dev;</div><div class='add'>+	netdevice_tracker tracker;</div><div class='add'>+	struct bond_ipsec *ipsec;</div><div class='add'>+	struct bonding *bond;</div><div class='add'>+	struct slave *slave;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!bond_dev)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	bond = netdev_priv(bond_dev);</div><div class='add'>+	slave = rcu_dereference(bond-&gt;curr_active_slave);</div><div class='add'>+	real_dev = slave ? slave-&gt;dev : NULL;</div><div class='add'>+	netdev_hold(real_dev, &amp;tracker, GFP_ATOMIC);</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+	if (!real_dev) {</div><div class='add'>+		err = -ENODEV;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!real_dev-&gt;xfrmdev_ops ||</div><div class='add'>+	    !real_dev-&gt;xfrmdev_ops-&gt;xdo_dev_state_add ||</div><div class='add'>+	    netif_is_bond_master(real_dev)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Slave does not support ipsec offload");</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ipsec = kmalloc(sizeof(*ipsec), GFP_KERNEL);</div><div class='add'>+	if (!ipsec) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = real_dev-&gt;xfrmdev_ops-&gt;xdo_dev_state_add(real_dev, xs, extack);</div><div class='add'>+	if (!err) {</div><div class='add'>+		xs-&gt;xso.real_dev = real_dev;</div><div class='add'>+		ipsec-&gt;xs = xs;</div><div class='add'>+		INIT_LIST_HEAD(&amp;ipsec-&gt;list);</div><div class='add'>+		mutex_lock(&amp;bond-&gt;ipsec_lock);</div><div class='add'>+		list_add(&amp;ipsec-&gt;list, &amp;bond-&gt;ipsec_list);</div><div class='add'>+		mutex_unlock(&amp;bond-&gt;ipsec_lock);</div><div class='add'>+	} else {</div><div class='add'>+		kfree(ipsec);</div><div class='add'>+	}</div><div class='add'>+out:</div><div class='add'>+	netdev_put(real_dev, &amp;tracker);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bond_ipsec_add_sa_all(struct bonding *bond)</div><div class='add'>+{</div><div class='add'>+	struct net_device *bond_dev = bond-&gt;dev;</div><div class='add'>+	struct net_device *real_dev;</div><div class='add'>+	struct bond_ipsec *ipsec;</div><div class='add'>+	struct slave *slave;</div><div class='add'>+</div><div class='add'>+	slave = rtnl_dereference(bond-&gt;curr_active_slave);</div><div class='add'>+	real_dev = slave ? slave-&gt;dev : NULL;</div><div class='add'>+	if (!real_dev)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;bond-&gt;ipsec_lock);</div><div class='add'>+	if (!real_dev-&gt;xfrmdev_ops ||</div><div class='add'>+	    !real_dev-&gt;xfrmdev_ops-&gt;xdo_dev_state_add ||</div><div class='add'>+	    netif_is_bond_master(real_dev)) {</div><div class='add'>+		if (!list_empty(&amp;bond-&gt;ipsec_list))</div><div class='add'>+			slave_warn(bond_dev, real_dev,</div><div class='add'>+				   "%s: no slave xdo_dev_state_add\n",</div><div class='add'>+				   __func__);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(ipsec, &amp;bond-&gt;ipsec_list, list) {</div><div class='add'>+		/* If new state is added before ipsec_lock acquired */</div><div class='add'>+		if (ipsec-&gt;xs-&gt;xso.real_dev == real_dev)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (real_dev-&gt;xfrmdev_ops-&gt;xdo_dev_state_add(real_dev,</div><div class='add'>+							     ipsec-&gt;xs, NULL)) {</div><div class='add'>+			slave_warn(bond_dev, real_dev, "%s: failed to add SA\n", __func__);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		spin_lock_bh(&amp;ipsec-&gt;xs-&gt;lock);</div><div class='add'>+		/* xs might have been killed by the user during the migration</div><div class='add'>+		 * to the new dev, but bond_ipsec_del_sa() should have done</div><div class='add'>+		 * nothing, as xso.real_dev is NULL.</div><div class='add'>+		 * Delete it from the device we just added it to. The pending</div><div class='add'>+		 * bond_ipsec_free_sa() call will do the rest of the cleanup.</div><div class='add'>+		 */</div><div class='add'>+		if (ipsec-&gt;xs-&gt;km.state == XFRM_STATE_DEAD &amp;&amp;</div><div class='add'>+		    real_dev-&gt;xfrmdev_ops-&gt;xdo_dev_state_delete)</div><div class='add'>+			real_dev-&gt;xfrmdev_ops-&gt;xdo_dev_state_delete(real_dev,</div><div class='add'>+								    ipsec-&gt;xs);</div><div class='add'>+		ipsec-&gt;xs-&gt;xso.real_dev = real_dev;</div><div class='add'>+		spin_unlock_bh(&amp;ipsec-&gt;xs-&gt;lock);</div><div class='add'>+	}</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;bond-&gt;ipsec_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * bond_ipsec_del_sa - clear out this specific SA</div><div class='add'>+ * @bond_dev: pointer to the bond net device</div><div class='add'>+ * @xs: pointer to transformer state struct</div><div class='add'>+ **/</div><div class='add'>+static void bond_ipsec_del_sa(struct net_device *bond_dev,</div><div class='add'>+			      struct xfrm_state *xs)</div><div class='add'>+{</div><div class='add'>+	struct net_device *real_dev;</div><div class='add'>+</div><div class='add'>+	if (!bond_dev || !xs-&gt;xso.real_dev)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	real_dev = xs-&gt;xso.real_dev;</div><div class='add'>+</div><div class='add'>+	if (!real_dev-&gt;xfrmdev_ops ||</div><div class='add'>+	    !real_dev-&gt;xfrmdev_ops-&gt;xdo_dev_state_delete ||</div><div class='add'>+	    netif_is_bond_master(real_dev)) {</div><div class='add'>+		slave_warn(bond_dev, real_dev, "%s: no slave xdo_dev_state_delete\n", __func__);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	real_dev-&gt;xfrmdev_ops-&gt;xdo_dev_state_delete(real_dev, xs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bond_ipsec_del_sa_all(struct bonding *bond)</div><div class='add'>+{</div><div class='add'>+	struct net_device *bond_dev = bond-&gt;dev;</div><div class='add'>+	struct net_device *real_dev;</div><div class='add'>+	struct bond_ipsec *ipsec;</div><div class='add'>+	struct slave *slave;</div><div class='add'>+</div><div class='add'>+	slave = rtnl_dereference(bond-&gt;curr_active_slave);</div><div class='add'>+	real_dev = slave ? slave-&gt;dev : NULL;</div><div class='add'>+	if (!real_dev)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;bond-&gt;ipsec_lock);</div><div class='add'>+	list_for_each_entry(ipsec, &amp;bond-&gt;ipsec_list, list) {</div><div class='add'>+		if (!ipsec-&gt;xs-&gt;xso.real_dev)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (!real_dev-&gt;xfrmdev_ops ||</div><div class='add'>+		    !real_dev-&gt;xfrmdev_ops-&gt;xdo_dev_state_delete ||</div><div class='add'>+		    netif_is_bond_master(real_dev)) {</div><div class='add'>+			slave_warn(bond_dev, real_dev,</div><div class='add'>+				   "%s: no slave xdo_dev_state_delete\n",</div><div class='add'>+				   __func__);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		spin_lock_bh(&amp;ipsec-&gt;xs-&gt;lock);</div><div class='add'>+		ipsec-&gt;xs-&gt;xso.real_dev = NULL;</div><div class='add'>+		/* Don't double delete states killed by the user. */</div><div class='add'>+		if (ipsec-&gt;xs-&gt;km.state != XFRM_STATE_DEAD)</div><div class='add'>+			real_dev-&gt;xfrmdev_ops-&gt;xdo_dev_state_delete(real_dev,</div><div class='add'>+								    ipsec-&gt;xs);</div><div class='add'>+		spin_unlock_bh(&amp;ipsec-&gt;xs-&gt;lock);</div><div class='add'>+</div><div class='add'>+		if (real_dev-&gt;xfrmdev_ops-&gt;xdo_dev_state_free)</div><div class='add'>+			real_dev-&gt;xfrmdev_ops-&gt;xdo_dev_state_free(real_dev,</div><div class='add'>+								  ipsec-&gt;xs);</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;bond-&gt;ipsec_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bond_ipsec_free_sa(struct net_device *bond_dev,</div><div class='add'>+			       struct xfrm_state *xs)</div><div class='add'>+{</div><div class='add'>+	struct net_device *real_dev;</div><div class='add'>+	struct bond_ipsec *ipsec;</div><div class='add'>+	struct bonding *bond;</div><div class='add'>+</div><div class='add'>+	if (!bond_dev)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	bond = netdev_priv(bond_dev);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;bond-&gt;ipsec_lock);</div><div class='add'>+	if (!xs-&gt;xso.real_dev)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	real_dev = xs-&gt;xso.real_dev;</div><div class='add'>+</div><div class='add'>+	xs-&gt;xso.real_dev = NULL;</div><div class='add'>+	if (real_dev-&gt;xfrmdev_ops &amp;&amp;</div><div class='add'>+	    real_dev-&gt;xfrmdev_ops-&gt;xdo_dev_state_free)</div><div class='add'>+		real_dev-&gt;xfrmdev_ops-&gt;xdo_dev_state_free(real_dev, xs);</div><div class='add'>+out:</div><div class='add'>+	list_for_each_entry(ipsec, &amp;bond-&gt;ipsec_list, list) {</div><div class='add'>+		if (ipsec-&gt;xs == xs) {</div><div class='add'>+			list_del(&amp;ipsec-&gt;list);</div><div class='add'>+			kfree(ipsec);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;bond-&gt;ipsec_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * bond_ipsec_offload_ok - can this packet use the xfrm hw offload</div><div class='add'>+ * @skb: current data packet</div><div class='add'>+ * @xs: pointer to transformer state struct</div><div class='add'>+ **/</div><div class='add'>+static bool bond_ipsec_offload_ok(struct sk_buff *skb, struct xfrm_state *xs)</div><div class='add'>+{</div><div class='add'>+	struct net_device *real_dev;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	real_dev = bond_ipsec_dev(xs);</div><div class='add'>+	if (!real_dev || netif_is_bond_master(real_dev)) {</div><div class='add'>+		rcu_read_unlock();</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * bond_advance_esn_state - ESN support for IPSec HW offload</div><div class='add'>+ * @xs: pointer to transformer state struct</div><div class='add'>+ **/</div><div class='add'>+static void bond_advance_esn_state(struct xfrm_state *xs)</div><div class='add'>+{</div><div class='add'>+	struct net_device *real_dev;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	real_dev = bond_ipsec_dev(xs);</div><div class='add'>+	if (!real_dev)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (!real_dev-&gt;xfrmdev_ops ||</div><div class='add'>+	    !real_dev-&gt;xfrmdev_ops-&gt;xdo_dev_state_advance_esn) {</div><div class='add'>+		pr_warn_ratelimited("%s: %s doesn't support xdo_dev_state_advance_esn\n", __func__, real_dev-&gt;name);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	real_dev-&gt;xfrmdev_ops-&gt;xdo_dev_state_advance_esn(xs);</div><div class='add'>+out:</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * bond_xfrm_update_stats - Update xfrm state</div><div class='add'>+ * @xs: pointer to transformer state struct</div><div class='add'>+ **/</div><div class='add'>+static void bond_xfrm_update_stats(struct xfrm_state *xs)</div><div class='add'>+{</div><div class='add'>+	struct net_device *real_dev;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	real_dev = bond_ipsec_dev(xs);</div><div class='add'>+	if (!real_dev)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (!real_dev-&gt;xfrmdev_ops ||</div><div class='add'>+	    !real_dev-&gt;xfrmdev_ops-&gt;xdo_dev_state_update_stats) {</div><div class='add'>+		pr_warn_ratelimited("%s: %s doesn't support xdo_dev_state_update_stats\n", __func__, real_dev-&gt;name);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	real_dev-&gt;xfrmdev_ops-&gt;xdo_dev_state_update_stats(xs);</div><div class='add'>+out:</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct xfrmdev_ops bond_xfrmdev_ops = {</div><div class='add'>+	.xdo_dev_state_add = bond_ipsec_add_sa,</div><div class='add'>+	.xdo_dev_state_delete = bond_ipsec_del_sa,</div><div class='add'>+	.xdo_dev_state_free = bond_ipsec_free_sa,</div><div class='add'>+	.xdo_dev_offload_ok = bond_ipsec_offload_ok,</div><div class='add'>+	.xdo_dev_state_advance_esn = bond_advance_esn_state,</div><div class='add'>+	.xdo_dev_state_update_stats = bond_xfrm_update_stats,</div><div class='add'>+};</div><div class='add'>+#endif /* CONFIG_XFRM_OFFLOAD */</div><div class='add'>+</div><div class='ctx'> /*------------------------------- Link status -------------------------------*/</div><div class='ctx'> </div><div class='ctx'> /* Set the carrier state for the master according to the state of its</div><div class='hunk'>@@ -369,38 +782,35 @@ down:</div><div class='ctx'> /* Get link speed and duplex from the slave's base driver</div><div class='ctx'>  * using ethtool. If for some reason the call fails or the</div><div class='ctx'>  * values are invalid, set speed and duplex to -1,</div><div class='del'>- * and return.</div><div class='add'>+ * and return. Return 1 if speed or duplex settings are</div><div class='add'>+ * UNKNOWN; 0 otherwise.</div><div class='ctx'>  */</div><div class='del'>-static void bond_update_speed_duplex(struct slave *slave)</div><div class='add'>+static int bond_update_speed_duplex(struct slave *slave)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *slave_dev = slave-&gt;dev;</div><div class='del'>-	struct ethtool_cmd ecmd;</div><div class='del'>-	u32 slave_speed;</div><div class='add'>+	struct ethtool_link_ksettings ecmd;</div><div class='ctx'> 	int res;</div><div class='ctx'> </div><div class='ctx'> 	slave-&gt;speed = SPEED_UNKNOWN;</div><div class='ctx'> 	slave-&gt;duplex = DUPLEX_UNKNOWN;</div><div class='ctx'> </div><div class='del'>-	res = __ethtool_get_settings(slave_dev, &amp;ecmd);</div><div class='add'>+	res = __ethtool_get_link_ksettings(slave_dev, &amp;ecmd);</div><div class='ctx'> 	if (res &lt; 0)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	slave_speed = ethtool_cmd_speed(&amp;ecmd);</div><div class='del'>-	if (slave_speed == 0 || slave_speed == ((__u32) -1))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	switch (ecmd.duplex) {</div><div class='add'>+		return 1;</div><div class='add'>+	if (ecmd.base.speed == 0 || ecmd.base.speed == ((__u32)-1))</div><div class='add'>+		return 1;</div><div class='add'>+	switch (ecmd.base.duplex) {</div><div class='ctx'> 	case DUPLEX_FULL:</div><div class='ctx'> 	case DUPLEX_HALF:</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		return;</div><div class='add'>+		return 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	slave-&gt;speed = slave_speed;</div><div class='del'>-	slave-&gt;duplex = ecmd.duplex;</div><div class='add'>+	slave-&gt;speed = ecmd.base.speed;</div><div class='add'>+	slave-&gt;duplex = ecmd.base.duplex;</div><div class='ctx'> </div><div class='del'>-	return;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> const char *bond_slave_link_status(s8 link)</div><div class='hunk'>@@ -419,73 +829,6 @@ const char *bond_slave_link_status(s8 link)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* if &lt;dev&gt; supports MII link status reporting, check its link status.</div><div class='del'>- *</div><div class='del'>- * We either do MII/ETHTOOL ioctls, or check netif_carrier_ok(),</div><div class='del'>- * depending upon the setting of the use_carrier parameter.</div><div class='del'>- *</div><div class='del'>- * Return either BMSR_LSTATUS, meaning that the link is up (or we</div><div class='del'>- * can't tell and just pretend it is), or 0, meaning that the link is</div><div class='del'>- * down.</div><div class='del'>- *</div><div class='del'>- * If reporting is non-zero, instead of faking link up, return -1 if</div><div class='del'>- * both ETHTOOL and MII ioctls fail (meaning the device does not</div><div class='del'>- * support them).  If use_carrier is set, return whatever it says.</div><div class='del'>- * It'd be nice if there was a good way to tell if a driver supports</div><div class='del'>- * netif_carrier, but there really isn't.</div><div class='del'>- */</div><div class='del'>-static int bond_check_dev_link(struct bonding *bond,</div><div class='del'>-			       struct net_device *slave_dev, int reporting)</div><div class='del'>-{</div><div class='del'>-	const struct net_device_ops *slave_ops = slave_dev-&gt;netdev_ops;</div><div class='del'>-	int (*ioctl)(struct net_device *, struct ifreq *, int);</div><div class='del'>-	struct ifreq ifr;</div><div class='del'>-	struct mii_ioctl_data *mii;</div><div class='del'>-</div><div class='del'>-	if (!reporting &amp;&amp; !netif_running(slave_dev))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	if (bond-&gt;params.use_carrier)</div><div class='del'>-		return netif_carrier_ok(slave_dev) ? BMSR_LSTATUS : 0;</div><div class='del'>-</div><div class='del'>-	/* Try to get link status using Ethtool first. */</div><div class='del'>-	if (slave_dev-&gt;ethtool_ops-&gt;get_link)</div><div class='del'>-		return slave_dev-&gt;ethtool_ops-&gt;get_link(slave_dev) ?</div><div class='del'>-			BMSR_LSTATUS : 0;</div><div class='del'>-</div><div class='del'>-	/* Ethtool can't be used, fallback to MII ioctls. */</div><div class='del'>-	ioctl = slave_ops-&gt;ndo_do_ioctl;</div><div class='del'>-	if (ioctl) {</div><div class='del'>-		/* TODO: set pointer to correct ioctl on a per team member</div><div class='del'>-		 *       bases to make this more efficient. that is, once</div><div class='del'>-		 *       we determine the correct ioctl, we will always</div><div class='del'>-		 *       call it and not the others for that team</div><div class='del'>-		 *       member.</div><div class='del'>-		 */</div><div class='del'>-</div><div class='del'>-		/* We cannot assume that SIOCGMIIPHY will also read a</div><div class='del'>-		 * register; not all network drivers (e.g., e100)</div><div class='del'>-		 * support that.</div><div class='del'>-		 */</div><div class='del'>-</div><div class='del'>-		/* Yes, the mii is overlaid on the ifreq.ifr_ifru */</div><div class='del'>-		strncpy(ifr.ifr_name, slave_dev-&gt;name, IFNAMSIZ);</div><div class='del'>-		mii = if_mii(&amp;ifr);</div><div class='del'>-		if (IOCTL(slave_dev, &amp;ifr, SIOCGMIIPHY) == 0) {</div><div class='del'>-			mii-&gt;reg_num = MII_BMSR;</div><div class='del'>-			if (IOCTL(slave_dev, &amp;ifr, SIOCGMIIREG) == 0)</div><div class='del'>-				return mii-&gt;val_out &amp; BMSR_LSTATUS;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* If reporting, report that either there's no dev-&gt;do_ioctl,</div><div class='del'>-	 * or both SIOCGMIIREG and get_link failed (meaning that we</div><div class='del'>-	 * cannot report link status).  If not reporting, pretend</div><div class='del'>-	 * we're ok.</div><div class='del'>-	 */</div><div class='del'>-	return reporting ? -1 : BMSR_LSTATUS;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*----------------------------- Multicast list ------------------------------*/</div><div class='ctx'> </div><div class='ctx'> /* Push the promiscuity flag down to appropriate slaves */</div><div class='hunk'>@@ -565,12 +908,8 @@ static void bond_hw_addr_flush(struct net_device *bond_dev,</div><div class='ctx'> 	dev_uc_unsync(slave_dev, bond_dev);</div><div class='ctx'> 	dev_mc_unsync(slave_dev, bond_dev);</div><div class='ctx'> </div><div class='del'>-	if (BOND_MODE(bond) == BOND_MODE_8023AD) {</div><div class='del'>-		/* del lacpdu mc addr from mc list */</div><div class='del'>-		u8 lacpdu_multicast[ETH_ALEN] = MULTICAST_LACPDU_ADDR;</div><div class='del'>-</div><div class='del'>-		dev_mc_del(slave_dev, lacpdu_multicast);</div><div class='del'>-	}</div><div class='add'>+	if (BOND_MODE(bond) == BOND_MODE_8023AD)</div><div class='add'>+		dev_mc_del(slave_dev, lacpdu_mcast_addr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*--------------------------- Active slave change ---------------------------*/</div><div class='hunk'>@@ -590,7 +929,10 @@ static void bond_hw_addr_swap(struct bonding *bond, struct slave *new_active,</div><div class='ctx'> 		if (bond-&gt;dev-&gt;flags &amp; IFF_ALLMULTI)</div><div class='ctx'> 			dev_set_allmulti(old_active-&gt;dev, -1);</div><div class='ctx'> </div><div class='del'>-		bond_hw_addr_flush(bond-&gt;dev, old_active-&gt;dev);</div><div class='add'>+		if (bond-&gt;dev-&gt;flags &amp; IFF_UP)</div><div class='add'>+			bond_hw_addr_flush(bond-&gt;dev, old_active-&gt;dev);</div><div class='add'>+</div><div class='add'>+		bond_slave_ns_maddrs_add(bond, old_active);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (new_active) {</div><div class='hunk'>@@ -601,10 +943,14 @@ static void bond_hw_addr_swap(struct bonding *bond, struct slave *new_active,</div><div class='ctx'> 		if (bond-&gt;dev-&gt;flags &amp; IFF_ALLMULTI)</div><div class='ctx'> 			dev_set_allmulti(new_active-&gt;dev, 1);</div><div class='ctx'> </div><div class='del'>-		netif_addr_lock_bh(bond-&gt;dev);</div><div class='del'>-		dev_uc_sync(new_active-&gt;dev, bond-&gt;dev);</div><div class='del'>-		dev_mc_sync(new_active-&gt;dev, bond-&gt;dev);</div><div class='del'>-		netif_addr_unlock_bh(bond-&gt;dev);</div><div class='add'>+		if (bond-&gt;dev-&gt;flags &amp; IFF_UP) {</div><div class='add'>+			netif_addr_lock_bh(bond-&gt;dev);</div><div class='add'>+			dev_uc_sync(new_active-&gt;dev, bond-&gt;dev);</div><div class='add'>+			dev_mc_sync(new_active-&gt;dev, bond-&gt;dev);</div><div class='add'>+			netif_addr_unlock_bh(bond-&gt;dev);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		bond_slave_ns_maddrs_del(bond, new_active);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -615,14 +961,21 @@ static void bond_hw_addr_swap(struct bonding *bond, struct slave *new_active,</div><div class='ctx'>  *</div><div class='ctx'>  * Should be called with RTNL held.</div><div class='ctx'>  */</div><div class='del'>-static void bond_set_dev_addr(struct net_device *bond_dev,</div><div class='del'>-			      struct net_device *slave_dev)</div><div class='add'>+static int bond_set_dev_addr(struct net_device *bond_dev,</div><div class='add'>+			     struct net_device *slave_dev)</div><div class='ctx'> {</div><div class='del'>-	netdev_dbg(bond_dev, "bond_dev=%p slave_dev=%p slave_dev-&gt;addr_len=%d\n",</div><div class='del'>-		   bond_dev, slave_dev, slave_dev-&gt;addr_len);</div><div class='del'>-	memcpy(bond_dev-&gt;dev_addr, slave_dev-&gt;dev_addr, slave_dev-&gt;addr_len);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	slave_dbg(bond_dev, slave_dev, "bond_dev=%p slave_dev=%p slave_dev-&gt;addr_len=%d\n",</div><div class='add'>+		  bond_dev, slave_dev, slave_dev-&gt;addr_len);</div><div class='add'>+	err = netif_pre_changeaddr_notify(bond_dev, slave_dev-&gt;dev_addr, NULL);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	__dev_addr_set(bond_dev, slave_dev-&gt;dev_addr, slave_dev-&gt;addr_len);</div><div class='ctx'> 	bond_dev-&gt;addr_assign_type = NET_ADDR_STOLEN;</div><div class='ctx'> 	call_netdevice_notifiers(NETDEV_CHANGEADDR, bond_dev);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct slave *bond_get_old_active(struct bonding *bond,</div><div class='hunk'>@@ -652,14 +1005,18 @@ static void bond_do_fail_over_mac(struct bonding *bond,</div><div class='ctx'> 				  struct slave *new_active,</div><div class='ctx'> 				  struct slave *old_active)</div><div class='ctx'> {</div><div class='del'>-	u8 tmp_mac[ETH_ALEN];</div><div class='del'>-	struct sockaddr saddr;</div><div class='add'>+	u8 tmp_mac[MAX_ADDR_LEN];</div><div class='add'>+	struct sockaddr_storage ss;</div><div class='ctx'> 	int rv;</div><div class='ctx'> </div><div class='ctx'> 	switch (bond-&gt;params.fail_over_mac) {</div><div class='ctx'> 	case BOND_FOM_ACTIVE:</div><div class='del'>-		if (new_active)</div><div class='del'>-			bond_set_dev_addr(bond-&gt;dev, new_active-&gt;dev);</div><div class='add'>+		if (new_active) {</div><div class='add'>+			rv = bond_set_dev_addr(bond-&gt;dev, new_active-&gt;dev);</div><div class='add'>+			if (rv)</div><div class='add'>+				slave_err(bond-&gt;dev, new_active-&gt;dev, "Error %d setting bond MAC from slave\n",</div><div class='add'>+					  -rv);</div><div class='add'>+		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case BOND_FOM_FOLLOW:</div><div class='ctx'> 		/* if new_active &amp;&amp; old_active, swap them</div><div class='hunk'>@@ -673,32 +1030,36 @@ static void bond_do_fail_over_mac(struct bonding *bond,</div><div class='ctx'> 			old_active = bond_get_old_active(bond, new_active);</div><div class='ctx'> </div><div class='ctx'> 		if (old_active) {</div><div class='del'>-			ether_addr_copy(tmp_mac, new_active-&gt;dev-&gt;dev_addr);</div><div class='del'>-			ether_addr_copy(saddr.sa_data,</div><div class='del'>-					old_active-&gt;dev-&gt;dev_addr);</div><div class='del'>-			saddr.sa_family = new_active-&gt;dev-&gt;type;</div><div class='add'>+			bond_hw_addr_copy(tmp_mac, new_active-&gt;dev-&gt;dev_addr,</div><div class='add'>+					  new_active-&gt;dev-&gt;addr_len);</div><div class='add'>+			bond_hw_addr_copy(ss.__data,</div><div class='add'>+					  old_active-&gt;dev-&gt;dev_addr,</div><div class='add'>+					  old_active-&gt;dev-&gt;addr_len);</div><div class='add'>+			ss.ss_family = new_active-&gt;dev-&gt;type;</div><div class='ctx'> 		} else {</div><div class='del'>-			ether_addr_copy(saddr.sa_data, bond-&gt;dev-&gt;dev_addr);</div><div class='del'>-			saddr.sa_family = bond-&gt;dev-&gt;type;</div><div class='add'>+			bond_hw_addr_copy(ss.__data, bond-&gt;dev-&gt;dev_addr,</div><div class='add'>+					  bond-&gt;dev-&gt;addr_len);</div><div class='add'>+			ss.ss_family = bond-&gt;dev-&gt;type;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		rv = dev_set_mac_address(new_active-&gt;dev, &amp;saddr);</div><div class='add'>+		rv = dev_set_mac_address(new_active-&gt;dev, &amp;ss, NULL);</div><div class='ctx'> 		if (rv) {</div><div class='del'>-			netdev_err(bond-&gt;dev, "Error %d setting MAC of slave %s\n",</div><div class='del'>-				   -rv, new_active-&gt;dev-&gt;name);</div><div class='add'>+			slave_err(bond-&gt;dev, new_active-&gt;dev, "Error %d setting MAC of new active slave\n",</div><div class='add'>+				  -rv);</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (!old_active)</div><div class='ctx'> 			goto out;</div><div class='ctx'> </div><div class='del'>-		ether_addr_copy(saddr.sa_data, tmp_mac);</div><div class='del'>-		saddr.sa_family = old_active-&gt;dev-&gt;type;</div><div class='add'>+		bond_hw_addr_copy(ss.__data, tmp_mac,</div><div class='add'>+				  new_active-&gt;dev-&gt;addr_len);</div><div class='add'>+		ss.ss_family = old_active-&gt;dev-&gt;type;</div><div class='ctx'> </div><div class='del'>-		rv = dev_set_mac_address(old_active-&gt;dev, &amp;saddr);</div><div class='add'>+		rv = dev_set_mac_address(old_active-&gt;dev, &amp;ss, NULL);</div><div class='ctx'> 		if (rv)</div><div class='del'>-			netdev_err(bond-&gt;dev, "Error %d setting MAC of slave %s\n",</div><div class='del'>-				   -rv, new_active-&gt;dev-&gt;name);</div><div class='add'>+			slave_err(bond-&gt;dev, old_active-&gt;dev, "Error %d setting MAC of old active slave\n",</div><div class='add'>+				  -rv);</div><div class='ctx'> out:</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -709,12 +1070,38 @@ out:</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/**</div><div class='add'>+ * bond_choose_primary_or_current - select the primary or high priority slave</div><div class='add'>+ * @bond: our bonding struct</div><div class='add'>+ *</div><div class='add'>+ * - Check if there is a primary link. If the primary link was set and is up,</div><div class='add'>+ *   go on and do link reselection.</div><div class='add'>+ *</div><div class='add'>+ * - If primary link is not set or down, find the highest priority link.</div><div class='add'>+ *   If the highest priority link is not current slave, set it as primary</div><div class='add'>+ *   link and do link reselection.</div><div class='add'>+ */</div><div class='ctx'> static struct slave *bond_choose_primary_or_current(struct bonding *bond)</div><div class='ctx'> {</div><div class='ctx'> 	struct slave *prim = rtnl_dereference(bond-&gt;primary_slave);</div><div class='ctx'> 	struct slave *curr = rtnl_dereference(bond-&gt;curr_active_slave);</div><div class='add'>+	struct slave *slave, *hprio = NULL;</div><div class='add'>+	struct list_head *iter;</div><div class='ctx'> </div><div class='ctx'> 	if (!prim || prim-&gt;link != BOND_LINK_UP) {</div><div class='add'>+		bond_for_each_slave(bond, slave, iter) {</div><div class='add'>+			if (slave-&gt;link == BOND_LINK_UP) {</div><div class='add'>+				hprio = hprio ?: slave;</div><div class='add'>+				if (slave-&gt;prio &gt; hprio-&gt;prio)</div><div class='add'>+					hprio = slave;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (hprio &amp;&amp; hprio != curr) {</div><div class='add'>+			prim = hprio;</div><div class='add'>+			goto link_reselect;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		if (!curr || curr-&gt;link != BOND_LINK_UP)</div><div class='ctx'> 			return NULL;</div><div class='ctx'> 		return curr;</div><div class='hunk'>@@ -725,6 +1112,7 @@ static struct slave *bond_choose_primary_or_current(struct bonding *bond)</div><div class='ctx'> 		return prim;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+link_reselect:</div><div class='ctx'> 	if (!curr || curr-&gt;link != BOND_LINK_UP)</div><div class='ctx'> 		return prim;</div><div class='ctx'> </div><div class='hunk'>@@ -774,29 +1162,43 @@ static struct slave *bond_find_best_slave(struct bonding *bond)</div><div class='ctx'> 	return bestslave;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* must be called in RCU critical section or with RTNL held */</div><div class='ctx'> static bool bond_should_notify_peers(struct bonding *bond)</div><div class='ctx'> {</div><div class='del'>-	struct slave *slave;</div><div class='add'>+	struct bond_up_slave *usable;</div><div class='add'>+	struct slave *slave = NULL;</div><div class='ctx'> </div><div class='del'>-	rcu_read_lock();</div><div class='del'>-	slave = rcu_dereference(bond-&gt;curr_active_slave);</div><div class='del'>-	rcu_read_unlock();</div><div class='add'>+	if (!bond-&gt;send_peer_notif ||</div><div class='add'>+	    bond-&gt;send_peer_notif %</div><div class='add'>+	    max(1, bond-&gt;params.peer_notif_delay) != 0 ||</div><div class='add'>+	    !netif_carrier_ok(bond-&gt;dev))</div><div class='add'>+		return false;</div><div class='ctx'> </div><div class='del'>-	netdev_dbg(bond-&gt;dev, "bond_should_notify_peers: slave %s\n",</div><div class='del'>-		   slave ? slave-&gt;dev-&gt;name : "NULL");</div><div class='add'>+	/* The send_peer_notif is set by active-backup or 8023ad</div><div class='add'>+	 * mode, and cleared in bond_close() when changing mode.</div><div class='add'>+	 * It is safe to only check bond mode here.</div><div class='add'>+	 */</div><div class='add'>+	if (BOND_MODE(bond) == BOND_MODE_8023AD) {</div><div class='add'>+		usable = rcu_dereference_rtnl(bond-&gt;usable_slaves);</div><div class='add'>+		if (!usable || !READ_ONCE(usable-&gt;count))</div><div class='add'>+			return false;</div><div class='add'>+	} else {</div><div class='add'>+		slave = rcu_dereference_rtnl(bond-&gt;curr_active_slave);</div><div class='add'>+		if (!slave || test_bit(__LINK_STATE_LINKWATCH_PENDING,</div><div class='add'>+				       &amp;slave-&gt;dev-&gt;state))</div><div class='add'>+			return false;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (!slave || !bond-&gt;send_peer_notif ||</div><div class='del'>-	    !netif_carrier_ok(bond-&gt;dev) ||</div><div class='del'>-	    test_bit(__LINK_STATE_LINKWATCH_PENDING, &amp;slave-&gt;dev-&gt;state))</div><div class='del'>-		return false;</div><div class='add'>+	netdev_dbg(bond-&gt;dev, "bond_should_notify_peers: slave %s\n",</div><div class='add'>+		   slave ? slave-&gt;dev-&gt;name : "all");</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * change_active_interface - change the active slave into the specified one</div><div class='add'>+ * bond_change_active_slave - change the active slave into the specified one</div><div class='ctx'>  * @bond: our bonding struct</div><div class='del'>- * @new: the new slave to make the active one</div><div class='add'>+ * @new_active: the new slave to make the active one</div><div class='ctx'>  *</div><div class='ctx'>  * Set the new slave to the bond's settings and unset them on the old</div><div class='ctx'>  * curr_active_slave.</div><div class='hunk'>@@ -819,18 +1221,22 @@ void bond_change_active_slave(struct bonding *bond, struct slave *new_active)</div><div class='ctx'> 	if (old_active == new_active)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_XFRM_OFFLOAD</div><div class='add'>+	bond_ipsec_del_sa_all(bond);</div><div class='add'>+#endif /* CONFIG_XFRM_OFFLOAD */</div><div class='add'>+</div><div class='ctx'> 	if (new_active) {</div><div class='ctx'> 		new_active-&gt;last_link_up = jiffies;</div><div class='ctx'> </div><div class='ctx'> 		if (new_active-&gt;link == BOND_LINK_BACK) {</div><div class='ctx'> 			if (bond_uses_primary(bond)) {</div><div class='del'>-				netdev_info(bond-&gt;dev, "making interface %s the new active one %d ms earlier\n",</div><div class='del'>-					    new_active-&gt;dev-&gt;name,</div><div class='del'>-					    (bond-&gt;params.updelay - new_active-&gt;delay) * bond-&gt;params.miimon);</div><div class='add'>+				slave_info(bond-&gt;dev, new_active-&gt;dev, "making interface the new active one %d ms earlier\n",</div><div class='add'>+					   (bond-&gt;params.updelay - new_active-&gt;delay) * bond-&gt;params.miimon);</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			new_active-&gt;delay = 0;</div><div class='del'>-			bond_set_slave_link_state(new_active, BOND_LINK_UP);</div><div class='add'>+			bond_set_slave_link_state(new_active, BOND_LINK_UP,</div><div class='add'>+						  BOND_SLAVE_NOTIFY_NOW);</div><div class='ctx'> </div><div class='ctx'> 			if (BOND_MODE(bond) == BOND_MODE_8023AD)</div><div class='ctx'> 				bond_3ad_handle_link_change(new_active, BOND_LINK_UP);</div><div class='hunk'>@@ -838,10 +1244,8 @@ void bond_change_active_slave(struct bonding *bond, struct slave *new_active)</div><div class='ctx'> 			if (bond_is_lb(bond))</div><div class='ctx'> 				bond_alb_handle_link_change(bond, new_active, BOND_LINK_UP);</div><div class='ctx'> 		} else {</div><div class='del'>-			if (bond_uses_primary(bond)) {</div><div class='del'>-				netdev_info(bond-&gt;dev, "making interface %s the new active one\n",</div><div class='del'>-					    new_active-&gt;dev-&gt;name);</div><div class='del'>-			}</div><div class='add'>+			if (bond_uses_primary(bond))</div><div class='add'>+				slave_info(bond-&gt;dev, new_active-&gt;dev, "making interface the new active one\n");</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -877,18 +1281,25 @@ void bond_change_active_slave(struct bonding *bond, struct slave *new_active)</div><div class='ctx'> </div><div class='ctx'> 			if (netif_running(bond-&gt;dev)) {</div><div class='ctx'> 				bond-&gt;send_peer_notif =</div><div class='del'>-					bond-&gt;params.num_peer_notif;</div><div class='add'>+					bond-&gt;params.num_peer_notif *</div><div class='add'>+					max(1, bond-&gt;params.peer_notif_delay);</div><div class='ctx'> 				should_notify_peers =</div><div class='ctx'> 					bond_should_notify_peers(bond);</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			call_netdevice_notifiers(NETDEV_BONDING_FAILOVER, bond-&gt;dev);</div><div class='del'>-			if (should_notify_peers)</div><div class='add'>+			if (should_notify_peers) {</div><div class='add'>+				bond-&gt;send_peer_notif--;</div><div class='ctx'> 				call_netdevice_notifiers(NETDEV_NOTIFY_PEERS,</div><div class='ctx'> 							 bond-&gt;dev);</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_XFRM_OFFLOAD</div><div class='add'>+	bond_ipsec_add_sa_all(bond);</div><div class='add'>+#endif /* CONFIG_XFRM_OFFLOAD */</div><div class='add'>+</div><div class='ctx'> 	/* resend IGMP joins since active slave has changed or</div><div class='ctx'> 	 * all were sent on curr_active_slave.</div><div class='ctx'> 	 * resend only if bond is brought up with the affected</div><div class='hunk'>@@ -927,11 +1338,10 @@ void bond_select_active_slave(struct bonding *bond)</div><div class='ctx'> 		if (!rv)</div><div class='ctx'> 			return;</div><div class='ctx'> </div><div class='del'>-		if (netif_carrier_ok(bond-&gt;dev)) {</div><div class='del'>-			netdev_info(bond-&gt;dev, "first active interface up!\n");</div><div class='del'>-		} else {</div><div class='add'>+		if (netif_carrier_ok(bond-&gt;dev))</div><div class='add'>+			netdev_info(bond-&gt;dev, "active interface up!\n");</div><div class='add'>+		else</div><div class='ctx'> 			netdev_info(bond-&gt;dev, "now running without any active interface!\n");</div><div class='del'>-		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -963,7 +1373,8 @@ static inline void slave_disable_netpoll(struct slave *slave)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	slave-&gt;np = NULL;</div><div class='del'>-	__netpoll_free_async(np);</div><div class='add'>+</div><div class='add'>+	__netpoll_free(np);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bond_poll_controller(struct net_device *bond_dev)</div><div class='hunk'>@@ -972,17 +1383,13 @@ static void bond_poll_controller(struct net_device *bond_dev)</div><div class='ctx'> 	struct slave *slave = NULL;</div><div class='ctx'> 	struct list_head *iter;</div><div class='ctx'> 	struct ad_info ad_info;</div><div class='del'>-	struct netpoll_info *ni;</div><div class='del'>-	const struct net_device_ops *ops;</div><div class='ctx'> </div><div class='ctx'> 	if (BOND_MODE(bond) == BOND_MODE_8023AD)</div><div class='ctx'> 		if (bond_3ad_get_active_agg_info(bond, &amp;ad_info))</div><div class='ctx'> 			return;</div><div class='ctx'> </div><div class='del'>-	rcu_read_lock_bh();</div><div class='ctx'> 	bond_for_each_slave_rcu(bond, slave, iter) {</div><div class='del'>-		ops = slave-&gt;dev-&gt;netdev_ops;</div><div class='del'>-		if (!bond_slave_is_up(slave) || !ops-&gt;ndo_poll_controller)</div><div class='add'>+		if (!bond_slave_is_up(slave))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		if (BOND_MODE(bond) == BOND_MODE_8023AD) {</div><div class='hunk'>@@ -994,13 +1401,8 @@ static void bond_poll_controller(struct net_device *bond_dev)</div><div class='ctx'> 				continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		ni = rcu_dereference_bh(slave-&gt;dev-&gt;npinfo);</div><div class='del'>-		if (down_trylock(&amp;ni-&gt;dev_lock))</div><div class='del'>-			continue;</div><div class='del'>-		ops-&gt;ndo_poll_controller(slave-&gt;dev);</div><div class='del'>-		up(&amp;ni-&gt;dev_lock);</div><div class='add'>+		netpoll_poll_dev(slave-&gt;dev);</div><div class='ctx'> 	}</div><div class='del'>-	rcu_read_unlock_bh();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bond_netpoll_cleanup(struct net_device *bond_dev)</div><div class='hunk'>@@ -1014,7 +1416,7 @@ static void bond_netpoll_cleanup(struct net_device *bond_dev)</div><div class='ctx'> 			slave_disable_netpoll(slave);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int bond_netpoll_setup(struct net_device *dev, struct netpoll_info *ni)</div><div class='add'>+static int bond_netpoll_setup(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct bonding *bond = netdev_priv(dev);</div><div class='ctx'> 	struct list_head *iter;</div><div class='hunk'>@@ -1054,9 +1456,7 @@ static netdev_features_t bond_fix_features(struct net_device *dev,</div><div class='ctx'> 	struct slave *slave;</div><div class='ctx'> </div><div class='ctx'> 	mask = features;</div><div class='del'>-</div><div class='del'>-	features &amp;= ~NETIF_F_ONE_FOR_ALL;</div><div class='del'>-	features |= NETIF_F_ALL_FOR_ALL;</div><div class='add'>+	features = netdev_base_features(features);</div><div class='ctx'> </div><div class='ctx'> 	bond_for_each_slave(bond, slave, iter) {</div><div class='ctx'> 		features = netdev_increment_features(features,</div><div class='hunk'>@@ -1068,71 +1468,29 @@ static netdev_features_t bond_fix_features(struct net_device *dev,</div><div class='ctx'> 	return features;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define BOND_VLAN_FEATURES	(NETIF_F_ALL_CSUM | NETIF_F_SG | \</div><div class='del'>-				 NETIF_F_FRAGLIST | NETIF_F_ALL_TSO | \</div><div class='del'>-				 NETIF_F_HIGHDMA | NETIF_F_LRO)</div><div class='del'>-</div><div class='del'>-#define BOND_ENC_FEATURES	(NETIF_F_ALL_CSUM | NETIF_F_SG | NETIF_F_RXCSUM |\</div><div class='del'>-				 NETIF_F_TSO)</div><div class='del'>-</div><div class='del'>-static void bond_compute_features(struct bonding *bond)</div><div class='del'>-{</div><div class='del'>-	unsigned int dst_release_flag = IFF_XMIT_DST_RELEASE |</div><div class='del'>-					IFF_XMIT_DST_RELEASE_PERM;</div><div class='del'>-	netdev_features_t vlan_features = BOND_VLAN_FEATURES;</div><div class='del'>-	netdev_features_t enc_features  = BOND_ENC_FEATURES;</div><div class='del'>-	struct net_device *bond_dev = bond-&gt;dev;</div><div class='del'>-	struct list_head *iter;</div><div class='del'>-	struct slave *slave;</div><div class='del'>-	unsigned short max_hard_header_len = ETH_HLEN;</div><div class='del'>-	unsigned int gso_max_size = GSO_MAX_SIZE;</div><div class='del'>-	u16 gso_max_segs = GSO_MAX_SEGS;</div><div class='del'>-</div><div class='del'>-	if (!bond_has_slaves(bond))</div><div class='del'>-		goto done;</div><div class='del'>-	vlan_features &amp;= NETIF_F_ALL_FOR_ALL;</div><div class='del'>-</div><div class='del'>-	bond_for_each_slave(bond, slave, iter) {</div><div class='del'>-		vlan_features = netdev_increment_features(vlan_features,</div><div class='del'>-			slave-&gt;dev-&gt;vlan_features, BOND_VLAN_FEATURES);</div><div class='del'>-</div><div class='del'>-		enc_features = netdev_increment_features(enc_features,</div><div class='del'>-							 slave-&gt;dev-&gt;hw_enc_features,</div><div class='del'>-							 BOND_ENC_FEATURES);</div><div class='del'>-		dst_release_flag &amp;= slave-&gt;dev-&gt;priv_flags;</div><div class='del'>-		if (slave-&gt;dev-&gt;hard_header_len &gt; max_hard_header_len)</div><div class='del'>-			max_hard_header_len = slave-&gt;dev-&gt;hard_header_len;</div><div class='del'>-</div><div class='del'>-		gso_max_size = min(gso_max_size, slave-&gt;dev-&gt;gso_max_size);</div><div class='del'>-		gso_max_segs = min(gso_max_segs, slave-&gt;dev-&gt;gso_max_segs);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-done:</div><div class='del'>-	bond_dev-&gt;vlan_features = vlan_features;</div><div class='del'>-	bond_dev-&gt;hw_enc_features = enc_features | NETIF_F_GSO_ENCAP_ALL;</div><div class='del'>-	bond_dev-&gt;hard_header_len = max_hard_header_len;</div><div class='del'>-	bond_dev-&gt;gso_max_segs = gso_max_segs;</div><div class='del'>-	netif_set_gso_max_size(bond_dev, gso_max_size);</div><div class='del'>-</div><div class='del'>-	bond_dev-&gt;priv_flags &amp;= ~IFF_XMIT_DST_RELEASE;</div><div class='del'>-	if ((bond_dev-&gt;priv_flags &amp; IFF_XMIT_DST_RELEASE_PERM) &amp;&amp;</div><div class='del'>-	    dst_release_flag == (IFF_XMIT_DST_RELEASE | IFF_XMIT_DST_RELEASE_PERM))</div><div class='del'>-		bond_dev-&gt;priv_flags |= IFF_XMIT_DST_RELEASE;</div><div class='del'>-</div><div class='del'>-	netdev_change_features(bond_dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void bond_setup_by_slave(struct net_device *bond_dev,</div><div class='ctx'> 				struct net_device *slave_dev)</div><div class='ctx'> {</div><div class='add'>+	bool was_up = !!(bond_dev-&gt;flags &amp; IFF_UP);</div><div class='add'>+</div><div class='add'>+	dev_close(bond_dev);</div><div class='add'>+</div><div class='ctx'> 	bond_dev-&gt;header_ops	    = slave_dev-&gt;header_ops;</div><div class='ctx'> </div><div class='ctx'> 	bond_dev-&gt;type		    = slave_dev-&gt;type;</div><div class='ctx'> 	bond_dev-&gt;hard_header_len   = slave_dev-&gt;hard_header_len;</div><div class='add'>+	bond_dev-&gt;needed_headroom   = slave_dev-&gt;needed_headroom;</div><div class='ctx'> 	bond_dev-&gt;addr_len	    = slave_dev-&gt;addr_len;</div><div class='ctx'> </div><div class='ctx'> 	memcpy(bond_dev-&gt;broadcast, slave_dev-&gt;broadcast,</div><div class='ctx'> 		slave_dev-&gt;addr_len);</div><div class='add'>+</div><div class='add'>+	if (slave_dev-&gt;flags &amp; IFF_POINTOPOINT) {</div><div class='add'>+		bond_dev-&gt;flags &amp;= ~(IFF_BROADCAST | IFF_MULTICAST);</div><div class='add'>+		bond_dev-&gt;flags |= (IFF_POINTOPOINT | IFF_NOARP);</div><div class='add'>+	}</div><div class='add'>+	if (was_up)</div><div class='add'>+		dev_open(bond_dev, NULL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* On bonding slaves other than the currently active slave, suppress</div><div class='hunk'>@@ -1170,7 +1528,7 @@ static rx_handler_result_t bond_handle_frame(struct sk_buff **pskb)</div><div class='ctx'> 	slave = bond_slave_get_rcu(skb-&gt;dev);</div><div class='ctx'> 	bond = slave-&gt;bond;</div><div class='ctx'> </div><div class='del'>-	recv_probe = ACCESS_ONCE(bond-&gt;recv_probe);</div><div class='add'>+	recv_probe = READ_ONCE(bond-&gt;recv_probe);</div><div class='ctx'> 	if (recv_probe) {</div><div class='ctx'> 		ret = recv_probe(skb, bond, slave);</div><div class='ctx'> 		if (ret == RX_HANDLER_CONSUMED) {</div><div class='hunk'>@@ -1179,14 +1537,27 @@ static rx_handler_result_t bond_handle_frame(struct sk_buff **pskb)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * For packets determined by bond_should_deliver_exact_match() call to</div><div class='add'>+	 * be suppressed we want to make an exception for link-local packets.</div><div class='add'>+	 * This is necessary for e.g. LLDP daemons to be able to monitor</div><div class='add'>+	 * inactive slave links without being forced to bind to them</div><div class='add'>+	 * explicitly.</div><div class='add'>+	 *</div><div class='add'>+	 * At the same time, packets that are passed to the bonding master</div><div class='add'>+	 * (including link-local ones) can have their originating interface</div><div class='add'>+	 * determined via PACKET_ORIGDEV socket option.</div><div class='add'>+	 */</div><div class='ctx'> 	if (bond_should_deliver_exact_match(skb, slave, bond)) {</div><div class='add'>+		if (is_link_local_ether_addr(eth_hdr(skb)-&gt;h_dest))</div><div class='add'>+			return RX_HANDLER_PASS;</div><div class='ctx'> 		return RX_HANDLER_EXACT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	skb-&gt;dev = bond-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 	if (BOND_MODE(bond) == BOND_MODE_ALB &amp;&amp;</div><div class='del'>-	    bond-&gt;dev-&gt;priv_flags &amp; IFF_BRIDGE_PORT &amp;&amp;</div><div class='add'>+	    netif_is_bridge_port(bond-&gt;dev) &amp;&amp;</div><div class='ctx'> 	    skb-&gt;pkt_type == PACKET_HOST) {</div><div class='ctx'> </div><div class='ctx'> 		if (unlikely(skb_cow_head(skb,</div><div class='hunk'>@@ -1194,61 +1565,137 @@ static rx_handler_result_t bond_handle_frame(struct sk_buff **pskb)</div><div class='ctx'> 			kfree_skb(skb);</div><div class='ctx'> 			return RX_HANDLER_CONSUMED;</div><div class='ctx'> 		}</div><div class='del'>-		ether_addr_copy(eth_hdr(skb)-&gt;h_dest, bond-&gt;dev-&gt;dev_addr);</div><div class='add'>+		bond_hw_addr_copy(eth_hdr(skb)-&gt;h_dest, bond-&gt;dev-&gt;dev_addr,</div><div class='add'>+				  bond-&gt;dev-&gt;addr_len);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int bond_master_upper_dev_link(struct net_device *bond_dev,</div><div class='del'>-				      struct net_device *slave_dev,</div><div class='del'>-				      struct slave *slave)</div><div class='add'>+static enum netdev_lag_tx_type bond_lag_tx_type(struct bonding *bond)</div><div class='add'>+{</div><div class='add'>+	switch (BOND_MODE(bond)) {</div><div class='add'>+	case BOND_MODE_ROUNDROBIN:</div><div class='add'>+		return NETDEV_LAG_TX_TYPE_ROUNDROBIN;</div><div class='add'>+	case BOND_MODE_ACTIVEBACKUP:</div><div class='add'>+		return NETDEV_LAG_TX_TYPE_ACTIVEBACKUP;</div><div class='add'>+	case BOND_MODE_BROADCAST:</div><div class='add'>+		return NETDEV_LAG_TX_TYPE_BROADCAST;</div><div class='add'>+	case BOND_MODE_XOR:</div><div class='add'>+	case BOND_MODE_8023AD:</div><div class='add'>+		return NETDEV_LAG_TX_TYPE_HASH;</div><div class='add'>+	default:</div><div class='add'>+		return NETDEV_LAG_TX_TYPE_UNKNOWN;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum netdev_lag_hash bond_lag_hash_type(struct bonding *bond,</div><div class='add'>+					       enum netdev_lag_tx_type type)</div><div class='ctx'> {</div><div class='add'>+	if (type != NETDEV_LAG_TX_TYPE_HASH)</div><div class='add'>+		return NETDEV_LAG_HASH_NONE;</div><div class='add'>+</div><div class='add'>+	switch (bond-&gt;params.xmit_policy) {</div><div class='add'>+	case BOND_XMIT_POLICY_LAYER2:</div><div class='add'>+		return NETDEV_LAG_HASH_L2;</div><div class='add'>+	case BOND_XMIT_POLICY_LAYER34:</div><div class='add'>+		return NETDEV_LAG_HASH_L34;</div><div class='add'>+	case BOND_XMIT_POLICY_LAYER23:</div><div class='add'>+		return NETDEV_LAG_HASH_L23;</div><div class='add'>+	case BOND_XMIT_POLICY_ENCAP23:</div><div class='add'>+		return NETDEV_LAG_HASH_E23;</div><div class='add'>+	case BOND_XMIT_POLICY_ENCAP34:</div><div class='add'>+		return NETDEV_LAG_HASH_E34;</div><div class='add'>+	case BOND_XMIT_POLICY_VLAN_SRCMAC:</div><div class='add'>+		return NETDEV_LAG_HASH_VLAN_SRCMAC;</div><div class='add'>+	default:</div><div class='add'>+		return NETDEV_LAG_HASH_UNKNOWN;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bond_master_upper_dev_link(struct bonding *bond, struct slave *slave,</div><div class='add'>+				      struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct netdev_lag_upper_info lag_upper_info;</div><div class='add'>+	enum netdev_lag_tx_type type;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = netdev_master_upper_dev_link_private(slave_dev, bond_dev, slave);</div><div class='add'>+	type = bond_lag_tx_type(bond);</div><div class='add'>+	lag_upper_info.tx_type = type;</div><div class='add'>+	lag_upper_info.hash_type = bond_lag_hash_type(bond, type);</div><div class='add'>+</div><div class='add'>+	err = netdev_master_upper_dev_link(slave-&gt;dev, bond-&gt;dev, slave,</div><div class='add'>+					   &amp;lag_upper_info, extack);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='del'>-	slave_dev-&gt;flags |= IFF_SLAVE;</div><div class='del'>-	rtmsg_ifinfo(RTM_NEWLINK, slave_dev, IFF_SLAVE, GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	slave-&gt;dev-&gt;flags |= IFF_SLAVE;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void bond_upper_dev_unlink(struct net_device *bond_dev,</div><div class='del'>-				  struct net_device *slave_dev)</div><div class='add'>+static void bond_upper_dev_unlink(struct bonding *bond, struct slave *slave)</div><div class='ctx'> {</div><div class='del'>-	netdev_upper_dev_unlink(slave_dev, bond_dev);</div><div class='del'>-	slave_dev-&gt;flags &amp;= ~IFF_SLAVE;</div><div class='del'>-	rtmsg_ifinfo(RTM_NEWLINK, slave_dev, IFF_SLAVE, GFP_KERNEL);</div><div class='add'>+	netdev_upper_dev_unlink(slave-&gt;dev, bond-&gt;dev);</div><div class='add'>+	slave-&gt;dev-&gt;flags &amp;= ~IFF_SLAVE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct slave *bond_alloc_slave(struct bonding *bond)</div><div class='add'>+static void slave_kobj_release(struct kobject *kobj)</div><div class='add'>+{</div><div class='add'>+	struct slave *slave = to_slave(kobj);</div><div class='add'>+	struct bonding *bond = bond_get_bond_by_slave(slave);</div><div class='add'>+</div><div class='add'>+	cancel_delayed_work_sync(&amp;slave-&gt;notify_work);</div><div class='add'>+	if (BOND_MODE(bond) == BOND_MODE_8023AD)</div><div class='add'>+		kfree(SLAVE_AD_INFO(slave));</div><div class='add'>+</div><div class='add'>+	kfree(slave);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct kobj_type slave_ktype = {</div><div class='add'>+	.release = slave_kobj_release,</div><div class='add'>+#ifdef CONFIG_SYSFS</div><div class='add'>+	.sysfs_ops = &amp;slave_sysfs_ops,</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int bond_kobj_init(struct slave *slave)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = kobject_init_and_add(&amp;slave-&gt;kobj, &amp;slave_ktype,</div><div class='add'>+				   &amp;(slave-&gt;dev-&gt;dev.kobj), "bonding_slave");</div><div class='add'>+	if (err)</div><div class='add'>+		kobject_put(&amp;slave-&gt;kobj);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct slave *bond_alloc_slave(struct bonding *bond,</div><div class='add'>+				      struct net_device *slave_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct slave *slave = NULL;</div><div class='ctx'> </div><div class='del'>-	slave = kzalloc(sizeof(struct slave), GFP_KERNEL);</div><div class='add'>+	slave = kzalloc(sizeof(*slave), GFP_KERNEL);</div><div class='ctx'> 	if (!slave)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='add'>+	slave-&gt;bond = bond;</div><div class='add'>+	slave-&gt;dev = slave_dev;</div><div class='add'>+	INIT_DELAYED_WORK(&amp;slave-&gt;notify_work, bond_netdev_notify_work);</div><div class='add'>+</div><div class='add'>+	if (bond_kobj_init(slave))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='ctx'> 	if (BOND_MODE(bond) == BOND_MODE_8023AD) {</div><div class='ctx'> 		SLAVE_AD_INFO(slave) = kzalloc(sizeof(struct ad_slave_info),</div><div class='ctx'> 					       GFP_KERNEL);</div><div class='ctx'> 		if (!SLAVE_AD_INFO(slave)) {</div><div class='del'>-			kfree(slave);</div><div class='add'>+			kobject_put(&amp;slave-&gt;kobj);</div><div class='ctx'> 			return NULL;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	return slave;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void bond_free_slave(struct slave *slave)</div><div class='del'>-{</div><div class='del'>-	struct bonding *bond = bond_get_bond_by_slave(slave);</div><div class='ctx'> </div><div class='del'>-	if (BOND_MODE(bond) == BOND_MODE_8023AD)</div><div class='del'>-		kfree(SLAVE_AD_INFO(slave));</div><div class='del'>-</div><div class='del'>-	kfree(slave);</div><div class='add'>+	return slave;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bond_fill_ifbond(struct bonding *bond, struct ifbond *info)</div><div class='hunk'>@@ -1266,98 +1713,144 @@ static void bond_fill_ifslave(struct slave *slave, struct ifslave *info)</div><div class='ctx'> 	info-&gt;link_failure_count = slave-&gt;link_failure_count;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void bond_netdev_notify(struct net_device *dev,</div><div class='del'>-			       struct netdev_bonding_info *info)</div><div class='add'>+static void bond_netdev_notify_work(struct work_struct *_work)</div><div class='ctx'> {</div><div class='del'>-	rtnl_lock();</div><div class='del'>-	netdev_bonding_info_change(dev, info);</div><div class='del'>-	rtnl_unlock();</div><div class='add'>+	struct slave *slave = container_of(_work, struct slave,</div><div class='add'>+					   notify_work.work);</div><div class='add'>+</div><div class='add'>+	if (rtnl_trylock()) {</div><div class='add'>+		struct netdev_bonding_info binfo;</div><div class='add'>+</div><div class='add'>+		bond_fill_ifslave(slave, &amp;binfo.slave);</div><div class='add'>+		bond_fill_ifbond(slave-&gt;bond, &amp;binfo.master);</div><div class='add'>+		netdev_bonding_info_change(slave-&gt;dev, &amp;binfo);</div><div class='add'>+		rtnl_unlock();</div><div class='add'>+	} else {</div><div class='add'>+		queue_delayed_work(slave-&gt;bond-&gt;wq, &amp;slave-&gt;notify_work, 1);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void bond_netdev_notify_work(struct work_struct *_work)</div><div class='add'>+void bond_queue_slave_event(struct slave *slave)</div><div class='ctx'> {</div><div class='del'>-	struct netdev_notify_work *w =</div><div class='del'>-		container_of(_work, struct netdev_notify_work, work.work);</div><div class='add'>+	queue_delayed_work(slave-&gt;bond-&gt;wq, &amp;slave-&gt;notify_work, 0);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	bond_netdev_notify(w-&gt;dev, &amp;w-&gt;bonding_info);</div><div class='del'>-	dev_put(w-&gt;dev);</div><div class='del'>-	kfree(w);</div><div class='add'>+void bond_lower_state_changed(struct slave *slave)</div><div class='add'>+{</div><div class='add'>+	struct netdev_lag_lower_state_info info;</div><div class='add'>+</div><div class='add'>+	info.link_up = slave-&gt;link == BOND_LINK_UP ||</div><div class='add'>+		       slave-&gt;link == BOND_LINK_FAIL;</div><div class='add'>+	info.tx_enabled = bond_is_active_slave(slave);</div><div class='add'>+	netdev_lower_state_changed(slave-&gt;dev, &amp;info);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void bond_queue_slave_event(struct slave *slave)</div><div class='add'>+#define BOND_NL_ERR(bond_dev, extack, errmsg) do {		\</div><div class='add'>+	if (extack)						\</div><div class='add'>+		NL_SET_ERR_MSG(extack, errmsg);			\</div><div class='add'>+	else							\</div><div class='add'>+		netdev_err(bond_dev, "Error: %s\n", errmsg);	\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+#define SLAVE_NL_ERR(bond_dev, slave_dev, extack, errmsg) do {		\</div><div class='add'>+	if (extack)							\</div><div class='add'>+		NL_SET_ERR_MSG(extack, errmsg);				\</div><div class='add'>+	else								\</div><div class='add'>+		slave_err(bond_dev, slave_dev, "Error: %s\n", errmsg);	\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+/* The bonding driver uses ether_setup() to convert a master bond device</div><div class='add'>+ * to ARPHRD_ETHER, that resets the target netdevice's flags so we always</div><div class='add'>+ * have to restore the IFF_MASTER flag, and only restore IFF_SLAVE and IFF_UP</div><div class='add'>+ * if they were set</div><div class='add'>+ */</div><div class='add'>+static void bond_ether_setup(struct net_device *bond_dev)</div><div class='ctx'> {</div><div class='del'>-	struct bonding *bond = slave-&gt;bond;</div><div class='del'>-	struct netdev_notify_work *nnw = kzalloc(sizeof(*nnw), GFP_ATOMIC);</div><div class='add'>+	unsigned int flags = bond_dev-&gt;flags &amp; (IFF_SLAVE | IFF_UP);</div><div class='add'>+</div><div class='add'>+	ether_setup(bond_dev);</div><div class='add'>+	bond_dev-&gt;flags |= IFF_MASTER | flags;</div><div class='add'>+	bond_dev-&gt;priv_flags &amp;= ~IFF_TX_SKB_SHARING;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void bond_xdp_set_features(struct net_device *bond_dev)</div><div class='add'>+{</div><div class='add'>+	struct bonding *bond = netdev_priv(bond_dev);</div><div class='add'>+	xdp_features_t val = NETDEV_XDP_ACT_MASK;</div><div class='add'>+	struct list_head *iter;</div><div class='add'>+	struct slave *slave;</div><div class='add'>+</div><div class='add'>+	ASSERT_RTNL();</div><div class='ctx'> </div><div class='del'>-	if (!nnw)</div><div class='add'>+	if (!bond_xdp_check(bond, BOND_MODE(bond)) || !bond_has_slaves(bond)) {</div><div class='add'>+		xdp_clear_features_flag(bond_dev);</div><div class='ctx'> 		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bond_for_each_slave(bond, slave, iter)</div><div class='add'>+		val &amp;= slave-&gt;dev-&gt;xdp_features;</div><div class='ctx'> </div><div class='del'>-	dev_hold(slave-&gt;dev);</div><div class='del'>-	nnw-&gt;dev = slave-&gt;dev;</div><div class='del'>-	bond_fill_ifslave(slave, &amp;nnw-&gt;bonding_info.slave);</div><div class='del'>-	bond_fill_ifbond(bond, &amp;nnw-&gt;bonding_info.master);</div><div class='del'>-	INIT_DELAYED_WORK(&amp;nnw-&gt;work, bond_netdev_notify_work);</div><div class='add'>+	val &amp;= ~NETDEV_XDP_ACT_XSK_ZEROCOPY;</div><div class='ctx'> </div><div class='del'>-	queue_delayed_work(slave-&gt;bond-&gt;wq, &amp;nnw-&gt;work, 0);</div><div class='add'>+	xdp_set_features_flag(bond_dev, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* enslave device &lt;slave&gt; to bond device &lt;master&gt; */</div><div class='del'>-int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)</div><div class='add'>+int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev,</div><div class='add'>+		 struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct bonding *bond = netdev_priv(bond_dev);</div><div class='ctx'> 	const struct net_device_ops *slave_ops = slave_dev-&gt;netdev_ops;</div><div class='ctx'> 	struct slave *new_slave = NULL, *prev_slave;</div><div class='del'>-	struct sockaddr addr;</div><div class='del'>-	int link_reporting;</div><div class='add'>+	struct sockaddr_storage ss;</div><div class='ctx'> 	int res = 0, i;</div><div class='ctx'> </div><div class='del'>-	if (!bond-&gt;params.use_carrier &amp;&amp;</div><div class='del'>-	    slave_dev-&gt;ethtool_ops-&gt;get_link == NULL &amp;&amp;</div><div class='del'>-	    slave_ops-&gt;ndo_do_ioctl == NULL) {</div><div class='del'>-		netdev_warn(bond_dev, "no link monitoring support for %s\n",</div><div class='del'>-			    slave_dev-&gt;name);</div><div class='add'>+	if (slave_dev-&gt;flags &amp; IFF_MASTER &amp;&amp;</div><div class='add'>+	    !netif_is_bond_master(slave_dev)) {</div><div class='add'>+		BOND_NL_ERR(bond_dev, extack,</div><div class='add'>+			    "Device type (master device) cannot be enslaved");</div><div class='add'>+		return -EPERM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* already enslaved */</div><div class='del'>-	if (slave_dev-&gt;flags &amp; IFF_SLAVE) {</div><div class='del'>-		netdev_dbg(bond_dev, "Error: Device was already enslaved\n");</div><div class='add'>+	/* already in-use? */</div><div class='add'>+	if (netdev_is_rx_handler_busy(slave_dev)) {</div><div class='add'>+		SLAVE_NL_ERR(bond_dev, slave_dev, extack,</div><div class='add'>+			     "Device is in use and cannot be enslaved");</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (bond_dev == slave_dev) {</div><div class='del'>-		netdev_err(bond_dev, "cannot enslave bond to itself.\n");</div><div class='add'>+		BOND_NL_ERR(bond_dev, extack, "Cannot enslave bond to itself.");</div><div class='ctx'> 		return -EPERM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* vlan challenged mutual exclusion */</div><div class='ctx'> 	/* no need to lock since we're protected by rtnl_lock */</div><div class='ctx'> 	if (slave_dev-&gt;features &amp; NETIF_F_VLAN_CHALLENGED) {</div><div class='del'>-		netdev_dbg(bond_dev, "%s is NETIF_F_VLAN_CHALLENGED\n",</div><div class='del'>-			   slave_dev-&gt;name);</div><div class='add'>+		slave_dbg(bond_dev, slave_dev, "is NETIF_F_VLAN_CHALLENGED\n");</div><div class='ctx'> 		if (vlan_uses_dev(bond_dev)) {</div><div class='del'>-			netdev_err(bond_dev, "Error: cannot enslave VLAN challenged slave %s on VLAN enabled bond %s\n",</div><div class='del'>-				   slave_dev-&gt;name, bond_dev-&gt;name);</div><div class='add'>+			SLAVE_NL_ERR(bond_dev, slave_dev, extack,</div><div class='add'>+				     "Can not enslave VLAN challenged device to VLAN enabled bond");</div><div class='ctx'> 			return -EPERM;</div><div class='ctx'> 		} else {</div><div class='del'>-			netdev_warn(bond_dev, "enslaved VLAN challenged slave %s. Adding VLANs will be blocked as long as %s is part of bond %s\n",</div><div class='del'>-				    slave_dev-&gt;name, slave_dev-&gt;name,</div><div class='del'>-				    bond_dev-&gt;name);</div><div class='add'>+			slave_warn(bond_dev, slave_dev, "enslaved VLAN challenged slave. Adding VLANs will be blocked as long as it is part of bond.\n");</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='del'>-		netdev_dbg(bond_dev, "%s is !NETIF_F_VLAN_CHALLENGED\n",</div><div class='del'>-			   slave_dev-&gt;name);</div><div class='add'>+		slave_dbg(bond_dev, slave_dev, "is !NETIF_F_VLAN_CHALLENGED\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (slave_dev-&gt;features &amp; NETIF_F_HW_ESP)</div><div class='add'>+		slave_dbg(bond_dev, slave_dev, "is esp-hw-offload capable\n");</div><div class='add'>+</div><div class='ctx'> 	/* Old ifenslave binaries are no longer supported.  These can</div><div class='ctx'> 	 * be identified with moderate accuracy by the state of the slave:</div><div class='ctx'> 	 * the current ifenslave will set the interface down prior to</div><div class='ctx'> 	 * enslaving it; the old ifenslave will not.</div><div class='ctx'> 	 */</div><div class='del'>-	if ((slave_dev-&gt;flags &amp; IFF_UP)) {</div><div class='del'>-		netdev_err(bond_dev, "%s is up - this may be due to an out of date ifenslave\n",</div><div class='del'>-			   slave_dev-&gt;name);</div><div class='del'>-		res = -EPERM;</div><div class='del'>-		goto err_undo_flags;</div><div class='add'>+	if (slave_dev-&gt;flags &amp; IFF_UP) {</div><div class='add'>+		SLAVE_NL_ERR(bond_dev, slave_dev, extack,</div><div class='add'>+			     "Device can not be enslaved while up");</div><div class='add'>+		return -EPERM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* set bonding device ether type by slave - bonding netdevices are</div><div class='hunk'>@@ -1369,16 +1862,15 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!bond_has_slaves(bond)) {</div><div class='ctx'> 		if (bond_dev-&gt;type != slave_dev-&gt;type) {</div><div class='del'>-			netdev_dbg(bond_dev, "change device type from %d to %d\n",</div><div class='del'>-				   bond_dev-&gt;type, slave_dev-&gt;type);</div><div class='add'>+			slave_dbg(bond_dev, slave_dev, "change device type from %d to %d\n",</div><div class='add'>+				  bond_dev-&gt;type, slave_dev-&gt;type);</div><div class='ctx'> </div><div class='ctx'> 			res = call_netdevice_notifiers(NETDEV_PRE_TYPE_CHANGE,</div><div class='ctx'> 						       bond_dev);</div><div class='ctx'> 			res = notifier_to_errno(res);</div><div class='ctx'> 			if (res) {</div><div class='del'>-				netdev_err(bond_dev, "refused to change device type\n");</div><div class='del'>-				res = -EBUSY;</div><div class='del'>-				goto err_undo_flags;</div><div class='add'>+				slave_err(bond_dev, slave_dev, "refused to change device type\n");</div><div class='add'>+				return -EBUSY;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			/* Flush unicast and multicast addresses */</div><div class='hunk'>@@ -1387,30 +1879,37 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)</div><div class='ctx'> </div><div class='ctx'> 			if (slave_dev-&gt;type != ARPHRD_ETHER)</div><div class='ctx'> 				bond_setup_by_slave(bond_dev, slave_dev);</div><div class='del'>-			else {</div><div class='del'>-				ether_setup(bond_dev);</div><div class='del'>-				bond_dev-&gt;priv_flags &amp;= ~IFF_TX_SKB_SHARING;</div><div class='del'>-			}</div><div class='add'>+			else</div><div class='add'>+				bond_ether_setup(bond_dev);</div><div class='ctx'> </div><div class='ctx'> 			call_netdevice_notifiers(NETDEV_POST_TYPE_CHANGE,</div><div class='ctx'> 						 bond_dev);</div><div class='ctx'> 		}</div><div class='ctx'> 	} else if (bond_dev-&gt;type != slave_dev-&gt;type) {</div><div class='del'>-		netdev_err(bond_dev, "%s ether type (%d) is different from other slaves (%d), can not enslave it\n",</div><div class='del'>-			   slave_dev-&gt;name, slave_dev-&gt;type, bond_dev-&gt;type);</div><div class='del'>-		res = -EINVAL;</div><div class='add'>+		SLAVE_NL_ERR(bond_dev, slave_dev, extack,</div><div class='add'>+			     "Device type is different from other slaves");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (slave_dev-&gt;type == ARPHRD_INFINIBAND &amp;&amp;</div><div class='add'>+	    BOND_MODE(bond) != BOND_MODE_ACTIVEBACKUP) {</div><div class='add'>+		SLAVE_NL_ERR(bond_dev, slave_dev, extack,</div><div class='add'>+			     "Only active-backup mode is supported for infiniband slaves");</div><div class='add'>+		res = -EOPNOTSUPP;</div><div class='ctx'> 		goto err_undo_flags;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (slave_ops-&gt;ndo_set_mac_address == NULL) {</div><div class='del'>-		netdev_warn(bond_dev, "The slave device specified does not support setting the MAC address\n");</div><div class='add'>+	if (!slave_ops-&gt;ndo_set_mac_address ||</div><div class='add'>+	    slave_dev-&gt;type == ARPHRD_INFINIBAND) {</div><div class='add'>+		slave_warn(bond_dev, slave_dev, "The slave device specified does not support setting the MAC address\n");</div><div class='ctx'> 		if (BOND_MODE(bond) == BOND_MODE_ACTIVEBACKUP &amp;&amp;</div><div class='ctx'> 		    bond-&gt;params.fail_over_mac != BOND_FOM_ACTIVE) {</div><div class='ctx'> 			if (!bond_has_slaves(bond)) {</div><div class='ctx'> 				bond-&gt;params.fail_over_mac = BOND_FOM_ACTIVE;</div><div class='del'>-				netdev_warn(bond_dev, "Setting fail_over_mac to active for active-backup mode\n");</div><div class='add'>+				slave_warn(bond_dev, slave_dev, "Setting fail_over_mac to active for active-backup mode\n");</div><div class='ctx'> 			} else {</div><div class='del'>-				netdev_err(bond_dev, "The slave device specified does not support setting the MAC address, but fail_over_mac is not set to active\n");</div><div class='add'>+				SLAVE_NL_ERR(bond_dev, slave_dev, extack,</div><div class='add'>+					     "Slave device does not support setting the MAC address, but fail_over_mac is not set to active");</div><div class='ctx'> 				res = -EOPNOTSUPP;</div><div class='ctx'> 				goto err_undo_flags;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -1423,17 +1922,18 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)</div><div class='ctx'> 	 * address to be the same as the slave's.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (!bond_has_slaves(bond) &amp;&amp;</div><div class='del'>-	    bond-&gt;dev-&gt;addr_assign_type == NET_ADDR_RANDOM)</div><div class='del'>-		bond_set_dev_addr(bond-&gt;dev, slave_dev);</div><div class='add'>+	    bond-&gt;dev-&gt;addr_assign_type == NET_ADDR_RANDOM) {</div><div class='add'>+		res = bond_set_dev_addr(bond-&gt;dev, slave_dev);</div><div class='add'>+		if (res)</div><div class='add'>+			goto err_undo_flags;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	new_slave = bond_alloc_slave(bond);</div><div class='add'>+	new_slave = bond_alloc_slave(bond, slave_dev);</div><div class='ctx'> 	if (!new_slave) {</div><div class='ctx'> 		res = -ENOMEM;</div><div class='ctx'> 		goto err_undo_flags;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	new_slave-&gt;bond = bond;</div><div class='del'>-	new_slave-&gt;dev = slave_dev;</div><div class='ctx'> 	/* Set the new_slave's queue_id to be zero.  Queue ID mapping</div><div class='ctx'> 	 * is set via sysfs or module option if desired.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -1443,7 +1943,7 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)</div><div class='ctx'> 	new_slave-&gt;original_mtu = slave_dev-&gt;mtu;</div><div class='ctx'> 	res = dev_set_mtu(slave_dev, bond-&gt;dev-&gt;mtu);</div><div class='ctx'> 	if (res) {</div><div class='del'>-		netdev_dbg(bond_dev, "Error %d calling dev_set_mtu\n", res);</div><div class='add'>+		slave_err(bond_dev, slave_dev, "Error %d calling dev_set_mtu\n", res);</div><div class='ctx'> 		goto err_free;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1451,26 +1951,43 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)</div><div class='ctx'> 	 * that need it, and for restoring it upon release, and then</div><div class='ctx'> 	 * set it to the master's address</div><div class='ctx'> 	 */</div><div class='del'>-	ether_addr_copy(new_slave-&gt;perm_hwaddr, slave_dev-&gt;dev_addr);</div><div class='add'>+	bond_hw_addr_copy(new_slave-&gt;perm_hwaddr, slave_dev-&gt;dev_addr,</div><div class='add'>+			  slave_dev-&gt;addr_len);</div><div class='ctx'> </div><div class='ctx'> 	if (!bond-&gt;params.fail_over_mac ||</div><div class='ctx'> 	    BOND_MODE(bond) != BOND_MODE_ACTIVEBACKUP) {</div><div class='ctx'> 		/* Set slave to master's mac address.  The application already</div><div class='ctx'> 		 * set the master's mac address to that of the first slave</div><div class='ctx'> 		 */</div><div class='del'>-		memcpy(addr.sa_data, bond_dev-&gt;dev_addr, bond_dev-&gt;addr_len);</div><div class='del'>-		addr.sa_family = slave_dev-&gt;type;</div><div class='del'>-		res = dev_set_mac_address(slave_dev, &amp;addr);</div><div class='del'>-		if (res) {</div><div class='del'>-			netdev_dbg(bond_dev, "Error %d calling set_mac_address\n", res);</div><div class='del'>-			goto err_restore_mtu;</div><div class='del'>-		}</div><div class='add'>+		memcpy(ss.__data, bond_dev-&gt;dev_addr, bond_dev-&gt;addr_len);</div><div class='add'>+	} else if (bond-&gt;params.fail_over_mac == BOND_FOM_FOLLOW &amp;&amp;</div><div class='add'>+		   BOND_MODE(bond) == BOND_MODE_ACTIVEBACKUP &amp;&amp;</div><div class='add'>+		   bond_has_slaves(bond) &amp;&amp;</div><div class='add'>+		   memcmp(slave_dev-&gt;dev_addr, bond_dev-&gt;dev_addr, bond_dev-&gt;addr_len) == 0) {</div><div class='add'>+		/* Set slave to random address to avoid duplicate mac</div><div class='add'>+		 * address in later fail over.</div><div class='add'>+		 */</div><div class='add'>+		eth_random_addr(ss.__data);</div><div class='add'>+	} else {</div><div class='add'>+		goto skip_mac_set;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ss.ss_family = slave_dev-&gt;type;</div><div class='add'>+	res = dev_set_mac_address(slave_dev, &amp;ss, extack);</div><div class='add'>+	if (res) {</div><div class='add'>+		slave_err(bond_dev, slave_dev, "Error %d calling set_mac_address\n", res);</div><div class='add'>+		goto err_restore_mtu;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+skip_mac_set:</div><div class='add'>+</div><div class='add'>+	/* set no_addrconf flag before open to prevent IPv6 addrconf */</div><div class='add'>+	slave_dev-&gt;priv_flags |= IFF_NO_ADDRCONF;</div><div class='add'>+</div><div class='ctx'> 	/* open the slave since the application closed it */</div><div class='del'>-	res = dev_open(slave_dev);</div><div class='add'>+	res = dev_open(slave_dev, extack);</div><div class='ctx'> 	if (res) {</div><div class='del'>-		netdev_dbg(bond_dev, "Opening slave %s failed\n", slave_dev-&gt;name);</div><div class='add'>+		slave_err(bond_dev, slave_dev, "Opening slave failed\n");</div><div class='ctx'> 		goto err_restore_mac;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1487,43 +2004,9 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)</div><div class='ctx'> 			goto err_close;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* If the mode uses primary, then the following is handled by</div><div class='del'>-	 * bond_change_active_slave().</div><div class='del'>-	 */</div><div class='del'>-	if (!bond_uses_primary(bond)) {</div><div class='del'>-		/* set promiscuity level to new slave */</div><div class='del'>-		if (bond_dev-&gt;flags &amp; IFF_PROMISC) {</div><div class='del'>-			res = dev_set_promiscuity(slave_dev, 1);</div><div class='del'>-			if (res)</div><div class='del'>-				goto err_close;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* set allmulti level to new slave */</div><div class='del'>-		if (bond_dev-&gt;flags &amp; IFF_ALLMULTI) {</div><div class='del'>-			res = dev_set_allmulti(slave_dev, 1);</div><div class='del'>-			if (res)</div><div class='del'>-				goto err_close;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		netif_addr_lock_bh(bond_dev);</div><div class='del'>-</div><div class='del'>-		dev_mc_sync_multiple(slave_dev, bond_dev);</div><div class='del'>-		dev_uc_sync_multiple(slave_dev, bond_dev);</div><div class='del'>-</div><div class='del'>-		netif_addr_unlock_bh(bond_dev);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (BOND_MODE(bond) == BOND_MODE_8023AD) {</div><div class='del'>-		/* add lacpdu mc addr to mc list */</div><div class='del'>-		u8 lacpdu_multicast[ETH_ALEN] = MULTICAST_LACPDU_ADDR;</div><div class='del'>-</div><div class='del'>-		dev_mc_add(slave_dev, lacpdu_multicast);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	res = vlan_vids_add_by_dev(slave_dev, bond_dev);</div><div class='ctx'> 	if (res) {</div><div class='del'>-		netdev_err(bond_dev, "Couldn't add bond vlan ids to %s\n",</div><div class='del'>-			   slave_dev-&gt;name);</div><div class='add'>+		slave_err(bond_dev, slave_dev, "Couldn't add bond vlan ids\n");</div><div class='ctx'> 		goto err_close;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1532,61 +2015,50 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)</div><div class='ctx'> 	new_slave-&gt;delay = 0;</div><div class='ctx'> 	new_slave-&gt;link_failure_count = 0;</div><div class='ctx'> </div><div class='del'>-	bond_update_speed_duplex(new_slave);</div><div class='add'>+	if (bond_update_speed_duplex(new_slave) &amp;&amp;</div><div class='add'>+	    bond_needs_speed_duplex(bond))</div><div class='add'>+		new_slave-&gt;link = BOND_LINK_DOWN;</div><div class='ctx'> </div><div class='ctx'> 	new_slave-&gt;last_rx = jiffies -</div><div class='ctx'> 		(msecs_to_jiffies(bond-&gt;params.arp_interval) + 1);</div><div class='ctx'> 	for (i = 0; i &lt; BOND_MAX_ARP_TARGETS; i++)</div><div class='ctx'> 		new_slave-&gt;target_last_arp_rx[i] = new_slave-&gt;last_rx;</div><div class='ctx'> </div><div class='del'>-	if (bond-&gt;params.miimon &amp;&amp; !bond-&gt;params.use_carrier) {</div><div class='del'>-		link_reporting = bond_check_dev_link(bond, slave_dev, 1);</div><div class='del'>-</div><div class='del'>-		if ((link_reporting == -1) &amp;&amp; !bond-&gt;params.arp_interval) {</div><div class='del'>-			/* miimon is set but a bonded network driver</div><div class='del'>-			 * does not support ETHTOOL/MII and</div><div class='del'>-			 * arp_interval is not set.  Note: if</div><div class='del'>-			 * use_carrier is enabled, we will never go</div><div class='del'>-			 * here (because netif_carrier is always</div><div class='del'>-			 * supported); thus, we don't need to change</div><div class='del'>-			 * the messages for netif_carrier.</div><div class='del'>-			 */</div><div class='del'>-			netdev_warn(bond_dev, "MII and ETHTOOL support not available for interface %s, and arp_interval/arp_ip_target module parameters not specified, thus bonding will not detect link failures! see bonding.txt for details\n",</div><div class='del'>-				    slave_dev-&gt;name);</div><div class='del'>-		} else if (link_reporting == -1) {</div><div class='del'>-			/* unable get link status using mii/ethtool */</div><div class='del'>-			netdev_warn(bond_dev, "can't get link status from interface %s; the network driver associated with this interface does not support MII or ETHTOOL link status reporting, thus miimon has no effect on this interface\n",</div><div class='del'>-				    slave_dev-&gt;name);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	new_slave-&gt;last_tx = new_slave-&gt;last_rx;</div><div class='ctx'> </div><div class='ctx'> 	/* check for initial state */</div><div class='add'>+	new_slave-&gt;link = BOND_LINK_NOCHANGE;</div><div class='ctx'> 	if (bond-&gt;params.miimon) {</div><div class='del'>-		if (bond_check_dev_link(bond, slave_dev, 0) == BMSR_LSTATUS) {</div><div class='add'>+		if (netif_running(slave_dev) &amp;&amp; netif_carrier_ok(slave_dev)) {</div><div class='ctx'> 			if (bond-&gt;params.updelay) {</div><div class='ctx'> 				bond_set_slave_link_state(new_slave,</div><div class='del'>-							  BOND_LINK_BACK);</div><div class='add'>+							  BOND_LINK_BACK,</div><div class='add'>+							  BOND_SLAVE_NOTIFY_NOW);</div><div class='ctx'> 				new_slave-&gt;delay = bond-&gt;params.updelay;</div><div class='ctx'> 			} else {</div><div class='ctx'> 				bond_set_slave_link_state(new_slave,</div><div class='del'>-							  BOND_LINK_UP);</div><div class='add'>+							  BOND_LINK_UP,</div><div class='add'>+							  BOND_SLAVE_NOTIFY_NOW);</div><div class='ctx'> 			}</div><div class='ctx'> 		} else {</div><div class='del'>-			bond_set_slave_link_state(new_slave, BOND_LINK_DOWN);</div><div class='add'>+			bond_set_slave_link_state(new_slave, BOND_LINK_DOWN,</div><div class='add'>+						  BOND_SLAVE_NOTIFY_NOW);</div><div class='ctx'> 		}</div><div class='ctx'> 	} else if (bond-&gt;params.arp_interval) {</div><div class='ctx'> 		bond_set_slave_link_state(new_slave,</div><div class='ctx'> 					  (netif_carrier_ok(slave_dev) ?</div><div class='del'>-					  BOND_LINK_UP : BOND_LINK_DOWN));</div><div class='add'>+					  BOND_LINK_UP : BOND_LINK_DOWN),</div><div class='add'>+					  BOND_SLAVE_NOTIFY_NOW);</div><div class='ctx'> 	} else {</div><div class='del'>-		bond_set_slave_link_state(new_slave, BOND_LINK_UP);</div><div class='add'>+		bond_set_slave_link_state(new_slave, BOND_LINK_UP,</div><div class='add'>+					  BOND_SLAVE_NOTIFY_NOW);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (new_slave-&gt;link != BOND_LINK_DOWN)</div><div class='ctx'> 		new_slave-&gt;last_link_up = jiffies;</div><div class='del'>-	netdev_dbg(bond_dev, "Initial state of slave_dev is BOND_LINK_%s\n",</div><div class='del'>-		   new_slave-&gt;link == BOND_LINK_DOWN ? "DOWN" :</div><div class='del'>-		   (new_slave-&gt;link == BOND_LINK_UP ? "UP" : "BACK"));</div><div class='add'>+	slave_dbg(bond_dev, slave_dev, "Initial state of slave is BOND_LINK_%s\n",</div><div class='add'>+		  new_slave-&gt;link == BOND_LINK_DOWN ? "DOWN" :</div><div class='add'>+		  (new_slave-&gt;link == BOND_LINK_UP ? "UP" : "BACK"));</div><div class='ctx'> </div><div class='ctx'> 	if (bond_uses_primary(bond) &amp;&amp; bond-&gt;params.primary[0]) {</div><div class='ctx'> 		/* if there is a primary slave, remember it */</div><div class='hunk'>@@ -1613,7 +2085,7 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)</div><div class='ctx'> 			/* Initialize AD with the number of times that the AD timer is called in 1 second</div><div class='ctx'> 			 * can be called only after the mac address of the bond is set</div><div class='ctx'> 			 */</div><div class='del'>-			bond_3ad_initialize(bond, 1000/AD_TIMER_INTERVAL);</div><div class='add'>+			bond_3ad_initialize(bond);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			SLAVE_AD_INFO(new_slave)-&gt;id =</div><div class='ctx'> 				SLAVE_AD_INFO(prev_slave)-&gt;id + 1;</div><div class='hunk'>@@ -1627,7 +2099,7 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)</div><div class='ctx'> 		bond_set_slave_inactive_flags(new_slave, BOND_SLAVE_NOTIFY_NOW);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		netdev_dbg(bond_dev, "This slave is always active in trunk mode\n");</div><div class='add'>+		slave_dbg(bond_dev, slave_dev, "This slave is always active in trunk mode\n");</div><div class='ctx'> </div><div class='ctx'> 		/* always active in trunk mode */</div><div class='ctx'> 		bond_set_active_slave(new_slave);</div><div class='hunk'>@@ -1644,10 +2116,9 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)</div><div class='ctx'> 	} /* switch(bond_mode) */</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='del'>-	slave_dev-&gt;npinfo = bond-&gt;dev-&gt;npinfo;</div><div class='del'>-	if (slave_dev-&gt;npinfo) {</div><div class='add'>+	if (bond-&gt;dev-&gt;npinfo) {</div><div class='ctx'> 		if (slave_enable_netpoll(new_slave)) {</div><div class='del'>-			netdev_info(bond_dev, "master_dev is using netpoll, but new slave device does not support netpoll\n");</div><div class='add'>+			slave_info(bond_dev, slave_dev, "master_dev is using netpoll, but new slave device does not support netpoll\n");</div><div class='ctx'> 			res = -EBUSY;</div><div class='ctx'> 			goto err_detach;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1660,55 +2131,130 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)</div><div class='ctx'> 	res = netdev_rx_handler_register(slave_dev, bond_handle_frame,</div><div class='ctx'> 					 new_slave);</div><div class='ctx'> 	if (res) {</div><div class='del'>-		netdev_dbg(bond_dev, "Error %d calling netdev_rx_handler_register\n", res);</div><div class='add'>+		slave_dbg(bond_dev, slave_dev, "Error %d calling netdev_rx_handler_register\n", res);</div><div class='ctx'> 		goto err_detach;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	res = bond_master_upper_dev_link(bond_dev, slave_dev, new_slave);</div><div class='add'>+	res = bond_master_upper_dev_link(bond, new_slave, extack);</div><div class='ctx'> 	if (res) {</div><div class='del'>-		netdev_dbg(bond_dev, "Error %d calling bond_master_upper_dev_link\n", res);</div><div class='add'>+		slave_dbg(bond_dev, slave_dev, "Error %d calling bond_master_upper_dev_link\n", res);</div><div class='ctx'> 		goto err_unregister;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	bond_lower_state_changed(new_slave);</div><div class='add'>+</div><div class='ctx'> 	res = bond_sysfs_slave_add(new_slave);</div><div class='ctx'> 	if (res) {</div><div class='del'>-		netdev_dbg(bond_dev, "Error %d calling bond_sysfs_slave_add\n", res);</div><div class='add'>+		slave_dbg(bond_dev, slave_dev, "Error %d calling bond_sysfs_slave_add\n", res);</div><div class='ctx'> 		goto err_upper_unlink;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* If the mode uses primary, then the following is handled by</div><div class='add'>+	 * bond_change_active_slave().</div><div class='add'>+	 */</div><div class='add'>+	if (!bond_uses_primary(bond)) {</div><div class='add'>+		/* set promiscuity level to new slave */</div><div class='add'>+		if (bond_dev-&gt;flags &amp; IFF_PROMISC) {</div><div class='add'>+			res = dev_set_promiscuity(slave_dev, 1);</div><div class='add'>+			if (res)</div><div class='add'>+				goto err_sysfs_del;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* set allmulti level to new slave */</div><div class='add'>+		if (bond_dev-&gt;flags &amp; IFF_ALLMULTI) {</div><div class='add'>+			res = dev_set_allmulti(slave_dev, 1);</div><div class='add'>+			if (res) {</div><div class='add'>+				if (bond_dev-&gt;flags &amp; IFF_PROMISC)</div><div class='add'>+					dev_set_promiscuity(slave_dev, -1);</div><div class='add'>+				goto err_sysfs_del;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (bond_dev-&gt;flags &amp; IFF_UP) {</div><div class='add'>+			netif_addr_lock_bh(bond_dev);</div><div class='add'>+			dev_mc_sync_multiple(slave_dev, bond_dev);</div><div class='add'>+			dev_uc_sync_multiple(slave_dev, bond_dev);</div><div class='add'>+			netif_addr_unlock_bh(bond_dev);</div><div class='add'>+</div><div class='add'>+			if (BOND_MODE(bond) == BOND_MODE_8023AD)</div><div class='add'>+				dev_mc_add(slave_dev, lacpdu_mcast_addr);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	bond-&gt;slave_cnt++;</div><div class='del'>-	bond_compute_features(bond);</div><div class='add'>+	netdev_compute_master_upper_features(bond-&gt;dev, true);</div><div class='ctx'> 	bond_set_carrier(bond);</div><div class='ctx'> </div><div class='add'>+	/* Needs to be called before bond_select_active_slave(), which will</div><div class='add'>+	 * remove the maddrs if the slave is selected as active slave.</div><div class='add'>+	 */</div><div class='add'>+	bond_slave_ns_maddrs_add(bond, new_slave);</div><div class='add'>+</div><div class='ctx'> 	if (bond_uses_primary(bond)) {</div><div class='ctx'> 		block_netpoll_tx();</div><div class='ctx'> 		bond_select_active_slave(bond);</div><div class='ctx'> 		unblock_netpoll_tx();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (bond_mode_uses_xmit_hash(bond))</div><div class='add'>+	/* broadcast mode uses the all_slaves to loop through slaves. */</div><div class='add'>+	if (bond_mode_can_use_xmit_hash(bond) ||</div><div class='add'>+	    BOND_MODE(bond) == BOND_MODE_BROADCAST)</div><div class='ctx'> 		bond_update_slave_arr(bond, NULL);</div><div class='ctx'> </div><div class='del'>-	netdev_info(bond_dev, "Enslaving %s as %s interface with %s link\n",</div><div class='del'>-		    slave_dev-&gt;name,</div><div class='del'>-		    bond_is_active_slave(new_slave) ? "an active" : "a backup",</div><div class='del'>-		    new_slave-&gt;link != BOND_LINK_DOWN ? "an up" : "a down");</div><div class='add'>+	if (!slave_dev-&gt;netdev_ops-&gt;ndo_bpf ||</div><div class='add'>+	    !slave_dev-&gt;netdev_ops-&gt;ndo_xdp_xmit) {</div><div class='add'>+		if (bond-&gt;xdp_prog) {</div><div class='add'>+			SLAVE_NL_ERR(bond_dev, slave_dev, extack,</div><div class='add'>+				     "Slave does not support XDP");</div><div class='add'>+			res = -EOPNOTSUPP;</div><div class='add'>+			goto err_sysfs_del;</div><div class='add'>+		}</div><div class='add'>+	} else if (bond-&gt;xdp_prog) {</div><div class='add'>+		struct netdev_bpf xdp = {</div><div class='add'>+			.command = XDP_SETUP_PROG,</div><div class='add'>+			.flags   = 0,</div><div class='add'>+			.prog    = bond-&gt;xdp_prog,</div><div class='add'>+			.extack  = extack,</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+		if (dev_xdp_prog_count(slave_dev) &gt; 0) {</div><div class='add'>+			SLAVE_NL_ERR(bond_dev, slave_dev, extack,</div><div class='add'>+				     "Slave has XDP program loaded, please unload before enslaving");</div><div class='add'>+			res = -EOPNOTSUPP;</div><div class='add'>+			goto err_sysfs_del;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		res = dev_xdp_propagate(slave_dev, &amp;xdp);</div><div class='add'>+		if (res &lt; 0) {</div><div class='add'>+			/* ndo_bpf() sets extack error message */</div><div class='add'>+			slave_dbg(bond_dev, slave_dev, "Error %d calling ndo_bpf\n", res);</div><div class='add'>+			goto err_sysfs_del;</div><div class='add'>+		}</div><div class='add'>+		if (bond-&gt;xdp_prog)</div><div class='add'>+			bpf_prog_inc(bond-&gt;xdp_prog);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bond_xdp_set_features(bond_dev);</div><div class='add'>+</div><div class='add'>+	slave_info(bond_dev, slave_dev, "Enslaving as %s interface with %s link\n",</div><div class='add'>+		   bond_is_active_slave(new_slave) ? "an active" : "a backup",</div><div class='add'>+		   new_slave-&gt;link != BOND_LINK_DOWN ? "an up" : "a down");</div><div class='ctx'> </div><div class='ctx'> 	/* enslave is successful */</div><div class='ctx'> 	bond_queue_slave_event(new_slave);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> /* Undo stages on error */</div><div class='add'>+err_sysfs_del:</div><div class='add'>+	bond_sysfs_slave_del(new_slave);</div><div class='add'>+</div><div class='ctx'> err_upper_unlink:</div><div class='del'>-	bond_upper_dev_unlink(bond_dev, slave_dev);</div><div class='add'>+	bond_upper_dev_unlink(bond, new_slave);</div><div class='ctx'> </div><div class='ctx'> err_unregister:</div><div class='ctx'> 	netdev_rx_handler_unregister(slave_dev);</div><div class='ctx'> </div><div class='ctx'> err_detach:</div><div class='del'>-	if (!bond_uses_primary(bond))</div><div class='del'>-		bond_hw_addr_flush(bond_dev, slave_dev);</div><div class='del'>-</div><div class='ctx'> 	vlan_vids_del_by_dev(slave_dev, bond_dev);</div><div class='ctx'> 	if (rcu_access_pointer(bond-&gt;primary_slave) == new_slave)</div><div class='ctx'> 		RCU_INIT_POINTER(bond-&gt;primary_slave, NULL);</div><div class='hunk'>@@ -1723,26 +2269,29 @@ err_detach:</div><div class='ctx'> 	slave_disable_netpoll(new_slave);</div><div class='ctx'> </div><div class='ctx'> err_close:</div><div class='del'>-	slave_dev-&gt;priv_flags &amp;= ~IFF_BONDING;</div><div class='add'>+	if (!netif_is_bond_master(slave_dev))</div><div class='add'>+		slave_dev-&gt;priv_flags &amp;= ~IFF_BONDING;</div><div class='ctx'> 	dev_close(slave_dev);</div><div class='ctx'> </div><div class='ctx'> err_restore_mac:</div><div class='add'>+	slave_dev-&gt;priv_flags &amp;= ~IFF_NO_ADDRCONF;</div><div class='ctx'> 	if (!bond-&gt;params.fail_over_mac ||</div><div class='ctx'> 	    BOND_MODE(bond) != BOND_MODE_ACTIVEBACKUP) {</div><div class='ctx'> 		/* XXX TODO - fom follow mode needs to change master's</div><div class='ctx'> 		 * MAC if this slave's MAC is in use by the bond, or at</div><div class='ctx'> 		 * least print a warning.</div><div class='ctx'> 		 */</div><div class='del'>-		ether_addr_copy(addr.sa_data, new_slave-&gt;perm_hwaddr);</div><div class='del'>-		addr.sa_family = slave_dev-&gt;type;</div><div class='del'>-		dev_set_mac_address(slave_dev, &amp;addr);</div><div class='add'>+		bond_hw_addr_copy(ss.__data, new_slave-&gt;perm_hwaddr,</div><div class='add'>+				  new_slave-&gt;dev-&gt;addr_len);</div><div class='add'>+		ss.ss_family = slave_dev-&gt;type;</div><div class='add'>+		dev_set_mac_address(slave_dev, &amp;ss, NULL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> err_restore_mtu:</div><div class='ctx'> 	dev_set_mtu(slave_dev, new_slave-&gt;original_mtu);</div><div class='ctx'> </div><div class='ctx'> err_free:</div><div class='del'>-	bond_free_slave(new_slave);</div><div class='add'>+	kobject_put(&amp;new_slave-&gt;kobj);</div><div class='ctx'> </div><div class='ctx'> err_undo_flags:</div><div class='ctx'> 	/* Enslave of first slave has failed and we need to fix master's mac */</div><div class='hunk'>@@ -1751,9 +2300,8 @@ err_undo_flags:</div><div class='ctx'> 					    slave_dev-&gt;dev_addr))</div><div class='ctx'> 			eth_hw_addr_random(bond_dev);</div><div class='ctx'> 		if (bond_dev-&gt;type != ARPHRD_ETHER) {</div><div class='del'>-			ether_setup(bond_dev);</div><div class='del'>-			bond_dev-&gt;flags |= IFF_MASTER;</div><div class='del'>-			bond_dev-&gt;priv_flags &amp;= ~IFF_TX_SKB_SHARING;</div><div class='add'>+			dev_close(bond_dev);</div><div class='add'>+			bond_ether_setup(bond_dev);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1773,19 +2321,18 @@ err_undo_flags:</div><div class='ctx'>  */</div><div class='ctx'> static int __bond_release_one(struct net_device *bond_dev,</div><div class='ctx'> 			      struct net_device *slave_dev,</div><div class='del'>-			      bool all)</div><div class='add'>+			      bool all, bool unregister)</div><div class='ctx'> {</div><div class='ctx'> 	struct bonding *bond = netdev_priv(bond_dev);</div><div class='ctx'> 	struct slave *slave, *oldcurrent;</div><div class='del'>-	struct sockaddr addr;</div><div class='add'>+	struct sockaddr_storage ss;</div><div class='ctx'> 	int old_flags = bond_dev-&gt;flags;</div><div class='ctx'> 	netdev_features_t old_features = bond_dev-&gt;features;</div><div class='ctx'> </div><div class='ctx'> 	/* slave is not a slave or master is not master of this slave */</div><div class='ctx'> 	if (!(slave_dev-&gt;flags &amp; IFF_SLAVE) ||</div><div class='ctx'> 	    !netdev_has_upper_dev(slave_dev, bond_dev)) {</div><div class='del'>-		netdev_dbg(bond_dev, "cannot release %s\n",</div><div class='del'>-			   slave_dev-&gt;name);</div><div class='add'>+		slave_dbg(bond_dev, slave_dev, "cannot release slave\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1794,18 +2341,29 @@ static int __bond_release_one(struct net_device *bond_dev,</div><div class='ctx'> 	slave = bond_get_slave_by_dev(bond, slave_dev);</div><div class='ctx'> 	if (!slave) {</div><div class='ctx'> 		/* not a slave of this bond */</div><div class='del'>-		netdev_info(bond_dev, "%s not enslaved\n",</div><div class='del'>-			    slave_dev-&gt;name);</div><div class='add'>+		slave_info(bond_dev, slave_dev, "interface not enslaved\n");</div><div class='ctx'> 		unblock_netpoll_tx();</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	bond_set_slave_inactive_flags(slave, BOND_SLAVE_NOTIFY_NOW);</div><div class='add'>+</div><div class='ctx'> 	bond_sysfs_slave_del(slave);</div><div class='ctx'> </div><div class='ctx'> 	/* recompute stats just before removing the slave */</div><div class='ctx'> 	bond_get_stats(bond-&gt;dev, &amp;bond-&gt;bond_stats);</div><div class='ctx'> </div><div class='del'>-	bond_upper_dev_unlink(bond_dev, slave_dev);</div><div class='add'>+	if (bond-&gt;xdp_prog) {</div><div class='add'>+		struct netdev_bpf xdp = {</div><div class='add'>+			.command = XDP_SETUP_PROG,</div><div class='add'>+			.flags   = 0,</div><div class='add'>+			.prog	 = NULL,</div><div class='add'>+			.extack  = NULL,</div><div class='add'>+		};</div><div class='add'>+		if (dev_xdp_propagate(slave_dev, &amp;xdp))</div><div class='add'>+			slave_warn(bond_dev, slave_dev, "failed to unload XDP program\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* unregister rx_handler early so bond_handle_frame wouldn't be called</div><div class='ctx'> 	 * for this slave anymore.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -1814,24 +2372,25 @@ static int __bond_release_one(struct net_device *bond_dev,</div><div class='ctx'> 	if (BOND_MODE(bond) == BOND_MODE_8023AD)</div><div class='ctx'> 		bond_3ad_unbind_slave(slave);</div><div class='ctx'> </div><div class='del'>-	if (bond_mode_uses_xmit_hash(bond))</div><div class='add'>+	bond_upper_dev_unlink(bond, slave);</div><div class='add'>+</div><div class='add'>+	if (bond_mode_can_use_xmit_hash(bond) ||</div><div class='add'>+	    BOND_MODE(bond) == BOND_MODE_BROADCAST)</div><div class='ctx'> 		bond_update_slave_arr(bond, slave);</div><div class='ctx'> </div><div class='del'>-	netdev_info(bond_dev, "Releasing %s interface %s\n",</div><div class='del'>-		    bond_is_active_slave(slave) ? "active" : "backup",</div><div class='del'>-		    slave_dev-&gt;name);</div><div class='add'>+	slave_info(bond_dev, slave_dev, "Releasing %s interface\n",</div><div class='add'>+		    bond_is_active_slave(slave) ? "active" : "backup");</div><div class='ctx'> </div><div class='ctx'> 	oldcurrent = rcu_access_pointer(bond-&gt;curr_active_slave);</div><div class='ctx'> </div><div class='ctx'> 	RCU_INIT_POINTER(bond-&gt;current_arp_slave, NULL);</div><div class='ctx'> </div><div class='del'>-	if (!all &amp;&amp; (!bond-&gt;params.fail_over_mac ||</div><div class='add'>+	if (!all &amp;&amp; (bond-&gt;params.fail_over_mac != BOND_FOM_ACTIVE ||</div><div class='ctx'> 		     BOND_MODE(bond) != BOND_MODE_ACTIVEBACKUP)) {</div><div class='ctx'> 		if (ether_addr_equal_64bits(bond_dev-&gt;dev_addr, slave-&gt;perm_hwaddr) &amp;&amp;</div><div class='ctx'> 		    bond_has_slaves(bond))</div><div class='del'>-			netdev_warn(bond_dev, "the permanent HWaddr of %s - %pM - is still in use by %s - set the HWaddr of %s to a different address to avoid conflicts\n",</div><div class='del'>-				    slave_dev-&gt;name, slave-&gt;perm_hwaddr,</div><div class='del'>-				    bond_dev-&gt;name, slave_dev-&gt;name);</div><div class='add'>+			slave_warn(bond_dev, slave_dev, "the permanent HWaddr of slave - %pM - is still in use by bond - set the HWaddr of slave to a different address to avoid conflicts\n",</div><div class='add'>+				   slave-&gt;perm_hwaddr);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (rtnl_dereference(bond-&gt;primary_slave) == slave)</div><div class='hunk'>@@ -1840,6 +2399,12 @@ static int __bond_release_one(struct net_device *bond_dev,</div><div class='ctx'> 	if (oldcurrent == slave)</div><div class='ctx'> 		bond_change_active_slave(bond, NULL);</div><div class='ctx'> </div><div class='add'>+	/* Must be called after bond_change_active_slave () as the slave</div><div class='add'>+	 * might change from an active slave to a backup slave. Then it is</div><div class='add'>+	 * necessary to clear the maddrs on the backup slave.</div><div class='add'>+	 */</div><div class='add'>+	bond_slave_ns_maddrs_del(bond, slave);</div><div class='add'>+</div><div class='ctx'> 	if (bond_is_lb(bond)) {</div><div class='ctx'> 		/* Must be called only after the slave has been</div><div class='ctx'> 		 * detached from the list and the curr_active_slave</div><div class='hunk'>@@ -1859,10 +2424,9 @@ static int __bond_release_one(struct net_device *bond_dev,</div><div class='ctx'> 		bond_select_active_slave(bond);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!bond_has_slaves(bond)) {</div><div class='del'>-		bond_set_carrier(bond);</div><div class='add'>+	bond_set_carrier(bond);</div><div class='add'>+	if (!bond_has_slaves(bond))</div><div class='ctx'> 		eth_hw_addr_random(bond_dev);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	unblock_netpoll_tx();</div><div class='ctx'> 	synchronize_rcu();</div><div class='hunk'>@@ -1873,11 +2437,10 @@ static int __bond_release_one(struct net_device *bond_dev,</div><div class='ctx'> 		call_netdevice_notifiers(NETDEV_RELEASE, bond-&gt;dev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	bond_compute_features(bond);</div><div class='add'>+	netdev_compute_master_upper_features(bond-&gt;dev, true);</div><div class='ctx'> 	if (!(bond_dev-&gt;features &amp; NETIF_F_VLAN_CHALLENGED) &amp;&amp;</div><div class='ctx'> 	    (old_features &amp; NETIF_F_VLAN_CHALLENGED))</div><div class='del'>-		netdev_info(bond_dev, "last VLAN challenged slave %s left bond %s - VLAN blocking is removed\n",</div><div class='del'>-			    slave_dev-&gt;name, bond_dev-&gt;name);</div><div class='add'>+		slave_info(bond_dev, slave_dev, "last VLAN challenged slave left bond - VLAN blocking is removed\n");</div><div class='ctx'> </div><div class='ctx'> 	vlan_vids_del_by_dev(slave_dev, bond_dev);</div><div class='ctx'> </div><div class='hunk'>@@ -1899,7 +2462,8 @@ static int __bond_release_one(struct net_device *bond_dev,</div><div class='ctx'> 		if (old_flags &amp; IFF_ALLMULTI)</div><div class='ctx'> 			dev_set_allmulti(slave_dev, -1);</div><div class='ctx'> </div><div class='del'>-		bond_hw_addr_flush(bond_dev, slave_dev);</div><div class='add'>+		if (old_flags &amp; IFF_UP)</div><div class='add'>+			bond_hw_addr_flush(bond_dev, slave_dev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	slave_disable_netpoll(slave);</div><div class='hunk'>@@ -1907,19 +2471,30 @@ static int __bond_release_one(struct net_device *bond_dev,</div><div class='ctx'> 	/* close slave before restoring its mac address */</div><div class='ctx'> 	dev_close(slave_dev);</div><div class='ctx'> </div><div class='add'>+	slave_dev-&gt;priv_flags &amp;= ~IFF_NO_ADDRCONF;</div><div class='add'>+</div><div class='ctx'> 	if (bond-&gt;params.fail_over_mac != BOND_FOM_ACTIVE ||</div><div class='ctx'> 	    BOND_MODE(bond) != BOND_MODE_ACTIVEBACKUP) {</div><div class='ctx'> 		/* restore original ("permanent") mac address */</div><div class='del'>-		ether_addr_copy(addr.sa_data, slave-&gt;perm_hwaddr);</div><div class='del'>-		addr.sa_family = slave_dev-&gt;type;</div><div class='del'>-		dev_set_mac_address(slave_dev, &amp;addr);</div><div class='add'>+		bond_hw_addr_copy(ss.__data, slave-&gt;perm_hwaddr,</div><div class='add'>+				  slave-&gt;dev-&gt;addr_len);</div><div class='add'>+		ss.ss_family = slave_dev-&gt;type;</div><div class='add'>+		dev_set_mac_address(slave_dev, &amp;ss, NULL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dev_set_mtu(slave_dev, slave-&gt;original_mtu);</div><div class='add'>+	if (unregister) {</div><div class='add'>+		netdev_lock_ops(slave_dev);</div><div class='add'>+		__netif_set_mtu(slave_dev, slave-&gt;original_mtu);</div><div class='add'>+		netdev_unlock_ops(slave_dev);</div><div class='add'>+	} else {</div><div class='add'>+		dev_set_mtu(slave_dev, slave-&gt;original_mtu);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	slave_dev-&gt;priv_flags &amp;= ~IFF_BONDING;</div><div class='add'>+	if (!netif_is_bond_master(slave_dev))</div><div class='add'>+		slave_dev-&gt;priv_flags &amp;= ~IFF_BONDING;</div><div class='ctx'> </div><div class='del'>-	bond_free_slave(slave);</div><div class='add'>+	bond_xdp_set_features(bond_dev);</div><div class='add'>+	kobject_put(&amp;slave-&gt;kobj);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1927,34 +2502,34 @@ static int __bond_release_one(struct net_device *bond_dev,</div><div class='ctx'> /* A wrapper used because of ndo_del_link */</div><div class='ctx'> int bond_release(struct net_device *bond_dev, struct net_device *slave_dev)</div><div class='ctx'> {</div><div class='del'>-	return __bond_release_one(bond_dev, slave_dev, false);</div><div class='add'>+	return __bond_release_one(bond_dev, slave_dev, false, false);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* First release a slave and then destroy the bond if no more slaves are left.</div><div class='ctx'>  * Must be under rtnl_lock when this function is called.</div><div class='ctx'>  */</div><div class='del'>-static int  bond_release_and_destroy(struct net_device *bond_dev,</div><div class='del'>-				     struct net_device *slave_dev)</div><div class='add'>+static int bond_release_and_destroy(struct net_device *bond_dev,</div><div class='add'>+				    struct net_device *slave_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct bonding *bond = netdev_priv(bond_dev);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = bond_release(bond_dev, slave_dev);</div><div class='del'>-	if (ret == 0 &amp;&amp; !bond_has_slaves(bond)) {</div><div class='add'>+	ret = __bond_release_one(bond_dev, slave_dev, false, true);</div><div class='add'>+	if (ret == 0 &amp;&amp; !bond_has_slaves(bond) &amp;&amp;</div><div class='add'>+	    bond_dev-&gt;reg_state != NETREG_UNREGISTERING) {</div><div class='ctx'> 		bond_dev-&gt;priv_flags |= IFF_DISABLE_NETPOLL;</div><div class='del'>-		netdev_info(bond_dev, "Destroying bond %s\n",</div><div class='del'>-			    bond_dev-&gt;name);</div><div class='add'>+		netdev_info(bond_dev, "Destroying bond\n");</div><div class='ctx'> 		bond_remove_proc_entry(bond);</div><div class='ctx'> 		unregister_netdevice(bond_dev);</div><div class='ctx'> 	}</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int bond_info_query(struct net_device *bond_dev, struct ifbond *info)</div><div class='add'>+static void bond_info_query(struct net_device *bond_dev, struct ifbond *info)</div><div class='ctx'> {</div><div class='ctx'> 	struct bonding *bond = netdev_priv(bond_dev);</div><div class='add'>+</div><div class='ctx'> 	bond_fill_ifbond(bond, info);</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int bond_slave_info_query(struct net_device *bond_dev, struct ifslave *info)</div><div class='hunk'>@@ -1980,49 +2555,60 @@ static int bond_slave_info_query(struct net_device *bond_dev, struct ifslave *in</div><div class='ctx'> /* called with rcu_read_lock() */</div><div class='ctx'> static int bond_miimon_inspect(struct bonding *bond)</div><div class='ctx'> {</div><div class='add'>+	bool ignore_updelay = false;</div><div class='ctx'> 	int link_state, commit = 0;</div><div class='ctx'> 	struct list_head *iter;</div><div class='ctx'> 	struct slave *slave;</div><div class='del'>-	bool ignore_updelay;</div><div class='ctx'> </div><div class='del'>-	ignore_updelay = !rcu_dereference(bond-&gt;curr_active_slave);</div><div class='add'>+	if (BOND_MODE(bond) == BOND_MODE_ACTIVEBACKUP) {</div><div class='add'>+		ignore_updelay = !rcu_dereference(bond-&gt;curr_active_slave);</div><div class='add'>+	} else {</div><div class='add'>+		struct bond_up_slave *usable_slaves;</div><div class='add'>+</div><div class='add'>+		usable_slaves = rcu_dereference(bond-&gt;usable_slaves);</div><div class='add'>+</div><div class='add'>+		if (usable_slaves &amp;&amp; usable_slaves-&gt;count == 0)</div><div class='add'>+			ignore_updelay = true;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	bond_for_each_slave_rcu(bond, slave, iter) {</div><div class='del'>-		slave-&gt;new_link = BOND_LINK_NOCHANGE;</div><div class='add'>+		bond_propose_link_state(slave, BOND_LINK_NOCHANGE);</div><div class='ctx'> </div><div class='del'>-		link_state = bond_check_dev_link(bond, slave-&gt;dev, 0);</div><div class='add'>+		link_state = netif_running(slave-&gt;dev) &amp;&amp;</div><div class='add'>+			     netif_carrier_ok(slave-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 		switch (slave-&gt;link) {</div><div class='ctx'> 		case BOND_LINK_UP:</div><div class='ctx'> 			if (link_state)</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='del'>-			bond_set_slave_link_state(slave, BOND_LINK_FAIL);</div><div class='add'>+			bond_propose_link_state(slave, BOND_LINK_FAIL);</div><div class='add'>+			commit++;</div><div class='ctx'> 			slave-&gt;delay = bond-&gt;params.downdelay;</div><div class='del'>-			if (slave-&gt;delay) {</div><div class='del'>-				netdev_info(bond-&gt;dev, "link status down for %sinterface %s, disabling it in %d ms\n",</div><div class='del'>-					    (BOND_MODE(bond) ==</div><div class='del'>-					     BOND_MODE_ACTIVEBACKUP) ?</div><div class='del'>-					     (bond_is_active_slave(slave) ?</div><div class='del'>-					      "active " : "backup ") : "",</div><div class='del'>-					    slave-&gt;dev-&gt;name,</div><div class='del'>-					    bond-&gt;params.downdelay * bond-&gt;params.miimon);</div><div class='add'>+			if (slave-&gt;delay &amp;&amp; net_ratelimit()) {</div><div class='add'>+				slave_info(bond-&gt;dev, slave-&gt;dev, "link status down for %sinterface, disabling it in %d ms\n",</div><div class='add'>+					   (BOND_MODE(bond) ==</div><div class='add'>+					    BOND_MODE_ACTIVEBACKUP) ?</div><div class='add'>+					    (bond_is_active_slave(slave) ?</div><div class='add'>+					     "active " : "backup ") : "",</div><div class='add'>+					   bond-&gt;params.downdelay * bond-&gt;params.miimon);</div><div class='ctx'> 			}</div><div class='del'>-			/*FALLTHRU*/</div><div class='add'>+			fallthrough;</div><div class='ctx'> 		case BOND_LINK_FAIL:</div><div class='ctx'> 			if (link_state) {</div><div class='ctx'> 				/* recovered before downdelay expired */</div><div class='del'>-				bond_set_slave_link_state(slave, BOND_LINK_UP);</div><div class='add'>+				bond_propose_link_state(slave, BOND_LINK_UP);</div><div class='ctx'> 				slave-&gt;last_link_up = jiffies;</div><div class='del'>-				netdev_info(bond-&gt;dev, "link status up again after %d ms for interface %s\n",</div><div class='del'>-					    (bond-&gt;params.downdelay - slave-&gt;delay) *</div><div class='del'>-					    bond-&gt;params.miimon,</div><div class='del'>-					    slave-&gt;dev-&gt;name);</div><div class='add'>+				if (net_ratelimit())</div><div class='add'>+					slave_info(bond-&gt;dev, slave-&gt;dev, "link status up again after %d ms\n",</div><div class='add'>+						   (bond-&gt;params.downdelay - slave-&gt;delay) *</div><div class='add'>+						   bond-&gt;params.miimon);</div><div class='add'>+				commit++;</div><div class='ctx'> 				continue;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			if (slave-&gt;delay &lt;= 0) {</div><div class='del'>-				slave-&gt;new_link = BOND_LINK_DOWN;</div><div class='add'>+				bond_propose_link_state(slave, BOND_LINK_DOWN);</div><div class='ctx'> 				commit++;</div><div class='ctx'> 				continue;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -2034,26 +2620,25 @@ static int bond_miimon_inspect(struct bonding *bond)</div><div class='ctx'> 			if (!link_state)</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='del'>-			bond_set_slave_link_state(slave, BOND_LINK_BACK);</div><div class='add'>+			bond_propose_link_state(slave, BOND_LINK_BACK);</div><div class='add'>+			commit++;</div><div class='ctx'> 			slave-&gt;delay = bond-&gt;params.updelay;</div><div class='ctx'> </div><div class='del'>-			if (slave-&gt;delay) {</div><div class='del'>-				netdev_info(bond-&gt;dev, "link status up for interface %s, enabling it in %d ms\n",</div><div class='del'>-					    slave-&gt;dev-&gt;name,</div><div class='del'>-					    ignore_updelay ? 0 :</div><div class='del'>-					    bond-&gt;params.updelay *</div><div class='del'>-					    bond-&gt;params.miimon);</div><div class='add'>+			if (slave-&gt;delay &amp;&amp; net_ratelimit()) {</div><div class='add'>+				slave_info(bond-&gt;dev, slave-&gt;dev, "link status up, enabling it in %d ms\n",</div><div class='add'>+					   ignore_updelay ? 0 :</div><div class='add'>+					   bond-&gt;params.updelay *</div><div class='add'>+					   bond-&gt;params.miimon);</div><div class='ctx'> 			}</div><div class='del'>-			/*FALLTHRU*/</div><div class='add'>+			fallthrough;</div><div class='ctx'> 		case BOND_LINK_BACK:</div><div class='ctx'> 			if (!link_state) {</div><div class='del'>-				bond_set_slave_link_state(slave,</div><div class='del'>-							  BOND_LINK_DOWN);</div><div class='del'>-				netdev_info(bond-&gt;dev, "link status down again after %d ms for interface %s\n",</div><div class='del'>-					    (bond-&gt;params.updelay - slave-&gt;delay) *</div><div class='del'>-					    bond-&gt;params.miimon,</div><div class='del'>-					    slave-&gt;dev-&gt;name);</div><div class='del'>-</div><div class='add'>+				bond_propose_link_state(slave, BOND_LINK_DOWN);</div><div class='add'>+				if (net_ratelimit())</div><div class='add'>+					slave_info(bond-&gt;dev, slave-&gt;dev, "link status down again after %d ms\n",</div><div class='add'>+						   (bond-&gt;params.updelay - slave-&gt;delay) *</div><div class='add'>+						   bond-&gt;params.miimon);</div><div class='add'>+				commit++;</div><div class='ctx'> 				continue;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='hunk'>@@ -2061,7 +2646,7 @@ static int bond_miimon_inspect(struct bonding *bond)</div><div class='ctx'> 				slave-&gt;delay = 0;</div><div class='ctx'> </div><div class='ctx'> 			if (slave-&gt;delay &lt;= 0) {</div><div class='del'>-				slave-&gt;new_link = BOND_LINK_UP;</div><div class='add'>+				bond_propose_link_state(slave, BOND_LINK_UP);</div><div class='ctx'> 				commit++;</div><div class='ctx'> 				ignore_updelay = false;</div><div class='ctx'> 				continue;</div><div class='hunk'>@@ -2075,18 +2660,57 @@ static int bond_miimon_inspect(struct bonding *bond)</div><div class='ctx'> 	return commit;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void bond_miimon_link_change(struct bonding *bond,</div><div class='add'>+				    struct slave *slave,</div><div class='add'>+				    char link)</div><div class='add'>+{</div><div class='add'>+	switch (BOND_MODE(bond)) {</div><div class='add'>+	case BOND_MODE_8023AD:</div><div class='add'>+		bond_3ad_handle_link_change(slave, link);</div><div class='add'>+		break;</div><div class='add'>+	case BOND_MODE_TLB:</div><div class='add'>+	case BOND_MODE_ALB:</div><div class='add'>+		bond_alb_handle_link_change(bond, slave, link);</div><div class='add'>+		break;</div><div class='add'>+	case BOND_MODE_XOR:</div><div class='add'>+		bond_update_slave_arr(bond, NULL);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void bond_miimon_commit(struct bonding *bond)</div><div class='ctx'> {</div><div class='add'>+	struct slave *slave, *primary, *active;</div><div class='add'>+	bool do_failover = false;</div><div class='ctx'> 	struct list_head *iter;</div><div class='del'>-	struct slave *slave, *primary;</div><div class='add'>+</div><div class='add'>+	ASSERT_RTNL();</div><div class='ctx'> </div><div class='ctx'> 	bond_for_each_slave(bond, slave, iter) {</div><div class='del'>-		switch (slave-&gt;new_link) {</div><div class='add'>+		switch (slave-&gt;link_new_state) {</div><div class='ctx'> 		case BOND_LINK_NOCHANGE:</div><div class='add'>+			/* For 802.3ad mode, check current slave speed and</div><div class='add'>+			 * duplex again in case its port was disabled after</div><div class='add'>+			 * invalid speed/duplex reporting but recovered before</div><div class='add'>+			 * link monitoring could make a decision on the actual</div><div class='add'>+			 * link status</div><div class='add'>+			 */</div><div class='add'>+			if (BOND_MODE(bond) == BOND_MODE_8023AD &amp;&amp;</div><div class='add'>+			    slave-&gt;link == BOND_LINK_UP)</div><div class='add'>+				bond_3ad_adapter_speed_duplex_changed(slave);</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		case BOND_LINK_UP:</div><div class='del'>-			bond_set_slave_link_state(slave, BOND_LINK_UP);</div><div class='add'>+			if (bond_update_speed_duplex(slave) &amp;&amp;</div><div class='add'>+			    bond_needs_speed_duplex(bond)) {</div><div class='add'>+				slave-&gt;link = BOND_LINK_DOWN;</div><div class='add'>+				if (net_ratelimit())</div><div class='add'>+					slave_warn(bond-&gt;dev, slave-&gt;dev,</div><div class='add'>+						   "failed to get link speed/duplex\n");</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+			bond_set_slave_link_state(slave, BOND_LINK_UP,</div><div class='add'>+						  BOND_SLAVE_NOTIFY_NOW);</div><div class='ctx'> 			slave-&gt;last_link_up = jiffies;</div><div class='ctx'> </div><div class='ctx'> 			primary = rtnl_dereference(bond-&gt;primary_slave);</div><div class='hunk'>@@ -2096,29 +2720,17 @@ static void bond_miimon_commit(struct bonding *bond)</div><div class='ctx'> 			} else if (BOND_MODE(bond) != BOND_MODE_ACTIVEBACKUP) {</div><div class='ctx'> 				/* make it immediately active */</div><div class='ctx'> 				bond_set_active_slave(slave);</div><div class='del'>-			} else if (slave != primary) {</div><div class='del'>-				/* prevent it from being the active one */</div><div class='del'>-				bond_set_backup_slave(slave);</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			netdev_info(bond-&gt;dev, "link status definitely up for interface %s, %u Mbps %s duplex\n",</div><div class='del'>-				    slave-&gt;dev-&gt;name,</div><div class='del'>-				    slave-&gt;speed == SPEED_UNKNOWN ? 0 : slave-&gt;speed,</div><div class='del'>-				    slave-&gt;duplex ? "full" : "half");</div><div class='add'>+			slave_info(bond-&gt;dev, slave-&gt;dev, "link status definitely up, %u Mbps %s duplex\n",</div><div class='add'>+				   slave-&gt;speed == SPEED_UNKNOWN ? 0 : slave-&gt;speed,</div><div class='add'>+				   slave-&gt;duplex ? "full" : "half");</div><div class='ctx'> </div><div class='del'>-			/* notify ad that the link status has changed */</div><div class='del'>-			if (BOND_MODE(bond) == BOND_MODE_8023AD)</div><div class='del'>-				bond_3ad_handle_link_change(slave, BOND_LINK_UP);</div><div class='add'>+			bond_miimon_link_change(bond, slave, BOND_LINK_UP);</div><div class='ctx'> </div><div class='del'>-			if (bond_is_lb(bond))</div><div class='del'>-				bond_alb_handle_link_change(bond, slave,</div><div class='del'>-							    BOND_LINK_UP);</div><div class='del'>-</div><div class='del'>-			if (BOND_MODE(bond) == BOND_MODE_XOR)</div><div class='del'>-				bond_update_slave_arr(bond, NULL);</div><div class='del'>-</div><div class='del'>-			if (!bond-&gt;curr_active_slave || slave == primary)</div><div class='del'>-				goto do_failover;</div><div class='add'>+			active = rtnl_dereference(bond-&gt;curr_active_slave);</div><div class='add'>+			if (!active || slave == primary || slave-&gt;prio &gt; active-&gt;prio)</div><div class='add'>+				do_failover = true;</div><div class='ctx'> </div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='hunk'>@@ -2126,41 +2738,33 @@ static void bond_miimon_commit(struct bonding *bond)</div><div class='ctx'> 			if (slave-&gt;link_failure_count &lt; UINT_MAX)</div><div class='ctx'> 				slave-&gt;link_failure_count++;</div><div class='ctx'> </div><div class='del'>-			bond_set_slave_link_state(slave, BOND_LINK_DOWN);</div><div class='add'>+			bond_set_slave_link_state(slave, BOND_LINK_DOWN,</div><div class='add'>+						  BOND_SLAVE_NOTIFY_NOW);</div><div class='ctx'> </div><div class='ctx'> 			if (BOND_MODE(bond) == BOND_MODE_ACTIVEBACKUP ||</div><div class='ctx'> 			    BOND_MODE(bond) == BOND_MODE_8023AD)</div><div class='ctx'> 				bond_set_slave_inactive_flags(slave,</div><div class='ctx'> 							      BOND_SLAVE_NOTIFY_NOW);</div><div class='ctx'> </div><div class='del'>-			netdev_info(bond-&gt;dev, "link status definitely down for interface %s, disabling it\n",</div><div class='del'>-				    slave-&gt;dev-&gt;name);</div><div class='add'>+			slave_info(bond-&gt;dev, slave-&gt;dev, "link status definitely down, disabling slave\n");</div><div class='ctx'> </div><div class='del'>-			if (BOND_MODE(bond) == BOND_MODE_8023AD)</div><div class='del'>-				bond_3ad_handle_link_change(slave,</div><div class='del'>-							    BOND_LINK_DOWN);</div><div class='del'>-</div><div class='del'>-			if (bond_is_lb(bond))</div><div class='del'>-				bond_alb_handle_link_change(bond, slave,</div><div class='del'>-							    BOND_LINK_DOWN);</div><div class='del'>-</div><div class='del'>-			if (BOND_MODE(bond) == BOND_MODE_XOR)</div><div class='del'>-				bond_update_slave_arr(bond, NULL);</div><div class='add'>+			bond_miimon_link_change(bond, slave, BOND_LINK_DOWN);</div><div class='ctx'> </div><div class='ctx'> 			if (slave == rcu_access_pointer(bond-&gt;curr_active_slave))</div><div class='del'>-				goto do_failover;</div><div class='add'>+				do_failover = true;</div><div class='ctx'> </div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		default:</div><div class='del'>-			netdev_err(bond-&gt;dev, "invalid new link %d on slave %s\n",</div><div class='del'>-				   slave-&gt;new_link, slave-&gt;dev-&gt;name);</div><div class='del'>-			slave-&gt;new_link = BOND_LINK_NOCHANGE;</div><div class='add'>+			slave_err(bond-&gt;dev, slave-&gt;dev, "invalid new link %d on slave\n",</div><div class='add'>+				  slave-&gt;link_new_state);</div><div class='add'>+			bond_propose_link_state(slave, BOND_LINK_NOCHANGE);</div><div class='ctx'> </div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-do_failover:</div><div class='add'>+	if (do_failover) {</div><div class='ctx'> 		block_netpoll_tx();</div><div class='ctx'> 		bond_select_active_slave(bond);</div><div class='ctx'> 		unblock_netpoll_tx();</div><div class='hunk'>@@ -2180,8 +2784,11 @@ static void bond_mii_monitor(struct work_struct *work)</div><div class='ctx'> {</div><div class='ctx'> 	struct bonding *bond = container_of(work, struct bonding,</div><div class='ctx'> 					    mii_work.work);</div><div class='del'>-	bool should_notify_peers = false;</div><div class='add'>+	bool should_notify_peers;</div><div class='add'>+	bool commit;</div><div class='ctx'> 	unsigned long delay;</div><div class='add'>+	struct slave *slave;</div><div class='add'>+	struct list_head *iter;</div><div class='ctx'> </div><div class='ctx'> 	delay = msecs_to_jiffies(bond-&gt;params.miimon);</div><div class='ctx'> </div><div class='hunk'>@@ -2191,111 +2798,137 @@ static void bond_mii_monitor(struct work_struct *work)</div><div class='ctx'> 	rcu_read_lock();</div><div class='ctx'> </div><div class='ctx'> 	should_notify_peers = bond_should_notify_peers(bond);</div><div class='add'>+	commit = !!bond_miimon_inspect(bond);</div><div class='ctx'> </div><div class='del'>-	if (bond_miimon_inspect(bond)) {</div><div class='del'>-		rcu_read_unlock();</div><div class='add'>+	rcu_read_unlock();</div><div class='ctx'> </div><div class='add'>+	if (commit || bond-&gt;send_peer_notif) {</div><div class='ctx'> 		/* Race avoidance with bond_close cancel of workqueue */</div><div class='ctx'> 		if (!rtnl_trylock()) {</div><div class='ctx'> 			delay = 1;</div><div class='del'>-			should_notify_peers = false;</div><div class='ctx'> 			goto re_arm;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		bond_miimon_commit(bond);</div><div class='add'>+		if (commit) {</div><div class='add'>+			bond_for_each_slave(bond, slave, iter) {</div><div class='add'>+				bond_commit_link_state(slave,</div><div class='add'>+						       BOND_SLAVE_NOTIFY_LATER);</div><div class='add'>+			}</div><div class='add'>+			bond_miimon_commit(bond);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (bond-&gt;send_peer_notif) {</div><div class='add'>+			bond-&gt;send_peer_notif--;</div><div class='add'>+			if (should_notify_peers)</div><div class='add'>+				call_netdevice_notifiers(NETDEV_NOTIFY_PEERS,</div><div class='add'>+							 bond-&gt;dev);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		rtnl_unlock();	/* might sleep, hold no other locks */</div><div class='del'>-	} else</div><div class='del'>-		rcu_read_unlock();</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> re_arm:</div><div class='ctx'> 	if (bond-&gt;params.miimon)</div><div class='ctx'> 		queue_delayed_work(bond-&gt;wq, &amp;bond-&gt;mii_work, delay);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	if (should_notify_peers) {</div><div class='del'>-		if (!rtnl_trylock())</div><div class='del'>-			return;</div><div class='del'>-		call_netdevice_notifiers(NETDEV_NOTIFY_PEERS, bond-&gt;dev);</div><div class='del'>-		rtnl_unlock();</div><div class='del'>-	}</div><div class='add'>+static int bond_upper_dev_walk(struct net_device *upper,</div><div class='add'>+			       struct netdev_nested_priv *priv)</div><div class='add'>+{</div><div class='add'>+	__be32 ip = *(__be32 *)priv-&gt;data;</div><div class='add'>+</div><div class='add'>+	return ip == bond_confirm_addr(upper, 0, ip);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool bond_has_this_ip(struct bonding *bond, __be32 ip)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *upper;</div><div class='del'>-	struct list_head *iter;</div><div class='add'>+	struct netdev_nested_priv priv = {</div><div class='add'>+		.data = (void *)&amp;ip,</div><div class='add'>+	};</div><div class='ctx'> 	bool ret = false;</div><div class='ctx'> </div><div class='ctx'> 	if (ip == bond_confirm_addr(bond-&gt;dev, 0, ip))</div><div class='ctx'> 		return true;</div><div class='ctx'> </div><div class='ctx'> 	rcu_read_lock();</div><div class='del'>-	netdev_for_each_all_upper_dev_rcu(bond-&gt;dev, upper, iter) {</div><div class='del'>-		if (ip == bond_confirm_addr(upper, 0, ip)) {</div><div class='del'>-			ret = true;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	if (netdev_walk_all_upper_dev_rcu(bond-&gt;dev, bond_upper_dev_walk, &amp;priv))</div><div class='add'>+		ret = true;</div><div class='ctx'> 	rcu_read_unlock();</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* We go to the (large) trouble of VLAN tagging ARP frames because</div><div class='del'>- * switches in VLAN mode (especially if ports are configured as</div><div class='del'>- * "native" to a VLAN) might not pass non-tagged frames.</div><div class='del'>- */</div><div class='del'>-static void bond_arp_send(struct net_device *slave_dev, int arp_op,</div><div class='del'>-			  __be32 dest_ip, __be32 src_ip,</div><div class='del'>-			  struct bond_vlan_tag *tags)</div><div class='add'>+#define BOND_VLAN_PROTO_NONE cpu_to_be16(0xffff)</div><div class='add'>+</div><div class='add'>+static bool bond_handle_vlan(struct slave *slave, struct bond_vlan_tag *tags,</div><div class='add'>+			     struct sk_buff *skb)</div><div class='ctx'> {</div><div class='del'>-	struct sk_buff *skb;</div><div class='add'>+	struct net_device *bond_dev = slave-&gt;bond-&gt;dev;</div><div class='add'>+	struct net_device *slave_dev = slave-&gt;dev;</div><div class='ctx'> 	struct bond_vlan_tag *outer_tag = tags;</div><div class='ctx'> </div><div class='del'>-	netdev_dbg(slave_dev, "arp %d on slave %s: dst %pI4 src %pI4\n",</div><div class='del'>-		   arp_op, slave_dev-&gt;name, &amp;dest_ip, &amp;src_ip);</div><div class='del'>-</div><div class='del'>-	skb = arp_create(arp_op, ETH_P_ARP, dest_ip, slave_dev, src_ip,</div><div class='del'>-			 NULL, slave_dev-&gt;dev_addr, NULL);</div><div class='del'>-</div><div class='del'>-	if (!skb) {</div><div class='del'>-		net_err_ratelimited("ARP packet allocation failed\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!tags || tags-&gt;vlan_proto == VLAN_N_VID)</div><div class='del'>-		goto xmit;</div><div class='add'>+	if (!tags || tags-&gt;vlan_proto == BOND_VLAN_PROTO_NONE)</div><div class='add'>+		return true;</div><div class='ctx'> </div><div class='ctx'> 	tags++;</div><div class='ctx'> </div><div class='ctx'> 	/* Go through all the tags backwards and add them to the packet */</div><div class='del'>-	while (tags-&gt;vlan_proto != VLAN_N_VID) {</div><div class='add'>+	while (tags-&gt;vlan_proto != BOND_VLAN_PROTO_NONE) {</div><div class='ctx'> 		if (!tags-&gt;vlan_id) {</div><div class='ctx'> 			tags++;</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		netdev_dbg(slave_dev, "inner tag: proto %X vid %X\n",</div><div class='del'>-			   ntohs(outer_tag-&gt;vlan_proto), tags-&gt;vlan_id);</div><div class='add'>+		slave_dbg(bond_dev, slave_dev, "inner tag: proto %X vid %X\n",</div><div class='add'>+			  ntohs(outer_tag-&gt;vlan_proto), tags-&gt;vlan_id);</div><div class='ctx'> 		skb = vlan_insert_tag_set_proto(skb, tags-&gt;vlan_proto,</div><div class='ctx'> 						tags-&gt;vlan_id);</div><div class='ctx'> 		if (!skb) {</div><div class='ctx'> 			net_err_ratelimited("failed to insert inner VLAN tag\n");</div><div class='del'>-			return;</div><div class='add'>+			return false;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		tags++;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Set the outer tag */</div><div class='ctx'> 	if (outer_tag-&gt;vlan_id) {</div><div class='del'>-		netdev_dbg(slave_dev, "outer tag: proto %X vid %X\n",</div><div class='del'>-			   ntohs(outer_tag-&gt;vlan_proto), outer_tag-&gt;vlan_id);</div><div class='add'>+		slave_dbg(bond_dev, slave_dev, "outer tag: proto %X vid %X\n",</div><div class='add'>+			  ntohs(outer_tag-&gt;vlan_proto), outer_tag-&gt;vlan_id);</div><div class='ctx'> 		__vlan_hwaccel_put_tag(skb, outer_tag-&gt;vlan_proto,</div><div class='ctx'> 				       outer_tag-&gt;vlan_id);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-xmit:</div><div class='del'>-	arp_xmit(skb);</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* We go to the (large) trouble of VLAN tagging ARP frames because</div><div class='add'>+ * switches in VLAN mode (especially if ports are configured as</div><div class='add'>+ * "native" to a VLAN) might not pass non-tagged frames.</div><div class='add'>+ */</div><div class='add'>+static void bond_arp_send(struct slave *slave, int arp_op, __be32 dest_ip,</div><div class='add'>+			  __be32 src_ip, struct bond_vlan_tag *tags)</div><div class='add'>+{</div><div class='add'>+	struct net_device *bond_dev = slave-&gt;bond-&gt;dev;</div><div class='add'>+	struct net_device *slave_dev = slave-&gt;dev;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	slave_dbg(bond_dev, slave_dev, "arp %d on slave: dst %pI4 src %pI4\n",</div><div class='add'>+		  arp_op, &amp;dest_ip, &amp;src_ip);</div><div class='add'>+</div><div class='add'>+	skb = arp_create(arp_op, ETH_P_ARP, dest_ip, slave_dev, src_ip,</div><div class='add'>+			 NULL, slave_dev-&gt;dev_addr, NULL);</div><div class='add'>+</div><div class='add'>+	if (!skb) {</div><div class='add'>+		net_err_ratelimited("ARP packet allocation failed\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (bond_handle_vlan(slave, tags, skb)) {</div><div class='add'>+		slave_update_last_tx(slave);</div><div class='add'>+		arp_xmit(skb);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Validate the device path between the @start_dev and the @end_dev.</div><div class='hunk'>@@ -2313,10 +2946,10 @@ struct bond_vlan_tag *bond_verify_device_path(struct net_device *start_dev,</div><div class='ctx'> 	struct list_head  *iter;</div><div class='ctx'> </div><div class='ctx'> 	if (start_dev == end_dev) {</div><div class='del'>-		tags = kzalloc(sizeof(*tags) * (level + 1), GFP_ATOMIC);</div><div class='add'>+		tags = kcalloc(level + 1, sizeof(*tags), GFP_ATOMIC);</div><div class='ctx'> 		if (!tags)</div><div class='ctx'> 			return ERR_PTR(-ENOMEM);</div><div class='del'>-		tags[level].vlan_proto = VLAN_N_VID;</div><div class='add'>+		tags[level].vlan_proto = BOND_VLAN_PROTO_NONE;</div><div class='ctx'> 		return tags;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2346,21 +2979,22 @@ static void bond_arp_send_all(struct bonding *bond, struct slave *slave)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; BOND_MAX_ARP_TARGETS &amp;&amp; targets[i]; i++) {</div><div class='del'>-		netdev_dbg(bond-&gt;dev, "basa: target %pI4\n", &amp;targets[i]);</div><div class='add'>+		slave_dbg(bond-&gt;dev, slave-&gt;dev, "%s: target %pI4\n",</div><div class='add'>+			  __func__, &amp;targets[i]);</div><div class='ctx'> 		tags = NULL;</div><div class='ctx'> </div><div class='ctx'> 		/* Find out through which dev should the packet go */</div><div class='del'>-		rt = ip_route_output(dev_net(bond-&gt;dev), targets[i], 0,</div><div class='del'>-				     RTO_ONLINK, 0);</div><div class='add'>+		rt = ip_route_output(dev_net(bond-&gt;dev), targets[i], 0, 0, 0,</div><div class='add'>+				     RT_SCOPE_LINK);</div><div class='ctx'> 		if (IS_ERR(rt)) {</div><div class='ctx'> 			/* there's no route to target - try to send arp</div><div class='ctx'> 			 * probe to generate any traffic (arp_validate=0)</div><div class='ctx'> 			 */</div><div class='ctx'> 			if (bond-&gt;params.arp_validate)</div><div class='del'>-				net_warn_ratelimited("%s: no route to arp_ip_target %pI4 and arp_validate is set\n",</div><div class='del'>-						     bond-&gt;dev-&gt;name,</div><div class='del'>-						     &amp;targets[i]);</div><div class='del'>-			bond_arp_send(slave-&gt;dev, ARPOP_REQUEST, targets[i],</div><div class='add'>+				pr_warn_once("%s: no route to arp_ip_target %pI4 and arp_validate is set\n",</div><div class='add'>+					     bond-&gt;dev-&gt;name,</div><div class='add'>+					     &amp;targets[i]);</div><div class='add'>+			bond_arp_send(slave, ARPOP_REQUEST, targets[i],</div><div class='ctx'> 				      0, tags);</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -2377,7 +3011,7 @@ static void bond_arp_send_all(struct bonding *bond, struct slave *slave)</div><div class='ctx'> 			goto found;</div><div class='ctx'> </div><div class='ctx'> 		/* Not our device - skip */</div><div class='del'>-		netdev_dbg(bond-&gt;dev, "no path to arp_ip_target %pI4 via rt.dev %s\n",</div><div class='add'>+		slave_dbg(bond-&gt;dev, slave-&gt;dev, "no path to arp_ip_target %pI4 via rt.dev %s\n",</div><div class='ctx'> 			   &amp;targets[i], rt-&gt;dst.dev ? rt-&gt;dst.dev-&gt;name : "NULL");</div><div class='ctx'> </div><div class='ctx'> 		ip_rt_put(rt);</div><div class='hunk'>@@ -2386,8 +3020,7 @@ static void bond_arp_send_all(struct bonding *bond, struct slave *slave)</div><div class='ctx'> found:</div><div class='ctx'> 		addr = bond_confirm_addr(rt-&gt;dst.dev, targets[i], 0);</div><div class='ctx'> 		ip_rt_put(rt);</div><div class='del'>-		bond_arp_send(slave-&gt;dev, ARPOP_REQUEST, targets[i],</div><div class='del'>-			      addr, tags);</div><div class='add'>+		bond_arp_send(slave, ARPOP_REQUEST, targets[i], addr, tags);</div><div class='ctx'> 		kfree(tags);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -2397,44 +3030,32 @@ static void bond_validate_arp(struct bonding *bond, struct slave *slave, __be32</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (!sip || !bond_has_this_ip(bond, tip)) {</div><div class='del'>-		netdev_dbg(bond-&gt;dev, "bva: sip %pI4 tip %pI4 not found\n",</div><div class='del'>-			   &amp;sip, &amp;tip);</div><div class='add'>+		slave_dbg(bond-&gt;dev, slave-&gt;dev, "%s: sip %pI4 tip %pI4 not found\n",</div><div class='add'>+			   __func__, &amp;sip, &amp;tip);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	i = bond_get_targets_ip(bond-&gt;params.arp_targets, sip);</div><div class='ctx'> 	if (i == -1) {</div><div class='del'>-		netdev_dbg(bond-&gt;dev, "bva: sip %pI4 not found in targets\n",</div><div class='del'>-			   &amp;sip);</div><div class='add'>+		slave_dbg(bond-&gt;dev, slave-&gt;dev, "%s: sip %pI4 not found in targets\n",</div><div class='add'>+			   __func__, &amp;sip);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	slave-&gt;last_rx = jiffies;</div><div class='ctx'> 	slave-&gt;target_last_arp_rx[i] = jiffies;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-int bond_arp_rcv(const struct sk_buff *skb, struct bonding *bond,</div><div class='del'>-		 struct slave *slave)</div><div class='add'>+static int bond_arp_rcv(const struct sk_buff *skb, struct bonding *bond,</div><div class='add'>+			struct slave *slave)</div><div class='ctx'> {</div><div class='ctx'> 	struct arphdr *arp = (struct arphdr *)skb-&gt;data;</div><div class='del'>-	struct slave *curr_active_slave;</div><div class='add'>+	struct slave *curr_active_slave, *curr_arp_slave;</div><div class='ctx'> 	unsigned char *arp_ptr;</div><div class='ctx'> 	__be32 sip, tip;</div><div class='del'>-	int alen, is_arp = skb-&gt;protocol == __cpu_to_be16(ETH_P_ARP);</div><div class='del'>-</div><div class='del'>-	if (!slave_do_arp_validate(bond, slave)) {</div><div class='del'>-		if ((slave_do_arp_validate_only(bond) &amp;&amp; is_arp) ||</div><div class='del'>-		    !slave_do_arp_validate_only(bond))</div><div class='del'>-			slave-&gt;last_rx = jiffies;</div><div class='del'>-		return RX_HANDLER_ANOTHER;</div><div class='del'>-	} else if (!is_arp) {</div><div class='del'>-		return RX_HANDLER_ANOTHER;</div><div class='del'>-	}</div><div class='add'>+	unsigned int alen;</div><div class='ctx'> </div><div class='ctx'> 	alen = arp_hdr_len(bond-&gt;dev);</div><div class='ctx'> </div><div class='del'>-	netdev_dbg(bond-&gt;dev, "bond_arp_rcv: skb-&gt;dev %s\n",</div><div class='del'>-		   skb-&gt;dev-&gt;name);</div><div class='del'>-</div><div class='ctx'> 	if (alen &gt; skb_headlen(skb)) {</div><div class='ctx'> 		arp = kmalloc(alen, GFP_ATOMIC);</div><div class='ctx'> 		if (!arp)</div><div class='hunk'>@@ -2457,32 +3078,46 @@ int bond_arp_rcv(const struct sk_buff *skb, struct bonding *bond,</div><div class='ctx'> 	arp_ptr += 4 + bond-&gt;dev-&gt;addr_len;</div><div class='ctx'> 	memcpy(&amp;tip, arp_ptr, 4);</div><div class='ctx'> </div><div class='del'>-	netdev_dbg(bond-&gt;dev, "bond_arp_rcv: %s/%d av %d sv %d sip %pI4 tip %pI4\n",</div><div class='del'>-		   slave-&gt;dev-&gt;name, bond_slave_state(slave),</div><div class='del'>-		     bond-&gt;params.arp_validate, slave_do_arp_validate(bond, slave),</div><div class='del'>-		     &amp;sip, &amp;tip);</div><div class='add'>+	slave_dbg(bond-&gt;dev, slave-&gt;dev, "%s: %s/%d av %d sv %d sip %pI4 tip %pI4\n",</div><div class='add'>+		  __func__, slave-&gt;dev-&gt;name, bond_slave_state(slave),</div><div class='add'>+		  bond-&gt;params.arp_validate, slave_do_arp_validate(bond, slave),</div><div class='add'>+		  &amp;sip, &amp;tip);</div><div class='ctx'> </div><div class='ctx'> 	curr_active_slave = rcu_dereference(bond-&gt;curr_active_slave);</div><div class='add'>+	curr_arp_slave = rcu_dereference(bond-&gt;current_arp_slave);</div><div class='ctx'> </div><div class='del'>-	/* Backup slaves won't see the ARP reply, but do come through</div><div class='del'>-	 * here for each ARP probe (so we swap the sip/tip to validate</div><div class='del'>-	 * the probe).  In a "redundant switch, common router" type of</div><div class='del'>-	 * configuration, the ARP probe will (hopefully) travel from</div><div class='del'>-	 * the active, through one switch, the router, then the other</div><div class='del'>-	 * switch before reaching the backup.</div><div class='add'>+	/* We 'trust' the received ARP enough to validate it if:</div><div class='add'>+	 *</div><div class='add'>+	 * (a) the slave receiving the ARP is active (which includes the</div><div class='add'>+	 * current ARP slave, if any), or</div><div class='add'>+	 *</div><div class='add'>+	 * (b) the receiving slave isn't active, but there is a currently</div><div class='add'>+	 * active slave and it received valid arp reply(s) after it became</div><div class='add'>+	 * the currently active slave, or</div><div class='ctx'> 	 *</div><div class='del'>-	 * We 'trust' the arp requests if there is an active slave and</div><div class='del'>-	 * it received valid arp reply(s) after it became active. This</div><div class='del'>-	 * is done to avoid endless looping when we can't reach the</div><div class='add'>+	 * (c) there is an ARP slave that sent an ARP during the prior ARP</div><div class='add'>+	 * interval, and we receive an ARP reply on any slave.  We accept</div><div class='add'>+	 * these because switch FDB update delays may deliver the ARP</div><div class='add'>+	 * reply to a slave other than the sender of the ARP request.</div><div class='add'>+	 *</div><div class='add'>+	 * Note: for (b), backup slaves are receiving the broadcast ARP</div><div class='add'>+	 * request, not a reply.  This request passes from the sending</div><div class='add'>+	 * slave through the L2 switch(es) to the receiving slave.  Since</div><div class='add'>+	 * this is checking the request, sip/tip are swapped for</div><div class='add'>+	 * validation.</div><div class='add'>+	 *</div><div class='add'>+	 * This is done to avoid endless looping when we can't reach the</div><div class='ctx'> 	 * arp_ip_target and fool ourselves with our own arp requests.</div><div class='ctx'> 	 */</div><div class='del'>-</div><div class='ctx'> 	if (bond_is_active_slave(slave))</div><div class='ctx'> 		bond_validate_arp(bond, slave, sip, tip);</div><div class='ctx'> 	else if (curr_active_slave &amp;&amp;</div><div class='ctx'> 		 time_after(slave_last_rx(bond, curr_active_slave),</div><div class='ctx'> 			    curr_active_slave-&gt;last_link_up))</div><div class='ctx'> 		bond_validate_arp(bond, slave, tip, sip);</div><div class='add'>+	else if (curr_arp_slave &amp;&amp; (arp-&gt;ar_op == htons(ARPOP_REPLY)) &amp;&amp;</div><div class='add'>+		 bond_time_in_interval(bond, slave_last_tx(curr_arp_slave), 1))</div><div class='add'>+		bond_validate_arp(bond, slave, sip, tip);</div><div class='ctx'> </div><div class='ctx'> out_unlock:</div><div class='ctx'> 	if (arp != (struct arphdr *)skb-&gt;data)</div><div class='hunk'>@@ -2490,6 +3125,234 @@ out_unlock:</div><div class='ctx'> 	return RX_HANDLER_ANOTHER;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+static void bond_ns_send(struct slave *slave, const struct in6_addr *daddr,</div><div class='add'>+			 const struct in6_addr *saddr, struct bond_vlan_tag *tags)</div><div class='add'>+{</div><div class='add'>+	struct net_device *bond_dev = slave-&gt;bond-&gt;dev;</div><div class='add'>+	struct net_device *slave_dev = slave-&gt;dev;</div><div class='add'>+	struct in6_addr mcaddr;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	slave_dbg(bond_dev, slave_dev, "NS on slave: dst %pI6c src %pI6c\n",</div><div class='add'>+		  daddr, saddr);</div><div class='add'>+</div><div class='add'>+	skb = ndisc_ns_create(slave_dev, daddr, saddr, 0);</div><div class='add'>+	if (!skb) {</div><div class='add'>+		net_err_ratelimited("NS packet allocation failed\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	addrconf_addr_solict_mult(daddr, &amp;mcaddr);</div><div class='add'>+	if (bond_handle_vlan(slave, tags, skb)) {</div><div class='add'>+		slave_update_last_tx(slave);</div><div class='add'>+		ndisc_send_skb(skb, &amp;mcaddr, saddr);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bond_ns_send_all(struct bonding *bond, struct slave *slave)</div><div class='add'>+{</div><div class='add'>+	struct in6_addr *targets = bond-&gt;params.ns_targets;</div><div class='add'>+	struct bond_vlan_tag *tags;</div><div class='add'>+	struct dst_entry *dst;</div><div class='add'>+	struct in6_addr saddr;</div><div class='add'>+	struct flowi6 fl6;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; BOND_MAX_NS_TARGETS &amp;&amp; !ipv6_addr_any(&amp;targets[i]); i++) {</div><div class='add'>+		slave_dbg(bond-&gt;dev, slave-&gt;dev, "%s: target %pI6c\n",</div><div class='add'>+			  __func__, &amp;targets[i]);</div><div class='add'>+		tags = NULL;</div><div class='add'>+</div><div class='add'>+		/* Find out through which dev should the packet go */</div><div class='add'>+		memset(&amp;fl6, 0, sizeof(struct flowi6));</div><div class='add'>+		fl6.daddr = targets[i];</div><div class='add'>+</div><div class='add'>+		dst = ip6_route_output(dev_net(bond-&gt;dev), NULL, &amp;fl6);</div><div class='add'>+		if (dst-&gt;error) {</div><div class='add'>+			dst_release(dst);</div><div class='add'>+			/* there's no route to target - try to send arp</div><div class='add'>+			 * probe to generate any traffic (arp_validate=0)</div><div class='add'>+			 */</div><div class='add'>+			if (bond-&gt;params.arp_validate)</div><div class='add'>+				pr_warn_once("%s: no route to ns_ip6_target %pI6c and arp_validate is set\n",</div><div class='add'>+					     bond-&gt;dev-&gt;name,</div><div class='add'>+					     &amp;targets[i]);</div><div class='add'>+			bond_ns_send(slave, &amp;targets[i], &amp;in6addr_any, tags);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* bond device itself */</div><div class='add'>+		if (dst-&gt;dev == bond-&gt;dev)</div><div class='add'>+			goto found;</div><div class='add'>+</div><div class='add'>+		rcu_read_lock();</div><div class='add'>+		tags = bond_verify_device_path(bond-&gt;dev, dst-&gt;dev, 0);</div><div class='add'>+		rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+		if (!IS_ERR_OR_NULL(tags))</div><div class='add'>+			goto found;</div><div class='add'>+</div><div class='add'>+		/* Not our device - skip */</div><div class='add'>+		slave_dbg(bond-&gt;dev, slave-&gt;dev, "no path to ns_ip6_target %pI6c via dst-&gt;dev %s\n",</div><div class='add'>+			  &amp;targets[i], dst-&gt;dev ? dst-&gt;dev-&gt;name : "NULL");</div><div class='add'>+</div><div class='add'>+		dst_release(dst);</div><div class='add'>+		continue;</div><div class='add'>+</div><div class='add'>+found:</div><div class='add'>+		if (!ipv6_dev_get_saddr(dev_net(dst-&gt;dev), dst-&gt;dev, &amp;targets[i], 0, &amp;saddr))</div><div class='add'>+			bond_ns_send(slave, &amp;targets[i], &amp;saddr, tags);</div><div class='add'>+		else</div><div class='add'>+			bond_ns_send(slave, &amp;targets[i], &amp;in6addr_any, tags);</div><div class='add'>+</div><div class='add'>+		dst_release(dst);</div><div class='add'>+		kfree(tags);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bond_confirm_addr6(struct net_device *dev,</div><div class='add'>+			      struct netdev_nested_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct in6_addr *addr = (struct in6_addr *)priv-&gt;data;</div><div class='add'>+</div><div class='add'>+	return ipv6_chk_addr(dev_net(dev), addr, dev, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool bond_has_this_ip6(struct bonding *bond, struct in6_addr *addr)</div><div class='add'>+{</div><div class='add'>+	struct netdev_nested_priv priv = {</div><div class='add'>+		.data = addr,</div><div class='add'>+	};</div><div class='add'>+	int ret = false;</div><div class='add'>+</div><div class='add'>+	if (bond_confirm_addr6(bond-&gt;dev, &amp;priv))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	if (netdev_walk_all_upper_dev_rcu(bond-&gt;dev, bond_confirm_addr6, &amp;priv))</div><div class='add'>+		ret = true;</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bond_validate_na(struct bonding *bond, struct slave *slave,</div><div class='add'>+			     struct in6_addr *saddr, struct in6_addr *daddr)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Ignore NAs that:</div><div class='add'>+	 * 1. Source address is unspecified address.</div><div class='add'>+	 * 2. Dest address is neither all-nodes multicast address nor</div><div class='add'>+	 *    exist on bond interface.</div><div class='add'>+	 */</div><div class='add'>+	if (ipv6_addr_any(saddr) ||</div><div class='add'>+	    (!ipv6_addr_equal(daddr, &amp;in6addr_linklocal_allnodes) &amp;&amp;</div><div class='add'>+	     !bond_has_this_ip6(bond, daddr))) {</div><div class='add'>+		slave_dbg(bond-&gt;dev, slave-&gt;dev, "%s: sip %pI6c tip %pI6c not found\n",</div><div class='add'>+			  __func__, saddr, daddr);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	i = bond_get_targets_ip6(bond-&gt;params.ns_targets, saddr);</div><div class='add'>+	if (i == -1) {</div><div class='add'>+		slave_dbg(bond-&gt;dev, slave-&gt;dev, "%s: sip %pI6c not found in targets\n",</div><div class='add'>+			  __func__, saddr);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	slave-&gt;last_rx = jiffies;</div><div class='add'>+	slave-&gt;target_last_arp_rx[i] = jiffies;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bond_na_rcv(const struct sk_buff *skb, struct bonding *bond,</div><div class='add'>+		       struct slave *slave)</div><div class='add'>+{</div><div class='add'>+	struct slave *curr_active_slave, *curr_arp_slave;</div><div class='add'>+	struct in6_addr *saddr, *daddr;</div><div class='add'>+	struct {</div><div class='add'>+		struct ipv6hdr ip6;</div><div class='add'>+		struct icmp6hdr icmp6;</div><div class='add'>+	} *combined, _combined;</div><div class='add'>+</div><div class='add'>+	if (skb-&gt;pkt_type == PACKET_OTHERHOST ||</div><div class='add'>+	    skb-&gt;pkt_type == PACKET_LOOPBACK)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	combined = skb_header_pointer(skb, 0, sizeof(_combined), &amp;_combined);</div><div class='add'>+	if (!combined || combined-&gt;ip6.nexthdr != NEXTHDR_ICMP ||</div><div class='add'>+	    (combined-&gt;icmp6.icmp6_type != NDISC_NEIGHBOUR_SOLICITATION &amp;&amp;</div><div class='add'>+	     combined-&gt;icmp6.icmp6_type != NDISC_NEIGHBOUR_ADVERTISEMENT))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	saddr = &amp;combined-&gt;ip6.saddr;</div><div class='add'>+	daddr = &amp;combined-&gt;ip6.daddr;</div><div class='add'>+</div><div class='add'>+	slave_dbg(bond-&gt;dev, slave-&gt;dev, "%s: %s/%d av %d sv %d sip %pI6c tip %pI6c\n",</div><div class='add'>+		  __func__, slave-&gt;dev-&gt;name, bond_slave_state(slave),</div><div class='add'>+		  bond-&gt;params.arp_validate, slave_do_arp_validate(bond, slave),</div><div class='add'>+		  saddr, daddr);</div><div class='add'>+</div><div class='add'>+	curr_active_slave = rcu_dereference(bond-&gt;curr_active_slave);</div><div class='add'>+	curr_arp_slave = rcu_dereference(bond-&gt;current_arp_slave);</div><div class='add'>+</div><div class='add'>+	/* We 'trust' the received ARP enough to validate it if:</div><div class='add'>+	 * see bond_arp_rcv().</div><div class='add'>+	 */</div><div class='add'>+	if (bond_is_active_slave(slave))</div><div class='add'>+		bond_validate_na(bond, slave, saddr, daddr);</div><div class='add'>+	else if (curr_active_slave &amp;&amp;</div><div class='add'>+		 time_after(slave_last_rx(bond, curr_active_slave),</div><div class='add'>+			    curr_active_slave-&gt;last_link_up))</div><div class='add'>+		bond_validate_na(bond, slave, daddr, saddr);</div><div class='add'>+	else if (curr_arp_slave &amp;&amp;</div><div class='add'>+		 bond_time_in_interval(bond, slave_last_tx(curr_arp_slave), 1))</div><div class='add'>+		bond_validate_na(bond, slave, saddr, daddr);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return RX_HANDLER_ANOTHER;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+int bond_rcv_validate(const struct sk_buff *skb, struct bonding *bond,</div><div class='add'>+		      struct slave *slave)</div><div class='add'>+{</div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+	bool is_ipv6 = skb-&gt;protocol == __cpu_to_be16(ETH_P_IPV6);</div><div class='add'>+#endif</div><div class='add'>+	bool is_arp = skb-&gt;protocol == __cpu_to_be16(ETH_P_ARP);</div><div class='add'>+</div><div class='add'>+	slave_dbg(bond-&gt;dev, slave-&gt;dev, "%s: skb-&gt;dev %s\n",</div><div class='add'>+		  __func__, skb-&gt;dev-&gt;name);</div><div class='add'>+</div><div class='add'>+	/* Use arp validate logic for both ARP and NS */</div><div class='add'>+	if (!slave_do_arp_validate(bond, slave)) {</div><div class='add'>+		if ((slave_do_arp_validate_only(bond) &amp;&amp; is_arp) ||</div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+		    (slave_do_arp_validate_only(bond) &amp;&amp; is_ipv6) ||</div><div class='add'>+#endif</div><div class='add'>+		    !slave_do_arp_validate_only(bond))</div><div class='add'>+			slave-&gt;last_rx = jiffies;</div><div class='add'>+		return RX_HANDLER_ANOTHER;</div><div class='add'>+	} else if (is_arp) {</div><div class='add'>+		return bond_arp_rcv(skb, bond, slave);</div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+	} else if (is_ipv6) {</div><div class='add'>+		return bond_na_rcv(skb, bond, slave);</div><div class='add'>+#endif</div><div class='add'>+	} else {</div><div class='add'>+		return RX_HANDLER_ANOTHER;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bond_send_validate(struct bonding *bond, struct slave *slave)</div><div class='add'>+{</div><div class='add'>+	bond_arp_send_all(bond, slave);</div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+	bond_ns_send_all(bond, slave);</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* function to verify if we're in the arp_interval timeslice, returns true if</div><div class='ctx'>  * (last_act - arp_interval) &lt;= jiffies &lt;= (last_act + mod * arp_interval +</div><div class='ctx'>  * arp_interval/2) . the arp_interval/2 is needed for really fast networks.</div><div class='hunk'>@@ -2510,10 +3373,8 @@ static bool bond_time_in_interval(struct bonding *bond, unsigned long last_act,</div><div class='ctx'>  * arp is transmitted to generate traffic. see activebackup_arp_monitor for</div><div class='ctx'>  * arp monitoring in active backup mode.</div><div class='ctx'>  */</div><div class='del'>-static void bond_loadbalance_arp_mon(struct work_struct *work)</div><div class='add'>+static void bond_loadbalance_arp_mon(struct bonding *bond)</div><div class='ctx'> {</div><div class='del'>-	struct bonding *bond = container_of(work, struct bonding,</div><div class='del'>-					    arp_work.work);</div><div class='ctx'> 	struct slave *slave, *oldcurrent;</div><div class='ctx'> 	struct list_head *iter;</div><div class='ctx'> 	int do_failover = 0, slave_state_changed = 0;</div><div class='hunk'>@@ -2533,13 +3394,15 @@ static void bond_loadbalance_arp_mon(struct work_struct *work)</div><div class='ctx'> 	 *       so it can wait</div><div class='ctx'> 	 */</div><div class='ctx'> 	bond_for_each_slave_rcu(bond, slave, iter) {</div><div class='del'>-		unsigned long trans_start = dev_trans_start(slave-&gt;dev);</div><div class='add'>+		unsigned long last_tx = slave_last_tx(slave);</div><div class='add'>+</div><div class='add'>+		bond_propose_link_state(slave, BOND_LINK_NOCHANGE);</div><div class='ctx'> </div><div class='ctx'> 		if (slave-&gt;link != BOND_LINK_UP) {</div><div class='del'>-			if (bond_time_in_interval(bond, trans_start, 1) &amp;&amp;</div><div class='add'>+			if (bond_time_in_interval(bond, last_tx, 1) &amp;&amp;</div><div class='ctx'> 			    bond_time_in_interval(bond, slave-&gt;last_rx, 1)) {</div><div class='ctx'> </div><div class='del'>-				slave-&gt;link  = BOND_LINK_UP;</div><div class='add'>+				bond_propose_link_state(slave, BOND_LINK_UP);</div><div class='ctx'> 				slave_state_changed = 1;</div><div class='ctx'> </div><div class='ctx'> 				/* primary_slave has no meaning in round-robin</div><div class='hunk'>@@ -2548,12 +3411,10 @@ static void bond_loadbalance_arp_mon(struct work_struct *work)</div><div class='ctx'> 				 * is closed.</div><div class='ctx'> 				 */</div><div class='ctx'> 				if (!oldcurrent) {</div><div class='del'>-					netdev_info(bond-&gt;dev, "link status definitely up for interface %s\n",</div><div class='del'>-						    slave-&gt;dev-&gt;name);</div><div class='add'>+					slave_info(bond-&gt;dev, slave-&gt;dev, "link status definitely up\n");</div><div class='ctx'> 					do_failover = 1;</div><div class='ctx'> 				} else {</div><div class='del'>-					netdev_info(bond-&gt;dev, "interface %s is now up\n",</div><div class='del'>-						    slave-&gt;dev-&gt;name);</div><div class='add'>+					slave_info(bond-&gt;dev, slave-&gt;dev, "interface is now up\n");</div><div class='ctx'> 				}</div><div class='ctx'> 			}</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -2563,17 +3424,16 @@ static void bond_loadbalance_arp_mon(struct work_struct *work)</div><div class='ctx'> 			 * when the source ip is 0, so don't take the link down</div><div class='ctx'> 			 * if we don't know our ip yet</div><div class='ctx'> 			 */</div><div class='del'>-			if (!bond_time_in_interval(bond, trans_start, 2) ||</div><div class='del'>-			    !bond_time_in_interval(bond, slave-&gt;last_rx, 2)) {</div><div class='add'>+			if (!bond_time_in_interval(bond, last_tx, bond-&gt;params.missed_max) ||</div><div class='add'>+			    !bond_time_in_interval(bond, slave-&gt;last_rx, bond-&gt;params.missed_max)) {</div><div class='ctx'> </div><div class='del'>-				slave-&gt;link  = BOND_LINK_DOWN;</div><div class='add'>+				bond_propose_link_state(slave, BOND_LINK_DOWN);</div><div class='ctx'> 				slave_state_changed = 1;</div><div class='ctx'> </div><div class='ctx'> 				if (slave-&gt;link_failure_count &lt; UINT_MAX)</div><div class='ctx'> 					slave-&gt;link_failure_count++;</div><div class='ctx'> </div><div class='del'>-				netdev_info(bond-&gt;dev, "interface %s is now down\n",</div><div class='del'>-					    slave-&gt;dev-&gt;name);</div><div class='add'>+				slave_info(bond-&gt;dev, slave-&gt;dev, "interface is now down\n");</div><div class='ctx'> </div><div class='ctx'> 				if (slave == oldcurrent)</div><div class='ctx'> 					do_failover = 1;</div><div class='hunk'>@@ -2588,7 +3448,7 @@ static void bond_loadbalance_arp_mon(struct work_struct *work)</div><div class='ctx'> 		 * to be unstable during low/no traffic periods</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (bond_slave_is_up(slave))</div><div class='del'>-			bond_arp_send_all(bond, slave);</div><div class='add'>+			bond_send_validate(bond, slave);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	rcu_read_unlock();</div><div class='hunk'>@@ -2597,6 +3457,11 @@ static void bond_loadbalance_arp_mon(struct work_struct *work)</div><div class='ctx'> 		if (!rtnl_trylock())</div><div class='ctx'> 			goto re_arm;</div><div class='ctx'> </div><div class='add'>+		bond_for_each_slave(bond, slave, iter) {</div><div class='add'>+			if (slave-&gt;link_new_state != BOND_LINK_NOCHANGE)</div><div class='add'>+				slave-&gt;link = slave-&gt;link_new_state;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		if (slave_state_changed) {</div><div class='ctx'> 			bond_slave_state_change(bond);</div><div class='ctx'> 			if (BOND_MODE(bond) == BOND_MODE_XOR)</div><div class='hunk'>@@ -2617,26 +3482,29 @@ re_arm:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Called to inspect slaves for active-backup mode ARP monitor link state</div><div class='del'>- * changes.  Sets new_link in slaves to specify what action should take</div><div class='del'>- * place for the slave.  Returns 0 if no changes are found, &gt;0 if changes</div><div class='del'>- * to link states must be committed.</div><div class='add'>+ * changes.  Sets proposed link state in slaves to specify what action</div><div class='add'>+ * should take place for the slave.  Returns 0 if no changes are found, &gt;0</div><div class='add'>+ * if changes to link states must be committed.</div><div class='ctx'>  *</div><div class='ctx'>  * Called with rcu_read_lock held.</div><div class='ctx'>  */</div><div class='ctx'> static int bond_ab_arp_inspect(struct bonding *bond)</div><div class='ctx'> {</div><div class='del'>-	unsigned long trans_start, last_rx;</div><div class='add'>+	unsigned long last_tx, last_rx;</div><div class='ctx'> 	struct list_head *iter;</div><div class='ctx'> 	struct slave *slave;</div><div class='ctx'> 	int commit = 0;</div><div class='ctx'> </div><div class='ctx'> 	bond_for_each_slave_rcu(bond, slave, iter) {</div><div class='del'>-		slave-&gt;new_link = BOND_LINK_NOCHANGE;</div><div class='add'>+		bond_propose_link_state(slave, BOND_LINK_NOCHANGE);</div><div class='ctx'> 		last_rx = slave_last_rx(bond, slave);</div><div class='ctx'> </div><div class='ctx'> 		if (slave-&gt;link != BOND_LINK_UP) {</div><div class='ctx'> 			if (bond_time_in_interval(bond, last_rx, 1)) {</div><div class='del'>-				slave-&gt;new_link = BOND_LINK_UP;</div><div class='add'>+				bond_propose_link_state(slave, BOND_LINK_UP);</div><div class='add'>+				commit++;</div><div class='add'>+			} else if (slave-&gt;link == BOND_LINK_BACK) {</div><div class='add'>+				bond_propose_link_state(slave, BOND_LINK_FAIL);</div><div class='ctx'> 				commit++;</div><div class='ctx'> 			}</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -2651,7 +3519,7 @@ static int bond_ab_arp_inspect(struct bonding *bond)</div><div class='ctx'> </div><div class='ctx'> 		/* Backup slave is down if:</div><div class='ctx'> 		 * - No current_arp_slave AND</div><div class='del'>-		 * - more than 3*delta since last receive AND</div><div class='add'>+		 * - more than (missed_max+1)*delta since last receive AND</div><div class='ctx'> 		 * - the bond has an IP address</div><div class='ctx'> 		 *</div><div class='ctx'> 		 * Note: a non-null current_arp_slave indicates</div><div class='hunk'>@@ -2663,21 +3531,21 @@ static int bond_ab_arp_inspect(struct bonding *bond)</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (!bond_is_active_slave(slave) &amp;&amp;</div><div class='ctx'> 		    !rcu_access_pointer(bond-&gt;current_arp_slave) &amp;&amp;</div><div class='del'>-		    !bond_time_in_interval(bond, last_rx, 3)) {</div><div class='del'>-			slave-&gt;new_link = BOND_LINK_DOWN;</div><div class='add'>+		    !bond_time_in_interval(bond, last_rx, bond-&gt;params.missed_max + 1)) {</div><div class='add'>+			bond_propose_link_state(slave, BOND_LINK_DOWN);</div><div class='ctx'> 			commit++;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Active slave is down if:</div><div class='del'>-		 * - more than 2*delta since transmitting OR</div><div class='del'>-		 * - (more than 2*delta since receive AND</div><div class='add'>+		 * - more than missed_max*delta since transmitting OR</div><div class='add'>+		 * - (more than missed_max*delta since receive AND</div><div class='ctx'> 		 *    the bond has an IP address)</div><div class='ctx'> 		 */</div><div class='del'>-		trans_start = dev_trans_start(slave-&gt;dev);</div><div class='add'>+		last_tx = slave_last_tx(slave);</div><div class='ctx'> 		if (bond_is_active_slave(slave) &amp;&amp;</div><div class='del'>-		    (!bond_time_in_interval(bond, trans_start, 2) ||</div><div class='del'>-		     !bond_time_in_interval(bond, last_rx, 2))) {</div><div class='del'>-			slave-&gt;new_link = BOND_LINK_DOWN;</div><div class='add'>+		    (!bond_time_in_interval(bond, last_tx, bond-&gt;params.missed_max) ||</div><div class='add'>+		     !bond_time_in_interval(bond, last_rx, bond-&gt;params.missed_max))) {</div><div class='add'>+			bond_propose_link_state(slave, BOND_LINK_DOWN);</div><div class='ctx'> 			commit++;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2692,24 +3560,26 @@ static int bond_ab_arp_inspect(struct bonding *bond)</div><div class='ctx'>  */</div><div class='ctx'> static void bond_ab_arp_commit(struct bonding *bond)</div><div class='ctx'> {</div><div class='del'>-	unsigned long trans_start;</div><div class='add'>+	bool do_failover = false;</div><div class='ctx'> 	struct list_head *iter;</div><div class='add'>+	unsigned long last_tx;</div><div class='ctx'> 	struct slave *slave;</div><div class='ctx'> </div><div class='ctx'> 	bond_for_each_slave(bond, slave, iter) {</div><div class='del'>-		switch (slave-&gt;new_link) {</div><div class='add'>+		switch (slave-&gt;link_new_state) {</div><div class='ctx'> 		case BOND_LINK_NOCHANGE:</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='ctx'> 		case BOND_LINK_UP:</div><div class='del'>-			trans_start = dev_trans_start(slave-&gt;dev);</div><div class='add'>+			last_tx = slave_last_tx(slave);</div><div class='ctx'> 			if (rtnl_dereference(bond-&gt;curr_active_slave) != slave ||</div><div class='ctx'> 			    (!rtnl_dereference(bond-&gt;curr_active_slave) &amp;&amp;</div><div class='del'>-			     bond_time_in_interval(bond, trans_start, 1))) {</div><div class='add'>+			     bond_time_in_interval(bond, last_tx, 1))) {</div><div class='ctx'> 				struct slave *current_arp_slave;</div><div class='ctx'> </div><div class='ctx'> 				current_arp_slave = rtnl_dereference(bond-&gt;current_arp_slave);</div><div class='del'>-				bond_set_slave_link_state(slave, BOND_LINK_UP);</div><div class='add'>+				bond_set_slave_link_state(slave, BOND_LINK_UP,</div><div class='add'>+							  BOND_SLAVE_NOTIFY_NOW);</div><div class='ctx'> 				if (current_arp_slave) {</div><div class='ctx'> 					bond_set_slave_inactive_flags(</div><div class='ctx'> 						current_arp_slave,</div><div class='hunk'>@@ -2717,12 +3587,12 @@ static void bond_ab_arp_commit(struct bonding *bond)</div><div class='ctx'> 					RCU_INIT_POINTER(bond-&gt;current_arp_slave, NULL);</div><div class='ctx'> 				}</div><div class='ctx'> </div><div class='del'>-				netdev_info(bond-&gt;dev, "link status definitely up for interface %s\n",</div><div class='del'>-					    slave-&gt;dev-&gt;name);</div><div class='add'>+				slave_info(bond-&gt;dev, slave-&gt;dev, "link status definitely up\n");</div><div class='ctx'> </div><div class='ctx'> 				if (!rtnl_dereference(bond-&gt;curr_active_slave) ||</div><div class='del'>-				    slave == rtnl_dereference(bond-&gt;primary_slave))</div><div class='del'>-					goto do_failover;</div><div class='add'>+				    slave == rtnl_dereference(bond-&gt;primary_slave) ||</div><div class='add'>+				    slave-&gt;prio &gt; rtnl_dereference(bond-&gt;curr_active_slave)-&gt;prio)</div><div class='add'>+					do_failover = true;</div><div class='ctx'> </div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='hunk'>@@ -2732,27 +3602,42 @@ static void bond_ab_arp_commit(struct bonding *bond)</div><div class='ctx'> 			if (slave-&gt;link_failure_count &lt; UINT_MAX)</div><div class='ctx'> 				slave-&gt;link_failure_count++;</div><div class='ctx'> </div><div class='del'>-			bond_set_slave_link_state(slave, BOND_LINK_DOWN);</div><div class='add'>+			bond_set_slave_link_state(slave, BOND_LINK_DOWN,</div><div class='add'>+						  BOND_SLAVE_NOTIFY_NOW);</div><div class='ctx'> 			bond_set_slave_inactive_flags(slave,</div><div class='ctx'> 						      BOND_SLAVE_NOTIFY_NOW);</div><div class='ctx'> </div><div class='del'>-			netdev_info(bond-&gt;dev, "link status definitely down for interface %s, disabling it\n",</div><div class='del'>-				    slave-&gt;dev-&gt;name);</div><div class='add'>+			slave_info(bond-&gt;dev, slave-&gt;dev, "link status definitely down, disabling slave\n");</div><div class='ctx'> </div><div class='ctx'> 			if (slave == rtnl_dereference(bond-&gt;curr_active_slave)) {</div><div class='ctx'> 				RCU_INIT_POINTER(bond-&gt;current_arp_slave, NULL);</div><div class='del'>-				goto do_failover;</div><div class='add'>+				do_failover = true;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='add'>+		case BOND_LINK_FAIL:</div><div class='add'>+			bond_set_slave_link_state(slave, BOND_LINK_FAIL,</div><div class='add'>+						  BOND_SLAVE_NOTIFY_NOW);</div><div class='add'>+			bond_set_slave_inactive_flags(slave,</div><div class='add'>+						      BOND_SLAVE_NOTIFY_NOW);</div><div class='add'>+</div><div class='add'>+			/* A slave has just been enslaved and has become</div><div class='add'>+			 * the current active slave.</div><div class='add'>+			 */</div><div class='add'>+			if (rtnl_dereference(bond-&gt;curr_active_slave))</div><div class='add'>+				RCU_INIT_POINTER(bond-&gt;current_arp_slave, NULL);</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='ctx'> 		default:</div><div class='del'>-			netdev_err(bond-&gt;dev, "impossible: new_link %d on slave %s\n",</div><div class='del'>-				   slave-&gt;new_link, slave-&gt;dev-&gt;name);</div><div class='add'>+			slave_err(bond-&gt;dev, slave-&gt;dev,</div><div class='add'>+				  "impossible: link_new_state %d on slave\n",</div><div class='add'>+				  slave-&gt;link_new_state);</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-do_failover:</div><div class='add'>+	if (do_failover) {</div><div class='ctx'> 		block_netpoll_tx();</div><div class='ctx'> 		bond_select_active_slave(bond);</div><div class='ctx'> 		unblock_netpoll_tx();</div><div class='hunk'>@@ -2780,7 +3665,7 @@ static bool bond_ab_arp_probe(struct bonding *bond)</div><div class='ctx'> 			    curr_active_slave-&gt;dev-&gt;name);</div><div class='ctx'> </div><div class='ctx'> 	if (curr_active_slave) {</div><div class='del'>-		bond_arp_send_all(bond, curr_active_slave);</div><div class='add'>+		bond_send_validate(bond, curr_active_slave);</div><div class='ctx'> 		return should_notify_rtnl;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2795,8 +3680,6 @@ static bool bond_ab_arp_probe(struct bonding *bond)</div><div class='ctx'> 			return should_notify_rtnl;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	bond_set_slave_inactive_flags(curr_arp_slave, BOND_SLAVE_NOTIFY_LATER);</div><div class='del'>-</div><div class='ctx'> 	bond_for_each_slave_rcu(bond, slave, iter) {</div><div class='ctx'> 		if (!found &amp;&amp; !before &amp;&amp; bond_slave_is_up(slave))</div><div class='ctx'> 			before = slave;</div><div class='hunk'>@@ -2811,15 +3694,15 @@ static bool bond_ab_arp_probe(struct bonding *bond)</div><div class='ctx'> 		 * up when it is actually down</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (!bond_slave_is_up(slave) &amp;&amp; slave-&gt;link == BOND_LINK_UP) {</div><div class='del'>-			bond_set_slave_link_state(slave, BOND_LINK_DOWN);</div><div class='add'>+			bond_set_slave_link_state(slave, BOND_LINK_DOWN,</div><div class='add'>+						  BOND_SLAVE_NOTIFY_LATER);</div><div class='ctx'> 			if (slave-&gt;link_failure_count &lt; UINT_MAX)</div><div class='ctx'> 				slave-&gt;link_failure_count++;</div><div class='ctx'> </div><div class='ctx'> 			bond_set_slave_inactive_flags(slave,</div><div class='ctx'> 						      BOND_SLAVE_NOTIFY_LATER);</div><div class='ctx'> </div><div class='del'>-			netdev_info(bond-&gt;dev, "backup interface %s is now down\n",</div><div class='del'>-				    slave-&gt;dev-&gt;name);</div><div class='add'>+			slave_info(bond-&gt;dev, slave-&gt;dev, "backup interface is now down\n");</div><div class='ctx'> 		}</div><div class='ctx'> 		if (slave == curr_arp_slave)</div><div class='ctx'> 			found = true;</div><div class='hunk'>@@ -2831,15 +3714,16 @@ static bool bond_ab_arp_probe(struct bonding *bond)</div><div class='ctx'> 	if (!new_slave)</div><div class='ctx'> 		goto check_state;</div><div class='ctx'> </div><div class='del'>-	bond_set_slave_link_state(new_slave, BOND_LINK_BACK);</div><div class='add'>+	bond_set_slave_link_state(new_slave, BOND_LINK_BACK,</div><div class='add'>+				  BOND_SLAVE_NOTIFY_LATER);</div><div class='ctx'> 	bond_set_slave_active_flags(new_slave, BOND_SLAVE_NOTIFY_LATER);</div><div class='del'>-	bond_arp_send_all(bond, new_slave);</div><div class='add'>+	bond_send_validate(bond, new_slave);</div><div class='ctx'> 	new_slave-&gt;last_link_up = jiffies;</div><div class='ctx'> 	rcu_assign_pointer(bond-&gt;current_arp_slave, new_slave);</div><div class='ctx'> </div><div class='ctx'> check_state:</div><div class='ctx'> 	bond_for_each_slave_rcu(bond, slave, iter) {</div><div class='del'>-		if (slave-&gt;should_notify) {</div><div class='add'>+		if (slave-&gt;should_notify || slave-&gt;should_notify_link) {</div><div class='ctx'> 			should_notify_rtnl = BOND_SLAVE_NOTIFY_NOW;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -2847,10 +3731,8 @@ check_state:</div><div class='ctx'> 	return should_notify_rtnl;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void bond_activebackup_arp_mon(struct work_struct *work)</div><div class='add'>+static void bond_activebackup_arp_mon(struct bonding *bond)</div><div class='ctx'> {</div><div class='del'>-	struct bonding *bond = container_of(work, struct bonding,</div><div class='del'>-					    arp_work.work);</div><div class='ctx'> 	bool should_notify_peers = false;</div><div class='ctx'> 	bool should_notify_rtnl = false;</div><div class='ctx'> 	int delta_in_ticks;</div><div class='hunk'>@@ -2891,16 +3773,31 @@ re_arm:</div><div class='ctx'> 		if (!rtnl_trylock())</div><div class='ctx'> 			return;</div><div class='ctx'> </div><div class='del'>-		if (should_notify_peers)</div><div class='add'>+		if (should_notify_peers) {</div><div class='add'>+			bond-&gt;send_peer_notif--;</div><div class='ctx'> 			call_netdevice_notifiers(NETDEV_NOTIFY_PEERS,</div><div class='ctx'> 						 bond-&gt;dev);</div><div class='del'>-		if (should_notify_rtnl)</div><div class='add'>+		}</div><div class='add'>+		if (should_notify_rtnl) {</div><div class='ctx'> 			bond_slave_state_notify(bond);</div><div class='add'>+			bond_slave_link_notify(bond);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		rtnl_unlock();</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void bond_arp_monitor(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct bonding *bond = container_of(work, struct bonding,</div><div class='add'>+					    arp_work.work);</div><div class='add'>+</div><div class='add'>+	if (BOND_MODE(bond) == BOND_MODE_ACTIVEBACKUP)</div><div class='add'>+		bond_activebackup_arp_mon(bond);</div><div class='add'>+	else</div><div class='add'>+		bond_loadbalance_arp_mon(bond);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*-------------------------- netdev event handling --------------------------*/</div><div class='ctx'> </div><div class='ctx'> /* Change device name */</div><div class='hunk'>@@ -2919,19 +3816,20 @@ static int bond_master_netdev_event(unsigned long event,</div><div class='ctx'> {</div><div class='ctx'> 	struct bonding *event_bond = netdev_priv(bond_dev);</div><div class='ctx'> </div><div class='add'>+	netdev_dbg(bond_dev, "%s called\n", __func__);</div><div class='add'>+</div><div class='ctx'> 	switch (event) {</div><div class='ctx'> 	case NETDEV_CHANGENAME:</div><div class='ctx'> 		return bond_event_changename(event_bond);</div><div class='ctx'> 	case NETDEV_UNREGISTER:</div><div class='ctx'> 		bond_remove_proc_entry(event_bond);</div><div class='add'>+#ifdef CONFIG_XFRM_OFFLOAD</div><div class='add'>+		xfrm_dev_state_flush(dev_net(bond_dev), bond_dev, true);</div><div class='add'>+#endif /* CONFIG_XFRM_OFFLOAD */</div><div class='ctx'> 		break;</div><div class='ctx'> 	case NETDEV_REGISTER:</div><div class='ctx'> 		bond_create_proc_entry(event_bond);</div><div class='ctx'> 		break;</div><div class='del'>-	case NETDEV_NOTIFY_PEERS:</div><div class='del'>-		if (event_bond-&gt;send_peer_notif)</div><div class='del'>-			event_bond-&gt;send_peer_notif--;</div><div class='del'>-		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2945,40 +3843,49 @@ static int bond_slave_netdev_event(unsigned long event,</div><div class='ctx'> 	struct slave *slave = bond_slave_get_rtnl(slave_dev), *primary;</div><div class='ctx'> 	struct bonding *bond;</div><div class='ctx'> 	struct net_device *bond_dev;</div><div class='del'>-	u32 old_speed;</div><div class='del'>-	u8 old_duplex;</div><div class='ctx'> </div><div class='ctx'> 	/* A netdev event can be generated while enslaving a device</div><div class='ctx'> 	 * before netdev_rx_handler_register is called in which case</div><div class='ctx'> 	 * slave will be NULL</div><div class='ctx'> 	 */</div><div class='del'>-	if (!slave)</div><div class='add'>+	if (!slave) {</div><div class='add'>+		netdev_dbg(slave_dev, "%s called on NULL slave\n", __func__);</div><div class='ctx'> 		return NOTIFY_DONE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	bond_dev = slave-&gt;bond-&gt;dev;</div><div class='ctx'> 	bond = slave-&gt;bond;</div><div class='ctx'> 	primary = rtnl_dereference(bond-&gt;primary_slave);</div><div class='ctx'> </div><div class='add'>+	slave_dbg(bond_dev, slave_dev, "%s called\n", __func__);</div><div class='add'>+</div><div class='ctx'> 	switch (event) {</div><div class='ctx'> 	case NETDEV_UNREGISTER:</div><div class='ctx'> 		if (bond_dev-&gt;type != ARPHRD_ETHER)</div><div class='ctx'> 			bond_release_and_destroy(bond_dev, slave_dev);</div><div class='ctx'> 		else</div><div class='del'>-			bond_release(bond_dev, slave_dev);</div><div class='add'>+			__bond_release_one(bond_dev, slave_dev, false, true);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case NETDEV_UP:</div><div class='ctx'> 	case NETDEV_CHANGE:</div><div class='del'>-		old_speed = slave-&gt;speed;</div><div class='del'>-		old_duplex = slave-&gt;duplex;</div><div class='del'>-</div><div class='del'>-		bond_update_speed_duplex(slave);</div><div class='del'>-</div><div class='del'>-		if (BOND_MODE(bond) == BOND_MODE_8023AD) {</div><div class='del'>-			if (old_speed != slave-&gt;speed)</div><div class='del'>-				bond_3ad_adapter_speed_changed(slave);</div><div class='del'>-			if (old_duplex != slave-&gt;duplex)</div><div class='del'>-				bond_3ad_adapter_duplex_changed(slave);</div><div class='add'>+		/* For 802.3ad mode only:</div><div class='add'>+		 * Getting invalid Speed/Duplex values here will put slave</div><div class='add'>+		 * in weird state. Mark it as link-fail if the link was</div><div class='add'>+		 * previously up or link-down if it hasn't yet come up, and</div><div class='add'>+		 * let link-monitoring (miimon) set it right when correct</div><div class='add'>+		 * speeds/duplex are available.</div><div class='add'>+		 */</div><div class='add'>+		if (bond_update_speed_duplex(slave) &amp;&amp;</div><div class='add'>+		    BOND_MODE(bond) == BOND_MODE_8023AD) {</div><div class='add'>+			if (slave-&gt;last_link_up)</div><div class='add'>+				slave-&gt;link = BOND_LINK_FAIL;</div><div class='add'>+			else</div><div class='add'>+				slave-&gt;link = BOND_LINK_DOWN;</div><div class='ctx'> 		}</div><div class='del'>-		/* Fallthrough */</div><div class='add'>+</div><div class='add'>+		if (BOND_MODE(bond) == BOND_MODE_8023AD)</div><div class='add'>+			bond_3ad_adapter_speed_duplex_changed(slave);</div><div class='add'>+		fallthrough;</div><div class='ctx'> 	case NETDEV_DOWN:</div><div class='ctx'> 		/* Refresh slave-array if applicable!</div><div class='ctx'> 		 * If the setup does not use miimon or arpmon (mode-specific!),</div><div class='hunk'>@@ -2988,7 +3895,7 @@ static int bond_slave_netdev_event(unsigned long event,</div><div class='ctx'> 		 * events. If these (miimon/arpmon) parameters are configured</div><div class='ctx'> 		 * then array gets refreshed twice and that should be fine!</div><div class='ctx'> 		 */</div><div class='del'>-		if (bond_mode_uses_xmit_hash(bond))</div><div class='add'>+		if (bond_mode_can_use_xmit_hash(bond))</div><div class='ctx'> 			bond_update_slave_arr(bond, NULL);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case NETDEV_CHANGEMTU:</div><div class='hunk'>@@ -3028,12 +3935,19 @@ static int bond_slave_netdev_event(unsigned long event,</div><div class='ctx'> 		unblock_netpoll_tx();</div><div class='ctx'> 		break;</div><div class='ctx'> 	case NETDEV_FEAT_CHANGE:</div><div class='del'>-		bond_compute_features(bond);</div><div class='add'>+		if (!bond-&gt;notifier_ctx) {</div><div class='add'>+			bond-&gt;notifier_ctx = true;</div><div class='add'>+			netdev_compute_master_upper_features(bond-&gt;dev, true);</div><div class='add'>+			bond-&gt;notifier_ctx = false;</div><div class='add'>+		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	case NETDEV_RESEND_IGMP:</div><div class='ctx'> 		/* Propagate to master device */</div><div class='ctx'> 		call_netdevice_notifiers(event, slave-&gt;bond-&gt;dev);</div><div class='ctx'> 		break;</div><div class='add'>+	case NETDEV_XDP_FEAT_CHANGE:</div><div class='add'>+		bond_xdp_set_features(bond_dev);</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -3053,20 +3967,22 @@ static int bond_netdev_event(struct notifier_block *this,</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *event_dev = netdev_notifier_info_to_dev(ptr);</div><div class='ctx'> </div><div class='del'>-	netdev_dbg(event_dev, "event: %lx\n", event);</div><div class='add'>+	netdev_dbg(event_dev, "%s received %s\n",</div><div class='add'>+		   __func__, netdev_cmd_to_name(event));</div><div class='ctx'> </div><div class='ctx'> 	if (!(event_dev-&gt;priv_flags &amp; IFF_BONDING))</div><div class='ctx'> 		return NOTIFY_DONE;</div><div class='ctx'> </div><div class='ctx'> 	if (event_dev-&gt;flags &amp; IFF_MASTER) {</div><div class='del'>-		netdev_dbg(event_dev, "IFF_MASTER\n");</div><div class='del'>-		return bond_master_netdev_event(event, event_dev);</div><div class='add'>+		int ret;</div><div class='add'>+</div><div class='add'>+		ret = bond_master_netdev_event(event, event_dev);</div><div class='add'>+		if (ret != NOTIFY_DONE)</div><div class='add'>+			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (event_dev-&gt;flags &amp; IFF_SLAVE) {</div><div class='del'>-		netdev_dbg(event_dev, "IFF_SLAVE\n");</div><div class='add'>+	if (event_dev-&gt;flags &amp; IFF_SLAVE)</div><div class='ctx'> 		return bond_slave_netdev_event(event, event_dev);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	return NOTIFY_DONE;</div><div class='ctx'> }</div><div class='hunk'>@@ -3077,54 +3993,183 @@ static struct notifier_block bond_netdev_notifier = {</div><div class='ctx'> </div><div class='ctx'> /*---------------------------- Hashing Policies -----------------------------*/</div><div class='ctx'> </div><div class='add'>+/* Helper to access data in a packet, with or without a backing skb.</div><div class='add'>+ * If skb is given the data is linearized if necessary via pskb_may_pull.</div><div class='add'>+ */</div><div class='add'>+static inline const void *bond_pull_data(struct sk_buff *skb,</div><div class='add'>+					 const void *data, int hlen, int n)</div><div class='add'>+{</div><div class='add'>+	if (likely(n &lt;= hlen))</div><div class='add'>+		return data;</div><div class='add'>+	else if (skb &amp;&amp; likely(pskb_may_pull(skb, n)))</div><div class='add'>+		return skb-&gt;data;</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* L2 hash helper */</div><div class='del'>-static inline u32 bond_eth_hash(struct sk_buff *skb)</div><div class='add'>+static inline u32 bond_eth_hash(struct sk_buff *skb, const void *data, int mhoff, int hlen)</div><div class='ctx'> {</div><div class='del'>-	struct ethhdr *ep, hdr_tmp;</div><div class='add'>+	struct ethhdr *ep;</div><div class='ctx'> </div><div class='del'>-	ep = skb_header_pointer(skb, 0, sizeof(hdr_tmp), &amp;hdr_tmp);</div><div class='del'>-	if (ep)</div><div class='del'>-		return ep-&gt;h_dest[5] ^ ep-&gt;h_source[5] ^ ep-&gt;h_proto;</div><div class='del'>-	return 0;</div><div class='add'>+	data = bond_pull_data(skb, data, hlen, mhoff + sizeof(struct ethhdr));</div><div class='add'>+	if (!data)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ep = (struct ethhdr *)(data + mhoff);</div><div class='add'>+	return ep-&gt;h_dest[5] ^ ep-&gt;h_source[5] ^ be16_to_cpu(ep-&gt;h_proto);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Extract the appropriate headers based on bond's xmit policy */</div><div class='del'>-static bool bond_flow_dissect(struct bonding *bond, struct sk_buff *skb,</div><div class='del'>-			      struct flow_keys *fk)</div><div class='add'>+static bool bond_flow_ip(struct sk_buff *skb, struct flow_keys *fk, const void *data,</div><div class='add'>+			 int hlen, __be16 l2_proto, int *nhoff, int *ip_proto, bool l34)</div><div class='ctx'> {</div><div class='ctx'> 	const struct ipv6hdr *iph6;</div><div class='ctx'> 	const struct iphdr *iph;</div><div class='del'>-	int noff, proto = -1;</div><div class='ctx'> </div><div class='del'>-	if (bond-&gt;params.xmit_policy &gt; BOND_XMIT_POLICY_LAYER23)</div><div class='del'>-		return skb_flow_dissect_flow_keys(skb, fk);</div><div class='del'>-</div><div class='del'>-	fk-&gt;ports.ports = 0;</div><div class='del'>-	noff = skb_network_offset(skb);</div><div class='del'>-	if (skb-&gt;protocol == htons(ETH_P_IP)) {</div><div class='del'>-		if (unlikely(!pskb_may_pull(skb, noff + sizeof(*iph))))</div><div class='add'>+	if (l2_proto == htons(ETH_P_IP)) {</div><div class='add'>+		data = bond_pull_data(skb, data, hlen, *nhoff + sizeof(*iph));</div><div class='add'>+		if (!data)</div><div class='ctx'> 			return false;</div><div class='del'>-		iph = ip_hdr(skb);</div><div class='add'>+</div><div class='add'>+		iph = (const struct iphdr *)(data + *nhoff);</div><div class='ctx'> 		iph_to_flow_copy_v4addrs(fk, iph);</div><div class='del'>-		noff += iph-&gt;ihl &lt;&lt; 2;</div><div class='add'>+		*nhoff += iph-&gt;ihl &lt;&lt; 2;</div><div class='ctx'> 		if (!ip_is_fragment(iph))</div><div class='del'>-			proto = iph-&gt;protocol;</div><div class='del'>-	} else if (skb-&gt;protocol == htons(ETH_P_IPV6)) {</div><div class='del'>-		if (unlikely(!pskb_may_pull(skb, noff + sizeof(*iph6))))</div><div class='add'>+			*ip_proto = iph-&gt;protocol;</div><div class='add'>+	} else if (l2_proto == htons(ETH_P_IPV6)) {</div><div class='add'>+		data = bond_pull_data(skb, data, hlen, *nhoff + sizeof(*iph6));</div><div class='add'>+		if (!data)</div><div class='ctx'> 			return false;</div><div class='del'>-		iph6 = ipv6_hdr(skb);</div><div class='add'>+</div><div class='add'>+		iph6 = (const struct ipv6hdr *)(data + *nhoff);</div><div class='ctx'> 		iph_to_flow_copy_v6addrs(fk, iph6);</div><div class='del'>-		noff += sizeof(*iph6);</div><div class='del'>-		proto = iph6-&gt;nexthdr;</div><div class='add'>+		*nhoff += sizeof(*iph6);</div><div class='add'>+		*ip_proto = iph6-&gt;nexthdr;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='del'>-	if (bond-&gt;params.xmit_policy == BOND_XMIT_POLICY_LAYER34 &amp;&amp; proto &gt;= 0)</div><div class='del'>-		fk-&gt;ports.ports = skb_flow_get_ports(skb, noff, proto);</div><div class='add'>+</div><div class='add'>+	if (l34 &amp;&amp; *ip_proto &gt;= 0)</div><div class='add'>+		fk-&gt;ports.ports = skb_flow_get_ports(skb, *nhoff, *ip_proto, data, hlen);</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u32 bond_vlan_srcmac_hash(struct sk_buff *skb, const void *data, int mhoff, int hlen)</div><div class='add'>+{</div><div class='add'>+	u32 srcmac_vendor = 0, srcmac_dev = 0;</div><div class='add'>+	struct ethhdr *mac_hdr;</div><div class='add'>+	u16 vlan = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	data = bond_pull_data(skb, data, hlen, mhoff + sizeof(struct ethhdr));</div><div class='add'>+	if (!data)</div><div class='add'>+		return 0;</div><div class='add'>+	mac_hdr = (struct ethhdr *)(data + mhoff);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 3; i++)</div><div class='add'>+		srcmac_vendor = (srcmac_vendor &lt;&lt; 8) | mac_hdr-&gt;h_source[i];</div><div class='add'>+</div><div class='add'>+	for (i = 3; i &lt; ETH_ALEN; i++)</div><div class='add'>+		srcmac_dev = (srcmac_dev &lt;&lt; 8) | mac_hdr-&gt;h_source[i];</div><div class='add'>+</div><div class='add'>+	if (skb &amp;&amp; skb_vlan_tag_present(skb))</div><div class='add'>+		vlan = skb_vlan_tag_get(skb);</div><div class='add'>+</div><div class='add'>+	return vlan ^ srcmac_vendor ^ srcmac_dev;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Extract the appropriate headers based on bond's xmit policy */</div><div class='add'>+static bool bond_flow_dissect(struct bonding *bond, struct sk_buff *skb, const void *data,</div><div class='add'>+			      __be16 l2_proto, int nhoff, int hlen, struct flow_keys *fk)</div><div class='add'>+{</div><div class='add'>+	bool l34 = bond-&gt;params.xmit_policy == BOND_XMIT_POLICY_LAYER34;</div><div class='add'>+	int ip_proto = -1;</div><div class='add'>+</div><div class='add'>+	switch (bond-&gt;params.xmit_policy) {</div><div class='add'>+	case BOND_XMIT_POLICY_ENCAP23:</div><div class='add'>+	case BOND_XMIT_POLICY_ENCAP34:</div><div class='add'>+		memset(fk, 0, sizeof(*fk));</div><div class='add'>+		return __skb_flow_dissect(NULL, skb, &amp;flow_keys_bonding,</div><div class='add'>+					  fk, data, l2_proto, nhoff, hlen, 0);</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fk-&gt;ports.ports = 0;</div><div class='add'>+	memset(&amp;fk-&gt;icmp, 0, sizeof(fk-&gt;icmp));</div><div class='add'>+	if (!bond_flow_ip(skb, fk, data, hlen, l2_proto, &amp;nhoff, &amp;ip_proto, l34))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* ICMP error packets contains at least 8 bytes of the header</div><div class='add'>+	 * of the packet which generated the error. Use this information</div><div class='add'>+	 * to correlate ICMP error packets within the same flow which</div><div class='add'>+	 * generated the error.</div><div class='add'>+	 */</div><div class='add'>+	if (ip_proto == IPPROTO_ICMP || ip_proto == IPPROTO_ICMPV6) {</div><div class='add'>+		skb_flow_get_icmp_tci(skb, &amp;fk-&gt;icmp, data, nhoff, hlen);</div><div class='add'>+		if (ip_proto == IPPROTO_ICMP) {</div><div class='add'>+			if (!icmp_is_err(fk-&gt;icmp.type))</div><div class='add'>+				return true;</div><div class='add'>+</div><div class='add'>+			nhoff += sizeof(struct icmphdr);</div><div class='add'>+		} else if (ip_proto == IPPROTO_ICMPV6) {</div><div class='add'>+			if (!icmpv6_is_err(fk-&gt;icmp.type))</div><div class='add'>+				return true;</div><div class='add'>+</div><div class='add'>+			nhoff += sizeof(struct icmp6hdr);</div><div class='add'>+		}</div><div class='add'>+		return bond_flow_ip(skb, fk, data, hlen, l2_proto, &amp;nhoff, &amp;ip_proto, l34);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 bond_ip_hash(u32 hash, struct flow_keys *flow, int xmit_policy)</div><div class='add'>+{</div><div class='add'>+	hash ^= (__force u32)flow_get_u32_dst(flow) ^</div><div class='add'>+		(__force u32)flow_get_u32_src(flow);</div><div class='add'>+	hash ^= (hash &gt;&gt; 16);</div><div class='add'>+	hash ^= (hash &gt;&gt; 8);</div><div class='add'>+</div><div class='add'>+	/* discard lowest hash bit to deal with the common even ports pattern */</div><div class='add'>+	if (xmit_policy == BOND_XMIT_POLICY_LAYER34 ||</div><div class='add'>+		xmit_policy == BOND_XMIT_POLICY_ENCAP34)</div><div class='add'>+		return hash &gt;&gt; 1;</div><div class='add'>+</div><div class='add'>+	return hash;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Generate hash based on xmit policy. If @skb is given it is used to linearize</div><div class='add'>+ * the data as required, but this function can be used without it if the data is</div><div class='add'>+ * known to be linear (e.g. with xdp_buff).</div><div class='add'>+ */</div><div class='add'>+static u32 __bond_xmit_hash(struct bonding *bond, struct sk_buff *skb, const void *data,</div><div class='add'>+			    __be16 l2_proto, int mhoff, int nhoff, int hlen)</div><div class='add'>+{</div><div class='add'>+	struct flow_keys flow;</div><div class='add'>+	u32 hash;</div><div class='add'>+</div><div class='add'>+	if (bond-&gt;params.xmit_policy == BOND_XMIT_POLICY_VLAN_SRCMAC)</div><div class='add'>+		return bond_vlan_srcmac_hash(skb, data, mhoff, hlen);</div><div class='add'>+</div><div class='add'>+	if (bond-&gt;params.xmit_policy == BOND_XMIT_POLICY_LAYER2 ||</div><div class='add'>+	    !bond_flow_dissect(bond, skb, data, l2_proto, nhoff, hlen, &amp;flow))</div><div class='add'>+		return bond_eth_hash(skb, data, mhoff, hlen);</div><div class='add'>+</div><div class='add'>+	if (bond-&gt;params.xmit_policy == BOND_XMIT_POLICY_LAYER23 ||</div><div class='add'>+	    bond-&gt;params.xmit_policy == BOND_XMIT_POLICY_ENCAP23) {</div><div class='add'>+		hash = bond_eth_hash(skb, data, mhoff, hlen);</div><div class='add'>+	} else {</div><div class='add'>+		if (flow.icmp.id)</div><div class='add'>+			memcpy(&amp;hash, &amp;flow.icmp, sizeof(hash));</div><div class='add'>+		else</div><div class='add'>+			memcpy(&amp;hash, &amp;flow.ports.ports, sizeof(hash));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return bond_ip_hash(hash, &amp;flow, bond-&gt;params.xmit_policy);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * bond_xmit_hash - generate a hash value based on the xmit policy</div><div class='ctx'>  * @bond: bonding device</div><div class='hunk'>@@ -3135,43 +4180,49 @@ static bool bond_flow_dissect(struct bonding *bond, struct sk_buff *skb,</div><div class='ctx'>  */</div><div class='ctx'> u32 bond_xmit_hash(struct bonding *bond, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='del'>-	struct flow_keys flow;</div><div class='del'>-	u32 hash;</div><div class='add'>+	if (bond-&gt;params.xmit_policy == BOND_XMIT_POLICY_ENCAP34 &amp;&amp;</div><div class='add'>+	    skb-&gt;l4_hash)</div><div class='add'>+		return skb-&gt;hash;</div><div class='ctx'> </div><div class='del'>-	if (bond-&gt;params.xmit_policy == BOND_XMIT_POLICY_LAYER2 ||</div><div class='del'>-	    !bond_flow_dissect(bond, skb, &amp;flow))</div><div class='del'>-		return bond_eth_hash(skb);</div><div class='add'>+	return __bond_xmit_hash(bond, skb, skb-&gt;data, skb-&gt;protocol,</div><div class='add'>+				0, skb_network_offset(skb),</div><div class='add'>+				skb_headlen(skb));</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	if (bond-&gt;params.xmit_policy == BOND_XMIT_POLICY_LAYER23 ||</div><div class='del'>-	    bond-&gt;params.xmit_policy == BOND_XMIT_POLICY_ENCAP23)</div><div class='del'>-		hash = bond_eth_hash(skb);</div><div class='del'>-	else</div><div class='del'>-		hash = (__force u32)flow.ports.ports;</div><div class='del'>-	hash ^= (__force u32)flow_get_u32_dst(&amp;flow) ^</div><div class='del'>-		(__force u32)flow_get_u32_src(&amp;flow);</div><div class='del'>-	hash ^= (hash &gt;&gt; 16);</div><div class='del'>-	hash ^= (hash &gt;&gt; 8);</div><div class='add'>+/**</div><div class='add'>+ * bond_xmit_hash_xdp - generate a hash value based on the xmit policy</div><div class='add'>+ * @bond: bonding device</div><div class='add'>+ * @xdp: buffer to use for headers</div><div class='add'>+ *</div><div class='add'>+ * The XDP variant of bond_xmit_hash.</div><div class='add'>+ */</div><div class='add'>+static u32 bond_xmit_hash_xdp(struct bonding *bond, struct xdp_buff *xdp)</div><div class='add'>+{</div><div class='add'>+	struct ethhdr *eth;</div><div class='ctx'> </div><div class='del'>-	return hash;</div><div class='add'>+	if (xdp-&gt;data + sizeof(struct ethhdr) &gt; xdp-&gt;data_end)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	eth = (struct ethhdr *)xdp-&gt;data;</div><div class='add'>+</div><div class='add'>+	return __bond_xmit_hash(bond, NULL, xdp-&gt;data, eth-&gt;h_proto, 0,</div><div class='add'>+				sizeof(struct ethhdr), xdp-&gt;data_end - xdp-&gt;data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*-------------------------- Device entry points ----------------------------*/</div><div class='ctx'> </div><div class='del'>-static void bond_work_init_all(struct bonding *bond)</div><div class='add'>+void bond_work_init_all(struct bonding *bond)</div><div class='ctx'> {</div><div class='ctx'> 	INIT_DELAYED_WORK(&amp;bond-&gt;mcast_work,</div><div class='ctx'> 			  bond_resend_igmp_join_requests_delayed);</div><div class='ctx'> 	INIT_DELAYED_WORK(&amp;bond-&gt;alb_work, bond_alb_monitor);</div><div class='ctx'> 	INIT_DELAYED_WORK(&amp;bond-&gt;mii_work, bond_mii_monitor);</div><div class='del'>-	if (BOND_MODE(bond) == BOND_MODE_ACTIVEBACKUP)</div><div class='del'>-		INIT_DELAYED_WORK(&amp;bond-&gt;arp_work, bond_activebackup_arp_mon);</div><div class='del'>-	else</div><div class='del'>-		INIT_DELAYED_WORK(&amp;bond-&gt;arp_work, bond_loadbalance_arp_mon);</div><div class='add'>+	INIT_DELAYED_WORK(&amp;bond-&gt;arp_work, bond_arp_monitor);</div><div class='ctx'> 	INIT_DELAYED_WORK(&amp;bond-&gt;ad_work, bond_3ad_state_machine_handler);</div><div class='ctx'> 	INIT_DELAYED_WORK(&amp;bond-&gt;slave_arr_work, bond_slave_arr_handler);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void bond_work_cancel_all(struct bonding *bond)</div><div class='add'>+void bond_work_cancel_all(struct bonding *bond)</div><div class='ctx'> {</div><div class='ctx'> 	cancel_delayed_work_sync(&amp;bond-&gt;mii_work);</div><div class='ctx'> 	cancel_delayed_work_sync(&amp;bond-&gt;arp_work);</div><div class='hunk'>@@ -3187,6 +4238,12 @@ static int bond_open(struct net_device *bond_dev)</div><div class='ctx'> 	struct list_head *iter;</div><div class='ctx'> 	struct slave *slave;</div><div class='ctx'> </div><div class='add'>+	if (BOND_MODE(bond) == BOND_MODE_ROUNDROBIN &amp;&amp; !bond-&gt;rr_tx_counter) {</div><div class='add'>+		bond-&gt;rr_tx_counter = alloc_percpu(u32);</div><div class='add'>+		if (!bond-&gt;rr_tx_counter)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* reset slave-&gt;backup and slave-&gt;inactive */</div><div class='ctx'> 	if (bond_has_slaves(bond)) {</div><div class='ctx'> 		bond_for_each_slave(bond, slave, iter) {</div><div class='hunk'>@@ -3201,15 +4258,13 @@ static int bond_open(struct net_device *bond_dev)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	bond_work_init_all(bond);</div><div class='del'>-</div><div class='ctx'> 	if (bond_is_lb(bond)) {</div><div class='ctx'> 		/* bond_alb_initialize must be called before the timer</div><div class='ctx'> 		 * is started.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (bond_alb_initialize(bond, (BOND_MODE(bond) == BOND_MODE_ALB)))</div><div class='ctx'> 			return -ENOMEM;</div><div class='del'>-		if (bond-&gt;params.tlb_dynamic_lb)</div><div class='add'>+		if (bond-&gt;params.tlb_dynamic_lb || BOND_MODE(bond) == BOND_MODE_ALB)</div><div class='ctx'> 			queue_delayed_work(bond-&gt;wq, &amp;bond-&gt;alb_work, 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3218,7 +4273,7 @@ static int bond_open(struct net_device *bond_dev)</div><div class='ctx'> </div><div class='ctx'> 	if (bond-&gt;params.arp_interval) {  /* arp interval, in milliseconds. */</div><div class='ctx'> 		queue_delayed_work(bond-&gt;wq, &amp;bond-&gt;arp_work, 0);</div><div class='del'>-		bond-&gt;recv_probe = bond_arp_rcv;</div><div class='add'>+		bond-&gt;recv_probe = bond_rcv_validate;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (BOND_MODE(bond) == BOND_MODE_8023AD) {</div><div class='hunk'>@@ -3226,9 +4281,15 @@ static int bond_open(struct net_device *bond_dev)</div><div class='ctx'> 		/* register to receive LACPDUs */</div><div class='ctx'> 		bond-&gt;recv_probe = bond_3ad_lacpdu_recv;</div><div class='ctx'> 		bond_3ad_initiate_agg_selection(bond, 1);</div><div class='add'>+</div><div class='add'>+		bond_for_each_slave(bond, slave, iter)</div><div class='add'>+			dev_mc_add(slave-&gt;dev, lacpdu_mcast_addr);</div><div class='add'>+</div><div class='add'>+		if (bond-&gt;params.broadcast_neighbor)</div><div class='add'>+			static_branch_inc(&amp;bond_bcast_neigh_enabled);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (bond_mode_uses_xmit_hash(bond))</div><div class='add'>+	if (bond_mode_can_use_xmit_hash(bond))</div><div class='ctx'> 		bond_update_slave_arr(bond, NULL);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -3237,6 +4298,7 @@ static int bond_open(struct net_device *bond_dev)</div><div class='ctx'> static int bond_close(struct net_device *bond_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct bonding *bond = netdev_priv(bond_dev);</div><div class='add'>+	struct slave *slave;</div><div class='ctx'> </div><div class='ctx'> 	bond_work_cancel_all(bond);</div><div class='ctx'> 	bond-&gt;send_peer_notif = 0;</div><div class='hunk'>@@ -3244,72 +4306,135 @@ static int bond_close(struct net_device *bond_dev)</div><div class='ctx'> 		bond_alb_deinitialize(bond);</div><div class='ctx'> 	bond-&gt;recv_probe = NULL;</div><div class='ctx'> </div><div class='add'>+	if (BOND_MODE(bond) == BOND_MODE_8023AD &amp;&amp;</div><div class='add'>+	    bond-&gt;params.broadcast_neighbor)</div><div class='add'>+		static_branch_dec(&amp;bond_bcast_neigh_enabled);</div><div class='add'>+</div><div class='add'>+	if (bond_uses_primary(bond)) {</div><div class='add'>+		rcu_read_lock();</div><div class='add'>+		slave = rcu_dereference(bond-&gt;curr_active_slave);</div><div class='add'>+		if (slave)</div><div class='add'>+			bond_hw_addr_flush(bond_dev, slave-&gt;dev);</div><div class='add'>+		rcu_read_unlock();</div><div class='add'>+	} else {</div><div class='add'>+		struct list_head *iter;</div><div class='add'>+</div><div class='add'>+		bond_for_each_slave(bond, slave, iter)</div><div class='add'>+			bond_hw_addr_flush(bond_dev, slave-&gt;dev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct rtnl_link_stats64 *bond_get_stats(struct net_device *bond_dev,</div><div class='del'>-						struct rtnl_link_stats64 *stats)</div><div class='add'>+/* fold stats, assuming all rtnl_link_stats64 fields are u64, but</div><div class='add'>+ * that some drivers can provide 32bit values only.</div><div class='add'>+ */</div><div class='add'>+static void bond_fold_stats(struct rtnl_link_stats64 *_res,</div><div class='add'>+			    const struct rtnl_link_stats64 *_new,</div><div class='add'>+			    const struct rtnl_link_stats64 *_old)</div><div class='add'>+{</div><div class='add'>+	const u64 *new = (const u64 *)_new;</div><div class='add'>+	const u64 *old = (const u64 *)_old;</div><div class='add'>+	u64 *res = (u64 *)_res;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; sizeof(*_res) / sizeof(u64); i++) {</div><div class='add'>+		u64 nv = new[i];</div><div class='add'>+		u64 ov = old[i];</div><div class='add'>+		s64 delta = nv - ov;</div><div class='add'>+</div><div class='add'>+		/* detects if this particular field is 32bit only */</div><div class='add'>+		if (((nv | ov) &gt;&gt; 32) == 0)</div><div class='add'>+			delta = (s64)(s32)((u32)nv - (u32)ov);</div><div class='add'>+</div><div class='add'>+		/* filter anomalies, some drivers reset their stats</div><div class='add'>+		 * at down/up events.</div><div class='add'>+		 */</div><div class='add'>+		if (delta &gt; 0)</div><div class='add'>+			res[i] += delta;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_LOCKDEP</div><div class='add'>+static int bond_get_lowest_level_rcu(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ldev, *next, *now, *dev_stack[MAX_NEST_DEV + 1];</div><div class='add'>+	struct list_head *niter, *iter, *iter_stack[MAX_NEST_DEV + 1];</div><div class='add'>+	int cur = 0, max = 0;</div><div class='add'>+</div><div class='add'>+	now = dev;</div><div class='add'>+	iter = &amp;dev-&gt;adj_list.lower;</div><div class='add'>+</div><div class='add'>+	while (1) {</div><div class='add'>+		next = NULL;</div><div class='add'>+		while (1) {</div><div class='add'>+			ldev = netdev_next_lower_dev_rcu(now, &amp;iter);</div><div class='add'>+			if (!ldev)</div><div class='add'>+				break;</div><div class='add'>+</div><div class='add'>+			next = ldev;</div><div class='add'>+			niter = &amp;ldev-&gt;adj_list.lower;</div><div class='add'>+			dev_stack[cur] = now;</div><div class='add'>+			iter_stack[cur++] = iter;</div><div class='add'>+			if (max &lt;= cur)</div><div class='add'>+				max = cur;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!next) {</div><div class='add'>+			if (!cur)</div><div class='add'>+				return max;</div><div class='add'>+			next = dev_stack[--cur];</div><div class='add'>+			niter = iter_stack[cur];</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		now = next;</div><div class='add'>+		iter = niter;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return max;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static void bond_get_stats(struct net_device *bond_dev,</div><div class='add'>+			   struct rtnl_link_stats64 *stats)</div><div class='ctx'> {</div><div class='ctx'> 	struct bonding *bond = netdev_priv(bond_dev);</div><div class='ctx'> 	struct rtnl_link_stats64 temp;</div><div class='ctx'> 	struct list_head *iter;</div><div class='ctx'> 	struct slave *slave;</div><div class='add'>+	int nest_level = 0;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+#ifdef CONFIG_LOCKDEP</div><div class='add'>+	nest_level = bond_get_lowest_level_rcu(bond_dev);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='add'>+	spin_lock_nested(&amp;bond-&gt;stats_lock, nest_level);</div><div class='ctx'> 	memcpy(stats, &amp;bond-&gt;bond_stats, sizeof(*stats));</div><div class='ctx'> </div><div class='del'>-	bond_for_each_slave(bond, slave, iter) {</div><div class='del'>-		const struct rtnl_link_stats64 *sstats =</div><div class='add'>+	bond_for_each_slave_rcu(bond, slave, iter) {</div><div class='add'>+		const struct rtnl_link_stats64 *new =</div><div class='ctx'> 			dev_get_stats(slave-&gt;dev, &amp;temp);</div><div class='del'>-		struct rtnl_link_stats64 *pstats = &amp;slave-&gt;slave_stats;</div><div class='del'>-</div><div class='del'>-		stats-&gt;rx_packets +=  sstats-&gt;rx_packets - pstats-&gt;rx_packets;</div><div class='del'>-		stats-&gt;rx_bytes += sstats-&gt;rx_bytes - pstats-&gt;rx_bytes;</div><div class='del'>-		stats-&gt;rx_errors += sstats-&gt;rx_errors - pstats-&gt;rx_errors;</div><div class='del'>-		stats-&gt;rx_dropped += sstats-&gt;rx_dropped - pstats-&gt;rx_dropped;</div><div class='del'>-</div><div class='del'>-		stats-&gt;tx_packets += sstats-&gt;tx_packets - pstats-&gt;tx_packets;;</div><div class='del'>-		stats-&gt;tx_bytes += sstats-&gt;tx_bytes - pstats-&gt;tx_bytes;</div><div class='del'>-		stats-&gt;tx_errors += sstats-&gt;tx_errors - pstats-&gt;tx_errors;</div><div class='del'>-		stats-&gt;tx_dropped += sstats-&gt;tx_dropped - pstats-&gt;tx_dropped;</div><div class='del'>-</div><div class='del'>-		stats-&gt;multicast += sstats-&gt;multicast - pstats-&gt;multicast;</div><div class='del'>-		stats-&gt;collisions += sstats-&gt;collisions - pstats-&gt;collisions;</div><div class='del'>-</div><div class='del'>-		stats-&gt;rx_length_errors += sstats-&gt;rx_length_errors - pstats-&gt;rx_length_errors;</div><div class='del'>-		stats-&gt;rx_over_errors += sstats-&gt;rx_over_errors - pstats-&gt;rx_over_errors;</div><div class='del'>-		stats-&gt;rx_crc_errors += sstats-&gt;rx_crc_errors - pstats-&gt;rx_crc_errors;</div><div class='del'>-		stats-&gt;rx_frame_errors += sstats-&gt;rx_frame_errors - pstats-&gt;rx_frame_errors;</div><div class='del'>-		stats-&gt;rx_fifo_errors += sstats-&gt;rx_fifo_errors - pstats-&gt;rx_fifo_errors;</div><div class='del'>-		stats-&gt;rx_missed_errors += sstats-&gt;rx_missed_errors - pstats-&gt;rx_missed_errors;</div><div class='del'>-</div><div class='del'>-		stats-&gt;tx_aborted_errors += sstats-&gt;tx_aborted_errors - pstats-&gt;tx_aborted_errors;</div><div class='del'>-		stats-&gt;tx_carrier_errors += sstats-&gt;tx_carrier_errors - pstats-&gt;tx_carrier_errors;</div><div class='del'>-		stats-&gt;tx_fifo_errors += sstats-&gt;tx_fifo_errors - pstats-&gt;tx_fifo_errors;</div><div class='del'>-		stats-&gt;tx_heartbeat_errors += sstats-&gt;tx_heartbeat_errors - pstats-&gt;tx_heartbeat_errors;</div><div class='del'>-		stats-&gt;tx_window_errors += sstats-&gt;tx_window_errors - pstats-&gt;tx_window_errors;</div><div class='add'>+</div><div class='add'>+		bond_fold_stats(stats, new, &amp;slave-&gt;slave_stats);</div><div class='ctx'> </div><div class='ctx'> 		/* save off the slave stats for the next run */</div><div class='del'>-		memcpy(pstats, sstats, sizeof(*sstats));</div><div class='add'>+		memcpy(&amp;slave-&gt;slave_stats, new, sizeof(*new));</div><div class='ctx'> 	}</div><div class='del'>-	memcpy(&amp;bond-&gt;bond_stats, stats, sizeof(*stats));</div><div class='ctx'> </div><div class='del'>-	return stats;</div><div class='add'>+	memcpy(&amp;bond-&gt;bond_stats, stats, sizeof(*stats));</div><div class='add'>+	spin_unlock(&amp;bond-&gt;stats_lock);</div><div class='add'>+	rcu_read_unlock();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int bond_do_ioctl(struct net_device *bond_dev, struct ifreq *ifr, int cmd)</div><div class='add'>+static int bond_eth_ioctl(struct net_device *bond_dev, struct ifreq *ifr, int cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct bonding *bond = netdev_priv(bond_dev);</div><div class='del'>-	struct net_device *slave_dev = NULL;</div><div class='del'>-	struct ifbond k_binfo;</div><div class='del'>-	struct ifbond __user *u_binfo = NULL;</div><div class='del'>-	struct ifslave k_sinfo;</div><div class='del'>-	struct ifslave __user *u_sinfo = NULL;</div><div class='ctx'> 	struct mii_ioctl_data *mii = NULL;</div><div class='del'>-	struct bond_opt_value newval;</div><div class='del'>-	struct net *net;</div><div class='del'>-	int res = 0;</div><div class='ctx'> </div><div class='del'>-	netdev_dbg(bond_dev, "bond_ioctl: cmd=%d\n", cmd);</div><div class='add'>+	netdev_dbg(bond_dev, "bond_eth_ioctl: cmd=%d\n", cmd);</div><div class='ctx'> </div><div class='ctx'> 	switch (cmd) {</div><div class='ctx'> 	case SIOCGMIIPHY:</div><div class='hunk'>@@ -3318,7 +4443,7 @@ static int bond_do_ioctl(struct net_device *bond_dev, struct ifreq *ifr, int cmd</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 		mii-&gt;phy_id = 0;</div><div class='del'>-		/* Fall Through */</div><div class='add'>+		fallthrough;</div><div class='ctx'> 	case SIOCGMIIREG:</div><div class='ctx'> 		/* We do this again just in case we were called by SIOCGMIIREG</div><div class='ctx'> 		 * instead of SIOCGMIIPHY.</div><div class='hunk'>@@ -3333,21 +4458,40 @@ static int bond_do_ioctl(struct net_device *bond_dev, struct ifreq *ifr, int cmd</div><div class='ctx'> 				mii-&gt;val_out = BMSR_LSTATUS;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		return 0;</div><div class='del'>-	case BOND_INFO_QUERY_OLD:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bond_do_ioctl(struct net_device *bond_dev, struct ifreq *ifr, int cmd)</div><div class='add'>+{</div><div class='add'>+	struct bonding *bond = netdev_priv(bond_dev);</div><div class='add'>+	struct net_device *slave_dev = NULL;</div><div class='add'>+	struct ifbond k_binfo;</div><div class='add'>+	struct ifbond __user *u_binfo = NULL;</div><div class='add'>+	struct ifslave k_sinfo;</div><div class='add'>+	struct ifslave __user *u_sinfo = NULL;</div><div class='add'>+	struct bond_opt_value newval;</div><div class='add'>+	struct net *net;</div><div class='add'>+	int res = 0;</div><div class='add'>+</div><div class='add'>+	netdev_dbg(bond_dev, "bond_ioctl: cmd=%d\n", cmd);</div><div class='add'>+</div><div class='add'>+	switch (cmd) {</div><div class='ctx'> 	case SIOCBONDINFOQUERY:</div><div class='ctx'> 		u_binfo = (struct ifbond __user *)ifr-&gt;ifr_data;</div><div class='ctx'> </div><div class='ctx'> 		if (copy_from_user(&amp;k_binfo, u_binfo, sizeof(ifbond)))</div><div class='ctx'> 			return -EFAULT;</div><div class='ctx'> </div><div class='del'>-		res = bond_info_query(bond_dev, &amp;k_binfo);</div><div class='del'>-		if (res == 0 &amp;&amp;</div><div class='del'>-		    copy_to_user(u_binfo, &amp;k_binfo, sizeof(ifbond)))</div><div class='add'>+		bond_info_query(bond_dev, &amp;k_binfo);</div><div class='add'>+		if (copy_to_user(u_binfo, &amp;k_binfo, sizeof(ifbond)))</div><div class='ctx'> 			return -EFAULT;</div><div class='ctx'> </div><div class='del'>-		return res;</div><div class='del'>-	case BOND_SLAVE_INFO_QUERY_OLD:</div><div class='add'>+		return 0;</div><div class='ctx'> 	case SIOCBONDSLAVEINFOQUERY:</div><div class='ctx'> 		u_sinfo = (struct ifslave __user *)ifr-&gt;ifr_data;</div><div class='ctx'> </div><div class='hunk'>@@ -3371,30 +4515,25 @@ static int bond_do_ioctl(struct net_device *bond_dev, struct ifreq *ifr, int cmd</div><div class='ctx'> </div><div class='ctx'> 	slave_dev = __dev_get_by_name(net, ifr-&gt;ifr_slave);</div><div class='ctx'> </div><div class='del'>-	netdev_dbg(bond_dev, "slave_dev=%p:\n", slave_dev);</div><div class='add'>+	slave_dbg(bond_dev, slave_dev, "slave_dev=%p:\n", slave_dev);</div><div class='ctx'> </div><div class='ctx'> 	if (!slave_dev)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	netdev_dbg(bond_dev, "slave_dev-&gt;name=%s:\n", slave_dev-&gt;name);</div><div class='ctx'> 	switch (cmd) {</div><div class='del'>-	case BOND_ENSLAVE_OLD:</div><div class='ctx'> 	case SIOCBONDENSLAVE:</div><div class='del'>-		res = bond_enslave(bond_dev, slave_dev);</div><div class='add'>+		res = bond_enslave(bond_dev, slave_dev, NULL);</div><div class='ctx'> 		break;</div><div class='del'>-	case BOND_RELEASE_OLD:</div><div class='ctx'> 	case SIOCBONDRELEASE:</div><div class='ctx'> 		res = bond_release(bond_dev, slave_dev);</div><div class='ctx'> 		break;</div><div class='del'>-	case BOND_SETHWADDR_OLD:</div><div class='ctx'> 	case SIOCBONDSETHWADDR:</div><div class='del'>-		bond_set_dev_addr(bond_dev, slave_dev);</div><div class='del'>-		res = 0;</div><div class='add'>+		res = bond_set_dev_addr(bond_dev, slave_dev);</div><div class='ctx'> 		break;</div><div class='del'>-	case BOND_CHANGE_ACTIVE_OLD:</div><div class='ctx'> 	case SIOCBONDCHANGEACTIVE:</div><div class='ctx'> 		bond_opt_initstr(&amp;newval, slave_dev-&gt;name);</div><div class='del'>-		res = __bond_opt_set(bond, BOND_OPT_ACTIVE_SLAVE, &amp;newval);</div><div class='add'>+		res = __bond_opt_set_notify(bond, BOND_OPT_ACTIVE_SLAVE,</div><div class='add'>+					    &amp;newval);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		res = -EOPNOTSUPP;</div><div class='hunk'>@@ -3403,6 +4542,29 @@ static int bond_do_ioctl(struct net_device *bond_dev, struct ifreq *ifr, int cmd</div><div class='ctx'> 	return res;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int bond_siocdevprivate(struct net_device *bond_dev, struct ifreq *ifr,</div><div class='add'>+			       void __user *data, int cmd)</div><div class='add'>+{</div><div class='add'>+	struct ifreq ifrdata = { .ifr_data = data };</div><div class='add'>+</div><div class='add'>+	switch (cmd) {</div><div class='add'>+	case BOND_INFO_QUERY_OLD:</div><div class='add'>+		return bond_do_ioctl(bond_dev, &amp;ifrdata, SIOCBONDINFOQUERY);</div><div class='add'>+	case BOND_SLAVE_INFO_QUERY_OLD:</div><div class='add'>+		return bond_do_ioctl(bond_dev, &amp;ifrdata, SIOCBONDSLAVEINFOQUERY);</div><div class='add'>+	case BOND_ENSLAVE_OLD:</div><div class='add'>+		return bond_do_ioctl(bond_dev, ifr, SIOCBONDENSLAVE);</div><div class='add'>+	case BOND_RELEASE_OLD:</div><div class='add'>+		return bond_do_ioctl(bond_dev, ifr, SIOCBONDRELEASE);</div><div class='add'>+	case BOND_SETHWADDR_OLD:</div><div class='add'>+		return bond_do_ioctl(bond_dev, ifr, SIOCBONDSETHWADDR);</div><div class='add'>+	case BOND_CHANGE_ACTIVE_OLD:</div><div class='add'>+		return bond_do_ioctl(bond_dev, ifr, SIOCBONDCHANGEACTIVE);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void bond_change_rx_flags(struct net_device *bond_dev, int change)</div><div class='ctx'> {</div><div class='ctx'> 	struct bonding *bond = netdev_priv(bond_dev);</div><div class='hunk'>@@ -3444,32 +4606,35 @@ static int bond_neigh_init(struct neighbour *n)</div><div class='ctx'> 	const struct net_device_ops *slave_ops;</div><div class='ctx'> 	struct neigh_parms parms;</div><div class='ctx'> 	struct slave *slave;</div><div class='del'>-	int ret;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	slave = bond_first_slave(bond);</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	slave = bond_first_slave_rcu(bond);</div><div class='ctx'> 	if (!slave)</div><div class='del'>-		return 0;</div><div class='add'>+		goto out;</div><div class='ctx'> 	slave_ops = slave-&gt;dev-&gt;netdev_ops;</div><div class='ctx'> 	if (!slave_ops-&gt;ndo_neigh_setup)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	parms.neigh_setup = NULL;</div><div class='del'>-	parms.neigh_cleanup = NULL;</div><div class='del'>-	ret = slave_ops-&gt;ndo_neigh_setup(slave-&gt;dev, &amp;parms);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='del'>-	/* Assign slave's neigh_cleanup to neighbour in case cleanup is called</div><div class='del'>-	 * after the last slave has been detached.  Assumes that all slaves</div><div class='del'>-	 * utilize the same neigh_cleanup (true at this writing as only user</div><div class='del'>-	 * is ipoib).</div><div class='add'>+	/* TODO: find another way [1] to implement this.</div><div class='add'>+	 * Passing a zeroed structure is fragile,</div><div class='add'>+	 * but at least we do not pass garbage.</div><div class='add'>+	 *</div><div class='add'>+	 * [1] One way would be that ndo_neigh_setup() never touch</div><div class='add'>+	 *     struct neigh_parms, but propagate the new neigh_setup()</div><div class='add'>+	 *     back to ___neigh_create() / neigh_parms_alloc()</div><div class='ctx'> 	 */</div><div class='del'>-	n-&gt;parms-&gt;neigh_cleanup = parms.neigh_cleanup;</div><div class='add'>+	memset(&amp;parms, 0, sizeof(parms));</div><div class='add'>+	ret = slave_ops-&gt;ndo_neigh_setup(slave-&gt;dev, &amp;parms);</div><div class='ctx'> </div><div class='del'>-	if (!parms.neigh_setup)</div><div class='del'>-		return 0;</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='del'>-	return parms.neigh_setup(n);</div><div class='add'>+	if (parms.neigh_setup)</div><div class='add'>+		ret = parms.neigh_setup(n);</div><div class='add'>+out:</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* The bonding ndo_neigh_setup is called at init time beofre any</div><div class='hunk'>@@ -3501,7 +4666,7 @@ static int bond_change_mtu(struct net_device *bond_dev, int new_mtu)</div><div class='ctx'> 	netdev_dbg(bond_dev, "bond=%p, new_mtu=%d\n", bond, new_mtu);</div><div class='ctx'> </div><div class='ctx'> 	bond_for_each_slave(bond, slave, iter) {</div><div class='del'>-		netdev_dbg(bond_dev, "s %p c_m %p\n",</div><div class='add'>+		slave_dbg(bond_dev, slave-&gt;dev, "s %p c_m %p\n",</div><div class='ctx'> 			   slave, slave-&gt;dev-&gt;netdev_ops-&gt;ndo_change_mtu);</div><div class='ctx'> </div><div class='ctx'> 		res = dev_set_mtu(slave-&gt;dev, new_mtu);</div><div class='hunk'>@@ -3515,13 +4680,13 @@ static int bond_change_mtu(struct net_device *bond_dev, int new_mtu)</div><div class='ctx'> 			 * means changing their mtu from timer context, which</div><div class='ctx'> 			 * is probably not a good idea.</div><div class='ctx'> 			 */</div><div class='del'>-			netdev_dbg(bond_dev, "err %d %s\n", res,</div><div class='del'>-				   slave-&gt;dev-&gt;name);</div><div class='add'>+			slave_dbg(bond_dev, slave-&gt;dev, "err %d setting mtu to %d\n",</div><div class='add'>+				  res, new_mtu);</div><div class='ctx'> 			goto unwind;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	bond_dev-&gt;mtu = new_mtu;</div><div class='add'>+	WRITE_ONCE(bond_dev-&gt;mtu, new_mtu);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -3534,10 +4699,9 @@ unwind:</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		tmp_res = dev_set_mtu(rollback_slave-&gt;dev, bond_dev-&gt;mtu);</div><div class='del'>-		if (tmp_res) {</div><div class='del'>-			netdev_dbg(bond_dev, "unwind err %d dev %s\n",</div><div class='del'>-				   tmp_res, rollback_slave-&gt;dev-&gt;name);</div><div class='del'>-		}</div><div class='add'>+		if (tmp_res)</div><div class='add'>+			slave_dbg(bond_dev, rollback_slave-&gt;dev, "unwind err %d\n",</div><div class='add'>+				  tmp_res);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return res;</div><div class='hunk'>@@ -3553,7 +4717,7 @@ static int bond_set_mac_address(struct net_device *bond_dev, void *addr)</div><div class='ctx'> {</div><div class='ctx'> 	struct bonding *bond = netdev_priv(bond_dev);</div><div class='ctx'> 	struct slave *slave, *rollback_slave;</div><div class='del'>-	struct sockaddr *sa = addr, tmp_sa;</div><div class='add'>+	struct sockaddr_storage *ss = addr, tmp_ss;</div><div class='ctx'> 	struct list_head *iter;</div><div class='ctx'> 	int res = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -3561,7 +4725,7 @@ static int bond_set_mac_address(struct net_device *bond_dev, void *addr)</div><div class='ctx'> 		return bond_alb_set_mac_address(bond_dev, addr);</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-	netdev_dbg(bond_dev, "bond=%p\n", bond);</div><div class='add'>+	netdev_dbg(bond_dev, "%s: bond=%p\n", __func__, bond);</div><div class='ctx'> </div><div class='ctx'> 	/* If fail_over_mac is enabled, do nothing and return success.</div><div class='ctx'> 	 * Returning an error causes ifenslave to fail.</div><div class='hunk'>@@ -3570,12 +4734,13 @@ static int bond_set_mac_address(struct net_device *bond_dev, void *addr)</div><div class='ctx'> 	    BOND_MODE(bond) == BOND_MODE_ACTIVEBACKUP)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	if (!is_valid_ether_addr(sa-&gt;sa_data))</div><div class='add'>+	if (!is_valid_ether_addr(ss-&gt;__data))</div><div class='ctx'> 		return -EADDRNOTAVAIL;</div><div class='ctx'> </div><div class='ctx'> 	bond_for_each_slave(bond, slave, iter) {</div><div class='del'>-		netdev_dbg(bond_dev, "slave %p %s\n", slave, slave-&gt;dev-&gt;name);</div><div class='del'>-		res = dev_set_mac_address(slave-&gt;dev, addr);</div><div class='add'>+		slave_dbg(bond_dev, slave-&gt;dev, "%s: slave=%p\n",</div><div class='add'>+			  __func__, slave);</div><div class='add'>+		res = dev_set_mac_address(slave-&gt;dev, addr, NULL);</div><div class='ctx'> 		if (res) {</div><div class='ctx'> 			/* TODO: consider downing the slave</div><div class='ctx'> 			 * and retry ?</div><div class='hunk'>@@ -3583,18 +4748,19 @@ static int bond_set_mac_address(struct net_device *bond_dev, void *addr)</div><div class='ctx'> 			 * breakage anyway until ARP finish</div><div class='ctx'> 			 * updating, so...</div><div class='ctx'> 			 */</div><div class='del'>-			netdev_dbg(bond_dev, "err %d %s\n", res, slave-&gt;dev-&gt;name);</div><div class='add'>+			slave_dbg(bond_dev, slave-&gt;dev, "%s: err %d\n",</div><div class='add'>+				  __func__, res);</div><div class='ctx'> 			goto unwind;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* success */</div><div class='del'>-	memcpy(bond_dev-&gt;dev_addr, sa-&gt;sa_data, bond_dev-&gt;addr_len);</div><div class='add'>+	dev_addr_set(bond_dev, ss-&gt;__data);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> unwind:</div><div class='del'>-	memcpy(tmp_sa.sa_data, bond_dev-&gt;dev_addr, bond_dev-&gt;addr_len);</div><div class='del'>-	tmp_sa.sa_family = bond_dev-&gt;type;</div><div class='add'>+	memcpy(tmp_ss.__data, bond_dev-&gt;dev_addr, bond_dev-&gt;addr_len);</div><div class='add'>+	tmp_ss.ss_family = bond_dev-&gt;type;</div><div class='ctx'> </div><div class='ctx'> 	/* unwind from head to the slave that failed */</div><div class='ctx'> 	bond_for_each_slave(bond, rollback_slave, iter) {</div><div class='hunk'>@@ -3603,10 +4769,10 @@ unwind:</div><div class='ctx'> 		if (rollback_slave == slave)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		tmp_res = dev_set_mac_address(rollback_slave-&gt;dev, &amp;tmp_sa);</div><div class='add'>+		tmp_res = dev_set_mac_address(rollback_slave-&gt;dev, &amp;tmp_ss, NULL);</div><div class='ctx'> 		if (tmp_res) {</div><div class='del'>-			netdev_dbg(bond_dev, "unwind err %d dev %s\n",</div><div class='del'>-				   tmp_res, rollback_slave-&gt;dev-&gt;name);</div><div class='add'>+			slave_dbg(bond_dev, rollback_slave-&gt;dev, "%s: unwind err %d\n",</div><div class='add'>+				   __func__, tmp_res);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3614,16 +4780,15 @@ unwind:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * bond_xmit_slave_id - transmit skb through slave with slave_id</div><div class='add'>+ * bond_get_slave_by_id - get xmit slave with slave_id</div><div class='ctx'>  * @bond: bonding device that is transmitting</div><div class='del'>- * @skb: buffer to transmit</div><div class='ctx'>  * @slave_id: slave id up to slave_cnt-1 through which to transmit</div><div class='ctx'>  *</div><div class='del'>- * This function tries to transmit through slave with slave_id but in case</div><div class='add'>+ * This function tries to get slave with slave_id but in case</div><div class='ctx'>  * it fails, it tries to find the first available slave for transmission.</div><div class='del'>- * The skb is consumed in all cases, thus the function is void.</div><div class='ctx'>  */</div><div class='del'>-static void bond_xmit_slave_id(struct bonding *bond, struct sk_buff *skb, int slave_id)</div><div class='add'>+static struct slave *bond_get_slave_by_id(struct bonding *bond,</div><div class='add'>+					  int slave_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct list_head *iter;</div><div class='ctx'> 	struct slave *slave;</div><div class='hunk'>@@ -3632,10 +4797,8 @@ static void bond_xmit_slave_id(struct bonding *bond, struct sk_buff *skb, int sl</div><div class='ctx'> 	/* Here we start from the slave with slave_id */</div><div class='ctx'> 	bond_for_each_slave_rcu(bond, slave, iter) {</div><div class='ctx'> 		if (--i &lt; 0) {</div><div class='del'>-			if (bond_slave_can_tx(slave)) {</div><div class='del'>-				bond_dev_queue_xmit(bond, skb, slave-&gt;dev);</div><div class='del'>-				return;</div><div class='del'>-			}</div><div class='add'>+			if (bond_slave_can_tx(slave))</div><div class='add'>+				return slave;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3644,13 +4807,11 @@ static void bond_xmit_slave_id(struct bonding *bond, struct sk_buff *skb, int sl</div><div class='ctx'> 	bond_for_each_slave_rcu(bond, slave, iter) {</div><div class='ctx'> 		if (--i &lt; 0)</div><div class='ctx'> 			break;</div><div class='del'>-		if (bond_slave_can_tx(slave)) {</div><div class='del'>-			bond_dev_queue_xmit(bond, skb, slave-&gt;dev);</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='add'>+		if (bond_slave_can_tx(slave))</div><div class='add'>+			return slave;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* no slave that can tx has been found */</div><div class='del'>-	bond_tx_drop(bond-&gt;dev, skb);</div><div class='add'>+	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -3669,28 +4830,28 @@ static u32 bond_rr_gen_slave_id(struct bonding *bond)</div><div class='ctx'> </div><div class='ctx'> 	switch (packets_per_slave) {</div><div class='ctx'> 	case 0:</div><div class='del'>-		slave_id = prandom_u32();</div><div class='add'>+		slave_id = get_random_u32();</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 1:</div><div class='del'>-		slave_id = bond-&gt;rr_tx_counter;</div><div class='add'>+		slave_id = this_cpu_inc_return(*bond-&gt;rr_tx_counter);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		reciprocal_packets_per_slave =</div><div class='ctx'> 			bond-&gt;params.reciprocal_packets_per_slave;</div><div class='del'>-		slave_id = reciprocal_divide(bond-&gt;rr_tx_counter,</div><div class='add'>+		slave_id = this_cpu_inc_return(*bond-&gt;rr_tx_counter);</div><div class='add'>+		slave_id = reciprocal_divide(slave_id,</div><div class='ctx'> 					     reciprocal_packets_per_slave);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='del'>-	bond-&gt;rr_tx_counter++;</div><div class='ctx'> </div><div class='ctx'> 	return slave_id;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int bond_xmit_roundrobin(struct sk_buff *skb, struct net_device *bond_dev)</div><div class='add'>+static struct slave *bond_xmit_roundrobin_slave_get(struct bonding *bond,</div><div class='add'>+						    struct sk_buff *skb)</div><div class='ctx'> {</div><div class='del'>-	struct bonding *bond = netdev_priv(bond_dev);</div><div class='del'>-	struct iphdr *iph = ip_hdr(skb);</div><div class='ctx'> 	struct slave *slave;</div><div class='add'>+	int slave_cnt;</div><div class='ctx'> 	u32 slave_id;</div><div class='ctx'> </div><div class='ctx'> 	/* Start with the curr_active_slave that joined the bond as the</div><div class='hunk'>@@ -3699,41 +4860,104 @@ static int bond_xmit_roundrobin(struct sk_buff *skb, struct net_device *bond_dev</div><div class='ctx'> 	 * send the join/membership reports.  The curr_active_slave found</div><div class='ctx'> 	 * will send all of this type of traffic.</div><div class='ctx'> 	 */</div><div class='del'>-	if (iph-&gt;protocol == IPPROTO_IGMP &amp;&amp; skb-&gt;protocol == htons(ETH_P_IP)) {</div><div class='del'>-		slave = rcu_dereference(bond-&gt;curr_active_slave);</div><div class='del'>-		if (slave)</div><div class='del'>-			bond_dev_queue_xmit(bond, skb, slave-&gt;dev);</div><div class='del'>-		else</div><div class='del'>-			bond_xmit_slave_id(bond, skb, 0);</div><div class='del'>-	} else {</div><div class='del'>-		int slave_cnt = ACCESS_ONCE(bond-&gt;slave_cnt);</div><div class='add'>+	if (skb-&gt;protocol == htons(ETH_P_IP)) {</div><div class='add'>+		int noff = skb_network_offset(skb);</div><div class='add'>+		struct iphdr *iph;</div><div class='ctx'> </div><div class='del'>-		if (likely(slave_cnt)) {</div><div class='del'>-			slave_id = bond_rr_gen_slave_id(bond);</div><div class='del'>-			bond_xmit_slave_id(bond, skb, slave_id % slave_cnt);</div><div class='del'>-		} else {</div><div class='del'>-			bond_tx_drop(bond_dev, skb);</div><div class='add'>+		if (unlikely(!pskb_may_pull(skb, noff + sizeof(*iph))))</div><div class='add'>+			goto non_igmp;</div><div class='add'>+</div><div class='add'>+		iph = ip_hdr(skb);</div><div class='add'>+		if (iph-&gt;protocol == IPPROTO_IGMP) {</div><div class='add'>+			slave = rcu_dereference(bond-&gt;curr_active_slave);</div><div class='add'>+			if (slave)</div><div class='add'>+				return slave;</div><div class='add'>+			return bond_get_slave_by_id(bond, 0);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return NETDEV_TX_OK;</div><div class='add'>+non_igmp:</div><div class='add'>+	slave_cnt = READ_ONCE(bond-&gt;slave_cnt);</div><div class='add'>+	if (likely(slave_cnt)) {</div><div class='add'>+		slave_id = bond_rr_gen_slave_id(bond) % slave_cnt;</div><div class='add'>+		return bond_get_slave_by_id(bond, slave_id);</div><div class='add'>+	}</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct slave *bond_xdp_xmit_roundrobin_slave_get(struct bonding *bond,</div><div class='add'>+							struct xdp_buff *xdp)</div><div class='add'>+{</div><div class='add'>+	struct slave *slave;</div><div class='add'>+	int slave_cnt;</div><div class='add'>+	u32 slave_id;</div><div class='add'>+	const struct ethhdr *eth;</div><div class='add'>+	void *data = xdp-&gt;data;</div><div class='add'>+</div><div class='add'>+	if (data + sizeof(struct ethhdr) &gt; xdp-&gt;data_end)</div><div class='add'>+		goto non_igmp;</div><div class='add'>+</div><div class='add'>+	eth = (struct ethhdr *)data;</div><div class='add'>+	data += sizeof(struct ethhdr);</div><div class='add'>+</div><div class='add'>+	/* See comment on IGMP in bond_xmit_roundrobin_slave_get() */</div><div class='add'>+	if (eth-&gt;h_proto == htons(ETH_P_IP)) {</div><div class='add'>+		const struct iphdr *iph;</div><div class='add'>+</div><div class='add'>+		if (data + sizeof(struct iphdr) &gt; xdp-&gt;data_end)</div><div class='add'>+			goto non_igmp;</div><div class='add'>+</div><div class='add'>+		iph = (struct iphdr *)data;</div><div class='add'>+</div><div class='add'>+		if (iph-&gt;protocol == IPPROTO_IGMP) {</div><div class='add'>+			slave = rcu_dereference(bond-&gt;curr_active_slave);</div><div class='add'>+			if (slave)</div><div class='add'>+				return slave;</div><div class='add'>+			return bond_get_slave_by_id(bond, 0);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+non_igmp:</div><div class='add'>+	slave_cnt = READ_ONCE(bond-&gt;slave_cnt);</div><div class='add'>+	if (likely(slave_cnt)) {</div><div class='add'>+		slave_id = bond_rr_gen_slave_id(bond) % slave_cnt;</div><div class='add'>+		return bond_get_slave_by_id(bond, slave_id);</div><div class='add'>+	}</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static netdev_tx_t bond_xmit_roundrobin(struct sk_buff *skb,</div><div class='add'>+					struct net_device *bond_dev)</div><div class='add'>+{</div><div class='add'>+	struct bonding *bond = netdev_priv(bond_dev);</div><div class='add'>+	struct slave *slave;</div><div class='add'>+</div><div class='add'>+	slave = bond_xmit_roundrobin_slave_get(bond, skb);</div><div class='add'>+	if (likely(slave))</div><div class='add'>+		return bond_dev_queue_xmit(bond, skb, slave-&gt;dev);</div><div class='add'>+</div><div class='add'>+	return bond_tx_drop(bond_dev, skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct slave *bond_xmit_activebackup_slave_get(struct bonding *bond)</div><div class='add'>+{</div><div class='add'>+	return rcu_dereference(bond-&gt;curr_active_slave);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* In active-backup mode, we know that bond-&gt;curr_active_slave is always valid if</div><div class='ctx'>  * the bond has a usable interface.</div><div class='ctx'>  */</div><div class='del'>-static int bond_xmit_activebackup(struct sk_buff *skb, struct net_device *bond_dev)</div><div class='add'>+static netdev_tx_t bond_xmit_activebackup(struct sk_buff *skb,</div><div class='add'>+					  struct net_device *bond_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct bonding *bond = netdev_priv(bond_dev);</div><div class='ctx'> 	struct slave *slave;</div><div class='ctx'> </div><div class='del'>-	slave = rcu_dereference(bond-&gt;curr_active_slave);</div><div class='add'>+	slave = bond_xmit_activebackup_slave_get(bond);</div><div class='ctx'> 	if (slave)</div><div class='del'>-		bond_dev_queue_xmit(bond, skb, slave-&gt;dev);</div><div class='del'>-	else</div><div class='del'>-		bond_tx_drop(bond_dev, skb);</div><div class='add'>+		return bond_dev_queue_xmit(bond, skb, slave-&gt;dev);</div><div class='ctx'> </div><div class='del'>-	return NETDEV_TX_OK;</div><div class='add'>+	return bond_tx_drop(bond_dev, skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Use this to update slave_array when (a) it's not appropriate to update</div><div class='hunk'>@@ -3767,54 +4991,96 @@ err:</div><div class='ctx'> 	bond_slave_arr_work_rearm(bond, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void bond_skip_slave(struct bond_up_slave *slaves,</div><div class='add'>+			    struct slave *skipslave)</div><div class='add'>+{</div><div class='add'>+	int idx;</div><div class='add'>+</div><div class='add'>+	/* Rare situation where caller has asked to skip a specific</div><div class='add'>+	 * slave but allocation failed (most likely!). BTW this is</div><div class='add'>+	 * only possible when the call is initiated from</div><div class='add'>+	 * __bond_release_one(). In this situation; overwrite the</div><div class='add'>+	 * skipslave entry in the array with the last entry from the</div><div class='add'>+	 * array to avoid a situation where the xmit path may choose</div><div class='add'>+	 * this to-be-skipped slave to send a packet out.</div><div class='add'>+	 */</div><div class='add'>+	for (idx = 0; slaves &amp;&amp; idx &lt; slaves-&gt;count; idx++) {</div><div class='add'>+		if (skipslave == slaves-&gt;arr[idx]) {</div><div class='add'>+			slaves-&gt;arr[idx] =</div><div class='add'>+				slaves-&gt;arr[slaves-&gt;count - 1];</div><div class='add'>+			slaves-&gt;count--;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bond_set_slave_arr(struct bonding *bond,</div><div class='add'>+			       struct bond_up_slave *usable_slaves,</div><div class='add'>+			       struct bond_up_slave *all_slaves)</div><div class='add'>+{</div><div class='add'>+	struct bond_up_slave *usable, *all;</div><div class='add'>+</div><div class='add'>+	usable = rtnl_dereference(bond-&gt;usable_slaves);</div><div class='add'>+	rcu_assign_pointer(bond-&gt;usable_slaves, usable_slaves);</div><div class='add'>+	kfree_rcu(usable, rcu);</div><div class='add'>+</div><div class='add'>+	all = rtnl_dereference(bond-&gt;all_slaves);</div><div class='add'>+	rcu_assign_pointer(bond-&gt;all_slaves, all_slaves);</div><div class='add'>+	kfree_rcu(all, rcu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bond_reset_slave_arr(struct bonding *bond)</div><div class='add'>+{</div><div class='add'>+	bond_set_slave_arr(bond, NULL, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Build the usable slaves array in control path for modes that use xmit-hash</div><div class='ctx'>  * to determine the slave interface -</div><div class='ctx'>  * (a) BOND_MODE_8023AD</div><div class='ctx'>  * (b) BOND_MODE_XOR</div><div class='del'>- * (c) BOND_MODE_TLB &amp;&amp; tlb_dynamic_lb == 0</div><div class='add'>+ * (c) (BOND_MODE_TLB || BOND_MODE_ALB) &amp;&amp; tlb_dynamic_lb == 0</div><div class='ctx'>  *</div><div class='ctx'>  * The caller is expected to hold RTNL only and NO other lock!</div><div class='ctx'>  */</div><div class='ctx'> int bond_update_slave_arr(struct bonding *bond, struct slave *skipslave)</div><div class='ctx'> {</div><div class='add'>+	struct bond_up_slave *usable_slaves = NULL, *all_slaves = NULL;</div><div class='ctx'> 	struct slave *slave;</div><div class='ctx'> 	struct list_head *iter;</div><div class='del'>-	struct bond_up_slave *new_arr, *old_arr;</div><div class='del'>-	int slaves_in_agg;</div><div class='ctx'> 	int agg_id = 0;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_LOCKDEP</div><div class='del'>-	WARN_ON(lockdep_is_held(&amp;bond-&gt;mode_lock));</div><div class='del'>-#endif</div><div class='add'>+	might_sleep();</div><div class='ctx'> </div><div class='del'>-	new_arr = kzalloc(offsetof(struct bond_up_slave, arr[bond-&gt;slave_cnt]),</div><div class='del'>-			  GFP_KERNEL);</div><div class='del'>-	if (!new_arr) {</div><div class='add'>+	usable_slaves = kzalloc(struct_size(usable_slaves, arr,</div><div class='add'>+					    bond-&gt;slave_cnt), GFP_KERNEL);</div><div class='add'>+	all_slaves = kzalloc(struct_size(all_slaves, arr,</div><div class='add'>+					 bond-&gt;slave_cnt), GFP_KERNEL);</div><div class='add'>+	if (!usable_slaves || !all_slaves) {</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='del'>-		pr_err("Failed to build slave-array.\n");</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (BOND_MODE(bond) == BOND_MODE_8023AD) {</div><div class='ctx'> 		struct ad_info ad_info;</div><div class='ctx'> </div><div class='add'>+		spin_lock_bh(&amp;bond-&gt;mode_lock);</div><div class='ctx'> 		if (bond_3ad_get_active_agg_info(bond, &amp;ad_info)) {</div><div class='add'>+			spin_unlock_bh(&amp;bond-&gt;mode_lock);</div><div class='ctx'> 			pr_debug("bond_3ad_get_active_agg_info failed\n");</div><div class='del'>-			kfree_rcu(new_arr, rcu);</div><div class='ctx'> 			/* No active aggragator means it's not safe to use</div><div class='ctx'> 			 * the previous array.</div><div class='ctx'> 			 */</div><div class='del'>-			old_arr = rtnl_dereference(bond-&gt;slave_arr);</div><div class='del'>-			if (old_arr) {</div><div class='del'>-				RCU_INIT_POINTER(bond-&gt;slave_arr, NULL);</div><div class='del'>-				kfree_rcu(old_arr, rcu);</div><div class='del'>-			}</div><div class='add'>+			bond_reset_slave_arr(bond);</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='del'>-		slaves_in_agg = ad_info.ports;</div><div class='add'>+		spin_unlock_bh(&amp;bond-&gt;mode_lock);</div><div class='ctx'> 		agg_id = ad_info.aggregator_id;</div><div class='ctx'> 	}</div><div class='ctx'> 	bond_for_each_slave(bond, slave, iter) {</div><div class='add'>+		if (skipslave == slave)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		all_slaves-&gt;arr[all_slaves-&gt;count++] = slave;</div><div class='ctx'> 		if (BOND_MODE(bond) == BOND_MODE_8023AD) {</div><div class='ctx'> 			struct aggregator *agg;</div><div class='ctx'> </div><div class='hunk'>@@ -3824,90 +5090,161 @@ int bond_update_slave_arr(struct bonding *bond, struct slave *skipslave)</div><div class='ctx'> 		}</div><div class='ctx'> 		if (!bond_slave_can_tx(slave))</div><div class='ctx'> 			continue;</div><div class='del'>-		if (skipslave == slave)</div><div class='del'>-			continue;</div><div class='del'>-		new_arr-&gt;arr[new_arr-&gt;count++] = slave;</div><div class='add'>+</div><div class='add'>+		slave_dbg(bond-&gt;dev, slave-&gt;dev, "Adding slave to tx hash array[%d]\n",</div><div class='add'>+			  usable_slaves-&gt;count);</div><div class='add'>+</div><div class='add'>+		usable_slaves-&gt;arr[usable_slaves-&gt;count++] = slave;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	old_arr = rtnl_dereference(bond-&gt;slave_arr);</div><div class='del'>-	rcu_assign_pointer(bond-&gt;slave_arr, new_arr);</div><div class='del'>-	if (old_arr)</div><div class='del'>-		kfree_rcu(old_arr, rcu);</div><div class='add'>+	bond_set_slave_arr(bond, usable_slaves, all_slaves);</div><div class='add'>+	return ret;</div><div class='ctx'> out:</div><div class='ctx'> 	if (ret != 0 &amp;&amp; skipslave) {</div><div class='del'>-		int idx;</div><div class='del'>-</div><div class='del'>-		/* Rare situation where caller has asked to skip a specific</div><div class='del'>-		 * slave but allocation failed (most likely!). BTW this is</div><div class='del'>-		 * only possible when the call is initiated from</div><div class='del'>-		 * __bond_release_one(). In this situation; overwrite the</div><div class='del'>-		 * skipslave entry in the array with the last entry from the</div><div class='del'>-		 * array to avoid a situation where the xmit path may choose</div><div class='del'>-		 * this to-be-skipped slave to send a packet out.</div><div class='del'>-		 */</div><div class='del'>-		old_arr = rtnl_dereference(bond-&gt;slave_arr);</div><div class='del'>-		for (idx = 0; idx &lt; old_arr-&gt;count; idx++) {</div><div class='del'>-			if (skipslave == old_arr-&gt;arr[idx]) {</div><div class='del'>-				old_arr-&gt;arr[idx] =</div><div class='del'>-				    old_arr-&gt;arr[old_arr-&gt;count-1];</div><div class='del'>-				old_arr-&gt;count--;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='add'>+		bond_skip_slave(rtnl_dereference(bond-&gt;all_slaves),</div><div class='add'>+				skipslave);</div><div class='add'>+		bond_skip_slave(rtnl_dereference(bond-&gt;usable_slaves),</div><div class='add'>+				skipslave);</div><div class='ctx'> 	}</div><div class='add'>+	kfree_rcu(all_slaves, rcu);</div><div class='add'>+	kfree_rcu(usable_slaves, rcu);</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct slave *bond_xmit_3ad_xor_slave_get(struct bonding *bond,</div><div class='add'>+						 struct sk_buff *skb,</div><div class='add'>+						 struct bond_up_slave *slaves)</div><div class='add'>+{</div><div class='add'>+	struct slave *slave;</div><div class='add'>+	unsigned int count;</div><div class='add'>+	u32 hash;</div><div class='add'>+</div><div class='add'>+	hash = bond_xmit_hash(bond, skb);</div><div class='add'>+	count = slaves ? READ_ONCE(slaves-&gt;count) : 0;</div><div class='add'>+	if (unlikely(!count))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	slave = slaves-&gt;arr[hash % count];</div><div class='add'>+	return slave;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct slave *bond_xdp_xmit_3ad_xor_slave_get(struct bonding *bond,</div><div class='add'>+						     struct xdp_buff *xdp)</div><div class='add'>+{</div><div class='add'>+	struct bond_up_slave *slaves;</div><div class='add'>+	unsigned int count;</div><div class='add'>+	u32 hash;</div><div class='add'>+</div><div class='add'>+	hash = bond_xmit_hash_xdp(bond, xdp);</div><div class='add'>+	slaves = rcu_dereference(bond-&gt;usable_slaves);</div><div class='add'>+	count = slaves ? READ_ONCE(slaves-&gt;count) : 0;</div><div class='add'>+	if (unlikely(!count))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	return slaves-&gt;arr[hash % count];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool bond_should_broadcast_neighbor(struct sk_buff *skb,</div><div class='add'>+					   struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct bonding *bond = netdev_priv(dev);</div><div class='add'>+	struct {</div><div class='add'>+		struct ipv6hdr ip6;</div><div class='add'>+		struct icmp6hdr icmp6;</div><div class='add'>+	} *combined, _combined;</div><div class='add'>+</div><div class='add'>+	if (!static_branch_unlikely(&amp;bond_bcast_neigh_enabled))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (!bond-&gt;params.broadcast_neighbor)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (skb-&gt;protocol == htons(ETH_P_ARP))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	if (skb-&gt;protocol == htons(ETH_P_IPV6)) {</div><div class='add'>+		combined = skb_header_pointer(skb, skb_mac_header_len(skb),</div><div class='add'>+					      sizeof(_combined),</div><div class='add'>+					      &amp;_combined);</div><div class='add'>+		if (combined &amp;&amp; combined-&gt;ip6.nexthdr == NEXTHDR_ICMP &amp;&amp;</div><div class='add'>+		    (combined-&gt;icmp6.icmp6_type == NDISC_NEIGHBOUR_SOLICITATION ||</div><div class='add'>+		     combined-&gt;icmp6.icmp6_type == NDISC_NEIGHBOUR_ADVERTISEMENT))</div><div class='add'>+			return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Use this Xmit function for 3AD as well as XOR modes. The current</div><div class='ctx'>  * usable slave array is formed in the control path. The xmit function</div><div class='ctx'>  * just calculates hash and sends the packet out.</div><div class='ctx'>  */</div><div class='del'>-static int bond_3ad_xor_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='add'>+static netdev_tx_t bond_3ad_xor_xmit(struct sk_buff *skb,</div><div class='add'>+				     struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct bonding *bond = netdev_priv(dev);</div><div class='del'>-	struct slave *slave;</div><div class='ctx'> 	struct bond_up_slave *slaves;</div><div class='del'>-	unsigned int count;</div><div class='add'>+	struct slave *slave;</div><div class='ctx'> </div><div class='del'>-	slaves = rcu_dereference(bond-&gt;slave_arr);</div><div class='del'>-	count = slaves ? ACCESS_ONCE(slaves-&gt;count) : 0;</div><div class='del'>-	if (likely(count)) {</div><div class='del'>-		slave = slaves-&gt;arr[bond_xmit_hash(bond, skb) % count];</div><div class='del'>-		bond_dev_queue_xmit(bond, skb, slave-&gt;dev);</div><div class='del'>-	} else {</div><div class='del'>-		bond_tx_drop(dev, skb);</div><div class='del'>-	}</div><div class='add'>+	slaves = rcu_dereference(bond-&gt;usable_slaves);</div><div class='add'>+	slave = bond_xmit_3ad_xor_slave_get(bond, skb, slaves);</div><div class='add'>+	if (likely(slave))</div><div class='add'>+		return bond_dev_queue_xmit(bond, skb, slave-&gt;dev);</div><div class='ctx'> </div><div class='del'>-	return NETDEV_TX_OK;</div><div class='add'>+	return bond_tx_drop(dev, skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* in broadcast mode, we send everything to all usable interfaces. */</div><div class='del'>-static int bond_xmit_broadcast(struct sk_buff *skb, struct net_device *bond_dev)</div><div class='add'>+/* in broadcast mode, we send everything to all or usable slave interfaces.</div><div class='add'>+ * under rcu_read_lock when this function is called.</div><div class='add'>+ */</div><div class='add'>+static netdev_tx_t bond_xmit_broadcast(struct sk_buff *skb,</div><div class='add'>+				       struct net_device *bond_dev,</div><div class='add'>+				       bool all_slaves)</div><div class='ctx'> {</div><div class='ctx'> 	struct bonding *bond = netdev_priv(bond_dev);</div><div class='del'>-	struct slave *slave = NULL;</div><div class='del'>-	struct list_head *iter;</div><div class='add'>+	struct bond_up_slave *slaves;</div><div class='add'>+	bool xmit_suc = false;</div><div class='add'>+	bool skb_used = false;</div><div class='add'>+	int slaves_count, i;</div><div class='ctx'> </div><div class='del'>-	bond_for_each_slave_rcu(bond, slave, iter) {</div><div class='del'>-		if (bond_is_last_slave(bond, slave))</div><div class='del'>-			break;</div><div class='del'>-		if (bond_slave_is_up(slave) &amp;&amp; slave-&gt;link == BOND_LINK_UP) {</div><div class='del'>-			struct sk_buff *skb2 = skb_clone(skb, GFP_ATOMIC);</div><div class='add'>+	if (all_slaves)</div><div class='add'>+		slaves = rcu_dereference(bond-&gt;all_slaves);</div><div class='add'>+	else</div><div class='add'>+		slaves = rcu_dereference(bond-&gt;usable_slaves);</div><div class='add'>+</div><div class='add'>+	slaves_count = slaves ? READ_ONCE(slaves-&gt;count) : 0;</div><div class='add'>+	for (i = 0; i &lt; slaves_count; i++) {</div><div class='add'>+		struct slave *slave = slaves-&gt;arr[i];</div><div class='add'>+		struct sk_buff *skb2;</div><div class='add'>+</div><div class='add'>+		if (!(bond_slave_is_up(slave) &amp;&amp; slave-&gt;link == BOND_LINK_UP))</div><div class='add'>+			continue;</div><div class='ctx'> </div><div class='add'>+		if (bond_is_last_slave(bond, slave)) {</div><div class='add'>+			skb2 = skb;</div><div class='add'>+			skb_used = true;</div><div class='add'>+		} else {</div><div class='add'>+			skb2 = skb_clone(skb, GFP_ATOMIC);</div><div class='ctx'> 			if (!skb2) {</div><div class='ctx'> 				net_err_ratelimited("%s: Error: %s: skb_clone() failed\n",</div><div class='ctx'> 						    bond_dev-&gt;name, __func__);</div><div class='ctx'> 				continue;</div><div class='ctx'> 			}</div><div class='del'>-			bond_dev_queue_xmit(bond, skb2, slave-&gt;dev);</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		if (bond_dev_queue_xmit(bond, skb2, slave-&gt;dev) == NETDEV_TX_OK)</div><div class='add'>+			xmit_suc = true;</div><div class='ctx'> 	}</div><div class='del'>-	if (slave &amp;&amp; bond_slave_is_up(slave) &amp;&amp; slave-&gt;link == BOND_LINK_UP)</div><div class='del'>-		bond_dev_queue_xmit(bond, skb, slave-&gt;dev);</div><div class='del'>-	else</div><div class='del'>-		bond_tx_drop(bond_dev, skb);</div><div class='ctx'> </div><div class='del'>-	return NETDEV_TX_OK;</div><div class='add'>+	if (!skb_used)</div><div class='add'>+		dev_kfree_skb_any(skb);</div><div class='add'>+</div><div class='add'>+	if (xmit_suc)</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+	dev_core_stats_tx_dropped_inc(bond_dev);</div><div class='add'>+	return NET_XMIT_DROP;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*------------------------- Device initialization ---------------------------*/</div><div class='hunk'>@@ -3919,12 +5256,12 @@ static inline int bond_slave_override(struct bonding *bond,</div><div class='ctx'> 	struct slave *slave = NULL;</div><div class='ctx'> 	struct list_head *iter;</div><div class='ctx'> </div><div class='del'>-	if (!skb-&gt;queue_mapping)</div><div class='add'>+	if (!skb_rx_queue_recorded(skb))</div><div class='ctx'> 		return 1;</div><div class='ctx'> </div><div class='ctx'> 	/* Find out if any slaves have the same mapping as this skb. */</div><div class='ctx'> 	bond_for_each_slave_rcu(bond, slave, iter) {</div><div class='del'>-		if (slave-&gt;queue_id == skb-&gt;queue_mapping) {</div><div class='add'>+		if (READ_ONCE(slave-&gt;queue_id) == skb_get_queue_mapping(skb)) {</div><div class='ctx'> 			if (bond_slave_is_up(slave) &amp;&amp;</div><div class='ctx'> 			    slave-&gt;link == BOND_LINK_UP) {</div><div class='ctx'> 				bond_dev_queue_xmit(bond, skb, slave-&gt;dev);</div><div class='hunk'>@@ -3940,7 +5277,7 @@ static inline int bond_slave_override(struct bonding *bond,</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> static u16 bond_select_queue(struct net_device *dev, struct sk_buff *skb,</div><div class='del'>-			     void *accel_priv, select_queue_fallback_t fallback)</div><div class='add'>+			     struct net_device *sb_dev)</div><div class='ctx'> {</div><div class='ctx'> 	/* This helper function exists to help dev_pick_tx get the correct</div><div class='ctx'> 	 * destination queue.  Using a helper function skips a call to</div><div class='hunk'>@@ -3950,7 +5287,7 @@ static u16 bond_select_queue(struct net_device *dev, struct sk_buff *skb,</div><div class='ctx'> 	u16 txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) : 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Save the original txq to restore before passing to the driver */</div><div class='del'>-	qdisc_skb_cb(skb)-&gt;slave_dev_queue_mapping = skb-&gt;queue_mapping;</div><div class='add'>+	qdisc_skb_cb(skb)-&gt;slave_dev_queue_mapping = skb_get_queue_mapping(skb);</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(txq &gt;= dev-&gt;real_num_tx_queues)) {</div><div class='ctx'> 		do {</div><div class='hunk'>@@ -3960,6 +5297,143 @@ static u16 bond_select_queue(struct net_device *dev, struct sk_buff *skb,</div><div class='ctx'> 	return txq;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct net_device *bond_xmit_get_slave(struct net_device *master_dev,</div><div class='add'>+					      struct sk_buff *skb,</div><div class='add'>+					      bool all_slaves)</div><div class='add'>+{</div><div class='add'>+	struct bonding *bond = netdev_priv(master_dev);</div><div class='add'>+	struct bond_up_slave *slaves;</div><div class='add'>+	struct slave *slave = NULL;</div><div class='add'>+</div><div class='add'>+	switch (BOND_MODE(bond)) {</div><div class='add'>+	case BOND_MODE_ROUNDROBIN:</div><div class='add'>+		slave = bond_xmit_roundrobin_slave_get(bond, skb);</div><div class='add'>+		break;</div><div class='add'>+	case BOND_MODE_ACTIVEBACKUP:</div><div class='add'>+		slave = bond_xmit_activebackup_slave_get(bond);</div><div class='add'>+		break;</div><div class='add'>+	case BOND_MODE_8023AD:</div><div class='add'>+	case BOND_MODE_XOR:</div><div class='add'>+		if (all_slaves)</div><div class='add'>+			slaves = rcu_dereference(bond-&gt;all_slaves);</div><div class='add'>+		else</div><div class='add'>+			slaves = rcu_dereference(bond-&gt;usable_slaves);</div><div class='add'>+		slave = bond_xmit_3ad_xor_slave_get(bond, skb, slaves);</div><div class='add'>+		break;</div><div class='add'>+	case BOND_MODE_BROADCAST:</div><div class='add'>+		break;</div><div class='add'>+	case BOND_MODE_ALB:</div><div class='add'>+		slave = bond_xmit_alb_slave_get(bond, skb);</div><div class='add'>+		break;</div><div class='add'>+	case BOND_MODE_TLB:</div><div class='add'>+		slave = bond_xmit_tlb_slave_get(bond, skb);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		/* Should never happen, mode already checked */</div><div class='add'>+		WARN_ONCE(true, "Unknown bonding mode");</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (slave)</div><div class='add'>+		return slave-&gt;dev;</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bond_sk_to_flow(struct sock *sk, struct flow_keys *flow)</div><div class='add'>+{</div><div class='add'>+	switch (sk-&gt;sk_family) {</div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+	case AF_INET6:</div><div class='add'>+		if (ipv6_only_sock(sk) ||</div><div class='add'>+		    ipv6_addr_type(&amp;sk-&gt;sk_v6_daddr) != IPV6_ADDR_MAPPED) {</div><div class='add'>+			flow-&gt;control.addr_type = FLOW_DISSECTOR_KEY_IPV6_ADDRS;</div><div class='add'>+			flow-&gt;addrs.v6addrs.src = inet6_sk(sk)-&gt;saddr;</div><div class='add'>+			flow-&gt;addrs.v6addrs.dst = sk-&gt;sk_v6_daddr;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		fallthrough;</div><div class='add'>+#endif</div><div class='add'>+	default: /* AF_INET */</div><div class='add'>+		flow-&gt;control.addr_type = FLOW_DISSECTOR_KEY_IPV4_ADDRS;</div><div class='add'>+		flow-&gt;addrs.v4addrs.src = inet_sk(sk)-&gt;inet_rcv_saddr;</div><div class='add'>+		flow-&gt;addrs.v4addrs.dst = inet_sk(sk)-&gt;inet_daddr;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	flow-&gt;ports.src = inet_sk(sk)-&gt;inet_sport;</div><div class='add'>+	flow-&gt;ports.dst = inet_sk(sk)-&gt;inet_dport;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * bond_sk_hash_l34 - generate a hash value based on the socket's L3 and L4 fields</div><div class='add'>+ * @sk: socket to use for headers</div><div class='add'>+ *</div><div class='add'>+ * This function will extract the necessary field from the socket and use</div><div class='add'>+ * them to generate a hash based on the LAYER34 xmit_policy.</div><div class='add'>+ * Assumes that sk is a TCP or UDP socket.</div><div class='add'>+ */</div><div class='add'>+static u32 bond_sk_hash_l34(struct sock *sk)</div><div class='add'>+{</div><div class='add'>+	struct flow_keys flow;</div><div class='add'>+	u32 hash;</div><div class='add'>+</div><div class='add'>+	bond_sk_to_flow(sk, &amp;flow);</div><div class='add'>+</div><div class='add'>+	/* L4 */</div><div class='add'>+	memcpy(&amp;hash, &amp;flow.ports.ports, sizeof(hash));</div><div class='add'>+	/* L3 */</div><div class='add'>+	return bond_ip_hash(hash, &amp;flow, BOND_XMIT_POLICY_LAYER34);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct net_device *__bond_sk_get_lower_dev(struct bonding *bond,</div><div class='add'>+						  struct sock *sk)</div><div class='add'>+{</div><div class='add'>+	struct bond_up_slave *slaves;</div><div class='add'>+	struct slave *slave;</div><div class='add'>+	unsigned int count;</div><div class='add'>+	u32 hash;</div><div class='add'>+</div><div class='add'>+	slaves = rcu_dereference(bond-&gt;usable_slaves);</div><div class='add'>+	count = slaves ? READ_ONCE(slaves-&gt;count) : 0;</div><div class='add'>+	if (unlikely(!count))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	hash = bond_sk_hash_l34(sk);</div><div class='add'>+	slave = slaves-&gt;arr[hash % count];</div><div class='add'>+</div><div class='add'>+	return slave-&gt;dev;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct net_device *bond_sk_get_lower_dev(struct net_device *dev,</div><div class='add'>+						struct sock *sk)</div><div class='add'>+{</div><div class='add'>+	struct bonding *bond = netdev_priv(dev);</div><div class='add'>+	struct net_device *lower = NULL;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	if (bond_sk_check(bond))</div><div class='add'>+		lower = __bond_sk_get_lower_dev(bond, sk);</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+	return lower;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_TLS_DEVICE)</div><div class='add'>+static netdev_tx_t bond_tls_device_xmit(struct bonding *bond, struct sk_buff *skb,</div><div class='add'>+					struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct net_device *tls_netdev = rcu_dereference(tls_get_ctx(skb-&gt;sk)-&gt;netdev);</div><div class='add'>+</div><div class='add'>+	/* tls_netdev might become NULL, even if tls_is_skb_tx_device_offloaded</div><div class='add'>+	 * was true, if tls_device_down is running in parallel, but it's OK,</div><div class='add'>+	 * because bond_get_slave_by_dev has a NULL check.</div><div class='add'>+	 */</div><div class='add'>+	if (likely(bond_get_slave_by_dev(bond, tls_netdev)))</div><div class='add'>+		return bond_dev_queue_xmit(bond, skb, tls_netdev);</div><div class='add'>+	return bond_tx_drop(dev, skb);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static netdev_tx_t __bond_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct bonding *bond = netdev_priv(dev);</div><div class='hunk'>@@ -3968,16 +5442,24 @@ static netdev_tx_t __bond_start_xmit(struct sk_buff *skb, struct net_device *dev</div><div class='ctx'> 	    !bond_slave_override(bond, skb))</div><div class='ctx'> 		return NETDEV_TX_OK;</div><div class='ctx'> </div><div class='add'>+#if IS_ENABLED(CONFIG_TLS_DEVICE)</div><div class='add'>+	if (tls_is_skb_tx_device_offloaded(skb))</div><div class='add'>+		return bond_tls_device_xmit(bond, skb, dev);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	switch (BOND_MODE(bond)) {</div><div class='ctx'> 	case BOND_MODE_ROUNDROBIN:</div><div class='ctx'> 		return bond_xmit_roundrobin(skb, dev);</div><div class='ctx'> 	case BOND_MODE_ACTIVEBACKUP:</div><div class='ctx'> 		return bond_xmit_activebackup(skb, dev);</div><div class='ctx'> 	case BOND_MODE_8023AD:</div><div class='add'>+		if (bond_should_broadcast_neighbor(skb, dev))</div><div class='add'>+			return bond_xmit_broadcast(skb, dev, false);</div><div class='add'>+		fallthrough;</div><div class='ctx'> 	case BOND_MODE_XOR:</div><div class='ctx'> 		return bond_3ad_xor_xmit(skb, dev);</div><div class='ctx'> 	case BOND_MODE_BROADCAST:</div><div class='del'>-		return bond_xmit_broadcast(skb, dev);</div><div class='add'>+		return bond_xmit_broadcast(skb, dev, true);</div><div class='ctx'> 	case BOND_MODE_ALB:</div><div class='ctx'> 		return bond_alb_xmit(skb, dev);</div><div class='ctx'> 	case BOND_MODE_TLB:</div><div class='hunk'>@@ -3986,8 +5468,7 @@ static netdev_tx_t __bond_start_xmit(struct sk_buff *skb, struct net_device *dev</div><div class='ctx'> 		/* Should never happen, mode already checked */</div><div class='ctx'> 		netdev_err(dev, "Unknown bonding mode %d\n", BOND_MODE(bond));</div><div class='ctx'> 		WARN_ON_ONCE(1);</div><div class='del'>-		bond_tx_drop(dev, skb);</div><div class='del'>-		return NETDEV_TX_OK;</div><div class='add'>+		return bond_tx_drop(dev, skb);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4006,22 +5487,261 @@ static netdev_tx_t bond_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	if (bond_has_slaves(bond))</div><div class='ctx'> 		ret = __bond_start_xmit(skb, dev);</div><div class='ctx'> 	else</div><div class='del'>-		bond_tx_drop(dev, skb);</div><div class='add'>+		ret = bond_tx_drop(dev, skb);</div><div class='ctx'> 	rcu_read_unlock();</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int bond_ethtool_get_settings(struct net_device *bond_dev,</div><div class='del'>-				     struct ethtool_cmd *ecmd)</div><div class='add'>+static struct net_device *</div><div class='add'>+bond_xdp_get_xmit_slave(struct net_device *bond_dev, struct xdp_buff *xdp)</div><div class='add'>+{</div><div class='add'>+	struct bonding *bond = netdev_priv(bond_dev);</div><div class='add'>+	struct slave *slave;</div><div class='add'>+</div><div class='add'>+	/* Caller needs to hold rcu_read_lock() */</div><div class='add'>+</div><div class='add'>+	switch (BOND_MODE(bond)) {</div><div class='add'>+	case BOND_MODE_ROUNDROBIN:</div><div class='add'>+		slave = bond_xdp_xmit_roundrobin_slave_get(bond, xdp);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case BOND_MODE_ACTIVEBACKUP:</div><div class='add'>+		slave = bond_xmit_activebackup_slave_get(bond);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case BOND_MODE_8023AD:</div><div class='add'>+	case BOND_MODE_XOR:</div><div class='add'>+		slave = bond_xdp_xmit_3ad_xor_slave_get(bond, xdp);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		if (net_ratelimit())</div><div class='add'>+			netdev_err(bond_dev, "Unknown bonding mode %d for xdp xmit\n",</div><div class='add'>+				   BOND_MODE(bond));</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (slave)</div><div class='add'>+		return slave-&gt;dev;</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bond_xdp_xmit(struct net_device *bond_dev,</div><div class='add'>+			 int n, struct xdp_frame **frames, u32 flags)</div><div class='add'>+{</div><div class='add'>+	int nxmit, err = -ENXIO;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+</div><div class='add'>+	for (nxmit = 0; nxmit &lt; n; nxmit++) {</div><div class='add'>+		struct xdp_frame *frame = frames[nxmit];</div><div class='add'>+		struct xdp_frame *frames1[] = {frame};</div><div class='add'>+		struct net_device *slave_dev;</div><div class='add'>+		struct xdp_buff xdp;</div><div class='add'>+</div><div class='add'>+		xdp_convert_frame_to_buff(frame, &amp;xdp);</div><div class='add'>+</div><div class='add'>+		slave_dev = bond_xdp_get_xmit_slave(bond_dev, &amp;xdp);</div><div class='add'>+		if (!slave_dev) {</div><div class='add'>+			err = -ENXIO;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = slave_dev-&gt;netdev_ops-&gt;ndo_xdp_xmit(slave_dev, 1, frames1, flags);</div><div class='add'>+		if (err &lt; 1)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+	/* If error happened on the first frame then we can pass the error up, otherwise</div><div class='add'>+	 * report the number of frames that were xmitted.</div><div class='add'>+	 */</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		return (nxmit == 0 ? err : nxmit);</div><div class='add'>+</div><div class='add'>+	return nxmit;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bond_xdp_set(struct net_device *dev, struct bpf_prog *prog,</div><div class='add'>+			struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct bonding *bond = netdev_priv(dev);</div><div class='add'>+	struct list_head *iter;</div><div class='add'>+	struct slave *slave, *rollback_slave;</div><div class='add'>+	struct bpf_prog *old_prog;</div><div class='add'>+	struct netdev_bpf xdp = {</div><div class='add'>+		.command = XDP_SETUP_PROG,</div><div class='add'>+		.flags   = 0,</div><div class='add'>+		.prog    = prog,</div><div class='add'>+		.extack  = extack,</div><div class='add'>+	};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	ASSERT_RTNL();</div><div class='add'>+</div><div class='add'>+	if (!bond_xdp_check(bond, BOND_MODE(bond))) {</div><div class='add'>+		BOND_NL_ERR(dev, extack,</div><div class='add'>+			    "No native XDP support for the current bonding mode");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	old_prog = bond-&gt;xdp_prog;</div><div class='add'>+	bond-&gt;xdp_prog = prog;</div><div class='add'>+</div><div class='add'>+	bond_for_each_slave(bond, slave, iter) {</div><div class='add'>+		struct net_device *slave_dev = slave-&gt;dev;</div><div class='add'>+</div><div class='add'>+		if (!slave_dev-&gt;netdev_ops-&gt;ndo_bpf ||</div><div class='add'>+		    !slave_dev-&gt;netdev_ops-&gt;ndo_xdp_xmit) {</div><div class='add'>+			SLAVE_NL_ERR(dev, slave_dev, extack,</div><div class='add'>+				     "Slave device does not support XDP");</div><div class='add'>+			err = -EOPNOTSUPP;</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (dev_xdp_prog_count(slave_dev) &gt; 0) {</div><div class='add'>+			SLAVE_NL_ERR(dev, slave_dev, extack,</div><div class='add'>+				     "Slave has XDP program loaded, please unload before enslaving");</div><div class='add'>+			err = -EOPNOTSUPP;</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = dev_xdp_propagate(slave_dev, &amp;xdp);</div><div class='add'>+		if (err &lt; 0) {</div><div class='add'>+			/* ndo_bpf() sets extack error message */</div><div class='add'>+			slave_err(dev, slave_dev, "Error %d calling ndo_bpf\n", err);</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+		if (prog)</div><div class='add'>+			bpf_prog_inc(prog);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (prog) {</div><div class='add'>+		static_branch_inc(&amp;bpf_master_redirect_enabled_key);</div><div class='add'>+	} else if (old_prog) {</div><div class='add'>+		bpf_prog_put(old_prog);</div><div class='add'>+		static_branch_dec(&amp;bpf_master_redirect_enabled_key);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	/* unwind the program changes */</div><div class='add'>+	bond-&gt;xdp_prog = old_prog;</div><div class='add'>+	xdp.prog = old_prog;</div><div class='add'>+	xdp.extack = NULL; /* do not overwrite original error */</div><div class='add'>+</div><div class='add'>+	bond_for_each_slave(bond, rollback_slave, iter) {</div><div class='add'>+		struct net_device *slave_dev = rollback_slave-&gt;dev;</div><div class='add'>+		int err_unwind;</div><div class='add'>+</div><div class='add'>+		if (slave == rollback_slave)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		err_unwind = dev_xdp_propagate(slave_dev, &amp;xdp);</div><div class='add'>+		if (err_unwind &lt; 0)</div><div class='add'>+			slave_err(dev, slave_dev,</div><div class='add'>+				  "Error %d when unwinding XDP program change\n", err_unwind);</div><div class='add'>+		else if (xdp.prog)</div><div class='add'>+			bpf_prog_inc(xdp.prog);</div><div class='add'>+	}</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bond_xdp(struct net_device *dev, struct netdev_bpf *xdp)</div><div class='add'>+{</div><div class='add'>+	switch (xdp-&gt;command) {</div><div class='add'>+	case XDP_SETUP_PROG:</div><div class='add'>+		return bond_xdp_set(dev, xdp-&gt;prog, xdp-&gt;extack);</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 bond_mode_bcast_speed(struct slave *slave, u32 speed)</div><div class='add'>+{</div><div class='add'>+	if (speed == 0 || speed == SPEED_UNKNOWN)</div><div class='add'>+		speed = slave-&gt;speed;</div><div class='add'>+	else</div><div class='add'>+		speed = min(speed, slave-&gt;speed);</div><div class='add'>+</div><div class='add'>+	return speed;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Set the BOND_PHC_INDEX flag to notify user space */</div><div class='add'>+static int bond_set_phc_index_flag(struct kernel_hwtstamp_config *kernel_cfg)</div><div class='add'>+{</div><div class='add'>+	struct ifreq *ifr = kernel_cfg-&gt;ifr;</div><div class='add'>+	struct hwtstamp_config cfg;</div><div class='add'>+</div><div class='add'>+	if (kernel_cfg-&gt;copied_to_user) {</div><div class='add'>+		/* Lower device has a legacy implementation */</div><div class='add'>+		if (copy_from_user(&amp;cfg, ifr-&gt;ifr_data, sizeof(cfg)))</div><div class='add'>+			return -EFAULT;</div><div class='add'>+</div><div class='add'>+		cfg.flags |= HWTSTAMP_FLAG_BONDED_PHC_INDEX;</div><div class='add'>+		if (copy_to_user(ifr-&gt;ifr_data, &amp;cfg, sizeof(cfg)))</div><div class='add'>+			return -EFAULT;</div><div class='add'>+	} else {</div><div class='add'>+		kernel_cfg-&gt;flags |= HWTSTAMP_FLAG_BONDED_PHC_INDEX;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bond_hwtstamp_get(struct net_device *dev,</div><div class='add'>+			     struct kernel_hwtstamp_config *cfg)</div><div class='add'>+{</div><div class='add'>+	struct bonding *bond = netdev_priv(dev);</div><div class='add'>+	struct net_device *real_dev;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	real_dev = bond_option_active_slave_get_rcu(bond);</div><div class='add'>+	if (!real_dev)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	err = generic_hwtstamp_get_lower(real_dev, cfg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return bond_set_phc_index_flag(cfg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bond_hwtstamp_set(struct net_device *dev,</div><div class='add'>+			     struct kernel_hwtstamp_config *cfg,</div><div class='add'>+			     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct bonding *bond = netdev_priv(dev);</div><div class='add'>+	struct net_device *real_dev;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!(cfg-&gt;flags &amp; HWTSTAMP_FLAG_BONDED_PHC_INDEX))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	real_dev = bond_option_active_slave_get_rcu(bond);</div><div class='add'>+	if (!real_dev)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	err = generic_hwtstamp_set_lower(real_dev, cfg, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return bond_set_phc_index_flag(cfg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bond_ethtool_get_link_ksettings(struct net_device *bond_dev,</div><div class='add'>+					   struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct bonding *bond = netdev_priv(bond_dev);</div><div class='del'>-	unsigned long speed = 0;</div><div class='ctx'> 	struct list_head *iter;</div><div class='ctx'> 	struct slave *slave;</div><div class='add'>+	u32 speed = 0;</div><div class='ctx'> </div><div class='del'>-	ecmd-&gt;duplex = DUPLEX_UNKNOWN;</div><div class='del'>-	ecmd-&gt;port = PORT_OTHER;</div><div class='add'>+	cmd-&gt;base.duplex = DUPLEX_UNKNOWN;</div><div class='add'>+	cmd-&gt;base.port = PORT_OTHER;</div><div class='ctx'> </div><div class='ctx'> 	/* Since bond_slave_can_tx returns false for all inactive or down slaves, we</div><div class='ctx'> 	 * do not need to check mode.  Though link speed might not represent</div><div class='hunk'>@@ -4030,14 +5750,20 @@ static int bond_ethtool_get_settings(struct net_device *bond_dev,</div><div class='ctx'> 	 */</div><div class='ctx'> 	bond_for_each_slave(bond, slave, iter) {</div><div class='ctx'> 		if (bond_slave_can_tx(slave)) {</div><div class='del'>-			if (slave-&gt;speed != SPEED_UNKNOWN)</div><div class='del'>-				speed += slave-&gt;speed;</div><div class='del'>-			if (ecmd-&gt;duplex == DUPLEX_UNKNOWN &amp;&amp;</div><div class='add'>+			bond_update_speed_duplex(slave);</div><div class='add'>+			if (slave-&gt;speed != SPEED_UNKNOWN) {</div><div class='add'>+				if (BOND_MODE(bond) == BOND_MODE_BROADCAST)</div><div class='add'>+					speed = bond_mode_bcast_speed(slave,</div><div class='add'>+								      speed);</div><div class='add'>+				else</div><div class='add'>+					speed += slave-&gt;speed;</div><div class='add'>+			}</div><div class='add'>+			if (cmd-&gt;base.duplex == DUPLEX_UNKNOWN &amp;&amp;</div><div class='ctx'> 			    slave-&gt;duplex != DUPLEX_UNKNOWN)</div><div class='del'>-				ecmd-&gt;duplex = slave-&gt;duplex;</div><div class='add'>+				cmd-&gt;base.duplex = slave-&gt;duplex;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	ethtool_cmd_speed_set(ecmd, speed ? : SPEED_UNKNOWN);</div><div class='add'>+	cmd-&gt;base.speed = speed ? : SPEED_UNKNOWN;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -4045,16 +5771,57 @@ static int bond_ethtool_get_settings(struct net_device *bond_dev,</div><div class='ctx'> static void bond_ethtool_get_drvinfo(struct net_device *bond_dev,</div><div class='ctx'> 				     struct ethtool_drvinfo *drvinfo)</div><div class='ctx'> {</div><div class='del'>-	strlcpy(drvinfo-&gt;driver, DRV_NAME, sizeof(drvinfo-&gt;driver));</div><div class='del'>-	strlcpy(drvinfo-&gt;version, DRV_VERSION, sizeof(drvinfo-&gt;version));</div><div class='add'>+	strscpy(drvinfo-&gt;driver, DRV_NAME, sizeof(drvinfo-&gt;driver));</div><div class='ctx'> 	snprintf(drvinfo-&gt;fw_version, sizeof(drvinfo-&gt;fw_version), "%d",</div><div class='ctx'> 		 BOND_ABI_VERSION);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int bond_ethtool_get_ts_info(struct net_device *bond_dev,</div><div class='add'>+				    struct kernel_ethtool_ts_info *info)</div><div class='add'>+{</div><div class='add'>+	struct bonding *bond = netdev_priv(bond_dev);</div><div class='add'>+	struct kernel_ethtool_ts_info ts_info;</div><div class='add'>+	struct net_device *real_dev;</div><div class='add'>+	bool sw_tx_support = false;</div><div class='add'>+	struct list_head *iter;</div><div class='add'>+	struct slave *slave;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	real_dev = bond_option_active_slave_get_rcu(bond);</div><div class='add'>+	dev_hold(real_dev);</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+	if (real_dev) {</div><div class='add'>+		ret = ethtool_get_ts_info_by_layer(real_dev, info);</div><div class='add'>+	} else {</div><div class='add'>+		/* Check if all slaves support software tx timestamping */</div><div class='add'>+		rcu_read_lock();</div><div class='add'>+		bond_for_each_slave_rcu(bond, slave, iter) {</div><div class='add'>+			ret = ethtool_get_ts_info_by_layer(slave-&gt;dev, &amp;ts_info);</div><div class='add'>+			if (!ret &amp;&amp; (ts_info.so_timestamping &amp; SOF_TIMESTAMPING_TX_SOFTWARE)) {</div><div class='add'>+				sw_tx_support = true;</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			sw_tx_support = false;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		rcu_read_unlock();</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (sw_tx_support)</div><div class='add'>+		info-&gt;so_timestamping |= SOF_TIMESTAMPING_TX_SOFTWARE;</div><div class='add'>+</div><div class='add'>+	dev_put(real_dev);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct ethtool_ops bond_ethtool_ops = {</div><div class='ctx'> 	.get_drvinfo		= bond_ethtool_get_drvinfo,</div><div class='del'>-	.get_settings		= bond_ethtool_get_settings,</div><div class='ctx'> 	.get_link		= ethtool_op_get_link,</div><div class='add'>+	.get_link_ksettings	= bond_ethtool_get_link_ksettings,</div><div class='add'>+	.get_ts_info		= bond_ethtool_get_ts_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct net_device_ops bond_netdev_ops = {</div><div class='hunk'>@@ -4065,7 +5832,9 @@ static const struct net_device_ops bond_netdev_ops = {</div><div class='ctx'> 	.ndo_start_xmit		= bond_start_xmit,</div><div class='ctx'> 	.ndo_select_queue	= bond_select_queue,</div><div class='ctx'> 	.ndo_get_stats64	= bond_get_stats,</div><div class='del'>-	.ndo_do_ioctl		= bond_do_ioctl,</div><div class='add'>+	.ndo_eth_ioctl		= bond_eth_ioctl,</div><div class='add'>+	.ndo_siocbond		= bond_do_ioctl,</div><div class='add'>+	.ndo_siocdevprivate	= bond_siocdevprivate,</div><div class='ctx'> 	.ndo_change_rx_flags	= bond_change_rx_flags,</div><div class='ctx'> 	.ndo_set_rx_mode	= bond_set_rx_mode,</div><div class='ctx'> 	.ndo_change_mtu		= bond_change_mtu,</div><div class='hunk'>@@ -4081,13 +5850,14 @@ static const struct net_device_ops bond_netdev_ops = {</div><div class='ctx'> 	.ndo_add_slave		= bond_enslave,</div><div class='ctx'> 	.ndo_del_slave		= bond_release,</div><div class='ctx'> 	.ndo_fix_features	= bond_fix_features,</div><div class='del'>-	.ndo_bridge_setlink	= switchdev_port_bridge_setlink,</div><div class='del'>-	.ndo_bridge_getlink	= switchdev_port_bridge_getlink,</div><div class='del'>-	.ndo_bridge_dellink	= switchdev_port_bridge_dellink,</div><div class='del'>-	.ndo_fdb_add		= switchdev_port_fdb_add,</div><div class='del'>-	.ndo_fdb_del		= switchdev_port_fdb_del,</div><div class='del'>-	.ndo_fdb_dump		= switchdev_port_fdb_dump,</div><div class='ctx'> 	.ndo_features_check	= passthru_features_check,</div><div class='add'>+	.ndo_get_xmit_slave	= bond_xmit_get_slave,</div><div class='add'>+	.ndo_sk_get_lower_dev	= bond_sk_get_lower_dev,</div><div class='add'>+	.ndo_bpf		= bond_xdp,</div><div class='add'>+	.ndo_xdp_xmit           = bond_xdp_xmit,</div><div class='add'>+	.ndo_xdp_get_xmit_slave = bond_xdp_get_xmit_slave,</div><div class='add'>+	.ndo_hwtstamp_get	= bond_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set	= bond_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct device_type bond_type = {</div><div class='hunk'>@@ -4097,9 +5867,11 @@ static const struct device_type bond_type = {</div><div class='ctx'> static void bond_destructor(struct net_device *bond_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct bonding *bond = netdev_priv(bond_dev);</div><div class='add'>+</div><div class='ctx'> 	if (bond-&gt;wq)</div><div class='ctx'> 		destroy_workqueue(bond-&gt;wq);</div><div class='del'>-	free_netdev(bond_dev);</div><div class='add'>+</div><div class='add'>+	free_percpu(bond-&gt;rr_tx_counter);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void bond_setup(struct net_device *bond_dev)</div><div class='hunk'>@@ -4114,21 +5886,32 @@ void bond_setup(struct net_device *bond_dev)</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize the device entry points */</div><div class='ctx'> 	ether_setup(bond_dev);</div><div class='add'>+	bond_dev-&gt;max_mtu = ETH_MAX_MTU;</div><div class='ctx'> 	bond_dev-&gt;netdev_ops = &amp;bond_netdev_ops;</div><div class='ctx'> 	bond_dev-&gt;ethtool_ops = &amp;bond_ethtool_ops;</div><div class='ctx'> </div><div class='del'>-	bond_dev-&gt;destructor = bond_destructor;</div><div class='add'>+	bond_dev-&gt;needs_free_netdev = true;</div><div class='add'>+	bond_dev-&gt;priv_destructor = bond_destructor;</div><div class='ctx'> </div><div class='ctx'> 	SET_NETDEV_DEVTYPE(bond_dev, &amp;bond_type);</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize the device options */</div><div class='del'>-	bond_dev-&gt;tx_queue_len = 0;</div><div class='del'>-	bond_dev-&gt;flags |= IFF_MASTER|IFF_MULTICAST;</div><div class='del'>-	bond_dev-&gt;priv_flags |= IFF_BONDING | IFF_UNICAST_FLT;</div><div class='add'>+	bond_dev-&gt;flags |= IFF_MASTER;</div><div class='add'>+	bond_dev-&gt;priv_flags |= IFF_BONDING | IFF_UNICAST_FLT | IFF_NO_QUEUE;</div><div class='ctx'> 	bond_dev-&gt;priv_flags &amp;= ~(IFF_XMIT_DST_RELEASE | IFF_TX_SKB_SHARING);</div><div class='ctx'> </div><div class='add'>+#ifdef CONFIG_XFRM_OFFLOAD</div><div class='add'>+	/* set up xfrm device ops (only supported in active-backup right now) */</div><div class='add'>+	bond_dev-&gt;xfrmdev_ops = &amp;bond_xfrmdev_ops;</div><div class='add'>+	INIT_LIST_HEAD(&amp;bond-&gt;ipsec_list);</div><div class='add'>+	mutex_init(&amp;bond-&gt;ipsec_lock);</div><div class='add'>+#endif /* CONFIG_XFRM_OFFLOAD */</div><div class='add'>+</div><div class='ctx'> 	/* don't acquire bond device's netif_tx_lock when transmitting */</div><div class='del'>-	bond_dev-&gt;features |= NETIF_F_LLTX;</div><div class='add'>+	bond_dev-&gt;lltx = true;</div><div class='add'>+</div><div class='add'>+	/* Don't allow bond devices to change network namespaces. */</div><div class='add'>+	bond_dev-&gt;netns_immutable = true;</div><div class='ctx'> </div><div class='ctx'> 	/* By default, we declare the bond to be fully</div><div class='ctx'> 	 * VLAN hardware accelerated capable. Special</div><div class='hunk'>@@ -4137,17 +5920,22 @@ void bond_setup(struct net_device *bond_dev)</div><div class='ctx'> 	 * capable</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	/* Don't allow bond devices to change network namespaces. */</div><div class='del'>-	bond_dev-&gt;features |= NETIF_F_NETNS_LOCAL;</div><div class='del'>-</div><div class='del'>-	bond_dev-&gt;hw_features = BOND_VLAN_FEATURES |</div><div class='del'>-				NETIF_F_HW_VLAN_CTAG_TX |</div><div class='add'>+	bond_dev-&gt;hw_features = MASTER_UPPER_DEV_VLAN_FEATURES |</div><div class='ctx'> 				NETIF_F_HW_VLAN_CTAG_RX |</div><div class='del'>-				NETIF_F_HW_VLAN_CTAG_FILTER;</div><div class='add'>+				NETIF_F_HW_VLAN_CTAG_FILTER |</div><div class='add'>+				NETIF_F_HW_VLAN_STAG_RX |</div><div class='add'>+				NETIF_F_HW_VLAN_STAG_FILTER;</div><div class='ctx'> </div><div class='del'>-	bond_dev-&gt;hw_features &amp;= ~(NETIF_F_ALL_CSUM &amp; ~NETIF_F_HW_CSUM);</div><div class='ctx'> 	bond_dev-&gt;hw_features |= NETIF_F_GSO_ENCAP_ALL;</div><div class='ctx'> 	bond_dev-&gt;features |= bond_dev-&gt;hw_features;</div><div class='add'>+	bond_dev-&gt;features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_STAG_TX;</div><div class='add'>+	bond_dev-&gt;features |= NETIF_F_GSO_PARTIAL;</div><div class='add'>+#ifdef CONFIG_XFRM_OFFLOAD</div><div class='add'>+	bond_dev-&gt;hw_features |= BOND_XFRM_FEATURES;</div><div class='add'>+	/* Only enable XFRM features if this is an active-backup config */</div><div class='add'>+	if (BOND_MODE(bond) == BOND_MODE_ACTIVEBACKUP)</div><div class='add'>+		bond_dev-&gt;features |= BOND_XFRM_FEATURES;</div><div class='add'>+#endif /* CONFIG_XFRM_OFFLOAD */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Destroy a bonding device.</div><div class='hunk'>@@ -4158,36 +5946,41 @@ static void bond_uninit(struct net_device *bond_dev)</div><div class='ctx'> 	struct bonding *bond = netdev_priv(bond_dev);</div><div class='ctx'> 	struct list_head *iter;</div><div class='ctx'> 	struct slave *slave;</div><div class='del'>-	struct bond_up_slave *arr;</div><div class='ctx'> </div><div class='ctx'> 	bond_netpoll_cleanup(bond_dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Release the bonded slaves */</div><div class='ctx'> 	bond_for_each_slave(bond, slave, iter)</div><div class='del'>-		__bond_release_one(bond_dev, slave-&gt;dev, true);</div><div class='add'>+		__bond_release_one(bond_dev, slave-&gt;dev, true, true);</div><div class='ctx'> 	netdev_info(bond_dev, "Released all slaves\n");</div><div class='ctx'> </div><div class='del'>-	arr = rtnl_dereference(bond-&gt;slave_arr);</div><div class='del'>-	if (arr) {</div><div class='del'>-		RCU_INIT_POINTER(bond-&gt;slave_arr, NULL);</div><div class='del'>-		kfree_rcu(arr, rcu);</div><div class='del'>-	}</div><div class='add'>+#ifdef CONFIG_XFRM_OFFLOAD</div><div class='add'>+	mutex_destroy(&amp;bond-&gt;ipsec_lock);</div><div class='add'>+#endif /* CONFIG_XFRM_OFFLOAD */</div><div class='ctx'> </div><div class='del'>-	list_del(&amp;bond-&gt;bond_list);</div><div class='add'>+	bond_set_slave_arr(bond, NULL, NULL);</div><div class='add'>+</div><div class='add'>+	list_del_rcu(&amp;bond-&gt;bond_list);</div><div class='ctx'> </div><div class='ctx'> 	bond_debug_unregister(bond);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*------------------------- Module initialization ---------------------------*/</div><div class='ctx'> </div><div class='del'>-static int bond_check_params(struct bond_params *params)</div><div class='add'>+static int __init bond_check_params(struct bond_params *params)</div><div class='ctx'> {</div><div class='ctx'> 	int arp_validate_value, fail_over_mac_value, primary_reselect_value, i;</div><div class='ctx'> 	struct bond_opt_value newval;</div><div class='ctx'> 	const struct bond_opt_value *valptr;</div><div class='del'>-	int arp_all_targets_value;</div><div class='add'>+	int arp_all_targets_value = 0;</div><div class='ctx'> 	u16 ad_actor_sys_prio = 0;</div><div class='ctx'> 	u16 ad_user_port_key = 0;</div><div class='add'>+	__be32 arp_target[BOND_MAX_ARP_TARGETS] = { 0 };</div><div class='add'>+	int arp_ip_count;</div><div class='add'>+	int bond_mode	= BOND_MODE_ROUNDROBIN;</div><div class='add'>+	int xmit_hashtype = BOND_XMIT_POLICY_LAYER2;</div><div class='add'>+	int lacp_fast = 0;</div><div class='add'>+	int tlb_dynamic_lb;</div><div class='ctx'> </div><div class='ctx'> 	/* Convert string parameters. */</div><div class='ctx'> 	if (mode) {</div><div class='hunk'>@@ -4201,9 +5994,9 @@ static int bond_check_params(struct bond_params *params)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (xmit_hash_policy) {</div><div class='del'>-		if ((bond_mode != BOND_MODE_XOR) &amp;&amp;</div><div class='del'>-		    (bond_mode != BOND_MODE_8023AD) &amp;&amp;</div><div class='del'>-		    (bond_mode != BOND_MODE_TLB)) {</div><div class='add'>+		if (bond_mode == BOND_MODE_ROUNDROBIN ||</div><div class='add'>+		    bond_mode == BOND_MODE_ACTIVEBACKUP ||</div><div class='add'>+		    bond_mode == BOND_MODE_BROADCAST) {</div><div class='ctx'> 			pr_info("xmit_hash_policy param is irrelevant in mode %s\n",</div><div class='ctx'> 				bond_mode_name(bond_mode));</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -4275,10 +6068,10 @@ static int bond_check_params(struct bond_params *params)</div><div class='ctx'> 		downdelay = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if ((use_carrier != 0) &amp;&amp; (use_carrier != 1)) {</div><div class='del'>-		pr_warn("Warning: use_carrier module parameter (%d), not of valid value (0/1), so it was set to 1\n",</div><div class='del'>-			use_carrier);</div><div class='del'>-		use_carrier = 1;</div><div class='add'>+	if (use_carrier != 1) {</div><div class='add'>+		pr_err("Error: invalid use_carrier parameter (%d)\n",</div><div class='add'>+		       use_carrier);</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (num_peer_notif &lt; 0 || num_peer_notif &gt; 255) {</div><div class='hunk'>@@ -4409,7 +6202,6 @@ static int bond_check_params(struct bond_params *params)</div><div class='ctx'> 		arp_validate_value = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	arp_all_targets_value = 0;</div><div class='ctx'> 	if (arp_all_targets) {</div><div class='ctx'> 		bond_opt_initstr(&amp;newval, arp_all_targets);</div><div class='ctx'> 		valptr = bond_opt_parse(bond_opt_get(BOND_OPT_ARP_ALL_TARGETS),</div><div class='hunk'>@@ -4500,6 +6292,14 @@ static int bond_check_params(struct bond_params *params)</div><div class='ctx'> 	}</div><div class='ctx'> 	ad_user_port_key = valptr-&gt;value;</div><div class='ctx'> </div><div class='add'>+	bond_opt_initstr(&amp;newval, "default");</div><div class='add'>+	valptr = bond_opt_parse(bond_opt_get(BOND_OPT_TLB_DYNAMIC_LB), &amp;newval);</div><div class='add'>+	if (!valptr) {</div><div class='add'>+		pr_err("Error: No tlb_dynamic_lb default value");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	tlb_dynamic_lb = valptr-&gt;value;</div><div class='add'>+</div><div class='ctx'> 	if (lp_interval == 0) {</div><div class='ctx'> 		pr_warn("Warning: ip_interval must be between 1 and %d, so it was reset to %d\n",</div><div class='ctx'> 			INT_MAX, BOND_ALB_DEFAULT_LP_INTERVAL);</div><div class='hunk'>@@ -4514,9 +6314,11 @@ static int bond_check_params(struct bond_params *params)</div><div class='ctx'> 	params-&gt;arp_interval = arp_interval;</div><div class='ctx'> 	params-&gt;arp_validate = arp_validate_value;</div><div class='ctx'> 	params-&gt;arp_all_targets = arp_all_targets_value;</div><div class='add'>+	params-&gt;missed_max = 2;</div><div class='ctx'> 	params-&gt;updelay = updelay;</div><div class='ctx'> 	params-&gt;downdelay = downdelay;</div><div class='del'>-	params-&gt;use_carrier = use_carrier;</div><div class='add'>+	params-&gt;peer_notif_delay = 0;</div><div class='add'>+	params-&gt;lacp_active = 1;</div><div class='ctx'> 	params-&gt;lacp_fast = lacp_fast;</div><div class='ctx'> 	params-&gt;primary[0] = 0;</div><div class='ctx'> 	params-&gt;primary_reselect = primary_reselect_value;</div><div class='hunk'>@@ -4527,10 +6329,12 @@ static int bond_check_params(struct bond_params *params)</div><div class='ctx'> 	params-&gt;min_links = min_links;</div><div class='ctx'> 	params-&gt;lp_interval = lp_interval;</div><div class='ctx'> 	params-&gt;packets_per_slave = packets_per_slave;</div><div class='del'>-	params-&gt;tlb_dynamic_lb = 1; /* Default value */</div><div class='add'>+	params-&gt;tlb_dynamic_lb = tlb_dynamic_lb;</div><div class='ctx'> 	params-&gt;ad_actor_sys_prio = ad_actor_sys_prio;</div><div class='ctx'> 	eth_zero_addr(params-&gt;ad_actor_system);</div><div class='ctx'> 	params-&gt;ad_user_port_key = ad_user_port_key;</div><div class='add'>+	params-&gt;coupled_control = 1;</div><div class='add'>+	params-&gt;broadcast_neighbor = 0;</div><div class='ctx'> 	if (packets_per_slave &gt; 0) {</div><div class='ctx'> 		params-&gt;reciprocal_packets_per_slave =</div><div class='ctx'> 			reciprocal_value(packets_per_slave);</div><div class='hunk'>@@ -4542,36 +6346,17 @@ static int bond_check_params(struct bond_params *params)</div><div class='ctx'> 			(struct reciprocal_value) { 0 };</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (primary) {</div><div class='del'>-		strncpy(params-&gt;primary, primary, IFNAMSIZ);</div><div class='del'>-		params-&gt;primary[IFNAMSIZ - 1] = 0;</div><div class='del'>-	}</div><div class='add'>+	if (primary)</div><div class='add'>+		strscpy_pad(params-&gt;primary, primary, sizeof(params-&gt;primary));</div><div class='ctx'> </div><div class='ctx'> 	memcpy(params-&gt;arp_targets, arp_target, sizeof(arp_target));</div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+	memset(params-&gt;ns_targets, 0, sizeof(struct in6_addr) * BOND_MAX_NS_TARGETS);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct lock_class_key bonding_netdev_xmit_lock_key;</div><div class='del'>-static struct lock_class_key bonding_netdev_addr_lock_key;</div><div class='del'>-static struct lock_class_key bonding_tx_busylock_key;</div><div class='del'>-</div><div class='del'>-static void bond_set_lockdep_class_one(struct net_device *dev,</div><div class='del'>-				       struct netdev_queue *txq,</div><div class='del'>-				       void *_unused)</div><div class='del'>-{</div><div class='del'>-	lockdep_set_class(&amp;txq-&gt;_xmit_lock,</div><div class='del'>-			  &amp;bonding_netdev_xmit_lock_key);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void bond_set_lockdep_class(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	lockdep_set_class(&amp;dev-&gt;addr_list_lock,</div><div class='del'>-			  &amp;bonding_netdev_addr_lock_key);</div><div class='del'>-	netdev_for_each_tx_queue(dev, bond_set_lockdep_class_one, NULL);</div><div class='del'>-	dev-&gt;qdisc_tx_busylock = &amp;bonding_tx_busylock_key;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* Called from registration process */</div><div class='ctx'> static int bond_init(struct net_device *bond_dev)</div><div class='ctx'> {</div><div class='hunk'>@@ -4580,13 +6365,17 @@ static int bond_init(struct net_device *bond_dev)</div><div class='ctx'> </div><div class='ctx'> 	netdev_dbg(bond_dev, "Begin bond_init\n");</div><div class='ctx'> </div><div class='del'>-	bond-&gt;wq = create_singlethread_workqueue(bond_dev-&gt;name);</div><div class='add'>+	bond-&gt;wq = alloc_ordered_workqueue("%s", WQ_MEM_RECLAIM,</div><div class='add'>+					   bond_dev-&gt;name);</div><div class='ctx'> 	if (!bond-&gt;wq)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	bond_set_lockdep_class(bond_dev);</div><div class='add'>+	bond-&gt;notifier_ctx = false;</div><div class='ctx'> </div><div class='del'>-	list_add_tail(&amp;bond-&gt;bond_list, &amp;bn-&gt;dev_list);</div><div class='add'>+	spin_lock_init(&amp;bond-&gt;stats_lock);</div><div class='add'>+	netdev_lockdep_set_classes(bond_dev);</div><div class='add'>+</div><div class='add'>+	list_add_tail_rcu(&amp;bond-&gt;bond_list, &amp;bn-&gt;dev_list);</div><div class='ctx'> </div><div class='ctx'> 	bond_prepare_sysfs_group(bond);</div><div class='ctx'> </div><div class='hunk'>@@ -4614,38 +6403,32 @@ int bond_create(struct net *net, const char *name)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *bond_dev;</div><div class='ctx'> 	struct bonding *bond;</div><div class='del'>-	struct alb_bond_info *bond_info;</div><div class='del'>-	int res;</div><div class='add'>+	int res = -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	rtnl_lock();</div><div class='ctx'> </div><div class='ctx'> 	bond_dev = alloc_netdev_mq(sizeof(struct bonding),</div><div class='ctx'> 				   name ? name : "bond%d", NET_NAME_UNKNOWN,</div><div class='ctx'> 				   bond_setup, tx_queues);</div><div class='del'>-	if (!bond_dev) {</div><div class='del'>-		pr_err("%s: eek! can't alloc netdev!\n", name);</div><div class='del'>-		rtnl_unlock();</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='add'>+	if (!bond_dev)</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Initialize rx_hashtbl_used_head to RLB_NULL_INDEX.</div><div class='del'>-	 * It is set to 0 by default which is wrong.</div><div class='del'>-	 */</div><div class='ctx'> 	bond = netdev_priv(bond_dev);</div><div class='del'>-	bond_info = &amp;(BOND_ALB_INFO(bond));</div><div class='del'>-	bond_info-&gt;rx_hashtbl_used_head = RLB_NULL_INDEX;</div><div class='del'>-</div><div class='ctx'> 	dev_net_set(bond_dev, net);</div><div class='ctx'> 	bond_dev-&gt;rtnl_link_ops = &amp;bond_link_ops;</div><div class='ctx'> </div><div class='ctx'> 	res = register_netdevice(bond_dev);</div><div class='add'>+	if (res &lt; 0) {</div><div class='add'>+		free_netdev(bond_dev);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	netif_carrier_off(bond_dev);</div><div class='ctx'> </div><div class='add'>+	bond_work_init_all(bond);</div><div class='add'>+</div><div class='add'>+out:</div><div class='ctx'> 	rtnl_unlock();</div><div class='del'>-	if (res &lt; 0)</div><div class='del'>-		bond_destructor(bond_dev);</div><div class='ctx'> 	return res;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -4662,27 +6445,48 @@ static int __net_init bond_net_init(struct net *net)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __net_exit bond_net_exit(struct net *net)</div><div class='add'>+/* According to commit 69b0216ac255 ("bonding: fix bonding_masters</div><div class='add'>+ * race condition in bond unloading") we need to remove sysfs files</div><div class='add'>+ * before we remove our devices (done later in bond_net_exit_rtnl())</div><div class='add'>+ */</div><div class='add'>+static void __net_exit bond_net_pre_exit(struct net *net)</div><div class='ctx'> {</div><div class='ctx'> 	struct bond_net *bn = net_generic(net, bond_net_id);</div><div class='del'>-	struct bonding *bond, *tmp_bond;</div><div class='del'>-	LIST_HEAD(list);</div><div class='ctx'> </div><div class='ctx'> 	bond_destroy_sysfs(bn);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __net_exit bond_net_exit_rtnl(struct net *net,</div><div class='add'>+					  struct list_head *dev_kill_list)</div><div class='add'>+{</div><div class='add'>+	struct bond_net *bn = net_generic(net, bond_net_id);</div><div class='add'>+	struct bonding *bond, *tmp_bond;</div><div class='ctx'> </div><div class='ctx'> 	/* Kill off any bonds created after unregistering bond rtnl ops */</div><div class='del'>-	rtnl_lock();</div><div class='ctx'> 	list_for_each_entry_safe(bond, tmp_bond, &amp;bn-&gt;dev_list, bond_list)</div><div class='del'>-		unregister_netdevice_queue(bond-&gt;dev, &amp;list);</div><div class='del'>-	unregister_netdevice_many(&amp;list);</div><div class='del'>-	rtnl_unlock();</div><div class='add'>+		unregister_netdevice_queue(bond-&gt;dev, dev_kill_list);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	bond_destroy_proc_dir(bn);</div><div class='add'>+/* According to commit 23fa5c2caae0 ("bonding: destroy proc directory</div><div class='add'>+ * only after all bonds are gone") bond_destroy_proc_dir() is called</div><div class='add'>+ * after bond_net_exit_rtnl() has completed.</div><div class='add'>+ */</div><div class='add'>+static void __net_exit bond_net_exit_batch(struct list_head *net_list)</div><div class='add'>+{</div><div class='add'>+	struct bond_net *bn;</div><div class='add'>+	struct net *net;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(net, net_list, exit_list) {</div><div class='add'>+		bn = net_generic(net, bond_net_id);</div><div class='add'>+		bond_destroy_proc_dir(bn);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct pernet_operations bond_net_ops = {</div><div class='ctx'> 	.init = bond_net_init,</div><div class='del'>-	.exit = bond_net_exit,</div><div class='add'>+	.pre_exit = bond_net_pre_exit,</div><div class='add'>+	.exit_rtnl = bond_net_exit_rtnl,</div><div class='add'>+	.exit_batch = bond_net_exit_batch,</div><div class='ctx'> 	.id   = &amp;bond_net_id,</div><div class='ctx'> 	.size = sizeof(struct bond_net),</div><div class='ctx'> };</div><div class='hunk'>@@ -4692,36 +6496,39 @@ static int __init bonding_init(void)</div><div class='ctx'> 	int i;</div><div class='ctx'> 	int res;</div><div class='ctx'> </div><div class='del'>-	pr_info("%s", bond_version);</div><div class='del'>-</div><div class='ctx'> 	res = bond_check_params(&amp;bonding_defaults);</div><div class='ctx'> 	if (res)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='add'>+	bond_create_debugfs();</div><div class='add'>+</div><div class='ctx'> 	res = register_pernet_subsys(&amp;bond_net_ops);</div><div class='ctx'> 	if (res)</div><div class='del'>-		goto out;</div><div class='add'>+		goto err_net_ops;</div><div class='ctx'> </div><div class='ctx'> 	res = bond_netlink_init();</div><div class='ctx'> 	if (res)</div><div class='ctx'> 		goto err_link;</div><div class='ctx'> </div><div class='del'>-	bond_create_debugfs();</div><div class='del'>-</div><div class='ctx'> 	for (i = 0; i &lt; max_bonds; i++) {</div><div class='ctx'> 		res = bond_create(&amp;init_net, NULL);</div><div class='ctx'> 		if (res)</div><div class='ctx'> 			goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	skb_flow_dissector_init(&amp;flow_keys_bonding,</div><div class='add'>+				flow_keys_bonding_keys,</div><div class='add'>+				ARRAY_SIZE(flow_keys_bonding_keys));</div><div class='add'>+</div><div class='ctx'> 	register_netdevice_notifier(&amp;bond_netdev_notifier);</div><div class='ctx'> out:</div><div class='ctx'> 	return res;</div><div class='ctx'> err:</div><div class='del'>-	bond_destroy_debugfs();</div><div class='ctx'> 	bond_netlink_fini();</div><div class='ctx'> err_link:</div><div class='ctx'> 	unregister_pernet_subsys(&amp;bond_net_ops);</div><div class='add'>+err_net_ops:</div><div class='add'>+	bond_destroy_debugfs();</div><div class='ctx'> 	goto out;</div><div class='ctx'> </div><div class='ctx'> }</div><div class='hunk'>@@ -4730,11 +6537,11 @@ static void __exit bonding_exit(void)</div><div class='ctx'> {</div><div class='ctx'> 	unregister_netdevice_notifier(&amp;bond_netdev_notifier);</div><div class='ctx'> </div><div class='del'>-	bond_destroy_debugfs();</div><div class='del'>-</div><div class='ctx'> 	bond_netlink_fini();</div><div class='ctx'> 	unregister_pernet_subsys(&amp;bond_net_ops);</div><div class='ctx'> </div><div class='add'>+	bond_destroy_debugfs();</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='ctx'> 	/* Make sure we don't have an imbalance on our netpoll blocking */</div><div class='ctx'> 	WARN_ON(atomic_read(&amp;netpoll_block_tx));</div><div class='hunk'>@@ -4744,6 +6551,6 @@ static void __exit bonding_exit(void)</div><div class='ctx'> module_init(bonding_init);</div><div class='ctx'> module_exit(bonding_exit);</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_VERSION(DRV_VERSION);</div><div class='del'>-MODULE_DESCRIPTION(DRV_DESCRIPTION ", v" DRV_VERSION);</div><div class='add'>+MODULE_DESCRIPTION(DRV_DESCRIPTION);</div><div class='ctx'> MODULE_AUTHOR("Thomas Davis, tadavis@lbl.gov and many others");</div><div class='add'>+MODULE_IMPORT_NS("NETDEV_INTERNAL");</div><div class='head'>diff --git a/drivers/net/bonding/bond_netlink.c b/drivers/net/bonding/bond_netlink.c<br/>index 1bda29249d12..286f11c517f7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/bonding/bond_netlink.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/bonding/bond_netlink.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/bonding/bond_netlink.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/bonding/bond_netlink.c</a></div><div class='hunk'>@@ -1,12 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='ctx'> /*</div><div class='ctx'>  * drivers/net/bond/bond_netlink.c - Netlink interface for bonding</div><div class='ctx'>  * Copyright (c) 2013 Jiri Pirko &lt;jiri@resnulli.us&gt;</div><div class='ctx'>  * Copyright (c) 2013 Scott Feldman &lt;sfeldma@cumulusnetworks.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -18,6 +14,7 @@</div><div class='ctx'> #include &lt;net/netlink.h&gt;</div><div class='ctx'> #include &lt;net/rtnetlink.h&gt;</div><div class='ctx'> #include &lt;net/bonding.h&gt;</div><div class='add'>+#include &lt;net/ipv6.h&gt;</div><div class='ctx'> </div><div class='ctx'> static size_t bond_get_slave_size(const struct net_device *bond_dev,</div><div class='ctx'> 				  const struct net_device *slave_dev)</div><div class='hunk'>@@ -30,6 +27,8 @@ static size_t bond_get_slave_size(const struct net_device *bond_dev,</div><div class='ctx'> 		nla_total_size(sizeof(u16)) +	/* IFLA_BOND_SLAVE_AD_AGGREGATOR_ID */</div><div class='ctx'> 		nla_total_size(sizeof(u8)) +	/* IFLA_BOND_SLAVE_AD_ACTOR_OPER_PORT_STATE */</div><div class='ctx'> 		nla_total_size(sizeof(u16)) +	/* IFLA_BOND_SLAVE_AD_PARTNER_OPER_PORT_STATE */</div><div class='add'>+		nla_total_size(sizeof(s32)) +	/* IFLA_BOND_SLAVE_PRIO */</div><div class='add'>+		nla_total_size(sizeof(u16)) +	/* IFLA_BOND_SLAVE_ACTOR_PORT_PRIO */</div><div class='ctx'> 		0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -53,7 +52,11 @@ static int bond_fill_slave_info(struct sk_buff *skb,</div><div class='ctx'> 		    slave_dev-&gt;addr_len, slave-&gt;perm_hwaddr))</div><div class='ctx'> 		goto nla_put_failure;</div><div class='ctx'> </div><div class='del'>-	if (nla_put_u16(skb, IFLA_BOND_SLAVE_QUEUE_ID, slave-&gt;queue_id))</div><div class='add'>+	if (nla_put_u16(skb, IFLA_BOND_SLAVE_QUEUE_ID,</div><div class='add'>+			READ_ONCE(slave-&gt;queue_id)))</div><div class='add'>+		goto nla_put_failure;</div><div class='add'>+</div><div class='add'>+	if (nla_put_s32(skb, IFLA_BOND_SLAVE_PRIO, slave-&gt;prio))</div><div class='ctx'> 		goto nla_put_failure;</div><div class='ctx'> </div><div class='ctx'> 	if (BOND_MODE(slave-&gt;bond) == BOND_MODE_8023AD) {</div><div class='hunk'>@@ -75,6 +78,10 @@ static int bond_fill_slave_info(struct sk_buff *skb,</div><div class='ctx'> 					ad_port-&gt;partner_oper.port_state))</div><div class='ctx'> 				goto nla_put_failure;</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		if (nla_put_u16(skb, IFLA_BOND_SLAVE_ACTOR_PORT_PRIO,</div><div class='add'>+				SLAVE_AD_INFO(slave)-&gt;port_priority))</div><div class='add'>+			goto nla_put_failure;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -83,6 +90,11 @@ nla_put_failure:</div><div class='ctx'> 	return -EMSGSIZE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Limit the max delay range to 300s */</div><div class='add'>+static const struct netlink_range_validation delay_range = {</div><div class='add'>+	.max = 300000,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const struct nla_policy bond_policy[IFLA_BOND_MAX + 1] = {</div><div class='ctx'> 	[IFLA_BOND_MODE]		= { .type = NLA_U8 },</div><div class='ctx'> 	[IFLA_BOND_ACTIVE_SLAVE]	= { .type = NLA_U32 },</div><div class='hunk'>@@ -104,6 +116,7 @@ static const struct nla_policy bond_policy[IFLA_BOND_MAX + 1] = {</div><div class='ctx'> 	[IFLA_BOND_MIN_LINKS]		= { .type = NLA_U32 },</div><div class='ctx'> 	[IFLA_BOND_LP_INTERVAL]		= { .type = NLA_U32 },</div><div class='ctx'> 	[IFLA_BOND_PACKETS_PER_SLAVE]	= { .type = NLA_U32 },</div><div class='add'>+	[IFLA_BOND_AD_LACP_ACTIVE]	= { .type = NLA_U8 },</div><div class='ctx'> 	[IFLA_BOND_AD_LACP_RATE]	= { .type = NLA_U8 },</div><div class='ctx'> 	[IFLA_BOND_AD_SELECT]		= { .type = NLA_U8 },</div><div class='ctx'> 	[IFLA_BOND_AD_INFO]		= { .type = NLA_NESTED },</div><div class='hunk'>@@ -111,13 +124,22 @@ static const struct nla_policy bond_policy[IFLA_BOND_MAX + 1] = {</div><div class='ctx'> 	[IFLA_BOND_AD_USER_PORT_KEY]	= { .type = NLA_U16 },</div><div class='ctx'> 	[IFLA_BOND_AD_ACTOR_SYSTEM]	= { .type = NLA_BINARY,</div><div class='ctx'> 					    .len  = ETH_ALEN },</div><div class='add'>+	[IFLA_BOND_TLB_DYNAMIC_LB]	= { .type = NLA_U8 },</div><div class='add'>+	[IFLA_BOND_PEER_NOTIF_DELAY]    = NLA_POLICY_FULL_RANGE(NLA_U32, &amp;delay_range),</div><div class='add'>+	[IFLA_BOND_MISSED_MAX]		= { .type = NLA_U8 },</div><div class='add'>+	[IFLA_BOND_NS_IP6_TARGET]	= { .type = NLA_NESTED },</div><div class='add'>+	[IFLA_BOND_COUPLED_CONTROL]	= { .type = NLA_U8 },</div><div class='add'>+	[IFLA_BOND_BROADCAST_NEIGH]	= { .type = NLA_U8 },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct nla_policy bond_slave_policy[IFLA_BOND_SLAVE_MAX + 1] = {</div><div class='ctx'> 	[IFLA_BOND_SLAVE_QUEUE_ID]	= { .type = NLA_U16 },</div><div class='add'>+	[IFLA_BOND_SLAVE_PRIO]		= { .type = NLA_S32 },</div><div class='add'>+	[IFLA_BOND_SLAVE_ACTOR_PORT_PRIO]	= { .type = NLA_U16 },</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int bond_validate(struct nlattr *tb[], struct nlattr *data[])</div><div class='add'>+static int bond_validate(struct nlattr *tb[], struct nlattr *data[],</div><div class='add'>+			 struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	if (tb[IFLA_ADDRESS]) {</div><div class='ctx'> 		if (nla_len(tb[IFLA_ADDRESS]) != ETH_ALEN)</div><div class='hunk'>@@ -130,7 +152,8 @@ static int bond_validate(struct nlattr *tb[], struct nlattr *data[])</div><div class='ctx'> </div><div class='ctx'> static int bond_slave_changelink(struct net_device *bond_dev,</div><div class='ctx'> 				 struct net_device *slave_dev,</div><div class='del'>-				 struct nlattr *tb[], struct nlattr *data[])</div><div class='add'>+				 struct nlattr *tb[], struct nlattr *data[],</div><div class='add'>+				 struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct bonding *bond = netdev_priv(bond_dev);</div><div class='ctx'> 	struct bond_opt_value newval;</div><div class='hunk'>@@ -147,7 +170,28 @@ static int bond_slave_changelink(struct net_device *bond_dev,</div><div class='ctx'> 		snprintf(queue_id_str, sizeof(queue_id_str), "%s:%u\n",</div><div class='ctx'> 			 slave_dev-&gt;name, queue_id);</div><div class='ctx'> 		bond_opt_initstr(&amp;newval, queue_id_str);</div><div class='del'>-		err = __bond_opt_set(bond, BOND_OPT_QUEUE_ID, &amp;newval);</div><div class='add'>+		err = __bond_opt_set(bond, BOND_OPT_QUEUE_ID, &amp;newval,</div><div class='add'>+				     data[IFLA_BOND_SLAVE_QUEUE_ID], extack);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (data[IFLA_BOND_SLAVE_PRIO]) {</div><div class='add'>+		int prio = nla_get_s32(data[IFLA_BOND_SLAVE_PRIO]);</div><div class='add'>+</div><div class='add'>+		bond_opt_slave_initval(&amp;newval, &amp;slave_dev, prio);</div><div class='add'>+		err = __bond_opt_set(bond, BOND_OPT_PRIO, &amp;newval,</div><div class='add'>+				     data[IFLA_BOND_SLAVE_PRIO], extack);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (data[IFLA_BOND_SLAVE_ACTOR_PORT_PRIO]) {</div><div class='add'>+		u16 ad_prio = nla_get_u16(data[IFLA_BOND_SLAVE_ACTOR_PORT_PRIO]);</div><div class='add'>+</div><div class='add'>+		bond_opt_slave_initval(&amp;newval, &amp;slave_dev, ad_prio);</div><div class='add'>+		err = __bond_opt_set(bond, BOND_OPT_ACTOR_PORT_PRIO, &amp;newval,</div><div class='add'>+				     data[IFLA_BOND_SLAVE_ACTOR_PORT_PRIO], extack);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -155,8 +199,9 @@ static int bond_slave_changelink(struct net_device *bond_dev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int bond_changelink(struct net_device *bond_dev,</div><div class='del'>-			   struct nlattr *tb[], struct nlattr *data[])</div><div class='add'>+static int bond_changelink(struct net_device *bond_dev, struct nlattr *tb[],</div><div class='add'>+			   struct nlattr *data[],</div><div class='add'>+			   struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct bonding *bond = netdev_priv(bond_dev);</div><div class='ctx'> 	struct bond_opt_value newval;</div><div class='hunk'>@@ -170,7 +215,8 @@ static int bond_changelink(struct net_device *bond_dev,</div><div class='ctx'> 		int mode = nla_get_u8(data[IFLA_BOND_MODE]);</div><div class='ctx'> </div><div class='ctx'> 		bond_opt_initval(&amp;newval, mode);</div><div class='del'>-		err = __bond_opt_set(bond, BOND_OPT_MODE, &amp;newval);</div><div class='add'>+		err = __bond_opt_set(bond, BOND_OPT_MODE, &amp;newval,</div><div class='add'>+				     data[IFLA_BOND_MODE], extack);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -187,7 +233,8 @@ static int bond_changelink(struct net_device *bond_dev,</div><div class='ctx'> 			active_slave = slave_dev-&gt;name;</div><div class='ctx'> 		}</div><div class='ctx'> 		bond_opt_initstr(&amp;newval, active_slave);</div><div class='del'>-		err = __bond_opt_set(bond, BOND_OPT_ACTIVE_SLAVE, &amp;newval);</div><div class='add'>+		err = __bond_opt_set(bond, BOND_OPT_ACTIVE_SLAVE, &amp;newval,</div><div class='add'>+				     data[IFLA_BOND_ACTIVE_SLAVE], extack);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -195,7 +242,8 @@ static int bond_changelink(struct net_device *bond_dev,</div><div class='ctx'> 		miimon = nla_get_u32(data[IFLA_BOND_MIIMON]);</div><div class='ctx'> </div><div class='ctx'> 		bond_opt_initval(&amp;newval, miimon);</div><div class='del'>-		err = __bond_opt_set(bond, BOND_OPT_MIIMON, &amp;newval);</div><div class='add'>+		err = __bond_opt_set(bond, BOND_OPT_MIIMON, &amp;newval,</div><div class='add'>+				     data[IFLA_BOND_MIIMON], extack);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -203,7 +251,8 @@ static int bond_changelink(struct net_device *bond_dev,</div><div class='ctx'> 		int updelay = nla_get_u32(data[IFLA_BOND_UPDELAY]);</div><div class='ctx'> </div><div class='ctx'> 		bond_opt_initval(&amp;newval, updelay);</div><div class='del'>-		err = __bond_opt_set(bond, BOND_OPT_UPDELAY, &amp;newval);</div><div class='add'>+		err = __bond_opt_set(bond, BOND_OPT_UPDELAY, &amp;newval,</div><div class='add'>+				     data[IFLA_BOND_UPDELAY], extack);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -211,28 +260,39 @@ static int bond_changelink(struct net_device *bond_dev,</div><div class='ctx'> 		int downdelay = nla_get_u32(data[IFLA_BOND_DOWNDELAY]);</div><div class='ctx'> </div><div class='ctx'> 		bond_opt_initval(&amp;newval, downdelay);</div><div class='del'>-		err = __bond_opt_set(bond, BOND_OPT_DOWNDELAY, &amp;newval);</div><div class='add'>+		err = __bond_opt_set(bond, BOND_OPT_DOWNDELAY, &amp;newval,</div><div class='add'>+				     data[IFLA_BOND_DOWNDELAY], extack);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='del'>-	if (data[IFLA_BOND_USE_CARRIER]) {</div><div class='del'>-		int use_carrier = nla_get_u8(data[IFLA_BOND_USE_CARRIER]);</div><div class='add'>+	if (data[IFLA_BOND_PEER_NOTIF_DELAY]) {</div><div class='add'>+		int delay = nla_get_u32(data[IFLA_BOND_PEER_NOTIF_DELAY]);</div><div class='ctx'> </div><div class='del'>-		bond_opt_initval(&amp;newval, use_carrier);</div><div class='del'>-		err = __bond_opt_set(bond, BOND_OPT_USE_CARRIER, &amp;newval);</div><div class='add'>+		bond_opt_initval(&amp;newval, delay);</div><div class='add'>+		err = __bond_opt_set(bond, BOND_OPT_PEER_NOTIF_DELAY, &amp;newval,</div><div class='add'>+				     data[IFLA_BOND_PEER_NOTIF_DELAY], extack);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='add'>+	if (data[IFLA_BOND_USE_CARRIER]) {</div><div class='add'>+		if (nla_get_u8(data[IFLA_BOND_USE_CARRIER]) != 1) {</div><div class='add'>+			NL_SET_ERR_MSG_ATTR(extack, data[IFLA_BOND_USE_CARRIER],</div><div class='add'>+					    "option obsolete, use_carrier cannot be disabled");</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> 	if (data[IFLA_BOND_ARP_INTERVAL]) {</div><div class='ctx'> 		int arp_interval = nla_get_u32(data[IFLA_BOND_ARP_INTERVAL]);</div><div class='ctx'> </div><div class='ctx'> 		if (arp_interval &amp;&amp; miimon) {</div><div class='del'>-			netdev_err(bond-&gt;dev, "ARP monitoring cannot be used with MII monitoring\n");</div><div class='add'>+			NL_SET_ERR_MSG_ATTR(extack, data[IFLA_BOND_ARP_INTERVAL],</div><div class='add'>+					    "ARP monitoring cannot be used with MII monitoring");</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		bond_opt_initval(&amp;newval, arp_interval);</div><div class='del'>-		err = __bond_opt_set(bond, BOND_OPT_ARP_INTERVAL, &amp;newval);</div><div class='add'>+		err = __bond_opt_set(bond, BOND_OPT_ARP_INTERVAL, &amp;newval,</div><div class='add'>+				     data[IFLA_BOND_ARP_INTERVAL], extack);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -251,7 +311,9 @@ static int bond_changelink(struct net_device *bond_dev,</div><div class='ctx'> </div><div class='ctx'> 			bond_opt_initval(&amp;newval, (__force u64)target);</div><div class='ctx'> 			err = __bond_opt_set(bond, BOND_OPT_ARP_TARGETS,</div><div class='del'>-					     &amp;newval);</div><div class='add'>+					     &amp;newval,</div><div class='add'>+					     data[IFLA_BOND_ARP_IP_TARGET],</div><div class='add'>+					     extack);</div><div class='ctx'> 			if (err)</div><div class='ctx'> 				break;</div><div class='ctx'> 			i++;</div><div class='hunk'>@@ -261,16 +323,49 @@ static int bond_changelink(struct net_device *bond_dev,</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+	if (data[IFLA_BOND_NS_IP6_TARGET]) {</div><div class='add'>+		struct nlattr *attr;</div><div class='add'>+		int i = 0, rem;</div><div class='add'>+</div><div class='add'>+		bond_option_ns_ip6_targets_clear(bond);</div><div class='add'>+		nla_for_each_nested(attr, data[IFLA_BOND_NS_IP6_TARGET], rem) {</div><div class='add'>+			struct in6_addr addr6;</div><div class='add'>+</div><div class='add'>+			if (nla_len(attr) &lt; sizeof(addr6)) {</div><div class='add'>+				NL_SET_ERR_MSG(extack, "Invalid IPv6 address");</div><div class='add'>+				return -EINVAL;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			addr6 = nla_get_in6_addr(attr);</div><div class='add'>+</div><div class='add'>+			bond_opt_initextra(&amp;newval, &amp;addr6, sizeof(addr6));</div><div class='add'>+			err = __bond_opt_set(bond, BOND_OPT_NS_TARGETS,</div><div class='add'>+					     &amp;newval,</div><div class='add'>+					     data[IFLA_BOND_NS_IP6_TARGET],</div><div class='add'>+					     extack);</div><div class='add'>+			if (err)</div><div class='add'>+				break;</div><div class='add'>+			i++;</div><div class='add'>+		}</div><div class='add'>+		if (i == 0 &amp;&amp; bond-&gt;params.arp_interval)</div><div class='add'>+			netdev_warn(bond-&gt;dev, "Removing last ns target with arp_interval on\n");</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='ctx'> 	if (data[IFLA_BOND_ARP_VALIDATE]) {</div><div class='ctx'> 		int arp_validate = nla_get_u32(data[IFLA_BOND_ARP_VALIDATE]);</div><div class='ctx'> </div><div class='ctx'> 		if (arp_validate &amp;&amp; miimon) {</div><div class='del'>-			netdev_err(bond-&gt;dev, "ARP validating cannot be used with MII monitoring\n");</div><div class='add'>+			NL_SET_ERR_MSG_ATTR(extack, data[IFLA_BOND_ARP_INTERVAL],</div><div class='add'>+					    "ARP validating cannot be used with MII monitoring");</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		bond_opt_initval(&amp;newval, arp_validate);</div><div class='del'>-		err = __bond_opt_set(bond, BOND_OPT_ARP_VALIDATE, &amp;newval);</div><div class='add'>+		err = __bond_opt_set(bond, BOND_OPT_ARP_VALIDATE, &amp;newval,</div><div class='add'>+				     data[IFLA_BOND_ARP_VALIDATE], extack);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -279,7 +374,8 @@ static int bond_changelink(struct net_device *bond_dev,</div><div class='ctx'> 			nla_get_u32(data[IFLA_BOND_ARP_ALL_TARGETS]);</div><div class='ctx'> </div><div class='ctx'> 		bond_opt_initval(&amp;newval, arp_all_targets);</div><div class='del'>-		err = __bond_opt_set(bond, BOND_OPT_ARP_ALL_TARGETS, &amp;newval);</div><div class='add'>+		err = __bond_opt_set(bond, BOND_OPT_ARP_ALL_TARGETS, &amp;newval,</div><div class='add'>+				     data[IFLA_BOND_ARP_ALL_TARGETS], extack);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -293,7 +389,8 @@ static int bond_changelink(struct net_device *bond_dev,</div><div class='ctx'> 			primary = dev-&gt;name;</div><div class='ctx'> </div><div class='ctx'> 		bond_opt_initstr(&amp;newval, primary);</div><div class='del'>-		err = __bond_opt_set(bond, BOND_OPT_PRIMARY, &amp;newval);</div><div class='add'>+		err = __bond_opt_set(bond, BOND_OPT_PRIMARY, &amp;newval,</div><div class='add'>+				     data[IFLA_BOND_PRIMARY], extack);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -302,7 +399,8 @@ static int bond_changelink(struct net_device *bond_dev,</div><div class='ctx'> 			nla_get_u8(data[IFLA_BOND_PRIMARY_RESELECT]);</div><div class='ctx'> </div><div class='ctx'> 		bond_opt_initval(&amp;newval, primary_reselect);</div><div class='del'>-		err = __bond_opt_set(bond, BOND_OPT_PRIMARY_RESELECT, &amp;newval);</div><div class='add'>+		err = __bond_opt_set(bond, BOND_OPT_PRIMARY_RESELECT, &amp;newval,</div><div class='add'>+				     data[IFLA_BOND_PRIMARY_RESELECT], extack);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -311,7 +409,8 @@ static int bond_changelink(struct net_device *bond_dev,</div><div class='ctx'> 			nla_get_u8(data[IFLA_BOND_FAIL_OVER_MAC]);</div><div class='ctx'> </div><div class='ctx'> 		bond_opt_initval(&amp;newval, fail_over_mac);</div><div class='del'>-		err = __bond_opt_set(bond, BOND_OPT_FAIL_OVER_MAC, &amp;newval);</div><div class='add'>+		err = __bond_opt_set(bond, BOND_OPT_FAIL_OVER_MAC, &amp;newval,</div><div class='add'>+				     data[IFLA_BOND_FAIL_OVER_MAC], extack);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -320,7 +419,8 @@ static int bond_changelink(struct net_device *bond_dev,</div><div class='ctx'> 			nla_get_u8(data[IFLA_BOND_XMIT_HASH_POLICY]);</div><div class='ctx'> </div><div class='ctx'> 		bond_opt_initval(&amp;newval, xmit_hash_policy);</div><div class='del'>-		err = __bond_opt_set(bond, BOND_OPT_XMIT_HASH, &amp;newval);</div><div class='add'>+		err = __bond_opt_set(bond, BOND_OPT_XMIT_HASH, &amp;newval,</div><div class='add'>+				     data[IFLA_BOND_XMIT_HASH_POLICY], extack);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -329,7 +429,8 @@ static int bond_changelink(struct net_device *bond_dev,</div><div class='ctx'> 			nla_get_u32(data[IFLA_BOND_RESEND_IGMP]);</div><div class='ctx'> </div><div class='ctx'> 		bond_opt_initval(&amp;newval, resend_igmp);</div><div class='del'>-		err = __bond_opt_set(bond, BOND_OPT_RESEND_IGMP, &amp;newval);</div><div class='add'>+		err = __bond_opt_set(bond, BOND_OPT_RESEND_IGMP, &amp;newval,</div><div class='add'>+				     data[IFLA_BOND_RESEND_IGMP], extack);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -338,7 +439,8 @@ static int bond_changelink(struct net_device *bond_dev,</div><div class='ctx'> 			nla_get_u8(data[IFLA_BOND_NUM_PEER_NOTIF]);</div><div class='ctx'> </div><div class='ctx'> 		bond_opt_initval(&amp;newval, num_peer_notif);</div><div class='del'>-		err = __bond_opt_set(bond, BOND_OPT_NUM_PEER_NOTIF, &amp;newval);</div><div class='add'>+		err = __bond_opt_set(bond, BOND_OPT_NUM_PEER_NOTIF, &amp;newval,</div><div class='add'>+				     data[IFLA_BOND_NUM_PEER_NOTIF], extack);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -347,7 +449,8 @@ static int bond_changelink(struct net_device *bond_dev,</div><div class='ctx'> 			nla_get_u8(data[IFLA_BOND_ALL_SLAVES_ACTIVE]);</div><div class='ctx'> </div><div class='ctx'> 		bond_opt_initval(&amp;newval, all_slaves_active);</div><div class='del'>-		err = __bond_opt_set(bond, BOND_OPT_ALL_SLAVES_ACTIVE, &amp;newval);</div><div class='add'>+		err = __bond_opt_set(bond, BOND_OPT_ALL_SLAVES_ACTIVE, &amp;newval,</div><div class='add'>+				     data[IFLA_BOND_ALL_SLAVES_ACTIVE], extack);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -356,7 +459,8 @@ static int bond_changelink(struct net_device *bond_dev,</div><div class='ctx'> 			nla_get_u32(data[IFLA_BOND_MIN_LINKS]);</div><div class='ctx'> </div><div class='ctx'> 		bond_opt_initval(&amp;newval, min_links);</div><div class='del'>-		err = __bond_opt_set(bond, BOND_OPT_MINLINKS, &amp;newval);</div><div class='add'>+		err = __bond_opt_set(bond, BOND_OPT_MINLINKS, &amp;newval,</div><div class='add'>+				     data[IFLA_BOND_MIN_LINKS], extack);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -365,7 +469,8 @@ static int bond_changelink(struct net_device *bond_dev,</div><div class='ctx'> 			nla_get_u32(data[IFLA_BOND_LP_INTERVAL]);</div><div class='ctx'> </div><div class='ctx'> 		bond_opt_initval(&amp;newval, lp_interval);</div><div class='del'>-		err = __bond_opt_set(bond, BOND_OPT_LP_INTERVAL, &amp;newval);</div><div class='add'>+		err = __bond_opt_set(bond, BOND_OPT_LP_INTERVAL, &amp;newval,</div><div class='add'>+				     data[IFLA_BOND_LP_INTERVAL], extack);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -374,16 +479,29 @@ static int bond_changelink(struct net_device *bond_dev,</div><div class='ctx'> 			nla_get_u32(data[IFLA_BOND_PACKETS_PER_SLAVE]);</div><div class='ctx'> </div><div class='ctx'> 		bond_opt_initval(&amp;newval, packets_per_slave);</div><div class='del'>-		err = __bond_opt_set(bond, BOND_OPT_PACKETS_PER_SLAVE, &amp;newval);</div><div class='add'>+		err = __bond_opt_set(bond, BOND_OPT_PACKETS_PER_SLAVE, &amp;newval,</div><div class='add'>+				     data[IFLA_BOND_PACKETS_PER_SLAVE], extack);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	if (data[IFLA_BOND_AD_LACP_ACTIVE]) {</div><div class='add'>+		int lacp_active = nla_get_u8(data[IFLA_BOND_AD_LACP_ACTIVE]);</div><div class='add'>+</div><div class='add'>+		bond_opt_initval(&amp;newval, lacp_active);</div><div class='add'>+		err = __bond_opt_set(bond, BOND_OPT_LACP_ACTIVE, &amp;newval,</div><div class='add'>+				     data[IFLA_BOND_AD_LACP_ACTIVE], extack);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (data[IFLA_BOND_AD_LACP_RATE]) {</div><div class='ctx'> 		int lacp_rate =</div><div class='ctx'> 			nla_get_u8(data[IFLA_BOND_AD_LACP_RATE]);</div><div class='ctx'> </div><div class='ctx'> 		bond_opt_initval(&amp;newval, lacp_rate);</div><div class='del'>-		err = __bond_opt_set(bond, BOND_OPT_LACP_RATE, &amp;newval);</div><div class='add'>+		err = __bond_opt_set(bond, BOND_OPT_LACP_RATE, &amp;newval,</div><div class='add'>+				     data[IFLA_BOND_AD_LACP_RATE], extack);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -392,7 +510,8 @@ static int bond_changelink(struct net_device *bond_dev,</div><div class='ctx'> 			nla_get_u8(data[IFLA_BOND_AD_SELECT]);</div><div class='ctx'> </div><div class='ctx'> 		bond_opt_initval(&amp;newval, ad_select);</div><div class='del'>-		err = __bond_opt_set(bond, BOND_OPT_AD_SELECT, &amp;newval);</div><div class='add'>+		err = __bond_opt_set(bond, BOND_OPT_AD_SELECT, &amp;newval,</div><div class='add'>+				     data[IFLA_BOND_AD_SELECT], extack);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -401,44 +520,98 @@ static int bond_changelink(struct net_device *bond_dev,</div><div class='ctx'> 			nla_get_u16(data[IFLA_BOND_AD_ACTOR_SYS_PRIO]);</div><div class='ctx'> </div><div class='ctx'> 		bond_opt_initval(&amp;newval, actor_sys_prio);</div><div class='del'>-		err = __bond_opt_set(bond, BOND_OPT_AD_ACTOR_SYS_PRIO, &amp;newval);</div><div class='add'>+		err = __bond_opt_set(bond, BOND_OPT_AD_ACTOR_SYS_PRIO, &amp;newval,</div><div class='add'>+				     data[IFLA_BOND_AD_ACTOR_SYS_PRIO], extack);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='ctx'> 	if (data[IFLA_BOND_AD_USER_PORT_KEY]) {</div><div class='ctx'> 		int port_key =</div><div class='ctx'> 			nla_get_u16(data[IFLA_BOND_AD_USER_PORT_KEY]);</div><div class='ctx'> </div><div class='ctx'> 		bond_opt_initval(&amp;newval, port_key);</div><div class='del'>-		err = __bond_opt_set(bond, BOND_OPT_AD_USER_PORT_KEY, &amp;newval);</div><div class='add'>+		err = __bond_opt_set(bond, BOND_OPT_AD_USER_PORT_KEY, &amp;newval,</div><div class='add'>+				     data[IFLA_BOND_AD_USER_PORT_KEY], extack);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='ctx'> 	if (data[IFLA_BOND_AD_ACTOR_SYSTEM]) {</div><div class='ctx'> 		if (nla_len(data[IFLA_BOND_AD_ACTOR_SYSTEM]) != ETH_ALEN)</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 		bond_opt_initval(&amp;newval,</div><div class='del'>-				 nla_get_be64(data[IFLA_BOND_AD_ACTOR_SYSTEM]));</div><div class='del'>-		err = __bond_opt_set(bond, BOND_OPT_AD_ACTOR_SYSTEM, &amp;newval);</div><div class='add'>+				 nla_get_u64(data[IFLA_BOND_AD_ACTOR_SYSTEM]));</div><div class='add'>+		err = __bond_opt_set(bond, BOND_OPT_AD_ACTOR_SYSTEM, &amp;newval,</div><div class='add'>+				     data[IFLA_BOND_AD_ACTOR_SYSTEM], extack);</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='add'>+	if (data[IFLA_BOND_TLB_DYNAMIC_LB]) {</div><div class='add'>+		int dynamic_lb = nla_get_u8(data[IFLA_BOND_TLB_DYNAMIC_LB]);</div><div class='add'>+</div><div class='add'>+		bond_opt_initval(&amp;newval, dynamic_lb);</div><div class='add'>+		err = __bond_opt_set(bond, BOND_OPT_TLB_DYNAMIC_LB, &amp;newval,</div><div class='add'>+				     data[IFLA_BOND_TLB_DYNAMIC_LB], extack);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (data[IFLA_BOND_MISSED_MAX]) {</div><div class='add'>+		int missed_max = nla_get_u8(data[IFLA_BOND_MISSED_MAX]);</div><div class='add'>+</div><div class='add'>+		bond_opt_initval(&amp;newval, missed_max);</div><div class='add'>+		err = __bond_opt_set(bond, BOND_OPT_MISSED_MAX, &amp;newval,</div><div class='add'>+				     data[IFLA_BOND_MISSED_MAX], extack);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (data[IFLA_BOND_COUPLED_CONTROL]) {</div><div class='add'>+		int coupled_control = nla_get_u8(data[IFLA_BOND_COUPLED_CONTROL]);</div><div class='add'>+</div><div class='add'>+		bond_opt_initval(&amp;newval, coupled_control);</div><div class='add'>+		err = __bond_opt_set(bond, BOND_OPT_COUPLED_CONTROL, &amp;newval,</div><div class='add'>+				     data[IFLA_BOND_COUPLED_CONTROL], extack);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (data[IFLA_BOND_BROADCAST_NEIGH]) {</div><div class='add'>+		int broadcast_neigh = nla_get_u8(data[IFLA_BOND_BROADCAST_NEIGH]);</div><div class='add'>+</div><div class='add'>+		bond_opt_initval(&amp;newval, broadcast_neigh);</div><div class='add'>+		err = __bond_opt_set(bond, BOND_OPT_BROADCAST_NEIGH, &amp;newval,</div><div class='add'>+				     data[IFLA_BOND_BROADCAST_NEIGH], extack);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int bond_newlink(struct net *src_net, struct net_device *bond_dev,</div><div class='del'>-			struct nlattr *tb[], struct nlattr *data[])</div><div class='add'>+static int bond_newlink(struct net_device *bond_dev,</div><div class='add'>+			struct rtnl_newlink_params *params,</div><div class='add'>+			struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='add'>+	struct bonding *bond = netdev_priv(bond_dev);</div><div class='add'>+	struct nlattr **data = params-&gt;data;</div><div class='add'>+	struct nlattr **tb = params-&gt;tb;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = bond_changelink(bond_dev, tb, data);</div><div class='del'>-	if (err &lt; 0)</div><div class='add'>+	err = register_netdevice(bond_dev);</div><div class='add'>+	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	return register_netdevice(bond_dev);</div><div class='add'>+	netif_carrier_off(bond_dev);</div><div class='add'>+	bond_work_init_all(bond);</div><div class='add'>+</div><div class='add'>+	err = bond_changelink(bond_dev, tb, data, extack);</div><div class='add'>+	if (err) {</div><div class='add'>+		bond_work_cancel_all(bond);</div><div class='add'>+		unregister_netdevice(bond_dev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static size_t bond_get_size(const struct net_device *bond_dev)</div><div class='hunk'>@@ -465,6 +638,7 @@ static size_t bond_get_size(const struct net_device *bond_dev)</div><div class='ctx'> 		nla_total_size(sizeof(u32)) +	/* IFLA_BOND_MIN_LINKS */</div><div class='ctx'> 		nla_total_size(sizeof(u32)) +	/* IFLA_BOND_LP_INTERVAL */</div><div class='ctx'> 		nla_total_size(sizeof(u32)) +  /* IFLA_BOND_PACKETS_PER_SLAVE */</div><div class='add'>+		nla_total_size(sizeof(u8)) +	/* IFLA_BOND_AD_LACP_ACTIVE */</div><div class='ctx'> 		nla_total_size(sizeof(u8)) +	/* IFLA_BOND_AD_LACP_RATE */</div><div class='ctx'> 		nla_total_size(sizeof(u8)) +	/* IFLA_BOND_AD_SELECT */</div><div class='ctx'> 		nla_total_size(sizeof(struct nlattr)) + /* IFLA_BOND_AD_INFO */</div><div class='hunk'>@@ -476,6 +650,14 @@ static size_t bond_get_size(const struct net_device *bond_dev)</div><div class='ctx'> 		nla_total_size(sizeof(u16)) + /* IFLA_BOND_AD_ACTOR_SYS_PRIO */</div><div class='ctx'> 		nla_total_size(sizeof(u16)) + /* IFLA_BOND_AD_USER_PORT_KEY */</div><div class='ctx'> 		nla_total_size(ETH_ALEN) + /* IFLA_BOND_AD_ACTOR_SYSTEM */</div><div class='add'>+		nla_total_size(sizeof(u8)) + /* IFLA_BOND_TLB_DYNAMIC_LB */</div><div class='add'>+		nla_total_size(sizeof(u32)) +	/* IFLA_BOND_PEER_NOTIF_DELAY */</div><div class='add'>+		nla_total_size(sizeof(u8)) +	/* IFLA_BOND_MISSED_MAX */</div><div class='add'>+						/* IFLA_BOND_NS_IP6_TARGET */</div><div class='add'>+		nla_total_size(sizeof(struct nlattr)) +</div><div class='add'>+		nla_total_size(sizeof(struct in6_addr)) * BOND_MAX_NS_TARGETS +</div><div class='add'>+		nla_total_size(sizeof(u8)) +	/* IFLA_BOND_COUPLED_CONTROL */</div><div class='add'>+		nla_total_size(sizeof(u8)) +	/* IFLA_BOND_BROADCAST_NEIGH */</div><div class='ctx'> 		0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -518,20 +700,25 @@ static int bond_fill_info(struct sk_buff *skb,</div><div class='ctx'> 			bond-&gt;params.downdelay * bond-&gt;params.miimon))</div><div class='ctx'> 		goto nla_put_failure;</div><div class='ctx'> </div><div class='del'>-	if (nla_put_u8(skb, IFLA_BOND_USE_CARRIER, bond-&gt;params.use_carrier))</div><div class='add'>+	if (nla_put_u32(skb, IFLA_BOND_PEER_NOTIF_DELAY,</div><div class='add'>+			bond-&gt;params.peer_notif_delay * bond-&gt;params.miimon))</div><div class='add'>+		goto nla_put_failure;</div><div class='add'>+</div><div class='add'>+	if (nla_put_u8(skb, IFLA_BOND_USE_CARRIER, 1))</div><div class='ctx'> 		goto nla_put_failure;</div><div class='ctx'> </div><div class='ctx'> 	if (nla_put_u32(skb, IFLA_BOND_ARP_INTERVAL, bond-&gt;params.arp_interval))</div><div class='ctx'> 		goto nla_put_failure;</div><div class='ctx'> </div><div class='del'>-	targets = nla_nest_start(skb, IFLA_BOND_ARP_IP_TARGET);</div><div class='add'>+	targets = nla_nest_start_noflag(skb, IFLA_BOND_ARP_IP_TARGET);</div><div class='ctx'> 	if (!targets)</div><div class='ctx'> 		goto nla_put_failure;</div><div class='ctx'> </div><div class='ctx'> 	targets_added = 0;</div><div class='ctx'> 	for (i = 0; i &lt; BOND_MAX_ARP_TARGETS; i++) {</div><div class='ctx'> 		if (bond-&gt;params.arp_targets[i]) {</div><div class='del'>-			nla_put_be32(skb, i, bond-&gt;params.arp_targets[i]);</div><div class='add'>+			if (nla_put_be32(skb, i, bond-&gt;params.arp_targets[i]))</div><div class='add'>+				goto nla_put_failure;</div><div class='ctx'> 			targets_added = 1;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -548,6 +735,26 @@ static int bond_fill_info(struct sk_buff *skb,</div><div class='ctx'> 			bond-&gt;params.arp_all_targets))</div><div class='ctx'> 		goto nla_put_failure;</div><div class='ctx'> </div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+	targets = nla_nest_start(skb, IFLA_BOND_NS_IP6_TARGET);</div><div class='add'>+	if (!targets)</div><div class='add'>+		goto nla_put_failure;</div><div class='add'>+</div><div class='add'>+	targets_added = 0;</div><div class='add'>+	for (i = 0; i &lt; BOND_MAX_NS_TARGETS; i++) {</div><div class='add'>+		if (!ipv6_addr_any(&amp;bond-&gt;params.ns_targets[i])) {</div><div class='add'>+			if (nla_put_in6_addr(skb, i, &amp;bond-&gt;params.ns_targets[i]))</div><div class='add'>+				goto nla_put_failure;</div><div class='add'>+			targets_added = 1;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (targets_added)</div><div class='add'>+		nla_nest_end(skb, targets);</div><div class='add'>+	else</div><div class='add'>+		nla_nest_cancel(skb, targets);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> 	primary = rtnl_dereference(bond-&gt;primary_slave);</div><div class='ctx'> 	if (primary &amp;&amp;</div><div class='ctx'> 	    nla_put_u32(skb, IFLA_BOND_PRIMARY, primary-&gt;dev-&gt;ifindex))</div><div class='hunk'>@@ -566,7 +773,7 @@ static int bond_fill_info(struct sk_buff *skb,</div><div class='ctx'> 		goto nla_put_failure;</div><div class='ctx'> </div><div class='ctx'> 	if (nla_put_u32(skb, IFLA_BOND_RESEND_IGMP,</div><div class='del'>-		        bond-&gt;params.resend_igmp))</div><div class='add'>+			bond-&gt;params.resend_igmp))</div><div class='ctx'> 		goto nla_put_failure;</div><div class='ctx'> </div><div class='ctx'> 	if (nla_put_u8(skb, IFLA_BOND_NUM_PEER_NOTIF,</div><div class='hunk'>@@ -590,6 +797,10 @@ static int bond_fill_info(struct sk_buff *skb,</div><div class='ctx'> 			packets_per_slave))</div><div class='ctx'> 		goto nla_put_failure;</div><div class='ctx'> </div><div class='add'>+	if (nla_put_u8(skb, IFLA_BOND_AD_LACP_ACTIVE,</div><div class='add'>+		       bond-&gt;params.lacp_active))</div><div class='add'>+		goto nla_put_failure;</div><div class='add'>+</div><div class='ctx'> 	if (nla_put_u8(skb, IFLA_BOND_AD_LACP_RATE,</div><div class='ctx'> 		       bond-&gt;params.lacp_fast))</div><div class='ctx'> 		goto nla_put_failure;</div><div class='hunk'>@@ -598,6 +809,22 @@ static int bond_fill_info(struct sk_buff *skb,</div><div class='ctx'> 		       bond-&gt;params.ad_select))</div><div class='ctx'> 		goto nla_put_failure;</div><div class='ctx'> </div><div class='add'>+	if (nla_put_u8(skb, IFLA_BOND_TLB_DYNAMIC_LB,</div><div class='add'>+		       bond-&gt;params.tlb_dynamic_lb))</div><div class='add'>+		goto nla_put_failure;</div><div class='add'>+</div><div class='add'>+	if (nla_put_u8(skb, IFLA_BOND_MISSED_MAX,</div><div class='add'>+		       bond-&gt;params.missed_max))</div><div class='add'>+		goto nla_put_failure;</div><div class='add'>+</div><div class='add'>+	if (nla_put_u8(skb, IFLA_BOND_COUPLED_CONTROL,</div><div class='add'>+		       bond-&gt;params.coupled_control))</div><div class='add'>+		goto nla_put_failure;</div><div class='add'>+</div><div class='add'>+	if (nla_put_u8(skb, IFLA_BOND_BROADCAST_NEIGH,</div><div class='add'>+		       bond-&gt;params.broadcast_neighbor))</div><div class='add'>+		goto nla_put_failure;</div><div class='add'>+</div><div class='ctx'> 	if (BOND_MODE(bond) == BOND_MODE_8023AD) {</div><div class='ctx'> 		struct ad_info info;</div><div class='ctx'> </div><div class='hunk'>@@ -611,14 +838,13 @@ static int bond_fill_info(struct sk_buff *skb,</div><div class='ctx'> 				goto nla_put_failure;</div><div class='ctx'> </div><div class='ctx'> 			if (nla_put(skb, IFLA_BOND_AD_ACTOR_SYSTEM,</div><div class='del'>-				    sizeof(bond-&gt;params.ad_actor_system),</div><div class='del'>-				    &amp;bond-&gt;params.ad_actor_system))</div><div class='add'>+				    ETH_ALEN, &amp;bond-&gt;params.ad_actor_system))</div><div class='ctx'> 				goto nla_put_failure;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (!bond_3ad_get_active_agg_info(bond, &amp;info)) {</div><div class='ctx'> 			struct nlattr *nest;</div><div class='ctx'> </div><div class='del'>-			nest = nla_nest_start(skb, IFLA_BOND_AD_INFO);</div><div class='add'>+			nest = nla_nest_start_noflag(skb, IFLA_BOND_AD_INFO);</div><div class='ctx'> 			if (!nest)</div><div class='ctx'> 				goto nla_put_failure;</div><div class='ctx'> </div><div class='hunk'>@@ -649,6 +875,71 @@ nla_put_failure:</div><div class='ctx'> 	return -EMSGSIZE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static size_t bond_get_linkxstats_size(const struct net_device *dev, int attr)</div><div class='add'>+{</div><div class='add'>+	switch (attr) {</div><div class='add'>+	case IFLA_STATS_LINK_XSTATS:</div><div class='add'>+	case IFLA_STATS_LINK_XSTATS_SLAVE:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return bond_3ad_stats_size() + nla_total_size(0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bond_fill_linkxstats(struct sk_buff *skb,</div><div class='add'>+				const struct net_device *dev,</div><div class='add'>+				int *prividx, int attr)</div><div class='add'>+{</div><div class='add'>+	struct nlattr *nla __maybe_unused;</div><div class='add'>+	struct slave *slave = NULL;</div><div class='add'>+	struct nlattr *nest, *nest2;</div><div class='add'>+	struct bonding *bond;</div><div class='add'>+</div><div class='add'>+	switch (attr) {</div><div class='add'>+	case IFLA_STATS_LINK_XSTATS:</div><div class='add'>+		bond = netdev_priv(dev);</div><div class='add'>+		break;</div><div class='add'>+	case IFLA_STATS_LINK_XSTATS_SLAVE:</div><div class='add'>+		slave = bond_slave_get_rtnl(dev);</div><div class='add'>+		if (!slave)</div><div class='add'>+			return 0;</div><div class='add'>+		bond = slave-&gt;bond;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nest = nla_nest_start_noflag(skb, LINK_XSTATS_TYPE_BOND);</div><div class='add'>+	if (!nest)</div><div class='add'>+		return -EMSGSIZE;</div><div class='add'>+	if (BOND_MODE(bond) == BOND_MODE_8023AD) {</div><div class='add'>+		struct bond_3ad_stats *stats;</div><div class='add'>+</div><div class='add'>+		if (slave)</div><div class='add'>+			stats = &amp;SLAVE_AD_INFO(slave)-&gt;stats;</div><div class='add'>+		else</div><div class='add'>+			stats = &amp;BOND_AD_INFO(bond).stats;</div><div class='add'>+</div><div class='add'>+		nest2 = nla_nest_start_noflag(skb, BOND_XSTATS_3AD);</div><div class='add'>+		if (!nest2) {</div><div class='add'>+			nla_nest_end(skb, nest);</div><div class='add'>+			return -EMSGSIZE;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (bond_3ad_stats_fill(skb, stats)) {</div><div class='add'>+			nla_nest_cancel(skb, nest2);</div><div class='add'>+			nla_nest_end(skb, nest);</div><div class='add'>+			return -EMSGSIZE;</div><div class='add'>+		}</div><div class='add'>+		nla_nest_end(skb, nest2);</div><div class='add'>+	}</div><div class='add'>+	nla_nest_end(skb, nest);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> struct rtnl_link_ops bond_link_ops __read_mostly = {</div><div class='ctx'> 	.kind			= "bond",</div><div class='ctx'> 	.priv_size		= sizeof(struct bonding),</div><div class='hunk'>@@ -663,6 +954,8 @@ struct rtnl_link_ops bond_link_ops __read_mostly = {</div><div class='ctx'> 	.get_num_tx_queues	= bond_get_num_tx_queues,</div><div class='ctx'> 	.get_num_rx_queues	= bond_get_num_tx_queues, /* Use the same number</div><div class='ctx'> 							     as for TX queues */</div><div class='add'>+	.fill_linkxstats        = bond_fill_linkxstats,</div><div class='add'>+	.get_linkxstats_size    = bond_get_linkxstats_size,</div><div class='ctx'> 	.slave_maxtype		= IFLA_BOND_SLAVE_MAX,</div><div class='ctx'> 	.slave_policy		= bond_slave_policy,</div><div class='ctx'> 	.slave_changelink	= bond_slave_changelink,</div><div class='head'>diff --git a/drivers/net/bonding/bond_options.c b/drivers/net/bonding/bond_options.c<br/>index e9c624d54dd4..384499c869b8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/bonding/bond_options.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/bonding/bond_options.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/bonding/bond_options.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/bonding/bond_options.c</a></div><div class='hunk'>@@ -1,12 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='ctx'> /*</div><div class='ctx'>  * drivers/net/bond/bond_options.c - bonding options</div><div class='ctx'>  * Copyright (c) 2013 Jiri Pirko &lt;jiri@resnulli.us&gt;</div><div class='ctx'>  * Copyright (c) 2013 Scott Feldman &lt;sfeldma@cumulusnetworks.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='hunk'>@@ -16,7 +12,10 @@</div><div class='ctx'> #include &lt;linux/rcupdate.h&gt;</div><div class='ctx'> #include &lt;linux/ctype.h&gt;</div><div class='ctx'> #include &lt;linux/inet.h&gt;</div><div class='add'>+#include &lt;linux/sched/signal.h&gt;</div><div class='add'>+</div><div class='ctx'> #include &lt;net/bonding.h&gt;</div><div class='add'>+#include &lt;net/ndisc.h&gt;</div><div class='ctx'> </div><div class='ctx'> static int bond_option_active_slave_set(struct bonding *bond,</div><div class='ctx'> 					const struct bond_opt_value *newval);</div><div class='hunk'>@@ -26,6 +25,8 @@ static int bond_option_updelay_set(struct bonding *bond,</div><div class='ctx'> 				   const struct bond_opt_value *newval);</div><div class='ctx'> static int bond_option_downdelay_set(struct bonding *bond,</div><div class='ctx'> 				     const struct bond_opt_value *newval);</div><div class='add'>+static int bond_option_peer_notif_delay_set(struct bonding *bond,</div><div class='add'>+					    const struct bond_opt_value *newval);</div><div class='ctx'> static int bond_option_use_carrier_set(struct bonding *bond,</div><div class='ctx'> 				       const struct bond_opt_value *newval);</div><div class='ctx'> static int bond_option_arp_interval_set(struct bonding *bond,</div><div class='hunk'>@@ -34,10 +35,14 @@ static int bond_option_arp_ip_target_add(struct bonding *bond, __be32 target);</div><div class='ctx'> static int bond_option_arp_ip_target_rem(struct bonding *bond, __be32 target);</div><div class='ctx'> static int bond_option_arp_ip_targets_set(struct bonding *bond,</div><div class='ctx'> 					  const struct bond_opt_value *newval);</div><div class='add'>+static int bond_option_ns_ip6_targets_set(struct bonding *bond,</div><div class='add'>+					  const struct bond_opt_value *newval);</div><div class='ctx'> static int bond_option_arp_validate_set(struct bonding *bond,</div><div class='ctx'> 					const struct bond_opt_value *newval);</div><div class='ctx'> static int bond_option_arp_all_targets_set(struct bonding *bond,</div><div class='ctx'> 					   const struct bond_opt_value *newval);</div><div class='add'>+static int bond_option_prio_set(struct bonding *bond,</div><div class='add'>+				const struct bond_opt_value *newval);</div><div class='ctx'> static int bond_option_primary_set(struct bonding *bond,</div><div class='ctx'> 				   const struct bond_opt_value *newval);</div><div class='ctx'> static int bond_option_primary_reselect_set(struct bonding *bond,</div><div class='hunk'>@@ -58,6 +63,8 @@ static int bond_option_lp_interval_set(struct bonding *bond,</div><div class='ctx'> 				       const struct bond_opt_value *newval);</div><div class='ctx'> static int bond_option_pps_set(struct bonding *bond,</div><div class='ctx'> 			       const struct bond_opt_value *newval);</div><div class='add'>+static int bond_option_lacp_active_set(struct bonding *bond,</div><div class='add'>+				       const struct bond_opt_value *newval);</div><div class='ctx'> static int bond_option_lacp_rate_set(struct bonding *bond,</div><div class='ctx'> 				     const struct bond_opt_value *newval);</div><div class='ctx'> static int bond_option_ad_select_set(struct bonding *bond,</div><div class='hunk'>@@ -72,11 +79,18 @@ static int bond_option_tlb_dynamic_lb_set(struct bonding *bond,</div><div class='ctx'> 				  const struct bond_opt_value *newval);</div><div class='ctx'> static int bond_option_ad_actor_sys_prio_set(struct bonding *bond,</div><div class='ctx'> 					     const struct bond_opt_value *newval);</div><div class='add'>+static int bond_option_actor_port_prio_set(struct bonding *bond,</div><div class='add'>+					   const struct bond_opt_value *newval);</div><div class='ctx'> static int bond_option_ad_actor_system_set(struct bonding *bond,</div><div class='ctx'> 					   const struct bond_opt_value *newval);</div><div class='ctx'> static int bond_option_ad_user_port_key_set(struct bonding *bond,</div><div class='ctx'> 					    const struct bond_opt_value *newval);</div><div class='del'>-</div><div class='add'>+static int bond_option_missed_max_set(struct bonding *bond,</div><div class='add'>+				      const struct bond_opt_value *newval);</div><div class='add'>+static int bond_option_coupled_control_set(struct bonding *bond,</div><div class='add'>+					   const struct bond_opt_value *newval);</div><div class='add'>+static int bond_option_broadcast_neigh_set(struct bonding *bond,</div><div class='add'>+					   const struct bond_opt_value *newval);</div><div class='ctx'> </div><div class='ctx'> static const struct bond_opt_value bond_mode_tbl[] = {</div><div class='ctx'> 	{ "balance-rr",    BOND_MODE_ROUNDROBIN,   BOND_VALFLAG_DEFAULT},</div><div class='hunk'>@@ -96,12 +110,13 @@ static const struct bond_opt_value bond_pps_tbl[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct bond_opt_value bond_xmit_hashtype_tbl[] = {</div><div class='del'>-	{ "layer2",   BOND_XMIT_POLICY_LAYER2, BOND_VALFLAG_DEFAULT},</div><div class='del'>-	{ "layer3+4", BOND_XMIT_POLICY_LAYER34, 0},</div><div class='del'>-	{ "layer2+3", BOND_XMIT_POLICY_LAYER23, 0},</div><div class='del'>-	{ "encap2+3", BOND_XMIT_POLICY_ENCAP23, 0},</div><div class='del'>-	{ "encap3+4", BOND_XMIT_POLICY_ENCAP34, 0},</div><div class='del'>-	{ NULL,       -1,                       0},</div><div class='add'>+	{ "layer2",      BOND_XMIT_POLICY_LAYER2,      BOND_VALFLAG_DEFAULT},</div><div class='add'>+	{ "layer3+4",    BOND_XMIT_POLICY_LAYER34,     0},</div><div class='add'>+	{ "layer2+3",    BOND_XMIT_POLICY_LAYER23,     0},</div><div class='add'>+	{ "encap2+3",    BOND_XMIT_POLICY_ENCAP23,     0},</div><div class='add'>+	{ "encap3+4",    BOND_XMIT_POLICY_ENCAP34,     0},</div><div class='add'>+	{ "vlan+srcmac", BOND_XMIT_POLICY_VLAN_SRCMAC, 0},</div><div class='add'>+	{ NULL,          -1,                           0},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct bond_opt_value bond_arp_validate_tbl[] = {</div><div class='hunk'>@@ -134,6 +149,12 @@ static const struct bond_opt_value bond_intmax_tbl[] = {</div><div class='ctx'> 	{ NULL,      -1,      0}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct bond_opt_value bond_lacp_active[] = {</div><div class='add'>+	{ "off", 0,  0},</div><div class='add'>+	{ "on",  1,  BOND_VALFLAG_DEFAULT},</div><div class='add'>+	{ NULL,  -1, 0}</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const struct bond_opt_value bond_lacp_rate_tbl[] = {</div><div class='ctx'> 	{ "slow", AD_LACP_SLOW, 0},</div><div class='ctx'> 	{ "fast", AD_LACP_FAST, 0},</div><div class='hunk'>@@ -141,10 +162,11 @@ static const struct bond_opt_value bond_lacp_rate_tbl[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct bond_opt_value bond_ad_select_tbl[] = {</div><div class='del'>-	{ "stable",    BOND_AD_STABLE,    BOND_VALFLAG_DEFAULT},</div><div class='del'>-	{ "bandwidth", BOND_AD_BANDWIDTH, 0},</div><div class='del'>-	{ "count",     BOND_AD_COUNT,     0},</div><div class='del'>-	{ NULL,        -1,                0},</div><div class='add'>+	{ "stable",          BOND_AD_STABLE,    BOND_VALFLAG_DEFAULT},</div><div class='add'>+	{ "bandwidth",       BOND_AD_BANDWIDTH, 0},</div><div class='add'>+	{ "count",           BOND_AD_COUNT,     0},</div><div class='add'>+	{ "actor_port_prio", BOND_AD_PRIO,      0},</div><div class='add'>+	{ NULL,              -1,                0},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct bond_opt_value bond_num_peer_notif_tbl[] = {</div><div class='hunk'>@@ -154,6 +176,12 @@ static const struct bond_opt_value bond_num_peer_notif_tbl[] = {</div><div class='ctx'> 	{ NULL,      -1,  0}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct bond_opt_value bond_peer_notif_delay_tbl[] = {</div><div class='add'>+	{ "off",     0,   0},</div><div class='add'>+	{ "maxval",  300000, BOND_VALFLAG_MAX},</div><div class='add'>+	{ NULL,      -1,  0}</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const struct bond_opt_value bond_primary_reselect_tbl[] = {</div><div class='ctx'> 	{ "always",  BOND_PRI_RESELECT_ALWAYS,  BOND_VALFLAG_DEFAULT},</div><div class='ctx'> 	{ "better",  BOND_PRI_RESELECT_BETTER,  0},</div><div class='hunk'>@@ -162,7 +190,6 @@ static const struct bond_opt_value bond_primary_reselect_tbl[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct bond_opt_value bond_use_carrier_tbl[] = {</div><div class='del'>-	{ "off", 0,  0},</div><div class='ctx'> 	{ "on",  1,  BOND_VALFLAG_DEFAULT},</div><div class='ctx'> 	{ NULL,  -1, 0}</div><div class='ctx'> };</div><div class='hunk'>@@ -204,6 +231,25 @@ static const struct bond_opt_value bond_ad_user_port_key_tbl[] = {</div><div class='ctx'> 	{ NULL,      -1,    0},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct bond_opt_value bond_missed_max_tbl[] = {</div><div class='add'>+	{ "minval",	1,	BOND_VALFLAG_MIN},</div><div class='add'>+	{ "maxval",	255,	BOND_VALFLAG_MAX},</div><div class='add'>+	{ "default",	2,	BOND_VALFLAG_DEFAULT},</div><div class='add'>+	{ NULL,		-1,	0},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct bond_opt_value bond_coupled_control_tbl[] = {</div><div class='add'>+	{ "on",  1,  BOND_VALFLAG_DEFAULT},</div><div class='add'>+	{ "off", 0,  0},</div><div class='add'>+	{ NULL,  -1, 0},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct bond_opt_value bond_broadcast_neigh_tbl[] = {</div><div class='add'>+	{ "off", 0, BOND_VALFLAG_DEFAULT},</div><div class='add'>+	{ "on",	 1, 0},</div><div class='add'>+	{ NULL,  -1, 0}</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const struct bond_option bond_opts[BOND_OPT_LAST] = {</div><div class='ctx'> 	[BOND_OPT_MODE] = {</div><div class='ctx'> 		.id = BOND_OPT_MODE,</div><div class='hunk'>@@ -261,6 +307,15 @@ static const struct bond_option bond_opts[BOND_OPT_LAST] = {</div><div class='ctx'> 		.values = bond_intmax_tbl,</div><div class='ctx'> 		.set = bond_option_arp_interval_set</div><div class='ctx'> 	},</div><div class='add'>+	[BOND_OPT_MISSED_MAX] = {</div><div class='add'>+		.id = BOND_OPT_MISSED_MAX,</div><div class='add'>+		.name = "arp_missed_max",</div><div class='add'>+		.desc = "Maximum number of missed ARP interval",</div><div class='add'>+		.unsuppmodes = BIT(BOND_MODE_8023AD) | BIT(BOND_MODE_TLB) |</div><div class='add'>+			       BIT(BOND_MODE_ALB),</div><div class='add'>+		.values = bond_missed_max_tbl,</div><div class='add'>+		.set = bond_option_missed_max_set</div><div class='add'>+	},</div><div class='ctx'> 	[BOND_OPT_ARP_TARGETS] = {</div><div class='ctx'> 		.id = BOND_OPT_ARP_TARGETS,</div><div class='ctx'> 		.name = "arp_ip_target",</div><div class='hunk'>@@ -268,6 +323,13 @@ static const struct bond_option bond_opts[BOND_OPT_LAST] = {</div><div class='ctx'> 		.flags = BOND_OPTFLAG_RAWVAL,</div><div class='ctx'> 		.set = bond_option_arp_ip_targets_set</div><div class='ctx'> 	},</div><div class='add'>+	[BOND_OPT_NS_TARGETS] = {</div><div class='add'>+		.id = BOND_OPT_NS_TARGETS,</div><div class='add'>+		.name = "ns_ip6_target",</div><div class='add'>+		.desc = "NS targets in ffff:ffff::ffff:ffff form",</div><div class='add'>+		.flags = BOND_OPTFLAG_RAWVAL,</div><div class='add'>+		.set = bond_option_ns_ip6_targets_set</div><div class='add'>+	},</div><div class='ctx'> 	[BOND_OPT_DOWNDELAY] = {</div><div class='ctx'> 		.id = BOND_OPT_DOWNDELAY,</div><div class='ctx'> 		.name = "downdelay",</div><div class='hunk'>@@ -282,6 +344,15 @@ static const struct bond_option bond_opts[BOND_OPT_LAST] = {</div><div class='ctx'> 		.values = bond_intmax_tbl,</div><div class='ctx'> 		.set = bond_option_updelay_set</div><div class='ctx'> 	},</div><div class='add'>+	[BOND_OPT_LACP_ACTIVE] = {</div><div class='add'>+		.id = BOND_OPT_LACP_ACTIVE,</div><div class='add'>+		.name = "lacp_active",</div><div class='add'>+		.desc = "Send LACPDU frames with configured lacp rate or acts as speak when spoken to",</div><div class='add'>+		.flags = BOND_OPTFLAG_IFDOWN,</div><div class='add'>+		.unsuppmodes = BOND_MODE_ALL_EX(BIT(BOND_MODE_8023AD)),</div><div class='add'>+		.values = bond_lacp_active,</div><div class='add'>+		.set = bond_option_lacp_active_set</div><div class='add'>+	},</div><div class='ctx'> 	[BOND_OPT_LACP_RATE] = {</div><div class='ctx'> 		.id = BOND_OPT_LACP_RATE,</div><div class='ctx'> 		.name = "lacp_rate",</div><div class='hunk'>@@ -301,7 +372,7 @@ static const struct bond_option bond_opts[BOND_OPT_LAST] = {</div><div class='ctx'> 	[BOND_OPT_AD_SELECT] = {</div><div class='ctx'> 		.id = BOND_OPT_AD_SELECT,</div><div class='ctx'> 		.name = "ad_select",</div><div class='del'>-		.desc = "803.ad aggregation selection logic",</div><div class='add'>+		.desc = "802.3ad aggregation selection logic",</div><div class='ctx'> 		.flags = BOND_OPTFLAG_IFDOWN,</div><div class='ctx'> 		.values = bond_ad_select_tbl,</div><div class='ctx'> 		.set = bond_option_ad_select_set</div><div class='hunk'>@@ -320,6 +391,16 @@ static const struct bond_option bond_opts[BOND_OPT_LAST] = {</div><div class='ctx'> 		.values = bond_intmax_tbl,</div><div class='ctx'> 		.set = bond_option_miimon_set</div><div class='ctx'> 	},</div><div class='add'>+	[BOND_OPT_PRIO] = {</div><div class='add'>+		.id = BOND_OPT_PRIO,</div><div class='add'>+		.name = "prio",</div><div class='add'>+		.desc = "Link priority for failover re-selection",</div><div class='add'>+		.flags = BOND_OPTFLAG_RAWVAL,</div><div class='add'>+		.unsuppmodes = BOND_MODE_ALL_EX(BIT(BOND_MODE_ACTIVEBACKUP) |</div><div class='add'>+						BIT(BOND_MODE_TLB) |</div><div class='add'>+						BIT(BOND_MODE_ALB)),</div><div class='add'>+		.set = bond_option_prio_set</div><div class='add'>+	},</div><div class='ctx'> 	[BOND_OPT_PRIMARY] = {</div><div class='ctx'> 		.id = BOND_OPT_PRIMARY,</div><div class='ctx'> 		.name = "primary",</div><div class='hunk'>@@ -340,7 +421,7 @@ static const struct bond_option bond_opts[BOND_OPT_LAST] = {</div><div class='ctx'> 	[BOND_OPT_USE_CARRIER] = {</div><div class='ctx'> 		.id = BOND_OPT_USE_CARRIER,</div><div class='ctx'> 		.name = "use_carrier",</div><div class='del'>-		.desc = "Use netif_carrier_ok (vs MII ioctls) in miimon",</div><div class='add'>+		.desc = "option obsolete, use_carrier cannot be disabled",</div><div class='ctx'> 		.values = bond_use_carrier_tbl,</div><div class='ctx'> 		.set = bond_option_use_carrier_set</div><div class='ctx'> 	},</div><div class='hunk'>@@ -393,7 +474,7 @@ static const struct bond_option bond_opts[BOND_OPT_LAST] = {</div><div class='ctx'> 		.id = BOND_OPT_TLB_DYNAMIC_LB,</div><div class='ctx'> 		.name = "tlb_dynamic_lb",</div><div class='ctx'> 		.desc = "Enable dynamic flow shuffling",</div><div class='del'>-		.unsuppmodes = BOND_MODE_ALL_EX(BIT(BOND_MODE_TLB)),</div><div class='add'>+		.unsuppmodes = BOND_MODE_ALL_EX(BIT(BOND_MODE_TLB) | BIT(BOND_MODE_ALB)),</div><div class='ctx'> 		.values = bond_tlb_dynamic_lb_tbl,</div><div class='ctx'> 		.flags = BOND_OPTFLAG_IFDOWN,</div><div class='ctx'> 		.set = bond_option_tlb_dynamic_lb_set,</div><div class='hunk'>@@ -402,15 +483,21 @@ static const struct bond_option bond_opts[BOND_OPT_LAST] = {</div><div class='ctx'> 		.id = BOND_OPT_AD_ACTOR_SYS_PRIO,</div><div class='ctx'> 		.name = "ad_actor_sys_prio",</div><div class='ctx'> 		.unsuppmodes = BOND_MODE_ALL_EX(BIT(BOND_MODE_8023AD)),</div><div class='del'>-		.flags = BOND_OPTFLAG_IFDOWN,</div><div class='ctx'> 		.values = bond_ad_actor_sys_prio_tbl,</div><div class='ctx'> 		.set = bond_option_ad_actor_sys_prio_set,</div><div class='ctx'> 	},</div><div class='add'>+	[BOND_OPT_ACTOR_PORT_PRIO] = {</div><div class='add'>+		.id = BOND_OPT_ACTOR_PORT_PRIO,</div><div class='add'>+		.name = "actor_port_prio",</div><div class='add'>+		.unsuppmodes = BOND_MODE_ALL_EX(BIT(BOND_MODE_8023AD)),</div><div class='add'>+		.flags = BOND_OPTFLAG_RAWVAL,</div><div class='add'>+		.set = bond_option_actor_port_prio_set,</div><div class='add'>+	},</div><div class='ctx'> 	[BOND_OPT_AD_ACTOR_SYSTEM] = {</div><div class='ctx'> 		.id = BOND_OPT_AD_ACTOR_SYSTEM,</div><div class='ctx'> 		.name = "ad_actor_system",</div><div class='ctx'> 		.unsuppmodes = BOND_MODE_ALL_EX(BIT(BOND_MODE_8023AD)),</div><div class='del'>-		.flags = BOND_OPTFLAG_RAWVAL | BOND_OPTFLAG_IFDOWN,</div><div class='add'>+		.flags = BOND_OPTFLAG_RAWVAL,</div><div class='ctx'> 		.set = bond_option_ad_actor_system_set,</div><div class='ctx'> 	},</div><div class='ctx'> 	[BOND_OPT_AD_USER_PORT_KEY] = {</div><div class='hunk'>@@ -420,6 +507,37 @@ static const struct bond_option bond_opts[BOND_OPT_LAST] = {</div><div class='ctx'> 		.flags = BOND_OPTFLAG_IFDOWN,</div><div class='ctx'> 		.values = bond_ad_user_port_key_tbl,</div><div class='ctx'> 		.set = bond_option_ad_user_port_key_set,</div><div class='add'>+	},</div><div class='add'>+	[BOND_OPT_NUM_PEER_NOTIF_ALIAS] = {</div><div class='add'>+		.id = BOND_OPT_NUM_PEER_NOTIF_ALIAS,</div><div class='add'>+		.name = "num_grat_arp",</div><div class='add'>+		.desc = "Number of peer notifications to send on failover event",</div><div class='add'>+		.values = bond_num_peer_notif_tbl,</div><div class='add'>+		.set = bond_option_num_peer_notif_set</div><div class='add'>+	},</div><div class='add'>+	[BOND_OPT_PEER_NOTIF_DELAY] = {</div><div class='add'>+		.id = BOND_OPT_PEER_NOTIF_DELAY,</div><div class='add'>+		.name = "peer_notif_delay",</div><div class='add'>+		.desc = "Delay between each peer notification on failover event, in milliseconds",</div><div class='add'>+		.values = bond_peer_notif_delay_tbl,</div><div class='add'>+		.set = bond_option_peer_notif_delay_set</div><div class='add'>+	},</div><div class='add'>+	[BOND_OPT_COUPLED_CONTROL] = {</div><div class='add'>+		.id = BOND_OPT_COUPLED_CONTROL,</div><div class='add'>+		.name = "coupled_control",</div><div class='add'>+		.desc = "Opt into using coupled control MUX for LACP states",</div><div class='add'>+		.unsuppmodes = BOND_MODE_ALL_EX(BIT(BOND_MODE_8023AD)),</div><div class='add'>+		.flags = BOND_OPTFLAG_IFDOWN,</div><div class='add'>+		.values = bond_coupled_control_tbl,</div><div class='add'>+		.set = bond_option_coupled_control_set,</div><div class='add'>+	},</div><div class='add'>+	[BOND_OPT_BROADCAST_NEIGH] = {</div><div class='add'>+		.id = BOND_OPT_BROADCAST_NEIGH,</div><div class='add'>+		.name = "broadcast_neighbor",</div><div class='add'>+		.desc = "Broadcast neighbor packets to all active slaves",</div><div class='add'>+		.unsuppmodes = BOND_MODE_ALL_EX(BIT(BOND_MODE_8023AD)),</div><div class='add'>+		.values = bond_broadcast_neigh_tbl,</div><div class='add'>+		.set = bond_option_broadcast_neigh_set,</div><div class='ctx'> 	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -456,7 +574,7 @@ const struct bond_opt_value *bond_opt_get_val(unsigned int option, u64 val)</div><div class='ctx'> </div><div class='ctx'> /* Searches for a value in opt's values[] table which matches the flagmask */</div><div class='ctx'> static const struct bond_opt_value *bond_opt_get_flags(const struct bond_option *opt,</div><div class='del'>-						 u32 flagmask)</div><div class='add'>+						       u32 flagmask)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -574,27 +692,35 @@ static int bond_opt_check_deps(struct bonding *bond,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bond_opt_dep_print(struct bonding *bond,</div><div class='del'>-			       const struct bond_option *opt)</div><div class='add'>+			       const struct bond_option *opt,</div><div class='add'>+			       struct nlattr *bad_attr,</div><div class='add'>+			       struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	const struct bond_opt_value *modeval;</div><div class='ctx'> 	struct bond_params *params;</div><div class='ctx'> </div><div class='ctx'> 	params = &amp;bond-&gt;params;</div><div class='ctx'> 	modeval = bond_opt_get_val(BOND_OPT_MODE, params-&gt;mode);</div><div class='del'>-	if (test_bit(params-&gt;mode, &amp;opt-&gt;unsuppmodes))</div><div class='add'>+	if (test_bit(params-&gt;mode, &amp;opt-&gt;unsuppmodes)) {</div><div class='ctx'> 		netdev_err(bond-&gt;dev, "option %s: mode dependency failed, not supported in mode %s(%llu)\n",</div><div class='ctx'> 			   opt-&gt;name, modeval-&gt;string, modeval-&gt;value);</div><div class='add'>+		NL_SET_ERR_MSG_ATTR(extack, bad_attr,</div><div class='add'>+				    "option not supported in mode");</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bond_opt_error_interpret(struct bonding *bond,</div><div class='ctx'> 				     const struct bond_option *opt,</div><div class='del'>-				     int error, const struct bond_opt_value *val)</div><div class='add'>+				     int error, const struct bond_opt_value *val,</div><div class='add'>+				     struct nlattr *bad_attr,</div><div class='add'>+				     struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	const struct bond_opt_value *minval, *maxval;</div><div class='ctx'> 	char *p;</div><div class='ctx'> </div><div class='ctx'> 	switch (error) {</div><div class='ctx'> 	case -EINVAL:</div><div class='add'>+		NL_SET_ERR_MSG_ATTR(extack, bad_attr, "invalid option value");</div><div class='ctx'> 		if (val) {</div><div class='ctx'> 			if (val-&gt;string) {</div><div class='ctx'> 				/* sometimes RAWVAL opts may have new lines */</div><div class='hunk'>@@ -616,16 +742,31 @@ static void bond_opt_error_interpret(struct bonding *bond,</div><div class='ctx'> 			   opt-&gt;name, minval ? minval-&gt;value : 0, maxval-&gt;value);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case -EACCES:</div><div class='del'>-		bond_opt_dep_print(bond, opt);</div><div class='add'>+		bond_opt_dep_print(bond, opt, bad_attr, extack);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case -ENOTEMPTY:</div><div class='add'>+		NL_SET_ERR_MSG_ATTR(extack, bad_attr,</div><div class='add'>+				    "unable to set option because the bond device has slaves");</div><div class='ctx'> 		netdev_err(bond-&gt;dev, "option %s: unable to set because the bond device has slaves\n",</div><div class='ctx'> 			   opt-&gt;name);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case -EBUSY:</div><div class='add'>+		NL_SET_ERR_MSG_ATTR(extack, bad_attr,</div><div class='add'>+				    "unable to set option because the bond is up");</div><div class='ctx'> 		netdev_err(bond-&gt;dev, "option %s: unable to set because the bond device is up\n",</div><div class='ctx'> 			   opt-&gt;name);</div><div class='ctx'> 		break;</div><div class='add'>+	case -ENODEV:</div><div class='add'>+		if (val &amp;&amp; val-&gt;string) {</div><div class='add'>+			p = strchr(val-&gt;string, '\n');</div><div class='add'>+			if (p)</div><div class='add'>+				*p = '\0';</div><div class='add'>+			netdev_err(bond-&gt;dev, "option %s: interface %s does not exist!\n",</div><div class='add'>+				   opt-&gt;name, val-&gt;string);</div><div class='add'>+			NL_SET_ERR_MSG_ATTR(extack, bad_attr,</div><div class='add'>+					    "interface does not exist");</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -636,13 +777,17 @@ static void bond_opt_error_interpret(struct bonding *bond,</div><div class='ctx'>  * @bond: target bond device</div><div class='ctx'>  * @option: option to set</div><div class='ctx'>  * @val: value to set it to</div><div class='add'>+ * @bad_attr: netlink attribue that caused the error</div><div class='add'>+ * @extack: extended netlink error structure, used when an error message</div><div class='add'>+ *          needs to be returned to the caller via netlink</div><div class='ctx'>  *</div><div class='ctx'>  * This function is used to change the bond's option value, it can be</div><div class='ctx'>  * used for both enabling/changing an option and for disabling it. RTNL lock</div><div class='ctx'>  * must be obtained before calling this function.</div><div class='ctx'>  */</div><div class='ctx'> int __bond_opt_set(struct bonding *bond,</div><div class='del'>-		   unsigned int option, struct bond_opt_value *val)</div><div class='add'>+		   unsigned int option, struct bond_opt_value *val,</div><div class='add'>+		   struct nlattr *bad_attr, struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	const struct bond_opt_value *retval = NULL;</div><div class='ctx'> 	const struct bond_option *opt;</div><div class='hunk'>@@ -664,8 +809,31 @@ int __bond_opt_set(struct bonding *bond,</div><div class='ctx'> 	ret = opt-&gt;set(bond, retval);</div><div class='ctx'> out:</div><div class='ctx'> 	if (ret)</div><div class='del'>-		bond_opt_error_interpret(bond, opt, ret, val);</div><div class='del'>-	else if (bond-&gt;dev-&gt;reg_state == NETREG_REGISTERED)</div><div class='add'>+		bond_opt_error_interpret(bond, opt, ret, val, bad_attr, extack);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+/**</div><div class='add'>+ * __bond_opt_set_notify - set a bonding option</div><div class='add'>+ * @bond: target bond device</div><div class='add'>+ * @option: option to set</div><div class='add'>+ * @val: value to set it to</div><div class='add'>+ *</div><div class='add'>+ * This function is used to change the bond's option value and trigger</div><div class='add'>+ * a notification to user sapce. It can be used for both enabling/changing</div><div class='add'>+ * an option and for disabling it. RTNL lock must be obtained before calling</div><div class='add'>+ * this function.</div><div class='add'>+ */</div><div class='add'>+int __bond_opt_set_notify(struct bonding *bond,</div><div class='add'>+			  unsigned int option, struct bond_opt_value *val)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ASSERT_RTNL();</div><div class='add'>+</div><div class='add'>+	ret = __bond_opt_set(bond, option, val, NULL, NULL);</div><div class='add'>+</div><div class='add'>+	if (!ret &amp;&amp; (bond-&gt;dev-&gt;reg_state == NETREG_REGISTERED))</div><div class='ctx'> 		call_netdevice_notifiers(NETDEV_CHANGEINFODATA, bond-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -688,7 +856,7 @@ int bond_opt_tryset_rtnl(struct bonding *bond, unsigned int option, char *buf)</div><div class='ctx'> 	if (!rtnl_trylock())</div><div class='ctx'> 		return restart_syscall();</div><div class='ctx'> 	bond_opt_initstr(&amp;optval, buf);</div><div class='del'>-	ret = __bond_opt_set(bond, option, &amp;optval);</div><div class='add'>+	ret = __bond_opt_set_notify(bond, option, &amp;optval);</div><div class='ctx'> 	rtnl_unlock();</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -709,38 +877,67 @@ const struct bond_option *bond_opt_get(unsigned int option)</div><div class='ctx'> 	return &amp;bond_opts[option];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool bond_set_xfrm_features(struct bonding *bond)</div><div class='add'>+{</div><div class='add'>+	if (!IS_ENABLED(CONFIG_XFRM_OFFLOAD))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (BOND_MODE(bond) == BOND_MODE_ACTIVEBACKUP)</div><div class='add'>+		bond-&gt;dev-&gt;wanted_features |= BOND_XFRM_FEATURES;</div><div class='add'>+	else</div><div class='add'>+		bond-&gt;dev-&gt;wanted_features &amp;= ~BOND_XFRM_FEATURES;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int bond_option_mode_set(struct bonding *bond,</div><div class='ctx'> 				const struct bond_opt_value *newval)</div><div class='ctx'> {</div><div class='del'>-	if (!bond_mode_uses_arp(newval-&gt;value) &amp;&amp; bond-&gt;params.arp_interval) {</div><div class='del'>-		netdev_info(bond-&gt;dev, "%s mode is incompatible with arp monitoring, start mii monitoring\n",</div><div class='del'>-			    newval-&gt;string);</div><div class='del'>-		/* disable arp monitoring */</div><div class='del'>-		bond-&gt;params.arp_interval = 0;</div><div class='del'>-		/* set miimon to default value */</div><div class='del'>-		bond-&gt;params.miimon = BOND_DEFAULT_MIIMON;</div><div class='del'>-		netdev_info(bond-&gt;dev, "Setting MII monitoring interval to %d\n",</div><div class='del'>-			    bond-&gt;params.miimon);</div><div class='add'>+	if (bond-&gt;xdp_prog &amp;&amp; !bond_xdp_check(bond, newval-&gt;value))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (!bond_mode_uses_arp(newval-&gt;value)) {</div><div class='add'>+		if (bond-&gt;params.arp_interval) {</div><div class='add'>+			netdev_dbg(bond-&gt;dev, "%s mode is incompatible with arp monitoring, start mii monitoring\n",</div><div class='add'>+				   newval-&gt;string);</div><div class='add'>+			/* disable arp monitoring */</div><div class='add'>+			bond-&gt;params.arp_interval = 0;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!bond-&gt;params.miimon) {</div><div class='add'>+			/* set miimon to default value */</div><div class='add'>+			bond-&gt;params.miimon = BOND_DEFAULT_MIIMON;</div><div class='add'>+			netdev_dbg(bond-&gt;dev, "Setting MII monitoring interval to %d\n",</div><div class='add'>+				   bond-&gt;params.miimon);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (newval-&gt;value == BOND_MODE_ALB)</div><div class='add'>+		bond-&gt;params.tlb_dynamic_lb = 1;</div><div class='add'>+</div><div class='ctx'> 	/* don't cache arp_validate between modes */</div><div class='ctx'> 	bond-&gt;params.arp_validate = BOND_ARP_VALIDATE_NONE;</div><div class='ctx'> 	bond-&gt;params.mode = newval-&gt;value;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='add'>+	/* When changing mode, the bond device is down, we may reduce</div><div class='add'>+	 * the bond_bcast_neigh_enabled in bond_close() if broadcast_neighbor</div><div class='add'>+	 * enabled in 8023ad mode. Therefore, only clear broadcast_neighbor</div><div class='add'>+	 * to 0.</div><div class='add'>+	 */</div><div class='add'>+	bond-&gt;params.broadcast_neighbor = 0;</div><div class='ctx'> </div><div class='del'>-static struct net_device *__bond_option_active_slave_get(struct bonding *bond,</div><div class='del'>-							 struct slave *slave)</div><div class='del'>-{</div><div class='del'>-	return bond_uses_primary(bond) &amp;&amp; slave ? slave-&gt;dev : NULL;</div><div class='del'>-}</div><div class='add'>+	if (bond-&gt;dev-&gt;reg_state == NETREG_REGISTERED) {</div><div class='add'>+		bool update = false;</div><div class='ctx'> </div><div class='del'>-struct net_device *bond_option_active_slave_get_rcu(struct bonding *bond)</div><div class='del'>-{</div><div class='del'>-	struct slave *slave = rcu_dereference(bond-&gt;curr_active_slave);</div><div class='add'>+		update |= bond_set_xfrm_features(bond);</div><div class='add'>+</div><div class='add'>+		if (update)</div><div class='add'>+			netdev_update_features(bond-&gt;dev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bond_xdp_set_features(bond-&gt;dev);</div><div class='ctx'> </div><div class='del'>-	return __bond_option_active_slave_get(bond, slave);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int bond_option_active_slave_set(struct bonding *bond,</div><div class='hunk'>@@ -761,14 +958,12 @@ static int bond_option_active_slave_set(struct bonding *bond,</div><div class='ctx'> </div><div class='ctx'> 	if (slave_dev) {</div><div class='ctx'> 		if (!netif_is_bond_slave(slave_dev)) {</div><div class='del'>-			netdev_err(bond-&gt;dev, "Device %s is not bonding slave\n",</div><div class='del'>-				   slave_dev-&gt;name);</div><div class='add'>+			slave_err(bond-&gt;dev, slave_dev, "Device is not bonding slave\n");</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (bond-&gt;dev != netdev_master_upper_dev_get(slave_dev)) {</div><div class='del'>-			netdev_err(bond-&gt;dev, "Device %s is not our slave\n",</div><div class='del'>-				   slave_dev-&gt;name);</div><div class='add'>+			slave_err(bond-&gt;dev, slave_dev, "Device is not our slave\n");</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -776,8 +971,8 @@ static int bond_option_active_slave_set(struct bonding *bond,</div><div class='ctx'> 	block_netpoll_tx();</div><div class='ctx'> 	/* check to see if we are clearing active */</div><div class='ctx'> 	if (!slave_dev) {</div><div class='del'>-		netdev_info(bond-&gt;dev, "Clearing current active slave\n");</div><div class='del'>-		RCU_INIT_POINTER(bond-&gt;curr_active_slave, NULL);</div><div class='add'>+		netdev_dbg(bond-&gt;dev, "Clearing current active slave\n");</div><div class='add'>+		bond_change_active_slave(bond, NULL);</div><div class='ctx'> 		bond_select_active_slave(bond);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		struct slave *old_active = rtnl_dereference(bond-&gt;curr_active_slave);</div><div class='hunk'>@@ -787,18 +982,15 @@ static int bond_option_active_slave_set(struct bonding *bond,</div><div class='ctx'> </div><div class='ctx'> 		if (new_active == old_active) {</div><div class='ctx'> 			/* do nothing */</div><div class='del'>-			netdev_info(bond-&gt;dev, "%s is already the current active slave\n",</div><div class='del'>-				    new_active-&gt;dev-&gt;name);</div><div class='add'>+			slave_dbg(bond-&gt;dev, new_active-&gt;dev, "is already the current active slave\n");</div><div class='ctx'> 		} else {</div><div class='ctx'> 			if (old_active &amp;&amp; (new_active-&gt;link == BOND_LINK_UP) &amp;&amp;</div><div class='ctx'> 			    bond_slave_is_up(new_active)) {</div><div class='del'>-				netdev_info(bond-&gt;dev, "Setting %s as active slave\n",</div><div class='del'>-					    new_active-&gt;dev-&gt;name);</div><div class='add'>+				slave_dbg(bond-&gt;dev, new_active-&gt;dev, "Setting as active slave\n");</div><div class='ctx'> 				bond_change_active_slave(bond, new_active);</div><div class='ctx'> 			} else {</div><div class='del'>-				netdev_err(bond-&gt;dev, "Could not set %s as active slave; either %s is down or the link is down\n",</div><div class='del'>-					   new_active-&gt;dev-&gt;name,</div><div class='del'>-					   new_active-&gt;dev-&gt;name);</div><div class='add'>+				slave_err(bond-&gt;dev, new_active-&gt;dev, "Could not set as active slave; either %s is down or the link is down\n",</div><div class='add'>+					  new_active-&gt;dev-&gt;name);</div><div class='ctx'> 				ret = -EINVAL;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='hunk'>@@ -815,17 +1007,20 @@ static int bond_option_active_slave_set(struct bonding *bond,</div><div class='ctx'> static int bond_option_miimon_set(struct bonding *bond,</div><div class='ctx'> 				  const struct bond_opt_value *newval)</div><div class='ctx'> {</div><div class='del'>-	netdev_info(bond-&gt;dev, "Setting MII monitoring interval to %llu\n",</div><div class='del'>-		    newval-&gt;value);</div><div class='add'>+	netdev_dbg(bond-&gt;dev, "Setting MII monitoring interval to %llu\n",</div><div class='add'>+		   newval-&gt;value);</div><div class='ctx'> 	bond-&gt;params.miimon = newval-&gt;value;</div><div class='ctx'> 	if (bond-&gt;params.updelay)</div><div class='del'>-		netdev_info(bond-&gt;dev, "Note: Updating updelay (to %d) since it is a multiple of the miimon value\n",</div><div class='del'>-			bond-&gt;params.updelay * bond-&gt;params.miimon);</div><div class='add'>+		netdev_dbg(bond-&gt;dev, "Note: Updating updelay (to %d) since it is a multiple of the miimon value\n",</div><div class='add'>+			   bond-&gt;params.updelay * bond-&gt;params.miimon);</div><div class='ctx'> 	if (bond-&gt;params.downdelay)</div><div class='del'>-		netdev_info(bond-&gt;dev, "Note: Updating downdelay (to %d) since it is a multiple of the miimon value\n",</div><div class='del'>-			    bond-&gt;params.downdelay * bond-&gt;params.miimon);</div><div class='add'>+		netdev_dbg(bond-&gt;dev, "Note: Updating downdelay (to %d) since it is a multiple of the miimon value\n",</div><div class='add'>+			   bond-&gt;params.downdelay * bond-&gt;params.miimon);</div><div class='add'>+	if (bond-&gt;params.peer_notif_delay)</div><div class='add'>+		netdev_dbg(bond-&gt;dev, "Note: Updating peer_notif_delay (to %d) since it is a multiple of the miimon value\n",</div><div class='add'>+			   bond-&gt;params.peer_notif_delay * bond-&gt;params.miimon);</div><div class='ctx'> 	if (newval-&gt;value &amp;&amp; bond-&gt;params.arp_interval) {</div><div class='del'>-		netdev_info(bond-&gt;dev, "MII monitoring cannot be used with ARP monitoring - disabling ARP monitoring...\n");</div><div class='add'>+		netdev_dbg(bond-&gt;dev, "MII monitoring cannot be used with ARP monitoring - disabling ARP monitoring...\n");</div><div class='ctx'> 		bond-&gt;params.arp_interval = 0;</div><div class='ctx'> 		if (bond-&gt;params.arp_validate)</div><div class='ctx'> 			bond-&gt;params.arp_validate = BOND_ARP_VALIDATE_NONE;</div><div class='hunk'>@@ -847,61 +1042,64 @@ static int bond_option_miimon_set(struct bonding *bond,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Set up and down delays. These must be multiples of the</div><div class='del'>- * MII monitoring value, and are stored internally as the multiplier.</div><div class='del'>- * Thus, we must translate to MS for the real world.</div><div class='add'>+/* Set up, down and peer notification delays. These must be multiples</div><div class='add'>+ * of the MII monitoring value, and are stored internally as the</div><div class='add'>+ * multiplier. Thus, we must translate to MS for the real world.</div><div class='ctx'>  */</div><div class='del'>-static int bond_option_updelay_set(struct bonding *bond,</div><div class='del'>-				   const struct bond_opt_value *newval)</div><div class='add'>+static int _bond_option_delay_set(struct bonding *bond,</div><div class='add'>+				  const struct bond_opt_value *newval,</div><div class='add'>+				  const char *name,</div><div class='add'>+				  int *target)</div><div class='ctx'> {</div><div class='ctx'> 	int value = newval-&gt;value;</div><div class='ctx'> </div><div class='ctx'> 	if (!bond-&gt;params.miimon) {</div><div class='del'>-		netdev_err(bond-&gt;dev, "Unable to set up delay as MII monitoring is disabled\n");</div><div class='add'>+		netdev_err(bond-&gt;dev, "Unable to set %s as MII monitoring is disabled\n",</div><div class='add'>+			   name);</div><div class='ctx'> 		return -EPERM;</div><div class='ctx'> 	}</div><div class='ctx'> 	if ((value % bond-&gt;params.miimon) != 0) {</div><div class='del'>-		netdev_warn(bond-&gt;dev, "up delay (%d) is not a multiple of miimon (%d), updelay rounded to %d ms\n",</div><div class='add'>+		netdev_warn(bond-&gt;dev,</div><div class='add'>+			    "%s (%d) is not a multiple of miimon (%d), value rounded to %d ms\n",</div><div class='add'>+			    name,</div><div class='ctx'> 			    value, bond-&gt;params.miimon,</div><div class='ctx'> 			    (value / bond-&gt;params.miimon) *</div><div class='ctx'> 			    bond-&gt;params.miimon);</div><div class='ctx'> 	}</div><div class='del'>-	bond-&gt;params.updelay = value / bond-&gt;params.miimon;</div><div class='del'>-	netdev_info(bond-&gt;dev, "Setting up delay to %d\n",</div><div class='del'>-		    bond-&gt;params.updelay * bond-&gt;params.miimon);</div><div class='add'>+	*target = value / bond-&gt;params.miimon;</div><div class='add'>+	netdev_dbg(bond-&gt;dev, "Setting %s to %d\n",</div><div class='add'>+		   name,</div><div class='add'>+		   *target * bond-&gt;params.miimon);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int bond_option_updelay_set(struct bonding *bond,</div><div class='add'>+				   const struct bond_opt_value *newval)</div><div class='add'>+{</div><div class='add'>+	return _bond_option_delay_set(bond, newval, "up delay",</div><div class='add'>+				      &amp;bond-&gt;params.updelay);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int bond_option_downdelay_set(struct bonding *bond,</div><div class='ctx'> 				     const struct bond_opt_value *newval)</div><div class='ctx'> {</div><div class='del'>-	int value = newval-&gt;value;</div><div class='del'>-</div><div class='del'>-	if (!bond-&gt;params.miimon) {</div><div class='del'>-		netdev_err(bond-&gt;dev, "Unable to set down delay as MII monitoring is disabled\n");</div><div class='del'>-		return -EPERM;</div><div class='del'>-	}</div><div class='del'>-	if ((value % bond-&gt;params.miimon) != 0) {</div><div class='del'>-		netdev_warn(bond-&gt;dev, "down delay (%d) is not a multiple of miimon (%d), delay rounded to %d ms\n",</div><div class='del'>-			    value, bond-&gt;params.miimon,</div><div class='del'>-			    (value / bond-&gt;params.miimon) *</div><div class='del'>-			    bond-&gt;params.miimon);</div><div class='del'>-	}</div><div class='del'>-	bond-&gt;params.downdelay = value / bond-&gt;params.miimon;</div><div class='del'>-	netdev_info(bond-&gt;dev, "Setting down delay to %d\n",</div><div class='del'>-		    bond-&gt;params.downdelay * bond-&gt;params.miimon);</div><div class='add'>+	return _bond_option_delay_set(bond, newval, "down delay",</div><div class='add'>+				      &amp;bond-&gt;params.downdelay);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+static int bond_option_peer_notif_delay_set(struct bonding *bond,</div><div class='add'>+					    const struct bond_opt_value *newval)</div><div class='add'>+{</div><div class='add'>+	int ret = _bond_option_delay_set(bond, newval,</div><div class='add'>+					 "peer notification delay",</div><div class='add'>+					 &amp;bond-&gt;params.peer_notif_delay);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int bond_option_use_carrier_set(struct bonding *bond,</div><div class='ctx'> 				       const struct bond_opt_value *newval)</div><div class='ctx'> {</div><div class='del'>-	netdev_info(bond-&gt;dev, "Setting use_carrier to %llu\n",</div><div class='del'>-		    newval-&gt;value);</div><div class='del'>-	bond-&gt;params.use_carrier = newval-&gt;value;</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -912,16 +1110,16 @@ static int bond_option_use_carrier_set(struct bonding *bond,</div><div class='ctx'> static int bond_option_arp_interval_set(struct bonding *bond,</div><div class='ctx'> 					const struct bond_opt_value *newval)</div><div class='ctx'> {</div><div class='del'>-	netdev_info(bond-&gt;dev, "Setting ARP monitoring interval to %llu\n",</div><div class='del'>-		    newval-&gt;value);</div><div class='add'>+	netdev_dbg(bond-&gt;dev, "Setting ARP monitoring interval to %llu\n",</div><div class='add'>+		   newval-&gt;value);</div><div class='ctx'> 	bond-&gt;params.arp_interval = newval-&gt;value;</div><div class='ctx'> 	if (newval-&gt;value) {</div><div class='ctx'> 		if (bond-&gt;params.miimon) {</div><div class='del'>-			netdev_info(bond-&gt;dev, "ARP monitoring cannot be used with MII monitoring. Disabling MII monitoring\n");</div><div class='add'>+			netdev_dbg(bond-&gt;dev, "ARP monitoring cannot be used with MII monitoring. Disabling MII monitoring\n");</div><div class='ctx'> 			bond-&gt;params.miimon = 0;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (!bond-&gt;params.arp_targets[0])</div><div class='del'>-			netdev_info(bond-&gt;dev, "ARP monitoring has been set up, but no ARP targets have been specified\n");</div><div class='add'>+			netdev_dbg(bond-&gt;dev, "ARP monitoring has been set up, but no ARP targets have been specified\n");</div><div class='ctx'> 	}</div><div class='ctx'> 	if (bond-&gt;dev-&gt;flags &amp; IFF_UP) {</div><div class='ctx'> 		/* If the interface is up, we may need to fire off</div><div class='hunk'>@@ -935,7 +1133,7 @@ static int bond_option_arp_interval_set(struct bonding *bond,</div><div class='ctx'> 			cancel_delayed_work_sync(&amp;bond-&gt;arp_work);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			/* arp_validate can be set only in active-backup mode */</div><div class='del'>-			bond-&gt;recv_probe = bond_arp_rcv;</div><div class='add'>+			bond-&gt;recv_probe = bond_rcv_validate;</div><div class='ctx'> 			cancel_delayed_work_sync(&amp;bond-&gt;mii_work);</div><div class='ctx'> 			queue_delayed_work(bond-&gt;wq, &amp;bond-&gt;arp_work, 0);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -982,7 +1180,7 @@ static int _bond_option_arp_ip_target_add(struct bonding *bond, __be32 target)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	netdev_info(bond-&gt;dev, "Adding ARP target %pI4\n", &amp;target);</div><div class='add'>+	netdev_dbg(bond-&gt;dev, "Adding ARP target %pI4\n", &amp;target);</div><div class='ctx'> </div><div class='ctx'> 	_bond_options_arp_ip_target_set(bond, ind, target, jiffies);</div><div class='ctx'> </div><div class='hunk'>@@ -1018,7 +1216,7 @@ static int bond_option_arp_ip_target_rem(struct bonding *bond, __be32 target)</div><div class='ctx'> 	if (ind == 0 &amp;&amp; !targets[1] &amp;&amp; bond-&gt;params.arp_interval)</div><div class='ctx'> 		netdev_warn(bond-&gt;dev, "Removing last arp target with arp_interval on\n");</div><div class='ctx'> </div><div class='del'>-	netdev_info(bond-&gt;dev, "Removing ARP target %pI4\n", &amp;target);</div><div class='add'>+	netdev_dbg(bond-&gt;dev, "Removing ARP target %pI4\n", &amp;target);</div><div class='ctx'> </div><div class='ctx'> 	bond_for_each_slave(bond, slave, iter) {</div><div class='ctx'> 		targets_rx = slave-&gt;target_last_arp_rx;</div><div class='hunk'>@@ -1048,9 +1246,9 @@ static int bond_option_arp_ip_targets_set(struct bonding *bond,</div><div class='ctx'> 	__be32 target;</div><div class='ctx'> </div><div class='ctx'> 	if (newval-&gt;string) {</div><div class='del'>-		if (!in4_pton(newval-&gt;string+1, -1, (u8 *)&amp;target, -1, NULL)) {</div><div class='del'>-			netdev_err(bond-&gt;dev, "invalid ARP target %pI4 specified\n",</div><div class='del'>-				   &amp;target);</div><div class='add'>+		if (strlen(newval-&gt;string) &lt; 1 ||</div><div class='add'>+		    !in4_pton(newval-&gt;string + 1, -1, (u8 *)&amp;target, -1, NULL)) {</div><div class='add'>+			netdev_err(bond-&gt;dev, "invalid ARP target specified\n");</div><div class='ctx'> 			return ret;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (newval-&gt;string[0] == '+')</div><div class='hunk'>@@ -1067,33 +1265,240 @@ static int bond_option_arp_ip_targets_set(struct bonding *bond,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+static bool slave_can_set_ns_maddr(const struct bonding *bond, struct slave *slave)</div><div class='add'>+{</div><div class='add'>+	return BOND_MODE(bond) == BOND_MODE_ACTIVEBACKUP &amp;&amp;</div><div class='add'>+	       !bond_is_active_slave(slave) &amp;&amp;</div><div class='add'>+	       slave-&gt;dev-&gt;flags &amp; IFF_MULTICAST;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * slave_set_ns_maddrs - add/del all NS mac addresses for slave</div><div class='add'>+ * @bond: bond device</div><div class='add'>+ * @slave: slave device</div><div class='add'>+ * @add: add or remove all the NS mac addresses</div><div class='add'>+ *</div><div class='add'>+ * This function tries to add or delete all the NS mac addresses on the slave</div><div class='add'>+ *</div><div class='add'>+ * Note, the IPv6 NS target address is the unicast address in Neighbor</div><div class='add'>+ * Solicitation (NS) message. The dest address of NS message should be</div><div class='add'>+ * solicited-node multicast address of the target. The dest mac of NS message</div><div class='add'>+ * is converted from the solicited-node multicast address.</div><div class='add'>+ *</div><div class='add'>+ * This function is called when</div><div class='add'>+ *   * arp_validate changes</div><div class='add'>+ *   * enslaving, releasing new slaves</div><div class='add'>+ */</div><div class='add'>+static void slave_set_ns_maddrs(struct bonding *bond, struct slave *slave, bool add)</div><div class='add'>+{</div><div class='add'>+	struct in6_addr *targets = bond-&gt;params.ns_targets;</div><div class='add'>+	char slot_maddr[MAX_ADDR_LEN];</div><div class='add'>+	struct in6_addr mcaddr;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!slave_can_set_ns_maddr(bond, slave))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; BOND_MAX_NS_TARGETS; i++) {</div><div class='add'>+		if (ipv6_addr_any(&amp;targets[i]))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		addrconf_addr_solict_mult(&amp;targets[i], &amp;mcaddr);</div><div class='add'>+		if (!ndisc_mc_map(&amp;mcaddr, slot_maddr, slave-&gt;dev, 0)) {</div><div class='add'>+			if (add)</div><div class='add'>+				dev_mc_add(slave-&gt;dev, slot_maddr);</div><div class='add'>+			else</div><div class='add'>+				dev_mc_del(slave-&gt;dev, slot_maddr);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void bond_slave_ns_maddrs_add(struct bonding *bond, struct slave *slave)</div><div class='add'>+{</div><div class='add'>+	if (!bond-&gt;params.arp_validate)</div><div class='add'>+		return;</div><div class='add'>+	slave_set_ns_maddrs(bond, slave, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void bond_slave_ns_maddrs_del(struct bonding *bond, struct slave *slave)</div><div class='add'>+{</div><div class='add'>+	if (!bond-&gt;params.arp_validate)</div><div class='add'>+		return;</div><div class='add'>+	slave_set_ns_maddrs(bond, slave, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * slave_set_ns_maddr - set new NS mac address for slave</div><div class='add'>+ * @bond: bond device</div><div class='add'>+ * @slave: slave device</div><div class='add'>+ * @target: the new IPv6 target</div><div class='add'>+ * @slot: the old IPv6 target in the slot</div><div class='add'>+ *</div><div class='add'>+ * This function tries to replace the old mac address to new one on the slave.</div><div class='add'>+ *</div><div class='add'>+ * Note, the target/slot IPv6 address is the unicast address in Neighbor</div><div class='add'>+ * Solicitation (NS) message. The dest address of NS message should be</div><div class='add'>+ * solicited-node multicast address of the target. The dest mac of NS message</div><div class='add'>+ * is converted from the solicited-node multicast address.</div><div class='add'>+ *</div><div class='add'>+ * This function is called when</div><div class='add'>+ *   * An IPv6 NS target is added or removed.</div><div class='add'>+ */</div><div class='add'>+static void slave_set_ns_maddr(struct bonding *bond, struct slave *slave,</div><div class='add'>+			       struct in6_addr *target, struct in6_addr *slot)</div><div class='add'>+{</div><div class='add'>+	char mac_addr[MAX_ADDR_LEN];</div><div class='add'>+	struct in6_addr mcast_addr;</div><div class='add'>+</div><div class='add'>+	if (!bond-&gt;params.arp_validate || !slave_can_set_ns_maddr(bond, slave))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* remove the previous mac addr from slave */</div><div class='add'>+	addrconf_addr_solict_mult(slot, &amp;mcast_addr);</div><div class='add'>+	if (!ipv6_addr_any(slot) &amp;&amp;</div><div class='add'>+	    !ndisc_mc_map(&amp;mcast_addr, mac_addr, slave-&gt;dev, 0))</div><div class='add'>+		dev_mc_del(slave-&gt;dev, mac_addr);</div><div class='add'>+</div><div class='add'>+	/* add new mac addr on slave if target is set */</div><div class='add'>+	addrconf_addr_solict_mult(target, &amp;mcast_addr);</div><div class='add'>+	if (!ipv6_addr_any(target) &amp;&amp;</div><div class='add'>+	    !ndisc_mc_map(&amp;mcast_addr, mac_addr, slave-&gt;dev, 0))</div><div class='add'>+		dev_mc_add(slave-&gt;dev, mac_addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void _bond_options_ns_ip6_target_set(struct bonding *bond, int slot,</div><div class='add'>+					    struct in6_addr *target,</div><div class='add'>+					    unsigned long last_rx)</div><div class='add'>+{</div><div class='add'>+	struct in6_addr *targets = bond-&gt;params.ns_targets;</div><div class='add'>+	struct list_head *iter;</div><div class='add'>+	struct slave *slave;</div><div class='add'>+</div><div class='add'>+	if (slot &gt;= 0 &amp;&amp; slot &lt; BOND_MAX_NS_TARGETS) {</div><div class='add'>+		bond_for_each_slave(bond, slave, iter) {</div><div class='add'>+			slave-&gt;target_last_arp_rx[slot] = last_rx;</div><div class='add'>+			slave_set_ns_maddr(bond, slave, target, &amp;targets[slot]);</div><div class='add'>+		}</div><div class='add'>+		targets[slot] = *target;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void bond_option_ns_ip6_targets_clear(struct bonding *bond)</div><div class='add'>+{</div><div class='add'>+	struct in6_addr addr_any = in6addr_any;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; BOND_MAX_NS_TARGETS; i++)</div><div class='add'>+		_bond_options_ns_ip6_target_set(bond, i, &amp;addr_any, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bond_option_ns_ip6_targets_set(struct bonding *bond,</div><div class='add'>+					  const struct bond_opt_value *newval)</div><div class='add'>+{</div><div class='add'>+	struct in6_addr *target = (struct in6_addr *)newval-&gt;extra;</div><div class='add'>+	struct in6_addr *targets = bond-&gt;params.ns_targets;</div><div class='add'>+	struct in6_addr addr_any = in6addr_any;</div><div class='add'>+	int index;</div><div class='add'>+</div><div class='add'>+	if (!bond_is_ip6_target_ok(target)) {</div><div class='add'>+		netdev_err(bond-&gt;dev, "invalid NS target %pI6c specified for addition\n",</div><div class='add'>+			   target);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (bond_get_targets_ip6(targets, target) != -1) { /* dup */</div><div class='add'>+		netdev_err(bond-&gt;dev, "NS target %pI6c is already present\n",</div><div class='add'>+			   target);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	index = bond_get_targets_ip6(targets, &amp;addr_any); /* first free slot */</div><div class='add'>+	if (index == -1) {</div><div class='add'>+		netdev_err(bond-&gt;dev, "NS target table is full!\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev_dbg(bond-&gt;dev, "Adding NS target %pI6c\n", target);</div><div class='add'>+</div><div class='add'>+	_bond_options_ns_ip6_target_set(bond, index, target, jiffies);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static int bond_option_ns_ip6_targets_set(struct bonding *bond,</div><div class='add'>+					  const struct bond_opt_value *newval)</div><div class='add'>+{</div><div class='add'>+	return -EPERM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void slave_set_ns_maddrs(struct bonding *bond, struct slave *slave, bool add) {}</div><div class='add'>+</div><div class='add'>+void bond_slave_ns_maddrs_add(struct bonding *bond, struct slave *slave) {}</div><div class='add'>+</div><div class='add'>+void bond_slave_ns_maddrs_del(struct bonding *bond, struct slave *slave) {}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static int bond_option_arp_validate_set(struct bonding *bond,</div><div class='ctx'> 					const struct bond_opt_value *newval)</div><div class='ctx'> {</div><div class='del'>-	netdev_info(bond-&gt;dev, "Setting arp_validate to %s (%llu)\n",</div><div class='del'>-		    newval-&gt;string, newval-&gt;value);</div><div class='add'>+	bool changed = !!bond-&gt;params.arp_validate != !!newval-&gt;value;</div><div class='add'>+	struct list_head *iter;</div><div class='add'>+	struct slave *slave;</div><div class='ctx'> </div><div class='del'>-	if (bond-&gt;dev-&gt;flags &amp; IFF_UP) {</div><div class='del'>-		if (!newval-&gt;value)</div><div class='del'>-			bond-&gt;recv_probe = NULL;</div><div class='del'>-		else if (bond-&gt;params.arp_interval)</div><div class='del'>-			bond-&gt;recv_probe = bond_arp_rcv;</div><div class='del'>-	}</div><div class='add'>+	netdev_dbg(bond-&gt;dev, "Setting arp_validate to %s (%llu)\n",</div><div class='add'>+		   newval-&gt;string, newval-&gt;value);</div><div class='ctx'> 	bond-&gt;params.arp_validate = newval-&gt;value;</div><div class='ctx'> </div><div class='add'>+	if (changed) {</div><div class='add'>+		bond_for_each_slave(bond, slave, iter)</div><div class='add'>+			slave_set_ns_maddrs(bond, slave, !!bond-&gt;params.arp_validate);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int bond_option_arp_all_targets_set(struct bonding *bond,</div><div class='ctx'> 					   const struct bond_opt_value *newval)</div><div class='ctx'> {</div><div class='del'>-	netdev_info(bond-&gt;dev, "Setting arp_all_targets to %s (%llu)\n",</div><div class='del'>-		    newval-&gt;string, newval-&gt;value);</div><div class='add'>+	netdev_dbg(bond-&gt;dev, "Setting arp_all_targets to %s (%llu)\n",</div><div class='add'>+		   newval-&gt;string, newval-&gt;value);</div><div class='ctx'> 	bond-&gt;params.arp_all_targets = newval-&gt;value;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int bond_option_missed_max_set(struct bonding *bond,</div><div class='add'>+				      const struct bond_opt_value *newval)</div><div class='add'>+{</div><div class='add'>+	netdev_dbg(bond-&gt;dev, "Setting missed max to %s (%llu)\n",</div><div class='add'>+		   newval-&gt;string, newval-&gt;value);</div><div class='add'>+	bond-&gt;params.missed_max = newval-&gt;value;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bond_option_prio_set(struct bonding *bond,</div><div class='add'>+				const struct bond_opt_value *newval)</div><div class='add'>+{</div><div class='add'>+	struct slave *slave;</div><div class='add'>+</div><div class='add'>+	slave = bond_slave_get_rtnl(newval-&gt;slave_dev);</div><div class='add'>+	if (!slave) {</div><div class='add'>+		netdev_dbg(newval-&gt;slave_dev, "%s called on NULL slave\n", __func__);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+	slave-&gt;prio = newval-&gt;value;</div><div class='add'>+</div><div class='add'>+	if (rtnl_dereference(bond-&gt;primary_slave))</div><div class='add'>+		slave_warn(bond-&gt;dev, slave-&gt;dev,</div><div class='add'>+			   "prio updated, but will not affect failover re-selection as primary slave have been set\n");</div><div class='add'>+	else</div><div class='add'>+		bond_select_active_slave(bond);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int bond_option_primary_set(struct bonding *bond,</div><div class='ctx'> 				   const struct bond_opt_value *newval)</div><div class='ctx'> {</div><div class='hunk'>@@ -1108,7 +1513,7 @@ static int bond_option_primary_set(struct bonding *bond,</div><div class='ctx'> 		*p = '\0';</div><div class='ctx'> 	/* check to see if we are clearing primary */</div><div class='ctx'> 	if (!strlen(primary)) {</div><div class='del'>-		netdev_info(bond-&gt;dev, "Setting primary slave to None\n");</div><div class='add'>+		netdev_dbg(bond-&gt;dev, "Setting primary slave to None\n");</div><div class='ctx'> 		RCU_INIT_POINTER(bond-&gt;primary_slave, NULL);</div><div class='ctx'> 		memset(bond-&gt;params.primary, 0, sizeof(bond-&gt;params.primary));</div><div class='ctx'> 		bond_select_active_slave(bond);</div><div class='hunk'>@@ -1117,25 +1522,24 @@ static int bond_option_primary_set(struct bonding *bond,</div><div class='ctx'> </div><div class='ctx'> 	bond_for_each_slave(bond, slave, iter) {</div><div class='ctx'> 		if (strncmp(slave-&gt;dev-&gt;name, primary, IFNAMSIZ) == 0) {</div><div class='del'>-			netdev_info(bond-&gt;dev, "Setting %s as primary slave\n",</div><div class='del'>-				    slave-&gt;dev-&gt;name);</div><div class='add'>+			slave_dbg(bond-&gt;dev, slave-&gt;dev, "Setting as primary slave\n");</div><div class='ctx'> 			rcu_assign_pointer(bond-&gt;primary_slave, slave);</div><div class='ctx'> 			strcpy(bond-&gt;params.primary, slave-&gt;dev-&gt;name);</div><div class='add'>+			bond-&gt;force_primary = true;</div><div class='ctx'> 			bond_select_active_slave(bond);</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (rtnl_dereference(bond-&gt;primary_slave)) {</div><div class='del'>-		netdev_info(bond-&gt;dev, "Setting primary slave to None\n");</div><div class='add'>+		netdev_dbg(bond-&gt;dev, "Setting primary slave to None\n");</div><div class='ctx'> 		RCU_INIT_POINTER(bond-&gt;primary_slave, NULL);</div><div class='ctx'> 		bond_select_active_slave(bond);</div><div class='ctx'> 	}</div><div class='del'>-	strncpy(bond-&gt;params.primary, primary, IFNAMSIZ);</div><div class='del'>-	bond-&gt;params.primary[IFNAMSIZ - 1] = 0;</div><div class='add'>+	strscpy_pad(bond-&gt;params.primary, primary, IFNAMSIZ);</div><div class='ctx'> </div><div class='del'>-	netdev_info(bond-&gt;dev, "Recording %s as primary, but it has not been enslaved to %s yet\n",</div><div class='del'>-		    primary, bond-&gt;dev-&gt;name);</div><div class='add'>+	netdev_dbg(bond-&gt;dev, "Recording %s as primary, but it has not been enslaved yet\n",</div><div class='add'>+		   primary);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	unblock_netpoll_tx();</div><div class='hunk'>@@ -1146,8 +1550,8 @@ out:</div><div class='ctx'> static int bond_option_primary_reselect_set(struct bonding *bond,</div><div class='ctx'> 					    const struct bond_opt_value *newval)</div><div class='ctx'> {</div><div class='del'>-	netdev_info(bond-&gt;dev, "Setting primary_reselect to %s (%llu)\n",</div><div class='del'>-		    newval-&gt;string, newval-&gt;value);</div><div class='add'>+	netdev_dbg(bond-&gt;dev, "Setting primary_reselect to %s (%llu)\n",</div><div class='add'>+		   newval-&gt;string, newval-&gt;value);</div><div class='ctx'> 	bond-&gt;params.primary_reselect = newval-&gt;value;</div><div class='ctx'> </div><div class='ctx'> 	block_netpoll_tx();</div><div class='hunk'>@@ -1160,8 +1564,8 @@ static int bond_option_primary_reselect_set(struct bonding *bond,</div><div class='ctx'> static int bond_option_fail_over_mac_set(struct bonding *bond,</div><div class='ctx'> 					 const struct bond_opt_value *newval)</div><div class='ctx'> {</div><div class='del'>-	netdev_info(bond-&gt;dev, "Setting fail_over_mac to %s (%llu)\n",</div><div class='del'>-		    newval-&gt;string, newval-&gt;value);</div><div class='add'>+	netdev_dbg(bond-&gt;dev, "Setting fail_over_mac to %s (%llu)\n",</div><div class='add'>+		   newval-&gt;string, newval-&gt;value);</div><div class='ctx'> 	bond-&gt;params.fail_over_mac = newval-&gt;value;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1170,8 +1574,8 @@ static int bond_option_fail_over_mac_set(struct bonding *bond,</div><div class='ctx'> static int bond_option_xmit_hash_policy_set(struct bonding *bond,</div><div class='ctx'> 					    const struct bond_opt_value *newval)</div><div class='ctx'> {</div><div class='del'>-	netdev_info(bond-&gt;dev, "Setting xmit hash policy to %s (%llu)\n",</div><div class='del'>-		    newval-&gt;string, newval-&gt;value);</div><div class='add'>+	netdev_dbg(bond-&gt;dev, "Setting xmit hash policy to %s (%llu)\n",</div><div class='add'>+		   newval-&gt;string, newval-&gt;value);</div><div class='ctx'> 	bond-&gt;params.xmit_policy = newval-&gt;value;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1180,8 +1584,8 @@ static int bond_option_xmit_hash_policy_set(struct bonding *bond,</div><div class='ctx'> static int bond_option_resend_igmp_set(struct bonding *bond,</div><div class='ctx'> 				       const struct bond_opt_value *newval)</div><div class='ctx'> {</div><div class='del'>-	netdev_info(bond-&gt;dev, "Setting resend_igmp to %llu\n",</div><div class='del'>-		    newval-&gt;value);</div><div class='add'>+	netdev_dbg(bond-&gt;dev, "Setting resend_igmp to %llu\n",</div><div class='add'>+		   newval-&gt;value);</div><div class='ctx'> 	bond-&gt;params.resend_igmp = newval-&gt;value;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1219,8 +1623,8 @@ static int bond_option_all_slaves_active_set(struct bonding *bond,</div><div class='ctx'> static int bond_option_min_links_set(struct bonding *bond,</div><div class='ctx'> 				     const struct bond_opt_value *newval)</div><div class='ctx'> {</div><div class='del'>-	netdev_info(bond-&gt;dev, "Setting min links value to %llu\n",</div><div class='del'>-		    newval-&gt;value);</div><div class='add'>+	netdev_dbg(bond-&gt;dev, "Setting min links value to %llu\n",</div><div class='add'>+		   newval-&gt;value);</div><div class='ctx'> 	bond-&gt;params.min_links = newval-&gt;value;</div><div class='ctx'> 	bond_set_carrier(bond);</div><div class='ctx'> </div><div class='hunk'>@@ -1238,6 +1642,8 @@ static int bond_option_lp_interval_set(struct bonding *bond,</div><div class='ctx'> static int bond_option_pps_set(struct bonding *bond,</div><div class='ctx'> 			       const struct bond_opt_value *newval)</div><div class='ctx'> {</div><div class='add'>+	netdev_dbg(bond-&gt;dev, "Setting packets per slave to %llu\n",</div><div class='add'>+		   newval-&gt;value);</div><div class='ctx'> 	bond-&gt;params.packets_per_slave = newval-&gt;value;</div><div class='ctx'> 	if (newval-&gt;value &gt; 0) {</div><div class='ctx'> 		bond-&gt;params.reciprocal_packets_per_slave =</div><div class='hunk'>@@ -1253,11 +1659,22 @@ static int bond_option_pps_set(struct bonding *bond,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int bond_option_lacp_active_set(struct bonding *bond,</div><div class='add'>+				       const struct bond_opt_value *newval)</div><div class='add'>+{</div><div class='add'>+	netdev_dbg(bond-&gt;dev, "Setting LACP active to %s (%llu)\n",</div><div class='add'>+		   newval-&gt;string, newval-&gt;value);</div><div class='add'>+	bond-&gt;params.lacp_active = newval-&gt;value;</div><div class='add'>+	bond_3ad_update_lacp_active(bond);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int bond_option_lacp_rate_set(struct bonding *bond,</div><div class='ctx'> 				     const struct bond_opt_value *newval)</div><div class='ctx'> {</div><div class='del'>-	netdev_info(bond-&gt;dev, "Setting LACP rate to %s (%llu)\n",</div><div class='del'>-		    newval-&gt;string, newval-&gt;value);</div><div class='add'>+	netdev_dbg(bond-&gt;dev, "Setting LACP rate to %s (%llu)\n",</div><div class='add'>+		   newval-&gt;string, newval-&gt;value);</div><div class='ctx'> 	bond-&gt;params.lacp_fast = newval-&gt;value;</div><div class='ctx'> 	bond_3ad_update_lacp_rate(bond);</div><div class='ctx'> </div><div class='hunk'>@@ -1267,8 +1684,8 @@ static int bond_option_lacp_rate_set(struct bonding *bond,</div><div class='ctx'> static int bond_option_ad_select_set(struct bonding *bond,</div><div class='ctx'> 				     const struct bond_opt_value *newval)</div><div class='ctx'> {</div><div class='del'>-	netdev_info(bond-&gt;dev, "Setting ad_select to %s (%llu)\n",</div><div class='del'>-		    newval-&gt;string, newval-&gt;value);</div><div class='add'>+	netdev_dbg(bond-&gt;dev, "Setting ad_select to %s (%llu)\n",</div><div class='add'>+		   newval-&gt;string, newval-&gt;value);</div><div class='ctx'> 	bond-&gt;params.ad_select = newval-&gt;value;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1323,13 +1740,13 @@ static int bond_option_queue_id_set(struct bonding *bond,</div><div class='ctx'> 		goto err_no_cmd;</div><div class='ctx'> </div><div class='ctx'> 	/* Actually set the qids for the slave */</div><div class='del'>-	update_slave-&gt;queue_id = qid;</div><div class='add'>+	WRITE_ONCE(update_slave-&gt;queue_id, qid);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> </div><div class='ctx'> err_no_cmd:</div><div class='del'>-	netdev_info(bond-&gt;dev, "invalid input for queue_id set\n");</div><div class='add'>+	netdev_dbg(bond-&gt;dev, "invalid input for queue_id set\n");</div><div class='ctx'> 	ret = -EPERM;</div><div class='ctx'> 	goto out;</div><div class='ctx'> </div><div class='hunk'>@@ -1346,29 +1763,31 @@ static int bond_option_slaves_set(struct bonding *bond,</div><div class='ctx'> 	sscanf(newval-&gt;string, "%16s", command); /* IFNAMSIZ*/</div><div class='ctx'> 	ifname = command + 1;</div><div class='ctx'> 	if ((strlen(command) &lt;= 1) ||</div><div class='add'>+	    (command[0] != '+' &amp;&amp; command[0] != '-') ||</div><div class='ctx'> 	    !dev_valid_name(ifname))</div><div class='ctx'> 		goto err_no_cmd;</div><div class='ctx'> </div><div class='ctx'> 	dev = __dev_get_by_name(dev_net(bond-&gt;dev), ifname);</div><div class='ctx'> 	if (!dev) {</div><div class='del'>-		netdev_info(bond-&gt;dev, "interface %s does not exist!\n",</div><div class='del'>-			    ifname);</div><div class='add'>+		netdev_dbg(bond-&gt;dev, "interface %s does not exist!\n",</div><div class='add'>+			   ifname);</div><div class='ctx'> 		ret = -ENODEV;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	switch (command[0]) {</div><div class='ctx'> 	case '+':</div><div class='del'>-		netdev_info(bond-&gt;dev, "Adding slave %s\n", dev-&gt;name);</div><div class='del'>-		ret = bond_enslave(bond-&gt;dev, dev);</div><div class='add'>+		slave_dbg(bond-&gt;dev, dev, "Enslaving interface\n");</div><div class='add'>+		ret = bond_enslave(bond-&gt;dev, dev, NULL);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case '-':</div><div class='del'>-		netdev_info(bond-&gt;dev, "Removing slave %s\n", dev-&gt;name);</div><div class='add'>+		slave_dbg(bond-&gt;dev, dev, "Releasing interface\n");</div><div class='ctx'> 		ret = bond_release(bond-&gt;dev, dev);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='add'>+		/* should not run here. */</div><div class='ctx'> 		goto err_no_cmd;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1384,8 +1803,8 @@ err_no_cmd:</div><div class='ctx'> static int bond_option_tlb_dynamic_lb_set(struct bonding *bond,</div><div class='ctx'> 					  const struct bond_opt_value *newval)</div><div class='ctx'> {</div><div class='del'>-	netdev_info(bond-&gt;dev, "Setting dynamic-lb to %s (%llu)\n",</div><div class='del'>-		    newval-&gt;string, newval-&gt;value);</div><div class='add'>+	netdev_dbg(bond-&gt;dev, "Setting dynamic-lb to %s (%llu)\n",</div><div class='add'>+		   newval-&gt;string, newval-&gt;value);</div><div class='ctx'> 	bond-&gt;params.tlb_dynamic_lb = newval-&gt;value;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1394,10 +1813,32 @@ static int bond_option_tlb_dynamic_lb_set(struct bonding *bond,</div><div class='ctx'> static int bond_option_ad_actor_sys_prio_set(struct bonding *bond,</div><div class='ctx'> 					     const struct bond_opt_value *newval)</div><div class='ctx'> {</div><div class='del'>-	netdev_info(bond-&gt;dev, "Setting ad_actor_sys_prio to %llu\n",</div><div class='del'>-		    newval-&gt;value);</div><div class='add'>+	netdev_dbg(bond-&gt;dev, "Setting ad_actor_sys_prio to %llu\n",</div><div class='add'>+		   newval-&gt;value);</div><div class='ctx'> </div><div class='ctx'> 	bond-&gt;params.ad_actor_sys_prio = newval-&gt;value;</div><div class='add'>+	bond_3ad_update_ad_actor_settings(bond);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bond_option_actor_port_prio_set(struct bonding *bond,</div><div class='add'>+					   const struct bond_opt_value *newval)</div><div class='add'>+{</div><div class='add'>+	struct slave *slave;</div><div class='add'>+</div><div class='add'>+	slave = bond_slave_get_rtnl(newval-&gt;slave_dev);</div><div class='add'>+	if (!slave) {</div><div class='add'>+		netdev_dbg(bond-&gt;dev, "%s called on NULL slave\n", __func__);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev_dbg(newval-&gt;slave_dev, "Setting actor_port_prio to %llu\n",</div><div class='add'>+		   newval-&gt;value);</div><div class='add'>+</div><div class='add'>+	SLAVE_AD_INFO(slave)-&gt;port_priority = newval-&gt;value;</div><div class='add'>+	bond_3ad_update_ad_actor_settings(bond);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1406,37 +1847,64 @@ static int bond_option_ad_actor_system_set(struct bonding *bond,</div><div class='ctx'> {</div><div class='ctx'> 	u8 macaddr[ETH_ALEN];</div><div class='ctx'> 	u8 *mac;</div><div class='del'>-	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (newval-&gt;string) {</div><div class='del'>-		i = sscanf(newval-&gt;string, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx",</div><div class='del'>-			   &amp;macaddr[0], &amp;macaddr[1], &amp;macaddr[2],</div><div class='del'>-			   &amp;macaddr[3], &amp;macaddr[4], &amp;macaddr[5]);</div><div class='del'>-		if (i != ETH_ALEN)</div><div class='add'>+		if (!mac_pton(newval-&gt;string, macaddr))</div><div class='ctx'> 			goto err;</div><div class='ctx'> 		mac = macaddr;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		mac = (u8 *)&amp;newval-&gt;value;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!is_valid_ether_addr(mac))</div><div class='add'>+	if (is_multicast_ether_addr(mac))</div><div class='ctx'> 		goto err;</div><div class='ctx'> </div><div class='del'>-	netdev_info(bond-&gt;dev, "Setting ad_actor_system to %pM\n", mac);</div><div class='add'>+	netdev_dbg(bond-&gt;dev, "Setting ad_actor_system to %pM\n", mac);</div><div class='ctx'> 	ether_addr_copy(bond-&gt;params.ad_actor_system, mac);</div><div class='add'>+	bond_3ad_update_ad_actor_settings(bond);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err:</div><div class='del'>-	netdev_err(bond-&gt;dev, "Invalid MAC address.\n");</div><div class='add'>+	netdev_err(bond-&gt;dev, "Invalid ad_actor_system MAC address.\n");</div><div class='ctx'> 	return -EINVAL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int bond_option_ad_user_port_key_set(struct bonding *bond,</div><div class='ctx'> 					    const struct bond_opt_value *newval)</div><div class='ctx'> {</div><div class='del'>-	netdev_info(bond-&gt;dev, "Setting ad_user_port_key to %llu\n",</div><div class='del'>-		    newval-&gt;value);</div><div class='add'>+	netdev_dbg(bond-&gt;dev, "Setting ad_user_port_key to %llu\n",</div><div class='add'>+		   newval-&gt;value);</div><div class='ctx'> </div><div class='ctx'> 	bond-&gt;params.ad_user_port_key = newval-&gt;value;</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+static int bond_option_coupled_control_set(struct bonding *bond,</div><div class='add'>+					   const struct bond_opt_value *newval)</div><div class='add'>+{</div><div class='add'>+	netdev_info(bond-&gt;dev, "Setting coupled_control to %s (%llu)\n",</div><div class='add'>+		    newval-&gt;string, newval-&gt;value);</div><div class='add'>+</div><div class='add'>+	bond-&gt;params.coupled_control = newval-&gt;value;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bond_option_broadcast_neigh_set(struct bonding *bond,</div><div class='add'>+					   const struct bond_opt_value *newval)</div><div class='add'>+{</div><div class='add'>+	if (bond-&gt;params.broadcast_neighbor == newval-&gt;value)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	bond-&gt;params.broadcast_neighbor = newval-&gt;value;</div><div class='add'>+	if (bond-&gt;dev-&gt;flags &amp; IFF_UP) {</div><div class='add'>+		if (bond-&gt;params.broadcast_neighbor)</div><div class='add'>+			static_branch_inc(&amp;bond_bcast_neigh_enabled);</div><div class='add'>+		else</div><div class='add'>+			static_branch_dec(&amp;bond_bcast_neigh_enabled);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev_dbg(bond-&gt;dev, "Setting broadcast_neighbor to %s (%llu)\n",</div><div class='add'>+		   newval-&gt;string, newval-&gt;value);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/bonding/bond_procfs.c b/drivers/net/bonding/bond_procfs.c<br/>index f514fe5e80a5..7edf72ec816a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/bonding/bond_procfs.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/bonding/bond_procfs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/bonding/bond_procfs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/bonding/bond_procfs.c</a></div><div class='hunk'>@@ -1,4 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> #include &lt;linux/proc_fs.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='ctx'> #include &lt;linux/export.h&gt;</div><div class='ctx'> #include &lt;net/net_namespace.h&gt;</div><div class='ctx'> #include &lt;net/netns/generic.h&gt;</div><div class='hunk'>@@ -9,7 +11,7 @@</div><div class='ctx'> static void *bond_info_seq_start(struct seq_file *seq, loff_t *pos)</div><div class='ctx'> 	__acquires(RCU)</div><div class='ctx'> {</div><div class='del'>-	struct bonding *bond = seq-&gt;private;</div><div class='add'>+	struct bonding *bond = pde_data(file_inode(seq-&gt;file));</div><div class='ctx'> 	struct list_head *iter;</div><div class='ctx'> 	struct slave *slave;</div><div class='ctx'> 	loff_t off = 0;</div><div class='hunk'>@@ -28,7 +30,7 @@ static void *bond_info_seq_start(struct seq_file *seq, loff_t *pos)</div><div class='ctx'> </div><div class='ctx'> static void *bond_info_seq_next(struct seq_file *seq, void *v, loff_t *pos)</div><div class='ctx'> {</div><div class='del'>-	struct bonding *bond = seq-&gt;private;</div><div class='add'>+	struct bonding *bond = pde_data(file_inode(seq-&gt;file));</div><div class='ctx'> 	struct list_head *iter;</div><div class='ctx'> 	struct slave *slave;</div><div class='ctx'> 	bool found = false;</div><div class='hunk'>@@ -55,7 +57,7 @@ static void bond_info_seq_stop(struct seq_file *seq, void *v)</div><div class='ctx'> </div><div class='ctx'> static void bond_info_show_master(struct seq_file *seq)</div><div class='ctx'> {</div><div class='del'>-	struct bonding *bond = seq-&gt;private;</div><div class='add'>+	struct bonding *bond = pde_data(file_inode(seq-&gt;file));</div><div class='ctx'> 	const struct bond_opt_value *optval;</div><div class='ctx'> 	struct slave *curr, *primary;</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -103,13 +105,18 @@ static void bond_info_show_master(struct seq_file *seq)</div><div class='ctx'> 		   bond-&gt;params.updelay * bond-&gt;params.miimon);</div><div class='ctx'> 	seq_printf(seq, "Down Delay (ms): %d\n",</div><div class='ctx'> 		   bond-&gt;params.downdelay * bond-&gt;params.miimon);</div><div class='add'>+	seq_printf(seq, "Peer Notification Delay (ms): %d\n",</div><div class='add'>+		   bond-&gt;params.peer_notif_delay * bond-&gt;params.miimon);</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 	/* ARP information */</div><div class='ctx'> 	if (bond-&gt;params.arp_interval &gt; 0) {</div><div class='ctx'> 		int printed = 0;</div><div class='add'>+</div><div class='ctx'> 		seq_printf(seq, "ARP Polling Interval (ms): %d\n",</div><div class='ctx'> 				bond-&gt;params.arp_interval);</div><div class='add'>+		seq_printf(seq, "ARP Missed Max: %u\n",</div><div class='add'>+				bond-&gt;params.missed_max);</div><div class='ctx'> </div><div class='ctx'> 		seq_printf(seq, "ARP IP target/s (n.n.n.n form):");</div><div class='ctx'> </div><div class='hunk'>@@ -122,12 +129,29 @@ static void bond_info_show_master(struct seq_file *seq)</div><div class='ctx'> 			printed = 1;</div><div class='ctx'> 		}</div><div class='ctx'> 		seq_printf(seq, "\n");</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_IPV6)</div><div class='add'>+		printed = 0;</div><div class='add'>+		seq_printf(seq, "NS IPv6 target/s (xx::xx form):");</div><div class='add'>+</div><div class='add'>+		for (i = 0; (i &lt; BOND_MAX_NS_TARGETS); i++) {</div><div class='add'>+			if (ipv6_addr_any(&amp;bond-&gt;params.ns_targets[i]))</div><div class='add'>+				break;</div><div class='add'>+			if (printed)</div><div class='add'>+				seq_printf(seq, ",");</div><div class='add'>+			seq_printf(seq, " %pI6c", &amp;bond-&gt;params.ns_targets[i]);</div><div class='add'>+			printed = 1;</div><div class='add'>+		}</div><div class='add'>+		seq_printf(seq, "\n");</div><div class='add'>+#endif</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (BOND_MODE(bond) == BOND_MODE_8023AD) {</div><div class='ctx'> 		struct ad_info ad_info;</div><div class='ctx'> </div><div class='ctx'> 		seq_puts(seq, "\n802.3ad info\n");</div><div class='add'>+		seq_printf(seq, "LACP active: %s\n",</div><div class='add'>+			   (bond-&gt;params.lacp_active) ? "on" : "off");</div><div class='ctx'> 		seq_printf(seq, "LACP rate: %s\n",</div><div class='ctx'> 			   (bond-&gt;params.lacp_fast) ? "fast" : "slow");</div><div class='ctx'> 		seq_printf(seq, "Min links: %d\n", bond-&gt;params.min_links);</div><div class='hunk'>@@ -166,7 +190,7 @@ static void bond_info_show_master(struct seq_file *seq)</div><div class='ctx'> static void bond_info_show_slave(struct seq_file *seq,</div><div class='ctx'> 				 const struct slave *slave)</div><div class='ctx'> {</div><div class='del'>-	struct bonding *bond = seq-&gt;private;</div><div class='add'>+	struct bonding *bond = pde_data(file_inode(seq-&gt;file));</div><div class='ctx'> </div><div class='ctx'> 	seq_printf(seq, "\nSlave Interface: %s\n", slave-&gt;dev-&gt;name);</div><div class='ctx'> 	seq_printf(seq, "MII Status: %s\n", bond_slave_link_status(slave-&gt;link));</div><div class='hunk'>@@ -183,8 +207,9 @@ static void bond_info_show_slave(struct seq_file *seq,</div><div class='ctx'> 	seq_printf(seq, "Link Failure Count: %u\n",</div><div class='ctx'> 		   slave-&gt;link_failure_count);</div><div class='ctx'> </div><div class='del'>-	seq_printf(seq, "Permanent HW addr: %pM\n", slave-&gt;perm_hwaddr);</div><div class='del'>-	seq_printf(seq, "Slave queue ID: %d\n", slave-&gt;queue_id);</div><div class='add'>+	seq_printf(seq, "Permanent HW addr: %*phC\n",</div><div class='add'>+		   slave-&gt;dev-&gt;addr_len, slave-&gt;perm_hwaddr);</div><div class='add'>+	seq_printf(seq, "Slave queue ID: %d\n", READ_ONCE(slave-&gt;queue_id));</div><div class='ctx'> </div><div class='ctx'> 	if (BOND_MODE(bond) == BOND_MODE_8023AD) {</div><div class='ctx'> 		const struct port *port = &amp;SLAVE_AD_INFO(slave)-&gt;port;</div><div class='hunk'>@@ -255,38 +280,14 @@ static const struct seq_operations bond_info_seq_ops = {</div><div class='ctx'> 	.show  = bond_info_seq_show,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int bond_info_open(struct inode *inode, struct file *file)</div><div class='del'>-{</div><div class='del'>-	struct seq_file *seq;</div><div class='del'>-	int res;</div><div class='del'>-</div><div class='del'>-	res = seq_open(file, &amp;bond_info_seq_ops);</div><div class='del'>-	if (!res) {</div><div class='del'>-		/* recover the pointer buried in proc_dir_entry data */</div><div class='del'>-		seq = file-&gt;private_data;</div><div class='del'>-		seq-&gt;private = PDE_DATA(inode);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return res;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct file_operations bond_info_fops = {</div><div class='del'>-	.owner   = THIS_MODULE,</div><div class='del'>-	.open    = bond_info_open,</div><div class='del'>-	.read    = seq_read,</div><div class='del'>-	.llseek  = seq_lseek,</div><div class='del'>-	.release = seq_release,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> void bond_create_proc_entry(struct bonding *bond)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *bond_dev = bond-&gt;dev;</div><div class='ctx'> 	struct bond_net *bn = net_generic(dev_net(bond_dev), bond_net_id);</div><div class='ctx'> </div><div class='ctx'> 	if (bn-&gt;proc_dir) {</div><div class='del'>-		bond-&gt;proc_entry = proc_create_data(bond_dev-&gt;name,</div><div class='del'>-						    S_IRUGO, bn-&gt;proc_dir,</div><div class='del'>-						    &amp;bond_info_fops, bond);</div><div class='add'>+		bond-&gt;proc_entry = proc_create_seq_data(bond_dev-&gt;name, 0444,</div><div class='add'>+				bn-&gt;proc_dir, &amp;bond_info_seq_ops, bond);</div><div class='ctx'> 		if (bond-&gt;proc_entry == NULL)</div><div class='ctx'> 			netdev_warn(bond_dev, "Cannot create /proc/net/%s/%s\n",</div><div class='ctx'> 				    DRV_NAME, bond_dev-&gt;name);</div><div class='hunk'>@@ -321,7 +322,6 @@ void __net_init bond_create_proc_dir(struct bond_net *bn)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Destroy the bonding directory under /proc/net, if empty.</div><div class='del'>- * Caller must hold rtnl_lock.</div><div class='ctx'>  */</div><div class='ctx'> void __net_exit bond_destroy_proc_dir(struct bond_net *bn)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/net/bonding/bond_sysfs.c b/drivers/net/bonding/bond_sysfs.c<br/>index 31835a4dab57..9a75ad3181ab 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/bonding/bond_sysfs.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/bonding/bond_sysfs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/bonding/bond_sysfs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/bonding/bond_sysfs.c</a></div><div class='hunk'>@@ -1,22 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright(c) 2004-2005 Intel Corporation. All rights reserved.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms of the GNU General Public License as published by the</div><div class='del'>- * Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY</div><div class='del'>- * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License</div><div class='del'>- * for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License along</div><div class='del'>- * with this program; if not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='del'>- *</div><div class='del'>- * The full GNU General Public License is included in this distribution in the</div><div class='del'>- * file called LICENSE.</div><div class='del'>- *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='hunk'>@@ -24,7 +8,7 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='add'>+#include &lt;linux/sched/signal.h&gt;</div><div class='ctx'> #include &lt;linux/fs.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='hunk'>@@ -42,41 +26,40 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;net/bonding.h&gt;</div><div class='ctx'> </div><div class='del'>-#define to_dev(obj)	container_of(obj, struct device, kobj)</div><div class='ctx'> #define to_bond(cd)	((struct bonding *)(netdev_priv(to_net_dev(cd))))</div><div class='ctx'> </div><div class='ctx'> /* "show" function for the bond_masters attribute.</div><div class='ctx'>  * The class parameter is ignored.</div><div class='ctx'>  */</div><div class='del'>-static ssize_t bonding_show_bonds(struct class *cls,</div><div class='del'>-				  struct class_attribute *attr,</div><div class='add'>+static ssize_t bonding_show_bonds(const struct class *cls,</div><div class='add'>+				  const struct class_attribute *attr,</div><div class='ctx'> 				  char *buf)</div><div class='ctx'> {</div><div class='del'>-	struct bond_net *bn =</div><div class='del'>-		container_of(attr, struct bond_net, class_attr_bonding_masters);</div><div class='del'>-	int res = 0;</div><div class='add'>+	const struct bond_net *bn =</div><div class='add'>+		container_of_const(attr, struct bond_net, class_attr_bonding_masters);</div><div class='ctx'> 	struct bonding *bond;</div><div class='add'>+	int res = 0;</div><div class='ctx'> </div><div class='del'>-	rtnl_lock();</div><div class='add'>+	rcu_read_lock();</div><div class='ctx'> </div><div class='del'>-	list_for_each_entry(bond, &amp;bn-&gt;dev_list, bond_list) {</div><div class='add'>+	list_for_each_entry_rcu(bond, &amp;bn-&gt;dev_list, bond_list) {</div><div class='ctx'> 		if (res &gt; (PAGE_SIZE - IFNAMSIZ)) {</div><div class='ctx'> 			/* not enough space for another interface name */</div><div class='ctx'> 			if ((PAGE_SIZE - res) &gt; 10)</div><div class='ctx'> 				res = PAGE_SIZE - 10;</div><div class='del'>-			res += sprintf(buf + res, "++more++ ");</div><div class='add'>+			res += sysfs_emit_at(buf, res, "++more++ ");</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='del'>-		res += sprintf(buf + res, "%s ", bond-&gt;dev-&gt;name);</div><div class='add'>+		res += sysfs_emit_at(buf, res, "%s ", bond-&gt;dev-&gt;name);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (res)</div><div class='ctx'> 		buf[res-1] = '\n'; /* eat the leftover space */</div><div class='ctx'> </div><div class='del'>-	rtnl_unlock();</div><div class='add'>+	rcu_read_unlock();</div><div class='ctx'> 	return res;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct net_device *bond_get_by_name(struct bond_net *bn, const char *ifname)</div><div class='add'>+static struct net_device *bond_get_by_name(const struct bond_net *bn, const char *ifname)</div><div class='ctx'> {</div><div class='ctx'> 	struct bonding *bond;</div><div class='ctx'> </div><div class='hunk'>@@ -92,12 +75,12 @@ static struct net_device *bond_get_by_name(struct bond_net *bn, const char *ifna</div><div class='ctx'>  *</div><div class='ctx'>  * The class parameter is ignored.</div><div class='ctx'>  */</div><div class='del'>-static ssize_t bonding_store_bonds(struct class *cls,</div><div class='del'>-				   struct class_attribute *attr,</div><div class='add'>+static ssize_t bonding_store_bonds(const struct class *cls,</div><div class='add'>+				   const struct class_attribute *attr,</div><div class='ctx'> 				   const char *buffer, size_t count)</div><div class='ctx'> {</div><div class='del'>-	struct bond_net *bn =</div><div class='del'>-		container_of(attr, struct bond_net, class_attr_bonding_masters);</div><div class='add'>+	const struct bond_net *bn =</div><div class='add'>+		container_of_const(attr, struct bond_net, class_attr_bonding_masters);</div><div class='ctx'> 	char command[IFNAMSIZ + 1] = {0, };</div><div class='ctx'> 	char *ifname;</div><div class='ctx'> 	int rv, res = count;</div><div class='hunk'>@@ -148,7 +131,7 @@ err_no_cmd:</div><div class='ctx'> static const struct class_attribute class_attr_bonding_masters = {</div><div class='ctx'> 	.attr = {</div><div class='ctx'> 		.name = "bonding_masters",</div><div class='del'>-		.mode = S_IWUSR | S_IRUGO,</div><div class='add'>+		.mode = 0644,</div><div class='ctx'> 	},</div><div class='ctx'> 	.show = bonding_show_bonds,</div><div class='ctx'> 	.store = bonding_store_bonds,</div><div class='hunk'>@@ -161,14 +144,19 @@ static ssize_t bonding_sysfs_store_option(struct device *d,</div><div class='ctx'> {</div><div class='ctx'> 	struct bonding *bond = to_bond(d);</div><div class='ctx'> 	const struct bond_option *opt;</div><div class='add'>+	char *buffer_clone;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	opt = bond_opt_get_by_name(attr-&gt;attr.name);</div><div class='ctx'> 	if (WARN_ON(!opt))</div><div class='ctx'> 		return -ENOENT;</div><div class='del'>-	ret = bond_opt_tryset_rtnl(bond, opt-&gt;id, (char *)buffer);</div><div class='add'>+	buffer_clone = kstrndup(buffer, count, GFP_KERNEL);</div><div class='add'>+	if (!buffer_clone)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	ret = bond_opt_tryset_rtnl(bond, opt-&gt;id, buffer_clone);</div><div class='ctx'> 	if (!ret)</div><div class='ctx'> 		ret = count;</div><div class='add'>+	kfree(buffer_clone);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -182,28 +170,27 @@ static ssize_t bonding_show_slaves(struct device *d,</div><div class='ctx'> 	struct slave *slave;</div><div class='ctx'> 	int res = 0;</div><div class='ctx'> </div><div class='del'>-	if (!rtnl_trylock())</div><div class='del'>-		return restart_syscall();</div><div class='add'>+	rcu_read_lock();</div><div class='ctx'> </div><div class='del'>-	bond_for_each_slave(bond, slave, iter) {</div><div class='add'>+	bond_for_each_slave_rcu(bond, slave, iter) {</div><div class='ctx'> 		if (res &gt; (PAGE_SIZE - IFNAMSIZ)) {</div><div class='ctx'> 			/* not enough space for another interface name */</div><div class='ctx'> 			if ((PAGE_SIZE - res) &gt; 10)</div><div class='ctx'> 				res = PAGE_SIZE - 10;</div><div class='del'>-			res += sprintf(buf + res, "++more++ ");</div><div class='add'>+			res += sysfs_emit_at(buf, res, "++more++ ");</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='del'>-		res += sprintf(buf + res, "%s ", slave-&gt;dev-&gt;name);</div><div class='add'>+		res += sysfs_emit_at(buf, res, "%s ", slave-&gt;dev-&gt;name);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	rtnl_unlock();</div><div class='add'>+	rcu_read_unlock();</div><div class='ctx'> </div><div class='ctx'> 	if (res)</div><div class='ctx'> 		buf[res-1] = '\n'; /* eat the leftover space */</div><div class='ctx'> </div><div class='ctx'> 	return res;</div><div class='ctx'> }</div><div class='del'>-static DEVICE_ATTR(slaves, S_IRUGO | S_IWUSR, bonding_show_slaves,</div><div class='add'>+static DEVICE_ATTR(slaves, 0644, bonding_show_slaves,</div><div class='ctx'> 		   bonding_sysfs_store_option);</div><div class='ctx'> </div><div class='ctx'> /* Show the bonding mode. */</div><div class='hunk'>@@ -215,10 +202,9 @@ static ssize_t bonding_show_mode(struct device *d,</div><div class='ctx'> </div><div class='ctx'> 	val = bond_opt_get_val(BOND_OPT_MODE, BOND_MODE(bond));</div><div class='ctx'> </div><div class='del'>-	return sprintf(buf, "%s %d\n", val-&gt;string, BOND_MODE(bond));</div><div class='add'>+	return sysfs_emit(buf, "%s %d\n", val-&gt;string, BOND_MODE(bond));</div><div class='ctx'> }</div><div class='del'>-static DEVICE_ATTR(mode, S_IRUGO | S_IWUSR,</div><div class='del'>-		   bonding_show_mode, bonding_sysfs_store_option);</div><div class='add'>+static DEVICE_ATTR(mode, 0644, bonding_show_mode, bonding_sysfs_store_option);</div><div class='ctx'> </div><div class='ctx'> /* Show the bonding transmit hash method. */</div><div class='ctx'> static ssize_t bonding_show_xmit_hash(struct device *d,</div><div class='hunk'>@@ -230,9 +216,9 @@ static ssize_t bonding_show_xmit_hash(struct device *d,</div><div class='ctx'> </div><div class='ctx'> 	val = bond_opt_get_val(BOND_OPT_XMIT_HASH, bond-&gt;params.xmit_policy);</div><div class='ctx'> </div><div class='del'>-	return sprintf(buf, "%s %d\n", val-&gt;string, bond-&gt;params.xmit_policy);</div><div class='add'>+	return sysfs_emit(buf, "%s %d\n", val-&gt;string, bond-&gt;params.xmit_policy);</div><div class='ctx'> }</div><div class='del'>-static DEVICE_ATTR(xmit_hash_policy, S_IRUGO | S_IWUSR,</div><div class='add'>+static DEVICE_ATTR(xmit_hash_policy, 0644,</div><div class='ctx'> 		   bonding_show_xmit_hash, bonding_sysfs_store_option);</div><div class='ctx'> </div><div class='ctx'> /* Show arp_validate. */</div><div class='hunk'>@@ -246,9 +232,9 @@ static ssize_t bonding_show_arp_validate(struct device *d,</div><div class='ctx'> 	val = bond_opt_get_val(BOND_OPT_ARP_VALIDATE,</div><div class='ctx'> 			       bond-&gt;params.arp_validate);</div><div class='ctx'> </div><div class='del'>-	return sprintf(buf, "%s %d\n", val-&gt;string, bond-&gt;params.arp_validate);</div><div class='add'>+	return sysfs_emit(buf, "%s %d\n", val-&gt;string, bond-&gt;params.arp_validate);</div><div class='ctx'> }</div><div class='del'>-static DEVICE_ATTR(arp_validate, S_IRUGO | S_IWUSR, bonding_show_arp_validate,</div><div class='add'>+static DEVICE_ATTR(arp_validate, 0644, bonding_show_arp_validate,</div><div class='ctx'> 		   bonding_sysfs_store_option);</div><div class='ctx'> </div><div class='ctx'> /* Show arp_all_targets. */</div><div class='hunk'>@@ -261,10 +247,10 @@ static ssize_t bonding_show_arp_all_targets(struct device *d,</div><div class='ctx'> </div><div class='ctx'> 	val = bond_opt_get_val(BOND_OPT_ARP_ALL_TARGETS,</div><div class='ctx'> 			       bond-&gt;params.arp_all_targets);</div><div class='del'>-	return sprintf(buf, "%s %d\n",</div><div class='add'>+	return sysfs_emit(buf, "%s %d\n",</div><div class='ctx'> 		       val-&gt;string, bond-&gt;params.arp_all_targets);</div><div class='ctx'> }</div><div class='del'>-static DEVICE_ATTR(arp_all_targets, S_IRUGO | S_IWUSR,</div><div class='add'>+static DEVICE_ATTR(arp_all_targets, 0644,</div><div class='ctx'> 		   bonding_show_arp_all_targets, bonding_sysfs_store_option);</div><div class='ctx'> </div><div class='ctx'> /* Show fail_over_mac. */</div><div class='hunk'>@@ -278,9 +264,9 @@ static ssize_t bonding_show_fail_over_mac(struct device *d,</div><div class='ctx'> 	val = bond_opt_get_val(BOND_OPT_FAIL_OVER_MAC,</div><div class='ctx'> 			       bond-&gt;params.fail_over_mac);</div><div class='ctx'> </div><div class='del'>-	return sprintf(buf, "%s %d\n", val-&gt;string, bond-&gt;params.fail_over_mac);</div><div class='add'>+	return sysfs_emit(buf, "%s %d\n", val-&gt;string, bond-&gt;params.fail_over_mac);</div><div class='ctx'> }</div><div class='del'>-static DEVICE_ATTR(fail_over_mac, S_IRUGO | S_IWUSR,</div><div class='add'>+static DEVICE_ATTR(fail_over_mac, 0644,</div><div class='ctx'> 		   bonding_show_fail_over_mac, bonding_sysfs_store_option);</div><div class='ctx'> </div><div class='ctx'> /* Show the arp timer interval. */</div><div class='hunk'>@@ -290,9 +276,9 @@ static ssize_t bonding_show_arp_interval(struct device *d,</div><div class='ctx'> {</div><div class='ctx'> 	struct bonding *bond = to_bond(d);</div><div class='ctx'> </div><div class='del'>-	return sprintf(buf, "%d\n", bond-&gt;params.arp_interval);</div><div class='add'>+	return sysfs_emit(buf, "%d\n", bond-&gt;params.arp_interval);</div><div class='ctx'> }</div><div class='del'>-static DEVICE_ATTR(arp_interval, S_IRUGO | S_IWUSR,</div><div class='add'>+static DEVICE_ATTR(arp_interval, 0644,</div><div class='ctx'> 		   bonding_show_arp_interval, bonding_sysfs_store_option);</div><div class='ctx'> </div><div class='ctx'> /* Show the arp targets. */</div><div class='hunk'>@@ -305,17 +291,29 @@ static ssize_t bonding_show_arp_targets(struct device *d,</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; BOND_MAX_ARP_TARGETS; i++) {</div><div class='ctx'> 		if (bond-&gt;params.arp_targets[i])</div><div class='del'>-			res += sprintf(buf + res, "%pI4 ",</div><div class='del'>-				       &amp;bond-&gt;params.arp_targets[i]);</div><div class='add'>+			res += sysfs_emit_at(buf, res, "%pI4 ",</div><div class='add'>+					     &amp;bond-&gt;params.arp_targets[i]);</div><div class='ctx'> 	}</div><div class='ctx'> 	if (res)</div><div class='ctx'> 		buf[res-1] = '\n'; /* eat the leftover space */</div><div class='ctx'> </div><div class='ctx'> 	return res;</div><div class='ctx'> }</div><div class='del'>-static DEVICE_ATTR(arp_ip_target, S_IRUGO | S_IWUSR,</div><div class='add'>+static DEVICE_ATTR(arp_ip_target, 0644,</div><div class='ctx'> 		   bonding_show_arp_targets, bonding_sysfs_store_option);</div><div class='ctx'> </div><div class='add'>+/* Show the arp missed max. */</div><div class='add'>+static ssize_t bonding_show_missed_max(struct device *d,</div><div class='add'>+				       struct device_attribute *attr,</div><div class='add'>+				       char *buf)</div><div class='add'>+{</div><div class='add'>+	struct bonding *bond = to_bond(d);</div><div class='add'>+</div><div class='add'>+	return sysfs_emit(buf, "%u\n", bond-&gt;params.missed_max);</div><div class='add'>+}</div><div class='add'>+static DEVICE_ATTR(arp_missed_max, 0644,</div><div class='add'>+		   bonding_show_missed_max, bonding_sysfs_store_option);</div><div class='add'>+</div><div class='ctx'> /* Show the up and down delays. */</div><div class='ctx'> static ssize_t bonding_show_downdelay(struct device *d,</div><div class='ctx'> 				      struct device_attribute *attr,</div><div class='hunk'>@@ -323,9 +321,9 @@ static ssize_t bonding_show_downdelay(struct device *d,</div><div class='ctx'> {</div><div class='ctx'> 	struct bonding *bond = to_bond(d);</div><div class='ctx'> </div><div class='del'>-	return sprintf(buf, "%d\n", bond-&gt;params.downdelay * bond-&gt;params.miimon);</div><div class='add'>+	return sysfs_emit(buf, "%d\n", bond-&gt;params.downdelay * bond-&gt;params.miimon);</div><div class='ctx'> }</div><div class='del'>-static DEVICE_ATTR(downdelay, S_IRUGO | S_IWUSR,</div><div class='add'>+static DEVICE_ATTR(downdelay, 0644,</div><div class='ctx'> 		   bonding_show_downdelay, bonding_sysfs_store_option);</div><div class='ctx'> </div><div class='ctx'> static ssize_t bonding_show_updelay(struct device *d,</div><div class='hunk'>@@ -334,26 +332,52 @@ static ssize_t bonding_show_updelay(struct device *d,</div><div class='ctx'> {</div><div class='ctx'> 	struct bonding *bond = to_bond(d);</div><div class='ctx'> </div><div class='del'>-	return sprintf(buf, "%d\n", bond-&gt;params.updelay * bond-&gt;params.miimon);</div><div class='add'>+	return sysfs_emit(buf, "%d\n", bond-&gt;params.updelay * bond-&gt;params.miimon);</div><div class='ctx'> </div><div class='ctx'> }</div><div class='del'>-static DEVICE_ATTR(updelay, S_IRUGO | S_IWUSR,</div><div class='add'>+static DEVICE_ATTR(updelay, 0644,</div><div class='ctx'> 		   bonding_show_updelay, bonding_sysfs_store_option);</div><div class='ctx'> </div><div class='del'>-/* Show the LACP interval. */</div><div class='del'>-static ssize_t bonding_show_lacp(struct device *d,</div><div class='del'>-				 struct device_attribute *attr,</div><div class='del'>-				 char *buf)</div><div class='add'>+static ssize_t bonding_show_peer_notif_delay(struct device *d,</div><div class='add'>+					     struct device_attribute *attr,</div><div class='add'>+					     char *buf)</div><div class='add'>+{</div><div class='add'>+	struct bonding *bond = to_bond(d);</div><div class='add'>+</div><div class='add'>+	return sysfs_emit(buf, "%d\n",</div><div class='add'>+			  bond-&gt;params.peer_notif_delay * bond-&gt;params.miimon);</div><div class='add'>+}</div><div class='add'>+static DEVICE_ATTR(peer_notif_delay, 0644,</div><div class='add'>+		   bonding_show_peer_notif_delay, bonding_sysfs_store_option);</div><div class='add'>+</div><div class='add'>+/* Show the LACP activity and interval. */</div><div class='add'>+static ssize_t bonding_show_lacp_active(struct device *d,</div><div class='add'>+					struct device_attribute *attr,</div><div class='add'>+					char *buf)</div><div class='add'>+{</div><div class='add'>+	struct bonding *bond = to_bond(d);</div><div class='add'>+	const struct bond_opt_value *val;</div><div class='add'>+</div><div class='add'>+	val = bond_opt_get_val(BOND_OPT_LACP_ACTIVE, bond-&gt;params.lacp_active);</div><div class='add'>+</div><div class='add'>+	return sysfs_emit(buf, "%s %d\n", val-&gt;string, bond-&gt;params.lacp_active);</div><div class='add'>+}</div><div class='add'>+static DEVICE_ATTR(lacp_active, 0644,</div><div class='add'>+		   bonding_show_lacp_active, bonding_sysfs_store_option);</div><div class='add'>+</div><div class='add'>+static ssize_t bonding_show_lacp_rate(struct device *d,</div><div class='add'>+				      struct device_attribute *attr,</div><div class='add'>+				      char *buf)</div><div class='ctx'> {</div><div class='ctx'> 	struct bonding *bond = to_bond(d);</div><div class='ctx'> 	const struct bond_opt_value *val;</div><div class='ctx'> </div><div class='ctx'> 	val = bond_opt_get_val(BOND_OPT_LACP_RATE, bond-&gt;params.lacp_fast);</div><div class='ctx'> </div><div class='del'>-	return sprintf(buf, "%s %d\n", val-&gt;string, bond-&gt;params.lacp_fast);</div><div class='add'>+	return sysfs_emit(buf, "%s %d\n", val-&gt;string, bond-&gt;params.lacp_fast);</div><div class='ctx'> }</div><div class='del'>-static DEVICE_ATTR(lacp_rate, S_IRUGO | S_IWUSR,</div><div class='del'>-		   bonding_show_lacp, bonding_sysfs_store_option);</div><div class='add'>+static DEVICE_ATTR(lacp_rate, 0644,</div><div class='add'>+		   bonding_show_lacp_rate, bonding_sysfs_store_option);</div><div class='ctx'> </div><div class='ctx'> static ssize_t bonding_show_min_links(struct device *d,</div><div class='ctx'> 				      struct device_attribute *attr,</div><div class='hunk'>@@ -361,9 +385,9 @@ static ssize_t bonding_show_min_links(struct device *d,</div><div class='ctx'> {</div><div class='ctx'> 	struct bonding *bond = to_bond(d);</div><div class='ctx'> </div><div class='del'>-	return sprintf(buf, "%u\n", bond-&gt;params.min_links);</div><div class='add'>+	return sysfs_emit(buf, "%u\n", bond-&gt;params.min_links);</div><div class='ctx'> }</div><div class='del'>-static DEVICE_ATTR(min_links, S_IRUGO | S_IWUSR,</div><div class='add'>+static DEVICE_ATTR(min_links, 0644,</div><div class='ctx'> 		   bonding_show_min_links, bonding_sysfs_store_option);</div><div class='ctx'> </div><div class='ctx'> static ssize_t bonding_show_ad_select(struct device *d,</div><div class='hunk'>@@ -375,37 +399,24 @@ static ssize_t bonding_show_ad_select(struct device *d,</div><div class='ctx'> </div><div class='ctx'> 	val = bond_opt_get_val(BOND_OPT_AD_SELECT, bond-&gt;params.ad_select);</div><div class='ctx'> </div><div class='del'>-	return sprintf(buf, "%s %d\n", val-&gt;string, bond-&gt;params.ad_select);</div><div class='add'>+	return sysfs_emit(buf, "%s %d\n", val-&gt;string, bond-&gt;params.ad_select);</div><div class='ctx'> }</div><div class='del'>-static DEVICE_ATTR(ad_select, S_IRUGO | S_IWUSR,</div><div class='add'>+static DEVICE_ATTR(ad_select, 0644,</div><div class='ctx'> 		   bonding_show_ad_select, bonding_sysfs_store_option);</div><div class='ctx'> </div><div class='del'>-/* Show and set the number of peer notifications to send after a failover event. */</div><div class='add'>+/* Show the number of peer notifications to send after a failover event. */</div><div class='ctx'> static ssize_t bonding_show_num_peer_notif(struct device *d,</div><div class='ctx'> 					   struct device_attribute *attr,</div><div class='ctx'> 					   char *buf)</div><div class='ctx'> {</div><div class='ctx'> 	struct bonding *bond = to_bond(d);</div><div class='del'>-	return sprintf(buf, "%d\n", bond-&gt;params.num_peer_notif);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t bonding_store_num_peer_notif(struct device *d,</div><div class='del'>-					    struct device_attribute *attr,</div><div class='del'>-					    const char *buf, size_t count)</div><div class='del'>-{</div><div class='del'>-	struct bonding *bond = to_bond(d);</div><div class='del'>-	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = bond_opt_tryset_rtnl(bond, BOND_OPT_NUM_PEER_NOTIF, (char *)buf);</div><div class='del'>-	if (!ret)</div><div class='del'>-		ret = count;</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='add'>+	return sysfs_emit(buf, "%d\n", bond-&gt;params.num_peer_notif);</div><div class='ctx'> }</div><div class='del'>-static DEVICE_ATTR(num_grat_arp, S_IRUGO | S_IWUSR,</div><div class='del'>-		   bonding_show_num_peer_notif, bonding_store_num_peer_notif);</div><div class='del'>-static DEVICE_ATTR(num_unsol_na, S_IRUGO | S_IWUSR,</div><div class='del'>-		   bonding_show_num_peer_notif, bonding_store_num_peer_notif);</div><div class='add'>+static DEVICE_ATTR(num_grat_arp, 0644,</div><div class='add'>+		   bonding_show_num_peer_notif, bonding_sysfs_store_option);</div><div class='add'>+static DEVICE_ATTR(num_unsol_na, 0644,</div><div class='add'>+		   bonding_show_num_peer_notif, bonding_sysfs_store_option);</div><div class='ctx'> </div><div class='ctx'> /* Show the MII monitor interval. */</div><div class='ctx'> static ssize_t bonding_show_miimon(struct device *d,</div><div class='hunk'>@@ -414,9 +425,9 @@ static ssize_t bonding_show_miimon(struct device *d,</div><div class='ctx'> {</div><div class='ctx'> 	struct bonding *bond = to_bond(d);</div><div class='ctx'> </div><div class='del'>-	return sprintf(buf, "%d\n", bond-&gt;params.miimon);</div><div class='add'>+	return sysfs_emit(buf, "%d\n", bond-&gt;params.miimon);</div><div class='ctx'> }</div><div class='del'>-static DEVICE_ATTR(miimon, S_IRUGO | S_IWUSR,</div><div class='add'>+static DEVICE_ATTR(miimon, 0644,</div><div class='ctx'> 		   bonding_show_miimon, bonding_sysfs_store_option);</div><div class='ctx'> </div><div class='ctx'> /* Show the primary slave. */</div><div class='hunk'>@@ -431,12 +442,12 @@ static ssize_t bonding_show_primary(struct device *d,</div><div class='ctx'> 	rcu_read_lock();</div><div class='ctx'> 	primary = rcu_dereference(bond-&gt;primary_slave);</div><div class='ctx'> 	if (primary)</div><div class='del'>-		count = sprintf(buf, "%s\n", primary-&gt;dev-&gt;name);</div><div class='add'>+		count = sysfs_emit(buf, "%s\n", primary-&gt;dev-&gt;name);</div><div class='ctx'> 	rcu_read_unlock();</div><div class='ctx'> </div><div class='ctx'> 	return count;</div><div class='ctx'> }</div><div class='del'>-static DEVICE_ATTR(primary, S_IRUGO | S_IWUSR,</div><div class='add'>+static DEVICE_ATTR(primary, 0644,</div><div class='ctx'> 		   bonding_show_primary, bonding_sysfs_store_option);</div><div class='ctx'> </div><div class='ctx'> /* Show the primary_reselect flag. */</div><div class='hunk'>@@ -450,22 +461,20 @@ static ssize_t bonding_show_primary_reselect(struct device *d,</div><div class='ctx'> 	val = bond_opt_get_val(BOND_OPT_PRIMARY_RESELECT,</div><div class='ctx'> 			       bond-&gt;params.primary_reselect);</div><div class='ctx'> </div><div class='del'>-	return sprintf(buf, "%s %d\n",</div><div class='del'>-		       val-&gt;string, bond-&gt;params.primary_reselect);</div><div class='add'>+	return sysfs_emit(buf, "%s %d\n",</div><div class='add'>+			  val-&gt;string, bond-&gt;params.primary_reselect);</div><div class='ctx'> }</div><div class='del'>-static DEVICE_ATTR(primary_reselect, S_IRUGO | S_IWUSR,</div><div class='add'>+static DEVICE_ATTR(primary_reselect, 0644,</div><div class='ctx'> 		   bonding_show_primary_reselect, bonding_sysfs_store_option);</div><div class='ctx'> </div><div class='del'>-/* Show the use_carrier flag. */</div><div class='add'>+/* use_carrier is obsolete, but print value for compatibility */</div><div class='ctx'> static ssize_t bonding_show_carrier(struct device *d,</div><div class='ctx'> 				    struct device_attribute *attr,</div><div class='ctx'> 				    char *buf)</div><div class='ctx'> {</div><div class='del'>-	struct bonding *bond = to_bond(d);</div><div class='del'>-</div><div class='del'>-	return sprintf(buf, "%d\n", bond-&gt;params.use_carrier);</div><div class='add'>+	return sysfs_emit(buf, "1\n");</div><div class='ctx'> }</div><div class='del'>-static DEVICE_ATTR(use_carrier, S_IRUGO | S_IWUSR,</div><div class='add'>+static DEVICE_ATTR(use_carrier, 0644,</div><div class='ctx'> 		   bonding_show_carrier, bonding_sysfs_store_option);</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -481,12 +490,12 @@ static ssize_t bonding_show_active_slave(struct device *d,</div><div class='ctx'> 	rcu_read_lock();</div><div class='ctx'> 	slave_dev = bond_option_active_slave_get_rcu(bond);</div><div class='ctx'> 	if (slave_dev)</div><div class='del'>-		count = sprintf(buf, "%s\n", slave_dev-&gt;name);</div><div class='add'>+		count = sysfs_emit(buf, "%s\n", slave_dev-&gt;name);</div><div class='ctx'> 	rcu_read_unlock();</div><div class='ctx'> </div><div class='ctx'> 	return count;</div><div class='ctx'> }</div><div class='del'>-static DEVICE_ATTR(active_slave, S_IRUGO | S_IWUSR,</div><div class='add'>+static DEVICE_ATTR(active_slave, 0644,</div><div class='ctx'> 		   bonding_show_active_slave, bonding_sysfs_store_option);</div><div class='ctx'> </div><div class='ctx'> /* Show link status of the bond interface. */</div><div class='hunk'>@@ -495,11 +504,11 @@ static ssize_t bonding_show_mii_status(struct device *d,</div><div class='ctx'> 				       char *buf)</div><div class='ctx'> {</div><div class='ctx'> 	struct bonding *bond = to_bond(d);</div><div class='del'>-	bool active = !!rcu_access_pointer(bond-&gt;curr_active_slave);</div><div class='add'>+	bool active = netif_carrier_ok(bond-&gt;dev);</div><div class='ctx'> </div><div class='del'>-	return sprintf(buf, "%s\n", active ? "up" : "down");</div><div class='add'>+	return sysfs_emit(buf, "%s\n", active ? "up" : "down");</div><div class='ctx'> }</div><div class='del'>-static DEVICE_ATTR(mii_status, S_IRUGO, bonding_show_mii_status, NULL);</div><div class='add'>+static DEVICE_ATTR(mii_status, 0444, bonding_show_mii_status, NULL);</div><div class='ctx'> </div><div class='ctx'> /* Show current 802.3ad aggregator ID. */</div><div class='ctx'> static ssize_t bonding_show_ad_aggregator(struct device *d,</div><div class='hunk'>@@ -511,14 +520,15 @@ static ssize_t bonding_show_ad_aggregator(struct device *d,</div><div class='ctx'> </div><div class='ctx'> 	if (BOND_MODE(bond) == BOND_MODE_8023AD) {</div><div class='ctx'> 		struct ad_info ad_info;</div><div class='del'>-		count = sprintf(buf, "%d\n",</div><div class='del'>-				bond_3ad_get_active_agg_info(bond, &amp;ad_info)</div><div class='del'>-				?  0 : ad_info.aggregator_id);</div><div class='add'>+</div><div class='add'>+		count = sysfs_emit(buf, "%d\n",</div><div class='add'>+				   bond_3ad_get_active_agg_info(bond, &amp;ad_info)</div><div class='add'>+				   ?  0 : ad_info.aggregator_id);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return count;</div><div class='ctx'> }</div><div class='del'>-static DEVICE_ATTR(ad_aggregator, S_IRUGO, bonding_show_ad_aggregator, NULL);</div><div class='add'>+static DEVICE_ATTR(ad_aggregator, 0444, bonding_show_ad_aggregator, NULL);</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /* Show number of active 802.3ad ports. */</div><div class='hunk'>@@ -531,14 +541,15 @@ static ssize_t bonding_show_ad_num_ports(struct device *d,</div><div class='ctx'> </div><div class='ctx'> 	if (BOND_MODE(bond) == BOND_MODE_8023AD) {</div><div class='ctx'> 		struct ad_info ad_info;</div><div class='del'>-		count = sprintf(buf, "%d\n",</div><div class='del'>-				bond_3ad_get_active_agg_info(bond, &amp;ad_info)</div><div class='del'>-				?  0 : ad_info.ports);</div><div class='add'>+</div><div class='add'>+		count = sysfs_emit(buf, "%d\n",</div><div class='add'>+				   bond_3ad_get_active_agg_info(bond, &amp;ad_info)</div><div class='add'>+				   ?  0 : ad_info.ports);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return count;</div><div class='ctx'> }</div><div class='del'>-static DEVICE_ATTR(ad_num_ports, S_IRUGO, bonding_show_ad_num_ports, NULL);</div><div class='add'>+static DEVICE_ATTR(ad_num_ports, 0444, bonding_show_ad_num_ports, NULL);</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /* Show current 802.3ad actor key. */</div><div class='hunk'>@@ -551,14 +562,15 @@ static ssize_t bonding_show_ad_actor_key(struct device *d,</div><div class='ctx'> </div><div class='ctx'> 	if (BOND_MODE(bond) == BOND_MODE_8023AD &amp;&amp; capable(CAP_NET_ADMIN)) {</div><div class='ctx'> 		struct ad_info ad_info;</div><div class='del'>-		count = sprintf(buf, "%d\n",</div><div class='del'>-				bond_3ad_get_active_agg_info(bond, &amp;ad_info)</div><div class='del'>-				?  0 : ad_info.actor_key);</div><div class='add'>+</div><div class='add'>+		count = sysfs_emit(buf, "%d\n",</div><div class='add'>+				   bond_3ad_get_active_agg_info(bond, &amp;ad_info)</div><div class='add'>+				   ?  0 : ad_info.actor_key);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return count;</div><div class='ctx'> }</div><div class='del'>-static DEVICE_ATTR(ad_actor_key, S_IRUGO, bonding_show_ad_actor_key, NULL);</div><div class='add'>+static DEVICE_ATTR(ad_actor_key, 0444, bonding_show_ad_actor_key, NULL);</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /* Show current 802.3ad partner key. */</div><div class='hunk'>@@ -571,14 +583,15 @@ static ssize_t bonding_show_ad_partner_key(struct device *d,</div><div class='ctx'> </div><div class='ctx'> 	if (BOND_MODE(bond) == BOND_MODE_8023AD &amp;&amp; capable(CAP_NET_ADMIN)) {</div><div class='ctx'> 		struct ad_info ad_info;</div><div class='del'>-		count = sprintf(buf, "%d\n",</div><div class='del'>-				bond_3ad_get_active_agg_info(bond, &amp;ad_info)</div><div class='del'>-				?  0 : ad_info.partner_key);</div><div class='add'>+</div><div class='add'>+		count = sysfs_emit(buf, "%d\n",</div><div class='add'>+				   bond_3ad_get_active_agg_info(bond, &amp;ad_info)</div><div class='add'>+				   ?  0 : ad_info.partner_key);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return count;</div><div class='ctx'> }</div><div class='del'>-static DEVICE_ATTR(ad_partner_key, S_IRUGO, bonding_show_ad_partner_key, NULL);</div><div class='add'>+static DEVICE_ATTR(ad_partner_key, 0444, bonding_show_ad_partner_key, NULL);</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /* Show current 802.3ad partner mac. */</div><div class='hunk'>@@ -591,13 +604,14 @@ static ssize_t bonding_show_ad_partner_mac(struct device *d,</div><div class='ctx'> </div><div class='ctx'> 	if (BOND_MODE(bond) == BOND_MODE_8023AD &amp;&amp; capable(CAP_NET_ADMIN)) {</div><div class='ctx'> 		struct ad_info ad_info;</div><div class='add'>+</div><div class='ctx'> 		if (!bond_3ad_get_active_agg_info(bond, &amp;ad_info))</div><div class='del'>-			count = sprintf(buf, "%pM\n", ad_info.partner_system);</div><div class='add'>+			count = sysfs_emit(buf, "%pM\n", ad_info.partner_system);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return count;</div><div class='ctx'> }</div><div class='del'>-static DEVICE_ATTR(ad_partner_mac, S_IRUGO, bonding_show_ad_partner_mac, NULL);</div><div class='add'>+static DEVICE_ATTR(ad_partner_mac, 0444, bonding_show_ad_partner_mac, NULL);</div><div class='ctx'> </div><div class='ctx'> /* Show the queue_ids of the slaves in the current bond. */</div><div class='ctx'> static ssize_t bonding_show_queue_id(struct device *d,</div><div class='hunk'>@@ -609,28 +623,28 @@ static ssize_t bonding_show_queue_id(struct device *d,</div><div class='ctx'> 	struct slave *slave;</div><div class='ctx'> 	int res = 0;</div><div class='ctx'> </div><div class='del'>-	if (!rtnl_trylock())</div><div class='del'>-		return restart_syscall();</div><div class='add'>+	rcu_read_lock();</div><div class='ctx'> </div><div class='del'>-	bond_for_each_slave(bond, slave, iter) {</div><div class='add'>+	bond_for_each_slave_rcu(bond, slave, iter) {</div><div class='ctx'> 		if (res &gt; (PAGE_SIZE - IFNAMSIZ - 6)) {</div><div class='ctx'> 			/* not enough space for another interface_name:queue_id pair */</div><div class='ctx'> 			if ((PAGE_SIZE - res) &gt; 10)</div><div class='ctx'> 				res = PAGE_SIZE - 10;</div><div class='del'>-			res += sprintf(buf + res, "++more++ ");</div><div class='add'>+			res += sysfs_emit_at(buf, res, "++more++ ");</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='del'>-		res += sprintf(buf + res, "%s:%d ",</div><div class='del'>-			       slave-&gt;dev-&gt;name, slave-&gt;queue_id);</div><div class='add'>+		res += sysfs_emit_at(buf, res, "%s:%d ",</div><div class='add'>+				     slave-&gt;dev-&gt;name,</div><div class='add'>+				     READ_ONCE(slave-&gt;queue_id));</div><div class='ctx'> 	}</div><div class='ctx'> 	if (res)</div><div class='ctx'> 		buf[res-1] = '\n'; /* eat the leftover space */</div><div class='ctx'> </div><div class='del'>-	rtnl_unlock();</div><div class='add'>+	rcu_read_unlock();</div><div class='ctx'> </div><div class='ctx'> 	return res;</div><div class='ctx'> }</div><div class='del'>-static DEVICE_ATTR(queue_id, S_IRUGO | S_IWUSR, bonding_show_queue_id,</div><div class='add'>+static DEVICE_ATTR(queue_id, 0644, bonding_show_queue_id,</div><div class='ctx'> 		   bonding_sysfs_store_option);</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -641,9 +655,9 @@ static ssize_t bonding_show_slaves_active(struct device *d,</div><div class='ctx'> {</div><div class='ctx'> 	struct bonding *bond = to_bond(d);</div><div class='ctx'> </div><div class='del'>-	return sprintf(buf, "%d\n", bond-&gt;params.all_slaves_active);</div><div class='add'>+	return sysfs_emit(buf, "%d\n", bond-&gt;params.all_slaves_active);</div><div class='ctx'> }</div><div class='del'>-static DEVICE_ATTR(all_slaves_active, S_IRUGO | S_IWUSR,</div><div class='add'>+static DEVICE_ATTR(all_slaves_active, 0644,</div><div class='ctx'> 		   bonding_show_slaves_active, bonding_sysfs_store_option);</div><div class='ctx'> </div><div class='ctx'> /* Show the number of IGMP membership reports to send on link failure */</div><div class='hunk'>@@ -653,9 +667,9 @@ static ssize_t bonding_show_resend_igmp(struct device *d,</div><div class='ctx'> {</div><div class='ctx'> 	struct bonding *bond = to_bond(d);</div><div class='ctx'> </div><div class='del'>-	return sprintf(buf, "%d\n", bond-&gt;params.resend_igmp);</div><div class='add'>+	return sysfs_emit(buf, "%d\n", bond-&gt;params.resend_igmp);</div><div class='ctx'> }</div><div class='del'>-static DEVICE_ATTR(resend_igmp, S_IRUGO | S_IWUSR,</div><div class='add'>+static DEVICE_ATTR(resend_igmp, 0644,</div><div class='ctx'> 		   bonding_show_resend_igmp, bonding_sysfs_store_option);</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -665,9 +679,9 @@ static ssize_t bonding_show_lp_interval(struct device *d,</div><div class='ctx'> {</div><div class='ctx'> 	struct bonding *bond = to_bond(d);</div><div class='ctx'> </div><div class='del'>-	return sprintf(buf, "%d\n", bond-&gt;params.lp_interval);</div><div class='add'>+	return sysfs_emit(buf, "%d\n", bond-&gt;params.lp_interval);</div><div class='ctx'> }</div><div class='del'>-static DEVICE_ATTR(lp_interval, S_IRUGO | S_IWUSR,</div><div class='add'>+static DEVICE_ATTR(lp_interval, 0644,</div><div class='ctx'> 		   bonding_show_lp_interval, bonding_sysfs_store_option);</div><div class='ctx'> </div><div class='ctx'> static ssize_t bonding_show_tlb_dynamic_lb(struct device *d,</div><div class='hunk'>@@ -675,9 +689,10 @@ static ssize_t bonding_show_tlb_dynamic_lb(struct device *d,</div><div class='ctx'> 					   char *buf)</div><div class='ctx'> {</div><div class='ctx'> 	struct bonding *bond = to_bond(d);</div><div class='del'>-	return sprintf(buf, "%d\n", bond-&gt;params.tlb_dynamic_lb);</div><div class='add'>+</div><div class='add'>+	return sysfs_emit(buf, "%d\n", bond-&gt;params.tlb_dynamic_lb);</div><div class='ctx'> }</div><div class='del'>-static DEVICE_ATTR(tlb_dynamic_lb, S_IRUGO | S_IWUSR,</div><div class='add'>+static DEVICE_ATTR(tlb_dynamic_lb, 0644,</div><div class='ctx'> 		   bonding_show_tlb_dynamic_lb, bonding_sysfs_store_option);</div><div class='ctx'> </div><div class='ctx'> static ssize_t bonding_show_packets_per_slave(struct device *d,</div><div class='hunk'>@@ -687,9 +702,9 @@ static ssize_t bonding_show_packets_per_slave(struct device *d,</div><div class='ctx'> 	struct bonding *bond = to_bond(d);</div><div class='ctx'> 	unsigned int packets_per_slave = bond-&gt;params.packets_per_slave;</div><div class='ctx'> </div><div class='del'>-	return sprintf(buf, "%u\n", packets_per_slave);</div><div class='add'>+	return sysfs_emit(buf, "%u\n", packets_per_slave);</div><div class='ctx'> }</div><div class='del'>-static DEVICE_ATTR(packets_per_slave, S_IRUGO | S_IWUSR,</div><div class='add'>+static DEVICE_ATTR(packets_per_slave, 0644,</div><div class='ctx'> 		   bonding_show_packets_per_slave, bonding_sysfs_store_option);</div><div class='ctx'> </div><div class='ctx'> static ssize_t bonding_show_ad_actor_sys_prio(struct device *d,</div><div class='hunk'>@@ -699,11 +714,11 @@ static ssize_t bonding_show_ad_actor_sys_prio(struct device *d,</div><div class='ctx'> 	struct bonding *bond = to_bond(d);</div><div class='ctx'> </div><div class='ctx'> 	if (BOND_MODE(bond) == BOND_MODE_8023AD &amp;&amp; capable(CAP_NET_ADMIN))</div><div class='del'>-		return sprintf(buf, "%hu\n", bond-&gt;params.ad_actor_sys_prio);</div><div class='add'>+		return sysfs_emit(buf, "%hu\n", bond-&gt;params.ad_actor_sys_prio);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-static DEVICE_ATTR(ad_actor_sys_prio, S_IRUGO | S_IWUSR,</div><div class='add'>+static DEVICE_ATTR(ad_actor_sys_prio, 0644,</div><div class='ctx'> 		   bonding_show_ad_actor_sys_prio, bonding_sysfs_store_option);</div><div class='ctx'> </div><div class='ctx'> static ssize_t bonding_show_ad_actor_system(struct device *d,</div><div class='hunk'>@@ -713,12 +728,12 @@ static ssize_t bonding_show_ad_actor_system(struct device *d,</div><div class='ctx'> 	struct bonding *bond = to_bond(d);</div><div class='ctx'> </div><div class='ctx'> 	if (BOND_MODE(bond) == BOND_MODE_8023AD &amp;&amp; capable(CAP_NET_ADMIN))</div><div class='del'>-		return sprintf(buf, "%pM\n", bond-&gt;params.ad_actor_system);</div><div class='add'>+		return sysfs_emit(buf, "%pM\n", bond-&gt;params.ad_actor_system);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static DEVICE_ATTR(ad_actor_system, S_IRUGO | S_IWUSR,</div><div class='add'>+static DEVICE_ATTR(ad_actor_system, 0644,</div><div class='ctx'> 		   bonding_show_ad_actor_system, bonding_sysfs_store_option);</div><div class='ctx'> </div><div class='ctx'> static ssize_t bonding_show_ad_user_port_key(struct device *d,</div><div class='hunk'>@@ -728,11 +743,11 @@ static ssize_t bonding_show_ad_user_port_key(struct device *d,</div><div class='ctx'> 	struct bonding *bond = to_bond(d);</div><div class='ctx'> </div><div class='ctx'> 	if (BOND_MODE(bond) == BOND_MODE_8023AD &amp;&amp; capable(CAP_NET_ADMIN))</div><div class='del'>-		return sprintf(buf, "%hu\n", bond-&gt;params.ad_user_port_key);</div><div class='add'>+		return sysfs_emit(buf, "%hu\n", bond-&gt;params.ad_user_port_key);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-static DEVICE_ATTR(ad_user_port_key, S_IRUGO | S_IWUSR,</div><div class='add'>+static DEVICE_ATTR(ad_user_port_key, 0644,</div><div class='ctx'> 		   bonding_show_ad_user_port_key, bonding_sysfs_store_option);</div><div class='ctx'> </div><div class='ctx'> static struct attribute *per_bond_attrs[] = {</div><div class='hunk'>@@ -745,6 +760,8 @@ static struct attribute *per_bond_attrs[] = {</div><div class='ctx'> 	&amp;dev_attr_arp_ip_target.attr,</div><div class='ctx'> 	&amp;dev_attr_downdelay.attr,</div><div class='ctx'> 	&amp;dev_attr_updelay.attr,</div><div class='add'>+	&amp;dev_attr_peer_notif_delay.attr,</div><div class='add'>+	&amp;dev_attr_lacp_active.attr,</div><div class='ctx'> 	&amp;dev_attr_lacp_rate.attr,</div><div class='ctx'> 	&amp;dev_attr_ad_select.attr,</div><div class='ctx'> 	&amp;dev_attr_xmit_hash_policy.attr,</div><div class='hunk'>@@ -771,10 +788,11 @@ static struct attribute *per_bond_attrs[] = {</div><div class='ctx'> 	&amp;dev_attr_ad_actor_sys_prio.attr,</div><div class='ctx'> 	&amp;dev_attr_ad_actor_system.attr,</div><div class='ctx'> 	&amp;dev_attr_ad_user_port_key.attr,</div><div class='add'>+	&amp;dev_attr_arp_missed_max.attr,</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct attribute_group bonding_group = {</div><div class='add'>+static const struct attribute_group bonding_group = {</div><div class='ctx'> 	.name = "bonding",</div><div class='ctx'> 	.attrs = per_bond_attrs,</div><div class='ctx'> };</div><div class='hunk'>@@ -782,7 +800,7 @@ static struct attribute_group bonding_group = {</div><div class='ctx'> /* Initialize sysfs.  This sets up the bonding_masters file in</div><div class='ctx'>  * /sys/class/net.</div><div class='ctx'>  */</div><div class='del'>-int bond_create_sysfs(struct bond_net *bn)</div><div class='add'>+int __net_init bond_create_sysfs(struct bond_net *bn)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -803,8 +821,8 @@ int bond_create_sysfs(struct bond_net *bn)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (ret == -EEXIST) {</div><div class='ctx'> 		/* Is someone being kinky and naming a device bonding_master? */</div><div class='del'>-		if (__dev_get_by_name(bn-&gt;net,</div><div class='del'>-				      class_attr_bonding_masters.attr.name))</div><div class='add'>+		if (netdev_name_in_use(bn-&gt;net,</div><div class='add'>+				       class_attr_bonding_masters.attr.name))</div><div class='ctx'> 			pr_err("network device named %s already exists in sysfs\n",</div><div class='ctx'> 			       class_attr_bonding_masters.attr.name);</div><div class='ctx'> 		ret = 0;</div><div class='hunk'>@@ -815,7 +833,7 @@ int bond_create_sysfs(struct bond_net *bn)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Remove /sys/class/net/bonding_masters. */</div><div class='del'>-void bond_destroy_sysfs(struct bond_net *bn)</div><div class='add'>+void __net_exit bond_destroy_sysfs(struct bond_net *bn)</div><div class='ctx'> {</div><div class='ctx'> 	netdev_class_remove_file_ns(&amp;bn-&gt;class_attr_bonding_masters, bn-&gt;net);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/bonding/bond_sysfs_slave.c b/drivers/net/bonding/bond_sysfs_slave.c<br/>index 7d16c51e6913..36d0e8440b5b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/bonding/bond_sysfs_slave.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/bonding/bond_sysfs_slave.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/bonding/bond_sysfs_slave.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/bonding/bond_sysfs_slave.c</a></div><div class='hunk'>@@ -1,11 +1,7 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='ctx'> /*	Sysfs attributes of bond slaves</div><div class='ctx'>  *</div><div class='ctx'>  *      Copyright (c) 2014 Scott Feldman &lt;sfeldma@cumulusnetworks.com&gt;</div><div class='del'>- *</div><div class='del'>- *	This program is free software; you can redistribute it and/or</div><div class='del'>- *	modify it under the terms of the GNU General Public License</div><div class='del'>- *	as published by the Free Software Foundation; either version</div><div class='del'>- *	2 of the License, or (at your option) any later version.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/capability.h&gt;</div><div class='hunk'>@@ -19,49 +15,45 @@ struct slave_attribute {</div><div class='ctx'> 	ssize_t (*show)(struct slave *, char *);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define SLAVE_ATTR(_name, _mode, _show)				\</div><div class='del'>-const struct slave_attribute slave_attr_##_name = {		\</div><div class='del'>-	.attr = {.name = __stringify(_name),			\</div><div class='del'>-		 .mode = _mode },				\</div><div class='del'>-	.show	= _show,					\</div><div class='del'>-};</div><div class='del'>-#define SLAVE_ATTR_RO(_name) \</div><div class='del'>-	SLAVE_ATTR(_name, S_IRUGO, _name##_show)</div><div class='add'>+#define SLAVE_ATTR_RO(_name)					\</div><div class='add'>+const struct slave_attribute slave_attr_##_name = __ATTR_RO(_name)</div><div class='ctx'> </div><div class='ctx'> static ssize_t state_show(struct slave *slave, char *buf)</div><div class='ctx'> {</div><div class='ctx'> 	switch (bond_slave_state(slave)) {</div><div class='ctx'> 	case BOND_STATE_ACTIVE:</div><div class='del'>-		return sprintf(buf, "active\n");</div><div class='add'>+		return sysfs_emit(buf, "active\n");</div><div class='ctx'> 	case BOND_STATE_BACKUP:</div><div class='del'>-		return sprintf(buf, "backup\n");</div><div class='add'>+		return sysfs_emit(buf, "backup\n");</div><div class='ctx'> 	default:</div><div class='del'>-		return sprintf(buf, "UNKNOWN\n");</div><div class='add'>+		return sysfs_emit(buf, "UNKNOWN\n");</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> static SLAVE_ATTR_RO(state);</div><div class='ctx'> </div><div class='ctx'> static ssize_t mii_status_show(struct slave *slave, char *buf)</div><div class='ctx'> {</div><div class='del'>-	return sprintf(buf, "%s\n", bond_slave_link_status(slave-&gt;link));</div><div class='add'>+	return sysfs_emit(buf, "%s\n", bond_slave_link_status(slave-&gt;link));</div><div class='ctx'> }</div><div class='ctx'> static SLAVE_ATTR_RO(mii_status);</div><div class='ctx'> </div><div class='ctx'> static ssize_t link_failure_count_show(struct slave *slave, char *buf)</div><div class='ctx'> {</div><div class='del'>-	return sprintf(buf, "%d\n", slave-&gt;link_failure_count);</div><div class='add'>+	return sysfs_emit(buf, "%d\n", slave-&gt;link_failure_count);</div><div class='ctx'> }</div><div class='ctx'> static SLAVE_ATTR_RO(link_failure_count);</div><div class='ctx'> </div><div class='ctx'> static ssize_t perm_hwaddr_show(struct slave *slave, char *buf)</div><div class='ctx'> {</div><div class='del'>-	return sprintf(buf, "%pM\n", slave-&gt;perm_hwaddr);</div><div class='add'>+	return sysfs_emit(buf, "%*phC\n",</div><div class='add'>+		       slave-&gt;dev-&gt;addr_len,</div><div class='add'>+		       slave-&gt;perm_hwaddr);</div><div class='ctx'> }</div><div class='ctx'> static SLAVE_ATTR_RO(perm_hwaddr);</div><div class='ctx'> </div><div class='ctx'> static ssize_t queue_id_show(struct slave *slave, char *buf)</div><div class='ctx'> {</div><div class='del'>-	return sprintf(buf, "%d\n", slave-&gt;queue_id);</div><div class='add'>+	return sysfs_emit(buf, "%d\n", READ_ONCE(slave-&gt;queue_id));</div><div class='ctx'> }</div><div class='ctx'> static SLAVE_ATTR_RO(queue_id);</div><div class='ctx'> </div><div class='hunk'>@@ -72,11 +64,11 @@ static ssize_t ad_aggregator_id_show(struct slave *slave, char *buf)</div><div class='ctx'> 	if (BOND_MODE(slave-&gt;bond) == BOND_MODE_8023AD) {</div><div class='ctx'> 		agg = SLAVE_AD_INFO(slave)-&gt;port.aggregator;</div><div class='ctx'> 		if (agg)</div><div class='del'>-			return sprintf(buf, "%d\n",</div><div class='del'>-				       agg-&gt;aggregator_identifier);</div><div class='add'>+			return sysfs_emit(buf, "%d\n",</div><div class='add'>+					  agg-&gt;aggregator_identifier);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return sprintf(buf, "N/A\n");</div><div class='add'>+	return sysfs_emit(buf, "N/A\n");</div><div class='ctx'> }</div><div class='ctx'> static SLAVE_ATTR_RO(ad_aggregator_id);</div><div class='ctx'> </div><div class='hunk'>@@ -87,11 +79,11 @@ static ssize_t ad_actor_oper_port_state_show(struct slave *slave, char *buf)</div><div class='ctx'> 	if (BOND_MODE(slave-&gt;bond) == BOND_MODE_8023AD) {</div><div class='ctx'> 		ad_port = &amp;SLAVE_AD_INFO(slave)-&gt;port;</div><div class='ctx'> 		if (ad_port-&gt;aggregator)</div><div class='del'>-			return sprintf(buf, "%u\n",</div><div class='add'>+			return sysfs_emit(buf, "%u\n",</div><div class='ctx'> 				       ad_port-&gt;actor_oper_port_state);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return sprintf(buf, "N/A\n");</div><div class='add'>+	return sysfs_emit(buf, "N/A\n");</div><div class='ctx'> }</div><div class='ctx'> static SLAVE_ATTR_RO(ad_actor_oper_port_state);</div><div class='ctx'> </div><div class='hunk'>@@ -102,28 +94,27 @@ static ssize_t ad_partner_oper_port_state_show(struct slave *slave, char *buf)</div><div class='ctx'> 	if (BOND_MODE(slave-&gt;bond) == BOND_MODE_8023AD) {</div><div class='ctx'> 		ad_port = &amp;SLAVE_AD_INFO(slave)-&gt;port;</div><div class='ctx'> 		if (ad_port-&gt;aggregator)</div><div class='del'>-			return sprintf(buf, "%u\n",</div><div class='add'>+			return sysfs_emit(buf, "%u\n",</div><div class='ctx'> 				       ad_port-&gt;partner_oper.port_state);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return sprintf(buf, "N/A\n");</div><div class='add'>+	return sysfs_emit(buf, "N/A\n");</div><div class='ctx'> }</div><div class='ctx'> static SLAVE_ATTR_RO(ad_partner_oper_port_state);</div><div class='ctx'> </div><div class='del'>-static const struct slave_attribute *slave_attrs[] = {</div><div class='del'>-	&amp;slave_attr_state,</div><div class='del'>-	&amp;slave_attr_mii_status,</div><div class='del'>-	&amp;slave_attr_link_failure_count,</div><div class='del'>-	&amp;slave_attr_perm_hwaddr,</div><div class='del'>-	&amp;slave_attr_queue_id,</div><div class='del'>-	&amp;slave_attr_ad_aggregator_id,</div><div class='del'>-	&amp;slave_attr_ad_actor_oper_port_state,</div><div class='del'>-	&amp;slave_attr_ad_partner_oper_port_state,</div><div class='add'>+static const struct attribute *slave_attrs[] = {</div><div class='add'>+	&amp;slave_attr_state.attr,</div><div class='add'>+	&amp;slave_attr_mii_status.attr,</div><div class='add'>+	&amp;slave_attr_link_failure_count.attr,</div><div class='add'>+	&amp;slave_attr_perm_hwaddr.attr,</div><div class='add'>+	&amp;slave_attr_queue_id.attr,</div><div class='add'>+	&amp;slave_attr_ad_aggregator_id.attr,</div><div class='add'>+	&amp;slave_attr_ad_actor_oper_port_state.attr,</div><div class='add'>+	&amp;slave_attr_ad_partner_oper_port_state.attr,</div><div class='ctx'> 	NULL</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define to_slave_attr(_at) container_of(_at, struct slave_attribute, attr)</div><div class='del'>-#define to_slave(obj)	container_of(obj, struct slave, kobj)</div><div class='ctx'> </div><div class='ctx'> static ssize_t slave_show(struct kobject *kobj,</div><div class='ctx'> 			  struct attribute *attr, char *buf)</div><div class='hunk'>@@ -134,43 +125,16 @@ static ssize_t slave_show(struct kobject *kobj,</div><div class='ctx'> 	return slave_attr-&gt;show(slave, buf);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const struct sysfs_ops slave_sysfs_ops = {</div><div class='add'>+const struct sysfs_ops slave_sysfs_ops = {</div><div class='ctx'> 	.show = slave_show,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct kobj_type slave_ktype = {</div><div class='del'>-#ifdef CONFIG_SYSFS</div><div class='del'>-	.sysfs_ops = &amp;slave_sysfs_ops,</div><div class='del'>-#endif</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> int bond_sysfs_slave_add(struct slave *slave)</div><div class='ctx'> {</div><div class='del'>-	const struct slave_attribute **a;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = kobject_init_and_add(&amp;slave-&gt;kobj, &amp;slave_ktype,</div><div class='del'>-				   &amp;(slave-&gt;dev-&gt;dev.kobj), "bonding_slave");</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	for (a = slave_attrs; *a; ++a) {</div><div class='del'>-		err = sysfs_create_file(&amp;slave-&gt;kobj, &amp;((*a)-&gt;attr));</div><div class='del'>-		if (err) {</div><div class='del'>-			kobject_put(&amp;slave-&gt;kobj);</div><div class='del'>-			return err;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return sysfs_create_files(&amp;slave-&gt;kobj, slave_attrs);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void bond_sysfs_slave_del(struct slave *slave)</div><div class='ctx'> {</div><div class='del'>-	const struct slave_attribute **a;</div><div class='del'>-</div><div class='del'>-	for (a = slave_attrs; *a; ++a)</div><div class='del'>-		sysfs_remove_file(&amp;slave-&gt;kobj, &amp;((*a)-&gt;attr));</div><div class='del'>-</div><div class='del'>-	kobject_put(&amp;slave-&gt;kobj);</div><div class='add'>+	sysfs_remove_files(&amp;slave-&gt;kobj, slave_attrs);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/bonding/bonding_priv.h b/drivers/net/bonding/bonding_priv.h<br/>index 5a4d81a9437c..fef6288c6944 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/bonding/bonding_priv.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/bonding/bonding_priv.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/bonding/bonding_priv.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/bonding/bonding_priv.h</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-1.0+ */</div><div class='ctx'> /*</div><div class='ctx'>  * Bond several ethernet interfaces into a Cisco, running 'Etherchannel'.</div><div class='ctx'>  *</div><div class='hunk'>@@ -7,19 +8,15 @@</div><div class='ctx'>  * BUT, I'm the one who modified it for ethernet, so:</div><div class='ctx'>  * (c) Copyright 1999, Thomas Davis, tadavis@lbl.gov</div><div class='ctx'>  *</div><div class='del'>- *	This software may be used and distributed according to the terms</div><div class='del'>- *	of the GNU Public License, incorporated herein by reference.</div><div class='del'>- *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef _BONDING_PRIV_H</div><div class='ctx'> #define _BONDING_PRIV_H</div><div class='add'>+#include &lt;generated/utsrelease.h&gt;</div><div class='ctx'> </div><div class='del'>-#define DRV_VERSION	"3.7.1"</div><div class='del'>-#define DRV_RELDATE	"April 27, 2011"</div><div class='ctx'> #define DRV_NAME	"bonding"</div><div class='ctx'> #define DRV_DESCRIPTION	"Ethernet Channel Bonding Driver"</div><div class='ctx'> </div><div class='del'>-#define bond_version DRV_DESCRIPTION ": v" DRV_VERSION " (" DRV_RELDATE ")\n"</div><div class='add'>+#define bond_version DRV_DESCRIPTION ": v" UTS_RELEASE "\n"</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/caif/Kconfig b/drivers/net/caif/Kconfig<br/>index 547098086773..709660cb38f8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/caif/Kconfig?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/caif/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/caif/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/caif/Kconfig</a></div><div class='hunk'>@@ -1,45 +1,24 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> #</div><div class='ctx'> # CAIF physical drivers</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-comment "CAIF transport drivers"</div><div class='add'>+menuconfig CAIF_DRIVERS</div><div class='add'>+	bool "CAIF transport drivers"</div><div class='add'>+	depends on CAIF</div><div class='add'>+	help</div><div class='add'>+	  Enable this to see CAIF physical drivers.</div><div class='add'>+</div><div class='add'>+if CAIF_DRIVERS</div><div class='ctx'> </div><div class='ctx'> config CAIF_TTY</div><div class='ctx'> 	tristate "CAIF TTY transport driver"</div><div class='ctx'> 	depends on CAIF &amp;&amp; TTY</div><div class='ctx'> 	default n</div><div class='del'>-	---help---</div><div class='del'>-	The CAIF TTY transport driver is a Line Discipline (ldisc)</div><div class='del'>-	identified as N_CAIF. When this ldisc is opened from user space</div><div class='del'>-	it will redirect the TTY's traffic into the CAIF stack.</div><div class='del'>-</div><div class='del'>-config CAIF_SPI_SLAVE</div><div class='del'>-	tristate "CAIF SPI transport driver for slave interface"</div><div class='del'>-	depends on CAIF &amp;&amp; HAS_DMA</div><div class='del'>-	default n</div><div class='del'>-	---help---</div><div class='del'>-	The CAIF Link layer SPI Protocol driver for Slave SPI interface.</div><div class='del'>-	This driver implements a platform driver to accommodate for a</div><div class='del'>-	platform specific SPI device. A sample CAIF SPI Platform device is</div><div class='del'>-	provided in Documentation/networking/caif/spi_porting.txt</div><div class='del'>-</div><div class='del'>-config CAIF_SPI_SYNC</div><div class='del'>-	bool "Next command and length in start of frame"</div><div class='del'>-	depends on CAIF_SPI_SLAVE</div><div class='del'>-	default n</div><div class='del'>-	---help---</div><div class='del'>-	Putting the next command and length in the start of the frame can</div><div class='del'>-	help to synchronize to the next transfer in case of over or under-runs.</div><div class='del'>-	This option also needs to be enabled on the modem.</div><div class='del'>-</div><div class='del'>-config CAIF_HSI</div><div class='del'>-       tristate "CAIF HSI transport driver"</div><div class='del'>-       depends on CAIF</div><div class='del'>-       default n</div><div class='del'>-       ---help---</div><div class='del'>-       The caif low level driver for CAIF over HSI.</div><div class='del'>-       Be aware that if you enable this then you also need to</div><div class='del'>-       enable a low-level HSI driver.</div><div class='add'>+	help</div><div class='add'>+	  The CAIF TTY transport driver is a Line Discipline (ldisc)</div><div class='add'>+	  identified as N_CAIF. When this ldisc is opened from user space</div><div class='add'>+	  it will redirect the TTY's traffic into the CAIF stack.</div><div class='ctx'> </div><div class='ctx'> config CAIF_VIRTIO</div><div class='ctx'> 	tristate "CAIF virtio transport driver"</div><div class='hunk'>@@ -48,9 +27,7 @@ config CAIF_VIRTIO</div><div class='ctx'> 	select VIRTIO</div><div class='ctx'> 	select GENERIC_ALLOCATOR</div><div class='ctx'> 	default n</div><div class='del'>-	---help---</div><div class='del'>-	The caif driver for CAIF over Virtio.</div><div class='add'>+	help</div><div class='add'>+	  The CAIF driver for CAIF over Virtio.</div><div class='ctx'> </div><div class='del'>-if CAIF_VIRTIO</div><div class='del'>-source "drivers/vhost/Kconfig"</div><div class='del'>-endif</div><div class='add'>+endif # CAIF_DRIVERS</div><div class='head'>diff --git a/drivers/net/caif/Makefile b/drivers/net/caif/Makefile<br/>index 9bbd45391f6c..97f664f8016c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/caif/Makefile?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/caif/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/caif/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/caif/Makefile</a></div><div class='hunk'>@@ -1,14 +1,8 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> ccflags-$(CONFIG_CAIF_DEBUG) := -DDEBUG</div><div class='ctx'> </div><div class='ctx'> # Serial interface</div><div class='ctx'> obj-$(CONFIG_CAIF_TTY) += caif_serial.o</div><div class='ctx'> </div><div class='del'>-# SPI slave physical interfaces module</div><div class='del'>-cfspi_slave-objs := caif_spi.o caif_spi_slave.o</div><div class='del'>-obj-$(CONFIG_CAIF_SPI_SLAVE) += cfspi_slave.o</div><div class='del'>-</div><div class='del'>-# HSI interface</div><div class='del'>-obj-$(CONFIG_CAIF_HSI) += caif_hsi.o</div><div class='del'>-</div><div class='ctx'> # Virtio interface</div><div class='ctx'> obj-$(CONFIG_CAIF_VIRTIO) += caif_virtio.o</div><div class='head'>diff --git a/drivers/net/caif/caif_hsi.c b/drivers/net/caif/caif_hsi.c<br/>deleted file mode 100644<br/>index b3b922adc0e4..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/caif/caif_hsi.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/caif/caif_hsi.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,1481 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) ST-Ericsson AB 2010</div><div class='del'>- * Author:  Daniel Martensson</div><div class='del'>- *	    Dmitry.Tarnyagin  / dmitry.tarnyagin@lockless.no</div><div class='del'>- * License terms: GNU General Public License (GPL) version 2.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define pr_fmt(fmt) KBUILD_MODNAME fmt</div><div class='del'>-</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/device.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/list.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/if_arp.h&gt;</div><div class='del'>-#include &lt;linux/timer.h&gt;</div><div class='del'>-#include &lt;net/rtnetlink.h&gt;</div><div class='del'>-#include &lt;linux/pkt_sched.h&gt;</div><div class='del'>-#include &lt;net/caif/caif_layer.h&gt;</div><div class='del'>-#include &lt;net/caif/caif_hsi.h&gt;</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_AUTHOR("Daniel Martensson");</div><div class='del'>-MODULE_DESCRIPTION("CAIF HSI driver");</div><div class='del'>-</div><div class='del'>-/* Returns the number of padding bytes for alignment. */</div><div class='del'>-#define PAD_POW2(x, pow) ((((x)&amp;((pow)-1)) == 0) ? 0 :\</div><div class='del'>-				(((pow)-((x)&amp;((pow)-1)))))</div><div class='del'>-</div><div class='del'>-static const struct cfhsi_config  hsi_default_config = {</div><div class='del'>-</div><div class='del'>-	/* Inactivity timeout on HSI, ms */</div><div class='del'>-	.inactivity_timeout = HZ,</div><div class='del'>-</div><div class='del'>-	/* Aggregation timeout (ms) of zero means no aggregation is done*/</div><div class='del'>-	.aggregation_timeout = 1,</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * HSI link layer flow-control thresholds.</div><div class='del'>-	 * Threshold values for the HSI packet queue. Flow-control will be</div><div class='del'>-	 * asserted when the number of packets exceeds q_high_mark. It will</div><div class='del'>-	 * not be de-asserted before the number of packets drops below</div><div class='del'>-	 * q_low_mark.</div><div class='del'>-	 * Warning: A high threshold value might increase throughput but it</div><div class='del'>-	 * will at the same time prevent channel prioritization and increase</div><div class='del'>-	 * the risk of flooding the modem. The high threshold should be above</div><div class='del'>-	 * the low.</div><div class='del'>-	 */</div><div class='del'>-	.q_high_mark = 100,</div><div class='del'>-	.q_low_mark = 50,</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * HSI padding options.</div><div class='del'>-	 * Warning: must be a base of 2 (&amp; operation used) and can not be zero !</div><div class='del'>-	 */</div><div class='del'>-	.head_align = 4,</div><div class='del'>-	.tail_align = 4,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define ON 1</div><div class='del'>-#define OFF 0</div><div class='del'>-</div><div class='del'>-static LIST_HEAD(cfhsi_list);</div><div class='del'>-</div><div class='del'>-static void cfhsi_inactivity_tout(unsigned long arg)</div><div class='del'>-{</div><div class='del'>-	struct cfhsi *cfhsi = (struct cfhsi *)arg;</div><div class='del'>-</div><div class='del'>-	netdev_dbg(cfhsi-&gt;ndev, "%s.\n",</div><div class='del'>-		__func__);</div><div class='del'>-</div><div class='del'>-	/* Schedule power down work queue. */</div><div class='del'>-	if (!test_bit(CFHSI_SHUTDOWN, &amp;cfhsi-&gt;bits))</div><div class='del'>-		queue_work(cfhsi-&gt;wq, &amp;cfhsi-&gt;wake_down_work);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cfhsi_update_aggregation_stats(struct cfhsi *cfhsi,</div><div class='del'>-					   const struct sk_buff *skb,</div><div class='del'>-					   int direction)</div><div class='del'>-{</div><div class='del'>-	struct caif_payload_info *info;</div><div class='del'>-	int hpad, tpad, len;</div><div class='del'>-</div><div class='del'>-	info = (struct caif_payload_info *)&amp;skb-&gt;cb;</div><div class='del'>-	hpad = 1 + PAD_POW2((info-&gt;hdr_len + 1), cfhsi-&gt;cfg.head_align);</div><div class='del'>-	tpad = PAD_POW2((skb-&gt;len + hpad), cfhsi-&gt;cfg.tail_align);</div><div class='del'>-	len = skb-&gt;len + hpad + tpad;</div><div class='del'>-</div><div class='del'>-	if (direction &gt; 0)</div><div class='del'>-		cfhsi-&gt;aggregation_len += len;</div><div class='del'>-	else if (direction &lt; 0)</div><div class='del'>-		cfhsi-&gt;aggregation_len -= len;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool cfhsi_can_send_aggregate(struct cfhsi *cfhsi)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	if (cfhsi-&gt;cfg.aggregation_timeout == 0)</div><div class='del'>-		return true;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; CFHSI_PRIO_BEBK; ++i) {</div><div class='del'>-		if (cfhsi-&gt;qhead[i].qlen)</div><div class='del'>-			return true;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* TODO: Use aggregation_len instead */</div><div class='del'>-	if (cfhsi-&gt;qhead[CFHSI_PRIO_BEBK].qlen &gt;= CFHSI_MAX_PKTS)</div><div class='del'>-		return true;</div><div class='del'>-</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct sk_buff *cfhsi_dequeue(struct cfhsi *cfhsi)</div><div class='del'>-{</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; CFHSI_PRIO_LAST; ++i) {</div><div class='del'>-		skb = skb_dequeue(&amp;cfhsi-&gt;qhead[i]);</div><div class='del'>-		if (skb)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return skb;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int cfhsi_tx_queue_len(struct cfhsi *cfhsi)</div><div class='del'>-{</div><div class='del'>-	int i, len = 0;</div><div class='del'>-	for (i = 0; i &lt; CFHSI_PRIO_LAST; ++i)</div><div class='del'>-		len += skb_queue_len(&amp;cfhsi-&gt;qhead[i]);</div><div class='del'>-	return len;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cfhsi_abort_tx(struct cfhsi *cfhsi)</div><div class='del'>-{</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-</div><div class='del'>-	for (;;) {</div><div class='del'>-		spin_lock_bh(&amp;cfhsi-&gt;lock);</div><div class='del'>-		skb = cfhsi_dequeue(cfhsi);</div><div class='del'>-		if (!skb)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		cfhsi-&gt;ndev-&gt;stats.tx_errors++;</div><div class='del'>-		cfhsi-&gt;ndev-&gt;stats.tx_dropped++;</div><div class='del'>-		cfhsi_update_aggregation_stats(cfhsi, skb, -1);</div><div class='del'>-		spin_unlock_bh(&amp;cfhsi-&gt;lock);</div><div class='del'>-		kfree_skb(skb);</div><div class='del'>-	}</div><div class='del'>-	cfhsi-&gt;tx_state = CFHSI_TX_STATE_IDLE;</div><div class='del'>-	if (!test_bit(CFHSI_SHUTDOWN, &amp;cfhsi-&gt;bits))</div><div class='del'>-		mod_timer(&amp;cfhsi-&gt;inactivity_timer,</div><div class='del'>-			jiffies + cfhsi-&gt;cfg.inactivity_timeout);</div><div class='del'>-	spin_unlock_bh(&amp;cfhsi-&gt;lock);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int cfhsi_flush_fifo(struct cfhsi *cfhsi)</div><div class='del'>-{</div><div class='del'>-	char buffer[32]; /* Any reasonable value */</div><div class='del'>-	size_t fifo_occupancy;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	netdev_dbg(cfhsi-&gt;ndev, "%s.\n",</div><div class='del'>-		__func__);</div><div class='del'>-</div><div class='del'>-	do {</div><div class='del'>-		ret = cfhsi-&gt;ops-&gt;cfhsi_fifo_occupancy(cfhsi-&gt;ops,</div><div class='del'>-				&amp;fifo_occupancy);</div><div class='del'>-		if (ret) {</div><div class='del'>-			netdev_warn(cfhsi-&gt;ndev,</div><div class='del'>-				"%s: can't get FIFO occupancy: %d.\n",</div><div class='del'>-				__func__, ret);</div><div class='del'>-			break;</div><div class='del'>-		} else if (!fifo_occupancy)</div><div class='del'>-			/* No more data, exitting normally */</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		fifo_occupancy = min(sizeof(buffer), fifo_occupancy);</div><div class='del'>-		set_bit(CFHSI_FLUSH_FIFO, &amp;cfhsi-&gt;bits);</div><div class='del'>-		ret = cfhsi-&gt;ops-&gt;cfhsi_rx(buffer, fifo_occupancy,</div><div class='del'>-				cfhsi-&gt;ops);</div><div class='del'>-		if (ret) {</div><div class='del'>-			clear_bit(CFHSI_FLUSH_FIFO, &amp;cfhsi-&gt;bits);</div><div class='del'>-			netdev_warn(cfhsi-&gt;ndev,</div><div class='del'>-				"%s: can't read data: %d.\n",</div><div class='del'>-				__func__, ret);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		ret = 5 * HZ;</div><div class='del'>-		ret = wait_event_interruptible_timeout(cfhsi-&gt;flush_fifo_wait,</div><div class='del'>-			 !test_bit(CFHSI_FLUSH_FIFO, &amp;cfhsi-&gt;bits), ret);</div><div class='del'>-</div><div class='del'>-		if (ret &lt; 0) {</div><div class='del'>-			netdev_warn(cfhsi-&gt;ndev,</div><div class='del'>-				"%s: can't wait for flush complete: %d.\n",</div><div class='del'>-				__func__, ret);</div><div class='del'>-			break;</div><div class='del'>-		} else if (!ret) {</div><div class='del'>-			ret = -ETIMEDOUT;</div><div class='del'>-			netdev_warn(cfhsi-&gt;ndev,</div><div class='del'>-				"%s: timeout waiting for flush complete.\n",</div><div class='del'>-				__func__);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	} while (1);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int cfhsi_tx_frm(struct cfhsi_desc *desc, struct cfhsi *cfhsi)</div><div class='del'>-{</div><div class='del'>-	int nfrms = 0;</div><div class='del'>-	int pld_len = 0;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	u8 *pfrm = desc-&gt;emb_frm + CFHSI_MAX_EMB_FRM_SZ;</div><div class='del'>-</div><div class='del'>-	skb = cfhsi_dequeue(cfhsi);</div><div class='del'>-	if (!skb)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	/* Clear offset. */</div><div class='del'>-	desc-&gt;offset = 0;</div><div class='del'>-</div><div class='del'>-	/* Check if we can embed a CAIF frame. */</div><div class='del'>-	if (skb-&gt;len &lt; CFHSI_MAX_EMB_FRM_SZ) {</div><div class='del'>-		struct caif_payload_info *info;</div><div class='del'>-		int hpad;</div><div class='del'>-		int tpad;</div><div class='del'>-</div><div class='del'>-		/* Calculate needed head alignment and tail alignment. */</div><div class='del'>-		info = (struct caif_payload_info *)&amp;skb-&gt;cb;</div><div class='del'>-</div><div class='del'>-		hpad = 1 + PAD_POW2((info-&gt;hdr_len + 1), cfhsi-&gt;cfg.head_align);</div><div class='del'>-		tpad = PAD_POW2((skb-&gt;len + hpad), cfhsi-&gt;cfg.tail_align);</div><div class='del'>-</div><div class='del'>-		/* Check if frame still fits with added alignment. */</div><div class='del'>-		if ((skb-&gt;len + hpad + tpad) &lt;= CFHSI_MAX_EMB_FRM_SZ) {</div><div class='del'>-			u8 *pemb = desc-&gt;emb_frm;</div><div class='del'>-			desc-&gt;offset = CFHSI_DESC_SHORT_SZ;</div><div class='del'>-			*pemb = (u8)(hpad - 1);</div><div class='del'>-			pemb += hpad;</div><div class='del'>-</div><div class='del'>-			/* Update network statistics. */</div><div class='del'>-			spin_lock_bh(&amp;cfhsi-&gt;lock);</div><div class='del'>-			cfhsi-&gt;ndev-&gt;stats.tx_packets++;</div><div class='del'>-			cfhsi-&gt;ndev-&gt;stats.tx_bytes += skb-&gt;len;</div><div class='del'>-			cfhsi_update_aggregation_stats(cfhsi, skb, -1);</div><div class='del'>-			spin_unlock_bh(&amp;cfhsi-&gt;lock);</div><div class='del'>-</div><div class='del'>-			/* Copy in embedded CAIF frame. */</div><div class='del'>-			skb_copy_bits(skb, 0, pemb, skb-&gt;len);</div><div class='del'>-</div><div class='del'>-			/* Consume the SKB */</div><div class='del'>-			consume_skb(skb);</div><div class='del'>-			skb = NULL;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Create payload CAIF frames. */</div><div class='del'>-	pfrm = desc-&gt;emb_frm + CFHSI_MAX_EMB_FRM_SZ;</div><div class='del'>-	while (nfrms &lt; CFHSI_MAX_PKTS) {</div><div class='del'>-		struct caif_payload_info *info;</div><div class='del'>-		int hpad;</div><div class='del'>-		int tpad;</div><div class='del'>-</div><div class='del'>-		if (!skb)</div><div class='del'>-			skb = cfhsi_dequeue(cfhsi);</div><div class='del'>-</div><div class='del'>-		if (!skb)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		/* Calculate needed head alignment and tail alignment. */</div><div class='del'>-		info = (struct caif_payload_info *)&amp;skb-&gt;cb;</div><div class='del'>-</div><div class='del'>-		hpad = 1 + PAD_POW2((info-&gt;hdr_len + 1), cfhsi-&gt;cfg.head_align);</div><div class='del'>-		tpad = PAD_POW2((skb-&gt;len + hpad), cfhsi-&gt;cfg.tail_align);</div><div class='del'>-</div><div class='del'>-		/* Fill in CAIF frame length in descriptor. */</div><div class='del'>-		desc-&gt;cffrm_len[nfrms] = hpad + skb-&gt;len + tpad;</div><div class='del'>-</div><div class='del'>-		/* Fill head padding information. */</div><div class='del'>-		*pfrm = (u8)(hpad - 1);</div><div class='del'>-		pfrm += hpad;</div><div class='del'>-</div><div class='del'>-		/* Update network statistics. */</div><div class='del'>-		spin_lock_bh(&amp;cfhsi-&gt;lock);</div><div class='del'>-		cfhsi-&gt;ndev-&gt;stats.tx_packets++;</div><div class='del'>-		cfhsi-&gt;ndev-&gt;stats.tx_bytes += skb-&gt;len;</div><div class='del'>-		cfhsi_update_aggregation_stats(cfhsi, skb, -1);</div><div class='del'>-		spin_unlock_bh(&amp;cfhsi-&gt;lock);</div><div class='del'>-</div><div class='del'>-		/* Copy in CAIF frame. */</div><div class='del'>-		skb_copy_bits(skb, 0, pfrm, skb-&gt;len);</div><div class='del'>-</div><div class='del'>-		/* Update payload length. */</div><div class='del'>-		pld_len += desc-&gt;cffrm_len[nfrms];</div><div class='del'>-</div><div class='del'>-		/* Update frame pointer. */</div><div class='del'>-		pfrm += skb-&gt;len + tpad;</div><div class='del'>-</div><div class='del'>-		/* Consume the SKB */</div><div class='del'>-		consume_skb(skb);</div><div class='del'>-		skb = NULL;</div><div class='del'>-</div><div class='del'>-		/* Update number of frames. */</div><div class='del'>-		nfrms++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Unused length fields should be zero-filled (according to SPEC). */</div><div class='del'>-	while (nfrms &lt; CFHSI_MAX_PKTS) {</div><div class='del'>-		desc-&gt;cffrm_len[nfrms] = 0x0000;</div><div class='del'>-		nfrms++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Check if we can piggy-back another descriptor. */</div><div class='del'>-	if (cfhsi_can_send_aggregate(cfhsi))</div><div class='del'>-		desc-&gt;header |= CFHSI_PIGGY_DESC;</div><div class='del'>-	else</div><div class='del'>-		desc-&gt;header &amp;= ~CFHSI_PIGGY_DESC;</div><div class='del'>-</div><div class='del'>-	return CFHSI_DESC_SZ + pld_len;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cfhsi_start_tx(struct cfhsi *cfhsi)</div><div class='del'>-{</div><div class='del'>-	struct cfhsi_desc *desc = (struct cfhsi_desc *)cfhsi-&gt;tx_buf;</div><div class='del'>-	int len, res;</div><div class='del'>-</div><div class='del'>-	netdev_dbg(cfhsi-&gt;ndev, "%s.\n", __func__);</div><div class='del'>-</div><div class='del'>-	if (test_bit(CFHSI_SHUTDOWN, &amp;cfhsi-&gt;bits))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	do {</div><div class='del'>-		/* Create HSI frame. */</div><div class='del'>-		len = cfhsi_tx_frm(desc, cfhsi);</div><div class='del'>-		if (!len) {</div><div class='del'>-			spin_lock_bh(&amp;cfhsi-&gt;lock);</div><div class='del'>-			if (unlikely(cfhsi_tx_queue_len(cfhsi))) {</div><div class='del'>-				spin_unlock_bh(&amp;cfhsi-&gt;lock);</div><div class='del'>-				res = -EAGAIN;</div><div class='del'>-				continue;</div><div class='del'>-			}</div><div class='del'>-			cfhsi-&gt;tx_state = CFHSI_TX_STATE_IDLE;</div><div class='del'>-			/* Start inactivity timer. */</div><div class='del'>-			mod_timer(&amp;cfhsi-&gt;inactivity_timer,</div><div class='del'>-				jiffies + cfhsi-&gt;cfg.inactivity_timeout);</div><div class='del'>-			spin_unlock_bh(&amp;cfhsi-&gt;lock);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Set up new transfer. */</div><div class='del'>-		res = cfhsi-&gt;ops-&gt;cfhsi_tx(cfhsi-&gt;tx_buf, len, cfhsi-&gt;ops);</div><div class='del'>-		if (WARN_ON(res &lt; 0))</div><div class='del'>-			netdev_err(cfhsi-&gt;ndev, "%s: TX error %d.\n",</div><div class='del'>-				__func__, res);</div><div class='del'>-	} while (res &lt; 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cfhsi_tx_done(struct cfhsi *cfhsi)</div><div class='del'>-{</div><div class='del'>-	netdev_dbg(cfhsi-&gt;ndev, "%s.\n", __func__);</div><div class='del'>-</div><div class='del'>-	if (test_bit(CFHSI_SHUTDOWN, &amp;cfhsi-&gt;bits))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Send flow on if flow off has been previously signalled</div><div class='del'>-	 * and number of packets is below low water mark.</div><div class='del'>-	 */</div><div class='del'>-	spin_lock_bh(&amp;cfhsi-&gt;lock);</div><div class='del'>-	if (cfhsi-&gt;flow_off_sent &amp;&amp;</div><div class='del'>-			cfhsi_tx_queue_len(cfhsi) &lt;= cfhsi-&gt;cfg.q_low_mark &amp;&amp;</div><div class='del'>-			cfhsi-&gt;cfdev.flowctrl) {</div><div class='del'>-</div><div class='del'>-		cfhsi-&gt;flow_off_sent = 0;</div><div class='del'>-		cfhsi-&gt;cfdev.flowctrl(cfhsi-&gt;ndev, ON);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (cfhsi_can_send_aggregate(cfhsi)) {</div><div class='del'>-		spin_unlock_bh(&amp;cfhsi-&gt;lock);</div><div class='del'>-		cfhsi_start_tx(cfhsi);</div><div class='del'>-	} else {</div><div class='del'>-		mod_timer(&amp;cfhsi-&gt;aggregation_timer,</div><div class='del'>-			jiffies + cfhsi-&gt;cfg.aggregation_timeout);</div><div class='del'>-		spin_unlock_bh(&amp;cfhsi-&gt;lock);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cfhsi_tx_done_cb(struct cfhsi_cb_ops *cb_ops)</div><div class='del'>-{</div><div class='del'>-	struct cfhsi *cfhsi;</div><div class='del'>-</div><div class='del'>-	cfhsi = container_of(cb_ops, struct cfhsi, cb_ops);</div><div class='del'>-	netdev_dbg(cfhsi-&gt;ndev, "%s.\n",</div><div class='del'>-		__func__);</div><div class='del'>-</div><div class='del'>-	if (test_bit(CFHSI_SHUTDOWN, &amp;cfhsi-&gt;bits))</div><div class='del'>-		return;</div><div class='del'>-	cfhsi_tx_done(cfhsi);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int cfhsi_rx_desc(struct cfhsi_desc *desc, struct cfhsi *cfhsi)</div><div class='del'>-{</div><div class='del'>-	int xfer_sz = 0;</div><div class='del'>-	int nfrms = 0;</div><div class='del'>-	u16 *plen = NULL;</div><div class='del'>-	u8 *pfrm = NULL;</div><div class='del'>-</div><div class='del'>-	if ((desc-&gt;header &amp; ~CFHSI_PIGGY_DESC) ||</div><div class='del'>-			(desc-&gt;offset &gt; CFHSI_MAX_EMB_FRM_SZ)) {</div><div class='del'>-		netdev_err(cfhsi-&gt;ndev, "%s: Invalid descriptor.\n",</div><div class='del'>-			__func__);</div><div class='del'>-		return -EPROTO;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Check for embedded CAIF frame. */</div><div class='del'>-	if (desc-&gt;offset) {</div><div class='del'>-		struct sk_buff *skb;</div><div class='del'>-		u8 *dst = NULL;</div><div class='del'>-		int len = 0;</div><div class='del'>-		pfrm = ((u8 *)desc) + desc-&gt;offset;</div><div class='del'>-</div><div class='del'>-		/* Remove offset padding. */</div><div class='del'>-		pfrm += *pfrm + 1;</div><div class='del'>-</div><div class='del'>-		/* Read length of CAIF frame (little endian). */</div><div class='del'>-		len = *pfrm;</div><div class='del'>-		len |= ((*(pfrm+1)) &lt;&lt; 8) &amp; 0xFF00;</div><div class='del'>-		len += 2;	/* Add FCS fields. */</div><div class='del'>-</div><div class='del'>-		/* Sanity check length of CAIF frame. */</div><div class='del'>-		if (unlikely(len &gt; CFHSI_MAX_CAIF_FRAME_SZ)) {</div><div class='del'>-			netdev_err(cfhsi-&gt;ndev, "%s: Invalid length.\n",</div><div class='del'>-				__func__);</div><div class='del'>-			return -EPROTO;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Allocate SKB (OK even in IRQ context). */</div><div class='del'>-		skb = alloc_skb(len + 1, GFP_ATOMIC);</div><div class='del'>-		if (!skb) {</div><div class='del'>-			netdev_err(cfhsi-&gt;ndev, "%s: Out of memory !\n",</div><div class='del'>-				__func__);</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-		}</div><div class='del'>-		caif_assert(skb != NULL);</div><div class='del'>-</div><div class='del'>-		dst = skb_put(skb, len);</div><div class='del'>-		memcpy(dst, pfrm, len);</div><div class='del'>-</div><div class='del'>-		skb-&gt;protocol = htons(ETH_P_CAIF);</div><div class='del'>-		skb_reset_mac_header(skb);</div><div class='del'>-		skb-&gt;dev = cfhsi-&gt;ndev;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * We are in a callback handler and</div><div class='del'>-		 * unfortunately we don't know what context we're</div><div class='del'>-		 * running in.</div><div class='del'>-		 */</div><div class='del'>-		if (in_interrupt())</div><div class='del'>-			netif_rx(skb);</div><div class='del'>-		else</div><div class='del'>-			netif_rx_ni(skb);</div><div class='del'>-</div><div class='del'>-		/* Update network statistics. */</div><div class='del'>-		cfhsi-&gt;ndev-&gt;stats.rx_packets++;</div><div class='del'>-		cfhsi-&gt;ndev-&gt;stats.rx_bytes += len;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Calculate transfer length. */</div><div class='del'>-	plen = desc-&gt;cffrm_len;</div><div class='del'>-	while (nfrms &lt; CFHSI_MAX_PKTS &amp;&amp; *plen) {</div><div class='del'>-		xfer_sz += *plen;</div><div class='del'>-		plen++;</div><div class='del'>-		nfrms++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Check for piggy-backed descriptor. */</div><div class='del'>-	if (desc-&gt;header &amp; CFHSI_PIGGY_DESC)</div><div class='del'>-		xfer_sz += CFHSI_DESC_SZ;</div><div class='del'>-</div><div class='del'>-	if ((xfer_sz % 4) || (xfer_sz &gt; (CFHSI_BUF_SZ_RX - CFHSI_DESC_SZ))) {</div><div class='del'>-		netdev_err(cfhsi-&gt;ndev,</div><div class='del'>-				"%s: Invalid payload len: %d, ignored.\n",</div><div class='del'>-			__func__, xfer_sz);</div><div class='del'>-		return -EPROTO;</div><div class='del'>-	}</div><div class='del'>-	return xfer_sz;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int cfhsi_rx_desc_len(struct cfhsi_desc *desc)</div><div class='del'>-{</div><div class='del'>-	int xfer_sz = 0;</div><div class='del'>-	int nfrms = 0;</div><div class='del'>-	u16 *plen;</div><div class='del'>-</div><div class='del'>-	if ((desc-&gt;header &amp; ~CFHSI_PIGGY_DESC) ||</div><div class='del'>-			(desc-&gt;offset &gt; CFHSI_MAX_EMB_FRM_SZ)) {</div><div class='del'>-</div><div class='del'>-		pr_err("Invalid descriptor. %x %x\n", desc-&gt;header,</div><div class='del'>-				desc-&gt;offset);</div><div class='del'>-		return -EPROTO;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Calculate transfer length. */</div><div class='del'>-	plen = desc-&gt;cffrm_len;</div><div class='del'>-	while (nfrms &lt; CFHSI_MAX_PKTS &amp;&amp; *plen) {</div><div class='del'>-		xfer_sz += *plen;</div><div class='del'>-		plen++;</div><div class='del'>-		nfrms++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (xfer_sz % 4) {</div><div class='del'>-		pr_err("Invalid payload len: %d, ignored.\n", xfer_sz);</div><div class='del'>-		return -EPROTO;</div><div class='del'>-	}</div><div class='del'>-	return xfer_sz;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int cfhsi_rx_pld(struct cfhsi_desc *desc, struct cfhsi *cfhsi)</div><div class='del'>-{</div><div class='del'>-	int rx_sz = 0;</div><div class='del'>-	int nfrms = 0;</div><div class='del'>-	u16 *plen = NULL;</div><div class='del'>-	u8 *pfrm = NULL;</div><div class='del'>-</div><div class='del'>-	/* Sanity check header and offset. */</div><div class='del'>-	if (WARN_ON((desc-&gt;header &amp; ~CFHSI_PIGGY_DESC) ||</div><div class='del'>-			(desc-&gt;offset &gt; CFHSI_MAX_EMB_FRM_SZ))) {</div><div class='del'>-		netdev_err(cfhsi-&gt;ndev, "%s: Invalid descriptor.\n",</div><div class='del'>-			__func__);</div><div class='del'>-		return -EPROTO;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Set frame pointer to start of payload. */</div><div class='del'>-	pfrm = desc-&gt;emb_frm + CFHSI_MAX_EMB_FRM_SZ;</div><div class='del'>-	plen = desc-&gt;cffrm_len;</div><div class='del'>-</div><div class='del'>-	/* Skip already processed frames. */</div><div class='del'>-	while (nfrms &lt; cfhsi-&gt;rx_state.nfrms) {</div><div class='del'>-		pfrm += *plen;</div><div class='del'>-		rx_sz += *plen;</div><div class='del'>-		plen++;</div><div class='del'>-		nfrms++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Parse payload. */</div><div class='del'>-	while (nfrms &lt; CFHSI_MAX_PKTS &amp;&amp; *plen) {</div><div class='del'>-		struct sk_buff *skb;</div><div class='del'>-		u8 *dst = NULL;</div><div class='del'>-		u8 *pcffrm = NULL;</div><div class='del'>-		int len;</div><div class='del'>-</div><div class='del'>-		/* CAIF frame starts after head padding. */</div><div class='del'>-		pcffrm = pfrm + *pfrm + 1;</div><div class='del'>-</div><div class='del'>-		/* Read length of CAIF frame (little endian). */</div><div class='del'>-		len = *pcffrm;</div><div class='del'>-		len |= ((*(pcffrm + 1)) &lt;&lt; 8) &amp; 0xFF00;</div><div class='del'>-		len += 2;	/* Add FCS fields. */</div><div class='del'>-</div><div class='del'>-		/* Sanity check length of CAIF frames. */</div><div class='del'>-		if (unlikely(len &gt; CFHSI_MAX_CAIF_FRAME_SZ)) {</div><div class='del'>-			netdev_err(cfhsi-&gt;ndev, "%s: Invalid length.\n",</div><div class='del'>-				__func__);</div><div class='del'>-			return -EPROTO;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Allocate SKB (OK even in IRQ context). */</div><div class='del'>-		skb = alloc_skb(len + 1, GFP_ATOMIC);</div><div class='del'>-		if (!skb) {</div><div class='del'>-			netdev_err(cfhsi-&gt;ndev, "%s: Out of memory !\n",</div><div class='del'>-				__func__);</div><div class='del'>-			cfhsi-&gt;rx_state.nfrms = nfrms;</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-		}</div><div class='del'>-		caif_assert(skb != NULL);</div><div class='del'>-</div><div class='del'>-		dst = skb_put(skb, len);</div><div class='del'>-		memcpy(dst, pcffrm, len);</div><div class='del'>-</div><div class='del'>-		skb-&gt;protocol = htons(ETH_P_CAIF);</div><div class='del'>-		skb_reset_mac_header(skb);</div><div class='del'>-		skb-&gt;dev = cfhsi-&gt;ndev;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * We're called in callback from HSI</div><div class='del'>-		 * and don't know the context we're running in.</div><div class='del'>-		 */</div><div class='del'>-		if (in_interrupt())</div><div class='del'>-			netif_rx(skb);</div><div class='del'>-		else</div><div class='del'>-			netif_rx_ni(skb);</div><div class='del'>-</div><div class='del'>-		/* Update network statistics. */</div><div class='del'>-		cfhsi-&gt;ndev-&gt;stats.rx_packets++;</div><div class='del'>-		cfhsi-&gt;ndev-&gt;stats.rx_bytes += len;</div><div class='del'>-</div><div class='del'>-		pfrm += *plen;</div><div class='del'>-		rx_sz += *plen;</div><div class='del'>-		plen++;</div><div class='del'>-		nfrms++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return rx_sz;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cfhsi_rx_done(struct cfhsi *cfhsi)</div><div class='del'>-{</div><div class='del'>-	int res;</div><div class='del'>-	int desc_pld_len = 0, rx_len, rx_state;</div><div class='del'>-	struct cfhsi_desc *desc = NULL;</div><div class='del'>-	u8 *rx_ptr, *rx_buf;</div><div class='del'>-	struct cfhsi_desc *piggy_desc = NULL;</div><div class='del'>-</div><div class='del'>-	desc = (struct cfhsi_desc *)cfhsi-&gt;rx_buf;</div><div class='del'>-</div><div class='del'>-	netdev_dbg(cfhsi-&gt;ndev, "%s\n", __func__);</div><div class='del'>-</div><div class='del'>-	if (test_bit(CFHSI_SHUTDOWN, &amp;cfhsi-&gt;bits))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* Update inactivity timer if pending. */</div><div class='del'>-	spin_lock_bh(&amp;cfhsi-&gt;lock);</div><div class='del'>-	mod_timer_pending(&amp;cfhsi-&gt;inactivity_timer,</div><div class='del'>-			jiffies + cfhsi-&gt;cfg.inactivity_timeout);</div><div class='del'>-	spin_unlock_bh(&amp;cfhsi-&gt;lock);</div><div class='del'>-</div><div class='del'>-	if (cfhsi-&gt;rx_state.state == CFHSI_RX_STATE_DESC) {</div><div class='del'>-		desc_pld_len = cfhsi_rx_desc_len(desc);</div><div class='del'>-</div><div class='del'>-		if (desc_pld_len &lt; 0)</div><div class='del'>-			goto out_of_sync;</div><div class='del'>-</div><div class='del'>-		rx_buf = cfhsi-&gt;rx_buf;</div><div class='del'>-		rx_len = desc_pld_len;</div><div class='del'>-		if (desc_pld_len &gt; 0 &amp;&amp; (desc-&gt;header &amp; CFHSI_PIGGY_DESC))</div><div class='del'>-			rx_len += CFHSI_DESC_SZ;</div><div class='del'>-		if (desc_pld_len == 0)</div><div class='del'>-			rx_buf = cfhsi-&gt;rx_flip_buf;</div><div class='del'>-	} else {</div><div class='del'>-		rx_buf = cfhsi-&gt;rx_flip_buf;</div><div class='del'>-</div><div class='del'>-		rx_len = CFHSI_DESC_SZ;</div><div class='del'>-		if (cfhsi-&gt;rx_state.pld_len &gt; 0 &amp;&amp;</div><div class='del'>-				(desc-&gt;header &amp; CFHSI_PIGGY_DESC)) {</div><div class='del'>-</div><div class='del'>-			piggy_desc = (struct cfhsi_desc *)</div><div class='del'>-				(desc-&gt;emb_frm + CFHSI_MAX_EMB_FRM_SZ +</div><div class='del'>-						cfhsi-&gt;rx_state.pld_len);</div><div class='del'>-</div><div class='del'>-			cfhsi-&gt;rx_state.piggy_desc = true;</div><div class='del'>-</div><div class='del'>-			/* Extract payload len from piggy-backed descriptor. */</div><div class='del'>-			desc_pld_len = cfhsi_rx_desc_len(piggy_desc);</div><div class='del'>-			if (desc_pld_len &lt; 0)</div><div class='del'>-				goto out_of_sync;</div><div class='del'>-</div><div class='del'>-			if (desc_pld_len &gt; 0) {</div><div class='del'>-				rx_len = desc_pld_len;</div><div class='del'>-				if (piggy_desc-&gt;header &amp; CFHSI_PIGGY_DESC)</div><div class='del'>-					rx_len += CFHSI_DESC_SZ;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			/*</div><div class='del'>-			 * Copy needed information from the piggy-backed</div><div class='del'>-			 * descriptor to the descriptor in the start.</div><div class='del'>-			 */</div><div class='del'>-			memcpy(rx_buf, (u8 *)piggy_desc,</div><div class='del'>-					CFHSI_DESC_SHORT_SZ);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (desc_pld_len) {</div><div class='del'>-		rx_state = CFHSI_RX_STATE_PAYLOAD;</div><div class='del'>-		rx_ptr = rx_buf + CFHSI_DESC_SZ;</div><div class='del'>-	} else {</div><div class='del'>-		rx_state = CFHSI_RX_STATE_DESC;</div><div class='del'>-		rx_ptr = rx_buf;</div><div class='del'>-		rx_len = CFHSI_DESC_SZ;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Initiate next read */</div><div class='del'>-	if (test_bit(CFHSI_AWAKE, &amp;cfhsi-&gt;bits)) {</div><div class='del'>-		/* Set up new transfer. */</div><div class='del'>-		netdev_dbg(cfhsi-&gt;ndev, "%s: Start RX.\n",</div><div class='del'>-				__func__);</div><div class='del'>-</div><div class='del'>-		res = cfhsi-&gt;ops-&gt;cfhsi_rx(rx_ptr, rx_len,</div><div class='del'>-				cfhsi-&gt;ops);</div><div class='del'>-		if (WARN_ON(res &lt; 0)) {</div><div class='del'>-			netdev_err(cfhsi-&gt;ndev, "%s: RX error %d.\n",</div><div class='del'>-				__func__, res);</div><div class='del'>-			cfhsi-&gt;ndev-&gt;stats.rx_errors++;</div><div class='del'>-			cfhsi-&gt;ndev-&gt;stats.rx_dropped++;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (cfhsi-&gt;rx_state.state == CFHSI_RX_STATE_DESC) {</div><div class='del'>-		/* Extract payload from descriptor */</div><div class='del'>-		if (cfhsi_rx_desc(desc, cfhsi) &lt; 0)</div><div class='del'>-			goto out_of_sync;</div><div class='del'>-	} else {</div><div class='del'>-		/* Extract payload */</div><div class='del'>-		if (cfhsi_rx_pld(desc, cfhsi) &lt; 0)</div><div class='del'>-			goto out_of_sync;</div><div class='del'>-		if (piggy_desc) {</div><div class='del'>-			/* Extract any payload in piggyback descriptor. */</div><div class='del'>-			if (cfhsi_rx_desc(piggy_desc, cfhsi) &lt; 0)</div><div class='del'>-				goto out_of_sync;</div><div class='del'>-			/* Mark no embedded frame after extracting it */</div><div class='del'>-			piggy_desc-&gt;offset = 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Update state info */</div><div class='del'>-	memset(&amp;cfhsi-&gt;rx_state, 0, sizeof(cfhsi-&gt;rx_state));</div><div class='del'>-	cfhsi-&gt;rx_state.state = rx_state;</div><div class='del'>-	cfhsi-&gt;rx_ptr = rx_ptr;</div><div class='del'>-	cfhsi-&gt;rx_len = rx_len;</div><div class='del'>-	cfhsi-&gt;rx_state.pld_len = desc_pld_len;</div><div class='del'>-	cfhsi-&gt;rx_state.piggy_desc = desc-&gt;header &amp; CFHSI_PIGGY_DESC;</div><div class='del'>-</div><div class='del'>-	if (rx_buf != cfhsi-&gt;rx_buf)</div><div class='del'>-		swap(cfhsi-&gt;rx_buf, cfhsi-&gt;rx_flip_buf);</div><div class='del'>-	return;</div><div class='del'>-</div><div class='del'>-out_of_sync:</div><div class='del'>-	netdev_err(cfhsi-&gt;ndev, "%s: Out of sync.\n", __func__);</div><div class='del'>-	print_hex_dump_bytes("--&gt; ", DUMP_PREFIX_NONE,</div><div class='del'>-			cfhsi-&gt;rx_buf, CFHSI_DESC_SZ);</div><div class='del'>-	schedule_work(&amp;cfhsi-&gt;out_of_sync_work);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cfhsi_rx_slowpath(unsigned long arg)</div><div class='del'>-{</div><div class='del'>-	struct cfhsi *cfhsi = (struct cfhsi *)arg;</div><div class='del'>-</div><div class='del'>-	netdev_dbg(cfhsi-&gt;ndev, "%s.\n",</div><div class='del'>-		__func__);</div><div class='del'>-</div><div class='del'>-	cfhsi_rx_done(cfhsi);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cfhsi_rx_done_cb(struct cfhsi_cb_ops *cb_ops)</div><div class='del'>-{</div><div class='del'>-	struct cfhsi *cfhsi;</div><div class='del'>-</div><div class='del'>-	cfhsi = container_of(cb_ops, struct cfhsi, cb_ops);</div><div class='del'>-	netdev_dbg(cfhsi-&gt;ndev, "%s.\n",</div><div class='del'>-		__func__);</div><div class='del'>-</div><div class='del'>-	if (test_bit(CFHSI_SHUTDOWN, &amp;cfhsi-&gt;bits))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (test_and_clear_bit(CFHSI_FLUSH_FIFO, &amp;cfhsi-&gt;bits))</div><div class='del'>-		wake_up_interruptible(&amp;cfhsi-&gt;flush_fifo_wait);</div><div class='del'>-	else</div><div class='del'>-		cfhsi_rx_done(cfhsi);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cfhsi_wake_up(struct work_struct *work)</div><div class='del'>-{</div><div class='del'>-	struct cfhsi *cfhsi = NULL;</div><div class='del'>-	int res;</div><div class='del'>-	int len;</div><div class='del'>-	long ret;</div><div class='del'>-</div><div class='del'>-	cfhsi = container_of(work, struct cfhsi, wake_up_work);</div><div class='del'>-</div><div class='del'>-	if (test_bit(CFHSI_SHUTDOWN, &amp;cfhsi-&gt;bits))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (unlikely(test_bit(CFHSI_AWAKE, &amp;cfhsi-&gt;bits))) {</div><div class='del'>-		/* It happenes when wakeup is requested by</div><div class='del'>-		 * both ends at the same time. */</div><div class='del'>-		clear_bit(CFHSI_WAKE_UP, &amp;cfhsi-&gt;bits);</div><div class='del'>-		clear_bit(CFHSI_WAKE_UP_ACK, &amp;cfhsi-&gt;bits);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Activate wake line. */</div><div class='del'>-	cfhsi-&gt;ops-&gt;cfhsi_wake_up(cfhsi-&gt;ops);</div><div class='del'>-</div><div class='del'>-	netdev_dbg(cfhsi-&gt;ndev, "%s: Start waiting.\n",</div><div class='del'>-		__func__);</div><div class='del'>-</div><div class='del'>-	/* Wait for acknowledge. */</div><div class='del'>-	ret = CFHSI_WAKE_TOUT;</div><div class='del'>-	ret = wait_event_interruptible_timeout(cfhsi-&gt;wake_up_wait,</div><div class='del'>-					test_and_clear_bit(CFHSI_WAKE_UP_ACK,</div><div class='del'>-							&amp;cfhsi-&gt;bits), ret);</div><div class='del'>-	if (unlikely(ret &lt; 0)) {</div><div class='del'>-		/* Interrupted by signal. */</div><div class='del'>-		netdev_err(cfhsi-&gt;ndev, "%s: Signalled: %ld.\n",</div><div class='del'>-			__func__, ret);</div><div class='del'>-</div><div class='del'>-		clear_bit(CFHSI_WAKE_UP, &amp;cfhsi-&gt;bits);</div><div class='del'>-		cfhsi-&gt;ops-&gt;cfhsi_wake_down(cfhsi-&gt;ops);</div><div class='del'>-		return;</div><div class='del'>-	} else if (!ret) {</div><div class='del'>-		bool ca_wake = false;</div><div class='del'>-		size_t fifo_occupancy = 0;</div><div class='del'>-</div><div class='del'>-		/* Wakeup timeout */</div><div class='del'>-		netdev_dbg(cfhsi-&gt;ndev, "%s: Timeout.\n",</div><div class='del'>-			__func__);</div><div class='del'>-</div><div class='del'>-		/* Check FIFO to check if modem has sent something. */</div><div class='del'>-		WARN_ON(cfhsi-&gt;ops-&gt;cfhsi_fifo_occupancy(cfhsi-&gt;ops,</div><div class='del'>-					&amp;fifo_occupancy));</div><div class='del'>-</div><div class='del'>-		netdev_dbg(cfhsi-&gt;ndev, "%s: Bytes in FIFO: %u.\n",</div><div class='del'>-				__func__, (unsigned) fifo_occupancy);</div><div class='del'>-</div><div class='del'>-		/* Check if we misssed the interrupt. */</div><div class='del'>-		WARN_ON(cfhsi-&gt;ops-&gt;cfhsi_get_peer_wake(cfhsi-&gt;ops,</div><div class='del'>-							&amp;ca_wake));</div><div class='del'>-</div><div class='del'>-		if (ca_wake) {</div><div class='del'>-			netdev_err(cfhsi-&gt;ndev, "%s: CA Wake missed !.\n",</div><div class='del'>-				__func__);</div><div class='del'>-</div><div class='del'>-			/* Clear the CFHSI_WAKE_UP_ACK bit to prevent race. */</div><div class='del'>-			clear_bit(CFHSI_WAKE_UP_ACK, &amp;cfhsi-&gt;bits);</div><div class='del'>-</div><div class='del'>-			/* Continue execution. */</div><div class='del'>-			goto wake_ack;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		clear_bit(CFHSI_WAKE_UP, &amp;cfhsi-&gt;bits);</div><div class='del'>-		cfhsi-&gt;ops-&gt;cfhsi_wake_down(cfhsi-&gt;ops);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-wake_ack:</div><div class='del'>-	netdev_dbg(cfhsi-&gt;ndev, "%s: Woken.\n",</div><div class='del'>-		__func__);</div><div class='del'>-</div><div class='del'>-	/* Clear power up bit. */</div><div class='del'>-	set_bit(CFHSI_AWAKE, &amp;cfhsi-&gt;bits);</div><div class='del'>-	clear_bit(CFHSI_WAKE_UP, &amp;cfhsi-&gt;bits);</div><div class='del'>-</div><div class='del'>-	/* Resume read operation. */</div><div class='del'>-	netdev_dbg(cfhsi-&gt;ndev, "%s: Start RX.\n", __func__);</div><div class='del'>-	res = cfhsi-&gt;ops-&gt;cfhsi_rx(cfhsi-&gt;rx_ptr, cfhsi-&gt;rx_len, cfhsi-&gt;ops);</div><div class='del'>-</div><div class='del'>-	if (WARN_ON(res &lt; 0))</div><div class='del'>-		netdev_err(cfhsi-&gt;ndev, "%s: RX err %d.\n", __func__, res);</div><div class='del'>-</div><div class='del'>-	/* Clear power up acknowledment. */</div><div class='del'>-	clear_bit(CFHSI_WAKE_UP_ACK, &amp;cfhsi-&gt;bits);</div><div class='del'>-</div><div class='del'>-	spin_lock_bh(&amp;cfhsi-&gt;lock);</div><div class='del'>-</div><div class='del'>-	/* Resume transmit if queues are not empty. */</div><div class='del'>-	if (!cfhsi_tx_queue_len(cfhsi)) {</div><div class='del'>-		netdev_dbg(cfhsi-&gt;ndev, "%s: Peer wake, start timer.\n",</div><div class='del'>-			__func__);</div><div class='del'>-		/* Start inactivity timer. */</div><div class='del'>-		mod_timer(&amp;cfhsi-&gt;inactivity_timer,</div><div class='del'>-				jiffies + cfhsi-&gt;cfg.inactivity_timeout);</div><div class='del'>-		spin_unlock_bh(&amp;cfhsi-&gt;lock);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	netdev_dbg(cfhsi-&gt;ndev, "%s: Host wake.\n",</div><div class='del'>-		__func__);</div><div class='del'>-</div><div class='del'>-	spin_unlock_bh(&amp;cfhsi-&gt;lock);</div><div class='del'>-</div><div class='del'>-	/* Create HSI frame. */</div><div class='del'>-	len = cfhsi_tx_frm((struct cfhsi_desc *)cfhsi-&gt;tx_buf, cfhsi);</div><div class='del'>-</div><div class='del'>-	if (likely(len &gt; 0)) {</div><div class='del'>-		/* Set up new transfer. */</div><div class='del'>-		res = cfhsi-&gt;ops-&gt;cfhsi_tx(cfhsi-&gt;tx_buf, len, cfhsi-&gt;ops);</div><div class='del'>-		if (WARN_ON(res &lt; 0)) {</div><div class='del'>-			netdev_err(cfhsi-&gt;ndev, "%s: TX error %d.\n",</div><div class='del'>-				__func__, res);</div><div class='del'>-			cfhsi_abort_tx(cfhsi);</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		netdev_err(cfhsi-&gt;ndev,</div><div class='del'>-				"%s: Failed to create HSI frame: %d.\n",</div><div class='del'>-				__func__, len);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cfhsi_wake_down(struct work_struct *work)</div><div class='del'>-{</div><div class='del'>-	long ret;</div><div class='del'>-	struct cfhsi *cfhsi = NULL;</div><div class='del'>-	size_t fifo_occupancy = 0;</div><div class='del'>-	int retry = CFHSI_WAKE_TOUT;</div><div class='del'>-</div><div class='del'>-	cfhsi = container_of(work, struct cfhsi, wake_down_work);</div><div class='del'>-	netdev_dbg(cfhsi-&gt;ndev, "%s.\n", __func__);</div><div class='del'>-</div><div class='del'>-	if (test_bit(CFHSI_SHUTDOWN, &amp;cfhsi-&gt;bits))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* Deactivate wake line. */</div><div class='del'>-	cfhsi-&gt;ops-&gt;cfhsi_wake_down(cfhsi-&gt;ops);</div><div class='del'>-</div><div class='del'>-	/* Wait for acknowledge. */</div><div class='del'>-	ret = CFHSI_WAKE_TOUT;</div><div class='del'>-	ret = wait_event_interruptible_timeout(cfhsi-&gt;wake_down_wait,</div><div class='del'>-					test_and_clear_bit(CFHSI_WAKE_DOWN_ACK,</div><div class='del'>-							&amp;cfhsi-&gt;bits), ret);</div><div class='del'>-	if (ret &lt; 0) {</div><div class='del'>-		/* Interrupted by signal. */</div><div class='del'>-		netdev_err(cfhsi-&gt;ndev, "%s: Signalled: %ld.\n",</div><div class='del'>-			__func__, ret);</div><div class='del'>-		return;</div><div class='del'>-	} else if (!ret) {</div><div class='del'>-		bool ca_wake = true;</div><div class='del'>-</div><div class='del'>-		/* Timeout */</div><div class='del'>-		netdev_err(cfhsi-&gt;ndev, "%s: Timeout.\n", __func__);</div><div class='del'>-</div><div class='del'>-		/* Check if we misssed the interrupt. */</div><div class='del'>-		WARN_ON(cfhsi-&gt;ops-&gt;cfhsi_get_peer_wake(cfhsi-&gt;ops,</div><div class='del'>-							&amp;ca_wake));</div><div class='del'>-		if (!ca_wake)</div><div class='del'>-			netdev_err(cfhsi-&gt;ndev, "%s: CA Wake missed !.\n",</div><div class='del'>-				__func__);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Check FIFO occupancy. */</div><div class='del'>-	while (retry) {</div><div class='del'>-		WARN_ON(cfhsi-&gt;ops-&gt;cfhsi_fifo_occupancy(cfhsi-&gt;ops,</div><div class='del'>-							&amp;fifo_occupancy));</div><div class='del'>-</div><div class='del'>-		if (!fifo_occupancy)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		set_current_state(TASK_INTERRUPTIBLE);</div><div class='del'>-		schedule_timeout(1);</div><div class='del'>-		retry--;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!retry)</div><div class='del'>-		netdev_err(cfhsi-&gt;ndev, "%s: FIFO Timeout.\n", __func__);</div><div class='del'>-</div><div class='del'>-	/* Clear AWAKE condition. */</div><div class='del'>-	clear_bit(CFHSI_AWAKE, &amp;cfhsi-&gt;bits);</div><div class='del'>-</div><div class='del'>-	/* Cancel pending RX requests. */</div><div class='del'>-	cfhsi-&gt;ops-&gt;cfhsi_rx_cancel(cfhsi-&gt;ops);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cfhsi_out_of_sync(struct work_struct *work)</div><div class='del'>-{</div><div class='del'>-	struct cfhsi *cfhsi = NULL;</div><div class='del'>-</div><div class='del'>-	cfhsi = container_of(work, struct cfhsi, out_of_sync_work);</div><div class='del'>-</div><div class='del'>-	rtnl_lock();</div><div class='del'>-	dev_close(cfhsi-&gt;ndev);</div><div class='del'>-	rtnl_unlock();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cfhsi_wake_up_cb(struct cfhsi_cb_ops *cb_ops)</div><div class='del'>-{</div><div class='del'>-	struct cfhsi *cfhsi = NULL;</div><div class='del'>-</div><div class='del'>-	cfhsi = container_of(cb_ops, struct cfhsi, cb_ops);</div><div class='del'>-	netdev_dbg(cfhsi-&gt;ndev, "%s.\n",</div><div class='del'>-		__func__);</div><div class='del'>-</div><div class='del'>-	set_bit(CFHSI_WAKE_UP_ACK, &amp;cfhsi-&gt;bits);</div><div class='del'>-	wake_up_interruptible(&amp;cfhsi-&gt;wake_up_wait);</div><div class='del'>-</div><div class='del'>-	if (test_bit(CFHSI_SHUTDOWN, &amp;cfhsi-&gt;bits))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* Schedule wake up work queue if the peer initiates. */</div><div class='del'>-	if (!test_and_set_bit(CFHSI_WAKE_UP, &amp;cfhsi-&gt;bits))</div><div class='del'>-		queue_work(cfhsi-&gt;wq, &amp;cfhsi-&gt;wake_up_work);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cfhsi_wake_down_cb(struct cfhsi_cb_ops *cb_ops)</div><div class='del'>-{</div><div class='del'>-	struct cfhsi *cfhsi = NULL;</div><div class='del'>-</div><div class='del'>-	cfhsi = container_of(cb_ops, struct cfhsi, cb_ops);</div><div class='del'>-	netdev_dbg(cfhsi-&gt;ndev, "%s.\n",</div><div class='del'>-		__func__);</div><div class='del'>-</div><div class='del'>-	/* Initiating low power is only permitted by the host (us). */</div><div class='del'>-	set_bit(CFHSI_WAKE_DOWN_ACK, &amp;cfhsi-&gt;bits);</div><div class='del'>-	wake_up_interruptible(&amp;cfhsi-&gt;wake_down_wait);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cfhsi_aggregation_tout(unsigned long arg)</div><div class='del'>-{</div><div class='del'>-	struct cfhsi *cfhsi = (struct cfhsi *)arg;</div><div class='del'>-</div><div class='del'>-	netdev_dbg(cfhsi-&gt;ndev, "%s.\n",</div><div class='del'>-		__func__);</div><div class='del'>-</div><div class='del'>-	cfhsi_start_tx(cfhsi);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int cfhsi_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct cfhsi *cfhsi = NULL;</div><div class='del'>-	int start_xfer = 0;</div><div class='del'>-	int timer_active;</div><div class='del'>-	int prio;</div><div class='del'>-</div><div class='del'>-	if (!dev)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	cfhsi = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	switch (skb-&gt;priority) {</div><div class='del'>-	case TC_PRIO_BESTEFFORT:</div><div class='del'>-	case TC_PRIO_FILLER:</div><div class='del'>-	case TC_PRIO_BULK:</div><div class='del'>-		prio = CFHSI_PRIO_BEBK;</div><div class='del'>-		break;</div><div class='del'>-	case TC_PRIO_INTERACTIVE_BULK:</div><div class='del'>-		prio = CFHSI_PRIO_VI;</div><div class='del'>-		break;</div><div class='del'>-	case TC_PRIO_INTERACTIVE:</div><div class='del'>-		prio = CFHSI_PRIO_VO;</div><div class='del'>-		break;</div><div class='del'>-	case TC_PRIO_CONTROL:</div><div class='del'>-	default:</div><div class='del'>-		prio = CFHSI_PRIO_CTL;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	spin_lock_bh(&amp;cfhsi-&gt;lock);</div><div class='del'>-</div><div class='del'>-	/* Update aggregation statistics  */</div><div class='del'>-	cfhsi_update_aggregation_stats(cfhsi, skb, 1);</div><div class='del'>-</div><div class='del'>-	/* Queue the SKB */</div><div class='del'>-	skb_queue_tail(&amp;cfhsi-&gt;qhead[prio], skb);</div><div class='del'>-</div><div class='del'>-	/* Sanity check; xmit should not be called after unregister_netdev */</div><div class='del'>-	if (WARN_ON(test_bit(CFHSI_SHUTDOWN, &amp;cfhsi-&gt;bits))) {</div><div class='del'>-		spin_unlock_bh(&amp;cfhsi-&gt;lock);</div><div class='del'>-		cfhsi_abort_tx(cfhsi);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Send flow off if number of packets is above high water mark. */</div><div class='del'>-	if (!cfhsi-&gt;flow_off_sent &amp;&amp;</div><div class='del'>-		cfhsi_tx_queue_len(cfhsi) &gt; cfhsi-&gt;cfg.q_high_mark &amp;&amp;</div><div class='del'>-		cfhsi-&gt;cfdev.flowctrl) {</div><div class='del'>-		cfhsi-&gt;flow_off_sent = 1;</div><div class='del'>-		cfhsi-&gt;cfdev.flowctrl(cfhsi-&gt;ndev, OFF);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (cfhsi-&gt;tx_state == CFHSI_TX_STATE_IDLE) {</div><div class='del'>-		cfhsi-&gt;tx_state = CFHSI_TX_STATE_XFER;</div><div class='del'>-		start_xfer = 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!start_xfer) {</div><div class='del'>-		/* Send aggregate if it is possible */</div><div class='del'>-		bool aggregate_ready =</div><div class='del'>-			cfhsi_can_send_aggregate(cfhsi) &amp;&amp;</div><div class='del'>-			del_timer(&amp;cfhsi-&gt;aggregation_timer) &gt; 0;</div><div class='del'>-		spin_unlock_bh(&amp;cfhsi-&gt;lock);</div><div class='del'>-		if (aggregate_ready)</div><div class='del'>-			cfhsi_start_tx(cfhsi);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Delete inactivity timer if started. */</div><div class='del'>-	timer_active = del_timer_sync(&amp;cfhsi-&gt;inactivity_timer);</div><div class='del'>-</div><div class='del'>-	spin_unlock_bh(&amp;cfhsi-&gt;lock);</div><div class='del'>-</div><div class='del'>-	if (timer_active) {</div><div class='del'>-		struct cfhsi_desc *desc = (struct cfhsi_desc *)cfhsi-&gt;tx_buf;</div><div class='del'>-		int len;</div><div class='del'>-		int res;</div><div class='del'>-</div><div class='del'>-		/* Create HSI frame. */</div><div class='del'>-		len = cfhsi_tx_frm(desc, cfhsi);</div><div class='del'>-		WARN_ON(!len);</div><div class='del'>-</div><div class='del'>-		/* Set up new transfer. */</div><div class='del'>-		res = cfhsi-&gt;ops-&gt;cfhsi_tx(cfhsi-&gt;tx_buf, len, cfhsi-&gt;ops);</div><div class='del'>-		if (WARN_ON(res &lt; 0)) {</div><div class='del'>-			netdev_err(cfhsi-&gt;ndev, "%s: TX error %d.\n",</div><div class='del'>-				__func__, res);</div><div class='del'>-			cfhsi_abort_tx(cfhsi);</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		/* Schedule wake up work queue if the we initiate. */</div><div class='del'>-		if (!test_and_set_bit(CFHSI_WAKE_UP, &amp;cfhsi-&gt;bits))</div><div class='del'>-			queue_work(cfhsi-&gt;wq, &amp;cfhsi-&gt;wake_up_work);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct net_device_ops cfhsi_netdevops;</div><div class='del'>-</div><div class='del'>-static void cfhsi_setup(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	struct cfhsi *cfhsi = netdev_priv(dev);</div><div class='del'>-	dev-&gt;features = 0;</div><div class='del'>-	dev-&gt;type = ARPHRD_CAIF;</div><div class='del'>-	dev-&gt;flags = IFF_POINTOPOINT | IFF_NOARP;</div><div class='del'>-	dev-&gt;mtu = CFHSI_MAX_CAIF_FRAME_SZ;</div><div class='del'>-	dev-&gt;tx_queue_len = 0;</div><div class='del'>-	dev-&gt;destructor = free_netdev;</div><div class='del'>-	dev-&gt;netdev_ops = &amp;cfhsi_netdevops;</div><div class='del'>-	for (i = 0; i &lt; CFHSI_PRIO_LAST; ++i)</div><div class='del'>-		skb_queue_head_init(&amp;cfhsi-&gt;qhead[i]);</div><div class='del'>-	cfhsi-&gt;cfdev.link_select = CAIF_LINK_HIGH_BANDW;</div><div class='del'>-	cfhsi-&gt;cfdev.use_frag = false;</div><div class='del'>-	cfhsi-&gt;cfdev.use_stx = false;</div><div class='del'>-	cfhsi-&gt;cfdev.use_fcs = false;</div><div class='del'>-	cfhsi-&gt;ndev = dev;</div><div class='del'>-	cfhsi-&gt;cfg = hsi_default_config;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int cfhsi_open(struct net_device *ndev)</div><div class='del'>-{</div><div class='del'>-	struct cfhsi *cfhsi = netdev_priv(ndev);</div><div class='del'>-	int res;</div><div class='del'>-</div><div class='del'>-	clear_bit(CFHSI_SHUTDOWN, &amp;cfhsi-&gt;bits);</div><div class='del'>-</div><div class='del'>-	/* Initialize state vaiables. */</div><div class='del'>-	cfhsi-&gt;tx_state = CFHSI_TX_STATE_IDLE;</div><div class='del'>-	cfhsi-&gt;rx_state.state = CFHSI_RX_STATE_DESC;</div><div class='del'>-</div><div class='del'>-	/* Set flow info */</div><div class='del'>-	cfhsi-&gt;flow_off_sent = 0;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Allocate a TX buffer with the size of a HSI packet descriptors</div><div class='del'>-	 * and the necessary room for CAIF payload frames.</div><div class='del'>-	 */</div><div class='del'>-	cfhsi-&gt;tx_buf = kzalloc(CFHSI_BUF_SZ_TX, GFP_KERNEL);</div><div class='del'>-	if (!cfhsi-&gt;tx_buf) {</div><div class='del'>-		res = -ENODEV;</div><div class='del'>-		goto err_alloc_tx;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Allocate a RX buffer with the size of two HSI packet descriptors and</div><div class='del'>-	 * the necessary room for CAIF payload frames.</div><div class='del'>-	 */</div><div class='del'>-	cfhsi-&gt;rx_buf = kzalloc(CFHSI_BUF_SZ_RX, GFP_KERNEL);</div><div class='del'>-	if (!cfhsi-&gt;rx_buf) {</div><div class='del'>-		res = -ENODEV;</div><div class='del'>-		goto err_alloc_rx;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	cfhsi-&gt;rx_flip_buf = kzalloc(CFHSI_BUF_SZ_RX, GFP_KERNEL);</div><div class='del'>-	if (!cfhsi-&gt;rx_flip_buf) {</div><div class='del'>-		res = -ENODEV;</div><div class='del'>-		goto err_alloc_rx_flip;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Initialize aggregation timeout */</div><div class='del'>-	cfhsi-&gt;cfg.aggregation_timeout = hsi_default_config.aggregation_timeout;</div><div class='del'>-</div><div class='del'>-	/* Initialize recieve vaiables. */</div><div class='del'>-	cfhsi-&gt;rx_ptr = cfhsi-&gt;rx_buf;</div><div class='del'>-	cfhsi-&gt;rx_len = CFHSI_DESC_SZ;</div><div class='del'>-</div><div class='del'>-	/* Initialize spin locks. */</div><div class='del'>-	spin_lock_init(&amp;cfhsi-&gt;lock);</div><div class='del'>-</div><div class='del'>-	/* Set up the driver. */</div><div class='del'>-	cfhsi-&gt;cb_ops.tx_done_cb = cfhsi_tx_done_cb;</div><div class='del'>-	cfhsi-&gt;cb_ops.rx_done_cb = cfhsi_rx_done_cb;</div><div class='del'>-	cfhsi-&gt;cb_ops.wake_up_cb = cfhsi_wake_up_cb;</div><div class='del'>-	cfhsi-&gt;cb_ops.wake_down_cb = cfhsi_wake_down_cb;</div><div class='del'>-</div><div class='del'>-	/* Initialize the work queues. */</div><div class='del'>-	INIT_WORK(&amp;cfhsi-&gt;wake_up_work, cfhsi_wake_up);</div><div class='del'>-	INIT_WORK(&amp;cfhsi-&gt;wake_down_work, cfhsi_wake_down);</div><div class='del'>-	INIT_WORK(&amp;cfhsi-&gt;out_of_sync_work, cfhsi_out_of_sync);</div><div class='del'>-</div><div class='del'>-	/* Clear all bit fields. */</div><div class='del'>-	clear_bit(CFHSI_WAKE_UP_ACK, &amp;cfhsi-&gt;bits);</div><div class='del'>-	clear_bit(CFHSI_WAKE_DOWN_ACK, &amp;cfhsi-&gt;bits);</div><div class='del'>-	clear_bit(CFHSI_WAKE_UP, &amp;cfhsi-&gt;bits);</div><div class='del'>-	clear_bit(CFHSI_AWAKE, &amp;cfhsi-&gt;bits);</div><div class='del'>-</div><div class='del'>-	/* Create work thread. */</div><div class='del'>-	cfhsi-&gt;wq = create_singlethread_workqueue(cfhsi-&gt;ndev-&gt;name);</div><div class='del'>-	if (!cfhsi-&gt;wq) {</div><div class='del'>-		netdev_err(cfhsi-&gt;ndev, "%s: Failed to create work queue.\n",</div><div class='del'>-			__func__);</div><div class='del'>-		res = -ENODEV;</div><div class='del'>-		goto err_create_wq;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Initialize wait queues. */</div><div class='del'>-	init_waitqueue_head(&amp;cfhsi-&gt;wake_up_wait);</div><div class='del'>-	init_waitqueue_head(&amp;cfhsi-&gt;wake_down_wait);</div><div class='del'>-	init_waitqueue_head(&amp;cfhsi-&gt;flush_fifo_wait);</div><div class='del'>-</div><div class='del'>-	/* Setup the inactivity timer. */</div><div class='del'>-	init_timer(&amp;cfhsi-&gt;inactivity_timer);</div><div class='del'>-	cfhsi-&gt;inactivity_timer.data = (unsigned long)cfhsi;</div><div class='del'>-	cfhsi-&gt;inactivity_timer.function = cfhsi_inactivity_tout;</div><div class='del'>-	/* Setup the slowpath RX timer. */</div><div class='del'>-	init_timer(&amp;cfhsi-&gt;rx_slowpath_timer);</div><div class='del'>-	cfhsi-&gt;rx_slowpath_timer.data = (unsigned long)cfhsi;</div><div class='del'>-	cfhsi-&gt;rx_slowpath_timer.function = cfhsi_rx_slowpath;</div><div class='del'>-	/* Setup the aggregation timer. */</div><div class='del'>-	init_timer(&amp;cfhsi-&gt;aggregation_timer);</div><div class='del'>-	cfhsi-&gt;aggregation_timer.data = (unsigned long)cfhsi;</div><div class='del'>-	cfhsi-&gt;aggregation_timer.function = cfhsi_aggregation_tout;</div><div class='del'>-</div><div class='del'>-	/* Activate HSI interface. */</div><div class='del'>-	res = cfhsi-&gt;ops-&gt;cfhsi_up(cfhsi-&gt;ops);</div><div class='del'>-	if (res) {</div><div class='del'>-		netdev_err(cfhsi-&gt;ndev,</div><div class='del'>-			"%s: can't activate HSI interface: %d.\n",</div><div class='del'>-			__func__, res);</div><div class='del'>-		goto err_activate;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Flush FIFO */</div><div class='del'>-	res = cfhsi_flush_fifo(cfhsi);</div><div class='del'>-	if (res) {</div><div class='del'>-		netdev_err(cfhsi-&gt;ndev, "%s: Can't flush FIFO: %d.\n",</div><div class='del'>-			__func__, res);</div><div class='del'>-		goto err_net_reg;</div><div class='del'>-	}</div><div class='del'>-	return res;</div><div class='del'>-</div><div class='del'>- err_net_reg:</div><div class='del'>-	cfhsi-&gt;ops-&gt;cfhsi_down(cfhsi-&gt;ops);</div><div class='del'>- err_activate:</div><div class='del'>-	destroy_workqueue(cfhsi-&gt;wq);</div><div class='del'>- err_create_wq:</div><div class='del'>-	kfree(cfhsi-&gt;rx_flip_buf);</div><div class='del'>- err_alloc_rx_flip:</div><div class='del'>-	kfree(cfhsi-&gt;rx_buf);</div><div class='del'>- err_alloc_rx:</div><div class='del'>-	kfree(cfhsi-&gt;tx_buf);</div><div class='del'>- err_alloc_tx:</div><div class='del'>-	return res;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int cfhsi_close(struct net_device *ndev)</div><div class='del'>-{</div><div class='del'>-	struct cfhsi *cfhsi = netdev_priv(ndev);</div><div class='del'>-	u8 *tx_buf, *rx_buf, *flip_buf;</div><div class='del'>-</div><div class='del'>-	/* going to shutdown driver */</div><div class='del'>-	set_bit(CFHSI_SHUTDOWN, &amp;cfhsi-&gt;bits);</div><div class='del'>-</div><div class='del'>-	/* Flush workqueue */</div><div class='del'>-	flush_workqueue(cfhsi-&gt;wq);</div><div class='del'>-</div><div class='del'>-	/* Delete timers if pending */</div><div class='del'>-	del_timer_sync(&amp;cfhsi-&gt;inactivity_timer);</div><div class='del'>-	del_timer_sync(&amp;cfhsi-&gt;rx_slowpath_timer);</div><div class='del'>-	del_timer_sync(&amp;cfhsi-&gt;aggregation_timer);</div><div class='del'>-</div><div class='del'>-	/* Cancel pending RX request (if any) */</div><div class='del'>-	cfhsi-&gt;ops-&gt;cfhsi_rx_cancel(cfhsi-&gt;ops);</div><div class='del'>-</div><div class='del'>-	/* Destroy workqueue */</div><div class='del'>-	destroy_workqueue(cfhsi-&gt;wq);</div><div class='del'>-</div><div class='del'>-	/* Store bufferes: will be freed later. */</div><div class='del'>-	tx_buf = cfhsi-&gt;tx_buf;</div><div class='del'>-	rx_buf = cfhsi-&gt;rx_buf;</div><div class='del'>-	flip_buf = cfhsi-&gt;rx_flip_buf;</div><div class='del'>-	/* Flush transmit queues. */</div><div class='del'>-	cfhsi_abort_tx(cfhsi);</div><div class='del'>-</div><div class='del'>-	/* Deactivate interface */</div><div class='del'>-	cfhsi-&gt;ops-&gt;cfhsi_down(cfhsi-&gt;ops);</div><div class='del'>-</div><div class='del'>-	/* Free buffers. */</div><div class='del'>-	kfree(tx_buf);</div><div class='del'>-	kfree(rx_buf);</div><div class='del'>-	kfree(flip_buf);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cfhsi_uninit(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct cfhsi *cfhsi = netdev_priv(dev);</div><div class='del'>-	ASSERT_RTNL();</div><div class='del'>-	symbol_put(cfhsi_get_device);</div><div class='del'>-	list_del(&amp;cfhsi-&gt;list);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct net_device_ops cfhsi_netdevops = {</div><div class='del'>-	.ndo_uninit = cfhsi_uninit,</div><div class='del'>-	.ndo_open = cfhsi_open,</div><div class='del'>-	.ndo_stop = cfhsi_close,</div><div class='del'>-	.ndo_start_xmit = cfhsi_xmit</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void cfhsi_netlink_parms(struct nlattr *data[], struct cfhsi *cfhsi)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	if (!data) {</div><div class='del'>-		pr_debug("no params data found\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	i = __IFLA_CAIF_HSI_INACTIVITY_TOUT;</div><div class='del'>-	/*</div><div class='del'>-	 * Inactivity timeout in millisecs. Lowest possible value is 1,</div><div class='del'>-	 * and highest possible is NEXT_TIMER_MAX_DELTA.</div><div class='del'>-	 */</div><div class='del'>-	if (data[i]) {</div><div class='del'>-		u32 inactivity_timeout = nla_get_u32(data[i]);</div><div class='del'>-		/* Pre-calculate inactivity timeout. */</div><div class='del'>-		cfhsi-&gt;cfg.inactivity_timeout =	inactivity_timeout * HZ / 1000;</div><div class='del'>-		if (cfhsi-&gt;cfg.inactivity_timeout == 0)</div><div class='del'>-			cfhsi-&gt;cfg.inactivity_timeout = 1;</div><div class='del'>-		else if (cfhsi-&gt;cfg.inactivity_timeout &gt; NEXT_TIMER_MAX_DELTA)</div><div class='del'>-			cfhsi-&gt;cfg.inactivity_timeout = NEXT_TIMER_MAX_DELTA;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	i = __IFLA_CAIF_HSI_AGGREGATION_TOUT;</div><div class='del'>-	if (data[i])</div><div class='del'>-		cfhsi-&gt;cfg.aggregation_timeout = nla_get_u32(data[i]);</div><div class='del'>-</div><div class='del'>-	i = __IFLA_CAIF_HSI_HEAD_ALIGN;</div><div class='del'>-	if (data[i])</div><div class='del'>-		cfhsi-&gt;cfg.head_align = nla_get_u32(data[i]);</div><div class='del'>-</div><div class='del'>-	i = __IFLA_CAIF_HSI_TAIL_ALIGN;</div><div class='del'>-	if (data[i])</div><div class='del'>-		cfhsi-&gt;cfg.tail_align = nla_get_u32(data[i]);</div><div class='del'>-</div><div class='del'>-	i = __IFLA_CAIF_HSI_QHIGH_WATERMARK;</div><div class='del'>-	if (data[i])</div><div class='del'>-		cfhsi-&gt;cfg.q_high_mark = nla_get_u32(data[i]);</div><div class='del'>-</div><div class='del'>-	i = __IFLA_CAIF_HSI_QLOW_WATERMARK;</div><div class='del'>-	if (data[i])</div><div class='del'>-		cfhsi-&gt;cfg.q_low_mark = nla_get_u32(data[i]);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int caif_hsi_changelink(struct net_device *dev, struct nlattr *tb[],</div><div class='del'>-				struct nlattr *data[])</div><div class='del'>-{</div><div class='del'>-	cfhsi_netlink_parms(data, netdev_priv(dev));</div><div class='del'>-	netdev_state_change(dev);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct nla_policy caif_hsi_policy[__IFLA_CAIF_HSI_MAX + 1] = {</div><div class='del'>-	[__IFLA_CAIF_HSI_INACTIVITY_TOUT] = { .type = NLA_U32, .len = 4 },</div><div class='del'>-	[__IFLA_CAIF_HSI_AGGREGATION_TOUT] = { .type = NLA_U32, .len = 4 },</div><div class='del'>-	[__IFLA_CAIF_HSI_HEAD_ALIGN] = { .type = NLA_U32, .len = 4 },</div><div class='del'>-	[__IFLA_CAIF_HSI_TAIL_ALIGN] = { .type = NLA_U32, .len = 4 },</div><div class='del'>-	[__IFLA_CAIF_HSI_QHIGH_WATERMARK] = { .type = NLA_U32, .len = 4 },</div><div class='del'>-	[__IFLA_CAIF_HSI_QLOW_WATERMARK] = { .type = NLA_U32, .len = 4 },</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static size_t caif_hsi_get_size(const struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	size_t s = 0;</div><div class='del'>-	for (i = __IFLA_CAIF_HSI_UNSPEC + 1; i &lt; __IFLA_CAIF_HSI_MAX; i++)</div><div class='del'>-		s += nla_total_size(caif_hsi_policy[i].len);</div><div class='del'>-	return s;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int caif_hsi_fill_info(struct sk_buff *skb, const struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct cfhsi *cfhsi = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	if (nla_put_u32(skb, __IFLA_CAIF_HSI_INACTIVITY_TOUT,</div><div class='del'>-			cfhsi-&gt;cfg.inactivity_timeout) ||</div><div class='del'>-	    nla_put_u32(skb, __IFLA_CAIF_HSI_AGGREGATION_TOUT,</div><div class='del'>-			cfhsi-&gt;cfg.aggregation_timeout) ||</div><div class='del'>-	    nla_put_u32(skb, __IFLA_CAIF_HSI_HEAD_ALIGN,</div><div class='del'>-			cfhsi-&gt;cfg.head_align) ||</div><div class='del'>-	    nla_put_u32(skb, __IFLA_CAIF_HSI_TAIL_ALIGN,</div><div class='del'>-			cfhsi-&gt;cfg.tail_align) ||</div><div class='del'>-	    nla_put_u32(skb, __IFLA_CAIF_HSI_QHIGH_WATERMARK,</div><div class='del'>-			cfhsi-&gt;cfg.q_high_mark) ||</div><div class='del'>-	    nla_put_u32(skb, __IFLA_CAIF_HSI_QLOW_WATERMARK,</div><div class='del'>-			cfhsi-&gt;cfg.q_low_mark))</div><div class='del'>-		return -EMSGSIZE;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int caif_hsi_newlink(struct net *src_net, struct net_device *dev,</div><div class='del'>-			  struct nlattr *tb[], struct nlattr *data[])</div><div class='del'>-{</div><div class='del'>-	struct cfhsi *cfhsi = NULL;</div><div class='del'>-	struct cfhsi_ops *(*get_ops)(void);</div><div class='del'>-</div><div class='del'>-	ASSERT_RTNL();</div><div class='del'>-</div><div class='del'>-	cfhsi = netdev_priv(dev);</div><div class='del'>-	cfhsi_netlink_parms(data, cfhsi);</div><div class='del'>-</div><div class='del'>-	get_ops = symbol_get(cfhsi_get_ops);</div><div class='del'>-	if (!get_ops) {</div><div class='del'>-		pr_err("%s: failed to get the cfhsi_ops\n", __func__);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Assign the HSI device. */</div><div class='del'>-	cfhsi-&gt;ops = (*get_ops)();</div><div class='del'>-	if (!cfhsi-&gt;ops) {</div><div class='del'>-		pr_err("%s: failed to get the cfhsi_ops\n", __func__);</div><div class='del'>-		goto err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Assign the driver to this HSI device. */</div><div class='del'>-	cfhsi-&gt;ops-&gt;cb_ops = &amp;cfhsi-&gt;cb_ops;</div><div class='del'>-	if (register_netdevice(dev)) {</div><div class='del'>-		pr_warn("%s: caif_hsi device registration failed\n", __func__);</div><div class='del'>-		goto err;</div><div class='del'>-	}</div><div class='del'>-	/* Add CAIF HSI device to list. */</div><div class='del'>-	list_add_tail(&amp;cfhsi-&gt;list, &amp;cfhsi_list);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-err:</div><div class='del'>-	symbol_put(cfhsi_get_ops);</div><div class='del'>-	return -ENODEV;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct rtnl_link_ops caif_hsi_link_ops __read_mostly = {</div><div class='del'>-	.kind		= "cfhsi",</div><div class='del'>-	.priv_size	= sizeof(struct cfhsi),</div><div class='del'>-	.setup		= cfhsi_setup,</div><div class='del'>-	.maxtype	= __IFLA_CAIF_HSI_MAX,</div><div class='del'>-	.policy	= caif_hsi_policy,</div><div class='del'>-	.newlink	= caif_hsi_newlink,</div><div class='del'>-	.changelink	= caif_hsi_changelink,</div><div class='del'>-	.get_size	= caif_hsi_get_size,</div><div class='del'>-	.fill_info	= caif_hsi_fill_info,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void __exit cfhsi_exit_module(void)</div><div class='del'>-{</div><div class='del'>-	struct list_head *list_node;</div><div class='del'>-	struct list_head *n;</div><div class='del'>-	struct cfhsi *cfhsi;</div><div class='del'>-</div><div class='del'>-	rtnl_link_unregister(&amp;caif_hsi_link_ops);</div><div class='del'>-</div><div class='del'>-	rtnl_lock();</div><div class='del'>-	list_for_each_safe(list_node, n, &amp;cfhsi_list) {</div><div class='del'>-		cfhsi = list_entry(list_node, struct cfhsi, list);</div><div class='del'>-		unregister_netdev(cfhsi-&gt;ndev);</div><div class='del'>-	}</div><div class='del'>-	rtnl_unlock();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init cfhsi_init_module(void)</div><div class='del'>-{</div><div class='del'>-	return rtnl_link_register(&amp;caif_hsi_link_ops);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(cfhsi_init_module);</div><div class='del'>-module_exit(cfhsi_exit_module);</div><div class='head'>diff --git a/drivers/net/caif/caif_serial.c b/drivers/net/caif/caif_serial.c<br/>index 9da06537237f..c398ac42eae9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/caif/caif_serial.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/caif/caif_serial.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/caif/caif_serial.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/caif/caif_serial.c</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (C) ST-Ericsson AB 2010</div><div class='ctx'>  * Author:	Sjur Brendeland</div><div class='del'>- * License terms: GNU General Public License (GPL) version 2</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/hardirq.h&gt;</div><div class='hunk'>@@ -40,20 +40,20 @@ static LIST_HEAD(ser_list);</div><div class='ctx'> static LIST_HEAD(ser_release_list);</div><div class='ctx'> </div><div class='ctx'> static bool ser_loop;</div><div class='del'>-module_param(ser_loop, bool, S_IRUGO);</div><div class='add'>+module_param(ser_loop, bool, 0444);</div><div class='ctx'> MODULE_PARM_DESC(ser_loop, "Run in simulated loopback mode.");</div><div class='ctx'> </div><div class='ctx'> static bool ser_use_stx = true;</div><div class='del'>-module_param(ser_use_stx, bool, S_IRUGO);</div><div class='add'>+module_param(ser_use_stx, bool, 0444);</div><div class='ctx'> MODULE_PARM_DESC(ser_use_stx, "STX enabled or not.");</div><div class='ctx'> </div><div class='ctx'> static bool ser_use_fcs = true;</div><div class='ctx'> </div><div class='del'>-module_param(ser_use_fcs, bool, S_IRUGO);</div><div class='add'>+module_param(ser_use_fcs, bool, 0444);</div><div class='ctx'> MODULE_PARM_DESC(ser_use_fcs, "FCS enabled or not.");</div><div class='ctx'> </div><div class='ctx'> static int ser_write_chunk = MAX_WRITE_CHUNK;</div><div class='del'>-module_param(ser_write_chunk, int, S_IRUGO);</div><div class='add'>+module_param(ser_write_chunk, int, 0444);</div><div class='ctx'> </div><div class='ctx'> MODULE_PARM_DESC(ser_write_chunk, "Maximum size of data written to UART.");</div><div class='ctx'> </div><div class='hunk'>@@ -87,33 +87,26 @@ static void ldisc_tx_wakeup(struct tty_struct *tty);</div><div class='ctx'> static inline void update_tty_status(struct ser_device *ser)</div><div class='ctx'> {</div><div class='ctx'> 	ser-&gt;tty_status =</div><div class='del'>-		ser-&gt;tty-&gt;stopped &lt;&lt; 5 |</div><div class='del'>-		ser-&gt;tty-&gt;flow_stopped &lt;&lt; 3 |</div><div class='del'>-		ser-&gt;tty-&gt;packet &lt;&lt; 2 |</div><div class='del'>-		ser-&gt;tty-&gt;port-&gt;low_latency &lt;&lt; 1;</div><div class='add'>+		ser-&gt;tty-&gt;flow.stopped &lt;&lt; 5 |</div><div class='add'>+		ser-&gt;tty-&gt;flow.tco_stopped &lt;&lt; 3 |</div><div class='add'>+		ser-&gt;tty-&gt;ctrl.packet &lt;&lt; 2;</div><div class='ctx'> }</div><div class='ctx'> static inline void debugfs_init(struct ser_device *ser, struct tty_struct *tty)</div><div class='ctx'> {</div><div class='del'>-	ser-&gt;debugfs_tty_dir =</div><div class='del'>-			debugfs_create_dir(tty-&gt;name, debugfsdir);</div><div class='del'>-	if (!IS_ERR(ser-&gt;debugfs_tty_dir)) {</div><div class='del'>-		debugfs_create_blob("last_tx_msg", S_IRUSR,</div><div class='del'>-				ser-&gt;debugfs_tty_dir,</div><div class='del'>-				&amp;ser-&gt;tx_blob);</div><div class='add'>+	ser-&gt;debugfs_tty_dir = debugfs_create_dir(tty-&gt;name, debugfsdir);</div><div class='ctx'> </div><div class='del'>-		debugfs_create_blob("last_rx_msg", S_IRUSR,</div><div class='del'>-				ser-&gt;debugfs_tty_dir,</div><div class='del'>-				&amp;ser-&gt;rx_blob);</div><div class='add'>+	debugfs_create_blob("last_tx_msg", 0400, ser-&gt;debugfs_tty_dir,</div><div class='add'>+			    &amp;ser-&gt;tx_blob);</div><div class='ctx'> </div><div class='del'>-		debugfs_create_x32("ser_state", S_IRUSR,</div><div class='del'>-				ser-&gt;debugfs_tty_dir,</div><div class='del'>-				(u32 *)&amp;ser-&gt;state);</div><div class='add'>+	debugfs_create_blob("last_rx_msg", 0400, ser-&gt;debugfs_tty_dir,</div><div class='add'>+			    &amp;ser-&gt;rx_blob);</div><div class='ctx'> </div><div class='del'>-		debugfs_create_x8("tty_status", S_IRUSR,</div><div class='del'>-				ser-&gt;debugfs_tty_dir,</div><div class='del'>-				&amp;ser-&gt;tty_status);</div><div class='add'>+	debugfs_create_xul("ser_state", 0400, ser-&gt;debugfs_tty_dir,</div><div class='add'>+			   &amp;ser-&gt;state);</div><div class='add'>+</div><div class='add'>+	debugfs_create_x8("tty_status", 0400, ser-&gt;debugfs_tty_dir,</div><div class='add'>+			  &amp;ser-&gt;tty_status);</div><div class='ctx'> </div><div class='del'>-	}</div><div class='ctx'> 	ser-&gt;tx_blob.data = ser-&gt;tx_data;</div><div class='ctx'> 	ser-&gt;tx_blob.size = 0;</div><div class='ctx'> 	ser-&gt;rx_blob.data = ser-&gt;rx_data;</div><div class='hunk'>@@ -133,15 +126,6 @@ static inline void debugfs_rx(struct ser_device *ser, const u8 *data, int size)</div><div class='ctx'> 	ser-&gt;rx_blob.data = ser-&gt;rx_data;</div><div class='ctx'> 	ser-&gt;rx_blob.size = size;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-static inline void debugfs_tx(struct ser_device *ser, const u8 *data, int size)</div><div class='del'>-{</div><div class='del'>-	if (size &gt; sizeof(ser-&gt;tx_data))</div><div class='del'>-		size = sizeof(ser-&gt;tx_data);</div><div class='del'>-	memcpy(ser-&gt;tx_data, data, size);</div><div class='del'>-	ser-&gt;tx_blob.data = ser-&gt;tx_data;</div><div class='del'>-	ser-&gt;tx_blob.size = size;</div><div class='del'>-}</div><div class='ctx'> #else</div><div class='ctx'> static inline void debugfs_init(struct ser_device *ser, struct tty_struct *tty)</div><div class='ctx'> {</div><div class='hunk'>@@ -158,20 +142,14 @@ static inline void update_tty_status(struct ser_device *ser)</div><div class='ctx'> static inline void debugfs_rx(struct ser_device *ser, const u8 *data, int size)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-static inline void debugfs_tx(struct ser_device *ser, const u8 *data, int size)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> static void ldisc_receive(struct tty_struct *tty, const u8 *data,</div><div class='del'>-			char *flags, int count)</div><div class='add'>+			  const u8 *flags, size_t count)</div><div class='ctx'> {</div><div class='ctx'> 	struct sk_buff *skb = NULL;</div><div class='ctx'> 	struct ser_device *ser;</div><div class='ctx'> 	int ret;</div><div class='del'>-	u8 *p;</div><div class='ctx'> </div><div class='ctx'> 	ser = tty-&gt;disc_data;</div><div class='ctx'> </div><div class='hunk'>@@ -198,14 +176,13 @@ static void ldisc_receive(struct tty_struct *tty, const u8 *data,</div><div class='ctx'> 	skb = netdev_alloc_skb(ser-&gt;dev, count+1);</div><div class='ctx'> 	if (skb == NULL)</div><div class='ctx'> 		return;</div><div class='del'>-	p = skb_put(skb, count);</div><div class='del'>-	memcpy(p, data, count);</div><div class='add'>+	skb_put_data(skb, data, count);</div><div class='ctx'> </div><div class='ctx'> 	skb-&gt;protocol = htons(ETH_P_CAIF);</div><div class='ctx'> 	skb_reset_mac_header(skb);</div><div class='ctx'> 	debugfs_rx(ser, data, count);</div><div class='ctx'> 	/* Push received packet up the stack. */</div><div class='del'>-	ret = netif_rx_ni(skb);</div><div class='add'>+	ret = netif_rx(skb);</div><div class='ctx'> 	if (!ret) {</div><div class='ctx'> 		ser-&gt;dev-&gt;stats.rx_packets++;</div><div class='ctx'> 		ser-&gt;dev-&gt;stats.rx_bytes += count;</div><div class='hunk'>@@ -259,10 +236,7 @@ static int handle_tx(struct ser_device *ser)</div><div class='ctx'> 		if (skb-&gt;len == 0) {</div><div class='ctx'> 			struct sk_buff *tmp = skb_dequeue(&amp;ser-&gt;head);</div><div class='ctx'> 			WARN_ON(tmp != skb);</div><div class='del'>-			if (in_interrupt())</div><div class='del'>-				dev_kfree_skb_irq(skb);</div><div class='del'>-			else</div><div class='del'>-				kfree_skb(skb);</div><div class='add'>+			dev_consume_skb_any(skb);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Send flow off if queue is empty */</div><div class='hunk'>@@ -277,11 +251,10 @@ error:</div><div class='ctx'> 	return tty_wr;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int caif_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='add'>+static netdev_tx_t caif_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct ser_device *ser;</div><div class='ctx'> </div><div class='del'>-	BUG_ON(dev == NULL);</div><div class='ctx'> 	ser = netdev_priv(dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Send flow off once, on high water mark */</div><div class='hunk'>@@ -357,12 +330,13 @@ static int ldisc_open(struct tty_struct *tty)</div><div class='ctx'> 	ser-&gt;tty = tty_kref_get(tty);</div><div class='ctx'> 	ser-&gt;dev = dev;</div><div class='ctx'> 	debugfs_init(ser, tty);</div><div class='del'>-	tty-&gt;receive_room = N_TTY_BUF_SIZE;</div><div class='add'>+	tty-&gt;receive_room = 4096;</div><div class='ctx'> 	tty-&gt;disc_data = ser;</div><div class='ctx'> 	set_bit(TTY_DO_WRITE_WAKEUP, &amp;tty-&gt;flags);</div><div class='ctx'> 	rtnl_lock();</div><div class='ctx'> 	result = register_netdevice(dev);</div><div class='ctx'> 	if (result) {</div><div class='add'>+		tty_kref_put(tty);</div><div class='ctx'> 		rtnl_unlock();</div><div class='ctx'> 		free_netdev(dev);</div><div class='ctx'> 		return -ENODEV;</div><div class='hunk'>@@ -392,7 +366,7 @@ static void ldisc_close(struct tty_struct *tty)</div><div class='ctx'> /* The line discipline structure. */</div><div class='ctx'> static struct tty_ldisc_ops caif_ldisc = {</div><div class='ctx'> 	.owner =	THIS_MODULE,</div><div class='del'>-	.magic =	TTY_LDISC_MAGIC,</div><div class='add'>+	.num =		N_CAIF,</div><div class='ctx'> 	.name =		"n_caif",</div><div class='ctx'> 	.open =		ldisc_open,</div><div class='ctx'> 	.close =	ldisc_close,</div><div class='hunk'>@@ -400,18 +374,6 @@ static struct tty_ldisc_ops caif_ldisc = {</div><div class='ctx'> 	.write_wakeup =	ldisc_tx_wakeup</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int register_ldisc(void)</div><div class='del'>-{</div><div class='del'>-	int result;</div><div class='del'>-</div><div class='del'>-	result = tty_register_ldisc(N_CAIF, &amp;caif_ldisc);</div><div class='del'>-	if (result &lt; 0) {</div><div class='del'>-		pr_err("cannot register CAIF ldisc=%d err=%d\n", N_CAIF,</div><div class='del'>-			result);</div><div class='del'>-		return result;</div><div class='del'>-	}</div><div class='del'>-	return result;</div><div class='del'>-}</div><div class='ctx'> static const struct net_device_ops netdev_ops = {</div><div class='ctx'> 	.ndo_open = caif_net_open,</div><div class='ctx'> 	.ndo_stop = caif_net_close,</div><div class='hunk'>@@ -427,8 +389,8 @@ static void caifdev_setup(struct net_device *dev)</div><div class='ctx'> 	dev-&gt;type = ARPHRD_CAIF;</div><div class='ctx'> 	dev-&gt;flags = IFF_POINTOPOINT | IFF_NOARP;</div><div class='ctx'> 	dev-&gt;mtu = CAIF_MAX_MTU;</div><div class='del'>-	dev-&gt;tx_queue_len = 0;</div><div class='del'>-	dev-&gt;destructor = free_netdev;</div><div class='add'>+	dev-&gt;priv_flags |= IFF_NO_QUEUE;</div><div class='add'>+	dev-&gt;needs_free_netdev = true;</div><div class='ctx'> 	skb_queue_head_init(&amp;serdev-&gt;head);</div><div class='ctx'> 	serdev-&gt;common.link_select = CAIF_LINK_LOW_LATENCY;</div><div class='ctx'> 	serdev-&gt;common.use_frag = true;</div><div class='hunk'>@@ -454,7 +416,10 @@ static int __init caif_ser_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = register_ldisc();</div><div class='add'>+	ret = tty_register_ldisc(&amp;caif_ldisc);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		pr_err("cannot register CAIF ldisc=%d err=%d\n", N_CAIF, ret);</div><div class='add'>+</div><div class='ctx'> 	debugfsdir = debugfs_create_dir("caif_serial", NULL);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -466,7 +431,7 @@ static void __exit caif_ser_exit(void)</div><div class='ctx'> 	spin_unlock(&amp;ser_lock);</div><div class='ctx'> 	ser_release(NULL);</div><div class='ctx'> 	cancel_work_sync(&amp;ser_release_work);</div><div class='del'>-	tty_unregister_ldisc(N_CAIF);</div><div class='add'>+	tty_unregister_ldisc(&amp;caif_ldisc);</div><div class='ctx'> 	debugfs_remove_recursive(debugfsdir);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/caif/caif_spi.c b/drivers/net/caif/caif_spi.c<br/>deleted file mode 100644<br/>index 72ea9ff9bb9c..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/caif/caif_spi.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/caif/caif_spi.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,871 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) ST-Ericsson AB 2010</div><div class='del'>- * Author:  Daniel Martensson</div><div class='del'>- * License terms: GNU General Public License (GPL) version 2.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/device.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/workqueue.h&gt;</div><div class='del'>-#include &lt;linux/completion.h&gt;</div><div class='del'>-#include &lt;linux/list.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/dma-mapping.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/debugfs.h&gt;</div><div class='del'>-#include &lt;linux/if_arp.h&gt;</div><div class='del'>-#include &lt;net/caif/caif_layer.h&gt;</div><div class='del'>-#include &lt;net/caif/caif_spi.h&gt;</div><div class='del'>-</div><div class='del'>-#ifndef CONFIG_CAIF_SPI_SYNC</div><div class='del'>-#define FLAVOR "Flavour: Vanilla.\n"</div><div class='del'>-#else</div><div class='del'>-#define FLAVOR "Flavour: Master CMD&amp;LEN at start.\n"</div><div class='del'>-#endif /* CONFIG_CAIF_SPI_SYNC */</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_AUTHOR("Daniel Martensson");</div><div class='del'>-MODULE_DESCRIPTION("CAIF SPI driver");</div><div class='del'>-</div><div class='del'>-/* Returns the number of padding bytes for alignment. */</div><div class='del'>-#define PAD_POW2(x, pow) ((((x)&amp;((pow)-1))==0) ? 0 : (((pow)-((x)&amp;((pow)-1)))))</div><div class='del'>-</div><div class='del'>-static bool spi_loop;</div><div class='del'>-module_param(spi_loop, bool, S_IRUGO);</div><div class='del'>-MODULE_PARM_DESC(spi_loop, "SPI running in loopback mode.");</div><div class='del'>-</div><div class='del'>-/* SPI frame alignment. */</div><div class='del'>-module_param(spi_frm_align, int, S_IRUGO);</div><div class='del'>-MODULE_PARM_DESC(spi_frm_align, "SPI frame alignment.");</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * SPI padding options.</div><div class='del'>- * Warning: must be a base of 2 (&amp; operation used) and can not be zero !</div><div class='del'>- */</div><div class='del'>-module_param(spi_up_head_align, int, S_IRUGO);</div><div class='del'>-MODULE_PARM_DESC(spi_up_head_align, "SPI uplink head alignment.");</div><div class='del'>-</div><div class='del'>-module_param(spi_up_tail_align, int, S_IRUGO);</div><div class='del'>-MODULE_PARM_DESC(spi_up_tail_align, "SPI uplink tail alignment.");</div><div class='del'>-</div><div class='del'>-module_param(spi_down_head_align, int, S_IRUGO);</div><div class='del'>-MODULE_PARM_DESC(spi_down_head_align, "SPI downlink head alignment.");</div><div class='del'>-</div><div class='del'>-module_param(spi_down_tail_align, int, S_IRUGO);</div><div class='del'>-MODULE_PARM_DESC(spi_down_tail_align, "SPI downlink tail alignment.");</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_ARM</div><div class='del'>-#define BYTE_HEX_FMT "%02X"</div><div class='del'>-#else</div><div class='del'>-#define BYTE_HEX_FMT "%02hhX"</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#define SPI_MAX_PAYLOAD_SIZE 4096</div><div class='del'>-/*</div><div class='del'>- * Threshold values for the SPI packet queue. Flowcontrol will be asserted</div><div class='del'>- * when the number of packets exceeds HIGH_WATER_MARK. It will not be</div><div class='del'>- * deasserted before the number of packets drops below LOW_WATER_MARK.</div><div class='del'>- */</div><div class='del'>-#define LOW_WATER_MARK   100</div><div class='del'>-#define HIGH_WATER_MARK  (LOW_WATER_MARK*5)</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_UML</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * We sometimes use UML for debugging, but it cannot handle</div><div class='del'>- * dma_alloc_coherent so we have to wrap it.</div><div class='del'>- */</div><div class='del'>-static inline void *dma_alloc(dma_addr_t *daddr)</div><div class='del'>-{</div><div class='del'>-	return kmalloc(SPI_DMA_BUF_LEN, GFP_KERNEL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void dma_free(void *cpu_addr, dma_addr_t handle)</div><div class='del'>-{</div><div class='del'>-	kfree(cpu_addr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#else</div><div class='del'>-</div><div class='del'>-static inline void *dma_alloc(dma_addr_t *daddr)</div><div class='del'>-{</div><div class='del'>-	return dma_alloc_coherent(NULL, SPI_DMA_BUF_LEN, daddr,</div><div class='del'>-				GFP_KERNEL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void dma_free(void *cpu_addr, dma_addr_t handle)</div><div class='del'>-{</div><div class='del'>-	dma_free_coherent(NULL, SPI_DMA_BUF_LEN, cpu_addr, handle);</div><div class='del'>-}</div><div class='del'>-#endif	/* CONFIG_UML */</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_DEBUG_FS</div><div class='del'>-</div><div class='del'>-#define DEBUGFS_BUF_SIZE	4096</div><div class='del'>-</div><div class='del'>-static struct dentry *dbgfs_root;</div><div class='del'>-</div><div class='del'>-static inline void driver_debugfs_create(void)</div><div class='del'>-{</div><div class='del'>-	dbgfs_root = debugfs_create_dir(cfspi_spi_driver.driver.name, NULL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void driver_debugfs_remove(void)</div><div class='del'>-{</div><div class='del'>-	debugfs_remove(dbgfs_root);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void dev_debugfs_rem(struct cfspi *cfspi)</div><div class='del'>-{</div><div class='del'>-	debugfs_remove(cfspi-&gt;dbgfs_frame);</div><div class='del'>-	debugfs_remove(cfspi-&gt;dbgfs_state);</div><div class='del'>-	debugfs_remove(cfspi-&gt;dbgfs_dir);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t dbgfs_state(struct file *file, char __user *user_buf,</div><div class='del'>-			   size_t count, loff_t *ppos)</div><div class='del'>-{</div><div class='del'>-	char *buf;</div><div class='del'>-	int len = 0;</div><div class='del'>-	ssize_t size;</div><div class='del'>-	struct cfspi *cfspi = file-&gt;private_data;</div><div class='del'>-</div><div class='del'>-	buf = kzalloc(DEBUGFS_BUF_SIZE, GFP_KERNEL);</div><div class='del'>-	if (!buf)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	/* Print out debug information. */</div><div class='del'>-	len += snprintf((buf + len), (DEBUGFS_BUF_SIZE - len),</div><div class='del'>-			"CAIF SPI debug information:\n");</div><div class='del'>-</div><div class='del'>-	len += snprintf((buf + len), (DEBUGFS_BUF_SIZE - len), FLAVOR);</div><div class='del'>-</div><div class='del'>-	len += snprintf((buf + len), (DEBUGFS_BUF_SIZE - len),</div><div class='del'>-			"STATE: %d\n", cfspi-&gt;dbg_state);</div><div class='del'>-	len += snprintf((buf + len), (DEBUGFS_BUF_SIZE - len),</div><div class='del'>-			"Previous CMD: 0x%x\n", cfspi-&gt;pcmd);</div><div class='del'>-	len += snprintf((buf + len), (DEBUGFS_BUF_SIZE - len),</div><div class='del'>-			"Current CMD: 0x%x\n", cfspi-&gt;cmd);</div><div class='del'>-	len += snprintf((buf + len), (DEBUGFS_BUF_SIZE - len),</div><div class='del'>-			"Previous TX len: %d\n", cfspi-&gt;tx_ppck_len);</div><div class='del'>-	len += snprintf((buf + len), (DEBUGFS_BUF_SIZE - len),</div><div class='del'>-			"Previous RX len: %d\n", cfspi-&gt;rx_ppck_len);</div><div class='del'>-	len += snprintf((buf + len), (DEBUGFS_BUF_SIZE - len),</div><div class='del'>-			"Current TX len: %d\n", cfspi-&gt;tx_cpck_len);</div><div class='del'>-	len += snprintf((buf + len), (DEBUGFS_BUF_SIZE - len),</div><div class='del'>-			"Current RX len: %d\n", cfspi-&gt;rx_cpck_len);</div><div class='del'>-	len += snprintf((buf + len), (DEBUGFS_BUF_SIZE - len),</div><div class='del'>-			"Next TX len: %d\n", cfspi-&gt;tx_npck_len);</div><div class='del'>-	len += snprintf((buf + len), (DEBUGFS_BUF_SIZE - len),</div><div class='del'>-			"Next RX len: %d\n", cfspi-&gt;rx_npck_len);</div><div class='del'>-</div><div class='del'>-	if (len &gt; DEBUGFS_BUF_SIZE)</div><div class='del'>-		len = DEBUGFS_BUF_SIZE;</div><div class='del'>-</div><div class='del'>-	size = simple_read_from_buffer(user_buf, count, ppos, buf, len);</div><div class='del'>-	kfree(buf);</div><div class='del'>-</div><div class='del'>-	return size;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t print_frame(char *buf, size_t size, char *frm,</div><div class='del'>-			   size_t count, size_t cut)</div><div class='del'>-{</div><div class='del'>-	int len = 0;</div><div class='del'>-	int i;</div><div class='del'>-	for (i = 0; i &lt; count; i++) {</div><div class='del'>-		len += snprintf((buf + len), (size - len),</div><div class='del'>-					"[0x" BYTE_HEX_FMT "]",</div><div class='del'>-					frm[i]);</div><div class='del'>-		if ((i == cut) &amp;&amp; (count &gt; (cut * 2))) {</div><div class='del'>-			/* Fast forward. */</div><div class='del'>-			i = count - cut;</div><div class='del'>-			len += snprintf((buf + len), (size - len),</div><div class='del'>-					"--- %u bytes skipped ---\n",</div><div class='del'>-					(int)(count - (cut * 2)));</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if ((!(i % 10)) &amp;&amp; i) {</div><div class='del'>-			len += snprintf((buf + len), (DEBUGFS_BUF_SIZE - len),</div><div class='del'>-					"\n");</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	len += snprintf((buf + len), (DEBUGFS_BUF_SIZE - len), "\n");</div><div class='del'>-	return len;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t dbgfs_frame(struct file *file, char __user *user_buf,</div><div class='del'>-			   size_t count, loff_t *ppos)</div><div class='del'>-{</div><div class='del'>-	char *buf;</div><div class='del'>-	int len = 0;</div><div class='del'>-	ssize_t size;</div><div class='del'>-	struct cfspi *cfspi;</div><div class='del'>-</div><div class='del'>-	cfspi = file-&gt;private_data;</div><div class='del'>-	buf = kzalloc(DEBUGFS_BUF_SIZE, GFP_KERNEL);</div><div class='del'>-	if (!buf)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	/* Print out debug information. */</div><div class='del'>-	len += snprintf((buf + len), (DEBUGFS_BUF_SIZE - len),</div><div class='del'>-			"Current frame:\n");</div><div class='del'>-</div><div class='del'>-	len += snprintf((buf + len), (DEBUGFS_BUF_SIZE - len),</div><div class='del'>-			"Tx data (Len: %d):\n", cfspi-&gt;tx_cpck_len);</div><div class='del'>-</div><div class='del'>-	len += print_frame((buf + len), (DEBUGFS_BUF_SIZE - len),</div><div class='del'>-			   cfspi-&gt;xfer.va_tx[0],</div><div class='del'>-			   (cfspi-&gt;tx_cpck_len + SPI_CMD_SZ), 100);</div><div class='del'>-</div><div class='del'>-	len += snprintf((buf + len), (DEBUGFS_BUF_SIZE - len),</div><div class='del'>-			"Rx data (Len: %d):\n", cfspi-&gt;rx_cpck_len);</div><div class='del'>-</div><div class='del'>-	len += print_frame((buf + len), (DEBUGFS_BUF_SIZE - len),</div><div class='del'>-			   cfspi-&gt;xfer.va_rx,</div><div class='del'>-			   (cfspi-&gt;rx_cpck_len + SPI_CMD_SZ), 100);</div><div class='del'>-</div><div class='del'>-	size = simple_read_from_buffer(user_buf, count, ppos, buf, len);</div><div class='del'>-	kfree(buf);</div><div class='del'>-</div><div class='del'>-	return size;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct file_operations dbgfs_state_fops = {</div><div class='del'>-	.open = simple_open,</div><div class='del'>-	.read = dbgfs_state,</div><div class='del'>-	.owner = THIS_MODULE</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct file_operations dbgfs_frame_fops = {</div><div class='del'>-	.open = simple_open,</div><div class='del'>-	.read = dbgfs_frame,</div><div class='del'>-	.owner = THIS_MODULE</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static inline void dev_debugfs_add(struct cfspi *cfspi)</div><div class='del'>-{</div><div class='del'>-	cfspi-&gt;dbgfs_dir = debugfs_create_dir(cfspi-&gt;pdev-&gt;name, dbgfs_root);</div><div class='del'>-	cfspi-&gt;dbgfs_state = debugfs_create_file("state", S_IRUGO,</div><div class='del'>-						 cfspi-&gt;dbgfs_dir, cfspi,</div><div class='del'>-						 &amp;dbgfs_state_fops);</div><div class='del'>-	cfspi-&gt;dbgfs_frame = debugfs_create_file("frame", S_IRUGO,</div><div class='del'>-						 cfspi-&gt;dbgfs_dir, cfspi,</div><div class='del'>-						 &amp;dbgfs_frame_fops);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-inline void cfspi_dbg_state(struct cfspi *cfspi, int state)</div><div class='del'>-{</div><div class='del'>-	cfspi-&gt;dbg_state = state;</div><div class='del'>-};</div><div class='del'>-#else</div><div class='del'>-</div><div class='del'>-static inline void driver_debugfs_create(void)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void driver_debugfs_remove(void)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void dev_debugfs_add(struct cfspi *cfspi)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void dev_debugfs_rem(struct cfspi *cfspi)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-inline void cfspi_dbg_state(struct cfspi *cfspi, int state)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-#endif				/* CONFIG_DEBUG_FS */</div><div class='del'>-</div><div class='del'>-static LIST_HEAD(cfspi_list);</div><div class='del'>-static spinlock_t cfspi_list_lock;</div><div class='del'>-</div><div class='del'>-/* SPI uplink head alignment. */</div><div class='del'>-static ssize_t show_up_head_align(struct device_driver *driver, char *buf)</div><div class='del'>-{</div><div class='del'>-	return sprintf(buf, "%d\n", spi_up_head_align);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static DRIVER_ATTR(up_head_align, S_IRUSR, show_up_head_align, NULL);</div><div class='del'>-</div><div class='del'>-/* SPI uplink tail alignment. */</div><div class='del'>-static ssize_t show_up_tail_align(struct device_driver *driver, char *buf)</div><div class='del'>-{</div><div class='del'>-	return sprintf(buf, "%d\n", spi_up_tail_align);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static DRIVER_ATTR(up_tail_align, S_IRUSR, show_up_tail_align, NULL);</div><div class='del'>-</div><div class='del'>-/* SPI downlink head alignment. */</div><div class='del'>-static ssize_t show_down_head_align(struct device_driver *driver, char *buf)</div><div class='del'>-{</div><div class='del'>-	return sprintf(buf, "%d\n", spi_down_head_align);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static DRIVER_ATTR(down_head_align, S_IRUSR, show_down_head_align, NULL);</div><div class='del'>-</div><div class='del'>-/* SPI downlink tail alignment. */</div><div class='del'>-static ssize_t show_down_tail_align(struct device_driver *driver, char *buf)</div><div class='del'>-{</div><div class='del'>-	return sprintf(buf, "%d\n", spi_down_tail_align);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static DRIVER_ATTR(down_tail_align, S_IRUSR, show_down_tail_align, NULL);</div><div class='del'>-</div><div class='del'>-/* SPI frame alignment. */</div><div class='del'>-static ssize_t show_frame_align(struct device_driver *driver, char *buf)</div><div class='del'>-{</div><div class='del'>-	return sprintf(buf, "%d\n", spi_frm_align);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static DRIVER_ATTR(frame_align, S_IRUSR, show_frame_align, NULL);</div><div class='del'>-</div><div class='del'>-int cfspi_xmitfrm(struct cfspi *cfspi, u8 *buf, size_t len)</div><div class='del'>-{</div><div class='del'>-	u8 *dst = buf;</div><div class='del'>-	caif_assert(buf);</div><div class='del'>-</div><div class='del'>-	if (cfspi-&gt;slave &amp;&amp; !cfspi-&gt;slave_talked)</div><div class='del'>-		cfspi-&gt;slave_talked = true;</div><div class='del'>-</div><div class='del'>-	do {</div><div class='del'>-		struct sk_buff *skb;</div><div class='del'>-		struct caif_payload_info *info;</div><div class='del'>-		int spad = 0;</div><div class='del'>-		int epad;</div><div class='del'>-</div><div class='del'>-		skb = skb_dequeue(&amp;cfspi-&gt;chead);</div><div class='del'>-		if (!skb)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Calculate length of frame including SPI padding.</div><div class='del'>-		 * The payload position is found in the control buffer.</div><div class='del'>-		 */</div><div class='del'>-		info = (struct caif_payload_info *)&amp;skb-&gt;cb;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Compute head offset i.e. number of bytes to add to</div><div class='del'>-		 * get the start of the payload aligned.</div><div class='del'>-		 */</div><div class='del'>-		if (spi_up_head_align &gt; 1) {</div><div class='del'>-			spad = 1 + PAD_POW2((info-&gt;hdr_len + 1), spi_up_head_align);</div><div class='del'>-			*dst = (u8)(spad - 1);</div><div class='del'>-			dst += spad;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Copy in CAIF frame. */</div><div class='del'>-		skb_copy_bits(skb, 0, dst, skb-&gt;len);</div><div class='del'>-		dst += skb-&gt;len;</div><div class='del'>-		cfspi-&gt;ndev-&gt;stats.tx_packets++;</div><div class='del'>-		cfspi-&gt;ndev-&gt;stats.tx_bytes += skb-&gt;len;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Compute tail offset i.e. number of bytes to add to</div><div class='del'>-		 * get the complete CAIF frame aligned.</div><div class='del'>-		 */</div><div class='del'>-		epad = PAD_POW2((skb-&gt;len + spad), spi_up_tail_align);</div><div class='del'>-		dst += epad;</div><div class='del'>-</div><div class='del'>-		dev_kfree_skb(skb);</div><div class='del'>-</div><div class='del'>-	} while ((dst - buf) &lt; len);</div><div class='del'>-</div><div class='del'>-	return dst - buf;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int cfspi_xmitlen(struct cfspi *cfspi)</div><div class='del'>-{</div><div class='del'>-	struct sk_buff *skb = NULL;</div><div class='del'>-	int frm_len = 0;</div><div class='del'>-	int pkts = 0;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Decommit previously committed frames.</div><div class='del'>-	 * skb_queue_splice_tail(&amp;cfspi-&gt;chead,&amp;cfspi-&gt;qhead)</div><div class='del'>-	 */</div><div class='del'>-	while (skb_peek(&amp;cfspi-&gt;chead)) {</div><div class='del'>-		skb = skb_dequeue_tail(&amp;cfspi-&gt;chead);</div><div class='del'>-		skb_queue_head(&amp;cfspi-&gt;qhead, skb);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	do {</div><div class='del'>-		struct caif_payload_info *info = NULL;</div><div class='del'>-		int spad = 0;</div><div class='del'>-		int epad = 0;</div><div class='del'>-</div><div class='del'>-		skb = skb_dequeue(&amp;cfspi-&gt;qhead);</div><div class='del'>-		if (!skb)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Calculate length of frame including SPI padding.</div><div class='del'>-		 * The payload position is found in the control buffer.</div><div class='del'>-		 */</div><div class='del'>-		info = (struct caif_payload_info *)&amp;skb-&gt;cb;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Compute head offset i.e. number of bytes to add to</div><div class='del'>-		 * get the start of the payload aligned.</div><div class='del'>-		 */</div><div class='del'>-		if (spi_up_head_align &gt; 1)</div><div class='del'>-			spad = 1 + PAD_POW2((info-&gt;hdr_len + 1), spi_up_head_align);</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Compute tail offset i.e. number of bytes to add to</div><div class='del'>-		 * get the complete CAIF frame aligned.</div><div class='del'>-		 */</div><div class='del'>-		epad = PAD_POW2((skb-&gt;len + spad), spi_up_tail_align);</div><div class='del'>-</div><div class='del'>-		if ((skb-&gt;len + spad + epad + frm_len) &lt;= CAIF_MAX_SPI_FRAME) {</div><div class='del'>-			skb_queue_tail(&amp;cfspi-&gt;chead, skb);</div><div class='del'>-			pkts++;</div><div class='del'>-			frm_len += skb-&gt;len + spad + epad;</div><div class='del'>-		} else {</div><div class='del'>-			/* Put back packet. */</div><div class='del'>-			skb_queue_head(&amp;cfspi-&gt;qhead, skb);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	} while (pkts &lt;= CAIF_MAX_SPI_PKTS);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Send flow on if previously sent flow off</div><div class='del'>-	 * and now go below the low water mark</div><div class='del'>-	 */</div><div class='del'>-	if (cfspi-&gt;flow_off_sent &amp;&amp; cfspi-&gt;qhead.qlen &lt; cfspi-&gt;qd_low_mark &amp;&amp;</div><div class='del'>-		cfspi-&gt;cfdev.flowctrl) {</div><div class='del'>-		cfspi-&gt;flow_off_sent = 0;</div><div class='del'>-		cfspi-&gt;cfdev.flowctrl(cfspi-&gt;ndev, 1);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return frm_len;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cfspi_ss_cb(bool assert, struct cfspi_ifc *ifc)</div><div class='del'>-{</div><div class='del'>-	struct cfspi *cfspi = (struct cfspi *)ifc-&gt;priv;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * The slave device is the master on the link. Interrupts before the</div><div class='del'>-	 * slave has transmitted are considered spurious.</div><div class='del'>-	 */</div><div class='del'>-	if (cfspi-&gt;slave &amp;&amp; !cfspi-&gt;slave_talked) {</div><div class='del'>-		printk(KERN_WARNING "CFSPI: Spurious SS interrupt.\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!in_interrupt())</div><div class='del'>-		spin_lock(&amp;cfspi-&gt;lock);</div><div class='del'>-	if (assert) {</div><div class='del'>-		set_bit(SPI_SS_ON, &amp;cfspi-&gt;state);</div><div class='del'>-		set_bit(SPI_XFER, &amp;cfspi-&gt;state);</div><div class='del'>-	} else {</div><div class='del'>-		set_bit(SPI_SS_OFF, &amp;cfspi-&gt;state);</div><div class='del'>-	}</div><div class='del'>-	if (!in_interrupt())</div><div class='del'>-		spin_unlock(&amp;cfspi-&gt;lock);</div><div class='del'>-</div><div class='del'>-	/* Wake up the xfer thread. */</div><div class='del'>-	if (assert)</div><div class='del'>-		wake_up_interruptible(&amp;cfspi-&gt;wait);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cfspi_xfer_done_cb(struct cfspi_ifc *ifc)</div><div class='del'>-{</div><div class='del'>-	struct cfspi *cfspi = (struct cfspi *)ifc-&gt;priv;</div><div class='del'>-</div><div class='del'>-	/* Transfer done, complete work queue */</div><div class='del'>-	complete(&amp;cfspi-&gt;comp);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int cfspi_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct cfspi *cfspi = NULL;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	if (!dev)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	cfspi = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	skb_queue_tail(&amp;cfspi-&gt;qhead, skb);</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;cfspi-&gt;lock, flags);</div><div class='del'>-	if (!test_and_set_bit(SPI_XFER, &amp;cfspi-&gt;state)) {</div><div class='del'>-		/* Wake up xfer thread. */</div><div class='del'>-		wake_up_interruptible(&amp;cfspi-&gt;wait);</div><div class='del'>-	}</div><div class='del'>-	spin_unlock_irqrestore(&amp;cfspi-&gt;lock, flags);</div><div class='del'>-</div><div class='del'>-	/* Send flow off if number of bytes is above high water mark */</div><div class='del'>-	if (!cfspi-&gt;flow_off_sent &amp;&amp;</div><div class='del'>-		cfspi-&gt;qhead.qlen &gt; cfspi-&gt;qd_high_mark &amp;&amp;</div><div class='del'>-		cfspi-&gt;cfdev.flowctrl) {</div><div class='del'>-		cfspi-&gt;flow_off_sent = 1;</div><div class='del'>-		cfspi-&gt;cfdev.flowctrl(cfspi-&gt;ndev, 0);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int cfspi_rxfrm(struct cfspi *cfspi, u8 *buf, size_t len)</div><div class='del'>-{</div><div class='del'>-	u8 *src = buf;</div><div class='del'>-</div><div class='del'>-	caif_assert(buf != NULL);</div><div class='del'>-</div><div class='del'>-	do {</div><div class='del'>-		int res;</div><div class='del'>-		struct sk_buff *skb = NULL;</div><div class='del'>-		int spad = 0;</div><div class='del'>-		int epad = 0;</div><div class='del'>-		u8 *dst = NULL;</div><div class='del'>-		int pkt_len = 0;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Compute head offset i.e. number of bytes added to</div><div class='del'>-		 * get the start of the payload aligned.</div><div class='del'>-		 */</div><div class='del'>-		if (spi_down_head_align &gt; 1) {</div><div class='del'>-			spad = 1 + *src;</div><div class='del'>-			src += spad;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Read length of CAIF frame (little endian). */</div><div class='del'>-		pkt_len = *src;</div><div class='del'>-		pkt_len |= ((*(src+1)) &lt;&lt; 8) &amp; 0xFF00;</div><div class='del'>-		pkt_len += 2;	/* Add FCS fields. */</div><div class='del'>-</div><div class='del'>-		/* Get a suitable caif packet and copy in data. */</div><div class='del'>-</div><div class='del'>-		skb = netdev_alloc_skb(cfspi-&gt;ndev, pkt_len + 1);</div><div class='del'>-		caif_assert(skb != NULL);</div><div class='del'>-</div><div class='del'>-		dst = skb_put(skb, pkt_len);</div><div class='del'>-		memcpy(dst, src, pkt_len);</div><div class='del'>-		src += pkt_len;</div><div class='del'>-</div><div class='del'>-		skb-&gt;protocol = htons(ETH_P_CAIF);</div><div class='del'>-		skb_reset_mac_header(skb);</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Push received packet up the stack.</div><div class='del'>-		 */</div><div class='del'>-		if (!spi_loop)</div><div class='del'>-			res = netif_rx_ni(skb);</div><div class='del'>-		else</div><div class='del'>-			res = cfspi_xmit(skb, cfspi-&gt;ndev);</div><div class='del'>-</div><div class='del'>-		if (!res) {</div><div class='del'>-			cfspi-&gt;ndev-&gt;stats.rx_packets++;</div><div class='del'>-			cfspi-&gt;ndev-&gt;stats.rx_bytes += pkt_len;</div><div class='del'>-		} else</div><div class='del'>-			cfspi-&gt;ndev-&gt;stats.rx_dropped++;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Compute tail offset i.e. number of bytes added to</div><div class='del'>-		 * get the complete CAIF frame aligned.</div><div class='del'>-		 */</div><div class='del'>-		epad = PAD_POW2((pkt_len + spad), spi_down_tail_align);</div><div class='del'>-		src += epad;</div><div class='del'>-	} while ((src - buf) &lt; len);</div><div class='del'>-</div><div class='del'>-	return src - buf;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int cfspi_open(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	netif_wake_queue(dev);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int cfspi_close(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	netif_stop_queue(dev);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int cfspi_init(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	int res = 0;</div><div class='del'>-	struct cfspi *cfspi = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	/* Set flow info. */</div><div class='del'>-	cfspi-&gt;flow_off_sent = 0;</div><div class='del'>-	cfspi-&gt;qd_low_mark = LOW_WATER_MARK;</div><div class='del'>-	cfspi-&gt;qd_high_mark = HIGH_WATER_MARK;</div><div class='del'>-</div><div class='del'>-	/* Set slave info. */</div><div class='del'>-	if (!strncmp(cfspi_spi_driver.driver.name, "cfspi_sspi", 10)) {</div><div class='del'>-		cfspi-&gt;slave = true;</div><div class='del'>-		cfspi-&gt;slave_talked = false;</div><div class='del'>-	} else {</div><div class='del'>-		cfspi-&gt;slave = false;</div><div class='del'>-		cfspi-&gt;slave_talked = false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Allocate DMA buffers. */</div><div class='del'>-	cfspi-&gt;xfer.va_tx[0] = dma_alloc(&amp;cfspi-&gt;xfer.pa_tx[0]);</div><div class='del'>-	if (!cfspi-&gt;xfer.va_tx[0]) {</div><div class='del'>-		res = -ENODEV;</div><div class='del'>-		goto err_dma_alloc_tx_0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	cfspi-&gt;xfer.va_rx = dma_alloc(&amp;cfspi-&gt;xfer.pa_rx);</div><div class='del'>-</div><div class='del'>-	if (!cfspi-&gt;xfer.va_rx) {</div><div class='del'>-		res = -ENODEV;</div><div class='del'>-		goto err_dma_alloc_rx;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Initialize the work queue. */</div><div class='del'>-	INIT_WORK(&amp;cfspi-&gt;work, cfspi_xfer);</div><div class='del'>-</div><div class='del'>-	/* Initialize spin locks. */</div><div class='del'>-	spin_lock_init(&amp;cfspi-&gt;lock);</div><div class='del'>-</div><div class='del'>-	/* Initialize flow control state. */</div><div class='del'>-	cfspi-&gt;flow_stop = false;</div><div class='del'>-</div><div class='del'>-	/* Initialize wait queue. */</div><div class='del'>-	init_waitqueue_head(&amp;cfspi-&gt;wait);</div><div class='del'>-</div><div class='del'>-	/* Create work thread. */</div><div class='del'>-	cfspi-&gt;wq = create_singlethread_workqueue(dev-&gt;name);</div><div class='del'>-	if (!cfspi-&gt;wq) {</div><div class='del'>-		printk(KERN_WARNING "CFSPI: failed to create work queue.\n");</div><div class='del'>-		res = -ENODEV;</div><div class='del'>-		goto err_create_wq;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Initialize work queue. */</div><div class='del'>-	init_completion(&amp;cfspi-&gt;comp);</div><div class='del'>-</div><div class='del'>-	/* Create debugfs entries. */</div><div class='del'>-	dev_debugfs_add(cfspi);</div><div class='del'>-</div><div class='del'>-	/* Set up the ifc. */</div><div class='del'>-	cfspi-&gt;ifc.ss_cb = cfspi_ss_cb;</div><div class='del'>-	cfspi-&gt;ifc.xfer_done_cb = cfspi_xfer_done_cb;</div><div class='del'>-	cfspi-&gt;ifc.priv = cfspi;</div><div class='del'>-</div><div class='del'>-	/* Add CAIF SPI device to list. */</div><div class='del'>-	spin_lock(&amp;cfspi_list_lock);</div><div class='del'>-	list_add_tail(&amp;cfspi-&gt;list, &amp;cfspi_list);</div><div class='del'>-	spin_unlock(&amp;cfspi_list_lock);</div><div class='del'>-</div><div class='del'>-	/* Schedule the work queue. */</div><div class='del'>-	queue_work(cfspi-&gt;wq, &amp;cfspi-&gt;work);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>- err_create_wq:</div><div class='del'>-	dma_free(cfspi-&gt;xfer.va_rx, cfspi-&gt;xfer.pa_rx);</div><div class='del'>- err_dma_alloc_rx:</div><div class='del'>-	dma_free(cfspi-&gt;xfer.va_tx[0], cfspi-&gt;xfer.pa_tx[0]);</div><div class='del'>- err_dma_alloc_tx_0:</div><div class='del'>-	return res;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cfspi_uninit(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct cfspi *cfspi = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	/* Remove from list. */</div><div class='del'>-	spin_lock(&amp;cfspi_list_lock);</div><div class='del'>-	list_del(&amp;cfspi-&gt;list);</div><div class='del'>-	spin_unlock(&amp;cfspi_list_lock);</div><div class='del'>-</div><div class='del'>-	cfspi-&gt;ndev = NULL;</div><div class='del'>-	/* Free DMA buffers. */</div><div class='del'>-	dma_free(cfspi-&gt;xfer.va_rx, cfspi-&gt;xfer.pa_rx);</div><div class='del'>-	dma_free(cfspi-&gt;xfer.va_tx[0], cfspi-&gt;xfer.pa_tx[0]);</div><div class='del'>-	set_bit(SPI_TERMINATE, &amp;cfspi-&gt;state);</div><div class='del'>-	wake_up_interruptible(&amp;cfspi-&gt;wait);</div><div class='del'>-	destroy_workqueue(cfspi-&gt;wq);</div><div class='del'>-	/* Destroy debugfs directory and files. */</div><div class='del'>-	dev_debugfs_rem(cfspi);</div><div class='del'>-	return;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct net_device_ops cfspi_ops = {</div><div class='del'>-	.ndo_open = cfspi_open,</div><div class='del'>-	.ndo_stop = cfspi_close,</div><div class='del'>-	.ndo_init = cfspi_init,</div><div class='del'>-	.ndo_uninit = cfspi_uninit,</div><div class='del'>-	.ndo_start_xmit = cfspi_xmit</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void cfspi_setup(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct cfspi *cfspi = netdev_priv(dev);</div><div class='del'>-	dev-&gt;features = 0;</div><div class='del'>-	dev-&gt;netdev_ops = &amp;cfspi_ops;</div><div class='del'>-	dev-&gt;type = ARPHRD_CAIF;</div><div class='del'>-	dev-&gt;flags = IFF_NOARP | IFF_POINTOPOINT;</div><div class='del'>-	dev-&gt;tx_queue_len = 0;</div><div class='del'>-	dev-&gt;mtu = SPI_MAX_PAYLOAD_SIZE;</div><div class='del'>-	dev-&gt;destructor = free_netdev;</div><div class='del'>-	skb_queue_head_init(&amp;cfspi-&gt;qhead);</div><div class='del'>-	skb_queue_head_init(&amp;cfspi-&gt;chead);</div><div class='del'>-	cfspi-&gt;cfdev.link_select = CAIF_LINK_HIGH_BANDW;</div><div class='del'>-	cfspi-&gt;cfdev.use_frag = false;</div><div class='del'>-	cfspi-&gt;cfdev.use_stx = false;</div><div class='del'>-	cfspi-&gt;cfdev.use_fcs = false;</div><div class='del'>-	cfspi-&gt;ndev = dev;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int cfspi_spi_probe(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	struct cfspi *cfspi = NULL;</div><div class='del'>-	struct net_device *ndev;</div><div class='del'>-	struct cfspi_dev *dev;</div><div class='del'>-	int res;</div><div class='del'>-	dev = (struct cfspi_dev *)pdev-&gt;dev.platform_data;</div><div class='del'>-</div><div class='del'>-	ndev = alloc_netdev(sizeof(struct cfspi), "cfspi%d",</div><div class='del'>-			    NET_NAME_UNKNOWN, cfspi_setup);</div><div class='del'>-	if (!dev)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	cfspi = netdev_priv(ndev);</div><div class='del'>-	netif_stop_queue(ndev);</div><div class='del'>-	cfspi-&gt;ndev = ndev;</div><div class='del'>-	cfspi-&gt;pdev = pdev;</div><div class='del'>-</div><div class='del'>-	/* Assign the SPI device. */</div><div class='del'>-	cfspi-&gt;dev = dev;</div><div class='del'>-	/* Assign the device ifc to this SPI interface. */</div><div class='del'>-	dev-&gt;ifc = &amp;cfspi-&gt;ifc;</div><div class='del'>-</div><div class='del'>-	/* Register network device. */</div><div class='del'>-	res = register_netdev(ndev);</div><div class='del'>-	if (res) {</div><div class='del'>-		printk(KERN_ERR "CFSPI: Reg. error: %d.\n", res);</div><div class='del'>-		goto err_net_reg;</div><div class='del'>-	}</div><div class='del'>-	return res;</div><div class='del'>-</div><div class='del'>- err_net_reg:</div><div class='del'>-	free_netdev(ndev);</div><div class='del'>-</div><div class='del'>-	return res;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int cfspi_spi_remove(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	/* Everything is done in cfspi_uninit(). */</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit cfspi_exit_module(void)</div><div class='del'>-{</div><div class='del'>-	struct list_head *list_node;</div><div class='del'>-	struct list_head *n;</div><div class='del'>-	struct cfspi *cfspi = NULL;</div><div class='del'>-</div><div class='del'>-	list_for_each_safe(list_node, n, &amp;cfspi_list) {</div><div class='del'>-		cfspi = list_entry(list_node, struct cfspi, list);</div><div class='del'>-		unregister_netdev(cfspi-&gt;ndev);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Destroy sysfs files. */</div><div class='del'>-	driver_remove_file(&amp;cfspi_spi_driver.driver,</div><div class='del'>-			   &amp;driver_attr_up_head_align);</div><div class='del'>-	driver_remove_file(&amp;cfspi_spi_driver.driver,</div><div class='del'>-			   &amp;driver_attr_up_tail_align);</div><div class='del'>-	driver_remove_file(&amp;cfspi_spi_driver.driver,</div><div class='del'>-			   &amp;driver_attr_down_head_align);</div><div class='del'>-	driver_remove_file(&amp;cfspi_spi_driver.driver,</div><div class='del'>-			   &amp;driver_attr_down_tail_align);</div><div class='del'>-	driver_remove_file(&amp;cfspi_spi_driver.driver, &amp;driver_attr_frame_align);</div><div class='del'>-	/* Unregister platform driver. */</div><div class='del'>-	platform_driver_unregister(&amp;cfspi_spi_driver);</div><div class='del'>-	/* Destroy debugfs root directory. */</div><div class='del'>-	driver_debugfs_remove();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init cfspi_init_module(void)</div><div class='del'>-{</div><div class='del'>-	int result;</div><div class='del'>-</div><div class='del'>-	/* Initialize spin lock. */</div><div class='del'>-	spin_lock_init(&amp;cfspi_list_lock);</div><div class='del'>-</div><div class='del'>-	/* Register platform driver. */</div><div class='del'>-	result = platform_driver_register(&amp;cfspi_spi_driver);</div><div class='del'>-	if (result) {</div><div class='del'>-		printk(KERN_ERR "Could not register platform SPI driver.\n");</div><div class='del'>-		goto err_dev_register;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Create sysfs files. */</div><div class='del'>-	result =</div><div class='del'>-	    driver_create_file(&amp;cfspi_spi_driver.driver,</div><div class='del'>-			       &amp;driver_attr_up_head_align);</div><div class='del'>-	if (result) {</div><div class='del'>-		printk(KERN_ERR "Sysfs creation failed 1.\n");</div><div class='del'>-		goto err_create_up_head_align;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	result =</div><div class='del'>-	    driver_create_file(&amp;cfspi_spi_driver.driver,</div><div class='del'>-			       &amp;driver_attr_up_tail_align);</div><div class='del'>-	if (result) {</div><div class='del'>-		printk(KERN_ERR "Sysfs creation failed 2.\n");</div><div class='del'>-		goto err_create_up_tail_align;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	result =</div><div class='del'>-	    driver_create_file(&amp;cfspi_spi_driver.driver,</div><div class='del'>-			       &amp;driver_attr_down_head_align);</div><div class='del'>-	if (result) {</div><div class='del'>-		printk(KERN_ERR "Sysfs creation failed 3.\n");</div><div class='del'>-		goto err_create_down_head_align;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	result =</div><div class='del'>-	    driver_create_file(&amp;cfspi_spi_driver.driver,</div><div class='del'>-			       &amp;driver_attr_down_tail_align);</div><div class='del'>-	if (result) {</div><div class='del'>-		printk(KERN_ERR "Sysfs creation failed 4.\n");</div><div class='del'>-		goto err_create_down_tail_align;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	result =</div><div class='del'>-	    driver_create_file(&amp;cfspi_spi_driver.driver,</div><div class='del'>-			       &amp;driver_attr_frame_align);</div><div class='del'>-	if (result) {</div><div class='del'>-		printk(KERN_ERR "Sysfs creation failed 5.\n");</div><div class='del'>-		goto err_create_frame_align;</div><div class='del'>-	}</div><div class='del'>-	driver_debugfs_create();</div><div class='del'>-	return result;</div><div class='del'>-</div><div class='del'>- err_create_frame_align:</div><div class='del'>-	driver_remove_file(&amp;cfspi_spi_driver.driver,</div><div class='del'>-			   &amp;driver_attr_down_tail_align);</div><div class='del'>- err_create_down_tail_align:</div><div class='del'>-	driver_remove_file(&amp;cfspi_spi_driver.driver,</div><div class='del'>-			   &amp;driver_attr_down_head_align);</div><div class='del'>- err_create_down_head_align:</div><div class='del'>-	driver_remove_file(&amp;cfspi_spi_driver.driver,</div><div class='del'>-			   &amp;driver_attr_up_tail_align);</div><div class='del'>- err_create_up_tail_align:</div><div class='del'>-	driver_remove_file(&amp;cfspi_spi_driver.driver,</div><div class='del'>-			   &amp;driver_attr_up_head_align);</div><div class='del'>- err_create_up_head_align:</div><div class='del'>-	platform_driver_unregister(&amp;cfspi_spi_driver);</div><div class='del'>- err_dev_register:</div><div class='del'>-	return result;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(cfspi_init_module);</div><div class='del'>-module_exit(cfspi_exit_module);</div><div class='head'>diff --git a/drivers/net/caif/caif_spi_slave.c b/drivers/net/caif/caif_spi_slave.c<br/>deleted file mode 100644<br/>index 39ba2f892ad6..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/caif/caif_spi_slave.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/caif/caif_spi_slave.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,254 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) ST-Ericsson AB 2010</div><div class='del'>- * Author:  Daniel Martensson</div><div class='del'>- * License terms: GNU General Public License (GPL) version 2.</div><div class='del'>- */</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/device.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/semaphore.h&gt;</div><div class='del'>-#include &lt;linux/workqueue.h&gt;</div><div class='del'>-#include &lt;linux/completion.h&gt;</div><div class='del'>-#include &lt;linux/list.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/dma-mapping.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/debugfs.h&gt;</div><div class='del'>-#include &lt;net/caif/caif_spi.h&gt;</div><div class='del'>-</div><div class='del'>-#ifndef CONFIG_CAIF_SPI_SYNC</div><div class='del'>-#define SPI_DATA_POS 0</div><div class='del'>-static inline int forward_to_spi_cmd(struct cfspi *cfspi)</div><div class='del'>-{</div><div class='del'>-	return cfspi-&gt;rx_cpck_len;</div><div class='del'>-}</div><div class='del'>-#else</div><div class='del'>-#define SPI_DATA_POS SPI_CMD_SZ</div><div class='del'>-static inline int forward_to_spi_cmd(struct cfspi *cfspi)</div><div class='del'>-{</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-int spi_frm_align = 2;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * SPI padding options.</div><div class='del'>- * Warning: must be a base of 2 (&amp; operation used) and can not be zero !</div><div class='del'>- */</div><div class='del'>-int spi_up_head_align   = 1 &lt;&lt; 1;</div><div class='del'>-int spi_up_tail_align   = 1 &lt;&lt; 0;</div><div class='del'>-int spi_down_head_align = 1 &lt;&lt; 2;</div><div class='del'>-int spi_down_tail_align = 1 &lt;&lt; 1;</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_DEBUG_FS</div><div class='del'>-static inline void debugfs_store_prev(struct cfspi *cfspi)</div><div class='del'>-{</div><div class='del'>-	/* Store previous command for debugging reasons.*/</div><div class='del'>-	cfspi-&gt;pcmd = cfspi-&gt;cmd;</div><div class='del'>-	/* Store previous transfer. */</div><div class='del'>-	cfspi-&gt;tx_ppck_len = cfspi-&gt;tx_cpck_len;</div><div class='del'>-	cfspi-&gt;rx_ppck_len = cfspi-&gt;rx_cpck_len;</div><div class='del'>-}</div><div class='del'>-#else</div><div class='del'>-static inline void debugfs_store_prev(struct cfspi *cfspi)</div><div class='del'>-{</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-void cfspi_xfer(struct work_struct *work)</div><div class='del'>-{</div><div class='del'>-	struct cfspi *cfspi;</div><div class='del'>-	u8 *ptr = NULL;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	int ret;</div><div class='del'>-	cfspi = container_of(work, struct cfspi, work);</div><div class='del'>-</div><div class='del'>-	/* Initialize state. */</div><div class='del'>-	cfspi-&gt;cmd = SPI_CMD_EOT;</div><div class='del'>-</div><div class='del'>-	for (;;) {</div><div class='del'>-</div><div class='del'>-		cfspi_dbg_state(cfspi, CFSPI_STATE_WAITING);</div><div class='del'>-</div><div class='del'>-		/* Wait for master talk or transmit event. */</div><div class='del'>-		wait_event_interruptible(cfspi-&gt;wait,</div><div class='del'>-				 test_bit(SPI_XFER, &amp;cfspi-&gt;state) ||</div><div class='del'>-				 test_bit(SPI_TERMINATE, &amp;cfspi-&gt;state));</div><div class='del'>-</div><div class='del'>-		if (test_bit(SPI_TERMINATE, &amp;cfspi-&gt;state))</div><div class='del'>-			return;</div><div class='del'>-</div><div class='del'>-#if CFSPI_DBG_PREFILL</div><div class='del'>-		/* Prefill buffers for easier debugging. */</div><div class='del'>-		memset(cfspi-&gt;xfer.va_tx, 0xFF, SPI_DMA_BUF_LEN);</div><div class='del'>-		memset(cfspi-&gt;xfer.va_rx, 0xFF, SPI_DMA_BUF_LEN);</div><div class='del'>-#endif	/* CFSPI_DBG_PREFILL */</div><div class='del'>-</div><div class='del'>-		cfspi_dbg_state(cfspi, CFSPI_STATE_AWAKE);</div><div class='del'>-</div><div class='del'>-	/* Check whether we have a committed frame. */</div><div class='del'>-		if (cfspi-&gt;tx_cpck_len) {</div><div class='del'>-			int len;</div><div class='del'>-</div><div class='del'>-			cfspi_dbg_state(cfspi, CFSPI_STATE_FETCH_PKT);</div><div class='del'>-</div><div class='del'>-			/* Copy committed SPI frames after the SPI indication. */</div><div class='del'>-			ptr = (u8 *) cfspi-&gt;xfer.va_tx;</div><div class='del'>-			ptr += SPI_IND_SZ;</div><div class='del'>-			len = cfspi_xmitfrm(cfspi, ptr, cfspi-&gt;tx_cpck_len);</div><div class='del'>-			WARN_ON(len != cfspi-&gt;tx_cpck_len);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-		cfspi_dbg_state(cfspi, CFSPI_STATE_GET_NEXT);</div><div class='del'>-</div><div class='del'>-		/* Get length of next frame to commit. */</div><div class='del'>-		cfspi-&gt;tx_npck_len = cfspi_xmitlen(cfspi);</div><div class='del'>-</div><div class='del'>-		WARN_ON(cfspi-&gt;tx_npck_len &gt; SPI_DMA_BUF_LEN);</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Add indication and length at the beginning of the frame,</div><div class='del'>-		 * using little endian.</div><div class='del'>-		 */</div><div class='del'>-		ptr = (u8 *) cfspi-&gt;xfer.va_tx;</div><div class='del'>-		*ptr++ = SPI_CMD_IND;</div><div class='del'>-		*ptr++ = (SPI_CMD_IND  &amp; 0xFF00) &gt;&gt; 8;</div><div class='del'>-		*ptr++ = cfspi-&gt;tx_npck_len &amp; 0x00FF;</div><div class='del'>-		*ptr++ = (cfspi-&gt;tx_npck_len &amp; 0xFF00) &gt;&gt; 8;</div><div class='del'>-</div><div class='del'>-		/* Calculate length of DMAs. */</div><div class='del'>-		cfspi-&gt;xfer.tx_dma_len = cfspi-&gt;tx_cpck_len + SPI_IND_SZ;</div><div class='del'>-		cfspi-&gt;xfer.rx_dma_len = cfspi-&gt;rx_cpck_len + SPI_CMD_SZ;</div><div class='del'>-</div><div class='del'>-		/* Add SPI TX frame alignment padding, if necessary. */</div><div class='del'>-		if (cfspi-&gt;tx_cpck_len &amp;&amp;</div><div class='del'>-			(cfspi-&gt;xfer.tx_dma_len % spi_frm_align)) {</div><div class='del'>-</div><div class='del'>-			cfspi-&gt;xfer.tx_dma_len += spi_frm_align -</div><div class='del'>-			    (cfspi-&gt;xfer.tx_dma_len % spi_frm_align);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Add SPI RX frame alignment padding, if necessary. */</div><div class='del'>-		if (cfspi-&gt;rx_cpck_len &amp;&amp;</div><div class='del'>-			(cfspi-&gt;xfer.rx_dma_len % spi_frm_align)) {</div><div class='del'>-</div><div class='del'>-			cfspi-&gt;xfer.rx_dma_len += spi_frm_align -</div><div class='del'>-			    (cfspi-&gt;xfer.rx_dma_len % spi_frm_align);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		cfspi_dbg_state(cfspi, CFSPI_STATE_INIT_XFER);</div><div class='del'>-</div><div class='del'>-		/* Start transfer. */</div><div class='del'>-		ret = cfspi-&gt;dev-&gt;init_xfer(&amp;cfspi-&gt;xfer, cfspi-&gt;dev);</div><div class='del'>-		WARN_ON(ret);</div><div class='del'>-</div><div class='del'>-		cfspi_dbg_state(cfspi, CFSPI_STATE_WAIT_ACTIVE);</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * TODO: We might be able to make an assumption if this is the</div><div class='del'>-		 * first loop. Make sure that minimum toggle time is respected.</div><div class='del'>-		 */</div><div class='del'>-		udelay(MIN_TRANSITION_TIME_USEC);</div><div class='del'>-</div><div class='del'>-		cfspi_dbg_state(cfspi, CFSPI_STATE_SIG_ACTIVE);</div><div class='del'>-</div><div class='del'>-		/* Signal that we are ready to receive data. */</div><div class='del'>-		cfspi-&gt;dev-&gt;sig_xfer(true, cfspi-&gt;dev);</div><div class='del'>-</div><div class='del'>-		cfspi_dbg_state(cfspi, CFSPI_STATE_WAIT_XFER_DONE);</div><div class='del'>-</div><div class='del'>-		/* Wait for transfer completion. */</div><div class='del'>-		wait_for_completion(&amp;cfspi-&gt;comp);</div><div class='del'>-</div><div class='del'>-		cfspi_dbg_state(cfspi, CFSPI_STATE_XFER_DONE);</div><div class='del'>-</div><div class='del'>-		if (cfspi-&gt;cmd == SPI_CMD_EOT) {</div><div class='del'>-			/*</div><div class='del'>-			 * Clear the master talk bit. A xfer is always at</div><div class='del'>-			 *  least two bursts.</div><div class='del'>-			 */</div><div class='del'>-			clear_bit(SPI_SS_ON, &amp;cfspi-&gt;state);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		cfspi_dbg_state(cfspi, CFSPI_STATE_WAIT_INACTIVE);</div><div class='del'>-</div><div class='del'>-		/* Make sure that the minimum toggle time is respected. */</div><div class='del'>-		if (SPI_XFER_TIME_USEC(cfspi-&gt;xfer.tx_dma_len,</div><div class='del'>-					cfspi-&gt;dev-&gt;clk_mhz) &lt;</div><div class='del'>-			MIN_TRANSITION_TIME_USEC) {</div><div class='del'>-</div><div class='del'>-			udelay(MIN_TRANSITION_TIME_USEC -</div><div class='del'>-				SPI_XFER_TIME_USEC</div><div class='del'>-				(cfspi-&gt;xfer.tx_dma_len, cfspi-&gt;dev-&gt;clk_mhz));</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		cfspi_dbg_state(cfspi, CFSPI_STATE_SIG_INACTIVE);</div><div class='del'>-</div><div class='del'>-		/* De-assert transfer signal. */</div><div class='del'>-		cfspi-&gt;dev-&gt;sig_xfer(false, cfspi-&gt;dev);</div><div class='del'>-</div><div class='del'>-		/* Check whether we received a CAIF packet. */</div><div class='del'>-		if (cfspi-&gt;rx_cpck_len) {</div><div class='del'>-			int len;</div><div class='del'>-</div><div class='del'>-			cfspi_dbg_state(cfspi, CFSPI_STATE_DELIVER_PKT);</div><div class='del'>-</div><div class='del'>-			/* Parse SPI frame. */</div><div class='del'>-			ptr = ((u8 *)(cfspi-&gt;xfer.va_rx + SPI_DATA_POS));</div><div class='del'>-</div><div class='del'>-			len = cfspi_rxfrm(cfspi, ptr, cfspi-&gt;rx_cpck_len);</div><div class='del'>-			WARN_ON(len != cfspi-&gt;rx_cpck_len);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Check the next SPI command and length. */</div><div class='del'>-		ptr = (u8 *) cfspi-&gt;xfer.va_rx;</div><div class='del'>-</div><div class='del'>-		ptr += forward_to_spi_cmd(cfspi);</div><div class='del'>-</div><div class='del'>-		cfspi-&gt;cmd = *ptr++;</div><div class='del'>-		cfspi-&gt;cmd |= ((*ptr++) &lt;&lt; 8) &amp; 0xFF00;</div><div class='del'>-		cfspi-&gt;rx_npck_len = *ptr++;</div><div class='del'>-		cfspi-&gt;rx_npck_len |= ((*ptr++) &lt;&lt; 8) &amp; 0xFF00;</div><div class='del'>-</div><div class='del'>-		WARN_ON(cfspi-&gt;rx_npck_len &gt; SPI_DMA_BUF_LEN);</div><div class='del'>-		WARN_ON(cfspi-&gt;cmd &gt; SPI_CMD_EOT);</div><div class='del'>-</div><div class='del'>-		debugfs_store_prev(cfspi);</div><div class='del'>-</div><div class='del'>-		/* Check whether the master issued an EOT command. */</div><div class='del'>-		if (cfspi-&gt;cmd == SPI_CMD_EOT) {</div><div class='del'>-			/* Reset state. */</div><div class='del'>-			cfspi-&gt;tx_cpck_len = 0;</div><div class='del'>-			cfspi-&gt;rx_cpck_len = 0;</div><div class='del'>-		} else {</div><div class='del'>-			/* Update state. */</div><div class='del'>-			cfspi-&gt;tx_cpck_len = cfspi-&gt;tx_npck_len;</div><div class='del'>-			cfspi-&gt;rx_cpck_len = cfspi-&gt;rx_npck_len;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Check whether we need to clear the xfer bit.</div><div class='del'>-		 * Spin lock needed for packet insertion.</div><div class='del'>-		 * Test and clear of different bits</div><div class='del'>-		 * are not supported.</div><div class='del'>-		 */</div><div class='del'>-		spin_lock_irqsave(&amp;cfspi-&gt;lock, flags);</div><div class='del'>-		if (cfspi-&gt;cmd == SPI_CMD_EOT &amp;&amp; !cfspi_xmitlen(cfspi)</div><div class='del'>-			&amp;&amp; !test_bit(SPI_SS_ON, &amp;cfspi-&gt;state))</div><div class='del'>-			clear_bit(SPI_XFER, &amp;cfspi-&gt;state);</div><div class='del'>-</div><div class='del'>-		spin_unlock_irqrestore(&amp;cfspi-&gt;lock, flags);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct platform_driver cfspi_spi_driver = {</div><div class='del'>-	.probe = cfspi_spi_probe,</div><div class='del'>-	.remove = cfspi_spi_remove,</div><div class='del'>-	.driver = {</div><div class='del'>-		   .name = "cfspi_sspi",</div><div class='del'>-		   .owner = THIS_MODULE,</div><div class='del'>-		   },</div><div class='del'>-};</div><div class='head'>diff --git a/drivers/net/caif/caif_virtio.c b/drivers/net/caif/caif_virtio.c<br/>index b306210b02b7..c60386bf2d1a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/caif/caif_virtio.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/caif/caif_virtio.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/caif/caif_virtio.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/caif/caif_virtio.c</a></div><div class='hunk'>@@ -1,9 +1,9 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (C) ST-Ericsson AB 2013</div><div class='ctx'>  * Authors: Vicram Arv</div><div class='ctx'>  *	    Dmitry Tarnyagin &lt;dmitry.tarnyagin@lockless.no&gt;</div><div class='ctx'>  *	    Sjur Brendeland</div><div class='del'>- * License terms: GNU General Public License (GPL) version 2</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/if_arp.h&gt;</div><div class='hunk'>@@ -242,7 +242,7 @@ static struct sk_buff *cfv_alloc_and_copy_skb(int *err,</div><div class='ctx'> </div><div class='ctx'> 	skb_reserve(skb, cfv-&gt;rx_hr + pad_len);</div><div class='ctx'> </div><div class='del'>-	memcpy(skb_put(skb, cfpkt_len), frm + cfv-&gt;rx_hr, cfpkt_len);</div><div class='add'>+	skb_put_data(skb, frm + cfv-&gt;rx_hr, cfpkt_len);</div><div class='ctx'> 	return skb;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -315,7 +315,7 @@ exit:</div><div class='ctx'> 	case 0:</div><div class='ctx'> 		++cfv-&gt;stats.rx_napi_complete;</div><div class='ctx'> </div><div class='del'>-		/* Really out of patckets? (stolen from virtio_net)*/</div><div class='add'>+		/* Really out of packets? (stolen from virtio_net)*/</div><div class='ctx'> 		napi_complete(napi);</div><div class='ctx'> 		if (unlikely(!vringh_notify_enable_kern(cfv-&gt;vr_rx)) &amp;&amp;</div><div class='ctx'> 		    napi_schedule_prep(napi)) {</div><div class='hunk'>@@ -463,7 +463,7 @@ static int cfv_netdev_close(struct net_device *netdev)</div><div class='ctx'> 	vringh_notify_disable_kern(cfv-&gt;vr_rx);</div><div class='ctx'> 	napi_disable(&amp;cfv-&gt;napi);</div><div class='ctx'> </div><div class='del'>-	/* Release any TX buffers on both used and avilable rings */</div><div class='add'>+	/* Release any TX buffers on both used and available rings */</div><div class='ctx'> 	cfv_release_used_buf(cfv-&gt;vq_tx);</div><div class='ctx'> 	spin_lock_irqsave(&amp;cfv-&gt;tx_lock, flags);</div><div class='ctx'> 	while ((buf_info = virtqueue_detach_unused_buf(cfv-&gt;vq_tx)))</div><div class='hunk'>@@ -497,7 +497,7 @@ static struct buf_info *cfv_alloc_and_copy_to_shm(struct cfv_info *cfv,</div><div class='ctx'> 	if (unlikely(!buf_info))</div><div class='ctx'> 		goto err;</div><div class='ctx'> </div><div class='del'>-	/* Make the IP header aligned in tbe buffer */</div><div class='add'>+	/* Make the IP header aligned in the buffer */</div><div class='ctx'> 	hdr_ofs = cfv-&gt;tx_hr + info-&gt;hdr_len;</div><div class='ctx'> 	pad_len = hdr_ofs &amp; (IP_HDR_ALIGN - 1);</div><div class='ctx'> 	buf_info-&gt;size = cfv-&gt;tx_hr + skb-&gt;len + cfv-&gt;tx_tr + pad_len;</div><div class='hunk'>@@ -519,7 +519,7 @@ err:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Put the CAIF packet on the virtio ring and kick the receiver */</div><div class='del'>-static int cfv_netdev_tx(struct sk_buff *skb, struct net_device *netdev)</div><div class='add'>+static netdev_tx_t cfv_netdev_tx(struct sk_buff *skb, struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct cfv_info *cfv = netdev_priv(netdev);</div><div class='ctx'> 	struct buf_info *buf_info;</div><div class='hunk'>@@ -598,9 +598,9 @@ err:</div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void cfv_tx_release_tasklet(unsigned long drv)</div><div class='add'>+static void cfv_tx_release_tasklet(struct tasklet_struct *t)</div><div class='ctx'> {</div><div class='del'>-	struct cfv_info *cfv = (struct cfv_info *)drv;</div><div class='add'>+	struct cfv_info *cfv = from_tasklet(cfv, t, tx_release_tasklet);</div><div class='ctx'> 	cfv_release_used_buf(cfv-&gt;vq_tx);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -617,46 +617,40 @@ static void cfv_netdev_setup(struct net_device *netdev)</div><div class='ctx'> 	netdev-&gt;tx_queue_len = 100;</div><div class='ctx'> 	netdev-&gt;flags = IFF_POINTOPOINT | IFF_NOARP;</div><div class='ctx'> 	netdev-&gt;mtu = CFV_DEF_MTU_SIZE;</div><div class='del'>-	netdev-&gt;destructor = free_netdev;</div><div class='add'>+	netdev-&gt;needs_free_netdev = true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Create debugfs counters for the device */</div><div class='ctx'> static inline void debugfs_init(struct cfv_info *cfv)</div><div class='ctx'> {</div><div class='del'>-	cfv-&gt;debugfs =</div><div class='del'>-		debugfs_create_dir(netdev_name(cfv-&gt;ndev), NULL);</div><div class='add'>+	cfv-&gt;debugfs = debugfs_create_dir(netdev_name(cfv-&gt;ndev), NULL);</div><div class='ctx'> </div><div class='del'>-	if (IS_ERR(cfv-&gt;debugfs))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	debugfs_create_u32("rx-napi-complete", S_IRUSR, cfv-&gt;debugfs,</div><div class='add'>+	debugfs_create_u32("rx-napi-complete", 0400, cfv-&gt;debugfs,</div><div class='ctx'> 			   &amp;cfv-&gt;stats.rx_napi_complete);</div><div class='del'>-	debugfs_create_u32("rx-napi-resched", S_IRUSR, cfv-&gt;debugfs,</div><div class='add'>+	debugfs_create_u32("rx-napi-resched", 0400, cfv-&gt;debugfs,</div><div class='ctx'> 			   &amp;cfv-&gt;stats.rx_napi_resched);</div><div class='del'>-	debugfs_create_u32("rx-nomem", S_IRUSR, cfv-&gt;debugfs,</div><div class='add'>+	debugfs_create_u32("rx-nomem", 0400, cfv-&gt;debugfs,</div><div class='ctx'> 			   &amp;cfv-&gt;stats.rx_nomem);</div><div class='del'>-	debugfs_create_u32("rx-kicks", S_IRUSR, cfv-&gt;debugfs,</div><div class='add'>+	debugfs_create_u32("rx-kicks", 0400, cfv-&gt;debugfs,</div><div class='ctx'> 			   &amp;cfv-&gt;stats.rx_kicks);</div><div class='del'>-	debugfs_create_u32("tx-full-ring", S_IRUSR, cfv-&gt;debugfs,</div><div class='add'>+	debugfs_create_u32("tx-full-ring", 0400, cfv-&gt;debugfs,</div><div class='ctx'> 			   &amp;cfv-&gt;stats.tx_full_ring);</div><div class='del'>-	debugfs_create_u32("tx-no-mem", S_IRUSR, cfv-&gt;debugfs,</div><div class='add'>+	debugfs_create_u32("tx-no-mem", 0400, cfv-&gt;debugfs,</div><div class='ctx'> 			   &amp;cfv-&gt;stats.tx_no_mem);</div><div class='del'>-	debugfs_create_u32("tx-kicks", S_IRUSR, cfv-&gt;debugfs,</div><div class='add'>+	debugfs_create_u32("tx-kicks", 0400, cfv-&gt;debugfs,</div><div class='ctx'> 			   &amp;cfv-&gt;stats.tx_kicks);</div><div class='del'>-	debugfs_create_u32("tx-flow-on", S_IRUSR, cfv-&gt;debugfs,</div><div class='add'>+	debugfs_create_u32("tx-flow-on", 0400, cfv-&gt;debugfs,</div><div class='ctx'> 			   &amp;cfv-&gt;stats.tx_flow_on);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Setup CAIF for the a virtio device */</div><div class='ctx'> static int cfv_probe(struct virtio_device *vdev)</div><div class='ctx'> {</div><div class='del'>-	vq_callback_t *vq_cbs = cfv_release_cb;</div><div class='ctx'> 	vrh_callback_t *vrh_cbs = cfv_recv;</div><div class='del'>-	const char *names =  "output";</div><div class='ctx'> 	const char *cfv_netdev_name = "cfvrt";</div><div class='ctx'> 	struct net_device *netdev;</div><div class='ctx'> 	struct cfv_info *cfv;</div><div class='del'>-	int err = -EINVAL;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='ctx'> 	netdev = alloc_netdev(sizeof(struct cfv_info), cfv_netdev_name,</div><div class='ctx'> 			      NET_NAME_UNKNOWN, cfv_netdev_setup);</div><div class='hunk'>@@ -679,9 +673,11 @@ static int cfv_probe(struct virtio_device *vdev)</div><div class='ctx'> 		goto err;</div><div class='ctx'> </div><div class='ctx'> 	/* Get the TX virtio ring. This is a "guest side vring". */</div><div class='del'>-	err = vdev-&gt;config-&gt;find_vqs(vdev, 1, &amp;cfv-&gt;vq_tx, &amp;vq_cbs, &amp;names);</div><div class='del'>-	if (err)</div><div class='add'>+	cfv-&gt;vq_tx = virtio_find_single_vq(vdev, cfv_release_cb, "output");</div><div class='add'>+	if (IS_ERR(cfv-&gt;vq_tx)) {</div><div class='add'>+		err = PTR_ERR(cfv-&gt;vq_tx);</div><div class='ctx'> 		goto err;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Get the CAIF configuration from virtio config space, if available */</div><div class='ctx'> 	if (vdev-&gt;config-&gt;get) {</div><div class='hunk'>@@ -718,22 +714,29 @@ static int cfv_probe(struct virtio_device *vdev)</div><div class='ctx'> 	/* Initialize NAPI poll context data */</div><div class='ctx'> 	vringh_kiov_init(&amp;cfv-&gt;ctx.riov, NULL, 0);</div><div class='ctx'> 	cfv-&gt;ctx.head = USHRT_MAX;</div><div class='del'>-	netif_napi_add(netdev, &amp;cfv-&gt;napi, cfv_rx_poll, CFV_DEFAULT_QUOTA);</div><div class='add'>+	netif_napi_add_weight(netdev, &amp;cfv-&gt;napi, cfv_rx_poll,</div><div class='add'>+			      CFV_DEFAULT_QUOTA);</div><div class='ctx'> </div><div class='del'>-	tasklet_init(&amp;cfv-&gt;tx_release_tasklet,</div><div class='del'>-		     cfv_tx_release_tasklet,</div><div class='del'>-		     (unsigned long)cfv);</div><div class='add'>+	tasklet_setup(&amp;cfv-&gt;tx_release_tasklet, cfv_tx_release_tasklet);</div><div class='ctx'> </div><div class='ctx'> 	/* Carrier is off until netdevice is opened */</div><div class='ctx'> 	netif_carrier_off(netdev);</div><div class='ctx'> </div><div class='add'>+	/* serialize netdev register + virtio_device_ready() with ndo_open() */</div><div class='add'>+	rtnl_lock();</div><div class='add'>+</div><div class='ctx'> 	/* register Netdev */</div><div class='del'>-	err = register_netdev(netdev);</div><div class='add'>+	err = register_netdevice(netdev);</div><div class='ctx'> 	if (err) {</div><div class='add'>+		rtnl_unlock();</div><div class='ctx'> 		dev_err(&amp;vdev-&gt;dev, "Unable to register netdev (%d)\n", err);</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	virtio_device_ready(vdev);</div><div class='add'>+</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+</div><div class='ctx'> 	debugfs_init(cfv);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -742,7 +745,7 @@ err:</div><div class='ctx'> </div><div class='ctx'> 	if (cfv-&gt;vr_rx)</div><div class='ctx'> 		vdev-&gt;vringh_config-&gt;del_vrhs(cfv-&gt;vdev);</div><div class='del'>-	if (cfv-&gt;vdev)</div><div class='add'>+	if (cfv-&gt;vq_tx)</div><div class='ctx'> 		vdev-&gt;config-&gt;del_vqs(cfv-&gt;vdev);</div><div class='ctx'> 	free_netdev(netdev);</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -760,7 +763,7 @@ static void cfv_remove(struct virtio_device *vdev)</div><div class='ctx'> 	debugfs_remove_recursive(cfv-&gt;debugfs);</div><div class='ctx'> </div><div class='ctx'> 	vringh_kiov_cleanup(&amp;cfv-&gt;ctx.riov);</div><div class='del'>-	vdev-&gt;config-&gt;reset(vdev);</div><div class='add'>+	virtio_reset_device(vdev);</div><div class='ctx'> 	vdev-&gt;vringh_config-&gt;del_vrhs(cfv-&gt;vdev);</div><div class='ctx'> 	cfv-&gt;vr_rx = NULL;</div><div class='ctx'> 	vdev-&gt;config-&gt;del_vqs(cfv-&gt;vdev);</div><div class='hunk'>@@ -779,7 +782,6 @@ static struct virtio_driver caif_virtio_driver = {</div><div class='ctx'> 	.feature_table		= features,</div><div class='ctx'> 	.feature_table_size	= ARRAY_SIZE(features),</div><div class='ctx'> 	.driver.name		= KBUILD_MODNAME,</div><div class='del'>-	.driver.owner		= THIS_MODULE,</div><div class='ctx'> 	.id_table		= id_table,</div><div class='ctx'> 	.probe			= cfv_probe,</div><div class='ctx'> 	.remove			= cfv_remove,</div><div class='head'>diff --git a/drivers/net/can/Kconfig b/drivers/net/can/Kconfig<br/>index e8c96b8e86f4..e15e320db476 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/Kconfig?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/Kconfig</a></div><div class='hunk'>@@ -1,48 +1,75 @@</div><div class='del'>-menu "CAN Device Drivers"</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+menuconfig CAN_DEV</div><div class='add'>+	tristate "CAN Device Drivers"</div><div class='add'>+	default y</div><div class='add'>+	depends on CAN</div><div class='add'>+	help</div><div class='add'>+	  Controller Area Network (CAN) is serial communications protocol up to</div><div class='add'>+	  1Mbit/s for its original release (now known as Classical CAN) and up</div><div class='add'>+	  to 8Mbit/s for the more recent CAN with Flexible Data-Rate</div><div class='add'>+	  (CAN-FD). The CAN bus was originally mainly for automotive, but is now</div><div class='add'>+	  widely used in marine (NMEA2000), industrial, and medical</div><div class='add'>+	  applications. More information on the CAN network protocol family</div><div class='add'>+	  PF_CAN is contained in &lt;Documentation/networking/can.rst&gt;.</div><div class='add'>+</div><div class='add'>+	  This section contains all the CAN(-FD) device drivers including the</div><div class='add'>+	  virtual ones. If you own such devices or plan to use the virtual CAN</div><div class='add'>+	  interfaces to develop applications, say Y here.</div><div class='add'>+</div><div class='add'>+	  To compile as a module, choose M here: the module will be called</div><div class='add'>+	  can-dev.</div><div class='add'>+</div><div class='add'>+if CAN_DEV</div><div class='ctx'> </div><div class='ctx'> config CAN_VCAN</div><div class='ctx'> 	tristate "Virtual Local CAN Interface (vcan)"</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  Similar to the network loopback devices, vcan offers a</div><div class='ctx'> 	  virtual local CAN interface.</div><div class='ctx'> </div><div class='ctx'> 	  This driver can also be built as a module.  If so, the module</div><div class='ctx'> 	  will be called vcan.</div><div class='ctx'> </div><div class='del'>-config CAN_SLCAN</div><div class='del'>-	tristate "Serial / USB serial CAN Adaptors (slcan)"</div><div class='del'>-	depends on TTY</div><div class='del'>-	---help---</div><div class='del'>-	  CAN driver for several 'low cost' CAN interfaces that are attached</div><div class='del'>-	  via serial lines or via USB-to-serial adapters using the LAWICEL</div><div class='del'>-	  ASCII protocol. The driver implements the tty linediscipline N_SLCAN.</div><div class='add'>+config CAN_VXCAN</div><div class='add'>+	tristate "Virtual CAN Tunnel (vxcan)"</div><div class='add'>+	help</div><div class='add'>+	  Similar to the virtual ethernet driver veth, vxcan implements a</div><div class='add'>+	  local CAN traffic tunnel between two virtual CAN network devices.</div><div class='add'>+	  When creating a vxcan, two vxcan devices are created as pair.</div><div class='add'>+	  When one end receives the packet it appears on its pair and vice</div><div class='add'>+	  versa. The vxcan can be used for cross namespace communication.</div><div class='add'>+</div><div class='add'>+	  In opposite to vcan loopback devices the vxcan only forwards CAN</div><div class='add'>+	  frames to its pair and does *not* provide a local echo of sent</div><div class='add'>+	  CAN frames. To disable a potential echo in af_can.c the vxcan driver</div><div class='add'>+	  announces IFF_ECHO in the interface flags. To have a clean start</div><div class='add'>+	  in each namespace the CAN GW hop counter is set to zero.</div><div class='ctx'> </div><div class='del'>-	  As only the sending and receiving of CAN frames is implemented, this</div><div class='del'>-	  driver should work with the (serial/USB) CAN hardware from:</div><div class='del'>-	  www.canusb.com / www.can232.com / www.mictronics.de / www.canhack.de</div><div class='add'>+	  This driver can also be built as a module.  If so, the module</div><div class='add'>+	  will be called vxcan.</div><div class='ctx'> </div><div class='del'>-	  Userspace tools to attach the SLCAN line discipline (slcan_attach,</div><div class='del'>-	  slcand) can be found in the can-utils at the SocketCAN SVN, see</div><div class='del'>-	  http://developer.berlios.de/projects/socketcan for details.</div><div class='add'>+config CAN_NETLINK</div><div class='add'>+	bool "CAN device drivers with Netlink support"</div><div class='add'>+	default y</div><div class='add'>+	help</div><div class='add'>+	  Enables the common framework for CAN device drivers. This is the</div><div class='add'>+	  standard library and provides features for the Netlink interface such</div><div class='add'>+	  as bittiming validation, support of CAN error states, device restart</div><div class='add'>+	  and others.</div><div class='ctx'> </div><div class='del'>-	  The slcan driver supports up to 10 CAN netdevices by default which</div><div class='del'>-	  can be changed by the 'maxdev=xx' module option. This driver can</div><div class='del'>-	  also be built as a module. If so, the module will be called slcan.</div><div class='add'>+	  The additional features selected by this option will be added to the</div><div class='add'>+	  can-dev module.</div><div class='ctx'> </div><div class='del'>-config CAN_DEV</div><div class='del'>-	tristate "Platform CAN drivers with Netlink support"</div><div class='del'>-	default y</div><div class='del'>-	---help---</div><div class='del'>-	  Enables the common framework for platform CAN drivers with Netlink</div><div class='del'>-	  support. This is the standard library for CAN drivers.</div><div class='del'>-	  If unsure, say Y.</div><div class='add'>+	  This is required by all platform and hardware CAN drivers. If you</div><div class='add'>+	  plan to use such devices or if unsure, say Y.</div><div class='ctx'> </div><div class='del'>-if CAN_DEV</div><div class='add'>+if CAN_NETLINK</div><div class='ctx'> </div><div class='ctx'> config CAN_CALC_BITTIMING</div><div class='ctx'> 	bool "CAN bit-timing calculation"</div><div class='ctx'> 	default y</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  If enabled, CAN bit-timing parameters will be calculated for the</div><div class='ctx'> 	  bit-rate specified via Netlink argument "bitrate" when the device</div><div class='ctx'> 	  get started. This works fine for the most common CAN controllers</div><div class='hunk'>@@ -50,117 +77,186 @@ config CAN_CALC_BITTIMING</div><div class='ctx'> 	  source clock frequencies. Disabling saves some space, but then the</div><div class='ctx'> 	  bit-timing parameters must be specified directly using the Netlink</div><div class='ctx'> 	  arguments "tq", "prop_seg", "phase_seg1", "phase_seg2" and "sjw".</div><div class='del'>-	  If unsure, say Y.</div><div class='ctx'> </div><div class='del'>-config CAN_LEDS</div><div class='del'>-	bool "Enable LED triggers for Netlink based drivers"</div><div class='del'>-	depends on LEDS_CLASS</div><div class='del'>-	select LEDS_TRIGGERS</div><div class='del'>-	---help---</div><div class='del'>-	  This option adds two LED triggers for packet receive and transmit</div><div class='del'>-	  events on each supported CAN device.</div><div class='add'>+	  The additional features selected by this option will be added to the</div><div class='add'>+	  can-dev module.</div><div class='add'>+</div><div class='add'>+	  If unsure, say Y.</div><div class='ctx'> </div><div class='del'>-	  Say Y here if you are working on a system with led-class supported</div><div class='del'>-	  LEDs and you want to use them as canbus activity indicators.</div><div class='add'>+config CAN_RX_OFFLOAD</div><div class='add'>+	bool</div><div class='ctx'> </div><div class='ctx'> config CAN_AT91</div><div class='ctx'> 	tristate "Atmel AT91 onchip CAN controller"</div><div class='ctx'> 	depends on (ARCH_AT91 || COMPILE_TEST) &amp;&amp; HAS_IOMEM</div><div class='del'>-	---help---</div><div class='add'>+	select CAN_RX_OFFLOAD</div><div class='add'>+	help</div><div class='ctx'> 	  This is a driver for the SoC CAN controller in Atmel's AT91SAM9263</div><div class='ctx'> 	  and AT91SAM9X5 processors.</div><div class='ctx'> </div><div class='del'>-config CAN_TI_HECC</div><div class='del'>-	depends on ARM</div><div class='del'>-	tristate "TI High End CAN Controller"</div><div class='del'>-	---help---</div><div class='del'>-	  Driver for TI HECC (High End CAN Controller) module found on many</div><div class='del'>-	  TI devices. The device specifications are available from www.ti.com</div><div class='add'>+config CAN_BXCAN</div><div class='add'>+	tristate "STM32 Basic Extended CAN (bxCAN) devices"</div><div class='add'>+	depends on ARCH_STM32 || COMPILE_TEST</div><div class='add'>+	depends on HAS_IOMEM</div><div class='add'>+	select CAN_RX_OFFLOAD</div><div class='add'>+	help</div><div class='add'>+	  Say yes here to build support for the STMicroelectronics STM32 basic</div><div class='add'>+	  extended CAN Controller (bxCAN).</div><div class='ctx'> </div><div class='del'>-config CAN_BFIN</div><div class='del'>-	depends on BF534 || BF536 || BF537 || BF538 || BF539 || BF54x</div><div class='del'>-	tristate "Analog Devices Blackfin on-chip CAN"</div><div class='del'>-	---help---</div><div class='del'>-	  Driver for the Analog Devices Blackfin on-chip CAN controllers</div><div class='add'>+	  This driver can also be built as a module. If so, the module</div><div class='add'>+	  will be called bxcan.</div><div class='ctx'> </div><div class='del'>-	  To compile this driver as a module, choose M here: the</div><div class='del'>-	  module will be called bfin_can.</div><div class='add'>+config CAN_CAN327</div><div class='add'>+	tristate "Serial / USB serial ELM327 based OBD-II Interfaces (can327)"</div><div class='add'>+	depends on TTY</div><div class='add'>+	select CAN_RX_OFFLOAD</div><div class='add'>+	help</div><div class='add'>+	  CAN driver for several 'low cost' OBD-II interfaces based on the</div><div class='add'>+	  ELM327 OBD-II interpreter chip.</div><div class='ctx'> </div><div class='del'>-config CAN_JANZ_ICAN3</div><div class='del'>-	tristate "Janz VMOD-ICAN3 Intelligent CAN controller"</div><div class='del'>-	depends on MFD_JANZ_CMODIO</div><div class='del'>-	---help---</div><div class='del'>-	  Driver for Janz VMOD-ICAN3 Intelligent CAN controller module, which</div><div class='del'>-	  connects to a MODULbus carrier board.</div><div class='add'>+	  This is a best effort driver - the ELM327 interface was never</div><div class='add'>+	  designed to be used as a standalone CAN interface. However, it can</div><div class='add'>+	  still be used for simple request-response protocols (such as OBD II),</div><div class='add'>+	  and to monitor broadcast messages on a bus (such as in a vehicle).</div><div class='ctx'> </div><div class='del'>-	  This driver can also be built as a module. If so, the module will be</div><div class='del'>-	  called janz-ican3.ko.</div><div class='add'>+	  Please refer to the documentation for information on how to use it:</div><div class='add'>+	  Documentation/networking/device_drivers/can/can327.rst</div><div class='add'>+</div><div class='add'>+	  If this driver is built as a module, it will be called can327.</div><div class='add'>+</div><div class='add'>+config CAN_DUMMY</div><div class='add'>+	tristate "Dummy CAN"</div><div class='add'>+	help</div><div class='add'>+	  A dummy CAN module supporting Classical CAN, CAN FD and CAN XL. It</div><div class='add'>+	  exposes bittiming values which can be configured through the netlink</div><div class='add'>+	  interface.</div><div class='add'>+</div><div class='add'>+	  The module will simply echo any frame sent to it. If debug messages</div><div class='add'>+	  are activated, it prints all the CAN bittiming information in the</div><div class='add'>+	  kernel log. Aside from that it does nothing.</div><div class='add'>+</div><div class='add'>+	  This is convenient for testing the CAN netlink interface. Most of the</div><div class='add'>+	  users will never need this. If unsure, say NO.</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose M here: the module will be</div><div class='add'>+	  called dummy-can.</div><div class='ctx'> </div><div class='ctx'> config CAN_FLEXCAN</div><div class='ctx'> 	tristate "Support for Freescale FLEXCAN based chips"</div><div class='del'>-	depends on ARM || PPC</div><div class='del'>-	---help---</div><div class='add'>+	depends on OF || COLDFIRE || COMPILE_TEST</div><div class='add'>+	depends on HAS_IOMEM</div><div class='add'>+	select CAN_RX_OFFLOAD</div><div class='add'>+	help</div><div class='ctx'> 	  Say Y here if you want to support for Freescale FlexCAN.</div><div class='ctx'> </div><div class='del'>-config PCH_CAN</div><div class='del'>-	tristate "Intel EG20T PCH CAN controller"</div><div class='del'>-	depends on PCI &amp;&amp; (X86_32 || COMPILE_TEST)</div><div class='del'>-	---help---</div><div class='del'>-	  This driver is for PCH CAN of Topcliff (Intel EG20T PCH) which</div><div class='del'>-	  is an IOH for x86 embedded processor (Intel Atom E6xx series).</div><div class='del'>-	  This driver can access CAN bus.</div><div class='del'>-</div><div class='ctx'> config CAN_GRCAN</div><div class='ctx'> 	tristate "Aeroflex Gaisler GRCAN and GRHCAN CAN devices"</div><div class='del'>-	depends on OF &amp;&amp; HAS_DMA</div><div class='del'>-	---help---</div><div class='add'>+	depends on OF &amp;&amp; HAS_DMA &amp;&amp; HAS_IOMEM</div><div class='add'>+	help</div><div class='ctx'> 	  Say Y here if you want to use Aeroflex Gaisler GRCAN or GRHCAN.</div><div class='ctx'> 	  Note that the driver supports little endian, even though little</div><div class='ctx'> 	  endian syntheses of the cores would need some modifications on</div><div class='ctx'> 	  the hardware level to work.</div><div class='ctx'> </div><div class='del'>-config CAN_RCAR</div><div class='del'>-	tristate "Renesas R-Car CAN controller"</div><div class='del'>-	depends on ARM</div><div class='del'>-	---help---</div><div class='del'>-	  Say Y here if you want to use CAN controller found on Renesas R-Car</div><div class='del'>-	  SoCs.</div><div class='add'>+config CAN_JANZ_ICAN3</div><div class='add'>+	tristate "Janz VMOD-ICAN3 Intelligent CAN controller"</div><div class='add'>+	depends on MFD_JANZ_CMODIO</div><div class='add'>+	help</div><div class='add'>+	  Driver for Janz VMOD-ICAN3 Intelligent CAN controller module, which</div><div class='add'>+	  connects to a MODULbus carrier board.</div><div class='add'>+</div><div class='add'>+	  This driver can also be built as a module. If so, the module will be</div><div class='add'>+	  called janz-ican3.ko.</div><div class='add'>+</div><div class='add'>+config CAN_KVASER_PCIEFD</div><div class='add'>+	depends on PCI</div><div class='add'>+	tristate "Kvaser PCIe FD cards"</div><div class='add'>+	select NET_DEVLINK</div><div class='add'>+	help</div><div class='add'>+	  This is a driver for the Kvaser PCI Express CAN FD family.</div><div class='add'>+</div><div class='add'>+	  Supported devices:</div><div class='add'>+	    Kvaser PCIEcan 4xHS</div><div class='add'>+	    Kvaser PCIEcan 2xHS v2</div><div class='add'>+	    Kvaser PCIEcan HS v2</div><div class='add'>+	    Kvaser PCIEcan 1xCAN v3</div><div class='add'>+	    Kvaser PCIEcan 2xCAN v3</div><div class='add'>+	    Kvaser PCIEcan 4xCAN v2</div><div class='add'>+	    Kvaser Mini PCI Express HS v2</div><div class='add'>+	    Kvaser Mini PCI Express 2xHS v2</div><div class='add'>+	    Kvaser Mini PCI Express 1xCAN v3</div><div class='add'>+	    Kvaser Mini PCI Express 2xCAN v3</div><div class='add'>+	    Kvaser M.2 PCIe 4xCAN</div><div class='add'>+	    Kvaser PCIe 8xCAN</div><div class='add'>+</div><div class='add'>+config CAN_SLCAN</div><div class='add'>+	tristate "Serial / USB serial CAN Adaptors (slcan)"</div><div class='add'>+	depends on TTY</div><div class='add'>+	help</div><div class='add'>+	  CAN driver for several 'low cost' CAN interfaces that are attached</div><div class='add'>+	  via serial lines or via USB-to-serial adapters using the LAWICEL</div><div class='add'>+	  ASCII protocol. The driver implements the tty linediscipline N_SLCAN.</div><div class='add'>+</div><div class='add'>+	  As only the sending and receiving of CAN frames is implemented, this</div><div class='add'>+	  driver should work with the (serial/USB) CAN hardware from:</div><div class='add'>+	  www.canusb.com / www.can232.com / www.mictronics.de / www.canhack.de</div><div class='add'>+</div><div class='add'>+	  Userspace tools to attach the SLCAN line discipline (slcan_attach,</div><div class='add'>+	  slcand) can be found in the can-utils at the linux-can project, see</div><div class='add'>+	  https://github.com/linux-can/can-utils for details.</div><div class='add'>+</div><div class='add'>+	  This driver can also be built as a module. If so, the module</div><div class='add'>+	  will be called slcan.</div><div class='add'>+</div><div class='add'>+config CAN_SUN4I</div><div class='add'>+	tristate "Allwinner A10 CAN controller"</div><div class='add'>+	depends on MACH_SUN4I || MACH_SUN7I || (RISCV &amp;&amp; ARCH_SUNXI) || COMPILE_TEST</div><div class='add'>+	help</div><div class='add'>+	  Say Y here if you want to use CAN controller found on Allwinner</div><div class='add'>+	  A10/A20/D1 SoCs.</div><div class='ctx'> </div><div class='ctx'> 	  To compile this driver as a module, choose M here: the module will</div><div class='del'>-	  be called rcar_can.</div><div class='add'>+	  be called sun4i_can.</div><div class='add'>+</div><div class='add'>+config CAN_TI_HECC</div><div class='add'>+	depends on ARM || COMPILE_TEST</div><div class='add'>+	tristate "TI High End CAN Controller"</div><div class='add'>+	select CAN_RX_OFFLOAD</div><div class='add'>+	help</div><div class='add'>+	  Driver for TI HECC (High End CAN Controller) module found on many</div><div class='add'>+	  TI devices. The device specifications are available from www.ti.com</div><div class='ctx'> </div><div class='ctx'> config CAN_XILINXCAN</div><div class='ctx'> 	tristate "Xilinx CAN"</div><div class='ctx'> 	depends on ARCH_ZYNQ || ARM64 || MICROBLAZE || COMPILE_TEST</div><div class='ctx'> 	depends on COMMON_CLK &amp;&amp; HAS_IOMEM</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  Xilinx CAN driver. This driver supports both soft AXI CAN IP and</div><div class='ctx'> 	  Zynq CANPS IP.</div><div class='ctx'> </div><div class='del'>-source "drivers/net/can/mscan/Kconfig"</div><div class='del'>-</div><div class='del'>-source "drivers/net/can/sja1000/Kconfig"</div><div class='del'>-</div><div class='ctx'> source "drivers/net/can/c_can/Kconfig"</div><div class='del'>-</div><div class='del'>-source "drivers/net/can/m_can/Kconfig"</div><div class='del'>-</div><div class='ctx'> source "drivers/net/can/cc770/Kconfig"</div><div class='del'>-</div><div class='add'>+source "drivers/net/can/ctucanfd/Kconfig"</div><div class='add'>+source "drivers/net/can/esd/Kconfig"</div><div class='add'>+source "drivers/net/can/ifi_canfd/Kconfig"</div><div class='add'>+source "drivers/net/can/m_can/Kconfig"</div><div class='add'>+source "drivers/net/can/mscan/Kconfig"</div><div class='add'>+source "drivers/net/can/peak_canfd/Kconfig"</div><div class='add'>+source "drivers/net/can/rcar/Kconfig"</div><div class='add'>+source "drivers/net/can/rockchip/Kconfig"</div><div class='add'>+source "drivers/net/can/sja1000/Kconfig"</div><div class='add'>+source "drivers/net/can/softing/Kconfig"</div><div class='ctx'> source "drivers/net/can/spi/Kconfig"</div><div class='del'>-</div><div class='ctx'> source "drivers/net/can/usb/Kconfig"</div><div class='ctx'> </div><div class='del'>-source "drivers/net/can/softing/Kconfig"</div><div class='del'>-</div><div class='del'>-endif</div><div class='add'>+endif #CAN_NETLINK</div><div class='ctx'> </div><div class='ctx'> config CAN_DEBUG_DEVICES</div><div class='ctx'> 	bool "CAN devices debugging messages"</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  Say Y here if you want the CAN device drivers to produce a bunch of</div><div class='ctx'> 	  debug messages to the system log.  Select this if you are having</div><div class='ctx'> 	  a problem with CAN support and want to see more of what is going</div><div class='ctx'> 	  on.</div><div class='ctx'> </div><div class='del'>-endmenu</div><div class='add'>+endif #CAN_DEV</div><div class='head'>diff --git a/drivers/net/can/Makefile b/drivers/net/can/Makefile<br/>index c533c62b0f5e..d7bc10a6b8ea 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/Makefile?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/Makefile</a></div><div class='hunk'>@@ -1,33 +1,38 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> #</div><div class='ctx'> #  Makefile for the Linux Controller Area Network drivers.</div><div class='ctx'> #</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_CAN_VCAN)		+= vcan.o</div><div class='del'>-obj-$(CONFIG_CAN_SLCAN)		+= slcan.o</div><div class='del'>-</div><div class='del'>-obj-$(CONFIG_CAN_DEV)		+= can-dev.o</div><div class='del'>-can-dev-y			:= dev.o</div><div class='del'>-</div><div class='del'>-can-dev-$(CONFIG_CAN_LEDS)	+= led.o</div><div class='add'>+obj-$(CONFIG_CAN_VXCAN)		+= vxcan.o</div><div class='add'>+obj-$(CONFIG_CAN_SLCAN)		+= slcan/</div><div class='ctx'> </div><div class='add'>+obj-y				+= dev/</div><div class='add'>+obj-y				+= esd/</div><div class='add'>+obj-y				+= rcar/</div><div class='add'>+obj-y				+= rockchip/</div><div class='ctx'> obj-y				+= spi/</div><div class='ctx'> obj-y				+= usb/</div><div class='ctx'> obj-y				+= softing/</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_CAN_SJA1000)	+= sja1000/</div><div class='del'>-obj-$(CONFIG_CAN_MSCAN)		+= mscan/</div><div class='add'>+obj-$(CONFIG_CAN_AT91)		+= at91_can.o</div><div class='add'>+obj-$(CONFIG_CAN_BXCAN)		+= bxcan.o</div><div class='add'>+obj-$(CONFIG_CAN_CAN327)	+= can327.o</div><div class='add'>+obj-$(CONFIG_CAN_CC770)		+= cc770/</div><div class='ctx'> obj-$(CONFIG_CAN_C_CAN)		+= c_can/</div><div class='add'>+obj-$(CONFIG_CAN_CTUCANFD)	+= ctucanfd/</div><div class='add'>+obj-$(CONFIG_CAN_DUMMY)		+= dummy_can.o</div><div class='add'>+obj-$(CONFIG_CAN_FLEXCAN)	+= flexcan/</div><div class='add'>+obj-$(CONFIG_CAN_GRCAN)		+= grcan.o</div><div class='add'>+obj-$(CONFIG_CAN_IFI_CANFD)	+= ifi_canfd/</div><div class='add'>+obj-$(CONFIG_CAN_JANZ_ICAN3)	+= janz-ican3.o</div><div class='add'>+obj-$(CONFIG_CAN_KVASER_PCIEFD)	+= kvaser_pciefd/</div><div class='add'>+obj-$(CONFIG_CAN_MSCAN)		+= mscan/</div><div class='ctx'> obj-$(CONFIG_CAN_M_CAN)		+= m_can/</div><div class='del'>-obj-$(CONFIG_CAN_CC770)		+= cc770/</div><div class='del'>-obj-$(CONFIG_CAN_AT91)		+= at91_can.o</div><div class='add'>+obj-$(CONFIG_CAN_PEAK_PCIEFD)	+= peak_canfd/</div><div class='add'>+obj-$(CONFIG_CAN_SJA1000)	+= sja1000/</div><div class='add'>+obj-$(CONFIG_CAN_SUN4I)		+= sun4i_can.o</div><div class='ctx'> obj-$(CONFIG_CAN_TI_HECC)	+= ti_hecc.o</div><div class='del'>-obj-$(CONFIG_CAN_BFIN)		+= bfin_can.o</div><div class='del'>-obj-$(CONFIG_CAN_JANZ_ICAN3)	+= janz-ican3.o</div><div class='del'>-obj-$(CONFIG_CAN_FLEXCAN)	+= flexcan.o</div><div class='del'>-obj-$(CONFIG_PCH_CAN)		+= pch_can.o</div><div class='del'>-obj-$(CONFIG_CAN_GRCAN)		+= grcan.o</div><div class='del'>-obj-$(CONFIG_CAN_RCAR)		+= rcar_can.o</div><div class='ctx'> obj-$(CONFIG_CAN_XILINXCAN)	+= xilinx_can.o</div><div class='ctx'> </div><div class='del'>-subdir-ccflags-y += -D__CHECK_ENDIAN__</div><div class='ctx'> subdir-ccflags-$(CONFIG_CAN_DEBUG_DEVICES) += -DDEBUG</div><div class='head'>diff --git a/drivers/net/can/at91_can.c b/drivers/net/can/at91_can.c<br/>index 945c0955a967..c2a3a4eef5b2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/at91_can.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/at91_can.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/at91_can.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/at91_can.c</a></div><div class='hunk'>@@ -1,127 +1,140 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='ctx'>  * at91_can.c - CAN network driver for AT91 SoC CAN controller</div><div class='ctx'>  *</div><div class='ctx'>  * (C) 2007 by Hans J. Koch &lt;hjk@hansjkoch.de&gt;</div><div class='del'>- * (C) 2008, 2009, 2010, 2011 by Marc Kleine-Budde &lt;kernel@pengutronix.de&gt;</div><div class='del'>- *</div><div class='del'>- * This software may be distributed under the terms of the GNU General</div><div class='del'>- * Public License ("GPL") version 2 as distributed in the 'COPYING'</div><div class='del'>- * file from the main directory of the linux kernel source.</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- * Your platform definition file should specify something like:</div><div class='del'>- *</div><div class='del'>- * static struct at91_can_data ek_can_data = {</div><div class='del'>- *	transceiver_switch = sam9263ek_transceiver_switch,</div><div class='del'>- * };</div><div class='del'>- *</div><div class='del'>- * at91_add_device_can(&amp;ek_can_data);</div><div class='del'>- *</div><div class='add'>+ * (C) 2008, 2009, 2010, 2011, 2023 by Marc Kleine-Budde &lt;kernel@pengutronix.de&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='ctx'> #include &lt;linux/if_arp.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/phy/phy.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/rtnetlink.h&gt;</div><div class='ctx'> #include &lt;linux/skbuff.h&gt;</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/platform_data/atmel.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/can/dev.h&gt;</div><div class='ctx'> #include &lt;linux/can/error.h&gt;</div><div class='del'>-#include &lt;linux/can/led.h&gt;</div><div class='add'>+#include &lt;linux/can/rx-offload.h&gt;</div><div class='ctx'> </div><div class='del'>-#define AT91_MB_MASK(i)		((1 &lt;&lt; (i)) - 1)</div><div class='add'>+#define AT91_MB_MASK(i) ((1 &lt;&lt; (i)) - 1)</div><div class='ctx'> </div><div class='ctx'> /* Common registers */</div><div class='ctx'> enum at91_reg {</div><div class='del'>-	AT91_MR		= 0x000,</div><div class='del'>-	AT91_IER	= 0x004,</div><div class='del'>-	AT91_IDR	= 0x008,</div><div class='del'>-	AT91_IMR	= 0x00C,</div><div class='del'>-	AT91_SR		= 0x010,</div><div class='del'>-	AT91_BR		= 0x014,</div><div class='del'>-	AT91_TIM	= 0x018,</div><div class='del'>-	AT91_TIMESTP	= 0x01C,</div><div class='del'>-	AT91_ECR	= 0x020,</div><div class='del'>-	AT91_TCR	= 0x024,</div><div class='del'>-	AT91_ACR	= 0x028,</div><div class='add'>+	AT91_MR = 0x000,</div><div class='add'>+	AT91_IER = 0x004,</div><div class='add'>+	AT91_IDR = 0x008,</div><div class='add'>+	AT91_IMR = 0x00C,</div><div class='add'>+	AT91_SR = 0x010,</div><div class='add'>+	AT91_BR = 0x014,</div><div class='add'>+	AT91_TIM = 0x018,</div><div class='add'>+	AT91_TIMESTP = 0x01C,</div><div class='add'>+	AT91_ECR = 0x020,</div><div class='add'>+	AT91_TCR = 0x024,</div><div class='add'>+	AT91_ACR = 0x028,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Mailbox registers (0 &lt;= i &lt;= 15) */</div><div class='del'>-#define AT91_MMR(i)		(enum at91_reg)(0x200 + ((i) * 0x20))</div><div class='del'>-#define AT91_MAM(i)		(enum at91_reg)(0x204 + ((i) * 0x20))</div><div class='del'>-#define AT91_MID(i)		(enum at91_reg)(0x208 + ((i) * 0x20))</div><div class='del'>-#define AT91_MFID(i)		(enum at91_reg)(0x20C + ((i) * 0x20))</div><div class='del'>-#define AT91_MSR(i)		(enum at91_reg)(0x210 + ((i) * 0x20))</div><div class='del'>-#define AT91_MDL(i)		(enum at91_reg)(0x214 + ((i) * 0x20))</div><div class='del'>-#define AT91_MDH(i)		(enum at91_reg)(0x218 + ((i) * 0x20))</div><div class='del'>-#define AT91_MCR(i)		(enum at91_reg)(0x21C + ((i) * 0x20))</div><div class='add'>+#define AT91_MMR(i) ((enum at91_reg)(0x200 + ((i) * 0x20)))</div><div class='add'>+#define AT91_MAM(i) ((enum at91_reg)(0x204 + ((i) * 0x20)))</div><div class='add'>+#define AT91_MID(i) ((enum at91_reg)(0x208 + ((i) * 0x20)))</div><div class='add'>+#define AT91_MFID(i) ((enum at91_reg)(0x20C + ((i) * 0x20)))</div><div class='add'>+#define AT91_MSR(i) ((enum at91_reg)(0x210 + ((i) * 0x20)))</div><div class='add'>+#define AT91_MDL(i) ((enum at91_reg)(0x214 + ((i) * 0x20)))</div><div class='add'>+#define AT91_MDH(i) ((enum at91_reg)(0x218 + ((i) * 0x20)))</div><div class='add'>+#define AT91_MCR(i) ((enum at91_reg)(0x21C + ((i) * 0x20)))</div><div class='ctx'> </div><div class='ctx'> /* Register bits */</div><div class='del'>-#define AT91_MR_CANEN		BIT(0)</div><div class='del'>-#define AT91_MR_LPM		BIT(1)</div><div class='del'>-#define AT91_MR_ABM		BIT(2)</div><div class='del'>-#define AT91_MR_OVL		BIT(3)</div><div class='del'>-#define AT91_MR_TEOF		BIT(4)</div><div class='del'>-#define AT91_MR_TTM		BIT(5)</div><div class='del'>-#define AT91_MR_TIMFRZ		BIT(6)</div><div class='del'>-#define AT91_MR_DRPT		BIT(7)</div><div class='del'>-</div><div class='del'>-#define AT91_SR_RBSY		BIT(29)</div><div class='del'>-</div><div class='del'>-#define AT91_MMR_PRIO_SHIFT	(16)</div><div class='del'>-</div><div class='del'>-#define AT91_MID_MIDE		BIT(29)</div><div class='del'>-</div><div class='del'>-#define AT91_MSR_MRTR		BIT(20)</div><div class='del'>-#define AT91_MSR_MABT		BIT(22)</div><div class='del'>-#define AT91_MSR_MRDY		BIT(23)</div><div class='del'>-#define AT91_MSR_MMI		BIT(24)</div><div class='del'>-</div><div class='del'>-#define AT91_MCR_MRTR		BIT(20)</div><div class='del'>-#define AT91_MCR_MTCR		BIT(23)</div><div class='add'>+#define AT91_MR_CANEN BIT(0)</div><div class='add'>+#define AT91_MR_LPM BIT(1)</div><div class='add'>+#define AT91_MR_ABM BIT(2)</div><div class='add'>+#define AT91_MR_OVL BIT(3)</div><div class='add'>+#define AT91_MR_TEOF BIT(4)</div><div class='add'>+#define AT91_MR_TTM BIT(5)</div><div class='add'>+#define AT91_MR_TIMFRZ BIT(6)</div><div class='add'>+#define AT91_MR_DRPT BIT(7)</div><div class='add'>+</div><div class='add'>+#define AT91_SR_RBSY BIT(29)</div><div class='add'>+#define AT91_SR_TBSY BIT(30)</div><div class='add'>+#define AT91_SR_OVLSY BIT(31)</div><div class='add'>+</div><div class='add'>+#define AT91_BR_PHASE2_MASK GENMASK(2, 0)</div><div class='add'>+#define AT91_BR_PHASE1_MASK GENMASK(6, 4)</div><div class='add'>+#define AT91_BR_PROPAG_MASK GENMASK(10, 8)</div><div class='add'>+#define AT91_BR_SJW_MASK GENMASK(13, 12)</div><div class='add'>+#define AT91_BR_BRP_MASK GENMASK(22, 16)</div><div class='add'>+#define AT91_BR_SMP BIT(24)</div><div class='add'>+</div><div class='add'>+#define AT91_TIM_TIMER_MASK GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define AT91_ECR_REC_MASK GENMASK(8, 0)</div><div class='add'>+#define AT91_ECR_TEC_MASK GENMASK(23, 16)</div><div class='add'>+</div><div class='add'>+#define AT91_TCR_TIMRST BIT(31)</div><div class='add'>+</div><div class='add'>+#define AT91_MMR_MTIMEMARK_MASK GENMASK(15, 0)</div><div class='add'>+#define AT91_MMR_PRIOR_MASK GENMASK(19, 16)</div><div class='add'>+#define AT91_MMR_MOT_MASK GENMASK(26, 24)</div><div class='add'>+</div><div class='add'>+#define AT91_MID_MIDVB_MASK GENMASK(17, 0)</div><div class='add'>+#define AT91_MID_MIDVA_MASK GENMASK(28, 18)</div><div class='add'>+#define AT91_MID_MIDE BIT(29)</div><div class='add'>+</div><div class='add'>+#define AT91_MSR_MTIMESTAMP_MASK GENMASK(15, 0)</div><div class='add'>+#define AT91_MSR_MDLC_MASK GENMASK(19, 16)</div><div class='add'>+#define AT91_MSR_MRTR BIT(20)</div><div class='add'>+#define AT91_MSR_MABT BIT(22)</div><div class='add'>+#define AT91_MSR_MRDY BIT(23)</div><div class='add'>+#define AT91_MSR_MMI BIT(24)</div><div class='add'>+</div><div class='add'>+#define AT91_MCR_MDLC_MASK GENMASK(19, 16)</div><div class='add'>+#define AT91_MCR_MRTR BIT(20)</div><div class='add'>+#define AT91_MCR_MACR BIT(22)</div><div class='add'>+#define AT91_MCR_MTCR BIT(23)</div><div class='ctx'> </div><div class='ctx'> /* Mailbox Modes */</div><div class='ctx'> enum at91_mb_mode {</div><div class='del'>-	AT91_MB_MODE_DISABLED	= 0,</div><div class='del'>-	AT91_MB_MODE_RX		= 1,</div><div class='del'>-	AT91_MB_MODE_RX_OVRWR	= 2,</div><div class='del'>-	AT91_MB_MODE_TX		= 3,</div><div class='del'>-	AT91_MB_MODE_CONSUMER	= 4,</div><div class='del'>-	AT91_MB_MODE_PRODUCER	= 5,</div><div class='add'>+	AT91_MB_MODE_DISABLED = 0,</div><div class='add'>+	AT91_MB_MODE_RX = 1,</div><div class='add'>+	AT91_MB_MODE_RX_OVRWR = 2,</div><div class='add'>+	AT91_MB_MODE_TX = 3,</div><div class='add'>+	AT91_MB_MODE_CONSUMER = 4,</div><div class='add'>+	AT91_MB_MODE_PRODUCER = 5,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Interrupt mask bits */</div><div class='del'>-#define AT91_IRQ_ERRA		(1 &lt;&lt; 16)</div><div class='del'>-#define AT91_IRQ_WARN		(1 &lt;&lt; 17)</div><div class='del'>-#define AT91_IRQ_ERRP		(1 &lt;&lt; 18)</div><div class='del'>-#define AT91_IRQ_BOFF		(1 &lt;&lt; 19)</div><div class='del'>-#define AT91_IRQ_SLEEP		(1 &lt;&lt; 20)</div><div class='del'>-#define AT91_IRQ_WAKEUP		(1 &lt;&lt; 21)</div><div class='del'>-#define AT91_IRQ_TOVF		(1 &lt;&lt; 22)</div><div class='del'>-#define AT91_IRQ_TSTP		(1 &lt;&lt; 23)</div><div class='del'>-#define AT91_IRQ_CERR		(1 &lt;&lt; 24)</div><div class='del'>-#define AT91_IRQ_SERR		(1 &lt;&lt; 25)</div><div class='del'>-#define AT91_IRQ_AERR		(1 &lt;&lt; 26)</div><div class='del'>-#define AT91_IRQ_FERR		(1 &lt;&lt; 27)</div><div class='del'>-#define AT91_IRQ_BERR		(1 &lt;&lt; 28)</div><div class='del'>-</div><div class='del'>-#define AT91_IRQ_ERR_ALL	(0x1fff0000)</div><div class='del'>-#define AT91_IRQ_ERR_FRAME	(AT91_IRQ_CERR | AT91_IRQ_SERR | \</div><div class='del'>-				 AT91_IRQ_AERR | AT91_IRQ_FERR | AT91_IRQ_BERR)</div><div class='del'>-#define AT91_IRQ_ERR_LINE	(AT91_IRQ_ERRA | AT91_IRQ_WARN | \</div><div class='del'>-				 AT91_IRQ_ERRP | AT91_IRQ_BOFF)</div><div class='del'>-</div><div class='del'>-#define AT91_IRQ_ALL		(0x1fffffff)</div><div class='add'>+#define AT91_IRQ_ERRA BIT(16)</div><div class='add'>+#define AT91_IRQ_WARN BIT(17)</div><div class='add'>+#define AT91_IRQ_ERRP BIT(18)</div><div class='add'>+#define AT91_IRQ_BOFF BIT(19)</div><div class='add'>+#define AT91_IRQ_SLEEP BIT(20)</div><div class='add'>+#define AT91_IRQ_WAKEUP BIT(21)</div><div class='add'>+#define AT91_IRQ_TOVF BIT(22)</div><div class='add'>+#define AT91_IRQ_TSTP BIT(23)</div><div class='add'>+#define AT91_IRQ_CERR BIT(24)</div><div class='add'>+#define AT91_IRQ_SERR BIT(25)</div><div class='add'>+#define AT91_IRQ_AERR BIT(26)</div><div class='add'>+#define AT91_IRQ_FERR BIT(27)</div><div class='add'>+#define AT91_IRQ_BERR BIT(28)</div><div class='add'>+</div><div class='add'>+#define AT91_IRQ_ERR_ALL (0x1fff0000)</div><div class='add'>+#define AT91_IRQ_ERR_FRAME (AT91_IRQ_CERR | AT91_IRQ_SERR | \</div><div class='add'>+			    AT91_IRQ_AERR | AT91_IRQ_FERR | AT91_IRQ_BERR)</div><div class='add'>+#define AT91_IRQ_ERR_LINE (AT91_IRQ_ERRA | AT91_IRQ_WARN | \</div><div class='add'>+			   AT91_IRQ_ERRP | AT91_IRQ_BOFF)</div><div class='add'>+</div><div class='add'>+#define AT91_IRQ_ALL (0x1fffffff)</div><div class='ctx'> </div><div class='ctx'> enum at91_devtype {</div><div class='ctx'> 	AT91_DEVTYPE_SAM9263,</div><div class='hunk'>@@ -130,7 +143,6 @@ enum at91_devtype {</div><div class='ctx'> </div><div class='ctx'> struct at91_devtype_data {</div><div class='ctx'> 	unsigned int rx_first;</div><div class='del'>-	unsigned int rx_split;</div><div class='ctx'> 	unsigned int rx_last;</div><div class='ctx'> 	unsigned int tx_shift;</div><div class='ctx'> 	enum at91_devtype type;</div><div class='hunk'>@@ -138,14 +150,13 @@ struct at91_devtype_data {</div><div class='ctx'> </div><div class='ctx'> struct at91_priv {</div><div class='ctx'> 	struct can_priv can;		/* must be the first member! */</div><div class='del'>-	struct napi_struct napi;</div><div class='add'>+	struct can_rx_offload offload;</div><div class='add'>+	struct phy *transceiver;</div><div class='ctx'> </div><div class='ctx'> 	void __iomem *reg_base;</div><div class='ctx'> </div><div class='del'>-	u32 reg_sr;</div><div class='del'>-	unsigned int tx_next;</div><div class='del'>-	unsigned int tx_echo;</div><div class='del'>-	unsigned int rx_next;</div><div class='add'>+	unsigned int tx_head;</div><div class='add'>+	unsigned int tx_tail;</div><div class='ctx'> 	struct at91_devtype_data devtype_data;</div><div class='ctx'> </div><div class='ctx'> 	struct clk *clk;</div><div class='hunk'>@@ -154,9 +165,13 @@ struct at91_priv {</div><div class='ctx'> 	canid_t mb0_id;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static inline struct at91_priv *rx_offload_to_priv(struct can_rx_offload *offload)</div><div class='add'>+{</div><div class='add'>+	return container_of(offload, struct at91_priv, offload);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct at91_devtype_data at91_at91sam9263_data = {</div><div class='ctx'> 	.rx_first = 1,</div><div class='del'>-	.rx_split = 8,</div><div class='ctx'> 	.rx_last = 11,</div><div class='ctx'> 	.tx_shift = 2,</div><div class='ctx'> 	.type = AT91_DEVTYPE_SAM9263,</div><div class='hunk'>@@ -164,7 +179,6 @@ static const struct at91_devtype_data at91_at91sam9263_data = {</div><div class='ctx'> </div><div class='ctx'> static const struct at91_devtype_data at91_at91sam9x5_data = {</div><div class='ctx'> 	.rx_first = 0,</div><div class='del'>-	.rx_split = 4,</div><div class='ctx'> 	.rx_last = 5,</div><div class='ctx'> 	.tx_shift = 1,</div><div class='ctx'> 	.type = AT91_DEVTYPE_SAM9X5,</div><div class='hunk'>@@ -177,13 +191,13 @@ static const struct can_bittiming_const at91_bittiming_const = {</div><div class='ctx'> 	.tseg2_min	= 2,</div><div class='ctx'> 	.tseg2_max	= 8,</div><div class='ctx'> 	.sjw_max	= 4,</div><div class='del'>-	.brp_min 	= 2,</div><div class='add'>+	.brp_min	= 2,</div><div class='ctx'> 	.brp_max	= 128,</div><div class='ctx'> 	.brp_inc	= 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define AT91_IS(_model) \</div><div class='del'>-static inline int at91_is_sam##_model(const struct at91_priv *priv) \</div><div class='add'>+static inline int __maybe_unused at91_is_sam##_model(const struct at91_priv *priv) \</div><div class='ctx'> { \</div><div class='ctx'> 	return priv-&gt;devtype_data.type == AT91_DEVTYPE_SAM##_model; \</div><div class='ctx'> }</div><div class='hunk'>@@ -201,27 +215,6 @@ static inline unsigned int get_mb_rx_last(const struct at91_priv *priv)</div><div class='ctx'> 	return priv-&gt;devtype_data.rx_last;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline unsigned int get_mb_rx_split(const struct at91_priv *priv)</div><div class='del'>-{</div><div class='del'>-	return priv-&gt;devtype_data.rx_split;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned int get_mb_rx_num(const struct at91_priv *priv)</div><div class='del'>-{</div><div class='del'>-	return get_mb_rx_last(priv) - get_mb_rx_first(priv) + 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned int get_mb_rx_low_last(const struct at91_priv *priv)</div><div class='del'>-{</div><div class='del'>-	return get_mb_rx_split(priv) - 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned int get_mb_rx_low_mask(const struct at91_priv *priv)</div><div class='del'>-{</div><div class='del'>-	return AT91_MB_MASK(get_mb_rx_split(priv)) &amp;</div><div class='del'>-		~AT91_MB_MASK(get_mb_rx_first(priv));</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static inline unsigned int get_mb_tx_shift(const struct at91_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	return priv-&gt;devtype_data.tx_shift;</div><div class='hunk'>@@ -242,24 +235,24 @@ static inline unsigned int get_mb_tx_last(const struct at91_priv *priv)</div><div class='ctx'> 	return get_mb_tx_first(priv) + get_mb_tx_num(priv) - 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline unsigned int get_next_prio_shift(const struct at91_priv *priv)</div><div class='add'>+static inline unsigned int get_head_prio_shift(const struct at91_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	return get_mb_tx_shift(priv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline unsigned int get_next_prio_mask(const struct at91_priv *priv)</div><div class='add'>+static inline unsigned int get_head_prio_mask(const struct at91_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	return 0xf &lt;&lt; get_mb_tx_shift(priv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline unsigned int get_next_mb_mask(const struct at91_priv *priv)</div><div class='add'>+static inline unsigned int get_head_mb_mask(const struct at91_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	return AT91_MB_MASK(get_mb_tx_shift(priv));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline unsigned int get_next_mask(const struct at91_priv *priv)</div><div class='add'>+static inline unsigned int get_head_mask(const struct at91_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	return get_next_mb_mask(priv) | get_next_prio_mask(priv);</div><div class='add'>+	return get_head_mb_mask(priv) | get_head_prio_mask(priv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline unsigned int get_irq_mb_rx(const struct at91_priv *priv)</div><div class='hunk'>@@ -274,19 +267,19 @@ static inline unsigned int get_irq_mb_tx(const struct at91_priv *priv)</div><div class='ctx'> 		~AT91_MB_MASK(get_mb_tx_first(priv));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline unsigned int get_tx_next_mb(const struct at91_priv *priv)</div><div class='add'>+static inline unsigned int get_tx_head_mb(const struct at91_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	return (priv-&gt;tx_next &amp; get_next_mb_mask(priv)) + get_mb_tx_first(priv);</div><div class='add'>+	return (priv-&gt;tx_head &amp; get_head_mb_mask(priv)) + get_mb_tx_first(priv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline unsigned int get_tx_next_prio(const struct at91_priv *priv)</div><div class='add'>+static inline unsigned int get_tx_head_prio(const struct at91_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	return (priv-&gt;tx_next &gt;&gt; get_next_prio_shift(priv)) &amp; 0xf;</div><div class='add'>+	return (priv-&gt;tx_head &gt;&gt; get_head_prio_shift(priv)) &amp; 0xf;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline unsigned int get_tx_echo_mb(const struct at91_priv *priv)</div><div class='add'>+static inline unsigned int get_tx_tail_mb(const struct at91_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	return (priv-&gt;tx_echo &amp; get_next_mb_mask(priv)) + get_mb_tx_first(priv);</div><div class='add'>+	return (priv-&gt;tx_tail &amp; get_head_mb_mask(priv)) + get_mb_tx_first(priv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline u32 at91_read(const struct at91_priv *priv, enum at91_reg reg)</div><div class='hunk'>@@ -295,19 +288,23 @@ static inline u32 at91_read(const struct at91_priv *priv, enum at91_reg reg)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void at91_write(const struct at91_priv *priv, enum at91_reg reg,</div><div class='del'>-		u32 value)</div><div class='add'>+			      u32 value)</div><div class='ctx'> {</div><div class='ctx'> 	writel_relaxed(value, priv-&gt;reg_base + reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void set_mb_mode_prio(const struct at91_priv *priv,</div><div class='del'>-		unsigned int mb, enum at91_mb_mode mode, int prio)</div><div class='add'>+				    unsigned int mb, enum at91_mb_mode mode,</div><div class='add'>+				    u8 prio)</div><div class='ctx'> {</div><div class='del'>-	at91_write(priv, AT91_MMR(mb), (mode &lt;&lt; 24) | (prio &lt;&lt; 16));</div><div class='add'>+	const u32 reg_mmr = FIELD_PREP(AT91_MMR_MOT_MASK, mode) |</div><div class='add'>+		FIELD_PREP(AT91_MMR_PRIOR_MASK, prio);</div><div class='add'>+</div><div class='add'>+	at91_write(priv, AT91_MMR(mb), reg_mmr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void set_mb_mode(const struct at91_priv *priv, unsigned int mb,</div><div class='del'>-		enum at91_mb_mode mode)</div><div class='add'>+			       enum at91_mb_mode mode)</div><div class='ctx'> {</div><div class='ctx'> 	set_mb_mode_prio(priv, mb, mode, 0);</div><div class='ctx'> }</div><div class='hunk'>@@ -317,32 +314,23 @@ static inline u32 at91_can_id_to_reg_mid(canid_t can_id)</div><div class='ctx'> 	u32 reg_mid;</div><div class='ctx'> </div><div class='ctx'> 	if (can_id &amp; CAN_EFF_FLAG)</div><div class='del'>-		reg_mid = (can_id &amp; CAN_EFF_MASK) | AT91_MID_MIDE;</div><div class='add'>+		reg_mid = FIELD_PREP(AT91_MID_MIDVA_MASK | AT91_MID_MIDVB_MASK, can_id) |</div><div class='add'>+			AT91_MID_MIDE;</div><div class='ctx'> 	else</div><div class='del'>-		reg_mid = (can_id &amp; CAN_SFF_MASK) &lt;&lt; 18;</div><div class='add'>+		reg_mid = FIELD_PREP(AT91_MID_MIDVA_MASK, can_id);</div><div class='ctx'> </div><div class='ctx'> 	return reg_mid;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Swtich transceiver on or off</div><div class='del'>- */</div><div class='del'>-static void at91_transceiver_switch(const struct at91_priv *priv, int on)</div><div class='del'>-{</div><div class='del'>-	if (priv-&gt;pdata &amp;&amp; priv-&gt;pdata-&gt;transceiver_switch)</div><div class='del'>-		priv-&gt;pdata-&gt;transceiver_switch(on);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void at91_setup_mailboxes(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct at91_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> 	u32 reg_mid;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Due to a chip bug (errata 50.2.6.3 &amp; 50.3.5.3) the first</div><div class='del'>-	 * mailbox is disabled. The next 11 mailboxes are used as a</div><div class='del'>-	 * reception FIFO. The last mailbox is configured with</div><div class='add'>+	/* Due to a chip bug (errata 50.2.6.3 &amp; 50.3.5.3) the first</div><div class='add'>+	 * mailbox is disabled. The next mailboxes are used as a</div><div class='add'>+	 * reception FIFO. The last of the RX mailboxes is configured with</div><div class='ctx'> 	 * overwrite option. The overwrite flag indicates a FIFO</div><div class='ctx'> 	 * overflow.</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -363,27 +351,30 @@ static void at91_setup_mailboxes(struct net_device *dev)</div><div class='ctx'> 		at91_write(priv, AT91_MID(i), AT91_MID_MIDE);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* The last 4 mailboxes are used for transmitting. */</div><div class='add'>+	/* The last mailboxes are used for transmitting. */</div><div class='ctx'> 	for (i = get_mb_tx_first(priv); i &lt;= get_mb_tx_last(priv); i++)</div><div class='ctx'> 		set_mb_mode_prio(priv, i, AT91_MB_MODE_TX, 0);</div><div class='ctx'> </div><div class='del'>-	/* Reset tx and rx helper pointers */</div><div class='del'>-	priv-&gt;tx_next = priv-&gt;tx_echo = 0;</div><div class='del'>-	priv-&gt;rx_next = get_mb_rx_first(priv);</div><div class='add'>+	/* Reset tx helper pointers */</div><div class='add'>+	priv-&gt;tx_head = priv-&gt;tx_tail = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int at91_set_bittiming(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	const struct at91_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	const struct can_bittiming *bt = &amp;priv-&gt;can.bittiming;</div><div class='del'>-	u32 reg_br;</div><div class='add'>+	u32 reg_br = 0;</div><div class='ctx'> </div><div class='del'>-	reg_br = ((priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_3_SAMPLES) ? 1 &lt;&lt; 24 : 0) |</div><div class='del'>-		((bt-&gt;brp - 1) &lt;&lt; 16) | ((bt-&gt;sjw - 1) &lt;&lt; 12) |</div><div class='del'>-		((bt-&gt;prop_seg - 1) &lt;&lt; 8) | ((bt-&gt;phase_seg1 - 1) &lt;&lt; 4) |</div><div class='del'>-		((bt-&gt;phase_seg2 - 1) &lt;&lt; 0);</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_3_SAMPLES)</div><div class='add'>+		reg_br |= AT91_BR_SMP;</div><div class='ctx'> </div><div class='del'>-	netdev_info(dev, "writing AT91_BR: 0x%08x\n", reg_br);</div><div class='add'>+	reg_br |= FIELD_PREP(AT91_BR_BRP_MASK, bt-&gt;brp - 1) |</div><div class='add'>+		FIELD_PREP(AT91_BR_SJW_MASK, bt-&gt;sjw - 1) |</div><div class='add'>+		FIELD_PREP(AT91_BR_PROPAG_MASK, bt-&gt;prop_seg - 1) |</div><div class='add'>+		FIELD_PREP(AT91_BR_PHASE1_MASK, bt-&gt;phase_seg1 - 1) |</div><div class='add'>+		FIELD_PREP(AT91_BR_PHASE2_MASK, bt-&gt;phase_seg2 - 1);</div><div class='add'>+</div><div class='add'>+	netdev_dbg(dev, "writing AT91_BR: 0x%08x\n", reg_br);</div><div class='ctx'> </div><div class='ctx'> 	at91_write(priv, AT91_BR, reg_br);</div><div class='ctx'> </div><div class='hunk'>@@ -391,13 +382,13 @@ static int at91_set_bittiming(struct net_device *dev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int at91_get_berr_counter(const struct net_device *dev,</div><div class='del'>-		struct can_berr_counter *bec)</div><div class='add'>+				 struct can_berr_counter *bec)</div><div class='ctx'> {</div><div class='ctx'> 	const struct at91_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	u32 reg_ecr = at91_read(priv, AT91_ECR);</div><div class='ctx'> </div><div class='del'>-	bec-&gt;rxerr = reg_ecr &amp; 0xff;</div><div class='del'>-	bec-&gt;txerr = reg_ecr &gt;&gt; 16;</div><div class='add'>+	bec-&gt;rxerr = FIELD_GET(AT91_ECR_REC_MASK, reg_ecr);</div><div class='add'>+	bec-&gt;txerr = FIELD_GET(AT91_ECR_TEC_MASK, reg_ecr);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -416,7 +407,6 @@ static void at91_chip_start(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	at91_set_bittiming(dev);</div><div class='ctx'> 	at91_setup_mailboxes(dev);</div><div class='del'>-	at91_transceiver_switch(priv, 1);</div><div class='ctx'> </div><div class='ctx'> 	/* enable chip */</div><div class='ctx'> 	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LISTENONLY)</div><div class='hunk'>@@ -427,9 +417,13 @@ static void at91_chip_start(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='ctx'> </div><div class='add'>+	/* Dummy read to clear latched line error interrupts on</div><div class='add'>+	 * sam9x5 and newer SoCs.</div><div class='add'>+	 */</div><div class='add'>+	at91_read(priv, AT91_SR);</div><div class='add'>+</div><div class='ctx'> 	/* Enable interrupts */</div><div class='del'>-	reg_ier = get_irq_mb_rx(priv) | AT91_IRQ_ERRP | AT91_IRQ_ERR_FRAME;</div><div class='del'>-	at91_write(priv, AT91_IDR, AT91_IRQ_ALL);</div><div class='add'>+	reg_ier = get_irq_mb_rx(priv) | AT91_IRQ_ERR_LINE | AT91_IRQ_ERR_FRAME;</div><div class='ctx'> 	at91_write(priv, AT91_IER, reg_ier);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -438,18 +432,21 @@ static void at91_chip_stop(struct net_device *dev, enum can_state state)</div><div class='ctx'> 	struct at91_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	u32 reg_mr;</div><div class='ctx'> </div><div class='add'>+	/* Abort any pending TX requests. However this doesn't seem to</div><div class='add'>+	 * work in case of bus-off on sama5d3.</div><div class='add'>+	 */</div><div class='add'>+	at91_write(priv, AT91_ACR, get_irq_mb_tx(priv));</div><div class='add'>+</div><div class='ctx'> 	/* disable interrupts */</div><div class='ctx'> 	at91_write(priv, AT91_IDR, AT91_IRQ_ALL);</div><div class='ctx'> </div><div class='ctx'> 	reg_mr = at91_read(priv, AT91_MR);</div><div class='ctx'> 	at91_write(priv, AT91_MR, reg_mr &amp; ~AT91_MR_CANEN);</div><div class='ctx'> </div><div class='del'>-	at91_transceiver_switch(priv, 0);</div><div class='ctx'> 	priv-&gt;can.state = state;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * theory of operation:</div><div class='add'>+/* theory of operation:</div><div class='ctx'>  *</div><div class='ctx'>  * According to the datasheet priority 0 is the highest priority, 15</div><div class='ctx'>  * is the lowest. If two mailboxes have the same priority level the</div><div class='hunk'>@@ -463,27 +460,26 @@ static void at91_chip_stop(struct net_device *dev, enum can_state state)</div><div class='ctx'>  * stop sending, waiting for all messages to be delivered, then start</div><div class='ctx'>  * again with mailbox AT91_MB_TX_FIRST prio 0.</div><div class='ctx'>  *</div><div class='del'>- * We use the priv-&gt;tx_next as counter for the next transmission</div><div class='add'>+ * We use the priv-&gt;tx_head as counter for the next transmission</div><div class='ctx'>  * mailbox, but without the offset AT91_MB_TX_FIRST. The lower bits</div><div class='ctx'>  * encode the mailbox number, the upper 4 bits the mailbox priority:</div><div class='ctx'>  *</div><div class='del'>- * priv-&gt;tx_next = (prio &lt;&lt; get_next_prio_shift(priv)) |</div><div class='add'>+ * priv-&gt;tx_head = (prio &lt;&lt; get_next_prio_shift(priv)) |</div><div class='ctx'>  *                 (mb - get_mb_tx_first(priv));</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> static netdev_tx_t at91_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct at91_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='ctx'> 	struct can_frame *cf = (struct can_frame *)skb-&gt;data;</div><div class='ctx'> 	unsigned int mb, prio;</div><div class='ctx'> 	u32 reg_mid, reg_mcr;</div><div class='ctx'> </div><div class='del'>-	if (can_dropped_invalid_skb(dev, skb))</div><div class='add'>+	if (can_dev_dropped_skb(dev, skb))</div><div class='ctx'> 		return NETDEV_TX_OK;</div><div class='ctx'> </div><div class='del'>-	mb = get_tx_next_mb(priv);</div><div class='del'>-	prio = get_tx_next_prio(priv);</div><div class='add'>+	mb = get_tx_head_mb(priv);</div><div class='add'>+	prio = get_tx_head_prio(priv);</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(!(at91_read(priv, AT91_MSR(mb)) &amp; AT91_MSR_MRDY))) {</div><div class='ctx'> 		netif_stop_queue(dev);</div><div class='hunk'>@@ -492,8 +488,12 @@ static netdev_tx_t at91_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 		return NETDEV_TX_BUSY;</div><div class='ctx'> 	}</div><div class='ctx'> 	reg_mid = at91_can_id_to_reg_mid(cf-&gt;can_id);</div><div class='del'>-	reg_mcr = ((cf-&gt;can_id &amp; CAN_RTR_FLAG) ? AT91_MCR_MRTR : 0) |</div><div class='del'>-		(cf-&gt;can_dlc &lt;&lt; 16) | AT91_MCR_MTCR;</div><div class='add'>+</div><div class='add'>+	reg_mcr = FIELD_PREP(AT91_MCR_MDLC_MASK, cf-&gt;len) |</div><div class='add'>+		AT91_MCR_MTCR;</div><div class='add'>+</div><div class='add'>+	if (cf-&gt;can_id &amp; CAN_RTR_FLAG)</div><div class='add'>+		reg_mcr |= AT91_MCR_MRTR;</div><div class='ctx'> </div><div class='ctx'> 	/* disable MB while writing ID (see datasheet) */</div><div class='ctx'> 	set_mb_mode(priv, mb, AT91_MB_MODE_DISABLED);</div><div class='hunk'>@@ -506,23 +506,20 @@ static netdev_tx_t at91_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	/* This triggers transmission */</div><div class='ctx'> 	at91_write(priv, AT91_MCR(mb), reg_mcr);</div><div class='ctx'> </div><div class='del'>-	stats-&gt;tx_bytes += cf-&gt;can_dlc;</div><div class='del'>-</div><div class='ctx'> 	/* _NOTE_: subtract AT91_MB_TX_FIRST offset from mb! */</div><div class='del'>-	can_put_echo_skb(skb, dev, mb - get_mb_tx_first(priv));</div><div class='add'>+	can_put_echo_skb(skb, dev, mb - get_mb_tx_first(priv), 0);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * we have to stop the queue and deliver all messages in case</div><div class='add'>+	/* we have to stop the queue and deliver all messages in case</div><div class='ctx'> 	 * of a prio+mb counter wrap around. This is the case if</div><div class='del'>-	 * tx_next buffer prio and mailbox equals 0.</div><div class='add'>+	 * tx_head buffer prio and mailbox equals 0.</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * also stop the queue if next buffer is still in use</div><div class='ctx'> 	 * (== not ready)</div><div class='ctx'> 	 */</div><div class='del'>-	priv-&gt;tx_next++;</div><div class='del'>-	if (!(at91_read(priv, AT91_MSR(get_tx_next_mb(priv))) &amp;</div><div class='add'>+	priv-&gt;tx_head++;</div><div class='add'>+	if (!(at91_read(priv, AT91_MSR(get_tx_head_mb(priv))) &amp;</div><div class='ctx'> 	      AT91_MSR_MRDY) ||</div><div class='del'>-	    (priv-&gt;tx_next &amp; get_next_mask(priv)) == 0)</div><div class='add'>+	    (priv-&gt;tx_head &amp; get_head_mask(priv)) == 0)</div><div class='ctx'> 		netif_stop_queue(dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable interrupt for this mailbox */</div><div class='hunk'>@@ -531,30 +528,20 @@ static netdev_tx_t at91_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * at91_activate_rx_low - activate lower rx mailboxes</div><div class='del'>- * @priv: a91 context</div><div class='del'>- *</div><div class='del'>- * Reenables the lower mailboxes for reception of new CAN messages</div><div class='del'>- */</div><div class='del'>-static inline void at91_activate_rx_low(const struct at91_priv *priv)</div><div class='add'>+static inline u32 at91_get_timestamp(const struct at91_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	u32 mask = get_mb_rx_low_mask(priv);</div><div class='del'>-	at91_write(priv, AT91_TCR, mask);</div><div class='add'>+	return at91_read(priv, AT91_TIM);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/**</div><div class='del'>- * at91_activate_rx_mb - reactive single rx mailbox</div><div class='del'>- * @priv: a91 context</div><div class='del'>- * @mb: mailbox to reactivate</div><div class='del'>- *</div><div class='del'>- * Reenables given mailbox for reception of new CAN messages</div><div class='del'>- */</div><div class='del'>-static inline void at91_activate_rx_mb(const struct at91_priv *priv,</div><div class='del'>-		unsigned int mb)</div><div class='add'>+static inline struct sk_buff *</div><div class='add'>+at91_alloc_can_err_skb(struct net_device *dev,</div><div class='add'>+		       struct can_frame **cf, u32 *timestamp)</div><div class='ctx'> {</div><div class='del'>-	u32 mask = 1 &lt;&lt; mb;</div><div class='del'>-	at91_write(priv, AT91_TCR, mask);</div><div class='add'>+	const struct at91_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	*timestamp = at91_get_timestamp(priv);</div><div class='add'>+</div><div class='add'>+	return alloc_can_err_skb(dev, cf);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -565,51 +552,75 @@ static void at91_rx_overflow_err(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='add'>+	struct at91_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	struct can_frame *cf;</div><div class='add'>+	u32 timestamp;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='ctx'> 	netdev_dbg(dev, "RX buffer overflow\n");</div><div class='ctx'> 	stats-&gt;rx_over_errors++;</div><div class='ctx'> 	stats-&gt;rx_errors++;</div><div class='ctx'> </div><div class='del'>-	skb = alloc_can_err_skb(dev, &amp;cf);</div><div class='add'>+	skb = at91_alloc_can_err_skb(dev, &amp;cf, &amp;timestamp);</div><div class='ctx'> 	if (unlikely(!skb))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='ctx'> 	cf-&gt;data[1] = CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='ctx'> </div><div class='del'>-	stats-&gt;rx_packets++;</div><div class='del'>-	stats-&gt;rx_bytes += cf-&gt;can_dlc;</div><div class='del'>-	netif_receive_skb(skb);</div><div class='add'>+	err = can_rx_offload_queue_timestamp(&amp;priv-&gt;offload, skb, timestamp);</div><div class='add'>+	if (err)</div><div class='add'>+		stats-&gt;rx_fifo_errors++;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * at91_read_mb - read CAN msg from mailbox (lowlevel impl)</div><div class='del'>- * @dev: net device</div><div class='add'>+ * at91_mailbox_read - read CAN msg from mailbox</div><div class='add'>+ * @offload: rx-offload</div><div class='ctx'>  * @mb: mailbox number to read from</div><div class='del'>- * @cf: can frame where to store message</div><div class='add'>+ * @timestamp: pointer to 32 bit timestamp</div><div class='add'>+ * @drop: true indicated mailbox to mark as read and drop frame</div><div class='ctx'>  *</div><div class='del'>- * Reads a CAN message from the given mailbox and stores data into</div><div class='del'>- * given can frame. "mb" and "cf" must be valid.</div><div class='add'>+ * Reads a CAN message from the given mailbox if not empty.</div><div class='ctx'>  */</div><div class='del'>-static void at91_read_mb(struct net_device *dev, unsigned int mb,</div><div class='del'>-		struct can_frame *cf)</div><div class='add'>+static struct sk_buff *at91_mailbox_read(struct can_rx_offload *offload,</div><div class='add'>+					 unsigned int mb, u32 *timestamp,</div><div class='add'>+					 bool drop)</div><div class='ctx'> {</div><div class='del'>-	const struct at91_priv *priv = netdev_priv(dev);</div><div class='add'>+	const struct at91_priv *priv = rx_offload_to_priv(offload);</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='ctx'> 	u32 reg_msr, reg_mid;</div><div class='ctx'> </div><div class='add'>+	reg_msr = at91_read(priv, AT91_MSR(mb));</div><div class='add'>+	if (!(reg_msr &amp; AT91_MSR_MRDY))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (unlikely(drop)) {</div><div class='add'>+		skb = ERR_PTR(-ENOBUFS);</div><div class='add'>+		goto mark_as_read;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_skb(offload-&gt;dev, &amp;cf);</div><div class='add'>+	if (unlikely(!skb)) {</div><div class='add'>+		skb = ERR_PTR(-ENOMEM);</div><div class='add'>+		goto mark_as_read;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	reg_mid = at91_read(priv, AT91_MID(mb));</div><div class='ctx'> 	if (reg_mid &amp; AT91_MID_MIDE)</div><div class='del'>-		cf-&gt;can_id = ((reg_mid &gt;&gt; 0) &amp; CAN_EFF_MASK) | CAN_EFF_FLAG;</div><div class='add'>+		cf-&gt;can_id = FIELD_GET(AT91_MID_MIDVA_MASK | AT91_MID_MIDVB_MASK, reg_mid) |</div><div class='add'>+			CAN_EFF_FLAG;</div><div class='ctx'> 	else</div><div class='del'>-		cf-&gt;can_id = (reg_mid &gt;&gt; 18) &amp; CAN_SFF_MASK;</div><div class='add'>+		cf-&gt;can_id = FIELD_GET(AT91_MID_MIDVA_MASK, reg_mid);</div><div class='ctx'> </div><div class='del'>-	reg_msr = at91_read(priv, AT91_MSR(mb));</div><div class='del'>-	cf-&gt;can_dlc = get_can_dlc((reg_msr &gt;&gt; 16) &amp; 0xf);</div><div class='add'>+	/* extend timestamp to full 32 bit */</div><div class='add'>+	*timestamp = FIELD_GET(AT91_MSR_MTIMESTAMP_MASK, reg_msr) &lt;&lt; 16;</div><div class='add'>+</div><div class='add'>+	cf-&gt;len = can_cc_dlc2len(FIELD_GET(AT91_MSR_MDLC_MASK, reg_msr));</div><div class='ctx'> </div><div class='del'>-	if (reg_msr &amp; AT91_MSR_MRTR)</div><div class='add'>+	if (reg_msr &amp; AT91_MSR_MRTR) {</div><div class='ctx'> 		cf-&gt;can_id |= CAN_RTR_FLAG;</div><div class='del'>-	else {</div><div class='add'>+	} else {</div><div class='ctx'> 		*(u32 *)(cf-&gt;data + 0) = at91_read(priv, AT91_MDL(mb));</div><div class='ctx'> 		*(u32 *)(cf-&gt;data + 4) = at91_read(priv, AT91_MDH(mb));</div><div class='ctx'> 	}</div><div class='hunk'>@@ -618,236 +629,21 @@ static void at91_read_mb(struct net_device *dev, unsigned int mb,</div><div class='ctx'> 	at91_write(priv, AT91_MID(mb), AT91_MID_MIDE);</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(mb == get_mb_rx_last(priv) &amp;&amp; reg_msr &amp; AT91_MSR_MMI))</div><div class='del'>-		at91_rx_overflow_err(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * at91_read_msg - read CAN message from mailbox</div><div class='del'>- * @dev: net device</div><div class='del'>- * @mb: mail box to read from</div><div class='del'>- *</div><div class='del'>- * Reads a CAN message from given mailbox, and put into linux network</div><div class='del'>- * RX queue, does all housekeeping chores (stats, ...)</div><div class='del'>- */</div><div class='del'>-static void at91_read_msg(struct net_device *dev, unsigned int mb)</div><div class='del'>-{</div><div class='del'>-	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='del'>-	struct can_frame *cf;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-</div><div class='del'>-	skb = alloc_can_skb(dev, &amp;cf);</div><div class='del'>-	if (unlikely(!skb)) {</div><div class='del'>-		stats-&gt;rx_dropped++;</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	at91_read_mb(dev, mb, cf);</div><div class='del'>-</div><div class='del'>-	stats-&gt;rx_packets++;</div><div class='del'>-	stats-&gt;rx_bytes += cf-&gt;can_dlc;</div><div class='del'>-	netif_receive_skb(skb);</div><div class='del'>-</div><div class='del'>-	can_led_event(dev, CAN_LED_EVENT_RX);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/**</div><div class='del'>- * at91_poll_rx - read multiple CAN messages from mailboxes</div><div class='del'>- * @dev: net device</div><div class='del'>- * @quota: max number of pkgs we're allowed to receive</div><div class='del'>- *</div><div class='del'>- * Theory of Operation:</div><div class='del'>- *</div><div class='del'>- * About 3/4 of the mailboxes (get_mb_rx_first()...get_mb_rx_last())</div><div class='del'>- * on the chip are reserved for RX. We split them into 2 groups. The</div><div class='del'>- * lower group ranges from get_mb_rx_first() to get_mb_rx_low_last().</div><div class='del'>- *</div><div class='del'>- * Like it or not, but the chip always saves a received CAN message</div><div class='del'>- * into the first free mailbox it finds (starting with the</div><div class='del'>- * lowest). This makes it very difficult to read the messages in the</div><div class='del'>- * right order from the chip. This is how we work around that problem:</div><div class='del'>- *</div><div class='del'>- * The first message goes into mb nr. 1 and issues an interrupt. All</div><div class='del'>- * rx ints are disabled in the interrupt handler and a napi poll is</div><div class='del'>- * scheduled. We read the mailbox, but do _not_ reenable the mb (to</div><div class='del'>- * receive another message).</div><div class='del'>- *</div><div class='del'>- *    lower mbxs      upper</div><div class='del'>- *     ____^______    __^__</div><div class='del'>- *    /           \  /     \</div><div class='del'>- * +-+-+-+-+-+-+-+-++-+-+-+-+</div><div class='del'>- * | |x|x|x|x|x|x|x|| | | | |</div><div class='del'>- * +-+-+-+-+-+-+-+-++-+-+-+-+</div><div class='del'>- *  0 0 0 0 0 0  0 0 0 0 1 1  \ mail</div><div class='del'>- *  0 1 2 3 4 5  6 7 8 9 0 1  / box</div><div class='del'>- *  ^</div><div class='del'>- *  |</div><div class='del'>- *   \</div><div class='del'>- *     unused, due to chip bug</div><div class='del'>- *</div><div class='del'>- * The variable priv-&gt;rx_next points to the next mailbox to read a</div><div class='del'>- * message from. As long we're in the lower mailboxes we just read the</div><div class='del'>- * mailbox but not reenable it.</div><div class='del'>- *</div><div class='del'>- * With completion of the last of the lower mailboxes, we reenable the</div><div class='del'>- * whole first group, but continue to look for filled mailboxes in the</div><div class='del'>- * upper mailboxes. Imagine the second group like overflow mailboxes,</div><div class='del'>- * which takes CAN messages if the lower goup is full. While in the</div><div class='del'>- * upper group we reenable the mailbox right after reading it. Giving</div><div class='del'>- * the chip more room to store messages.</div><div class='del'>- *</div><div class='del'>- * After finishing we look again in the lower group if we've still</div><div class='del'>- * quota.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-static int at91_poll_rx(struct net_device *dev, int quota)</div><div class='del'>-{</div><div class='del'>-	struct at91_priv *priv = netdev_priv(dev);</div><div class='del'>-	u32 reg_sr = at91_read(priv, AT91_SR);</div><div class='del'>-	const unsigned long *addr = (unsigned long *)&amp;reg_sr;</div><div class='del'>-	unsigned int mb;</div><div class='del'>-	int received = 0;</div><div class='del'>-</div><div class='del'>-	if (priv-&gt;rx_next &gt; get_mb_rx_low_last(priv) &amp;&amp;</div><div class='del'>-	    reg_sr &amp; get_mb_rx_low_mask(priv))</div><div class='del'>-		netdev_info(dev,</div><div class='del'>-			"order of incoming frames cannot be guaranteed\n");</div><div class='del'>-</div><div class='del'>- again:</div><div class='del'>-	for (mb = find_next_bit(addr, get_mb_tx_first(priv), priv-&gt;rx_next);</div><div class='del'>-	     mb &lt; get_mb_tx_first(priv) &amp;&amp; quota &gt; 0;</div><div class='del'>-	     reg_sr = at91_read(priv, AT91_SR),</div><div class='del'>-	     mb = find_next_bit(addr, get_mb_tx_first(priv), ++priv-&gt;rx_next)) {</div><div class='del'>-		at91_read_msg(dev, mb);</div><div class='del'>-</div><div class='del'>-		/* reactivate mailboxes */</div><div class='del'>-		if (mb == get_mb_rx_low_last(priv))</div><div class='del'>-			/* all lower mailboxed, if just finished it */</div><div class='del'>-			at91_activate_rx_low(priv);</div><div class='del'>-		else if (mb &gt; get_mb_rx_low_last(priv))</div><div class='del'>-			/* only the mailbox we read */</div><div class='del'>-			at91_activate_rx_mb(priv, mb);</div><div class='del'>-</div><div class='del'>-		received++;</div><div class='del'>-		quota--;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* upper group completed, look again in lower */</div><div class='del'>-	if (priv-&gt;rx_next &gt; get_mb_rx_low_last(priv) &amp;&amp;</div><div class='del'>-	    quota &gt; 0 &amp;&amp; mb &gt; get_mb_rx_last(priv)) {</div><div class='del'>-		priv-&gt;rx_next = get_mb_rx_first(priv);</div><div class='del'>-		goto again;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return received;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void at91_poll_err_frame(struct net_device *dev,</div><div class='del'>-		struct can_frame *cf, u32 reg_sr)</div><div class='del'>-{</div><div class='del'>-	struct at91_priv *priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	/* CRC error */</div><div class='del'>-	if (reg_sr &amp; AT91_IRQ_CERR) {</div><div class='del'>-		netdev_dbg(dev, "CERR irq\n");</div><div class='del'>-		dev-&gt;stats.rx_errors++;</div><div class='del'>-		priv-&gt;can.can_stats.bus_error++;</div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Stuffing Error */</div><div class='del'>-	if (reg_sr &amp; AT91_IRQ_SERR) {</div><div class='del'>-		netdev_dbg(dev, "SERR irq\n");</div><div class='del'>-		dev-&gt;stats.rx_errors++;</div><div class='del'>-		priv-&gt;can.can_stats.bus_error++;</div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='del'>-		cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Acknowledgement Error */</div><div class='del'>-	if (reg_sr &amp; AT91_IRQ_AERR) {</div><div class='del'>-		netdev_dbg(dev, "AERR irq\n");</div><div class='del'>-		dev-&gt;stats.tx_errors++;</div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_ACK;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Form error */</div><div class='del'>-	if (reg_sr &amp; AT91_IRQ_FERR) {</div><div class='del'>-		netdev_dbg(dev, "FERR irq\n");</div><div class='del'>-		dev-&gt;stats.rx_errors++;</div><div class='del'>-		priv-&gt;can.can_stats.bus_error++;</div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='del'>-		cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Bit Error */</div><div class='del'>-	if (reg_sr &amp; AT91_IRQ_BERR) {</div><div class='del'>-		netdev_dbg(dev, "BERR irq\n");</div><div class='del'>-		dev-&gt;stats.tx_errors++;</div><div class='del'>-		priv-&gt;can.can_stats.bus_error++;</div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='del'>-		cf-&gt;data[2] |= CAN_ERR_PROT_BIT;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='add'>+		at91_rx_overflow_err(offload-&gt;dev);</div><div class='ctx'> </div><div class='del'>-static int at91_poll_err(struct net_device *dev, int quota, u32 reg_sr)</div><div class='del'>-{</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	struct can_frame *cf;</div><div class='add'>+ mark_as_read:</div><div class='add'>+	at91_write(priv, AT91_MCR(mb), AT91_MCR_MTCR);</div><div class='ctx'> </div><div class='del'>-	if (quota == 0)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	skb = alloc_can_err_skb(dev, &amp;cf);</div><div class='del'>-	if (unlikely(!skb))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	at91_poll_err_frame(dev, cf, reg_sr);</div><div class='del'>-</div><div class='del'>-	dev-&gt;stats.rx_packets++;</div><div class='del'>-	dev-&gt;stats.rx_bytes += cf-&gt;can_dlc;</div><div class='del'>-	netif_receive_skb(skb);</div><div class='del'>-</div><div class='del'>-	return 1;</div><div class='add'>+	return skb;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int at91_poll(struct napi_struct *napi, int quota)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = napi-&gt;dev;</div><div class='del'>-	const struct at91_priv *priv = netdev_priv(dev);</div><div class='del'>-	u32 reg_sr = at91_read(priv, AT91_SR);</div><div class='del'>-	int work_done = 0;</div><div class='del'>-</div><div class='del'>-	if (reg_sr &amp; get_irq_mb_rx(priv))</div><div class='del'>-		work_done += at91_poll_rx(dev, quota - work_done);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * The error bits are clear on read,</div><div class='del'>-	 * so use saved value from irq handler.</div><div class='del'>-	 */</div><div class='del'>-	reg_sr |= priv-&gt;reg_sr;</div><div class='del'>-	if (reg_sr &amp; AT91_IRQ_ERR_FRAME)</div><div class='del'>-		work_done += at91_poll_err(dev, quota - work_done, reg_sr);</div><div class='del'>-</div><div class='del'>-	if (work_done &lt; quota) {</div><div class='del'>-		/* enable IRQs for frame errors and all mailboxes &gt;= rx_next */</div><div class='del'>-		u32 reg_ier = AT91_IRQ_ERR_FRAME;</div><div class='del'>-		reg_ier |= get_irq_mb_rx(priv) &amp; ~AT91_MB_MASK(priv-&gt;rx_next);</div><div class='del'>-</div><div class='del'>-		napi_complete(napi);</div><div class='del'>-		at91_write(priv, AT91_IER, reg_ier);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return work_done;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * theory of operation:</div><div class='add'>+/* theory of operation:</div><div class='ctx'>  *</div><div class='del'>- * priv-&gt;tx_echo holds the number of the oldest can_frame put for</div><div class='add'>+ * priv-&gt;tx_tail holds the number of the oldest can_frame put for</div><div class='ctx'>  * transmission into the hardware, but not yet ACKed by the CAN tx</div><div class='ctx'>  * complete IRQ.</div><div class='ctx'>  *</div><div class='del'>- * We iterate from priv-&gt;tx_echo to priv-&gt;tx_next and check if the</div><div class='add'>+ * We iterate from priv-&gt;tx_tail to priv-&gt;tx_head and check if the</div><div class='ctx'>  * packet has been transmitted, echo it back to the CAN framework. If</div><div class='ctx'>  * we discover a not yet transmitted package, stop looking for more.</div><div class='ctx'>  *</div><div class='hunk'>@@ -858,10 +654,8 @@ static void at91_irq_tx(struct net_device *dev, u32 reg_sr)</div><div class='ctx'> 	u32 reg_msr;</div><div class='ctx'> 	unsigned int mb;</div><div class='ctx'> </div><div class='del'>-	/* masking of reg_sr not needed, already done by at91_irq */</div><div class='del'>-</div><div class='del'>-	for (/* nix */; (priv-&gt;tx_next - priv-&gt;tx_echo) &gt; 0; priv-&gt;tx_echo++) {</div><div class='del'>-		mb = get_tx_echo_mb(priv);</div><div class='add'>+	for (/* nix */; (priv-&gt;tx_head - priv-&gt;tx_tail) &gt; 0; priv-&gt;tx_tail++) {</div><div class='add'>+		mb = get_tx_tail_mb(priv);</div><div class='ctx'> </div><div class='ctx'> 		/* no event in mailbox? */</div><div class='ctx'> 		if (!(reg_sr &amp; (1 &lt;&lt; mb)))</div><div class='hunk'>@@ -870,250 +664,208 @@ static void at91_irq_tx(struct net_device *dev, u32 reg_sr)</div><div class='ctx'> 		/* Disable irq for this TX mailbox */</div><div class='ctx'> 		at91_write(priv, AT91_IDR, 1 &lt;&lt; mb);</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * only echo if mailbox signals us a transfer</div><div class='add'>+		/* only echo if mailbox signals us a transfer</div><div class='ctx'> 		 * complete (MSR_MRDY). Otherwise it's a tansfer</div><div class='ctx'> 		 * abort. "can_bus_off()" takes care about the skbs</div><div class='ctx'> 		 * parked in the echo queue.</div><div class='ctx'> 		 */</div><div class='ctx'> 		reg_msr = at91_read(priv, AT91_MSR(mb));</div><div class='del'>-		if (likely(reg_msr &amp; AT91_MSR_MRDY &amp;&amp;</div><div class='del'>-			   ~reg_msr &amp; AT91_MSR_MABT)) {</div><div class='del'>-			/* _NOTE_: subtract AT91_MB_TX_FIRST offset from mb! */</div><div class='del'>-			can_get_echo_skb(dev, mb - get_mb_tx_first(priv));</div><div class='del'>-			dev-&gt;stats.tx_packets++;</div><div class='del'>-			can_led_event(dev, CAN_LED_EVENT_TX);</div><div class='del'>-		}</div><div class='add'>+		if (unlikely(!(reg_msr &amp; AT91_MSR_MRDY &amp;&amp;</div><div class='add'>+			       ~reg_msr &amp; AT91_MSR_MABT)))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* _NOTE_: subtract AT91_MB_TX_FIRST offset from mb! */</div><div class='add'>+		dev-&gt;stats.tx_bytes +=</div><div class='add'>+			can_get_echo_skb(dev, mb - get_mb_tx_first(priv), NULL);</div><div class='add'>+		dev-&gt;stats.tx_packets++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * restart queue if we don't have a wrap around but restart if</div><div class='add'>+	/* restart queue if we don't have a wrap around but restart if</div><div class='ctx'> 	 * we get a TX int for the last can frame directly before a</div><div class='ctx'> 	 * wrap around.</div><div class='ctx'> 	 */</div><div class='del'>-	if ((priv-&gt;tx_next &amp; get_next_mask(priv)) != 0 ||</div><div class='del'>-	    (priv-&gt;tx_echo &amp; get_next_mask(priv)) == 0)</div><div class='add'>+	if ((priv-&gt;tx_head &amp; get_head_mask(priv)) != 0 ||</div><div class='add'>+	    (priv-&gt;tx_tail &amp; get_head_mask(priv)) == 0)</div><div class='ctx'> 		netif_wake_queue(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void at91_irq_err_state(struct net_device *dev,</div><div class='del'>-		struct can_frame *cf, enum can_state new_state)</div><div class='add'>+static void at91_irq_err_line(struct net_device *dev, const u32 reg_sr)</div><div class='ctx'> {</div><div class='add'>+	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='add'>+	enum can_state new_state, rx_state, tx_state;</div><div class='ctx'> 	struct at91_priv *priv = netdev_priv(dev);</div><div class='del'>-	u32 reg_idr = 0, reg_ier = 0;</div><div class='ctx'> 	struct can_berr_counter bec;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	u32 timestamp;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='ctx'> 	at91_get_berr_counter(dev, &amp;bec);</div><div class='add'>+	can_state_get_by_berr_counter(dev, &amp;bec, &amp;tx_state, &amp;rx_state);</div><div class='ctx'> </div><div class='del'>-	switch (priv-&gt;can.state) {</div><div class='del'>-	case CAN_STATE_ERROR_ACTIVE:</div><div class='del'>-		/*</div><div class='del'>-		 * from: ERROR_ACTIVE</div><div class='del'>-		 * to  : ERROR_WARNING, ERROR_PASSIVE, BUS_OFF</div><div class='del'>-		 * =&gt;  : there was a warning int</div><div class='del'>-		 */</div><div class='del'>-		if (new_state &gt;= CAN_STATE_ERROR_WARNING &amp;&amp;</div><div class='del'>-		    new_state &lt;= CAN_STATE_BUS_OFF) {</div><div class='del'>-			netdev_dbg(dev, "Error Warning IRQ\n");</div><div class='del'>-			priv-&gt;can.can_stats.error_warning++;</div><div class='del'>-</div><div class='del'>-			cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='del'>-			cf-&gt;data[1] = (bec.txerr &gt; bec.rxerr) ?</div><div class='del'>-				CAN_ERR_CRTL_TX_WARNING :</div><div class='del'>-				CAN_ERR_CRTL_RX_WARNING;</div><div class='del'>-		}</div><div class='del'>-	case CAN_STATE_ERROR_WARNING:	/* fallthrough */</div><div class='del'>-		/*</div><div class='del'>-		 * from: ERROR_ACTIVE, ERROR_WARNING</div><div class='del'>-		 * to  : ERROR_PASSIVE, BUS_OFF</div><div class='del'>-		 * =&gt;  : error passive int</div><div class='del'>-		 */</div><div class='del'>-		if (new_state &gt;= CAN_STATE_ERROR_PASSIVE &amp;&amp;</div><div class='del'>-		    new_state &lt;= CAN_STATE_BUS_OFF) {</div><div class='del'>-			netdev_dbg(dev, "Error Passive IRQ\n");</div><div class='del'>-			priv-&gt;can.can_stats.error_passive++;</div><div class='del'>-</div><div class='del'>-			cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='del'>-			cf-&gt;data[1] = (bec.txerr &gt; bec.rxerr) ?</div><div class='del'>-				CAN_ERR_CRTL_TX_PASSIVE :</div><div class='del'>-				CAN_ERR_CRTL_RX_PASSIVE;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	case CAN_STATE_BUS_OFF:</div><div class='del'>-		/*</div><div class='del'>-		 * from: BUS_OFF</div><div class='del'>-		 * to  : ERROR_ACTIVE, ERROR_WARNING, ERROR_PASSIVE</div><div class='del'>-		 */</div><div class='del'>-		if (new_state &lt;= CAN_STATE_ERROR_PASSIVE) {</div><div class='del'>-			cf-&gt;can_id |= CAN_ERR_RESTARTED;</div><div class='del'>-</div><div class='del'>-			netdev_dbg(dev, "restarted\n");</div><div class='del'>-			priv-&gt;can.can_stats.restarts++;</div><div class='add'>+	/* The chip automatically recovers from bus-off after 128</div><div class='add'>+	 * occurrences of 11 consecutive recessive bits.</div><div class='add'>+	 *</div><div class='add'>+	 * After an auto-recovered bus-off, the error counters no</div><div class='add'>+	 * longer reflect this fact. On the sam9263 the state bits in</div><div class='add'>+	 * the SR register show the current state (based on the</div><div class='add'>+	 * current error counters), while on sam9x5 and newer SoCs</div><div class='add'>+	 * these bits are latched.</div><div class='add'>+	 *</div><div class='add'>+	 * Take any latched bus-off information from the SR register</div><div class='add'>+	 * into account when calculating the CAN new state, to start</div><div class='add'>+	 * the standard CAN bus off handling.</div><div class='add'>+	 */</div><div class='add'>+	if (reg_sr &amp; AT91_IRQ_BOFF)</div><div class='add'>+		rx_state = CAN_STATE_BUS_OFF;</div><div class='ctx'> </div><div class='del'>-			netif_carrier_on(dev);</div><div class='del'>-			netif_wake_queue(dev);</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+	new_state = max(tx_state, rx_state);</div><div class='ctx'> </div><div class='add'>+	/* state hasn't changed */</div><div class='add'>+	if (likely(new_state == priv-&gt;can.state))</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	/* process state changes depending on the new state */</div><div class='del'>-	switch (new_state) {</div><div class='del'>-	case CAN_STATE_ERROR_ACTIVE:</div><div class='del'>-		/*</div><div class='del'>-		 * actually we want to enable AT91_IRQ_WARN here, but</div><div class='del'>-		 * it screws up the system under certain</div><div class='del'>-		 * circumstances. so just enable AT91_IRQ_ERRP, thus</div><div class='del'>-		 * the "fallthrough"</div><div class='del'>-		 */</div><div class='del'>-		netdev_dbg(dev, "Error Active\n");</div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_PROT;</div><div class='del'>-		cf-&gt;data[2] = CAN_ERR_PROT_ACTIVE;</div><div class='del'>-	case CAN_STATE_ERROR_WARNING:	/* fallthrough */</div><div class='del'>-		reg_idr = AT91_IRQ_ERRA | AT91_IRQ_WARN | AT91_IRQ_BOFF;</div><div class='del'>-		reg_ier = AT91_IRQ_ERRP;</div><div class='del'>-		break;</div><div class='del'>-	case CAN_STATE_ERROR_PASSIVE:</div><div class='del'>-		reg_idr = AT91_IRQ_ERRA | AT91_IRQ_WARN | AT91_IRQ_ERRP;</div><div class='del'>-		reg_ier = AT91_IRQ_BOFF;</div><div class='del'>-		break;</div><div class='del'>-	case CAN_STATE_BUS_OFF:</div><div class='del'>-		reg_idr = AT91_IRQ_ERRA | AT91_IRQ_ERRP |</div><div class='del'>-			AT91_IRQ_WARN | AT91_IRQ_BOFF;</div><div class='del'>-		reg_ier = 0;</div><div class='add'>+	/* The skb allocation might fail, but can_change_state()</div><div class='add'>+	 * handles cf == NULL.</div><div class='add'>+	 */</div><div class='add'>+	skb = at91_alloc_can_err_skb(dev, &amp;cf, &amp;timestamp);</div><div class='add'>+	can_change_state(dev, cf, tx_state, rx_state);</div><div class='ctx'> </div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_BUSOFF;</div><div class='add'>+	if (new_state == CAN_STATE_BUS_OFF) {</div><div class='add'>+		at91_chip_stop(dev, CAN_STATE_BUS_OFF);</div><div class='add'>+		can_bus_off(dev);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		netdev_dbg(dev, "bus-off\n");</div><div class='del'>-		netif_carrier_off(dev);</div><div class='del'>-		priv-&gt;can.can_stats.bus_off++;</div><div class='add'>+	if (unlikely(!skb))</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-		/* turn off chip, if restart is disabled */</div><div class='del'>-		if (!priv-&gt;can.restart_ms) {</div><div class='del'>-			at91_chip_stop(dev, CAN_STATE_BUS_OFF);</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='add'>+	if (new_state != CAN_STATE_BUS_OFF) {</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_CNT;</div><div class='add'>+		cf-&gt;data[6] = bec.txerr;</div><div class='add'>+		cf-&gt;data[7] = bec.rxerr;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	at91_write(priv, AT91_IDR, reg_idr);</div><div class='del'>-	at91_write(priv, AT91_IER, reg_ier);</div><div class='add'>+	err = can_rx_offload_queue_timestamp(&amp;priv-&gt;offload, skb, timestamp);</div><div class='add'>+	if (err)</div><div class='add'>+		stats-&gt;rx_fifo_errors++;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int at91_get_state_by_bec(const struct net_device *dev,</div><div class='del'>-		enum can_state *state)</div><div class='add'>+static void at91_irq_err_frame(struct net_device *dev, const u32 reg_sr)</div><div class='ctx'> {</div><div class='del'>-	struct can_berr_counter bec;</div><div class='add'>+	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='add'>+	struct at91_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	u32 timestamp;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = at91_get_berr_counter(dev, &amp;bec);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='add'>+	priv-&gt;can.can_stats.bus_error++;</div><div class='ctx'> </div><div class='del'>-	if (bec.txerr &lt; 96 &amp;&amp; bec.rxerr &lt; 96)</div><div class='del'>-		*state = CAN_STATE_ERROR_ACTIVE;</div><div class='del'>-	else if (bec.txerr &lt; 128 &amp;&amp; bec.rxerr &lt; 128)</div><div class='del'>-		*state = CAN_STATE_ERROR_WARNING;</div><div class='del'>-	else if (bec.txerr &lt; 256 &amp;&amp; bec.rxerr &lt; 256)</div><div class='del'>-		*state = CAN_STATE_ERROR_PASSIVE;</div><div class='del'>-	else</div><div class='del'>-		*state = CAN_STATE_BUS_OFF;</div><div class='add'>+	skb = at91_alloc_can_err_skb(dev, &amp;cf, &amp;timestamp);</div><div class='add'>+	if (cf)</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='add'>+	if (reg_sr &amp; AT91_IRQ_CERR) {</div><div class='add'>+		netdev_dbg(dev, "CRC error\n");</div><div class='ctx'> </div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+		if (cf)</div><div class='add'>+			cf-&gt;data[3] |= CAN_ERR_PROT_LOC_CRC_SEQ;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-static void at91_irq_err(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct at91_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	struct can_frame *cf;</div><div class='del'>-	enum can_state new_state;</div><div class='del'>-	u32 reg_sr;</div><div class='del'>-	int err;</div><div class='add'>+	if (reg_sr &amp; AT91_IRQ_SERR) {</div><div class='add'>+		netdev_dbg(dev, "Stuff error\n");</div><div class='add'>+</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+		if (cf)</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (reg_sr &amp; AT91_IRQ_AERR) {</div><div class='add'>+		netdev_dbg(dev, "NACK error\n");</div><div class='ctx'> </div><div class='del'>-	if (at91_is_sam9263(priv)) {</div><div class='del'>-		reg_sr = at91_read(priv, AT91_SR);</div><div class='del'>-</div><div class='del'>-		/* we need to look at the unmasked reg_sr */</div><div class='del'>-		if (unlikely(reg_sr &amp; AT91_IRQ_BOFF))</div><div class='del'>-			new_state = CAN_STATE_BUS_OFF;</div><div class='del'>-		else if (unlikely(reg_sr &amp; AT91_IRQ_ERRP))</div><div class='del'>-			new_state = CAN_STATE_ERROR_PASSIVE;</div><div class='del'>-		else if (unlikely(reg_sr &amp; AT91_IRQ_WARN))</div><div class='del'>-			new_state = CAN_STATE_ERROR_WARNING;</div><div class='del'>-		else if (likely(reg_sr &amp; AT91_IRQ_ERRA))</div><div class='del'>-			new_state = CAN_STATE_ERROR_ACTIVE;</div><div class='del'>-		else {</div><div class='del'>-			netdev_err(dev, "BUG! hardware in undefined state\n");</div><div class='del'>-			return;</div><div class='add'>+		stats-&gt;tx_errors++;</div><div class='add'>+		if (cf) {</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_ACK;</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_TX;</div><div class='ctx'> 		}</div><div class='del'>-	} else {</div><div class='del'>-		err = at91_get_state_by_bec(dev, &amp;new_state);</div><div class='del'>-		if (err)</div><div class='del'>-			return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* state hasn't changed */</div><div class='del'>-	if (likely(new_state == priv-&gt;can.state))</div><div class='del'>-		return;</div><div class='add'>+	if (reg_sr &amp; AT91_IRQ_FERR) {</div><div class='add'>+		netdev_dbg(dev, "Format error\n");</div><div class='ctx'> </div><div class='del'>-	skb = alloc_can_err_skb(dev, &amp;cf);</div><div class='del'>-	if (unlikely(!skb))</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+		if (cf)</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (reg_sr &amp; AT91_IRQ_BERR) {</div><div class='add'>+		netdev_dbg(dev, "Bit error\n");</div><div class='add'>+</div><div class='add'>+		stats-&gt;tx_errors++;</div><div class='add'>+		if (cf)</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_TX | CAN_ERR_PROT_BIT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!cf)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	at91_irq_err_state(dev, cf, new_state);</div><div class='add'>+	err = can_rx_offload_queue_timestamp(&amp;priv-&gt;offload, skb, timestamp);</div><div class='add'>+	if (err)</div><div class='add'>+		stats-&gt;rx_fifo_errors++;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 at91_get_reg_sr_rx(const struct at91_priv *priv, u32 *reg_sr_p)</div><div class='add'>+{</div><div class='add'>+	const u32 reg_sr = at91_read(priv, AT91_SR);</div><div class='ctx'> </div><div class='del'>-	dev-&gt;stats.rx_packets++;</div><div class='del'>-	dev-&gt;stats.rx_bytes += cf-&gt;can_dlc;</div><div class='del'>-	netif_rx(skb);</div><div class='add'>+	*reg_sr_p |= reg_sr;</div><div class='ctx'> </div><div class='del'>-	priv-&gt;can.state = new_state;</div><div class='add'>+	return reg_sr &amp; get_irq_mb_rx(priv);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * interrupt handler</div><div class='del'>- */</div><div class='ctx'> static irqreturn_t at91_irq(int irq, void *dev_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = dev_id;</div><div class='ctx'> 	struct at91_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	irqreturn_t handled = IRQ_NONE;</div><div class='del'>-	u32 reg_sr, reg_imr;</div><div class='del'>-</div><div class='del'>-	reg_sr = at91_read(priv, AT91_SR);</div><div class='del'>-	reg_imr = at91_read(priv, AT91_IMR);</div><div class='add'>+	u32 reg_sr = 0, reg_sr_rx;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	/* Ignore masked interrupts */</div><div class='del'>-	reg_sr &amp;= reg_imr;</div><div class='del'>-	if (!reg_sr)</div><div class='del'>-		goto exit;</div><div class='del'>-</div><div class='del'>-	handled = IRQ_HANDLED;</div><div class='add'>+	/* Receive interrupt</div><div class='add'>+	 * Some bits of AT91_SR are cleared on read, keep them in reg_sr.</div><div class='add'>+	 */</div><div class='add'>+	while ((reg_sr_rx = at91_get_reg_sr_rx(priv, &amp;reg_sr))) {</div><div class='add'>+		ret = can_rx_offload_irq_offload_timestamp(&amp;priv-&gt;offload,</div><div class='add'>+							   reg_sr_rx);</div><div class='add'>+		handled = IRQ_HANDLED;</div><div class='ctx'> </div><div class='del'>-	/* Receive or error interrupt? -&gt; napi */</div><div class='del'>-	if (reg_sr &amp; (get_irq_mb_rx(priv) | AT91_IRQ_ERR_FRAME)) {</div><div class='del'>-		/*</div><div class='del'>-		 * The error bits are clear on read,</div><div class='del'>-		 * save for later use.</div><div class='del'>-		 */</div><div class='del'>-		priv-&gt;reg_sr = reg_sr;</div><div class='del'>-		at91_write(priv, AT91_IDR,</div><div class='del'>-			   get_irq_mb_rx(priv) | AT91_IRQ_ERR_FRAME);</div><div class='del'>-		napi_schedule(&amp;priv-&gt;napi);</div><div class='add'>+		if (!ret)</div><div class='add'>+			break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Transmission complete interrupt */</div><div class='del'>-	if (reg_sr &amp; get_irq_mb_tx(priv))</div><div class='add'>+	if (reg_sr &amp; get_irq_mb_tx(priv)) {</div><div class='ctx'> 		at91_irq_tx(dev, reg_sr);</div><div class='add'>+		handled = IRQ_HANDLED;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	at91_irq_err(dev);</div><div class='add'>+	/* Line Error interrupt */</div><div class='add'>+	if (reg_sr &amp; AT91_IRQ_ERR_LINE ||</div><div class='add'>+	    priv-&gt;can.state &gt; CAN_STATE_ERROR_ACTIVE) {</div><div class='add'>+		at91_irq_err_line(dev, reg_sr);</div><div class='add'>+		handled = IRQ_HANDLED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Frame Error Interrupt */</div><div class='add'>+	if (reg_sr &amp; AT91_IRQ_ERR_FRAME) {</div><div class='add'>+		at91_irq_err_frame(dev, reg_sr);</div><div class='add'>+		handled = IRQ_HANDLED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (handled)</div><div class='add'>+		can_rx_offload_irq_finish(&amp;priv-&gt;offload);</div><div class='ctx'> </div><div class='del'>- exit:</div><div class='ctx'> 	return handled;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1122,57 +874,58 @@ static int at91_open(struct net_device *dev)</div><div class='ctx'> 	struct at91_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = clk_prepare_enable(priv-&gt;clk);</div><div class='add'>+	err = phy_power_on(priv-&gt;transceiver);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='ctx'> 	/* check or determine and set bittime */</div><div class='ctx'> 	err = open_candev(dev);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto out;</div><div class='add'>+		goto out_phy_power_off;</div><div class='ctx'> </div><div class='del'>-	/* register interrupt handler */</div><div class='del'>-	if (request_irq(dev-&gt;irq, at91_irq, IRQF_SHARED,</div><div class='del'>-			dev-&gt;name, dev)) {</div><div class='del'>-		err = -EAGAIN;</div><div class='del'>-		goto out_close;</div><div class='del'>-	}</div><div class='add'>+	err = clk_prepare_enable(priv-&gt;clk);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_close_candev;</div><div class='ctx'> </div><div class='del'>-	can_led_event(dev, CAN_LED_EVENT_OPEN);</div><div class='add'>+	/* register interrupt handler */</div><div class='add'>+	err = request_irq(dev-&gt;irq, at91_irq, IRQF_SHARED,</div><div class='add'>+			  dev-&gt;name, dev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_clock_disable_unprepare;</div><div class='ctx'> </div><div class='ctx'> 	/* start chip and queuing */</div><div class='ctx'> 	at91_chip_start(dev);</div><div class='del'>-	napi_enable(&amp;priv-&gt;napi);</div><div class='add'>+	can_rx_offload_enable(&amp;priv-&gt;offload);</div><div class='ctx'> 	netif_start_queue(dev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>- out_close:</div><div class='del'>-	close_candev(dev);</div><div class='del'>- out:</div><div class='add'>+ out_clock_disable_unprepare:</div><div class='ctx'> 	clk_disable_unprepare(priv-&gt;clk);</div><div class='add'>+ out_close_candev:</div><div class='add'>+	close_candev(dev);</div><div class='add'>+ out_phy_power_off:</div><div class='add'>+	phy_power_off(priv-&gt;transceiver);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * stop CAN bus activity</div><div class='add'>+/* stop CAN bus activity</div><div class='ctx'>  */</div><div class='ctx'> static int at91_close(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct at91_priv *priv = netdev_priv(dev);</div><div class='ctx'> </div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='del'>-	napi_disable(&amp;priv-&gt;napi);</div><div class='add'>+	can_rx_offload_disable(&amp;priv-&gt;offload);</div><div class='ctx'> 	at91_chip_stop(dev, CAN_STATE_STOPPED);</div><div class='ctx'> </div><div class='ctx'> 	free_irq(dev-&gt;irq, dev);</div><div class='ctx'> 	clk_disable_unprepare(priv-&gt;clk);</div><div class='add'>+	phy_power_off(priv-&gt;transceiver);</div><div class='ctx'> </div><div class='ctx'> 	close_candev(dev);</div><div class='ctx'> </div><div class='del'>-	can_led_event(dev, CAN_LED_EVENT_STOP);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1195,22 +948,26 @@ static const struct net_device_ops at91_netdev_ops = {</div><div class='ctx'> 	.ndo_open	= at91_open,</div><div class='ctx'> 	.ndo_stop	= at91_close,</div><div class='ctx'> 	.ndo_start_xmit	= at91_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static ssize_t at91_sysfs_show_mb0_id(struct device *dev,</div><div class='del'>-		struct device_attribute *attr, char *buf)</div><div class='add'>+static const struct ethtool_ops at91_ethtool_ops = {</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static ssize_t mb0_id_show(struct device *dev,</div><div class='add'>+			   struct device_attribute *attr, char *buf)</div><div class='ctx'> {</div><div class='ctx'> 	struct at91_priv *priv = netdev_priv(to_net_dev(dev));</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;mb0_id &amp; CAN_EFF_FLAG)</div><div class='del'>-		return snprintf(buf, PAGE_SIZE, "0x%08x\n", priv-&gt;mb0_id);</div><div class='add'>+		return sysfs_emit(buf, "0x%08x\n", priv-&gt;mb0_id);</div><div class='ctx'> 	else</div><div class='del'>-		return snprintf(buf, PAGE_SIZE, "0x%03x\n", priv-&gt;mb0_id);</div><div class='add'>+		return sysfs_emit(buf, "0x%03x\n", priv-&gt;mb0_id);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static ssize_t at91_sysfs_set_mb0_id(struct device *dev,</div><div class='del'>-		struct device_attribute *attr, const char *buf, size_t count)</div><div class='add'>+static ssize_t mb0_id_store(struct device *dev,</div><div class='add'>+			    struct device_attribute *attr,</div><div class='add'>+			    const char *buf, size_t count)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *ndev = to_net_dev(dev);</div><div class='ctx'> 	struct at91_priv *priv = netdev_priv(ndev);</div><div class='hunk'>@@ -1244,15 +1001,14 @@ static ssize_t at91_sysfs_set_mb0_id(struct device *dev,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static DEVICE_ATTR(mb0_id, S_IWUSR | S_IRUGO,</div><div class='del'>-	at91_sysfs_show_mb0_id, at91_sysfs_set_mb0_id);</div><div class='add'>+static DEVICE_ATTR_RW(mb0_id);</div><div class='ctx'> </div><div class='ctx'> static struct attribute *at91_sysfs_attrs[] = {</div><div class='ctx'> 	&amp;dev_attr_mb0_id.attr,</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct attribute_group at91_sysfs_attr_group = {</div><div class='add'>+static const struct attribute_group at91_sysfs_attr_group = {</div><div class='ctx'> 	.attrs = at91_sysfs_attrs,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1290,6 +1046,7 @@ static const struct at91_devtype_data *at91_can_get_driver_data(struct platform_</div><div class='ctx'> static int at91_can_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	const struct at91_devtype_data *devtype_data;</div><div class='add'>+	struct phy *transceiver;</div><div class='ctx'> 	struct net_device *dev;</div><div class='ctx'> 	struct at91_priv *priv;</div><div class='ctx'> 	struct resource *res;</div><div class='hunk'>@@ -1325,7 +1082,7 @@ static int at91_can_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto exit_put;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	addr = ioremap_nocache(res-&gt;start, resource_size(res));</div><div class='add'>+	addr = ioremap(res-&gt;start, resource_size(res));</div><div class='ctx'> 	if (!addr) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='ctx'> 		goto exit_release;</div><div class='hunk'>@@ -1338,7 +1095,15 @@ static int at91_can_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto exit_iounmap;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	transceiver = devm_phy_optional_get(&amp;pdev-&gt;dev, NULL);</div><div class='add'>+	if (IS_ERR(transceiver)) {</div><div class='add'>+		err = PTR_ERR(transceiver);</div><div class='add'>+		dev_err_probe(&amp;pdev-&gt;dev, err, "failed to get phy\n");</div><div class='add'>+		goto exit_iounmap;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	dev-&gt;netdev_ops	= &amp;at91_netdev_ops;</div><div class='add'>+	dev-&gt;ethtool_ops = &amp;at91_ethtool_ops;</div><div class='ctx'> 	dev-&gt;irq = irq;</div><div class='ctx'> 	dev-&gt;flags |= IFF_ECHO;</div><div class='ctx'> </div><div class='hunk'>@@ -1354,8 +1119,14 @@ static int at91_can_probe(struct platform_device *pdev)</div><div class='ctx'> 	priv-&gt;clk = clk;</div><div class='ctx'> 	priv-&gt;pdata = dev_get_platdata(&amp;pdev-&gt;dev);</div><div class='ctx'> 	priv-&gt;mb0_id = 0x7ff;</div><div class='add'>+	priv-&gt;offload.mailbox_read = at91_mailbox_read;</div><div class='add'>+	priv-&gt;offload.mb_first = devtype_data-&gt;rx_first;</div><div class='add'>+	priv-&gt;offload.mb_last = devtype_data-&gt;rx_last;</div><div class='ctx'> </div><div class='del'>-	netif_napi_add(dev, &amp;priv-&gt;napi, at91_poll, get_mb_rx_num(priv));</div><div class='add'>+	can_rx_offload_add_timestamp(dev, &amp;priv-&gt;offload);</div><div class='add'>+</div><div class='add'>+	if (transceiver)</div><div class='add'>+		priv-&gt;can.bitrate_max = transceiver-&gt;attrs.max_link_rate;</div><div class='ctx'> </div><div class='ctx'> 	if (at91_is_sam9263(priv))</div><div class='ctx'> 		dev-&gt;sysfs_groups[0] = &amp;at91_sysfs_attr_group;</div><div class='hunk'>@@ -1369,8 +1140,6 @@ static int at91_can_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto exit_free;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	devm_can_led_init(dev);</div><div class='del'>-</div><div class='ctx'> 	dev_info(&amp;pdev-&gt;dev, "device registered (reg_base=%p, irq=%d)\n",</div><div class='ctx'> 		 priv-&gt;reg_base, dev-&gt;irq);</div><div class='ctx'> </div><div class='hunk'>@@ -1388,7 +1157,7 @@ static int at91_can_probe(struct platform_device *pdev)</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int at91_can_remove(struct platform_device *pdev)</div><div class='add'>+static void at91_can_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = platform_get_drvdata(pdev);</div><div class='ctx'> 	struct at91_priv *priv = netdev_priv(dev);</div><div class='hunk'>@@ -1404,8 +1173,6 @@ static int at91_can_remove(struct platform_device *pdev)</div><div class='ctx'> 	clk_put(priv-&gt;clk);</div><div class='ctx'> </div><div class='ctx'> 	free_candev(dev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct platform_device_id at91_can_id_table[] = {</div><div class='head'>diff --git a/drivers/net/can/bfin_can.c b/drivers/net/can/bfin_can.c<br/>deleted file mode 100644<br/>index 57dadd52b428..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/bfin_can.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/bfin_can.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,786 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Blackfin On-Chip CAN Driver</div><div class='del'>- *</div><div class='del'>- * Copyright 2004-2009 Analog Devices Inc.</div><div class='del'>- *</div><div class='del'>- * Enter bugs at http://blackfin.uclinux.org/</div><div class='del'>- *</div><div class='del'>- * Licensed under the GPL-2 or later.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/bitops.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/skbuff.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;linux/can/dev.h&gt;</div><div class='del'>-#include &lt;linux/can/error.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/portmux.h&gt;</div><div class='del'>-</div><div class='del'>-#define DRV_NAME "bfin_can"</div><div class='del'>-#define BFIN_CAN_TIMEOUT 100</div><div class='del'>-#define TX_ECHO_SKB_MAX  1</div><div class='del'>-</div><div class='del'>-/* transmit and receive channels */</div><div class='del'>-#define TRANSMIT_CHL 24</div><div class='del'>-#define RECEIVE_STD_CHL 0</div><div class='del'>-#define RECEIVE_EXT_CHL 4</div><div class='del'>-#define RECEIVE_RTR_CHL 8</div><div class='del'>-#define RECEIVE_EXT_RTR_CHL 12</div><div class='del'>-#define MAX_CHL_NUMBER 32</div><div class='del'>-</div><div class='del'>-/* All Blackfin system MMRs are padded to 32bits even if the register</div><div class='del'>- * itself is only 16bits.  So use a helper macro to streamline this</div><div class='del'>- */</div><div class='del'>-#define __BFP(m) u16 m; u16 __pad_##m</div><div class='del'>-</div><div class='del'>-/* bfin can registers layout */</div><div class='del'>-struct bfin_can_mask_regs {</div><div class='del'>-	__BFP(aml);</div><div class='del'>-	__BFP(amh);</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct bfin_can_channel_regs {</div><div class='del'>-	/* data[0,2,4,6] -&gt; data{0,1,2,3} while data[1,3,5,7] is padding */</div><div class='del'>-	u16 data[8];</div><div class='del'>-	__BFP(dlc);</div><div class='del'>-	__BFP(tsv);</div><div class='del'>-	__BFP(id0);</div><div class='del'>-	__BFP(id1);</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct bfin_can_regs {</div><div class='del'>-	/* global control and status registers */</div><div class='del'>-	__BFP(mc1);		/* offset 0x00 */</div><div class='del'>-	__BFP(md1);		/* offset 0x04 */</div><div class='del'>-	__BFP(trs1);		/* offset 0x08 */</div><div class='del'>-	__BFP(trr1);		/* offset 0x0c */</div><div class='del'>-	__BFP(ta1);		/* offset 0x10 */</div><div class='del'>-	__BFP(aa1);		/* offset 0x14 */</div><div class='del'>-	__BFP(rmp1);		/* offset 0x18 */</div><div class='del'>-	__BFP(rml1);		/* offset 0x1c */</div><div class='del'>-	__BFP(mbtif1);		/* offset 0x20 */</div><div class='del'>-	__BFP(mbrif1);		/* offset 0x24 */</div><div class='del'>-	__BFP(mbim1);		/* offset 0x28 */</div><div class='del'>-	__BFP(rfh1);		/* offset 0x2c */</div><div class='del'>-	__BFP(opss1);		/* offset 0x30 */</div><div class='del'>-	u32 __pad1[3];</div><div class='del'>-	__BFP(mc2);		/* offset 0x40 */</div><div class='del'>-	__BFP(md2);		/* offset 0x44 */</div><div class='del'>-	__BFP(trs2);		/* offset 0x48 */</div><div class='del'>-	__BFP(trr2);		/* offset 0x4c */</div><div class='del'>-	__BFP(ta2);		/* offset 0x50 */</div><div class='del'>-	__BFP(aa2);		/* offset 0x54 */</div><div class='del'>-	__BFP(rmp2);		/* offset 0x58 */</div><div class='del'>-	__BFP(rml2);		/* offset 0x5c */</div><div class='del'>-	__BFP(mbtif2);		/* offset 0x60 */</div><div class='del'>-	__BFP(mbrif2);		/* offset 0x64 */</div><div class='del'>-	__BFP(mbim2);		/* offset 0x68 */</div><div class='del'>-	__BFP(rfh2);		/* offset 0x6c */</div><div class='del'>-	__BFP(opss2);		/* offset 0x70 */</div><div class='del'>-	u32 __pad2[3];</div><div class='del'>-	__BFP(clock);		/* offset 0x80 */</div><div class='del'>-	__BFP(timing);		/* offset 0x84 */</div><div class='del'>-	__BFP(debug);		/* offset 0x88 */</div><div class='del'>-	__BFP(status);		/* offset 0x8c */</div><div class='del'>-	__BFP(cec);		/* offset 0x90 */</div><div class='del'>-	__BFP(gis);		/* offset 0x94 */</div><div class='del'>-	__BFP(gim);		/* offset 0x98 */</div><div class='del'>-	__BFP(gif);		/* offset 0x9c */</div><div class='del'>-	__BFP(control);		/* offset 0xa0 */</div><div class='del'>-	__BFP(intr);		/* offset 0xa4 */</div><div class='del'>-	__BFP(version);		/* offset 0xa8 */</div><div class='del'>-	__BFP(mbtd);		/* offset 0xac */</div><div class='del'>-	__BFP(ewr);		/* offset 0xb0 */</div><div class='del'>-	__BFP(esr);		/* offset 0xb4 */</div><div class='del'>-	u32 __pad3[2];</div><div class='del'>-	__BFP(ucreg);		/* offset 0xc0 */</div><div class='del'>-	__BFP(uccnt);		/* offset 0xc4 */</div><div class='del'>-	__BFP(ucrc);		/* offset 0xc8 */</div><div class='del'>-	__BFP(uccnf);		/* offset 0xcc */</div><div class='del'>-	u32 __pad4[1];</div><div class='del'>-	__BFP(version2);	/* offset 0xd4 */</div><div class='del'>-	u32 __pad5[10];</div><div class='del'>-</div><div class='del'>-	/* channel(mailbox) mask and message registers */</div><div class='del'>-	struct bfin_can_mask_regs msk[MAX_CHL_NUMBER];		/* offset 0x100 */</div><div class='del'>-	struct bfin_can_channel_regs chl[MAX_CHL_NUMBER];	/* offset 0x200 */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#undef __BFP</div><div class='del'>-</div><div class='del'>-#define SRS 0x0001		/* Software Reset */</div><div class='del'>-#define SER 0x0008		/* Stuff Error */</div><div class='del'>-#define BOIM 0x0008		/* Enable Bus Off Interrupt */</div><div class='del'>-#define CCR 0x0080		/* CAN Configuration Mode Request */</div><div class='del'>-#define CCA 0x0080		/* Configuration Mode Acknowledge */</div><div class='del'>-#define SAM 0x0080		/* Sampling */</div><div class='del'>-#define AME 0x8000		/* Acceptance Mask Enable */</div><div class='del'>-#define RMLIM 0x0080		/* Enable RX Message Lost Interrupt */</div><div class='del'>-#define RMLIS 0x0080		/* RX Message Lost IRQ Status */</div><div class='del'>-#define RTR 0x4000		/* Remote Frame Transmission Request */</div><div class='del'>-#define BOIS 0x0008		/* Bus Off IRQ Status */</div><div class='del'>-#define IDE 0x2000		/* Identifier Extension */</div><div class='del'>-#define EPIS 0x0004		/* Error-Passive Mode IRQ Status */</div><div class='del'>-#define EPIM 0x0004		/* Enable Error-Passive Mode Interrupt */</div><div class='del'>-#define EWTIS 0x0001		/* TX Error Count IRQ Status */</div><div class='del'>-#define EWRIS 0x0002		/* RX Error Count IRQ Status */</div><div class='del'>-#define BEF 0x0040		/* Bit Error Flag */</div><div class='del'>-#define FER 0x0080		/* Form Error Flag */</div><div class='del'>-#define SMR 0x0020		/* Sleep Mode Request */</div><div class='del'>-#define SMACK 0x0008		/* Sleep Mode Acknowledge */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * bfin can private data</div><div class='del'>- */</div><div class='del'>-struct bfin_can_priv {</div><div class='del'>-	struct can_priv can;	/* must be the first member */</div><div class='del'>-	struct net_device *dev;</div><div class='del'>-	void __iomem *membase;</div><div class='del'>-	int rx_irq;</div><div class='del'>-	int tx_irq;</div><div class='del'>-	int err_irq;</div><div class='del'>-	unsigned short *pin_list;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * bfin can timing parameters</div><div class='del'>- */</div><div class='del'>-static const struct can_bittiming_const bfin_can_bittiming_const = {</div><div class='del'>-	.name = DRV_NAME,</div><div class='del'>-	.tseg1_min = 1,</div><div class='del'>-	.tseg1_max = 16,</div><div class='del'>-	.tseg2_min = 1,</div><div class='del'>-	.tseg2_max = 8,</div><div class='del'>-	.sjw_max = 4,</div><div class='del'>-	/*</div><div class='del'>-	 * Although the BRP field can be set to any value, it is recommended</div><div class='del'>-	 * that the value be greater than or equal to 4, as restrictions</div><div class='del'>-	 * apply to the bit timing configuration when BRP is less than 4.</div><div class='del'>-	 */</div><div class='del'>-	.brp_min = 4,</div><div class='del'>-	.brp_max = 1024,</div><div class='del'>-	.brp_inc = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int bfin_can_set_bittiming(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct bfin_can_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct bfin_can_regs __iomem *reg = priv-&gt;membase;</div><div class='del'>-	struct can_bittiming *bt = &amp;priv-&gt;can.bittiming;</div><div class='del'>-	u16 clk, timing;</div><div class='del'>-</div><div class='del'>-	clk = bt-&gt;brp - 1;</div><div class='del'>-	timing = ((bt-&gt;sjw - 1) &lt;&lt; 8) | (bt-&gt;prop_seg + bt-&gt;phase_seg1 - 1) |</div><div class='del'>-		((bt-&gt;phase_seg2 - 1) &lt;&lt; 4);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If the SAM bit is set, the input signal is oversampled three times</div><div class='del'>-	 * at the SCLK rate.</div><div class='del'>-	 */</div><div class='del'>-	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_3_SAMPLES)</div><div class='del'>-		timing |= SAM;</div><div class='del'>-</div><div class='del'>-	writew(clk, &amp;reg-&gt;clock);</div><div class='del'>-	writew(timing, &amp;reg-&gt;timing);</div><div class='del'>-</div><div class='del'>-	netdev_info(dev, "setting CLOCK=0x%04x TIMING=0x%04x\n", clk, timing);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void bfin_can_set_reset_mode(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct bfin_can_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct bfin_can_regs __iomem *reg = priv-&gt;membase;</div><div class='del'>-	int timeout = BFIN_CAN_TIMEOUT;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* disable interrupts */</div><div class='del'>-	writew(0, &amp;reg-&gt;mbim1);</div><div class='del'>-	writew(0, &amp;reg-&gt;mbim2);</div><div class='del'>-	writew(0, &amp;reg-&gt;gim);</div><div class='del'>-</div><div class='del'>-	/* reset can and enter configuration mode */</div><div class='del'>-	writew(SRS | CCR, &amp;reg-&gt;control);</div><div class='del'>-	writew(CCR, &amp;reg-&gt;control);</div><div class='del'>-	while (!(readw(&amp;reg-&gt;control) &amp; CCA)) {</div><div class='del'>-		udelay(10);</div><div class='del'>-		if (--timeout == 0) {</div><div class='del'>-			netdev_err(dev, "fail to enter configuration mode\n");</div><div class='del'>-			BUG();</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * All mailbox configurations are marked as inactive</div><div class='del'>-	 * by writing to CAN Mailbox Configuration Registers 1 and 2</div><div class='del'>-	 * For all bits: 0 - Mailbox disabled, 1 - Mailbox enabled</div><div class='del'>-	 */</div><div class='del'>-	writew(0, &amp;reg-&gt;mc1);</div><div class='del'>-	writew(0, &amp;reg-&gt;mc2);</div><div class='del'>-</div><div class='del'>-	/* Set Mailbox Direction */</div><div class='del'>-	writew(0xFFFF, &amp;reg-&gt;md1);   /* mailbox 1-16 are RX */</div><div class='del'>-	writew(0, &amp;reg-&gt;md2);   /* mailbox 17-32 are TX */</div><div class='del'>-</div><div class='del'>-	/* RECEIVE_STD_CHL */</div><div class='del'>-	for (i = 0; i &lt; 2; i++) {</div><div class='del'>-		writew(0, &amp;reg-&gt;chl[RECEIVE_STD_CHL + i].id0);</div><div class='del'>-		writew(AME, &amp;reg-&gt;chl[RECEIVE_STD_CHL + i].id1);</div><div class='del'>-		writew(0, &amp;reg-&gt;chl[RECEIVE_STD_CHL + i].dlc);</div><div class='del'>-		writew(0x1FFF, &amp;reg-&gt;msk[RECEIVE_STD_CHL + i].amh);</div><div class='del'>-		writew(0xFFFF, &amp;reg-&gt;msk[RECEIVE_STD_CHL + i].aml);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* RECEIVE_EXT_CHL */</div><div class='del'>-	for (i = 0; i &lt; 2; i++) {</div><div class='del'>-		writew(0, &amp;reg-&gt;chl[RECEIVE_EXT_CHL + i].id0);</div><div class='del'>-		writew(AME | IDE, &amp;reg-&gt;chl[RECEIVE_EXT_CHL + i].id1);</div><div class='del'>-		writew(0, &amp;reg-&gt;chl[RECEIVE_EXT_CHL + i].dlc);</div><div class='del'>-		writew(0x1FFF, &amp;reg-&gt;msk[RECEIVE_EXT_CHL + i].amh);</div><div class='del'>-		writew(0xFFFF, &amp;reg-&gt;msk[RECEIVE_EXT_CHL + i].aml);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	writew(BIT(TRANSMIT_CHL - 16), &amp;reg-&gt;mc2);</div><div class='del'>-	writew(BIT(RECEIVE_STD_CHL) + BIT(RECEIVE_EXT_CHL), &amp;reg-&gt;mc1);</div><div class='del'>-</div><div class='del'>-	priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void bfin_can_set_normal_mode(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct bfin_can_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct bfin_can_regs __iomem *reg = priv-&gt;membase;</div><div class='del'>-	int timeout = BFIN_CAN_TIMEOUT;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * leave configuration mode</div><div class='del'>-	 */</div><div class='del'>-	writew(readw(&amp;reg-&gt;control) &amp; ~CCR, &amp;reg-&gt;control);</div><div class='del'>-</div><div class='del'>-	while (readw(&amp;reg-&gt;status) &amp; CCA) {</div><div class='del'>-		udelay(10);</div><div class='del'>-		if (--timeout == 0) {</div><div class='del'>-			netdev_err(dev, "fail to leave configuration mode\n");</div><div class='del'>-			BUG();</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * clear _All_  tx and rx interrupts</div><div class='del'>-	 */</div><div class='del'>-	writew(0xFFFF, &amp;reg-&gt;mbtif1);</div><div class='del'>-	writew(0xFFFF, &amp;reg-&gt;mbtif2);</div><div class='del'>-	writew(0xFFFF, &amp;reg-&gt;mbrif1);</div><div class='del'>-	writew(0xFFFF, &amp;reg-&gt;mbrif2);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * clear global interrupt status register</div><div class='del'>-	 */</div><div class='del'>-	writew(0x7FF, &amp;reg-&gt;gis); /* overwrites with '1' */</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Initialize Interrupts</div><div class='del'>-	 * - set bits in the mailbox interrupt mask register</div><div class='del'>-	 * - global interrupt mask</div><div class='del'>-	 */</div><div class='del'>-	writew(BIT(RECEIVE_STD_CHL) + BIT(RECEIVE_EXT_CHL), &amp;reg-&gt;mbim1);</div><div class='del'>-	writew(BIT(TRANSMIT_CHL - 16), &amp;reg-&gt;mbim2);</div><div class='del'>-</div><div class='del'>-	writew(EPIM | BOIM | RMLIM, &amp;reg-&gt;gim);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void bfin_can_start(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct bfin_can_priv *priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	/* enter reset mode */</div><div class='del'>-	if (priv-&gt;can.state != CAN_STATE_STOPPED)</div><div class='del'>-		bfin_can_set_reset_mode(dev);</div><div class='del'>-</div><div class='del'>-	/* leave reset mode */</div><div class='del'>-	bfin_can_set_normal_mode(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int bfin_can_set_mode(struct net_device *dev, enum can_mode mode)</div><div class='del'>-{</div><div class='del'>-	switch (mode) {</div><div class='del'>-	case CAN_MODE_START:</div><div class='del'>-		bfin_can_start(dev);</div><div class='del'>-		if (netif_queue_stopped(dev))</div><div class='del'>-			netif_wake_queue(dev);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int bfin_can_get_berr_counter(const struct net_device *dev,</div><div class='del'>-				     struct can_berr_counter *bec)</div><div class='del'>-{</div><div class='del'>-	struct bfin_can_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct bfin_can_regs __iomem *reg = priv-&gt;membase;</div><div class='del'>-</div><div class='del'>-	u16 cec = readw(&amp;reg-&gt;cec);</div><div class='del'>-</div><div class='del'>-	bec-&gt;txerr = cec &gt;&gt; 8;</div><div class='del'>-	bec-&gt;rxerr = cec;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int bfin_can_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct bfin_can_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct bfin_can_regs __iomem *reg = priv-&gt;membase;</div><div class='del'>-	struct can_frame *cf = (struct can_frame *)skb-&gt;data;</div><div class='del'>-	u8 dlc = cf-&gt;can_dlc;</div><div class='del'>-	canid_t id = cf-&gt;can_id;</div><div class='del'>-	u8 *data = cf-&gt;data;</div><div class='del'>-	u16 val;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	if (can_dropped_invalid_skb(dev, skb))</div><div class='del'>-		return NETDEV_TX_OK;</div><div class='del'>-</div><div class='del'>-	netif_stop_queue(dev);</div><div class='del'>-</div><div class='del'>-	/* fill id */</div><div class='del'>-	if (id &amp; CAN_EFF_FLAG) {</div><div class='del'>-		writew(id, &amp;reg-&gt;chl[TRANSMIT_CHL].id0);</div><div class='del'>-		val = ((id &amp; 0x1FFF0000) &gt;&gt; 16) | IDE;</div><div class='del'>-	} else</div><div class='del'>-		val = (id &lt;&lt; 2);</div><div class='del'>-	if (id &amp; CAN_RTR_FLAG)</div><div class='del'>-		val |= RTR;</div><div class='del'>-	writew(val | AME, &amp;reg-&gt;chl[TRANSMIT_CHL].id1);</div><div class='del'>-</div><div class='del'>-	/* fill payload */</div><div class='del'>-	for (i = 0; i &lt; 8; i += 2) {</div><div class='del'>-		val = ((7 - i) &lt; dlc ? (data[7 - i]) : 0) +</div><div class='del'>-			((6 - i) &lt; dlc ? (data[6 - i] &lt;&lt; 8) : 0);</div><div class='del'>-		writew(val, &amp;reg-&gt;chl[TRANSMIT_CHL].data[i]);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* fill data length code */</div><div class='del'>-	writew(dlc, &amp;reg-&gt;chl[TRANSMIT_CHL].dlc);</div><div class='del'>-</div><div class='del'>-	can_put_echo_skb(skb, dev, 0);</div><div class='del'>-</div><div class='del'>-	/* set transmit request */</div><div class='del'>-	writew(BIT(TRANSMIT_CHL - 16), &amp;reg-&gt;trs2);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void bfin_can_rx(struct net_device *dev, u16 isrc)</div><div class='del'>-{</div><div class='del'>-	struct bfin_can_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='del'>-	struct bfin_can_regs __iomem *reg = priv-&gt;membase;</div><div class='del'>-	struct can_frame *cf;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	int obj;</div><div class='del'>-	int i;</div><div class='del'>-	u16 val;</div><div class='del'>-</div><div class='del'>-	skb = alloc_can_skb(dev, &amp;cf);</div><div class='del'>-	if (skb == NULL)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* get id */</div><div class='del'>-	if (isrc &amp; BIT(RECEIVE_EXT_CHL)) {</div><div class='del'>-		/* extended frame format (EFF) */</div><div class='del'>-		cf-&gt;can_id = ((readw(&amp;reg-&gt;chl[RECEIVE_EXT_CHL].id1)</div><div class='del'>-			     &amp; 0x1FFF) &lt;&lt; 16)</div><div class='del'>-			     + readw(&amp;reg-&gt;chl[RECEIVE_EXT_CHL].id0);</div><div class='del'>-		cf-&gt;can_id |= CAN_EFF_FLAG;</div><div class='del'>-		obj = RECEIVE_EXT_CHL;</div><div class='del'>-	} else {</div><div class='del'>-		/* standard frame format (SFF) */</div><div class='del'>-		cf-&gt;can_id = (readw(&amp;reg-&gt;chl[RECEIVE_STD_CHL].id1)</div><div class='del'>-			     &amp; 0x1ffc) &gt;&gt; 2;</div><div class='del'>-		obj = RECEIVE_STD_CHL;</div><div class='del'>-	}</div><div class='del'>-	if (readw(&amp;reg-&gt;chl[obj].id1) &amp; RTR)</div><div class='del'>-		cf-&gt;can_id |= CAN_RTR_FLAG;</div><div class='del'>-</div><div class='del'>-	/* get data length code */</div><div class='del'>-	cf-&gt;can_dlc = get_can_dlc(readw(&amp;reg-&gt;chl[obj].dlc) &amp; 0xF);</div><div class='del'>-</div><div class='del'>-	/* get payload */</div><div class='del'>-	for (i = 0; i &lt; 8; i += 2) {</div><div class='del'>-		val = readw(&amp;reg-&gt;chl[obj].data[i]);</div><div class='del'>-		cf-&gt;data[7 - i] = (7 - i) &lt; cf-&gt;can_dlc ? val : 0;</div><div class='del'>-		cf-&gt;data[6 - i] = (6 - i) &lt; cf-&gt;can_dlc ? (val &gt;&gt; 8) : 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	stats-&gt;rx_packets++;</div><div class='del'>-	stats-&gt;rx_bytes += cf-&gt;can_dlc;</div><div class='del'>-	netif_rx(skb);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int bfin_can_err(struct net_device *dev, u16 isrc, u16 status)</div><div class='del'>-{</div><div class='del'>-	struct bfin_can_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct bfin_can_regs __iomem *reg = priv-&gt;membase;</div><div class='del'>-	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='del'>-	struct can_frame *cf;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	enum can_state state = priv-&gt;can.state;</div><div class='del'>-</div><div class='del'>-	skb = alloc_can_err_skb(dev, &amp;cf);</div><div class='del'>-	if (skb == NULL)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	if (isrc &amp; RMLIS) {</div><div class='del'>-		/* data overrun interrupt */</div><div class='del'>-		netdev_dbg(dev, "data overrun interrupt\n");</div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='del'>-		cf-&gt;data[1] = CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='del'>-		stats-&gt;rx_over_errors++;</div><div class='del'>-		stats-&gt;rx_errors++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (isrc &amp; BOIS) {</div><div class='del'>-		netdev_dbg(dev, "bus-off mode interrupt\n");</div><div class='del'>-		state = CAN_STATE_BUS_OFF;</div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_BUSOFF;</div><div class='del'>-		priv-&gt;can.can_stats.bus_off++;</div><div class='del'>-		can_bus_off(dev);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (isrc &amp; EPIS) {</div><div class='del'>-		/* error passive interrupt */</div><div class='del'>-		netdev_dbg(dev, "error passive interrupt\n");</div><div class='del'>-		state = CAN_STATE_ERROR_PASSIVE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if ((isrc &amp; EWTIS) || (isrc &amp; EWRIS)) {</div><div class='del'>-		netdev_dbg(dev, "Error Warning Transmit/Receive Interrupt\n");</div><div class='del'>-		state = CAN_STATE_ERROR_WARNING;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (state != priv-&gt;can.state &amp;&amp; (state == CAN_STATE_ERROR_WARNING ||</div><div class='del'>-				state == CAN_STATE_ERROR_PASSIVE)) {</div><div class='del'>-		u16 cec = readw(&amp;reg-&gt;cec);</div><div class='del'>-		u8 rxerr = cec;</div><div class='del'>-		u8 txerr = cec &gt;&gt; 8;</div><div class='del'>-</div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='del'>-		if (state == CAN_STATE_ERROR_WARNING) {</div><div class='del'>-			priv-&gt;can.can_stats.error_warning++;</div><div class='del'>-			cf-&gt;data[1] = (txerr &gt; rxerr) ?</div><div class='del'>-				CAN_ERR_CRTL_TX_WARNING :</div><div class='del'>-				CAN_ERR_CRTL_RX_WARNING;</div><div class='del'>-		} else {</div><div class='del'>-			priv-&gt;can.can_stats.error_passive++;</div><div class='del'>-			cf-&gt;data[1] = (txerr &gt; rxerr) ?</div><div class='del'>-				CAN_ERR_CRTL_TX_PASSIVE :</div><div class='del'>-				CAN_ERR_CRTL_RX_PASSIVE;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (status) {</div><div class='del'>-		priv-&gt;can.can_stats.bus_error++;</div><div class='del'>-</div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='del'>-</div><div class='del'>-		if (status &amp; BEF)</div><div class='del'>-			cf-&gt;data[2] |= CAN_ERR_PROT_BIT;</div><div class='del'>-		else if (status &amp; FER)</div><div class='del'>-			cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='del'>-		else if (status &amp; SER)</div><div class='del'>-			cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='del'>-		else</div><div class='del'>-			cf-&gt;data[2] |= CAN_ERR_PROT_UNSPEC;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	priv-&gt;can.state = state;</div><div class='del'>-</div><div class='del'>-	stats-&gt;rx_packets++;</div><div class='del'>-	stats-&gt;rx_bytes += cf-&gt;can_dlc;</div><div class='del'>-	netif_rx(skb);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static irqreturn_t bfin_can_interrupt(int irq, void *dev_id)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = dev_id;</div><div class='del'>-	struct bfin_can_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct bfin_can_regs __iomem *reg = priv-&gt;membase;</div><div class='del'>-	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='del'>-	u16 status, isrc;</div><div class='del'>-</div><div class='del'>-	if ((irq == priv-&gt;tx_irq) &amp;&amp; readw(&amp;reg-&gt;mbtif2)) {</div><div class='del'>-		/* transmission complete interrupt */</div><div class='del'>-		writew(0xFFFF, &amp;reg-&gt;mbtif2);</div><div class='del'>-		stats-&gt;tx_packets++;</div><div class='del'>-		stats-&gt;tx_bytes += readw(&amp;reg-&gt;chl[TRANSMIT_CHL].dlc);</div><div class='del'>-		can_get_echo_skb(dev, 0);</div><div class='del'>-		netif_wake_queue(dev);</div><div class='del'>-	} else if ((irq == priv-&gt;rx_irq) &amp;&amp; readw(&amp;reg-&gt;mbrif1)) {</div><div class='del'>-		/* receive interrupt */</div><div class='del'>-		isrc = readw(&amp;reg-&gt;mbrif1);</div><div class='del'>-		writew(0xFFFF, &amp;reg-&gt;mbrif1);</div><div class='del'>-		bfin_can_rx(dev, isrc);</div><div class='del'>-	} else if ((irq == priv-&gt;err_irq) &amp;&amp; readw(&amp;reg-&gt;gis)) {</div><div class='del'>-		/* error interrupt */</div><div class='del'>-		isrc = readw(&amp;reg-&gt;gis);</div><div class='del'>-		status = readw(&amp;reg-&gt;esr);</div><div class='del'>-		writew(0x7FF, &amp;reg-&gt;gis);</div><div class='del'>-		bfin_can_err(dev, isrc, status);</div><div class='del'>-	} else {</div><div class='del'>-		return IRQ_NONE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int bfin_can_open(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct bfin_can_priv *priv = netdev_priv(dev);</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	/* set chip into reset mode */</div><div class='del'>-	bfin_can_set_reset_mode(dev);</div><div class='del'>-</div><div class='del'>-	/* common open */</div><div class='del'>-	err = open_candev(dev);</div><div class='del'>-	if (err)</div><div class='del'>-		goto exit_open;</div><div class='del'>-</div><div class='del'>-	/* register interrupt handler */</div><div class='del'>-	err = request_irq(priv-&gt;rx_irq, &amp;bfin_can_interrupt, 0,</div><div class='del'>-			"bfin-can-rx", dev);</div><div class='del'>-	if (err)</div><div class='del'>-		goto exit_rx_irq;</div><div class='del'>-	err = request_irq(priv-&gt;tx_irq, &amp;bfin_can_interrupt, 0,</div><div class='del'>-			"bfin-can-tx", dev);</div><div class='del'>-	if (err)</div><div class='del'>-		goto exit_tx_irq;</div><div class='del'>-	err = request_irq(priv-&gt;err_irq, &amp;bfin_can_interrupt, 0,</div><div class='del'>-			"bfin-can-err", dev);</div><div class='del'>-	if (err)</div><div class='del'>-		goto exit_err_irq;</div><div class='del'>-</div><div class='del'>-	bfin_can_start(dev);</div><div class='del'>-</div><div class='del'>-	netif_start_queue(dev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-exit_err_irq:</div><div class='del'>-	free_irq(priv-&gt;tx_irq, dev);</div><div class='del'>-exit_tx_irq:</div><div class='del'>-	free_irq(priv-&gt;rx_irq, dev);</div><div class='del'>-exit_rx_irq:</div><div class='del'>-	close_candev(dev);</div><div class='del'>-exit_open:</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int bfin_can_close(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct bfin_can_priv *priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	netif_stop_queue(dev);</div><div class='del'>-	bfin_can_set_reset_mode(dev);</div><div class='del'>-</div><div class='del'>-	close_candev(dev);</div><div class='del'>-</div><div class='del'>-	free_irq(priv-&gt;rx_irq, dev);</div><div class='del'>-	free_irq(priv-&gt;tx_irq, dev);</div><div class='del'>-	free_irq(priv-&gt;err_irq, dev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct net_device *alloc_bfin_candev(void)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev;</div><div class='del'>-	struct bfin_can_priv *priv;</div><div class='del'>-</div><div class='del'>-	dev = alloc_candev(sizeof(*priv), TX_ECHO_SKB_MAX);</div><div class='del'>-	if (!dev)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	priv-&gt;dev = dev;</div><div class='del'>-	priv-&gt;can.bittiming_const = &amp;bfin_can_bittiming_const;</div><div class='del'>-	priv-&gt;can.do_set_bittiming = bfin_can_set_bittiming;</div><div class='del'>-	priv-&gt;can.do_set_mode = bfin_can_set_mode;</div><div class='del'>-	priv-&gt;can.do_get_berr_counter = bfin_can_get_berr_counter;</div><div class='del'>-	priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES;</div><div class='del'>-</div><div class='del'>-	return dev;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct net_device_ops bfin_can_netdev_ops = {</div><div class='del'>-	.ndo_open               = bfin_can_open,</div><div class='del'>-	.ndo_stop               = bfin_can_close,</div><div class='del'>-	.ndo_start_xmit         = bfin_can_start_xmit,</div><div class='del'>-	.ndo_change_mtu         = can_change_mtu,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int bfin_can_probe(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-	struct net_device *dev;</div><div class='del'>-	struct bfin_can_priv *priv;</div><div class='del'>-	struct resource *res_mem, *rx_irq, *tx_irq, *err_irq;</div><div class='del'>-	unsigned short *pdata;</div><div class='del'>-</div><div class='del'>-	pdata = dev_get_platdata(&amp;pdev-&gt;dev);</div><div class='del'>-	if (!pdata) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "No platform data provided!\n");</div><div class='del'>-		err = -EINVAL;</div><div class='del'>-		goto exit;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='del'>-	rx_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);</div><div class='del'>-	tx_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 1);</div><div class='del'>-	err_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 2);</div><div class='del'>-	if (!res_mem || !rx_irq || !tx_irq || !err_irq) {</div><div class='del'>-		err = -EINVAL;</div><div class='del'>-		goto exit;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* request peripheral pins */</div><div class='del'>-	err = peripheral_request_list(pdata, dev_name(&amp;pdev-&gt;dev));</div><div class='del'>-	if (err)</div><div class='del'>-		goto exit;</div><div class='del'>-</div><div class='del'>-	dev = alloc_bfin_candev();</div><div class='del'>-	if (!dev) {</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto exit_peri_pin_free;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	priv-&gt;membase = devm_ioremap_resource(&amp;pdev-&gt;dev, res_mem);</div><div class='del'>-	if (IS_ERR(priv-&gt;membase)) {</div><div class='del'>-		err = PTR_ERR(priv-&gt;membase);</div><div class='del'>-		goto exit_peri_pin_free;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	priv-&gt;rx_irq = rx_irq-&gt;start;</div><div class='del'>-	priv-&gt;tx_irq = tx_irq-&gt;start;</div><div class='del'>-	priv-&gt;err_irq = err_irq-&gt;start;</div><div class='del'>-	priv-&gt;pin_list = pdata;</div><div class='del'>-	priv-&gt;can.clock.freq = get_sclk();</div><div class='del'>-</div><div class='del'>-	platform_set_drvdata(pdev, dev);</div><div class='del'>-	SET_NETDEV_DEV(dev, &amp;pdev-&gt;dev);</div><div class='del'>-</div><div class='del'>-	dev-&gt;flags |= IFF_ECHO;	/* we support local echo */</div><div class='del'>-	dev-&gt;netdev_ops = &amp;bfin_can_netdev_ops;</div><div class='del'>-</div><div class='del'>-	bfin_can_set_reset_mode(dev);</div><div class='del'>-</div><div class='del'>-	err = register_candev(dev);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "registering failed (err=%d)\n", err);</div><div class='del'>-		goto exit_candev_free;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev_info(&amp;pdev-&gt;dev,</div><div class='del'>-		"%s device registered"</div><div class='del'>-		"(&amp;reg_base=%p, rx_irq=%d, tx_irq=%d, err_irq=%d, sclk=%d)\n",</div><div class='del'>-		DRV_NAME, priv-&gt;membase, priv-&gt;rx_irq,</div><div class='del'>-		priv-&gt;tx_irq, priv-&gt;err_irq, priv-&gt;can.clock.freq);</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-exit_candev_free:</div><div class='del'>-	free_candev(dev);</div><div class='del'>-exit_peri_pin_free:</div><div class='del'>-	peripheral_free_list(pdata);</div><div class='del'>-exit:</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int bfin_can_remove(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = platform_get_drvdata(pdev);</div><div class='del'>-	struct bfin_can_priv *priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	bfin_can_set_reset_mode(dev);</div><div class='del'>-</div><div class='del'>-	unregister_candev(dev);</div><div class='del'>-</div><div class='del'>-	peripheral_free_list(priv-&gt;pin_list);</div><div class='del'>-</div><div class='del'>-	free_candev(dev);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PM</div><div class='del'>-static int bfin_can_suspend(struct platform_device *pdev, pm_message_t mesg)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = platform_get_drvdata(pdev);</div><div class='del'>-	struct bfin_can_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct bfin_can_regs __iomem *reg = priv-&gt;membase;</div><div class='del'>-	int timeout = BFIN_CAN_TIMEOUT;</div><div class='del'>-</div><div class='del'>-	if (netif_running(dev)) {</div><div class='del'>-		/* enter sleep mode */</div><div class='del'>-		writew(readw(&amp;reg-&gt;control) | SMR, &amp;reg-&gt;control);</div><div class='del'>-		while (!(readw(&amp;reg-&gt;intr) &amp; SMACK)) {</div><div class='del'>-			udelay(10);</div><div class='del'>-			if (--timeout == 0) {</div><div class='del'>-				netdev_err(dev, "fail to enter sleep mode\n");</div><div class='del'>-				BUG();</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int bfin_can_resume(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = platform_get_drvdata(pdev);</div><div class='del'>-	struct bfin_can_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct bfin_can_regs __iomem *reg = priv-&gt;membase;</div><div class='del'>-</div><div class='del'>-	if (netif_running(dev)) {</div><div class='del'>-		/* leave sleep mode */</div><div class='del'>-		writew(0, &amp;reg-&gt;intr);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-#else</div><div class='del'>-#define bfin_can_suspend NULL</div><div class='del'>-#define bfin_can_resume NULL</div><div class='del'>-#endif	/* CONFIG_PM */</div><div class='del'>-</div><div class='del'>-static struct platform_driver bfin_can_driver = {</div><div class='del'>-	.probe = bfin_can_probe,</div><div class='del'>-	.remove = bfin_can_remove,</div><div class='del'>-	.suspend = bfin_can_suspend,</div><div class='del'>-	.resume = bfin_can_resume,</div><div class='del'>-	.driver = {</div><div class='del'>-		.name = DRV_NAME,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-module_platform_driver(bfin_can_driver);</div><div class='del'>-</div><div class='del'>-MODULE_AUTHOR("Barry Song &lt;21cnbao@gmail.com&gt;");</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_DESCRIPTION("Blackfin on-chip CAN netdevice driver");</div><div class='del'>-MODULE_ALIAS("platform:" DRV_NAME);</div><div class='head'>diff --git a/drivers/net/can/bxcan.c b/drivers/net/can/bxcan.c<br/>new file mode 100644<br/>index 000000000000..baf494d20bef<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/bxcan.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/bxcan.c</a></div><div class='hunk'>@@ -0,0 +1,1101 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+//</div><div class='add'>+// bxcan.c - STM32 Basic Extended CAN controller driver</div><div class='add'>+//</div><div class='add'>+// Copyright (c) 2022 Dario Binacchi &lt;dario.binacchi@amarulasolutions.com&gt;</div><div class='add'>+//</div><div class='add'>+// NOTE: The ST documentation uses the terms master/slave instead of</div><div class='add'>+// primary/secondary.</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/can.h&gt;</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/can/error.h&gt;</div><div class='add'>+#include &lt;linux/can/rx-offload.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/iopoll.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/mfd/syscon.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+</div><div class='add'>+#define BXCAN_NAPI_WEIGHT 3</div><div class='add'>+#define BXCAN_TIMEOUT_US 10000</div><div class='add'>+</div><div class='add'>+#define BXCAN_RX_MB_NUM 2</div><div class='add'>+#define BXCAN_TX_MB_NUM 3</div><div class='add'>+</div><div class='add'>+/* Primary control register (MCR) bits */</div><div class='add'>+#define BXCAN_MCR_RESET BIT(15)</div><div class='add'>+#define BXCAN_MCR_TTCM BIT(7)</div><div class='add'>+#define BXCAN_MCR_ABOM BIT(6)</div><div class='add'>+#define BXCAN_MCR_AWUM BIT(5)</div><div class='add'>+#define BXCAN_MCR_NART BIT(4)</div><div class='add'>+#define BXCAN_MCR_RFLM BIT(3)</div><div class='add'>+#define BXCAN_MCR_TXFP BIT(2)</div><div class='add'>+#define BXCAN_MCR_SLEEP BIT(1)</div><div class='add'>+#define BXCAN_MCR_INRQ BIT(0)</div><div class='add'>+</div><div class='add'>+/* Primary status register (MSR) bits */</div><div class='add'>+#define BXCAN_MSR_ERRI BIT(2)</div><div class='add'>+#define BXCAN_MSR_SLAK BIT(1)</div><div class='add'>+#define BXCAN_MSR_INAK BIT(0)</div><div class='add'>+</div><div class='add'>+/* Transmit status register (TSR) bits */</div><div class='add'>+#define BXCAN_TSR_RQCP2 BIT(16)</div><div class='add'>+#define BXCAN_TSR_RQCP1 BIT(8)</div><div class='add'>+#define BXCAN_TSR_RQCP0 BIT(0)</div><div class='add'>+</div><div class='add'>+/* Receive FIFO 0 register (RF0R) bits */</div><div class='add'>+#define BXCAN_RF0R_RFOM0 BIT(5)</div><div class='add'>+#define BXCAN_RF0R_FMP0_MASK GENMASK(1, 0)</div><div class='add'>+</div><div class='add'>+/* Interrupt enable register (IER) bits */</div><div class='add'>+#define BXCAN_IER_SLKIE BIT(17)</div><div class='add'>+#define BXCAN_IER_WKUIE BIT(16)</div><div class='add'>+#define BXCAN_IER_ERRIE BIT(15)</div><div class='add'>+#define BXCAN_IER_LECIE BIT(11)</div><div class='add'>+#define BXCAN_IER_BOFIE BIT(10)</div><div class='add'>+#define BXCAN_IER_EPVIE BIT(9)</div><div class='add'>+#define BXCAN_IER_EWGIE BIT(8)</div><div class='add'>+#define BXCAN_IER_FOVIE1 BIT(6)</div><div class='add'>+#define BXCAN_IER_FFIE1 BIT(5)</div><div class='add'>+#define BXCAN_IER_FMPIE1 BIT(4)</div><div class='add'>+#define BXCAN_IER_FOVIE0 BIT(3)</div><div class='add'>+#define BXCAN_IER_FFIE0 BIT(2)</div><div class='add'>+#define BXCAN_IER_FMPIE0 BIT(1)</div><div class='add'>+#define BXCAN_IER_TMEIE BIT(0)</div><div class='add'>+</div><div class='add'>+/* Error status register (ESR) bits */</div><div class='add'>+#define BXCAN_ESR_REC_MASK GENMASK(31, 24)</div><div class='add'>+#define BXCAN_ESR_TEC_MASK GENMASK(23, 16)</div><div class='add'>+#define BXCAN_ESR_LEC_MASK GENMASK(6, 4)</div><div class='add'>+#define BXCAN_ESR_BOFF BIT(2)</div><div class='add'>+#define BXCAN_ESR_EPVF BIT(1)</div><div class='add'>+#define BXCAN_ESR_EWGF BIT(0)</div><div class='add'>+</div><div class='add'>+/* Bit timing register (BTR) bits */</div><div class='add'>+#define BXCAN_BTR_SILM BIT(31)</div><div class='add'>+#define BXCAN_BTR_LBKM BIT(30)</div><div class='add'>+#define BXCAN_BTR_SJW_MASK GENMASK(25, 24)</div><div class='add'>+#define BXCAN_BTR_TS2_MASK GENMASK(22, 20)</div><div class='add'>+#define BXCAN_BTR_TS1_MASK GENMASK(19, 16)</div><div class='add'>+#define BXCAN_BTR_BRP_MASK GENMASK(9, 0)</div><div class='add'>+</div><div class='add'>+/* TX mailbox identifier register (TIxR, x = 0..2) bits */</div><div class='add'>+#define BXCAN_TIxR_STID_MASK GENMASK(31, 21)</div><div class='add'>+#define BXCAN_TIxR_EXID_MASK GENMASK(31, 3)</div><div class='add'>+#define BXCAN_TIxR_IDE BIT(2)</div><div class='add'>+#define BXCAN_TIxR_RTR BIT(1)</div><div class='add'>+#define BXCAN_TIxR_TXRQ BIT(0)</div><div class='add'>+</div><div class='add'>+/* TX mailbox data length and time stamp register (TDTxR, x = 0..2 bits */</div><div class='add'>+#define BXCAN_TDTxR_DLC_MASK GENMASK(3, 0)</div><div class='add'>+</div><div class='add'>+/* RX FIFO mailbox identifier register (RIxR, x = 0..1 */</div><div class='add'>+#define BXCAN_RIxR_STID_MASK GENMASK(31, 21)</div><div class='add'>+#define BXCAN_RIxR_EXID_MASK GENMASK(31, 3)</div><div class='add'>+#define BXCAN_RIxR_IDE BIT(2)</div><div class='add'>+#define BXCAN_RIxR_RTR BIT(1)</div><div class='add'>+</div><div class='add'>+/* RX FIFO mailbox data length and timestamp register (RDTxR, x = 0..1) bits */</div><div class='add'>+#define BXCAN_RDTxR_TIME_MASK GENMASK(31, 16)</div><div class='add'>+#define BXCAN_RDTxR_DLC_MASK GENMASK(3, 0)</div><div class='add'>+</div><div class='add'>+#define BXCAN_FMR_REG 0x00</div><div class='add'>+#define BXCAN_FM1R_REG 0x04</div><div class='add'>+#define BXCAN_FS1R_REG 0x0c</div><div class='add'>+#define BXCAN_FFA1R_REG 0x14</div><div class='add'>+#define BXCAN_FA1R_REG 0x1c</div><div class='add'>+#define BXCAN_FiR1_REG(b) (0x40 + (b) * 8)</div><div class='add'>+#define BXCAN_FiR2_REG(b) (0x44 + (b) * 8)</div><div class='add'>+</div><div class='add'>+#define BXCAN_FILTER_ID(cfg) ((cfg) == BXCAN_CFG_DUAL_SECONDARY ? 14 : 0)</div><div class='add'>+</div><div class='add'>+/* Filter primary register (FMR) bits */</div><div class='add'>+#define BXCAN_FMR_CANSB_MASK GENMASK(13, 8)</div><div class='add'>+#define BXCAN_FMR_FINIT BIT(0)</div><div class='add'>+</div><div class='add'>+enum bxcan_lec_code {</div><div class='add'>+	BXCAN_LEC_NO_ERROR = 0,</div><div class='add'>+	BXCAN_LEC_STUFF_ERROR,</div><div class='add'>+	BXCAN_LEC_FORM_ERROR,</div><div class='add'>+	BXCAN_LEC_ACK_ERROR,</div><div class='add'>+	BXCAN_LEC_BIT1_ERROR,</div><div class='add'>+	BXCAN_LEC_BIT0_ERROR,</div><div class='add'>+	BXCAN_LEC_CRC_ERROR,</div><div class='add'>+	BXCAN_LEC_UNUSED</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum bxcan_cfg {</div><div class='add'>+	BXCAN_CFG_SINGLE = 0,</div><div class='add'>+	BXCAN_CFG_DUAL_PRIMARY,</div><div class='add'>+	BXCAN_CFG_DUAL_SECONDARY</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Structure of the message buffer */</div><div class='add'>+struct bxcan_mb {</div><div class='add'>+	u32 id;			/* can identifier */</div><div class='add'>+	u32 dlc;		/* data length control and timestamp */</div><div class='add'>+	u32 data[2];		/* data */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Structure of the hardware registers */</div><div class='add'>+struct bxcan_regs {</div><div class='add'>+	u32 mcr;			/* 0x00 - primary control */</div><div class='add'>+	u32 msr;			/* 0x04 - primary status */</div><div class='add'>+	u32 tsr;			/* 0x08 - transmit status */</div><div class='add'>+	u32 rf0r;			/* 0x0c - FIFO 0 */</div><div class='add'>+	u32 rf1r;			/* 0x10 - FIFO 1 */</div><div class='add'>+	u32 ier;			/* 0x14 - interrupt enable */</div><div class='add'>+	u32 esr;			/* 0x18 - error status */</div><div class='add'>+	u32 btr;			/* 0x1c - bit timing*/</div><div class='add'>+	u32 reserved0[88];		/* 0x20 */</div><div class='add'>+	struct bxcan_mb tx_mb[BXCAN_TX_MB_NUM];	/* 0x180 - tx mailbox */</div><div class='add'>+	struct bxcan_mb rx_mb[BXCAN_RX_MB_NUM];	/* 0x1b0 - rx mailbox */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct bxcan_priv {</div><div class='add'>+	struct can_priv can;</div><div class='add'>+	struct can_rx_offload offload;</div><div class='add'>+	struct device *dev;</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+</div><div class='add'>+	struct bxcan_regs __iomem *regs;</div><div class='add'>+	struct regmap *gcan;</div><div class='add'>+	int tx_irq;</div><div class='add'>+	int sce_irq;</div><div class='add'>+	enum bxcan_cfg cfg;</div><div class='add'>+	struct clk *clk;</div><div class='add'>+	spinlock_t rmw_lock;	/* lock for read-modify-write operations */</div><div class='add'>+	unsigned int tx_head;</div><div class='add'>+	unsigned int tx_tail;</div><div class='add'>+	u32 timestamp;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const bxcan_bittiming_const = {</div><div class='add'>+	.name = KBUILD_MODNAME,</div><div class='add'>+	.tseg1_min = 1,</div><div class='add'>+	.tseg1_max = 16,</div><div class='add'>+	.tseg2_min = 1,</div><div class='add'>+	.tseg2_max = 8,</div><div class='add'>+	.sjw_max = 4,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 1024,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline void bxcan_rmw(struct bxcan_priv *priv, void __iomem *addr,</div><div class='add'>+			     u32 clear, u32 set)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u32 old, val;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;rmw_lock, flags);</div><div class='add'>+	old = readl(addr);</div><div class='add'>+	val = (old &amp; ~clear) | set;</div><div class='add'>+	if (val != old)</div><div class='add'>+		writel(val, addr);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;rmw_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bxcan_disable_filters(struct bxcan_priv *priv, enum bxcan_cfg cfg)</div><div class='add'>+{</div><div class='add'>+	unsigned int fid = BXCAN_FILTER_ID(cfg);</div><div class='add'>+	u32 fmask = BIT(fid);</div><div class='add'>+</div><div class='add'>+	regmap_update_bits(priv-&gt;gcan, BXCAN_FA1R_REG, fmask, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bxcan_enable_filters(struct bxcan_priv *priv, enum bxcan_cfg cfg)</div><div class='add'>+{</div><div class='add'>+	unsigned int fid = BXCAN_FILTER_ID(cfg);</div><div class='add'>+	u32 fmask = BIT(fid);</div><div class='add'>+</div><div class='add'>+	/* Filter settings:</div><div class='add'>+	 *</div><div class='add'>+	 * Accept all messages.</div><div class='add'>+	 * Assign filter 0 to CAN1 and filter 14 to CAN2 in identifier</div><div class='add'>+	 * mask mode with 32 bits width.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	/* Enter filter initialization mode and assign filters to CAN</div><div class='add'>+	 * controllers.</div><div class='add'>+	 */</div><div class='add'>+	regmap_update_bits(priv-&gt;gcan, BXCAN_FMR_REG,</div><div class='add'>+			   BXCAN_FMR_CANSB_MASK | BXCAN_FMR_FINIT,</div><div class='add'>+			   FIELD_PREP(BXCAN_FMR_CANSB_MASK, 14) |</div><div class='add'>+			   BXCAN_FMR_FINIT);</div><div class='add'>+</div><div class='add'>+	/* Deactivate filter */</div><div class='add'>+	regmap_update_bits(priv-&gt;gcan, BXCAN_FA1R_REG, fmask, 0);</div><div class='add'>+</div><div class='add'>+	/* Two 32-bit registers in identifier mask mode */</div><div class='add'>+	regmap_update_bits(priv-&gt;gcan, BXCAN_FM1R_REG, fmask, 0);</div><div class='add'>+</div><div class='add'>+	/* Single 32-bit scale configuration */</div><div class='add'>+	regmap_update_bits(priv-&gt;gcan, BXCAN_FS1R_REG, fmask, fmask);</div><div class='add'>+</div><div class='add'>+	/* Assign filter to FIFO 0 */</div><div class='add'>+	regmap_update_bits(priv-&gt;gcan, BXCAN_FFA1R_REG, fmask, 0);</div><div class='add'>+</div><div class='add'>+	/* Accept all messages */</div><div class='add'>+	regmap_write(priv-&gt;gcan, BXCAN_FiR1_REG(fid), 0);</div><div class='add'>+	regmap_write(priv-&gt;gcan, BXCAN_FiR2_REG(fid), 0);</div><div class='add'>+</div><div class='add'>+	/* Activate filter */</div><div class='add'>+	regmap_update_bits(priv-&gt;gcan, BXCAN_FA1R_REG, fmask, fmask);</div><div class='add'>+</div><div class='add'>+	/* Exit filter initialization mode */</div><div class='add'>+	regmap_update_bits(priv-&gt;gcan, BXCAN_FMR_REG, BXCAN_FMR_FINIT, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u8 bxcan_get_tx_head(const struct bxcan_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return priv-&gt;tx_head % BXCAN_TX_MB_NUM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u8 bxcan_get_tx_tail(const struct bxcan_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return priv-&gt;tx_tail % BXCAN_TX_MB_NUM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u8 bxcan_get_tx_free(const struct bxcan_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return BXCAN_TX_MB_NUM - (priv-&gt;tx_head - priv-&gt;tx_tail);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool bxcan_tx_busy(const struct bxcan_priv *priv)</div><div class='add'>+{</div><div class='add'>+	if (bxcan_get_tx_free(priv) &gt; 0)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(priv-&gt;ndev);</div><div class='add'>+</div><div class='add'>+	/* Memory barrier before checking tx_free (head and tail) */</div><div class='add'>+	smp_mb();</div><div class='add'>+</div><div class='add'>+	if (bxcan_get_tx_free(priv) == 0) {</div><div class='add'>+		netdev_dbg(priv-&gt;ndev,</div><div class='add'>+			   "Stopping tx-queue (tx_head=0x%08x, tx_tail=0x%08x, len=%d).\n",</div><div class='add'>+			   priv-&gt;tx_head, priv-&gt;tx_tail,</div><div class='add'>+			   priv-&gt;tx_head - priv-&gt;tx_tail);</div><div class='add'>+</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netif_start_queue(priv-&gt;ndev);</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bxcan_chip_softreset(struct bxcan_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct bxcan_regs __iomem *regs = priv-&gt;regs;</div><div class='add'>+	u32 value;</div><div class='add'>+</div><div class='add'>+	bxcan_rmw(priv, &amp;regs-&gt;mcr, 0, BXCAN_MCR_RESET);</div><div class='add'>+	return readx_poll_timeout(readl, &amp;regs-&gt;msr, value,</div><div class='add'>+				  value &amp; BXCAN_MSR_SLAK, BXCAN_TIMEOUT_US,</div><div class='add'>+				  USEC_PER_SEC);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bxcan_enter_init_mode(struct bxcan_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct bxcan_regs __iomem *regs = priv-&gt;regs;</div><div class='add'>+	u32 value;</div><div class='add'>+</div><div class='add'>+	bxcan_rmw(priv, &amp;regs-&gt;mcr, 0, BXCAN_MCR_INRQ);</div><div class='add'>+	return readx_poll_timeout(readl, &amp;regs-&gt;msr, value,</div><div class='add'>+				  value &amp; BXCAN_MSR_INAK, BXCAN_TIMEOUT_US,</div><div class='add'>+				  USEC_PER_SEC);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bxcan_leave_init_mode(struct bxcan_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct bxcan_regs __iomem *regs = priv-&gt;regs;</div><div class='add'>+	u32 value;</div><div class='add'>+</div><div class='add'>+	bxcan_rmw(priv, &amp;regs-&gt;mcr, BXCAN_MCR_INRQ, 0);</div><div class='add'>+	return readx_poll_timeout(readl, &amp;regs-&gt;msr, value,</div><div class='add'>+				  !(value &amp; BXCAN_MSR_INAK), BXCAN_TIMEOUT_US,</div><div class='add'>+				  USEC_PER_SEC);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bxcan_enter_sleep_mode(struct bxcan_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct bxcan_regs __iomem *regs = priv-&gt;regs;</div><div class='add'>+	u32 value;</div><div class='add'>+</div><div class='add'>+	bxcan_rmw(priv, &amp;regs-&gt;mcr, 0, BXCAN_MCR_SLEEP);</div><div class='add'>+	return readx_poll_timeout(readl, &amp;regs-&gt;msr, value,</div><div class='add'>+				  value &amp; BXCAN_MSR_SLAK, BXCAN_TIMEOUT_US,</div><div class='add'>+				  USEC_PER_SEC);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bxcan_leave_sleep_mode(struct bxcan_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct bxcan_regs __iomem *regs = priv-&gt;regs;</div><div class='add'>+	u32 value;</div><div class='add'>+</div><div class='add'>+	bxcan_rmw(priv, &amp;regs-&gt;mcr, BXCAN_MCR_SLEEP, 0);</div><div class='add'>+	return readx_poll_timeout(readl, &amp;regs-&gt;msr, value,</div><div class='add'>+				  !(value &amp; BXCAN_MSR_SLAK), BXCAN_TIMEOUT_US,</div><div class='add'>+				  USEC_PER_SEC);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline</div><div class='add'>+struct bxcan_priv *rx_offload_to_priv(struct can_rx_offload *offload)</div><div class='add'>+{</div><div class='add'>+	return container_of(offload, struct bxcan_priv, offload);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct sk_buff *bxcan_mailbox_read(struct can_rx_offload *offload,</div><div class='add'>+					  unsigned int mbxno, u32 *timestamp,</div><div class='add'>+					  bool drop)</div><div class='add'>+{</div><div class='add'>+	struct bxcan_priv *priv = rx_offload_to_priv(offload);</div><div class='add'>+	struct bxcan_regs __iomem *regs = priv-&gt;regs;</div><div class='add'>+	struct bxcan_mb __iomem *mb_regs = &amp;regs-&gt;rx_mb[0];</div><div class='add'>+	struct sk_buff *skb = NULL;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	u32 rf0r, id, dlc;</div><div class='add'>+</div><div class='add'>+	rf0r = readl(&amp;regs-&gt;rf0r);</div><div class='add'>+	if (unlikely(drop)) {</div><div class='add'>+		skb = ERR_PTR(-ENOBUFS);</div><div class='add'>+		goto mark_as_read;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!(rf0r &amp; BXCAN_RF0R_FMP0_MASK))</div><div class='add'>+		goto mark_as_read;</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_skb(offload-&gt;dev, &amp;cf);</div><div class='add'>+	if (unlikely(!skb)) {</div><div class='add'>+		skb = ERR_PTR(-ENOMEM);</div><div class='add'>+		goto mark_as_read;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	id = readl(&amp;mb_regs-&gt;id);</div><div class='add'>+	if (id &amp; BXCAN_RIxR_IDE)</div><div class='add'>+		cf-&gt;can_id = FIELD_GET(BXCAN_RIxR_EXID_MASK, id) | CAN_EFF_FLAG;</div><div class='add'>+	else</div><div class='add'>+		cf-&gt;can_id = FIELD_GET(BXCAN_RIxR_STID_MASK, id) &amp; CAN_SFF_MASK;</div><div class='add'>+</div><div class='add'>+	dlc = readl(&amp;mb_regs-&gt;dlc);</div><div class='add'>+	priv-&gt;timestamp = FIELD_GET(BXCAN_RDTxR_TIME_MASK, dlc);</div><div class='add'>+	cf-&gt;len = can_cc_dlc2len(FIELD_GET(BXCAN_RDTxR_DLC_MASK, dlc));</div><div class='add'>+</div><div class='add'>+	if (id &amp; BXCAN_RIxR_RTR) {</div><div class='add'>+		cf-&gt;can_id |= CAN_RTR_FLAG;</div><div class='add'>+	} else {</div><div class='add'>+		int i, j;</div><div class='add'>+</div><div class='add'>+		for (i = 0, j = 0; i &lt; cf-&gt;len; i += 4, j++)</div><div class='add'>+			*(u32 *)(cf-&gt;data + i) = readl(&amp;mb_regs-&gt;data[j]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+ mark_as_read:</div><div class='add'>+	rf0r |= BXCAN_RF0R_RFOM0;</div><div class='add'>+	writel(rf0r, &amp;regs-&gt;rf0r);</div><div class='add'>+	return skb;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t bxcan_rx_isr(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = dev_id;</div><div class='add'>+	struct bxcan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct bxcan_regs __iomem *regs = priv-&gt;regs;</div><div class='add'>+	u32 rf0r;</div><div class='add'>+</div><div class='add'>+	rf0r = readl(&amp;regs-&gt;rf0r);</div><div class='add'>+	if (!(rf0r &amp; BXCAN_RF0R_FMP0_MASK))</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+</div><div class='add'>+	can_rx_offload_irq_offload_fifo(&amp;priv-&gt;offload);</div><div class='add'>+	can_rx_offload_irq_finish(&amp;priv-&gt;offload);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t bxcan_tx_isr(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = dev_id;</div><div class='add'>+	struct bxcan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct bxcan_regs __iomem *regs = priv-&gt;regs;</div><div class='add'>+	struct net_device_stats *stats = &amp;ndev-&gt;stats;</div><div class='add'>+	u32 tsr, rqcp_bit;</div><div class='add'>+	int idx;</div><div class='add'>+</div><div class='add'>+	tsr = readl(&amp;regs-&gt;tsr);</div><div class='add'>+	if (!(tsr &amp; (BXCAN_TSR_RQCP0 | BXCAN_TSR_RQCP1 | BXCAN_TSR_RQCP2)))</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+</div><div class='add'>+	while (priv-&gt;tx_head - priv-&gt;tx_tail &gt; 0) {</div><div class='add'>+		idx = bxcan_get_tx_tail(priv);</div><div class='add'>+		rqcp_bit = BXCAN_TSR_RQCP0 &lt;&lt; (idx &lt;&lt; 3);</div><div class='add'>+		if (!(tsr &amp; rqcp_bit))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		stats-&gt;tx_packets++;</div><div class='add'>+		stats-&gt;tx_bytes += can_get_echo_skb(ndev, idx, NULL);</div><div class='add'>+		priv-&gt;tx_tail++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	writel(tsr, &amp;regs-&gt;tsr);</div><div class='add'>+</div><div class='add'>+	if (bxcan_get_tx_free(priv)) {</div><div class='add'>+		/* Make sure that anybody stopping the queue after</div><div class='add'>+		 * this sees the new tx_ring-&gt;tail.</div><div class='add'>+		 */</div><div class='add'>+		smp_mb();</div><div class='add'>+		netif_wake_queue(ndev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bxcan_handle_state_change(struct net_device *ndev, u32 esr)</div><div class='add'>+{</div><div class='add'>+	struct bxcan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	enum can_state new_state = priv-&gt;can.state;</div><div class='add'>+	struct can_berr_counter bec;</div><div class='add'>+	enum can_state rx_state, tx_state;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+</div><div class='add'>+	/* Early exit if no error flag is set */</div><div class='add'>+	if (!(esr &amp; (BXCAN_ESR_EWGF | BXCAN_ESR_EPVF | BXCAN_ESR_BOFF)))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	bec.txerr = FIELD_GET(BXCAN_ESR_TEC_MASK, esr);</div><div class='add'>+	bec.rxerr = FIELD_GET(BXCAN_ESR_REC_MASK, esr);</div><div class='add'>+</div><div class='add'>+	if (esr &amp; BXCAN_ESR_BOFF)</div><div class='add'>+		new_state = CAN_STATE_BUS_OFF;</div><div class='add'>+	else if (esr &amp; BXCAN_ESR_EPVF)</div><div class='add'>+		new_state = CAN_STATE_ERROR_PASSIVE;</div><div class='add'>+	else if (esr &amp; BXCAN_ESR_EWGF)</div><div class='add'>+		new_state = CAN_STATE_ERROR_WARNING;</div><div class='add'>+</div><div class='add'>+	/* state hasn't changed */</div><div class='add'>+	if (unlikely(new_state == priv-&gt;can.state))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_err_skb(ndev, &amp;cf);</div><div class='add'>+</div><div class='add'>+	tx_state = bec.txerr &gt;= bec.rxerr ? new_state : 0;</div><div class='add'>+	rx_state = bec.txerr &lt;= bec.rxerr ? new_state : 0;</div><div class='add'>+	can_change_state(ndev, cf, tx_state, rx_state);</div><div class='add'>+</div><div class='add'>+	if (new_state == CAN_STATE_BUS_OFF) {</div><div class='add'>+		can_bus_off(ndev);</div><div class='add'>+	} else if (skb) {</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_CNT;</div><div class='add'>+		cf-&gt;data[6] = bec.txerr;</div><div class='add'>+		cf-&gt;data[7] = bec.rxerr;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (skb) {</div><div class='add'>+		int err;</div><div class='add'>+</div><div class='add'>+		err = can_rx_offload_queue_timestamp(&amp;priv-&gt;offload, skb,</div><div class='add'>+						     priv-&gt;timestamp);</div><div class='add'>+		if (err)</div><div class='add'>+			ndev-&gt;stats.rx_fifo_errors++;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bxcan_handle_bus_err(struct net_device *ndev, u32 esr)</div><div class='add'>+{</div><div class='add'>+	struct bxcan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	enum bxcan_lec_code lec_code;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	lec_code = FIELD_GET(BXCAN_ESR_LEC_MASK, esr);</div><div class='add'>+</div><div class='add'>+	/* Early exit if no lec update or no error.</div><div class='add'>+	 * No lec update means that no CAN bus event has been detected</div><div class='add'>+	 * since CPU wrote BXCAN_LEC_UNUSED value to status reg.</div><div class='add'>+	 */</div><div class='add'>+	if (lec_code == BXCAN_LEC_UNUSED || lec_code == BXCAN_LEC_NO_ERROR)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Common for all type of bus errors */</div><div class='add'>+	priv-&gt;can.can_stats.bus_error++;</div><div class='add'>+</div><div class='add'>+	/* Propagate the error condition to the CAN stack */</div><div class='add'>+	skb = alloc_can_err_skb(ndev, &amp;cf);</div><div class='add'>+	if (skb)</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='add'>+</div><div class='add'>+	switch (lec_code) {</div><div class='add'>+	case BXCAN_LEC_STUFF_ERROR:</div><div class='add'>+		netdev_dbg(ndev, "Stuff error\n");</div><div class='add'>+		ndev-&gt;stats.rx_errors++;</div><div class='add'>+		if (skb)</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case BXCAN_LEC_FORM_ERROR:</div><div class='add'>+		netdev_dbg(ndev, "Form error\n");</div><div class='add'>+		ndev-&gt;stats.rx_errors++;</div><div class='add'>+		if (skb)</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case BXCAN_LEC_ACK_ERROR:</div><div class='add'>+		netdev_dbg(ndev, "Ack error\n");</div><div class='add'>+		ndev-&gt;stats.tx_errors++;</div><div class='add'>+		if (skb) {</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_ACK;</div><div class='add'>+			cf-&gt;data[3] = CAN_ERR_PROT_LOC_ACK;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case BXCAN_LEC_BIT1_ERROR:</div><div class='add'>+		netdev_dbg(ndev, "Bit error (recessive)\n");</div><div class='add'>+		ndev-&gt;stats.tx_errors++;</div><div class='add'>+		if (skb)</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_BIT1;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case BXCAN_LEC_BIT0_ERROR:</div><div class='add'>+		netdev_dbg(ndev, "Bit error (dominant)\n");</div><div class='add'>+		ndev-&gt;stats.tx_errors++;</div><div class='add'>+		if (skb)</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_BIT0;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case BXCAN_LEC_CRC_ERROR:</div><div class='add'>+		netdev_dbg(ndev, "CRC error\n");</div><div class='add'>+		ndev-&gt;stats.rx_errors++;</div><div class='add'>+		if (skb) {</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_BIT;</div><div class='add'>+			cf-&gt;data[3] = CAN_ERR_PROT_LOC_CRC_SEQ;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (skb) {</div><div class='add'>+		int err;</div><div class='add'>+</div><div class='add'>+		err = can_rx_offload_queue_timestamp(&amp;priv-&gt;offload, skb,</div><div class='add'>+						     priv-&gt;timestamp);</div><div class='add'>+		if (err)</div><div class='add'>+			ndev-&gt;stats.rx_fifo_errors++;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t bxcan_state_change_isr(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = dev_id;</div><div class='add'>+	struct bxcan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct bxcan_regs __iomem *regs = priv-&gt;regs;</div><div class='add'>+	u32 msr, esr;</div><div class='add'>+</div><div class='add'>+	msr = readl(&amp;regs-&gt;msr);</div><div class='add'>+	if (!(msr &amp; BXCAN_MSR_ERRI))</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+</div><div class='add'>+	esr = readl(&amp;regs-&gt;esr);</div><div class='add'>+	bxcan_handle_state_change(ndev, esr);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING)</div><div class='add'>+		bxcan_handle_bus_err(ndev, esr);</div><div class='add'>+</div><div class='add'>+	msr |= BXCAN_MSR_ERRI;</div><div class='add'>+	writel(msr, &amp;regs-&gt;msr);</div><div class='add'>+	can_rx_offload_irq_finish(&amp;priv-&gt;offload);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bxcan_chip_start(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct bxcan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct bxcan_regs __iomem *regs = priv-&gt;regs;</div><div class='add'>+	struct can_bittiming *bt = &amp;priv-&gt;can.bittiming;</div><div class='add'>+	u32 clr, set;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = bxcan_chip_softreset(priv);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(ndev, "failed to reset chip, error %pe\n",</div><div class='add'>+			   ERR_PTR(err));</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = bxcan_leave_sleep_mode(priv);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(ndev, "failed to leave sleep mode, error %pe\n",</div><div class='add'>+			   ERR_PTR(err));</div><div class='add'>+		goto failed_leave_sleep;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = bxcan_enter_init_mode(priv);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(ndev, "failed to enter init mode, error %pe\n",</div><div class='add'>+			   ERR_PTR(err));</div><div class='add'>+		goto failed_enter_init;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* MCR</div><div class='add'>+	 *</div><div class='add'>+	 * select request order priority</div><div class='add'>+	 * enable time triggered mode</div><div class='add'>+	 * bus-off state left on sw request</div><div class='add'>+	 * sleep mode left on sw request</div><div class='add'>+	 * retransmit automatically on error</div><div class='add'>+	 * do not lock RX FIFO on overrun</div><div class='add'>+	 */</div><div class='add'>+	bxcan_rmw(priv, &amp;regs-&gt;mcr,</div><div class='add'>+		  BXCAN_MCR_ABOM | BXCAN_MCR_AWUM | BXCAN_MCR_NART |</div><div class='add'>+		  BXCAN_MCR_RFLM, BXCAN_MCR_TTCM | BXCAN_MCR_TXFP);</div><div class='add'>+</div><div class='add'>+	/* Bit timing register settings */</div><div class='add'>+	set = FIELD_PREP(BXCAN_BTR_BRP_MASK, bt-&gt;brp - 1) |</div><div class='add'>+		FIELD_PREP(BXCAN_BTR_TS1_MASK, bt-&gt;phase_seg1 +</div><div class='add'>+			   bt-&gt;prop_seg - 1) |</div><div class='add'>+		FIELD_PREP(BXCAN_BTR_TS2_MASK, bt-&gt;phase_seg2 - 1) |</div><div class='add'>+		FIELD_PREP(BXCAN_BTR_SJW_MASK, bt-&gt;sjw - 1);</div><div class='add'>+</div><div class='add'>+	/* loopback + silent mode put the controller in test mode,</div><div class='add'>+	 * useful for hot self-test</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LOOPBACK)</div><div class='add'>+		set |= BXCAN_BTR_LBKM;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LISTENONLY)</div><div class='add'>+		set |= BXCAN_BTR_SILM;</div><div class='add'>+</div><div class='add'>+	bxcan_rmw(priv, &amp;regs-&gt;btr, BXCAN_BTR_SILM | BXCAN_BTR_LBKM |</div><div class='add'>+		  BXCAN_BTR_BRP_MASK | BXCAN_BTR_TS1_MASK | BXCAN_BTR_TS2_MASK |</div><div class='add'>+		  BXCAN_BTR_SJW_MASK, set);</div><div class='add'>+</div><div class='add'>+	bxcan_enable_filters(priv, priv-&gt;cfg);</div><div class='add'>+</div><div class='add'>+	/* Clear all internal status */</div><div class='add'>+	priv-&gt;tx_head = 0;</div><div class='add'>+	priv-&gt;tx_tail = 0;</div><div class='add'>+</div><div class='add'>+	err = bxcan_leave_init_mode(priv);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(ndev, "failed to leave init mode, error %pe\n",</div><div class='add'>+			   ERR_PTR(err));</div><div class='add'>+		goto failed_leave_init;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set a `lec` value so that we can check for updates later */</div><div class='add'>+	bxcan_rmw(priv, &amp;regs-&gt;esr, BXCAN_ESR_LEC_MASK,</div><div class='add'>+		  FIELD_PREP(BXCAN_ESR_LEC_MASK, BXCAN_LEC_UNUSED));</div><div class='add'>+</div><div class='add'>+	/* IER</div><div class='add'>+	 *</div><div class='add'>+	 * Enable interrupt for:</div><div class='add'>+	 * bus-off</div><div class='add'>+	 * passive error</div><div class='add'>+	 * warning error</div><div class='add'>+	 * last error code</div><div class='add'>+	 * RX FIFO pending message</div><div class='add'>+	 * TX mailbox empty</div><div class='add'>+	 */</div><div class='add'>+	clr = BXCAN_IER_WKUIE | BXCAN_IER_SLKIE |  BXCAN_IER_FOVIE1 |</div><div class='add'>+		BXCAN_IER_FFIE1 | BXCAN_IER_FMPIE1 | BXCAN_IER_FOVIE0 |</div><div class='add'>+		BXCAN_IER_FFIE0;</div><div class='add'>+	set = BXCAN_IER_ERRIE | BXCAN_IER_BOFIE | BXCAN_IER_EPVIE |</div><div class='add'>+		BXCAN_IER_EWGIE | BXCAN_IER_FMPIE0 | BXCAN_IER_TMEIE;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING)</div><div class='add'>+		set |= BXCAN_IER_LECIE;</div><div class='add'>+	else</div><div class='add'>+		clr |= BXCAN_IER_LECIE;</div><div class='add'>+</div><div class='add'>+	bxcan_rmw(priv, &amp;regs-&gt;ier, clr, set);</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+failed_leave_init:</div><div class='add'>+failed_enter_init:</div><div class='add'>+failed_leave_sleep:</div><div class='add'>+	bxcan_chip_softreset(priv);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bxcan_open(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct bxcan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = clk_prepare_enable(priv-&gt;clk);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(ndev, "failed to enable clock, error %pe\n",</div><div class='add'>+			   ERR_PTR(err));</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = open_candev(ndev);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(ndev, "open_candev() failed, error %pe\n",</div><div class='add'>+			   ERR_PTR(err));</div><div class='add'>+		goto out_disable_clock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	can_rx_offload_enable(&amp;priv-&gt;offload);</div><div class='add'>+	err = request_irq(ndev-&gt;irq, bxcan_rx_isr, IRQF_SHARED, ndev-&gt;name,</div><div class='add'>+			  ndev);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(ndev, "failed to register rx irq(%d), error %pe\n",</div><div class='add'>+			   ndev-&gt;irq, ERR_PTR(err));</div><div class='add'>+		goto out_close_candev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = request_irq(priv-&gt;tx_irq, bxcan_tx_isr, IRQF_SHARED, ndev-&gt;name,</div><div class='add'>+			  ndev);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(ndev, "failed to register tx irq(%d), error %pe\n",</div><div class='add'>+			   priv-&gt;tx_irq, ERR_PTR(err));</div><div class='add'>+		goto out_free_rx_irq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = request_irq(priv-&gt;sce_irq, bxcan_state_change_isr, IRQF_SHARED,</div><div class='add'>+			  ndev-&gt;name, ndev);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(ndev, "failed to register sce irq(%d), error %pe\n",</div><div class='add'>+			   priv-&gt;sce_irq, ERR_PTR(err));</div><div class='add'>+		goto out_free_tx_irq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = bxcan_chip_start(ndev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_free_sce_irq;</div><div class='add'>+</div><div class='add'>+	netif_start_queue(ndev);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_free_sce_irq:</div><div class='add'>+	free_irq(priv-&gt;sce_irq, ndev);</div><div class='add'>+out_free_tx_irq:</div><div class='add'>+	free_irq(priv-&gt;tx_irq, ndev);</div><div class='add'>+out_free_rx_irq:</div><div class='add'>+	free_irq(ndev-&gt;irq, ndev);</div><div class='add'>+out_close_candev:</div><div class='add'>+	can_rx_offload_disable(&amp;priv-&gt;offload);</div><div class='add'>+	close_candev(ndev);</div><div class='add'>+out_disable_clock:</div><div class='add'>+	clk_disable_unprepare(priv-&gt;clk);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bxcan_chip_stop(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct bxcan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct bxcan_regs __iomem *regs = priv-&gt;regs;</div><div class='add'>+</div><div class='add'>+	/* disable all interrupts */</div><div class='add'>+	bxcan_rmw(priv, &amp;regs-&gt;ier, BXCAN_IER_SLKIE | BXCAN_IER_WKUIE |</div><div class='add'>+		  BXCAN_IER_ERRIE | BXCAN_IER_LECIE | BXCAN_IER_BOFIE |</div><div class='add'>+		  BXCAN_IER_EPVIE | BXCAN_IER_EWGIE | BXCAN_IER_FOVIE1 |</div><div class='add'>+		  BXCAN_IER_FFIE1 | BXCAN_IER_FMPIE1 | BXCAN_IER_FOVIE0 |</div><div class='add'>+		  BXCAN_IER_FFIE0 | BXCAN_IER_FMPIE0 | BXCAN_IER_TMEIE, 0);</div><div class='add'>+	bxcan_disable_filters(priv, priv-&gt;cfg);</div><div class='add'>+	bxcan_enter_sleep_mode(priv);</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bxcan_stop(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct bxcan_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(ndev);</div><div class='add'>+	bxcan_chip_stop(ndev);</div><div class='add'>+	free_irq(ndev-&gt;irq, ndev);</div><div class='add'>+	free_irq(priv-&gt;tx_irq, ndev);</div><div class='add'>+	free_irq(priv-&gt;sce_irq, ndev);</div><div class='add'>+	can_rx_offload_disable(&amp;priv-&gt;offload);</div><div class='add'>+	close_candev(ndev);</div><div class='add'>+	clk_disable_unprepare(priv-&gt;clk);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static netdev_tx_t bxcan_start_xmit(struct sk_buff *skb,</div><div class='add'>+				    struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct bxcan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct can_frame *cf = (struct can_frame *)skb-&gt;data;</div><div class='add'>+	struct bxcan_regs __iomem *regs = priv-&gt;regs;</div><div class='add'>+	struct bxcan_mb __iomem *mb_regs;</div><div class='add'>+	unsigned int idx;</div><div class='add'>+	u32 id;</div><div class='add'>+	int i, j;</div><div class='add'>+</div><div class='add'>+	if (can_dev_dropped_skb(ndev, skb))</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+	if (bxcan_tx_busy(priv))</div><div class='add'>+		return NETDEV_TX_BUSY;</div><div class='add'>+</div><div class='add'>+	idx = bxcan_get_tx_head(priv);</div><div class='add'>+	priv-&gt;tx_head++;</div><div class='add'>+	if (bxcan_get_tx_free(priv) == 0)</div><div class='add'>+		netif_stop_queue(ndev);</div><div class='add'>+</div><div class='add'>+	mb_regs = &amp;regs-&gt;tx_mb[idx];</div><div class='add'>+	if (cf-&gt;can_id &amp; CAN_EFF_FLAG)</div><div class='add'>+		id = FIELD_PREP(BXCAN_TIxR_EXID_MASK, cf-&gt;can_id) |</div><div class='add'>+			BXCAN_TIxR_IDE;</div><div class='add'>+	else</div><div class='add'>+		id = FIELD_PREP(BXCAN_TIxR_STID_MASK, cf-&gt;can_id);</div><div class='add'>+</div><div class='add'>+	if (cf-&gt;can_id &amp; CAN_RTR_FLAG) { /* Remote transmission request */</div><div class='add'>+		id |= BXCAN_TIxR_RTR;</div><div class='add'>+	} else {</div><div class='add'>+		for (i = 0, j = 0; i &lt; cf-&gt;len; i += 4, j++)</div><div class='add'>+			writel(*(u32 *)(cf-&gt;data + i), &amp;mb_regs-&gt;data[j]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	writel(FIELD_PREP(BXCAN_TDTxR_DLC_MASK, cf-&gt;len), &amp;mb_regs-&gt;dlc);</div><div class='add'>+</div><div class='add'>+	can_put_echo_skb(skb, ndev, idx, 0);</div><div class='add'>+</div><div class='add'>+	/* Start transmission */</div><div class='add'>+	writel(id | BXCAN_TIxR_TXRQ, &amp;mb_regs-&gt;id);</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops bxcan_netdev_ops = {</div><div class='add'>+	.ndo_open = bxcan_open,</div><div class='add'>+	.ndo_stop = bxcan_stop,</div><div class='add'>+	.ndo_start_xmit = bxcan_start_xmit,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops bxcan_ethtool_ops = {</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int bxcan_do_set_mode(struct net_device *ndev, enum can_mode mode)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case CAN_MODE_START:</div><div class='add'>+		err = bxcan_chip_start(ndev);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		netif_wake_queue(ndev);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bxcan_get_berr_counter(const struct net_device *ndev,</div><div class='add'>+				  struct can_berr_counter *bec)</div><div class='add'>+{</div><div class='add'>+	struct bxcan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct bxcan_regs __iomem *regs = priv-&gt;regs;</div><div class='add'>+	u32 esr;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = clk_prepare_enable(priv-&gt;clk);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	esr = readl(&amp;regs-&gt;esr);</div><div class='add'>+	bec-&gt;txerr = FIELD_GET(BXCAN_ESR_TEC_MASK, esr);</div><div class='add'>+	bec-&gt;rxerr = FIELD_GET(BXCAN_ESR_REC_MASK, esr);</div><div class='add'>+	clk_disable_unprepare(priv-&gt;clk);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bxcan_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct device_node *np = pdev-&gt;dev.of_node;</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	struct bxcan_priv *priv;</div><div class='add'>+	struct clk *clk = NULL;</div><div class='add'>+	void __iomem *regs;</div><div class='add'>+	struct regmap *gcan;</div><div class='add'>+	enum bxcan_cfg cfg;</div><div class='add'>+	int err, rx_irq, tx_irq, sce_irq;</div><div class='add'>+</div><div class='add'>+	regs = devm_platform_ioremap_resource(pdev, 0);</div><div class='add'>+	if (IS_ERR(regs)) {</div><div class='add'>+		dev_err(dev, "failed to get base address\n");</div><div class='add'>+		return PTR_ERR(regs);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	gcan = syscon_regmap_lookup_by_phandle(np, "st,gcan");</div><div class='add'>+	if (IS_ERR(gcan)) {</div><div class='add'>+		dev_err(dev, "failed to get shared memory base address\n");</div><div class='add'>+		return PTR_ERR(gcan);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (of_property_read_bool(np, "st,can-primary"))</div><div class='add'>+		cfg = BXCAN_CFG_DUAL_PRIMARY;</div><div class='add'>+	else if (of_property_read_bool(np, "st,can-secondary"))</div><div class='add'>+		cfg = BXCAN_CFG_DUAL_SECONDARY;</div><div class='add'>+	else</div><div class='add'>+		cfg = BXCAN_CFG_SINGLE;</div><div class='add'>+</div><div class='add'>+	clk = devm_clk_get(dev, NULL);</div><div class='add'>+	if (IS_ERR(clk)) {</div><div class='add'>+		dev_err(dev, "failed to get clock\n");</div><div class='add'>+		return PTR_ERR(clk);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rx_irq = platform_get_irq_byname(pdev, "rx0");</div><div class='add'>+	if (rx_irq &lt; 0)</div><div class='add'>+		return rx_irq;</div><div class='add'>+</div><div class='add'>+	tx_irq = platform_get_irq_byname(pdev, "tx");</div><div class='add'>+	if (tx_irq &lt; 0)</div><div class='add'>+		return tx_irq;</div><div class='add'>+</div><div class='add'>+	sce_irq = platform_get_irq_byname(pdev, "sce");</div><div class='add'>+	if (sce_irq &lt; 0)</div><div class='add'>+		return sce_irq;</div><div class='add'>+</div><div class='add'>+	ndev = alloc_candev(sizeof(struct bxcan_priv), BXCAN_TX_MB_NUM);</div><div class='add'>+	if (!ndev) {</div><div class='add'>+		dev_err(dev, "alloc_candev() failed\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv = netdev_priv(ndev);</div><div class='add'>+	platform_set_drvdata(pdev, ndev);</div><div class='add'>+	SET_NETDEV_DEV(ndev, dev);</div><div class='add'>+	ndev-&gt;netdev_ops = &amp;bxcan_netdev_ops;</div><div class='add'>+	ndev-&gt;ethtool_ops = &amp;bxcan_ethtool_ops;</div><div class='add'>+	ndev-&gt;irq = rx_irq;</div><div class='add'>+	ndev-&gt;flags |= IFF_ECHO;</div><div class='add'>+</div><div class='add'>+	priv-&gt;dev = dev;</div><div class='add'>+	priv-&gt;ndev = ndev;</div><div class='add'>+	priv-&gt;regs = regs;</div><div class='add'>+	priv-&gt;gcan = gcan;</div><div class='add'>+	priv-&gt;clk = clk;</div><div class='add'>+	priv-&gt;tx_irq = tx_irq;</div><div class='add'>+	priv-&gt;sce_irq = sce_irq;</div><div class='add'>+	priv-&gt;cfg = cfg;</div><div class='add'>+	priv-&gt;can.clock.freq = clk_get_rate(clk);</div><div class='add'>+	spin_lock_init(&amp;priv-&gt;rmw_lock);</div><div class='add'>+	priv-&gt;tx_head = 0;</div><div class='add'>+	priv-&gt;tx_tail = 0;</div><div class='add'>+	priv-&gt;can.bittiming_const = &amp;bxcan_bittiming_const;</div><div class='add'>+	priv-&gt;can.do_set_mode = bxcan_do_set_mode;</div><div class='add'>+	priv-&gt;can.do_get_berr_counter = bxcan_get_berr_counter;</div><div class='add'>+	priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK |</div><div class='add'>+		CAN_CTRLMODE_LISTENONLY	| CAN_CTRLMODE_BERR_REPORTING;</div><div class='add'>+</div><div class='add'>+	priv-&gt;offload.mailbox_read = bxcan_mailbox_read;</div><div class='add'>+	err = can_rx_offload_add_fifo(ndev, &amp;priv-&gt;offload, BXCAN_NAPI_WEIGHT);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "failed to add FIFO rx_offload\n");</div><div class='add'>+		goto out_free_candev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = register_candev(ndev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "failed to register netdev\n");</div><div class='add'>+		goto out_can_rx_offload_del;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_info(dev, "clk: %d Hz, IRQs: %d, %d, %d\n", priv-&gt;can.clock.freq,</div><div class='add'>+		 tx_irq, rx_irq, sce_irq);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_can_rx_offload_del:</div><div class='add'>+	can_rx_offload_del(&amp;priv-&gt;offload);</div><div class='add'>+out_free_candev:</div><div class='add'>+	free_candev(ndev);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bxcan_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = platform_get_drvdata(pdev);</div><div class='add'>+	struct bxcan_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	unregister_candev(ndev);</div><div class='add'>+	clk_disable_unprepare(priv-&gt;clk);</div><div class='add'>+	can_rx_offload_del(&amp;priv-&gt;offload);</div><div class='add'>+	free_candev(ndev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __maybe_unused bxcan_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = dev_get_drvdata(dev);</div><div class='add'>+	struct bxcan_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	if (!netif_running(ndev))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(ndev);</div><div class='add'>+	netif_device_detach(ndev);</div><div class='add'>+</div><div class='add'>+	bxcan_enter_sleep_mode(priv);</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_SLEEPING;</div><div class='add'>+	clk_disable_unprepare(priv-&gt;clk);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __maybe_unused bxcan_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = dev_get_drvdata(dev);</div><div class='add'>+	struct bxcan_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	if (!netif_running(ndev))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	clk_prepare_enable(priv-&gt;clk);</div><div class='add'>+	bxcan_leave_sleep_mode(priv);</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+</div><div class='add'>+	netif_device_attach(ndev);</div><div class='add'>+	netif_start_queue(ndev);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static SIMPLE_DEV_PM_OPS(bxcan_pm_ops, bxcan_suspend, bxcan_resume);</div><div class='add'>+</div><div class='add'>+static const struct of_device_id bxcan_of_match[] = {</div><div class='add'>+	{.compatible = "st,stm32f4-bxcan"},</div><div class='add'>+	{ /* sentinel */ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, bxcan_of_match);</div><div class='add'>+</div><div class='add'>+static struct platform_driver bxcan_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = KBUILD_MODNAME,</div><div class='add'>+		.pm = &amp;bxcan_pm_ops,</div><div class='add'>+		.of_match_table = bxcan_of_match,</div><div class='add'>+	},</div><div class='add'>+	.probe = bxcan_probe,</div><div class='add'>+	.remove = bxcan_remove,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_platform_driver(bxcan_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Dario Binacchi &lt;dario.binacchi@amarulasolutions.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("STMicroelectronics Basic Extended CAN controller driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/can/c_can/Kconfig b/drivers/net/can/c_can/Kconfig<br/>index 61ffc12d8fd8..1f0e9acb69ec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/c_can/Kconfig?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/c_can/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/c_can/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/c_can/Kconfig</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> menuconfig CAN_C_CAN</div><div class='ctx'> 	tristate "Bosch C_CAN/D_CAN devices"</div><div class='ctx'> 	depends on HAS_IOMEM</div><div class='hunk'>@@ -6,7 +7,7 @@ if CAN_C_CAN</div><div class='ctx'> </div><div class='ctx'> config CAN_C_CAN_PLATFORM</div><div class='ctx'> 	tristate "Generic Platform Bus based C_CAN/D_CAN driver"</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  This driver adds support for the C_CAN/D_CAN chips connected</div><div class='ctx'> 	  to the "platform bus" (Linux abstraction for directly to the</div><div class='ctx'> 	  processor attached devices) which can be found on various</div><div class='hunk'>@@ -17,7 +18,8 @@ config CAN_C_CAN_PLATFORM</div><div class='ctx'> config CAN_C_CAN_PCI</div><div class='ctx'> 	tristate "Generic PCI Bus based C_CAN/D_CAN driver"</div><div class='ctx'> 	depends on PCI</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  This driver adds support for the C_CAN/D_CAN chips connected</div><div class='del'>-	  to the PCI bus.</div><div class='add'>+	  to the PCI bus. E.g. for the C_CAN controller IP inside the</div><div class='add'>+	  Intel Atom E6xx series IOH (aka EG20T 'PCH CAN').</div><div class='ctx'> endif</div><div class='head'>diff --git a/drivers/net/can/c_can/Makefile b/drivers/net/can/c_can/Makefile<br/>index 9fdc678b5b37..6fa3b2b9e4b9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/c_can/Makefile?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/c_can/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/c_can/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/c_can/Makefile</a></div><div class='hunk'>@@ -1,7 +1,13 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> #</div><div class='ctx'> #  Makefile for the Bosch C_CAN controller drivers.</div><div class='ctx'> #</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_CAN_C_CAN) += c_can.o</div><div class='add'>+</div><div class='add'>+c_can-objs :=</div><div class='add'>+c_can-objs += c_can_ethtool.o</div><div class='add'>+c_can-objs += c_can_main.o</div><div class='add'>+</div><div class='ctx'> obj-$(CONFIG_CAN_C_CAN_PLATFORM) += c_can_platform.o</div><div class='ctx'> obj-$(CONFIG_CAN_C_CAN_PCI) += c_can_pci.o</div><div class='head'>diff --git a/drivers/net/can/c_can/c_can.c b/drivers/net/can/c_can/c_can.c<br/>deleted file mode 100644<br/>index 5d214d135332..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/c_can/c_can.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/c_can/c_can.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,1296 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * CAN bus driver for Bosch C_CAN controller</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2010 ST Microelectronics</div><div class='del'>- * Bhupesh Sharma &lt;bhupesh.sharma@st.com&gt;</div><div class='del'>- *</div><div class='del'>- * Borrowed heavily from the C_CAN driver originally written by:</div><div class='del'>- * Copyright (C) 2007</div><div class='del'>- * - Sascha Hauer, Marc Kleine-Budde, Pengutronix &lt;s.hauer@pengutronix.de&gt;</div><div class='del'>- * - Simon Kallweit, intefo AG &lt;simon.kallweit@intefo.ch&gt;</div><div class='del'>- *</div><div class='del'>- * TX and RX NAPI implementation has been borrowed from at91 CAN driver</div><div class='del'>- * written by:</div><div class='del'>- * Copyright</div><div class='del'>- * (C) 2007 by Hans J. Koch &lt;hjk@hansjkoch.de&gt;</div><div class='del'>- * (C) 2008, 2009 by Marc Kleine-Budde &lt;kernel@pengutronix.de&gt;</div><div class='del'>- *</div><div class='del'>- * Bosch C_CAN controller is compliant to CAN protocol version 2.0 part A and B.</div><div class='del'>- * Bosch C_CAN user manual can be obtained from:</div><div class='del'>- * http://www.semiconductors.bosch.de/media/en/pdf/ipmodules_1/c_can/</div><div class='del'>- * users_manual_c_can.pdf</div><div class='del'>- *</div><div class='del'>- * This file is licensed under the terms of the GNU General Public</div><div class='del'>- * License version 2. This program is licensed "as is" without any</div><div class='del'>- * warranty of any kind, whether express or implied.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/if_arp.h&gt;</div><div class='del'>-#include &lt;linux/if_ether.h&gt;</div><div class='del'>-#include &lt;linux/list.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/pm_runtime.h&gt;</div><div class='del'>-#include &lt;linux/pinctrl/consumer.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;linux/can.h&gt;</div><div class='del'>-#include &lt;linux/can/dev.h&gt;</div><div class='del'>-#include &lt;linux/can/error.h&gt;</div><div class='del'>-#include &lt;linux/can/led.h&gt;</div><div class='del'>-</div><div class='del'>-#include "c_can.h"</div><div class='del'>-</div><div class='del'>-/* Number of interface registers */</div><div class='del'>-#define IF_ENUM_REG_LEN		11</div><div class='del'>-#define C_CAN_IFACE(reg, iface)	(C_CAN_IF1_##reg + (iface) * IF_ENUM_REG_LEN)</div><div class='del'>-</div><div class='del'>-/* control extension register D_CAN specific */</div><div class='del'>-#define CONTROL_EX_PDR		BIT(8)</div><div class='del'>-</div><div class='del'>-/* control register */</div><div class='del'>-#define CONTROL_TEST		BIT(7)</div><div class='del'>-#define CONTROL_CCE		BIT(6)</div><div class='del'>-#define CONTROL_DISABLE_AR	BIT(5)</div><div class='del'>-#define CONTROL_ENABLE_AR	(0 &lt;&lt; 5)</div><div class='del'>-#define CONTROL_EIE		BIT(3)</div><div class='del'>-#define CONTROL_SIE		BIT(2)</div><div class='del'>-#define CONTROL_IE		BIT(1)</div><div class='del'>-#define CONTROL_INIT		BIT(0)</div><div class='del'>-</div><div class='del'>-#define CONTROL_IRQMSK		(CONTROL_EIE | CONTROL_IE | CONTROL_SIE)</div><div class='del'>-</div><div class='del'>-/* test register */</div><div class='del'>-#define TEST_RX			BIT(7)</div><div class='del'>-#define TEST_TX1		BIT(6)</div><div class='del'>-#define TEST_TX2		BIT(5)</div><div class='del'>-#define TEST_LBACK		BIT(4)</div><div class='del'>-#define TEST_SILENT		BIT(3)</div><div class='del'>-#define TEST_BASIC		BIT(2)</div><div class='del'>-</div><div class='del'>-/* status register */</div><div class='del'>-#define STATUS_PDA		BIT(10)</div><div class='del'>-#define STATUS_BOFF		BIT(7)</div><div class='del'>-#define STATUS_EWARN		BIT(6)</div><div class='del'>-#define STATUS_EPASS		BIT(5)</div><div class='del'>-#define STATUS_RXOK		BIT(4)</div><div class='del'>-#define STATUS_TXOK		BIT(3)</div><div class='del'>-</div><div class='del'>-/* error counter register */</div><div class='del'>-#define ERR_CNT_TEC_MASK	0xff</div><div class='del'>-#define ERR_CNT_TEC_SHIFT	0</div><div class='del'>-#define ERR_CNT_REC_SHIFT	8</div><div class='del'>-#define ERR_CNT_REC_MASK	(0x7f &lt;&lt; ERR_CNT_REC_SHIFT)</div><div class='del'>-#define ERR_CNT_RP_SHIFT	15</div><div class='del'>-#define ERR_CNT_RP_MASK		(0x1 &lt;&lt; ERR_CNT_RP_SHIFT)</div><div class='del'>-</div><div class='del'>-/* bit-timing register */</div><div class='del'>-#define BTR_BRP_MASK		0x3f</div><div class='del'>-#define BTR_BRP_SHIFT		0</div><div class='del'>-#define BTR_SJW_SHIFT		6</div><div class='del'>-#define BTR_SJW_MASK		(0x3 &lt;&lt; BTR_SJW_SHIFT)</div><div class='del'>-#define BTR_TSEG1_SHIFT		8</div><div class='del'>-#define BTR_TSEG1_MASK		(0xf &lt;&lt; BTR_TSEG1_SHIFT)</div><div class='del'>-#define BTR_TSEG2_SHIFT		12</div><div class='del'>-#define BTR_TSEG2_MASK		(0x7 &lt;&lt; BTR_TSEG2_SHIFT)</div><div class='del'>-</div><div class='del'>-/* brp extension register */</div><div class='del'>-#define BRP_EXT_BRPE_MASK	0x0f</div><div class='del'>-#define BRP_EXT_BRPE_SHIFT	0</div><div class='del'>-</div><div class='del'>-/* IFx command request */</div><div class='del'>-#define IF_COMR_BUSY		BIT(15)</div><div class='del'>-</div><div class='del'>-/* IFx command mask */</div><div class='del'>-#define IF_COMM_WR		BIT(7)</div><div class='del'>-#define IF_COMM_MASK		BIT(6)</div><div class='del'>-#define IF_COMM_ARB		BIT(5)</div><div class='del'>-#define IF_COMM_CONTROL		BIT(4)</div><div class='del'>-#define IF_COMM_CLR_INT_PND	BIT(3)</div><div class='del'>-#define IF_COMM_TXRQST		BIT(2)</div><div class='del'>-#define IF_COMM_CLR_NEWDAT	IF_COMM_TXRQST</div><div class='del'>-#define IF_COMM_DATAA		BIT(1)</div><div class='del'>-#define IF_COMM_DATAB		BIT(0)</div><div class='del'>-</div><div class='del'>-/* TX buffer setup */</div><div class='del'>-#define IF_COMM_TX		(IF_COMM_ARB | IF_COMM_CONTROL | \</div><div class='del'>-				 IF_COMM_TXRQST |		 \</div><div class='del'>-				 IF_COMM_DATAA | IF_COMM_DATAB)</div><div class='del'>-</div><div class='del'>-/* For the low buffers we clear the interrupt bit, but keep newdat */</div><div class='del'>-#define IF_COMM_RCV_LOW		(IF_COMM_MASK | IF_COMM_ARB | \</div><div class='del'>-				 IF_COMM_CONTROL | IF_COMM_CLR_INT_PND | \</div><div class='del'>-				 IF_COMM_DATAA | IF_COMM_DATAB)</div><div class='del'>-</div><div class='del'>-/* For the high buffers we clear the interrupt bit and newdat */</div><div class='del'>-#define IF_COMM_RCV_HIGH	(IF_COMM_RCV_LOW | IF_COMM_CLR_NEWDAT)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* Receive setup of message objects */</div><div class='del'>-#define IF_COMM_RCV_SETUP	(IF_COMM_MASK | IF_COMM_ARB | IF_COMM_CONTROL)</div><div class='del'>-</div><div class='del'>-/* Invalidation of message objects */</div><div class='del'>-#define IF_COMM_INVAL		(IF_COMM_ARB | IF_COMM_CONTROL)</div><div class='del'>-</div><div class='del'>-/* IFx arbitration */</div><div class='del'>-#define IF_ARB_MSGVAL		BIT(31)</div><div class='del'>-#define IF_ARB_MSGXTD		BIT(30)</div><div class='del'>-#define IF_ARB_TRANSMIT		BIT(29)</div><div class='del'>-</div><div class='del'>-/* IFx message control */</div><div class='del'>-#define IF_MCONT_NEWDAT		BIT(15)</div><div class='del'>-#define IF_MCONT_MSGLST		BIT(14)</div><div class='del'>-#define IF_MCONT_INTPND		BIT(13)</div><div class='del'>-#define IF_MCONT_UMASK		BIT(12)</div><div class='del'>-#define IF_MCONT_TXIE		BIT(11)</div><div class='del'>-#define IF_MCONT_RXIE		BIT(10)</div><div class='del'>-#define IF_MCONT_RMTEN		BIT(9)</div><div class='del'>-#define IF_MCONT_TXRQST		BIT(8)</div><div class='del'>-#define IF_MCONT_EOB		BIT(7)</div><div class='del'>-#define IF_MCONT_DLC_MASK	0xf</div><div class='del'>-</div><div class='del'>-#define IF_MCONT_RCV		(IF_MCONT_RXIE | IF_MCONT_UMASK)</div><div class='del'>-#define IF_MCONT_RCV_EOB	(IF_MCONT_RCV | IF_MCONT_EOB)</div><div class='del'>-</div><div class='del'>-#define IF_MCONT_TX		(IF_MCONT_TXIE | IF_MCONT_EOB)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Use IF1 for RX and IF2 for TX</div><div class='del'>- */</div><div class='del'>-#define IF_RX			0</div><div class='del'>-#define IF_TX			1</div><div class='del'>-</div><div class='del'>-/* minimum timeout for checking BUSY status */</div><div class='del'>-#define MIN_TIMEOUT_VALUE	6</div><div class='del'>-</div><div class='del'>-/* Wait for ~1 sec for INIT bit */</div><div class='del'>-#define INIT_WAIT_MS		1000</div><div class='del'>-</div><div class='del'>-/* napi related */</div><div class='del'>-#define C_CAN_NAPI_WEIGHT	C_CAN_MSG_OBJ_RX_NUM</div><div class='del'>-</div><div class='del'>-/* c_can lec values */</div><div class='del'>-enum c_can_lec_type {</div><div class='del'>-	LEC_NO_ERROR = 0,</div><div class='del'>-	LEC_STUFF_ERROR,</div><div class='del'>-	LEC_FORM_ERROR,</div><div class='del'>-	LEC_ACK_ERROR,</div><div class='del'>-	LEC_BIT1_ERROR,</div><div class='del'>-	LEC_BIT0_ERROR,</div><div class='del'>-	LEC_CRC_ERROR,</div><div class='del'>-	LEC_UNUSED,</div><div class='del'>-	LEC_MASK = LEC_UNUSED,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * c_can error types:</div><div class='del'>- * Bus errors (BUS_OFF, ERROR_WARNING, ERROR_PASSIVE) are supported</div><div class='del'>- */</div><div class='del'>-enum c_can_bus_error_types {</div><div class='del'>-	C_CAN_NO_ERROR = 0,</div><div class='del'>-	C_CAN_BUS_OFF,</div><div class='del'>-	C_CAN_ERROR_WARNING,</div><div class='del'>-	C_CAN_ERROR_PASSIVE,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct can_bittiming_const c_can_bittiming_const = {</div><div class='del'>-	.name = KBUILD_MODNAME,</div><div class='del'>-	.tseg1_min = 2,		/* Time segment 1 = prop_seg + phase_seg1 */</div><div class='del'>-	.tseg1_max = 16,</div><div class='del'>-	.tseg2_min = 1,		/* Time segment 2 = phase_seg2 */</div><div class='del'>-	.tseg2_max = 8,</div><div class='del'>-	.sjw_max = 4,</div><div class='del'>-	.brp_min = 1,</div><div class='del'>-	.brp_max = 1024,	/* 6-bit BRP field + 4-bit BRPE field*/</div><div class='del'>-	.brp_inc = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static inline void c_can_pm_runtime_enable(const struct c_can_priv *priv)</div><div class='del'>-{</div><div class='del'>-	if (priv-&gt;device)</div><div class='del'>-		pm_runtime_enable(priv-&gt;device);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void c_can_pm_runtime_disable(const struct c_can_priv *priv)</div><div class='del'>-{</div><div class='del'>-	if (priv-&gt;device)</div><div class='del'>-		pm_runtime_disable(priv-&gt;device);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void c_can_pm_runtime_get_sync(const struct c_can_priv *priv)</div><div class='del'>-{</div><div class='del'>-	if (priv-&gt;device)</div><div class='del'>-		pm_runtime_get_sync(priv-&gt;device);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void c_can_pm_runtime_put_sync(const struct c_can_priv *priv)</div><div class='del'>-{</div><div class='del'>-	if (priv-&gt;device)</div><div class='del'>-		pm_runtime_put_sync(priv-&gt;device);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void c_can_reset_ram(const struct c_can_priv *priv, bool enable)</div><div class='del'>-{</div><div class='del'>-	if (priv-&gt;raminit)</div><div class='del'>-		priv-&gt;raminit(priv, enable);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void c_can_irq_control(struct c_can_priv *priv, bool enable)</div><div class='del'>-{</div><div class='del'>-	u32 ctrl = priv-&gt;read_reg(priv,	C_CAN_CTRL_REG) &amp; ~CONTROL_IRQMSK;</div><div class='del'>-</div><div class='del'>-	if (enable)</div><div class='del'>-		ctrl |= CONTROL_IRQMSK;</div><div class='del'>-</div><div class='del'>-	priv-&gt;write_reg(priv, C_CAN_CTRL_REG, ctrl);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void c_can_obj_update(struct net_device *dev, int iface, u32 cmd, u32 obj)</div><div class='del'>-{</div><div class='del'>-	struct c_can_priv *priv = netdev_priv(dev);</div><div class='del'>-	int cnt, reg = C_CAN_IFACE(COMREQ_REG, iface);</div><div class='del'>-</div><div class='del'>-	priv-&gt;write_reg32(priv, reg, (cmd &lt;&lt; 16) | obj);</div><div class='del'>-</div><div class='del'>-	for (cnt = MIN_TIMEOUT_VALUE; cnt; cnt--) {</div><div class='del'>-		if (!(priv-&gt;read_reg(priv, reg) &amp; IF_COMR_BUSY))</div><div class='del'>-			return;</div><div class='del'>-		udelay(1);</div><div class='del'>-	}</div><div class='del'>-	netdev_err(dev, "Updating object timed out\n");</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void c_can_object_get(struct net_device *dev, int iface,</div><div class='del'>-				    u32 obj, u32 cmd)</div><div class='del'>-{</div><div class='del'>-	c_can_obj_update(dev, iface, cmd, obj);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void c_can_object_put(struct net_device *dev, int iface,</div><div class='del'>-				    u32 obj, u32 cmd)</div><div class='del'>-{</div><div class='del'>-	c_can_obj_update(dev, iface, cmd | IF_COMM_WR, obj);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Note: According to documentation clearing TXIE while MSGVAL is set</div><div class='del'>- * is not allowed, but works nicely on C/DCAN. And that lowers the I/O</div><div class='del'>- * load significantly.</div><div class='del'>- */</div><div class='del'>-static void c_can_inval_tx_object(struct net_device *dev, int iface, int obj)</div><div class='del'>-{</div><div class='del'>-	struct c_can_priv *priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	priv-&gt;write_reg(priv, C_CAN_IFACE(MSGCTRL_REG, iface), 0);</div><div class='del'>-	c_can_object_put(dev, iface, obj, IF_COMM_INVAL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void c_can_inval_msg_object(struct net_device *dev, int iface, int obj)</div><div class='del'>-{</div><div class='del'>-	struct c_can_priv *priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	priv-&gt;write_reg(priv, C_CAN_IFACE(ARB1_REG, iface), 0);</div><div class='del'>-	priv-&gt;write_reg(priv, C_CAN_IFACE(ARB2_REG, iface), 0);</div><div class='del'>-	c_can_inval_tx_object(dev, iface, obj);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void c_can_setup_tx_object(struct net_device *dev, int iface,</div><div class='del'>-				  struct can_frame *frame, int idx)</div><div class='del'>-{</div><div class='del'>-	struct c_can_priv *priv = netdev_priv(dev);</div><div class='del'>-	u16 ctrl = IF_MCONT_TX | frame-&gt;can_dlc;</div><div class='del'>-	bool rtr = frame-&gt;can_id &amp; CAN_RTR_FLAG;</div><div class='del'>-	u32 arb = IF_ARB_MSGVAL;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	if (frame-&gt;can_id &amp; CAN_EFF_FLAG) {</div><div class='del'>-		arb |= frame-&gt;can_id &amp; CAN_EFF_MASK;</div><div class='del'>-		arb |= IF_ARB_MSGXTD;</div><div class='del'>-	} else {</div><div class='del'>-		arb |= (frame-&gt;can_id &amp; CAN_SFF_MASK) &lt;&lt; 18;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!rtr)</div><div class='del'>-		arb |= IF_ARB_TRANSMIT;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If we change the DIR bit, we need to invalidate the buffer</div><div class='del'>-	 * first, i.e. clear the MSGVAL flag in the arbiter.</div><div class='del'>-	 */</div><div class='del'>-	if (rtr != (bool)test_bit(idx, &amp;priv-&gt;tx_dir)) {</div><div class='del'>-		u32 obj = idx + C_CAN_MSG_OBJ_TX_FIRST;</div><div class='del'>-</div><div class='del'>-		c_can_inval_msg_object(dev, iface, obj);</div><div class='del'>-		change_bit(idx, &amp;priv-&gt;tx_dir);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	priv-&gt;write_reg32(priv, C_CAN_IFACE(ARB1_REG, iface), arb);</div><div class='del'>-</div><div class='del'>-	priv-&gt;write_reg(priv, C_CAN_IFACE(MSGCTRL_REG, iface), ctrl);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; frame-&gt;can_dlc; i += 2) {</div><div class='del'>-		priv-&gt;write_reg(priv, C_CAN_IFACE(DATA1_REG, iface) + i / 2,</div><div class='del'>-				frame-&gt;data[i] | (frame-&gt;data[i + 1] &lt;&lt; 8));</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void c_can_activate_all_lower_rx_msg_obj(struct net_device *dev,</div><div class='del'>-						       int iface)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = C_CAN_MSG_OBJ_RX_FIRST; i &lt;= C_CAN_MSG_RX_LOW_LAST; i++)</div><div class='del'>-		c_can_object_get(dev, iface, i, IF_COMM_CLR_NEWDAT);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int c_can_handle_lost_msg_obj(struct net_device *dev,</div><div class='del'>-				     int iface, int objno, u32 ctrl)</div><div class='del'>-{</div><div class='del'>-	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='del'>-	struct c_can_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct can_frame *frame;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-</div><div class='del'>-	ctrl &amp;= ~(IF_MCONT_MSGLST | IF_MCONT_INTPND | IF_MCONT_NEWDAT);</div><div class='del'>-	priv-&gt;write_reg(priv, C_CAN_IFACE(MSGCTRL_REG, iface), ctrl);</div><div class='del'>-	c_can_object_put(dev, iface, objno, IF_COMM_CONTROL);</div><div class='del'>-</div><div class='del'>-	stats-&gt;rx_errors++;</div><div class='del'>-	stats-&gt;rx_over_errors++;</div><div class='del'>-</div><div class='del'>-	/* create an error msg */</div><div class='del'>-	skb = alloc_can_err_skb(dev, &amp;frame);</div><div class='del'>-	if (unlikely(!skb))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	frame-&gt;can_id |= CAN_ERR_CRTL;</div><div class='del'>-	frame-&gt;data[1] = CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='del'>-</div><div class='del'>-	netif_receive_skb(skb);</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int c_can_read_msg_object(struct net_device *dev, int iface, u32 ctrl)</div><div class='del'>-{</div><div class='del'>-	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='del'>-	struct c_can_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct can_frame *frame;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	u32 arb, data;</div><div class='del'>-</div><div class='del'>-	skb = alloc_can_skb(dev, &amp;frame);</div><div class='del'>-	if (!skb) {</div><div class='del'>-		stats-&gt;rx_dropped++;</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	frame-&gt;can_dlc = get_can_dlc(ctrl &amp; 0x0F);</div><div class='del'>-</div><div class='del'>-	arb = priv-&gt;read_reg32(priv, C_CAN_IFACE(ARB1_REG, iface));</div><div class='del'>-</div><div class='del'>-	if (arb &amp; IF_ARB_MSGXTD)</div><div class='del'>-		frame-&gt;can_id = (arb &amp; CAN_EFF_MASK) | CAN_EFF_FLAG;</div><div class='del'>-	else</div><div class='del'>-		frame-&gt;can_id = (arb &gt;&gt; 18) &amp; CAN_SFF_MASK;</div><div class='del'>-</div><div class='del'>-	if (arb &amp; IF_ARB_TRANSMIT) {</div><div class='del'>-		frame-&gt;can_id |= CAN_RTR_FLAG;</div><div class='del'>-	} else {</div><div class='del'>-		int i, dreg = C_CAN_IFACE(DATA1_REG, iface);</div><div class='del'>-</div><div class='del'>-		for (i = 0; i &lt; frame-&gt;can_dlc; i += 2, dreg ++) {</div><div class='del'>-			data = priv-&gt;read_reg(priv, dreg);</div><div class='del'>-			frame-&gt;data[i] = data;</div><div class='del'>-			frame-&gt;data[i + 1] = data &gt;&gt; 8;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	stats-&gt;rx_packets++;</div><div class='del'>-	stats-&gt;rx_bytes += frame-&gt;can_dlc;</div><div class='del'>-</div><div class='del'>-	netif_receive_skb(skb);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void c_can_setup_receive_object(struct net_device *dev, int iface,</div><div class='del'>-				       u32 obj, u32 mask, u32 id, u32 mcont)</div><div class='del'>-{</div><div class='del'>-	struct c_can_priv *priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	mask |= BIT(29);</div><div class='del'>-	priv-&gt;write_reg32(priv, C_CAN_IFACE(MASK1_REG, iface), mask);</div><div class='del'>-</div><div class='del'>-	id |= IF_ARB_MSGVAL;</div><div class='del'>-	priv-&gt;write_reg32(priv, C_CAN_IFACE(ARB1_REG, iface), id);</div><div class='del'>-</div><div class='del'>-	priv-&gt;write_reg(priv, C_CAN_IFACE(MSGCTRL_REG, iface), mcont);</div><div class='del'>-	c_can_object_put(dev, iface, obj, IF_COMM_RCV_SETUP);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static netdev_tx_t c_can_start_xmit(struct sk_buff *skb,</div><div class='del'>-				    struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct can_frame *frame = (struct can_frame *)skb-&gt;data;</div><div class='del'>-	struct c_can_priv *priv = netdev_priv(dev);</div><div class='del'>-	u32 idx, obj;</div><div class='del'>-</div><div class='del'>-	if (can_dropped_invalid_skb(dev, skb))</div><div class='del'>-		return NETDEV_TX_OK;</div><div class='del'>-	/*</div><div class='del'>-	 * This is not a FIFO. C/D_CAN sends out the buffers</div><div class='del'>-	 * prioritized. The lowest buffer number wins.</div><div class='del'>-	 */</div><div class='del'>-	idx = fls(atomic_read(&amp;priv-&gt;tx_active));</div><div class='del'>-	obj = idx + C_CAN_MSG_OBJ_TX_FIRST;</div><div class='del'>-</div><div class='del'>-	/* If this is the last buffer, stop the xmit queue */</div><div class='del'>-	if (idx == C_CAN_MSG_OBJ_TX_NUM - 1)</div><div class='del'>-		netif_stop_queue(dev);</div><div class='del'>-	/*</div><div class='del'>-	 * Store the message in the interface so we can call</div><div class='del'>-	 * can_put_echo_skb(). We must do this before we enable</div><div class='del'>-	 * transmit as we might race against do_tx().</div><div class='del'>-	 */</div><div class='del'>-	c_can_setup_tx_object(dev, IF_TX, frame, idx);</div><div class='del'>-	priv-&gt;dlc[idx] = frame-&gt;can_dlc;</div><div class='del'>-	can_put_echo_skb(skb, dev, idx);</div><div class='del'>-</div><div class='del'>-	/* Update the active bits */</div><div class='del'>-	atomic_add((1 &lt;&lt; idx), &amp;priv-&gt;tx_active);</div><div class='del'>-	/* Start transmission */</div><div class='del'>-	c_can_object_put(dev, IF_TX, obj, IF_COMM_TX);</div><div class='del'>-</div><div class='del'>-	return NETDEV_TX_OK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int c_can_wait_for_ctrl_init(struct net_device *dev,</div><div class='del'>-				    struct c_can_priv *priv, u32 init)</div><div class='del'>-{</div><div class='del'>-	int retry = 0;</div><div class='del'>-</div><div class='del'>-	while (init != (priv-&gt;read_reg(priv, C_CAN_CTRL_REG) &amp; CONTROL_INIT)) {</div><div class='del'>-		udelay(10);</div><div class='del'>-		if (retry++ &gt; 1000) {</div><div class='del'>-			netdev_err(dev, "CCTRL: set CONTROL_INIT failed\n");</div><div class='del'>-			return -EIO;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int c_can_set_bittiming(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	unsigned int reg_btr, reg_brpe, ctrl_save;</div><div class='del'>-	u8 brp, brpe, sjw, tseg1, tseg2;</div><div class='del'>-	u32 ten_bit_brp;</div><div class='del'>-	struct c_can_priv *priv = netdev_priv(dev);</div><div class='del'>-	const struct can_bittiming *bt = &amp;priv-&gt;can.bittiming;</div><div class='del'>-	int res;</div><div class='del'>-</div><div class='del'>-	/* c_can provides a 6-bit brp and 4-bit brpe fields */</div><div class='del'>-	ten_bit_brp = bt-&gt;brp - 1;</div><div class='del'>-	brp = ten_bit_brp &amp; BTR_BRP_MASK;</div><div class='del'>-	brpe = ten_bit_brp &gt;&gt; 6;</div><div class='del'>-</div><div class='del'>-	sjw = bt-&gt;sjw - 1;</div><div class='del'>-	tseg1 = bt-&gt;prop_seg + bt-&gt;phase_seg1 - 1;</div><div class='del'>-	tseg2 = bt-&gt;phase_seg2 - 1;</div><div class='del'>-	reg_btr = brp | (sjw &lt;&lt; BTR_SJW_SHIFT) | (tseg1 &lt;&lt; BTR_TSEG1_SHIFT) |</div><div class='del'>-			(tseg2 &lt;&lt; BTR_TSEG2_SHIFT);</div><div class='del'>-	reg_brpe = brpe &amp; BRP_EXT_BRPE_MASK;</div><div class='del'>-</div><div class='del'>-	netdev_info(dev,</div><div class='del'>-		"setting BTR=%04x BRPE=%04x\n", reg_btr, reg_brpe);</div><div class='del'>-</div><div class='del'>-	ctrl_save = priv-&gt;read_reg(priv, C_CAN_CTRL_REG);</div><div class='del'>-	ctrl_save &amp;= ~CONTROL_INIT;</div><div class='del'>-	priv-&gt;write_reg(priv, C_CAN_CTRL_REG, CONTROL_CCE | CONTROL_INIT);</div><div class='del'>-	res = c_can_wait_for_ctrl_init(dev, priv, CONTROL_INIT);</div><div class='del'>-	if (res)</div><div class='del'>-		return res;</div><div class='del'>-</div><div class='del'>-	priv-&gt;write_reg(priv, C_CAN_BTR_REG, reg_btr);</div><div class='del'>-	priv-&gt;write_reg(priv, C_CAN_BRPEXT_REG, reg_brpe);</div><div class='del'>-	priv-&gt;write_reg(priv, C_CAN_CTRL_REG, ctrl_save);</div><div class='del'>-</div><div class='del'>-	return c_can_wait_for_ctrl_init(dev, priv, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Configure C_CAN message objects for Tx and Rx purposes:</div><div class='del'>- * C_CAN provides a total of 32 message objects that can be configured</div><div class='del'>- * either for Tx or Rx purposes. Here the first 16 message objects are used as</div><div class='del'>- * a reception FIFO. The end of reception FIFO is signified by the EoB bit</div><div class='del'>- * being SET. The remaining 16 message objects are kept aside for Tx purposes.</div><div class='del'>- * See user guide document for further details on configuring message</div><div class='del'>- * objects.</div><div class='del'>- */</div><div class='del'>-static void c_can_configure_msg_objects(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* first invalidate all message objects */</div><div class='del'>-	for (i = C_CAN_MSG_OBJ_RX_FIRST; i &lt;= C_CAN_NO_OF_OBJECTS; i++)</div><div class='del'>-		c_can_inval_msg_object(dev, IF_RX, i);</div><div class='del'>-</div><div class='del'>-	/* setup receive message objects */</div><div class='del'>-	for (i = C_CAN_MSG_OBJ_RX_FIRST; i &lt; C_CAN_MSG_OBJ_RX_LAST; i++)</div><div class='del'>-		c_can_setup_receive_object(dev, IF_RX, i, 0, 0, IF_MCONT_RCV);</div><div class='del'>-</div><div class='del'>-	c_can_setup_receive_object(dev, IF_RX, C_CAN_MSG_OBJ_RX_LAST, 0, 0,</div><div class='del'>-				   IF_MCONT_RCV_EOB);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Configure C_CAN chip:</div><div class='del'>- * - enable/disable auto-retransmission</div><div class='del'>- * - set operating mode</div><div class='del'>- * - configure message objects</div><div class='del'>- */</div><div class='del'>-static int c_can_chip_config(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct c_can_priv *priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	/* enable automatic retransmission */</div><div class='del'>-	priv-&gt;write_reg(priv, C_CAN_CTRL_REG, CONTROL_ENABLE_AR);</div><div class='del'>-</div><div class='del'>-	if ((priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LISTENONLY) &amp;&amp;</div><div class='del'>-	    (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LOOPBACK)) {</div><div class='del'>-		/* loopback + silent mode : useful for hot self-test */</div><div class='del'>-		priv-&gt;write_reg(priv, C_CAN_CTRL_REG, CONTROL_TEST);</div><div class='del'>-		priv-&gt;write_reg(priv, C_CAN_TEST_REG, TEST_LBACK | TEST_SILENT);</div><div class='del'>-	} else if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LOOPBACK) {</div><div class='del'>-		/* loopback mode : useful for self-test function */</div><div class='del'>-		priv-&gt;write_reg(priv, C_CAN_CTRL_REG, CONTROL_TEST);</div><div class='del'>-		priv-&gt;write_reg(priv, C_CAN_TEST_REG, TEST_LBACK);</div><div class='del'>-	} else if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LISTENONLY) {</div><div class='del'>-		/* silent mode : bus-monitoring mode */</div><div class='del'>-		priv-&gt;write_reg(priv, C_CAN_CTRL_REG, CONTROL_TEST);</div><div class='del'>-		priv-&gt;write_reg(priv, C_CAN_TEST_REG, TEST_SILENT);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* configure message objects */</div><div class='del'>-	c_can_configure_msg_objects(dev);</div><div class='del'>-</div><div class='del'>-	/* set a `lec` value so that we can check for updates later */</div><div class='del'>-	priv-&gt;write_reg(priv, C_CAN_STS_REG, LEC_UNUSED);</div><div class='del'>-</div><div class='del'>-	/* Clear all internal status */</div><div class='del'>-	atomic_set(&amp;priv-&gt;tx_active, 0);</div><div class='del'>-	priv-&gt;rxmasked = 0;</div><div class='del'>-	priv-&gt;tx_dir = 0;</div><div class='del'>-</div><div class='del'>-	/* set bittiming params */</div><div class='del'>-	return c_can_set_bittiming(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int c_can_start(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct c_can_priv *priv = netdev_priv(dev);</div><div class='del'>-	int err;</div><div class='del'>-	struct pinctrl *p;</div><div class='del'>-</div><div class='del'>-	/* basic c_can configuration */</div><div class='del'>-	err = c_can_chip_config(dev);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	/* Setup the command for new messages */</div><div class='del'>-	priv-&gt;comm_rcv_high = priv-&gt;type != BOSCH_D_CAN ?</div><div class='del'>-		IF_COMM_RCV_LOW : IF_COMM_RCV_HIGH;</div><div class='del'>-</div><div class='del'>-	priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='del'>-</div><div class='del'>-	/* Attempt to use "active" if available else use "default" */</div><div class='del'>-	p = pinctrl_get_select(priv-&gt;device, "active");</div><div class='del'>-	if (!IS_ERR(p))</div><div class='del'>-		pinctrl_put(p);</div><div class='del'>-	else</div><div class='del'>-		pinctrl_pm_select_default_state(priv-&gt;device);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void c_can_stop(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct c_can_priv *priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	c_can_irq_control(priv, false);</div><div class='del'>-</div><div class='del'>-	/* put ctrl to init on stop to end ongoing transmission */</div><div class='del'>-	priv-&gt;write_reg(priv, C_CAN_CTRL_REG, CONTROL_INIT);</div><div class='del'>-</div><div class='del'>-	/* deactivate pins */</div><div class='del'>-	pinctrl_pm_select_sleep_state(dev-&gt;dev.parent);</div><div class='del'>-	priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int c_can_set_mode(struct net_device *dev, enum can_mode mode)</div><div class='del'>-{</div><div class='del'>-	struct c_can_priv *priv = netdev_priv(dev);</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	switch (mode) {</div><div class='del'>-	case CAN_MODE_START:</div><div class='del'>-		err = c_can_start(dev);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-		netif_wake_queue(dev);</div><div class='del'>-		c_can_irq_control(priv, true);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __c_can_get_berr_counter(const struct net_device *dev,</div><div class='del'>-				    struct can_berr_counter *bec)</div><div class='del'>-{</div><div class='del'>-	unsigned int reg_err_counter;</div><div class='del'>-	struct c_can_priv *priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	reg_err_counter = priv-&gt;read_reg(priv, C_CAN_ERR_CNT_REG);</div><div class='del'>-	bec-&gt;rxerr = (reg_err_counter &amp; ERR_CNT_REC_MASK) &gt;&gt;</div><div class='del'>-				ERR_CNT_REC_SHIFT;</div><div class='del'>-	bec-&gt;txerr = reg_err_counter &amp; ERR_CNT_TEC_MASK;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int c_can_get_berr_counter(const struct net_device *dev,</div><div class='del'>-				  struct can_berr_counter *bec)</div><div class='del'>-{</div><div class='del'>-	struct c_can_priv *priv = netdev_priv(dev);</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	c_can_pm_runtime_get_sync(priv);</div><div class='del'>-	err = __c_can_get_berr_counter(dev, bec);</div><div class='del'>-	c_can_pm_runtime_put_sync(priv);</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void c_can_do_tx(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct c_can_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='del'>-	u32 idx, obj, pkts = 0, bytes = 0, pend, clr;</div><div class='del'>-</div><div class='del'>-	clr = pend = priv-&gt;read_reg(priv, C_CAN_INTPND2_REG);</div><div class='del'>-</div><div class='del'>-	while ((idx = ffs(pend))) {</div><div class='del'>-		idx--;</div><div class='del'>-		pend &amp;= ~(1 &lt;&lt; idx);</div><div class='del'>-		obj = idx + C_CAN_MSG_OBJ_TX_FIRST;</div><div class='del'>-		c_can_inval_tx_object(dev, IF_RX, obj);</div><div class='del'>-		can_get_echo_skb(dev, idx);</div><div class='del'>-		bytes += priv-&gt;dlc[idx];</div><div class='del'>-		pkts++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Clear the bits in the tx_active mask */</div><div class='del'>-	atomic_sub(clr, &amp;priv-&gt;tx_active);</div><div class='del'>-</div><div class='del'>-	if (clr &amp; (1 &lt;&lt; (C_CAN_MSG_OBJ_TX_NUM - 1)))</div><div class='del'>-		netif_wake_queue(dev);</div><div class='del'>-</div><div class='del'>-	if (pkts) {</div><div class='del'>-		stats-&gt;tx_bytes += bytes;</div><div class='del'>-		stats-&gt;tx_packets += pkts;</div><div class='del'>-		can_led_event(dev, CAN_LED_EVENT_TX);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * If we have a gap in the pending bits, that means we either</div><div class='del'>- * raced with the hardware or failed to readout all upper</div><div class='del'>- * objects in the last run due to quota limit.</div><div class='del'>- */</div><div class='del'>-static u32 c_can_adjust_pending(u32 pend)</div><div class='del'>-{</div><div class='del'>-	u32 weight, lasts;</div><div class='del'>-</div><div class='del'>-	if (pend == RECEIVE_OBJECT_BITS)</div><div class='del'>-		return pend;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If the last set bit is larger than the number of pending</div><div class='del'>-	 * bits we have a gap.</div><div class='del'>-	 */</div><div class='del'>-	weight = hweight32(pend);</div><div class='del'>-	lasts = fls(pend);</div><div class='del'>-</div><div class='del'>-	/* If the bits are linear, nothing to do */</div><div class='del'>-	if (lasts == weight)</div><div class='del'>-		return pend;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Find the first set bit after the gap. We walk backwards</div><div class='del'>-	 * from the last set bit.</div><div class='del'>-	 */</div><div class='del'>-	for (lasts--; pend &amp; (1 &lt;&lt; (lasts - 1)); lasts--);</div><div class='del'>-</div><div class='del'>-	return pend &amp; ~((1 &lt;&lt; lasts) - 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void c_can_rx_object_get(struct net_device *dev,</div><div class='del'>-				       struct c_can_priv *priv, u32 obj)</div><div class='del'>-{</div><div class='del'>-		c_can_object_get(dev, IF_RX, obj, priv-&gt;comm_rcv_high);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void c_can_rx_finalize(struct net_device *dev,</div><div class='del'>-				     struct c_can_priv *priv, u32 obj)</div><div class='del'>-{</div><div class='del'>-	if (priv-&gt;type != BOSCH_D_CAN)</div><div class='del'>-		c_can_object_get(dev, IF_RX, obj, IF_COMM_CLR_NEWDAT);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int c_can_read_objects(struct net_device *dev, struct c_can_priv *priv,</div><div class='del'>-			      u32 pend, int quota)</div><div class='del'>-{</div><div class='del'>-	u32 pkts = 0, ctrl, obj;</div><div class='del'>-</div><div class='del'>-	while ((obj = ffs(pend)) &amp;&amp; quota &gt; 0) {</div><div class='del'>-		pend &amp;= ~BIT(obj - 1);</div><div class='del'>-</div><div class='del'>-		c_can_rx_object_get(dev, priv, obj);</div><div class='del'>-		ctrl = priv-&gt;read_reg(priv, C_CAN_IFACE(MSGCTRL_REG, IF_RX));</div><div class='del'>-</div><div class='del'>-		if (ctrl &amp; IF_MCONT_MSGLST) {</div><div class='del'>-			int n = c_can_handle_lost_msg_obj(dev, IF_RX, obj, ctrl);</div><div class='del'>-</div><div class='del'>-			pkts += n;</div><div class='del'>-			quota -= n;</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * This really should not happen, but this covers some</div><div class='del'>-		 * odd HW behaviour. Do not remove that unless you</div><div class='del'>-		 * want to brick your machine.</div><div class='del'>-		 */</div><div class='del'>-		if (!(ctrl &amp; IF_MCONT_NEWDAT))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		/* read the data from the message object */</div><div class='del'>-		c_can_read_msg_object(dev, IF_RX, ctrl);</div><div class='del'>-</div><div class='del'>-		c_can_rx_finalize(dev, priv, obj);</div><div class='del'>-</div><div class='del'>-		pkts++;</div><div class='del'>-		quota--;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return pkts;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline u32 c_can_get_pending(struct c_can_priv *priv)</div><div class='del'>-{</div><div class='del'>-	u32 pend = priv-&gt;read_reg(priv, C_CAN_NEWDAT1_REG);</div><div class='del'>-</div><div class='del'>-	return pend;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * theory of operation:</div><div class='del'>- *</div><div class='del'>- * c_can core saves a received CAN message into the first free message</div><div class='del'>- * object it finds free (starting with the lowest). Bits NEWDAT and</div><div class='del'>- * INTPND are set for this message object indicating that a new message</div><div class='del'>- * has arrived. To work-around this issue, we keep two groups of message</div><div class='del'>- * objects whose partitioning is defined by C_CAN_MSG_OBJ_RX_SPLIT.</div><div class='del'>- *</div><div class='del'>- * We clear the newdat bit right away.</div><div class='del'>- *</div><div class='del'>- * This can result in packet reordering when the readout is slow.</div><div class='del'>- */</div><div class='del'>-static int c_can_do_rx_poll(struct net_device *dev, int quota)</div><div class='del'>-{</div><div class='del'>-	struct c_can_priv *priv = netdev_priv(dev);</div><div class='del'>-	u32 pkts = 0, pend = 0, toread, n;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * It is faster to read only one 16bit register. This is only possible</div><div class='del'>-	 * for a maximum number of 16 objects.</div><div class='del'>-	 */</div><div class='del'>-	BUILD_BUG_ON_MSG(C_CAN_MSG_OBJ_RX_LAST &gt; 16,</div><div class='del'>-			"Implementation does not support more message objects than 16");</div><div class='del'>-</div><div class='del'>-	while (quota &gt; 0) {</div><div class='del'>-		if (!pend) {</div><div class='del'>-			pend = c_can_get_pending(priv);</div><div class='del'>-			if (!pend)</div><div class='del'>-				break;</div><div class='del'>-			/*</div><div class='del'>-			 * If the pending field has a gap, handle the</div><div class='del'>-			 * bits above the gap first.</div><div class='del'>-			 */</div><div class='del'>-			toread = c_can_adjust_pending(pend);</div><div class='del'>-		} else {</div><div class='del'>-			toread = pend;</div><div class='del'>-		}</div><div class='del'>-		/* Remove the bits from pend */</div><div class='del'>-		pend &amp;= ~toread;</div><div class='del'>-		/* Read the objects */</div><div class='del'>-		n = c_can_read_objects(dev, priv, toread, quota);</div><div class='del'>-		pkts += n;</div><div class='del'>-		quota -= n;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (pkts)</div><div class='del'>-		can_led_event(dev, CAN_LED_EVENT_RX);</div><div class='del'>-</div><div class='del'>-	return pkts;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int c_can_handle_state_change(struct net_device *dev,</div><div class='del'>-				enum c_can_bus_error_types error_type)</div><div class='del'>-{</div><div class='del'>-	unsigned int reg_err_counter;</div><div class='del'>-	unsigned int rx_err_passive;</div><div class='del'>-	struct c_can_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='del'>-	struct can_frame *cf;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	struct can_berr_counter bec;</div><div class='del'>-</div><div class='del'>-	switch (error_type) {</div><div class='del'>-	case C_CAN_ERROR_WARNING:</div><div class='del'>-		/* error warning state */</div><div class='del'>-		priv-&gt;can.can_stats.error_warning++;</div><div class='del'>-		priv-&gt;can.state = CAN_STATE_ERROR_WARNING;</div><div class='del'>-		break;</div><div class='del'>-	case C_CAN_ERROR_PASSIVE:</div><div class='del'>-		/* error passive state */</div><div class='del'>-		priv-&gt;can.can_stats.error_passive++;</div><div class='del'>-		priv-&gt;can.state = CAN_STATE_ERROR_PASSIVE;</div><div class='del'>-		break;</div><div class='del'>-	case C_CAN_BUS_OFF:</div><div class='del'>-		/* bus-off state */</div><div class='del'>-		priv-&gt;can.state = CAN_STATE_BUS_OFF;</div><div class='del'>-		priv-&gt;can.can_stats.bus_off++;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* propagate the error condition to the CAN stack */</div><div class='del'>-	skb = alloc_can_err_skb(dev, &amp;cf);</div><div class='del'>-	if (unlikely(!skb))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	__c_can_get_berr_counter(dev, &amp;bec);</div><div class='del'>-	reg_err_counter = priv-&gt;read_reg(priv, C_CAN_ERR_CNT_REG);</div><div class='del'>-	rx_err_passive = (reg_err_counter &amp; ERR_CNT_RP_MASK) &gt;&gt;</div><div class='del'>-				ERR_CNT_RP_SHIFT;</div><div class='del'>-</div><div class='del'>-	switch (error_type) {</div><div class='del'>-	case C_CAN_ERROR_WARNING:</div><div class='del'>-		/* error warning state */</div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='del'>-		cf-&gt;data[1] = (bec.txerr &gt; bec.rxerr) ?</div><div class='del'>-			CAN_ERR_CRTL_TX_WARNING :</div><div class='del'>-			CAN_ERR_CRTL_RX_WARNING;</div><div class='del'>-		cf-&gt;data[6] = bec.txerr;</div><div class='del'>-		cf-&gt;data[7] = bec.rxerr;</div><div class='del'>-</div><div class='del'>-		break;</div><div class='del'>-	case C_CAN_ERROR_PASSIVE:</div><div class='del'>-		/* error passive state */</div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='del'>-		if (rx_err_passive)</div><div class='del'>-			cf-&gt;data[1] |= CAN_ERR_CRTL_RX_PASSIVE;</div><div class='del'>-		if (bec.txerr &gt; 127)</div><div class='del'>-			cf-&gt;data[1] |= CAN_ERR_CRTL_TX_PASSIVE;</div><div class='del'>-</div><div class='del'>-		cf-&gt;data[6] = bec.txerr;</div><div class='del'>-		cf-&gt;data[7] = bec.rxerr;</div><div class='del'>-		break;</div><div class='del'>-	case C_CAN_BUS_OFF:</div><div class='del'>-		/* bus-off state */</div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_BUSOFF;</div><div class='del'>-		can_bus_off(dev);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	stats-&gt;rx_packets++;</div><div class='del'>-	stats-&gt;rx_bytes += cf-&gt;can_dlc;</div><div class='del'>-	netif_receive_skb(skb);</div><div class='del'>-</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int c_can_handle_bus_err(struct net_device *dev,</div><div class='del'>-				enum c_can_lec_type lec_type)</div><div class='del'>-{</div><div class='del'>-	struct c_can_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='del'>-	struct can_frame *cf;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * early exit if no lec update or no error.</div><div class='del'>-	 * no lec update means that no CAN bus event has been detected</div><div class='del'>-	 * since CPU wrote 0x7 value to status reg.</div><div class='del'>-	 */</div><div class='del'>-	if (lec_type == LEC_UNUSED || lec_type == LEC_NO_ERROR)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	if (!(priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	/* common for all type of bus errors */</div><div class='del'>-	priv-&gt;can.can_stats.bus_error++;</div><div class='del'>-	stats-&gt;rx_errors++;</div><div class='del'>-</div><div class='del'>-	/* propagate the error condition to the CAN stack */</div><div class='del'>-	skb = alloc_can_err_skb(dev, &amp;cf);</div><div class='del'>-	if (unlikely(!skb))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * check for 'last error code' which tells us the</div><div class='del'>-	 * type of the last error to occur on the CAN bus</div><div class='del'>-	 */</div><div class='del'>-	cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='del'>-	cf-&gt;data[2] |= CAN_ERR_PROT_UNSPEC;</div><div class='del'>-</div><div class='del'>-	switch (lec_type) {</div><div class='del'>-	case LEC_STUFF_ERROR:</div><div class='del'>-		netdev_dbg(dev, "stuff error\n");</div><div class='del'>-		cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='del'>-		break;</div><div class='del'>-	case LEC_FORM_ERROR:</div><div class='del'>-		netdev_dbg(dev, "form error\n");</div><div class='del'>-		cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='del'>-		break;</div><div class='del'>-	case LEC_ACK_ERROR:</div><div class='del'>-		netdev_dbg(dev, "ack error\n");</div><div class='del'>-		cf-&gt;data[3] |= (CAN_ERR_PROT_LOC_ACK |</div><div class='del'>-				CAN_ERR_PROT_LOC_ACK_DEL);</div><div class='del'>-		break;</div><div class='del'>-	case LEC_BIT1_ERROR:</div><div class='del'>-		netdev_dbg(dev, "bit1 error\n");</div><div class='del'>-		cf-&gt;data[2] |= CAN_ERR_PROT_BIT1;</div><div class='del'>-		break;</div><div class='del'>-	case LEC_BIT0_ERROR:</div><div class='del'>-		netdev_dbg(dev, "bit0 error\n");</div><div class='del'>-		cf-&gt;data[2] |= CAN_ERR_PROT_BIT0;</div><div class='del'>-		break;</div><div class='del'>-	case LEC_CRC_ERROR:</div><div class='del'>-		netdev_dbg(dev, "CRC error\n");</div><div class='del'>-		cf-&gt;data[3] |= (CAN_ERR_PROT_LOC_CRC_SEQ |</div><div class='del'>-				CAN_ERR_PROT_LOC_CRC_DEL);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	stats-&gt;rx_packets++;</div><div class='del'>-	stats-&gt;rx_bytes += cf-&gt;can_dlc;</div><div class='del'>-	netif_receive_skb(skb);</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int c_can_poll(struct napi_struct *napi, int quota)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = napi-&gt;dev;</div><div class='del'>-	struct c_can_priv *priv = netdev_priv(dev);</div><div class='del'>-	u16 curr, last = priv-&gt;last_status;</div><div class='del'>-	int work_done = 0;</div><div class='del'>-</div><div class='del'>-	priv-&gt;last_status = curr = priv-&gt;read_reg(priv, C_CAN_STS_REG);</div><div class='del'>-	/* Ack status on C_CAN. D_CAN is self clearing */</div><div class='del'>-	if (priv-&gt;type != BOSCH_D_CAN)</div><div class='del'>-		priv-&gt;write_reg(priv, C_CAN_STS_REG, LEC_UNUSED);</div><div class='del'>-</div><div class='del'>-	/* handle state changes */</div><div class='del'>-	if ((curr &amp; STATUS_EWARN) &amp;&amp; (!(last &amp; STATUS_EWARN))) {</div><div class='del'>-		netdev_dbg(dev, "entered error warning state\n");</div><div class='del'>-		work_done += c_can_handle_state_change(dev, C_CAN_ERROR_WARNING);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if ((curr &amp; STATUS_EPASS) &amp;&amp; (!(last &amp; STATUS_EPASS))) {</div><div class='del'>-		netdev_dbg(dev, "entered error passive state\n");</div><div class='del'>-		work_done += c_can_handle_state_change(dev, C_CAN_ERROR_PASSIVE);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if ((curr &amp; STATUS_BOFF) &amp;&amp; (!(last &amp; STATUS_BOFF))) {</div><div class='del'>-		netdev_dbg(dev, "entered bus off state\n");</div><div class='del'>-		work_done += c_can_handle_state_change(dev, C_CAN_BUS_OFF);</div><div class='del'>-		goto end;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* handle bus recovery events */</div><div class='del'>-	if ((!(curr &amp; STATUS_BOFF)) &amp;&amp; (last &amp; STATUS_BOFF)) {</div><div class='del'>-		netdev_dbg(dev, "left bus off state\n");</div><div class='del'>-		priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='del'>-	}</div><div class='del'>-	if ((!(curr &amp; STATUS_EPASS)) &amp;&amp; (last &amp; STATUS_EPASS)) {</div><div class='del'>-		netdev_dbg(dev, "left error passive state\n");</div><div class='del'>-		priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* handle lec errors on the bus */</div><div class='del'>-	work_done += c_can_handle_bus_err(dev, curr &amp; LEC_MASK);</div><div class='del'>-</div><div class='del'>-	/* Handle Tx/Rx events. We do this unconditionally */</div><div class='del'>-	work_done += c_can_do_rx_poll(dev, (quota - work_done));</div><div class='del'>-	c_can_do_tx(dev);</div><div class='del'>-</div><div class='del'>-end:</div><div class='del'>-	if (work_done &lt; quota) {</div><div class='del'>-		napi_complete(napi);</div><div class='del'>-		/* enable all IRQs if we are not in bus off state */</div><div class='del'>-		if (priv-&gt;can.state != CAN_STATE_BUS_OFF)</div><div class='del'>-			c_can_irq_control(priv, true);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return work_done;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static irqreturn_t c_can_isr(int irq, void *dev_id)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = (struct net_device *)dev_id;</div><div class='del'>-	struct c_can_priv *priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	if (!priv-&gt;read_reg(priv, C_CAN_INT_REG))</div><div class='del'>-		return IRQ_NONE;</div><div class='del'>-</div><div class='del'>-	/* disable all interrupts and schedule the NAPI */</div><div class='del'>-	c_can_irq_control(priv, false);</div><div class='del'>-	napi_schedule(&amp;priv-&gt;napi);</div><div class='del'>-</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int c_can_open(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-	struct c_can_priv *priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	c_can_pm_runtime_get_sync(priv);</div><div class='del'>-	c_can_reset_ram(priv, true);</div><div class='del'>-</div><div class='del'>-	/* open the can device */</div><div class='del'>-	err = open_candev(dev);</div><div class='del'>-	if (err) {</div><div class='del'>-		netdev_err(dev, "failed to open can device\n");</div><div class='del'>-		goto exit_open_fail;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* register interrupt handler */</div><div class='del'>-	err = request_irq(dev-&gt;irq, &amp;c_can_isr, IRQF_SHARED, dev-&gt;name,</div><div class='del'>-				dev);</div><div class='del'>-	if (err &lt; 0) {</div><div class='del'>-		netdev_err(dev, "failed to request interrupt\n");</div><div class='del'>-		goto exit_irq_fail;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* start the c_can controller */</div><div class='del'>-	err = c_can_start(dev);</div><div class='del'>-	if (err)</div><div class='del'>-		goto exit_start_fail;</div><div class='del'>-</div><div class='del'>-	can_led_event(dev, CAN_LED_EVENT_OPEN);</div><div class='del'>-</div><div class='del'>-	napi_enable(&amp;priv-&gt;napi);</div><div class='del'>-	/* enable status change, error and module interrupts */</div><div class='del'>-	c_can_irq_control(priv, true);</div><div class='del'>-	netif_start_queue(dev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-exit_start_fail:</div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='del'>-exit_irq_fail:</div><div class='del'>-	close_candev(dev);</div><div class='del'>-exit_open_fail:</div><div class='del'>-	c_can_reset_ram(priv, false);</div><div class='del'>-	c_can_pm_runtime_put_sync(priv);</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int c_can_close(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct c_can_priv *priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	netif_stop_queue(dev);</div><div class='del'>-	napi_disable(&amp;priv-&gt;napi);</div><div class='del'>-	c_can_stop(dev);</div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='del'>-	close_candev(dev);</div><div class='del'>-</div><div class='del'>-	c_can_reset_ram(priv, false);</div><div class='del'>-	c_can_pm_runtime_put_sync(priv);</div><div class='del'>-</div><div class='del'>-	can_led_event(dev, CAN_LED_EVENT_STOP);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct net_device *alloc_c_can_dev(void)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev;</div><div class='del'>-	struct c_can_priv *priv;</div><div class='del'>-</div><div class='del'>-	dev = alloc_candev(sizeof(struct c_can_priv), C_CAN_MSG_OBJ_TX_NUM);</div><div class='del'>-	if (!dev)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	priv = netdev_priv(dev);</div><div class='del'>-	netif_napi_add(dev, &amp;priv-&gt;napi, c_can_poll, C_CAN_NAPI_WEIGHT);</div><div class='del'>-</div><div class='del'>-	priv-&gt;dev = dev;</div><div class='del'>-	priv-&gt;can.bittiming_const = &amp;c_can_bittiming_const;</div><div class='del'>-	priv-&gt;can.do_set_mode = c_can_set_mode;</div><div class='del'>-	priv-&gt;can.do_get_berr_counter = c_can_get_berr_counter;</div><div class='del'>-	priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK |</div><div class='del'>-					CAN_CTRLMODE_LISTENONLY |</div><div class='del'>-					CAN_CTRLMODE_BERR_REPORTING;</div><div class='del'>-</div><div class='del'>-	return dev;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(alloc_c_can_dev);</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PM</div><div class='del'>-int c_can_power_down(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	u32 val;</div><div class='del'>-	unsigned long time_out;</div><div class='del'>-	struct c_can_priv *priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	if (!(dev-&gt;flags &amp; IFF_UP))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	WARN_ON(priv-&gt;type != BOSCH_D_CAN);</div><div class='del'>-</div><div class='del'>-	/* set PDR value so the device goes to power down mode */</div><div class='del'>-	val = priv-&gt;read_reg(priv, C_CAN_CTRL_EX_REG);</div><div class='del'>-	val |= CONTROL_EX_PDR;</div><div class='del'>-	priv-&gt;write_reg(priv, C_CAN_CTRL_EX_REG, val);</div><div class='del'>-</div><div class='del'>-	/* Wait for the PDA bit to get set */</div><div class='del'>-	time_out = jiffies + msecs_to_jiffies(INIT_WAIT_MS);</div><div class='del'>-	while (!(priv-&gt;read_reg(priv, C_CAN_STS_REG) &amp; STATUS_PDA) &amp;&amp;</div><div class='del'>-				time_after(time_out, jiffies))</div><div class='del'>-		cpu_relax();</div><div class='del'>-</div><div class='del'>-	if (time_after(jiffies, time_out))</div><div class='del'>-		return -ETIMEDOUT;</div><div class='del'>-</div><div class='del'>-	c_can_stop(dev);</div><div class='del'>-</div><div class='del'>-	c_can_reset_ram(priv, false);</div><div class='del'>-	c_can_pm_runtime_put_sync(priv);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(c_can_power_down);</div><div class='del'>-</div><div class='del'>-int c_can_power_up(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	u32 val;</div><div class='del'>-	unsigned long time_out;</div><div class='del'>-	struct c_can_priv *priv = netdev_priv(dev);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (!(dev-&gt;flags &amp; IFF_UP))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	WARN_ON(priv-&gt;type != BOSCH_D_CAN);</div><div class='del'>-</div><div class='del'>-	c_can_pm_runtime_get_sync(priv);</div><div class='del'>-	c_can_reset_ram(priv, true);</div><div class='del'>-</div><div class='del'>-	/* Clear PDR and INIT bits */</div><div class='del'>-	val = priv-&gt;read_reg(priv, C_CAN_CTRL_EX_REG);</div><div class='del'>-	val &amp;= ~CONTROL_EX_PDR;</div><div class='del'>-	priv-&gt;write_reg(priv, C_CAN_CTRL_EX_REG, val);</div><div class='del'>-	val = priv-&gt;read_reg(priv, C_CAN_CTRL_REG);</div><div class='del'>-	val &amp;= ~CONTROL_INIT;</div><div class='del'>-	priv-&gt;write_reg(priv, C_CAN_CTRL_REG, val);</div><div class='del'>-</div><div class='del'>-	/* Wait for the PDA bit to get clear */</div><div class='del'>-	time_out = jiffies + msecs_to_jiffies(INIT_WAIT_MS);</div><div class='del'>-	while ((priv-&gt;read_reg(priv, C_CAN_STS_REG) &amp; STATUS_PDA) &amp;&amp;</div><div class='del'>-				time_after(time_out, jiffies))</div><div class='del'>-		cpu_relax();</div><div class='del'>-</div><div class='del'>-	if (time_after(jiffies, time_out))</div><div class='del'>-		return -ETIMEDOUT;</div><div class='del'>-</div><div class='del'>-	ret = c_can_start(dev);</div><div class='del'>-	if (!ret)</div><div class='del'>-		c_can_irq_control(priv, true);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(c_can_power_up);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-void free_c_can_dev(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct c_can_priv *priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	netif_napi_del(&amp;priv-&gt;napi);</div><div class='del'>-	free_candev(dev);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(free_c_can_dev);</div><div class='del'>-</div><div class='del'>-static const struct net_device_ops c_can_netdev_ops = {</div><div class='del'>-	.ndo_open = c_can_open,</div><div class='del'>-	.ndo_stop = c_can_close,</div><div class='del'>-	.ndo_start_xmit = c_can_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-int register_c_can_dev(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct c_can_priv *priv = netdev_priv(dev);</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	/* Deactivate pins to prevent DRA7 DCAN IP from being</div><div class='del'>-	 * stuck in transition when module is disabled.</div><div class='del'>-	 * Pins are activated in c_can_start() and deactivated</div><div class='del'>-	 * in c_can_stop()</div><div class='del'>-	 */</div><div class='del'>-	pinctrl_pm_select_sleep_state(dev-&gt;dev.parent);</div><div class='del'>-</div><div class='del'>-	c_can_pm_runtime_enable(priv);</div><div class='del'>-</div><div class='del'>-	dev-&gt;flags |= IFF_ECHO;	/* we support local echo */</div><div class='del'>-	dev-&gt;netdev_ops = &amp;c_can_netdev_ops;</div><div class='del'>-</div><div class='del'>-	err = register_candev(dev);</div><div class='del'>-	if (err)</div><div class='del'>-		c_can_pm_runtime_disable(priv);</div><div class='del'>-	else</div><div class='del'>-		devm_can_led_init(dev);</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(register_c_can_dev);</div><div class='del'>-</div><div class='del'>-void unregister_c_can_dev(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct c_can_priv *priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	unregister_candev(dev);</div><div class='del'>-</div><div class='del'>-	c_can_pm_runtime_disable(priv);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(unregister_c_can_dev);</div><div class='del'>-</div><div class='del'>-MODULE_AUTHOR("Bhupesh Sharma &lt;bhupesh.sharma@st.com&gt;");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='del'>-MODULE_DESCRIPTION("CAN bus driver for Bosch C_CAN controller");</div><div class='head'>diff --git a/drivers/net/can/c_can/c_can.h b/drivers/net/can/c_can/c_can.h<br/>index 8acdc7fa4792..029cd8194ed5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/c_can/c_can.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/c_can/c_can.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/c_can/c_can.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/c_can/c_can.h</a></div><div class='hunk'>@@ -22,23 +22,6 @@</div><div class='ctx'> #ifndef C_CAN_H</div><div class='ctx'> #define C_CAN_H</div><div class='ctx'> </div><div class='del'>-/* message object split */</div><div class='del'>-#define C_CAN_NO_OF_OBJECTS	32</div><div class='del'>-#define C_CAN_MSG_OBJ_RX_NUM	16</div><div class='del'>-#define C_CAN_MSG_OBJ_TX_NUM	16</div><div class='del'>-</div><div class='del'>-#define C_CAN_MSG_OBJ_RX_FIRST	1</div><div class='del'>-#define C_CAN_MSG_OBJ_RX_LAST	(C_CAN_MSG_OBJ_RX_FIRST + \</div><div class='del'>-				C_CAN_MSG_OBJ_RX_NUM - 1)</div><div class='del'>-</div><div class='del'>-#define C_CAN_MSG_OBJ_TX_FIRST	(C_CAN_MSG_OBJ_RX_LAST + 1)</div><div class='del'>-#define C_CAN_MSG_OBJ_TX_LAST	(C_CAN_MSG_OBJ_TX_FIRST + \</div><div class='del'>-				C_CAN_MSG_OBJ_TX_NUM - 1)</div><div class='del'>-</div><div class='del'>-#define C_CAN_MSG_OBJ_RX_SPLIT	9</div><div class='del'>-#define C_CAN_MSG_RX_LOW_LAST	(C_CAN_MSG_OBJ_RX_SPLIT - 1)</div><div class='del'>-#define RECEIVE_OBJECT_BITS	0x0000ffff</div><div class='del'>-</div><div class='ctx'> enum reg {</div><div class='ctx'> 	C_CAN_CTRL_REG = 0,</div><div class='ctx'> 	C_CAN_CTRL_EX_REG,</div><div class='hunk'>@@ -76,12 +59,13 @@ enum reg {</div><div class='ctx'> 	C_CAN_NEWDAT2_REG,</div><div class='ctx'> 	C_CAN_INTPND1_REG,</div><div class='ctx'> 	C_CAN_INTPND2_REG,</div><div class='add'>+	C_CAN_INTPND3_REG,</div><div class='ctx'> 	C_CAN_MSGVAL1_REG,</div><div class='ctx'> 	C_CAN_MSGVAL2_REG,</div><div class='ctx'> 	C_CAN_FUNCTION_REG,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const u16 reg_map_c_can[] = {</div><div class='add'>+static const u16 __maybe_unused reg_map_c_can[] = {</div><div class='ctx'> 	[C_CAN_CTRL_REG]	= 0x00,</div><div class='ctx'> 	[C_CAN_STS_REG]		= 0x02,</div><div class='ctx'> 	[C_CAN_ERR_CNT_REG]	= 0x04,</div><div class='hunk'>@@ -121,7 +105,7 @@ static const u16 reg_map_c_can[] = {</div><div class='ctx'> 	[C_CAN_MSGVAL2_REG]	= 0xB2,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const u16 reg_map_d_can[] = {</div><div class='add'>+static const u16 __maybe_unused reg_map_d_can[] = {</div><div class='ctx'> 	[C_CAN_CTRL_REG]	= 0x00,</div><div class='ctx'> 	[C_CAN_CTRL_EX_REG]	= 0x02,</div><div class='ctx'> 	[C_CAN_STS_REG]		= 0x04,</div><div class='hunk'>@@ -137,6 +121,7 @@ static const u16 reg_map_d_can[] = {</div><div class='ctx'> 	[C_CAN_NEWDAT2_REG]	= 0x9E,</div><div class='ctx'> 	[C_CAN_INTPND1_REG]	= 0xB0,</div><div class='ctx'> 	[C_CAN_INTPND2_REG]	= 0xB2,</div><div class='add'>+	[C_CAN_INTPND3_REG]	= 0xB4,</div><div class='ctx'> 	[C_CAN_MSGVAL1_REG]	= 0xC4,</div><div class='ctx'> 	[C_CAN_MSGVAL2_REG]	= 0xC6,</div><div class='ctx'> 	[C_CAN_IF1_COMREQ_REG]	= 0x100,</div><div class='hunk'>@@ -164,7 +149,6 @@ static const u16 reg_map_d_can[] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum c_can_dev_id {</div><div class='del'>-	BOSCH_C_CAN_PLATFORM,</div><div class='ctx'> 	BOSCH_C_CAN,</div><div class='ctx'> 	BOSCH_D_CAN,</div><div class='ctx'> };</div><div class='hunk'>@@ -176,6 +160,7 @@ struct raminit_bits {</div><div class='ctx'> </div><div class='ctx'> struct c_can_driver_data {</div><div class='ctx'> 	enum c_can_dev_id id;</div><div class='add'>+	unsigned int msg_obj_num;</div><div class='ctx'> </div><div class='ctx'> 	/* RAMINIT register description. Optional. */</div><div class='ctx'> 	const struct raminit_bits *raminit_bits; /* Array of START/DONE bit positions */</div><div class='hunk'>@@ -191,31 +176,44 @@ struct c_can_raminit {</div><div class='ctx'> 	bool needs_pulse;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* c_can tx ring structure */</div><div class='add'>+struct c_can_tx_ring {</div><div class='add'>+	unsigned int head;</div><div class='add'>+	unsigned int tail;</div><div class='add'>+	unsigned int obj_num;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* c_can private data structure */</div><div class='ctx'> struct c_can_priv {</div><div class='ctx'> 	struct can_priv can;	/* must be the first member */</div><div class='ctx'> 	struct napi_struct napi;</div><div class='ctx'> 	struct net_device *dev;</div><div class='ctx'> 	struct device *device;</div><div class='del'>-	atomic_t tx_active;</div><div class='add'>+	unsigned int msg_obj_num;</div><div class='add'>+	unsigned int msg_obj_rx_num;</div><div class='add'>+	unsigned int msg_obj_tx_num;</div><div class='add'>+	unsigned int msg_obj_rx_first;</div><div class='add'>+	unsigned int msg_obj_rx_last;</div><div class='add'>+	unsigned int msg_obj_tx_first;</div><div class='add'>+	unsigned int msg_obj_tx_last;</div><div class='add'>+	u32 msg_obj_rx_mask;</div><div class='add'>+	atomic_t sie_pending;</div><div class='ctx'> 	unsigned long tx_dir;</div><div class='ctx'> 	int last_status;</div><div class='del'>-	u16 (*read_reg) (const struct c_can_priv *priv, enum reg index);</div><div class='del'>-	void (*write_reg) (const struct c_can_priv *priv, enum reg index, u16 val);</div><div class='del'>-	u32 (*read_reg32) (const struct c_can_priv *priv, enum reg index);</div><div class='del'>-	void (*write_reg32) (const struct c_can_priv *priv, enum reg index, u32 val);</div><div class='add'>+	struct c_can_tx_ring tx;</div><div class='add'>+	u16 (*read_reg)(const struct c_can_priv *priv, enum reg index);</div><div class='add'>+	void (*write_reg)(const struct c_can_priv *priv, enum reg index, u16 val);</div><div class='add'>+	u32 (*read_reg32)(const struct c_can_priv *priv, enum reg index);</div><div class='add'>+	void (*write_reg32)(const struct c_can_priv *priv, enum reg index, u32 val);</div><div class='ctx'> 	void __iomem *base;</div><div class='ctx'> 	const u16 *regs;</div><div class='del'>-	void *priv;		/* for board-specific data */</div><div class='ctx'> 	enum c_can_dev_id type;</div><div class='ctx'> 	struct c_can_raminit raminit_sys;	/* RAMINIT via syscon regmap */</div><div class='del'>-	void (*raminit) (const struct c_can_priv *priv, bool enable);</div><div class='add'>+	void (*raminit)(const struct c_can_priv *priv, bool enable);</div><div class='ctx'> 	u32 comm_rcv_high;</div><div class='del'>-	u32 rxmasked;</div><div class='del'>-	u32 dlc[C_CAN_MSG_OBJ_TX_NUM];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct net_device *alloc_c_can_dev(void);</div><div class='add'>+struct net_device *alloc_c_can_dev(int msg_obj_num);</div><div class='ctx'> void free_c_can_dev(struct net_device *dev);</div><div class='ctx'> int register_c_can_dev(struct net_device *dev);</div><div class='ctx'> void unregister_c_can_dev(struct net_device *dev);</div><div class='hunk'>@@ -225,4 +223,34 @@ int c_can_power_up(struct net_device *dev);</div><div class='ctx'> int c_can_power_down(struct net_device *dev);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+extern const struct ethtool_ops c_can_ethtool_ops;</div><div class='add'>+</div><div class='add'>+static inline u8 c_can_get_tx_head(const struct c_can_tx_ring *ring)</div><div class='add'>+{</div><div class='add'>+	return ring-&gt;head &amp; (ring-&gt;obj_num - 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u8 c_can_get_tx_tail(const struct c_can_tx_ring *ring)</div><div class='add'>+{</div><div class='add'>+	return ring-&gt;tail &amp; (ring-&gt;obj_num - 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u8 c_can_get_tx_free(const struct c_can_priv *priv,</div><div class='add'>+				   const struct c_can_tx_ring *ring)</div><div class='add'>+{</div><div class='add'>+	u8 head = c_can_get_tx_head(ring);</div><div class='add'>+	u8 tail = c_can_get_tx_tail(ring);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;type == BOSCH_D_CAN)</div><div class='add'>+		return ring-&gt;obj_num - (ring-&gt;head - ring-&gt;tail);</div><div class='add'>+</div><div class='add'>+	/* This is not a FIFO. C/D_CAN sends out the buffers</div><div class='add'>+	 * prioritized. The lowest buffer number wins.</div><div class='add'>+	 */</div><div class='add'>+	if (head &lt; tail)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return ring-&gt;obj_num - head;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #endif /* C_CAN_H */</div><div class='head'>diff --git a/drivers/net/can/c_can/c_can_ethtool.c b/drivers/net/can/c_can/c_can_ethtool.c<br/>new file mode 100644<br/>index 000000000000..e41167eda673<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/c_can/c_can_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/c_can/c_can_ethtool.c</a></div><div class='hunk'>@@ -0,0 +1,30 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2021, Dario Binacchi &lt;dariobin@libero.it&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+</div><div class='add'>+#include "c_can.h"</div><div class='add'>+</div><div class='add'>+static void c_can_get_ringparam(struct net_device *netdev,</div><div class='add'>+				struct ethtool_ringparam *ring,</div><div class='add'>+				struct kernel_ethtool_ringparam *kernel_ring,</div><div class='add'>+				struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct c_can_priv *priv = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	ring-&gt;rx_max_pending = priv-&gt;msg_obj_num;</div><div class='add'>+	ring-&gt;tx_max_pending = priv-&gt;msg_obj_num;</div><div class='add'>+	ring-&gt;rx_pending = priv-&gt;msg_obj_rx_num;</div><div class='add'>+	ring-&gt;tx_pending = priv-&gt;msg_obj_tx_num;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct ethtool_ops c_can_ethtool_ops = {</div><div class='add'>+	.get_ringparam = c_can_get_ringparam,</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/net/can/c_can/c_can_main.c b/drivers/net/can/c_can/c_can_main.c<br/>new file mode 100644<br/>index 000000000000..3702cac7fbf0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/c_can/c_can_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/c_can/c_can_main.c</a></div><div class='hunk'>@@ -0,0 +1,1392 @@</div><div class='add'>+/*</div><div class='add'>+ * CAN bus driver for Bosch C_CAN controller</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2010 ST Microelectronics</div><div class='add'>+ * Bhupesh Sharma &lt;bhupesh.sharma@st.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Borrowed heavily from the C_CAN driver originally written by:</div><div class='add'>+ * Copyright (C) 2007</div><div class='add'>+ * - Sascha Hauer, Marc Kleine-Budde, Pengutronix &lt;s.hauer@pengutronix.de&gt;</div><div class='add'>+ * - Simon Kallweit, intefo AG &lt;simon.kallweit@intefo.ch&gt;</div><div class='add'>+ *</div><div class='add'>+ * TX and RX NAPI implementation has been borrowed from at91 CAN driver</div><div class='add'>+ * written by:</div><div class='add'>+ * Copyright</div><div class='add'>+ * (C) 2007 by Hans J. Koch &lt;hjk@hansjkoch.de&gt;</div><div class='add'>+ * (C) 2008, 2009 by Marc Kleine-Budde &lt;kernel@pengutronix.de&gt;</div><div class='add'>+ *</div><div class='add'>+ * Bosch C_CAN controller is compliant to CAN protocol version 2.0 part A and B.</div><div class='add'>+ * Bosch C_CAN user manual can be obtained from:</div><div class='add'>+ * http://www.semiconductors.bosch.de/media/en/pdf/ipmodules_1/c_can/</div><div class='add'>+ * users_manual_c_can.pdf</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2. This program is licensed "as is" without any</div><div class='add'>+ * warranty of any kind, whether express or implied.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/if_arp.h&gt;</div><div class='add'>+#include &lt;linux/if_ether.h&gt;</div><div class='add'>+#include &lt;linux/list.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/pm_runtime.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/consumer.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/can.h&gt;</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/can/error.h&gt;</div><div class='add'>+</div><div class='add'>+#include "c_can.h"</div><div class='add'>+</div><div class='add'>+/* Number of interface registers */</div><div class='add'>+#define IF_ENUM_REG_LEN		11</div><div class='add'>+#define C_CAN_IFACE(reg, iface)	(C_CAN_IF1_##reg + (iface) * IF_ENUM_REG_LEN)</div><div class='add'>+</div><div class='add'>+/* control extension register D_CAN specific */</div><div class='add'>+#define CONTROL_EX_PDR		BIT(8)</div><div class='add'>+</div><div class='add'>+/* control register */</div><div class='add'>+#define CONTROL_SWR		BIT(15)</div><div class='add'>+#define CONTROL_TEST		BIT(7)</div><div class='add'>+#define CONTROL_CCE		BIT(6)</div><div class='add'>+#define CONTROL_DISABLE_AR	BIT(5)</div><div class='add'>+#define CONTROL_ENABLE_AR	(0 &lt;&lt; 5)</div><div class='add'>+#define CONTROL_EIE		BIT(3)</div><div class='add'>+#define CONTROL_SIE		BIT(2)</div><div class='add'>+#define CONTROL_IE		BIT(1)</div><div class='add'>+#define CONTROL_INIT		BIT(0)</div><div class='add'>+</div><div class='add'>+#define CONTROL_IRQMSK		(CONTROL_EIE | CONTROL_IE | CONTROL_SIE)</div><div class='add'>+</div><div class='add'>+/* test register */</div><div class='add'>+#define TEST_RX			BIT(7)</div><div class='add'>+#define TEST_TX1		BIT(6)</div><div class='add'>+#define TEST_TX2		BIT(5)</div><div class='add'>+#define TEST_LBACK		BIT(4)</div><div class='add'>+#define TEST_SILENT		BIT(3)</div><div class='add'>+#define TEST_BASIC		BIT(2)</div><div class='add'>+</div><div class='add'>+/* status register */</div><div class='add'>+#define STATUS_PDA		BIT(10)</div><div class='add'>+#define STATUS_BOFF		BIT(7)</div><div class='add'>+#define STATUS_EWARN		BIT(6)</div><div class='add'>+#define STATUS_EPASS		BIT(5)</div><div class='add'>+#define STATUS_RXOK		BIT(4)</div><div class='add'>+#define STATUS_TXOK		BIT(3)</div><div class='add'>+</div><div class='add'>+/* error counter register */</div><div class='add'>+#define ERR_CNT_TEC_MASK	0xff</div><div class='add'>+#define ERR_CNT_TEC_SHIFT	0</div><div class='add'>+#define ERR_CNT_REC_SHIFT	8</div><div class='add'>+#define ERR_CNT_REC_MASK	(0x7f &lt;&lt; ERR_CNT_REC_SHIFT)</div><div class='add'>+#define ERR_CNT_RP_SHIFT	15</div><div class='add'>+#define ERR_CNT_RP_MASK		(0x1 &lt;&lt; ERR_CNT_RP_SHIFT)</div><div class='add'>+</div><div class='add'>+/* bit-timing register */</div><div class='add'>+#define BTR_BRP_MASK		0x3f</div><div class='add'>+#define BTR_BRP_SHIFT		0</div><div class='add'>+#define BTR_SJW_SHIFT		6</div><div class='add'>+#define BTR_SJW_MASK		(0x3 &lt;&lt; BTR_SJW_SHIFT)</div><div class='add'>+#define BTR_TSEG1_SHIFT		8</div><div class='add'>+#define BTR_TSEG1_MASK		(0xf &lt;&lt; BTR_TSEG1_SHIFT)</div><div class='add'>+#define BTR_TSEG2_SHIFT		12</div><div class='add'>+#define BTR_TSEG2_MASK		(0x7 &lt;&lt; BTR_TSEG2_SHIFT)</div><div class='add'>+</div><div class='add'>+/* interrupt register */</div><div class='add'>+#define INT_STS_PENDING		0x8000</div><div class='add'>+</div><div class='add'>+/* brp extension register */</div><div class='add'>+#define BRP_EXT_BRPE_MASK	0x0f</div><div class='add'>+#define BRP_EXT_BRPE_SHIFT	0</div><div class='add'>+</div><div class='add'>+/* IFx command request */</div><div class='add'>+#define IF_COMR_BUSY		BIT(15)</div><div class='add'>+</div><div class='add'>+/* IFx command mask */</div><div class='add'>+#define IF_COMM_WR		BIT(7)</div><div class='add'>+#define IF_COMM_MASK		BIT(6)</div><div class='add'>+#define IF_COMM_ARB		BIT(5)</div><div class='add'>+#define IF_COMM_CONTROL		BIT(4)</div><div class='add'>+#define IF_COMM_CLR_INT_PND	BIT(3)</div><div class='add'>+#define IF_COMM_TXRQST		BIT(2)</div><div class='add'>+#define IF_COMM_CLR_NEWDAT	IF_COMM_TXRQST</div><div class='add'>+#define IF_COMM_DATAA		BIT(1)</div><div class='add'>+#define IF_COMM_DATAB		BIT(0)</div><div class='add'>+</div><div class='add'>+/* TX buffer setup */</div><div class='add'>+#define IF_COMM_TX		(IF_COMM_ARB | IF_COMM_CONTROL | \</div><div class='add'>+				 IF_COMM_TXRQST |		 \</div><div class='add'>+				 IF_COMM_DATAA | IF_COMM_DATAB)</div><div class='add'>+</div><div class='add'>+/* For the low buffers we clear the interrupt bit, but keep newdat */</div><div class='add'>+#define IF_COMM_RCV_LOW		(IF_COMM_MASK | IF_COMM_ARB | \</div><div class='add'>+				 IF_COMM_CONTROL | IF_COMM_CLR_INT_PND | \</div><div class='add'>+				 IF_COMM_DATAA | IF_COMM_DATAB)</div><div class='add'>+</div><div class='add'>+/* For the high buffers we clear the interrupt bit and newdat */</div><div class='add'>+#define IF_COMM_RCV_HIGH	(IF_COMM_RCV_LOW | IF_COMM_CLR_NEWDAT)</div><div class='add'>+</div><div class='add'>+/* Receive setup of message objects */</div><div class='add'>+#define IF_COMM_RCV_SETUP	(IF_COMM_MASK | IF_COMM_ARB | IF_COMM_CONTROL)</div><div class='add'>+</div><div class='add'>+/* Invalidation of message objects */</div><div class='add'>+#define IF_COMM_INVAL		(IF_COMM_ARB | IF_COMM_CONTROL)</div><div class='add'>+</div><div class='add'>+/* IFx arbitration */</div><div class='add'>+#define IF_ARB_MSGVAL		BIT(31)</div><div class='add'>+#define IF_ARB_MSGXTD		BIT(30)</div><div class='add'>+#define IF_ARB_TRANSMIT		BIT(29)</div><div class='add'>+</div><div class='add'>+/* IFx message control */</div><div class='add'>+#define IF_MCONT_NEWDAT		BIT(15)</div><div class='add'>+#define IF_MCONT_MSGLST		BIT(14)</div><div class='add'>+#define IF_MCONT_INTPND		BIT(13)</div><div class='add'>+#define IF_MCONT_UMASK		BIT(12)</div><div class='add'>+#define IF_MCONT_TXIE		BIT(11)</div><div class='add'>+#define IF_MCONT_RXIE		BIT(10)</div><div class='add'>+#define IF_MCONT_RMTEN		BIT(9)</div><div class='add'>+#define IF_MCONT_TXRQST		BIT(8)</div><div class='add'>+#define IF_MCONT_EOB		BIT(7)</div><div class='add'>+#define IF_MCONT_DLC_MASK	0xf</div><div class='add'>+</div><div class='add'>+#define IF_MCONT_RCV		(IF_MCONT_RXIE | IF_MCONT_UMASK)</div><div class='add'>+#define IF_MCONT_RCV_EOB	(IF_MCONT_RCV | IF_MCONT_EOB)</div><div class='add'>+</div><div class='add'>+#define IF_MCONT_TX		(IF_MCONT_TXIE | IF_MCONT_EOB)</div><div class='add'>+</div><div class='add'>+/* Use IF1 in NAPI path and IF2 in TX path */</div><div class='add'>+#define IF_NAPI			0</div><div class='add'>+#define IF_TX			1</div><div class='add'>+</div><div class='add'>+/* minimum timeout for checking BUSY status */</div><div class='add'>+#define MIN_TIMEOUT_VALUE	6</div><div class='add'>+</div><div class='add'>+/* Wait for ~1 sec for INIT bit */</div><div class='add'>+#define INIT_WAIT_MS		1000</div><div class='add'>+</div><div class='add'>+/* c_can lec values */</div><div class='add'>+enum c_can_lec_type {</div><div class='add'>+	LEC_NO_ERROR = 0,</div><div class='add'>+	LEC_STUFF_ERROR,</div><div class='add'>+	LEC_FORM_ERROR,</div><div class='add'>+	LEC_ACK_ERROR,</div><div class='add'>+	LEC_BIT1_ERROR,</div><div class='add'>+	LEC_BIT0_ERROR,</div><div class='add'>+	LEC_CRC_ERROR,</div><div class='add'>+	LEC_UNUSED,</div><div class='add'>+	LEC_MASK = LEC_UNUSED,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* c_can error types:</div><div class='add'>+ * Bus errors (BUS_OFF, ERROR_WARNING, ERROR_PASSIVE) are supported</div><div class='add'>+ */</div><div class='add'>+enum c_can_bus_error_types {</div><div class='add'>+	C_CAN_NO_ERROR = 0,</div><div class='add'>+	C_CAN_BUS_OFF,</div><div class='add'>+	C_CAN_ERROR_WARNING,</div><div class='add'>+	C_CAN_ERROR_PASSIVE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const c_can_bittiming_const = {</div><div class='add'>+	.name = KBUILD_MODNAME,</div><div class='add'>+	.tseg1_min = 2,		/* Time segment 1 = prop_seg + phase_seg1 */</div><div class='add'>+	.tseg1_max = 16,</div><div class='add'>+	.tseg2_min = 1,		/* Time segment 2 = phase_seg2 */</div><div class='add'>+	.tseg2_max = 8,</div><div class='add'>+	.sjw_max = 4,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 1024,	/* 6-bit BRP field + 4-bit BRPE field*/</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline void c_can_pm_runtime_get_sync(const struct c_can_priv *priv)</div><div class='add'>+{</div><div class='add'>+	if (priv-&gt;device)</div><div class='add'>+		pm_runtime_get_sync(priv-&gt;device);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void c_can_pm_runtime_put_sync(const struct c_can_priv *priv)</div><div class='add'>+{</div><div class='add'>+	if (priv-&gt;device)</div><div class='add'>+		pm_runtime_put_sync(priv-&gt;device);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void c_can_reset_ram(const struct c_can_priv *priv, bool enable)</div><div class='add'>+{</div><div class='add'>+	if (priv-&gt;raminit)</div><div class='add'>+		priv-&gt;raminit(priv, enable);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void c_can_irq_control(struct c_can_priv *priv, bool enable)</div><div class='add'>+{</div><div class='add'>+	u32 ctrl = priv-&gt;read_reg(priv,	C_CAN_CTRL_REG) &amp; ~CONTROL_IRQMSK;</div><div class='add'>+</div><div class='add'>+	if (enable)</div><div class='add'>+		ctrl |= CONTROL_IRQMSK;</div><div class='add'>+</div><div class='add'>+	priv-&gt;write_reg(priv, C_CAN_CTRL_REG, ctrl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void c_can_obj_update(struct net_device *dev, int iface, u32 cmd, u32 obj)</div><div class='add'>+{</div><div class='add'>+	struct c_can_priv *priv = netdev_priv(dev);</div><div class='add'>+	int cnt, reg = C_CAN_IFACE(COMREQ_REG, iface);</div><div class='add'>+</div><div class='add'>+	priv-&gt;write_reg32(priv, reg, (cmd &lt;&lt; 16) | obj);</div><div class='add'>+</div><div class='add'>+	for (cnt = MIN_TIMEOUT_VALUE; cnt; cnt--) {</div><div class='add'>+		if (!(priv-&gt;read_reg(priv, reg) &amp; IF_COMR_BUSY))</div><div class='add'>+			return;</div><div class='add'>+		udelay(1);</div><div class='add'>+	}</div><div class='add'>+	netdev_err(dev, "Updating object timed out\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void c_can_object_get(struct net_device *dev, int iface,</div><div class='add'>+				    u32 obj, u32 cmd)</div><div class='add'>+{</div><div class='add'>+	c_can_obj_update(dev, iface, cmd, obj);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void c_can_object_put(struct net_device *dev, int iface,</div><div class='add'>+				    u32 obj, u32 cmd)</div><div class='add'>+{</div><div class='add'>+	c_can_obj_update(dev, iface, cmd | IF_COMM_WR, obj);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Note: According to documentation clearing TXIE while MSGVAL is set</div><div class='add'>+ * is not allowed, but works nicely on C/DCAN. And that lowers the I/O</div><div class='add'>+ * load significantly.</div><div class='add'>+ */</div><div class='add'>+static void c_can_inval_tx_object(struct net_device *dev, int iface, int obj)</div><div class='add'>+{</div><div class='add'>+	struct c_can_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	priv-&gt;write_reg(priv, C_CAN_IFACE(MSGCTRL_REG, iface), 0);</div><div class='add'>+	c_can_object_put(dev, iface, obj, IF_COMM_INVAL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void c_can_inval_msg_object(struct net_device *dev, int iface, int obj)</div><div class='add'>+{</div><div class='add'>+	struct c_can_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	priv-&gt;write_reg32(priv, C_CAN_IFACE(ARB1_REG, iface), 0);</div><div class='add'>+	c_can_inval_tx_object(dev, iface, obj);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void c_can_setup_tx_object(struct net_device *dev, int iface,</div><div class='add'>+				  struct can_frame *frame, int idx)</div><div class='add'>+{</div><div class='add'>+	struct c_can_priv *priv = netdev_priv(dev);</div><div class='add'>+	u16 ctrl = IF_MCONT_TX | frame-&gt;len;</div><div class='add'>+	bool rtr = frame-&gt;can_id &amp; CAN_RTR_FLAG;</div><div class='add'>+	u32 arb = IF_ARB_MSGVAL;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (frame-&gt;can_id &amp; CAN_EFF_FLAG) {</div><div class='add'>+		arb |= frame-&gt;can_id &amp; CAN_EFF_MASK;</div><div class='add'>+		arb |= IF_ARB_MSGXTD;</div><div class='add'>+	} else {</div><div class='add'>+		arb |= (frame-&gt;can_id &amp; CAN_SFF_MASK) &lt;&lt; 18;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!rtr)</div><div class='add'>+		arb |= IF_ARB_TRANSMIT;</div><div class='add'>+</div><div class='add'>+	/* If we change the DIR bit, we need to invalidate the buffer</div><div class='add'>+	 * first, i.e. clear the MSGVAL flag in the arbiter.</div><div class='add'>+	 */</div><div class='add'>+	if (rtr != (bool)test_bit(idx, &amp;priv-&gt;tx_dir)) {</div><div class='add'>+		u32 obj = idx + priv-&gt;msg_obj_tx_first;</div><div class='add'>+</div><div class='add'>+		c_can_inval_msg_object(dev, iface, obj);</div><div class='add'>+		change_bit(idx, &amp;priv-&gt;tx_dir);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;write_reg32(priv, C_CAN_IFACE(ARB1_REG, iface), arb);</div><div class='add'>+</div><div class='add'>+	priv-&gt;write_reg(priv, C_CAN_IFACE(MSGCTRL_REG, iface), ctrl);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;type == BOSCH_D_CAN) {</div><div class='add'>+		u32 data = 0, dreg = C_CAN_IFACE(DATA1_REG, iface);</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; frame-&gt;len; i += 4, dreg += 2) {</div><div class='add'>+			data = (u32)frame-&gt;data[i];</div><div class='add'>+			data |= (u32)frame-&gt;data[i + 1] &lt;&lt; 8;</div><div class='add'>+			data |= (u32)frame-&gt;data[i + 2] &lt;&lt; 16;</div><div class='add'>+			data |= (u32)frame-&gt;data[i + 3] &lt;&lt; 24;</div><div class='add'>+			priv-&gt;write_reg32(priv, dreg, data);</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		for (i = 0; i &lt; frame-&gt;len; i += 2) {</div><div class='add'>+			priv-&gt;write_reg(priv,</div><div class='add'>+					C_CAN_IFACE(DATA1_REG, iface) + i / 2,</div><div class='add'>+					frame-&gt;data[i] |</div><div class='add'>+					(frame-&gt;data[i + 1] &lt;&lt; 8));</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int c_can_handle_lost_msg_obj(struct net_device *dev,</div><div class='add'>+				     int iface, int objno, u32 ctrl)</div><div class='add'>+{</div><div class='add'>+	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='add'>+	struct c_can_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct can_frame *frame;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	ctrl &amp;= ~(IF_MCONT_MSGLST | IF_MCONT_INTPND | IF_MCONT_NEWDAT);</div><div class='add'>+	priv-&gt;write_reg(priv, C_CAN_IFACE(MSGCTRL_REG, iface), ctrl);</div><div class='add'>+	c_can_object_put(dev, iface, objno, IF_COMM_CONTROL);</div><div class='add'>+</div><div class='add'>+	stats-&gt;rx_errors++;</div><div class='add'>+	stats-&gt;rx_over_errors++;</div><div class='add'>+</div><div class='add'>+	/* create an error msg */</div><div class='add'>+	skb = alloc_can_err_skb(dev, &amp;frame);</div><div class='add'>+	if (unlikely(!skb))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	frame-&gt;can_id |= CAN_ERR_CRTL;</div><div class='add'>+	frame-&gt;data[1] = CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='add'>+</div><div class='add'>+	netif_receive_skb(skb);</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int c_can_read_msg_object(struct net_device *dev, int iface, u32 ctrl)</div><div class='add'>+{</div><div class='add'>+	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='add'>+	struct c_can_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct can_frame *frame;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	u32 arb, data;</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_skb(dev, &amp;frame);</div><div class='add'>+	if (!skb) {</div><div class='add'>+		stats-&gt;rx_dropped++;</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	frame-&gt;len = can_cc_dlc2len(ctrl &amp; 0x0F);</div><div class='add'>+</div><div class='add'>+	arb = priv-&gt;read_reg32(priv, C_CAN_IFACE(ARB1_REG, iface));</div><div class='add'>+</div><div class='add'>+	if (arb &amp; IF_ARB_MSGXTD)</div><div class='add'>+		frame-&gt;can_id = (arb &amp; CAN_EFF_MASK) | CAN_EFF_FLAG;</div><div class='add'>+	else</div><div class='add'>+		frame-&gt;can_id = (arb &gt;&gt; 18) &amp; CAN_SFF_MASK;</div><div class='add'>+</div><div class='add'>+	if (arb &amp; IF_ARB_TRANSMIT) {</div><div class='add'>+		frame-&gt;can_id |= CAN_RTR_FLAG;</div><div class='add'>+	} else {</div><div class='add'>+		int i, dreg = C_CAN_IFACE(DATA1_REG, iface);</div><div class='add'>+</div><div class='add'>+		if (priv-&gt;type == BOSCH_D_CAN) {</div><div class='add'>+			for (i = 0; i &lt; frame-&gt;len; i += 4, dreg += 2) {</div><div class='add'>+				data = priv-&gt;read_reg32(priv, dreg);</div><div class='add'>+				frame-&gt;data[i] = data;</div><div class='add'>+				frame-&gt;data[i + 1] = data &gt;&gt; 8;</div><div class='add'>+				frame-&gt;data[i + 2] = data &gt;&gt; 16;</div><div class='add'>+				frame-&gt;data[i + 3] = data &gt;&gt; 24;</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			for (i = 0; i &lt; frame-&gt;len; i += 2, dreg++) {</div><div class='add'>+				data = priv-&gt;read_reg(priv, dreg);</div><div class='add'>+				frame-&gt;data[i] = data;</div><div class='add'>+				frame-&gt;data[i + 1] = data &gt;&gt; 8;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		stats-&gt;rx_bytes += frame-&gt;len;</div><div class='add'>+	}</div><div class='add'>+	stats-&gt;rx_packets++;</div><div class='add'>+</div><div class='add'>+	netif_receive_skb(skb);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void c_can_setup_receive_object(struct net_device *dev, int iface,</div><div class='add'>+				       u32 obj, u32 mask, u32 id, u32 mcont)</div><div class='add'>+{</div><div class='add'>+	struct c_can_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	mask |= BIT(29);</div><div class='add'>+	priv-&gt;write_reg32(priv, C_CAN_IFACE(MASK1_REG, iface), mask);</div><div class='add'>+</div><div class='add'>+	id |= IF_ARB_MSGVAL;</div><div class='add'>+	priv-&gt;write_reg32(priv, C_CAN_IFACE(ARB1_REG, iface), id);</div><div class='add'>+</div><div class='add'>+	priv-&gt;write_reg(priv, C_CAN_IFACE(MSGCTRL_REG, iface), mcont);</div><div class='add'>+	c_can_object_put(dev, iface, obj, IF_COMM_RCV_SETUP);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool c_can_tx_busy(const struct c_can_priv *priv,</div><div class='add'>+			  const struct c_can_tx_ring *tx_ring)</div><div class='add'>+{</div><div class='add'>+	if (c_can_get_tx_free(priv, tx_ring) &gt; 0)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(priv-&gt;dev);</div><div class='add'>+</div><div class='add'>+	/* Memory barrier before checking tx_free (head and tail) */</div><div class='add'>+	smp_mb();</div><div class='add'>+</div><div class='add'>+	if (c_can_get_tx_free(priv, tx_ring) == 0) {</div><div class='add'>+		netdev_dbg(priv-&gt;dev,</div><div class='add'>+			   "Stopping tx-queue (tx_head=0x%08x, tx_tail=0x%08x, len=%d).\n",</div><div class='add'>+			   tx_ring-&gt;head, tx_ring-&gt;tail,</div><div class='add'>+			   tx_ring-&gt;head - tx_ring-&gt;tail);</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netif_start_queue(priv-&gt;dev);</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static netdev_tx_t c_can_start_xmit(struct sk_buff *skb,</div><div class='add'>+				    struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct can_frame *frame = (struct can_frame *)skb-&gt;data;</div><div class='add'>+	struct c_can_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct c_can_tx_ring *tx_ring = &amp;priv-&gt;tx;</div><div class='add'>+	u32 idx, obj, cmd = IF_COMM_TX;</div><div class='add'>+</div><div class='add'>+	if (can_dev_dropped_skb(dev, skb))</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+	if (c_can_tx_busy(priv, tx_ring))</div><div class='add'>+		return NETDEV_TX_BUSY;</div><div class='add'>+</div><div class='add'>+	idx = c_can_get_tx_head(tx_ring);</div><div class='add'>+	tx_ring-&gt;head++;</div><div class='add'>+	if (c_can_get_tx_free(priv, tx_ring) == 0)</div><div class='add'>+		netif_stop_queue(dev);</div><div class='add'>+</div><div class='add'>+	if (idx &lt; c_can_get_tx_tail(tx_ring))</div><div class='add'>+		cmd &amp;= ~IF_COMM_TXRQST; /* Cache the message */</div><div class='add'>+</div><div class='add'>+	/* Store the message in the interface so we can call</div><div class='add'>+	 * can_put_echo_skb(). We must do this before we enable</div><div class='add'>+	 * transmit as we might race against do_tx().</div><div class='add'>+	 */</div><div class='add'>+	c_can_setup_tx_object(dev, IF_TX, frame, idx);</div><div class='add'>+	can_put_echo_skb(skb, dev, idx, 0);</div><div class='add'>+	obj = idx + priv-&gt;msg_obj_tx_first;</div><div class='add'>+	c_can_object_put(dev, IF_TX, obj, cmd);</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int c_can_wait_for_ctrl_init(struct net_device *dev,</div><div class='add'>+				    struct c_can_priv *priv, u32 init)</div><div class='add'>+{</div><div class='add'>+	int retry = 0;</div><div class='add'>+</div><div class='add'>+	while (init != (priv-&gt;read_reg(priv, C_CAN_CTRL_REG) &amp; CONTROL_INIT)) {</div><div class='add'>+		udelay(10);</div><div class='add'>+		if (retry++ &gt; 1000) {</div><div class='add'>+			netdev_err(dev, "CCTRL: set CONTROL_INIT failed\n");</div><div class='add'>+			return -EIO;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int c_can_set_bittiming(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	unsigned int reg_btr, reg_brpe, ctrl_save;</div><div class='add'>+	u8 brp, brpe, sjw, tseg1, tseg2;</div><div class='add'>+	u32 ten_bit_brp;</div><div class='add'>+	struct c_can_priv *priv = netdev_priv(dev);</div><div class='add'>+	const struct can_bittiming *bt = &amp;priv-&gt;can.bittiming;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	/* c_can provides a 6-bit brp and 4-bit brpe fields */</div><div class='add'>+	ten_bit_brp = bt-&gt;brp - 1;</div><div class='add'>+	brp = ten_bit_brp &amp; BTR_BRP_MASK;</div><div class='add'>+	brpe = ten_bit_brp &gt;&gt; 6;</div><div class='add'>+</div><div class='add'>+	sjw = bt-&gt;sjw - 1;</div><div class='add'>+	tseg1 = bt-&gt;prop_seg + bt-&gt;phase_seg1 - 1;</div><div class='add'>+	tseg2 = bt-&gt;phase_seg2 - 1;</div><div class='add'>+	reg_btr = brp | (sjw &lt;&lt; BTR_SJW_SHIFT) | (tseg1 &lt;&lt; BTR_TSEG1_SHIFT) |</div><div class='add'>+			(tseg2 &lt;&lt; BTR_TSEG2_SHIFT);</div><div class='add'>+	reg_brpe = brpe &amp; BRP_EXT_BRPE_MASK;</div><div class='add'>+</div><div class='add'>+	netdev_info(dev,</div><div class='add'>+		    "setting BTR=%04x BRPE=%04x\n", reg_btr, reg_brpe);</div><div class='add'>+</div><div class='add'>+	ctrl_save = priv-&gt;read_reg(priv, C_CAN_CTRL_REG);</div><div class='add'>+	ctrl_save &amp;= ~CONTROL_INIT;</div><div class='add'>+	priv-&gt;write_reg(priv, C_CAN_CTRL_REG, CONTROL_CCE | CONTROL_INIT);</div><div class='add'>+	res = c_can_wait_for_ctrl_init(dev, priv, CONTROL_INIT);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	priv-&gt;write_reg(priv, C_CAN_BTR_REG, reg_btr);</div><div class='add'>+	priv-&gt;write_reg(priv, C_CAN_BRPEXT_REG, reg_brpe);</div><div class='add'>+	priv-&gt;write_reg(priv, C_CAN_CTRL_REG, ctrl_save);</div><div class='add'>+</div><div class='add'>+	return c_can_wait_for_ctrl_init(dev, priv, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Configure C_CAN message objects for Tx and Rx purposes:</div><div class='add'>+ * C_CAN provides a total of 32 message objects that can be configured</div><div class='add'>+ * either for Tx or Rx purposes. Here the first 16 message objects are used as</div><div class='add'>+ * a reception FIFO. The end of reception FIFO is signified by the EoB bit</div><div class='add'>+ * being SET. The remaining 16 message objects are kept aside for Tx purposes.</div><div class='add'>+ * See user guide document for further details on configuring message</div><div class='add'>+ * objects.</div><div class='add'>+ */</div><div class='add'>+static void c_can_configure_msg_objects(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct c_can_priv *priv = netdev_priv(dev);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* first invalidate all message objects */</div><div class='add'>+	for (i = priv-&gt;msg_obj_rx_first; i &lt;= priv-&gt;msg_obj_num; i++)</div><div class='add'>+		c_can_inval_msg_object(dev, IF_NAPI, i);</div><div class='add'>+</div><div class='add'>+	/* setup receive message objects */</div><div class='add'>+	for (i = priv-&gt;msg_obj_rx_first; i &lt; priv-&gt;msg_obj_rx_last; i++)</div><div class='add'>+		c_can_setup_receive_object(dev, IF_NAPI, i, 0, 0, IF_MCONT_RCV);</div><div class='add'>+</div><div class='add'>+	c_can_setup_receive_object(dev, IF_NAPI, priv-&gt;msg_obj_rx_last, 0, 0,</div><div class='add'>+				   IF_MCONT_RCV_EOB);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int c_can_software_reset(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct c_can_priv *priv = netdev_priv(dev);</div><div class='add'>+	int retry = 0;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;type != BOSCH_D_CAN)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	priv-&gt;write_reg(priv, C_CAN_CTRL_REG, CONTROL_SWR | CONTROL_INIT);</div><div class='add'>+	while (priv-&gt;read_reg(priv, C_CAN_CTRL_REG) &amp; CONTROL_SWR) {</div><div class='add'>+		msleep(20);</div><div class='add'>+		if (retry++ &gt; 100) {</div><div class='add'>+			netdev_err(dev, "CCTRL: software reset failed\n");</div><div class='add'>+			return -EIO;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Configure C_CAN chip:</div><div class='add'>+ * - enable/disable auto-retransmission</div><div class='add'>+ * - set operating mode</div><div class='add'>+ * - configure message objects</div><div class='add'>+ */</div><div class='add'>+static int c_can_chip_config(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct c_can_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct c_can_tx_ring *tx_ring = &amp;priv-&gt;tx;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = c_can_software_reset(dev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* enable automatic retransmission */</div><div class='add'>+	priv-&gt;write_reg(priv, C_CAN_CTRL_REG, CONTROL_ENABLE_AR);</div><div class='add'>+</div><div class='add'>+	if ((priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LISTENONLY) &amp;&amp;</div><div class='add'>+	    (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LOOPBACK)) {</div><div class='add'>+		/* loopback + silent mode : useful for hot self-test */</div><div class='add'>+		priv-&gt;write_reg(priv, C_CAN_CTRL_REG, CONTROL_TEST);</div><div class='add'>+		priv-&gt;write_reg(priv, C_CAN_TEST_REG, TEST_LBACK | TEST_SILENT);</div><div class='add'>+	} else if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LOOPBACK) {</div><div class='add'>+		/* loopback mode : useful for self-test function */</div><div class='add'>+		priv-&gt;write_reg(priv, C_CAN_CTRL_REG, CONTROL_TEST);</div><div class='add'>+		priv-&gt;write_reg(priv, C_CAN_TEST_REG, TEST_LBACK);</div><div class='add'>+	} else if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LISTENONLY) {</div><div class='add'>+		/* silent mode : bus-monitoring mode */</div><div class='add'>+		priv-&gt;write_reg(priv, C_CAN_CTRL_REG, CONTROL_TEST);</div><div class='add'>+		priv-&gt;write_reg(priv, C_CAN_TEST_REG, TEST_SILENT);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* configure message objects */</div><div class='add'>+	c_can_configure_msg_objects(dev);</div><div class='add'>+</div><div class='add'>+	/* set a `lec` value so that we can check for updates later */</div><div class='add'>+	priv-&gt;write_reg(priv, C_CAN_STS_REG, LEC_UNUSED);</div><div class='add'>+</div><div class='add'>+	/* Clear all internal status */</div><div class='add'>+	tx_ring-&gt;head = 0;</div><div class='add'>+	tx_ring-&gt;tail = 0;</div><div class='add'>+	priv-&gt;tx_dir = 0;</div><div class='add'>+</div><div class='add'>+	/* set bittiming params */</div><div class='add'>+	return c_can_set_bittiming(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int c_can_start(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct c_can_priv *priv = netdev_priv(dev);</div><div class='add'>+	int err;</div><div class='add'>+	struct pinctrl *p;</div><div class='add'>+</div><div class='add'>+	/* basic c_can configuration */</div><div class='add'>+	err = c_can_chip_config(dev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Setup the command for new messages */</div><div class='add'>+	priv-&gt;comm_rcv_high = priv-&gt;type != BOSCH_D_CAN ?</div><div class='add'>+		IF_COMM_RCV_LOW : IF_COMM_RCV_HIGH;</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+</div><div class='add'>+	/* Attempt to use "active" if available else use "default" */</div><div class='add'>+	p = pinctrl_get_select(priv-&gt;device, "active");</div><div class='add'>+	if (!IS_ERR(p))</div><div class='add'>+		pinctrl_put(p);</div><div class='add'>+	else</div><div class='add'>+		pinctrl_pm_select_default_state(priv-&gt;device);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void c_can_stop(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct c_can_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	c_can_irq_control(priv, false);</div><div class='add'>+</div><div class='add'>+	/* put ctrl to init on stop to end ongoing transmission */</div><div class='add'>+	priv-&gt;write_reg(priv, C_CAN_CTRL_REG, CONTROL_INIT);</div><div class='add'>+</div><div class='add'>+	/* deactivate pins */</div><div class='add'>+	pinctrl_pm_select_sleep_state(dev-&gt;dev.parent);</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int c_can_set_mode(struct net_device *dev, enum can_mode mode)</div><div class='add'>+{</div><div class='add'>+	struct c_can_priv *priv = netdev_priv(dev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case CAN_MODE_START:</div><div class='add'>+		err = c_can_start(dev);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+		netif_wake_queue(dev);</div><div class='add'>+		c_can_irq_control(priv, true);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __c_can_get_berr_counter(const struct net_device *dev,</div><div class='add'>+				    struct can_berr_counter *bec)</div><div class='add'>+{</div><div class='add'>+	unsigned int reg_err_counter;</div><div class='add'>+	struct c_can_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	reg_err_counter = priv-&gt;read_reg(priv, C_CAN_ERR_CNT_REG);</div><div class='add'>+	bec-&gt;rxerr = (reg_err_counter &amp; ERR_CNT_REC_MASK) &gt;&gt;</div><div class='add'>+				ERR_CNT_REC_SHIFT;</div><div class='add'>+	bec-&gt;txerr = reg_err_counter &amp; ERR_CNT_TEC_MASK;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int c_can_get_berr_counter(const struct net_device *dev,</div><div class='add'>+				  struct can_berr_counter *bec)</div><div class='add'>+{</div><div class='add'>+	struct c_can_priv *priv = netdev_priv(dev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	c_can_pm_runtime_get_sync(priv);</div><div class='add'>+	err = __c_can_get_berr_counter(dev, bec);</div><div class='add'>+	c_can_pm_runtime_put_sync(priv);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void c_can_do_tx(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct c_can_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct c_can_tx_ring *tx_ring = &amp;priv-&gt;tx;</div><div class='add'>+	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='add'>+	u32 idx, obj, pkts = 0, bytes = 0, pend;</div><div class='add'>+	u8 tail;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;msg_obj_tx_last &gt; 32)</div><div class='add'>+		pend = priv-&gt;read_reg32(priv, C_CAN_INTPND3_REG);</div><div class='add'>+	else</div><div class='add'>+		pend = priv-&gt;read_reg(priv, C_CAN_INTPND2_REG);</div><div class='add'>+</div><div class='add'>+	while ((idx = ffs(pend))) {</div><div class='add'>+		idx--;</div><div class='add'>+		pend &amp;= ~BIT(idx);</div><div class='add'>+		obj = idx + priv-&gt;msg_obj_tx_first;</div><div class='add'>+</div><div class='add'>+		/* We use IF_NAPI interface instead of IF_TX because we</div><div class='add'>+		 * are called from c_can_poll(), which runs inside</div><div class='add'>+		 * NAPI. We are not transmitting.</div><div class='add'>+		 */</div><div class='add'>+		c_can_inval_tx_object(dev, IF_NAPI, obj);</div><div class='add'>+		bytes += can_get_echo_skb(dev, idx, NULL);</div><div class='add'>+		pkts++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!pkts)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	tx_ring-&gt;tail += pkts;</div><div class='add'>+	if (c_can_get_tx_free(priv, tx_ring)) {</div><div class='add'>+		/* Make sure that anybody stopping the queue after</div><div class='add'>+		 * this sees the new tx_ring-&gt;tail.</div><div class='add'>+		 */</div><div class='add'>+		smp_mb();</div><div class='add'>+		netif_wake_queue(priv-&gt;dev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	stats-&gt;tx_bytes += bytes;</div><div class='add'>+	stats-&gt;tx_packets += pkts;</div><div class='add'>+</div><div class='add'>+	tail = c_can_get_tx_tail(tx_ring);</div><div class='add'>+	if (priv-&gt;type == BOSCH_D_CAN &amp;&amp; tail == 0) {</div><div class='add'>+		u8 head = c_can_get_tx_head(tx_ring);</div><div class='add'>+</div><div class='add'>+		/* Start transmission for all cached messages */</div><div class='add'>+		for (idx = tail; idx &lt; head; idx++) {</div><div class='add'>+			obj = idx + priv-&gt;msg_obj_tx_first;</div><div class='add'>+			c_can_object_put(dev, IF_NAPI, obj, IF_COMM_TXRQST);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* If we have a gap in the pending bits, that means we either</div><div class='add'>+ * raced with the hardware or failed to readout all upper</div><div class='add'>+ * objects in the last run due to quota limit.</div><div class='add'>+ */</div><div class='add'>+static u32 c_can_adjust_pending(u32 pend, u32 rx_mask)</div><div class='add'>+{</div><div class='add'>+	u32 weight, lasts;</div><div class='add'>+</div><div class='add'>+	if (pend == rx_mask)</div><div class='add'>+		return pend;</div><div class='add'>+</div><div class='add'>+	/* If the last set bit is larger than the number of pending</div><div class='add'>+	 * bits we have a gap.</div><div class='add'>+	 */</div><div class='add'>+	weight = hweight32(pend);</div><div class='add'>+	lasts = fls(pend);</div><div class='add'>+</div><div class='add'>+	/* If the bits are linear, nothing to do */</div><div class='add'>+	if (lasts == weight)</div><div class='add'>+		return pend;</div><div class='add'>+</div><div class='add'>+	/* Find the first set bit after the gap. We walk backwards</div><div class='add'>+	 * from the last set bit.</div><div class='add'>+	 */</div><div class='add'>+	for (lasts--; pend &amp; BIT(lasts - 1); lasts--)</div><div class='add'>+		;</div><div class='add'>+</div><div class='add'>+	return pend &amp; ~GENMASK(lasts - 1, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void c_can_rx_object_get(struct net_device *dev,</div><div class='add'>+				       struct c_can_priv *priv, u32 obj)</div><div class='add'>+{</div><div class='add'>+	c_can_object_get(dev, IF_NAPI, obj, priv-&gt;comm_rcv_high);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void c_can_rx_finalize(struct net_device *dev,</div><div class='add'>+				     struct c_can_priv *priv, u32 obj)</div><div class='add'>+{</div><div class='add'>+	if (priv-&gt;type != BOSCH_D_CAN)</div><div class='add'>+		c_can_object_get(dev, IF_NAPI, obj, IF_COMM_CLR_NEWDAT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int c_can_read_objects(struct net_device *dev, struct c_can_priv *priv,</div><div class='add'>+			      u32 pend, int quota)</div><div class='add'>+{</div><div class='add'>+	u32 pkts = 0, ctrl, obj;</div><div class='add'>+</div><div class='add'>+	while ((obj = ffs(pend)) &amp;&amp; quota &gt; 0) {</div><div class='add'>+		pend &amp;= ~BIT(obj - 1);</div><div class='add'>+</div><div class='add'>+		c_can_rx_object_get(dev, priv, obj);</div><div class='add'>+		ctrl = priv-&gt;read_reg(priv, C_CAN_IFACE(MSGCTRL_REG, IF_NAPI));</div><div class='add'>+</div><div class='add'>+		if (ctrl &amp; IF_MCONT_MSGLST) {</div><div class='add'>+			int n;</div><div class='add'>+</div><div class='add'>+			n = c_can_handle_lost_msg_obj(dev, IF_NAPI, obj, ctrl);</div><div class='add'>+</div><div class='add'>+			pkts += n;</div><div class='add'>+			quota -= n;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* This really should not happen, but this covers some</div><div class='add'>+		 * odd HW behaviour. Do not remove that unless you</div><div class='add'>+		 * want to brick your machine.</div><div class='add'>+		 */</div><div class='add'>+		if (!(ctrl &amp; IF_MCONT_NEWDAT))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* read the data from the message object */</div><div class='add'>+		c_can_read_msg_object(dev, IF_NAPI, ctrl);</div><div class='add'>+</div><div class='add'>+		c_can_rx_finalize(dev, priv, obj);</div><div class='add'>+</div><div class='add'>+		pkts++;</div><div class='add'>+		quota--;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return pkts;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 c_can_get_pending(struct c_can_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 pend;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;msg_obj_rx_last &gt; 16)</div><div class='add'>+		pend = priv-&gt;read_reg32(priv, C_CAN_NEWDAT1_REG);</div><div class='add'>+	else</div><div class='add'>+		pend = priv-&gt;read_reg(priv, C_CAN_NEWDAT1_REG);</div><div class='add'>+</div><div class='add'>+	return pend;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* theory of operation:</div><div class='add'>+ *</div><div class='add'>+ * c_can core saves a received CAN message into the first free message</div><div class='add'>+ * object it finds free (starting with the lowest). Bits NEWDAT and</div><div class='add'>+ * INTPND are set for this message object indicating that a new message</div><div class='add'>+ * has arrived.</div><div class='add'>+ *</div><div class='add'>+ * We clear the newdat bit right away.</div><div class='add'>+ *</div><div class='add'>+ * This can result in packet reordering when the readout is slow.</div><div class='add'>+ */</div><div class='add'>+static int c_can_do_rx_poll(struct net_device *dev, int quota)</div><div class='add'>+{</div><div class='add'>+	struct c_can_priv *priv = netdev_priv(dev);</div><div class='add'>+	u32 pkts = 0, pend = 0, toread, n;</div><div class='add'>+</div><div class='add'>+	while (quota &gt; 0) {</div><div class='add'>+		if (!pend) {</div><div class='add'>+			pend = c_can_get_pending(priv);</div><div class='add'>+			if (!pend)</div><div class='add'>+				break;</div><div class='add'>+			/* If the pending field has a gap, handle the</div><div class='add'>+			 * bits above the gap first.</div><div class='add'>+			 */</div><div class='add'>+			toread = c_can_adjust_pending(pend,</div><div class='add'>+						      priv-&gt;msg_obj_rx_mask);</div><div class='add'>+		} else {</div><div class='add'>+			toread = pend;</div><div class='add'>+		}</div><div class='add'>+		/* Remove the bits from pend */</div><div class='add'>+		pend &amp;= ~toread;</div><div class='add'>+		/* Read the objects */</div><div class='add'>+		n = c_can_read_objects(dev, priv, toread, quota);</div><div class='add'>+		pkts += n;</div><div class='add'>+		quota -= n;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return pkts;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int c_can_handle_state_change(struct net_device *dev,</div><div class='add'>+				     enum c_can_bus_error_types error_type)</div><div class='add'>+{</div><div class='add'>+	unsigned int reg_err_counter;</div><div class='add'>+	unsigned int rx_err_passive;</div><div class='add'>+	struct c_can_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct can_berr_counter bec;</div><div class='add'>+</div><div class='add'>+	switch (error_type) {</div><div class='add'>+	case C_CAN_NO_ERROR:</div><div class='add'>+		priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+		break;</div><div class='add'>+	case C_CAN_ERROR_WARNING:</div><div class='add'>+		/* error warning state */</div><div class='add'>+		priv-&gt;can.can_stats.error_warning++;</div><div class='add'>+		priv-&gt;can.state = CAN_STATE_ERROR_WARNING;</div><div class='add'>+		break;</div><div class='add'>+	case C_CAN_ERROR_PASSIVE:</div><div class='add'>+		/* error passive state */</div><div class='add'>+		priv-&gt;can.can_stats.error_passive++;</div><div class='add'>+		priv-&gt;can.state = CAN_STATE_ERROR_PASSIVE;</div><div class='add'>+		break;</div><div class='add'>+	case C_CAN_BUS_OFF:</div><div class='add'>+		/* bus-off state */</div><div class='add'>+		priv-&gt;can.state = CAN_STATE_BUS_OFF;</div><div class='add'>+		priv-&gt;can.can_stats.bus_off++;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* propagate the error condition to the CAN stack */</div><div class='add'>+	skb = alloc_can_err_skb(dev, &amp;cf);</div><div class='add'>+	if (unlikely(!skb))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	__c_can_get_berr_counter(dev, &amp;bec);</div><div class='add'>+	reg_err_counter = priv-&gt;read_reg(priv, C_CAN_ERR_CNT_REG);</div><div class='add'>+	rx_err_passive = (reg_err_counter &amp; ERR_CNT_RP_MASK) &gt;&gt;</div><div class='add'>+				ERR_CNT_RP_SHIFT;</div><div class='add'>+</div><div class='add'>+	switch (error_type) {</div><div class='add'>+	case C_CAN_NO_ERROR:</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_CRTL | CAN_ERR_CNT;</div><div class='add'>+		cf-&gt;data[1] = CAN_ERR_CRTL_ACTIVE;</div><div class='add'>+		cf-&gt;data[6] = bec.txerr;</div><div class='add'>+		cf-&gt;data[7] = bec.rxerr;</div><div class='add'>+		break;</div><div class='add'>+	case C_CAN_ERROR_WARNING:</div><div class='add'>+		/* error warning state */</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_CRTL | CAN_ERR_CNT;</div><div class='add'>+		cf-&gt;data[1] = (bec.txerr &gt; bec.rxerr) ?</div><div class='add'>+			CAN_ERR_CRTL_TX_WARNING :</div><div class='add'>+			CAN_ERR_CRTL_RX_WARNING;</div><div class='add'>+		cf-&gt;data[6] = bec.txerr;</div><div class='add'>+		cf-&gt;data[7] = bec.rxerr;</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+	case C_CAN_ERROR_PASSIVE:</div><div class='add'>+		/* error passive state */</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_CRTL | CAN_ERR_CNT;</div><div class='add'>+		if (rx_err_passive)</div><div class='add'>+			cf-&gt;data[1] |= CAN_ERR_CRTL_RX_PASSIVE;</div><div class='add'>+		if (bec.txerr &gt; 127)</div><div class='add'>+			cf-&gt;data[1] |= CAN_ERR_CRTL_TX_PASSIVE;</div><div class='add'>+</div><div class='add'>+		cf-&gt;data[6] = bec.txerr;</div><div class='add'>+		cf-&gt;data[7] = bec.rxerr;</div><div class='add'>+		break;</div><div class='add'>+	case C_CAN_BUS_OFF:</div><div class='add'>+		/* bus-off state */</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_BUSOFF;</div><div class='add'>+		can_bus_off(dev);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netif_receive_skb(skb);</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int c_can_handle_bus_err(struct net_device *dev,</div><div class='add'>+				enum c_can_lec_type lec_type)</div><div class='add'>+{</div><div class='add'>+	struct c_can_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	/* early exit if no lec update or no error.</div><div class='add'>+	 * no lec update means that no CAN bus event has been detected</div><div class='add'>+	 * since CPU wrote 0x7 value to status reg.</div><div class='add'>+	 */</div><div class='add'>+	if (lec_type == LEC_UNUSED || lec_type == LEC_NO_ERROR)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (!(priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* common for all type of bus errors */</div><div class='add'>+	priv-&gt;can.can_stats.bus_error++;</div><div class='add'>+</div><div class='add'>+	/* propagate the error condition to the CAN stack */</div><div class='add'>+	skb = alloc_can_err_skb(dev, &amp;cf);</div><div class='add'>+</div><div class='add'>+	/* check for 'last error code' which tells us the</div><div class='add'>+	 * type of the last error to occur on the CAN bus</div><div class='add'>+	 */</div><div class='add'>+	if (likely(skb))</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='add'>+</div><div class='add'>+	switch (lec_type) {</div><div class='add'>+	case LEC_STUFF_ERROR:</div><div class='add'>+		netdev_dbg(dev, "stuff error\n");</div><div class='add'>+		if (likely(skb))</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+		break;</div><div class='add'>+	case LEC_FORM_ERROR:</div><div class='add'>+		netdev_dbg(dev, "form error\n");</div><div class='add'>+		if (likely(skb))</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+		break;</div><div class='add'>+	case LEC_ACK_ERROR:</div><div class='add'>+		netdev_dbg(dev, "ack error\n");</div><div class='add'>+		if (likely(skb))</div><div class='add'>+			cf-&gt;data[3] = CAN_ERR_PROT_LOC_ACK;</div><div class='add'>+		stats-&gt;tx_errors++;</div><div class='add'>+		break;</div><div class='add'>+	case LEC_BIT1_ERROR:</div><div class='add'>+		netdev_dbg(dev, "bit1 error\n");</div><div class='add'>+		if (likely(skb))</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_BIT1;</div><div class='add'>+		stats-&gt;tx_errors++;</div><div class='add'>+		break;</div><div class='add'>+	case LEC_BIT0_ERROR:</div><div class='add'>+		netdev_dbg(dev, "bit0 error\n");</div><div class='add'>+		if (likely(skb))</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_BIT0;</div><div class='add'>+		stats-&gt;tx_errors++;</div><div class='add'>+		break;</div><div class='add'>+	case LEC_CRC_ERROR:</div><div class='add'>+		netdev_dbg(dev, "CRC error\n");</div><div class='add'>+		if (likely(skb))</div><div class='add'>+			cf-&gt;data[3] = CAN_ERR_PROT_LOC_CRC_SEQ;</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (unlikely(!skb))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	netif_receive_skb(skb);</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int c_can_poll(struct napi_struct *napi, int quota)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = napi-&gt;dev;</div><div class='add'>+	struct c_can_priv *priv = netdev_priv(dev);</div><div class='add'>+	u16 curr, last = priv-&gt;last_status;</div><div class='add'>+	int work_done = 0;</div><div class='add'>+</div><div class='add'>+	/* Only read the status register if a status interrupt was pending */</div><div class='add'>+	if (atomic_xchg(&amp;priv-&gt;sie_pending, 0)) {</div><div class='add'>+		priv-&gt;last_status = priv-&gt;read_reg(priv, C_CAN_STS_REG);</div><div class='add'>+		curr = priv-&gt;last_status;</div><div class='add'>+		/* Ack status on C_CAN. D_CAN is self clearing */</div><div class='add'>+		if (priv-&gt;type != BOSCH_D_CAN)</div><div class='add'>+			priv-&gt;write_reg(priv, C_CAN_STS_REG, LEC_UNUSED);</div><div class='add'>+	} else {</div><div class='add'>+		/* no change detected ... */</div><div class='add'>+		curr = last;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* handle state changes */</div><div class='add'>+	if ((curr &amp; STATUS_EWARN) &amp;&amp; (!(last &amp; STATUS_EWARN))) {</div><div class='add'>+		netdev_dbg(dev, "entered error warning state\n");</div><div class='add'>+		work_done += c_can_handle_state_change(dev, C_CAN_ERROR_WARNING);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((curr &amp; STATUS_EPASS) &amp;&amp; (!(last &amp; STATUS_EPASS))) {</div><div class='add'>+		netdev_dbg(dev, "entered error passive state\n");</div><div class='add'>+		work_done += c_can_handle_state_change(dev, C_CAN_ERROR_PASSIVE);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((curr &amp; STATUS_BOFF) &amp;&amp; (!(last &amp; STATUS_BOFF))) {</div><div class='add'>+		netdev_dbg(dev, "entered bus off state\n");</div><div class='add'>+		work_done += c_can_handle_state_change(dev, C_CAN_BUS_OFF);</div><div class='add'>+		goto end;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* handle bus recovery events */</div><div class='add'>+	if ((!(curr &amp; STATUS_BOFF)) &amp;&amp; (last &amp; STATUS_BOFF)) {</div><div class='add'>+		netdev_dbg(dev, "left bus off state\n");</div><div class='add'>+		work_done += c_can_handle_state_change(dev, C_CAN_ERROR_PASSIVE);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((!(curr &amp; STATUS_EPASS)) &amp;&amp; (last &amp; STATUS_EPASS)) {</div><div class='add'>+		netdev_dbg(dev, "left error passive state\n");</div><div class='add'>+		work_done += c_can_handle_state_change(dev, C_CAN_ERROR_WARNING);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((!(curr &amp; STATUS_EWARN)) &amp;&amp; (last &amp; STATUS_EWARN)) {</div><div class='add'>+		netdev_dbg(dev, "left error warning state\n");</div><div class='add'>+		work_done += c_can_handle_state_change(dev, C_CAN_NO_ERROR);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* handle lec errors on the bus */</div><div class='add'>+	work_done += c_can_handle_bus_err(dev, curr &amp; LEC_MASK);</div><div class='add'>+</div><div class='add'>+	/* Handle Tx/Rx events. We do this unconditionally */</div><div class='add'>+	work_done += c_can_do_rx_poll(dev, (quota - work_done));</div><div class='add'>+	c_can_do_tx(dev);</div><div class='add'>+</div><div class='add'>+end:</div><div class='add'>+	if (work_done &lt; quota) {</div><div class='add'>+		napi_complete_done(napi, work_done);</div><div class='add'>+		/* enable all IRQs if we are not in bus off state */</div><div class='add'>+		if (priv-&gt;can.state != CAN_STATE_BUS_OFF)</div><div class='add'>+			c_can_irq_control(priv, true);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return work_done;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t c_can_isr(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = (struct net_device *)dev_id;</div><div class='add'>+	struct c_can_priv *priv = netdev_priv(dev);</div><div class='add'>+	int reg_int;</div><div class='add'>+</div><div class='add'>+	reg_int = priv-&gt;read_reg(priv, C_CAN_INT_REG);</div><div class='add'>+	if (!reg_int)</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+</div><div class='add'>+	/* save for later use */</div><div class='add'>+	if (reg_int &amp; INT_STS_PENDING)</div><div class='add'>+		atomic_set(&amp;priv-&gt;sie_pending, 1);</div><div class='add'>+</div><div class='add'>+	/* disable all interrupts and schedule the NAPI */</div><div class='add'>+	c_can_irq_control(priv, false);</div><div class='add'>+	napi_schedule(&amp;priv-&gt;napi);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int c_can_open(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	struct c_can_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	c_can_pm_runtime_get_sync(priv);</div><div class='add'>+	c_can_reset_ram(priv, true);</div><div class='add'>+</div><div class='add'>+	/* open the can device */</div><div class='add'>+	err = open_candev(dev);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(dev, "failed to open can device\n");</div><div class='add'>+		goto exit_open_fail;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* register interrupt handler */</div><div class='add'>+	err = request_irq(dev-&gt;irq, &amp;c_can_isr, IRQF_SHARED, dev-&gt;name,</div><div class='add'>+			  dev);</div><div class='add'>+	if (err &lt; 0) {</div><div class='add'>+		netdev_err(dev, "failed to request interrupt\n");</div><div class='add'>+		goto exit_irq_fail;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* start the c_can controller */</div><div class='add'>+	err = c_can_start(dev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto exit_start_fail;</div><div class='add'>+</div><div class='add'>+	napi_enable(&amp;priv-&gt;napi);</div><div class='add'>+	/* enable status change, error and module interrupts */</div><div class='add'>+	c_can_irq_control(priv, true);</div><div class='add'>+	netif_start_queue(dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+exit_start_fail:</div><div class='add'>+	free_irq(dev-&gt;irq, dev);</div><div class='add'>+exit_irq_fail:</div><div class='add'>+	close_candev(dev);</div><div class='add'>+exit_open_fail:</div><div class='add'>+	c_can_reset_ram(priv, false);</div><div class='add'>+	c_can_pm_runtime_put_sync(priv);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int c_can_close(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct c_can_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(dev);</div><div class='add'>+	napi_disable(&amp;priv-&gt;napi);</div><div class='add'>+	c_can_stop(dev);</div><div class='add'>+	free_irq(dev-&gt;irq, dev);</div><div class='add'>+	close_candev(dev);</div><div class='add'>+</div><div class='add'>+	c_can_reset_ram(priv, false);</div><div class='add'>+	c_can_pm_runtime_put_sync(priv);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct net_device *alloc_c_can_dev(int msg_obj_num)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev;</div><div class='add'>+	struct c_can_priv *priv;</div><div class='add'>+	int msg_obj_tx_num = msg_obj_num / 2;</div><div class='add'>+</div><div class='add'>+	dev = alloc_candev(sizeof(*priv), msg_obj_tx_num);</div><div class='add'>+	if (!dev)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	priv = netdev_priv(dev);</div><div class='add'>+	priv-&gt;msg_obj_num = msg_obj_num;</div><div class='add'>+	priv-&gt;msg_obj_rx_num = msg_obj_num - msg_obj_tx_num;</div><div class='add'>+	priv-&gt;msg_obj_rx_first = 1;</div><div class='add'>+	priv-&gt;msg_obj_rx_last =</div><div class='add'>+		priv-&gt;msg_obj_rx_first + priv-&gt;msg_obj_rx_num - 1;</div><div class='add'>+	priv-&gt;msg_obj_rx_mask = GENMASK(priv-&gt;msg_obj_rx_num - 1, 0);</div><div class='add'>+</div><div class='add'>+	priv-&gt;msg_obj_tx_num = msg_obj_tx_num;</div><div class='add'>+	priv-&gt;msg_obj_tx_first = priv-&gt;msg_obj_rx_last + 1;</div><div class='add'>+	priv-&gt;msg_obj_tx_last =</div><div class='add'>+		priv-&gt;msg_obj_tx_first + priv-&gt;msg_obj_tx_num - 1;</div><div class='add'>+</div><div class='add'>+	priv-&gt;tx.head = 0;</div><div class='add'>+	priv-&gt;tx.tail = 0;</div><div class='add'>+	priv-&gt;tx.obj_num = msg_obj_tx_num;</div><div class='add'>+</div><div class='add'>+	netif_napi_add_weight(dev, &amp;priv-&gt;napi, c_can_poll,</div><div class='add'>+			      priv-&gt;msg_obj_rx_num);</div><div class='add'>+</div><div class='add'>+	priv-&gt;dev = dev;</div><div class='add'>+	priv-&gt;can.bittiming_const = &amp;c_can_bittiming_const;</div><div class='add'>+	priv-&gt;can.do_set_mode = c_can_set_mode;</div><div class='add'>+	priv-&gt;can.do_get_berr_counter = c_can_get_berr_counter;</div><div class='add'>+	priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK |</div><div class='add'>+					CAN_CTRLMODE_LISTENONLY |</div><div class='add'>+					CAN_CTRLMODE_BERR_REPORTING;</div><div class='add'>+</div><div class='add'>+	return dev;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(alloc_c_can_dev);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PM</div><div class='add'>+int c_can_power_down(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+	unsigned long time_out;</div><div class='add'>+	struct c_can_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	if (!(dev-&gt;flags &amp; IFF_UP))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	WARN_ON(priv-&gt;type != BOSCH_D_CAN);</div><div class='add'>+</div><div class='add'>+	/* set PDR value so the device goes to power down mode */</div><div class='add'>+	val = priv-&gt;read_reg(priv, C_CAN_CTRL_EX_REG);</div><div class='add'>+	val |= CONTROL_EX_PDR;</div><div class='add'>+	priv-&gt;write_reg(priv, C_CAN_CTRL_EX_REG, val);</div><div class='add'>+</div><div class='add'>+	/* Wait for the PDA bit to get set */</div><div class='add'>+	time_out = jiffies + msecs_to_jiffies(INIT_WAIT_MS);</div><div class='add'>+	while (!(priv-&gt;read_reg(priv, C_CAN_STS_REG) &amp; STATUS_PDA) &amp;&amp;</div><div class='add'>+	       time_after(time_out, jiffies))</div><div class='add'>+		cpu_relax();</div><div class='add'>+</div><div class='add'>+	if (time_after(jiffies, time_out))</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+	c_can_stop(dev);</div><div class='add'>+</div><div class='add'>+	c_can_reset_ram(priv, false);</div><div class='add'>+	c_can_pm_runtime_put_sync(priv);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(c_can_power_down);</div><div class='add'>+</div><div class='add'>+int c_can_power_up(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+	unsigned long time_out;</div><div class='add'>+	struct c_can_priv *priv = netdev_priv(dev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!(dev-&gt;flags &amp; IFF_UP))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	WARN_ON(priv-&gt;type != BOSCH_D_CAN);</div><div class='add'>+</div><div class='add'>+	c_can_pm_runtime_get_sync(priv);</div><div class='add'>+	c_can_reset_ram(priv, true);</div><div class='add'>+</div><div class='add'>+	/* Clear PDR and INIT bits */</div><div class='add'>+	val = priv-&gt;read_reg(priv, C_CAN_CTRL_EX_REG);</div><div class='add'>+	val &amp;= ~CONTROL_EX_PDR;</div><div class='add'>+	priv-&gt;write_reg(priv, C_CAN_CTRL_EX_REG, val);</div><div class='add'>+	val = priv-&gt;read_reg(priv, C_CAN_CTRL_REG);</div><div class='add'>+	val &amp;= ~CONTROL_INIT;</div><div class='add'>+	priv-&gt;write_reg(priv, C_CAN_CTRL_REG, val);</div><div class='add'>+</div><div class='add'>+	/* Wait for the PDA bit to get clear */</div><div class='add'>+	time_out = jiffies + msecs_to_jiffies(INIT_WAIT_MS);</div><div class='add'>+	while ((priv-&gt;read_reg(priv, C_CAN_STS_REG) &amp; STATUS_PDA) &amp;&amp;</div><div class='add'>+	       time_after(time_out, jiffies))</div><div class='add'>+		cpu_relax();</div><div class='add'>+</div><div class='add'>+	if (time_after(jiffies, time_out)) {</div><div class='add'>+		ret = -ETIMEDOUT;</div><div class='add'>+		goto err_out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = c_can_start(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_out;</div><div class='add'>+</div><div class='add'>+	c_can_irq_control(priv, true);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_out:</div><div class='add'>+	c_can_reset_ram(priv, false);</div><div class='add'>+	c_can_pm_runtime_put_sync(priv);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(c_can_power_up);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+void free_c_can_dev(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct c_can_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	netif_napi_del(&amp;priv-&gt;napi);</div><div class='add'>+	free_candev(dev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(free_c_can_dev);</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops c_can_netdev_ops = {</div><div class='add'>+	.ndo_open = c_can_open,</div><div class='add'>+	.ndo_stop = c_can_close,</div><div class='add'>+	.ndo_start_xmit = c_can_start_xmit,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int register_c_can_dev(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	/* Deactivate pins to prevent DRA7 DCAN IP from being</div><div class='add'>+	 * stuck in transition when module is disabled.</div><div class='add'>+	 * Pins are activated in c_can_start() and deactivated</div><div class='add'>+	 * in c_can_stop()</div><div class='add'>+	 */</div><div class='add'>+	pinctrl_pm_select_sleep_state(dev-&gt;dev.parent);</div><div class='add'>+</div><div class='add'>+	dev-&gt;flags |= IFF_ECHO;	/* we support local echo */</div><div class='add'>+	dev-&gt;netdev_ops = &amp;c_can_netdev_ops;</div><div class='add'>+	dev-&gt;ethtool_ops = &amp;c_can_ethtool_ops;</div><div class='add'>+</div><div class='add'>+	return register_candev(dev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(register_c_can_dev);</div><div class='add'>+</div><div class='add'>+void unregister_c_can_dev(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	unregister_candev(dev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(unregister_c_can_dev);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Bhupesh Sharma &lt;bhupesh.sharma@st.com&gt;");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='add'>+MODULE_DESCRIPTION("CAN bus driver for Bosch C_CAN controller");</div><div class='head'>diff --git a/drivers/net/can/c_can/c_can_pci.c b/drivers/net/can/c_can/c_can_pci.c<br/>index 7be393c96b1a..093bea597f4e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/c_can/c_can_pci.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/c_can/c_can_pci.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/c_can/c_can_pci.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/c_can/c_can_pci.c</a></div><div class='hunk'>@@ -31,6 +31,8 @@ enum c_can_pci_reg_align {</div><div class='ctx'> struct c_can_pci_data {</div><div class='ctx'> 	/* Specify if is C_CAN or D_CAN */</div><div class='ctx'> 	enum c_can_dev_id type;</div><div class='add'>+	/* Number of message objects */</div><div class='add'>+	unsigned int msg_obj_num;</div><div class='ctx'> 	/* Set the register alignment in the memory */</div><div class='ctx'> 	enum c_can_pci_reg_align reg_align;</div><div class='ctx'> 	/* Set the frequency */</div><div class='hunk'>@@ -41,32 +43,31 @@ struct c_can_pci_data {</div><div class='ctx'> 	void (*init)(const struct c_can_priv *priv, bool enable);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * 16-bit c_can registers can be arranged differently in the memory</div><div class='add'>+/* 16-bit c_can registers can be arranged differently in the memory</div><div class='ctx'>  * architecture of different implementations. For example: 16-bit</div><div class='ctx'>  * registers can be aligned to a 16-bit boundary or 32-bit boundary etc.</div><div class='ctx'>  * Handle the same by providing a common read/write interface.</div><div class='ctx'>  */</div><div class='ctx'> static u16 c_can_pci_read_reg_aligned_to_16bit(const struct c_can_priv *priv,</div><div class='del'>-						enum reg index)</div><div class='add'>+					       enum reg index)</div><div class='ctx'> {</div><div class='ctx'> 	return readw(priv-&gt;base + priv-&gt;regs[index]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void c_can_pci_write_reg_aligned_to_16bit(const struct c_can_priv *priv,</div><div class='del'>-						enum reg index, u16 val)</div><div class='add'>+						 enum reg index, u16 val)</div><div class='ctx'> {</div><div class='ctx'> 	writew(val, priv-&gt;base + priv-&gt;regs[index]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u16 c_can_pci_read_reg_aligned_to_32bit(const struct c_can_priv *priv,</div><div class='del'>-						enum reg index)</div><div class='add'>+					       enum reg index)</div><div class='ctx'> {</div><div class='ctx'> 	return readw(priv-&gt;base + 2 * priv-&gt;regs[index]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void c_can_pci_write_reg_aligned_to_32bit(const struct c_can_priv *priv,</div><div class='del'>-						enum reg index, u16 val)</div><div class='add'>+						 enum reg index, u16 val)</div><div class='ctx'> {</div><div class='ctx'> 	writew(val, priv-&gt;base + 2 * priv-&gt;regs[index]);</div><div class='ctx'> }</div><div class='hunk'>@@ -88,13 +89,13 @@ static u32 c_can_pci_read_reg32(const struct c_can_priv *priv, enum reg index)</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='ctx'> 	val = priv-&gt;read_reg(priv, index);</div><div class='del'>-	val |= ((u32) priv-&gt;read_reg(priv, index + 1)) &lt;&lt; 16;</div><div class='add'>+	val |= ((u32)priv-&gt;read_reg(priv, index + 1)) &lt;&lt; 16;</div><div class='ctx'> </div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void c_can_pci_write_reg32(const struct c_can_priv *priv, enum reg index,</div><div class='del'>-		u32 val)</div><div class='add'>+				  u32 val)</div><div class='ctx'> {</div><div class='ctx'> 	priv-&gt;write_reg(priv, index + 1, val &gt;&gt; 16);</div><div class='ctx'> 	priv-&gt;write_reg(priv, index, val);</div><div class='hunk'>@@ -142,14 +143,13 @@ static int c_can_pci_probe(struct pci_dev *pdev,</div><div class='ctx'> 			 pci_resource_len(pdev, c_can_pci_data-&gt;bar));</div><div class='ctx'> 	if (!addr) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev,</div><div class='del'>-			"device has no PCI memory resources, "</div><div class='del'>-			"failing adapter\n");</div><div class='add'>+			"device has no PCI memory resources, failing adapter\n");</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='ctx'> 		goto out_release_regions;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* allocate the c_can device */</div><div class='del'>-	dev = alloc_c_can_dev();</div><div class='add'>+	dev = alloc_c_can_dev(c_can_pci_data-&gt;msg_obj_num);</div><div class='ctx'> 	if (!dev) {</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='ctx'> 		goto out_iounmap;</div><div class='hunk'>@@ -161,6 +161,7 @@ static int c_can_pci_probe(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;irq = pdev-&gt;irq;</div><div class='ctx'> 	priv-&gt;base = addr;</div><div class='add'>+	priv-&gt;device = &amp;pdev-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 	if (!c_can_pci_data-&gt;freq) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "no clock frequency defined\n");</div><div class='hunk'>@@ -177,7 +178,6 @@ static int c_can_pci_probe(struct pci_dev *pdev,</div><div class='ctx'> 		break;</div><div class='ctx'> 	case BOSCH_D_CAN:</div><div class='ctx'> 		priv-&gt;regs = reg_map_d_can;</div><div class='del'>-		priv-&gt;can.ctrlmode_supported |= CAN_CTRLMODE_3_SAMPLES;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		ret = -EINVAL;</div><div class='hunk'>@@ -217,7 +217,7 @@ static int c_can_pci_probe(struct pci_dev *pdev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(&amp;pdev-&gt;dev, "%s device registered (regs=%p, irq=%d)\n",</div><div class='del'>-		 KBUILD_MODNAME, priv-&gt;regs, dev-&gt;irq);</div><div class='add'>+		KBUILD_MODNAME, priv-&gt;regs, dev-&gt;irq);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -227,7 +227,6 @@ out_iounmap:</div><div class='ctx'> 	pci_iounmap(pdev, addr);</div><div class='ctx'> out_release_regions:</div><div class='ctx'> 	pci_disable_msi(pdev);</div><div class='del'>-	pci_clear_master(pdev);</div><div class='ctx'> 	pci_release_regions(pdev);</div><div class='ctx'> out_disable_device:</div><div class='ctx'> 	pci_disable_device(pdev);</div><div class='hunk'>@@ -239,27 +238,29 @@ static void c_can_pci_remove(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = pci_get_drvdata(pdev);</div><div class='ctx'> 	struct c_can_priv *priv = netdev_priv(dev);</div><div class='add'>+	void __iomem *addr = priv-&gt;base;</div><div class='ctx'> </div><div class='ctx'> 	unregister_c_can_dev(dev);</div><div class='ctx'> </div><div class='ctx'> 	free_c_can_dev(dev);</div><div class='ctx'> </div><div class='del'>-	pci_iounmap(pdev, priv-&gt;base);</div><div class='add'>+	pci_iounmap(pdev, addr);</div><div class='ctx'> 	pci_disable_msi(pdev);</div><div class='del'>-	pci_clear_master(pdev);</div><div class='ctx'> 	pci_release_regions(pdev);</div><div class='ctx'> 	pci_disable_device(pdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct c_can_pci_data c_can_sta2x11= {</div><div class='add'>+static const struct c_can_pci_data c_can_sta2x11 = {</div><div class='ctx'> 	.type = BOSCH_C_CAN,</div><div class='add'>+	.msg_obj_num = 32,</div><div class='ctx'> 	.reg_align = C_CAN_REG_ALIGN_32,</div><div class='ctx'> 	.freq = 52000000, /* 52 Mhz */</div><div class='ctx'> 	.bar = 0,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct c_can_pci_data c_can_pch = {</div><div class='add'>+static const struct c_can_pci_data c_can_pch = {</div><div class='ctx'> 	.type = BOSCH_C_CAN,</div><div class='add'>+	.msg_obj_num = 32,</div><div class='ctx'> 	.reg_align = C_CAN_REG_32,</div><div class='ctx'> 	.freq = 50000000, /* 50 MHz */</div><div class='ctx'> 	.init = c_can_pci_reset_pch,</div><div class='hunk'>@@ -268,7 +269,7 @@ static struct c_can_pci_data c_can_pch = {</div><div class='ctx'> </div><div class='ctx'> #define C_CAN_ID(_vend, _dev, _driverdata) {		\</div><div class='ctx'> 	PCI_DEVICE(_vend, _dev),			\</div><div class='del'>-	.driver_data = (unsigned long)&amp;_driverdata,	\</div><div class='add'>+	.driver_data = (unsigned long)&amp;(_driverdata),	\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct pci_device_id c_can_pci_tbl[] = {</div><div class='hunk'>@@ -278,6 +279,7 @@ static const struct pci_device_id c_can_pci_tbl[] = {</div><div class='ctx'> 		 c_can_pch),</div><div class='ctx'> 	{},</div><div class='ctx'> };</div><div class='add'>+</div><div class='ctx'> static struct pci_driver c_can_pci_driver = {</div><div class='ctx'> 	.name = KBUILD_MODNAME,</div><div class='ctx'> 	.id_table = c_can_pci_tbl,</div><div class='head'>diff --git a/drivers/net/can/c_can/c_can_platform.c b/drivers/net/can/c_can/c_can_platform.c<br/>index e36d10520e24..19c86b94a40e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/c_can/c_can_platform.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/c_can/c_can_platform.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/c_can/c_can_platform.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/c_can/c_can_platform.c</a></div><div class='hunk'>@@ -29,9 +29,10 @@</div><div class='ctx'> #include &lt;linux/list.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/pm_runtime.h&gt;</div><div class='add'>+#include &lt;linux/property.h&gt;</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='del'>-#include &lt;linux/of_device.h&gt;</div><div class='ctx'> #include &lt;linux/mfd/syscon.h&gt;</div><div class='ctx'> #include &lt;linux/regmap.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -39,10 +40,11 @@</div><div class='ctx'> </div><div class='ctx'> #include "c_can.h"</div><div class='ctx'> </div><div class='del'>-#define DCAN_RAM_INIT_BIT		(1 &lt;&lt; 3)</div><div class='add'>+#define DCAN_RAM_INIT_BIT BIT(3)</div><div class='add'>+</div><div class='ctx'> static DEFINE_SPINLOCK(raminit_lock);</div><div class='del'>-/*</div><div class='del'>- * 16-bit c_can registers can be arranged differently in the memory</div><div class='add'>+</div><div class='add'>+/* 16-bit c_can registers can be arranged differently in the memory</div><div class='ctx'>  * architecture of different implementations. For example: 16-bit</div><div class='ctx'>  * registers can be aligned to a 16-bit boundary or 32-bit boundary etc.</div><div class='ctx'>  * Handle the same by providing a common read/write interface.</div><div class='hunk'>@@ -54,7 +56,7 @@ static u16 c_can_plat_read_reg_aligned_to_16bit(const struct c_can_priv *priv,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void c_can_plat_write_reg_aligned_to_16bit(const struct c_can_priv *priv,</div><div class='del'>-						enum reg index, u16 val)</div><div class='add'>+						  enum reg index, u16 val)</div><div class='ctx'> {</div><div class='ctx'> 	writew(val, priv-&gt;base + priv-&gt;regs[index]);</div><div class='ctx'> }</div><div class='hunk'>@@ -66,7 +68,7 @@ static u16 c_can_plat_read_reg_aligned_to_32bit(const struct c_can_priv *priv,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void c_can_plat_write_reg_aligned_to_32bit(const struct c_can_priv *priv,</div><div class='del'>-						enum reg index, u16 val)</div><div class='add'>+						  enum reg index, u16 val)</div><div class='ctx'> {</div><div class='ctx'> 	writew(val, priv-&gt;base + 2 * priv-&gt;regs[index]);</div><div class='ctx'> }</div><div class='hunk'>@@ -144,13 +146,13 @@ static u32 c_can_plat_read_reg32(const struct c_can_priv *priv, enum reg index)</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='ctx'> 	val = priv-&gt;read_reg(priv, index);</div><div class='del'>-	val |= ((u32) priv-&gt;read_reg(priv, index + 1)) &lt;&lt; 16;</div><div class='add'>+	val |= ((u32)priv-&gt;read_reg(priv, index + 1)) &lt;&lt; 16;</div><div class='ctx'> </div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void c_can_plat_write_reg32(const struct c_can_priv *priv, enum reg index,</div><div class='del'>-		u32 val)</div><div class='add'>+static void c_can_plat_write_reg32(const struct c_can_priv *priv,</div><div class='add'>+				   enum reg index, u32 val)</div><div class='ctx'> {</div><div class='ctx'> 	priv-&gt;write_reg(priv, index + 1, val &gt;&gt; 16);</div><div class='ctx'> 	priv-&gt;write_reg(priv, index, val);</div><div class='hunk'>@@ -161,8 +163,8 @@ static u32 d_can_plat_read_reg32(const struct c_can_priv *priv, enum reg index)</div><div class='ctx'> 	return readl(priv-&gt;base + priv-&gt;regs[index]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void d_can_plat_write_reg32(const struct c_can_priv *priv, enum reg index,</div><div class='del'>-		u32 val)</div><div class='add'>+static void d_can_plat_write_reg32(const struct c_can_priv *priv,</div><div class='add'>+				   enum reg index, u32 val)</div><div class='ctx'> {</div><div class='ctx'> 	writel(val, priv-&gt;base + priv-&gt;regs[index]);</div><div class='ctx'> }</div><div class='hunk'>@@ -191,10 +193,12 @@ static void c_can_hw_raminit(const struct c_can_priv *priv, bool enable)</div><div class='ctx'> </div><div class='ctx'> static const struct c_can_driver_data c_can_drvdata = {</div><div class='ctx'> 	.id = BOSCH_C_CAN,</div><div class='add'>+	.msg_obj_num = 32,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct c_can_driver_data d_can_drvdata = {</div><div class='ctx'> 	.id = BOSCH_D_CAN,</div><div class='add'>+	.msg_obj_num = 32,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct raminit_bits dra7_raminit_bits[] = {</div><div class='hunk'>@@ -204,6 +208,7 @@ static const struct raminit_bits dra7_raminit_bits[] = {</div><div class='ctx'> </div><div class='ctx'> static const struct c_can_driver_data dra7_dcan_drvdata = {</div><div class='ctx'> 	.id = BOSCH_D_CAN,</div><div class='add'>+	.msg_obj_num = 64,</div><div class='ctx'> 	.raminit_num = ARRAY_SIZE(dra7_raminit_bits),</div><div class='ctx'> 	.raminit_bits = dra7_raminit_bits,</div><div class='ctx'> 	.raminit_pulse = true,</div><div class='hunk'>@@ -216,11 +221,12 @@ static const struct raminit_bits am3352_raminit_bits[] = {</div><div class='ctx'> </div><div class='ctx'> static const struct c_can_driver_data am3352_dcan_drvdata = {</div><div class='ctx'> 	.id = BOSCH_D_CAN,</div><div class='add'>+	.msg_obj_num = 64,</div><div class='ctx'> 	.raminit_num = ARRAY_SIZE(am3352_raminit_bits),</div><div class='ctx'> 	.raminit_bits = am3352_raminit_bits,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct platform_device_id c_can_id_table[] = {</div><div class='add'>+static const struct platform_device_id c_can_id_table[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		.name = KBUILD_MODNAME,</div><div class='ctx'> 		.driver_data = (kernel_ulong_t)&amp;c_can_drvdata,</div><div class='hunk'>@@ -253,50 +259,32 @@ static int c_can_plat_probe(struct platform_device *pdev)</div><div class='ctx'> 	void __iomem *addr;</div><div class='ctx'> 	struct net_device *dev;</div><div class='ctx'> 	struct c_can_priv *priv;</div><div class='del'>-	const struct of_device_id *match;</div><div class='ctx'> 	struct resource *mem;</div><div class='ctx'> 	int irq;</div><div class='ctx'> 	struct clk *clk;</div><div class='ctx'> 	const struct c_can_driver_data *drvdata;</div><div class='ctx'> 	struct device_node *np = pdev-&gt;dev.of_node;</div><div class='ctx'> </div><div class='del'>-	match = of_match_device(c_can_of_table, &amp;pdev-&gt;dev);</div><div class='del'>-	if (match) {</div><div class='del'>-		drvdata = match-&gt;data;</div><div class='del'>-	} else if (pdev-&gt;id_entry-&gt;driver_data) {</div><div class='del'>-		drvdata = (struct c_can_driver_data *)</div><div class='del'>-			platform_get_device_id(pdev)-&gt;driver_data;</div><div class='del'>-	} else {</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='add'>+	drvdata = device_get_match_data(&amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	/* get the appropriate clk */</div><div class='ctx'> 	clk = devm_clk_get(&amp;pdev-&gt;dev, NULL);</div><div class='del'>-	if (IS_ERR(clk)) {</div><div class='del'>-		ret = PTR_ERR(clk);</div><div class='del'>-		goto exit;</div><div class='del'>-	}</div><div class='add'>+	if (IS_ERR(clk))</div><div class='add'>+		return PTR_ERR(clk);</div><div class='ctx'> </div><div class='ctx'> 	/* get the platform data */</div><div class='ctx'> 	irq = platform_get_irq(pdev, 0);</div><div class='del'>-	if (irq &lt;= 0) {</div><div class='del'>-		ret = -ENODEV;</div><div class='del'>-		goto exit;</div><div class='del'>-	}</div><div class='add'>+	if (irq &lt; 0)</div><div class='add'>+		return irq;</div><div class='ctx'> </div><div class='del'>-	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='del'>-	addr = devm_ioremap_resource(&amp;pdev-&gt;dev, mem);</div><div class='del'>-	if (IS_ERR(addr)) {</div><div class='del'>-		ret =  PTR_ERR(addr);</div><div class='del'>-		goto exit;</div><div class='del'>-	}</div><div class='add'>+	addr = devm_platform_get_and_ioremap_resource(pdev, 0, &amp;mem);</div><div class='add'>+	if (IS_ERR(addr))</div><div class='add'>+		return PTR_ERR(addr);</div><div class='ctx'> </div><div class='ctx'> 	/* allocate the c_can device */</div><div class='del'>-	dev = alloc_c_can_dev();</div><div class='del'>-	if (!dev) {</div><div class='del'>-		ret = -ENOMEM;</div><div class='del'>-		goto exit;</div><div class='del'>-	}</div><div class='add'>+	dev = alloc_c_can_dev(drvdata-&gt;msg_obj_num);</div><div class='add'>+	if (!dev)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	priv = netdev_priv(dev);</div><div class='ctx'> 	switch (drvdata-&gt;id) {</div><div class='hunk'>@@ -320,7 +308,6 @@ static int c_can_plat_probe(struct platform_device *pdev)</div><div class='ctx'> 		break;</div><div class='ctx'> 	case BOSCH_D_CAN:</div><div class='ctx'> 		priv-&gt;regs = reg_map_d_can;</div><div class='del'>-		priv-&gt;can.ctrlmode_supported |= CAN_CTRLMODE_3_SAMPLES;</div><div class='ctx'> 		priv-&gt;read_reg = c_can_plat_read_reg_aligned_to_16bit;</div><div class='ctx'> 		priv-&gt;write_reg = c_can_plat_write_reg_aligned_to_16bit;</div><div class='ctx'> 		priv-&gt;read_reg32 = d_can_plat_read_reg32;</div><div class='hunk'>@@ -329,33 +316,22 @@ static int c_can_plat_probe(struct platform_device *pdev)</div><div class='ctx'> 		/* Check if we need custom RAMINIT via syscon. Mostly for TI</div><div class='ctx'> 		 * platforms. Only supported with DT boot.</div><div class='ctx'> 		 */</div><div class='del'>-		if (np &amp;&amp; of_property_read_bool(np, "syscon-raminit")) {</div><div class='add'>+		if (np &amp;&amp; of_property_present(np, "syscon-raminit")) {</div><div class='add'>+			unsigned int args[2];</div><div class='ctx'> 			u32 id;</div><div class='ctx'> 			struct c_can_raminit *raminit = &amp;priv-&gt;raminit_sys;</div><div class='ctx'> </div><div class='ctx'> 			ret = -EINVAL;</div><div class='del'>-			raminit-&gt;syscon = syscon_regmap_lookup_by_phandle(np,</div><div class='del'>-									  "syscon-raminit");</div><div class='add'>+			raminit-&gt;syscon = syscon_regmap_lookup_by_phandle_args(np,</div><div class='add'>+									       "syscon-raminit",</div><div class='add'>+									       2, args);</div><div class='ctx'> 			if (IS_ERR(raminit-&gt;syscon)) {</div><div class='del'>-				/* can fail with -EPROBE_DEFER */</div><div class='ctx'> 				ret = PTR_ERR(raminit-&gt;syscon);</div><div class='del'>-				free_c_can_dev(dev);</div><div class='del'>-				return ret;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			if (of_property_read_u32_index(np, "syscon-raminit", 1,</div><div class='del'>-						       &amp;raminit-&gt;reg)) {</div><div class='del'>-				dev_err(&amp;pdev-&gt;dev,</div><div class='del'>-					"couldn't get the RAMINIT reg. offset!\n");</div><div class='ctx'> 				goto exit_free_device;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-			if (of_property_read_u32_index(np, "syscon-raminit", 2,</div><div class='del'>-						       &amp;id)) {</div><div class='del'>-				dev_err(&amp;pdev-&gt;dev,</div><div class='del'>-					"couldn't get the CAN instance ID\n");</div><div class='del'>-				goto exit_free_device;</div><div class='del'>-			}</div><div class='add'>+			raminit-&gt;reg = args[0];</div><div class='add'>+			id = args[1];</div><div class='ctx'> </div><div class='ctx'> 			if (id &gt;= drvdata-&gt;raminit_num) {</div><div class='ctx'> 				dev_err(&amp;pdev-&gt;dev,</div><div class='hunk'>@@ -380,40 +356,39 @@ static int c_can_plat_probe(struct platform_device *pdev)</div><div class='ctx'> 	priv-&gt;base = addr;</div><div class='ctx'> 	priv-&gt;device = &amp;pdev-&gt;dev;</div><div class='ctx'> 	priv-&gt;can.clock.freq = clk_get_rate(clk);</div><div class='del'>-	priv-&gt;priv = clk;</div><div class='ctx'> 	priv-&gt;type = drvdata-&gt;id;</div><div class='ctx'> </div><div class='ctx'> 	platform_set_drvdata(pdev, dev);</div><div class='ctx'> 	SET_NETDEV_DEV(dev, &amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='add'>+	pm_runtime_enable(priv-&gt;device);</div><div class='ctx'> 	ret = register_c_can_dev(dev);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "registering %s failed (err=%d)\n",</div><div class='ctx'> 			KBUILD_MODNAME, ret);</div><div class='del'>-		goto exit_free_device;</div><div class='add'>+		goto exit_pm_runtime;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dev_info(&amp;pdev-&gt;dev, "%s device registered (regs=%p, irq=%d)\n",</div><div class='ctx'> 		 KBUILD_MODNAME, priv-&gt;base, dev-&gt;irq);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+exit_pm_runtime:</div><div class='add'>+	pm_runtime_disable(priv-&gt;device);</div><div class='ctx'> exit_free_device:</div><div class='ctx'> 	free_c_can_dev(dev);</div><div class='del'>-exit:</div><div class='del'>-	dev_err(&amp;pdev-&gt;dev, "probe failed\n");</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int c_can_plat_remove(struct platform_device *pdev)</div><div class='add'>+static void c_can_plat_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = platform_get_drvdata(pdev);</div><div class='add'>+	struct c_can_priv *priv = netdev_priv(dev);</div><div class='ctx'> </div><div class='ctx'> 	unregister_c_can_dev(dev);</div><div class='del'>-</div><div class='add'>+	pm_runtime_disable(priv-&gt;device);</div><div class='ctx'> 	free_c_can_dev(dev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PM</div><div class='head'>diff --git a/drivers/net/can/can327.c b/drivers/net/can/can327.c<br/>new file mode 100644<br/>index 000000000000..b66fc16aedd2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/can327.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/can327.c</a></div><div class='hunk'>@@ -0,0 +1,1141 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* ELM327 based CAN interface driver (tty line discipline)</div><div class='add'>+ *</div><div class='add'>+ * This driver started as a derivative of linux/drivers/net/can/slcan.c</div><div class='add'>+ * and my thanks go to the original authors for their inspiration.</div><div class='add'>+ *</div><div class='add'>+ * can327.c Author : Max Staudt &lt;max-linux@enpas.org&gt;</div><div class='add'>+ * slcan.c Author  : Oliver Hartkopp &lt;socketcan@hartkopp.net&gt;</div><div class='add'>+ * slip.c Authors  : Laurence Culhane &lt;loz@holmes.demon.co.uk&gt;</div><div class='add'>+ *                   Fred N. van Kempen &lt;waltje@uwalt.nl.mugnet.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitops.h&gt;</div><div class='add'>+#include &lt;linux/ctype.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/list.h&gt;</div><div class='add'>+#include &lt;linux/lockdep.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/skbuff.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/tty.h&gt;</div><div class='add'>+#include &lt;linux/tty_ldisc.h&gt;</div><div class='add'>+#include &lt;linux/workqueue.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;uapi/linux/tty.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/can.h&gt;</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/can/error.h&gt;</div><div class='add'>+#include &lt;linux/can/rx-offload.h&gt;</div><div class='add'>+</div><div class='add'>+#define CAN327_NAPI_WEIGHT 4</div><div class='add'>+</div><div class='add'>+#define CAN327_SIZE_TXBUF 32</div><div class='add'>+#define CAN327_SIZE_RXBUF 1024</div><div class='add'>+</div><div class='add'>+#define CAN327_CAN_CONFIG_SEND_SFF 0x8000</div><div class='add'>+#define CAN327_CAN_CONFIG_VARIABLE_DLC 0x4000</div><div class='add'>+#define CAN327_CAN_CONFIG_RECV_BOTH_SFF_EFF 0x2000</div><div class='add'>+#define CAN327_CAN_CONFIG_BAUDRATE_MULT_8_7 0x1000</div><div class='add'>+</div><div class='add'>+#define CAN327_DUMMY_CHAR 'y'</div><div class='add'>+#define CAN327_DUMMY_STRING "y"</div><div class='add'>+#define CAN327_READY_CHAR '&gt;'</div><div class='add'>+</div><div class='add'>+/* Bits in elm-&gt;cmds_todo */</div><div class='add'>+enum can327_tx_do {</div><div class='add'>+	CAN327_TX_DO_CAN_DATA = 0,</div><div class='add'>+	CAN327_TX_DO_CANID_11BIT,</div><div class='add'>+	CAN327_TX_DO_CANID_29BIT_LOW,</div><div class='add'>+	CAN327_TX_DO_CANID_29BIT_HIGH,</div><div class='add'>+	CAN327_TX_DO_CAN_CONFIG_PART2,</div><div class='add'>+	CAN327_TX_DO_CAN_CONFIG,</div><div class='add'>+	CAN327_TX_DO_RESPONSES,</div><div class='add'>+	CAN327_TX_DO_SILENT_MONITOR,</div><div class='add'>+	CAN327_TX_DO_INIT,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct can327 {</div><div class='add'>+	/* This must be the first member when using alloc_candev() */</div><div class='add'>+	struct can_priv can;</div><div class='add'>+</div><div class='add'>+	struct can_rx_offload offload;</div><div class='add'>+</div><div class='add'>+	/* TTY buffers */</div><div class='add'>+	u8 txbuf[CAN327_SIZE_TXBUF];</div><div class='add'>+	u8 rxbuf[CAN327_SIZE_RXBUF];</div><div class='add'>+</div><div class='add'>+	/* Per-channel lock */</div><div class='add'>+	spinlock_t lock;</div><div class='add'>+</div><div class='add'>+	/* TTY and netdev devices that we're bridging */</div><div class='add'>+	struct tty_struct *tty;</div><div class='add'>+	struct net_device *dev;</div><div class='add'>+</div><div class='add'>+	/* TTY buffer accounting */</div><div class='add'>+	struct work_struct tx_work;	/* Flushes TTY TX buffer */</div><div class='add'>+	u8 *txhead;			/* Next TX byte */</div><div class='add'>+	size_t txleft;			/* Bytes left to TX */</div><div class='add'>+	int rxfill;			/* Bytes already RX'd in buffer */</div><div class='add'>+</div><div class='add'>+	/* State machine */</div><div class='add'>+	enum {</div><div class='add'>+		CAN327_STATE_NOTINIT = 0,</div><div class='add'>+		CAN327_STATE_GETDUMMYCHAR,</div><div class='add'>+		CAN327_STATE_GETPROMPT,</div><div class='add'>+		CAN327_STATE_RECEIVING,</div><div class='add'>+	} state;</div><div class='add'>+</div><div class='add'>+	/* Things we have yet to send */</div><div class='add'>+	char **next_init_cmd;</div><div class='add'>+	unsigned long cmds_todo;</div><div class='add'>+</div><div class='add'>+	/* The CAN frame and config the ELM327 is sending/using,</div><div class='add'>+	 * or will send/use after finishing all cmds_todo</div><div class='add'>+	 */</div><div class='add'>+	struct can_frame can_frame_to_send;</div><div class='add'>+	u16 can_config;</div><div class='add'>+	u8 can_bitrate_divisor;</div><div class='add'>+</div><div class='add'>+	/* Parser state */</div><div class='add'>+	bool drop_next_line;</div><div class='add'>+</div><div class='add'>+	/* Stop the channel on UART side hardware failure, e.g. stray</div><div class='add'>+	 * characters or neverending lines. This may be caused by bad</div><div class='add'>+	 * UART wiring, a bad ELM327, a bad UART bridge...</div><div class='add'>+	 * Once this is true, nothing will be sent to the TTY.</div><div class='add'>+	 */</div><div class='add'>+	bool uart_side_failure;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline void can327_uart_side_failure(struct can327 *elm);</div><div class='add'>+</div><div class='add'>+static void can327_send(struct can327 *elm, const void *buf, size_t len)</div><div class='add'>+{</div><div class='add'>+	int written;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;elm-&gt;lock);</div><div class='add'>+</div><div class='add'>+	if (elm-&gt;uart_side_failure)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	memcpy(elm-&gt;txbuf, buf, len);</div><div class='add'>+</div><div class='add'>+	/* Order of next two lines is *very* important.</div><div class='add'>+	 * When we are sending a little amount of data,</div><div class='add'>+	 * the transfer may be completed inside the ops-&gt;write()</div><div class='add'>+	 * routine, because it's running with interrupts enabled.</div><div class='add'>+	 * In this case we *never* got WRITE_WAKEUP event,</div><div class='add'>+	 * if we did not request it before write operation.</div><div class='add'>+	 *       14 Oct 1994  Dmitry Gorodchanin.</div><div class='add'>+	 */</div><div class='add'>+	set_bit(TTY_DO_WRITE_WAKEUP, &amp;elm-&gt;tty-&gt;flags);</div><div class='add'>+	written = elm-&gt;tty-&gt;ops-&gt;write(elm-&gt;tty, elm-&gt;txbuf, len);</div><div class='add'>+	if (written &lt; 0) {</div><div class='add'>+		netdev_err(elm-&gt;dev, "Failed to write to tty %s.\n",</div><div class='add'>+			   elm-&gt;tty-&gt;name);</div><div class='add'>+		can327_uart_side_failure(elm);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	elm-&gt;txleft = len - written;</div><div class='add'>+	elm-&gt;txhead = elm-&gt;txbuf + written;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Take the ELM327 out of almost any state and back into command mode.</div><div class='add'>+ * We send CAN327_DUMMY_CHAR which will either abort any running</div><div class='add'>+ * operation, or be echoed back to us in case we're already in command</div><div class='add'>+ * mode.</div><div class='add'>+ */</div><div class='add'>+static void can327_kick_into_cmd_mode(struct can327 *elm)</div><div class='add'>+{</div><div class='add'>+	lockdep_assert_held(&amp;elm-&gt;lock);</div><div class='add'>+</div><div class='add'>+	if (elm-&gt;state != CAN327_STATE_GETDUMMYCHAR &amp;&amp;</div><div class='add'>+	    elm-&gt;state != CAN327_STATE_GETPROMPT) {</div><div class='add'>+		can327_send(elm, CAN327_DUMMY_STRING, 1);</div><div class='add'>+</div><div class='add'>+		elm-&gt;state = CAN327_STATE_GETDUMMYCHAR;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Schedule a CAN frame and necessary config changes to be sent to the TTY. */</div><div class='add'>+static void can327_send_frame(struct can327 *elm, struct can_frame *frame)</div><div class='add'>+{</div><div class='add'>+	lockdep_assert_held(&amp;elm-&gt;lock);</div><div class='add'>+</div><div class='add'>+	/* Schedule any necessary changes in ELM327's CAN configuration */</div><div class='add'>+	if (elm-&gt;can_frame_to_send.can_id != frame-&gt;can_id) {</div><div class='add'>+		/* Set the new CAN ID for transmission. */</div><div class='add'>+		if ((frame-&gt;can_id ^ elm-&gt;can_frame_to_send.can_id)</div><div class='add'>+		    &amp; CAN_EFF_FLAG) {</div><div class='add'>+			elm-&gt;can_config =</div><div class='add'>+				(frame-&gt;can_id &amp; CAN_EFF_FLAG ? 0 : CAN327_CAN_CONFIG_SEND_SFF) |</div><div class='add'>+				CAN327_CAN_CONFIG_VARIABLE_DLC |</div><div class='add'>+				CAN327_CAN_CONFIG_RECV_BOTH_SFF_EFF |</div><div class='add'>+				elm-&gt;can_bitrate_divisor;</div><div class='add'>+</div><div class='add'>+			set_bit(CAN327_TX_DO_CAN_CONFIG, &amp;elm-&gt;cmds_todo);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (frame-&gt;can_id &amp; CAN_EFF_FLAG) {</div><div class='add'>+			clear_bit(CAN327_TX_DO_CANID_11BIT, &amp;elm-&gt;cmds_todo);</div><div class='add'>+			set_bit(CAN327_TX_DO_CANID_29BIT_LOW, &amp;elm-&gt;cmds_todo);</div><div class='add'>+			set_bit(CAN327_TX_DO_CANID_29BIT_HIGH, &amp;elm-&gt;cmds_todo);</div><div class='add'>+		} else {</div><div class='add'>+			set_bit(CAN327_TX_DO_CANID_11BIT, &amp;elm-&gt;cmds_todo);</div><div class='add'>+			clear_bit(CAN327_TX_DO_CANID_29BIT_LOW,</div><div class='add'>+				  &amp;elm-&gt;cmds_todo);</div><div class='add'>+			clear_bit(CAN327_TX_DO_CANID_29BIT_HIGH,</div><div class='add'>+				  &amp;elm-&gt;cmds_todo);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Schedule the CAN frame itself. */</div><div class='add'>+	elm-&gt;can_frame_to_send = *frame;</div><div class='add'>+	set_bit(CAN327_TX_DO_CAN_DATA, &amp;elm-&gt;cmds_todo);</div><div class='add'>+</div><div class='add'>+	can327_kick_into_cmd_mode(elm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ELM327 initialisation sequence.</div><div class='add'>+ * The line length is limited by the buffer in can327_handle_prompt().</div><div class='add'>+ */</div><div class='add'>+static char *can327_init_script[] = {</div><div class='add'>+	"AT WS\r",        /* v1.0: Warm Start */</div><div class='add'>+	"AT PP FF OFF\r", /* v1.0: All Programmable Parameters Off */</div><div class='add'>+	"AT M0\r",        /* v1.0: Memory Off */</div><div class='add'>+	"AT AL\r",        /* v1.0: Allow Long messages */</div><div class='add'>+	"AT BI\r",        /* v1.0: Bypass Initialisation */</div><div class='add'>+	"AT CAF0\r",      /* v1.0: CAN Auto Formatting Off */</div><div class='add'>+	"AT CFC0\r",      /* v1.0: CAN Flow Control Off */</div><div class='add'>+	"AT CF 000\r",    /* v1.0: Reset CAN ID Filter */</div><div class='add'>+	"AT CM 000\r",    /* v1.0: Reset CAN ID Mask */</div><div class='add'>+	"AT E1\r",        /* v1.0: Echo On */</div><div class='add'>+	"AT H1\r",        /* v1.0: Headers On */</div><div class='add'>+	"AT L0\r",        /* v1.0: Linefeeds Off */</div><div class='add'>+	"AT SH 7DF\r",    /* v1.0: Set CAN sending ID to 0x7df */</div><div class='add'>+	"AT ST FF\r",     /* v1.0: Set maximum Timeout for response after TX */</div><div class='add'>+	"AT AT0\r",       /* v1.2: Adaptive Timing Off */</div><div class='add'>+	"AT D1\r",        /* v1.3: Print DLC On */</div><div class='add'>+	"AT S1\r",        /* v1.3: Spaces On */</div><div class='add'>+	"AT TP B\r",      /* v1.0: Try Protocol B */</div><div class='add'>+	NULL</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void can327_init_device(struct can327 *elm)</div><div class='add'>+{</div><div class='add'>+	lockdep_assert_held(&amp;elm-&gt;lock);</div><div class='add'>+</div><div class='add'>+	elm-&gt;state = CAN327_STATE_NOTINIT;</div><div class='add'>+	elm-&gt;can_frame_to_send.can_id = 0x7df; /* ELM327 HW default */</div><div class='add'>+	elm-&gt;rxfill = 0;</div><div class='add'>+	elm-&gt;drop_next_line = 0;</div><div class='add'>+</div><div class='add'>+	/* We can only set the bitrate as a fraction of 500000.</div><div class='add'>+	 * The bitrates listed in can327_bitrate_const will</div><div class='add'>+	 * limit the user to the right values.</div><div class='add'>+	 */</div><div class='add'>+	elm-&gt;can_bitrate_divisor = 500000 / elm-&gt;can.bittiming.bitrate;</div><div class='add'>+	elm-&gt;can_config =</div><div class='add'>+		CAN327_CAN_CONFIG_SEND_SFF | CAN327_CAN_CONFIG_VARIABLE_DLC |</div><div class='add'>+		CAN327_CAN_CONFIG_RECV_BOTH_SFF_EFF | elm-&gt;can_bitrate_divisor;</div><div class='add'>+</div><div class='add'>+	/* Configure ELM327 and then start monitoring */</div><div class='add'>+	elm-&gt;next_init_cmd = &amp;can327_init_script[0];</div><div class='add'>+	set_bit(CAN327_TX_DO_INIT, &amp;elm-&gt;cmds_todo);</div><div class='add'>+	set_bit(CAN327_TX_DO_SILENT_MONITOR, &amp;elm-&gt;cmds_todo);</div><div class='add'>+	set_bit(CAN327_TX_DO_RESPONSES, &amp;elm-&gt;cmds_todo);</div><div class='add'>+	set_bit(CAN327_TX_DO_CAN_CONFIG, &amp;elm-&gt;cmds_todo);</div><div class='add'>+</div><div class='add'>+	can327_kick_into_cmd_mode(elm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void can327_feed_frame_to_netdev(struct can327 *elm, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	lockdep_assert_held(&amp;elm-&gt;lock);</div><div class='add'>+</div><div class='add'>+	if (!netif_running(elm-&gt;dev)) {</div><div class='add'>+		kfree_skb(skb);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Queue for NAPI pickup.</div><div class='add'>+	 * rx-offload will update stats and LEDs for us.</div><div class='add'>+	 */</div><div class='add'>+	if (can_rx_offload_queue_tail(&amp;elm-&gt;offload, skb))</div><div class='add'>+		elm-&gt;dev-&gt;stats.rx_fifo_errors++;</div><div class='add'>+</div><div class='add'>+	/* Wake NAPI */</div><div class='add'>+	can_rx_offload_irq_finish(&amp;elm-&gt;offload);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Called when we're out of ideas and just want it all to end. */</div><div class='add'>+static inline void can327_uart_side_failure(struct can327 *elm)</div><div class='add'>+{</div><div class='add'>+	struct can_frame *frame;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;elm-&gt;lock);</div><div class='add'>+</div><div class='add'>+	elm-&gt;uart_side_failure = true;</div><div class='add'>+</div><div class='add'>+	clear_bit(TTY_DO_WRITE_WAKEUP, &amp;elm-&gt;tty-&gt;flags);</div><div class='add'>+</div><div class='add'>+	elm-&gt;can.can_stats.bus_off++;</div><div class='add'>+	netif_stop_queue(elm-&gt;dev);</div><div class='add'>+	elm-&gt;can.state = CAN_STATE_BUS_OFF;</div><div class='add'>+	can_bus_off(elm-&gt;dev);</div><div class='add'>+</div><div class='add'>+	netdev_err(elm-&gt;dev,</div><div class='add'>+		   "ELM327 misbehaved. Blocking further communication.\n");</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_err_skb(elm-&gt;dev, &amp;frame);</div><div class='add'>+	if (!skb)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	frame-&gt;can_id |= CAN_ERR_BUSOFF;</div><div class='add'>+	can327_feed_frame_to_netdev(elm, skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Compares a byte buffer (non-NUL terminated) to the payload part of</div><div class='add'>+ * a string, and returns true iff the buffer (content *and* length) is</div><div class='add'>+ * exactly that string, without the terminating NUL byte.</div><div class='add'>+ *</div><div class='add'>+ * Example: If reference is "BUS ERROR", then this returns true iff nbytes == 9</div><div class='add'>+ *          and !memcmp(buf, "BUS ERROR", 9).</div><div class='add'>+ *</div><div class='add'>+ * The reason to use strings is so we can easily include them in the C</div><div class='add'>+ * code, and to avoid hardcoding lengths.</div><div class='add'>+ */</div><div class='add'>+static inline bool can327_rxbuf_cmp(const u8 *buf, size_t nbytes,</div><div class='add'>+				    const char *reference)</div><div class='add'>+{</div><div class='add'>+	size_t ref_len = strlen(reference);</div><div class='add'>+</div><div class='add'>+	return (nbytes == ref_len) &amp;&amp; !memcmp(buf, reference, ref_len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void can327_parse_error(struct can327 *elm, size_t len)</div><div class='add'>+{</div><div class='add'>+	struct can_frame *frame;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;elm-&gt;lock);</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_err_skb(elm-&gt;dev, &amp;frame);</div><div class='add'>+	if (!skb)</div><div class='add'>+		/* It's okay to return here:</div><div class='add'>+		 * The outer parsing loop will drop this UART buffer.</div><div class='add'>+		 */</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Filter possible error messages based on length of RX'd line */</div><div class='add'>+	if (can327_rxbuf_cmp(elm-&gt;rxbuf, len, "UNABLE TO CONNECT")) {</div><div class='add'>+		netdev_err(elm-&gt;dev,</div><div class='add'>+			   "ELM327 reported UNABLE TO CONNECT. Please check your setup.\n");</div><div class='add'>+	} else if (can327_rxbuf_cmp(elm-&gt;rxbuf, len, "BUFFER FULL")) {</div><div class='add'>+		/* This will only happen if the last data line was complete.</div><div class='add'>+		 * Otherwise, can327_parse_frame() will heuristically</div><div class='add'>+		 * emit this kind of error frame instead.</div><div class='add'>+		 */</div><div class='add'>+		frame-&gt;can_id |= CAN_ERR_CRTL;</div><div class='add'>+		frame-&gt;data[1] = CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='add'>+	} else if (can327_rxbuf_cmp(elm-&gt;rxbuf, len, "BUS ERROR")) {</div><div class='add'>+		frame-&gt;can_id |= CAN_ERR_BUSERROR;</div><div class='add'>+	} else if (can327_rxbuf_cmp(elm-&gt;rxbuf, len, "CAN ERROR")) {</div><div class='add'>+		frame-&gt;can_id |= CAN_ERR_PROT;</div><div class='add'>+	} else if (can327_rxbuf_cmp(elm-&gt;rxbuf, len, "&lt;RX ERROR")) {</div><div class='add'>+		frame-&gt;can_id |= CAN_ERR_PROT;</div><div class='add'>+	} else if (can327_rxbuf_cmp(elm-&gt;rxbuf, len, "BUS BUSY")) {</div><div class='add'>+		frame-&gt;can_id |= CAN_ERR_PROT;</div><div class='add'>+		frame-&gt;data[2] = CAN_ERR_PROT_OVERLOAD;</div><div class='add'>+	} else if (can327_rxbuf_cmp(elm-&gt;rxbuf, len, "FB ERROR")) {</div><div class='add'>+		frame-&gt;can_id |= CAN_ERR_PROT;</div><div class='add'>+		frame-&gt;data[2] = CAN_ERR_PROT_TX;</div><div class='add'>+	} else if (len == 5 &amp;&amp; !memcmp(elm-&gt;rxbuf, "ERR", 3)) {</div><div class='add'>+		/* ERR is followed by two digits, hence line length 5 */</div><div class='add'>+		netdev_err(elm-&gt;dev, "ELM327 reported an ERR%c%c. Please power it off and on again.\n",</div><div class='add'>+			   elm-&gt;rxbuf[3], elm-&gt;rxbuf[4]);</div><div class='add'>+		frame-&gt;can_id |= CAN_ERR_CRTL;</div><div class='add'>+	} else {</div><div class='add'>+		/* Something else has happened.</div><div class='add'>+		 * Maybe garbage on the UART line.</div><div class='add'>+		 * Emit a generic error frame.</div><div class='add'>+		 */</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	can327_feed_frame_to_netdev(elm, skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Parse CAN frames coming as ASCII from ELM327.</div><div class='add'>+ * They can be of various formats:</div><div class='add'>+ *</div><div class='add'>+ * 29-bit ID (EFF):  12 34 56 78 D PL PL PL PL PL PL PL PL</div><div class='add'>+ * 11-bit ID (!EFF): 123 D PL PL PL PL PL PL PL PL</div><div class='add'>+ *</div><div class='add'>+ * where D = DLC, PL = payload byte</div><div class='add'>+ *</div><div class='add'>+ * Instead of a payload, RTR indicates a remote request.</div><div class='add'>+ *</div><div class='add'>+ * We will use the spaces and line length to guess the format.</div><div class='add'>+ */</div><div class='add'>+static int can327_parse_frame(struct can327 *elm, size_t len)</div><div class='add'>+{</div><div class='add'>+	struct can_frame *frame;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	int hexlen;</div><div class='add'>+	int datastart;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;elm-&gt;lock);</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_skb(elm-&gt;dev, &amp;frame);</div><div class='add'>+	if (!skb)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* Find first non-hex and non-space character:</div><div class='add'>+	 *  - In the simplest case, there is none.</div><div class='add'>+	 *  - For RTR frames, 'R' is the first non-hex character.</div><div class='add'>+	 *  - An error message may replace the end of the data line.</div><div class='add'>+	 */</div><div class='add'>+	for (hexlen = 0; hexlen &lt;= len; hexlen++) {</div><div class='add'>+		if (hex_to_bin(elm-&gt;rxbuf[hexlen]) &lt; 0 &amp;&amp;</div><div class='add'>+		    elm-&gt;rxbuf[hexlen] != ' ') {</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Sanity check whether the line is really a clean hexdump,</div><div class='add'>+	 * or terminated by an error message, or contains garbage.</div><div class='add'>+	 */</div><div class='add'>+	if (hexlen &lt; len &amp;&amp; !isdigit(elm-&gt;rxbuf[hexlen]) &amp;&amp;</div><div class='add'>+	    !isupper(elm-&gt;rxbuf[hexlen]) &amp;&amp; '&lt;' != elm-&gt;rxbuf[hexlen] &amp;&amp;</div><div class='add'>+	    ' ' != elm-&gt;rxbuf[hexlen]) {</div><div class='add'>+		/* The line is likely garbled anyway, so bail.</div><div class='add'>+		 * The main code will restart listening.</div><div class='add'>+		 */</div><div class='add'>+		kfree_skb(skb);</div><div class='add'>+		return -ENODATA;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Use spaces in CAN ID to distinguish 29 or 11 bit address length.</div><div class='add'>+	 * No out-of-bounds access:</div><div class='add'>+	 * We use the fact that we can always read from elm-&gt;rxbuf.</div><div class='add'>+	 */</div><div class='add'>+	if (elm-&gt;rxbuf[2] == ' ' &amp;&amp; elm-&gt;rxbuf[5] == ' ' &amp;&amp;</div><div class='add'>+	    elm-&gt;rxbuf[8] == ' ' &amp;&amp; elm-&gt;rxbuf[11] == ' ' &amp;&amp;</div><div class='add'>+	    elm-&gt;rxbuf[13] == ' ') {</div><div class='add'>+		frame-&gt;can_id = CAN_EFF_FLAG;</div><div class='add'>+		datastart = 14;</div><div class='add'>+	} else if (elm-&gt;rxbuf[3] == ' ' &amp;&amp; elm-&gt;rxbuf[5] == ' ') {</div><div class='add'>+		datastart = 6;</div><div class='add'>+	} else {</div><div class='add'>+		/* This is not a well-formatted data line.</div><div class='add'>+		 * Assume it's an error message.</div><div class='add'>+		 */</div><div class='add'>+		kfree_skb(skb);</div><div class='add'>+		return -ENODATA;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (hexlen &lt; datastart) {</div><div class='add'>+		/* The line is too short to be a valid frame hex dump.</div><div class='add'>+		 * Something interrupted the hex dump or it is invalid.</div><div class='add'>+		 */</div><div class='add'>+		kfree_skb(skb);</div><div class='add'>+		return -ENODATA;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* From here on all chars up to buf[hexlen] are hex or spaces,</div><div class='add'>+	 * at well-defined offsets.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	/* Read CAN data length */</div><div class='add'>+	frame-&gt;len = (hex_to_bin(elm-&gt;rxbuf[datastart - 2]) &lt;&lt; 0);</div><div class='add'>+</div><div class='add'>+	/* Read CAN ID */</div><div class='add'>+	if (frame-&gt;can_id &amp; CAN_EFF_FLAG) {</div><div class='add'>+		frame-&gt;can_id |= (hex_to_bin(elm-&gt;rxbuf[0]) &lt;&lt; 28) |</div><div class='add'>+				 (hex_to_bin(elm-&gt;rxbuf[1]) &lt;&lt; 24) |</div><div class='add'>+				 (hex_to_bin(elm-&gt;rxbuf[3]) &lt;&lt; 20) |</div><div class='add'>+				 (hex_to_bin(elm-&gt;rxbuf[4]) &lt;&lt; 16) |</div><div class='add'>+				 (hex_to_bin(elm-&gt;rxbuf[6]) &lt;&lt; 12) |</div><div class='add'>+				 (hex_to_bin(elm-&gt;rxbuf[7]) &lt;&lt; 8) |</div><div class='add'>+				 (hex_to_bin(elm-&gt;rxbuf[9]) &lt;&lt; 4) |</div><div class='add'>+				 (hex_to_bin(elm-&gt;rxbuf[10]) &lt;&lt; 0);</div><div class='add'>+	} else {</div><div class='add'>+		frame-&gt;can_id |= (hex_to_bin(elm-&gt;rxbuf[0]) &lt;&lt; 8) |</div><div class='add'>+				 (hex_to_bin(elm-&gt;rxbuf[1]) &lt;&lt; 4) |</div><div class='add'>+				 (hex_to_bin(elm-&gt;rxbuf[2]) &lt;&lt; 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Check for RTR frame */</div><div class='add'>+	if (elm-&gt;rxfill &gt;= hexlen + 3 &amp;&amp;</div><div class='add'>+	    !memcmp(&amp;elm-&gt;rxbuf[hexlen], "RTR", 3)) {</div><div class='add'>+		frame-&gt;can_id |= CAN_RTR_FLAG;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Is the line long enough to hold the advertised payload?</div><div class='add'>+	 * Note: RTR frames have a DLC, but no actual payload.</div><div class='add'>+	 */</div><div class='add'>+	if (!(frame-&gt;can_id &amp; CAN_RTR_FLAG) &amp;&amp;</div><div class='add'>+	    (hexlen &lt; frame-&gt;len * 3 + datastart)) {</div><div class='add'>+		/* Incomplete frame.</div><div class='add'>+		 * Probably the ELM327's RS232 TX buffer was full.</div><div class='add'>+		 * Emit an error frame and exit.</div><div class='add'>+		 */</div><div class='add'>+		frame-&gt;can_id = CAN_ERR_FLAG | CAN_ERR_CRTL;</div><div class='add'>+		frame-&gt;len = CAN_ERR_DLC;</div><div class='add'>+		frame-&gt;data[1] = CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='add'>+		can327_feed_frame_to_netdev(elm, skb);</div><div class='add'>+</div><div class='add'>+		/* Signal failure to parse.</div><div class='add'>+		 * The line will be re-parsed as an error line, which will fail.</div><div class='add'>+		 * However, this will correctly drop the state machine back into</div><div class='add'>+		 * command mode.</div><div class='add'>+		 */</div><div class='add'>+		return -ENODATA;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Parse the data nibbles. */</div><div class='add'>+	for (i = 0; i &lt; frame-&gt;len; i++) {</div><div class='add'>+		frame-&gt;data[i] =</div><div class='add'>+			(hex_to_bin(elm-&gt;rxbuf[datastart + 3 * i]) &lt;&lt; 4) |</div><div class='add'>+			(hex_to_bin(elm-&gt;rxbuf[datastart + 3 * i + 1]));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Feed the frame to the network layer. */</div><div class='add'>+	can327_feed_frame_to_netdev(elm, skb);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void can327_parse_line(struct can327 *elm, size_t len)</div><div class='add'>+{</div><div class='add'>+	lockdep_assert_held(&amp;elm-&gt;lock);</div><div class='add'>+</div><div class='add'>+	/* Skip empty lines */</div><div class='add'>+	if (!len)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Skip echo lines */</div><div class='add'>+	if (elm-&gt;drop_next_line) {</div><div class='add'>+		elm-&gt;drop_next_line = 0;</div><div class='add'>+		return;</div><div class='add'>+	} else if (!memcmp(elm-&gt;rxbuf, "AT", 2)) {</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Regular parsing */</div><div class='add'>+	if (elm-&gt;state == CAN327_STATE_RECEIVING &amp;&amp;</div><div class='add'>+	    can327_parse_frame(elm, len)) {</div><div class='add'>+		/* Parse an error line. */</div><div class='add'>+		can327_parse_error(elm, len);</div><div class='add'>+</div><div class='add'>+		/* Start afresh. */</div><div class='add'>+		can327_kick_into_cmd_mode(elm);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void can327_handle_prompt(struct can327 *elm)</div><div class='add'>+{</div><div class='add'>+	struct can_frame *frame = &amp;elm-&gt;can_frame_to_send;</div><div class='add'>+	/* Size this buffer for the largest ELM327 line we may generate,</div><div class='add'>+	 * which is currently an 8 byte CAN frame's payload hexdump.</div><div class='add'>+	 * Items in can327_init_script must fit here, too!</div><div class='add'>+	 */</div><div class='add'>+	char local_txbuf[sizeof("0102030405060708\r")];</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;elm-&gt;lock);</div><div class='add'>+</div><div class='add'>+	if (!elm-&gt;cmds_todo) {</div><div class='add'>+		/* Enter CAN monitor mode */</div><div class='add'>+		can327_send(elm, "ATMA\r", 5);</div><div class='add'>+		elm-&gt;state = CAN327_STATE_RECEIVING;</div><div class='add'>+</div><div class='add'>+		/* We will be in the default state once this command is</div><div class='add'>+		 * sent, so enable the TX packet queue.</div><div class='add'>+		 */</div><div class='add'>+		netif_wake_queue(elm-&gt;dev);</div><div class='add'>+</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Reconfigure ELM327 step by step as indicated by elm-&gt;cmds_todo */</div><div class='add'>+	if (test_bit(CAN327_TX_DO_INIT, &amp;elm-&gt;cmds_todo)) {</div><div class='add'>+		snprintf(local_txbuf, sizeof(local_txbuf), "%s",</div><div class='add'>+			 *elm-&gt;next_init_cmd);</div><div class='add'>+</div><div class='add'>+		elm-&gt;next_init_cmd++;</div><div class='add'>+		if (!(*elm-&gt;next_init_cmd)) {</div><div class='add'>+			clear_bit(CAN327_TX_DO_INIT, &amp;elm-&gt;cmds_todo);</div><div class='add'>+			/* Init finished. */</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+	} else if (test_and_clear_bit(CAN327_TX_DO_SILENT_MONITOR, &amp;elm-&gt;cmds_todo)) {</div><div class='add'>+		snprintf(local_txbuf, sizeof(local_txbuf),</div><div class='add'>+			 "ATCSM%i\r",</div><div class='add'>+			 !!(elm-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LISTENONLY));</div><div class='add'>+</div><div class='add'>+	} else if (test_and_clear_bit(CAN327_TX_DO_RESPONSES, &amp;elm-&gt;cmds_todo)) {</div><div class='add'>+		snprintf(local_txbuf, sizeof(local_txbuf),</div><div class='add'>+			 "ATR%i\r",</div><div class='add'>+			 !(elm-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LISTENONLY));</div><div class='add'>+</div><div class='add'>+	} else if (test_and_clear_bit(CAN327_TX_DO_CAN_CONFIG, &amp;elm-&gt;cmds_todo)) {</div><div class='add'>+		snprintf(local_txbuf, sizeof(local_txbuf),</div><div class='add'>+			 "ATPC\r");</div><div class='add'>+		set_bit(CAN327_TX_DO_CAN_CONFIG_PART2, &amp;elm-&gt;cmds_todo);</div><div class='add'>+</div><div class='add'>+	} else if (test_and_clear_bit(CAN327_TX_DO_CAN_CONFIG_PART2, &amp;elm-&gt;cmds_todo)) {</div><div class='add'>+		snprintf(local_txbuf, sizeof(local_txbuf),</div><div class='add'>+			 "ATPB%04X\r",</div><div class='add'>+			 elm-&gt;can_config);</div><div class='add'>+</div><div class='add'>+	} else if (test_and_clear_bit(CAN327_TX_DO_CANID_29BIT_HIGH, &amp;elm-&gt;cmds_todo)) {</div><div class='add'>+		snprintf(local_txbuf, sizeof(local_txbuf),</div><div class='add'>+			 "ATCP%02X\r",</div><div class='add'>+			 (frame-&gt;can_id &amp; CAN_EFF_MASK) &gt;&gt; 24);</div><div class='add'>+</div><div class='add'>+	} else if (test_and_clear_bit(CAN327_TX_DO_CANID_29BIT_LOW, &amp;elm-&gt;cmds_todo)) {</div><div class='add'>+		snprintf(local_txbuf, sizeof(local_txbuf),</div><div class='add'>+			 "ATSH%06X\r",</div><div class='add'>+			 frame-&gt;can_id &amp; CAN_EFF_MASK &amp; ((1 &lt;&lt; 24) - 1));</div><div class='add'>+</div><div class='add'>+	} else if (test_and_clear_bit(CAN327_TX_DO_CANID_11BIT, &amp;elm-&gt;cmds_todo)) {</div><div class='add'>+		snprintf(local_txbuf, sizeof(local_txbuf),</div><div class='add'>+			 "ATSH%03X\r",</div><div class='add'>+			 frame-&gt;can_id &amp; CAN_SFF_MASK);</div><div class='add'>+</div><div class='add'>+	} else if (test_and_clear_bit(CAN327_TX_DO_CAN_DATA, &amp;elm-&gt;cmds_todo)) {</div><div class='add'>+		if (frame-&gt;can_id &amp; CAN_RTR_FLAG) {</div><div class='add'>+			/* Send an RTR frame. Their DLC is fixed.</div><div class='add'>+			 * Some chips don't send them at all.</div><div class='add'>+			 */</div><div class='add'>+			snprintf(local_txbuf, sizeof(local_txbuf), "ATRTR\r");</div><div class='add'>+		} else {</div><div class='add'>+			/* Send a regular CAN data frame */</div><div class='add'>+			int i;</div><div class='add'>+</div><div class='add'>+			for (i = 0; i &lt; frame-&gt;len; i++) {</div><div class='add'>+				snprintf(&amp;local_txbuf[2 * i],</div><div class='add'>+					 sizeof(local_txbuf), "%02X",</div><div class='add'>+					 frame-&gt;data[i]);</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			snprintf(&amp;local_txbuf[2 * i], sizeof(local_txbuf),</div><div class='add'>+				 "\r");</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		elm-&gt;drop_next_line = 1;</div><div class='add'>+		elm-&gt;state = CAN327_STATE_RECEIVING;</div><div class='add'>+</div><div class='add'>+		/* We will be in the default state once this command is</div><div class='add'>+		 * sent, so enable the TX packet queue.</div><div class='add'>+		 */</div><div class='add'>+		netif_wake_queue(elm-&gt;dev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	can327_send(elm, local_txbuf, strlen(local_txbuf));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool can327_is_ready_char(char c)</div><div class='add'>+{</div><div class='add'>+	/* Bits 0xc0 are sometimes set (randomly), hence the mask.</div><div class='add'>+	 * Probably bad hardware.</div><div class='add'>+	 */</div><div class='add'>+	return (c &amp; 0x3f) == CAN327_READY_CHAR;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void can327_drop_bytes(struct can327 *elm, size_t i)</div><div class='add'>+{</div><div class='add'>+	lockdep_assert_held(&amp;elm-&gt;lock);</div><div class='add'>+</div><div class='add'>+	memmove(&amp;elm-&gt;rxbuf[0], &amp;elm-&gt;rxbuf[i], CAN327_SIZE_RXBUF - i);</div><div class='add'>+	elm-&gt;rxfill -= i;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void can327_parse_rxbuf(struct can327 *elm, size_t first_new_char_idx)</div><div class='add'>+{</div><div class='add'>+	size_t len, pos;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;elm-&gt;lock);</div><div class='add'>+</div><div class='add'>+	switch (elm-&gt;state) {</div><div class='add'>+	case CAN327_STATE_NOTINIT:</div><div class='add'>+		elm-&gt;rxfill = 0;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case CAN327_STATE_GETDUMMYCHAR:</div><div class='add'>+		/* Wait for 'y' or '&gt;' */</div><div class='add'>+		for (pos = 0; pos &lt; elm-&gt;rxfill; pos++) {</div><div class='add'>+			if (elm-&gt;rxbuf[pos] == CAN327_DUMMY_CHAR) {</div><div class='add'>+				can327_send(elm, "\r", 1);</div><div class='add'>+				elm-&gt;state = CAN327_STATE_GETPROMPT;</div><div class='add'>+				pos++;</div><div class='add'>+				break;</div><div class='add'>+			} else if (can327_is_ready_char(elm-&gt;rxbuf[pos])) {</div><div class='add'>+				can327_send(elm, CAN327_DUMMY_STRING, 1);</div><div class='add'>+				pos++;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		can327_drop_bytes(elm, pos);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case CAN327_STATE_GETPROMPT:</div><div class='add'>+		/* Wait for '&gt;' */</div><div class='add'>+		if (can327_is_ready_char(elm-&gt;rxbuf[elm-&gt;rxfill - 1]))</div><div class='add'>+			can327_handle_prompt(elm);</div><div class='add'>+</div><div class='add'>+		elm-&gt;rxfill = 0;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case CAN327_STATE_RECEIVING:</div><div class='add'>+		/* Find &lt;CR&gt; delimiting feedback lines. */</div><div class='add'>+		len = first_new_char_idx;</div><div class='add'>+		while (len &lt; elm-&gt;rxfill &amp;&amp; elm-&gt;rxbuf[len] != '\r')</div><div class='add'>+			len++;</div><div class='add'>+</div><div class='add'>+		if (len == CAN327_SIZE_RXBUF) {</div><div class='add'>+			/* Assume the buffer ran full with garbage.</div><div class='add'>+			 * Did we even connect at the right baud rate?</div><div class='add'>+			 */</div><div class='add'>+			netdev_err(elm-&gt;dev,</div><div class='add'>+				   "RX buffer overflow. Faulty ELM327 or UART?\n");</div><div class='add'>+			can327_uart_side_failure(elm);</div><div class='add'>+		} else if (len == elm-&gt;rxfill) {</div><div class='add'>+			if (can327_is_ready_char(elm-&gt;rxbuf[elm-&gt;rxfill - 1])) {</div><div class='add'>+				/* The ELM327's AT ST response timeout ran out,</div><div class='add'>+				 * so we got a prompt.</div><div class='add'>+				 * Clear RX buffer and restart listening.</div><div class='add'>+				 */</div><div class='add'>+				elm-&gt;rxfill = 0;</div><div class='add'>+</div><div class='add'>+				can327_handle_prompt(elm);</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			/* No &lt;CR&gt; found - we haven't received a full line yet.</div><div class='add'>+			 * Wait for more data.</div><div class='add'>+			 */</div><div class='add'>+		} else {</div><div class='add'>+			/* We have a full line to parse. */</div><div class='add'>+			can327_parse_line(elm, len);</div><div class='add'>+</div><div class='add'>+			/* Remove parsed data from RX buffer. */</div><div class='add'>+			can327_drop_bytes(elm, len + 1);</div><div class='add'>+</div><div class='add'>+			/* More data to parse? */</div><div class='add'>+			if (elm-&gt;rxfill)</div><div class='add'>+				can327_parse_rxbuf(elm, 0);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int can327_netdev_open(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct can327 *elm = netdev_priv(dev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;elm-&gt;lock);</div><div class='add'>+</div><div class='add'>+	if (!elm-&gt;tty) {</div><div class='add'>+		spin_unlock_bh(&amp;elm-&gt;lock);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (elm-&gt;uart_side_failure)</div><div class='add'>+		netdev_warn(elm-&gt;dev,</div><div class='add'>+			    "Reopening netdev after a UART side fault has been detected.\n");</div><div class='add'>+</div><div class='add'>+	/* Clear TTY buffers */</div><div class='add'>+	elm-&gt;rxfill = 0;</div><div class='add'>+	elm-&gt;txleft = 0;</div><div class='add'>+</div><div class='add'>+	/* open_candev() checks for elm-&gt;can.bittiming.bitrate != 0 */</div><div class='add'>+	err = open_candev(dev);</div><div class='add'>+	if (err) {</div><div class='add'>+		spin_unlock_bh(&amp;elm-&gt;lock);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	can327_init_device(elm);</div><div class='add'>+	spin_unlock_bh(&amp;elm-&gt;lock);</div><div class='add'>+</div><div class='add'>+	err = can_rx_offload_add_manual(dev, &amp;elm-&gt;offload, CAN327_NAPI_WEIGHT);</div><div class='add'>+	if (err) {</div><div class='add'>+		close_candev(dev);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	can_rx_offload_enable(&amp;elm-&gt;offload);</div><div class='add'>+</div><div class='add'>+	elm-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+	netif_start_queue(dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int can327_netdev_close(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct can327 *elm = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	/* Interrupt whatever the ELM327 is doing right now */</div><div class='add'>+	spin_lock_bh(&amp;elm-&gt;lock);</div><div class='add'>+	can327_send(elm, CAN327_DUMMY_STRING, 1);</div><div class='add'>+	spin_unlock_bh(&amp;elm-&gt;lock);</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(dev);</div><div class='add'>+</div><div class='add'>+	/* We don't flush the UART TX queue here, as we want final stop</div><div class='add'>+	 * commands (like the above dummy char) to be flushed out.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	can_rx_offload_disable(&amp;elm-&gt;offload);</div><div class='add'>+	elm-&gt;can.state = CAN_STATE_STOPPED;</div><div class='add'>+	can_rx_offload_del(&amp;elm-&gt;offload);</div><div class='add'>+	close_candev(dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Send a can_frame to a TTY. */</div><div class='add'>+static netdev_tx_t can327_netdev_start_xmit(struct sk_buff *skb,</div><div class='add'>+					    struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct can327 *elm = netdev_priv(dev);</div><div class='add'>+	struct can_frame *frame = (struct can_frame *)skb-&gt;data;</div><div class='add'>+</div><div class='add'>+	if (can_dev_dropped_skb(dev, skb))</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+	/* We shouldn't get here after a hardware fault:</div><div class='add'>+	 * can_bus_off() calls netif_carrier_off()</div><div class='add'>+	 */</div><div class='add'>+	if (elm-&gt;uart_side_failure) {</div><div class='add'>+		WARN_ON_ONCE(elm-&gt;uart_side_failure);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(dev);</div><div class='add'>+</div><div class='add'>+	/* BHs are already disabled, so no spin_lock_bh().</div><div class='add'>+	 * See Documentation/networking/netdevices.rst</div><div class='add'>+	 */</div><div class='add'>+	spin_lock(&amp;elm-&gt;lock);</div><div class='add'>+	can327_send_frame(elm, frame);</div><div class='add'>+	spin_unlock(&amp;elm-&gt;lock);</div><div class='add'>+</div><div class='add'>+	dev-&gt;stats.tx_packets++;</div><div class='add'>+	dev-&gt;stats.tx_bytes += frame-&gt;can_id &amp; CAN_RTR_FLAG ? 0 : frame-&gt;len;</div><div class='add'>+</div><div class='add'>+	skb_tx_timestamp(skb);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	kfree_skb(skb);</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops can327_netdev_ops = {</div><div class='add'>+	.ndo_open = can327_netdev_open,</div><div class='add'>+	.ndo_stop = can327_netdev_close,</div><div class='add'>+	.ndo_start_xmit = can327_netdev_start_xmit,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops can327_ethtool_ops = {</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static bool can327_is_valid_rx_char(u8 c)</div><div class='add'>+{</div><div class='add'>+	static const bool lut_char_is_valid['z'] = {</div><div class='add'>+		['\r'] = true,</div><div class='add'>+		[' '] = true,</div><div class='add'>+		['.'] = true,</div><div class='add'>+		['0'] = true, true, true, true, true,</div><div class='add'>+		['5'] = true, true, true, true, true,</div><div class='add'>+		['&lt;'] = true,</div><div class='add'>+		[CAN327_READY_CHAR] = true,</div><div class='add'>+		['?'] = true,</div><div class='add'>+		['A'] = true, true, true, true, true, true, true,</div><div class='add'>+		['H'] = true, true, true, true, true, true, true,</div><div class='add'>+		['O'] = true, true, true, true, true, true, true,</div><div class='add'>+		['V'] = true, true, true, true, true,</div><div class='add'>+		['a'] = true,</div><div class='add'>+		['b'] = true,</div><div class='add'>+		['v'] = true,</div><div class='add'>+		[CAN327_DUMMY_CHAR] = true,</div><div class='add'>+	};</div><div class='add'>+	BUILD_BUG_ON(CAN327_DUMMY_CHAR &gt;= 'z');</div><div class='add'>+</div><div class='add'>+	return (c &lt; ARRAY_SIZE(lut_char_is_valid) &amp;&amp; lut_char_is_valid[c]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Handle incoming ELM327 ASCII data.</div><div class='add'>+ * This will not be re-entered while running, but other ldisc</div><div class='add'>+ * functions may be called in parallel.</div><div class='add'>+ */</div><div class='add'>+static void can327_ldisc_rx(struct tty_struct *tty, const u8 *cp,</div><div class='add'>+			    const u8 *fp, size_t count)</div><div class='add'>+{</div><div class='add'>+	struct can327 *elm = tty-&gt;disc_data;</div><div class='add'>+	size_t first_new_char_idx;</div><div class='add'>+</div><div class='add'>+	if (elm-&gt;uart_side_failure)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;elm-&gt;lock);</div><div class='add'>+</div><div class='add'>+	/* Store old rxfill, so can327_parse_rxbuf() will have</div><div class='add'>+	 * the option of skipping already checked characters.</div><div class='add'>+	 */</div><div class='add'>+	first_new_char_idx = elm-&gt;rxfill;</div><div class='add'>+</div><div class='add'>+	while (count--) {</div><div class='add'>+		if (elm-&gt;rxfill &gt;= CAN327_SIZE_RXBUF) {</div><div class='add'>+			netdev_err(elm-&gt;dev,</div><div class='add'>+				   "Receive buffer overflowed. Bad chip or wiring? count = %zu",</div><div class='add'>+				   count);</div><div class='add'>+			goto uart_failure;</div><div class='add'>+		}</div><div class='add'>+		if (fp &amp;&amp; *fp++) {</div><div class='add'>+			netdev_err(elm-&gt;dev,</div><div class='add'>+				   "Error in received character stream. Check your wiring.");</div><div class='add'>+			goto uart_failure;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Ignore NUL characters, which the PIC microcontroller may</div><div class='add'>+		 * inadvertently insert due to a known hardware bug.</div><div class='add'>+		 * See ELM327 documentation, which refers to a Microchip PIC</div><div class='add'>+		 * bug description.</div><div class='add'>+		 */</div><div class='add'>+		if (*cp) {</div><div class='add'>+			/* Check for stray characters on the UART line.</div><div class='add'>+			 * Likely caused by bad hardware.</div><div class='add'>+			 */</div><div class='add'>+			if (!can327_is_valid_rx_char(*cp)) {</div><div class='add'>+				netdev_err(elm-&gt;dev,</div><div class='add'>+					   "Received illegal character %02x.\n",</div><div class='add'>+					   *cp);</div><div class='add'>+				goto uart_failure;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			elm-&gt;rxbuf[elm-&gt;rxfill++] = *cp;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		cp++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	can327_parse_rxbuf(elm, first_new_char_idx);</div><div class='add'>+	spin_unlock_bh(&amp;elm-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return;</div><div class='add'>+uart_failure:</div><div class='add'>+	can327_uart_side_failure(elm);</div><div class='add'>+	spin_unlock_bh(&amp;elm-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Write out remaining transmit buffer.</div><div class='add'>+ * Scheduled when TTY is writable.</div><div class='add'>+ */</div><div class='add'>+static void can327_ldisc_tx_worker(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct can327 *elm = container_of(work, struct can327, tx_work);</div><div class='add'>+	ssize_t written;</div><div class='add'>+</div><div class='add'>+	if (elm-&gt;uart_side_failure)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;elm-&gt;lock);</div><div class='add'>+</div><div class='add'>+	if (elm-&gt;txleft) {</div><div class='add'>+		written = elm-&gt;tty-&gt;ops-&gt;write(elm-&gt;tty, elm-&gt;txhead,</div><div class='add'>+					       elm-&gt;txleft);</div><div class='add'>+		if (written &lt; 0) {</div><div class='add'>+			netdev_err(elm-&gt;dev, "Failed to write to tty %s.\n",</div><div class='add'>+				   elm-&gt;tty-&gt;name);</div><div class='add'>+			can327_uart_side_failure(elm);</div><div class='add'>+</div><div class='add'>+			spin_unlock_bh(&amp;elm-&gt;lock);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		elm-&gt;txleft -= written;</div><div class='add'>+		elm-&gt;txhead += written;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!elm-&gt;txleft)</div><div class='add'>+		clear_bit(TTY_DO_WRITE_WAKEUP, &amp;elm-&gt;tty-&gt;flags);</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;elm-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Called by the driver when there's room for more data. */</div><div class='add'>+static void can327_ldisc_tx_wakeup(struct tty_struct *tty)</div><div class='add'>+{</div><div class='add'>+	struct can327 *elm = tty-&gt;disc_data;</div><div class='add'>+</div><div class='add'>+	schedule_work(&amp;elm-&gt;tx_work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ELM327 can only handle bitrates that are integer divisors of 500 kHz,</div><div class='add'>+ * or 7/8 of that. Divisors are 1 to 64.</div><div class='add'>+ * Currently we don't implement support for 7/8 rates.</div><div class='add'>+ */</div><div class='add'>+static const u32 can327_bitrate_const[] = {</div><div class='add'>+	7812,  7936,  8064,  8196,   8333,   8474,   8620,   8771,</div><div class='add'>+	8928,  9090,  9259,  9433,   9615,   9803,   10000,  10204,</div><div class='add'>+	10416, 10638, 10869, 11111,  11363,  11627,  11904,  12195,</div><div class='add'>+	12500, 12820, 13157, 13513,  13888,  14285,  14705,  15151,</div><div class='add'>+	15625, 16129, 16666, 17241,  17857,  18518,  19230,  20000,</div><div class='add'>+	20833, 21739, 22727, 23809,  25000,  26315,  27777,  29411,</div><div class='add'>+	31250, 33333, 35714, 38461,  41666,  45454,  50000,  55555,</div><div class='add'>+	62500, 71428, 83333, 100000, 125000, 166666, 250000, 500000</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int can327_ldisc_open(struct tty_struct *tty)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev;</div><div class='add'>+	struct can327 *elm;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!capable(CAP_NET_ADMIN))</div><div class='add'>+		return -EPERM;</div><div class='add'>+</div><div class='add'>+	if (!tty-&gt;ops-&gt;write)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	dev = alloc_candev(sizeof(struct can327), 0);</div><div class='add'>+	if (!dev)</div><div class='add'>+		return -ENFILE;</div><div class='add'>+	elm = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	/* Configure TTY interface */</div><div class='add'>+	tty-&gt;receive_room = 65536; /* We don't flow control */</div><div class='add'>+	spin_lock_init(&amp;elm-&gt;lock);</div><div class='add'>+	INIT_WORK(&amp;elm-&gt;tx_work, can327_ldisc_tx_worker);</div><div class='add'>+</div><div class='add'>+	/* Configure CAN metadata */</div><div class='add'>+	elm-&gt;can.bitrate_const = can327_bitrate_const;</div><div class='add'>+	elm-&gt;can.bitrate_const_cnt = ARRAY_SIZE(can327_bitrate_const);</div><div class='add'>+	elm-&gt;can.ctrlmode_supported = CAN_CTRLMODE_LISTENONLY;</div><div class='add'>+</div><div class='add'>+	/* Configure netdev interface */</div><div class='add'>+	elm-&gt;dev = dev;</div><div class='add'>+	dev-&gt;netdev_ops = &amp;can327_netdev_ops;</div><div class='add'>+	dev-&gt;ethtool_ops = &amp;can327_ethtool_ops;</div><div class='add'>+</div><div class='add'>+	/* Mark ldisc channel as alive */</div><div class='add'>+	elm-&gt;tty = tty;</div><div class='add'>+	tty-&gt;disc_data = elm;</div><div class='add'>+</div><div class='add'>+	/* Let 'er rip */</div><div class='add'>+	err = register_candev(elm-&gt;dev);</div><div class='add'>+	if (err) {</div><div class='add'>+		free_candev(elm-&gt;dev);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev_info(elm-&gt;dev, "can327 on %s.\n", tty-&gt;name);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Close down a can327 channel.</div><div class='add'>+ * This means flushing out any pending queues, and then returning.</div><div class='add'>+ * This call is serialized against other ldisc functions:</div><div class='add'>+ * Once this is called, no other ldisc function of ours is entered.</div><div class='add'>+ *</div><div class='add'>+ * We also use this function for a hangup event.</div><div class='add'>+ */</div><div class='add'>+static void can327_ldisc_close(struct tty_struct *tty)</div><div class='add'>+{</div><div class='add'>+	struct can327 *elm = tty-&gt;disc_data;</div><div class='add'>+</div><div class='add'>+	/* unregister_netdev() calls .ndo_stop() so we don't have to. */</div><div class='add'>+	unregister_candev(elm-&gt;dev);</div><div class='add'>+</div><div class='add'>+	/* Give UART one final chance to flush.</div><div class='add'>+	 * No need to clear TTY_DO_WRITE_WAKEUP since .write_wakeup() is</div><div class='add'>+	 * serialised against .close() and will not be called once we return.</div><div class='add'>+	 */</div><div class='add'>+	flush_work(&amp;elm-&gt;tx_work);</div><div class='add'>+</div><div class='add'>+	/* Mark channel as dead */</div><div class='add'>+	spin_lock_bh(&amp;elm-&gt;lock);</div><div class='add'>+	tty-&gt;disc_data = NULL;</div><div class='add'>+	elm-&gt;tty = NULL;</div><div class='add'>+	spin_unlock_bh(&amp;elm-&gt;lock);</div><div class='add'>+</div><div class='add'>+	netdev_info(elm-&gt;dev, "can327 off %s.\n", tty-&gt;name);</div><div class='add'>+</div><div class='add'>+	free_candev(elm-&gt;dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int can327_ldisc_ioctl(struct tty_struct *tty, unsigned int cmd,</div><div class='add'>+			      unsigned long arg)</div><div class='add'>+{</div><div class='add'>+	struct can327 *elm = tty-&gt;disc_data;</div><div class='add'>+	unsigned int tmp;</div><div class='add'>+</div><div class='add'>+	switch (cmd) {</div><div class='add'>+	case SIOCGIFNAME:</div><div class='add'>+		tmp = strnlen(elm-&gt;dev-&gt;name, IFNAMSIZ - 1) + 1;</div><div class='add'>+		if (copy_to_user((void __user *)arg, elm-&gt;dev-&gt;name, tmp))</div><div class='add'>+			return -EFAULT;</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	case SIOCSIFHWADDR:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		return tty_mode_ioctl(tty, cmd, arg);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct tty_ldisc_ops can327_ldisc = {</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+	.name = KBUILD_MODNAME,</div><div class='add'>+	.num = N_CAN327,</div><div class='add'>+	.receive_buf = can327_ldisc_rx,</div><div class='add'>+	.write_wakeup = can327_ldisc_tx_wakeup,</div><div class='add'>+	.open = can327_ldisc_open,</div><div class='add'>+	.close = can327_ldisc_close,</div><div class='add'>+	.ioctl = can327_ldisc_ioctl,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init can327_init(void)</div><div class='add'>+{</div><div class='add'>+	int status;</div><div class='add'>+</div><div class='add'>+	status = tty_register_ldisc(&amp;can327_ldisc);</div><div class='add'>+	if (status)</div><div class='add'>+		pr_err("Can't register line discipline\n");</div><div class='add'>+</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit can327_exit(void)</div><div class='add'>+{</div><div class='add'>+	/* This will only be called when all channels have been closed by</div><div class='add'>+	 * userspace - tty_ldisc.c takes care of the module's refcount.</div><div class='add'>+	 */</div><div class='add'>+	tty_unregister_ldisc(&amp;can327_ldisc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(can327_init);</div><div class='add'>+module_exit(can327_exit);</div><div class='add'>+</div><div class='add'>+MODULE_ALIAS_LDISC(N_CAN327);</div><div class='add'>+MODULE_DESCRIPTION("ELM327 based CAN interface");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_AUTHOR("Max Staudt &lt;max@enpas.org&gt;");</div><div class='head'>diff --git a/drivers/net/can/cc770/Kconfig b/drivers/net/can/cc770/Kconfig<br/>index 6a9a5ba79220..aae25c2f849e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/cc770/Kconfig?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/cc770/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/cc770/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/cc770/Kconfig</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> menuconfig CAN_CC770</div><div class='ctx'> 	tristate "Bosch CC770 and Intel AN82527 devices"</div><div class='ctx'> 	depends on HAS_IOMEM</div><div class='hunk'>@@ -6,14 +7,15 @@ if CAN_CC770</div><div class='ctx'> </div><div class='ctx'> config CAN_CC770_ISA</div><div class='ctx'> 	tristate "ISA Bus based legacy CC770 driver"</div><div class='del'>-	---help---</div><div class='add'>+	depends on HAS_IOPORT</div><div class='add'>+	help</div><div class='ctx'> 	  This driver adds legacy support for CC770 and AN82527 chips</div><div class='ctx'> 	  connected to the ISA bus using I/O port, memory mapped or</div><div class='ctx'> 	  indirect access.</div><div class='ctx'> </div><div class='ctx'> config CAN_CC770_PLATFORM</div><div class='ctx'> 	tristate "Generic Platform Bus based CC770 driver"</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  This driver adds support for the CC770 and AN82527 chips</div><div class='ctx'> 	  connected to the "platform bus" (Linux abstraction for directly</div><div class='ctx'> 	  to the processor attached devices).</div><div class='head'>diff --git a/drivers/net/can/cc770/Makefile b/drivers/net/can/cc770/Makefile<br/>index 8657f879ae19..65e8549f2e45 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/cc770/Makefile?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/cc770/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/cc770/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/cc770/Makefile</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> #</div><div class='ctx'> #  Makefile for the Bosch CC770 CAN controller drivers.</div><div class='ctx'> #</div><div class='head'>diff --git a/drivers/net/can/cc770/cc770.c b/drivers/net/can/cc770/cc770.c<br/>index 70a8cbb29e75..8d5abd643c06 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/cc770/cc770.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/cc770/cc770.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/cc770/cc770.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/cc770/cc770.c</a></div><div class='hunk'>@@ -1,16 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='ctx'>  * Core driver for the CC770 and AN82527 CAN controllers</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2009, 2011 Wolfgang Grandegger &lt;wg@grandegger.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the version 2 of the GNU General Public License</div><div class='del'>- * as published by the Free Software Foundation</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='hunk'>@@ -25,6 +17,7 @@</div><div class='ctx'> #include &lt;linux/ptrace.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/if_arp.h&gt;</div><div class='ctx'> #include &lt;linux/if_ether.h&gt;</div><div class='hunk'>@@ -67,13 +60,13 @@ MODULE_DESCRIPTION(KBUILD_MODNAME "CAN netdevice driver");</div><div class='ctx'>  * otherwise 11 bit SFF messages.</div><div class='ctx'>  */</div><div class='ctx'> static int msgobj15_eff;</div><div class='del'>-module_param(msgobj15_eff, int, S_IRUGO);</div><div class='add'>+module_param(msgobj15_eff, int, 0444);</div><div class='ctx'> MODULE_PARM_DESC(msgobj15_eff, "Extended 29-bit frames for message object 15 "</div><div class='ctx'> 		 "(default: 11-bit standard frames)");</div><div class='ctx'> </div><div class='ctx'> static int i82527_compat;</div><div class='del'>-module_param(i82527_compat, int, S_IRUGO);</div><div class='del'>-MODULE_PARM_DESC(i82527_compat, "Strict Intel 82527 comptibility mode "</div><div class='add'>+module_param(i82527_compat, int, 0444);</div><div class='add'>+MODULE_PARM_DESC(i82527_compat, "Strict Intel 82527 compatibility mode "</div><div class='ctx'> 		 "without using additional functions");</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -390,37 +383,23 @@ static int cc770_get_berr_counter(const struct net_device *dev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static netdev_tx_t cc770_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='add'>+static void cc770_tx(struct net_device *dev, int mo)</div><div class='ctx'> {</div><div class='ctx'> 	struct cc770_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='del'>-	struct can_frame *cf = (struct can_frame *)skb-&gt;data;</div><div class='del'>-	unsigned int mo = obj2msgobj(CC770_OBJ_TX);</div><div class='add'>+	struct can_frame *cf = (struct can_frame *)priv-&gt;tx_skb-&gt;data;</div><div class='ctx'> 	u8 dlc, rtr;</div><div class='ctx'> 	u32 id;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	if (can_dropped_invalid_skb(dev, skb))</div><div class='del'>-		return NETDEV_TX_OK;</div><div class='del'>-</div><div class='del'>-	if ((cc770_read_reg(priv,</div><div class='del'>-			    msgobj[mo].ctrl1) &amp; TXRQST_UNC) == TXRQST_SET) {</div><div class='del'>-		netdev_err(dev, "TX register is still occupied!\n");</div><div class='del'>-		return NETDEV_TX_BUSY;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	netif_stop_queue(dev);</div><div class='del'>-</div><div class='del'>-	dlc = cf-&gt;can_dlc;</div><div class='add'>+	dlc = cf-&gt;len;</div><div class='ctx'> 	id = cf-&gt;can_id;</div><div class='del'>-	if (cf-&gt;can_id &amp; CAN_RTR_FLAG)</div><div class='del'>-		rtr = 0;</div><div class='del'>-	else</div><div class='del'>-		rtr = MSGCFG_DIR;</div><div class='add'>+	rtr = cf-&gt;can_id &amp; CAN_RTR_FLAG ? 0 : MSGCFG_DIR;</div><div class='add'>+</div><div class='add'>+	cc770_write_reg(priv, msgobj[mo].ctrl0,</div><div class='add'>+			MSGVAL_RES | TXIE_RES | RXIE_RES | INTPND_RES);</div><div class='ctx'> 	cc770_write_reg(priv, msgobj[mo].ctrl1,</div><div class='ctx'> 			RMTPND_RES | TXRQST_RES | CPUUPD_SET | NEWDAT_RES);</div><div class='del'>-	cc770_write_reg(priv, msgobj[mo].ctrl0,</div><div class='del'>-			MSGVAL_SET | TXIE_SET | RXIE_RES | INTPND_RES);</div><div class='add'>+</div><div class='ctx'> 	if (id &amp; CAN_EFF_FLAG) {</div><div class='ctx'> 		id &amp;= CAN_EFF_MASK;</div><div class='ctx'> 		cc770_write_reg(priv, msgobj[mo].config,</div><div class='hunk'>@@ -439,22 +418,30 @@ static netdev_tx_t cc770_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	for (i = 0; i &lt; dlc; i++)</div><div class='ctx'> 		cc770_write_reg(priv, msgobj[mo].data[i], cf-&gt;data[i]);</div><div class='ctx'> </div><div class='del'>-	/* Store echo skb before starting the transfer */</div><div class='del'>-	can_put_echo_skb(skb, dev, 0);</div><div class='del'>-</div><div class='ctx'> 	cc770_write_reg(priv, msgobj[mo].ctrl1,</div><div class='del'>-			RMTPND_RES | TXRQST_SET | CPUUPD_RES | NEWDAT_UNC);</div><div class='add'>+			RMTPND_UNC | TXRQST_SET | CPUUPD_RES | NEWDAT_UNC);</div><div class='add'>+	cc770_write_reg(priv, msgobj[mo].ctrl0,</div><div class='add'>+			MSGVAL_SET | TXIE_SET | RXIE_SET | INTPND_UNC);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	stats-&gt;tx_bytes += dlc;</div><div class='add'>+static netdev_tx_t cc770_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct cc770_priv *priv = netdev_priv(dev);</div><div class='add'>+	unsigned int mo = obj2msgobj(CC770_OBJ_TX);</div><div class='ctx'> </div><div class='add'>+	if (can_dev_dropped_skb(dev, skb))</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * HM: We had some cases of repeated IRQs so make sure the</div><div class='del'>-	 * INT is acknowledged I know it's already further up, but</div><div class='del'>-	 * doing again fixed the issue</div><div class='del'>-	 */</div><div class='del'>-	cc770_write_reg(priv, msgobj[mo].ctrl0,</div><div class='del'>-			MSGVAL_UNC | TXIE_UNC | RXIE_UNC | INTPND_RES);</div><div class='add'>+	netif_stop_queue(dev);</div><div class='add'>+</div><div class='add'>+	if ((cc770_read_reg(priv,</div><div class='add'>+			    msgobj[mo].ctrl1) &amp; TXRQST_UNC) == TXRQST_SET) {</div><div class='add'>+		netdev_err(dev, "TX register is still occupied!\n");</div><div class='add'>+		return NETDEV_TX_BUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;tx_skb = skb;</div><div class='add'>+	cc770_tx(dev, mo);</div><div class='ctx'> </div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> }</div><div class='hunk'>@@ -484,7 +471,7 @@ static void cc770_rx(struct net_device *dev, unsigned int mo, u8 ctrl1)</div><div class='ctx'> 		cf-&gt;can_id = CAN_RTR_FLAG;</div><div class='ctx'> 		if (config &amp; MSGCFG_XTD)</div><div class='ctx'> 			cf-&gt;can_id |= CAN_EFF_FLAG;</div><div class='del'>-		cf-&gt;can_dlc = 0;</div><div class='add'>+		cf-&gt;len = 0;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (config &amp; MSGCFG_XTD) {</div><div class='ctx'> 			id = cc770_read_reg(priv, msgobj[mo].id[3]);</div><div class='hunk'>@@ -500,20 +487,20 @@ static void cc770_rx(struct net_device *dev, unsigned int mo, u8 ctrl1)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		cf-&gt;can_id = id;</div><div class='del'>-		cf-&gt;can_dlc = get_can_dlc((config &amp; 0xf0) &gt;&gt; 4);</div><div class='del'>-		for (i = 0; i &lt; cf-&gt;can_dlc; i++)</div><div class='add'>+		cf-&gt;len = can_cc_dlc2len((config &amp; 0xf0) &gt;&gt; 4);</div><div class='add'>+		for (i = 0; i &lt; cf-&gt;len; i++)</div><div class='ctx'> 			cf-&gt;data[i] = cc770_read_reg(priv, msgobj[mo].data[i]);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='add'>+		stats-&gt;rx_bytes += cf-&gt;len;</div><div class='add'>+	}</div><div class='ctx'> 	stats-&gt;rx_packets++;</div><div class='del'>-	stats-&gt;rx_bytes += cf-&gt;can_dlc;</div><div class='add'>+</div><div class='ctx'> 	netif_rx(skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int cc770_err(struct net_device *dev, u8 status)</div><div class='ctx'> {</div><div class='ctx'> 	struct cc770_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='ctx'> 	struct can_frame *cf;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	u8 lec;</div><div class='hunk'>@@ -526,6 +513,7 @@ static int cc770_err(struct net_device *dev, u8 status)</div><div class='ctx'> </div><div class='ctx'> 	/* Use extended functions of the CC770 */</div><div class='ctx'> 	if (priv-&gt;control_normal_mode &amp; CTRL_EAF) {</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_CNT;</div><div class='ctx'> 		cf-&gt;data[6] = cc770_read_reg(priv, tx_error_counter);</div><div class='ctx'> 		cf-&gt;data[7] = cc770_read_reg(priv, rx_error_counter);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -552,7 +540,7 @@ static int cc770_err(struct net_device *dev, u8 status)</div><div class='ctx'> 			priv-&gt;can.can_stats.error_warning++;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='del'>-		/* Back to error avtive */</div><div class='add'>+		/* Back to error active */</div><div class='ctx'> 		cf-&gt;can_id |= CAN_ERR_PROT;</div><div class='ctx'> 		cf-&gt;data[2] = CAN_ERR_PROT_ACTIVE;</div><div class='ctx'> 		priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='hunk'>@@ -578,15 +566,13 @@ static int cc770_err(struct net_device *dev, u8 status)</div><div class='ctx'> 				cf-&gt;data[2] |= CAN_ERR_PROT_BIT0;</div><div class='ctx'> 				break;</div><div class='ctx'> 			case STAT_LEC_CRC:</div><div class='del'>-				cf-&gt;data[3] |= CAN_ERR_PROT_LOC_CRC_SEQ;</div><div class='add'>+				cf-&gt;data[3] = CAN_ERR_PROT_LOC_CRC_SEQ;</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-	stats-&gt;rx_packets++;</div><div class='del'>-	stats-&gt;rx_bytes += cf-&gt;can_dlc;</div><div class='ctx'> 	netif_rx(skb);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -680,19 +666,42 @@ static void cc770_tx_interrupt(struct net_device *dev, unsigned int o)</div><div class='ctx'> 	struct cc770_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='ctx'> 	unsigned int mo = obj2msgobj(o);</div><div class='add'>+	u8 ctrl1;</div><div class='add'>+</div><div class='add'>+	ctrl1 = cc770_read_reg(priv, msgobj[mo].ctrl1);</div><div class='ctx'> </div><div class='del'>-	/* Nothing more to send, switch off interrupts */</div><div class='ctx'> 	cc770_write_reg(priv, msgobj[mo].ctrl0,</div><div class='ctx'> 			MSGVAL_RES | TXIE_RES | RXIE_RES | INTPND_RES);</div><div class='del'>-	/*</div><div class='del'>-	 * We had some cases of repeated IRQ so make sure the</div><div class='del'>-	 * INT is acknowledged</div><div class='add'>+	cc770_write_reg(priv, msgobj[mo].ctrl1,</div><div class='add'>+			RMTPND_RES | TXRQST_RES | MSGLST_RES | NEWDAT_RES);</div><div class='add'>+</div><div class='add'>+	if (unlikely(!priv-&gt;tx_skb)) {</div><div class='add'>+		netdev_err(dev, "missing tx skb in tx interrupt\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (unlikely(ctrl1 &amp; MSGLST_SET)) {</div><div class='add'>+		stats-&gt;rx_over_errors++;</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* When the CC770 is sending an RTR message and it receives a regular</div><div class='add'>+	 * message that matches the id of the RTR message, it will overwrite the</div><div class='add'>+	 * outgoing message in the TX register. When this happens we must</div><div class='add'>+	 * process the received message and try to transmit the outgoing skb</div><div class='add'>+	 * again.</div><div class='ctx'> 	 */</div><div class='del'>-	cc770_write_reg(priv, msgobj[mo].ctrl0,</div><div class='del'>-			MSGVAL_UNC | TXIE_UNC | RXIE_UNC | INTPND_RES);</div><div class='add'>+	if (unlikely(ctrl1 &amp; NEWDAT_SET)) {</div><div class='add'>+		cc770_rx(dev, mo, ctrl1);</div><div class='add'>+		cc770_tx(dev, mo);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='add'>+	can_put_echo_skb(priv-&gt;tx_skb, dev, 0, 0);</div><div class='add'>+	stats-&gt;tx_bytes += can_get_echo_skb(dev, 0, NULL);</div><div class='ctx'> 	stats-&gt;tx_packets++;</div><div class='del'>-	can_get_echo_skb(dev, 0);</div><div class='add'>+	priv-&gt;tx_skb = NULL;</div><div class='add'>+</div><div class='ctx'> 	netif_wake_queue(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -804,6 +813,7 @@ struct net_device *alloc_cc770dev(int sizeof_priv)</div><div class='ctx'> 	priv-&gt;can.do_set_bittiming = cc770_set_bittiming;</div><div class='ctx'> 	priv-&gt;can.do_set_mode = cc770_set_mode;</div><div class='ctx'> 	priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES;</div><div class='add'>+	priv-&gt;tx_skb = NULL;</div><div class='ctx'> </div><div class='ctx'> 	memcpy(priv-&gt;obj_flags, cc770_obj_flags, sizeof(cc770_obj_flags));</div><div class='ctx'> </div><div class='hunk'>@@ -824,7 +834,10 @@ static const struct net_device_ops cc770_netdev_ops = {</div><div class='ctx'> 	.ndo_open = cc770_open,</div><div class='ctx'> 	.ndo_stop = cc770_close,</div><div class='ctx'> 	.ndo_start_xmit = cc770_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops cc770_ethtool_ops = {</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int register_cc770dev(struct net_device *dev)</div><div class='hunk'>@@ -837,6 +850,7 @@ int register_cc770dev(struct net_device *dev)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;netdev_ops = &amp;cc770_netdev_ops;</div><div class='add'>+	dev-&gt;ethtool_ops = &amp;cc770_ethtool_ops;</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;flags |= IFF_ECHO;	/* we support local echo */</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/can/cc770/cc770.h b/drivers/net/can/cc770/cc770.h<br/>index a1739db98d91..0628fd9e1980 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/cc770/cc770.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/cc770/cc770.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/cc770/cc770.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/cc770/cc770.h</a></div><div class='hunk'>@@ -1,16 +1,8 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='ctx'> /*</div><div class='ctx'>  * Core driver for the CC770 and AN82527 CAN controllers</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2009, 2011 Wolfgang Grandegger &lt;wg@grandegger.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the version 2 of the GNU General Public License</div><div class='del'>- * as published by the Free Software Foundation</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef CC770_DEV_H</div><div class='hunk'>@@ -192,7 +184,9 @@ struct cc770_priv {</div><div class='ctx'> 	u8 control_normal_mode;	/* Control register for normal mode */</div><div class='ctx'> 	u8 cpu_interface;	/* CPU interface register */</div><div class='ctx'> 	u8 clkout;		/* Clock out register */</div><div class='del'>-	u8 bus_config;		/* Bus conffiguration register */</div><div class='add'>+	u8 bus_config;		/* Bus configuration register */</div><div class='add'>+</div><div class='add'>+	struct sk_buff *tx_skb;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct net_device *alloc_cc770dev(int sizeof_priv);</div><div class='head'>diff --git a/drivers/net/can/cc770/cc770_isa.c b/drivers/net/can/cc770/cc770_isa.c<br/>index e0d15711e9ac..d06762817153 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/cc770/cc770_isa.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/cc770/cc770_isa.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/cc770/cc770_isa.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/cc770/cc770_isa.c</a></div><div class='hunk'>@@ -1,16 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='ctx'>  * Driver for CC770 and AN82527 CAN controllers on the legacy ISA bus</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2009, 2011 Wolfgang Grandegger &lt;wg@grandegger.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the version 2 of the GNU General Public License</div><div class='del'>- * as published by the Free Software Foundation</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -82,29 +74,29 @@ static u8 cor[MAXDEV] = {[0 ... (MAXDEV - 1)] = 0xff};</div><div class='ctx'> static u8 bcr[MAXDEV] = {[0 ... (MAXDEV - 1)] = 0xff};</div><div class='ctx'> static int indirect[MAXDEV] = {[0 ... (MAXDEV - 1)] = -1};</div><div class='ctx'> </div><div class='del'>-module_param_array(port, ulong, NULL, S_IRUGO);</div><div class='add'>+module_param_hw_array(port, ulong, ioport, NULL, 0444);</div><div class='ctx'> MODULE_PARM_DESC(port, "I/O port number");</div><div class='ctx'> </div><div class='del'>-module_param_array(mem, ulong, NULL, S_IRUGO);</div><div class='add'>+module_param_hw_array(mem, ulong, iomem, NULL, 0444);</div><div class='ctx'> MODULE_PARM_DESC(mem, "I/O memory address");</div><div class='ctx'> </div><div class='del'>-module_param_array(indirect, int, NULL, S_IRUGO);</div><div class='add'>+module_param_hw_array(indirect, int, ioport, NULL, 0444);</div><div class='ctx'> MODULE_PARM_DESC(indirect, "Indirect access via address and data port");</div><div class='ctx'> </div><div class='del'>-module_param_array(irq, int, NULL, S_IRUGO);</div><div class='add'>+module_param_hw_array(irq, int, irq, NULL, 0444);</div><div class='ctx'> MODULE_PARM_DESC(irq, "IRQ number");</div><div class='ctx'> </div><div class='del'>-module_param_array(clk, int, NULL, S_IRUGO);</div><div class='add'>+module_param_array(clk, int, NULL, 0444);</div><div class='ctx'> MODULE_PARM_DESC(clk, "External oscillator clock frequency "</div><div class='ctx'> 		 "(default=16000000 [16 MHz])");</div><div class='ctx'> </div><div class='del'>-module_param_array(cir, byte, NULL, S_IRUGO);</div><div class='add'>+module_param_array(cir, byte, NULL, 0444);</div><div class='ctx'> MODULE_PARM_DESC(cir, "CPU interface register (default=0x40 [DSC])");</div><div class='ctx'> </div><div class='del'>-module_param_array(cor, byte, NULL, S_IRUGO);</div><div class='add'>+module_param_array(cor, byte, NULL, 0444);</div><div class='ctx'> MODULE_PARM_DESC(cor, "Clockout register (default=0x00)");</div><div class='ctx'> </div><div class='del'>-module_param_array(bcr, byte, NULL, S_IRUGO);</div><div class='add'>+module_param_array(bcr, byte, NULL, 0444);</div><div class='ctx'> MODULE_PARM_DESC(bcr, "Bus configuration register (default=0x40 [CBY])");</div><div class='ctx'> </div><div class='ctx'> #define CC770_IOSIZE          0x20</div><div class='hunk'>@@ -183,7 +175,7 @@ static int cc770_isa_probe(struct platform_device *pdev)</div><div class='ctx'> 			err = -EBUSY;</div><div class='ctx'> 			goto exit;</div><div class='ctx'> 		}</div><div class='del'>-		base = ioremap_nocache(mem[idx], iosize);</div><div class='add'>+		base = ioremap(mem[idx], iosize);</div><div class='ctx'> 		if (!base) {</div><div class='ctx'> 			err = -ENOMEM;</div><div class='ctx'> 			goto exit_release;</div><div class='hunk'>@@ -272,26 +264,28 @@ static int cc770_isa_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev,</div><div class='ctx'> 			"couldn't register device (err=%d)\n", err);</div><div class='del'>-		goto exit_unmap;</div><div class='add'>+		goto exit_free;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dev_info(&amp;pdev-&gt;dev, "device registered (reg_base=0x%p, irq=%d)\n",</div><div class='ctx'> 		 priv-&gt;reg_base, dev-&gt;irq);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>- exit_unmap:</div><div class='add'>+exit_free:</div><div class='add'>+	free_cc770dev(dev);</div><div class='add'>+exit_unmap:</div><div class='ctx'> 	if (mem[idx])</div><div class='ctx'> 		iounmap(base);</div><div class='del'>- exit_release:</div><div class='add'>+exit_release:</div><div class='ctx'> 	if (mem[idx])</div><div class='ctx'> 		release_mem_region(mem[idx], iosize);</div><div class='ctx'> 	else</div><div class='ctx'> 		release_region(port[idx], iosize);</div><div class='del'>- exit:</div><div class='add'>+exit:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int cc770_isa_remove(struct platform_device *pdev)</div><div class='add'>+static void cc770_isa_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = platform_get_drvdata(pdev);</div><div class='ctx'> 	struct cc770_priv *priv = netdev_priv(dev);</div><div class='hunk'>@@ -309,8 +303,6 @@ static int cc770_isa_remove(struct platform_device *pdev)</div><div class='ctx'> 			release_region(port[idx], CC770_IOSIZE);</div><div class='ctx'> 	}</div><div class='ctx'> 	free_cc770dev(dev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver cc770_isa_driver = {</div><div class='head'>diff --git a/drivers/net/can/cc770/cc770_platform.c b/drivers/net/can/cc770/cc770_platform.c<br/>index 866e5e12fdd2..b6c4f02ffb97 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/cc770/cc770_platform.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/cc770/cc770_platform.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/cc770/cc770_platform.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/cc770/cc770_platform.c</a></div><div class='hunk'>@@ -1,16 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='ctx'>  * Driver for CC770 and AN82527 CAN controllers on the platform bus</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2009, 2011 Wolfgang Grandegger &lt;wg@grandegger.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the version 2 of the GNU General Public License</div><div class='del'>- * as published by the Free Software Foundation</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -78,17 +70,10 @@ static void cc770_platform_write_reg(const struct cc770_priv *priv, int reg,</div><div class='ctx'> static int cc770_get_of_node_data(struct platform_device *pdev,</div><div class='ctx'> 				  struct cc770_priv *priv)</div><div class='ctx'> {</div><div class='add'>+	u32 clkext = CC770_PLATFORM_CAN_CLOCK, clkout = 0;</div><div class='ctx'> 	struct device_node *np = pdev-&gt;dev.of_node;</div><div class='del'>-	const u32 *prop;</div><div class='del'>-	int prop_size;</div><div class='del'>-	u32 clkext;</div><div class='del'>-</div><div class='del'>-	prop = of_get_property(np, "bosch,external-clock-frequency",</div><div class='del'>-			       &amp;prop_size);</div><div class='del'>-	if (prop &amp;&amp; (prop_size ==  sizeof(u32)))</div><div class='del'>-		clkext = *prop;</div><div class='del'>-	else</div><div class='del'>-		clkext = CC770_PLATFORM_CAN_CLOCK; /* default */</div><div class='add'>+</div><div class='add'>+	of_property_read_u32(np, "bosch,external-clock-frequency", &amp;clkext);</div><div class='ctx'> 	priv-&gt;can.clock.freq = clkext;</div><div class='ctx'> </div><div class='ctx'> 	/* The system clock may not exceed 10 MHz */</div><div class='hunk'>@@ -101,41 +86,38 @@ static int cc770_get_of_node_data(struct platform_device *pdev,</div><div class='ctx'> 	if (priv-&gt;can.clock.freq &gt; 8000000)</div><div class='ctx'> 		priv-&gt;cpu_interface |= CPUIF_DMC;</div><div class='ctx'> </div><div class='del'>-	if (of_get_property(np, "bosch,divide-memory-clock", NULL))</div><div class='add'>+	if (of_property_read_bool(np, "bosch,divide-memory-clock"))</div><div class='ctx'> 		priv-&gt;cpu_interface |= CPUIF_DMC;</div><div class='del'>-	if (of_get_property(np, "bosch,iso-low-speed-mux", NULL))</div><div class='add'>+	if (of_property_read_bool(np, "bosch,iso-low-speed-mux"))</div><div class='ctx'> 		priv-&gt;cpu_interface |= CPUIF_MUX;</div><div class='ctx'> </div><div class='del'>-	if (!of_get_property(np, "bosch,no-comperator-bypass", NULL))</div><div class='add'>+	if (!of_property_read_bool(np, "bosch,no-comperator-bypass"))</div><div class='ctx'> 		priv-&gt;bus_config |= BUSCFG_CBY;</div><div class='del'>-	if (of_get_property(np, "bosch,disconnect-rx0-input", NULL))</div><div class='add'>+	if (of_property_read_bool(np, "bosch,disconnect-rx0-input"))</div><div class='ctx'> 		priv-&gt;bus_config |= BUSCFG_DR0;</div><div class='del'>-	if (of_get_property(np, "bosch,disconnect-rx1-input", NULL))</div><div class='add'>+	if (of_property_read_bool(np, "bosch,disconnect-rx1-input"))</div><div class='ctx'> 		priv-&gt;bus_config |= BUSCFG_DR1;</div><div class='del'>-	if (of_get_property(np, "bosch,disconnect-tx1-output", NULL))</div><div class='add'>+	if (of_property_read_bool(np, "bosch,disconnect-tx1-output"))</div><div class='ctx'> 		priv-&gt;bus_config |= BUSCFG_DT1;</div><div class='del'>-	if (of_get_property(np, "bosch,polarity-dominant", NULL))</div><div class='add'>+	if (of_property_read_bool(np, "bosch,polarity-dominant"))</div><div class='ctx'> 		priv-&gt;bus_config |= BUSCFG_POL;</div><div class='ctx'> </div><div class='del'>-	prop = of_get_property(np, "bosch,clock-out-frequency", &amp;prop_size);</div><div class='del'>-	if (prop &amp;&amp; (prop_size == sizeof(u32)) &amp;&amp; *prop &gt; 0) {</div><div class='del'>-		u32 cdv = clkext / *prop;</div><div class='del'>-		int slew;</div><div class='add'>+	of_property_read_u32(np, "bosch,clock-out-frequency", &amp;clkout);</div><div class='add'>+	if (clkout &gt; 0) {</div><div class='add'>+		u32 cdv = clkext / clkout;</div><div class='ctx'> </div><div class='ctx'> 		if (cdv &gt; 0 &amp;&amp; cdv &lt; 16) {</div><div class='add'>+			u32 slew;</div><div class='add'>+</div><div class='ctx'> 			priv-&gt;cpu_interface |= CPUIF_CEN;</div><div class='ctx'> 			priv-&gt;clkout |= (cdv - 1) &amp; CLKOUT_CD_MASK;</div><div class='ctx'> </div><div class='del'>-			prop = of_get_property(np, "bosch,slew-rate",</div><div class='del'>-					       &amp;prop_size);</div><div class='del'>-			if (prop &amp;&amp; (prop_size == sizeof(u32))) {</div><div class='del'>-				slew = *prop;</div><div class='del'>-			} else {</div><div class='add'>+			if (of_property_read_u32(np, "bosch,slew-rate", &amp;slew)) {</div><div class='ctx'> 				/* Determine default slew rate */</div><div class='ctx'> 				slew = (CLKOUT_SL_MASK &gt;&gt;</div><div class='ctx'> 					CLKOUT_SL_SHIFT) -</div><div class='ctx'> 					((cdv * clkext - 1) / 8000000);</div><div class='del'>-				if (slew &lt; 0)</div><div class='add'>+				if (slew &gt; (CLKOUT_SL_MASK &gt;&gt; CLKOUT_SL_SHIFT))</div><div class='ctx'> 					slew = 0;</div><div class='ctx'> 			}</div><div class='ctx'> 			priv-&gt;clkout |= (slew &lt;&lt; CLKOUT_SL_SHIFT) &amp;</div><div class='hunk'>@@ -238,7 +220,7 @@ exit_release_mem:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int cc770_platform_remove(struct platform_device *pdev)</div><div class='add'>+static void cc770_platform_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = platform_get_drvdata(pdev);</div><div class='ctx'> 	struct cc770_priv *priv = netdev_priv(dev);</div><div class='hunk'>@@ -250,8 +232,6 @@ static int cc770_platform_remove(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='ctx'> 	release_mem_region(mem-&gt;start, resource_size(mem));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id cc770_platform_table[] = {</div><div class='head'>diff --git a/drivers/net/can/ctucanfd/Kconfig b/drivers/net/can/ctucanfd/Kconfig<br/>new file mode 100644<br/>index 000000000000..f52407f5c5d8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/ctucanfd/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/ctucanfd/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,34 @@</div><div class='add'>+config CAN_CTUCANFD</div><div class='add'>+	tristate "CTU CAN-FD IP core" if COMPILE_TEST</div><div class='add'>+	help</div><div class='add'>+	  This driver adds support for the CTU CAN FD open-source IP core.</div><div class='add'>+	  More documentation and core sources at project page</div><div class='add'>+	  (https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core).</div><div class='add'>+	  The core integration to Xilinx Zynq system as platform driver</div><div class='add'>+	  is available (https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top).</div><div class='add'>+	  Implementation on Intel FPGA-based PCI Express board is available</div><div class='add'>+	  from project (https://gitlab.fel.cvut.cz/canbus/pcie-ctucanfd) and</div><div class='add'>+	  on Intel SoC from project (https://gitlab.fel.cvut.cz/canbus/intel-soc-ctucanfd).</div><div class='add'>+	  Guidepost CTU FEE CAN bus projects page https://canbus.pages.fel.cvut.cz/ .</div><div class='add'>+</div><div class='add'>+config CAN_CTUCANFD_PCI</div><div class='add'>+	tristate "CTU CAN-FD IP core PCI/PCIe driver"</div><div class='add'>+	depends on PCI</div><div class='add'>+	select CAN_CTUCANFD</div><div class='add'>+	help</div><div class='add'>+	  This driver adds PCI/PCIe support for CTU CAN-FD IP core.</div><div class='add'>+	  The project providing FPGA design for Intel EP4CGX15 based DB4CGX15</div><div class='add'>+	  PCIe board with PiKRON.com designed transceiver riser shield is available</div><div class='add'>+	  at https://gitlab.fel.cvut.cz/canbus/pcie-ctucanfd .</div><div class='add'>+</div><div class='add'>+config CAN_CTUCANFD_PLATFORM</div><div class='add'>+	tristate "CTU CAN-FD IP core platform (FPGA, SoC) driver"</div><div class='add'>+	depends on HAS_IOMEM &amp;&amp; OF</div><div class='add'>+	select CAN_CTUCANFD</div><div class='add'>+	help</div><div class='add'>+	  The core has been tested together with OpenCores SJA1000</div><div class='add'>+	  modified to be CAN FD frames tolerant on MicroZed Zynq based</div><div class='add'>+	  MZ_APO education kits designed by Petr Porazil from PiKRON.com</div><div class='add'>+	  company. FPGA design https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top.</div><div class='add'>+	  The kit description at the Computer Architectures course pages</div><div class='add'>+	  https://cw.fel.cvut.cz/wiki/courses/b35apo/documentation/mz_apo/start .</div><div class='head'>diff --git a/drivers/net/can/ctucanfd/Makefile b/drivers/net/can/ctucanfd/Makefile<br/>new file mode 100644<br/>index 000000000000..8078f1f2c30f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/ctucanfd/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/ctucanfd/Makefile</a></div><div class='hunk'>@@ -0,0 +1,10 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+#</div><div class='add'>+# Makefile for the CTU CAN-FD IP module drivers</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_CAN_CTUCANFD) := ctucanfd.o</div><div class='add'>+ctucanfd-y := ctucanfd_base.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_CAN_CTUCANFD_PCI) += ctucanfd_pci.o</div><div class='add'>+obj-$(CONFIG_CAN_CTUCANFD_PLATFORM) += ctucanfd_platform.o</div><div class='head'>diff --git a/drivers/net/can/ctucanfd/ctucanfd.h b/drivers/net/can/ctucanfd/ctucanfd.h<br/>new file mode 100644<br/>index 000000000000..0e9904f6a05d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/ctucanfd/ctucanfd.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/ctucanfd/ctucanfd.h</a></div><div class='hunk'>@@ -0,0 +1,82 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+/*******************************************************************************</div><div class='add'>+ *</div><div class='add'>+ * CTU CAN FD IP Core</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015-2018 Ondrej Ille &lt;ondrej.ille@gmail.com&gt; FEE CTU</div><div class='add'>+ * Copyright (C) 2018-2021 Ondrej Ille &lt;ondrej.ille@gmail.com&gt; self-funded</div><div class='add'>+ * Copyright (C) 2018-2019 Martin Jerabek &lt;martin.jerabek01@gmail.com&gt; FEE CTU</div><div class='add'>+ * Copyright (C) 2018-2021 Pavel Pisa &lt;pisa@cmp.felk.cvut.cz&gt; FEE CTU/self-funded</div><div class='add'>+ *</div><div class='add'>+ * Project advisors:</div><div class='add'>+ *     Jiri Novak &lt;jnovak@fel.cvut.cz&gt;</div><div class='add'>+ *     Pavel Pisa &lt;pisa@cmp.felk.cvut.cz&gt;</div><div class='add'>+ *</div><div class='add'>+ * Department of Measurement         (http://meas.fel.cvut.cz/)</div><div class='add'>+ * Faculty of Electrical Engineering (http://www.fel.cvut.cz)</div><div class='add'>+ * Czech Technical University        (http://www.cvut.cz/)</div><div class='add'>+ ******************************************************************************/</div><div class='add'>+</div><div class='add'>+#ifndef __CTUCANFD__</div><div class='add'>+#define __CTUCANFD__</div><div class='add'>+</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/list.h&gt;</div><div class='add'>+</div><div class='add'>+enum ctu_can_fd_can_registers;</div><div class='add'>+</div><div class='add'>+struct ctucan_priv {</div><div class='add'>+	struct can_priv can; /* must be first member! */</div><div class='add'>+</div><div class='add'>+	void __iomem *mem_base;</div><div class='add'>+	u32 (*read_reg)(struct ctucan_priv *priv,</div><div class='add'>+			enum ctu_can_fd_can_registers reg);</div><div class='add'>+	void (*write_reg)(struct ctucan_priv *priv,</div><div class='add'>+			  enum ctu_can_fd_can_registers reg, u32 val);</div><div class='add'>+</div><div class='add'>+	unsigned int txb_head;</div><div class='add'>+	unsigned int txb_tail;</div><div class='add'>+	u32 txb_prio;</div><div class='add'>+	unsigned int ntxbufs;</div><div class='add'>+	spinlock_t tx_lock; /* spinlock to serialize allocation and processing of TX buffers */</div><div class='add'>+</div><div class='add'>+	struct napi_struct napi;</div><div class='add'>+	struct device *dev;</div><div class='add'>+	struct clk *can_clk;</div><div class='add'>+</div><div class='add'>+	int irq_flags;</div><div class='add'>+	unsigned long drv_flags;</div><div class='add'>+</div><div class='add'>+	u32 rxfrm_first_word;</div><div class='add'>+</div><div class='add'>+	struct list_head peers_on_pdev;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ctucan_probe_common - Device type independent registration call</div><div class='add'>+ *</div><div class='add'>+ * This function does all the memory allocation and registration for the CAN</div><div class='add'>+ * device.</div><div class='add'>+ *</div><div class='add'>+ * @dev:	Handle to the generic device structure</div><div class='add'>+ * @addr:	Base address of CTU CAN FD core address</div><div class='add'>+ * @irq:	Interrupt number</div><div class='add'>+ * @ntxbufs:	Number of implemented Tx buffers</div><div class='add'>+ * @can_clk_rate: Clock rate, if 0 then clock are taken from device node</div><div class='add'>+ * @pm_enable_call: Whether pm_runtime_enable should be called</div><div class='add'>+ * @set_drvdata_fnc: Function to set network driver data for physical device</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success and failure value on error</div><div class='add'>+ */</div><div class='add'>+int ctucan_probe_common(struct device *dev, void __iomem *addr,</div><div class='add'>+			int irq, unsigned int ntxbufs,</div><div class='add'>+			unsigned long can_clk_rate,</div><div class='add'>+			int pm_enable_call,</div><div class='add'>+			void (*set_drvdata_fnc)(struct device *dev,</div><div class='add'>+						struct net_device *ndev));</div><div class='add'>+</div><div class='add'>+int ctucan_suspend(struct device *dev) __maybe_unused;</div><div class='add'>+int ctucan_resume(struct device *dev) __maybe_unused;</div><div class='add'>+</div><div class='add'>+#endif /*__CTUCANFD__*/</div><div class='head'>diff --git a/drivers/net/can/ctucanfd/ctucanfd_base.c b/drivers/net/can/ctucanfd/ctucanfd_base.c<br/>new file mode 100644<br/>index 000000000000..1e6b9e3dc2fe<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/ctucanfd/ctucanfd_base.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/ctucanfd/ctucanfd_base.c</a></div><div class='hunk'>@@ -0,0 +1,1460 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*******************************************************************************</div><div class='add'>+ *</div><div class='add'>+ * CTU CAN FD IP Core</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015-2018 Ondrej Ille &lt;ondrej.ille@gmail.com&gt; FEE CTU</div><div class='add'>+ * Copyright (C) 2018-2021 Ondrej Ille &lt;ondrej.ille@gmail.com&gt; self-funded</div><div class='add'>+ * Copyright (C) 2018-2019 Martin Jerabek &lt;martin.jerabek01@gmail.com&gt; FEE CTU</div><div class='add'>+ * Copyright (C) 2018-2022 Pavel Pisa &lt;pisa@cmp.felk.cvut.cz&gt; FEE CTU/self-funded</div><div class='add'>+ *</div><div class='add'>+ * Project advisors:</div><div class='add'>+ *     Jiri Novak &lt;jnovak@fel.cvut.cz&gt;</div><div class='add'>+ *     Pavel Pisa &lt;pisa@cmp.felk.cvut.cz&gt;</div><div class='add'>+ *</div><div class='add'>+ * Department of Measurement         (http://meas.fel.cvut.cz/)</div><div class='add'>+ * Faculty of Electrical Engineering (http://www.fel.cvut.cz)</div><div class='add'>+ * Czech Technical University        (http://www.cvut.cz/)</div><div class='add'>+ ******************************************************************************/</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/skbuff.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/can/error.h&gt;</div><div class='add'>+#include &lt;linux/pm_runtime.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ctucanfd.h"</div><div class='add'>+#include "ctucanfd_kregs.h"</div><div class='add'>+#include "ctucanfd_kframe.h"</div><div class='add'>+</div><div class='add'>+#ifdef DEBUG</div><div class='add'>+#define  ctucan_netdev_dbg(ndev, args...) \</div><div class='add'>+		netdev_dbg(ndev, args)</div><div class='add'>+#else</div><div class='add'>+#define ctucan_netdev_dbg(...) do { } while (0)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#define CTUCANFD_ID 0xCAFD</div><div class='add'>+</div><div class='add'>+/* TX buffer rotation:</div><div class='add'>+ * - when a buffer transitions to empty state, rotate order and priorities</div><div class='add'>+ * - if more buffers seem to transition at the same time, rotate by the number of buffers</div><div class='add'>+ * - it may be assumed that buffers transition to empty state in FIFO order (because we manage</div><div class='add'>+ *   priorities that way)</div><div class='add'>+ * - at frame filling, do not rotate anything, just increment buffer modulo counter</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define CTUCANFD_FLAG_RX_FFW_BUFFERED	1</div><div class='add'>+</div><div class='add'>+#define CTUCAN_STATE_TO_TEXT_ENTRY(st) \</div><div class='add'>+		[st] = #st</div><div class='add'>+</div><div class='add'>+enum ctucan_txtb_status {</div><div class='add'>+	TXT_NOT_EXIST       = 0x0,</div><div class='add'>+	TXT_RDY             = 0x1,</div><div class='add'>+	TXT_TRAN            = 0x2,</div><div class='add'>+	TXT_ABTP            = 0x3,</div><div class='add'>+	TXT_TOK             = 0x4,</div><div class='add'>+	TXT_ERR             = 0x6,</div><div class='add'>+	TXT_ABT             = 0x7,</div><div class='add'>+	TXT_ETY             = 0x8,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum ctucan_txtb_command {</div><div class='add'>+	TXT_CMD_SET_EMPTY   = 0x01,</div><div class='add'>+	TXT_CMD_SET_READY   = 0x02,</div><div class='add'>+	TXT_CMD_SET_ABORT   = 0x04</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const ctu_can_fd_bit_timing_max = {</div><div class='add'>+	.name = "ctu_can_fd",</div><div class='add'>+	.tseg1_min = 2,</div><div class='add'>+	.tseg1_max = 190,</div><div class='add'>+	.tseg2_min = 1,</div><div class='add'>+	.tseg2_max = 63,</div><div class='add'>+	.sjw_max = 31,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 8,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const ctu_can_fd_bit_timing_data_max = {</div><div class='add'>+	.name = "ctu_can_fd",</div><div class='add'>+	.tseg1_min = 2,</div><div class='add'>+	.tseg1_max = 94,</div><div class='add'>+	.tseg2_min = 1,</div><div class='add'>+	.tseg2_max = 31,</div><div class='add'>+	.sjw_max = 31,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 2,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char * const ctucan_state_strings[CAN_STATE_MAX] = {</div><div class='add'>+	CTUCAN_STATE_TO_TEXT_ENTRY(CAN_STATE_ERROR_ACTIVE),</div><div class='add'>+	CTUCAN_STATE_TO_TEXT_ENTRY(CAN_STATE_ERROR_WARNING),</div><div class='add'>+	CTUCAN_STATE_TO_TEXT_ENTRY(CAN_STATE_ERROR_PASSIVE),</div><div class='add'>+	CTUCAN_STATE_TO_TEXT_ENTRY(CAN_STATE_BUS_OFF),</div><div class='add'>+	CTUCAN_STATE_TO_TEXT_ENTRY(CAN_STATE_STOPPED),</div><div class='add'>+	CTUCAN_STATE_TO_TEXT_ENTRY(CAN_STATE_SLEEPING)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void ctucan_write32_le(struct ctucan_priv *priv,</div><div class='add'>+			      enum ctu_can_fd_can_registers reg, u32 val)</div><div class='add'>+{</div><div class='add'>+	iowrite32(val, priv-&gt;mem_base + reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ctucan_write32_be(struct ctucan_priv *priv,</div><div class='add'>+			      enum ctu_can_fd_can_registers reg, u32 val)</div><div class='add'>+{</div><div class='add'>+	iowrite32be(val, priv-&gt;mem_base + reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 ctucan_read32_le(struct ctucan_priv *priv,</div><div class='add'>+			    enum ctu_can_fd_can_registers reg)</div><div class='add'>+{</div><div class='add'>+	return ioread32(priv-&gt;mem_base + reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 ctucan_read32_be(struct ctucan_priv *priv,</div><div class='add'>+			    enum ctu_can_fd_can_registers reg)</div><div class='add'>+{</div><div class='add'>+	return ioread32be(priv-&gt;mem_base + reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ctucan_write32(struct ctucan_priv *priv, enum ctu_can_fd_can_registers reg, u32 val)</div><div class='add'>+{</div><div class='add'>+	priv-&gt;write_reg(priv, reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 ctucan_read32(struct ctucan_priv *priv, enum ctu_can_fd_can_registers reg)</div><div class='add'>+{</div><div class='add'>+	return priv-&gt;read_reg(priv, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ctucan_write_txt_buf(struct ctucan_priv *priv, enum ctu_can_fd_can_registers buf_base,</div><div class='add'>+				 u32 offset, u32 val)</div><div class='add'>+{</div><div class='add'>+	priv-&gt;write_reg(priv, buf_base + offset, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define CTU_CAN_FD_TXTNF(priv) (!!FIELD_GET(REG_STATUS_TXNF, ctucan_read32(priv, CTUCANFD_STATUS)))</div><div class='add'>+#define CTU_CAN_FD_ENABLED(priv) (!!FIELD_GET(REG_MODE_ENA, ctucan_read32(priv, CTUCANFD_MODE)))</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ctucan_state_to_str() - Converts CAN controller state code to corresponding text</div><div class='add'>+ * @state:	CAN controller state code</div><div class='add'>+ *</div><div class='add'>+ * Return: Pointer to string representation of the error state</div><div class='add'>+ */</div><div class='add'>+static const char *ctucan_state_to_str(enum can_state state)</div><div class='add'>+{</div><div class='add'>+	const char *txt = NULL;</div><div class='add'>+</div><div class='add'>+	if (state &gt;= 0 &amp;&amp; state &lt; CAN_STATE_MAX)</div><div class='add'>+		txt = ctucan_state_strings[state];</div><div class='add'>+	return txt ? txt : "UNKNOWN";</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ctucan_reset() - Issues software reset request to CTU CAN FD</div><div class='add'>+ * @ndev:	Pointer to net_device structure</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 for success, -%ETIMEDOUT if CAN controller does not leave reset</div><div class='add'>+ */</div><div class='add'>+static int ctucan_reset(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct ctucan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	int i = 100;</div><div class='add'>+</div><div class='add'>+	ctucan_write32(priv, CTUCANFD_MODE, REG_MODE_RST);</div><div class='add'>+	clear_bit(CTUCANFD_FLAG_RX_FFW_BUFFERED, &amp;priv-&gt;drv_flags);</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		u16 device_id = FIELD_GET(REG_DEVICE_ID_DEVICE_ID,</div><div class='add'>+					  ctucan_read32(priv, CTUCANFD_DEVICE_ID));</div><div class='add'>+</div><div class='add'>+		if (device_id == 0xCAFD)</div><div class='add'>+			return 0;</div><div class='add'>+		if (!i--) {</div><div class='add'>+			netdev_warn(ndev, "device did not leave reset\n");</div><div class='add'>+			return -ETIMEDOUT;</div><div class='add'>+		}</div><div class='add'>+		usleep_range(100, 200);</div><div class='add'>+	} while (1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ctucan_set_btr() - Sets CAN bus bit timing in CTU CAN FD</div><div class='add'>+ * @ndev:	Pointer to net_device structure</div><div class='add'>+ * @bt:		Pointer to Bit timing structure</div><div class='add'>+ * @nominal:	True - Nominal bit timing, False - Data bit timing</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 - OK, -%EPERM if controller is enabled</div><div class='add'>+ */</div><div class='add'>+static int ctucan_set_btr(struct net_device *ndev, struct can_bittiming *bt, bool nominal)</div><div class='add'>+{</div><div class='add'>+	struct ctucan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	int max_ph1_len = 31;</div><div class='add'>+	u32 btr = 0;</div><div class='add'>+	u32 prop_seg = bt-&gt;prop_seg;</div><div class='add'>+	u32 phase_seg1 = bt-&gt;phase_seg1;</div><div class='add'>+</div><div class='add'>+	if (CTU_CAN_FD_ENABLED(priv)) {</div><div class='add'>+		netdev_err(ndev, "BUG! Cannot set bittiming - CAN is enabled\n");</div><div class='add'>+		return -EPERM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (nominal)</div><div class='add'>+		max_ph1_len = 63;</div><div class='add'>+</div><div class='add'>+	/* The timing calculation functions have only constraints on tseg1, which is prop_seg +</div><div class='add'>+	 * phase1_seg combined. tseg1 is then split in half and stored into prog_seg and phase_seg1.</div><div class='add'>+	 * In CTU CAN FD, PROP is 6/7 bits wide but PH1 only 6/5, so we must re-distribute the</div><div class='add'>+	 * values here.</div><div class='add'>+	 */</div><div class='add'>+	if (phase_seg1 &gt; max_ph1_len) {</div><div class='add'>+		prop_seg += phase_seg1 - max_ph1_len;</div><div class='add'>+		phase_seg1 = max_ph1_len;</div><div class='add'>+		bt-&gt;prop_seg = prop_seg;</div><div class='add'>+		bt-&gt;phase_seg1 = phase_seg1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (nominal) {</div><div class='add'>+		btr = FIELD_PREP(REG_BTR_PROP, prop_seg);</div><div class='add'>+		btr |= FIELD_PREP(REG_BTR_PH1, phase_seg1);</div><div class='add'>+		btr |= FIELD_PREP(REG_BTR_PH2, bt-&gt;phase_seg2);</div><div class='add'>+		btr |= FIELD_PREP(REG_BTR_BRP, bt-&gt;brp);</div><div class='add'>+		btr |= FIELD_PREP(REG_BTR_SJW, bt-&gt;sjw);</div><div class='add'>+</div><div class='add'>+		ctucan_write32(priv, CTUCANFD_BTR, btr);</div><div class='add'>+	} else {</div><div class='add'>+		btr = FIELD_PREP(REG_BTR_FD_PROP_FD, prop_seg);</div><div class='add'>+		btr |= FIELD_PREP(REG_BTR_FD_PH1_FD, phase_seg1);</div><div class='add'>+		btr |= FIELD_PREP(REG_BTR_FD_PH2_FD, bt-&gt;phase_seg2);</div><div class='add'>+		btr |= FIELD_PREP(REG_BTR_FD_BRP_FD, bt-&gt;brp);</div><div class='add'>+		btr |= FIELD_PREP(REG_BTR_FD_SJW_FD, bt-&gt;sjw);</div><div class='add'>+</div><div class='add'>+		ctucan_write32(priv, CTUCANFD_BTR_FD, btr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ctucan_set_bittiming() - CAN set nominal bit timing routine</div><div class='add'>+ * @ndev:	Pointer to net_device structure</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -%EPERM on error</div><div class='add'>+ */</div><div class='add'>+static int ctucan_set_bittiming(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct ctucan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct can_bittiming *bt = &amp;priv-&gt;can.bittiming;</div><div class='add'>+</div><div class='add'>+	/* Note that bt may be modified here */</div><div class='add'>+	return ctucan_set_btr(ndev, bt, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ctucan_set_data_bittiming() - CAN set data bit timing routine</div><div class='add'>+ * @ndev:	Pointer to net_device structure</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -%EPERM on error</div><div class='add'>+ */</div><div class='add'>+static int ctucan_set_data_bittiming(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct ctucan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct can_bittiming *dbt = &amp;priv-&gt;can.fd.data_bittiming;</div><div class='add'>+</div><div class='add'>+	/* Note that dbt may be modified here */</div><div class='add'>+	return ctucan_set_btr(ndev, dbt, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ctucan_set_secondary_sample_point() - Sets secondary sample point in CTU CAN FD</div><div class='add'>+ * @ndev:	Pointer to net_device structure</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -%EPERM if controller is enabled</div><div class='add'>+ */</div><div class='add'>+static int ctucan_set_secondary_sample_point(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct ctucan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct can_bittiming *dbt = &amp;priv-&gt;can.fd.data_bittiming;</div><div class='add'>+	int ssp_offset = 0;</div><div class='add'>+	u32 ssp_cfg = 0; /* No SSP by default */</div><div class='add'>+</div><div class='add'>+	if (CTU_CAN_FD_ENABLED(priv)) {</div><div class='add'>+		netdev_err(ndev, "BUG! Cannot set SSP - CAN is enabled\n");</div><div class='add'>+		return -EPERM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Use SSP for bit-rates above 1 Mbits/s */</div><div class='add'>+	if (dbt-&gt;bitrate &gt; 1000000) {</div><div class='add'>+		/* Calculate SSP in minimal time quanta */</div><div class='add'>+		ssp_offset = (priv-&gt;can.clock.freq / 1000) * dbt-&gt;sample_point / dbt-&gt;bitrate;</div><div class='add'>+</div><div class='add'>+		if (ssp_offset &gt; 127) {</div><div class='add'>+			netdev_warn(ndev, "SSP offset saturated to 127\n");</div><div class='add'>+			ssp_offset = 127;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ssp_cfg = FIELD_PREP(REG_TRV_DELAY_SSP_OFFSET, ssp_offset);</div><div class='add'>+		ssp_cfg |= FIELD_PREP(REG_TRV_DELAY_SSP_SRC, 0x1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ctucan_write32(priv, CTUCANFD_TRV_DELAY, ssp_cfg);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ctucan_set_mode() - Sets CTU CAN FDs mode</div><div class='add'>+ * @priv:	Pointer to private data</div><div class='add'>+ * @mode:	Pointer to controller modes to be set</div><div class='add'>+ */</div><div class='add'>+static void ctucan_set_mode(struct ctucan_priv *priv, const struct can_ctrlmode *mode)</div><div class='add'>+{</div><div class='add'>+	u32 mode_reg = ctucan_read32(priv, CTUCANFD_MODE);</div><div class='add'>+</div><div class='add'>+	mode_reg = (mode-&gt;flags &amp; CAN_CTRLMODE_LOOPBACK) ?</div><div class='add'>+			(mode_reg | REG_MODE_ILBP) :</div><div class='add'>+			(mode_reg &amp; ~REG_MODE_ILBP);</div><div class='add'>+</div><div class='add'>+	mode_reg = (mode-&gt;flags &amp; CAN_CTRLMODE_LISTENONLY) ?</div><div class='add'>+			(mode_reg | REG_MODE_BMM) :</div><div class='add'>+			(mode_reg &amp; ~REG_MODE_BMM);</div><div class='add'>+</div><div class='add'>+	mode_reg = (mode-&gt;flags &amp; CAN_CTRLMODE_FD) ?</div><div class='add'>+			(mode_reg | REG_MODE_FDE) :</div><div class='add'>+			(mode_reg &amp; ~REG_MODE_FDE);</div><div class='add'>+</div><div class='add'>+	mode_reg = (mode-&gt;flags &amp; CAN_CTRLMODE_PRESUME_ACK) ?</div><div class='add'>+			(mode_reg | REG_MODE_ACF) :</div><div class='add'>+			(mode_reg &amp; ~REG_MODE_ACF);</div><div class='add'>+</div><div class='add'>+	mode_reg = (mode-&gt;flags &amp; CAN_CTRLMODE_FD_NON_ISO) ?</div><div class='add'>+			(mode_reg | REG_MODE_NISOFD) :</div><div class='add'>+			(mode_reg &amp; ~REG_MODE_NISOFD);</div><div class='add'>+</div><div class='add'>+	/* One shot mode supported indirectly via Retransmit limit */</div><div class='add'>+	mode_reg &amp;= ~FIELD_PREP(REG_MODE_RTRTH, 0xF);</div><div class='add'>+	mode_reg = (mode-&gt;flags &amp; CAN_CTRLMODE_ONE_SHOT) ?</div><div class='add'>+			(mode_reg | REG_MODE_RTRLE) :</div><div class='add'>+			(mode_reg &amp; ~REG_MODE_RTRLE);</div><div class='add'>+</div><div class='add'>+	/* Some bits fixed:</div><div class='add'>+	 *   TSTM  - Off, User shall not be able to change REC/TEC by hand during operation</div><div class='add'>+	 */</div><div class='add'>+	mode_reg &amp;= ~REG_MODE_TSTM;</div><div class='add'>+</div><div class='add'>+	ctucan_write32(priv, CTUCANFD_MODE, mode_reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ctucan_chip_start() - This routine starts the driver</div><div class='add'>+ * @ndev:	Pointer to net_device structure</div><div class='add'>+ *</div><div class='add'>+ * Routine expects that chip is in reset state. It setups initial</div><div class='add'>+ * Tx buffers for FIFO priorities, sets bittiming, enables interrupts,</div><div class='add'>+ * switches core to operational mode and changes controller</div><div class='add'>+ * state to %CAN_STATE_STOPPED.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success and failure value on error</div><div class='add'>+ */</div><div class='add'>+static int ctucan_chip_start(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct ctucan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	u32 int_ena, int_msk;</div><div class='add'>+	u32 mode_reg;</div><div class='add'>+	int err;</div><div class='add'>+	struct can_ctrlmode mode;</div><div class='add'>+</div><div class='add'>+	priv-&gt;txb_prio = 0x01234567;</div><div class='add'>+	priv-&gt;txb_head = 0;</div><div class='add'>+	priv-&gt;txb_tail = 0;</div><div class='add'>+	ctucan_write32(priv, CTUCANFD_TX_PRIORITY, priv-&gt;txb_prio);</div><div class='add'>+</div><div class='add'>+	/* Configure bit-rates and ssp */</div><div class='add'>+	err = ctucan_set_bittiming(ndev);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = ctucan_set_data_bittiming(ndev);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = ctucan_set_secondary_sample_point(ndev);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Configure modes */</div><div class='add'>+	mode.flags = priv-&gt;can.ctrlmode;</div><div class='add'>+	mode.mask = 0xFFFFFFFF;</div><div class='add'>+	ctucan_set_mode(priv, &amp;mode);</div><div class='add'>+</div><div class='add'>+	/* Configure interrupts */</div><div class='add'>+	int_ena = REG_INT_STAT_RBNEI |</div><div class='add'>+		  REG_INT_STAT_TXBHCI |</div><div class='add'>+		  REG_INT_STAT_EWLI |</div><div class='add'>+		  REG_INT_STAT_FCSI;</div><div class='add'>+</div><div class='add'>+	/* Bus error reporting -&gt; Allow Error/Arb.lost interrupts */</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING) {</div><div class='add'>+		int_ena |= REG_INT_STAT_ALI |</div><div class='add'>+			   REG_INT_STAT_BEI;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	int_msk = ~int_ena; /* Mask all disabled interrupts */</div><div class='add'>+</div><div class='add'>+	/* It's after reset, so there is no need to clear anything */</div><div class='add'>+	ctucan_write32(priv, CTUCANFD_INT_MASK_SET, int_msk);</div><div class='add'>+	ctucan_write32(priv, CTUCANFD_INT_ENA_SET, int_ena);</div><div class='add'>+</div><div class='add'>+	/* Controller enters ERROR_ACTIVE on initial FCSI */</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='add'>+</div><div class='add'>+	/* Enable the controller */</div><div class='add'>+	mode_reg = ctucan_read32(priv, CTUCANFD_MODE);</div><div class='add'>+	mode_reg |= REG_MODE_ENA;</div><div class='add'>+	ctucan_write32(priv, CTUCANFD_MODE, mode_reg);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ctucan_do_set_mode() - Sets mode of the driver</div><div class='add'>+ * @ndev:	Pointer to net_device structure</div><div class='add'>+ * @mode:	Tells the mode of the driver</div><div class='add'>+ *</div><div class='add'>+ * This check the drivers state and calls the corresponding modes to set.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success and failure value on error</div><div class='add'>+ */</div><div class='add'>+static int ctucan_do_set_mode(struct net_device *ndev, enum can_mode mode)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case CAN_MODE_START:</div><div class='add'>+		ret = ctucan_reset(ndev);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+		ret = ctucan_chip_start(ndev);</div><div class='add'>+		if (ret &lt; 0) {</div><div class='add'>+			netdev_err(ndev, "ctucan_chip_start failed!\n");</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+		netif_wake_queue(ndev);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EOPNOTSUPP;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ctucan_get_tx_status() - Gets status of TXT buffer</div><div class='add'>+ * @priv:	Pointer to private data</div><div class='add'>+ * @buf:	Buffer index (0-based)</div><div class='add'>+ *</div><div class='add'>+ * Return: Status of TXT buffer</div><div class='add'>+ */</div><div class='add'>+static enum ctucan_txtb_status ctucan_get_tx_status(struct ctucan_priv *priv, u8 buf)</div><div class='add'>+{</div><div class='add'>+	u32 tx_status = ctucan_read32(priv, CTUCANFD_TX_STATUS);</div><div class='add'>+	enum ctucan_txtb_status status = (tx_status &gt;&gt; (buf * 4)) &amp; 0x7;</div><div class='add'>+</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ctucan_is_txt_buf_writable() - Checks if frame can be inserted to TXT Buffer</div><div class='add'>+ * @priv:	Pointer to private data</div><div class='add'>+ * @buf:	Buffer index (0-based)</div><div class='add'>+ *</div><div class='add'>+ * Return: True - Frame can be inserted to TXT Buffer, False - If attempted, frame will not be</div><div class='add'>+ *	   inserted to TXT Buffer</div><div class='add'>+ */</div><div class='add'>+static bool ctucan_is_txt_buf_writable(struct ctucan_priv *priv, u8 buf)</div><div class='add'>+{</div><div class='add'>+	enum ctucan_txtb_status buf_status;</div><div class='add'>+</div><div class='add'>+	buf_status = ctucan_get_tx_status(priv, buf);</div><div class='add'>+	if (buf_status == TXT_RDY || buf_status == TXT_TRAN || buf_status == TXT_ABTP)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ctucan_insert_frame() - Inserts frame to TXT buffer</div><div class='add'>+ * @priv:	Pointer to private data</div><div class='add'>+ * @cf:		Pointer to CAN frame to be inserted</div><div class='add'>+ * @buf:	TXT Buffer index to which frame is inserted (0-based)</div><div class='add'>+ * @isfdf:	True - CAN FD Frame, False - CAN 2.0 Frame</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ * * True - Frame inserted successfully</div><div class='add'>+ * * False - Frame was not inserted due to one of:</div><div class='add'>+ *	1. TXT Buffer is not writable (it is in wrong state)</div><div class='add'>+ *	2. Invalid TXT buffer index</div><div class='add'>+ *	3. Invalid frame length</div><div class='add'>+ */</div><div class='add'>+static bool ctucan_insert_frame(struct ctucan_priv *priv, const struct canfd_frame *cf, u8 buf,</div><div class='add'>+				bool isfdf)</div><div class='add'>+{</div><div class='add'>+	u32 buf_base;</div><div class='add'>+	u32 ffw = 0;</div><div class='add'>+	u32 idw = 0;</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	if (buf &gt;= priv-&gt;ntxbufs)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (!ctucan_is_txt_buf_writable(priv, buf))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (cf-&gt;len &gt; CANFD_MAX_DLEN)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* Prepare Frame format */</div><div class='add'>+	if (cf-&gt;can_id &amp; CAN_RTR_FLAG)</div><div class='add'>+		ffw |= REG_FRAME_FORMAT_W_RTR;</div><div class='add'>+</div><div class='add'>+	if (cf-&gt;can_id &amp; CAN_EFF_FLAG)</div><div class='add'>+		ffw |= REG_FRAME_FORMAT_W_IDE;</div><div class='add'>+</div><div class='add'>+	if (isfdf) {</div><div class='add'>+		ffw |= REG_FRAME_FORMAT_W_FDF;</div><div class='add'>+		if (cf-&gt;flags &amp; CANFD_BRS)</div><div class='add'>+			ffw |= REG_FRAME_FORMAT_W_BRS;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ffw |= FIELD_PREP(REG_FRAME_FORMAT_W_DLC, can_fd_len2dlc(cf-&gt;len));</div><div class='add'>+</div><div class='add'>+	/* Prepare identifier */</div><div class='add'>+	if (cf-&gt;can_id &amp; CAN_EFF_FLAG)</div><div class='add'>+		idw = cf-&gt;can_id &amp; CAN_EFF_MASK;</div><div class='add'>+	else</div><div class='add'>+		idw = FIELD_PREP(REG_IDENTIFIER_W_IDENTIFIER_BASE, cf-&gt;can_id &amp; CAN_SFF_MASK);</div><div class='add'>+</div><div class='add'>+	/* Write ID, Frame format, Don't write timestamp -&gt; Time triggered transmission disabled */</div><div class='add'>+	buf_base = (buf + 1) * 0x100;</div><div class='add'>+	ctucan_write_txt_buf(priv, buf_base, CTUCANFD_FRAME_FORMAT_W, ffw);</div><div class='add'>+	ctucan_write_txt_buf(priv, buf_base, CTUCANFD_IDENTIFIER_W, idw);</div><div class='add'>+</div><div class='add'>+	/* Write Data payload */</div><div class='add'>+	if (!(cf-&gt;can_id &amp; CAN_RTR_FLAG)) {</div><div class='add'>+		for (i = 0; i &lt; cf-&gt;len; i += 4) {</div><div class='add'>+			u32 data = le32_to_cpu(*(__le32 *)(cf-&gt;data + i));</div><div class='add'>+</div><div class='add'>+			ctucan_write_txt_buf(priv, buf_base, CTUCANFD_DATA_1_4_W + i, data);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ctucan_give_txtb_cmd() - Applies command on TXT buffer</div><div class='add'>+ * @priv:	Pointer to private data</div><div class='add'>+ * @cmd:	Command to give</div><div class='add'>+ * @buf:	Buffer index (0-based)</div><div class='add'>+ */</div><div class='add'>+static void ctucan_give_txtb_cmd(struct ctucan_priv *priv, enum ctucan_txtb_command cmd, u8 buf)</div><div class='add'>+{</div><div class='add'>+	u32 tx_cmd = cmd;</div><div class='add'>+</div><div class='add'>+	tx_cmd |= 1 &lt;&lt; (buf + 8);</div><div class='add'>+	ctucan_write32(priv, CTUCANFD_TX_COMMAND, tx_cmd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ctucan_start_xmit() - Starts the transmission</div><div class='add'>+ * @skb:	sk_buff pointer that contains data to be Txed</div><div class='add'>+ * @ndev:	Pointer to net_device structure</div><div class='add'>+ *</div><div class='add'>+ * Invoked from upper layers to initiate transmission. Uses the next available free TXT Buffer and</div><div class='add'>+ * populates its fields to start the transmission.</div><div class='add'>+ *</div><div class='add'>+ * Return: %NETDEV_TX_OK on success, %NETDEV_TX_BUSY when no free TXT buffer is available,</div><div class='add'>+ *         negative return values reserved for error cases</div><div class='add'>+ */</div><div class='add'>+static netdev_tx_t ctucan_start_xmit(struct sk_buff *skb, struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct ctucan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct canfd_frame *cf = (struct canfd_frame *)skb-&gt;data;</div><div class='add'>+	u32 txtb_id;</div><div class='add'>+	bool ok;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (can_dev_dropped_skb(ndev, skb))</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+	if (unlikely(!CTU_CAN_FD_TXTNF(priv))) {</div><div class='add'>+		netif_stop_queue(ndev);</div><div class='add'>+		netdev_err(ndev, "BUG!, no TXB free when queue awake!\n");</div><div class='add'>+		return NETDEV_TX_BUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	txtb_id = priv-&gt;txb_head % priv-&gt;ntxbufs;</div><div class='add'>+	ctucan_netdev_dbg(ndev, "%s: using TXB#%u\n", __func__, txtb_id);</div><div class='add'>+	ok = ctucan_insert_frame(priv, cf, txtb_id, can_is_canfd_skb(skb));</div><div class='add'>+</div><div class='add'>+	if (!ok) {</div><div class='add'>+		netdev_err(ndev, "BUG! TXNF set but cannot insert frame into TXTB! HW Bug?");</div><div class='add'>+		kfree_skb(skb);</div><div class='add'>+		ndev-&gt;stats.tx_dropped++;</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	can_put_echo_skb(skb, ndev, txtb_id, 0);</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;tx_lock, flags);</div><div class='add'>+	ctucan_give_txtb_cmd(priv, TXT_CMD_SET_READY, txtb_id);</div><div class='add'>+	priv-&gt;txb_head++;</div><div class='add'>+</div><div class='add'>+	/* Check if all TX buffers are full */</div><div class='add'>+	if (!CTU_CAN_FD_TXTNF(priv))</div><div class='add'>+		netif_stop_queue(ndev);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;tx_lock, flags);</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ctucan_read_rx_frame() - Reads frame from RX FIFO</div><div class='add'>+ * @priv:	Pointer to CTU CAN FD's private data</div><div class='add'>+ * @cf:		Pointer to CAN frame struct</div><div class='add'>+ * @ffw:	Previously read frame format word</div><div class='add'>+ *</div><div class='add'>+ * Note: Frame format word must be read separately and provided in 'ffw'.</div><div class='add'>+ */</div><div class='add'>+static void ctucan_read_rx_frame(struct ctucan_priv *priv, struct canfd_frame *cf, u32 ffw)</div><div class='add'>+{</div><div class='add'>+	u32 idw;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	unsigned int wc;</div><div class='add'>+	unsigned int len;</div><div class='add'>+</div><div class='add'>+	idw = ctucan_read32(priv, CTUCANFD_RX_DATA);</div><div class='add'>+	if (FIELD_GET(REG_FRAME_FORMAT_W_IDE, ffw))</div><div class='add'>+		cf-&gt;can_id = (idw &amp; CAN_EFF_MASK) | CAN_EFF_FLAG;</div><div class='add'>+	else</div><div class='add'>+		cf-&gt;can_id = (idw &gt;&gt; 18) &amp; CAN_SFF_MASK;</div><div class='add'>+</div><div class='add'>+	/* BRS, ESI, RTR Flags */</div><div class='add'>+	if (FIELD_GET(REG_FRAME_FORMAT_W_FDF, ffw)) {</div><div class='add'>+		if (FIELD_GET(REG_FRAME_FORMAT_W_BRS, ffw))</div><div class='add'>+			cf-&gt;flags |= CANFD_BRS;</div><div class='add'>+		if (FIELD_GET(REG_FRAME_FORMAT_W_ESI_RSV, ffw))</div><div class='add'>+			cf-&gt;flags |= CANFD_ESI;</div><div class='add'>+	} else if (FIELD_GET(REG_FRAME_FORMAT_W_RTR, ffw)) {</div><div class='add'>+		cf-&gt;can_id |= CAN_RTR_FLAG;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wc = FIELD_GET(REG_FRAME_FORMAT_W_RWCNT, ffw) - 3;</div><div class='add'>+</div><div class='add'>+	/* DLC */</div><div class='add'>+	if (FIELD_GET(REG_FRAME_FORMAT_W_DLC, ffw) &lt;= 8) {</div><div class='add'>+		len = FIELD_GET(REG_FRAME_FORMAT_W_DLC, ffw);</div><div class='add'>+	} else {</div><div class='add'>+		if (FIELD_GET(REG_FRAME_FORMAT_W_FDF, ffw))</div><div class='add'>+			len = wc &lt;&lt; 2;</div><div class='add'>+		else</div><div class='add'>+			len = 8;</div><div class='add'>+	}</div><div class='add'>+	cf-&gt;len = len;</div><div class='add'>+	if (unlikely(len &gt; wc * 4))</div><div class='add'>+		len = wc * 4;</div><div class='add'>+</div><div class='add'>+	/* Timestamp - Read and throw away */</div><div class='add'>+	ctucan_read32(priv, CTUCANFD_RX_DATA);</div><div class='add'>+	ctucan_read32(priv, CTUCANFD_RX_DATA);</div><div class='add'>+</div><div class='add'>+	/* Data */</div><div class='add'>+	for (i = 0; i &lt; len; i += 4) {</div><div class='add'>+		u32 data = ctucan_read32(priv, CTUCANFD_RX_DATA);</div><div class='add'>+		*(__le32 *)(cf-&gt;data + i) = cpu_to_le32(data);</div><div class='add'>+	}</div><div class='add'>+	while (unlikely(i &lt; wc * 4)) {</div><div class='add'>+		ctucan_read32(priv, CTUCANFD_RX_DATA);</div><div class='add'>+		i += 4;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ctucan_rx() -  Called from CAN ISR to complete the received frame processing</div><div class='add'>+ * @ndev:	Pointer to net_device structure</div><div class='add'>+ *</div><div class='add'>+ * This function is invoked from the CAN isr(poll) to process the Rx frames. It does minimal</div><div class='add'>+ * processing and invokes "netif_receive_skb" to complete further processing.</div><div class='add'>+ * Return: 1 when frame is passed to the network layer, 0 when the first frame word is read but</div><div class='add'>+ *	   system is out of free SKBs temporally and left code to resolve SKB allocation later,</div><div class='add'>+ *         -%EAGAIN in a case of empty Rx FIFO.</div><div class='add'>+ */</div><div class='add'>+static int ctucan_rx(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct ctucan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct net_device_stats *stats = &amp;ndev-&gt;stats;</div><div class='add'>+	struct canfd_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	u32 ffw;</div><div class='add'>+</div><div class='add'>+	if (test_bit(CTUCANFD_FLAG_RX_FFW_BUFFERED, &amp;priv-&gt;drv_flags)) {</div><div class='add'>+		ffw = priv-&gt;rxfrm_first_word;</div><div class='add'>+		clear_bit(CTUCANFD_FLAG_RX_FFW_BUFFERED, &amp;priv-&gt;drv_flags);</div><div class='add'>+	} else {</div><div class='add'>+		ffw = ctucan_read32(priv, CTUCANFD_RX_DATA);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!FIELD_GET(REG_FRAME_FORMAT_W_RWCNT, ffw))</div><div class='add'>+		return -EAGAIN;</div><div class='add'>+</div><div class='add'>+	if (FIELD_GET(REG_FRAME_FORMAT_W_FDF, ffw))</div><div class='add'>+		skb = alloc_canfd_skb(ndev, &amp;cf);</div><div class='add'>+	else</div><div class='add'>+		skb = alloc_can_skb(ndev, (struct can_frame **)&amp;cf);</div><div class='add'>+</div><div class='add'>+	if (unlikely(!skb)) {</div><div class='add'>+		priv-&gt;rxfrm_first_word = ffw;</div><div class='add'>+		set_bit(CTUCANFD_FLAG_RX_FFW_BUFFERED, &amp;priv-&gt;drv_flags);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ctucan_read_rx_frame(priv, cf, ffw);</div><div class='add'>+</div><div class='add'>+	stats-&gt;rx_bytes += cf-&gt;len;</div><div class='add'>+	stats-&gt;rx_packets++;</div><div class='add'>+	netif_receive_skb(skb);</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ctucan_read_fault_state() - Reads CTU CAN FDs fault confinement state.</div><div class='add'>+ * @priv:	Pointer to private data</div><div class='add'>+ *</div><div class='add'>+ * Returns: Fault confinement state of controller</div><div class='add'>+ */</div><div class='add'>+static enum can_state ctucan_read_fault_state(struct ctucan_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 fs;</div><div class='add'>+	u32 rec_tec;</div><div class='add'>+	u32 ewl;</div><div class='add'>+</div><div class='add'>+	fs = ctucan_read32(priv, CTUCANFD_EWL);</div><div class='add'>+	rec_tec = ctucan_read32(priv, CTUCANFD_REC);</div><div class='add'>+	ewl = FIELD_GET(REG_EWL_EW_LIMIT, fs);</div><div class='add'>+</div><div class='add'>+	if (FIELD_GET(REG_EWL_ERA, fs)) {</div><div class='add'>+		if (ewl &gt; FIELD_GET(REG_REC_REC_VAL, rec_tec) &amp;&amp;</div><div class='add'>+		    ewl &gt; FIELD_GET(REG_REC_TEC_VAL, rec_tec))</div><div class='add'>+			return CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+		else</div><div class='add'>+			return CAN_STATE_ERROR_WARNING;</div><div class='add'>+	} else if (FIELD_GET(REG_EWL_ERP, fs)) {</div><div class='add'>+		return CAN_STATE_ERROR_PASSIVE;</div><div class='add'>+	} else if (FIELD_GET(REG_EWL_BOF, fs)) {</div><div class='add'>+		return CAN_STATE_BUS_OFF;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	WARN(true, "Invalid error state");</div><div class='add'>+	return CAN_STATE_ERROR_PASSIVE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ctucan_get_rec_tec() - Reads REC/TEC counter values from controller</div><div class='add'>+ * @priv:	Pointer to private data</div><div class='add'>+ * @bec:	Pointer to Error counter structure</div><div class='add'>+ */</div><div class='add'>+static void ctucan_get_rec_tec(struct ctucan_priv *priv, struct can_berr_counter *bec)</div><div class='add'>+{</div><div class='add'>+	u32 err_ctrs = ctucan_read32(priv, CTUCANFD_REC);</div><div class='add'>+</div><div class='add'>+	bec-&gt;rxerr = FIELD_GET(REG_REC_REC_VAL, err_ctrs);</div><div class='add'>+	bec-&gt;txerr = FIELD_GET(REG_REC_TEC_VAL, err_ctrs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ctucan_err_interrupt() - Error frame ISR</div><div class='add'>+ * @ndev:	net_device pointer</div><div class='add'>+ * @isr:	interrupt status register value</div><div class='add'>+ *</div><div class='add'>+ * This is the CAN error interrupt and it will check the type of error and forward the error</div><div class='add'>+ * frame to upper layers.</div><div class='add'>+ */</div><div class='add'>+static void ctucan_err_interrupt(struct net_device *ndev, u32 isr)</div><div class='add'>+{</div><div class='add'>+	struct ctucan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct net_device_stats *stats = &amp;ndev-&gt;stats;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	enum can_state state;</div><div class='add'>+	struct can_berr_counter bec;</div><div class='add'>+	u32 err_capt_alc;</div><div class='add'>+	int dologerr = net_ratelimit();</div><div class='add'>+</div><div class='add'>+	ctucan_get_rec_tec(priv, &amp;bec);</div><div class='add'>+	state = ctucan_read_fault_state(priv);</div><div class='add'>+	err_capt_alc = ctucan_read32(priv, CTUCANFD_ERR_CAPT);</div><div class='add'>+</div><div class='add'>+	if (dologerr)</div><div class='add'>+		netdev_info(ndev, "%s: ISR = 0x%08x, rxerr %d, txerr %d, error type %lu, pos %lu, ALC id_field %lu, bit %lu\n",</div><div class='add'>+			    __func__, isr, bec.rxerr, bec.txerr,</div><div class='add'>+			    FIELD_GET(REG_ERR_CAPT_ERR_TYPE, err_capt_alc),</div><div class='add'>+			    FIELD_GET(REG_ERR_CAPT_ERR_POS, err_capt_alc),</div><div class='add'>+			    FIELD_GET(REG_ERR_CAPT_ALC_ID_FIELD, err_capt_alc),</div><div class='add'>+			    FIELD_GET(REG_ERR_CAPT_ALC_BIT, err_capt_alc));</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_err_skb(ndev, &amp;cf);</div><div class='add'>+</div><div class='add'>+	/* EWLI: error warning limit condition met</div><div class='add'>+	 * FCSI: fault confinement state changed</div><div class='add'>+	 * ALI:  arbitration lost (just informative)</div><div class='add'>+	 * BEI:  bus error interrupt</div><div class='add'>+	 */</div><div class='add'>+	if (FIELD_GET(REG_INT_STAT_FCSI, isr) || FIELD_GET(REG_INT_STAT_EWLI, isr)) {</div><div class='add'>+		netdev_info(ndev, "state changes from %s to %s\n",</div><div class='add'>+			    ctucan_state_to_str(priv-&gt;can.state),</div><div class='add'>+			    ctucan_state_to_str(state));</div><div class='add'>+</div><div class='add'>+		if (priv-&gt;can.state == state)</div><div class='add'>+			netdev_warn(ndev,</div><div class='add'>+				    "current and previous state is the same! (missed interrupt?)\n");</div><div class='add'>+</div><div class='add'>+		priv-&gt;can.state = state;</div><div class='add'>+		switch (state) {</div><div class='add'>+		case CAN_STATE_BUS_OFF:</div><div class='add'>+			priv-&gt;can.can_stats.bus_off++;</div><div class='add'>+			can_bus_off(ndev);</div><div class='add'>+			if (skb)</div><div class='add'>+				cf-&gt;can_id |= CAN_ERR_BUSOFF;</div><div class='add'>+			break;</div><div class='add'>+		case CAN_STATE_ERROR_PASSIVE:</div><div class='add'>+			priv-&gt;can.can_stats.error_passive++;</div><div class='add'>+			if (skb) {</div><div class='add'>+				cf-&gt;can_id |= CAN_ERR_CRTL | CAN_ERR_CNT;</div><div class='add'>+				cf-&gt;data[1] = (bec.rxerr &gt; 127) ?</div><div class='add'>+						CAN_ERR_CRTL_RX_PASSIVE :</div><div class='add'>+						CAN_ERR_CRTL_TX_PASSIVE;</div><div class='add'>+				cf-&gt;data[6] = bec.txerr;</div><div class='add'>+				cf-&gt;data[7] = bec.rxerr;</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		case CAN_STATE_ERROR_WARNING:</div><div class='add'>+			priv-&gt;can.can_stats.error_warning++;</div><div class='add'>+			if (skb) {</div><div class='add'>+				cf-&gt;can_id |= CAN_ERR_CRTL | CAN_ERR_CNT;</div><div class='add'>+				cf-&gt;data[1] |= (bec.txerr &gt; bec.rxerr) ?</div><div class='add'>+					CAN_ERR_CRTL_TX_WARNING :</div><div class='add'>+					CAN_ERR_CRTL_RX_WARNING;</div><div class='add'>+				cf-&gt;data[6] = bec.txerr;</div><div class='add'>+				cf-&gt;data[7] = bec.rxerr;</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		case CAN_STATE_ERROR_ACTIVE:</div><div class='add'>+			if (skb) {</div><div class='add'>+				cf-&gt;can_id |= CAN_ERR_CNT;</div><div class='add'>+				cf-&gt;data[1] = CAN_ERR_CRTL_ACTIVE;</div><div class='add'>+				cf-&gt;data[6] = bec.txerr;</div><div class='add'>+				cf-&gt;data[7] = bec.rxerr;</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			netdev_warn(ndev, "unhandled error state (%d:%s)!\n",</div><div class='add'>+				    state, ctucan_state_to_str(state));</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Check for Arbitration Lost interrupt */</div><div class='add'>+	if (FIELD_GET(REG_INT_STAT_ALI, isr)) {</div><div class='add'>+		if (dologerr)</div><div class='add'>+			netdev_info(ndev, "arbitration lost\n");</div><div class='add'>+		priv-&gt;can.can_stats.arbitration_lost++;</div><div class='add'>+		if (skb) {</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_LOSTARB;</div><div class='add'>+			cf-&gt;data[0] = CAN_ERR_LOSTARB_UNSPEC;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Check for Bus Error interrupt */</div><div class='add'>+	if (FIELD_GET(REG_INT_STAT_BEI, isr)) {</div><div class='add'>+		netdev_info(ndev, "bus error\n");</div><div class='add'>+		priv-&gt;can.can_stats.bus_error++;</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+		if (skb) {</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='add'>+			cf-&gt;data[2] = CAN_ERR_PROT_UNSPEC;</div><div class='add'>+			cf-&gt;data[3] = CAN_ERR_PROT_LOC_UNSPEC;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (skb) {</div><div class='add'>+		stats-&gt;rx_packets++;</div><div class='add'>+		stats-&gt;rx_bytes += cf-&gt;can_dlc;</div><div class='add'>+		netif_rx(skb);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ctucan_rx_poll() - Poll routine for rx packets (NAPI)</div><div class='add'>+ * @napi:	NAPI structure pointer</div><div class='add'>+ * @quota:	Max number of rx packets to be processed.</div><div class='add'>+ *</div><div class='add'>+ * This is the poll routine for rx part. It will process the packets maximux quota value.</div><div class='add'>+ *</div><div class='add'>+ * Return: Number of packets received</div><div class='add'>+ */</div><div class='add'>+static int ctucan_rx_poll(struct napi_struct *napi, int quota)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = napi-&gt;dev;</div><div class='add'>+	struct ctucan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	int work_done = 0;</div><div class='add'>+	u32 status;</div><div class='add'>+	u32 framecnt;</div><div class='add'>+	int res = 1;</div><div class='add'>+</div><div class='add'>+	framecnt = FIELD_GET(REG_RX_STATUS_RXFRC, ctucan_read32(priv, CTUCANFD_RX_STATUS));</div><div class='add'>+	while (framecnt &amp;&amp; work_done &lt; quota &amp;&amp; res &gt; 0) {</div><div class='add'>+		res = ctucan_rx(ndev);</div><div class='add'>+		work_done++;</div><div class='add'>+		framecnt = FIELD_GET(REG_RX_STATUS_RXFRC, ctucan_read32(priv, CTUCANFD_RX_STATUS));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Check for RX FIFO Overflow */</div><div class='add'>+	status = ctucan_read32(priv, CTUCANFD_STATUS);</div><div class='add'>+	if (FIELD_GET(REG_STATUS_DOR, status)) {</div><div class='add'>+		struct net_device_stats *stats = &amp;ndev-&gt;stats;</div><div class='add'>+		struct can_frame *cf;</div><div class='add'>+		struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+		netdev_info(ndev, "rx_poll: rx fifo overflow\n");</div><div class='add'>+		stats-&gt;rx_over_errors++;</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+		skb = alloc_can_err_skb(ndev, &amp;cf);</div><div class='add'>+		if (skb) {</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='add'>+			cf-&gt;data[1] |= CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='add'>+			stats-&gt;rx_packets++;</div><div class='add'>+			stats-&gt;rx_bytes += cf-&gt;can_dlc;</div><div class='add'>+			netif_rx(skb);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Clear Data Overrun */</div><div class='add'>+		ctucan_write32(priv, CTUCANFD_COMMAND, REG_COMMAND_CDO);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!framecnt &amp;&amp; res != 0) {</div><div class='add'>+		if (napi_complete_done(napi, work_done)) {</div><div class='add'>+			/* Clear and enable RBNEI. It is level-triggered, so</div><div class='add'>+			 * there is no race condition.</div><div class='add'>+			 */</div><div class='add'>+			ctucan_write32(priv, CTUCANFD_INT_STAT, REG_INT_STAT_RBNEI);</div><div class='add'>+			ctucan_write32(priv, CTUCANFD_INT_MASK_CLR, REG_INT_STAT_RBNEI);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return work_done;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ctucan_rotate_txb_prio() - Rotates priorities of TXT Buffers</div><div class='add'>+ * @ndev:	net_device pointer</div><div class='add'>+ */</div><div class='add'>+static void ctucan_rotate_txb_prio(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct ctucan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	u32 prio = priv-&gt;txb_prio;</div><div class='add'>+</div><div class='add'>+	prio = (prio &lt;&lt; 4) | ((prio &gt;&gt; ((priv-&gt;ntxbufs - 1) * 4)) &amp; 0xF);</div><div class='add'>+	ctucan_netdev_dbg(ndev, "%s: from 0x%08x to 0x%08x\n", __func__, priv-&gt;txb_prio, prio);</div><div class='add'>+	priv-&gt;txb_prio = prio;</div><div class='add'>+	ctucan_write32(priv, CTUCANFD_TX_PRIORITY, prio);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ctucan_tx_interrupt() - Tx done Isr</div><div class='add'>+ * @ndev:	net_device pointer</div><div class='add'>+ */</div><div class='add'>+static void ctucan_tx_interrupt(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct ctucan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct net_device_stats *stats = &amp;ndev-&gt;stats;</div><div class='add'>+	bool first = true;</div><div class='add'>+	bool some_buffers_processed;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	enum ctucan_txtb_status txtb_status;</div><div class='add'>+	u32 txtb_id;</div><div class='add'>+</div><div class='add'>+	/*  read tx_status</div><div class='add'>+	 *  if txb[n].finished (bit 2)</div><div class='add'>+	 *	if ok -&gt; echo</div><div class='add'>+	 *	if error / aborted -&gt; ?? (find how to handle oneshot mode)</div><div class='add'>+	 *	txb_tail++</div><div class='add'>+	 */</div><div class='add'>+	do {</div><div class='add'>+		spin_lock_irqsave(&amp;priv-&gt;tx_lock, flags);</div><div class='add'>+</div><div class='add'>+		some_buffers_processed = false;</div><div class='add'>+		while ((int)(priv-&gt;txb_head - priv-&gt;txb_tail) &gt; 0) {</div><div class='add'>+			txtb_id = priv-&gt;txb_tail % priv-&gt;ntxbufs;</div><div class='add'>+			txtb_status = ctucan_get_tx_status(priv, txtb_id);</div><div class='add'>+</div><div class='add'>+			ctucan_netdev_dbg(ndev, "TXI: TXB#%u: status 0x%x\n", txtb_id, txtb_status);</div><div class='add'>+</div><div class='add'>+			switch (txtb_status) {</div><div class='add'>+			case TXT_TOK:</div><div class='add'>+				ctucan_netdev_dbg(ndev, "TXT_OK\n");</div><div class='add'>+				stats-&gt;tx_bytes += can_get_echo_skb(ndev, txtb_id, NULL);</div><div class='add'>+				stats-&gt;tx_packets++;</div><div class='add'>+				break;</div><div class='add'>+			case TXT_ERR:</div><div class='add'>+				/* This indicated that retransmit limit has been reached. Obviously</div><div class='add'>+				 * we should not echo the frame, but also not indicate any kind of</div><div class='add'>+				 * error. If desired, it was already reported (possible multiple</div><div class='add'>+				 * times) on each arbitration lost.</div><div class='add'>+				 */</div><div class='add'>+				netdev_warn(ndev, "TXB in Error state\n");</div><div class='add'>+				can_free_echo_skb(ndev, txtb_id, NULL);</div><div class='add'>+				stats-&gt;tx_dropped++;</div><div class='add'>+				break;</div><div class='add'>+			case TXT_ABT:</div><div class='add'>+				/* Same as for TXT_ERR, only with different cause. We *could*</div><div class='add'>+				 * re-queue the frame, but multiqueue/abort is not supported yet</div><div class='add'>+				 * anyway.</div><div class='add'>+				 */</div><div class='add'>+				netdev_warn(ndev, "TXB in Aborted state\n");</div><div class='add'>+				can_free_echo_skb(ndev, txtb_id, NULL);</div><div class='add'>+				stats-&gt;tx_dropped++;</div><div class='add'>+				break;</div><div class='add'>+			default:</div><div class='add'>+				/* Bug only if the first buffer is not finished, otherwise it is</div><div class='add'>+				 * pretty much expected.</div><div class='add'>+				 */</div><div class='add'>+				if (first) {</div><div class='add'>+					netdev_err(ndev,</div><div class='add'>+						   "BUG: TXB#%u not in a finished state (0x%x)!\n",</div><div class='add'>+						   txtb_id, txtb_status);</div><div class='add'>+					spin_unlock_irqrestore(&amp;priv-&gt;tx_lock, flags);</div><div class='add'>+					/* do not clear nor wake */</div><div class='add'>+					return;</div><div class='add'>+				}</div><div class='add'>+				goto clear;</div><div class='add'>+			}</div><div class='add'>+			priv-&gt;txb_tail++;</div><div class='add'>+			first = false;</div><div class='add'>+			some_buffers_processed = true;</div><div class='add'>+			/* Adjust priorities *before* marking the buffer as empty. */</div><div class='add'>+			ctucan_rotate_txb_prio(ndev);</div><div class='add'>+			ctucan_give_txtb_cmd(priv, TXT_CMD_SET_EMPTY, txtb_id);</div><div class='add'>+		}</div><div class='add'>+clear:</div><div class='add'>+		spin_unlock_irqrestore(&amp;priv-&gt;tx_lock, flags);</div><div class='add'>+</div><div class='add'>+		/* If no buffers were processed this time, we cannot clear - that would introduce</div><div class='add'>+		 * a race condition.</div><div class='add'>+		 */</div><div class='add'>+		if (some_buffers_processed) {</div><div class='add'>+			/* Clear the interrupt again. We do not want to receive again interrupt for</div><div class='add'>+			 * the buffer already handled. If it is the last finished one then it would</div><div class='add'>+			 * cause log of spurious interrupt.</div><div class='add'>+			 */</div><div class='add'>+			ctucan_write32(priv, CTUCANFD_INT_STAT, REG_INT_STAT_TXBHCI);</div><div class='add'>+		}</div><div class='add'>+	} while (some_buffers_processed);</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;tx_lock, flags);</div><div class='add'>+</div><div class='add'>+	/* Check if at least one TX buffer is free */</div><div class='add'>+	if (CTU_CAN_FD_TXTNF(priv))</div><div class='add'>+		netif_wake_queue(ndev);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;tx_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ctucan_interrupt() - CAN Isr</div><div class='add'>+ * @irq:	irq number</div><div class='add'>+ * @dev_id:	device id pointer</div><div class='add'>+ *</div><div class='add'>+ * This is the CTU CAN FD ISR. It checks for the type of interrupt</div><div class='add'>+ * and invokes the corresponding ISR.</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ * IRQ_NONE - If CAN device is in sleep mode, IRQ_HANDLED otherwise</div><div class='add'>+ */</div><div class='add'>+static irqreturn_t ctucan_interrupt(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = (struct net_device *)dev_id;</div><div class='add'>+	struct ctucan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	u32 isr, icr;</div><div class='add'>+	u32 imask;</div><div class='add'>+	int irq_loops;</div><div class='add'>+</div><div class='add'>+	for (irq_loops = 0; irq_loops &lt; 10000; irq_loops++) {</div><div class='add'>+		/* Get the interrupt status */</div><div class='add'>+		isr = ctucan_read32(priv, CTUCANFD_INT_STAT);</div><div class='add'>+</div><div class='add'>+		if (!isr)</div><div class='add'>+			return irq_loops ? IRQ_HANDLED : IRQ_NONE;</div><div class='add'>+</div><div class='add'>+		/* Receive Buffer Not Empty Interrupt */</div><div class='add'>+		if (FIELD_GET(REG_INT_STAT_RBNEI, isr)) {</div><div class='add'>+			ctucan_netdev_dbg(ndev, "RXBNEI\n");</div><div class='add'>+			/* Mask RXBNEI the first, then clear interrupt and schedule NAPI. Even if</div><div class='add'>+			 * another IRQ fires, RBNEI will always be 0 (masked).</div><div class='add'>+			 */</div><div class='add'>+			icr = REG_INT_STAT_RBNEI;</div><div class='add'>+			ctucan_write32(priv, CTUCANFD_INT_MASK_SET, icr);</div><div class='add'>+			ctucan_write32(priv, CTUCANFD_INT_STAT, icr);</div><div class='add'>+			napi_schedule(&amp;priv-&gt;napi);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* TXT Buffer HW Command Interrupt */</div><div class='add'>+		if (FIELD_GET(REG_INT_STAT_TXBHCI, isr)) {</div><div class='add'>+			ctucan_netdev_dbg(ndev, "TXBHCI\n");</div><div class='add'>+			/* Cleared inside */</div><div class='add'>+			ctucan_tx_interrupt(ndev);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Error interrupts */</div><div class='add'>+		if (FIELD_GET(REG_INT_STAT_EWLI, isr) ||</div><div class='add'>+		    FIELD_GET(REG_INT_STAT_FCSI, isr) ||</div><div class='add'>+		    FIELD_GET(REG_INT_STAT_ALI, isr)) {</div><div class='add'>+			icr = isr &amp; (REG_INT_STAT_EWLI | REG_INT_STAT_FCSI | REG_INT_STAT_ALI);</div><div class='add'>+</div><div class='add'>+			ctucan_netdev_dbg(ndev, "some ERR interrupt: clearing 0x%08x\n", icr);</div><div class='add'>+			ctucan_write32(priv, CTUCANFD_INT_STAT, icr);</div><div class='add'>+			ctucan_err_interrupt(ndev, isr);</div><div class='add'>+		}</div><div class='add'>+		/* Ignore RI, TI, LFI, RFI, BSI */</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev_err(ndev, "%s: stuck interrupt (isr=0x%08x), stopping\n", __func__, isr);</div><div class='add'>+</div><div class='add'>+	if (FIELD_GET(REG_INT_STAT_TXBHCI, isr)) {</div><div class='add'>+		int i;</div><div class='add'>+</div><div class='add'>+		netdev_err(ndev, "txb_head=0x%08x txb_tail=0x%08x\n",</div><div class='add'>+			   priv-&gt;txb_head, priv-&gt;txb_tail);</div><div class='add'>+		for (i = 0; i &lt; priv-&gt;ntxbufs; i++) {</div><div class='add'>+			u32 status = ctucan_get_tx_status(priv, i);</div><div class='add'>+</div><div class='add'>+			netdev_err(ndev, "txb[%d] txb status=0x%08x\n", i, status);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	imask = 0xffffffff;</div><div class='add'>+	ctucan_write32(priv, CTUCANFD_INT_ENA_CLR, imask);</div><div class='add'>+	ctucan_write32(priv, CTUCANFD_INT_MASK_SET, imask);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ctucan_chip_stop() - Driver stop routine</div><div class='add'>+ * @ndev:	Pointer to net_device structure</div><div class='add'>+ *</div><div class='add'>+ * This is the drivers stop routine. It will disable the</div><div class='add'>+ * interrupts and disable the controller.</div><div class='add'>+ */</div><div class='add'>+static void ctucan_chip_stop(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct ctucan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	u32 mask = 0xffffffff;</div><div class='add'>+	u32 mode;</div><div class='add'>+</div><div class='add'>+	/* Disable interrupts and disable CAN */</div><div class='add'>+	ctucan_write32(priv, CTUCANFD_INT_ENA_CLR, mask);</div><div class='add'>+	ctucan_write32(priv, CTUCANFD_INT_MASK_SET, mask);</div><div class='add'>+	mode = ctucan_read32(priv, CTUCANFD_MODE);</div><div class='add'>+	mode &amp;= ~REG_MODE_ENA;</div><div class='add'>+	ctucan_write32(priv, CTUCANFD_MODE, mode);</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ctucan_open() - Driver open routine</div><div class='add'>+ * @ndev:	Pointer to net_device structure</div><div class='add'>+ *</div><div class='add'>+ * This is the driver open routine.</div><div class='add'>+ * Return: 0 on success and failure value on error</div><div class='add'>+ */</div><div class='add'>+static int ctucan_open(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct ctucan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = pm_runtime_get_sync(priv-&gt;dev);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		netdev_err(ndev, "%s: pm_runtime_get failed(%d)\n",</div><div class='add'>+			   __func__, ret);</div><div class='add'>+		pm_runtime_put_noidle(priv-&gt;dev);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ctucan_reset(ndev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err_reset;</div><div class='add'>+</div><div class='add'>+	/* Common open */</div><div class='add'>+	ret = open_candev(ndev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_warn(ndev, "open_candev failed!\n");</div><div class='add'>+		goto err_open;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = request_irq(ndev-&gt;irq, ctucan_interrupt, priv-&gt;irq_flags, ndev-&gt;name, ndev);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		netdev_err(ndev, "irq allocation for CAN failed\n");</div><div class='add'>+		goto err_irq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ctucan_chip_start(ndev);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		netdev_err(ndev, "ctucan_chip_start failed!\n");</div><div class='add'>+		goto err_chip_start;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev_info(ndev, "ctu_can_fd device registered\n");</div><div class='add'>+	napi_enable(&amp;priv-&gt;napi);</div><div class='add'>+	netif_start_queue(ndev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_chip_start:</div><div class='add'>+	free_irq(ndev-&gt;irq, ndev);</div><div class='add'>+err_irq:</div><div class='add'>+	close_candev(ndev);</div><div class='add'>+err_open:</div><div class='add'>+err_reset:</div><div class='add'>+	pm_runtime_put(priv-&gt;dev);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ctucan_close() - Driver close routine</div><div class='add'>+ * @ndev:	Pointer to net_device structure</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 always</div><div class='add'>+ */</div><div class='add'>+static int ctucan_close(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct ctucan_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(ndev);</div><div class='add'>+	napi_disable(&amp;priv-&gt;napi);</div><div class='add'>+	ctucan_chip_stop(ndev);</div><div class='add'>+	free_irq(ndev-&gt;irq, ndev);</div><div class='add'>+	close_candev(ndev);</div><div class='add'>+</div><div class='add'>+	pm_runtime_put(priv-&gt;dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ctucan_get_berr_counter() - error counter routine</div><div class='add'>+ * @ndev:	Pointer to net_device structure</div><div class='add'>+ * @bec:	Pointer to can_berr_counter structure</div><div class='add'>+ *</div><div class='add'>+ * This is the driver error counter routine.</div><div class='add'>+ * Return: 0 on success and failure value on error</div><div class='add'>+ */</div><div class='add'>+static int ctucan_get_berr_counter(const struct net_device *ndev, struct can_berr_counter *bec)</div><div class='add'>+{</div><div class='add'>+	struct ctucan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = pm_runtime_get_sync(priv-&gt;dev);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		netdev_err(ndev, "%s: pm_runtime_get failed(%d)\n", __func__, ret);</div><div class='add'>+		pm_runtime_put_noidle(priv-&gt;dev);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ctucan_get_rec_tec(priv, bec);</div><div class='add'>+	pm_runtime_put(priv-&gt;dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops ctucan_netdev_ops = {</div><div class='add'>+	.ndo_open	= ctucan_open,</div><div class='add'>+	.ndo_stop	= ctucan_close,</div><div class='add'>+	.ndo_start_xmit	= ctucan_start_xmit,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops ctucan_ethtool_ops = {</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int ctucan_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = dev_get_drvdata(dev);</div><div class='add'>+	struct ctucan_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	if (netif_running(ndev)) {</div><div class='add'>+		netif_stop_queue(ndev);</div><div class='add'>+		netif_device_detach(ndev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_SLEEPING;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(ctucan_suspend);</div><div class='add'>+</div><div class='add'>+int ctucan_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = dev_get_drvdata(dev);</div><div class='add'>+	struct ctucan_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+</div><div class='add'>+	if (netif_running(ndev)) {</div><div class='add'>+		netif_device_attach(ndev);</div><div class='add'>+		netif_start_queue(ndev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(ctucan_resume);</div><div class='add'>+</div><div class='add'>+int ctucan_probe_common(struct device *dev, void __iomem *addr, int irq, unsigned int ntxbufs,</div><div class='add'>+			unsigned long can_clk_rate, int pm_enable_call,</div><div class='add'>+			void (*set_drvdata_fnc)(struct device *dev, struct net_device *ndev))</div><div class='add'>+{</div><div class='add'>+	struct ctucan_priv *priv;</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Create a CAN device instance */</div><div class='add'>+	ndev = alloc_candev(sizeof(struct ctucan_priv), ntxbufs);</div><div class='add'>+	if (!ndev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv = netdev_priv(ndev);</div><div class='add'>+	spin_lock_init(&amp;priv-&gt;tx_lock);</div><div class='add'>+	INIT_LIST_HEAD(&amp;priv-&gt;peers_on_pdev);</div><div class='add'>+	priv-&gt;ntxbufs = ntxbufs;</div><div class='add'>+	priv-&gt;dev = dev;</div><div class='add'>+	priv-&gt;can.bittiming_const = &amp;ctu_can_fd_bit_timing_max;</div><div class='add'>+	priv-&gt;can.fd.data_bittiming_const = &amp;ctu_can_fd_bit_timing_data_max;</div><div class='add'>+	priv-&gt;can.do_set_mode = ctucan_do_set_mode;</div><div class='add'>+</div><div class='add'>+	/* Needed for timing adjustment to be performed as soon as possible */</div><div class='add'>+	priv-&gt;can.do_set_bittiming = ctucan_set_bittiming;</div><div class='add'>+	priv-&gt;can.fd.do_set_data_bittiming = ctucan_set_data_bittiming;</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.do_get_berr_counter = ctucan_get_berr_counter;</div><div class='add'>+	priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK</div><div class='add'>+					| CAN_CTRLMODE_LISTENONLY</div><div class='add'>+					| CAN_CTRLMODE_FD</div><div class='add'>+					| CAN_CTRLMODE_PRESUME_ACK</div><div class='add'>+					| CAN_CTRLMODE_BERR_REPORTING</div><div class='add'>+					| CAN_CTRLMODE_FD_NON_ISO</div><div class='add'>+					| CAN_CTRLMODE_ONE_SHOT;</div><div class='add'>+	priv-&gt;mem_base = addr;</div><div class='add'>+</div><div class='add'>+	/* Get IRQ for the device */</div><div class='add'>+	ndev-&gt;irq = irq;</div><div class='add'>+	ndev-&gt;flags |= IFF_ECHO;	/* We support local echo */</div><div class='add'>+</div><div class='add'>+	if (set_drvdata_fnc)</div><div class='add'>+		set_drvdata_fnc(dev, ndev);</div><div class='add'>+	SET_NETDEV_DEV(ndev, dev);</div><div class='add'>+	ndev-&gt;netdev_ops = &amp;ctucan_netdev_ops;</div><div class='add'>+	ndev-&gt;ethtool_ops = &amp;ctucan_ethtool_ops;</div><div class='add'>+</div><div class='add'>+	/* Getting the can_clk info */</div><div class='add'>+	if (!can_clk_rate) {</div><div class='add'>+		priv-&gt;can_clk = devm_clk_get(dev, NULL);</div><div class='add'>+		if (IS_ERR(priv-&gt;can_clk)) {</div><div class='add'>+			dev_err(dev, "Device clock not found.\n");</div><div class='add'>+			ret = PTR_ERR(priv-&gt;can_clk);</div><div class='add'>+			goto err_free;</div><div class='add'>+		}</div><div class='add'>+		can_clk_rate = clk_get_rate(priv-&gt;can_clk);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;write_reg = ctucan_write32_le;</div><div class='add'>+	priv-&gt;read_reg = ctucan_read32_le;</div><div class='add'>+</div><div class='add'>+	if (pm_enable_call)</div><div class='add'>+		pm_runtime_enable(dev);</div><div class='add'>+	ret = pm_runtime_get_sync(dev);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		netdev_err(ndev, "%s: pm_runtime_get failed(%d)\n",</div><div class='add'>+			   __func__, ret);</div><div class='add'>+		pm_runtime_put_noidle(priv-&gt;dev);</div><div class='add'>+		goto err_pmdisable;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Check for big-endianity and set according IO-accessors */</div><div class='add'>+	if ((ctucan_read32(priv, CTUCANFD_DEVICE_ID) &amp; 0xFFFF) != CTUCANFD_ID) {</div><div class='add'>+		priv-&gt;write_reg = ctucan_write32_be;</div><div class='add'>+		priv-&gt;read_reg = ctucan_read32_be;</div><div class='add'>+		if ((ctucan_read32(priv, CTUCANFD_DEVICE_ID) &amp; 0xFFFF) != CTUCANFD_ID) {</div><div class='add'>+			netdev_err(ndev, "CTU_CAN_FD signature not found\n");</div><div class='add'>+			ret = -ENODEV;</div><div class='add'>+			goto err_deviceoff;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ctucan_reset(ndev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err_deviceoff;</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.clock.freq = can_clk_rate;</div><div class='add'>+</div><div class='add'>+	netif_napi_add(ndev, &amp;priv-&gt;napi, ctucan_rx_poll);</div><div class='add'>+</div><div class='add'>+	ret = register_candev(ndev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "fail to register failed (err=%d)\n", ret);</div><div class='add'>+		goto err_deviceoff;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pm_runtime_put(dev);</div><div class='add'>+</div><div class='add'>+	netdev_dbg(ndev, "mem_base=0x%p irq=%d clock=%d, no. of txt buffers:%d\n",</div><div class='add'>+		   priv-&gt;mem_base, ndev-&gt;irq, priv-&gt;can.clock.freq, priv-&gt;ntxbufs);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_deviceoff:</div><div class='add'>+	pm_runtime_put(priv-&gt;dev);</div><div class='add'>+err_pmdisable:</div><div class='add'>+	if (pm_enable_call)</div><div class='add'>+		pm_runtime_disable(dev);</div><div class='add'>+err_free:</div><div class='add'>+	list_del_init(&amp;priv-&gt;peers_on_pdev);</div><div class='add'>+	free_candev(ndev);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(ctucan_probe_common);</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_AUTHOR("Martin Jerabek &lt;martin.jerabek01@gmail.com&gt;");</div><div class='add'>+MODULE_AUTHOR("Pavel Pisa &lt;pisa@cmp.felk.cvut.cz&gt;");</div><div class='add'>+MODULE_AUTHOR("Ondrej Ille &lt;ondrej.ille@gmail.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("CTU CAN FD interface");</div><div class='head'>diff --git a/drivers/net/can/ctucanfd/ctucanfd_kframe.h b/drivers/net/can/ctucanfd/ctucanfd_kframe.h<br/>new file mode 100644<br/>index 000000000000..3491299eaac2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/ctucanfd/ctucanfd_kframe.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/ctucanfd/ctucanfd_kframe.h</a></div><div class='hunk'>@@ -0,0 +1,77 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+/*******************************************************************************</div><div class='add'>+ *</div><div class='add'>+ * CTU CAN FD IP Core</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015-2018 Ondrej Ille &lt;ondrej.ille@gmail.com&gt; FEE CTU</div><div class='add'>+ * Copyright (C) 2018-2021 Ondrej Ille &lt;ondrej.ille@gmail.com&gt; self-funded</div><div class='add'>+ * Copyright (C) 2018-2019 Martin Jerabek &lt;martin.jerabek01@gmail.com&gt; FEE CTU</div><div class='add'>+ * Copyright (C) 2018-2021 Pavel Pisa &lt;pisa@cmp.felk.cvut.cz&gt; FEE CTU/self-funded</div><div class='add'>+ *</div><div class='add'>+ * Project advisors:</div><div class='add'>+ *     Jiri Novak &lt;jnovak@fel.cvut.cz&gt;</div><div class='add'>+ *     Pavel Pisa &lt;pisa@cmp.felk.cvut.cz&gt;</div><div class='add'>+ *</div><div class='add'>+ * Department of Measurement         (http://meas.fel.cvut.cz/)</div><div class='add'>+ * Faculty of Electrical Engineering (http://www.fel.cvut.cz)</div><div class='add'>+ * Czech Technical University        (http://www.cvut.cz/)</div><div class='add'>+ ******************************************************************************/</div><div class='add'>+</div><div class='add'>+/* This file is autogenerated, DO NOT EDIT! */</div><div class='add'>+</div><div class='add'>+#ifndef __CTU_CAN_FD_CAN_FD_FRAME_FORMAT__</div><div class='add'>+#define __CTU_CAN_FD_CAN_FD_FRAME_FORMAT__</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bits.h&gt;</div><div class='add'>+</div><div class='add'>+/* CAN_Frame_format memory map */</div><div class='add'>+enum ctu_can_fd_can_frame_format {</div><div class='add'>+	CTUCANFD_FRAME_FORMAT_W       = 0x0,</div><div class='add'>+	CTUCANFD_IDENTIFIER_W         = 0x4,</div><div class='add'>+	CTUCANFD_TIMESTAMP_L_W        = 0x8,</div><div class='add'>+	CTUCANFD_TIMESTAMP_U_W        = 0xc,</div><div class='add'>+	CTUCANFD_DATA_1_4_W          = 0x10,</div><div class='add'>+	CTUCANFD_DATA_5_8_W          = 0x14,</div><div class='add'>+	CTUCANFD_DATA_61_64_W        = 0x4c,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* CAN_FD_Frame_format memory region */</div><div class='add'>+</div><div class='add'>+/*  FRAME_FORMAT_W registers */</div><div class='add'>+#define REG_FRAME_FORMAT_W_DLC GENMASK(3, 0)</div><div class='add'>+#define REG_FRAME_FORMAT_W_RTR BIT(5)</div><div class='add'>+#define REG_FRAME_FORMAT_W_IDE BIT(6)</div><div class='add'>+#define REG_FRAME_FORMAT_W_FDF BIT(7)</div><div class='add'>+#define REG_FRAME_FORMAT_W_BRS BIT(9)</div><div class='add'>+#define REG_FRAME_FORMAT_W_ESI_RSV BIT(10)</div><div class='add'>+#define REG_FRAME_FORMAT_W_RWCNT GENMASK(15, 11)</div><div class='add'>+</div><div class='add'>+/*  IDENTIFIER_W registers */</div><div class='add'>+#define REG_IDENTIFIER_W_IDENTIFIER_EXT GENMASK(17, 0)</div><div class='add'>+#define REG_IDENTIFIER_W_IDENTIFIER_BASE GENMASK(28, 18)</div><div class='add'>+</div><div class='add'>+/*  TIMESTAMP_L_W registers */</div><div class='add'>+#define REG_TIMESTAMP_L_W_TIME_STAMP_L_W GENMASK(31, 0)</div><div class='add'>+</div><div class='add'>+/*  TIMESTAMP_U_W registers */</div><div class='add'>+#define REG_TIMESTAMP_U_W_TIMESTAMP_U_W GENMASK(31, 0)</div><div class='add'>+</div><div class='add'>+/*  DATA_1_4_W registers */</div><div class='add'>+#define REG_DATA_1_4_W_DATA_1 GENMASK(7, 0)</div><div class='add'>+#define REG_DATA_1_4_W_DATA_2 GENMASK(15, 8)</div><div class='add'>+#define REG_DATA_1_4_W_DATA_3 GENMASK(23, 16)</div><div class='add'>+#define REG_DATA_1_4_W_DATA_4 GENMASK(31, 24)</div><div class='add'>+</div><div class='add'>+/*  DATA_5_8_W registers */</div><div class='add'>+#define REG_DATA_5_8_W_DATA_5 GENMASK(7, 0)</div><div class='add'>+#define REG_DATA_5_8_W_DATA_6 GENMASK(15, 8)</div><div class='add'>+#define REG_DATA_5_8_W_DATA_7 GENMASK(23, 16)</div><div class='add'>+#define REG_DATA_5_8_W_DATA_8 GENMASK(31, 24)</div><div class='add'>+</div><div class='add'>+/*  DATA_61_64_W registers */</div><div class='add'>+#define REG_DATA_61_64_W_DATA_61 GENMASK(7, 0)</div><div class='add'>+#define REG_DATA_61_64_W_DATA_62 GENMASK(15, 8)</div><div class='add'>+#define REG_DATA_61_64_W_DATA_63 GENMASK(23, 16)</div><div class='add'>+#define REG_DATA_61_64_W_DATA_64 GENMASK(31, 24)</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/can/ctucanfd/ctucanfd_kregs.h b/drivers/net/can/ctucanfd/ctucanfd_kregs.h<br/>new file mode 100644<br/>index 000000000000..0c181ab51bf8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/ctucanfd/ctucanfd_kregs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/ctucanfd/ctucanfd_kregs.h</a></div><div class='hunk'>@@ -0,0 +1,349 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+/*******************************************************************************</div><div class='add'>+ *</div><div class='add'>+ * CTU CAN FD IP Core</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015-2018 Ondrej Ille &lt;ondrej.ille@gmail.com&gt; FEE CTU</div><div class='add'>+ * Copyright (C) 2018-2022 Ondrej Ille &lt;ondrej.ille@gmail.com&gt; self-funded</div><div class='add'>+ * Copyright (C) 2018-2019 Martin Jerabek &lt;martin.jerabek01@gmail.com&gt; FEE CTU</div><div class='add'>+ * Copyright (C) 2018-2022 Pavel Pisa &lt;pisa@cmp.felk.cvut.cz&gt; FEE CTU/self-funded</div><div class='add'>+ *</div><div class='add'>+ * Project advisors:</div><div class='add'>+ *     Jiri Novak &lt;jnovak@fel.cvut.cz&gt;</div><div class='add'>+ *     Pavel Pisa &lt;pisa@cmp.felk.cvut.cz&gt;</div><div class='add'>+ *</div><div class='add'>+ * Department of Measurement         (http://meas.fel.cvut.cz/)</div><div class='add'>+ * Faculty of Electrical Engineering (http://www.fel.cvut.cz)</div><div class='add'>+ * Czech Technical University        (http://www.cvut.cz/)</div><div class='add'>+ ******************************************************************************/</div><div class='add'>+</div><div class='add'>+/* This file is autogenerated, DO NOT EDIT! */</div><div class='add'>+</div><div class='add'>+#ifndef __CTU_CAN_FD_CAN_FD_REGISTER_MAP__</div><div class='add'>+#define __CTU_CAN_FD_CAN_FD_REGISTER_MAP__</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bits.h&gt;</div><div class='add'>+</div><div class='add'>+/* CAN_Registers memory map */</div><div class='add'>+enum ctu_can_fd_can_registers {</div><div class='add'>+	CTUCANFD_DEVICE_ID             = 0x0,</div><div class='add'>+	CTUCANFD_VERSION               = 0x2,</div><div class='add'>+	CTUCANFD_MODE                  = 0x4,</div><div class='add'>+	CTUCANFD_SETTINGS              = 0x6,</div><div class='add'>+	CTUCANFD_STATUS                = 0x8,</div><div class='add'>+	CTUCANFD_COMMAND               = 0xc,</div><div class='add'>+	CTUCANFD_INT_STAT             = 0x10,</div><div class='add'>+	CTUCANFD_INT_ENA_SET          = 0x14,</div><div class='add'>+	CTUCANFD_INT_ENA_CLR          = 0x18,</div><div class='add'>+	CTUCANFD_INT_MASK_SET         = 0x1c,</div><div class='add'>+	CTUCANFD_INT_MASK_CLR         = 0x20,</div><div class='add'>+	CTUCANFD_BTR                  = 0x24,</div><div class='add'>+	CTUCANFD_BTR_FD               = 0x28,</div><div class='add'>+	CTUCANFD_EWL                  = 0x2c,</div><div class='add'>+	CTUCANFD_ERP                  = 0x2d,</div><div class='add'>+	CTUCANFD_FAULT_STATE          = 0x2e,</div><div class='add'>+	CTUCANFD_REC                  = 0x30,</div><div class='add'>+	CTUCANFD_TEC                  = 0x32,</div><div class='add'>+	CTUCANFD_ERR_NORM             = 0x34,</div><div class='add'>+	CTUCANFD_ERR_FD               = 0x36,</div><div class='add'>+	CTUCANFD_CTR_PRES             = 0x38,</div><div class='add'>+	CTUCANFD_FILTER_A_MASK        = 0x3c,</div><div class='add'>+	CTUCANFD_FILTER_A_VAL         = 0x40,</div><div class='add'>+	CTUCANFD_FILTER_B_MASK        = 0x44,</div><div class='add'>+	CTUCANFD_FILTER_B_VAL         = 0x48,</div><div class='add'>+	CTUCANFD_FILTER_C_MASK        = 0x4c,</div><div class='add'>+	CTUCANFD_FILTER_C_VAL         = 0x50,</div><div class='add'>+	CTUCANFD_FILTER_RAN_LOW       = 0x54,</div><div class='add'>+	CTUCANFD_FILTER_RAN_HIGH      = 0x58,</div><div class='add'>+	CTUCANFD_FILTER_CONTROL       = 0x5c,</div><div class='add'>+	CTUCANFD_FILTER_STATUS        = 0x5e,</div><div class='add'>+	CTUCANFD_RX_MEM_INFO          = 0x60,</div><div class='add'>+	CTUCANFD_RX_POINTERS          = 0x64,</div><div class='add'>+	CTUCANFD_RX_STATUS            = 0x68,</div><div class='add'>+	CTUCANFD_RX_SETTINGS          = 0x6a,</div><div class='add'>+	CTUCANFD_RX_DATA              = 0x6c,</div><div class='add'>+	CTUCANFD_TX_STATUS            = 0x70,</div><div class='add'>+	CTUCANFD_TX_COMMAND           = 0x74,</div><div class='add'>+	CTUCANFD_TXTB_INFO            = 0x76,</div><div class='add'>+	CTUCANFD_TX_PRIORITY          = 0x78,</div><div class='add'>+	CTUCANFD_ERR_CAPT             = 0x7c,</div><div class='add'>+	CTUCANFD_RETR_CTR             = 0x7d,</div><div class='add'>+	CTUCANFD_ALC                  = 0x7e,</div><div class='add'>+	CTUCANFD_TS_INFO              = 0x7f,</div><div class='add'>+	CTUCANFD_TRV_DELAY            = 0x80,</div><div class='add'>+	CTUCANFD_SSP_CFG              = 0x82,</div><div class='add'>+	CTUCANFD_RX_FR_CTR            = 0x84,</div><div class='add'>+	CTUCANFD_TX_FR_CTR            = 0x88,</div><div class='add'>+	CTUCANFD_DEBUG_REGISTER       = 0x8c,</div><div class='add'>+	CTUCANFD_YOLO_REG             = 0x90,</div><div class='add'>+	CTUCANFD_TIMESTAMP_LOW        = 0x94,</div><div class='add'>+	CTUCANFD_TIMESTAMP_HIGH       = 0x98,</div><div class='add'>+	CTUCANFD_TXTB1_DATA_1        = 0x100,</div><div class='add'>+	CTUCANFD_TXTB1_DATA_2        = 0x104,</div><div class='add'>+	CTUCANFD_TXTB1_DATA_20       = 0x14c,</div><div class='add'>+	CTUCANFD_TXTB2_DATA_1        = 0x200,</div><div class='add'>+	CTUCANFD_TXTB2_DATA_2        = 0x204,</div><div class='add'>+	CTUCANFD_TXTB2_DATA_20       = 0x24c,</div><div class='add'>+	CTUCANFD_TXTB3_DATA_1        = 0x300,</div><div class='add'>+	CTUCANFD_TXTB3_DATA_2        = 0x304,</div><div class='add'>+	CTUCANFD_TXTB3_DATA_20       = 0x34c,</div><div class='add'>+	CTUCANFD_TXTB4_DATA_1        = 0x400,</div><div class='add'>+	CTUCANFD_TXTB4_DATA_2        = 0x404,</div><div class='add'>+	CTUCANFD_TXTB4_DATA_20       = 0x44c,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Control_registers memory region */</div><div class='add'>+</div><div class='add'>+/*  DEVICE_ID VERSION registers */</div><div class='add'>+#define REG_DEVICE_ID_DEVICE_ID GENMASK(15, 0)</div><div class='add'>+#define REG_DEVICE_ID_VER_MINOR GENMASK(23, 16)</div><div class='add'>+#define REG_DEVICE_ID_VER_MAJOR GENMASK(31, 24)</div><div class='add'>+</div><div class='add'>+/*  MODE SETTINGS registers */</div><div class='add'>+#define REG_MODE_RST BIT(0)</div><div class='add'>+#define REG_MODE_BMM BIT(1)</div><div class='add'>+#define REG_MODE_STM BIT(2)</div><div class='add'>+#define REG_MODE_AFM BIT(3)</div><div class='add'>+#define REG_MODE_FDE BIT(4)</div><div class='add'>+#define REG_MODE_TTTM BIT(5)</div><div class='add'>+#define REG_MODE_ROM BIT(6)</div><div class='add'>+#define REG_MODE_ACF BIT(7)</div><div class='add'>+#define REG_MODE_TSTM BIT(8)</div><div class='add'>+#define REG_MODE_RXBAM BIT(9)</div><div class='add'>+#define REG_MODE_SAM BIT(11)</div><div class='add'>+#define REG_MODE_RTRLE BIT(16)</div><div class='add'>+#define REG_MODE_RTRTH GENMASK(20, 17)</div><div class='add'>+#define REG_MODE_ILBP BIT(21)</div><div class='add'>+#define REG_MODE_ENA BIT(22)</div><div class='add'>+#define REG_MODE_NISOFD BIT(23)</div><div class='add'>+#define REG_MODE_PEX BIT(24)</div><div class='add'>+#define REG_MODE_TBFBO BIT(25)</div><div class='add'>+#define REG_MODE_FDRF BIT(26)</div><div class='add'>+</div><div class='add'>+/*  STATUS registers */</div><div class='add'>+#define REG_STATUS_RXNE BIT(0)</div><div class='add'>+#define REG_STATUS_DOR BIT(1)</div><div class='add'>+#define REG_STATUS_TXNF BIT(2)</div><div class='add'>+#define REG_STATUS_EFT BIT(3)</div><div class='add'>+#define REG_STATUS_RXS BIT(4)</div><div class='add'>+#define REG_STATUS_TXS BIT(5)</div><div class='add'>+#define REG_STATUS_EWL BIT(6)</div><div class='add'>+#define REG_STATUS_IDLE BIT(7)</div><div class='add'>+#define REG_STATUS_PEXS BIT(8)</div><div class='add'>+#define REG_STATUS_STCNT BIT(16)</div><div class='add'>+</div><div class='add'>+/*  COMMAND registers */</div><div class='add'>+#define REG_COMMAND_RXRPMV BIT(1)</div><div class='add'>+#define REG_COMMAND_RRB BIT(2)</div><div class='add'>+#define REG_COMMAND_CDO BIT(3)</div><div class='add'>+#define REG_COMMAND_ERCRST BIT(4)</div><div class='add'>+#define REG_COMMAND_RXFCRST BIT(5)</div><div class='add'>+#define REG_COMMAND_TXFCRST BIT(6)</div><div class='add'>+#define REG_COMMAND_CPEXS BIT(7)</div><div class='add'>+</div><div class='add'>+/*  INT_STAT registers */</div><div class='add'>+#define REG_INT_STAT_RXI BIT(0)</div><div class='add'>+#define REG_INT_STAT_TXI BIT(1)</div><div class='add'>+#define REG_INT_STAT_EWLI BIT(2)</div><div class='add'>+#define REG_INT_STAT_DOI BIT(3)</div><div class='add'>+#define REG_INT_STAT_FCSI BIT(4)</div><div class='add'>+#define REG_INT_STAT_ALI BIT(5)</div><div class='add'>+#define REG_INT_STAT_BEI BIT(6)</div><div class='add'>+#define REG_INT_STAT_OFI BIT(7)</div><div class='add'>+#define REG_INT_STAT_RXFI BIT(8)</div><div class='add'>+#define REG_INT_STAT_BSI BIT(9)</div><div class='add'>+#define REG_INT_STAT_RBNEI BIT(10)</div><div class='add'>+#define REG_INT_STAT_TXBHCI BIT(11)</div><div class='add'>+</div><div class='add'>+/*  INT_ENA_SET registers */</div><div class='add'>+#define REG_INT_ENA_SET_INT_ENA_SET GENMASK(11, 0)</div><div class='add'>+</div><div class='add'>+/*  INT_ENA_CLR registers */</div><div class='add'>+#define REG_INT_ENA_CLR_INT_ENA_CLR GENMASK(11, 0)</div><div class='add'>+</div><div class='add'>+/*  INT_MASK_SET registers */</div><div class='add'>+#define REG_INT_MASK_SET_INT_MASK_SET GENMASK(11, 0)</div><div class='add'>+</div><div class='add'>+/*  INT_MASK_CLR registers */</div><div class='add'>+#define REG_INT_MASK_CLR_INT_MASK_CLR GENMASK(11, 0)</div><div class='add'>+</div><div class='add'>+/*  BTR registers */</div><div class='add'>+#define REG_BTR_PROP GENMASK(6, 0)</div><div class='add'>+#define REG_BTR_PH1 GENMASK(12, 7)</div><div class='add'>+#define REG_BTR_PH2 GENMASK(18, 13)</div><div class='add'>+#define REG_BTR_BRP GENMASK(26, 19)</div><div class='add'>+#define REG_BTR_SJW GENMASK(31, 27)</div><div class='add'>+</div><div class='add'>+/*  BTR_FD registers */</div><div class='add'>+#define REG_BTR_FD_PROP_FD GENMASK(5, 0)</div><div class='add'>+#define REG_BTR_FD_PH1_FD GENMASK(11, 7)</div><div class='add'>+#define REG_BTR_FD_PH2_FD GENMASK(17, 13)</div><div class='add'>+#define REG_BTR_FD_BRP_FD GENMASK(26, 19)</div><div class='add'>+#define REG_BTR_FD_SJW_FD GENMASK(31, 27)</div><div class='add'>+</div><div class='add'>+/*  EWL ERP FAULT_STATE registers */</div><div class='add'>+#define REG_EWL_EW_LIMIT GENMASK(7, 0)</div><div class='add'>+#define REG_EWL_ERP_LIMIT GENMASK(15, 8)</div><div class='add'>+#define REG_EWL_ERA BIT(16)</div><div class='add'>+#define REG_EWL_ERP BIT(17)</div><div class='add'>+#define REG_EWL_BOF BIT(18)</div><div class='add'>+</div><div class='add'>+/*  REC TEC registers */</div><div class='add'>+#define REG_REC_REC_VAL GENMASK(8, 0)</div><div class='add'>+#define REG_REC_TEC_VAL GENMASK(24, 16)</div><div class='add'>+</div><div class='add'>+/*  ERR_NORM ERR_FD registers */</div><div class='add'>+#define REG_ERR_NORM_ERR_NORM_VAL GENMASK(15, 0)</div><div class='add'>+#define REG_ERR_NORM_ERR_FD_VAL GENMASK(31, 16)</div><div class='add'>+</div><div class='add'>+/*  CTR_PRES registers */</div><div class='add'>+#define REG_CTR_PRES_CTPV GENMASK(8, 0)</div><div class='add'>+#define REG_CTR_PRES_PTX BIT(9)</div><div class='add'>+#define REG_CTR_PRES_PRX BIT(10)</div><div class='add'>+#define REG_CTR_PRES_ENORM BIT(11)</div><div class='add'>+#define REG_CTR_PRES_EFD BIT(12)</div><div class='add'>+</div><div class='add'>+/*  FILTER_A_MASK registers */</div><div class='add'>+#define REG_FILTER_A_MASK_BIT_MASK_A_VAL GENMASK(28, 0)</div><div class='add'>+</div><div class='add'>+/*  FILTER_A_VAL registers */</div><div class='add'>+#define REG_FILTER_A_VAL_BIT_VAL_A_VAL GENMASK(28, 0)</div><div class='add'>+</div><div class='add'>+/*  FILTER_B_MASK registers */</div><div class='add'>+#define REG_FILTER_B_MASK_BIT_MASK_B_VAL GENMASK(28, 0)</div><div class='add'>+</div><div class='add'>+/*  FILTER_B_VAL registers */</div><div class='add'>+#define REG_FILTER_B_VAL_BIT_VAL_B_VAL GENMASK(28, 0)</div><div class='add'>+</div><div class='add'>+/*  FILTER_C_MASK registers */</div><div class='add'>+#define REG_FILTER_C_MASK_BIT_MASK_C_VAL GENMASK(28, 0)</div><div class='add'>+</div><div class='add'>+/*  FILTER_C_VAL registers */</div><div class='add'>+#define REG_FILTER_C_VAL_BIT_VAL_C_VAL GENMASK(28, 0)</div><div class='add'>+</div><div class='add'>+/*  FILTER_RAN_LOW registers */</div><div class='add'>+#define REG_FILTER_RAN_LOW_BIT_RAN_LOW_VAL GENMASK(28, 0)</div><div class='add'>+</div><div class='add'>+/*  FILTER_RAN_HIGH registers */</div><div class='add'>+#define REG_FILTER_RAN_HIGH_BIT_RAN_HIGH_VAL GENMASK(28, 0)</div><div class='add'>+</div><div class='add'>+/*  FILTER_CONTROL FILTER_STATUS registers */</div><div class='add'>+#define REG_FILTER_CONTROL_FANB BIT(0)</div><div class='add'>+#define REG_FILTER_CONTROL_FANE BIT(1)</div><div class='add'>+#define REG_FILTER_CONTROL_FAFB BIT(2)</div><div class='add'>+#define REG_FILTER_CONTROL_FAFE BIT(3)</div><div class='add'>+#define REG_FILTER_CONTROL_FBNB BIT(4)</div><div class='add'>+#define REG_FILTER_CONTROL_FBNE BIT(5)</div><div class='add'>+#define REG_FILTER_CONTROL_FBFB BIT(6)</div><div class='add'>+#define REG_FILTER_CONTROL_FBFE BIT(7)</div><div class='add'>+#define REG_FILTER_CONTROL_FCNB BIT(8)</div><div class='add'>+#define REG_FILTER_CONTROL_FCNE BIT(9)</div><div class='add'>+#define REG_FILTER_CONTROL_FCFB BIT(10)</div><div class='add'>+#define REG_FILTER_CONTROL_FCFE BIT(11)</div><div class='add'>+#define REG_FILTER_CONTROL_FRNB BIT(12)</div><div class='add'>+#define REG_FILTER_CONTROL_FRNE BIT(13)</div><div class='add'>+#define REG_FILTER_CONTROL_FRFB BIT(14)</div><div class='add'>+#define REG_FILTER_CONTROL_FRFE BIT(15)</div><div class='add'>+#define REG_FILTER_CONTROL_SFA BIT(16)</div><div class='add'>+#define REG_FILTER_CONTROL_SFB BIT(17)</div><div class='add'>+#define REG_FILTER_CONTROL_SFC BIT(18)</div><div class='add'>+#define REG_FILTER_CONTROL_SFR BIT(19)</div><div class='add'>+</div><div class='add'>+/*  RX_MEM_INFO registers */</div><div class='add'>+#define REG_RX_MEM_INFO_RX_BUFF_SIZE GENMASK(12, 0)</div><div class='add'>+#define REG_RX_MEM_INFO_RX_MEM_FREE GENMASK(28, 16)</div><div class='add'>+</div><div class='add'>+/*  RX_POINTERS registers */</div><div class='add'>+#define REG_RX_POINTERS_RX_WPP GENMASK(11, 0)</div><div class='add'>+#define REG_RX_POINTERS_RX_RPP GENMASK(27, 16)</div><div class='add'>+</div><div class='add'>+/*  RX_STATUS RX_SETTINGS registers */</div><div class='add'>+#define REG_RX_STATUS_RXE BIT(0)</div><div class='add'>+#define REG_RX_STATUS_RXF BIT(1)</div><div class='add'>+#define REG_RX_STATUS_RXMOF BIT(2)</div><div class='add'>+#define REG_RX_STATUS_RXFRC GENMASK(14, 4)</div><div class='add'>+#define REG_RX_STATUS_RTSOP BIT(16)</div><div class='add'>+</div><div class='add'>+/*  RX_DATA registers */</div><div class='add'>+#define REG_RX_DATA_RX_DATA GENMASK(31, 0)</div><div class='add'>+</div><div class='add'>+/*  TX_STATUS registers */</div><div class='add'>+#define REG_TX_STATUS_TX1S GENMASK(3, 0)</div><div class='add'>+#define REG_TX_STATUS_TX2S GENMASK(7, 4)</div><div class='add'>+#define REG_TX_STATUS_TX3S GENMASK(11, 8)</div><div class='add'>+#define REG_TX_STATUS_TX4S GENMASK(15, 12)</div><div class='add'>+#define REG_TX_STATUS_TX5S GENMASK(19, 16)</div><div class='add'>+#define REG_TX_STATUS_TX6S GENMASK(23, 20)</div><div class='add'>+#define REG_TX_STATUS_TX7S GENMASK(27, 24)</div><div class='add'>+#define REG_TX_STATUS_TX8S GENMASK(31, 28)</div><div class='add'>+</div><div class='add'>+/*  TX_COMMAND TXTB_INFO registers */</div><div class='add'>+#define REG_TX_COMMAND_TXCE BIT(0)</div><div class='add'>+#define REG_TX_COMMAND_TXCR BIT(1)</div><div class='add'>+#define REG_TX_COMMAND_TXCA BIT(2)</div><div class='add'>+#define REG_TX_COMMAND_TXB1 BIT(8)</div><div class='add'>+#define REG_TX_COMMAND_TXB2 BIT(9)</div><div class='add'>+#define REG_TX_COMMAND_TXB3 BIT(10)</div><div class='add'>+#define REG_TX_COMMAND_TXB4 BIT(11)</div><div class='add'>+#define REG_TX_COMMAND_TXB5 BIT(12)</div><div class='add'>+#define REG_TX_COMMAND_TXB6 BIT(13)</div><div class='add'>+#define REG_TX_COMMAND_TXB7 BIT(14)</div><div class='add'>+#define REG_TX_COMMAND_TXB8 BIT(15)</div><div class='add'>+#define REG_TX_COMMAND_TXT_BUFFER_COUNT GENMASK(19, 16)</div><div class='add'>+</div><div class='add'>+/*  TX_PRIORITY registers */</div><div class='add'>+#define REG_TX_PRIORITY_TXT1P GENMASK(2, 0)</div><div class='add'>+#define REG_TX_PRIORITY_TXT2P GENMASK(6, 4)</div><div class='add'>+#define REG_TX_PRIORITY_TXT3P GENMASK(10, 8)</div><div class='add'>+#define REG_TX_PRIORITY_TXT4P GENMASK(14, 12)</div><div class='add'>+#define REG_TX_PRIORITY_TXT5P GENMASK(18, 16)</div><div class='add'>+#define REG_TX_PRIORITY_TXT6P GENMASK(22, 20)</div><div class='add'>+#define REG_TX_PRIORITY_TXT7P GENMASK(26, 24)</div><div class='add'>+#define REG_TX_PRIORITY_TXT8P GENMASK(30, 28)</div><div class='add'>+</div><div class='add'>+/*  ERR_CAPT RETR_CTR ALC TS_INFO registers */</div><div class='add'>+#define REG_ERR_CAPT_ERR_POS GENMASK(4, 0)</div><div class='add'>+#define REG_ERR_CAPT_ERR_TYPE GENMASK(7, 5)</div><div class='add'>+#define REG_ERR_CAPT_RETR_CTR_VAL GENMASK(11, 8)</div><div class='add'>+#define REG_ERR_CAPT_ALC_BIT GENMASK(20, 16)</div><div class='add'>+#define REG_ERR_CAPT_ALC_ID_FIELD GENMASK(23, 21)</div><div class='add'>+#define REG_ERR_CAPT_TS_BITS GENMASK(29, 24)</div><div class='add'>+</div><div class='add'>+/*  TRV_DELAY SSP_CFG registers */</div><div class='add'>+#define REG_TRV_DELAY_TRV_DELAY_VALUE GENMASK(6, 0)</div><div class='add'>+#define REG_TRV_DELAY_SSP_OFFSET GENMASK(23, 16)</div><div class='add'>+#define REG_TRV_DELAY_SSP_SRC GENMASK(25, 24)</div><div class='add'>+</div><div class='add'>+/*  RX_FR_CTR registers */</div><div class='add'>+#define REG_RX_FR_CTR_RX_FR_CTR_VAL GENMASK(31, 0)</div><div class='add'>+</div><div class='add'>+/*  TX_FR_CTR registers */</div><div class='add'>+#define REG_TX_FR_CTR_TX_FR_CTR_VAL GENMASK(31, 0)</div><div class='add'>+</div><div class='add'>+/*  DEBUG_REGISTER registers */</div><div class='add'>+#define REG_DEBUG_REGISTER_STUFF_COUNT GENMASK(2, 0)</div><div class='add'>+#define REG_DEBUG_REGISTER_DESTUFF_COUNT GENMASK(5, 3)</div><div class='add'>+#define REG_DEBUG_REGISTER_PC_ARB BIT(6)</div><div class='add'>+#define REG_DEBUG_REGISTER_PC_CON BIT(7)</div><div class='add'>+#define REG_DEBUG_REGISTER_PC_DAT BIT(8)</div><div class='add'>+#define REG_DEBUG_REGISTER_PC_STC BIT(9)</div><div class='add'>+#define REG_DEBUG_REGISTER_PC_CRC BIT(10)</div><div class='add'>+#define REG_DEBUG_REGISTER_PC_CRCD BIT(11)</div><div class='add'>+#define REG_DEBUG_REGISTER_PC_ACK BIT(12)</div><div class='add'>+#define REG_DEBUG_REGISTER_PC_ACKD BIT(13)</div><div class='add'>+#define REG_DEBUG_REGISTER_PC_EOF BIT(14)</div><div class='add'>+#define REG_DEBUG_REGISTER_PC_INT BIT(15)</div><div class='add'>+#define REG_DEBUG_REGISTER_PC_SUSP BIT(16)</div><div class='add'>+#define REG_DEBUG_REGISTER_PC_OVR BIT(17)</div><div class='add'>+#define REG_DEBUG_REGISTER_PC_SOF BIT(18)</div><div class='add'>+</div><div class='add'>+/*  YOLO_REG registers */</div><div class='add'>+#define REG_YOLO_REG_YOLO_VAL GENMASK(31, 0)</div><div class='add'>+</div><div class='add'>+/*  TIMESTAMP_LOW registers */</div><div class='add'>+#define REG_TIMESTAMP_LOW_TIMESTAMP_LOW GENMASK(31, 0)</div><div class='add'>+</div><div class='add'>+/*  TIMESTAMP_HIGH registers */</div><div class='add'>+#define REG_TIMESTAMP_HIGH_TIMESTAMP_HIGH GENMASK(31, 0)</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/can/ctucanfd/ctucanfd_pci.c b/drivers/net/can/ctucanfd/ctucanfd_pci.c<br/>new file mode 100644<br/>index 000000000000..9da09e7dd63a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/ctucanfd/ctucanfd_pci.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/ctucanfd/ctucanfd_pci.c</a></div><div class='hunk'>@@ -0,0 +1,290 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*******************************************************************************</div><div class='add'>+ *</div><div class='add'>+ * CTU CAN FD IP Core</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015-2018 Ondrej Ille &lt;ondrej.ille@gmail.com&gt; FEE CTU</div><div class='add'>+ * Copyright (C) 2018-2021 Ondrej Ille &lt;ondrej.ille@gmail.com&gt; self-funded</div><div class='add'>+ * Copyright (C) 2018-2019 Martin Jerabek &lt;martin.jerabek01@gmail.com&gt; FEE CTU</div><div class='add'>+ * Copyright (C) 2018-2022 Pavel Pisa &lt;pisa@cmp.felk.cvut.cz&gt; FEE CTU/self-funded</div><div class='add'>+ *</div><div class='add'>+ * Project advisors:</div><div class='add'>+ *     Jiri Novak &lt;jnovak@fel.cvut.cz&gt;</div><div class='add'>+ *     Pavel Pisa &lt;pisa@cmp.felk.cvut.cz&gt;</div><div class='add'>+ *</div><div class='add'>+ * Department of Measurement         (http://meas.fel.cvut.cz/)</div><div class='add'>+ * Faculty of Electrical Engineering (http://www.fel.cvut.cz)</div><div class='add'>+ * Czech Technical University        (http://www.cvut.cz/)</div><div class='add'>+ ******************************************************************************/</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ctucanfd.h"</div><div class='add'>+</div><div class='add'>+#ifndef PCI_DEVICE_DATA</div><div class='add'>+#define PCI_DEVICE_DATA(vend, dev, data) \</div><div class='add'>+.vendor = PCI_VENDOR_ID_##vend, \</div><div class='add'>+.device = PCI_DEVICE_ID_##vend##_##dev, \</div><div class='add'>+.subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, 0, 0, \</div><div class='add'>+.driver_data = (kernel_ulong_t)(data)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef PCI_VENDOR_ID_TEDIA</div><div class='add'>+#define PCI_VENDOR_ID_TEDIA 0x1760</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef PCI_DEVICE_ID_TEDIA_CTUCAN_VER21</div><div class='add'>+#define PCI_DEVICE_ID_TEDIA_CTUCAN_VER21 0xff00</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#define CTUCAN_BAR0_CTUCAN_ID 0x0000</div><div class='add'>+#define CTUCAN_BAR0_CRA_BASE  0x4000</div><div class='add'>+#define CYCLONE_IV_CRA_A2P_IE (0x0050)</div><div class='add'>+</div><div class='add'>+#define CTUCAN_WITHOUT_CTUCAN_ID  0</div><div class='add'>+#define CTUCAN_WITH_CTUCAN_ID     1</div><div class='add'>+</div><div class='add'>+struct ctucan_pci_board_data {</div><div class='add'>+	void __iomem *bar0_base;</div><div class='add'>+	void __iomem *cra_base;</div><div class='add'>+	void __iomem *bar1_base;</div><div class='add'>+	struct list_head ndev_list_head;</div><div class='add'>+	int use_msi;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct ctucan_pci_board_data *ctucan_pci_get_bdata(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	return (struct ctucan_pci_board_data *)pci_get_drvdata(pdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ctucan_pci_set_drvdata(struct device *dev,</div><div class='add'>+				   struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);</div><div class='add'>+	struct ctucan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct ctucan_pci_board_data *bdata = ctucan_pci_get_bdata(pdev);</div><div class='add'>+</div><div class='add'>+	list_add(&amp;priv-&gt;peers_on_pdev, &amp;bdata-&gt;ndev_list_head);</div><div class='add'>+	priv-&gt;irq_flags = IRQF_SHARED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ctucan_pci_probe - PCI registration call</div><div class='add'>+ * @pdev:	Handle to the pci device structure</div><div class='add'>+ * @ent:	Pointer to the entry from ctucan_pci_tbl</div><div class='add'>+ *</div><div class='add'>+ * This function does all the memory allocation and registration for the CAN</div><div class='add'>+ * device.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success and failure value on error</div><div class='add'>+ */</div><div class='add'>+static int ctucan_pci_probe(struct pci_dev *pdev,</div><div class='add'>+			    const struct pci_device_id *ent)</div><div class='add'>+{</div><div class='add'>+	struct device	*dev = &amp;pdev-&gt;dev;</div><div class='add'>+	unsigned long driver_data = ent-&gt;driver_data;</div><div class='add'>+	struct ctucan_pci_board_data *bdata;</div><div class='add'>+	void __iomem *addr;</div><div class='add'>+	void __iomem *cra_addr;</div><div class='add'>+	void __iomem *bar0_base;</div><div class='add'>+	u32 cra_a2p_ie;</div><div class='add'>+	u32 ctucan_id = 0;</div><div class='add'>+	int ret;</div><div class='add'>+	unsigned int ntxbufs;</div><div class='add'>+	unsigned int num_cores = 1;</div><div class='add'>+	unsigned int core_i = 0;</div><div class='add'>+	int irq;</div><div class='add'>+	int msi_ok = 0;</div><div class='add'>+</div><div class='add'>+	ret = pci_enable_device(pdev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "pci_enable_device FAILED\n");</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = pci_request_regions(pdev, KBUILD_MODNAME);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "pci_request_regions FAILED\n");</div><div class='add'>+		goto err_disable_device;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = pci_enable_msi(pdev);</div><div class='add'>+	if (!ret) {</div><div class='add'>+		dev_info(dev, "MSI enabled\n");</div><div class='add'>+		pci_set_master(pdev);</div><div class='add'>+		msi_ok = 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_info(dev, "ctucan BAR0 0x%08llx 0x%08llx\n",</div><div class='add'>+		 (long long)pci_resource_start(pdev, 0),</div><div class='add'>+		 (long long)pci_resource_len(pdev, 0));</div><div class='add'>+</div><div class='add'>+	dev_info(dev, "ctucan BAR1 0x%08llx 0x%08llx\n",</div><div class='add'>+		 (long long)pci_resource_start(pdev, 1),</div><div class='add'>+		 (long long)pci_resource_len(pdev, 1));</div><div class='add'>+</div><div class='add'>+	addr = pci_iomap(pdev, 1, pci_resource_len(pdev, 1));</div><div class='add'>+	if (!addr) {</div><div class='add'>+		dev_err(dev, "PCI BAR 1 cannot be mapped\n");</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err_release_regions;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Cyclone IV PCI Express Control Registers Area */</div><div class='add'>+	bar0_base = pci_iomap(pdev, 0, pci_resource_len(pdev, 0));</div><div class='add'>+	if (!bar0_base) {</div><div class='add'>+		dev_err(dev, "PCI BAR 0 cannot be mapped\n");</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		goto err_pci_iounmap_bar1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (driver_data == CTUCAN_WITHOUT_CTUCAN_ID) {</div><div class='add'>+		cra_addr = bar0_base;</div><div class='add'>+		num_cores = 2;</div><div class='add'>+	} else {</div><div class='add'>+		cra_addr = bar0_base + CTUCAN_BAR0_CRA_BASE;</div><div class='add'>+		ctucan_id = ioread32(bar0_base + CTUCAN_BAR0_CTUCAN_ID);</div><div class='add'>+		dev_info(dev, "ctucan_id 0x%08lx\n", (unsigned long)ctucan_id);</div><div class='add'>+		num_cores = ctucan_id &amp; 0xf;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	irq = pdev-&gt;irq;</div><div class='add'>+</div><div class='add'>+	ntxbufs = 4;</div><div class='add'>+</div><div class='add'>+	bdata = kzalloc(sizeof(*bdata), GFP_KERNEL);</div><div class='add'>+	if (!bdata) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err_pci_iounmap_bar0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	INIT_LIST_HEAD(&amp;bdata-&gt;ndev_list_head);</div><div class='add'>+	bdata-&gt;bar0_base = bar0_base;</div><div class='add'>+	bdata-&gt;cra_base = cra_addr;</div><div class='add'>+	bdata-&gt;bar1_base = addr;</div><div class='add'>+	bdata-&gt;use_msi = msi_ok;</div><div class='add'>+</div><div class='add'>+	pci_set_drvdata(pdev, bdata);</div><div class='add'>+</div><div class='add'>+	ret = ctucan_probe_common(dev, addr, irq, ntxbufs, 100000000,</div><div class='add'>+				  0, ctucan_pci_set_drvdata);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err_free_board;</div><div class='add'>+</div><div class='add'>+	core_i++;</div><div class='add'>+</div><div class='add'>+	while (core_i &lt; num_cores) {</div><div class='add'>+		addr += 0x4000;</div><div class='add'>+		ret = ctucan_probe_common(dev, addr, irq, ntxbufs, 100000000,</div><div class='add'>+					  0, ctucan_pci_set_drvdata);</div><div class='add'>+		if (ret &lt; 0) {</div><div class='add'>+			dev_info(dev, "CTU CAN FD core %d initialization failed\n",</div><div class='add'>+				 core_i);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		core_i++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* enable interrupt in</div><div class='add'>+	 * Avalon-MM to PCI Express Interrupt Enable Register</div><div class='add'>+	 */</div><div class='add'>+	cra_a2p_ie = ioread32(cra_addr + CYCLONE_IV_CRA_A2P_IE);</div><div class='add'>+	dev_info(dev, "cra_a2p_ie 0x%08x\n", cra_a2p_ie);</div><div class='add'>+	cra_a2p_ie |= 1;</div><div class='add'>+	iowrite32(cra_a2p_ie, cra_addr + CYCLONE_IV_CRA_A2P_IE);</div><div class='add'>+	cra_a2p_ie = ioread32(cra_addr + CYCLONE_IV_CRA_A2P_IE);</div><div class='add'>+	dev_info(dev, "cra_a2p_ie 0x%08x\n", cra_a2p_ie);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_board:</div><div class='add'>+	pci_set_drvdata(pdev, NULL);</div><div class='add'>+	kfree(bdata);</div><div class='add'>+err_pci_iounmap_bar0:</div><div class='add'>+	pci_iounmap(pdev, cra_addr);</div><div class='add'>+err_pci_iounmap_bar1:</div><div class='add'>+	pci_iounmap(pdev, addr);</div><div class='add'>+err_release_regions:</div><div class='add'>+	if (msi_ok)</div><div class='add'>+		pci_disable_msi(pdev);</div><div class='add'>+	pci_release_regions(pdev);</div><div class='add'>+err_disable_device:</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+err:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ctucan_pci_remove - Unregister the device after releasing the resources</div><div class='add'>+ * @pdev:	Handle to the pci device structure</div><div class='add'>+ *</div><div class='add'>+ * This function frees all the resources allocated to the device.</div><div class='add'>+ * Return: 0 always</div><div class='add'>+ */</div><div class='add'>+static void ctucan_pci_remove(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	struct ctucan_priv *priv = NULL;</div><div class='add'>+	struct ctucan_pci_board_data *bdata = ctucan_pci_get_bdata(pdev);</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;pdev-&gt;dev, "ctucan_remove");</div><div class='add'>+</div><div class='add'>+	if (!bdata) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "%s: no list of devices\n", __func__);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* disable interrupt in</div><div class='add'>+	 * Avalon-MM to PCI Express Interrupt Enable Register</div><div class='add'>+	 */</div><div class='add'>+	if (bdata-&gt;cra_base)</div><div class='add'>+		iowrite32(0, bdata-&gt;cra_base + CYCLONE_IV_CRA_A2P_IE);</div><div class='add'>+</div><div class='add'>+	while ((priv = list_first_entry_or_null(&amp;bdata-&gt;ndev_list_head, struct ctucan_priv,</div><div class='add'>+						peers_on_pdev)) != NULL) {</div><div class='add'>+		ndev = priv-&gt;can.dev;</div><div class='add'>+</div><div class='add'>+		unregister_candev(ndev);</div><div class='add'>+</div><div class='add'>+		netif_napi_del(&amp;priv-&gt;napi);</div><div class='add'>+</div><div class='add'>+		list_del_init(&amp;priv-&gt;peers_on_pdev);</div><div class='add'>+		free_candev(ndev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pci_iounmap(pdev, bdata-&gt;bar1_base);</div><div class='add'>+</div><div class='add'>+	if (bdata-&gt;use_msi)</div><div class='add'>+		pci_disable_msi(pdev);</div><div class='add'>+</div><div class='add'>+	pci_release_regions(pdev);</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+</div><div class='add'>+	pci_iounmap(pdev, bdata-&gt;bar0_base);</div><div class='add'>+</div><div class='add'>+	pci_set_drvdata(pdev, NULL);</div><div class='add'>+	kfree(bdata);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static SIMPLE_DEV_PM_OPS(ctucan_pci_pm_ops, ctucan_suspend, ctucan_resume);</div><div class='add'>+</div><div class='add'>+static const struct pci_device_id ctucan_pci_tbl[] = {</div><div class='add'>+	{PCI_DEVICE_DATA(TEDIA, CTUCAN_VER21,</div><div class='add'>+		CTUCAN_WITH_CTUCAN_ID)},</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct pci_driver ctucan_pci_driver = {</div><div class='add'>+	.name = KBUILD_MODNAME,</div><div class='add'>+	.id_table = ctucan_pci_tbl,</div><div class='add'>+	.probe = ctucan_pci_probe,</div><div class='add'>+	.remove = ctucan_pci_remove,</div><div class='add'>+	.driver.pm = &amp;ctucan_pci_pm_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_pci_driver(ctucan_pci_driver);</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_AUTHOR("Pavel Pisa &lt;pisa@cmp.felk.cvut.cz&gt;");</div><div class='add'>+MODULE_DESCRIPTION("CTU CAN FD for PCI bus");</div><div class='head'>diff --git a/drivers/net/can/ctucanfd/ctucanfd_platform.c b/drivers/net/can/ctucanfd/ctucanfd_platform.c<br/>new file mode 100644<br/>index 000000000000..70e2577c8541<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/ctucanfd/ctucanfd_platform.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/ctucanfd/ctucanfd_platform.c</a></div><div class='hunk'>@@ -0,0 +1,126 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*******************************************************************************</div><div class='add'>+ *</div><div class='add'>+ * CTU CAN FD IP Core</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015-2018 Ondrej Ille &lt;ondrej.ille@gmail.com&gt; FEE CTU</div><div class='add'>+ * Copyright (C) 2018-2021 Ondrej Ille &lt;ondrej.ille@gmail.com&gt; self-funded</div><div class='add'>+ * Copyright (C) 2018-2019 Martin Jerabek &lt;martin.jerabek01@gmail.com&gt; FEE CTU</div><div class='add'>+ * Copyright (C) 2018-2022 Pavel Pisa &lt;pisa@cmp.felk.cvut.cz&gt; FEE CTU/self-funded</div><div class='add'>+ *</div><div class='add'>+ * Project advisors:</div><div class='add'>+ *     Jiri Novak &lt;jnovak@fel.cvut.cz&gt;</div><div class='add'>+ *     Pavel Pisa &lt;pisa@cmp.felk.cvut.cz&gt;</div><div class='add'>+ *</div><div class='add'>+ * Department of Measurement         (http://meas.fel.cvut.cz/)</div><div class='add'>+ * Faculty of Electrical Engineering (http://www.fel.cvut.cz)</div><div class='add'>+ * Czech Technical University        (http://www.cvut.cz/)</div><div class='add'>+ ******************************************************************************/</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/pm_runtime.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ctucanfd.h"</div><div class='add'>+</div><div class='add'>+#define DRV_NAME	"ctucanfd"</div><div class='add'>+</div><div class='add'>+static void ctucan_platform_set_drvdata(struct device *dev,</div><div class='add'>+					struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct platform_device *pdev = container_of(dev, struct platform_device,</div><div class='add'>+						    dev);</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, ndev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ctucan_platform_probe - Platform registration call</div><div class='add'>+ * @pdev:	Handle to the platform device structure</div><div class='add'>+ *</div><div class='add'>+ * This function does all the memory allocation and registration for the CAN</div><div class='add'>+ * device.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success and failure value on error</div><div class='add'>+ */</div><div class='add'>+static int ctucan_platform_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct device	*dev = &amp;pdev-&gt;dev;</div><div class='add'>+	void __iomem *addr;</div><div class='add'>+	int ret;</div><div class='add'>+	unsigned int ntxbufs;</div><div class='add'>+	int irq;</div><div class='add'>+</div><div class='add'>+	/* Get the virtual base address for the device */</div><div class='add'>+	addr = devm_platform_ioremap_resource(pdev, 0);</div><div class='add'>+	if (IS_ERR(addr)) {</div><div class='add'>+		ret = PTR_ERR(addr);</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+	irq = platform_get_irq(pdev, 0);</div><div class='add'>+	if (irq &lt; 0) {</div><div class='add'>+		ret = irq;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Number of tx bufs might be change in HW for future. If so,</div><div class='add'>+	 * it will be passed as property via device tree</div><div class='add'>+	 */</div><div class='add'>+	ntxbufs = 4;</div><div class='add'>+	ret = ctucan_probe_common(dev, addr, irq, ntxbufs, 0,</div><div class='add'>+				  1, ctucan_platform_set_drvdata);</div><div class='add'>+</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		platform_set_drvdata(pdev, NULL);</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ctucan_platform_remove - Unregister the device after releasing the resources</div><div class='add'>+ * @pdev:	Handle to the platform device structure</div><div class='add'>+ *</div><div class='add'>+ * This function frees all the resources allocated to the device.</div><div class='add'>+ * Return: 0 always</div><div class='add'>+ */</div><div class='add'>+static void ctucan_platform_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = platform_get_drvdata(pdev);</div><div class='add'>+	struct ctucan_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	netdev_dbg(ndev, "ctucan_remove");</div><div class='add'>+</div><div class='add'>+	unregister_candev(ndev);</div><div class='add'>+	pm_runtime_disable(&amp;pdev-&gt;dev);</div><div class='add'>+	netif_napi_del(&amp;priv-&gt;napi);</div><div class='add'>+	free_candev(ndev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static SIMPLE_DEV_PM_OPS(ctucan_platform_pm_ops, ctucan_suspend, ctucan_resume);</div><div class='add'>+</div><div class='add'>+/* Match table for OF platform binding */</div><div class='add'>+static const struct of_device_id ctucan_of_match[] = {</div><div class='add'>+	{ .compatible = "ctu,ctucanfd-2", },</div><div class='add'>+	{ .compatible = "ctu,ctucanfd", },</div><div class='add'>+	{ /* end of list */ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, ctucan_of_match);</div><div class='add'>+</div><div class='add'>+static struct platform_driver ctucanfd_driver = {</div><div class='add'>+	.probe	= ctucan_platform_probe,</div><div class='add'>+	.remove = ctucan_platform_remove,</div><div class='add'>+	.driver	= {</div><div class='add'>+		.name = DRV_NAME,</div><div class='add'>+		.pm = &amp;ctucan_platform_pm_ops,</div><div class='add'>+		.of_match_table	= ctucan_of_match,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_platform_driver(ctucanfd_driver);</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_AUTHOR("Martin Jerabek");</div><div class='add'>+MODULE_DESCRIPTION("CTU CAN FD for platform");</div><div class='head'>diff --git a/drivers/net/can/dev.c b/drivers/net/can/dev.c<br/>deleted file mode 100644<br/>index aede704605c6..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/dev.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/dev.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,1031 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 2005 Marc Kleine-Budde, Pengutronix</div><div class='del'>- * Copyright (C) 2006 Andrey Volkov, Varma Electronics</div><div class='del'>- * Copyright (C) 2008-2009 Wolfgang Grandegger &lt;wg@grandegger.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the version 2 of the GNU General Public License</div><div class='del'>- * as published by the Free Software Foundation</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/if_arp.h&gt;</div><div class='del'>-#include &lt;linux/can.h&gt;</div><div class='del'>-#include &lt;linux/can/dev.h&gt;</div><div class='del'>-#include &lt;linux/can/skb.h&gt;</div><div class='del'>-#include &lt;linux/can/netlink.h&gt;</div><div class='del'>-#include &lt;linux/can/led.h&gt;</div><div class='del'>-#include &lt;net/rtnetlink.h&gt;</div><div class='del'>-</div><div class='del'>-#define MOD_DESC "CAN device driver interface"</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION(MOD_DESC);</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='del'>-MODULE_AUTHOR("Wolfgang Grandegger &lt;wg@grandegger.com&gt;");</div><div class='del'>-</div><div class='del'>-/* CAN DLC to real data length conversion helpers */</div><div class='del'>-</div><div class='del'>-static const u8 dlc2len[] = {0, 1, 2, 3, 4, 5, 6, 7,</div><div class='del'>-			     8, 12, 16, 20, 24, 32, 48, 64};</div><div class='del'>-</div><div class='del'>-/* get data length from can_dlc with sanitized can_dlc */</div><div class='del'>-u8 can_dlc2len(u8 can_dlc)</div><div class='del'>-{</div><div class='del'>-	return dlc2len[can_dlc &amp; 0x0F];</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(can_dlc2len);</div><div class='del'>-</div><div class='del'>-static const u8 len2dlc[] = {0, 1, 2, 3, 4, 5, 6, 7, 8,		/* 0 - 8 */</div><div class='del'>-			     9, 9, 9, 9,			/* 9 - 12 */</div><div class='del'>-			     10, 10, 10, 10,			/* 13 - 16 */</div><div class='del'>-			     11, 11, 11, 11,			/* 17 - 20 */</div><div class='del'>-			     12, 12, 12, 12,			/* 21 - 24 */</div><div class='del'>-			     13, 13, 13, 13, 13, 13, 13, 13,	/* 25 - 32 */</div><div class='del'>-			     14, 14, 14, 14, 14, 14, 14, 14,	/* 33 - 40 */</div><div class='del'>-			     14, 14, 14, 14, 14, 14, 14, 14,	/* 41 - 48 */</div><div class='del'>-			     15, 15, 15, 15, 15, 15, 15, 15,	/* 49 - 56 */</div><div class='del'>-			     15, 15, 15, 15, 15, 15, 15, 15};	/* 57 - 64 */</div><div class='del'>-</div><div class='del'>-/* map the sanitized data length to an appropriate data length code */</div><div class='del'>-u8 can_len2dlc(u8 len)</div><div class='del'>-{</div><div class='del'>-	if (unlikely(len &gt; 64))</div><div class='del'>-		return 0xF;</div><div class='del'>-</div><div class='del'>-	return len2dlc[len];</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(can_len2dlc);</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_CAN_CALC_BITTIMING</div><div class='del'>-#define CAN_CALC_MAX_ERROR 50 /* in one-tenth of a percent */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Bit-timing calculation derived from:</div><div class='del'>- *</div><div class='del'>- * Code based on LinCAN sources and H8S2638 project</div><div class='del'>- * Copyright 2004-2006 Pavel Pisa - DCE FELK CVUT cz</div><div class='del'>- * Copyright 2005      Stanislav Marek</div><div class='del'>- * email: pisa@cmp.felk.cvut.cz</div><div class='del'>- *</div><div class='del'>- * Calculates proper bit-timing parameters for a specified bit-rate</div><div class='del'>- * and sample-point, which can then be used to set the bit-timing</div><div class='del'>- * registers of the CAN controller. You can find more information</div><div class='del'>- * in the header file linux/can/netlink.h.</div><div class='del'>- */</div><div class='del'>-static int can_update_spt(const struct can_bittiming_const *btc,</div><div class='del'>-			  int sampl_pt, int tseg, int *tseg1, int *tseg2)</div><div class='del'>-{</div><div class='del'>-	*tseg2 = tseg + 1 - (sampl_pt * (tseg + 1)) / 1000;</div><div class='del'>-	if (*tseg2 &lt; btc-&gt;tseg2_min)</div><div class='del'>-		*tseg2 = btc-&gt;tseg2_min;</div><div class='del'>-	if (*tseg2 &gt; btc-&gt;tseg2_max)</div><div class='del'>-		*tseg2 = btc-&gt;tseg2_max;</div><div class='del'>-	*tseg1 = tseg - *tseg2;</div><div class='del'>-	if (*tseg1 &gt; btc-&gt;tseg1_max) {</div><div class='del'>-		*tseg1 = btc-&gt;tseg1_max;</div><div class='del'>-		*tseg2 = tseg - *tseg1;</div><div class='del'>-	}</div><div class='del'>-	return 1000 * (tseg + 1 - *tseg2) / (tseg + 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int can_calc_bittiming(struct net_device *dev, struct can_bittiming *bt,</div><div class='del'>-			      const struct can_bittiming_const *btc)</div><div class='del'>-{</div><div class='del'>-	struct can_priv *priv = netdev_priv(dev);</div><div class='del'>-	long best_error = 1000000000, error = 0;</div><div class='del'>-	int best_tseg = 0, best_brp = 0, brp = 0;</div><div class='del'>-	int tsegall, tseg = 0, tseg1 = 0, tseg2 = 0;</div><div class='del'>-	int spt_error = 1000, spt = 0, sampl_pt;</div><div class='del'>-	long rate;</div><div class='del'>-	u64 v64;</div><div class='del'>-</div><div class='del'>-	/* Use CiA recommended sample points */</div><div class='del'>-	if (bt-&gt;sample_point) {</div><div class='del'>-		sampl_pt = bt-&gt;sample_point;</div><div class='del'>-	} else {</div><div class='del'>-		if (bt-&gt;bitrate &gt; 800000)</div><div class='del'>-			sampl_pt = 750;</div><div class='del'>-		else if (bt-&gt;bitrate &gt; 500000)</div><div class='del'>-			sampl_pt = 800;</div><div class='del'>-		else</div><div class='del'>-			sampl_pt = 875;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* tseg even = round down, odd = round up */</div><div class='del'>-	for (tseg = (btc-&gt;tseg1_max + btc-&gt;tseg2_max) * 2 + 1;</div><div class='del'>-	     tseg &gt;= (btc-&gt;tseg1_min + btc-&gt;tseg2_min) * 2; tseg--) {</div><div class='del'>-		tsegall = 1 + tseg / 2;</div><div class='del'>-		/* Compute all possible tseg choices (tseg=tseg1+tseg2) */</div><div class='del'>-		brp = priv-&gt;clock.freq / (tsegall * bt-&gt;bitrate) + tseg % 2;</div><div class='del'>-		/* chose brp step which is possible in system */</div><div class='del'>-		brp = (brp / btc-&gt;brp_inc) * btc-&gt;brp_inc;</div><div class='del'>-		if ((brp &lt; btc-&gt;brp_min) || (brp &gt; btc-&gt;brp_max))</div><div class='del'>-			continue;</div><div class='del'>-		rate = priv-&gt;clock.freq / (brp * tsegall);</div><div class='del'>-		error = bt-&gt;bitrate - rate;</div><div class='del'>-		/* tseg brp biterror */</div><div class='del'>-		if (error &lt; 0)</div><div class='del'>-			error = -error;</div><div class='del'>-		if (error &gt; best_error)</div><div class='del'>-			continue;</div><div class='del'>-		best_error = error;</div><div class='del'>-		if (error == 0) {</div><div class='del'>-			spt = can_update_spt(btc, sampl_pt, tseg / 2,</div><div class='del'>-					     &amp;tseg1, &amp;tseg2);</div><div class='del'>-			error = sampl_pt - spt;</div><div class='del'>-			if (error &lt; 0)</div><div class='del'>-				error = -error;</div><div class='del'>-			if (error &gt; spt_error)</div><div class='del'>-				continue;</div><div class='del'>-			spt_error = error;</div><div class='del'>-		}</div><div class='del'>-		best_tseg = tseg / 2;</div><div class='del'>-		best_brp = brp;</div><div class='del'>-		if (error == 0)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (best_error) {</div><div class='del'>-		/* Error in one-tenth of a percent */</div><div class='del'>-		error = (best_error * 1000) / bt-&gt;bitrate;</div><div class='del'>-		if (error &gt; CAN_CALC_MAX_ERROR) {</div><div class='del'>-			netdev_err(dev,</div><div class='del'>-				   "bitrate error %ld.%ld%% too high\n",</div><div class='del'>-				   error / 10, error % 10);</div><div class='del'>-			return -EDOM;</div><div class='del'>-		} else {</div><div class='del'>-			netdev_warn(dev, "bitrate error %ld.%ld%%\n",</div><div class='del'>-				    error / 10, error % 10);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* real sample point */</div><div class='del'>-	bt-&gt;sample_point = can_update_spt(btc, sampl_pt, best_tseg,</div><div class='del'>-					  &amp;tseg1, &amp;tseg2);</div><div class='del'>-</div><div class='del'>-	v64 = (u64)best_brp * 1000000000UL;</div><div class='del'>-	do_div(v64, priv-&gt;clock.freq);</div><div class='del'>-	bt-&gt;tq = (u32)v64;</div><div class='del'>-	bt-&gt;prop_seg = tseg1 / 2;</div><div class='del'>-	bt-&gt;phase_seg1 = tseg1 - bt-&gt;prop_seg;</div><div class='del'>-	bt-&gt;phase_seg2 = tseg2;</div><div class='del'>-</div><div class='del'>-	/* check for sjw user settings */</div><div class='del'>-	if (!bt-&gt;sjw || !btc-&gt;sjw_max)</div><div class='del'>-		bt-&gt;sjw = 1;</div><div class='del'>-	else {</div><div class='del'>-		/* bt-&gt;sjw is at least 1 -&gt; sanitize upper bound to sjw_max */</div><div class='del'>-		if (bt-&gt;sjw &gt; btc-&gt;sjw_max)</div><div class='del'>-			bt-&gt;sjw = btc-&gt;sjw_max;</div><div class='del'>-		/* bt-&gt;sjw must not be higher than tseg2 */</div><div class='del'>-		if (tseg2 &lt; bt-&gt;sjw)</div><div class='del'>-			bt-&gt;sjw = tseg2;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	bt-&gt;brp = best_brp;</div><div class='del'>-	/* real bit-rate */</div><div class='del'>-	bt-&gt;bitrate = priv-&gt;clock.freq / (bt-&gt;brp * (tseg1 + tseg2 + 1));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-#else /* !CONFIG_CAN_CALC_BITTIMING */</div><div class='del'>-static int can_calc_bittiming(struct net_device *dev, struct can_bittiming *bt,</div><div class='del'>-			      const struct can_bittiming_const *btc)</div><div class='del'>-{</div><div class='del'>-	netdev_err(dev, "bit-timing calculation not available\n");</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-#endif /* CONFIG_CAN_CALC_BITTIMING */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Checks the validity of the specified bit-timing parameters prop_seg,</div><div class='del'>- * phase_seg1, phase_seg2 and sjw and tries to determine the bitrate</div><div class='del'>- * prescaler value brp. You can find more information in the header</div><div class='del'>- * file linux/can/netlink.h.</div><div class='del'>- */</div><div class='del'>-static int can_fixup_bittiming(struct net_device *dev, struct can_bittiming *bt,</div><div class='del'>-			       const struct can_bittiming_const *btc)</div><div class='del'>-{</div><div class='del'>-	struct can_priv *priv = netdev_priv(dev);</div><div class='del'>-	int tseg1, alltseg;</div><div class='del'>-	u64 brp64;</div><div class='del'>-</div><div class='del'>-	tseg1 = bt-&gt;prop_seg + bt-&gt;phase_seg1;</div><div class='del'>-	if (!bt-&gt;sjw)</div><div class='del'>-		bt-&gt;sjw = 1;</div><div class='del'>-	if (bt-&gt;sjw &gt; btc-&gt;sjw_max ||</div><div class='del'>-	    tseg1 &lt; btc-&gt;tseg1_min || tseg1 &gt; btc-&gt;tseg1_max ||</div><div class='del'>-	    bt-&gt;phase_seg2 &lt; btc-&gt;tseg2_min || bt-&gt;phase_seg2 &gt; btc-&gt;tseg2_max)</div><div class='del'>-		return -ERANGE;</div><div class='del'>-</div><div class='del'>-	brp64 = (u64)priv-&gt;clock.freq * (u64)bt-&gt;tq;</div><div class='del'>-	if (btc-&gt;brp_inc &gt; 1)</div><div class='del'>-		do_div(brp64, btc-&gt;brp_inc);</div><div class='del'>-	brp64 += 500000000UL - 1;</div><div class='del'>-	do_div(brp64, 1000000000UL); /* the practicable BRP */</div><div class='del'>-	if (btc-&gt;brp_inc &gt; 1)</div><div class='del'>-		brp64 *= btc-&gt;brp_inc;</div><div class='del'>-	bt-&gt;brp = (u32)brp64;</div><div class='del'>-</div><div class='del'>-	if (bt-&gt;brp &lt; btc-&gt;brp_min || bt-&gt;brp &gt; btc-&gt;brp_max)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	alltseg = bt-&gt;prop_seg + bt-&gt;phase_seg1 + bt-&gt;phase_seg2 + 1;</div><div class='del'>-	bt-&gt;bitrate = priv-&gt;clock.freq / (bt-&gt;brp * alltseg);</div><div class='del'>-	bt-&gt;sample_point = ((tseg1 + 1) * 1000) / alltseg;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int can_get_bittiming(struct net_device *dev, struct can_bittiming *bt,</div><div class='del'>-			     const struct can_bittiming_const *btc)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	/* Check if the CAN device has bit-timing parameters */</div><div class='del'>-	if (!btc)</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Depending on the given can_bittiming parameter structure the CAN</div><div class='del'>-	 * timing parameters are calculated based on the provided bitrate OR</div><div class='del'>-	 * alternatively the CAN timing parameters (tq, prop_seg, etc.) are</div><div class='del'>-	 * provided directly which are then checked and fixed up.</div><div class='del'>-	 */</div><div class='del'>-	if (!bt-&gt;tq &amp;&amp; bt-&gt;bitrate)</div><div class='del'>-		err = can_calc_bittiming(dev, bt, btc);</div><div class='del'>-	else if (bt-&gt;tq &amp;&amp; !bt-&gt;bitrate)</div><div class='del'>-		err = can_fixup_bittiming(dev, bt, btc);</div><div class='del'>-	else</div><div class='del'>-		err = -EINVAL;</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void can_update_state_error_stats(struct net_device *dev,</div><div class='del'>-					 enum can_state new_state)</div><div class='del'>-{</div><div class='del'>-	struct can_priv *priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	if (new_state &lt;= priv-&gt;state)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	switch (new_state) {</div><div class='del'>-	case CAN_STATE_ERROR_WARNING:</div><div class='del'>-		priv-&gt;can_stats.error_warning++;</div><div class='del'>-		break;</div><div class='del'>-	case CAN_STATE_ERROR_PASSIVE:</div><div class='del'>-		priv-&gt;can_stats.error_passive++;</div><div class='del'>-		break;</div><div class='del'>-	case CAN_STATE_BUS_OFF:</div><div class='del'>-		priv-&gt;can_stats.bus_off++;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int can_tx_state_to_frame(struct net_device *dev, enum can_state state)</div><div class='del'>-{</div><div class='del'>-	switch (state) {</div><div class='del'>-	case CAN_STATE_ERROR_ACTIVE:</div><div class='del'>-		return CAN_ERR_CRTL_ACTIVE;</div><div class='del'>-	case CAN_STATE_ERROR_WARNING:</div><div class='del'>-		return CAN_ERR_CRTL_TX_WARNING;</div><div class='del'>-	case CAN_STATE_ERROR_PASSIVE:</div><div class='del'>-		return CAN_ERR_CRTL_TX_PASSIVE;</div><div class='del'>-	default:</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int can_rx_state_to_frame(struct net_device *dev, enum can_state state)</div><div class='del'>-{</div><div class='del'>-	switch (state) {</div><div class='del'>-	case CAN_STATE_ERROR_ACTIVE:</div><div class='del'>-		return CAN_ERR_CRTL_ACTIVE;</div><div class='del'>-	case CAN_STATE_ERROR_WARNING:</div><div class='del'>-		return CAN_ERR_CRTL_RX_WARNING;</div><div class='del'>-	case CAN_STATE_ERROR_PASSIVE:</div><div class='del'>-		return CAN_ERR_CRTL_RX_PASSIVE;</div><div class='del'>-	default:</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void can_change_state(struct net_device *dev, struct can_frame *cf,</div><div class='del'>-		      enum can_state tx_state, enum can_state rx_state)</div><div class='del'>-{</div><div class='del'>-	struct can_priv *priv = netdev_priv(dev);</div><div class='del'>-	enum can_state new_state = max(tx_state, rx_state);</div><div class='del'>-</div><div class='del'>-	if (unlikely(new_state == priv-&gt;state)) {</div><div class='del'>-		netdev_warn(dev, "%s: oops, state did not change", __func__);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	netdev_dbg(dev, "New error state: %d\n", new_state);</div><div class='del'>-</div><div class='del'>-	can_update_state_error_stats(dev, new_state);</div><div class='del'>-	priv-&gt;state = new_state;</div><div class='del'>-</div><div class='del'>-	if (unlikely(new_state == CAN_STATE_BUS_OFF)) {</div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_BUSOFF;</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='del'>-	cf-&gt;data[1] |= tx_state &gt;= rx_state ?</div><div class='del'>-		       can_tx_state_to_frame(dev, tx_state) : 0;</div><div class='del'>-	cf-&gt;data[1] |= tx_state &lt;= rx_state ?</div><div class='del'>-		       can_rx_state_to_frame(dev, rx_state) : 0;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(can_change_state);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Local echo of CAN messages</div><div class='del'>- *</div><div class='del'>- * CAN network devices *should* support a local echo functionality</div><div class='del'>- * (see Documentation/networking/can.txt). To test the handling of CAN</div><div class='del'>- * interfaces that do not support the local echo both driver types are</div><div class='del'>- * implemented. In the case that the driver does not support the echo</div><div class='del'>- * the IFF_ECHO remains clear in dev-&gt;flags. This causes the PF_CAN core</div><div class='del'>- * to perform the echo as a fallback solution.</div><div class='del'>- */</div><div class='del'>-static void can_flush_echo_skb(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct can_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; priv-&gt;echo_skb_max; i++) {</div><div class='del'>-		if (priv-&gt;echo_skb[i]) {</div><div class='del'>-			kfree_skb(priv-&gt;echo_skb[i]);</div><div class='del'>-			priv-&gt;echo_skb[i] = NULL;</div><div class='del'>-			stats-&gt;tx_dropped++;</div><div class='del'>-			stats-&gt;tx_aborted_errors++;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Put the skb on the stack to be looped backed locally lateron</div><div class='del'>- *</div><div class='del'>- * The function is typically called in the start_xmit function</div><div class='del'>- * of the device driver. The driver must protect access to</div><div class='del'>- * priv-&gt;echo_skb, if necessary.</div><div class='del'>- */</div><div class='del'>-void can_put_echo_skb(struct sk_buff *skb, struct net_device *dev,</div><div class='del'>-		      unsigned int idx)</div><div class='del'>-{</div><div class='del'>-	struct can_priv *priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	BUG_ON(idx &gt;= priv-&gt;echo_skb_max);</div><div class='del'>-</div><div class='del'>-	/* check flag whether this packet has to be looped back */</div><div class='del'>-	if (!(dev-&gt;flags &amp; IFF_ECHO) || skb-&gt;pkt_type != PACKET_LOOPBACK ||</div><div class='del'>-	    (skb-&gt;protocol != htons(ETH_P_CAN) &amp;&amp;</div><div class='del'>-	     skb-&gt;protocol != htons(ETH_P_CANFD))) {</div><div class='del'>-		kfree_skb(skb);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!priv-&gt;echo_skb[idx]) {</div><div class='del'>-</div><div class='del'>-		skb = can_create_echo_skb(skb);</div><div class='del'>-		if (!skb)</div><div class='del'>-			return;</div><div class='del'>-</div><div class='del'>-		/* make settings for echo to reduce code in irq context */</div><div class='del'>-		skb-&gt;pkt_type = PACKET_BROADCAST;</div><div class='del'>-		skb-&gt;ip_summed = CHECKSUM_UNNECESSARY;</div><div class='del'>-		skb-&gt;dev = dev;</div><div class='del'>-</div><div class='del'>-		/* save this skb for tx interrupt echo handling */</div><div class='del'>-		priv-&gt;echo_skb[idx] = skb;</div><div class='del'>-	} else {</div><div class='del'>-		/* locking problem with netif_stop_queue() ?? */</div><div class='del'>-		netdev_err(dev, "%s: BUG! echo_skb is occupied!\n", __func__);</div><div class='del'>-		kfree_skb(skb);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(can_put_echo_skb);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Get the skb from the stack and loop it back locally</div><div class='del'>- *</div><div class='del'>- * The function is typically called when the TX done interrupt</div><div class='del'>- * is handled in the device driver. The driver must protect</div><div class='del'>- * access to priv-&gt;echo_skb, if necessary.</div><div class='del'>- */</div><div class='del'>-unsigned int can_get_echo_skb(struct net_device *dev, unsigned int idx)</div><div class='del'>-{</div><div class='del'>-	struct can_priv *priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	BUG_ON(idx &gt;= priv-&gt;echo_skb_max);</div><div class='del'>-</div><div class='del'>-	if (priv-&gt;echo_skb[idx]) {</div><div class='del'>-		struct sk_buff *skb = priv-&gt;echo_skb[idx];</div><div class='del'>-		struct can_frame *cf = (struct can_frame *)skb-&gt;data;</div><div class='del'>-		u8 dlc = cf-&gt;can_dlc;</div><div class='del'>-</div><div class='del'>-		netif_rx(priv-&gt;echo_skb[idx]);</div><div class='del'>-		priv-&gt;echo_skb[idx] = NULL;</div><div class='del'>-</div><div class='del'>-		return dlc;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(can_get_echo_skb);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>-  * Remove the skb from the stack and free it.</div><div class='del'>-  *</div><div class='del'>-  * The function is typically called when TX failed.</div><div class='del'>-  */</div><div class='del'>-void can_free_echo_skb(struct net_device *dev, unsigned int idx)</div><div class='del'>-{</div><div class='del'>-	struct can_priv *priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	BUG_ON(idx &gt;= priv-&gt;echo_skb_max);</div><div class='del'>-</div><div class='del'>-	if (priv-&gt;echo_skb[idx]) {</div><div class='del'>-		dev_kfree_skb_any(priv-&gt;echo_skb[idx]);</div><div class='del'>-		priv-&gt;echo_skb[idx] = NULL;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(can_free_echo_skb);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * CAN device restart for bus-off recovery</div><div class='del'>- */</div><div class='del'>-static void can_restart(unsigned long data)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = (struct net_device *)data;</div><div class='del'>-	struct can_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	struct can_frame *cf;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	BUG_ON(netif_carrier_ok(dev));</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * No synchronization needed because the device is bus-off and</div><div class='del'>-	 * no messages can come in or go out.</div><div class='del'>-	 */</div><div class='del'>-	can_flush_echo_skb(dev);</div><div class='del'>-</div><div class='del'>-	/* send restart message upstream */</div><div class='del'>-	skb = alloc_can_err_skb(dev, &amp;cf);</div><div class='del'>-	if (skb == NULL) {</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto restart;</div><div class='del'>-	}</div><div class='del'>-	cf-&gt;can_id |= CAN_ERR_RESTARTED;</div><div class='del'>-</div><div class='del'>-	netif_rx(skb);</div><div class='del'>-</div><div class='del'>-	stats-&gt;rx_packets++;</div><div class='del'>-	stats-&gt;rx_bytes += cf-&gt;can_dlc;</div><div class='del'>-</div><div class='del'>-restart:</div><div class='del'>-	netdev_dbg(dev, "restarted\n");</div><div class='del'>-	priv-&gt;can_stats.restarts++;</div><div class='del'>-</div><div class='del'>-	/* Now restart the device */</div><div class='del'>-	err = priv-&gt;do_set_mode(dev, CAN_MODE_START);</div><div class='del'>-</div><div class='del'>-	netif_carrier_on(dev);</div><div class='del'>-	if (err)</div><div class='del'>-		netdev_err(dev, "Error %d during restart", err);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int can_restart_now(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct can_priv *priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * A manual restart is only permitted if automatic restart is</div><div class='del'>-	 * disabled and the device is in the bus-off state</div><div class='del'>-	 */</div><div class='del'>-	if (priv-&gt;restart_ms)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	if (priv-&gt;state != CAN_STATE_BUS_OFF)</div><div class='del'>-		return -EBUSY;</div><div class='del'>-</div><div class='del'>-	/* Runs as soon as possible in the timer context */</div><div class='del'>-	mod_timer(&amp;priv-&gt;restart_timer, jiffies);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * CAN bus-off</div><div class='del'>- *</div><div class='del'>- * This functions should be called when the device goes bus-off to</div><div class='del'>- * tell the netif layer that no more packets can be sent or received.</div><div class='del'>- * If enabled, a timer is started to trigger bus-off recovery.</div><div class='del'>- */</div><div class='del'>-void can_bus_off(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct can_priv *priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	netdev_dbg(dev, "bus-off\n");</div><div class='del'>-</div><div class='del'>-	netif_carrier_off(dev);</div><div class='del'>-</div><div class='del'>-	if (priv-&gt;restart_ms)</div><div class='del'>-		mod_timer(&amp;priv-&gt;restart_timer,</div><div class='del'>-			  jiffies + (priv-&gt;restart_ms * HZ) / 1000);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(can_bus_off);</div><div class='del'>-</div><div class='del'>-static void can_setup(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	dev-&gt;type = ARPHRD_CAN;</div><div class='del'>-	dev-&gt;mtu = CAN_MTU;</div><div class='del'>-	dev-&gt;hard_header_len = 0;</div><div class='del'>-	dev-&gt;addr_len = 0;</div><div class='del'>-	dev-&gt;tx_queue_len = 10;</div><div class='del'>-</div><div class='del'>-	/* New-style flags. */</div><div class='del'>-	dev-&gt;flags = IFF_NOARP;</div><div class='del'>-	dev-&gt;features = NETIF_F_HW_CSUM;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct sk_buff *alloc_can_skb(struct net_device *dev, struct can_frame **cf)</div><div class='del'>-{</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-</div><div class='del'>-	skb = netdev_alloc_skb(dev, sizeof(struct can_skb_priv) +</div><div class='del'>-			       sizeof(struct can_frame));</div><div class='del'>-	if (unlikely(!skb))</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	skb-&gt;protocol = htons(ETH_P_CAN);</div><div class='del'>-	skb-&gt;pkt_type = PACKET_BROADCAST;</div><div class='del'>-	skb-&gt;ip_summed = CHECKSUM_UNNECESSARY;</div><div class='del'>-</div><div class='del'>-	skb_reset_mac_header(skb);</div><div class='del'>-	skb_reset_network_header(skb);</div><div class='del'>-	skb_reset_transport_header(skb);</div><div class='del'>-</div><div class='del'>-	can_skb_reserve(skb);</div><div class='del'>-	can_skb_prv(skb)-&gt;ifindex = dev-&gt;ifindex;</div><div class='del'>-	can_skb_prv(skb)-&gt;skbcnt = 0;</div><div class='del'>-</div><div class='del'>-	*cf = (struct can_frame *)skb_put(skb, sizeof(struct can_frame));</div><div class='del'>-	memset(*cf, 0, sizeof(struct can_frame));</div><div class='del'>-</div><div class='del'>-	return skb;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(alloc_can_skb);</div><div class='del'>-</div><div class='del'>-struct sk_buff *alloc_canfd_skb(struct net_device *dev,</div><div class='del'>-				struct canfd_frame **cfd)</div><div class='del'>-{</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-</div><div class='del'>-	skb = netdev_alloc_skb(dev, sizeof(struct can_skb_priv) +</div><div class='del'>-			       sizeof(struct canfd_frame));</div><div class='del'>-	if (unlikely(!skb))</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	skb-&gt;protocol = htons(ETH_P_CANFD);</div><div class='del'>-	skb-&gt;pkt_type = PACKET_BROADCAST;</div><div class='del'>-	skb-&gt;ip_summed = CHECKSUM_UNNECESSARY;</div><div class='del'>-</div><div class='del'>-	skb_reset_mac_header(skb);</div><div class='del'>-	skb_reset_network_header(skb);</div><div class='del'>-	skb_reset_transport_header(skb);</div><div class='del'>-</div><div class='del'>-	can_skb_reserve(skb);</div><div class='del'>-	can_skb_prv(skb)-&gt;ifindex = dev-&gt;ifindex;</div><div class='del'>-	can_skb_prv(skb)-&gt;skbcnt = 0;</div><div class='del'>-</div><div class='del'>-	*cfd = (struct canfd_frame *)skb_put(skb, sizeof(struct canfd_frame));</div><div class='del'>-	memset(*cfd, 0, sizeof(struct canfd_frame));</div><div class='del'>-</div><div class='del'>-	return skb;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(alloc_canfd_skb);</div><div class='del'>-</div><div class='del'>-struct sk_buff *alloc_can_err_skb(struct net_device *dev, struct can_frame **cf)</div><div class='del'>-{</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-</div><div class='del'>-	skb = alloc_can_skb(dev, cf);</div><div class='del'>-	if (unlikely(!skb))</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	(*cf)-&gt;can_id = CAN_ERR_FLAG;</div><div class='del'>-	(*cf)-&gt;can_dlc = CAN_ERR_DLC;</div><div class='del'>-</div><div class='del'>-	return skb;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(alloc_can_err_skb);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Allocate and setup space for the CAN network device</div><div class='del'>- */</div><div class='del'>-struct net_device *alloc_candev(int sizeof_priv, unsigned int echo_skb_max)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev;</div><div class='del'>-	struct can_priv *priv;</div><div class='del'>-	int size;</div><div class='del'>-</div><div class='del'>-	if (echo_skb_max)</div><div class='del'>-		size = ALIGN(sizeof_priv, sizeof(struct sk_buff *)) +</div><div class='del'>-			echo_skb_max * sizeof(struct sk_buff *);</div><div class='del'>-	else</div><div class='del'>-		size = sizeof_priv;</div><div class='del'>-</div><div class='del'>-	dev = alloc_netdev(size, "can%d", NET_NAME_UNKNOWN, can_setup);</div><div class='del'>-	if (!dev)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	if (echo_skb_max) {</div><div class='del'>-		priv-&gt;echo_skb_max = echo_skb_max;</div><div class='del'>-		priv-&gt;echo_skb = (void *)priv +</div><div class='del'>-			ALIGN(sizeof_priv, sizeof(struct sk_buff *));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	priv-&gt;state = CAN_STATE_STOPPED;</div><div class='del'>-</div><div class='del'>-	init_timer(&amp;priv-&gt;restart_timer);</div><div class='del'>-</div><div class='del'>-	return dev;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(alloc_candev);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Free space of the CAN network device</div><div class='del'>- */</div><div class='del'>-void free_candev(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	free_netdev(dev);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(free_candev);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * changing MTU and control mode for CAN/CANFD devices</div><div class='del'>- */</div><div class='del'>-int can_change_mtu(struct net_device *dev, int new_mtu)</div><div class='del'>-{</div><div class='del'>-	struct can_priv *priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	/* Do not allow changing the MTU while running */</div><div class='del'>-	if (dev-&gt;flags &amp; IFF_UP)</div><div class='del'>-		return -EBUSY;</div><div class='del'>-</div><div class='del'>-	/* allow change of MTU according to the CANFD ability of the device */</div><div class='del'>-	switch (new_mtu) {</div><div class='del'>-	case CAN_MTU:</div><div class='del'>-		priv-&gt;ctrlmode &amp;= ~CAN_CTRLMODE_FD;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case CANFD_MTU:</div><div class='del'>-		if (!(priv-&gt;ctrlmode_supported &amp; CAN_CTRLMODE_FD))</div><div class='del'>-			return -EINVAL;</div><div class='del'>-</div><div class='del'>-		priv-&gt;ctrlmode |= CAN_CTRLMODE_FD;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev-&gt;mtu = new_mtu;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(can_change_mtu);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Common open function when the device gets opened.</div><div class='del'>- *</div><div class='del'>- * This function should be called in the open function of the device</div><div class='del'>- * driver.</div><div class='del'>- */</div><div class='del'>-int open_candev(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct can_priv *priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	if (!priv-&gt;bittiming.bitrate) {</div><div class='del'>-		netdev_err(dev, "bit-timing not yet defined\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* For CAN FD the data bitrate has to be &gt;= the arbitration bitrate */</div><div class='del'>-	if ((priv-&gt;ctrlmode &amp; CAN_CTRLMODE_FD) &amp;&amp;</div><div class='del'>-	    (!priv-&gt;data_bittiming.bitrate ||</div><div class='del'>-	     (priv-&gt;data_bittiming.bitrate &lt; priv-&gt;bittiming.bitrate))) {</div><div class='del'>-		netdev_err(dev, "incorrect/missing data bit-timing\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Switch carrier on if device was stopped while in bus-off state */</div><div class='del'>-	if (!netif_carrier_ok(dev))</div><div class='del'>-		netif_carrier_on(dev);</div><div class='del'>-</div><div class='del'>-	setup_timer(&amp;priv-&gt;restart_timer, can_restart, (unsigned long)dev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(open_candev);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Common close function for cleanup before the device gets closed.</div><div class='del'>- *</div><div class='del'>- * This function should be called in the close function of the device</div><div class='del'>- * driver.</div><div class='del'>- */</div><div class='del'>-void close_candev(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct can_priv *priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	del_timer_sync(&amp;priv-&gt;restart_timer);</div><div class='del'>-	can_flush_echo_skb(dev);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(close_candev);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * CAN netlink interface</div><div class='del'>- */</div><div class='del'>-static const struct nla_policy can_policy[IFLA_CAN_MAX + 1] = {</div><div class='del'>-	[IFLA_CAN_STATE]	= { .type = NLA_U32 },</div><div class='del'>-	[IFLA_CAN_CTRLMODE]	= { .len = sizeof(struct can_ctrlmode) },</div><div class='del'>-	[IFLA_CAN_RESTART_MS]	= { .type = NLA_U32 },</div><div class='del'>-	[IFLA_CAN_RESTART]	= { .type = NLA_U32 },</div><div class='del'>-	[IFLA_CAN_BITTIMING]	= { .len = sizeof(struct can_bittiming) },</div><div class='del'>-	[IFLA_CAN_BITTIMING_CONST]</div><div class='del'>-				= { .len = sizeof(struct can_bittiming_const) },</div><div class='del'>-	[IFLA_CAN_CLOCK]	= { .len = sizeof(struct can_clock) },</div><div class='del'>-	[IFLA_CAN_BERR_COUNTER]	= { .len = sizeof(struct can_berr_counter) },</div><div class='del'>-	[IFLA_CAN_DATA_BITTIMING]</div><div class='del'>-				= { .len = sizeof(struct can_bittiming) },</div><div class='del'>-	[IFLA_CAN_DATA_BITTIMING_CONST]</div><div class='del'>-				= { .len = sizeof(struct can_bittiming_const) },</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int can_changelink(struct net_device *dev,</div><div class='del'>-			  struct nlattr *tb[], struct nlattr *data[])</div><div class='del'>-{</div><div class='del'>-	struct can_priv *priv = netdev_priv(dev);</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	/* We need synchronization with dev-&gt;stop() */</div><div class='del'>-	ASSERT_RTNL();</div><div class='del'>-</div><div class='del'>-	if (data[IFLA_CAN_BITTIMING]) {</div><div class='del'>-		struct can_bittiming bt;</div><div class='del'>-</div><div class='del'>-		/* Do not allow changing bittiming while running */</div><div class='del'>-		if (dev-&gt;flags &amp; IFF_UP)</div><div class='del'>-			return -EBUSY;</div><div class='del'>-		memcpy(&amp;bt, nla_data(data[IFLA_CAN_BITTIMING]), sizeof(bt));</div><div class='del'>-		err = can_get_bittiming(dev, &amp;bt, priv-&gt;bittiming_const);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-		memcpy(&amp;priv-&gt;bittiming, &amp;bt, sizeof(bt));</div><div class='del'>-</div><div class='del'>-		if (priv-&gt;do_set_bittiming) {</div><div class='del'>-			/* Finally, set the bit-timing registers */</div><div class='del'>-			err = priv-&gt;do_set_bittiming(dev);</div><div class='del'>-			if (err)</div><div class='del'>-				return err;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (data[IFLA_CAN_CTRLMODE]) {</div><div class='del'>-		struct can_ctrlmode *cm;</div><div class='del'>-</div><div class='del'>-		/* Do not allow changing controller mode while running */</div><div class='del'>-		if (dev-&gt;flags &amp; IFF_UP)</div><div class='del'>-			return -EBUSY;</div><div class='del'>-		cm = nla_data(data[IFLA_CAN_CTRLMODE]);</div><div class='del'>-</div><div class='del'>-		/* check whether changed bits are allowed to be modified */</div><div class='del'>-		if (cm-&gt;mask &amp; ~priv-&gt;ctrlmode_supported)</div><div class='del'>-			return -EOPNOTSUPP;</div><div class='del'>-</div><div class='del'>-		/* clear bits to be modified and copy the flag values */</div><div class='del'>-		priv-&gt;ctrlmode &amp;= ~cm-&gt;mask;</div><div class='del'>-		priv-&gt;ctrlmode |= (cm-&gt;flags &amp; cm-&gt;mask);</div><div class='del'>-</div><div class='del'>-		/* CAN_CTRLMODE_FD can only be set when driver supports FD */</div><div class='del'>-		if (priv-&gt;ctrlmode &amp; CAN_CTRLMODE_FD)</div><div class='del'>-			dev-&gt;mtu = CANFD_MTU;</div><div class='del'>-		else</div><div class='del'>-			dev-&gt;mtu = CAN_MTU;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (data[IFLA_CAN_RESTART_MS]) {</div><div class='del'>-		/* Do not allow changing restart delay while running */</div><div class='del'>-		if (dev-&gt;flags &amp; IFF_UP)</div><div class='del'>-			return -EBUSY;</div><div class='del'>-		priv-&gt;restart_ms = nla_get_u32(data[IFLA_CAN_RESTART_MS]);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (data[IFLA_CAN_RESTART]) {</div><div class='del'>-		/* Do not allow a restart while not running */</div><div class='del'>-		if (!(dev-&gt;flags &amp; IFF_UP))</div><div class='del'>-			return -EINVAL;</div><div class='del'>-		err = can_restart_now(dev);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (data[IFLA_CAN_DATA_BITTIMING]) {</div><div class='del'>-		struct can_bittiming dbt;</div><div class='del'>-</div><div class='del'>-		/* Do not allow changing bittiming while running */</div><div class='del'>-		if (dev-&gt;flags &amp; IFF_UP)</div><div class='del'>-			return -EBUSY;</div><div class='del'>-		memcpy(&amp;dbt, nla_data(data[IFLA_CAN_DATA_BITTIMING]),</div><div class='del'>-		       sizeof(dbt));</div><div class='del'>-		err = can_get_bittiming(dev, &amp;dbt, priv-&gt;data_bittiming_const);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-		memcpy(&amp;priv-&gt;data_bittiming, &amp;dbt, sizeof(dbt));</div><div class='del'>-</div><div class='del'>-		if (priv-&gt;do_set_data_bittiming) {</div><div class='del'>-			/* Finally, set the bit-timing registers */</div><div class='del'>-			err = priv-&gt;do_set_data_bittiming(dev);</div><div class='del'>-			if (err)</div><div class='del'>-				return err;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static size_t can_get_size(const struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct can_priv *priv = netdev_priv(dev);</div><div class='del'>-	size_t size = 0;</div><div class='del'>-</div><div class='del'>-	if (priv-&gt;bittiming.bitrate)				/* IFLA_CAN_BITTIMING */</div><div class='del'>-		size += nla_total_size(sizeof(struct can_bittiming));</div><div class='del'>-	if (priv-&gt;bittiming_const)				/* IFLA_CAN_BITTIMING_CONST */</div><div class='del'>-		size += nla_total_size(sizeof(struct can_bittiming_const));</div><div class='del'>-	size += nla_total_size(sizeof(struct can_clock));	/* IFLA_CAN_CLOCK */</div><div class='del'>-	size += nla_total_size(sizeof(u32));			/* IFLA_CAN_STATE */</div><div class='del'>-	size += nla_total_size(sizeof(struct can_ctrlmode));	/* IFLA_CAN_CTRLMODE */</div><div class='del'>-	size += nla_total_size(sizeof(u32));			/* IFLA_CAN_RESTART_MS */</div><div class='del'>-	if (priv-&gt;do_get_berr_counter)				/* IFLA_CAN_BERR_COUNTER */</div><div class='del'>-		size += nla_total_size(sizeof(struct can_berr_counter));</div><div class='del'>-	if (priv-&gt;data_bittiming.bitrate)			/* IFLA_CAN_DATA_BITTIMING */</div><div class='del'>-		size += nla_total_size(sizeof(struct can_bittiming));</div><div class='del'>-	if (priv-&gt;data_bittiming_const)				/* IFLA_CAN_DATA_BITTIMING_CONST */</div><div class='del'>-		size += nla_total_size(sizeof(struct can_bittiming_const));</div><div class='del'>-</div><div class='del'>-	return size;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int can_fill_info(struct sk_buff *skb, const struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct can_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct can_ctrlmode cm = {.flags = priv-&gt;ctrlmode};</div><div class='del'>-	struct can_berr_counter bec;</div><div class='del'>-	enum can_state state = priv-&gt;state;</div><div class='del'>-</div><div class='del'>-	if (priv-&gt;do_get_state)</div><div class='del'>-		priv-&gt;do_get_state(dev, &amp;state);</div><div class='del'>-</div><div class='del'>-	if ((priv-&gt;bittiming.bitrate &amp;&amp;</div><div class='del'>-	     nla_put(skb, IFLA_CAN_BITTIMING,</div><div class='del'>-		     sizeof(priv-&gt;bittiming), &amp;priv-&gt;bittiming)) ||</div><div class='del'>-</div><div class='del'>-	    (priv-&gt;bittiming_const &amp;&amp;</div><div class='del'>-	     nla_put(skb, IFLA_CAN_BITTIMING_CONST,</div><div class='del'>-		     sizeof(*priv-&gt;bittiming_const), priv-&gt;bittiming_const)) ||</div><div class='del'>-</div><div class='del'>-	    nla_put(skb, IFLA_CAN_CLOCK, sizeof(cm), &amp;priv-&gt;clock) ||</div><div class='del'>-	    nla_put_u32(skb, IFLA_CAN_STATE, state) ||</div><div class='del'>-	    nla_put(skb, IFLA_CAN_CTRLMODE, sizeof(cm), &amp;cm) ||</div><div class='del'>-	    nla_put_u32(skb, IFLA_CAN_RESTART_MS, priv-&gt;restart_ms) ||</div><div class='del'>-</div><div class='del'>-	    (priv-&gt;do_get_berr_counter &amp;&amp;</div><div class='del'>-	     !priv-&gt;do_get_berr_counter(dev, &amp;bec) &amp;&amp;</div><div class='del'>-	     nla_put(skb, IFLA_CAN_BERR_COUNTER, sizeof(bec), &amp;bec)) ||</div><div class='del'>-</div><div class='del'>-	    (priv-&gt;data_bittiming.bitrate &amp;&amp;</div><div class='del'>-	     nla_put(skb, IFLA_CAN_DATA_BITTIMING,</div><div class='del'>-		     sizeof(priv-&gt;data_bittiming), &amp;priv-&gt;data_bittiming)) ||</div><div class='del'>-</div><div class='del'>-	    (priv-&gt;data_bittiming_const &amp;&amp;</div><div class='del'>-	     nla_put(skb, IFLA_CAN_DATA_BITTIMING_CONST,</div><div class='del'>-		     sizeof(*priv-&gt;data_bittiming_const),</div><div class='del'>-		     priv-&gt;data_bittiming_const)))</div><div class='del'>-		return -EMSGSIZE;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static size_t can_get_xstats_size(const struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	return sizeof(struct can_device_stats);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int can_fill_xstats(struct sk_buff *skb, const struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct can_priv *priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	if (nla_put(skb, IFLA_INFO_XSTATS,</div><div class='del'>-		    sizeof(priv-&gt;can_stats), &amp;priv-&gt;can_stats))</div><div class='del'>-		goto nla_put_failure;</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-nla_put_failure:</div><div class='del'>-	return -EMSGSIZE;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int can_newlink(struct net *src_net, struct net_device *dev,</div><div class='del'>-		       struct nlattr *tb[], struct nlattr *data[])</div><div class='del'>-{</div><div class='del'>-	return -EOPNOTSUPP;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct rtnl_link_ops can_link_ops __read_mostly = {</div><div class='del'>-	.kind		= "can",</div><div class='del'>-	.maxtype	= IFLA_CAN_MAX,</div><div class='del'>-	.policy		= can_policy,</div><div class='del'>-	.setup		= can_setup,</div><div class='del'>-	.newlink	= can_newlink,</div><div class='del'>-	.changelink	= can_changelink,</div><div class='del'>-	.get_size	= can_get_size,</div><div class='del'>-	.fill_info	= can_fill_info,</div><div class='del'>-	.get_xstats_size = can_get_xstats_size,</div><div class='del'>-	.fill_xstats	= can_fill_xstats,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Register the CAN network device</div><div class='del'>- */</div><div class='del'>-int register_candev(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	dev-&gt;rtnl_link_ops = &amp;can_link_ops;</div><div class='del'>-	return register_netdev(dev);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(register_candev);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Unregister the CAN network device</div><div class='del'>- */</div><div class='del'>-void unregister_candev(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	unregister_netdev(dev);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(unregister_candev);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Test if a network device is a candev based device</div><div class='del'>- * and return the can_priv* if so.</div><div class='del'>- */</div><div class='del'>-struct can_priv *safe_candev_priv(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	if ((dev-&gt;type != ARPHRD_CAN) || (dev-&gt;rtnl_link_ops != &amp;can_link_ops))</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	return netdev_priv(dev);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(safe_candev_priv);</div><div class='del'>-</div><div class='del'>-static __init int can_dev_init(void)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	can_led_notifier_init();</div><div class='del'>-</div><div class='del'>-	err = rtnl_link_register(&amp;can_link_ops);</div><div class='del'>-	if (!err)</div><div class='del'>-		printk(KERN_INFO MOD_DESC "\n");</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-module_init(can_dev_init);</div><div class='del'>-</div><div class='del'>-static __exit void can_dev_exit(void)</div><div class='del'>-{</div><div class='del'>-	rtnl_link_unregister(&amp;can_link_ops);</div><div class='del'>-</div><div class='del'>-	can_led_notifier_exit();</div><div class='del'>-}</div><div class='del'>-module_exit(can_dev_exit);</div><div class='del'>-</div><div class='del'>-MODULE_ALIAS_RTNL_LINK("can");</div><div class='head'>diff --git a/drivers/net/can/dev/Makefile b/drivers/net/can/dev/Makefile<br/>new file mode 100644<br/>index 000000000000..633687d6b6c0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/dev/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/dev/Makefile</a></div><div class='hunk'>@@ -0,0 +1,12 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_CAN_DEV) += can-dev.o</div><div class='add'>+</div><div class='add'>+can-dev-y += skb.o</div><div class='add'>+</div><div class='add'>+can-dev-$(CONFIG_CAN_CALC_BITTIMING) += calc_bittiming.o</div><div class='add'>+can-dev-$(CONFIG_CAN_NETLINK) += bittiming.o</div><div class='add'>+can-dev-$(CONFIG_CAN_NETLINK) += dev.o</div><div class='add'>+can-dev-$(CONFIG_CAN_NETLINK) += length.o</div><div class='add'>+can-dev-$(CONFIG_CAN_NETLINK) += netlink.o</div><div class='add'>+can-dev-$(CONFIG_CAN_RX_OFFLOAD) += rx-offload.o</div><div class='head'>diff --git a/drivers/net/can/dev/bittiming.c b/drivers/net/can/dev/bittiming.c<br/>new file mode 100644<br/>index 000000000000..8f82418230ce<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/dev/bittiming.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/dev/bittiming.c</a></div><div class='hunk'>@@ -0,0 +1,216 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Copyright (C) 2005 Marc Kleine-Budde, Pengutronix</div><div class='add'>+ * Copyright (C) 2006 Andrey Volkov, Varma Electronics</div><div class='add'>+ * Copyright (C) 2008-2009 Wolfgang Grandegger &lt;wg@grandegger.com&gt;</div><div class='add'>+ * Copyright (c) 2025 Vincent Mailhol &lt;mailhol@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+</div><div class='add'>+void can_sjw_set_default(struct can_bittiming *bt)</div><div class='add'>+{</div><div class='add'>+	if (bt-&gt;sjw)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* If user space provides no sjw, use sane default of phase_seg2 / 2 */</div><div class='add'>+	bt-&gt;sjw = max(1U, min(bt-&gt;phase_seg1, bt-&gt;phase_seg2 / 2));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int can_sjw_check(const struct net_device *dev, const struct can_bittiming *bt,</div><div class='add'>+		  const struct can_bittiming_const *btc, struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	if (bt-&gt;sjw &gt; btc-&gt;sjw_max) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT(extack, "sjw: %u greater than max sjw: %u",</div><div class='add'>+				   bt-&gt;sjw, btc-&gt;sjw_max);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (bt-&gt;sjw &gt; bt-&gt;phase_seg1) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+				   "sjw: %u greater than phase-seg1: %u",</div><div class='add'>+				   bt-&gt;sjw, bt-&gt;phase_seg1);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (bt-&gt;sjw &gt; bt-&gt;phase_seg2) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+				   "sjw: %u greater than phase-seg2: %u",</div><div class='add'>+				   bt-&gt;sjw, bt-&gt;phase_seg2);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Checks the validity of the specified bit-timing parameters prop_seg,</div><div class='add'>+ * phase_seg1, phase_seg2 and sjw and tries to determine the bitrate</div><div class='add'>+ * prescaler value brp. You can find more information in the header</div><div class='add'>+ * file linux/can/netlink.h.</div><div class='add'>+ */</div><div class='add'>+static int can_fixup_bittiming(const struct net_device *dev, struct can_bittiming *bt,</div><div class='add'>+			       const struct can_bittiming_const *btc,</div><div class='add'>+			       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	const unsigned int tseg1 = bt-&gt;prop_seg + bt-&gt;phase_seg1;</div><div class='add'>+	const struct can_priv *priv = netdev_priv(dev);</div><div class='add'>+	u64 brp64;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (tseg1 &lt; btc-&gt;tseg1_min) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT(extack, "prop-seg + phase-seg1: %u less than tseg1-min: %u",</div><div class='add'>+				   tseg1, btc-&gt;tseg1_min);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (tseg1 &gt; btc-&gt;tseg1_max) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT(extack, "prop-seg + phase-seg1: %u greater than tseg1-max: %u",</div><div class='add'>+				   tseg1, btc-&gt;tseg1_max);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (bt-&gt;phase_seg2 &lt; btc-&gt;tseg2_min) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT(extack, "phase-seg2: %u less than tseg2-min: %u",</div><div class='add'>+				   bt-&gt;phase_seg2, btc-&gt;tseg2_min);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (bt-&gt;phase_seg2 &gt; btc-&gt;tseg2_max) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT(extack, "phase-seg2: %u greater than tseg2-max: %u",</div><div class='add'>+				   bt-&gt;phase_seg2, btc-&gt;tseg2_max);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	can_sjw_set_default(bt);</div><div class='add'>+</div><div class='add'>+	err = can_sjw_check(dev, bt, btc, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	brp64 = (u64)priv-&gt;clock.freq * (u64)bt-&gt;tq;</div><div class='add'>+	if (btc-&gt;brp_inc &gt; 1)</div><div class='add'>+		do_div(brp64, btc-&gt;brp_inc);</div><div class='add'>+	brp64 += 500000000UL - 1;</div><div class='add'>+	do_div(brp64, 1000000000UL); /* the practicable BRP */</div><div class='add'>+	if (btc-&gt;brp_inc &gt; 1)</div><div class='add'>+		brp64 *= btc-&gt;brp_inc;</div><div class='add'>+	bt-&gt;brp = (u32)brp64;</div><div class='add'>+</div><div class='add'>+	if (bt-&gt;brp &lt; btc-&gt;brp_min) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT(extack, "resulting brp: %u less than brp-min: %u",</div><div class='add'>+				   bt-&gt;brp, btc-&gt;brp_min);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (bt-&gt;brp &gt; btc-&gt;brp_max) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT(extack, "resulting brp: %u greater than brp-max: %u",</div><div class='add'>+				   bt-&gt;brp, btc-&gt;brp_max);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bt-&gt;bitrate = priv-&gt;clock.freq / (bt-&gt;brp * can_bit_time(bt));</div><div class='add'>+	bt-&gt;sample_point = ((CAN_SYNC_SEG + tseg1) * 1000) / can_bit_time(bt);</div><div class='add'>+	bt-&gt;tq = DIV_U64_ROUND_CLOSEST(mul_u32_u32(bt-&gt;brp, NSEC_PER_SEC),</div><div class='add'>+				       priv-&gt;clock.freq);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Checks the validity of predefined bitrate settings */</div><div class='add'>+static int</div><div class='add'>+can_validate_bitrate(const struct net_device *dev, const struct can_bittiming *bt,</div><div class='add'>+		     const u32 *bitrate_const,</div><div class='add'>+		     const unsigned int bitrate_const_cnt,</div><div class='add'>+		     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; bitrate_const_cnt; i++) {</div><div class='add'>+		if (bt-&gt;bitrate == bitrate_const[i])</div><div class='add'>+			return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	NL_SET_ERR_MSG_FMT(extack, "bitrate %u bps not supported",</div><div class='add'>+			   bt-&gt;brp);</div><div class='add'>+</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int can_get_bittiming(const struct net_device *dev, struct can_bittiming *bt,</div><div class='add'>+		      const struct can_bittiming_const *btc,</div><div class='add'>+		      const u32 *bitrate_const,</div><div class='add'>+		      const unsigned int bitrate_const_cnt,</div><div class='add'>+		      struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	/* Depending on the given can_bittiming parameter structure the CAN</div><div class='add'>+	 * timing parameters are calculated based on the provided bitrate OR</div><div class='add'>+	 * alternatively the CAN timing parameters (tq, prop_seg, etc.) are</div><div class='add'>+	 * provided directly which are then checked and fixed up.</div><div class='add'>+	 */</div><div class='add'>+	if (!bt-&gt;tq &amp;&amp; bt-&gt;bitrate &amp;&amp; btc)</div><div class='add'>+		return can_calc_bittiming(dev, bt, btc, extack);</div><div class='add'>+	if (bt-&gt;tq &amp;&amp; !bt-&gt;bitrate &amp;&amp; btc)</div><div class='add'>+		return can_fixup_bittiming(dev, bt, btc, extack);</div><div class='add'>+	if (!bt-&gt;tq &amp;&amp; bt-&gt;bitrate &amp;&amp; bitrate_const)</div><div class='add'>+		return can_validate_bitrate(dev, bt, bitrate_const,</div><div class='add'>+					    bitrate_const_cnt, extack);</div><div class='add'>+</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int can_validate_pwm_bittiming(const struct net_device *dev,</div><div class='add'>+			       const struct can_pwm *pwm,</div><div class='add'>+			       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	const struct can_priv *priv = netdev_priv(dev);</div><div class='add'>+	u32 xl_bit_time_tqmin = can_bit_time_tqmin(&amp;priv-&gt;xl.data_bittiming);</div><div class='add'>+	u32 nom_bit_time_tqmin = can_bit_time_tqmin(&amp;priv-&gt;bittiming);</div><div class='add'>+	u32 pwms_ns = can_tqmin_to_ns(pwm-&gt;pwms, priv-&gt;clock.freq);</div><div class='add'>+	u32 pwml_ns = can_tqmin_to_ns(pwm-&gt;pwml, priv-&gt;clock.freq);</div><div class='add'>+</div><div class='add'>+	if (pwms_ns + pwml_ns &gt; CAN_PWM_NS_MAX) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+				   "The PWM symbol duration: %u ns may not exceed %u ns",</div><div class='add'>+				   pwms_ns + pwml_ns, CAN_PWM_NS_MAX);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pwms_ns &lt; CAN_PWM_DECODE_NS) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+				   "PWMS: %u ns shall be at least %u ns",</div><div class='add'>+				   pwms_ns, CAN_PWM_DECODE_NS);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pwm-&gt;pwms &gt;= pwm-&gt;pwml) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+				   "PWMS: %u tqmin shall be smaller than PWML: %u tqmin",</div><div class='add'>+				   pwm-&gt;pwms, pwm-&gt;pwml);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pwml_ns - pwms_ns &lt; 2 * CAN_PWM_DECODE_NS) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+				   "At least %u ns shall separate PWMS: %u ns from PMWL: %u ns",</div><div class='add'>+				   2 * CAN_PWM_DECODE_NS, pwms_ns, pwml_ns);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (xl_bit_time_tqmin % (pwm-&gt;pwms + pwm-&gt;pwml) != 0) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+				   "PWM duration: %u tqmin does not divide XL's bit time: %u tqmin",</div><div class='add'>+				   pwm-&gt;pwms + pwm-&gt;pwml, xl_bit_time_tqmin);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pwm-&gt;pwmo &gt;= pwm-&gt;pwms + pwm-&gt;pwml) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+				   "PWMO: %u tqmin can not be greater than PWMS + PWML: %u tqmin",</div><div class='add'>+				   pwm-&gt;pwmo, pwm-&gt;pwms + pwm-&gt;pwml);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (nom_bit_time_tqmin % (pwm-&gt;pwms + pwm-&gt;pwml) != pwm-&gt;pwmo) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+				   "Can not assemble nominal bit time: %u tqmin out of PWMS + PMWL and PWMO",</div><div class='add'>+				   nom_bit_time_tqmin);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/can/dev/calc_bittiming.c b/drivers/net/can/dev/calc_bittiming.c<br/>new file mode 100644<br/>index 000000000000..cc4022241553<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/dev/calc_bittiming.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/dev/calc_bittiming.c</a></div><div class='hunk'>@@ -0,0 +1,262 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Copyright (C) 2005 Marc Kleine-Budde, Pengutronix</div><div class='add'>+ * Copyright (C) 2006 Andrey Volkov, Varma Electronics</div><div class='add'>+ * Copyright (C) 2008-2009 Wolfgang Grandegger &lt;wg@grandegger.com&gt;</div><div class='add'>+ * Copyright (C) 2021-2025 Vincent Mailhol &lt;mailhol@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/units.h&gt;</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+</div><div class='add'>+#define CAN_CALC_MAX_ERROR 50 /* in one-tenth of a percent */</div><div class='add'>+</div><div class='add'>+/* CiA recommended sample points for Non Return to Zero encoding. */</div><div class='add'>+static int can_calc_sample_point_nrz(const struct can_bittiming *bt)</div><div class='add'>+{</div><div class='add'>+	if (bt-&gt;bitrate &gt; 800 * KILO /* BPS */)</div><div class='add'>+		return 750;</div><div class='add'>+</div><div class='add'>+	if (bt-&gt;bitrate &gt; 500 * KILO /* BPS */)</div><div class='add'>+		return 800;</div><div class='add'>+</div><div class='add'>+	return 875;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Sample points for Pulse-Width Modulation encoding. */</div><div class='add'>+static int can_calc_sample_point_pwm(const struct can_bittiming *bt)</div><div class='add'>+{</div><div class='add'>+	if (bt-&gt;bitrate &gt; 15 * MEGA /* BPS */)</div><div class='add'>+		return 625;</div><div class='add'>+</div><div class='add'>+	if (bt-&gt;bitrate &gt; 9 * MEGA /* BPS */)</div><div class='add'>+		return 600;</div><div class='add'>+</div><div class='add'>+	if (bt-&gt;bitrate &gt; 4 * MEGA /* BPS */)</div><div class='add'>+		return 560;</div><div class='add'>+</div><div class='add'>+	return 520;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Bit-timing calculation derived from:</div><div class='add'>+ *</div><div class='add'>+ * Code based on LinCAN sources and H8S2638 project</div><div class='add'>+ * Copyright 2004-2006 Pavel Pisa - DCE FELK CVUT cz</div><div class='add'>+ * Copyright 2005      Stanislav Marek</div><div class='add'>+ * email: pisa@cmp.felk.cvut.cz</div><div class='add'>+ *</div><div class='add'>+ * Calculates proper bit-timing parameters for a specified bit-rate</div><div class='add'>+ * and sample-point, which can then be used to set the bit-timing</div><div class='add'>+ * registers of the CAN controller. You can find more information</div><div class='add'>+ * in the header file linux/can/netlink.h.</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+can_update_sample_point(const struct can_bittiming_const *btc,</div><div class='add'>+			const unsigned int sample_point_reference, const unsigned int tseg,</div><div class='add'>+			unsigned int *tseg1_ptr, unsigned int *tseg2_ptr,</div><div class='add'>+			unsigned int *sample_point_error_ptr)</div><div class='add'>+{</div><div class='add'>+	unsigned int sample_point_error, best_sample_point_error = UINT_MAX;</div><div class='add'>+	unsigned int sample_point, best_sample_point = 0;</div><div class='add'>+	unsigned int tseg1, tseg2;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt;= 1; i++) {</div><div class='add'>+		tseg2 = tseg + CAN_SYNC_SEG -</div><div class='add'>+			(sample_point_reference * (tseg + CAN_SYNC_SEG)) /</div><div class='add'>+			1000 - i;</div><div class='add'>+		tseg2 = clamp(tseg2, btc-&gt;tseg2_min, btc-&gt;tseg2_max);</div><div class='add'>+		tseg1 = tseg - tseg2;</div><div class='add'>+		if (tseg1 &gt; btc-&gt;tseg1_max) {</div><div class='add'>+			tseg1 = btc-&gt;tseg1_max;</div><div class='add'>+			tseg2 = tseg - tseg1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		sample_point = 1000 * (tseg + CAN_SYNC_SEG - tseg2) /</div><div class='add'>+			(tseg + CAN_SYNC_SEG);</div><div class='add'>+		sample_point_error = abs(sample_point_reference - sample_point);</div><div class='add'>+</div><div class='add'>+		if (sample_point &lt;= sample_point_reference &amp;&amp;</div><div class='add'>+		    sample_point_error &lt; best_sample_point_error) {</div><div class='add'>+			best_sample_point = sample_point;</div><div class='add'>+			best_sample_point_error = sample_point_error;</div><div class='add'>+			*tseg1_ptr = tseg1;</div><div class='add'>+			*tseg2_ptr = tseg2;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (sample_point_error_ptr)</div><div class='add'>+		*sample_point_error_ptr = best_sample_point_error;</div><div class='add'>+</div><div class='add'>+	return best_sample_point;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int can_calc_bittiming(const struct net_device *dev, struct can_bittiming *bt,</div><div class='add'>+		       const struct can_bittiming_const *btc, struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct can_priv *priv = netdev_priv(dev);</div><div class='add'>+	unsigned int bitrate;			/* current bitrate */</div><div class='add'>+	unsigned int bitrate_error;		/* diff between calculated and reference value */</div><div class='add'>+	unsigned int best_bitrate_error = UINT_MAX;</div><div class='add'>+	unsigned int sample_point_error;	/* diff between calculated and reference value */</div><div class='add'>+	unsigned int best_sample_point_error = UINT_MAX;</div><div class='add'>+	unsigned int sample_point_reference;	/* reference sample point */</div><div class='add'>+	unsigned int best_tseg = 0;		/* current best value for tseg */</div><div class='add'>+	unsigned int best_brp = 0;		/* current best value for brp */</div><div class='add'>+	unsigned int brp, tsegall, tseg, tseg1 = 0, tseg2 = 0;</div><div class='add'>+	u64 v64;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (bt-&gt;sample_point)</div><div class='add'>+		sample_point_reference = bt-&gt;sample_point;</div><div class='add'>+	else if (btc == priv-&gt;xl.data_bittiming_const &amp;&amp;</div><div class='add'>+		 (priv-&gt;ctrlmode &amp; CAN_CTRLMODE_XL_TMS))</div><div class='add'>+		sample_point_reference = can_calc_sample_point_pwm(bt);</div><div class='add'>+	else</div><div class='add'>+		sample_point_reference = can_calc_sample_point_nrz(bt);</div><div class='add'>+</div><div class='add'>+	/* tseg even = round down, odd = round up */</div><div class='add'>+	for (tseg = (btc-&gt;tseg1_max + btc-&gt;tseg2_max) * 2 + 1;</div><div class='add'>+	     tseg &gt;= (btc-&gt;tseg1_min + btc-&gt;tseg2_min) * 2; tseg--) {</div><div class='add'>+		tsegall = CAN_SYNC_SEG + tseg / 2;</div><div class='add'>+</div><div class='add'>+		/* Compute all possible tseg choices (tseg=tseg1+tseg2) */</div><div class='add'>+		brp = priv-&gt;clock.freq / (tsegall * bt-&gt;bitrate) + tseg % 2;</div><div class='add'>+</div><div class='add'>+		/* choose brp step which is possible in system */</div><div class='add'>+		brp = (brp / btc-&gt;brp_inc) * btc-&gt;brp_inc;</div><div class='add'>+		if (brp &lt; btc-&gt;brp_min || brp &gt; btc-&gt;brp_max)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		bitrate = priv-&gt;clock.freq / (brp * tsegall);</div><div class='add'>+		bitrate_error = abs(bt-&gt;bitrate - bitrate);</div><div class='add'>+</div><div class='add'>+		/* tseg brp biterror */</div><div class='add'>+		if (bitrate_error &gt; best_bitrate_error)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* reset sample point error if we have a better bitrate */</div><div class='add'>+		if (bitrate_error &lt; best_bitrate_error)</div><div class='add'>+			best_sample_point_error = UINT_MAX;</div><div class='add'>+</div><div class='add'>+		can_update_sample_point(btc, sample_point_reference, tseg / 2,</div><div class='add'>+					&amp;tseg1, &amp;tseg2, &amp;sample_point_error);</div><div class='add'>+		if (sample_point_error &gt;= best_sample_point_error)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		best_sample_point_error = sample_point_error;</div><div class='add'>+		best_bitrate_error = bitrate_error;</div><div class='add'>+		best_tseg = tseg / 2;</div><div class='add'>+		best_brp = brp;</div><div class='add'>+</div><div class='add'>+		if (bitrate_error == 0 &amp;&amp; sample_point_error == 0)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (best_bitrate_error) {</div><div class='add'>+		/* Error in one-hundredth of a percent */</div><div class='add'>+		v64 = (u64)best_bitrate_error * 10000;</div><div class='add'>+		do_div(v64, bt-&gt;bitrate);</div><div class='add'>+		bitrate_error = (u32)v64;</div><div class='add'>+		/* print at least 0.01% if the error is smaller */</div><div class='add'>+		bitrate_error = max(bitrate_error, 1U);</div><div class='add'>+		if (bitrate_error &gt; CAN_CALC_MAX_ERROR) {</div><div class='add'>+			NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+					   "bitrate error: %u.%02u%% too high",</div><div class='add'>+					   bitrate_error / 100,</div><div class='add'>+					   bitrate_error % 100);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+		NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+				   "bitrate error: %u.%02u%%",</div><div class='add'>+				   bitrate_error / 100, bitrate_error % 100);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* real sample point */</div><div class='add'>+	bt-&gt;sample_point = can_update_sample_point(btc, sample_point_reference,</div><div class='add'>+						   best_tseg, &amp;tseg1, &amp;tseg2,</div><div class='add'>+						   NULL);</div><div class='add'>+</div><div class='add'>+	v64 = (u64)best_brp * 1000 * 1000 * 1000;</div><div class='add'>+	do_div(v64, priv-&gt;clock.freq);</div><div class='add'>+	bt-&gt;tq = (u32)v64;</div><div class='add'>+	bt-&gt;prop_seg = tseg1 / 2;</div><div class='add'>+	bt-&gt;phase_seg1 = tseg1 - bt-&gt;prop_seg;</div><div class='add'>+	bt-&gt;phase_seg2 = tseg2;</div><div class='add'>+</div><div class='add'>+	can_sjw_set_default(bt);</div><div class='add'>+</div><div class='add'>+	err = can_sjw_check(dev, bt, btc, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	bt-&gt;brp = best_brp;</div><div class='add'>+</div><div class='add'>+	/* real bitrate */</div><div class='add'>+	bt-&gt;bitrate = priv-&gt;clock.freq /</div><div class='add'>+		(bt-&gt;brp * can_bit_time(bt));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void can_calc_tdco(struct can_tdc *tdc, const struct can_tdc_const *tdc_const,</div><div class='add'>+		   const struct can_bittiming *dbt,</div><div class='add'>+		   u32 tdc_mask, u32 *ctrlmode, u32 ctrlmode_supported)</div><div class='add'>+</div><div class='add'>+{</div><div class='add'>+	u32 tdc_auto = tdc_mask &amp; CAN_CTRLMODE_TDC_AUTO_MASK;</div><div class='add'>+</div><div class='add'>+	if (!tdc_const || !(ctrlmode_supported &amp; tdc_auto))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	*ctrlmode &amp;= ~tdc_mask;</div><div class='add'>+</div><div class='add'>+	/* As specified in ISO 11898-1 section 11.3.3 "Transmitter</div><div class='add'>+	 * delay compensation" (TDC) is only applicable if data BRP is</div><div class='add'>+	 * one or two.</div><div class='add'>+	 */</div><div class='add'>+	if (dbt-&gt;brp == 1 || dbt-&gt;brp == 2) {</div><div class='add'>+		/* Sample point in clock periods */</div><div class='add'>+		u32 sample_point_in_tc = (CAN_SYNC_SEG + dbt-&gt;prop_seg +</div><div class='add'>+					  dbt-&gt;phase_seg1) * dbt-&gt;brp;</div><div class='add'>+</div><div class='add'>+		if (sample_point_in_tc &lt; tdc_const-&gt;tdco_min)</div><div class='add'>+			return;</div><div class='add'>+		tdc-&gt;tdco = min(sample_point_in_tc, tdc_const-&gt;tdco_max);</div><div class='add'>+		*ctrlmode |= tdc_auto;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int can_calc_pwm(struct net_device *dev, struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct can_priv *priv = netdev_priv(dev);</div><div class='add'>+	const struct can_pwm_const *pwm_const = priv-&gt;xl.pwm_const;</div><div class='add'>+	struct can_pwm *pwm = &amp;priv-&gt;xl.pwm;</div><div class='add'>+	u32 xl_tqmin = can_bit_time_tqmin(&amp;priv-&gt;xl.data_bittiming);</div><div class='add'>+	u32 xl_ns = can_tqmin_to_ns(xl_tqmin, priv-&gt;clock.freq);</div><div class='add'>+	u32 nom_tqmin = can_bit_time_tqmin(&amp;priv-&gt;bittiming);</div><div class='add'>+	int pwm_per_bit_max = xl_tqmin / (pwm_const-&gt;pwms_min + pwm_const-&gt;pwml_min);</div><div class='add'>+	int pwm_per_bit;</div><div class='add'>+	u32 pwm_tqmin;</div><div class='add'>+</div><div class='add'>+	/* For 5 MB/s databitrate or greater, xl_ns &lt; CAN_PWM_NS_MAX</div><div class='add'>+	 * giving us a pwm_per_bit of 1 and the loop immediately breaks</div><div class='add'>+	 */</div><div class='add'>+	for (pwm_per_bit = DIV_ROUND_UP(xl_ns, CAN_PWM_NS_MAX);</div><div class='add'>+	     pwm_per_bit &lt;= pwm_per_bit_max; pwm_per_bit++)</div><div class='add'>+		if (xl_tqmin % pwm_per_bit == 0)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+	if (pwm_per_bit &gt; pwm_per_bit_max) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+				   "Can not divide the XL data phase's bit time: %u tqmin into multiple PWM symbols",</div><div class='add'>+				   xl_tqmin);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pwm_tqmin = xl_tqmin / pwm_per_bit;</div><div class='add'>+	pwm-&gt;pwms = DIV_ROUND_UP_POW2(pwm_tqmin, 4);</div><div class='add'>+	pwm-&gt;pwml = pwm_tqmin - pwm-&gt;pwms;</div><div class='add'>+	pwm-&gt;pwmo = nom_tqmin % pwm_tqmin;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/can/dev/dev.c b/drivers/net/can/dev/dev.c<br/>new file mode 100644<br/>index 000000000000..091f30e94c61<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/dev/dev.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/dev/dev.c</a></div><div class='hunk'>@@ -0,0 +1,661 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Copyright (C) 2005 Marc Kleine-Budde, Pengutronix</div><div class='add'>+ * Copyright (C) 2006 Andrey Volkov, Varma Electronics</div><div class='add'>+ * Copyright (C) 2008-2009 Wolfgang Grandegger &lt;wg@grandegger.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/can.h&gt;</div><div class='add'>+#include &lt;linux/can/can-ml.h&gt;</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/can/skb.h&gt;</div><div class='add'>+#include &lt;linux/gpio/consumer.h&gt;</div><div class='add'>+#include &lt;linux/if_arp.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/workqueue.h&gt;</div><div class='add'>+</div><div class='add'>+static void can_update_state_error_stats(struct net_device *dev,</div><div class='add'>+					 enum can_state new_state)</div><div class='add'>+{</div><div class='add'>+	struct can_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	if (new_state &lt;= priv-&gt;state)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	switch (new_state) {</div><div class='add'>+	case CAN_STATE_ERROR_WARNING:</div><div class='add'>+		priv-&gt;can_stats.error_warning++;</div><div class='add'>+		break;</div><div class='add'>+	case CAN_STATE_ERROR_PASSIVE:</div><div class='add'>+		priv-&gt;can_stats.error_passive++;</div><div class='add'>+		break;</div><div class='add'>+	case CAN_STATE_BUS_OFF:</div><div class='add'>+		priv-&gt;can_stats.bus_off++;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int can_tx_state_to_frame(struct net_device *dev, enum can_state state)</div><div class='add'>+{</div><div class='add'>+	switch (state) {</div><div class='add'>+	case CAN_STATE_ERROR_ACTIVE:</div><div class='add'>+		return CAN_ERR_CRTL_ACTIVE;</div><div class='add'>+	case CAN_STATE_ERROR_WARNING:</div><div class='add'>+		return CAN_ERR_CRTL_TX_WARNING;</div><div class='add'>+	case CAN_STATE_ERROR_PASSIVE:</div><div class='add'>+		return CAN_ERR_CRTL_TX_PASSIVE;</div><div class='add'>+	default:</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int can_rx_state_to_frame(struct net_device *dev, enum can_state state)</div><div class='add'>+{</div><div class='add'>+	switch (state) {</div><div class='add'>+	case CAN_STATE_ERROR_ACTIVE:</div><div class='add'>+		return CAN_ERR_CRTL_ACTIVE;</div><div class='add'>+	case CAN_STATE_ERROR_WARNING:</div><div class='add'>+		return CAN_ERR_CRTL_RX_WARNING;</div><div class='add'>+	case CAN_STATE_ERROR_PASSIVE:</div><div class='add'>+		return CAN_ERR_CRTL_RX_PASSIVE;</div><div class='add'>+	default:</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const char *can_get_state_str(const enum can_state state)</div><div class='add'>+{</div><div class='add'>+	switch (state) {</div><div class='add'>+	case CAN_STATE_ERROR_ACTIVE:</div><div class='add'>+		return "Error Active";</div><div class='add'>+	case CAN_STATE_ERROR_WARNING:</div><div class='add'>+		return "Error Warning";</div><div class='add'>+	case CAN_STATE_ERROR_PASSIVE:</div><div class='add'>+		return "Error Passive";</div><div class='add'>+	case CAN_STATE_BUS_OFF:</div><div class='add'>+		return "Bus Off";</div><div class='add'>+	case CAN_STATE_STOPPED:</div><div class='add'>+		return "Stopped";</div><div class='add'>+	case CAN_STATE_SLEEPING:</div><div class='add'>+		return "Sleeping";</div><div class='add'>+	default:</div><div class='add'>+		return "&lt;unknown&gt;";</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(can_get_state_str);</div><div class='add'>+</div><div class='add'>+const char *can_get_ctrlmode_str(u32 ctrlmode)</div><div class='add'>+{</div><div class='add'>+	switch (ctrlmode &amp; ~(ctrlmode - 1)) {</div><div class='add'>+	case 0:</div><div class='add'>+		return "(none)";</div><div class='add'>+	case CAN_CTRLMODE_LOOPBACK:</div><div class='add'>+		return "LOOPBACK";</div><div class='add'>+	case CAN_CTRLMODE_LISTENONLY:</div><div class='add'>+		return "LISTEN-ONLY";</div><div class='add'>+	case CAN_CTRLMODE_3_SAMPLES:</div><div class='add'>+		return "TRIPLE-SAMPLING";</div><div class='add'>+	case CAN_CTRLMODE_ONE_SHOT:</div><div class='add'>+		return "ONE-SHOT";</div><div class='add'>+	case CAN_CTRLMODE_BERR_REPORTING:</div><div class='add'>+		return "BERR-REPORTING";</div><div class='add'>+	case CAN_CTRLMODE_FD:</div><div class='add'>+		return "FD";</div><div class='add'>+	case CAN_CTRLMODE_PRESUME_ACK:</div><div class='add'>+		return "PRESUME-ACK";</div><div class='add'>+	case CAN_CTRLMODE_FD_NON_ISO:</div><div class='add'>+		return "FD-NON-ISO";</div><div class='add'>+	case CAN_CTRLMODE_CC_LEN8_DLC:</div><div class='add'>+		return "CC-LEN8-DLC";</div><div class='add'>+	case CAN_CTRLMODE_TDC_AUTO:</div><div class='add'>+		return "TDC-AUTO";</div><div class='add'>+	case CAN_CTRLMODE_TDC_MANUAL:</div><div class='add'>+		return "TDC-MANUAL";</div><div class='add'>+	case CAN_CTRLMODE_RESTRICTED:</div><div class='add'>+		return "RESTRICTED";</div><div class='add'>+	case CAN_CTRLMODE_XL:</div><div class='add'>+		return "XL";</div><div class='add'>+	case CAN_CTRLMODE_XL_TDC_AUTO:</div><div class='add'>+		return "XL-TDC-AUTO";</div><div class='add'>+	case CAN_CTRLMODE_XL_TDC_MANUAL:</div><div class='add'>+		return "XL-TDC-MANUAL";</div><div class='add'>+	case CAN_CTRLMODE_XL_TMS:</div><div class='add'>+		return "TMS";</div><div class='add'>+	default:</div><div class='add'>+		return "&lt;unknown&gt;";</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(can_get_ctrlmode_str);</div><div class='add'>+</div><div class='add'>+static enum can_state can_state_err_to_state(u16 err)</div><div class='add'>+{</div><div class='add'>+	if (err &lt; CAN_ERROR_WARNING_THRESHOLD)</div><div class='add'>+		return CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+	if (err &lt; CAN_ERROR_PASSIVE_THRESHOLD)</div><div class='add'>+		return CAN_STATE_ERROR_WARNING;</div><div class='add'>+	if (err &lt; CAN_BUS_OFF_THRESHOLD)</div><div class='add'>+		return CAN_STATE_ERROR_PASSIVE;</div><div class='add'>+</div><div class='add'>+	return CAN_STATE_BUS_OFF;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void can_state_get_by_berr_counter(const struct net_device *dev,</div><div class='add'>+				   const struct can_berr_counter *bec,</div><div class='add'>+				   enum can_state *tx_state,</div><div class='add'>+				   enum can_state *rx_state)</div><div class='add'>+{</div><div class='add'>+	*tx_state = can_state_err_to_state(bec-&gt;txerr);</div><div class='add'>+	*rx_state = can_state_err_to_state(bec-&gt;rxerr);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(can_state_get_by_berr_counter);</div><div class='add'>+</div><div class='add'>+void can_change_state(struct net_device *dev, struct can_frame *cf,</div><div class='add'>+		      enum can_state tx_state, enum can_state rx_state)</div><div class='add'>+{</div><div class='add'>+	struct can_priv *priv = netdev_priv(dev);</div><div class='add'>+	enum can_state new_state = max(tx_state, rx_state);</div><div class='add'>+</div><div class='add'>+	if (unlikely(new_state == priv-&gt;state)) {</div><div class='add'>+		netdev_warn(dev, "%s: oops, state did not change", __func__);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev_dbg(dev, "Controller changed from %s State (%d) into %s State (%d).\n",</div><div class='add'>+		   can_get_state_str(priv-&gt;state), priv-&gt;state,</div><div class='add'>+		   can_get_state_str(new_state), new_state);</div><div class='add'>+</div><div class='add'>+	can_update_state_error_stats(dev, new_state);</div><div class='add'>+	priv-&gt;state = new_state;</div><div class='add'>+</div><div class='add'>+	if (!cf)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (unlikely(new_state == CAN_STATE_BUS_OFF)) {</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_BUSOFF;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='add'>+	cf-&gt;data[1] |= tx_state &gt;= rx_state ?</div><div class='add'>+		       can_tx_state_to_frame(dev, tx_state) : 0;</div><div class='add'>+	cf-&gt;data[1] |= tx_state &lt;= rx_state ?</div><div class='add'>+		       can_rx_state_to_frame(dev, rx_state) : 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(can_change_state);</div><div class='add'>+</div><div class='add'>+/* CAN device restart for bus-off recovery */</div><div class='add'>+static int can_restart(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct can_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;do_set_mode)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (netif_carrier_ok(dev))</div><div class='add'>+		netdev_err(dev, "Attempt to restart for bus-off recovery, but carrier is OK?\n");</div><div class='add'>+</div><div class='add'>+	/* No synchronization needed because the device is bus-off and</div><div class='add'>+	 * no messages can come in or go out.</div><div class='add'>+	 */</div><div class='add'>+	can_flush_echo_skb(dev);</div><div class='add'>+</div><div class='add'>+	/* send restart message upstream */</div><div class='add'>+	skb = alloc_can_err_skb(dev, &amp;cf);</div><div class='add'>+	if (skb) {</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_RESTARTED;</div><div class='add'>+		netif_rx(skb);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Now restart the device */</div><div class='add'>+	netif_carrier_on(dev);</div><div class='add'>+	err = priv-&gt;do_set_mode(dev, CAN_MODE_START);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(dev, "Restart failed, error %pe\n", ERR_PTR(err));</div><div class='add'>+		netif_carrier_off(dev);</div><div class='add'>+</div><div class='add'>+		return err;</div><div class='add'>+	} else {</div><div class='add'>+		netdev_dbg(dev, "Restarted\n");</div><div class='add'>+		priv-&gt;can_stats.restarts++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void can_restart_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct delayed_work *dwork = to_delayed_work(work);</div><div class='add'>+	struct can_priv *priv = container_of(dwork, struct can_priv,</div><div class='add'>+					     restart_work);</div><div class='add'>+</div><div class='add'>+	can_restart(priv-&gt;dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int can_restart_now(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct can_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	/* A manual restart is only permitted if automatic restart is</div><div class='add'>+	 * disabled and the device is in the bus-off state</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;restart_ms)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	if (priv-&gt;state != CAN_STATE_BUS_OFF)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	cancel_delayed_work_sync(&amp;priv-&gt;restart_work);</div><div class='add'>+</div><div class='add'>+	return can_restart(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* CAN bus-off</div><div class='add'>+ *</div><div class='add'>+ * This functions should be called when the device goes bus-off to</div><div class='add'>+ * tell the netif layer that no more packets can be sent or received.</div><div class='add'>+ * If enabled, a timer is started to trigger bus-off recovery.</div><div class='add'>+ */</div><div class='add'>+void can_bus_off(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct can_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;restart_ms)</div><div class='add'>+		netdev_info(dev, "bus-off, scheduling restart in %d ms\n",</div><div class='add'>+			    priv-&gt;restart_ms);</div><div class='add'>+	else</div><div class='add'>+		netdev_info(dev, "bus-off\n");</div><div class='add'>+</div><div class='add'>+	netif_carrier_off(dev);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;restart_ms)</div><div class='add'>+		schedule_delayed_work(&amp;priv-&gt;restart_work,</div><div class='add'>+				      msecs_to_jiffies(priv-&gt;restart_ms));</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(can_bus_off);</div><div class='add'>+</div><div class='add'>+void can_setup(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	dev-&gt;type = ARPHRD_CAN;</div><div class='add'>+	dev-&gt;mtu = CAN_MTU;</div><div class='add'>+	dev-&gt;min_mtu = CAN_MTU;</div><div class='add'>+	dev-&gt;max_mtu = CAN_MTU;</div><div class='add'>+	dev-&gt;hard_header_len = 0;</div><div class='add'>+	dev-&gt;addr_len = 0;</div><div class='add'>+	dev-&gt;tx_queue_len = 10;</div><div class='add'>+</div><div class='add'>+	/* New-style flags. */</div><div class='add'>+	dev-&gt;flags = IFF_NOARP;</div><div class='add'>+	dev-&gt;features = NETIF_F_HW_CSUM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Allocate and setup space for the CAN network device */</div><div class='add'>+struct net_device *alloc_candev_mqs(int sizeof_priv, unsigned int echo_skb_max,</div><div class='add'>+				    unsigned int txqs, unsigned int rxqs)</div><div class='add'>+{</div><div class='add'>+	struct can_ml_priv *can_ml;</div><div class='add'>+	struct net_device *dev;</div><div class='add'>+	struct can_priv *priv;</div><div class='add'>+	int size;</div><div class='add'>+</div><div class='add'>+	/* We put the driver's priv, the CAN mid layer priv and the</div><div class='add'>+	 * echo skb into the netdevice's priv. The memory layout for</div><div class='add'>+	 * the netdev_priv is like this:</div><div class='add'>+	 *</div><div class='add'>+	 * +-------------------------+</div><div class='add'>+	 * | driver's priv           |</div><div class='add'>+	 * +-------------------------+</div><div class='add'>+	 * | struct can_ml_priv      |</div><div class='add'>+	 * +-------------------------+</div><div class='add'>+	 * | array of struct sk_buff |</div><div class='add'>+	 * +-------------------------+</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	size = ALIGN(sizeof_priv, NETDEV_ALIGN) + sizeof(struct can_ml_priv);</div><div class='add'>+</div><div class='add'>+	if (echo_skb_max)</div><div class='add'>+		size = ALIGN(size, sizeof(struct sk_buff *)) +</div><div class='add'>+			echo_skb_max * sizeof(struct sk_buff *);</div><div class='add'>+</div><div class='add'>+	dev = alloc_netdev_mqs(size, "can%d", NET_NAME_UNKNOWN, can_setup,</div><div class='add'>+			       txqs, rxqs);</div><div class='add'>+	if (!dev)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	priv = netdev_priv(dev);</div><div class='add'>+	priv-&gt;dev = dev;</div><div class='add'>+</div><div class='add'>+	can_ml = (void *)priv + ALIGN(sizeof_priv, NETDEV_ALIGN);</div><div class='add'>+	can_set_ml_priv(dev, can_ml);</div><div class='add'>+</div><div class='add'>+	if (echo_skb_max) {</div><div class='add'>+		priv-&gt;echo_skb_max = echo_skb_max;</div><div class='add'>+		priv-&gt;echo_skb = (void *)priv +</div><div class='add'>+			(size - echo_skb_max * sizeof(struct sk_buff *));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;state = CAN_STATE_STOPPED;</div><div class='add'>+</div><div class='add'>+	INIT_DELAYED_WORK(&amp;priv-&gt;restart_work, can_restart_work);</div><div class='add'>+</div><div class='add'>+	return dev;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(alloc_candev_mqs);</div><div class='add'>+</div><div class='add'>+/* Free space of the CAN network device */</div><div class='add'>+void free_candev(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	free_netdev(dev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(free_candev);</div><div class='add'>+</div><div class='add'>+void can_set_default_mtu(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct can_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;ctrlmode &amp; CAN_CTRLMODE_XL) {</div><div class='add'>+		if (can_is_canxl_dev_mtu(dev-&gt;mtu))</div><div class='add'>+			return;</div><div class='add'>+		dev-&gt;mtu = CANXL_MTU;</div><div class='add'>+		dev-&gt;min_mtu = CANXL_MIN_MTU;</div><div class='add'>+		dev-&gt;max_mtu = CANXL_MAX_MTU;</div><div class='add'>+	} else if (priv-&gt;ctrlmode &amp; CAN_CTRLMODE_FD) {</div><div class='add'>+		dev-&gt;mtu = CANFD_MTU;</div><div class='add'>+		dev-&gt;min_mtu = CANFD_MTU;</div><div class='add'>+		dev-&gt;max_mtu = CANFD_MTU;</div><div class='add'>+	} else {</div><div class='add'>+		dev-&gt;mtu = CAN_MTU;</div><div class='add'>+		dev-&gt;min_mtu = CAN_MTU;</div><div class='add'>+		dev-&gt;max_mtu = CAN_MTU;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* helper to define static CAN controller features at device creation time */</div><div class='add'>+int can_set_static_ctrlmode(struct net_device *dev, u32 static_mode)</div><div class='add'>+{</div><div class='add'>+	struct can_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	/* alloc_candev() succeeded =&gt; netdev_priv() is valid at this point */</div><div class='add'>+	if (priv-&gt;ctrlmode_supported &amp; static_mode) {</div><div class='add'>+		netdev_warn(dev,</div><div class='add'>+			    "Controller features can not be supported and static at the same time\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	priv-&gt;ctrlmode = static_mode;</div><div class='add'>+</div><div class='add'>+	/* override MTU which was set by default in can_setup()? */</div><div class='add'>+	can_set_default_mtu(dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(can_set_static_ctrlmode);</div><div class='add'>+</div><div class='add'>+/* generic implementation of netdev_ops::ndo_hwtstamp_get for CAN devices</div><div class='add'>+ * supporting hardware timestamps</div><div class='add'>+ */</div><div class='add'>+int can_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+		     struct kernel_hwtstamp_config *cfg)</div><div class='add'>+{</div><div class='add'>+	cfg-&gt;tx_type = HWTSTAMP_TX_ON;</div><div class='add'>+	cfg-&gt;rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(can_hwtstamp_get);</div><div class='add'>+</div><div class='add'>+/* generic implementation of netdev_ops::ndo_hwtstamp_set for CAN devices</div><div class='add'>+ * supporting hardware timestamps</div><div class='add'>+ */</div><div class='add'>+int can_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+		     struct kernel_hwtstamp_config *cfg,</div><div class='add'>+		     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	if (cfg-&gt;tx_type == HWTSTAMP_TX_ON &amp;&amp;</div><div class='add'>+	    cfg-&gt;rx_filter == HWTSTAMP_FILTER_ALL)</div><div class='add'>+		return 0;</div><div class='add'>+	NL_SET_ERR_MSG_MOD(extack, "Only TX on and RX all packets filter supported");</div><div class='add'>+	return -ERANGE;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(can_hwtstamp_set);</div><div class='add'>+</div><div class='add'>+/* generic implementation of ethtool_ops::get_ts_info for CAN devices</div><div class='add'>+ * supporting hardware timestamps</div><div class='add'>+ */</div><div class='add'>+int can_ethtool_op_get_ts_info_hwts(struct net_device *dev,</div><div class='add'>+				    struct kernel_ethtool_ts_info *info)</div><div class='add'>+{</div><div class='add'>+	info-&gt;so_timestamping =</div><div class='add'>+		SOF_TIMESTAMPING_TX_SOFTWARE |</div><div class='add'>+		SOF_TIMESTAMPING_TX_HARDWARE |</div><div class='add'>+		SOF_TIMESTAMPING_RX_HARDWARE |</div><div class='add'>+		SOF_TIMESTAMPING_RAW_HARDWARE;</div><div class='add'>+	info-&gt;tx_types = BIT(HWTSTAMP_TX_ON);</div><div class='add'>+	info-&gt;rx_filters = BIT(HWTSTAMP_FILTER_ALL);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(can_ethtool_op_get_ts_info_hwts);</div><div class='add'>+</div><div class='add'>+/* Common open function when the device gets opened.</div><div class='add'>+ *</div><div class='add'>+ * This function should be called in the open function of the device</div><div class='add'>+ * driver.</div><div class='add'>+ */</div><div class='add'>+int open_candev(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct can_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;bittiming.bitrate) {</div><div class='add'>+		netdev_err(dev, "bit-timing not yet defined\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* For CAN FD the data bitrate has to be &gt;= the arbitration bitrate */</div><div class='add'>+	if ((priv-&gt;ctrlmode &amp; CAN_CTRLMODE_FD) &amp;&amp;</div><div class='add'>+	    (!priv-&gt;fd.data_bittiming.bitrate ||</div><div class='add'>+	     priv-&gt;fd.data_bittiming.bitrate &lt; priv-&gt;bittiming.bitrate)) {</div><div class='add'>+		netdev_err(dev, "incorrect/missing data bit-timing\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Switch carrier on if device was stopped while in bus-off state */</div><div class='add'>+	if (!netif_carrier_ok(dev))</div><div class='add'>+		netif_carrier_on(dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(open_candev);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+/* Common function that can be used to understand the limitation of</div><div class='add'>+ * a transceiver when it provides no means to determine these limitations</div><div class='add'>+ * at runtime.</div><div class='add'>+ */</div><div class='add'>+void of_can_transceiver(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct device_node *dn;</div><div class='add'>+	struct can_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct device_node *np = dev-&gt;dev.parent-&gt;of_node;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	dn = of_get_child_by_name(np, "can-transceiver");</div><div class='add'>+	if (!dn)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ret = of_property_read_u32(dn, "max-bitrate", &amp;priv-&gt;bitrate_max);</div><div class='add'>+	of_node_put(dn);</div><div class='add'>+	if ((ret &amp;&amp; ret != -EINVAL) || (!ret &amp;&amp; !priv-&gt;bitrate_max))</div><div class='add'>+		netdev_warn(dev, "Invalid value for transceiver max bitrate. Ignoring bitrate limit.\n");</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(of_can_transceiver);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/* Common close function for cleanup before the device gets closed.</div><div class='add'>+ *</div><div class='add'>+ * This function should be called in the close function of the device</div><div class='add'>+ * driver.</div><div class='add'>+ */</div><div class='add'>+void close_candev(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct can_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	cancel_delayed_work_sync(&amp;priv-&gt;restart_work);</div><div class='add'>+	can_flush_echo_skb(dev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(close_candev);</div><div class='add'>+</div><div class='add'>+static int can_set_termination(struct net_device *ndev, u16 term)</div><div class='add'>+{</div><div class='add'>+	struct can_priv *priv = netdev_priv(ndev);</div><div class='add'>+	int set;</div><div class='add'>+</div><div class='add'>+	if (term == priv-&gt;termination_gpio_ohms[CAN_TERMINATION_GPIO_ENABLED])</div><div class='add'>+		set = 1;</div><div class='add'>+	else</div><div class='add'>+		set = 0;</div><div class='add'>+</div><div class='add'>+	gpiod_set_value_cansleep(priv-&gt;termination_gpio, set);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int can_get_termination(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct can_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct device *dev = ndev-&gt;dev.parent;</div><div class='add'>+	struct gpio_desc *gpio;</div><div class='add'>+	u32 term;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Disabling termination by default is the safe choice: Else if many</div><div class='add'>+	 * bus participants enable it, no communication is possible at all.</div><div class='add'>+	 */</div><div class='add'>+	gpio = devm_gpiod_get_optional(dev, "termination", GPIOD_OUT_LOW);</div><div class='add'>+	if (IS_ERR(gpio))</div><div class='add'>+		return dev_err_probe(dev, PTR_ERR(gpio),</div><div class='add'>+				     "Cannot get termination-gpios\n");</div><div class='add'>+</div><div class='add'>+	if (!gpio)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ret = device_property_read_u32(dev, "termination-ohms", &amp;term);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(ndev, "Cannot get termination-ohms: %pe\n",</div><div class='add'>+			   ERR_PTR(ret));</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (term &gt; U16_MAX) {</div><div class='add'>+		netdev_err(ndev, "Invalid termination-ohms value (%u &gt; %u)\n",</div><div class='add'>+			   term, U16_MAX);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;termination_const_cnt = ARRAY_SIZE(priv-&gt;termination_gpio_ohms);</div><div class='add'>+	priv-&gt;termination_const = priv-&gt;termination_gpio_ohms;</div><div class='add'>+	priv-&gt;termination_gpio = gpio;</div><div class='add'>+	priv-&gt;termination_gpio_ohms[CAN_TERMINATION_GPIO_DISABLED] =</div><div class='add'>+		CAN_TERMINATION_DISABLED;</div><div class='add'>+	priv-&gt;termination_gpio_ohms[CAN_TERMINATION_GPIO_ENABLED] = term;</div><div class='add'>+	priv-&gt;do_set_termination = can_set_termination;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool</div><div class='add'>+can_bittiming_const_valid(const struct can_bittiming_const *btc)</div><div class='add'>+{</div><div class='add'>+	if (!btc)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	if (!btc-&gt;sjw_max)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Register the CAN network device */</div><div class='add'>+int register_candev(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct can_priv *priv = netdev_priv(dev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Ensure termination_const, termination_const_cnt and</div><div class='add'>+	 * do_set_termination consistency. All must be either set or</div><div class='add'>+	 * unset.</div><div class='add'>+	 */</div><div class='add'>+	if ((!priv-&gt;termination_const != !priv-&gt;termination_const_cnt) ||</div><div class='add'>+	    (!priv-&gt;termination_const != !priv-&gt;do_set_termination))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;bitrate_const != !priv-&gt;bitrate_const_cnt)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;fd.data_bitrate_const != !priv-&gt;fd.data_bitrate_const_cnt)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* We only support either fixed bit rates or bit timing const. */</div><div class='add'>+	if ((priv-&gt;bitrate_const || priv-&gt;fd.data_bitrate_const) &amp;&amp;</div><div class='add'>+	    (priv-&gt;bittiming_const || priv-&gt;fd.data_bittiming_const))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!can_bittiming_const_valid(priv-&gt;bittiming_const) ||</div><div class='add'>+	    !can_bittiming_const_valid(priv-&gt;fd.data_bittiming_const))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;termination_const) {</div><div class='add'>+		err = can_get_termination(dev);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev-&gt;rtnl_link_ops = &amp;can_link_ops;</div><div class='add'>+	netif_carrier_off(dev);</div><div class='add'>+</div><div class='add'>+	return register_netdev(dev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(register_candev);</div><div class='add'>+</div><div class='add'>+/* Unregister the CAN network device */</div><div class='add'>+void unregister_candev(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	unregister_netdev(dev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(unregister_candev);</div><div class='add'>+</div><div class='add'>+/* Test if a network device is a candev based device</div><div class='add'>+ * and return the can_priv* if so.</div><div class='add'>+ */</div><div class='add'>+struct can_priv *safe_candev_priv(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	if (dev-&gt;type != ARPHRD_CAN || dev-&gt;rtnl_link_ops != &amp;can_link_ops)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	return netdev_priv(dev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(safe_candev_priv);</div><div class='add'>+</div><div class='add'>+static __init int can_dev_init(void)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = can_netlink_register();</div><div class='add'>+	if (!err)</div><div class='add'>+		pr_info("CAN device driver interface\n");</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+module_init(can_dev_init);</div><div class='add'>+</div><div class='add'>+static __exit void can_dev_exit(void)</div><div class='add'>+{</div><div class='add'>+	can_netlink_unregister();</div><div class='add'>+}</div><div class='add'>+module_exit(can_dev_exit);</div><div class='add'>+</div><div class='add'>+MODULE_ALIAS_RTNL_LINK("can");</div><div class='head'>diff --git a/drivers/net/can/dev/length.c b/drivers/net/can/dev/length.c<br/>new file mode 100644<br/>index 000000000000..b7f4d76dd444<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/dev/length.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/dev/length.c</a></div><div class='hunk'>@@ -0,0 +1,84 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Copyright (C) 2012, 2020 Oliver Hartkopp &lt;socketcan@hartkopp.net&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+</div><div class='add'>+/* CAN DLC to real data length conversion helpers */</div><div class='add'>+</div><div class='add'>+static const u8 dlc2len[] = {</div><div class='add'>+	0, 1, 2, 3, 4, 5, 6, 7,</div><div class='add'>+	8, 12, 16, 20, 24, 32, 48, 64</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* get data length from raw data length code (DLC) */</div><div class='add'>+u8 can_fd_dlc2len(u8 dlc)</div><div class='add'>+{</div><div class='add'>+	return dlc2len[dlc &amp; 0x0F];</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(can_fd_dlc2len);</div><div class='add'>+</div><div class='add'>+static const u8 len2dlc[] = {</div><div class='add'>+	0, 1, 2, 3, 4, 5, 6, 7, 8,	/* 0 - 8 */</div><div class='add'>+	9, 9, 9, 9,			/* 9 - 12 */</div><div class='add'>+	10, 10, 10, 10,			/* 13 - 16 */</div><div class='add'>+	11, 11, 11, 11,			/* 17 - 20 */</div><div class='add'>+	12, 12, 12, 12,			/* 21 - 24 */</div><div class='add'>+	13, 13, 13, 13, 13, 13, 13, 13,	/* 25 - 32 */</div><div class='add'>+	14, 14, 14, 14, 14, 14, 14, 14,	/* 33 - 40 */</div><div class='add'>+	14, 14, 14, 14, 14, 14, 14, 14,	/* 41 - 48 */</div><div class='add'>+	15, 15, 15, 15, 15, 15, 15, 15,	/* 49 - 56 */</div><div class='add'>+	15, 15, 15, 15, 15, 15, 15, 15	/* 57 - 64 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* map the sanitized data length to an appropriate data length code */</div><div class='add'>+u8 can_fd_len2dlc(u8 len)</div><div class='add'>+{</div><div class='add'>+	/* check for length mapping table size at build time */</div><div class='add'>+	BUILD_BUG_ON(ARRAY_SIZE(len2dlc) != CANFD_MAX_DLEN + 1);</div><div class='add'>+</div><div class='add'>+	if (unlikely(len &gt; CANFD_MAX_DLEN))</div><div class='add'>+		return CANFD_MAX_DLC;</div><div class='add'>+</div><div class='add'>+	return len2dlc[len];</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(can_fd_len2dlc);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * can_skb_get_frame_len() - Calculate the CAN Frame length in bytes</div><div class='add'>+ * 	of a given skb.</div><div class='add'>+ * @skb: socket buffer of a CAN message.</div><div class='add'>+ *</div><div class='add'>+ * Do a rough calculation: bit stuffing is ignored and length in bits</div><div class='add'>+ * is rounded up to a length in bytes.</div><div class='add'>+ *</div><div class='add'>+ * Rationale: this function is to be used for the BQL functions</div><div class='add'>+ * (netdev_sent_queue() and netdev_completed_queue()) which expect a</div><div class='add'>+ * value in bytes. Just using skb-&gt;len is insufficient because it will</div><div class='add'>+ * return the constant value of CAN(FD)_MTU. Doing the bit stuffing</div><div class='add'>+ * calculation would be too expensive in term of computing resources</div><div class='add'>+ * for no noticeable gain.</div><div class='add'>+ *</div><div class='add'>+ * Remarks: The payload of CAN FD frames with BRS flag are sent at a</div><div class='add'>+ * different bitrate. Currently, the can-utils canbusload tool does</div><div class='add'>+ * not support CAN-FD yet and so we could not run any benchmark to</div><div class='add'>+ * measure the impact. There might be possible improvement here.</div><div class='add'>+ *</div><div class='add'>+ * Return: length in bytes.</div><div class='add'>+ */</div><div class='add'>+unsigned int can_skb_get_frame_len(const struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	const struct canfd_frame *cf = (const struct canfd_frame *)skb-&gt;data;</div><div class='add'>+	u8 len;</div><div class='add'>+</div><div class='add'>+	if (can_is_canfd_skb(skb))</div><div class='add'>+		len = canfd_sanitize_len(cf-&gt;len);</div><div class='add'>+	else if (cf-&gt;can_id &amp; CAN_RTR_FLAG)</div><div class='add'>+		len = 0;</div><div class='add'>+	else</div><div class='add'>+		len = cf-&gt;len;</div><div class='add'>+</div><div class='add'>+	return can_frame_bytes(can_is_canfd_skb(skb), cf-&gt;can_id &amp; CAN_EFF_FLAG,</div><div class='add'>+			       false, len);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(can_skb_get_frame_len);</div><div class='head'>diff --git a/drivers/net/can/dev/netlink.c b/drivers/net/can/dev/netlink.c<br/>new file mode 100644<br/>index 000000000000..d6b0e686fb11<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/dev/netlink.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/dev/netlink.c</a></div><div class='hunk'>@@ -0,0 +1,1111 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Copyright (C) 2005 Marc Kleine-Budde, Pengutronix</div><div class='add'>+ * Copyright (C) 2006 Andrey Volkov, Varma Electronics</div><div class='add'>+ * Copyright (C) 2008-2009 Wolfgang Grandegger &lt;wg@grandegger.com&gt;</div><div class='add'>+ * Copyright (C) 2021-2025 Vincent Mailhol &lt;mailhol@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;net/rtnetlink.h&gt;</div><div class='add'>+</div><div class='add'>+static const struct nla_policy can_policy[IFLA_CAN_MAX + 1] = {</div><div class='add'>+	[IFLA_CAN_STATE] = { .type = NLA_U32 },</div><div class='add'>+	[IFLA_CAN_CTRLMODE] = { .len = sizeof(struct can_ctrlmode) },</div><div class='add'>+	[IFLA_CAN_RESTART_MS] = { .type = NLA_U32 },</div><div class='add'>+	[IFLA_CAN_RESTART] = { .type = NLA_U32 },</div><div class='add'>+	[IFLA_CAN_BITTIMING] = { .len = sizeof(struct can_bittiming) },</div><div class='add'>+	[IFLA_CAN_BITTIMING_CONST] = { .len = sizeof(struct can_bittiming_const) },</div><div class='add'>+	[IFLA_CAN_CLOCK] = { .len = sizeof(struct can_clock) },</div><div class='add'>+	[IFLA_CAN_BERR_COUNTER] = { .len = sizeof(struct can_berr_counter) },</div><div class='add'>+	[IFLA_CAN_DATA_BITTIMING] = { .len = sizeof(struct can_bittiming) },</div><div class='add'>+	[IFLA_CAN_DATA_BITTIMING_CONST] = { .len = sizeof(struct can_bittiming_const) },</div><div class='add'>+	[IFLA_CAN_TERMINATION] = { .type = NLA_U16 },</div><div class='add'>+	[IFLA_CAN_TDC] = { .type = NLA_NESTED },</div><div class='add'>+	[IFLA_CAN_CTRLMODE_EXT] = { .type = NLA_NESTED },</div><div class='add'>+	[IFLA_CAN_XL_DATA_BITTIMING] = { .len = sizeof(struct can_bittiming) },</div><div class='add'>+	[IFLA_CAN_XL_DATA_BITTIMING_CONST] = { .len = sizeof(struct can_bittiming_const) },</div><div class='add'>+	[IFLA_CAN_XL_TDC] = { .type = NLA_NESTED },</div><div class='add'>+	[IFLA_CAN_XL_PWM] = { .type = NLA_NESTED },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct nla_policy can_tdc_policy[IFLA_CAN_TDC_MAX + 1] = {</div><div class='add'>+	[IFLA_CAN_TDC_TDCV_MIN] = { .type = NLA_U32 },</div><div class='add'>+	[IFLA_CAN_TDC_TDCV_MAX] = { .type = NLA_U32 },</div><div class='add'>+	[IFLA_CAN_TDC_TDCO_MIN] = { .type = NLA_U32 },</div><div class='add'>+	[IFLA_CAN_TDC_TDCO_MAX] = { .type = NLA_U32 },</div><div class='add'>+	[IFLA_CAN_TDC_TDCF_MIN] = { .type = NLA_U32 },</div><div class='add'>+	[IFLA_CAN_TDC_TDCF_MAX] = { .type = NLA_U32 },</div><div class='add'>+	[IFLA_CAN_TDC_TDCV] = { .type = NLA_U32 },</div><div class='add'>+	[IFLA_CAN_TDC_TDCO] = { .type = NLA_U32 },</div><div class='add'>+	[IFLA_CAN_TDC_TDCF] = { .type = NLA_U32 },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct nla_policy can_pwm_policy[IFLA_CAN_PWM_MAX + 1] = {</div><div class='add'>+	[IFLA_CAN_PWM_PWMS_MIN] = { .type = NLA_U32 },</div><div class='add'>+	[IFLA_CAN_PWM_PWMS_MAX] = { .type = NLA_U32 },</div><div class='add'>+	[IFLA_CAN_PWM_PWML_MIN] = { .type = NLA_U32 },</div><div class='add'>+	[IFLA_CAN_PWM_PWML_MAX] = { .type = NLA_U32 },</div><div class='add'>+	[IFLA_CAN_PWM_PWMO_MIN] = { .type = NLA_U32 },</div><div class='add'>+	[IFLA_CAN_PWM_PWMO_MAX] = { .type = NLA_U32 },</div><div class='add'>+	[IFLA_CAN_PWM_PWMS] = { .type = NLA_U32 },</div><div class='add'>+	[IFLA_CAN_PWM_PWML] = { .type = NLA_U32 },</div><div class='add'>+	[IFLA_CAN_PWM_PWMO] = { .type = NLA_U32 },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int can_validate_bittiming(struct nlattr *data[],</div><div class='add'>+				  struct netlink_ext_ack *extack,</div><div class='add'>+				  int ifla_can_bittiming)</div><div class='add'>+{</div><div class='add'>+	struct can_bittiming *bt;</div><div class='add'>+</div><div class='add'>+	if (!data[ifla_can_bittiming])</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	static_assert(__alignof__(*bt) &lt;= NLA_ALIGNTO);</div><div class='add'>+	bt = nla_data(data[ifla_can_bittiming]);</div><div class='add'>+</div><div class='add'>+	/* sample point is in one-tenth of a percent */</div><div class='add'>+	if (bt-&gt;sample_point &gt;= 1000) {</div><div class='add'>+		NL_SET_ERR_MSG(extack, "sample point must be between 0 and 100%");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int can_validate_tdc(struct nlattr *data_tdc,</div><div class='add'>+			    struct netlink_ext_ack *extack, u32 tdc_flags)</div><div class='add'>+{</div><div class='add'>+	bool tdc_manual = tdc_flags &amp; CAN_CTRLMODE_TDC_MANUAL_MASK;</div><div class='add'>+	bool tdc_auto = tdc_flags &amp; CAN_CTRLMODE_TDC_AUTO_MASK;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (tdc_auto &amp;&amp; tdc_manual) {</div><div class='add'>+		NL_SET_ERR_MSG(extack,</div><div class='add'>+			       "TDC manual and auto modes are mutually exclusive");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* If one of the CAN_CTRLMODE_{,XL}_TDC_* flags is set then TDC</div><div class='add'>+	 * must be set and vice-versa</div><div class='add'>+	 */</div><div class='add'>+	if ((tdc_auto || tdc_manual) &amp;&amp; !data_tdc) {</div><div class='add'>+		NL_SET_ERR_MSG(extack, "TDC parameters are missing");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+	if (!(tdc_auto || tdc_manual) &amp;&amp; data_tdc) {</div><div class='add'>+		NL_SET_ERR_MSG(extack, "TDC mode (auto or manual) is missing");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* If providing TDC parameters, at least TDCO is needed. TDCV is</div><div class='add'>+	 * needed if and only if CAN_CTRLMODE_{,XL}_TDC_MANUAL is set</div><div class='add'>+	 */</div><div class='add'>+	if (data_tdc) {</div><div class='add'>+		struct nlattr *tb_tdc[IFLA_CAN_TDC_MAX + 1];</div><div class='add'>+</div><div class='add'>+		err = nla_parse_nested(tb_tdc, IFLA_CAN_TDC_MAX,</div><div class='add'>+				       data_tdc, can_tdc_policy, extack);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		if (tb_tdc[IFLA_CAN_TDC_TDCV]) {</div><div class='add'>+			if (tdc_auto) {</div><div class='add'>+				NL_SET_ERR_MSG(extack,</div><div class='add'>+					       "TDCV is incompatible with TDC auto mode");</div><div class='add'>+				return -EOPNOTSUPP;</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			if (tdc_manual) {</div><div class='add'>+				NL_SET_ERR_MSG(extack,</div><div class='add'>+					       "TDC manual mode requires TDCV");</div><div class='add'>+				return -EOPNOTSUPP;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!tb_tdc[IFLA_CAN_TDC_TDCO]) {</div><div class='add'>+			NL_SET_ERR_MSG(extack, "TDCO is missing");</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int can_validate_pwm(struct nlattr *data[],</div><div class='add'>+			    struct netlink_ext_ack *extack, u32 flags)</div><div class='add'>+{</div><div class='add'>+	struct nlattr *tb_pwm[IFLA_CAN_PWM_MAX + 1];</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!data[IFLA_CAN_XL_PWM])</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (!(flags &amp; CAN_CTRLMODE_XL_TMS)) {</div><div class='add'>+		NL_SET_ERR_MSG(extack, "PWM requires TMS");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = nla_parse_nested(tb_pwm, IFLA_CAN_PWM_MAX, data[IFLA_CAN_XL_PWM],</div><div class='add'>+			       can_pwm_policy, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (!tb_pwm[IFLA_CAN_PWM_PWMS] != !tb_pwm[IFLA_CAN_PWM_PWML]) {</div><div class='add'>+		NL_SET_ERR_MSG(extack,</div><div class='add'>+			       "Provide either both PWMS and PWML, or none for automatic calculation");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (tb_pwm[IFLA_CAN_PWM_PWMO] &amp;&amp;</div><div class='add'>+	    (!tb_pwm[IFLA_CAN_PWM_PWMS] || !tb_pwm[IFLA_CAN_PWM_PWML])) {</div><div class='add'>+		NL_SET_ERR_MSG(extack, "PWMO requires both PWMS and PWML");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int can_validate_databittiming(struct nlattr *data[],</div><div class='add'>+				      struct netlink_ext_ack *extack,</div><div class='add'>+				      int ifla_can_data_bittiming, u32 flags)</div><div class='add'>+{</div><div class='add'>+	struct nlattr *data_tdc;</div><div class='add'>+	const char *type;</div><div class='add'>+	u32 tdc_flags;</div><div class='add'>+	bool is_on;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Make sure that valid CAN FD/XL configurations always consist of</div><div class='add'>+	 * - nominal/arbitration bittiming</div><div class='add'>+	 * - data bittiming</div><div class='add'>+	 * - control mode with CAN_CTRLMODE_{FD,XL} set</div><div class='add'>+	 * - TDC parameters are coherent (details in can_validate_tdc())</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	if (ifla_can_data_bittiming == IFLA_CAN_DATA_BITTIMING) {</div><div class='add'>+		data_tdc = data[IFLA_CAN_TDC];</div><div class='add'>+		tdc_flags = flags &amp; CAN_CTRLMODE_FD_TDC_MASK;</div><div class='add'>+		is_on = flags &amp; CAN_CTRLMODE_FD;</div><div class='add'>+		type = "FD";</div><div class='add'>+	} else {</div><div class='add'>+		data_tdc = data[IFLA_CAN_XL_TDC];</div><div class='add'>+		tdc_flags = flags &amp; CAN_CTRLMODE_XL_TDC_MASK;</div><div class='add'>+		is_on = flags &amp; CAN_CTRLMODE_XL;</div><div class='add'>+		type = "XL";</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (is_on) {</div><div class='add'>+		if (!data[IFLA_CAN_BITTIMING] || !data[ifla_can_data_bittiming]) {</div><div class='add'>+			NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+					   "Provide both nominal and %s data bittiming",</div><div class='add'>+					   type);</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		if (data[ifla_can_data_bittiming]) {</div><div class='add'>+			NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+					   "%s data bittiming requires CAN %s",</div><div class='add'>+					   type, type);</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+		if (data_tdc) {</div><div class='add'>+			NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+					   "%s TDC requires CAN %s",</div><div class='add'>+					   type, type);</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = can_validate_bittiming(data, extack, ifla_can_data_bittiming);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = can_validate_tdc(data_tdc, extack, tdc_flags);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int can_validate_xl_flags(struct netlink_ext_ack *extack,</div><div class='add'>+				 u32 masked_flags, u32 mask)</div><div class='add'>+{</div><div class='add'>+	if (masked_flags &amp; CAN_CTRLMODE_XL) {</div><div class='add'>+		if (masked_flags &amp; CAN_CTRLMODE_XL_TMS) {</div><div class='add'>+			const u32 tms_conflicts_mask = CAN_CTRLMODE_FD |</div><div class='add'>+				CAN_CTRLMODE_XL_TDC_MASK;</div><div class='add'>+			u32 tms_conflicts = masked_flags &amp; tms_conflicts_mask;</div><div class='add'>+</div><div class='add'>+			if (tms_conflicts) {</div><div class='add'>+				NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+						   "TMS and %s are mutually exclusive",</div><div class='add'>+						   can_get_ctrlmode_str(tms_conflicts));</div><div class='add'>+				return -EOPNOTSUPP;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		if (mask &amp; CAN_CTRLMODE_XL_TMS) {</div><div class='add'>+			NL_SET_ERR_MSG(extack, "TMS requires CAN XL");</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int can_validate(struct nlattr *tb[], struct nlattr *data[],</div><div class='add'>+			struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	u32 flags = 0;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!data)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (data[IFLA_CAN_CTRLMODE]) {</div><div class='add'>+		struct can_ctrlmode *cm = nla_data(data[IFLA_CAN_CTRLMODE]);</div><div class='add'>+</div><div class='add'>+		flags = cm-&gt;flags &amp; cm-&gt;mask;</div><div class='add'>+</div><div class='add'>+		if ((flags &amp; CAN_CTRLMODE_LISTENONLY) &amp;&amp;</div><div class='add'>+		    (flags &amp; CAN_CTRLMODE_RESTRICTED)) {</div><div class='add'>+			NL_SET_ERR_MSG(extack,</div><div class='add'>+				       "LISTEN-ONLY and RESTRICTED modes are mutually exclusive");</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = can_validate_xl_flags(extack, flags, cm-&gt;mask);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = can_validate_bittiming(data, extack, IFLA_CAN_BITTIMING);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = can_validate_databittiming(data, extack,</div><div class='add'>+					 IFLA_CAN_DATA_BITTIMING, flags);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = can_validate_databittiming(data, extack,</div><div class='add'>+					 IFLA_CAN_XL_DATA_BITTIMING, flags);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = can_validate_pwm(data, extack, flags);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int can_ctrlmode_changelink(struct net_device *dev,</div><div class='add'>+				   struct nlattr *data[],</div><div class='add'>+				   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct can_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct can_ctrlmode *cm;</div><div class='add'>+	u32 ctrlstatic, maskedflags, deactivated, notsupp, ctrlstatic_missing;</div><div class='add'>+</div><div class='add'>+	if (!data[IFLA_CAN_CTRLMODE])</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Do not allow changing controller mode while running */</div><div class='add'>+	if (dev-&gt;flags &amp; IFF_UP)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	cm = nla_data(data[IFLA_CAN_CTRLMODE]);</div><div class='add'>+	ctrlstatic = can_get_static_ctrlmode(priv);</div><div class='add'>+	maskedflags = cm-&gt;flags &amp; cm-&gt;mask;</div><div class='add'>+	deactivated = ~cm-&gt;flags &amp; cm-&gt;mask;</div><div class='add'>+	notsupp = maskedflags &amp; ~(priv-&gt;ctrlmode_supported | ctrlstatic);</div><div class='add'>+	ctrlstatic_missing = (maskedflags &amp; ctrlstatic) ^ ctrlstatic;</div><div class='add'>+</div><div class='add'>+	if (notsupp) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+				   "requested control mode %s not supported",</div><div class='add'>+				   can_get_ctrlmode_str(notsupp));</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* do not check for static fd-non-iso if 'fd' is disabled */</div><div class='add'>+	if (!(maskedflags &amp; CAN_CTRLMODE_FD))</div><div class='add'>+		ctrlstatic &amp;= ~CAN_CTRLMODE_FD_NON_ISO;</div><div class='add'>+</div><div class='add'>+	if (ctrlstatic_missing) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+				   "missing required %s static control mode",</div><div class='add'>+				   can_get_ctrlmode_str(ctrlstatic_missing));</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* If FD was active and is not turned off, check for XL conflicts */</div><div class='add'>+	if (priv-&gt;ctrlmode &amp; CAN_CTRLMODE_FD &amp; ~deactivated) {</div><div class='add'>+		if (maskedflags &amp; CAN_CTRLMODE_XL_TMS) {</div><div class='add'>+			NL_SET_ERR_MSG(extack,</div><div class='add'>+				       "TMS can not be activated while CAN FD is on");</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* If a top dependency flag is provided, reset all its dependencies */</div><div class='add'>+	if (cm-&gt;mask &amp; CAN_CTRLMODE_FD)</div><div class='add'>+		priv-&gt;ctrlmode &amp;= ~CAN_CTRLMODE_FD_TDC_MASK;</div><div class='add'>+	if (cm-&gt;mask &amp; CAN_CTRLMODE_XL)</div><div class='add'>+		priv-&gt;ctrlmode &amp;= ~(CAN_CTRLMODE_XL_TDC_MASK |</div><div class='add'>+				    CAN_CTRLMODE_XL_TMS);</div><div class='add'>+</div><div class='add'>+	/* clear bits to be modified and copy the flag values */</div><div class='add'>+	priv-&gt;ctrlmode &amp;= ~cm-&gt;mask;</div><div class='add'>+	priv-&gt;ctrlmode |= maskedflags;</div><div class='add'>+</div><div class='add'>+	/* Wipe potential leftovers from previous CAN FD/XL config */</div><div class='add'>+	if (!(priv-&gt;ctrlmode &amp; CAN_CTRLMODE_FD)) {</div><div class='add'>+		memset(&amp;priv-&gt;fd.data_bittiming, 0,</div><div class='add'>+		       sizeof(priv-&gt;fd.data_bittiming));</div><div class='add'>+		priv-&gt;ctrlmode &amp;= ~CAN_CTRLMODE_FD_TDC_MASK;</div><div class='add'>+		memset(&amp;priv-&gt;fd.tdc, 0, sizeof(priv-&gt;fd.tdc));</div><div class='add'>+	}</div><div class='add'>+	if (!(priv-&gt;ctrlmode &amp; CAN_CTRLMODE_XL)) {</div><div class='add'>+		memset(&amp;priv-&gt;xl.data_bittiming, 0,</div><div class='add'>+		       sizeof(priv-&gt;fd.data_bittiming));</div><div class='add'>+		priv-&gt;ctrlmode &amp;= ~CAN_CTRLMODE_XL_TDC_MASK;</div><div class='add'>+		memset(&amp;priv-&gt;xl.tdc, 0, sizeof(priv-&gt;xl.tdc));</div><div class='add'>+		memset(&amp;priv-&gt;xl.pwm, 0, sizeof(priv-&gt;xl.pwm));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	can_set_default_mtu(dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int can_tdc_changelink(struct data_bittiming_params *dbt_params,</div><div class='add'>+			      const struct nlattr *nla,</div><div class='add'>+			      struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct nlattr *tb_tdc[IFLA_CAN_TDC_MAX + 1];</div><div class='add'>+	struct can_tdc tdc = { 0 };</div><div class='add'>+	const struct can_tdc_const *tdc_const = dbt_params-&gt;tdc_const;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!tdc_const) {</div><div class='add'>+		NL_SET_ERR_MSG(extack, "The device does not support TDC");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = nla_parse_nested(tb_tdc, IFLA_CAN_TDC_MAX, nla,</div><div class='add'>+			       can_tdc_policy, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (tb_tdc[IFLA_CAN_TDC_TDCV]) {</div><div class='add'>+		u32 tdcv = nla_get_u32(tb_tdc[IFLA_CAN_TDC_TDCV]);</div><div class='add'>+</div><div class='add'>+		if (tdcv &lt; tdc_const-&gt;tdcv_min || tdcv &gt; tdc_const-&gt;tdcv_max)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		tdc.tdcv = tdcv;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (tb_tdc[IFLA_CAN_TDC_TDCO]) {</div><div class='add'>+		u32 tdco = nla_get_u32(tb_tdc[IFLA_CAN_TDC_TDCO]);</div><div class='add'>+</div><div class='add'>+		if (tdco &lt; tdc_const-&gt;tdco_min || tdco &gt; tdc_const-&gt;tdco_max)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		tdc.tdco = tdco;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (tb_tdc[IFLA_CAN_TDC_TDCF]) {</div><div class='add'>+		u32 tdcf = nla_get_u32(tb_tdc[IFLA_CAN_TDC_TDCF]);</div><div class='add'>+</div><div class='add'>+		if (tdcf &lt; tdc_const-&gt;tdcf_min || tdcf &gt; tdc_const-&gt;tdcf_max)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		tdc.tdcf = tdcf;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dbt_params-&gt;tdc = tdc;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int can_dbt_changelink(struct net_device *dev, struct nlattr *data[],</div><div class='add'>+			      bool fd, struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct nlattr *data_bittiming, *data_tdc;</div><div class='add'>+	struct can_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct data_bittiming_params *dbt_params;</div><div class='add'>+	struct can_bittiming dbt;</div><div class='add'>+	bool need_tdc_calc = false;</div><div class='add'>+	u32 tdc_mask;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (fd) {</div><div class='add'>+		data_bittiming = data[IFLA_CAN_DATA_BITTIMING];</div><div class='add'>+		data_tdc = data[IFLA_CAN_TDC];</div><div class='add'>+		dbt_params = &amp;priv-&gt;fd;</div><div class='add'>+		tdc_mask = CAN_CTRLMODE_FD_TDC_MASK;</div><div class='add'>+	} else {</div><div class='add'>+		data_bittiming = data[IFLA_CAN_XL_DATA_BITTIMING];</div><div class='add'>+		data_tdc = data[IFLA_CAN_XL_TDC];</div><div class='add'>+		dbt_params = &amp;priv-&gt;xl;</div><div class='add'>+		tdc_mask = CAN_CTRLMODE_XL_TDC_MASK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!data_bittiming)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Do not allow changing bittiming while running */</div><div class='add'>+	if (dev-&gt;flags &amp; IFF_UP)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	/* Calculate bittiming parameters based on data_bittiming_const</div><div class='add'>+	 * if set, otherwise pass bitrate directly via do_set_bitrate().</div><div class='add'>+	 * Bail out if neither is given.</div><div class='add'>+	 */</div><div class='add'>+	if (!dbt_params-&gt;data_bittiming_const &amp;&amp; !dbt_params-&gt;do_set_data_bittiming &amp;&amp;</div><div class='add'>+	    !dbt_params-&gt;data_bitrate_const)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;dbt, nla_data(data_bittiming), sizeof(dbt));</div><div class='add'>+	err = can_get_bittiming(dev, &amp;dbt, dbt_params-&gt;data_bittiming_const,</div><div class='add'>+				dbt_params-&gt;data_bitrate_const,</div><div class='add'>+				dbt_params-&gt;data_bitrate_const_cnt, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;bitrate_max &amp;&amp; dbt.bitrate &gt; priv-&gt;bitrate_max) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+				   "CAN data bitrate %u bps surpasses transceiver capabilities of %u bps",</div><div class='add'>+				   dbt.bitrate, priv-&gt;bitrate_max);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memset(&amp;dbt_params-&gt;tdc, 0, sizeof(dbt_params-&gt;tdc));</div><div class='add'>+	if (data[IFLA_CAN_CTRLMODE]) {</div><div class='add'>+		struct can_ctrlmode *cm = nla_data(data[IFLA_CAN_CTRLMODE]);</div><div class='add'>+</div><div class='add'>+		if (fd || !(priv-&gt;ctrlmode &amp; CAN_CTRLMODE_XL_TMS))</div><div class='add'>+			need_tdc_calc = !(cm-&gt;mask &amp; tdc_mask);</div><div class='add'>+	}</div><div class='add'>+	if (data_tdc) {</div><div class='add'>+		/* TDC parameters are provided: use them */</div><div class='add'>+		err = can_tdc_changelink(dbt_params, data_tdc, extack);</div><div class='add'>+		if (err) {</div><div class='add'>+			priv-&gt;ctrlmode &amp;= ~tdc_mask;</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+	} else if (need_tdc_calc) {</div><div class='add'>+		/* Neither of TDC parameters nor TDC flags are provided:</div><div class='add'>+		 * do calculation</div><div class='add'>+		 */</div><div class='add'>+		can_calc_tdco(&amp;dbt_params-&gt;tdc, dbt_params-&gt;tdc_const, &amp;dbt,</div><div class='add'>+			      tdc_mask, &amp;priv-&gt;ctrlmode, priv-&gt;ctrlmode_supported);</div><div class='add'>+	} /* else: both CAN_CTRLMODE_{,XL}_TDC_{AUTO,MANUAL} are explicitly</div><div class='add'>+	   * turned off. TDC is disabled: do nothing</div><div class='add'>+	   */</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;dbt_params-&gt;data_bittiming, &amp;dbt, sizeof(dbt));</div><div class='add'>+</div><div class='add'>+	if (dbt_params-&gt;do_set_data_bittiming) {</div><div class='add'>+		/* Finally, set the bit-timing registers */</div><div class='add'>+		err = dbt_params-&gt;do_set_data_bittiming(dev);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int can_pwm_changelink(struct net_device *dev,</div><div class='add'>+			      const struct nlattr *pwm_nla,</div><div class='add'>+			      struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct can_priv *priv = netdev_priv(dev);</div><div class='add'>+	const struct can_pwm_const *pwm_const = priv-&gt;xl.pwm_const;</div><div class='add'>+	struct nlattr *tb_pwm[IFLA_CAN_PWM_MAX + 1];</div><div class='add'>+	struct can_pwm pwm = { 0 };</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!(priv-&gt;ctrlmode &amp; CAN_CTRLMODE_XL_TMS))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (!pwm_const) {</div><div class='add'>+		NL_SET_ERR_MSG(extack, "The device does not support PWM");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!pwm_nla)</div><div class='add'>+		return can_calc_pwm(dev, extack);</div><div class='add'>+</div><div class='add'>+	err = nla_parse_nested(tb_pwm, IFLA_CAN_PWM_MAX, pwm_nla,</div><div class='add'>+			       can_pwm_policy, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (tb_pwm[IFLA_CAN_PWM_PWMS]) {</div><div class='add'>+		pwm.pwms = nla_get_u32(tb_pwm[IFLA_CAN_PWM_PWMS]);</div><div class='add'>+		if (pwm.pwms &lt; pwm_const-&gt;pwms_min ||</div><div class='add'>+		    pwm.pwms &gt; pwm_const-&gt;pwms_max) {</div><div class='add'>+			NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+					   "PWMS: %u tqmin is out of range: %u...%u",</div><div class='add'>+					   pwm.pwms, pwm_const-&gt;pwms_min,</div><div class='add'>+					   pwm_const-&gt;pwms_max);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (tb_pwm[IFLA_CAN_PWM_PWML]) {</div><div class='add'>+		pwm.pwml = nla_get_u32(tb_pwm[IFLA_CAN_PWM_PWML]);</div><div class='add'>+		if (pwm.pwml &lt; pwm_const-&gt;pwml_min ||</div><div class='add'>+		    pwm.pwml &gt; pwm_const-&gt;pwml_max) {</div><div class='add'>+			NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+					   "PWML: %u tqmin is out of range: %u...%u",</div><div class='add'>+					   pwm.pwml, pwm_const-&gt;pwml_min,</div><div class='add'>+					   pwm_const-&gt;pwml_max);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (tb_pwm[IFLA_CAN_PWM_PWMO]) {</div><div class='add'>+		pwm.pwmo = nla_get_u32(tb_pwm[IFLA_CAN_PWM_PWMO]);</div><div class='add'>+		if (pwm.pwmo &lt; pwm_const-&gt;pwmo_min ||</div><div class='add'>+		    pwm.pwmo &gt; pwm_const-&gt;pwmo_max) {</div><div class='add'>+			NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+					   "PWMO: %u tqmin is out of range: %u...%u",</div><div class='add'>+					   pwm.pwmo, pwm_const-&gt;pwmo_min,</div><div class='add'>+					   pwm_const-&gt;pwmo_max);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = can_validate_pwm_bittiming(dev, &amp;pwm, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	priv-&gt;xl.pwm = pwm;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int can_changelink(struct net_device *dev, struct nlattr *tb[],</div><div class='add'>+			  struct nlattr *data[],</div><div class='add'>+			  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct can_priv *priv = netdev_priv(dev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* We need synchronization with dev-&gt;stop() */</div><div class='add'>+	ASSERT_RTNL();</div><div class='add'>+</div><div class='add'>+	can_ctrlmode_changelink(dev, data, extack);</div><div class='add'>+</div><div class='add'>+	if (data[IFLA_CAN_BITTIMING]) {</div><div class='add'>+		struct can_bittiming bt;</div><div class='add'>+</div><div class='add'>+		/* Do not allow changing bittiming while running */</div><div class='add'>+		if (dev-&gt;flags &amp; IFF_UP)</div><div class='add'>+			return -EBUSY;</div><div class='add'>+</div><div class='add'>+		/* Calculate bittiming parameters based on</div><div class='add'>+		 * bittiming_const if set, otherwise pass bitrate</div><div class='add'>+		 * directly via do_set_bitrate(). Bail out if neither</div><div class='add'>+		 * is given.</div><div class='add'>+		 */</div><div class='add'>+		if (!priv-&gt;bittiming_const &amp;&amp; !priv-&gt;do_set_bittiming &amp;&amp;</div><div class='add'>+		    !priv-&gt;bitrate_const)</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+		memcpy(&amp;bt, nla_data(data[IFLA_CAN_BITTIMING]), sizeof(bt));</div><div class='add'>+		err = can_get_bittiming(dev, &amp;bt,</div><div class='add'>+					priv-&gt;bittiming_const,</div><div class='add'>+					priv-&gt;bitrate_const,</div><div class='add'>+					priv-&gt;bitrate_const_cnt,</div><div class='add'>+					extack);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		if (priv-&gt;bitrate_max &amp;&amp; bt.bitrate &gt; priv-&gt;bitrate_max) {</div><div class='add'>+			NL_SET_ERR_MSG_FMT(extack,</div><div class='add'>+					   "arbitration bitrate %u bps surpasses transceiver capabilities of %u bps",</div><div class='add'>+					   bt.bitrate, priv-&gt;bitrate_max);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		memcpy(&amp;priv-&gt;bittiming, &amp;bt, sizeof(bt));</div><div class='add'>+</div><div class='add'>+		if (priv-&gt;do_set_bittiming) {</div><div class='add'>+			/* Finally, set the bit-timing registers */</div><div class='add'>+			err = priv-&gt;do_set_bittiming(dev);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (data[IFLA_CAN_RESTART_MS]) {</div><div class='add'>+		unsigned int restart_ms = nla_get_u32(data[IFLA_CAN_RESTART_MS]);</div><div class='add'>+</div><div class='add'>+		if (restart_ms != 0 &amp;&amp; !priv-&gt;do_set_mode) {</div><div class='add'>+			NL_SET_ERR_MSG(extack,</div><div class='add'>+				       "Device doesn't support restart from Bus Off");</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Do not allow changing restart delay while running */</div><div class='add'>+		if (dev-&gt;flags &amp; IFF_UP)</div><div class='add'>+			return -EBUSY;</div><div class='add'>+		priv-&gt;restart_ms = restart_ms;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (data[IFLA_CAN_RESTART]) {</div><div class='add'>+		if (!priv-&gt;do_set_mode) {</div><div class='add'>+			NL_SET_ERR_MSG(extack,</div><div class='add'>+				       "Device doesn't support restart from Bus Off");</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Do not allow a restart while not running */</div><div class='add'>+		if (!(dev-&gt;flags &amp; IFF_UP))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		err = can_restart_now(dev);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* CAN FD */</div><div class='add'>+	err = can_dbt_changelink(dev, data, true, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* CAN XL */</div><div class='add'>+	err = can_dbt_changelink(dev, data, false, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+	err = can_pwm_changelink(dev, data[IFLA_CAN_XL_PWM], extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (data[IFLA_CAN_TERMINATION]) {</div><div class='add'>+		const u16 termval = nla_get_u16(data[IFLA_CAN_TERMINATION]);</div><div class='add'>+		const unsigned int num_term = priv-&gt;termination_const_cnt;</div><div class='add'>+		unsigned int i;</div><div class='add'>+</div><div class='add'>+		if (!priv-&gt;do_set_termination) {</div><div class='add'>+			NL_SET_ERR_MSG(extack,</div><div class='add'>+				       "Termination is not configurable on this device");</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* check whether given value is supported by the interface */</div><div class='add'>+		for (i = 0; i &lt; num_term; i++) {</div><div class='add'>+			if (termval == priv-&gt;termination_const[i])</div><div class='add'>+				break;</div><div class='add'>+		}</div><div class='add'>+		if (i &gt;= num_term)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		/* Finally, set the termination value */</div><div class='add'>+		err = priv-&gt;do_set_termination(dev, termval);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		priv-&gt;termination = termval;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t can_tdc_get_size(struct data_bittiming_params *dbt_params,</div><div class='add'>+			       u32 tdc_flags)</div><div class='add'>+{</div><div class='add'>+	bool tdc_manual = tdc_flags &amp; CAN_CTRLMODE_TDC_MANUAL_MASK;</div><div class='add'>+	size_t size;</div><div class='add'>+</div><div class='add'>+	if (!dbt_params-&gt;tdc_const)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	size = nla_total_size(0);			/* nest IFLA_CAN_TDC */</div><div class='add'>+	if (tdc_manual) {</div><div class='add'>+		size += nla_total_size(sizeof(u32));	/* IFLA_CAN_TDCV_MIN */</div><div class='add'>+		size += nla_total_size(sizeof(u32));	/* IFLA_CAN_TDCV_MAX */</div><div class='add'>+	}</div><div class='add'>+	size += nla_total_size(sizeof(u32));		/* IFLA_CAN_TDCO_MIN */</div><div class='add'>+	size += nla_total_size(sizeof(u32));		/* IFLA_CAN_TDCO_MAX */</div><div class='add'>+	if (dbt_params-&gt;tdc_const-&gt;tdcf_max) {</div><div class='add'>+		size += nla_total_size(sizeof(u32));	/* IFLA_CAN_TDCF_MIN */</div><div class='add'>+		size += nla_total_size(sizeof(u32));	/* IFLA_CAN_TDCF_MAX */</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (tdc_flags) {</div><div class='add'>+		if (tdc_manual || dbt_params-&gt;do_get_auto_tdcv)</div><div class='add'>+			size += nla_total_size(sizeof(u32));	/* IFLA_CAN_TDCV */</div><div class='add'>+		size += nla_total_size(sizeof(u32));		/* IFLA_CAN_TDCO */</div><div class='add'>+		if (dbt_params-&gt;tdc_const-&gt;tdcf_max)</div><div class='add'>+			size += nla_total_size(sizeof(u32));	/* IFLA_CAN_TDCF */</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t can_data_bittiming_get_size(struct data_bittiming_params *dbt_params,</div><div class='add'>+					  u32 tdc_flags)</div><div class='add'>+{</div><div class='add'>+	size_t size = 0;</div><div class='add'>+</div><div class='add'>+	if (dbt_params-&gt;data_bittiming.bitrate)		/* IFLA_CAN_{,XL}_DATA_BITTIMING */</div><div class='add'>+		size += nla_total_size(sizeof(dbt_params-&gt;data_bittiming));</div><div class='add'>+	if (dbt_params-&gt;data_bittiming_const)		/* IFLA_CAN_{,XL}_DATA_BITTIMING_CONST */</div><div class='add'>+		size += nla_total_size(sizeof(*dbt_params-&gt;data_bittiming_const));</div><div class='add'>+	if (dbt_params-&gt;data_bitrate_const)		/* IFLA_CAN_{,XL}_DATA_BITRATE_CONST */</div><div class='add'>+		size += nla_total_size(sizeof(*dbt_params-&gt;data_bitrate_const) *</div><div class='add'>+				       dbt_params-&gt;data_bitrate_const_cnt);</div><div class='add'>+	size += can_tdc_get_size(dbt_params, tdc_flags);/* IFLA_CAN_{,XL}_TDC */</div><div class='add'>+</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t can_ctrlmode_ext_get_size(void)</div><div class='add'>+{</div><div class='add'>+	return nla_total_size(0) +		/* nest IFLA_CAN_CTRLMODE_EXT */</div><div class='add'>+		nla_total_size(sizeof(u32));	/* IFLA_CAN_CTRLMODE_SUPPORTED */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t can_pwm_get_size(const struct can_pwm_const *pwm_const,</div><div class='add'>+			       bool pwm_on)</div><div class='add'>+{</div><div class='add'>+	size_t size;</div><div class='add'>+</div><div class='add'>+	if (!pwm_const || !pwm_on)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	size = nla_total_size(0);			/* nest IFLA_CAN_PWM */</div><div class='add'>+</div><div class='add'>+	size += nla_total_size(sizeof(u32));		/* IFLA_CAN_PWM_PWMS_MIN */</div><div class='add'>+	size += nla_total_size(sizeof(u32));		/* IFLA_CAN_PWM_PWMS_MAX */</div><div class='add'>+	size += nla_total_size(sizeof(u32));		/* IFLA_CAN_PWM_PWML_MIN */</div><div class='add'>+	size += nla_total_size(sizeof(u32));		/* IFLA_CAN_PWM_PWML_MAX */</div><div class='add'>+	size += nla_total_size(sizeof(u32));		/* IFLA_CAN_PWM_PWMO_MIN */</div><div class='add'>+	size += nla_total_size(sizeof(u32));		/* IFLA_CAN_PWM_PWMO_MAX */</div><div class='add'>+</div><div class='add'>+	size += nla_total_size(sizeof(u32));		/* IFLA_CAN_PWM_PWMS */</div><div class='add'>+	size += nla_total_size(sizeof(u32));		/* IFLA_CAN_PWM_PWML */</div><div class='add'>+	size += nla_total_size(sizeof(u32));		/* IFLA_CAN_PWM_PWMO */</div><div class='add'>+</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t can_get_size(const struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct can_priv *priv = netdev_priv(dev);</div><div class='add'>+	size_t size = 0;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;bittiming.bitrate)				/* IFLA_CAN_BITTIMING */</div><div class='add'>+		size += nla_total_size(sizeof(struct can_bittiming));</div><div class='add'>+	if (priv-&gt;bittiming_const)				/* IFLA_CAN_BITTIMING_CONST */</div><div class='add'>+		size += nla_total_size(sizeof(struct can_bittiming_const));</div><div class='add'>+	size += nla_total_size(sizeof(struct can_clock));	/* IFLA_CAN_CLOCK */</div><div class='add'>+	size += nla_total_size(sizeof(u32));			/* IFLA_CAN_STATE */</div><div class='add'>+	size += nla_total_size(sizeof(struct can_ctrlmode));	/* IFLA_CAN_CTRLMODE */</div><div class='add'>+	size += nla_total_size(sizeof(u32));			/* IFLA_CAN_RESTART_MS */</div><div class='add'>+	if (priv-&gt;do_get_berr_counter)				/* IFLA_CAN_BERR_COUNTER */</div><div class='add'>+		size += nla_total_size(sizeof(struct can_berr_counter));</div><div class='add'>+	if (priv-&gt;termination_const) {</div><div class='add'>+		size += nla_total_size(sizeof(priv-&gt;termination));		/* IFLA_CAN_TERMINATION */</div><div class='add'>+		size += nla_total_size(sizeof(*priv-&gt;termination_const) *	/* IFLA_CAN_TERMINATION_CONST */</div><div class='add'>+				       priv-&gt;termination_const_cnt);</div><div class='add'>+	}</div><div class='add'>+	if (priv-&gt;bitrate_const)				/* IFLA_CAN_BITRATE_CONST */</div><div class='add'>+		size += nla_total_size(sizeof(*priv-&gt;bitrate_const) *</div><div class='add'>+				       priv-&gt;bitrate_const_cnt);</div><div class='add'>+	size += sizeof(priv-&gt;bitrate_max);			/* IFLA_CAN_BITRATE_MAX */</div><div class='add'>+	size += can_ctrlmode_ext_get_size();			/* IFLA_CAN_CTRLMODE_EXT */</div><div class='add'>+</div><div class='add'>+	size += can_data_bittiming_get_size(&amp;priv-&gt;fd,</div><div class='add'>+					    priv-&gt;ctrlmode &amp; CAN_CTRLMODE_FD_TDC_MASK);</div><div class='add'>+</div><div class='add'>+	size += can_data_bittiming_get_size(&amp;priv-&gt;xl,</div><div class='add'>+					    priv-&gt;ctrlmode &amp; CAN_CTRLMODE_XL_TDC_MASK);</div><div class='add'>+	size += can_pwm_get_size(priv-&gt;xl.pwm_const,		/* IFLA_CAN_XL_PWM */</div><div class='add'>+				 priv-&gt;ctrlmode &amp; CAN_CTRLMODE_XL_TMS);</div><div class='add'>+</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int can_bittiming_fill_info(struct sk_buff *skb, int ifla_can_bittiming,</div><div class='add'>+				   struct can_bittiming *bittiming)</div><div class='add'>+{</div><div class='add'>+	return bittiming-&gt;bitrate != CAN_BITRATE_UNSET &amp;&amp;</div><div class='add'>+		bittiming-&gt;bitrate != CAN_BITRATE_UNKNOWN &amp;&amp;</div><div class='add'>+		nla_put(skb, ifla_can_bittiming, sizeof(*bittiming), bittiming);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int can_bittiming_const_fill_info(struct sk_buff *skb,</div><div class='add'>+					 int ifla_can_bittiming_const,</div><div class='add'>+					 const struct can_bittiming_const *bittiming_const)</div><div class='add'>+{</div><div class='add'>+	return bittiming_const &amp;&amp;</div><div class='add'>+		nla_put(skb, ifla_can_bittiming_const,</div><div class='add'>+			sizeof(*bittiming_const), bittiming_const);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int can_bitrate_const_fill_info(struct sk_buff *skb,</div><div class='add'>+				       int ifla_can_bitrate_const,</div><div class='add'>+				       const u32 *bitrate_const, unsigned int cnt)</div><div class='add'>+{</div><div class='add'>+	return bitrate_const &amp;&amp;</div><div class='add'>+		nla_put(skb, ifla_can_bitrate_const,</div><div class='add'>+			sizeof(*bitrate_const) * cnt, bitrate_const);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int can_tdc_fill_info(struct sk_buff *skb, const struct net_device *dev,</div><div class='add'>+			     int ifla_can_tdc)</div><div class='add'>+{</div><div class='add'>+	struct can_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct data_bittiming_params *dbt_params;</div><div class='add'>+	const struct can_tdc_const *tdc_const;</div><div class='add'>+	struct can_tdc *tdc;</div><div class='add'>+	struct nlattr *nest;</div><div class='add'>+	bool tdc_is_enabled, tdc_manual;</div><div class='add'>+</div><div class='add'>+	if (ifla_can_tdc == IFLA_CAN_TDC) {</div><div class='add'>+		dbt_params = &amp;priv-&gt;fd;</div><div class='add'>+		tdc_is_enabled = can_fd_tdc_is_enabled(priv);</div><div class='add'>+		tdc_manual = priv-&gt;ctrlmode &amp; CAN_CTRLMODE_TDC_MANUAL;</div><div class='add'>+	} else {</div><div class='add'>+		dbt_params = &amp;priv-&gt;xl;</div><div class='add'>+		tdc_is_enabled = can_xl_tdc_is_enabled(priv);</div><div class='add'>+		tdc_manual = priv-&gt;ctrlmode &amp; CAN_CTRLMODE_XL_TDC_MANUAL;</div><div class='add'>+	}</div><div class='add'>+	tdc_const = dbt_params-&gt;tdc_const;</div><div class='add'>+	tdc = &amp;dbt_params-&gt;tdc;</div><div class='add'>+</div><div class='add'>+	if (!tdc_const)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	nest = nla_nest_start(skb, ifla_can_tdc);</div><div class='add'>+	if (!nest)</div><div class='add'>+		return -EMSGSIZE;</div><div class='add'>+</div><div class='add'>+	if (tdc_manual &amp;&amp;</div><div class='add'>+	    (nla_put_u32(skb, IFLA_CAN_TDC_TDCV_MIN, tdc_const-&gt;tdcv_min) ||</div><div class='add'>+	     nla_put_u32(skb, IFLA_CAN_TDC_TDCV_MAX, tdc_const-&gt;tdcv_max)))</div><div class='add'>+		goto err_cancel;</div><div class='add'>+	if (nla_put_u32(skb, IFLA_CAN_TDC_TDCO_MIN, tdc_const-&gt;tdco_min) ||</div><div class='add'>+	    nla_put_u32(skb, IFLA_CAN_TDC_TDCO_MAX, tdc_const-&gt;tdco_max))</div><div class='add'>+		goto err_cancel;</div><div class='add'>+	if (tdc_const-&gt;tdcf_max &amp;&amp;</div><div class='add'>+	    (nla_put_u32(skb, IFLA_CAN_TDC_TDCF_MIN, tdc_const-&gt;tdcf_min) ||</div><div class='add'>+	     nla_put_u32(skb, IFLA_CAN_TDC_TDCF_MAX, tdc_const-&gt;tdcf_max)))</div><div class='add'>+		goto err_cancel;</div><div class='add'>+</div><div class='add'>+	if (tdc_is_enabled) {</div><div class='add'>+		u32 tdcv;</div><div class='add'>+		int err = -EINVAL;</div><div class='add'>+</div><div class='add'>+		if (tdc_manual) {</div><div class='add'>+			tdcv = tdc-&gt;tdcv;</div><div class='add'>+			err = 0;</div><div class='add'>+		} else if (dbt_params-&gt;do_get_auto_tdcv) {</div><div class='add'>+			err = dbt_params-&gt;do_get_auto_tdcv(dev, &amp;tdcv);</div><div class='add'>+		}</div><div class='add'>+		if (!err &amp;&amp; nla_put_u32(skb, IFLA_CAN_TDC_TDCV, tdcv))</div><div class='add'>+			goto err_cancel;</div><div class='add'>+		if (nla_put_u32(skb, IFLA_CAN_TDC_TDCO, tdc-&gt;tdco))</div><div class='add'>+			goto err_cancel;</div><div class='add'>+		if (tdc_const-&gt;tdcf_max &amp;&amp;</div><div class='add'>+		    nla_put_u32(skb, IFLA_CAN_TDC_TDCF, tdc-&gt;tdcf))</div><div class='add'>+			goto err_cancel;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nla_nest_end(skb, nest);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_cancel:</div><div class='add'>+	nla_nest_cancel(skb, nest);</div><div class='add'>+	return -EMSGSIZE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int can_pwm_fill_info(struct sk_buff *skb, const struct can_priv *priv)</div><div class='add'>+{</div><div class='add'>+	const struct can_pwm_const *pwm_const = priv-&gt;xl.pwm_const;</div><div class='add'>+	const struct can_pwm *pwm = &amp;priv-&gt;xl.pwm;</div><div class='add'>+	struct nlattr *nest;</div><div class='add'>+</div><div class='add'>+	if (!pwm_const)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	nest = nla_nest_start(skb, IFLA_CAN_XL_PWM);</div><div class='add'>+	if (!nest)</div><div class='add'>+		return -EMSGSIZE;</div><div class='add'>+</div><div class='add'>+	if (nla_put_u32(skb, IFLA_CAN_PWM_PWMS_MIN, pwm_const-&gt;pwms_min) ||</div><div class='add'>+	    nla_put_u32(skb, IFLA_CAN_PWM_PWMS_MAX, pwm_const-&gt;pwms_max) ||</div><div class='add'>+	    nla_put_u32(skb, IFLA_CAN_PWM_PWML_MIN, pwm_const-&gt;pwml_min) ||</div><div class='add'>+	    nla_put_u32(skb, IFLA_CAN_PWM_PWML_MAX, pwm_const-&gt;pwml_max) ||</div><div class='add'>+	    nla_put_u32(skb, IFLA_CAN_PWM_PWMO_MIN, pwm_const-&gt;pwmo_min) ||</div><div class='add'>+	    nla_put_u32(skb, IFLA_CAN_PWM_PWMO_MAX, pwm_const-&gt;pwmo_max))</div><div class='add'>+		goto err_cancel;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;ctrlmode &amp; CAN_CTRLMODE_XL_TMS) {</div><div class='add'>+		if (nla_put_u32(skb, IFLA_CAN_PWM_PWMS, pwm-&gt;pwms) ||</div><div class='add'>+		    nla_put_u32(skb, IFLA_CAN_PWM_PWML, pwm-&gt;pwml) ||</div><div class='add'>+		    nla_put_u32(skb, IFLA_CAN_PWM_PWMO, pwm-&gt;pwmo))</div><div class='add'>+			goto err_cancel;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nla_nest_end(skb, nest);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_cancel:</div><div class='add'>+	nla_nest_cancel(skb, nest);</div><div class='add'>+	return -EMSGSIZE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int can_ctrlmode_ext_fill_info(struct sk_buff *skb,</div><div class='add'>+				      const struct can_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct nlattr *nest;</div><div class='add'>+</div><div class='add'>+	nest = nla_nest_start(skb, IFLA_CAN_CTRLMODE_EXT);</div><div class='add'>+	if (!nest)</div><div class='add'>+		return -EMSGSIZE;</div><div class='add'>+</div><div class='add'>+	if (nla_put_u32(skb, IFLA_CAN_CTRLMODE_SUPPORTED,</div><div class='add'>+			priv-&gt;ctrlmode_supported)) {</div><div class='add'>+		nla_nest_cancel(skb, nest);</div><div class='add'>+		return -EMSGSIZE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nla_nest_end(skb, nest);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int can_fill_info(struct sk_buff *skb, const struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct can_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct can_ctrlmode cm = {.flags = priv-&gt;ctrlmode};</div><div class='add'>+	struct can_berr_counter bec = { };</div><div class='add'>+	enum can_state state = priv-&gt;state;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;do_get_state)</div><div class='add'>+		priv-&gt;do_get_state(dev, &amp;state);</div><div class='add'>+</div><div class='add'>+	if (can_bittiming_fill_info(skb, IFLA_CAN_BITTIMING,</div><div class='add'>+				    &amp;priv-&gt;bittiming) ||</div><div class='add'>+</div><div class='add'>+	    can_bittiming_const_fill_info(skb, IFLA_CAN_BITTIMING_CONST,</div><div class='add'>+					  priv-&gt;bittiming_const) ||</div><div class='add'>+</div><div class='add'>+	    nla_put(skb, IFLA_CAN_CLOCK, sizeof(priv-&gt;clock), &amp;priv-&gt;clock) ||</div><div class='add'>+	    nla_put_u32(skb, IFLA_CAN_STATE, state) ||</div><div class='add'>+	    nla_put(skb, IFLA_CAN_CTRLMODE, sizeof(cm), &amp;cm) ||</div><div class='add'>+	    nla_put_u32(skb, IFLA_CAN_RESTART_MS, priv-&gt;restart_ms) ||</div><div class='add'>+</div><div class='add'>+	    (priv-&gt;do_get_berr_counter &amp;&amp;</div><div class='add'>+	     !priv-&gt;do_get_berr_counter(dev, &amp;bec) &amp;&amp;</div><div class='add'>+	     nla_put(skb, IFLA_CAN_BERR_COUNTER, sizeof(bec), &amp;bec)) ||</div><div class='add'>+</div><div class='add'>+	    can_bittiming_fill_info(skb, IFLA_CAN_DATA_BITTIMING,</div><div class='add'>+				    &amp;priv-&gt;fd.data_bittiming) ||</div><div class='add'>+</div><div class='add'>+	    can_bittiming_const_fill_info(skb, IFLA_CAN_DATA_BITTIMING_CONST,</div><div class='add'>+					  priv-&gt;fd.data_bittiming_const) ||</div><div class='add'>+</div><div class='add'>+	    (priv-&gt;termination_const &amp;&amp;</div><div class='add'>+	     (nla_put_u16(skb, IFLA_CAN_TERMINATION, priv-&gt;termination) ||</div><div class='add'>+	      nla_put(skb, IFLA_CAN_TERMINATION_CONST,</div><div class='add'>+		      sizeof(*priv-&gt;termination_const) *</div><div class='add'>+		      priv-&gt;termination_const_cnt,</div><div class='add'>+		      priv-&gt;termination_const))) ||</div><div class='add'>+</div><div class='add'>+	    can_bitrate_const_fill_info(skb, IFLA_CAN_BITRATE_CONST,</div><div class='add'>+					priv-&gt;bitrate_const,</div><div class='add'>+					priv-&gt;bitrate_const_cnt) ||</div><div class='add'>+</div><div class='add'>+	    can_bitrate_const_fill_info(skb, IFLA_CAN_DATA_BITRATE_CONST,</div><div class='add'>+					priv-&gt;fd.data_bitrate_const,</div><div class='add'>+					priv-&gt;fd.data_bitrate_const_cnt) ||</div><div class='add'>+</div><div class='add'>+	    (nla_put(skb, IFLA_CAN_BITRATE_MAX,</div><div class='add'>+		     sizeof(priv-&gt;bitrate_max),</div><div class='add'>+		     &amp;priv-&gt;bitrate_max)) ||</div><div class='add'>+</div><div class='add'>+	    can_tdc_fill_info(skb, dev, IFLA_CAN_TDC) ||</div><div class='add'>+</div><div class='add'>+	    can_ctrlmode_ext_fill_info(skb, priv) ||</div><div class='add'>+</div><div class='add'>+	    can_bittiming_fill_info(skb, IFLA_CAN_XL_DATA_BITTIMING,</div><div class='add'>+				    &amp;priv-&gt;xl.data_bittiming) ||</div><div class='add'>+</div><div class='add'>+	    can_bittiming_const_fill_info(skb, IFLA_CAN_XL_DATA_BITTIMING_CONST,</div><div class='add'>+					  priv-&gt;xl.data_bittiming_const) ||</div><div class='add'>+</div><div class='add'>+	    can_bitrate_const_fill_info(skb, IFLA_CAN_XL_DATA_BITRATE_CONST,</div><div class='add'>+					priv-&gt;xl.data_bitrate_const,</div><div class='add'>+					priv-&gt;xl.data_bitrate_const_cnt) ||</div><div class='add'>+</div><div class='add'>+	    can_tdc_fill_info(skb, dev, IFLA_CAN_XL_TDC) ||</div><div class='add'>+</div><div class='add'>+	    can_pwm_fill_info(skb, priv)</div><div class='add'>+	    )</div><div class='add'>+		return -EMSGSIZE;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t can_get_xstats_size(const struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	return sizeof(struct can_device_stats);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int can_fill_xstats(struct sk_buff *skb, const struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct can_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	if (nla_put(skb, IFLA_INFO_XSTATS,</div><div class='add'>+		    sizeof(priv-&gt;can_stats), &amp;priv-&gt;can_stats))</div><div class='add'>+		goto nla_put_failure;</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+nla_put_failure:</div><div class='add'>+	return -EMSGSIZE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int can_newlink(struct net_device *dev,</div><div class='add'>+		       struct rtnl_newlink_params *params,</div><div class='add'>+		       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void can_dellink(struct net_device *dev, struct list_head *head)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct rtnl_link_ops can_link_ops __read_mostly = {</div><div class='add'>+	.kind		= "can",</div><div class='add'>+	.netns_refund	= true,</div><div class='add'>+	.maxtype	= IFLA_CAN_MAX,</div><div class='add'>+	.policy		= can_policy,</div><div class='add'>+	.setup		= can_setup,</div><div class='add'>+	.validate	= can_validate,</div><div class='add'>+	.newlink	= can_newlink,</div><div class='add'>+	.changelink	= can_changelink,</div><div class='add'>+	.dellink	= can_dellink,</div><div class='add'>+	.get_size	= can_get_size,</div><div class='add'>+	.fill_info	= can_fill_info,</div><div class='add'>+	.get_xstats_size = can_get_xstats_size,</div><div class='add'>+	.fill_xstats	= can_fill_xstats,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int can_netlink_register(void)</div><div class='add'>+{</div><div class='add'>+	return rtnl_link_register(&amp;can_link_ops);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void can_netlink_unregister(void)</div><div class='add'>+{</div><div class='add'>+	rtnl_link_unregister(&amp;can_link_ops);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/can/dev/rx-offload.c b/drivers/net/can/dev/rx-offload.c<br/>new file mode 100644<br/>index 000000000000..46e7b6db4a1e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/dev/rx-offload.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/dev/rx-offload.c</a></div><div class='hunk'>@@ -0,0 +1,427 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Copyright (c) 2014      Protonic Holland,</div><div class='add'>+ *                         David Jander</div><div class='add'>+ * Copyright (C) 2014-2021, 2023 Pengutronix,</div><div class='add'>+ *                         Marc Kleine-Budde &lt;kernel@pengutronix.de&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/can/rx-offload.h&gt;</div><div class='add'>+</div><div class='add'>+struct can_rx_offload_cb {</div><div class='add'>+	u32 timestamp;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline struct can_rx_offload_cb *</div><div class='add'>+can_rx_offload_get_cb(struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	BUILD_BUG_ON(sizeof(struct can_rx_offload_cb) &gt; sizeof(skb-&gt;cb));</div><div class='add'>+</div><div class='add'>+	return (struct can_rx_offload_cb *)skb-&gt;cb;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool</div><div class='add'>+can_rx_offload_le(struct can_rx_offload *offload,</div><div class='add'>+		  unsigned int a, unsigned int b)</div><div class='add'>+{</div><div class='add'>+	if (offload-&gt;inc)</div><div class='add'>+		return a &lt;= b;</div><div class='add'>+	else</div><div class='add'>+		return a &gt;= b;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int</div><div class='add'>+can_rx_offload_inc(struct can_rx_offload *offload, unsigned int *val)</div><div class='add'>+{</div><div class='add'>+	if (offload-&gt;inc)</div><div class='add'>+		return (*val)++;</div><div class='add'>+	else</div><div class='add'>+		return (*val)--;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int can_rx_offload_napi_poll(struct napi_struct *napi, int quota)</div><div class='add'>+{</div><div class='add'>+	struct can_rx_offload *offload = container_of(napi,</div><div class='add'>+						      struct can_rx_offload,</div><div class='add'>+						      napi);</div><div class='add'>+	struct net_device *dev = offload-&gt;dev;</div><div class='add'>+	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	int work_done = 0;</div><div class='add'>+</div><div class='add'>+	while ((work_done &lt; quota) &amp;&amp;</div><div class='add'>+	       (skb = skb_dequeue(&amp;offload-&gt;skb_queue))) {</div><div class='add'>+		struct can_frame *cf = (struct can_frame *)skb-&gt;data;</div><div class='add'>+</div><div class='add'>+		work_done++;</div><div class='add'>+		if (!(cf-&gt;can_id &amp; CAN_ERR_FLAG)) {</div><div class='add'>+			stats-&gt;rx_packets++;</div><div class='add'>+			if (!(cf-&gt;can_id &amp; CAN_RTR_FLAG))</div><div class='add'>+				stats-&gt;rx_bytes += cf-&gt;len;</div><div class='add'>+		}</div><div class='add'>+		netif_receive_skb(skb);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (work_done &lt; quota) {</div><div class='add'>+		napi_complete_done(napi, work_done);</div><div class='add'>+</div><div class='add'>+		/* Check if there was another interrupt */</div><div class='add'>+		if (!skb_queue_empty(&amp;offload-&gt;skb_queue))</div><div class='add'>+			napi_schedule(&amp;offload-&gt;napi);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return work_done;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+__skb_queue_add_sort(struct sk_buff_head *head, struct sk_buff *new,</div><div class='add'>+		     int (*compare)(struct sk_buff *a, struct sk_buff *b))</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *pos, *insert = NULL;</div><div class='add'>+</div><div class='add'>+	skb_queue_reverse_walk(head, pos) {</div><div class='add'>+		const struct can_rx_offload_cb *cb_pos, *cb_new;</div><div class='add'>+</div><div class='add'>+		cb_pos = can_rx_offload_get_cb(pos);</div><div class='add'>+		cb_new = can_rx_offload_get_cb(new);</div><div class='add'>+</div><div class='add'>+		netdev_dbg(new-&gt;dev,</div><div class='add'>+			   "%s: pos=0x%08x, new=0x%08x, diff=%10d, queue_len=%d\n",</div><div class='add'>+			   __func__,</div><div class='add'>+			   cb_pos-&gt;timestamp, cb_new-&gt;timestamp,</div><div class='add'>+			   cb_new-&gt;timestamp - cb_pos-&gt;timestamp,</div><div class='add'>+			   skb_queue_len(head));</div><div class='add'>+</div><div class='add'>+		if (compare(pos, new) &lt; 0)</div><div class='add'>+			continue;</div><div class='add'>+		insert = pos;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	if (!insert)</div><div class='add'>+		__skb_queue_head(head, new);</div><div class='add'>+	else</div><div class='add'>+		__skb_queue_after(head, insert, new);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int can_rx_offload_compare(struct sk_buff *a, struct sk_buff *b)</div><div class='add'>+{</div><div class='add'>+	const struct can_rx_offload_cb *cb_a, *cb_b;</div><div class='add'>+</div><div class='add'>+	cb_a = can_rx_offload_get_cb(a);</div><div class='add'>+	cb_b = can_rx_offload_get_cb(b);</div><div class='add'>+</div><div class='add'>+	/* Subtract two u32 and return result as int, to keep</div><div class='add'>+	 * difference steady around the u32 overflow.</div><div class='add'>+	 */</div><div class='add'>+	return cb_b-&gt;timestamp - cb_a-&gt;timestamp;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * can_rx_offload_offload_one() - Read one CAN frame from HW</div><div class='add'>+ * @offload: pointer to rx_offload context</div><div class='add'>+ * @n: number of mailbox to read</div><div class='add'>+ *</div><div class='add'>+ * The task of this function is to read a CAN frame from mailbox @n</div><div class='add'>+ * from the device and return the mailbox's content as a struct</div><div class='add'>+ * sk_buff.</div><div class='add'>+ *</div><div class='add'>+ * If the struct can_rx_offload::skb_queue exceeds the maximal queue</div><div class='add'>+ * length (struct can_rx_offload::skb_queue_len_max) or no skb can be</div><div class='add'>+ * allocated, the mailbox contents is discarded by reading it into an</div><div class='add'>+ * overflow buffer. This way the mailbox is marked as free by the</div><div class='add'>+ * driver.</div><div class='add'>+ *</div><div class='add'>+ * Return: A pointer to skb containing the CAN frame on success.</div><div class='add'>+ *</div><div class='add'>+ *         NULL if the mailbox @n is empty.</div><div class='add'>+ *</div><div class='add'>+ *         ERR_PTR() in case of an error</div><div class='add'>+ */</div><div class='add'>+static struct sk_buff *</div><div class='add'>+can_rx_offload_offload_one(struct can_rx_offload *offload, unsigned int n)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct can_rx_offload_cb *cb;</div><div class='add'>+	bool drop = false;</div><div class='add'>+	u32 timestamp;</div><div class='add'>+</div><div class='add'>+	/* If queue is full drop frame */</div><div class='add'>+	if (unlikely(skb_queue_len(&amp;offload-&gt;skb_queue) &gt;</div><div class='add'>+		     offload-&gt;skb_queue_len_max))</div><div class='add'>+		drop = true;</div><div class='add'>+</div><div class='add'>+	skb = offload-&gt;mailbox_read(offload, n, &amp;timestamp, drop);</div><div class='add'>+	/* Mailbox was empty. */</div><div class='add'>+	if (unlikely(!skb))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	/* There was a problem reading the mailbox, propagate</div><div class='add'>+	 * error value.</div><div class='add'>+	 */</div><div class='add'>+	if (IS_ERR(skb)) {</div><div class='add'>+		offload-&gt;dev-&gt;stats.rx_dropped++;</div><div class='add'>+		offload-&gt;dev-&gt;stats.rx_fifo_errors++;</div><div class='add'>+</div><div class='add'>+		return skb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Mailbox was read. */</div><div class='add'>+	cb = can_rx_offload_get_cb(skb);</div><div class='add'>+	cb-&gt;timestamp = timestamp;</div><div class='add'>+</div><div class='add'>+	return skb;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int can_rx_offload_irq_offload_timestamp(struct can_rx_offload *offload,</div><div class='add'>+					 u64 pending)</div><div class='add'>+{</div><div class='add'>+	unsigned int i;</div><div class='add'>+	int received = 0;</div><div class='add'>+</div><div class='add'>+	for (i = offload-&gt;mb_first;</div><div class='add'>+	     can_rx_offload_le(offload, i, offload-&gt;mb_last);</div><div class='add'>+	     can_rx_offload_inc(offload, &amp;i)) {</div><div class='add'>+		struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+		if (!(pending &amp; BIT_ULL(i)))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		skb = can_rx_offload_offload_one(offload, i);</div><div class='add'>+		if (IS_ERR_OR_NULL(skb))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		__skb_queue_add_sort(&amp;offload-&gt;skb_irq_queue, skb,</div><div class='add'>+				     can_rx_offload_compare);</div><div class='add'>+		received++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return received;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(can_rx_offload_irq_offload_timestamp);</div><div class='add'>+</div><div class='add'>+int can_rx_offload_irq_offload_fifo(struct can_rx_offload *offload)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	int received = 0;</div><div class='add'>+</div><div class='add'>+	while (1) {</div><div class='add'>+		skb = can_rx_offload_offload_one(offload, 0);</div><div class='add'>+		if (IS_ERR(skb))</div><div class='add'>+			continue;</div><div class='add'>+		if (!skb)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		__skb_queue_tail(&amp;offload-&gt;skb_irq_queue, skb);</div><div class='add'>+		received++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return received;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(can_rx_offload_irq_offload_fifo);</div><div class='add'>+</div><div class='add'>+int can_rx_offload_queue_timestamp(struct can_rx_offload *offload,</div><div class='add'>+				   struct sk_buff *skb, u32 timestamp)</div><div class='add'>+{</div><div class='add'>+	struct can_rx_offload_cb *cb;</div><div class='add'>+</div><div class='add'>+	if (skb_queue_len(&amp;offload-&gt;skb_queue) &gt;</div><div class='add'>+	    offload-&gt;skb_queue_len_max) {</div><div class='add'>+		dev_kfree_skb_any(skb);</div><div class='add'>+		return -ENOBUFS;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cb = can_rx_offload_get_cb(skb);</div><div class='add'>+	cb-&gt;timestamp = timestamp;</div><div class='add'>+</div><div class='add'>+	__skb_queue_add_sort(&amp;offload-&gt;skb_irq_queue, skb,</div><div class='add'>+			     can_rx_offload_compare);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(can_rx_offload_queue_timestamp);</div><div class='add'>+</div><div class='add'>+unsigned int</div><div class='add'>+can_rx_offload_get_echo_skb_queue_timestamp(struct can_rx_offload *offload,</div><div class='add'>+					    unsigned int idx, u32 timestamp,</div><div class='add'>+					    unsigned int *frame_len_ptr)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = offload-&gt;dev;</div><div class='add'>+	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	unsigned int len;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	skb = __can_get_echo_skb(dev, idx, &amp;len, frame_len_ptr);</div><div class='add'>+	if (!skb)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	err = can_rx_offload_queue_timestamp(offload, skb, timestamp);</div><div class='add'>+	if (err) {</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+		stats-&gt;tx_fifo_errors++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(can_rx_offload_get_echo_skb_queue_timestamp);</div><div class='add'>+</div><div class='add'>+int can_rx_offload_queue_tail(struct can_rx_offload *offload,</div><div class='add'>+			      struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	if (skb_queue_len(&amp;offload-&gt;skb_queue) &gt;</div><div class='add'>+	    offload-&gt;skb_queue_len_max) {</div><div class='add'>+		dev_kfree_skb_any(skb);</div><div class='add'>+		return -ENOBUFS;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	__skb_queue_tail(&amp;offload-&gt;skb_irq_queue, skb);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(can_rx_offload_queue_tail);</div><div class='add'>+</div><div class='add'>+unsigned int</div><div class='add'>+can_rx_offload_get_echo_skb_queue_tail(struct can_rx_offload *offload,</div><div class='add'>+				       unsigned int idx,</div><div class='add'>+				       unsigned int *frame_len_ptr)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = offload-&gt;dev;</div><div class='add'>+	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	unsigned int len;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	skb = __can_get_echo_skb(dev, idx, &amp;len, frame_len_ptr);</div><div class='add'>+	if (!skb)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	err = can_rx_offload_queue_tail(offload, skb);</div><div class='add'>+	if (err) {</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+		stats-&gt;tx_fifo_errors++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(can_rx_offload_get_echo_skb_queue_tail);</div><div class='add'>+</div><div class='add'>+void can_rx_offload_irq_finish(struct can_rx_offload *offload)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int queue_len;</div><div class='add'>+</div><div class='add'>+	if (skb_queue_empty_lockless(&amp;offload-&gt;skb_irq_queue))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;offload-&gt;skb_queue.lock, flags);</div><div class='add'>+	skb_queue_splice_tail_init(&amp;offload-&gt;skb_irq_queue, &amp;offload-&gt;skb_queue);</div><div class='add'>+	spin_unlock_irqrestore(&amp;offload-&gt;skb_queue.lock, flags);</div><div class='add'>+</div><div class='add'>+	queue_len = skb_queue_len(&amp;offload-&gt;skb_queue);</div><div class='add'>+	if (queue_len &gt; offload-&gt;skb_queue_len_max / 8)</div><div class='add'>+		netdev_dbg(offload-&gt;dev, "%s: queue_len=%d\n",</div><div class='add'>+			   __func__, queue_len);</div><div class='add'>+</div><div class='add'>+	napi_schedule(&amp;offload-&gt;napi);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(can_rx_offload_irq_finish);</div><div class='add'>+</div><div class='add'>+void can_rx_offload_threaded_irq_finish(struct can_rx_offload *offload)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int queue_len;</div><div class='add'>+</div><div class='add'>+	if (skb_queue_empty_lockless(&amp;offload-&gt;skb_irq_queue))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;offload-&gt;skb_queue.lock, flags);</div><div class='add'>+	skb_queue_splice_tail_init(&amp;offload-&gt;skb_irq_queue, &amp;offload-&gt;skb_queue);</div><div class='add'>+	spin_unlock_irqrestore(&amp;offload-&gt;skb_queue.lock, flags);</div><div class='add'>+</div><div class='add'>+	queue_len = skb_queue_len(&amp;offload-&gt;skb_queue);</div><div class='add'>+	if (queue_len &gt; offload-&gt;skb_queue_len_max / 8)</div><div class='add'>+		netdev_dbg(offload-&gt;dev, "%s: queue_len=%d\n",</div><div class='add'>+			   __func__, queue_len);</div><div class='add'>+</div><div class='add'>+	local_bh_disable();</div><div class='add'>+	napi_schedule(&amp;offload-&gt;napi);</div><div class='add'>+	local_bh_enable();</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(can_rx_offload_threaded_irq_finish);</div><div class='add'>+</div><div class='add'>+static int can_rx_offload_init_queue(struct net_device *dev,</div><div class='add'>+				     struct can_rx_offload *offload,</div><div class='add'>+				     unsigned int weight)</div><div class='add'>+{</div><div class='add'>+	offload-&gt;dev = dev;</div><div class='add'>+</div><div class='add'>+	/* Limit queue len to 4x the weight (rounded to next power of two) */</div><div class='add'>+	offload-&gt;skb_queue_len_max = 2 &lt;&lt; fls(weight);</div><div class='add'>+	offload-&gt;skb_queue_len_max *= 4;</div><div class='add'>+	skb_queue_head_init(&amp;offload-&gt;skb_queue);</div><div class='add'>+	__skb_queue_head_init(&amp;offload-&gt;skb_irq_queue);</div><div class='add'>+</div><div class='add'>+	netif_napi_add_weight(dev, &amp;offload-&gt;napi, can_rx_offload_napi_poll,</div><div class='add'>+			      weight);</div><div class='add'>+</div><div class='add'>+	dev_dbg(dev-&gt;dev.parent, "%s: skb_queue_len_max=%d\n",</div><div class='add'>+		__func__, offload-&gt;skb_queue_len_max);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int can_rx_offload_add_timestamp(struct net_device *dev,</div><div class='add'>+				 struct can_rx_offload *offload)</div><div class='add'>+{</div><div class='add'>+	unsigned int weight;</div><div class='add'>+</div><div class='add'>+	if (offload-&gt;mb_first &gt; BITS_PER_LONG_LONG ||</div><div class='add'>+	    offload-&gt;mb_last &gt; BITS_PER_LONG_LONG || !offload-&gt;mailbox_read)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (offload-&gt;mb_first &lt; offload-&gt;mb_last) {</div><div class='add'>+		offload-&gt;inc = true;</div><div class='add'>+		weight = offload-&gt;mb_last - offload-&gt;mb_first;</div><div class='add'>+	} else {</div><div class='add'>+		offload-&gt;inc = false;</div><div class='add'>+		weight = offload-&gt;mb_first - offload-&gt;mb_last;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return can_rx_offload_init_queue(dev, offload, weight);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(can_rx_offload_add_timestamp);</div><div class='add'>+</div><div class='add'>+int can_rx_offload_add_fifo(struct net_device *dev,</div><div class='add'>+			    struct can_rx_offload *offload, unsigned int weight)</div><div class='add'>+{</div><div class='add'>+	if (!offload-&gt;mailbox_read)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return can_rx_offload_init_queue(dev, offload, weight);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(can_rx_offload_add_fifo);</div><div class='add'>+</div><div class='add'>+int can_rx_offload_add_manual(struct net_device *dev,</div><div class='add'>+			      struct can_rx_offload *offload,</div><div class='add'>+			      unsigned int weight)</div><div class='add'>+{</div><div class='add'>+	if (offload-&gt;mailbox_read)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return can_rx_offload_init_queue(dev, offload, weight);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(can_rx_offload_add_manual);</div><div class='add'>+</div><div class='add'>+void can_rx_offload_enable(struct can_rx_offload *offload)</div><div class='add'>+{</div><div class='add'>+	napi_enable(&amp;offload-&gt;napi);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(can_rx_offload_enable);</div><div class='add'>+</div><div class='add'>+void can_rx_offload_del(struct can_rx_offload *offload)</div><div class='add'>+{</div><div class='add'>+	netif_napi_del(&amp;offload-&gt;napi);</div><div class='add'>+	skb_queue_purge(&amp;offload-&gt;skb_queue);</div><div class='add'>+	__skb_queue_purge(&amp;offload-&gt;skb_irq_queue);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(can_rx_offload_del);</div><div class='head'>diff --git a/drivers/net/can/dev/skb.c b/drivers/net/can/dev/skb.c<br/>new file mode 100644<br/>index 000000000000..3ebd4f779b9b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/dev/skb.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/dev/skb.c</a></div><div class='hunk'>@@ -0,0 +1,374 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Copyright (C) 2005 Marc Kleine-Budde, Pengutronix</div><div class='add'>+ * Copyright (C) 2006 Andrey Volkov, Varma Electronics</div><div class='add'>+ * Copyright (C) 2008-2009 Wolfgang Grandegger &lt;wg@grandegger.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+</div><div class='add'>+#define MOD_DESC "CAN device driver interface"</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION(MOD_DESC);</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='add'>+MODULE_AUTHOR("Wolfgang Grandegger &lt;wg@grandegger.com&gt;");</div><div class='add'>+</div><div class='add'>+/* Local echo of CAN messages</div><div class='add'>+ *</div><div class='add'>+ * CAN network devices *should* support a local echo functionality</div><div class='add'>+ * (see Documentation/networking/can.rst). To test the handling of CAN</div><div class='add'>+ * interfaces that do not support the local echo both driver types are</div><div class='add'>+ * implemented. In the case that the driver does not support the echo</div><div class='add'>+ * the IFF_ECHO remains clear in dev-&gt;flags. This causes the PF_CAN core</div><div class='add'>+ * to perform the echo as a fallback solution.</div><div class='add'>+ */</div><div class='add'>+void can_flush_echo_skb(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct can_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;echo_skb_max; i++) {</div><div class='add'>+		if (priv-&gt;echo_skb[i]) {</div><div class='add'>+			kfree_skb(priv-&gt;echo_skb[i]);</div><div class='add'>+			priv-&gt;echo_skb[i] = NULL;</div><div class='add'>+			stats-&gt;tx_dropped++;</div><div class='add'>+			stats-&gt;tx_aborted_errors++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Put the skb on the stack to be looped backed locally lateron</div><div class='add'>+ *</div><div class='add'>+ * The function is typically called in the start_xmit function</div><div class='add'>+ * of the device driver. The driver must protect access to</div><div class='add'>+ * priv-&gt;echo_skb, if necessary.</div><div class='add'>+ */</div><div class='add'>+int can_put_echo_skb(struct sk_buff *skb, struct net_device *dev,</div><div class='add'>+		     unsigned int idx, unsigned int frame_len)</div><div class='add'>+{</div><div class='add'>+	struct can_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	if (idx &gt;= priv-&gt;echo_skb_max) {</div><div class='add'>+		netdev_err(dev, "%s: BUG! Trying to access can_priv::echo_skb out of bounds (%u/max %u)\n",</div><div class='add'>+			   __func__, idx, priv-&gt;echo_skb_max);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* check flag whether this packet has to be looped back */</div><div class='add'>+	if (!(dev-&gt;flags &amp; IFF_ECHO) ||</div><div class='add'>+	    (skb-&gt;protocol != htons(ETH_P_CAN) &amp;&amp;</div><div class='add'>+	     skb-&gt;protocol != htons(ETH_P_CANFD) &amp;&amp;</div><div class='add'>+	     skb-&gt;protocol != htons(ETH_P_CANXL))) {</div><div class='add'>+		kfree_skb(skb);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;echo_skb[idx]) {</div><div class='add'>+		skb = can_create_echo_skb(skb);</div><div class='add'>+		if (!skb)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		/* make settings for echo to reduce code in irq context */</div><div class='add'>+		skb-&gt;ip_summed = CHECKSUM_UNNECESSARY;</div><div class='add'>+		skb-&gt;dev = dev;</div><div class='add'>+</div><div class='add'>+		/* save frame_len to reuse it when transmission is completed */</div><div class='add'>+		can_skb_prv(skb)-&gt;frame_len = frame_len;</div><div class='add'>+</div><div class='add'>+		if (skb_shinfo(skb)-&gt;tx_flags &amp; SKBTX_HW_TSTAMP)</div><div class='add'>+			skb_shinfo(skb)-&gt;tx_flags |= SKBTX_IN_PROGRESS;</div><div class='add'>+</div><div class='add'>+		skb_tx_timestamp(skb);</div><div class='add'>+</div><div class='add'>+		/* save this skb for tx interrupt echo handling */</div><div class='add'>+		priv-&gt;echo_skb[idx] = skb;</div><div class='add'>+	} else {</div><div class='add'>+		/* locking problem with netif_stop_queue() ?? */</div><div class='add'>+		netdev_err(dev, "%s: BUG! echo_skb %d is occupied!\n", __func__, idx);</div><div class='add'>+		kfree_skb(skb);</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(can_put_echo_skb);</div><div class='add'>+</div><div class='add'>+struct sk_buff *</div><div class='add'>+__can_get_echo_skb(struct net_device *dev, unsigned int idx,</div><div class='add'>+		   unsigned int *len_ptr, unsigned int *frame_len_ptr)</div><div class='add'>+{</div><div class='add'>+	struct can_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	if (idx &gt;= priv-&gt;echo_skb_max) {</div><div class='add'>+		netdev_err(dev, "%s: BUG! Trying to access can_priv::echo_skb out of bounds (%u/max %u)\n",</div><div class='add'>+			   __func__, idx, priv-&gt;echo_skb_max);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;echo_skb[idx]) {</div><div class='add'>+		/* Using "struct canfd_frame::len" for the frame</div><div class='add'>+		 * length is supported on both CAN and CANFD frames.</div><div class='add'>+		 */</div><div class='add'>+		struct sk_buff *skb = priv-&gt;echo_skb[idx];</div><div class='add'>+		struct can_skb_priv *can_skb_priv = can_skb_prv(skb);</div><div class='add'>+</div><div class='add'>+		if (skb_shinfo(skb)-&gt;tx_flags &amp; SKBTX_IN_PROGRESS)</div><div class='add'>+			skb_tstamp_tx(skb, skb_hwtstamps(skb));</div><div class='add'>+</div><div class='add'>+		/* get the real payload length for netdev statistics */</div><div class='add'>+		*len_ptr = can_skb_get_data_len(skb);</div><div class='add'>+</div><div class='add'>+		if (frame_len_ptr)</div><div class='add'>+			*frame_len_ptr = can_skb_priv-&gt;frame_len;</div><div class='add'>+</div><div class='add'>+		priv-&gt;echo_skb[idx] = NULL;</div><div class='add'>+</div><div class='add'>+		if (skb-&gt;pkt_type == PACKET_LOOPBACK) {</div><div class='add'>+			skb-&gt;pkt_type = PACKET_BROADCAST;</div><div class='add'>+		} else {</div><div class='add'>+			dev_consume_skb_any(skb);</div><div class='add'>+			return NULL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		return skb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Get the skb from the stack and loop it back locally</div><div class='add'>+ *</div><div class='add'>+ * The function is typically called when the TX done interrupt</div><div class='add'>+ * is handled in the device driver. The driver must protect</div><div class='add'>+ * access to priv-&gt;echo_skb, if necessary.</div><div class='add'>+ */</div><div class='add'>+unsigned int can_get_echo_skb(struct net_device *dev, unsigned int idx,</div><div class='add'>+			      unsigned int *frame_len_ptr)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	unsigned int len;</div><div class='add'>+</div><div class='add'>+	skb = __can_get_echo_skb(dev, idx, &amp;len, frame_len_ptr);</div><div class='add'>+	if (!skb)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	skb_get(skb);</div><div class='add'>+	if (netif_rx(skb) == NET_RX_SUCCESS)</div><div class='add'>+		dev_consume_skb_any(skb);</div><div class='add'>+	else</div><div class='add'>+		dev_kfree_skb_any(skb);</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(can_get_echo_skb);</div><div class='add'>+</div><div class='add'>+/* Remove the skb from the stack and free it.</div><div class='add'>+ *</div><div class='add'>+ * The function is typically called when TX failed.</div><div class='add'>+ */</div><div class='add'>+void can_free_echo_skb(struct net_device *dev, unsigned int idx,</div><div class='add'>+		       unsigned int *frame_len_ptr)</div><div class='add'>+{</div><div class='add'>+	struct can_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	if (idx &gt;= priv-&gt;echo_skb_max) {</div><div class='add'>+		netdev_err(dev, "%s: BUG! Trying to access can_priv::echo_skb out of bounds (%u/max %u)\n",</div><div class='add'>+			   __func__, idx, priv-&gt;echo_skb_max);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;echo_skb[idx]) {</div><div class='add'>+		struct sk_buff *skb = priv-&gt;echo_skb[idx];</div><div class='add'>+		struct can_skb_priv *can_skb_priv = can_skb_prv(skb);</div><div class='add'>+</div><div class='add'>+		if (frame_len_ptr)</div><div class='add'>+			*frame_len_ptr = can_skb_priv-&gt;frame_len;</div><div class='add'>+</div><div class='add'>+		dev_kfree_skb_any(skb);</div><div class='add'>+		priv-&gt;echo_skb[idx] = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(can_free_echo_skb);</div><div class='add'>+</div><div class='add'>+/* fill common values for CAN sk_buffs */</div><div class='add'>+static void init_can_skb_reserve(struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	skb-&gt;pkt_type = PACKET_BROADCAST;</div><div class='add'>+	skb-&gt;ip_summed = CHECKSUM_UNNECESSARY;</div><div class='add'>+</div><div class='add'>+	skb_reset_mac_header(skb);</div><div class='add'>+	skb_reset_network_header(skb);</div><div class='add'>+	skb_reset_transport_header(skb);</div><div class='add'>+</div><div class='add'>+	can_skb_reserve(skb);</div><div class='add'>+	can_skb_prv(skb)-&gt;skbcnt = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct sk_buff *alloc_can_skb(struct net_device *dev, struct can_frame **cf)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	skb = netdev_alloc_skb(dev, sizeof(struct can_skb_priv) +</div><div class='add'>+			       sizeof(struct can_frame));</div><div class='add'>+	if (unlikely(!skb)) {</div><div class='add'>+		*cf = NULL;</div><div class='add'>+</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb-&gt;protocol = htons(ETH_P_CAN);</div><div class='add'>+	init_can_skb_reserve(skb);</div><div class='add'>+	can_skb_prv(skb)-&gt;ifindex = dev-&gt;ifindex;</div><div class='add'>+</div><div class='add'>+	*cf = skb_put_zero(skb, sizeof(struct can_frame));</div><div class='add'>+</div><div class='add'>+	return skb;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(alloc_can_skb);</div><div class='add'>+</div><div class='add'>+struct sk_buff *alloc_canfd_skb(struct net_device *dev,</div><div class='add'>+				struct canfd_frame **cfd)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	skb = netdev_alloc_skb(dev, sizeof(struct can_skb_priv) +</div><div class='add'>+			       sizeof(struct canfd_frame));</div><div class='add'>+	if (unlikely(!skb)) {</div><div class='add'>+		*cfd = NULL;</div><div class='add'>+</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb-&gt;protocol = htons(ETH_P_CANFD);</div><div class='add'>+	init_can_skb_reserve(skb);</div><div class='add'>+	can_skb_prv(skb)-&gt;ifindex = dev-&gt;ifindex;</div><div class='add'>+</div><div class='add'>+	*cfd = skb_put_zero(skb, sizeof(struct canfd_frame));</div><div class='add'>+</div><div class='add'>+	/* set CAN FD flag by default */</div><div class='add'>+	(*cfd)-&gt;flags = CANFD_FDF;</div><div class='add'>+</div><div class='add'>+	return skb;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(alloc_canfd_skb);</div><div class='add'>+</div><div class='add'>+struct sk_buff *alloc_canxl_skb(struct net_device *dev,</div><div class='add'>+				struct canxl_frame **cxl,</div><div class='add'>+				unsigned int data_len)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	if (data_len &lt; CANXL_MIN_DLEN || data_len &gt; CANXL_MAX_DLEN)</div><div class='add'>+		goto out_error;</div><div class='add'>+</div><div class='add'>+	skb = netdev_alloc_skb(dev, sizeof(struct can_skb_priv) +</div><div class='add'>+			       CANXL_HDR_SIZE + data_len);</div><div class='add'>+	if (unlikely(!skb))</div><div class='add'>+		goto out_error;</div><div class='add'>+</div><div class='add'>+	skb-&gt;protocol = htons(ETH_P_CANXL);</div><div class='add'>+	init_can_skb_reserve(skb);</div><div class='add'>+	can_skb_prv(skb)-&gt;ifindex = dev-&gt;ifindex;</div><div class='add'>+</div><div class='add'>+	*cxl = skb_put_zero(skb, CANXL_HDR_SIZE + data_len);</div><div class='add'>+</div><div class='add'>+	/* set CAN XL flag and length information by default */</div><div class='add'>+	(*cxl)-&gt;flags = CANXL_XLF;</div><div class='add'>+	(*cxl)-&gt;len = data_len;</div><div class='add'>+</div><div class='add'>+	return skb;</div><div class='add'>+</div><div class='add'>+out_error:</div><div class='add'>+	*cxl = NULL;</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(alloc_canxl_skb);</div><div class='add'>+</div><div class='add'>+struct sk_buff *alloc_can_err_skb(struct net_device *dev, struct can_frame **cf)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_skb(dev, cf);</div><div class='add'>+	if (unlikely(!skb))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	(*cf)-&gt;can_id = CAN_ERR_FLAG;</div><div class='add'>+	(*cf)-&gt;len = CAN_ERR_DLC;</div><div class='add'>+</div><div class='add'>+	return skb;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(alloc_can_err_skb);</div><div class='add'>+</div><div class='add'>+/* Check for outgoing skbs that have not been created by the CAN subsystem */</div><div class='add'>+static bool can_skb_headroom_valid(struct net_device *dev, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	/* af_packet creates a headroom of HH_DATA_MOD bytes which is fine */</div><div class='add'>+	if (WARN_ON_ONCE(skb_headroom(skb) &lt; sizeof(struct can_skb_priv)))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* af_packet does not apply CAN skb specific settings */</div><div class='add'>+	if (skb-&gt;ip_summed == CHECKSUM_NONE) {</div><div class='add'>+		/* init headroom */</div><div class='add'>+		can_skb_prv(skb)-&gt;ifindex = dev-&gt;ifindex;</div><div class='add'>+		can_skb_prv(skb)-&gt;skbcnt = 0;</div><div class='add'>+</div><div class='add'>+		skb-&gt;ip_summed = CHECKSUM_UNNECESSARY;</div><div class='add'>+</div><div class='add'>+		/* perform proper loopback on capable devices */</div><div class='add'>+		if (dev-&gt;flags &amp; IFF_ECHO)</div><div class='add'>+			skb-&gt;pkt_type = PACKET_LOOPBACK;</div><div class='add'>+		else</div><div class='add'>+			skb-&gt;pkt_type = PACKET_HOST;</div><div class='add'>+</div><div class='add'>+		skb_reset_mac_header(skb);</div><div class='add'>+		skb_reset_network_header(skb);</div><div class='add'>+		skb_reset_transport_header(skb);</div><div class='add'>+</div><div class='add'>+		/* set CANFD_FDF flag for CAN FD frames */</div><div class='add'>+		if (can_is_canfd_skb(skb)) {</div><div class='add'>+			struct canfd_frame *cfd;</div><div class='add'>+</div><div class='add'>+			cfd = (struct canfd_frame *)skb-&gt;data;</div><div class='add'>+			cfd-&gt;flags |= CANFD_FDF;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Drop a given socketbuffer if it does not contain a valid CAN frame. */</div><div class='add'>+bool can_dropped_invalid_skb(struct net_device *dev, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	switch (ntohs(skb-&gt;protocol)) {</div><div class='add'>+	case ETH_P_CAN:</div><div class='add'>+		if (!can_is_can_skb(skb))</div><div class='add'>+			goto inval_skb;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case ETH_P_CANFD:</div><div class='add'>+		if (!can_is_canfd_skb(skb))</div><div class='add'>+			goto inval_skb;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case ETH_P_CANXL:</div><div class='add'>+		if (!can_is_canxl_skb(skb))</div><div class='add'>+			goto inval_skb;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		goto inval_skb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!can_skb_headroom_valid(dev, skb))</div><div class='add'>+		goto inval_skb;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+</div><div class='add'>+inval_skb:</div><div class='add'>+	kfree_skb(skb);</div><div class='add'>+	dev-&gt;stats.tx_dropped++;</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(can_dropped_invalid_skb);</div><div class='head'>diff --git a/drivers/net/can/dummy_can.c b/drivers/net/can/dummy_can.c<br/>new file mode 100644<br/>index 000000000000..41953655e3d3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/dummy_can.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/dummy_can.c</a></div><div class='hunk'>@@ -0,0 +1,285 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+/* Copyright (c) 2025 Vincent Mailhol &lt;mailhol@kernel.org&gt; */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/array_size.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/units.h&gt;</div><div class='add'>+#include &lt;linux/string_choices.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/can.h&gt;</div><div class='add'>+#include &lt;linux/can/bittiming.h&gt;</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/can/skb.h&gt;</div><div class='add'>+</div><div class='add'>+struct dummy_can {</div><div class='add'>+	struct can_priv can;</div><div class='add'>+	struct net_device *dev;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct dummy_can *dummy_can;</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const dummy_can_bittiming_const = {</div><div class='add'>+	.name = "dummy_can CC",</div><div class='add'>+	.tseg1_min = 2,</div><div class='add'>+	.tseg1_max = 256,</div><div class='add'>+	.tseg2_min = 2,</div><div class='add'>+	.tseg2_max = 128,</div><div class='add'>+	.sjw_max = 128,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 512,</div><div class='add'>+	.brp_inc = 1</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const dummy_can_fd_databittiming_const = {</div><div class='add'>+	.name = "dummy_can FD",</div><div class='add'>+	.tseg1_min = 2,</div><div class='add'>+	.tseg1_max = 256,</div><div class='add'>+	.tseg2_min = 2,</div><div class='add'>+	.tseg2_max = 128,</div><div class='add'>+	.sjw_max = 128,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 512,</div><div class='add'>+	.brp_inc = 1</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_tdc_const dummy_can_fd_tdc_const = {</div><div class='add'>+	.tdcv_min = 0,</div><div class='add'>+	.tdcv_max = 0, /* Manual mode not supported. */</div><div class='add'>+	.tdco_min = 0,</div><div class='add'>+	.tdco_max = 127,</div><div class='add'>+	.tdcf_min = 0,</div><div class='add'>+	.tdcf_max = 127</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const dummy_can_xl_databittiming_const = {</div><div class='add'>+	.name = "dummy_can XL",</div><div class='add'>+	.tseg1_min = 2,</div><div class='add'>+	.tseg1_max = 256,</div><div class='add'>+	.tseg2_min = 2,</div><div class='add'>+	.tseg2_max = 128,</div><div class='add'>+	.sjw_max = 128,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 512,</div><div class='add'>+	.brp_inc = 1</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_tdc_const dummy_can_xl_tdc_const = {</div><div class='add'>+	.tdcv_min = 0,</div><div class='add'>+	.tdcv_max = 0, /* Manual mode not supported. */</div><div class='add'>+	.tdco_min = 0,</div><div class='add'>+	.tdco_max = 127,</div><div class='add'>+	.tdcf_min = 0,</div><div class='add'>+	.tdcf_max = 127</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_pwm_const dummy_can_pwm_const = {</div><div class='add'>+	.pwms_min = 1,</div><div class='add'>+	.pwms_max = 8,</div><div class='add'>+	.pwml_min = 2,</div><div class='add'>+	.pwml_max = 24,</div><div class='add'>+	.pwmo_min = 0,</div><div class='add'>+	.pwmo_max = 16,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void dummy_can_print_bittiming(struct net_device *dev,</div><div class='add'>+				      struct can_bittiming *bt)</div><div class='add'>+{</div><div class='add'>+	netdev_dbg(dev, "\tbitrate: %u\n", bt-&gt;bitrate);</div><div class='add'>+	netdev_dbg(dev, "\tsample_point: %u\n", bt-&gt;sample_point);</div><div class='add'>+	netdev_dbg(dev, "\ttq: %u\n", bt-&gt;tq);</div><div class='add'>+	netdev_dbg(dev, "\tprop_seg: %u\n", bt-&gt;prop_seg);</div><div class='add'>+	netdev_dbg(dev, "\tphase_seg1: %u\n", bt-&gt;phase_seg1);</div><div class='add'>+	netdev_dbg(dev, "\tphase_seg2: %u\n", bt-&gt;phase_seg2);</div><div class='add'>+	netdev_dbg(dev, "\tsjw: %u\n", bt-&gt;sjw);</div><div class='add'>+	netdev_dbg(dev, "\tbrp: %u\n", bt-&gt;brp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dummy_can_print_tdc(struct net_device *dev, struct can_tdc *tdc)</div><div class='add'>+{</div><div class='add'>+	netdev_dbg(dev, "\t\ttdcv: %u\n", tdc-&gt;tdcv);</div><div class='add'>+	netdev_dbg(dev, "\t\ttdco: %u\n", tdc-&gt;tdco);</div><div class='add'>+	netdev_dbg(dev, "\t\ttdcf: %u\n", tdc-&gt;tdcf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dummy_can_print_pwm(struct net_device *dev, struct can_pwm *pwm,</div><div class='add'>+				struct can_bittiming *dbt)</div><div class='add'>+{</div><div class='add'>+	netdev_dbg(dev, "\t\tpwms: %u\n", pwm-&gt;pwms);</div><div class='add'>+	netdev_dbg(dev, "\t\tpwml: %u\n", pwm-&gt;pwml);</div><div class='add'>+	netdev_dbg(dev, "\t\tpwmo: %u\n", pwm-&gt;pwmo);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dummy_can_print_ctrlmode(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct dummy_can *priv = netdev_priv(dev);</div><div class='add'>+	struct can_priv *can_priv = &amp;priv-&gt;can;</div><div class='add'>+	unsigned long supported = can_priv-&gt;ctrlmode_supported;</div><div class='add'>+	u32 enabled = can_priv-&gt;ctrlmode;</div><div class='add'>+</div><div class='add'>+	netdev_dbg(dev, "Control modes:\n");</div><div class='add'>+	netdev_dbg(dev, "\tsupported: 0x%08x\n", (u32)supported);</div><div class='add'>+	netdev_dbg(dev, "\tenabled: 0x%08x\n", enabled);</div><div class='add'>+</div><div class='add'>+	if (supported) {</div><div class='add'>+		int idx;</div><div class='add'>+</div><div class='add'>+		netdev_dbg(dev, "\tlist:");</div><div class='add'>+		for_each_set_bit(idx, &amp;supported, BITS_PER_TYPE(u32))</div><div class='add'>+			netdev_dbg(dev, "\t\t%s: %s\n",</div><div class='add'>+				   can_get_ctrlmode_str(BIT(idx)),</div><div class='add'>+				   enabled &amp; BIT(idx) ? "on" : "off");</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dummy_can_print_bittiming_info(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct dummy_can *priv = netdev_priv(dev);</div><div class='add'>+	struct can_priv *can_priv = &amp;priv-&gt;can;</div><div class='add'>+</div><div class='add'>+	netdev_dbg(dev, "Clock frequency: %u\n", can_priv-&gt;clock.freq);</div><div class='add'>+	netdev_dbg(dev, "Maximum bitrate: %u\n", can_priv-&gt;bitrate_max);</div><div class='add'>+	netdev_dbg(dev, "MTU: %u\n", dev-&gt;mtu);</div><div class='add'>+	netdev_dbg(dev, "\n");</div><div class='add'>+</div><div class='add'>+	dummy_can_print_ctrlmode(dev);</div><div class='add'>+	netdev_dbg(dev, "\n");</div><div class='add'>+</div><div class='add'>+	netdev_dbg(dev, "Classical CAN nominal bittiming:\n");</div><div class='add'>+	dummy_can_print_bittiming(dev, &amp;can_priv-&gt;bittiming);</div><div class='add'>+	netdev_dbg(dev, "\n");</div><div class='add'>+</div><div class='add'>+	if (can_priv-&gt;ctrlmode &amp; CAN_CTRLMODE_FD) {</div><div class='add'>+		netdev_dbg(dev, "CAN FD databittiming:\n");</div><div class='add'>+		dummy_can_print_bittiming(dev, &amp;can_priv-&gt;fd.data_bittiming);</div><div class='add'>+		if (can_fd_tdc_is_enabled(can_priv)) {</div><div class='add'>+			netdev_dbg(dev, "\tCAN FD TDC:\n");</div><div class='add'>+			dummy_can_print_tdc(dev, &amp;can_priv-&gt;fd.tdc);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	netdev_dbg(dev, "\n");</div><div class='add'>+</div><div class='add'>+	if (can_priv-&gt;ctrlmode &amp; CAN_CTRLMODE_XL) {</div><div class='add'>+		netdev_dbg(dev, "CAN XL databittiming:\n");</div><div class='add'>+		dummy_can_print_bittiming(dev, &amp;can_priv-&gt;xl.data_bittiming);</div><div class='add'>+		if (can_xl_tdc_is_enabled(can_priv)) {</div><div class='add'>+			netdev_dbg(dev, "\tCAN XL TDC:\n");</div><div class='add'>+			dummy_can_print_tdc(dev, &amp;can_priv-&gt;xl.tdc);</div><div class='add'>+		}</div><div class='add'>+		if (can_priv-&gt;ctrlmode &amp; CAN_CTRLMODE_XL_TMS) {</div><div class='add'>+			netdev_dbg(dev, "\tCAN XL PWM:\n");</div><div class='add'>+			dummy_can_print_pwm(dev, &amp;can_priv-&gt;xl.pwm,</div><div class='add'>+					    &amp;can_priv-&gt;xl.data_bittiming);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	netdev_dbg(dev, "\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dummy_can_netdev_open(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct can_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	dummy_can_print_bittiming_info(dev);</div><div class='add'>+	netdev_dbg(dev, "error-signalling is %s\n",</div><div class='add'>+		   str_enabled_disabled(!can_dev_in_xl_only_mode(priv)));</div><div class='add'>+</div><div class='add'>+	ret = open_candev(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+	netif_start_queue(dev);</div><div class='add'>+	netdev_dbg(dev, "dummy-can is up\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dummy_can_netdev_close(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	netif_stop_queue(dev);</div><div class='add'>+	close_candev(dev);</div><div class='add'>+	netdev_dbg(dev, "dummy-can is down\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static netdev_tx_t dummy_can_start_xmit(struct sk_buff *skb,</div><div class='add'>+					struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	if (can_dev_dropped_skb(dev, skb))</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+	can_put_echo_skb(skb, dev, 0, 0);</div><div class='add'>+	dev-&gt;stats.tx_packets++;</div><div class='add'>+	dev-&gt;stats.tx_bytes += can_get_echo_skb(dev, 0, NULL);</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops dummy_can_netdev_ops = {</div><div class='add'>+	.ndo_open = dummy_can_netdev_open,</div><div class='add'>+	.ndo_stop = dummy_can_netdev_close,</div><div class='add'>+	.ndo_start_xmit = dummy_can_start_xmit,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops dummy_can_ethtool_ops = {</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init dummy_can_init(void)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev;</div><div class='add'>+	struct dummy_can *priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	dev = alloc_candev(sizeof(*priv), 1);</div><div class='add'>+	if (!dev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	dev-&gt;netdev_ops = &amp;dummy_can_netdev_ops;</div><div class='add'>+	dev-&gt;ethtool_ops = &amp;dummy_can_ethtool_ops;</div><div class='add'>+	priv = netdev_priv(dev);</div><div class='add'>+	priv-&gt;can.bittiming_const = &amp;dummy_can_bittiming_const;</div><div class='add'>+	priv-&gt;can.bitrate_max = 20 * MEGA /* BPS */;</div><div class='add'>+	priv-&gt;can.clock.freq = 160 * MEGA /* Hz */;</div><div class='add'>+	priv-&gt;can.fd.data_bittiming_const = &amp;dummy_can_fd_databittiming_const;</div><div class='add'>+	priv-&gt;can.fd.tdc_const = &amp;dummy_can_fd_tdc_const;</div><div class='add'>+	priv-&gt;can.xl.data_bittiming_const = &amp;dummy_can_xl_databittiming_const;</div><div class='add'>+	priv-&gt;can.xl.tdc_const = &amp;dummy_can_xl_tdc_const;</div><div class='add'>+	priv-&gt;can.xl.pwm_const = &amp;dummy_can_pwm_const;</div><div class='add'>+	priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_LISTENONLY |</div><div class='add'>+		CAN_CTRLMODE_FD | CAN_CTRLMODE_TDC_AUTO |</div><div class='add'>+		CAN_CTRLMODE_RESTRICTED | CAN_CTRLMODE_XL |</div><div class='add'>+		CAN_CTRLMODE_XL_TDC_AUTO | CAN_CTRLMODE_XL_TMS;</div><div class='add'>+	priv-&gt;dev = dev;</div><div class='add'>+</div><div class='add'>+	ret = register_candev(priv-&gt;dev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		free_candev(priv-&gt;dev);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dummy_can = priv;</div><div class='add'>+	netdev_dbg(dev, "dummy-can ready\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit dummy_can_exit(void)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = dummy_can-&gt;dev;</div><div class='add'>+</div><div class='add'>+	netdev_dbg(dev, "dummy-can bye bye\n");</div><div class='add'>+	unregister_candev(dev);</div><div class='add'>+	free_candev(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(dummy_can_init);</div><div class='add'>+module_exit(dummy_can_exit);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("A dummy CAN driver, mainly to test the netlink interface");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_AUTHOR("Vincent Mailhol &lt;mailhol@kernel.org&gt;");</div><div class='head'>diff --git a/drivers/net/can/esd/Kconfig b/drivers/net/can/esd/Kconfig<br/>new file mode 100644<br/>index 000000000000..54bfc366634c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/esd/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/esd/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,12 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+config CAN_ESD_402_PCI</div><div class='add'>+	tristate "esd electronics gmbh CAN-PCI(e)/402 family"</div><div class='add'>+	depends on PCI &amp;&amp; HAS_DMA</div><div class='add'>+	help</div><div class='add'>+	  Support for C402 card family from esd electronics gmbh.</div><div class='add'>+	  This card family is based on the ESDACC CAN controller and</div><div class='add'>+	  available in several form factors:  PCI, PCIe, PCIe Mini,</div><div class='add'>+	  M.2 PCIe, CPCIserial, PMC, XMC  (see https://esd.eu/en)</div><div class='add'>+</div><div class='add'>+	  This driver can also be built as a module. In this case the</div><div class='add'>+	  module will be called esd_402_pci.</div><div class='head'>diff --git a/drivers/net/can/esd/Makefile b/drivers/net/can/esd/Makefile<br/>new file mode 100644<br/>index 000000000000..5dd2d470c286<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/esd/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/esd/Makefile</a></div><div class='hunk'>@@ -0,0 +1,7 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+#</div><div class='add'>+#  Makefile for esd gmbh ESDACC controller driver</div><div class='add'>+#</div><div class='add'>+esd_402_pci-objs := esdacc.o esd_402_pci-core.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_CAN_ESD_402_PCI) += esd_402_pci.o</div><div class='head'>diff --git a/drivers/net/can/esd/esd_402_pci-core.c b/drivers/net/can/esd/esd_402_pci-core.c<br/>new file mode 100644<br/>index 000000000000..c826f00c551b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/esd/esd_402_pci-core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/esd/esd_402_pci-core.c</a></div><div class='hunk'>@@ -0,0 +1,515 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Copyright (C) 2015 - 2016 Thomas Körper, esd electronic system design gmbh</div><div class='add'>+ * Copyright (C) 2017 - 2023 Stefan Mätje, esd electronics gmbh</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/can.h&gt;</div><div class='add'>+#include &lt;linux/can/netlink.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+</div><div class='add'>+#include "esdacc.h"</div><div class='add'>+</div><div class='add'>+#define ESD_PCI_DEVICE_ID_PCIE402 0x0402</div><div class='add'>+</div><div class='add'>+#define PCI402_FPGA_VER_MIN 0x003d</div><div class='add'>+#define PCI402_MAX_CORES 6</div><div class='add'>+#define PCI402_BAR 0</div><div class='add'>+#define PCI402_IO_OV_OFFS 0</div><div class='add'>+#define PCI402_IO_PCIEP_OFFS 0x10000</div><div class='add'>+#define PCI402_IO_LEN_TOTAL 0x20000</div><div class='add'>+#define PCI402_IO_LEN_CORE 0x2000</div><div class='add'>+#define PCI402_PCICFG_MSICAP 0x50</div><div class='add'>+</div><div class='add'>+#define PCI402_DMA_MASK DMA_BIT_MASK(32)</div><div class='add'>+#define PCI402_DMA_SIZE ALIGN(0x10000, PAGE_SIZE)</div><div class='add'>+</div><div class='add'>+#define PCI402_PCIEP_OF_INT_ENABLE 0x0050</div><div class='add'>+#define PCI402_PCIEP_OF_BM_ADDR_LO 0x1000</div><div class='add'>+#define PCI402_PCIEP_OF_BM_ADDR_HI 0x1004</div><div class='add'>+#define PCI402_PCIEP_OF_MSI_ADDR_LO 0x1008</div><div class='add'>+#define PCI402_PCIEP_OF_MSI_ADDR_HI 0x100c</div><div class='add'>+</div><div class='add'>+struct pci402_card {</div><div class='add'>+	/* Actually mapped io space, all other iomem derived from this */</div><div class='add'>+	void __iomem *addr;</div><div class='add'>+	void __iomem *addr_pciep;</div><div class='add'>+</div><div class='add'>+	void *dma_buf;</div><div class='add'>+	dma_addr_t dma_hnd;</div><div class='add'>+</div><div class='add'>+	struct acc_ov ov;</div><div class='add'>+	struct acc_core *cores;</div><div class='add'>+</div><div class='add'>+	bool msi_enabled;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* The BTR register capabilities described by the can_bittiming_const structures</div><div class='add'>+ * below are valid since esdACC version 0x0032.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Used if the esdACC FPGA is built as CAN-Classic version. */</div><div class='add'>+static const struct can_bittiming_const pci402_bittiming_const = {</div><div class='add'>+	.name = "esd_402",</div><div class='add'>+	.tseg1_min = 1,</div><div class='add'>+	.tseg1_max = 16,</div><div class='add'>+	.tseg2_min = 1,</div><div class='add'>+	.tseg2_max = 8,</div><div class='add'>+	.sjw_max = 4,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 512,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Used if the esdACC FPGA is built as CAN-FD version. */</div><div class='add'>+static const struct can_bittiming_const pci402_bittiming_const_canfd = {</div><div class='add'>+	.name = "esd_402fd",</div><div class='add'>+	.tseg1_min = 1,</div><div class='add'>+	.tseg1_max = 256,</div><div class='add'>+	.tseg2_min = 1,</div><div class='add'>+	.tseg2_max = 128,</div><div class='add'>+	.sjw_max = 128,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 256,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops pci402_acc_netdev_ops = {</div><div class='add'>+	.ndo_open = acc_open,</div><div class='add'>+	.ndo_stop = acc_close,</div><div class='add'>+	.ndo_start_xmit = acc_start_xmit,</div><div class='add'>+	.ndo_hwtstamp_get = can_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set = can_hwtstamp_set,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops pci402_acc_ethtool_ops = {</div><div class='add'>+	.get_ts_info = can_ethtool_op_get_ts_info_hwts,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static irqreturn_t pci402_interrupt(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = dev_id;</div><div class='add'>+	struct pci402_card *card = pci_get_drvdata(pdev);</div><div class='add'>+	irqreturn_t irq_status;</div><div class='add'>+</div><div class='add'>+	irq_status = acc_card_interrupt(&amp;card-&gt;ov, card-&gt;cores);</div><div class='add'>+</div><div class='add'>+	return irq_status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pci402_set_msiconfig(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct pci402_card *card = pci_get_drvdata(pdev);</div><div class='add'>+	u32 addr_lo_offs = 0;</div><div class='add'>+	u32 addr_lo = 0;</div><div class='add'>+	u32 addr_hi = 0;</div><div class='add'>+	u32 data = 0;</div><div class='add'>+	u16 csr = 0;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* The FPGA hard IP PCIe core implements a 64-bit MSI Capability</div><div class='add'>+	 * Register Format</div><div class='add'>+	 */</div><div class='add'>+	err = pci_read_config_word(pdev, PCI402_PCICFG_MSICAP + PCI_MSI_FLAGS, &amp;csr);</div><div class='add'>+	if (err)</div><div class='add'>+		goto failed;</div><div class='add'>+</div><div class='add'>+	err = pci_read_config_dword(pdev, PCI402_PCICFG_MSICAP + PCI_MSI_ADDRESS_LO,</div><div class='add'>+				    &amp;addr_lo);</div><div class='add'>+	if (err)</div><div class='add'>+		goto failed;</div><div class='add'>+	err = pci_read_config_dword(pdev, PCI402_PCICFG_MSICAP + PCI_MSI_ADDRESS_HI,</div><div class='add'>+				    &amp;addr_hi);</div><div class='add'>+	if (err)</div><div class='add'>+		goto failed;</div><div class='add'>+</div><div class='add'>+	err = pci_read_config_dword(pdev, PCI402_PCICFG_MSICAP + PCI_MSI_DATA_64,</div><div class='add'>+				    &amp;data);</div><div class='add'>+	if (err)</div><div class='add'>+		goto failed;</div><div class='add'>+</div><div class='add'>+	addr_lo_offs = addr_lo &amp; 0x0000ffff;</div><div class='add'>+	addr_lo &amp;= 0xffff0000;</div><div class='add'>+</div><div class='add'>+	if (addr_hi)</div><div class='add'>+		addr_lo |= 1; /* To enable 64-Bit addressing in PCIe endpoint */</div><div class='add'>+</div><div class='add'>+	if (!(csr &amp; PCI_MSI_FLAGS_ENABLE)) {</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto failed;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	iowrite32(addr_lo, card-&gt;addr_pciep + PCI402_PCIEP_OF_MSI_ADDR_LO);</div><div class='add'>+	iowrite32(addr_hi, card-&gt;addr_pciep + PCI402_PCIEP_OF_MSI_ADDR_HI);</div><div class='add'>+	acc_ov_write32(&amp;card-&gt;ov, ACC_OV_OF_MSI_ADDRESSOFFSET, addr_lo_offs);</div><div class='add'>+	acc_ov_write32(&amp;card-&gt;ov, ACC_OV_OF_MSI_DATA, data);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+failed:</div><div class='add'>+	pci_warn(pdev, "Error while setting MSI configuration:\n"</div><div class='add'>+		 "CSR: 0x%.4x, addr: 0x%.8x%.8x, offs: 0x%.4x, data: 0x%.8x\n",</div><div class='add'>+		 csr, addr_hi, addr_lo, addr_lo_offs, data);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pci402_init_card(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct pci402_card *card = pci_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	card-&gt;ov.addr = card-&gt;addr + PCI402_IO_OV_OFFS;</div><div class='add'>+	card-&gt;addr_pciep = card-&gt;addr + PCI402_IO_PCIEP_OFFS;</div><div class='add'>+</div><div class='add'>+	acc_reset_fpga(&amp;card-&gt;ov);</div><div class='add'>+	acc_init_ov(&amp;card-&gt;ov, &amp;pdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	if (card-&gt;ov.version &lt; PCI402_FPGA_VER_MIN) {</div><div class='add'>+		pci_err(pdev,</div><div class='add'>+			"esdACC version (0x%.4x) outdated, please update\n",</div><div class='add'>+			card-&gt;ov.version);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (card-&gt;ov.timestamp_frequency != ACC_TS_FREQ_80MHZ) {</div><div class='add'>+		pci_err(pdev,</div><div class='add'>+			"esdACC timestamp frequency of %uHz not supported by driver. Aborted.\n",</div><div class='add'>+			card-&gt;ov.timestamp_frequency);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (card-&gt;ov.active_cores &gt; PCI402_MAX_CORES) {</div><div class='add'>+		pci_err(pdev,</div><div class='add'>+			"Card with %u active cores not supported by driver. Aborted.\n",</div><div class='add'>+			card-&gt;ov.active_cores);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	card-&gt;cores = devm_kcalloc(&amp;pdev-&gt;dev, card-&gt;ov.active_cores,</div><div class='add'>+				   sizeof(struct acc_core), GFP_KERNEL);</div><div class='add'>+	if (!card-&gt;cores)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	if (card-&gt;ov.features &amp; ACC_OV_REG_FEAT_MASK_CANFD) {</div><div class='add'>+		pci_warn(pdev,</div><div class='add'>+			 "esdACC with CAN-FD feature detected. This driver doesn't support CAN-FD yet.\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+#ifdef __LITTLE_ENDIAN</div><div class='add'>+	/* So card converts all busmastered data to LE for us: */</div><div class='add'>+	acc_ov_set_bits(&amp;card-&gt;ov, ACC_OV_OF_MODE,</div><div class='add'>+			ACC_OV_REG_MODE_MASK_ENDIAN_LITTLE);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pci402_init_interrupt(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct pci402_card *card = pci_get_drvdata(pdev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = pci_enable_msi(pdev);</div><div class='add'>+	if (!err) {</div><div class='add'>+		err = pci402_set_msiconfig(pdev);</div><div class='add'>+		if (!err) {</div><div class='add'>+			card-&gt;msi_enabled = true;</div><div class='add'>+			acc_ov_set_bits(&amp;card-&gt;ov, ACC_OV_OF_MODE,</div><div class='add'>+					ACC_OV_REG_MODE_MASK_MSI_ENABLE);</div><div class='add'>+			pci_dbg(pdev, "MSI preparation done\n");</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = devm_request_irq(&amp;pdev-&gt;dev, pdev-&gt;irq, pci402_interrupt,</div><div class='add'>+			       IRQF_SHARED, dev_name(&amp;pdev-&gt;dev), pdev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto failure_msidis;</div><div class='add'>+</div><div class='add'>+	iowrite32(1, card-&gt;addr_pciep + PCI402_PCIEP_OF_INT_ENABLE);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+failure_msidis:</div><div class='add'>+	if (card-&gt;msi_enabled) {</div><div class='add'>+		acc_ov_clear_bits(&amp;card-&gt;ov, ACC_OV_OF_MODE,</div><div class='add'>+				  ACC_OV_REG_MODE_MASK_MSI_ENABLE);</div><div class='add'>+		pci_disable_msi(pdev);</div><div class='add'>+		card-&gt;msi_enabled = false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pci402_finish_interrupt(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct pci402_card *card = pci_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	iowrite32(0, card-&gt;addr_pciep + PCI402_PCIEP_OF_INT_ENABLE);</div><div class='add'>+	devm_free_irq(&amp;pdev-&gt;dev, pdev-&gt;irq, pdev);</div><div class='add'>+</div><div class='add'>+	if (card-&gt;msi_enabled) {</div><div class='add'>+		acc_ov_clear_bits(&amp;card-&gt;ov, ACC_OV_OF_MODE,</div><div class='add'>+				  ACC_OV_REG_MODE_MASK_MSI_ENABLE);</div><div class='add'>+		pci_disable_msi(pdev);</div><div class='add'>+		card-&gt;msi_enabled = false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pci402_init_dma(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct pci402_card *card = pci_get_drvdata(pdev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = dma_set_coherent_mask(&amp;pdev-&gt;dev, PCI402_DMA_MASK);</div><div class='add'>+	if (err) {</div><div class='add'>+		pci_err(pdev, "DMA set mask failed!\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* The esdACC DMA engine needs the DMA buffer aligned to a 64k</div><div class='add'>+	 * boundary. The DMA API guarantees to align the returned buffer to the</div><div class='add'>+	 * smallest PAGE_SIZE order which is greater than or equal to the</div><div class='add'>+	 * requested size. With PCI402_DMA_SIZE == 64kB this suffices here.</div><div class='add'>+	 */</div><div class='add'>+	card-&gt;dma_buf = dma_alloc_coherent(&amp;pdev-&gt;dev, PCI402_DMA_SIZE,</div><div class='add'>+					   &amp;card-&gt;dma_hnd, GFP_KERNEL);</div><div class='add'>+	if (!card-&gt;dma_buf)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	acc_init_bm_ptr(&amp;card-&gt;ov, card-&gt;cores, card-&gt;dma_buf);</div><div class='add'>+</div><div class='add'>+	iowrite32(card-&gt;dma_hnd,</div><div class='add'>+		  card-&gt;addr_pciep + PCI402_PCIEP_OF_BM_ADDR_LO);</div><div class='add'>+	iowrite32(0, card-&gt;addr_pciep + PCI402_PCIEP_OF_BM_ADDR_HI);</div><div class='add'>+</div><div class='add'>+	pci_set_master(pdev);</div><div class='add'>+</div><div class='add'>+	acc_ov_set_bits(&amp;card-&gt;ov, ACC_OV_OF_MODE,</div><div class='add'>+			ACC_OV_REG_MODE_MASK_BM_ENABLE);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pci402_finish_dma(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct pci402_card *card = pci_get_drvdata(pdev);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	acc_ov_clear_bits(&amp;card-&gt;ov, ACC_OV_OF_MODE,</div><div class='add'>+			  ACC_OV_REG_MODE_MASK_BM_ENABLE);</div><div class='add'>+</div><div class='add'>+	pci_clear_master(pdev);</div><div class='add'>+</div><div class='add'>+	iowrite32(0, card-&gt;addr_pciep + PCI402_PCIEP_OF_BM_ADDR_LO);</div><div class='add'>+	iowrite32(0, card-&gt;addr_pciep + PCI402_PCIEP_OF_BM_ADDR_HI);</div><div class='add'>+</div><div class='add'>+	card-&gt;ov.bmfifo.messages = NULL;</div><div class='add'>+	card-&gt;ov.bmfifo.irq_cnt = NULL;</div><div class='add'>+	for (i = 0; i &lt; card-&gt;ov.active_cores; i++) {</div><div class='add'>+		struct acc_core *core = &amp;card-&gt;cores[i];</div><div class='add'>+</div><div class='add'>+		core-&gt;bmfifo.messages = NULL;</div><div class='add'>+		core-&gt;bmfifo.irq_cnt = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dma_free_coherent(&amp;pdev-&gt;dev, PCI402_DMA_SIZE, card-&gt;dma_buf,</div><div class='add'>+			  card-&gt;dma_hnd);</div><div class='add'>+	card-&gt;dma_buf = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pci402_unregister_core(struct acc_core *core)</div><div class='add'>+{</div><div class='add'>+	netdev_info(core-&gt;netdev, "unregister\n");</div><div class='add'>+	unregister_candev(core-&gt;netdev);</div><div class='add'>+</div><div class='add'>+	free_candev(core-&gt;netdev);</div><div class='add'>+	core-&gt;netdev = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pci402_init_cores(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct pci402_card *card = pci_get_drvdata(pdev);</div><div class='add'>+	int err;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; card-&gt;ov.active_cores; i++) {</div><div class='add'>+		struct acc_core *core = &amp;card-&gt;cores[i];</div><div class='add'>+		struct acc_net_priv *priv;</div><div class='add'>+		struct net_device *netdev;</div><div class='add'>+		u32 fifo_config;</div><div class='add'>+</div><div class='add'>+		core-&gt;addr = card-&gt;ov.addr + (i + 1) * PCI402_IO_LEN_CORE;</div><div class='add'>+</div><div class='add'>+		fifo_config = acc_read32(core, ACC_CORE_OF_TXFIFO_CONFIG);</div><div class='add'>+		core-&gt;tx_fifo_size = (fifo_config &gt;&gt; 24);</div><div class='add'>+		if (core-&gt;tx_fifo_size &lt;= 1) {</div><div class='add'>+			pci_err(pdev, "Invalid tx_fifo_size!\n");</div><div class='add'>+			err = -EINVAL;</div><div class='add'>+			goto failure;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		netdev = alloc_candev(sizeof(*priv), core-&gt;tx_fifo_size);</div><div class='add'>+		if (!netdev) {</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto failure;</div><div class='add'>+		}</div><div class='add'>+		core-&gt;netdev = netdev;</div><div class='add'>+</div><div class='add'>+		netdev-&gt;flags |= IFF_ECHO;</div><div class='add'>+		netdev-&gt;dev_port = i;</div><div class='add'>+		netdev-&gt;netdev_ops = &amp;pci402_acc_netdev_ops;</div><div class='add'>+		netdev-&gt;ethtool_ops = &amp;pci402_acc_ethtool_ops;</div><div class='add'>+		SET_NETDEV_DEV(netdev, &amp;pdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+		priv = netdev_priv(netdev);</div><div class='add'>+		priv-&gt;can.clock.freq = card-&gt;ov.core_frequency;</div><div class='add'>+		priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK |</div><div class='add'>+			CAN_CTRLMODE_LISTENONLY |</div><div class='add'>+			CAN_CTRLMODE_BERR_REPORTING |</div><div class='add'>+			CAN_CTRLMODE_CC_LEN8_DLC;</div><div class='add'>+		if (card-&gt;ov.features &amp; ACC_OV_REG_FEAT_MASK_DAR)</div><div class='add'>+			priv-&gt;can.ctrlmode_supported |= CAN_CTRLMODE_ONE_SHOT;</div><div class='add'>+		if (card-&gt;ov.features &amp; ACC_OV_REG_FEAT_MASK_CANFD)</div><div class='add'>+			priv-&gt;can.bittiming_const = &amp;pci402_bittiming_const_canfd;</div><div class='add'>+		else</div><div class='add'>+			priv-&gt;can.bittiming_const = &amp;pci402_bittiming_const;</div><div class='add'>+		priv-&gt;can.do_set_bittiming = acc_set_bittiming;</div><div class='add'>+		priv-&gt;can.do_set_mode = acc_set_mode;</div><div class='add'>+		priv-&gt;can.do_get_berr_counter = acc_get_berr_counter;</div><div class='add'>+</div><div class='add'>+		priv-&gt;core = core;</div><div class='add'>+		priv-&gt;ov = &amp;card-&gt;ov;</div><div class='add'>+</div><div class='add'>+		err = register_candev(netdev);</div><div class='add'>+		if (err) {</div><div class='add'>+			free_candev(core-&gt;netdev);</div><div class='add'>+			core-&gt;netdev = NULL;</div><div class='add'>+			goto failure;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		netdev_info(netdev, "registered\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+failure:</div><div class='add'>+	for (i--; i &gt;= 0; i--)</div><div class='add'>+		pci402_unregister_core(&amp;card-&gt;cores[i]);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pci402_finish_cores(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct pci402_card *card = pci_get_drvdata(pdev);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; card-&gt;ov.active_cores; i++)</div><div class='add'>+		pci402_unregister_core(&amp;card-&gt;cores[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pci402_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='add'>+{</div><div class='add'>+	struct pci402_card *card = NULL;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = pci_enable_device(pdev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	card = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*card), GFP_KERNEL);</div><div class='add'>+	if (!card) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto failure_disable_pci;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pci_set_drvdata(pdev, card);</div><div class='add'>+</div><div class='add'>+	err = pci_request_regions(pdev, pci_name(pdev));</div><div class='add'>+	if (err)</div><div class='add'>+		goto failure_disable_pci;</div><div class='add'>+</div><div class='add'>+	card-&gt;addr = pci_iomap(pdev, PCI402_BAR, PCI402_IO_LEN_TOTAL);</div><div class='add'>+	if (!card-&gt;addr) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto failure_release_regions;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = pci402_init_card(pdev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto failure_unmap;</div><div class='add'>+</div><div class='add'>+	err = pci402_init_dma(pdev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto failure_unmap;</div><div class='add'>+</div><div class='add'>+	err = pci402_init_interrupt(pdev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto failure_finish_dma;</div><div class='add'>+</div><div class='add'>+	err = pci402_init_cores(pdev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto failure_finish_interrupt;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+failure_finish_interrupt:</div><div class='add'>+	pci402_finish_interrupt(pdev);</div><div class='add'>+</div><div class='add'>+failure_finish_dma:</div><div class='add'>+	pci402_finish_dma(pdev);</div><div class='add'>+</div><div class='add'>+failure_unmap:</div><div class='add'>+	pci_iounmap(pdev, card-&gt;addr);</div><div class='add'>+</div><div class='add'>+failure_release_regions:</div><div class='add'>+	pci_release_regions(pdev);</div><div class='add'>+</div><div class='add'>+failure_disable_pci:</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pci402_remove(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct pci402_card *card = pci_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	pci402_finish_interrupt(pdev);</div><div class='add'>+	pci402_finish_cores(pdev);</div><div class='add'>+	pci402_finish_dma(pdev);</div><div class='add'>+	pci_iounmap(pdev, card-&gt;addr);</div><div class='add'>+	pci_release_regions(pdev);</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct pci_device_id pci402_tbl[] = {</div><div class='add'>+	{</div><div class='add'>+		.vendor = PCI_VENDOR_ID_ESDGMBH,</div><div class='add'>+		.device = ESD_PCI_DEVICE_ID_PCIE402,</div><div class='add'>+		.subvendor = PCI_VENDOR_ID_ESDGMBH,</div><div class='add'>+		.subdevice = PCI_ANY_ID,</div><div class='add'>+	},</div><div class='add'>+	{ 0, }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(pci, pci402_tbl);</div><div class='add'>+</div><div class='add'>+static struct pci_driver pci402_driver = {</div><div class='add'>+	.name = KBUILD_MODNAME,</div><div class='add'>+	.id_table = pci402_tbl,</div><div class='add'>+	.probe = pci402_probe,</div><div class='add'>+	.remove = pci402_remove,</div><div class='add'>+};</div><div class='add'>+module_pci_driver(pci402_driver);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("Socket-CAN driver for esd CAN 402 card family with esdACC core on PCIe");</div><div class='add'>+MODULE_AUTHOR("Thomas Körper &lt;socketcan@esd.eu&gt;");</div><div class='add'>+MODULE_AUTHOR("Stefan Mätje &lt;stefan.maetje@esd.eu&gt;");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/can/esd/esdacc.c b/drivers/net/can/esd/esdacc.c<br/>new file mode 100644<br/>index 000000000000..73e66f9a3781<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/esd/esdacc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/esd/esdacc.c</a></div><div class='hunk'>@@ -0,0 +1,769 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Copyright (C) 2015 - 2016 Thomas Körper, esd electronic system design gmbh</div><div class='add'>+ * Copyright (C) 2017 - 2023 Stefan Mätje, esd electronics gmbh</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "esdacc.h"</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/ktime.h&gt;</div><div class='add'>+</div><div class='add'>+/* esdACC ID register layout */</div><div class='add'>+#define ACC_ID_ID_MASK GENMASK(28, 0)</div><div class='add'>+#define ACC_ID_EFF_FLAG BIT(29)</div><div class='add'>+</div><div class='add'>+/* esdACC DLC register layout */</div><div class='add'>+#define ACC_DLC_DLC_MASK GENMASK(3, 0)</div><div class='add'>+#define ACC_DLC_RTR_FLAG BIT(4)</div><div class='add'>+#define ACC_DLC_SSTX_FLAG BIT(24)	/* Single Shot TX */</div><div class='add'>+</div><div class='add'>+/* esdACC DLC in struct acc_bmmsg_rxtxdone::acc_dlc.len only! */</div><div class='add'>+#define ACC_DLC_TXD_FLAG BIT(5)</div><div class='add'>+</div><div class='add'>+/* ecc value of esdACC equals SJA1000's ECC register */</div><div class='add'>+#define ACC_ECC_SEG 0x1f</div><div class='add'>+#define ACC_ECC_DIR 0x20</div><div class='add'>+#define ACC_ECC_BIT 0x00</div><div class='add'>+#define ACC_ECC_FORM 0x40</div><div class='add'>+#define ACC_ECC_STUFF 0x80</div><div class='add'>+#define ACC_ECC_MASK 0xc0</div><div class='add'>+</div><div class='add'>+/* esdACC Status Register bits. Unused bits not documented. */</div><div class='add'>+#define ACC_REG_STATUS_MASK_STATUS_ES BIT(17)</div><div class='add'>+#define ACC_REG_STATUS_MASK_STATUS_EP BIT(18)</div><div class='add'>+#define ACC_REG_STATUS_MASK_STATUS_BS BIT(19)</div><div class='add'>+</div><div class='add'>+/* esdACC Overview Module BM_IRQ_Mask register related defines */</div><div class='add'>+/*   Two bit wide command masks to mask or unmask a single core IRQ */</div><div class='add'>+#define ACC_BM_IRQ_UNMASK BIT(0)</div><div class='add'>+#define ACC_BM_IRQ_MASK (ACC_BM_IRQ_UNMASK &lt;&lt; 1)</div><div class='add'>+/*   Command to unmask all IRQ sources. Created by shifting</div><div class='add'>+ *   and oring the two bit wide ACC_BM_IRQ_UNMASK 16 times.</div><div class='add'>+ */</div><div class='add'>+#define ACC_BM_IRQ_UNMASK_ALL 0x55555555U</div><div class='add'>+</div><div class='add'>+static void acc_resetmode_enter(struct acc_core *core)</div><div class='add'>+{</div><div class='add'>+	acc_set_bits(core, ACC_CORE_OF_CTRL,</div><div class='add'>+		     ACC_REG_CTRL_MASK_RESETMODE);</div><div class='add'>+</div><div class='add'>+	/* Read back reset mode bit to flush PCI write posting */</div><div class='add'>+	acc_resetmode_entered(core);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void acc_resetmode_leave(struct acc_core *core)</div><div class='add'>+{</div><div class='add'>+	acc_clear_bits(core, ACC_CORE_OF_CTRL,</div><div class='add'>+		       ACC_REG_CTRL_MASK_RESETMODE);</div><div class='add'>+</div><div class='add'>+	/* Read back reset mode bit to flush PCI write posting */</div><div class='add'>+	acc_resetmode_entered(core);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void acc_txq_put(struct acc_core *core, u32 acc_id, u32 acc_dlc,</div><div class='add'>+			const void *data)</div><div class='add'>+{</div><div class='add'>+	acc_write32_noswap(core, ACC_CORE_OF_TXFIFO_DATA_1,</div><div class='add'>+			   *((const u32 *)(data + 4)));</div><div class='add'>+	acc_write32_noswap(core, ACC_CORE_OF_TXFIFO_DATA_0,</div><div class='add'>+			   *((const u32 *)data));</div><div class='add'>+	acc_write32(core, ACC_CORE_OF_TXFIFO_DLC, acc_dlc);</div><div class='add'>+	/* CAN id must be written at last. This write starts TX. */</div><div class='add'>+	acc_write32(core, ACC_CORE_OF_TXFIFO_ID, acc_id);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 acc_tx_fifo_next(struct acc_core *core, u8 tx_fifo_idx)</div><div class='add'>+{</div><div class='add'>+	++tx_fifo_idx;</div><div class='add'>+	if (tx_fifo_idx &gt;= core-&gt;tx_fifo_size)</div><div class='add'>+		tx_fifo_idx = 0U;</div><div class='add'>+	return tx_fifo_idx;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Convert timestamp from esdACC time stamp ticks to ns</div><div class='add'>+ *</div><div class='add'>+ * The conversion factor ts2ns from time stamp counts to ns is basically</div><div class='add'>+ *	ts2ns = NSEC_PER_SEC / timestamp_frequency</div><div class='add'>+ *</div><div class='add'>+ * We handle here only a fixed timestamp frequency of 80MHz. The</div><div class='add'>+ * resulting ts2ns factor would be 12.5.</div><div class='add'>+ *</div><div class='add'>+ * At the end we multiply by 12 and add the half of the HW timestamp</div><div class='add'>+ * to get a multiplication by 12.5. This way any overflow is</div><div class='add'>+ * avoided until ktime_t itself overflows.</div><div class='add'>+ */</div><div class='add'>+#define ACC_TS_FACTOR (NSEC_PER_SEC / ACC_TS_FREQ_80MHZ)</div><div class='add'>+#define ACC_TS_80MHZ_SHIFT 1</div><div class='add'>+</div><div class='add'>+static ktime_t acc_ts2ktime(struct acc_ov *ov, u64 ts)</div><div class='add'>+{</div><div class='add'>+	u64 ns;</div><div class='add'>+</div><div class='add'>+	ns = (ts * ACC_TS_FACTOR) + (ts &gt;&gt; ACC_TS_80MHZ_SHIFT);</div><div class='add'>+</div><div class='add'>+	return ns_to_ktime(ns);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#undef ACC_TS_FACTOR</div><div class='add'>+#undef ACC_TS_80MHZ_SHIFT</div><div class='add'>+</div><div class='add'>+void acc_init_ov(struct acc_ov *ov, struct device *dev)</div><div class='add'>+{</div><div class='add'>+	u32 temp;</div><div class='add'>+</div><div class='add'>+	temp = acc_ov_read32(ov, ACC_OV_OF_VERSION);</div><div class='add'>+	ov-&gt;version = temp;</div><div class='add'>+	ov-&gt;features = (temp &gt;&gt; 16);</div><div class='add'>+</div><div class='add'>+	temp = acc_ov_read32(ov, ACC_OV_OF_INFO);</div><div class='add'>+	ov-&gt;total_cores = temp;</div><div class='add'>+	ov-&gt;active_cores = (temp &gt;&gt; 8);</div><div class='add'>+</div><div class='add'>+	ov-&gt;core_frequency = acc_ov_read32(ov, ACC_OV_OF_CANCORE_FREQ);</div><div class='add'>+	ov-&gt;timestamp_frequency = acc_ov_read32(ov, ACC_OV_OF_TS_FREQ_LO);</div><div class='add'>+</div><div class='add'>+	/* Depending on esdACC feature NEW_PSC enable the new prescaler</div><div class='add'>+	 * or adjust core_frequency according to the implicit division by 2.</div><div class='add'>+	 */</div><div class='add'>+	if (ov-&gt;features &amp; ACC_OV_REG_FEAT_MASK_NEW_PSC) {</div><div class='add'>+		acc_ov_set_bits(ov, ACC_OV_OF_MODE,</div><div class='add'>+				ACC_OV_REG_MODE_MASK_NEW_PSC_ENABLE);</div><div class='add'>+	} else {</div><div class='add'>+		ov-&gt;core_frequency /= 2;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(dev,</div><div class='add'>+		"esdACC v%u, freq: %u/%u, feat/strap: 0x%x/0x%x, cores: %u/%u\n",</div><div class='add'>+		ov-&gt;version, ov-&gt;core_frequency, ov-&gt;timestamp_frequency,</div><div class='add'>+		ov-&gt;features, acc_ov_read32(ov, ACC_OV_OF_INFO) &gt;&gt; 16,</div><div class='add'>+		ov-&gt;active_cores, ov-&gt;total_cores);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void acc_init_bm_ptr(struct acc_ov *ov, struct acc_core *cores, const void *mem)</div><div class='add'>+{</div><div class='add'>+	unsigned int u;</div><div class='add'>+</div><div class='add'>+	/* DMA buffer layout as follows where N is the number of CAN cores</div><div class='add'>+	 * implemented in the FPGA, i.e. N = ov-&gt;total_cores</div><div class='add'>+	 *</div><div class='add'>+	 *  Section Layout           Section size</div><div class='add'>+	 * ----------------------------------------------</div><div class='add'>+	 *  FIFO Card/Overview	     ACC_CORE_DMABUF_SIZE</div><div class='add'>+	 *  FIFO Core0               ACC_CORE_DMABUF_SIZE</div><div class='add'>+	 *  ...                      ...</div><div class='add'>+	 *  FIFO CoreN               ACC_CORE_DMABUF_SIZE</div><div class='add'>+	 *  irq_cnt Card/Overview    sizeof(u32)</div><div class='add'>+	 *  irq_cnt Core0            sizeof(u32)</div><div class='add'>+	 *  ...                      ...</div><div class='add'>+	 *  irq_cnt CoreN            sizeof(u32)</div><div class='add'>+	 */</div><div class='add'>+	ov-&gt;bmfifo.messages = mem;</div><div class='add'>+	ov-&gt;bmfifo.irq_cnt = mem + (ov-&gt;total_cores + 1U) * ACC_CORE_DMABUF_SIZE;</div><div class='add'>+</div><div class='add'>+	for (u = 0U; u &lt; ov-&gt;active_cores; u++) {</div><div class='add'>+		struct acc_core *core = &amp;cores[u];</div><div class='add'>+</div><div class='add'>+		core-&gt;bmfifo.messages = mem + (u + 1U) * ACC_CORE_DMABUF_SIZE;</div><div class='add'>+		core-&gt;bmfifo.irq_cnt = ov-&gt;bmfifo.irq_cnt + (u + 1U);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int acc_open(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct acc_net_priv *priv = netdev_priv(netdev);</div><div class='add'>+	struct acc_core *core = priv-&gt;core;</div><div class='add'>+	u32 tx_fifo_status;</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Retry to enter RESET mode if out of sync. */</div><div class='add'>+	if (priv-&gt;can.state != CAN_STATE_STOPPED) {</div><div class='add'>+		netdev_warn(netdev, "Entered %s() with bad can.state: %s\n",</div><div class='add'>+			    __func__, can_get_state_str(priv-&gt;can.state));</div><div class='add'>+		acc_resetmode_enter(core);</div><div class='add'>+		priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = open_candev(netdev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	ctrl = ACC_REG_CTRL_MASK_IE_RXTX |</div><div class='add'>+		ACC_REG_CTRL_MASK_IE_TXERROR |</div><div class='add'>+		ACC_REG_CTRL_MASK_IE_ERRWARN |</div><div class='add'>+		ACC_REG_CTRL_MASK_IE_OVERRUN |</div><div class='add'>+		ACC_REG_CTRL_MASK_IE_ERRPASS;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING)</div><div class='add'>+		ctrl |= ACC_REG_CTRL_MASK_IE_BUSERR;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LISTENONLY)</div><div class='add'>+		ctrl |= ACC_REG_CTRL_MASK_LOM;</div><div class='add'>+</div><div class='add'>+	acc_set_bits(core, ACC_CORE_OF_CTRL, ctrl);</div><div class='add'>+</div><div class='add'>+	acc_resetmode_leave(core);</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+</div><div class='add'>+	/* Resync TX FIFO indices to HW state after (re-)start. */</div><div class='add'>+	tx_fifo_status = acc_read32(core, ACC_CORE_OF_TXFIFO_STATUS);</div><div class='add'>+	core-&gt;tx_fifo_head = tx_fifo_status &amp; 0xff;</div><div class='add'>+	core-&gt;tx_fifo_tail = (tx_fifo_status &gt;&gt; 8) &amp; 0xff;</div><div class='add'>+</div><div class='add'>+	netif_start_queue(netdev);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int acc_close(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct acc_net_priv *priv = netdev_priv(netdev);</div><div class='add'>+	struct acc_core *core = priv-&gt;core;</div><div class='add'>+</div><div class='add'>+	acc_clear_bits(core, ACC_CORE_OF_CTRL,</div><div class='add'>+		       ACC_REG_CTRL_MASK_IE_RXTX |</div><div class='add'>+		       ACC_REG_CTRL_MASK_IE_TXERROR |</div><div class='add'>+		       ACC_REG_CTRL_MASK_IE_ERRWARN |</div><div class='add'>+		       ACC_REG_CTRL_MASK_IE_OVERRUN |</div><div class='add'>+		       ACC_REG_CTRL_MASK_IE_ERRPASS |</div><div class='add'>+		       ACC_REG_CTRL_MASK_IE_BUSERR);</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(netdev);</div><div class='add'>+	acc_resetmode_enter(core);</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='add'>+</div><div class='add'>+	/* Mark pending TX requests to be aborted after controller restart. */</div><div class='add'>+	acc_write32(core, ACC_CORE_OF_TX_ABORT_MASK, 0xffff);</div><div class='add'>+</div><div class='add'>+	/* ACC_REG_CTRL_MASK_LOM is only accessible in RESET mode */</div><div class='add'>+	acc_clear_bits(core, ACC_CORE_OF_CTRL,</div><div class='add'>+		       ACC_REG_CTRL_MASK_LOM);</div><div class='add'>+</div><div class='add'>+	close_candev(netdev);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+netdev_tx_t acc_start_xmit(struct sk_buff *skb, struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct acc_net_priv *priv = netdev_priv(netdev);</div><div class='add'>+	struct acc_core *core = priv-&gt;core;</div><div class='add'>+	struct can_frame *cf = (struct can_frame *)skb-&gt;data;</div><div class='add'>+	u8 tx_fifo_head = core-&gt;tx_fifo_head;</div><div class='add'>+	int fifo_usage;</div><div class='add'>+	u32 acc_id;</div><div class='add'>+	u32 acc_dlc;</div><div class='add'>+</div><div class='add'>+	if (can_dev_dropped_skb(netdev, skb))</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+	/* Access core-&gt;tx_fifo_tail only once because it may be changed</div><div class='add'>+	 * from the interrupt level.</div><div class='add'>+	 */</div><div class='add'>+	fifo_usage = tx_fifo_head - core-&gt;tx_fifo_tail;</div><div class='add'>+	if (fifo_usage &lt; 0)</div><div class='add'>+		fifo_usage += core-&gt;tx_fifo_size;</div><div class='add'>+</div><div class='add'>+	if (fifo_usage &gt;= core-&gt;tx_fifo_size - 1) {</div><div class='add'>+		netdev_err(core-&gt;netdev,</div><div class='add'>+			   "BUG: TX ring full when queue awake!\n");</div><div class='add'>+		netif_stop_queue(netdev);</div><div class='add'>+		return NETDEV_TX_BUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (fifo_usage == core-&gt;tx_fifo_size - 2)</div><div class='add'>+		netif_stop_queue(netdev);</div><div class='add'>+</div><div class='add'>+	acc_dlc = can_get_cc_dlc(cf, priv-&gt;can.ctrlmode);</div><div class='add'>+	if (cf-&gt;can_id &amp; CAN_RTR_FLAG)</div><div class='add'>+		acc_dlc |= ACC_DLC_RTR_FLAG;</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_ONE_SHOT)</div><div class='add'>+		acc_dlc |= ACC_DLC_SSTX_FLAG;</div><div class='add'>+</div><div class='add'>+	if (cf-&gt;can_id &amp; CAN_EFF_FLAG) {</div><div class='add'>+		acc_id = cf-&gt;can_id &amp; CAN_EFF_MASK;</div><div class='add'>+		acc_id |= ACC_ID_EFF_FLAG;</div><div class='add'>+	} else {</div><div class='add'>+		acc_id = cf-&gt;can_id &amp; CAN_SFF_MASK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	can_put_echo_skb(skb, netdev, core-&gt;tx_fifo_head, 0);</div><div class='add'>+</div><div class='add'>+	core-&gt;tx_fifo_head = acc_tx_fifo_next(core, tx_fifo_head);</div><div class='add'>+</div><div class='add'>+	acc_txq_put(core, acc_id, acc_dlc, cf-&gt;data);</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int acc_get_berr_counter(const struct net_device *netdev,</div><div class='add'>+			 struct can_berr_counter *bec)</div><div class='add'>+{</div><div class='add'>+	struct acc_net_priv *priv = netdev_priv(netdev);</div><div class='add'>+	u32 core_status = acc_read32(priv-&gt;core, ACC_CORE_OF_STATUS);</div><div class='add'>+</div><div class='add'>+	bec-&gt;txerr = (core_status &gt;&gt; 8) &amp; 0xff;</div><div class='add'>+	bec-&gt;rxerr = core_status &amp; 0xff;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int acc_set_mode(struct net_device *netdev, enum can_mode mode)</div><div class='add'>+{</div><div class='add'>+	struct acc_net_priv *priv = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case CAN_MODE_START:</div><div class='add'>+		/* Paranoid FIFO index check. */</div><div class='add'>+		{</div><div class='add'>+			const u32 tx_fifo_status =</div><div class='add'>+				acc_read32(priv-&gt;core, ACC_CORE_OF_TXFIFO_STATUS);</div><div class='add'>+			const u8 hw_fifo_head = tx_fifo_status;</div><div class='add'>+</div><div class='add'>+			if (hw_fifo_head != priv-&gt;core-&gt;tx_fifo_head ||</div><div class='add'>+			    hw_fifo_head != priv-&gt;core-&gt;tx_fifo_tail) {</div><div class='add'>+				netdev_warn(netdev,</div><div class='add'>+					    "TX FIFO mismatch: T %2u H %2u; TFHW %#08x\n",</div><div class='add'>+					    priv-&gt;core-&gt;tx_fifo_tail,</div><div class='add'>+					    priv-&gt;core-&gt;tx_fifo_head,</div><div class='add'>+					    tx_fifo_status);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		acc_resetmode_leave(priv-&gt;core);</div><div class='add'>+		/* To leave the bus-off state the esdACC controller begins</div><div class='add'>+		 * here a grace period where it counts 128 "idle conditions" (each</div><div class='add'>+		 * of 11 consecutive recessive bits) on the bus as required</div><div class='add'>+		 * by the CAN spec.</div><div class='add'>+		 *</div><div class='add'>+		 * During this time the TX FIFO may still contain already</div><div class='add'>+		 * aborted "zombie" frames that are only drained from the FIFO</div><div class='add'>+		 * at the end of the grace period.</div><div class='add'>+		 *</div><div class='add'>+		 * To not to interfere with this drain process we don't</div><div class='add'>+		 * call netif_wake_queue() here. When the controller reaches</div><div class='add'>+		 * the error-active state again, it informs us about that</div><div class='add'>+		 * with an acc_bmmsg_errstatechange message. Then</div><div class='add'>+		 * netif_wake_queue() is called from</div><div class='add'>+		 * handle_core_msg_errstatechange() instead.</div><div class='add'>+		 */</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int acc_set_bittiming(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct acc_net_priv *priv = netdev_priv(netdev);</div><div class='add'>+	const struct can_bittiming *bt = &amp;priv-&gt;can.bittiming;</div><div class='add'>+	u32 brp;</div><div class='add'>+	u32 btr;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;ov-&gt;features &amp; ACC_OV_REG_FEAT_MASK_CANFD) {</div><div class='add'>+		u32 fbtr = 0;</div><div class='add'>+</div><div class='add'>+		netdev_dbg(netdev, "bit timing: brp %u, prop %u, ph1 %u ph2 %u, sjw %u\n",</div><div class='add'>+			   bt-&gt;brp, bt-&gt;prop_seg,</div><div class='add'>+			   bt-&gt;phase_seg1, bt-&gt;phase_seg2, bt-&gt;sjw);</div><div class='add'>+</div><div class='add'>+		brp = FIELD_PREP(ACC_REG_BRP_FD_MASK_BRP, bt-&gt;brp - 1);</div><div class='add'>+</div><div class='add'>+		btr = FIELD_PREP(ACC_REG_BTR_FD_MASK_TSEG1, bt-&gt;phase_seg1 + bt-&gt;prop_seg - 1);</div><div class='add'>+		btr |= FIELD_PREP(ACC_REG_BTR_FD_MASK_TSEG2, bt-&gt;phase_seg2 - 1);</div><div class='add'>+		btr |= FIELD_PREP(ACC_REG_BTR_FD_MASK_SJW, bt-&gt;sjw - 1);</div><div class='add'>+</div><div class='add'>+		/* Keep order of accesses to ACC_CORE_OF_BRP and ACC_CORE_OF_BTR. */</div><div class='add'>+		acc_write32(priv-&gt;core, ACC_CORE_OF_BRP, brp);</div><div class='add'>+		acc_write32(priv-&gt;core, ACC_CORE_OF_BTR, btr);</div><div class='add'>+</div><div class='add'>+		netdev_dbg(netdev, "esdACC: BRP %u, NBTR 0x%08x, DBTR 0x%08x",</div><div class='add'>+			   brp, btr, fbtr);</div><div class='add'>+	} else {</div><div class='add'>+		netdev_dbg(netdev, "bit timing: brp %u, prop %u, ph1 %u ph2 %u, sjw %u\n",</div><div class='add'>+			   bt-&gt;brp, bt-&gt;prop_seg,</div><div class='add'>+			   bt-&gt;phase_seg1, bt-&gt;phase_seg2, bt-&gt;sjw);</div><div class='add'>+</div><div class='add'>+		brp = FIELD_PREP(ACC_REG_BRP_CL_MASK_BRP, bt-&gt;brp - 1);</div><div class='add'>+</div><div class='add'>+		btr = FIELD_PREP(ACC_REG_BTR_CL_MASK_TSEG1, bt-&gt;phase_seg1 + bt-&gt;prop_seg - 1);</div><div class='add'>+		btr |= FIELD_PREP(ACC_REG_BTR_CL_MASK_TSEG2, bt-&gt;phase_seg2 - 1);</div><div class='add'>+		btr |= FIELD_PREP(ACC_REG_BTR_CL_MASK_SJW, bt-&gt;sjw - 1);</div><div class='add'>+</div><div class='add'>+		/* Keep order of accesses to ACC_CORE_OF_BRP and ACC_CORE_OF_BTR. */</div><div class='add'>+		acc_write32(priv-&gt;core, ACC_CORE_OF_BRP, brp);</div><div class='add'>+		acc_write32(priv-&gt;core, ACC_CORE_OF_BTR, btr);</div><div class='add'>+</div><div class='add'>+		netdev_dbg(netdev, "esdACC: BRP %u, BTR 0x%08x", brp, btr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void handle_core_msg_rxtxdone(struct acc_core *core,</div><div class='add'>+				     const struct acc_bmmsg_rxtxdone *msg)</div><div class='add'>+{</div><div class='add'>+	struct acc_net_priv *priv = netdev_priv(core-&gt;netdev);</div><div class='add'>+	struct net_device_stats *stats = &amp;core-&gt;netdev-&gt;stats;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	if (msg-&gt;acc_dlc.len &amp; ACC_DLC_TXD_FLAG) {</div><div class='add'>+		u8 tx_fifo_tail = core-&gt;tx_fifo_tail;</div><div class='add'>+</div><div class='add'>+		if (core-&gt;tx_fifo_head == tx_fifo_tail) {</div><div class='add'>+			netdev_warn(core-&gt;netdev,</div><div class='add'>+				    "TX interrupt, but queue is empty!?\n");</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Direct access echo skb to attach HW time stamp. */</div><div class='add'>+		skb = priv-&gt;can.echo_skb[tx_fifo_tail];</div><div class='add'>+		if (skb) {</div><div class='add'>+			skb_hwtstamps(skb)-&gt;hwtstamp =</div><div class='add'>+				acc_ts2ktime(priv-&gt;ov, msg-&gt;ts);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		stats-&gt;tx_packets++;</div><div class='add'>+		stats-&gt;tx_bytes += can_get_echo_skb(core-&gt;netdev, tx_fifo_tail,</div><div class='add'>+						    NULL);</div><div class='add'>+</div><div class='add'>+		core-&gt;tx_fifo_tail = acc_tx_fifo_next(core, tx_fifo_tail);</div><div class='add'>+</div><div class='add'>+		netif_wake_queue(core-&gt;netdev);</div><div class='add'>+</div><div class='add'>+	} else {</div><div class='add'>+		struct can_frame *cf;</div><div class='add'>+</div><div class='add'>+		skb = alloc_can_skb(core-&gt;netdev, &amp;cf);</div><div class='add'>+		if (!skb) {</div><div class='add'>+			stats-&gt;rx_dropped++;</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		cf-&gt;can_id = msg-&gt;id &amp; ACC_ID_ID_MASK;</div><div class='add'>+		if (msg-&gt;id &amp; ACC_ID_EFF_FLAG)</div><div class='add'>+			cf-&gt;can_id |= CAN_EFF_FLAG;</div><div class='add'>+</div><div class='add'>+		can_frame_set_cc_len(cf, msg-&gt;acc_dlc.len &amp; ACC_DLC_DLC_MASK,</div><div class='add'>+				     priv-&gt;can.ctrlmode);</div><div class='add'>+</div><div class='add'>+		if (msg-&gt;acc_dlc.len &amp; ACC_DLC_RTR_FLAG) {</div><div class='add'>+			cf-&gt;can_id |= CAN_RTR_FLAG;</div><div class='add'>+		} else {</div><div class='add'>+			memcpy(cf-&gt;data, msg-&gt;data, cf-&gt;len);</div><div class='add'>+			stats-&gt;rx_bytes += cf-&gt;len;</div><div class='add'>+		}</div><div class='add'>+		stats-&gt;rx_packets++;</div><div class='add'>+</div><div class='add'>+		skb_hwtstamps(skb)-&gt;hwtstamp = acc_ts2ktime(priv-&gt;ov, msg-&gt;ts);</div><div class='add'>+</div><div class='add'>+		netif_rx(skb);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void handle_core_msg_txabort(struct acc_core *core,</div><div class='add'>+				    const struct acc_bmmsg_txabort *msg)</div><div class='add'>+{</div><div class='add'>+	struct net_device_stats *stats = &amp;core-&gt;netdev-&gt;stats;</div><div class='add'>+	u8 tx_fifo_tail = core-&gt;tx_fifo_tail;</div><div class='add'>+	u32 abort_mask = msg-&gt;abort_mask;   /* u32 extend to avoid warnings later */</div><div class='add'>+</div><div class='add'>+	/* The abort_mask shows which frames were aborted in esdACC's FIFO. */</div><div class='add'>+	while (tx_fifo_tail != core-&gt;tx_fifo_head &amp;&amp; (abort_mask)) {</div><div class='add'>+		const u32 tail_mask = (1U &lt;&lt; tx_fifo_tail);</div><div class='add'>+</div><div class='add'>+		if (!(abort_mask &amp; tail_mask))</div><div class='add'>+			break;</div><div class='add'>+		abort_mask &amp;= ~tail_mask;</div><div class='add'>+</div><div class='add'>+		can_free_echo_skb(core-&gt;netdev, tx_fifo_tail, NULL);</div><div class='add'>+		stats-&gt;tx_dropped++;</div><div class='add'>+		stats-&gt;tx_aborted_errors++;</div><div class='add'>+</div><div class='add'>+		tx_fifo_tail = acc_tx_fifo_next(core, tx_fifo_tail);</div><div class='add'>+	}</div><div class='add'>+	core-&gt;tx_fifo_tail = tx_fifo_tail;</div><div class='add'>+	if (abort_mask)</div><div class='add'>+		netdev_warn(core-&gt;netdev, "Unhandled aborted messages\n");</div><div class='add'>+</div><div class='add'>+	if (!acc_resetmode_entered(core))</div><div class='add'>+		netif_wake_queue(core-&gt;netdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void handle_core_msg_overrun(struct acc_core *core,</div><div class='add'>+				    const struct acc_bmmsg_overrun *msg)</div><div class='add'>+{</div><div class='add'>+	struct acc_net_priv *priv = netdev_priv(core-&gt;netdev);</div><div class='add'>+	struct net_device_stats *stats = &amp;core-&gt;netdev-&gt;stats;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	/* lost_cnt may be 0 if not supported by esdACC version */</div><div class='add'>+	if (msg-&gt;lost_cnt) {</div><div class='add'>+		stats-&gt;rx_errors += msg-&gt;lost_cnt;</div><div class='add'>+		stats-&gt;rx_over_errors += msg-&gt;lost_cnt;</div><div class='add'>+	} else {</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+		stats-&gt;rx_over_errors++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_err_skb(core-&gt;netdev, &amp;cf);</div><div class='add'>+	if (!skb)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='add'>+	cf-&gt;data[1] = CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='add'>+</div><div class='add'>+	skb_hwtstamps(skb)-&gt;hwtstamp = acc_ts2ktime(priv-&gt;ov, msg-&gt;ts);</div><div class='add'>+</div><div class='add'>+	netif_rx(skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void handle_core_msg_buserr(struct acc_core *core,</div><div class='add'>+				   const struct acc_bmmsg_buserr *msg)</div><div class='add'>+{</div><div class='add'>+	struct acc_net_priv *priv = netdev_priv(core-&gt;netdev);</div><div class='add'>+	struct net_device_stats *stats = &amp;core-&gt;netdev-&gt;stats;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	const u32 reg_status = msg-&gt;reg_status;</div><div class='add'>+	const u8 rxerr = reg_status;</div><div class='add'>+	const u8 txerr = (reg_status &gt;&gt; 8);</div><div class='add'>+	u8 can_err_prot_type = 0U;</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.can_stats.bus_error++;</div><div class='add'>+</div><div class='add'>+	/* Error occurred during transmission? */</div><div class='add'>+	if (msg-&gt;ecc &amp; ACC_ECC_DIR) {</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+	} else {</div><div class='add'>+		can_err_prot_type |= CAN_ERR_PROT_TX;</div><div class='add'>+		stats-&gt;tx_errors++;</div><div class='add'>+	}</div><div class='add'>+	/* Determine error type */</div><div class='add'>+	switch (msg-&gt;ecc &amp; ACC_ECC_MASK) {</div><div class='add'>+	case ACC_ECC_BIT:</div><div class='add'>+		can_err_prot_type |= CAN_ERR_PROT_BIT;</div><div class='add'>+		break;</div><div class='add'>+	case ACC_ECC_FORM:</div><div class='add'>+		can_err_prot_type |= CAN_ERR_PROT_FORM;</div><div class='add'>+		break;</div><div class='add'>+	case ACC_ECC_STUFF:</div><div class='add'>+		can_err_prot_type |= CAN_ERR_PROT_STUFF;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		can_err_prot_type |= CAN_ERR_PROT_UNSPEC;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_err_skb(core-&gt;netdev, &amp;cf);</div><div class='add'>+	if (!skb)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR | CAN_ERR_CNT;</div><div class='add'>+</div><div class='add'>+	/* Set protocol error type */</div><div class='add'>+	cf-&gt;data[2] = can_err_prot_type;</div><div class='add'>+	/* Set error location */</div><div class='add'>+	cf-&gt;data[3] = msg-&gt;ecc &amp; ACC_ECC_SEG;</div><div class='add'>+</div><div class='add'>+	/* Insert CAN TX and RX error counters. */</div><div class='add'>+	cf-&gt;data[6] = txerr;</div><div class='add'>+	cf-&gt;data[7] = rxerr;</div><div class='add'>+</div><div class='add'>+	skb_hwtstamps(skb)-&gt;hwtstamp = acc_ts2ktime(priv-&gt;ov, msg-&gt;ts);</div><div class='add'>+</div><div class='add'>+	netif_rx(skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+handle_core_msg_errstatechange(struct acc_core *core,</div><div class='add'>+			       const struct acc_bmmsg_errstatechange *msg)</div><div class='add'>+{</div><div class='add'>+	struct acc_net_priv *priv = netdev_priv(core-&gt;netdev);</div><div class='add'>+	struct can_frame *cf = NULL;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	const u32 reg_status = msg-&gt;reg_status;</div><div class='add'>+	const u8 rxerr = reg_status;</div><div class='add'>+	const u8 txerr = (reg_status &gt;&gt; 8);</div><div class='add'>+	enum can_state new_state;</div><div class='add'>+</div><div class='add'>+	if (reg_status &amp; ACC_REG_STATUS_MASK_STATUS_BS) {</div><div class='add'>+		new_state = CAN_STATE_BUS_OFF;</div><div class='add'>+	} else if (reg_status &amp; ACC_REG_STATUS_MASK_STATUS_EP) {</div><div class='add'>+		new_state = CAN_STATE_ERROR_PASSIVE;</div><div class='add'>+	} else if (reg_status &amp; ACC_REG_STATUS_MASK_STATUS_ES) {</div><div class='add'>+		new_state = CAN_STATE_ERROR_WARNING;</div><div class='add'>+	} else {</div><div class='add'>+		new_state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+		if (priv-&gt;can.state == CAN_STATE_BUS_OFF) {</div><div class='add'>+			/* See comment in acc_set_mode() for CAN_MODE_START */</div><div class='add'>+			netif_wake_queue(core-&gt;netdev);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_err_skb(core-&gt;netdev, &amp;cf);</div><div class='add'>+</div><div class='add'>+	if (new_state != priv-&gt;can.state) {</div><div class='add'>+		enum can_state tx_state, rx_state;</div><div class='add'>+</div><div class='add'>+		tx_state = (txerr &gt;= rxerr) ?</div><div class='add'>+			new_state : CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+		rx_state = (rxerr &gt;= txerr) ?</div><div class='add'>+			new_state : CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+</div><div class='add'>+		/* Always call can_change_state() to update the state</div><div class='add'>+		 * even if alloc_can_err_skb() may have failed.</div><div class='add'>+		 * can_change_state() can cope with a NULL cf pointer.</div><div class='add'>+		 */</div><div class='add'>+		can_change_state(core-&gt;netdev, cf, tx_state, rx_state);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (skb) {</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_CNT;</div><div class='add'>+		cf-&gt;data[6] = txerr;</div><div class='add'>+		cf-&gt;data[7] = rxerr;</div><div class='add'>+</div><div class='add'>+		skb_hwtstamps(skb)-&gt;hwtstamp = acc_ts2ktime(priv-&gt;ov, msg-&gt;ts);</div><div class='add'>+</div><div class='add'>+		netif_rx(skb);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (new_state == CAN_STATE_BUS_OFF) {</div><div class='add'>+		acc_write32(core, ACC_CORE_OF_TX_ABORT_MASK, 0xffff);</div><div class='add'>+		can_bus_off(core-&gt;netdev);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void handle_core_interrupt(struct acc_core *core)</div><div class='add'>+{</div><div class='add'>+	u32 msg_fifo_head = core-&gt;bmfifo.local_irq_cnt &amp; 0xff;</div><div class='add'>+</div><div class='add'>+	while (core-&gt;bmfifo.msg_fifo_tail != msg_fifo_head) {</div><div class='add'>+		const union acc_bmmsg *msg =</div><div class='add'>+			&amp;core-&gt;bmfifo.messages[core-&gt;bmfifo.msg_fifo_tail];</div><div class='add'>+</div><div class='add'>+		switch (msg-&gt;msg_id) {</div><div class='add'>+		case BM_MSG_ID_RXTXDONE:</div><div class='add'>+			handle_core_msg_rxtxdone(core, &amp;msg-&gt;rxtxdone);</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case BM_MSG_ID_TXABORT:</div><div class='add'>+			handle_core_msg_txabort(core, &amp;msg-&gt;txabort);</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case BM_MSG_ID_OVERRUN:</div><div class='add'>+			handle_core_msg_overrun(core, &amp;msg-&gt;overrun);</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case BM_MSG_ID_BUSERR:</div><div class='add'>+			handle_core_msg_buserr(core, &amp;msg-&gt;buserr);</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case BM_MSG_ID_ERRPASSIVE:</div><div class='add'>+		case BM_MSG_ID_ERRWARN:</div><div class='add'>+			handle_core_msg_errstatechange(core,</div><div class='add'>+						       &amp;msg-&gt;errstatechange);</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		default:</div><div class='add'>+			/* Ignore all other BM messages (like the CAN-FD messages) */</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		core-&gt;bmfifo.msg_fifo_tail =</div><div class='add'>+				(core-&gt;bmfifo.msg_fifo_tail + 1) &amp; 0xff;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * acc_card_interrupt() - handle the interrupts of an esdACC FPGA</div><div class='add'>+ *</div><div class='add'>+ * @ov: overview module structure</div><div class='add'>+ * @cores: array of core structures</div><div class='add'>+ *</div><div class='add'>+ * This function handles all interrupts pending for the overview module and the</div><div class='add'>+ * CAN cores of the esdACC FPGA.</div><div class='add'>+ *</div><div class='add'>+ * It examines for all cores (the overview module core and the CAN cores)</div><div class='add'>+ * the bmfifo.irq_cnt and compares it with the previously saved</div><div class='add'>+ * bmfifo.local_irq_cnt. An IRQ is pending if they differ. The esdACC FPGA</div><div class='add'>+ * updates the bmfifo.irq_cnt values by DMA.</div><div class='add'>+ *</div><div class='add'>+ * The pending interrupts are masked by writing to the IRQ mask register at</div><div class='add'>+ * ACC_OV_OF_BM_IRQ_MASK. This register has for each core a two bit command</div><div class='add'>+ * field evaluated as follows:</div><div class='add'>+ *</div><div class='add'>+ * Define,   bit pattern: meaning</div><div class='add'>+ *                    00: no action</div><div class='add'>+ * ACC_BM_IRQ_UNMASK, 01: unmask interrupt</div><div class='add'>+ * ACC_BM_IRQ_MASK,   10: mask interrupt</div><div class='add'>+ *                    11: no action</div><div class='add'>+ *</div><div class='add'>+ * For each CAN core with a pending IRQ handle_core_interrupt() handles all</div><div class='add'>+ * busmaster messages from the message FIFO. The last handled message (FIFO</div><div class='add'>+ * index) is written to the CAN core to acknowledge its handling.</div><div class='add'>+ *</div><div class='add'>+ * Last step is to unmask all interrupts in the FPGA using</div><div class='add'>+ * ACC_BM_IRQ_UNMASK_ALL.</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ *	IRQ_HANDLED, if card generated an interrupt that was handled</div><div class='add'>+ *	IRQ_NONE, if the interrupt is not ours</div><div class='add'>+ */</div><div class='add'>+irqreturn_t acc_card_interrupt(struct acc_ov *ov, struct acc_core *cores)</div><div class='add'>+{</div><div class='add'>+	u32 irqmask;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* First we look for whom interrupts are pending, card/overview</div><div class='add'>+	 * or any of the cores. Two bits in irqmask are used for each;</div><div class='add'>+	 * Each two bit field is set to ACC_BM_IRQ_MASK if an IRQ is</div><div class='add'>+	 * pending.</div><div class='add'>+	 */</div><div class='add'>+	irqmask = 0U;</div><div class='add'>+	if (READ_ONCE(*ov-&gt;bmfifo.irq_cnt) != ov-&gt;bmfifo.local_irq_cnt) {</div><div class='add'>+		irqmask |= ACC_BM_IRQ_MASK;</div><div class='add'>+		ov-&gt;bmfifo.local_irq_cnt = READ_ONCE(*ov-&gt;bmfifo.irq_cnt);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ov-&gt;active_cores; i++) {</div><div class='add'>+		struct acc_core *core = &amp;cores[i];</div><div class='add'>+</div><div class='add'>+		if (READ_ONCE(*core-&gt;bmfifo.irq_cnt) != core-&gt;bmfifo.local_irq_cnt) {</div><div class='add'>+			irqmask |= (ACC_BM_IRQ_MASK &lt;&lt; (2 * (i + 1)));</div><div class='add'>+			core-&gt;bmfifo.local_irq_cnt = READ_ONCE(*core-&gt;bmfifo.irq_cnt);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!irqmask)</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+</div><div class='add'>+	/* At second we tell the card we're working on them by writing irqmask,</div><div class='add'>+	 * call handle_{ov|core}_interrupt and then acknowledge the</div><div class='add'>+	 * interrupts by writing irq_cnt:</div><div class='add'>+	 */</div><div class='add'>+	acc_ov_write32(ov, ACC_OV_OF_BM_IRQ_MASK, irqmask);</div><div class='add'>+</div><div class='add'>+	if (irqmask &amp; ACC_BM_IRQ_MASK) {</div><div class='add'>+		/* handle_ov_interrupt(); - no use yet. */</div><div class='add'>+		acc_ov_write32(ov, ACC_OV_OF_BM_IRQ_COUNTER,</div><div class='add'>+			       ov-&gt;bmfifo.local_irq_cnt);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ov-&gt;active_cores; i++) {</div><div class='add'>+		struct acc_core *core = &amp;cores[i];</div><div class='add'>+</div><div class='add'>+		if (irqmask &amp; (ACC_BM_IRQ_MASK &lt;&lt; (2 * (i + 1)))) {</div><div class='add'>+			handle_core_interrupt(core);</div><div class='add'>+			acc_write32(core, ACC_OV_OF_BM_IRQ_COUNTER,</div><div class='add'>+				    core-&gt;bmfifo.local_irq_cnt);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	acc_ov_write32(ov, ACC_OV_OF_BM_IRQ_MASK, ACC_BM_IRQ_UNMASK_ALL);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/can/esd/esdacc.h b/drivers/net/can/esd/esdacc.h<br/>new file mode 100644<br/>index 000000000000..6b7ebd8c91b2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/esd/esdacc.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/esd/esdacc.h</a></div><div class='hunk'>@@ -0,0 +1,358 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* Copyright (C) 2015 - 2016 Thomas Körper, esd electronic system design gmbh</div><div class='add'>+ * Copyright (C) 2017 - 2023 Stefan Mätje, esd electronics gmbh</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bits.h&gt;</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/units.h&gt;</div><div class='add'>+</div><div class='add'>+#define ACC_TS_FREQ_80MHZ (80 * HZ_PER_MHZ)</div><div class='add'>+#define ACC_I2C_ADDON_DETECT_DELAY_MS 10</div><div class='add'>+</div><div class='add'>+/* esdACC Overview Module */</div><div class='add'>+#define ACC_OV_OF_PROBE	0x0000</div><div class='add'>+#define ACC_OV_OF_VERSION 0x0004</div><div class='add'>+#define ACC_OV_OF_INFO 0x0008</div><div class='add'>+#define ACC_OV_OF_CANCORE_FREQ 0x000c</div><div class='add'>+#define ACC_OV_OF_TS_FREQ_LO 0x0010</div><div class='add'>+#define ACC_OV_OF_TS_FREQ_HI 0x0014</div><div class='add'>+#define ACC_OV_OF_IRQ_STATUS_CORES 0x0018</div><div class='add'>+#define ACC_OV_OF_TS_CURR_LO 0x001c</div><div class='add'>+#define ACC_OV_OF_TS_CURR_HI 0x0020</div><div class='add'>+#define ACC_OV_OF_IRQ_STATUS 0x0028</div><div class='add'>+#define ACC_OV_OF_MODE 0x002c</div><div class='add'>+#define ACC_OV_OF_BM_IRQ_COUNTER 0x0070</div><div class='add'>+#define ACC_OV_OF_BM_IRQ_MASK 0x0074</div><div class='add'>+#define ACC_OV_OF_MSI_DATA 0x0080</div><div class='add'>+#define ACC_OV_OF_MSI_ADDRESSOFFSET 0x0084</div><div class='add'>+</div><div class='add'>+/* Feature flags are contained in the upper 16 bit of the version</div><div class='add'>+ * register at ACC_OV_OF_VERSION but only used with these masks after</div><div class='add'>+ * extraction into an extra variable =&gt; (xx - 16).</div><div class='add'>+ */</div><div class='add'>+#define ACC_OV_REG_FEAT_MASK_CANFD BIT(27 - 16)</div><div class='add'>+#define ACC_OV_REG_FEAT_MASK_NEW_PSC BIT(28 - 16)</div><div class='add'>+#define ACC_OV_REG_FEAT_MASK_DAR BIT(30 - 16)</div><div class='add'>+</div><div class='add'>+#define ACC_OV_REG_MODE_MASK_ENDIAN_LITTLE BIT(0)</div><div class='add'>+#define ACC_OV_REG_MODE_MASK_BM_ENABLE BIT(1)</div><div class='add'>+#define ACC_OV_REG_MODE_MASK_MODE_LED BIT(2)</div><div class='add'>+#define ACC_OV_REG_MODE_MASK_TIMER_ENABLE BIT(4)</div><div class='add'>+#define ACC_OV_REG_MODE_MASK_TIMER_ONE_SHOT BIT(5)</div><div class='add'>+#define ACC_OV_REG_MODE_MASK_TIMER_ABSOLUTE BIT(6)</div><div class='add'>+#define ACC_OV_REG_MODE_MASK_TIMER GENMASK(6, 4)</div><div class='add'>+#define ACC_OV_REG_MODE_MASK_TS_SRC GENMASK(8, 7)</div><div class='add'>+#define ACC_OV_REG_MODE_MASK_I2C_ENABLE BIT(11)</div><div class='add'>+#define ACC_OV_REG_MODE_MASK_MSI_ENABLE BIT(14)</div><div class='add'>+#define ACC_OV_REG_MODE_MASK_NEW_PSC_ENABLE BIT(15)</div><div class='add'>+#define ACC_OV_REG_MODE_MASK_FPGA_RESET BIT(31)</div><div class='add'>+</div><div class='add'>+/* esdACC CAN Core Module */</div><div class='add'>+#define ACC_CORE_OF_CTRL 0x0000</div><div class='add'>+#define ACC_CORE_OF_STATUS_IRQ 0x0008</div><div class='add'>+#define ACC_CORE_OF_BRP	0x000c</div><div class='add'>+#define ACC_CORE_OF_BTR	0x0010</div><div class='add'>+#define ACC_CORE_OF_FBTR 0x0014</div><div class='add'>+#define ACC_CORE_OF_STATUS 0x0030</div><div class='add'>+#define ACC_CORE_OF_TXFIFO_CONFIG 0x0048</div><div class='add'>+#define ACC_CORE_OF_TXFIFO_STATUS 0x004c</div><div class='add'>+#define ACC_CORE_OF_TX_STATUS_IRQ 0x0050</div><div class='add'>+#define ACC_CORE_OF_TX_ABORT_MASK 0x0054</div><div class='add'>+#define ACC_CORE_OF_BM_IRQ_COUNTER 0x0070</div><div class='add'>+#define ACC_CORE_OF_TXFIFO_ID 0x00c0</div><div class='add'>+#define ACC_CORE_OF_TXFIFO_DLC 0x00c4</div><div class='add'>+#define ACC_CORE_OF_TXFIFO_DATA_0 0x00c8</div><div class='add'>+#define ACC_CORE_OF_TXFIFO_DATA_1 0x00cc</div><div class='add'>+</div><div class='add'>+/* CTRL register layout */</div><div class='add'>+#define ACC_REG_CTRL_MASK_RESETMODE BIT(0)</div><div class='add'>+#define ACC_REG_CTRL_MASK_LOM BIT(1)</div><div class='add'>+#define ACC_REG_CTRL_MASK_STM BIT(2)</div><div class='add'>+#define ACC_REG_CTRL_MASK_TRANSEN BIT(5)</div><div class='add'>+#define ACC_REG_CTRL_MASK_TS BIT(6)</div><div class='add'>+#define ACC_REG_CTRL_MASK_SCHEDULE BIT(7)</div><div class='add'>+</div><div class='add'>+#define ACC_REG_CTRL_MASK_IE_RXTX BIT(8)</div><div class='add'>+#define ACC_REG_CTRL_MASK_IE_TXERROR BIT(9)</div><div class='add'>+#define ACC_REG_CTRL_MASK_IE_ERRWARN BIT(10)</div><div class='add'>+#define ACC_REG_CTRL_MASK_IE_OVERRUN BIT(11)</div><div class='add'>+#define ACC_REG_CTRL_MASK_IE_TSI BIT(12)</div><div class='add'>+#define ACC_REG_CTRL_MASK_IE_ERRPASS BIT(13)</div><div class='add'>+#define ACC_REG_CTRL_MASK_IE_ALI BIT(14)</div><div class='add'>+#define ACC_REG_CTRL_MASK_IE_BUSERR BIT(15)</div><div class='add'>+</div><div class='add'>+/* BRP and BTR register layout for CAN-Classic version */</div><div class='add'>+#define ACC_REG_BRP_CL_MASK_BRP GENMASK(8, 0)</div><div class='add'>+#define ACC_REG_BTR_CL_MASK_TSEG1 GENMASK(3, 0)</div><div class='add'>+#define ACC_REG_BTR_CL_MASK_TSEG2 GENMASK(18, 16)</div><div class='add'>+#define ACC_REG_BTR_CL_MASK_SJW GENMASK(25, 24)</div><div class='add'>+</div><div class='add'>+/* BRP and BTR register layout for CAN-FD version */</div><div class='add'>+#define ACC_REG_BRP_FD_MASK_BRP GENMASK(7, 0)</div><div class='add'>+#define ACC_REG_BTR_FD_MASK_TSEG1 GENMASK(7, 0)</div><div class='add'>+#define ACC_REG_BTR_FD_MASK_TSEG2 GENMASK(22, 16)</div><div class='add'>+#define ACC_REG_BTR_FD_MASK_SJW GENMASK(30, 24)</div><div class='add'>+</div><div class='add'>+/* 256 BM_MSGs of 32 byte size */</div><div class='add'>+#define ACC_CORE_DMAMSG_SIZE 32U</div><div class='add'>+#define ACC_CORE_DMABUF_SIZE (256U * ACC_CORE_DMAMSG_SIZE)</div><div class='add'>+</div><div class='add'>+enum acc_bmmsg_id {</div><div class='add'>+	BM_MSG_ID_RXTXDONE = 0x01,</div><div class='add'>+	BM_MSG_ID_TXABORT = 0x02,</div><div class='add'>+	BM_MSG_ID_OVERRUN = 0x03,</div><div class='add'>+	BM_MSG_ID_BUSERR = 0x04,</div><div class='add'>+	BM_MSG_ID_ERRPASSIVE = 0x05,</div><div class='add'>+	BM_MSG_ID_ERRWARN = 0x06,</div><div class='add'>+	BM_MSG_ID_TIMESLICE = 0x07,</div><div class='add'>+	BM_MSG_ID_HWTIMER = 0x08,</div><div class='add'>+	BM_MSG_ID_HOTPLUG = 0x09,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* The struct acc_bmmsg_* structure declarations that follow here provide</div><div class='add'>+ * access to the ring buffer of bus master messages maintained by the FPGA</div><div class='add'>+ * bus master engine. All bus master messages have the same size of</div><div class='add'>+ * ACC_CORE_DMAMSG_SIZE and a minimum alignment of ACC_CORE_DMAMSG_SIZE in</div><div class='add'>+ * memory.</div><div class='add'>+ *</div><div class='add'>+ * All structure members are natural aligned. Therefore we should not need</div><div class='add'>+ * a __packed attribute. All struct acc_bmmsg_* declarations have at least</div><div class='add'>+ * reserved* members to fill the structure to the full ACC_CORE_DMAMSG_SIZE.</div><div class='add'>+ *</div><div class='add'>+ * A failure of this property due padding will be detected at compile time</div><div class='add'>+ * by static_assert(sizeof(union acc_bmmsg) == ACC_CORE_DMAMSG_SIZE).</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+struct acc_bmmsg_rxtxdone {</div><div class='add'>+	u8 msg_id;</div><div class='add'>+	u8 txfifo_level;</div><div class='add'>+	u8 reserved1[2];</div><div class='add'>+	u8 txtsfifo_level;</div><div class='add'>+	u8 reserved2[3];</div><div class='add'>+	u32 id;</div><div class='add'>+	struct {</div><div class='add'>+		u8 len;</div><div class='add'>+		u8 txdfifo_idx;</div><div class='add'>+		u8 zeroes8;</div><div class='add'>+		u8 reserved;</div><div class='add'>+	} acc_dlc;</div><div class='add'>+	u8 data[CAN_MAX_DLEN];</div><div class='add'>+	/* Time stamps in struct acc_ov::timestamp_frequency ticks. */</div><div class='add'>+	u64 ts;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct acc_bmmsg_txabort {</div><div class='add'>+	u8 msg_id;</div><div class='add'>+	u8 txfifo_level;</div><div class='add'>+	u16 abort_mask;</div><div class='add'>+	u8 txtsfifo_level;</div><div class='add'>+	u8 reserved2[1];</div><div class='add'>+	u16 abort_mask_txts;</div><div class='add'>+	u64 ts;</div><div class='add'>+	u32 reserved3[4];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct acc_bmmsg_overrun {</div><div class='add'>+	u8 msg_id;</div><div class='add'>+	u8 txfifo_level;</div><div class='add'>+	u8 lost_cnt;</div><div class='add'>+	u8 reserved1;</div><div class='add'>+	u8 txtsfifo_level;</div><div class='add'>+	u8 reserved2[3];</div><div class='add'>+	u64 ts;</div><div class='add'>+	u32 reserved3[4];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct acc_bmmsg_buserr {</div><div class='add'>+	u8 msg_id;</div><div class='add'>+	u8 txfifo_level;</div><div class='add'>+	u8 ecc;</div><div class='add'>+	u8 reserved1;</div><div class='add'>+	u8 txtsfifo_level;</div><div class='add'>+	u8 reserved2[3];</div><div class='add'>+	u64 ts;</div><div class='add'>+	u32 reg_status;</div><div class='add'>+	u32 reg_btr;</div><div class='add'>+	u32 reserved3[2];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct acc_bmmsg_errstatechange {</div><div class='add'>+	u8 msg_id;</div><div class='add'>+	u8 txfifo_level;</div><div class='add'>+	u8 reserved1[2];</div><div class='add'>+	u8 txtsfifo_level;</div><div class='add'>+	u8 reserved2[3];</div><div class='add'>+	u64 ts;</div><div class='add'>+	u32 reg_status;</div><div class='add'>+	u32 reserved3[3];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct acc_bmmsg_timeslice {</div><div class='add'>+	u8 msg_id;</div><div class='add'>+	u8 txfifo_level;</div><div class='add'>+	u8 reserved1[2];</div><div class='add'>+	u8 txtsfifo_level;</div><div class='add'>+	u8 reserved2[3];</div><div class='add'>+	u64 ts;</div><div class='add'>+	u32 reserved3[4];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct acc_bmmsg_hwtimer {</div><div class='add'>+	u8 msg_id;</div><div class='add'>+	u8 reserved1[3];</div><div class='add'>+	u32 reserved2[1];</div><div class='add'>+	u64 timer;</div><div class='add'>+	u32 reserved3[4];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct acc_bmmsg_hotplug {</div><div class='add'>+	u8 msg_id;</div><div class='add'>+	u8 reserved1[3];</div><div class='add'>+	u32 reserved2[7];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+union acc_bmmsg {</div><div class='add'>+	u8 msg_id;</div><div class='add'>+	struct acc_bmmsg_rxtxdone rxtxdone;</div><div class='add'>+	struct acc_bmmsg_txabort txabort;</div><div class='add'>+	struct acc_bmmsg_overrun overrun;</div><div class='add'>+	struct acc_bmmsg_buserr buserr;</div><div class='add'>+	struct acc_bmmsg_errstatechange errstatechange;</div><div class='add'>+	struct acc_bmmsg_timeslice timeslice;</div><div class='add'>+	struct acc_bmmsg_hwtimer hwtimer;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Check size of union acc_bmmsg to be of expected size. */</div><div class='add'>+static_assert(sizeof(union acc_bmmsg) == ACC_CORE_DMAMSG_SIZE);</div><div class='add'>+</div><div class='add'>+struct acc_bmfifo {</div><div class='add'>+	const union acc_bmmsg *messages;</div><div class='add'>+	/* irq_cnt points to an u32 value where the esdACC FPGA deposits</div><div class='add'>+	 * the bm_fifo head index in coherent DMA memory. Only bits 7..0</div><div class='add'>+	 * are valid. Use READ_ONCE() to access this memory location.</div><div class='add'>+	 */</div><div class='add'>+	const u32 *irq_cnt;</div><div class='add'>+	u32 local_irq_cnt;</div><div class='add'>+	u32 msg_fifo_tail;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct acc_core {</div><div class='add'>+	void __iomem *addr;</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	struct acc_bmfifo bmfifo;</div><div class='add'>+	u8 tx_fifo_size;</div><div class='add'>+	u8 tx_fifo_head;</div><div class='add'>+	u8 tx_fifo_tail;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct acc_ov {</div><div class='add'>+	void __iomem *addr;</div><div class='add'>+	struct acc_bmfifo bmfifo;</div><div class='add'>+	u32 timestamp_frequency;</div><div class='add'>+	u32 core_frequency;</div><div class='add'>+	u16 version;</div><div class='add'>+	u16 features;</div><div class='add'>+	u8 total_cores;</div><div class='add'>+	u8 active_cores;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct acc_net_priv {</div><div class='add'>+	struct can_priv can; /* must be the first member! */</div><div class='add'>+	struct acc_core *core;</div><div class='add'>+	struct acc_ov *ov;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline u32 acc_read32(struct acc_core *core, unsigned short offs)</div><div class='add'>+{</div><div class='add'>+	return ioread32be(core-&gt;addr + offs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void acc_write32(struct acc_core *core,</div><div class='add'>+			       unsigned short offs, u32 v)</div><div class='add'>+{</div><div class='add'>+	iowrite32be(v, core-&gt;addr + offs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void acc_write32_noswap(struct acc_core *core,</div><div class='add'>+				      unsigned short offs, u32 v)</div><div class='add'>+{</div><div class='add'>+	iowrite32(v, core-&gt;addr + offs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void acc_set_bits(struct acc_core *core,</div><div class='add'>+				unsigned short offs, u32 mask)</div><div class='add'>+{</div><div class='add'>+	u32 v = acc_read32(core, offs);</div><div class='add'>+</div><div class='add'>+	v |= mask;</div><div class='add'>+	acc_write32(core, offs, v);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void acc_clear_bits(struct acc_core *core,</div><div class='add'>+				  unsigned short offs, u32 mask)</div><div class='add'>+{</div><div class='add'>+	u32 v = acc_read32(core, offs);</div><div class='add'>+</div><div class='add'>+	v &amp;= ~mask;</div><div class='add'>+	acc_write32(core, offs, v);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int acc_resetmode_entered(struct acc_core *core)</div><div class='add'>+{</div><div class='add'>+	u32 ctrl = acc_read32(core, ACC_CORE_OF_CTRL);</div><div class='add'>+</div><div class='add'>+	return (ctrl &amp; ACC_REG_CTRL_MASK_RESETMODE) != 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 acc_ov_read32(struct acc_ov *ov, unsigned short offs)</div><div class='add'>+{</div><div class='add'>+	return ioread32be(ov-&gt;addr + offs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void acc_ov_write32(struct acc_ov *ov,</div><div class='add'>+				  unsigned short offs, u32 v)</div><div class='add'>+{</div><div class='add'>+	iowrite32be(v, ov-&gt;addr + offs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void acc_ov_set_bits(struct acc_ov *ov,</div><div class='add'>+				   unsigned short offs, u32 b)</div><div class='add'>+{</div><div class='add'>+	u32 v = acc_ov_read32(ov, offs);</div><div class='add'>+</div><div class='add'>+	v |= b;</div><div class='add'>+	acc_ov_write32(ov, offs, v);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void acc_ov_clear_bits(struct acc_ov *ov,</div><div class='add'>+				     unsigned short offs, u32 b)</div><div class='add'>+{</div><div class='add'>+	u32 v = acc_ov_read32(ov, offs);</div><div class='add'>+</div><div class='add'>+	v &amp;= ~b;</div><div class='add'>+	acc_ov_write32(ov, offs, v);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void acc_reset_fpga(struct acc_ov *ov)</div><div class='add'>+{</div><div class='add'>+	acc_ov_write32(ov, ACC_OV_OF_MODE, ACC_OV_REG_MODE_MASK_FPGA_RESET);</div><div class='add'>+</div><div class='add'>+	/* (Re-)start and wait for completion of addon detection on the I^2C bus */</div><div class='add'>+	acc_ov_set_bits(ov, ACC_OV_OF_MODE, ACC_OV_REG_MODE_MASK_I2C_ENABLE);</div><div class='add'>+	mdelay(ACC_I2C_ADDON_DETECT_DELAY_MS);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void acc_init_ov(struct acc_ov *ov, struct device *dev);</div><div class='add'>+void acc_init_bm_ptr(struct acc_ov *ov, struct acc_core *cores,</div><div class='add'>+		     const void *mem);</div><div class='add'>+int acc_open(struct net_device *netdev);</div><div class='add'>+int acc_close(struct net_device *netdev);</div><div class='add'>+netdev_tx_t acc_start_xmit(struct sk_buff *skb, struct net_device *netdev);</div><div class='add'>+int acc_get_berr_counter(const struct net_device *netdev,</div><div class='add'>+			 struct can_berr_counter *bec);</div><div class='add'>+int acc_set_mode(struct net_device *netdev, enum can_mode mode);</div><div class='add'>+int acc_set_bittiming(struct net_device *netdev);</div><div class='add'>+irqreturn_t acc_card_interrupt(struct acc_ov *ov, struct acc_core *cores);</div><div class='head'>diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c<br/>deleted file mode 100644<br/>index b1e8d729851c..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/flexcan.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/flexcan.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,1328 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * flexcan.c - FLEXCAN CAN controller driver</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2005-2006 Varma Electronics Oy</div><div class='del'>- * Copyright (c) 2009 Sascha Hauer, Pengutronix</div><div class='del'>- * Copyright (c) 2010 Marc Kleine-Budde, Pengutronix</div><div class='del'>- *</div><div class='del'>- * Based on code originally by Andrey Volkov &lt;avolkov@varma-el.com&gt;</div><div class='del'>- *</div><div class='del'>- * LICENCE:</div><div class='del'>- * This program is free software; you can redistribute it and/or</div><div class='del'>- * modify it under the terms of the GNU General Public License as</div><div class='del'>- * published by the Free Software Foundation version 2.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/can.h&gt;</div><div class='del'>-#include &lt;linux/can/dev.h&gt;</div><div class='del'>-#include &lt;linux/can/error.h&gt;</div><div class='del'>-#include &lt;linux/can/led.h&gt;</div><div class='del'>-#include &lt;linux/clk.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/if_arp.h&gt;</div><div class='del'>-#include &lt;linux/if_ether.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/list.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/of.h&gt;</div><div class='del'>-#include &lt;linux/of_device.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/regulator/consumer.h&gt;</div><div class='del'>-</div><div class='del'>-#define DRV_NAME			"flexcan"</div><div class='del'>-</div><div class='del'>-/* 8 for RX fifo and 2 error handling */</div><div class='del'>-#define FLEXCAN_NAPI_WEIGHT		(8 + 2)</div><div class='del'>-</div><div class='del'>-/* FLEXCAN module configuration register (CANMCR) bits */</div><div class='del'>-#define FLEXCAN_MCR_MDIS		BIT(31)</div><div class='del'>-#define FLEXCAN_MCR_FRZ			BIT(30)</div><div class='del'>-#define FLEXCAN_MCR_FEN			BIT(29)</div><div class='del'>-#define FLEXCAN_MCR_HALT		BIT(28)</div><div class='del'>-#define FLEXCAN_MCR_NOT_RDY		BIT(27)</div><div class='del'>-#define FLEXCAN_MCR_WAK_MSK		BIT(26)</div><div class='del'>-#define FLEXCAN_MCR_SOFTRST		BIT(25)</div><div class='del'>-#define FLEXCAN_MCR_FRZ_ACK		BIT(24)</div><div class='del'>-#define FLEXCAN_MCR_SUPV		BIT(23)</div><div class='del'>-#define FLEXCAN_MCR_SLF_WAK		BIT(22)</div><div class='del'>-#define FLEXCAN_MCR_WRN_EN		BIT(21)</div><div class='del'>-#define FLEXCAN_MCR_LPM_ACK		BIT(20)</div><div class='del'>-#define FLEXCAN_MCR_WAK_SRC		BIT(19)</div><div class='del'>-#define FLEXCAN_MCR_DOZE		BIT(18)</div><div class='del'>-#define FLEXCAN_MCR_SRX_DIS		BIT(17)</div><div class='del'>-#define FLEXCAN_MCR_BCC			BIT(16)</div><div class='del'>-#define FLEXCAN_MCR_LPRIO_EN		BIT(13)</div><div class='del'>-#define FLEXCAN_MCR_AEN			BIT(12)</div><div class='del'>-#define FLEXCAN_MCR_MAXMB(x)		((x) &amp; 0x7f)</div><div class='del'>-#define FLEXCAN_MCR_IDAM_A		(0 &lt;&lt; 8)</div><div class='del'>-#define FLEXCAN_MCR_IDAM_B		(1 &lt;&lt; 8)</div><div class='del'>-#define FLEXCAN_MCR_IDAM_C		(2 &lt;&lt; 8)</div><div class='del'>-#define FLEXCAN_MCR_IDAM_D		(3 &lt;&lt; 8)</div><div class='del'>-</div><div class='del'>-/* FLEXCAN control register (CANCTRL) bits */</div><div class='del'>-#define FLEXCAN_CTRL_PRESDIV(x)		(((x) &amp; 0xff) &lt;&lt; 24)</div><div class='del'>-#define FLEXCAN_CTRL_RJW(x)		(((x) &amp; 0x03) &lt;&lt; 22)</div><div class='del'>-#define FLEXCAN_CTRL_PSEG1(x)		(((x) &amp; 0x07) &lt;&lt; 19)</div><div class='del'>-#define FLEXCAN_CTRL_PSEG2(x)		(((x) &amp; 0x07) &lt;&lt; 16)</div><div class='del'>-#define FLEXCAN_CTRL_BOFF_MSK		BIT(15)</div><div class='del'>-#define FLEXCAN_CTRL_ERR_MSK		BIT(14)</div><div class='del'>-#define FLEXCAN_CTRL_CLK_SRC		BIT(13)</div><div class='del'>-#define FLEXCAN_CTRL_LPB		BIT(12)</div><div class='del'>-#define FLEXCAN_CTRL_TWRN_MSK		BIT(11)</div><div class='del'>-#define FLEXCAN_CTRL_RWRN_MSK		BIT(10)</div><div class='del'>-#define FLEXCAN_CTRL_SMP		BIT(7)</div><div class='del'>-#define FLEXCAN_CTRL_BOFF_REC		BIT(6)</div><div class='del'>-#define FLEXCAN_CTRL_TSYN		BIT(5)</div><div class='del'>-#define FLEXCAN_CTRL_LBUF		BIT(4)</div><div class='del'>-#define FLEXCAN_CTRL_LOM		BIT(3)</div><div class='del'>-#define FLEXCAN_CTRL_PROPSEG(x)		((x) &amp; 0x07)</div><div class='del'>-#define FLEXCAN_CTRL_ERR_BUS		(FLEXCAN_CTRL_ERR_MSK)</div><div class='del'>-#define FLEXCAN_CTRL_ERR_STATE \</div><div class='del'>-	(FLEXCAN_CTRL_TWRN_MSK | FLEXCAN_CTRL_RWRN_MSK | \</div><div class='del'>-	 FLEXCAN_CTRL_BOFF_MSK)</div><div class='del'>-#define FLEXCAN_CTRL_ERR_ALL \</div><div class='del'>-	(FLEXCAN_CTRL_ERR_BUS | FLEXCAN_CTRL_ERR_STATE)</div><div class='del'>-</div><div class='del'>-/* FLEXCAN control register 2 (CTRL2) bits */</div><div class='del'>-#define FLEXCAN_CTRL2_ECRWRE		BIT(29)</div><div class='del'>-#define FLEXCAN_CTRL2_WRMFRZ		BIT(28)</div><div class='del'>-#define FLEXCAN_CTRL2_RFFN(x)		(((x) &amp; 0x0f) &lt;&lt; 24)</div><div class='del'>-#define FLEXCAN_CTRL2_TASD(x)		(((x) &amp; 0x1f) &lt;&lt; 19)</div><div class='del'>-#define FLEXCAN_CTRL2_MRP		BIT(18)</div><div class='del'>-#define FLEXCAN_CTRL2_RRS		BIT(17)</div><div class='del'>-#define FLEXCAN_CTRL2_EACEN		BIT(16)</div><div class='del'>-</div><div class='del'>-/* FLEXCAN memory error control register (MECR) bits */</div><div class='del'>-#define FLEXCAN_MECR_ECRWRDIS		BIT(31)</div><div class='del'>-#define FLEXCAN_MECR_HANCEI_MSK		BIT(19)</div><div class='del'>-#define FLEXCAN_MECR_FANCEI_MSK		BIT(18)</div><div class='del'>-#define FLEXCAN_MECR_CEI_MSK		BIT(16)</div><div class='del'>-#define FLEXCAN_MECR_HAERRIE		BIT(15)</div><div class='del'>-#define FLEXCAN_MECR_FAERRIE		BIT(14)</div><div class='del'>-#define FLEXCAN_MECR_EXTERRIE		BIT(13)</div><div class='del'>-#define FLEXCAN_MECR_RERRDIS		BIT(9)</div><div class='del'>-#define FLEXCAN_MECR_ECCDIS		BIT(8)</div><div class='del'>-#define FLEXCAN_MECR_NCEFAFRZ		BIT(7)</div><div class='del'>-</div><div class='del'>-/* FLEXCAN error and status register (ESR) bits */</div><div class='del'>-#define FLEXCAN_ESR_TWRN_INT		BIT(17)</div><div class='del'>-#define FLEXCAN_ESR_RWRN_INT		BIT(16)</div><div class='del'>-#define FLEXCAN_ESR_BIT1_ERR		BIT(15)</div><div class='del'>-#define FLEXCAN_ESR_BIT0_ERR		BIT(14)</div><div class='del'>-#define FLEXCAN_ESR_ACK_ERR		BIT(13)</div><div class='del'>-#define FLEXCAN_ESR_CRC_ERR		BIT(12)</div><div class='del'>-#define FLEXCAN_ESR_FRM_ERR		BIT(11)</div><div class='del'>-#define FLEXCAN_ESR_STF_ERR		BIT(10)</div><div class='del'>-#define FLEXCAN_ESR_TX_WRN		BIT(9)</div><div class='del'>-#define FLEXCAN_ESR_RX_WRN		BIT(8)</div><div class='del'>-#define FLEXCAN_ESR_IDLE		BIT(7)</div><div class='del'>-#define FLEXCAN_ESR_TXRX		BIT(6)</div><div class='del'>-#define FLEXCAN_EST_FLT_CONF_SHIFT	(4)</div><div class='del'>-#define FLEXCAN_ESR_FLT_CONF_MASK	(0x3 &lt;&lt; FLEXCAN_EST_FLT_CONF_SHIFT)</div><div class='del'>-#define FLEXCAN_ESR_FLT_CONF_ACTIVE	(0x0 &lt;&lt; FLEXCAN_EST_FLT_CONF_SHIFT)</div><div class='del'>-#define FLEXCAN_ESR_FLT_CONF_PASSIVE	(0x1 &lt;&lt; FLEXCAN_EST_FLT_CONF_SHIFT)</div><div class='del'>-#define FLEXCAN_ESR_BOFF_INT		BIT(2)</div><div class='del'>-#define FLEXCAN_ESR_ERR_INT		BIT(1)</div><div class='del'>-#define FLEXCAN_ESR_WAK_INT		BIT(0)</div><div class='del'>-#define FLEXCAN_ESR_ERR_BUS \</div><div class='del'>-	(FLEXCAN_ESR_BIT1_ERR | FLEXCAN_ESR_BIT0_ERR | \</div><div class='del'>-	 FLEXCAN_ESR_ACK_ERR | FLEXCAN_ESR_CRC_ERR | \</div><div class='del'>-	 FLEXCAN_ESR_FRM_ERR | FLEXCAN_ESR_STF_ERR)</div><div class='del'>-#define FLEXCAN_ESR_ERR_STATE \</div><div class='del'>-	(FLEXCAN_ESR_TWRN_INT | FLEXCAN_ESR_RWRN_INT | FLEXCAN_ESR_BOFF_INT)</div><div class='del'>-#define FLEXCAN_ESR_ERR_ALL \</div><div class='del'>-	(FLEXCAN_ESR_ERR_BUS | FLEXCAN_ESR_ERR_STATE)</div><div class='del'>-#define FLEXCAN_ESR_ALL_INT \</div><div class='del'>-	(FLEXCAN_ESR_TWRN_INT | FLEXCAN_ESR_RWRN_INT | \</div><div class='del'>-	 FLEXCAN_ESR_BOFF_INT | FLEXCAN_ESR_ERR_INT)</div><div class='del'>-</div><div class='del'>-/* FLEXCAN interrupt flag register (IFLAG) bits */</div><div class='del'>-/* Errata ERR005829 step7: Reserve first valid MB */</div><div class='del'>-#define FLEXCAN_TX_BUF_RESERVED		8</div><div class='del'>-#define FLEXCAN_TX_BUF_ID		9</div><div class='del'>-#define FLEXCAN_IFLAG_BUF(x)		BIT(x)</div><div class='del'>-#define FLEXCAN_IFLAG_RX_FIFO_OVERFLOW	BIT(7)</div><div class='del'>-#define FLEXCAN_IFLAG_RX_FIFO_WARN	BIT(6)</div><div class='del'>-#define FLEXCAN_IFLAG_RX_FIFO_AVAILABLE	BIT(5)</div><div class='del'>-#define FLEXCAN_IFLAG_DEFAULT \</div><div class='del'>-	(FLEXCAN_IFLAG_RX_FIFO_OVERFLOW | FLEXCAN_IFLAG_RX_FIFO_AVAILABLE | \</div><div class='del'>-	 FLEXCAN_IFLAG_BUF(FLEXCAN_TX_BUF_ID))</div><div class='del'>-</div><div class='del'>-/* FLEXCAN message buffers */</div><div class='del'>-#define FLEXCAN_MB_CODE_RX_INACTIVE	(0x0 &lt;&lt; 24)</div><div class='del'>-#define FLEXCAN_MB_CODE_RX_EMPTY	(0x4 &lt;&lt; 24)</div><div class='del'>-#define FLEXCAN_MB_CODE_RX_FULL		(0x2 &lt;&lt; 24)</div><div class='del'>-#define FLEXCAN_MB_CODE_RX_OVERRRUN	(0x6 &lt;&lt; 24)</div><div class='del'>-#define FLEXCAN_MB_CODE_RX_RANSWER	(0xa &lt;&lt; 24)</div><div class='del'>-</div><div class='del'>-#define FLEXCAN_MB_CODE_TX_INACTIVE	(0x8 &lt;&lt; 24)</div><div class='del'>-#define FLEXCAN_MB_CODE_TX_ABORT	(0x9 &lt;&lt; 24)</div><div class='del'>-#define FLEXCAN_MB_CODE_TX_DATA		(0xc &lt;&lt; 24)</div><div class='del'>-#define FLEXCAN_MB_CODE_TX_TANSWER	(0xe &lt;&lt; 24)</div><div class='del'>-</div><div class='del'>-#define FLEXCAN_MB_CNT_SRR		BIT(22)</div><div class='del'>-#define FLEXCAN_MB_CNT_IDE		BIT(21)</div><div class='del'>-#define FLEXCAN_MB_CNT_RTR		BIT(20)</div><div class='del'>-#define FLEXCAN_MB_CNT_LENGTH(x)	(((x) &amp; 0xf) &lt;&lt; 16)</div><div class='del'>-#define FLEXCAN_MB_CNT_TIMESTAMP(x)	((x) &amp; 0xffff)</div><div class='del'>-</div><div class='del'>-#define FLEXCAN_MB_CODE_MASK		(0xf0ffffff)</div><div class='del'>-</div><div class='del'>-#define FLEXCAN_TIMEOUT_US             (50)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * FLEXCAN hardware feature flags</div><div class='del'>- *</div><div class='del'>- * Below is some version info we got:</div><div class='del'>- *    SOC   Version   IP-Version  Glitch- [TR]WRN_INT Memory err RTR re-</div><div class='del'>- *                                Filter? connected?  detection  ception in MB</div><div class='del'>- *   MX25  FlexCAN2  03.00.00.00     no        no         no        no</div><div class='del'>- *   MX28  FlexCAN2  03.00.04.00    yes       yes         no        no</div><div class='del'>- *   MX35  FlexCAN2  03.00.00.00     no        no         no        no</div><div class='del'>- *   MX53  FlexCAN2  03.00.00.00    yes        no         no        no</div><div class='del'>- *   MX6s  FlexCAN3  10.00.12.00    yes       yes         no       yes</div><div class='del'>- *   VF610 FlexCAN3  ?               no       yes        yes       yes?</div><div class='del'>- *</div><div class='del'>- * Some SOCs do not have the RX_WARN &amp; TX_WARN interrupt line connected.</div><div class='del'>- */</div><div class='del'>-#define FLEXCAN_HAS_V10_FEATURES	BIT(1) /* For core version &gt;= 10 */</div><div class='del'>-#define FLEXCAN_HAS_BROKEN_ERR_STATE	BIT(2) /* [TR]WRN_INT not connected */</div><div class='del'>-#define FLEXCAN_HAS_MECR_FEATURES	BIT(3) /* Memory error detection */</div><div class='del'>-</div><div class='del'>-/* Structure of the message buffer */</div><div class='del'>-struct flexcan_mb {</div><div class='del'>-	u32 can_ctrl;</div><div class='del'>-	u32 can_id;</div><div class='del'>-	u32 data[2];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Structure of the hardware registers */</div><div class='del'>-struct flexcan_regs {</div><div class='del'>-	u32 mcr;		/* 0x00 */</div><div class='del'>-	u32 ctrl;		/* 0x04 */</div><div class='del'>-	u32 timer;		/* 0x08 */</div><div class='del'>-	u32 _reserved1;		/* 0x0c */</div><div class='del'>-	u32 rxgmask;		/* 0x10 */</div><div class='del'>-	u32 rx14mask;		/* 0x14 */</div><div class='del'>-	u32 rx15mask;		/* 0x18 */</div><div class='del'>-	u32 ecr;		/* 0x1c */</div><div class='del'>-	u32 esr;		/* 0x20 */</div><div class='del'>-	u32 imask2;		/* 0x24 */</div><div class='del'>-	u32 imask1;		/* 0x28 */</div><div class='del'>-	u32 iflag2;		/* 0x2c */</div><div class='del'>-	u32 iflag1;		/* 0x30 */</div><div class='del'>-	u32 ctrl2;		/* 0x34 */</div><div class='del'>-	u32 esr2;		/* 0x38 */</div><div class='del'>-	u32 imeur;		/* 0x3c */</div><div class='del'>-	u32 lrfr;		/* 0x40 */</div><div class='del'>-	u32 crcr;		/* 0x44 */</div><div class='del'>-	u32 rxfgmask;		/* 0x48 */</div><div class='del'>-	u32 rxfir;		/* 0x4c */</div><div class='del'>-	u32 _reserved3[12];	/* 0x50 */</div><div class='del'>-	struct flexcan_mb cantxfg[64];	/* 0x80 */</div><div class='del'>-	/* FIFO-mode:</div><div class='del'>-	 *			MB</div><div class='del'>-	 * 0x080...0x08f	0	RX message buffer</div><div class='del'>-	 * 0x090...0x0df	1-5	reserverd</div><div class='del'>-	 * 0x0e0...0x0ff	6-7	8 entry ID table</div><div class='del'>-	 *				(mx25, mx28, mx35, mx53)</div><div class='del'>-	 * 0x0e0...0x2df	6-7..37	8..128 entry ID table</div><div class='del'>-	 *			  	size conf'ed via ctrl2::RFFN</div><div class='del'>-	 *				(mx6, vf610)</div><div class='del'>-	 */</div><div class='del'>-	u32 _reserved4[408];</div><div class='del'>-	u32 mecr;		/* 0xae0 */</div><div class='del'>-	u32 erriar;		/* 0xae4 */</div><div class='del'>-	u32 erridpr;		/* 0xae8 */</div><div class='del'>-	u32 errippr;		/* 0xaec */</div><div class='del'>-	u32 rerrar;		/* 0xaf0 */</div><div class='del'>-	u32 rerrdr;		/* 0xaf4 */</div><div class='del'>-	u32 rerrsynr;		/* 0xaf8 */</div><div class='del'>-	u32 errsr;		/* 0xafc */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct flexcan_devtype_data {</div><div class='del'>-	u32 features;	/* hardware controller features */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct flexcan_priv {</div><div class='del'>-	struct can_priv can;</div><div class='del'>-	struct napi_struct napi;</div><div class='del'>-</div><div class='del'>-	void __iomem *base;</div><div class='del'>-	u32 reg_esr;</div><div class='del'>-	u32 reg_ctrl_default;</div><div class='del'>-</div><div class='del'>-	struct clk *clk_ipg;</div><div class='del'>-	struct clk *clk_per;</div><div class='del'>-	struct flexcan_platform_data *pdata;</div><div class='del'>-	const struct flexcan_devtype_data *devtype_data;</div><div class='del'>-	struct regulator *reg_xceiver;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct flexcan_devtype_data fsl_p1010_devtype_data = {</div><div class='del'>-	.features = FLEXCAN_HAS_BROKEN_ERR_STATE,</div><div class='del'>-};</div><div class='del'>-static struct flexcan_devtype_data fsl_imx28_devtype_data;</div><div class='del'>-static struct flexcan_devtype_data fsl_imx6q_devtype_data = {</div><div class='del'>-	.features = FLEXCAN_HAS_V10_FEATURES,</div><div class='del'>-};</div><div class='del'>-static struct flexcan_devtype_data fsl_vf610_devtype_data = {</div><div class='del'>-	.features = FLEXCAN_HAS_V10_FEATURES | FLEXCAN_HAS_MECR_FEATURES,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct can_bittiming_const flexcan_bittiming_const = {</div><div class='del'>-	.name = DRV_NAME,</div><div class='del'>-	.tseg1_min = 4,</div><div class='del'>-	.tseg1_max = 16,</div><div class='del'>-	.tseg2_min = 2,</div><div class='del'>-	.tseg2_max = 8,</div><div class='del'>-	.sjw_max = 4,</div><div class='del'>-	.brp_min = 1,</div><div class='del'>-	.brp_max = 256,</div><div class='del'>-	.brp_inc = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Abstract off the read/write for arm versus ppc. This</div><div class='del'>- * assumes that PPC uses big-endian registers and everything</div><div class='del'>- * else uses little-endian registers, independent of CPU</div><div class='del'>- * endianess.</div><div class='del'>- */</div><div class='del'>-#if defined(CONFIG_PPC)</div><div class='del'>-static inline u32 flexcan_read(void __iomem *addr)</div><div class='del'>-{</div><div class='del'>-	return in_be32(addr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void flexcan_write(u32 val, void __iomem *addr)</div><div class='del'>-{</div><div class='del'>-	out_be32(addr, val);</div><div class='del'>-}</div><div class='del'>-#else</div><div class='del'>-static inline u32 flexcan_read(void __iomem *addr)</div><div class='del'>-{</div><div class='del'>-	return readl(addr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void flexcan_write(u32 val, void __iomem *addr)</div><div class='del'>-{</div><div class='del'>-	writel(val, addr);</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static inline int flexcan_transceiver_enable(const struct flexcan_priv *priv)</div><div class='del'>-{</div><div class='del'>-	if (!priv-&gt;reg_xceiver)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	return regulator_enable(priv-&gt;reg_xceiver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int flexcan_transceiver_disable(const struct flexcan_priv *priv)</div><div class='del'>-{</div><div class='del'>-	if (!priv-&gt;reg_xceiver)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	return regulator_disable(priv-&gt;reg_xceiver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int flexcan_has_and_handle_berr(const struct flexcan_priv *priv,</div><div class='del'>-					      u32 reg_esr)</div><div class='del'>-{</div><div class='del'>-	return (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING) &amp;&amp;</div><div class='del'>-		(reg_esr &amp; FLEXCAN_ESR_ERR_BUS);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int flexcan_chip_enable(struct flexcan_priv *priv)</div><div class='del'>-{</div><div class='del'>-	struct flexcan_regs __iomem *regs = priv-&gt;base;</div><div class='del'>-	unsigned int timeout = FLEXCAN_TIMEOUT_US / 10;</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	reg = flexcan_read(&amp;regs-&gt;mcr);</div><div class='del'>-	reg &amp;= ~FLEXCAN_MCR_MDIS;</div><div class='del'>-	flexcan_write(reg, &amp;regs-&gt;mcr);</div><div class='del'>-</div><div class='del'>-	while (timeout-- &amp;&amp; (flexcan_read(&amp;regs-&gt;mcr) &amp; FLEXCAN_MCR_LPM_ACK))</div><div class='del'>-		udelay(10);</div><div class='del'>-</div><div class='del'>-	if (flexcan_read(&amp;regs-&gt;mcr) &amp; FLEXCAN_MCR_LPM_ACK)</div><div class='del'>-		return -ETIMEDOUT;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int flexcan_chip_disable(struct flexcan_priv *priv)</div><div class='del'>-{</div><div class='del'>-	struct flexcan_regs __iomem *regs = priv-&gt;base;</div><div class='del'>-	unsigned int timeout = FLEXCAN_TIMEOUT_US / 10;</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	reg = flexcan_read(&amp;regs-&gt;mcr);</div><div class='del'>-	reg |= FLEXCAN_MCR_MDIS;</div><div class='del'>-	flexcan_write(reg, &amp;regs-&gt;mcr);</div><div class='del'>-</div><div class='del'>-	while (timeout-- &amp;&amp; !(flexcan_read(&amp;regs-&gt;mcr) &amp; FLEXCAN_MCR_LPM_ACK))</div><div class='del'>-		udelay(10);</div><div class='del'>-</div><div class='del'>-	if (!(flexcan_read(&amp;regs-&gt;mcr) &amp; FLEXCAN_MCR_LPM_ACK))</div><div class='del'>-		return -ETIMEDOUT;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int flexcan_chip_freeze(struct flexcan_priv *priv)</div><div class='del'>-{</div><div class='del'>-	struct flexcan_regs __iomem *regs = priv-&gt;base;</div><div class='del'>-	unsigned int timeout = 1000 * 1000 * 10 / priv-&gt;can.bittiming.bitrate;</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	reg = flexcan_read(&amp;regs-&gt;mcr);</div><div class='del'>-	reg |= FLEXCAN_MCR_HALT;</div><div class='del'>-	flexcan_write(reg, &amp;regs-&gt;mcr);</div><div class='del'>-</div><div class='del'>-	while (timeout-- &amp;&amp; !(flexcan_read(&amp;regs-&gt;mcr) &amp; FLEXCAN_MCR_FRZ_ACK))</div><div class='del'>-		udelay(100);</div><div class='del'>-</div><div class='del'>-	if (!(flexcan_read(&amp;regs-&gt;mcr) &amp; FLEXCAN_MCR_FRZ_ACK))</div><div class='del'>-		return -ETIMEDOUT;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int flexcan_chip_unfreeze(struct flexcan_priv *priv)</div><div class='del'>-{</div><div class='del'>-	struct flexcan_regs __iomem *regs = priv-&gt;base;</div><div class='del'>-	unsigned int timeout = FLEXCAN_TIMEOUT_US / 10;</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	reg = flexcan_read(&amp;regs-&gt;mcr);</div><div class='del'>-	reg &amp;= ~FLEXCAN_MCR_HALT;</div><div class='del'>-	flexcan_write(reg, &amp;regs-&gt;mcr);</div><div class='del'>-</div><div class='del'>-	while (timeout-- &amp;&amp; (flexcan_read(&amp;regs-&gt;mcr) &amp; FLEXCAN_MCR_FRZ_ACK))</div><div class='del'>-		udelay(10);</div><div class='del'>-</div><div class='del'>-	if (flexcan_read(&amp;regs-&gt;mcr) &amp; FLEXCAN_MCR_FRZ_ACK)</div><div class='del'>-		return -ETIMEDOUT;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int flexcan_chip_softreset(struct flexcan_priv *priv)</div><div class='del'>-{</div><div class='del'>-	struct flexcan_regs __iomem *regs = priv-&gt;base;</div><div class='del'>-	unsigned int timeout = FLEXCAN_TIMEOUT_US / 10;</div><div class='del'>-</div><div class='del'>-	flexcan_write(FLEXCAN_MCR_SOFTRST, &amp;regs-&gt;mcr);</div><div class='del'>-	while (timeout-- &amp;&amp; (flexcan_read(&amp;regs-&gt;mcr) &amp; FLEXCAN_MCR_SOFTRST))</div><div class='del'>-		udelay(10);</div><div class='del'>-</div><div class='del'>-	if (flexcan_read(&amp;regs-&gt;mcr) &amp; FLEXCAN_MCR_SOFTRST)</div><div class='del'>-		return -ETIMEDOUT;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int __flexcan_get_berr_counter(const struct net_device *dev,</div><div class='del'>-				      struct can_berr_counter *bec)</div><div class='del'>-{</div><div class='del'>-	const struct flexcan_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct flexcan_regs __iomem *regs = priv-&gt;base;</div><div class='del'>-	u32 reg = flexcan_read(&amp;regs-&gt;ecr);</div><div class='del'>-</div><div class='del'>-	bec-&gt;txerr = (reg &gt;&gt; 0) &amp; 0xff;</div><div class='del'>-	bec-&gt;rxerr = (reg &gt;&gt; 8) &amp; 0xff;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int flexcan_get_berr_counter(const struct net_device *dev,</div><div class='del'>-				    struct can_berr_counter *bec)</div><div class='del'>-{</div><div class='del'>-	const struct flexcan_priv *priv = netdev_priv(dev);</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = clk_prepare_enable(priv-&gt;clk_ipg);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = clk_prepare_enable(priv-&gt;clk_per);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out_disable_ipg;</div><div class='del'>-</div><div class='del'>-	err = __flexcan_get_berr_counter(dev, bec);</div><div class='del'>-</div><div class='del'>-	clk_disable_unprepare(priv-&gt;clk_per);</div><div class='del'>- out_disable_ipg:</div><div class='del'>-	clk_disable_unprepare(priv-&gt;clk_ipg);</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int flexcan_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	const struct flexcan_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct flexcan_regs __iomem *regs = priv-&gt;base;</div><div class='del'>-	struct can_frame *cf = (struct can_frame *)skb-&gt;data;</div><div class='del'>-	u32 can_id;</div><div class='del'>-	u32 ctrl = FLEXCAN_MB_CODE_TX_DATA | (cf-&gt;can_dlc &lt;&lt; 16);</div><div class='del'>-</div><div class='del'>-	if (can_dropped_invalid_skb(dev, skb))</div><div class='del'>-		return NETDEV_TX_OK;</div><div class='del'>-</div><div class='del'>-	netif_stop_queue(dev);</div><div class='del'>-</div><div class='del'>-	if (cf-&gt;can_id &amp; CAN_EFF_FLAG) {</div><div class='del'>-		can_id = cf-&gt;can_id &amp; CAN_EFF_MASK;</div><div class='del'>-		ctrl |= FLEXCAN_MB_CNT_IDE | FLEXCAN_MB_CNT_SRR;</div><div class='del'>-	} else {</div><div class='del'>-		can_id = (cf-&gt;can_id &amp; CAN_SFF_MASK) &lt;&lt; 18;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (cf-&gt;can_id &amp; CAN_RTR_FLAG)</div><div class='del'>-		ctrl |= FLEXCAN_MB_CNT_RTR;</div><div class='del'>-</div><div class='del'>-	if (cf-&gt;can_dlc &gt; 0) {</div><div class='del'>-		u32 data = be32_to_cpup((__be32 *)&amp;cf-&gt;data[0]);</div><div class='del'>-		flexcan_write(data, &amp;regs-&gt;cantxfg[FLEXCAN_TX_BUF_ID].data[0]);</div><div class='del'>-	}</div><div class='del'>-	if (cf-&gt;can_dlc &gt; 3) {</div><div class='del'>-		u32 data = be32_to_cpup((__be32 *)&amp;cf-&gt;data[4]);</div><div class='del'>-		flexcan_write(data, &amp;regs-&gt;cantxfg[FLEXCAN_TX_BUF_ID].data[1]);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	can_put_echo_skb(skb, dev, 0);</div><div class='del'>-</div><div class='del'>-	flexcan_write(can_id, &amp;regs-&gt;cantxfg[FLEXCAN_TX_BUF_ID].can_id);</div><div class='del'>-	flexcan_write(ctrl, &amp;regs-&gt;cantxfg[FLEXCAN_TX_BUF_ID].can_ctrl);</div><div class='del'>-</div><div class='del'>-	/* Errata ERR005829 step8:</div><div class='del'>-	 * Write twice INACTIVE(0x8) code to first MB.</div><div class='del'>-	 */</div><div class='del'>-	flexcan_write(FLEXCAN_MB_CODE_TX_INACTIVE,</div><div class='del'>-		      &amp;regs-&gt;cantxfg[FLEXCAN_TX_BUF_RESERVED].can_ctrl);</div><div class='del'>-	flexcan_write(FLEXCAN_MB_CODE_TX_INACTIVE,</div><div class='del'>-		      &amp;regs-&gt;cantxfg[FLEXCAN_TX_BUF_RESERVED].can_ctrl);</div><div class='del'>-</div><div class='del'>-	return NETDEV_TX_OK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void do_bus_err(struct net_device *dev,</div><div class='del'>-		       struct can_frame *cf, u32 reg_esr)</div><div class='del'>-{</div><div class='del'>-	struct flexcan_priv *priv = netdev_priv(dev);</div><div class='del'>-	int rx_errors = 0, tx_errors = 0;</div><div class='del'>-</div><div class='del'>-	cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='del'>-</div><div class='del'>-	if (reg_esr &amp; FLEXCAN_ESR_BIT1_ERR) {</div><div class='del'>-		netdev_dbg(dev, "BIT1_ERR irq\n");</div><div class='del'>-		cf-&gt;data[2] |= CAN_ERR_PROT_BIT1;</div><div class='del'>-		tx_errors = 1;</div><div class='del'>-	}</div><div class='del'>-	if (reg_esr &amp; FLEXCAN_ESR_BIT0_ERR) {</div><div class='del'>-		netdev_dbg(dev, "BIT0_ERR irq\n");</div><div class='del'>-		cf-&gt;data[2] |= CAN_ERR_PROT_BIT0;</div><div class='del'>-		tx_errors = 1;</div><div class='del'>-	}</div><div class='del'>-	if (reg_esr &amp; FLEXCAN_ESR_ACK_ERR) {</div><div class='del'>-		netdev_dbg(dev, "ACK_ERR irq\n");</div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_ACK;</div><div class='del'>-		cf-&gt;data[3] |= CAN_ERR_PROT_LOC_ACK;</div><div class='del'>-		tx_errors = 1;</div><div class='del'>-	}</div><div class='del'>-	if (reg_esr &amp; FLEXCAN_ESR_CRC_ERR) {</div><div class='del'>-		netdev_dbg(dev, "CRC_ERR irq\n");</div><div class='del'>-		cf-&gt;data[2] |= CAN_ERR_PROT_BIT;</div><div class='del'>-		cf-&gt;data[3] |= CAN_ERR_PROT_LOC_CRC_SEQ;</div><div class='del'>-		rx_errors = 1;</div><div class='del'>-	}</div><div class='del'>-	if (reg_esr &amp; FLEXCAN_ESR_FRM_ERR) {</div><div class='del'>-		netdev_dbg(dev, "FRM_ERR irq\n");</div><div class='del'>-		cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='del'>-		rx_errors = 1;</div><div class='del'>-	}</div><div class='del'>-	if (reg_esr &amp; FLEXCAN_ESR_STF_ERR) {</div><div class='del'>-		netdev_dbg(dev, "STF_ERR irq\n");</div><div class='del'>-		cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='del'>-		rx_errors = 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	priv-&gt;can.can_stats.bus_error++;</div><div class='del'>-	if (rx_errors)</div><div class='del'>-		dev-&gt;stats.rx_errors++;</div><div class='del'>-	if (tx_errors)</div><div class='del'>-		dev-&gt;stats.tx_errors++;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int flexcan_poll_bus_err(struct net_device *dev, u32 reg_esr)</div><div class='del'>-{</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	struct can_frame *cf;</div><div class='del'>-</div><div class='del'>-	skb = alloc_can_err_skb(dev, &amp;cf);</div><div class='del'>-	if (unlikely(!skb))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	do_bus_err(dev, cf, reg_esr);</div><div class='del'>-</div><div class='del'>-	dev-&gt;stats.rx_packets++;</div><div class='del'>-	dev-&gt;stats.rx_bytes += cf-&gt;can_dlc;</div><div class='del'>-	netif_receive_skb(skb);</div><div class='del'>-</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int flexcan_poll_state(struct net_device *dev, u32 reg_esr)</div><div class='del'>-{</div><div class='del'>-	struct flexcan_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	struct can_frame *cf;</div><div class='del'>-	enum can_state new_state = 0, rx_state = 0, tx_state = 0;</div><div class='del'>-	int flt;</div><div class='del'>-	struct can_berr_counter bec;</div><div class='del'>-</div><div class='del'>-	flt = reg_esr &amp; FLEXCAN_ESR_FLT_CONF_MASK;</div><div class='del'>-	if (likely(flt == FLEXCAN_ESR_FLT_CONF_ACTIVE)) {</div><div class='del'>-		tx_state = unlikely(reg_esr &amp; FLEXCAN_ESR_TX_WRN) ?</div><div class='del'>-			   CAN_STATE_ERROR_WARNING : CAN_STATE_ERROR_ACTIVE;</div><div class='del'>-		rx_state = unlikely(reg_esr &amp; FLEXCAN_ESR_RX_WRN) ?</div><div class='del'>-			   CAN_STATE_ERROR_WARNING : CAN_STATE_ERROR_ACTIVE;</div><div class='del'>-		new_state = max(tx_state, rx_state);</div><div class='del'>-	} else {</div><div class='del'>-		__flexcan_get_berr_counter(dev, &amp;bec);</div><div class='del'>-		new_state = flt == FLEXCAN_ESR_FLT_CONF_PASSIVE ?</div><div class='del'>-			    CAN_STATE_ERROR_PASSIVE : CAN_STATE_BUS_OFF;</div><div class='del'>-		rx_state = bec.rxerr &gt;= bec.txerr ? new_state : 0;</div><div class='del'>-		tx_state = bec.rxerr &lt;= bec.txerr ? new_state : 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* state hasn't changed */</div><div class='del'>-	if (likely(new_state == priv-&gt;can.state))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	skb = alloc_can_err_skb(dev, &amp;cf);</div><div class='del'>-	if (unlikely(!skb))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	can_change_state(dev, cf, tx_state, rx_state);</div><div class='del'>-</div><div class='del'>-	if (unlikely(new_state == CAN_STATE_BUS_OFF))</div><div class='del'>-		can_bus_off(dev);</div><div class='del'>-</div><div class='del'>-	dev-&gt;stats.rx_packets++;</div><div class='del'>-	dev-&gt;stats.rx_bytes += cf-&gt;can_dlc;</div><div class='del'>-	netif_receive_skb(skb);</div><div class='del'>-</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void flexcan_read_fifo(const struct net_device *dev,</div><div class='del'>-			      struct can_frame *cf)</div><div class='del'>-{</div><div class='del'>-	const struct flexcan_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct flexcan_regs __iomem *regs = priv-&gt;base;</div><div class='del'>-	struct flexcan_mb __iomem *mb = &amp;regs-&gt;cantxfg[0];</div><div class='del'>-	u32 reg_ctrl, reg_id;</div><div class='del'>-</div><div class='del'>-	reg_ctrl = flexcan_read(&amp;mb-&gt;can_ctrl);</div><div class='del'>-	reg_id = flexcan_read(&amp;mb-&gt;can_id);</div><div class='del'>-	if (reg_ctrl &amp; FLEXCAN_MB_CNT_IDE)</div><div class='del'>-		cf-&gt;can_id = ((reg_id &gt;&gt; 0) &amp; CAN_EFF_MASK) | CAN_EFF_FLAG;</div><div class='del'>-	else</div><div class='del'>-		cf-&gt;can_id = (reg_id &gt;&gt; 18) &amp; CAN_SFF_MASK;</div><div class='del'>-</div><div class='del'>-	if (reg_ctrl &amp; FLEXCAN_MB_CNT_RTR)</div><div class='del'>-		cf-&gt;can_id |= CAN_RTR_FLAG;</div><div class='del'>-	cf-&gt;can_dlc = get_can_dlc((reg_ctrl &gt;&gt; 16) &amp; 0xf);</div><div class='del'>-</div><div class='del'>-	*(__be32 *)(cf-&gt;data + 0) = cpu_to_be32(flexcan_read(&amp;mb-&gt;data[0]));</div><div class='del'>-	*(__be32 *)(cf-&gt;data + 4) = cpu_to_be32(flexcan_read(&amp;mb-&gt;data[1]));</div><div class='del'>-</div><div class='del'>-	/* mark as read */</div><div class='del'>-	flexcan_write(FLEXCAN_IFLAG_RX_FIFO_AVAILABLE, &amp;regs-&gt;iflag1);</div><div class='del'>-	flexcan_read(&amp;regs-&gt;timer);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int flexcan_read_frame(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='del'>-	struct can_frame *cf;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-</div><div class='del'>-	skb = alloc_can_skb(dev, &amp;cf);</div><div class='del'>-	if (unlikely(!skb)) {</div><div class='del'>-		stats-&gt;rx_dropped++;</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	flexcan_read_fifo(dev, cf);</div><div class='del'>-</div><div class='del'>-	stats-&gt;rx_packets++;</div><div class='del'>-	stats-&gt;rx_bytes += cf-&gt;can_dlc;</div><div class='del'>-	netif_receive_skb(skb);</div><div class='del'>-</div><div class='del'>-	can_led_event(dev, CAN_LED_EVENT_RX);</div><div class='del'>-</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int flexcan_poll(struct napi_struct *napi, int quota)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = napi-&gt;dev;</div><div class='del'>-	const struct flexcan_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct flexcan_regs __iomem *regs = priv-&gt;base;</div><div class='del'>-	u32 reg_iflag1, reg_esr;</div><div class='del'>-	int work_done = 0;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * The error bits are cleared on read,</div><div class='del'>-	 * use saved value from irq handler.</div><div class='del'>-	 */</div><div class='del'>-	reg_esr = flexcan_read(&amp;regs-&gt;esr) | priv-&gt;reg_esr;</div><div class='del'>-</div><div class='del'>-	/* handle state changes */</div><div class='del'>-	work_done += flexcan_poll_state(dev, reg_esr);</div><div class='del'>-</div><div class='del'>-	/* handle RX-FIFO */</div><div class='del'>-	reg_iflag1 = flexcan_read(&amp;regs-&gt;iflag1);</div><div class='del'>-	while (reg_iflag1 &amp; FLEXCAN_IFLAG_RX_FIFO_AVAILABLE &amp;&amp;</div><div class='del'>-	       work_done &lt; quota) {</div><div class='del'>-		work_done += flexcan_read_frame(dev);</div><div class='del'>-		reg_iflag1 = flexcan_read(&amp;regs-&gt;iflag1);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* report bus errors */</div><div class='del'>-	if (flexcan_has_and_handle_berr(priv, reg_esr) &amp;&amp; work_done &lt; quota)</div><div class='del'>-		work_done += flexcan_poll_bus_err(dev, reg_esr);</div><div class='del'>-</div><div class='del'>-	if (work_done &lt; quota) {</div><div class='del'>-		napi_complete(napi);</div><div class='del'>-		/* enable IRQs */</div><div class='del'>-		flexcan_write(FLEXCAN_IFLAG_DEFAULT, &amp;regs-&gt;imask1);</div><div class='del'>-		flexcan_write(priv-&gt;reg_ctrl_default, &amp;regs-&gt;ctrl);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return work_done;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static irqreturn_t flexcan_irq(int irq, void *dev_id)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = dev_id;</div><div class='del'>-	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='del'>-	struct flexcan_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct flexcan_regs __iomem *regs = priv-&gt;base;</div><div class='del'>-	u32 reg_iflag1, reg_esr;</div><div class='del'>-</div><div class='del'>-	reg_iflag1 = flexcan_read(&amp;regs-&gt;iflag1);</div><div class='del'>-	reg_esr = flexcan_read(&amp;regs-&gt;esr);</div><div class='del'>-	/* ACK all bus error and state change IRQ sources */</div><div class='del'>-	if (reg_esr &amp; FLEXCAN_ESR_ALL_INT)</div><div class='del'>-		flexcan_write(reg_esr &amp; FLEXCAN_ESR_ALL_INT, &amp;regs-&gt;esr);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * schedule NAPI in case of:</div><div class='del'>-	 * - rx IRQ</div><div class='del'>-	 * - state change IRQ</div><div class='del'>-	 * - bus error IRQ and bus error reporting is activated</div><div class='del'>-	 */</div><div class='del'>-	if ((reg_iflag1 &amp; FLEXCAN_IFLAG_RX_FIFO_AVAILABLE) ||</div><div class='del'>-	    (reg_esr &amp; FLEXCAN_ESR_ERR_STATE) ||</div><div class='del'>-	    flexcan_has_and_handle_berr(priv, reg_esr)) {</div><div class='del'>-		/*</div><div class='del'>-		 * The error bits are cleared on read,</div><div class='del'>-		 * save them for later use.</div><div class='del'>-		 */</div><div class='del'>-		priv-&gt;reg_esr = reg_esr &amp; FLEXCAN_ESR_ERR_BUS;</div><div class='del'>-		flexcan_write(FLEXCAN_IFLAG_DEFAULT &amp;</div><div class='del'>-			~FLEXCAN_IFLAG_RX_FIFO_AVAILABLE, &amp;regs-&gt;imask1);</div><div class='del'>-		flexcan_write(priv-&gt;reg_ctrl_default &amp; ~FLEXCAN_CTRL_ERR_ALL,</div><div class='del'>-		       &amp;regs-&gt;ctrl);</div><div class='del'>-		napi_schedule(&amp;priv-&gt;napi);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* FIFO overflow */</div><div class='del'>-	if (reg_iflag1 &amp; FLEXCAN_IFLAG_RX_FIFO_OVERFLOW) {</div><div class='del'>-		flexcan_write(FLEXCAN_IFLAG_RX_FIFO_OVERFLOW, &amp;regs-&gt;iflag1);</div><div class='del'>-		dev-&gt;stats.rx_over_errors++;</div><div class='del'>-		dev-&gt;stats.rx_errors++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* transmission complete interrupt */</div><div class='del'>-	if (reg_iflag1 &amp; (1 &lt;&lt; FLEXCAN_TX_BUF_ID)) {</div><div class='del'>-		stats-&gt;tx_bytes += can_get_echo_skb(dev, 0);</div><div class='del'>-		stats-&gt;tx_packets++;</div><div class='del'>-		can_led_event(dev, CAN_LED_EVENT_TX);</div><div class='del'>-		/* after sending a RTR frame mailbox is in RX mode */</div><div class='del'>-		flexcan_write(FLEXCAN_MB_CODE_TX_INACTIVE,</div><div class='del'>-			      &amp;regs-&gt;cantxfg[FLEXCAN_TX_BUF_ID].can_ctrl);</div><div class='del'>-		flexcan_write((1 &lt;&lt; FLEXCAN_TX_BUF_ID), &amp;regs-&gt;iflag1);</div><div class='del'>-		netif_wake_queue(dev);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void flexcan_set_bittiming(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	const struct flexcan_priv *priv = netdev_priv(dev);</div><div class='del'>-	const struct can_bittiming *bt = &amp;priv-&gt;can.bittiming;</div><div class='del'>-	struct flexcan_regs __iomem *regs = priv-&gt;base;</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	reg = flexcan_read(&amp;regs-&gt;ctrl);</div><div class='del'>-	reg &amp;= ~(FLEXCAN_CTRL_PRESDIV(0xff) |</div><div class='del'>-		 FLEXCAN_CTRL_RJW(0x3) |</div><div class='del'>-		 FLEXCAN_CTRL_PSEG1(0x7) |</div><div class='del'>-		 FLEXCAN_CTRL_PSEG2(0x7) |</div><div class='del'>-		 FLEXCAN_CTRL_PROPSEG(0x7) |</div><div class='del'>-		 FLEXCAN_CTRL_LPB |</div><div class='del'>-		 FLEXCAN_CTRL_SMP |</div><div class='del'>-		 FLEXCAN_CTRL_LOM);</div><div class='del'>-</div><div class='del'>-	reg |= FLEXCAN_CTRL_PRESDIV(bt-&gt;brp - 1) |</div><div class='del'>-		FLEXCAN_CTRL_PSEG1(bt-&gt;phase_seg1 - 1) |</div><div class='del'>-		FLEXCAN_CTRL_PSEG2(bt-&gt;phase_seg2 - 1) |</div><div class='del'>-		FLEXCAN_CTRL_RJW(bt-&gt;sjw - 1) |</div><div class='del'>-		FLEXCAN_CTRL_PROPSEG(bt-&gt;prop_seg - 1);</div><div class='del'>-</div><div class='del'>-	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LOOPBACK)</div><div class='del'>-		reg |= FLEXCAN_CTRL_LPB;</div><div class='del'>-	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LISTENONLY)</div><div class='del'>-		reg |= FLEXCAN_CTRL_LOM;</div><div class='del'>-	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_3_SAMPLES)</div><div class='del'>-		reg |= FLEXCAN_CTRL_SMP;</div><div class='del'>-</div><div class='del'>-	netdev_info(dev, "writing ctrl=0x%08x\n", reg);</div><div class='del'>-	flexcan_write(reg, &amp;regs-&gt;ctrl);</div><div class='del'>-</div><div class='del'>-	/* print chip status */</div><div class='del'>-	netdev_dbg(dev, "%s: mcr=0x%08x ctrl=0x%08x\n", __func__,</div><div class='del'>-		   flexcan_read(&amp;regs-&gt;mcr), flexcan_read(&amp;regs-&gt;ctrl));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * flexcan_chip_start</div><div class='del'>- *</div><div class='del'>- * this functions is entered with clocks enabled</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-static int flexcan_chip_start(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct flexcan_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct flexcan_regs __iomem *regs = priv-&gt;base;</div><div class='del'>-	u32 reg_mcr, reg_ctrl, reg_ctrl2, reg_mecr;</div><div class='del'>-	int err, i;</div><div class='del'>-</div><div class='del'>-	/* enable module */</div><div class='del'>-	err = flexcan_chip_enable(priv);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	/* soft reset */</div><div class='del'>-	err = flexcan_chip_softreset(priv);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out_chip_disable;</div><div class='del'>-</div><div class='del'>-	flexcan_set_bittiming(dev);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * MCR</div><div class='del'>-	 *</div><div class='del'>-	 * enable freeze</div><div class='del'>-	 * enable fifo</div><div class='del'>-	 * halt now</div><div class='del'>-	 * only supervisor access</div><div class='del'>-	 * enable warning int</div><div class='del'>-	 * choose format C</div><div class='del'>-	 * disable local echo</div><div class='del'>-	 *</div><div class='del'>-	 */</div><div class='del'>-	reg_mcr = flexcan_read(&amp;regs-&gt;mcr);</div><div class='del'>-	reg_mcr &amp;= ~FLEXCAN_MCR_MAXMB(0xff);</div><div class='del'>-	reg_mcr |= FLEXCAN_MCR_FRZ | FLEXCAN_MCR_FEN | FLEXCAN_MCR_HALT |</div><div class='del'>-		FLEXCAN_MCR_SUPV | FLEXCAN_MCR_WRN_EN |</div><div class='del'>-		FLEXCAN_MCR_IDAM_C | FLEXCAN_MCR_SRX_DIS |</div><div class='del'>-		FLEXCAN_MCR_MAXMB(FLEXCAN_TX_BUF_ID);</div><div class='del'>-	netdev_dbg(dev, "%s: writing mcr=0x%08x", __func__, reg_mcr);</div><div class='del'>-	flexcan_write(reg_mcr, &amp;regs-&gt;mcr);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * CTRL</div><div class='del'>-	 *</div><div class='del'>-	 * disable timer sync feature</div><div class='del'>-	 *</div><div class='del'>-	 * disable auto busoff recovery</div><div class='del'>-	 * transmit lowest buffer first</div><div class='del'>-	 *</div><div class='del'>-	 * enable tx and rx warning interrupt</div><div class='del'>-	 * enable bus off interrupt</div><div class='del'>-	 * (== FLEXCAN_CTRL_ERR_STATE)</div><div class='del'>-	 */</div><div class='del'>-	reg_ctrl = flexcan_read(&amp;regs-&gt;ctrl);</div><div class='del'>-	reg_ctrl &amp;= ~FLEXCAN_CTRL_TSYN;</div><div class='del'>-	reg_ctrl |= FLEXCAN_CTRL_BOFF_REC | FLEXCAN_CTRL_LBUF |</div><div class='del'>-		FLEXCAN_CTRL_ERR_STATE;</div><div class='del'>-	/*</div><div class='del'>-	 * enable the "error interrupt" (FLEXCAN_CTRL_ERR_MSK),</div><div class='del'>-	 * on most Flexcan cores, too. Otherwise we don't get</div><div class='del'>-	 * any error warning or passive interrupts.</div><div class='del'>-	 */</div><div class='del'>-	if (priv-&gt;devtype_data-&gt;features &amp; FLEXCAN_HAS_BROKEN_ERR_STATE ||</div><div class='del'>-	    priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING)</div><div class='del'>-		reg_ctrl |= FLEXCAN_CTRL_ERR_MSK;</div><div class='del'>-	else</div><div class='del'>-		reg_ctrl &amp;= ~FLEXCAN_CTRL_ERR_MSK;</div><div class='del'>-</div><div class='del'>-	/* save for later use */</div><div class='del'>-	priv-&gt;reg_ctrl_default = reg_ctrl;</div><div class='del'>-	netdev_dbg(dev, "%s: writing ctrl=0x%08x", __func__, reg_ctrl);</div><div class='del'>-	flexcan_write(reg_ctrl, &amp;regs-&gt;ctrl);</div><div class='del'>-</div><div class='del'>-	/* clear and invalidate all mailboxes first */</div><div class='del'>-	for (i = FLEXCAN_TX_BUF_ID; i &lt; ARRAY_SIZE(regs-&gt;cantxfg); i++) {</div><div class='del'>-		flexcan_write(FLEXCAN_MB_CODE_RX_INACTIVE,</div><div class='del'>-			      &amp;regs-&gt;cantxfg[i].can_ctrl);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Errata ERR005829: mark first TX mailbox as INACTIVE */</div><div class='del'>-	flexcan_write(FLEXCAN_MB_CODE_TX_INACTIVE,</div><div class='del'>-		      &amp;regs-&gt;cantxfg[FLEXCAN_TX_BUF_RESERVED].can_ctrl);</div><div class='del'>-</div><div class='del'>-	/* mark TX mailbox as INACTIVE */</div><div class='del'>-	flexcan_write(FLEXCAN_MB_CODE_TX_INACTIVE,</div><div class='del'>-		      &amp;regs-&gt;cantxfg[FLEXCAN_TX_BUF_ID].can_ctrl);</div><div class='del'>-</div><div class='del'>-	/* acceptance mask/acceptance code (accept everything) */</div><div class='del'>-	flexcan_write(0x0, &amp;regs-&gt;rxgmask);</div><div class='del'>-	flexcan_write(0x0, &amp;regs-&gt;rx14mask);</div><div class='del'>-	flexcan_write(0x0, &amp;regs-&gt;rx15mask);</div><div class='del'>-</div><div class='del'>-	if (priv-&gt;devtype_data-&gt;features &amp; FLEXCAN_HAS_V10_FEATURES)</div><div class='del'>-		flexcan_write(0x0, &amp;regs-&gt;rxfgmask);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * On Vybrid, disable memory error detection interrupts</div><div class='del'>-	 * and freeze mode.</div><div class='del'>-	 * This also works around errata e5295 which generates</div><div class='del'>-	 * false positive memory errors and put the device in</div><div class='del'>-	 * freeze mode.</div><div class='del'>-	 */</div><div class='del'>-	if (priv-&gt;devtype_data-&gt;features &amp; FLEXCAN_HAS_MECR_FEATURES) {</div><div class='del'>-		/*</div><div class='del'>-		 * Follow the protocol as described in "Detection</div><div class='del'>-		 * and Correction of Memory Errors" to write to</div><div class='del'>-		 * MECR register</div><div class='del'>-		 */</div><div class='del'>-		reg_ctrl2 = flexcan_read(&amp;regs-&gt;ctrl2);</div><div class='del'>-		reg_ctrl2 |= FLEXCAN_CTRL2_ECRWRE;</div><div class='del'>-		flexcan_write(reg_ctrl2, &amp;regs-&gt;ctrl2);</div><div class='del'>-</div><div class='del'>-		reg_mecr = flexcan_read(&amp;regs-&gt;mecr);</div><div class='del'>-		reg_mecr &amp;= ~FLEXCAN_MECR_ECRWRDIS;</div><div class='del'>-		flexcan_write(reg_mecr, &amp;regs-&gt;mecr);</div><div class='del'>-		reg_mecr &amp;= ~(FLEXCAN_MECR_NCEFAFRZ | FLEXCAN_MECR_HANCEI_MSK |</div><div class='del'>-				FLEXCAN_MECR_FANCEI_MSK);</div><div class='del'>-		flexcan_write(reg_mecr, &amp;regs-&gt;mecr);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err = flexcan_transceiver_enable(priv);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out_chip_disable;</div><div class='del'>-</div><div class='del'>-	/* synchronize with the can bus */</div><div class='del'>-	err = flexcan_chip_unfreeze(priv);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out_transceiver_disable;</div><div class='del'>-</div><div class='del'>-	priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='del'>-</div><div class='del'>-	/* enable FIFO interrupts */</div><div class='del'>-	flexcan_write(FLEXCAN_IFLAG_DEFAULT, &amp;regs-&gt;imask1);</div><div class='del'>-</div><div class='del'>-	/* print chip status */</div><div class='del'>-	netdev_dbg(dev, "%s: reading mcr=0x%08x ctrl=0x%08x\n", __func__,</div><div class='del'>-		   flexcan_read(&amp;regs-&gt;mcr), flexcan_read(&amp;regs-&gt;ctrl));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>- out_transceiver_disable:</div><div class='del'>-	flexcan_transceiver_disable(priv);</div><div class='del'>- out_chip_disable:</div><div class='del'>-	flexcan_chip_disable(priv);</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * flexcan_chip_stop</div><div class='del'>- *</div><div class='del'>- * this functions is entered with clocks enabled</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-static void flexcan_chip_stop(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct flexcan_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct flexcan_regs __iomem *regs = priv-&gt;base;</div><div class='del'>-</div><div class='del'>-	/* freeze + disable module */</div><div class='del'>-	flexcan_chip_freeze(priv);</div><div class='del'>-	flexcan_chip_disable(priv);</div><div class='del'>-</div><div class='del'>-	/* Disable all interrupts */</div><div class='del'>-	flexcan_write(0, &amp;regs-&gt;imask1);</div><div class='del'>-	flexcan_write(priv-&gt;reg_ctrl_default &amp; ~FLEXCAN_CTRL_ERR_ALL,</div><div class='del'>-		      &amp;regs-&gt;ctrl);</div><div class='del'>-</div><div class='del'>-	flexcan_transceiver_disable(priv);</div><div class='del'>-	priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='del'>-</div><div class='del'>-	return;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int flexcan_open(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct flexcan_priv *priv = netdev_priv(dev);</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = clk_prepare_enable(priv-&gt;clk_ipg);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = clk_prepare_enable(priv-&gt;clk_per);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out_disable_ipg;</div><div class='del'>-</div><div class='del'>-	err = open_candev(dev);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out_disable_per;</div><div class='del'>-</div><div class='del'>-	err = request_irq(dev-&gt;irq, flexcan_irq, IRQF_SHARED, dev-&gt;name, dev);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out_close;</div><div class='del'>-</div><div class='del'>-	/* start chip and queuing */</div><div class='del'>-	err = flexcan_chip_start(dev);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out_free_irq;</div><div class='del'>-</div><div class='del'>-	can_led_event(dev, CAN_LED_EVENT_OPEN);</div><div class='del'>-</div><div class='del'>-	napi_enable(&amp;priv-&gt;napi);</div><div class='del'>-	netif_start_queue(dev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>- out_free_irq:</div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='del'>- out_close:</div><div class='del'>-	close_candev(dev);</div><div class='del'>- out_disable_per:</div><div class='del'>-	clk_disable_unprepare(priv-&gt;clk_per);</div><div class='del'>- out_disable_ipg:</div><div class='del'>-	clk_disable_unprepare(priv-&gt;clk_ipg);</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int flexcan_close(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct flexcan_priv *priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	netif_stop_queue(dev);</div><div class='del'>-	napi_disable(&amp;priv-&gt;napi);</div><div class='del'>-	flexcan_chip_stop(dev);</div><div class='del'>-</div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='del'>-	clk_disable_unprepare(priv-&gt;clk_per);</div><div class='del'>-	clk_disable_unprepare(priv-&gt;clk_ipg);</div><div class='del'>-</div><div class='del'>-	close_candev(dev);</div><div class='del'>-</div><div class='del'>-	can_led_event(dev, CAN_LED_EVENT_STOP);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int flexcan_set_mode(struct net_device *dev, enum can_mode mode)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	switch (mode) {</div><div class='del'>-	case CAN_MODE_START:</div><div class='del'>-		err = flexcan_chip_start(dev);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-</div><div class='del'>-		netif_wake_queue(dev);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct net_device_ops flexcan_netdev_ops = {</div><div class='del'>-	.ndo_open	= flexcan_open,</div><div class='del'>-	.ndo_stop	= flexcan_close,</div><div class='del'>-	.ndo_start_xmit	= flexcan_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int register_flexcandev(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct flexcan_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct flexcan_regs __iomem *regs = priv-&gt;base;</div><div class='del'>-	u32 reg, err;</div><div class='del'>-</div><div class='del'>-	err = clk_prepare_enable(priv-&gt;clk_ipg);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = clk_prepare_enable(priv-&gt;clk_per);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out_disable_ipg;</div><div class='del'>-</div><div class='del'>-	/* select "bus clock", chip must be disabled */</div><div class='del'>-	err = flexcan_chip_disable(priv);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out_disable_per;</div><div class='del'>-	reg = flexcan_read(&amp;regs-&gt;ctrl);</div><div class='del'>-	reg |= FLEXCAN_CTRL_CLK_SRC;</div><div class='del'>-	flexcan_write(reg, &amp;regs-&gt;ctrl);</div><div class='del'>-</div><div class='del'>-	err = flexcan_chip_enable(priv);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out_chip_disable;</div><div class='del'>-</div><div class='del'>-	/* set freeze, halt and activate FIFO, restrict register access */</div><div class='del'>-	reg = flexcan_read(&amp;regs-&gt;mcr);</div><div class='del'>-	reg |= FLEXCAN_MCR_FRZ | FLEXCAN_MCR_HALT |</div><div class='del'>-		FLEXCAN_MCR_FEN | FLEXCAN_MCR_SUPV;</div><div class='del'>-	flexcan_write(reg, &amp;regs-&gt;mcr);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Currently we only support newer versions of this core</div><div class='del'>-	 * featuring a RX FIFO. Older cores found on some Coldfire</div><div class='del'>-	 * derivates are not yet supported.</div><div class='del'>-	 */</div><div class='del'>-	reg = flexcan_read(&amp;regs-&gt;mcr);</div><div class='del'>-	if (!(reg &amp; FLEXCAN_MCR_FEN)) {</div><div class='del'>-		netdev_err(dev, "Could not enable RX FIFO, unsupported core\n");</div><div class='del'>-		err = -ENODEV;</div><div class='del'>-		goto out_chip_disable;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err = register_candev(dev);</div><div class='del'>-</div><div class='del'>-	/* disable core and turn off clocks */</div><div class='del'>- out_chip_disable:</div><div class='del'>-	flexcan_chip_disable(priv);</div><div class='del'>- out_disable_per:</div><div class='del'>-	clk_disable_unprepare(priv-&gt;clk_per);</div><div class='del'>- out_disable_ipg:</div><div class='del'>-	clk_disable_unprepare(priv-&gt;clk_ipg);</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void unregister_flexcandev(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	unregister_candev(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct of_device_id flexcan_of_match[] = {</div><div class='del'>-	{ .compatible = "fsl,imx6q-flexcan", .data = &amp;fsl_imx6q_devtype_data, },</div><div class='del'>-	{ .compatible = "fsl,imx28-flexcan", .data = &amp;fsl_imx28_devtype_data, },</div><div class='del'>-	{ .compatible = "fsl,p1010-flexcan", .data = &amp;fsl_p1010_devtype_data, },</div><div class='del'>-	{ .compatible = "fsl,vf610-flexcan", .data = &amp;fsl_vf610_devtype_data, },</div><div class='del'>-	{ /* sentinel */ },</div><div class='del'>-};</div><div class='del'>-MODULE_DEVICE_TABLE(of, flexcan_of_match);</div><div class='del'>-</div><div class='del'>-static const struct platform_device_id flexcan_id_table[] = {</div><div class='del'>-	{ .name = "flexcan", .driver_data = (kernel_ulong_t)&amp;fsl_p1010_devtype_data, },</div><div class='del'>-	{ /* sentinel */ },</div><div class='del'>-};</div><div class='del'>-MODULE_DEVICE_TABLE(platform, flexcan_id_table);</div><div class='del'>-</div><div class='del'>-static int flexcan_probe(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	const struct of_device_id *of_id;</div><div class='del'>-	const struct flexcan_devtype_data *devtype_data;</div><div class='del'>-	struct net_device *dev;</div><div class='del'>-	struct flexcan_priv *priv;</div><div class='del'>-	struct regulator *reg_xceiver;</div><div class='del'>-	struct resource *mem;</div><div class='del'>-	struct clk *clk_ipg = NULL, *clk_per = NULL;</div><div class='del'>-	void __iomem *base;</div><div class='del'>-	int err, irq;</div><div class='del'>-	u32 clock_freq = 0;</div><div class='del'>-</div><div class='del'>-	reg_xceiver = devm_regulator_get(&amp;pdev-&gt;dev, "xceiver");</div><div class='del'>-	if (PTR_ERR(reg_xceiver) == -EPROBE_DEFER)</div><div class='del'>-		return -EPROBE_DEFER;</div><div class='del'>-	else if (IS_ERR(reg_xceiver))</div><div class='del'>-		reg_xceiver = NULL;</div><div class='del'>-</div><div class='del'>-	if (pdev-&gt;dev.of_node)</div><div class='del'>-		of_property_read_u32(pdev-&gt;dev.of_node,</div><div class='del'>-						"clock-frequency", &amp;clock_freq);</div><div class='del'>-</div><div class='del'>-	if (!clock_freq) {</div><div class='del'>-		clk_ipg = devm_clk_get(&amp;pdev-&gt;dev, "ipg");</div><div class='del'>-		if (IS_ERR(clk_ipg)) {</div><div class='del'>-			dev_err(&amp;pdev-&gt;dev, "no ipg clock defined\n");</div><div class='del'>-			return PTR_ERR(clk_ipg);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		clk_per = devm_clk_get(&amp;pdev-&gt;dev, "per");</div><div class='del'>-		if (IS_ERR(clk_per)) {</div><div class='del'>-			dev_err(&amp;pdev-&gt;dev, "no per clock defined\n");</div><div class='del'>-			return PTR_ERR(clk_per);</div><div class='del'>-		}</div><div class='del'>-		clock_freq = clk_get_rate(clk_per);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='del'>-	irq = platform_get_irq(pdev, 0);</div><div class='del'>-	if (irq &lt;= 0)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	base = devm_ioremap_resource(&amp;pdev-&gt;dev, mem);</div><div class='del'>-	if (IS_ERR(base))</div><div class='del'>-		return PTR_ERR(base);</div><div class='del'>-</div><div class='del'>-	of_id = of_match_device(flexcan_of_match, &amp;pdev-&gt;dev);</div><div class='del'>-	if (of_id) {</div><div class='del'>-		devtype_data = of_id-&gt;data;</div><div class='del'>-	} else if (platform_get_device_id(pdev)-&gt;driver_data) {</div><div class='del'>-		devtype_data = (struct flexcan_devtype_data *)</div><div class='del'>-			platform_get_device_id(pdev)-&gt;driver_data;</div><div class='del'>-	} else {</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev = alloc_candev(sizeof(struct flexcan_priv), 1);</div><div class='del'>-	if (!dev)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	dev-&gt;netdev_ops = &amp;flexcan_netdev_ops;</div><div class='del'>-	dev-&gt;irq = irq;</div><div class='del'>-	dev-&gt;flags |= IFF_ECHO;</div><div class='del'>-</div><div class='del'>-	priv = netdev_priv(dev);</div><div class='del'>-	priv-&gt;can.clock.freq = clock_freq;</div><div class='del'>-	priv-&gt;can.bittiming_const = &amp;flexcan_bittiming_const;</div><div class='del'>-	priv-&gt;can.do_set_mode = flexcan_set_mode;</div><div class='del'>-	priv-&gt;can.do_get_berr_counter = flexcan_get_berr_counter;</div><div class='del'>-	priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK |</div><div class='del'>-		CAN_CTRLMODE_LISTENONLY	| CAN_CTRLMODE_3_SAMPLES |</div><div class='del'>-		CAN_CTRLMODE_BERR_REPORTING;</div><div class='del'>-	priv-&gt;base = base;</div><div class='del'>-	priv-&gt;clk_ipg = clk_ipg;</div><div class='del'>-	priv-&gt;clk_per = clk_per;</div><div class='del'>-	priv-&gt;pdata = dev_get_platdata(&amp;pdev-&gt;dev);</div><div class='del'>-	priv-&gt;devtype_data = devtype_data;</div><div class='del'>-</div><div class='del'>-	priv-&gt;reg_xceiver = reg_xceiver;</div><div class='del'>-</div><div class='del'>-	netif_napi_add(dev, &amp;priv-&gt;napi, flexcan_poll, FLEXCAN_NAPI_WEIGHT);</div><div class='del'>-</div><div class='del'>-	platform_set_drvdata(pdev, dev);</div><div class='del'>-	SET_NETDEV_DEV(dev, &amp;pdev-&gt;dev);</div><div class='del'>-</div><div class='del'>-	err = register_flexcandev(dev);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "registering netdev failed\n");</div><div class='del'>-		goto failed_register;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	devm_can_led_init(dev);</div><div class='del'>-</div><div class='del'>-	dev_info(&amp;pdev-&gt;dev, "device registered (reg_base=%p, irq=%d)\n",</div><div class='del'>-		 priv-&gt;base, dev-&gt;irq);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>- failed_register:</div><div class='del'>-	free_candev(dev);</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int flexcan_remove(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = platform_get_drvdata(pdev);</div><div class='del'>-	struct flexcan_priv *priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	unregister_flexcandev(dev);</div><div class='del'>-	netif_napi_del(&amp;priv-&gt;napi);</div><div class='del'>-	free_candev(dev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __maybe_unused flexcan_suspend(struct device *device)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = dev_get_drvdata(device);</div><div class='del'>-	struct flexcan_priv *priv = netdev_priv(dev);</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = flexcan_chip_disable(priv);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	if (netif_running(dev)) {</div><div class='del'>-		netif_stop_queue(dev);</div><div class='del'>-		netif_device_detach(dev);</div><div class='del'>-	}</div><div class='del'>-	priv-&gt;can.state = CAN_STATE_SLEEPING;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __maybe_unused flexcan_resume(struct device *device)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = dev_get_drvdata(device);</div><div class='del'>-	struct flexcan_priv *priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='del'>-	if (netif_running(dev)) {</div><div class='del'>-		netif_device_attach(dev);</div><div class='del'>-		netif_start_queue(dev);</div><div class='del'>-	}</div><div class='del'>-	return flexcan_chip_enable(priv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static SIMPLE_DEV_PM_OPS(flexcan_pm_ops, flexcan_suspend, flexcan_resume);</div><div class='del'>-</div><div class='del'>-static struct platform_driver flexcan_driver = {</div><div class='del'>-	.driver = {</div><div class='del'>-		.name = DRV_NAME,</div><div class='del'>-		.pm = &amp;flexcan_pm_ops,</div><div class='del'>-		.of_match_table = flexcan_of_match,</div><div class='del'>-	},</div><div class='del'>-	.probe = flexcan_probe,</div><div class='del'>-	.remove = flexcan_remove,</div><div class='del'>-	.id_table = flexcan_id_table,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-module_platform_driver(flexcan_driver);</div><div class='del'>-</div><div class='del'>-MODULE_AUTHOR("Sascha Hauer &lt;kernel@pengutronix.de&gt;, "</div><div class='del'>-	      "Marc Kleine-Budde &lt;kernel@pengutronix.de&gt;");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='del'>-MODULE_DESCRIPTION("CAN port driver for flexcan based chip");</div><div class='head'>diff --git a/drivers/net/can/flexcan/Makefile b/drivers/net/can/flexcan/Makefile<br/>new file mode 100644<br/>index 000000000000..89d5695c902e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/flexcan/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/flexcan/Makefile</a></div><div class='hunk'>@@ -0,0 +1,7 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_CAN_FLEXCAN) += flexcan.o</div><div class='add'>+</div><div class='add'>+flexcan-objs :=</div><div class='add'>+flexcan-objs += flexcan-core.o</div><div class='add'>+flexcan-objs += flexcan-ethtool.o</div><div class='head'>diff --git a/drivers/net/can/flexcan/flexcan-core.c b/drivers/net/can/flexcan/flexcan-core.c<br/>new file mode 100644<br/>index 000000000000..f5d22c61503f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/flexcan/flexcan-core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/flexcan/flexcan-core.c</a></div><div class='hunk'>@@ -0,0 +1,2456 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+//</div><div class='add'>+// flexcan.c - FLEXCAN CAN controller driver</div><div class='add'>+//</div><div class='add'>+// Copyright (c) 2005-2006 Varma Electronics Oy</div><div class='add'>+// Copyright (c) 2009 Sascha Hauer, Pengutronix</div><div class='add'>+// Copyright (c) 2010-2017 Pengutronix, Marc Kleine-Budde &lt;kernel@pengutronix.de&gt;</div><div class='add'>+// Copyright (c) 2014 David Jander, Protonic Holland</div><div class='add'>+//</div><div class='add'>+// Based on code originally by Andrey Volkov &lt;avolkov@varma-el.com&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;dt-bindings/firmware/imx/rsrc.h&gt;</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/can.h&gt;</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/can/error.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/firmware/imx/sci.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/mfd/syscon.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/consumer.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/can/platform/flexcan.h&gt;</div><div class='add'>+#include &lt;linux/phy/phy.h&gt;</div><div class='add'>+#include &lt;linux/pm_runtime.h&gt;</div><div class='add'>+#include &lt;linux/property.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;linux/regulator/consumer.h&gt;</div><div class='add'>+</div><div class='add'>+#include "flexcan.h"</div><div class='add'>+</div><div class='add'>+#define DRV_NAME			"flexcan"</div><div class='add'>+</div><div class='add'>+/* 8 for RX fifo and 2 error handling */</div><div class='add'>+#define FLEXCAN_NAPI_WEIGHT		(8 + 2)</div><div class='add'>+</div><div class='add'>+/* FLEXCAN module configuration register (CANMCR) bits */</div><div class='add'>+#define FLEXCAN_MCR_MDIS		BIT(31)</div><div class='add'>+#define FLEXCAN_MCR_FRZ			BIT(30)</div><div class='add'>+#define FLEXCAN_MCR_FEN			BIT(29)</div><div class='add'>+#define FLEXCAN_MCR_HALT		BIT(28)</div><div class='add'>+#define FLEXCAN_MCR_NOT_RDY		BIT(27)</div><div class='add'>+#define FLEXCAN_MCR_WAK_MSK		BIT(26)</div><div class='add'>+#define FLEXCAN_MCR_SOFTRST		BIT(25)</div><div class='add'>+#define FLEXCAN_MCR_FRZ_ACK		BIT(24)</div><div class='add'>+#define FLEXCAN_MCR_SUPV		BIT(23)</div><div class='add'>+#define FLEXCAN_MCR_SLF_WAK		BIT(22)</div><div class='add'>+#define FLEXCAN_MCR_WRN_EN		BIT(21)</div><div class='add'>+#define FLEXCAN_MCR_LPM_ACK		BIT(20)</div><div class='add'>+#define FLEXCAN_MCR_WAK_SRC		BIT(19)</div><div class='add'>+#define FLEXCAN_MCR_DOZE		BIT(18)</div><div class='add'>+#define FLEXCAN_MCR_SRX_DIS		BIT(17)</div><div class='add'>+#define FLEXCAN_MCR_IRMQ		BIT(16)</div><div class='add'>+#define FLEXCAN_MCR_LPRIO_EN		BIT(13)</div><div class='add'>+#define FLEXCAN_MCR_AEN			BIT(12)</div><div class='add'>+#define FLEXCAN_MCR_FDEN		BIT(11)</div><div class='add'>+/* MCR_MAXMB: maximum used MBs is MAXMB + 1 */</div><div class='add'>+#define FLEXCAN_MCR_MAXMB(x)		((x) &amp; 0x7f)</div><div class='add'>+#define FLEXCAN_MCR_IDAM_A		(0x0 &lt;&lt; 8)</div><div class='add'>+#define FLEXCAN_MCR_IDAM_B		(0x1 &lt;&lt; 8)</div><div class='add'>+#define FLEXCAN_MCR_IDAM_C		(0x2 &lt;&lt; 8)</div><div class='add'>+#define FLEXCAN_MCR_IDAM_D		(0x3 &lt;&lt; 8)</div><div class='add'>+</div><div class='add'>+/* FLEXCAN control register (CANCTRL) bits */</div><div class='add'>+#define FLEXCAN_CTRL_PRESDIV(x)		(((x) &amp; 0xff) &lt;&lt; 24)</div><div class='add'>+#define FLEXCAN_CTRL_RJW(x)		(((x) &amp; 0x03) &lt;&lt; 22)</div><div class='add'>+#define FLEXCAN_CTRL_PSEG1(x)		(((x) &amp; 0x07) &lt;&lt; 19)</div><div class='add'>+#define FLEXCAN_CTRL_PSEG2(x)		(((x) &amp; 0x07) &lt;&lt; 16)</div><div class='add'>+#define FLEXCAN_CTRL_BOFF_MSK		BIT(15)</div><div class='add'>+#define FLEXCAN_CTRL_ERR_MSK		BIT(14)</div><div class='add'>+#define FLEXCAN_CTRL_CLK_SRC		BIT(13)</div><div class='add'>+#define FLEXCAN_CTRL_LPB		BIT(12)</div><div class='add'>+#define FLEXCAN_CTRL_TWRN_MSK		BIT(11)</div><div class='add'>+#define FLEXCAN_CTRL_RWRN_MSK		BIT(10)</div><div class='add'>+#define FLEXCAN_CTRL_SMP		BIT(7)</div><div class='add'>+#define FLEXCAN_CTRL_BOFF_REC		BIT(6)</div><div class='add'>+#define FLEXCAN_CTRL_TSYN		BIT(5)</div><div class='add'>+#define FLEXCAN_CTRL_LBUF		BIT(4)</div><div class='add'>+#define FLEXCAN_CTRL_LOM		BIT(3)</div><div class='add'>+#define FLEXCAN_CTRL_PROPSEG(x)		((x) &amp; 0x07)</div><div class='add'>+#define FLEXCAN_CTRL_ERR_BUS		(FLEXCAN_CTRL_ERR_MSK)</div><div class='add'>+#define FLEXCAN_CTRL_ERR_STATE \</div><div class='add'>+	(FLEXCAN_CTRL_TWRN_MSK | FLEXCAN_CTRL_RWRN_MSK | \</div><div class='add'>+	 FLEXCAN_CTRL_BOFF_MSK)</div><div class='add'>+#define FLEXCAN_CTRL_ERR_ALL \</div><div class='add'>+	(FLEXCAN_CTRL_ERR_BUS | FLEXCAN_CTRL_ERR_STATE)</div><div class='add'>+</div><div class='add'>+/* FLEXCAN control register 2 (CTRL2) bits */</div><div class='add'>+#define FLEXCAN_CTRL2_ECRWRE		BIT(29)</div><div class='add'>+#define FLEXCAN_CTRL2_WRMFRZ		BIT(28)</div><div class='add'>+#define FLEXCAN_CTRL2_RFFN(x)		(((x) &amp; 0x0f) &lt;&lt; 24)</div><div class='add'>+#define FLEXCAN_CTRL2_TASD(x)		(((x) &amp; 0x1f) &lt;&lt; 19)</div><div class='add'>+#define FLEXCAN_CTRL2_MRP		BIT(18)</div><div class='add'>+#define FLEXCAN_CTRL2_RRS		BIT(17)</div><div class='add'>+#define FLEXCAN_CTRL2_EACEN		BIT(16)</div><div class='add'>+#define FLEXCAN_CTRL2_ISOCANFDEN	BIT(12)</div><div class='add'>+</div><div class='add'>+/* FLEXCAN memory error control register (MECR) bits */</div><div class='add'>+#define FLEXCAN_MECR_ECRWRDIS		BIT(31)</div><div class='add'>+#define FLEXCAN_MECR_HANCEI_MSK		BIT(19)</div><div class='add'>+#define FLEXCAN_MECR_FANCEI_MSK		BIT(18)</div><div class='add'>+#define FLEXCAN_MECR_CEI_MSK		BIT(16)</div><div class='add'>+#define FLEXCAN_MECR_HAERRIE		BIT(15)</div><div class='add'>+#define FLEXCAN_MECR_FAERRIE		BIT(14)</div><div class='add'>+#define FLEXCAN_MECR_EXTERRIE		BIT(13)</div><div class='add'>+#define FLEXCAN_MECR_RERRDIS		BIT(9)</div><div class='add'>+#define FLEXCAN_MECR_ECCDIS		BIT(8)</div><div class='add'>+#define FLEXCAN_MECR_NCEFAFRZ		BIT(7)</div><div class='add'>+</div><div class='add'>+/* FLEXCAN error and status register (ESR) bits */</div><div class='add'>+#define FLEXCAN_ESR_TWRN_INT		BIT(17)</div><div class='add'>+#define FLEXCAN_ESR_RWRN_INT		BIT(16)</div><div class='add'>+#define FLEXCAN_ESR_BIT1_ERR		BIT(15)</div><div class='add'>+#define FLEXCAN_ESR_BIT0_ERR		BIT(14)</div><div class='add'>+#define FLEXCAN_ESR_ACK_ERR		BIT(13)</div><div class='add'>+#define FLEXCAN_ESR_CRC_ERR		BIT(12)</div><div class='add'>+#define FLEXCAN_ESR_FRM_ERR		BIT(11)</div><div class='add'>+#define FLEXCAN_ESR_STF_ERR		BIT(10)</div><div class='add'>+#define FLEXCAN_ESR_TX_WRN		BIT(9)</div><div class='add'>+#define FLEXCAN_ESR_RX_WRN		BIT(8)</div><div class='add'>+#define FLEXCAN_ESR_IDLE		BIT(7)</div><div class='add'>+#define FLEXCAN_ESR_TXRX		BIT(6)</div><div class='add'>+#define FLEXCAN_EST_FLT_CONF_SHIFT	(4)</div><div class='add'>+#define FLEXCAN_ESR_FLT_CONF_MASK	(0x3 &lt;&lt; FLEXCAN_EST_FLT_CONF_SHIFT)</div><div class='add'>+#define FLEXCAN_ESR_FLT_CONF_ACTIVE	(0x0 &lt;&lt; FLEXCAN_EST_FLT_CONF_SHIFT)</div><div class='add'>+#define FLEXCAN_ESR_FLT_CONF_PASSIVE	(0x1 &lt;&lt; FLEXCAN_EST_FLT_CONF_SHIFT)</div><div class='add'>+#define FLEXCAN_ESR_BOFF_INT		BIT(2)</div><div class='add'>+#define FLEXCAN_ESR_ERR_INT		BIT(1)</div><div class='add'>+#define FLEXCAN_ESR_WAK_INT		BIT(0)</div><div class='add'>+#define FLEXCAN_ESR_ERR_BUS \</div><div class='add'>+	(FLEXCAN_ESR_BIT1_ERR | FLEXCAN_ESR_BIT0_ERR | \</div><div class='add'>+	 FLEXCAN_ESR_ACK_ERR | FLEXCAN_ESR_CRC_ERR | \</div><div class='add'>+	 FLEXCAN_ESR_FRM_ERR | FLEXCAN_ESR_STF_ERR)</div><div class='add'>+#define FLEXCAN_ESR_ERR_STATE \</div><div class='add'>+	(FLEXCAN_ESR_TWRN_INT | FLEXCAN_ESR_RWRN_INT | FLEXCAN_ESR_BOFF_INT)</div><div class='add'>+#define FLEXCAN_ESR_ERR_ALL \</div><div class='add'>+	(FLEXCAN_ESR_ERR_BUS | FLEXCAN_ESR_ERR_STATE)</div><div class='add'>+#define FLEXCAN_ESR_ALL_INT \</div><div class='add'>+	(FLEXCAN_ESR_TWRN_INT | FLEXCAN_ESR_RWRN_INT | \</div><div class='add'>+	 FLEXCAN_ESR_BOFF_INT | FLEXCAN_ESR_ERR_INT)</div><div class='add'>+</div><div class='add'>+/* FLEXCAN Bit Timing register (CBT) bits */</div><div class='add'>+#define FLEXCAN_CBT_BTF			BIT(31)</div><div class='add'>+#define FLEXCAN_CBT_EPRESDIV_MASK	GENMASK(30, 21)</div><div class='add'>+#define FLEXCAN_CBT_ERJW_MASK		GENMASK(20, 16)</div><div class='add'>+#define FLEXCAN_CBT_EPROPSEG_MASK	GENMASK(15, 10)</div><div class='add'>+#define FLEXCAN_CBT_EPSEG1_MASK		GENMASK(9, 5)</div><div class='add'>+#define FLEXCAN_CBT_EPSEG2_MASK		GENMASK(4, 0)</div><div class='add'>+</div><div class='add'>+/* FLEXCAN FD control register (FDCTRL) bits */</div><div class='add'>+#define FLEXCAN_FDCTRL_FDRATE		BIT(31)</div><div class='add'>+#define FLEXCAN_FDCTRL_MBDSR1		GENMASK(20, 19)</div><div class='add'>+#define FLEXCAN_FDCTRL_MBDSR0		GENMASK(17, 16)</div><div class='add'>+#define FLEXCAN_FDCTRL_MBDSR_8		0x0</div><div class='add'>+#define FLEXCAN_FDCTRL_MBDSR_12		0x1</div><div class='add'>+#define FLEXCAN_FDCTRL_MBDSR_32		0x2</div><div class='add'>+#define FLEXCAN_FDCTRL_MBDSR_64		0x3</div><div class='add'>+#define FLEXCAN_FDCTRL_TDCEN		BIT(15)</div><div class='add'>+#define FLEXCAN_FDCTRL_TDCFAIL		BIT(14)</div><div class='add'>+#define FLEXCAN_FDCTRL_TDCOFF		GENMASK(12, 8)</div><div class='add'>+#define FLEXCAN_FDCTRL_TDCVAL		GENMASK(5, 0)</div><div class='add'>+</div><div class='add'>+/* FLEXCAN FD Bit Timing register (FDCBT) bits */</div><div class='add'>+#define FLEXCAN_FDCBT_FPRESDIV_MASK	GENMASK(29, 20)</div><div class='add'>+#define FLEXCAN_FDCBT_FRJW_MASK		GENMASK(18, 16)</div><div class='add'>+#define FLEXCAN_FDCBT_FPROPSEG_MASK	GENMASK(14, 10)</div><div class='add'>+#define FLEXCAN_FDCBT_FPSEG1_MASK	GENMASK(7, 5)</div><div class='add'>+#define FLEXCAN_FDCBT_FPSEG2_MASK	GENMASK(2, 0)</div><div class='add'>+</div><div class='add'>+/* FLEXCAN interrupt flag register (IFLAG) bits */</div><div class='add'>+/* Errata ERR005829 step7: Reserve first valid MB */</div><div class='add'>+#define FLEXCAN_TX_MB_RESERVED_RX_FIFO	8</div><div class='add'>+#define FLEXCAN_TX_MB_RESERVED_RX_MAILBOX	0</div><div class='add'>+#define FLEXCAN_RX_MB_RX_MAILBOX_FIRST	(FLEXCAN_TX_MB_RESERVED_RX_MAILBOX + 1)</div><div class='add'>+#define FLEXCAN_IFLAG_MB(x)		BIT_ULL(x)</div><div class='add'>+#define FLEXCAN_IFLAG_RX_FIFO_OVERFLOW	BIT(7)</div><div class='add'>+#define FLEXCAN_IFLAG_RX_FIFO_WARN	BIT(6)</div><div class='add'>+#define FLEXCAN_IFLAG_RX_FIFO_AVAILABLE	BIT(5)</div><div class='add'>+</div><div class='add'>+/* FLEXCAN message buffers */</div><div class='add'>+#define FLEXCAN_MB_CODE_MASK		(0xf &lt;&lt; 24)</div><div class='add'>+#define FLEXCAN_MB_CODE_RX_BUSY_BIT	(0x1 &lt;&lt; 24)</div><div class='add'>+#define FLEXCAN_MB_CODE_RX_INACTIVE	(0x0 &lt;&lt; 24)</div><div class='add'>+#define FLEXCAN_MB_CODE_RX_EMPTY	(0x4 &lt;&lt; 24)</div><div class='add'>+#define FLEXCAN_MB_CODE_RX_FULL		(0x2 &lt;&lt; 24)</div><div class='add'>+#define FLEXCAN_MB_CODE_RX_OVERRUN	(0x6 &lt;&lt; 24)</div><div class='add'>+#define FLEXCAN_MB_CODE_RX_RANSWER	(0xa &lt;&lt; 24)</div><div class='add'>+</div><div class='add'>+#define FLEXCAN_MB_CODE_TX_INACTIVE	(0x8 &lt;&lt; 24)</div><div class='add'>+#define FLEXCAN_MB_CODE_TX_ABORT	(0x9 &lt;&lt; 24)</div><div class='add'>+#define FLEXCAN_MB_CODE_TX_DATA		(0xc &lt;&lt; 24)</div><div class='add'>+#define FLEXCAN_MB_CODE_TX_TANSWER	(0xe &lt;&lt; 24)</div><div class='add'>+</div><div class='add'>+#define FLEXCAN_MB_CNT_EDL		BIT(31)</div><div class='add'>+#define FLEXCAN_MB_CNT_BRS		BIT(30)</div><div class='add'>+#define FLEXCAN_MB_CNT_ESI		BIT(29)</div><div class='add'>+#define FLEXCAN_MB_CNT_SRR		BIT(22)</div><div class='add'>+#define FLEXCAN_MB_CNT_IDE		BIT(21)</div><div class='add'>+#define FLEXCAN_MB_CNT_RTR		BIT(20)</div><div class='add'>+#define FLEXCAN_MB_CNT_LENGTH(x)	(((x) &amp; 0xf) &lt;&lt; 16)</div><div class='add'>+#define FLEXCAN_MB_CNT_TIMESTAMP(x)	((x) &amp; 0xffff)</div><div class='add'>+</div><div class='add'>+#define FLEXCAN_TIMEOUT_US		(250)</div><div class='add'>+</div><div class='add'>+/* Structure of the message buffer */</div><div class='add'>+struct flexcan_mb {</div><div class='add'>+	u32 can_ctrl;</div><div class='add'>+	u32 can_id;</div><div class='add'>+	u32 data[];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Structure of the hardware registers */</div><div class='add'>+struct flexcan_regs {</div><div class='add'>+	u32 mcr;		/* 0x00 */</div><div class='add'>+	u32 ctrl;		/* 0x04 - Not affected by Soft Reset */</div><div class='add'>+	u32 timer;		/* 0x08 */</div><div class='add'>+	u32 tcr;		/* 0x0c */</div><div class='add'>+	u32 rxgmask;		/* 0x10 - Not affected by Soft Reset */</div><div class='add'>+	u32 rx14mask;		/* 0x14 - Not affected by Soft Reset */</div><div class='add'>+	u32 rx15mask;		/* 0x18 - Not affected by Soft Reset */</div><div class='add'>+	u32 ecr;		/* 0x1c */</div><div class='add'>+	u32 esr;		/* 0x20 */</div><div class='add'>+	u32 imask2;		/* 0x24 */</div><div class='add'>+	u32 imask1;		/* 0x28 */</div><div class='add'>+	u32 iflag2;		/* 0x2c */</div><div class='add'>+	u32 iflag1;		/* 0x30 */</div><div class='add'>+	union {			/* 0x34 */</div><div class='add'>+		u32 gfwr_mx28;	/* MX28, MX53 */</div><div class='add'>+		u32 ctrl2;	/* MX6, VF610 - Not affected by Soft Reset */</div><div class='add'>+	};</div><div class='add'>+	u32 esr2;		/* 0x38 */</div><div class='add'>+	u32 imeur;		/* 0x3c */</div><div class='add'>+	u32 lrfr;		/* 0x40 */</div><div class='add'>+	u32 crcr;		/* 0x44 */</div><div class='add'>+	u32 rxfgmask;		/* 0x48 */</div><div class='add'>+	u32 rxfir;		/* 0x4c - Not affected by Soft Reset */</div><div class='add'>+	u32 cbt;		/* 0x50 - Not affected by Soft Reset */</div><div class='add'>+	u32 _reserved2;		/* 0x54 */</div><div class='add'>+	u32 dbg1;		/* 0x58 */</div><div class='add'>+	u32 dbg2;		/* 0x5c */</div><div class='add'>+	u32 _reserved3[8];	/* 0x60 */</div><div class='add'>+	struct_group(init,</div><div class='add'>+		u8 mb[2][512];		/* 0x80 - Not affected by Soft Reset */</div><div class='add'>+		/* FIFO-mode:</div><div class='add'>+		 *			MB</div><div class='add'>+		 * 0x080...0x08f	0	RX message buffer</div><div class='add'>+		 * 0x090...0x0df	1-5	reserved</div><div class='add'>+		 * 0x0e0...0x0ff	6-7	8 entry ID table</div><div class='add'>+		 *				(mx25, mx28, mx35, mx53)</div><div class='add'>+		 * 0x0e0...0x2df	6-7..37	8..128 entry ID table</div><div class='add'>+		 *				size conf'ed via ctrl2::RFFN</div><div class='add'>+		 *				(mx6, vf610)</div><div class='add'>+		 */</div><div class='add'>+		u32 _reserved4[256];	/* 0x480 */</div><div class='add'>+		u32 rximr[64];		/* 0x880 - Not affected by Soft Reset */</div><div class='add'>+		u32 _reserved5[24];	/* 0x980 */</div><div class='add'>+		u32 gfwr_mx6;		/* 0x9e0 - MX6 */</div><div class='add'>+		u32 _reserved6[39];	/* 0x9e4 */</div><div class='add'>+		u32 _rxfir[6];		/* 0xa80 */</div><div class='add'>+		u32 _reserved8[2];	/* 0xa98 */</div><div class='add'>+		u32 _rxmgmask;		/* 0xaa0 */</div><div class='add'>+		u32 _rxfgmask;		/* 0xaa4 */</div><div class='add'>+		u32 _rx14mask;		/* 0xaa8 */</div><div class='add'>+		u32 _rx15mask;		/* 0xaac */</div><div class='add'>+		u32 tx_smb[4];		/* 0xab0 */</div><div class='add'>+		u32 rx_smb0[4];		/* 0xac0 */</div><div class='add'>+		u32 rx_smb1[4];		/* 0xad0 */</div><div class='add'>+	);</div><div class='add'>+	u32 mecr;		/* 0xae0 */</div><div class='add'>+	u32 erriar;		/* 0xae4 */</div><div class='add'>+	u32 erridpr;		/* 0xae8 */</div><div class='add'>+	u32 errippr;		/* 0xaec */</div><div class='add'>+	u32 rerrar;		/* 0xaf0 */</div><div class='add'>+	u32 rerrdr;		/* 0xaf4 */</div><div class='add'>+	u32 rerrsynr;		/* 0xaf8 */</div><div class='add'>+	u32 errsr;		/* 0xafc */</div><div class='add'>+	u32 _reserved7[64];	/* 0xb00 */</div><div class='add'>+	u32 fdctrl;		/* 0xc00 - Not affected by Soft Reset */</div><div class='add'>+	u32 fdcbt;		/* 0xc04 - Not affected by Soft Reset */</div><div class='add'>+	u32 fdcrc;		/* 0xc08 */</div><div class='add'>+	u32 _reserved9[199];	/* 0xc0c */</div><div class='add'>+	struct_group(init_fd,</div><div class='add'>+		u32 tx_smb_fd[18];	/* 0xf28 */</div><div class='add'>+		u32 rx_smb0_fd[18];	/* 0xf70 */</div><div class='add'>+		u32 rx_smb1_fd[18];	/* 0xfb8 */</div><div class='add'>+	);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static_assert(sizeof(struct flexcan_regs) ==  0x4 * 18 + 0xfb8);</div><div class='add'>+</div><div class='add'>+static const struct flexcan_devtype_data fsl_mcf5441x_devtype_data = {</div><div class='add'>+	.quirks = FLEXCAN_QUIRK_BROKEN_PERR_STATE |</div><div class='add'>+		FLEXCAN_QUIRK_NR_IRQ_3 | FLEXCAN_QUIRK_NR_MB_16 |</div><div class='add'>+		FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX |</div><div class='add'>+		FLEXCAN_QUIRK_SUPPORT_RX_FIFO,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct flexcan_devtype_data fsl_p1010_devtype_data = {</div><div class='add'>+	.quirks = FLEXCAN_QUIRK_BROKEN_WERR_STATE |</div><div class='add'>+		FLEXCAN_QUIRK_BROKEN_PERR_STATE |</div><div class='add'>+		FLEXCAN_QUIRK_DEFAULT_BIG_ENDIAN |</div><div class='add'>+		FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX |</div><div class='add'>+		FLEXCAN_QUIRK_SUPPORT_RX_FIFO,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct flexcan_devtype_data fsl_imx25_devtype_data = {</div><div class='add'>+	.quirks = FLEXCAN_QUIRK_BROKEN_WERR_STATE |</div><div class='add'>+		FLEXCAN_QUIRK_BROKEN_PERR_STATE |</div><div class='add'>+		FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX |</div><div class='add'>+		FLEXCAN_QUIRK_SUPPORT_RX_FIFO,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct flexcan_devtype_data fsl_imx28_devtype_data = {</div><div class='add'>+	.quirks = FLEXCAN_QUIRK_BROKEN_PERR_STATE |</div><div class='add'>+		FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX |</div><div class='add'>+		FLEXCAN_QUIRK_SUPPORT_RX_FIFO,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct flexcan_devtype_data fsl_imx6q_devtype_data = {</div><div class='add'>+	.quirks = FLEXCAN_QUIRK_DISABLE_RXFG | FLEXCAN_QUIRK_ENABLE_EACEN_RRS |</div><div class='add'>+		FLEXCAN_QUIRK_USE_RX_MAILBOX | FLEXCAN_QUIRK_BROKEN_PERR_STATE |</div><div class='add'>+		FLEXCAN_QUIRK_SETUP_STOP_MODE_GPR |</div><div class='add'>+		FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX |</div><div class='add'>+		FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX_RTR,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct flexcan_devtype_data fsl_imx8qm_devtype_data = {</div><div class='add'>+	.quirks = FLEXCAN_QUIRK_DISABLE_RXFG | FLEXCAN_QUIRK_ENABLE_EACEN_RRS |</div><div class='add'>+		FLEXCAN_QUIRK_USE_RX_MAILBOX | FLEXCAN_QUIRK_BROKEN_PERR_STATE |</div><div class='add'>+		FLEXCAN_QUIRK_SUPPORT_FD | FLEXCAN_QUIRK_SETUP_STOP_MODE_SCFW |</div><div class='add'>+		FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX |</div><div class='add'>+		FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX_RTR,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct flexcan_devtype_data fsl_imx8mp_devtype_data = {</div><div class='add'>+	.quirks = FLEXCAN_QUIRK_DISABLE_RXFG | FLEXCAN_QUIRK_ENABLE_EACEN_RRS |</div><div class='add'>+		FLEXCAN_QUIRK_DISABLE_MECR | FLEXCAN_QUIRK_USE_RX_MAILBOX |</div><div class='add'>+		FLEXCAN_QUIRK_BROKEN_PERR_STATE | FLEXCAN_QUIRK_SETUP_STOP_MODE_GPR |</div><div class='add'>+		FLEXCAN_QUIRK_SUPPORT_FD | FLEXCAN_QUIRK_SUPPORT_ECC |</div><div class='add'>+		FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX |</div><div class='add'>+		FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX_RTR,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct flexcan_devtype_data fsl_imx93_devtype_data = {</div><div class='add'>+	.quirks = FLEXCAN_QUIRK_DISABLE_RXFG | FLEXCAN_QUIRK_ENABLE_EACEN_RRS |</div><div class='add'>+		FLEXCAN_QUIRK_DISABLE_MECR | FLEXCAN_QUIRK_USE_RX_MAILBOX |</div><div class='add'>+		FLEXCAN_QUIRK_BROKEN_PERR_STATE | FLEXCAN_QUIRK_SETUP_STOP_MODE_GPR |</div><div class='add'>+		FLEXCAN_QUIRK_SUPPORT_FD | FLEXCAN_QUIRK_SUPPORT_ECC |</div><div class='add'>+		FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX |</div><div class='add'>+		FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX_RTR,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct flexcan_devtype_data fsl_imx95_devtype_data = {</div><div class='add'>+	.quirks = FLEXCAN_QUIRK_DISABLE_RXFG | FLEXCAN_QUIRK_ENABLE_EACEN_RRS |</div><div class='add'>+		FLEXCAN_QUIRK_DISABLE_MECR | FLEXCAN_QUIRK_USE_RX_MAILBOX |</div><div class='add'>+		FLEXCAN_QUIRK_BROKEN_PERR_STATE | FLEXCAN_QUIRK_SUPPORT_FD |</div><div class='add'>+		FLEXCAN_QUIRK_SUPPORT_ECC | FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX |</div><div class='add'>+		FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX_RTR | FLEXCAN_QUIRK_SETUP_STOP_MODE_SCMI,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct flexcan_devtype_data fsl_vf610_devtype_data = {</div><div class='add'>+	.quirks = FLEXCAN_QUIRK_DISABLE_RXFG | FLEXCAN_QUIRK_ENABLE_EACEN_RRS |</div><div class='add'>+		FLEXCAN_QUIRK_DISABLE_MECR | FLEXCAN_QUIRK_USE_RX_MAILBOX |</div><div class='add'>+		FLEXCAN_QUIRK_BROKEN_PERR_STATE | FLEXCAN_QUIRK_SUPPORT_ECC |</div><div class='add'>+		FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX |</div><div class='add'>+		FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX_RTR,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct flexcan_devtype_data fsl_ls1021a_r2_devtype_data = {</div><div class='add'>+	.quirks = FLEXCAN_QUIRK_DISABLE_RXFG | FLEXCAN_QUIRK_ENABLE_EACEN_RRS |</div><div class='add'>+		FLEXCAN_QUIRK_BROKEN_PERR_STATE | FLEXCAN_QUIRK_USE_RX_MAILBOX |</div><div class='add'>+		FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX |</div><div class='add'>+		FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX_RTR,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct flexcan_devtype_data fsl_lx2160a_r1_devtype_data = {</div><div class='add'>+	.quirks = FLEXCAN_QUIRK_DISABLE_RXFG | FLEXCAN_QUIRK_ENABLE_EACEN_RRS |</div><div class='add'>+		FLEXCAN_QUIRK_DISABLE_MECR | FLEXCAN_QUIRK_BROKEN_PERR_STATE |</div><div class='add'>+		FLEXCAN_QUIRK_USE_RX_MAILBOX | FLEXCAN_QUIRK_SUPPORT_FD |</div><div class='add'>+		FLEXCAN_QUIRK_SUPPORT_ECC |</div><div class='add'>+		FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX |</div><div class='add'>+		FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX_RTR,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct flexcan_devtype_data nxp_s32g2_devtype_data = {</div><div class='add'>+	.quirks = FLEXCAN_QUIRK_DISABLE_RXFG | FLEXCAN_QUIRK_ENABLE_EACEN_RRS |</div><div class='add'>+		FLEXCAN_QUIRK_DISABLE_MECR | FLEXCAN_QUIRK_BROKEN_PERR_STATE |</div><div class='add'>+		FLEXCAN_QUIRK_USE_RX_MAILBOX | FLEXCAN_QUIRK_SUPPORT_FD |</div><div class='add'>+		FLEXCAN_QUIRK_SUPPORT_ECC | FLEXCAN_QUIRK_NR_IRQ_3 |</div><div class='add'>+		FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX |</div><div class='add'>+		FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX_RTR |</div><div class='add'>+		FLEXCAN_QUIRK_SECONDARY_MB_IRQ,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const flexcan_bittiming_const = {</div><div class='add'>+	.name = DRV_NAME,</div><div class='add'>+	.tseg1_min = 4,</div><div class='add'>+	.tseg1_max = 16,</div><div class='add'>+	.tseg2_min = 2,</div><div class='add'>+	.tseg2_max = 8,</div><div class='add'>+	.sjw_max = 4,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 256,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const flexcan_fd_bittiming_const = {</div><div class='add'>+	.name = DRV_NAME,</div><div class='add'>+	.tseg1_min = 2,</div><div class='add'>+	.tseg1_max = 96,</div><div class='add'>+	.tseg2_min = 2,</div><div class='add'>+	.tseg2_max = 32,</div><div class='add'>+	.sjw_max = 16,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 1024,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const flexcan_fd_data_bittiming_const = {</div><div class='add'>+	.name = DRV_NAME,</div><div class='add'>+	.tseg1_min = 2,</div><div class='add'>+	.tseg1_max = 39,</div><div class='add'>+	.tseg2_min = 2,</div><div class='add'>+	.tseg2_max = 8,</div><div class='add'>+	.sjw_max = 4,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 1024,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* FlexCAN module is essentially modelled as a little-endian IP in most</div><div class='add'>+ * SoCs, i.e the registers as well as the message buffer areas are</div><div class='add'>+ * implemented in a little-endian fashion.</div><div class='add'>+ *</div><div class='add'>+ * However there are some SoCs (e.g. LS1021A) which implement the FlexCAN</div><div class='add'>+ * module in a big-endian fashion (i.e the registers as well as the</div><div class='add'>+ * message buffer areas are implemented in a big-endian way).</div><div class='add'>+ *</div><div class='add'>+ * In addition, the FlexCAN module can be found on SoCs having ARM or</div><div class='add'>+ * PPC cores. So, we need to abstract off the register read/write</div><div class='add'>+ * functions, ensuring that these cater to all the combinations of module</div><div class='add'>+ * endianness and underlying CPU endianness.</div><div class='add'>+ */</div><div class='add'>+static inline u32 flexcan_read_be(void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	return ioread32be(addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void flexcan_write_be(u32 val, void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	iowrite32be(val, addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 flexcan_read_le(void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	return ioread32(addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void flexcan_write_le(u32 val, void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	iowrite32(val, addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct flexcan_mb __iomem *flexcan_get_mb(const struct flexcan_priv *priv,</div><div class='add'>+						 u8 mb_index)</div><div class='add'>+{</div><div class='add'>+	u8 bank_size;</div><div class='add'>+	bool bank;</div><div class='add'>+</div><div class='add'>+	if (WARN_ON(mb_index &gt;= priv-&gt;mb_count))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	bank_size = sizeof(priv-&gt;regs-&gt;mb[0]) / priv-&gt;mb_size;</div><div class='add'>+</div><div class='add'>+	bank = mb_index &gt;= bank_size;</div><div class='add'>+	if (bank)</div><div class='add'>+		mb_index -= bank_size;</div><div class='add'>+</div><div class='add'>+	return (struct flexcan_mb __iomem *)</div><div class='add'>+		(&amp;priv-&gt;regs-&gt;mb[bank][priv-&gt;mb_size * mb_index]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int flexcan_low_power_enter_ack(struct flexcan_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct flexcan_regs __iomem *regs = priv-&gt;regs;</div><div class='add'>+	unsigned int timeout = FLEXCAN_TIMEOUT_US / 10;</div><div class='add'>+</div><div class='add'>+	while (timeout-- &amp;&amp; !(priv-&gt;read(&amp;regs-&gt;mcr) &amp; FLEXCAN_MCR_LPM_ACK))</div><div class='add'>+		udelay(10);</div><div class='add'>+</div><div class='add'>+	if (!(priv-&gt;read(&amp;regs-&gt;mcr) &amp; FLEXCAN_MCR_LPM_ACK))</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int flexcan_low_power_exit_ack(struct flexcan_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct flexcan_regs __iomem *regs = priv-&gt;regs;</div><div class='add'>+	unsigned int timeout = FLEXCAN_TIMEOUT_US / 10;</div><div class='add'>+</div><div class='add'>+	while (timeout-- &amp;&amp; (priv-&gt;read(&amp;regs-&gt;mcr) &amp; FLEXCAN_MCR_LPM_ACK))</div><div class='add'>+		udelay(10);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;read(&amp;regs-&gt;mcr) &amp; FLEXCAN_MCR_LPM_ACK)</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void flexcan_enable_wakeup_irq(struct flexcan_priv *priv, bool enable)</div><div class='add'>+{</div><div class='add'>+	struct flexcan_regs __iomem *regs = priv-&gt;regs;</div><div class='add'>+	u32 reg_mcr;</div><div class='add'>+</div><div class='add'>+	reg_mcr = priv-&gt;read(&amp;regs-&gt;mcr);</div><div class='add'>+</div><div class='add'>+	if (enable)</div><div class='add'>+		reg_mcr |= FLEXCAN_MCR_WAK_MSK;</div><div class='add'>+	else</div><div class='add'>+		reg_mcr &amp;= ~FLEXCAN_MCR_WAK_MSK;</div><div class='add'>+</div><div class='add'>+	priv-&gt;write(reg_mcr, &amp;regs-&gt;mcr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int flexcan_stop_mode_enable_scfw(struct flexcan_priv *priv, bool enabled)</div><div class='add'>+{</div><div class='add'>+	u8 idx = priv-&gt;scu_idx;</div><div class='add'>+	u32 rsrc_id, val;</div><div class='add'>+</div><div class='add'>+	rsrc_id = IMX_SC_R_CAN(idx);</div><div class='add'>+</div><div class='add'>+	if (enabled)</div><div class='add'>+		val = 1;</div><div class='add'>+	else</div><div class='add'>+		val = 0;</div><div class='add'>+</div><div class='add'>+	/* stop mode request via scu firmware */</div><div class='add'>+	return imx_sc_misc_set_control(priv-&gt;sc_ipc_handle, rsrc_id,</div><div class='add'>+				       IMX_SC_C_IPG_STOP, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int flexcan_enter_stop_mode(struct flexcan_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct flexcan_regs __iomem *regs = priv-&gt;regs;</div><div class='add'>+	u32 reg_mcr;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	reg_mcr = priv-&gt;read(&amp;regs-&gt;mcr);</div><div class='add'>+	reg_mcr |= FLEXCAN_MCR_SLF_WAK;</div><div class='add'>+	priv-&gt;write(reg_mcr, &amp;regs-&gt;mcr);</div><div class='add'>+</div><div class='add'>+	/* enable stop request */</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_SETUP_STOP_MODE_SCFW) {</div><div class='add'>+		ret = flexcan_stop_mode_enable_scfw(priv, true);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+	} else if (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_SETUP_STOP_MODE_GPR) {</div><div class='add'>+		regmap_update_bits(priv-&gt;stm.gpr, priv-&gt;stm.req_gpr,</div><div class='add'>+				   1 &lt;&lt; priv-&gt;stm.req_bit, 1 &lt;&lt; priv-&gt;stm.req_bit);</div><div class='add'>+	} else if (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_SETUP_STOP_MODE_SCMI) {</div><div class='add'>+		/* For the SCMI mode, driver do nothing, ATF will send request to</div><div class='add'>+		 * SM(system manager, M33 core) through SCMI protocol after linux</div><div class='add'>+		 * suspend. Once SM get this request, it will send IPG_STOP signal</div><div class='add'>+		 * to Flex_CAN, let CAN in STOP mode.</div><div class='add'>+		 */</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return flexcan_low_power_enter_ack(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int flexcan_exit_stop_mode(struct flexcan_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct flexcan_regs __iomem *regs = priv-&gt;regs;</div><div class='add'>+	u32 reg_mcr;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Remove stop request, for FLEXCAN_QUIRK_SETUP_STOP_MODE_SCMI,</div><div class='add'>+	 * do nothing here, because ATF already send request to SM before</div><div class='add'>+	 * linux resume. Once SM get this request, it will deassert the</div><div class='add'>+	 * IPG_STOP signal to Flex_CAN.</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_SETUP_STOP_MODE_SCFW) {</div><div class='add'>+		ret = flexcan_stop_mode_enable_scfw(priv, false);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+	} else if (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_SETUP_STOP_MODE_GPR) {</div><div class='add'>+		regmap_update_bits(priv-&gt;stm.gpr, priv-&gt;stm.req_gpr,</div><div class='add'>+				   1 &lt;&lt; priv-&gt;stm.req_bit, 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	reg_mcr = priv-&gt;read(&amp;regs-&gt;mcr);</div><div class='add'>+	reg_mcr &amp;= ~FLEXCAN_MCR_SLF_WAK;</div><div class='add'>+	priv-&gt;write(reg_mcr, &amp;regs-&gt;mcr);</div><div class='add'>+</div><div class='add'>+	return flexcan_low_power_exit_ack(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void flexcan_error_irq_enable(const struct flexcan_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct flexcan_regs __iomem *regs = priv-&gt;regs;</div><div class='add'>+	u32 reg_ctrl = (priv-&gt;reg_ctrl_default | FLEXCAN_CTRL_ERR_MSK);</div><div class='add'>+</div><div class='add'>+	priv-&gt;write(reg_ctrl, &amp;regs-&gt;ctrl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void flexcan_error_irq_disable(const struct flexcan_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct flexcan_regs __iomem *regs = priv-&gt;regs;</div><div class='add'>+	u32 reg_ctrl = (priv-&gt;reg_ctrl_default &amp; ~FLEXCAN_CTRL_ERR_MSK);</div><div class='add'>+</div><div class='add'>+	priv-&gt;write(reg_ctrl, &amp;regs-&gt;ctrl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int flexcan_clks_enable(const struct flexcan_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;clk_ipg) {</div><div class='add'>+		err = clk_prepare_enable(priv-&gt;clk_ipg);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;clk_per) {</div><div class='add'>+		err = clk_prepare_enable(priv-&gt;clk_per);</div><div class='add'>+		if (err)</div><div class='add'>+			clk_disable_unprepare(priv-&gt;clk_ipg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void flexcan_clks_disable(const struct flexcan_priv *priv)</div><div class='add'>+{</div><div class='add'>+	clk_disable_unprepare(priv-&gt;clk_per);</div><div class='add'>+	clk_disable_unprepare(priv-&gt;clk_ipg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int flexcan_transceiver_enable(const struct flexcan_priv *priv)</div><div class='add'>+{</div><div class='add'>+	if (priv-&gt;reg_xceiver)</div><div class='add'>+		return regulator_enable(priv-&gt;reg_xceiver);</div><div class='add'>+	else if (priv-&gt;transceiver)</div><div class='add'>+		return phy_power_on(priv-&gt;transceiver);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int flexcan_transceiver_disable(const struct flexcan_priv *priv)</div><div class='add'>+{</div><div class='add'>+	if (priv-&gt;reg_xceiver)</div><div class='add'>+		return regulator_disable(priv-&gt;reg_xceiver);</div><div class='add'>+	else if (priv-&gt;transceiver)</div><div class='add'>+		return phy_power_off(priv-&gt;transceiver);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int flexcan_chip_enable(struct flexcan_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct flexcan_regs __iomem *regs = priv-&gt;regs;</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	reg = priv-&gt;read(&amp;regs-&gt;mcr);</div><div class='add'>+	reg &amp;= ~FLEXCAN_MCR_MDIS;</div><div class='add'>+	priv-&gt;write(reg, &amp;regs-&gt;mcr);</div><div class='add'>+</div><div class='add'>+	return flexcan_low_power_exit_ack(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int flexcan_chip_disable(struct flexcan_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct flexcan_regs __iomem *regs = priv-&gt;regs;</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	reg = priv-&gt;read(&amp;regs-&gt;mcr);</div><div class='add'>+	reg |= FLEXCAN_MCR_MDIS;</div><div class='add'>+	priv-&gt;write(reg, &amp;regs-&gt;mcr);</div><div class='add'>+</div><div class='add'>+	return flexcan_low_power_enter_ack(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int flexcan_chip_freeze(struct flexcan_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct flexcan_regs __iomem *regs = priv-&gt;regs;</div><div class='add'>+	unsigned int timeout;</div><div class='add'>+	u32 bitrate = priv-&gt;can.bittiming.bitrate;</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	if (bitrate)</div><div class='add'>+		timeout = 1000 * 1000 * 10 / bitrate;</div><div class='add'>+	else</div><div class='add'>+		timeout = FLEXCAN_TIMEOUT_US / 10;</div><div class='add'>+</div><div class='add'>+	reg = priv-&gt;read(&amp;regs-&gt;mcr);</div><div class='add'>+	reg |= FLEXCAN_MCR_FRZ | FLEXCAN_MCR_HALT;</div><div class='add'>+	priv-&gt;write(reg, &amp;regs-&gt;mcr);</div><div class='add'>+</div><div class='add'>+	while (timeout-- &amp;&amp; !(priv-&gt;read(&amp;regs-&gt;mcr) &amp; FLEXCAN_MCR_FRZ_ACK))</div><div class='add'>+		udelay(100);</div><div class='add'>+</div><div class='add'>+	if (!(priv-&gt;read(&amp;regs-&gt;mcr) &amp; FLEXCAN_MCR_FRZ_ACK))</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int flexcan_chip_unfreeze(struct flexcan_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct flexcan_regs __iomem *regs = priv-&gt;regs;</div><div class='add'>+	unsigned int timeout = FLEXCAN_TIMEOUT_US / 10;</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	reg = priv-&gt;read(&amp;regs-&gt;mcr);</div><div class='add'>+	reg &amp;= ~FLEXCAN_MCR_HALT;</div><div class='add'>+	priv-&gt;write(reg, &amp;regs-&gt;mcr);</div><div class='add'>+</div><div class='add'>+	while (timeout-- &amp;&amp; (priv-&gt;read(&amp;regs-&gt;mcr) &amp; FLEXCAN_MCR_FRZ_ACK))</div><div class='add'>+		udelay(10);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;read(&amp;regs-&gt;mcr) &amp; FLEXCAN_MCR_FRZ_ACK)</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int flexcan_chip_softreset(struct flexcan_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct flexcan_regs __iomem *regs = priv-&gt;regs;</div><div class='add'>+	unsigned int timeout = FLEXCAN_TIMEOUT_US / 10;</div><div class='add'>+</div><div class='add'>+	priv-&gt;write(FLEXCAN_MCR_SOFTRST, &amp;regs-&gt;mcr);</div><div class='add'>+	while (timeout-- &amp;&amp; (priv-&gt;read(&amp;regs-&gt;mcr) &amp; FLEXCAN_MCR_SOFTRST))</div><div class='add'>+		udelay(10);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;read(&amp;regs-&gt;mcr) &amp; FLEXCAN_MCR_SOFTRST)</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __flexcan_get_berr_counter(const struct net_device *dev,</div><div class='add'>+				      struct can_berr_counter *bec)</div><div class='add'>+{</div><div class='add'>+	const struct flexcan_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct flexcan_regs __iomem *regs = priv-&gt;regs;</div><div class='add'>+	u32 reg = priv-&gt;read(&amp;regs-&gt;ecr);</div><div class='add'>+</div><div class='add'>+	bec-&gt;txerr = (reg &gt;&gt; 0) &amp; 0xff;</div><div class='add'>+	bec-&gt;rxerr = (reg &gt;&gt; 8) &amp; 0xff;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int flexcan_get_berr_counter(const struct net_device *dev,</div><div class='add'>+				    struct can_berr_counter *bec)</div><div class='add'>+{</div><div class='add'>+	const struct flexcan_priv *priv = netdev_priv(dev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = pm_runtime_resume_and_get(priv-&gt;dev);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = __flexcan_get_berr_counter(dev, bec);</div><div class='add'>+</div><div class='add'>+	pm_runtime_put(priv-&gt;dev);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static netdev_tx_t flexcan_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	const struct flexcan_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct canfd_frame *cfd = (struct canfd_frame *)skb-&gt;data;</div><div class='add'>+	u32 can_id;</div><div class='add'>+	u32 data;</div><div class='add'>+	u32 ctrl = FLEXCAN_MB_CODE_TX_DATA | ((can_fd_len2dlc(cfd-&gt;len)) &lt;&lt; 16);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (can_dev_dropped_skb(dev, skb))</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(dev);</div><div class='add'>+</div><div class='add'>+	if (cfd-&gt;can_id &amp; CAN_EFF_FLAG) {</div><div class='add'>+		can_id = cfd-&gt;can_id &amp; CAN_EFF_MASK;</div><div class='add'>+		ctrl |= FLEXCAN_MB_CNT_IDE | FLEXCAN_MB_CNT_SRR;</div><div class='add'>+	} else {</div><div class='add'>+		can_id = (cfd-&gt;can_id &amp; CAN_SFF_MASK) &lt;&lt; 18;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cfd-&gt;can_id &amp; CAN_RTR_FLAG)</div><div class='add'>+		ctrl |= FLEXCAN_MB_CNT_RTR;</div><div class='add'>+</div><div class='add'>+	if (can_is_canfd_skb(skb)) {</div><div class='add'>+		ctrl |= FLEXCAN_MB_CNT_EDL;</div><div class='add'>+</div><div class='add'>+		if (cfd-&gt;flags &amp; CANFD_BRS)</div><div class='add'>+			ctrl |= FLEXCAN_MB_CNT_BRS;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; cfd-&gt;len; i += sizeof(u32)) {</div><div class='add'>+		data = be32_to_cpup((__be32 *)&amp;cfd-&gt;data[i]);</div><div class='add'>+		priv-&gt;write(data, &amp;priv-&gt;tx_mb-&gt;data[i / sizeof(u32)]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	can_put_echo_skb(skb, dev, 0, 0);</div><div class='add'>+</div><div class='add'>+	priv-&gt;write(can_id, &amp;priv-&gt;tx_mb-&gt;can_id);</div><div class='add'>+	priv-&gt;write(ctrl, &amp;priv-&gt;tx_mb-&gt;can_ctrl);</div><div class='add'>+</div><div class='add'>+	/* Errata ERR005829 step8:</div><div class='add'>+	 * Write twice INACTIVE(0x8) code to first MB.</div><div class='add'>+	 */</div><div class='add'>+	priv-&gt;write(FLEXCAN_MB_CODE_TX_INACTIVE,</div><div class='add'>+		    &amp;priv-&gt;tx_mb_reserved-&gt;can_ctrl);</div><div class='add'>+	priv-&gt;write(FLEXCAN_MB_CODE_TX_INACTIVE,</div><div class='add'>+		    &amp;priv-&gt;tx_mb_reserved-&gt;can_ctrl);</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void flexcan_irq_bus_err(struct net_device *dev, u32 reg_esr)</div><div class='add'>+{</div><div class='add'>+	struct flexcan_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct flexcan_regs __iomem *regs = priv-&gt;regs;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	bool rx_errors = false, tx_errors = false;</div><div class='add'>+	u32 timestamp;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	timestamp = priv-&gt;read(&amp;regs-&gt;timer) &lt;&lt; 16;</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_err_skb(dev, &amp;cf);</div><div class='add'>+	if (unlikely(!skb))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='add'>+</div><div class='add'>+	if (reg_esr &amp; FLEXCAN_ESR_BIT1_ERR) {</div><div class='add'>+		netdev_dbg(dev, "BIT1_ERR irq\n");</div><div class='add'>+		cf-&gt;data[2] |= CAN_ERR_PROT_BIT1;</div><div class='add'>+		tx_errors = true;</div><div class='add'>+	}</div><div class='add'>+	if (reg_esr &amp; FLEXCAN_ESR_BIT0_ERR) {</div><div class='add'>+		netdev_dbg(dev, "BIT0_ERR irq\n");</div><div class='add'>+		cf-&gt;data[2] |= CAN_ERR_PROT_BIT0;</div><div class='add'>+		tx_errors = true;</div><div class='add'>+	}</div><div class='add'>+	if (reg_esr &amp; FLEXCAN_ESR_ACK_ERR) {</div><div class='add'>+		netdev_dbg(dev, "ACK_ERR irq\n");</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_ACK;</div><div class='add'>+		cf-&gt;data[3] = CAN_ERR_PROT_LOC_ACK;</div><div class='add'>+		tx_errors = true;</div><div class='add'>+	}</div><div class='add'>+	if (reg_esr &amp; FLEXCAN_ESR_CRC_ERR) {</div><div class='add'>+		netdev_dbg(dev, "CRC_ERR irq\n");</div><div class='add'>+		cf-&gt;data[2] |= CAN_ERR_PROT_BIT;</div><div class='add'>+		cf-&gt;data[3] = CAN_ERR_PROT_LOC_CRC_SEQ;</div><div class='add'>+		rx_errors = true;</div><div class='add'>+	}</div><div class='add'>+	if (reg_esr &amp; FLEXCAN_ESR_FRM_ERR) {</div><div class='add'>+		netdev_dbg(dev, "FRM_ERR irq\n");</div><div class='add'>+		cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='add'>+		rx_errors = true;</div><div class='add'>+	}</div><div class='add'>+	if (reg_esr &amp; FLEXCAN_ESR_STF_ERR) {</div><div class='add'>+		netdev_dbg(dev, "STF_ERR irq\n");</div><div class='add'>+		cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='add'>+		rx_errors = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.can_stats.bus_error++;</div><div class='add'>+	if (rx_errors)</div><div class='add'>+		dev-&gt;stats.rx_errors++;</div><div class='add'>+	if (tx_errors)</div><div class='add'>+		dev-&gt;stats.tx_errors++;</div><div class='add'>+</div><div class='add'>+	err = can_rx_offload_queue_timestamp(&amp;priv-&gt;offload, skb, timestamp);</div><div class='add'>+	if (err)</div><div class='add'>+		dev-&gt;stats.rx_fifo_errors++;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void flexcan_irq_state(struct net_device *dev, u32 reg_esr)</div><div class='add'>+{</div><div class='add'>+	struct flexcan_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct flexcan_regs __iomem *regs = priv-&gt;regs;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	enum can_state new_state, rx_state, tx_state;</div><div class='add'>+	int flt;</div><div class='add'>+	struct can_berr_counter bec;</div><div class='add'>+	u32 timestamp;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	flt = reg_esr &amp; FLEXCAN_ESR_FLT_CONF_MASK;</div><div class='add'>+	if (likely(flt == FLEXCAN_ESR_FLT_CONF_ACTIVE)) {</div><div class='add'>+		tx_state = unlikely(reg_esr &amp; FLEXCAN_ESR_TX_WRN) ?</div><div class='add'>+			CAN_STATE_ERROR_WARNING : CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+		rx_state = unlikely(reg_esr &amp; FLEXCAN_ESR_RX_WRN) ?</div><div class='add'>+			CAN_STATE_ERROR_WARNING : CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+		new_state = max(tx_state, rx_state);</div><div class='add'>+	} else {</div><div class='add'>+		__flexcan_get_berr_counter(dev, &amp;bec);</div><div class='add'>+		new_state = flt == FLEXCAN_ESR_FLT_CONF_PASSIVE ?</div><div class='add'>+			CAN_STATE_ERROR_PASSIVE : CAN_STATE_BUS_OFF;</div><div class='add'>+		rx_state = bec.rxerr &gt;= bec.txerr ? new_state : 0;</div><div class='add'>+		tx_state = bec.rxerr &lt;= bec.txerr ? new_state : 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* state hasn't changed */</div><div class='add'>+	if (likely(new_state == priv-&gt;can.state))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	timestamp = priv-&gt;read(&amp;regs-&gt;timer) &lt;&lt; 16;</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_err_skb(dev, &amp;cf);</div><div class='add'>+	if (unlikely(!skb))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	can_change_state(dev, cf, tx_state, rx_state);</div><div class='add'>+</div><div class='add'>+	if (unlikely(new_state == CAN_STATE_BUS_OFF))</div><div class='add'>+		can_bus_off(dev);</div><div class='add'>+</div><div class='add'>+	err = can_rx_offload_queue_timestamp(&amp;priv-&gt;offload, skb, timestamp);</div><div class='add'>+	if (err)</div><div class='add'>+		dev-&gt;stats.rx_fifo_errors++;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u64 flexcan_read64_mask(struct flexcan_priv *priv, void __iomem *addr, u64 mask)</div><div class='add'>+{</div><div class='add'>+	u64 reg = 0;</div><div class='add'>+</div><div class='add'>+	if (upper_32_bits(mask))</div><div class='add'>+		reg = (u64)priv-&gt;read(addr - 4) &lt;&lt; 32;</div><div class='add'>+	if (lower_32_bits(mask))</div><div class='add'>+		reg |= priv-&gt;read(addr);</div><div class='add'>+</div><div class='add'>+	return reg &amp; mask;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void flexcan_write64(struct flexcan_priv *priv, u64 val, void __iomem *addr)</div><div class='add'>+{</div><div class='add'>+	if (upper_32_bits(val))</div><div class='add'>+		priv-&gt;write(upper_32_bits(val), addr - 4);</div><div class='add'>+	if (lower_32_bits(val))</div><div class='add'>+		priv-&gt;write(lower_32_bits(val), addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u64 flexcan_read_reg_iflag_rx(struct flexcan_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return flexcan_read64_mask(priv, &amp;priv-&gt;regs-&gt;iflag1, priv-&gt;rx_mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u64 flexcan_read_reg_iflag_tx(struct flexcan_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return flexcan_read64_mask(priv, &amp;priv-&gt;regs-&gt;iflag1, priv-&gt;tx_mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct flexcan_priv *rx_offload_to_priv(struct can_rx_offload *offload)</div><div class='add'>+{</div><div class='add'>+	return container_of(offload, struct flexcan_priv, offload);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct sk_buff *flexcan_mailbox_read(struct can_rx_offload *offload,</div><div class='add'>+					    unsigned int n, u32 *timestamp,</div><div class='add'>+					    bool drop)</div><div class='add'>+{</div><div class='add'>+	struct flexcan_priv *priv = rx_offload_to_priv(offload);</div><div class='add'>+	struct flexcan_regs __iomem *regs = priv-&gt;regs;</div><div class='add'>+	struct flexcan_mb __iomem *mb;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct canfd_frame *cfd;</div><div class='add'>+	u32 reg_ctrl, reg_id, reg_iflag1;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	mb = flexcan_get_mb(priv, n);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_USE_RX_MAILBOX) {</div><div class='add'>+		u32 code;</div><div class='add'>+</div><div class='add'>+		do {</div><div class='add'>+			reg_ctrl = priv-&gt;read(&amp;mb-&gt;can_ctrl);</div><div class='add'>+		} while (reg_ctrl &amp; FLEXCAN_MB_CODE_RX_BUSY_BIT);</div><div class='add'>+</div><div class='add'>+		/* is this MB empty? */</div><div class='add'>+		code = reg_ctrl &amp; FLEXCAN_MB_CODE_MASK;</div><div class='add'>+		if ((code != FLEXCAN_MB_CODE_RX_FULL) &amp;&amp;</div><div class='add'>+		    (code != FLEXCAN_MB_CODE_RX_OVERRUN))</div><div class='add'>+			return NULL;</div><div class='add'>+</div><div class='add'>+		if (code == FLEXCAN_MB_CODE_RX_OVERRUN) {</div><div class='add'>+			/* This MB was overrun, we lost data */</div><div class='add'>+			offload-&gt;dev-&gt;stats.rx_over_errors++;</div><div class='add'>+			offload-&gt;dev-&gt;stats.rx_errors++;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		reg_iflag1 = priv-&gt;read(&amp;regs-&gt;iflag1);</div><div class='add'>+		if (!(reg_iflag1 &amp; FLEXCAN_IFLAG_RX_FIFO_AVAILABLE))</div><div class='add'>+			return NULL;</div><div class='add'>+</div><div class='add'>+		reg_ctrl = priv-&gt;read(&amp;mb-&gt;can_ctrl);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (unlikely(drop)) {</div><div class='add'>+		skb = ERR_PTR(-ENOBUFS);</div><div class='add'>+		goto mark_as_read;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (reg_ctrl &amp; FLEXCAN_MB_CNT_EDL)</div><div class='add'>+		skb = alloc_canfd_skb(offload-&gt;dev, &amp;cfd);</div><div class='add'>+	else</div><div class='add'>+		skb = alloc_can_skb(offload-&gt;dev, (struct can_frame **)&amp;cfd);</div><div class='add'>+	if (unlikely(!skb)) {</div><div class='add'>+		skb = ERR_PTR(-ENOMEM);</div><div class='add'>+		goto mark_as_read;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* increase timstamp to full 32 bit */</div><div class='add'>+	*timestamp = reg_ctrl &lt;&lt; 16;</div><div class='add'>+</div><div class='add'>+	reg_id = priv-&gt;read(&amp;mb-&gt;can_id);</div><div class='add'>+	if (reg_ctrl &amp; FLEXCAN_MB_CNT_IDE)</div><div class='add'>+		cfd-&gt;can_id = ((reg_id &gt;&gt; 0) &amp; CAN_EFF_MASK) | CAN_EFF_FLAG;</div><div class='add'>+	else</div><div class='add'>+		cfd-&gt;can_id = (reg_id &gt;&gt; 18) &amp; CAN_SFF_MASK;</div><div class='add'>+</div><div class='add'>+	if (reg_ctrl &amp; FLEXCAN_MB_CNT_EDL) {</div><div class='add'>+		cfd-&gt;len = can_fd_dlc2len((reg_ctrl &gt;&gt; 16) &amp; 0xf);</div><div class='add'>+</div><div class='add'>+		if (reg_ctrl &amp; FLEXCAN_MB_CNT_BRS)</div><div class='add'>+			cfd-&gt;flags |= CANFD_BRS;</div><div class='add'>+	} else {</div><div class='add'>+		cfd-&gt;len = can_cc_dlc2len((reg_ctrl &gt;&gt; 16) &amp; 0xf);</div><div class='add'>+</div><div class='add'>+		if (reg_ctrl &amp; FLEXCAN_MB_CNT_RTR)</div><div class='add'>+			cfd-&gt;can_id |= CAN_RTR_FLAG;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (reg_ctrl &amp; FLEXCAN_MB_CNT_ESI)</div><div class='add'>+		cfd-&gt;flags |= CANFD_ESI;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; cfd-&gt;len; i += sizeof(u32)) {</div><div class='add'>+		__be32 data = cpu_to_be32(priv-&gt;read(&amp;mb-&gt;data[i / sizeof(u32)]));</div><div class='add'>+		*(__be32 *)(cfd-&gt;data + i) = data;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+ mark_as_read:</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_USE_RX_MAILBOX)</div><div class='add'>+		flexcan_write64(priv, FLEXCAN_IFLAG_MB(n), &amp;regs-&gt;iflag1);</div><div class='add'>+	else</div><div class='add'>+		priv-&gt;write(FLEXCAN_IFLAG_RX_FIFO_AVAILABLE, &amp;regs-&gt;iflag1);</div><div class='add'>+</div><div class='add'>+	/* Read the Free Running Timer. It is optional but recommended</div><div class='add'>+	 * to unlock Mailbox as soon as possible and make it available</div><div class='add'>+	 * for reception.</div><div class='add'>+	 */</div><div class='add'>+	priv-&gt;read(&amp;regs-&gt;timer);</div><div class='add'>+</div><div class='add'>+	return skb;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t flexcan_irq(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = dev_id;</div><div class='add'>+	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='add'>+	struct flexcan_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct flexcan_regs __iomem *regs = priv-&gt;regs;</div><div class='add'>+	irqreturn_t handled = IRQ_NONE;</div><div class='add'>+	u64 reg_iflag_tx;</div><div class='add'>+	u32 reg_esr;</div><div class='add'>+	enum can_state last_state = priv-&gt;can.state;</div><div class='add'>+</div><div class='add'>+	/* reception interrupt */</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_USE_RX_MAILBOX) {</div><div class='add'>+		u64 reg_iflag_rx;</div><div class='add'>+		int ret;</div><div class='add'>+</div><div class='add'>+		while ((reg_iflag_rx = flexcan_read_reg_iflag_rx(priv))) {</div><div class='add'>+			handled = IRQ_HANDLED;</div><div class='add'>+			ret = can_rx_offload_irq_offload_timestamp(&amp;priv-&gt;offload,</div><div class='add'>+								   reg_iflag_rx);</div><div class='add'>+			if (!ret)</div><div class='add'>+				break;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		u32 reg_iflag1;</div><div class='add'>+</div><div class='add'>+		reg_iflag1 = priv-&gt;read(&amp;regs-&gt;iflag1);</div><div class='add'>+		if (reg_iflag1 &amp; FLEXCAN_IFLAG_RX_FIFO_AVAILABLE) {</div><div class='add'>+			handled = IRQ_HANDLED;</div><div class='add'>+			can_rx_offload_irq_offload_fifo(&amp;priv-&gt;offload);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* FIFO overflow interrupt */</div><div class='add'>+		if (reg_iflag1 &amp; FLEXCAN_IFLAG_RX_FIFO_OVERFLOW) {</div><div class='add'>+			handled = IRQ_HANDLED;</div><div class='add'>+			priv-&gt;write(FLEXCAN_IFLAG_RX_FIFO_OVERFLOW,</div><div class='add'>+				    &amp;regs-&gt;iflag1);</div><div class='add'>+			dev-&gt;stats.rx_over_errors++;</div><div class='add'>+			dev-&gt;stats.rx_errors++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	reg_iflag_tx = flexcan_read_reg_iflag_tx(priv);</div><div class='add'>+</div><div class='add'>+	/* transmission complete interrupt */</div><div class='add'>+	if (reg_iflag_tx &amp; priv-&gt;tx_mask) {</div><div class='add'>+		u32 reg_ctrl = priv-&gt;read(&amp;priv-&gt;tx_mb-&gt;can_ctrl);</div><div class='add'>+</div><div class='add'>+		handled = IRQ_HANDLED;</div><div class='add'>+		stats-&gt;tx_bytes +=</div><div class='add'>+			can_rx_offload_get_echo_skb_queue_timestamp(&amp;priv-&gt;offload, 0,</div><div class='add'>+								    reg_ctrl &lt;&lt; 16, NULL);</div><div class='add'>+		stats-&gt;tx_packets++;</div><div class='add'>+</div><div class='add'>+		/* after sending a RTR frame MB is in RX mode */</div><div class='add'>+		priv-&gt;write(FLEXCAN_MB_CODE_TX_INACTIVE,</div><div class='add'>+			    &amp;priv-&gt;tx_mb-&gt;can_ctrl);</div><div class='add'>+		flexcan_write64(priv, priv-&gt;tx_mask, &amp;regs-&gt;iflag1);</div><div class='add'>+		netif_wake_queue(dev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	reg_esr = priv-&gt;read(&amp;regs-&gt;esr);</div><div class='add'>+</div><div class='add'>+	/* ACK all bus error, state change and wake IRQ sources */</div><div class='add'>+	if (reg_esr &amp; (FLEXCAN_ESR_ALL_INT | FLEXCAN_ESR_WAK_INT)) {</div><div class='add'>+		handled = IRQ_HANDLED;</div><div class='add'>+		priv-&gt;write(reg_esr &amp; (FLEXCAN_ESR_ALL_INT | FLEXCAN_ESR_WAK_INT), &amp;regs-&gt;esr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* state change interrupt or broken error state quirk fix is enabled */</div><div class='add'>+	if ((reg_esr &amp; FLEXCAN_ESR_ERR_STATE) ||</div><div class='add'>+	    (priv-&gt;devtype_data.quirks &amp; (FLEXCAN_QUIRK_BROKEN_WERR_STATE |</div><div class='add'>+					   FLEXCAN_QUIRK_BROKEN_PERR_STATE)))</div><div class='add'>+		flexcan_irq_state(dev, reg_esr);</div><div class='add'>+</div><div class='add'>+	/* bus error IRQ - handle if bus error reporting is activated */</div><div class='add'>+	if ((reg_esr &amp; FLEXCAN_ESR_ERR_BUS) &amp;&amp;</div><div class='add'>+	    (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING))</div><div class='add'>+		flexcan_irq_bus_err(dev, reg_esr);</div><div class='add'>+</div><div class='add'>+	/* availability of error interrupt among state transitions in case</div><div class='add'>+	 * bus error reporting is de-activated and</div><div class='add'>+	 * FLEXCAN_QUIRK_BROKEN_PERR_STATE is enabled:</div><div class='add'>+	 *  +--------------------------------------------------------------+</div><div class='add'>+	 *  | +----------------------------------------------+ [stopped /  |</div><div class='add'>+	 *  | |                                              |  sleeping] -+</div><div class='add'>+	 *  +-+-&gt; active &lt;-&gt; warning &lt;-&gt; passive -&gt; bus off -+</div><div class='add'>+	 *        ___________^^^^^^^^^^^^_______________________________</div><div class='add'>+	 *        disabled(1)  enabled             disabled</div><div class='add'>+	 *</div><div class='add'>+	 * (1): enabled if FLEXCAN_QUIRK_BROKEN_WERR_STATE is enabled</div><div class='add'>+	 */</div><div class='add'>+	if ((last_state != priv-&gt;can.state) &amp;&amp;</div><div class='add'>+	    (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_BROKEN_PERR_STATE) &amp;&amp;</div><div class='add'>+	    !(priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING)) {</div><div class='add'>+		switch (priv-&gt;can.state) {</div><div class='add'>+		case CAN_STATE_ERROR_ACTIVE:</div><div class='add'>+			if (priv-&gt;devtype_data.quirks &amp;</div><div class='add'>+			    FLEXCAN_QUIRK_BROKEN_WERR_STATE)</div><div class='add'>+				flexcan_error_irq_enable(priv);</div><div class='add'>+			else</div><div class='add'>+				flexcan_error_irq_disable(priv);</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case CAN_STATE_ERROR_WARNING:</div><div class='add'>+			flexcan_error_irq_enable(priv);</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case CAN_STATE_ERROR_PASSIVE:</div><div class='add'>+		case CAN_STATE_BUS_OFF:</div><div class='add'>+			flexcan_error_irq_disable(priv);</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (handled)</div><div class='add'>+		can_rx_offload_irq_finish(&amp;priv-&gt;offload);</div><div class='add'>+</div><div class='add'>+	return handled;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void flexcan_set_bittiming_ctrl(const struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	const struct flexcan_priv *priv = netdev_priv(dev);</div><div class='add'>+	const struct can_bittiming *bt = &amp;priv-&gt;can.bittiming;</div><div class='add'>+	struct flexcan_regs __iomem *regs = priv-&gt;regs;</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	reg = priv-&gt;read(&amp;regs-&gt;ctrl);</div><div class='add'>+	reg &amp;= ~(FLEXCAN_CTRL_PRESDIV(0xff) |</div><div class='add'>+		 FLEXCAN_CTRL_RJW(0x3) |</div><div class='add'>+		 FLEXCAN_CTRL_PSEG1(0x7) |</div><div class='add'>+		 FLEXCAN_CTRL_PSEG2(0x7) |</div><div class='add'>+		 FLEXCAN_CTRL_PROPSEG(0x7));</div><div class='add'>+</div><div class='add'>+	reg |= FLEXCAN_CTRL_PRESDIV(bt-&gt;brp - 1) |</div><div class='add'>+		FLEXCAN_CTRL_PSEG1(bt-&gt;phase_seg1 - 1) |</div><div class='add'>+		FLEXCAN_CTRL_PSEG2(bt-&gt;phase_seg2 - 1) |</div><div class='add'>+		FLEXCAN_CTRL_RJW(bt-&gt;sjw - 1) |</div><div class='add'>+		FLEXCAN_CTRL_PROPSEG(bt-&gt;prop_seg - 1);</div><div class='add'>+</div><div class='add'>+	netdev_dbg(dev, "writing ctrl=0x%08x\n", reg);</div><div class='add'>+	priv-&gt;write(reg, &amp;regs-&gt;ctrl);</div><div class='add'>+</div><div class='add'>+	/* print chip status */</div><div class='add'>+	netdev_dbg(dev, "%s: mcr=0x%08x ctrl=0x%08x\n", __func__,</div><div class='add'>+		   priv-&gt;read(&amp;regs-&gt;mcr), priv-&gt;read(&amp;regs-&gt;ctrl));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void flexcan_set_bittiming_cbt(const struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct flexcan_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct can_bittiming *bt = &amp;priv-&gt;can.bittiming;</div><div class='add'>+	struct can_bittiming *dbt = &amp;priv-&gt;can.fd.data_bittiming;</div><div class='add'>+	struct flexcan_regs __iomem *regs = priv-&gt;regs;</div><div class='add'>+	u32 reg_cbt, reg_fdctrl;</div><div class='add'>+</div><div class='add'>+	/* CBT */</div><div class='add'>+	/* CBT[EPSEG1] is 5 bit long and CBT[EPROPSEG] is 6 bit</div><div class='add'>+	 * long. The can_calc_bittiming() tries to divide the tseg1</div><div class='add'>+	 * equally between phase_seg1 and prop_seg, which may not fit</div><div class='add'>+	 * in CBT register. Therefore, if phase_seg1 is more than</div><div class='add'>+	 * possible value, increase prop_seg and decrease phase_seg1.</div><div class='add'>+	 */</div><div class='add'>+	if (bt-&gt;phase_seg1 &gt; 0x20) {</div><div class='add'>+		bt-&gt;prop_seg += (bt-&gt;phase_seg1 - 0x20);</div><div class='add'>+		bt-&gt;phase_seg1 = 0x20;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	reg_cbt = FLEXCAN_CBT_BTF |</div><div class='add'>+		FIELD_PREP(FLEXCAN_CBT_EPRESDIV_MASK, bt-&gt;brp - 1) |</div><div class='add'>+		FIELD_PREP(FLEXCAN_CBT_ERJW_MASK, bt-&gt;sjw - 1) |</div><div class='add'>+		FIELD_PREP(FLEXCAN_CBT_EPROPSEG_MASK, bt-&gt;prop_seg - 1) |</div><div class='add'>+		FIELD_PREP(FLEXCAN_CBT_EPSEG1_MASK, bt-&gt;phase_seg1 - 1) |</div><div class='add'>+		FIELD_PREP(FLEXCAN_CBT_EPSEG2_MASK, bt-&gt;phase_seg2 - 1);</div><div class='add'>+</div><div class='add'>+	netdev_dbg(dev, "writing cbt=0x%08x\n", reg_cbt);</div><div class='add'>+	priv-&gt;write(reg_cbt, &amp;regs-&gt;cbt);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD) {</div><div class='add'>+		u32 reg_fdcbt, reg_ctrl2;</div><div class='add'>+</div><div class='add'>+		if (bt-&gt;brp != dbt-&gt;brp)</div><div class='add'>+			netdev_warn(dev, "Data brp=%d and brp=%d don't match, this may result in a phase error. Consider using different bitrate and/or data bitrate.\n",</div><div class='add'>+				    dbt-&gt;brp, bt-&gt;brp);</div><div class='add'>+</div><div class='add'>+		/* FDCBT */</div><div class='add'>+		/* FDCBT[FPSEG1] is 3 bit long and FDCBT[FPROPSEG] is</div><div class='add'>+		 * 5 bit long. The can_calc_bittiming tries to divide</div><div class='add'>+		 * the tseg1 equally between phase_seg1 and prop_seg,</div><div class='add'>+		 * which may not fit in FDCBT register. Therefore, if</div><div class='add'>+		 * phase_seg1 is more than possible value, increase</div><div class='add'>+		 * prop_seg and decrease phase_seg1</div><div class='add'>+		 */</div><div class='add'>+		if (dbt-&gt;phase_seg1 &gt; 0x8) {</div><div class='add'>+			dbt-&gt;prop_seg += (dbt-&gt;phase_seg1 - 0x8);</div><div class='add'>+			dbt-&gt;phase_seg1 = 0x8;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		reg_fdcbt = priv-&gt;read(&amp;regs-&gt;fdcbt);</div><div class='add'>+		reg_fdcbt &amp;= ~(FIELD_PREP(FLEXCAN_FDCBT_FPRESDIV_MASK, 0x3ff) |</div><div class='add'>+			       FIELD_PREP(FLEXCAN_FDCBT_FRJW_MASK, 0x7) |</div><div class='add'>+			       FIELD_PREP(FLEXCAN_FDCBT_FPROPSEG_MASK, 0x1f) |</div><div class='add'>+			       FIELD_PREP(FLEXCAN_FDCBT_FPSEG1_MASK, 0x7) |</div><div class='add'>+			       FIELD_PREP(FLEXCAN_FDCBT_FPSEG2_MASK, 0x7));</div><div class='add'>+</div><div class='add'>+		reg_fdcbt |= FIELD_PREP(FLEXCAN_FDCBT_FPRESDIV_MASK, dbt-&gt;brp - 1) |</div><div class='add'>+			FIELD_PREP(FLEXCAN_FDCBT_FRJW_MASK, dbt-&gt;sjw - 1) |</div><div class='add'>+			FIELD_PREP(FLEXCAN_FDCBT_FPROPSEG_MASK, dbt-&gt;prop_seg) |</div><div class='add'>+			FIELD_PREP(FLEXCAN_FDCBT_FPSEG1_MASK, dbt-&gt;phase_seg1 - 1) |</div><div class='add'>+			FIELD_PREP(FLEXCAN_FDCBT_FPSEG2_MASK, dbt-&gt;phase_seg2 - 1);</div><div class='add'>+</div><div class='add'>+		netdev_dbg(dev, "writing fdcbt=0x%08x\n", reg_fdcbt);</div><div class='add'>+		priv-&gt;write(reg_fdcbt, &amp;regs-&gt;fdcbt);</div><div class='add'>+</div><div class='add'>+		/* CTRL2 */</div><div class='add'>+		reg_ctrl2 = priv-&gt;read(&amp;regs-&gt;ctrl2);</div><div class='add'>+		reg_ctrl2 &amp;= ~FLEXCAN_CTRL2_ISOCANFDEN;</div><div class='add'>+		if (!(priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD_NON_ISO))</div><div class='add'>+			reg_ctrl2 |= FLEXCAN_CTRL2_ISOCANFDEN;</div><div class='add'>+</div><div class='add'>+		netdev_dbg(dev, "writing ctrl2=0x%08x\n", reg_ctrl2);</div><div class='add'>+		priv-&gt;write(reg_ctrl2, &amp;regs-&gt;ctrl2);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* FDCTRL */</div><div class='add'>+	reg_fdctrl = priv-&gt;read(&amp;regs-&gt;fdctrl);</div><div class='add'>+	reg_fdctrl &amp;= ~(FLEXCAN_FDCTRL_FDRATE |</div><div class='add'>+			FIELD_PREP(FLEXCAN_FDCTRL_TDCOFF, 0x1f));</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD) {</div><div class='add'>+		reg_fdctrl |= FLEXCAN_FDCTRL_FDRATE;</div><div class='add'>+</div><div class='add'>+		if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LOOPBACK) {</div><div class='add'>+			/* TDC must be disabled for Loop Back mode */</div><div class='add'>+			reg_fdctrl &amp;= ~FLEXCAN_FDCTRL_TDCEN;</div><div class='add'>+		} else {</div><div class='add'>+			reg_fdctrl |= FLEXCAN_FDCTRL_TDCEN |</div><div class='add'>+				FIELD_PREP(FLEXCAN_FDCTRL_TDCOFF,</div><div class='add'>+					   ((dbt-&gt;phase_seg1 - 1) +</div><div class='add'>+					    dbt-&gt;prop_seg + 2) *</div><div class='add'>+					   ((dbt-&gt;brp - 1 ) + 1));</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev_dbg(dev, "writing fdctrl=0x%08x\n", reg_fdctrl);</div><div class='add'>+	priv-&gt;write(reg_fdctrl, &amp;regs-&gt;fdctrl);</div><div class='add'>+</div><div class='add'>+	netdev_dbg(dev, "%s: mcr=0x%08x ctrl=0x%08x ctrl2=0x%08x fdctrl=0x%08x cbt=0x%08x fdcbt=0x%08x\n",</div><div class='add'>+		   __func__,</div><div class='add'>+		   priv-&gt;read(&amp;regs-&gt;mcr), priv-&gt;read(&amp;regs-&gt;ctrl),</div><div class='add'>+		   priv-&gt;read(&amp;regs-&gt;ctrl2), priv-&gt;read(&amp;regs-&gt;fdctrl),</div><div class='add'>+		   priv-&gt;read(&amp;regs-&gt;cbt), priv-&gt;read(&amp;regs-&gt;fdcbt));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void flexcan_set_bittiming(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	const struct flexcan_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct flexcan_regs __iomem *regs = priv-&gt;regs;</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	reg = priv-&gt;read(&amp;regs-&gt;ctrl);</div><div class='add'>+	reg &amp;= ~(FLEXCAN_CTRL_LPB | FLEXCAN_CTRL_SMP |</div><div class='add'>+		 FLEXCAN_CTRL_LOM);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LOOPBACK)</div><div class='add'>+		reg |= FLEXCAN_CTRL_LPB;</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LISTENONLY)</div><div class='add'>+		reg |= FLEXCAN_CTRL_LOM;</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_3_SAMPLES)</div><div class='add'>+		reg |= FLEXCAN_CTRL_SMP;</div><div class='add'>+</div><div class='add'>+	netdev_dbg(dev, "writing ctrl=0x%08x\n", reg);</div><div class='add'>+	priv-&gt;write(reg, &amp;regs-&gt;ctrl);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.ctrlmode_supported &amp; CAN_CTRLMODE_FD)</div><div class='add'>+		return flexcan_set_bittiming_cbt(dev);</div><div class='add'>+	else</div><div class='add'>+		return flexcan_set_bittiming_ctrl(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void flexcan_ram_init(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct flexcan_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct flexcan_regs __iomem *regs = priv-&gt;regs;</div><div class='add'>+	u32 reg_ctrl2;</div><div class='add'>+</div><div class='add'>+	/* 11.8.3.13 Detection and correction of memory errors:</div><div class='add'>+	 * CTRL2[WRMFRZ] grants write access to all memory positions</div><div class='add'>+	 * that require initialization, ranging from 0x080 to 0xADF</div><div class='add'>+	 * and from 0xF28 to 0xFFF when the CAN FD feature is enabled.</div><div class='add'>+	 * The RXMGMASK, RX14MASK, RX15MASK, and RXFGMASK registers</div><div class='add'>+	 * need to be initialized as well. MCR[RFEN] must not be set</div><div class='add'>+	 * during memory initialization.</div><div class='add'>+	 */</div><div class='add'>+	reg_ctrl2 = priv-&gt;read(&amp;regs-&gt;ctrl2);</div><div class='add'>+	reg_ctrl2 |= FLEXCAN_CTRL2_WRMFRZ;</div><div class='add'>+	priv-&gt;write(reg_ctrl2, &amp;regs-&gt;ctrl2);</div><div class='add'>+</div><div class='add'>+	memset_io(&amp;regs-&gt;init, 0, sizeof(regs-&gt;init));</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD)</div><div class='add'>+		memset_io(&amp;regs-&gt;init_fd, 0, sizeof(regs-&gt;init_fd));</div><div class='add'>+</div><div class='add'>+	reg_ctrl2 &amp;= ~FLEXCAN_CTRL2_WRMFRZ;</div><div class='add'>+	priv-&gt;write(reg_ctrl2, &amp;regs-&gt;ctrl2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int flexcan_rx_offload_setup(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct flexcan_priv *priv = netdev_priv(dev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD)</div><div class='add'>+		priv-&gt;mb_size = sizeof(struct flexcan_mb) + CANFD_MAX_DLEN;</div><div class='add'>+	else</div><div class='add'>+		priv-&gt;mb_size = sizeof(struct flexcan_mb) + CAN_MAX_DLEN;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_NR_MB_16)</div><div class='add'>+		priv-&gt;mb_count = 16;</div><div class='add'>+	else</div><div class='add'>+		priv-&gt;mb_count = (sizeof(priv-&gt;regs-&gt;mb[0]) / priv-&gt;mb_size) +</div><div class='add'>+				 (sizeof(priv-&gt;regs-&gt;mb[1]) / priv-&gt;mb_size);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_USE_RX_MAILBOX)</div><div class='add'>+		priv-&gt;tx_mb_reserved =</div><div class='add'>+			flexcan_get_mb(priv, FLEXCAN_TX_MB_RESERVED_RX_MAILBOX);</div><div class='add'>+	else</div><div class='add'>+		priv-&gt;tx_mb_reserved =</div><div class='add'>+			flexcan_get_mb(priv, FLEXCAN_TX_MB_RESERVED_RX_FIFO);</div><div class='add'>+	priv-&gt;tx_mb_idx = priv-&gt;mb_count - 1;</div><div class='add'>+	priv-&gt;tx_mb = flexcan_get_mb(priv, priv-&gt;tx_mb_idx);</div><div class='add'>+	priv-&gt;tx_mask = FLEXCAN_IFLAG_MB(priv-&gt;tx_mb_idx);</div><div class='add'>+</div><div class='add'>+	priv-&gt;offload.mailbox_read = flexcan_mailbox_read;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_USE_RX_MAILBOX) {</div><div class='add'>+		priv-&gt;offload.mb_first = FLEXCAN_RX_MB_RX_MAILBOX_FIRST;</div><div class='add'>+		priv-&gt;offload.mb_last = priv-&gt;mb_count - 2;</div><div class='add'>+</div><div class='add'>+		priv-&gt;rx_mask = GENMASK_ULL(priv-&gt;offload.mb_last,</div><div class='add'>+					    priv-&gt;offload.mb_first);</div><div class='add'>+		err = can_rx_offload_add_timestamp(dev, &amp;priv-&gt;offload);</div><div class='add'>+	} else {</div><div class='add'>+		priv-&gt;rx_mask = FLEXCAN_IFLAG_RX_FIFO_OVERFLOW |</div><div class='add'>+			FLEXCAN_IFLAG_RX_FIFO_AVAILABLE;</div><div class='add'>+		err = can_rx_offload_add_fifo(dev, &amp;priv-&gt;offload,</div><div class='add'>+					      FLEXCAN_NAPI_WEIGHT);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void flexcan_chip_interrupts_enable(const struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	const struct flexcan_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct flexcan_regs __iomem *regs = priv-&gt;regs;</div><div class='add'>+	u64 reg_imask;</div><div class='add'>+</div><div class='add'>+	disable_irq(dev-&gt;irq);</div><div class='add'>+	priv-&gt;write(priv-&gt;reg_ctrl_default, &amp;regs-&gt;ctrl);</div><div class='add'>+	reg_imask = priv-&gt;rx_mask | priv-&gt;tx_mask;</div><div class='add'>+	priv-&gt;write(upper_32_bits(reg_imask), &amp;regs-&gt;imask2);</div><div class='add'>+	priv-&gt;write(lower_32_bits(reg_imask), &amp;regs-&gt;imask1);</div><div class='add'>+	enable_irq(dev-&gt;irq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void flexcan_chip_interrupts_disable(const struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	const struct flexcan_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct flexcan_regs __iomem *regs = priv-&gt;regs;</div><div class='add'>+</div><div class='add'>+	priv-&gt;write(0, &amp;regs-&gt;imask2);</div><div class='add'>+	priv-&gt;write(0, &amp;regs-&gt;imask1);</div><div class='add'>+	priv-&gt;write(priv-&gt;reg_ctrl_default &amp; ~FLEXCAN_CTRL_ERR_ALL,</div><div class='add'>+		    &amp;regs-&gt;ctrl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* flexcan_chip_start</div><div class='add'>+ *</div><div class='add'>+ * this functions is entered with clocks enabled</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+static int flexcan_chip_start(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct flexcan_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct flexcan_regs __iomem *regs = priv-&gt;regs;</div><div class='add'>+	u32 reg_mcr, reg_ctrl, reg_ctrl2, reg_mecr;</div><div class='add'>+	int err, i;</div><div class='add'>+	struct flexcan_mb __iomem *mb;</div><div class='add'>+</div><div class='add'>+	/* enable module */</div><div class='add'>+	err = flexcan_chip_enable(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* soft reset */</div><div class='add'>+	err = flexcan_chip_softreset(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_chip_disable;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_SUPPORT_ECC)</div><div class='add'>+		flexcan_ram_init(dev);</div><div class='add'>+</div><div class='add'>+	flexcan_set_bittiming(dev);</div><div class='add'>+</div><div class='add'>+	/* set freeze, halt */</div><div class='add'>+	err = flexcan_chip_freeze(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_chip_disable;</div><div class='add'>+</div><div class='add'>+	/* MCR</div><div class='add'>+	 *</div><div class='add'>+	 * only supervisor access</div><div class='add'>+	 * enable warning int</div><div class='add'>+	 * enable individual RX masking</div><div class='add'>+	 * choose format C</div><div class='add'>+	 * set max mailbox number</div><div class='add'>+	 */</div><div class='add'>+	reg_mcr = priv-&gt;read(&amp;regs-&gt;mcr);</div><div class='add'>+	reg_mcr &amp;= ~FLEXCAN_MCR_MAXMB(0xff);</div><div class='add'>+	reg_mcr |= FLEXCAN_MCR_SUPV | FLEXCAN_MCR_WRN_EN | FLEXCAN_MCR_IRMQ |</div><div class='add'>+		FLEXCAN_MCR_IDAM_C | FLEXCAN_MCR_MAXMB(priv-&gt;tx_mb_idx);</div><div class='add'>+</div><div class='add'>+	/* MCR</div><div class='add'>+	 *</div><div class='add'>+	 * FIFO:</div><div class='add'>+	 * - disable for mailbox mode</div><div class='add'>+	 * - enable for FIFO mode</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_USE_RX_MAILBOX)</div><div class='add'>+		reg_mcr &amp;= ~FLEXCAN_MCR_FEN;</div><div class='add'>+	else</div><div class='add'>+		reg_mcr |= FLEXCAN_MCR_FEN;</div><div class='add'>+</div><div class='add'>+	/* MCR</div><div class='add'>+	 *</div><div class='add'>+	 * NOTE: In loopback mode, the CAN_MCR[SRXDIS] cannot be</div><div class='add'>+	 *       asserted because this will impede the self reception</div><div class='add'>+	 *       of a transmitted message. This is not documented in</div><div class='add'>+	 *       earlier versions of flexcan block guide.</div><div class='add'>+	 *</div><div class='add'>+	 * Self Reception:</div><div class='add'>+	 * - enable Self Reception for loopback mode</div><div class='add'>+	 *   (by clearing "Self Reception Disable" bit)</div><div class='add'>+	 * - disable for normal operation</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LOOPBACK)</div><div class='add'>+		reg_mcr &amp;= ~FLEXCAN_MCR_SRX_DIS;</div><div class='add'>+	else</div><div class='add'>+		reg_mcr |= FLEXCAN_MCR_SRX_DIS;</div><div class='add'>+</div><div class='add'>+	/* MCR - CAN-FD */</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD)</div><div class='add'>+		reg_mcr |= FLEXCAN_MCR_FDEN;</div><div class='add'>+	else</div><div class='add'>+		reg_mcr &amp;= ~FLEXCAN_MCR_FDEN;</div><div class='add'>+</div><div class='add'>+	netdev_dbg(dev, "%s: writing mcr=0x%08x", __func__, reg_mcr);</div><div class='add'>+	priv-&gt;write(reg_mcr, &amp;regs-&gt;mcr);</div><div class='add'>+</div><div class='add'>+	/* CTRL</div><div class='add'>+	 *</div><div class='add'>+	 * disable timer sync feature</div><div class='add'>+	 *</div><div class='add'>+	 * disable auto busoff recovery</div><div class='add'>+	 * transmit lowest buffer first</div><div class='add'>+	 *</div><div class='add'>+	 * enable tx and rx warning interrupt</div><div class='add'>+	 * enable bus off interrupt</div><div class='add'>+	 * (== FLEXCAN_CTRL_ERR_STATE)</div><div class='add'>+	 */</div><div class='add'>+	reg_ctrl = priv-&gt;read(&amp;regs-&gt;ctrl);</div><div class='add'>+	reg_ctrl &amp;= ~FLEXCAN_CTRL_TSYN;</div><div class='add'>+	reg_ctrl |= FLEXCAN_CTRL_BOFF_REC | FLEXCAN_CTRL_LBUF |</div><div class='add'>+		FLEXCAN_CTRL_ERR_STATE;</div><div class='add'>+</div><div class='add'>+	/* enable the "error interrupt" (FLEXCAN_CTRL_ERR_MSK),</div><div class='add'>+	 * on most Flexcan cores, too. Otherwise we don't get</div><div class='add'>+	 * any error warning or passive interrupts.</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_BROKEN_WERR_STATE ||</div><div class='add'>+	    priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING)</div><div class='add'>+		reg_ctrl |= FLEXCAN_CTRL_ERR_MSK;</div><div class='add'>+	else</div><div class='add'>+		reg_ctrl &amp;= ~FLEXCAN_CTRL_ERR_MSK;</div><div class='add'>+</div><div class='add'>+	/* save for later use */</div><div class='add'>+	priv-&gt;reg_ctrl_default = reg_ctrl;</div><div class='add'>+	/* leave interrupts disabled for now */</div><div class='add'>+	reg_ctrl &amp;= ~FLEXCAN_CTRL_ERR_ALL;</div><div class='add'>+	netdev_dbg(dev, "%s: writing ctrl=0x%08x", __func__, reg_ctrl);</div><div class='add'>+	priv-&gt;write(reg_ctrl, &amp;regs-&gt;ctrl);</div><div class='add'>+</div><div class='add'>+	if ((priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_ENABLE_EACEN_RRS)) {</div><div class='add'>+		reg_ctrl2 = priv-&gt;read(&amp;regs-&gt;ctrl2);</div><div class='add'>+		reg_ctrl2 |= FLEXCAN_CTRL2_EACEN | FLEXCAN_CTRL2_RRS;</div><div class='add'>+		priv-&gt;write(reg_ctrl2, &amp;regs-&gt;ctrl2);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.ctrlmode_supported &amp; CAN_CTRLMODE_FD) {</div><div class='add'>+		u32 reg_fdctrl;</div><div class='add'>+</div><div class='add'>+		reg_fdctrl = priv-&gt;read(&amp;regs-&gt;fdctrl);</div><div class='add'>+		reg_fdctrl &amp;= ~(FIELD_PREP(FLEXCAN_FDCTRL_MBDSR1, 0x3) |</div><div class='add'>+				FIELD_PREP(FLEXCAN_FDCTRL_MBDSR0, 0x3));</div><div class='add'>+</div><div class='add'>+		if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD) {</div><div class='add'>+			reg_fdctrl |=</div><div class='add'>+				FIELD_PREP(FLEXCAN_FDCTRL_MBDSR1,</div><div class='add'>+					   FLEXCAN_FDCTRL_MBDSR_64) |</div><div class='add'>+				FIELD_PREP(FLEXCAN_FDCTRL_MBDSR0,</div><div class='add'>+					   FLEXCAN_FDCTRL_MBDSR_64);</div><div class='add'>+		} else {</div><div class='add'>+			reg_fdctrl |=</div><div class='add'>+				FIELD_PREP(FLEXCAN_FDCTRL_MBDSR1,</div><div class='add'>+					   FLEXCAN_FDCTRL_MBDSR_8) |</div><div class='add'>+				FIELD_PREP(FLEXCAN_FDCTRL_MBDSR0,</div><div class='add'>+					   FLEXCAN_FDCTRL_MBDSR_8);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		netdev_dbg(dev, "%s: writing fdctrl=0x%08x",</div><div class='add'>+			   __func__, reg_fdctrl);</div><div class='add'>+		priv-&gt;write(reg_fdctrl, &amp;regs-&gt;fdctrl);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_USE_RX_MAILBOX) {</div><div class='add'>+		for (i = priv-&gt;offload.mb_first; i &lt;= priv-&gt;offload.mb_last; i++) {</div><div class='add'>+			mb = flexcan_get_mb(priv, i);</div><div class='add'>+			priv-&gt;write(FLEXCAN_MB_CODE_RX_EMPTY,</div><div class='add'>+				    &amp;mb-&gt;can_ctrl);</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		/* clear and invalidate unused mailboxes first */</div><div class='add'>+		for (i = FLEXCAN_TX_MB_RESERVED_RX_FIFO; i &lt; priv-&gt;mb_count; i++) {</div><div class='add'>+			mb = flexcan_get_mb(priv, i);</div><div class='add'>+			priv-&gt;write(FLEXCAN_MB_CODE_RX_INACTIVE,</div><div class='add'>+				    &amp;mb-&gt;can_ctrl);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Errata ERR005829: mark first TX mailbox as INACTIVE */</div><div class='add'>+	priv-&gt;write(FLEXCAN_MB_CODE_TX_INACTIVE,</div><div class='add'>+		    &amp;priv-&gt;tx_mb_reserved-&gt;can_ctrl);</div><div class='add'>+</div><div class='add'>+	/* mark TX mailbox as INACTIVE */</div><div class='add'>+	priv-&gt;write(FLEXCAN_MB_CODE_TX_INACTIVE,</div><div class='add'>+		    &amp;priv-&gt;tx_mb-&gt;can_ctrl);</div><div class='add'>+</div><div class='add'>+	/* acceptance mask/acceptance code (accept everything) */</div><div class='add'>+	priv-&gt;write(0x0, &amp;regs-&gt;rxgmask);</div><div class='add'>+	priv-&gt;write(0x0, &amp;regs-&gt;rx14mask);</div><div class='add'>+	priv-&gt;write(0x0, &amp;regs-&gt;rx15mask);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_DISABLE_RXFG)</div><div class='add'>+		priv-&gt;write(0x0, &amp;regs-&gt;rxfgmask);</div><div class='add'>+</div><div class='add'>+	/* clear acceptance filters */</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;mb_count; i++)</div><div class='add'>+		priv-&gt;write(0, &amp;regs-&gt;rximr[i]);</div><div class='add'>+</div><div class='add'>+	/* On Vybrid, disable non-correctable errors interrupt and</div><div class='add'>+	 * freeze mode. It still can correct the correctable errors</div><div class='add'>+	 * when HW supports ECC.</div><div class='add'>+	 *</div><div class='add'>+	 * This also works around errata e5295 which generates false</div><div class='add'>+	 * positive memory errors and put the device in freeze mode.</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_DISABLE_MECR) {</div><div class='add'>+		/* Follow the protocol as described in "Detection</div><div class='add'>+		 * and Correction of Memory Errors" to write to</div><div class='add'>+		 * MECR register (step 1 - 5)</div><div class='add'>+		 *</div><div class='add'>+		 * 1. By default, CTRL2[ECRWRE] = 0, MECR[ECRWRDIS] = 1</div><div class='add'>+		 * 2. set CTRL2[ECRWRE]</div><div class='add'>+		 */</div><div class='add'>+		reg_ctrl2 = priv-&gt;read(&amp;regs-&gt;ctrl2);</div><div class='add'>+		reg_ctrl2 |= FLEXCAN_CTRL2_ECRWRE;</div><div class='add'>+		priv-&gt;write(reg_ctrl2, &amp;regs-&gt;ctrl2);</div><div class='add'>+</div><div class='add'>+		/* 3. clear MECR[ECRWRDIS] */</div><div class='add'>+		reg_mecr = priv-&gt;read(&amp;regs-&gt;mecr);</div><div class='add'>+		reg_mecr &amp;= ~FLEXCAN_MECR_ECRWRDIS;</div><div class='add'>+		priv-&gt;write(reg_mecr, &amp;regs-&gt;mecr);</div><div class='add'>+</div><div class='add'>+		/* 4. all writes to MECR must keep MECR[ECRWRDIS] cleared */</div><div class='add'>+		reg_mecr &amp;= ~(FLEXCAN_MECR_NCEFAFRZ | FLEXCAN_MECR_HANCEI_MSK |</div><div class='add'>+			      FLEXCAN_MECR_FANCEI_MSK);</div><div class='add'>+		priv-&gt;write(reg_mecr, &amp;regs-&gt;mecr);</div><div class='add'>+</div><div class='add'>+		/* 5. after configuration done, lock MECR by either</div><div class='add'>+		 * setting MECR[ECRWRDIS] or clearing CTRL2[ECRWRE]</div><div class='add'>+		 */</div><div class='add'>+		reg_mecr |= FLEXCAN_MECR_ECRWRDIS;</div><div class='add'>+		priv-&gt;write(reg_mecr, &amp;regs-&gt;mecr);</div><div class='add'>+</div><div class='add'>+		reg_ctrl2 &amp;= ~FLEXCAN_CTRL2_ECRWRE;</div><div class='add'>+		priv-&gt;write(reg_ctrl2, &amp;regs-&gt;ctrl2);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* synchronize with the can bus */</div><div class='add'>+	err = flexcan_chip_unfreeze(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_chip_disable;</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+</div><div class='add'>+	/* print chip status */</div><div class='add'>+	netdev_dbg(dev, "%s: reading mcr=0x%08x ctrl=0x%08x\n", __func__,</div><div class='add'>+		   priv-&gt;read(&amp;regs-&gt;mcr), priv-&gt;read(&amp;regs-&gt;ctrl));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+ out_chip_disable:</div><div class='add'>+	flexcan_chip_disable(priv);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* __flexcan_chip_stop</div><div class='add'>+ *</div><div class='add'>+ * this function is entered with clocks enabled</div><div class='add'>+ */</div><div class='add'>+static int __flexcan_chip_stop(struct net_device *dev, bool disable_on_error)</div><div class='add'>+{</div><div class='add'>+	struct flexcan_priv *priv = netdev_priv(dev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* freeze + disable module */</div><div class='add'>+	err = flexcan_chip_freeze(priv);</div><div class='add'>+	if (err &amp;&amp; !disable_on_error)</div><div class='add'>+		return err;</div><div class='add'>+	err = flexcan_chip_disable(priv);</div><div class='add'>+	if (err &amp;&amp; !disable_on_error)</div><div class='add'>+		goto out_chip_unfreeze;</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+ out_chip_unfreeze:</div><div class='add'>+	flexcan_chip_unfreeze(priv);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int flexcan_chip_stop_disable_on_error(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	return __flexcan_chip_stop(dev, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int flexcan_chip_stop(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	return __flexcan_chip_stop(dev, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int flexcan_open(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct flexcan_priv *priv = netdev_priv(dev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if ((priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_3_SAMPLES) &amp;&amp;</div><div class='add'>+	    (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD)) {</div><div class='add'>+		netdev_err(dev, "Three Samples mode and CAN-FD mode can't be used together\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = pm_runtime_resume_and_get(priv-&gt;dev);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = open_candev(dev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_runtime_put;</div><div class='add'>+</div><div class='add'>+	err = flexcan_transceiver_enable(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_close;</div><div class='add'>+</div><div class='add'>+	err = flexcan_rx_offload_setup(dev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_transceiver_disable;</div><div class='add'>+</div><div class='add'>+	err = flexcan_chip_start(dev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_can_rx_offload_del;</div><div class='add'>+</div><div class='add'>+	can_rx_offload_enable(&amp;priv-&gt;offload);</div><div class='add'>+</div><div class='add'>+	err = request_irq(dev-&gt;irq, flexcan_irq, IRQF_SHARED, dev-&gt;name, dev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_can_rx_offload_disable;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_NR_IRQ_3) {</div><div class='add'>+		err = request_irq(priv-&gt;irq_boff,</div><div class='add'>+				  flexcan_irq, IRQF_SHARED, dev-&gt;name, dev);</div><div class='add'>+		if (err)</div><div class='add'>+			goto out_free_irq;</div><div class='add'>+</div><div class='add'>+		err = request_irq(priv-&gt;irq_err,</div><div class='add'>+				  flexcan_irq, IRQF_SHARED, dev-&gt;name, dev);</div><div class='add'>+		if (err)</div><div class='add'>+			goto out_free_irq_boff;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_SECONDARY_MB_IRQ) {</div><div class='add'>+		err = request_irq(priv-&gt;irq_secondary_mb,</div><div class='add'>+				  flexcan_irq, IRQF_SHARED, dev-&gt;name, dev);</div><div class='add'>+		if (err)</div><div class='add'>+			goto out_free_irq_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	flexcan_chip_interrupts_enable(dev);</div><div class='add'>+</div><div class='add'>+	netif_start_queue(dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+ out_free_irq_err:</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_NR_IRQ_3)</div><div class='add'>+		free_irq(priv-&gt;irq_err, dev);</div><div class='add'>+ out_free_irq_boff:</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_NR_IRQ_3)</div><div class='add'>+		free_irq(priv-&gt;irq_boff, dev);</div><div class='add'>+ out_free_irq:</div><div class='add'>+	free_irq(dev-&gt;irq, dev);</div><div class='add'>+ out_can_rx_offload_disable:</div><div class='add'>+	can_rx_offload_disable(&amp;priv-&gt;offload);</div><div class='add'>+	flexcan_chip_stop(dev);</div><div class='add'>+ out_can_rx_offload_del:</div><div class='add'>+	can_rx_offload_del(&amp;priv-&gt;offload);</div><div class='add'>+ out_transceiver_disable:</div><div class='add'>+	flexcan_transceiver_disable(priv);</div><div class='add'>+ out_close:</div><div class='add'>+	close_candev(dev);</div><div class='add'>+ out_runtime_put:</div><div class='add'>+	pm_runtime_put(priv-&gt;dev);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int flexcan_close(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct flexcan_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(dev);</div><div class='add'>+	flexcan_chip_interrupts_disable(dev);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_SECONDARY_MB_IRQ)</div><div class='add'>+		free_irq(priv-&gt;irq_secondary_mb, dev);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_NR_IRQ_3) {</div><div class='add'>+		free_irq(priv-&gt;irq_err, dev);</div><div class='add'>+		free_irq(priv-&gt;irq_boff, dev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	free_irq(dev-&gt;irq, dev);</div><div class='add'>+	can_rx_offload_disable(&amp;priv-&gt;offload);</div><div class='add'>+	flexcan_chip_stop_disable_on_error(dev);</div><div class='add'>+</div><div class='add'>+	can_rx_offload_del(&amp;priv-&gt;offload);</div><div class='add'>+	flexcan_transceiver_disable(priv);</div><div class='add'>+	close_candev(dev);</div><div class='add'>+</div><div class='add'>+	pm_runtime_put(priv-&gt;dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int flexcan_set_mode(struct net_device *dev, enum can_mode mode)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case CAN_MODE_START:</div><div class='add'>+		err = flexcan_chip_start(dev);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		flexcan_chip_interrupts_enable(dev);</div><div class='add'>+</div><div class='add'>+		netif_wake_queue(dev);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops flexcan_netdev_ops = {</div><div class='add'>+	.ndo_open	= flexcan_open,</div><div class='add'>+	.ndo_stop	= flexcan_close,</div><div class='add'>+	.ndo_start_xmit	= flexcan_start_xmit,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int register_flexcandev(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct flexcan_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct flexcan_regs __iomem *regs = priv-&gt;regs;</div><div class='add'>+	u32 reg, err;</div><div class='add'>+</div><div class='add'>+	err = flexcan_clks_enable(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* select "bus clock", chip must be disabled */</div><div class='add'>+	err = flexcan_chip_disable(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_clks_disable;</div><div class='add'>+</div><div class='add'>+	reg = priv-&gt;read(&amp;regs-&gt;ctrl);</div><div class='add'>+	if (priv-&gt;clk_src)</div><div class='add'>+		reg |= FLEXCAN_CTRL_CLK_SRC;</div><div class='add'>+	else</div><div class='add'>+		reg &amp;= ~FLEXCAN_CTRL_CLK_SRC;</div><div class='add'>+	priv-&gt;write(reg, &amp;regs-&gt;ctrl);</div><div class='add'>+</div><div class='add'>+	err = flexcan_chip_enable(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_chip_disable;</div><div class='add'>+</div><div class='add'>+	/* set freeze, halt */</div><div class='add'>+	err = flexcan_chip_freeze(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_chip_disable;</div><div class='add'>+</div><div class='add'>+	/* activate FIFO, restrict register access */</div><div class='add'>+	reg = priv-&gt;read(&amp;regs-&gt;mcr);</div><div class='add'>+	reg |=  FLEXCAN_MCR_FEN | FLEXCAN_MCR_SUPV;</div><div class='add'>+	priv-&gt;write(reg, &amp;regs-&gt;mcr);</div><div class='add'>+</div><div class='add'>+	/* Currently we only support newer versions of this core</div><div class='add'>+	 * featuring a RX hardware FIFO (although this driver doesn't</div><div class='add'>+	 * make use of it on some cores). Older cores, found on some</div><div class='add'>+	 * Coldfire derivates are not tested.</div><div class='add'>+	 */</div><div class='add'>+	reg = priv-&gt;read(&amp;regs-&gt;mcr);</div><div class='add'>+	if (!(reg &amp; FLEXCAN_MCR_FEN)) {</div><div class='add'>+		netdev_err(dev, "Could not enable RX FIFO, unsupported core\n");</div><div class='add'>+		err = -ENODEV;</div><div class='add'>+		goto out_chip_disable;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = register_candev(dev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_chip_disable;</div><div class='add'>+</div><div class='add'>+	/* Disable core and let pm_runtime_put() disable the clocks.</div><div class='add'>+	 * If CONFIG_PM is not enabled, the clocks will stay powered.</div><div class='add'>+	 */</div><div class='add'>+	flexcan_chip_disable(priv);</div><div class='add'>+	pm_runtime_put(priv-&gt;dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+ out_chip_disable:</div><div class='add'>+	flexcan_chip_disable(priv);</div><div class='add'>+ out_clks_disable:</div><div class='add'>+	flexcan_clks_disable(priv);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void unregister_flexcandev(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	unregister_candev(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int flexcan_setup_stop_mode_gpr(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = platform_get_drvdata(pdev);</div><div class='add'>+	struct device_node *np = pdev-&gt;dev.of_node;</div><div class='add'>+	struct device_node *gpr_np;</div><div class='add'>+	struct flexcan_priv *priv;</div><div class='add'>+	phandle phandle;</div><div class='add'>+	u32 out_val[3];</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!np)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* stop mode property format is:</div><div class='add'>+	 * &lt;&amp;gpr req_gpr req_bit&gt;.</div><div class='add'>+	 */</div><div class='add'>+	ret = of_property_read_u32_array(np, "fsl,stop-mode", out_val,</div><div class='add'>+					 ARRAY_SIZE(out_val));</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_dbg(&amp;pdev-&gt;dev, "no stop-mode property\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	phandle = *out_val;</div><div class='add'>+</div><div class='add'>+	gpr_np = of_find_node_by_phandle(phandle);</div><div class='add'>+	if (!gpr_np) {</div><div class='add'>+		dev_dbg(&amp;pdev-&gt;dev, "could not find gpr node by phandle\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv = netdev_priv(dev);</div><div class='add'>+	priv-&gt;stm.gpr = syscon_node_to_regmap(gpr_np);</div><div class='add'>+	if (IS_ERR(priv-&gt;stm.gpr)) {</div><div class='add'>+		dev_dbg(&amp;pdev-&gt;dev, "could not find gpr regmap\n");</div><div class='add'>+		ret = PTR_ERR(priv-&gt;stm.gpr);</div><div class='add'>+		goto out_put_node;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;stm.req_gpr = out_val[1];</div><div class='add'>+	priv-&gt;stm.req_bit = out_val[2];</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;pdev-&gt;dev,</div><div class='add'>+		"gpr %s req_gpr=0x02%x req_bit=%u\n",</div><div class='add'>+		gpr_np-&gt;full_name, priv-&gt;stm.req_gpr, priv-&gt;stm.req_bit);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_put_node:</div><div class='add'>+	of_node_put(gpr_np);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int flexcan_setup_stop_mode_scfw(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = platform_get_drvdata(pdev);</div><div class='add'>+	struct flexcan_priv *priv;</div><div class='add'>+	u8 scu_idx;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = of_property_read_u8(pdev-&gt;dev.of_node, "fsl,scu-index", &amp;scu_idx);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_dbg(&amp;pdev-&gt;dev, "failed to get scu index\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv = netdev_priv(dev);</div><div class='add'>+	priv-&gt;scu_idx = scu_idx;</div><div class='add'>+</div><div class='add'>+	/* this function could be deferred probe, return -EPROBE_DEFER */</div><div class='add'>+	return imx_scu_get_handle(&amp;priv-&gt;sc_ipc_handle);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* flexcan_setup_stop_mode - Setup stop mode for wakeup</div><div class='add'>+ *</div><div class='add'>+ * Return: = 0 setup stop mode successfully or doesn't support this feature</div><div class='add'>+ *         &lt; 0 fail to setup stop mode (could be deferred probe)</div><div class='add'>+ */</div><div class='add'>+static int flexcan_setup_stop_mode(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = platform_get_drvdata(pdev);</div><div class='add'>+	struct flexcan_priv *priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_SETUP_STOP_MODE_SCFW)</div><div class='add'>+		ret = flexcan_setup_stop_mode_scfw(pdev);</div><div class='add'>+	else if (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_SETUP_STOP_MODE_GPR)</div><div class='add'>+		ret = flexcan_setup_stop_mode_gpr(pdev);</div><div class='add'>+	else if (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_SETUP_STOP_MODE_SCMI)</div><div class='add'>+		/* ATF will handle all STOP_IPG related work */</div><div class='add'>+		ret = 0;</div><div class='add'>+	else</div><div class='add'>+		/* return 0 directly if doesn't support stop mode feature */</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* If ret is -EINVAL, this means SoC claim to support stop mode, but</div><div class='add'>+	 * dts file lack the stop mode property definition. For this case,</div><div class='add'>+	 * directly return 0, this will skip the wakeup capable setting and</div><div class='add'>+	 * will not block the driver probe.</div><div class='add'>+	 */</div><div class='add'>+	if (ret == -EINVAL)</div><div class='add'>+		return 0;</div><div class='add'>+	else if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	device_set_wakeup_capable(&amp;pdev-&gt;dev, true);</div><div class='add'>+</div><div class='add'>+	if (of_property_read_bool(pdev-&gt;dev.of_node, "wakeup-source"))</div><div class='add'>+		device_set_wakeup_enable(&amp;pdev-&gt;dev, true);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id flexcan_of_match[] = {</div><div class='add'>+	{ .compatible = "fsl,imx8qm-flexcan", .data = &amp;fsl_imx8qm_devtype_data, },</div><div class='add'>+	{ .compatible = "fsl,imx8mp-flexcan", .data = &amp;fsl_imx8mp_devtype_data, },</div><div class='add'>+	{ .compatible = "fsl,imx93-flexcan", .data = &amp;fsl_imx93_devtype_data, },</div><div class='add'>+	{ .compatible = "fsl,imx95-flexcan", .data = &amp;fsl_imx95_devtype_data, },</div><div class='add'>+	{ .compatible = "fsl,imx6q-flexcan", .data = &amp;fsl_imx6q_devtype_data, },</div><div class='add'>+	{ .compatible = "fsl,imx28-flexcan", .data = &amp;fsl_imx28_devtype_data, },</div><div class='add'>+	{ .compatible = "fsl,imx53-flexcan", .data = &amp;fsl_imx25_devtype_data, },</div><div class='add'>+	{ .compatible = "fsl,imx35-flexcan", .data = &amp;fsl_imx25_devtype_data, },</div><div class='add'>+	{ .compatible = "fsl,imx25-flexcan", .data = &amp;fsl_imx25_devtype_data, },</div><div class='add'>+	{ .compatible = "fsl,p1010-flexcan", .data = &amp;fsl_p1010_devtype_data, },</div><div class='add'>+	{ .compatible = "fsl,vf610-flexcan", .data = &amp;fsl_vf610_devtype_data, },</div><div class='add'>+	{ .compatible = "fsl,ls1021ar2-flexcan", .data = &amp;fsl_ls1021a_r2_devtype_data, },</div><div class='add'>+	{ .compatible = "fsl,lx2160ar1-flexcan", .data = &amp;fsl_lx2160a_r1_devtype_data, },</div><div class='add'>+	{ .compatible = "nxp,s32g2-flexcan", .data = &amp;nxp_s32g2_devtype_data, },</div><div class='add'>+	{ /* sentinel */ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, flexcan_of_match);</div><div class='add'>+</div><div class='add'>+static const struct platform_device_id flexcan_id_table[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "flexcan-mcf5441x",</div><div class='add'>+		.driver_data = (kernel_ulong_t)&amp;fsl_mcf5441x_devtype_data,</div><div class='add'>+	}, {</div><div class='add'>+		/* sentinel */</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(platform, flexcan_id_table);</div><div class='add'>+</div><div class='add'>+static int flexcan_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	const struct flexcan_devtype_data *devtype_data;</div><div class='add'>+	struct net_device *dev;</div><div class='add'>+	struct flexcan_priv *priv;</div><div class='add'>+	struct regulator *reg_xceiver;</div><div class='add'>+	struct phy *transceiver;</div><div class='add'>+	struct clk *clk_ipg = NULL, *clk_per = NULL;</div><div class='add'>+	struct flexcan_regs __iomem *regs;</div><div class='add'>+	struct flexcan_platform_data *pdata;</div><div class='add'>+	int err, irq;</div><div class='add'>+	u8 clk_src = 1;</div><div class='add'>+	u32 clock_freq = 0;</div><div class='add'>+</div><div class='add'>+	reg_xceiver = devm_regulator_get_optional(&amp;pdev-&gt;dev, "xceiver");</div><div class='add'>+	if (PTR_ERR(reg_xceiver) == -EPROBE_DEFER)</div><div class='add'>+		return -EPROBE_DEFER;</div><div class='add'>+	else if (PTR_ERR(reg_xceiver) == -ENODEV)</div><div class='add'>+		reg_xceiver = NULL;</div><div class='add'>+	else if (IS_ERR(reg_xceiver))</div><div class='add'>+		return PTR_ERR(reg_xceiver);</div><div class='add'>+</div><div class='add'>+	transceiver = devm_phy_optional_get(&amp;pdev-&gt;dev, NULL);</div><div class='add'>+	if (IS_ERR(transceiver))</div><div class='add'>+		return dev_err_probe(&amp;pdev-&gt;dev, PTR_ERR(transceiver),</div><div class='add'>+				     "failed to get phy\n");</div><div class='add'>+</div><div class='add'>+	if (pdev-&gt;dev.of_node) {</div><div class='add'>+		of_property_read_u32(pdev-&gt;dev.of_node,</div><div class='add'>+				     "clock-frequency", &amp;clock_freq);</div><div class='add'>+		of_property_read_u8(pdev-&gt;dev.of_node,</div><div class='add'>+				    "fsl,clk-source", &amp;clk_src);</div><div class='add'>+	} else {</div><div class='add'>+		pdata = dev_get_platdata(&amp;pdev-&gt;dev);</div><div class='add'>+		if (pdata) {</div><div class='add'>+			clock_freq = pdata-&gt;clock_frequency;</div><div class='add'>+			clk_src = pdata-&gt;clk_src;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!clock_freq) {</div><div class='add'>+		clk_ipg = devm_clk_get(&amp;pdev-&gt;dev, "ipg");</div><div class='add'>+		if (IS_ERR(clk_ipg)) {</div><div class='add'>+			dev_err(&amp;pdev-&gt;dev, "no ipg clock defined\n");</div><div class='add'>+			return PTR_ERR(clk_ipg);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		clk_per = devm_clk_get(&amp;pdev-&gt;dev, "per");</div><div class='add'>+		if (IS_ERR(clk_per)) {</div><div class='add'>+			dev_err(&amp;pdev-&gt;dev, "no per clock defined\n");</div><div class='add'>+			return PTR_ERR(clk_per);</div><div class='add'>+		}</div><div class='add'>+		clock_freq = clk_get_rate(clk_per);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	irq = platform_get_irq(pdev, 0);</div><div class='add'>+	if (irq &lt; 0)</div><div class='add'>+		return irq;</div><div class='add'>+</div><div class='add'>+	regs = devm_platform_ioremap_resource(pdev, 0);</div><div class='add'>+	if (IS_ERR(regs))</div><div class='add'>+		return PTR_ERR(regs);</div><div class='add'>+</div><div class='add'>+	devtype_data = device_get_match_data(&amp;pdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	if ((devtype_data-&gt;quirks &amp; FLEXCAN_QUIRK_SUPPORT_FD) &amp;&amp;</div><div class='add'>+	    !((devtype_data-&gt;quirks &amp;</div><div class='add'>+	       (FLEXCAN_QUIRK_USE_RX_MAILBOX |</div><div class='add'>+		FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX |</div><div class='add'>+		FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX_RTR |</div><div class='add'>+		FLEXCAN_QUIRK_SUPPORT_RX_FIFO)) ==</div><div class='add'>+	      (FLEXCAN_QUIRK_USE_RX_MAILBOX |</div><div class='add'>+	       FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX |</div><div class='add'>+	       FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX_RTR))) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "CAN-FD mode doesn't work in RX-FIFO mode!\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((devtype_data-&gt;quirks &amp;</div><div class='add'>+	     (FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX |</div><div class='add'>+	      FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX_RTR)) ==</div><div class='add'>+	    FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX_RTR) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+			"Quirks (0x%08x) inconsistent: RX_MAILBOX_RX supported but not RX_MAILBOX\n",</div><div class='add'>+			devtype_data-&gt;quirks);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev = alloc_candev(sizeof(struct flexcan_priv), 1);</div><div class='add'>+	if (!dev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, dev);</div><div class='add'>+	SET_NETDEV_DEV(dev, &amp;pdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	dev-&gt;netdev_ops = &amp;flexcan_netdev_ops;</div><div class='add'>+	dev-&gt;ethtool_ops = &amp;flexcan_ethtool_ops;</div><div class='add'>+	dev-&gt;irq = irq;</div><div class='add'>+	dev-&gt;flags |= IFF_ECHO;</div><div class='add'>+</div><div class='add'>+	priv = netdev_priv(dev);</div><div class='add'>+	priv-&gt;devtype_data = *devtype_data;</div><div class='add'>+</div><div class='add'>+	if (of_property_read_bool(pdev-&gt;dev.of_node, "big-endian") ||</div><div class='add'>+	    priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_DEFAULT_BIG_ENDIAN) {</div><div class='add'>+		priv-&gt;read = flexcan_read_be;</div><div class='add'>+		priv-&gt;write = flexcan_write_be;</div><div class='add'>+	} else {</div><div class='add'>+		priv-&gt;read = flexcan_read_le;</div><div class='add'>+		priv-&gt;write = flexcan_write_le;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;dev = &amp;pdev-&gt;dev;</div><div class='add'>+	priv-&gt;can.clock.freq = clock_freq;</div><div class='add'>+	priv-&gt;can.do_set_mode = flexcan_set_mode;</div><div class='add'>+	priv-&gt;can.do_get_berr_counter = flexcan_get_berr_counter;</div><div class='add'>+	priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK |</div><div class='add'>+		CAN_CTRLMODE_LISTENONLY	| CAN_CTRLMODE_3_SAMPLES |</div><div class='add'>+		CAN_CTRLMODE_BERR_REPORTING;</div><div class='add'>+	priv-&gt;regs = regs;</div><div class='add'>+	priv-&gt;clk_ipg = clk_ipg;</div><div class='add'>+	priv-&gt;clk_per = clk_per;</div><div class='add'>+	priv-&gt;clk_src = clk_src;</div><div class='add'>+	priv-&gt;reg_xceiver = reg_xceiver;</div><div class='add'>+	priv-&gt;transceiver = transceiver;</div><div class='add'>+</div><div class='add'>+	if (transceiver)</div><div class='add'>+		priv-&gt;can.bitrate_max = transceiver-&gt;attrs.max_link_rate;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_NR_IRQ_3) {</div><div class='add'>+		priv-&gt;irq_boff = platform_get_irq(pdev, 1);</div><div class='add'>+		if (priv-&gt;irq_boff &lt; 0) {</div><div class='add'>+			err = priv-&gt;irq_boff;</div><div class='add'>+			goto failed_platform_get_irq;</div><div class='add'>+		}</div><div class='add'>+		priv-&gt;irq_err = platform_get_irq(pdev, 2);</div><div class='add'>+		if (priv-&gt;irq_err &lt; 0) {</div><div class='add'>+			err = priv-&gt;irq_err;</div><div class='add'>+			goto failed_platform_get_irq;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_SECONDARY_MB_IRQ) {</div><div class='add'>+		priv-&gt;irq_secondary_mb = platform_get_irq_byname(pdev, "mb-1");</div><div class='add'>+		if (priv-&gt;irq_secondary_mb &lt; 0) {</div><div class='add'>+			err = priv-&gt;irq_secondary_mb;</div><div class='add'>+			goto failed_platform_get_irq;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_SUPPORT_FD) {</div><div class='add'>+		priv-&gt;can.ctrlmode_supported |= CAN_CTRLMODE_FD |</div><div class='add'>+			CAN_CTRLMODE_FD_NON_ISO;</div><div class='add'>+		priv-&gt;can.bittiming_const = &amp;flexcan_fd_bittiming_const;</div><div class='add'>+		priv-&gt;can.fd.data_bittiming_const =</div><div class='add'>+			&amp;flexcan_fd_data_bittiming_const;</div><div class='add'>+	} else {</div><div class='add'>+		priv-&gt;can.bittiming_const = &amp;flexcan_bittiming_const;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pm_runtime_get_noresume(&amp;pdev-&gt;dev);</div><div class='add'>+	pm_runtime_set_active(&amp;pdev-&gt;dev);</div><div class='add'>+	pm_runtime_enable(&amp;pdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	err = register_flexcandev(dev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "registering netdev failed\n");</div><div class='add'>+		goto failed_register;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = flexcan_setup_stop_mode(pdev);</div><div class='add'>+	if (err &lt; 0) {</div><div class='add'>+		dev_err_probe(&amp;pdev-&gt;dev, err, "setup stop mode failed\n");</div><div class='add'>+		goto failed_setup_stop_mode;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	of_can_transceiver(dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+ failed_setup_stop_mode:</div><div class='add'>+	unregister_flexcandev(dev);</div><div class='add'>+ failed_register:</div><div class='add'>+	pm_runtime_put_noidle(&amp;pdev-&gt;dev);</div><div class='add'>+	pm_runtime_disable(&amp;pdev-&gt;dev);</div><div class='add'>+ failed_platform_get_irq:</div><div class='add'>+	free_candev(dev);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void flexcan_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	device_set_wakeup_enable(&amp;pdev-&gt;dev, false);</div><div class='add'>+	device_set_wakeup_capable(&amp;pdev-&gt;dev, false);</div><div class='add'>+	unregister_flexcandev(dev);</div><div class='add'>+	pm_runtime_disable(&amp;pdev-&gt;dev);</div><div class='add'>+	free_candev(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __maybe_unused flexcan_suspend(struct device *device)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = dev_get_drvdata(device);</div><div class='add'>+	struct flexcan_priv *priv = netdev_priv(dev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (netif_running(dev)) {</div><div class='add'>+		/* if wakeup is enabled, enter stop mode</div><div class='add'>+		 * else enter disabled mode.</div><div class='add'>+		 */</div><div class='add'>+		if (device_may_wakeup(device)) {</div><div class='add'>+			enable_irq_wake(dev-&gt;irq);</div><div class='add'>+			err = flexcan_enter_stop_mode(priv);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+		} else {</div><div class='add'>+			err = flexcan_chip_stop(dev);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+</div><div class='add'>+			flexcan_chip_interrupts_disable(dev);</div><div class='add'>+</div><div class='add'>+			err = flexcan_transceiver_disable(priv);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+</div><div class='add'>+			err = pinctrl_pm_select_sleep_state(device);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+		}</div><div class='add'>+		netif_stop_queue(dev);</div><div class='add'>+		netif_device_detach(dev);</div><div class='add'>+</div><div class='add'>+		priv-&gt;can.state = CAN_STATE_SLEEPING;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __maybe_unused flexcan_resume(struct device *device)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = dev_get_drvdata(device);</div><div class='add'>+	struct flexcan_priv *priv = netdev_priv(dev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (netif_running(dev)) {</div><div class='add'>+		netif_device_attach(dev);</div><div class='add'>+		netif_start_queue(dev);</div><div class='add'>+		if (device_may_wakeup(device)) {</div><div class='add'>+			disable_irq_wake(dev-&gt;irq);</div><div class='add'>+			err = flexcan_exit_stop_mode(priv);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+		} else {</div><div class='add'>+			err = pinctrl_pm_select_default_state(device);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+</div><div class='add'>+			err = flexcan_transceiver_enable(priv);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+</div><div class='add'>+			err = flexcan_chip_start(dev);</div><div class='add'>+			if (err) {</div><div class='add'>+				flexcan_transceiver_disable(priv);</div><div class='add'>+				return err;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			flexcan_chip_interrupts_enable(dev);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __maybe_unused flexcan_runtime_suspend(struct device *device)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = dev_get_drvdata(device);</div><div class='add'>+	struct flexcan_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	flexcan_clks_disable(priv);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __maybe_unused flexcan_runtime_resume(struct device *device)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = dev_get_drvdata(device);</div><div class='add'>+	struct flexcan_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	return flexcan_clks_enable(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __maybe_unused flexcan_noirq_suspend(struct device *device)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = dev_get_drvdata(device);</div><div class='add'>+	struct flexcan_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	if (netif_running(dev)) {</div><div class='add'>+		int err;</div><div class='add'>+</div><div class='add'>+		if (device_may_wakeup(device))</div><div class='add'>+			flexcan_enable_wakeup_irq(priv, true);</div><div class='add'>+</div><div class='add'>+		/* For FLEXCAN_QUIRK_SETUP_STOP_MODE_SCMI, it need ATF to send</div><div class='add'>+		 * to SM through SCMI protocol, SM will assert the IPG_STOP</div><div class='add'>+		 * signal. But all this works need the CAN clocks keep on.</div><div class='add'>+		 * After the CAN module get the IPG_STOP mode, and switch to</div><div class='add'>+		 * STOP mode, whether still keep the CAN clocks on or gate them</div><div class='add'>+		 * off depend on the Hardware design.</div><div class='add'>+		 */</div><div class='add'>+		if (!(device_may_wakeup(device) &amp;&amp;</div><div class='add'>+		      priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_SETUP_STOP_MODE_SCMI)) {</div><div class='add'>+			err = pm_runtime_force_suspend(device);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __maybe_unused flexcan_noirq_resume(struct device *device)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = dev_get_drvdata(device);</div><div class='add'>+	struct flexcan_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	if (netif_running(dev)) {</div><div class='add'>+		int err;</div><div class='add'>+</div><div class='add'>+		if (!(device_may_wakeup(device) &amp;&amp;</div><div class='add'>+		      priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_SETUP_STOP_MODE_SCMI)) {</div><div class='add'>+			err = pm_runtime_force_resume(device);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (device_may_wakeup(device))</div><div class='add'>+			flexcan_enable_wakeup_irq(priv, false);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct dev_pm_ops flexcan_pm_ops = {</div><div class='add'>+	SET_SYSTEM_SLEEP_PM_OPS(flexcan_suspend, flexcan_resume)</div><div class='add'>+	SET_RUNTIME_PM_OPS(flexcan_runtime_suspend, flexcan_runtime_resume, NULL)</div><div class='add'>+	SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(flexcan_noirq_suspend, flexcan_noirq_resume)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_driver flexcan_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = DRV_NAME,</div><div class='add'>+		.pm = &amp;flexcan_pm_ops,</div><div class='add'>+		.of_match_table = flexcan_of_match,</div><div class='add'>+	},</div><div class='add'>+	.probe = flexcan_probe,</div><div class='add'>+	.remove = flexcan_remove,</div><div class='add'>+	.id_table = flexcan_id_table,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_platform_driver(flexcan_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Sascha Hauer &lt;kernel@pengutronix.de&gt;, "</div><div class='add'>+	      "Marc Kleine-Budde &lt;kernel@pengutronix.de&gt;");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='add'>+MODULE_DESCRIPTION("CAN port driver for flexcan based chip");</div><div class='head'>diff --git a/drivers/net/can/flexcan/flexcan-ethtool.c b/drivers/net/can/flexcan/flexcan-ethtool.c<br/>new file mode 100644<br/>index 000000000000..50e86b2da532<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/flexcan/flexcan-ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/flexcan/flexcan-ethtool.c</a></div><div class='hunk'>@@ -0,0 +1,110 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+/* Copyright (c) 2022 Amarula Solutions, Dario Binacchi &lt;dario.binacchi@amarulasolutions.com&gt;</div><div class='add'>+ * Copyright (c) 2022 Pengutronix, Marc Kleine-Budde &lt;kernel@pengutronix.de&gt;</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+</div><div class='add'>+#include "flexcan.h"</div><div class='add'>+</div><div class='add'>+static const char flexcan_priv_flags_strings[][ETH_GSTRING_LEN] = {</div><div class='add'>+#define FLEXCAN_PRIV_FLAGS_RX_RTR BIT(0)</div><div class='add'>+	"rx-rtr",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+flexcan_get_ringparam(struct net_device *ndev, struct ethtool_ringparam *ring,</div><div class='add'>+		      struct kernel_ethtool_ringparam *kernel_ring,</div><div class='add'>+		      struct netlink_ext_ack *ext_ack)</div><div class='add'>+{</div><div class='add'>+	const struct flexcan_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	ring-&gt;rx_max_pending = priv-&gt;mb_count;</div><div class='add'>+	ring-&gt;tx_max_pending = priv-&gt;mb_count;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; FLEXCAN_QUIRK_USE_RX_MAILBOX)</div><div class='add'>+		ring-&gt;rx_pending = priv-&gt;offload.mb_last -</div><div class='add'>+			priv-&gt;offload.mb_first + 1;</div><div class='add'>+	else</div><div class='add'>+		ring-&gt;rx_pending = 6;	/* RX-FIFO depth is fixed */</div><div class='add'>+</div><div class='add'>+	/* the drive currently supports only on TX buffer */</div><div class='add'>+	ring-&gt;tx_pending = 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+flexcan_get_strings(struct net_device *ndev, u32 stringset, u8 *data)</div><div class='add'>+{</div><div class='add'>+	switch (stringset) {</div><div class='add'>+	case ETH_SS_PRIV_FLAGS:</div><div class='add'>+		memcpy(data, flexcan_priv_flags_strings,</div><div class='add'>+		       sizeof(flexcan_priv_flags_strings));</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 flexcan_get_priv_flags(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	const struct flexcan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	u32 priv_flags = 0;</div><div class='add'>+</div><div class='add'>+	if (flexcan_active_rx_rtr(priv))</div><div class='add'>+		priv_flags |= FLEXCAN_PRIV_FLAGS_RX_RTR;</div><div class='add'>+</div><div class='add'>+	return priv_flags;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int flexcan_set_priv_flags(struct net_device *ndev, u32 priv_flags)</div><div class='add'>+{</div><div class='add'>+	struct flexcan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	u32 quirks = priv-&gt;devtype_data.quirks;</div><div class='add'>+</div><div class='add'>+	if (priv_flags &amp; FLEXCAN_PRIV_FLAGS_RX_RTR) {</div><div class='add'>+		if (flexcan_supports_rx_mailbox_rtr(priv))</div><div class='add'>+			quirks |= FLEXCAN_QUIRK_USE_RX_MAILBOX;</div><div class='add'>+		else if (flexcan_supports_rx_fifo(priv))</div><div class='add'>+			quirks &amp;= ~FLEXCAN_QUIRK_USE_RX_MAILBOX;</div><div class='add'>+		else</div><div class='add'>+			quirks |= FLEXCAN_QUIRK_USE_RX_MAILBOX;</div><div class='add'>+	} else {</div><div class='add'>+		if (flexcan_supports_rx_mailbox(priv))</div><div class='add'>+			quirks |= FLEXCAN_QUIRK_USE_RX_MAILBOX;</div><div class='add'>+		else</div><div class='add'>+			quirks &amp;= ~FLEXCAN_QUIRK_USE_RX_MAILBOX;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (quirks != priv-&gt;devtype_data.quirks &amp;&amp; netif_running(ndev))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	priv-&gt;devtype_data.quirks = quirks;</div><div class='add'>+</div><div class='add'>+	if (!(priv_flags &amp; FLEXCAN_PRIV_FLAGS_RX_RTR) &amp;&amp;</div><div class='add'>+	    !flexcan_active_rx_rtr(priv))</div><div class='add'>+		netdev_info(ndev,</div><div class='add'>+			    "Activating RX mailbox mode, cannot receive RTR frames.\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int flexcan_get_sset_count(struct net_device *netdev, int sset)</div><div class='add'>+{</div><div class='add'>+	switch (sset) {</div><div class='add'>+	case ETH_SS_PRIV_FLAGS:</div><div class='add'>+		return ARRAY_SIZE(flexcan_priv_flags_strings);</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct ethtool_ops flexcan_ethtool_ops = {</div><div class='add'>+	.get_ringparam = flexcan_get_ringparam,</div><div class='add'>+	.get_strings = flexcan_get_strings,</div><div class='add'>+	.get_priv_flags = flexcan_get_priv_flags,</div><div class='add'>+	.set_priv_flags = flexcan_set_priv_flags,</div><div class='add'>+	.get_sset_count = flexcan_get_sset_count,</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/net/can/flexcan/flexcan.h b/drivers/net/can/flexcan/flexcan.h<br/>new file mode 100644<br/>index 000000000000..16692a2502eb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/flexcan/flexcan.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/flexcan/flexcan.h</a></div><div class='hunk'>@@ -0,0 +1,171 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0</div><div class='add'>+ * flexcan.c - FLEXCAN CAN controller driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2005-2006 Varma Electronics Oy</div><div class='add'>+ * Copyright (c) 2009 Sascha Hauer, Pengutronix</div><div class='add'>+ * Copyright (c) 2010-2017 Pengutronix, Marc Kleine-Budde &lt;kernel@pengutronix.de&gt;</div><div class='add'>+ * Copyright (c) 2014 David Jander, Protonic Holland</div><div class='add'>+ * Copyright (C) 2022 Amarula Solutions, Dario Binacchi &lt;dario.binacchi@amarulasolutions.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Based on code originally by Andrey Volkov &lt;avolkov@varma-el.com&gt;</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _FLEXCAN_H</div><div class='add'>+#define _FLEXCAN_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/can/rx-offload.h&gt;</div><div class='add'>+</div><div class='add'>+/* FLEXCAN hardware feature flags</div><div class='add'>+ *</div><div class='add'>+ * Below is some version info we got:</div><div class='add'>+ *    SOC   Version   IP-Version  Glitch- [TR]WRN_INT IRQ Err Memory err RTR rece-   FD Mode     MB</div><div class='add'>+ *                                Filter? connected?  Passive detection  ption in MB Supported?</div><div class='add'>+ * MCF5441X FlexCAN2  ?               no       yes        no       no        no           no     16</div><div class='add'>+ *    MX25  FlexCAN2  03.00.00.00     no        no        no       no        no           no     64</div><div class='add'>+ *    MX28  FlexCAN2  03.00.04.00    yes       yes        no       no        no           no     64</div><div class='add'>+ *    MX35  FlexCAN2  03.00.00.00     no        no        no       no        no           no     64</div><div class='add'>+ *    MX53  FlexCAN2  03.00.00.00    yes        no        no       no        no           no     64</div><div class='add'>+ *    MX6s  FlexCAN3  10.00.12.00    yes       yes        no       no       yes           no     64</div><div class='add'>+ *    MX8QM FlexCAN3  03.00.23.00    yes       yes        no       no       yes          yes     64</div><div class='add'>+ *    MX8MP FlexCAN3  03.00.17.01    yes       yes        no      yes       yes          yes     64</div><div class='add'>+ *    VF610 FlexCAN3  ?               no       yes        no      yes       yes?          no     64</div><div class='add'>+ *  LS1021A FlexCAN2  03.00.04.00     no       yes        no       no       yes           no     64</div><div class='add'>+ *  LX2160A FlexCAN3  03.00.23.00     no       yes        no      yes       yes          yes     64</div><div class='add'>+ *</div><div class='add'>+ * Some SOCs do not have the RX_WARN &amp; TX_WARN interrupt line connected.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* [TR]WRN_INT not connected */</div><div class='add'>+#define FLEXCAN_QUIRK_BROKEN_WERR_STATE BIT(1)</div><div class='add'>+ /* Disable RX FIFO Global mask */</div><div class='add'>+#define FLEXCAN_QUIRK_DISABLE_RXFG BIT(2)</div><div class='add'>+/* Enable EACEN and RRS bit in ctrl2 */</div><div class='add'>+#define FLEXCAN_QUIRK_ENABLE_EACEN_RRS  BIT(3)</div><div class='add'>+/* Disable non-correctable errors interrupt and freeze mode */</div><div class='add'>+#define FLEXCAN_QUIRK_DISABLE_MECR BIT(4)</div><div class='add'>+/* Use mailboxes (not FIFO) for RX path */</div><div class='add'>+#define FLEXCAN_QUIRK_USE_RX_MAILBOX BIT(5)</div><div class='add'>+/* No interrupt for error passive */</div><div class='add'>+#define FLEXCAN_QUIRK_BROKEN_PERR_STATE BIT(6)</div><div class='add'>+/* default to BE register access */</div><div class='add'>+#define FLEXCAN_QUIRK_DEFAULT_BIG_ENDIAN BIT(7)</div><div class='add'>+/* Setup stop mode with GPR to support wakeup */</div><div class='add'>+#define FLEXCAN_QUIRK_SETUP_STOP_MODE_GPR BIT(8)</div><div class='add'>+/* Support CAN-FD mode */</div><div class='add'>+#define FLEXCAN_QUIRK_SUPPORT_FD BIT(9)</div><div class='add'>+/* support memory detection and correction */</div><div class='add'>+#define FLEXCAN_QUIRK_SUPPORT_ECC BIT(10)</div><div class='add'>+/* Setup stop mode with SCU firmware to support wakeup */</div><div class='add'>+#define FLEXCAN_QUIRK_SETUP_STOP_MODE_SCFW BIT(11)</div><div class='add'>+/* Setup 3 separate interrupts, main, boff and err */</div><div class='add'>+#define FLEXCAN_QUIRK_NR_IRQ_3 BIT(12)</div><div class='add'>+/* Setup 16 mailboxes */</div><div class='add'>+#define FLEXCAN_QUIRK_NR_MB_16 BIT(13)</div><div class='add'>+/* Device supports RX via mailboxes */</div><div class='add'>+#define FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX BIT(14)</div><div class='add'>+/* Device supports RTR reception via mailboxes */</div><div class='add'>+#define FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX_RTR BIT(15)</div><div class='add'>+/* Device supports RX via FIFO */</div><div class='add'>+#define FLEXCAN_QUIRK_SUPPORT_RX_FIFO BIT(16)</div><div class='add'>+/* Setup stop mode with ATF SCMI protocol to support wakeup */</div><div class='add'>+#define FLEXCAN_QUIRK_SETUP_STOP_MODE_SCMI BIT(17)</div><div class='add'>+/* Device has two separate interrupt lines for two mailbox ranges, which</div><div class='add'>+ * both need to have an interrupt handler registered.</div><div class='add'>+ */</div><div class='add'>+#define FLEXCAN_QUIRK_SECONDARY_MB_IRQ	BIT(18)</div><div class='add'>+</div><div class='add'>+struct flexcan_devtype_data {</div><div class='add'>+	u32 quirks;		/* quirks needed for different IP cores */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct flexcan_stop_mode {</div><div class='add'>+	struct regmap *gpr;</div><div class='add'>+	u8 req_gpr;</div><div class='add'>+	u8 req_bit;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct flexcan_priv {</div><div class='add'>+	struct can_priv can;</div><div class='add'>+	struct can_rx_offload offload;</div><div class='add'>+	struct device *dev;</div><div class='add'>+</div><div class='add'>+	struct flexcan_regs __iomem *regs;</div><div class='add'>+	struct flexcan_mb __iomem *tx_mb;</div><div class='add'>+	struct flexcan_mb __iomem *tx_mb_reserved;</div><div class='add'>+	u8 tx_mb_idx;</div><div class='add'>+	u8 mb_count;</div><div class='add'>+	u8 mb_size;</div><div class='add'>+	u8 clk_src;	/* clock source of CAN Protocol Engine */</div><div class='add'>+	u8 scu_idx;</div><div class='add'>+</div><div class='add'>+	u64 rx_mask;</div><div class='add'>+	u64 tx_mask;</div><div class='add'>+	u32 reg_ctrl_default;</div><div class='add'>+</div><div class='add'>+	struct clk *clk_ipg;</div><div class='add'>+	struct clk *clk_per;</div><div class='add'>+	struct flexcan_devtype_data devtype_data;</div><div class='add'>+	struct regulator *reg_xceiver;</div><div class='add'>+	struct phy *transceiver;</div><div class='add'>+	struct flexcan_stop_mode stm;</div><div class='add'>+</div><div class='add'>+	int irq_boff;</div><div class='add'>+	int irq_err;</div><div class='add'>+	int irq_secondary_mb;</div><div class='add'>+</div><div class='add'>+	/* IPC handle when setup stop mode by System Controller firmware(scfw) */</div><div class='add'>+	struct imx_sc_ipc *sc_ipc_handle;</div><div class='add'>+</div><div class='add'>+	/* Read and Write APIs */</div><div class='add'>+	u32 (*read)(void __iomem *addr);</div><div class='add'>+	void (*write)(u32 val, void __iomem *addr);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+extern const struct ethtool_ops flexcan_ethtool_ops;</div><div class='add'>+</div><div class='add'>+static inline bool</div><div class='add'>+flexcan_supports_rx_mailbox(const struct flexcan_priv *priv)</div><div class='add'>+{</div><div class='add'>+	const u32 quirks = priv-&gt;devtype_data.quirks;</div><div class='add'>+</div><div class='add'>+	return quirks &amp; FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool</div><div class='add'>+flexcan_supports_rx_mailbox_rtr(const struct flexcan_priv *priv)</div><div class='add'>+{</div><div class='add'>+	const u32 quirks = priv-&gt;devtype_data.quirks;</div><div class='add'>+</div><div class='add'>+	return (quirks &amp; (FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX |</div><div class='add'>+			  FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX_RTR)) ==</div><div class='add'>+		(FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX |</div><div class='add'>+		 FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX_RTR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool</div><div class='add'>+flexcan_supports_rx_fifo(const struct flexcan_priv *priv)</div><div class='add'>+{</div><div class='add'>+	const u32 quirks = priv-&gt;devtype_data.quirks;</div><div class='add'>+</div><div class='add'>+	return quirks &amp; FLEXCAN_QUIRK_SUPPORT_RX_FIFO;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool</div><div class='add'>+flexcan_active_rx_rtr(const struct flexcan_priv *priv)</div><div class='add'>+{</div><div class='add'>+	const u32 quirks = priv-&gt;devtype_data.quirks;</div><div class='add'>+</div><div class='add'>+	if (quirks &amp; FLEXCAN_QUIRK_USE_RX_MAILBOX) {</div><div class='add'>+		if (quirks &amp; FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX_RTR)</div><div class='add'>+			return true;</div><div class='add'>+	} else {</div><div class='add'>+		/*  RX-FIFO is always RTR capable */</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#endif /* _FLEXCAN_H */</div><div class='head'>diff --git a/drivers/net/can/grcan.c b/drivers/net/can/grcan.c<br/>index db9538d4b358..3b1b09943436 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/grcan.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/grcan.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/grcan.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/grcan.c</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='ctx'> /*</div><div class='ctx'>  * Socket CAN driver for Aeroflex Gaisler GRCAN and GRHCAN.</div><div class='ctx'>  *</div><div class='hunk'>@@ -15,14 +16,9 @@</div><div class='ctx'>  * See "Documentation/ABI/testing/sysfs-class-net-grcan" for information on the</div><div class='ctx'>  * sysfs interface.</div><div class='ctx'>  *</div><div class='del'>- * See "Documentation/kernel-parameters.txt" for information on the module</div><div class='add'>+ * See "Documentation/admin-guide/kernel-parameters.rst" for information on the module</div><div class='ctx'>  * parameters.</div><div class='ctx'>  *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms of the GNU General Public License as published by the</div><div class='del'>- * Free Software Foundation; either version 2 of the License, or (at your</div><div class='del'>- * option) any later version.</div><div class='del'>- *</div><div class='ctx'>  * Contributors: Andreas Larsson &lt;andreas@gaisler.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='hunk'>@@ -31,10 +27,12 @@</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='del'>-#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/of_irq.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='hunk'>@@ -245,13 +243,14 @@ struct grcan_device_config {</div><div class='ctx'> 		.rxsize		= GRCAN_DEFAULT_BUFFER_SIZE,	\</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-#define GRCAN_TXBUG_SAFE_GRLIB_VERSION	0x4100</div><div class='add'>+#define GRCAN_TXBUG_SAFE_GRLIB_VERSION	4100</div><div class='ctx'> #define GRLIB_VERSION_MASK		0xffff</div><div class='ctx'> </div><div class='ctx'> /* GRCAN private data structure */</div><div class='ctx'> struct grcan_priv {</div><div class='ctx'> 	struct can_priv can;	/* must be the first member */</div><div class='ctx'> 	struct net_device *dev;</div><div class='add'>+	struct device *ofdev_dev;</div><div class='ctx'> 	struct napi_struct napi;</div><div class='ctx'> </div><div class='ctx'> 	struct grcan_registers __iomem *regs;	/* ioremap'ed registers */</div><div class='hunk'>@@ -259,7 +258,6 @@ struct grcan_priv {</div><div class='ctx'> 	struct grcan_dma dma;</div><div class='ctx'> </div><div class='ctx'> 	struct sk_buff **echo_skb;	/* We allocate this on our own */</div><div class='del'>-	u8 *txdlc;			/* Length of queued frames */</div><div class='ctx'> </div><div class='ctx'> 	/* The echo skb pointer, pointing into echo_skb and indicating which</div><div class='ctx'> 	 * frames can be echoed back. See the "Notes on the tx cyclic buffer</div><div class='hunk'>@@ -519,12 +517,10 @@ static int catch_up_echo_skb(struct net_device *dev, int budget, bool echo)</div><div class='ctx'> 		if (echo) {</div><div class='ctx'> 			/* Normal echo of messages */</div><div class='ctx'> 			stats-&gt;tx_packets++;</div><div class='del'>-			stats-&gt;tx_bytes += priv-&gt;txdlc[i];</div><div class='del'>-			priv-&gt;txdlc[i] = 0;</div><div class='del'>-			can_get_echo_skb(dev, i);</div><div class='add'>+			stats-&gt;tx_bytes += can_get_echo_skb(dev, i, NULL);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			/* For cleanup of untransmitted messages */</div><div class='del'>-			can_free_echo_skb(dev, i);</div><div class='add'>+			can_free_echo_skb(dev, i, NULL);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		priv-&gt;eskbp = grcan_ring_add(priv-&gt;eskbp, GRCAN_MSG_SIZE,</div><div class='hunk'>@@ -677,6 +673,7 @@ static void grcan_err(struct net_device *dev, u32 sources, u32 status)</div><div class='ctx'> 				/* There are no others at this point */</div><div class='ctx'> 				break;</div><div class='ctx'> 			}</div><div class='add'>+			cf.can_id |= CAN_ERR_CNT;</div><div class='ctx'> 			cf.data[6] = txerr;</div><div class='ctx'> 			cf.data[7] = rxerr;</div><div class='ctx'> 			priv-&gt;can.state = state;</div><div class='hunk'>@@ -730,7 +727,7 @@ static void grcan_err(struct net_device *dev, u32 sources, u32 status)</div><div class='ctx'> 			txrx = "on rx ";</div><div class='ctx'> 			stats-&gt;rx_errors++;</div><div class='ctx'> 		}</div><div class='del'>-		netdev_err(dev, "Fatal AHB buss error %s- halting device\n",</div><div class='add'>+		netdev_err(dev, "Fatal AHB bus error %s- halting device\n",</div><div class='ctx'> 			   txrx);</div><div class='ctx'> </div><div class='ctx'> 		spin_lock_irqsave(&amp;priv-&gt;lock, flags);</div><div class='hunk'>@@ -781,7 +778,7 @@ static irqreturn_t grcan_interrupt(int irq, void *dev_id)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (priv-&gt;need_txbug_workaround &amp;&amp;</div><div class='ctx'> 	    (sources &amp; (GRCAN_IRQ_TX | GRCAN_IRQ_TXLOSS))) {</div><div class='del'>-		del_timer(&amp;priv-&gt;hang_timer);</div><div class='add'>+		timer_delete(&amp;priv-&gt;hang_timer);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Frame(s) received or transmitted */</div><div class='hunk'>@@ -807,10 +804,10 @@ static irqreturn_t grcan_interrupt(int irq, void *dev_id)</div><div class='ctx'>  * is not ONGOING (TX might be stuck in ONGOING due to a harwrware bug</div><div class='ctx'>  * for single shot)</div><div class='ctx'>  */</div><div class='del'>-static void grcan_running_reset(unsigned long data)</div><div class='add'>+static void grcan_running_reset(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *dev = (struct net_device *)data;</div><div class='del'>-	struct grcan_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct grcan_priv *priv = timer_container_of(priv, t, rr_timer);</div><div class='add'>+	struct net_device *dev = priv-&gt;dev;</div><div class='ctx'> 	struct grcan_registers __iomem *regs = priv-&gt;regs;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='hunk'>@@ -820,8 +817,8 @@ static void grcan_running_reset(unsigned long data)</div><div class='ctx'> 	spin_lock_irqsave(&amp;priv-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;resetting = false;</div><div class='del'>-	del_timer(&amp;priv-&gt;hang_timer);</div><div class='del'>-	del_timer(&amp;priv-&gt;rr_timer);</div><div class='add'>+	timer_delete(&amp;priv-&gt;hang_timer);</div><div class='add'>+	timer_delete(&amp;priv-&gt;rr_timer);</div><div class='ctx'> </div><div class='ctx'> 	if (!priv-&gt;closing) {</div><div class='ctx'> 		/* Save and reset - config register preserved by grcan_reset */</div><div class='hunk'>@@ -898,10 +895,10 @@ static inline void grcan_reset_timer(struct timer_list *timer, __u32 bitrate)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Disable channels and schedule a running reset */</div><div class='del'>-static void grcan_initiate_running_reset(unsigned long data)</div><div class='add'>+static void grcan_initiate_running_reset(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *dev = (struct net_device *)data;</div><div class='del'>-	struct grcan_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct grcan_priv *priv = timer_container_of(priv, t, hang_timer);</div><div class='add'>+	struct net_device *dev = priv-&gt;dev;</div><div class='ctx'> 	struct grcan_registers __iomem *regs = priv-&gt;regs;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='hunk'>@@ -928,7 +925,7 @@ static void grcan_free_dma_buffers(struct net_device *dev)</div><div class='ctx'> 	struct grcan_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	struct grcan_dma *dma = &amp;priv-&gt;dma;</div><div class='ctx'> </div><div class='del'>-	dma_free_coherent(&amp;dev-&gt;dev, dma-&gt;base_size, dma-&gt;base_buf,</div><div class='add'>+	dma_free_coherent(priv-&gt;ofdev_dev, dma-&gt;base_size, dma-&gt;base_buf,</div><div class='ctx'> 			  dma-&gt;base_handle);</div><div class='ctx'> 	memset(dma, 0, sizeof(*dma));</div><div class='ctx'> }</div><div class='hunk'>@@ -953,7 +950,7 @@ static int grcan_allocate_dma_buffers(struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	/* Extra GRCAN_BUFFER_ALIGNMENT to allow for alignment */</div><div class='ctx'> 	dma-&gt;base_size = lsize + ssize + GRCAN_BUFFER_ALIGNMENT;</div><div class='del'>-	dma-&gt;base_buf = dma_alloc_coherent(&amp;dev-&gt;dev,</div><div class='add'>+	dma-&gt;base_buf = dma_alloc_coherent(priv-&gt;ofdev_dev,</div><div class='ctx'> 					   dma-&gt;base_size,</div><div class='ctx'> 					   &amp;dma-&gt;base_handle,</div><div class='ctx'> 					   GFP_KERNEL);</div><div class='hunk'>@@ -1057,7 +1054,7 @@ static int grcan_open(struct net_device *dev)</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	priv-&gt;echo_skb = kzalloc(dma-&gt;tx.size * sizeof(*priv-&gt;echo_skb),</div><div class='add'>+	priv-&gt;echo_skb = kcalloc(dma-&gt;tx.size, sizeof(*priv-&gt;echo_skb),</div><div class='ctx'> 				 GFP_KERNEL);</div><div class='ctx'> 	if (!priv-&gt;echo_skb) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='hunk'>@@ -1066,25 +1063,20 @@ static int grcan_open(struct net_device *dev)</div><div class='ctx'> 	priv-&gt;can.echo_skb_max = dma-&gt;tx.size;</div><div class='ctx'> 	priv-&gt;can.echo_skb = priv-&gt;echo_skb;</div><div class='ctx'> </div><div class='del'>-	priv-&gt;txdlc = kzalloc(dma-&gt;tx.size * sizeof(*priv-&gt;txdlc), GFP_KERNEL);</div><div class='del'>-	if (!priv-&gt;txdlc) {</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto exit_free_echo_skb;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	/* Get can device up */</div><div class='ctx'> 	err = open_candev(dev);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto exit_free_txdlc;</div><div class='add'>+		goto exit_free_echo_skb;</div><div class='ctx'> </div><div class='ctx'> 	err = request_irq(dev-&gt;irq, grcan_interrupt, IRQF_SHARED,</div><div class='ctx'> 			  dev-&gt;name, dev);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto exit_close_candev;</div><div class='ctx'> </div><div class='add'>+	napi_enable(&amp;priv-&gt;napi);</div><div class='add'>+</div><div class='ctx'> 	spin_lock_irqsave(&amp;priv-&gt;lock, flags);</div><div class='ctx'> </div><div class='del'>-	napi_enable(&amp;priv-&gt;napi);</div><div class='ctx'> 	grcan_start(dev);</div><div class='ctx'> 	if (!(priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LISTENONLY))</div><div class='ctx'> 		netif_start_queue(dev);</div><div class='hunk'>@@ -1097,8 +1089,6 @@ static int grcan_open(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> exit_close_candev:</div><div class='ctx'> 	close_candev(dev);</div><div class='del'>-exit_free_txdlc:</div><div class='del'>-	kfree(priv-&gt;txdlc);</div><div class='ctx'> exit_free_echo_skb:</div><div class='ctx'> 	kfree(priv-&gt;echo_skb);</div><div class='ctx'> exit_free_dma_buffers:</div><div class='hunk'>@@ -1117,8 +1107,10 @@ static int grcan_close(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;closing = true;</div><div class='ctx'> 	if (priv-&gt;need_txbug_workaround) {</div><div class='del'>-		del_timer_sync(&amp;priv-&gt;hang_timer);</div><div class='del'>-		del_timer_sync(&amp;priv-&gt;rr_timer);</div><div class='add'>+		spin_unlock_irqrestore(&amp;priv-&gt;lock, flags);</div><div class='add'>+		timer_delete_sync(&amp;priv-&gt;hang_timer);</div><div class='add'>+		timer_delete_sync(&amp;priv-&gt;rr_timer);</div><div class='add'>+		spin_lock_irqsave(&amp;priv-&gt;lock, flags);</div><div class='ctx'> 	}</div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='ctx'> 	grcan_stop_hardware(dev);</div><div class='hunk'>@@ -1133,12 +1125,11 @@ static int grcan_close(struct net_device *dev)</div><div class='ctx'> 	priv-&gt;can.echo_skb_max = 0;</div><div class='ctx'> 	priv-&gt;can.echo_skb = NULL;</div><div class='ctx'> 	kfree(priv-&gt;echo_skb);</div><div class='del'>-	kfree(priv-&gt;txdlc);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int grcan_transmit_catch_up(struct net_device *dev, int budget)</div><div class='add'>+static void grcan_transmit_catch_up(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct grcan_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -1146,7 +1137,7 @@ static int grcan_transmit_catch_up(struct net_device *dev, int budget)</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;priv-&gt;lock, flags);</div><div class='ctx'> </div><div class='del'>-	work_done = catch_up_echo_skb(dev, budget, true);</div><div class='add'>+	work_done = catch_up_echo_skb(dev, -1, true);</div><div class='ctx'> 	if (work_done) {</div><div class='ctx'> 		if (!priv-&gt;resetting &amp;&amp; !priv-&gt;closing &amp;&amp;</div><div class='ctx'> 		    !(priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LISTENONLY))</div><div class='hunk'>@@ -1156,12 +1147,10 @@ static int grcan_transmit_catch_up(struct net_device *dev, int budget)</div><div class='ctx'> 		 * so prevent a running reset while catching up</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (priv-&gt;need_txbug_workaround)</div><div class='del'>-			del_timer(&amp;priv-&gt;hang_timer);</div><div class='add'>+			timer_delete(&amp;priv-&gt;hang_timer);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;priv-&gt;lock, flags);</div><div class='del'>-</div><div class='del'>-	return work_done;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int grcan_receive(struct net_device *dev, int budget)</div><div class='hunk'>@@ -1205,21 +1194,21 @@ static int grcan_receive(struct net_device *dev, int budget)</div><div class='ctx'> 			cf-&gt;can_id = ((slot[0] &amp; GRCAN_MSG_BID)</div><div class='ctx'> 				      &gt;&gt; GRCAN_MSG_BID_BIT);</div><div class='ctx'> 		}</div><div class='del'>-		cf-&gt;can_dlc = get_can_dlc((slot[1] &amp; GRCAN_MSG_DLC)</div><div class='add'>+		cf-&gt;len = can_cc_dlc2len((slot[1] &amp; GRCAN_MSG_DLC)</div><div class='ctx'> 					  &gt;&gt; GRCAN_MSG_DLC_BIT);</div><div class='ctx'> 		if (rtr) {</div><div class='ctx'> 			cf-&gt;can_id |= CAN_RTR_FLAG;</div><div class='ctx'> 		} else {</div><div class='del'>-			for (i = 0; i &lt; cf-&gt;can_dlc; i++) {</div><div class='add'>+			for (i = 0; i &lt; cf-&gt;len; i++) {</div><div class='ctx'> 				j = GRCAN_MSG_DATA_SLOT_INDEX(i);</div><div class='ctx'> 				shift = GRCAN_MSG_DATA_SHIFT(i);</div><div class='ctx'> 				cf-&gt;data[i] = (u8)(slot[j] &gt;&gt; shift);</div><div class='ctx'> 			}</div><div class='del'>-		}</div><div class='ctx'> </div><div class='del'>-		/* Update statistics and read pointer */</div><div class='add'>+			stats-&gt;rx_bytes += cf-&gt;len;</div><div class='add'>+		}</div><div class='ctx'> 		stats-&gt;rx_packets++;</div><div class='del'>-		stats-&gt;rx_bytes += cf-&gt;can_dlc;</div><div class='add'>+</div><div class='ctx'> 		netif_receive_skb(skb);</div><div class='ctx'> </div><div class='ctx'> 		rd = grcan_ring_add(rd, GRCAN_MSG_SIZE, dma-&gt;rx.size);</div><div class='hunk'>@@ -1243,19 +1232,13 @@ static int grcan_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 	struct net_device *dev = priv-&gt;dev;</div><div class='ctx'> 	struct grcan_registers __iomem *regs = priv-&gt;regs;</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-	int tx_work_done, rx_work_done;</div><div class='del'>-	int rx_budget = budget / 2;</div><div class='del'>-	int tx_budget = budget - rx_budget;</div><div class='add'>+	int work_done;</div><div class='ctx'> </div><div class='del'>-	/* Half of the budget for receiveing messages */</div><div class='del'>-	rx_work_done = grcan_receive(dev, rx_budget);</div><div class='add'>+	work_done = grcan_receive(dev, budget);</div><div class='ctx'> </div><div class='del'>-	/* Half of the budget for transmitting messages as that can trigger echo</div><div class='del'>-	 * frames being received</div><div class='del'>-	 */</div><div class='del'>-	tx_work_done = grcan_transmit_catch_up(dev, tx_budget);</div><div class='add'>+	grcan_transmit_catch_up(dev);</div><div class='ctx'> </div><div class='del'>-	if (rx_work_done &lt; rx_budget &amp;&amp; tx_work_done &lt; tx_budget) {</div><div class='add'>+	if (work_done &lt; budget) {</div><div class='ctx'> 		napi_complete(napi);</div><div class='ctx'> </div><div class='ctx'> 		/* Guarantee no interference with a running reset that otherwise</div><div class='hunk'>@@ -1272,7 +1255,7 @@ static int grcan_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;priv-&gt;lock, flags);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return rx_work_done + tx_work_done;</div><div class='add'>+	return work_done;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Work tx bug by waiting while for the risky situation to clear. If that fails,</div><div class='hunk'>@@ -1364,7 +1347,7 @@ static netdev_tx_t grcan_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	u32 oneshotmode = priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_ONE_SHOT;</div><div class='ctx'> </div><div class='del'>-	if (can_dropped_invalid_skb(dev, skb))</div><div class='add'>+	if (can_dev_dropped_skb(dev, skb))</div><div class='ctx'> 		return NETDEV_TX_OK;</div><div class='ctx'> </div><div class='ctx'> 	/* Trying to transmit in silent mode will generate error interrupts, but</div><div class='hunk'>@@ -1403,7 +1386,7 @@ static netdev_tx_t grcan_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 	eff = cf-&gt;can_id &amp; CAN_EFF_FLAG;</div><div class='ctx'> 	rtr = cf-&gt;can_id &amp; CAN_RTR_FLAG;</div><div class='ctx'> 	id = cf-&gt;can_id &amp; (eff ? CAN_EFF_MASK : CAN_SFF_MASK);</div><div class='del'>-	dlc = cf-&gt;can_dlc;</div><div class='add'>+	dlc = cf-&gt;len;</div><div class='ctx'> 	if (eff)</div><div class='ctx'> 		tmp = (id &lt;&lt; GRCAN_MSG_EID_BIT) &amp; GRCAN_MSG_EID;</div><div class='ctx'> 	else</div><div class='hunk'>@@ -1451,8 +1434,7 @@ static netdev_tx_t grcan_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 	 * can_put_echo_skb would be an error unless other measures are</div><div class='ctx'> 	 * taken.</div><div class='ctx'> 	 */</div><div class='del'>-	priv-&gt;txdlc[slotindex] = cf-&gt;can_dlc; /* Store dlc for statistics */</div><div class='del'>-	can_put_echo_skb(skb, dev, slotindex);</div><div class='add'>+	can_put_echo_skb(skb, dev, slotindex, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* Make sure everything is written before allowing hardware to</div><div class='ctx'> 	 * read from the memory</div><div class='hunk'>@@ -1484,7 +1466,7 @@ static netdev_tx_t grcan_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 		}							\</div><div class='ctx'> 	}								\</div><div class='ctx'> 	module_param_named(name, grcan_module_config.name,		\</div><div class='del'>-			   mtype, S_IRUGO);				\</div><div class='add'>+			   mtype, 0444);				\</div><div class='ctx'> 	MODULE_PARM_DESC(name, desc)</div><div class='ctx'> </div><div class='ctx'> #define GRCAN_CONFIG_ATTR(name, desc)					\</div><div class='hunk'>@@ -1513,7 +1495,7 @@ static netdev_tx_t grcan_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 		struct grcan_priv *priv = netdev_priv(dev);		\</div><div class='ctx'> 		return sprintf(buf, "%d\n", priv-&gt;config.name);		\</div><div class='ctx'> 	}								\</div><div class='del'>-	static DEVICE_ATTR(name, S_IRUGO | S_IWUSR,			\</div><div class='add'>+	static DEVICE_ATTR(name, 0644,					\</div><div class='ctx'> 			   grcan_show_##name,				\</div><div class='ctx'> 			   grcan_store_##name);				\</div><div class='ctx'> 	GRCAN_MODULE_PARAM(name, ushort, GRCAN_NOT_BOOL, desc)</div><div class='hunk'>@@ -1579,7 +1561,10 @@ static const struct net_device_ops grcan_netdev_ops = {</div><div class='ctx'> 	.ndo_open	= grcan_open,</div><div class='ctx'> 	.ndo_stop	= grcan_close,</div><div class='ctx'> 	.ndo_start_xmit	= grcan_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops grcan_ethtool_ops = {</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int grcan_setup_netdev(struct platform_device *ofdev,</div><div class='hunk'>@@ -1598,12 +1583,14 @@ static int grcan_setup_netdev(struct platform_device *ofdev,</div><div class='ctx'> 	dev-&gt;irq = irq;</div><div class='ctx'> 	dev-&gt;flags |= IFF_ECHO;</div><div class='ctx'> 	dev-&gt;netdev_ops = &amp;grcan_netdev_ops;</div><div class='add'>+	dev-&gt;ethtool_ops = &amp;grcan_ethtool_ops;</div><div class='ctx'> 	dev-&gt;sysfs_groups[0] = &amp;sysfs_grcan_group;</div><div class='ctx'> </div><div class='ctx'> 	priv = netdev_priv(dev);</div><div class='ctx'> 	memcpy(&amp;priv-&gt;config, &amp;grcan_module_config,</div><div class='ctx'> 	       sizeof(struct grcan_device_config));</div><div class='ctx'> 	priv-&gt;dev = dev;</div><div class='add'>+	priv-&gt;ofdev_dev = &amp;ofdev-&gt;dev;</div><div class='ctx'> 	priv-&gt;regs = base;</div><div class='ctx'> 	priv-&gt;can.bittiming_const = &amp;grcan_bittiming_const;</div><div class='ctx'> 	priv-&gt;can.do_set_bittiming = grcan_set_bittiming;</div><div class='hunk'>@@ -1626,16 +1613,11 @@ static int grcan_setup_netdev(struct platform_device *ofdev,</div><div class='ctx'> 	spin_lock_init(&amp;priv-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;need_txbug_workaround) {</div><div class='del'>-		init_timer(&amp;priv-&gt;rr_timer);</div><div class='del'>-		priv-&gt;rr_timer.function = grcan_running_reset;</div><div class='del'>-		priv-&gt;rr_timer.data = (unsigned long)dev;</div><div class='del'>-</div><div class='del'>-		init_timer(&amp;priv-&gt;hang_timer);</div><div class='del'>-		priv-&gt;hang_timer.function = grcan_initiate_running_reset;</div><div class='del'>-		priv-&gt;hang_timer.data = (unsigned long)dev;</div><div class='add'>+		timer_setup(&amp;priv-&gt;rr_timer, grcan_running_reset, 0);</div><div class='add'>+		timer_setup(&amp;priv-&gt;hang_timer, grcan_initiate_running_reset, 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	netif_napi_add(dev, &amp;priv-&gt;napi, grcan_poll, GRCAN_NAPI_WEIGHT);</div><div class='add'>+	netif_napi_add_weight(dev, &amp;priv-&gt;napi, grcan_poll, GRCAN_NAPI_WEIGHT);</div><div class='ctx'> </div><div class='ctx'> 	SET_NETDEV_DEV(dev, &amp;ofdev-&gt;dev);</div><div class='ctx'> 	dev_info(&amp;ofdev-&gt;dev, "regs=0x%p, irq=%d, clock=%d\n",</div><div class='hunk'>@@ -1661,7 +1643,7 @@ exit_free_candev:</div><div class='ctx'> static int grcan_probe(struct platform_device *ofdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_node *np = ofdev-&gt;dev.of_node;</div><div class='del'>-	struct resource *res;</div><div class='add'>+	struct device_node *sysid_parent;</div><div class='ctx'> 	u32 sysid, ambafreq;</div><div class='ctx'> 	int irq, err;</div><div class='ctx'> 	void __iomem *base;</div><div class='hunk'>@@ -1670,10 +1652,14 @@ static int grcan_probe(struct platform_device *ofdev)</div><div class='ctx'> 	/* Compare GRLIB version number with the first that does not</div><div class='ctx'> 	 * have the tx bug (see start_xmit)</div><div class='ctx'> 	 */</div><div class='del'>-	err = of_property_read_u32(np, "systemid", &amp;sysid);</div><div class='del'>-	if (!err &amp;&amp; ((sysid &amp; GRLIB_VERSION_MASK)</div><div class='del'>-		     &gt;= GRCAN_TXBUG_SAFE_GRLIB_VERSION))</div><div class='del'>-		txbug = false;</div><div class='add'>+	sysid_parent = of_find_node_by_path("/ambapp0");</div><div class='add'>+	if (sysid_parent) {</div><div class='add'>+		err = of_property_read_u32(sysid_parent, "systemid", &amp;sysid);</div><div class='add'>+		if (!err &amp;&amp; ((sysid &amp; GRLIB_VERSION_MASK) &gt;=</div><div class='add'>+			     GRCAN_TXBUG_SAFE_GRLIB_VERSION))</div><div class='add'>+			txbug = false;</div><div class='add'>+		of_node_put(sysid_parent);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	err = of_property_read_u32(np, "freq", &amp;ambafreq);</div><div class='ctx'> 	if (err) {</div><div class='hunk'>@@ -1681,8 +1667,7 @@ static int grcan_probe(struct platform_device *ofdev)</div><div class='ctx'> 		goto exit_error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	res = platform_get_resource(ofdev, IORESOURCE_MEM, 0);</div><div class='del'>-	base = devm_ioremap_resource(&amp;ofdev-&gt;dev, res);</div><div class='add'>+	base = devm_platform_ioremap_resource(ofdev, 0);</div><div class='ctx'> 	if (IS_ERR(base)) {</div><div class='ctx'> 		err = PTR_ERR(base);</div><div class='ctx'> 		goto exit_error;</div><div class='hunk'>@@ -1712,7 +1697,7 @@ exit_error:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int grcan_remove(struct platform_device *ofdev)</div><div class='add'>+static void grcan_remove(struct platform_device *ofdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = platform_get_drvdata(ofdev);</div><div class='ctx'> 	struct grcan_priv *priv = netdev_priv(dev);</div><div class='hunk'>@@ -1722,8 +1707,6 @@ static int grcan_remove(struct platform_device *ofdev)</div><div class='ctx'> 	irq_dispose_mapping(dev-&gt;irq);</div><div class='ctx'> 	netif_napi_del(&amp;priv-&gt;napi);</div><div class='ctx'> 	free_candev(dev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id grcan_match[] = {</div><div class='head'>diff --git a/drivers/net/can/ifi_canfd/Kconfig b/drivers/net/can/ifi_canfd/Kconfig<br/>new file mode 100644<br/>index 000000000000..b5dd9c13d529<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/ifi_canfd/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/ifi_canfd/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,9 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+config CAN_IFI_CANFD</div><div class='add'>+	depends on HAS_IOMEM</div><div class='add'>+	tristate "IFI CAN_FD IP"</div><div class='add'>+	help</div><div class='add'>+	  This driver adds support for the I/F/I CAN_FD soft IP block</div><div class='add'>+	  connected to the "platform bus" (Linux abstraction for directly</div><div class='add'>+	  to the processor attached devices). The CAN_FD is most often</div><div class='add'>+	  synthesised into an FPGA or CPLD.</div><div class='head'>diff --git a/drivers/net/can/ifi_canfd/Makefile b/drivers/net/can/ifi_canfd/Makefile<br/>new file mode 100644<br/>index 000000000000..0cd724f10d1e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/ifi_canfd/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/ifi_canfd/Makefile</a></div><div class='hunk'>@@ -0,0 +1,6 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+#</div><div class='add'>+#  Makefile for the IFI CANFD controller driver.</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_CAN_IFI_CANFD) += ifi_canfd.o</div><div class='head'>diff --git a/drivers/net/can/ifi_canfd/ifi_canfd.c b/drivers/net/can/ifi_canfd/ifi_canfd.c<br/>new file mode 100644<br/>index 000000000000..0f83335e4d07<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/ifi_canfd/ifi_canfd.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/ifi_canfd/ifi_canfd.c</a></div><div class='hunk'>@@ -0,0 +1,1064 @@</div><div class='add'>+/*</div><div class='add'>+ * CAN bus driver for IFI CANFD controller</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2016 Marek Vasut &lt;marex@denx.de&gt;</div><div class='add'>+ *</div><div class='add'>+ * Details about this controller can be found at</div><div class='add'>+ * http://www.ifi-pld.de/IP/CANFD/canfd.html</div><div class='add'>+ *</div><div class='add'>+ * This file is licensed under the terms of the GNU General Public</div><div class='add'>+ * License version 2. This program is licensed "as is" without any</div><div class='add'>+ * warranty of any kind, whether express or implied.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+</div><div class='add'>+#define IFI_CANFD_STCMD				0x0</div><div class='add'>+#define IFI_CANFD_STCMD_HARDRESET		0xDEADCAFD</div><div class='add'>+#define IFI_CANFD_STCMD_ENABLE			BIT(0)</div><div class='add'>+#define IFI_CANFD_STCMD_ERROR_ACTIVE		BIT(2)</div><div class='add'>+#define IFI_CANFD_STCMD_ERROR_PASSIVE		BIT(3)</div><div class='add'>+#define IFI_CANFD_STCMD_BUSOFF			BIT(4)</div><div class='add'>+#define IFI_CANFD_STCMD_ERROR_WARNING		BIT(5)</div><div class='add'>+#define IFI_CANFD_STCMD_BUSMONITOR		BIT(16)</div><div class='add'>+#define IFI_CANFD_STCMD_LOOPBACK		BIT(18)</div><div class='add'>+#define IFI_CANFD_STCMD_DISABLE_CANFD		BIT(24)</div><div class='add'>+#define IFI_CANFD_STCMD_ENABLE_ISO		BIT(25)</div><div class='add'>+#define IFI_CANFD_STCMD_ENABLE_7_9_8_8_TIMING	BIT(26)</div><div class='add'>+#define IFI_CANFD_STCMD_NORMAL_MODE		((u32)BIT(31))</div><div class='add'>+</div><div class='add'>+#define IFI_CANFD_RXSTCMD			0x4</div><div class='add'>+#define IFI_CANFD_RXSTCMD_REMOVE_MSG		BIT(0)</div><div class='add'>+#define IFI_CANFD_RXSTCMD_RESET			BIT(7)</div><div class='add'>+#define IFI_CANFD_RXSTCMD_EMPTY			BIT(8)</div><div class='add'>+#define IFI_CANFD_RXSTCMD_OVERFLOW		BIT(13)</div><div class='add'>+</div><div class='add'>+#define IFI_CANFD_TXSTCMD			0x8</div><div class='add'>+#define IFI_CANFD_TXSTCMD_ADD_MSG		BIT(0)</div><div class='add'>+#define IFI_CANFD_TXSTCMD_HIGH_PRIO		BIT(1)</div><div class='add'>+#define IFI_CANFD_TXSTCMD_RESET			BIT(7)</div><div class='add'>+#define IFI_CANFD_TXSTCMD_EMPTY			BIT(8)</div><div class='add'>+#define IFI_CANFD_TXSTCMD_FULL			BIT(12)</div><div class='add'>+#define IFI_CANFD_TXSTCMD_OVERFLOW		BIT(13)</div><div class='add'>+</div><div class='add'>+#define IFI_CANFD_INTERRUPT			0xc</div><div class='add'>+#define IFI_CANFD_INTERRUPT_ERROR_BUSOFF	BIT(0)</div><div class='add'>+#define IFI_CANFD_INTERRUPT_ERROR_WARNING	BIT(1)</div><div class='add'>+#define IFI_CANFD_INTERRUPT_ERROR_STATE_CHG	BIT(2)</div><div class='add'>+#define IFI_CANFD_INTERRUPT_ERROR_REC_TEC_INC	BIT(3)</div><div class='add'>+#define IFI_CANFD_INTERRUPT_ERROR_COUNTER	BIT(10)</div><div class='add'>+#define IFI_CANFD_INTERRUPT_TXFIFO_EMPTY	BIT(16)</div><div class='add'>+#define IFI_CANFD_INTERRUPT_TXFIFO_REMOVE	BIT(22)</div><div class='add'>+#define IFI_CANFD_INTERRUPT_RXFIFO_NEMPTY	BIT(24)</div><div class='add'>+#define IFI_CANFD_INTERRUPT_RXFIFO_NEMPTY_PER	BIT(25)</div><div class='add'>+#define IFI_CANFD_INTERRUPT_SET_IRQ		((u32)BIT(31))</div><div class='add'>+</div><div class='add'>+#define IFI_CANFD_IRQMASK			0x10</div><div class='add'>+#define IFI_CANFD_IRQMASK_ERROR_BUSOFF		BIT(0)</div><div class='add'>+#define IFI_CANFD_IRQMASK_ERROR_WARNING		BIT(1)</div><div class='add'>+#define IFI_CANFD_IRQMASK_ERROR_STATE_CHG	BIT(2)</div><div class='add'>+#define IFI_CANFD_IRQMASK_ERROR_REC_TEC_INC	BIT(3)</div><div class='add'>+#define IFI_CANFD_IRQMASK_SET_ERR		BIT(7)</div><div class='add'>+#define IFI_CANFD_IRQMASK_SET_TS		BIT(15)</div><div class='add'>+#define IFI_CANFD_IRQMASK_TXFIFO_EMPTY		BIT(16)</div><div class='add'>+#define IFI_CANFD_IRQMASK_SET_TX		BIT(23)</div><div class='add'>+#define IFI_CANFD_IRQMASK_RXFIFO_NEMPTY		BIT(24)</div><div class='add'>+#define IFI_CANFD_IRQMASK_SET_RX		((u32)BIT(31))</div><div class='add'>+</div><div class='add'>+#define IFI_CANFD_TIME				0x14</div><div class='add'>+#define IFI_CANFD_FTIME				0x18</div><div class='add'>+#define IFI_CANFD_TIME_TIMEB_OFF		0</div><div class='add'>+#define IFI_CANFD_TIME_TIMEA_OFF		8</div><div class='add'>+#define IFI_CANFD_TIME_PRESCALE_OFF		16</div><div class='add'>+#define IFI_CANFD_TIME_SJW_OFF_7_9_8_8		25</div><div class='add'>+#define IFI_CANFD_TIME_SJW_OFF_4_12_6_6		28</div><div class='add'>+#define IFI_CANFD_TIME_SET_SJW_4_12_6_6		BIT(6)</div><div class='add'>+#define IFI_CANFD_TIME_SET_TIMEB_4_12_6_6	BIT(7)</div><div class='add'>+#define IFI_CANFD_TIME_SET_PRESC_4_12_6_6	BIT(14)</div><div class='add'>+#define IFI_CANFD_TIME_SET_TIMEA_4_12_6_6	BIT(15)</div><div class='add'>+</div><div class='add'>+#define IFI_CANFD_TDELAY			0x1c</div><div class='add'>+#define IFI_CANFD_TDELAY_DEFAULT		0xb</div><div class='add'>+#define IFI_CANFD_TDELAY_MASK			0x3fff</div><div class='add'>+#define IFI_CANFD_TDELAY_ABS			BIT(14)</div><div class='add'>+#define IFI_CANFD_TDELAY_EN			BIT(15)</div><div class='add'>+</div><div class='add'>+#define IFI_CANFD_ERROR				0x20</div><div class='add'>+#define IFI_CANFD_ERROR_TX_OFFSET		0</div><div class='add'>+#define IFI_CANFD_ERROR_TX_MASK			0xff</div><div class='add'>+#define IFI_CANFD_ERROR_RX_OFFSET		16</div><div class='add'>+#define IFI_CANFD_ERROR_RX_MASK			0xff</div><div class='add'>+</div><div class='add'>+#define IFI_CANFD_ERRCNT			0x24</div><div class='add'>+</div><div class='add'>+#define IFI_CANFD_SUSPEND			0x28</div><div class='add'>+</div><div class='add'>+#define IFI_CANFD_REPEAT			0x2c</div><div class='add'>+</div><div class='add'>+#define IFI_CANFD_TRAFFIC			0x30</div><div class='add'>+</div><div class='add'>+#define IFI_CANFD_TSCONTROL			0x34</div><div class='add'>+</div><div class='add'>+#define IFI_CANFD_TSC				0x38</div><div class='add'>+</div><div class='add'>+#define IFI_CANFD_TST				0x3c</div><div class='add'>+</div><div class='add'>+#define IFI_CANFD_RES1				0x40</div><div class='add'>+</div><div class='add'>+#define IFI_CANFD_ERROR_CTR			0x44</div><div class='add'>+#define IFI_CANFD_ERROR_CTR_UNLOCK_MAGIC	0x21302899</div><div class='add'>+#define IFI_CANFD_ERROR_CTR_OVERLOAD_FIRST	BIT(0)</div><div class='add'>+#define IFI_CANFD_ERROR_CTR_ACK_ERROR_FIRST	BIT(1)</div><div class='add'>+#define IFI_CANFD_ERROR_CTR_BIT0_ERROR_FIRST	BIT(2)</div><div class='add'>+#define IFI_CANFD_ERROR_CTR_BIT1_ERROR_FIRST	BIT(3)</div><div class='add'>+#define IFI_CANFD_ERROR_CTR_STUFF_ERROR_FIRST	BIT(4)</div><div class='add'>+#define IFI_CANFD_ERROR_CTR_CRC_ERROR_FIRST	BIT(5)</div><div class='add'>+#define IFI_CANFD_ERROR_CTR_FORM_ERROR_FIRST	BIT(6)</div><div class='add'>+#define IFI_CANFD_ERROR_CTR_OVERLOAD_ALL	BIT(8)</div><div class='add'>+#define IFI_CANFD_ERROR_CTR_ACK_ERROR_ALL	BIT(9)</div><div class='add'>+#define IFI_CANFD_ERROR_CTR_BIT0_ERROR_ALL	BIT(10)</div><div class='add'>+#define IFI_CANFD_ERROR_CTR_BIT1_ERROR_ALL	BIT(11)</div><div class='add'>+#define IFI_CANFD_ERROR_CTR_STUFF_ERROR_ALL	BIT(12)</div><div class='add'>+#define IFI_CANFD_ERROR_CTR_CRC_ERROR_ALL	BIT(13)</div><div class='add'>+#define IFI_CANFD_ERROR_CTR_FORM_ERROR_ALL	BIT(14)</div><div class='add'>+#define IFI_CANFD_ERROR_CTR_BITPOSITION_OFFSET	16</div><div class='add'>+#define IFI_CANFD_ERROR_CTR_BITPOSITION_MASK	0xff</div><div class='add'>+#define IFI_CANFD_ERROR_CTR_ER_RESET		BIT(30)</div><div class='add'>+#define IFI_CANFD_ERROR_CTR_ER_ENABLE		((u32)BIT(31))</div><div class='add'>+</div><div class='add'>+#define IFI_CANFD_PAR				0x48</div><div class='add'>+</div><div class='add'>+#define IFI_CANFD_CANCLOCK			0x4c</div><div class='add'>+</div><div class='add'>+#define IFI_CANFD_SYSCLOCK			0x50</div><div class='add'>+</div><div class='add'>+#define IFI_CANFD_VER				0x54</div><div class='add'>+#define IFI_CANFD_VER_REV_MASK			0xff</div><div class='add'>+#define IFI_CANFD_VER_REV_MIN_SUPPORTED		0x15</div><div class='add'>+</div><div class='add'>+#define IFI_CANFD_IP_ID				0x58</div><div class='add'>+#define IFI_CANFD_IP_ID_VALUE			0xD073CAFD</div><div class='add'>+</div><div class='add'>+#define IFI_CANFD_TEST				0x5c</div><div class='add'>+</div><div class='add'>+#define IFI_CANFD_RXFIFO_TS_63_32		0x60</div><div class='add'>+</div><div class='add'>+#define IFI_CANFD_RXFIFO_TS_31_0		0x64</div><div class='add'>+</div><div class='add'>+#define IFI_CANFD_RXFIFO_DLC			0x68</div><div class='add'>+#define IFI_CANFD_RXFIFO_DLC_DLC_OFFSET		0</div><div class='add'>+#define IFI_CANFD_RXFIFO_DLC_DLC_MASK		0xf</div><div class='add'>+#define IFI_CANFD_RXFIFO_DLC_RTR		BIT(4)</div><div class='add'>+#define IFI_CANFD_RXFIFO_DLC_EDL		BIT(5)</div><div class='add'>+#define IFI_CANFD_RXFIFO_DLC_BRS		BIT(6)</div><div class='add'>+#define IFI_CANFD_RXFIFO_DLC_ESI		BIT(7)</div><div class='add'>+#define IFI_CANFD_RXFIFO_DLC_OBJ_OFFSET		8</div><div class='add'>+#define IFI_CANFD_RXFIFO_DLC_OBJ_MASK		0x1ff</div><div class='add'>+#define IFI_CANFD_RXFIFO_DLC_FNR_OFFSET		24</div><div class='add'>+#define IFI_CANFD_RXFIFO_DLC_FNR_MASK		0xff</div><div class='add'>+</div><div class='add'>+#define IFI_CANFD_RXFIFO_ID			0x6c</div><div class='add'>+#define IFI_CANFD_RXFIFO_ID_ID_OFFSET		0</div><div class='add'>+#define IFI_CANFD_RXFIFO_ID_ID_STD_MASK		CAN_SFF_MASK</div><div class='add'>+#define IFI_CANFD_RXFIFO_ID_ID_STD_OFFSET	0</div><div class='add'>+#define IFI_CANFD_RXFIFO_ID_ID_STD_WIDTH	10</div><div class='add'>+#define IFI_CANFD_RXFIFO_ID_ID_XTD_MASK		CAN_EFF_MASK</div><div class='add'>+#define IFI_CANFD_RXFIFO_ID_ID_XTD_OFFSET	11</div><div class='add'>+#define IFI_CANFD_RXFIFO_ID_ID_XTD_WIDTH	18</div><div class='add'>+#define IFI_CANFD_RXFIFO_ID_IDE			BIT(29)</div><div class='add'>+</div><div class='add'>+#define IFI_CANFD_RXFIFO_DATA			0x70	/* 0x70..0xac */</div><div class='add'>+</div><div class='add'>+#define IFI_CANFD_TXFIFO_SUSPEND_US		0xb0</div><div class='add'>+</div><div class='add'>+#define IFI_CANFD_TXFIFO_REPEATCOUNT		0xb4</div><div class='add'>+</div><div class='add'>+#define IFI_CANFD_TXFIFO_DLC			0xb8</div><div class='add'>+#define IFI_CANFD_TXFIFO_DLC_DLC_OFFSET		0</div><div class='add'>+#define IFI_CANFD_TXFIFO_DLC_DLC_MASK		0xf</div><div class='add'>+#define IFI_CANFD_TXFIFO_DLC_RTR		BIT(4)</div><div class='add'>+#define IFI_CANFD_TXFIFO_DLC_EDL		BIT(5)</div><div class='add'>+#define IFI_CANFD_TXFIFO_DLC_BRS		BIT(6)</div><div class='add'>+#define IFI_CANFD_TXFIFO_DLC_FNR_OFFSET		24</div><div class='add'>+#define IFI_CANFD_TXFIFO_DLC_FNR_MASK		0xff</div><div class='add'>+</div><div class='add'>+#define IFI_CANFD_TXFIFO_ID			0xbc</div><div class='add'>+#define IFI_CANFD_TXFIFO_ID_ID_OFFSET		0</div><div class='add'>+#define IFI_CANFD_TXFIFO_ID_ID_STD_MASK		CAN_SFF_MASK</div><div class='add'>+#define IFI_CANFD_TXFIFO_ID_ID_STD_OFFSET	0</div><div class='add'>+#define IFI_CANFD_TXFIFO_ID_ID_STD_WIDTH	10</div><div class='add'>+#define IFI_CANFD_TXFIFO_ID_ID_XTD_MASK		CAN_EFF_MASK</div><div class='add'>+#define IFI_CANFD_TXFIFO_ID_ID_XTD_OFFSET	11</div><div class='add'>+#define IFI_CANFD_TXFIFO_ID_ID_XTD_WIDTH	18</div><div class='add'>+#define IFI_CANFD_TXFIFO_ID_IDE			BIT(29)</div><div class='add'>+</div><div class='add'>+#define IFI_CANFD_TXFIFO_DATA			0xc0	/* 0xb0..0xfc */</div><div class='add'>+</div><div class='add'>+#define IFI_CANFD_FILTER_MASK(n)		(0x800 + ((n) * 8) + 0)</div><div class='add'>+#define IFI_CANFD_FILTER_MASK_EXT		BIT(29)</div><div class='add'>+#define IFI_CANFD_FILTER_MASK_EDL		BIT(30)</div><div class='add'>+#define IFI_CANFD_FILTER_MASK_VALID		((u32)BIT(31))</div><div class='add'>+</div><div class='add'>+#define IFI_CANFD_FILTER_IDENT(n)		(0x800 + ((n) * 8) + 4)</div><div class='add'>+#define IFI_CANFD_FILTER_IDENT_IDE		BIT(29)</div><div class='add'>+#define IFI_CANFD_FILTER_IDENT_CANFD		BIT(30)</div><div class='add'>+#define IFI_CANFD_FILTER_IDENT_VALID		((u32)BIT(31))</div><div class='add'>+</div><div class='add'>+/* IFI CANFD private data structure */</div><div class='add'>+struct ifi_canfd_priv {</div><div class='add'>+	struct can_priv		can;	/* must be the first member */</div><div class='add'>+	struct napi_struct	napi;</div><div class='add'>+	struct net_device	*ndev;</div><div class='add'>+	void __iomem		*base;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void ifi_canfd_irq_enable(struct net_device *ndev, bool enable)</div><div class='add'>+{</div><div class='add'>+	struct ifi_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	u32 enirq = 0;</div><div class='add'>+</div><div class='add'>+	if (enable) {</div><div class='add'>+		enirq = IFI_CANFD_IRQMASK_TXFIFO_EMPTY |</div><div class='add'>+			IFI_CANFD_IRQMASK_RXFIFO_NEMPTY |</div><div class='add'>+			IFI_CANFD_IRQMASK_ERROR_STATE_CHG |</div><div class='add'>+			IFI_CANFD_IRQMASK_ERROR_WARNING |</div><div class='add'>+			IFI_CANFD_IRQMASK_ERROR_BUSOFF;</div><div class='add'>+		if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING)</div><div class='add'>+			enirq |= IFI_CANFD_INTERRUPT_ERROR_COUNTER;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	writel(IFI_CANFD_IRQMASK_SET_ERR |</div><div class='add'>+	       IFI_CANFD_IRQMASK_SET_TS |</div><div class='add'>+	       IFI_CANFD_IRQMASK_SET_TX |</div><div class='add'>+	       IFI_CANFD_IRQMASK_SET_RX | enirq,</div><div class='add'>+	       priv-&gt;base + IFI_CANFD_IRQMASK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ifi_canfd_read_fifo(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct net_device_stats *stats = &amp;ndev-&gt;stats;</div><div class='add'>+	struct ifi_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct canfd_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	const u32 rx_irq_mask = IFI_CANFD_INTERRUPT_RXFIFO_NEMPTY |</div><div class='add'>+				IFI_CANFD_INTERRUPT_RXFIFO_NEMPTY_PER;</div><div class='add'>+	u32 rxdlc, rxid;</div><div class='add'>+	u32 dlc, id;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	rxdlc = readl(priv-&gt;base + IFI_CANFD_RXFIFO_DLC);</div><div class='add'>+	if (rxdlc &amp; IFI_CANFD_RXFIFO_DLC_EDL)</div><div class='add'>+		skb = alloc_canfd_skb(ndev, &amp;cf);</div><div class='add'>+	else</div><div class='add'>+		skb = alloc_can_skb(ndev, (struct can_frame **)&amp;cf);</div><div class='add'>+</div><div class='add'>+	if (!skb) {</div><div class='add'>+		stats-&gt;rx_dropped++;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dlc = (rxdlc &gt;&gt; IFI_CANFD_RXFIFO_DLC_DLC_OFFSET) &amp;</div><div class='add'>+	      IFI_CANFD_RXFIFO_DLC_DLC_MASK;</div><div class='add'>+	if (rxdlc &amp; IFI_CANFD_RXFIFO_DLC_EDL)</div><div class='add'>+		cf-&gt;len = can_fd_dlc2len(dlc);</div><div class='add'>+	else</div><div class='add'>+		cf-&gt;len = can_cc_dlc2len(dlc);</div><div class='add'>+</div><div class='add'>+	rxid = readl(priv-&gt;base + IFI_CANFD_RXFIFO_ID);</div><div class='add'>+	id = (rxid &gt;&gt; IFI_CANFD_RXFIFO_ID_ID_OFFSET);</div><div class='add'>+	if (id &amp; IFI_CANFD_RXFIFO_ID_IDE) {</div><div class='add'>+		id &amp;= IFI_CANFD_RXFIFO_ID_ID_XTD_MASK;</div><div class='add'>+		/*</div><div class='add'>+		 * In case the Extended ID frame is received, the standard</div><div class='add'>+		 * and extended part of the ID are swapped in the register,</div><div class='add'>+		 * so swap them back to obtain the correct ID.</div><div class='add'>+		 */</div><div class='add'>+		id = (id &gt;&gt; IFI_CANFD_RXFIFO_ID_ID_XTD_OFFSET) |</div><div class='add'>+		     ((id &amp; IFI_CANFD_RXFIFO_ID_ID_STD_MASK) &lt;&lt;</div><div class='add'>+		       IFI_CANFD_RXFIFO_ID_ID_XTD_WIDTH);</div><div class='add'>+		id |= CAN_EFF_FLAG;</div><div class='add'>+	} else {</div><div class='add'>+		id &amp;= IFI_CANFD_RXFIFO_ID_ID_STD_MASK;</div><div class='add'>+	}</div><div class='add'>+	cf-&gt;can_id = id;</div><div class='add'>+</div><div class='add'>+	if (rxdlc &amp; IFI_CANFD_RXFIFO_DLC_ESI) {</div><div class='add'>+		cf-&gt;flags |= CANFD_ESI;</div><div class='add'>+		netdev_dbg(ndev, "ESI Error\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!(rxdlc &amp; IFI_CANFD_RXFIFO_DLC_EDL) &amp;&amp;</div><div class='add'>+	    (rxdlc &amp; IFI_CANFD_RXFIFO_DLC_RTR)) {</div><div class='add'>+		cf-&gt;can_id |= CAN_RTR_FLAG;</div><div class='add'>+	} else {</div><div class='add'>+		if (rxdlc &amp; IFI_CANFD_RXFIFO_DLC_BRS)</div><div class='add'>+			cf-&gt;flags |= CANFD_BRS;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; cf-&gt;len; i += 4) {</div><div class='add'>+			*(u32 *)(cf-&gt;data + i) =</div><div class='add'>+				readl(priv-&gt;base + IFI_CANFD_RXFIFO_DATA + i);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		stats-&gt;rx_bytes += cf-&gt;len;</div><div class='add'>+	}</div><div class='add'>+	stats-&gt;rx_packets++;</div><div class='add'>+</div><div class='add'>+	/* Remove the packet from FIFO */</div><div class='add'>+	writel(IFI_CANFD_RXSTCMD_REMOVE_MSG, priv-&gt;base + IFI_CANFD_RXSTCMD);</div><div class='add'>+	writel(rx_irq_mask, priv-&gt;base + IFI_CANFD_INTERRUPT);</div><div class='add'>+</div><div class='add'>+	netif_receive_skb(skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ifi_canfd_do_rx_poll(struct net_device *ndev, int quota)</div><div class='add'>+{</div><div class='add'>+	struct ifi_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	u32 pkts = 0;</div><div class='add'>+	u32 rxst;</div><div class='add'>+</div><div class='add'>+	rxst = readl(priv-&gt;base + IFI_CANFD_RXSTCMD);</div><div class='add'>+	if (rxst &amp; IFI_CANFD_RXSTCMD_EMPTY) {</div><div class='add'>+		netdev_dbg(ndev, "No messages in RX FIFO\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (;;) {</div><div class='add'>+		if (rxst &amp; IFI_CANFD_RXSTCMD_EMPTY)</div><div class='add'>+			break;</div><div class='add'>+		if (quota &lt;= 0)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		ifi_canfd_read_fifo(ndev);</div><div class='add'>+		quota--;</div><div class='add'>+		pkts++;</div><div class='add'>+		rxst = readl(priv-&gt;base + IFI_CANFD_RXSTCMD);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return pkts;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ifi_canfd_handle_lost_msg(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct net_device_stats *stats = &amp;ndev-&gt;stats;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct can_frame *frame;</div><div class='add'>+</div><div class='add'>+	netdev_err(ndev, "RX FIFO overflow, message(s) lost.\n");</div><div class='add'>+</div><div class='add'>+	stats-&gt;rx_errors++;</div><div class='add'>+	stats-&gt;rx_over_errors++;</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_err_skb(ndev, &amp;frame);</div><div class='add'>+	if (unlikely(!skb))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	frame-&gt;can_id |= CAN_ERR_CRTL;</div><div class='add'>+	frame-&gt;data[1] = CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='add'>+</div><div class='add'>+	netif_receive_skb(skb);</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ifi_canfd_handle_lec_err(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct ifi_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct net_device_stats *stats = &amp;ndev-&gt;stats;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	u32 errctr = readl(priv-&gt;base + IFI_CANFD_ERROR_CTR);</div><div class='add'>+	const u32 errmask = IFI_CANFD_ERROR_CTR_OVERLOAD_FIRST |</div><div class='add'>+			    IFI_CANFD_ERROR_CTR_ACK_ERROR_FIRST |</div><div class='add'>+			    IFI_CANFD_ERROR_CTR_BIT0_ERROR_FIRST |</div><div class='add'>+			    IFI_CANFD_ERROR_CTR_BIT1_ERROR_FIRST |</div><div class='add'>+			    IFI_CANFD_ERROR_CTR_STUFF_ERROR_FIRST |</div><div class='add'>+			    IFI_CANFD_ERROR_CTR_CRC_ERROR_FIRST |</div><div class='add'>+			    IFI_CANFD_ERROR_CTR_FORM_ERROR_FIRST;</div><div class='add'>+</div><div class='add'>+	if (!(errctr &amp; errmask))	/* No error happened. */</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.can_stats.bus_error++;</div><div class='add'>+</div><div class='add'>+	/* Propagate the error condition to the CAN stack. */</div><div class='add'>+	skb = alloc_can_err_skb(ndev, &amp;cf);</div><div class='add'>+</div><div class='add'>+	/* Read the error counter register and check for new errors. */</div><div class='add'>+	if (likely(skb))</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='add'>+</div><div class='add'>+	if (errctr &amp; IFI_CANFD_ERROR_CTR_OVERLOAD_FIRST) {</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+		if (likely(skb))</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_OVERLOAD;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (errctr &amp; IFI_CANFD_ERROR_CTR_ACK_ERROR_FIRST) {</div><div class='add'>+		stats-&gt;tx_errors++;</div><div class='add'>+		if (likely(skb))</div><div class='add'>+			cf-&gt;data[3] = CAN_ERR_PROT_LOC_ACK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (errctr &amp; IFI_CANFD_ERROR_CTR_BIT0_ERROR_FIRST) {</div><div class='add'>+		stats-&gt;tx_errors++;</div><div class='add'>+		if (likely(skb))</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_BIT0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (errctr &amp; IFI_CANFD_ERROR_CTR_BIT1_ERROR_FIRST) {</div><div class='add'>+		stats-&gt;tx_errors++;</div><div class='add'>+		if (likely(skb))</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_BIT1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (errctr &amp; IFI_CANFD_ERROR_CTR_STUFF_ERROR_FIRST) {</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+		if (likely(skb))</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (errctr &amp; IFI_CANFD_ERROR_CTR_CRC_ERROR_FIRST) {</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+		if (likely(skb))</div><div class='add'>+			cf-&gt;data[3] = CAN_ERR_PROT_LOC_CRC_SEQ;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (errctr &amp; IFI_CANFD_ERROR_CTR_FORM_ERROR_FIRST) {</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+		if (likely(skb))</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Reset the error counter, ack the IRQ and re-enable the counter. */</div><div class='add'>+	writel(IFI_CANFD_ERROR_CTR_ER_RESET, priv-&gt;base + IFI_CANFD_ERROR_CTR);</div><div class='add'>+	writel(IFI_CANFD_INTERRUPT_ERROR_COUNTER,</div><div class='add'>+	       priv-&gt;base + IFI_CANFD_INTERRUPT);</div><div class='add'>+	writel(IFI_CANFD_ERROR_CTR_ER_ENABLE, priv-&gt;base + IFI_CANFD_ERROR_CTR);</div><div class='add'>+</div><div class='add'>+	if (unlikely(!skb))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	netif_receive_skb(skb);</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ifi_canfd_get_berr_counter(const struct net_device *ndev,</div><div class='add'>+				      struct can_berr_counter *bec)</div><div class='add'>+{</div><div class='add'>+	struct ifi_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	u32 err;</div><div class='add'>+</div><div class='add'>+	err = readl(priv-&gt;base + IFI_CANFD_ERROR);</div><div class='add'>+	bec-&gt;rxerr = (err &gt;&gt; IFI_CANFD_ERROR_RX_OFFSET) &amp;</div><div class='add'>+		     IFI_CANFD_ERROR_RX_MASK;</div><div class='add'>+	bec-&gt;txerr = (err &gt;&gt; IFI_CANFD_ERROR_TX_OFFSET) &amp;</div><div class='add'>+		     IFI_CANFD_ERROR_TX_MASK;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ifi_canfd_handle_state_change(struct net_device *ndev,</div><div class='add'>+					 enum can_state new_state)</div><div class='add'>+{</div><div class='add'>+	struct ifi_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct can_berr_counter bec;</div><div class='add'>+</div><div class='add'>+	switch (new_state) {</div><div class='add'>+	case CAN_STATE_ERROR_ACTIVE:</div><div class='add'>+		/* error active state */</div><div class='add'>+		priv-&gt;can.can_stats.error_warning++;</div><div class='add'>+		priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+		break;</div><div class='add'>+	case CAN_STATE_ERROR_WARNING:</div><div class='add'>+		/* error warning state */</div><div class='add'>+		priv-&gt;can.can_stats.error_warning++;</div><div class='add'>+		priv-&gt;can.state = CAN_STATE_ERROR_WARNING;</div><div class='add'>+		break;</div><div class='add'>+	case CAN_STATE_ERROR_PASSIVE:</div><div class='add'>+		/* error passive state */</div><div class='add'>+		priv-&gt;can.can_stats.error_passive++;</div><div class='add'>+		priv-&gt;can.state = CAN_STATE_ERROR_PASSIVE;</div><div class='add'>+		break;</div><div class='add'>+	case CAN_STATE_BUS_OFF:</div><div class='add'>+		/* bus-off state */</div><div class='add'>+		priv-&gt;can.state = CAN_STATE_BUS_OFF;</div><div class='add'>+		ifi_canfd_irq_enable(ndev, 0);</div><div class='add'>+		priv-&gt;can.can_stats.bus_off++;</div><div class='add'>+		can_bus_off(ndev);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* propagate the error condition to the CAN stack */</div><div class='add'>+	skb = alloc_can_err_skb(ndev, &amp;cf);</div><div class='add'>+	if (unlikely(!skb))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ifi_canfd_get_berr_counter(ndev, &amp;bec);</div><div class='add'>+</div><div class='add'>+	switch (new_state) {</div><div class='add'>+	case CAN_STATE_ERROR_WARNING:</div><div class='add'>+		/* error warning state */</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_CRTL | CAN_ERR_CNT;</div><div class='add'>+		cf-&gt;data[1] = (bec.txerr &gt; bec.rxerr) ?</div><div class='add'>+			CAN_ERR_CRTL_TX_WARNING :</div><div class='add'>+			CAN_ERR_CRTL_RX_WARNING;</div><div class='add'>+		cf-&gt;data[6] = bec.txerr;</div><div class='add'>+		cf-&gt;data[7] = bec.rxerr;</div><div class='add'>+		break;</div><div class='add'>+	case CAN_STATE_ERROR_PASSIVE:</div><div class='add'>+		/* error passive state */</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_CRTL | CAN_ERR_CNT;</div><div class='add'>+		cf-&gt;data[1] |= CAN_ERR_CRTL_RX_PASSIVE;</div><div class='add'>+		if (bec.txerr &gt; 127)</div><div class='add'>+			cf-&gt;data[1] |= CAN_ERR_CRTL_TX_PASSIVE;</div><div class='add'>+		cf-&gt;data[6] = bec.txerr;</div><div class='add'>+		cf-&gt;data[7] = bec.rxerr;</div><div class='add'>+		break;</div><div class='add'>+	case CAN_STATE_BUS_OFF:</div><div class='add'>+		/* bus-off state */</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_BUSOFF;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netif_receive_skb(skb);</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ifi_canfd_handle_state_errors(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct ifi_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	u32 stcmd = readl(priv-&gt;base + IFI_CANFD_STCMD);</div><div class='add'>+	int work_done = 0;</div><div class='add'>+</div><div class='add'>+	if ((stcmd &amp; IFI_CANFD_STCMD_ERROR_ACTIVE) &amp;&amp;</div><div class='add'>+	    (priv-&gt;can.state != CAN_STATE_ERROR_ACTIVE)) {</div><div class='add'>+		netdev_dbg(ndev, "Error, entered active state\n");</div><div class='add'>+		work_done += ifi_canfd_handle_state_change(ndev,</div><div class='add'>+						CAN_STATE_ERROR_ACTIVE);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((stcmd &amp; IFI_CANFD_STCMD_ERROR_WARNING) &amp;&amp;</div><div class='add'>+	    (priv-&gt;can.state != CAN_STATE_ERROR_WARNING)) {</div><div class='add'>+		netdev_dbg(ndev, "Error, entered warning state\n");</div><div class='add'>+		work_done += ifi_canfd_handle_state_change(ndev,</div><div class='add'>+						CAN_STATE_ERROR_WARNING);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((stcmd &amp; IFI_CANFD_STCMD_ERROR_PASSIVE) &amp;&amp;</div><div class='add'>+	    (priv-&gt;can.state != CAN_STATE_ERROR_PASSIVE)) {</div><div class='add'>+		netdev_dbg(ndev, "Error, entered passive state\n");</div><div class='add'>+		work_done += ifi_canfd_handle_state_change(ndev,</div><div class='add'>+						CAN_STATE_ERROR_PASSIVE);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((stcmd &amp; IFI_CANFD_STCMD_BUSOFF) &amp;&amp;</div><div class='add'>+	    (priv-&gt;can.state != CAN_STATE_BUS_OFF)) {</div><div class='add'>+		netdev_dbg(ndev, "Error, entered bus-off state\n");</div><div class='add'>+		work_done += ifi_canfd_handle_state_change(ndev,</div><div class='add'>+						CAN_STATE_BUS_OFF);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return work_done;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ifi_canfd_poll(struct napi_struct *napi, int quota)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = napi-&gt;dev;</div><div class='add'>+	struct ifi_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	u32 rxstcmd = readl(priv-&gt;base + IFI_CANFD_RXSTCMD);</div><div class='add'>+	int work_done = 0;</div><div class='add'>+</div><div class='add'>+	/* Handle bus state changes */</div><div class='add'>+	work_done += ifi_canfd_handle_state_errors(ndev);</div><div class='add'>+</div><div class='add'>+	/* Handle lost messages on RX */</div><div class='add'>+	if (rxstcmd &amp; IFI_CANFD_RXSTCMD_OVERFLOW)</div><div class='add'>+		work_done += ifi_canfd_handle_lost_msg(ndev);</div><div class='add'>+</div><div class='add'>+	/* Handle lec errors on the bus */</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING)</div><div class='add'>+		work_done += ifi_canfd_handle_lec_err(ndev);</div><div class='add'>+</div><div class='add'>+	/* Handle normal messages on RX */</div><div class='add'>+	if (!(rxstcmd &amp; IFI_CANFD_RXSTCMD_EMPTY))</div><div class='add'>+		work_done += ifi_canfd_do_rx_poll(ndev, quota - work_done);</div><div class='add'>+</div><div class='add'>+	if (work_done &lt; quota) {</div><div class='add'>+		napi_complete_done(napi, work_done);</div><div class='add'>+		ifi_canfd_irq_enable(ndev, 1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return work_done;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t ifi_canfd_isr(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = (struct net_device *)dev_id;</div><div class='add'>+	struct ifi_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct net_device_stats *stats = &amp;ndev-&gt;stats;</div><div class='add'>+	const u32 rx_irq_mask = IFI_CANFD_INTERRUPT_RXFIFO_NEMPTY |</div><div class='add'>+				IFI_CANFD_INTERRUPT_RXFIFO_NEMPTY_PER |</div><div class='add'>+				IFI_CANFD_INTERRUPT_ERROR_COUNTER |</div><div class='add'>+				IFI_CANFD_INTERRUPT_ERROR_STATE_CHG |</div><div class='add'>+				IFI_CANFD_INTERRUPT_ERROR_WARNING |</div><div class='add'>+				IFI_CANFD_INTERRUPT_ERROR_BUSOFF;</div><div class='add'>+	const u32 tx_irq_mask = IFI_CANFD_INTERRUPT_TXFIFO_EMPTY |</div><div class='add'>+				IFI_CANFD_INTERRUPT_TXFIFO_REMOVE;</div><div class='add'>+	const u32 clr_irq_mask = ~((u32)IFI_CANFD_INTERRUPT_SET_IRQ);</div><div class='add'>+	u32 isr;</div><div class='add'>+</div><div class='add'>+	isr = readl(priv-&gt;base + IFI_CANFD_INTERRUPT);</div><div class='add'>+</div><div class='add'>+	/* No interrupt */</div><div class='add'>+	if (isr == 0)</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+</div><div class='add'>+	/* Clear all pending interrupts but ErrWarn */</div><div class='add'>+	writel(clr_irq_mask, priv-&gt;base + IFI_CANFD_INTERRUPT);</div><div class='add'>+</div><div class='add'>+	/* RX IRQ or bus warning, start NAPI */</div><div class='add'>+	if (isr &amp; rx_irq_mask) {</div><div class='add'>+		ifi_canfd_irq_enable(ndev, 0);</div><div class='add'>+		napi_schedule(&amp;priv-&gt;napi);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* TX IRQ */</div><div class='add'>+	if (isr &amp; IFI_CANFD_INTERRUPT_TXFIFO_REMOVE) {</div><div class='add'>+		stats-&gt;tx_bytes += can_get_echo_skb(ndev, 0, NULL);</div><div class='add'>+		stats-&gt;tx_packets++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (isr &amp; tx_irq_mask)</div><div class='add'>+		netif_wake_queue(ndev);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const ifi_canfd_bittiming_const = {</div><div class='add'>+	.name		= KBUILD_MODNAME,</div><div class='add'>+	.tseg1_min	= 1,	/* Time segment 1 = prop_seg + phase_seg1 */</div><div class='add'>+	.tseg1_max	= 256,</div><div class='add'>+	.tseg2_min	= 2,	/* Time segment 2 = phase_seg2 */</div><div class='add'>+	.tseg2_max	= 256,</div><div class='add'>+	.sjw_max	= 128,</div><div class='add'>+	.brp_min	= 2,</div><div class='add'>+	.brp_max	= 512,</div><div class='add'>+	.brp_inc	= 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void ifi_canfd_set_bittiming(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct ifi_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	const struct can_bittiming *bt = &amp;priv-&gt;can.bittiming;</div><div class='add'>+	const struct can_bittiming *dbt = &amp;priv-&gt;can.fd.data_bittiming;</div><div class='add'>+	u16 brp, sjw, tseg1, tseg2, tdc;</div><div class='add'>+</div><div class='add'>+	/* Configure bit timing */</div><div class='add'>+	brp = bt-&gt;brp - 2;</div><div class='add'>+	sjw = bt-&gt;sjw - 1;</div><div class='add'>+	tseg1 = bt-&gt;prop_seg + bt-&gt;phase_seg1 - 1;</div><div class='add'>+	tseg2 = bt-&gt;phase_seg2 - 2;</div><div class='add'>+	writel((tseg2 &lt;&lt; IFI_CANFD_TIME_TIMEB_OFF) |</div><div class='add'>+	       (tseg1 &lt;&lt; IFI_CANFD_TIME_TIMEA_OFF) |</div><div class='add'>+	       (brp &lt;&lt; IFI_CANFD_TIME_PRESCALE_OFF) |</div><div class='add'>+	       (sjw &lt;&lt; IFI_CANFD_TIME_SJW_OFF_7_9_8_8),</div><div class='add'>+	       priv-&gt;base + IFI_CANFD_TIME);</div><div class='add'>+</div><div class='add'>+	/* Configure data bit timing */</div><div class='add'>+	brp = dbt-&gt;brp - 2;</div><div class='add'>+	sjw = dbt-&gt;sjw - 1;</div><div class='add'>+	tseg1 = dbt-&gt;prop_seg + dbt-&gt;phase_seg1 - 1;</div><div class='add'>+	tseg2 = dbt-&gt;phase_seg2 - 2;</div><div class='add'>+	writel((tseg2 &lt;&lt; IFI_CANFD_TIME_TIMEB_OFF) |</div><div class='add'>+	       (tseg1 &lt;&lt; IFI_CANFD_TIME_TIMEA_OFF) |</div><div class='add'>+	       (brp &lt;&lt; IFI_CANFD_TIME_PRESCALE_OFF) |</div><div class='add'>+	       (sjw &lt;&lt; IFI_CANFD_TIME_SJW_OFF_7_9_8_8),</div><div class='add'>+	       priv-&gt;base + IFI_CANFD_FTIME);</div><div class='add'>+</div><div class='add'>+	/* Configure transmitter delay */</div><div class='add'>+	tdc = dbt-&gt;brp * (dbt-&gt;prop_seg + dbt-&gt;phase_seg1);</div><div class='add'>+	tdc &amp;= IFI_CANFD_TDELAY_MASK;</div><div class='add'>+	writel(IFI_CANFD_TDELAY_EN | tdc, priv-&gt;base + IFI_CANFD_TDELAY);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ifi_canfd_set_filter(struct net_device *ndev, const u32 id,</div><div class='add'>+				 const u32 mask, const u32 ident)</div><div class='add'>+{</div><div class='add'>+	struct ifi_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	writel(mask, priv-&gt;base + IFI_CANFD_FILTER_MASK(id));</div><div class='add'>+	writel(ident, priv-&gt;base + IFI_CANFD_FILTER_IDENT(id));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ifi_canfd_set_filters(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	/* Receive all CAN frames (standard ID) */</div><div class='add'>+	ifi_canfd_set_filter(ndev, 0,</div><div class='add'>+			     IFI_CANFD_FILTER_MASK_VALID |</div><div class='add'>+			     IFI_CANFD_FILTER_MASK_EXT,</div><div class='add'>+			     IFI_CANFD_FILTER_IDENT_VALID);</div><div class='add'>+</div><div class='add'>+	/* Receive all CAN frames (extended ID) */</div><div class='add'>+	ifi_canfd_set_filter(ndev, 1,</div><div class='add'>+			     IFI_CANFD_FILTER_MASK_VALID |</div><div class='add'>+			     IFI_CANFD_FILTER_MASK_EXT,</div><div class='add'>+			     IFI_CANFD_FILTER_IDENT_VALID |</div><div class='add'>+			     IFI_CANFD_FILTER_IDENT_IDE);</div><div class='add'>+</div><div class='add'>+	/* Receive all CANFD frames */</div><div class='add'>+	ifi_canfd_set_filter(ndev, 2,</div><div class='add'>+			     IFI_CANFD_FILTER_MASK_VALID |</div><div class='add'>+			     IFI_CANFD_FILTER_MASK_EDL |</div><div class='add'>+			     IFI_CANFD_FILTER_MASK_EXT,</div><div class='add'>+			     IFI_CANFD_FILTER_IDENT_VALID |</div><div class='add'>+			     IFI_CANFD_FILTER_IDENT_CANFD |</div><div class='add'>+			     IFI_CANFD_FILTER_IDENT_IDE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ifi_canfd_start(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct ifi_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	u32 stcmd;</div><div class='add'>+</div><div class='add'>+	/* Reset the IP */</div><div class='add'>+	writel(IFI_CANFD_STCMD_HARDRESET, priv-&gt;base + IFI_CANFD_STCMD);</div><div class='add'>+	writel(IFI_CANFD_STCMD_ENABLE_7_9_8_8_TIMING,</div><div class='add'>+	       priv-&gt;base + IFI_CANFD_STCMD);</div><div class='add'>+</div><div class='add'>+	ifi_canfd_set_bittiming(ndev);</div><div class='add'>+	ifi_canfd_set_filters(ndev);</div><div class='add'>+</div><div class='add'>+	/* Reset FIFOs */</div><div class='add'>+	writel(IFI_CANFD_RXSTCMD_RESET, priv-&gt;base + IFI_CANFD_RXSTCMD);</div><div class='add'>+	writel(0, priv-&gt;base + IFI_CANFD_RXSTCMD);</div><div class='add'>+	writel(IFI_CANFD_TXSTCMD_RESET, priv-&gt;base + IFI_CANFD_TXSTCMD);</div><div class='add'>+	writel(0, priv-&gt;base + IFI_CANFD_TXSTCMD);</div><div class='add'>+</div><div class='add'>+	/* Repeat transmission until successful */</div><div class='add'>+	writel(0, priv-&gt;base + IFI_CANFD_REPEAT);</div><div class='add'>+	writel(0, priv-&gt;base + IFI_CANFD_SUSPEND);</div><div class='add'>+</div><div class='add'>+	/* Clear all pending interrupts */</div><div class='add'>+	writel((u32)(~IFI_CANFD_INTERRUPT_SET_IRQ),</div><div class='add'>+	       priv-&gt;base + IFI_CANFD_INTERRUPT);</div><div class='add'>+</div><div class='add'>+	stcmd = IFI_CANFD_STCMD_ENABLE | IFI_CANFD_STCMD_NORMAL_MODE |</div><div class='add'>+		IFI_CANFD_STCMD_ENABLE_7_9_8_8_TIMING;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LISTENONLY)</div><div class='add'>+		stcmd |= IFI_CANFD_STCMD_BUSMONITOR;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LOOPBACK)</div><div class='add'>+		stcmd |= IFI_CANFD_STCMD_LOOPBACK;</div><div class='add'>+</div><div class='add'>+	if ((priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD) &amp;&amp;</div><div class='add'>+	    !(priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD_NON_ISO))</div><div class='add'>+		stcmd |= IFI_CANFD_STCMD_ENABLE_ISO;</div><div class='add'>+</div><div class='add'>+	if (!(priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD))</div><div class='add'>+		stcmd |= IFI_CANFD_STCMD_DISABLE_CANFD;</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+</div><div class='add'>+	ifi_canfd_irq_enable(ndev, 1);</div><div class='add'>+</div><div class='add'>+	/* Unlock, reset and enable the error counter. */</div><div class='add'>+	writel(IFI_CANFD_ERROR_CTR_UNLOCK_MAGIC,</div><div class='add'>+	       priv-&gt;base + IFI_CANFD_ERROR_CTR);</div><div class='add'>+	writel(IFI_CANFD_ERROR_CTR_ER_RESET, priv-&gt;base + IFI_CANFD_ERROR_CTR);</div><div class='add'>+	writel(IFI_CANFD_ERROR_CTR_ER_ENABLE, priv-&gt;base + IFI_CANFD_ERROR_CTR);</div><div class='add'>+</div><div class='add'>+	/* Enable controller */</div><div class='add'>+	writel(stcmd, priv-&gt;base + IFI_CANFD_STCMD);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ifi_canfd_stop(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct ifi_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	/* Reset and disable the error counter. */</div><div class='add'>+	writel(IFI_CANFD_ERROR_CTR_ER_RESET, priv-&gt;base + IFI_CANFD_ERROR_CTR);</div><div class='add'>+	writel(0, priv-&gt;base + IFI_CANFD_ERROR_CTR);</div><div class='add'>+</div><div class='add'>+	/* Reset the IP */</div><div class='add'>+	writel(IFI_CANFD_STCMD_HARDRESET, priv-&gt;base + IFI_CANFD_STCMD);</div><div class='add'>+</div><div class='add'>+	/* Mask all interrupts */</div><div class='add'>+	writel(~0, priv-&gt;base + IFI_CANFD_IRQMASK);</div><div class='add'>+</div><div class='add'>+	/* Clear all pending interrupts */</div><div class='add'>+	writel((u32)(~IFI_CANFD_INTERRUPT_SET_IRQ),</div><div class='add'>+	       priv-&gt;base + IFI_CANFD_INTERRUPT);</div><div class='add'>+</div><div class='add'>+	/* Set the state as STOPPED */</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ifi_canfd_set_mode(struct net_device *ndev, enum can_mode mode)</div><div class='add'>+{</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case CAN_MODE_START:</div><div class='add'>+		ifi_canfd_start(ndev);</div><div class='add'>+		netif_wake_queue(ndev);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ifi_canfd_open(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct ifi_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = open_candev(ndev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(ndev, "Failed to open CAN device\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Register interrupt handler */</div><div class='add'>+	ret = request_irq(ndev-&gt;irq, ifi_canfd_isr, IRQF_SHARED,</div><div class='add'>+			  ndev-&gt;name, ndev);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		netdev_err(ndev, "Failed to request interrupt\n");</div><div class='add'>+		goto err_irq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ifi_canfd_start(ndev);</div><div class='add'>+</div><div class='add'>+	napi_enable(&amp;priv-&gt;napi);</div><div class='add'>+	netif_start_queue(ndev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+err_irq:</div><div class='add'>+	close_candev(ndev);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ifi_canfd_close(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct ifi_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(ndev);</div><div class='add'>+	napi_disable(&amp;priv-&gt;napi);</div><div class='add'>+</div><div class='add'>+	ifi_canfd_stop(ndev);</div><div class='add'>+</div><div class='add'>+	free_irq(ndev-&gt;irq, ndev);</div><div class='add'>+</div><div class='add'>+	close_candev(ndev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static netdev_tx_t ifi_canfd_start_xmit(struct sk_buff *skb,</div><div class='add'>+					struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct ifi_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct canfd_frame *cf = (struct canfd_frame *)skb-&gt;data;</div><div class='add'>+	u32 txst, txid, txdlc;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (can_dev_dropped_skb(ndev, skb))</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+	/* Check if the TX buffer is full */</div><div class='add'>+	txst = readl(priv-&gt;base + IFI_CANFD_TXSTCMD);</div><div class='add'>+	if (txst &amp; IFI_CANFD_TXSTCMD_FULL) {</div><div class='add'>+		netif_stop_queue(ndev);</div><div class='add'>+		netdev_err(ndev, "BUG! TX FIFO full when queue awake!\n");</div><div class='add'>+		return NETDEV_TX_BUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(ndev);</div><div class='add'>+</div><div class='add'>+	if (cf-&gt;can_id &amp; CAN_EFF_FLAG) {</div><div class='add'>+		txid = cf-&gt;can_id &amp; CAN_EFF_MASK;</div><div class='add'>+		/*</div><div class='add'>+		 * In case the Extended ID frame is transmitted, the</div><div class='add'>+		 * standard and extended part of the ID are swapped</div><div class='add'>+		 * in the register, so swap them back to send the</div><div class='add'>+		 * correct ID.</div><div class='add'>+		 */</div><div class='add'>+		txid = (txid &gt;&gt; IFI_CANFD_TXFIFO_ID_ID_XTD_WIDTH) |</div><div class='add'>+		       ((txid &amp; IFI_CANFD_TXFIFO_ID_ID_XTD_MASK) &lt;&lt;</div><div class='add'>+		         IFI_CANFD_TXFIFO_ID_ID_XTD_OFFSET);</div><div class='add'>+		txid |= IFI_CANFD_TXFIFO_ID_IDE;</div><div class='add'>+	} else {</div><div class='add'>+		txid = cf-&gt;can_id &amp; CAN_SFF_MASK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	txdlc = can_fd_len2dlc(cf-&gt;len);</div><div class='add'>+	if ((priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD) &amp;&amp; can_is_canfd_skb(skb)) {</div><div class='add'>+		txdlc |= IFI_CANFD_TXFIFO_DLC_EDL;</div><div class='add'>+		if (cf-&gt;flags &amp; CANFD_BRS)</div><div class='add'>+			txdlc |= IFI_CANFD_TXFIFO_DLC_BRS;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cf-&gt;can_id &amp; CAN_RTR_FLAG)</div><div class='add'>+		txdlc |= IFI_CANFD_TXFIFO_DLC_RTR;</div><div class='add'>+</div><div class='add'>+	/* message ram configuration */</div><div class='add'>+	writel(txid, priv-&gt;base + IFI_CANFD_TXFIFO_ID);</div><div class='add'>+	writel(txdlc, priv-&gt;base + IFI_CANFD_TXFIFO_DLC);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; cf-&gt;len; i += 4) {</div><div class='add'>+		writel(*(u32 *)(cf-&gt;data + i),</div><div class='add'>+		       priv-&gt;base + IFI_CANFD_TXFIFO_DATA + i);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	writel(0, priv-&gt;base + IFI_CANFD_TXFIFO_REPEATCOUNT);</div><div class='add'>+	writel(0, priv-&gt;base + IFI_CANFD_TXFIFO_SUSPEND_US);</div><div class='add'>+</div><div class='add'>+	can_put_echo_skb(skb, ndev, 0, 0);</div><div class='add'>+</div><div class='add'>+	/* Start the transmission */</div><div class='add'>+	writel(IFI_CANFD_TXSTCMD_ADD_MSG, priv-&gt;base + IFI_CANFD_TXSTCMD);</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops ifi_canfd_netdev_ops = {</div><div class='add'>+	.ndo_open	= ifi_canfd_open,</div><div class='add'>+	.ndo_stop	= ifi_canfd_close,</div><div class='add'>+	.ndo_start_xmit	= ifi_canfd_start_xmit,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops ifi_canfd_ethtool_ops = {</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int ifi_canfd_plat_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	struct ifi_canfd_priv *priv;</div><div class='add'>+	void __iomem *addr;</div><div class='add'>+	int irq, ret;</div><div class='add'>+	u32 id, rev;</div><div class='add'>+</div><div class='add'>+	addr = devm_platform_ioremap_resource(pdev, 0);</div><div class='add'>+	if (IS_ERR(addr))</div><div class='add'>+		return PTR_ERR(addr);</div><div class='add'>+</div><div class='add'>+	irq = platform_get_irq(pdev, 0);</div><div class='add'>+	if (irq &lt; 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	id = readl(addr + IFI_CANFD_IP_ID);</div><div class='add'>+	if (id != IFI_CANFD_IP_ID_VALUE) {</div><div class='add'>+		dev_err(dev, "This block is not IFI CANFD, id=%08x\n", id);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rev = readl(addr + IFI_CANFD_VER) &amp; IFI_CANFD_VER_REV_MASK;</div><div class='add'>+	if (rev &lt; IFI_CANFD_VER_REV_MIN_SUPPORTED) {</div><div class='add'>+		dev_err(dev, "This block is too old (rev %i), minimum supported is rev %i\n",</div><div class='add'>+			rev, IFI_CANFD_VER_REV_MIN_SUPPORTED);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ndev = alloc_candev(sizeof(*priv), 1);</div><div class='add'>+	if (!ndev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ndev-&gt;irq = irq;</div><div class='add'>+	ndev-&gt;flags |= IFF_ECHO;	/* we support local echo */</div><div class='add'>+	ndev-&gt;netdev_ops = &amp;ifi_canfd_netdev_ops;</div><div class='add'>+	ndev-&gt;ethtool_ops = &amp;ifi_canfd_ethtool_ops;</div><div class='add'>+</div><div class='add'>+	priv = netdev_priv(ndev);</div><div class='add'>+	priv-&gt;ndev = ndev;</div><div class='add'>+	priv-&gt;base = addr;</div><div class='add'>+</div><div class='add'>+	netif_napi_add(ndev, &amp;priv-&gt;napi, ifi_canfd_poll);</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.clock.freq = readl(addr + IFI_CANFD_CANCLOCK);</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.bittiming_const = &amp;ifi_canfd_bittiming_const;</div><div class='add'>+	priv-&gt;can.fd.data_bittiming_const = &amp;ifi_canfd_bittiming_const;</div><div class='add'>+	priv-&gt;can.do_set_mode = ifi_canfd_set_mode;</div><div class='add'>+	priv-&gt;can.do_get_berr_counter = ifi_canfd_get_berr_counter;</div><div class='add'>+</div><div class='add'>+	/* IFI CANFD can do both Bosch FD and ISO FD */</div><div class='add'>+	priv-&gt;can.ctrlmode = CAN_CTRLMODE_FD;</div><div class='add'>+</div><div class='add'>+	/* IFI CANFD can do both Bosch FD and ISO FD */</div><div class='add'>+	priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK |</div><div class='add'>+				       CAN_CTRLMODE_LISTENONLY |</div><div class='add'>+				       CAN_CTRLMODE_FD |</div><div class='add'>+				       CAN_CTRLMODE_FD_NON_ISO |</div><div class='add'>+				       CAN_CTRLMODE_BERR_REPORTING;</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, ndev);</div><div class='add'>+	SET_NETDEV_DEV(ndev, dev);</div><div class='add'>+</div><div class='add'>+	ret = register_candev(ndev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "Failed to register (ret=%d)\n", ret);</div><div class='add'>+		goto err_reg;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_info(dev, "Driver registered: regs=%p, irq=%d, clock=%d\n",</div><div class='add'>+		 priv-&gt;base, ndev-&gt;irq, priv-&gt;can.clock.freq);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_reg:</div><div class='add'>+	free_candev(ndev);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ifi_canfd_plat_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	unregister_candev(ndev);</div><div class='add'>+	platform_set_drvdata(pdev, NULL);</div><div class='add'>+	free_candev(ndev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id ifi_canfd_of_table[] = {</div><div class='add'>+	{ .compatible = "ifi,canfd-1.0", .data = NULL },</div><div class='add'>+	{ /* sentinel */ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, ifi_canfd_of_table);</div><div class='add'>+</div><div class='add'>+static struct platform_driver ifi_canfd_plat_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name		= KBUILD_MODNAME,</div><div class='add'>+		.of_match_table	= ifi_canfd_of_table,</div><div class='add'>+	},</div><div class='add'>+	.probe	= ifi_canfd_plat_probe,</div><div class='add'>+	.remove = ifi_canfd_plat_remove,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_platform_driver(ifi_canfd_plat_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Marek Vasut &lt;marex@denx.de&gt;");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='add'>+MODULE_DESCRIPTION("CAN bus driver for IFI CANFD controller");</div><div class='head'>diff --git a/drivers/net/can/janz-ican3.c b/drivers/net/can/janz-ican3.c<br/>index c1e85368a198..1efdd1fd8caa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/janz-ican3.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/janz-ican3.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/janz-ican3.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/janz-ican3.c</a></div><div class='hunk'>@@ -1,18 +1,15 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='ctx'> /*</div><div class='ctx'>  * Janz MODULbus VMOD-ICAN3 CAN Interface Driver</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (c) 2010 Ira W. Snyder &lt;iws@ovro.caltech.edu&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms of the GNU General Public License as published by the</div><div class='del'>- * Free Software Foundation; either version 2 of the License, or (at your</div><div class='del'>- * option) any later version.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='hunk'>@@ -84,6 +81,7 @@</div><div class='ctx'> #define MSG_COFFREQ		0x42</div><div class='ctx'> #define MSG_CONREQ		0x43</div><div class='ctx'> #define MSG_CCONFREQ		0x47</div><div class='add'>+#define MSG_NMTS		0xb0</div><div class='ctx'> #define MSG_LMTS		0xb4</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -130,6 +128,22 @@</div><div class='ctx'> </div><div class='ctx'> #define ICAN3_CAN_DLC_MASK	0x0f</div><div class='ctx'> </div><div class='add'>+/* Janz ICAN3 NMTS subtypes */</div><div class='add'>+#define NMTS_CREATE_NODE_REQ	0x0</div><div class='add'>+#define NMTS_SLAVE_STATE_IND	0x8</div><div class='add'>+#define NMTS_SLAVE_EVENT_IND	0x9</div><div class='add'>+</div><div class='add'>+/* Janz ICAN3 LMTS subtypes */</div><div class='add'>+#define LMTS_BUSON_REQ		0x0</div><div class='add'>+#define LMTS_BUSOFF_REQ		0x1</div><div class='add'>+#define LMTS_CAN_CONF_REQ	0x2</div><div class='add'>+</div><div class='add'>+/* Janz ICAN3 NMTS Event indications */</div><div class='add'>+#define NE_LOCAL_OCCURRED	0x3</div><div class='add'>+#define NE_LOCAL_RESOLVED	0x2</div><div class='add'>+#define NE_REMOTE_OCCURRED	0xc</div><div class='add'>+#define NE_REMOTE_RESOLVED	0x8</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * SJA1000 Status and Error Register Definitions</div><div class='ctx'>  *</div><div class='hunk'>@@ -800,21 +814,41 @@ static int ican3_set_bus_state(struct ican3_dev *mod, bool on)</div><div class='ctx'> 		return ican3_send_msg(mod, &amp;msg);</div><div class='ctx'> </div><div class='ctx'> 	} else if (mod-&gt;fwtype == ICAN3_FWTYPE_CAL_CANOPEN) {</div><div class='add'>+		/* bittiming + can-on/off request */</div><div class='ctx'> 		memset(&amp;msg, 0, sizeof(msg));</div><div class='ctx'> 		msg.spec = MSG_LMTS;</div><div class='ctx'> 		if (on) {</div><div class='ctx'> 			msg.len = cpu_to_le16(4);</div><div class='del'>-			msg.data[0] = 0;</div><div class='add'>+			msg.data[0] = LMTS_BUSON_REQ;</div><div class='ctx'> 			msg.data[1] = 0;</div><div class='ctx'> 			msg.data[2] = btr0;</div><div class='ctx'> 			msg.data[3] = btr1;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			msg.len = cpu_to_le16(2);</div><div class='del'>-			msg.data[0] = 1;</div><div class='add'>+			msg.data[0] = LMTS_BUSOFF_REQ;</div><div class='ctx'> 			msg.data[1] = 0;</div><div class='ctx'> 		}</div><div class='add'>+		res = ican3_send_msg(mod, &amp;msg);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='ctx'> </div><div class='del'>-		return ican3_send_msg(mod, &amp;msg);</div><div class='add'>+		if (on) {</div><div class='add'>+			/* create NMT Slave Node for error processing</div><div class='add'>+			 *   class 2 (with error capability, see CiA/DS203-1)</div><div class='add'>+			 *   id    1</div><div class='add'>+			 *   name  locnod1 (must be exactly 7 bytes)</div><div class='add'>+			 */</div><div class='add'>+			memset(&amp;msg, 0, sizeof(msg));</div><div class='add'>+			msg.spec = MSG_NMTS;</div><div class='add'>+			msg.len = cpu_to_le16(11);</div><div class='add'>+			msg.data[0] = NMTS_CREATE_NODE_REQ;</div><div class='add'>+			msg.data[1] = 0;</div><div class='add'>+			msg.data[2] = 2;                 /* node class */</div><div class='add'>+			msg.data[3] = 1;                 /* node id */</div><div class='add'>+			strcpy(msg.data + 4, "locnod1"); /* node name  */</div><div class='add'>+			return ican3_send_msg(mod, &amp;msg);</div><div class='add'>+		}</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> 	return -ENOTSUPP;</div><div class='ctx'> }</div><div class='hunk'>@@ -849,12 +883,23 @@ static int ican3_set_buserror(struct ican3_dev *mod, u8 quota)</div><div class='ctx'> {</div><div class='ctx'> 	struct ican3_msg msg;</div><div class='ctx'> </div><div class='del'>-	memset(&amp;msg, 0, sizeof(msg));</div><div class='del'>-	msg.spec = MSG_CCONFREQ;</div><div class='del'>-	msg.len = cpu_to_le16(2);</div><div class='del'>-	msg.data[0] = 0x00;</div><div class='del'>-	msg.data[1] = quota;</div><div class='del'>-</div><div class='add'>+	if (mod-&gt;fwtype == ICAN3_FWTYPE_ICANOS) {</div><div class='add'>+		memset(&amp;msg, 0, sizeof(msg));</div><div class='add'>+		msg.spec = MSG_CCONFREQ;</div><div class='add'>+		msg.len = cpu_to_le16(2);</div><div class='add'>+		msg.data[0] = 0x00;</div><div class='add'>+		msg.data[1] = quota;</div><div class='add'>+	} else if (mod-&gt;fwtype == ICAN3_FWTYPE_CAL_CANOPEN) {</div><div class='add'>+		memset(&amp;msg, 0, sizeof(msg));</div><div class='add'>+		msg.spec = MSG_LMTS;</div><div class='add'>+		msg.len = cpu_to_le16(4);</div><div class='add'>+		msg.data[0] = LMTS_CAN_CONF_REQ;</div><div class='add'>+		msg.data[1] = 0x00;</div><div class='add'>+		msg.data[2] = 0x00;</div><div class='add'>+		msg.data[3] = quota;</div><div class='add'>+	} else {</div><div class='add'>+		return -ENOTSUPP;</div><div class='add'>+	}</div><div class='ctx'> 	return ican3_send_msg(mod, &amp;msg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -872,10 +917,10 @@ static void ican3_to_can_frame(struct ican3_dev *mod,</div><div class='ctx'> </div><div class='ctx'> 		cf-&gt;can_id |= desc-&gt;data[0] &lt;&lt; 3;</div><div class='ctx'> 		cf-&gt;can_id |= (desc-&gt;data[1] &amp; 0xe0) &gt;&gt; 5;</div><div class='del'>-		cf-&gt;can_dlc = get_can_dlc(desc-&gt;data[1] &amp; ICAN3_CAN_DLC_MASK);</div><div class='del'>-		memcpy(cf-&gt;data, &amp;desc-&gt;data[2], cf-&gt;can_dlc);</div><div class='add'>+		cf-&gt;len = can_cc_dlc2len(desc-&gt;data[1] &amp; ICAN3_CAN_DLC_MASK);</div><div class='add'>+		memcpy(cf-&gt;data, &amp;desc-&gt;data[2], cf-&gt;len);</div><div class='ctx'> 	} else {</div><div class='del'>-		cf-&gt;can_dlc = get_can_dlc(desc-&gt;data[0] &amp; ICAN3_CAN_DLC_MASK);</div><div class='add'>+		cf-&gt;len = can_cc_dlc2len(desc-&gt;data[0] &amp; ICAN3_CAN_DLC_MASK);</div><div class='ctx'> 		if (desc-&gt;data[0] &amp; ICAN3_EFF_RTR)</div><div class='ctx'> 			cf-&gt;can_id |= CAN_RTR_FLAG;</div><div class='ctx'> </div><div class='hunk'>@@ -890,7 +935,7 @@ static void ican3_to_can_frame(struct ican3_dev *mod,</div><div class='ctx'> 			cf-&gt;can_id |= desc-&gt;data[3] &gt;&gt; 5;  /* 2-0   */</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		memcpy(cf-&gt;data, &amp;desc-&gt;data[6], cf-&gt;can_dlc);</div><div class='add'>+		memcpy(cf-&gt;data, &amp;desc-&gt;data[6], cf-&gt;len);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -903,7 +948,7 @@ static void can_frame_to_ican3(struct ican3_dev *mod,</div><div class='ctx'> </div><div class='ctx'> 	/* we always use the extended format, with the ECHO flag set */</div><div class='ctx'> 	desc-&gt;command = ICAN3_CAN_TYPE_EFF;</div><div class='del'>-	desc-&gt;data[0] |= cf-&gt;can_dlc;</div><div class='add'>+	desc-&gt;data[0] |= cf-&gt;len;</div><div class='ctx'> 	desc-&gt;data[1] |= ICAN3_ECHO;</div><div class='ctx'> </div><div class='ctx'> 	/* support single transmission (no retries) mode */</div><div class='hunk'>@@ -926,7 +971,7 @@ static void can_frame_to_ican3(struct ican3_dev *mod,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* copy the data bits into the descriptor */</div><div class='del'>-	memcpy(&amp;desc-&gt;data[6], cf-&gt;data, cf-&gt;can_dlc);</div><div class='add'>+	memcpy(&amp;desc-&gt;data[6], cf-&gt;data, cf-&gt;len);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1083,7 +1128,7 @@ static int ican3_handle_cevtind(struct ican3_dev *mod, struct ican3_msg *msg)</div><div class='ctx'> 	/* bus error interrupt */</div><div class='ctx'> 	if (isrc == CEVTIND_BEI) {</div><div class='ctx'> 		mod-&gt;can.can_stats.bus_error++;</div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR | CAN_ERR_CNT;</div><div class='ctx'> </div><div class='ctx'> 		switch (ecc &amp; ECC_MASK) {</div><div class='ctx'> 		case ECC_BIT:</div><div class='hunk'>@@ -1096,7 +1141,6 @@ static int ican3_handle_cevtind(struct ican3_dev *mod, struct ican3_msg *msg)</div><div class='ctx'> 			cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='del'>-			cf-&gt;data[2] |= CAN_ERR_PROT_UNSPEC;</div><div class='ctx'> 			cf-&gt;data[3] = ecc &amp; ECC_SEG;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1110,7 +1154,7 @@ static int ican3_handle_cevtind(struct ican3_dev *mod, struct ican3_msg *msg)</div><div class='ctx'> </div><div class='ctx'> 	if (state != mod-&gt;can.state &amp;&amp; (state == CAN_STATE_ERROR_WARNING ||</div><div class='ctx'> 					state == CAN_STATE_ERROR_PASSIVE)) {</div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_CRTL | CAN_ERR_CNT;</div><div class='ctx'> 		if (state == CAN_STATE_ERROR_WARNING) {</div><div class='ctx'> 			mod-&gt;can.can_stats.error_warning++;</div><div class='ctx'> 			cf-&gt;data[1] = (txerr &gt; rxerr) ?</div><div class='hunk'>@@ -1151,6 +1195,41 @@ static void ican3_handle_inquiry(struct ican3_dev *mod, struct ican3_msg *msg)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Handle NMTS Slave Event Indication Messages from the firmware */</div><div class='add'>+static void ican3_handle_nmtsind(struct ican3_dev *mod, struct ican3_msg *msg)</div><div class='add'>+{</div><div class='add'>+	u16 subspec;</div><div class='add'>+</div><div class='add'>+	subspec = msg-&gt;data[0] + msg-&gt;data[1] * 0x100;</div><div class='add'>+	if (subspec == NMTS_SLAVE_EVENT_IND) {</div><div class='add'>+		switch (msg-&gt;data[2]) {</div><div class='add'>+		case NE_LOCAL_OCCURRED:</div><div class='add'>+		case NE_LOCAL_RESOLVED:</div><div class='add'>+			/* now follows the same message as Raw ICANOS CEVTIND</div><div class='add'>+			 * shift the data at the same place and call this method</div><div class='add'>+			 */</div><div class='add'>+			le16_add_cpu(&amp;msg-&gt;len, -3);</div><div class='add'>+			memmove(msg-&gt;data, msg-&gt;data + 3, le16_to_cpu(msg-&gt;len));</div><div class='add'>+			ican3_handle_cevtind(mod, msg);</div><div class='add'>+			break;</div><div class='add'>+		case NE_REMOTE_OCCURRED:</div><div class='add'>+		case NE_REMOTE_RESOLVED:</div><div class='add'>+			/* should not occurre, ignore */</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			netdev_warn(mod-&gt;ndev, "unknown NMTS event indication %x\n",</div><div class='add'>+				    msg-&gt;data[2]);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	} else if (subspec == NMTS_SLAVE_STATE_IND) {</div><div class='add'>+		/* ignore state indications */</div><div class='add'>+	} else {</div><div class='add'>+		netdev_warn(mod-&gt;ndev, "unhandled NMTS indication %x\n",</div><div class='add'>+			    subspec);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void ican3_handle_unknown_message(struct ican3_dev *mod,</div><div class='ctx'> 					struct ican3_msg *msg)</div><div class='ctx'> {</div><div class='hunk'>@@ -1180,6 +1259,9 @@ static void ican3_handle_message(struct ican3_dev *mod, struct ican3_msg *msg)</div><div class='ctx'> 	case MSG_INQUIRY:</div><div class='ctx'> 		ican3_handle_inquiry(mod, msg);</div><div class='ctx'> 		break;</div><div class='add'>+	case MSG_NMTS:</div><div class='add'>+		ican3_handle_nmtsind(mod, msg);</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		ican3_handle_unknown_message(mod, msg);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -1196,6 +1278,8 @@ static void ican3_put_echo_skb(struct ican3_dev *mod, struct sk_buff *skb)</div><div class='ctx'> 	if (!skb)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='add'>+	skb_tx_timestamp(skb);</div><div class='add'>+</div><div class='ctx'> 	/* save this skb for tx interrupt echo handling */</div><div class='ctx'> 	skb_queue_tail(&amp;mod-&gt;echoq, skb);</div><div class='ctx'> }</div><div class='hunk'>@@ -1204,7 +1288,7 @@ static unsigned int ican3_get_echo_skb(struct ican3_dev *mod)</div><div class='ctx'> {</div><div class='ctx'> 	struct sk_buff *skb = skb_dequeue(&amp;mod-&gt;echoq);</div><div class='ctx'> 	struct can_frame *cf;</div><div class='del'>-	u8 dlc;</div><div class='add'>+	u8 dlc = 0;</div><div class='ctx'> </div><div class='ctx'> 	/* this should never trigger unless there is a driver bug */</div><div class='ctx'> 	if (!skb) {</div><div class='hunk'>@@ -1213,7 +1297,8 @@ static unsigned int ican3_get_echo_skb(struct ican3_dev *mod)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	cf = (struct can_frame *)skb-&gt;data;</div><div class='del'>-	dlc = cf-&gt;can_dlc;</div><div class='add'>+	if (!(cf-&gt;can_id &amp; CAN_RTR_FLAG))</div><div class='add'>+		dlc = cf-&gt;len;</div><div class='ctx'> </div><div class='ctx'> 	/* check flag whether this packet has to be looped back */</div><div class='ctx'> 	if (skb-&gt;pkt_type != PACKET_LOOPBACK) {</div><div class='hunk'>@@ -1251,10 +1336,10 @@ static bool ican3_echo_skb_matches(struct ican3_dev *mod, struct sk_buff *skb)</div><div class='ctx'> 	if (cf-&gt;can_id != echo_cf-&gt;can_id)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	if (cf-&gt;can_dlc != echo_cf-&gt;can_dlc)</div><div class='add'>+	if (cf-&gt;len != echo_cf-&gt;len)</div><div class='ctx'> 		return false;</div><div class='ctx'> </div><div class='del'>-	return memcmp(cf-&gt;data, echo_cf-&gt;data, cf-&gt;can_dlc) == 0;</div><div class='add'>+	return memcmp(cf-&gt;data, echo_cf-&gt;data, cf-&gt;len) == 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1340,7 +1425,8 @@ static int ican3_recv_skb(struct ican3_dev *mod)</div><div class='ctx'> </div><div class='ctx'> 	/* update statistics, receive the skb */</div><div class='ctx'> 	stats-&gt;rx_packets++;</div><div class='del'>-	stats-&gt;rx_bytes += cf-&gt;can_dlc;</div><div class='add'>+	if (!(cf-&gt;can_id &amp; CAN_RTR_FLAG))</div><div class='add'>+		stats-&gt;rx_bytes += cf-&gt;len;</div><div class='ctx'> 	netif_receive_skb(skb);</div><div class='ctx'> </div><div class='ctx'> err_noalloc:</div><div class='hunk'>@@ -1370,7 +1456,7 @@ static int ican3_napi(struct napi_struct *napi, int budget)</div><div class='ctx'> </div><div class='ctx'> 	/* process all communication messages */</div><div class='ctx'> 	while (true) {</div><div class='del'>-		struct ican3_msg uninitialized_var(msg);</div><div class='add'>+		struct ican3_msg msg;</div><div class='ctx'> 		ret = ican3_recv_msg(mod, &amp;msg);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -1390,7 +1476,7 @@ static int ican3_napi(struct napi_struct *napi, int budget)</div><div class='ctx'> 	/* We have processed all packets that the adapter had, but it</div><div class='ctx'> 	 * was less than our budget, stop polling */</div><div class='ctx'> 	if (received &lt; budget)</div><div class='del'>-		napi_complete(napi);</div><div class='add'>+		napi_complete_done(napi, received);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;mod-&gt;lock, flags);</div><div class='ctx'> </div><div class='hunk'>@@ -1599,7 +1685,7 @@ static int ican3_stop(struct net_device *ndev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ican3_xmit(struct sk_buff *skb, struct net_device *ndev)</div><div class='add'>+static netdev_tx_t ican3_xmit(struct sk_buff *skb, struct net_device *ndev)</div><div class='ctx'> {</div><div class='ctx'> 	struct ican3_dev *mod = netdev_priv(ndev);</div><div class='ctx'> 	struct can_frame *cf = (struct can_frame *)skb-&gt;data;</div><div class='hunk'>@@ -1607,7 +1693,7 @@ static int ican3_xmit(struct sk_buff *skb, struct net_device *ndev)</div><div class='ctx'> 	void __iomem *desc_addr;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	if (can_dropped_invalid_skb(ndev, skb))</div><div class='add'>+	if (can_dev_dropped_skb(ndev, skb))</div><div class='ctx'> 		return NETDEV_TX_OK;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;mod-&gt;lock, flags);</div><div class='hunk'>@@ -1666,7 +1752,10 @@ static const struct net_device_ops ican3_netdev_ops = {</div><div class='ctx'> 	.ndo_open	= ican3_open,</div><div class='ctx'> 	.ndo_stop	= ican3_stop,</div><div class='ctx'> 	.ndo_start_xmit	= ican3_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops ican3_ethtool_ops = {</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1734,9 +1823,9 @@ static int ican3_get_berr_counter(const struct net_device *ndev,</div><div class='ctx'>  * Sysfs Attributes</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static ssize_t ican3_sysfs_show_term(struct device *dev,</div><div class='del'>-				     struct device_attribute *attr,</div><div class='del'>-				     char *buf)</div><div class='add'>+static ssize_t termination_show(struct device *dev,</div><div class='add'>+				struct device_attribute *attr,</div><div class='add'>+				char *buf)</div><div class='ctx'> {</div><div class='ctx'> 	struct ican3_dev *mod = netdev_priv(to_net_dev(dev));</div><div class='ctx'> 	int ret;</div><div class='hunk'>@@ -1750,12 +1839,12 @@ static ssize_t ican3_sysfs_show_term(struct device *dev,</div><div class='ctx'> 		return -ETIMEDOUT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return snprintf(buf, PAGE_SIZE, "%u\n", mod-&gt;termination_enabled);</div><div class='add'>+	return sysfs_emit(buf, "%u\n", mod-&gt;termination_enabled);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static ssize_t ican3_sysfs_set_term(struct device *dev,</div><div class='del'>-				    struct device_attribute *attr,</div><div class='del'>-				    const char *buf, size_t count)</div><div class='add'>+static ssize_t termination_store(struct device *dev,</div><div class='add'>+				 struct device_attribute *attr,</div><div class='add'>+				 const char *buf, size_t count)</div><div class='ctx'> {</div><div class='ctx'> 	struct ican3_dev *mod = netdev_priv(to_net_dev(dev));</div><div class='ctx'> 	unsigned long enable;</div><div class='hunk'>@@ -1771,18 +1860,17 @@ static ssize_t ican3_sysfs_set_term(struct device *dev,</div><div class='ctx'> 	return count;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static ssize_t ican3_sysfs_show_fwinfo(struct device *dev,</div><div class='del'>-				       struct device_attribute *attr,</div><div class='del'>-				       char *buf)</div><div class='add'>+static ssize_t fwinfo_show(struct device *dev,</div><div class='add'>+			   struct device_attribute *attr,</div><div class='add'>+			   char *buf)</div><div class='ctx'> {</div><div class='ctx'> 	struct ican3_dev *mod = netdev_priv(to_net_dev(dev));</div><div class='ctx'> </div><div class='del'>-	return scnprintf(buf, PAGE_SIZE, "%s\n", mod-&gt;fwinfo);</div><div class='add'>+	return sysfs_emit(buf, "%s\n", mod-&gt;fwinfo);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static DEVICE_ATTR(termination, S_IWUSR | S_IRUGO, ican3_sysfs_show_term,</div><div class='del'>-						   ican3_sysfs_set_term);</div><div class='del'>-static DEVICE_ATTR(fwinfo, S_IRUSR | S_IRUGO, ican3_sysfs_show_fwinfo, NULL);</div><div class='add'>+static DEVICE_ATTR_RW(termination);</div><div class='add'>+static DEVICE_ATTR_RO(fwinfo);</div><div class='ctx'> </div><div class='ctx'> static struct attribute *ican3_sysfs_attrs[] = {</div><div class='ctx'> 	&amp;dev_attr_termination.attr,</div><div class='hunk'>@@ -1790,7 +1878,7 @@ static struct attribute *ican3_sysfs_attrs[] = {</div><div class='ctx'> 	NULL,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct attribute_group ican3_sysfs_attr_group = {</div><div class='add'>+static const struct attribute_group ican3_sysfs_attr_group = {</div><div class='ctx'> 	.attrs = ican3_sysfs_attrs,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1828,7 +1916,7 @@ static int ican3_probe(struct platform_device *pdev)</div><div class='ctx'> 	mod = netdev_priv(ndev);</div><div class='ctx'> 	mod-&gt;ndev = ndev;</div><div class='ctx'> 	mod-&gt;num = pdata-&gt;modno;</div><div class='del'>-	netif_napi_add(ndev, &amp;mod-&gt;napi, ican3_napi, ICAN3_RX_BUFFERS);</div><div class='add'>+	netif_napi_add_weight(ndev, &amp;mod-&gt;napi, ican3_napi, ICAN3_RX_BUFFERS);</div><div class='ctx'> 	skb_queue_head_init(&amp;mod-&gt;echoq);</div><div class='ctx'> 	spin_lock_init(&amp;mod-&gt;lock);</div><div class='ctx'> 	init_completion(&amp;mod-&gt;termination_comp);</div><div class='hunk'>@@ -1841,6 +1929,7 @@ static int ican3_probe(struct platform_device *pdev)</div><div class='ctx'> 	mod-&gt;free_page = DPM_FREE_START;</div><div class='ctx'> </div><div class='ctx'> 	ndev-&gt;netdev_ops = &amp;ican3_netdev_ops;</div><div class='add'>+	ndev-&gt;ethtool_ops = &amp;ican3_ethtool_ops;</div><div class='ctx'> 	ndev-&gt;flags |= IFF_ECHO;</div><div class='ctx'> 	SET_NETDEV_DEV(ndev, &amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='hunk'>@@ -1855,7 +1944,6 @@ static int ican3_probe(struct platform_device *pdev)</div><div class='ctx'> 	/* find our IRQ number */</div><div class='ctx'> 	mod-&gt;irq = platform_get_irq(pdev, 0);</div><div class='ctx'> 	if (mod-&gt;irq &lt; 0) {</div><div class='del'>-		dev_err(dev, "IRQ line not found\n");</div><div class='ctx'> 		ret = -ENODEV;</div><div class='ctx'> 		goto out_free_ndev;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1934,7 +2022,7 @@ out_return:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ican3_remove(struct platform_device *pdev)</div><div class='add'>+static void ican3_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *ndev = platform_get_drvdata(pdev);</div><div class='ctx'> 	struct ican3_dev *mod = netdev_priv(ndev);</div><div class='hunk'>@@ -1953,8 +2041,6 @@ static int ican3_remove(struct platform_device *pdev)</div><div class='ctx'> 	iounmap(mod-&gt;dpm);</div><div class='ctx'> </div><div class='ctx'> 	free_candev(ndev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver ican3_driver = {</div><div class='head'>diff --git a/drivers/net/can/kvaser_pciefd/Makefile b/drivers/net/can/kvaser_pciefd/Makefile<br/>new file mode 100644<br/>index 000000000000..8c5b8cdc6b5f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/kvaser_pciefd/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/kvaser_pciefd/Makefile</a></div><div class='hunk'>@@ -0,0 +1,3 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+obj-$(CONFIG_CAN_KVASER_PCIEFD) += kvaser_pciefd.o</div><div class='add'>+kvaser_pciefd-y = kvaser_pciefd_core.o kvaser_pciefd_devlink.o</div><div class='head'>diff --git a/drivers/net/can/kvaser_pciefd/kvaser_pciefd.h b/drivers/net/can/kvaser_pciefd/kvaser_pciefd.h<br/>new file mode 100644<br/>index 000000000000..08c9ddc1ee85<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/kvaser_pciefd/kvaser_pciefd.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/kvaser_pciefd/kvaser_pciefd.h</a></div><div class='hunk'>@@ -0,0 +1,96 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */</div><div class='add'>+/* kvaser_pciefd common definitions and declarations</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 KVASER AB, Sweden. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _KVASER_PCIEFD_H</div><div class='add'>+#define _KVASER_PCIEFD_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/completion.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/timer.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;net/devlink.h&gt;</div><div class='add'>+</div><div class='add'>+#define KVASER_PCIEFD_MAX_CAN_CHANNELS 8UL</div><div class='add'>+#define KVASER_PCIEFD_DMA_COUNT 2U</div><div class='add'>+#define KVASER_PCIEFD_DMA_SIZE (4U * 1024U)</div><div class='add'>+#define KVASER_PCIEFD_CAN_TX_MAX_COUNT 17U</div><div class='add'>+</div><div class='add'>+struct kvaser_pciefd;</div><div class='add'>+</div><div class='add'>+struct kvaser_pciefd_address_offset {</div><div class='add'>+	u32 serdes;</div><div class='add'>+	u32 pci_ien;</div><div class='add'>+	u32 pci_irq;</div><div class='add'>+	u32 sysid;</div><div class='add'>+	u32 loopback;</div><div class='add'>+	u32 kcan_srb_fifo;</div><div class='add'>+	u32 kcan_srb;</div><div class='add'>+	u32 kcan_ch0;</div><div class='add'>+	u32 kcan_ch1;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct kvaser_pciefd_irq_mask {</div><div class='add'>+	u32 kcan_rx0;</div><div class='add'>+	u32 kcan_tx[KVASER_PCIEFD_MAX_CAN_CHANNELS];</div><div class='add'>+	u32 all;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct kvaser_pciefd_dev_ops {</div><div class='add'>+	void (*kvaser_pciefd_write_dma_map)(struct kvaser_pciefd *pcie,</div><div class='add'>+					    dma_addr_t addr, int index);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct kvaser_pciefd_driver_data {</div><div class='add'>+	const struct kvaser_pciefd_address_offset *address_offset;</div><div class='add'>+	const struct kvaser_pciefd_irq_mask *irq_mask;</div><div class='add'>+	const struct kvaser_pciefd_dev_ops *ops;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct kvaser_pciefd_fw_version {</div><div class='add'>+	u8 major;</div><div class='add'>+	u8 minor;</div><div class='add'>+	u16 build;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct kvaser_pciefd_can {</div><div class='add'>+	struct can_priv can;</div><div class='add'>+	struct devlink_port devlink_port;</div><div class='add'>+	struct kvaser_pciefd *kv_pcie;</div><div class='add'>+	void __iomem *reg_base;</div><div class='add'>+	struct can_berr_counter bec;</div><div class='add'>+	u32 ioc;</div><div class='add'>+	u8 cmd_seq;</div><div class='add'>+	u8 tx_max_count;</div><div class='add'>+	u8 tx_idx;</div><div class='add'>+	u8 ack_idx;</div><div class='add'>+	int err_rep_cnt;</div><div class='add'>+	unsigned int completed_tx_pkts;</div><div class='add'>+	unsigned int completed_tx_bytes;</div><div class='add'>+	spinlock_t lock; /* Locks sensitive registers (e.g. MODE) */</div><div class='add'>+	struct timer_list bec_poll_timer;</div><div class='add'>+	struct completion start_comp, flush_comp;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct kvaser_pciefd {</div><div class='add'>+	struct pci_dev *pci;</div><div class='add'>+	void __iomem *reg_base;</div><div class='add'>+	struct kvaser_pciefd_can *can[KVASER_PCIEFD_MAX_CAN_CHANNELS];</div><div class='add'>+	const struct kvaser_pciefd_driver_data *driver_data;</div><div class='add'>+	void *dma_data[KVASER_PCIEFD_DMA_COUNT];</div><div class='add'>+	u8 nr_channels;</div><div class='add'>+	u32 bus_freq;</div><div class='add'>+	u32 freq;</div><div class='add'>+	u32 freq_to_ticks_div;</div><div class='add'>+	struct kvaser_pciefd_fw_version fw_version;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+extern const struct devlink_ops kvaser_pciefd_devlink_ops;</div><div class='add'>+</div><div class='add'>+int kvaser_pciefd_devlink_port_register(struct kvaser_pciefd_can *can);</div><div class='add'>+void kvaser_pciefd_devlink_port_unregister(struct kvaser_pciefd_can *can);</div><div class='add'>+#endif /* _KVASER_PCIEFD_H */</div><div class='head'>diff --git a/drivers/net/can/kvaser_pciefd/kvaser_pciefd_core.c b/drivers/net/can/kvaser_pciefd/kvaser_pciefd_core.c<br/>new file mode 100644<br/>index 000000000000..d8c9bfb20230<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/kvaser_pciefd/kvaser_pciefd_core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/kvaser_pciefd/kvaser_pciefd_core.c</a></div><div class='hunk'>@@ -0,0 +1,1908 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+/* Copyright (C) 2018 KVASER AB, Sweden. All rights reserved.</div><div class='add'>+ * Parts of this driver are based on the following:</div><div class='add'>+ *  - Kvaser linux pciefd driver (version 5.42)</div><div class='add'>+ *  - PEAK linux canfd driver</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "kvaser_pciefd.h"</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/iopoll.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/minmax.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/timer.h&gt;</div><div class='add'>+#include &lt;net/netdev_queues.h&gt;</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("Dual BSD/GPL");</div><div class='add'>+MODULE_AUTHOR("Kvaser AB &lt;support@kvaser.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("CAN driver for Kvaser CAN/PCIe devices");</div><div class='add'>+</div><div class='add'>+#define KVASER_PCIEFD_DRV_NAME "kvaser_pciefd"</div><div class='add'>+</div><div class='add'>+#define KVASER_PCIEFD_WAIT_TIMEOUT msecs_to_jiffies(1000)</div><div class='add'>+#define KVASER_PCIEFD_BEC_POLL_FREQ (jiffies + msecs_to_jiffies(200))</div><div class='add'>+#define KVASER_PCIEFD_MAX_ERR_REP 256U</div><div class='add'>+</div><div class='add'>+#define KVASER_PCIEFD_VENDOR 0x1a07</div><div class='add'>+</div><div class='add'>+/* Altera based devices */</div><div class='add'>+#define KVASER_PCIEFD_4HS_DEVICE_ID 0x000d</div><div class='add'>+#define KVASER_PCIEFD_2HS_V2_DEVICE_ID 0x000e</div><div class='add'>+#define KVASER_PCIEFD_HS_V2_DEVICE_ID 0x000f</div><div class='add'>+#define KVASER_PCIEFD_MINIPCIE_HS_V2_DEVICE_ID 0x0010</div><div class='add'>+#define KVASER_PCIEFD_MINIPCIE_2HS_V2_DEVICE_ID 0x0011</div><div class='add'>+</div><div class='add'>+/* SmartFusion2 based devices */</div><div class='add'>+#define KVASER_PCIEFD_2CAN_V3_DEVICE_ID 0x0012</div><div class='add'>+#define KVASER_PCIEFD_1CAN_V3_DEVICE_ID 0x0013</div><div class='add'>+#define KVASER_PCIEFD_4CAN_V2_DEVICE_ID 0x0014</div><div class='add'>+#define KVASER_PCIEFD_MINIPCIE_2CAN_V3_DEVICE_ID 0x0015</div><div class='add'>+#define KVASER_PCIEFD_MINIPCIE_1CAN_V3_DEVICE_ID 0x0016</div><div class='add'>+</div><div class='add'>+/* Xilinx based devices */</div><div class='add'>+#define KVASER_PCIEFD_M2_4CAN_DEVICE_ID 0x0017</div><div class='add'>+#define KVASER_PCIEFD_8CAN_DEVICE_ID 0x0019</div><div class='add'>+</div><div class='add'>+/* Altera SerDes Enable 64-bit DMA address translation */</div><div class='add'>+#define KVASER_PCIEFD_ALTERA_DMA_64BIT BIT(0)</div><div class='add'>+</div><div class='add'>+/* SmartFusion2 SerDes LSB address translation mask */</div><div class='add'>+#define KVASER_PCIEFD_SF2_DMA_LSB_MASK GENMASK(31, 12)</div><div class='add'>+</div><div class='add'>+/* Xilinx SerDes LSB address translation mask */</div><div class='add'>+#define KVASER_PCIEFD_XILINX_DMA_LSB_MASK GENMASK(31, 12)</div><div class='add'>+</div><div class='add'>+/* Kvaser KCAN CAN controller registers */</div><div class='add'>+#define KVASER_PCIEFD_KCAN_FIFO_REG 0x100</div><div class='add'>+#define KVASER_PCIEFD_KCAN_FIFO_LAST_REG 0x180</div><div class='add'>+#define KVASER_PCIEFD_KCAN_CTRL_REG 0x2c0</div><div class='add'>+#define KVASER_PCIEFD_KCAN_CMD_REG 0x400</div><div class='add'>+#define KVASER_PCIEFD_KCAN_IOC_REG 0x404</div><div class='add'>+#define KVASER_PCIEFD_KCAN_IEN_REG 0x408</div><div class='add'>+#define KVASER_PCIEFD_KCAN_IRQ_REG 0x410</div><div class='add'>+#define KVASER_PCIEFD_KCAN_TX_NR_PACKETS_REG 0x414</div><div class='add'>+#define KVASER_PCIEFD_KCAN_STAT_REG 0x418</div><div class='add'>+#define KVASER_PCIEFD_KCAN_MODE_REG 0x41c</div><div class='add'>+#define KVASER_PCIEFD_KCAN_BTRN_REG 0x420</div><div class='add'>+#define KVASER_PCIEFD_KCAN_BUS_LOAD_REG 0x424</div><div class='add'>+#define KVASER_PCIEFD_KCAN_BTRD_REG 0x428</div><div class='add'>+#define KVASER_PCIEFD_KCAN_PWM_REG 0x430</div><div class='add'>+/* System identification and information registers */</div><div class='add'>+#define KVASER_PCIEFD_SYSID_VERSION_REG 0x8</div><div class='add'>+#define KVASER_PCIEFD_SYSID_CANFREQ_REG 0xc</div><div class='add'>+#define KVASER_PCIEFD_SYSID_BUSFREQ_REG 0x10</div><div class='add'>+#define KVASER_PCIEFD_SYSID_BUILD_REG 0x14</div><div class='add'>+/* Shared receive buffer FIFO registers */</div><div class='add'>+#define KVASER_PCIEFD_SRB_FIFO_LAST_REG 0x1f4</div><div class='add'>+/* Shared receive buffer registers */</div><div class='add'>+#define KVASER_PCIEFD_SRB_CMD_REG 0x0</div><div class='add'>+#define KVASER_PCIEFD_SRB_IEN_REG 0x04</div><div class='add'>+#define KVASER_PCIEFD_SRB_IRQ_REG 0x0c</div><div class='add'>+#define KVASER_PCIEFD_SRB_STAT_REG 0x10</div><div class='add'>+#define KVASER_PCIEFD_SRB_RX_NR_PACKETS_REG 0x14</div><div class='add'>+#define KVASER_PCIEFD_SRB_CTRL_REG 0x18</div><div class='add'>+</div><div class='add'>+/* System build information fields */</div><div class='add'>+#define KVASER_PCIEFD_SYSID_VERSION_NR_CHAN_MASK GENMASK(31, 24)</div><div class='add'>+#define KVASER_PCIEFD_SYSID_VERSION_MAJOR_MASK GENMASK(23, 16)</div><div class='add'>+#define KVASER_PCIEFD_SYSID_VERSION_MINOR_MASK GENMASK(7, 0)</div><div class='add'>+#define KVASER_PCIEFD_SYSID_BUILD_SEQ_MASK GENMASK(15, 1)</div><div class='add'>+</div><div class='add'>+/* Reset DMA buffer 0, 1 and FIFO offset */</div><div class='add'>+#define KVASER_PCIEFD_SRB_CMD_RDB1 BIT(5)</div><div class='add'>+#define KVASER_PCIEFD_SRB_CMD_RDB0 BIT(4)</div><div class='add'>+#define KVASER_PCIEFD_SRB_CMD_FOR BIT(0)</div><div class='add'>+</div><div class='add'>+/* DMA underflow, buffer 0 and 1 */</div><div class='add'>+#define KVASER_PCIEFD_SRB_IRQ_DUF1 BIT(13)</div><div class='add'>+#define KVASER_PCIEFD_SRB_IRQ_DUF0 BIT(12)</div><div class='add'>+/* DMA overflow, buffer 0 and 1 */</div><div class='add'>+#define KVASER_PCIEFD_SRB_IRQ_DOF1 BIT(11)</div><div class='add'>+#define KVASER_PCIEFD_SRB_IRQ_DOF0 BIT(10)</div><div class='add'>+/* DMA packet done, buffer 0 and 1 */</div><div class='add'>+#define KVASER_PCIEFD_SRB_IRQ_DPD1 BIT(9)</div><div class='add'>+#define KVASER_PCIEFD_SRB_IRQ_DPD0 BIT(8)</div><div class='add'>+</div><div class='add'>+/* Got DMA support */</div><div class='add'>+#define KVASER_PCIEFD_SRB_STAT_DMA BIT(24)</div><div class='add'>+/* DMA idle */</div><div class='add'>+#define KVASER_PCIEFD_SRB_STAT_DI BIT(15)</div><div class='add'>+</div><div class='add'>+/* SRB current packet level */</div><div class='add'>+#define KVASER_PCIEFD_SRB_RX_NR_PACKETS_MASK GENMASK(7, 0)</div><div class='add'>+</div><div class='add'>+/* DMA Enable */</div><div class='add'>+#define KVASER_PCIEFD_SRB_CTRL_DMA_ENABLE BIT(0)</div><div class='add'>+</div><div class='add'>+/* KCAN CTRL packet types */</div><div class='add'>+#define KVASER_PCIEFD_KCAN_CTRL_TYPE_MASK GENMASK(31, 29)</div><div class='add'>+#define KVASER_PCIEFD_KCAN_CTRL_TYPE_EFLUSH 0x4</div><div class='add'>+#define KVASER_PCIEFD_KCAN_CTRL_TYPE_EFRAME 0x5</div><div class='add'>+</div><div class='add'>+/* Command sequence number */</div><div class='add'>+#define KVASER_PCIEFD_KCAN_CMD_SEQ_MASK GENMASK(23, 16)</div><div class='add'>+/* Command bits */</div><div class='add'>+#define KVASER_PCIEFD_KCAN_CMD_MASK GENMASK(5, 0)</div><div class='add'>+/* Abort, flush and reset */</div><div class='add'>+#define KVASER_PCIEFD_KCAN_CMD_AT BIT(1)</div><div class='add'>+/* Request status packet */</div><div class='add'>+#define KVASER_PCIEFD_KCAN_CMD_SRQ BIT(0)</div><div class='add'>+</div><div class='add'>+/* Control CAN LED, active low */</div><div class='add'>+#define KVASER_PCIEFD_KCAN_IOC_LED BIT(0)</div><div class='add'>+</div><div class='add'>+/* Transmitter unaligned */</div><div class='add'>+#define KVASER_PCIEFD_KCAN_IRQ_TAL BIT(17)</div><div class='add'>+/* Tx FIFO empty */</div><div class='add'>+#define KVASER_PCIEFD_KCAN_IRQ_TE BIT(16)</div><div class='add'>+/* Tx FIFO overflow */</div><div class='add'>+#define KVASER_PCIEFD_KCAN_IRQ_TOF BIT(15)</div><div class='add'>+/* Tx buffer flush done */</div><div class='add'>+#define KVASER_PCIEFD_KCAN_IRQ_TFD BIT(14)</div><div class='add'>+/* Abort done */</div><div class='add'>+#define KVASER_PCIEFD_KCAN_IRQ_ABD BIT(13)</div><div class='add'>+/* Rx FIFO overflow */</div><div class='add'>+#define KVASER_PCIEFD_KCAN_IRQ_ROF BIT(5)</div><div class='add'>+/* FDF bit when controller is in classic CAN mode */</div><div class='add'>+#define KVASER_PCIEFD_KCAN_IRQ_FDIC BIT(3)</div><div class='add'>+/* Bus parameter protection error */</div><div class='add'>+#define KVASER_PCIEFD_KCAN_IRQ_BPP BIT(2)</div><div class='add'>+/* Tx FIFO unaligned end */</div><div class='add'>+#define KVASER_PCIEFD_KCAN_IRQ_TAE BIT(1)</div><div class='add'>+/* Tx FIFO unaligned read */</div><div class='add'>+#define KVASER_PCIEFD_KCAN_IRQ_TAR BIT(0)</div><div class='add'>+</div><div class='add'>+/* Tx FIFO size */</div><div class='add'>+#define KVASER_PCIEFD_KCAN_TX_NR_PACKETS_MAX_MASK GENMASK(23, 16)</div><div class='add'>+/* Tx FIFO current packet level */</div><div class='add'>+#define KVASER_PCIEFD_KCAN_TX_NR_PACKETS_CURRENT_MASK GENMASK(7, 0)</div><div class='add'>+</div><div class='add'>+/* Current status packet sequence number */</div><div class='add'>+#define KVASER_PCIEFD_KCAN_STAT_SEQNO_MASK GENMASK(31, 24)</div><div class='add'>+/* Controller got CAN FD capability */</div><div class='add'>+#define KVASER_PCIEFD_KCAN_STAT_FD BIT(19)</div><div class='add'>+/* Controller got one-shot capability */</div><div class='add'>+#define KVASER_PCIEFD_KCAN_STAT_CAP BIT(16)</div><div class='add'>+/* Controller in reset mode */</div><div class='add'>+#define KVASER_PCIEFD_KCAN_STAT_IRM BIT(15)</div><div class='add'>+/* Reset mode request */</div><div class='add'>+#define KVASER_PCIEFD_KCAN_STAT_RMR BIT(14)</div><div class='add'>+/* Bus off */</div><div class='add'>+#define KVASER_PCIEFD_KCAN_STAT_BOFF BIT(11)</div><div class='add'>+/* Idle state. Controller in reset mode and no abort or flush pending */</div><div class='add'>+#define KVASER_PCIEFD_KCAN_STAT_IDLE BIT(10)</div><div class='add'>+/* Abort request */</div><div class='add'>+#define KVASER_PCIEFD_KCAN_STAT_AR BIT(7)</div><div class='add'>+/* Controller is bus off */</div><div class='add'>+#define KVASER_PCIEFD_KCAN_STAT_BUS_OFF_MASK \</div><div class='add'>+	(KVASER_PCIEFD_KCAN_STAT_AR | KVASER_PCIEFD_KCAN_STAT_BOFF | \</div><div class='add'>+	 KVASER_PCIEFD_KCAN_STAT_RMR | KVASER_PCIEFD_KCAN_STAT_IRM)</div><div class='add'>+</div><div class='add'>+/* Classic CAN mode */</div><div class='add'>+#define KVASER_PCIEFD_KCAN_MODE_CCM BIT(31)</div><div class='add'>+/* Active error flag enable. Clear to force error passive */</div><div class='add'>+#define KVASER_PCIEFD_KCAN_MODE_EEN BIT(23)</div><div class='add'>+/* Acknowledgment packet type */</div><div class='add'>+#define KVASER_PCIEFD_KCAN_MODE_APT BIT(20)</div><div class='add'>+/* CAN FD non-ISO */</div><div class='add'>+#define KVASER_PCIEFD_KCAN_MODE_NIFDEN BIT(15)</div><div class='add'>+/* Error packet enable */</div><div class='add'>+#define KVASER_PCIEFD_KCAN_MODE_EPEN BIT(12)</div><div class='add'>+/* Listen only mode */</div><div class='add'>+#define KVASER_PCIEFD_KCAN_MODE_LOM BIT(9)</div><div class='add'>+/* Reset mode */</div><div class='add'>+#define KVASER_PCIEFD_KCAN_MODE_RM BIT(8)</div><div class='add'>+</div><div class='add'>+/* BTRN and BTRD fields */</div><div class='add'>+#define KVASER_PCIEFD_KCAN_BTRN_TSEG2_MASK GENMASK(30, 26)</div><div class='add'>+#define KVASER_PCIEFD_KCAN_BTRN_TSEG1_MASK GENMASK(25, 17)</div><div class='add'>+#define KVASER_PCIEFD_KCAN_BTRN_SJW_MASK GENMASK(16, 13)</div><div class='add'>+#define KVASER_PCIEFD_KCAN_BTRN_BRP_MASK GENMASK(12, 0)</div><div class='add'>+</div><div class='add'>+/* PWM Control fields */</div><div class='add'>+#define KVASER_PCIEFD_KCAN_PWM_TOP_MASK GENMASK(23, 16)</div><div class='add'>+#define KVASER_PCIEFD_KCAN_PWM_TRIGGER_MASK GENMASK(7, 0)</div><div class='add'>+</div><div class='add'>+/* KCAN packet type IDs */</div><div class='add'>+#define KVASER_PCIEFD_PACK_TYPE_DATA 0x0</div><div class='add'>+#define KVASER_PCIEFD_PACK_TYPE_ACK 0x1</div><div class='add'>+#define KVASER_PCIEFD_PACK_TYPE_TXRQ 0x2</div><div class='add'>+#define KVASER_PCIEFD_PACK_TYPE_ERROR 0x3</div><div class='add'>+#define KVASER_PCIEFD_PACK_TYPE_EFLUSH_ACK 0x4</div><div class='add'>+#define KVASER_PCIEFD_PACK_TYPE_EFRAME_ACK 0x5</div><div class='add'>+#define KVASER_PCIEFD_PACK_TYPE_ACK_DATA 0x6</div><div class='add'>+#define KVASER_PCIEFD_PACK_TYPE_STATUS 0x8</div><div class='add'>+#define KVASER_PCIEFD_PACK_TYPE_BUS_LOAD 0x9</div><div class='add'>+</div><div class='add'>+/* Common KCAN packet definitions, second word */</div><div class='add'>+#define KVASER_PCIEFD_PACKET_TYPE_MASK GENMASK(31, 28)</div><div class='add'>+#define KVASER_PCIEFD_PACKET_CHID_MASK GENMASK(27, 25)</div><div class='add'>+#define KVASER_PCIEFD_PACKET_SEQ_MASK GENMASK(7, 0)</div><div class='add'>+</div><div class='add'>+/* KCAN Transmit/Receive data packet, first word */</div><div class='add'>+#define KVASER_PCIEFD_RPACKET_IDE BIT(30)</div><div class='add'>+#define KVASER_PCIEFD_RPACKET_RTR BIT(29)</div><div class='add'>+#define KVASER_PCIEFD_RPACKET_ID_MASK GENMASK(28, 0)</div><div class='add'>+/* KCAN Transmit data packet, second word */</div><div class='add'>+#define KVASER_PCIEFD_TPACKET_AREQ BIT(31)</div><div class='add'>+#define KVASER_PCIEFD_TPACKET_SMS BIT(16)</div><div class='add'>+/* KCAN Transmit/Receive data packet, second word */</div><div class='add'>+#define KVASER_PCIEFD_RPACKET_FDF BIT(15)</div><div class='add'>+#define KVASER_PCIEFD_RPACKET_BRS BIT(14)</div><div class='add'>+#define KVASER_PCIEFD_RPACKET_ESI BIT(13)</div><div class='add'>+#define KVASER_PCIEFD_RPACKET_DLC_MASK GENMASK(11, 8)</div><div class='add'>+</div><div class='add'>+/* KCAN Transmit acknowledge packet, first word */</div><div class='add'>+#define KVASER_PCIEFD_APACKET_NACK BIT(11)</div><div class='add'>+#define KVASER_PCIEFD_APACKET_ABL BIT(10)</div><div class='add'>+#define KVASER_PCIEFD_APACKET_CT BIT(9)</div><div class='add'>+#define KVASER_PCIEFD_APACKET_FLU BIT(8)</div><div class='add'>+</div><div class='add'>+/* KCAN Status packet, first word */</div><div class='add'>+#define KVASER_PCIEFD_SPACK_RMCD BIT(22)</div><div class='add'>+#define KVASER_PCIEFD_SPACK_IRM BIT(21)</div><div class='add'>+#define KVASER_PCIEFD_SPACK_IDET BIT(20)</div><div class='add'>+#define KVASER_PCIEFD_SPACK_BOFF BIT(16)</div><div class='add'>+#define KVASER_PCIEFD_SPACK_RXERR_MASK GENMASK(15, 8)</div><div class='add'>+#define KVASER_PCIEFD_SPACK_TXERR_MASK GENMASK(7, 0)</div><div class='add'>+/* KCAN Status packet, second word */</div><div class='add'>+#define KVASER_PCIEFD_SPACK_EPLR BIT(24)</div><div class='add'>+#define KVASER_PCIEFD_SPACK_EWLR BIT(23)</div><div class='add'>+#define KVASER_PCIEFD_SPACK_AUTO BIT(21)</div><div class='add'>+</div><div class='add'>+/* KCAN Error detected packet, second word */</div><div class='add'>+#define KVASER_PCIEFD_EPACK_DIR_TX BIT(0)</div><div class='add'>+</div><div class='add'>+/* Macros for calculating addresses of registers */</div><div class='add'>+#define KVASER_PCIEFD_GET_BLOCK_ADDR(pcie, block) \</div><div class='add'>+	((pcie)-&gt;reg_base + (pcie)-&gt;driver_data-&gt;address_offset-&gt;block)</div><div class='add'>+#define KVASER_PCIEFD_PCI_IEN_ADDR(pcie) \</div><div class='add'>+	(KVASER_PCIEFD_GET_BLOCK_ADDR((pcie), pci_ien))</div><div class='add'>+#define KVASER_PCIEFD_PCI_IRQ_ADDR(pcie) \</div><div class='add'>+	(KVASER_PCIEFD_GET_BLOCK_ADDR((pcie), pci_irq))</div><div class='add'>+#define KVASER_PCIEFD_SERDES_ADDR(pcie) \</div><div class='add'>+	(KVASER_PCIEFD_GET_BLOCK_ADDR((pcie), serdes))</div><div class='add'>+#define KVASER_PCIEFD_SYSID_ADDR(pcie) \</div><div class='add'>+	(KVASER_PCIEFD_GET_BLOCK_ADDR((pcie), sysid))</div><div class='add'>+#define KVASER_PCIEFD_LOOPBACK_ADDR(pcie) \</div><div class='add'>+	(KVASER_PCIEFD_GET_BLOCK_ADDR((pcie), loopback))</div><div class='add'>+#define KVASER_PCIEFD_SRB_FIFO_ADDR(pcie) \</div><div class='add'>+	(KVASER_PCIEFD_GET_BLOCK_ADDR((pcie), kcan_srb_fifo))</div><div class='add'>+#define KVASER_PCIEFD_SRB_ADDR(pcie) \</div><div class='add'>+	(KVASER_PCIEFD_GET_BLOCK_ADDR((pcie), kcan_srb))</div><div class='add'>+#define KVASER_PCIEFD_KCAN_CH0_ADDR(pcie) \</div><div class='add'>+	(KVASER_PCIEFD_GET_BLOCK_ADDR((pcie), kcan_ch0))</div><div class='add'>+#define KVASER_PCIEFD_KCAN_CH1_ADDR(pcie) \</div><div class='add'>+	(KVASER_PCIEFD_GET_BLOCK_ADDR((pcie), kcan_ch1))</div><div class='add'>+#define KVASER_PCIEFD_KCAN_CHANNEL_SPAN(pcie) \</div><div class='add'>+	(KVASER_PCIEFD_KCAN_CH1_ADDR((pcie)) - KVASER_PCIEFD_KCAN_CH0_ADDR((pcie)))</div><div class='add'>+#define KVASER_PCIEFD_KCAN_CHX_ADDR(pcie, i) \</div><div class='add'>+	(KVASER_PCIEFD_KCAN_CH0_ADDR((pcie)) + (i) * KVASER_PCIEFD_KCAN_CHANNEL_SPAN((pcie)))</div><div class='add'>+</div><div class='add'>+struct kvaser_pciefd;</div><div class='add'>+static void kvaser_pciefd_write_dma_map_altera(struct kvaser_pciefd *pcie,</div><div class='add'>+					       dma_addr_t addr, int index);</div><div class='add'>+static void kvaser_pciefd_write_dma_map_sf2(struct kvaser_pciefd *pcie,</div><div class='add'>+					    dma_addr_t addr, int index);</div><div class='add'>+static void kvaser_pciefd_write_dma_map_xilinx(struct kvaser_pciefd *pcie,</div><div class='add'>+					       dma_addr_t addr, int index);</div><div class='add'>+</div><div class='add'>+static const struct kvaser_pciefd_address_offset kvaser_pciefd_altera_address_offset = {</div><div class='add'>+	.serdes = 0x1000,</div><div class='add'>+	.pci_ien = 0x50,</div><div class='add'>+	.pci_irq = 0x40,</div><div class='add'>+	.sysid = 0x1f020,</div><div class='add'>+	.loopback = 0x1f000,</div><div class='add'>+	.kcan_srb_fifo = 0x1f200,</div><div class='add'>+	.kcan_srb = 0x1f400,</div><div class='add'>+	.kcan_ch0 = 0x10000,</div><div class='add'>+	.kcan_ch1 = 0x11000,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct kvaser_pciefd_address_offset kvaser_pciefd_sf2_address_offset = {</div><div class='add'>+	.serdes = 0x280c8,</div><div class='add'>+	.pci_ien = 0x102004,</div><div class='add'>+	.pci_irq = 0x102008,</div><div class='add'>+	.sysid = 0x100000,</div><div class='add'>+	.loopback = 0x103000,</div><div class='add'>+	.kcan_srb_fifo = 0x120000,</div><div class='add'>+	.kcan_srb = 0x121000,</div><div class='add'>+	.kcan_ch0 = 0x140000,</div><div class='add'>+	.kcan_ch1 = 0x142000,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct kvaser_pciefd_address_offset kvaser_pciefd_xilinx_address_offset = {</div><div class='add'>+	.serdes = 0x00208,</div><div class='add'>+	.pci_ien = 0x102004,</div><div class='add'>+	.pci_irq = 0x102008,</div><div class='add'>+	.sysid = 0x100000,</div><div class='add'>+	.loopback = 0x103000,</div><div class='add'>+	.kcan_srb_fifo = 0x120000,</div><div class='add'>+	.kcan_srb = 0x121000,</div><div class='add'>+	.kcan_ch0 = 0x140000,</div><div class='add'>+	.kcan_ch1 = 0x142000,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct kvaser_pciefd_irq_mask kvaser_pciefd_altera_irq_mask = {</div><div class='add'>+	.kcan_rx0 = BIT(4),</div><div class='add'>+	.kcan_tx = { BIT(0), BIT(1), BIT(2), BIT(3) },</div><div class='add'>+	.all = GENMASK(4, 0),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct kvaser_pciefd_irq_mask kvaser_pciefd_sf2_irq_mask = {</div><div class='add'>+	.kcan_rx0 = BIT(4),</div><div class='add'>+	.kcan_tx = { BIT(16), BIT(17), BIT(18), BIT(19) },</div><div class='add'>+	.all = GENMASK(19, 16) | BIT(4),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct kvaser_pciefd_irq_mask kvaser_pciefd_xilinx_irq_mask = {</div><div class='add'>+	.kcan_rx0 = BIT(4),</div><div class='add'>+	.kcan_tx = { BIT(16), BIT(17), BIT(18), BIT(19), BIT(20), BIT(21), BIT(22), BIT(23) },</div><div class='add'>+	.all = GENMASK(23, 16) | BIT(4),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct kvaser_pciefd_dev_ops kvaser_pciefd_altera_dev_ops = {</div><div class='add'>+	.kvaser_pciefd_write_dma_map = kvaser_pciefd_write_dma_map_altera,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct kvaser_pciefd_dev_ops kvaser_pciefd_sf2_dev_ops = {</div><div class='add'>+	.kvaser_pciefd_write_dma_map = kvaser_pciefd_write_dma_map_sf2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct kvaser_pciefd_dev_ops kvaser_pciefd_xilinx_dev_ops = {</div><div class='add'>+	.kvaser_pciefd_write_dma_map = kvaser_pciefd_write_dma_map_xilinx,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct kvaser_pciefd_driver_data kvaser_pciefd_altera_driver_data = {</div><div class='add'>+	.address_offset = &amp;kvaser_pciefd_altera_address_offset,</div><div class='add'>+	.irq_mask = &amp;kvaser_pciefd_altera_irq_mask,</div><div class='add'>+	.ops = &amp;kvaser_pciefd_altera_dev_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct kvaser_pciefd_driver_data kvaser_pciefd_sf2_driver_data = {</div><div class='add'>+	.address_offset = &amp;kvaser_pciefd_sf2_address_offset,</div><div class='add'>+	.irq_mask = &amp;kvaser_pciefd_sf2_irq_mask,</div><div class='add'>+	.ops = &amp;kvaser_pciefd_sf2_dev_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct kvaser_pciefd_driver_data kvaser_pciefd_xilinx_driver_data = {</div><div class='add'>+	.address_offset = &amp;kvaser_pciefd_xilinx_address_offset,</div><div class='add'>+	.irq_mask = &amp;kvaser_pciefd_xilinx_irq_mask,</div><div class='add'>+	.ops = &amp;kvaser_pciefd_xilinx_dev_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct kvaser_pciefd_rx_packet {</div><div class='add'>+	u32 header[2];</div><div class='add'>+	u64 timestamp;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct kvaser_pciefd_tx_packet {</div><div class='add'>+	u32 header[2];</div><div class='add'>+	u8 data[64];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const kvaser_pciefd_bittiming_const = {</div><div class='add'>+	.name = KVASER_PCIEFD_DRV_NAME,</div><div class='add'>+	.tseg1_min = 1,</div><div class='add'>+	.tseg1_max = 512,</div><div class='add'>+	.tseg2_min = 1,</div><div class='add'>+	.tseg2_max = 32,</div><div class='add'>+	.sjw_max = 16,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 8192,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct pci_device_id kvaser_pciefd_id_table[] = {</div><div class='add'>+	{</div><div class='add'>+		PCI_DEVICE(KVASER_PCIEFD_VENDOR, KVASER_PCIEFD_4HS_DEVICE_ID),</div><div class='add'>+		.driver_data = (kernel_ulong_t)&amp;kvaser_pciefd_altera_driver_data,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		PCI_DEVICE(KVASER_PCIEFD_VENDOR, KVASER_PCIEFD_2HS_V2_DEVICE_ID),</div><div class='add'>+		.driver_data = (kernel_ulong_t)&amp;kvaser_pciefd_altera_driver_data,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		PCI_DEVICE(KVASER_PCIEFD_VENDOR, KVASER_PCIEFD_HS_V2_DEVICE_ID),</div><div class='add'>+		.driver_data = (kernel_ulong_t)&amp;kvaser_pciefd_altera_driver_data,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		PCI_DEVICE(KVASER_PCIEFD_VENDOR, KVASER_PCIEFD_MINIPCIE_HS_V2_DEVICE_ID),</div><div class='add'>+		.driver_data = (kernel_ulong_t)&amp;kvaser_pciefd_altera_driver_data,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		PCI_DEVICE(KVASER_PCIEFD_VENDOR, KVASER_PCIEFD_MINIPCIE_2HS_V2_DEVICE_ID),</div><div class='add'>+		.driver_data = (kernel_ulong_t)&amp;kvaser_pciefd_altera_driver_data,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		PCI_DEVICE(KVASER_PCIEFD_VENDOR, KVASER_PCIEFD_2CAN_V3_DEVICE_ID),</div><div class='add'>+		.driver_data = (kernel_ulong_t)&amp;kvaser_pciefd_sf2_driver_data,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		PCI_DEVICE(KVASER_PCIEFD_VENDOR, KVASER_PCIEFD_1CAN_V3_DEVICE_ID),</div><div class='add'>+		.driver_data = (kernel_ulong_t)&amp;kvaser_pciefd_sf2_driver_data,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		PCI_DEVICE(KVASER_PCIEFD_VENDOR, KVASER_PCIEFD_4CAN_V2_DEVICE_ID),</div><div class='add'>+		.driver_data = (kernel_ulong_t)&amp;kvaser_pciefd_sf2_driver_data,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		PCI_DEVICE(KVASER_PCIEFD_VENDOR, KVASER_PCIEFD_MINIPCIE_2CAN_V3_DEVICE_ID),</div><div class='add'>+		.driver_data = (kernel_ulong_t)&amp;kvaser_pciefd_sf2_driver_data,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		PCI_DEVICE(KVASER_PCIEFD_VENDOR, KVASER_PCIEFD_MINIPCIE_1CAN_V3_DEVICE_ID),</div><div class='add'>+		.driver_data = (kernel_ulong_t)&amp;kvaser_pciefd_sf2_driver_data,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		PCI_DEVICE(KVASER_PCIEFD_VENDOR, KVASER_PCIEFD_M2_4CAN_DEVICE_ID),</div><div class='add'>+		.driver_data = (kernel_ulong_t)&amp;kvaser_pciefd_xilinx_driver_data,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		PCI_DEVICE(KVASER_PCIEFD_VENDOR, KVASER_PCIEFD_8CAN_DEVICE_ID),</div><div class='add'>+		.driver_data = (kernel_ulong_t)&amp;kvaser_pciefd_xilinx_driver_data,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(pci, kvaser_pciefd_id_table);</div><div class='add'>+</div><div class='add'>+static inline void kvaser_pciefd_send_kcan_cmd(struct kvaser_pciefd_can *can, u32 cmd)</div><div class='add'>+{</div><div class='add'>+	iowrite32(FIELD_PREP(KVASER_PCIEFD_KCAN_CMD_MASK, cmd) |</div><div class='add'>+		  FIELD_PREP(KVASER_PCIEFD_KCAN_CMD_SEQ_MASK, ++can-&gt;cmd_seq),</div><div class='add'>+		  can-&gt;reg_base + KVASER_PCIEFD_KCAN_CMD_REG);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void kvaser_pciefd_request_status(struct kvaser_pciefd_can *can)</div><div class='add'>+{</div><div class='add'>+	kvaser_pciefd_send_kcan_cmd(can, KVASER_PCIEFD_KCAN_CMD_SRQ);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void kvaser_pciefd_abort_flush_reset(struct kvaser_pciefd_can *can)</div><div class='add'>+{</div><div class='add'>+	kvaser_pciefd_send_kcan_cmd(can, KVASER_PCIEFD_KCAN_CMD_AT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void kvaser_pciefd_set_led(struct kvaser_pciefd_can *can, bool on)</div><div class='add'>+{</div><div class='add'>+	if (on)</div><div class='add'>+		can-&gt;ioc &amp;= ~KVASER_PCIEFD_KCAN_IOC_LED;</div><div class='add'>+	else</div><div class='add'>+		can-&gt;ioc |= KVASER_PCIEFD_KCAN_IOC_LED;</div><div class='add'>+</div><div class='add'>+	iowrite32(can-&gt;ioc, can-&gt;reg_base + KVASER_PCIEFD_KCAN_IOC_REG);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_pciefd_enable_err_gen(struct kvaser_pciefd_can *can)</div><div class='add'>+{</div><div class='add'>+	u32 mode;</div><div class='add'>+	unsigned long irq;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;can-&gt;lock, irq);</div><div class='add'>+	mode = ioread32(can-&gt;reg_base + KVASER_PCIEFD_KCAN_MODE_REG);</div><div class='add'>+	if (!(mode &amp; KVASER_PCIEFD_KCAN_MODE_EPEN)) {</div><div class='add'>+		mode |= KVASER_PCIEFD_KCAN_MODE_EPEN;</div><div class='add'>+		iowrite32(mode, can-&gt;reg_base + KVASER_PCIEFD_KCAN_MODE_REG);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;can-&gt;lock, irq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_pciefd_disable_err_gen(struct kvaser_pciefd_can *can)</div><div class='add'>+{</div><div class='add'>+	u32 mode;</div><div class='add'>+	unsigned long irq;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;can-&gt;lock, irq);</div><div class='add'>+	mode = ioread32(can-&gt;reg_base + KVASER_PCIEFD_KCAN_MODE_REG);</div><div class='add'>+	mode &amp;= ~KVASER_PCIEFD_KCAN_MODE_EPEN;</div><div class='add'>+	iowrite32(mode, can-&gt;reg_base + KVASER_PCIEFD_KCAN_MODE_REG);</div><div class='add'>+	spin_unlock_irqrestore(&amp;can-&gt;lock, irq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void kvaser_pciefd_set_tx_irq(struct kvaser_pciefd_can *can)</div><div class='add'>+{</div><div class='add'>+	u32 msk;</div><div class='add'>+</div><div class='add'>+	msk = KVASER_PCIEFD_KCAN_IRQ_TE | KVASER_PCIEFD_KCAN_IRQ_ROF |</div><div class='add'>+	      KVASER_PCIEFD_KCAN_IRQ_TOF | KVASER_PCIEFD_KCAN_IRQ_ABD |</div><div class='add'>+	      KVASER_PCIEFD_KCAN_IRQ_TAE | KVASER_PCIEFD_KCAN_IRQ_TAL |</div><div class='add'>+	      KVASER_PCIEFD_KCAN_IRQ_FDIC | KVASER_PCIEFD_KCAN_IRQ_BPP |</div><div class='add'>+	      KVASER_PCIEFD_KCAN_IRQ_TAR;</div><div class='add'>+</div><div class='add'>+	iowrite32(msk, can-&gt;reg_base + KVASER_PCIEFD_KCAN_IEN_REG);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void kvaser_pciefd_set_skb_timestamp(const struct kvaser_pciefd *pcie,</div><div class='add'>+						   struct sk_buff *skb, u64 timestamp)</div><div class='add'>+{</div><div class='add'>+	skb_hwtstamps(skb)-&gt;hwtstamp =</div><div class='add'>+		ns_to_ktime(div_u64(timestamp * 1000, pcie-&gt;freq_to_ticks_div));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_pciefd_setup_controller(struct kvaser_pciefd_can *can)</div><div class='add'>+{</div><div class='add'>+	u32 mode;</div><div class='add'>+	unsigned long irq;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;can-&gt;lock, irq);</div><div class='add'>+	mode = ioread32(can-&gt;reg_base + KVASER_PCIEFD_KCAN_MODE_REG);</div><div class='add'>+	if (can-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD) {</div><div class='add'>+		mode &amp;= ~KVASER_PCIEFD_KCAN_MODE_CCM;</div><div class='add'>+		if (can-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD_NON_ISO)</div><div class='add'>+			mode |= KVASER_PCIEFD_KCAN_MODE_NIFDEN;</div><div class='add'>+		else</div><div class='add'>+			mode &amp;= ~KVASER_PCIEFD_KCAN_MODE_NIFDEN;</div><div class='add'>+	} else {</div><div class='add'>+		mode |= KVASER_PCIEFD_KCAN_MODE_CCM;</div><div class='add'>+		mode &amp;= ~KVASER_PCIEFD_KCAN_MODE_NIFDEN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (can-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LISTENONLY)</div><div class='add'>+		mode |= KVASER_PCIEFD_KCAN_MODE_LOM;</div><div class='add'>+	else</div><div class='add'>+		mode &amp;= ~KVASER_PCIEFD_KCAN_MODE_LOM;</div><div class='add'>+	mode |= KVASER_PCIEFD_KCAN_MODE_EEN;</div><div class='add'>+	mode |= KVASER_PCIEFD_KCAN_MODE_EPEN;</div><div class='add'>+	/* Use ACK packet type */</div><div class='add'>+	mode &amp;= ~KVASER_PCIEFD_KCAN_MODE_APT;</div><div class='add'>+	mode &amp;= ~KVASER_PCIEFD_KCAN_MODE_RM;</div><div class='add'>+	iowrite32(mode, can-&gt;reg_base + KVASER_PCIEFD_KCAN_MODE_REG);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;can-&gt;lock, irq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_pciefd_start_controller_flush(struct kvaser_pciefd_can *can)</div><div class='add'>+{</div><div class='add'>+	u32 status;</div><div class='add'>+	unsigned long irq;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;can-&gt;lock, irq);</div><div class='add'>+	iowrite32(GENMASK(31, 0), can-&gt;reg_base + KVASER_PCIEFD_KCAN_IRQ_REG);</div><div class='add'>+	iowrite32(KVASER_PCIEFD_KCAN_IRQ_ABD,</div><div class='add'>+		  can-&gt;reg_base + KVASER_PCIEFD_KCAN_IEN_REG);</div><div class='add'>+	status = ioread32(can-&gt;reg_base + KVASER_PCIEFD_KCAN_STAT_REG);</div><div class='add'>+	if (status &amp; KVASER_PCIEFD_KCAN_STAT_IDLE) {</div><div class='add'>+		/* If controller is already idle, run abort, flush and reset */</div><div class='add'>+		kvaser_pciefd_abort_flush_reset(can);</div><div class='add'>+	} else if (!(status &amp; KVASER_PCIEFD_KCAN_STAT_RMR)) {</div><div class='add'>+		u32 mode;</div><div class='add'>+</div><div class='add'>+		/* Put controller in reset mode */</div><div class='add'>+		mode = ioread32(can-&gt;reg_base + KVASER_PCIEFD_KCAN_MODE_REG);</div><div class='add'>+		mode |= KVASER_PCIEFD_KCAN_MODE_RM;</div><div class='add'>+		iowrite32(mode, can-&gt;reg_base + KVASER_PCIEFD_KCAN_MODE_REG);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;can-&gt;lock, irq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_pciefd_bus_on(struct kvaser_pciefd_can *can)</div><div class='add'>+{</div><div class='add'>+	u32 mode;</div><div class='add'>+	unsigned long irq;</div><div class='add'>+</div><div class='add'>+	timer_delete(&amp;can-&gt;bec_poll_timer);</div><div class='add'>+	if (!completion_done(&amp;can-&gt;flush_comp))</div><div class='add'>+		kvaser_pciefd_start_controller_flush(can);</div><div class='add'>+</div><div class='add'>+	if (!wait_for_completion_timeout(&amp;can-&gt;flush_comp,</div><div class='add'>+					 KVASER_PCIEFD_WAIT_TIMEOUT)) {</div><div class='add'>+		netdev_err(can-&gt;can.dev, "Timeout during bus on flush\n");</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;can-&gt;lock, irq);</div><div class='add'>+	iowrite32(0, can-&gt;reg_base + KVASER_PCIEFD_KCAN_IEN_REG);</div><div class='add'>+	iowrite32(GENMASK(31, 0), can-&gt;reg_base + KVASER_PCIEFD_KCAN_IRQ_REG);</div><div class='add'>+	iowrite32(KVASER_PCIEFD_KCAN_IRQ_ABD,</div><div class='add'>+		  can-&gt;reg_base + KVASER_PCIEFD_KCAN_IEN_REG);</div><div class='add'>+	mode = ioread32(can-&gt;reg_base + KVASER_PCIEFD_KCAN_MODE_REG);</div><div class='add'>+	mode &amp;= ~KVASER_PCIEFD_KCAN_MODE_RM;</div><div class='add'>+	iowrite32(mode, can-&gt;reg_base + KVASER_PCIEFD_KCAN_MODE_REG);</div><div class='add'>+	spin_unlock_irqrestore(&amp;can-&gt;lock, irq);</div><div class='add'>+</div><div class='add'>+	if (!wait_for_completion_timeout(&amp;can-&gt;start_comp,</div><div class='add'>+					 KVASER_PCIEFD_WAIT_TIMEOUT)) {</div><div class='add'>+		netdev_err(can-&gt;can.dev, "Timeout during bus on reset\n");</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+	}</div><div class='add'>+	/* Reset interrupt handling */</div><div class='add'>+	iowrite32(0, can-&gt;reg_base + KVASER_PCIEFD_KCAN_IEN_REG);</div><div class='add'>+	iowrite32(GENMASK(31, 0), can-&gt;reg_base + KVASER_PCIEFD_KCAN_IRQ_REG);</div><div class='add'>+</div><div class='add'>+	kvaser_pciefd_set_tx_irq(can);</div><div class='add'>+	kvaser_pciefd_setup_controller(can);</div><div class='add'>+	can-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+	netif_wake_queue(can-&gt;can.dev);</div><div class='add'>+	can-&gt;bec.txerr = 0;</div><div class='add'>+	can-&gt;bec.rxerr = 0;</div><div class='add'>+	can-&gt;err_rep_cnt = 0;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_pciefd_pwm_stop(struct kvaser_pciefd_can *can)</div><div class='add'>+{</div><div class='add'>+	u8 top;</div><div class='add'>+	u32 pwm_ctrl;</div><div class='add'>+	unsigned long irq;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;can-&gt;lock, irq);</div><div class='add'>+	pwm_ctrl = ioread32(can-&gt;reg_base + KVASER_PCIEFD_KCAN_PWM_REG);</div><div class='add'>+	top = FIELD_GET(KVASER_PCIEFD_KCAN_PWM_TOP_MASK, pwm_ctrl);</div><div class='add'>+	/* Set duty cycle to zero */</div><div class='add'>+	pwm_ctrl |= FIELD_PREP(KVASER_PCIEFD_KCAN_PWM_TRIGGER_MASK, top);</div><div class='add'>+	iowrite32(pwm_ctrl, can-&gt;reg_base + KVASER_PCIEFD_KCAN_PWM_REG);</div><div class='add'>+	spin_unlock_irqrestore(&amp;can-&gt;lock, irq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_pciefd_pwm_start(struct kvaser_pciefd_can *can)</div><div class='add'>+{</div><div class='add'>+	int top, trigger;</div><div class='add'>+	u32 pwm_ctrl;</div><div class='add'>+	unsigned long irq;</div><div class='add'>+</div><div class='add'>+	kvaser_pciefd_pwm_stop(can);</div><div class='add'>+	spin_lock_irqsave(&amp;can-&gt;lock, irq);</div><div class='add'>+	/* Set frequency to 500 KHz */</div><div class='add'>+	top = can-&gt;kv_pcie-&gt;bus_freq / (2 * 500000) - 1;</div><div class='add'>+</div><div class='add'>+	pwm_ctrl = FIELD_PREP(KVASER_PCIEFD_KCAN_PWM_TRIGGER_MASK, top);</div><div class='add'>+	pwm_ctrl |= FIELD_PREP(KVASER_PCIEFD_KCAN_PWM_TOP_MASK, top);</div><div class='add'>+	iowrite32(pwm_ctrl, can-&gt;reg_base + KVASER_PCIEFD_KCAN_PWM_REG);</div><div class='add'>+</div><div class='add'>+	/* Set duty cycle to 95 */</div><div class='add'>+	trigger = (100 * top - 95 * (top + 1) + 50) / 100;</div><div class='add'>+	pwm_ctrl = FIELD_PREP(KVASER_PCIEFD_KCAN_PWM_TRIGGER_MASK, trigger);</div><div class='add'>+	pwm_ctrl |= FIELD_PREP(KVASER_PCIEFD_KCAN_PWM_TOP_MASK, top);</div><div class='add'>+	iowrite32(pwm_ctrl, can-&gt;reg_base + KVASER_PCIEFD_KCAN_PWM_REG);</div><div class='add'>+	spin_unlock_irqrestore(&amp;can-&gt;lock, irq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_pciefd_open(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct kvaser_pciefd_can *can = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	can-&gt;tx_idx = 0;</div><div class='add'>+	can-&gt;ack_idx = 0;</div><div class='add'>+</div><div class='add'>+	ret = open_candev(netdev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = kvaser_pciefd_bus_on(can);</div><div class='add'>+	if (ret) {</div><div class='add'>+		close_candev(netdev);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_pciefd_stop(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_pciefd_can *can = netdev_priv(netdev);</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	/* Don't interrupt ongoing flush */</div><div class='add'>+	if (!completion_done(&amp;can-&gt;flush_comp))</div><div class='add'>+		kvaser_pciefd_start_controller_flush(can);</div><div class='add'>+</div><div class='add'>+	if (!wait_for_completion_timeout(&amp;can-&gt;flush_comp,</div><div class='add'>+					 KVASER_PCIEFD_WAIT_TIMEOUT)) {</div><div class='add'>+		netdev_err(can-&gt;can.dev, "Timeout during stop\n");</div><div class='add'>+		ret = -ETIMEDOUT;</div><div class='add'>+	} else {</div><div class='add'>+		iowrite32(0, can-&gt;reg_base + KVASER_PCIEFD_KCAN_IEN_REG);</div><div class='add'>+		timer_delete(&amp;can-&gt;bec_poll_timer);</div><div class='add'>+	}</div><div class='add'>+	can-&gt;can.state = CAN_STATE_STOPPED;</div><div class='add'>+	netdev_reset_queue(netdev);</div><div class='add'>+	close_candev(netdev);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int kvaser_pciefd_tx_avail(const struct kvaser_pciefd_can *can)</div><div class='add'>+{</div><div class='add'>+	return can-&gt;tx_max_count - (READ_ONCE(can-&gt;tx_idx) - READ_ONCE(can-&gt;ack_idx));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_pciefd_prepare_tx_packet(struct kvaser_pciefd_tx_packet *p,</div><div class='add'>+					   struct can_priv *can, u8 seq,</div><div class='add'>+					   struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct canfd_frame *cf = (struct canfd_frame *)skb-&gt;data;</div><div class='add'>+	int packet_size;</div><div class='add'>+</div><div class='add'>+	memset(p, 0, sizeof(*p));</div><div class='add'>+	if (can-&gt;ctrlmode &amp; CAN_CTRLMODE_ONE_SHOT)</div><div class='add'>+		p-&gt;header[1] |= KVASER_PCIEFD_TPACKET_SMS;</div><div class='add'>+</div><div class='add'>+	if (cf-&gt;can_id &amp; CAN_RTR_FLAG)</div><div class='add'>+		p-&gt;header[0] |= KVASER_PCIEFD_RPACKET_RTR;</div><div class='add'>+</div><div class='add'>+	if (cf-&gt;can_id &amp; CAN_EFF_FLAG)</div><div class='add'>+		p-&gt;header[0] |= KVASER_PCIEFD_RPACKET_IDE;</div><div class='add'>+</div><div class='add'>+	p-&gt;header[0] |= FIELD_PREP(KVASER_PCIEFD_RPACKET_ID_MASK, cf-&gt;can_id);</div><div class='add'>+	p-&gt;header[1] |= KVASER_PCIEFD_TPACKET_AREQ;</div><div class='add'>+</div><div class='add'>+	if (can_is_canfd_skb(skb)) {</div><div class='add'>+		p-&gt;header[1] |= FIELD_PREP(KVASER_PCIEFD_RPACKET_DLC_MASK,</div><div class='add'>+					   can_fd_len2dlc(cf-&gt;len));</div><div class='add'>+		p-&gt;header[1] |= KVASER_PCIEFD_RPACKET_FDF;</div><div class='add'>+		if (cf-&gt;flags &amp; CANFD_BRS)</div><div class='add'>+			p-&gt;header[1] |= KVASER_PCIEFD_RPACKET_BRS;</div><div class='add'>+		if (cf-&gt;flags &amp; CANFD_ESI)</div><div class='add'>+			p-&gt;header[1] |= KVASER_PCIEFD_RPACKET_ESI;</div><div class='add'>+	} else {</div><div class='add'>+		p-&gt;header[1] |=</div><div class='add'>+			FIELD_PREP(KVASER_PCIEFD_RPACKET_DLC_MASK,</div><div class='add'>+				   can_get_cc_dlc((struct can_frame *)cf, can-&gt;ctrlmode));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	p-&gt;header[1] |= FIELD_PREP(KVASER_PCIEFD_PACKET_SEQ_MASK, seq);</div><div class='add'>+</div><div class='add'>+	packet_size = cf-&gt;len;</div><div class='add'>+	memcpy(p-&gt;data, cf-&gt;data, packet_size);</div><div class='add'>+</div><div class='add'>+	return DIV_ROUND_UP(packet_size, 4);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static netdev_tx_t kvaser_pciefd_start_xmit(struct sk_buff *skb,</div><div class='add'>+					    struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_pciefd_can *can = netdev_priv(netdev);</div><div class='add'>+	struct kvaser_pciefd_tx_packet packet;</div><div class='add'>+	unsigned int seq = can-&gt;tx_idx &amp; (can-&gt;can.echo_skb_max - 1);</div><div class='add'>+	unsigned int frame_len;</div><div class='add'>+	int nr_words;</div><div class='add'>+</div><div class='add'>+	if (can_dev_dropped_skb(netdev, skb))</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+	if (!netif_subqueue_maybe_stop(netdev, 0, kvaser_pciefd_tx_avail(can), 1, 1))</div><div class='add'>+		return NETDEV_TX_BUSY;</div><div class='add'>+</div><div class='add'>+	nr_words = kvaser_pciefd_prepare_tx_packet(&amp;packet, &amp;can-&gt;can, seq, skb);</div><div class='add'>+</div><div class='add'>+	/* Prepare and save echo skb in internal slot */</div><div class='add'>+	WRITE_ONCE(can-&gt;can.echo_skb[seq], NULL);</div><div class='add'>+	frame_len = can_skb_get_frame_len(skb);</div><div class='add'>+	can_put_echo_skb(skb, netdev, seq, frame_len);</div><div class='add'>+	netdev_sent_queue(netdev, frame_len);</div><div class='add'>+	WRITE_ONCE(can-&gt;tx_idx, can-&gt;tx_idx + 1);</div><div class='add'>+</div><div class='add'>+	/* Write header to fifo */</div><div class='add'>+	iowrite32(packet.header[0],</div><div class='add'>+		  can-&gt;reg_base + KVASER_PCIEFD_KCAN_FIFO_REG);</div><div class='add'>+	iowrite32(packet.header[1],</div><div class='add'>+		  can-&gt;reg_base + KVASER_PCIEFD_KCAN_FIFO_REG);</div><div class='add'>+</div><div class='add'>+	if (nr_words) {</div><div class='add'>+		u32 data_last = ((u32 *)packet.data)[nr_words - 1];</div><div class='add'>+</div><div class='add'>+		/* Write data to fifo, except last word */</div><div class='add'>+		iowrite32_rep(can-&gt;reg_base +</div><div class='add'>+			      KVASER_PCIEFD_KCAN_FIFO_REG, packet.data,</div><div class='add'>+			      nr_words - 1);</div><div class='add'>+		/* Write last word to end of fifo */</div><div class='add'>+		__raw_writel(data_last, can-&gt;reg_base +</div><div class='add'>+			     KVASER_PCIEFD_KCAN_FIFO_LAST_REG);</div><div class='add'>+	} else {</div><div class='add'>+		/* Complete write to fifo */</div><div class='add'>+		__raw_writel(0, can-&gt;reg_base +</div><div class='add'>+			     KVASER_PCIEFD_KCAN_FIFO_LAST_REG);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netif_subqueue_maybe_stop(netdev, 0, kvaser_pciefd_tx_avail(can), 1, 1);</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_pciefd_set_bittiming(struct kvaser_pciefd_can *can, bool data)</div><div class='add'>+{</div><div class='add'>+	u32 mode, test, btrn;</div><div class='add'>+	unsigned long irq_flags;</div><div class='add'>+	int ret;</div><div class='add'>+	struct can_bittiming *bt;</div><div class='add'>+</div><div class='add'>+	if (data)</div><div class='add'>+		bt = &amp;can-&gt;can.fd.data_bittiming;</div><div class='add'>+	else</div><div class='add'>+		bt = &amp;can-&gt;can.bittiming;</div><div class='add'>+</div><div class='add'>+	btrn = FIELD_PREP(KVASER_PCIEFD_KCAN_BTRN_TSEG2_MASK, bt-&gt;phase_seg2 - 1) |</div><div class='add'>+	       FIELD_PREP(KVASER_PCIEFD_KCAN_BTRN_TSEG1_MASK, bt-&gt;prop_seg + bt-&gt;phase_seg1 - 1) |</div><div class='add'>+	       FIELD_PREP(KVASER_PCIEFD_KCAN_BTRN_SJW_MASK, bt-&gt;sjw - 1) |</div><div class='add'>+	       FIELD_PREP(KVASER_PCIEFD_KCAN_BTRN_BRP_MASK, bt-&gt;brp - 1);</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;can-&gt;lock, irq_flags);</div><div class='add'>+	mode = ioread32(can-&gt;reg_base + KVASER_PCIEFD_KCAN_MODE_REG);</div><div class='add'>+	/* Put the circuit in reset mode */</div><div class='add'>+	iowrite32(mode | KVASER_PCIEFD_KCAN_MODE_RM,</div><div class='add'>+		  can-&gt;reg_base + KVASER_PCIEFD_KCAN_MODE_REG);</div><div class='add'>+</div><div class='add'>+	/* Can only set bittiming if in reset mode */</div><div class='add'>+	ret = readl_poll_timeout(can-&gt;reg_base + KVASER_PCIEFD_KCAN_MODE_REG,</div><div class='add'>+				 test, test &amp; KVASER_PCIEFD_KCAN_MODE_RM, 0, 10);</div><div class='add'>+	if (ret) {</div><div class='add'>+		spin_unlock_irqrestore(&amp;can-&gt;lock, irq_flags);</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (data)</div><div class='add'>+		iowrite32(btrn, can-&gt;reg_base + KVASER_PCIEFD_KCAN_BTRD_REG);</div><div class='add'>+	else</div><div class='add'>+		iowrite32(btrn, can-&gt;reg_base + KVASER_PCIEFD_KCAN_BTRN_REG);</div><div class='add'>+	/* Restore previous reset mode status */</div><div class='add'>+	iowrite32(mode, can-&gt;reg_base + KVASER_PCIEFD_KCAN_MODE_REG);</div><div class='add'>+	spin_unlock_irqrestore(&amp;can-&gt;lock, irq_flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_pciefd_set_nominal_bittiming(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	return kvaser_pciefd_set_bittiming(netdev_priv(ndev), false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_pciefd_set_data_bittiming(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	return kvaser_pciefd_set_bittiming(netdev_priv(ndev), true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_pciefd_set_mode(struct net_device *ndev, enum can_mode mode)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_pciefd_can *can = netdev_priv(ndev);</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case CAN_MODE_START:</div><div class='add'>+		if (!can-&gt;can.restart_ms)</div><div class='add'>+			ret = kvaser_pciefd_bus_on(can);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_pciefd_get_berr_counter(const struct net_device *ndev,</div><div class='add'>+					  struct can_berr_counter *bec)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_pciefd_can *can = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	bec-&gt;rxerr = can-&gt;bec.rxerr;</div><div class='add'>+	bec-&gt;txerr = can-&gt;bec.txerr;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_pciefd_bec_poll_timer(struct timer_list *data)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_pciefd_can *can = timer_container_of(can, data,</div><div class='add'>+							   bec_poll_timer);</div><div class='add'>+</div><div class='add'>+	kvaser_pciefd_enable_err_gen(can);</div><div class='add'>+	kvaser_pciefd_request_status(can);</div><div class='add'>+	can-&gt;err_rep_cnt = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops kvaser_pciefd_netdev_ops = {</div><div class='add'>+	.ndo_open = kvaser_pciefd_open,</div><div class='add'>+	.ndo_stop = kvaser_pciefd_stop,</div><div class='add'>+	.ndo_start_xmit = kvaser_pciefd_start_xmit,</div><div class='add'>+	.ndo_hwtstamp_get = can_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set = can_hwtstamp_set,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int kvaser_pciefd_set_phys_id(struct net_device *netdev,</div><div class='add'>+				     enum ethtool_phys_id_state state)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_pciefd_can *can = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	switch (state) {</div><div class='add'>+	case ETHTOOL_ID_ACTIVE:</div><div class='add'>+		return 3; /* 3 On/Off cycles per second */</div><div class='add'>+</div><div class='add'>+	case ETHTOOL_ID_ON:</div><div class='add'>+		kvaser_pciefd_set_led(can, true);</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	case ETHTOOL_ID_OFF:</div><div class='add'>+	case ETHTOOL_ID_INACTIVE:</div><div class='add'>+		kvaser_pciefd_set_led(can, false);</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops kvaser_pciefd_ethtool_ops = {</div><div class='add'>+	.get_ts_info = can_ethtool_op_get_ts_info_hwts,</div><div class='add'>+	.set_phys_id = kvaser_pciefd_set_phys_id,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int kvaser_pciefd_setup_can_ctrls(struct kvaser_pciefd *pcie)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pcie-&gt;nr_channels; i++) {</div><div class='add'>+		struct net_device *netdev;</div><div class='add'>+		struct kvaser_pciefd_can *can;</div><div class='add'>+		u32 status, tx_nr_packets_max;</div><div class='add'>+		int ret;</div><div class='add'>+</div><div class='add'>+		netdev = alloc_candev(sizeof(struct kvaser_pciefd_can),</div><div class='add'>+				      roundup_pow_of_two(KVASER_PCIEFD_CAN_TX_MAX_COUNT));</div><div class='add'>+		if (!netdev)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		can = netdev_priv(netdev);</div><div class='add'>+		netdev-&gt;netdev_ops = &amp;kvaser_pciefd_netdev_ops;</div><div class='add'>+		netdev-&gt;ethtool_ops = &amp;kvaser_pciefd_ethtool_ops;</div><div class='add'>+		can-&gt;reg_base = KVASER_PCIEFD_KCAN_CHX_ADDR(pcie, i);</div><div class='add'>+		can-&gt;kv_pcie = pcie;</div><div class='add'>+		can-&gt;cmd_seq = 0;</div><div class='add'>+		can-&gt;err_rep_cnt = 0;</div><div class='add'>+		can-&gt;completed_tx_pkts = 0;</div><div class='add'>+		can-&gt;completed_tx_bytes = 0;</div><div class='add'>+		can-&gt;bec.txerr = 0;</div><div class='add'>+		can-&gt;bec.rxerr = 0;</div><div class='add'>+		can-&gt;can.dev-&gt;dev_port = i;</div><div class='add'>+</div><div class='add'>+		init_completion(&amp;can-&gt;start_comp);</div><div class='add'>+		init_completion(&amp;can-&gt;flush_comp);</div><div class='add'>+		timer_setup(&amp;can-&gt;bec_poll_timer, kvaser_pciefd_bec_poll_timer, 0);</div><div class='add'>+</div><div class='add'>+		/* Disable Bus load reporting */</div><div class='add'>+		iowrite32(0, can-&gt;reg_base + KVASER_PCIEFD_KCAN_BUS_LOAD_REG);</div><div class='add'>+</div><div class='add'>+		can-&gt;ioc = ioread32(can-&gt;reg_base + KVASER_PCIEFD_KCAN_IOC_REG);</div><div class='add'>+		kvaser_pciefd_set_led(can, false);</div><div class='add'>+</div><div class='add'>+		tx_nr_packets_max =</div><div class='add'>+			FIELD_GET(KVASER_PCIEFD_KCAN_TX_NR_PACKETS_MAX_MASK,</div><div class='add'>+				  ioread32(can-&gt;reg_base + KVASER_PCIEFD_KCAN_TX_NR_PACKETS_REG));</div><div class='add'>+		can-&gt;tx_max_count = min(KVASER_PCIEFD_CAN_TX_MAX_COUNT, tx_nr_packets_max - 1);</div><div class='add'>+</div><div class='add'>+		can-&gt;can.clock.freq = pcie-&gt;freq;</div><div class='add'>+		spin_lock_init(&amp;can-&gt;lock);</div><div class='add'>+</div><div class='add'>+		can-&gt;can.bittiming_const = &amp;kvaser_pciefd_bittiming_const;</div><div class='add'>+		can-&gt;can.fd.data_bittiming_const = &amp;kvaser_pciefd_bittiming_const;</div><div class='add'>+		can-&gt;can.do_set_bittiming = kvaser_pciefd_set_nominal_bittiming;</div><div class='add'>+		can-&gt;can.fd.do_set_data_bittiming = kvaser_pciefd_set_data_bittiming;</div><div class='add'>+		can-&gt;can.do_set_mode = kvaser_pciefd_set_mode;</div><div class='add'>+		can-&gt;can.do_get_berr_counter = kvaser_pciefd_get_berr_counter;</div><div class='add'>+		can-&gt;can.ctrlmode_supported = CAN_CTRLMODE_LISTENONLY |</div><div class='add'>+					      CAN_CTRLMODE_FD |</div><div class='add'>+					      CAN_CTRLMODE_FD_NON_ISO |</div><div class='add'>+					      CAN_CTRLMODE_CC_LEN8_DLC |</div><div class='add'>+					      CAN_CTRLMODE_BERR_REPORTING;</div><div class='add'>+</div><div class='add'>+		status = ioread32(can-&gt;reg_base + KVASER_PCIEFD_KCAN_STAT_REG);</div><div class='add'>+		if (!(status &amp; KVASER_PCIEFD_KCAN_STAT_FD)) {</div><div class='add'>+			dev_err(&amp;pcie-&gt;pci-&gt;dev,</div><div class='add'>+				"CAN FD not supported as expected %d\n", i);</div><div class='add'>+</div><div class='add'>+			free_candev(netdev);</div><div class='add'>+			return -ENODEV;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (status &amp; KVASER_PCIEFD_KCAN_STAT_CAP)</div><div class='add'>+			can-&gt;can.ctrlmode_supported |= CAN_CTRLMODE_ONE_SHOT;</div><div class='add'>+</div><div class='add'>+		netdev-&gt;flags |= IFF_ECHO;</div><div class='add'>+		SET_NETDEV_DEV(netdev, &amp;pcie-&gt;pci-&gt;dev);</div><div class='add'>+</div><div class='add'>+		iowrite32(GENMASK(31, 0), can-&gt;reg_base + KVASER_PCIEFD_KCAN_IRQ_REG);</div><div class='add'>+		iowrite32(KVASER_PCIEFD_KCAN_IRQ_ABD,</div><div class='add'>+			  can-&gt;reg_base + KVASER_PCIEFD_KCAN_IEN_REG);</div><div class='add'>+</div><div class='add'>+		pcie-&gt;can[i] = can;</div><div class='add'>+		kvaser_pciefd_pwm_start(can);</div><div class='add'>+		ret = kvaser_pciefd_devlink_port_register(can);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(&amp;pcie-&gt;pci-&gt;dev, "Failed to register devlink port\n");</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_pciefd_reg_candev(struct kvaser_pciefd *pcie)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pcie-&gt;nr_channels; i++) {</div><div class='add'>+		int ret = register_candev(pcie-&gt;can[i]-&gt;can.dev);</div><div class='add'>+</div><div class='add'>+		if (ret) {</div><div class='add'>+			int j;</div><div class='add'>+</div><div class='add'>+			/* Unregister all successfully registered devices. */</div><div class='add'>+			for (j = 0; j &lt; i; j++)</div><div class='add'>+				unregister_candev(pcie-&gt;can[j]-&gt;can.dev);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_pciefd_write_dma_map_altera(struct kvaser_pciefd *pcie,</div><div class='add'>+					       dma_addr_t addr, int index)</div><div class='add'>+{</div><div class='add'>+	void __iomem *serdes_base;</div><div class='add'>+	u32 word1, word2;</div><div class='add'>+</div><div class='add'>+	if (IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT)) {</div><div class='add'>+		word1 = lower_32_bits(addr) | KVASER_PCIEFD_ALTERA_DMA_64BIT;</div><div class='add'>+		word2 = upper_32_bits(addr);</div><div class='add'>+	} else {</div><div class='add'>+		word1 = addr;</div><div class='add'>+		word2 = 0;</div><div class='add'>+	}</div><div class='add'>+	serdes_base = KVASER_PCIEFD_SERDES_ADDR(pcie) + 0x8 * index;</div><div class='add'>+	iowrite32(word1, serdes_base);</div><div class='add'>+	iowrite32(word2, serdes_base + 0x4);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_pciefd_write_dma_map_sf2(struct kvaser_pciefd *pcie,</div><div class='add'>+					    dma_addr_t addr, int index)</div><div class='add'>+{</div><div class='add'>+	void __iomem *serdes_base;</div><div class='add'>+	u32 lsb = addr &amp; KVASER_PCIEFD_SF2_DMA_LSB_MASK;</div><div class='add'>+	u32 msb = 0x0;</div><div class='add'>+</div><div class='add'>+	if (IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT))</div><div class='add'>+		msb = upper_32_bits(addr);</div><div class='add'>+</div><div class='add'>+	serdes_base = KVASER_PCIEFD_SERDES_ADDR(pcie) + 0x10 * index;</div><div class='add'>+	iowrite32(lsb, serdes_base);</div><div class='add'>+	iowrite32(msb, serdes_base + 0x4);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_pciefd_write_dma_map_xilinx(struct kvaser_pciefd *pcie,</div><div class='add'>+					       dma_addr_t addr, int index)</div><div class='add'>+{</div><div class='add'>+	void __iomem *serdes_base;</div><div class='add'>+	u32 lsb = addr &amp; KVASER_PCIEFD_XILINX_DMA_LSB_MASK;</div><div class='add'>+	u32 msb = 0x0;</div><div class='add'>+</div><div class='add'>+	if (IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT))</div><div class='add'>+		msb = upper_32_bits(addr);</div><div class='add'>+</div><div class='add'>+	serdes_base = KVASER_PCIEFD_SERDES_ADDR(pcie) + 0x8 * index;</div><div class='add'>+	iowrite32(msb, serdes_base);</div><div class='add'>+	iowrite32(lsb, serdes_base + 0x4);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_pciefd_setup_dma(struct kvaser_pciefd *pcie)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	u32 srb_status;</div><div class='add'>+	u32 srb_packet_count;</div><div class='add'>+	dma_addr_t dma_addr[KVASER_PCIEFD_DMA_COUNT];</div><div class='add'>+</div><div class='add'>+	/* Disable the DMA */</div><div class='add'>+	iowrite32(0, KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_CTRL_REG);</div><div class='add'>+</div><div class='add'>+	dma_set_mask_and_coherent(&amp;pcie-&gt;pci-&gt;dev, DMA_BIT_MASK(64));</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; KVASER_PCIEFD_DMA_COUNT; i++) {</div><div class='add'>+		pcie-&gt;dma_data[i] = dmam_alloc_coherent(&amp;pcie-&gt;pci-&gt;dev,</div><div class='add'>+							KVASER_PCIEFD_DMA_SIZE,</div><div class='add'>+							&amp;dma_addr[i],</div><div class='add'>+							GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+		if (!pcie-&gt;dma_data[i] || !dma_addr[i]) {</div><div class='add'>+			dev_err(&amp;pcie-&gt;pci-&gt;dev, "Rx dma_alloc(%u) failure\n",</div><div class='add'>+				KVASER_PCIEFD_DMA_SIZE);</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		}</div><div class='add'>+		pcie-&gt;driver_data-&gt;ops-&gt;kvaser_pciefd_write_dma_map(pcie, dma_addr[i], i);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Reset Rx FIFO, and both DMA buffers */</div><div class='add'>+	iowrite32(KVASER_PCIEFD_SRB_CMD_FOR | KVASER_PCIEFD_SRB_CMD_RDB0 |</div><div class='add'>+		  KVASER_PCIEFD_SRB_CMD_RDB1,</div><div class='add'>+		  KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_CMD_REG);</div><div class='add'>+	/* Empty Rx FIFO */</div><div class='add'>+	srb_packet_count =</div><div class='add'>+		FIELD_GET(KVASER_PCIEFD_SRB_RX_NR_PACKETS_MASK,</div><div class='add'>+			  ioread32(KVASER_PCIEFD_SRB_ADDR(pcie) +</div><div class='add'>+				   KVASER_PCIEFD_SRB_RX_NR_PACKETS_REG));</div><div class='add'>+	while (srb_packet_count) {</div><div class='add'>+		/* Drop current packet in FIFO */</div><div class='add'>+		ioread32(KVASER_PCIEFD_SRB_FIFO_ADDR(pcie) + KVASER_PCIEFD_SRB_FIFO_LAST_REG);</div><div class='add'>+		srb_packet_count--;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	srb_status = ioread32(KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_STAT_REG);</div><div class='add'>+	if (!(srb_status &amp; KVASER_PCIEFD_SRB_STAT_DI)) {</div><div class='add'>+		dev_err(&amp;pcie-&gt;pci-&gt;dev, "DMA not idle before enabling\n");</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Enable the DMA */</div><div class='add'>+	iowrite32(KVASER_PCIEFD_SRB_CTRL_DMA_ENABLE,</div><div class='add'>+		  KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_CTRL_REG);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_pciefd_setup_board(struct kvaser_pciefd *pcie)</div><div class='add'>+{</div><div class='add'>+	u32 version, srb_status, build;</div><div class='add'>+</div><div class='add'>+	version = ioread32(KVASER_PCIEFD_SYSID_ADDR(pcie) + KVASER_PCIEFD_SYSID_VERSION_REG);</div><div class='add'>+	build = ioread32(KVASER_PCIEFD_SYSID_ADDR(pcie) + KVASER_PCIEFD_SYSID_BUILD_REG);</div><div class='add'>+	pcie-&gt;nr_channels = min(KVASER_PCIEFD_MAX_CAN_CHANNELS,</div><div class='add'>+				FIELD_GET(KVASER_PCIEFD_SYSID_VERSION_NR_CHAN_MASK, version));</div><div class='add'>+	pcie-&gt;fw_version.major = FIELD_GET(KVASER_PCIEFD_SYSID_VERSION_MAJOR_MASK, version);</div><div class='add'>+	pcie-&gt;fw_version.minor = FIELD_GET(KVASER_PCIEFD_SYSID_VERSION_MINOR_MASK, version);</div><div class='add'>+	pcie-&gt;fw_version.build = FIELD_GET(KVASER_PCIEFD_SYSID_BUILD_SEQ_MASK, build);</div><div class='add'>+</div><div class='add'>+	srb_status = ioread32(KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_STAT_REG);</div><div class='add'>+	if (!(srb_status &amp; KVASER_PCIEFD_SRB_STAT_DMA)) {</div><div class='add'>+		dev_err(&amp;pcie-&gt;pci-&gt;dev, "Hardware without DMA is not supported\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pcie-&gt;bus_freq = ioread32(KVASER_PCIEFD_SYSID_ADDR(pcie) + KVASER_PCIEFD_SYSID_BUSFREQ_REG);</div><div class='add'>+	pcie-&gt;freq = ioread32(KVASER_PCIEFD_SYSID_ADDR(pcie) + KVASER_PCIEFD_SYSID_CANFREQ_REG);</div><div class='add'>+	pcie-&gt;freq_to_ticks_div = pcie-&gt;freq / 1000000;</div><div class='add'>+	if (pcie-&gt;freq_to_ticks_div == 0)</div><div class='add'>+		pcie-&gt;freq_to_ticks_div = 1;</div><div class='add'>+	/* Turn off all loopback functionality */</div><div class='add'>+	iowrite32(0, KVASER_PCIEFD_LOOPBACK_ADDR(pcie));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_pciefd_handle_data_packet(struct kvaser_pciefd *pcie,</div><div class='add'>+					    struct kvaser_pciefd_rx_packet *p,</div><div class='add'>+					    __le32 *data)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct canfd_frame *cf;</div><div class='add'>+	struct can_priv *priv;</div><div class='add'>+	u8 ch_id = FIELD_GET(KVASER_PCIEFD_PACKET_CHID_MASK, p-&gt;header[1]);</div><div class='add'>+	u8 dlc;</div><div class='add'>+</div><div class='add'>+	if (ch_id &gt;= pcie-&gt;nr_channels)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	priv = &amp;pcie-&gt;can[ch_id]-&gt;can;</div><div class='add'>+	dlc = FIELD_GET(KVASER_PCIEFD_RPACKET_DLC_MASK, p-&gt;header[1]);</div><div class='add'>+</div><div class='add'>+	if (p-&gt;header[1] &amp; KVASER_PCIEFD_RPACKET_FDF) {</div><div class='add'>+		skb = alloc_canfd_skb(priv-&gt;dev, &amp;cf);</div><div class='add'>+		if (!skb) {</div><div class='add'>+			priv-&gt;dev-&gt;stats.rx_dropped++;</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		cf-&gt;len = can_fd_dlc2len(dlc);</div><div class='add'>+		if (p-&gt;header[1] &amp; KVASER_PCIEFD_RPACKET_BRS)</div><div class='add'>+			cf-&gt;flags |= CANFD_BRS;</div><div class='add'>+		if (p-&gt;header[1] &amp; KVASER_PCIEFD_RPACKET_ESI)</div><div class='add'>+			cf-&gt;flags |= CANFD_ESI;</div><div class='add'>+	} else {</div><div class='add'>+		skb = alloc_can_skb(priv-&gt;dev, (struct can_frame **)&amp;cf);</div><div class='add'>+		if (!skb) {</div><div class='add'>+			priv-&gt;dev-&gt;stats.rx_dropped++;</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+		can_frame_set_cc_len((struct can_frame *)cf, dlc, priv-&gt;ctrlmode);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cf-&gt;can_id = FIELD_GET(KVASER_PCIEFD_RPACKET_ID_MASK, p-&gt;header[0]);</div><div class='add'>+	if (p-&gt;header[0] &amp; KVASER_PCIEFD_RPACKET_IDE)</div><div class='add'>+		cf-&gt;can_id |= CAN_EFF_FLAG;</div><div class='add'>+</div><div class='add'>+	if (p-&gt;header[0] &amp; KVASER_PCIEFD_RPACKET_RTR) {</div><div class='add'>+		cf-&gt;can_id |= CAN_RTR_FLAG;</div><div class='add'>+	} else {</div><div class='add'>+		memcpy(cf-&gt;data, data, cf-&gt;len);</div><div class='add'>+		priv-&gt;dev-&gt;stats.rx_bytes += cf-&gt;len;</div><div class='add'>+	}</div><div class='add'>+	priv-&gt;dev-&gt;stats.rx_packets++;</div><div class='add'>+	kvaser_pciefd_set_skb_timestamp(pcie, skb, p-&gt;timestamp);</div><div class='add'>+</div><div class='add'>+	netif_rx(skb);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_pciefd_change_state(struct kvaser_pciefd_can *can,</div><div class='add'>+				       const struct can_berr_counter *bec,</div><div class='add'>+				       struct can_frame *cf,</div><div class='add'>+				       enum can_state new_state,</div><div class='add'>+				       enum can_state tx_state,</div><div class='add'>+				       enum can_state rx_state)</div><div class='add'>+{</div><div class='add'>+	enum can_state old_state;</div><div class='add'>+</div><div class='add'>+	old_state = can-&gt;can.state;</div><div class='add'>+	can_change_state(can-&gt;can.dev, cf, tx_state, rx_state);</div><div class='add'>+</div><div class='add'>+	if (new_state == CAN_STATE_BUS_OFF) {</div><div class='add'>+		struct net_device *ndev = can-&gt;can.dev;</div><div class='add'>+		unsigned long irq_flags;</div><div class='add'>+</div><div class='add'>+		spin_lock_irqsave(&amp;can-&gt;lock, irq_flags);</div><div class='add'>+		netif_stop_queue(can-&gt;can.dev);</div><div class='add'>+		spin_unlock_irqrestore(&amp;can-&gt;lock, irq_flags);</div><div class='add'>+		/* Prevent CAN controller from auto recover from bus off */</div><div class='add'>+		if (!can-&gt;can.restart_ms) {</div><div class='add'>+			kvaser_pciefd_start_controller_flush(can);</div><div class='add'>+			can_bus_off(ndev);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	if (old_state == CAN_STATE_BUS_OFF &amp;&amp;</div><div class='add'>+	    new_state == CAN_STATE_ERROR_ACTIVE &amp;&amp;</div><div class='add'>+	    can-&gt;can.restart_ms) {</div><div class='add'>+		can-&gt;can.can_stats.restarts++;</div><div class='add'>+		if (cf)</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_RESTARTED;</div><div class='add'>+	}</div><div class='add'>+	if (cf &amp;&amp; new_state != CAN_STATE_BUS_OFF) {</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_CNT;</div><div class='add'>+		cf-&gt;data[6] = bec-&gt;txerr;</div><div class='add'>+		cf-&gt;data[7] = bec-&gt;rxerr;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_pciefd_packet_to_state(struct kvaser_pciefd_rx_packet *p,</div><div class='add'>+					  struct can_berr_counter *bec,</div><div class='add'>+					  enum can_state *new_state,</div><div class='add'>+					  enum can_state *tx_state,</div><div class='add'>+					  enum can_state *rx_state)</div><div class='add'>+{</div><div class='add'>+	if (p-&gt;header[0] &amp; KVASER_PCIEFD_SPACK_BOFF ||</div><div class='add'>+	    p-&gt;header[0] &amp; KVASER_PCIEFD_SPACK_IRM)</div><div class='add'>+		*new_state = CAN_STATE_BUS_OFF;</div><div class='add'>+	else if (bec-&gt;txerr &gt;= 255 || bec-&gt;rxerr &gt;= 255)</div><div class='add'>+		*new_state = CAN_STATE_BUS_OFF;</div><div class='add'>+	else if (p-&gt;header[1] &amp; KVASER_PCIEFD_SPACK_EPLR)</div><div class='add'>+		*new_state = CAN_STATE_ERROR_PASSIVE;</div><div class='add'>+	else if (bec-&gt;txerr &gt;= 128 || bec-&gt;rxerr &gt;= 128)</div><div class='add'>+		*new_state = CAN_STATE_ERROR_PASSIVE;</div><div class='add'>+	else if (p-&gt;header[1] &amp; KVASER_PCIEFD_SPACK_EWLR)</div><div class='add'>+		*new_state = CAN_STATE_ERROR_WARNING;</div><div class='add'>+	else if (bec-&gt;txerr &gt;= 96 || bec-&gt;rxerr &gt;= 96)</div><div class='add'>+		*new_state = CAN_STATE_ERROR_WARNING;</div><div class='add'>+	else</div><div class='add'>+		*new_state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+</div><div class='add'>+	*tx_state = bec-&gt;txerr &gt;= bec-&gt;rxerr ? *new_state : 0;</div><div class='add'>+	*rx_state = bec-&gt;txerr &lt;= bec-&gt;rxerr ? *new_state : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_pciefd_rx_error_frame(struct kvaser_pciefd_can *can,</div><div class='add'>+					struct kvaser_pciefd_rx_packet *p)</div><div class='add'>+{</div><div class='add'>+	struct can_berr_counter bec;</div><div class='add'>+	enum can_state old_state, new_state, tx_state, rx_state;</div><div class='add'>+	struct net_device *ndev = can-&gt;can.dev;</div><div class='add'>+	struct sk_buff *skb = NULL;</div><div class='add'>+	struct can_frame *cf = NULL;</div><div class='add'>+</div><div class='add'>+	old_state = can-&gt;can.state;</div><div class='add'>+</div><div class='add'>+	bec.txerr = FIELD_GET(KVASER_PCIEFD_SPACK_TXERR_MASK, p-&gt;header[0]);</div><div class='add'>+	bec.rxerr = FIELD_GET(KVASER_PCIEFD_SPACK_RXERR_MASK, p-&gt;header[0]);</div><div class='add'>+</div><div class='add'>+	kvaser_pciefd_packet_to_state(p, &amp;bec, &amp;new_state, &amp;tx_state, &amp;rx_state);</div><div class='add'>+	if (can-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING)</div><div class='add'>+		skb = alloc_can_err_skb(ndev, &amp;cf);</div><div class='add'>+	if (new_state != old_state) {</div><div class='add'>+		kvaser_pciefd_change_state(can, &amp;bec, cf, new_state, tx_state, rx_state);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	can-&gt;err_rep_cnt++;</div><div class='add'>+	can-&gt;can.can_stats.bus_error++;</div><div class='add'>+	if (p-&gt;header[1] &amp; KVASER_PCIEFD_EPACK_DIR_TX)</div><div class='add'>+		ndev-&gt;stats.tx_errors++;</div><div class='add'>+	else</div><div class='add'>+		ndev-&gt;stats.rx_errors++;</div><div class='add'>+</div><div class='add'>+	can-&gt;bec.txerr = bec.txerr;</div><div class='add'>+	can-&gt;bec.rxerr = bec.rxerr;</div><div class='add'>+</div><div class='add'>+	if (can-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING) {</div><div class='add'>+		if (!skb) {</div><div class='add'>+			netdev_warn(ndev, "No memory left for err_skb\n");</div><div class='add'>+			ndev-&gt;stats.rx_dropped++;</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		}</div><div class='add'>+		kvaser_pciefd_set_skb_timestamp(can-&gt;kv_pcie, skb, p-&gt;timestamp);</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_BUSERROR | CAN_ERR_CNT;</div><div class='add'>+		cf-&gt;data[6] = bec.txerr;</div><div class='add'>+		cf-&gt;data[7] = bec.rxerr;</div><div class='add'>+		netif_rx(skb);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_pciefd_handle_error_packet(struct kvaser_pciefd *pcie,</div><div class='add'>+					     struct kvaser_pciefd_rx_packet *p)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_pciefd_can *can;</div><div class='add'>+	u8 ch_id = FIELD_GET(KVASER_PCIEFD_PACKET_CHID_MASK, p-&gt;header[1]);</div><div class='add'>+</div><div class='add'>+	if (ch_id &gt;= pcie-&gt;nr_channels)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	can = pcie-&gt;can[ch_id];</div><div class='add'>+	kvaser_pciefd_rx_error_frame(can, p);</div><div class='add'>+	if (can-&gt;err_rep_cnt &gt;= KVASER_PCIEFD_MAX_ERR_REP)</div><div class='add'>+		/* Do not report more errors, until bec_poll_timer expires */</div><div class='add'>+		kvaser_pciefd_disable_err_gen(can);</div><div class='add'>+	/* Start polling the error counters */</div><div class='add'>+	mod_timer(&amp;can-&gt;bec_poll_timer, KVASER_PCIEFD_BEC_POLL_FREQ);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_pciefd_handle_status_resp(struct kvaser_pciefd_can *can,</div><div class='add'>+					    struct kvaser_pciefd_rx_packet *p)</div><div class='add'>+{</div><div class='add'>+	struct can_berr_counter bec;</div><div class='add'>+	enum can_state old_state, new_state, tx_state, rx_state;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	old_state = can-&gt;can.state;</div><div class='add'>+</div><div class='add'>+	bec.txerr = FIELD_GET(KVASER_PCIEFD_SPACK_TXERR_MASK, p-&gt;header[0]);</div><div class='add'>+	bec.rxerr = FIELD_GET(KVASER_PCIEFD_SPACK_RXERR_MASK, p-&gt;header[0]);</div><div class='add'>+</div><div class='add'>+	kvaser_pciefd_packet_to_state(p, &amp;bec, &amp;new_state, &amp;tx_state, &amp;rx_state);</div><div class='add'>+	if (new_state != old_state) {</div><div class='add'>+		struct net_device *ndev = can-&gt;can.dev;</div><div class='add'>+		struct sk_buff *skb;</div><div class='add'>+		struct can_frame *cf;</div><div class='add'>+</div><div class='add'>+		skb = alloc_can_err_skb(ndev, &amp;cf);</div><div class='add'>+		kvaser_pciefd_change_state(can, &amp;bec, cf, new_state, tx_state, rx_state);</div><div class='add'>+		if (skb) {</div><div class='add'>+			kvaser_pciefd_set_skb_timestamp(can-&gt;kv_pcie, skb, p-&gt;timestamp);</div><div class='add'>+			netif_rx(skb);</div><div class='add'>+		} else {</div><div class='add'>+			ndev-&gt;stats.rx_dropped++;</div><div class='add'>+			netdev_warn(ndev, "No memory left for err_skb\n");</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	can-&gt;bec.txerr = bec.txerr;</div><div class='add'>+	can-&gt;bec.rxerr = bec.rxerr;</div><div class='add'>+	/* Check if we need to poll the error counters */</div><div class='add'>+	if (bec.txerr || bec.rxerr)</div><div class='add'>+		mod_timer(&amp;can-&gt;bec_poll_timer, KVASER_PCIEFD_BEC_POLL_FREQ);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_pciefd_handle_status_packet(struct kvaser_pciefd *pcie,</div><div class='add'>+					      struct kvaser_pciefd_rx_packet *p)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_pciefd_can *can;</div><div class='add'>+	u8 cmdseq;</div><div class='add'>+	u32 status;</div><div class='add'>+	u8 ch_id = FIELD_GET(KVASER_PCIEFD_PACKET_CHID_MASK, p-&gt;header[1]);</div><div class='add'>+</div><div class='add'>+	if (ch_id &gt;= pcie-&gt;nr_channels)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	can = pcie-&gt;can[ch_id];</div><div class='add'>+</div><div class='add'>+	status = ioread32(can-&gt;reg_base + KVASER_PCIEFD_KCAN_STAT_REG);</div><div class='add'>+	cmdseq = FIELD_GET(KVASER_PCIEFD_KCAN_STAT_SEQNO_MASK, status);</div><div class='add'>+</div><div class='add'>+	/* Reset done, start abort and flush */</div><div class='add'>+	if (p-&gt;header[0] &amp; KVASER_PCIEFD_SPACK_IRM &amp;&amp;</div><div class='add'>+	    p-&gt;header[0] &amp; KVASER_PCIEFD_SPACK_RMCD &amp;&amp;</div><div class='add'>+	    p-&gt;header[1] &amp; KVASER_PCIEFD_SPACK_AUTO &amp;&amp;</div><div class='add'>+	    cmdseq == FIELD_GET(KVASER_PCIEFD_PACKET_SEQ_MASK, p-&gt;header[1]) &amp;&amp;</div><div class='add'>+	    status &amp; KVASER_PCIEFD_KCAN_STAT_IDLE) {</div><div class='add'>+		iowrite32(KVASER_PCIEFD_KCAN_IRQ_ABD,</div><div class='add'>+			  can-&gt;reg_base + KVASER_PCIEFD_KCAN_IRQ_REG);</div><div class='add'>+		kvaser_pciefd_abort_flush_reset(can);</div><div class='add'>+	} else if (p-&gt;header[0] &amp; KVASER_PCIEFD_SPACK_IDET &amp;&amp;</div><div class='add'>+		   p-&gt;header[0] &amp; KVASER_PCIEFD_SPACK_IRM &amp;&amp;</div><div class='add'>+		   cmdseq == FIELD_GET(KVASER_PCIEFD_PACKET_SEQ_MASK, p-&gt;header[1]) &amp;&amp;</div><div class='add'>+		   status &amp; KVASER_PCIEFD_KCAN_STAT_IDLE) {</div><div class='add'>+		/* Reset detected, send end of flush if no packet are in FIFO */</div><div class='add'>+		u8 count;</div><div class='add'>+</div><div class='add'>+		count = FIELD_GET(KVASER_PCIEFD_KCAN_TX_NR_PACKETS_CURRENT_MASK,</div><div class='add'>+				  ioread32(can-&gt;reg_base + KVASER_PCIEFD_KCAN_TX_NR_PACKETS_REG));</div><div class='add'>+		if (!count)</div><div class='add'>+			iowrite32(FIELD_PREP(KVASER_PCIEFD_KCAN_CTRL_TYPE_MASK,</div><div class='add'>+					     KVASER_PCIEFD_KCAN_CTRL_TYPE_EFLUSH),</div><div class='add'>+				  can-&gt;reg_base + KVASER_PCIEFD_KCAN_CTRL_REG);</div><div class='add'>+	} else if (!(p-&gt;header[1] &amp; KVASER_PCIEFD_SPACK_AUTO) &amp;&amp;</div><div class='add'>+		   cmdseq == FIELD_GET(KVASER_PCIEFD_PACKET_SEQ_MASK, p-&gt;header[1])) {</div><div class='add'>+		/* Response to status request received */</div><div class='add'>+		kvaser_pciefd_handle_status_resp(can, p);</div><div class='add'>+		if (can-&gt;can.state != CAN_STATE_BUS_OFF &amp;&amp;</div><div class='add'>+		    can-&gt;can.state != CAN_STATE_ERROR_ACTIVE) {</div><div class='add'>+			mod_timer(&amp;can-&gt;bec_poll_timer, KVASER_PCIEFD_BEC_POLL_FREQ);</div><div class='add'>+		}</div><div class='add'>+	} else if (p-&gt;header[0] &amp; KVASER_PCIEFD_SPACK_RMCD &amp;&amp;</div><div class='add'>+		   !(status &amp; KVASER_PCIEFD_KCAN_STAT_BUS_OFF_MASK)) {</div><div class='add'>+		/* Reset to bus on detected */</div><div class='add'>+		if (!completion_done(&amp;can-&gt;start_comp))</div><div class='add'>+			complete(&amp;can-&gt;start_comp);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_pciefd_handle_nack_packet(struct kvaser_pciefd_can *can,</div><div class='add'>+					     struct kvaser_pciefd_rx_packet *p)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_err_skb(can-&gt;can.dev, &amp;cf);</div><div class='add'>+	can-&gt;can.dev-&gt;stats.tx_errors++;</div><div class='add'>+	if (p-&gt;header[0] &amp; KVASER_PCIEFD_APACKET_ABL) {</div><div class='add'>+		if (skb)</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_LOSTARB;</div><div class='add'>+		can-&gt;can.can_stats.arbitration_lost++;</div><div class='add'>+	} else if (skb) {</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_ACK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (skb) {</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_BUSERROR;</div><div class='add'>+		kvaser_pciefd_set_skb_timestamp(can-&gt;kv_pcie, skb, p-&gt;timestamp);</div><div class='add'>+		netif_rx(skb);</div><div class='add'>+	} else {</div><div class='add'>+		can-&gt;can.dev-&gt;stats.rx_dropped++;</div><div class='add'>+		netdev_warn(can-&gt;can.dev, "No memory left for err_skb\n");</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_pciefd_handle_ack_packet(struct kvaser_pciefd *pcie,</div><div class='add'>+					   struct kvaser_pciefd_rx_packet *p)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_pciefd_can *can;</div><div class='add'>+	bool one_shot_fail = false;</div><div class='add'>+	u8 ch_id = FIELD_GET(KVASER_PCIEFD_PACKET_CHID_MASK, p-&gt;header[1]);</div><div class='add'>+</div><div class='add'>+	if (ch_id &gt;= pcie-&gt;nr_channels)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	can = pcie-&gt;can[ch_id];</div><div class='add'>+	/* Ignore control packet ACK */</div><div class='add'>+	if (p-&gt;header[0] &amp; KVASER_PCIEFD_APACKET_CT)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (p-&gt;header[0] &amp; KVASER_PCIEFD_APACKET_NACK) {</div><div class='add'>+		kvaser_pciefd_handle_nack_packet(can, p);</div><div class='add'>+		one_shot_fail = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (p-&gt;header[0] &amp; KVASER_PCIEFD_APACKET_FLU) {</div><div class='add'>+		netdev_dbg(can-&gt;can.dev, "Packet was flushed\n");</div><div class='add'>+	} else {</div><div class='add'>+		int echo_idx = FIELD_GET(KVASER_PCIEFD_PACKET_SEQ_MASK, p-&gt;header[0]);</div><div class='add'>+		unsigned int len, frame_len = 0;</div><div class='add'>+		struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+		if (echo_idx != (can-&gt;ack_idx &amp; (can-&gt;can.echo_skb_max - 1)))</div><div class='add'>+			return 0;</div><div class='add'>+		skb = can-&gt;can.echo_skb[echo_idx];</div><div class='add'>+		if (!skb)</div><div class='add'>+			return 0;</div><div class='add'>+		kvaser_pciefd_set_skb_timestamp(pcie, skb, p-&gt;timestamp);</div><div class='add'>+		len = can_get_echo_skb(can-&gt;can.dev, echo_idx, &amp;frame_len);</div><div class='add'>+</div><div class='add'>+		/* Pairs with barrier in kvaser_pciefd_start_xmit() */</div><div class='add'>+		smp_store_release(&amp;can-&gt;ack_idx, can-&gt;ack_idx + 1);</div><div class='add'>+		can-&gt;completed_tx_pkts++;</div><div class='add'>+		can-&gt;completed_tx_bytes += frame_len;</div><div class='add'>+</div><div class='add'>+		if (!one_shot_fail) {</div><div class='add'>+			can-&gt;can.dev-&gt;stats.tx_bytes += len;</div><div class='add'>+			can-&gt;can.dev-&gt;stats.tx_packets++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_pciefd_handle_eflush_packet(struct kvaser_pciefd *pcie,</div><div class='add'>+					      struct kvaser_pciefd_rx_packet *p)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_pciefd_can *can;</div><div class='add'>+	u8 ch_id = FIELD_GET(KVASER_PCIEFD_PACKET_CHID_MASK, p-&gt;header[1]);</div><div class='add'>+</div><div class='add'>+	if (ch_id &gt;= pcie-&gt;nr_channels)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	can = pcie-&gt;can[ch_id];</div><div class='add'>+</div><div class='add'>+	if (!completion_done(&amp;can-&gt;flush_comp))</div><div class='add'>+		complete(&amp;can-&gt;flush_comp);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_pciefd_read_packet(struct kvaser_pciefd *pcie, int *start_pos,</div><div class='add'>+				     int dma_buf)</div><div class='add'>+{</div><div class='add'>+	__le32 *buffer = pcie-&gt;dma_data[dma_buf];</div><div class='add'>+	__le64 timestamp;</div><div class='add'>+	struct kvaser_pciefd_rx_packet packet;</div><div class='add'>+	struct kvaser_pciefd_rx_packet *p = &amp;packet;</div><div class='add'>+	u8 type;</div><div class='add'>+	int pos = *start_pos;</div><div class='add'>+	int size;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	size = le32_to_cpu(buffer[pos++]);</div><div class='add'>+	if (!size) {</div><div class='add'>+		*start_pos = 0;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	p-&gt;header[0] = le32_to_cpu(buffer[pos++]);</div><div class='add'>+	p-&gt;header[1] = le32_to_cpu(buffer[pos++]);</div><div class='add'>+</div><div class='add'>+	/* Read 64-bit timestamp */</div><div class='add'>+	memcpy(&amp;timestamp, &amp;buffer[pos], sizeof(__le64));</div><div class='add'>+	pos += 2;</div><div class='add'>+	p-&gt;timestamp = le64_to_cpu(timestamp);</div><div class='add'>+</div><div class='add'>+	type = FIELD_GET(KVASER_PCIEFD_PACKET_TYPE_MASK, p-&gt;header[1]);</div><div class='add'>+	switch (type) {</div><div class='add'>+	case KVASER_PCIEFD_PACK_TYPE_DATA:</div><div class='add'>+		ret = kvaser_pciefd_handle_data_packet(pcie, p, &amp;buffer[pos]);</div><div class='add'>+		if (!(p-&gt;header[0] &amp; KVASER_PCIEFD_RPACKET_RTR)) {</div><div class='add'>+			u8 data_len;</div><div class='add'>+</div><div class='add'>+			data_len = can_fd_dlc2len(FIELD_GET(KVASER_PCIEFD_RPACKET_DLC_MASK,</div><div class='add'>+							    p-&gt;header[1]));</div><div class='add'>+			pos += DIV_ROUND_UP(data_len, 4);</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case KVASER_PCIEFD_PACK_TYPE_ACK:</div><div class='add'>+		ret = kvaser_pciefd_handle_ack_packet(pcie, p);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case KVASER_PCIEFD_PACK_TYPE_STATUS:</div><div class='add'>+		ret = kvaser_pciefd_handle_status_packet(pcie, p);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case KVASER_PCIEFD_PACK_TYPE_ERROR:</div><div class='add'>+		ret = kvaser_pciefd_handle_error_packet(pcie, p);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case KVASER_PCIEFD_PACK_TYPE_EFLUSH_ACK:</div><div class='add'>+		ret = kvaser_pciefd_handle_eflush_packet(pcie, p);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case KVASER_PCIEFD_PACK_TYPE_ACK_DATA:</div><div class='add'>+	case KVASER_PCIEFD_PACK_TYPE_BUS_LOAD:</div><div class='add'>+	case KVASER_PCIEFD_PACK_TYPE_EFRAME_ACK:</div><div class='add'>+	case KVASER_PCIEFD_PACK_TYPE_TXRQ:</div><div class='add'>+		dev_info(&amp;pcie-&gt;pci-&gt;dev,</div><div class='add'>+			 "Received unexpected packet type 0x%08X\n", type);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		dev_err(&amp;pcie-&gt;pci-&gt;dev, "Unknown packet type 0x%08X\n", type);</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Position does not point to the end of the package,</div><div class='add'>+	 * corrupted packet size?</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely((*start_pos + size) != pos))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	/* Point to the next packet header, if any */</div><div class='add'>+	*start_pos = pos;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_pciefd_read_buffer(struct kvaser_pciefd *pcie, int dma_buf)</div><div class='add'>+{</div><div class='add'>+	int pos = 0;</div><div class='add'>+	int res = 0;</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		res = kvaser_pciefd_read_packet(pcie, &amp;pos, dma_buf);</div><div class='add'>+	} while (!res &amp;&amp; pos &gt; 0 &amp;&amp; pos &lt; KVASER_PCIEFD_DMA_SIZE);</div><div class='add'>+</div><div class='add'>+	/* Report ACKs in this buffer to BQL en masse for correct periods */</div><div class='add'>+	for (i = 0; i &lt; pcie-&gt;nr_channels; ++i) {</div><div class='add'>+		struct kvaser_pciefd_can *can = pcie-&gt;can[i];</div><div class='add'>+</div><div class='add'>+		if (!can-&gt;completed_tx_pkts)</div><div class='add'>+			continue;</div><div class='add'>+		netif_subqueue_completed_wake(can-&gt;can.dev, 0,</div><div class='add'>+					      can-&gt;completed_tx_pkts,</div><div class='add'>+					      can-&gt;completed_tx_bytes,</div><div class='add'>+					      kvaser_pciefd_tx_avail(can), 1);</div><div class='add'>+		can-&gt;completed_tx_pkts = 0;</div><div class='add'>+		can-&gt;completed_tx_bytes = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_pciefd_receive_irq(struct kvaser_pciefd *pcie)</div><div class='add'>+{</div><div class='add'>+	void __iomem *srb_cmd_reg = KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_CMD_REG;</div><div class='add'>+	u32 irq = ioread32(KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_IRQ_REG);</div><div class='add'>+</div><div class='add'>+	iowrite32(irq, KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_IRQ_REG);</div><div class='add'>+</div><div class='add'>+	if (irq &amp; KVASER_PCIEFD_SRB_IRQ_DPD0) {</div><div class='add'>+		kvaser_pciefd_read_buffer(pcie, 0);</div><div class='add'>+		iowrite32(KVASER_PCIEFD_SRB_CMD_RDB0, srb_cmd_reg); /* Rearm buffer */</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (irq &amp; KVASER_PCIEFD_SRB_IRQ_DPD1) {</div><div class='add'>+		kvaser_pciefd_read_buffer(pcie, 1);</div><div class='add'>+		iowrite32(KVASER_PCIEFD_SRB_CMD_RDB1, srb_cmd_reg); /* Rearm buffer */</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (unlikely(irq &amp; KVASER_PCIEFD_SRB_IRQ_DOF0 ||</div><div class='add'>+		     irq &amp; KVASER_PCIEFD_SRB_IRQ_DOF1 ||</div><div class='add'>+		     irq &amp; KVASER_PCIEFD_SRB_IRQ_DUF0 ||</div><div class='add'>+		     irq &amp; KVASER_PCIEFD_SRB_IRQ_DUF1))</div><div class='add'>+		dev_err(&amp;pcie-&gt;pci-&gt;dev, "DMA IRQ error 0x%08X\n", irq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_pciefd_transmit_irq(struct kvaser_pciefd_can *can)</div><div class='add'>+{</div><div class='add'>+	u32 irq = ioread32(can-&gt;reg_base + KVASER_PCIEFD_KCAN_IRQ_REG);</div><div class='add'>+</div><div class='add'>+	if (irq &amp; KVASER_PCIEFD_KCAN_IRQ_TOF)</div><div class='add'>+		netdev_err(can-&gt;can.dev, "Tx FIFO overflow\n");</div><div class='add'>+</div><div class='add'>+	if (irq &amp; KVASER_PCIEFD_KCAN_IRQ_BPP)</div><div class='add'>+		netdev_err(can-&gt;can.dev,</div><div class='add'>+			   "Fail to change bittiming, when not in reset mode\n");</div><div class='add'>+</div><div class='add'>+	if (irq &amp; KVASER_PCIEFD_KCAN_IRQ_FDIC)</div><div class='add'>+		netdev_err(can-&gt;can.dev, "CAN FD frame in CAN mode\n");</div><div class='add'>+</div><div class='add'>+	if (irq &amp; KVASER_PCIEFD_KCAN_IRQ_ROF)</div><div class='add'>+		netdev_err(can-&gt;can.dev, "Rx FIFO overflow\n");</div><div class='add'>+</div><div class='add'>+	iowrite32(irq, can-&gt;reg_base + KVASER_PCIEFD_KCAN_IRQ_REG);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t kvaser_pciefd_irq_handler(int irq, void *dev)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_pciefd *pcie = (struct kvaser_pciefd *)dev;</div><div class='add'>+	const struct kvaser_pciefd_irq_mask *irq_mask = pcie-&gt;driver_data-&gt;irq_mask;</div><div class='add'>+	u32 pci_irq = ioread32(KVASER_PCIEFD_PCI_IRQ_ADDR(pcie));</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!(pci_irq &amp; irq_mask-&gt;all))</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+</div><div class='add'>+	iowrite32(0, KVASER_PCIEFD_PCI_IEN_ADDR(pcie));</div><div class='add'>+</div><div class='add'>+	if (pci_irq &amp; irq_mask-&gt;kcan_rx0)</div><div class='add'>+		kvaser_pciefd_receive_irq(pcie);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pcie-&gt;nr_channels; i++) {</div><div class='add'>+		if (pci_irq &amp; irq_mask-&gt;kcan_tx[i])</div><div class='add'>+			kvaser_pciefd_transmit_irq(pcie-&gt;can[i]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	iowrite32(irq_mask-&gt;all, KVASER_PCIEFD_PCI_IEN_ADDR(pcie));</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_pciefd_teardown_can_ctrls(struct kvaser_pciefd *pcie)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pcie-&gt;nr_channels; i++) {</div><div class='add'>+		struct kvaser_pciefd_can *can = pcie-&gt;can[i];</div><div class='add'>+</div><div class='add'>+		if (can) {</div><div class='add'>+			iowrite32(0, can-&gt;reg_base + KVASER_PCIEFD_KCAN_IEN_REG);</div><div class='add'>+			kvaser_pciefd_pwm_stop(can);</div><div class='add'>+			kvaser_pciefd_devlink_port_unregister(can);</div><div class='add'>+			free_candev(can-&gt;can.dev);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_pciefd_disable_irq_srcs(struct kvaser_pciefd *pcie)</div><div class='add'>+{</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	/* Masking PCI_IRQ is insufficient as running ISR will unmask it */</div><div class='add'>+	iowrite32(0, KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_IEN_REG);</div><div class='add'>+	for (i = 0; i &lt; pcie-&gt;nr_channels; ++i)</div><div class='add'>+		iowrite32(0, pcie-&gt;can[i]-&gt;reg_base + KVASER_PCIEFD_KCAN_IEN_REG);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_pciefd_probe(struct pci_dev *pdev,</div><div class='add'>+			       const struct pci_device_id *id)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct devlink *devlink;</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct kvaser_pciefd *pcie;</div><div class='add'>+	const struct kvaser_pciefd_irq_mask *irq_mask;</div><div class='add'>+</div><div class='add'>+	devlink = devlink_alloc(&amp;kvaser_pciefd_devlink_ops, sizeof(*pcie), dev);</div><div class='add'>+	if (!devlink)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	pcie = devlink_priv(devlink);</div><div class='add'>+	pci_set_drvdata(pdev, pcie);</div><div class='add'>+	pcie-&gt;pci = pdev;</div><div class='add'>+	pcie-&gt;driver_data = (const struct kvaser_pciefd_driver_data *)id-&gt;driver_data;</div><div class='add'>+	irq_mask = pcie-&gt;driver_data-&gt;irq_mask;</div><div class='add'>+</div><div class='add'>+	ret = pci_enable_device(pdev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_free_devlink;</div><div class='add'>+</div><div class='add'>+	ret = pci_request_regions(pdev, KVASER_PCIEFD_DRV_NAME);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_disable_pci;</div><div class='add'>+</div><div class='add'>+	pcie-&gt;reg_base = pci_iomap(pdev, 0, 0);</div><div class='add'>+	if (!pcie-&gt;reg_base) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err_release_regions;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = kvaser_pciefd_setup_board(pcie);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_pci_iounmap;</div><div class='add'>+</div><div class='add'>+	ret = kvaser_pciefd_setup_dma(pcie);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_pci_iounmap;</div><div class='add'>+</div><div class='add'>+	pci_set_master(pdev);</div><div class='add'>+</div><div class='add'>+	ret = kvaser_pciefd_setup_can_ctrls(pcie);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_teardown_can_ctrls;</div><div class='add'>+</div><div class='add'>+	ret = pci_alloc_irq_vectors(pcie-&gt;pci, 1, 1, PCI_IRQ_INTX | PCI_IRQ_MSI);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(dev, "Failed to allocate IRQ vectors.\n");</div><div class='add'>+		goto err_teardown_can_ctrls;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = pci_irq_vector(pcie-&gt;pci, 0);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err_pci_free_irq_vectors;</div><div class='add'>+</div><div class='add'>+	pcie-&gt;pci-&gt;irq = ret;</div><div class='add'>+</div><div class='add'>+	ret = request_irq(pcie-&gt;pci-&gt;irq, kvaser_pciefd_irq_handler,</div><div class='add'>+			  IRQF_SHARED, KVASER_PCIEFD_DRV_NAME, pcie);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "Failed to request IRQ %d\n", pcie-&gt;pci-&gt;irq);</div><div class='add'>+		goto err_pci_free_irq_vectors;</div><div class='add'>+	}</div><div class='add'>+	iowrite32(KVASER_PCIEFD_SRB_IRQ_DPD0 | KVASER_PCIEFD_SRB_IRQ_DPD1,</div><div class='add'>+		  KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_IRQ_REG);</div><div class='add'>+</div><div class='add'>+	iowrite32(KVASER_PCIEFD_SRB_IRQ_DPD0 | KVASER_PCIEFD_SRB_IRQ_DPD1 |</div><div class='add'>+		  KVASER_PCIEFD_SRB_IRQ_DOF0 | KVASER_PCIEFD_SRB_IRQ_DOF1 |</div><div class='add'>+		  KVASER_PCIEFD_SRB_IRQ_DUF0 | KVASER_PCIEFD_SRB_IRQ_DUF1,</div><div class='add'>+		  KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_IEN_REG);</div><div class='add'>+</div><div class='add'>+	/* Enable PCI interrupts */</div><div class='add'>+	iowrite32(irq_mask-&gt;all, KVASER_PCIEFD_PCI_IEN_ADDR(pcie));</div><div class='add'>+	/* Ready the DMA buffers */</div><div class='add'>+	iowrite32(KVASER_PCIEFD_SRB_CMD_RDB0,</div><div class='add'>+		  KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_CMD_REG);</div><div class='add'>+	iowrite32(KVASER_PCIEFD_SRB_CMD_RDB1,</div><div class='add'>+		  KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_CMD_REG);</div><div class='add'>+</div><div class='add'>+	ret = kvaser_pciefd_reg_candev(pcie);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_free_irq;</div><div class='add'>+</div><div class='add'>+	devlink_register(devlink);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_irq:</div><div class='add'>+	kvaser_pciefd_disable_irq_srcs(pcie);</div><div class='add'>+	free_irq(pcie-&gt;pci-&gt;irq, pcie);</div><div class='add'>+</div><div class='add'>+err_pci_free_irq_vectors:</div><div class='add'>+	pci_free_irq_vectors(pcie-&gt;pci);</div><div class='add'>+</div><div class='add'>+err_teardown_can_ctrls:</div><div class='add'>+	kvaser_pciefd_teardown_can_ctrls(pcie);</div><div class='add'>+	iowrite32(0, KVASER_PCIEFD_SRB_ADDR(pcie) + KVASER_PCIEFD_SRB_CTRL_REG);</div><div class='add'>+	pci_clear_master(pdev);</div><div class='add'>+</div><div class='add'>+err_pci_iounmap:</div><div class='add'>+	pci_iounmap(pdev, pcie-&gt;reg_base);</div><div class='add'>+</div><div class='add'>+err_release_regions:</div><div class='add'>+	pci_release_regions(pdev);</div><div class='add'>+</div><div class='add'>+err_disable_pci:</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+</div><div class='add'>+err_free_devlink:</div><div class='add'>+	devlink_free(devlink);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_pciefd_remove(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_pciefd *pcie = pci_get_drvdata(pdev);</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pcie-&gt;nr_channels; ++i) {</div><div class='add'>+		struct kvaser_pciefd_can *can = pcie-&gt;can[i];</div><div class='add'>+</div><div class='add'>+		unregister_candev(can-&gt;can.dev);</div><div class='add'>+		timer_delete(&amp;can-&gt;bec_poll_timer);</div><div class='add'>+		kvaser_pciefd_pwm_stop(can);</div><div class='add'>+		kvaser_pciefd_devlink_port_unregister(can);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kvaser_pciefd_disable_irq_srcs(pcie);</div><div class='add'>+	free_irq(pcie-&gt;pci-&gt;irq, pcie);</div><div class='add'>+	pci_free_irq_vectors(pcie-&gt;pci);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pcie-&gt;nr_channels; ++i)</div><div class='add'>+		free_candev(pcie-&gt;can[i]-&gt;can.dev);</div><div class='add'>+</div><div class='add'>+	devlink_unregister(priv_to_devlink(pcie));</div><div class='add'>+	pci_iounmap(pdev, pcie-&gt;reg_base);</div><div class='add'>+	pci_release_regions(pdev);</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+	devlink_free(priv_to_devlink(pcie));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct pci_driver kvaser_pciefd = {</div><div class='add'>+	.name = KVASER_PCIEFD_DRV_NAME,</div><div class='add'>+	.id_table = kvaser_pciefd_id_table,</div><div class='add'>+	.probe = kvaser_pciefd_probe,</div><div class='add'>+	.remove = kvaser_pciefd_remove,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_pci_driver(kvaser_pciefd)</div><div class='head'>diff --git a/drivers/net/can/kvaser_pciefd/kvaser_pciefd_devlink.c b/drivers/net/can/kvaser_pciefd/kvaser_pciefd_devlink.c<br/>new file mode 100644<br/>index 000000000000..1d61a8b0eeba<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/kvaser_pciefd/kvaser_pciefd_devlink.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/kvaser_pciefd/kvaser_pciefd_devlink.c</a></div><div class='hunk'>@@ -0,0 +1,60 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+/* kvaser_pciefd devlink functions</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 KVASER AB, Sweden. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+#include "kvaser_pciefd.h"</div><div class='add'>+</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;net/devlink.h&gt;</div><div class='add'>+</div><div class='add'>+static int kvaser_pciefd_devlink_info_get(struct devlink *devlink,</div><div class='add'>+					  struct devlink_info_req *req,</div><div class='add'>+					  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_pciefd *pcie = devlink_priv(devlink);</div><div class='add'>+	char buf[] = "xxx.xxx.xxxxx";</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (pcie-&gt;fw_version.major) {</div><div class='add'>+		snprintf(buf, sizeof(buf), "%u.%u.%u",</div><div class='add'>+			 pcie-&gt;fw_version.major,</div><div class='add'>+			 pcie-&gt;fw_version.minor,</div><div class='add'>+			 pcie-&gt;fw_version.build);</div><div class='add'>+		ret = devlink_info_version_running_put(req,</div><div class='add'>+						       DEVLINK_INFO_VERSION_GENERIC_FW,</div><div class='add'>+						       buf);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct devlink_ops kvaser_pciefd_devlink_ops = {</div><div class='add'>+	.info_get = kvaser_pciefd_devlink_info_get,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int kvaser_pciefd_devlink_port_register(struct kvaser_pciefd_can *can)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct devlink_port_attrs attrs = {</div><div class='add'>+		.flavour = DEVLINK_PORT_FLAVOUR_PHYSICAL,</div><div class='add'>+		.phys.port_number = can-&gt;can.dev-&gt;dev_port,</div><div class='add'>+	};</div><div class='add'>+	devlink_port_attrs_set(&amp;can-&gt;devlink_port, &amp;attrs);</div><div class='add'>+</div><div class='add'>+	ret = devlink_port_register(priv_to_devlink(can-&gt;kv_pcie),</div><div class='add'>+				    &amp;can-&gt;devlink_port, can-&gt;can.dev-&gt;dev_port);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	SET_NETDEV_DEVLINK_PORT(can-&gt;can.dev, &amp;can-&gt;devlink_port);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void kvaser_pciefd_devlink_port_unregister(struct kvaser_pciefd_can *can)</div><div class='add'>+{</div><div class='add'>+	devlink_port_unregister(&amp;can-&gt;devlink_port);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/can/led.c b/drivers/net/can/led.c<br/>deleted file mode 100644<br/>index c1b667675fa1..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/led.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/led.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,143 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright 2012, Fabio Baltieri &lt;fabio.baltieri@gmail.com&gt;</div><div class='del'>- * Copyright 2012, Kurt Van Dijck &lt;kurt.van.dijck@eia.be&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/device.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/can/dev.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;linux/can/led.h&gt;</div><div class='del'>-</div><div class='del'>-static unsigned long led_delay = 50;</div><div class='del'>-module_param(led_delay, ulong, 0644);</div><div class='del'>-MODULE_PARM_DESC(led_delay,</div><div class='del'>-		"blink delay time for activity leds (msecs, default: 50).");</div><div class='del'>-</div><div class='del'>-/* Trigger a LED event in response to a CAN device event */</div><div class='del'>-void can_led_event(struct net_device *netdev, enum can_led_event event)</div><div class='del'>-{</div><div class='del'>-	struct can_priv *priv = netdev_priv(netdev);</div><div class='del'>-</div><div class='del'>-	switch (event) {</div><div class='del'>-	case CAN_LED_EVENT_OPEN:</div><div class='del'>-		led_trigger_event(priv-&gt;tx_led_trig, LED_FULL);</div><div class='del'>-		led_trigger_event(priv-&gt;rx_led_trig, LED_FULL);</div><div class='del'>-		led_trigger_event(priv-&gt;rxtx_led_trig, LED_FULL);</div><div class='del'>-		break;</div><div class='del'>-	case CAN_LED_EVENT_STOP:</div><div class='del'>-		led_trigger_event(priv-&gt;tx_led_trig, LED_OFF);</div><div class='del'>-		led_trigger_event(priv-&gt;rx_led_trig, LED_OFF);</div><div class='del'>-		led_trigger_event(priv-&gt;rxtx_led_trig, LED_OFF);</div><div class='del'>-		break;</div><div class='del'>-	case CAN_LED_EVENT_TX:</div><div class='del'>-		if (led_delay) {</div><div class='del'>-			led_trigger_blink_oneshot(priv-&gt;tx_led_trig,</div><div class='del'>-						  &amp;led_delay, &amp;led_delay, 1);</div><div class='del'>-			led_trigger_blink_oneshot(priv-&gt;rxtx_led_trig,</div><div class='del'>-						  &amp;led_delay, &amp;led_delay, 1);</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	case CAN_LED_EVENT_RX:</div><div class='del'>-		if (led_delay) {</div><div class='del'>-			led_trigger_blink_oneshot(priv-&gt;rx_led_trig,</div><div class='del'>-						  &amp;led_delay, &amp;led_delay, 1);</div><div class='del'>-			led_trigger_blink_oneshot(priv-&gt;rxtx_led_trig,</div><div class='del'>-						  &amp;led_delay, &amp;led_delay, 1);</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(can_led_event);</div><div class='del'>-</div><div class='del'>-static void can_led_release(struct device *gendev, void *res)</div><div class='del'>-{</div><div class='del'>-	struct can_priv *priv = netdev_priv(to_net_dev(gendev));</div><div class='del'>-</div><div class='del'>-	led_trigger_unregister_simple(priv-&gt;tx_led_trig);</div><div class='del'>-	led_trigger_unregister_simple(priv-&gt;rx_led_trig);</div><div class='del'>-	led_trigger_unregister_simple(priv-&gt;rxtx_led_trig);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Register CAN LED triggers for a CAN device</div><div class='del'>- *</div><div class='del'>- * This is normally called from a driver's probe function</div><div class='del'>- */</div><div class='del'>-void devm_can_led_init(struct net_device *netdev)</div><div class='del'>-{</div><div class='del'>-	struct can_priv *priv = netdev_priv(netdev);</div><div class='del'>-	void *res;</div><div class='del'>-</div><div class='del'>-	res = devres_alloc(can_led_release, 0, GFP_KERNEL);</div><div class='del'>-	if (!res) {</div><div class='del'>-		netdev_err(netdev, "cannot register LED triggers\n");</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	snprintf(priv-&gt;tx_led_trig_name, sizeof(priv-&gt;tx_led_trig_name),</div><div class='del'>-		 "%s-tx", netdev-&gt;name);</div><div class='del'>-	snprintf(priv-&gt;rx_led_trig_name, sizeof(priv-&gt;rx_led_trig_name),</div><div class='del'>-		 "%s-rx", netdev-&gt;name);</div><div class='del'>-	snprintf(priv-&gt;rxtx_led_trig_name, sizeof(priv-&gt;rxtx_led_trig_name),</div><div class='del'>-		 "%s-rxtx", netdev-&gt;name);</div><div class='del'>-</div><div class='del'>-	led_trigger_register_simple(priv-&gt;tx_led_trig_name,</div><div class='del'>-				    &amp;priv-&gt;tx_led_trig);</div><div class='del'>-	led_trigger_register_simple(priv-&gt;rx_led_trig_name,</div><div class='del'>-				    &amp;priv-&gt;rx_led_trig);</div><div class='del'>-	led_trigger_register_simple(priv-&gt;rxtx_led_trig_name,</div><div class='del'>-				    &amp;priv-&gt;rxtx_led_trig);</div><div class='del'>-</div><div class='del'>-	devres_add(&amp;netdev-&gt;dev, res);</div><div class='del'>-}</div><div class='del'>-EXPORT_SYMBOL_GPL(devm_can_led_init);</div><div class='del'>-</div><div class='del'>-/* NETDEV rename notifier to rename the associated led triggers too */</div><div class='del'>-static int can_led_notifier(struct notifier_block *nb, unsigned long msg,</div><div class='del'>-			    void *ptr)</div><div class='del'>-{</div><div class='del'>-	struct net_device *netdev = netdev_notifier_info_to_dev(ptr);</div><div class='del'>-	struct can_priv *priv = safe_candev_priv(netdev);</div><div class='del'>-	char name[CAN_LED_NAME_SZ];</div><div class='del'>-</div><div class='del'>-	if (!priv)</div><div class='del'>-		return NOTIFY_DONE;</div><div class='del'>-</div><div class='del'>-	if (!priv-&gt;tx_led_trig || !priv-&gt;rx_led_trig || !priv-&gt;rxtx_led_trig)</div><div class='del'>-		return NOTIFY_DONE;</div><div class='del'>-</div><div class='del'>-	if (msg == NETDEV_CHANGENAME) {</div><div class='del'>-		snprintf(name, sizeof(name), "%s-tx", netdev-&gt;name);</div><div class='del'>-		led_trigger_rename_static(name, priv-&gt;tx_led_trig);</div><div class='del'>-</div><div class='del'>-		snprintf(name, sizeof(name), "%s-rx", netdev-&gt;name);</div><div class='del'>-		led_trigger_rename_static(name, priv-&gt;rx_led_trig);</div><div class='del'>-</div><div class='del'>-		snprintf(name, sizeof(name), "%s-rxtx", netdev-&gt;name);</div><div class='del'>-		led_trigger_rename_static(name, priv-&gt;rxtx_led_trig);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return NOTIFY_DONE;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* notifier block for netdevice event */</div><div class='del'>-static struct notifier_block can_netdev_notifier __read_mostly = {</div><div class='del'>-	.notifier_call = can_led_notifier,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-int __init can_led_notifier_init(void)</div><div class='del'>-{</div><div class='del'>-	return register_netdevice_notifier(&amp;can_netdev_notifier);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __exit can_led_notifier_exit(void)</div><div class='del'>-{</div><div class='del'>-	unregister_netdevice_notifier(&amp;can_netdev_notifier);</div><div class='del'>-}</div><div class='head'>diff --git a/drivers/net/can/m_can/Kconfig b/drivers/net/can/m_can/Kconfig<br/>index 04f20dd39007..fc2afab36279 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/m_can/Kconfig?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/m_can/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/m_can/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/m_can/Kconfig</a></div><div class='hunk'>@@ -1,5 +1,35 @@</div><div class='del'>-config CAN_M_CAN</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+menuconfig CAN_M_CAN</div><div class='add'>+	tristate "Bosch M_CAN support"</div><div class='add'>+	select CAN_RX_OFFLOAD</div><div class='add'>+	help</div><div class='add'>+	  Say Y here if you want support for Bosch M_CAN controller framework.</div><div class='add'>+	  This is common support for devices that embed the Bosch M_CAN IP.</div><div class='add'>+</div><div class='add'>+if CAN_M_CAN</div><div class='add'>+</div><div class='add'>+config CAN_M_CAN_PCI</div><div class='add'>+	tristate "Generic PCI Bus based M_CAN driver"</div><div class='add'>+	depends on PCI</div><div class='add'>+	help</div><div class='add'>+	  Say Y here if you want to support Bosch M_CAN controller connected</div><div class='add'>+	  to the pci bus.</div><div class='add'>+</div><div class='add'>+config CAN_M_CAN_PLATFORM</div><div class='add'>+	tristate "Bosch M_CAN support for io-mapped devices"</div><div class='ctx'> 	depends on HAS_IOMEM</div><div class='del'>-	tristate "Bosch M_CAN devices"</div><div class='del'>-	---help---</div><div class='del'>-	  Say Y here if you want to support for Bosch M_CAN controller.</div><div class='add'>+	help</div><div class='add'>+	  Say Y here if you want support for IO Mapped Bosch M_CAN controller.</div><div class='add'>+	  This support is for devices that have the Bosch M_CAN controller</div><div class='add'>+	  IP embedded into the device and the IP is IO Mapped to the processor.</div><div class='add'>+</div><div class='add'>+config CAN_M_CAN_TCAN4X5X</div><div class='add'>+	depends on SPI</div><div class='add'>+	select REGMAP_SPI</div><div class='add'>+	tristate "TCAN4X5X M_CAN device"</div><div class='add'>+	help</div><div class='add'>+	  Say Y here if you want support for Texas Instruments TCAN4x5x</div><div class='add'>+	  M_CAN controller.  This device is a peripheral device that uses the</div><div class='add'>+	  SPI bus for communication.</div><div class='add'>+</div><div class='add'>+endif</div><div class='head'>diff --git a/drivers/net/can/m_can/Makefile b/drivers/net/can/m_can/Makefile<br/>index 8bbd7f24f5be..d717bbc9e033 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/m_can/Makefile?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/m_can/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/m_can/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/m_can/Makefile</a></div><div class='hunk'>@@ -1,5 +1,13 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> #</div><div class='ctx'> #  Makefile for the Bosch M_CAN controller driver.</div><div class='ctx'> #</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_CAN_M_CAN) += m_can.o</div><div class='add'>+obj-$(CONFIG_CAN_M_CAN_PCI) += m_can_pci.o</div><div class='add'>+obj-$(CONFIG_CAN_M_CAN_PLATFORM) += m_can_platform.o</div><div class='add'>+obj-$(CONFIG_CAN_M_CAN_TCAN4X5X) += tcan4x5x.o</div><div class='add'>+</div><div class='add'>+tcan4x5x-objs :=</div><div class='add'>+tcan4x5x-objs += tcan4x5x-core.o</div><div class='add'>+tcan4x5x-objs += tcan4x5x-regmap.o</div><div class='head'>diff --git a/drivers/net/can/m_can/m_can.c b/drivers/net/can/m_can/m_can.c<br/>index ef655177bb5e..eb856547ae7d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/m_can/m_can.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/m_can/m_can.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/m_can/m_can.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/m_can/m_can.c</a></div><div class='hunk'>@@ -1,53 +1,50 @@</div><div class='del'>-/*</div><div class='del'>- * CAN bus driver for Bosch M_CAN controller</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2014 Freescale Semiconductor, Inc.</div><div class='del'>- *	Dong Aisheng &lt;b29396@freescale.com&gt;</div><div class='del'>- *</div><div class='del'>- * Bosch M_CAN user manual can be obtained from:</div><div class='del'>- * http://www.bosch-semiconductors.de/media/pdf_1/ipmodules_1/m_can/</div><div class='del'>- * mcan_users_manual_v302.pdf</div><div class='del'>- *</div><div class='del'>- * This file is licensed under the terms of the GNU General Public</div><div class='del'>- * License version 2. This program is licensed "as is" without any</div><div class='del'>- * warranty of any kind, whether express or implied.</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+// CAN bus driver for Bosch M_CAN controller</div><div class='add'>+// Copyright (C) 2014 Freescale Semiconductor, Inc.</div><div class='add'>+//      Dong Aisheng &lt;aisheng.dong@nxp.com&gt;</div><div class='add'>+// Copyright (C) 2018-19 Texas Instruments Incorporated - http://www.ti.com/</div><div class='add'>+</div><div class='add'>+/* Bosch M_CAN user manual can be obtained from:</div><div class='add'>+ * https://github.com/linux-can/can-doc/tree/master/m_can</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/clk.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/hrtimer.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/iopoll.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='del'>-#include &lt;linux/of_device.h&gt;</div><div class='add'>+#include &lt;linux/phy/phy.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/consumer.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/pm_runtime.h&gt;</div><div class='add'>+#include &lt;linux/reset.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/can/dev.h&gt;</div><div class='del'>-</div><div class='del'>-/* napi related */</div><div class='del'>-#define M_CAN_NAPI_WEIGHT	64</div><div class='del'>-</div><div class='del'>-/* message ram configuration data length */</div><div class='del'>-#define MRAM_CFG_LEN	8</div><div class='add'>+#include "m_can.h"</div><div class='ctx'> </div><div class='ctx'> /* registers definition */</div><div class='ctx'> enum m_can_reg {</div><div class='ctx'> 	M_CAN_CREL	= 0x0,</div><div class='ctx'> 	M_CAN_ENDN	= 0x4,</div><div class='ctx'> 	M_CAN_CUST	= 0x8,</div><div class='del'>-	M_CAN_FBTP	= 0xc,</div><div class='add'>+	M_CAN_DBTP	= 0xc,</div><div class='ctx'> 	M_CAN_TEST	= 0x10,</div><div class='ctx'> 	M_CAN_RWD	= 0x14,</div><div class='ctx'> 	M_CAN_CCCR	= 0x18,</div><div class='del'>-	M_CAN_BTP	= 0x1c,</div><div class='add'>+	M_CAN_NBTP	= 0x1c,</div><div class='ctx'> 	M_CAN_TSCC	= 0x20,</div><div class='ctx'> 	M_CAN_TSCV	= 0x24,</div><div class='ctx'> 	M_CAN_TOCC	= 0x28,</div><div class='ctx'> 	M_CAN_TOCV	= 0x2c,</div><div class='ctx'> 	M_CAN_ECR	= 0x40,</div><div class='ctx'> 	M_CAN_PSR	= 0x44,</div><div class='add'>+	/* TDCR Register only available for version &gt;=3.1.x */</div><div class='add'>+	M_CAN_TDCR	= 0x48,</div><div class='ctx'> 	M_CAN_IR	= 0x50,</div><div class='ctx'> 	M_CAN_IE	= 0x54,</div><div class='ctx'> 	M_CAN_ILS	= 0x58,</div><div class='hunk'>@@ -82,85 +79,95 @@ enum m_can_reg {</div><div class='ctx'> 	M_CAN_TXEFA	= 0xf8,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* m_can lec values */</div><div class='del'>-enum m_can_lec_type {</div><div class='del'>-	LEC_NO_ERROR = 0,</div><div class='del'>-	LEC_STUFF_ERROR,</div><div class='del'>-	LEC_FORM_ERROR,</div><div class='del'>-	LEC_ACK_ERROR,</div><div class='del'>-	LEC_BIT1_ERROR,</div><div class='del'>-	LEC_BIT0_ERROR,</div><div class='del'>-	LEC_CRC_ERROR,</div><div class='del'>-	LEC_UNUSED,</div><div class='del'>-};</div><div class='add'>+/* message ram configuration data length */</div><div class='add'>+#define MRAM_CFG_LEN	8</div><div class='ctx'> </div><div class='del'>-enum m_can_mram_cfg {</div><div class='del'>-	MRAM_SIDF = 0,</div><div class='del'>-	MRAM_XIDF,</div><div class='del'>-	MRAM_RXF0,</div><div class='del'>-	MRAM_RXF1,</div><div class='del'>-	MRAM_RXB,</div><div class='del'>-	MRAM_TXE,</div><div class='del'>-	MRAM_TXB,</div><div class='del'>-	MRAM_CFG_NUM,</div><div class='del'>-};</div><div class='add'>+/* Core Release Register (CREL) */</div><div class='add'>+#define CREL_REL_MASK		GENMASK(31, 28)</div><div class='add'>+#define CREL_STEP_MASK		GENMASK(27, 24)</div><div class='add'>+#define CREL_SUBSTEP_MASK	GENMASK(23, 20)</div><div class='add'>+</div><div class='add'>+/* Data Bit Timing &amp; Prescaler Register (DBTP) */</div><div class='add'>+#define DBTP_TDC		BIT(23)</div><div class='add'>+#define DBTP_DBRP_MASK		GENMASK(20, 16)</div><div class='add'>+#define DBTP_DTSEG1_MASK	GENMASK(12, 8)</div><div class='add'>+#define DBTP_DTSEG2_MASK	GENMASK(7, 4)</div><div class='add'>+#define DBTP_DSJW_MASK		GENMASK(3, 0)</div><div class='ctx'> </div><div class='del'>-/* Fast Bit Timing &amp; Prescaler Register (FBTP) */</div><div class='del'>-#define FBTR_FBRP_MASK		0x1f</div><div class='del'>-#define FBTR_FBRP_SHIFT		16</div><div class='del'>-#define FBTR_FTSEG1_SHIFT	8</div><div class='del'>-#define FBTR_FTSEG1_MASK	(0xf &lt;&lt; FBTR_FTSEG1_SHIFT)</div><div class='del'>-#define FBTR_FTSEG2_SHIFT	4</div><div class='del'>-#define FBTR_FTSEG2_MASK	(0x7 &lt;&lt; FBTR_FTSEG2_SHIFT)</div><div class='del'>-#define FBTR_FSJW_SHIFT		0</div><div class='del'>-#define FBTR_FSJW_MASK		0x3</div><div class='add'>+/* Transmitter Delay Compensation Register (TDCR) */</div><div class='add'>+#define TDCR_TDCO_MASK		GENMASK(14, 8)</div><div class='add'>+#define TDCR_TDCF_MASK		GENMASK(6, 0)</div><div class='ctx'> </div><div class='ctx'> /* Test Register (TEST) */</div><div class='del'>-#define TEST_LBCK	BIT(4)</div><div class='add'>+#define TEST_LBCK		BIT(4)</div><div class='ctx'> </div><div class='del'>-/* CC Control Register(CCCR) */</div><div class='add'>+/* CC Control Register (CCCR) */</div><div class='add'>+#define CCCR_TXP		BIT(14)</div><div class='ctx'> #define CCCR_TEST		BIT(7)</div><div class='del'>-#define CCCR_CMR_MASK		0x3</div><div class='del'>-#define CCCR_CMR_SHIFT		10</div><div class='add'>+#define CCCR_DAR		BIT(6)</div><div class='add'>+#define CCCR_MON		BIT(5)</div><div class='add'>+#define CCCR_CSR		BIT(4)</div><div class='add'>+#define CCCR_CSA		BIT(3)</div><div class='add'>+#define CCCR_ASM		BIT(2)</div><div class='add'>+#define CCCR_CCE		BIT(1)</div><div class='add'>+#define CCCR_INIT		BIT(0)</div><div class='add'>+/* for version 3.0.x */</div><div class='add'>+#define CCCR_CMR_MASK		GENMASK(11, 10)</div><div class='ctx'> #define CCCR_CMR_CANFD		0x1</div><div class='ctx'> #define CCCR_CMR_CANFD_BRS	0x2</div><div class='ctx'> #define CCCR_CMR_CAN		0x3</div><div class='del'>-#define CCCR_CME_MASK		0x3</div><div class='del'>-#define CCCR_CME_SHIFT		8</div><div class='add'>+#define CCCR_CME_MASK		GENMASK(9, 8)</div><div class='ctx'> #define CCCR_CME_CAN		0</div><div class='ctx'> #define CCCR_CME_CANFD		0x1</div><div class='ctx'> #define CCCR_CME_CANFD_BRS	0x2</div><div class='del'>-#define CCCR_TEST		BIT(7)</div><div class='del'>-#define CCCR_MON		BIT(5)</div><div class='del'>-#define CCCR_CCE		BIT(1)</div><div class='del'>-#define CCCR_INIT		BIT(0)</div><div class='del'>-#define CCCR_CANFD		0x10</div><div class='del'>-</div><div class='del'>-/* Bit Timing &amp; Prescaler Register (BTP) */</div><div class='del'>-#define BTR_BRP_MASK		0x3ff</div><div class='del'>-#define BTR_BRP_SHIFT		16</div><div class='del'>-#define BTR_TSEG1_SHIFT		8</div><div class='del'>-#define BTR_TSEG1_MASK		(0x3f &lt;&lt; BTR_TSEG1_SHIFT)</div><div class='del'>-#define BTR_TSEG2_SHIFT		4</div><div class='del'>-#define BTR_TSEG2_MASK		(0xf &lt;&lt; BTR_TSEG2_SHIFT)</div><div class='del'>-#define BTR_SJW_SHIFT		0</div><div class='del'>-#define BTR_SJW_MASK		0xf</div><div class='del'>-</div><div class='del'>-/* Error Counter Register(ECR) */</div><div class='add'>+/* for version &gt;=3.1.x */</div><div class='add'>+#define CCCR_EFBI		BIT(13)</div><div class='add'>+#define CCCR_PXHD		BIT(12)</div><div class='add'>+#define CCCR_BRSE		BIT(9)</div><div class='add'>+#define CCCR_FDOE		BIT(8)</div><div class='add'>+/* for version &gt;=3.2.x */</div><div class='add'>+#define CCCR_NISO		BIT(15)</div><div class='add'>+/* for version &gt;=3.3.x */</div><div class='add'>+#define CCCR_WMM		BIT(11)</div><div class='add'>+#define CCCR_UTSU		BIT(10)</div><div class='add'>+</div><div class='add'>+/* Nominal Bit Timing &amp; Prescaler Register (NBTP) */</div><div class='add'>+#define NBTP_NSJW_MASK		GENMASK(31, 25)</div><div class='add'>+#define NBTP_NBRP_MASK		GENMASK(24, 16)</div><div class='add'>+#define NBTP_NTSEG1_MASK	GENMASK(15, 8)</div><div class='add'>+#define NBTP_NTSEG2_MASK	GENMASK(6, 0)</div><div class='add'>+</div><div class='add'>+/* Timestamp Counter Configuration Register (TSCC) */</div><div class='add'>+#define TSCC_TCP_MASK		GENMASK(19, 16)</div><div class='add'>+#define TSCC_TSS_MASK		GENMASK(1, 0)</div><div class='add'>+#define TSCC_TSS_DISABLE	0x0</div><div class='add'>+#define TSCC_TSS_INTERNAL	0x1</div><div class='add'>+#define TSCC_TSS_EXTERNAL	0x2</div><div class='add'>+</div><div class='add'>+/* Timestamp Counter Value Register (TSCV) */</div><div class='add'>+#define TSCV_TSC_MASK		GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+/* Error Counter Register (ECR) */</div><div class='ctx'> #define ECR_RP			BIT(15)</div><div class='del'>-#define ECR_REC_SHIFT		8</div><div class='del'>-#define ECR_REC_MASK		(0x7f &lt;&lt; ECR_REC_SHIFT)</div><div class='del'>-#define ECR_TEC_SHIFT		0</div><div class='del'>-#define ECR_TEC_MASK		0xff</div><div class='add'>+#define ECR_REC_MASK		GENMASK(14, 8)</div><div class='add'>+#define ECR_TEC_MASK		GENMASK(7, 0)</div><div class='ctx'> </div><div class='del'>-/* Protocol Status Register(PSR) */</div><div class='add'>+/* Protocol Status Register (PSR) */</div><div class='ctx'> #define PSR_BO		BIT(7)</div><div class='ctx'> #define PSR_EW		BIT(6)</div><div class='ctx'> #define PSR_EP		BIT(5)</div><div class='del'>-#define PSR_LEC_MASK	0x7</div><div class='add'>+#define PSR_LEC_MASK	GENMASK(2, 0)</div><div class='add'>+#define PSR_DLEC_MASK	GENMASK(10, 8)</div><div class='ctx'> </div><div class='del'>-/* Interrupt Register(IR) */</div><div class='add'>+/* Interrupt Register (IR) */</div><div class='ctx'> #define IR_ALL_INT	0xffffffff</div><div class='add'>+</div><div class='add'>+/* Renamed bits for versions &gt; 3.1.x */</div><div class='add'>+#define IR_ARA		BIT(29)</div><div class='add'>+#define IR_PED		BIT(28)</div><div class='add'>+#define IR_PEA		BIT(27)</div><div class='add'>+</div><div class='add'>+/* Bits for version 3.0.x */</div><div class='ctx'> #define IR_STE		BIT(31)</div><div class='ctx'> #define IR_FOE		BIT(30)</div><div class='ctx'> #define IR_ACKE		BIT(29)</div><div class='hunk'>@@ -194,65 +201,86 @@ enum m_can_mram_cfg {</div><div class='ctx'> #define IR_RF0W		BIT(1)</div><div class='ctx'> #define IR_RF0N		BIT(0)</div><div class='ctx'> #define IR_ERR_STATE	(IR_BO | IR_EW | IR_EP)</div><div class='del'>-#define IR_ERR_LEC	(IR_STE	| IR_FOE | IR_ACKE | IR_BE | IR_CRCE)</div><div class='del'>-#define IR_ERR_BUS	(IR_ERR_LEC | IR_WDI | IR_ELO | IR_BEU | \</div><div class='del'>-			 IR_BEC | IR_TOO | IR_MRAF | IR_TSW | IR_TEFL | \</div><div class='del'>-			 IR_RF1L | IR_RF0L)</div><div class='del'>-#define IR_ERR_ALL	(IR_ERR_STATE | IR_ERR_BUS)</div><div class='add'>+</div><div class='add'>+/* Interrupts for version 3.0.x */</div><div class='add'>+#define IR_ERR_LEC_30X	(IR_STE	| IR_FOE | IR_ACKE | IR_BE | IR_CRCE)</div><div class='add'>+#define IR_ERR_BUS_30X	(IR_ERR_LEC_30X | IR_WDI | IR_BEU | IR_BEC | \</div><div class='add'>+			 IR_TOO | IR_MRAF | IR_TSW | IR_TEFL | IR_RF1L | \</div><div class='add'>+			 IR_RF0L)</div><div class='add'>+#define IR_ERR_ALL_30X	(IR_ERR_STATE | IR_ERR_BUS_30X)</div><div class='add'>+</div><div class='add'>+/* Interrupts for version &gt;= 3.1.x */</div><div class='add'>+#define IR_ERR_LEC_31X	(IR_PED | IR_PEA)</div><div class='add'>+#define IR_ERR_BUS_31X	(IR_ERR_LEC_31X | IR_WDI | IR_BEU | IR_BEC | \</div><div class='add'>+			 IR_TOO | IR_MRAF | IR_TSW | IR_TEFL | IR_RF1L | \</div><div class='add'>+			 IR_RF0L)</div><div class='add'>+#define IR_ERR_ALL_31X	(IR_ERR_STATE | IR_ERR_BUS_31X)</div><div class='ctx'> </div><div class='ctx'> /* Interrupt Line Select (ILS) */</div><div class='ctx'> #define ILS_ALL_INT0	0x0</div><div class='ctx'> #define ILS_ALL_INT1	0xFFFFFFFF</div><div class='ctx'> </div><div class='ctx'> /* Interrupt Line Enable (ILE) */</div><div class='del'>-#define ILE_EINT0	BIT(0)</div><div class='ctx'> #define ILE_EINT1	BIT(1)</div><div class='add'>+#define ILE_EINT0	BIT(0)</div><div class='ctx'> </div><div class='ctx'> /* Rx FIFO 0/1 Configuration (RXF0C/RXF1C) */</div><div class='del'>-#define RXFC_FWM_OFF	24</div><div class='del'>-#define RXFC_FWM_MASK	0x7f</div><div class='del'>-#define RXFC_FWM_1	(1 &lt;&lt; RXFC_FWM_OFF)</div><div class='del'>-#define RXFC_FS_OFF	16</div><div class='del'>-#define RXFC_FS_MASK	0x7f</div><div class='add'>+#define RXFC_FWM_MASK	GENMASK(30, 24)</div><div class='add'>+#define RXFC_FS_MASK	GENMASK(22, 16)</div><div class='ctx'> </div><div class='ctx'> /* Rx FIFO 0/1 Status (RXF0S/RXF1S) */</div><div class='ctx'> #define RXFS_RFL	BIT(25)</div><div class='ctx'> #define RXFS_FF		BIT(24)</div><div class='del'>-#define RXFS_FPI_OFF	16</div><div class='del'>-#define RXFS_FPI_MASK	0x3f0000</div><div class='del'>-#define RXFS_FGI_OFF	8</div><div class='del'>-#define RXFS_FGI_MASK	0x3f00</div><div class='del'>-#define RXFS_FFL_MASK	0x7f</div><div class='add'>+#define RXFS_FPI_MASK	GENMASK(21, 16)</div><div class='add'>+#define RXFS_FGI_MASK	GENMASK(13, 8)</div><div class='add'>+#define RXFS_FFL_MASK	GENMASK(6, 0)</div><div class='ctx'> </div><div class='ctx'> /* Rx Buffer / FIFO Element Size Configuration (RXESC) */</div><div class='del'>-#define M_CAN_RXESC_8BYTES	0x0</div><div class='del'>-#define M_CAN_RXESC_64BYTES	0x777</div><div class='del'>-</div><div class='del'>-/* Tx Buffer Configuration(TXBC) */</div><div class='del'>-#define TXBC_NDTB_OFF		16</div><div class='del'>-#define TXBC_NDTB_MASK		0x3f</div><div class='del'>-</div><div class='del'>-/* Tx Buffer Element Size Configuration(TXESC) */</div><div class='del'>-#define TXESC_TBDS_8BYTES	0x0</div><div class='del'>-#define TXESC_TBDS_64BYTES	0x7</div><div class='del'>-</div><div class='del'>-/* Tx Event FIFO Con.guration (TXEFC) */</div><div class='del'>-#define TXEFC_EFS_OFF		16</div><div class='del'>-#define TXEFC_EFS_MASK		0x3f</div><div class='add'>+#define RXESC_RBDS_MASK		GENMASK(10, 8)</div><div class='add'>+#define RXESC_F1DS_MASK		GENMASK(6, 4)</div><div class='add'>+#define RXESC_F0DS_MASK		GENMASK(2, 0)</div><div class='add'>+#define RXESC_64B		0x7</div><div class='add'>+</div><div class='add'>+/* Tx Buffer Configuration (TXBC) */</div><div class='add'>+#define TXBC_TFQS_MASK		GENMASK(29, 24)</div><div class='add'>+#define TXBC_NDTB_MASK		GENMASK(21, 16)</div><div class='add'>+</div><div class='add'>+/* Tx FIFO/Queue Status (TXFQS) */</div><div class='add'>+#define TXFQS_TFQF		BIT(21)</div><div class='add'>+#define TXFQS_TFQPI_MASK	GENMASK(20, 16)</div><div class='add'>+#define TXFQS_TFGI_MASK		GENMASK(12, 8)</div><div class='add'>+#define TXFQS_TFFL_MASK		GENMASK(5, 0)</div><div class='add'>+</div><div class='add'>+/* Tx Buffer Element Size Configuration (TXESC) */</div><div class='add'>+#define TXESC_TBDS_MASK		GENMASK(2, 0)</div><div class='add'>+#define TXESC_TBDS_64B		0x7</div><div class='add'>+</div><div class='add'>+/* Tx Event FIFO Configuration (TXEFC) */</div><div class='add'>+#define TXEFC_EFWM_MASK		GENMASK(29, 24)</div><div class='add'>+#define TXEFC_EFS_MASK		GENMASK(21, 16)</div><div class='add'>+</div><div class='add'>+/* Tx Event FIFO Status (TXEFS) */</div><div class='add'>+#define TXEFS_TEFL		BIT(25)</div><div class='add'>+#define TXEFS_EFF		BIT(24)</div><div class='add'>+#define TXEFS_EFGI_MASK		GENMASK(12, 8)</div><div class='add'>+#define TXEFS_EFFL_MASK		GENMASK(5, 0)</div><div class='add'>+</div><div class='add'>+/* Tx Event FIFO Acknowledge (TXEFA) */</div><div class='add'>+#define TXEFA_EFAI_MASK		GENMASK(4, 0)</div><div class='ctx'> </div><div class='ctx'> /* Message RAM Configuration (in bytes) */</div><div class='ctx'> #define SIDF_ELEMENT_SIZE	4</div><div class='ctx'> #define XIDF_ELEMENT_SIZE	8</div><div class='ctx'> #define RXF0_ELEMENT_SIZE	72</div><div class='ctx'> #define RXF1_ELEMENT_SIZE	72</div><div class='del'>-#define RXB_ELEMENT_SIZE	16</div><div class='add'>+#define RXB_ELEMENT_SIZE	72</div><div class='ctx'> #define TXE_ELEMENT_SIZE	8</div><div class='ctx'> #define TXB_ELEMENT_SIZE	72</div><div class='ctx'> </div><div class='ctx'> /* Message RAM Elements */</div><div class='ctx'> #define M_CAN_FIFO_ID		0x0</div><div class='ctx'> #define M_CAN_FIFO_DLC		0x4</div><div class='del'>-#define M_CAN_FIFO_DATA(n)	(0x8 + ((n) &lt;&lt; 2))</div><div class='add'>+#define M_CAN_FIFO_DATA		0x8</div><div class='ctx'> </div><div class='ctx'> /* Rx Buffer Element */</div><div class='ctx'> /* R0 */</div><div class='hunk'>@@ -261,196 +289,384 @@ enum m_can_mram_cfg {</div><div class='ctx'> #define RX_BUF_RTR		BIT(29)</div><div class='ctx'> /* R1 */</div><div class='ctx'> #define RX_BUF_ANMF		BIT(31)</div><div class='del'>-#define RX_BUF_EDL		BIT(21)</div><div class='add'>+#define RX_BUF_FDF		BIT(21)</div><div class='ctx'> #define RX_BUF_BRS		BIT(20)</div><div class='add'>+#define RX_BUF_RXTS_MASK	GENMASK(15, 0)</div><div class='ctx'> </div><div class='ctx'> /* Tx Buffer Element */</div><div class='del'>-/* R0 */</div><div class='add'>+/* T0 */</div><div class='add'>+#define TX_BUF_ESI		BIT(31)</div><div class='ctx'> #define TX_BUF_XTD		BIT(30)</div><div class='ctx'> #define TX_BUF_RTR		BIT(29)</div><div class='add'>+/* T1 */</div><div class='add'>+#define TX_BUF_EFC		BIT(23)</div><div class='add'>+#define TX_BUF_FDF		BIT(21)</div><div class='add'>+#define TX_BUF_BRS		BIT(20)</div><div class='add'>+#define TX_BUF_MM_MASK		GENMASK(31, 24)</div><div class='add'>+#define TX_BUF_DLC_MASK		GENMASK(19, 16)</div><div class='add'>+</div><div class='add'>+/* Tx event FIFO Element */</div><div class='add'>+/* E1 */</div><div class='add'>+#define TX_EVENT_MM_MASK	GENMASK(31, 24)</div><div class='add'>+#define TX_EVENT_TXTS_MASK	GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+/* Hrtimer polling interval */</div><div class='add'>+#define HRTIMER_POLL_INTERVAL_MS		1</div><div class='add'>+</div><div class='add'>+/* The ID and DLC registers are adjacent in M_CAN FIFO memory,</div><div class='add'>+ * and we can save a (potentially slow) bus round trip by combining</div><div class='add'>+ * reads and writes to them.</div><div class='add'>+ */</div><div class='add'>+struct id_and_dlc {</div><div class='add'>+	u32 id;</div><div class='add'>+	u32 dlc;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-/* address offset and element number for each FIFO/Buffer in the Message RAM */</div><div class='del'>-struct mram_cfg {</div><div class='del'>-	u16 off;</div><div class='del'>-	u8  num;</div><div class='add'>+struct m_can_fifo_element {</div><div class='add'>+	u32 id;</div><div class='add'>+	u32 dlc;</div><div class='add'>+	u8 data[CANFD_MAX_DLEN];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* m_can private data structure */</div><div class='del'>-struct m_can_priv {</div><div class='del'>-	struct can_priv can;	/* must be the first member */</div><div class='del'>-	struct napi_struct napi;</div><div class='del'>-	struct net_device *dev;</div><div class='del'>-	struct device *device;</div><div class='del'>-	struct clk *hclk;</div><div class='del'>-	struct clk *cclk;</div><div class='del'>-	void __iomem *base;</div><div class='del'>-	u32 irqstatus;</div><div class='add'>+static inline u32 m_can_read(struct m_can_classdev *cdev, enum m_can_reg reg)</div><div class='add'>+{</div><div class='add'>+	return cdev-&gt;ops-&gt;read_reg(cdev, reg);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	/* message ram configuration */</div><div class='del'>-	void __iomem *mram_base;</div><div class='del'>-	struct mram_cfg mcfg[MRAM_CFG_NUM];</div><div class='del'>-};</div><div class='add'>+static inline void m_can_write(struct m_can_classdev *cdev, enum m_can_reg reg,</div><div class='add'>+			       u32 val)</div><div class='add'>+{</div><div class='add'>+	cdev-&gt;ops-&gt;write_reg(cdev, reg, val);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-static inline u32 m_can_read(const struct m_can_priv *priv, enum m_can_reg reg)</div><div class='add'>+static int</div><div class='add'>+m_can_fifo_read(struct m_can_classdev *cdev,</div><div class='add'>+		u32 fgi, unsigned int offset, void *val, size_t val_count)</div><div class='ctx'> {</div><div class='del'>-	return readl(priv-&gt;base + reg);</div><div class='add'>+	u32 addr_offset = cdev-&gt;mcfg[MRAM_RXF0].off + fgi * RXF0_ELEMENT_SIZE +</div><div class='add'>+		offset;</div><div class='add'>+</div><div class='add'>+	if (val_count == 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return cdev-&gt;ops-&gt;read_fifo(cdev, addr_offset, val, val_count);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void m_can_write(const struct m_can_priv *priv,</div><div class='del'>-			       enum m_can_reg reg, u32 val)</div><div class='add'>+static int</div><div class='add'>+m_can_fifo_write(struct m_can_classdev *cdev,</div><div class='add'>+		 u32 fpi, unsigned int offset, const void *val, size_t val_count)</div><div class='ctx'> {</div><div class='del'>-	writel(val, priv-&gt;base + reg);</div><div class='add'>+	u32 addr_offset = cdev-&gt;mcfg[MRAM_TXB].off + fpi * TXB_ELEMENT_SIZE +</div><div class='add'>+		offset;</div><div class='add'>+</div><div class='add'>+	if (val_count == 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return cdev-&gt;ops-&gt;write_fifo(cdev, addr_offset, val, val_count);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline u32 m_can_fifo_read(const struct m_can_priv *priv,</div><div class='del'>-				  u32 fgi, unsigned int offset)</div><div class='add'>+static inline int m_can_fifo_write_no_off(struct m_can_classdev *cdev,</div><div class='add'>+					  u32 fpi, u32 val)</div><div class='ctx'> {</div><div class='del'>-	return readl(priv-&gt;mram_base + priv-&gt;mcfg[MRAM_RXF0].off +</div><div class='del'>-		     fgi * RXF0_ELEMENT_SIZE + offset);</div><div class='add'>+	return cdev-&gt;ops-&gt;write_fifo(cdev, fpi, &amp;val, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void m_can_fifo_write(const struct m_can_priv *priv,</div><div class='del'>-				    u32 fpi, unsigned int offset, u32 val)</div><div class='add'>+static int</div><div class='add'>+m_can_txe_fifo_read(struct m_can_classdev *cdev, u32 fgi, u32 offset, u32 *val)</div><div class='ctx'> {</div><div class='del'>-	writel(val, priv-&gt;mram_base + priv-&gt;mcfg[MRAM_TXB].off +</div><div class='del'>-	       fpi * TXB_ELEMENT_SIZE + offset);</div><div class='add'>+	u32 addr_offset = cdev-&gt;mcfg[MRAM_TXE].off + fgi * TXE_ELEMENT_SIZE +</div><div class='add'>+		offset;</div><div class='add'>+</div><div class='add'>+	return cdev-&gt;ops-&gt;read_fifo(cdev, addr_offset, val, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void m_can_config_endisable(const struct m_can_priv *priv,</div><div class='del'>-					  bool enable)</div><div class='add'>+static int m_can_cccr_update_bits(struct m_can_classdev *cdev, u32 mask, u32 val)</div><div class='ctx'> {</div><div class='del'>-	u32 cccr = m_can_read(priv, M_CAN_CCCR);</div><div class='del'>-	u32 timeout = 10;</div><div class='del'>-	u32 val = 0;</div><div class='add'>+	u32 val_before = m_can_read(cdev, M_CAN_CCCR);</div><div class='add'>+	u32 val_after = (val_before &amp; ~mask) | val;</div><div class='add'>+	size_t tries = 10;</div><div class='add'>+</div><div class='add'>+	if (!(mask &amp; CCCR_INIT) &amp;&amp; !(val_before &amp; CCCR_INIT)) {</div><div class='add'>+		netdev_err(cdev-&gt;net,</div><div class='add'>+			   "refusing to configure device when in normal mode\n");</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (enable) {</div><div class='del'>-		/* enable m_can configuration */</div><div class='del'>-		m_can_write(priv, M_CAN_CCCR, cccr | CCCR_INIT);</div><div class='del'>-		udelay(5);</div><div class='del'>-		/* CCCR.CCE can only be set/reset while CCCR.INIT = '1' */</div><div class='del'>-		m_can_write(priv, M_CAN_CCCR, cccr | CCCR_INIT | CCCR_CCE);</div><div class='del'>-	} else {</div><div class='del'>-		m_can_write(priv, M_CAN_CCCR, cccr &amp; ~(CCCR_INIT | CCCR_CCE));</div><div class='add'>+	/* The chip should be in standby mode when changing the CCCR register,</div><div class='add'>+	 * and some chips set the CSR and CSA bits when in standby. Furthermore,</div><div class='add'>+	 * the CSR and CSA bits should be written as zeros, even when they read</div><div class='add'>+	 * ones.</div><div class='add'>+	 */</div><div class='add'>+	val_after &amp;= ~(CCCR_CSR | CCCR_CSA);</div><div class='add'>+</div><div class='add'>+	while (tries--) {</div><div class='add'>+		u32 val_read;</div><div class='add'>+</div><div class='add'>+		/* Write the desired value in each try, as setting some bits in</div><div class='add'>+		 * the CCCR register require other bits to be set first. E.g.</div><div class='add'>+		 * setting the NISO bit requires setting the CCE bit first.</div><div class='add'>+		 */</div><div class='add'>+		m_can_write(cdev, M_CAN_CCCR, val_after);</div><div class='add'>+</div><div class='add'>+		val_read = m_can_read(cdev, M_CAN_CCCR) &amp; ~(CCCR_CSR | CCCR_CSA);</div><div class='add'>+</div><div class='add'>+		if (val_read == val_after)</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		usleep_range(1, 5);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* there's a delay for module initialization */</div><div class='del'>-	if (enable)</div><div class='del'>-		val = CCCR_INIT | CCCR_CCE;</div><div class='add'>+	return -ETIMEDOUT;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	while ((m_can_read(priv, M_CAN_CCCR) &amp; (CCCR_INIT | CCCR_CCE)) != val) {</div><div class='del'>-		if (timeout == 0) {</div><div class='del'>-			netdev_warn(priv-&gt;dev, "Failed to init module\n");</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-		timeout--;</div><div class='del'>-		udelay(1);</div><div class='add'>+static int m_can_config_enable(struct m_can_classdev *cdev)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* CCCR_INIT must be set in order to set CCCR_CCE, but access to</div><div class='add'>+	 * configuration registers should only be enabled when in standby mode,</div><div class='add'>+	 * where CCCR_INIT is always set.</div><div class='add'>+	 */</div><div class='add'>+	err = m_can_cccr_update_bits(cdev, CCCR_CCE, CCCR_CCE);</div><div class='add'>+	if (err)</div><div class='add'>+		netdev_err(cdev-&gt;net, "failed to enable configuration mode\n");</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int m_can_config_disable(struct m_can_classdev *cdev)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Only clear CCCR_CCE, since CCCR_INIT cannot be cleared while in</div><div class='add'>+	 * standby mode</div><div class='add'>+	 */</div><div class='add'>+	err = m_can_cccr_update_bits(cdev, CCCR_CCE, 0);</div><div class='add'>+	if (err)</div><div class='add'>+		netdev_err(cdev-&gt;net, "failed to disable configuration registers\n");</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void m_can_interrupt_enable(struct m_can_classdev *cdev, u32 interrupts)</div><div class='add'>+{</div><div class='add'>+	if (cdev-&gt;active_interrupts == interrupts)</div><div class='add'>+		return;</div><div class='add'>+	m_can_write(cdev, M_CAN_IE, interrupts);</div><div class='add'>+	cdev-&gt;active_interrupts = interrupts;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void m_can_coalescing_disable(struct m_can_classdev *cdev)</div><div class='add'>+{</div><div class='add'>+	u32 new_interrupts = cdev-&gt;active_interrupts | IR_RF0N | IR_TEFN;</div><div class='add'>+</div><div class='add'>+	if (!cdev-&gt;net-&gt;irq)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	hrtimer_cancel(&amp;cdev-&gt;hrtimer);</div><div class='add'>+	m_can_interrupt_enable(cdev, new_interrupts);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void m_can_enable_all_interrupts(struct m_can_classdev *cdev)</div><div class='add'>+{</div><div class='add'>+	if (!cdev-&gt;net-&gt;irq) {</div><div class='add'>+		netdev_dbg(cdev-&gt;net, "Start hrtimer\n");</div><div class='add'>+		hrtimer_start(&amp;cdev-&gt;hrtimer,</div><div class='add'>+			      ms_to_ktime(HRTIMER_POLL_INTERVAL_MS),</div><div class='add'>+			      HRTIMER_MODE_REL_PINNED);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	/* Only interrupt line 0 is used in this driver */</div><div class='add'>+	m_can_write(cdev, M_CAN_ILE, ILE_EINT0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void m_can_enable_all_interrupts(const struct m_can_priv *priv)</div><div class='add'>+static inline void m_can_disable_all_interrupts(struct m_can_classdev *cdev)</div><div class='ctx'> {</div><div class='del'>-	m_can_write(priv, M_CAN_ILE, ILE_EINT0 | ILE_EINT1);</div><div class='add'>+	m_can_coalescing_disable(cdev);</div><div class='add'>+	m_can_write(cdev, M_CAN_ILE, 0x0);</div><div class='add'>+</div><div class='add'>+	if (!cdev-&gt;net-&gt;irq) {</div><div class='add'>+		netdev_dbg(cdev-&gt;net, "Stop hrtimer\n");</div><div class='add'>+		hrtimer_try_to_cancel(&amp;cdev-&gt;hrtimer);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline void m_can_disable_all_interrupts(const struct m_can_priv *priv)</div><div class='add'>+/* Retrieve internal timestamp counter from TSCV.TSC, and shift it to 32-bit</div><div class='add'>+ * width.</div><div class='add'>+ */</div><div class='add'>+static u32 m_can_get_timestamp(struct m_can_classdev *cdev)</div><div class='ctx'> {</div><div class='del'>-	m_can_write(priv, M_CAN_ILE, 0x0);</div><div class='add'>+	u32 tscv;</div><div class='add'>+	u32 tsc;</div><div class='add'>+</div><div class='add'>+	tscv = m_can_read(cdev, M_CAN_TSCV);</div><div class='add'>+	tsc = FIELD_GET(TSCV_TSC_MASK, tscv);</div><div class='add'>+</div><div class='add'>+	return (tsc &lt;&lt; 16);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void m_can_clean(struct net_device *net)</div><div class='add'>+{</div><div class='add'>+	struct m_can_classdev *cdev = netdev_priv(net);</div><div class='add'>+	unsigned long irqflags;</div><div class='add'>+</div><div class='add'>+	if (cdev-&gt;tx_ops) {</div><div class='add'>+		for (int i = 0; i != cdev-&gt;tx_fifo_size; ++i) {</div><div class='add'>+			if (!cdev-&gt;tx_ops[i].skb)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			net-&gt;stats.tx_errors++;</div><div class='add'>+			cdev-&gt;tx_ops[i].skb = NULL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i != cdev-&gt;can.echo_skb_max; ++i)</div><div class='add'>+		can_free_echo_skb(cdev-&gt;net, i, NULL);</div><div class='add'>+</div><div class='add'>+	netdev_reset_queue(cdev-&gt;net);</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;cdev-&gt;tx_handling_spinlock, irqflags);</div><div class='add'>+	cdev-&gt;tx_fifo_in_flight = 0;</div><div class='add'>+	spin_unlock_irqrestore(&amp;cdev-&gt;tx_handling_spinlock, irqflags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* For peripherals, pass skb to rx-offload, which will push skb from</div><div class='add'>+ * napi. For non-peripherals, RX is done in napi already, so push</div><div class='add'>+ * directly. timestamp is used to ensure good skb ordering in</div><div class='add'>+ * rx-offload and is ignored for non-peripherals.</div><div class='add'>+ */</div><div class='add'>+static void m_can_receive_skb(struct m_can_classdev *cdev,</div><div class='add'>+			      struct sk_buff *skb,</div><div class='add'>+			      u32 timestamp)</div><div class='add'>+{</div><div class='add'>+	if (cdev-&gt;is_peripheral) {</div><div class='add'>+		struct net_device_stats *stats = &amp;cdev-&gt;net-&gt;stats;</div><div class='add'>+		int err;</div><div class='add'>+</div><div class='add'>+		err = can_rx_offload_queue_timestamp(&amp;cdev-&gt;offload, skb,</div><div class='add'>+						     timestamp);</div><div class='add'>+		if (err)</div><div class='add'>+			stats-&gt;rx_fifo_errors++;</div><div class='add'>+	} else {</div><div class='add'>+		netif_receive_skb(skb);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void m_can_read_fifo(struct net_device *dev, u32 rxfs)</div><div class='add'>+static int m_can_read_fifo(struct net_device *dev, u32 fgi)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='del'>-	struct m_can_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct m_can_classdev *cdev = netdev_priv(dev);</div><div class='ctx'> 	struct canfd_frame *cf;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='del'>-	u32 id, fgi, dlc;</div><div class='del'>-	int i;</div><div class='add'>+	struct id_and_dlc fifo_header;</div><div class='add'>+	u32 timestamp = 0;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='del'>-	/* calculate the fifo get index for where to read data */</div><div class='del'>-	fgi = (rxfs &amp; RXFS_FGI_MASK) &gt;&gt; RXFS_FGI_OFF;</div><div class='del'>-	dlc = m_can_fifo_read(priv, fgi, M_CAN_FIFO_DLC);</div><div class='del'>-	if (dlc &amp; RX_BUF_EDL)</div><div class='add'>+	err = m_can_fifo_read(cdev, fgi, M_CAN_FIFO_ID, &amp;fifo_header, 2);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_fail;</div><div class='add'>+</div><div class='add'>+	if (fifo_header.dlc &amp; RX_BUF_FDF)</div><div class='ctx'> 		skb = alloc_canfd_skb(dev, &amp;cf);</div><div class='ctx'> 	else</div><div class='ctx'> 		skb = alloc_can_skb(dev, (struct can_frame **)&amp;cf);</div><div class='ctx'> 	if (!skb) {</div><div class='ctx'> 		stats-&gt;rx_dropped++;</div><div class='del'>-		return;</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (dlc &amp; RX_BUF_EDL)</div><div class='del'>-		cf-&gt;len = can_dlc2len((dlc &gt;&gt; 16) &amp; 0x0F);</div><div class='add'>+	if (fifo_header.dlc &amp; RX_BUF_FDF)</div><div class='add'>+		cf-&gt;len = can_fd_dlc2len((fifo_header.dlc &gt;&gt; 16) &amp; 0x0F);</div><div class='ctx'> 	else</div><div class='del'>-		cf-&gt;len = get_can_dlc((dlc &gt;&gt; 16) &amp; 0x0F);</div><div class='add'>+		cf-&gt;len = can_cc_dlc2len((fifo_header.dlc &gt;&gt; 16) &amp; 0x0F);</div><div class='ctx'> </div><div class='del'>-	id = m_can_fifo_read(priv, fgi, M_CAN_FIFO_ID);</div><div class='del'>-	if (id &amp; RX_BUF_XTD)</div><div class='del'>-		cf-&gt;can_id = (id &amp; CAN_EFF_MASK) | CAN_EFF_FLAG;</div><div class='add'>+	if (fifo_header.id &amp; RX_BUF_XTD)</div><div class='add'>+		cf-&gt;can_id = (fifo_header.id &amp; CAN_EFF_MASK) | CAN_EFF_FLAG;</div><div class='ctx'> 	else</div><div class='del'>-		cf-&gt;can_id = (id &gt;&gt; 18) &amp; CAN_SFF_MASK;</div><div class='add'>+		cf-&gt;can_id = (fifo_header.id &gt;&gt; 18) &amp; CAN_SFF_MASK;</div><div class='ctx'> </div><div class='del'>-	if (id &amp; RX_BUF_ESI) {</div><div class='add'>+	if (fifo_header.id &amp; RX_BUF_ESI) {</div><div class='ctx'> 		cf-&gt;flags |= CANFD_ESI;</div><div class='ctx'> 		netdev_dbg(dev, "ESI Error\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!(dlc &amp; RX_BUF_EDL) &amp;&amp; (id &amp; RX_BUF_RTR)) {</div><div class='add'>+	if (!(fifo_header.dlc &amp; RX_BUF_FDF) &amp;&amp; (fifo_header.id &amp; RX_BUF_RTR)) {</div><div class='ctx'> 		cf-&gt;can_id |= CAN_RTR_FLAG;</div><div class='ctx'> 	} else {</div><div class='del'>-		if (dlc &amp; RX_BUF_BRS)</div><div class='add'>+		if (fifo_header.dlc &amp; RX_BUF_BRS)</div><div class='ctx'> 			cf-&gt;flags |= CANFD_BRS;</div><div class='ctx'> </div><div class='del'>-		for (i = 0; i &lt; cf-&gt;len; i += 4)</div><div class='del'>-			*(u32 *)(cf-&gt;data + i) =</div><div class='del'>-				m_can_fifo_read(priv, fgi,</div><div class='del'>-						M_CAN_FIFO_DATA(i / 4));</div><div class='add'>+		err = m_can_fifo_read(cdev, fgi, M_CAN_FIFO_DATA,</div><div class='add'>+				      cf-&gt;data, DIV_ROUND_UP(cf-&gt;len, 4));</div><div class='add'>+		if (err)</div><div class='add'>+			goto out_free_skb;</div><div class='add'>+</div><div class='add'>+		stats-&gt;rx_bytes += cf-&gt;len;</div><div class='ctx'> 	}</div><div class='add'>+	stats-&gt;rx_packets++;</div><div class='ctx'> </div><div class='del'>-	/* acknowledge rx fifo 0 */</div><div class='del'>-	m_can_write(priv, M_CAN_RXF0A, fgi);</div><div class='add'>+	timestamp = FIELD_GET(RX_BUF_RXTS_MASK, fifo_header.dlc) &lt;&lt; 16;</div><div class='ctx'> </div><div class='del'>-	stats-&gt;rx_packets++;</div><div class='del'>-	stats-&gt;rx_bytes += cf-&gt;len;</div><div class='add'>+	m_can_receive_skb(cdev, skb, timestamp);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> </div><div class='del'>-	netif_receive_skb(skb);</div><div class='add'>+out_free_skb:</div><div class='add'>+	kfree_skb(skb);</div><div class='add'>+out_fail:</div><div class='add'>+	netdev_err(dev, "FIFO read returned %d\n", err);</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int m_can_do_rx_poll(struct net_device *dev, int quota)</div><div class='ctx'> {</div><div class='del'>-	struct m_can_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct m_can_classdev *cdev = netdev_priv(dev);</div><div class='ctx'> 	u32 pkts = 0;</div><div class='ctx'> 	u32 rxfs;</div><div class='add'>+	u32 rx_count;</div><div class='add'>+	u32 fgi;</div><div class='add'>+	int ack_fgi = -1;</div><div class='add'>+	int i;</div><div class='add'>+	int err = 0;</div><div class='ctx'> </div><div class='del'>-	rxfs = m_can_read(priv, M_CAN_RXF0S);</div><div class='add'>+	rxfs = m_can_read(cdev, M_CAN_RXF0S);</div><div class='ctx'> 	if (!(rxfs &amp; RXFS_FFL_MASK)) {</div><div class='ctx'> 		netdev_dbg(dev, "no messages in fifo0\n");</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	while ((rxfs &amp; RXFS_FFL_MASK) &amp;&amp; (quota &gt; 0)) {</div><div class='del'>-		if (rxfs &amp; RXFS_RFL)</div><div class='del'>-			netdev_warn(dev, "Rx FIFO 0 Message Lost\n");</div><div class='add'>+	rx_count = FIELD_GET(RXFS_FFL_MASK, rxfs);</div><div class='add'>+	fgi = FIELD_GET(RXFS_FGI_MASK, rxfs);</div><div class='ctx'> </div><div class='del'>-		m_can_read_fifo(dev, rxfs);</div><div class='add'>+	for (i = 0; i &lt; rx_count &amp;&amp; quota &gt; 0; ++i) {</div><div class='add'>+		err = m_can_read_fifo(dev, fgi);</div><div class='add'>+		if (err)</div><div class='add'>+			break;</div><div class='ctx'> </div><div class='ctx'> 		quota--;</div><div class='ctx'> 		pkts++;</div><div class='del'>-		rxfs = m_can_read(priv, M_CAN_RXF0S);</div><div class='add'>+		ack_fgi = fgi;</div><div class='add'>+		fgi = (++fgi &gt;= cdev-&gt;mcfg[MRAM_RXF0].num ? 0 : fgi);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (pkts)</div><div class='del'>-		can_led_event(dev, CAN_LED_EVENT_RX);</div><div class='add'>+	if (ack_fgi != -1)</div><div class='add'>+		m_can_write(cdev, M_CAN_RXF0A, ack_fgi);</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='ctx'> </div><div class='ctx'> 	return pkts;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int m_can_handle_lost_msg(struct net_device *dev)</div><div class='ctx'> {</div><div class='add'>+	struct m_can_classdev *cdev = netdev_priv(dev);</div><div class='ctx'> 	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	struct can_frame *frame;</div><div class='add'>+	u32 timestamp = 0;</div><div class='ctx'> </div><div class='del'>-	netdev_err(dev, "msg lost in rxf0\n");</div><div class='add'>+	netdev_dbg(dev, "msg lost in rxf0\n");</div><div class='ctx'> </div><div class='ctx'> 	stats-&gt;rx_errors++;</div><div class='ctx'> 	stats-&gt;rx_over_errors++;</div><div class='hunk'>@@ -462,7 +678,10 @@ static int m_can_handle_lost_msg(struct net_device *dev)</div><div class='ctx'> 	frame-&gt;can_id |= CAN_ERR_CRTL;</div><div class='ctx'> 	frame-&gt;data[1] = CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='ctx'> </div><div class='del'>-	netif_receive_skb(skb);</div><div class='add'>+	if (cdev-&gt;is_peripheral)</div><div class='add'>+		timestamp = m_can_get_timestamp(cdev);</div><div class='add'>+</div><div class='add'>+	m_can_receive_skb(cdev, skb, timestamp);</div><div class='ctx'> </div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='hunk'>@@ -470,59 +689,71 @@ static int m_can_handle_lost_msg(struct net_device *dev)</div><div class='ctx'> static int m_can_handle_lec_err(struct net_device *dev,</div><div class='ctx'> 				enum m_can_lec_type lec_type)</div><div class='ctx'> {</div><div class='del'>-	struct m_can_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct m_can_classdev *cdev = netdev_priv(dev);</div><div class='ctx'> 	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='ctx'> 	struct can_frame *cf;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='add'>+	u32 timestamp = 0;</div><div class='ctx'> </div><div class='del'>-	priv-&gt;can.can_stats.bus_error++;</div><div class='del'>-	stats-&gt;rx_errors++;</div><div class='add'>+	cdev-&gt;can.can_stats.bus_error++;</div><div class='ctx'> </div><div class='ctx'> 	/* propagate the error condition to the CAN stack */</div><div class='ctx'> 	skb = alloc_can_err_skb(dev, &amp;cf);</div><div class='del'>-	if (unlikely(!skb))</div><div class='del'>-		return 0;</div><div class='ctx'> </div><div class='ctx'> 	/* check for 'last error code' which tells us the</div><div class='ctx'> 	 * type of the last error to occur on the CAN bus</div><div class='ctx'> 	 */</div><div class='del'>-	cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='del'>-	cf-&gt;data[2] |= CAN_ERR_PROT_UNSPEC;</div><div class='add'>+	if (likely(skb))</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='ctx'> </div><div class='ctx'> 	switch (lec_type) {</div><div class='ctx'> 	case LEC_STUFF_ERROR:</div><div class='ctx'> 		netdev_dbg(dev, "stuff error\n");</div><div class='del'>-		cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+		if (likely(skb))</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case LEC_FORM_ERROR:</div><div class='ctx'> 		netdev_dbg(dev, "form error\n");</div><div class='del'>-		cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+		if (likely(skb))</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case LEC_ACK_ERROR:</div><div class='ctx'> 		netdev_dbg(dev, "ack error\n");</div><div class='del'>-		cf-&gt;data[3] |= (CAN_ERR_PROT_LOC_ACK |</div><div class='del'>-				CAN_ERR_PROT_LOC_ACK_DEL);</div><div class='add'>+		stats-&gt;tx_errors++;</div><div class='add'>+		if (likely(skb))</div><div class='add'>+			cf-&gt;data[3] = CAN_ERR_PROT_LOC_ACK;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case LEC_BIT1_ERROR:</div><div class='ctx'> 		netdev_dbg(dev, "bit1 error\n");</div><div class='del'>-		cf-&gt;data[2] |= CAN_ERR_PROT_BIT1;</div><div class='add'>+		stats-&gt;tx_errors++;</div><div class='add'>+		if (likely(skb))</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_BIT1;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case LEC_BIT0_ERROR:</div><div class='ctx'> 		netdev_dbg(dev, "bit0 error\n");</div><div class='del'>-		cf-&gt;data[2] |= CAN_ERR_PROT_BIT0;</div><div class='add'>+		stats-&gt;tx_errors++;</div><div class='add'>+		if (likely(skb))</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_BIT0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case LEC_CRC_ERROR:</div><div class='ctx'> 		netdev_dbg(dev, "CRC error\n");</div><div class='del'>-		cf-&gt;data[3] |= (CAN_ERR_PROT_LOC_CRC_SEQ |</div><div class='del'>-				CAN_ERR_PROT_LOC_CRC_DEL);</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+		if (likely(skb))</div><div class='add'>+			cf-&gt;data[3] = CAN_ERR_PROT_LOC_CRC_SEQ;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	stats-&gt;rx_packets++;</div><div class='del'>-	stats-&gt;rx_bytes += cf-&gt;can_dlc;</div><div class='del'>-	netif_receive_skb(skb);</div><div class='add'>+	if (unlikely(!skb))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (cdev-&gt;is_peripheral)</div><div class='add'>+		timestamp = m_can_get_timestamp(cdev);</div><div class='add'>+</div><div class='add'>+	m_can_receive_skb(cdev, skb, timestamp);</div><div class='ctx'> </div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='hunk'>@@ -530,36 +761,47 @@ static int m_can_handle_lec_err(struct net_device *dev,</div><div class='ctx'> static int __m_can_get_berr_counter(const struct net_device *dev,</div><div class='ctx'> 				    struct can_berr_counter *bec)</div><div class='ctx'> {</div><div class='del'>-	struct m_can_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct m_can_classdev *cdev = netdev_priv(dev);</div><div class='ctx'> 	unsigned int ecr;</div><div class='ctx'> </div><div class='del'>-	ecr = m_can_read(priv, M_CAN_ECR);</div><div class='del'>-	bec-&gt;rxerr = (ecr &amp; ECR_REC_MASK) &gt;&gt; ECR_REC_SHIFT;</div><div class='del'>-	bec-&gt;txerr = ecr &amp; ECR_TEC_MASK;</div><div class='add'>+	ecr = m_can_read(cdev, M_CAN_ECR);</div><div class='add'>+	bec-&gt;rxerr = FIELD_GET(ECR_REC_MASK, ecr);</div><div class='add'>+	bec-&gt;txerr = FIELD_GET(ECR_TEC_MASK, ecr);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int m_can_clk_start(struct m_can_classdev *cdev)</div><div class='add'>+{</div><div class='add'>+	if (cdev-&gt;pm_clock_support == 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return pm_runtime_resume_and_get(cdev-&gt;dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void m_can_clk_stop(struct m_can_classdev *cdev)</div><div class='add'>+{</div><div class='add'>+	if (cdev-&gt;pm_clock_support)</div><div class='add'>+		pm_runtime_put_sync(cdev-&gt;dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int m_can_get_berr_counter(const struct net_device *dev,</div><div class='ctx'> 				  struct can_berr_counter *bec)</div><div class='ctx'> {</div><div class='del'>-	struct m_can_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct m_can_classdev *cdev = netdev_priv(dev);</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = clk_prepare_enable(priv-&gt;hclk);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='add'>+	/* Avoid waking up the controller if the interface is down */</div><div class='add'>+	if (!(dev-&gt;flags &amp; IFF_UP))</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-	err = clk_prepare_enable(priv-&gt;cclk);</div><div class='del'>-	if (err) {</div><div class='del'>-		clk_disable_unprepare(priv-&gt;hclk);</div><div class='add'>+	err = m_can_clk_start(cdev);</div><div class='add'>+	if (err)</div><div class='ctx'> 		return err;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	__m_can_get_berr_counter(dev, bec);</div><div class='ctx'> </div><div class='del'>-	clk_disable_unprepare(priv-&gt;cclk);</div><div class='del'>-	clk_disable_unprepare(priv-&gt;hclk);</div><div class='add'>+	m_can_clk_stop(cdev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -567,29 +809,32 @@ static int m_can_get_berr_counter(const struct net_device *dev,</div><div class='ctx'> static int m_can_handle_state_change(struct net_device *dev,</div><div class='ctx'> 				     enum can_state new_state)</div><div class='ctx'> {</div><div class='del'>-	struct m_can_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='add'>+	struct m_can_classdev *cdev = netdev_priv(dev);</div><div class='ctx'> 	struct can_frame *cf;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	struct can_berr_counter bec;</div><div class='ctx'> 	unsigned int ecr;</div><div class='add'>+	u32 timestamp = 0;</div><div class='ctx'> </div><div class='ctx'> 	switch (new_state) {</div><div class='ctx'> 	case CAN_STATE_ERROR_ACTIVE:</div><div class='add'>+		cdev-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+		break;</div><div class='add'>+	case CAN_STATE_ERROR_WARNING:</div><div class='ctx'> 		/* error warning state */</div><div class='del'>-		priv-&gt;can.can_stats.error_warning++;</div><div class='del'>-		priv-&gt;can.state = CAN_STATE_ERROR_WARNING;</div><div class='add'>+		cdev-&gt;can.can_stats.error_warning++;</div><div class='add'>+		cdev-&gt;can.state = CAN_STATE_ERROR_WARNING;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case CAN_STATE_ERROR_PASSIVE:</div><div class='ctx'> 		/* error passive state */</div><div class='del'>-		priv-&gt;can.can_stats.error_passive++;</div><div class='del'>-		priv-&gt;can.state = CAN_STATE_ERROR_PASSIVE;</div><div class='add'>+		cdev-&gt;can.can_stats.error_passive++;</div><div class='add'>+		cdev-&gt;can.state = CAN_STATE_ERROR_PASSIVE;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case CAN_STATE_BUS_OFF:</div><div class='ctx'> 		/* bus-off state */</div><div class='del'>-		priv-&gt;can.state = CAN_STATE_BUS_OFF;</div><div class='del'>-		m_can_disable_all_interrupts(priv);</div><div class='del'>-		priv-&gt;can.can_stats.bus_off++;</div><div class='add'>+		cdev-&gt;can.state = CAN_STATE_BUS_OFF;</div><div class='add'>+		m_can_disable_all_interrupts(cdev);</div><div class='add'>+		cdev-&gt;can.can_stats.bus_off++;</div><div class='ctx'> 		can_bus_off(dev);</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='hunk'>@@ -605,8 +850,14 @@ static int m_can_handle_state_change(struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	switch (new_state) {</div><div class='ctx'> 	case CAN_STATE_ERROR_ACTIVE:</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_CRTL | CAN_ERR_CNT;</div><div class='add'>+		cf-&gt;data[1] = CAN_ERR_CRTL_ACTIVE;</div><div class='add'>+		cf-&gt;data[6] = bec.txerr;</div><div class='add'>+		cf-&gt;data[7] = bec.rxerr;</div><div class='add'>+		break;</div><div class='add'>+	case CAN_STATE_ERROR_WARNING:</div><div class='ctx'> 		/* error warning state */</div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_CRTL | CAN_ERR_CNT;</div><div class='ctx'> 		cf-&gt;data[1] = (bec.txerr &gt; bec.rxerr) ?</div><div class='ctx'> 			CAN_ERR_CRTL_TX_WARNING :</div><div class='ctx'> 			CAN_ERR_CRTL_RX_WARNING;</div><div class='hunk'>@@ -615,8 +866,8 @@ static int m_can_handle_state_change(struct net_device *dev,</div><div class='ctx'> 		break;</div><div class='ctx'> 	case CAN_STATE_ERROR_PASSIVE:</div><div class='ctx'> 		/* error passive state */</div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='del'>-		ecr = m_can_read(priv, M_CAN_ECR);</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_CRTL | CAN_ERR_CNT;</div><div class='add'>+		ecr = m_can_read(cdev, M_CAN_ECR);</div><div class='ctx'> 		if (ecr &amp; ECR_RP)</div><div class='ctx'> 			cf-&gt;data[1] |= CAN_ERR_CRTL_RX_PASSIVE;</div><div class='ctx'> 		if (bec.txerr &gt; 127)</div><div class='hunk'>@@ -632,48 +883,47 @@ static int m_can_handle_state_change(struct net_device *dev,</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	stats-&gt;rx_packets++;</div><div class='del'>-	stats-&gt;rx_bytes += cf-&gt;can_dlc;</div><div class='del'>-	netif_receive_skb(skb);</div><div class='add'>+	if (cdev-&gt;is_peripheral)</div><div class='add'>+		timestamp = m_can_get_timestamp(cdev);</div><div class='add'>+</div><div class='add'>+	m_can_receive_skb(cdev, skb, timestamp);</div><div class='ctx'> </div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int m_can_handle_state_errors(struct net_device *dev, u32 psr)</div><div class='add'>+static enum can_state</div><div class='add'>+m_can_state_get_by_psr(struct m_can_classdev *cdev)</div><div class='ctx'> {</div><div class='del'>-	struct m_can_priv *priv = netdev_priv(dev);</div><div class='del'>-	int work_done = 0;</div><div class='add'>+	u32 reg_psr;</div><div class='ctx'> </div><div class='del'>-	if ((psr &amp; PSR_EW) &amp;&amp;</div><div class='del'>-	    (priv-&gt;can.state != CAN_STATE_ERROR_WARNING)) {</div><div class='del'>-		netdev_dbg(dev, "entered error warning state\n");</div><div class='del'>-		work_done += m_can_handle_state_change(dev,</div><div class='del'>-						       CAN_STATE_ERROR_WARNING);</div><div class='del'>-	}</div><div class='add'>+	reg_psr = m_can_read(cdev, M_CAN_PSR);</div><div class='ctx'> </div><div class='del'>-	if ((psr &amp; PSR_EP) &amp;&amp;</div><div class='del'>-	    (priv-&gt;can.state != CAN_STATE_ERROR_PASSIVE)) {</div><div class='del'>-		netdev_dbg(dev, "entered error passive state\n");</div><div class='del'>-		work_done += m_can_handle_state_change(dev,</div><div class='del'>-						       CAN_STATE_ERROR_PASSIVE);</div><div class='del'>-	}</div><div class='add'>+	if (reg_psr &amp; PSR_BO)</div><div class='add'>+		return CAN_STATE_BUS_OFF;</div><div class='add'>+	if (reg_psr &amp; PSR_EP)</div><div class='add'>+		return CAN_STATE_ERROR_PASSIVE;</div><div class='add'>+	if (reg_psr &amp; PSR_EW)</div><div class='add'>+		return CAN_STATE_ERROR_WARNING;</div><div class='ctx'> </div><div class='del'>-	if ((psr &amp; PSR_BO) &amp;&amp;</div><div class='del'>-	    (priv-&gt;can.state != CAN_STATE_BUS_OFF)) {</div><div class='del'>-		netdev_dbg(dev, "entered error bus off state\n");</div><div class='del'>-		work_done += m_can_handle_state_change(dev,</div><div class='del'>-						       CAN_STATE_BUS_OFF);</div><div class='del'>-	}</div><div class='add'>+	return CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	return work_done;</div><div class='add'>+static int m_can_handle_state_errors(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct m_can_classdev *cdev = netdev_priv(dev);</div><div class='add'>+	enum can_state new_state;</div><div class='add'>+</div><div class='add'>+	new_state = m_can_state_get_by_psr(cdev);</div><div class='add'>+	if (new_state == cdev-&gt;can.state)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return m_can_handle_state_change(dev, new_state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void m_can_handle_other_err(struct net_device *dev, u32 irqstatus)</div><div class='ctx'> {</div><div class='ctx'> 	if (irqstatus &amp; IR_WDI)</div><div class='ctx'> 		netdev_err(dev, "Message RAM Watchdog event due to missing READY\n");</div><div class='del'>-	if (irqstatus &amp; IR_ELO)</div><div class='del'>-		netdev_err(dev, "Error Logging Overflow\n");</div><div class='ctx'> 	if (irqstatus &amp; IR_BEU)</div><div class='ctx'> 		netdev_err(dev, "Bit Error Uncorrected\n");</div><div class='ctx'> 	if (irqstatus &amp; IR_BEC)</div><div class='hunk'>@@ -684,26 +934,82 @@ static void m_can_handle_other_err(struct net_device *dev, u32 irqstatus)</div><div class='ctx'> 		netdev_err(dev, "Message RAM access failure occurred\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline bool is_lec_err(u32 psr)</div><div class='add'>+static inline bool is_lec_err(u8 lec)</div><div class='ctx'> {</div><div class='del'>-	psr &amp;= LEC_UNUSED;</div><div class='add'>+	return lec != LEC_NO_ERROR &amp;&amp; lec != LEC_NO_CHANGE;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	return psr &amp;&amp; (psr != LEC_UNUSED);</div><div class='add'>+static inline bool m_can_is_protocol_err(u32 irqstatus)</div><div class='add'>+{</div><div class='add'>+	return irqstatus &amp; IR_ERR_LEC_31X;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int m_can_handle_protocol_error(struct net_device *dev, u32 irqstatus)</div><div class='add'>+{</div><div class='add'>+	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='add'>+	struct m_can_classdev *cdev = netdev_priv(dev);</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	u32 timestamp = 0;</div><div class='add'>+</div><div class='add'>+	/* propagate the error condition to the CAN stack */</div><div class='add'>+	skb = alloc_can_err_skb(dev, &amp;cf);</div><div class='add'>+</div><div class='add'>+	/* update tx error stats since there is protocol error */</div><div class='add'>+	stats-&gt;tx_errors++;</div><div class='add'>+</div><div class='add'>+	/* update arbitration lost status */</div><div class='add'>+	if (cdev-&gt;version &gt;= 31 &amp;&amp; (irqstatus &amp; IR_PEA)) {</div><div class='add'>+		netdev_dbg(dev, "Protocol error in Arbitration fail\n");</div><div class='add'>+		cdev-&gt;can.can_stats.arbitration_lost++;</div><div class='add'>+		if (skb) {</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_LOSTARB;</div><div class='add'>+			cf-&gt;data[0] |= CAN_ERR_LOSTARB_UNSPEC;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (unlikely(!skb)) {</div><div class='add'>+		netdev_dbg(dev, "allocation of skb failed\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cdev-&gt;is_peripheral)</div><div class='add'>+		timestamp = m_can_get_timestamp(cdev);</div><div class='add'>+</div><div class='add'>+	m_can_receive_skb(cdev, skb, timestamp);</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int m_can_handle_bus_errors(struct net_device *dev, u32 irqstatus,</div><div class='ctx'> 				   u32 psr)</div><div class='ctx'> {</div><div class='del'>-	struct m_can_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct m_can_classdev *cdev = netdev_priv(dev);</div><div class='ctx'> 	int work_done = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (irqstatus &amp; IR_RF0L)</div><div class='ctx'> 		work_done += m_can_handle_lost_msg(dev);</div><div class='ctx'> </div><div class='ctx'> 	/* handle lec errors on the bus */</div><div class='del'>-	if ((priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING) &amp;&amp;</div><div class='del'>-	    is_lec_err(psr))</div><div class='del'>-		work_done += m_can_handle_lec_err(dev, psr &amp; LEC_UNUSED);</div><div class='add'>+	if (cdev-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING) {</div><div class='add'>+		u8 lec = FIELD_GET(PSR_LEC_MASK, psr);</div><div class='add'>+		u8 dlec = FIELD_GET(PSR_DLEC_MASK, psr);</div><div class='add'>+</div><div class='add'>+		if (is_lec_err(lec)) {</div><div class='add'>+			netdev_dbg(dev, "Arbitration phase error detected\n");</div><div class='add'>+			work_done += m_can_handle_lec_err(dev, lec);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (is_lec_err(dlec)) {</div><div class='add'>+			netdev_dbg(dev, "Data phase error detected\n");</div><div class='add'>+			work_done += m_can_handle_lec_err(dev, dlec);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* handle protocol errors in arbitration phase */</div><div class='add'>+	if ((cdev-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING) &amp;&amp;</div><div class='add'>+	    m_can_is_protocol_err(irqstatus))</div><div class='add'>+		work_done += m_can_handle_protocol_error(dev, irqstatus);</div><div class='ctx'> </div><div class='ctx'> 	/* other unproccessed error interrupts */</div><div class='ctx'> 	m_can_handle_other_err(dev, irqstatus);</div><div class='hunk'>@@ -711,74 +1017,326 @@ static int m_can_handle_bus_errors(struct net_device *dev, u32 irqstatus,</div><div class='ctx'> 	return work_done;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int m_can_poll(struct napi_struct *napi, int quota)</div><div class='add'>+static int m_can_rx_handler(struct net_device *dev, int quota, u32 irqstatus)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *dev = napi-&gt;dev;</div><div class='del'>-	struct m_can_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct m_can_classdev *cdev = netdev_priv(dev);</div><div class='add'>+	int rx_work_or_err;</div><div class='ctx'> 	int work_done = 0;</div><div class='del'>-	u32 irqstatus, psr;</div><div class='ctx'> </div><div class='del'>-	irqstatus = priv-&gt;irqstatus | m_can_read(priv, M_CAN_IR);</div><div class='ctx'> 	if (!irqstatus)</div><div class='ctx'> 		goto end;</div><div class='ctx'> </div><div class='del'>-	psr = m_can_read(priv, M_CAN_PSR);</div><div class='add'>+	/* Errata workaround for issue "Needless activation of MRAF irq"</div><div class='add'>+	 * During frame reception while the MCAN is in Error Passive state</div><div class='add'>+	 * and the Receive Error Counter has the value MCAN_ECR.REC = 127,</div><div class='add'>+	 * it may happen that MCAN_IR.MRAF is set although there was no</div><div class='add'>+	 * Message RAM access failure.</div><div class='add'>+	 * If MCAN_IR.MRAF is enabled, an interrupt to the Host CPU is generated</div><div class='add'>+	 * The Message RAM Access Failure interrupt routine needs to check</div><div class='add'>+	 * whether MCAN_ECR.RP = ’1’ and MCAN_ECR.REC = 127.</div><div class='add'>+	 * In this case, reset MCAN_IR.MRAF. No further action is required.</div><div class='add'>+	 */</div><div class='add'>+	if (cdev-&gt;version &lt;= 31 &amp;&amp; irqstatus &amp; IR_MRAF &amp;&amp;</div><div class='add'>+	    m_can_read(cdev, M_CAN_ECR) &amp; ECR_RP) {</div><div class='add'>+		struct can_berr_counter bec;</div><div class='add'>+</div><div class='add'>+		__m_can_get_berr_counter(dev, &amp;bec);</div><div class='add'>+		if (bec.rxerr == 127) {</div><div class='add'>+			m_can_write(cdev, M_CAN_IR, IR_MRAF);</div><div class='add'>+			irqstatus &amp;= ~IR_MRAF;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (irqstatus &amp; IR_ERR_STATE)</div><div class='del'>-		work_done += m_can_handle_state_errors(dev, psr);</div><div class='add'>+		work_done += m_can_handle_state_errors(dev);</div><div class='ctx'> </div><div class='del'>-	if (irqstatus &amp; IR_ERR_BUS)</div><div class='del'>-		work_done += m_can_handle_bus_errors(dev, irqstatus, psr);</div><div class='add'>+	if (irqstatus &amp; IR_ERR_BUS_30X)</div><div class='add'>+		work_done += m_can_handle_bus_errors(dev, irqstatus,</div><div class='add'>+						     m_can_read(cdev, M_CAN_PSR));</div><div class='ctx'> </div><div class='del'>-	if (irqstatus &amp; IR_RF0N)</div><div class='del'>-		work_done += m_can_do_rx_poll(dev, (quota - work_done));</div><div class='add'>+	if (irqstatus &amp; IR_RF0N) {</div><div class='add'>+		rx_work_or_err = m_can_do_rx_poll(dev, (quota - work_done));</div><div class='add'>+		if (rx_work_or_err &lt; 0)</div><div class='add'>+			return rx_work_or_err;</div><div class='ctx'> </div><div class='del'>-	if (work_done &lt; quota) {</div><div class='del'>-		napi_complete(napi);</div><div class='del'>-		m_can_enable_all_interrupts(priv);</div><div class='add'>+		work_done += rx_work_or_err;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='ctx'> end:</div><div class='ctx'> 	return work_done;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static irqreturn_t m_can_isr(int irq, void *dev_id)</div><div class='add'>+static int m_can_poll(struct napi_struct *napi, int quota)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *dev = (struct net_device *)dev_id;</div><div class='del'>-	struct m_can_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct net_device *dev = napi-&gt;dev;</div><div class='add'>+	struct m_can_classdev *cdev = netdev_priv(dev);</div><div class='add'>+	int work_done;</div><div class='add'>+	u32 irqstatus;</div><div class='add'>+</div><div class='add'>+	irqstatus = cdev-&gt;irqstatus | m_can_read(cdev, M_CAN_IR);</div><div class='add'>+</div><div class='add'>+	work_done = m_can_rx_handler(dev, quota, irqstatus);</div><div class='add'>+</div><div class='add'>+	/* Don't re-enable interrupts if the driver had a fatal error</div><div class='add'>+	 * (e.g., FIFO read failure).</div><div class='add'>+	 */</div><div class='add'>+	if (work_done &gt;= 0 &amp;&amp; work_done &lt; quota) {</div><div class='add'>+		napi_complete_done(napi, work_done);</div><div class='add'>+		m_can_enable_all_interrupts(cdev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return work_done;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Echo tx skb and update net stats. Peripherals use rx-offload for</div><div class='add'>+ * echo. timestamp is used for peripherals to ensure correct ordering</div><div class='add'>+ * by rx-offload, and is ignored for non-peripherals.</div><div class='add'>+ */</div><div class='add'>+static unsigned int m_can_tx_update_stats(struct m_can_classdev *cdev,</div><div class='add'>+					  unsigned int msg_mark, u32 timestamp)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = cdev-&gt;net;</div><div class='ctx'> 	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='del'>-	u32 ir;</div><div class='add'>+	unsigned int frame_len;</div><div class='add'>+</div><div class='add'>+	if (cdev-&gt;is_peripheral)</div><div class='add'>+		stats-&gt;tx_bytes +=</div><div class='add'>+			can_rx_offload_get_echo_skb_queue_timestamp(&amp;cdev-&gt;offload,</div><div class='add'>+								    msg_mark,</div><div class='add'>+								    timestamp,</div><div class='add'>+								    &amp;frame_len);</div><div class='add'>+	else</div><div class='add'>+		stats-&gt;tx_bytes += can_get_echo_skb(dev, msg_mark, &amp;frame_len);</div><div class='add'>+</div><div class='add'>+	stats-&gt;tx_packets++;</div><div class='add'>+</div><div class='add'>+	return frame_len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void m_can_finish_tx(struct m_can_classdev *cdev, int transmitted,</div><div class='add'>+			    unsigned int transmitted_frame_len)</div><div class='add'>+{</div><div class='add'>+	unsigned long irqflags;</div><div class='add'>+</div><div class='add'>+	netdev_completed_queue(cdev-&gt;net, transmitted, transmitted_frame_len);</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;cdev-&gt;tx_handling_spinlock, irqflags);</div><div class='add'>+	if (cdev-&gt;tx_fifo_in_flight &gt;= cdev-&gt;tx_fifo_size &amp;&amp; transmitted &gt; 0)</div><div class='add'>+		netif_wake_queue(cdev-&gt;net);</div><div class='add'>+	cdev-&gt;tx_fifo_in_flight -= transmitted;</div><div class='add'>+	spin_unlock_irqrestore(&amp;cdev-&gt;tx_handling_spinlock, irqflags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static netdev_tx_t m_can_start_tx(struct m_can_classdev *cdev)</div><div class='add'>+{</div><div class='add'>+	unsigned long irqflags;</div><div class='add'>+	int tx_fifo_in_flight;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;cdev-&gt;tx_handling_spinlock, irqflags);</div><div class='add'>+	tx_fifo_in_flight = cdev-&gt;tx_fifo_in_flight + 1;</div><div class='add'>+	if (tx_fifo_in_flight &gt;= cdev-&gt;tx_fifo_size) {</div><div class='add'>+		netif_stop_queue(cdev-&gt;net);</div><div class='add'>+		if (tx_fifo_in_flight &gt; cdev-&gt;tx_fifo_size) {</div><div class='add'>+			netdev_err_once(cdev-&gt;net, "hard_xmit called while TX FIFO full\n");</div><div class='add'>+			spin_unlock_irqrestore(&amp;cdev-&gt;tx_handling_spinlock, irqflags);</div><div class='add'>+			return NETDEV_TX_BUSY;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	cdev-&gt;tx_fifo_in_flight = tx_fifo_in_flight;</div><div class='add'>+	spin_unlock_irqrestore(&amp;cdev-&gt;tx_handling_spinlock, irqflags);</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int m_can_echo_tx_event(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	u32 txe_count = 0;</div><div class='add'>+	u32 m_can_txefs;</div><div class='add'>+	u32 fgi = 0;</div><div class='add'>+	int ack_fgi = -1;</div><div class='add'>+	int i = 0;</div><div class='add'>+	int err = 0;</div><div class='add'>+	unsigned int msg_mark;</div><div class='add'>+	int processed = 0;</div><div class='add'>+	unsigned int processed_frame_len = 0;</div><div class='add'>+</div><div class='add'>+	struct m_can_classdev *cdev = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	/* read tx event fifo status */</div><div class='add'>+	m_can_txefs = m_can_read(cdev, M_CAN_TXEFS);</div><div class='add'>+</div><div class='add'>+	/* Get Tx Event fifo element count */</div><div class='add'>+	txe_count = FIELD_GET(TXEFS_EFFL_MASK, m_can_txefs);</div><div class='add'>+	fgi = FIELD_GET(TXEFS_EFGI_MASK, m_can_txefs);</div><div class='add'>+</div><div class='add'>+	/* Get and process all sent elements */</div><div class='add'>+	for (i = 0; i &lt; txe_count; i++) {</div><div class='add'>+		u32 txe, timestamp = 0;</div><div class='add'>+</div><div class='add'>+		/* get message marker, timestamp */</div><div class='add'>+		err = m_can_txe_fifo_read(cdev, fgi, 4, &amp;txe);</div><div class='add'>+		if (err) {</div><div class='add'>+			netdev_err(dev, "TXE FIFO read returned %d\n", err);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		msg_mark = FIELD_GET(TX_EVENT_MM_MASK, txe);</div><div class='add'>+		timestamp = FIELD_GET(TX_EVENT_TXTS_MASK, txe) &lt;&lt; 16;</div><div class='add'>+</div><div class='add'>+		ack_fgi = fgi;</div><div class='add'>+		fgi = (++fgi &gt;= cdev-&gt;mcfg[MRAM_TXE].num ? 0 : fgi);</div><div class='add'>+</div><div class='add'>+		/* update stats */</div><div class='add'>+		processed_frame_len += m_can_tx_update_stats(cdev, msg_mark,</div><div class='add'>+							     timestamp);</div><div class='add'>+</div><div class='add'>+		++processed;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ack_fgi != -1)</div><div class='add'>+		m_can_write(cdev, M_CAN_TXEFA, FIELD_PREP(TXEFA_EFAI_MASK,</div><div class='add'>+							  ack_fgi));</div><div class='add'>+</div><div class='add'>+	m_can_finish_tx(cdev, processed, processed_frame_len);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void m_can_coalescing_update(struct m_can_classdev *cdev, u32 ir)</div><div class='add'>+{</div><div class='add'>+	u32 new_interrupts = cdev-&gt;active_interrupts;</div><div class='add'>+	bool enable_rx_timer = false;</div><div class='add'>+	bool enable_tx_timer = false;</div><div class='add'>+</div><div class='add'>+	if (!cdev-&gt;net-&gt;irq)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (cdev-&gt;rx_coalesce_usecs_irq &gt; 0 &amp;&amp; (ir &amp; (IR_RF0N | IR_RF0W))) {</div><div class='add'>+		enable_rx_timer = true;</div><div class='add'>+		new_interrupts &amp;= ~IR_RF0N;</div><div class='add'>+	}</div><div class='add'>+	if (cdev-&gt;tx_coalesce_usecs_irq &gt; 0 &amp;&amp; (ir &amp; (IR_TEFN | IR_TEFW))) {</div><div class='add'>+		enable_tx_timer = true;</div><div class='add'>+		new_interrupts &amp;= ~IR_TEFN;</div><div class='add'>+	}</div><div class='add'>+	if (!enable_rx_timer &amp;&amp; !hrtimer_active(&amp;cdev-&gt;hrtimer))</div><div class='add'>+		new_interrupts |= IR_RF0N;</div><div class='add'>+	if (!enable_tx_timer &amp;&amp; !hrtimer_active(&amp;cdev-&gt;hrtimer))</div><div class='add'>+		new_interrupts |= IR_TEFN;</div><div class='add'>+</div><div class='add'>+	m_can_interrupt_enable(cdev, new_interrupts);</div><div class='add'>+	if (enable_rx_timer | enable_tx_timer)</div><div class='add'>+		hrtimer_start(&amp;cdev-&gt;hrtimer, cdev-&gt;irq_timer_wait,</div><div class='add'>+			      HRTIMER_MODE_REL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This interrupt handler is called either from the interrupt thread or a</div><div class='add'>+ * hrtimer. This has implications like cancelling a timer won't be possible</div><div class='add'>+ * blocking.</div><div class='add'>+ */</div><div class='add'>+static int m_can_interrupt_handler(struct m_can_classdev *cdev)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = cdev-&gt;net;</div><div class='add'>+	u32 ir = 0, ir_read;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (pm_runtime_suspended(cdev-&gt;dev))</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+</div><div class='add'>+	/* The m_can controller signals its interrupt status as a level, but</div><div class='add'>+	 * depending in the integration the CPU may interpret the signal as</div><div class='add'>+	 * edge-triggered (for example with m_can_pci). For these</div><div class='add'>+	 * edge-triggered integrations, we must observe that IR is 0 at least</div><div class='add'>+	 * once to be sure that the next interrupt will generate an edge.</div><div class='add'>+	 */</div><div class='add'>+	while ((ir_read = m_can_read(cdev, M_CAN_IR)) != 0) {</div><div class='add'>+		ir |= ir_read;</div><div class='add'>+</div><div class='add'>+		/* ACK all irqs */</div><div class='add'>+		m_can_write(cdev, M_CAN_IR, ir);</div><div class='add'>+</div><div class='add'>+		if (!cdev-&gt;irq_edge_triggered)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	ir = m_can_read(priv, M_CAN_IR);</div><div class='add'>+	m_can_coalescing_update(cdev, ir);</div><div class='ctx'> 	if (!ir)</div><div class='ctx'> 		return IRQ_NONE;</div><div class='ctx'> </div><div class='del'>-	/* ACK all irqs */</div><div class='del'>-	if (ir &amp; IR_ALL_INT)</div><div class='del'>-		m_can_write(priv, M_CAN_IR, ir);</div><div class='add'>+	if (cdev-&gt;ops-&gt;clear_interrupts)</div><div class='add'>+		cdev-&gt;ops-&gt;clear_interrupts(cdev);</div><div class='ctx'> </div><div class='ctx'> 	/* schedule NAPI in case of</div><div class='ctx'> 	 * - rx IRQ</div><div class='ctx'> 	 * - state change IRQ</div><div class='ctx'> 	 * - bus error IRQ and bus error reporting</div><div class='ctx'> 	 */</div><div class='del'>-	if ((ir &amp; IR_RF0N) || (ir &amp; IR_ERR_ALL)) {</div><div class='del'>-		priv-&gt;irqstatus = ir;</div><div class='del'>-		m_can_disable_all_interrupts(priv);</div><div class='del'>-		napi_schedule(&amp;priv-&gt;napi);</div><div class='add'>+	if (ir &amp; (IR_RF0N | IR_RF0W | IR_ERR_ALL_30X)) {</div><div class='add'>+		cdev-&gt;irqstatus = ir;</div><div class='add'>+		if (!cdev-&gt;is_peripheral) {</div><div class='add'>+			m_can_disable_all_interrupts(cdev);</div><div class='add'>+			napi_schedule(&amp;cdev-&gt;napi);</div><div class='add'>+		} else {</div><div class='add'>+			ret = m_can_rx_handler(dev, NAPI_POLL_WEIGHT, ir);</div><div class='add'>+			if (ret &lt; 0)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* transmission complete interrupt */</div><div class='del'>-	if (ir &amp; IR_TC) {</div><div class='del'>-		stats-&gt;tx_bytes += can_get_echo_skb(dev, 0);</div><div class='del'>-		stats-&gt;tx_packets++;</div><div class='del'>-		can_led_event(dev, CAN_LED_EVENT_TX);</div><div class='del'>-		netif_wake_queue(dev);</div><div class='add'>+	if (cdev-&gt;version == 30) {</div><div class='add'>+		if (ir &amp; IR_TC) {</div><div class='add'>+			/* Transmission Complete Interrupt*/</div><div class='add'>+			u32 timestamp = 0;</div><div class='add'>+			unsigned int frame_len;</div><div class='add'>+</div><div class='add'>+			if (cdev-&gt;is_peripheral)</div><div class='add'>+				timestamp = m_can_get_timestamp(cdev);</div><div class='add'>+			frame_len = m_can_tx_update_stats(cdev, 0, timestamp);</div><div class='add'>+			m_can_finish_tx(cdev, 1, frame_len);</div><div class='add'>+		}</div><div class='add'>+	} else  {</div><div class='add'>+		if (ir &amp; (IR_TEFN | IR_TEFW)) {</div><div class='add'>+			/* New TX FIFO Element arrived */</div><div class='add'>+			ret = m_can_echo_tx_event(dev);</div><div class='add'>+			if (ret != 0)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (cdev-&gt;is_peripheral)</div><div class='add'>+		can_rx_offload_threaded_irq_finish(&amp;cdev-&gt;offload);</div><div class='add'>+</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const struct can_bittiming_const m_can_bittiming_const = {</div><div class='add'>+static irqreturn_t m_can_isr(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = (struct net_device *)dev_id;</div><div class='add'>+	struct m_can_classdev *cdev = netdev_priv(dev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret =  m_can_interrupt_handler(cdev);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		m_can_disable_all_interrupts(cdev);</div><div class='add'>+		return IRQ_HANDLED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum hrtimer_restart m_can_coalescing_timer(struct hrtimer *timer)</div><div class='add'>+{</div><div class='add'>+	struct m_can_classdev *cdev = container_of(timer, struct m_can_classdev, hrtimer);</div><div class='add'>+</div><div class='add'>+	if (cdev-&gt;can.state == CAN_STATE_BUS_OFF ||</div><div class='add'>+	    cdev-&gt;can.state == CAN_STATE_STOPPED)</div><div class='add'>+		return HRTIMER_NORESTART;</div><div class='add'>+</div><div class='add'>+	irq_wake_thread(cdev-&gt;net-&gt;irq, cdev-&gt;net);</div><div class='add'>+</div><div class='add'>+	return HRTIMER_NORESTART;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const m_can_bittiming_const_30X = {</div><div class='ctx'> 	.name = KBUILD_MODNAME,</div><div class='ctx'> 	.tseg1_min = 2,		/* Time segment 1 = prop_seg + phase_seg1 */</div><div class='ctx'> 	.tseg1_max = 64,</div><div class='hunk'>@@ -790,7 +1348,7 @@ static const struct can_bittiming_const m_can_bittiming_const = {</div><div class='ctx'> 	.brp_inc = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static const struct can_bittiming_const m_can_data_bittiming_const = {</div><div class='add'>+static const struct can_bittiming_const m_can_data_bittiming_const_30X = {</div><div class='ctx'> 	.name = KBUILD_MODNAME,</div><div class='ctx'> 	.tseg1_min = 2,		/* Time segment 1 = prop_seg + phase_seg1 */</div><div class='ctx'> 	.tseg1_max = 16,</div><div class='hunk'>@@ -802,11 +1360,56 @@ static const struct can_bittiming_const m_can_data_bittiming_const = {</div><div class='ctx'> 	.brp_inc = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct can_bittiming_const m_can_bittiming_const_31X = {</div><div class='add'>+	.name = KBUILD_MODNAME,</div><div class='add'>+	.tseg1_min = 2,		/* Time segment 1 = prop_seg + phase_seg1 */</div><div class='add'>+	.tseg1_max = 256,</div><div class='add'>+	.tseg2_min = 2,		/* Time segment 2 = phase_seg2 */</div><div class='add'>+	.tseg2_max = 128,</div><div class='add'>+	.sjw_max = 128,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 512,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const m_can_data_bittiming_const_31X = {</div><div class='add'>+	.name = KBUILD_MODNAME,</div><div class='add'>+	.tseg1_min = 1,		/* Time segment 1 = prop_seg + phase_seg1 */</div><div class='add'>+	.tseg1_max = 32,</div><div class='add'>+	.tseg2_min = 1,		/* Time segment 2 = phase_seg2 */</div><div class='add'>+	.tseg2_max = 16,</div><div class='add'>+	.sjw_max = 16,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 32,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int m_can_init_ram(struct m_can_classdev *cdev)</div><div class='add'>+{</div><div class='add'>+	int end, i, start;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	/* initialize the entire Message RAM in use to avoid possible</div><div class='add'>+	 * ECC/parity checksum errors when reading an uninitialized buffer</div><div class='add'>+	 */</div><div class='add'>+	start = cdev-&gt;mcfg[MRAM_SIDF].off;</div><div class='add'>+	end = cdev-&gt;mcfg[MRAM_TXB].off +</div><div class='add'>+		cdev-&gt;mcfg[MRAM_TXB].num * TXB_ELEMENT_SIZE;</div><div class='add'>+</div><div class='add'>+	for (i = start; i &lt; end; i += 4) {</div><div class='add'>+		err = m_can_fifo_write_no_off(cdev, i, 0x0);</div><div class='add'>+		if (err)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int m_can_set_bittiming(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct m_can_priv *priv = netdev_priv(dev);</div><div class='del'>-	const struct can_bittiming *bt = &amp;priv-&gt;can.bittiming;</div><div class='del'>-	const struct can_bittiming *dbt = &amp;priv-&gt;can.data_bittiming;</div><div class='add'>+	struct m_can_classdev *cdev = netdev_priv(dev);</div><div class='add'>+	const struct can_bittiming *bt = &amp;cdev-&gt;can.bittiming;</div><div class='add'>+	const struct can_bittiming *dbt = &amp;cdev-&gt;can.fd.data_bittiming;</div><div class='ctx'> 	u16 brp, sjw, tseg1, tseg2;</div><div class='ctx'> 	u32 reg_btp;</div><div class='ctx'> </div><div class='hunk'>@@ -814,19 +1417,55 @@ static int m_can_set_bittiming(struct net_device *dev)</div><div class='ctx'> 	sjw = bt-&gt;sjw - 1;</div><div class='ctx'> 	tseg1 = bt-&gt;prop_seg + bt-&gt;phase_seg1 - 1;</div><div class='ctx'> 	tseg2 = bt-&gt;phase_seg2 - 1;</div><div class='del'>-	reg_btp = (brp &lt;&lt; BTR_BRP_SHIFT) | (sjw &lt;&lt; BTR_SJW_SHIFT) |</div><div class='del'>-			(tseg1 &lt;&lt; BTR_TSEG1_SHIFT) | (tseg2 &lt;&lt; BTR_TSEG2_SHIFT);</div><div class='del'>-	m_can_write(priv, M_CAN_BTP, reg_btp);</div><div class='del'>-</div><div class='del'>-	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD) {</div><div class='add'>+	reg_btp = FIELD_PREP(NBTP_NBRP_MASK, brp) |</div><div class='add'>+		  FIELD_PREP(NBTP_NSJW_MASK, sjw) |</div><div class='add'>+		  FIELD_PREP(NBTP_NTSEG1_MASK, tseg1) |</div><div class='add'>+		  FIELD_PREP(NBTP_NTSEG2_MASK, tseg2);</div><div class='add'>+	m_can_write(cdev, M_CAN_NBTP, reg_btp);</div><div class='add'>+</div><div class='add'>+	if (cdev-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD) {</div><div class='add'>+		reg_btp = 0;</div><div class='ctx'> 		brp = dbt-&gt;brp - 1;</div><div class='ctx'> 		sjw = dbt-&gt;sjw - 1;</div><div class='ctx'> 		tseg1 = dbt-&gt;prop_seg + dbt-&gt;phase_seg1 - 1;</div><div class='ctx'> 		tseg2 = dbt-&gt;phase_seg2 - 1;</div><div class='del'>-		reg_btp = (brp &lt;&lt; FBTR_FBRP_SHIFT) | (sjw &lt;&lt; FBTR_FSJW_SHIFT) |</div><div class='del'>-				(tseg1 &lt;&lt; FBTR_FTSEG1_SHIFT) |</div><div class='del'>-				(tseg2 &lt;&lt; FBTR_FTSEG2_SHIFT);</div><div class='del'>-		m_can_write(priv, M_CAN_FBTP, reg_btp);</div><div class='add'>+</div><div class='add'>+		/* TDC is only needed for bitrates beyond 2.5 MBit/s.</div><div class='add'>+		 * This is mentioned in the "Bit Time Requirements for CAN FD"</div><div class='add'>+		 * paper presented at the International CAN Conference 2013</div><div class='add'>+		 */</div><div class='add'>+		if (dbt-&gt;bitrate &gt; 2500000) {</div><div class='add'>+			u32 tdco, ssp;</div><div class='add'>+</div><div class='add'>+			/* Use the same value of secondary sampling point</div><div class='add'>+			 * as the data sampling point</div><div class='add'>+			 */</div><div class='add'>+			ssp = dbt-&gt;sample_point;</div><div class='add'>+</div><div class='add'>+			/* Equation based on Bosch's M_CAN User Manual's</div><div class='add'>+			 * Transmitter Delay Compensation Section</div><div class='add'>+			 */</div><div class='add'>+			tdco = (cdev-&gt;can.clock.freq / 1000) *</div><div class='add'>+				ssp / dbt-&gt;bitrate;</div><div class='add'>+</div><div class='add'>+			/* Max valid TDCO value is 127 */</div><div class='add'>+			if (tdco &gt; 127) {</div><div class='add'>+				netdev_warn(dev, "TDCO value of %u is beyond maximum. Using maximum possible value\n",</div><div class='add'>+					    tdco);</div><div class='add'>+				tdco = 127;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			reg_btp |= DBTP_TDC;</div><div class='add'>+			m_can_write(cdev, M_CAN_TDCR,</div><div class='add'>+				    FIELD_PREP(TDCR_TDCO_MASK, tdco));</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		reg_btp |= FIELD_PREP(DBTP_DBRP_MASK, brp) |</div><div class='add'>+			FIELD_PREP(DBTP_DSJW_MASK, sjw) |</div><div class='add'>+			FIELD_PREP(DBTP_DTSEG1_MASK, tseg1) |</div><div class='add'>+			FIELD_PREP(DBTP_DTSEG2_MASK, tseg2);</div><div class='add'>+</div><div class='add'>+		m_can_write(cdev, M_CAN_DBTP, reg_btp);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -837,93 +1476,193 @@ static int m_can_set_bittiming(struct net_device *dev)</div><div class='ctx'>  * - configure rx fifo</div><div class='ctx'>  * - accept non-matching frame into fifo 0</div><div class='ctx'>  * - configure tx buffer</div><div class='add'>+ *		- &gt;= v3.1.x: TX FIFO is used</div><div class='ctx'>  * - configure mode</div><div class='ctx'>  * - setup bittiming</div><div class='add'>+ * - configure timestamp generation</div><div class='ctx'>  */</div><div class='del'>-static void m_can_chip_config(struct net_device *dev)</div><div class='add'>+static int m_can_chip_config(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct m_can_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct m_can_classdev *cdev = netdev_priv(dev);</div><div class='add'>+	u32 interrupts = IR_ALL_INT;</div><div class='ctx'> 	u32 cccr, test;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = m_can_init_ram(cdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(dev, "Message RAM configuration failed\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	m_can_config_endisable(priv, true);</div><div class='add'>+	/* Disable unused interrupts */</div><div class='add'>+	interrupts &amp;= ~(IR_ARA | IR_ELO | IR_DRX | IR_TEFF | IR_TFE | IR_TCF |</div><div class='add'>+			IR_HPM | IR_RF1F | IR_RF1W | IR_RF1N | IR_RF0F |</div><div class='add'>+			IR_TSW);</div><div class='add'>+</div><div class='add'>+	err = m_can_config_enable(cdev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='ctx'> </div><div class='ctx'> 	/* RX Buffer/FIFO Element Size 64 bytes data field */</div><div class='del'>-	m_can_write(priv, M_CAN_RXESC, M_CAN_RXESC_64BYTES);</div><div class='add'>+	m_can_write(cdev, M_CAN_RXESC,</div><div class='add'>+		    FIELD_PREP(RXESC_RBDS_MASK, RXESC_64B) |</div><div class='add'>+		    FIELD_PREP(RXESC_F1DS_MASK, RXESC_64B) |</div><div class='add'>+		    FIELD_PREP(RXESC_F0DS_MASK, RXESC_64B));</div><div class='ctx'> </div><div class='ctx'> 	/* Accept Non-matching Frames Into FIFO 0 */</div><div class='del'>-	m_can_write(priv, M_CAN_GFC, 0x0);</div><div class='add'>+	m_can_write(cdev, M_CAN_GFC, 0x0);</div><div class='ctx'> </div><div class='del'>-	/* only support one Tx Buffer currently */</div><div class='del'>-	m_can_write(priv, M_CAN_TXBC, (1 &lt;&lt; TXBC_NDTB_OFF) |</div><div class='del'>-		    priv-&gt;mcfg[MRAM_TXB].off);</div><div class='add'>+	if (cdev-&gt;version == 30) {</div><div class='add'>+		/* only support one Tx Buffer currently */</div><div class='add'>+		m_can_write(cdev, M_CAN_TXBC, FIELD_PREP(TXBC_NDTB_MASK, 1) |</div><div class='add'>+			    cdev-&gt;mcfg[MRAM_TXB].off);</div><div class='add'>+	} else {</div><div class='add'>+		/* TX FIFO is used for newer IP Core versions */</div><div class='add'>+		m_can_write(cdev, M_CAN_TXBC,</div><div class='add'>+			    FIELD_PREP(TXBC_TFQS_MASK,</div><div class='add'>+				       cdev-&gt;mcfg[MRAM_TXB].num) |</div><div class='add'>+			    cdev-&gt;mcfg[MRAM_TXB].off);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* support 64 bytes payload */</div><div class='del'>-	m_can_write(priv, M_CAN_TXESC, TXESC_TBDS_64BYTES);</div><div class='del'>-</div><div class='del'>-	m_can_write(priv, M_CAN_TXEFC, (1 &lt;&lt; TXEFC_EFS_OFF) |</div><div class='del'>-		    priv-&gt;mcfg[MRAM_TXE].off);</div><div class='add'>+	m_can_write(cdev, M_CAN_TXESC,</div><div class='add'>+		    FIELD_PREP(TXESC_TBDS_MASK, TXESC_TBDS_64B));</div><div class='add'>+</div><div class='add'>+	/* TX Event FIFO */</div><div class='add'>+	if (cdev-&gt;version == 30) {</div><div class='add'>+		m_can_write(cdev, M_CAN_TXEFC,</div><div class='add'>+			    FIELD_PREP(TXEFC_EFS_MASK, 1) |</div><div class='add'>+			    cdev-&gt;mcfg[MRAM_TXE].off);</div><div class='add'>+	} else {</div><div class='add'>+		/* Full TX Event FIFO is used */</div><div class='add'>+		m_can_write(cdev, M_CAN_TXEFC,</div><div class='add'>+			    FIELD_PREP(TXEFC_EFWM_MASK,</div><div class='add'>+				       cdev-&gt;tx_max_coalesced_frames_irq) |</div><div class='add'>+			    FIELD_PREP(TXEFC_EFS_MASK,</div><div class='add'>+				       cdev-&gt;mcfg[MRAM_TXE].num) |</div><div class='add'>+			    cdev-&gt;mcfg[MRAM_TXE].off);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* rx fifo configuration, blocking mode, fifo size 1 */</div><div class='del'>-	m_can_write(priv, M_CAN_RXF0C,</div><div class='del'>-		    (priv-&gt;mcfg[MRAM_RXF0].num &lt;&lt; RXFC_FS_OFF) |</div><div class='del'>-		    RXFC_FWM_1 | priv-&gt;mcfg[MRAM_RXF0].off);</div><div class='del'>-</div><div class='del'>-	m_can_write(priv, M_CAN_RXF1C,</div><div class='del'>-		    (priv-&gt;mcfg[MRAM_RXF1].num &lt;&lt; RXFC_FS_OFF) |</div><div class='del'>-		    RXFC_FWM_1 | priv-&gt;mcfg[MRAM_RXF1].off);</div><div class='del'>-</div><div class='del'>-	cccr = m_can_read(priv, M_CAN_CCCR);</div><div class='del'>-	cccr &amp;= ~(CCCR_TEST | CCCR_MON | (CCCR_CMR_MASK &lt;&lt; CCCR_CMR_SHIFT) |</div><div class='del'>-		(CCCR_CME_MASK &lt;&lt; CCCR_CME_SHIFT));</div><div class='del'>-	test = m_can_read(priv, M_CAN_TEST);</div><div class='add'>+	m_can_write(cdev, M_CAN_RXF0C,</div><div class='add'>+		    FIELD_PREP(RXFC_FWM_MASK, cdev-&gt;rx_max_coalesced_frames_irq) |</div><div class='add'>+		    FIELD_PREP(RXFC_FS_MASK, cdev-&gt;mcfg[MRAM_RXF0].num) |</div><div class='add'>+		    cdev-&gt;mcfg[MRAM_RXF0].off);</div><div class='add'>+</div><div class='add'>+	m_can_write(cdev, M_CAN_RXF1C,</div><div class='add'>+		    FIELD_PREP(RXFC_FS_MASK, cdev-&gt;mcfg[MRAM_RXF1].num) |</div><div class='add'>+		    cdev-&gt;mcfg[MRAM_RXF1].off);</div><div class='add'>+</div><div class='add'>+	cccr = m_can_read(cdev, M_CAN_CCCR);</div><div class='add'>+	test = m_can_read(cdev, M_CAN_TEST);</div><div class='ctx'> 	test &amp;= ~TEST_LBCK;</div><div class='add'>+	if (cdev-&gt;version == 30) {</div><div class='add'>+		/* Version 3.0.x */</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LISTENONLY)</div><div class='del'>-		cccr |= CCCR_MON;</div><div class='add'>+		cccr &amp;= ~(CCCR_TEST | CCCR_MON | CCCR_DAR |</div><div class='add'>+			  FIELD_PREP(CCCR_CMR_MASK, FIELD_MAX(CCCR_CMR_MASK)) |</div><div class='add'>+			  FIELD_PREP(CCCR_CME_MASK, FIELD_MAX(CCCR_CME_MASK)));</div><div class='add'>+</div><div class='add'>+		if (cdev-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD)</div><div class='add'>+			cccr |= FIELD_PREP(CCCR_CME_MASK, CCCR_CME_CANFD_BRS);</div><div class='add'>+</div><div class='add'>+	} else {</div><div class='add'>+		/* Version 3.1.x or 3.2.x */</div><div class='add'>+		cccr &amp;= ~(CCCR_TEST | CCCR_MON | CCCR_BRSE | CCCR_FDOE |</div><div class='add'>+			  CCCR_NISO | CCCR_DAR);</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LOOPBACK) {</div><div class='del'>-		cccr |= CCCR_TEST;</div><div class='add'>+		/* Only 3.2.x has NISO Bit implemented */</div><div class='add'>+		if (cdev-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD_NON_ISO)</div><div class='add'>+			cccr |= CCCR_NISO;</div><div class='add'>+</div><div class='add'>+		if (cdev-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD)</div><div class='add'>+			cccr |= (CCCR_BRSE | CCCR_FDOE);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Loopback Mode */</div><div class='add'>+	if (cdev-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LOOPBACK) {</div><div class='add'>+		cccr |= CCCR_TEST | CCCR_MON;</div><div class='ctx'> 		test |= TEST_LBCK;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD)</div><div class='del'>-		cccr |= CCCR_CME_CANFD_BRS &lt;&lt; CCCR_CME_SHIFT;</div><div class='add'>+	/* Enable Monitoring (all versions) */</div><div class='add'>+	if (cdev-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LISTENONLY)</div><div class='add'>+		cccr |= CCCR_MON;</div><div class='ctx'> </div><div class='del'>-	m_can_write(priv, M_CAN_CCCR, cccr);</div><div class='del'>-	m_can_write(priv, M_CAN_TEST, test);</div><div class='add'>+	/* Disable Auto Retransmission (all versions) */</div><div class='add'>+	if (cdev-&gt;can.ctrlmode &amp; CAN_CTRLMODE_ONE_SHOT)</div><div class='add'>+		cccr |= CCCR_DAR;</div><div class='ctx'> </div><div class='del'>-	/* enable interrupts */</div><div class='del'>-	m_can_write(priv, M_CAN_IR, IR_ALL_INT);</div><div class='del'>-	if (!(priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING))</div><div class='del'>-		m_can_write(priv, M_CAN_IE, IR_ALL_INT &amp; ~IR_ERR_LEC);</div><div class='del'>-	else</div><div class='del'>-		m_can_write(priv, M_CAN_IE, IR_ALL_INT);</div><div class='add'>+	/* Write config */</div><div class='add'>+	m_can_write(cdev, M_CAN_CCCR, cccr);</div><div class='add'>+	m_can_write(cdev, M_CAN_TEST, test);</div><div class='add'>+</div><div class='add'>+	/* Enable interrupts */</div><div class='add'>+	if (!(cdev-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING)) {</div><div class='add'>+		if (cdev-&gt;version == 30)</div><div class='add'>+			interrupts &amp;= ~(IR_ERR_LEC_30X);</div><div class='add'>+		else</div><div class='add'>+			interrupts &amp;= ~(IR_ERR_LEC_31X);</div><div class='add'>+	}</div><div class='add'>+	cdev-&gt;active_interrupts = 0;</div><div class='add'>+	m_can_interrupt_enable(cdev, interrupts);</div><div class='ctx'> </div><div class='ctx'> 	/* route all interrupts to INT0 */</div><div class='del'>-	m_can_write(priv, M_CAN_ILS, ILS_ALL_INT0);</div><div class='add'>+	m_can_write(cdev, M_CAN_ILS, ILS_ALL_INT0);</div><div class='ctx'> </div><div class='ctx'> 	/* set bittiming params */</div><div class='ctx'> 	m_can_set_bittiming(dev);</div><div class='ctx'> </div><div class='del'>-	m_can_config_endisable(priv, false);</div><div class='add'>+	/* enable internal timestamp generation, with a prescaler of 16. The</div><div class='add'>+	 * prescaler is applied to the nominal bit timing</div><div class='add'>+	 */</div><div class='add'>+	m_can_write(cdev, M_CAN_TSCC,</div><div class='add'>+		    FIELD_PREP(TSCC_TCP_MASK, 0xf) |</div><div class='add'>+		    FIELD_PREP(TSCC_TSS_MASK, TSCC_TSS_INTERNAL));</div><div class='add'>+</div><div class='add'>+	err = m_can_config_disable(cdev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (cdev-&gt;ops-&gt;init)</div><div class='add'>+		cdev-&gt;ops-&gt;init(cdev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void m_can_start(struct net_device *dev)</div><div class='add'>+static int m_can_start(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct m_can_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct m_can_classdev *cdev = netdev_priv(dev);</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* basic m_can configuration */</div><div class='del'>-	m_can_chip_config(dev);</div><div class='add'>+	ret = m_can_chip_config(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	netdev_queue_set_dql_min_limit(netdev_get_tx_queue(cdev-&gt;net, 0),</div><div class='add'>+				       cdev-&gt;tx_max_coalesced_frames);</div><div class='ctx'> </div><div class='del'>-	priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+	cdev-&gt;can.state = m_can_state_get_by_psr(cdev);</div><div class='ctx'> </div><div class='del'>-	m_can_enable_all_interrupts(priv);</div><div class='add'>+	m_can_enable_all_interrupts(cdev);</div><div class='add'>+</div><div class='add'>+	if (cdev-&gt;version &gt; 30)</div><div class='add'>+		cdev-&gt;tx_fifo_putidx = FIELD_GET(TXFQS_TFQPI_MASK,</div><div class='add'>+						 m_can_read(cdev, M_CAN_TXFQS));</div><div class='add'>+</div><div class='add'>+	ret = m_can_cccr_update_bits(cdev, CCCR_INIT, 0);</div><div class='add'>+	if (ret)</div><div class='add'>+		netdev_err(dev, "failed to enter normal mode\n");</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int m_can_set_mode(struct net_device *dev, enum can_mode mode)</div><div class='ctx'> {</div><div class='ctx'> 	switch (mode) {</div><div class='ctx'> 	case CAN_MODE_START:</div><div class='add'>+		m_can_clean(dev);</div><div class='ctx'> 		m_can_start(dev);</div><div class='ctx'> 		netif_wake_queue(dev);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -934,388 +1673,1008 @@ static int m_can_set_mode(struct net_device *dev, enum can_mode mode)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void free_m_can_dev(struct net_device *dev)</div><div class='add'>+/* Checks core release number of M_CAN</div><div class='add'>+ * returns 0 if an unsupported device is detected</div><div class='add'>+ * else it returns the release and step coded as:</div><div class='add'>+ * return value = 10 * &lt;release&gt; + 1 * &lt;step&gt;</div><div class='add'>+ */</div><div class='add'>+static int m_can_check_core_release(struct m_can_classdev *cdev)</div><div class='add'>+{</div><div class='add'>+	u32 crel_reg;</div><div class='add'>+	u8 rel;</div><div class='add'>+	u8 step;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	/* Read Core Release Version and split into version number</div><div class='add'>+	 * Example: Version 3.2.1 =&gt; rel = 3; step = 2; substep = 1;</div><div class='add'>+	 */</div><div class='add'>+	crel_reg = m_can_read(cdev, M_CAN_CREL);</div><div class='add'>+	rel = (u8)FIELD_GET(CREL_REL_MASK, crel_reg);</div><div class='add'>+	step = (u8)FIELD_GET(CREL_STEP_MASK, crel_reg);</div><div class='add'>+</div><div class='add'>+	if (rel == 3) {</div><div class='add'>+		/* M_CAN v3.x.y: create return value */</div><div class='add'>+		res = 30 + step;</div><div class='add'>+	} else {</div><div class='add'>+		/* Unsupported M_CAN version */</div><div class='add'>+		res = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Selectable Non ISO support only in version 3.2.x</div><div class='add'>+ * Return 1 if the bit is writable, 0 if it is not, or negative on error.</div><div class='add'>+ */</div><div class='add'>+static int m_can_niso_supported(struct m_can_classdev *cdev)</div><div class='add'>+{</div><div class='add'>+	int ret, niso;</div><div class='add'>+</div><div class='add'>+	ret = m_can_config_enable(cdev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* First try to set the NISO bit. */</div><div class='add'>+	niso = m_can_cccr_update_bits(cdev, CCCR_NISO, CCCR_NISO);</div><div class='add'>+</div><div class='add'>+	/* Then clear the it again. */</div><div class='add'>+	ret = m_can_cccr_update_bits(cdev, CCCR_NISO, 0);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(cdev-&gt;net, "failed to revert the NON-ISO bit in CCCR\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = m_can_config_disable(cdev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return niso == 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int m_can_dev_setup(struct m_can_classdev *cdev)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = cdev-&gt;net;</div><div class='add'>+	int m_can_version, err, niso;</div><div class='add'>+</div><div class='add'>+	m_can_version = m_can_check_core_release(cdev);</div><div class='add'>+	/* return if unsupported version */</div><div class='add'>+	if (!m_can_version) {</div><div class='add'>+		netdev_err(cdev-&gt;net, "Unsupported version number: %2d",</div><div class='add'>+			   m_can_version);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Write the INIT bit, in case no hardware reset has happened before</div><div class='add'>+	 * the probe (for example, it was observed that the Intel Elkhart Lake</div><div class='add'>+	 * SoCs do not properly reset the CAN controllers on reboot)</div><div class='add'>+	 */</div><div class='add'>+	err = m_can_cccr_update_bits(cdev, CCCR_INIT, CCCR_INIT);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (!cdev-&gt;is_peripheral)</div><div class='add'>+		netif_napi_add(dev, &amp;cdev-&gt;napi, m_can_poll);</div><div class='add'>+</div><div class='add'>+	/* Shared properties of all M_CAN versions */</div><div class='add'>+	cdev-&gt;version = m_can_version;</div><div class='add'>+	cdev-&gt;can.do_set_mode = m_can_set_mode;</div><div class='add'>+	cdev-&gt;can.do_get_berr_counter = m_can_get_berr_counter;</div><div class='add'>+</div><div class='add'>+	/* Set M_CAN supported operations */</div><div class='add'>+	cdev-&gt;can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK |</div><div class='add'>+		CAN_CTRLMODE_LISTENONLY |</div><div class='add'>+		CAN_CTRLMODE_BERR_REPORTING |</div><div class='add'>+		CAN_CTRLMODE_FD |</div><div class='add'>+		CAN_CTRLMODE_ONE_SHOT;</div><div class='add'>+</div><div class='add'>+	/* Set properties depending on M_CAN version */</div><div class='add'>+	switch (cdev-&gt;version) {</div><div class='add'>+	case 30:</div><div class='add'>+		/* CAN_CTRLMODE_FD_NON_ISO is fixed with M_CAN IP v3.0.x */</div><div class='add'>+		err = can_set_static_ctrlmode(dev, CAN_CTRLMODE_FD_NON_ISO);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+		cdev-&gt;can.bittiming_const = &amp;m_can_bittiming_const_30X;</div><div class='add'>+		cdev-&gt;can.fd.data_bittiming_const = &amp;m_can_data_bittiming_const_30X;</div><div class='add'>+		break;</div><div class='add'>+	case 31:</div><div class='add'>+		/* CAN_CTRLMODE_FD_NON_ISO is fixed with M_CAN IP v3.1.x */</div><div class='add'>+		err = can_set_static_ctrlmode(dev, CAN_CTRLMODE_FD_NON_ISO);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+		cdev-&gt;can.bittiming_const = &amp;m_can_bittiming_const_31X;</div><div class='add'>+		cdev-&gt;can.fd.data_bittiming_const = &amp;m_can_data_bittiming_const_31X;</div><div class='add'>+		break;</div><div class='add'>+	case 32:</div><div class='add'>+	case 33:</div><div class='add'>+		/* Support both MCAN version v3.2.x and v3.3.0 */</div><div class='add'>+		cdev-&gt;can.bittiming_const = &amp;m_can_bittiming_const_31X;</div><div class='add'>+		cdev-&gt;can.fd.data_bittiming_const = &amp;m_can_data_bittiming_const_31X;</div><div class='add'>+</div><div class='add'>+		niso = m_can_niso_supported(cdev);</div><div class='add'>+		if (niso &lt; 0)</div><div class='add'>+			return niso;</div><div class='add'>+		if (niso)</div><div class='add'>+			cdev-&gt;can.ctrlmode_supported |= CAN_CTRLMODE_FD_NON_ISO;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		netdev_err(cdev-&gt;net, "Unsupported version number: %2d",</div><div class='add'>+			   cdev-&gt;version);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void m_can_stop(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct m_can_classdev *cdev = netdev_priv(dev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* disable all interrupts */</div><div class='add'>+	m_can_disable_all_interrupts(cdev);</div><div class='add'>+</div><div class='add'>+	/* Set init mode to disengage from the network */</div><div class='add'>+	ret = m_can_cccr_update_bits(cdev, CCCR_INIT, CCCR_INIT);</div><div class='add'>+	if (ret)</div><div class='add'>+		netdev_err(dev, "failed to enter standby mode: %pe\n",</div><div class='add'>+			   ERR_PTR(ret));</div><div class='add'>+</div><div class='add'>+	/* set the state as STOPPED */</div><div class='add'>+	cdev-&gt;can.state = CAN_STATE_STOPPED;</div><div class='add'>+</div><div class='add'>+	if (cdev-&gt;ops-&gt;deinit) {</div><div class='add'>+		ret = cdev-&gt;ops-&gt;deinit(cdev);</div><div class='add'>+		if (ret)</div><div class='add'>+			netdev_err(dev, "failed to deinitialize: %pe\n",</div><div class='add'>+				   ERR_PTR(ret));</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int m_can_close(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct m_can_classdev *cdev = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(dev);</div><div class='add'>+</div><div class='add'>+	m_can_stop(dev);</div><div class='add'>+	if (dev-&gt;irq)</div><div class='add'>+		free_irq(dev-&gt;irq, dev);</div><div class='add'>+</div><div class='add'>+	m_can_clean(dev);</div><div class='add'>+</div><div class='add'>+	if (cdev-&gt;is_peripheral) {</div><div class='add'>+		destroy_workqueue(cdev-&gt;tx_wq);</div><div class='add'>+		cdev-&gt;tx_wq = NULL;</div><div class='add'>+		can_rx_offload_disable(&amp;cdev-&gt;offload);</div><div class='add'>+	} else {</div><div class='add'>+		napi_disable(&amp;cdev-&gt;napi);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	close_candev(dev);</div><div class='add'>+</div><div class='add'>+	reset_control_assert(cdev-&gt;rst);</div><div class='add'>+	m_can_clk_stop(cdev);</div><div class='add'>+	phy_power_off(cdev-&gt;transceiver);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static netdev_tx_t m_can_tx_handler(struct m_can_classdev *cdev,</div><div class='add'>+				    struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct canfd_frame *cf = (struct canfd_frame *)skb-&gt;data;</div><div class='add'>+	u8 len_padded = DIV_ROUND_UP(cf-&gt;len, 4);</div><div class='add'>+	struct m_can_fifo_element fifo_element;</div><div class='add'>+	struct net_device *dev = cdev-&gt;net;</div><div class='add'>+	u32 cccr, fdflags;</div><div class='add'>+	int err;</div><div class='add'>+	u32 putidx;</div><div class='add'>+	unsigned int frame_len = can_skb_get_frame_len(skb);</div><div class='add'>+</div><div class='add'>+	/* Generate ID field for TX buffer Element */</div><div class='add'>+	/* Common to all supported M_CAN versions */</div><div class='add'>+	if (cf-&gt;can_id &amp; CAN_EFF_FLAG) {</div><div class='add'>+		fifo_element.id = cf-&gt;can_id &amp; CAN_EFF_MASK;</div><div class='add'>+		fifo_element.id |= TX_BUF_XTD;</div><div class='add'>+	} else {</div><div class='add'>+		fifo_element.id = ((cf-&gt;can_id &amp; CAN_SFF_MASK) &lt;&lt; 18);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cf-&gt;can_id &amp; CAN_RTR_FLAG)</div><div class='add'>+		fifo_element.id |= TX_BUF_RTR;</div><div class='add'>+</div><div class='add'>+	if (cdev-&gt;version == 30) {</div><div class='add'>+		netif_stop_queue(dev);</div><div class='add'>+</div><div class='add'>+		fifo_element.dlc = can_fd_len2dlc(cf-&gt;len) &lt;&lt; 16;</div><div class='add'>+</div><div class='add'>+		/* Write the frame ID, DLC, and payload to the FIFO element. */</div><div class='add'>+		err = m_can_fifo_write(cdev, 0, M_CAN_FIFO_ID, &amp;fifo_element, 2);</div><div class='add'>+		if (err)</div><div class='add'>+			goto out_fail;</div><div class='add'>+</div><div class='add'>+		err = m_can_fifo_write(cdev, 0, M_CAN_FIFO_DATA,</div><div class='add'>+				       cf-&gt;data, len_padded);</div><div class='add'>+		if (err)</div><div class='add'>+			goto out_fail;</div><div class='add'>+</div><div class='add'>+		if (cdev-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD) {</div><div class='add'>+			cccr = m_can_read(cdev, M_CAN_CCCR);</div><div class='add'>+			cccr &amp;= ~CCCR_CMR_MASK;</div><div class='add'>+			if (can_is_canfd_skb(skb)) {</div><div class='add'>+				if (cf-&gt;flags &amp; CANFD_BRS)</div><div class='add'>+					cccr |= FIELD_PREP(CCCR_CMR_MASK,</div><div class='add'>+							   CCCR_CMR_CANFD_BRS);</div><div class='add'>+				else</div><div class='add'>+					cccr |= FIELD_PREP(CCCR_CMR_MASK,</div><div class='add'>+							   CCCR_CMR_CANFD);</div><div class='add'>+			} else {</div><div class='add'>+				cccr |= FIELD_PREP(CCCR_CMR_MASK, CCCR_CMR_CAN);</div><div class='add'>+			}</div><div class='add'>+			m_can_write(cdev, M_CAN_CCCR, cccr);</div><div class='add'>+		}</div><div class='add'>+		m_can_write(cdev, M_CAN_TXBTIE, 0x1);</div><div class='add'>+</div><div class='add'>+		can_put_echo_skb(skb, dev, 0, frame_len);</div><div class='add'>+</div><div class='add'>+		m_can_write(cdev, M_CAN_TXBAR, 0x1);</div><div class='add'>+		/* End of xmit function for version 3.0.x */</div><div class='add'>+	} else {</div><div class='add'>+		/* Transmit routine for version &gt;= v3.1.x */</div><div class='add'>+</div><div class='add'>+		/* get put index for frame */</div><div class='add'>+		putidx = cdev-&gt;tx_fifo_putidx;</div><div class='add'>+</div><div class='add'>+		/* Construct DLC Field, with CAN-FD configuration.</div><div class='add'>+		 * Use the put index of the fifo as the message marker,</div><div class='add'>+		 * used in the TX interrupt for sending the correct echo frame.</div><div class='add'>+		 */</div><div class='add'>+</div><div class='add'>+		/* get CAN FD configuration of frame */</div><div class='add'>+		fdflags = 0;</div><div class='add'>+		if (can_is_canfd_skb(skb)) {</div><div class='add'>+			fdflags |= TX_BUF_FDF;</div><div class='add'>+			if (cf-&gt;flags &amp; CANFD_BRS)</div><div class='add'>+				fdflags |= TX_BUF_BRS;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		fifo_element.dlc = FIELD_PREP(TX_BUF_MM_MASK, putidx) |</div><div class='add'>+			FIELD_PREP(TX_BUF_DLC_MASK, can_fd_len2dlc(cf-&gt;len)) |</div><div class='add'>+			fdflags | TX_BUF_EFC;</div><div class='add'>+</div><div class='add'>+		memcpy_and_pad(fifo_element.data, CANFD_MAX_DLEN, &amp;cf-&gt;data,</div><div class='add'>+			       cf-&gt;len, 0);</div><div class='add'>+</div><div class='add'>+		err = m_can_fifo_write(cdev, putidx, M_CAN_FIFO_ID,</div><div class='add'>+				       &amp;fifo_element, 2 + len_padded);</div><div class='add'>+		if (err)</div><div class='add'>+			goto out_fail;</div><div class='add'>+</div><div class='add'>+		/* Push loopback echo.</div><div class='add'>+		 * Will be looped back on TX interrupt based on message marker</div><div class='add'>+		 */</div><div class='add'>+		can_put_echo_skb(skb, dev, putidx, frame_len);</div><div class='add'>+</div><div class='add'>+		if (cdev-&gt;is_peripheral) {</div><div class='add'>+			/* Delay enabling TX FIFO element */</div><div class='add'>+			cdev-&gt;tx_peripheral_submit |= BIT(putidx);</div><div class='add'>+		} else {</div><div class='add'>+			/* Enable TX FIFO element to start transfer  */</div><div class='add'>+			m_can_write(cdev, M_CAN_TXBAR, BIT(putidx));</div><div class='add'>+		}</div><div class='add'>+		cdev-&gt;tx_fifo_putidx = (++cdev-&gt;tx_fifo_putidx &gt;= cdev-&gt;can.echo_skb_max ?</div><div class='add'>+					0 : cdev-&gt;tx_fifo_putidx);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+out_fail:</div><div class='add'>+	netdev_err(dev, "FIFO write returned %d\n", err);</div><div class='add'>+	m_can_disable_all_interrupts(cdev);</div><div class='add'>+	return NETDEV_TX_BUSY;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void m_can_tx_submit(struct m_can_classdev *cdev)</div><div class='ctx'> {</div><div class='del'>-	free_candev(dev);</div><div class='add'>+	m_can_write(cdev, M_CAN_TXBAR, cdev-&gt;tx_peripheral_submit);</div><div class='add'>+	cdev-&gt;tx_peripheral_submit = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct net_device *alloc_m_can_dev(void)</div><div class='add'>+static void m_can_tx_work_queue(struct work_struct *ws)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *dev;</div><div class='del'>-	struct m_can_priv *priv;</div><div class='add'>+	struct m_can_tx_op *op = container_of(ws, struct m_can_tx_op, work);</div><div class='add'>+	struct m_can_classdev *cdev = op-&gt;cdev;</div><div class='add'>+	struct sk_buff *skb = op-&gt;skb;</div><div class='add'>+</div><div class='add'>+	op-&gt;skb = NULL;</div><div class='add'>+	m_can_tx_handler(cdev, skb);</div><div class='add'>+	if (op-&gt;submit)</div><div class='add'>+		m_can_tx_submit(cdev);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	dev = alloc_candev(sizeof(*priv), 1);</div><div class='del'>-	if (!dev)</div><div class='del'>-		return NULL;</div><div class='add'>+static void m_can_tx_queue_skb(struct m_can_classdev *cdev, struct sk_buff *skb,</div><div class='add'>+			       bool submit)</div><div class='add'>+{</div><div class='add'>+	cdev-&gt;tx_ops[cdev-&gt;next_tx_op].skb = skb;</div><div class='add'>+	cdev-&gt;tx_ops[cdev-&gt;next_tx_op].submit = submit;</div><div class='add'>+	queue_work(cdev-&gt;tx_wq, &amp;cdev-&gt;tx_ops[cdev-&gt;next_tx_op].work);</div><div class='ctx'> </div><div class='del'>-	priv = netdev_priv(dev);</div><div class='del'>-	netif_napi_add(dev, &amp;priv-&gt;napi, m_can_poll, M_CAN_NAPI_WEIGHT);</div><div class='add'>+	++cdev-&gt;next_tx_op;</div><div class='add'>+	if (cdev-&gt;next_tx_op &gt;= cdev-&gt;tx_fifo_size)</div><div class='add'>+		cdev-&gt;next_tx_op = 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	priv-&gt;dev = dev;</div><div class='del'>-	priv-&gt;can.bittiming_const = &amp;m_can_bittiming_const;</div><div class='del'>-	priv-&gt;can.data_bittiming_const = &amp;m_can_data_bittiming_const;</div><div class='del'>-	priv-&gt;can.do_set_mode = m_can_set_mode;</div><div class='del'>-	priv-&gt;can.do_get_berr_counter = m_can_get_berr_counter;</div><div class='add'>+static netdev_tx_t m_can_start_peripheral_xmit(struct m_can_classdev *cdev,</div><div class='add'>+					       struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	bool submit;</div><div class='ctx'> </div><div class='del'>-	/* CAN_CTRLMODE_FD_NON_ISO is fixed with M_CAN IP v3.0.1 */</div><div class='del'>-	priv-&gt;can.ctrlmode = CAN_CTRLMODE_FD_NON_ISO;</div><div class='add'>+	++cdev-&gt;nr_txs_without_submit;</div><div class='add'>+	if (cdev-&gt;nr_txs_without_submit &gt;= cdev-&gt;tx_max_coalesced_frames ||</div><div class='add'>+	    !netdev_xmit_more()) {</div><div class='add'>+		cdev-&gt;nr_txs_without_submit = 0;</div><div class='add'>+		submit = true;</div><div class='add'>+	} else {</div><div class='add'>+		submit = false;</div><div class='add'>+	}</div><div class='add'>+	m_can_tx_queue_skb(cdev, skb, submit);</div><div class='ctx'> </div><div class='del'>-	/* CAN_CTRLMODE_FD_NON_ISO can not be changed with M_CAN IP v3.0.1 */</div><div class='del'>-	priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK |</div><div class='del'>-					CAN_CTRLMODE_LISTENONLY |</div><div class='del'>-					CAN_CTRLMODE_BERR_REPORTING |</div><div class='del'>-					CAN_CTRLMODE_FD;</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	return dev;</div><div class='add'>+static netdev_tx_t m_can_start_xmit(struct sk_buff *skb,</div><div class='add'>+				    struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct m_can_classdev *cdev = netdev_priv(dev);</div><div class='add'>+	unsigned int frame_len;</div><div class='add'>+	netdev_tx_t ret;</div><div class='add'>+</div><div class='add'>+	if (can_dev_dropped_skb(dev, skb))</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+	frame_len = can_skb_get_frame_len(skb);</div><div class='add'>+</div><div class='add'>+	if (cdev-&gt;can.state == CAN_STATE_BUS_OFF) {</div><div class='add'>+		m_can_clean(cdev-&gt;net);</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = m_can_start_tx(cdev);</div><div class='add'>+	if (ret != NETDEV_TX_OK)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	netdev_sent_queue(dev, frame_len);</div><div class='add'>+</div><div class='add'>+	if (cdev-&gt;is_peripheral)</div><div class='add'>+		ret = m_can_start_peripheral_xmit(cdev, skb);</div><div class='add'>+	else</div><div class='add'>+		ret = m_can_tx_handler(cdev, skb);</div><div class='add'>+</div><div class='add'>+	if (ret != NETDEV_TX_OK)</div><div class='add'>+		netdev_completed_queue(dev, 1, frame_len);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum hrtimer_restart m_can_polling_timer(struct hrtimer *timer)</div><div class='add'>+{</div><div class='add'>+	struct m_can_classdev *cdev = container_of(timer, struct</div><div class='add'>+						   m_can_classdev, hrtimer);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (cdev-&gt;can.state == CAN_STATE_BUS_OFF ||</div><div class='add'>+	    cdev-&gt;can.state == CAN_STATE_STOPPED)</div><div class='add'>+		return HRTIMER_NORESTART;</div><div class='add'>+</div><div class='add'>+	ret = m_can_interrupt_handler(cdev);</div><div class='add'>+</div><div class='add'>+	/* On error or if napi is scheduled to read, stop the timer */</div><div class='add'>+	if (ret &lt; 0 || napi_is_scheduled(&amp;cdev-&gt;napi))</div><div class='add'>+		return HRTIMER_NORESTART;</div><div class='add'>+</div><div class='add'>+	hrtimer_forward_now(timer, ms_to_ktime(HRTIMER_POLL_INTERVAL_MS));</div><div class='add'>+</div><div class='add'>+	return HRTIMER_RESTART;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int m_can_open(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct m_can_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct m_can_classdev *cdev = netdev_priv(dev);</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = clk_prepare_enable(priv-&gt;hclk);</div><div class='add'>+	err = phy_power_on(cdev-&gt;transceiver);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	err = clk_prepare_enable(priv-&gt;cclk);</div><div class='add'>+	err = m_can_clk_start(cdev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_phy_power_off;</div><div class='add'>+</div><div class='add'>+	err = reset_control_deassert(cdev-&gt;rst);</div><div class='ctx'> 	if (err)</div><div class='del'>-		goto exit_disable_hclk;</div><div class='add'>+		goto exit_disable_clks;</div><div class='ctx'> </div><div class='ctx'> 	/* open the can device */</div><div class='ctx'> 	err = open_candev(dev);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		netdev_err(dev, "failed to open can device\n");</div><div class='del'>-		goto exit_disable_cclk;</div><div class='add'>+		goto out_reset_control_assert;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (cdev-&gt;is_peripheral)</div><div class='add'>+		can_rx_offload_enable(&amp;cdev-&gt;offload);</div><div class='add'>+	else</div><div class='add'>+		napi_enable(&amp;cdev-&gt;napi);</div><div class='add'>+</div><div class='ctx'> 	/* register interrupt handler */</div><div class='del'>-	err = request_irq(dev-&gt;irq, m_can_isr, IRQF_SHARED, dev-&gt;name,</div><div class='del'>-			  dev);</div><div class='add'>+	if (cdev-&gt;is_peripheral) {</div><div class='add'>+		cdev-&gt;tx_wq = alloc_ordered_workqueue("mcan_wq",</div><div class='add'>+						      WQ_FREEZABLE | WQ_MEM_RECLAIM);</div><div class='add'>+		if (!cdev-&gt;tx_wq) {</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto out_wq_fail;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		for (int i = 0; i != cdev-&gt;tx_fifo_size; ++i) {</div><div class='add'>+			cdev-&gt;tx_ops[i].cdev = cdev;</div><div class='add'>+			INIT_WORK(&amp;cdev-&gt;tx_ops[i].work, m_can_tx_work_queue);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = request_threaded_irq(dev-&gt;irq, NULL, m_can_isr,</div><div class='add'>+					   IRQF_ONESHOT,</div><div class='add'>+					   dev-&gt;name, dev);</div><div class='add'>+	} else if (dev-&gt;irq) {</div><div class='add'>+		err = request_irq(dev-&gt;irq, m_can_isr, IRQF_SHARED, dev-&gt;name,</div><div class='add'>+				  dev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (err &lt; 0) {</div><div class='ctx'> 		netdev_err(dev, "failed to request interrupt\n");</div><div class='ctx'> 		goto exit_irq_fail;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* start the m_can controller */</div><div class='del'>-	m_can_start(dev);</div><div class='add'>+	err = m_can_start(dev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto exit_start_fail;</div><div class='ctx'> </div><div class='del'>-	can_led_event(dev, CAN_LED_EVENT_OPEN);</div><div class='del'>-	napi_enable(&amp;priv-&gt;napi);</div><div class='ctx'> 	netif_start_queue(dev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+exit_start_fail:</div><div class='add'>+	if (cdev-&gt;is_peripheral || dev-&gt;irq)</div><div class='add'>+		free_irq(dev-&gt;irq, dev);</div><div class='ctx'> exit_irq_fail:</div><div class='add'>+	if (cdev-&gt;is_peripheral)</div><div class='add'>+		destroy_workqueue(cdev-&gt;tx_wq);</div><div class='add'>+out_wq_fail:</div><div class='add'>+	if (cdev-&gt;is_peripheral)</div><div class='add'>+		can_rx_offload_disable(&amp;cdev-&gt;offload);</div><div class='add'>+	else</div><div class='add'>+		napi_disable(&amp;cdev-&gt;napi);</div><div class='ctx'> 	close_candev(dev);</div><div class='del'>-exit_disable_cclk:</div><div class='del'>-	clk_disable_unprepare(priv-&gt;cclk);</div><div class='del'>-exit_disable_hclk:</div><div class='del'>-	clk_disable_unprepare(priv-&gt;hclk);</div><div class='add'>+out_reset_control_assert:</div><div class='add'>+	reset_control_assert(cdev-&gt;rst);</div><div class='add'>+exit_disable_clks:</div><div class='add'>+	m_can_clk_stop(cdev);</div><div class='add'>+out_phy_power_off:</div><div class='add'>+	phy_power_off(cdev-&gt;transceiver);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void m_can_stop(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct m_can_priv *priv = netdev_priv(dev);</div><div class='add'>+static const struct net_device_ops m_can_netdev_ops = {</div><div class='add'>+	.ndo_open = m_can_open,</div><div class='add'>+	.ndo_stop = m_can_close,</div><div class='add'>+	.ndo_start_xmit = m_can_start_xmit,</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	/* disable all interrupts */</div><div class='del'>-	m_can_disable_all_interrupts(priv);</div><div class='add'>+static int m_can_get_coalesce(struct net_device *dev,</div><div class='add'>+			      struct ethtool_coalesce *ec,</div><div class='add'>+			      struct kernel_ethtool_coalesce *kec,</div><div class='add'>+			      struct netlink_ext_ack *ext_ack)</div><div class='add'>+{</div><div class='add'>+	struct m_can_classdev *cdev = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	clk_disable_unprepare(priv-&gt;hclk);</div><div class='del'>-	clk_disable_unprepare(priv-&gt;cclk);</div><div class='add'>+	ec-&gt;rx_max_coalesced_frames_irq = cdev-&gt;rx_max_coalesced_frames_irq;</div><div class='add'>+	ec-&gt;rx_coalesce_usecs_irq = cdev-&gt;rx_coalesce_usecs_irq;</div><div class='add'>+	ec-&gt;tx_max_coalesced_frames = cdev-&gt;tx_max_coalesced_frames;</div><div class='add'>+	ec-&gt;tx_max_coalesced_frames_irq = cdev-&gt;tx_max_coalesced_frames_irq;</div><div class='add'>+	ec-&gt;tx_coalesce_usecs_irq = cdev-&gt;tx_coalesce_usecs_irq;</div><div class='ctx'> </div><div class='del'>-	/* set the state as STOPPED */</div><div class='del'>-	priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int m_can_close(struct net_device *dev)</div><div class='add'>+static int m_can_set_coalesce(struct net_device *dev,</div><div class='add'>+			      struct ethtool_coalesce *ec,</div><div class='add'>+			      struct kernel_ethtool_coalesce *kec,</div><div class='add'>+			      struct netlink_ext_ack *ext_ack)</div><div class='ctx'> {</div><div class='del'>-	struct m_can_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct m_can_classdev *cdev = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	netif_stop_queue(dev);</div><div class='del'>-	napi_disable(&amp;priv-&gt;napi);</div><div class='del'>-	m_can_stop(dev);</div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='del'>-	close_candev(dev);</div><div class='del'>-	can_led_event(dev, CAN_LED_EVENT_STOP);</div><div class='add'>+	if (cdev-&gt;can.state != CAN_STATE_STOPPED) {</div><div class='add'>+		netdev_err(dev, "Device is in use, please shut it down first\n");</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ec-&gt;rx_max_coalesced_frames_irq &gt; cdev-&gt;mcfg[MRAM_RXF0].num) {</div><div class='add'>+		netdev_err(dev, "rx-frames-irq %u greater than the RX FIFO %u\n",</div><div class='add'>+			   ec-&gt;rx_max_coalesced_frames_irq,</div><div class='add'>+			   cdev-&gt;mcfg[MRAM_RXF0].num);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if ((ec-&gt;rx_max_coalesced_frames_irq == 0) != (ec-&gt;rx_coalesce_usecs_irq == 0)) {</div><div class='add'>+		netdev_err(dev, "rx-frames-irq and rx-usecs-irq can only be set together\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (ec-&gt;tx_max_coalesced_frames_irq &gt; cdev-&gt;mcfg[MRAM_TXE].num) {</div><div class='add'>+		netdev_err(dev, "tx-frames-irq %u greater than the TX event FIFO %u\n",</div><div class='add'>+			   ec-&gt;tx_max_coalesced_frames_irq,</div><div class='add'>+			   cdev-&gt;mcfg[MRAM_TXE].num);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (ec-&gt;tx_max_coalesced_frames_irq &gt; cdev-&gt;mcfg[MRAM_TXB].num) {</div><div class='add'>+		netdev_err(dev, "tx-frames-irq %u greater than the TX FIFO %u\n",</div><div class='add'>+			   ec-&gt;tx_max_coalesced_frames_irq,</div><div class='add'>+			   cdev-&gt;mcfg[MRAM_TXB].num);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if ((ec-&gt;tx_max_coalesced_frames_irq == 0) != (ec-&gt;tx_coalesce_usecs_irq == 0)) {</div><div class='add'>+		netdev_err(dev, "tx-frames-irq and tx-usecs-irq can only be set together\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (ec-&gt;tx_max_coalesced_frames &gt; cdev-&gt;mcfg[MRAM_TXE].num) {</div><div class='add'>+		netdev_err(dev, "tx-frames %u greater than the TX event FIFO %u\n",</div><div class='add'>+			   ec-&gt;tx_max_coalesced_frames,</div><div class='add'>+			   cdev-&gt;mcfg[MRAM_TXE].num);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (ec-&gt;tx_max_coalesced_frames &gt; cdev-&gt;mcfg[MRAM_TXB].num) {</div><div class='add'>+		netdev_err(dev, "tx-frames %u greater than the TX FIFO %u\n",</div><div class='add'>+			   ec-&gt;tx_max_coalesced_frames,</div><div class='add'>+			   cdev-&gt;mcfg[MRAM_TXB].num);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (ec-&gt;rx_coalesce_usecs_irq != 0 &amp;&amp; ec-&gt;tx_coalesce_usecs_irq != 0 &amp;&amp;</div><div class='add'>+	    ec-&gt;rx_coalesce_usecs_irq != ec-&gt;tx_coalesce_usecs_irq) {</div><div class='add'>+		netdev_err(dev, "rx-usecs-irq %u needs to be equal to tx-usecs-irq %u if both are enabled\n",</div><div class='add'>+			   ec-&gt;rx_coalesce_usecs_irq,</div><div class='add'>+			   ec-&gt;tx_coalesce_usecs_irq);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cdev-&gt;rx_max_coalesced_frames_irq = ec-&gt;rx_max_coalesced_frames_irq;</div><div class='add'>+	cdev-&gt;rx_coalesce_usecs_irq = ec-&gt;rx_coalesce_usecs_irq;</div><div class='add'>+	cdev-&gt;tx_max_coalesced_frames = ec-&gt;tx_max_coalesced_frames;</div><div class='add'>+	cdev-&gt;tx_max_coalesced_frames_irq = ec-&gt;tx_max_coalesced_frames_irq;</div><div class='add'>+	cdev-&gt;tx_coalesce_usecs_irq = ec-&gt;tx_coalesce_usecs_irq;</div><div class='add'>+</div><div class='add'>+	if (cdev-&gt;rx_coalesce_usecs_irq)</div><div class='add'>+		cdev-&gt;irq_timer_wait = us_to_ktime(cdev-&gt;rx_coalesce_usecs_irq);</div><div class='add'>+	else</div><div class='add'>+		cdev-&gt;irq_timer_wait = us_to_ktime(cdev-&gt;tx_coalesce_usecs_irq);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static netdev_tx_t m_can_start_xmit(struct sk_buff *skb,</div><div class='del'>-				    struct net_device *dev)</div><div class='add'>+static void m_can_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)</div><div class='ctx'> {</div><div class='del'>-	struct m_can_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct canfd_frame *cf = (struct canfd_frame *)skb-&gt;data;</div><div class='del'>-	u32 id, cccr;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	if (can_dropped_invalid_skb(dev, skb))</div><div class='del'>-		return NETDEV_TX_OK;</div><div class='add'>+	struct m_can_classdev *cdev = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	netif_stop_queue(dev);</div><div class='add'>+	wol-&gt;supported = device_can_wakeup(cdev-&gt;dev) ? WAKE_PHY : 0;</div><div class='add'>+	wol-&gt;wolopts = device_may_wakeup(cdev-&gt;dev) ? WAKE_PHY : 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	if (cf-&gt;can_id &amp; CAN_EFF_FLAG) {</div><div class='del'>-		id = cf-&gt;can_id &amp; CAN_EFF_MASK;</div><div class='del'>-		id |= TX_BUF_XTD;</div><div class='del'>-	} else {</div><div class='del'>-		id = ((cf-&gt;can_id &amp; CAN_SFF_MASK) &lt;&lt; 18);</div><div class='del'>-	}</div><div class='add'>+static int m_can_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)</div><div class='add'>+{</div><div class='add'>+	struct m_can_classdev *cdev = netdev_priv(dev);</div><div class='add'>+	bool wol_enable = !!(wol-&gt;wolopts &amp; WAKE_PHY);</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	if (cf-&gt;can_id &amp; CAN_RTR_FLAG)</div><div class='del'>-		id |= TX_BUF_RTR;</div><div class='add'>+	if (wol-&gt;wolopts &amp; ~WAKE_PHY)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	/* message ram configuration */</div><div class='del'>-	m_can_fifo_write(priv, 0, M_CAN_FIFO_ID, id);</div><div class='del'>-	m_can_fifo_write(priv, 0, M_CAN_FIFO_DLC, can_len2dlc(cf-&gt;len) &lt;&lt; 16);</div><div class='add'>+	if (wol_enable == device_may_wakeup(cdev-&gt;dev))</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; cf-&gt;len; i += 4)</div><div class='del'>-		m_can_fifo_write(priv, 0, M_CAN_FIFO_DATA(i / 4),</div><div class='del'>-				 *(u32 *)(cf-&gt;data + i));</div><div class='add'>+	ret = device_set_wakeup_enable(cdev-&gt;dev, wol_enable);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(cdev-&gt;net, "Failed to set wakeup enable %pE\n",</div><div class='add'>+			   ERR_PTR(ret));</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	can_put_echo_skb(skb, dev, 0);</div><div class='add'>+	if (!IS_ERR_OR_NULL(cdev-&gt;pinctrl_state_wakeup)) {</div><div class='add'>+		if (wol_enable)</div><div class='add'>+			ret = pinctrl_select_state(cdev-&gt;pinctrl, cdev-&gt;pinctrl_state_wakeup);</div><div class='add'>+		else</div><div class='add'>+			ret = pinctrl_pm_select_default_state(cdev-&gt;dev);</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD) {</div><div class='del'>-		cccr = m_can_read(priv, M_CAN_CCCR);</div><div class='del'>-		cccr &amp;= ~(CCCR_CMR_MASK &lt;&lt; CCCR_CMR_SHIFT);</div><div class='del'>-		if (can_is_canfd_skb(skb)) {</div><div class='del'>-			if (cf-&gt;flags &amp; CANFD_BRS)</div><div class='del'>-				cccr |= CCCR_CMR_CANFD_BRS &lt;&lt; CCCR_CMR_SHIFT;</div><div class='del'>-			else</div><div class='del'>-				cccr |= CCCR_CMR_CANFD &lt;&lt; CCCR_CMR_SHIFT;</div><div class='del'>-		} else {</div><div class='del'>-			cccr |= CCCR_CMR_CAN &lt;&lt; CCCR_CMR_SHIFT;</div><div class='add'>+		if (ret) {</div><div class='add'>+			netdev_err(cdev-&gt;net, "Failed to select pinctrl state %pE\n",</div><div class='add'>+				   ERR_PTR(ret));</div><div class='add'>+			goto err_wakeup_enable;</div><div class='ctx'> 		}</div><div class='del'>-		m_can_write(priv, M_CAN_CCCR, cccr);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* enable first TX buffer to start transfer  */</div><div class='del'>-	m_can_write(priv, M_CAN_TXBTIE, 0x1);</div><div class='del'>-	m_can_write(priv, M_CAN_TXBAR, 0x1);</div><div class='add'>+	return 0;</div><div class='ctx'> </div><div class='del'>-	return NETDEV_TX_OK;</div><div class='add'>+err_wakeup_enable:</div><div class='add'>+	/* Revert wakeup enable */</div><div class='add'>+	device_set_wakeup_enable(cdev-&gt;dev, !wol_enable);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const struct net_device_ops m_can_netdev_ops = {</div><div class='del'>-	.ndo_open = m_can_open,</div><div class='del'>-	.ndo_stop = m_can_close,</div><div class='del'>-	.ndo_start_xmit = m_can_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='add'>+static const struct ethtool_ops m_can_ethtool_ops_coalescing = {</div><div class='add'>+	.supported_coalesce_params = ETHTOOL_COALESCE_RX_USECS_IRQ |</div><div class='add'>+		ETHTOOL_COALESCE_RX_MAX_FRAMES_IRQ |</div><div class='add'>+		ETHTOOL_COALESCE_TX_USECS_IRQ |</div><div class='add'>+		ETHTOOL_COALESCE_TX_MAX_FRAMES |</div><div class='add'>+		ETHTOOL_COALESCE_TX_MAX_FRAMES_IRQ,</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='add'>+	.get_coalesce = m_can_get_coalesce,</div><div class='add'>+	.set_coalesce = m_can_set_coalesce,</div><div class='add'>+	.get_wol = m_can_get_wol,</div><div class='add'>+	.set_wol = m_can_set_wol,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int register_m_can_dev(struct net_device *dev)</div><div class='add'>+static const struct ethtool_ops m_can_ethtool_ops = {</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='add'>+	.get_wol = m_can_get_wol,</div><div class='add'>+	.set_wol = m_can_set_wol,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int register_m_can_dev(struct m_can_classdev *cdev)</div><div class='ctx'> {</div><div class='add'>+	struct net_device *dev = cdev-&gt;net;</div><div class='add'>+</div><div class='ctx'> 	dev-&gt;flags |= IFF_ECHO;	/* we support local echo */</div><div class='ctx'> 	dev-&gt;netdev_ops = &amp;m_can_netdev_ops;</div><div class='add'>+	if (dev-&gt;irq &amp;&amp; cdev-&gt;is_peripheral)</div><div class='add'>+		dev-&gt;ethtool_ops = &amp;m_can_ethtool_ops_coalescing;</div><div class='add'>+	else</div><div class='add'>+		dev-&gt;ethtool_ops = &amp;m_can_ethtool_ops;</div><div class='ctx'> </div><div class='ctx'> 	return register_candev(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int m_can_of_parse_mram(struct platform_device *pdev,</div><div class='del'>-			       struct m_can_priv *priv)</div><div class='add'>+int m_can_check_mram_cfg(struct m_can_classdev *cdev, u32 mram_max_size)</div><div class='ctx'> {</div><div class='del'>-	struct device_node *np = pdev-&gt;dev.of_node;</div><div class='del'>-	struct resource *res;</div><div class='del'>-	void __iomem *addr;</div><div class='del'>-	u32 out_val[MRAM_CFG_LEN];</div><div class='del'>-	int i, start, end, ret;</div><div class='add'>+	u32 total_size;</div><div class='ctx'> </div><div class='del'>-	/* message ram could be shared */</div><div class='del'>-	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "message_ram");</div><div class='del'>-	if (!res)</div><div class='del'>-		return -ENODEV;</div><div class='add'>+	total_size = cdev-&gt;mcfg[MRAM_TXB].off - cdev-&gt;mcfg[MRAM_SIDF].off +</div><div class='add'>+			cdev-&gt;mcfg[MRAM_TXB].num * TXB_ELEMENT_SIZE;</div><div class='add'>+	if (total_size &gt; mram_max_size) {</div><div class='add'>+		netdev_err(cdev-&gt;net, "Total size of mram config(%u) exceeds mram(%u)\n",</div><div class='add'>+			   total_size, mram_max_size);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	addr = devm_ioremap(&amp;pdev-&gt;dev, res-&gt;start, resource_size(res));</div><div class='del'>-	if (!addr)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(m_can_check_mram_cfg);</div><div class='ctx'> </div><div class='del'>-	/* get message ram configuration */</div><div class='del'>-	ret = of_property_read_u32_array(np, "bosch,mram-cfg",</div><div class='del'>-					 out_val, sizeof(out_val) / 4);</div><div class='del'>-	if (ret) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "can not get message ram configuration\n");</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	priv-&gt;mram_base = addr;</div><div class='del'>-	priv-&gt;mcfg[MRAM_SIDF].off = out_val[0];</div><div class='del'>-	priv-&gt;mcfg[MRAM_SIDF].num = out_val[1];</div><div class='del'>-	priv-&gt;mcfg[MRAM_XIDF].off = priv-&gt;mcfg[MRAM_SIDF].off +</div><div class='del'>-			priv-&gt;mcfg[MRAM_SIDF].num * SIDF_ELEMENT_SIZE;</div><div class='del'>-	priv-&gt;mcfg[MRAM_XIDF].num = out_val[2];</div><div class='del'>-	priv-&gt;mcfg[MRAM_RXF0].off = priv-&gt;mcfg[MRAM_XIDF].off +</div><div class='del'>-			priv-&gt;mcfg[MRAM_XIDF].num * XIDF_ELEMENT_SIZE;</div><div class='del'>-	priv-&gt;mcfg[MRAM_RXF0].num = out_val[3] &amp; RXFC_FS_MASK;</div><div class='del'>-	priv-&gt;mcfg[MRAM_RXF1].off = priv-&gt;mcfg[MRAM_RXF0].off +</div><div class='del'>-			priv-&gt;mcfg[MRAM_RXF0].num * RXF0_ELEMENT_SIZE;</div><div class='del'>-	priv-&gt;mcfg[MRAM_RXF1].num = out_val[4] &amp; RXFC_FS_MASK;</div><div class='del'>-	priv-&gt;mcfg[MRAM_RXB].off = priv-&gt;mcfg[MRAM_RXF1].off +</div><div class='del'>-			priv-&gt;mcfg[MRAM_RXF1].num * RXF1_ELEMENT_SIZE;</div><div class='del'>-	priv-&gt;mcfg[MRAM_RXB].num = out_val[5];</div><div class='del'>-	priv-&gt;mcfg[MRAM_TXE].off = priv-&gt;mcfg[MRAM_RXB].off +</div><div class='del'>-			priv-&gt;mcfg[MRAM_RXB].num * RXB_ELEMENT_SIZE;</div><div class='del'>-	priv-&gt;mcfg[MRAM_TXE].num = out_val[6];</div><div class='del'>-	priv-&gt;mcfg[MRAM_TXB].off = priv-&gt;mcfg[MRAM_TXE].off +</div><div class='del'>-			priv-&gt;mcfg[MRAM_TXE].num * TXE_ELEMENT_SIZE;</div><div class='del'>-	priv-&gt;mcfg[MRAM_TXB].num = out_val[7] &amp; TXBC_NDTB_MASK;</div><div class='del'>-</div><div class='del'>-	dev_dbg(&amp;pdev-&gt;dev, "mram_base %p sidf 0x%x %d xidf 0x%x %d rxf0 0x%x %d rxf1 0x%x %d rxb 0x%x %d txe 0x%x %d txb 0x%x %d\n",</div><div class='del'>-		priv-&gt;mram_base,</div><div class='del'>-		priv-&gt;mcfg[MRAM_SIDF].off, priv-&gt;mcfg[MRAM_SIDF].num,</div><div class='del'>-		priv-&gt;mcfg[MRAM_XIDF].off, priv-&gt;mcfg[MRAM_XIDF].num,</div><div class='del'>-		priv-&gt;mcfg[MRAM_RXF0].off, priv-&gt;mcfg[MRAM_RXF0].num,</div><div class='del'>-		priv-&gt;mcfg[MRAM_RXF1].off, priv-&gt;mcfg[MRAM_RXF1].num,</div><div class='del'>-		priv-&gt;mcfg[MRAM_RXB].off, priv-&gt;mcfg[MRAM_RXB].num,</div><div class='del'>-		priv-&gt;mcfg[MRAM_TXE].off, priv-&gt;mcfg[MRAM_TXE].num,</div><div class='del'>-		priv-&gt;mcfg[MRAM_TXB].off, priv-&gt;mcfg[MRAM_TXB].num);</div><div class='add'>+static void m_can_of_parse_mram(struct m_can_classdev *cdev,</div><div class='add'>+				const u32 *mram_config_vals)</div><div class='add'>+{</div><div class='add'>+	cdev-&gt;mcfg[MRAM_SIDF].off = mram_config_vals[0];</div><div class='add'>+	cdev-&gt;mcfg[MRAM_SIDF].num = mram_config_vals[1];</div><div class='add'>+	cdev-&gt;mcfg[MRAM_XIDF].off = cdev-&gt;mcfg[MRAM_SIDF].off +</div><div class='add'>+		cdev-&gt;mcfg[MRAM_SIDF].num * SIDF_ELEMENT_SIZE;</div><div class='add'>+	cdev-&gt;mcfg[MRAM_XIDF].num = mram_config_vals[2];</div><div class='add'>+	cdev-&gt;mcfg[MRAM_RXF0].off = cdev-&gt;mcfg[MRAM_XIDF].off +</div><div class='add'>+		cdev-&gt;mcfg[MRAM_XIDF].num * XIDF_ELEMENT_SIZE;</div><div class='add'>+	cdev-&gt;mcfg[MRAM_RXF0].num = mram_config_vals[3] &amp;</div><div class='add'>+		FIELD_MAX(RXFC_FS_MASK);</div><div class='add'>+	cdev-&gt;mcfg[MRAM_RXF1].off = cdev-&gt;mcfg[MRAM_RXF0].off +</div><div class='add'>+		cdev-&gt;mcfg[MRAM_RXF0].num * RXF0_ELEMENT_SIZE;</div><div class='add'>+	cdev-&gt;mcfg[MRAM_RXF1].num = mram_config_vals[4] &amp;</div><div class='add'>+		FIELD_MAX(RXFC_FS_MASK);</div><div class='add'>+	cdev-&gt;mcfg[MRAM_RXB].off = cdev-&gt;mcfg[MRAM_RXF1].off +</div><div class='add'>+		cdev-&gt;mcfg[MRAM_RXF1].num * RXF1_ELEMENT_SIZE;</div><div class='add'>+	cdev-&gt;mcfg[MRAM_RXB].num = mram_config_vals[5];</div><div class='add'>+	cdev-&gt;mcfg[MRAM_TXE].off = cdev-&gt;mcfg[MRAM_RXB].off +</div><div class='add'>+		cdev-&gt;mcfg[MRAM_RXB].num * RXB_ELEMENT_SIZE;</div><div class='add'>+	cdev-&gt;mcfg[MRAM_TXE].num = mram_config_vals[6];</div><div class='add'>+	cdev-&gt;mcfg[MRAM_TXB].off = cdev-&gt;mcfg[MRAM_TXE].off +</div><div class='add'>+		cdev-&gt;mcfg[MRAM_TXE].num * TXE_ELEMENT_SIZE;</div><div class='add'>+	cdev-&gt;mcfg[MRAM_TXB].num = mram_config_vals[7] &amp;</div><div class='add'>+		FIELD_MAX(TXBC_NDTB_MASK);</div><div class='add'>+</div><div class='add'>+	netdev_dbg(cdev-&gt;net,</div><div class='add'>+		   "sidf 0x%x %d xidf 0x%x %d rxf0 0x%x %d rxf1 0x%x %d rxb 0x%x %d txe 0x%x %d txb 0x%x %d\n",</div><div class='add'>+		   cdev-&gt;mcfg[MRAM_SIDF].off, cdev-&gt;mcfg[MRAM_SIDF].num,</div><div class='add'>+		   cdev-&gt;mcfg[MRAM_XIDF].off, cdev-&gt;mcfg[MRAM_XIDF].num,</div><div class='add'>+		   cdev-&gt;mcfg[MRAM_RXF0].off, cdev-&gt;mcfg[MRAM_RXF0].num,</div><div class='add'>+		   cdev-&gt;mcfg[MRAM_RXF1].off, cdev-&gt;mcfg[MRAM_RXF1].num,</div><div class='add'>+		   cdev-&gt;mcfg[MRAM_RXB].off, cdev-&gt;mcfg[MRAM_RXB].num,</div><div class='add'>+		   cdev-&gt;mcfg[MRAM_TXE].off, cdev-&gt;mcfg[MRAM_TXE].num,</div><div class='add'>+		   cdev-&gt;mcfg[MRAM_TXB].off, cdev-&gt;mcfg[MRAM_TXB].num);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	/* initialize the entire Message RAM in use to avoid possible</div><div class='del'>-	 * ECC/parity checksum errors when reading an uninitialized buffer</div><div class='del'>-	 */</div><div class='del'>-	start = priv-&gt;mcfg[MRAM_SIDF].off;</div><div class='del'>-	end = priv-&gt;mcfg[MRAM_TXB].off +</div><div class='del'>-		priv-&gt;mcfg[MRAM_TXB].num * TXB_ELEMENT_SIZE;</div><div class='del'>-	for (i = start; i &lt; end; i += 4)</div><div class='del'>-		writel(0x0, priv-&gt;mram_base + i);</div><div class='add'>+int m_can_class_get_clocks(struct m_can_classdev *cdev)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	cdev-&gt;hclk = devm_clk_get(cdev-&gt;dev, "hclk");</div><div class='add'>+	cdev-&gt;cclk = devm_clk_get(cdev-&gt;dev, "cclk");</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(cdev-&gt;hclk) || IS_ERR(cdev-&gt;cclk)) {</div><div class='add'>+		netdev_err(cdev-&gt;net, "no clock found\n");</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(m_can_class_get_clocks);</div><div class='ctx'> </div><div class='del'>-static int m_can_plat_probe(struct platform_device *pdev)</div><div class='add'>+static bool m_can_class_wakeup_pinctrl_enabled(struct m_can_classdev *class_dev)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *dev;</div><div class='del'>-	struct m_can_priv *priv;</div><div class='del'>-	struct resource *res;</div><div class='del'>-	void __iomem *addr;</div><div class='del'>-	struct clk *hclk, *cclk;</div><div class='del'>-	int irq, ret;</div><div class='add'>+	return device_may_wakeup(class_dev-&gt;dev) &amp;&amp; class_dev-&gt;pinctrl_state_wakeup;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	hclk = devm_clk_get(&amp;pdev-&gt;dev, "hclk");</div><div class='del'>-	cclk = devm_clk_get(&amp;pdev-&gt;dev, "cclk");</div><div class='del'>-	if (IS_ERR(hclk) || IS_ERR(cclk)) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "no clock find\n");</div><div class='del'>-		return -ENODEV;</div><div class='add'>+static int m_can_class_parse_pinctrl(struct m_can_classdev *class_dev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = class_dev-&gt;dev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	class_dev-&gt;pinctrl = devm_pinctrl_get(dev);</div><div class='add'>+	if (IS_ERR(class_dev-&gt;pinctrl)) {</div><div class='add'>+		ret = PTR_ERR(class_dev-&gt;pinctrl);</div><div class='add'>+		class_dev-&gt;pinctrl = NULL;</div><div class='add'>+</div><div class='add'>+		if (ret == -ENODEV)</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		return dev_err_probe(dev, ret, "Failed to get pinctrl\n");</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "m_can");</div><div class='del'>-	addr = devm_ioremap_resource(&amp;pdev-&gt;dev, res);</div><div class='del'>-	irq = platform_get_irq_byname(pdev, "int0");</div><div class='del'>-	if (IS_ERR(addr) || irq &lt; 0)</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	class_dev-&gt;pinctrl_state_wakeup =</div><div class='add'>+		pinctrl_lookup_state(class_dev-&gt;pinctrl, "wakeup");</div><div class='add'>+	if (IS_ERR(class_dev-&gt;pinctrl_state_wakeup)) {</div><div class='add'>+		ret = PTR_ERR(class_dev-&gt;pinctrl_state_wakeup);</div><div class='add'>+		class_dev-&gt;pinctrl_state_wakeup = NULL;</div><div class='ctx'> </div><div class='del'>-	/* allocate the m_can device */</div><div class='del'>-	dev = alloc_m_can_dev();</div><div class='del'>-	if (!dev)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	priv = netdev_priv(dev);</div><div class='del'>-	dev-&gt;irq = irq;</div><div class='del'>-	priv-&gt;base = addr;</div><div class='del'>-	priv-&gt;device = &amp;pdev-&gt;dev;</div><div class='del'>-	priv-&gt;hclk = hclk;</div><div class='del'>-	priv-&gt;cclk = cclk;</div><div class='del'>-	priv-&gt;can.clock.freq = clk_get_rate(cclk);</div><div class='del'>-</div><div class='del'>-	ret = m_can_of_parse_mram(pdev, priv);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto failed_free_dev;</div><div class='add'>+		if (ret == -ENODEV)</div><div class='add'>+			return 0;</div><div class='ctx'> </div><div class='del'>-	platform_set_drvdata(pdev, dev);</div><div class='del'>-	SET_NETDEV_DEV(dev, &amp;pdev-&gt;dev);</div><div class='add'>+		return dev_err_probe(dev, ret, "Failed to lookup pinctrl wakeup state\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	ret = register_m_can_dev(dev);</div><div class='add'>+struct m_can_classdev *m_can_class_allocate_dev(struct device *dev,</div><div class='add'>+						int sizeof_priv)</div><div class='add'>+{</div><div class='add'>+	struct m_can_classdev *class_dev = NULL;</div><div class='add'>+	u32 mram_config_vals[MRAM_CFG_LEN];</div><div class='add'>+	struct net_device *net_dev;</div><div class='add'>+	u32 tx_fifo_size;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = fwnode_property_read_u32_array(dev_fwnode(dev),</div><div class='add'>+					     "bosch,mram-cfg",</div><div class='add'>+					     mram_config_vals,</div><div class='add'>+					     sizeof(mram_config_vals) / 4);</div><div class='ctx'> 	if (ret) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "registering %s failed (err=%d)\n",</div><div class='del'>-			KBUILD_MODNAME, ret);</div><div class='del'>-		goto failed_free_dev;</div><div class='add'>+		dev_err(dev, "Could not get Message RAM configuration.");</div><div class='add'>+		return ERR_PTR(ret);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	devm_can_led_init(dev);</div><div class='add'>+	if (dev-&gt;of_node &amp;&amp; of_property_read_bool(dev-&gt;of_node, "wakeup-source"))</div><div class='add'>+		device_set_wakeup_capable(dev, true);</div><div class='ctx'> </div><div class='del'>-	dev_info(&amp;pdev-&gt;dev, "%s device registered (regs=%p, irq=%d)\n",</div><div class='del'>-		 KBUILD_MODNAME, priv-&gt;base, dev-&gt;irq);</div><div class='add'>+	/* Get TX FIFO size</div><div class='add'>+	 * Defines the total amount of echo buffers for loopback</div><div class='add'>+	 */</div><div class='add'>+	tx_fifo_size = mram_config_vals[7];</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	/* allocate the m_can device */</div><div class='add'>+	net_dev = alloc_candev(sizeof_priv, tx_fifo_size);</div><div class='add'>+	if (!net_dev) {</div><div class='add'>+		dev_err(dev, "Failed to allocate CAN device");</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-failed_free_dev:</div><div class='del'>-	free_m_can_dev(dev);</div><div class='del'>-	return ret;</div><div class='add'>+	class_dev = netdev_priv(net_dev);</div><div class='add'>+	class_dev-&gt;net = net_dev;</div><div class='add'>+	class_dev-&gt;dev = dev;</div><div class='add'>+	SET_NETDEV_DEV(net_dev, dev);</div><div class='add'>+</div><div class='add'>+	m_can_of_parse_mram(class_dev, mram_config_vals);</div><div class='add'>+	spin_lock_init(&amp;class_dev-&gt;tx_handling_spinlock);</div><div class='add'>+</div><div class='add'>+	ret = m_can_class_parse_pinctrl(class_dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_free_candev;</div><div class='add'>+</div><div class='add'>+	return class_dev;</div><div class='add'>+</div><div class='add'>+err_free_candev:</div><div class='add'>+	free_candev(net_dev);</div><div class='add'>+	return ERR_PTR(ret);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(m_can_class_allocate_dev);</div><div class='ctx'> </div><div class='del'>-static __maybe_unused int m_can_suspend(struct device *dev)</div><div class='add'>+void m_can_class_free_dev(struct net_device *net)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *ndev = dev_get_drvdata(dev);</div><div class='del'>-	struct m_can_priv *priv = netdev_priv(ndev);</div><div class='add'>+	free_candev(net);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(m_can_class_free_dev);</div><div class='ctx'> </div><div class='del'>-	if (netif_running(ndev)) {</div><div class='del'>-		netif_stop_queue(ndev);</div><div class='del'>-		netif_device_detach(ndev);</div><div class='add'>+int m_can_class_register(struct m_can_classdev *cdev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	cdev-&gt;tx_fifo_size = max(1, min(cdev-&gt;mcfg[MRAM_TXB].num,</div><div class='add'>+					cdev-&gt;mcfg[MRAM_TXE].num));</div><div class='add'>+	if (cdev-&gt;is_peripheral) {</div><div class='add'>+		cdev-&gt;tx_ops =</div><div class='add'>+			devm_kzalloc(cdev-&gt;dev,</div><div class='add'>+				     cdev-&gt;tx_fifo_size * sizeof(*cdev-&gt;tx_ops),</div><div class='add'>+				     GFP_KERNEL);</div><div class='add'>+		if (!cdev-&gt;tx_ops)</div><div class='add'>+			return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* TODO: enter low power */</div><div class='add'>+	cdev-&gt;rst = devm_reset_control_get_optional_shared(cdev-&gt;dev, NULL);</div><div class='add'>+	if (IS_ERR(cdev-&gt;rst))</div><div class='add'>+		return dev_err_probe(cdev-&gt;dev, PTR_ERR(cdev-&gt;rst),</div><div class='add'>+				     "Failed to get reset line\n");</div><div class='ctx'> </div><div class='del'>-	priv-&gt;can.state = CAN_STATE_SLEEPING;</div><div class='add'>+	ret = m_can_clk_start(cdev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='add'>+	ret = reset_control_deassert(cdev-&gt;rst);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto clk_disable;</div><div class='ctx'> </div><div class='del'>-static __maybe_unused int m_can_resume(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	struct net_device *ndev = dev_get_drvdata(dev);</div><div class='del'>-	struct m_can_priv *priv = netdev_priv(ndev);</div><div class='add'>+	if (cdev-&gt;is_peripheral) {</div><div class='add'>+		ret = can_rx_offload_add_manual(cdev-&gt;net, &amp;cdev-&gt;offload,</div><div class='add'>+						NAPI_POLL_WEIGHT);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out_reset_control_assert;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	/* TODO: exit low power */</div><div class='add'>+	if (!cdev-&gt;net-&gt;irq) {</div><div class='add'>+		netdev_dbg(cdev-&gt;net, "Polling enabled, initialize hrtimer");</div><div class='add'>+		hrtimer_setup(&amp;cdev-&gt;hrtimer, m_can_polling_timer, CLOCK_MONOTONIC,</div><div class='add'>+			      HRTIMER_MODE_REL_PINNED);</div><div class='add'>+	} else {</div><div class='add'>+		hrtimer_setup(&amp;cdev-&gt;hrtimer, m_can_coalescing_timer, CLOCK_MONOTONIC,</div><div class='add'>+			      HRTIMER_MODE_REL);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+	ret = m_can_dev_setup(cdev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto rx_offload_del;</div><div class='ctx'> </div><div class='del'>-	if (netif_running(ndev)) {</div><div class='del'>-		netif_device_attach(ndev);</div><div class='del'>-		netif_start_queue(ndev);</div><div class='add'>+	ret = register_m_can_dev(cdev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(cdev-&gt;net, "registering %s failed (err=%d)\n",</div><div class='add'>+			   cdev-&gt;net-&gt;name, ret);</div><div class='add'>+		goto rx_offload_del;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	of_can_transceiver(cdev-&gt;net);</div><div class='add'>+</div><div class='add'>+	netdev_info(cdev-&gt;net, "device registered (irq=%d, version=%d)\n",</div><div class='add'>+		    cdev-&gt;net-&gt;irq, cdev-&gt;version);</div><div class='add'>+</div><div class='add'>+	/* Probe finished</div><div class='add'>+	 * Assert reset and stop clocks.</div><div class='add'>+	 * They will be reactivated once the M_CAN device is opened</div><div class='add'>+	 */</div><div class='add'>+	reset_control_assert(cdev-&gt;rst);</div><div class='add'>+	m_can_clk_stop(cdev);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='add'>+</div><div class='add'>+rx_offload_del:</div><div class='add'>+	if (cdev-&gt;is_peripheral)</div><div class='add'>+		can_rx_offload_del(&amp;cdev-&gt;offload);</div><div class='add'>+out_reset_control_assert:</div><div class='add'>+	reset_control_assert(cdev-&gt;rst);</div><div class='add'>+clk_disable:</div><div class='add'>+	m_can_clk_stop(cdev);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(m_can_class_register);</div><div class='ctx'> </div><div class='del'>-static void unregister_m_can_dev(struct net_device *dev)</div><div class='add'>+void m_can_class_unregister(struct m_can_classdev *cdev)</div><div class='ctx'> {</div><div class='del'>-	unregister_candev(dev);</div><div class='add'>+	unregister_candev(cdev-&gt;net);</div><div class='add'>+	if (cdev-&gt;is_peripheral)</div><div class='add'>+		can_rx_offload_del(&amp;cdev-&gt;offload);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(m_can_class_unregister);</div><div class='ctx'> </div><div class='del'>-static int m_can_plat_remove(struct platform_device *pdev)</div><div class='add'>+int m_can_class_suspend(struct device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *dev = platform_get_drvdata(pdev);</div><div class='add'>+	struct m_can_classdev *cdev = dev_get_drvdata(dev);</div><div class='add'>+	struct net_device *ndev = cdev-&gt;net;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	unregister_m_can_dev(dev);</div><div class='del'>-	platform_set_drvdata(pdev, NULL);</div><div class='add'>+	if (netif_running(ndev)) {</div><div class='add'>+		netif_stop_queue(ndev);</div><div class='add'>+		netif_device_detach(ndev);</div><div class='ctx'> </div><div class='del'>-	free_m_can_dev(dev);</div><div class='add'>+		/* leave the chip running with rx interrupt enabled if it is</div><div class='add'>+		 * used as a wake-up source. Coalescing needs to be reset then,</div><div class='add'>+		 * the timer is cancelled here, interrupts are done in resume.</div><div class='add'>+		 */</div><div class='add'>+		if (cdev-&gt;pm_wake_source) {</div><div class='add'>+			hrtimer_cancel(&amp;cdev-&gt;hrtimer);</div><div class='add'>+			m_can_write(cdev, M_CAN_IE, IR_RF0N);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+			if (cdev-&gt;ops-&gt;deinit)</div><div class='add'>+				ret = cdev-&gt;ops-&gt;deinit(cdev);</div><div class='add'>+		} else {</div><div class='add'>+			m_can_stop(ndev);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		m_can_clk_stop(cdev);</div><div class='add'>+		cdev-&gt;can.state = CAN_STATE_SLEEPING;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!m_can_class_wakeup_pinctrl_enabled(cdev))</div><div class='add'>+		pinctrl_pm_select_sleep_state(dev);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(m_can_class_suspend);</div><div class='ctx'> </div><div class='del'>-static const struct dev_pm_ops m_can_pmops = {</div><div class='del'>-	SET_SYSTEM_SLEEP_PM_OPS(m_can_suspend, m_can_resume)</div><div class='del'>-};</div><div class='add'>+int m_can_class_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct m_can_classdev *cdev = dev_get_drvdata(dev);</div><div class='add'>+	struct net_device *ndev = cdev-&gt;net;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='del'>-static const struct of_device_id m_can_of_table[] = {</div><div class='del'>-	{ .compatible = "bosch,m_can", .data = NULL },</div><div class='del'>-	{ /* sentinel */ },</div><div class='del'>-};</div><div class='del'>-MODULE_DEVICE_TABLE(of, m_can_of_table);</div><div class='del'>-</div><div class='del'>-static struct platform_driver m_can_plat_driver = {</div><div class='del'>-	.driver = {</div><div class='del'>-		.name = KBUILD_MODNAME,</div><div class='del'>-		.of_match_table = m_can_of_table,</div><div class='del'>-		.pm     = &amp;m_can_pmops,</div><div class='del'>-	},</div><div class='del'>-	.probe = m_can_plat_probe,</div><div class='del'>-	.remove = m_can_plat_remove,</div><div class='del'>-};</div><div class='add'>+	if (!m_can_class_wakeup_pinctrl_enabled(cdev))</div><div class='add'>+		pinctrl_pm_select_default_state(dev);</div><div class='add'>+</div><div class='add'>+	if (netif_running(ndev)) {</div><div class='add'>+		ret = m_can_clk_start(cdev);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		if (cdev-&gt;pm_wake_source) {</div><div class='add'>+			/* Restore active interrupts but disable coalescing as</div><div class='add'>+			 * we may have missed important waterlevel interrupts</div><div class='add'>+			 * between suspend and resume. Timers are already</div><div class='add'>+			 * stopped in suspend. Here we enable all interrupts</div><div class='add'>+			 * again.</div><div class='add'>+			 */</div><div class='add'>+			cdev-&gt;active_interrupts |= IR_RF0N | IR_TEFN;</div><div class='add'>+</div><div class='add'>+			if (cdev-&gt;ops-&gt;init)</div><div class='add'>+				ret = cdev-&gt;ops-&gt;init(cdev);</div><div class='ctx'> </div><div class='del'>-module_platform_driver(m_can_plat_driver);</div><div class='add'>+			cdev-&gt;can.state = m_can_state_get_by_psr(cdev);</div><div class='add'>+</div><div class='add'>+			m_can_write(cdev, M_CAN_IE, cdev-&gt;active_interrupts);</div><div class='add'>+		} else {</div><div class='add'>+			ret  = m_can_start(ndev);</div><div class='add'>+			if (ret) {</div><div class='add'>+				m_can_clk_stop(cdev);</div><div class='add'>+				return ret;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		netif_device_attach(ndev);</div><div class='add'>+		netif_start_queue(ndev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(m_can_class_resume);</div><div class='ctx'> </div><div class='del'>-MODULE_AUTHOR("Dong Aisheng &lt;b29396@freescale.com&gt;");</div><div class='add'>+MODULE_AUTHOR("Dong Aisheng &lt;aisheng.dong@nxp.com&gt;");</div><div class='add'>+MODULE_AUTHOR("Dan Murphy &lt;dmurphy@ti.com&gt;");</div><div class='ctx'> MODULE_LICENSE("GPL v2");</div><div class='ctx'> MODULE_DESCRIPTION("CAN bus driver for Bosch M_CAN controller");</div><div class='head'>diff --git a/drivers/net/can/m_can/m_can.h b/drivers/net/can/m_can/m_can.h<br/>new file mode 100644<br/>index 000000000000..4743342b2fba<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/m_can/m_can.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/m_can/m_can.h</a></div><div class='hunk'>@@ -0,0 +1,146 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* CAN bus driver for Bosch M_CAN controller</div><div class='add'>+ * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _CAN_M_CAN_H_</div><div class='add'>+#define _CAN_M_CAN_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/can/core.h&gt;</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/can/rx-offload.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/completion.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+#include &lt;linux/freezer.h&gt;</div><div class='add'>+#include &lt;linux/hrtimer.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/iopoll.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/phy/phy.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/consumer.h&gt;</div><div class='add'>+#include &lt;linux/pm_runtime.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='add'>+</div><div class='add'>+/* m_can lec values */</div><div class='add'>+enum m_can_lec_type {</div><div class='add'>+	LEC_NO_ERROR = 0,</div><div class='add'>+	LEC_STUFF_ERROR,</div><div class='add'>+	LEC_FORM_ERROR,</div><div class='add'>+	LEC_ACK_ERROR,</div><div class='add'>+	LEC_BIT1_ERROR,</div><div class='add'>+	LEC_BIT0_ERROR,</div><div class='add'>+	LEC_CRC_ERROR,</div><div class='add'>+	LEC_NO_CHANGE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum m_can_mram_cfg {</div><div class='add'>+	MRAM_SIDF = 0,</div><div class='add'>+	MRAM_XIDF,</div><div class='add'>+	MRAM_RXF0,</div><div class='add'>+	MRAM_RXF1,</div><div class='add'>+	MRAM_RXB,</div><div class='add'>+	MRAM_TXE,</div><div class='add'>+	MRAM_TXB,</div><div class='add'>+	MRAM_CFG_NUM,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* address offset and element number for each FIFO/Buffer in the Message RAM */</div><div class='add'>+struct mram_cfg {</div><div class='add'>+	u16 off;</div><div class='add'>+	u8  num;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct m_can_classdev;</div><div class='add'>+struct m_can_ops {</div><div class='add'>+	/* Device specific call backs */</div><div class='add'>+	int (*clear_interrupts)(struct m_can_classdev *cdev);</div><div class='add'>+	u32 (*read_reg)(struct m_can_classdev *cdev, int reg);</div><div class='add'>+	int (*write_reg)(struct m_can_classdev *cdev, int reg, int val);</div><div class='add'>+	int (*read_fifo)(struct m_can_classdev *cdev, int addr_offset, void *val, size_t val_count);</div><div class='add'>+	int (*write_fifo)(struct m_can_classdev *cdev, int addr_offset,</div><div class='add'>+			  const void *val, size_t val_count);</div><div class='add'>+	int (*init)(struct m_can_classdev *cdev);</div><div class='add'>+	int (*deinit)(struct m_can_classdev *cdev);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct m_can_tx_op {</div><div class='add'>+	struct m_can_classdev *cdev;</div><div class='add'>+	struct work_struct work;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	bool submit;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct m_can_classdev {</div><div class='add'>+	struct can_priv can;</div><div class='add'>+	struct can_rx_offload offload;</div><div class='add'>+	struct napi_struct napi;</div><div class='add'>+	struct net_device *net;</div><div class='add'>+	struct device *dev;</div><div class='add'>+	struct clk *hclk;</div><div class='add'>+	struct clk *cclk;</div><div class='add'>+	struct reset_control *rst;</div><div class='add'>+</div><div class='add'>+	struct workqueue_struct *tx_wq;</div><div class='add'>+	struct phy *transceiver;</div><div class='add'>+</div><div class='add'>+	ktime_t irq_timer_wait;</div><div class='add'>+</div><div class='add'>+	const struct m_can_ops *ops;</div><div class='add'>+</div><div class='add'>+	int version;</div><div class='add'>+	u32 irqstatus;</div><div class='add'>+</div><div class='add'>+	int pm_clock_support;</div><div class='add'>+	int pm_wake_source;</div><div class='add'>+	int is_peripheral;</div><div class='add'>+	bool irq_edge_triggered;</div><div class='add'>+</div><div class='add'>+	// Cached M_CAN_IE register content</div><div class='add'>+	u32 active_interrupts;</div><div class='add'>+	u32 rx_max_coalesced_frames_irq;</div><div class='add'>+	u32 rx_coalesce_usecs_irq;</div><div class='add'>+	u32 tx_max_coalesced_frames;</div><div class='add'>+	u32 tx_max_coalesced_frames_irq;</div><div class='add'>+	u32 tx_coalesce_usecs_irq;</div><div class='add'>+</div><div class='add'>+	// Store this internally to avoid fetch delays on peripheral chips</div><div class='add'>+	u32 tx_fifo_putidx;</div><div class='add'>+</div><div class='add'>+	/* Protects shared state between start_xmit and m_can_isr */</div><div class='add'>+	spinlock_t tx_handling_spinlock;</div><div class='add'>+	int tx_fifo_in_flight;</div><div class='add'>+</div><div class='add'>+	struct m_can_tx_op *tx_ops;</div><div class='add'>+	int tx_fifo_size;</div><div class='add'>+	int next_tx_op;</div><div class='add'>+</div><div class='add'>+	int nr_txs_without_submit;</div><div class='add'>+	/* bitfield of fifo elements that will be submitted together */</div><div class='add'>+	u32 tx_peripheral_submit;</div><div class='add'>+</div><div class='add'>+	struct mram_cfg mcfg[MRAM_CFG_NUM];</div><div class='add'>+</div><div class='add'>+	struct hrtimer hrtimer;</div><div class='add'>+</div><div class='add'>+	struct pinctrl *pinctrl;</div><div class='add'>+	struct pinctrl_state *pinctrl_state_wakeup;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct m_can_classdev *m_can_class_allocate_dev(struct device *dev, int sizeof_priv);</div><div class='add'>+void m_can_class_free_dev(struct net_device *net);</div><div class='add'>+int m_can_class_register(struct m_can_classdev *cdev);</div><div class='add'>+void m_can_class_unregister(struct m_can_classdev *cdev);</div><div class='add'>+int m_can_class_get_clocks(struct m_can_classdev *cdev);</div><div class='add'>+int m_can_check_mram_cfg(struct m_can_classdev *cdev, u32 mram_max_size);</div><div class='add'>+</div><div class='add'>+int m_can_class_suspend(struct device *dev);</div><div class='add'>+int m_can_class_resume(struct device *dev);</div><div class='add'>+#endif	/* _CAN_M_H_ */</div><div class='head'>diff --git a/drivers/net/can/m_can/m_can_pci.c b/drivers/net/can/m_can/m_can_pci.c<br/>new file mode 100644<br/>index 000000000000..eb31ed1f9644<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/m_can/m_can_pci.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/m_can/m_can_pci.c</a></div><div class='hunk'>@@ -0,0 +1,208 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * PCI Specific M_CAN Glue</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2018-2020 Intel Corporation</div><div class='add'>+ * Author: Felipe Balbi (Intel)</div><div class='add'>+ * Author: Jarkko Nikula &lt;jarkko.nikula@linux.intel.com&gt;</div><div class='add'>+ * Author: Raymond Tan &lt;raymond.tan@intel.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/pm_runtime.h&gt;</div><div class='add'>+</div><div class='add'>+#include "m_can.h"</div><div class='add'>+</div><div class='add'>+#define M_CAN_PCI_MMIO_BAR		0</div><div class='add'>+</div><div class='add'>+#define M_CAN_CLOCK_FREQ_EHL		200000000</div><div class='add'>+#define CTL_CSR_INT_CTL_OFFSET		0x508</div><div class='add'>+</div><div class='add'>+struct m_can_pci_priv {</div><div class='add'>+	struct m_can_classdev cdev;</div><div class='add'>+</div><div class='add'>+	void __iomem *base;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline struct m_can_pci_priv *cdev_to_priv(struct m_can_classdev *cdev)</div><div class='add'>+{</div><div class='add'>+	return container_of(cdev, struct m_can_pci_priv, cdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 iomap_read_reg(struct m_can_classdev *cdev, int reg)</div><div class='add'>+{</div><div class='add'>+	struct m_can_pci_priv *priv = cdev_to_priv(cdev);</div><div class='add'>+</div><div class='add'>+	return readl(priv-&gt;base + reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int iomap_read_fifo(struct m_can_classdev *cdev, int offset, void *val, size_t val_count)</div><div class='add'>+{</div><div class='add'>+	struct m_can_pci_priv *priv = cdev_to_priv(cdev);</div><div class='add'>+	void __iomem *src = priv-&gt;base + offset;</div><div class='add'>+</div><div class='add'>+	while (val_count--) {</div><div class='add'>+		*(unsigned int *)val = ioread32(src);</div><div class='add'>+		val += 4;</div><div class='add'>+		src += 4;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int iomap_write_reg(struct m_can_classdev *cdev, int reg, int val)</div><div class='add'>+{</div><div class='add'>+	struct m_can_pci_priv *priv = cdev_to_priv(cdev);</div><div class='add'>+</div><div class='add'>+	writel(val, priv-&gt;base + reg);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int iomap_write_fifo(struct m_can_classdev *cdev, int offset,</div><div class='add'>+			    const void *val, size_t val_count)</div><div class='add'>+{</div><div class='add'>+	struct m_can_pci_priv *priv = cdev_to_priv(cdev);</div><div class='add'>+	void __iomem *dst = priv-&gt;base + offset;</div><div class='add'>+</div><div class='add'>+	while (val_count--) {</div><div class='add'>+		iowrite32(*(unsigned int *)val, dst);</div><div class='add'>+		val += 4;</div><div class='add'>+		dst += 4;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct m_can_ops m_can_pci_ops = {</div><div class='add'>+	.read_reg = iomap_read_reg,</div><div class='add'>+	.write_reg = iomap_write_reg,</div><div class='add'>+	.write_fifo = iomap_write_fifo,</div><div class='add'>+	.read_fifo = iomap_read_fifo,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int m_can_pci_probe(struct pci_dev *pci, const struct pci_device_id *id)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;pci-&gt;dev;</div><div class='add'>+	struct m_can_classdev *mcan_class;</div><div class='add'>+	struct m_can_pci_priv *priv;</div><div class='add'>+	void __iomem *base;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = pcim_enable_device(pci);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	pci_set_master(pci);</div><div class='add'>+</div><div class='add'>+	ret = pcim_iomap_regions(pci, BIT(M_CAN_PCI_MMIO_BAR), pci_name(pci));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	base = pcim_iomap_table(pci)[M_CAN_PCI_MMIO_BAR];</div><div class='add'>+</div><div class='add'>+	if (!base) {</div><div class='add'>+		dev_err(dev, "failed to map BARs\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mcan_class = m_can_class_allocate_dev(&amp;pci-&gt;dev,</div><div class='add'>+					      sizeof(struct m_can_pci_priv));</div><div class='add'>+	if (IS_ERR(mcan_class))</div><div class='add'>+		return PTR_ERR(mcan_class);</div><div class='add'>+</div><div class='add'>+	priv = cdev_to_priv(mcan_class);</div><div class='add'>+</div><div class='add'>+	priv-&gt;base = base;</div><div class='add'>+</div><div class='add'>+	ret = pci_alloc_irq_vectors(pci, 1, 1, PCI_IRQ_ALL_TYPES);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err_free_dev;</div><div class='add'>+</div><div class='add'>+	mcan_class-&gt;dev = &amp;pci-&gt;dev;</div><div class='add'>+	mcan_class-&gt;net-&gt;irq = pci_irq_vector(pci, 0);</div><div class='add'>+	mcan_class-&gt;pm_clock_support = 1;</div><div class='add'>+	mcan_class-&gt;pm_wake_source = 0;</div><div class='add'>+	mcan_class-&gt;can.clock.freq = id-&gt;driver_data;</div><div class='add'>+	mcan_class-&gt;irq_edge_triggered = true;</div><div class='add'>+	mcan_class-&gt;ops = &amp;m_can_pci_ops;</div><div class='add'>+</div><div class='add'>+	pci_set_drvdata(pci, mcan_class);</div><div class='add'>+</div><div class='add'>+	ret = m_can_class_register(mcan_class);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_free_irq;</div><div class='add'>+</div><div class='add'>+	/* Enable interrupt control at CAN wrapper IP */</div><div class='add'>+	writel(0x1, base + CTL_CSR_INT_CTL_OFFSET);</div><div class='add'>+</div><div class='add'>+	pm_runtime_set_autosuspend_delay(dev, 1000);</div><div class='add'>+	pm_runtime_use_autosuspend(dev);</div><div class='add'>+	pm_runtime_put_noidle(dev);</div><div class='add'>+	pm_runtime_allow(dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_irq:</div><div class='add'>+	pci_free_irq_vectors(pci);</div><div class='add'>+err_free_dev:</div><div class='add'>+	m_can_class_free_dev(mcan_class-&gt;net);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void m_can_pci_remove(struct pci_dev *pci)</div><div class='add'>+{</div><div class='add'>+	struct m_can_classdev *mcan_class = pci_get_drvdata(pci);</div><div class='add'>+	struct m_can_pci_priv *priv = cdev_to_priv(mcan_class);</div><div class='add'>+</div><div class='add'>+	pm_runtime_forbid(&amp;pci-&gt;dev);</div><div class='add'>+	pm_runtime_get_noresume(&amp;pci-&gt;dev);</div><div class='add'>+</div><div class='add'>+	/* Disable interrupt control at CAN wrapper IP */</div><div class='add'>+	writel(0x0, priv-&gt;base + CTL_CSR_INT_CTL_OFFSET);</div><div class='add'>+</div><div class='add'>+	m_can_class_unregister(mcan_class);</div><div class='add'>+	m_can_class_free_dev(mcan_class-&gt;net);</div><div class='add'>+	pci_free_irq_vectors(pci);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __maybe_unused int m_can_pci_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	return m_can_class_suspend(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __maybe_unused int m_can_pci_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	return m_can_class_resume(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static SIMPLE_DEV_PM_OPS(m_can_pci_pm_ops,</div><div class='add'>+			 m_can_pci_suspend, m_can_pci_resume);</div><div class='add'>+</div><div class='add'>+static const struct pci_device_id m_can_pci_id_table[] = {</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x4bc1), M_CAN_CLOCK_FREQ_EHL, },</div><div class='add'>+	{ PCI_VDEVICE(INTEL, 0x4bc2), M_CAN_CLOCK_FREQ_EHL, },</div><div class='add'>+	{  }	/* Terminating Entry */</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(pci, m_can_pci_id_table);</div><div class='add'>+</div><div class='add'>+static struct pci_driver m_can_pci_driver = {</div><div class='add'>+	.name = "m_can_pci",</div><div class='add'>+	.probe = m_can_pci_probe,</div><div class='add'>+	.remove = m_can_pci_remove,</div><div class='add'>+	.id_table = m_can_pci_id_table,</div><div class='add'>+	.driver = {</div><div class='add'>+		.pm = &amp;m_can_pci_pm_ops,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_pci_driver(m_can_pci_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Felipe Balbi (Intel)");</div><div class='add'>+MODULE_AUTHOR("Jarkko Nikula &lt;jarkko.nikula@linux.intel.com&gt;");</div><div class='add'>+MODULE_AUTHOR("Raymond Tan &lt;raymond.tan@intel.com&gt;");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_DESCRIPTION("CAN bus driver for Bosch M_CAN controller on PCI bus");</div><div class='head'>diff --git a/drivers/net/can/m_can/m_can_platform.c b/drivers/net/can/m_can/m_can_platform.c<br/>new file mode 100644<br/>index 000000000000..56da411878af<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/m_can/m_can_platform.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/m_can/m_can_platform.c</a></div><div class='hunk'>@@ -0,0 +1,242 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+// IOMapped CAN bus driver for Bosch M_CAN controller</div><div class='add'>+// Copyright (C) 2014 Freescale Semiconductor, Inc.</div><div class='add'>+//	Dong Aisheng &lt;aisheng.dong@nxp.com&gt;</div><div class='add'>+//</div><div class='add'>+// Copyright (C) 2018-19 Texas Instruments Incorporated - http://www.ti.com/</div><div class='add'>+</div><div class='add'>+#include &lt;linux/hrtimer.h&gt;</div><div class='add'>+#include &lt;linux/phy/phy.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+</div><div class='add'>+#include "m_can.h"</div><div class='add'>+</div><div class='add'>+struct m_can_plat_priv {</div><div class='add'>+	struct m_can_classdev cdev;</div><div class='add'>+</div><div class='add'>+	void __iomem *base;</div><div class='add'>+	void __iomem *mram_base;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline struct m_can_plat_priv *cdev_to_priv(struct m_can_classdev *cdev)</div><div class='add'>+{</div><div class='add'>+	return container_of(cdev, struct m_can_plat_priv, cdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 iomap_read_reg(struct m_can_classdev *cdev, int reg)</div><div class='add'>+{</div><div class='add'>+	struct m_can_plat_priv *priv = cdev_to_priv(cdev);</div><div class='add'>+</div><div class='add'>+	return readl(priv-&gt;base + reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int iomap_read_fifo(struct m_can_classdev *cdev, int offset, void *val, size_t val_count)</div><div class='add'>+{</div><div class='add'>+	struct m_can_plat_priv *priv = cdev_to_priv(cdev);</div><div class='add'>+	void __iomem *src = priv-&gt;mram_base + offset;</div><div class='add'>+</div><div class='add'>+	while (val_count--) {</div><div class='add'>+		*(unsigned int *)val = ioread32(src);</div><div class='add'>+		val += 4;</div><div class='add'>+		src += 4;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int iomap_write_reg(struct m_can_classdev *cdev, int reg, int val)</div><div class='add'>+{</div><div class='add'>+	struct m_can_plat_priv *priv = cdev_to_priv(cdev);</div><div class='add'>+</div><div class='add'>+	writel(val, priv-&gt;base + reg);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int iomap_write_fifo(struct m_can_classdev *cdev, int offset,</div><div class='add'>+			    const void *val, size_t val_count)</div><div class='add'>+{</div><div class='add'>+	struct m_can_plat_priv *priv = cdev_to_priv(cdev);</div><div class='add'>+	void __iomem *dst = priv-&gt;mram_base + offset;</div><div class='add'>+</div><div class='add'>+	while (val_count--) {</div><div class='add'>+		iowrite32(*(unsigned int *)val, dst);</div><div class='add'>+		val += 4;</div><div class='add'>+		dst += 4;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct m_can_ops m_can_plat_ops = {</div><div class='add'>+	.read_reg = iomap_read_reg,</div><div class='add'>+	.write_reg = iomap_write_reg,</div><div class='add'>+	.write_fifo = iomap_write_fifo,</div><div class='add'>+	.read_fifo = iomap_read_fifo,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int m_can_plat_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct m_can_classdev *mcan_class;</div><div class='add'>+	struct m_can_plat_priv *priv;</div><div class='add'>+	struct resource *res;</div><div class='add'>+	void __iomem *addr;</div><div class='add'>+	void __iomem *mram_addr;</div><div class='add'>+	struct phy *transceiver;</div><div class='add'>+	int irq = 0, ret = 0;</div><div class='add'>+</div><div class='add'>+	mcan_class = m_can_class_allocate_dev(&amp;pdev-&gt;dev,</div><div class='add'>+					      sizeof(struct m_can_plat_priv));</div><div class='add'>+	if (IS_ERR(mcan_class))</div><div class='add'>+		return PTR_ERR(mcan_class);</div><div class='add'>+</div><div class='add'>+	priv = cdev_to_priv(mcan_class);</div><div class='add'>+</div><div class='add'>+	ret = m_can_class_get_clocks(mcan_class);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto probe_fail;</div><div class='add'>+</div><div class='add'>+	addr = devm_platform_ioremap_resource_byname(pdev, "m_can");</div><div class='add'>+	if (IS_ERR(addr)) {</div><div class='add'>+		ret = PTR_ERR(addr);</div><div class='add'>+		goto probe_fail;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (device_property_present(mcan_class-&gt;dev, "interrupts") ||</div><div class='add'>+	    device_property_present(mcan_class-&gt;dev, "interrupt-names")) {</div><div class='add'>+		irq = platform_get_irq_byname(pdev, "int0");</div><div class='add'>+		if (irq &lt; 0) {</div><div class='add'>+			ret = irq;</div><div class='add'>+			goto probe_fail;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* message ram could be shared */</div><div class='add'>+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "message_ram");</div><div class='add'>+	if (!res) {</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto probe_fail;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mram_addr = devm_ioremap(&amp;pdev-&gt;dev, res-&gt;start, resource_size(res));</div><div class='add'>+	if (!mram_addr) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto probe_fail;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	transceiver = devm_phy_optional_get(&amp;pdev-&gt;dev, NULL);</div><div class='add'>+	if (IS_ERR(transceiver)) {</div><div class='add'>+		ret = PTR_ERR(transceiver);</div><div class='add'>+		dev_err_probe(&amp;pdev-&gt;dev, ret, "failed to get phy\n");</div><div class='add'>+		goto probe_fail;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (transceiver)</div><div class='add'>+		mcan_class-&gt;can.bitrate_max = transceiver-&gt;attrs.max_link_rate;</div><div class='add'>+</div><div class='add'>+	priv-&gt;base = addr;</div><div class='add'>+	priv-&gt;mram_base = mram_addr;</div><div class='add'>+</div><div class='add'>+	mcan_class-&gt;net-&gt;irq = irq;</div><div class='add'>+	mcan_class-&gt;pm_clock_support = 1;</div><div class='add'>+	mcan_class-&gt;pm_wake_source = 0;</div><div class='add'>+	mcan_class-&gt;can.clock.freq = clk_get_rate(mcan_class-&gt;cclk);</div><div class='add'>+	mcan_class-&gt;dev = &amp;pdev-&gt;dev;</div><div class='add'>+	mcan_class-&gt;transceiver = transceiver;</div><div class='add'>+</div><div class='add'>+	mcan_class-&gt;ops = &amp;m_can_plat_ops;</div><div class='add'>+</div><div class='add'>+	mcan_class-&gt;is_peripheral = false;</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, mcan_class);</div><div class='add'>+</div><div class='add'>+	pm_runtime_enable(mcan_class-&gt;dev);</div><div class='add'>+	ret = m_can_class_register(mcan_class);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_runtime_disable;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+</div><div class='add'>+out_runtime_disable:</div><div class='add'>+	pm_runtime_disable(mcan_class-&gt;dev);</div><div class='add'>+probe_fail:</div><div class='add'>+	m_can_class_free_dev(mcan_class-&gt;net);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __maybe_unused int m_can_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	return m_can_class_suspend(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __maybe_unused int m_can_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	return m_can_class_resume(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void m_can_plat_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct m_can_plat_priv *priv = platform_get_drvdata(pdev);</div><div class='add'>+	struct m_can_classdev *mcan_class = &amp;priv-&gt;cdev;</div><div class='add'>+</div><div class='add'>+	m_can_class_unregister(mcan_class);</div><div class='add'>+	pm_runtime_disable(mcan_class-&gt;dev);</div><div class='add'>+	m_can_class_free_dev(mcan_class-&gt;net);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __maybe_unused m_can_runtime_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct m_can_plat_priv *priv = dev_get_drvdata(dev);</div><div class='add'>+	struct m_can_classdev *mcan_class = &amp;priv-&gt;cdev;</div><div class='add'>+</div><div class='add'>+	clk_disable_unprepare(mcan_class-&gt;cclk);</div><div class='add'>+	clk_disable_unprepare(mcan_class-&gt;hclk);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __maybe_unused m_can_runtime_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct m_can_plat_priv *priv = dev_get_drvdata(dev);</div><div class='add'>+	struct m_can_classdev *mcan_class = &amp;priv-&gt;cdev;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = clk_prepare_enable(mcan_class-&gt;hclk);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = clk_prepare_enable(mcan_class-&gt;cclk);</div><div class='add'>+	if (err)</div><div class='add'>+		clk_disable_unprepare(mcan_class-&gt;hclk);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct dev_pm_ops m_can_pmops = {</div><div class='add'>+	SET_RUNTIME_PM_OPS(m_can_runtime_suspend,</div><div class='add'>+			   m_can_runtime_resume, NULL)</div><div class='add'>+	SET_SYSTEM_SLEEP_PM_OPS(m_can_suspend, m_can_resume)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct of_device_id m_can_of_table[] = {</div><div class='add'>+	{ .compatible = "bosch,m_can", .data = NULL },</div><div class='add'>+	{ /* sentinel */ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, m_can_of_table);</div><div class='add'>+</div><div class='add'>+static struct platform_driver m_can_plat_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = KBUILD_MODNAME,</div><div class='add'>+		.of_match_table = m_can_of_table,</div><div class='add'>+		.pm     = &amp;m_can_pmops,</div><div class='add'>+	},</div><div class='add'>+	.probe = m_can_plat_probe,</div><div class='add'>+	.remove = m_can_plat_remove,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_platform_driver(m_can_plat_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Dong Aisheng &lt;aisheng.dong@nxp.com&gt;");</div><div class='add'>+MODULE_AUTHOR("Dan Murphy &lt;dmurphy@ti.com&gt;");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='add'>+MODULE_DESCRIPTION("M_CAN driver for IO Mapped Bosch controllers");</div><div class='head'>diff --git a/drivers/net/can/m_can/tcan4x5x-core.c b/drivers/net/can/m_can/tcan4x5x-core.c<br/>new file mode 100644<br/>index 000000000000..31cc9d0abd45<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/m_can/tcan4x5x-core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/m_can/tcan4x5x-core.c</a></div><div class='hunk'>@@ -0,0 +1,610 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+// SPI to CAN driver for the Texas Instruments TCAN4x5x</div><div class='add'>+// Copyright (C) 2018-19 Texas Instruments Incorporated - http://www.ti.com/</div><div class='add'>+</div><div class='add'>+#include "tcan4x5x.h"</div><div class='add'>+</div><div class='add'>+#define TCAN4X5X_EXT_CLK_DEF 40000000</div><div class='add'>+</div><div class='add'>+#define TCAN4X5X_DEV_ID1 0x00</div><div class='add'>+#define TCAN4X5X_DEV_ID1_TCAN 0x4e414354 /* ASCII TCAN */</div><div class='add'>+#define TCAN4X5X_DEV_ID2 0x04</div><div class='add'>+#define TCAN4X5X_REV 0x08</div><div class='add'>+#define TCAN4X5X_STATUS 0x0C</div><div class='add'>+#define TCAN4X5X_ERROR_STATUS_MASK 0x10</div><div class='add'>+#define TCAN4X5X_CONTROL 0x14</div><div class='add'>+</div><div class='add'>+#define TCAN4X5X_CONFIG 0x800</div><div class='add'>+#define TCAN4X5X_TS_PRESCALE 0x804</div><div class='add'>+#define TCAN4X5X_TEST_REG 0x808</div><div class='add'>+#define TCAN4X5X_INT_FLAGS 0x820</div><div class='add'>+#define TCAN4X5X_MCAN_INT_REG 0x824</div><div class='add'>+#define TCAN4X5X_INT_EN 0x830</div><div class='add'>+</div><div class='add'>+/* Interrupt bits */</div><div class='add'>+#define TCAN4X5X_CANBUSTERMOPEN_INT_EN BIT(30)</div><div class='add'>+#define TCAN4X5X_CANHCANL_INT_EN BIT(29)</div><div class='add'>+#define TCAN4X5X_CANHBAT_INT_EN BIT(28)</div><div class='add'>+#define TCAN4X5X_CANLGND_INT_EN BIT(27)</div><div class='add'>+#define TCAN4X5X_CANBUSOPEN_INT_EN BIT(26)</div><div class='add'>+#define TCAN4X5X_CANBUSGND_INT_EN BIT(25)</div><div class='add'>+#define TCAN4X5X_CANBUSBAT_INT_EN BIT(24)</div><div class='add'>+#define TCAN4X5X_UVSUP_INT_EN BIT(22)</div><div class='add'>+#define TCAN4X5X_UVIO_INT_EN BIT(21)</div><div class='add'>+#define TCAN4X5X_TSD_INT_EN BIT(19)</div><div class='add'>+#define TCAN4X5X_ECCERR_INT_EN BIT(16)</div><div class='add'>+#define TCAN4X5X_CANINT_INT_EN BIT(15)</div><div class='add'>+#define TCAN4X5X_LWU_INT_EN BIT(14)</div><div class='add'>+#define TCAN4X5X_CANSLNT_INT_EN BIT(10)</div><div class='add'>+#define TCAN4X5X_CANDOM_INT_EN BIT(8)</div><div class='add'>+#define TCAN4X5X_CANBUS_ERR_INT_EN BIT(5)</div><div class='add'>+#define TCAN4X5X_BUS_FAULT BIT(4)</div><div class='add'>+#define TCAN4X5X_MCAN_INT BIT(1)</div><div class='add'>+#define TCAN4X5X_ENABLE_TCAN_INT \</div><div class='add'>+	(TCAN4X5X_MCAN_INT | TCAN4X5X_BUS_FAULT | \</div><div class='add'>+	 TCAN4X5X_CANBUS_ERR_INT_EN | TCAN4X5X_CANINT_INT_EN)</div><div class='add'>+</div><div class='add'>+/* MCAN Interrupt bits */</div><div class='add'>+#define TCAN4X5X_MCAN_IR_ARA BIT(29)</div><div class='add'>+#define TCAN4X5X_MCAN_IR_PED BIT(28)</div><div class='add'>+#define TCAN4X5X_MCAN_IR_PEA BIT(27)</div><div class='add'>+#define TCAN4X5X_MCAN_IR_WD BIT(26)</div><div class='add'>+#define TCAN4X5X_MCAN_IR_BO BIT(25)</div><div class='add'>+#define TCAN4X5X_MCAN_IR_EW BIT(24)</div><div class='add'>+#define TCAN4X5X_MCAN_IR_EP BIT(23)</div><div class='add'>+#define TCAN4X5X_MCAN_IR_ELO BIT(22)</div><div class='add'>+#define TCAN4X5X_MCAN_IR_BEU BIT(21)</div><div class='add'>+#define TCAN4X5X_MCAN_IR_BEC BIT(20)</div><div class='add'>+#define TCAN4X5X_MCAN_IR_DRX BIT(19)</div><div class='add'>+#define TCAN4X5X_MCAN_IR_TOO BIT(18)</div><div class='add'>+#define TCAN4X5X_MCAN_IR_MRAF BIT(17)</div><div class='add'>+#define TCAN4X5X_MCAN_IR_TSW BIT(16)</div><div class='add'>+#define TCAN4X5X_MCAN_IR_TEFL BIT(15)</div><div class='add'>+#define TCAN4X5X_MCAN_IR_TEFF BIT(14)</div><div class='add'>+#define TCAN4X5X_MCAN_IR_TEFW BIT(13)</div><div class='add'>+#define TCAN4X5X_MCAN_IR_TEFN BIT(12)</div><div class='add'>+#define TCAN4X5X_MCAN_IR_TFE BIT(11)</div><div class='add'>+#define TCAN4X5X_MCAN_IR_TCF BIT(10)</div><div class='add'>+#define TCAN4X5X_MCAN_IR_TC BIT(9)</div><div class='add'>+#define TCAN4X5X_MCAN_IR_HPM BIT(8)</div><div class='add'>+#define TCAN4X5X_MCAN_IR_RF1L BIT(7)</div><div class='add'>+#define TCAN4X5X_MCAN_IR_RF1F BIT(6)</div><div class='add'>+#define TCAN4X5X_MCAN_IR_RF1W BIT(5)</div><div class='add'>+#define TCAN4X5X_MCAN_IR_RF1N BIT(4)</div><div class='add'>+#define TCAN4X5X_MCAN_IR_RF0L BIT(3)</div><div class='add'>+#define TCAN4X5X_MCAN_IR_RF0F BIT(2)</div><div class='add'>+#define TCAN4X5X_MCAN_IR_RF0W BIT(1)</div><div class='add'>+#define TCAN4X5X_MCAN_IR_RF0N BIT(0)</div><div class='add'>+#define TCAN4X5X_ENABLE_MCAN_INT \</div><div class='add'>+	(TCAN4X5X_MCAN_IR_TC | TCAN4X5X_MCAN_IR_RF0N | \</div><div class='add'>+	 TCAN4X5X_MCAN_IR_RF1N | TCAN4X5X_MCAN_IR_RF0F | \</div><div class='add'>+	 TCAN4X5X_MCAN_IR_RF1F)</div><div class='add'>+</div><div class='add'>+#define TCAN4X5X_MRAM_START 0x8000</div><div class='add'>+#define TCAN4X5X_MRAM_SIZE 0x800</div><div class='add'>+#define TCAN4X5X_MCAN_OFFSET 0x1000</div><div class='add'>+</div><div class='add'>+#define TCAN4X5X_CLEAR_ALL_INT 0xffffffff</div><div class='add'>+#define TCAN4X5X_SET_ALL_INT 0xffffffff</div><div class='add'>+</div><div class='add'>+#define TCAN4X5X_MODE_SEL_MASK (BIT(7) | BIT(6))</div><div class='add'>+#define TCAN4X5X_MODE_SLEEP 0x00</div><div class='add'>+#define TCAN4X5X_MODE_STANDBY BIT(6)</div><div class='add'>+#define TCAN4X5X_MODE_NORMAL BIT(7)</div><div class='add'>+</div><div class='add'>+#define TCAN4X5X_NWKRQ_VOLTAGE_VIO BIT(19)</div><div class='add'>+</div><div class='add'>+#define TCAN4X5X_DISABLE_WAKE_MSK	(BIT(31) | BIT(30))</div><div class='add'>+#define TCAN4X5X_DISABLE_INH_MSK	BIT(9)</div><div class='add'>+</div><div class='add'>+#define TCAN4X5X_SW_RESET BIT(2)</div><div class='add'>+</div><div class='add'>+#define TCAN4X5X_MCAN_CONFIGURED BIT(5)</div><div class='add'>+#define TCAN4X5X_WATCHDOG_EN BIT(3)</div><div class='add'>+#define TCAN4X5X_WD_60_MS_TIMER 0</div><div class='add'>+#define TCAN4X5X_WD_600_MS_TIMER BIT(28)</div><div class='add'>+#define TCAN4X5X_WD_3_S_TIMER BIT(29)</div><div class='add'>+#define TCAN4X5X_WD_6_S_TIMER (BIT(28) | BIT(29))</div><div class='add'>+</div><div class='add'>+struct tcan4x5x_version_info {</div><div class='add'>+	const char *name;</div><div class='add'>+	u32 id2_register;</div><div class='add'>+</div><div class='add'>+	bool has_wake_pin;</div><div class='add'>+	bool has_state_pin;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	TCAN4552 = 0,</div><div class='add'>+	TCAN4553,</div><div class='add'>+	TCAN4X5X,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct tcan4x5x_version_info tcan4x5x_versions[] = {</div><div class='add'>+	[TCAN4552] = {</div><div class='add'>+		.name = "4552",</div><div class='add'>+		.id2_register = 0x32353534,</div><div class='add'>+	},</div><div class='add'>+	[TCAN4553] = {</div><div class='add'>+		.name = "4553",</div><div class='add'>+		.id2_register = 0x33353534,</div><div class='add'>+	},</div><div class='add'>+	/* generic version with no id2_register at the end */</div><div class='add'>+	[TCAN4X5X] = {</div><div class='add'>+		.name = "generic",</div><div class='add'>+		.has_wake_pin = true,</div><div class='add'>+		.has_state_pin = true,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline struct tcan4x5x_priv *cdev_to_priv(struct m_can_classdev *cdev)</div><div class='add'>+{</div><div class='add'>+	return container_of(cdev, struct tcan4x5x_priv, cdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tcan4x5x_check_wake(struct tcan4x5x_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int wake_state = 0;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;device_state_gpio)</div><div class='add'>+		wake_state = gpiod_get_value(priv-&gt;device_state_gpio);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;device_wake_gpio &amp;&amp; wake_state) {</div><div class='add'>+		gpiod_set_value(priv-&gt;device_wake_gpio, 0);</div><div class='add'>+		usleep_range(5, 50);</div><div class='add'>+		gpiod_set_value(priv-&gt;device_wake_gpio, 1);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tcan4x5x_reset(struct tcan4x5x_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;reset_gpio) {</div><div class='add'>+		gpiod_set_value(priv-&gt;reset_gpio, 1);</div><div class='add'>+</div><div class='add'>+		/* tpulse_width minimum 30us */</div><div class='add'>+		usleep_range(30, 100);</div><div class='add'>+		gpiod_set_value(priv-&gt;reset_gpio, 0);</div><div class='add'>+	} else {</div><div class='add'>+		ret = regmap_write(priv-&gt;regmap, TCAN4X5X_CONFIG,</div><div class='add'>+				   TCAN4X5X_SW_RESET);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	usleep_range(700, 1000);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 tcan4x5x_read_reg(struct m_can_classdev *cdev, int reg)</div><div class='add'>+{</div><div class='add'>+	struct tcan4x5x_priv *priv = cdev_to_priv(cdev);</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	regmap_read(priv-&gt;regmap, TCAN4X5X_MCAN_OFFSET + reg, &amp;val);</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tcan4x5x_read_fifo(struct m_can_classdev *cdev, int addr_offset,</div><div class='add'>+			      void *val, size_t val_count)</div><div class='add'>+{</div><div class='add'>+	struct tcan4x5x_priv *priv = cdev_to_priv(cdev);</div><div class='add'>+</div><div class='add'>+	return regmap_bulk_read(priv-&gt;regmap, TCAN4X5X_MRAM_START + addr_offset, val, val_count);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tcan4x5x_write_reg(struct m_can_classdev *cdev, int reg, int val)</div><div class='add'>+{</div><div class='add'>+	struct tcan4x5x_priv *priv = cdev_to_priv(cdev);</div><div class='add'>+</div><div class='add'>+	return regmap_write(priv-&gt;regmap, TCAN4X5X_MCAN_OFFSET + reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tcan4x5x_write_fifo(struct m_can_classdev *cdev,</div><div class='add'>+			       int addr_offset, const void *val, size_t val_count)</div><div class='add'>+{</div><div class='add'>+	struct tcan4x5x_priv *priv = cdev_to_priv(cdev);</div><div class='add'>+</div><div class='add'>+	return regmap_bulk_write(priv-&gt;regmap, TCAN4X5X_MRAM_START + addr_offset, val, val_count);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tcan4x5x_power_enable(struct regulator *reg, int enable)</div><div class='add'>+{</div><div class='add'>+	if (IS_ERR_OR_NULL(reg))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (enable)</div><div class='add'>+		return regulator_enable(reg);</div><div class='add'>+	else</div><div class='add'>+		return regulator_disable(reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tcan4x5x_write_tcan_reg(struct m_can_classdev *cdev,</div><div class='add'>+				   int reg, int val)</div><div class='add'>+{</div><div class='add'>+	struct tcan4x5x_priv *priv = cdev_to_priv(cdev);</div><div class='add'>+</div><div class='add'>+	return regmap_write(priv-&gt;regmap, reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tcan4x5x_clear_interrupts(struct m_can_classdev *cdev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = tcan4x5x_write_tcan_reg(cdev, TCAN4X5X_STATUS,</div><div class='add'>+				      TCAN4X5X_CLEAR_ALL_INT);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return tcan4x5x_write_tcan_reg(cdev, TCAN4X5X_INT_FLAGS,</div><div class='add'>+				       TCAN4X5X_CLEAR_ALL_INT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tcan4x5x_init(struct m_can_classdev *cdev)</div><div class='add'>+{</div><div class='add'>+	struct tcan4x5x_priv *tcan4x5x = cdev_to_priv(cdev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	tcan4x5x_check_wake(tcan4x5x);</div><div class='add'>+</div><div class='add'>+	ret = tcan4x5x_clear_interrupts(cdev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = tcan4x5x_write_tcan_reg(cdev, TCAN4X5X_INT_EN,</div><div class='add'>+				      TCAN4X5X_ENABLE_TCAN_INT);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = tcan4x5x_write_tcan_reg(cdev, TCAN4X5X_ERROR_STATUS_MASK,</div><div class='add'>+				      TCAN4X5X_CLEAR_ALL_INT);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_update_bits(tcan4x5x-&gt;regmap, TCAN4X5X_CONFIG,</div><div class='add'>+				 TCAN4X5X_MODE_SEL_MASK, TCAN4X5X_MODE_NORMAL);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (tcan4x5x-&gt;nwkrq_voltage_vio) {</div><div class='add'>+		ret = regmap_set_bits(tcan4x5x-&gt;regmap, TCAN4X5X_CONFIG,</div><div class='add'>+				      TCAN4X5X_NWKRQ_VOLTAGE_VIO);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tcan4x5x_deinit(struct m_can_classdev *cdev)</div><div class='add'>+{</div><div class='add'>+	struct tcan4x5x_priv *tcan4x5x = cdev_to_priv(cdev);</div><div class='add'>+</div><div class='add'>+	return regmap_update_bits(tcan4x5x-&gt;regmap, TCAN4X5X_CONFIG,</div><div class='add'>+				  TCAN4X5X_MODE_SEL_MASK, TCAN4X5X_MODE_STANDBY);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int tcan4x5x_disable_wake(struct m_can_classdev *cdev)</div><div class='add'>+{</div><div class='add'>+	struct tcan4x5x_priv *tcan4x5x = cdev_to_priv(cdev);</div><div class='add'>+</div><div class='add'>+	return regmap_update_bits(tcan4x5x-&gt;regmap, TCAN4X5X_CONFIG,</div><div class='add'>+				  TCAN4X5X_DISABLE_WAKE_MSK, 0x00);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tcan4x5x_disable_state(struct m_can_classdev *cdev)</div><div class='add'>+{</div><div class='add'>+	struct tcan4x5x_priv *tcan4x5x = cdev_to_priv(cdev);</div><div class='add'>+</div><div class='add'>+	return regmap_update_bits(tcan4x5x-&gt;regmap, TCAN4X5X_CONFIG,</div><div class='add'>+				  TCAN4X5X_DISABLE_INH_MSK, 0x01);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct tcan4x5x_version_info</div><div class='add'>+*tcan4x5x_find_version(struct tcan4x5x_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_read(priv-&gt;regmap, TCAN4X5X_DEV_ID1, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ERR_PTR(ret);</div><div class='add'>+</div><div class='add'>+	if (val != TCAN4X5X_DEV_ID1_TCAN) {</div><div class='add'>+		dev_err(&amp;priv-&gt;spi-&gt;dev, "Not a tcan device %x\n", val);</div><div class='add'>+		return ERR_PTR(-ENODEV);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = regmap_read(priv-&gt;regmap, TCAN4X5X_DEV_ID2, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ERR_PTR(ret);</div><div class='add'>+</div><div class='add'>+	for (int i = 0; i != ARRAY_SIZE(tcan4x5x_versions); ++i) {</div><div class='add'>+		const struct tcan4x5x_version_info *vinfo = &amp;tcan4x5x_versions[i];</div><div class='add'>+</div><div class='add'>+		if (!vinfo-&gt;id2_register || val == vinfo-&gt;id2_register) {</div><div class='add'>+			dev_info(&amp;priv-&gt;spi-&gt;dev, "Detected TCAN device version %s\n",</div><div class='add'>+				 vinfo-&gt;name);</div><div class='add'>+			return vinfo;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return &amp;tcan4x5x_versions[TCAN4X5X];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tcan4x5x_get_dt_data(struct m_can_classdev *cdev)</div><div class='add'>+{</div><div class='add'>+	struct tcan4x5x_priv *tcan4x5x = cdev_to_priv(cdev);</div><div class='add'>+</div><div class='add'>+	tcan4x5x-&gt;nwkrq_voltage_vio =</div><div class='add'>+		of_property_read_bool(cdev-&gt;dev-&gt;of_node, "ti,nwkrq-voltage-vio");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tcan4x5x_get_gpios(struct m_can_classdev *cdev)</div><div class='add'>+{</div><div class='add'>+	struct tcan4x5x_priv *tcan4x5x = cdev_to_priv(cdev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	tcan4x5x-&gt;device_wake_gpio = devm_gpiod_get_optional(cdev-&gt;dev,</div><div class='add'>+							     "device-wake",</div><div class='add'>+							     GPIOD_OUT_HIGH);</div><div class='add'>+	if (IS_ERR(tcan4x5x-&gt;device_wake_gpio)) {</div><div class='add'>+		if (PTR_ERR(tcan4x5x-&gt;device_wake_gpio) == -EPROBE_DEFER)</div><div class='add'>+			return -EPROBE_DEFER;</div><div class='add'>+</div><div class='add'>+		tcan4x5x-&gt;device_wake_gpio = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tcan4x5x-&gt;reset_gpio = devm_gpiod_get_optional(cdev-&gt;dev, "reset",</div><div class='add'>+						       GPIOD_OUT_LOW);</div><div class='add'>+	if (IS_ERR(tcan4x5x-&gt;reset_gpio))</div><div class='add'>+		tcan4x5x-&gt;reset_gpio = NULL;</div><div class='add'>+</div><div class='add'>+	ret = tcan4x5x_reset(tcan4x5x);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	tcan4x5x-&gt;device_state_gpio = devm_gpiod_get_optional(cdev-&gt;dev,</div><div class='add'>+							      "device-state",</div><div class='add'>+							      GPIOD_IN);</div><div class='add'>+	if (IS_ERR(tcan4x5x-&gt;device_state_gpio))</div><div class='add'>+		tcan4x5x-&gt;device_state_gpio = NULL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tcan4x5x_check_gpios(struct m_can_classdev *cdev,</div><div class='add'>+				const struct tcan4x5x_version_info *version_info)</div><div class='add'>+{</div><div class='add'>+	struct tcan4x5x_priv *tcan4x5x = cdev_to_priv(cdev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (version_info-&gt;has_wake_pin &amp;&amp; !tcan4x5x-&gt;device_wake_gpio) {</div><div class='add'>+		ret = tcan4x5x_disable_wake(cdev);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (version_info-&gt;has_state_pin &amp;&amp; !tcan4x5x-&gt;device_state_gpio) {</div><div class='add'>+		ret = tcan4x5x_disable_state(cdev);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct m_can_ops tcan4x5x_ops = {</div><div class='add'>+	.init = tcan4x5x_init,</div><div class='add'>+	.deinit = tcan4x5x_deinit,</div><div class='add'>+	.read_reg = tcan4x5x_read_reg,</div><div class='add'>+	.write_reg = tcan4x5x_write_reg,</div><div class='add'>+	.write_fifo = tcan4x5x_write_fifo,</div><div class='add'>+	.read_fifo = tcan4x5x_read_fifo,</div><div class='add'>+	.clear_interrupts = tcan4x5x_clear_interrupts,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int tcan4x5x_can_probe(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+	const struct tcan4x5x_version_info *version_info;</div><div class='add'>+	struct tcan4x5x_priv *priv;</div><div class='add'>+	struct m_can_classdev *mcan_class;</div><div class='add'>+	int freq, ret;</div><div class='add'>+</div><div class='add'>+	mcan_class = m_can_class_allocate_dev(&amp;spi-&gt;dev,</div><div class='add'>+					      sizeof(struct tcan4x5x_priv));</div><div class='add'>+	if (IS_ERR(mcan_class))</div><div class='add'>+		return PTR_ERR(mcan_class);</div><div class='add'>+</div><div class='add'>+	ret = m_can_check_mram_cfg(mcan_class, TCAN4X5X_MRAM_SIZE);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_m_can_class_free_dev;</div><div class='add'>+</div><div class='add'>+	priv = cdev_to_priv(mcan_class);</div><div class='add'>+</div><div class='add'>+	priv-&gt;power = devm_regulator_get_optional(&amp;spi-&gt;dev, "vsup");</div><div class='add'>+	if (IS_ERR(priv-&gt;power)) {</div><div class='add'>+		if (PTR_ERR(priv-&gt;power) == -EPROBE_DEFER) {</div><div class='add'>+			ret = -EPROBE_DEFER;</div><div class='add'>+			goto out_m_can_class_free_dev;</div><div class='add'>+		}</div><div class='add'>+		priv-&gt;power = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mcan_class-&gt;cclk = devm_clk_get(mcan_class-&gt;dev, "cclk");</div><div class='add'>+	if (IS_ERR(mcan_class-&gt;cclk)) {</div><div class='add'>+		dev_err(&amp;spi-&gt;dev, "no CAN clock source defined\n");</div><div class='add'>+		freq = TCAN4X5X_EXT_CLK_DEF;</div><div class='add'>+	} else {</div><div class='add'>+		freq = clk_get_rate(mcan_class-&gt;cclk);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Sanity check */</div><div class='add'>+	if (freq &lt; 20000000 || freq &gt; TCAN4X5X_EXT_CLK_DEF) {</div><div class='add'>+		dev_err(&amp;spi-&gt;dev, "Clock frequency is out of supported range %d\n",</div><div class='add'>+			freq);</div><div class='add'>+		ret = -ERANGE;</div><div class='add'>+		goto out_m_can_class_free_dev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;spi = spi;</div><div class='add'>+</div><div class='add'>+	mcan_class-&gt;pm_clock_support = 0;</div><div class='add'>+	mcan_class-&gt;pm_wake_source = device_property_read_bool(&amp;spi-&gt;dev, "wakeup-source");</div><div class='add'>+	mcan_class-&gt;can.clock.freq = freq;</div><div class='add'>+	mcan_class-&gt;dev = &amp;spi-&gt;dev;</div><div class='add'>+	mcan_class-&gt;ops = &amp;tcan4x5x_ops;</div><div class='add'>+	mcan_class-&gt;is_peripheral = true;</div><div class='add'>+	mcan_class-&gt;net-&gt;irq = spi-&gt;irq;</div><div class='add'>+</div><div class='add'>+	spi_set_drvdata(spi, priv);</div><div class='add'>+</div><div class='add'>+	/* Configure the SPI bus */</div><div class='add'>+	spi-&gt;bits_per_word = 8;</div><div class='add'>+	ret = spi_setup(spi);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;spi-&gt;dev, "SPI setup failed %pe\n", ERR_PTR(ret));</div><div class='add'>+		goto out_m_can_class_free_dev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = tcan4x5x_regmap_init(priv);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;spi-&gt;dev, "regmap init failed %pe\n", ERR_PTR(ret));</div><div class='add'>+		goto out_m_can_class_free_dev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = tcan4x5x_power_enable(priv-&gt;power, 1);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;spi-&gt;dev, "Enabling regulator failed %pe\n",</div><div class='add'>+			ERR_PTR(ret));</div><div class='add'>+		goto out_m_can_class_free_dev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = tcan4x5x_get_gpios(mcan_class);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;spi-&gt;dev, "Getting gpios failed %pe\n", ERR_PTR(ret));</div><div class='add'>+		goto out_power;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	version_info = tcan4x5x_find_version(priv);</div><div class='add'>+	if (IS_ERR(version_info)) {</div><div class='add'>+		ret = PTR_ERR(version_info);</div><div class='add'>+		goto out_power;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = tcan4x5x_check_gpios(mcan_class, version_info);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;spi-&gt;dev, "Checking gpios failed %pe\n", ERR_PTR(ret));</div><div class='add'>+		goto out_power;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tcan4x5x_get_dt_data(mcan_class);</div><div class='add'>+</div><div class='add'>+	tcan4x5x_check_wake(priv);</div><div class='add'>+</div><div class='add'>+	ret = tcan4x5x_write_tcan_reg(mcan_class, TCAN4X5X_INT_EN, 0);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;spi-&gt;dev, "Disabling interrupts failed %pe\n", ERR_PTR(ret));</div><div class='add'>+		goto out_power;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = tcan4x5x_clear_interrupts(mcan_class);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;spi-&gt;dev, "Clearing interrupts failed %pe\n", ERR_PTR(ret));</div><div class='add'>+		goto out_power;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (mcan_class-&gt;pm_wake_source)</div><div class='add'>+		device_init_wakeup(&amp;spi-&gt;dev, true);</div><div class='add'>+</div><div class='add'>+	ret = m_can_class_register(mcan_class);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;spi-&gt;dev, "Failed registering m_can device %pe\n",</div><div class='add'>+			ERR_PTR(ret));</div><div class='add'>+		goto out_power;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev_info(mcan_class-&gt;net, "TCAN4X5X successfully initialized.\n");</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_power:</div><div class='add'>+	tcan4x5x_power_enable(priv-&gt;power, 0);</div><div class='add'>+ out_m_can_class_free_dev:</div><div class='add'>+	m_can_class_free_dev(mcan_class-&gt;net);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void tcan4x5x_can_remove(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+	struct tcan4x5x_priv *priv = spi_get_drvdata(spi);</div><div class='add'>+</div><div class='add'>+	m_can_class_unregister(&amp;priv-&gt;cdev);</div><div class='add'>+</div><div class='add'>+	tcan4x5x_power_enable(priv-&gt;power, 0);</div><div class='add'>+</div><div class='add'>+	m_can_class_free_dev(priv-&gt;cdev.net);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __maybe_unused tcan4x5x_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct m_can_classdev *cdev = dev_get_drvdata(dev);</div><div class='add'>+	struct spi_device *spi = to_spi_device(dev);</div><div class='add'>+</div><div class='add'>+	if (cdev-&gt;pm_wake_source)</div><div class='add'>+		enable_irq_wake(spi-&gt;irq);</div><div class='add'>+</div><div class='add'>+	return m_can_class_suspend(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __maybe_unused tcan4x5x_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct m_can_classdev *cdev = dev_get_drvdata(dev);</div><div class='add'>+	struct spi_device *spi = to_spi_device(dev);</div><div class='add'>+	int ret = m_can_class_resume(dev);</div><div class='add'>+</div><div class='add'>+	if (cdev-&gt;pm_wake_source)</div><div class='add'>+		disable_irq_wake(spi-&gt;irq);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id tcan4x5x_of_match[] = {</div><div class='add'>+	{</div><div class='add'>+		.compatible = "ti,tcan4x5x",</div><div class='add'>+	}, {</div><div class='add'>+		/* sentinel */</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, tcan4x5x_of_match);</div><div class='add'>+</div><div class='add'>+static const struct spi_device_id tcan4x5x_id_table[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "tcan4x5x",</div><div class='add'>+	}, {</div><div class='add'>+		/* sentinel */</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(spi, tcan4x5x_id_table);</div><div class='add'>+</div><div class='add'>+static const struct dev_pm_ops tcan4x5x_pm_ops = {</div><div class='add'>+	SET_SYSTEM_SLEEP_PM_OPS(tcan4x5x_suspend, tcan4x5x_resume)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spi_driver tcan4x5x_can_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = KBUILD_MODNAME,</div><div class='add'>+		.of_match_table = tcan4x5x_of_match,</div><div class='add'>+		.pm = &amp;tcan4x5x_pm_ops,</div><div class='add'>+	},</div><div class='add'>+	.id_table = tcan4x5x_id_table,</div><div class='add'>+	.probe = tcan4x5x_can_probe,</div><div class='add'>+	.remove = tcan4x5x_can_remove,</div><div class='add'>+};</div><div class='add'>+module_spi_driver(tcan4x5x_can_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Dan Murphy &lt;dmurphy@ti.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Texas Instruments TCAN4x5x CAN driver");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/net/can/m_can/tcan4x5x-regmap.c b/drivers/net/can/m_can/tcan4x5x-regmap.c<br/>new file mode 100644<br/>index 000000000000..fafa6daa67e6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/m_can/tcan4x5x-regmap.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/m_can/tcan4x5x-regmap.c</a></div><div class='hunk'>@@ -0,0 +1,165 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+//</div><div class='add'>+// tcan4x5x - Texas Instruments TCAN4x5x Family CAN controller driver</div><div class='add'>+//</div><div class='add'>+// Copyright (c) 2020 Pengutronix,</div><div class='add'>+//                    Marc Kleine-Budde &lt;kernel@pengutronix.de&gt;</div><div class='add'>+// Copyright (c) 2018-2019 Texas Instruments Incorporated</div><div class='add'>+//                    http://www.ti.com/</div><div class='add'>+</div><div class='add'>+#include "tcan4x5x.h"</div><div class='add'>+</div><div class='add'>+#define TCAN4X5X_SPI_INSTRUCTION_WRITE (0x61 &lt;&lt; 24)</div><div class='add'>+#define TCAN4X5X_SPI_INSTRUCTION_READ (0x41 &lt;&lt; 24)</div><div class='add'>+</div><div class='add'>+#define TCAN4X5X_MAX_REGISTER 0x87fc</div><div class='add'>+</div><div class='add'>+static int tcan4x5x_regmap_gather_write(void *context,</div><div class='add'>+					const void *reg, size_t reg_len,</div><div class='add'>+					const void *val, size_t val_len)</div><div class='add'>+{</div><div class='add'>+	struct spi_device *spi = context;</div><div class='add'>+	struct tcan4x5x_priv *priv = spi_get_drvdata(spi);</div><div class='add'>+	struct tcan4x5x_map_buf *buf_tx = &amp;priv-&gt;map_buf_tx;</div><div class='add'>+	struct spi_transfer xfer[] = {</div><div class='add'>+		{</div><div class='add'>+			.tx_buf = buf_tx,</div><div class='add'>+			.len = sizeof(buf_tx-&gt;cmd) + val_len,</div><div class='add'>+		},</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;buf_tx-&gt;cmd, reg, sizeof(buf_tx-&gt;cmd.cmd) +</div><div class='add'>+	       sizeof(buf_tx-&gt;cmd.addr));</div><div class='add'>+	tcan4x5x_spi_cmd_set_len(&amp;buf_tx-&gt;cmd, val_len);</div><div class='add'>+	memcpy(buf_tx-&gt;data, val, val_len);</div><div class='add'>+</div><div class='add'>+	return spi_sync_transfer(spi, xfer, ARRAY_SIZE(xfer));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tcan4x5x_regmap_write(void *context, const void *data, size_t count)</div><div class='add'>+{</div><div class='add'>+	return tcan4x5x_regmap_gather_write(context, data, sizeof(__be32),</div><div class='add'>+					    data + sizeof(__be32),</div><div class='add'>+					    count - sizeof(__be32));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int tcan4x5x_regmap_read(void *context,</div><div class='add'>+				const void *reg_buf, size_t reg_len,</div><div class='add'>+				void *val_buf, size_t val_len)</div><div class='add'>+{</div><div class='add'>+	struct spi_device *spi = context;</div><div class='add'>+	struct tcan4x5x_priv *priv = spi_get_drvdata(spi);</div><div class='add'>+	struct tcan4x5x_map_buf *buf_rx = &amp;priv-&gt;map_buf_rx;</div><div class='add'>+	struct tcan4x5x_map_buf *buf_tx = &amp;priv-&gt;map_buf_tx;</div><div class='add'>+	struct spi_transfer xfer[2] = {</div><div class='add'>+		{</div><div class='add'>+			.tx_buf = buf_tx,</div><div class='add'>+		}</div><div class='add'>+	};</div><div class='add'>+	struct spi_message msg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	spi_message_init(&amp;msg);</div><div class='add'>+	spi_message_add_tail(&amp;xfer[0], &amp;msg);</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;buf_tx-&gt;cmd, reg_buf, sizeof(buf_tx-&gt;cmd.cmd) +</div><div class='add'>+	       sizeof(buf_tx-&gt;cmd.addr));</div><div class='add'>+	tcan4x5x_spi_cmd_set_len(&amp;buf_tx-&gt;cmd, val_len);</div><div class='add'>+</div><div class='add'>+	if (spi-&gt;controller-&gt;flags &amp; SPI_CONTROLLER_HALF_DUPLEX) {</div><div class='add'>+		xfer[0].len = sizeof(buf_tx-&gt;cmd);</div><div class='add'>+</div><div class='add'>+		xfer[1].rx_buf = val_buf;</div><div class='add'>+		xfer[1].len = val_len;</div><div class='add'>+		spi_message_add_tail(&amp;xfer[1], &amp;msg);</div><div class='add'>+	} else {</div><div class='add'>+		xfer[0].rx_buf = buf_rx;</div><div class='add'>+		xfer[0].len = sizeof(buf_tx-&gt;cmd) + val_len;</div><div class='add'>+</div><div class='add'>+		if (TCAN4X5X_SANITIZE_SPI)</div><div class='add'>+			memset(buf_tx-&gt;data, 0x0, val_len);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = spi_sync(spi, &amp;msg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (!(spi-&gt;controller-&gt;flags &amp; SPI_CONTROLLER_HALF_DUPLEX))</div><div class='add'>+		memcpy(val_buf, buf_rx-&gt;data, val_len);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct regmap_range tcan4x5x_reg_table_wr_range[] = {</div><div class='add'>+	/* Device ID and SPI Registers */</div><div class='add'>+	regmap_reg_range(0x000c, 0x0010),</div><div class='add'>+	/* Device configuration registers and Interrupt Flags*/</div><div class='add'>+	regmap_reg_range(0x0800, 0x080c),</div><div class='add'>+	regmap_reg_range(0x0820, 0x0820),</div><div class='add'>+	regmap_reg_range(0x0830, 0x0830),</div><div class='add'>+	/* M_CAN */</div><div class='add'>+	regmap_reg_range(0x100c, 0x102c),</div><div class='add'>+	regmap_reg_range(0x1048, 0x1048),</div><div class='add'>+	regmap_reg_range(0x1050, 0x105c),</div><div class='add'>+	regmap_reg_range(0x1080, 0x1088),</div><div class='add'>+	regmap_reg_range(0x1090, 0x1090),</div><div class='add'>+	regmap_reg_range(0x1098, 0x10a0),</div><div class='add'>+	regmap_reg_range(0x10a8, 0x10b0),</div><div class='add'>+	regmap_reg_range(0x10b8, 0x10c0),</div><div class='add'>+	regmap_reg_range(0x10c8, 0x10c8),</div><div class='add'>+	regmap_reg_range(0x10d0, 0x10d4),</div><div class='add'>+	regmap_reg_range(0x10e0, 0x10e4),</div><div class='add'>+	regmap_reg_range(0x10f0, 0x10f0),</div><div class='add'>+	regmap_reg_range(0x10f8, 0x10f8),</div><div class='add'>+	/* MRAM */</div><div class='add'>+	regmap_reg_range(0x8000, 0x87fc),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_range tcan4x5x_reg_table_rd_range[] = {</div><div class='add'>+	regmap_reg_range(0x0000, 0x0010),	/* Device ID and SPI Registers */</div><div class='add'>+	regmap_reg_range(0x0800, 0x0830),	/* Device configuration registers and Interrupt Flags*/</div><div class='add'>+	regmap_reg_range(0x1000, 0x10fc),	/* M_CAN */</div><div class='add'>+	regmap_reg_range(0x8000, 0x87fc),	/* MRAM */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_access_table tcan4x5x_reg_table_wr = {</div><div class='add'>+	.yes_ranges = tcan4x5x_reg_table_wr_range,</div><div class='add'>+	.n_yes_ranges = ARRAY_SIZE(tcan4x5x_reg_table_wr_range),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_access_table tcan4x5x_reg_table_rd = {</div><div class='add'>+	.yes_ranges = tcan4x5x_reg_table_rd_range,</div><div class='add'>+	.n_yes_ranges = ARRAY_SIZE(tcan4x5x_reg_table_rd_range),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_config tcan4x5x_regmap = {</div><div class='add'>+	.reg_bits = 24,</div><div class='add'>+	.reg_stride = 4,</div><div class='add'>+	.pad_bits = 8,</div><div class='add'>+	.val_bits = 32,</div><div class='add'>+	.wr_table = &amp;tcan4x5x_reg_table_wr,</div><div class='add'>+	.rd_table = &amp;tcan4x5x_reg_table_rd,</div><div class='add'>+	.max_register = TCAN4X5X_MAX_REGISTER,</div><div class='add'>+	.cache_type = REGCACHE_NONE,</div><div class='add'>+	.read_flag_mask = (__force unsigned long)</div><div class='add'>+		cpu_to_be32(TCAN4X5X_SPI_INSTRUCTION_READ),</div><div class='add'>+	.write_flag_mask = (__force unsigned long)</div><div class='add'>+		cpu_to_be32(TCAN4X5X_SPI_INSTRUCTION_WRITE),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_bus tcan4x5x_bus = {</div><div class='add'>+	.write = tcan4x5x_regmap_write,</div><div class='add'>+	.gather_write = tcan4x5x_regmap_gather_write,</div><div class='add'>+	.read = tcan4x5x_regmap_read,</div><div class='add'>+	.reg_format_endian_default = REGMAP_ENDIAN_BIG,</div><div class='add'>+	.val_format_endian_default = REGMAP_ENDIAN_BIG,</div><div class='add'>+	.max_raw_read = 256,</div><div class='add'>+	.max_raw_write = 256,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int tcan4x5x_regmap_init(struct tcan4x5x_priv *priv)</div><div class='add'>+{</div><div class='add'>+	priv-&gt;regmap = devm_regmap_init(&amp;priv-&gt;spi-&gt;dev, &amp;tcan4x5x_bus,</div><div class='add'>+					priv-&gt;spi, &amp;tcan4x5x_regmap);</div><div class='add'>+	return PTR_ERR_OR_ZERO(priv-&gt;regmap);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/can/m_can/tcan4x5x.h b/drivers/net/can/m_can/tcan4x5x.h<br/>new file mode 100644<br/>index 000000000000..203399d5e8cc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/m_can/tcan4x5x.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/m_can/tcan4x5x.h</a></div><div class='hunk'>@@ -0,0 +1,58 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0</div><div class='add'>+ *</div><div class='add'>+ * tcan4x5x - Texas Instruments TCAN4x5x Family CAN controller driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2020 Pengutronix,</div><div class='add'>+ *                    Marc Kleine-Budde &lt;kernel@pengutronix.de&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _TCAN4X5X_H</div><div class='add'>+#define _TCAN4X5X_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/gpio/consumer.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;linux/regulator/consumer.h&gt;</div><div class='add'>+#include &lt;linux/spi/spi.h&gt;</div><div class='add'>+</div><div class='add'>+#include "m_can.h"</div><div class='add'>+</div><div class='add'>+#define TCAN4X5X_SANITIZE_SPI 1</div><div class='add'>+</div><div class='add'>+struct __packed tcan4x5x_buf_cmd {</div><div class='add'>+	u8 cmd;</div><div class='add'>+	__be16 addr;</div><div class='add'>+	u8 len;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct tcan4x5x_map_buf {</div><div class='add'>+	struct tcan4x5x_buf_cmd cmd;</div><div class='add'>+	u8 data[256 * sizeof(u32)];</div><div class='add'>+} ____cacheline_aligned;</div><div class='add'>+</div><div class='add'>+struct tcan4x5x_priv {</div><div class='add'>+	struct m_can_classdev cdev;</div><div class='add'>+</div><div class='add'>+	struct regmap *regmap;</div><div class='add'>+	struct spi_device *spi;</div><div class='add'>+</div><div class='add'>+	struct gpio_desc *reset_gpio;</div><div class='add'>+	struct gpio_desc *device_wake_gpio;</div><div class='add'>+	struct gpio_desc *device_state_gpio;</div><div class='add'>+	struct regulator *power;</div><div class='add'>+</div><div class='add'>+	struct tcan4x5x_map_buf map_buf_rx;</div><div class='add'>+	struct tcan4x5x_map_buf map_buf_tx;</div><div class='add'>+</div><div class='add'>+	bool nwkrq_voltage_vio;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+tcan4x5x_spi_cmd_set_len(struct tcan4x5x_buf_cmd *cmd, u8 len)</div><div class='add'>+{</div><div class='add'>+	/* number of u32 */</div><div class='add'>+	cmd-&gt;len = len &gt;&gt; 2;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int tcan4x5x_regmap_init(struct tcan4x5x_priv *priv);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/can/mscan/Kconfig b/drivers/net/can/mscan/Kconfig<br/>index 81c711719490..dfe6bd9947bb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/mscan/Kconfig?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/mscan/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/mscan/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/mscan/Kconfig</a></div><div class='hunk'>@@ -1,7 +1,8 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> config CAN_MSCAN</div><div class='ctx'> 	depends on PPC</div><div class='ctx'> 	tristate "Support for Freescale MSCAN based chips"</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  The Motorola Scalable Controller Area Network (MSCAN) definition</div><div class='ctx'> 	  is based on the MSCAN12 definition which is the specific</div><div class='ctx'> 	  implementation of the Motorola Scalable CAN concept targeted for</div><div class='hunk'>@@ -12,7 +13,7 @@ if CAN_MSCAN</div><div class='ctx'> config CAN_MPC5XXX</div><div class='ctx'> 	tristate "Freescale MPC5xxx onboard CAN controller"</div><div class='ctx'> 	depends on (PPC_MPC52xx || PPC_MPC512x)</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  If you say yes here you get support for Freescale's MPC5xxx</div><div class='ctx'> 	  onboard CAN controller. Currently, the MPC5200, MPC5200B and</div><div class='ctx'> 	  MPC5121 (Rev. 2 and later) are supported.</div><div class='head'>diff --git a/drivers/net/can/mscan/Makefile b/drivers/net/can/mscan/Makefile<br/>index 58903b45f5fb..6c114bed439f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/mscan/Makefile?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/mscan/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/mscan/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/mscan/Makefile</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_CAN_MPC5XXX)	+= mscan-mpc5xxx.o</div><div class='ctx'> mscan-mpc5xxx-objs		:= mscan.o mpc5xxx_can.o</div><div class='head'>diff --git a/drivers/net/can/mscan/mpc5xxx_can.c b/drivers/net/can/mscan/mpc5xxx_can.c<br/>index c7427bdd3a4b..0080c39ee182 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/mscan/mpc5xxx_can.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/mscan/mpc5xxx_can.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/mscan/mpc5xxx_can.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/mscan/mpc5xxx_can.c</a></div><div class='hunk'>@@ -1,30 +1,23 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='ctx'>  * CAN bus driver for the Freescale MPC5xxx embedded CPU.</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2004-2005 Andrey Volkov &lt;avolkov@varma-el.com&gt;,</div><div class='ctx'>  *                         Varma Electronics Oy</div><div class='ctx'>  * Copyright (C) 2008-2009 Wolfgang Grandegger &lt;wg@grandegger.com&gt;</div><div class='del'>- * Copyright (C) 2009 Wolfram Sang, Pengutronix &lt;w.sang@pengutronix.de&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the version 2 of the GNU General Public License</div><div class='del'>- * as published by the Free Software Foundation</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='add'>+ * Copyright (C) 2009 Wolfram Sang, Pengutronix &lt;kernel@pengutronix.de&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/property.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_address.h&gt;</div><div class='add'>+#include &lt;linux/of_irq.h&gt;</div><div class='ctx'> #include &lt;linux/of_platform.h&gt;</div><div class='ctx'> #include &lt;sysdev/fsl_soc.h&gt;</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='hunk'>@@ -72,7 +65,7 @@ static u32 mpc52xx_can_get_clock(struct platform_device *ofdev,</div><div class='ctx'> 	else</div><div class='ctx'> 		*mscan_clksrc = MSCAN_CLKSRC_XTAL;</div><div class='ctx'> </div><div class='del'>-	freq = mpc5xxx_get_bus_frequency(ofdev-&gt;dev.of_node);</div><div class='add'>+	freq = mpc5xxx_get_bus_frequency(&amp;ofdev-&gt;dev);</div><div class='ctx'> 	if (!freq)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -86,6 +79,11 @@ static u32 mpc52xx_can_get_clock(struct platform_device *ofdev,</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> 	cdm = of_iomap(np_cdm, 0);</div><div class='add'>+	if (!cdm) {</div><div class='add'>+		of_node_put(np_cdm);</div><div class='add'>+		dev_err(&amp;ofdev-&gt;dev, "can't map clock node!\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (in_8(&amp;cdm-&gt;ipb_clk_sel) &amp; 0x1)</div><div class='ctx'> 		freq *= 2;</div><div class='hunk'>@@ -285,7 +283,6 @@ static u32 mpc512x_can_get_clock(struct platform_device *ofdev,</div><div class='ctx'> static const struct of_device_id mpc5xxx_can_table[];</div><div class='ctx'> static int mpc5xxx_can_probe(struct platform_device *ofdev)</div><div class='ctx'> {</div><div class='del'>-	const struct of_device_id *match;</div><div class='ctx'> 	const struct mpc5xxx_can_data *data;</div><div class='ctx'> 	struct device_node *np = ofdev-&gt;dev.of_node;</div><div class='ctx'> 	struct net_device *dev;</div><div class='hunk'>@@ -295,16 +292,13 @@ static int mpc5xxx_can_probe(struct platform_device *ofdev)</div><div class='ctx'> 	int irq, mscan_clksrc = 0;</div><div class='ctx'> 	int err = -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	match = of_match_device(mpc5xxx_can_table, &amp;ofdev-&gt;dev);</div><div class='del'>-	if (!match)</div><div class='add'>+	data = device_get_match_data(&amp;ofdev-&gt;dev);</div><div class='add'>+	if (!data)</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-	data = match-&gt;data;</div><div class='ctx'> </div><div class='ctx'> 	base = of_iomap(np, 0);</div><div class='del'>-	if (!base) {</div><div class='del'>-		dev_err(&amp;ofdev-&gt;dev, "couldn't ioremap\n");</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='add'>+	if (!base)</div><div class='add'>+		return dev_err_probe(&amp;ofdev-&gt;dev, err, "couldn't ioremap\n");</div><div class='ctx'> </div><div class='ctx'> 	irq = irq_of_parse_and_map(np, 0);</div><div class='ctx'> 	if (!irq) {</div><div class='hunk'>@@ -325,20 +319,19 @@ static int mpc5xxx_can_probe(struct platform_device *ofdev)</div><div class='ctx'> </div><div class='ctx'> 	clock_name = of_get_property(np, "fsl,mscan-clock-source", NULL);</div><div class='ctx'> </div><div class='del'>-	BUG_ON(!data);</div><div class='ctx'> 	priv-&gt;type = data-&gt;type;</div><div class='ctx'> 	priv-&gt;can.clock.freq = data-&gt;get_clock(ofdev, clock_name,</div><div class='ctx'> 					       &amp;mscan_clksrc);</div><div class='ctx'> 	if (!priv-&gt;can.clock.freq) {</div><div class='ctx'> 		dev_err(&amp;ofdev-&gt;dev, "couldn't get MSCAN clock properties\n");</div><div class='del'>-		goto exit_free_mscan;</div><div class='add'>+		goto exit_put_clock;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	err = register_mscandev(dev, mscan_clksrc);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(&amp;ofdev-&gt;dev, "registering %s failed (err=%d)\n",</div><div class='ctx'> 			DRV_NAME, err);</div><div class='del'>-		goto exit_free_mscan;</div><div class='add'>+		goto exit_put_clock;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dev_info(&amp;ofdev-&gt;dev, "MSCAN at 0x%p, irq %d, clock %d Hz\n",</div><div class='hunk'>@@ -346,7 +339,9 @@ static int mpc5xxx_can_probe(struct platform_device *ofdev)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-exit_free_mscan:</div><div class='add'>+exit_put_clock:</div><div class='add'>+	if (data-&gt;put_clock)</div><div class='add'>+		data-&gt;put_clock(ofdev);</div><div class='ctx'> 	free_candev(dev);</div><div class='ctx'> exit_dispose_irq:</div><div class='ctx'> 	irq_dispose_mapping(irq);</div><div class='hunk'>@@ -356,15 +351,13 @@ exit_unmap_mem:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mpc5xxx_can_remove(struct platform_device *ofdev)</div><div class='add'>+static void mpc5xxx_can_remove(struct platform_device *ofdev)</div><div class='ctx'> {</div><div class='del'>-	const struct of_device_id *match;</div><div class='ctx'> 	const struct mpc5xxx_can_data *data;</div><div class='ctx'> 	struct net_device *dev = platform_get_drvdata(ofdev);</div><div class='ctx'> 	struct mscan_priv *priv = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	match = of_match_device(mpc5xxx_can_table, &amp;ofdev-&gt;dev);</div><div class='del'>-	data = match ? match-&gt;data : NULL;</div><div class='add'>+	data = device_get_match_data(&amp;ofdev-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	unregister_mscandev(dev);</div><div class='ctx'> 	if (data &amp;&amp; data-&gt;put_clock)</div><div class='hunk'>@@ -372,8 +365,6 @@ static int mpc5xxx_can_remove(struct platform_device *ofdev)</div><div class='ctx'> 	iounmap(priv-&gt;reg_base);</div><div class='ctx'> 	irq_dispose_mapping(dev-&gt;irq);</div><div class='ctx'> 	free_candev(dev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PM</div><div class='head'>diff --git a/drivers/net/can/mscan/mscan.c b/drivers/net/can/mscan/mscan.c<br/>index e36b7400d5cc..39c7aa2a0b2f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/mscan/mscan.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/mscan/mscan.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/mscan/mscan.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/mscan/mscan.c</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='ctx'>  * CAN bus driver for the alone generic (as possible as) MSCAN controller.</div><div class='ctx'>  *</div><div class='hunk'>@@ -5,18 +6,6 @@</div><div class='ctx'>  *                         Varma Electronics Oy</div><div class='ctx'>  * Copyright (C) 2008-2009 Wolfgang Grandegger &lt;wg@grandegger.com&gt;</div><div class='ctx'>  * Copyright (C) 2008-2009 Pengutronix &lt;kernel@pengutronix.de&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the version 2 of the GNU General Public License</div><div class='del'>- * as published by the Free Software Foundation</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='hunk'>@@ -45,12 +34,6 @@ static const struct can_bittiming_const mscan_bittiming_const = {</div><div class='ctx'> 	.brp_inc = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct mscan_state {</div><div class='del'>-	u8 mode;</div><div class='del'>-	u8 canrier;</div><div class='del'>-	u8 cantier;</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static enum can_state state_map[] = {</div><div class='ctx'> 	CAN_STATE_ERROR_ACTIVE,</div><div class='ctx'> 	CAN_STATE_ERROR_WARNING,</div><div class='hunk'>@@ -202,7 +185,7 @@ static netdev_tx_t mscan_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	int i, rtr, buf_id;</div><div class='ctx'> 	u32 can_id;</div><div class='ctx'> </div><div class='del'>-	if (can_dropped_invalid_skb(dev, skb))</div><div class='add'>+	if (can_dev_dropped_skb(dev, skb))</div><div class='ctx'> 		return NETDEV_TX_OK;</div><div class='ctx'> </div><div class='ctx'> 	out_8(&amp;regs-&gt;cantier, 0);</div><div class='hunk'>@@ -220,6 +203,7 @@ static netdev_tx_t mscan_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 		 * since buffer with lower id have higher priority (hell..)</div><div class='ctx'> 		 */</div><div class='ctx'> 		netif_stop_queue(dev);</div><div class='add'>+		fallthrough;</div><div class='ctx'> 	case 2:</div><div class='ctx'> 		if (buf_id &lt; priv-&gt;prev_buf_id) {</div><div class='ctx'> 			priv-&gt;cur_pri++;</div><div class='hunk'>@@ -260,27 +244,27 @@ static netdev_tx_t mscan_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 		void __iomem *data = &amp;regs-&gt;tx.dsr1_0;</div><div class='ctx'> 		u16 *payload = (u16 *)frame-&gt;data;</div><div class='ctx'> </div><div class='del'>-		for (i = 0; i &lt; frame-&gt;can_dlc / 2; i++) {</div><div class='add'>+		for (i = 0; i &lt; frame-&gt;len / 2; i++) {</div><div class='ctx'> 			out_be16(data, *payload++);</div><div class='ctx'> 			data += 2 + _MSCAN_RESERVED_DSR_SIZE;</div><div class='ctx'> 		}</div><div class='ctx'> 		/* write remaining byte if necessary */</div><div class='del'>-		if (frame-&gt;can_dlc &amp; 1)</div><div class='del'>-			out_8(data, frame-&gt;data[frame-&gt;can_dlc - 1]);</div><div class='add'>+		if (frame-&gt;len &amp; 1)</div><div class='add'>+			out_8(data, frame-&gt;data[frame-&gt;len - 1]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	out_8(&amp;regs-&gt;tx.dlr, frame-&gt;can_dlc);</div><div class='add'>+	out_8(&amp;regs-&gt;tx.dlr, frame-&gt;len);</div><div class='ctx'> 	out_8(&amp;regs-&gt;tx.tbpr, priv-&gt;cur_pri);</div><div class='ctx'> </div><div class='ctx'> 	/* Start transmission. */</div><div class='ctx'> 	out_8(&amp;regs-&gt;cantflg, 1 &lt;&lt; buf_id);</div><div class='ctx'> </div><div class='ctx'> 	if (!test_bit(F_TX_PROGRESS, &amp;priv-&gt;flags))</div><div class='del'>-		dev-&gt;trans_start = jiffies;</div><div class='add'>+		netif_trans_update(dev);</div><div class='ctx'> </div><div class='ctx'> 	list_add_tail(&amp;priv-&gt;tx_queue[buf_id].list, &amp;priv-&gt;tx_head);</div><div class='ctx'> </div><div class='del'>-	can_put_echo_skb(skb, dev, buf_id);</div><div class='add'>+	can_put_echo_skb(skb, dev, buf_id, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable interrupt. */</div><div class='ctx'> 	priv-&gt;tx_active |= 1 &lt;&lt; buf_id;</div><div class='hunk'>@@ -322,19 +306,19 @@ static void mscan_get_rx_frame(struct net_device *dev, struct can_frame *frame)</div><div class='ctx'> 	if (can_id &amp; 1)</div><div class='ctx'> 		frame-&gt;can_id |= CAN_RTR_FLAG;</div><div class='ctx'> </div><div class='del'>-	frame-&gt;can_dlc = get_can_dlc(in_8(&amp;regs-&gt;rx.dlr) &amp; 0xf);</div><div class='add'>+	frame-&gt;len = can_cc_dlc2len(in_8(&amp;regs-&gt;rx.dlr) &amp; 0xf);</div><div class='ctx'> </div><div class='ctx'> 	if (!(frame-&gt;can_id &amp; CAN_RTR_FLAG)) {</div><div class='ctx'> 		void __iomem *data = &amp;regs-&gt;rx.dsr1_0;</div><div class='ctx'> 		u16 *payload = (u16 *)frame-&gt;data;</div><div class='ctx'> </div><div class='del'>-		for (i = 0; i &lt; frame-&gt;can_dlc / 2; i++) {</div><div class='add'>+		for (i = 0; i &lt; frame-&gt;len / 2; i++) {</div><div class='ctx'> 			*payload++ = in_be16(data);</div><div class='ctx'> 			data += 2 + _MSCAN_RESERVED_DSR_SIZE;</div><div class='ctx'> 		}</div><div class='ctx'> 		/* read remaining byte if necessary */</div><div class='del'>-		if (frame-&gt;can_dlc &amp; 1)</div><div class='del'>-			frame-&gt;data[frame-&gt;can_dlc - 1] = in_8(data);</div><div class='add'>+		if (frame-&gt;len &amp; 1)</div><div class='add'>+			frame-&gt;data[frame-&gt;len - 1] = in_8(data);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	out_8(&amp;regs-&gt;canrflg, MSCAN_RXF);</div><div class='hunk'>@@ -382,7 +366,7 @@ static void mscan_get_err_frame(struct net_device *dev, struct can_frame *frame,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	priv-&gt;shadow_statflg = canrflg &amp; MSCAN_STAT_MSK;</div><div class='del'>-	frame-&gt;can_dlc = CAN_ERR_DLC;</div><div class='add'>+	frame-&gt;len = CAN_ERR_DLC;</div><div class='ctx'> 	out_8(&amp;regs-&gt;canrflg, MSCAN_ERR_IF);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -392,13 +376,12 @@ static int mscan_rx_poll(struct napi_struct *napi, int quota)</div><div class='ctx'> 	struct net_device *dev = napi-&gt;dev;</div><div class='ctx'> 	struct mscan_regs __iomem *regs = priv-&gt;reg_base;</div><div class='ctx'> 	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='del'>-	int npackets = 0;</div><div class='del'>-	int ret = 1;</div><div class='add'>+	int work_done = 0;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	struct can_frame *frame;</div><div class='ctx'> 	u8 canrflg;</div><div class='ctx'> </div><div class='del'>-	while (npackets &lt; quota) {</div><div class='add'>+	while (work_done &lt; quota) {</div><div class='ctx'> 		canrflg = in_8(&amp;regs-&gt;canrflg);</div><div class='ctx'> 		if (!(canrflg &amp; (MSCAN_RXF | MSCAN_ERR_IF)))</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -412,25 +395,27 @@ static int mscan_rx_poll(struct napi_struct *napi, int quota)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (canrflg &amp; MSCAN_RXF)</div><div class='add'>+		if (canrflg &amp; MSCAN_RXF) {</div><div class='ctx'> 			mscan_get_rx_frame(dev, frame);</div><div class='del'>-		else if (canrflg &amp; MSCAN_ERR_IF)</div><div class='add'>+			stats-&gt;rx_packets++;</div><div class='add'>+			if (!(frame-&gt;can_id &amp; CAN_RTR_FLAG))</div><div class='add'>+				stats-&gt;rx_bytes += frame-&gt;len;</div><div class='add'>+		} else if (canrflg &amp; MSCAN_ERR_IF) {</div><div class='ctx'> 			mscan_get_err_frame(dev, frame, canrflg);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-		stats-&gt;rx_packets++;</div><div class='del'>-		stats-&gt;rx_bytes += frame-&gt;can_dlc;</div><div class='del'>-		npackets++;</div><div class='add'>+		work_done++;</div><div class='ctx'> 		netif_receive_skb(skb);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!(in_8(&amp;regs-&gt;canrflg) &amp; (MSCAN_RXF | MSCAN_ERR_IF))) {</div><div class='del'>-		napi_complete(&amp;priv-&gt;napi);</div><div class='del'>-		clear_bit(F_RX_PROGRESS, &amp;priv-&gt;flags);</div><div class='del'>-		if (priv-&gt;can.state &lt; CAN_STATE_BUS_OFF)</div><div class='del'>-			out_8(&amp;regs-&gt;canrier, priv-&gt;shadow_canrier);</div><div class='del'>-		ret = 0;</div><div class='add'>+	if (work_done &lt; quota) {</div><div class='add'>+		if (likely(napi_complete_done(&amp;priv-&gt;napi, work_done))) {</div><div class='add'>+			clear_bit(F_RX_PROGRESS, &amp;priv-&gt;flags);</div><div class='add'>+			if (priv-&gt;can.state &lt; CAN_STATE_BUS_OFF)</div><div class='add'>+				out_8(&amp;regs-&gt;canrier, priv-&gt;shadow_canrier);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='del'>-	return ret;</div><div class='add'>+	return work_done;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static irqreturn_t mscan_isr(int irq, void *dev_id)</div><div class='hunk'>@@ -457,9 +442,9 @@ static irqreturn_t mscan_isr(int irq, void *dev_id)</div><div class='ctx'> 				continue;</div><div class='ctx'> </div><div class='ctx'> 			out_8(&amp;regs-&gt;cantbsel, mask);</div><div class='del'>-			stats-&gt;tx_bytes += in_8(&amp;regs-&gt;tx.dlr);</div><div class='add'>+			stats-&gt;tx_bytes += can_get_echo_skb(dev, entry-&gt;id,</div><div class='add'>+							    NULL);</div><div class='ctx'> 			stats-&gt;tx_packets++;</div><div class='del'>-			can_get_echo_skb(dev, entry-&gt;id);</div><div class='ctx'> 			priv-&gt;tx_active &amp;= ~mask;</div><div class='ctx'> 			list_del(pos);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -469,7 +454,7 @@ static irqreturn_t mscan_isr(int irq, void *dev_id)</div><div class='ctx'> 			clear_bit(F_TX_PROGRESS, &amp;priv-&gt;flags);</div><div class='ctx'> 			priv-&gt;cur_pri = 0;</div><div class='ctx'> 		} else {</div><div class='del'>-			dev-&gt;trans_start = jiffies;</div><div class='add'>+			netif_trans_update(dev);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (!test_bit(F_TX_WAIT_ALL, &amp;priv-&gt;flags))</div><div class='hunk'>@@ -552,16 +537,12 @@ static int mscan_open(struct net_device *dev)</div><div class='ctx'> 	struct mscan_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	struct mscan_regs __iomem *regs = priv-&gt;reg_base;</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;clk_ipg) {</div><div class='del'>-		ret = clk_prepare_enable(priv-&gt;clk_ipg);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto exit_retcode;</div><div class='del'>-	}</div><div class='del'>-	if (priv-&gt;clk_can) {</div><div class='del'>-		ret = clk_prepare_enable(priv-&gt;clk_can);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto exit_dis_ipg_clock;</div><div class='del'>-	}</div><div class='add'>+	ret = clk_prepare_enable(priv-&gt;clk_ipg);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto exit_retcode;</div><div class='add'>+	ret = clk_prepare_enable(priv-&gt;clk_can);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto exit_dis_ipg_clock;</div><div class='ctx'> </div><div class='ctx'> 	/* common open */</div><div class='ctx'> 	ret = open_candev(dev);</div><div class='hunk'>@@ -595,11 +576,9 @@ exit_napi_disable:</div><div class='ctx'> 	napi_disable(&amp;priv-&gt;napi);</div><div class='ctx'> 	close_candev(dev);</div><div class='ctx'> exit_dis_can_clock:</div><div class='del'>-	if (priv-&gt;clk_can)</div><div class='del'>-		clk_disable_unprepare(priv-&gt;clk_can);</div><div class='add'>+	clk_disable_unprepare(priv-&gt;clk_can);</div><div class='ctx'> exit_dis_ipg_clock:</div><div class='del'>-	if (priv-&gt;clk_ipg)</div><div class='del'>-		clk_disable_unprepare(priv-&gt;clk_ipg);</div><div class='add'>+	clk_disable_unprepare(priv-&gt;clk_ipg);</div><div class='ctx'> exit_retcode:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -618,10 +597,8 @@ static int mscan_close(struct net_device *dev)</div><div class='ctx'> 	close_candev(dev);</div><div class='ctx'> 	free_irq(dev-&gt;irq, dev);</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;clk_can)</div><div class='del'>-		clk_disable_unprepare(priv-&gt;clk_can);</div><div class='del'>-	if (priv-&gt;clk_ipg)</div><div class='del'>-		clk_disable_unprepare(priv-&gt;clk_ipg);</div><div class='add'>+	clk_disable_unprepare(priv-&gt;clk_can);</div><div class='add'>+	clk_disable_unprepare(priv-&gt;clk_ipg);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -630,7 +607,10 @@ static const struct net_device_ops mscan_netdev_ops = {</div><div class='ctx'> 	.ndo_open	= mscan_open,</div><div class='ctx'> 	.ndo_stop	= mscan_close,</div><div class='ctx'> 	.ndo_start_xmit	= mscan_start_xmit,</div><div class='del'>-	.ndo_change_mtu	= can_change_mtu,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops mscan_ethtool_ops = {</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int register_mscandev(struct net_device *dev, int mscan_clksrc)</div><div class='hunk'>@@ -693,10 +673,11 @@ struct net_device *alloc_mscandev(void)</div><div class='ctx'> 	priv = netdev_priv(dev);</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;netdev_ops = &amp;mscan_netdev_ops;</div><div class='add'>+	dev-&gt;ethtool_ops = &amp;mscan_ethtool_ops;</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;flags |= IFF_ECHO;	/* we support local echo */</div><div class='ctx'> </div><div class='del'>-	netif_napi_add(dev, &amp;priv-&gt;napi, mscan_rx_poll, 8);</div><div class='add'>+	netif_napi_add_weight(dev, &amp;priv-&gt;napi, mscan_rx_poll, 8);</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;can.bittiming_const = &amp;mscan_bittiming_const;</div><div class='ctx'> 	priv-&gt;can.do_set_bittiming = mscan_do_set_bittiming;</div><div class='head'>diff --git a/drivers/net/can/mscan/mscan.h b/drivers/net/can/mscan/mscan.h<br/>index ad8e08f9c496..25639a5e1ca9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/mscan/mscan.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/mscan/mscan.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/mscan/mscan.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/mscan/mscan.h</a></div><div class='hunk'>@@ -1,20 +1,9 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='ctx'> /*</div><div class='ctx'>  * Definitions of consts/structs to drive the Freescale MSCAN.</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2005-2006 Andrey Volkov &lt;avolkov@varma-el.com&gt;,</div><div class='ctx'>  *                         Varma Electronics Oy</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the version 2 of the GNU General Public License</div><div class='del'>- * as published by the Free Software Foundation</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef __MSCAN_H__</div><div class='head'>diff --git a/drivers/net/can/pch_can.c b/drivers/net/can/pch_can.c<br/>deleted file mode 100644<br/>index e187ca783da0..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/pch_can.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/pch_can.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,1280 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Copyright (C) 1999 - 2010 Intel Corporation.</div><div class='del'>- * Copyright (C) 2010 LAPIS SEMICONDUCTOR CO., LTD.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; version 2 of the License.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/pci.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/skbuff.h&gt;</div><div class='del'>-#include &lt;linux/can.h&gt;</div><div class='del'>-#include &lt;linux/can/dev.h&gt;</div><div class='del'>-#include &lt;linux/can/error.h&gt;</div><div class='del'>-</div><div class='del'>-#define PCH_CTRL_INIT		BIT(0) /* The INIT bit of CANCONT register. */</div><div class='del'>-#define PCH_CTRL_IE		BIT(1) /* The IE bit of CAN control register */</div><div class='del'>-#define PCH_CTRL_IE_SIE_EIE	(BIT(3) | BIT(2) | BIT(1))</div><div class='del'>-#define PCH_CTRL_CCE		BIT(6)</div><div class='del'>-#define PCH_CTRL_OPT		BIT(7) /* The OPT bit of CANCONT register. */</div><div class='del'>-#define PCH_OPT_SILENT		BIT(3) /* The Silent bit of CANOPT reg. */</div><div class='del'>-#define PCH_OPT_LBACK		BIT(4) /* The LoopBack bit of CANOPT reg. */</div><div class='del'>-</div><div class='del'>-#define PCH_CMASK_RX_TX_SET	0x00f3</div><div class='del'>-#define PCH_CMASK_RX_TX_GET	0x0073</div><div class='del'>-#define PCH_CMASK_ALL		0xff</div><div class='del'>-#define PCH_CMASK_NEWDAT	BIT(2)</div><div class='del'>-#define PCH_CMASK_CLRINTPND	BIT(3)</div><div class='del'>-#define PCH_CMASK_CTRL		BIT(4)</div><div class='del'>-#define PCH_CMASK_ARB		BIT(5)</div><div class='del'>-#define PCH_CMASK_MASK		BIT(6)</div><div class='del'>-#define PCH_CMASK_RDWR		BIT(7)</div><div class='del'>-#define PCH_IF_MCONT_NEWDAT	BIT(15)</div><div class='del'>-#define PCH_IF_MCONT_MSGLOST	BIT(14)</div><div class='del'>-#define PCH_IF_MCONT_INTPND	BIT(13)</div><div class='del'>-#define PCH_IF_MCONT_UMASK	BIT(12)</div><div class='del'>-#define PCH_IF_MCONT_TXIE	BIT(11)</div><div class='del'>-#define PCH_IF_MCONT_RXIE	BIT(10)</div><div class='del'>-#define PCH_IF_MCONT_RMTEN	BIT(9)</div><div class='del'>-#define PCH_IF_MCONT_TXRQXT	BIT(8)</div><div class='del'>-#define PCH_IF_MCONT_EOB	BIT(7)</div><div class='del'>-#define PCH_IF_MCONT_DLC	(BIT(0) | BIT(1) | BIT(2) | BIT(3))</div><div class='del'>-#define PCH_MASK2_MDIR_MXTD	(BIT(14) | BIT(15))</div><div class='del'>-#define PCH_ID2_DIR		BIT(13)</div><div class='del'>-#define PCH_ID2_XTD		BIT(14)</div><div class='del'>-#define PCH_ID_MSGVAL		BIT(15)</div><div class='del'>-#define PCH_IF_CREQ_BUSY	BIT(15)</div><div class='del'>-</div><div class='del'>-#define PCH_STATUS_INT		0x8000</div><div class='del'>-#define PCH_RP			0x00008000</div><div class='del'>-#define PCH_REC			0x00007f00</div><div class='del'>-#define PCH_TEC			0x000000ff</div><div class='del'>-</div><div class='del'>-#define PCH_TX_OK		BIT(3)</div><div class='del'>-#define PCH_RX_OK		BIT(4)</div><div class='del'>-#define PCH_EPASSIV		BIT(5)</div><div class='del'>-#define PCH_EWARN		BIT(6)</div><div class='del'>-#define PCH_BUS_OFF		BIT(7)</div><div class='del'>-</div><div class='del'>-/* bit position of certain controller bits. */</div><div class='del'>-#define PCH_BIT_BRP_SHIFT	0</div><div class='del'>-#define PCH_BIT_SJW_SHIFT	6</div><div class='del'>-#define PCH_BIT_TSEG1_SHIFT	8</div><div class='del'>-#define PCH_BIT_TSEG2_SHIFT	12</div><div class='del'>-#define PCH_BIT_BRPE_BRPE_SHIFT	6</div><div class='del'>-</div><div class='del'>-#define PCH_MSK_BITT_BRP	0x3f</div><div class='del'>-#define PCH_MSK_BRPE_BRPE	0x3c0</div><div class='del'>-#define PCH_MSK_CTRL_IE_SIE_EIE	0x07</div><div class='del'>-#define PCH_COUNTER_LIMIT	10</div><div class='del'>-</div><div class='del'>-#define PCH_CAN_CLK		50000000	/* 50MHz */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Define the number of message object.</div><div class='del'>- * PCH CAN communications are done via Message RAM.</div><div class='del'>- * The Message RAM consists of 32 message objects.</div><div class='del'>- */</div><div class='del'>-#define PCH_RX_OBJ_NUM		26</div><div class='del'>-#define PCH_TX_OBJ_NUM		6</div><div class='del'>-#define PCH_RX_OBJ_START	1</div><div class='del'>-#define PCH_RX_OBJ_END		PCH_RX_OBJ_NUM</div><div class='del'>-#define PCH_TX_OBJ_START	(PCH_RX_OBJ_END + 1)</div><div class='del'>-#define PCH_TX_OBJ_END		(PCH_RX_OBJ_NUM + PCH_TX_OBJ_NUM)</div><div class='del'>-</div><div class='del'>-#define PCH_FIFO_THRESH		16</div><div class='del'>-</div><div class='del'>-/* TxRqst2 show status of MsgObjNo.17~32 */</div><div class='del'>-#define PCH_TREQ2_TX_MASK	(((1 &lt;&lt; PCH_TX_OBJ_NUM) - 1) &lt;&lt;\</div><div class='del'>-							(PCH_RX_OBJ_END - 16))</div><div class='del'>-</div><div class='del'>-enum pch_ifreg {</div><div class='del'>-	PCH_RX_IFREG,</div><div class='del'>-	PCH_TX_IFREG,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum pch_can_err {</div><div class='del'>-	PCH_STUF_ERR = 1,</div><div class='del'>-	PCH_FORM_ERR,</div><div class='del'>-	PCH_ACK_ERR,</div><div class='del'>-	PCH_BIT1_ERR,</div><div class='del'>-	PCH_BIT0_ERR,</div><div class='del'>-	PCH_CRC_ERR,</div><div class='del'>-	PCH_LEC_ALL,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-enum pch_can_mode {</div><div class='del'>-	PCH_CAN_ENABLE,</div><div class='del'>-	PCH_CAN_DISABLE,</div><div class='del'>-	PCH_CAN_ALL,</div><div class='del'>-	PCH_CAN_NONE,</div><div class='del'>-	PCH_CAN_STOP,</div><div class='del'>-	PCH_CAN_RUN,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pch_can_if_regs {</div><div class='del'>-	u32 creq;</div><div class='del'>-	u32 cmask;</div><div class='del'>-	u32 mask1;</div><div class='del'>-	u32 mask2;</div><div class='del'>-	u32 id1;</div><div class='del'>-	u32 id2;</div><div class='del'>-	u32 mcont;</div><div class='del'>-	u32 data[4];</div><div class='del'>-	u32 rsv[13];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pch_can_regs {</div><div class='del'>-	u32 cont;</div><div class='del'>-	u32 stat;</div><div class='del'>-	u32 errc;</div><div class='del'>-	u32 bitt;</div><div class='del'>-	u32 intr;</div><div class='del'>-	u32 opt;</div><div class='del'>-	u32 brpe;</div><div class='del'>-	u32 reserve;</div><div class='del'>-	struct pch_can_if_regs ifregs[2]; /* [0]=if1  [1]=if2 */</div><div class='del'>-	u32 reserve1[8];</div><div class='del'>-	u32 treq1;</div><div class='del'>-	u32 treq2;</div><div class='del'>-	u32 reserve2[6];</div><div class='del'>-	u32 data1;</div><div class='del'>-	u32 data2;</div><div class='del'>-	u32 reserve3[6];</div><div class='del'>-	u32 canipend1;</div><div class='del'>-	u32 canipend2;</div><div class='del'>-	u32 reserve4[6];</div><div class='del'>-	u32 canmval1;</div><div class='del'>-	u32 canmval2;</div><div class='del'>-	u32 reserve5[37];</div><div class='del'>-	u32 srst;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct pch_can_priv {</div><div class='del'>-	struct can_priv can;</div><div class='del'>-	struct pci_dev *dev;</div><div class='del'>-	u32 tx_enable[PCH_TX_OBJ_END];</div><div class='del'>-	u32 rx_enable[PCH_TX_OBJ_END];</div><div class='del'>-	u32 rx_link[PCH_TX_OBJ_END];</div><div class='del'>-	u32 int_enables;</div><div class='del'>-	struct net_device *ndev;</div><div class='del'>-	struct pch_can_regs __iomem *regs;</div><div class='del'>-	struct napi_struct napi;</div><div class='del'>-	int tx_obj;	/* Point next Tx Obj index */</div><div class='del'>-	int use_msi;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct can_bittiming_const pch_can_bittiming_const = {</div><div class='del'>-	.name = KBUILD_MODNAME,</div><div class='del'>-	.tseg1_min = 2,</div><div class='del'>-	.tseg1_max = 16,</div><div class='del'>-	.tseg2_min = 1,</div><div class='del'>-	.tseg2_max = 8,</div><div class='del'>-	.sjw_max = 4,</div><div class='del'>-	.brp_min = 1,</div><div class='del'>-	.brp_max = 1024, /* 6bit + extended 4bit */</div><div class='del'>-	.brp_inc = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct pci_device_id pch_pci_tbl[] = {</div><div class='del'>-	{PCI_VENDOR_ID_INTEL, 0x8818, PCI_ANY_ID, PCI_ANY_ID,},</div><div class='del'>-	{0,}</div><div class='del'>-};</div><div class='del'>-MODULE_DEVICE_TABLE(pci, pch_pci_tbl);</div><div class='del'>-</div><div class='del'>-static inline void pch_can_bit_set(void __iomem *addr, u32 mask)</div><div class='del'>-{</div><div class='del'>-	iowrite32(ioread32(addr) | mask, addr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void pch_can_bit_clear(void __iomem *addr, u32 mask)</div><div class='del'>-{</div><div class='del'>-	iowrite32(ioread32(addr) &amp; ~mask, addr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void pch_can_set_run_mode(struct pch_can_priv *priv,</div><div class='del'>-				 enum pch_can_mode mode)</div><div class='del'>-{</div><div class='del'>-	switch (mode) {</div><div class='del'>-	case PCH_CAN_RUN:</div><div class='del'>-		pch_can_bit_clear(&amp;priv-&gt;regs-&gt;cont, PCH_CTRL_INIT);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case PCH_CAN_STOP:</div><div class='del'>-		pch_can_bit_set(&amp;priv-&gt;regs-&gt;cont, PCH_CTRL_INIT);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		netdev_err(priv-&gt;ndev, "%s -&gt; Invalid Mode.\n", __func__);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void pch_can_set_optmode(struct pch_can_priv *priv)</div><div class='del'>-{</div><div class='del'>-	u32 reg_val = ioread32(&amp;priv-&gt;regs-&gt;opt);</div><div class='del'>-</div><div class='del'>-	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LISTENONLY)</div><div class='del'>-		reg_val |= PCH_OPT_SILENT;</div><div class='del'>-</div><div class='del'>-	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LOOPBACK)</div><div class='del'>-		reg_val |= PCH_OPT_LBACK;</div><div class='del'>-</div><div class='del'>-	pch_can_bit_set(&amp;priv-&gt;regs-&gt;cont, PCH_CTRL_OPT);</div><div class='del'>-	iowrite32(reg_val, &amp;priv-&gt;regs-&gt;opt);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void pch_can_rw_msg_obj(void __iomem *creq_addr, u32 num)</div><div class='del'>-{</div><div class='del'>-	int counter = PCH_COUNTER_LIMIT;</div><div class='del'>-	u32 ifx_creq;</div><div class='del'>-</div><div class='del'>-	iowrite32(num, creq_addr);</div><div class='del'>-	while (counter) {</div><div class='del'>-		ifx_creq = ioread32(creq_addr) &amp; PCH_IF_CREQ_BUSY;</div><div class='del'>-		if (!ifx_creq)</div><div class='del'>-			break;</div><div class='del'>-		counter--;</div><div class='del'>-		udelay(1);</div><div class='del'>-	}</div><div class='del'>-	if (!counter)</div><div class='del'>-		pr_err("%s:IF1 BUSY Flag is set forever.\n", __func__);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void pch_can_set_int_enables(struct pch_can_priv *priv,</div><div class='del'>-				    enum pch_can_mode interrupt_no)</div><div class='del'>-{</div><div class='del'>-	switch (interrupt_no) {</div><div class='del'>-	case PCH_CAN_DISABLE:</div><div class='del'>-		pch_can_bit_clear(&amp;priv-&gt;regs-&gt;cont, PCH_CTRL_IE);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case PCH_CAN_ALL:</div><div class='del'>-		pch_can_bit_set(&amp;priv-&gt;regs-&gt;cont, PCH_CTRL_IE_SIE_EIE);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case PCH_CAN_NONE:</div><div class='del'>-		pch_can_bit_clear(&amp;priv-&gt;regs-&gt;cont, PCH_CTRL_IE_SIE_EIE);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		netdev_err(priv-&gt;ndev, "Invalid interrupt number.\n");</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void pch_can_set_rxtx(struct pch_can_priv *priv, u32 buff_num,</div><div class='del'>-			     int set, enum pch_ifreg dir)</div><div class='del'>-{</div><div class='del'>-	u32 ie;</div><div class='del'>-</div><div class='del'>-	if (dir)</div><div class='del'>-		ie = PCH_IF_MCONT_TXIE;</div><div class='del'>-	else</div><div class='del'>-		ie = PCH_IF_MCONT_RXIE;</div><div class='del'>-</div><div class='del'>-	/* Reading the Msg buffer from Message RAM to IF1/2 registers. */</div><div class='del'>-	iowrite32(PCH_CMASK_RX_TX_GET, &amp;priv-&gt;regs-&gt;ifregs[dir].cmask);</div><div class='del'>-	pch_can_rw_msg_obj(&amp;priv-&gt;regs-&gt;ifregs[dir].creq, buff_num);</div><div class='del'>-</div><div class='del'>-	/* Setting the IF1/2MASK1 register to access MsgVal and RxIE bits */</div><div class='del'>-	iowrite32(PCH_CMASK_RDWR | PCH_CMASK_ARB | PCH_CMASK_CTRL,</div><div class='del'>-		  &amp;priv-&gt;regs-&gt;ifregs[dir].cmask);</div><div class='del'>-</div><div class='del'>-	if (set) {</div><div class='del'>-		/* Setting the MsgVal and RxIE/TxIE bits */</div><div class='del'>-		pch_can_bit_set(&amp;priv-&gt;regs-&gt;ifregs[dir].mcont, ie);</div><div class='del'>-		pch_can_bit_set(&amp;priv-&gt;regs-&gt;ifregs[dir].id2, PCH_ID_MSGVAL);</div><div class='del'>-	} else {</div><div class='del'>-		/* Clearing the MsgVal and RxIE/TxIE bits */</div><div class='del'>-		pch_can_bit_clear(&amp;priv-&gt;regs-&gt;ifregs[dir].mcont, ie);</div><div class='del'>-		pch_can_bit_clear(&amp;priv-&gt;regs-&gt;ifregs[dir].id2, PCH_ID_MSGVAL);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pch_can_rw_msg_obj(&amp;priv-&gt;regs-&gt;ifregs[dir].creq, buff_num);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void pch_can_set_rx_all(struct pch_can_priv *priv, int set)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* Traversing to obtain the object configured as receivers. */</div><div class='del'>-	for (i = PCH_RX_OBJ_START; i &lt;= PCH_RX_OBJ_END; i++)</div><div class='del'>-		pch_can_set_rxtx(priv, i, set, PCH_RX_IFREG);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void pch_can_set_tx_all(struct pch_can_priv *priv, int set)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* Traversing to obtain the object configured as transmit object. */</div><div class='del'>-	for (i = PCH_TX_OBJ_START; i &lt;= PCH_TX_OBJ_END; i++)</div><div class='del'>-		pch_can_set_rxtx(priv, i, set, PCH_TX_IFREG);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u32 pch_can_int_pending(struct pch_can_priv *priv)</div><div class='del'>-{</div><div class='del'>-	return ioread32(&amp;priv-&gt;regs-&gt;intr) &amp; 0xffff;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void pch_can_clear_if_buffers(struct pch_can_priv *priv)</div><div class='del'>-{</div><div class='del'>-	int i; /* Msg Obj ID (1~32) */</div><div class='del'>-</div><div class='del'>-	for (i = PCH_RX_OBJ_START; i &lt;= PCH_TX_OBJ_END; i++) {</div><div class='del'>-		iowrite32(PCH_CMASK_RX_TX_SET, &amp;priv-&gt;regs-&gt;ifregs[0].cmask);</div><div class='del'>-		iowrite32(0xffff, &amp;priv-&gt;regs-&gt;ifregs[0].mask1);</div><div class='del'>-		iowrite32(0xffff, &amp;priv-&gt;regs-&gt;ifregs[0].mask2);</div><div class='del'>-		iowrite32(0x0, &amp;priv-&gt;regs-&gt;ifregs[0].id1);</div><div class='del'>-		iowrite32(0x0, &amp;priv-&gt;regs-&gt;ifregs[0].id2);</div><div class='del'>-		iowrite32(0x0, &amp;priv-&gt;regs-&gt;ifregs[0].mcont);</div><div class='del'>-		iowrite32(0x0, &amp;priv-&gt;regs-&gt;ifregs[0].data[0]);</div><div class='del'>-		iowrite32(0x0, &amp;priv-&gt;regs-&gt;ifregs[0].data[1]);</div><div class='del'>-		iowrite32(0x0, &amp;priv-&gt;regs-&gt;ifregs[0].data[2]);</div><div class='del'>-		iowrite32(0x0, &amp;priv-&gt;regs-&gt;ifregs[0].data[3]);</div><div class='del'>-		iowrite32(PCH_CMASK_RDWR | PCH_CMASK_MASK |</div><div class='del'>-			  PCH_CMASK_ARB | PCH_CMASK_CTRL,</div><div class='del'>-			  &amp;priv-&gt;regs-&gt;ifregs[0].cmask);</div><div class='del'>-		pch_can_rw_msg_obj(&amp;priv-&gt;regs-&gt;ifregs[0].creq, i);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void pch_can_config_rx_tx_buffers(struct pch_can_priv *priv)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = PCH_RX_OBJ_START; i &lt;= PCH_RX_OBJ_END; i++) {</div><div class='del'>-		iowrite32(PCH_CMASK_RX_TX_GET, &amp;priv-&gt;regs-&gt;ifregs[0].cmask);</div><div class='del'>-		pch_can_rw_msg_obj(&amp;priv-&gt;regs-&gt;ifregs[0].creq, i);</div><div class='del'>-</div><div class='del'>-		iowrite32(0x0, &amp;priv-&gt;regs-&gt;ifregs[0].id1);</div><div class='del'>-		iowrite32(0x0, &amp;priv-&gt;regs-&gt;ifregs[0].id2);</div><div class='del'>-</div><div class='del'>-		pch_can_bit_set(&amp;priv-&gt;regs-&gt;ifregs[0].mcont,</div><div class='del'>-				PCH_IF_MCONT_UMASK);</div><div class='del'>-</div><div class='del'>-		/* In case FIFO mode, Last EoB of Rx Obj must be 1 */</div><div class='del'>-		if (i == PCH_RX_OBJ_END)</div><div class='del'>-			pch_can_bit_set(&amp;priv-&gt;regs-&gt;ifregs[0].mcont,</div><div class='del'>-					PCH_IF_MCONT_EOB);</div><div class='del'>-		else</div><div class='del'>-			pch_can_bit_clear(&amp;priv-&gt;regs-&gt;ifregs[0].mcont,</div><div class='del'>-					  PCH_IF_MCONT_EOB);</div><div class='del'>-</div><div class='del'>-		iowrite32(0, &amp;priv-&gt;regs-&gt;ifregs[0].mask1);</div><div class='del'>-		pch_can_bit_clear(&amp;priv-&gt;regs-&gt;ifregs[0].mask2,</div><div class='del'>-				  0x1fff | PCH_MASK2_MDIR_MXTD);</div><div class='del'>-</div><div class='del'>-		/* Setting CMASK for writing */</div><div class='del'>-		iowrite32(PCH_CMASK_RDWR | PCH_CMASK_MASK | PCH_CMASK_ARB |</div><div class='del'>-			  PCH_CMASK_CTRL, &amp;priv-&gt;regs-&gt;ifregs[0].cmask);</div><div class='del'>-</div><div class='del'>-		pch_can_rw_msg_obj(&amp;priv-&gt;regs-&gt;ifregs[0].creq, i);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = PCH_TX_OBJ_START; i &lt;= PCH_TX_OBJ_END; i++) {</div><div class='del'>-		iowrite32(PCH_CMASK_RX_TX_GET, &amp;priv-&gt;regs-&gt;ifregs[1].cmask);</div><div class='del'>-		pch_can_rw_msg_obj(&amp;priv-&gt;regs-&gt;ifregs[1].creq, i);</div><div class='del'>-</div><div class='del'>-		/* Resetting DIR bit for reception */</div><div class='del'>-		iowrite32(0x0, &amp;priv-&gt;regs-&gt;ifregs[1].id1);</div><div class='del'>-		iowrite32(PCH_ID2_DIR, &amp;priv-&gt;regs-&gt;ifregs[1].id2);</div><div class='del'>-</div><div class='del'>-		/* Setting EOB bit for transmitter */</div><div class='del'>-		iowrite32(PCH_IF_MCONT_EOB | PCH_IF_MCONT_UMASK,</div><div class='del'>-			  &amp;priv-&gt;regs-&gt;ifregs[1].mcont);</div><div class='del'>-</div><div class='del'>-		iowrite32(0, &amp;priv-&gt;regs-&gt;ifregs[1].mask1);</div><div class='del'>-		pch_can_bit_clear(&amp;priv-&gt;regs-&gt;ifregs[1].mask2, 0x1fff);</div><div class='del'>-</div><div class='del'>-		/* Setting CMASK for writing */</div><div class='del'>-		iowrite32(PCH_CMASK_RDWR | PCH_CMASK_MASK | PCH_CMASK_ARB |</div><div class='del'>-			  PCH_CMASK_CTRL, &amp;priv-&gt;regs-&gt;ifregs[1].cmask);</div><div class='del'>-</div><div class='del'>-		pch_can_rw_msg_obj(&amp;priv-&gt;regs-&gt;ifregs[1].creq, i);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void pch_can_init(struct pch_can_priv *priv)</div><div class='del'>-{</div><div class='del'>-	/* Stopping the Can device. */</div><div class='del'>-	pch_can_set_run_mode(priv, PCH_CAN_STOP);</div><div class='del'>-</div><div class='del'>-	/* Clearing all the message object buffers. */</div><div class='del'>-	pch_can_clear_if_buffers(priv);</div><div class='del'>-</div><div class='del'>-	/* Configuring the respective message object as either rx/tx object. */</div><div class='del'>-	pch_can_config_rx_tx_buffers(priv);</div><div class='del'>-</div><div class='del'>-	/* Enabling the interrupts. */</div><div class='del'>-	pch_can_set_int_enables(priv, PCH_CAN_ALL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void pch_can_release(struct pch_can_priv *priv)</div><div class='del'>-{</div><div class='del'>-	/* Stooping the CAN device. */</div><div class='del'>-	pch_can_set_run_mode(priv, PCH_CAN_STOP);</div><div class='del'>-</div><div class='del'>-	/* Disabling the interrupts. */</div><div class='del'>-	pch_can_set_int_enables(priv, PCH_CAN_NONE);</div><div class='del'>-</div><div class='del'>-	/* Disabling all the receive object. */</div><div class='del'>-	pch_can_set_rx_all(priv, 0);</div><div class='del'>-</div><div class='del'>-	/* Disabling all the transmit object. */</div><div class='del'>-	pch_can_set_tx_all(priv, 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* This function clears interrupt(s) from the CAN device. */</div><div class='del'>-static void pch_can_int_clr(struct pch_can_priv *priv, u32 mask)</div><div class='del'>-{</div><div class='del'>-	/* Clear interrupt for transmit object */</div><div class='del'>-	if ((mask &gt;= PCH_RX_OBJ_START) &amp;&amp; (mask &lt;= PCH_RX_OBJ_END)) {</div><div class='del'>-		/* Setting CMASK for clearing the reception interrupts. */</div><div class='del'>-		iowrite32(PCH_CMASK_RDWR | PCH_CMASK_CTRL | PCH_CMASK_ARB,</div><div class='del'>-			  &amp;priv-&gt;regs-&gt;ifregs[0].cmask);</div><div class='del'>-</div><div class='del'>-		/* Clearing the Dir bit. */</div><div class='del'>-		pch_can_bit_clear(&amp;priv-&gt;regs-&gt;ifregs[0].id2, PCH_ID2_DIR);</div><div class='del'>-</div><div class='del'>-		/* Clearing NewDat &amp; IntPnd */</div><div class='del'>-		pch_can_bit_clear(&amp;priv-&gt;regs-&gt;ifregs[0].mcont,</div><div class='del'>-				  PCH_IF_MCONT_NEWDAT | PCH_IF_MCONT_INTPND);</div><div class='del'>-</div><div class='del'>-		pch_can_rw_msg_obj(&amp;priv-&gt;regs-&gt;ifregs[0].creq, mask);</div><div class='del'>-	} else if ((mask &gt;= PCH_TX_OBJ_START) &amp;&amp; (mask &lt;= PCH_TX_OBJ_END)) {</div><div class='del'>-		/*</div><div class='del'>-		 * Setting CMASK for clearing interrupts for frame transmission.</div><div class='del'>-		 */</div><div class='del'>-		iowrite32(PCH_CMASK_RDWR | PCH_CMASK_CTRL | PCH_CMASK_ARB,</div><div class='del'>-			  &amp;priv-&gt;regs-&gt;ifregs[1].cmask);</div><div class='del'>-</div><div class='del'>-		/* Resetting the ID registers. */</div><div class='del'>-		pch_can_bit_set(&amp;priv-&gt;regs-&gt;ifregs[1].id2,</div><div class='del'>-			       PCH_ID2_DIR | (0x7ff &lt;&lt; 2));</div><div class='del'>-		iowrite32(0x0, &amp;priv-&gt;regs-&gt;ifregs[1].id1);</div><div class='del'>-</div><div class='del'>-		/* Claring NewDat, TxRqst &amp; IntPnd */</div><div class='del'>-		pch_can_bit_clear(&amp;priv-&gt;regs-&gt;ifregs[1].mcont,</div><div class='del'>-				  PCH_IF_MCONT_NEWDAT | PCH_IF_MCONT_INTPND |</div><div class='del'>-				  PCH_IF_MCONT_TXRQXT);</div><div class='del'>-		pch_can_rw_msg_obj(&amp;priv-&gt;regs-&gt;ifregs[1].creq, mask);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void pch_can_reset(struct pch_can_priv *priv)</div><div class='del'>-{</div><div class='del'>-	/* write to sw reset register */</div><div class='del'>-	iowrite32(1, &amp;priv-&gt;regs-&gt;srst);</div><div class='del'>-	iowrite32(0, &amp;priv-&gt;regs-&gt;srst);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void pch_can_error(struct net_device *ndev, u32 status)</div><div class='del'>-{</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	struct pch_can_priv *priv = netdev_priv(ndev);</div><div class='del'>-	struct can_frame *cf;</div><div class='del'>-	u32 errc, lec;</div><div class='del'>-	struct net_device_stats *stats = &amp;(priv-&gt;ndev-&gt;stats);</div><div class='del'>-	enum can_state state = priv-&gt;can.state;</div><div class='del'>-</div><div class='del'>-	skb = alloc_can_err_skb(ndev, &amp;cf);</div><div class='del'>-	if (!skb)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (status &amp; PCH_BUS_OFF) {</div><div class='del'>-		pch_can_set_tx_all(priv, 0);</div><div class='del'>-		pch_can_set_rx_all(priv, 0);</div><div class='del'>-		state = CAN_STATE_BUS_OFF;</div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_BUSOFF;</div><div class='del'>-		priv-&gt;can.can_stats.bus_off++;</div><div class='del'>-		can_bus_off(ndev);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	errc = ioread32(&amp;priv-&gt;regs-&gt;errc);</div><div class='del'>-	/* Warning interrupt. */</div><div class='del'>-	if (status &amp; PCH_EWARN) {</div><div class='del'>-		state = CAN_STATE_ERROR_WARNING;</div><div class='del'>-		priv-&gt;can.can_stats.error_warning++;</div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='del'>-		if (((errc &amp; PCH_REC) &gt;&gt; 8) &gt; 96)</div><div class='del'>-			cf-&gt;data[1] |= CAN_ERR_CRTL_RX_WARNING;</div><div class='del'>-		if ((errc &amp; PCH_TEC) &gt; 96)</div><div class='del'>-			cf-&gt;data[1] |= CAN_ERR_CRTL_TX_WARNING;</div><div class='del'>-		netdev_dbg(ndev,</div><div class='del'>-			"%s -&gt; Error Counter is more than 96.\n", __func__);</div><div class='del'>-	}</div><div class='del'>-	/* Error passive interrupt. */</div><div class='del'>-	if (status &amp; PCH_EPASSIV) {</div><div class='del'>-		priv-&gt;can.can_stats.error_passive++;</div><div class='del'>-		state = CAN_STATE_ERROR_PASSIVE;</div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='del'>-		if (errc &amp; PCH_RP)</div><div class='del'>-			cf-&gt;data[1] |= CAN_ERR_CRTL_RX_PASSIVE;</div><div class='del'>-		if ((errc &amp; PCH_TEC) &gt; 127)</div><div class='del'>-			cf-&gt;data[1] |= CAN_ERR_CRTL_TX_PASSIVE;</div><div class='del'>-		netdev_dbg(ndev,</div><div class='del'>-			"%s -&gt; CAN controller is ERROR PASSIVE .\n", __func__);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	lec = status &amp; PCH_LEC_ALL;</div><div class='del'>-	switch (lec) {</div><div class='del'>-	case PCH_STUF_ERR:</div><div class='del'>-		cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='del'>-		priv-&gt;can.can_stats.bus_error++;</div><div class='del'>-		stats-&gt;rx_errors++;</div><div class='del'>-		break;</div><div class='del'>-	case PCH_FORM_ERR:</div><div class='del'>-		cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='del'>-		priv-&gt;can.can_stats.bus_error++;</div><div class='del'>-		stats-&gt;rx_errors++;</div><div class='del'>-		break;</div><div class='del'>-	case PCH_ACK_ERR:</div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_ACK;</div><div class='del'>-		priv-&gt;can.can_stats.bus_error++;</div><div class='del'>-		stats-&gt;rx_errors++;</div><div class='del'>-		break;</div><div class='del'>-	case PCH_BIT1_ERR:</div><div class='del'>-	case PCH_BIT0_ERR:</div><div class='del'>-		cf-&gt;data[2] |= CAN_ERR_PROT_BIT;</div><div class='del'>-		priv-&gt;can.can_stats.bus_error++;</div><div class='del'>-		stats-&gt;rx_errors++;</div><div class='del'>-		break;</div><div class='del'>-	case PCH_CRC_ERR:</div><div class='del'>-		cf-&gt;data[3] |= CAN_ERR_PROT_LOC_CRC_SEQ |</div><div class='del'>-			       CAN_ERR_PROT_LOC_CRC_DEL;</div><div class='del'>-		priv-&gt;can.can_stats.bus_error++;</div><div class='del'>-		stats-&gt;rx_errors++;</div><div class='del'>-		break;</div><div class='del'>-	case PCH_LEC_ALL: /* Written by CPU. No error status */</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	cf-&gt;data[6] = errc &amp; PCH_TEC;</div><div class='del'>-	cf-&gt;data[7] = (errc &amp; PCH_REC) &gt;&gt; 8;</div><div class='del'>-</div><div class='del'>-	priv-&gt;can.state = state;</div><div class='del'>-	netif_receive_skb(skb);</div><div class='del'>-</div><div class='del'>-	stats-&gt;rx_packets++;</div><div class='del'>-	stats-&gt;rx_bytes += cf-&gt;can_dlc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static irqreturn_t pch_can_interrupt(int irq, void *dev_id)</div><div class='del'>-{</div><div class='del'>-	struct net_device *ndev = (struct net_device *)dev_id;</div><div class='del'>-	struct pch_can_priv *priv = netdev_priv(ndev);</div><div class='del'>-</div><div class='del'>-	if (!pch_can_int_pending(priv))</div><div class='del'>-		return IRQ_NONE;</div><div class='del'>-</div><div class='del'>-	pch_can_set_int_enables(priv, PCH_CAN_NONE);</div><div class='del'>-	napi_schedule(&amp;priv-&gt;napi);</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void pch_fifo_thresh(struct pch_can_priv *priv, int obj_id)</div><div class='del'>-{</div><div class='del'>-	if (obj_id &lt; PCH_FIFO_THRESH) {</div><div class='del'>-		iowrite32(PCH_CMASK_RDWR | PCH_CMASK_CTRL |</div><div class='del'>-			  PCH_CMASK_ARB, &amp;priv-&gt;regs-&gt;ifregs[0].cmask);</div><div class='del'>-</div><div class='del'>-		/* Clearing the Dir bit. */</div><div class='del'>-		pch_can_bit_clear(&amp;priv-&gt;regs-&gt;ifregs[0].id2, PCH_ID2_DIR);</div><div class='del'>-</div><div class='del'>-		/* Clearing NewDat &amp; IntPnd */</div><div class='del'>-		pch_can_bit_clear(&amp;priv-&gt;regs-&gt;ifregs[0].mcont,</div><div class='del'>-				  PCH_IF_MCONT_INTPND);</div><div class='del'>-		pch_can_rw_msg_obj(&amp;priv-&gt;regs-&gt;ifregs[0].creq, obj_id);</div><div class='del'>-	} else if (obj_id &gt; PCH_FIFO_THRESH) {</div><div class='del'>-		pch_can_int_clr(priv, obj_id);</div><div class='del'>-	} else if (obj_id == PCH_FIFO_THRESH) {</div><div class='del'>-		int cnt;</div><div class='del'>-		for (cnt = 0; cnt &lt; PCH_FIFO_THRESH; cnt++)</div><div class='del'>-			pch_can_int_clr(priv, cnt + 1);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void pch_can_rx_msg_lost(struct net_device *ndev, int obj_id)</div><div class='del'>-{</div><div class='del'>-	struct pch_can_priv *priv = netdev_priv(ndev);</div><div class='del'>-	struct net_device_stats *stats = &amp;(priv-&gt;ndev-&gt;stats);</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	struct can_frame *cf;</div><div class='del'>-</div><div class='del'>-	netdev_dbg(priv-&gt;ndev, "Msg Obj is overwritten.\n");</div><div class='del'>-	pch_can_bit_clear(&amp;priv-&gt;regs-&gt;ifregs[0].mcont,</div><div class='del'>-			  PCH_IF_MCONT_MSGLOST);</div><div class='del'>-	iowrite32(PCH_CMASK_RDWR | PCH_CMASK_CTRL,</div><div class='del'>-		  &amp;priv-&gt;regs-&gt;ifregs[0].cmask);</div><div class='del'>-	pch_can_rw_msg_obj(&amp;priv-&gt;regs-&gt;ifregs[0].creq, obj_id);</div><div class='del'>-</div><div class='del'>-	skb = alloc_can_err_skb(ndev, &amp;cf);</div><div class='del'>-	if (!skb)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='del'>-	cf-&gt;data[1] = CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='del'>-	stats-&gt;rx_over_errors++;</div><div class='del'>-	stats-&gt;rx_errors++;</div><div class='del'>-</div><div class='del'>-	netif_receive_skb(skb);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int pch_can_rx_normal(struct net_device *ndev, u32 obj_num, int quota)</div><div class='del'>-{</div><div class='del'>-	u32 reg;</div><div class='del'>-	canid_t id;</div><div class='del'>-	int rcv_pkts = 0;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	struct can_frame *cf;</div><div class='del'>-	struct pch_can_priv *priv = netdev_priv(ndev);</div><div class='del'>-	struct net_device_stats *stats = &amp;(priv-&gt;ndev-&gt;stats);</div><div class='del'>-	int i;</div><div class='del'>-	u32 id2;</div><div class='del'>-	u16 data_reg;</div><div class='del'>-</div><div class='del'>-	do {</div><div class='del'>-		/* Reading the message object from the Message RAM */</div><div class='del'>-		iowrite32(PCH_CMASK_RX_TX_GET, &amp;priv-&gt;regs-&gt;ifregs[0].cmask);</div><div class='del'>-		pch_can_rw_msg_obj(&amp;priv-&gt;regs-&gt;ifregs[0].creq, obj_num);</div><div class='del'>-</div><div class='del'>-		/* Reading the MCONT register. */</div><div class='del'>-		reg = ioread32(&amp;priv-&gt;regs-&gt;ifregs[0].mcont);</div><div class='del'>-</div><div class='del'>-		if (reg &amp; PCH_IF_MCONT_EOB)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		/* If MsgLost bit set. */</div><div class='del'>-		if (reg &amp; PCH_IF_MCONT_MSGLOST) {</div><div class='del'>-			pch_can_rx_msg_lost(ndev, obj_num);</div><div class='del'>-			rcv_pkts++;</div><div class='del'>-			quota--;</div><div class='del'>-			obj_num++;</div><div class='del'>-			continue;</div><div class='del'>-		} else if (!(reg &amp; PCH_IF_MCONT_NEWDAT)) {</div><div class='del'>-			obj_num++;</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		skb = alloc_can_skb(priv-&gt;ndev, &amp;cf);</div><div class='del'>-		if (!skb) {</div><div class='del'>-			netdev_err(ndev, "alloc_can_skb Failed\n");</div><div class='del'>-			return rcv_pkts;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Get Received data */</div><div class='del'>-		id2 = ioread32(&amp;priv-&gt;regs-&gt;ifregs[0].id2);</div><div class='del'>-		if (id2 &amp; PCH_ID2_XTD) {</div><div class='del'>-			id = (ioread32(&amp;priv-&gt;regs-&gt;ifregs[0].id1) &amp; 0xffff);</div><div class='del'>-			id |= (((id2) &amp; 0x1fff) &lt;&lt; 16);</div><div class='del'>-			cf-&gt;can_id = id | CAN_EFF_FLAG;</div><div class='del'>-		} else {</div><div class='del'>-			id = (id2 &gt;&gt; 2) &amp; CAN_SFF_MASK;</div><div class='del'>-			cf-&gt;can_id = id;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (id2 &amp; PCH_ID2_DIR)</div><div class='del'>-			cf-&gt;can_id |= CAN_RTR_FLAG;</div><div class='del'>-</div><div class='del'>-		cf-&gt;can_dlc = get_can_dlc((ioread32(&amp;priv-&gt;regs-&gt;</div><div class='del'>-						    ifregs[0].mcont)) &amp; 0xF);</div><div class='del'>-</div><div class='del'>-		for (i = 0; i &lt; cf-&gt;can_dlc; i += 2) {</div><div class='del'>-			data_reg = ioread16(&amp;priv-&gt;regs-&gt;ifregs[0].data[i / 2]);</div><div class='del'>-			cf-&gt;data[i] = data_reg;</div><div class='del'>-			cf-&gt;data[i + 1] = data_reg &gt;&gt; 8;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		netif_receive_skb(skb);</div><div class='del'>-		rcv_pkts++;</div><div class='del'>-		stats-&gt;rx_packets++;</div><div class='del'>-		quota--;</div><div class='del'>-		stats-&gt;rx_bytes += cf-&gt;can_dlc;</div><div class='del'>-</div><div class='del'>-		pch_fifo_thresh(priv, obj_num);</div><div class='del'>-		obj_num++;</div><div class='del'>-	} while (quota &gt; 0);</div><div class='del'>-</div><div class='del'>-	return rcv_pkts;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void pch_can_tx_complete(struct net_device *ndev, u32 int_stat)</div><div class='del'>-{</div><div class='del'>-	struct pch_can_priv *priv = netdev_priv(ndev);</div><div class='del'>-	struct net_device_stats *stats = &amp;(priv-&gt;ndev-&gt;stats);</div><div class='del'>-	u32 dlc;</div><div class='del'>-</div><div class='del'>-	can_get_echo_skb(ndev, int_stat - PCH_RX_OBJ_END - 1);</div><div class='del'>-	iowrite32(PCH_CMASK_RX_TX_GET | PCH_CMASK_CLRINTPND,</div><div class='del'>-		  &amp;priv-&gt;regs-&gt;ifregs[1].cmask);</div><div class='del'>-	pch_can_rw_msg_obj(&amp;priv-&gt;regs-&gt;ifregs[1].creq, int_stat);</div><div class='del'>-	dlc = get_can_dlc(ioread32(&amp;priv-&gt;regs-&gt;ifregs[1].mcont) &amp;</div><div class='del'>-			  PCH_IF_MCONT_DLC);</div><div class='del'>-	stats-&gt;tx_bytes += dlc;</div><div class='del'>-	stats-&gt;tx_packets++;</div><div class='del'>-	if (int_stat == PCH_TX_OBJ_END)</div><div class='del'>-		netif_wake_queue(ndev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int pch_can_poll(struct napi_struct *napi, int quota)</div><div class='del'>-{</div><div class='del'>-	struct net_device *ndev = napi-&gt;dev;</div><div class='del'>-	struct pch_can_priv *priv = netdev_priv(ndev);</div><div class='del'>-	u32 int_stat;</div><div class='del'>-	u32 reg_stat;</div><div class='del'>-	int quota_save = quota;</div><div class='del'>-</div><div class='del'>-	int_stat = pch_can_int_pending(priv);</div><div class='del'>-	if (!int_stat)</div><div class='del'>-		goto end;</div><div class='del'>-</div><div class='del'>-	if (int_stat == PCH_STATUS_INT) {</div><div class='del'>-		reg_stat = ioread32(&amp;priv-&gt;regs-&gt;stat);</div><div class='del'>-</div><div class='del'>-		if ((reg_stat &amp; (PCH_BUS_OFF | PCH_LEC_ALL)) &amp;&amp;</div><div class='del'>-		   ((reg_stat &amp; PCH_LEC_ALL) != PCH_LEC_ALL)) {</div><div class='del'>-			pch_can_error(ndev, reg_stat);</div><div class='del'>-			quota--;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (reg_stat &amp; (PCH_TX_OK | PCH_RX_OK))</div><div class='del'>-			pch_can_bit_clear(&amp;priv-&gt;regs-&gt;stat,</div><div class='del'>-					  reg_stat &amp; (PCH_TX_OK | PCH_RX_OK));</div><div class='del'>-</div><div class='del'>-		int_stat = pch_can_int_pending(priv);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (quota == 0)</div><div class='del'>-		goto end;</div><div class='del'>-</div><div class='del'>-	if ((int_stat &gt;= PCH_RX_OBJ_START) &amp;&amp; (int_stat &lt;= PCH_RX_OBJ_END)) {</div><div class='del'>-		quota -= pch_can_rx_normal(ndev, int_stat, quota);</div><div class='del'>-	} else if ((int_stat &gt;= PCH_TX_OBJ_START) &amp;&amp;</div><div class='del'>-		   (int_stat &lt;= PCH_TX_OBJ_END)) {</div><div class='del'>-		/* Handle transmission interrupt */</div><div class='del'>-		pch_can_tx_complete(ndev, int_stat);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-end:</div><div class='del'>-	napi_complete(napi);</div><div class='del'>-	pch_can_set_int_enables(priv, PCH_CAN_ALL);</div><div class='del'>-</div><div class='del'>-	return quota_save - quota;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int pch_set_bittiming(struct net_device *ndev)</div><div class='del'>-{</div><div class='del'>-	struct pch_can_priv *priv = netdev_priv(ndev);</div><div class='del'>-	const struct can_bittiming *bt = &amp;priv-&gt;can.bittiming;</div><div class='del'>-	u32 canbit;</div><div class='del'>-	u32 bepe;</div><div class='del'>-</div><div class='del'>-	/* Setting the CCE bit for accessing the Can Timing register. */</div><div class='del'>-	pch_can_bit_set(&amp;priv-&gt;regs-&gt;cont, PCH_CTRL_CCE);</div><div class='del'>-</div><div class='del'>-	canbit = (bt-&gt;brp - 1) &amp; PCH_MSK_BITT_BRP;</div><div class='del'>-	canbit |= (bt-&gt;sjw - 1) &lt;&lt; PCH_BIT_SJW_SHIFT;</div><div class='del'>-	canbit |= (bt-&gt;phase_seg1 + bt-&gt;prop_seg - 1) &lt;&lt; PCH_BIT_TSEG1_SHIFT;</div><div class='del'>-	canbit |= (bt-&gt;phase_seg2 - 1) &lt;&lt; PCH_BIT_TSEG2_SHIFT;</div><div class='del'>-	bepe = ((bt-&gt;brp - 1) &amp; PCH_MSK_BRPE_BRPE) &gt;&gt; PCH_BIT_BRPE_BRPE_SHIFT;</div><div class='del'>-	iowrite32(canbit, &amp;priv-&gt;regs-&gt;bitt);</div><div class='del'>-	iowrite32(bepe, &amp;priv-&gt;regs-&gt;brpe);</div><div class='del'>-	pch_can_bit_clear(&amp;priv-&gt;regs-&gt;cont, PCH_CTRL_CCE);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void pch_can_start(struct net_device *ndev)</div><div class='del'>-{</div><div class='del'>-	struct pch_can_priv *priv = netdev_priv(ndev);</div><div class='del'>-</div><div class='del'>-	if (priv-&gt;can.state != CAN_STATE_STOPPED)</div><div class='del'>-		pch_can_reset(priv);</div><div class='del'>-</div><div class='del'>-	pch_set_bittiming(ndev);</div><div class='del'>-	pch_can_set_optmode(priv);</div><div class='del'>-</div><div class='del'>-	pch_can_set_tx_all(priv, 1);</div><div class='del'>-	pch_can_set_rx_all(priv, 1);</div><div class='del'>-</div><div class='del'>-	/* Setting the CAN to run mode. */</div><div class='del'>-	pch_can_set_run_mode(priv, PCH_CAN_RUN);</div><div class='del'>-</div><div class='del'>-	priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='del'>-</div><div class='del'>-	return;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int pch_can_do_set_mode(struct net_device *ndev, enum can_mode mode)</div><div class='del'>-{</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	switch (mode) {</div><div class='del'>-	case CAN_MODE_START:</div><div class='del'>-		pch_can_start(ndev);</div><div class='del'>-		netif_wake_queue(ndev);</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		ret = -EOPNOTSUPP;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int pch_can_open(struct net_device *ndev)</div><div class='del'>-{</div><div class='del'>-	struct pch_can_priv *priv = netdev_priv(ndev);</div><div class='del'>-	int retval;</div><div class='del'>-</div><div class='del'>-	/* Regstering the interrupt. */</div><div class='del'>-	retval = request_irq(priv-&gt;dev-&gt;irq, pch_can_interrupt, IRQF_SHARED,</div><div class='del'>-			     ndev-&gt;name, ndev);</div><div class='del'>-	if (retval) {</div><div class='del'>-		netdev_err(ndev, "request_irq failed.\n");</div><div class='del'>-		goto req_irq_err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Open common can device */</div><div class='del'>-	retval = open_candev(ndev);</div><div class='del'>-	if (retval) {</div><div class='del'>-		netdev_err(ndev, "open_candev() failed %d\n", retval);</div><div class='del'>-		goto err_open_candev;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pch_can_init(priv);</div><div class='del'>-	pch_can_start(ndev);</div><div class='del'>-	napi_enable(&amp;priv-&gt;napi);</div><div class='del'>-	netif_start_queue(ndev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-err_open_candev:</div><div class='del'>-	free_irq(priv-&gt;dev-&gt;irq, ndev);</div><div class='del'>-req_irq_err:</div><div class='del'>-	pch_can_release(priv);</div><div class='del'>-</div><div class='del'>-	return retval;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int pch_close(struct net_device *ndev)</div><div class='del'>-{</div><div class='del'>-	struct pch_can_priv *priv = netdev_priv(ndev);</div><div class='del'>-</div><div class='del'>-	netif_stop_queue(ndev);</div><div class='del'>-	napi_disable(&amp;priv-&gt;napi);</div><div class='del'>-	pch_can_release(priv);</div><div class='del'>-	free_irq(priv-&gt;dev-&gt;irq, ndev);</div><div class='del'>-	close_candev(ndev);</div><div class='del'>-	priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static netdev_tx_t pch_xmit(struct sk_buff *skb, struct net_device *ndev)</div><div class='del'>-{</div><div class='del'>-	struct pch_can_priv *priv = netdev_priv(ndev);</div><div class='del'>-	struct can_frame *cf = (struct can_frame *)skb-&gt;data;</div><div class='del'>-	int tx_obj_no;</div><div class='del'>-	int i;</div><div class='del'>-	u32 id2;</div><div class='del'>-</div><div class='del'>-	if (can_dropped_invalid_skb(ndev, skb))</div><div class='del'>-		return NETDEV_TX_OK;</div><div class='del'>-</div><div class='del'>-	tx_obj_no = priv-&gt;tx_obj;</div><div class='del'>-	if (priv-&gt;tx_obj == PCH_TX_OBJ_END) {</div><div class='del'>-		if (ioread32(&amp;priv-&gt;regs-&gt;treq2) &amp; PCH_TREQ2_TX_MASK)</div><div class='del'>-			netif_stop_queue(ndev);</div><div class='del'>-</div><div class='del'>-		priv-&gt;tx_obj = PCH_TX_OBJ_START;</div><div class='del'>-	} else {</div><div class='del'>-		priv-&gt;tx_obj++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Setting the CMASK register. */</div><div class='del'>-	pch_can_bit_set(&amp;priv-&gt;regs-&gt;ifregs[1].cmask, PCH_CMASK_ALL);</div><div class='del'>-</div><div class='del'>-	/* If ID extended is set. */</div><div class='del'>-	if (cf-&gt;can_id &amp; CAN_EFF_FLAG) {</div><div class='del'>-		iowrite32(cf-&gt;can_id &amp; 0xffff, &amp;priv-&gt;regs-&gt;ifregs[1].id1);</div><div class='del'>-		id2 = ((cf-&gt;can_id &gt;&gt; 16) &amp; 0x1fff) | PCH_ID2_XTD;</div><div class='del'>-	} else {</div><div class='del'>-		iowrite32(0, &amp;priv-&gt;regs-&gt;ifregs[1].id1);</div><div class='del'>-		id2 = (cf-&gt;can_id &amp; CAN_SFF_MASK) &lt;&lt; 2;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	id2 |= PCH_ID_MSGVAL;</div><div class='del'>-</div><div class='del'>-	/* If remote frame has to be transmitted.. */</div><div class='del'>-	if (!(cf-&gt;can_id &amp; CAN_RTR_FLAG))</div><div class='del'>-		id2 |= PCH_ID2_DIR;</div><div class='del'>-</div><div class='del'>-	iowrite32(id2, &amp;priv-&gt;regs-&gt;ifregs[1].id2);</div><div class='del'>-</div><div class='del'>-	/* Copy data to register */</div><div class='del'>-	for (i = 0; i &lt; cf-&gt;can_dlc; i += 2) {</div><div class='del'>-		iowrite16(cf-&gt;data[i] | (cf-&gt;data[i + 1] &lt;&lt; 8),</div><div class='del'>-			  &amp;priv-&gt;regs-&gt;ifregs[1].data[i / 2]);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	can_put_echo_skb(skb, ndev, tx_obj_no - PCH_RX_OBJ_END - 1);</div><div class='del'>-</div><div class='del'>-	/* Set the size of the data. Update if2_mcont */</div><div class='del'>-	iowrite32(cf-&gt;can_dlc | PCH_IF_MCONT_NEWDAT | PCH_IF_MCONT_TXRQXT |</div><div class='del'>-		  PCH_IF_MCONT_TXIE, &amp;priv-&gt;regs-&gt;ifregs[1].mcont);</div><div class='del'>-</div><div class='del'>-	pch_can_rw_msg_obj(&amp;priv-&gt;regs-&gt;ifregs[1].creq, tx_obj_no);</div><div class='del'>-</div><div class='del'>-	return NETDEV_TX_OK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct net_device_ops pch_can_netdev_ops = {</div><div class='del'>-	.ndo_open		= pch_can_open,</div><div class='del'>-	.ndo_stop		= pch_close,</div><div class='del'>-	.ndo_start_xmit		= pch_xmit,</div><div class='del'>-	.ndo_change_mtu		= can_change_mtu,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void pch_can_remove(struct pci_dev *pdev)</div><div class='del'>-{</div><div class='del'>-	struct net_device *ndev = pci_get_drvdata(pdev);</div><div class='del'>-	struct pch_can_priv *priv = netdev_priv(ndev);</div><div class='del'>-</div><div class='del'>-	unregister_candev(priv-&gt;ndev);</div><div class='del'>-	if (priv-&gt;use_msi)</div><div class='del'>-		pci_disable_msi(priv-&gt;dev);</div><div class='del'>-	pci_release_regions(pdev);</div><div class='del'>-	pci_disable_device(pdev);</div><div class='del'>-	pch_can_reset(priv);</div><div class='del'>-	pci_iounmap(pdev, priv-&gt;regs);</div><div class='del'>-	free_candev(priv-&gt;ndev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PM</div><div class='del'>-static void pch_can_set_int_custom(struct pch_can_priv *priv)</div><div class='del'>-{</div><div class='del'>-	/* Clearing the IE, SIE and EIE bits of Can control register. */</div><div class='del'>-	pch_can_bit_clear(&amp;priv-&gt;regs-&gt;cont, PCH_CTRL_IE_SIE_EIE);</div><div class='del'>-</div><div class='del'>-	/* Appropriately setting them. */</div><div class='del'>-	pch_can_bit_set(&amp;priv-&gt;regs-&gt;cont,</div><div class='del'>-			((priv-&gt;int_enables &amp; PCH_MSK_CTRL_IE_SIE_EIE) &lt;&lt; 1));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* This function retrieves interrupt enabled for the CAN device. */</div><div class='del'>-static u32 pch_can_get_int_enables(struct pch_can_priv *priv)</div><div class='del'>-{</div><div class='del'>-	/* Obtaining the status of IE, SIE and EIE interrupt bits. */</div><div class='del'>-	return (ioread32(&amp;priv-&gt;regs-&gt;cont) &amp; PCH_CTRL_IE_SIE_EIE) &gt;&gt; 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u32 pch_can_get_rxtx_ir(struct pch_can_priv *priv, u32 buff_num,</div><div class='del'>-			       enum pch_ifreg dir)</div><div class='del'>-{</div><div class='del'>-	u32 ie, enable;</div><div class='del'>-</div><div class='del'>-	if (dir)</div><div class='del'>-		ie = PCH_IF_MCONT_RXIE;</div><div class='del'>-	else</div><div class='del'>-		ie = PCH_IF_MCONT_TXIE;</div><div class='del'>-</div><div class='del'>-	iowrite32(PCH_CMASK_RX_TX_GET, &amp;priv-&gt;regs-&gt;ifregs[dir].cmask);</div><div class='del'>-	pch_can_rw_msg_obj(&amp;priv-&gt;regs-&gt;ifregs[dir].creq, buff_num);</div><div class='del'>-</div><div class='del'>-	if (((ioread32(&amp;priv-&gt;regs-&gt;ifregs[dir].id2)) &amp; PCH_ID_MSGVAL) &amp;&amp;</div><div class='del'>-			((ioread32(&amp;priv-&gt;regs-&gt;ifregs[dir].mcont)) &amp; ie))</div><div class='del'>-		enable = 1;</div><div class='del'>-	else</div><div class='del'>-		enable = 0;</div><div class='del'>-</div><div class='del'>-	return enable;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void pch_can_set_rx_buffer_link(struct pch_can_priv *priv,</div><div class='del'>-				       u32 buffer_num, int set)</div><div class='del'>-{</div><div class='del'>-	iowrite32(PCH_CMASK_RX_TX_GET, &amp;priv-&gt;regs-&gt;ifregs[0].cmask);</div><div class='del'>-	pch_can_rw_msg_obj(&amp;priv-&gt;regs-&gt;ifregs[0].creq, buffer_num);</div><div class='del'>-	iowrite32(PCH_CMASK_RDWR | PCH_CMASK_CTRL,</div><div class='del'>-		  &amp;priv-&gt;regs-&gt;ifregs[0].cmask);</div><div class='del'>-	if (set)</div><div class='del'>-		pch_can_bit_clear(&amp;priv-&gt;regs-&gt;ifregs[0].mcont,</div><div class='del'>-				  PCH_IF_MCONT_EOB);</div><div class='del'>-	else</div><div class='del'>-		pch_can_bit_set(&amp;priv-&gt;regs-&gt;ifregs[0].mcont, PCH_IF_MCONT_EOB);</div><div class='del'>-</div><div class='del'>-	pch_can_rw_msg_obj(&amp;priv-&gt;regs-&gt;ifregs[0].creq, buffer_num);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u32 pch_can_get_rx_buffer_link(struct pch_can_priv *priv, u32 buffer_num)</div><div class='del'>-{</div><div class='del'>-	u32 link;</div><div class='del'>-</div><div class='del'>-	iowrite32(PCH_CMASK_RX_TX_GET, &amp;priv-&gt;regs-&gt;ifregs[0].cmask);</div><div class='del'>-	pch_can_rw_msg_obj(&amp;priv-&gt;regs-&gt;ifregs[0].creq, buffer_num);</div><div class='del'>-</div><div class='del'>-	if (ioread32(&amp;priv-&gt;regs-&gt;ifregs[0].mcont) &amp; PCH_IF_MCONT_EOB)</div><div class='del'>-		link = 0;</div><div class='del'>-	else</div><div class='del'>-		link = 1;</div><div class='del'>-	return link;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int pch_can_get_buffer_status(struct pch_can_priv *priv)</div><div class='del'>-{</div><div class='del'>-	return (ioread32(&amp;priv-&gt;regs-&gt;treq1) &amp; 0xffff) |</div><div class='del'>-	       (ioread32(&amp;priv-&gt;regs-&gt;treq2) &lt;&lt; 16);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int pch_can_suspend(struct pci_dev *pdev, pm_message_t state)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	int retval;</div><div class='del'>-	u32 buf_stat;	/* Variable for reading the transmit buffer status. */</div><div class='del'>-	int counter = PCH_COUNTER_LIMIT;</div><div class='del'>-</div><div class='del'>-	struct net_device *dev = pci_get_drvdata(pdev);</div><div class='del'>-	struct pch_can_priv *priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	/* Stop the CAN controller */</div><div class='del'>-	pch_can_set_run_mode(priv, PCH_CAN_STOP);</div><div class='del'>-</div><div class='del'>-	/* Indicate that we are aboutto/in suspend */</div><div class='del'>-	priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='del'>-</div><div class='del'>-	/* Waiting for all transmission to complete. */</div><div class='del'>-	while (counter) {</div><div class='del'>-		buf_stat = pch_can_get_buffer_status(priv);</div><div class='del'>-		if (!buf_stat)</div><div class='del'>-			break;</div><div class='del'>-		counter--;</div><div class='del'>-		udelay(1);</div><div class='del'>-	}</div><div class='del'>-	if (!counter)</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "%s -&gt; Transmission time out.\n", __func__);</div><div class='del'>-</div><div class='del'>-	/* Save interrupt configuration and then disable them */</div><div class='del'>-	priv-&gt;int_enables = pch_can_get_int_enables(priv);</div><div class='del'>-	pch_can_set_int_enables(priv, PCH_CAN_DISABLE);</div><div class='del'>-</div><div class='del'>-	/* Save Tx buffer enable state */</div><div class='del'>-	for (i = PCH_TX_OBJ_START; i &lt;= PCH_TX_OBJ_END; i++)</div><div class='del'>-		priv-&gt;tx_enable[i - 1] = pch_can_get_rxtx_ir(priv, i,</div><div class='del'>-							     PCH_TX_IFREG);</div><div class='del'>-</div><div class='del'>-	/* Disable all Transmit buffers */</div><div class='del'>-	pch_can_set_tx_all(priv, 0);</div><div class='del'>-</div><div class='del'>-	/* Save Rx buffer enable state */</div><div class='del'>-	for (i = PCH_RX_OBJ_START; i &lt;= PCH_RX_OBJ_END; i++) {</div><div class='del'>-		priv-&gt;rx_enable[i - 1] = pch_can_get_rxtx_ir(priv, i,</div><div class='del'>-							     PCH_RX_IFREG);</div><div class='del'>-		priv-&gt;rx_link[i - 1] = pch_can_get_rx_buffer_link(priv, i);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Disable all Receive buffers */</div><div class='del'>-	pch_can_set_rx_all(priv, 0);</div><div class='del'>-	retval = pci_save_state(pdev);</div><div class='del'>-	if (retval) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "pci_save_state failed.\n");</div><div class='del'>-	} else {</div><div class='del'>-		pci_enable_wake(pdev, PCI_D3hot, 0);</div><div class='del'>-		pci_disable_device(pdev);</div><div class='del'>-		pci_set_power_state(pdev, pci_choose_state(pdev, state));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return retval;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int pch_can_resume(struct pci_dev *pdev)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	int retval;</div><div class='del'>-	struct net_device *dev = pci_get_drvdata(pdev);</div><div class='del'>-	struct pch_can_priv *priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	pci_set_power_state(pdev, PCI_D0);</div><div class='del'>-	pci_restore_state(pdev);</div><div class='del'>-	retval = pci_enable_device(pdev);</div><div class='del'>-	if (retval) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "pci_enable_device failed.\n");</div><div class='del'>-		return retval;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pci_enable_wake(pdev, PCI_D3hot, 0);</div><div class='del'>-</div><div class='del'>-	priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='del'>-</div><div class='del'>-	/* Disabling all interrupts. */</div><div class='del'>-	pch_can_set_int_enables(priv, PCH_CAN_DISABLE);</div><div class='del'>-</div><div class='del'>-	/* Setting the CAN device in Stop Mode. */</div><div class='del'>-	pch_can_set_run_mode(priv, PCH_CAN_STOP);</div><div class='del'>-</div><div class='del'>-	/* Configuring the transmit and receive buffers. */</div><div class='del'>-	pch_can_config_rx_tx_buffers(priv);</div><div class='del'>-</div><div class='del'>-	/* Restore the CAN state */</div><div class='del'>-	pch_set_bittiming(dev);</div><div class='del'>-</div><div class='del'>-	/* Listen/Active */</div><div class='del'>-	pch_can_set_optmode(priv);</div><div class='del'>-</div><div class='del'>-	/* Enabling the transmit buffer. */</div><div class='del'>-	for (i = PCH_TX_OBJ_START; i &lt;= PCH_TX_OBJ_END; i++)</div><div class='del'>-		pch_can_set_rxtx(priv, i, priv-&gt;tx_enable[i - 1], PCH_TX_IFREG);</div><div class='del'>-</div><div class='del'>-	/* Configuring the receive buffer and enabling them. */</div><div class='del'>-	for (i = PCH_RX_OBJ_START; i &lt;= PCH_RX_OBJ_END; i++) {</div><div class='del'>-		/* Restore buffer link */</div><div class='del'>-		pch_can_set_rx_buffer_link(priv, i, priv-&gt;rx_link[i - 1]);</div><div class='del'>-</div><div class='del'>-		/* Restore buffer enables */</div><div class='del'>-		pch_can_set_rxtx(priv, i, priv-&gt;rx_enable[i - 1], PCH_RX_IFREG);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Enable CAN Interrupts */</div><div class='del'>-	pch_can_set_int_custom(priv);</div><div class='del'>-</div><div class='del'>-	/* Restore Run Mode */</div><div class='del'>-	pch_can_set_run_mode(priv, PCH_CAN_RUN);</div><div class='del'>-</div><div class='del'>-	return retval;</div><div class='del'>-}</div><div class='del'>-#else</div><div class='del'>-#define pch_can_suspend NULL</div><div class='del'>-#define pch_can_resume NULL</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static int pch_can_get_berr_counter(const struct net_device *dev,</div><div class='del'>-				    struct can_berr_counter *bec)</div><div class='del'>-{</div><div class='del'>-	struct pch_can_priv *priv = netdev_priv(dev);</div><div class='del'>-	u32 errc = ioread32(&amp;priv-&gt;regs-&gt;errc);</div><div class='del'>-</div><div class='del'>-	bec-&gt;txerr = errc &amp; PCH_TEC;</div><div class='del'>-	bec-&gt;rxerr = (errc &amp; PCH_REC) &gt;&gt; 8;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int pch_can_probe(struct pci_dev *pdev,</div><div class='del'>-				   const struct pci_device_id *id)</div><div class='del'>-{</div><div class='del'>-	struct net_device *ndev;</div><div class='del'>-	struct pch_can_priv *priv;</div><div class='del'>-	int rc;</div><div class='del'>-	void __iomem *addr;</div><div class='del'>-</div><div class='del'>-	rc = pci_enable_device(pdev);</div><div class='del'>-	if (rc) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "Failed pci_enable_device %d\n", rc);</div><div class='del'>-		goto probe_exit_endev;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	rc = pci_request_regions(pdev, KBUILD_MODNAME);</div><div class='del'>-	if (rc) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "Failed pci_request_regions %d\n", rc);</div><div class='del'>-		goto probe_exit_pcireq;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	addr = pci_iomap(pdev, 1, 0);</div><div class='del'>-	if (!addr) {</div><div class='del'>-		rc = -EIO;</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "Failed pci_iomap\n");</div><div class='del'>-		goto probe_exit_ipmap;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ndev = alloc_candev(sizeof(struct pch_can_priv), PCH_TX_OBJ_END);</div><div class='del'>-	if (!ndev) {</div><div class='del'>-		rc = -ENOMEM;</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "Failed alloc_candev\n");</div><div class='del'>-		goto probe_exit_alloc_candev;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	priv = netdev_priv(ndev);</div><div class='del'>-	priv-&gt;ndev = ndev;</div><div class='del'>-	priv-&gt;regs = addr;</div><div class='del'>-	priv-&gt;dev = pdev;</div><div class='del'>-	priv-&gt;can.bittiming_const = &amp;pch_can_bittiming_const;</div><div class='del'>-	priv-&gt;can.do_set_mode = pch_can_do_set_mode;</div><div class='del'>-	priv-&gt;can.do_get_berr_counter = pch_can_get_berr_counter;</div><div class='del'>-	priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_LISTENONLY |</div><div class='del'>-				       CAN_CTRLMODE_LOOPBACK;</div><div class='del'>-	priv-&gt;tx_obj = PCH_TX_OBJ_START; /* Point head of Tx Obj */</div><div class='del'>-</div><div class='del'>-	ndev-&gt;irq = pdev-&gt;irq;</div><div class='del'>-	ndev-&gt;flags |= IFF_ECHO;</div><div class='del'>-</div><div class='del'>-	pci_set_drvdata(pdev, ndev);</div><div class='del'>-	SET_NETDEV_DEV(ndev, &amp;pdev-&gt;dev);</div><div class='del'>-	ndev-&gt;netdev_ops = &amp;pch_can_netdev_ops;</div><div class='del'>-	priv-&gt;can.clock.freq = PCH_CAN_CLK; /* Hz */</div><div class='del'>-</div><div class='del'>-	netif_napi_add(ndev, &amp;priv-&gt;napi, pch_can_poll, PCH_RX_OBJ_END);</div><div class='del'>-</div><div class='del'>-	rc = pci_enable_msi(priv-&gt;dev);</div><div class='del'>-	if (rc) {</div><div class='del'>-		netdev_err(ndev, "PCH CAN opened without MSI\n");</div><div class='del'>-		priv-&gt;use_msi = 0;</div><div class='del'>-	} else {</div><div class='del'>-		netdev_err(ndev, "PCH CAN opened with MSI\n");</div><div class='del'>-		pci_set_master(pdev);</div><div class='del'>-		priv-&gt;use_msi = 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	rc = register_candev(ndev);</div><div class='del'>-	if (rc) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "Failed register_candev %d\n", rc);</div><div class='del'>-		goto probe_exit_reg_candev;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-probe_exit_reg_candev:</div><div class='del'>-	if (priv-&gt;use_msi)</div><div class='del'>-		pci_disable_msi(priv-&gt;dev);</div><div class='del'>-	free_candev(ndev);</div><div class='del'>-probe_exit_alloc_candev:</div><div class='del'>-	pci_iounmap(pdev, addr);</div><div class='del'>-probe_exit_ipmap:</div><div class='del'>-	pci_release_regions(pdev);</div><div class='del'>-probe_exit_pcireq:</div><div class='del'>-	pci_disable_device(pdev);</div><div class='del'>-probe_exit_endev:</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct pci_driver pch_can_pci_driver = {</div><div class='del'>-	.name = "pch_can",</div><div class='del'>-	.id_table = pch_pci_tbl,</div><div class='del'>-	.probe = pch_can_probe,</div><div class='del'>-	.remove = pch_can_remove,</div><div class='del'>-	.suspend = pch_can_suspend,</div><div class='del'>-	.resume = pch_can_resume,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-module_pci_driver(pch_can_pci_driver);</div><div class='del'>-</div><div class='del'>-MODULE_DESCRIPTION("Intel EG20T PCH CAN(Controller Area Network) Driver");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='del'>-MODULE_VERSION("0.94");</div><div class='head'>diff --git a/drivers/net/can/peak_canfd/Kconfig b/drivers/net/can/peak_canfd/Kconfig<br/>new file mode 100644<br/>index 000000000000..f7e412766dbd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/peak_canfd/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/peak_canfd/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+config CAN_PEAK_PCIEFD</div><div class='add'>+	depends on PCI</div><div class='add'>+	tristate "PEAK-System PCAN-PCIe FD cards"</div><div class='add'>+	help</div><div class='add'>+	  This driver adds support for the PEAK-System PCI Express FD</div><div class='add'>+	  CAN-FD cards family.</div><div class='add'>+	  These 1x or 2x CAN-FD channels cards offer CAN 2.0 a/b as well as</div><div class='add'>+	  CAN-FD access to the CAN bus. Besides the nominal bitrate of up to</div><div class='add'>+	  1 Mbit/s, the data bytes of CAN-FD frames can be transmitted with</div><div class='add'>+	  up to 12 Mbit/s. A galvanic isolation of the CAN ports protects the</div><div class='add'>+	  electronics of the card and the respective computer against</div><div class='add'>+	  disturbances of up to 500 Volts. The PCAN-PCI Express FD can be</div><div class='add'>+	  operated with ambient temperatures in a range of -40 to +85 °C.</div><div class='head'>diff --git a/drivers/net/can/peak_canfd/Makefile b/drivers/net/can/peak_canfd/Makefile<br/>new file mode 100644<br/>index 000000000000..14719b35e0b9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/peak_canfd/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/peak_canfd/Makefile</a></div><div class='hunk'>@@ -0,0 +1,6 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+#</div><div class='add'>+# Makefile for the PEAK-System CAN-FD IP module drivers</div><div class='add'>+#</div><div class='add'>+obj-$(CONFIG_CAN_PEAK_PCIEFD) += peak_pciefd.o</div><div class='add'>+peak_pciefd-y := peak_pciefd_main.o peak_canfd.o</div><div class='head'>diff --git a/drivers/net/can/peak_canfd/peak_canfd.c b/drivers/net/can/peak_canfd/peak_canfd.c<br/>new file mode 100644<br/>index 000000000000..06cb2629f66a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/peak_canfd/peak_canfd.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/peak_canfd/peak_canfd.c</a></div><div class='hunk'>@@ -0,0 +1,836 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Copyright (C) 2007, 2011 Wolfgang Grandegger &lt;wg@grandegger.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2016-2025 PEAK System-Technik GmbH</div><div class='add'>+ * Author: Stéphane Grosjean &lt;stephane.grosjean@hms-networks.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/can.h&gt;</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+</div><div class='add'>+#include "peak_canfd_user.h"</div><div class='add'>+</div><div class='add'>+/* internal IP core cache size (used as default echo skbs max number) */</div><div class='add'>+#define PCANFD_ECHO_SKB_MAX		24</div><div class='add'>+</div><div class='add'>+/* bittiming ranges of the PEAK-System PC CAN-FD interfaces */</div><div class='add'>+static const struct can_bittiming_const peak_canfd_nominal_const = {</div><div class='add'>+	.name = "peak_canfd",</div><div class='add'>+	.tseg1_min = 1,</div><div class='add'>+	.tseg1_max = (1 &lt;&lt; PUCAN_TSLOW_TSGEG1_BITS),</div><div class='add'>+	.tseg2_min = 1,</div><div class='add'>+	.tseg2_max = (1 &lt;&lt; PUCAN_TSLOW_TSGEG2_BITS),</div><div class='add'>+	.sjw_max = (1 &lt;&lt; PUCAN_TSLOW_SJW_BITS),</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = (1 &lt;&lt; PUCAN_TSLOW_BRP_BITS),</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const peak_canfd_data_const = {</div><div class='add'>+	.name = "peak_canfd",</div><div class='add'>+	.tseg1_min = 1,</div><div class='add'>+	.tseg1_max = (1 &lt;&lt; PUCAN_TFAST_TSGEG1_BITS),</div><div class='add'>+	.tseg2_min = 1,</div><div class='add'>+	.tseg2_max = (1 &lt;&lt; PUCAN_TFAST_TSGEG2_BITS),</div><div class='add'>+	.sjw_max = (1 &lt;&lt; PUCAN_TFAST_SJW_BITS),</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = (1 &lt;&lt; PUCAN_TFAST_BRP_BITS),</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct peak_canfd_priv *pucan_init_cmd(struct peak_canfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	priv-&gt;cmd_len = 0;</div><div class='add'>+	return priv;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void *pucan_add_cmd(struct peak_canfd_priv *priv, int cmd_op)</div><div class='add'>+{</div><div class='add'>+	struct pucan_command *cmd;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;cmd_len + sizeof(*cmd) &gt; priv-&gt;cmd_maxlen)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	cmd = priv-&gt;cmd_buffer + priv-&gt;cmd_len;</div><div class='add'>+</div><div class='add'>+	/* reset all unused bit to default */</div><div class='add'>+	memset(cmd, 0, sizeof(*cmd));</div><div class='add'>+</div><div class='add'>+	cmd-&gt;opcode_channel = pucan_cmd_opcode_channel(priv-&gt;index, cmd_op);</div><div class='add'>+	priv-&gt;cmd_len += sizeof(*cmd);</div><div class='add'>+</div><div class='add'>+	return cmd;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pucan_write_cmd(struct peak_canfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;pre_cmd) {</div><div class='add'>+		err = priv-&gt;pre_cmd(priv);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = priv-&gt;write_cmd(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;post_cmd)</div><div class='add'>+		err = priv-&gt;post_cmd(priv);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* uCAN commands interface functions */</div><div class='add'>+static int pucan_set_reset_mode(struct peak_canfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	pucan_add_cmd(pucan_init_cmd(priv), PUCAN_CMD_RESET_MODE);</div><div class='add'>+	return pucan_write_cmd(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pucan_set_normal_mode(struct peak_canfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	pucan_add_cmd(pucan_init_cmd(priv), PUCAN_CMD_NORMAL_MODE);</div><div class='add'>+	err = pucan_write_cmd(priv);</div><div class='add'>+	if (!err)</div><div class='add'>+		priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pucan_set_listen_only_mode(struct peak_canfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	pucan_add_cmd(pucan_init_cmd(priv), PUCAN_CMD_LISTEN_ONLY_MODE);</div><div class='add'>+	err = pucan_write_cmd(priv);</div><div class='add'>+	if (!err)</div><div class='add'>+		priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pucan_set_timing_slow(struct peak_canfd_priv *priv,</div><div class='add'>+				 const struct can_bittiming *pbt)</div><div class='add'>+{</div><div class='add'>+	struct pucan_timing_slow *cmd;</div><div class='add'>+</div><div class='add'>+	cmd = pucan_add_cmd(pucan_init_cmd(priv), PUCAN_CMD_TIMING_SLOW);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;sjw_t = PUCAN_TSLOW_SJW_T(pbt-&gt;sjw - 1,</div><div class='add'>+				       priv-&gt;can.ctrlmode &amp;</div><div class='add'>+				       CAN_CTRLMODE_3_SAMPLES);</div><div class='add'>+	cmd-&gt;tseg1 = PUCAN_TSLOW_TSEG1(pbt-&gt;prop_seg + pbt-&gt;phase_seg1 - 1);</div><div class='add'>+	cmd-&gt;tseg2 = PUCAN_TSLOW_TSEG2(pbt-&gt;phase_seg2 - 1);</div><div class='add'>+	cmd-&gt;brp = cpu_to_le16(PUCAN_TSLOW_BRP(pbt-&gt;brp - 1));</div><div class='add'>+</div><div class='add'>+	cmd-&gt;ewl = 96;	/* default */</div><div class='add'>+</div><div class='add'>+	netdev_dbg(priv-&gt;ndev,</div><div class='add'>+		   "nominal: brp=%u tseg1=%u tseg2=%u sjw=%u\n",</div><div class='add'>+		   le16_to_cpu(cmd-&gt;brp), cmd-&gt;tseg1, cmd-&gt;tseg2, cmd-&gt;sjw_t);</div><div class='add'>+</div><div class='add'>+	return pucan_write_cmd(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pucan_set_timing_fast(struct peak_canfd_priv *priv,</div><div class='add'>+				 const struct can_bittiming *pbt)</div><div class='add'>+{</div><div class='add'>+	struct pucan_timing_fast *cmd;</div><div class='add'>+</div><div class='add'>+	cmd = pucan_add_cmd(pucan_init_cmd(priv), PUCAN_CMD_TIMING_FAST);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;sjw = PUCAN_TFAST_SJW(pbt-&gt;sjw - 1);</div><div class='add'>+	cmd-&gt;tseg1 = PUCAN_TFAST_TSEG1(pbt-&gt;prop_seg + pbt-&gt;phase_seg1 - 1);</div><div class='add'>+	cmd-&gt;tseg2 = PUCAN_TFAST_TSEG2(pbt-&gt;phase_seg2 - 1);</div><div class='add'>+	cmd-&gt;brp = cpu_to_le16(PUCAN_TFAST_BRP(pbt-&gt;brp - 1));</div><div class='add'>+</div><div class='add'>+	netdev_dbg(priv-&gt;ndev,</div><div class='add'>+		   "data: brp=%u tseg1=%u tseg2=%u sjw=%u\n",</div><div class='add'>+		   le16_to_cpu(cmd-&gt;brp), cmd-&gt;tseg1, cmd-&gt;tseg2, cmd-&gt;sjw);</div><div class='add'>+</div><div class='add'>+	return pucan_write_cmd(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pucan_set_std_filter(struct peak_canfd_priv *priv, u8 row, u32 mask)</div><div class='add'>+{</div><div class='add'>+	struct pucan_std_filter *cmd;</div><div class='add'>+</div><div class='add'>+	cmd = pucan_add_cmd(pucan_init_cmd(priv), PUCAN_CMD_SET_STD_FILTER);</div><div class='add'>+</div><div class='add'>+	/* all the 11-bits CAN ID values are represented by one bit in a</div><div class='add'>+	 * 64 rows array of 32 bits: the upper 6 bits of the CAN ID select the</div><div class='add'>+	 * row while the lowest 5 bits select the bit in that row.</div><div class='add'>+	 *</div><div class='add'>+	 * bit	filter</div><div class='add'>+	 * 1	passed</div><div class='add'>+	 * 0	discarded</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	/* select the row */</div><div class='add'>+	cmd-&gt;idx = row;</div><div class='add'>+</div><div class='add'>+	/* set/unset bits in the row */</div><div class='add'>+	cmd-&gt;mask = cpu_to_le32(mask);</div><div class='add'>+</div><div class='add'>+	return pucan_write_cmd(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pucan_tx_abort(struct peak_canfd_priv *priv, u16 flags)</div><div class='add'>+{</div><div class='add'>+	struct pucan_tx_abort *cmd;</div><div class='add'>+</div><div class='add'>+	cmd = pucan_add_cmd(pucan_init_cmd(priv), PUCAN_CMD_TX_ABORT);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;flags = cpu_to_le16(flags);</div><div class='add'>+</div><div class='add'>+	return pucan_write_cmd(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pucan_clr_err_counters(struct peak_canfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct pucan_wr_err_cnt *cmd;</div><div class='add'>+</div><div class='add'>+	cmd = pucan_add_cmd(pucan_init_cmd(priv), PUCAN_CMD_WR_ERR_CNT);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;sel_mask = cpu_to_le16(PUCAN_WRERRCNT_TE | PUCAN_WRERRCNT_RE);</div><div class='add'>+	cmd-&gt;tx_counter = 0;</div><div class='add'>+	cmd-&gt;rx_counter = 0;</div><div class='add'>+</div><div class='add'>+	return pucan_write_cmd(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pucan_set_options(struct peak_canfd_priv *priv, u16 opt_mask)</div><div class='add'>+{</div><div class='add'>+	struct pucan_options *cmd;</div><div class='add'>+</div><div class='add'>+	cmd = pucan_add_cmd(pucan_init_cmd(priv), PUCAN_CMD_SET_EN_OPTION);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;options = cpu_to_le16(opt_mask);</div><div class='add'>+</div><div class='add'>+	return pucan_write_cmd(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pucan_clr_options(struct peak_canfd_priv *priv, u16 opt_mask)</div><div class='add'>+{</div><div class='add'>+	struct pucan_options *cmd;</div><div class='add'>+</div><div class='add'>+	cmd = pucan_add_cmd(pucan_init_cmd(priv), PUCAN_CMD_CLR_DIS_OPTION);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;options = cpu_to_le16(opt_mask);</div><div class='add'>+</div><div class='add'>+	return pucan_write_cmd(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pucan_setup_rx_barrier(struct peak_canfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	pucan_add_cmd(pucan_init_cmd(priv), PUCAN_CMD_RX_BARRIER);</div><div class='add'>+</div><div class='add'>+	return pucan_write_cmd(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pucan_netif_rx(struct sk_buff *skb, __le32 ts_low, __le32 ts_high)</div><div class='add'>+{</div><div class='add'>+	struct skb_shared_hwtstamps *hwts = skb_hwtstamps(skb);</div><div class='add'>+	u64 ts_us;</div><div class='add'>+</div><div class='add'>+	ts_us = (u64)le32_to_cpu(ts_high) &lt;&lt; 32;</div><div class='add'>+	ts_us |= le32_to_cpu(ts_low);</div><div class='add'>+</div><div class='add'>+	/* IP core timestamps are µs. */</div><div class='add'>+	hwts-&gt;hwtstamp = ns_to_ktime(ts_us * NSEC_PER_USEC);</div><div class='add'>+</div><div class='add'>+	return netif_rx(skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* handle the reception of one CAN frame */</div><div class='add'>+static int pucan_handle_can_rx(struct peak_canfd_priv *priv,</div><div class='add'>+			       struct pucan_rx_msg *msg)</div><div class='add'>+{</div><div class='add'>+	struct net_device_stats *stats = &amp;priv-&gt;ndev-&gt;stats;</div><div class='add'>+	struct canfd_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	const u16 rx_msg_flags = le16_to_cpu(msg-&gt;flags);</div><div class='add'>+	u8 cf_len;</div><div class='add'>+</div><div class='add'>+	if (rx_msg_flags &amp; PUCAN_MSG_EXT_DATA_LEN)</div><div class='add'>+		cf_len = can_fd_dlc2len(pucan_msg_get_dlc(msg));</div><div class='add'>+	else</div><div class='add'>+		cf_len = can_cc_dlc2len(pucan_msg_get_dlc(msg));</div><div class='add'>+</div><div class='add'>+	/* if this frame is an echo, */</div><div class='add'>+	if (rx_msg_flags &amp; PUCAN_MSG_LOOPED_BACK) {</div><div class='add'>+		unsigned long flags;</div><div class='add'>+</div><div class='add'>+		spin_lock_irqsave(&amp;priv-&gt;echo_lock, flags);</div><div class='add'>+</div><div class='add'>+		/* count bytes of the echo instead of skb */</div><div class='add'>+		stats-&gt;tx_bytes += can_get_echo_skb(priv-&gt;ndev, msg-&gt;client, NULL);</div><div class='add'>+		stats-&gt;tx_packets++;</div><div class='add'>+</div><div class='add'>+		/* restart tx queue (a slot is free) */</div><div class='add'>+		netif_wake_queue(priv-&gt;ndev);</div><div class='add'>+</div><div class='add'>+		spin_unlock_irqrestore(&amp;priv-&gt;echo_lock, flags);</div><div class='add'>+</div><div class='add'>+		/* if this frame is only an echo, stop here. Otherwise,</div><div class='add'>+		 * continue to push this application self-received frame into</div><div class='add'>+		 * its own rx queue.</div><div class='add'>+		 */</div><div class='add'>+		if (!(rx_msg_flags &amp; PUCAN_MSG_SELF_RECEIVE))</div><div class='add'>+			return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* otherwise, it should be pushed into rx fifo */</div><div class='add'>+	if (rx_msg_flags &amp; PUCAN_MSG_EXT_DATA_LEN) {</div><div class='add'>+		/* CANFD frame case */</div><div class='add'>+		skb = alloc_canfd_skb(priv-&gt;ndev, &amp;cf);</div><div class='add'>+		if (!skb)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		if (rx_msg_flags &amp; PUCAN_MSG_BITRATE_SWITCH)</div><div class='add'>+			cf-&gt;flags |= CANFD_BRS;</div><div class='add'>+</div><div class='add'>+		if (rx_msg_flags &amp; PUCAN_MSG_ERROR_STATE_IND)</div><div class='add'>+			cf-&gt;flags |= CANFD_ESI;</div><div class='add'>+	} else {</div><div class='add'>+		/* CAN 2.0 frame case */</div><div class='add'>+		skb = alloc_can_skb(priv-&gt;ndev, (struct can_frame **)&amp;cf);</div><div class='add'>+		if (!skb)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cf-&gt;can_id = le32_to_cpu(msg-&gt;can_id);</div><div class='add'>+	cf-&gt;len = cf_len;</div><div class='add'>+</div><div class='add'>+	if (rx_msg_flags &amp; PUCAN_MSG_EXT_ID)</div><div class='add'>+		cf-&gt;can_id |= CAN_EFF_FLAG;</div><div class='add'>+</div><div class='add'>+	if (rx_msg_flags &amp; PUCAN_MSG_RTR) {</div><div class='add'>+		cf-&gt;can_id |= CAN_RTR_FLAG;</div><div class='add'>+	} else {</div><div class='add'>+		memcpy(cf-&gt;data, msg-&gt;d, cf-&gt;len);</div><div class='add'>+</div><div class='add'>+		stats-&gt;rx_bytes += cf-&gt;len;</div><div class='add'>+	}</div><div class='add'>+	stats-&gt;rx_packets++;</div><div class='add'>+</div><div class='add'>+	pucan_netif_rx(skb, msg-&gt;ts_low, msg-&gt;ts_high);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* handle rx/tx error counters notification */</div><div class='add'>+static int pucan_handle_error(struct peak_canfd_priv *priv,</div><div class='add'>+			      struct pucan_error_msg *msg)</div><div class='add'>+{</div><div class='add'>+	priv-&gt;bec.txerr = msg-&gt;tx_err_cnt;</div><div class='add'>+	priv-&gt;bec.rxerr = msg-&gt;rx_err_cnt;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* handle status notification */</div><div class='add'>+static int pucan_handle_status(struct peak_canfd_priv *priv,</div><div class='add'>+			       struct pucan_status_msg *msg)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = priv-&gt;ndev;</div><div class='add'>+	struct net_device_stats *stats = &amp;ndev-&gt;stats;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	/* this STATUS is the CNF of the RX_BARRIER: Tx path can be setup */</div><div class='add'>+	if (pucan_status_is_rx_barrier(msg)) {</div><div class='add'>+		if (priv-&gt;enable_tx_path) {</div><div class='add'>+			int err = priv-&gt;enable_tx_path(priv);</div><div class='add'>+</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* wake network queue up (echo_skb array is empty) */</div><div class='add'>+		netif_wake_queue(ndev);</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_err_skb(ndev, &amp;cf);</div><div class='add'>+</div><div class='add'>+	/* test state error bits according to their priority */</div><div class='add'>+	if (pucan_status_is_busoff(msg)) {</div><div class='add'>+		netdev_dbg(ndev, "Bus-off entry status\n");</div><div class='add'>+		priv-&gt;can.state = CAN_STATE_BUS_OFF;</div><div class='add'>+		priv-&gt;can.can_stats.bus_off++;</div><div class='add'>+		can_bus_off(ndev);</div><div class='add'>+		if (skb)</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_BUSOFF;</div><div class='add'>+</div><div class='add'>+	} else if (pucan_status_is_passive(msg)) {</div><div class='add'>+		netdev_dbg(ndev, "Error passive status\n");</div><div class='add'>+		priv-&gt;can.state = CAN_STATE_ERROR_PASSIVE;</div><div class='add'>+		priv-&gt;can.can_stats.error_passive++;</div><div class='add'>+		if (skb) {</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_CRTL | CAN_ERR_CNT;</div><div class='add'>+			cf-&gt;data[1] = (priv-&gt;bec.txerr &gt; priv-&gt;bec.rxerr) ?</div><div class='add'>+					CAN_ERR_CRTL_TX_PASSIVE :</div><div class='add'>+					CAN_ERR_CRTL_RX_PASSIVE;</div><div class='add'>+			cf-&gt;data[6] = priv-&gt;bec.txerr;</div><div class='add'>+			cf-&gt;data[7] = priv-&gt;bec.rxerr;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+	} else if (pucan_status_is_warning(msg)) {</div><div class='add'>+		netdev_dbg(ndev, "Error warning status\n");</div><div class='add'>+		priv-&gt;can.state = CAN_STATE_ERROR_WARNING;</div><div class='add'>+		priv-&gt;can.can_stats.error_warning++;</div><div class='add'>+		if (skb) {</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_CRTL | CAN_ERR_CNT;</div><div class='add'>+			cf-&gt;data[1] = (priv-&gt;bec.txerr &gt; priv-&gt;bec.rxerr) ?</div><div class='add'>+					CAN_ERR_CRTL_TX_WARNING :</div><div class='add'>+					CAN_ERR_CRTL_RX_WARNING;</div><div class='add'>+			cf-&gt;data[6] = priv-&gt;bec.txerr;</div><div class='add'>+			cf-&gt;data[7] = priv-&gt;bec.rxerr;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+	} else if (priv-&gt;can.state != CAN_STATE_ERROR_ACTIVE) {</div><div class='add'>+		/* back to ERROR_ACTIVE */</div><div class='add'>+		netdev_dbg(ndev, "Error active status\n");</div><div class='add'>+		can_change_state(ndev, cf, CAN_STATE_ERROR_ACTIVE,</div><div class='add'>+				 CAN_STATE_ERROR_ACTIVE);</div><div class='add'>+	} else {</div><div class='add'>+		dev_kfree_skb(skb);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!skb) {</div><div class='add'>+		stats-&gt;rx_dropped++;</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pucan_netif_rx(skb, msg-&gt;ts_low, msg-&gt;ts_high);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* handle uCAN Rx overflow notification */</div><div class='add'>+static int pucan_handle_cache_critical(struct peak_canfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct net_device_stats *stats = &amp;priv-&gt;ndev-&gt;stats;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	stats-&gt;rx_over_errors++;</div><div class='add'>+	stats-&gt;rx_errors++;</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_err_skb(priv-&gt;ndev, &amp;cf);</div><div class='add'>+	if (!skb) {</div><div class='add'>+		stats-&gt;rx_dropped++;</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cf-&gt;can_id |= CAN_ERR_CRTL | CAN_ERR_CNT;</div><div class='add'>+	cf-&gt;data[1] = CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='add'>+</div><div class='add'>+	cf-&gt;data[6] = priv-&gt;bec.txerr;</div><div class='add'>+	cf-&gt;data[7] = priv-&gt;bec.rxerr;</div><div class='add'>+</div><div class='add'>+	netif_rx(skb);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* handle a single uCAN message */</div><div class='add'>+int peak_canfd_handle_msg(struct peak_canfd_priv *priv,</div><div class='add'>+			  struct pucan_rx_msg *msg)</div><div class='add'>+{</div><div class='add'>+	u16 msg_type = le16_to_cpu(msg-&gt;type);</div><div class='add'>+	int msg_size = le16_to_cpu(msg-&gt;size);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!msg_size || !msg_type) {</div><div class='add'>+		/* null packet found: end of list */</div><div class='add'>+		goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (msg_type) {</div><div class='add'>+	case PUCAN_MSG_CAN_RX:</div><div class='add'>+		err = pucan_handle_can_rx(priv, (struct pucan_rx_msg *)msg);</div><div class='add'>+		break;</div><div class='add'>+	case PUCAN_MSG_ERROR:</div><div class='add'>+		err = pucan_handle_error(priv, (struct pucan_error_msg *)msg);</div><div class='add'>+		break;</div><div class='add'>+	case PUCAN_MSG_STATUS:</div><div class='add'>+		err = pucan_handle_status(priv, (struct pucan_status_msg *)msg);</div><div class='add'>+		break;</div><div class='add'>+	case PUCAN_MSG_CACHE_CRITICAL:</div><div class='add'>+		err = pucan_handle_cache_critical(priv);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		err = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+exit:</div><div class='add'>+	return msg_size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* handle a list of rx_count messages from rx_msg memory address */</div><div class='add'>+int peak_canfd_handle_msgs_list(struct peak_canfd_priv *priv,</div><div class='add'>+				struct pucan_rx_msg *msg_list, int msg_count)</div><div class='add'>+{</div><div class='add'>+	void *msg_ptr = msg_list;</div><div class='add'>+	int i, msg_size = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; msg_count; i++) {</div><div class='add'>+		msg_size = peak_canfd_handle_msg(priv, msg_ptr);</div><div class='add'>+</div><div class='add'>+		/* a null packet can be found at the end of a list */</div><div class='add'>+		if (msg_size &lt;= 0)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		msg_ptr += ALIGN(msg_size, 4);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (msg_size &lt; 0)</div><div class='add'>+		return msg_size;</div><div class='add'>+</div><div class='add'>+	return i;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int peak_canfd_start(struct peak_canfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = pucan_clr_err_counters(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	priv-&gt;echo_idx = 0;</div><div class='add'>+</div><div class='add'>+	priv-&gt;bec.txerr = 0;</div><div class='add'>+	priv-&gt;bec.rxerr = 0;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LISTENONLY)</div><div class='add'>+		err = pucan_set_listen_only_mode(priv);</div><div class='add'>+	else</div><div class='add'>+		err = pucan_set_normal_mode(priv);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void peak_canfd_stop(struct peak_canfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* go back to RESET mode */</div><div class='add'>+	err = pucan_set_reset_mode(priv);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(priv-&gt;ndev, "channel %u reset failed\n",</div><div class='add'>+			   priv-&gt;index);</div><div class='add'>+	} else {</div><div class='add'>+		/* abort last Tx (MUST be done in RESET mode only!) */</div><div class='add'>+		pucan_tx_abort(priv, PUCAN_TX_ABORT_FLUSH);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int peak_canfd_set_mode(struct net_device *ndev, enum can_mode mode)</div><div class='add'>+{</div><div class='add'>+	struct peak_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case CAN_MODE_START:</div><div class='add'>+		peak_canfd_start(priv);</div><div class='add'>+		netif_wake_queue(ndev);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int peak_canfd_get_berr_counter(const struct net_device *ndev,</div><div class='add'>+				       struct can_berr_counter *bec)</div><div class='add'>+{</div><div class='add'>+	struct peak_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	*bec = priv-&gt;bec;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int peak_canfd_open(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct peak_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	int i, err = 0;</div><div class='add'>+</div><div class='add'>+	err = open_candev(ndev);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(ndev, "open_candev() failed, error %d\n", err);</div><div class='add'>+		goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = pucan_set_reset_mode(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_close;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD) {</div><div class='add'>+		if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD_NON_ISO)</div><div class='add'>+			err = pucan_clr_options(priv, PUCAN_OPTION_CANDFDISO);</div><div class='add'>+		else</div><div class='add'>+			err = pucan_set_options(priv, PUCAN_OPTION_CANDFDISO);</div><div class='add'>+</div><div class='add'>+		if (err)</div><div class='add'>+			goto err_close;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* set option: get rx/tx error counters */</div><div class='add'>+	err = pucan_set_options(priv, PUCAN_OPTION_ERROR);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_close;</div><div class='add'>+</div><div class='add'>+	/* accept all standard CAN ID */</div><div class='add'>+	for (i = 0; i &lt;= PUCAN_FLTSTD_ROW_IDX_MAX; i++)</div><div class='add'>+		pucan_set_std_filter(priv, i, 0xffffffff);</div><div class='add'>+</div><div class='add'>+	err = peak_canfd_start(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_close;</div><div class='add'>+</div><div class='add'>+	/* receiving the RB status says when Tx path is ready */</div><div class='add'>+	err = pucan_setup_rx_barrier(priv);</div><div class='add'>+	if (!err)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+err_close:</div><div class='add'>+	close_candev(ndev);</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int peak_canfd_set_bittiming(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct peak_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	return pucan_set_timing_slow(priv, &amp;priv-&gt;can.bittiming);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int peak_canfd_set_data_bittiming(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct peak_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	return pucan_set_timing_fast(priv, &amp;priv-&gt;can.fd.data_bittiming);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int peak_canfd_close(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct peak_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(ndev);</div><div class='add'>+	peak_canfd_stop(priv);</div><div class='add'>+	close_candev(ndev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static netdev_tx_t peak_canfd_start_xmit(struct sk_buff *skb,</div><div class='add'>+					 struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct peak_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct net_device_stats *stats = &amp;ndev-&gt;stats;</div><div class='add'>+	struct canfd_frame *cf = (struct canfd_frame *)skb-&gt;data;</div><div class='add'>+	struct pucan_tx_msg *msg;</div><div class='add'>+	u16 msg_size, msg_flags;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	bool should_stop_tx_queue;</div><div class='add'>+	int room_left;</div><div class='add'>+	u8 len;</div><div class='add'>+</div><div class='add'>+	if (can_dev_dropped_skb(ndev, skb))</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+	msg_size = ALIGN(sizeof(*msg) + cf-&gt;len, 4);</div><div class='add'>+	msg = priv-&gt;alloc_tx_msg(priv, msg_size, &amp;room_left);</div><div class='add'>+</div><div class='add'>+	/* should never happen except under bus-off condition and (auto-)restart</div><div class='add'>+	 * mechanism</div><div class='add'>+	 */</div><div class='add'>+	if (!msg) {</div><div class='add'>+		stats-&gt;tx_dropped++;</div><div class='add'>+		netif_stop_queue(ndev);</div><div class='add'>+		return NETDEV_TX_BUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	msg-&gt;size = cpu_to_le16(msg_size);</div><div class='add'>+	msg-&gt;type = cpu_to_le16(PUCAN_MSG_CAN_TX);</div><div class='add'>+	msg_flags = 0;</div><div class='add'>+</div><div class='add'>+	if (cf-&gt;can_id &amp; CAN_EFF_FLAG) {</div><div class='add'>+		msg_flags |= PUCAN_MSG_EXT_ID;</div><div class='add'>+		msg-&gt;can_id = cpu_to_le32(cf-&gt;can_id &amp; CAN_EFF_MASK);</div><div class='add'>+	} else {</div><div class='add'>+		msg-&gt;can_id = cpu_to_le32(cf-&gt;can_id &amp; CAN_SFF_MASK);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (can_is_canfd_skb(skb)) {</div><div class='add'>+		/* CAN FD frame format */</div><div class='add'>+		len = can_fd_len2dlc(cf-&gt;len);</div><div class='add'>+</div><div class='add'>+		msg_flags |= PUCAN_MSG_EXT_DATA_LEN;</div><div class='add'>+</div><div class='add'>+		if (cf-&gt;flags &amp; CANFD_BRS)</div><div class='add'>+			msg_flags |= PUCAN_MSG_BITRATE_SWITCH;</div><div class='add'>+</div><div class='add'>+		if (cf-&gt;flags &amp; CANFD_ESI)</div><div class='add'>+			msg_flags |= PUCAN_MSG_ERROR_STATE_IND;</div><div class='add'>+	} else {</div><div class='add'>+		/* CAN 2.0 frame format */</div><div class='add'>+		len = cf-&gt;len;</div><div class='add'>+</div><div class='add'>+		if (cf-&gt;can_id &amp; CAN_RTR_FLAG)</div><div class='add'>+			msg_flags |= PUCAN_MSG_RTR;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* always ask loopback for echo management */</div><div class='add'>+	msg_flags |= PUCAN_MSG_LOOPED_BACK;</div><div class='add'>+</div><div class='add'>+	/* set driver specific bit to differentiate with application loopback */</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LOOPBACK)</div><div class='add'>+		msg_flags |= PUCAN_MSG_SELF_RECEIVE;</div><div class='add'>+</div><div class='add'>+	msg-&gt;flags = cpu_to_le16(msg_flags);</div><div class='add'>+	msg-&gt;channel_dlc = PUCAN_MSG_CHANNEL_DLC(priv-&gt;index, len);</div><div class='add'>+	memcpy(msg-&gt;d, cf-&gt;data, cf-&gt;len);</div><div class='add'>+</div><div class='add'>+	/* struct msg client field is used as an index in the echo skbs ring */</div><div class='add'>+	msg-&gt;client = priv-&gt;echo_idx;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;echo_lock, flags);</div><div class='add'>+</div><div class='add'>+	/* prepare and save echo skb in internal slot */</div><div class='add'>+	can_put_echo_skb(skb, ndev, priv-&gt;echo_idx, 0);</div><div class='add'>+</div><div class='add'>+	/* move echo index to the next slot */</div><div class='add'>+	priv-&gt;echo_idx = (priv-&gt;echo_idx + 1) % priv-&gt;can.echo_skb_max;</div><div class='add'>+</div><div class='add'>+	/* if next slot is not free, stop network queue (no slot free in echo</div><div class='add'>+	 * skb ring means that the controller did not write these frames on</div><div class='add'>+	 * the bus: no need to continue).</div><div class='add'>+	 */</div><div class='add'>+	should_stop_tx_queue = !!(priv-&gt;can.echo_skb[priv-&gt;echo_idx]);</div><div class='add'>+</div><div class='add'>+	/* stop network tx queue if not enough room to save one more msg too */</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD)</div><div class='add'>+		should_stop_tx_queue |= (room_left &lt;</div><div class='add'>+					(sizeof(*msg) + CANFD_MAX_DLEN));</div><div class='add'>+	else</div><div class='add'>+		should_stop_tx_queue |= (room_left &lt;</div><div class='add'>+					(sizeof(*msg) + CAN_MAX_DLEN));</div><div class='add'>+</div><div class='add'>+	if (should_stop_tx_queue)</div><div class='add'>+		netif_stop_queue(ndev);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;echo_lock, flags);</div><div class='add'>+</div><div class='add'>+	/* write the skb on the interface */</div><div class='add'>+	priv-&gt;write_tx_msg(priv, msg);</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int peak_eth_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+				 struct kernel_hwtstamp_config *config)</div><div class='add'>+{</div><div class='add'>+	config-&gt;tx_type = HWTSTAMP_TX_OFF;</div><div class='add'>+	config-&gt;rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int peak_eth_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+				 struct kernel_hwtstamp_config *config,</div><div class='add'>+				 struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	if (config-&gt;tx_type == HWTSTAMP_TX_OFF &amp;&amp;</div><div class='add'>+	    config-&gt;rx_filter == HWTSTAMP_FILTER_ALL)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	NL_SET_ERR_MSG_MOD(extack, "Only RX HWTSTAMP_FILTER_ALL is supported");</div><div class='add'>+	return -ERANGE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops peak_canfd_netdev_ops = {</div><div class='add'>+	.ndo_open = peak_canfd_open,</div><div class='add'>+	.ndo_stop = peak_canfd_close,</div><div class='add'>+	.ndo_start_xmit = peak_canfd_start_xmit,</div><div class='add'>+	.ndo_hwtstamp_get = peak_eth_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set = peak_eth_hwtstamp_set,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int peak_get_ts_info(struct net_device *dev,</div><div class='add'>+			    struct kernel_ethtool_ts_info *info)</div><div class='add'>+{</div><div class='add'>+	info-&gt;so_timestamping =</div><div class='add'>+		SOF_TIMESTAMPING_TX_SOFTWARE |</div><div class='add'>+		SOF_TIMESTAMPING_RX_HARDWARE |</div><div class='add'>+		SOF_TIMESTAMPING_RAW_HARDWARE;</div><div class='add'>+	info-&gt;tx_types = BIT(HWTSTAMP_TX_OFF);</div><div class='add'>+	info-&gt;rx_filters = BIT(HWTSTAMP_FILTER_ALL);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops peak_canfd_ethtool_ops = {</div><div class='add'>+	.get_ts_info = peak_get_ts_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct net_device *alloc_peak_canfd_dev(int sizeof_priv, int index,</div><div class='add'>+					int echo_skb_max)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	struct peak_canfd_priv *priv;</div><div class='add'>+</div><div class='add'>+	/* we DO support local echo */</div><div class='add'>+	if (echo_skb_max &lt; 0)</div><div class='add'>+		echo_skb_max = PCANFD_ECHO_SKB_MAX;</div><div class='add'>+</div><div class='add'>+	/* allocate the candev object */</div><div class='add'>+	ndev = alloc_candev(sizeof_priv, echo_skb_max);</div><div class='add'>+	if (!ndev)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	/* complete now socket-can initialization side */</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='add'>+	priv-&gt;can.bittiming_const = &amp;peak_canfd_nominal_const;</div><div class='add'>+	priv-&gt;can.fd.data_bittiming_const = &amp;peak_canfd_data_const;</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.do_set_mode = peak_canfd_set_mode;</div><div class='add'>+	priv-&gt;can.do_get_berr_counter = peak_canfd_get_berr_counter;</div><div class='add'>+	priv-&gt;can.do_set_bittiming = peak_canfd_set_bittiming;</div><div class='add'>+	priv-&gt;can.fd.do_set_data_bittiming = peak_canfd_set_data_bittiming;</div><div class='add'>+	priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK |</div><div class='add'>+				       CAN_CTRLMODE_LISTENONLY |</div><div class='add'>+				       CAN_CTRLMODE_3_SAMPLES |</div><div class='add'>+				       CAN_CTRLMODE_FD |</div><div class='add'>+				       CAN_CTRLMODE_FD_NON_ISO |</div><div class='add'>+				       CAN_CTRLMODE_BERR_REPORTING;</div><div class='add'>+</div><div class='add'>+	priv-&gt;ndev = ndev;</div><div class='add'>+	priv-&gt;index = index;</div><div class='add'>+	priv-&gt;cmd_len = 0;</div><div class='add'>+	spin_lock_init(&amp;priv-&gt;echo_lock);</div><div class='add'>+</div><div class='add'>+	ndev-&gt;flags |= IFF_ECHO;</div><div class='add'>+	ndev-&gt;netdev_ops = &amp;peak_canfd_netdev_ops;</div><div class='add'>+	ndev-&gt;ethtool_ops = &amp;peak_canfd_ethtool_ops;</div><div class='add'>+	ndev-&gt;dev_id = index;</div><div class='add'>+</div><div class='add'>+	return ndev;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/can/peak_canfd/peak_canfd_user.h b/drivers/net/can/peak_canfd/peak_canfd_user.h<br/>new file mode 100644<br/>index 000000000000..60c6542028cf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/peak_canfd/peak_canfd_user.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/peak_canfd/peak_canfd_user.h</a></div><div class='hunk'>@@ -0,0 +1,46 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* CAN driver for PEAK System micro-CAN based adapters</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2003-2025 PEAK System-Technik GmbH</div><div class='add'>+ * Author: Stéphane Grosjean &lt;stephane.grosjean@hms-networks.com&gt;</div><div class='add'>+ */</div><div class='add'>+#ifndef PEAK_CANFD_USER_H</div><div class='add'>+#define PEAK_CANFD_USER_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/can/dev/peak_canfd.h&gt;</div><div class='add'>+</div><div class='add'>+#define PCANFD_ECHO_SKB_DEF		-1</div><div class='add'>+</div><div class='add'>+/* data structure private to each uCAN interface */</div><div class='add'>+struct peak_canfd_priv {</div><div class='add'>+	struct can_priv can;		/* socket-can private data */</div><div class='add'>+	struct net_device *ndev;	/* network device */</div><div class='add'>+	int index;			/* channel index */</div><div class='add'>+</div><div class='add'>+	struct can_berr_counter bec;	/* rx/tx err counters */</div><div class='add'>+</div><div class='add'>+	int echo_idx;			/* echo skb free slot index */</div><div class='add'>+	spinlock_t echo_lock;</div><div class='add'>+</div><div class='add'>+	int cmd_len;</div><div class='add'>+	void *cmd_buffer;</div><div class='add'>+	int cmd_maxlen;</div><div class='add'>+</div><div class='add'>+	int (*pre_cmd)(struct peak_canfd_priv *priv);</div><div class='add'>+	int (*write_cmd)(struct peak_canfd_priv *priv);</div><div class='add'>+	int (*post_cmd)(struct peak_canfd_priv *priv);</div><div class='add'>+</div><div class='add'>+	int (*enable_tx_path)(struct peak_canfd_priv *priv);</div><div class='add'>+	void *(*alloc_tx_msg)(struct peak_canfd_priv *priv, u16 msg_size,</div><div class='add'>+			      int *room_left);</div><div class='add'>+	int (*write_tx_msg)(struct peak_canfd_priv *priv,</div><div class='add'>+			    struct pucan_tx_msg *msg);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct net_device *alloc_peak_canfd_dev(int sizeof_priv, int index,</div><div class='add'>+					int echo_skb_max);</div><div class='add'>+int peak_canfd_handle_msg(struct peak_canfd_priv *priv,</div><div class='add'>+			  struct pucan_rx_msg *msg);</div><div class='add'>+int peak_canfd_handle_msgs_list(struct peak_canfd_priv *priv,</div><div class='add'>+				struct pucan_rx_msg *rx_msg, int rx_count);</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/can/peak_canfd/peak_pciefd_main.c b/drivers/net/can/peak_canfd/peak_pciefd_main.c<br/>new file mode 100644<br/>index 000000000000..93558e33bc02<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/peak_canfd/peak_pciefd_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/peak_canfd/peak_pciefd_main.c</a></div><div class='hunk'>@@ -0,0 +1,866 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Copyright (C) 2007, 2011 Wolfgang Grandegger &lt;wg@grandegger.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Derived from the PCAN project file driver/src/pcan_pci.c:</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2001-2025 PEAK System-Technik GmbH</div><div class='add'>+ * Author: Stéphane Grosjean &lt;stephane.grosjean@hms-networks.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/can.h&gt;</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+</div><div class='add'>+#include "peak_canfd_user.h"</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Stéphane Grosjean &lt;stephane.grosjean@hms-networks.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Socket-CAN driver for PEAK PCAN PCIe/M.2 FD family cards");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='add'>+</div><div class='add'>+#define PCIEFD_DRV_NAME		"peak_pciefd"</div><div class='add'>+</div><div class='add'>+#define PEAK_PCI_VENDOR_ID	0x001c	/* The PCI device and vendor IDs */</div><div class='add'>+#define PEAK_PCIEFD_ID		0x0013	/* for PCIe slot cards */</div><div class='add'>+#define PCAN_CPCIEFD_ID		0x0014	/* for Compact-PCI Serial slot cards */</div><div class='add'>+#define PCAN_PCIE104FD_ID	0x0017	/* for PCIe-104 Express slot cards */</div><div class='add'>+#define PCAN_MINIPCIEFD_ID      0x0018	/* for mini-PCIe slot cards */</div><div class='add'>+#define PCAN_PCIEFD_OEM_ID      0x0019	/* for PCIe slot OEM cards */</div><div class='add'>+#define PCAN_M2_ID		0x001a	/* for M2 slot cards */</div><div class='add'>+</div><div class='add'>+/* PEAK PCIe board access description */</div><div class='add'>+#define PCIEFD_BAR0_SIZE		(64 * 1024)</div><div class='add'>+#define PCIEFD_RX_DMA_SIZE		(4 * 1024)</div><div class='add'>+#define PCIEFD_TX_DMA_SIZE		(4 * 1024)</div><div class='add'>+</div><div class='add'>+#define PCIEFD_TX_PAGE_SIZE		(2 * 1024)</div><div class='add'>+</div><div class='add'>+/* System Control Registers */</div><div class='add'>+#define PCIEFD_REG_SYS_CTL_SET		0x0000	/* set bits */</div><div class='add'>+#define PCIEFD_REG_SYS_CTL_CLR		0x0004	/* clear bits */</div><div class='add'>+</div><div class='add'>+/* Version info registers */</div><div class='add'>+#define PCIEFD_REG_SYS_VER1		0x0040	/* version reg #1 */</div><div class='add'>+#define PCIEFD_REG_SYS_VER2		0x0044	/* version reg #2 */</div><div class='add'>+</div><div class='add'>+#define PCIEFD_FW_VERSION(x, y, z)	(((u32)(x) &lt;&lt; 24) | \</div><div class='add'>+					 ((u32)(y) &lt;&lt; 16) | \</div><div class='add'>+					 ((u32)(z) &lt;&lt; 8))</div><div class='add'>+</div><div class='add'>+/* System Control Registers Bits */</div><div class='add'>+#define PCIEFD_SYS_CTL_TS_RST		0x00000001	/* timestamp clock */</div><div class='add'>+#define PCIEFD_SYS_CTL_CLK_EN		0x00000002	/* system clock */</div><div class='add'>+</div><div class='add'>+/* CAN-FD channel addresses */</div><div class='add'>+#define PCIEFD_CANX_OFF(c)		(((c) + 1) * 0x1000)</div><div class='add'>+</div><div class='add'>+#define PCIEFD_ECHO_SKB_MAX		PCANFD_ECHO_SKB_DEF</div><div class='add'>+</div><div class='add'>+/* CAN-FD channel registers */</div><div class='add'>+#define PCIEFD_REG_CAN_MISC		0x0000	/* Misc. control */</div><div class='add'>+#define PCIEFD_REG_CAN_CLK_SEL		0x0008	/* Clock selector */</div><div class='add'>+#define PCIEFD_REG_CAN_CMD_PORT_L	0x0010	/* 64-bits command port */</div><div class='add'>+#define PCIEFD_REG_CAN_CMD_PORT_H	0x0014</div><div class='add'>+#define PCIEFD_REG_CAN_TX_REQ_ACC	0x0020	/* Tx request accumulator */</div><div class='add'>+#define PCIEFD_REG_CAN_TX_CTL_SET	0x0030	/* Tx control set register */</div><div class='add'>+#define PCIEFD_REG_CAN_TX_CTL_CLR	0x0038	/* Tx control clear register */</div><div class='add'>+#define PCIEFD_REG_CAN_TX_DMA_ADDR_L	0x0040	/* 64-bits addr for Tx DMA */</div><div class='add'>+#define PCIEFD_REG_CAN_TX_DMA_ADDR_H	0x0044</div><div class='add'>+#define PCIEFD_REG_CAN_RX_CTL_SET	0x0050	/* Rx control set register */</div><div class='add'>+#define PCIEFD_REG_CAN_RX_CTL_CLR	0x0058	/* Rx control clear register */</div><div class='add'>+#define PCIEFD_REG_CAN_RX_CTL_WRT	0x0060	/* Rx control write register */</div><div class='add'>+#define PCIEFD_REG_CAN_RX_CTL_ACK	0x0068	/* Rx control ACK register */</div><div class='add'>+#define PCIEFD_REG_CAN_RX_DMA_ADDR_L	0x0070	/* 64-bits addr for Rx DMA */</div><div class='add'>+#define PCIEFD_REG_CAN_RX_DMA_ADDR_H	0x0074</div><div class='add'>+</div><div class='add'>+/* CAN-FD channel misc register bits */</div><div class='add'>+#define CANFD_MISC_TS_RST		0x00000001	/* timestamp cnt rst */</div><div class='add'>+</div><div class='add'>+/* CAN-FD channel Clock SELector Source &amp; DIVider */</div><div class='add'>+#define CANFD_CLK_SEL_DIV_MASK		0x00000007</div><div class='add'>+#define CANFD_CLK_SEL_DIV_60MHZ		0x00000000	/* SRC=240MHz only */</div><div class='add'>+#define CANFD_CLK_SEL_DIV_40MHZ		0x00000001	/* SRC=240MHz only */</div><div class='add'>+#define CANFD_CLK_SEL_DIV_30MHZ		0x00000002	/* SRC=240MHz only */</div><div class='add'>+#define CANFD_CLK_SEL_DIV_24MHZ		0x00000003	/* SRC=240MHz only */</div><div class='add'>+#define CANFD_CLK_SEL_DIV_20MHZ		0x00000004	/* SRC=240MHz only */</div><div class='add'>+</div><div class='add'>+#define CANFD_CLK_SEL_SRC_MASK		0x00000008	/* 0=80MHz, 1=240MHz */</div><div class='add'>+#define CANFD_CLK_SEL_SRC_240MHZ	0x00000008</div><div class='add'>+#define CANFD_CLK_SEL_SRC_80MHZ		(~CANFD_CLK_SEL_SRC_240MHZ &amp; \</div><div class='add'>+							CANFD_CLK_SEL_SRC_MASK)</div><div class='add'>+</div><div class='add'>+#define CANFD_CLK_SEL_20MHZ		(CANFD_CLK_SEL_SRC_240MHZ |\</div><div class='add'>+						CANFD_CLK_SEL_DIV_20MHZ)</div><div class='add'>+#define CANFD_CLK_SEL_24MHZ		(CANFD_CLK_SEL_SRC_240MHZ |\</div><div class='add'>+						CANFD_CLK_SEL_DIV_24MHZ)</div><div class='add'>+#define CANFD_CLK_SEL_30MHZ		(CANFD_CLK_SEL_SRC_240MHZ |\</div><div class='add'>+						CANFD_CLK_SEL_DIV_30MHZ)</div><div class='add'>+#define CANFD_CLK_SEL_40MHZ		(CANFD_CLK_SEL_SRC_240MHZ |\</div><div class='add'>+						CANFD_CLK_SEL_DIV_40MHZ)</div><div class='add'>+#define CANFD_CLK_SEL_60MHZ		(CANFD_CLK_SEL_SRC_240MHZ |\</div><div class='add'>+						CANFD_CLK_SEL_DIV_60MHZ)</div><div class='add'>+#define CANFD_CLK_SEL_80MHZ		(CANFD_CLK_SEL_SRC_80MHZ)</div><div class='add'>+</div><div class='add'>+/* CAN-FD channel Rx/Tx control register bits */</div><div class='add'>+#define CANFD_CTL_UNC_BIT		0x00010000	/* Uncached DMA mem */</div><div class='add'>+#define CANFD_CTL_RST_BIT		0x00020000	/* reset DMA action */</div><div class='add'>+#define CANFD_CTL_IEN_BIT		0x00040000	/* IRQ enable */</div><div class='add'>+</div><div class='add'>+/* Rx IRQ Count and Time Limits */</div><div class='add'>+#define CANFD_CTL_IRQ_CL_DEF	16	/* Rx msg max nb per IRQ in Rx DMA */</div><div class='add'>+#define CANFD_CTL_IRQ_TL_DEF	10	/* Time before IRQ if &lt; CL (x100 µs) */</div><div class='add'>+</div><div class='add'>+/* Tx anticipation window (link logical address should be aligned on 2K</div><div class='add'>+ * boundary)</div><div class='add'>+ */</div><div class='add'>+#define PCIEFD_TX_PAGE_COUNT	(PCIEFD_TX_DMA_SIZE / PCIEFD_TX_PAGE_SIZE)</div><div class='add'>+</div><div class='add'>+#define CANFD_MSG_LNK_TX	0x1001	/* Tx msgs link */</div><div class='add'>+</div><div class='add'>+/* 32-bits IRQ status fields, heading Rx DMA area */</div><div class='add'>+static inline int pciefd_irq_tag(u32 irq_status)</div><div class='add'>+{</div><div class='add'>+	return irq_status &amp; 0x0000000f;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int pciefd_irq_rx_cnt(u32 irq_status)</div><div class='add'>+{</div><div class='add'>+	return (irq_status &amp; 0x000007f0) &gt;&gt; 4;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int pciefd_irq_is_lnk(u32 irq_status)</div><div class='add'>+{</div><div class='add'>+	return irq_status &amp; 0x00010000;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Rx record */</div><div class='add'>+struct pciefd_rx_dma {</div><div class='add'>+	__le32 irq_status;</div><div class='add'>+	__le32 sys_time_low;</div><div class='add'>+	__le32 sys_time_high;</div><div class='add'>+	struct pucan_rx_msg msg[];</div><div class='add'>+} __packed __aligned(4);</div><div class='add'>+</div><div class='add'>+/* Tx Link record */</div><div class='add'>+struct pciefd_tx_link {</div><div class='add'>+	__le16 size;</div><div class='add'>+	__le16 type;</div><div class='add'>+	__le32 laddr_lo;</div><div class='add'>+	__le32 laddr_hi;</div><div class='add'>+} __packed __aligned(4);</div><div class='add'>+</div><div class='add'>+/* Tx page descriptor */</div><div class='add'>+struct pciefd_page {</div><div class='add'>+	void *vbase;			/* page virtual address */</div><div class='add'>+	dma_addr_t lbase;		/* page logical address */</div><div class='add'>+	u32 offset;</div><div class='add'>+	u32 size;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* CAN-FD channel object */</div><div class='add'>+struct pciefd_board;</div><div class='add'>+struct pciefd_can {</div><div class='add'>+	struct peak_canfd_priv ucan;	/* must be the first member */</div><div class='add'>+	void __iomem *reg_base;		/* channel config base addr */</div><div class='add'>+	struct pciefd_board *board;	/* reverse link */</div><div class='add'>+</div><div class='add'>+	struct pucan_command pucan_cmd;	/* command buffer */</div><div class='add'>+</div><div class='add'>+	dma_addr_t rx_dma_laddr;	/* DMA virtual and logical addr */</div><div class='add'>+	void *rx_dma_vaddr;		/* for Rx and Tx areas */</div><div class='add'>+	dma_addr_t tx_dma_laddr;</div><div class='add'>+	void *tx_dma_vaddr;</div><div class='add'>+</div><div class='add'>+	struct pciefd_page tx_pages[PCIEFD_TX_PAGE_COUNT];</div><div class='add'>+	u16 tx_pages_free;		/* free Tx pages counter */</div><div class='add'>+	u16 tx_page_index;		/* current page used for Tx */</div><div class='add'>+	spinlock_t tx_lock;</div><div class='add'>+</div><div class='add'>+	u32 irq_status;</div><div class='add'>+	u32 irq_tag;				/* next irq tag */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* PEAK-PCIe FD board object */</div><div class='add'>+struct pciefd_board {</div><div class='add'>+	void __iomem *reg_base;</div><div class='add'>+	struct pci_dev *pci_dev;</div><div class='add'>+	int can_count;</div><div class='add'>+	spinlock_t cmd_lock;		/* 64-bits cmds must be atomic */</div><div class='add'>+	struct pciefd_can *can[];	/* array of network devices */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* supported device ids. */</div><div class='add'>+static const struct pci_device_id peak_pciefd_tbl[] = {</div><div class='add'>+	{PEAK_PCI_VENDOR_ID, PEAK_PCIEFD_ID, PCI_ANY_ID, PCI_ANY_ID,},</div><div class='add'>+	{PEAK_PCI_VENDOR_ID, PCAN_CPCIEFD_ID, PCI_ANY_ID, PCI_ANY_ID,},</div><div class='add'>+	{PEAK_PCI_VENDOR_ID, PCAN_PCIE104FD_ID, PCI_ANY_ID, PCI_ANY_ID,},</div><div class='add'>+	{PEAK_PCI_VENDOR_ID, PCAN_MINIPCIEFD_ID, PCI_ANY_ID, PCI_ANY_ID,},</div><div class='add'>+	{PEAK_PCI_VENDOR_ID, PCAN_PCIEFD_OEM_ID, PCI_ANY_ID, PCI_ANY_ID,},</div><div class='add'>+	{PEAK_PCI_VENDOR_ID, PCAN_M2_ID, PCI_ANY_ID, PCI_ANY_ID,},</div><div class='add'>+	{0,}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+MODULE_DEVICE_TABLE(pci, peak_pciefd_tbl);</div><div class='add'>+</div><div class='add'>+/* read a 32 bits value from a SYS block register */</div><div class='add'>+static inline u32 pciefd_sys_readreg(const struct pciefd_board *priv, u16 reg)</div><div class='add'>+{</div><div class='add'>+	return readl(priv-&gt;reg_base + reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* write a 32 bits value into a SYS block register */</div><div class='add'>+static inline void pciefd_sys_writereg(const struct pciefd_board *priv,</div><div class='add'>+				       u32 val, u16 reg)</div><div class='add'>+{</div><div class='add'>+	writel(val, priv-&gt;reg_base + reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* read a 32 bits value from CAN-FD block register */</div><div class='add'>+static inline u32 pciefd_can_readreg(const struct pciefd_can *priv, u16 reg)</div><div class='add'>+{</div><div class='add'>+	return readl(priv-&gt;reg_base + reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* write a 32 bits value into a CAN-FD block register */</div><div class='add'>+static inline void pciefd_can_writereg(const struct pciefd_can *priv,</div><div class='add'>+				       u32 val, u16 reg)</div><div class='add'>+{</div><div class='add'>+	writel(val, priv-&gt;reg_base + reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* give a channel logical Rx DMA address to the board */</div><div class='add'>+static void pciefd_can_setup_rx_dma(struct pciefd_can *priv)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT</div><div class='add'>+	const u32 dma_addr_h = (u32)(priv-&gt;rx_dma_laddr &gt;&gt; 32);</div><div class='add'>+#else</div><div class='add'>+	const u32 dma_addr_h = 0;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	/* (DMA must be reset for Rx) */</div><div class='add'>+	pciefd_can_writereg(priv, CANFD_CTL_RST_BIT, PCIEFD_REG_CAN_RX_CTL_SET);</div><div class='add'>+</div><div class='add'>+	/* write the logical address of the Rx DMA area for this channel */</div><div class='add'>+	pciefd_can_writereg(priv, (u32)priv-&gt;rx_dma_laddr,</div><div class='add'>+			    PCIEFD_REG_CAN_RX_DMA_ADDR_L);</div><div class='add'>+	pciefd_can_writereg(priv, dma_addr_h, PCIEFD_REG_CAN_RX_DMA_ADDR_H);</div><div class='add'>+</div><div class='add'>+	/* also indicates that Rx DMA is cacheable */</div><div class='add'>+	pciefd_can_writereg(priv, CANFD_CTL_UNC_BIT, PCIEFD_REG_CAN_RX_CTL_CLR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* clear channel logical Rx DMA address from the board */</div><div class='add'>+static void pciefd_can_clear_rx_dma(struct pciefd_can *priv)</div><div class='add'>+{</div><div class='add'>+	/* DMA must be reset for Rx */</div><div class='add'>+	pciefd_can_writereg(priv, CANFD_CTL_RST_BIT, PCIEFD_REG_CAN_RX_CTL_SET);</div><div class='add'>+</div><div class='add'>+	/* clear the logical address of the Rx DMA area for this channel */</div><div class='add'>+	pciefd_can_writereg(priv, 0, PCIEFD_REG_CAN_RX_DMA_ADDR_L);</div><div class='add'>+	pciefd_can_writereg(priv, 0, PCIEFD_REG_CAN_RX_DMA_ADDR_H);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* give a channel logical Tx DMA address to the board */</div><div class='add'>+static void pciefd_can_setup_tx_dma(struct pciefd_can *priv)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT</div><div class='add'>+	const u32 dma_addr_h = (u32)(priv-&gt;tx_dma_laddr &gt;&gt; 32);</div><div class='add'>+#else</div><div class='add'>+	const u32 dma_addr_h = 0;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	/* (DMA must be reset for Tx) */</div><div class='add'>+	pciefd_can_writereg(priv, CANFD_CTL_RST_BIT, PCIEFD_REG_CAN_TX_CTL_SET);</div><div class='add'>+</div><div class='add'>+	/* write the logical address of the Tx DMA area for this channel */</div><div class='add'>+	pciefd_can_writereg(priv, (u32)priv-&gt;tx_dma_laddr,</div><div class='add'>+			    PCIEFD_REG_CAN_TX_DMA_ADDR_L);</div><div class='add'>+	pciefd_can_writereg(priv, dma_addr_h, PCIEFD_REG_CAN_TX_DMA_ADDR_H);</div><div class='add'>+</div><div class='add'>+	/* also indicates that Tx DMA is cacheable */</div><div class='add'>+	pciefd_can_writereg(priv, CANFD_CTL_UNC_BIT, PCIEFD_REG_CAN_TX_CTL_CLR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* clear channel logical Tx DMA address from the board */</div><div class='add'>+static void pciefd_can_clear_tx_dma(struct pciefd_can *priv)</div><div class='add'>+{</div><div class='add'>+	/* DMA must be reset for Tx */</div><div class='add'>+	pciefd_can_writereg(priv, CANFD_CTL_RST_BIT, PCIEFD_REG_CAN_TX_CTL_SET);</div><div class='add'>+</div><div class='add'>+	/* clear the logical address of the Tx DMA area for this channel */</div><div class='add'>+	pciefd_can_writereg(priv, 0, PCIEFD_REG_CAN_TX_DMA_ADDR_L);</div><div class='add'>+	pciefd_can_writereg(priv, 0, PCIEFD_REG_CAN_TX_DMA_ADDR_H);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pciefd_can_ack_rx_dma(struct pciefd_can *priv)</div><div class='add'>+{</div><div class='add'>+	/* read value of current IRQ tag and inc it for next one */</div><div class='add'>+	priv-&gt;irq_tag = le32_to_cpu(*(__le32 *)priv-&gt;rx_dma_vaddr);</div><div class='add'>+	priv-&gt;irq_tag++;</div><div class='add'>+	priv-&gt;irq_tag &amp;= 0xf;</div><div class='add'>+</div><div class='add'>+	/* write the next IRQ tag for this CAN */</div><div class='add'>+	pciefd_can_writereg(priv, priv-&gt;irq_tag, PCIEFD_REG_CAN_RX_CTL_ACK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* IRQ handler */</div><div class='add'>+static irqreturn_t pciefd_irq_handler(int irq, void *arg)</div><div class='add'>+{</div><div class='add'>+	struct pciefd_can *priv = arg;</div><div class='add'>+	struct pciefd_rx_dma *rx_dma = priv-&gt;rx_dma_vaddr;</div><div class='add'>+</div><div class='add'>+	/* INTA mode only to sync with PCIe transaction */</div><div class='add'>+	if (!pci_dev_msi_enabled(priv-&gt;board-&gt;pci_dev))</div><div class='add'>+		(void)pciefd_sys_readreg(priv-&gt;board, PCIEFD_REG_SYS_VER1);</div><div class='add'>+</div><div class='add'>+	/* read IRQ status from the first 32-bits of the Rx DMA area */</div><div class='add'>+	priv-&gt;irq_status = le32_to_cpu(rx_dma-&gt;irq_status);</div><div class='add'>+</div><div class='add'>+	/* check if this (shared) IRQ is for this CAN */</div><div class='add'>+	if (pciefd_irq_tag(priv-&gt;irq_status) != priv-&gt;irq_tag)</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+</div><div class='add'>+	/* handle rx messages (if any) */</div><div class='add'>+	peak_canfd_handle_msgs_list(&amp;priv-&gt;ucan,</div><div class='add'>+				    rx_dma-&gt;msg,</div><div class='add'>+				    pciefd_irq_rx_cnt(priv-&gt;irq_status));</div><div class='add'>+</div><div class='add'>+	/* handle tx link interrupt (if any) */</div><div class='add'>+	if (pciefd_irq_is_lnk(priv-&gt;irq_status)) {</div><div class='add'>+		unsigned long flags;</div><div class='add'>+</div><div class='add'>+		spin_lock_irqsave(&amp;priv-&gt;tx_lock, flags);</div><div class='add'>+		priv-&gt;tx_pages_free++;</div><div class='add'>+		spin_unlock_irqrestore(&amp;priv-&gt;tx_lock, flags);</div><div class='add'>+</div><div class='add'>+		/* wake producer up (only if enough room in echo_skb array) */</div><div class='add'>+		spin_lock_irqsave(&amp;priv-&gt;ucan.echo_lock, flags);</div><div class='add'>+		if (!priv-&gt;ucan.can.echo_skb[priv-&gt;ucan.echo_idx])</div><div class='add'>+			netif_wake_queue(priv-&gt;ucan.ndev);</div><div class='add'>+</div><div class='add'>+		spin_unlock_irqrestore(&amp;priv-&gt;ucan.echo_lock, flags);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* re-enable Rx DMA transfer for this CAN */</div><div class='add'>+	pciefd_can_ack_rx_dma(priv);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pciefd_enable_tx_path(struct peak_canfd_priv *ucan)</div><div class='add'>+{</div><div class='add'>+	struct pciefd_can *priv = (struct pciefd_can *)ucan;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* initialize the Tx pages descriptors */</div><div class='add'>+	priv-&gt;tx_pages_free = PCIEFD_TX_PAGE_COUNT - 1;</div><div class='add'>+	priv-&gt;tx_page_index = 0;</div><div class='add'>+</div><div class='add'>+	priv-&gt;tx_pages[0].vbase = priv-&gt;tx_dma_vaddr;</div><div class='add'>+	priv-&gt;tx_pages[0].lbase = priv-&gt;tx_dma_laddr;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; PCIEFD_TX_PAGE_COUNT; i++) {</div><div class='add'>+		priv-&gt;tx_pages[i].offset = 0;</div><div class='add'>+		priv-&gt;tx_pages[i].size = PCIEFD_TX_PAGE_SIZE -</div><div class='add'>+					 sizeof(struct pciefd_tx_link);</div><div class='add'>+		if (i) {</div><div class='add'>+			priv-&gt;tx_pages[i].vbase =</div><div class='add'>+					  priv-&gt;tx_pages[i - 1].vbase +</div><div class='add'>+					  PCIEFD_TX_PAGE_SIZE;</div><div class='add'>+			priv-&gt;tx_pages[i].lbase =</div><div class='add'>+					  priv-&gt;tx_pages[i - 1].lbase +</div><div class='add'>+					  PCIEFD_TX_PAGE_SIZE;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* setup Tx DMA addresses into IP core */</div><div class='add'>+	pciefd_can_setup_tx_dma(priv);</div><div class='add'>+</div><div class='add'>+	/* start (TX_RST=0) Tx Path */</div><div class='add'>+	pciefd_can_writereg(priv, CANFD_CTL_RST_BIT, PCIEFD_REG_CAN_TX_CTL_CLR);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* board specific CANFD command pre-processing */</div><div class='add'>+static int pciefd_pre_cmd(struct peak_canfd_priv *ucan)</div><div class='add'>+{</div><div class='add'>+	struct pciefd_can *priv = (struct pciefd_can *)ucan;</div><div class='add'>+	u16 cmd = pucan_cmd_get_opcode(&amp;priv-&gt;pucan_cmd);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* pre-process command */</div><div class='add'>+	switch (cmd) {</div><div class='add'>+	case PUCAN_CMD_NORMAL_MODE:</div><div class='add'>+	case PUCAN_CMD_LISTEN_ONLY_MODE:</div><div class='add'>+</div><div class='add'>+		if (ucan-&gt;can.state == CAN_STATE_BUS_OFF)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		/* going into operational mode: setup IRQ handler */</div><div class='add'>+		err = request_irq(priv-&gt;ucan.ndev-&gt;irq,</div><div class='add'>+				  pciefd_irq_handler,</div><div class='add'>+				  IRQF_SHARED,</div><div class='add'>+				  PCIEFD_DRV_NAME,</div><div class='add'>+				  priv);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		/* setup Rx DMA address */</div><div class='add'>+		pciefd_can_setup_rx_dma(priv);</div><div class='add'>+</div><div class='add'>+		/* setup max count of msgs per IRQ */</div><div class='add'>+		pciefd_can_writereg(priv, (CANFD_CTL_IRQ_TL_DEF) &lt;&lt; 8 |</div><div class='add'>+				    CANFD_CTL_IRQ_CL_DEF,</div><div class='add'>+				    PCIEFD_REG_CAN_RX_CTL_WRT);</div><div class='add'>+</div><div class='add'>+		/* clear DMA RST for Rx (Rx start) */</div><div class='add'>+		pciefd_can_writereg(priv, CANFD_CTL_RST_BIT,</div><div class='add'>+				    PCIEFD_REG_CAN_RX_CTL_CLR);</div><div class='add'>+</div><div class='add'>+		/* reset timestamps */</div><div class='add'>+		pciefd_can_writereg(priv, !CANFD_MISC_TS_RST,</div><div class='add'>+				    PCIEFD_REG_CAN_MISC);</div><div class='add'>+</div><div class='add'>+		/* do an initial ACK */</div><div class='add'>+		pciefd_can_ack_rx_dma(priv);</div><div class='add'>+</div><div class='add'>+		/* enable IRQ for this CAN after having set next irq_tag */</div><div class='add'>+		pciefd_can_writereg(priv, CANFD_CTL_IEN_BIT,</div><div class='add'>+				    PCIEFD_REG_CAN_RX_CTL_SET);</div><div class='add'>+</div><div class='add'>+		/* Tx path will be setup as soon as RX_BARRIER is received */</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* write a command */</div><div class='add'>+static int pciefd_write_cmd(struct peak_canfd_priv *ucan)</div><div class='add'>+{</div><div class='add'>+	struct pciefd_can *priv = (struct pciefd_can *)ucan;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	/* 64-bits command is atomic */</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;board-&gt;cmd_lock, flags);</div><div class='add'>+</div><div class='add'>+	pciefd_can_writereg(priv, *(u32 *)ucan-&gt;cmd_buffer,</div><div class='add'>+			    PCIEFD_REG_CAN_CMD_PORT_L);</div><div class='add'>+	pciefd_can_writereg(priv, *(u32 *)(ucan-&gt;cmd_buffer + 4),</div><div class='add'>+			    PCIEFD_REG_CAN_CMD_PORT_H);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;board-&gt;cmd_lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* board specific CANFD command post-processing */</div><div class='add'>+static int pciefd_post_cmd(struct peak_canfd_priv *ucan)</div><div class='add'>+{</div><div class='add'>+	struct pciefd_can *priv = (struct pciefd_can *)ucan;</div><div class='add'>+	u16 cmd = pucan_cmd_get_opcode(&amp;priv-&gt;pucan_cmd);</div><div class='add'>+</div><div class='add'>+	switch (cmd) {</div><div class='add'>+	case PUCAN_CMD_RESET_MODE:</div><div class='add'>+</div><div class='add'>+		if (ucan-&gt;can.state == CAN_STATE_STOPPED)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		/* controller now in reset mode: */</div><div class='add'>+</div><div class='add'>+		/* disable IRQ for this CAN */</div><div class='add'>+		pciefd_can_writereg(priv, CANFD_CTL_IEN_BIT,</div><div class='add'>+				    PCIEFD_REG_CAN_RX_CTL_CLR);</div><div class='add'>+</div><div class='add'>+		/* stop and reset DMA addresses in Tx/Rx engines */</div><div class='add'>+		pciefd_can_clear_tx_dma(priv);</div><div class='add'>+		pciefd_can_clear_rx_dma(priv);</div><div class='add'>+</div><div class='add'>+		/* wait for above commands to complete (read cycle) */</div><div class='add'>+		(void)pciefd_sys_readreg(priv-&gt;board, PCIEFD_REG_SYS_VER1);</div><div class='add'>+</div><div class='add'>+		free_irq(priv-&gt;ucan.ndev-&gt;irq, priv);</div><div class='add'>+</div><div class='add'>+		ucan-&gt;can.state = CAN_STATE_STOPPED;</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void *pciefd_alloc_tx_msg(struct peak_canfd_priv *ucan, u16 msg_size,</div><div class='add'>+				 int *room_left)</div><div class='add'>+{</div><div class='add'>+	struct pciefd_can *priv = (struct pciefd_can *)ucan;</div><div class='add'>+	struct pciefd_page *page = priv-&gt;tx_pages + priv-&gt;tx_page_index;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	void *msg;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;tx_lock, flags);</div><div class='add'>+</div><div class='add'>+	if (page-&gt;offset + msg_size &gt; page-&gt;size) {</div><div class='add'>+		struct pciefd_tx_link *lk;</div><div class='add'>+</div><div class='add'>+		/* not enough space in this page: try another one */</div><div class='add'>+		if (!priv-&gt;tx_pages_free) {</div><div class='add'>+			spin_unlock_irqrestore(&amp;priv-&gt;tx_lock, flags);</div><div class='add'>+</div><div class='add'>+			/* Tx overflow */</div><div class='add'>+			return NULL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		priv-&gt;tx_pages_free--;</div><div class='add'>+</div><div class='add'>+		/* keep address of the very last free slot of current page */</div><div class='add'>+		lk = page-&gt;vbase + page-&gt;offset;</div><div class='add'>+</div><div class='add'>+		/* next, move on a new free page */</div><div class='add'>+		priv-&gt;tx_page_index = (priv-&gt;tx_page_index + 1) %</div><div class='add'>+				      PCIEFD_TX_PAGE_COUNT;</div><div class='add'>+		page = priv-&gt;tx_pages + priv-&gt;tx_page_index;</div><div class='add'>+</div><div class='add'>+		/* put link record to this new page at the end of prev one */</div><div class='add'>+		lk-&gt;size = cpu_to_le16(sizeof(*lk));</div><div class='add'>+		lk-&gt;type = cpu_to_le16(CANFD_MSG_LNK_TX);</div><div class='add'>+		lk-&gt;laddr_lo = cpu_to_le32(page-&gt;lbase);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT</div><div class='add'>+		lk-&gt;laddr_hi = cpu_to_le32(page-&gt;lbase &gt;&gt; 32);</div><div class='add'>+#else</div><div class='add'>+		lk-&gt;laddr_hi = 0;</div><div class='add'>+#endif</div><div class='add'>+		/* next msgs will be put from the begininng of this new page */</div><div class='add'>+		page-&gt;offset = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*room_left = priv-&gt;tx_pages_free * page-&gt;size;</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;tx_lock, flags);</div><div class='add'>+</div><div class='add'>+	msg = page-&gt;vbase + page-&gt;offset;</div><div class='add'>+</div><div class='add'>+	/* give back room left in the tx ring */</div><div class='add'>+	*room_left += page-&gt;size - (page-&gt;offset + msg_size);</div><div class='add'>+</div><div class='add'>+	return msg;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pciefd_write_tx_msg(struct peak_canfd_priv *ucan,</div><div class='add'>+			       struct pucan_tx_msg *msg)</div><div class='add'>+{</div><div class='add'>+	struct pciefd_can *priv = (struct pciefd_can *)ucan;</div><div class='add'>+	struct pciefd_page *page = priv-&gt;tx_pages + priv-&gt;tx_page_index;</div><div class='add'>+</div><div class='add'>+	/* this slot is now reserved for writing the frame */</div><div class='add'>+	page-&gt;offset += le16_to_cpu(msg-&gt;size);</div><div class='add'>+</div><div class='add'>+	/* tell the board a frame has been written in Tx DMA area */</div><div class='add'>+	pciefd_can_writereg(priv, 1, PCIEFD_REG_CAN_TX_REQ_ACC);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* probe for CAN-FD channel #pciefd_board-&gt;can_count */</div><div class='add'>+static int pciefd_can_probe(struct pciefd_board *pciefd)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	struct pciefd_can *priv;</div><div class='add'>+	u32 clk;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* allocate the candev object with default isize of echo skbs ring */</div><div class='add'>+	ndev = alloc_peak_canfd_dev(sizeof(*priv), pciefd-&gt;can_count,</div><div class='add'>+				    PCIEFD_ECHO_SKB_MAX);</div><div class='add'>+	if (!ndev) {</div><div class='add'>+		dev_err(&amp;pciefd-&gt;pci_dev-&gt;dev,</div><div class='add'>+			"failed to alloc candev object\n");</div><div class='add'>+		goto failure;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	/* fill-in candev private object: */</div><div class='add'>+</div><div class='add'>+	/* setup PCIe-FD own callbacks */</div><div class='add'>+	priv-&gt;ucan.pre_cmd = pciefd_pre_cmd;</div><div class='add'>+	priv-&gt;ucan.write_cmd = pciefd_write_cmd;</div><div class='add'>+	priv-&gt;ucan.post_cmd = pciefd_post_cmd;</div><div class='add'>+	priv-&gt;ucan.enable_tx_path = pciefd_enable_tx_path;</div><div class='add'>+	priv-&gt;ucan.alloc_tx_msg = pciefd_alloc_tx_msg;</div><div class='add'>+	priv-&gt;ucan.write_tx_msg = pciefd_write_tx_msg;</div><div class='add'>+</div><div class='add'>+	/* setup PCIe-FD own command buffer */</div><div class='add'>+	priv-&gt;ucan.cmd_buffer = &amp;priv-&gt;pucan_cmd;</div><div class='add'>+	priv-&gt;ucan.cmd_maxlen = sizeof(priv-&gt;pucan_cmd);</div><div class='add'>+</div><div class='add'>+	priv-&gt;board = pciefd;</div><div class='add'>+</div><div class='add'>+	/* CAN config regs block address */</div><div class='add'>+	priv-&gt;reg_base = pciefd-&gt;reg_base + PCIEFD_CANX_OFF(priv-&gt;ucan.index);</div><div class='add'>+</div><div class='add'>+	/* allocate non-cacheable DMA'able 4KB memory area for Rx */</div><div class='add'>+	priv-&gt;rx_dma_vaddr = dmam_alloc_coherent(&amp;pciefd-&gt;pci_dev-&gt;dev,</div><div class='add'>+						 PCIEFD_RX_DMA_SIZE,</div><div class='add'>+						 &amp;priv-&gt;rx_dma_laddr,</div><div class='add'>+						 GFP_KERNEL);</div><div class='add'>+	if (!priv-&gt;rx_dma_vaddr) {</div><div class='add'>+		dev_err(&amp;pciefd-&gt;pci_dev-&gt;dev,</div><div class='add'>+			"Rx dmam_alloc_coherent(%u) failure\n",</div><div class='add'>+			PCIEFD_RX_DMA_SIZE);</div><div class='add'>+		goto err_free_candev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* allocate non-cacheable DMA'able 4KB memory area for Tx */</div><div class='add'>+	priv-&gt;tx_dma_vaddr = dmam_alloc_coherent(&amp;pciefd-&gt;pci_dev-&gt;dev,</div><div class='add'>+						 PCIEFD_TX_DMA_SIZE,</div><div class='add'>+						 &amp;priv-&gt;tx_dma_laddr,</div><div class='add'>+						 GFP_KERNEL);</div><div class='add'>+	if (!priv-&gt;tx_dma_vaddr) {</div><div class='add'>+		dev_err(&amp;pciefd-&gt;pci_dev-&gt;dev,</div><div class='add'>+			"Tx dmam_alloc_coherent(%u) failure\n",</div><div class='add'>+			PCIEFD_TX_DMA_SIZE);</div><div class='add'>+		goto err_free_candev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* CAN clock in RST mode */</div><div class='add'>+	pciefd_can_writereg(priv, CANFD_MISC_TS_RST, PCIEFD_REG_CAN_MISC);</div><div class='add'>+</div><div class='add'>+	/* read current clock value */</div><div class='add'>+	clk = pciefd_can_readreg(priv, PCIEFD_REG_CAN_CLK_SEL);</div><div class='add'>+	switch (clk) {</div><div class='add'>+	case CANFD_CLK_SEL_20MHZ:</div><div class='add'>+		priv-&gt;ucan.can.clock.freq = 20 * 1000 * 1000;</div><div class='add'>+		break;</div><div class='add'>+	case CANFD_CLK_SEL_24MHZ:</div><div class='add'>+		priv-&gt;ucan.can.clock.freq = 24 * 1000 * 1000;</div><div class='add'>+		break;</div><div class='add'>+	case CANFD_CLK_SEL_30MHZ:</div><div class='add'>+		priv-&gt;ucan.can.clock.freq = 30 * 1000 * 1000;</div><div class='add'>+		break;</div><div class='add'>+	case CANFD_CLK_SEL_40MHZ:</div><div class='add'>+		priv-&gt;ucan.can.clock.freq = 40 * 1000 * 1000;</div><div class='add'>+		break;</div><div class='add'>+	case CANFD_CLK_SEL_60MHZ:</div><div class='add'>+		priv-&gt;ucan.can.clock.freq = 60 * 1000 * 1000;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		pciefd_can_writereg(priv, CANFD_CLK_SEL_80MHZ,</div><div class='add'>+				    PCIEFD_REG_CAN_CLK_SEL);</div><div class='add'>+</div><div class='add'>+		fallthrough;</div><div class='add'>+	case CANFD_CLK_SEL_80MHZ:</div><div class='add'>+		priv-&gt;ucan.can.clock.freq = 80 * 1000 * 1000;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ndev-&gt;irq = pciefd-&gt;pci_dev-&gt;irq;</div><div class='add'>+</div><div class='add'>+	SET_NETDEV_DEV(ndev, &amp;pciefd-&gt;pci_dev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	err = register_candev(ndev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;pciefd-&gt;pci_dev-&gt;dev,</div><div class='add'>+			"couldn't register CAN device: %d\n", err);</div><div class='add'>+		goto err_free_candev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;priv-&gt;tx_lock);</div><div class='add'>+</div><div class='add'>+	/* save the object address in the board structure */</div><div class='add'>+	pciefd-&gt;can[pciefd-&gt;can_count] = priv;</div><div class='add'>+</div><div class='add'>+	dev_info(&amp;pciefd-&gt;pci_dev-&gt;dev, "%s at reg_base=0x%p irq=%d\n",</div><div class='add'>+		 ndev-&gt;name, priv-&gt;reg_base, ndev-&gt;irq);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_candev:</div><div class='add'>+	free_candev(ndev);</div><div class='add'>+</div><div class='add'>+failure:</div><div class='add'>+	return -ENOMEM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* remove a CAN-FD channel by releasing all of its resources */</div><div class='add'>+static void pciefd_can_remove(struct pciefd_can *priv)</div><div class='add'>+{</div><div class='add'>+	/* unregister (close) the can device to go back to RST mode first */</div><div class='add'>+	unregister_candev(priv-&gt;ucan.ndev);</div><div class='add'>+</div><div class='add'>+	/* finally, free the candev object */</div><div class='add'>+	free_candev(priv-&gt;ucan.ndev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* remove all CAN-FD channels by releasing their own resources */</div><div class='add'>+static void pciefd_can_remove_all(struct pciefd_board *pciefd)</div><div class='add'>+{</div><div class='add'>+	while (pciefd-&gt;can_count &gt; 0)</div><div class='add'>+		pciefd_can_remove(pciefd-&gt;can[--pciefd-&gt;can_count]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* probe for the entire device */</div><div class='add'>+static int peak_pciefd_probe(struct pci_dev *pdev,</div><div class='add'>+			     const struct pci_device_id *ent)</div><div class='add'>+{</div><div class='add'>+	struct pciefd_board *pciefd;</div><div class='add'>+	int err, can_count;</div><div class='add'>+	u16 sub_sys_id;</div><div class='add'>+	u8 hw_ver_major;</div><div class='add'>+	u8 hw_ver_minor;</div><div class='add'>+	u8 hw_ver_sub;</div><div class='add'>+	u32 v2;</div><div class='add'>+</div><div class='add'>+	err = pci_enable_device(pdev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+	err = pci_request_regions(pdev, PCIEFD_DRV_NAME);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_disable_pci;</div><div class='add'>+</div><div class='add'>+	/* the number of channels depends on sub-system id */</div><div class='add'>+	err = pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &amp;sub_sys_id);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_release_regions;</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;pdev-&gt;dev, "probing device %04x:%04x:%04x\n",</div><div class='add'>+		pdev-&gt;vendor, pdev-&gt;device, sub_sys_id);</div><div class='add'>+</div><div class='add'>+	if (sub_sys_id &gt;= 0x0012)</div><div class='add'>+		can_count = 4;</div><div class='add'>+	else if (sub_sys_id &gt;= 0x0010)</div><div class='add'>+		can_count = 3;</div><div class='add'>+	else if (sub_sys_id &gt;= 0x0004)</div><div class='add'>+		can_count = 2;</div><div class='add'>+	else</div><div class='add'>+		can_count = 1;</div><div class='add'>+</div><div class='add'>+	/* allocate board structure object */</div><div class='add'>+	pciefd = devm_kzalloc(&amp;pdev-&gt;dev, struct_size(pciefd, can, can_count),</div><div class='add'>+			      GFP_KERNEL);</div><div class='add'>+	if (!pciefd) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto err_release_regions;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* initialize the board structure */</div><div class='add'>+	pciefd-&gt;pci_dev = pdev;</div><div class='add'>+	spin_lock_init(&amp;pciefd-&gt;cmd_lock);</div><div class='add'>+</div><div class='add'>+	/* save the PCI BAR0 virtual address for further system regs access */</div><div class='add'>+	pciefd-&gt;reg_base = pci_iomap(pdev, 0, PCIEFD_BAR0_SIZE);</div><div class='add'>+	if (!pciefd-&gt;reg_base) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to map PCI resource #0\n");</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto err_release_regions;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* read the firmware version number */</div><div class='add'>+	v2 = pciefd_sys_readreg(pciefd, PCIEFD_REG_SYS_VER2);</div><div class='add'>+</div><div class='add'>+	hw_ver_major = (v2 &amp; 0x0000f000) &gt;&gt; 12;</div><div class='add'>+	hw_ver_minor = (v2 &amp; 0x00000f00) &gt;&gt; 8;</div><div class='add'>+	hw_ver_sub = (v2 &amp; 0x000000f0) &gt;&gt; 4;</div><div class='add'>+</div><div class='add'>+	dev_info(&amp;pdev-&gt;dev,</div><div class='add'>+		 "%ux CAN-FD PCAN-PCIe FPGA v%u.%u.%u:\n", can_count,</div><div class='add'>+		 hw_ver_major, hw_ver_minor, hw_ver_sub);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT</div><div class='add'>+	/* FW &lt; v3.3.0 DMA logic doesn't handle correctly the mix of 32-bit and</div><div class='add'>+	 * 64-bit logical addresses: this workaround forces usage of 32-bit</div><div class='add'>+	 * DMA addresses only when such a fw is detected.</div><div class='add'>+	 */</div><div class='add'>+	if (PCIEFD_FW_VERSION(hw_ver_major, hw_ver_minor, hw_ver_sub) &lt;</div><div class='add'>+	    PCIEFD_FW_VERSION(3, 3, 0)) {</div><div class='add'>+		err = dma_set_mask_and_coherent(&amp;pdev-&gt;dev, DMA_BIT_MASK(32));</div><div class='add'>+		if (err)</div><div class='add'>+			dev_warn(&amp;pdev-&gt;dev,</div><div class='add'>+				 "warning: can't set DMA mask %llxh (err %d)\n",</div><div class='add'>+				 DMA_BIT_MASK(32), err);</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	/* stop system clock */</div><div class='add'>+	pciefd_sys_writereg(pciefd, PCIEFD_SYS_CTL_CLK_EN,</div><div class='add'>+			    PCIEFD_REG_SYS_CTL_CLR);</div><div class='add'>+</div><div class='add'>+	pci_set_master(pdev);</div><div class='add'>+</div><div class='add'>+	/* create now the corresponding channels objects */</div><div class='add'>+	while (pciefd-&gt;can_count &lt; can_count) {</div><div class='add'>+		err = pciefd_can_probe(pciefd);</div><div class='add'>+		if (err)</div><div class='add'>+			goto err_free_canfd;</div><div class='add'>+</div><div class='add'>+		pciefd-&gt;can_count++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* set system timestamps counter in RST mode */</div><div class='add'>+	pciefd_sys_writereg(pciefd, PCIEFD_SYS_CTL_TS_RST,</div><div class='add'>+			    PCIEFD_REG_SYS_CTL_SET);</div><div class='add'>+</div><div class='add'>+	/* wait a bit (read cycle) */</div><div class='add'>+	(void)pciefd_sys_readreg(pciefd, PCIEFD_REG_SYS_VER1);</div><div class='add'>+</div><div class='add'>+	/* free all clocks */</div><div class='add'>+	pciefd_sys_writereg(pciefd, PCIEFD_SYS_CTL_TS_RST,</div><div class='add'>+			    PCIEFD_REG_SYS_CTL_CLR);</div><div class='add'>+</div><div class='add'>+	/* start system clock */</div><div class='add'>+	pciefd_sys_writereg(pciefd, PCIEFD_SYS_CTL_CLK_EN,</div><div class='add'>+			    PCIEFD_REG_SYS_CTL_SET);</div><div class='add'>+</div><div class='add'>+	/* remember the board structure address in the device user data */</div><div class='add'>+	pci_set_drvdata(pdev, pciefd);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_canfd:</div><div class='add'>+	pciefd_can_remove_all(pciefd);</div><div class='add'>+</div><div class='add'>+	pci_iounmap(pdev, pciefd-&gt;reg_base);</div><div class='add'>+</div><div class='add'>+err_release_regions:</div><div class='add'>+	pci_release_regions(pdev);</div><div class='add'>+</div><div class='add'>+err_disable_pci:</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+</div><div class='add'>+	/* pci_xxx_config_word() return positive PCIBIOS_xxx error codes while</div><div class='add'>+	 * the probe() function must return a negative errno in case of failure</div><div class='add'>+	 * (err is unchanged if negative)</div><div class='add'>+	 */</div><div class='add'>+	return pcibios_err_to_errno(err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* free the board structure object, as well as its resources: */</div><div class='add'>+static void peak_pciefd_remove(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct pciefd_board *pciefd = pci_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	/* release CAN-FD channels resources */</div><div class='add'>+	pciefd_can_remove_all(pciefd);</div><div class='add'>+</div><div class='add'>+	pci_iounmap(pdev, pciefd-&gt;reg_base);</div><div class='add'>+</div><div class='add'>+	pci_release_regions(pdev);</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct pci_driver peak_pciefd_driver = {</div><div class='add'>+	.name = PCIEFD_DRV_NAME,</div><div class='add'>+	.id_table = peak_pciefd_tbl,</div><div class='add'>+	.probe = peak_pciefd_probe,</div><div class='add'>+	.remove = peak_pciefd_remove,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_pci_driver(peak_pciefd_driver);</div><div class='head'>diff --git a/drivers/net/can/rcar/Kconfig b/drivers/net/can/rcar/Kconfig<br/>new file mode 100644<br/>index 000000000000..c66762ef631b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/rcar/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/rcar/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+config CAN_RCAR</div><div class='add'>+	tristate "Renesas R-Car and RZ/G CAN controller"</div><div class='add'>+	depends on ARCH_RENESAS || COMPILE_TEST</div><div class='add'>+	help</div><div class='add'>+	  Say Y here if you want to use CAN controller found on Renesas R-Car</div><div class='add'>+	  or RZ/G SoCs.</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose M here: the module will</div><div class='add'>+	  be called rcar_can.</div><div class='add'>+</div><div class='add'>+config CAN_RCAR_CANFD</div><div class='add'>+	tristate "Renesas R-Car CAN FD controller"</div><div class='add'>+	depends on ARCH_RENESAS || COMPILE_TEST</div><div class='add'>+	help</div><div class='add'>+	  Say Y here if you want to use CAN FD controller found on</div><div class='add'>+	  Renesas R-Car SoCs. The driver puts the controller in CAN FD only</div><div class='add'>+	  mode, which can interoperate with CAN2.0 nodes but does not support</div><div class='add'>+	  dedicated CAN 2.0 mode.</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose M here: the module will</div><div class='add'>+	  be called rcar_canfd.</div><div class='head'>diff --git a/drivers/net/can/rcar/Makefile b/drivers/net/can/rcar/Makefile<br/>new file mode 100644<br/>index 000000000000..c9185b0c04a8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/rcar/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/rcar/Makefile</a></div><div class='hunk'>@@ -0,0 +1,7 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#</div><div class='add'>+#  Makefile for the Renesas R-Car CAN &amp; CAN FD controller drivers</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_CAN_RCAR)		+= rcar_can.o</div><div class='add'>+obj-$(CONFIG_CAN_RCAR_CANFD)	+= rcar_canfd.o</div><div class='head'>diff --git a/drivers/net/can/rcar/rcar_can.c b/drivers/net/can/rcar/rcar_can.c<br/>new file mode 100644<br/>index 000000000000..fc3df328e877<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/rcar/rcar_can.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/rcar/rcar_can.c</a></div><div class='hunk'>@@ -0,0 +1,918 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+/* Renesas R-Car CAN device driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2013 Cogent Embedded, Inc. &lt;source@cogentembedded.com&gt;</div><div class='add'>+ * Copyright (C) 2013 Renesas Solutions Corp.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/bits.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/pm_runtime.h&gt;</div><div class='add'>+</div><div class='add'>+#define RCAR_CAN_DRV_NAME	"rcar_can"</div><div class='add'>+</div><div class='add'>+/* Clock Select Register settings */</div><div class='add'>+enum CLKR {</div><div class='add'>+	CLKR_CLKP1 = 0, /* Peripheral clock (clkp1) */</div><div class='add'>+	CLKR_CLKP2 = 1, /* Peripheral clock (clkp2) */</div><div class='add'>+	CLKR_CLKEXT = 3, /* Externally input clock */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define RCAR_SUPPORTED_CLOCKS	(BIT(CLKR_CLKP1) | BIT(CLKR_CLKP2) | \</div><div class='add'>+				 BIT(CLKR_CLKEXT))</div><div class='add'>+</div><div class='add'>+/* Mailbox configuration:</div><div class='add'>+ * mailbox 60 - 63 - Rx FIFO mailboxes</div><div class='add'>+ * mailbox 56 - 59 - Tx FIFO mailboxes</div><div class='add'>+ * non-FIFO mailboxes are not used</div><div class='add'>+ */</div><div class='add'>+#define RCAR_CAN_N_MBX		64 /* Number of mailboxes in non-FIFO mode */</div><div class='add'>+#define RCAR_CAN_RX_FIFO_MBX	60 /* Mailbox - window to Rx FIFO */</div><div class='add'>+#define RCAR_CAN_TX_FIFO_MBX	56 /* Mailbox - window to Tx FIFO */</div><div class='add'>+#define RCAR_CAN_FIFO_DEPTH	4</div><div class='add'>+</div><div class='add'>+/* Mailbox registers structure */</div><div class='add'>+struct rcar_can_mbox_regs {</div><div class='add'>+	u32 id;		/* IDE and RTR bits, SID and EID */</div><div class='add'>+	u8 stub;	/* Not used */</div><div class='add'>+	u8 dlc;		/* Data Length Code - bits [0..3] */</div><div class='add'>+	u8 data[8];	/* Data Bytes */</div><div class='add'>+	u8 tsh;		/* Time Stamp Higher Byte */</div><div class='add'>+	u8 tsl;		/* Time Stamp Lower Byte */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct rcar_can_regs {</div><div class='add'>+	struct rcar_can_mbox_regs mb[RCAR_CAN_N_MBX]; /* Mailbox registers */</div><div class='add'>+	u32 mkr_2_9[8];	/* Mask Registers 2-9 */</div><div class='add'>+	u32 fidcr[2];	/* FIFO Received ID Compare Register */</div><div class='add'>+	u32 mkivlr1;	/* Mask Invalid Register 1 */</div><div class='add'>+	u32 mier1;	/* Mailbox Interrupt Enable Register 1 */</div><div class='add'>+	u32 mkr_0_1[2];	/* Mask Registers 0-1 */</div><div class='add'>+	u32 mkivlr0;    /* Mask Invalid Register 0*/</div><div class='add'>+	u32 mier0;      /* Mailbox Interrupt Enable Register 0 */</div><div class='add'>+	u8 pad_440[0x3c0];</div><div class='add'>+	u8 mctl[64];	/* Message Control Registers */</div><div class='add'>+	u16 ctlr;	/* Control Register */</div><div class='add'>+	u16 str;	/* Status register */</div><div class='add'>+	u8 bcr[3];	/* Bit Configuration Register */</div><div class='add'>+	u8 clkr;	/* Clock Select Register */</div><div class='add'>+	u8 rfcr;	/* Receive FIFO Control Register */</div><div class='add'>+	u8 rfpcr;	/* Receive FIFO Pointer Control Register */</div><div class='add'>+	u8 tfcr;	/* Transmit FIFO Control Register */</div><div class='add'>+	u8 tfpcr;       /* Transmit FIFO Pointer Control Register */</div><div class='add'>+	u8 eier;	/* Error Interrupt Enable Register */</div><div class='add'>+	u8 eifr;	/* Error Interrupt Factor Judge Register */</div><div class='add'>+	u8 recr;	/* Receive Error Count Register */</div><div class='add'>+	u8 tecr;        /* Transmit Error Count Register */</div><div class='add'>+	u8 ecsr;	/* Error Code Store Register */</div><div class='add'>+	u8 cssr;	/* Channel Search Support Register */</div><div class='add'>+	u8 mssr;	/* Mailbox Search Status Register */</div><div class='add'>+	u8 msmr;	/* Mailbox Search Mode Register */</div><div class='add'>+	u16 tsr;	/* Time Stamp Register */</div><div class='add'>+	u8 afsr;	/* Acceptance Filter Support Register */</div><div class='add'>+	u8 pad_857;</div><div class='add'>+	u8 tcr;		/* Test Control Register */</div><div class='add'>+	u8 pad_859[7];</div><div class='add'>+	u8 ier;		/* Interrupt Enable Register */</div><div class='add'>+	u8 isr;		/* Interrupt Status Register */</div><div class='add'>+	u8 pad_862;</div><div class='add'>+	u8 mbsmr;	/* Mailbox Search Mask Register */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct rcar_can_priv {</div><div class='add'>+	struct can_priv can;	/* Must be the first member! */</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	struct napi_struct napi;</div><div class='add'>+	struct rcar_can_regs __iomem *regs;</div><div class='add'>+	struct clk *can_clk;</div><div class='add'>+	u32 tx_head;</div><div class='add'>+	u32 tx_tail;</div><div class='add'>+	u8 clock_select;</div><div class='add'>+	u8 ier;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const rcar_can_bittiming_const = {</div><div class='add'>+	.name = RCAR_CAN_DRV_NAME,</div><div class='add'>+	.tseg1_min = 4,</div><div class='add'>+	.tseg1_max = 16,</div><div class='add'>+	.tseg2_min = 2,</div><div class='add'>+	.tseg2_max = 8,</div><div class='add'>+	.sjw_max = 4,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 1024,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Control Register bits */</div><div class='add'>+#define RCAR_CAN_CTLR_BOM	GENMASK(12, 11)	/* Bus-Off Recovery Mode Bits */</div><div class='add'>+#define RCAR_CAN_CTLR_BOM_ENT		1	/* Entry to halt mode */</div><div class='add'>+						/* at bus-off entry */</div><div class='add'>+#define RCAR_CAN_CTLR_SLPM	BIT(10)		/* Sleep Mode */</div><div class='add'>+#define RCAR_CAN_CTLR_CANM	GENMASK(9, 8)	/* Operating Mode Select Bit */</div><div class='add'>+#define RCAR_CAN_CTLR_CANM_OPER		0	/* Operation Mode */</div><div class='add'>+#define RCAR_CAN_CTLR_CANM_RESET	1	/* Reset Mode */</div><div class='add'>+#define RCAR_CAN_CTLR_CANM_HALT		2	/* Halt Mode */</div><div class='add'>+#define RCAR_CAN_CTLR_CANM_FORCE_RESET	3	/* Reset Mode (forcible) */</div><div class='add'>+#define RCAR_CAN_CTLR_MLM	BIT(3)		/* Message Lost Mode Select */</div><div class='add'>+#define RCAR_CAN_CTLR_IDFM	GENMASK(2, 1)	/* ID Format Mode Select Bits */</div><div class='add'>+#define RCAR_CAN_CTLR_IDFM_STD		0	/* Standard ID mode */</div><div class='add'>+#define RCAR_CAN_CTLR_IDFM_EXT		1	/* Extended ID mode */</div><div class='add'>+#define RCAR_CAN_CTLR_IDFM_MIXED	2	/* Mixed ID mode */</div><div class='add'>+#define RCAR_CAN_CTLR_MBM	BIT(0)		/* Mailbox Mode select */</div><div class='add'>+</div><div class='add'>+/* Status Register bits */</div><div class='add'>+#define RCAR_CAN_STR_RSTST	BIT(8)		/* Reset Status Bit */</div><div class='add'>+</div><div class='add'>+/* FIFO Received ID Compare Registers 0 and 1 bits */</div><div class='add'>+#define RCAR_CAN_FIDCR_IDE	BIT(31)		/* ID Extension Bit */</div><div class='add'>+#define RCAR_CAN_FIDCR_RTR	BIT(30)		/* Remote Transmission Request Bit */</div><div class='add'>+</div><div class='add'>+/* Receive FIFO Control Register bits */</div><div class='add'>+#define RCAR_CAN_RFCR_RFEST	BIT(7)		/* Receive FIFO Empty Status Flag */</div><div class='add'>+#define RCAR_CAN_RFCR_RFE	BIT(0)		/* Receive FIFO Enable */</div><div class='add'>+</div><div class='add'>+/* Transmit FIFO Control Register bits */</div><div class='add'>+#define RCAR_CAN_TFCR_TFUST	GENMASK(3, 1)	/* Transmit FIFO Unsent Message */</div><div class='add'>+						/* Number Status Bits */</div><div class='add'>+#define RCAR_CAN_TFCR_TFE	BIT(0)		/* Transmit FIFO Enable */</div><div class='add'>+</div><div class='add'>+#define RCAR_CAN_N_RX_MKREGS1	2		/* Number of mask registers */</div><div class='add'>+						/* for Rx mailboxes 0-31 */</div><div class='add'>+#define RCAR_CAN_N_RX_MKREGS2	8</div><div class='add'>+</div><div class='add'>+/* Bit Configuration Register settings */</div><div class='add'>+#define RCAR_CAN_BCR_TSEG1	GENMASK(23, 20)</div><div class='add'>+#define RCAR_CAN_BCR_BRP	GENMASK(17, 8)</div><div class='add'>+#define RCAR_CAN_BCR_SJW	GENMASK(5, 4)</div><div class='add'>+#define RCAR_CAN_BCR_TSEG2	GENMASK(2, 0)</div><div class='add'>+</div><div class='add'>+/* Mailbox and Mask Registers bits */</div><div class='add'>+#define RCAR_CAN_IDE		BIT(31)		/* ID Extension */</div><div class='add'>+#define RCAR_CAN_RTR		BIT(30)		/* Remote Transmission Request */</div><div class='add'>+#define RCAR_CAN_SID		GENMASK(28, 18)	/* Standard ID */</div><div class='add'>+#define RCAR_CAN_EID		GENMASK(28, 0)	/* Extended ID */</div><div class='add'>+</div><div class='add'>+/* Mailbox Interrupt Enable Register 1 bits */</div><div class='add'>+#define RCAR_CAN_MIER1_RXFIE	BIT(28)		/* Receive  FIFO Interrupt Enable */</div><div class='add'>+#define RCAR_CAN_MIER1_TXFIE	BIT(24)		/* Transmit FIFO Interrupt Enable */</div><div class='add'>+</div><div class='add'>+/* Interrupt Enable Register bits */</div><div class='add'>+#define RCAR_CAN_IER_ERSIE	BIT(5)		/* Error (ERS) Interrupt Enable Bit */</div><div class='add'>+#define RCAR_CAN_IER_RXFIE	BIT(4)		/* Reception FIFO Interrupt */</div><div class='add'>+						/* Enable Bit */</div><div class='add'>+#define RCAR_CAN_IER_TXFIE	BIT(3)		/* Transmission FIFO Interrupt */</div><div class='add'>+						/* Enable Bit */</div><div class='add'>+/* Interrupt Status Register bits */</div><div class='add'>+#define RCAR_CAN_ISR_ERSF	BIT(5)		/* Error (ERS) Interrupt Status Bit */</div><div class='add'>+#define RCAR_CAN_ISR_RXFF	BIT(4)		/* Reception FIFO Interrupt */</div><div class='add'>+						/* Status Bit */</div><div class='add'>+#define RCAR_CAN_ISR_TXFF	BIT(3)		/* Transmission FIFO Interrupt */</div><div class='add'>+						/* Status Bit */</div><div class='add'>+</div><div class='add'>+/* Error Interrupt Enable Register bits */</div><div class='add'>+#define RCAR_CAN_EIER_BLIE	BIT(7)		/* Bus Lock Interrupt Enable */</div><div class='add'>+#define RCAR_CAN_EIER_OLIE	BIT(6)		/* Overload Frame Transmit */</div><div class='add'>+						/* Interrupt Enable */</div><div class='add'>+#define RCAR_CAN_EIER_ORIE	BIT(5)		/* Receive Overrun  Interrupt Enable */</div><div class='add'>+#define RCAR_CAN_EIER_BORIE	BIT(4)		/* Bus-Off Recovery Interrupt Enable */</div><div class='add'>+#define RCAR_CAN_EIER_BOEIE	BIT(3)		/* Bus-Off Entry Interrupt Enable */</div><div class='add'>+#define RCAR_CAN_EIER_EPIE	BIT(2)		/* Error Passive Interrupt Enable */</div><div class='add'>+#define RCAR_CAN_EIER_EWIE	BIT(1)		/* Error Warning Interrupt Enable */</div><div class='add'>+#define RCAR_CAN_EIER_BEIE	BIT(0)		/* Bus Error Interrupt Enable */</div><div class='add'>+</div><div class='add'>+/* Error Interrupt Factor Judge Register bits */</div><div class='add'>+#define RCAR_CAN_EIFR_BLIF	BIT(7)		/* Bus Lock Detect Flag */</div><div class='add'>+#define RCAR_CAN_EIFR_OLIF	BIT(6)		/* Overload Frame Transmission */</div><div class='add'>+						/* Detect Flag */</div><div class='add'>+#define RCAR_CAN_EIFR_ORIF	BIT(5)		/* Receive Overrun Detect Flag */</div><div class='add'>+#define RCAR_CAN_EIFR_BORIF	BIT(4)		/* Bus-Off Recovery Detect Flag */</div><div class='add'>+#define RCAR_CAN_EIFR_BOEIF	BIT(3)		/* Bus-Off Entry Detect Flag */</div><div class='add'>+#define RCAR_CAN_EIFR_EPIF	BIT(2)		/* Error Passive Detect Flag */</div><div class='add'>+#define RCAR_CAN_EIFR_EWIF	BIT(1)		/* Error Warning Detect Flag */</div><div class='add'>+#define RCAR_CAN_EIFR_BEIF	BIT(0)		/* Bus Error Detect Flag */</div><div class='add'>+</div><div class='add'>+/* Error Code Store Register bits */</div><div class='add'>+#define RCAR_CAN_ECSR_EDPM	BIT(7)		/* Error Display Mode Select Bit */</div><div class='add'>+#define RCAR_CAN_ECSR_ADEF	BIT(6)		/* ACK Delimiter Error Flag */</div><div class='add'>+#define RCAR_CAN_ECSR_BE0F	BIT(5)		/* Bit Error (dominant) Flag */</div><div class='add'>+#define RCAR_CAN_ECSR_BE1F	BIT(4)		/* Bit Error (recessive) Flag */</div><div class='add'>+#define RCAR_CAN_ECSR_CEF	BIT(3)		/* CRC Error Flag */</div><div class='add'>+#define RCAR_CAN_ECSR_AEF	BIT(2)		/* ACK Error Flag */</div><div class='add'>+#define RCAR_CAN_ECSR_FEF	BIT(1)		/* Form Error Flag */</div><div class='add'>+#define RCAR_CAN_ECSR_SEF	BIT(0)		/* Stuff Error Flag */</div><div class='add'>+</div><div class='add'>+#define RCAR_CAN_NAPI_WEIGHT	4</div><div class='add'>+#define MAX_STR_READS		0x100</div><div class='add'>+</div><div class='add'>+static void tx_failure_cleanup(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; RCAR_CAN_FIFO_DEPTH; i++)</div><div class='add'>+		can_free_echo_skb(ndev, i, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_can_error(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct rcar_can_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	u8 eifr, txerr = 0, rxerr = 0;</div><div class='add'>+</div><div class='add'>+	/* Propagate the error condition to the CAN stack */</div><div class='add'>+	skb = alloc_can_err_skb(ndev, &amp;cf);</div><div class='add'>+</div><div class='add'>+	eifr = readb(&amp;priv-&gt;regs-&gt;eifr);</div><div class='add'>+	if (eifr &amp; (RCAR_CAN_EIFR_EWIF | RCAR_CAN_EIFR_EPIF)) {</div><div class='add'>+		txerr = readb(&amp;priv-&gt;regs-&gt;tecr);</div><div class='add'>+		rxerr = readb(&amp;priv-&gt;regs-&gt;recr);</div><div class='add'>+		if (skb)</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='add'>+	}</div><div class='add'>+	if (eifr &amp; RCAR_CAN_EIFR_BEIF) {</div><div class='add'>+		int rx_errors = 0, tx_errors = 0;</div><div class='add'>+		u8 ecsr;</div><div class='add'>+</div><div class='add'>+		netdev_dbg(priv-&gt;ndev, "Bus error interrupt:\n");</div><div class='add'>+		if (skb)</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_BUSERROR | CAN_ERR_PROT;</div><div class='add'>+</div><div class='add'>+		ecsr = readb(&amp;priv-&gt;regs-&gt;ecsr);</div><div class='add'>+		if (ecsr &amp; RCAR_CAN_ECSR_ADEF) {</div><div class='add'>+			netdev_dbg(priv-&gt;ndev, "ACK Delimiter Error\n");</div><div class='add'>+			tx_errors++;</div><div class='add'>+			writeb((u8)~RCAR_CAN_ECSR_ADEF, &amp;priv-&gt;regs-&gt;ecsr);</div><div class='add'>+			if (skb)</div><div class='add'>+				cf-&gt;data[3] = CAN_ERR_PROT_LOC_ACK_DEL;</div><div class='add'>+		}</div><div class='add'>+		if (ecsr &amp; RCAR_CAN_ECSR_BE0F) {</div><div class='add'>+			netdev_dbg(priv-&gt;ndev, "Bit Error (dominant)\n");</div><div class='add'>+			tx_errors++;</div><div class='add'>+			writeb((u8)~RCAR_CAN_ECSR_BE0F, &amp;priv-&gt;regs-&gt;ecsr);</div><div class='add'>+			if (skb)</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_BIT0;</div><div class='add'>+		}</div><div class='add'>+		if (ecsr &amp; RCAR_CAN_ECSR_BE1F) {</div><div class='add'>+			netdev_dbg(priv-&gt;ndev, "Bit Error (recessive)\n");</div><div class='add'>+			tx_errors++;</div><div class='add'>+			writeb((u8)~RCAR_CAN_ECSR_BE1F, &amp;priv-&gt;regs-&gt;ecsr);</div><div class='add'>+			if (skb)</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_BIT1;</div><div class='add'>+		}</div><div class='add'>+		if (ecsr &amp; RCAR_CAN_ECSR_CEF) {</div><div class='add'>+			netdev_dbg(priv-&gt;ndev, "CRC Error\n");</div><div class='add'>+			rx_errors++;</div><div class='add'>+			writeb((u8)~RCAR_CAN_ECSR_CEF, &amp;priv-&gt;regs-&gt;ecsr);</div><div class='add'>+			if (skb)</div><div class='add'>+				cf-&gt;data[3] = CAN_ERR_PROT_LOC_CRC_SEQ;</div><div class='add'>+		}</div><div class='add'>+		if (ecsr &amp; RCAR_CAN_ECSR_AEF) {</div><div class='add'>+			netdev_dbg(priv-&gt;ndev, "ACK Error\n");</div><div class='add'>+			tx_errors++;</div><div class='add'>+			writeb((u8)~RCAR_CAN_ECSR_AEF, &amp;priv-&gt;regs-&gt;ecsr);</div><div class='add'>+			if (skb) {</div><div class='add'>+				cf-&gt;can_id |= CAN_ERR_ACK;</div><div class='add'>+				cf-&gt;data[3] = CAN_ERR_PROT_LOC_ACK;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		if (ecsr &amp; RCAR_CAN_ECSR_FEF) {</div><div class='add'>+			netdev_dbg(priv-&gt;ndev, "Form Error\n");</div><div class='add'>+			rx_errors++;</div><div class='add'>+			writeb((u8)~RCAR_CAN_ECSR_FEF, &amp;priv-&gt;regs-&gt;ecsr);</div><div class='add'>+			if (skb)</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='add'>+		}</div><div class='add'>+		if (ecsr &amp; RCAR_CAN_ECSR_SEF) {</div><div class='add'>+			netdev_dbg(priv-&gt;ndev, "Stuff Error\n");</div><div class='add'>+			rx_errors++;</div><div class='add'>+			writeb((u8)~RCAR_CAN_ECSR_SEF, &amp;priv-&gt;regs-&gt;ecsr);</div><div class='add'>+			if (skb)</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		priv-&gt;can.can_stats.bus_error++;</div><div class='add'>+		ndev-&gt;stats.rx_errors += rx_errors;</div><div class='add'>+		ndev-&gt;stats.tx_errors += tx_errors;</div><div class='add'>+		writeb((u8)~RCAR_CAN_EIFR_BEIF, &amp;priv-&gt;regs-&gt;eifr);</div><div class='add'>+	}</div><div class='add'>+	if (eifr &amp; RCAR_CAN_EIFR_EWIF) {</div><div class='add'>+		netdev_dbg(priv-&gt;ndev, "Error warning interrupt\n");</div><div class='add'>+		priv-&gt;can.state = CAN_STATE_ERROR_WARNING;</div><div class='add'>+		priv-&gt;can.can_stats.error_warning++;</div><div class='add'>+		/* Clear interrupt condition */</div><div class='add'>+		writeb((u8)~RCAR_CAN_EIFR_EWIF, &amp;priv-&gt;regs-&gt;eifr);</div><div class='add'>+		if (skb)</div><div class='add'>+			cf-&gt;data[1] = txerr &gt; rxerr ? CAN_ERR_CRTL_TX_WARNING :</div><div class='add'>+					      CAN_ERR_CRTL_RX_WARNING;</div><div class='add'>+	}</div><div class='add'>+	if (eifr &amp; RCAR_CAN_EIFR_EPIF) {</div><div class='add'>+		netdev_dbg(priv-&gt;ndev, "Error passive interrupt\n");</div><div class='add'>+		priv-&gt;can.state = CAN_STATE_ERROR_PASSIVE;</div><div class='add'>+		priv-&gt;can.can_stats.error_passive++;</div><div class='add'>+		/* Clear interrupt condition */</div><div class='add'>+		writeb((u8)~RCAR_CAN_EIFR_EPIF, &amp;priv-&gt;regs-&gt;eifr);</div><div class='add'>+		if (skb)</div><div class='add'>+			cf-&gt;data[1] = txerr &gt; rxerr ? CAN_ERR_CRTL_TX_PASSIVE :</div><div class='add'>+					      CAN_ERR_CRTL_RX_PASSIVE;</div><div class='add'>+	}</div><div class='add'>+	if (eifr &amp; RCAR_CAN_EIFR_BOEIF) {</div><div class='add'>+		netdev_dbg(priv-&gt;ndev, "Bus-off entry interrupt\n");</div><div class='add'>+		tx_failure_cleanup(ndev);</div><div class='add'>+		priv-&gt;ier = RCAR_CAN_IER_ERSIE;</div><div class='add'>+		writeb(priv-&gt;ier, &amp;priv-&gt;regs-&gt;ier);</div><div class='add'>+		priv-&gt;can.state = CAN_STATE_BUS_OFF;</div><div class='add'>+		/* Clear interrupt condition */</div><div class='add'>+		writeb((u8)~RCAR_CAN_EIFR_BOEIF, &amp;priv-&gt;regs-&gt;eifr);</div><div class='add'>+		priv-&gt;can.can_stats.bus_off++;</div><div class='add'>+		can_bus_off(ndev);</div><div class='add'>+		if (skb)</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_BUSOFF;</div><div class='add'>+	} else if (skb) {</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_CNT;</div><div class='add'>+		cf-&gt;data[6] = txerr;</div><div class='add'>+		cf-&gt;data[7] = rxerr;</div><div class='add'>+	}</div><div class='add'>+	if (eifr &amp; RCAR_CAN_EIFR_ORIF) {</div><div class='add'>+		netdev_dbg(priv-&gt;ndev, "Receive overrun error interrupt\n");</div><div class='add'>+		ndev-&gt;stats.rx_over_errors++;</div><div class='add'>+		ndev-&gt;stats.rx_errors++;</div><div class='add'>+		writeb((u8)~RCAR_CAN_EIFR_ORIF, &amp;priv-&gt;regs-&gt;eifr);</div><div class='add'>+		if (skb) {</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='add'>+			cf-&gt;data[1] = CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	if (eifr &amp; RCAR_CAN_EIFR_OLIF) {</div><div class='add'>+		netdev_dbg(priv-&gt;ndev,</div><div class='add'>+			   "Overload Frame Transmission error interrupt\n");</div><div class='add'>+		ndev-&gt;stats.rx_over_errors++;</div><div class='add'>+		ndev-&gt;stats.rx_errors++;</div><div class='add'>+		writeb((u8)~RCAR_CAN_EIFR_OLIF, &amp;priv-&gt;regs-&gt;eifr);</div><div class='add'>+		if (skb) {</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_PROT;</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_OVERLOAD;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (skb)</div><div class='add'>+		netif_rx(skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_can_tx_done(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct rcar_can_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct net_device_stats *stats = &amp;ndev-&gt;stats;</div><div class='add'>+	u8 isr;</div><div class='add'>+</div><div class='add'>+	while (1) {</div><div class='add'>+		u8 unsent = FIELD_GET(RCAR_CAN_TFCR_TFUST,</div><div class='add'>+			    readb(&amp;priv-&gt;regs-&gt;tfcr));</div><div class='add'>+</div><div class='add'>+		if (priv-&gt;tx_head - priv-&gt;tx_tail &lt;= unsent)</div><div class='add'>+			break;</div><div class='add'>+		stats-&gt;tx_packets++;</div><div class='add'>+		stats-&gt;tx_bytes +=</div><div class='add'>+			can_get_echo_skb(ndev,</div><div class='add'>+					 priv-&gt;tx_tail % RCAR_CAN_FIFO_DEPTH,</div><div class='add'>+					 NULL);</div><div class='add'>+</div><div class='add'>+		priv-&gt;tx_tail++;</div><div class='add'>+		netif_wake_queue(ndev);</div><div class='add'>+	}</div><div class='add'>+	/* Clear interrupt */</div><div class='add'>+	isr = readb(&amp;priv-&gt;regs-&gt;isr);</div><div class='add'>+	writeb(isr &amp; ~RCAR_CAN_ISR_TXFF, &amp;priv-&gt;regs-&gt;isr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t rcar_can_interrupt(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = dev_id;</div><div class='add'>+	struct rcar_can_priv *priv = netdev_priv(ndev);</div><div class='add'>+	u8 isr;</div><div class='add'>+</div><div class='add'>+	isr = readb(&amp;priv-&gt;regs-&gt;isr);</div><div class='add'>+	if (!(isr &amp; priv-&gt;ier))</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+</div><div class='add'>+	if (isr &amp; RCAR_CAN_ISR_ERSF)</div><div class='add'>+		rcar_can_error(ndev);</div><div class='add'>+</div><div class='add'>+	if (isr &amp; RCAR_CAN_ISR_TXFF)</div><div class='add'>+		rcar_can_tx_done(ndev);</div><div class='add'>+</div><div class='add'>+	if (isr &amp; RCAR_CAN_ISR_RXFF) {</div><div class='add'>+		if (napi_schedule_prep(&amp;priv-&gt;napi)) {</div><div class='add'>+			/* Disable Rx FIFO interrupts */</div><div class='add'>+			priv-&gt;ier &amp;= ~RCAR_CAN_IER_RXFIE;</div><div class='add'>+			writeb(priv-&gt;ier, &amp;priv-&gt;regs-&gt;ier);</div><div class='add'>+			__napi_schedule(&amp;priv-&gt;napi);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_can_set_bittiming(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct rcar_can_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct can_bittiming *bt = &amp;priv-&gt;can.bittiming;</div><div class='add'>+	u32 bcr;</div><div class='add'>+</div><div class='add'>+	bcr = FIELD_PREP(RCAR_CAN_BCR_TSEG1, bt-&gt;phase_seg1 + bt-&gt;prop_seg - 1) |</div><div class='add'>+	      FIELD_PREP(RCAR_CAN_BCR_BRP, bt-&gt;brp - 1) |</div><div class='add'>+	      FIELD_PREP(RCAR_CAN_BCR_SJW, bt-&gt;sjw - 1) |</div><div class='add'>+	      FIELD_PREP(RCAR_CAN_BCR_TSEG2, bt-&gt;phase_seg2 - 1);</div><div class='add'>+	/* Don't overwrite CLKR with 32-bit BCR access; CLKR has 8-bit access.</div><div class='add'>+	 * All the registers are big-endian but they get byte-swapped on 32-bit</div><div class='add'>+	 * read/write (but not on 8-bit, contrary to the manuals)...</div><div class='add'>+	 */</div><div class='add'>+	writel((bcr &lt;&lt; 8) | priv-&gt;clock_select, &amp;priv-&gt;regs-&gt;bcr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_can_start(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct rcar_can_priv *priv = netdev_priv(ndev);</div><div class='add'>+	u16 ctlr;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Set controller to known mode:</div><div class='add'>+	 * - FIFO mailbox mode</div><div class='add'>+	 * - accept all messages</div><div class='add'>+	 * - overrun mode</div><div class='add'>+	 * CAN is in sleep mode after MCU hardware or software reset.</div><div class='add'>+	 */</div><div class='add'>+	ctlr = readw(&amp;priv-&gt;regs-&gt;ctlr);</div><div class='add'>+	ctlr &amp;= ~RCAR_CAN_CTLR_SLPM;</div><div class='add'>+	writew(ctlr, &amp;priv-&gt;regs-&gt;ctlr);</div><div class='add'>+	/* Go to reset mode */</div><div class='add'>+	ctlr |= FIELD_PREP(RCAR_CAN_CTLR_CANM, RCAR_CAN_CTLR_CANM_FORCE_RESET);</div><div class='add'>+	writew(ctlr, &amp;priv-&gt;regs-&gt;ctlr);</div><div class='add'>+	for (i = 0; i &lt; MAX_STR_READS; i++) {</div><div class='add'>+		if (readw(&amp;priv-&gt;regs-&gt;str) &amp; RCAR_CAN_STR_RSTST)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+	rcar_can_set_bittiming(ndev);</div><div class='add'>+	/* Select mixed ID mode */</div><div class='add'>+	ctlr |= FIELD_PREP(RCAR_CAN_CTLR_IDFM, RCAR_CAN_CTLR_IDFM_MIXED);</div><div class='add'>+	/* Entry to halt mode automatically at bus-off */</div><div class='add'>+	ctlr |= FIELD_PREP(RCAR_CAN_CTLR_BOM, RCAR_CAN_CTLR_BOM_ENT);</div><div class='add'>+	ctlr |= RCAR_CAN_CTLR_MBM;	/* Select FIFO mailbox mode */</div><div class='add'>+	ctlr |= RCAR_CAN_CTLR_MLM;	/* Overrun mode */</div><div class='add'>+	writew(ctlr, &amp;priv-&gt;regs-&gt;ctlr);</div><div class='add'>+</div><div class='add'>+	/* Accept all SID and EID */</div><div class='add'>+	writel(0, &amp;priv-&gt;regs-&gt;mkr_2_9[6]);</div><div class='add'>+	writel(0, &amp;priv-&gt;regs-&gt;mkr_2_9[7]);</div><div class='add'>+	/* In FIFO mailbox mode, write "0" to bits 24 to 31 */</div><div class='add'>+	writel(0, &amp;priv-&gt;regs-&gt;mkivlr1);</div><div class='add'>+	/* Accept all frames */</div><div class='add'>+	writel(0, &amp;priv-&gt;regs-&gt;fidcr[0]);</div><div class='add'>+	writel(RCAR_CAN_FIDCR_IDE | RCAR_CAN_FIDCR_RTR, &amp;priv-&gt;regs-&gt;fidcr[1]);</div><div class='add'>+	/* Enable and configure FIFO mailbox interrupts */</div><div class='add'>+	writel(RCAR_CAN_MIER1_RXFIE | RCAR_CAN_MIER1_TXFIE, &amp;priv-&gt;regs-&gt;mier1);</div><div class='add'>+</div><div class='add'>+	priv-&gt;ier = RCAR_CAN_IER_ERSIE | RCAR_CAN_IER_RXFIE |</div><div class='add'>+		    RCAR_CAN_IER_TXFIE;</div><div class='add'>+	writeb(priv-&gt;ier, &amp;priv-&gt;regs-&gt;ier);</div><div class='add'>+</div><div class='add'>+	/* Accumulate error codes */</div><div class='add'>+	writeb(RCAR_CAN_ECSR_EDPM, &amp;priv-&gt;regs-&gt;ecsr);</div><div class='add'>+	/* Enable error interrupts */</div><div class='add'>+	writeb(RCAR_CAN_EIER_EWIE | RCAR_CAN_EIER_EPIE | RCAR_CAN_EIER_BOEIE |</div><div class='add'>+	       (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING ?</div><div class='add'>+	       RCAR_CAN_EIER_BEIE : 0) | RCAR_CAN_EIER_ORIE |</div><div class='add'>+	       RCAR_CAN_EIER_OLIE, &amp;priv-&gt;regs-&gt;eier);</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+</div><div class='add'>+	/* Go to operation mode */</div><div class='add'>+	ctlr &amp;= ~RCAR_CAN_CTLR_CANM;</div><div class='add'>+	ctlr |= FIELD_PREP(RCAR_CAN_CTLR_CANM, RCAR_CAN_CTLR_CANM_OPER);</div><div class='add'>+	writew(ctlr, &amp;priv-&gt;regs-&gt;ctlr);</div><div class='add'>+	for (i = 0; i &lt; MAX_STR_READS; i++) {</div><div class='add'>+		if (!(readw(&amp;priv-&gt;regs-&gt;str) &amp; RCAR_CAN_STR_RSTST))</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+	/* Enable Rx and Tx FIFO */</div><div class='add'>+	writeb(RCAR_CAN_RFCR_RFE, &amp;priv-&gt;regs-&gt;rfcr);</div><div class='add'>+	writeb(RCAR_CAN_TFCR_TFE, &amp;priv-&gt;regs-&gt;tfcr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rcar_can_open(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct rcar_can_priv *priv = netdev_priv(ndev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = pm_runtime_resume_and_get(ndev-&gt;dev.parent);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(ndev, "pm_runtime_resume_and_get() failed %pe\n",</div><div class='add'>+			   ERR_PTR(err));</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	err = clk_prepare_enable(priv-&gt;can_clk);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(ndev, "failed to enable CAN clock: %pe\n",</div><div class='add'>+			   ERR_PTR(err));</div><div class='add'>+		goto out_rpm;</div><div class='add'>+	}</div><div class='add'>+	err = open_candev(ndev);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(ndev, "open_candev() failed %pe\n", ERR_PTR(err));</div><div class='add'>+		goto out_can_clock;</div><div class='add'>+	}</div><div class='add'>+	napi_enable(&amp;priv-&gt;napi);</div><div class='add'>+	err = request_irq(ndev-&gt;irq, rcar_can_interrupt, 0, ndev-&gt;name, ndev);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(ndev, "request_irq(%d) failed %pe\n", ndev-&gt;irq,</div><div class='add'>+			   ERR_PTR(err));</div><div class='add'>+		goto out_close;</div><div class='add'>+	}</div><div class='add'>+	rcar_can_start(ndev);</div><div class='add'>+	netif_start_queue(ndev);</div><div class='add'>+	return 0;</div><div class='add'>+out_close:</div><div class='add'>+	napi_disable(&amp;priv-&gt;napi);</div><div class='add'>+	close_candev(ndev);</div><div class='add'>+out_can_clock:</div><div class='add'>+	clk_disable_unprepare(priv-&gt;can_clk);</div><div class='add'>+out_rpm:</div><div class='add'>+	pm_runtime_put(ndev-&gt;dev.parent);</div><div class='add'>+out:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_can_stop(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct rcar_can_priv *priv = netdev_priv(ndev);</div><div class='add'>+	u16 ctlr;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Go to (force) reset mode */</div><div class='add'>+	ctlr = readw(&amp;priv-&gt;regs-&gt;ctlr);</div><div class='add'>+	ctlr |= FIELD_PREP(RCAR_CAN_CTLR_CANM, RCAR_CAN_CTLR_CANM_FORCE_RESET);</div><div class='add'>+	writew(ctlr, &amp;priv-&gt;regs-&gt;ctlr);</div><div class='add'>+	for (i = 0; i &lt; MAX_STR_READS; i++) {</div><div class='add'>+		if (readw(&amp;priv-&gt;regs-&gt;str) &amp; RCAR_CAN_STR_RSTST)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+	writel(0, &amp;priv-&gt;regs-&gt;mier0);</div><div class='add'>+	writel(0, &amp;priv-&gt;regs-&gt;mier1);</div><div class='add'>+	writeb(0, &amp;priv-&gt;regs-&gt;ier);</div><div class='add'>+	writeb(0, &amp;priv-&gt;regs-&gt;eier);</div><div class='add'>+	/* Go to sleep mode */</div><div class='add'>+	ctlr |= RCAR_CAN_CTLR_SLPM;</div><div class='add'>+	writew(ctlr, &amp;priv-&gt;regs-&gt;ctlr);</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rcar_can_close(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct rcar_can_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(ndev);</div><div class='add'>+	rcar_can_stop(ndev);</div><div class='add'>+	free_irq(ndev-&gt;irq, ndev);</div><div class='add'>+	napi_disable(&amp;priv-&gt;napi);</div><div class='add'>+	clk_disable_unprepare(priv-&gt;can_clk);</div><div class='add'>+	pm_runtime_put(ndev-&gt;dev.parent);</div><div class='add'>+	close_candev(ndev);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static netdev_tx_t rcar_can_start_xmit(struct sk_buff *skb,</div><div class='add'>+				       struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct rcar_can_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct can_frame *cf = (struct can_frame *)skb-&gt;data;</div><div class='add'>+	u32 data, i;</div><div class='add'>+</div><div class='add'>+	if (can_dev_dropped_skb(ndev, skb))</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+	if (cf-&gt;can_id &amp; CAN_EFF_FLAG)	/* Extended frame format */</div><div class='add'>+		data = FIELD_PREP(RCAR_CAN_EID, cf-&gt;can_id &amp; CAN_EFF_MASK) |</div><div class='add'>+		       RCAR_CAN_IDE;</div><div class='add'>+	else				/* Standard frame format */</div><div class='add'>+		data = FIELD_PREP(RCAR_CAN_SID, cf-&gt;can_id &amp; CAN_SFF_MASK);</div><div class='add'>+</div><div class='add'>+	if (cf-&gt;can_id &amp; CAN_RTR_FLAG) { /* Remote transmission request */</div><div class='add'>+		data |= RCAR_CAN_RTR;</div><div class='add'>+	} else {</div><div class='add'>+		for (i = 0; i &lt; cf-&gt;len; i++)</div><div class='add'>+			writeb(cf-&gt;data[i],</div><div class='add'>+			       &amp;priv-&gt;regs-&gt;mb[RCAR_CAN_TX_FIFO_MBX].data[i]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	writel(data, &amp;priv-&gt;regs-&gt;mb[RCAR_CAN_TX_FIFO_MBX].id);</div><div class='add'>+</div><div class='add'>+	writeb(cf-&gt;len, &amp;priv-&gt;regs-&gt;mb[RCAR_CAN_TX_FIFO_MBX].dlc);</div><div class='add'>+</div><div class='add'>+	can_put_echo_skb(skb, ndev, priv-&gt;tx_head % RCAR_CAN_FIFO_DEPTH, 0);</div><div class='add'>+	priv-&gt;tx_head++;</div><div class='add'>+	/* Start Tx: write 0xff to the TFPCR register to increment</div><div class='add'>+	 * the CPU-side pointer for the transmit FIFO to the next</div><div class='add'>+	 * mailbox location</div><div class='add'>+	 */</div><div class='add'>+	writeb(0xff, &amp;priv-&gt;regs-&gt;tfpcr);</div><div class='add'>+	/* Stop the queue if we've filled all FIFO entries */</div><div class='add'>+	if (priv-&gt;tx_head - priv-&gt;tx_tail &gt;= RCAR_CAN_FIFO_DEPTH)</div><div class='add'>+		netif_stop_queue(ndev);</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops rcar_can_netdev_ops = {</div><div class='add'>+	.ndo_open = rcar_can_open,</div><div class='add'>+	.ndo_stop = rcar_can_close,</div><div class='add'>+	.ndo_start_xmit = rcar_can_start_xmit,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops rcar_can_ethtool_ops = {</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void rcar_can_rx_pkt(struct rcar_can_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct net_device_stats *stats = &amp;priv-&gt;ndev-&gt;stats;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	u32 data;</div><div class='add'>+	u8 dlc;</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_skb(priv-&gt;ndev, &amp;cf);</div><div class='add'>+	if (!skb) {</div><div class='add'>+		stats-&gt;rx_dropped++;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	data = readl(&amp;priv-&gt;regs-&gt;mb[RCAR_CAN_RX_FIFO_MBX].id);</div><div class='add'>+	if (data &amp; RCAR_CAN_IDE)</div><div class='add'>+		cf-&gt;can_id = FIELD_GET(RCAR_CAN_EID, data) | CAN_EFF_FLAG;</div><div class='add'>+	else</div><div class='add'>+		cf-&gt;can_id = FIELD_GET(RCAR_CAN_SID, data);</div><div class='add'>+</div><div class='add'>+	dlc = readb(&amp;priv-&gt;regs-&gt;mb[RCAR_CAN_RX_FIFO_MBX].dlc);</div><div class='add'>+	cf-&gt;len = can_cc_dlc2len(dlc);</div><div class='add'>+	if (data &amp; RCAR_CAN_RTR) {</div><div class='add'>+		cf-&gt;can_id |= CAN_RTR_FLAG;</div><div class='add'>+	} else {</div><div class='add'>+		for (dlc = 0; dlc &lt; cf-&gt;len; dlc++)</div><div class='add'>+			cf-&gt;data[dlc] =</div><div class='add'>+			readb(&amp;priv-&gt;regs-&gt;mb[RCAR_CAN_RX_FIFO_MBX].data[dlc]);</div><div class='add'>+</div><div class='add'>+		stats-&gt;rx_bytes += cf-&gt;len;</div><div class='add'>+	}</div><div class='add'>+	stats-&gt;rx_packets++;</div><div class='add'>+</div><div class='add'>+	netif_receive_skb(skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rcar_can_rx_poll(struct napi_struct *napi, int quota)</div><div class='add'>+{</div><div class='add'>+	struct rcar_can_priv *priv = container_of(napi,</div><div class='add'>+						  struct rcar_can_priv, napi);</div><div class='add'>+	int num_pkts;</div><div class='add'>+</div><div class='add'>+	for (num_pkts = 0; num_pkts &lt; quota; num_pkts++) {</div><div class='add'>+		u8 rfcr, isr;</div><div class='add'>+</div><div class='add'>+		isr = readb(&amp;priv-&gt;regs-&gt;isr);</div><div class='add'>+		/* Clear interrupt bit */</div><div class='add'>+		if (isr &amp; RCAR_CAN_ISR_RXFF)</div><div class='add'>+			writeb(isr &amp; ~RCAR_CAN_ISR_RXFF, &amp;priv-&gt;regs-&gt;isr);</div><div class='add'>+		rfcr = readb(&amp;priv-&gt;regs-&gt;rfcr);</div><div class='add'>+		if (rfcr &amp; RCAR_CAN_RFCR_RFEST)</div><div class='add'>+			break;</div><div class='add'>+		rcar_can_rx_pkt(priv);</div><div class='add'>+		/* Write 0xff to the RFPCR register to increment</div><div class='add'>+		 * the CPU-side pointer for the receive FIFO</div><div class='add'>+		 * to the next mailbox location</div><div class='add'>+		 */</div><div class='add'>+		writeb(0xff, &amp;priv-&gt;regs-&gt;rfpcr);</div><div class='add'>+	}</div><div class='add'>+	/* All packets processed */</div><div class='add'>+	if (num_pkts &lt; quota) {</div><div class='add'>+		napi_complete_done(napi, num_pkts);</div><div class='add'>+		priv-&gt;ier |= RCAR_CAN_IER_RXFIE;</div><div class='add'>+		writeb(priv-&gt;ier, &amp;priv-&gt;regs-&gt;ier);</div><div class='add'>+	}</div><div class='add'>+	return num_pkts;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rcar_can_do_set_mode(struct net_device *ndev, enum can_mode mode)</div><div class='add'>+{</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case CAN_MODE_START:</div><div class='add'>+		rcar_can_start(ndev);</div><div class='add'>+		netif_wake_queue(ndev);</div><div class='add'>+		return 0;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rcar_can_get_berr_counter(const struct net_device *ndev,</div><div class='add'>+				     struct can_berr_counter *bec)</div><div class='add'>+{</div><div class='add'>+	struct rcar_can_priv *priv = netdev_priv(ndev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = pm_runtime_resume_and_get(ndev-&gt;dev.parent);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	bec-&gt;txerr = readb(&amp;priv-&gt;regs-&gt;tecr);</div><div class='add'>+	bec-&gt;rxerr = readb(&amp;priv-&gt;regs-&gt;recr);</div><div class='add'>+</div><div class='add'>+	pm_runtime_put(ndev-&gt;dev.parent);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char * const clock_names[] = {</div><div class='add'>+	[CLKR_CLKP1]	= "clkp1",</div><div class='add'>+	[CLKR_CLKP2]	= "clkp2",</div><div class='add'>+	[CLKR_CLKEXT]	= "can_clk",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int rcar_can_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct rcar_can_priv *priv;</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	void __iomem *addr;</div><div class='add'>+	u32 clock_select = CLKR_CLKP1;</div><div class='add'>+	int err = -ENODEV;</div><div class='add'>+	int irq;</div><div class='add'>+</div><div class='add'>+	of_property_read_u32(dev-&gt;of_node, "renesas,can-clock-select",</div><div class='add'>+			     &amp;clock_select);</div><div class='add'>+</div><div class='add'>+	irq = platform_get_irq(pdev, 0);</div><div class='add'>+	if (irq &lt; 0) {</div><div class='add'>+		err = irq;</div><div class='add'>+		goto fail;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	addr = devm_platform_ioremap_resource(pdev, 0);</div><div class='add'>+	if (IS_ERR(addr)) {</div><div class='add'>+		err = PTR_ERR(addr);</div><div class='add'>+		goto fail;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ndev = alloc_candev(sizeof(struct rcar_can_priv), RCAR_CAN_FIFO_DEPTH);</div><div class='add'>+	if (!ndev) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto fail;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	if (!(BIT(clock_select) &amp; RCAR_SUPPORTED_CLOCKS)) {</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		dev_err(dev, "invalid CAN clock selected\n");</div><div class='add'>+		goto fail_clk;</div><div class='add'>+	}</div><div class='add'>+	priv-&gt;can_clk = devm_clk_get(dev, clock_names[clock_select]);</div><div class='add'>+	if (IS_ERR(priv-&gt;can_clk)) {</div><div class='add'>+		dev_err(dev, "cannot get CAN clock: %pe\n", priv-&gt;can_clk);</div><div class='add'>+		err = PTR_ERR(priv-&gt;can_clk);</div><div class='add'>+		goto fail_clk;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ndev-&gt;netdev_ops = &amp;rcar_can_netdev_ops;</div><div class='add'>+	ndev-&gt;ethtool_ops = &amp;rcar_can_ethtool_ops;</div><div class='add'>+	ndev-&gt;irq = irq;</div><div class='add'>+	ndev-&gt;flags |= IFF_ECHO;</div><div class='add'>+	priv-&gt;ndev = ndev;</div><div class='add'>+	priv-&gt;regs = addr;</div><div class='add'>+	priv-&gt;clock_select = clock_select;</div><div class='add'>+	priv-&gt;can.clock.freq = clk_get_rate(priv-&gt;can_clk);</div><div class='add'>+	priv-&gt;can.bittiming_const = &amp;rcar_can_bittiming_const;</div><div class='add'>+	priv-&gt;can.do_set_mode = rcar_can_do_set_mode;</div><div class='add'>+	priv-&gt;can.do_get_berr_counter = rcar_can_get_berr_counter;</div><div class='add'>+	priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_BERR_REPORTING;</div><div class='add'>+	platform_set_drvdata(pdev, ndev);</div><div class='add'>+	SET_NETDEV_DEV(ndev, dev);</div><div class='add'>+</div><div class='add'>+	netif_napi_add_weight(ndev, &amp;priv-&gt;napi, rcar_can_rx_poll,</div><div class='add'>+			      RCAR_CAN_NAPI_WEIGHT);</div><div class='add'>+</div><div class='add'>+	pm_runtime_enable(dev);</div><div class='add'>+</div><div class='add'>+	err = register_candev(ndev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "register_candev() failed %pe\n", ERR_PTR(err));</div><div class='add'>+		goto fail_rpm;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_info(dev, "device registered (IRQ%d)\n", ndev-&gt;irq);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+fail_rpm:</div><div class='add'>+	pm_runtime_disable(dev);</div><div class='add'>+	netif_napi_del(&amp;priv-&gt;napi);</div><div class='add'>+fail_clk:</div><div class='add'>+	free_candev(ndev);</div><div class='add'>+fail:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_can_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = platform_get_drvdata(pdev);</div><div class='add'>+	struct rcar_can_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	unregister_candev(ndev);</div><div class='add'>+	pm_runtime_disable(&amp;pdev-&gt;dev);</div><div class='add'>+	netif_napi_del(&amp;priv-&gt;napi);</div><div class='add'>+	free_candev(ndev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rcar_can_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = dev_get_drvdata(dev);</div><div class='add'>+	struct rcar_can_priv *priv = netdev_priv(ndev);</div><div class='add'>+	u16 ctlr;</div><div class='add'>+</div><div class='add'>+	if (!netif_running(ndev))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(ndev);</div><div class='add'>+	netif_device_detach(ndev);</div><div class='add'>+</div><div class='add'>+	ctlr = readw(&amp;priv-&gt;regs-&gt;ctlr);</div><div class='add'>+	ctlr |= FIELD_PREP(RCAR_CAN_CTLR_CANM, RCAR_CAN_CTLR_CANM_HALT);</div><div class='add'>+	writew(ctlr, &amp;priv-&gt;regs-&gt;ctlr);</div><div class='add'>+	ctlr |= RCAR_CAN_CTLR_SLPM;</div><div class='add'>+	writew(ctlr, &amp;priv-&gt;regs-&gt;ctlr);</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_SLEEPING;</div><div class='add'>+</div><div class='add'>+	pm_runtime_put(dev);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rcar_can_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = dev_get_drvdata(dev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!netif_running(ndev))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	err = pm_runtime_resume_and_get(dev);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(ndev, "pm_runtime_resume_and_get() failed %pe\n",</div><div class='add'>+			   ERR_PTR(err));</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rcar_can_start(ndev);</div><div class='add'>+</div><div class='add'>+	netif_device_attach(ndev);</div><div class='add'>+	netif_start_queue(ndev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static DEFINE_SIMPLE_DEV_PM_OPS(rcar_can_pm_ops, rcar_can_suspend,</div><div class='add'>+				rcar_can_resume);</div><div class='add'>+</div><div class='add'>+static const struct of_device_id rcar_can_of_table[] __maybe_unused = {</div><div class='add'>+	{ .compatible = "renesas,can-r8a7778" },</div><div class='add'>+	{ .compatible = "renesas,can-r8a7779" },</div><div class='add'>+	{ .compatible = "renesas,can-r8a7790" },</div><div class='add'>+	{ .compatible = "renesas,can-r8a7791" },</div><div class='add'>+	{ .compatible = "renesas,rcar-gen1-can" },</div><div class='add'>+	{ .compatible = "renesas,rcar-gen2-can" },</div><div class='add'>+	{ .compatible = "renesas,rcar-gen3-can" },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, rcar_can_of_table);</div><div class='add'>+</div><div class='add'>+static struct platform_driver rcar_can_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = RCAR_CAN_DRV_NAME,</div><div class='add'>+		.of_match_table = of_match_ptr(rcar_can_of_table),</div><div class='add'>+		.pm = pm_sleep_ptr(&amp;rcar_can_pm_ops),</div><div class='add'>+	},</div><div class='add'>+	.probe = rcar_can_probe,</div><div class='add'>+	.remove = rcar_can_remove,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_platform_driver(rcar_can_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Cogent Embedded, Inc.");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_DESCRIPTION("CAN driver for Renesas R-Car SoC");</div><div class='add'>+MODULE_ALIAS("platform:" RCAR_CAN_DRV_NAME);</div><div class='head'>diff --git a/drivers/net/can/rcar/rcar_canfd.c b/drivers/net/can/rcar/rcar_canfd.c<br/>new file mode 100644<br/>index 000000000000..7895e1fdea1c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/rcar/rcar_canfd.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/rcar/rcar_canfd.c</a></div><div class='hunk'>@@ -0,0 +1,2359 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+/* Renesas R-Car CAN FD device driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2015 Renesas Electronics Corp.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* The R-Car CAN FD controller can operate in either one of the below two modes</div><div class='add'>+ *  - CAN FD only mode</div><div class='add'>+ *  - Classical CAN (CAN 2.0) only mode</div><div class='add'>+ *</div><div class='add'>+ * This driver puts the controller in CAN FD only mode by default. In this</div><div class='add'>+ * mode, the controller acts as a CAN FD node that can also interoperate with</div><div class='add'>+ * CAN 2.0 nodes.</div><div class='add'>+ *</div><div class='add'>+ * To switch the controller to Classical CAN (CAN 2.0) only mode, add</div><div class='add'>+ * "renesas,no-can-fd" optional property to the device tree node. A h/w reset is</div><div class='add'>+ * also required to switch modes.</div><div class='add'>+ *</div><div class='add'>+ * Note: The h/w manual register naming convention is clumsy and not acceptable</div><div class='add'>+ * to use as it is in the driver. However, those names are added as comments</div><div class='add'>+ * wherever it is modified to a readable name.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/bitmap.h&gt;</div><div class='add'>+#include &lt;linux/bitops.h&gt;</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/iopoll.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/moduleparam.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/phy/phy.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/reset.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+#define RCANFD_DRV_NAME			"rcar_canfd"</div><div class='add'>+</div><div class='add'>+/* Global register bits */</div><div class='add'>+</div><div class='add'>+/* RSCFDnCFDGRMCFG */</div><div class='add'>+#define RCANFD_GRMCFG_RCMC		BIT(0)</div><div class='add'>+</div><div class='add'>+/* RSCFDnCFDGCFG / RSCFDnGCFG */</div><div class='add'>+#define RCANFD_GCFG_EEFE		BIT(6)</div><div class='add'>+#define RCANFD_GCFG_CMPOC		BIT(5)	/* CAN FD only */</div><div class='add'>+#define RCANFD_GCFG_DCS			BIT(4)</div><div class='add'>+#define RCANFD_GCFG_DCE			BIT(1)</div><div class='add'>+#define RCANFD_GCFG_TPRI		BIT(0)</div><div class='add'>+</div><div class='add'>+/* RSCFDnCFDGCTR / RSCFDnGCTR */</div><div class='add'>+#define RCANFD_GCTR_TSRST		BIT(16)</div><div class='add'>+#define RCANFD_GCTR_CFMPOFIE		BIT(11)	/* CAN FD only */</div><div class='add'>+#define RCANFD_GCTR_THLEIE		BIT(10)</div><div class='add'>+#define RCANFD_GCTR_MEIE		BIT(9)</div><div class='add'>+#define RCANFD_GCTR_DEIE		BIT(8)</div><div class='add'>+#define RCANFD_GCTR_GSLPR		BIT(2)</div><div class='add'>+#define RCANFD_GCTR_GMDC_MASK		(0x3)</div><div class='add'>+#define RCANFD_GCTR_GMDC_GOPM		(0x0)</div><div class='add'>+#define RCANFD_GCTR_GMDC_GRESET		(0x1)</div><div class='add'>+#define RCANFD_GCTR_GMDC_GTEST		(0x2)</div><div class='add'>+</div><div class='add'>+/* RSCFDnCFDGSTS / RSCFDnGSTS */</div><div class='add'>+#define RCANFD_GSTS_GRAMINIT		BIT(3)</div><div class='add'>+#define RCANFD_GSTS_GSLPSTS		BIT(2)</div><div class='add'>+#define RCANFD_GSTS_GHLTSTS		BIT(1)</div><div class='add'>+#define RCANFD_GSTS_GRSTSTS		BIT(0)</div><div class='add'>+/* Non-operational status */</div><div class='add'>+#define RCANFD_GSTS_GNOPM		(BIT(0) | BIT(1) | BIT(2) | BIT(3))</div><div class='add'>+</div><div class='add'>+/* RSCFDnCFDGERFL / RSCFDnGERFL */</div><div class='add'>+#define RCANFD_GERFL_EEF		GENMASK(23, 16)</div><div class='add'>+#define RCANFD_GERFL_CMPOF		BIT(3)	/* CAN FD only */</div><div class='add'>+#define RCANFD_GERFL_THLES		BIT(2)</div><div class='add'>+#define RCANFD_GERFL_MES		BIT(1)</div><div class='add'>+#define RCANFD_GERFL_DEF		BIT(0)</div><div class='add'>+</div><div class='add'>+#define RCANFD_GERFL_ERR(gpriv, x) \</div><div class='add'>+({\</div><div class='add'>+	typeof(gpriv) (_gpriv) = (gpriv); \</div><div class='add'>+	((x) &amp; ((FIELD_PREP(RCANFD_GERFL_EEF, (_gpriv)-&gt;channels_mask)) | \</div><div class='add'>+		RCANFD_GERFL_MES | ((_gpriv)-&gt;fdmode ? RCANFD_GERFL_CMPOF : 0))); \</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+/* AFL Rx rules registers */</div><div class='add'>+</div><div class='add'>+/* RSCFDnCFDGAFLECTR / RSCFDnGAFLECTR */</div><div class='add'>+#define RCANFD_GAFLECTR_AFLDAE		BIT(8)</div><div class='add'>+#define RCANFD_GAFLECTR_AFLPN(gpriv, page_num)	((page_num) &amp; (gpriv)-&gt;info-&gt;max_aflpn)</div><div class='add'>+</div><div class='add'>+/* RSCFDnCFDGAFLIDj / RSCFDnGAFLIDj */</div><div class='add'>+#define RCANFD_GAFLID_GAFLLB		BIT(29)</div><div class='add'>+</div><div class='add'>+/* RSCFDnCFDGAFLP1_j / RSCFDnGAFLP1_j */</div><div class='add'>+#define RCANFD_GAFLP1_GAFLFDP(x)	(1 &lt;&lt; (x))</div><div class='add'>+</div><div class='add'>+/* Channel register bits */</div><div class='add'>+</div><div class='add'>+/* RSCFDnCmCFG - Classical CAN only */</div><div class='add'>+#define RCANFD_CFG_SJW		GENMASK(25, 24)</div><div class='add'>+#define RCANFD_CFG_TSEG2	GENMASK(22, 20)</div><div class='add'>+#define RCANFD_CFG_TSEG1	GENMASK(19, 16)</div><div class='add'>+#define RCANFD_CFG_BRP		GENMASK(9, 0)</div><div class='add'>+</div><div class='add'>+/* RSCFDnCFDCmNCFG - CAN FD only */</div><div class='add'>+#define RCANFD_NCFG_NBRP	GENMASK(9, 0)</div><div class='add'>+</div><div class='add'>+/* RSCFDnCFDCmCTR / RSCFDnCmCTR */</div><div class='add'>+#define RCANFD_CCTR_CTME		BIT(24)</div><div class='add'>+#define RCANFD_CCTR_ERRD		BIT(23)</div><div class='add'>+#define RCANFD_CCTR_BOM_MASK		(0x3 &lt;&lt; 21)</div><div class='add'>+#define RCANFD_CCTR_BOM_ISO		(0x0 &lt;&lt; 21)</div><div class='add'>+#define RCANFD_CCTR_BOM_BENTRY		(0x1 &lt;&lt; 21)</div><div class='add'>+#define RCANFD_CCTR_BOM_BEND		(0x2 &lt;&lt; 21)</div><div class='add'>+#define RCANFD_CCTR_TDCVFIE		BIT(19)</div><div class='add'>+#define RCANFD_CCTR_SOCOIE		BIT(18)</div><div class='add'>+#define RCANFD_CCTR_EOCOIE		BIT(17)</div><div class='add'>+#define RCANFD_CCTR_TAIE		BIT(16)</div><div class='add'>+#define RCANFD_CCTR_ALIE		BIT(15)</div><div class='add'>+#define RCANFD_CCTR_BLIE		BIT(14)</div><div class='add'>+#define RCANFD_CCTR_OLIE		BIT(13)</div><div class='add'>+#define RCANFD_CCTR_BORIE		BIT(12)</div><div class='add'>+#define RCANFD_CCTR_BOEIE		BIT(11)</div><div class='add'>+#define RCANFD_CCTR_EPIE		BIT(10)</div><div class='add'>+#define RCANFD_CCTR_EWIE		BIT(9)</div><div class='add'>+#define RCANFD_CCTR_BEIE		BIT(8)</div><div class='add'>+#define RCANFD_CCTR_CSLPR		BIT(2)</div><div class='add'>+#define RCANFD_CCTR_CHMDC_MASK		(0x3)</div><div class='add'>+#define RCANFD_CCTR_CHDMC_COPM		(0x0)</div><div class='add'>+#define RCANFD_CCTR_CHDMC_CRESET	(0x1)</div><div class='add'>+#define RCANFD_CCTR_CHDMC_CHLT		(0x2)</div><div class='add'>+</div><div class='add'>+/* RSCFDnCFDCmSTS / RSCFDnCmSTS */</div><div class='add'>+#define RCANFD_CSTS_COMSTS		BIT(7)</div><div class='add'>+#define RCANFD_CSTS_RECSTS		BIT(6)</div><div class='add'>+#define RCANFD_CSTS_TRMSTS		BIT(5)</div><div class='add'>+#define RCANFD_CSTS_BOSTS		BIT(4)</div><div class='add'>+#define RCANFD_CSTS_EPSTS		BIT(3)</div><div class='add'>+#define RCANFD_CSTS_SLPSTS		BIT(2)</div><div class='add'>+#define RCANFD_CSTS_HLTSTS		BIT(1)</div><div class='add'>+#define RCANFD_CSTS_CRSTSTS		BIT(0)</div><div class='add'>+</div><div class='add'>+#define RCANFD_CSTS_TECCNT(x)		(((x) &gt;&gt; 24) &amp; 0xff)</div><div class='add'>+#define RCANFD_CSTS_RECCNT(x)		(((x) &gt;&gt; 16) &amp; 0xff)</div><div class='add'>+</div><div class='add'>+/* RSCFDnCFDCmERFL / RSCFDnCmERFL */</div><div class='add'>+#define RCANFD_CERFL_ADERR		BIT(14)</div><div class='add'>+#define RCANFD_CERFL_B0ERR		BIT(13)</div><div class='add'>+#define RCANFD_CERFL_B1ERR		BIT(12)</div><div class='add'>+#define RCANFD_CERFL_CERR		BIT(11)</div><div class='add'>+#define RCANFD_CERFL_AERR		BIT(10)</div><div class='add'>+#define RCANFD_CERFL_FERR		BIT(9)</div><div class='add'>+#define RCANFD_CERFL_SERR		BIT(8)</div><div class='add'>+#define RCANFD_CERFL_ALF		BIT(7)</div><div class='add'>+#define RCANFD_CERFL_BLF		BIT(6)</div><div class='add'>+#define RCANFD_CERFL_OVLF		BIT(5)</div><div class='add'>+#define RCANFD_CERFL_BORF		BIT(4)</div><div class='add'>+#define RCANFD_CERFL_BOEF		BIT(3)</div><div class='add'>+#define RCANFD_CERFL_EPF		BIT(2)</div><div class='add'>+#define RCANFD_CERFL_EWF		BIT(1)</div><div class='add'>+#define RCANFD_CERFL_BEF		BIT(0)</div><div class='add'>+</div><div class='add'>+#define RCANFD_CERFL_ERR(x)		((x) &amp; (0x7fff)) /* above bits 14:0 */</div><div class='add'>+</div><div class='add'>+/* RSCFDnCFDCmDCFG */</div><div class='add'>+#define RCANFD_DCFG_DBRP		GENMASK(7, 0)</div><div class='add'>+</div><div class='add'>+/* RSCFDnCFDCmFDCFG */</div><div class='add'>+#define RCANFD_GEN4_FDCFG_CLOE		BIT(30)</div><div class='add'>+#define RCANFD_GEN4_FDCFG_FDOE		BIT(28)</div><div class='add'>+#define RCANFD_FDCFG_TDCO		GENMASK(23, 16)</div><div class='add'>+#define RCANFD_FDCFG_TDCE		BIT(9)</div><div class='add'>+#define RCANFD_FDCFG_TDCOC		BIT(8)</div><div class='add'>+</div><div class='add'>+/* RSCFDnCFDCmFDSTS */</div><div class='add'>+#define RCANFD_FDSTS_SOC		GENMASK(31, 24)</div><div class='add'>+#define RCANFD_FDSTS_EOC		GENMASK(23, 16)</div><div class='add'>+#define RCANFD_GEN4_FDSTS_TDCVF		BIT(15)</div><div class='add'>+#define RCANFD_GEN4_FDSTS_PNSTS		GENMASK(13, 12)</div><div class='add'>+#define RCANFD_FDSTS_SOCO		BIT(9)</div><div class='add'>+#define RCANFD_FDSTS_EOCO		BIT(8)</div><div class='add'>+#define RCANFD_FDSTS_TDCVF		BIT(7)</div><div class='add'>+#define RCANFD_FDSTS_TDCR		GENMASK(7, 0)</div><div class='add'>+</div><div class='add'>+/* RSCFDnCFDRFCCx */</div><div class='add'>+#define RCANFD_RFCC_RFIM		BIT(12)</div><div class='add'>+#define RCANFD_RFCC_RFDC(x)		(((x) &amp; 0x7) &lt;&lt; 8)</div><div class='add'>+#define RCANFD_RFCC_RFPLS(x)		(((x) &amp; 0x7) &lt;&lt; 4)</div><div class='add'>+#define RCANFD_RFCC_RFIE		BIT(1)</div><div class='add'>+#define RCANFD_RFCC_RFE			BIT(0)</div><div class='add'>+</div><div class='add'>+/* RSCFDnCFDRFSTSx */</div><div class='add'>+#define RCANFD_RFSTS_RFIF		BIT(3)</div><div class='add'>+#define RCANFD_RFSTS_RFMLT		BIT(2)</div><div class='add'>+#define RCANFD_RFSTS_RFFLL		BIT(1)</div><div class='add'>+#define RCANFD_RFSTS_RFEMP		BIT(0)</div><div class='add'>+</div><div class='add'>+/* RSCFDnCFDRFIDx */</div><div class='add'>+#define RCANFD_RFID_RFIDE		BIT(31)</div><div class='add'>+#define RCANFD_RFID_RFRTR		BIT(30)</div><div class='add'>+</div><div class='add'>+/* RSCFDnCFDRFPTRx */</div><div class='add'>+#define RCANFD_RFPTR_RFDLC(x)		(((x) &gt;&gt; 28) &amp; 0xf)</div><div class='add'>+</div><div class='add'>+/* RSCFDnCFDRFFDSTSx */</div><div class='add'>+#define RCANFD_RFFDSTS_RFFDF		BIT(2)</div><div class='add'>+#define RCANFD_RFFDSTS_RFBRS		BIT(1)</div><div class='add'>+#define RCANFD_RFFDSTS_RFESI		BIT(0)</div><div class='add'>+</div><div class='add'>+/* Common FIFO bits */</div><div class='add'>+</div><div class='add'>+/* RSCFDnCFDCFCCk */</div><div class='add'>+#define RCANFD_CFCC_CFTML(gpriv, cftml) \</div><div class='add'>+({\</div><div class='add'>+	typeof(gpriv) (_gpriv) = (gpriv); \</div><div class='add'>+	(((cftml) &amp; (_gpriv)-&gt;info-&gt;max_cftml) &lt;&lt; (_gpriv)-&gt;info-&gt;sh-&gt;cftml); \</div><div class='add'>+})</div><div class='add'>+#define RCANFD_CFCC_CFM(gpriv, x)	(((x) &amp; 0x3) &lt;&lt; (gpriv)-&gt;info-&gt;sh-&gt;cfm)</div><div class='add'>+#define RCANFD_CFCC_CFIM		BIT(12)</div><div class='add'>+#define RCANFD_CFCC_CFDC(gpriv, x)	(((x) &amp; 0x7) &lt;&lt; (gpriv)-&gt;info-&gt;sh-&gt;cfdc)</div><div class='add'>+#define RCANFD_CFCC_CFPLS(x)		(((x) &amp; 0x7) &lt;&lt; 4)</div><div class='add'>+#define RCANFD_CFCC_CFTXIE		BIT(2)</div><div class='add'>+#define RCANFD_CFCC_CFE			BIT(0)</div><div class='add'>+</div><div class='add'>+/* RSCFDnCFDCFSTSk */</div><div class='add'>+#define RCANFD_CFSTS_CFMC(x)		(((x) &gt;&gt; 8) &amp; 0xff)</div><div class='add'>+#define RCANFD_CFSTS_CFTXIF		BIT(4)</div><div class='add'>+#define RCANFD_CFSTS_CFMLT		BIT(2)</div><div class='add'>+#define RCANFD_CFSTS_CFFLL		BIT(1)</div><div class='add'>+#define RCANFD_CFSTS_CFEMP		BIT(0)</div><div class='add'>+</div><div class='add'>+/* RSCFDnCFDCFIDk */</div><div class='add'>+#define RCANFD_CFID_CFIDE		BIT(31)</div><div class='add'>+#define RCANFD_CFID_CFRTR		BIT(30)</div><div class='add'>+</div><div class='add'>+/* RSCFDnCFDCFPTRk */</div><div class='add'>+#define RCANFD_CFPTR_CFDLC(x)		(((x) &amp; 0xf) &lt;&lt; 28)</div><div class='add'>+</div><div class='add'>+/* RSCFDnCFDCFFDCSTSk */</div><div class='add'>+#define RCANFD_CFFDCSTS_CFFDF		BIT(2)</div><div class='add'>+#define RCANFD_CFFDCSTS_CFBRS		BIT(1)</div><div class='add'>+#define RCANFD_CFFDCSTS_CFESI		BIT(0)</div><div class='add'>+</div><div class='add'>+/* This controller supports either Classical CAN only mode or CAN FD only mode.</div><div class='add'>+ * These modes are supported in two separate set of register maps &amp; names.</div><div class='add'>+ * However, some of the register offsets are common for both modes. Those</div><div class='add'>+ * offsets are listed below as Common registers.</div><div class='add'>+ *</div><div class='add'>+ * The CAN FD only mode specific registers &amp; Classical CAN only mode specific</div><div class='add'>+ * registers are listed separately. Their register names starts with</div><div class='add'>+ * RCANFD_F_xxx &amp; RCANFD_C_xxx respectively.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Common registers */</div><div class='add'>+</div><div class='add'>+/* RSCFDnCFDCmNCFG / RSCFDnCmCFG */</div><div class='add'>+#define RCANFD_CCFG(m)			(0x0000 + (0x10 * (m)))</div><div class='add'>+/* RSCFDnCFDCmCTR / RSCFDnCmCTR */</div><div class='add'>+#define RCANFD_CCTR(m)			(0x0004 + (0x10 * (m)))</div><div class='add'>+/* RSCFDnCFDCmSTS / RSCFDnCmSTS */</div><div class='add'>+#define RCANFD_CSTS(m)			(0x0008 + (0x10 * (m)))</div><div class='add'>+/* RSCFDnCFDCmERFL / RSCFDnCmERFL */</div><div class='add'>+#define RCANFD_CERFL(m)			(0x000C + (0x10 * (m)))</div><div class='add'>+</div><div class='add'>+/* RSCFDnCFDGCFG / RSCFDnGCFG */</div><div class='add'>+#define RCANFD_GCFG			(0x0084)</div><div class='add'>+/* RSCFDnCFDGCTR / RSCFDnGCTR */</div><div class='add'>+#define RCANFD_GCTR			(0x0088)</div><div class='add'>+/* RSCFDnCFDGCTS / RSCFDnGCTS */</div><div class='add'>+#define RCANFD_GSTS			(0x008c)</div><div class='add'>+/* RSCFDnCFDGERFL / RSCFDnGERFL */</div><div class='add'>+#define RCANFD_GERFL			(0x0090)</div><div class='add'>+/* RSCFDnCFDGTSC / RSCFDnGTSC */</div><div class='add'>+#define RCANFD_GTSC			(0x0094)</div><div class='add'>+/* RSCFDnCFDGAFLECTR / RSCFDnGAFLECTR */</div><div class='add'>+#define RCANFD_GAFLECTR			(0x0098)</div><div class='add'>+/* RSCFDnCFDGAFLCFG / RSCFDnGAFLCFG */</div><div class='add'>+#define RCANFD_GAFLCFG(w)		(0x009c + (0x04 * (w)))</div><div class='add'>+/* RSCFDnCFDRMNB / RSCFDnRMNB */</div><div class='add'>+#define RCANFD_RMNB			(0x00a4)</div><div class='add'>+/* RSCFDnCFDRMND / RSCFDnRMND */</div><div class='add'>+#define RCANFD_RMND(y)			(0x00a8 + (0x04 * (y)))</div><div class='add'>+</div><div class='add'>+/* RSCFDnCFDRFCCx / RSCFDnRFCCx */</div><div class='add'>+#define RCANFD_RFCC(gpriv, x)		((gpriv)-&gt;info-&gt;regs-&gt;rfcc + (0x04 * (x)))</div><div class='add'>+/* RSCFDnCFDRFSTSx / RSCFDnRFSTSx */</div><div class='add'>+#define RCANFD_RFSTS(gpriv, x)		(RCANFD_RFCC(gpriv, x) + 0x20)</div><div class='add'>+/* RSCFDnCFDRFPCTRx / RSCFDnRFPCTRx */</div><div class='add'>+#define RCANFD_RFPCTR(gpriv, x)		(RCANFD_RFCC(gpriv, x) + 0x40)</div><div class='add'>+</div><div class='add'>+/* Common FIFO Control registers */</div><div class='add'>+</div><div class='add'>+/* RSCFDnCFDCFCCx / RSCFDnCFCCx */</div><div class='add'>+#define RCANFD_CFCC(gpriv, ch, idx) \</div><div class='add'>+	((gpriv)-&gt;info-&gt;regs-&gt;cfcc + (0x0c * (ch)) + (0x04 * (idx)))</div><div class='add'>+/* RSCFDnCFDCFSTSx / RSCFDnCFSTSx */</div><div class='add'>+#define RCANFD_CFSTS(gpriv, ch, idx) \</div><div class='add'>+	((gpriv)-&gt;info-&gt;regs-&gt;cfsts + (0x0c * (ch)) + (0x04 * (idx)))</div><div class='add'>+/* RSCFDnCFDCFPCTRx / RSCFDnCFPCTRx */</div><div class='add'>+#define RCANFD_CFPCTR(gpriv, ch, idx) \</div><div class='add'>+	((gpriv)-&gt;info-&gt;regs-&gt;cfpctr + (0x0c * (ch)) + (0x04 * (idx)))</div><div class='add'>+</div><div class='add'>+/* RSCFDnCFDGRMCFG */</div><div class='add'>+#define RCANFD_GRMCFG			(0x04fc)</div><div class='add'>+</div><div class='add'>+/* RSCFDnCFDGAFLIDj / RSCFDnGAFLIDj */</div><div class='add'>+#define RCANFD_GAFLID(offset, j)	((offset) + (0x10 * (j)))</div><div class='add'>+/* RSCFDnCFDGAFLMj / RSCFDnGAFLMj */</div><div class='add'>+#define RCANFD_GAFLM(offset, j)		((offset) + 0x04 + (0x10 * (j)))</div><div class='add'>+/* RSCFDnCFDGAFLP0j / RSCFDnGAFLP0j */</div><div class='add'>+#define RCANFD_GAFLP0(offset, j)	((offset) + 0x08 + (0x10 * (j)))</div><div class='add'>+/* RSCFDnCFDGAFLP1j / RSCFDnGAFLP1j */</div><div class='add'>+#define RCANFD_GAFLP1(offset, j)	((offset) + 0x0c + (0x10 * (j)))</div><div class='add'>+</div><div class='add'>+/* Classical CAN only mode register map */</div><div class='add'>+</div><div class='add'>+/* RSCFDnGAFLXXXj offset */</div><div class='add'>+#define RCANFD_C_GAFL_OFFSET		(0x0500)</div><div class='add'>+</div><div class='add'>+/* RSCFDnRFXXx -&gt; RCANFD_C_RFXX(x) */</div><div class='add'>+#define RCANFD_C_RFOFFSET	(0x0e00)</div><div class='add'>+#define RCANFD_C_RFID(x)	(RCANFD_C_RFOFFSET + (0x10 * (x)))</div><div class='add'>+#define RCANFD_C_RFPTR(x)	(RCANFD_C_RFOFFSET + 0x04 + (0x10 * (x)))</div><div class='add'>+#define RCANFD_C_RFDF(x, df) \</div><div class='add'>+		(RCANFD_C_RFOFFSET + 0x08 + (0x10 * (x)) + (0x04 * (df)))</div><div class='add'>+</div><div class='add'>+/* RSCFDnCFXXk -&gt; RCANFD_C_CFXX(ch, k) */</div><div class='add'>+#define RCANFD_C_CFOFFSET		(0x0e80)</div><div class='add'>+</div><div class='add'>+#define RCANFD_C_CFID(ch, idx) \</div><div class='add'>+	(RCANFD_C_CFOFFSET + (0x30 * (ch)) + (0x10 * (idx)))</div><div class='add'>+</div><div class='add'>+#define RCANFD_C_CFPTR(ch, idx)	\</div><div class='add'>+	(RCANFD_C_CFOFFSET + 0x04 + (0x30 * (ch)) + (0x10 * (idx)))</div><div class='add'>+</div><div class='add'>+#define RCANFD_C_CFDF(ch, idx, df) \</div><div class='add'>+	(RCANFD_C_CFOFFSET + 0x08 + (0x30 * (ch)) + (0x10 * (idx)) + (0x04 * (df)))</div><div class='add'>+</div><div class='add'>+/* R-Car Gen4 Classical and CAN FD mode specific register map */</div><div class='add'>+#define RCANFD_GEN4_GAFL_OFFSET		(0x1800)</div><div class='add'>+</div><div class='add'>+/* CAN FD mode specific register map */</div><div class='add'>+</div><div class='add'>+/* RSCFDnCFDCmXXX -&gt; gpriv-&gt;fcbase[m].xxx */</div><div class='add'>+struct rcar_canfd_f_c {</div><div class='add'>+	u32 dcfg;</div><div class='add'>+	u32 cfdcfg;</div><div class='add'>+	u32 cfdctr;</div><div class='add'>+	u32 cfdsts;</div><div class='add'>+	u32 cfdcrc;</div><div class='add'>+	u32 pad[3];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* RSCFDnCFDGAFLXXXj offset */</div><div class='add'>+#define RCANFD_F_GAFL_OFFSET		(0x1000)</div><div class='add'>+</div><div class='add'>+/* RSCFDnCFDRFXXx -&gt; RCANFD_F_RFXX(x) */</div><div class='add'>+#define RCANFD_F_RFOFFSET(gpriv)	((gpriv)-&gt;info-&gt;regs-&gt;rfoffset)</div><div class='add'>+#define RCANFD_F_RFID(gpriv, x)		(RCANFD_F_RFOFFSET(gpriv) + (0x80 * (x)))</div><div class='add'>+#define RCANFD_F_RFPTR(gpriv, x)	(RCANFD_F_RFOFFSET(gpriv) + 0x04 + (0x80 * (x)))</div><div class='add'>+#define RCANFD_F_RFFDSTS(gpriv, x)	(RCANFD_F_RFOFFSET(gpriv) + 0x08 + (0x80 * (x)))</div><div class='add'>+#define RCANFD_F_RFDF(gpriv, x, df) \</div><div class='add'>+	(RCANFD_F_RFOFFSET(gpriv) + 0x0c + (0x80 * (x)) + (0x04 * (df)))</div><div class='add'>+</div><div class='add'>+/* RSCFDnCFDCFXXk -&gt; RCANFD_F_CFXX(ch, k) */</div><div class='add'>+#define RCANFD_F_CFOFFSET(gpriv)	((gpriv)-&gt;info-&gt;regs-&gt;cfoffset)</div><div class='add'>+</div><div class='add'>+#define RCANFD_F_CFID(gpriv, ch, idx) \</div><div class='add'>+	(RCANFD_F_CFOFFSET(gpriv) + (0x180 * (ch)) + (0x80 * (idx)))</div><div class='add'>+</div><div class='add'>+#define RCANFD_F_CFPTR(gpriv, ch, idx) \</div><div class='add'>+	(RCANFD_F_CFOFFSET(gpriv) + 0x04 + (0x180 * (ch)) + (0x80 * (idx)))</div><div class='add'>+</div><div class='add'>+#define RCANFD_F_CFFDCSTS(gpriv, ch, idx) \</div><div class='add'>+	(RCANFD_F_CFOFFSET(gpriv) + 0x08 + (0x180 * (ch)) + (0x80 * (idx)))</div><div class='add'>+</div><div class='add'>+#define RCANFD_F_CFDF(gpriv, ch, idx, df) \</div><div class='add'>+	(RCANFD_F_CFOFFSET(gpriv) + 0x0c + (0x180 * (ch)) + (0x80 * (idx)) + \</div><div class='add'>+	 (0x04 * (df)))</div><div class='add'>+</div><div class='add'>+/* Constants */</div><div class='add'>+#define RCANFD_FIFO_DEPTH		8	/* Tx FIFO depth */</div><div class='add'>+#define RCANFD_NAPI_WEIGHT		8	/* Rx poll quota */</div><div class='add'>+</div><div class='add'>+#define RCANFD_NUM_CHANNELS		8	/* Eight channels max */</div><div class='add'>+</div><div class='add'>+#define RCANFD_GAFL_PAGENUM(entry)	((entry) / 16)</div><div class='add'>+#define RCANFD_CHANNEL_NUMRULES		1	/* only one rule per channel */</div><div class='add'>+</div><div class='add'>+/* Rx FIFO is a global resource of the controller. There are 8 such FIFOs</div><div class='add'>+ * available. Each channel gets a dedicated Rx FIFO (i.e.) the channel</div><div class='add'>+ * number is added to RFFIFO index.</div><div class='add'>+ */</div><div class='add'>+#define RCANFD_RFFIFO_IDX		0</div><div class='add'>+</div><div class='add'>+/* Tx/Rx or Common FIFO is a per channel resource. Each channel has 3 Common</div><div class='add'>+ * FIFOs dedicated to them. Use the first (index 0) FIFO out of the 3 for Tx.</div><div class='add'>+ */</div><div class='add'>+#define RCANFD_CFFIFO_IDX		0</div><div class='add'>+</div><div class='add'>+struct rcar_canfd_global;</div><div class='add'>+</div><div class='add'>+struct rcar_canfd_regs {</div><div class='add'>+	u16 rfcc;	/* RX FIFO Configuration/Control Register */</div><div class='add'>+	u16 cfcc;	/* Common FIFO Configuration/Control Register */</div><div class='add'>+	u16 cfsts;	/* Common FIFO Status Register */</div><div class='add'>+	u16 cfpctr;	/* Common FIFO Pointer Control Register */</div><div class='add'>+	u16 coffset;	/* Channel Data Bitrate Configuration Register */</div><div class='add'>+	u16 rfoffset;	/* Receive FIFO buffer access ID register */</div><div class='add'>+	u16 cfoffset;	/* Transmit/receive FIFO buffer access ID register */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct rcar_canfd_shift_data {</div><div class='add'>+	u8 ntseg2;	/* Nominal Bit Rate Time Segment 2 Control */</div><div class='add'>+	u8 ntseg1;	/* Nominal Bit Rate Time Segment 1 Control */</div><div class='add'>+	u8 nsjw;	/* Nominal Bit Rate Resynchronization Jump Width Control */</div><div class='add'>+	u8 dtseg2;	/* Data Bit Rate Time Segment 2 Control */</div><div class='add'>+	u8 dtseg1;	/* Data Bit Rate Time Segment 1 Control */</div><div class='add'>+	u8 cftml;	/* Common FIFO TX Message Buffer Link */</div><div class='add'>+	u8 cfm;		/* Common FIFO Mode */</div><div class='add'>+	u8 cfdc;	/* Common FIFO Depth Configuration */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct rcar_canfd_hw_info {</div><div class='add'>+	const struct can_bittiming_const *nom_bittiming;</div><div class='add'>+	const struct can_bittiming_const *data_bittiming;</div><div class='add'>+	const struct can_tdc_const *tdc_const;</div><div class='add'>+	const struct rcar_canfd_regs *regs;</div><div class='add'>+	const struct rcar_canfd_shift_data *sh;</div><div class='add'>+	u8 rnc_field_width;</div><div class='add'>+	u8 max_aflpn;</div><div class='add'>+	u8 max_cftml;</div><div class='add'>+	u8 max_channels;</div><div class='add'>+	u8 postdiv;</div><div class='add'>+	/* hardware features */</div><div class='add'>+	unsigned shared_global_irqs:1;	/* Has shared global irqs */</div><div class='add'>+	unsigned multi_channel_irqs:1;	/* Has multiple channel irqs */</div><div class='add'>+	unsigned ch_interface_mode:1;	/* Has channel interface mode */</div><div class='add'>+	unsigned shared_can_regs:1;	/* Has shared classical can registers */</div><div class='add'>+	unsigned external_clk:1;	/* Has external clock */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Channel priv data */</div><div class='add'>+struct rcar_canfd_channel {</div><div class='add'>+	struct can_priv can;			/* Must be the first member */</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	struct rcar_canfd_global *gpriv;	/* Controller reference */</div><div class='add'>+	void __iomem *base;			/* Register base address */</div><div class='add'>+	struct phy *transceiver;		/* Optional transceiver */</div><div class='add'>+	struct napi_struct napi;</div><div class='add'>+	u32 tx_head;				/* Incremented on xmit */</div><div class='add'>+	u32 tx_tail;				/* Incremented on xmit done */</div><div class='add'>+	u32 channel;				/* Channel number */</div><div class='add'>+	spinlock_t tx_lock;			/* To protect tx path */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Global priv data */</div><div class='add'>+struct rcar_canfd_global {</div><div class='add'>+	struct rcar_canfd_channel *ch[RCANFD_NUM_CHANNELS];</div><div class='add'>+	void __iomem *base;		/* Register base address */</div><div class='add'>+	struct rcar_canfd_f_c __iomem *fcbase;</div><div class='add'>+	struct platform_device *pdev;	/* Respective platform device */</div><div class='add'>+	struct clk *clkp;		/* Peripheral clock */</div><div class='add'>+	struct clk *can_clk;		/* fCAN clock */</div><div class='add'>+	struct clk *clk_ram;		/* Clock RAM */</div><div class='add'>+	unsigned long channels_mask;	/* Enabled channels mask */</div><div class='add'>+	bool extclk;			/* CANFD or Ext clock */</div><div class='add'>+	bool fdmode;			/* CAN FD or Classical CAN only mode */</div><div class='add'>+	struct reset_control *rstc1;</div><div class='add'>+	struct reset_control *rstc2;</div><div class='add'>+	const struct rcar_canfd_hw_info *info;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* CAN FD mode nominal rate constants */</div><div class='add'>+static const struct can_bittiming_const rcar_canfd_gen3_nom_bittiming_const = {</div><div class='add'>+	.name = RCANFD_DRV_NAME,</div><div class='add'>+	.tseg1_min = 2,</div><div class='add'>+	.tseg1_max = 128,</div><div class='add'>+	.tseg2_min = 2,</div><div class='add'>+	.tseg2_max = 32,</div><div class='add'>+	.sjw_max = 32,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 1024,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const rcar_canfd_gen4_nom_bittiming_const = {</div><div class='add'>+	.name = RCANFD_DRV_NAME,</div><div class='add'>+	.tseg1_min = 2,</div><div class='add'>+	.tseg1_max = 256,</div><div class='add'>+	.tseg2_min = 2,</div><div class='add'>+	.tseg2_max = 128,</div><div class='add'>+	.sjw_max = 128,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 1024,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* CAN FD mode data rate constants */</div><div class='add'>+static const struct can_bittiming_const rcar_canfd_gen3_data_bittiming_const = {</div><div class='add'>+	.name = RCANFD_DRV_NAME,</div><div class='add'>+	.tseg1_min = 2,</div><div class='add'>+	.tseg1_max = 16,</div><div class='add'>+	.tseg2_min = 2,</div><div class='add'>+	.tseg2_max = 8,</div><div class='add'>+	.sjw_max = 8,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 256,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const rcar_canfd_gen4_data_bittiming_const = {</div><div class='add'>+	.name = RCANFD_DRV_NAME,</div><div class='add'>+	.tseg1_min = 2,</div><div class='add'>+	.tseg1_max = 32,</div><div class='add'>+	.tseg2_min = 2,</div><div class='add'>+	.tseg2_max = 16,</div><div class='add'>+	.sjw_max = 16,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 256,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Classical CAN mode bitrate constants */</div><div class='add'>+static const struct can_bittiming_const rcar_canfd_bittiming_const = {</div><div class='add'>+	.name = RCANFD_DRV_NAME,</div><div class='add'>+	.tseg1_min = 4,</div><div class='add'>+	.tseg1_max = 16,</div><div class='add'>+	.tseg2_min = 2,</div><div class='add'>+	.tseg2_max = 8,</div><div class='add'>+	.sjw_max = 4,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 1024,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* CAN FD Transmission Delay Compensation constants */</div><div class='add'>+static const struct can_tdc_const rcar_canfd_gen3_tdc_const = {</div><div class='add'>+	.tdcv_min = 1,</div><div class='add'>+	.tdcv_max = 128,</div><div class='add'>+	.tdco_min = 1,</div><div class='add'>+	.tdco_max = 128,</div><div class='add'>+	.tdcf_min = 0,	/* Filter window not supported */</div><div class='add'>+	.tdcf_max = 0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_tdc_const rcar_canfd_gen4_tdc_const = {</div><div class='add'>+	.tdcv_min = 1,</div><div class='add'>+	.tdcv_max = 256,</div><div class='add'>+	.tdco_min = 1,</div><div class='add'>+	.tdco_max = 256,</div><div class='add'>+	.tdcf_min = 0,	/* Filter window not supported */</div><div class='add'>+	.tdcf_max = 0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct rcar_canfd_regs rcar_gen3_regs = {</div><div class='add'>+	.rfcc = 0x00b8,</div><div class='add'>+	.cfcc = 0x0118,</div><div class='add'>+	.cfsts = 0x0178,</div><div class='add'>+	.cfpctr = 0x01d8,</div><div class='add'>+	.coffset = 0x0500,</div><div class='add'>+	.rfoffset = 0x3000,</div><div class='add'>+	.cfoffset = 0x3400,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct rcar_canfd_regs rcar_gen4_regs = {</div><div class='add'>+	.rfcc = 0x00c0,</div><div class='add'>+	.cfcc = 0x0120,</div><div class='add'>+	.cfsts = 0x01e0,</div><div class='add'>+	.cfpctr = 0x0240,</div><div class='add'>+	.coffset = 0x1400,</div><div class='add'>+	.rfoffset = 0x6000,</div><div class='add'>+	.cfoffset = 0x6400,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct rcar_canfd_shift_data rcar_gen3_shift_data = {</div><div class='add'>+	.ntseg2 = 24,</div><div class='add'>+	.ntseg1 = 16,</div><div class='add'>+	.nsjw = 11,</div><div class='add'>+	.dtseg2 = 20,</div><div class='add'>+	.dtseg1 = 16,</div><div class='add'>+	.cftml = 20,</div><div class='add'>+	.cfm = 16,</div><div class='add'>+	.cfdc = 8,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct rcar_canfd_shift_data rcar_gen4_shift_data = {</div><div class='add'>+	.ntseg2 = 25,</div><div class='add'>+	.ntseg1 = 17,</div><div class='add'>+	.nsjw = 10,</div><div class='add'>+	.dtseg2 = 16,</div><div class='add'>+	.dtseg1 = 8,</div><div class='add'>+	.cftml = 16,</div><div class='add'>+	.cfm = 8,</div><div class='add'>+	.cfdc = 21,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct rcar_canfd_hw_info rcar_gen3_hw_info = {</div><div class='add'>+	.nom_bittiming = &amp;rcar_canfd_gen3_nom_bittiming_const,</div><div class='add'>+	.data_bittiming = &amp;rcar_canfd_gen3_data_bittiming_const,</div><div class='add'>+	.tdc_const = &amp;rcar_canfd_gen3_tdc_const,</div><div class='add'>+	.regs = &amp;rcar_gen3_regs,</div><div class='add'>+	.sh = &amp;rcar_gen3_shift_data,</div><div class='add'>+	.rnc_field_width = 8,</div><div class='add'>+	.max_aflpn = 31,</div><div class='add'>+	.max_cftml = 15,</div><div class='add'>+	.max_channels = 2,</div><div class='add'>+	.postdiv = 2,</div><div class='add'>+	.shared_global_irqs = 1,</div><div class='add'>+	.ch_interface_mode = 0,</div><div class='add'>+	.shared_can_regs = 0,</div><div class='add'>+	.external_clk = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct rcar_canfd_hw_info rcar_gen4_hw_info = {</div><div class='add'>+	.nom_bittiming = &amp;rcar_canfd_gen4_nom_bittiming_const,</div><div class='add'>+	.data_bittiming = &amp;rcar_canfd_gen4_data_bittiming_const,</div><div class='add'>+	.tdc_const = &amp;rcar_canfd_gen4_tdc_const,</div><div class='add'>+	.regs = &amp;rcar_gen4_regs,</div><div class='add'>+	.sh = &amp;rcar_gen4_shift_data,</div><div class='add'>+	.rnc_field_width = 16,</div><div class='add'>+	.max_aflpn = 127,</div><div class='add'>+	.max_cftml = 31,</div><div class='add'>+	.max_channels = 8,</div><div class='add'>+	.postdiv = 2,</div><div class='add'>+	.shared_global_irqs = 1,</div><div class='add'>+	.ch_interface_mode = 1,</div><div class='add'>+	.shared_can_regs = 1,</div><div class='add'>+	.external_clk = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct rcar_canfd_hw_info rzg2l_hw_info = {</div><div class='add'>+	.nom_bittiming = &amp;rcar_canfd_gen3_nom_bittiming_const,</div><div class='add'>+	.data_bittiming = &amp;rcar_canfd_gen3_data_bittiming_const,</div><div class='add'>+	.tdc_const = &amp;rcar_canfd_gen3_tdc_const,</div><div class='add'>+	.regs = &amp;rcar_gen3_regs,</div><div class='add'>+	.sh = &amp;rcar_gen3_shift_data,</div><div class='add'>+	.rnc_field_width = 8,</div><div class='add'>+	.max_aflpn = 31,</div><div class='add'>+	.max_cftml = 15,</div><div class='add'>+	.max_channels = 2,</div><div class='add'>+	.postdiv = 1,</div><div class='add'>+	.multi_channel_irqs = 1,</div><div class='add'>+	.ch_interface_mode = 0,</div><div class='add'>+	.shared_can_regs = 0,</div><div class='add'>+	.external_clk = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct rcar_canfd_hw_info r9a09g047_hw_info = {</div><div class='add'>+	.nom_bittiming = &amp;rcar_canfd_gen4_nom_bittiming_const,</div><div class='add'>+	.data_bittiming = &amp;rcar_canfd_gen4_data_bittiming_const,</div><div class='add'>+	.tdc_const = &amp;rcar_canfd_gen4_tdc_const,</div><div class='add'>+	.regs = &amp;rcar_gen4_regs,</div><div class='add'>+	.sh = &amp;rcar_gen4_shift_data,</div><div class='add'>+	.rnc_field_width = 16,</div><div class='add'>+	.max_aflpn = 63,</div><div class='add'>+	.max_cftml = 31,</div><div class='add'>+	.max_channels = 6,</div><div class='add'>+	.postdiv = 1,</div><div class='add'>+	.multi_channel_irqs = 1,</div><div class='add'>+	.ch_interface_mode = 1,</div><div class='add'>+	.shared_can_regs = 1,</div><div class='add'>+	.external_clk = 0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Helper functions */</div><div class='add'>+static inline void rcar_canfd_update(u32 mask, u32 val, u32 __iomem *reg)</div><div class='add'>+{</div><div class='add'>+	u32 data = readl(reg);</div><div class='add'>+</div><div class='add'>+	data &amp;= ~mask;</div><div class='add'>+	data |= (val &amp; mask);</div><div class='add'>+	writel(data, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 rcar_canfd_read(void __iomem *base, u32 offset)</div><div class='add'>+{</div><div class='add'>+	return readl(base + offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void rcar_canfd_write(void __iomem *base, u32 offset, u32 val)</div><div class='add'>+{</div><div class='add'>+	writel(val, base + offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_canfd_set_bit(void __iomem *base, u32 reg, u32 val)</div><div class='add'>+{</div><div class='add'>+	rcar_canfd_update(val, val, base + reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_canfd_clear_bit(void __iomem *base, u32 reg, u32 val)</div><div class='add'>+{</div><div class='add'>+	rcar_canfd_update(val, 0, base + reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_canfd_update_bit(void __iomem *base, u32 reg,</div><div class='add'>+				  u32 mask, u32 val)</div><div class='add'>+{</div><div class='add'>+	rcar_canfd_update(mask, val, base + reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_canfd_set_bit_reg(void __iomem *addr, u32 val)</div><div class='add'>+{</div><div class='add'>+	rcar_canfd_update(val, val, addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_canfd_clear_bit_reg(void __iomem *addr, u32 val)</div><div class='add'>+{</div><div class='add'>+	rcar_canfd_update(val, 0, addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_canfd_update_bit_reg(void __iomem *addr, u32 mask, u32 val)</div><div class='add'>+{</div><div class='add'>+	rcar_canfd_update(mask, val, addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_canfd_get_data(struct rcar_canfd_channel *priv,</div><div class='add'>+				struct canfd_frame *cf, u32 off)</div><div class='add'>+{</div><div class='add'>+	u32 *data = (u32 *)cf-&gt;data;</div><div class='add'>+	u32 i, lwords;</div><div class='add'>+</div><div class='add'>+	lwords = DIV_ROUND_UP(cf-&gt;len, sizeof(u32));</div><div class='add'>+	for (i = 0; i &lt; lwords; i++)</div><div class='add'>+		data[i] = rcar_canfd_read(priv-&gt;base, off + i * sizeof(u32));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_canfd_put_data(struct rcar_canfd_channel *priv,</div><div class='add'>+				struct canfd_frame *cf, u32 off)</div><div class='add'>+{</div><div class='add'>+	const u32 *data = (u32 *)cf-&gt;data;</div><div class='add'>+	u32 i, lwords;</div><div class='add'>+</div><div class='add'>+	lwords = DIV_ROUND_UP(cf-&gt;len, sizeof(u32));</div><div class='add'>+	for (i = 0; i &lt; lwords; i++)</div><div class='add'>+		rcar_canfd_write(priv-&gt;base, off + i * sizeof(u32), data[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_canfd_tx_failure_cleanup(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; RCANFD_FIFO_DEPTH; i++)</div><div class='add'>+		can_free_echo_skb(ndev, i, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_canfd_set_rnc(struct rcar_canfd_global *gpriv, unsigned int ch,</div><div class='add'>+			       unsigned int num_rules)</div><div class='add'>+{</div><div class='add'>+	unsigned int rnc_stride = 32 / gpriv-&gt;info-&gt;rnc_field_width;</div><div class='add'>+	unsigned int shift = 32 - (ch % rnc_stride + 1) * gpriv-&gt;info-&gt;rnc_field_width;</div><div class='add'>+	unsigned int w = ch / rnc_stride;</div><div class='add'>+	u32 rnc = num_rules &lt;&lt; shift;</div><div class='add'>+</div><div class='add'>+	rcar_canfd_set_bit(gpriv-&gt;base, RCANFD_GAFLCFG(w), rnc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rcar_canfd_reset_controller(struct rcar_canfd_global *gpriv)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;gpriv-&gt;pdev-&gt;dev;</div><div class='add'>+	u32 sts, ch;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Check RAMINIT flag as CAN RAM initialization takes place</div><div class='add'>+	 * after the MCU reset</div><div class='add'>+	 */</div><div class='add'>+	err = readl_poll_timeout((gpriv-&gt;base + RCANFD_GSTS), sts,</div><div class='add'>+				 !(sts &amp; RCANFD_GSTS_GRAMINIT), 2, 500000);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_dbg(dev, "global raminit failed\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Transition to Global Reset mode */</div><div class='add'>+	rcar_canfd_clear_bit(gpriv-&gt;base, RCANFD_GCTR, RCANFD_GCTR_GSLPR);</div><div class='add'>+	rcar_canfd_update_bit(gpriv-&gt;base, RCANFD_GCTR,</div><div class='add'>+			      RCANFD_GCTR_GMDC_MASK, RCANFD_GCTR_GMDC_GRESET);</div><div class='add'>+</div><div class='add'>+	/* Ensure Global reset mode */</div><div class='add'>+	err = readl_poll_timeout((gpriv-&gt;base + RCANFD_GSTS), sts,</div><div class='add'>+				 (sts &amp; RCANFD_GSTS_GRSTSTS), 2, 500000);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_dbg(dev, "global reset failed\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Reset Global error flags */</div><div class='add'>+	rcar_canfd_write(gpriv-&gt;base, RCANFD_GERFL, 0x0);</div><div class='add'>+</div><div class='add'>+	/* Set the controller into appropriate mode */</div><div class='add'>+	if (!gpriv-&gt;info-&gt;ch_interface_mode) {</div><div class='add'>+		if (gpriv-&gt;fdmode)</div><div class='add'>+			rcar_canfd_set_bit(gpriv-&gt;base, RCANFD_GRMCFG,</div><div class='add'>+					   RCANFD_GRMCFG_RCMC);</div><div class='add'>+		else</div><div class='add'>+			rcar_canfd_clear_bit(gpriv-&gt;base, RCANFD_GRMCFG,</div><div class='add'>+					     RCANFD_GRMCFG_RCMC);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Transition all Channels to reset mode */</div><div class='add'>+	for_each_set_bit(ch, &amp;gpriv-&gt;channels_mask, gpriv-&gt;info-&gt;max_channels) {</div><div class='add'>+		rcar_canfd_clear_bit(gpriv-&gt;base,</div><div class='add'>+				     RCANFD_CCTR(ch), RCANFD_CCTR_CSLPR);</div><div class='add'>+</div><div class='add'>+		rcar_canfd_update_bit(gpriv-&gt;base, RCANFD_CCTR(ch),</div><div class='add'>+				      RCANFD_CCTR_CHMDC_MASK,</div><div class='add'>+				      RCANFD_CCTR_CHDMC_CRESET);</div><div class='add'>+</div><div class='add'>+		/* Ensure Channel reset mode */</div><div class='add'>+		err = readl_poll_timeout((gpriv-&gt;base + RCANFD_CSTS(ch)), sts,</div><div class='add'>+					 (sts &amp; RCANFD_CSTS_CRSTSTS),</div><div class='add'>+					 2, 500000);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_dbg(dev, "channel %u reset failed\n", ch);</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Set the controller into appropriate mode */</div><div class='add'>+		if (gpriv-&gt;info-&gt;ch_interface_mode) {</div><div class='add'>+			/* Do not set CLOE and FDOE simultaneously */</div><div class='add'>+			if (!gpriv-&gt;fdmode) {</div><div class='add'>+				rcar_canfd_clear_bit_reg(&amp;gpriv-&gt;fcbase[ch].cfdcfg,</div><div class='add'>+							 RCANFD_GEN4_FDCFG_FDOE);</div><div class='add'>+				rcar_canfd_set_bit_reg(&amp;gpriv-&gt;fcbase[ch].cfdcfg,</div><div class='add'>+						       RCANFD_GEN4_FDCFG_CLOE);</div><div class='add'>+			} else {</div><div class='add'>+				rcar_canfd_clear_bit_reg(&amp;gpriv-&gt;fcbase[ch].cfdcfg,</div><div class='add'>+							 RCANFD_GEN4_FDCFG_FDOE);</div><div class='add'>+				rcar_canfd_clear_bit_reg(&amp;gpriv-&gt;fcbase[ch].cfdcfg,</div><div class='add'>+							 RCANFD_GEN4_FDCFG_CLOE);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_canfd_configure_controller(struct rcar_canfd_global *gpriv)</div><div class='add'>+{</div><div class='add'>+	u32 cfg, ch;</div><div class='add'>+</div><div class='add'>+	/* Global configuration settings */</div><div class='add'>+</div><div class='add'>+	/* ECC Error flag Enable */</div><div class='add'>+	cfg = RCANFD_GCFG_EEFE;</div><div class='add'>+</div><div class='add'>+	if (gpriv-&gt;fdmode)</div><div class='add'>+		/* Truncate payload to configured message size RFPLS */</div><div class='add'>+		cfg |= RCANFD_GCFG_CMPOC;</div><div class='add'>+</div><div class='add'>+	/* Set External Clock if selected */</div><div class='add'>+	if (gpriv-&gt;extclk)</div><div class='add'>+		cfg |= RCANFD_GCFG_DCS;</div><div class='add'>+</div><div class='add'>+	rcar_canfd_set_bit(gpriv-&gt;base, RCANFD_GCFG, cfg);</div><div class='add'>+</div><div class='add'>+	/* Channel configuration settings */</div><div class='add'>+	for_each_set_bit(ch, &amp;gpriv-&gt;channels_mask, gpriv-&gt;info-&gt;max_channels) {</div><div class='add'>+		rcar_canfd_set_bit(gpriv-&gt;base, RCANFD_CCTR(ch),</div><div class='add'>+				   RCANFD_CCTR_ERRD);</div><div class='add'>+		rcar_canfd_update_bit(gpriv-&gt;base, RCANFD_CCTR(ch),</div><div class='add'>+				      RCANFD_CCTR_BOM_MASK,</div><div class='add'>+				      RCANFD_CCTR_BOM_BENTRY);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_canfd_configure_afl_rules(struct rcar_canfd_global *gpriv,</div><div class='add'>+					   u32 ch, u32 rule_entry)</div><div class='add'>+{</div><div class='add'>+	unsigned int offset, page, num_rules = RCANFD_CHANNEL_NUMRULES;</div><div class='add'>+	u32 rule_entry_index = rule_entry % 16;</div><div class='add'>+	u32 ridx = ch + RCANFD_RFFIFO_IDX;</div><div class='add'>+</div><div class='add'>+	/* Enable write access to entry */</div><div class='add'>+	page = RCANFD_GAFL_PAGENUM(rule_entry);</div><div class='add'>+	rcar_canfd_set_bit(gpriv-&gt;base, RCANFD_GAFLECTR,</div><div class='add'>+			   (RCANFD_GAFLECTR_AFLPN(gpriv, page) |</div><div class='add'>+			    RCANFD_GAFLECTR_AFLDAE));</div><div class='add'>+</div><div class='add'>+	/* Write number of rules for channel */</div><div class='add'>+	rcar_canfd_set_rnc(gpriv, ch, num_rules);</div><div class='add'>+	if (gpriv-&gt;info-&gt;shared_can_regs)</div><div class='add'>+		offset = RCANFD_GEN4_GAFL_OFFSET;</div><div class='add'>+	else if (gpriv-&gt;fdmode)</div><div class='add'>+		offset = RCANFD_F_GAFL_OFFSET;</div><div class='add'>+	else</div><div class='add'>+		offset = RCANFD_C_GAFL_OFFSET;</div><div class='add'>+</div><div class='add'>+	/* Accept all IDs */</div><div class='add'>+	rcar_canfd_write(gpriv-&gt;base, RCANFD_GAFLID(offset, rule_entry_index), 0);</div><div class='add'>+	/* IDE or RTR is not considered for matching */</div><div class='add'>+	rcar_canfd_write(gpriv-&gt;base, RCANFD_GAFLM(offset, rule_entry_index), 0);</div><div class='add'>+	/* Any data length accepted */</div><div class='add'>+	rcar_canfd_write(gpriv-&gt;base, RCANFD_GAFLP0(offset, rule_entry_index), 0);</div><div class='add'>+	/* Place the msg in corresponding Rx FIFO entry */</div><div class='add'>+	rcar_canfd_set_bit(gpriv-&gt;base, RCANFD_GAFLP1(offset, rule_entry_index),</div><div class='add'>+			   RCANFD_GAFLP1_GAFLFDP(ridx));</div><div class='add'>+</div><div class='add'>+	/* Disable write access to page */</div><div class='add'>+	rcar_canfd_clear_bit(gpriv-&gt;base,</div><div class='add'>+			     RCANFD_GAFLECTR, RCANFD_GAFLECTR_AFLDAE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_canfd_configure_rx(struct rcar_canfd_global *gpriv, u32 ch)</div><div class='add'>+{</div><div class='add'>+	/* Rx FIFO is used for reception */</div><div class='add'>+	u32 cfg;</div><div class='add'>+	u16 rfdc, rfpls;</div><div class='add'>+</div><div class='add'>+	/* Select Rx FIFO based on channel */</div><div class='add'>+	u32 ridx = ch + RCANFD_RFFIFO_IDX;</div><div class='add'>+</div><div class='add'>+	rfdc = 2;		/* b010 - 8 messages Rx FIFO depth */</div><div class='add'>+	if (gpriv-&gt;fdmode)</div><div class='add'>+		rfpls = 7;	/* b111 - Max 64 bytes payload */</div><div class='add'>+	else</div><div class='add'>+		rfpls = 0;	/* b000 - Max 8 bytes payload */</div><div class='add'>+</div><div class='add'>+	cfg = (RCANFD_RFCC_RFIM | RCANFD_RFCC_RFDC(rfdc) |</div><div class='add'>+		RCANFD_RFCC_RFPLS(rfpls) | RCANFD_RFCC_RFIE);</div><div class='add'>+	rcar_canfd_write(gpriv-&gt;base, RCANFD_RFCC(gpriv, ridx), cfg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_canfd_configure_tx(struct rcar_canfd_global *gpriv, u32 ch)</div><div class='add'>+{</div><div class='add'>+	/* Tx/Rx(Common) FIFO configured in Tx mode is</div><div class='add'>+	 * used for transmission</div><div class='add'>+	 *</div><div class='add'>+	 * Each channel has 3 Common FIFO dedicated to them.</div><div class='add'>+	 * Use the 1st (index 0) out of 3</div><div class='add'>+	 */</div><div class='add'>+	u32 cfg;</div><div class='add'>+	u16 cftml, cfm, cfdc, cfpls;</div><div class='add'>+</div><div class='add'>+	cftml = 0;		/* 0th buffer */</div><div class='add'>+	cfm = 1;		/* b01 - Transmit mode */</div><div class='add'>+	cfdc = 2;		/* b010 - 8 messages Tx FIFO depth */</div><div class='add'>+	if (gpriv-&gt;fdmode)</div><div class='add'>+		cfpls = 7;	/* b111 - Max 64 bytes payload */</div><div class='add'>+	else</div><div class='add'>+		cfpls = 0;	/* b000 - Max 8 bytes payload */</div><div class='add'>+</div><div class='add'>+	cfg = (RCANFD_CFCC_CFTML(gpriv, cftml) | RCANFD_CFCC_CFM(gpriv, cfm) |</div><div class='add'>+		RCANFD_CFCC_CFIM | RCANFD_CFCC_CFDC(gpriv, cfdc) |</div><div class='add'>+		RCANFD_CFCC_CFPLS(cfpls) | RCANFD_CFCC_CFTXIE);</div><div class='add'>+	rcar_canfd_write(gpriv-&gt;base, RCANFD_CFCC(gpriv, ch, RCANFD_CFFIFO_IDX), cfg);</div><div class='add'>+</div><div class='add'>+	if (gpriv-&gt;fdmode)</div><div class='add'>+		/* Clear FD mode specific control/status register */</div><div class='add'>+		rcar_canfd_write(gpriv-&gt;base,</div><div class='add'>+				 RCANFD_F_CFFDCSTS(gpriv, ch, RCANFD_CFFIFO_IDX), 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_canfd_enable_global_interrupts(struct rcar_canfd_global *gpriv)</div><div class='add'>+{</div><div class='add'>+	u32 ctr;</div><div class='add'>+</div><div class='add'>+	/* Clear any stray error interrupt flags */</div><div class='add'>+	rcar_canfd_write(gpriv-&gt;base, RCANFD_GERFL, 0);</div><div class='add'>+</div><div class='add'>+	/* Global interrupts setup */</div><div class='add'>+	ctr = RCANFD_GCTR_MEIE;</div><div class='add'>+	if (gpriv-&gt;fdmode)</div><div class='add'>+		ctr |= RCANFD_GCTR_CFMPOFIE;</div><div class='add'>+</div><div class='add'>+	rcar_canfd_set_bit(gpriv-&gt;base, RCANFD_GCTR, ctr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_canfd_disable_global_interrupts(struct rcar_canfd_global</div><div class='add'>+						 *gpriv)</div><div class='add'>+{</div><div class='add'>+	/* Disable all interrupts */</div><div class='add'>+	rcar_canfd_write(gpriv-&gt;base, RCANFD_GCTR, 0);</div><div class='add'>+</div><div class='add'>+	/* Clear any stray error interrupt flags */</div><div class='add'>+	rcar_canfd_write(gpriv-&gt;base, RCANFD_GERFL, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_canfd_enable_channel_interrupts(struct rcar_canfd_channel</div><div class='add'>+						 *priv)</div><div class='add'>+{</div><div class='add'>+	u32 ctr, ch = priv-&gt;channel;</div><div class='add'>+</div><div class='add'>+	/* Clear any stray error flags */</div><div class='add'>+	rcar_canfd_write(priv-&gt;base, RCANFD_CERFL(ch), 0);</div><div class='add'>+</div><div class='add'>+	/* Channel interrupts setup */</div><div class='add'>+	ctr = (RCANFD_CCTR_TAIE |</div><div class='add'>+	       RCANFD_CCTR_ALIE | RCANFD_CCTR_BLIE |</div><div class='add'>+	       RCANFD_CCTR_OLIE | RCANFD_CCTR_BORIE |</div><div class='add'>+	       RCANFD_CCTR_BOEIE | RCANFD_CCTR_EPIE |</div><div class='add'>+	       RCANFD_CCTR_EWIE | RCANFD_CCTR_BEIE);</div><div class='add'>+	rcar_canfd_set_bit(priv-&gt;base, RCANFD_CCTR(ch), ctr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_canfd_disable_channel_interrupts(struct rcar_canfd_channel</div><div class='add'>+						  *priv)</div><div class='add'>+{</div><div class='add'>+	u32 ctr, ch = priv-&gt;channel;</div><div class='add'>+</div><div class='add'>+	ctr = (RCANFD_CCTR_TAIE |</div><div class='add'>+	       RCANFD_CCTR_ALIE | RCANFD_CCTR_BLIE |</div><div class='add'>+	       RCANFD_CCTR_OLIE | RCANFD_CCTR_BORIE |</div><div class='add'>+	       RCANFD_CCTR_BOEIE | RCANFD_CCTR_EPIE |</div><div class='add'>+	       RCANFD_CCTR_EWIE | RCANFD_CCTR_BEIE);</div><div class='add'>+	rcar_canfd_clear_bit(priv-&gt;base, RCANFD_CCTR(ch), ctr);</div><div class='add'>+</div><div class='add'>+	/* Clear any stray error flags */</div><div class='add'>+	rcar_canfd_write(priv-&gt;base, RCANFD_CERFL(ch), 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_canfd_global_error(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct rcar_canfd_channel *priv = netdev_priv(ndev);</div><div class='add'>+	struct rcar_canfd_global *gpriv = priv-&gt;gpriv;</div><div class='add'>+	struct net_device_stats *stats = &amp;ndev-&gt;stats;</div><div class='add'>+	u32 ch = priv-&gt;channel;</div><div class='add'>+	u32 gerfl, sts;</div><div class='add'>+	u32 ridx = ch + RCANFD_RFFIFO_IDX;</div><div class='add'>+</div><div class='add'>+	gerfl = rcar_canfd_read(priv-&gt;base, RCANFD_GERFL);</div><div class='add'>+	if (gerfl &amp; FIELD_PREP(RCANFD_GERFL_EEF, BIT(ch))) {</div><div class='add'>+		netdev_dbg(ndev, "Ch%u: ECC Error flag\n", ch);</div><div class='add'>+		stats-&gt;tx_dropped++;</div><div class='add'>+	}</div><div class='add'>+	if (gerfl &amp; RCANFD_GERFL_MES) {</div><div class='add'>+		sts = rcar_canfd_read(priv-&gt;base,</div><div class='add'>+				      RCANFD_CFSTS(gpriv, ch, RCANFD_CFFIFO_IDX));</div><div class='add'>+		if (sts &amp; RCANFD_CFSTS_CFMLT) {</div><div class='add'>+			netdev_dbg(ndev, "Tx Message Lost flag\n");</div><div class='add'>+			stats-&gt;tx_dropped++;</div><div class='add'>+			rcar_canfd_write(priv-&gt;base,</div><div class='add'>+					 RCANFD_CFSTS(gpriv, ch, RCANFD_CFFIFO_IDX),</div><div class='add'>+					 sts &amp; ~RCANFD_CFSTS_CFMLT);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		sts = rcar_canfd_read(priv-&gt;base, RCANFD_RFSTS(gpriv, ridx));</div><div class='add'>+		if (sts &amp; RCANFD_RFSTS_RFMLT) {</div><div class='add'>+			netdev_dbg(ndev, "Rx Message Lost flag\n");</div><div class='add'>+			stats-&gt;rx_dropped++;</div><div class='add'>+			rcar_canfd_write(priv-&gt;base, RCANFD_RFSTS(gpriv, ridx),</div><div class='add'>+					 sts &amp; ~RCANFD_RFSTS_RFMLT);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	if (gpriv-&gt;fdmode &amp;&amp; gerfl &amp; RCANFD_GERFL_CMPOF) {</div><div class='add'>+		/* Message Lost flag will be set for respective channel</div><div class='add'>+		 * when this condition happens with counters and flags</div><div class='add'>+		 * already updated.</div><div class='add'>+		 */</div><div class='add'>+		netdev_dbg(ndev, "global payload overflow interrupt\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Clear all global error interrupts. Only affected channels bits</div><div class='add'>+	 * get cleared</div><div class='add'>+	 */</div><div class='add'>+	rcar_canfd_write(priv-&gt;base, RCANFD_GERFL, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_canfd_error(struct net_device *ndev, u32 cerfl,</div><div class='add'>+			     u16 txerr, u16 rxerr)</div><div class='add'>+{</div><div class='add'>+	struct rcar_canfd_channel *priv = netdev_priv(ndev);</div><div class='add'>+	struct net_device_stats *stats = &amp;ndev-&gt;stats;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	u32 ch = priv-&gt;channel;</div><div class='add'>+</div><div class='add'>+	netdev_dbg(ndev, "ch erfl %x txerr %u rxerr %u\n", cerfl, txerr, rxerr);</div><div class='add'>+</div><div class='add'>+	/* Propagate the error condition to the CAN stack */</div><div class='add'>+	skb = alloc_can_err_skb(ndev, &amp;cf);</div><div class='add'>+	if (!skb) {</div><div class='add'>+		stats-&gt;rx_dropped++;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Channel error interrupts */</div><div class='add'>+	if (cerfl &amp; RCANFD_CERFL_BEF) {</div><div class='add'>+		netdev_dbg(ndev, "Bus error\n");</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_BUSERROR | CAN_ERR_PROT;</div><div class='add'>+		cf-&gt;data[2] = CAN_ERR_PROT_UNSPEC;</div><div class='add'>+		priv-&gt;can.can_stats.bus_error++;</div><div class='add'>+	}</div><div class='add'>+	if (cerfl &amp; RCANFD_CERFL_ADERR) {</div><div class='add'>+		netdev_dbg(ndev, "ACK Delimiter Error\n");</div><div class='add'>+		stats-&gt;tx_errors++;</div><div class='add'>+		cf-&gt;data[3] |= CAN_ERR_PROT_LOC_ACK_DEL;</div><div class='add'>+	}</div><div class='add'>+	if (cerfl &amp; RCANFD_CERFL_B0ERR) {</div><div class='add'>+		netdev_dbg(ndev, "Bit Error (dominant)\n");</div><div class='add'>+		stats-&gt;tx_errors++;</div><div class='add'>+		cf-&gt;data[2] |= CAN_ERR_PROT_BIT0;</div><div class='add'>+	}</div><div class='add'>+	if (cerfl &amp; RCANFD_CERFL_B1ERR) {</div><div class='add'>+		netdev_dbg(ndev, "Bit Error (recessive)\n");</div><div class='add'>+		stats-&gt;tx_errors++;</div><div class='add'>+		cf-&gt;data[2] |= CAN_ERR_PROT_BIT1;</div><div class='add'>+	}</div><div class='add'>+	if (cerfl &amp; RCANFD_CERFL_CERR) {</div><div class='add'>+		netdev_dbg(ndev, "CRC Error\n");</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+		cf-&gt;data[3] |= CAN_ERR_PROT_LOC_CRC_SEQ;</div><div class='add'>+	}</div><div class='add'>+	if (cerfl &amp; RCANFD_CERFL_AERR) {</div><div class='add'>+		netdev_dbg(ndev, "ACK Error\n");</div><div class='add'>+		stats-&gt;tx_errors++;</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_ACK;</div><div class='add'>+		cf-&gt;data[3] |= CAN_ERR_PROT_LOC_ACK;</div><div class='add'>+	}</div><div class='add'>+	if (cerfl &amp; RCANFD_CERFL_FERR) {</div><div class='add'>+		netdev_dbg(ndev, "Form Error\n");</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+		cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='add'>+	}</div><div class='add'>+	if (cerfl &amp; RCANFD_CERFL_SERR) {</div><div class='add'>+		netdev_dbg(ndev, "Stuff Error\n");</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+		cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='add'>+	}</div><div class='add'>+	if (cerfl &amp; RCANFD_CERFL_ALF) {</div><div class='add'>+		netdev_dbg(ndev, "Arbitration lost Error\n");</div><div class='add'>+		priv-&gt;can.can_stats.arbitration_lost++;</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_LOSTARB;</div><div class='add'>+		cf-&gt;data[0] |= CAN_ERR_LOSTARB_UNSPEC;</div><div class='add'>+	}</div><div class='add'>+	if (cerfl &amp; RCANFD_CERFL_BLF) {</div><div class='add'>+		netdev_dbg(ndev, "Bus Lock Error\n");</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_BUSERROR;</div><div class='add'>+	}</div><div class='add'>+	if (cerfl &amp; RCANFD_CERFL_EWF) {</div><div class='add'>+		netdev_dbg(ndev, "Error warning interrupt\n");</div><div class='add'>+		priv-&gt;can.state = CAN_STATE_ERROR_WARNING;</div><div class='add'>+		priv-&gt;can.can_stats.error_warning++;</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_CRTL | CAN_ERR_CNT;</div><div class='add'>+		cf-&gt;data[1] = txerr &gt; rxerr ? CAN_ERR_CRTL_TX_WARNING :</div><div class='add'>+			CAN_ERR_CRTL_RX_WARNING;</div><div class='add'>+		cf-&gt;data[6] = txerr;</div><div class='add'>+		cf-&gt;data[7] = rxerr;</div><div class='add'>+	}</div><div class='add'>+	if (cerfl &amp; RCANFD_CERFL_EPF) {</div><div class='add'>+		netdev_dbg(ndev, "Error passive interrupt\n");</div><div class='add'>+		priv-&gt;can.state = CAN_STATE_ERROR_PASSIVE;</div><div class='add'>+		priv-&gt;can.can_stats.error_passive++;</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_CRTL | CAN_ERR_CNT;</div><div class='add'>+		cf-&gt;data[1] = txerr &gt; rxerr ? CAN_ERR_CRTL_TX_PASSIVE :</div><div class='add'>+			CAN_ERR_CRTL_RX_PASSIVE;</div><div class='add'>+		cf-&gt;data[6] = txerr;</div><div class='add'>+		cf-&gt;data[7] = rxerr;</div><div class='add'>+	}</div><div class='add'>+	if (cerfl &amp; RCANFD_CERFL_BOEF) {</div><div class='add'>+		netdev_dbg(ndev, "Bus-off entry interrupt\n");</div><div class='add'>+		rcar_canfd_tx_failure_cleanup(ndev);</div><div class='add'>+		priv-&gt;can.state = CAN_STATE_BUS_OFF;</div><div class='add'>+		priv-&gt;can.can_stats.bus_off++;</div><div class='add'>+		can_bus_off(ndev);</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_BUSOFF;</div><div class='add'>+	}</div><div class='add'>+	if (cerfl &amp; RCANFD_CERFL_OVLF) {</div><div class='add'>+		netdev_dbg(ndev,</div><div class='add'>+			   "Overload Frame Transmission error interrupt\n");</div><div class='add'>+		stats-&gt;tx_errors++;</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_PROT;</div><div class='add'>+		cf-&gt;data[2] |= CAN_ERR_PROT_OVERLOAD;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Clear channel error interrupts that are handled */</div><div class='add'>+	rcar_canfd_write(priv-&gt;base, RCANFD_CERFL(ch),</div><div class='add'>+			 RCANFD_CERFL_ERR(~cerfl));</div><div class='add'>+	netif_rx(skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_canfd_tx_done(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct rcar_canfd_channel *priv = netdev_priv(ndev);</div><div class='add'>+	struct rcar_canfd_global *gpriv = priv-&gt;gpriv;</div><div class='add'>+	struct net_device_stats *stats = &amp;ndev-&gt;stats;</div><div class='add'>+	u32 sts;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u32 ch = priv-&gt;channel;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		u8 unsent, sent;</div><div class='add'>+</div><div class='add'>+		sent = priv-&gt;tx_tail % RCANFD_FIFO_DEPTH;</div><div class='add'>+		stats-&gt;tx_packets++;</div><div class='add'>+		stats-&gt;tx_bytes += can_get_echo_skb(ndev, sent, NULL);</div><div class='add'>+</div><div class='add'>+		spin_lock_irqsave(&amp;priv-&gt;tx_lock, flags);</div><div class='add'>+		priv-&gt;tx_tail++;</div><div class='add'>+		sts = rcar_canfd_read(priv-&gt;base,</div><div class='add'>+				      RCANFD_CFSTS(gpriv, ch, RCANFD_CFFIFO_IDX));</div><div class='add'>+		unsent = RCANFD_CFSTS_CFMC(sts);</div><div class='add'>+</div><div class='add'>+		/* Wake producer only when there is room */</div><div class='add'>+		if (unsent != RCANFD_FIFO_DEPTH)</div><div class='add'>+			netif_wake_queue(ndev);</div><div class='add'>+</div><div class='add'>+		if (priv-&gt;tx_head - priv-&gt;tx_tail &lt;= unsent) {</div><div class='add'>+			spin_unlock_irqrestore(&amp;priv-&gt;tx_lock, flags);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		spin_unlock_irqrestore(&amp;priv-&gt;tx_lock, flags);</div><div class='add'>+</div><div class='add'>+	} while (1);</div><div class='add'>+</div><div class='add'>+	/* Clear interrupt */</div><div class='add'>+	rcar_canfd_write(priv-&gt;base, RCANFD_CFSTS(gpriv, ch, RCANFD_CFFIFO_IDX),</div><div class='add'>+			 sts &amp; ~RCANFD_CFSTS_CFTXIF);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_canfd_handle_global_err(struct rcar_canfd_global *gpriv, u32 ch)</div><div class='add'>+{</div><div class='add'>+	struct rcar_canfd_channel *priv = gpriv-&gt;ch[ch];</div><div class='add'>+	struct net_device *ndev = priv-&gt;ndev;</div><div class='add'>+	u32 gerfl;</div><div class='add'>+</div><div class='add'>+	/* Handle global error interrupts */</div><div class='add'>+	gerfl = rcar_canfd_read(priv-&gt;base, RCANFD_GERFL);</div><div class='add'>+	if (unlikely(RCANFD_GERFL_ERR(gpriv, gerfl)))</div><div class='add'>+		rcar_canfd_global_error(ndev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t rcar_canfd_global_err_interrupt(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct rcar_canfd_global *gpriv = dev_id;</div><div class='add'>+	u32 ch;</div><div class='add'>+</div><div class='add'>+	for_each_set_bit(ch, &amp;gpriv-&gt;channels_mask, gpriv-&gt;info-&gt;max_channels)</div><div class='add'>+		rcar_canfd_handle_global_err(gpriv, ch);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_canfd_handle_global_receive(struct rcar_canfd_global *gpriv, u32 ch)</div><div class='add'>+{</div><div class='add'>+	struct rcar_canfd_channel *priv = gpriv-&gt;ch[ch];</div><div class='add'>+	u32 ridx = ch + RCANFD_RFFIFO_IDX;</div><div class='add'>+	u32 sts, cc;</div><div class='add'>+</div><div class='add'>+	/* Handle Rx interrupts */</div><div class='add'>+	sts = rcar_canfd_read(priv-&gt;base, RCANFD_RFSTS(gpriv, ridx));</div><div class='add'>+	cc = rcar_canfd_read(priv-&gt;base, RCANFD_RFCC(gpriv, ridx));</div><div class='add'>+	if (likely(sts &amp; RCANFD_RFSTS_RFIF &amp;&amp;</div><div class='add'>+		   cc &amp; RCANFD_RFCC_RFIE)) {</div><div class='add'>+		if (napi_schedule_prep(&amp;priv-&gt;napi)) {</div><div class='add'>+			/* Disable Rx FIFO interrupts */</div><div class='add'>+			rcar_canfd_clear_bit(priv-&gt;base,</div><div class='add'>+					     RCANFD_RFCC(gpriv, ridx),</div><div class='add'>+					     RCANFD_RFCC_RFIE);</div><div class='add'>+			__napi_schedule(&amp;priv-&gt;napi);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t rcar_canfd_global_receive_fifo_interrupt(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct rcar_canfd_global *gpriv = dev_id;</div><div class='add'>+	u32 ch;</div><div class='add'>+</div><div class='add'>+	for_each_set_bit(ch, &amp;gpriv-&gt;channels_mask, gpriv-&gt;info-&gt;max_channels)</div><div class='add'>+		rcar_canfd_handle_global_receive(gpriv, ch);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t rcar_canfd_global_interrupt(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct rcar_canfd_global *gpriv = dev_id;</div><div class='add'>+	u32 ch;</div><div class='add'>+</div><div class='add'>+	/* Global error interrupts still indicate a condition specific</div><div class='add'>+	 * to a channel. RxFIFO interrupt is a global interrupt.</div><div class='add'>+	 */</div><div class='add'>+	for_each_set_bit(ch, &amp;gpriv-&gt;channels_mask, gpriv-&gt;info-&gt;max_channels) {</div><div class='add'>+		rcar_canfd_handle_global_err(gpriv, ch);</div><div class='add'>+		rcar_canfd_handle_global_receive(gpriv, ch);</div><div class='add'>+	}</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_canfd_state_change(struct net_device *ndev,</div><div class='add'>+				    u16 txerr, u16 rxerr)</div><div class='add'>+{</div><div class='add'>+	struct rcar_canfd_channel *priv = netdev_priv(ndev);</div><div class='add'>+	struct net_device_stats *stats = &amp;ndev-&gt;stats;</div><div class='add'>+	enum can_state rx_state, tx_state, state = priv-&gt;can.state;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	/* Handle transition from error to normal states */</div><div class='add'>+	if (txerr &lt; 96 &amp;&amp; rxerr &lt; 96)</div><div class='add'>+		state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+	else if (txerr &lt; 128 &amp;&amp; rxerr &lt; 128)</div><div class='add'>+		state = CAN_STATE_ERROR_WARNING;</div><div class='add'>+</div><div class='add'>+	if (state != priv-&gt;can.state) {</div><div class='add'>+		netdev_dbg(ndev, "state: new %d, old %d: txerr %u, rxerr %u\n",</div><div class='add'>+			   state, priv-&gt;can.state, txerr, rxerr);</div><div class='add'>+		skb = alloc_can_err_skb(ndev, &amp;cf);</div><div class='add'>+		if (!skb) {</div><div class='add'>+			stats-&gt;rx_dropped++;</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+		tx_state = txerr &gt;= rxerr ? state : 0;</div><div class='add'>+		rx_state = txerr &lt;= rxerr ? state : 0;</div><div class='add'>+</div><div class='add'>+		can_change_state(ndev, cf, tx_state, rx_state);</div><div class='add'>+		netif_rx(skb);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_canfd_handle_channel_tx(struct rcar_canfd_global *gpriv, u32 ch)</div><div class='add'>+{</div><div class='add'>+	struct rcar_canfd_channel *priv = gpriv-&gt;ch[ch];</div><div class='add'>+	struct net_device *ndev = priv-&gt;ndev;</div><div class='add'>+	u32 sts;</div><div class='add'>+</div><div class='add'>+	/* Handle Tx interrupts */</div><div class='add'>+	sts = rcar_canfd_read(priv-&gt;base,</div><div class='add'>+			      RCANFD_CFSTS(gpriv, ch, RCANFD_CFFIFO_IDX));</div><div class='add'>+	if (likely(sts &amp; RCANFD_CFSTS_CFTXIF))</div><div class='add'>+		rcar_canfd_tx_done(ndev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t rcar_canfd_channel_tx_interrupt(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct rcar_canfd_channel *priv = dev_id;</div><div class='add'>+</div><div class='add'>+	rcar_canfd_handle_channel_tx(priv-&gt;gpriv, priv-&gt;channel);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_canfd_handle_channel_err(struct rcar_canfd_global *gpriv, u32 ch)</div><div class='add'>+{</div><div class='add'>+	struct rcar_canfd_channel *priv = gpriv-&gt;ch[ch];</div><div class='add'>+	struct net_device *ndev = priv-&gt;ndev;</div><div class='add'>+	u16 txerr, rxerr;</div><div class='add'>+	u32 sts, cerfl;</div><div class='add'>+</div><div class='add'>+	/* Handle channel error interrupts */</div><div class='add'>+	cerfl = rcar_canfd_read(priv-&gt;base, RCANFD_CERFL(ch));</div><div class='add'>+	sts = rcar_canfd_read(priv-&gt;base, RCANFD_CSTS(ch));</div><div class='add'>+	txerr = RCANFD_CSTS_TECCNT(sts);</div><div class='add'>+	rxerr = RCANFD_CSTS_RECCNT(sts);</div><div class='add'>+	if (unlikely(RCANFD_CERFL_ERR(cerfl)))</div><div class='add'>+		rcar_canfd_error(ndev, cerfl, txerr, rxerr);</div><div class='add'>+</div><div class='add'>+	/* Handle state change to lower states */</div><div class='add'>+	if (unlikely(priv-&gt;can.state != CAN_STATE_ERROR_ACTIVE &amp;&amp;</div><div class='add'>+		     priv-&gt;can.state != CAN_STATE_BUS_OFF))</div><div class='add'>+		rcar_canfd_state_change(ndev, txerr, rxerr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t rcar_canfd_channel_err_interrupt(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct rcar_canfd_channel *priv = dev_id;</div><div class='add'>+</div><div class='add'>+	rcar_canfd_handle_channel_err(priv-&gt;gpriv, priv-&gt;channel);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t rcar_canfd_channel_interrupt(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct rcar_canfd_global *gpriv = dev_id;</div><div class='add'>+	u32 ch;</div><div class='add'>+</div><div class='add'>+	/* Common FIFO is a per channel resource */</div><div class='add'>+	for_each_set_bit(ch, &amp;gpriv-&gt;channels_mask, gpriv-&gt;info-&gt;max_channels) {</div><div class='add'>+		rcar_canfd_handle_channel_err(gpriv, ch);</div><div class='add'>+		rcar_canfd_handle_channel_tx(gpriv, ch);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 rcar_canfd_compute_nominal_bit_rate_cfg(struct rcar_canfd_channel *priv,</div><div class='add'>+							  u16 tseg1, u16 tseg2, u16 sjw, u16 brp)</div><div class='add'>+{</div><div class='add'>+	struct rcar_canfd_global *gpriv = priv-&gt;gpriv;</div><div class='add'>+	const struct rcar_canfd_hw_info *info = gpriv-&gt;info;</div><div class='add'>+	u32 ntseg1, ntseg2, nsjw, nbrp;</div><div class='add'>+</div><div class='add'>+	if ((priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD) || gpriv-&gt;info-&gt;shared_can_regs) {</div><div class='add'>+		ntseg1 = (tseg1 &amp; (info-&gt;nom_bittiming-&gt;tseg1_max - 1)) &lt;&lt; info-&gt;sh-&gt;ntseg1;</div><div class='add'>+		ntseg2 = (tseg2 &amp; (info-&gt;nom_bittiming-&gt;tseg2_max - 1)) &lt;&lt; info-&gt;sh-&gt;ntseg2;</div><div class='add'>+		nsjw = (sjw &amp; (info-&gt;nom_bittiming-&gt;sjw_max - 1)) &lt;&lt; info-&gt;sh-&gt;nsjw;</div><div class='add'>+		nbrp = FIELD_PREP(RCANFD_NCFG_NBRP, brp);</div><div class='add'>+	} else {</div><div class='add'>+		ntseg1 = FIELD_PREP(RCANFD_CFG_TSEG1, tseg1);</div><div class='add'>+		ntseg2 = FIELD_PREP(RCANFD_CFG_TSEG2, tseg2);</div><div class='add'>+		nsjw = FIELD_PREP(RCANFD_CFG_SJW, sjw);</div><div class='add'>+		nbrp = FIELD_PREP(RCANFD_CFG_BRP, brp);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return (ntseg1 | ntseg2 | nsjw | nbrp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 rcar_canfd_compute_data_bit_rate_cfg(const struct rcar_canfd_hw_info *info,</div><div class='add'>+						       u16 tseg1, u16 tseg2, u16 sjw, u16 brp)</div><div class='add'>+{</div><div class='add'>+	u32 dtseg1, dtseg2, dsjw, dbrp;</div><div class='add'>+</div><div class='add'>+	dtseg1 = (tseg1 &amp; (info-&gt;data_bittiming-&gt;tseg1_max - 1)) &lt;&lt; info-&gt;sh-&gt;dtseg1;</div><div class='add'>+	dtseg2 = (tseg2 &amp; (info-&gt;data_bittiming-&gt;tseg2_max - 1)) &lt;&lt; info-&gt;sh-&gt;dtseg2;</div><div class='add'>+	dsjw = (sjw &amp; (info-&gt;data_bittiming-&gt;sjw_max - 1)) &lt;&lt; 24;</div><div class='add'>+	dbrp = FIELD_PREP(RCANFD_DCFG_DBRP, brp);</div><div class='add'>+</div><div class='add'>+	return (dtseg1 | dtseg2 | dsjw | dbrp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_canfd_set_bittiming(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	u32 mask = RCANFD_FDCFG_TDCO | RCANFD_FDCFG_TDCE | RCANFD_FDCFG_TDCOC;</div><div class='add'>+	struct rcar_canfd_channel *priv = netdev_priv(ndev);</div><div class='add'>+	struct rcar_canfd_global *gpriv = priv-&gt;gpriv;</div><div class='add'>+	const struct can_bittiming *bt = &amp;priv-&gt;can.bittiming;</div><div class='add'>+	const struct can_bittiming *dbt = &amp;priv-&gt;can.fd.data_bittiming;</div><div class='add'>+	const struct can_tdc_const *tdc_const = priv-&gt;can.fd.tdc_const;</div><div class='add'>+	const struct can_tdc *tdc = &amp;priv-&gt;can.fd.tdc;</div><div class='add'>+	u32 cfg, tdcmode = 0, tdco = 0;</div><div class='add'>+	u16 brp, sjw, tseg1, tseg2;</div><div class='add'>+	u32 ch = priv-&gt;channel;</div><div class='add'>+</div><div class='add'>+	/* Nominal bit timing settings */</div><div class='add'>+	brp = bt-&gt;brp - 1;</div><div class='add'>+	sjw = bt-&gt;sjw - 1;</div><div class='add'>+	tseg1 = bt-&gt;prop_seg + bt-&gt;phase_seg1 - 1;</div><div class='add'>+	tseg2 = bt-&gt;phase_seg2 - 1;</div><div class='add'>+	cfg = rcar_canfd_compute_nominal_bit_rate_cfg(priv, tseg1, tseg2, sjw, brp);</div><div class='add'>+	rcar_canfd_write(priv-&gt;base, RCANFD_CCFG(ch), cfg);</div><div class='add'>+</div><div class='add'>+	if (!(priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Data bit timing settings */</div><div class='add'>+	brp = dbt-&gt;brp - 1;</div><div class='add'>+	sjw = dbt-&gt;sjw - 1;</div><div class='add'>+	tseg1 = dbt-&gt;prop_seg + dbt-&gt;phase_seg1 - 1;</div><div class='add'>+	tseg2 = dbt-&gt;phase_seg2 - 1;</div><div class='add'>+	cfg = rcar_canfd_compute_data_bit_rate_cfg(gpriv-&gt;info, tseg1, tseg2, sjw, brp);</div><div class='add'>+	writel(cfg, &amp;gpriv-&gt;fcbase[ch].dcfg);</div><div class='add'>+</div><div class='add'>+	/* Transceiver Delay Compensation */</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_TDC_AUTO) {</div><div class='add'>+		/* TDC enabled, measured + offset */</div><div class='add'>+		tdcmode = RCANFD_FDCFG_TDCE;</div><div class='add'>+		tdco = tdc-&gt;tdco - 1;</div><div class='add'>+	} else if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_TDC_MANUAL) {</div><div class='add'>+		/* TDC enabled, offset only */</div><div class='add'>+		tdcmode = RCANFD_FDCFG_TDCE | RCANFD_FDCFG_TDCOC;</div><div class='add'>+		tdco = min(tdc-&gt;tdcv + tdc-&gt;tdco, tdc_const-&gt;tdco_max) - 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rcar_canfd_update_bit_reg(&amp;gpriv-&gt;fcbase[ch].cfdcfg, mask,</div><div class='add'>+				  tdcmode | FIELD_PREP(RCANFD_FDCFG_TDCO, tdco));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rcar_canfd_start(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct rcar_canfd_channel *priv = netdev_priv(ndev);</div><div class='add'>+	struct rcar_canfd_global *gpriv = priv-&gt;gpriv;</div><div class='add'>+	int err = -EOPNOTSUPP;</div><div class='add'>+	u32 sts, ch = priv-&gt;channel;</div><div class='add'>+	u32 ridx = ch + RCANFD_RFFIFO_IDX;</div><div class='add'>+</div><div class='add'>+	rcar_canfd_set_bittiming(ndev);</div><div class='add'>+</div><div class='add'>+	rcar_canfd_enable_channel_interrupts(priv);</div><div class='add'>+</div><div class='add'>+	/* Set channel to Operational mode */</div><div class='add'>+	rcar_canfd_update_bit(priv-&gt;base, RCANFD_CCTR(ch),</div><div class='add'>+			      RCANFD_CCTR_CHMDC_MASK, RCANFD_CCTR_CHDMC_COPM);</div><div class='add'>+</div><div class='add'>+	/* Verify channel mode change */</div><div class='add'>+	err = readl_poll_timeout((priv-&gt;base + RCANFD_CSTS(ch)), sts,</div><div class='add'>+				 (sts &amp; RCANFD_CSTS_COMSTS), 2, 500000);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(ndev, "channel %u communication state failed\n", ch);</div><div class='add'>+		goto fail_mode_change;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Enable Common &amp; Rx FIFO */</div><div class='add'>+	rcar_canfd_set_bit(priv-&gt;base, RCANFD_CFCC(gpriv, ch, RCANFD_CFFIFO_IDX),</div><div class='add'>+			   RCANFD_CFCC_CFE);</div><div class='add'>+	rcar_canfd_set_bit(priv-&gt;base, RCANFD_RFCC(gpriv, ridx), RCANFD_RFCC_RFE);</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+fail_mode_change:</div><div class='add'>+	rcar_canfd_disable_channel_interrupts(priv);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rcar_canfd_open(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct rcar_canfd_channel *priv = netdev_priv(ndev);</div><div class='add'>+	struct rcar_canfd_global *gpriv = priv-&gt;gpriv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = phy_power_on(priv-&gt;transceiver);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(ndev, "failed to power on PHY: %pe\n", ERR_PTR(err));</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Peripheral clock is already enabled in probe */</div><div class='add'>+	err = clk_prepare_enable(gpriv-&gt;can_clk);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(ndev, "failed to enable CAN clock: %pe\n", ERR_PTR(err));</div><div class='add'>+		goto out_phy;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = open_candev(ndev);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(ndev, "open_candev() failed: %pe\n", ERR_PTR(err));</div><div class='add'>+		goto out_can_clock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	napi_enable(&amp;priv-&gt;napi);</div><div class='add'>+	err = rcar_canfd_start(ndev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_close;</div><div class='add'>+	netif_start_queue(ndev);</div><div class='add'>+	return 0;</div><div class='add'>+out_close:</div><div class='add'>+	napi_disable(&amp;priv-&gt;napi);</div><div class='add'>+	close_candev(ndev);</div><div class='add'>+out_can_clock:</div><div class='add'>+	clk_disable_unprepare(gpriv-&gt;can_clk);</div><div class='add'>+out_phy:</div><div class='add'>+	phy_power_off(priv-&gt;transceiver);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_canfd_stop(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct rcar_canfd_channel *priv = netdev_priv(ndev);</div><div class='add'>+	struct rcar_canfd_global *gpriv = priv-&gt;gpriv;</div><div class='add'>+	int err;</div><div class='add'>+	u32 sts, ch = priv-&gt;channel;</div><div class='add'>+	u32 ridx = ch + RCANFD_RFFIFO_IDX;</div><div class='add'>+</div><div class='add'>+	/* Transition to channel reset mode  */</div><div class='add'>+	rcar_canfd_update_bit(priv-&gt;base, RCANFD_CCTR(ch),</div><div class='add'>+			      RCANFD_CCTR_CHMDC_MASK, RCANFD_CCTR_CHDMC_CRESET);</div><div class='add'>+</div><div class='add'>+	/* Check Channel reset mode */</div><div class='add'>+	err = readl_poll_timeout((priv-&gt;base + RCANFD_CSTS(ch)), sts,</div><div class='add'>+				 (sts &amp; RCANFD_CSTS_CRSTSTS), 2, 500000);</div><div class='add'>+	if (err)</div><div class='add'>+		netdev_err(ndev, "channel %u reset failed\n", ch);</div><div class='add'>+</div><div class='add'>+	rcar_canfd_disable_channel_interrupts(priv);</div><div class='add'>+</div><div class='add'>+	/* Disable Common &amp; Rx FIFO */</div><div class='add'>+	rcar_canfd_clear_bit(priv-&gt;base, RCANFD_CFCC(gpriv, ch, RCANFD_CFFIFO_IDX),</div><div class='add'>+			     RCANFD_CFCC_CFE);</div><div class='add'>+	rcar_canfd_clear_bit(priv-&gt;base, RCANFD_RFCC(gpriv, ridx), RCANFD_RFCC_RFE);</div><div class='add'>+</div><div class='add'>+	/* Set the state as STOPPED */</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rcar_canfd_close(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct rcar_canfd_channel *priv = netdev_priv(ndev);</div><div class='add'>+	struct rcar_canfd_global *gpriv = priv-&gt;gpriv;</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(ndev);</div><div class='add'>+	rcar_canfd_stop(ndev);</div><div class='add'>+	napi_disable(&amp;priv-&gt;napi);</div><div class='add'>+	close_candev(ndev);</div><div class='add'>+	clk_disable_unprepare(gpriv-&gt;can_clk);</div><div class='add'>+	phy_power_off(priv-&gt;transceiver);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static netdev_tx_t rcar_canfd_start_xmit(struct sk_buff *skb,</div><div class='add'>+					 struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct rcar_canfd_channel *priv = netdev_priv(ndev);</div><div class='add'>+	struct rcar_canfd_global *gpriv = priv-&gt;gpriv;</div><div class='add'>+	struct canfd_frame *cf = (struct canfd_frame *)skb-&gt;data;</div><div class='add'>+	u32 sts = 0, id, dlc;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u32 ch = priv-&gt;channel;</div><div class='add'>+</div><div class='add'>+	if (can_dev_dropped_skb(ndev, skb))</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+	if (cf-&gt;can_id &amp; CAN_EFF_FLAG) {</div><div class='add'>+		id = cf-&gt;can_id &amp; CAN_EFF_MASK;</div><div class='add'>+		id |= RCANFD_CFID_CFIDE;</div><div class='add'>+	} else {</div><div class='add'>+		id = cf-&gt;can_id &amp; CAN_SFF_MASK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cf-&gt;can_id &amp; CAN_RTR_FLAG)</div><div class='add'>+		id |= RCANFD_CFID_CFRTR;</div><div class='add'>+</div><div class='add'>+	dlc = RCANFD_CFPTR_CFDLC(can_fd_len2dlc(cf-&gt;len));</div><div class='add'>+</div><div class='add'>+	if ((priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD) || gpriv-&gt;info-&gt;shared_can_regs) {</div><div class='add'>+		rcar_canfd_write(priv-&gt;base,</div><div class='add'>+				 RCANFD_F_CFID(gpriv, ch, RCANFD_CFFIFO_IDX), id);</div><div class='add'>+		rcar_canfd_write(priv-&gt;base,</div><div class='add'>+				 RCANFD_F_CFPTR(gpriv, ch, RCANFD_CFFIFO_IDX), dlc);</div><div class='add'>+</div><div class='add'>+		if (can_is_canfd_skb(skb)) {</div><div class='add'>+			/* CAN FD frame format */</div><div class='add'>+			sts |= RCANFD_CFFDCSTS_CFFDF;</div><div class='add'>+			if (cf-&gt;flags &amp; CANFD_BRS)</div><div class='add'>+				sts |= RCANFD_CFFDCSTS_CFBRS;</div><div class='add'>+</div><div class='add'>+			if (priv-&gt;can.state == CAN_STATE_ERROR_PASSIVE)</div><div class='add'>+				sts |= RCANFD_CFFDCSTS_CFESI;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		rcar_canfd_write(priv-&gt;base,</div><div class='add'>+				 RCANFD_F_CFFDCSTS(gpriv, ch, RCANFD_CFFIFO_IDX), sts);</div><div class='add'>+</div><div class='add'>+		rcar_canfd_put_data(priv, cf,</div><div class='add'>+				    RCANFD_F_CFDF(gpriv, ch, RCANFD_CFFIFO_IDX, 0));</div><div class='add'>+	} else {</div><div class='add'>+		rcar_canfd_write(priv-&gt;base,</div><div class='add'>+				 RCANFD_C_CFID(ch, RCANFD_CFFIFO_IDX), id);</div><div class='add'>+		rcar_canfd_write(priv-&gt;base,</div><div class='add'>+				 RCANFD_C_CFPTR(ch, RCANFD_CFFIFO_IDX), dlc);</div><div class='add'>+		rcar_canfd_put_data(priv, cf,</div><div class='add'>+				    RCANFD_C_CFDF(ch, RCANFD_CFFIFO_IDX, 0));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	can_put_echo_skb(skb, ndev, priv-&gt;tx_head % RCANFD_FIFO_DEPTH, 0);</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;tx_lock, flags);</div><div class='add'>+	priv-&gt;tx_head++;</div><div class='add'>+</div><div class='add'>+	/* Stop the queue if we've filled all FIFO entries */</div><div class='add'>+	if (priv-&gt;tx_head - priv-&gt;tx_tail &gt;= RCANFD_FIFO_DEPTH)</div><div class='add'>+		netif_stop_queue(ndev);</div><div class='add'>+</div><div class='add'>+	/* Start Tx: Write 0xff to CFPC to increment the CPU-side</div><div class='add'>+	 * pointer for the Common FIFO</div><div class='add'>+	 */</div><div class='add'>+	rcar_canfd_write(priv-&gt;base,</div><div class='add'>+			 RCANFD_CFPCTR(gpriv, ch, RCANFD_CFFIFO_IDX), 0xff);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;tx_lock, flags);</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_canfd_rx_pkt(struct rcar_canfd_channel *priv)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = priv-&gt;ndev;</div><div class='add'>+	struct net_device_stats *stats = &amp;ndev-&gt;stats;</div><div class='add'>+	struct rcar_canfd_global *gpriv = priv-&gt;gpriv;</div><div class='add'>+	struct canfd_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	u32 sts = 0, id, dlc;</div><div class='add'>+	u32 ch = priv-&gt;channel;</div><div class='add'>+	u32 ridx = ch + RCANFD_RFFIFO_IDX;</div><div class='add'>+</div><div class='add'>+	if ((priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD) || gpriv-&gt;info-&gt;shared_can_regs) {</div><div class='add'>+		id = rcar_canfd_read(priv-&gt;base, RCANFD_F_RFID(gpriv, ridx));</div><div class='add'>+		dlc = rcar_canfd_read(priv-&gt;base, RCANFD_F_RFPTR(gpriv, ridx));</div><div class='add'>+</div><div class='add'>+		sts = rcar_canfd_read(priv-&gt;base, RCANFD_F_RFFDSTS(gpriv, ridx));</div><div class='add'>+</div><div class='add'>+		if ((priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD) &amp;&amp;</div><div class='add'>+		    sts &amp; RCANFD_RFFDSTS_RFFDF)</div><div class='add'>+			skb = alloc_canfd_skb(ndev, &amp;cf);</div><div class='add'>+		else</div><div class='add'>+			skb = alloc_can_skb(ndev, (struct can_frame **)&amp;cf);</div><div class='add'>+	} else {</div><div class='add'>+		id = rcar_canfd_read(priv-&gt;base, RCANFD_C_RFID(ridx));</div><div class='add'>+		dlc = rcar_canfd_read(priv-&gt;base, RCANFD_C_RFPTR(ridx));</div><div class='add'>+		skb = alloc_can_skb(ndev, (struct can_frame **)&amp;cf);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!skb) {</div><div class='add'>+		stats-&gt;rx_dropped++;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (id &amp; RCANFD_RFID_RFIDE)</div><div class='add'>+		cf-&gt;can_id = (id &amp; CAN_EFF_MASK) | CAN_EFF_FLAG;</div><div class='add'>+	else</div><div class='add'>+		cf-&gt;can_id = id &amp; CAN_SFF_MASK;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD) {</div><div class='add'>+		if (sts &amp; RCANFD_RFFDSTS_RFFDF)</div><div class='add'>+			cf-&gt;len = can_fd_dlc2len(RCANFD_RFPTR_RFDLC(dlc));</div><div class='add'>+		else</div><div class='add'>+			cf-&gt;len = can_cc_dlc2len(RCANFD_RFPTR_RFDLC(dlc));</div><div class='add'>+</div><div class='add'>+		if (sts &amp; RCANFD_RFFDSTS_RFESI) {</div><div class='add'>+			cf-&gt;flags |= CANFD_ESI;</div><div class='add'>+			netdev_dbg(ndev, "ESI Error\n");</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!(sts &amp; RCANFD_RFFDSTS_RFFDF) &amp;&amp; (id &amp; RCANFD_RFID_RFRTR)) {</div><div class='add'>+			cf-&gt;can_id |= CAN_RTR_FLAG;</div><div class='add'>+		} else {</div><div class='add'>+			if (sts &amp; RCANFD_RFFDSTS_RFBRS)</div><div class='add'>+				cf-&gt;flags |= CANFD_BRS;</div><div class='add'>+</div><div class='add'>+			rcar_canfd_get_data(priv, cf, RCANFD_F_RFDF(gpriv, ridx, 0));</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		cf-&gt;len = can_cc_dlc2len(RCANFD_RFPTR_RFDLC(dlc));</div><div class='add'>+		if (id &amp; RCANFD_RFID_RFRTR)</div><div class='add'>+			cf-&gt;can_id |= CAN_RTR_FLAG;</div><div class='add'>+		else if (gpriv-&gt;info-&gt;shared_can_regs)</div><div class='add'>+			rcar_canfd_get_data(priv, cf, RCANFD_F_RFDF(gpriv, ridx, 0));</div><div class='add'>+		else</div><div class='add'>+			rcar_canfd_get_data(priv, cf, RCANFD_C_RFDF(ridx, 0));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Write 0xff to RFPC to increment the CPU-side</div><div class='add'>+	 * pointer of the Rx FIFO</div><div class='add'>+	 */</div><div class='add'>+	rcar_canfd_write(priv-&gt;base, RCANFD_RFPCTR(gpriv, ridx), 0xff);</div><div class='add'>+</div><div class='add'>+	if (!(cf-&gt;can_id &amp; CAN_RTR_FLAG))</div><div class='add'>+		stats-&gt;rx_bytes += cf-&gt;len;</div><div class='add'>+	stats-&gt;rx_packets++;</div><div class='add'>+	netif_receive_skb(skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rcar_canfd_rx_poll(struct napi_struct *napi, int quota)</div><div class='add'>+{</div><div class='add'>+	struct rcar_canfd_channel *priv =</div><div class='add'>+		container_of(napi, struct rcar_canfd_channel, napi);</div><div class='add'>+	struct rcar_canfd_global *gpriv = priv-&gt;gpriv;</div><div class='add'>+	int num_pkts;</div><div class='add'>+	u32 sts;</div><div class='add'>+	u32 ch = priv-&gt;channel;</div><div class='add'>+	u32 ridx = ch + RCANFD_RFFIFO_IDX;</div><div class='add'>+</div><div class='add'>+	for (num_pkts = 0; num_pkts &lt; quota; num_pkts++) {</div><div class='add'>+		sts = rcar_canfd_read(priv-&gt;base, RCANFD_RFSTS(gpriv, ridx));</div><div class='add'>+		/* Check FIFO empty condition */</div><div class='add'>+		if (sts &amp; RCANFD_RFSTS_RFEMP)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		rcar_canfd_rx_pkt(priv);</div><div class='add'>+</div><div class='add'>+		/* Clear interrupt bit */</div><div class='add'>+		if (sts &amp; RCANFD_RFSTS_RFIF)</div><div class='add'>+			rcar_canfd_write(priv-&gt;base, RCANFD_RFSTS(gpriv, ridx),</div><div class='add'>+					 sts &amp; ~RCANFD_RFSTS_RFIF);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* All packets processed */</div><div class='add'>+	if (num_pkts &lt; quota) {</div><div class='add'>+		if (napi_complete_done(napi, num_pkts)) {</div><div class='add'>+			/* Enable Rx FIFO interrupts */</div><div class='add'>+			rcar_canfd_set_bit(priv-&gt;base, RCANFD_RFCC(gpriv, ridx),</div><div class='add'>+					   RCANFD_RFCC_RFIE);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return num_pkts;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int rcar_canfd_get_tdcr(struct rcar_canfd_global *gpriv,</div><div class='add'>+					unsigned int ch)</div><div class='add'>+{</div><div class='add'>+	u32 sts = readl(&amp;gpriv-&gt;fcbase[ch].cfdsts);</div><div class='add'>+	u32 tdcr = FIELD_GET(RCANFD_FDSTS_TDCR, sts);</div><div class='add'>+</div><div class='add'>+	return tdcr &amp; (gpriv-&gt;info-&gt;tdc_const-&gt;tdcv_max - 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rcar_canfd_get_auto_tdcv(const struct net_device *ndev, u32 *tdcv)</div><div class='add'>+{</div><div class='add'>+	struct rcar_canfd_channel *priv = netdev_priv(ndev);</div><div class='add'>+	u32 tdco = priv-&gt;can.fd.tdc.tdco;</div><div class='add'>+	u32 tdcr;</div><div class='add'>+</div><div class='add'>+	/* Transceiver Delay Compensation Result */</div><div class='add'>+	tdcr = rcar_canfd_get_tdcr(priv-&gt;gpriv, priv-&gt;channel) + 1;</div><div class='add'>+</div><div class='add'>+	*tdcv = tdcr &lt; tdco ? 0 : tdcr - tdco;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rcar_canfd_do_set_mode(struct net_device *ndev, enum can_mode mode)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case CAN_MODE_START:</div><div class='add'>+		err = rcar_canfd_start(ndev);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+		netif_wake_queue(ndev);</div><div class='add'>+		return 0;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rcar_canfd_get_berr_counter(const struct net_device *ndev,</div><div class='add'>+				       struct can_berr_counter *bec)</div><div class='add'>+{</div><div class='add'>+	struct rcar_canfd_channel *priv = netdev_priv(ndev);</div><div class='add'>+	u32 val, ch = priv-&gt;channel;</div><div class='add'>+</div><div class='add'>+	/* Peripheral clock is already enabled in probe */</div><div class='add'>+	val = rcar_canfd_read(priv-&gt;base, RCANFD_CSTS(ch));</div><div class='add'>+	bec-&gt;txerr = RCANFD_CSTS_TECCNT(val);</div><div class='add'>+	bec-&gt;rxerr = RCANFD_CSTS_RECCNT(val);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops rcar_canfd_netdev_ops = {</div><div class='add'>+	.ndo_open = rcar_canfd_open,</div><div class='add'>+	.ndo_stop = rcar_canfd_close,</div><div class='add'>+	.ndo_start_xmit = rcar_canfd_start_xmit,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops rcar_canfd_ethtool_ops = {</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int rcar_canfd_channel_probe(struct rcar_canfd_global *gpriv, u32 ch,</div><div class='add'>+				    u32 fcan_freq, struct phy *transceiver)</div><div class='add'>+{</div><div class='add'>+	const struct rcar_canfd_hw_info *info = gpriv-&gt;info;</div><div class='add'>+	struct platform_device *pdev = gpriv-&gt;pdev;</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct rcar_canfd_channel *priv;</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	int err = -ENODEV;</div><div class='add'>+</div><div class='add'>+	ndev = alloc_candev(sizeof(*priv), RCANFD_FIFO_DEPTH);</div><div class='add'>+	if (!ndev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	ndev-&gt;netdev_ops = &amp;rcar_canfd_netdev_ops;</div><div class='add'>+	ndev-&gt;ethtool_ops = &amp;rcar_canfd_ethtool_ops;</div><div class='add'>+	ndev-&gt;flags |= IFF_ECHO;</div><div class='add'>+	priv-&gt;ndev = ndev;</div><div class='add'>+	priv-&gt;base = gpriv-&gt;base;</div><div class='add'>+	priv-&gt;transceiver = transceiver;</div><div class='add'>+	priv-&gt;channel = ch;</div><div class='add'>+	priv-&gt;gpriv = gpriv;</div><div class='add'>+	if (transceiver)</div><div class='add'>+		priv-&gt;can.bitrate_max = transceiver-&gt;attrs.max_link_rate;</div><div class='add'>+	priv-&gt;can.clock.freq = fcan_freq;</div><div class='add'>+	dev_info(dev, "can_clk rate is %u\n", priv-&gt;can.clock.freq);</div><div class='add'>+</div><div class='add'>+	if (info-&gt;multi_channel_irqs) {</div><div class='add'>+		char *irq_name;</div><div class='add'>+		char name[10];</div><div class='add'>+		int err_irq;</div><div class='add'>+		int tx_irq;</div><div class='add'>+</div><div class='add'>+		scnprintf(name, sizeof(name), "ch%u_err", ch);</div><div class='add'>+		err_irq = platform_get_irq_byname(pdev, name);</div><div class='add'>+		if (err_irq &lt; 0) {</div><div class='add'>+			err = err_irq;</div><div class='add'>+			goto fail;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		scnprintf(name, sizeof(name), "ch%u_trx", ch);</div><div class='add'>+		tx_irq = platform_get_irq_byname(pdev, name);</div><div class='add'>+		if (tx_irq &lt; 0) {</div><div class='add'>+			err = tx_irq;</div><div class='add'>+			goto fail;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		irq_name = devm_kasprintf(dev, GFP_KERNEL, "canfd.ch%d_err",</div><div class='add'>+					  ch);</div><div class='add'>+		if (!irq_name) {</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto fail;</div><div class='add'>+		}</div><div class='add'>+		err = devm_request_irq(dev, err_irq,</div><div class='add'>+				       rcar_canfd_channel_err_interrupt, 0,</div><div class='add'>+				       irq_name, priv);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(dev, "devm_request_irq CH Err %d failed: %pe\n",</div><div class='add'>+				err_irq, ERR_PTR(err));</div><div class='add'>+			goto fail;</div><div class='add'>+		}</div><div class='add'>+		irq_name = devm_kasprintf(dev, GFP_KERNEL, "canfd.ch%d_trx",</div><div class='add'>+					  ch);</div><div class='add'>+		if (!irq_name) {</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto fail;</div><div class='add'>+		}</div><div class='add'>+		err = devm_request_irq(dev, tx_irq,</div><div class='add'>+				       rcar_canfd_channel_tx_interrupt, 0,</div><div class='add'>+				       irq_name, priv);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(dev, "devm_request_irq Tx %d failed: %pe\n",</div><div class='add'>+				tx_irq, ERR_PTR(err));</div><div class='add'>+			goto fail;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (gpriv-&gt;fdmode) {</div><div class='add'>+		priv-&gt;can.bittiming_const = gpriv-&gt;info-&gt;nom_bittiming;</div><div class='add'>+		priv-&gt;can.fd.data_bittiming_const = gpriv-&gt;info-&gt;data_bittiming;</div><div class='add'>+		priv-&gt;can.fd.tdc_const = gpriv-&gt;info-&gt;tdc_const;</div><div class='add'>+</div><div class='add'>+		/* Controller starts in CAN FD only mode */</div><div class='add'>+		err = can_set_static_ctrlmode(ndev, CAN_CTRLMODE_FD);</div><div class='add'>+		if (err)</div><div class='add'>+			goto fail;</div><div class='add'>+</div><div class='add'>+		priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_BERR_REPORTING |</div><div class='add'>+					       CAN_CTRLMODE_TDC_AUTO |</div><div class='add'>+					       CAN_CTRLMODE_TDC_MANUAL;</div><div class='add'>+		priv-&gt;can.fd.do_get_auto_tdcv = rcar_canfd_get_auto_tdcv;</div><div class='add'>+	} else {</div><div class='add'>+		/* Controller starts in Classical CAN only mode */</div><div class='add'>+		if (gpriv-&gt;info-&gt;shared_can_regs)</div><div class='add'>+			priv-&gt;can.bittiming_const = gpriv-&gt;info-&gt;nom_bittiming;</div><div class='add'>+		else</div><div class='add'>+			priv-&gt;can.bittiming_const = &amp;rcar_canfd_bittiming_const;</div><div class='add'>+		priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_BERR_REPORTING;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.do_set_mode = rcar_canfd_do_set_mode;</div><div class='add'>+	priv-&gt;can.do_get_berr_counter = rcar_canfd_get_berr_counter;</div><div class='add'>+	SET_NETDEV_DEV(ndev, dev);</div><div class='add'>+</div><div class='add'>+	netif_napi_add_weight(ndev, &amp;priv-&gt;napi, rcar_canfd_rx_poll,</div><div class='add'>+			      RCANFD_NAPI_WEIGHT);</div><div class='add'>+	spin_lock_init(&amp;priv-&gt;tx_lock);</div><div class='add'>+	gpriv-&gt;ch[priv-&gt;channel] = priv;</div><div class='add'>+	err = register_candev(ndev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "register_candev() failed: %pe\n", ERR_PTR(err));</div><div class='add'>+		goto fail_candev;</div><div class='add'>+	}</div><div class='add'>+	dev_info(dev, "device registered (channel %u)\n", priv-&gt;channel);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+fail_candev:</div><div class='add'>+	netif_napi_del(&amp;priv-&gt;napi);</div><div class='add'>+fail:</div><div class='add'>+	free_candev(ndev);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_canfd_channel_remove(struct rcar_canfd_global *gpriv, u32 ch)</div><div class='add'>+{</div><div class='add'>+	struct rcar_canfd_channel *priv = gpriv-&gt;ch[ch];</div><div class='add'>+</div><div class='add'>+	if (priv) {</div><div class='add'>+		unregister_candev(priv-&gt;ndev);</div><div class='add'>+		netif_napi_del(&amp;priv-&gt;napi);</div><div class='add'>+		free_candev(priv-&gt;ndev);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rcar_canfd_global_init(struct rcar_canfd_global *gpriv)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;gpriv-&gt;pdev-&gt;dev;</div><div class='add'>+	u32 rule_entry = 0;</div><div class='add'>+	u32 ch, sts;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = reset_control_reset(gpriv-&gt;rstc1);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = reset_control_reset(gpriv-&gt;rstc2);</div><div class='add'>+	if (err)</div><div class='add'>+		goto fail_reset1;</div><div class='add'>+</div><div class='add'>+	/* Enable peripheral clock for register access */</div><div class='add'>+	err = clk_prepare_enable(gpriv-&gt;clkp);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "failed to enable peripheral clock: %pe\n",</div><div class='add'>+			ERR_PTR(err));</div><div class='add'>+		goto fail_reset2;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Enable RAM clock */</div><div class='add'>+	err = clk_prepare_enable(gpriv-&gt;clk_ram);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev,</div><div class='add'>+			"failed to enable RAM clock, error %d\n", err);</div><div class='add'>+		goto fail_clk;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = rcar_canfd_reset_controller(gpriv);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "reset controller failed: %pe\n", ERR_PTR(err));</div><div class='add'>+		goto fail_ram_clk;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Controller in Global reset &amp; Channel reset mode */</div><div class='add'>+	rcar_canfd_configure_controller(gpriv);</div><div class='add'>+</div><div class='add'>+	/* Configure per channel attributes */</div><div class='add'>+	for_each_set_bit(ch, &amp;gpriv-&gt;channels_mask, gpriv-&gt;info-&gt;max_channels) {</div><div class='add'>+		/* Configure Channel's Rx fifo */</div><div class='add'>+		rcar_canfd_configure_rx(gpriv, ch);</div><div class='add'>+</div><div class='add'>+		/* Configure Channel's Tx (Common) fifo */</div><div class='add'>+		rcar_canfd_configure_tx(gpriv, ch);</div><div class='add'>+</div><div class='add'>+		/* Configure receive rules */</div><div class='add'>+		rcar_canfd_configure_afl_rules(gpriv, ch, rule_entry);</div><div class='add'>+		rule_entry += RCANFD_CHANNEL_NUMRULES;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Configure common interrupts */</div><div class='add'>+	rcar_canfd_enable_global_interrupts(gpriv);</div><div class='add'>+</div><div class='add'>+	/* Start Global operation mode */</div><div class='add'>+	rcar_canfd_update_bit(gpriv-&gt;base, RCANFD_GCTR, RCANFD_GCTR_GMDC_MASK,</div><div class='add'>+			      RCANFD_GCTR_GMDC_GOPM);</div><div class='add'>+</div><div class='add'>+	/* Verify mode change */</div><div class='add'>+	err = readl_poll_timeout((gpriv-&gt;base + RCANFD_GSTS), sts,</div><div class='add'>+				 !(sts &amp; RCANFD_GSTS_GNOPM), 2, 500000);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "global operational mode failed\n");</div><div class='add'>+		goto fail_mode;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+fail_mode:</div><div class='add'>+	rcar_canfd_disable_global_interrupts(gpriv);</div><div class='add'>+fail_ram_clk:</div><div class='add'>+	clk_disable_unprepare(gpriv-&gt;clk_ram);</div><div class='add'>+fail_clk:</div><div class='add'>+	clk_disable_unprepare(gpriv-&gt;clkp);</div><div class='add'>+fail_reset2:</div><div class='add'>+	reset_control_assert(gpriv-&gt;rstc2);</div><div class='add'>+fail_reset1:</div><div class='add'>+	reset_control_assert(gpriv-&gt;rstc1);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_canfd_global_deinit(struct rcar_canfd_global *gpriv, bool full)</div><div class='add'>+{</div><div class='add'>+	rcar_canfd_disable_global_interrupts(gpriv);</div><div class='add'>+</div><div class='add'>+	if (full) {</div><div class='add'>+		rcar_canfd_reset_controller(gpriv);</div><div class='add'>+</div><div class='add'>+		/* Enter global sleep mode */</div><div class='add'>+		rcar_canfd_set_bit(gpriv-&gt;base, RCANFD_GCTR, RCANFD_GCTR_GSLPR);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	clk_disable_unprepare(gpriv-&gt;clk_ram);</div><div class='add'>+	clk_disable_unprepare(gpriv-&gt;clkp);</div><div class='add'>+	reset_control_assert(gpriv-&gt;rstc2);</div><div class='add'>+	reset_control_assert(gpriv-&gt;rstc1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rcar_canfd_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct phy *transceivers[RCANFD_NUM_CHANNELS] = { NULL, };</div><div class='add'>+	const struct rcar_canfd_hw_info *info;</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	void __iomem *addr;</div><div class='add'>+	struct rcar_canfd_global *gpriv;</div><div class='add'>+	struct device_node *of_child;</div><div class='add'>+	unsigned long channels_mask = 0;</div><div class='add'>+	int err, ch_irq, g_irq;</div><div class='add'>+	int g_err_irq, g_recc_irq;</div><div class='add'>+	bool fdmode = true;			/* CAN FD only mode - default */</div><div class='add'>+	char name[9] = "channelX";</div><div class='add'>+	u32 ch, fcan_freq;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	info = of_device_get_match_data(dev);</div><div class='add'>+</div><div class='add'>+	if (of_property_read_bool(dev-&gt;of_node, "renesas,no-can-fd"))</div><div class='add'>+		fdmode = false;			/* Classical CAN only mode */</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; info-&gt;max_channels; ++i) {</div><div class='add'>+		name[7] = '0' + i;</div><div class='add'>+		of_child = of_get_available_child_by_name(dev-&gt;of_node, name);</div><div class='add'>+		if (of_child) {</div><div class='add'>+			channels_mask |= BIT(i);</div><div class='add'>+			transceivers[i] = devm_of_phy_optional_get(dev,</div><div class='add'>+							of_child, NULL);</div><div class='add'>+			of_node_put(of_child);</div><div class='add'>+		}</div><div class='add'>+		if (IS_ERR(transceivers[i]))</div><div class='add'>+			return PTR_ERR(transceivers[i]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (info-&gt;shared_global_irqs) {</div><div class='add'>+		ch_irq = platform_get_irq_byname_optional(pdev, "ch_int");</div><div class='add'>+		if (ch_irq &lt; 0) {</div><div class='add'>+			/* For backward compatibility get irq by index */</div><div class='add'>+			ch_irq = platform_get_irq(pdev, 0);</div><div class='add'>+			if (ch_irq &lt; 0)</div><div class='add'>+				return ch_irq;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		g_irq = platform_get_irq_byname_optional(pdev, "g_int");</div><div class='add'>+		if (g_irq &lt; 0) {</div><div class='add'>+			/* For backward compatibility get irq by index */</div><div class='add'>+			g_irq = platform_get_irq(pdev, 1);</div><div class='add'>+			if (g_irq &lt; 0)</div><div class='add'>+				return g_irq;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		g_err_irq = platform_get_irq_byname(pdev, "g_err");</div><div class='add'>+		if (g_err_irq &lt; 0)</div><div class='add'>+			return g_err_irq;</div><div class='add'>+</div><div class='add'>+		g_recc_irq = platform_get_irq_byname(pdev, "g_recc");</div><div class='add'>+		if (g_recc_irq &lt; 0)</div><div class='add'>+			return g_recc_irq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Global controller context */</div><div class='add'>+	gpriv = devm_kzalloc(dev, sizeof(*gpriv), GFP_KERNEL);</div><div class='add'>+	if (!gpriv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	gpriv-&gt;pdev = pdev;</div><div class='add'>+	gpriv-&gt;channels_mask = channels_mask;</div><div class='add'>+	gpriv-&gt;fdmode = fdmode;</div><div class='add'>+	gpriv-&gt;info = info;</div><div class='add'>+</div><div class='add'>+	gpriv-&gt;rstc1 = devm_reset_control_get_optional_exclusive(dev, "rstp_n");</div><div class='add'>+	if (IS_ERR(gpriv-&gt;rstc1))</div><div class='add'>+		return dev_err_probe(dev, PTR_ERR(gpriv-&gt;rstc1),</div><div class='add'>+				     "failed to get rstp_n\n");</div><div class='add'>+</div><div class='add'>+	gpriv-&gt;rstc2 = devm_reset_control_get_optional_exclusive(dev, "rstc_n");</div><div class='add'>+	if (IS_ERR(gpriv-&gt;rstc2))</div><div class='add'>+		return dev_err_probe(dev, PTR_ERR(gpriv-&gt;rstc2),</div><div class='add'>+				     "failed to get rstc_n\n");</div><div class='add'>+</div><div class='add'>+	/* Peripheral clock */</div><div class='add'>+	gpriv-&gt;clkp = devm_clk_get(dev, "fck");</div><div class='add'>+	if (IS_ERR(gpriv-&gt;clkp))</div><div class='add'>+		return dev_err_probe(dev, PTR_ERR(gpriv-&gt;clkp),</div><div class='add'>+				     "cannot get peripheral clock\n");</div><div class='add'>+</div><div class='add'>+	/* fCAN clock: Pick External clock. If not available fallback to</div><div class='add'>+	 * CANFD clock</div><div class='add'>+	 */</div><div class='add'>+	gpriv-&gt;can_clk = devm_clk_get(dev, "can_clk");</div><div class='add'>+	if (IS_ERR(gpriv-&gt;can_clk) || (clk_get_rate(gpriv-&gt;can_clk) == 0)) {</div><div class='add'>+		gpriv-&gt;can_clk = devm_clk_get(dev, "canfd");</div><div class='add'>+		if (IS_ERR(gpriv-&gt;can_clk))</div><div class='add'>+			return dev_err_probe(dev, PTR_ERR(gpriv-&gt;can_clk),</div><div class='add'>+					     "cannot get canfd clock\n");</div><div class='add'>+</div><div class='add'>+		/* CANFD clock may be further divided within the IP */</div><div class='add'>+		fcan_freq = clk_get_rate(gpriv-&gt;can_clk) / info-&gt;postdiv;</div><div class='add'>+	} else {</div><div class='add'>+		fcan_freq = clk_get_rate(gpriv-&gt;can_clk);</div><div class='add'>+		gpriv-&gt;extclk = gpriv-&gt;info-&gt;external_clk;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	gpriv-&gt;clk_ram = devm_clk_get_optional(dev, "ram_clk");</div><div class='add'>+	if (IS_ERR(gpriv-&gt;clk_ram))</div><div class='add'>+		return dev_err_probe(dev, PTR_ERR(gpriv-&gt;clk_ram),</div><div class='add'>+				     "cannot get ram clock\n");</div><div class='add'>+</div><div class='add'>+	addr = devm_platform_ioremap_resource(pdev, 0);</div><div class='add'>+	if (IS_ERR(addr)) {</div><div class='add'>+		err = PTR_ERR(addr);</div><div class='add'>+		goto fail_dev;</div><div class='add'>+	}</div><div class='add'>+	gpriv-&gt;base = addr;</div><div class='add'>+	gpriv-&gt;fcbase = addr + gpriv-&gt;info-&gt;regs-&gt;coffset;</div><div class='add'>+</div><div class='add'>+	/* Request IRQ that's common for both channels */</div><div class='add'>+	if (info-&gt;shared_global_irqs) {</div><div class='add'>+		err = devm_request_irq(dev, ch_irq,</div><div class='add'>+				       rcar_canfd_channel_interrupt, 0,</div><div class='add'>+				       "canfd.ch_int", gpriv);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(dev, "devm_request_irq %d failed: %pe\n",</div><div class='add'>+				ch_irq, ERR_PTR(err));</div><div class='add'>+			goto fail_dev;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = devm_request_irq(dev, g_irq, rcar_canfd_global_interrupt,</div><div class='add'>+				       0, "canfd.g_int", gpriv);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(dev, "devm_request_irq %d failed: %pe\n",</div><div class='add'>+				g_irq, ERR_PTR(err));</div><div class='add'>+			goto fail_dev;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		err = devm_request_irq(dev, g_recc_irq,</div><div class='add'>+				       rcar_canfd_global_receive_fifo_interrupt, 0,</div><div class='add'>+				       "canfd.g_recc", gpriv);</div><div class='add'>+</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(dev, "devm_request_irq %d failed: %pe\n",</div><div class='add'>+				g_recc_irq, ERR_PTR(err));</div><div class='add'>+			goto fail_dev;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = devm_request_irq(dev, g_err_irq,</div><div class='add'>+				       rcar_canfd_global_err_interrupt, 0,</div><div class='add'>+				       "canfd.g_err", gpriv);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(dev, "devm_request_irq %d failed: %pe\n",</div><div class='add'>+				g_err_irq, ERR_PTR(err));</div><div class='add'>+			goto fail_dev;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = rcar_canfd_global_init(gpriv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto fail_mode;</div><div class='add'>+</div><div class='add'>+	for_each_set_bit(ch, &amp;gpriv-&gt;channels_mask, info-&gt;max_channels) {</div><div class='add'>+		err = rcar_canfd_channel_probe(gpriv, ch, fcan_freq,</div><div class='add'>+					       transceivers[ch]);</div><div class='add'>+		if (err)</div><div class='add'>+			goto fail_channel;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, gpriv);</div><div class='add'>+	dev_info(dev, "global operational state (%s clk, %s mode)\n",</div><div class='add'>+		 gpriv-&gt;extclk ? "ext" : "canfd",</div><div class='add'>+		 gpriv-&gt;fdmode ? "fd" : "classical");</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+fail_channel:</div><div class='add'>+	for_each_set_bit(ch, &amp;gpriv-&gt;channels_mask, info-&gt;max_channels)</div><div class='add'>+		rcar_canfd_channel_remove(gpriv, ch);</div><div class='add'>+fail_mode:</div><div class='add'>+	rcar_canfd_global_deinit(gpriv, false);</div><div class='add'>+fail_dev:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rcar_canfd_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct rcar_canfd_global *gpriv = platform_get_drvdata(pdev);</div><div class='add'>+	u32 ch;</div><div class='add'>+</div><div class='add'>+	for_each_set_bit(ch, &amp;gpriv-&gt;channels_mask, gpriv-&gt;info-&gt;max_channels) {</div><div class='add'>+		rcar_canfd_disable_channel_interrupts(gpriv-&gt;ch[ch]);</div><div class='add'>+		rcar_canfd_channel_remove(gpriv, ch);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rcar_canfd_global_deinit(gpriv, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rcar_canfd_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct rcar_canfd_global *gpriv = dev_get_drvdata(dev);</div><div class='add'>+	int err;</div><div class='add'>+	u32 ch;</div><div class='add'>+</div><div class='add'>+	for_each_set_bit(ch, &amp;gpriv-&gt;channels_mask, gpriv-&gt;info-&gt;max_channels) {</div><div class='add'>+		struct rcar_canfd_channel *priv = gpriv-&gt;ch[ch];</div><div class='add'>+		struct net_device *ndev = priv-&gt;ndev;</div><div class='add'>+</div><div class='add'>+		if (!netif_running(ndev))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		netif_device_detach(ndev);</div><div class='add'>+</div><div class='add'>+		err = rcar_canfd_close(ndev);</div><div class='add'>+		if (err) {</div><div class='add'>+			netdev_err(ndev, "rcar_canfd_close() failed %pe\n",</div><div class='add'>+				   ERR_PTR(err));</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		priv-&gt;can.state = CAN_STATE_SLEEPING;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* TODO Skip if wake-up (which is not yet supported) is enabled */</div><div class='add'>+	rcar_canfd_global_deinit(gpriv, false);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rcar_canfd_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct rcar_canfd_global *gpriv = dev_get_drvdata(dev);</div><div class='add'>+	int err;</div><div class='add'>+	u32 ch;</div><div class='add'>+</div><div class='add'>+	err = rcar_canfd_global_init(gpriv);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "rcar_canfd_global_init() failed %pe\n", ERR_PTR(err));</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for_each_set_bit(ch, &amp;gpriv-&gt;channels_mask, gpriv-&gt;info-&gt;max_channels) {</div><div class='add'>+		struct rcar_canfd_channel *priv = gpriv-&gt;ch[ch];</div><div class='add'>+		struct net_device *ndev = priv-&gt;ndev;</div><div class='add'>+</div><div class='add'>+		if (!netif_running(ndev))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		err = rcar_canfd_open(ndev);</div><div class='add'>+		if (err) {</div><div class='add'>+			netdev_err(ndev, "rcar_canfd_open() failed %pe\n",</div><div class='add'>+				   ERR_PTR(err));</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		netif_device_attach(ndev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static DEFINE_SIMPLE_DEV_PM_OPS(rcar_canfd_pm_ops, rcar_canfd_suspend,</div><div class='add'>+				rcar_canfd_resume);</div><div class='add'>+</div><div class='add'>+static const __maybe_unused struct of_device_id rcar_canfd_of_table[] = {</div><div class='add'>+	{ .compatible = "renesas,r8a779a0-canfd", .data = &amp;rcar_gen4_hw_info },</div><div class='add'>+	{ .compatible = "renesas,r9a09g047-canfd", .data = &amp;r9a09g047_hw_info },</div><div class='add'>+	{ .compatible = "renesas,rcar-gen3-canfd", .data = &amp;rcar_gen3_hw_info },</div><div class='add'>+	{ .compatible = "renesas,rcar-gen4-canfd", .data = &amp;rcar_gen4_hw_info },</div><div class='add'>+	{ .compatible = "renesas,rzg2l-canfd", .data = &amp;rzg2l_hw_info },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+MODULE_DEVICE_TABLE(of, rcar_canfd_of_table);</div><div class='add'>+</div><div class='add'>+static struct platform_driver rcar_canfd_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = RCANFD_DRV_NAME,</div><div class='add'>+		.of_match_table = of_match_ptr(rcar_canfd_of_table),</div><div class='add'>+		.pm = pm_sleep_ptr(&amp;rcar_canfd_pm_ops),</div><div class='add'>+	},</div><div class='add'>+	.probe = rcar_canfd_probe,</div><div class='add'>+	.remove = rcar_canfd_remove,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_platform_driver(rcar_canfd_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Ramesh Shanmugasundaram &lt;ramesh.shanmugasundaram@bp.renesas.com&gt;");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_DESCRIPTION("CAN FD driver for Renesas R-Car SoC");</div><div class='add'>+MODULE_ALIAS("platform:" RCANFD_DRV_NAME);</div><div class='head'>diff --git a/drivers/net/can/rcar_can.c b/drivers/net/can/rcar_can.c<br/>deleted file mode 100644<br/>index 7bd54191f962..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/rcar_can.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/rcar_can.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,927 +0,0 @@</div><div class='del'>-/* Renesas R-Car CAN device driver</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2013 Cogent Embedded, Inc. &lt;source@cogentembedded.com&gt;</div><div class='del'>- * Copyright (C) 2013 Renesas Solutions Corp.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute  it and/or modify it</div><div class='del'>- * under  the terms of  the GNU General  Public License as published by the</div><div class='del'>- * Free Software Foundation;  either version 2 of the  License, or (at your</div><div class='del'>- * option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/can/led.h&gt;</div><div class='del'>-#include &lt;linux/can/dev.h&gt;</div><div class='del'>-#include &lt;linux/clk.h&gt;</div><div class='del'>-#include &lt;linux/can/platform/rcar_can.h&gt;</div><div class='del'>-#include &lt;linux/of.h&gt;</div><div class='del'>-</div><div class='del'>-#define RCAR_CAN_DRV_NAME	"rcar_can"</div><div class='del'>-</div><div class='del'>-/* Mailbox configuration:</div><div class='del'>- * mailbox 60 - 63 - Rx FIFO mailboxes</div><div class='del'>- * mailbox 56 - 59 - Tx FIFO mailboxes</div><div class='del'>- * non-FIFO mailboxes are not used</div><div class='del'>- */</div><div class='del'>-#define RCAR_CAN_N_MBX		64 /* Number of mailboxes in non-FIFO mode */</div><div class='del'>-#define RCAR_CAN_RX_FIFO_MBX	60 /* Mailbox - window to Rx FIFO */</div><div class='del'>-#define RCAR_CAN_TX_FIFO_MBX	56 /* Mailbox - window to Tx FIFO */</div><div class='del'>-#define RCAR_CAN_FIFO_DEPTH	4</div><div class='del'>-</div><div class='del'>-/* Mailbox registers structure */</div><div class='del'>-struct rcar_can_mbox_regs {</div><div class='del'>-	u32 id;		/* IDE and RTR bits, SID and EID */</div><div class='del'>-	u8 stub;	/* Not used */</div><div class='del'>-	u8 dlc;		/* Data Length Code - bits [0..3] */</div><div class='del'>-	u8 data[8];	/* Data Bytes */</div><div class='del'>-	u8 tsh;		/* Time Stamp Higher Byte */</div><div class='del'>-	u8 tsl;		/* Time Stamp Lower Byte */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct rcar_can_regs {</div><div class='del'>-	struct rcar_can_mbox_regs mb[RCAR_CAN_N_MBX]; /* Mailbox registers */</div><div class='del'>-	u32 mkr_2_9[8];	/* Mask Registers 2-9 */</div><div class='del'>-	u32 fidcr[2];	/* FIFO Received ID Compare Register */</div><div class='del'>-	u32 mkivlr1;	/* Mask Invalid Register 1 */</div><div class='del'>-	u32 mier1;	/* Mailbox Interrupt Enable Register 1 */</div><div class='del'>-	u32 mkr_0_1[2];	/* Mask Registers 0-1 */</div><div class='del'>-	u32 mkivlr0;    /* Mask Invalid Register 0*/</div><div class='del'>-	u32 mier0;      /* Mailbox Interrupt Enable Register 0 */</div><div class='del'>-	u8 pad_440[0x3c0];</div><div class='del'>-	u8 mctl[64];	/* Message Control Registers */</div><div class='del'>-	u16 ctlr;	/* Control Register */</div><div class='del'>-	u16 str;	/* Status register */</div><div class='del'>-	u8 bcr[3];	/* Bit Configuration Register */</div><div class='del'>-	u8 clkr;	/* Clock Select Register */</div><div class='del'>-	u8 rfcr;	/* Receive FIFO Control Register */</div><div class='del'>-	u8 rfpcr;	/* Receive FIFO Pointer Control Register */</div><div class='del'>-	u8 tfcr;	/* Transmit FIFO Control Register */</div><div class='del'>-	u8 tfpcr;       /* Transmit FIFO Pointer Control Register */</div><div class='del'>-	u8 eier;	/* Error Interrupt Enable Register */</div><div class='del'>-	u8 eifr;	/* Error Interrupt Factor Judge Register */</div><div class='del'>-	u8 recr;	/* Receive Error Count Register */</div><div class='del'>-	u8 tecr;        /* Transmit Error Count Register */</div><div class='del'>-	u8 ecsr;	/* Error Code Store Register */</div><div class='del'>-	u8 cssr;	/* Channel Search Support Register */</div><div class='del'>-	u8 mssr;	/* Mailbox Search Status Register */</div><div class='del'>-	u8 msmr;	/* Mailbox Search Mode Register */</div><div class='del'>-	u16 tsr;	/* Time Stamp Register */</div><div class='del'>-	u8 afsr;	/* Acceptance Filter Support Register */</div><div class='del'>-	u8 pad_857;</div><div class='del'>-	u8 tcr;		/* Test Control Register */</div><div class='del'>-	u8 pad_859[7];</div><div class='del'>-	u8 ier;		/* Interrupt Enable Register */</div><div class='del'>-	u8 isr;		/* Interrupt Status Register */</div><div class='del'>-	u8 pad_862;</div><div class='del'>-	u8 mbsmr;	/* Mailbox Search Mask Register */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct rcar_can_priv {</div><div class='del'>-	struct can_priv can;	/* Must be the first member! */</div><div class='del'>-	struct net_device *ndev;</div><div class='del'>-	struct napi_struct napi;</div><div class='del'>-	struct rcar_can_regs __iomem *regs;</div><div class='del'>-	struct clk *clk;</div><div class='del'>-	struct clk *can_clk;</div><div class='del'>-	u8 tx_dlc[RCAR_CAN_FIFO_DEPTH];</div><div class='del'>-	u32 tx_head;</div><div class='del'>-	u32 tx_tail;</div><div class='del'>-	u8 clock_select;</div><div class='del'>-	u8 ier;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct can_bittiming_const rcar_can_bittiming_const = {</div><div class='del'>-	.name = RCAR_CAN_DRV_NAME,</div><div class='del'>-	.tseg1_min = 4,</div><div class='del'>-	.tseg1_max = 16,</div><div class='del'>-	.tseg2_min = 2,</div><div class='del'>-	.tseg2_max = 8,</div><div class='del'>-	.sjw_max = 4,</div><div class='del'>-	.brp_min = 1,</div><div class='del'>-	.brp_max = 1024,</div><div class='del'>-	.brp_inc = 1,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Control Register bits */</div><div class='del'>-#define RCAR_CAN_CTLR_BOM	(3 &lt;&lt; 11) /* Bus-Off Recovery Mode Bits */</div><div class='del'>-#define RCAR_CAN_CTLR_BOM_ENT	(1 &lt;&lt; 11) /* Entry to halt mode */</div><div class='del'>-					/* at bus-off entry */</div><div class='del'>-#define RCAR_CAN_CTLR_SLPM	(1 &lt;&lt; 10)</div><div class='del'>-#define RCAR_CAN_CTLR_CANM	(3 &lt;&lt; 8) /* Operating Mode Select Bit */</div><div class='del'>-#define RCAR_CAN_CTLR_CANM_HALT	(1 &lt;&lt; 9)</div><div class='del'>-#define RCAR_CAN_CTLR_CANM_RESET (1 &lt;&lt; 8)</div><div class='del'>-#define RCAR_CAN_CTLR_CANM_FORCE_RESET (3 &lt;&lt; 8)</div><div class='del'>-#define RCAR_CAN_CTLR_MLM	(1 &lt;&lt; 3) /* Message Lost Mode Select */</div><div class='del'>-#define RCAR_CAN_CTLR_IDFM	(3 &lt;&lt; 1) /* ID Format Mode Select Bits */</div><div class='del'>-#define RCAR_CAN_CTLR_IDFM_MIXED (1 &lt;&lt; 2) /* Mixed ID mode */</div><div class='del'>-#define RCAR_CAN_CTLR_MBM	(1 &lt;&lt; 0) /* Mailbox Mode select */</div><div class='del'>-</div><div class='del'>-/* Status Register bits */</div><div class='del'>-#define RCAR_CAN_STR_RSTST	(1 &lt;&lt; 8) /* Reset Status Bit */</div><div class='del'>-</div><div class='del'>-/* FIFO Received ID Compare Registers 0 and 1 bits */</div><div class='del'>-#define RCAR_CAN_FIDCR_IDE	(1 &lt;&lt; 31) /* ID Extension Bit */</div><div class='del'>-#define RCAR_CAN_FIDCR_RTR	(1 &lt;&lt; 30) /* Remote Transmission Request Bit */</div><div class='del'>-</div><div class='del'>-/* Receive FIFO Control Register bits */</div><div class='del'>-#define RCAR_CAN_RFCR_RFEST	(1 &lt;&lt; 7) /* Receive FIFO Empty Status Flag */</div><div class='del'>-#define RCAR_CAN_RFCR_RFE	(1 &lt;&lt; 0) /* Receive FIFO Enable */</div><div class='del'>-</div><div class='del'>-/* Transmit FIFO Control Register bits */</div><div class='del'>-#define RCAR_CAN_TFCR_TFUST	(7 &lt;&lt; 1) /* Transmit FIFO Unsent Message */</div><div class='del'>-					/* Number Status Bits */</div><div class='del'>-#define RCAR_CAN_TFCR_TFUST_SHIFT 1	/* Offset of Transmit FIFO Unsent */</div><div class='del'>-					/* Message Number Status Bits */</div><div class='del'>-#define RCAR_CAN_TFCR_TFE	(1 &lt;&lt; 0) /* Transmit FIFO Enable */</div><div class='del'>-</div><div class='del'>-#define RCAR_CAN_N_RX_MKREGS1	2	/* Number of mask registers */</div><div class='del'>-					/* for Rx mailboxes 0-31 */</div><div class='del'>-#define RCAR_CAN_N_RX_MKREGS2	8</div><div class='del'>-</div><div class='del'>-/* Bit Configuration Register settings */</div><div class='del'>-#define RCAR_CAN_BCR_TSEG1(x)	(((x) &amp; 0x0f) &lt;&lt; 20)</div><div class='del'>-#define RCAR_CAN_BCR_BPR(x)	(((x) &amp; 0x3ff) &lt;&lt; 8)</div><div class='del'>-#define RCAR_CAN_BCR_SJW(x)	(((x) &amp; 0x3) &lt;&lt; 4)</div><div class='del'>-#define RCAR_CAN_BCR_TSEG2(x)	((x) &amp; 0x07)</div><div class='del'>-</div><div class='del'>-/* Mailbox and Mask Registers bits */</div><div class='del'>-#define RCAR_CAN_IDE		(1 &lt;&lt; 31)</div><div class='del'>-#define RCAR_CAN_RTR		(1 &lt;&lt; 30)</div><div class='del'>-#define RCAR_CAN_SID_SHIFT	18</div><div class='del'>-</div><div class='del'>-/* Mailbox Interrupt Enable Register 1 bits */</div><div class='del'>-#define RCAR_CAN_MIER1_RXFIE	(1 &lt;&lt; 28) /* Receive  FIFO Interrupt Enable */</div><div class='del'>-#define RCAR_CAN_MIER1_TXFIE	(1 &lt;&lt; 24) /* Transmit FIFO Interrupt Enable */</div><div class='del'>-</div><div class='del'>-/* Interrupt Enable Register bits */</div><div class='del'>-#define RCAR_CAN_IER_ERSIE	(1 &lt;&lt; 5) /* Error (ERS) Interrupt Enable Bit */</div><div class='del'>-#define RCAR_CAN_IER_RXFIE	(1 &lt;&lt; 4) /* Reception FIFO Interrupt */</div><div class='del'>-					/* Enable Bit */</div><div class='del'>-#define RCAR_CAN_IER_TXFIE	(1 &lt;&lt; 3) /* Transmission FIFO Interrupt */</div><div class='del'>-					/* Enable Bit */</div><div class='del'>-/* Interrupt Status Register bits */</div><div class='del'>-#define RCAR_CAN_ISR_ERSF	(1 &lt;&lt; 5) /* Error (ERS) Interrupt Status Bit */</div><div class='del'>-#define RCAR_CAN_ISR_RXFF	(1 &lt;&lt; 4) /* Reception FIFO Interrupt */</div><div class='del'>-					/* Status Bit */</div><div class='del'>-#define RCAR_CAN_ISR_TXFF	(1 &lt;&lt; 3) /* Transmission FIFO Interrupt */</div><div class='del'>-					/* Status Bit */</div><div class='del'>-</div><div class='del'>-/* Error Interrupt Enable Register bits */</div><div class='del'>-#define RCAR_CAN_EIER_BLIE	(1 &lt;&lt; 7) /* Bus Lock Interrupt Enable */</div><div class='del'>-#define RCAR_CAN_EIER_OLIE	(1 &lt;&lt; 6) /* Overload Frame Transmit */</div><div class='del'>-					/* Interrupt Enable */</div><div class='del'>-#define RCAR_CAN_EIER_ORIE	(1 &lt;&lt; 5) /* Receive Overrun  Interrupt Enable */</div><div class='del'>-#define RCAR_CAN_EIER_BORIE	(1 &lt;&lt; 4) /* Bus-Off Recovery Interrupt Enable */</div><div class='del'>-#define RCAR_CAN_EIER_BOEIE	(1 &lt;&lt; 3) /* Bus-Off Entry Interrupt Enable */</div><div class='del'>-#define RCAR_CAN_EIER_EPIE	(1 &lt;&lt; 2) /* Error Passive Interrupt Enable */</div><div class='del'>-#define RCAR_CAN_EIER_EWIE	(1 &lt;&lt; 1) /* Error Warning Interrupt Enable */</div><div class='del'>-#define RCAR_CAN_EIER_BEIE	(1 &lt;&lt; 0) /* Bus Error Interrupt Enable */</div><div class='del'>-</div><div class='del'>-/* Error Interrupt Factor Judge Register bits */</div><div class='del'>-#define RCAR_CAN_EIFR_BLIF	(1 &lt;&lt; 7) /* Bus Lock Detect Flag */</div><div class='del'>-#define RCAR_CAN_EIFR_OLIF	(1 &lt;&lt; 6) /* Overload Frame Transmission */</div><div class='del'>-					 /* Detect Flag */</div><div class='del'>-#define RCAR_CAN_EIFR_ORIF	(1 &lt;&lt; 5) /* Receive Overrun Detect Flag */</div><div class='del'>-#define RCAR_CAN_EIFR_BORIF	(1 &lt;&lt; 4) /* Bus-Off Recovery Detect Flag */</div><div class='del'>-#define RCAR_CAN_EIFR_BOEIF	(1 &lt;&lt; 3) /* Bus-Off Entry Detect Flag */</div><div class='del'>-#define RCAR_CAN_EIFR_EPIF	(1 &lt;&lt; 2) /* Error Passive Detect Flag */</div><div class='del'>-#define RCAR_CAN_EIFR_EWIF	(1 &lt;&lt; 1) /* Error Warning Detect Flag */</div><div class='del'>-#define RCAR_CAN_EIFR_BEIF	(1 &lt;&lt; 0) /* Bus Error Detect Flag */</div><div class='del'>-</div><div class='del'>-/* Error Code Store Register bits */</div><div class='del'>-#define RCAR_CAN_ECSR_EDPM	(1 &lt;&lt; 7) /* Error Display Mode Select Bit */</div><div class='del'>-#define RCAR_CAN_ECSR_ADEF	(1 &lt;&lt; 6) /* ACK Delimiter Error Flag */</div><div class='del'>-#define RCAR_CAN_ECSR_BE0F	(1 &lt;&lt; 5) /* Bit Error (dominant) Flag */</div><div class='del'>-#define RCAR_CAN_ECSR_BE1F	(1 &lt;&lt; 4) /* Bit Error (recessive) Flag */</div><div class='del'>-#define RCAR_CAN_ECSR_CEF	(1 &lt;&lt; 3) /* CRC Error Flag */</div><div class='del'>-#define RCAR_CAN_ECSR_AEF	(1 &lt;&lt; 2) /* ACK Error Flag */</div><div class='del'>-#define RCAR_CAN_ECSR_FEF	(1 &lt;&lt; 1) /* Form Error Flag */</div><div class='del'>-#define RCAR_CAN_ECSR_SEF	(1 &lt;&lt; 0) /* Stuff Error Flag */</div><div class='del'>-</div><div class='del'>-#define RCAR_CAN_NAPI_WEIGHT	4</div><div class='del'>-#define MAX_STR_READS		0x100</div><div class='del'>-</div><div class='del'>-static void tx_failure_cleanup(struct net_device *ndev)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; RCAR_CAN_FIFO_DEPTH; i++)</div><div class='del'>-		can_free_echo_skb(ndev, i);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void rcar_can_error(struct net_device *ndev)</div><div class='del'>-{</div><div class='del'>-	struct rcar_can_priv *priv = netdev_priv(ndev);</div><div class='del'>-	struct net_device_stats *stats = &amp;ndev-&gt;stats;</div><div class='del'>-	struct can_frame *cf;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	u8 eifr, txerr = 0, rxerr = 0;</div><div class='del'>-</div><div class='del'>-	/* Propagate the error condition to the CAN stack */</div><div class='del'>-	skb = alloc_can_err_skb(ndev, &amp;cf);</div><div class='del'>-</div><div class='del'>-	eifr = readb(&amp;priv-&gt;regs-&gt;eifr);</div><div class='del'>-	if (eifr &amp; (RCAR_CAN_EIFR_EWIF | RCAR_CAN_EIFR_EPIF)) {</div><div class='del'>-		txerr = readb(&amp;priv-&gt;regs-&gt;tecr);</div><div class='del'>-		rxerr = readb(&amp;priv-&gt;regs-&gt;recr);</div><div class='del'>-		if (skb) {</div><div class='del'>-			cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='del'>-			cf-&gt;data[6] = txerr;</div><div class='del'>-			cf-&gt;data[7] = rxerr;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	if (eifr &amp; RCAR_CAN_EIFR_BEIF) {</div><div class='del'>-		int rx_errors = 0, tx_errors = 0;</div><div class='del'>-		u8 ecsr;</div><div class='del'>-</div><div class='del'>-		netdev_dbg(priv-&gt;ndev, "Bus error interrupt:\n");</div><div class='del'>-		if (skb) {</div><div class='del'>-			cf-&gt;can_id |= CAN_ERR_BUSERROR | CAN_ERR_PROT;</div><div class='del'>-			cf-&gt;data[2] = CAN_ERR_PROT_UNSPEC;</div><div class='del'>-		}</div><div class='del'>-		ecsr = readb(&amp;priv-&gt;regs-&gt;ecsr);</div><div class='del'>-		if (ecsr &amp; RCAR_CAN_ECSR_ADEF) {</div><div class='del'>-			netdev_dbg(priv-&gt;ndev, "ACK Delimiter Error\n");</div><div class='del'>-			tx_errors++;</div><div class='del'>-			writeb(~RCAR_CAN_ECSR_ADEF, &amp;priv-&gt;regs-&gt;ecsr);</div><div class='del'>-			if (skb)</div><div class='del'>-				cf-&gt;data[3] |= CAN_ERR_PROT_LOC_ACK_DEL;</div><div class='del'>-		}</div><div class='del'>-		if (ecsr &amp; RCAR_CAN_ECSR_BE0F) {</div><div class='del'>-			netdev_dbg(priv-&gt;ndev, "Bit Error (dominant)\n");</div><div class='del'>-			tx_errors++;</div><div class='del'>-			writeb(~RCAR_CAN_ECSR_BE0F, &amp;priv-&gt;regs-&gt;ecsr);</div><div class='del'>-			if (skb)</div><div class='del'>-				cf-&gt;data[2] |= CAN_ERR_PROT_BIT0;</div><div class='del'>-		}</div><div class='del'>-		if (ecsr &amp; RCAR_CAN_ECSR_BE1F) {</div><div class='del'>-			netdev_dbg(priv-&gt;ndev, "Bit Error (recessive)\n");</div><div class='del'>-			tx_errors++;</div><div class='del'>-			writeb(~RCAR_CAN_ECSR_BE1F, &amp;priv-&gt;regs-&gt;ecsr);</div><div class='del'>-			if (skb)</div><div class='del'>-				cf-&gt;data[2] |= CAN_ERR_PROT_BIT1;</div><div class='del'>-		}</div><div class='del'>-		if (ecsr &amp; RCAR_CAN_ECSR_CEF) {</div><div class='del'>-			netdev_dbg(priv-&gt;ndev, "CRC Error\n");</div><div class='del'>-			rx_errors++;</div><div class='del'>-			writeb(~RCAR_CAN_ECSR_CEF, &amp;priv-&gt;regs-&gt;ecsr);</div><div class='del'>-			if (skb)</div><div class='del'>-				cf-&gt;data[3] |= CAN_ERR_PROT_LOC_CRC_SEQ;</div><div class='del'>-		}</div><div class='del'>-		if (ecsr &amp; RCAR_CAN_ECSR_AEF) {</div><div class='del'>-			netdev_dbg(priv-&gt;ndev, "ACK Error\n");</div><div class='del'>-			tx_errors++;</div><div class='del'>-			writeb(~RCAR_CAN_ECSR_AEF, &amp;priv-&gt;regs-&gt;ecsr);</div><div class='del'>-			if (skb) {</div><div class='del'>-				cf-&gt;can_id |= CAN_ERR_ACK;</div><div class='del'>-				cf-&gt;data[3] |= CAN_ERR_PROT_LOC_ACK;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		if (ecsr &amp; RCAR_CAN_ECSR_FEF) {</div><div class='del'>-			netdev_dbg(priv-&gt;ndev, "Form Error\n");</div><div class='del'>-			rx_errors++;</div><div class='del'>-			writeb(~RCAR_CAN_ECSR_FEF, &amp;priv-&gt;regs-&gt;ecsr);</div><div class='del'>-			if (skb)</div><div class='del'>-				cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='del'>-		}</div><div class='del'>-		if (ecsr &amp; RCAR_CAN_ECSR_SEF) {</div><div class='del'>-			netdev_dbg(priv-&gt;ndev, "Stuff Error\n");</div><div class='del'>-			rx_errors++;</div><div class='del'>-			writeb(~RCAR_CAN_ECSR_SEF, &amp;priv-&gt;regs-&gt;ecsr);</div><div class='del'>-			if (skb)</div><div class='del'>-				cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		priv-&gt;can.can_stats.bus_error++;</div><div class='del'>-		ndev-&gt;stats.rx_errors += rx_errors;</div><div class='del'>-		ndev-&gt;stats.tx_errors += tx_errors;</div><div class='del'>-		writeb(~RCAR_CAN_EIFR_BEIF, &amp;priv-&gt;regs-&gt;eifr);</div><div class='del'>-	}</div><div class='del'>-	if (eifr &amp; RCAR_CAN_EIFR_EWIF) {</div><div class='del'>-		netdev_dbg(priv-&gt;ndev, "Error warning interrupt\n");</div><div class='del'>-		priv-&gt;can.state = CAN_STATE_ERROR_WARNING;</div><div class='del'>-		priv-&gt;can.can_stats.error_warning++;</div><div class='del'>-		/* Clear interrupt condition */</div><div class='del'>-		writeb(~RCAR_CAN_EIFR_EWIF, &amp;priv-&gt;regs-&gt;eifr);</div><div class='del'>-		if (skb)</div><div class='del'>-			cf-&gt;data[1] = txerr &gt; rxerr ? CAN_ERR_CRTL_TX_WARNING :</div><div class='del'>-					      CAN_ERR_CRTL_RX_WARNING;</div><div class='del'>-	}</div><div class='del'>-	if (eifr &amp; RCAR_CAN_EIFR_EPIF) {</div><div class='del'>-		netdev_dbg(priv-&gt;ndev, "Error passive interrupt\n");</div><div class='del'>-		priv-&gt;can.state = CAN_STATE_ERROR_PASSIVE;</div><div class='del'>-		priv-&gt;can.can_stats.error_passive++;</div><div class='del'>-		/* Clear interrupt condition */</div><div class='del'>-		writeb(~RCAR_CAN_EIFR_EPIF, &amp;priv-&gt;regs-&gt;eifr);</div><div class='del'>-		if (skb)</div><div class='del'>-			cf-&gt;data[1] = txerr &gt; rxerr ? CAN_ERR_CRTL_TX_PASSIVE :</div><div class='del'>-					      CAN_ERR_CRTL_RX_PASSIVE;</div><div class='del'>-	}</div><div class='del'>-	if (eifr &amp; RCAR_CAN_EIFR_BOEIF) {</div><div class='del'>-		netdev_dbg(priv-&gt;ndev, "Bus-off entry interrupt\n");</div><div class='del'>-		tx_failure_cleanup(ndev);</div><div class='del'>-		priv-&gt;ier = RCAR_CAN_IER_ERSIE;</div><div class='del'>-		writeb(priv-&gt;ier, &amp;priv-&gt;regs-&gt;ier);</div><div class='del'>-		priv-&gt;can.state = CAN_STATE_BUS_OFF;</div><div class='del'>-		/* Clear interrupt condition */</div><div class='del'>-		writeb(~RCAR_CAN_EIFR_BOEIF, &amp;priv-&gt;regs-&gt;eifr);</div><div class='del'>-		priv-&gt;can.can_stats.bus_off++;</div><div class='del'>-		can_bus_off(ndev);</div><div class='del'>-		if (skb)</div><div class='del'>-			cf-&gt;can_id |= CAN_ERR_BUSOFF;</div><div class='del'>-	}</div><div class='del'>-	if (eifr &amp; RCAR_CAN_EIFR_ORIF) {</div><div class='del'>-		netdev_dbg(priv-&gt;ndev, "Receive overrun error interrupt\n");</div><div class='del'>-		ndev-&gt;stats.rx_over_errors++;</div><div class='del'>-		ndev-&gt;stats.rx_errors++;</div><div class='del'>-		writeb(~RCAR_CAN_EIFR_ORIF, &amp;priv-&gt;regs-&gt;eifr);</div><div class='del'>-		if (skb) {</div><div class='del'>-			cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='del'>-			cf-&gt;data[1] = CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	if (eifr &amp; RCAR_CAN_EIFR_OLIF) {</div><div class='del'>-		netdev_dbg(priv-&gt;ndev,</div><div class='del'>-			   "Overload Frame Transmission error interrupt\n");</div><div class='del'>-		ndev-&gt;stats.rx_over_errors++;</div><div class='del'>-		ndev-&gt;stats.rx_errors++;</div><div class='del'>-		writeb(~RCAR_CAN_EIFR_OLIF, &amp;priv-&gt;regs-&gt;eifr);</div><div class='del'>-		if (skb) {</div><div class='del'>-			cf-&gt;can_id |= CAN_ERR_PROT;</div><div class='del'>-			cf-&gt;data[2] |= CAN_ERR_PROT_OVERLOAD;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (skb) {</div><div class='del'>-		stats-&gt;rx_packets++;</div><div class='del'>-		stats-&gt;rx_bytes += cf-&gt;can_dlc;</div><div class='del'>-		netif_rx(skb);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void rcar_can_tx_done(struct net_device *ndev)</div><div class='del'>-{</div><div class='del'>-	struct rcar_can_priv *priv = netdev_priv(ndev);</div><div class='del'>-	struct net_device_stats *stats = &amp;ndev-&gt;stats;</div><div class='del'>-	u8 isr;</div><div class='del'>-</div><div class='del'>-	while (1) {</div><div class='del'>-		u8 unsent = readb(&amp;priv-&gt;regs-&gt;tfcr);</div><div class='del'>-</div><div class='del'>-		unsent = (unsent &amp; RCAR_CAN_TFCR_TFUST) &gt;&gt;</div><div class='del'>-			  RCAR_CAN_TFCR_TFUST_SHIFT;</div><div class='del'>-		if (priv-&gt;tx_head - priv-&gt;tx_tail &lt;= unsent)</div><div class='del'>-			break;</div><div class='del'>-		stats-&gt;tx_packets++;</div><div class='del'>-		stats-&gt;tx_bytes += priv-&gt;tx_dlc[priv-&gt;tx_tail %</div><div class='del'>-						RCAR_CAN_FIFO_DEPTH];</div><div class='del'>-		priv-&gt;tx_dlc[priv-&gt;tx_tail % RCAR_CAN_FIFO_DEPTH] = 0;</div><div class='del'>-		can_get_echo_skb(ndev, priv-&gt;tx_tail % RCAR_CAN_FIFO_DEPTH);</div><div class='del'>-		priv-&gt;tx_tail++;</div><div class='del'>-		netif_wake_queue(ndev);</div><div class='del'>-	}</div><div class='del'>-	/* Clear interrupt */</div><div class='del'>-	isr = readb(&amp;priv-&gt;regs-&gt;isr);</div><div class='del'>-	writeb(isr &amp; ~RCAR_CAN_ISR_TXFF, &amp;priv-&gt;regs-&gt;isr);</div><div class='del'>-	can_led_event(ndev, CAN_LED_EVENT_TX);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static irqreturn_t rcar_can_interrupt(int irq, void *dev_id)</div><div class='del'>-{</div><div class='del'>-	struct net_device *ndev = dev_id;</div><div class='del'>-	struct rcar_can_priv *priv = netdev_priv(ndev);</div><div class='del'>-	u8 isr;</div><div class='del'>-</div><div class='del'>-	isr = readb(&amp;priv-&gt;regs-&gt;isr);</div><div class='del'>-	if (!(isr &amp; priv-&gt;ier))</div><div class='del'>-		return IRQ_NONE;</div><div class='del'>-</div><div class='del'>-	if (isr &amp; RCAR_CAN_ISR_ERSF)</div><div class='del'>-		rcar_can_error(ndev);</div><div class='del'>-</div><div class='del'>-	if (isr &amp; RCAR_CAN_ISR_TXFF)</div><div class='del'>-		rcar_can_tx_done(ndev);</div><div class='del'>-</div><div class='del'>-	if (isr &amp; RCAR_CAN_ISR_RXFF) {</div><div class='del'>-		if (napi_schedule_prep(&amp;priv-&gt;napi)) {</div><div class='del'>-			/* Disable Rx FIFO interrupts */</div><div class='del'>-			priv-&gt;ier &amp;= ~RCAR_CAN_IER_RXFIE;</div><div class='del'>-			writeb(priv-&gt;ier, &amp;priv-&gt;regs-&gt;ier);</div><div class='del'>-			__napi_schedule(&amp;priv-&gt;napi);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void rcar_can_set_bittiming(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct rcar_can_priv *priv = netdev_priv(dev);</div><div class='del'>-	struct can_bittiming *bt = &amp;priv-&gt;can.bittiming;</div><div class='del'>-	u32 bcr;</div><div class='del'>-</div><div class='del'>-	bcr = RCAR_CAN_BCR_TSEG1(bt-&gt;phase_seg1 + bt-&gt;prop_seg - 1) |</div><div class='del'>-	      RCAR_CAN_BCR_BPR(bt-&gt;brp - 1) | RCAR_CAN_BCR_SJW(bt-&gt;sjw - 1) |</div><div class='del'>-	      RCAR_CAN_BCR_TSEG2(bt-&gt;phase_seg2 - 1);</div><div class='del'>-	/* Don't overwrite CLKR with 32-bit BCR access; CLKR has 8-bit access.</div><div class='del'>-	 * All the registers are big-endian but they get byte-swapped on 32-bit</div><div class='del'>-	 * read/write (but not on 8-bit, contrary to the manuals)...</div><div class='del'>-	 */</div><div class='del'>-	writel((bcr &lt;&lt; 8) | priv-&gt;clock_select, &amp;priv-&gt;regs-&gt;bcr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void rcar_can_start(struct net_device *ndev)</div><div class='del'>-{</div><div class='del'>-	struct rcar_can_priv *priv = netdev_priv(ndev);</div><div class='del'>-	u16 ctlr;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* Set controller to known mode:</div><div class='del'>-	 * - FIFO mailbox mode</div><div class='del'>-	 * - accept all messages</div><div class='del'>-	 * - overrun mode</div><div class='del'>-	 * CAN is in sleep mode after MCU hardware or software reset.</div><div class='del'>-	 */</div><div class='del'>-	ctlr = readw(&amp;priv-&gt;regs-&gt;ctlr);</div><div class='del'>-	ctlr &amp;= ~RCAR_CAN_CTLR_SLPM;</div><div class='del'>-	writew(ctlr, &amp;priv-&gt;regs-&gt;ctlr);</div><div class='del'>-	/* Go to reset mode */</div><div class='del'>-	ctlr |= RCAR_CAN_CTLR_CANM_FORCE_RESET;</div><div class='del'>-	writew(ctlr, &amp;priv-&gt;regs-&gt;ctlr);</div><div class='del'>-	for (i = 0; i &lt; MAX_STR_READS; i++) {</div><div class='del'>-		if (readw(&amp;priv-&gt;regs-&gt;str) &amp; RCAR_CAN_STR_RSTST)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-	rcar_can_set_bittiming(ndev);</div><div class='del'>-	ctlr |= RCAR_CAN_CTLR_IDFM_MIXED; /* Select mixed ID mode */</div><div class='del'>-	ctlr |= RCAR_CAN_CTLR_BOM_ENT;	/* Entry to halt mode automatically */</div><div class='del'>-					/* at bus-off */</div><div class='del'>-	ctlr |= RCAR_CAN_CTLR_MBM;	/* Select FIFO mailbox mode */</div><div class='del'>-	ctlr |= RCAR_CAN_CTLR_MLM;	/* Overrun mode */</div><div class='del'>-	writew(ctlr, &amp;priv-&gt;regs-&gt;ctlr);</div><div class='del'>-</div><div class='del'>-	/* Accept all SID and EID */</div><div class='del'>-	writel(0, &amp;priv-&gt;regs-&gt;mkr_2_9[6]);</div><div class='del'>-	writel(0, &amp;priv-&gt;regs-&gt;mkr_2_9[7]);</div><div class='del'>-	/* In FIFO mailbox mode, write "0" to bits 24 to 31 */</div><div class='del'>-	writel(0, &amp;priv-&gt;regs-&gt;mkivlr1);</div><div class='del'>-	/* Accept all frames */</div><div class='del'>-	writel(0, &amp;priv-&gt;regs-&gt;fidcr[0]);</div><div class='del'>-	writel(RCAR_CAN_FIDCR_IDE | RCAR_CAN_FIDCR_RTR, &amp;priv-&gt;regs-&gt;fidcr[1]);</div><div class='del'>-	/* Enable and configure FIFO mailbox interrupts */</div><div class='del'>-	writel(RCAR_CAN_MIER1_RXFIE | RCAR_CAN_MIER1_TXFIE, &amp;priv-&gt;regs-&gt;mier1);</div><div class='del'>-</div><div class='del'>-	priv-&gt;ier = RCAR_CAN_IER_ERSIE | RCAR_CAN_IER_RXFIE |</div><div class='del'>-		    RCAR_CAN_IER_TXFIE;</div><div class='del'>-	writeb(priv-&gt;ier, &amp;priv-&gt;regs-&gt;ier);</div><div class='del'>-</div><div class='del'>-	/* Accumulate error codes */</div><div class='del'>-	writeb(RCAR_CAN_ECSR_EDPM, &amp;priv-&gt;regs-&gt;ecsr);</div><div class='del'>-	/* Enable error interrupts */</div><div class='del'>-	writeb(RCAR_CAN_EIER_EWIE | RCAR_CAN_EIER_EPIE | RCAR_CAN_EIER_BOEIE |</div><div class='del'>-	       (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING ?</div><div class='del'>-	       RCAR_CAN_EIER_BEIE : 0) | RCAR_CAN_EIER_ORIE |</div><div class='del'>-	       RCAR_CAN_EIER_OLIE, &amp;priv-&gt;regs-&gt;eier);</div><div class='del'>-	priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='del'>-</div><div class='del'>-	/* Go to operation mode */</div><div class='del'>-	writew(ctlr &amp; ~RCAR_CAN_CTLR_CANM, &amp;priv-&gt;regs-&gt;ctlr);</div><div class='del'>-	for (i = 0; i &lt; MAX_STR_READS; i++) {</div><div class='del'>-		if (!(readw(&amp;priv-&gt;regs-&gt;str) &amp; RCAR_CAN_STR_RSTST))</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-	/* Enable Rx and Tx FIFO */</div><div class='del'>-	writeb(RCAR_CAN_RFCR_RFE, &amp;priv-&gt;regs-&gt;rfcr);</div><div class='del'>-	writeb(RCAR_CAN_TFCR_TFE, &amp;priv-&gt;regs-&gt;tfcr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rcar_can_open(struct net_device *ndev)</div><div class='del'>-{</div><div class='del'>-	struct rcar_can_priv *priv = netdev_priv(ndev);</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = clk_prepare_enable(priv-&gt;clk);</div><div class='del'>-	if (err) {</div><div class='del'>-		netdev_err(ndev,</div><div class='del'>-			   "failed to enable peripheral clock, error %d\n",</div><div class='del'>-			   err);</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-	err = clk_prepare_enable(priv-&gt;can_clk);</div><div class='del'>-	if (err) {</div><div class='del'>-		netdev_err(ndev, "failed to enable CAN clock, error %d\n",</div><div class='del'>-			   err);</div><div class='del'>-		goto out_clock;</div><div class='del'>-	}</div><div class='del'>-	err = open_candev(ndev);</div><div class='del'>-	if (err) {</div><div class='del'>-		netdev_err(ndev, "open_candev() failed, error %d\n", err);</div><div class='del'>-		goto out_can_clock;</div><div class='del'>-	}</div><div class='del'>-	napi_enable(&amp;priv-&gt;napi);</div><div class='del'>-	err = request_irq(ndev-&gt;irq, rcar_can_interrupt, 0, ndev-&gt;name, ndev);</div><div class='del'>-	if (err) {</div><div class='del'>-		netdev_err(ndev, "request_irq(%d) failed, error %d\n",</div><div class='del'>-			   ndev-&gt;irq, err);</div><div class='del'>-		goto out_close;</div><div class='del'>-	}</div><div class='del'>-	can_led_event(ndev, CAN_LED_EVENT_OPEN);</div><div class='del'>-	rcar_can_start(ndev);</div><div class='del'>-	netif_start_queue(ndev);</div><div class='del'>-	return 0;</div><div class='del'>-out_close:</div><div class='del'>-	napi_disable(&amp;priv-&gt;napi);</div><div class='del'>-	close_candev(ndev);</div><div class='del'>-out_can_clock:</div><div class='del'>-	clk_disable_unprepare(priv-&gt;can_clk);</div><div class='del'>-out_clock:</div><div class='del'>-	clk_disable_unprepare(priv-&gt;clk);</div><div class='del'>-out:</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void rcar_can_stop(struct net_device *ndev)</div><div class='del'>-{</div><div class='del'>-	struct rcar_can_priv *priv = netdev_priv(ndev);</div><div class='del'>-	u16 ctlr;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* Go to (force) reset mode */</div><div class='del'>-	ctlr = readw(&amp;priv-&gt;regs-&gt;ctlr);</div><div class='del'>-	ctlr |= RCAR_CAN_CTLR_CANM_FORCE_RESET;</div><div class='del'>-	writew(ctlr, &amp;priv-&gt;regs-&gt;ctlr);</div><div class='del'>-	for (i = 0; i &lt; MAX_STR_READS; i++) {</div><div class='del'>-		if (readw(&amp;priv-&gt;regs-&gt;str) &amp; RCAR_CAN_STR_RSTST)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-	writel(0, &amp;priv-&gt;regs-&gt;mier0);</div><div class='del'>-	writel(0, &amp;priv-&gt;regs-&gt;mier1);</div><div class='del'>-	writeb(0, &amp;priv-&gt;regs-&gt;ier);</div><div class='del'>-	writeb(0, &amp;priv-&gt;regs-&gt;eier);</div><div class='del'>-	/* Go to sleep mode */</div><div class='del'>-	ctlr |= RCAR_CAN_CTLR_SLPM;</div><div class='del'>-	writew(ctlr, &amp;priv-&gt;regs-&gt;ctlr);</div><div class='del'>-	priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rcar_can_close(struct net_device *ndev)</div><div class='del'>-{</div><div class='del'>-	struct rcar_can_priv *priv = netdev_priv(ndev);</div><div class='del'>-</div><div class='del'>-	netif_stop_queue(ndev);</div><div class='del'>-	rcar_can_stop(ndev);</div><div class='del'>-	free_irq(ndev-&gt;irq, ndev);</div><div class='del'>-	napi_disable(&amp;priv-&gt;napi);</div><div class='del'>-	clk_disable_unprepare(priv-&gt;can_clk);</div><div class='del'>-	clk_disable_unprepare(priv-&gt;clk);</div><div class='del'>-	close_candev(ndev);</div><div class='del'>-	can_led_event(ndev, CAN_LED_EVENT_STOP);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static netdev_tx_t rcar_can_start_xmit(struct sk_buff *skb,</div><div class='del'>-				       struct net_device *ndev)</div><div class='del'>-{</div><div class='del'>-	struct rcar_can_priv *priv = netdev_priv(ndev);</div><div class='del'>-	struct can_frame *cf = (struct can_frame *)skb-&gt;data;</div><div class='del'>-	u32 data, i;</div><div class='del'>-</div><div class='del'>-	if (can_dropped_invalid_skb(ndev, skb))</div><div class='del'>-		return NETDEV_TX_OK;</div><div class='del'>-</div><div class='del'>-	if (cf-&gt;can_id &amp; CAN_EFF_FLAG)	/* Extended frame format */</div><div class='del'>-		data = (cf-&gt;can_id &amp; CAN_EFF_MASK) | RCAR_CAN_IDE;</div><div class='del'>-	else				/* Standard frame format */</div><div class='del'>-		data = (cf-&gt;can_id &amp; CAN_SFF_MASK) &lt;&lt; RCAR_CAN_SID_SHIFT;</div><div class='del'>-</div><div class='del'>-	if (cf-&gt;can_id &amp; CAN_RTR_FLAG) { /* Remote transmission request */</div><div class='del'>-		data |= RCAR_CAN_RTR;</div><div class='del'>-	} else {</div><div class='del'>-		for (i = 0; i &lt; cf-&gt;can_dlc; i++)</div><div class='del'>-			writeb(cf-&gt;data[i],</div><div class='del'>-			       &amp;priv-&gt;regs-&gt;mb[RCAR_CAN_TX_FIFO_MBX].data[i]);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	writel(data, &amp;priv-&gt;regs-&gt;mb[RCAR_CAN_TX_FIFO_MBX].id);</div><div class='del'>-</div><div class='del'>-	writeb(cf-&gt;can_dlc, &amp;priv-&gt;regs-&gt;mb[RCAR_CAN_TX_FIFO_MBX].dlc);</div><div class='del'>-</div><div class='del'>-	priv-&gt;tx_dlc[priv-&gt;tx_head % RCAR_CAN_FIFO_DEPTH] = cf-&gt;can_dlc;</div><div class='del'>-	can_put_echo_skb(skb, ndev, priv-&gt;tx_head % RCAR_CAN_FIFO_DEPTH);</div><div class='del'>-	priv-&gt;tx_head++;</div><div class='del'>-	/* Start Tx: write 0xff to the TFPCR register to increment</div><div class='del'>-	 * the CPU-side pointer for the transmit FIFO to the next</div><div class='del'>-	 * mailbox location</div><div class='del'>-	 */</div><div class='del'>-	writeb(0xff, &amp;priv-&gt;regs-&gt;tfpcr);</div><div class='del'>-	/* Stop the queue if we've filled all FIFO entries */</div><div class='del'>-	if (priv-&gt;tx_head - priv-&gt;tx_tail &gt;= RCAR_CAN_FIFO_DEPTH)</div><div class='del'>-		netif_stop_queue(ndev);</div><div class='del'>-</div><div class='del'>-	return NETDEV_TX_OK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct net_device_ops rcar_can_netdev_ops = {</div><div class='del'>-	.ndo_open = rcar_can_open,</div><div class='del'>-	.ndo_stop = rcar_can_close,</div><div class='del'>-	.ndo_start_xmit = rcar_can_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void rcar_can_rx_pkt(struct rcar_can_priv *priv)</div><div class='del'>-{</div><div class='del'>-	struct net_device_stats *stats = &amp;priv-&gt;ndev-&gt;stats;</div><div class='del'>-	struct can_frame *cf;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	u32 data;</div><div class='del'>-	u8 dlc;</div><div class='del'>-</div><div class='del'>-	skb = alloc_can_skb(priv-&gt;ndev, &amp;cf);</div><div class='del'>-	if (!skb) {</div><div class='del'>-		stats-&gt;rx_dropped++;</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	data = readl(&amp;priv-&gt;regs-&gt;mb[RCAR_CAN_RX_FIFO_MBX].id);</div><div class='del'>-	if (data &amp; RCAR_CAN_IDE)</div><div class='del'>-		cf-&gt;can_id = (data &amp; CAN_EFF_MASK) | CAN_EFF_FLAG;</div><div class='del'>-	else</div><div class='del'>-		cf-&gt;can_id = (data &gt;&gt; RCAR_CAN_SID_SHIFT) &amp; CAN_SFF_MASK;</div><div class='del'>-</div><div class='del'>-	dlc = readb(&amp;priv-&gt;regs-&gt;mb[RCAR_CAN_RX_FIFO_MBX].dlc);</div><div class='del'>-	cf-&gt;can_dlc = get_can_dlc(dlc);</div><div class='del'>-	if (data &amp; RCAR_CAN_RTR) {</div><div class='del'>-		cf-&gt;can_id |= CAN_RTR_FLAG;</div><div class='del'>-	} else {</div><div class='del'>-		for (dlc = 0; dlc &lt; cf-&gt;can_dlc; dlc++)</div><div class='del'>-			cf-&gt;data[dlc] =</div><div class='del'>-			readb(&amp;priv-&gt;regs-&gt;mb[RCAR_CAN_RX_FIFO_MBX].data[dlc]);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	can_led_event(priv-&gt;ndev, CAN_LED_EVENT_RX);</div><div class='del'>-</div><div class='del'>-	stats-&gt;rx_bytes += cf-&gt;can_dlc;</div><div class='del'>-	stats-&gt;rx_packets++;</div><div class='del'>-	netif_receive_skb(skb);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rcar_can_rx_poll(struct napi_struct *napi, int quota)</div><div class='del'>-{</div><div class='del'>-	struct rcar_can_priv *priv = container_of(napi,</div><div class='del'>-						  struct rcar_can_priv, napi);</div><div class='del'>-	int num_pkts;</div><div class='del'>-</div><div class='del'>-	for (num_pkts = 0; num_pkts &lt; quota; num_pkts++) {</div><div class='del'>-		u8 rfcr, isr;</div><div class='del'>-</div><div class='del'>-		isr = readb(&amp;priv-&gt;regs-&gt;isr);</div><div class='del'>-		/* Clear interrupt bit */</div><div class='del'>-		if (isr &amp; RCAR_CAN_ISR_RXFF)</div><div class='del'>-			writeb(isr &amp; ~RCAR_CAN_ISR_RXFF, &amp;priv-&gt;regs-&gt;isr);</div><div class='del'>-		rfcr = readb(&amp;priv-&gt;regs-&gt;rfcr);</div><div class='del'>-		if (rfcr &amp; RCAR_CAN_RFCR_RFEST)</div><div class='del'>-			break;</div><div class='del'>-		rcar_can_rx_pkt(priv);</div><div class='del'>-		/* Write 0xff to the RFPCR register to increment</div><div class='del'>-		 * the CPU-side pointer for the receive FIFO</div><div class='del'>-		 * to the next mailbox location</div><div class='del'>-		 */</div><div class='del'>-		writeb(0xff, &amp;priv-&gt;regs-&gt;rfpcr);</div><div class='del'>-	}</div><div class='del'>-	/* All packets processed */</div><div class='del'>-	if (num_pkts &lt; quota) {</div><div class='del'>-		napi_complete(napi);</div><div class='del'>-		priv-&gt;ier |= RCAR_CAN_IER_RXFIE;</div><div class='del'>-		writeb(priv-&gt;ier, &amp;priv-&gt;regs-&gt;ier);</div><div class='del'>-	}</div><div class='del'>-	return num_pkts;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rcar_can_do_set_mode(struct net_device *ndev, enum can_mode mode)</div><div class='del'>-{</div><div class='del'>-	switch (mode) {</div><div class='del'>-	case CAN_MODE_START:</div><div class='del'>-		rcar_can_start(ndev);</div><div class='del'>-		netif_wake_queue(ndev);</div><div class='del'>-		return 0;</div><div class='del'>-	default:</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rcar_can_get_berr_counter(const struct net_device *dev,</div><div class='del'>-				     struct can_berr_counter *bec)</div><div class='del'>-{</div><div class='del'>-	struct rcar_can_priv *priv = netdev_priv(dev);</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = clk_prepare_enable(priv-&gt;clk);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-	bec-&gt;txerr = readb(&amp;priv-&gt;regs-&gt;tecr);</div><div class='del'>-	bec-&gt;rxerr = readb(&amp;priv-&gt;regs-&gt;recr);</div><div class='del'>-	clk_disable_unprepare(priv-&gt;clk);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const char * const clock_names[] = {</div><div class='del'>-	[CLKR_CLKP1]	= "clkp1",</div><div class='del'>-	[CLKR_CLKP2]	= "clkp2",</div><div class='del'>-	[CLKR_CLKEXT]	= "can_clk",</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int rcar_can_probe(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	struct rcar_can_platform_data *pdata;</div><div class='del'>-	struct rcar_can_priv *priv;</div><div class='del'>-	struct net_device *ndev;</div><div class='del'>-	struct resource *mem;</div><div class='del'>-	void __iomem *addr;</div><div class='del'>-	u32 clock_select = CLKR_CLKP1;</div><div class='del'>-	int err = -ENODEV;</div><div class='del'>-	int irq;</div><div class='del'>-</div><div class='del'>-	if (pdev-&gt;dev.of_node) {</div><div class='del'>-		of_property_read_u32(pdev-&gt;dev.of_node,</div><div class='del'>-				     "renesas,can-clock-select", &amp;clock_select);</div><div class='del'>-	} else {</div><div class='del'>-		pdata = dev_get_platdata(&amp;pdev-&gt;dev);</div><div class='del'>-		if (!pdata) {</div><div class='del'>-			dev_err(&amp;pdev-&gt;dev, "No platform data provided!\n");</div><div class='del'>-			goto fail;</div><div class='del'>-		}</div><div class='del'>-		clock_select = pdata-&gt;clock_select;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	irq = platform_get_irq(pdev, 0);</div><div class='del'>-	if (irq &lt; 0) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "No IRQ resource\n");</div><div class='del'>-		err = irq;</div><div class='del'>-		goto fail;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='del'>-	addr = devm_ioremap_resource(&amp;pdev-&gt;dev, mem);</div><div class='del'>-	if (IS_ERR(addr)) {</div><div class='del'>-		err = PTR_ERR(addr);</div><div class='del'>-		goto fail;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ndev = alloc_candev(sizeof(struct rcar_can_priv), RCAR_CAN_FIFO_DEPTH);</div><div class='del'>-	if (!ndev) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "alloc_candev() failed\n");</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto fail;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	priv = netdev_priv(ndev);</div><div class='del'>-</div><div class='del'>-	priv-&gt;clk = devm_clk_get(&amp;pdev-&gt;dev, "clkp1");</div><div class='del'>-	if (IS_ERR(priv-&gt;clk)) {</div><div class='del'>-		err = PTR_ERR(priv-&gt;clk);</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "cannot get peripheral clock, error %d\n",</div><div class='del'>-			err);</div><div class='del'>-		goto fail_clk;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (clock_select &gt;= ARRAY_SIZE(clock_names)) {</div><div class='del'>-		err = -EINVAL;</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "invalid CAN clock selected\n");</div><div class='del'>-		goto fail_clk;</div><div class='del'>-	}</div><div class='del'>-	priv-&gt;can_clk = devm_clk_get(&amp;pdev-&gt;dev, clock_names[clock_select]);</div><div class='del'>-	if (IS_ERR(priv-&gt;can_clk)) {</div><div class='del'>-		err = PTR_ERR(priv-&gt;can_clk);</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "cannot get CAN clock, error %d\n", err);</div><div class='del'>-		goto fail_clk;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ndev-&gt;netdev_ops = &amp;rcar_can_netdev_ops;</div><div class='del'>-	ndev-&gt;irq = irq;</div><div class='del'>-	ndev-&gt;flags |= IFF_ECHO;</div><div class='del'>-	priv-&gt;ndev = ndev;</div><div class='del'>-	priv-&gt;regs = addr;</div><div class='del'>-	priv-&gt;clock_select = clock_select;</div><div class='del'>-	priv-&gt;can.clock.freq = clk_get_rate(priv-&gt;can_clk);</div><div class='del'>-	priv-&gt;can.bittiming_const = &amp;rcar_can_bittiming_const;</div><div class='del'>-	priv-&gt;can.do_set_mode = rcar_can_do_set_mode;</div><div class='del'>-	priv-&gt;can.do_get_berr_counter = rcar_can_get_berr_counter;</div><div class='del'>-	priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_BERR_REPORTING;</div><div class='del'>-	platform_set_drvdata(pdev, ndev);</div><div class='del'>-	SET_NETDEV_DEV(ndev, &amp;pdev-&gt;dev);</div><div class='del'>-</div><div class='del'>-	netif_napi_add(ndev, &amp;priv-&gt;napi, rcar_can_rx_poll,</div><div class='del'>-		       RCAR_CAN_NAPI_WEIGHT);</div><div class='del'>-	err = register_candev(ndev);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "register_candev() failed, error %d\n",</div><div class='del'>-			err);</div><div class='del'>-		goto fail_candev;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	devm_can_led_init(ndev);</div><div class='del'>-</div><div class='del'>-	dev_info(&amp;pdev-&gt;dev, "device registered (regs @ %p, IRQ%d)\n",</div><div class='del'>-		 priv-&gt;regs, ndev-&gt;irq);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-fail_candev:</div><div class='del'>-	netif_napi_del(&amp;priv-&gt;napi);</div><div class='del'>-fail_clk:</div><div class='del'>-	free_candev(ndev);</div><div class='del'>-fail:</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int rcar_can_remove(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	struct net_device *ndev = platform_get_drvdata(pdev);</div><div class='del'>-	struct rcar_can_priv *priv = netdev_priv(ndev);</div><div class='del'>-</div><div class='del'>-	unregister_candev(ndev);</div><div class='del'>-	netif_napi_del(&amp;priv-&gt;napi);</div><div class='del'>-	free_candev(ndev);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __maybe_unused rcar_can_suspend(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	struct net_device *ndev = dev_get_drvdata(dev);</div><div class='del'>-	struct rcar_can_priv *priv = netdev_priv(ndev);</div><div class='del'>-	u16 ctlr;</div><div class='del'>-</div><div class='del'>-	if (netif_running(ndev)) {</div><div class='del'>-		netif_stop_queue(ndev);</div><div class='del'>-		netif_device_detach(ndev);</div><div class='del'>-	}</div><div class='del'>-	ctlr = readw(&amp;priv-&gt;regs-&gt;ctlr);</div><div class='del'>-	ctlr |= RCAR_CAN_CTLR_CANM_HALT;</div><div class='del'>-	writew(ctlr, &amp;priv-&gt;regs-&gt;ctlr);</div><div class='del'>-	ctlr |= RCAR_CAN_CTLR_SLPM;</div><div class='del'>-	writew(ctlr, &amp;priv-&gt;regs-&gt;ctlr);</div><div class='del'>-	priv-&gt;can.state = CAN_STATE_SLEEPING;</div><div class='del'>-</div><div class='del'>-	clk_disable(priv-&gt;clk);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __maybe_unused rcar_can_resume(struct device *dev)</div><div class='del'>-{</div><div class='del'>-	struct net_device *ndev = dev_get_drvdata(dev);</div><div class='del'>-	struct rcar_can_priv *priv = netdev_priv(ndev);</div><div class='del'>-	u16 ctlr;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = clk_enable(priv-&gt;clk);</div><div class='del'>-	if (err) {</div><div class='del'>-		netdev_err(ndev, "clk_enable() failed, error %d\n", err);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ctlr = readw(&amp;priv-&gt;regs-&gt;ctlr);</div><div class='del'>-	ctlr &amp;= ~RCAR_CAN_CTLR_SLPM;</div><div class='del'>-	writew(ctlr, &amp;priv-&gt;regs-&gt;ctlr);</div><div class='del'>-	ctlr &amp;= ~RCAR_CAN_CTLR_CANM;</div><div class='del'>-	writew(ctlr, &amp;priv-&gt;regs-&gt;ctlr);</div><div class='del'>-	priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='del'>-</div><div class='del'>-	if (netif_running(ndev)) {</div><div class='del'>-		netif_device_attach(ndev);</div><div class='del'>-		netif_start_queue(ndev);</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static SIMPLE_DEV_PM_OPS(rcar_can_pm_ops, rcar_can_suspend, rcar_can_resume);</div><div class='del'>-</div><div class='del'>-static const struct of_device_id rcar_can_of_table[] __maybe_unused = {</div><div class='del'>-	{ .compatible = "renesas,can-r8a7778" },</div><div class='del'>-	{ .compatible = "renesas,can-r8a7779" },</div><div class='del'>-	{ .compatible = "renesas,can-r8a7790" },</div><div class='del'>-	{ .compatible = "renesas,can-r8a7791" },</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-MODULE_DEVICE_TABLE(of, rcar_can_of_table);</div><div class='del'>-</div><div class='del'>-static struct platform_driver rcar_can_driver = {</div><div class='del'>-	.driver = {</div><div class='del'>-		.name = RCAR_CAN_DRV_NAME,</div><div class='del'>-		.of_match_table = of_match_ptr(rcar_can_of_table),</div><div class='del'>-		.pm = &amp;rcar_can_pm_ops,</div><div class='del'>-	},</div><div class='del'>-	.probe = rcar_can_probe,</div><div class='del'>-	.remove = rcar_can_remove,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-module_platform_driver(rcar_can_driver);</div><div class='del'>-</div><div class='del'>-MODULE_AUTHOR("Cogent Embedded, Inc.");</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_DESCRIPTION("CAN driver for Renesas R-Car SoC");</div><div class='del'>-MODULE_ALIAS("platform:" RCAR_CAN_DRV_NAME);</div><div class='head'>diff --git a/drivers/net/can/rockchip/Kconfig b/drivers/net/can/rockchip/Kconfig<br/>new file mode 100644<br/>index 000000000000..d203c530551f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/rockchip/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/rockchip/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,10 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+config CAN_ROCKCHIP_CANFD</div><div class='add'>+	tristate "Rockchip CAN-FD controller"</div><div class='add'>+	depends on OF</div><div class='add'>+	depends on ARCH_ROCKCHIP || COMPILE_TEST</div><div class='add'>+	select CAN_RX_OFFLOAD</div><div class='add'>+	help</div><div class='add'>+	  Say Y here if you want to use CAN-FD controller found on</div><div class='add'>+	  Rockchip SoCs.</div><div class='head'>diff --git a/drivers/net/can/rockchip/Makefile b/drivers/net/can/rockchip/Makefile<br/>new file mode 100644<br/>index 000000000000..3760d3e1baa3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/rockchip/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/rockchip/Makefile</a></div><div class='hunk'>@@ -0,0 +1,10 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_CAN_ROCKCHIP_CANFD) += rockchip_canfd.o</div><div class='add'>+</div><div class='add'>+rockchip_canfd-objs :=</div><div class='add'>+rockchip_canfd-objs += rockchip_canfd-core.o</div><div class='add'>+rockchip_canfd-objs += rockchip_canfd-ethtool.o</div><div class='add'>+rockchip_canfd-objs += rockchip_canfd-rx.o</div><div class='add'>+rockchip_canfd-objs += rockchip_canfd-timestamp.o</div><div class='add'>+rockchip_canfd-objs += rockchip_canfd-tx.o</div><div class='head'>diff --git a/drivers/net/can/rockchip/rockchip_canfd-core.c b/drivers/net/can/rockchip/rockchip_canfd-core.c<br/>new file mode 100644<br/>index 000000000000..29de0c01e4ed<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/rockchip/rockchip_canfd-core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/rockchip/rockchip_canfd-core.c</a></div><div class='hunk'>@@ -0,0 +1,962 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+//</div><div class='add'>+// Copyright (c) 2023, 2024 Pengutronix,</div><div class='add'>+//               Marc Kleine-Budde &lt;kernel@pengutronix.de&gt;</div><div class='add'>+//</div><div class='add'>+// Based on:</div><div class='add'>+//</div><div class='add'>+// Rockchip CANFD driver</div><div class='add'>+//</div><div class='add'>+// Copyright (c) 2020 Rockchip Electronics Co. Ltd.</div><div class='add'>+//</div><div class='add'>+</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/pm_runtime.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+</div><div class='add'>+#include "rockchip_canfd.h"</div><div class='add'>+</div><div class='add'>+static const struct rkcanfd_devtype_data rkcanfd_devtype_data_rk3568v2 = {</div><div class='add'>+	.model = RKCANFD_MODEL_RK3568V2,</div><div class='add'>+	.quirks = RKCANFD_QUIRK_RK3568_ERRATUM_1 | RKCANFD_QUIRK_RK3568_ERRATUM_2 |</div><div class='add'>+		RKCANFD_QUIRK_RK3568_ERRATUM_3 | RKCANFD_QUIRK_RK3568_ERRATUM_4 |</div><div class='add'>+		RKCANFD_QUIRK_RK3568_ERRATUM_5 | RKCANFD_QUIRK_RK3568_ERRATUM_6 |</div><div class='add'>+		RKCANFD_QUIRK_RK3568_ERRATUM_7 | RKCANFD_QUIRK_RK3568_ERRATUM_8 |</div><div class='add'>+		RKCANFD_QUIRK_RK3568_ERRATUM_9 | RKCANFD_QUIRK_RK3568_ERRATUM_10 |</div><div class='add'>+		RKCANFD_QUIRK_RK3568_ERRATUM_11 | RKCANFD_QUIRK_RK3568_ERRATUM_12 |</div><div class='add'>+		RKCANFD_QUIRK_CANFD_BROKEN,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* The rk3568 CAN-FD errata sheet as of Tue 07 Nov 2023 11:25:31 +08:00</div><div class='add'>+ * states that only the rk3568v2 is affected by erratum 5, but tests</div><div class='add'>+ * with the rk3568v2 and rk3568v3 show that the RX_FIFO_CNT is</div><div class='add'>+ * sometimes too high. In contrast to the errata sheet mark rk3568v3</div><div class='add'>+ * as effected by erratum 5, too.</div><div class='add'>+ */</div><div class='add'>+static const struct rkcanfd_devtype_data rkcanfd_devtype_data_rk3568v3 = {</div><div class='add'>+	.model = RKCANFD_MODEL_RK3568V3,</div><div class='add'>+	.quirks = RKCANFD_QUIRK_RK3568_ERRATUM_1 | RKCANFD_QUIRK_RK3568_ERRATUM_2 |</div><div class='add'>+		RKCANFD_QUIRK_RK3568_ERRATUM_5 | RKCANFD_QUIRK_RK3568_ERRATUM_7 |</div><div class='add'>+		RKCANFD_QUIRK_RK3568_ERRATUM_8 | RKCANFD_QUIRK_RK3568_ERRATUM_10 |</div><div class='add'>+		RKCANFD_QUIRK_RK3568_ERRATUM_11 | RKCANFD_QUIRK_RK3568_ERRATUM_12 |</div><div class='add'>+		RKCANFD_QUIRK_CANFD_BROKEN,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *__rkcanfd_get_model_str(enum rkcanfd_model model)</div><div class='add'>+{</div><div class='add'>+	switch (model) {</div><div class='add'>+	case RKCANFD_MODEL_RK3568V2:</div><div class='add'>+		return "rk3568v2";</div><div class='add'>+	case RKCANFD_MODEL_RK3568V3:</div><div class='add'>+		return "rk3568v3";</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return "&lt;unknown&gt;";</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline const char *</div><div class='add'>+rkcanfd_get_model_str(const struct rkcanfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return __rkcanfd_get_model_str(priv-&gt;devtype_data.model);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Note:</div><div class='add'>+ *</div><div class='add'>+ * The formula to calculate the CAN System Clock is:</div><div class='add'>+ *</div><div class='add'>+ * Tsclk = 2 x Tclk x (brp + 1)</div><div class='add'>+ *</div><div class='add'>+ * Double the data sheet's brp_min, brp_max and brp_inc values (both</div><div class='add'>+ * for the arbitration and data bit timing) to take the "2 x" into</div><div class='add'>+ * account.</div><div class='add'>+ */</div><div class='add'>+static const struct can_bittiming_const rkcanfd_bittiming_const = {</div><div class='add'>+	.name = DEVICE_NAME,</div><div class='add'>+	.tseg1_min = 1,</div><div class='add'>+	.tseg1_max = 256,</div><div class='add'>+	.tseg2_min = 1,</div><div class='add'>+	.tseg2_max = 128,</div><div class='add'>+	.sjw_max = 128,</div><div class='add'>+	.brp_min = 2,	/* value from data sheet x2 */</div><div class='add'>+	.brp_max = 512,	/* value from data sheet x2 */</div><div class='add'>+	.brp_inc = 2,	/* value from data sheet x2 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const rkcanfd_data_bittiming_const = {</div><div class='add'>+	.name = DEVICE_NAME,</div><div class='add'>+	.tseg1_min = 1,</div><div class='add'>+	.tseg1_max = 32,</div><div class='add'>+	.tseg2_min = 1,</div><div class='add'>+	.tseg2_max = 16,</div><div class='add'>+	.sjw_max = 16,</div><div class='add'>+	.brp_min = 2,	/* value from data sheet x2 */</div><div class='add'>+	.brp_max = 512,	/* value from data sheet x2 */</div><div class='add'>+	.brp_inc = 2,	/* value from data sheet x2 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void rkcanfd_chip_set_reset_mode(const struct rkcanfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	reset_control_assert(priv-&gt;reset);</div><div class='add'>+	udelay(2);</div><div class='add'>+	reset_control_deassert(priv-&gt;reset);</div><div class='add'>+</div><div class='add'>+	rkcanfd_write(priv, RKCANFD_REG_MODE, 0x0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rkcanfd_chip_set_work_mode(const struct rkcanfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	rkcanfd_write(priv, RKCANFD_REG_MODE, priv-&gt;reg_mode_default);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rkcanfd_set_bittiming(struct rkcanfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	const struct can_bittiming *dbt = &amp;priv-&gt;can.fd.data_bittiming;</div><div class='add'>+	const struct can_bittiming *bt = &amp;priv-&gt;can.bittiming;</div><div class='add'>+	u32 reg_nbt, reg_dbt, reg_tdc;</div><div class='add'>+	u32 tdco;</div><div class='add'>+</div><div class='add'>+	reg_nbt = FIELD_PREP(RKCANFD_REG_FD_NOMINAL_BITTIMING_SJW,</div><div class='add'>+			     bt-&gt;sjw - 1) |</div><div class='add'>+		FIELD_PREP(RKCANFD_REG_FD_NOMINAL_BITTIMING_BRP,</div><div class='add'>+			   (bt-&gt;brp / 2) - 1) |</div><div class='add'>+		FIELD_PREP(RKCANFD_REG_FD_NOMINAL_BITTIMING_TSEG2,</div><div class='add'>+			   bt-&gt;phase_seg2 - 1) |</div><div class='add'>+		FIELD_PREP(RKCANFD_REG_FD_NOMINAL_BITTIMING_TSEG1,</div><div class='add'>+			   bt-&gt;prop_seg + bt-&gt;phase_seg1 - 1);</div><div class='add'>+</div><div class='add'>+	rkcanfd_write(priv, RKCANFD_REG_FD_NOMINAL_BITTIMING, reg_nbt);</div><div class='add'>+</div><div class='add'>+	if (!(priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	reg_dbt = FIELD_PREP(RKCANFD_REG_FD_DATA_BITTIMING_SJW,</div><div class='add'>+			     dbt-&gt;sjw - 1) |</div><div class='add'>+		FIELD_PREP(RKCANFD_REG_FD_DATA_BITTIMING_BRP,</div><div class='add'>+			   (dbt-&gt;brp / 2) - 1) |</div><div class='add'>+		FIELD_PREP(RKCANFD_REG_FD_DATA_BITTIMING_TSEG2,</div><div class='add'>+			   dbt-&gt;phase_seg2 - 1) |</div><div class='add'>+		FIELD_PREP(RKCANFD_REG_FD_DATA_BITTIMING_TSEG1,</div><div class='add'>+			   dbt-&gt;prop_seg + dbt-&gt;phase_seg1 - 1);</div><div class='add'>+</div><div class='add'>+	rkcanfd_write(priv, RKCANFD_REG_FD_DATA_BITTIMING, reg_dbt);</div><div class='add'>+</div><div class='add'>+	tdco = (priv-&gt;can.clock.freq / dbt-&gt;bitrate) * 2 / 3;</div><div class='add'>+	tdco = min(tdco, FIELD_MAX(RKCANFD_REG_TRANSMIT_DELAY_COMPENSATION_TDC_OFFSET));</div><div class='add'>+</div><div class='add'>+	reg_tdc = FIELD_PREP(RKCANFD_REG_TRANSMIT_DELAY_COMPENSATION_TDC_OFFSET, tdco) |</div><div class='add'>+		RKCANFD_REG_TRANSMIT_DELAY_COMPENSATION_TDC_ENABLE;</div><div class='add'>+	rkcanfd_write(priv, RKCANFD_REG_TRANSMIT_DELAY_COMPENSATION,</div><div class='add'>+		      reg_tdc);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rkcanfd_get_berr_counter_corrected(struct rkcanfd_priv *priv,</div><div class='add'>+					       struct can_berr_counter *bec)</div><div class='add'>+{</div><div class='add'>+	struct can_berr_counter bec_raw;</div><div class='add'>+	u32 reg_state;</div><div class='add'>+</div><div class='add'>+	bec-&gt;rxerr = rkcanfd_read(priv, RKCANFD_REG_RXERRORCNT);</div><div class='add'>+	bec-&gt;txerr = rkcanfd_read(priv, RKCANFD_REG_TXERRORCNT);</div><div class='add'>+	bec_raw = *bec;</div><div class='add'>+</div><div class='add'>+	/* Tests show that sometimes both CAN bus error counters read</div><div class='add'>+	 * 0x0, even if the controller is in warning mode</div><div class='add'>+	 * (RKCANFD_REG_STATE_ERROR_WARNING_STATE in RKCANFD_REG_STATE</div><div class='add'>+	 * set).</div><div class='add'>+	 *</div><div class='add'>+	 * In case both error counters read 0x0, use the struct</div><div class='add'>+	 * priv-&gt;bec, otherwise save the read value to priv-&gt;bec.</div><div class='add'>+	 *</div><div class='add'>+	 * rkcanfd_handle_rx_int_one() handles the decrementing of</div><div class='add'>+	 * priv-&gt;bec.rxerr for successfully RX'ed CAN frames.</div><div class='add'>+	 *</div><div class='add'>+	 * Luckily the controller doesn't decrement the RX CAN bus</div><div class='add'>+	 * error counter in hardware for self received TX'ed CAN</div><div class='add'>+	 * frames (RKCANFD_REG_MODE_RXSTX_MODE), so RXSTX doesn't</div><div class='add'>+	 * interfere with proper RX CAN bus error counters.</div><div class='add'>+	 *</div><div class='add'>+	 * rkcanfd_handle_tx_done_one() handles the decrementing of</div><div class='add'>+	 * priv-&gt;bec.txerr for successfully TX'ed CAN frames.</div><div class='add'>+	 */</div><div class='add'>+	if (!bec-&gt;rxerr &amp;&amp; !bec-&gt;txerr)</div><div class='add'>+		*bec = priv-&gt;bec;</div><div class='add'>+	else</div><div class='add'>+		priv-&gt;bec = *bec;</div><div class='add'>+</div><div class='add'>+	reg_state = rkcanfd_read(priv, RKCANFD_REG_STATE);</div><div class='add'>+	netdev_vdbg(priv-&gt;ndev,</div><div class='add'>+		    "%s: Raw/Cor: txerr=%3u/%3u rxerr=%3u/%3u Bus Off=%u Warning=%u\n",</div><div class='add'>+		    __func__,</div><div class='add'>+		    bec_raw.txerr, bec-&gt;txerr, bec_raw.rxerr, bec-&gt;rxerr,</div><div class='add'>+		    !!(reg_state &amp; RKCANFD_REG_STATE_BUS_OFF_STATE),</div><div class='add'>+		    !!(reg_state &amp; RKCANFD_REG_STATE_ERROR_WARNING_STATE));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rkcanfd_get_berr_counter(const struct net_device *ndev,</div><div class='add'>+				    struct can_berr_counter *bec)</div><div class='add'>+{</div><div class='add'>+	struct rkcanfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = pm_runtime_resume_and_get(ndev-&gt;dev.parent);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	rkcanfd_get_berr_counter_corrected(priv, bec);</div><div class='add'>+</div><div class='add'>+	pm_runtime_put(ndev-&gt;dev.parent);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rkcanfd_chip_interrupts_enable(const struct rkcanfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	rkcanfd_write(priv, RKCANFD_REG_INT_MASK, priv-&gt;reg_int_mask_default);</div><div class='add'>+</div><div class='add'>+	netdev_dbg(priv-&gt;ndev, "%s: reg_int_mask=0x%08x\n", __func__,</div><div class='add'>+		   rkcanfd_read(priv, RKCANFD_REG_INT_MASK));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rkcanfd_chip_interrupts_disable(const struct rkcanfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	rkcanfd_write(priv, RKCANFD_REG_INT_MASK, RKCANFD_REG_INT_ALL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rkcanfd_chip_fifo_setup(struct rkcanfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	/* RX FIFO */</div><div class='add'>+	reg = rkcanfd_read(priv, RKCANFD_REG_RX_FIFO_CTRL);</div><div class='add'>+	reg |= RKCANFD_REG_RX_FIFO_CTRL_RX_FIFO_ENABLE;</div><div class='add'>+	rkcanfd_write(priv, RKCANFD_REG_RX_FIFO_CTRL, reg);</div><div class='add'>+</div><div class='add'>+	WRITE_ONCE(priv-&gt;tx_head, 0);</div><div class='add'>+	WRITE_ONCE(priv-&gt;tx_tail, 0);</div><div class='add'>+	netdev_reset_queue(priv-&gt;ndev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rkcanfd_chip_start(struct rkcanfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	rkcanfd_chip_set_reset_mode(priv);</div><div class='add'>+</div><div class='add'>+	/* Receiving Filter: accept all */</div><div class='add'>+	rkcanfd_write(priv, RKCANFD_REG_IDCODE, 0x0);</div><div class='add'>+	rkcanfd_write(priv, RKCANFD_REG_IDMASK, RKCANFD_REG_IDCODE_EXTENDED_FRAME_ID);</div><div class='add'>+</div><div class='add'>+	/* enable:</div><div class='add'>+	 * - CAN_FD: enable CAN-FD</div><div class='add'>+	 * - AUTO_RETX_MODE: auto retransmission on TX error</div><div class='add'>+	 * - COVER_MODE: RX-FIFO overwrite mode, do not send OVERLOAD frames</div><div class='add'>+	 * - RXSTX_MODE: Receive Self Transmit data mode</div><div class='add'>+	 * - WORK_MODE: transition from reset to working mode</div><div class='add'>+	 */</div><div class='add'>+	reg = rkcanfd_read(priv, RKCANFD_REG_MODE);</div><div class='add'>+	priv-&gt;reg_mode_default = reg |</div><div class='add'>+		RKCANFD_REG_MODE_CAN_FD_MODE_ENABLE |</div><div class='add'>+		RKCANFD_REG_MODE_AUTO_RETX_MODE |</div><div class='add'>+		RKCANFD_REG_MODE_COVER_MODE |</div><div class='add'>+		RKCANFD_REG_MODE_RXSTX_MODE |</div><div class='add'>+		RKCANFD_REG_MODE_WORK_MODE;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LOOPBACK)</div><div class='add'>+		priv-&gt;reg_mode_default |= RKCANFD_REG_MODE_LBACK_MODE |</div><div class='add'>+			RKCANFD_REG_MODE_SILENT_MODE |</div><div class='add'>+			RKCANFD_REG_MODE_SELF_TEST;</div><div class='add'>+</div><div class='add'>+	/* mask, i.e. ignore:</div><div class='add'>+	 * - TIMESTAMP_COUNTER_OVERFLOW_INT - timestamp counter overflow interrupt</div><div class='add'>+	 * - TX_ARBIT_FAIL_INT - TX arbitration fail interrupt</div><div class='add'>+	 * - OVERLOAD_INT - CAN bus overload interrupt</div><div class='add'>+	 * - TX_FINISH_INT - Transmit finish interrupt</div><div class='add'>+	 */</div><div class='add'>+	priv-&gt;reg_int_mask_default =</div><div class='add'>+		RKCANFD_REG_INT_TIMESTAMP_COUNTER_OVERFLOW_INT |</div><div class='add'>+		RKCANFD_REG_INT_TX_ARBIT_FAIL_INT |</div><div class='add'>+		RKCANFD_REG_INT_OVERLOAD_INT |</div><div class='add'>+		RKCANFD_REG_INT_TX_FINISH_INT;</div><div class='add'>+</div><div class='add'>+	/* Do not mask the bus error interrupt if the bus error</div><div class='add'>+	 * reporting is requested.</div><div class='add'>+	 */</div><div class='add'>+	if (!(priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING))</div><div class='add'>+		priv-&gt;reg_int_mask_default |= RKCANFD_REG_INT_ERROR_INT;</div><div class='add'>+</div><div class='add'>+	memset(&amp;priv-&gt;bec, 0x0, sizeof(priv-&gt;bec));</div><div class='add'>+</div><div class='add'>+	rkcanfd_chip_fifo_setup(priv);</div><div class='add'>+	rkcanfd_timestamp_init(priv);</div><div class='add'>+	rkcanfd_timestamp_start(priv);</div><div class='add'>+</div><div class='add'>+	rkcanfd_set_bittiming(priv);</div><div class='add'>+</div><div class='add'>+	rkcanfd_chip_interrupts_disable(priv);</div><div class='add'>+	rkcanfd_chip_set_work_mode(priv);</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+</div><div class='add'>+	netdev_dbg(priv-&gt;ndev, "%s: reg_mode=0x%08x\n", __func__,</div><div class='add'>+		   rkcanfd_read(priv, RKCANFD_REG_MODE));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __rkcanfd_chip_stop(struct rkcanfd_priv *priv, const enum can_state state)</div><div class='add'>+{</div><div class='add'>+	priv-&gt;can.state = state;</div><div class='add'>+</div><div class='add'>+	rkcanfd_chip_set_reset_mode(priv);</div><div class='add'>+	rkcanfd_chip_interrupts_disable(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rkcanfd_chip_stop(struct rkcanfd_priv *priv, const enum can_state state)</div><div class='add'>+{</div><div class='add'>+	priv-&gt;can.state = state;</div><div class='add'>+</div><div class='add'>+	rkcanfd_timestamp_stop(priv);</div><div class='add'>+	__rkcanfd_chip_stop(priv, state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rkcanfd_chip_stop_sync(struct rkcanfd_priv *priv, const enum can_state state)</div><div class='add'>+{</div><div class='add'>+	priv-&gt;can.state = state;</div><div class='add'>+</div><div class='add'>+	rkcanfd_timestamp_stop_sync(priv);</div><div class='add'>+	__rkcanfd_chip_stop(priv, state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rkcanfd_set_mode(struct net_device *ndev,</div><div class='add'>+			    enum can_mode mode)</div><div class='add'>+{</div><div class='add'>+	struct rkcanfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case CAN_MODE_START:</div><div class='add'>+		rkcanfd_chip_start(priv);</div><div class='add'>+		rkcanfd_chip_interrupts_enable(priv);</div><div class='add'>+		netif_wake_queue(ndev);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct sk_buff *</div><div class='add'>+rkcanfd_alloc_can_err_skb(struct rkcanfd_priv *priv,</div><div class='add'>+			  struct can_frame **cf, u32 *timestamp)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	*timestamp = rkcanfd_get_timestamp(priv);</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_err_skb(priv-&gt;ndev, cf);</div><div class='add'>+	if (skb)</div><div class='add'>+		rkcanfd_skb_set_timestamp(priv, skb, *timestamp);</div><div class='add'>+</div><div class='add'>+	return skb;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char *rkcanfd_get_error_type_str(unsigned int type)</div><div class='add'>+{</div><div class='add'>+	switch (type) {</div><div class='add'>+	case RKCANFD_REG_ERROR_CODE_TYPE_BIT:</div><div class='add'>+		return "Bit";</div><div class='add'>+	case RKCANFD_REG_ERROR_CODE_TYPE_STUFF:</div><div class='add'>+		return "Stuff";</div><div class='add'>+	case RKCANFD_REG_ERROR_CODE_TYPE_FORM:</div><div class='add'>+		return "Form";</div><div class='add'>+	case RKCANFD_REG_ERROR_CODE_TYPE_ACK:</div><div class='add'>+		return "ACK";</div><div class='add'>+	case RKCANFD_REG_ERROR_CODE_TYPE_CRC:</div><div class='add'>+		return "CRC";</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return "&lt;unknown&gt;";</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define RKCAN_ERROR_CODE(reg_ec, code) \</div><div class='add'>+	((reg_ec) &amp; RKCANFD_REG_ERROR_CODE_##code ? __stringify(code) " " : "")</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+rkcanfd_handle_error_int_reg_ec(struct rkcanfd_priv *priv, struct can_frame *cf,</div><div class='add'>+				const u32 reg_ec)</div><div class='add'>+{</div><div class='add'>+	struct net_device_stats *stats = &amp;priv-&gt;ndev-&gt;stats;</div><div class='add'>+	unsigned int type;</div><div class='add'>+	u32 reg_state, reg_cmd;</div><div class='add'>+</div><div class='add'>+	type = FIELD_GET(RKCANFD_REG_ERROR_CODE_TYPE, reg_ec);</div><div class='add'>+	reg_cmd = rkcanfd_read(priv, RKCANFD_REG_CMD);</div><div class='add'>+	reg_state = rkcanfd_read(priv, RKCANFD_REG_STATE);</div><div class='add'>+</div><div class='add'>+	netdev_dbg(priv-&gt;ndev, "%s Error in %s %s Phase: %s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s(0x%08x) CMD=%u RX=%u TX=%u Error-Warning=%u Bus-Off=%u\n",</div><div class='add'>+		   rkcanfd_get_error_type_str(type),</div><div class='add'>+		   reg_ec &amp; RKCANFD_REG_ERROR_CODE_DIRECTION_RX ? "RX" : "TX",</div><div class='add'>+		   reg_ec &amp; RKCANFD_REG_ERROR_CODE_PHASE ? "Data" : "Arbitration",</div><div class='add'>+		   RKCAN_ERROR_CODE(reg_ec, TX_OVERLOAD),</div><div class='add'>+		   RKCAN_ERROR_CODE(reg_ec, TX_ERROR),</div><div class='add'>+		   RKCAN_ERROR_CODE(reg_ec, TX_ACK),</div><div class='add'>+		   RKCAN_ERROR_CODE(reg_ec, TX_ACK_EOF),</div><div class='add'>+		   RKCAN_ERROR_CODE(reg_ec, TX_CRC),</div><div class='add'>+		   RKCAN_ERROR_CODE(reg_ec, TX_STUFF_COUNT),</div><div class='add'>+		   RKCAN_ERROR_CODE(reg_ec, TX_DATA),</div><div class='add'>+		   RKCAN_ERROR_CODE(reg_ec, TX_SOF_DLC),</div><div class='add'>+		   RKCAN_ERROR_CODE(reg_ec, TX_IDLE),</div><div class='add'>+		   RKCAN_ERROR_CODE(reg_ec, RX_BUF_INT),</div><div class='add'>+		   RKCAN_ERROR_CODE(reg_ec, RX_SPACE),</div><div class='add'>+		   RKCAN_ERROR_CODE(reg_ec, RX_EOF),</div><div class='add'>+		   RKCAN_ERROR_CODE(reg_ec, RX_ACK_LIM),</div><div class='add'>+		   RKCAN_ERROR_CODE(reg_ec, RX_ACK),</div><div class='add'>+		   RKCAN_ERROR_CODE(reg_ec, RX_CRC_LIM),</div><div class='add'>+		   RKCAN_ERROR_CODE(reg_ec, RX_CRC),</div><div class='add'>+		   RKCAN_ERROR_CODE(reg_ec, RX_STUFF_COUNT),</div><div class='add'>+		   RKCAN_ERROR_CODE(reg_ec, RX_DATA),</div><div class='add'>+		   RKCAN_ERROR_CODE(reg_ec, RX_DLC),</div><div class='add'>+		   RKCAN_ERROR_CODE(reg_ec, RX_BRS_ESI),</div><div class='add'>+		   RKCAN_ERROR_CODE(reg_ec, RX_RES),</div><div class='add'>+		   RKCAN_ERROR_CODE(reg_ec, RX_FDF),</div><div class='add'>+		   RKCAN_ERROR_CODE(reg_ec, RX_ID2_RTR),</div><div class='add'>+		   RKCAN_ERROR_CODE(reg_ec, RX_SOF_IDE),</div><div class='add'>+		   RKCAN_ERROR_CODE(reg_ec, RX_IDLE),</div><div class='add'>+		   reg_ec, reg_cmd,</div><div class='add'>+		   !!(reg_state &amp; RKCANFD_REG_STATE_RX_PERIOD),</div><div class='add'>+		   !!(reg_state &amp; RKCANFD_REG_STATE_TX_PERIOD),</div><div class='add'>+		   !!(reg_state &amp; RKCANFD_REG_STATE_ERROR_WARNING_STATE),</div><div class='add'>+		   !!(reg_state &amp; RKCANFD_REG_STATE_BUS_OFF_STATE));</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.can_stats.bus_error++;</div><div class='add'>+</div><div class='add'>+	if (reg_ec &amp; RKCANFD_REG_ERROR_CODE_DIRECTION_RX)</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+	else</div><div class='add'>+		stats-&gt;tx_errors++;</div><div class='add'>+</div><div class='add'>+	if (!cf)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (reg_ec &amp; RKCANFD_REG_ERROR_CODE_DIRECTION_RX) {</div><div class='add'>+		if (reg_ec &amp; RKCANFD_REG_ERROR_CODE_RX_SOF_IDE)</div><div class='add'>+			cf-&gt;data[3] = CAN_ERR_PROT_LOC_SOF;</div><div class='add'>+		else if (reg_ec &amp; RKCANFD_REG_ERROR_CODE_RX_ID2_RTR)</div><div class='add'>+			cf-&gt;data[3] = CAN_ERR_PROT_LOC_RTR;</div><div class='add'>+		/* RKCANFD_REG_ERROR_CODE_RX_FDF */</div><div class='add'>+		else if (reg_ec &amp; RKCANFD_REG_ERROR_CODE_RX_RES)</div><div class='add'>+			cf-&gt;data[3] = CAN_ERR_PROT_LOC_RES0;</div><div class='add'>+		/* RKCANFD_REG_ERROR_CODE_RX_BRS_ESI */</div><div class='add'>+		else if (reg_ec &amp; RKCANFD_REG_ERROR_CODE_RX_DLC)</div><div class='add'>+			cf-&gt;data[3] = CAN_ERR_PROT_LOC_DLC;</div><div class='add'>+		else if (reg_ec &amp; RKCANFD_REG_ERROR_CODE_RX_DATA)</div><div class='add'>+			cf-&gt;data[3] = CAN_ERR_PROT_LOC_DATA;</div><div class='add'>+		/* RKCANFD_REG_ERROR_CODE_RX_STUFF_COUNT */</div><div class='add'>+		else if (reg_ec &amp; RKCANFD_REG_ERROR_CODE_RX_CRC)</div><div class='add'>+			cf-&gt;data[3] = CAN_ERR_PROT_LOC_CRC_SEQ;</div><div class='add'>+		else if (reg_ec &amp; RKCANFD_REG_ERROR_CODE_RX_CRC_LIM)</div><div class='add'>+			cf-&gt;data[3] = CAN_ERR_PROT_LOC_ACK_DEL;</div><div class='add'>+		else if (reg_ec &amp; RKCANFD_REG_ERROR_CODE_RX_ACK)</div><div class='add'>+			cf-&gt;data[3] = CAN_ERR_PROT_LOC_ACK;</div><div class='add'>+		else if (reg_ec &amp; RKCANFD_REG_ERROR_CODE_RX_ACK_LIM)</div><div class='add'>+			cf-&gt;data[3] = CAN_ERR_PROT_LOC_ACK_DEL;</div><div class='add'>+		else if (reg_ec &amp; RKCANFD_REG_ERROR_CODE_RX_EOF)</div><div class='add'>+			cf-&gt;data[3] = CAN_ERR_PROT_LOC_EOF;</div><div class='add'>+		else if (reg_ec &amp; RKCANFD_REG_ERROR_CODE_RX_SPACE)</div><div class='add'>+			cf-&gt;data[3] = CAN_ERR_PROT_LOC_EOF;</div><div class='add'>+		else if (reg_ec &amp; RKCANFD_REG_ERROR_CODE_RX_BUF_INT)</div><div class='add'>+			cf-&gt;data[3] = CAN_ERR_PROT_LOC_INTERM;</div><div class='add'>+	} else {</div><div class='add'>+		cf-&gt;data[2] |= CAN_ERR_PROT_TX;</div><div class='add'>+</div><div class='add'>+		if (reg_ec &amp; RKCANFD_REG_ERROR_CODE_TX_SOF_DLC)</div><div class='add'>+			cf-&gt;data[3] = CAN_ERR_PROT_LOC_SOF;</div><div class='add'>+		else if (reg_ec &amp; RKCANFD_REG_ERROR_CODE_TX_DATA)</div><div class='add'>+			cf-&gt;data[3] = CAN_ERR_PROT_LOC_DATA;</div><div class='add'>+		/* RKCANFD_REG_ERROR_CODE_TX_STUFF_COUNT */</div><div class='add'>+		else if (reg_ec &amp; RKCANFD_REG_ERROR_CODE_TX_CRC)</div><div class='add'>+			cf-&gt;data[3] = CAN_ERR_PROT_LOC_CRC_SEQ;</div><div class='add'>+		else if (reg_ec &amp; RKCANFD_REG_ERROR_CODE_TX_ACK_EOF)</div><div class='add'>+			cf-&gt;data[3] = CAN_ERR_PROT_LOC_ACK_DEL;</div><div class='add'>+		else if (reg_ec &amp; RKCANFD_REG_ERROR_CODE_TX_ACK)</div><div class='add'>+			cf-&gt;data[3] = CAN_ERR_PROT_LOC_ACK;</div><div class='add'>+		/* RKCANFD_REG_ERROR_CODE_TX_ERROR */</div><div class='add'>+		else if (reg_ec &amp; RKCANFD_REG_ERROR_CODE_TX_OVERLOAD)</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_OVERLOAD;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (reg_ec &amp; RKCANFD_REG_ERROR_CODE_TYPE) {</div><div class='add'>+	case FIELD_PREP_CONST(RKCANFD_REG_ERROR_CODE_TYPE,</div><div class='add'>+			      RKCANFD_REG_ERROR_CODE_TYPE_BIT):</div><div class='add'>+</div><div class='add'>+		cf-&gt;data[2] |= CAN_ERR_PROT_BIT;</div><div class='add'>+		break;</div><div class='add'>+	case FIELD_PREP_CONST(RKCANFD_REG_ERROR_CODE_TYPE,</div><div class='add'>+			      RKCANFD_REG_ERROR_CODE_TYPE_STUFF):</div><div class='add'>+		cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='add'>+		break;</div><div class='add'>+	case FIELD_PREP_CONST(RKCANFD_REG_ERROR_CODE_TYPE,</div><div class='add'>+			      RKCANFD_REG_ERROR_CODE_TYPE_FORM):</div><div class='add'>+		cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='add'>+		break;</div><div class='add'>+	case FIELD_PREP_CONST(RKCANFD_REG_ERROR_CODE_TYPE,</div><div class='add'>+			      RKCANFD_REG_ERROR_CODE_TYPE_ACK):</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_ACK;</div><div class='add'>+		break;</div><div class='add'>+	case FIELD_PREP_CONST(RKCANFD_REG_ERROR_CODE_TYPE,</div><div class='add'>+			      RKCANFD_REG_ERROR_CODE_TYPE_CRC):</div><div class='add'>+		cf-&gt;data[3] = CAN_ERR_PROT_LOC_CRC_SEQ;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rkcanfd_handle_error_int(struct rkcanfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct net_device_stats *stats = &amp;priv-&gt;ndev-&gt;stats;</div><div class='add'>+	struct can_frame *cf = NULL;</div><div class='add'>+	u32 reg_ec, timestamp;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	reg_ec = rkcanfd_read(priv, RKCANFD_REG_ERROR_CODE);</div><div class='add'>+</div><div class='add'>+	if (!reg_ec)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING) {</div><div class='add'>+		skb = rkcanfd_alloc_can_err_skb(priv, &amp;cf, &amp;timestamp);</div><div class='add'>+		if (cf) {</div><div class='add'>+			struct can_berr_counter bec;</div><div class='add'>+</div><div class='add'>+			rkcanfd_get_berr_counter_corrected(priv, &amp;bec);</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR | CAN_ERR_CNT;</div><div class='add'>+			cf-&gt;data[6] = bec.txerr;</div><div class='add'>+			cf-&gt;data[7] = bec.rxerr;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rkcanfd_handle_error_int_reg_ec(priv, cf, reg_ec);</div><div class='add'>+</div><div class='add'>+	if (!cf)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	err = can_rx_offload_queue_timestamp(&amp;priv-&gt;offload, skb, timestamp);</div><div class='add'>+	if (err)</div><div class='add'>+		stats-&gt;rx_fifo_errors++;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rkcanfd_handle_state_error_int(struct rkcanfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct net_device_stats *stats = &amp;priv-&gt;ndev-&gt;stats;</div><div class='add'>+	enum can_state new_state, rx_state, tx_state;</div><div class='add'>+	struct net_device *ndev = priv-&gt;ndev;</div><div class='add'>+	struct can_berr_counter bec;</div><div class='add'>+	struct can_frame *cf = NULL;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	u32 timestamp;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	rkcanfd_get_berr_counter_corrected(priv, &amp;bec);</div><div class='add'>+	can_state_get_by_berr_counter(ndev, &amp;bec, &amp;tx_state, &amp;rx_state);</div><div class='add'>+</div><div class='add'>+	new_state = max(tx_state, rx_state);</div><div class='add'>+	if (new_state == priv-&gt;can.state)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* The skb allocation might fail, but can_change_state()</div><div class='add'>+	 * handles cf == NULL.</div><div class='add'>+	 */</div><div class='add'>+	skb = rkcanfd_alloc_can_err_skb(priv, &amp;cf, &amp;timestamp);</div><div class='add'>+	can_change_state(ndev, cf, tx_state, rx_state);</div><div class='add'>+</div><div class='add'>+	if (new_state == CAN_STATE_BUS_OFF) {</div><div class='add'>+		rkcanfd_chip_stop(priv, CAN_STATE_BUS_OFF);</div><div class='add'>+		can_bus_off(ndev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!skb)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (new_state != CAN_STATE_BUS_OFF) {</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_CNT;</div><div class='add'>+		cf-&gt;data[6] = bec.txerr;</div><div class='add'>+		cf-&gt;data[7] = bec.rxerr;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = can_rx_offload_queue_timestamp(&amp;priv-&gt;offload, skb, timestamp);</div><div class='add'>+	if (err)</div><div class='add'>+		stats-&gt;rx_fifo_errors++;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+rkcanfd_handle_rx_fifo_overflow_int(struct rkcanfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct net_device_stats *stats = &amp;priv-&gt;ndev-&gt;stats;</div><div class='add'>+	struct can_berr_counter bec;</div><div class='add'>+	struct can_frame *cf = NULL;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	u32 timestamp;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	stats-&gt;rx_over_errors++;</div><div class='add'>+	stats-&gt;rx_errors++;</div><div class='add'>+</div><div class='add'>+	netdev_dbg(priv-&gt;ndev, "RX-FIFO overflow\n");</div><div class='add'>+</div><div class='add'>+	skb = rkcanfd_alloc_can_err_skb(priv, &amp;cf, &amp;timestamp);</div><div class='add'>+	if (!skb)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	rkcanfd_get_berr_counter_corrected(priv, &amp;bec);</div><div class='add'>+</div><div class='add'>+	cf-&gt;can_id |= CAN_ERR_CRTL | CAN_ERR_CNT;</div><div class='add'>+	cf-&gt;data[1] = CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='add'>+	cf-&gt;data[6] = bec.txerr;</div><div class='add'>+	cf-&gt;data[7] = bec.rxerr;</div><div class='add'>+</div><div class='add'>+	err = can_rx_offload_queue_timestamp(&amp;priv-&gt;offload, skb, timestamp);</div><div class='add'>+	if (err)</div><div class='add'>+		stats-&gt;rx_fifo_errors++;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define rkcanfd_handle(priv, irq, ...) \</div><div class='add'>+({ \</div><div class='add'>+	struct rkcanfd_priv *_priv = (priv); \</div><div class='add'>+	int err; \</div><div class='add'>+\</div><div class='add'>+	err = rkcanfd_handle_##irq(_priv, ## __VA_ARGS__); \</div><div class='add'>+	if (err) \</div><div class='add'>+		netdev_err(_priv-&gt;ndev, \</div><div class='add'>+			"IRQ handler rkcanfd_handle_%s() returned error: %pe\n", \</div><div class='add'>+			   __stringify(irq), ERR_PTR(err)); \</div><div class='add'>+	err; \</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+static irqreturn_t rkcanfd_irq(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct rkcanfd_priv *priv = dev_id;</div><div class='add'>+	u32 reg_int_unmasked, reg_int;</div><div class='add'>+</div><div class='add'>+	reg_int_unmasked = rkcanfd_read(priv, RKCANFD_REG_INT);</div><div class='add'>+	reg_int = reg_int_unmasked &amp; ~priv-&gt;reg_int_mask_default;</div><div class='add'>+</div><div class='add'>+	if (!reg_int)</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+</div><div class='add'>+	/* First ACK then handle, to avoid lost-IRQ race condition on</div><div class='add'>+	 * fast re-occurring interrupts.</div><div class='add'>+	 */</div><div class='add'>+	rkcanfd_write(priv, RKCANFD_REG_INT, reg_int);</div><div class='add'>+</div><div class='add'>+	if (reg_int &amp; RKCANFD_REG_INT_RX_FINISH_INT)</div><div class='add'>+		rkcanfd_handle(priv, rx_int);</div><div class='add'>+</div><div class='add'>+	if (reg_int &amp; RKCANFD_REG_INT_ERROR_INT)</div><div class='add'>+		rkcanfd_handle(priv, error_int);</div><div class='add'>+</div><div class='add'>+	if (reg_int &amp; (RKCANFD_REG_INT_BUS_OFF_INT |</div><div class='add'>+		       RKCANFD_REG_INT_PASSIVE_ERROR_INT |</div><div class='add'>+		       RKCANFD_REG_INT_ERROR_WARNING_INT) ||</div><div class='add'>+	    priv-&gt;can.state &gt; CAN_STATE_ERROR_ACTIVE)</div><div class='add'>+		rkcanfd_handle(priv, state_error_int);</div><div class='add'>+</div><div class='add'>+	if (reg_int &amp; RKCANFD_REG_INT_RX_FIFO_OVERFLOW_INT)</div><div class='add'>+		rkcanfd_handle(priv, rx_fifo_overflow_int);</div><div class='add'>+</div><div class='add'>+	if (reg_int &amp; ~(RKCANFD_REG_INT_ALL_ERROR |</div><div class='add'>+			RKCANFD_REG_INT_RX_FIFO_OVERFLOW_INT |</div><div class='add'>+			RKCANFD_REG_INT_RX_FINISH_INT))</div><div class='add'>+		netdev_err(priv-&gt;ndev, "%s: int=0x%08x\n", __func__, reg_int);</div><div class='add'>+</div><div class='add'>+	if (reg_int &amp; RKCANFD_REG_INT_WAKEUP_INT)</div><div class='add'>+		netdev_info(priv-&gt;ndev, "%s: WAKEUP_INT\n", __func__);</div><div class='add'>+</div><div class='add'>+	if (reg_int &amp; RKCANFD_REG_INT_TXE_FIFO_FULL_INT)</div><div class='add'>+		netdev_info(priv-&gt;ndev, "%s: TXE_FIFO_FULL_INT\n", __func__);</div><div class='add'>+</div><div class='add'>+	if (reg_int &amp; RKCANFD_REG_INT_TXE_FIFO_OV_INT)</div><div class='add'>+		netdev_info(priv-&gt;ndev, "%s: TXE_FIFO_OV_INT\n", __func__);</div><div class='add'>+</div><div class='add'>+	if (reg_int &amp; RKCANFD_REG_INT_BUS_OFF_RECOVERY_INT)</div><div class='add'>+		netdev_info(priv-&gt;ndev, "%s: BUS_OFF_RECOVERY_INT\n", __func__);</div><div class='add'>+</div><div class='add'>+	if (reg_int &amp; RKCANFD_REG_INT_RX_FIFO_FULL_INT)</div><div class='add'>+		netdev_info(priv-&gt;ndev, "%s: RX_FIFO_FULL_INT\n", __func__);</div><div class='add'>+</div><div class='add'>+	if (reg_int &amp; RKCANFD_REG_INT_OVERLOAD_INT)</div><div class='add'>+		netdev_info(priv-&gt;ndev, "%s: OVERLOAD_INT\n", __func__);</div><div class='add'>+</div><div class='add'>+	can_rx_offload_irq_finish(&amp;priv-&gt;offload);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rkcanfd_open(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct rkcanfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = open_candev(ndev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = pm_runtime_resume_and_get(ndev-&gt;dev.parent);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_close_candev;</div><div class='add'>+</div><div class='add'>+	rkcanfd_chip_start(priv);</div><div class='add'>+	can_rx_offload_enable(&amp;priv-&gt;offload);</div><div class='add'>+</div><div class='add'>+	err = request_irq(ndev-&gt;irq, rkcanfd_irq, IRQF_SHARED, ndev-&gt;name, priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_rkcanfd_chip_stop;</div><div class='add'>+</div><div class='add'>+	rkcanfd_chip_interrupts_enable(priv);</div><div class='add'>+</div><div class='add'>+	netif_start_queue(ndev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_rkcanfd_chip_stop:</div><div class='add'>+	rkcanfd_chip_stop_sync(priv, CAN_STATE_STOPPED);</div><div class='add'>+	pm_runtime_put(ndev-&gt;dev.parent);</div><div class='add'>+out_close_candev:</div><div class='add'>+	close_candev(ndev);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rkcanfd_stop(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct rkcanfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(ndev);</div><div class='add'>+</div><div class='add'>+	rkcanfd_chip_interrupts_disable(priv);</div><div class='add'>+	free_irq(ndev-&gt;irq, priv);</div><div class='add'>+	can_rx_offload_disable(&amp;priv-&gt;offload);</div><div class='add'>+	rkcanfd_chip_stop_sync(priv, CAN_STATE_STOPPED);</div><div class='add'>+	close_candev(ndev);</div><div class='add'>+</div><div class='add'>+	pm_runtime_put(ndev-&gt;dev.parent);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops rkcanfd_netdev_ops = {</div><div class='add'>+	.ndo_open = rkcanfd_open,</div><div class='add'>+	.ndo_stop = rkcanfd_stop,</div><div class='add'>+	.ndo_start_xmit = rkcanfd_start_xmit,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __maybe_unused rkcanfd_runtime_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct rkcanfd_priv *priv = dev_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	clk_bulk_disable_unprepare(priv-&gt;clks_num, priv-&gt;clks);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __maybe_unused rkcanfd_runtime_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct rkcanfd_priv *priv = dev_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	return clk_bulk_prepare_enable(priv-&gt;clks_num, priv-&gt;clks);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rkcanfd_register_done(const struct rkcanfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 dev_id;</div><div class='add'>+</div><div class='add'>+	dev_id = rkcanfd_read(priv, RKCANFD_REG_RTL_VERSION);</div><div class='add'>+</div><div class='add'>+	netdev_info(priv-&gt;ndev,</div><div class='add'>+		    "Rockchip-CANFD %s rev%lu.%lu (errata 0x%04x) found\n",</div><div class='add'>+		    rkcanfd_get_model_str(priv),</div><div class='add'>+		    FIELD_GET(RKCANFD_REG_RTL_VERSION_MAJOR, dev_id),</div><div class='add'>+		    FIELD_GET(RKCANFD_REG_RTL_VERSION_MINOR, dev_id),</div><div class='add'>+		    priv-&gt;devtype_data.quirks);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; RKCANFD_QUIRK_RK3568_ERRATUM_5 &amp;&amp;</div><div class='add'>+	    priv-&gt;can.clock.freq &lt; RKCANFD_ERRATUM_5_SYSCLOCK_HZ_MIN)</div><div class='add'>+		netdev_info(priv-&gt;ndev,</div><div class='add'>+			    "Erratum 5: CAN clock frequency (%luMHz) lower than known good (%luMHz), expect degraded performance\n",</div><div class='add'>+			    priv-&gt;can.clock.freq / MEGA,</div><div class='add'>+			    RKCANFD_ERRATUM_5_SYSCLOCK_HZ_MIN / MEGA);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rkcanfd_register(struct rkcanfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = priv-&gt;ndev;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	pm_runtime_enable(ndev-&gt;dev.parent);</div><div class='add'>+</div><div class='add'>+	err = pm_runtime_resume_and_get(ndev-&gt;dev.parent);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_pm_runtime_disable;</div><div class='add'>+</div><div class='add'>+	rkcanfd_ethtool_init(priv);</div><div class='add'>+</div><div class='add'>+	err = register_candev(ndev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_pm_runtime_put_sync;</div><div class='add'>+</div><div class='add'>+	rkcanfd_register_done(priv);</div><div class='add'>+</div><div class='add'>+	pm_runtime_put(ndev-&gt;dev.parent);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_pm_runtime_put_sync:</div><div class='add'>+	pm_runtime_put_sync(ndev-&gt;dev.parent);</div><div class='add'>+out_pm_runtime_disable:</div><div class='add'>+	pm_runtime_disable(ndev-&gt;dev.parent);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void rkcanfd_unregister(struct rkcanfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev	= priv-&gt;ndev;</div><div class='add'>+</div><div class='add'>+	unregister_candev(ndev);</div><div class='add'>+	pm_runtime_disable(ndev-&gt;dev.parent);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id rkcanfd_of_match[] = {</div><div class='add'>+	{</div><div class='add'>+		.compatible = "rockchip,rk3568v2-canfd",</div><div class='add'>+		.data = &amp;rkcanfd_devtype_data_rk3568v2,</div><div class='add'>+	}, {</div><div class='add'>+		.compatible = "rockchip,rk3568v3-canfd",</div><div class='add'>+		.data = &amp;rkcanfd_devtype_data_rk3568v3,</div><div class='add'>+	}, {</div><div class='add'>+		/* sentinel */</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, rkcanfd_of_match);</div><div class='add'>+</div><div class='add'>+static int rkcanfd_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct rkcanfd_priv *priv;</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	const void *match;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	ndev = alloc_candev(sizeof(struct rkcanfd_priv), RKCANFD_TXFIFO_DEPTH);</div><div class='add'>+	if (!ndev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	ndev-&gt;irq = platform_get_irq(pdev, 0);</div><div class='add'>+	if (ndev-&gt;irq &lt; 0) {</div><div class='add'>+		err = ndev-&gt;irq;</div><div class='add'>+		goto out_free_candev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;clks_num = devm_clk_bulk_get_all(&amp;pdev-&gt;dev, &amp;priv-&gt;clks);</div><div class='add'>+	if (priv-&gt;clks_num &lt; 0) {</div><div class='add'>+		err = priv-&gt;clks_num;</div><div class='add'>+		goto out_free_candev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;regs = devm_platform_ioremap_resource(pdev, 0);</div><div class='add'>+	if (IS_ERR(priv-&gt;regs)) {</div><div class='add'>+		err = PTR_ERR(priv-&gt;regs);</div><div class='add'>+		goto out_free_candev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;reset = devm_reset_control_array_get_exclusive(&amp;pdev-&gt;dev);</div><div class='add'>+	if (IS_ERR(priv-&gt;reset)) {</div><div class='add'>+		err = dev_err_probe(&amp;pdev-&gt;dev, PTR_ERR(priv-&gt;reset),</div><div class='add'>+				    "Failed to get reset line\n");</div><div class='add'>+		goto out_free_candev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	SET_NETDEV_DEV(ndev, &amp;pdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	ndev-&gt;netdev_ops = &amp;rkcanfd_netdev_ops;</div><div class='add'>+	ndev-&gt;flags |= IFF_ECHO;</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, priv);</div><div class='add'>+	priv-&gt;can.clock.freq = clk_get_rate(priv-&gt;clks[0].clk);</div><div class='add'>+	priv-&gt;can.bittiming_const = &amp;rkcanfd_bittiming_const;</div><div class='add'>+	priv-&gt;can.fd.data_bittiming_const = &amp;rkcanfd_data_bittiming_const;</div><div class='add'>+	priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK |</div><div class='add'>+		CAN_CTRLMODE_BERR_REPORTING;</div><div class='add'>+	priv-&gt;can.do_set_mode = rkcanfd_set_mode;</div><div class='add'>+	priv-&gt;can.do_get_berr_counter = rkcanfd_get_berr_counter;</div><div class='add'>+	priv-&gt;ndev = ndev;</div><div class='add'>+</div><div class='add'>+	match = device_get_match_data(&amp;pdev-&gt;dev);</div><div class='add'>+	if (match) {</div><div class='add'>+		priv-&gt;devtype_data = *(struct rkcanfd_devtype_data *)match;</div><div class='add'>+		if (!(priv-&gt;devtype_data.quirks &amp; RKCANFD_QUIRK_CANFD_BROKEN))</div><div class='add'>+			priv-&gt;can.ctrlmode_supported |= CAN_CTRLMODE_FD;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = can_rx_offload_add_manual(ndev, &amp;priv-&gt;offload,</div><div class='add'>+					RKCANFD_NAPI_WEIGHT);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_free_candev;</div><div class='add'>+</div><div class='add'>+	err = rkcanfd_register(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_can_rx_offload_del;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_can_rx_offload_del:</div><div class='add'>+	can_rx_offload_del(&amp;priv-&gt;offload);</div><div class='add'>+out_free_candev:</div><div class='add'>+	free_candev(ndev);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rkcanfd_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct rkcanfd_priv *priv = platform_get_drvdata(pdev);</div><div class='add'>+	struct net_device *ndev = priv-&gt;ndev;</div><div class='add'>+</div><div class='add'>+	rkcanfd_unregister(priv);</div><div class='add'>+	can_rx_offload_del(&amp;priv-&gt;offload);</div><div class='add'>+	free_candev(ndev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct dev_pm_ops rkcanfd_pm_ops = {</div><div class='add'>+	SET_RUNTIME_PM_OPS(rkcanfd_runtime_suspend,</div><div class='add'>+			   rkcanfd_runtime_resume, NULL)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct platform_driver rkcanfd_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = DEVICE_NAME,</div><div class='add'>+		.pm = &amp;rkcanfd_pm_ops,</div><div class='add'>+		.of_match_table = rkcanfd_of_match,</div><div class='add'>+	},</div><div class='add'>+	.probe = rkcanfd_probe,</div><div class='add'>+	.remove = rkcanfd_remove,</div><div class='add'>+};</div><div class='add'>+module_platform_driver(rkcanfd_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Marc Kleine-Budde &lt;mkl@pengutronix.de&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Rockchip CAN-FD Driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/can/rockchip/rockchip_canfd-ethtool.c b/drivers/net/can/rockchip/rockchip_canfd-ethtool.c<br/>new file mode 100644<br/>index 000000000000..5aeeef64a67a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/rockchip/rockchip_canfd-ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/rockchip/rockchip_canfd-ethtool.c</a></div><div class='hunk'>@@ -0,0 +1,73 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+//</div><div class='add'>+// Copyright (c) 2023, 2024 Pengutronix,</div><div class='add'>+//               Marc Kleine-Budde &lt;kernel@pengutronix.de&gt;</div><div class='add'>+//</div><div class='add'>+</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+</div><div class='add'>+#include "rockchip_canfd.h"</div><div class='add'>+</div><div class='add'>+enum rkcanfd_stats_type {</div><div class='add'>+	RKCANFD_STATS_TYPE_RX_FIFO_EMPTY_ERRORS,</div><div class='add'>+	RKCANFD_STATS_TYPE_TX_EXTENDED_AS_STANDARD_ERRORS,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char rkcanfd_stats_strings[][ETH_GSTRING_LEN] = {</div><div class='add'>+	[RKCANFD_STATS_TYPE_RX_FIFO_EMPTY_ERRORS] = "rx_fifo_empty_errors",</div><div class='add'>+	[RKCANFD_STATS_TYPE_TX_EXTENDED_AS_STANDARD_ERRORS] = "tx_extended_as_standard_errors",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+rkcanfd_ethtool_get_strings(struct net_device *ndev, u32 stringset, u8 *buf)</div><div class='add'>+{</div><div class='add'>+	switch (stringset) {</div><div class='add'>+	case ETH_SS_STATS:</div><div class='add'>+		memcpy(buf, rkcanfd_stats_strings,</div><div class='add'>+		       sizeof(rkcanfd_stats_strings));</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rkcanfd_ethtool_get_sset_count(struct net_device *netdev, int sset)</div><div class='add'>+{</div><div class='add'>+	switch (sset) {</div><div class='add'>+	case ETH_SS_STATS:</div><div class='add'>+		return ARRAY_SIZE(rkcanfd_stats_strings);</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+rkcanfd_ethtool_get_ethtool_stats(struct net_device *ndev,</div><div class='add'>+				  struct ethtool_stats *stats, u64 *data)</div><div class='add'>+{</div><div class='add'>+	struct rkcanfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct rkcanfd_stats *rkcanfd_stats;</div><div class='add'>+	unsigned int start;</div><div class='add'>+</div><div class='add'>+	rkcanfd_stats = &amp;priv-&gt;stats;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		start = u64_stats_fetch_begin(&amp;rkcanfd_stats-&gt;syncp);</div><div class='add'>+</div><div class='add'>+		data[RKCANFD_STATS_TYPE_RX_FIFO_EMPTY_ERRORS] =</div><div class='add'>+			u64_stats_read(&amp;rkcanfd_stats-&gt;rx_fifo_empty_errors);</div><div class='add'>+		data[RKCANFD_STATS_TYPE_TX_EXTENDED_AS_STANDARD_ERRORS] =</div><div class='add'>+			u64_stats_read(&amp;rkcanfd_stats-&gt;tx_extended_as_standard_errors);</div><div class='add'>+	} while (u64_stats_fetch_retry(&amp;rkcanfd_stats-&gt;syncp, start));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops rkcanfd_ethtool_ops = {</div><div class='add'>+	.get_ts_info = can_ethtool_op_get_ts_info_hwts,</div><div class='add'>+	.get_strings = rkcanfd_ethtool_get_strings,</div><div class='add'>+	.get_sset_count = rkcanfd_ethtool_get_sset_count,</div><div class='add'>+	.get_ethtool_stats = rkcanfd_ethtool_get_ethtool_stats,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void rkcanfd_ethtool_init(struct rkcanfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	priv-&gt;ndev-&gt;ethtool_ops = &amp;rkcanfd_ethtool_ops;</div><div class='add'>+</div><div class='add'>+	u64_stats_init(&amp;priv-&gt;stats.syncp);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/can/rockchip/rockchip_canfd-rx.c b/drivers/net/can/rockchip/rockchip_canfd-rx.c<br/>new file mode 100644<br/>index 000000000000..475c0409e215<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/rockchip/rockchip_canfd-rx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/rockchip/rockchip_canfd-rx.c</a></div><div class='hunk'>@@ -0,0 +1,299 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+//</div><div class='add'>+// Copyright (c) 2023, 2024 Pengutronix,</div><div class='add'>+//               Marc Kleine-Budde &lt;kernel@pengutronix.de&gt;</div><div class='add'>+//</div><div class='add'>+</div><div class='add'>+#include &lt;net/netdev_queues.h&gt;</div><div class='add'>+</div><div class='add'>+#include "rockchip_canfd.h"</div><div class='add'>+</div><div class='add'>+static bool rkcanfd_can_frame_header_equal(const struct canfd_frame *const cfd1,</div><div class='add'>+					   const struct canfd_frame *const cfd2,</div><div class='add'>+					   const bool is_canfd)</div><div class='add'>+{</div><div class='add'>+	const u8 mask_flags = CANFD_BRS | CANFD_ESI | CANFD_FDF;</div><div class='add'>+	canid_t mask = CAN_EFF_FLAG;</div><div class='add'>+</div><div class='add'>+	if (canfd_sanitize_len(cfd1-&gt;len) != canfd_sanitize_len(cfd2-&gt;len))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (!is_canfd)</div><div class='add'>+		mask |= CAN_RTR_FLAG;</div><div class='add'>+</div><div class='add'>+	if (cfd1-&gt;can_id &amp; CAN_EFF_FLAG)</div><div class='add'>+		mask |= CAN_EFF_MASK;</div><div class='add'>+	else</div><div class='add'>+		mask |= CAN_SFF_MASK;</div><div class='add'>+</div><div class='add'>+	if ((cfd1-&gt;can_id &amp; mask) != (cfd2-&gt;can_id &amp; mask))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (is_canfd &amp;&amp;</div><div class='add'>+	    (cfd1-&gt;flags &amp; mask_flags) != (cfd2-&gt;flags &amp; mask_flags))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool rkcanfd_can_frame_data_equal(const struct canfd_frame *cfd1,</div><div class='add'>+					 const struct canfd_frame *cfd2,</div><div class='add'>+					 const bool is_canfd)</div><div class='add'>+{</div><div class='add'>+	u8 len;</div><div class='add'>+</div><div class='add'>+	if (!is_canfd &amp;&amp; (cfd1-&gt;can_id &amp; CAN_RTR_FLAG))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	len = canfd_sanitize_len(cfd1-&gt;len);</div><div class='add'>+</div><div class='add'>+	return !memcmp(cfd1-&gt;data, cfd2-&gt;data, len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int</div><div class='add'>+rkcanfd_fifo_header_to_cfd_header(const struct rkcanfd_priv *priv,</div><div class='add'>+				  const struct rkcanfd_fifo_header *header,</div><div class='add'>+				  struct canfd_frame *cfd)</div><div class='add'>+{</div><div class='add'>+	unsigned int len = sizeof(*cfd) - sizeof(cfd-&gt;data);</div><div class='add'>+	u8 dlc;</div><div class='add'>+</div><div class='add'>+	if (header-&gt;frameinfo &amp; RKCANFD_REG_FD_FRAMEINFO_FRAME_FORMAT)</div><div class='add'>+		cfd-&gt;can_id = FIELD_GET(RKCANFD_REG_FD_ID_EFF, header-&gt;id) |</div><div class='add'>+			CAN_EFF_FLAG;</div><div class='add'>+	else</div><div class='add'>+		cfd-&gt;can_id = FIELD_GET(RKCANFD_REG_FD_ID_SFF, header-&gt;id);</div><div class='add'>+</div><div class='add'>+	dlc = FIELD_GET(RKCANFD_REG_FD_FRAMEINFO_DATA_LENGTH,</div><div class='add'>+			header-&gt;frameinfo);</div><div class='add'>+</div><div class='add'>+	/* CAN-FD */</div><div class='add'>+	if (header-&gt;frameinfo &amp; RKCANFD_REG_FD_FRAMEINFO_FDF) {</div><div class='add'>+		cfd-&gt;len = can_fd_dlc2len(dlc);</div><div class='add'>+</div><div class='add'>+		/* The cfd is not allocated by alloc_canfd_skb(), so</div><div class='add'>+		 * set CANFD_FDF here.</div><div class='add'>+		 */</div><div class='add'>+		cfd-&gt;flags |= CANFD_FDF;</div><div class='add'>+</div><div class='add'>+		if (header-&gt;frameinfo &amp; RKCANFD_REG_FD_FRAMEINFO_BRS)</div><div class='add'>+			cfd-&gt;flags |= CANFD_BRS;</div><div class='add'>+	} else {</div><div class='add'>+		cfd-&gt;len = can_cc_dlc2len(dlc);</div><div class='add'>+</div><div class='add'>+		if (header-&gt;frameinfo &amp; RKCANFD_REG_FD_FRAMEINFO_RTR) {</div><div class='add'>+			cfd-&gt;can_id |= CAN_RTR_FLAG;</div><div class='add'>+</div><div class='add'>+			return len;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return len + cfd-&gt;len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rkcanfd_rxstx_filter(struct rkcanfd_priv *priv,</div><div class='add'>+				const struct canfd_frame *cfd_rx, const u32 ts,</div><div class='add'>+				bool *tx_done)</div><div class='add'>+{</div><div class='add'>+	struct net_device_stats *stats = &amp;priv-&gt;ndev-&gt;stats;</div><div class='add'>+	struct rkcanfd_stats *rkcanfd_stats = &amp;priv-&gt;stats;</div><div class='add'>+	const struct canfd_frame *cfd_nominal;</div><div class='add'>+	const struct sk_buff *skb;</div><div class='add'>+	unsigned int tx_tail;</div><div class='add'>+</div><div class='add'>+	tx_tail = rkcanfd_get_tx_tail(priv);</div><div class='add'>+	skb = priv-&gt;can.echo_skb[tx_tail];</div><div class='add'>+	if (!skb) {</div><div class='add'>+		netdev_err(priv-&gt;ndev,</div><div class='add'>+			   "%s: echo_skb[%u]=NULL tx_head=0x%08x tx_tail=0x%08x\n",</div><div class='add'>+			   __func__, tx_tail,</div><div class='add'>+			   priv-&gt;tx_head, priv-&gt;tx_tail);</div><div class='add'>+</div><div class='add'>+		return -ENOMSG;</div><div class='add'>+	}</div><div class='add'>+	cfd_nominal = (struct canfd_frame *)skb-&gt;data;</div><div class='add'>+</div><div class='add'>+	/* We RX'ed a frame identical to our pending TX frame. */</div><div class='add'>+	if (rkcanfd_can_frame_header_equal(cfd_rx, cfd_nominal,</div><div class='add'>+					   cfd_rx-&gt;flags &amp; CANFD_FDF) &amp;&amp;</div><div class='add'>+	    rkcanfd_can_frame_data_equal(cfd_rx, cfd_nominal,</div><div class='add'>+					 cfd_rx-&gt;flags &amp; CANFD_FDF)) {</div><div class='add'>+		unsigned int frame_len;</div><div class='add'>+</div><div class='add'>+		rkcanfd_handle_tx_done_one(priv, ts, &amp;frame_len);</div><div class='add'>+</div><div class='add'>+		WRITE_ONCE(priv-&gt;tx_tail, priv-&gt;tx_tail + 1);</div><div class='add'>+		netif_subqueue_completed_wake(priv-&gt;ndev, 0, 1, frame_len,</div><div class='add'>+					      rkcanfd_get_effective_tx_free(priv),</div><div class='add'>+					      RKCANFD_TX_START_THRESHOLD);</div><div class='add'>+</div><div class='add'>+		*tx_done = true;</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!(priv-&gt;devtype_data.quirks &amp; RKCANFD_QUIRK_RK3568_ERRATUM_6))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Erratum 6: Extended frames may be send as standard frames.</div><div class='add'>+	 *</div><div class='add'>+	 * Not affected if:</div><div class='add'>+	 * - TX'ed a standard frame -or-</div><div class='add'>+	 * - RX'ed an extended frame</div><div class='add'>+	 */</div><div class='add'>+	if (!(cfd_nominal-&gt;can_id &amp; CAN_EFF_FLAG) ||</div><div class='add'>+	    (cfd_rx-&gt;can_id &amp; CAN_EFF_FLAG))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Not affected if:</div><div class='add'>+	 * - standard part and RTR flag of the TX'ed frame</div><div class='add'>+	 *   is not equal the CAN-ID and RTR flag of the RX'ed frame.</div><div class='add'>+	 */</div><div class='add'>+	if ((cfd_nominal-&gt;can_id &amp; (CAN_RTR_FLAG | CAN_SFF_MASK)) !=</div><div class='add'>+	    (cfd_rx-&gt;can_id &amp; (CAN_RTR_FLAG | CAN_SFF_MASK)))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Not affected if:</div><div class='add'>+	 * - length is not the same</div><div class='add'>+	 */</div><div class='add'>+	if (cfd_nominal-&gt;len != cfd_rx-&gt;len)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Not affected if:</div><div class='add'>+	 * - the data of non RTR frames is different</div><div class='add'>+	 */</div><div class='add'>+	if (!(cfd_nominal-&gt;can_id &amp; CAN_RTR_FLAG) &amp;&amp;</div><div class='add'>+	    memcmp(cfd_nominal-&gt;data, cfd_rx-&gt;data, cfd_nominal-&gt;len))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Affected by Erratum 6 */</div><div class='add'>+	u64_stats_update_begin(&amp;rkcanfd_stats-&gt;syncp);</div><div class='add'>+	u64_stats_inc(&amp;rkcanfd_stats-&gt;tx_extended_as_standard_errors);</div><div class='add'>+	u64_stats_update_end(&amp;rkcanfd_stats-&gt;syncp);</div><div class='add'>+</div><div class='add'>+	/* Manual handling of CAN Bus Error counters. See</div><div class='add'>+	 * rkcanfd_get_corrected_berr_counter() for detailed</div><div class='add'>+	 * explanation.</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;bec.txerr)</div><div class='add'>+		priv-&gt;bec.txerr--;</div><div class='add'>+</div><div class='add'>+	*tx_done = true;</div><div class='add'>+</div><div class='add'>+	stats-&gt;tx_packets++;</div><div class='add'>+	stats-&gt;tx_errors++;</div><div class='add'>+</div><div class='add'>+	rkcanfd_xmit_retry(priv);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool</div><div class='add'>+rkcanfd_fifo_header_empty(const struct rkcanfd_fifo_header *header)</div><div class='add'>+{</div><div class='add'>+	/* Erratum 5: If the FIFO is empty, we read the same value for</div><div class='add'>+	 * all elements.</div><div class='add'>+	 */</div><div class='add'>+	return header-&gt;frameinfo == header-&gt;id &amp;&amp;</div><div class='add'>+		header-&gt;frameinfo == header-&gt;ts;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rkcanfd_handle_rx_int_one(struct rkcanfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct net_device_stats *stats = &amp;priv-&gt;ndev-&gt;stats;</div><div class='add'>+	struct canfd_frame cfd[1] = { }, *skb_cfd;</div><div class='add'>+	struct rkcanfd_fifo_header header[1] = { };</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	unsigned int len;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* read header into separate struct and convert it later */</div><div class='add'>+	rkcanfd_read_rep(priv, RKCANFD_REG_RX_FIFO_RDATA,</div><div class='add'>+			 header, sizeof(*header));</div><div class='add'>+	/* read data directly into cfd */</div><div class='add'>+	rkcanfd_read_rep(priv, RKCANFD_REG_RX_FIFO_RDATA,</div><div class='add'>+			 cfd-&gt;data, sizeof(cfd-&gt;data));</div><div class='add'>+</div><div class='add'>+	/* Erratum 5: Counters for TXEFIFO and RXFIFO may be wrong */</div><div class='add'>+	if (rkcanfd_fifo_header_empty(header)) {</div><div class='add'>+		struct rkcanfd_stats *rkcanfd_stats = &amp;priv-&gt;stats;</div><div class='add'>+</div><div class='add'>+		u64_stats_update_begin(&amp;rkcanfd_stats-&gt;syncp);</div><div class='add'>+		u64_stats_inc(&amp;rkcanfd_stats-&gt;rx_fifo_empty_errors);</div><div class='add'>+		u64_stats_update_end(&amp;rkcanfd_stats-&gt;syncp);</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	len = rkcanfd_fifo_header_to_cfd_header(priv, header, cfd);</div><div class='add'>+</div><div class='add'>+	/* Drop any received CAN-FD frames if CAN-FD mode is not</div><div class='add'>+	 * requested.</div><div class='add'>+	 */</div><div class='add'>+	if (header-&gt;frameinfo &amp; RKCANFD_REG_FD_FRAMEINFO_FDF &amp;&amp;</div><div class='add'>+	    !(priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD)) {</div><div class='add'>+		stats-&gt;rx_dropped++;</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rkcanfd_get_tx_pending(priv)) {</div><div class='add'>+		bool tx_done = false;</div><div class='add'>+</div><div class='add'>+		err = rkcanfd_rxstx_filter(priv, cfd, header-&gt;ts, &amp;tx_done);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+		if (tx_done &amp;&amp; !(priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LOOPBACK))</div><div class='add'>+			return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Manual handling of CAN Bus Error counters. See</div><div class='add'>+	 * rkcanfd_get_corrected_berr_counter() for detailed</div><div class='add'>+	 * explanation.</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;bec.rxerr)</div><div class='add'>+		priv-&gt;bec.rxerr = min(CAN_ERROR_PASSIVE_THRESHOLD,</div><div class='add'>+				      priv-&gt;bec.rxerr) - 1;</div><div class='add'>+</div><div class='add'>+	if (header-&gt;frameinfo &amp; RKCANFD_REG_FD_FRAMEINFO_FDF)</div><div class='add'>+		skb = alloc_canfd_skb(priv-&gt;ndev, &amp;skb_cfd);</div><div class='add'>+	else</div><div class='add'>+		skb = alloc_can_skb(priv-&gt;ndev, (struct can_frame **)&amp;skb_cfd);</div><div class='add'>+</div><div class='add'>+	if (!skb) {</div><div class='add'>+		stats-&gt;rx_dropped++;</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(skb_cfd, cfd, len);</div><div class='add'>+	rkcanfd_skb_set_timestamp(priv, skb, header-&gt;ts);</div><div class='add'>+</div><div class='add'>+	err = can_rx_offload_queue_timestamp(&amp;priv-&gt;offload, skb, header-&gt;ts);</div><div class='add'>+	if (err)</div><div class='add'>+		stats-&gt;rx_fifo_errors++;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int</div><div class='add'>+rkcanfd_rx_fifo_get_len(const struct rkcanfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	const u32 reg = rkcanfd_read(priv, RKCANFD_REG_RX_FIFO_CTRL);</div><div class='add'>+</div><div class='add'>+	return FIELD_GET(RKCANFD_REG_RX_FIFO_CTRL_RX_FIFO_CNT, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int rkcanfd_handle_rx_int(struct rkcanfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	unsigned int len;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	while ((len = rkcanfd_rx_fifo_get_len(priv))) {</div><div class='add'>+		err = rkcanfd_handle_rx_int_one(priv);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/can/rockchip/rockchip_canfd-timestamp.c b/drivers/net/can/rockchip/rockchip_canfd-timestamp.c<br/>new file mode 100644<br/>index 000000000000..72774cd2f94b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/rockchip/rockchip_canfd-timestamp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/rockchip/rockchip_canfd-timestamp.c</a></div><div class='hunk'>@@ -0,0 +1,105 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+//</div><div class='add'>+// Copyright (c) 2023, 2024 Pengutronix,</div><div class='add'>+//               Marc Kleine-Budde &lt;kernel@pengutronix.de&gt;</div><div class='add'>+//</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clocksource.h&gt;</div><div class='add'>+</div><div class='add'>+#include "rockchip_canfd.h"</div><div class='add'>+</div><div class='add'>+static u64 rkcanfd_timestamp_read(struct cyclecounter *cc)</div><div class='add'>+{</div><div class='add'>+	const struct rkcanfd_priv *priv = container_of(cc, struct rkcanfd_priv, cc);</div><div class='add'>+</div><div class='add'>+	return rkcanfd_get_timestamp(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void rkcanfd_skb_set_timestamp(const struct rkcanfd_priv *priv,</div><div class='add'>+			       struct sk_buff *skb, const u32 timestamp)</div><div class='add'>+{</div><div class='add'>+	struct skb_shared_hwtstamps *hwtstamps = skb_hwtstamps(skb);</div><div class='add'>+	u64 ns;</div><div class='add'>+</div><div class='add'>+	ns = timecounter_cyc2time(&amp;priv-&gt;tc, timestamp);</div><div class='add'>+</div><div class='add'>+	hwtstamps-&gt;hwtstamp = ns_to_ktime(ns);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rkcanfd_timestamp_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	const struct delayed_work *delayed_work = to_delayed_work(work);</div><div class='add'>+	struct rkcanfd_priv *priv;</div><div class='add'>+</div><div class='add'>+	priv = container_of(delayed_work, struct rkcanfd_priv, timestamp);</div><div class='add'>+	timecounter_read(&amp;priv-&gt;tc);</div><div class='add'>+</div><div class='add'>+	schedule_delayed_work(&amp;priv-&gt;timestamp, priv-&gt;work_delay_jiffies);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void rkcanfd_timestamp_init(struct rkcanfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	const struct can_bittiming *dbt = &amp;priv-&gt;can.fd.data_bittiming;</div><div class='add'>+	const struct can_bittiming *bt = &amp;priv-&gt;can.bittiming;</div><div class='add'>+	struct cyclecounter *cc = &amp;priv-&gt;cc;</div><div class='add'>+	u32 bitrate, div, reg, rate;</div><div class='add'>+	u64 work_delay_ns;</div><div class='add'>+	u64 max_cycles;</div><div class='add'>+</div><div class='add'>+	/* At the standard clock rate of 300Mhz on the rk3658, the 32</div><div class='add'>+	 * bit timer overflows every 14s. This means that we have to</div><div class='add'>+	 * poll it quite often to avoid missing a wrap around.</div><div class='add'>+	 *</div><div class='add'>+	 * Divide it down to a reasonable rate, at least twice the bit</div><div class='add'>+	 * rate.</div><div class='add'>+	 */</div><div class='add'>+	bitrate = max(bt-&gt;bitrate, dbt-&gt;bitrate);</div><div class='add'>+	div = min(DIV_ROUND_UP(priv-&gt;can.clock.freq, bitrate * 2),</div><div class='add'>+		  FIELD_MAX(RKCANFD_REG_TIMESTAMP_CTRL_TIME_BASE_COUNTER_PRESCALE) + 1);</div><div class='add'>+</div><div class='add'>+	reg = FIELD_PREP(RKCANFD_REG_TIMESTAMP_CTRL_TIME_BASE_COUNTER_PRESCALE,</div><div class='add'>+			 div - 1) |</div><div class='add'>+		RKCANFD_REG_TIMESTAMP_CTRL_TIME_BASE_COUNTER_ENABLE;</div><div class='add'>+	rkcanfd_write(priv, RKCANFD_REG_TIMESTAMP_CTRL, reg);</div><div class='add'>+</div><div class='add'>+	cc-&gt;read = rkcanfd_timestamp_read;</div><div class='add'>+	cc-&gt;mask = CYCLECOUNTER_MASK(32);</div><div class='add'>+</div><div class='add'>+	rate = priv-&gt;can.clock.freq / div;</div><div class='add'>+	clocks_calc_mult_shift(&amp;cc-&gt;mult, &amp;cc-&gt;shift, rate, NSEC_PER_SEC,</div><div class='add'>+			       RKCANFD_TIMESTAMP_WORK_MAX_DELAY_SEC);</div><div class='add'>+</div><div class='add'>+	max_cycles = div_u64(ULLONG_MAX, cc-&gt;mult);</div><div class='add'>+	max_cycles = min(max_cycles, cc-&gt;mask);</div><div class='add'>+	work_delay_ns = clocksource_cyc2ns(max_cycles, cc-&gt;mult, cc-&gt;shift);</div><div class='add'>+	priv-&gt;work_delay_jiffies = div_u64(work_delay_ns, 3u * NSEC_PER_SEC / HZ);</div><div class='add'>+	INIT_DELAYED_WORK(&amp;priv-&gt;timestamp, rkcanfd_timestamp_work);</div><div class='add'>+</div><div class='add'>+	netdev_dbg(priv-&gt;ndev, "clock=%lu.%02luMHz bitrate=%lu.%02luMBit/s div=%u rate=%lu.%02luMHz mult=%u shift=%u delay=%lus\n",</div><div class='add'>+		   priv-&gt;can.clock.freq / MEGA,</div><div class='add'>+		   priv-&gt;can.clock.freq % MEGA / KILO / 10,</div><div class='add'>+		   bitrate / MEGA,</div><div class='add'>+		   bitrate % MEGA / KILO / 100,</div><div class='add'>+		   div,</div><div class='add'>+		   rate / MEGA,</div><div class='add'>+		   rate % MEGA / KILO / 10,</div><div class='add'>+		   cc-&gt;mult, cc-&gt;shift,</div><div class='add'>+		   priv-&gt;work_delay_jiffies / HZ);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void rkcanfd_timestamp_start(struct rkcanfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	timecounter_init(&amp;priv-&gt;tc, &amp;priv-&gt;cc, ktime_get_real_ns());</div><div class='add'>+</div><div class='add'>+	schedule_delayed_work(&amp;priv-&gt;timestamp, priv-&gt;work_delay_jiffies);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void rkcanfd_timestamp_stop(struct rkcanfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	cancel_delayed_work(&amp;priv-&gt;timestamp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void rkcanfd_timestamp_stop_sync(struct rkcanfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	cancel_delayed_work_sync(&amp;priv-&gt;timestamp);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/can/rockchip/rockchip_canfd-tx.c b/drivers/net/can/rockchip/rockchip_canfd-tx.c<br/>new file mode 100644<br/>index 000000000000..12200dcfd338<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/rockchip/rockchip_canfd-tx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/rockchip/rockchip_canfd-tx.c</a></div><div class='hunk'>@@ -0,0 +1,167 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+//</div><div class='add'>+// Copyright (c) 2023, 2024 Pengutronix,</div><div class='add'>+//               Marc Kleine-Budde &lt;kernel@pengutronix.de&gt;</div><div class='add'>+//</div><div class='add'>+</div><div class='add'>+#include &lt;net/netdev_queues.h&gt;</div><div class='add'>+</div><div class='add'>+#include "rockchip_canfd.h"</div><div class='add'>+</div><div class='add'>+static bool rkcanfd_tx_tail_is_eff(const struct rkcanfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	const struct canfd_frame *cfd;</div><div class='add'>+	const struct sk_buff *skb;</div><div class='add'>+	unsigned int tx_tail;</div><div class='add'>+</div><div class='add'>+	if (!rkcanfd_get_tx_pending(priv))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	tx_tail = rkcanfd_get_tx_tail(priv);</div><div class='add'>+	skb = priv-&gt;can.echo_skb[tx_tail];</div><div class='add'>+	if (!skb) {</div><div class='add'>+		netdev_err(priv-&gt;ndev,</div><div class='add'>+			   "%s: echo_skb[%u]=NULL tx_head=0x%08x tx_tail=0x%08x\n",</div><div class='add'>+			   __func__, tx_tail,</div><div class='add'>+			   priv-&gt;tx_head, priv-&gt;tx_tail);</div><div class='add'>+</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cfd = (struct canfd_frame *)skb-&gt;data;</div><div class='add'>+</div><div class='add'>+	return cfd-&gt;can_id &amp; CAN_EFF_FLAG;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+unsigned int rkcanfd_get_effective_tx_free(const struct rkcanfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; RKCANFD_QUIRK_RK3568_ERRATUM_6 &amp;&amp;</div><div class='add'>+	    rkcanfd_tx_tail_is_eff(priv))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return rkcanfd_get_tx_free(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rkcanfd_start_xmit_write_cmd(const struct rkcanfd_priv *priv,</div><div class='add'>+					 const u32 reg_cmd)</div><div class='add'>+{</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; RKCANFD_QUIRK_RK3568_ERRATUM_12)</div><div class='add'>+		rkcanfd_write(priv, RKCANFD_REG_MODE, priv-&gt;reg_mode_default |</div><div class='add'>+			      RKCANFD_REG_MODE_SPACE_RX_MODE);</div><div class='add'>+</div><div class='add'>+	rkcanfd_write(priv, RKCANFD_REG_CMD, reg_cmd);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; RKCANFD_QUIRK_RK3568_ERRATUM_12)</div><div class='add'>+		rkcanfd_write(priv, RKCANFD_REG_MODE, priv-&gt;reg_mode_default);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void rkcanfd_xmit_retry(struct rkcanfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	const unsigned int tx_head = rkcanfd_get_tx_head(priv);</div><div class='add'>+	const u32 reg_cmd = RKCANFD_REG_CMD_TX_REQ(tx_head);</div><div class='add'>+</div><div class='add'>+	rkcanfd_start_xmit_write_cmd(priv, reg_cmd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+netdev_tx_t rkcanfd_start_xmit(struct sk_buff *skb, struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct rkcanfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	u32 reg_frameinfo, reg_id, reg_cmd;</div><div class='add'>+	unsigned int tx_head, frame_len;</div><div class='add'>+	const struct canfd_frame *cfd;</div><div class='add'>+	int err;</div><div class='add'>+	u8 i;</div><div class='add'>+</div><div class='add'>+	if (can_dev_dropped_skb(ndev, skb))</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+	if (!netif_subqueue_maybe_stop(priv-&gt;ndev, 0,</div><div class='add'>+				       rkcanfd_get_effective_tx_free(priv),</div><div class='add'>+				       RKCANFD_TX_STOP_THRESHOLD,</div><div class='add'>+				       RKCANFD_TX_START_THRESHOLD)) {</div><div class='add'>+		if (net_ratelimit())</div><div class='add'>+			netdev_info(priv-&gt;ndev,</div><div class='add'>+				    "Stopping tx-queue (tx_head=0x%08x, tx_tail=0x%08x, tx_pending=%d)\n",</div><div class='add'>+				    priv-&gt;tx_head, priv-&gt;tx_tail,</div><div class='add'>+				    rkcanfd_get_tx_pending(priv));</div><div class='add'>+</div><div class='add'>+		return NETDEV_TX_BUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cfd = (struct canfd_frame *)skb-&gt;data;</div><div class='add'>+</div><div class='add'>+	if (cfd-&gt;can_id &amp; CAN_EFF_FLAG) {</div><div class='add'>+		reg_frameinfo = RKCANFD_REG_FD_FRAMEINFO_FRAME_FORMAT;</div><div class='add'>+		reg_id = FIELD_PREP(RKCANFD_REG_FD_ID_EFF, cfd-&gt;can_id);</div><div class='add'>+	} else {</div><div class='add'>+		reg_frameinfo = 0;</div><div class='add'>+		reg_id = FIELD_PREP(RKCANFD_REG_FD_ID_SFF, cfd-&gt;can_id);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cfd-&gt;can_id &amp; CAN_RTR_FLAG)</div><div class='add'>+		reg_frameinfo |= RKCANFD_REG_FD_FRAMEINFO_RTR;</div><div class='add'>+</div><div class='add'>+	if (can_is_canfd_skb(skb)) {</div><div class='add'>+		reg_frameinfo |= RKCANFD_REG_FD_FRAMEINFO_FDF;</div><div class='add'>+</div><div class='add'>+		if (cfd-&gt;flags &amp; CANFD_BRS)</div><div class='add'>+			reg_frameinfo |= RKCANFD_REG_FD_FRAMEINFO_BRS;</div><div class='add'>+</div><div class='add'>+		reg_frameinfo |= FIELD_PREP(RKCANFD_REG_FD_FRAMEINFO_DATA_LENGTH,</div><div class='add'>+					    can_fd_len2dlc(cfd-&gt;len));</div><div class='add'>+	} else {</div><div class='add'>+		reg_frameinfo |= FIELD_PREP(RKCANFD_REG_FD_FRAMEINFO_DATA_LENGTH,</div><div class='add'>+					    cfd-&gt;len);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tx_head = rkcanfd_get_tx_head(priv);</div><div class='add'>+	reg_cmd = RKCANFD_REG_CMD_TX_REQ(tx_head);</div><div class='add'>+</div><div class='add'>+	rkcanfd_write(priv, RKCANFD_REG_FD_TXFRAMEINFO, reg_frameinfo);</div><div class='add'>+	rkcanfd_write(priv, RKCANFD_REG_FD_TXID, reg_id);</div><div class='add'>+	for (i = 0; i &lt; cfd-&gt;len; i += 4)</div><div class='add'>+		rkcanfd_write(priv, RKCANFD_REG_FD_TXDATA0 + i,</div><div class='add'>+			      *(u32 *)(cfd-&gt;data + i));</div><div class='add'>+</div><div class='add'>+	frame_len = can_skb_get_frame_len(skb);</div><div class='add'>+	err = can_put_echo_skb(skb, ndev, tx_head, frame_len);</div><div class='add'>+	if (!err)</div><div class='add'>+		netdev_sent_queue(priv-&gt;ndev, frame_len);</div><div class='add'>+</div><div class='add'>+	WRITE_ONCE(priv-&gt;tx_head, priv-&gt;tx_head + 1);</div><div class='add'>+</div><div class='add'>+	rkcanfd_start_xmit_write_cmd(priv, reg_cmd);</div><div class='add'>+</div><div class='add'>+	netif_subqueue_maybe_stop(priv-&gt;ndev, 0,</div><div class='add'>+				  rkcanfd_get_effective_tx_free(priv),</div><div class='add'>+				  RKCANFD_TX_STOP_THRESHOLD,</div><div class='add'>+				  RKCANFD_TX_START_THRESHOLD);</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void rkcanfd_handle_tx_done_one(struct rkcanfd_priv *priv, const u32 ts,</div><div class='add'>+				unsigned int *frame_len_p)</div><div class='add'>+{</div><div class='add'>+	struct net_device_stats *stats = &amp;priv-&gt;ndev-&gt;stats;</div><div class='add'>+	unsigned int tx_tail;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	tx_tail = rkcanfd_get_tx_tail(priv);</div><div class='add'>+	skb = priv-&gt;can.echo_skb[tx_tail];</div><div class='add'>+</div><div class='add'>+	/* Manual handling of CAN Bus Error counters. See</div><div class='add'>+	 * rkcanfd_get_corrected_berr_counter() for detailed</div><div class='add'>+	 * explanation.</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;bec.txerr)</div><div class='add'>+		priv-&gt;bec.txerr--;</div><div class='add'>+</div><div class='add'>+	if (skb)</div><div class='add'>+		rkcanfd_skb_set_timestamp(priv, skb, ts);</div><div class='add'>+	stats-&gt;tx_bytes +=</div><div class='add'>+		can_rx_offload_get_echo_skb_queue_timestamp(&amp;priv-&gt;offload,</div><div class='add'>+							    tx_tail, ts,</div><div class='add'>+							    frame_len_p);</div><div class='add'>+	stats-&gt;tx_packets++;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/can/rockchip/rockchip_canfd.h b/drivers/net/can/rockchip/rockchip_canfd.h<br/>new file mode 100644<br/>index 000000000000..93131c7d7f54<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/rockchip/rockchip_canfd.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/rockchip/rockchip_canfd.h</a></div><div class='hunk'>@@ -0,0 +1,553 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2023, 2024 Pengutronix,</div><div class='add'>+ *               Marc Kleine-Budde &lt;kernel@pengutronix.de&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _ROCKCHIP_CANFD_H</div><div class='add'>+#define _ROCKCHIP_CANFD_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/can/rx-offload.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/reset.h&gt;</div><div class='add'>+#include &lt;linux/skbuff.h&gt;</div><div class='add'>+#include &lt;linux/timecounter.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/u64_stats_sync.h&gt;</div><div class='add'>+#include &lt;linux/units.h&gt;</div><div class='add'>+</div><div class='add'>+#define RKCANFD_REG_MODE 0x000</div><div class='add'>+#define RKCANFD_REG_MODE_CAN_FD_MODE_ENABLE BIT(15)</div><div class='add'>+#define RKCANFD_REG_MODE_DPEE BIT(14)</div><div class='add'>+#define RKCANFD_REG_MODE_BRSD BIT(13)</div><div class='add'>+#define RKCANFD_REG_MODE_SPACE_RX_MODE BIT(12)</div><div class='add'>+#define RKCANFD_REG_MODE_AUTO_BUS_ON BIT(11)</div><div class='add'>+#define RKCANFD_REG_MODE_AUTO_RETX_MODE BIT(10)</div><div class='add'>+#define RKCANFD_REG_MODE_OVLD_MODE BIT(9)</div><div class='add'>+#define RKCANFD_REG_MODE_COVER_MODE BIT(8)</div><div class='add'>+#define RKCANFD_REG_MODE_RXSORT_MODE BIT(7)</div><div class='add'>+#define RKCANFD_REG_MODE_TXORDER_MODE BIT(6)</div><div class='add'>+#define RKCANFD_REG_MODE_RXSTX_MODE BIT(5)</div><div class='add'>+#define RKCANFD_REG_MODE_LBACK_MODE BIT(4)</div><div class='add'>+#define RKCANFD_REG_MODE_SILENT_MODE BIT(3)</div><div class='add'>+#define RKCANFD_REG_MODE_SELF_TEST BIT(2)</div><div class='add'>+#define RKCANFD_REG_MODE_SLEEP_MODE BIT(1)</div><div class='add'>+#define RKCANFD_REG_MODE_WORK_MODE BIT(0)</div><div class='add'>+</div><div class='add'>+#define RKCANFD_REG_CMD 0x004</div><div class='add'>+#define RKCANFD_REG_CMD_TX1_REQ BIT(1)</div><div class='add'>+#define RKCANFD_REG_CMD_TX0_REQ BIT(0)</div><div class='add'>+#define RKCANFD_REG_CMD_TX_REQ(i) (RKCANFD_REG_CMD_TX0_REQ &lt;&lt; (i))</div><div class='add'>+</div><div class='add'>+#define RKCANFD_REG_STATE 0x008</div><div class='add'>+#define RKCANFD_REG_STATE_SLEEP_STATE BIT(6)</div><div class='add'>+#define RKCANFD_REG_STATE_BUS_OFF_STATE BIT(5)</div><div class='add'>+#define RKCANFD_REG_STATE_ERROR_WARNING_STATE BIT(4)</div><div class='add'>+#define RKCANFD_REG_STATE_TX_PERIOD BIT(3)</div><div class='add'>+#define RKCANFD_REG_STATE_RX_PERIOD BIT(2)</div><div class='add'>+#define RKCANFD_REG_STATE_TX_BUFFER_FULL BIT(1)</div><div class='add'>+#define RKCANFD_REG_STATE_RX_BUFFER_FULL BIT(0)</div><div class='add'>+</div><div class='add'>+#define RKCANFD_REG_INT 0x00c</div><div class='add'>+#define RKCANFD_REG_INT_WAKEUP_INT BIT(14)</div><div class='add'>+#define RKCANFD_REG_INT_TXE_FIFO_FULL_INT BIT(13)</div><div class='add'>+#define RKCANFD_REG_INT_TXE_FIFO_OV_INT BIT(12)</div><div class='add'>+#define RKCANFD_REG_INT_TIMESTAMP_COUNTER_OVERFLOW_INT BIT(11)</div><div class='add'>+#define RKCANFD_REG_INT_BUS_OFF_RECOVERY_INT BIT(10)</div><div class='add'>+#define RKCANFD_REG_INT_BUS_OFF_INT BIT(9)</div><div class='add'>+#define RKCANFD_REG_INT_RX_FIFO_OVERFLOW_INT BIT(8)</div><div class='add'>+#define RKCANFD_REG_INT_RX_FIFO_FULL_INT BIT(7)</div><div class='add'>+#define RKCANFD_REG_INT_ERROR_INT BIT(6)</div><div class='add'>+#define RKCANFD_REG_INT_TX_ARBIT_FAIL_INT BIT(5)</div><div class='add'>+#define RKCANFD_REG_INT_PASSIVE_ERROR_INT BIT(4)</div><div class='add'>+#define RKCANFD_REG_INT_OVERLOAD_INT BIT(3)</div><div class='add'>+#define RKCANFD_REG_INT_ERROR_WARNING_INT BIT(2)</div><div class='add'>+#define RKCANFD_REG_INT_TX_FINISH_INT BIT(1)</div><div class='add'>+#define RKCANFD_REG_INT_RX_FINISH_INT BIT(0)</div><div class='add'>+</div><div class='add'>+#define RKCANFD_REG_INT_ALL \</div><div class='add'>+	(RKCANFD_REG_INT_WAKEUP_INT | \</div><div class='add'>+	 RKCANFD_REG_INT_TXE_FIFO_FULL_INT | \</div><div class='add'>+	 RKCANFD_REG_INT_TXE_FIFO_OV_INT | \</div><div class='add'>+	 RKCANFD_REG_INT_TIMESTAMP_COUNTER_OVERFLOW_INT | \</div><div class='add'>+	 RKCANFD_REG_INT_BUS_OFF_RECOVERY_INT | \</div><div class='add'>+	 RKCANFD_REG_INT_BUS_OFF_INT | \</div><div class='add'>+	 RKCANFD_REG_INT_RX_FIFO_OVERFLOW_INT | \</div><div class='add'>+	 RKCANFD_REG_INT_RX_FIFO_FULL_INT | \</div><div class='add'>+	 RKCANFD_REG_INT_ERROR_INT | \</div><div class='add'>+	 RKCANFD_REG_INT_TX_ARBIT_FAIL_INT | \</div><div class='add'>+	 RKCANFD_REG_INT_PASSIVE_ERROR_INT | \</div><div class='add'>+	 RKCANFD_REG_INT_OVERLOAD_INT | \</div><div class='add'>+	 RKCANFD_REG_INT_ERROR_WARNING_INT | \</div><div class='add'>+	 RKCANFD_REG_INT_TX_FINISH_INT | \</div><div class='add'>+	 RKCANFD_REG_INT_RX_FINISH_INT)</div><div class='add'>+</div><div class='add'>+#define RKCANFD_REG_INT_ALL_ERROR \</div><div class='add'>+	(RKCANFD_REG_INT_BUS_OFF_INT | \</div><div class='add'>+	 RKCANFD_REG_INT_ERROR_INT | \</div><div class='add'>+	 RKCANFD_REG_INT_PASSIVE_ERROR_INT | \</div><div class='add'>+	 RKCANFD_REG_INT_ERROR_WARNING_INT)</div><div class='add'>+</div><div class='add'>+#define RKCANFD_REG_INT_MASK 0x010</div><div class='add'>+</div><div class='add'>+#define RKCANFD_REG_DMA_CTL 0x014</div><div class='add'>+#define RKCANFD_REG_DMA_CTL_DMA_RX_MODE BIT(1)</div><div class='add'>+#define RKCANFD_REG_DMA_CTL_DMA_TX_MODE BIT(9)</div><div class='add'>+</div><div class='add'>+#define RKCANFD_REG_BITTIMING 0x018</div><div class='add'>+#define RKCANFD_REG_BITTIMING_SAMPLE_MODE BIT(16)</div><div class='add'>+#define RKCANFD_REG_BITTIMING_SJW GENMASK(15, 14)</div><div class='add'>+#define RKCANFD_REG_BITTIMING_BRP GENMASK(13, 8)</div><div class='add'>+#define RKCANFD_REG_BITTIMING_TSEG2 GENMASK(6, 4)</div><div class='add'>+#define RKCANFD_REG_BITTIMING_TSEG1 GENMASK(3, 0)</div><div class='add'>+</div><div class='add'>+#define RKCANFD_REG_ARBITFAIL 0x028</div><div class='add'>+#define RKCANFD_REG_ARBITFAIL_ARBIT_FAIL_CODE GENMASK(6, 0)</div><div class='add'>+</div><div class='add'>+/* Register seems to be clear or read */</div><div class='add'>+#define RKCANFD_REG_ERROR_CODE 0x02c</div><div class='add'>+#define RKCANFD_REG_ERROR_CODE_PHASE BIT(29)</div><div class='add'>+#define RKCANFD_REG_ERROR_CODE_TYPE GENMASK(28, 26)</div><div class='add'>+#define RKCANFD_REG_ERROR_CODE_TYPE_BIT 0x0</div><div class='add'>+#define RKCANFD_REG_ERROR_CODE_TYPE_STUFF 0x1</div><div class='add'>+#define RKCANFD_REG_ERROR_CODE_TYPE_FORM 0x2</div><div class='add'>+#define RKCANFD_REG_ERROR_CODE_TYPE_ACK 0x3</div><div class='add'>+#define RKCANFD_REG_ERROR_CODE_TYPE_CRC 0x4</div><div class='add'>+#define RKCANFD_REG_ERROR_CODE_DIRECTION_RX BIT(25)</div><div class='add'>+#define RKCANFD_REG_ERROR_CODE_TX GENMASK(24, 16)</div><div class='add'>+#define RKCANFD_REG_ERROR_CODE_TX_OVERLOAD BIT(24)</div><div class='add'>+#define RKCANFD_REG_ERROR_CODE_TX_ERROR BIT(23)</div><div class='add'>+#define RKCANFD_REG_ERROR_CODE_TX_ACK BIT(22)</div><div class='add'>+#define RKCANFD_REG_ERROR_CODE_TX_ACK_EOF BIT(21)</div><div class='add'>+#define RKCANFD_REG_ERROR_CODE_TX_CRC BIT(20)</div><div class='add'>+#define RKCANFD_REG_ERROR_CODE_TX_STUFF_COUNT BIT(19)</div><div class='add'>+#define RKCANFD_REG_ERROR_CODE_TX_DATA BIT(18)</div><div class='add'>+#define RKCANFD_REG_ERROR_CODE_TX_SOF_DLC BIT(17)</div><div class='add'>+#define RKCANFD_REG_ERROR_CODE_TX_IDLE BIT(16)</div><div class='add'>+#define RKCANFD_REG_ERROR_CODE_RX GENMASK(15, 0)</div><div class='add'>+#define RKCANFD_REG_ERROR_CODE_RX_BUF_INT BIT(15)</div><div class='add'>+#define RKCANFD_REG_ERROR_CODE_RX_SPACE BIT(14)</div><div class='add'>+#define RKCANFD_REG_ERROR_CODE_RX_EOF BIT(13)</div><div class='add'>+#define RKCANFD_REG_ERROR_CODE_RX_ACK_LIM BIT(12)</div><div class='add'>+#define RKCANFD_REG_ERROR_CODE_RX_ACK BIT(11)</div><div class='add'>+#define RKCANFD_REG_ERROR_CODE_RX_CRC_LIM BIT(10)</div><div class='add'>+#define RKCANFD_REG_ERROR_CODE_RX_CRC BIT(9)</div><div class='add'>+#define RKCANFD_REG_ERROR_CODE_RX_STUFF_COUNT BIT(8)</div><div class='add'>+#define RKCANFD_REG_ERROR_CODE_RX_DATA BIT(7)</div><div class='add'>+#define RKCANFD_REG_ERROR_CODE_RX_DLC BIT(6)</div><div class='add'>+#define RKCANFD_REG_ERROR_CODE_RX_BRS_ESI BIT(5)</div><div class='add'>+#define RKCANFD_REG_ERROR_CODE_RX_RES BIT(4)</div><div class='add'>+#define RKCANFD_REG_ERROR_CODE_RX_FDF BIT(3)</div><div class='add'>+#define RKCANFD_REG_ERROR_CODE_RX_ID2_RTR BIT(2)</div><div class='add'>+#define RKCANFD_REG_ERROR_CODE_RX_SOF_IDE BIT(1)</div><div class='add'>+#define RKCANFD_REG_ERROR_CODE_RX_IDLE BIT(0)</div><div class='add'>+</div><div class='add'>+#define RKCANFD_REG_ERROR_CODE_NOACK \</div><div class='add'>+	(FIELD_PREP(RKCANFD_REG_ERROR_CODE_TYPE, \</div><div class='add'>+		    RKCANFD_REG_ERROR_CODE_TYPE_ACK) | \</div><div class='add'>+	 RKCANFD_REG_ERROR_CODE_TX_ACK_EOF | \</div><div class='add'>+	 RKCANFD_REG_ERROR_CODE_RX_ACK)</div><div class='add'>+</div><div class='add'>+#define RKCANFD_REG_RXERRORCNT 0x034</div><div class='add'>+#define RKCANFD_REG_RXERRORCNT_RX_ERR_CNT GENMASK(7, 0)</div><div class='add'>+</div><div class='add'>+#define RKCANFD_REG_TXERRORCNT 0x038</div><div class='add'>+#define RKCANFD_REG_TXERRORCNT_TX_ERR_CNT GENMASK(8, 0)</div><div class='add'>+</div><div class='add'>+#define RKCANFD_REG_IDCODE 0x03c</div><div class='add'>+#define RKCANFD_REG_IDCODE_STANDARD_FRAME_ID GENMASK(10, 0)</div><div class='add'>+#define RKCANFD_REG_IDCODE_EXTENDED_FRAME_ID GENMASK(28, 0)</div><div class='add'>+</div><div class='add'>+#define RKCANFD_REG_IDMASK 0x040</div><div class='add'>+</div><div class='add'>+#define RKCANFD_REG_TXFRAMEINFO 0x050</div><div class='add'>+#define RKCANFD_REG_FRAMEINFO_FRAME_FORMAT BIT(7)</div><div class='add'>+#define RKCANFD_REG_FRAMEINFO_RTR BIT(6)</div><div class='add'>+#define RKCANFD_REG_FRAMEINFO_DATA_LENGTH GENMASK(3, 0)</div><div class='add'>+</div><div class='add'>+#define RKCANFD_REG_TXID 0x054</div><div class='add'>+#define RKCANFD_REG_TXID_TX_ID GENMASK(28, 0)</div><div class='add'>+</div><div class='add'>+#define RKCANFD_REG_TXDATA0 0x058</div><div class='add'>+#define RKCANFD_REG_TXDATA1 0x05C</div><div class='add'>+#define RKCANFD_REG_RXFRAMEINFO 0x060</div><div class='add'>+#define RKCANFD_REG_RXID 0x064</div><div class='add'>+#define RKCANFD_REG_RXDATA0 0x068</div><div class='add'>+#define RKCANFD_REG_RXDATA1 0x06c</div><div class='add'>+</div><div class='add'>+#define RKCANFD_REG_RTL_VERSION 0x070</div><div class='add'>+#define RKCANFD_REG_RTL_VERSION_MAJOR GENMASK(7, 4)</div><div class='add'>+#define RKCANFD_REG_RTL_VERSION_MINOR GENMASK(3, 0)</div><div class='add'>+</div><div class='add'>+#define RKCANFD_REG_FD_NOMINAL_BITTIMING 0x100</div><div class='add'>+#define RKCANFD_REG_FD_NOMINAL_BITTIMING_SAMPLE_MODE BIT(31)</div><div class='add'>+#define RKCANFD_REG_FD_NOMINAL_BITTIMING_SJW GENMASK(30, 24)</div><div class='add'>+#define RKCANFD_REG_FD_NOMINAL_BITTIMING_BRP GENMASK(23, 16)</div><div class='add'>+#define RKCANFD_REG_FD_NOMINAL_BITTIMING_TSEG2 GENMASK(14, 8)</div><div class='add'>+#define RKCANFD_REG_FD_NOMINAL_BITTIMING_TSEG1 GENMASK(7, 0)</div><div class='add'>+</div><div class='add'>+#define RKCANFD_REG_FD_DATA_BITTIMING 0x104</div><div class='add'>+#define RKCANFD_REG_FD_DATA_BITTIMING_SAMPLE_MODE BIT(21)</div><div class='add'>+#define RKCANFD_REG_FD_DATA_BITTIMING_SJW GENMASK(20, 17)</div><div class='add'>+#define RKCANFD_REG_FD_DATA_BITTIMING_BRP GENMASK(16, 9)</div><div class='add'>+#define RKCANFD_REG_FD_DATA_BITTIMING_TSEG2 GENMASK(8, 5)</div><div class='add'>+#define RKCANFD_REG_FD_DATA_BITTIMING_TSEG1 GENMASK(4, 0)</div><div class='add'>+</div><div class='add'>+#define RKCANFD_REG_TRANSMIT_DELAY_COMPENSATION 0x108</div><div class='add'>+#define RKCANFD_REG_TRANSMIT_DELAY_COMPENSATION_TDC_OFFSET GENMASK(6, 1)</div><div class='add'>+#define RKCANFD_REG_TRANSMIT_DELAY_COMPENSATION_TDC_ENABLE BIT(0)</div><div class='add'>+</div><div class='add'>+#define RKCANFD_REG_TIMESTAMP_CTRL 0x10c</div><div class='add'>+/* datasheet says 6:1, which is wrong */</div><div class='add'>+#define RKCANFD_REG_TIMESTAMP_CTRL_TIME_BASE_COUNTER_PRESCALE GENMASK(5, 1)</div><div class='add'>+#define RKCANFD_REG_TIMESTAMP_CTRL_TIME_BASE_COUNTER_ENABLE BIT(0)</div><div class='add'>+</div><div class='add'>+#define RKCANFD_REG_TIMESTAMP 0x110</div><div class='add'>+</div><div class='add'>+#define RKCANFD_REG_TXEVENT_FIFO_CTRL 0x114</div><div class='add'>+#define RKCANFD_REG_TXEVENT_FIFO_CTRL_TXE_FIFO_CNT GENMASK(8, 5)</div><div class='add'>+#define RKCANFD_REG_TXEVENT_FIFO_CTRL_TXE_FIFO_WATERMARK GENMASK(4, 1)</div><div class='add'>+#define RKCANFD_REG_TXEVENT_FIFO_CTRL_TXE_FIFO_ENABLE BIT(0)</div><div class='add'>+</div><div class='add'>+#define RKCANFD_REG_RX_FIFO_CTRL 0x118</div><div class='add'>+#define RKCANFD_REG_RX_FIFO_CTRL_RX_FIFO_CNT GENMASK(6, 4)</div><div class='add'>+#define RKCANFD_REG_RX_FIFO_CTRL_RX_FIFO_FULL_WATERMARK GENMASK(3, 1)</div><div class='add'>+#define RKCANFD_REG_RX_FIFO_CTRL_RX_FIFO_ENABLE BIT(0)</div><div class='add'>+</div><div class='add'>+#define RKCANFD_REG_AFC_CTRL 0x11c</div><div class='add'>+#define RKCANFD_REG_AFC_CTRL_UAF5 BIT(4)</div><div class='add'>+#define RKCANFD_REG_AFC_CTRL_UAF4 BIT(3)</div><div class='add'>+#define RKCANFD_REG_AFC_CTRL_UAF3 BIT(2)</div><div class='add'>+#define RKCANFD_REG_AFC_CTRL_UAF2 BIT(1)</div><div class='add'>+#define RKCANFD_REG_AFC_CTRL_UAF1 BIT(0)</div><div class='add'>+</div><div class='add'>+#define RKCANFD_REG_IDCODE0 0x120</div><div class='add'>+#define RKCANFD_REG_IDMASK0 0x124</div><div class='add'>+#define RKCANFD_REG_IDCODE1 0x128</div><div class='add'>+#define RKCANFD_REG_IDMASK1 0x12c</div><div class='add'>+#define RKCANFD_REG_IDCODE2 0x130</div><div class='add'>+#define RKCANFD_REG_IDMASK2 0x134</div><div class='add'>+#define RKCANFD_REG_IDCODE3 0x138</div><div class='add'>+#define RKCANFD_REG_IDMASK3 0x13c</div><div class='add'>+#define RKCANFD_REG_IDCODE4 0x140</div><div class='add'>+#define RKCANFD_REG_IDMASK4 0x144</div><div class='add'>+</div><div class='add'>+#define RKCANFD_REG_FD_TXFRAMEINFO 0x200</div><div class='add'>+#define RKCANFD_REG_FD_FRAMEINFO_FRAME_FORMAT BIT(7)</div><div class='add'>+#define RKCANFD_REG_FD_FRAMEINFO_RTR BIT(6)</div><div class='add'>+#define RKCANFD_REG_FD_FRAMEINFO_FDF BIT(5)</div><div class='add'>+#define RKCANFD_REG_FD_FRAMEINFO_BRS BIT(4)</div><div class='add'>+#define RKCANFD_REG_FD_FRAMEINFO_DATA_LENGTH GENMASK(3, 0)</div><div class='add'>+</div><div class='add'>+#define RKCANFD_REG_FD_TXID 0x204</div><div class='add'>+#define RKCANFD_REG_FD_ID_EFF GENMASK(28, 0)</div><div class='add'>+#define RKCANFD_REG_FD_ID_SFF GENMASK(11, 0)</div><div class='add'>+</div><div class='add'>+#define RKCANFD_REG_FD_TXDATA0 0x208</div><div class='add'>+#define RKCANFD_REG_FD_TXDATA1 0x20c</div><div class='add'>+#define RKCANFD_REG_FD_TXDATA2 0x210</div><div class='add'>+#define RKCANFD_REG_FD_TXDATA3 0x214</div><div class='add'>+#define RKCANFD_REG_FD_TXDATA4 0x218</div><div class='add'>+#define RKCANFD_REG_FD_TXDATA5 0x21c</div><div class='add'>+#define RKCANFD_REG_FD_TXDATA6 0x220</div><div class='add'>+#define RKCANFD_REG_FD_TXDATA7 0x224</div><div class='add'>+#define RKCANFD_REG_FD_TXDATA8 0x228</div><div class='add'>+#define RKCANFD_REG_FD_TXDATA9 0x22c</div><div class='add'>+#define RKCANFD_REG_FD_TXDATA10 0x230</div><div class='add'>+#define RKCANFD_REG_FD_TXDATA11 0x234</div><div class='add'>+#define RKCANFD_REG_FD_TXDATA12 0x238</div><div class='add'>+#define RKCANFD_REG_FD_TXDATA13 0x23c</div><div class='add'>+#define RKCANFD_REG_FD_TXDATA14 0x240</div><div class='add'>+#define RKCANFD_REG_FD_TXDATA15 0x244</div><div class='add'>+</div><div class='add'>+#define RKCANFD_REG_FD_RXFRAMEINFO 0x300</div><div class='add'>+#define RKCANFD_REG_FD_RXID 0x304</div><div class='add'>+#define RKCANFD_REG_FD_RXTIMESTAMP 0x308</div><div class='add'>+#define RKCANFD_REG_FD_RXDATA0 0x30c</div><div class='add'>+#define RKCANFD_REG_FD_RXDATA1 0x310</div><div class='add'>+#define RKCANFD_REG_FD_RXDATA2 0x314</div><div class='add'>+#define RKCANFD_REG_FD_RXDATA3 0x318</div><div class='add'>+#define RKCANFD_REG_FD_RXDATA4 0x31c</div><div class='add'>+#define RKCANFD_REG_FD_RXDATA5 0x320</div><div class='add'>+#define RKCANFD_REG_FD_RXDATA6 0x320</div><div class='add'>+#define RKCANFD_REG_FD_RXDATA7 0x328</div><div class='add'>+#define RKCANFD_REG_FD_RXDATA8 0x32c</div><div class='add'>+#define RKCANFD_REG_FD_RXDATA9 0x330</div><div class='add'>+#define RKCANFD_REG_FD_RXDATA10 0x334</div><div class='add'>+#define RKCANFD_REG_FD_RXDATA11 0x338</div><div class='add'>+#define RKCANFD_REG_FD_RXDATA12 0x33c</div><div class='add'>+#define RKCANFD_REG_FD_RXDATA13 0x340</div><div class='add'>+#define RKCANFD_REG_FD_RXDATA14 0x344</div><div class='add'>+#define RKCANFD_REG_FD_RXDATA15 0x348</div><div class='add'>+</div><div class='add'>+#define RKCANFD_REG_RX_FIFO_RDATA 0x400</div><div class='add'>+#define RKCANFD_REG_TXE_FIFO_RDATA 0x500</div><div class='add'>+</div><div class='add'>+#define DEVICE_NAME "rockchip_canfd"</div><div class='add'>+#define RKCANFD_NAPI_WEIGHT 32</div><div class='add'>+#define RKCANFD_TXFIFO_DEPTH 2</div><div class='add'>+#define RKCANFD_TX_STOP_THRESHOLD 1</div><div class='add'>+#define RKCANFD_TX_START_THRESHOLD 1</div><div class='add'>+</div><div class='add'>+#define RKCANFD_TIMESTAMP_WORK_MAX_DELAY_SEC 60</div><div class='add'>+#define RKCANFD_ERRATUM_5_SYSCLOCK_HZ_MIN (300 * MEGA)</div><div class='add'>+</div><div class='add'>+/* rk3568 CAN-FD Errata, as of Tue 07 Nov 2023 11:25:31 +08:00 */</div><div class='add'>+</div><div class='add'>+/* Erratum 1: The error frame sent by the CAN controller has an</div><div class='add'>+ * abnormal format.</div><div class='add'>+ */</div><div class='add'>+#define RKCANFD_QUIRK_RK3568_ERRATUM_1 BIT(0)</div><div class='add'>+</div><div class='add'>+/* Erratum 2: The error frame sent after detecting a CRC error has an</div><div class='add'>+ * abnormal position.</div><div class='add'>+ */</div><div class='add'>+#define RKCANFD_QUIRK_RK3568_ERRATUM_2 BIT(1)</div><div class='add'>+</div><div class='add'>+/* Erratum 3: Intermittent CRC calculation errors. */</div><div class='add'>+#define RKCANFD_QUIRK_RK3568_ERRATUM_3 BIT(2)</div><div class='add'>+</div><div class='add'>+/* Erratum 4: Intermittent occurrence of stuffing errors. */</div><div class='add'>+#define RKCANFD_QUIRK_RK3568_ERRATUM_4 BIT(3)</div><div class='add'>+</div><div class='add'>+/* Erratum 5: Counters related to the TXFIFO and RXFIFO exhibit</div><div class='add'>+ * abnormal counting behavior.</div><div class='add'>+ *</div><div class='add'>+ * The rk3568 CAN-FD errata sheet as of Tue 07 Nov 2023 11:25:31 +08:00</div><div class='add'>+ * states that only the rk3568v2 is affected by this erratum, but</div><div class='add'>+ * tests with the rk3568v2 and rk3568v3 show that the RX_FIFO_CNT is</div><div class='add'>+ * sometimes too high. This leads to CAN frames being read from the</div><div class='add'>+ * FIFO, which is then already empty.</div><div class='add'>+ *</div><div class='add'>+ * Further tests on the rk3568v2 and rk3568v3 show that in this</div><div class='add'>+ * situation (i.e. empty FIFO) all elements of the FIFO header</div><div class='add'>+ * (frameinfo, id, ts) contain the same data.</div><div class='add'>+ *</div><div class='add'>+ * On the rk3568v2 and rk3568v3, this problem only occurs extremely</div><div class='add'>+ * rarely with the standard clock of 300 MHz, but almost immediately</div><div class='add'>+ * at 80 MHz.</div><div class='add'>+ *</div><div class='add'>+ * To workaround this problem, check for empty FIFO with</div><div class='add'>+ * rkcanfd_fifo_header_empty() in rkcanfd_handle_rx_int_one() and exit</div><div class='add'>+ * early.</div><div class='add'>+ *</div><div class='add'>+ * To reproduce:</div><div class='add'>+ * assigned-clocks = &lt;&amp;cru CLK_CANx&gt;;</div><div class='add'>+ * assigned-clock-rates = &lt;80000000&gt;;</div><div class='add'>+ */</div><div class='add'>+#define RKCANFD_QUIRK_RK3568_ERRATUM_5 BIT(4)</div><div class='add'>+</div><div class='add'>+/* Erratum 6: The CAN controller's transmission of extended frames may</div><div class='add'>+ * intermittently change into standard frames</div><div class='add'>+ *</div><div class='add'>+ * Work around this issue by activating self reception (RXSTX). If we</div><div class='add'>+ * have pending TX CAN frames, check all RX'ed CAN frames in</div><div class='add'>+ * rkcanfd_rxstx_filter().</div><div class='add'>+ *</div><div class='add'>+ * If it's a frame we've send and it's OK, call the TX complete</div><div class='add'>+ * handler: rkcanfd_handle_tx_done_one(). Mask the TX complete IRQ.</div><div class='add'>+ *</div><div class='add'>+ * If it's a frame we've send, but the CAN-ID is mangled, resend the</div><div class='add'>+ * original extended frame.</div><div class='add'>+ *</div><div class='add'>+ * To reproduce:</div><div class='add'>+ * host:</div><div class='add'>+ *   canfdtest -evx -g can0</div><div class='add'>+ *   candump any,0:80000000 -cexdtA</div><div class='add'>+ * dut:</div><div class='add'>+ *   canfdtest -evx can0</div><div class='add'>+ *   ethtool -S can0</div><div class='add'>+ */</div><div class='add'>+#define RKCANFD_QUIRK_RK3568_ERRATUM_6 BIT(5)</div><div class='add'>+</div><div class='add'>+/* Erratum 7: In the passive error state, the CAN controller's</div><div class='add'>+ * interframe space segment counting is inaccurate.</div><div class='add'>+ */</div><div class='add'>+#define RKCANFD_QUIRK_RK3568_ERRATUM_7 BIT(6)</div><div class='add'>+</div><div class='add'>+/* Erratum 8: The Format-Error error flag is transmitted one bit</div><div class='add'>+ * later.</div><div class='add'>+ */</div><div class='add'>+#define RKCANFD_QUIRK_RK3568_ERRATUM_8 BIT(7)</div><div class='add'>+</div><div class='add'>+/* Erratum 9: In the arbitration segment, the CAN controller will</div><div class='add'>+ * identify stuffing errors as arbitration failures.</div><div class='add'>+ */</div><div class='add'>+#define RKCANFD_QUIRK_RK3568_ERRATUM_9 BIT(8)</div><div class='add'>+</div><div class='add'>+/* Erratum 10: Does not support the BUSOFF slow recovery mechanism. */</div><div class='add'>+#define RKCANFD_QUIRK_RK3568_ERRATUM_10 BIT(9)</div><div class='add'>+</div><div class='add'>+/* Erratum 11: Arbitration error. */</div><div class='add'>+#define RKCANFD_QUIRK_RK3568_ERRATUM_11 BIT(10)</div><div class='add'>+</div><div class='add'>+/* Erratum 12: A dominant bit at the third bit of the intermission may</div><div class='add'>+ * cause a transmission error.</div><div class='add'>+ */</div><div class='add'>+#define RKCANFD_QUIRK_RK3568_ERRATUM_12 BIT(11)</div><div class='add'>+</div><div class='add'>+/* Tests on the rk3568v2 and rk3568v3 show that receiving certain</div><div class='add'>+ * CAN-FD frames trigger an Error Interrupt.</div><div class='add'>+ *</div><div class='add'>+ * - Form Error in RX Arbitration Phase: TX_IDLE RX_STUFF_COUNT (0x0a010100) CMD=0 RX=0 TX=0</div><div class='add'>+ *   Error-Warning=1 Bus-Off=0</div><div class='add'>+ *   To reproduce:</div><div class='add'>+ *   host:</div><div class='add'>+ *     cansend can0 002##01f</div><div class='add'>+ *   DUT:</div><div class='add'>+ *     candump any,0:0,#FFFFFFFF -cexdHtA</div><div class='add'>+ *</div><div class='add'>+ * - Form Error in RX Arbitration Phase: TX_IDLE RX_CRC (0x0a010200) CMD=0 RX=0 TX=0</div><div class='add'>+ *   Error-Warning=1 Bus-Off=0</div><div class='add'>+ *   To reproduce:</div><div class='add'>+ *   host:</div><div class='add'>+ *     cansend can0 002##07217010000000000</div><div class='add'>+ *   DUT:</div><div class='add'>+ *     candump any,0:0,#FFFFFFFF -cexdHtA</div><div class='add'>+ */</div><div class='add'>+#define RKCANFD_QUIRK_CANFD_BROKEN BIT(12)</div><div class='add'>+</div><div class='add'>+/* known issues with rk3568v3:</div><div class='add'>+ *</div><div class='add'>+ * - Overload situation during high bus load</div><div class='add'>+ *   To reproduce:</div><div class='add'>+ *   host:</div><div class='add'>+ *     # add a 2nd CAN adapter to the CAN bus</div><div class='add'>+ *     cangen can0 -I 1 -Li -Di -p10 -g 0.3</div><div class='add'>+ *     cansequence -rve</div><div class='add'>+ *   DUT:</div><div class='add'>+ *     cangen can0 -I2 -L1 -Di -p10 -c10 -g 1 -e</div><div class='add'>+ *     cansequence -rv -i 1</div><div class='add'>+ *</div><div class='add'>+ * - TX starvation after repeated Bus-Off</div><div class='add'>+ *   To reproduce:</div><div class='add'>+ *   host:</div><div class='add'>+ *     sleep 3 &amp;&amp; cangen can0 -I2 -Li -Di -p10 -g 0.0</div><div class='add'>+ *   DUT:</div><div class='add'>+ *     cangen can0 -I2 -Li -Di -p10 -g 0.05</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+enum rkcanfd_model {</div><div class='add'>+	RKCANFD_MODEL_RK3568V2 = 0x35682,</div><div class='add'>+	RKCANFD_MODEL_RK3568V3 = 0x35683,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct rkcanfd_devtype_data {</div><div class='add'>+	enum rkcanfd_model model;</div><div class='add'>+	u32 quirks;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct rkcanfd_fifo_header {</div><div class='add'>+	u32 frameinfo;</div><div class='add'>+	u32 id;</div><div class='add'>+	u32 ts;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct rkcanfd_stats {</div><div class='add'>+	struct u64_stats_sync syncp;</div><div class='add'>+</div><div class='add'>+	/* Erratum 5 */</div><div class='add'>+	u64_stats_t rx_fifo_empty_errors;</div><div class='add'>+</div><div class='add'>+	/* Erratum 6 */</div><div class='add'>+	u64_stats_t tx_extended_as_standard_errors;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct rkcanfd_priv {</div><div class='add'>+	struct can_priv can;</div><div class='add'>+	struct can_rx_offload offload;</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+</div><div class='add'>+	void __iomem *regs;</div><div class='add'>+	unsigned int tx_head;</div><div class='add'>+	unsigned int tx_tail;</div><div class='add'>+</div><div class='add'>+	u32 reg_mode_default;</div><div class='add'>+	u32 reg_int_mask_default;</div><div class='add'>+	struct rkcanfd_devtype_data devtype_data;</div><div class='add'>+</div><div class='add'>+	struct cyclecounter cc;</div><div class='add'>+	struct timecounter tc;</div><div class='add'>+	struct delayed_work timestamp;</div><div class='add'>+	unsigned long work_delay_jiffies;</div><div class='add'>+</div><div class='add'>+	struct can_berr_counter bec;</div><div class='add'>+</div><div class='add'>+	struct rkcanfd_stats stats;</div><div class='add'>+</div><div class='add'>+	struct reset_control *reset;</div><div class='add'>+	struct clk_bulk_data *clks;</div><div class='add'>+	int clks_num;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline u32</div><div class='add'>+rkcanfd_read(const struct rkcanfd_priv *priv, u32 reg)</div><div class='add'>+{</div><div class='add'>+	return readl(priv-&gt;regs + reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+rkcanfd_read_rep(const struct rkcanfd_priv *priv, u32 reg,</div><div class='add'>+		 void *buf, unsigned int len)</div><div class='add'>+{</div><div class='add'>+	readsl(priv-&gt;regs + reg, buf, len / sizeof(u32));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+rkcanfd_write(const struct rkcanfd_priv *priv, u32 reg, u32 val)</div><div class='add'>+{</div><div class='add'>+	writel(val, priv-&gt;regs + reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32</div><div class='add'>+rkcanfd_get_timestamp(const struct rkcanfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return rkcanfd_read(priv, RKCANFD_REG_TIMESTAMP);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int</div><div class='add'>+rkcanfd_get_tx_head(const struct rkcanfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return READ_ONCE(priv-&gt;tx_head) &amp; (RKCANFD_TXFIFO_DEPTH - 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int</div><div class='add'>+rkcanfd_get_tx_tail(const struct rkcanfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return READ_ONCE(priv-&gt;tx_tail) &amp; (RKCANFD_TXFIFO_DEPTH - 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int</div><div class='add'>+rkcanfd_get_tx_pending(const struct rkcanfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return READ_ONCE(priv-&gt;tx_head) - READ_ONCE(priv-&gt;tx_tail);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int</div><div class='add'>+rkcanfd_get_tx_free(const struct rkcanfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return RKCANFD_TXFIFO_DEPTH - rkcanfd_get_tx_pending(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void rkcanfd_ethtool_init(struct rkcanfd_priv *priv);</div><div class='add'>+</div><div class='add'>+int rkcanfd_handle_rx_int(struct rkcanfd_priv *priv);</div><div class='add'>+</div><div class='add'>+void rkcanfd_skb_set_timestamp(const struct rkcanfd_priv *priv,</div><div class='add'>+			       struct sk_buff *skb, const u32 timestamp);</div><div class='add'>+void rkcanfd_timestamp_init(struct rkcanfd_priv *priv);</div><div class='add'>+void rkcanfd_timestamp_start(struct rkcanfd_priv *priv);</div><div class='add'>+void rkcanfd_timestamp_stop(struct rkcanfd_priv *priv);</div><div class='add'>+void rkcanfd_timestamp_stop_sync(struct rkcanfd_priv *priv);</div><div class='add'>+</div><div class='add'>+unsigned int rkcanfd_get_effective_tx_free(const struct rkcanfd_priv *priv);</div><div class='add'>+void rkcanfd_xmit_retry(struct rkcanfd_priv *priv);</div><div class='add'>+netdev_tx_t rkcanfd_start_xmit(struct sk_buff *skb, struct net_device *ndev);</div><div class='add'>+void rkcanfd_handle_tx_done_one(struct rkcanfd_priv *priv, const u32 ts,</div><div class='add'>+				unsigned int *frame_len_p);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/can/sja1000/Kconfig b/drivers/net/can/sja1000/Kconfig<br/>index 1e65cb6c2591..e061e35769bf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sja1000/Kconfig?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/sja1000/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sja1000/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/sja1000/Kconfig</a></div><div class='hunk'>@@ -1,55 +1,47 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='ctx'> menuconfig CAN_SJA1000</div><div class='ctx'> 	tristate "Philips/NXP SJA1000 devices"</div><div class='ctx'> 	depends on HAS_IOMEM</div><div class='ctx'> </div><div class='ctx'> if CAN_SJA1000</div><div class='ctx'> </div><div class='del'>-config CAN_SJA1000_ISA</div><div class='del'>-	tristate "ISA Bus based legacy SJA1000 driver"</div><div class='del'>-	---help---</div><div class='del'>-	  This driver adds legacy support for SJA1000 chips connected to</div><div class='del'>-	  the ISA bus using I/O port, memory mapped or indirect access.</div><div class='del'>-</div><div class='del'>-config CAN_SJA1000_PLATFORM</div><div class='del'>-	tristate "Generic Platform Bus based SJA1000 driver"</div><div class='del'>-	---help---</div><div class='del'>-	  This driver adds support for the SJA1000 chips connected to</div><div class='del'>-	  the "platform bus" (Linux abstraction for directly to the</div><div class='del'>-	  processor attached devices).  Which can be found on various</div><div class='del'>-	  boards from Phytec (http://www.phytec.de) like the PCM027,</div><div class='del'>-	  PCM038. It also provides the OpenFirmware "platform bus" found</div><div class='del'>-	  on embedded systems with OpenFirmware bindings, e.g. if you</div><div class='del'>-	  have a PowerPC based system you may want to enable this option.</div><div class='add'>+config CAN_EMS_PCI</div><div class='add'>+	tristate "EMS CPC-PCI, CPC-PCIe and CPC-104P Card"</div><div class='add'>+	depends on PCI</div><div class='add'>+	help</div><div class='add'>+	  This driver is for the one, two or four channel CPC-PCI,</div><div class='add'>+	  CPC-PCIe and CPC-104P cards from EMS Dr. Thomas Wuensche</div><div class='add'>+	  (http://www.ems-wuensche.de).</div><div class='ctx'> </div><div class='ctx'> config CAN_EMS_PCMCIA</div><div class='ctx'> 	tristate "EMS CPC-CARD Card"</div><div class='ctx'> 	depends on PCMCIA</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  This driver is for the one or two channel CPC-CARD cards from</div><div class='ctx'> 	  EMS Dr. Thomas Wuensche (http://www.ems-wuensche.de).</div><div class='ctx'> </div><div class='del'>-config CAN_EMS_PCI</div><div class='del'>-	tristate "EMS CPC-PCI, CPC-PCIe and CPC-104P Card"</div><div class='add'>+config CAN_F81601</div><div class='add'>+	tristate "Fintek F81601 PCIE to 2 CAN Controller"</div><div class='ctx'> 	depends on PCI</div><div class='del'>-	---help---</div><div class='del'>-	  This driver is for the one, two or four channel CPC-PCI,</div><div class='del'>-	  CPC-PCIe and CPC-104P cards from EMS Dr. Thomas Wuensche</div><div class='del'>-	  (http://www.ems-wuensche.de).</div><div class='add'>+	help</div><div class='add'>+	  This driver adds support for Fintek F81601 PCIE to 2 CAN</div><div class='add'>+	  Controller. It had internal 24MHz clock source, but it can</div><div class='add'>+	  be changed by manufacturer. Use modinfo to get usage for</div><div class='add'>+	  parameters. Visit http://www.fintek.com.tw to get more</div><div class='add'>+	  information.</div><div class='ctx'> </div><div class='del'>-config CAN_PEAK_PCMCIA</div><div class='del'>-	tristate "PEAK PCAN-PC Card"</div><div class='del'>-	depends on PCMCIA</div><div class='del'>-	depends on HAS_IOPORT_MAP</div><div class='del'>-	---help---</div><div class='del'>-	  This driver is for the PCAN-PC Card PCMCIA adapter (1 or 2 channels)</div><div class='del'>-	  from PEAK-System (http://www.peak-system.com). To compile this</div><div class='del'>-	  driver as a module, choose M here: the module will be called</div><div class='del'>-	  peak_pcmcia.</div><div class='add'>+config CAN_KVASER_PCI</div><div class='add'>+	tristate "Kvaser PCIcanx and Kvaser PCIcan PCI Cards"</div><div class='add'>+	depends on PCI</div><div class='add'>+	help</div><div class='add'>+	  This driver is for the PCIcanx and PCIcan cards (1, 2 or</div><div class='add'>+	  4 channel) from Kvaser (http://www.kvaser.com).</div><div class='ctx'> </div><div class='ctx'> config CAN_PEAK_PCI</div><div class='ctx'> 	tristate "PEAK PCAN-PCI/PCIe/miniPCI Cards"</div><div class='ctx'> 	depends on PCI</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  This driver is for the PCAN-PCI/PCIe/miniPCI cards</div><div class='ctx'> 	  (1, 2, 3 or 4 channels) from PEAK-System Technik</div><div class='ctx'> 	  (http://www.peak-system.com).</div><div class='hunk'>@@ -60,22 +52,25 @@ config CAN_PEAK_PCIEC</div><div class='ctx'> 	select I2C</div><div class='ctx'> 	select I2C_ALGOBIT</div><div class='ctx'> 	default y</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  Say Y here if you want to use a PCAN-ExpressCard from PEAK-System</div><div class='ctx'> 	  Technik. This will also automatically select I2C and I2C_ALGO</div><div class='ctx'> 	  configuration options.</div><div class='ctx'> </div><div class='del'>-config CAN_KVASER_PCI</div><div class='del'>-	tristate "Kvaser PCIcanx and Kvaser PCIcan PCI Cards"</div><div class='del'>-	depends on PCI</div><div class='del'>-	---help---</div><div class='del'>-	  This driver is for the PCIcanx and PCIcan cards (1, 2 or</div><div class='del'>-	  4 channel) from Kvaser (http://www.kvaser.com).</div><div class='add'>+config CAN_PEAK_PCMCIA</div><div class='add'>+	tristate "PEAK PCAN-PC Card"</div><div class='add'>+	depends on PCMCIA</div><div class='add'>+	depends on HAS_IOPORT_MAP</div><div class='add'>+	help</div><div class='add'>+	  This driver is for the PCAN-PC Card PCMCIA adapter (1 or 2 channels)</div><div class='add'>+	  from PEAK-System (http://www.peak-system.com). To compile this</div><div class='add'>+	  driver as a module, choose M here: the module will be called</div><div class='add'>+	  peak_pcmcia.</div><div class='ctx'> </div><div class='ctx'> config CAN_PLX_PCI</div><div class='ctx'> 	tristate "PLX90xx PCI-bridge based Cards"</div><div class='ctx'> 	depends on PCI</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  This driver is for CAN interface cards based on</div><div class='ctx'> 	  the PLX90xx PCI bridge.</div><div class='ctx'> 	  Driver supports now:</div><div class='hunk'>@@ -88,13 +83,32 @@ config CAN_PLX_PCI</div><div class='ctx'> 	   - TEWS TECHNOLOGIES TPMC810 card (http://www.tews.com/)</div><div class='ctx'> 	   - IXXAT Automation PC-I 04/PCI card (http://www.ixxat.com/)</div><div class='ctx'> 	   - Connect Tech Inc. CANpro/104-Plus Opto (CRG001) card (http://www.connecttech.com)</div><div class='add'>+	   - ASEM CAN raw - 2 isolated CAN channels (www.asem.it)</div><div class='add'>+</div><div class='add'>+config CAN_SJA1000_ISA</div><div class='add'>+	tristate "ISA Bus based legacy SJA1000 driver"</div><div class='add'>+	depends on HAS_IOPORT</div><div class='add'>+	help</div><div class='add'>+	  This driver adds legacy support for SJA1000 chips connected to</div><div class='add'>+	  the ISA bus using I/O port, memory mapped or indirect access.</div><div class='add'>+</div><div class='add'>+config CAN_SJA1000_PLATFORM</div><div class='add'>+	tristate "Generic Platform Bus based SJA1000 driver"</div><div class='add'>+	help</div><div class='add'>+	  This driver adds support for the SJA1000 chips connected to</div><div class='add'>+	  the "platform bus" (Linux abstraction for directly to the</div><div class='add'>+	  processor attached devices).  Which can be found on various</div><div class='add'>+	  boards from Phytec (http://www.phytec.de) like the PCM027,</div><div class='add'>+	  PCM038. It also provides the OpenFirmware "platform bus" found</div><div class='add'>+	  on embedded systems with OpenFirmware bindings, e.g. if you</div><div class='add'>+	  have a PowerPC based system you may want to enable this option.</div><div class='ctx'> </div><div class='ctx'> config CAN_TSCAN1</div><div class='ctx'> 	tristate "TS-CAN1 PC104 boards"</div><div class='del'>-	depends on ISA</div><div class='add'>+	depends on (ISA &amp;&amp; PC104) || (COMPILE_TEST &amp;&amp; HAS_IOPORT)</div><div class='ctx'> 	help</div><div class='ctx'> 	  This driver is for Technologic Systems' TSCAN-1 PC104 boards.</div><div class='del'>-	  http://www.embeddedarm.com/products/board-detail.php?product=TS-CAN1</div><div class='add'>+	  https://www.embeddedts.com/products/TS-CAN1</div><div class='ctx'> 	  The driver supports multiple boards and automatically configures them:</div><div class='ctx'> 	  PLD IO base addresses are read from jumpers JP1 and JP2,</div><div class='ctx'> 	  IRQ numbers are read from jumpers JP4 and JP5,</div><div class='head'>diff --git a/drivers/net/can/sja1000/Makefile b/drivers/net/can/sja1000/Makefile<br/>index be11ddd11b87..500ce1dddaec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sja1000/Makefile?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/sja1000/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sja1000/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/sja1000/Makefile</a></div><div class='hunk'>@@ -1,14 +1,16 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> #</div><div class='ctx'> #  Makefile for the SJA1000 CAN controller drivers.</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_CAN_SJA1000) += sja1000.o</div><div class='del'>-obj-$(CONFIG_CAN_SJA1000_ISA) += sja1000_isa.o</div><div class='del'>-obj-$(CONFIG_CAN_SJA1000_PLATFORM) += sja1000_platform.o</div><div class='del'>-obj-$(CONFIG_CAN_EMS_PCMCIA) += ems_pcmcia.o</div><div class='ctx'> obj-$(CONFIG_CAN_EMS_PCI) += ems_pci.o</div><div class='add'>+obj-$(CONFIG_CAN_EMS_PCMCIA) += ems_pcmcia.o</div><div class='add'>+obj-$(CONFIG_CAN_F81601) += f81601.o</div><div class='ctx'> obj-$(CONFIG_CAN_KVASER_PCI) += kvaser_pci.o</div><div class='del'>-obj-$(CONFIG_CAN_PEAK_PCMCIA) += peak_pcmcia.o</div><div class='ctx'> obj-$(CONFIG_CAN_PEAK_PCI) += peak_pci.o</div><div class='add'>+obj-$(CONFIG_CAN_PEAK_PCMCIA) += peak_pcmcia.o</div><div class='ctx'> obj-$(CONFIG_CAN_PLX_PCI) += plx_pci.o</div><div class='add'>+obj-$(CONFIG_CAN_SJA1000) += sja1000.o</div><div class='add'>+obj-$(CONFIG_CAN_SJA1000_ISA) += sja1000_isa.o</div><div class='add'>+obj-$(CONFIG_CAN_SJA1000_PLATFORM) += sja1000_platform.o</div><div class='ctx'> obj-$(CONFIG_CAN_TSCAN1) += tscan1.o</div><div class='head'>diff --git a/drivers/net/can/sja1000/ems_pci.c b/drivers/net/can/sja1000/ems_pci.c<br/>index 7481c324a476..5bca719d61f5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sja1000/ems_pci.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/sja1000/ems_pci.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sja1000/ems_pci.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/sja1000/ems_pci.c</a></div><div class='hunk'>@@ -1,19 +1,9 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (C) 2007 Wolfgang Grandegger &lt;wg@grandegger.com&gt;</div><div class='ctx'>  * Copyright (C) 2008 Markus Plessing &lt;plessing@ems-wuensche.com&gt;</div><div class='ctx'>  * Copyright (C) 2008 Sebastian Haas &lt;haas@ems-wuensche.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the version 2 of the GNU General Public License</div><div class='del'>- * as published by the Free Software Foundation</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='add'>+ * Copyright (C) 2023 EMS Dr. Thomas Wuensche</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='hunk'>@@ -30,13 +20,14 @@</div><div class='ctx'> </div><div class='ctx'> #define DRV_NAME  "ems_pci"</div><div class='ctx'> </div><div class='del'>-MODULE_AUTHOR("Sebastian Haas &lt;haas@ems-wuenche.com&gt;");</div><div class='add'>+MODULE_AUTHOR("Sebastian Haas &lt;support@ems-wuensche.com&gt;");</div><div class='add'>+MODULE_AUTHOR("Gerhard Uttenthaler &lt;uttenthaler@ems-wuensche.com&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("Socket-CAN driver for EMS CPC-PCI/PCIe/104P CAN cards");</div><div class='del'>-MODULE_SUPPORTED_DEVICE("EMS CPC-PCI/PCIe/104P CAN card");</div><div class='ctx'> MODULE_LICENSE("GPL v2");</div><div class='ctx'> </div><div class='ctx'> #define EMS_PCI_V1_MAX_CHAN 2</div><div class='ctx'> #define EMS_PCI_V2_MAX_CHAN 4</div><div class='add'>+#define EMS_PCI_V3_MAX_CHAN 4</div><div class='ctx'> #define EMS_PCI_MAX_CHAN    EMS_PCI_V2_MAX_CHAN</div><div class='ctx'> </div><div class='ctx'> struct ems_pci_card {</div><div class='hunk'>@@ -52,8 +43,7 @@ struct ems_pci_card {</div><div class='ctx'> </div><div class='ctx'> #define EMS_PCI_CAN_CLOCK (16000000 / 2)</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Register definitions and descriptions are from LinCAN 0.3.3.</div><div class='add'>+/* Register definitions and descriptions are from LinCAN 0.3.3.</div><div class='ctx'>  *</div><div class='ctx'>  * PSB4610 PITA-2 bridge control registers</div><div class='ctx'>  */</div><div class='hunk'>@@ -64,8 +54,7 @@ struct ems_pci_card {</div><div class='ctx'> #define PITA2_MISC          0x1c	/* Miscellaneous Register */</div><div class='ctx'> #define PITA2_MISC_CONFIG   0x04000000	/* Multiplexed parallel interface */</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Register definitions for the PLX 9030</div><div class='add'>+/* Register definitions for the PLX 9030</div><div class='ctx'>  */</div><div class='ctx'> #define PLX_ICSR            0x4c   /* Interrupt Control/Status register */</div><div class='ctx'> #define PLX_ICSR_LINTI1_ENA 0x0001 /* LINTi1 Enable */</div><div class='hunk'>@@ -74,8 +63,16 @@ struct ems_pci_card {</div><div class='ctx'> #define PLX_ICSR_ENA_CLR    (PLX_ICSR_LINTI1_ENA | PLX_ICSR_PCIINT_ENA | \</div><div class='ctx'> 			     PLX_ICSR_LINTI1_CLR)</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * The board configuration is probably following:</div><div class='add'>+/* Register definitions for the ASIX99100</div><div class='add'>+ */</div><div class='add'>+#define ASIX_LINTSR 0x28 /* Interrupt Control/Status register */</div><div class='add'>+#define ASIX_LINTSR_INT0AC BIT(0) /* Writing 1 enables or clears interrupt */</div><div class='add'>+</div><div class='add'>+#define ASIX_LIEMR 0x24 /* Local Interrupt Enable / Miscellaneous Register */</div><div class='add'>+#define ASIX_LIEMR_L0EINTEN BIT(16) /* Local INT0 input assertion enable */</div><div class='add'>+#define ASIX_LIEMR_LRST BIT(14) /* Local Reset assert */</div><div class='add'>+</div><div class='add'>+/* The board configuration is probably following:</div><div class='ctx'>  * RX1 is connected to ground.</div><div class='ctx'>  * TX1 is not connected.</div><div class='ctx'>  * CLKO is not connected.</div><div class='hunk'>@@ -84,23 +81,35 @@ struct ems_pci_card {</div><div class='ctx'>  */</div><div class='ctx'> #define EMS_PCI_OCR         (OCR_TX0_PUSHPULL | OCR_TX1_PUSHPULL)</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * In the CDR register, you should set CBP to 1.</div><div class='add'>+/* In the CDR register, you should set CBP to 1.</div><div class='ctx'>  * You will probably also want to set the clock divider value to 7</div><div class='ctx'>  * (meaning direct oscillator output) because the second SJA1000 chip</div><div class='ctx'>  * is driven by the first one CLKOUT output.</div><div class='ctx'>  */</div><div class='ctx'> #define EMS_PCI_CDR             (CDR_CBP | CDR_CLKOUT_MASK)</div><div class='ctx'> </div><div class='del'>-#define EMS_PCI_V1_BASE_BAR     1</div><div class='del'>-#define EMS_PCI_V1_CONF_SIZE    4096 /* size of PITA control area */</div><div class='del'>-#define EMS_PCI_V2_BASE_BAR     2</div><div class='del'>-#define EMS_PCI_V2_CONF_SIZE    128 /* size of PLX control area */</div><div class='del'>-#define EMS_PCI_CAN_BASE_OFFSET 0x400 /* offset where the controllers starts */</div><div class='del'>-#define EMS_PCI_CAN_CTRL_SIZE   0x200 /* memory size for each controller */</div><div class='add'>+#define EMS_PCI_V1_BASE_BAR 1</div><div class='add'>+#define EMS_PCI_V1_CONF_BAR 0</div><div class='add'>+#define EMS_PCI_V1_CONF_SIZE 4096 /* size of PITA control area */</div><div class='add'>+#define EMS_PCI_V1_CAN_BASE_OFFSET 0x400 /* offset where the controllers start */</div><div class='add'>+#define EMS_PCI_V1_CAN_CTRL_SIZE 0x200 /* memory size for each controller */</div><div class='add'>+</div><div class='add'>+#define EMS_PCI_V2_BASE_BAR 2</div><div class='add'>+#define EMS_PCI_V2_CONF_BAR 0</div><div class='add'>+#define EMS_PCI_V2_CONF_SIZE 128 /* size of PLX control area */</div><div class='add'>+#define EMS_PCI_V2_CAN_BASE_OFFSET 0x400 /* offset where the controllers start */</div><div class='add'>+#define EMS_PCI_V2_CAN_CTRL_SIZE 0x200 /* memory size for each controller */</div><div class='add'>+</div><div class='add'>+#define EMS_PCI_V3_BASE_BAR 0</div><div class='add'>+#define EMS_PCI_V3_CONF_BAR 5</div><div class='add'>+#define EMS_PCI_V3_CONF_SIZE 128 /* size of ASIX control area */</div><div class='add'>+#define EMS_PCI_V3_CAN_BASE_OFFSET 0x00 /* offset where the controllers starts */</div><div class='add'>+#define EMS_PCI_V3_CAN_CTRL_SIZE 0x100 /* memory size for each controller */</div><div class='ctx'> </div><div class='ctx'> #define EMS_PCI_BASE_SIZE  4096 /* size of controller area */</div><div class='ctx'> </div><div class='add'>+#define PCI_SUBDEVICE_ID_EMS 0x4010</div><div class='add'>+</div><div class='ctx'> static const struct pci_device_id ems_pci_tbl[] = {</div><div class='ctx'> 	/* CPC-PCI v1 */</div><div class='ctx'> 	{PCI_VENDOR_ID_SIEMENS, 0x2104, PCI_ANY_ID, PCI_ANY_ID,},</div><div class='hunk'>@@ -108,12 +117,13 @@ static const struct pci_device_id ems_pci_tbl[] = {</div><div class='ctx'> 	{PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9030, PCI_VENDOR_ID_PLX, 0x4000},</div><div class='ctx'> 	/* CPC-104P v2 */</div><div class='ctx'> 	{PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9030, PCI_VENDOR_ID_PLX, 0x4002},</div><div class='add'>+	/* CPC-PCIe v3 */</div><div class='add'>+	{PCI_VENDOR_ID_ASIX, PCI_DEVICE_ID_ASIX_AX99100_LB, 0xa000, PCI_SUBDEVICE_ID_EMS},</div><div class='ctx'> 	{0,}</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(pci, ems_pci_tbl);</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Helper to read internal registers from card logic (not CAN)</div><div class='add'>+/* Helper to read internal registers from card logic (not CAN)</div><div class='ctx'>  */</div><div class='ctx'> static u8 ems_pci_v1_readb(struct ems_pci_card *card, unsigned int port)</div><div class='ctx'> {</div><div class='hunk'>@@ -133,7 +143,7 @@ static void ems_pci_v1_write_reg(const struct sja1000_priv *priv,</div><div class='ctx'> </div><div class='ctx'> static void ems_pci_v1_post_irq(const struct sja1000_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	struct ems_pci_card *card = (struct ems_pci_card *)priv-&gt;priv;</div><div class='add'>+	struct ems_pci_card *card = priv-&gt;priv;</div><div class='ctx'> </div><div class='ctx'> 	/* reset int flag of pita */</div><div class='ctx'> 	writel(PITA2_ICR_INT0_EN | PITA2_ICR_INT0,</div><div class='hunk'>@@ -153,13 +163,30 @@ static void ems_pci_v2_write_reg(const struct sja1000_priv *priv,</div><div class='ctx'> </div><div class='ctx'> static void ems_pci_v2_post_irq(const struct sja1000_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	struct ems_pci_card *card = (struct ems_pci_card *)priv-&gt;priv;</div><div class='add'>+	struct ems_pci_card *card = priv-&gt;priv;</div><div class='ctx'> </div><div class='ctx'> 	writel(PLX_ICSR_ENA_CLR, card-&gt;conf_addr + PLX_ICSR);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Check if a CAN controller is present at the specified location</div><div class='add'>+static u8 ems_pci_v3_read_reg(const struct sja1000_priv *priv, int port)</div><div class='add'>+{</div><div class='add'>+	return readb(priv-&gt;reg_base + port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ems_pci_v3_write_reg(const struct sja1000_priv *priv,</div><div class='add'>+				 int port, u8 val)</div><div class='add'>+{</div><div class='add'>+	writeb(val, priv-&gt;reg_base + port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ems_pci_v3_post_irq(const struct sja1000_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct ems_pci_card *card = priv-&gt;priv;</div><div class='add'>+</div><div class='add'>+	writel(ASIX_LINTSR_INT0AC, card-&gt;conf_addr + ASIX_LINTSR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Check if a CAN controller is present at the specified location</div><div class='ctx'>  * by trying to set 'em into the PeliCAN mode</div><div class='ctx'>  */</div><div class='ctx'> static inline int ems_pci_check_chan(const struct sja1000_priv *priv)</div><div class='hunk'>@@ -197,10 +224,10 @@ static void ems_pci_del_card(struct pci_dev *pdev)</div><div class='ctx'> 		free_sja1000dev(dev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (card-&gt;base_addr != NULL)</div><div class='add'>+	if (card-&gt;base_addr)</div><div class='ctx'> 		pci_iounmap(card-&gt;pci_dev, card-&gt;base_addr);</div><div class='ctx'> </div><div class='del'>-	if (card-&gt;conf_addr != NULL)</div><div class='add'>+	if (card-&gt;conf_addr)</div><div class='ctx'> 		pci_iounmap(card-&gt;pci_dev, card-&gt;conf_addr);</div><div class='ctx'> </div><div class='ctx'> 	kfree(card);</div><div class='hunk'>@@ -214,8 +241,7 @@ static void ems_pci_card_reset(struct ems_pci_card *card)</div><div class='ctx'> 	writeb(0, card-&gt;base_addr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Probe PCI device for EMS CAN signature and register each available</div><div class='add'>+/* Probe PCI device for EMS CAN signature and register each available</div><div class='ctx'>  * CAN channel to SJA1000 Socket-CAN subsystem.</div><div class='ctx'>  */</div><div class='ctx'> static int ems_pci_add_card(struct pci_dev *pdev,</div><div class='hunk'>@@ -224,7 +250,7 @@ static int ems_pci_add_card(struct pci_dev *pdev,</div><div class='ctx'> 	struct sja1000_priv *priv;</div><div class='ctx'> 	struct net_device *dev;</div><div class='ctx'> 	struct ems_pci_card *card;</div><div class='del'>-	int max_chan, conf_size, base_bar;</div><div class='add'>+	int max_chan, conf_size, base_bar, conf_bar;</div><div class='ctx'> 	int err, i;</div><div class='ctx'> </div><div class='ctx'> 	/* Enabling PCI device */</div><div class='hunk'>@@ -234,8 +260,8 @@ static int ems_pci_add_card(struct pci_dev *pdev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Allocating card structures to hold addresses, ... */</div><div class='del'>-	card = kzalloc(sizeof(struct ems_pci_card), GFP_KERNEL);</div><div class='del'>-	if (card == NULL) {</div><div class='add'>+	card = kzalloc(sizeof(*card), GFP_KERNEL);</div><div class='add'>+	if (!card) {</div><div class='ctx'> 		pci_disable_device(pdev);</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -246,27 +272,35 @@ static int ems_pci_add_card(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	card-&gt;channels = 0;</div><div class='ctx'> </div><div class='del'>-	if (pdev-&gt;vendor == PCI_VENDOR_ID_PLX) {</div><div class='add'>+	if (pdev-&gt;vendor == PCI_VENDOR_ID_ASIX) {</div><div class='add'>+		card-&gt;version = 3; /* CPC-PCI v3 */</div><div class='add'>+		max_chan = EMS_PCI_V3_MAX_CHAN;</div><div class='add'>+		base_bar = EMS_PCI_V3_BASE_BAR;</div><div class='add'>+		conf_bar = EMS_PCI_V3_CONF_BAR;</div><div class='add'>+		conf_size = EMS_PCI_V3_CONF_SIZE;</div><div class='add'>+	} else if (pdev-&gt;vendor == PCI_VENDOR_ID_PLX) {</div><div class='ctx'> 		card-&gt;version = 2; /* CPC-PCI v2 */</div><div class='ctx'> 		max_chan = EMS_PCI_V2_MAX_CHAN;</div><div class='ctx'> 		base_bar = EMS_PCI_V2_BASE_BAR;</div><div class='add'>+		conf_bar = EMS_PCI_V2_CONF_BAR;</div><div class='ctx'> 		conf_size = EMS_PCI_V2_CONF_SIZE;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		card-&gt;version = 1; /* CPC-PCI v1 */</div><div class='ctx'> 		max_chan = EMS_PCI_V1_MAX_CHAN;</div><div class='ctx'> 		base_bar = EMS_PCI_V1_BASE_BAR;</div><div class='add'>+		conf_bar = EMS_PCI_V1_CONF_BAR;</div><div class='ctx'> 		conf_size = EMS_PCI_V1_CONF_SIZE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Remap configuration space and controller memory area */</div><div class='del'>-	card-&gt;conf_addr = pci_iomap(pdev, 0, conf_size);</div><div class='del'>-	if (card-&gt;conf_addr == NULL) {</div><div class='add'>+	card-&gt;conf_addr = pci_iomap(pdev, conf_bar, conf_size);</div><div class='add'>+	if (!card-&gt;conf_addr) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='ctx'> 		goto failure_cleanup;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	card-&gt;base_addr = pci_iomap(pdev, base_bar, EMS_PCI_BASE_SIZE);</div><div class='del'>-	if (card-&gt;base_addr == NULL) {</div><div class='add'>+	if (!card-&gt;base_addr) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='ctx'> 		goto failure_cleanup;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -288,12 +322,20 @@ static int ems_pci_add_card(struct pci_dev *pdev,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (card-&gt;version == 3) {</div><div class='add'>+		/* ASIX chip asserts local reset to CAN controllers</div><div class='add'>+		 * after bootup until it is deasserted</div><div class='add'>+		 */</div><div class='add'>+		writel(readl(card-&gt;conf_addr + ASIX_LIEMR) &amp; ~ASIX_LIEMR_LRST,</div><div class='add'>+		       card-&gt;conf_addr + ASIX_LIEMR);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ems_pci_card_reset(card);</div><div class='ctx'> </div><div class='ctx'> 	/* Detect available channels */</div><div class='ctx'> 	for (i = 0; i &lt; max_chan; i++) {</div><div class='ctx'> 		dev = alloc_sja1000dev(0);</div><div class='del'>-		if (dev == NULL) {</div><div class='add'>+		if (!dev) {</div><div class='ctx'> 			err = -ENOMEM;</div><div class='ctx'> 			goto failure_cleanup;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -304,16 +346,25 @@ static int ems_pci_add_card(struct pci_dev *pdev,</div><div class='ctx'> 		priv-&gt;irq_flags = IRQF_SHARED;</div><div class='ctx'> </div><div class='ctx'> 		dev-&gt;irq = pdev-&gt;irq;</div><div class='del'>-		priv-&gt;reg_base = card-&gt;base_addr + EMS_PCI_CAN_BASE_OFFSET</div><div class='del'>-					+ (i * EMS_PCI_CAN_CTRL_SIZE);</div><div class='add'>+</div><div class='ctx'> 		if (card-&gt;version == 1) {</div><div class='ctx'> 			priv-&gt;read_reg  = ems_pci_v1_read_reg;</div><div class='ctx'> 			priv-&gt;write_reg = ems_pci_v1_write_reg;</div><div class='ctx'> 			priv-&gt;post_irq  = ems_pci_v1_post_irq;</div><div class='del'>-		} else {</div><div class='add'>+			priv-&gt;reg_base = card-&gt;base_addr + EMS_PCI_V1_CAN_BASE_OFFSET</div><div class='add'>+					+ (i * EMS_PCI_V1_CAN_CTRL_SIZE);</div><div class='add'>+		} else if (card-&gt;version == 2) {</div><div class='ctx'> 			priv-&gt;read_reg  = ems_pci_v2_read_reg;</div><div class='ctx'> 			priv-&gt;write_reg = ems_pci_v2_write_reg;</div><div class='ctx'> 			priv-&gt;post_irq  = ems_pci_v2_post_irq;</div><div class='add'>+			priv-&gt;reg_base = card-&gt;base_addr + EMS_PCI_V2_CAN_BASE_OFFSET</div><div class='add'>+					+ (i * EMS_PCI_V2_CAN_CTRL_SIZE);</div><div class='add'>+		} else {</div><div class='add'>+			priv-&gt;read_reg  = ems_pci_v3_read_reg;</div><div class='add'>+			priv-&gt;write_reg = ems_pci_v3_write_reg;</div><div class='add'>+			priv-&gt;post_irq  = ems_pci_v3_post_irq;</div><div class='add'>+			priv-&gt;reg_base = card-&gt;base_addr + EMS_PCI_V3_CAN_BASE_OFFSET</div><div class='add'>+					+ (i * EMS_PCI_V3_CAN_CTRL_SIZE);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Check if channel is present */</div><div class='hunk'>@@ -325,20 +376,28 @@ static int ems_pci_add_card(struct pci_dev *pdev,</div><div class='ctx'> 			SET_NETDEV_DEV(dev, &amp;pdev-&gt;dev);</div><div class='ctx'> 			dev-&gt;dev_id = i;</div><div class='ctx'> </div><div class='del'>-			if (card-&gt;version == 1)</div><div class='add'>+			if (card-&gt;version == 1) {</div><div class='ctx'> 				/* reset int flag of pita */</div><div class='ctx'> 				writel(PITA2_ICR_INT0_EN | PITA2_ICR_INT0,</div><div class='ctx'> 				       card-&gt;conf_addr + PITA2_ICR);</div><div class='del'>-			else</div><div class='add'>+			} else if (card-&gt;version == 2) {</div><div class='ctx'> 				/* enable IRQ in PLX 9030 */</div><div class='ctx'> 				writel(PLX_ICSR_ENA_CLR,</div><div class='ctx'> 				       card-&gt;conf_addr + PLX_ICSR);</div><div class='add'>+			} else {</div><div class='add'>+				/* Enable IRQ in AX99100 */</div><div class='add'>+				writel(ASIX_LINTSR_INT0AC, card-&gt;conf_addr + ASIX_LINTSR);</div><div class='add'>+				/* Enable local INT0 input enable */</div><div class='add'>+				writel(readl(card-&gt;conf_addr + ASIX_LIEMR) | ASIX_LIEMR_L0EINTEN,</div><div class='add'>+				       card-&gt;conf_addr + ASIX_LIEMR);</div><div class='add'>+			}</div><div class='ctx'> </div><div class='ctx'> 			/* Register SJA1000 device */</div><div class='ctx'> 			err = register_sja1000dev(dev);</div><div class='ctx'> 			if (err) {</div><div class='del'>-				dev_err(&amp;pdev-&gt;dev, "Registering device failed "</div><div class='del'>-							"(err=%d)\n", err);</div><div class='add'>+				dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+					"Registering device failed: %pe\n",</div><div class='add'>+					ERR_PTR(err));</div><div class='ctx'> 				free_sja1000dev(dev);</div><div class='ctx'> 				goto failure_cleanup;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -346,7 +405,7 @@ static int ems_pci_add_card(struct pci_dev *pdev,</div><div class='ctx'> 			card-&gt;channels++;</div><div class='ctx'> </div><div class='ctx'> 			dev_info(&amp;pdev-&gt;dev, "Channel #%d at 0x%p, irq %d\n",</div><div class='del'>-					i + 1, priv-&gt;reg_base, dev-&gt;irq);</div><div class='add'>+				 i + 1, priv-&gt;reg_base, dev-&gt;irq);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			free_sja1000dev(dev);</div><div class='ctx'> 		}</div><div class='head'>diff --git a/drivers/net/can/sja1000/ems_pcmcia.c b/drivers/net/can/sja1000/ems_pcmcia.c<br/>index 381de998d2f1..4642b6d4aaf7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sja1000/ems_pcmcia.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/sja1000/ems_pcmcia.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sja1000/ems_pcmcia.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/sja1000/ems_pcmcia.c</a></div><div class='hunk'>@@ -1,16 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (C) 2008 Sebastian Haas (initial chardev implementation)</div><div class='ctx'>  * Copyright (C) 2010 Markus Plessing &lt;plessing@ems-wuensche.com&gt;</div><div class='ctx'>  * Rework for mainline by Oliver Hartkopp &lt;socketcan@hartkopp.net&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the version 2 of the GNU General Public License</div><div class='del'>- * as published by the Free Software Foundation</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='hunk'>@@ -29,7 +21,6 @@</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("Markus Plessing &lt;plessing@ems-wuensche.com&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("Socket-CAN driver for EMS CPC-CARD cards");</div><div class='del'>-MODULE_SUPPORTED_DEVICE("EMS CPC-CARD CAN card");</div><div class='ctx'> MODULE_LICENSE("GPL v2");</div><div class='ctx'> </div><div class='ctx'> #define EMS_PCMCIA_MAX_CHAN 2</div><div class='hunk'>@@ -243,7 +234,12 @@ static int ems_pcmcia_add_card(struct pcmcia_device *pdev, unsigned long base)</div><div class='ctx'> 			free_sja1000dev(dev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = request_irq(dev-&gt;irq, &amp;ems_pcmcia_interrupt, IRQF_SHARED,</div><div class='add'>+	if (!card-&gt;channels) {</div><div class='add'>+		err = -ENODEV;</div><div class='add'>+		goto failure_cleanup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = request_irq(pdev-&gt;irq, &amp;ems_pcmcia_interrupt, IRQF_SHARED,</div><div class='ctx'> 			  DRV_NAME, card);</div><div class='ctx'> 	if (!err)</div><div class='ctx'> 		return 0;</div><div class='head'>diff --git a/drivers/net/can/sja1000/f81601.c b/drivers/net/can/sja1000/f81601.c<br/>new file mode 100644<br/>index 000000000000..8f25e95814ef<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sja1000/f81601.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/sja1000/f81601.c</a></div><div class='hunk'>@@ -0,0 +1,211 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Fintek F81601 PCIE to 2 CAN controller driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2019 Peter Hong &lt;peter_hong@fintek.com.tw&gt;</div><div class='add'>+ * Copyright (C) 2019 Linux Foundation</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+</div><div class='add'>+#include "sja1000.h"</div><div class='add'>+</div><div class='add'>+#define F81601_PCI_MAX_CHAN		2</div><div class='add'>+</div><div class='add'>+#define F81601_DECODE_REG		0x209</div><div class='add'>+#define F81601_IO_MODE			BIT(7)</div><div class='add'>+#define F81601_MEM_MODE			BIT(6)</div><div class='add'>+#define F81601_CFG_MODE			BIT(5)</div><div class='add'>+#define F81601_CAN2_INTERNAL_CLK	BIT(3)</div><div class='add'>+#define F81601_CAN1_INTERNAL_CLK	BIT(2)</div><div class='add'>+#define F81601_CAN2_EN			BIT(1)</div><div class='add'>+#define F81601_CAN1_EN			BIT(0)</div><div class='add'>+</div><div class='add'>+#define F81601_TRAP_REG			0x20a</div><div class='add'>+#define F81601_CAN2_HAS_EN		BIT(4)</div><div class='add'>+</div><div class='add'>+struct f81601_pci_card {</div><div class='add'>+	void __iomem *addr;</div><div class='add'>+	spinlock_t lock;	/* use this spin lock only for write access */</div><div class='add'>+	struct pci_dev *dev;</div><div class='add'>+	struct net_device *net_dev[F81601_PCI_MAX_CHAN];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct pci_device_id f81601_pci_tbl[] = {</div><div class='add'>+	{ PCI_DEVICE(0x1c29, 0x1703) },</div><div class='add'>+	{ /* sentinel */ },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+MODULE_DEVICE_TABLE(pci, f81601_pci_tbl);</div><div class='add'>+</div><div class='add'>+static bool internal_clk = true;</div><div class='add'>+module_param(internal_clk, bool, 0444);</div><div class='add'>+MODULE_PARM_DESC(internal_clk, "Use internal clock, default true (24MHz)");</div><div class='add'>+</div><div class='add'>+static unsigned int external_clk;</div><div class='add'>+module_param(external_clk, uint, 0444);</div><div class='add'>+MODULE_PARM_DESC(external_clk, "External clock when internal_clk disabled");</div><div class='add'>+</div><div class='add'>+static u8 f81601_pci_read_reg(const struct sja1000_priv *priv, int port)</div><div class='add'>+{</div><div class='add'>+	return readb(priv-&gt;reg_base + port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void f81601_pci_write_reg(const struct sja1000_priv *priv, int port,</div><div class='add'>+				 u8 val)</div><div class='add'>+{</div><div class='add'>+	struct f81601_pci_card *card = priv-&gt;priv;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;card-&gt;lock, flags);</div><div class='add'>+	writeb(val, priv-&gt;reg_base + port);</div><div class='add'>+	readb(priv-&gt;reg_base);</div><div class='add'>+	spin_unlock_irqrestore(&amp;card-&gt;lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void f81601_pci_remove(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct f81601_pci_card *card = pci_get_drvdata(pdev);</div><div class='add'>+	struct net_device *dev;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(card-&gt;net_dev); i++) {</div><div class='add'>+		dev = card-&gt;net_dev[i];</div><div class='add'>+		if (!dev)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		dev_info(&amp;pdev-&gt;dev, "%s: Removing %s\n", __func__, dev-&gt;name);</div><div class='add'>+</div><div class='add'>+		unregister_sja1000dev(dev);</div><div class='add'>+		free_sja1000dev(dev);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Probe F81601 based device for the SJA1000 chips and register each</div><div class='add'>+ * available CAN channel to SJA1000 Socket-CAN subsystem.</div><div class='add'>+ */</div><div class='add'>+static int f81601_pci_probe(struct pci_dev *pdev,</div><div class='add'>+			    const struct pci_device_id *ent)</div><div class='add'>+{</div><div class='add'>+	struct sja1000_priv *priv;</div><div class='add'>+	struct net_device *dev;</div><div class='add'>+	struct f81601_pci_card *card;</div><div class='add'>+	int err, i, count;</div><div class='add'>+	u8 tmp;</div><div class='add'>+</div><div class='add'>+	if (pcim_enable_device(pdev) &lt; 0) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failed to enable PCI device\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_info(&amp;pdev-&gt;dev, "Detected card at slot #%i\n",</div><div class='add'>+		 PCI_SLOT(pdev-&gt;devfn));</div><div class='add'>+</div><div class='add'>+	card = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*card), GFP_KERNEL);</div><div class='add'>+	if (!card)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	card-&gt;dev = pdev;</div><div class='add'>+	spin_lock_init(&amp;card-&gt;lock);</div><div class='add'>+</div><div class='add'>+	pci_set_drvdata(pdev, card);</div><div class='add'>+</div><div class='add'>+	tmp = F81601_IO_MODE | F81601_MEM_MODE | F81601_CFG_MODE |</div><div class='add'>+		F81601_CAN2_EN | F81601_CAN1_EN;</div><div class='add'>+</div><div class='add'>+	if (internal_clk) {</div><div class='add'>+		tmp |= F81601_CAN2_INTERNAL_CLK | F81601_CAN1_INTERNAL_CLK;</div><div class='add'>+</div><div class='add'>+		dev_info(&amp;pdev-&gt;dev,</div><div class='add'>+			 "F81601 running with internal clock: 24Mhz\n");</div><div class='add'>+	} else {</div><div class='add'>+		dev_info(&amp;pdev-&gt;dev,</div><div class='add'>+			 "F81601 running with external clock: %dMhz\n",</div><div class='add'>+			 external_clk / 1000000);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pci_write_config_byte(pdev, F81601_DECODE_REG, tmp);</div><div class='add'>+</div><div class='add'>+	card-&gt;addr = pcim_iomap(pdev, 0, pci_resource_len(pdev, 0));</div><div class='add'>+</div><div class='add'>+	if (!card-&gt;addr) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "%s: Failed to remap BAR\n", __func__);</div><div class='add'>+		goto failure_cleanup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* read CAN2_HW_EN strap pin to detect how many CANBUS do we have */</div><div class='add'>+	count = ARRAY_SIZE(card-&gt;net_dev);</div><div class='add'>+	pci_read_config_byte(pdev, F81601_TRAP_REG, &amp;tmp);</div><div class='add'>+	if (!(tmp &amp; F81601_CAN2_HAS_EN))</div><div class='add'>+		count = 1;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; count; i++) {</div><div class='add'>+		dev = alloc_sja1000dev(0);</div><div class='add'>+		if (!dev) {</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto failure_cleanup;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		priv = netdev_priv(dev);</div><div class='add'>+		priv-&gt;priv = card;</div><div class='add'>+		priv-&gt;irq_flags = IRQF_SHARED;</div><div class='add'>+		priv-&gt;reg_base = card-&gt;addr + 0x80 * i;</div><div class='add'>+		priv-&gt;read_reg = f81601_pci_read_reg;</div><div class='add'>+		priv-&gt;write_reg = f81601_pci_write_reg;</div><div class='add'>+</div><div class='add'>+		if (internal_clk)</div><div class='add'>+			priv-&gt;can.clock.freq = 24000000 / 2;</div><div class='add'>+		else</div><div class='add'>+			priv-&gt;can.clock.freq = external_clk / 2;</div><div class='add'>+</div><div class='add'>+		priv-&gt;ocr = OCR_TX0_PUSHPULL | OCR_TX1_PUSHPULL;</div><div class='add'>+		priv-&gt;cdr = CDR_CBP;</div><div class='add'>+</div><div class='add'>+		SET_NETDEV_DEV(dev, &amp;pdev-&gt;dev);</div><div class='add'>+		dev-&gt;dev_id = i;</div><div class='add'>+		dev-&gt;irq = pdev-&gt;irq;</div><div class='add'>+</div><div class='add'>+		/* Register SJA1000 device */</div><div class='add'>+		err = register_sja1000dev(dev);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+				"%s: Registering device failed: %x\n", __func__,</div><div class='add'>+				err);</div><div class='add'>+			free_sja1000dev(dev);</div><div class='add'>+			goto failure_cleanup;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		card-&gt;net_dev[i] = dev;</div><div class='add'>+		dev_info(&amp;pdev-&gt;dev, "Channel #%d, %s at 0x%p, irq %d\n", i,</div><div class='add'>+			 dev-&gt;name, priv-&gt;reg_base, dev-&gt;irq);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+ failure_cleanup:</div><div class='add'>+	dev_err(&amp;pdev-&gt;dev, "%s: failed: %d. Cleaning Up.\n", __func__, err);</div><div class='add'>+	f81601_pci_remove(pdev);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct pci_driver f81601_pci_driver = {</div><div class='add'>+	.name =	"f81601",</div><div class='add'>+	.id_table = f81601_pci_tbl,</div><div class='add'>+	.probe = f81601_pci_probe,</div><div class='add'>+	.remove = f81601_pci_remove,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("Fintek F81601 PCIE to 2 CANBUS adaptor driver");</div><div class='add'>+MODULE_AUTHOR("Peter Hong &lt;peter_hong@fintek.com.tw&gt;");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='add'>+</div><div class='add'>+module_pci_driver(f81601_pci_driver);</div><div class='head'>diff --git a/drivers/net/can/sja1000/kvaser_pci.c b/drivers/net/can/sja1000/kvaser_pci.c<br/>index 15c00faeec61..95fe9ee1ce32 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sja1000/kvaser_pci.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/sja1000/kvaser_pci.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sja1000/kvaser_pci.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/sja1000/kvaser_pci.c</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (C) 2008 Per Dalen &lt;per.dalen@cnw.se&gt;</div><div class='ctx'>  *</div><div class='hunk'>@@ -15,18 +16,6 @@</div><div class='ctx'>  *   Copyright (c) 2002-2007 Volkswagen Group Electronic Research</div><div class='ctx'>  *   Copyright (c) 2003 Matthias Brukner, Trajet Gmbh, Rebenring 33,</div><div class='ctx'>  *   38106 Braunschweig, GERMANY</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the version 2 of the GNU General Public License</div><div class='del'>- * as published by the Free Software Foundation</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='hunk'>@@ -44,7 +33,6 @@</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("Per Dalen &lt;per.dalen@cnw.se&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("Socket-CAN driver for KVASER PCAN PCI cards");</div><div class='del'>-MODULE_SUPPORTED_DEVICE("KVASER PCAN PCI CAN card");</div><div class='ctx'> MODULE_LICENSE("GPL v2");</div><div class='ctx'> </div><div class='ctx'> #define MAX_NO_OF_CHANNELS        4 /* max no of channels on a single card */</div><div class='head'>diff --git a/drivers/net/can/sja1000/peak_pci.c b/drivers/net/can/sja1000/peak_pci.c<br/>index e5fac368068a..10d88cbda465 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sja1000/peak_pci.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/sja1000/peak_pci.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sja1000/peak_pci.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/sja1000/peak_pci.c</a></div><div class='hunk'>@@ -1,19 +1,11 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (C) 2007, 2011 Wolfgang Grandegger &lt;wg@grandegger.com&gt;</div><div class='del'>- * Copyright (C) 2012 Stephane Grosjean &lt;s.grosjean@peak-system.com&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * Derived from the PCAN project file driver/src/pcan_pci.c:</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2001-2006  PEAK System-Technik GmbH</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the version 2 of the GNU General Public License</div><div class='del'>- * as published by the Free Software Foundation</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='add'>+ * Copyright (C) 2001-2025 PEAK System-Technik GmbH</div><div class='add'>+ * Author: Stéphane Grosjean &lt;stephane.grosjean@hms-networks.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='hunk'>@@ -30,14 +22,16 @@</div><div class='ctx'> </div><div class='ctx'> #include "sja1000.h"</div><div class='ctx'> </div><div class='del'>-MODULE_AUTHOR("Stephane Grosjean &lt;s.grosjean@peak-system.com&gt;");</div><div class='add'>+MODULE_AUTHOR("Stéphane Grosjean &lt;stephane.grosjean@hms-networks.com&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("Socket-CAN driver for PEAK PCAN PCI family cards");</div><div class='del'>-MODULE_SUPPORTED_DEVICE("PEAK PCAN PCI/PCIe/PCIeC miniPCI CAN cards");</div><div class='del'>-MODULE_SUPPORTED_DEVICE("PEAK PCAN miniPCIe/cPCI PC/104+ PCI/104e CAN Cards");</div><div class='ctx'> MODULE_LICENSE("GPL v2");</div><div class='ctx'> </div><div class='ctx'> #define DRV_NAME  "peak_pci"</div><div class='ctx'> </div><div class='add'>+/* FPGA cards FW version registers */</div><div class='add'>+#define PEAK_VER_REG1		0x40</div><div class='add'>+#define PEAK_VER_REG2		0x44</div><div class='add'>+</div><div class='ctx'> struct peak_pciec_card;</div><div class='ctx'> struct peak_pci_chan {</div><div class='ctx'> 	void __iomem *cfg_base;		/* Common for all channels */</div><div class='hunk'>@@ -51,9 +45,7 @@ struct peak_pci_chan {</div><div class='ctx'> #define PEAK_PCI_CDR		(CDR_CBP | CDR_CLKOUT_MASK)</div><div class='ctx'> #define PEAK_PCI_OCR		OCR_TX0_PUSHPULL</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Important PITA registers</div><div class='del'>- */</div><div class='add'>+/* Important PITA registers */</div><div class='ctx'> #define PITA_ICR		0x00	/* Interrupt control register */</div><div class='ctx'> #define PITA_GPIOICR		0x18	/* GPIO interface control register */</div><div class='ctx'> #define PITA_MISC		0x1C	/* Miscellaneous register */</div><div class='hunk'>@@ -80,31 +72,52 @@ static const u16 peak_pci_icr_masks[PEAK_PCI_CHAN_MAX] = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct pci_device_id peak_pci_tbl[] = {</div><div class='del'>-	{PEAK_PCI_VENDOR_ID, PEAK_PCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},</div><div class='del'>-	{PEAK_PCI_VENDOR_ID, PEAK_PCIE_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},</div><div class='del'>-	{PEAK_PCI_VENDOR_ID, PEAK_MPCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},</div><div class='del'>-	{PEAK_PCI_VENDOR_ID, PEAK_MPCIE_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},</div><div class='del'>-	{PEAK_PCI_VENDOR_ID, PEAK_PC_104P_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},</div><div class='del'>-	{PEAK_PCI_VENDOR_ID, PEAK_PCI_104E_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},</div><div class='del'>-	{PEAK_PCI_VENDOR_ID, PEAK_CPCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},</div><div class='add'>+	{</div><div class='add'>+		PEAK_PCI_VENDOR_ID, PEAK_PCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,</div><div class='add'>+		.driver_data = (kernel_ulong_t)"PCAN-PCI",</div><div class='add'>+	}, {</div><div class='add'>+		PEAK_PCI_VENDOR_ID, PEAK_PCIE_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,</div><div class='add'>+		.driver_data = (kernel_ulong_t)"PCAN-PCI Express",</div><div class='add'>+	}, {</div><div class='add'>+		PEAK_PCI_VENDOR_ID, PEAK_MPCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,</div><div class='add'>+		.driver_data = (kernel_ulong_t)"PCAN-miniPCI",</div><div class='add'>+	}, {</div><div class='add'>+		PEAK_PCI_VENDOR_ID, PEAK_MPCIE_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,</div><div class='add'>+		.driver_data = (kernel_ulong_t)"PCAN-miniPCIe",</div><div class='add'>+	}, {</div><div class='add'>+		PEAK_PCI_VENDOR_ID, PEAK_PC_104P_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,</div><div class='add'>+		.driver_data = (kernel_ulong_t)"PCAN-PC/104-Plus Quad",</div><div class='add'>+	}, {</div><div class='add'>+		PEAK_PCI_VENDOR_ID, PEAK_PCI_104E_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,</div><div class='add'>+		.driver_data = (kernel_ulong_t)"PCAN-PCI/104-Express",</div><div class='add'>+	}, {</div><div class='add'>+		PEAK_PCI_VENDOR_ID, PEAK_CPCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,</div><div class='add'>+		.driver_data = (kernel_ulong_t)"PCAN-cPCI",</div><div class='add'>+	}, {</div><div class='add'>+		PEAK_PCI_VENDOR_ID, PEAK_PCIE_OEM_ID, PCI_ANY_ID, PCI_ANY_ID,</div><div class='add'>+		.driver_data = (kernel_ulong_t)"PCAN-Chip PCIe",</div><div class='add'>+	},</div><div class='ctx'> #ifdef CONFIG_CAN_PEAK_PCIEC</div><div class='del'>-	{PEAK_PCI_VENDOR_ID, PEAK_PCIEC_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},</div><div class='del'>-	{PEAK_PCI_VENDOR_ID, PEAK_PCIEC34_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},</div><div class='add'>+	{</div><div class='add'>+		PEAK_PCI_VENDOR_ID, PEAK_PCIEC_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,</div><div class='add'>+		.driver_data = (kernel_ulong_t)"PCAN-ExpressCard",</div><div class='add'>+	}, {</div><div class='add'>+		PEAK_PCI_VENDOR_ID, PEAK_PCIEC34_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,</div><div class='add'>+		.driver_data = (kernel_ulong_t)"PCAN-ExpressCard 34",</div><div class='add'>+	},</div><div class='ctx'> #endif</div><div class='del'>-	{0,}</div><div class='add'>+	{ /* sentinel */ }</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> MODULE_DEVICE_TABLE(pci, peak_pci_tbl);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_CAN_PEAK_PCIEC</div><div class='del'>-/*</div><div class='del'>- * PCAN-ExpressCard needs I2C bit-banging configuration option.</div><div class='del'>- */</div><div class='add'>+/* PCAN-ExpressCard needs I2C bit-banging configuration option. */</div><div class='ctx'> </div><div class='ctx'> /* GPIOICR byte access offsets */</div><div class='ctx'> #define PITA_GPOUT		0x18	/* GPx output value */</div><div class='ctx'> #define PITA_GPIN		0x19	/* GPx input value */</div><div class='del'>-#define PITA_GPOEN		0x1A	/* configure GPx as ouput pin */</div><div class='add'>+#define PITA_GPOEN		0x1A	/* configure GPx as output pin */</div><div class='ctx'> </div><div class='ctx'> /* I2C GP bits */</div><div class='ctx'> #define PITA_GPIN_SCL		0x01	/* Serial Clock Line */</div><div class='hunk'>@@ -165,12 +178,14 @@ static void peak_pci_write_reg(const struct sja1000_priv *priv,</div><div class='ctx'> static inline void pita_set_scl_highz(struct peak_pciec_card *card)</div><div class='ctx'> {</div><div class='ctx'> 	u8 gp_outen = readb(card-&gt;cfg_base + PITA_GPOEN) &amp; ~PITA_GPIN_SCL;</div><div class='add'>+</div><div class='ctx'> 	writeb(gp_outen, card-&gt;cfg_base + PITA_GPOEN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void pita_set_sda_highz(struct peak_pciec_card *card)</div><div class='ctx'> {</div><div class='ctx'> 	u8 gp_outen = readb(card-&gt;cfg_base + PITA_GPOEN) &amp; ~PITA_GPIN_SDA;</div><div class='add'>+</div><div class='ctx'> 	writeb(gp_outen, card-&gt;cfg_base + PITA_GPOEN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -239,9 +254,7 @@ static int pita_getscl(void *data)</div><div class='ctx'> 	return (readb(card-&gt;cfg_base + PITA_GPIN) &amp; PITA_GPIN_SCL) ? 1 : 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * write commands to the LED chip though the I2C-bus of the PCAN-PCIeC</div><div class='del'>- */</div><div class='add'>+/* write commands to the LED chip though the I2C-bus of the PCAN-PCIeC */</div><div class='ctx'> static int peak_pciec_write_pca9553(struct peak_pciec_card *card,</div><div class='ctx'> 				    u8 offset, u8 data)</div><div class='ctx'> {</div><div class='hunk'>@@ -257,7 +270,7 @@ static int peak_pciec_write_pca9553(struct peak_pciec_card *card,</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* cache led mask */</div><div class='del'>-	if ((offset == 5) &amp;&amp; (data == card-&gt;led_cache))</div><div class='add'>+	if (offset == 5 &amp;&amp; data == card-&gt;led_cache)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	ret = i2c_transfer(&amp;card-&gt;led_chip, &amp;msg, 1);</div><div class='hunk'>@@ -270,9 +283,7 @@ static int peak_pciec_write_pca9553(struct peak_pciec_card *card,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * delayed work callback used to control the LEDs</div><div class='del'>- */</div><div class='add'>+/* delayed work callback used to control the LEDs */</div><div class='ctx'> static void peak_pciec_led_work(struct work_struct *work)</div><div class='ctx'> {</div><div class='ctx'> 	struct peak_pciec_card *card =</div><div class='hunk'>@@ -318,9 +329,7 @@ static void peak_pciec_led_work(struct work_struct *work)</div><div class='ctx'> 		schedule_delayed_work(&amp;card-&gt;led_work, HZ);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * set LEDs blinking state</div><div class='del'>- */</div><div class='add'>+/* set LEDs blinking state */</div><div class='ctx'> static void peak_pciec_set_leds(struct peak_pciec_card *card, u8 led_mask, u8 s)</div><div class='ctx'> {</div><div class='ctx'> 	u8 new_led = card-&gt;led_cache;</div><div class='hunk'>@@ -337,25 +346,19 @@ static void peak_pciec_set_leds(struct peak_pciec_card *card, u8 led_mask, u8 s)</div><div class='ctx'> 	peak_pciec_write_pca9553(card, 5, new_led);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * start one second delayed work to control LEDs</div><div class='del'>- */</div><div class='add'>+/* start one second delayed work to control LEDs */</div><div class='ctx'> static void peak_pciec_start_led_work(struct peak_pciec_card *card)</div><div class='ctx'> {</div><div class='ctx'> 	schedule_delayed_work(&amp;card-&gt;led_work, HZ);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * stop LEDs delayed work</div><div class='del'>- */</div><div class='add'>+/* stop LEDs delayed work */</div><div class='ctx'> static void peak_pciec_stop_led_work(struct peak_pciec_card *card)</div><div class='ctx'> {</div><div class='ctx'> 	cancel_delayed_work_sync(&amp;card-&gt;led_work);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * initialize the PCA9553 4-bit I2C-bus LED chip</div><div class='del'>- */</div><div class='add'>+/* initialize the PCA9553 4-bit I2C-bus LED chip */</div><div class='ctx'> static int peak_pciec_init_leds(struct peak_pciec_card *card)</div><div class='ctx'> {</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -384,17 +387,14 @@ static int peak_pciec_init_leds(struct peak_pciec_card *card)</div><div class='ctx'> 	return peak_pciec_write_pca9553(card, 5, PCA9553_LS0_INIT);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * restore LEDs state to off peak_pciec_leds_exit</div><div class='del'>- */</div><div class='add'>+/* restore LEDs state to off peak_pciec_leds_exit */</div><div class='ctx'> static void peak_pciec_leds_exit(struct peak_pciec_card *card)</div><div class='ctx'> {</div><div class='ctx'> 	/* switch LEDs to off */</div><div class='ctx'> 	peak_pciec_write_pca9553(card, 5, PCA9553_LED_OFF_ALL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * normal write sja1000 register method overloaded to catch when controller</div><div class='add'>+/* normal write sja1000 register method overloaded to catch when controller</div><div class='ctx'>  * is started or stopped, to control leds</div><div class='ctx'>  */</div><div class='ctx'> static void peak_pciec_write_reg(const struct sja1000_priv *priv,</div><div class='hunk'>@@ -424,7 +424,7 @@ static void peak_pciec_write_reg(const struct sja1000_priv *priv,</div><div class='ctx'> 	peak_pci_write_reg(priv, port, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct i2c_algo_bit_data peak_pciec_i2c_bit_ops = {</div><div class='add'>+static const struct i2c_algo_bit_data peak_pciec_i2c_bit_ops = {</div><div class='ctx'> 	.setsda	= pita_setsda,</div><div class='ctx'> 	.setscl	= pita_setscl,</div><div class='ctx'> 	.getsda	= pita_getsda,</div><div class='hunk'>@@ -452,7 +452,7 @@ static int peak_pciec_probe(struct pci_dev *pdev, struct net_device *dev)</div><div class='ctx'> 	/* channel is the first one: do the init part */</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* create the bit banging I2C adapter structure */</div><div class='del'>-		card = kzalloc(sizeof(struct peak_pciec_card), GFP_KERNEL);</div><div class='add'>+		card = kzalloc(sizeof(*card), GFP_KERNEL);</div><div class='ctx'> 		if (!card)</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -462,7 +462,7 @@ static int peak_pciec_probe(struct pci_dev *pdev, struct net_device *dev)</div><div class='ctx'> 		card-&gt;led_chip.owner = THIS_MODULE;</div><div class='ctx'> 		card-&gt;led_chip.dev.parent = &amp;pdev-&gt;dev;</div><div class='ctx'> 		card-&gt;led_chip.algo_data = &amp;card-&gt;i2c_bit;</div><div class='del'>-		strncpy(card-&gt;led_chip.name, "peak_i2c",</div><div class='add'>+		strscpy(card-&gt;led_chip.name, "peak_i2c",</div><div class='ctx'> 			sizeof(card-&gt;led_chip.name));</div><div class='ctx'> </div><div class='ctx'> 		card-&gt;i2c_bit = peak_pciec_i2c_bit_ops;</div><div class='hunk'>@@ -515,9 +515,7 @@ static void peak_pciec_remove(struct peak_pciec_card *card)</div><div class='ctx'> </div><div class='ctx'> #else /* CONFIG_CAN_PEAK_PCIEC */</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Placebo functions when PCAN-ExpressCard support is not selected</div><div class='del'>- */</div><div class='add'>+/* Placebo functions when PCAN-ExpressCard support is not selected */</div><div class='ctx'> static inline int peak_pciec_probe(struct pci_dev *pdev, struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	return -ENODEV;</div><div class='hunk'>@@ -558,6 +556,7 @@ static int peak_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	void __iomem *cfg_base, *reg_base;</div><div class='ctx'> 	u16 sub_sys_id, icr;</div><div class='ctx'> 	int i, err, channels;</div><div class='add'>+	char fw_str[14] = "";</div><div class='ctx'> </div><div class='ctx'> 	err = pci_enable_device(pdev);</div><div class='ctx'> 	if (err)</div><div class='hunk'>@@ -607,10 +606,25 @@ static int peak_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	writeb(0x00, cfg_base + PITA_GPIOICR);</div><div class='ctx'> 	/* Toggle reset */</div><div class='ctx'> 	writeb(0x05, cfg_base + PITA_MISC + 3);</div><div class='del'>-	mdelay(5);</div><div class='add'>+	usleep_range(5000, 6000);</div><div class='ctx'> 	/* Leave parport mux mode */</div><div class='ctx'> 	writeb(0x04, cfg_base + PITA_MISC + 3);</div><div class='ctx'> </div><div class='add'>+	/* FPGA equipped card if not 0 */</div><div class='add'>+	if (readl(cfg_base + PEAK_VER_REG1)) {</div><div class='add'>+		/* FPGA card: display version of the running firmware */</div><div class='add'>+		u32 fw_ver = readl(cfg_base + PEAK_VER_REG2);</div><div class='add'>+</div><div class='add'>+		snprintf(fw_str, sizeof(fw_str), " FW v%u.%u.%u",</div><div class='add'>+			 (fw_ver &gt;&gt; 12) &amp; 0xf,</div><div class='add'>+			 (fw_ver &gt;&gt; 8) &amp; 0xf,</div><div class='add'>+			 (fw_ver &gt;&gt; 4) &amp; 0xf);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Display commercial name (and, eventually, FW version) of the card */</div><div class='add'>+	dev_info(&amp;pdev-&gt;dev, "%ux CAN %s%s\n",</div><div class='add'>+		 channels, (const char *)ent-&gt;driver_data, fw_str);</div><div class='add'>+</div><div class='ctx'> 	icr = readw(cfg_base + PITA_ICR + 2);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; channels; i++) {</div><div class='hunk'>@@ -651,8 +665,7 @@ static int peak_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 		chan-&gt;prev_dev = pci_get_drvdata(pdev);</div><div class='ctx'> 		pci_set_drvdata(pdev, dev);</div><div class='ctx'> </div><div class='del'>-		/*</div><div class='del'>-		 * PCAN-ExpressCard needs some additional i2c init.</div><div class='add'>+		/* PCAN-ExpressCard needs some additional i2c init.</div><div class='ctx'> 		 * This must be done *before* register_sja1000dev() but</div><div class='ctx'> 		 * *after* devices linkage</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -716,7 +729,11 @@ failure_release_regions:</div><div class='ctx'> failure_disable_pci:</div><div class='ctx'> 	pci_disable_device(pdev);</div><div class='ctx'> </div><div class='del'>-	return err;</div><div class='add'>+	/* pci_xxx_config_word() return positive PCIBIOS_xxx error codes while</div><div class='add'>+	 * the probe() function must return a negative errno in case of failure</div><div class='add'>+	 * (err is unchanged if negative)</div><div class='add'>+	 */</div><div class='add'>+	return pcibios_err_to_errno(err);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void peak_pci_remove(struct pci_dev *pdev)</div><div class='hunk'>@@ -735,16 +752,15 @@ static void peak_pci_remove(struct pci_dev *pdev)</div><div class='ctx'> 		struct net_device *prev_dev = chan-&gt;prev_dev;</div><div class='ctx'> </div><div class='ctx'> 		dev_info(&amp;pdev-&gt;dev, "removing device %s\n", dev-&gt;name);</div><div class='add'>+		/* do that only for first channel */</div><div class='add'>+		if (!prev_dev &amp;&amp; chan-&gt;pciec_card)</div><div class='add'>+			peak_pciec_remove(chan-&gt;pciec_card);</div><div class='ctx'> 		unregister_sja1000dev(dev);</div><div class='ctx'> 		free_sja1000dev(dev);</div><div class='ctx'> 		dev = prev_dev;</div><div class='ctx'> </div><div class='del'>-		if (!dev) {</div><div class='del'>-			/* do that only for first channel */</div><div class='del'>-			if (chan-&gt;pciec_card)</div><div class='del'>-				peak_pciec_remove(chan-&gt;pciec_card);</div><div class='add'>+		if (!dev)</div><div class='ctx'> 			break;</div><div class='del'>-		}</div><div class='ctx'> 		priv = netdev_priv(dev);</div><div class='ctx'> 		chan = priv-&gt;priv;</div><div class='ctx'> 	}</div><div class='head'>diff --git a/drivers/net/can/sja1000/peak_pcmcia.c b/drivers/net/can/sja1000/peak_pcmcia.c<br/>index dd56133cc461..e1610b527d13 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sja1000/peak_pcmcia.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/sja1000/peak_pcmcia.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sja1000/peak_pcmcia.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/sja1000/peak_pcmcia.c</a></div><div class='hunk'>@@ -1,18 +1,10 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='del'>- * Copyright (C) 2010-2012 Stephane Grosjean &lt;s.grosjean@peak-system.com&gt;</div><div class='del'>- *</div><div class='ctx'>  * CAN driver for PEAK-System PCAN-PC Card</div><div class='ctx'>  * Derived from the PCAN project file driver/src/pcan_pccard.c</div><div class='del'>- * Copyright (C) 2006-2010 PEAK System-Technik GmbH</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the version 2 of the GNU General Public License</div><div class='del'>- * as published by the Free Software Foundation</div><div class='ctx'>  *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='add'>+ * Copyright (C) 2006-2025 PEAK System-Technik GmbH</div><div class='add'>+ * Author: Stéphane Grosjean &lt;stephane.grosjean@hms-networks.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -27,10 +19,9 @@</div><div class='ctx'> #include &lt;linux/can/dev.h&gt;</div><div class='ctx'> #include "sja1000.h"</div><div class='ctx'> </div><div class='del'>-MODULE_AUTHOR("Stephane Grosjean &lt;s.grosjean@peak-system.com&gt;");</div><div class='add'>+MODULE_AUTHOR("Stéphane Grosjean &lt;stephane.grosjean@hms-networks.com&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("CAN driver for PEAK-System PCAN-PC Cards");</div><div class='ctx'> MODULE_LICENSE("GPL v2");</div><div class='del'>-MODULE_SUPPORTED_DEVICE("PEAK PCAN-PC Card");</div><div class='ctx'> </div><div class='ctx'> /* PEAK-System PCMCIA driver name */</div><div class='ctx'> #define PCC_NAME		"peak_pcmcia"</div><div class='hunk'>@@ -176,7 +167,7 @@ static void pcan_start_led_timer(struct pcan_pccard *card)</div><div class='ctx'>  */</div><div class='ctx'> static void pcan_stop_led_timer(struct pcan_pccard *card)</div><div class='ctx'> {</div><div class='del'>-	del_timer_sync(&amp;card-&gt;led_timer);</div><div class='add'>+	timer_delete_sync(&amp;card-&gt;led_timer);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -381,9 +372,9 @@ static inline void pcan_set_can_power(struct pcan_pccard *card, int onoff)</div><div class='ctx'> /*</div><div class='ctx'>  * set leds state according to channel activity</div><div class='ctx'>  */</div><div class='del'>-static void pcan_led_timer(unsigned long arg)</div><div class='add'>+static void pcan_led_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct pcan_pccard *card = (struct pcan_pccard *)arg;</div><div class='add'>+	struct pcan_pccard *card = timer_container_of(card, t, led_timer);</div><div class='ctx'> 	struct net_device *netdev;</div><div class='ctx'> 	int i, up_count = 0;</div><div class='ctx'> 	u8 ccr;</div><div class='hunk'>@@ -487,7 +478,7 @@ static void pcan_free_channels(struct pcan_pccard *card)</div><div class='ctx'> 		if (!netdev)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		strncpy(name, netdev-&gt;name, IFNAMSIZ);</div><div class='add'>+		strscpy(name, netdev-&gt;name, IFNAMSIZ);</div><div class='ctx'> </div><div class='ctx'> 		unregister_sja1000dev(netdev);</div><div class='ctx'> </div><div class='hunk'>@@ -530,7 +521,7 @@ static int pcan_add_channels(struct pcan_pccard *card)</div><div class='ctx'> 	pcan_write_reg(card, PCC_CCR, ccr);</div><div class='ctx'> </div><div class='ctx'> 	/* wait 2ms before unresetting channels */</div><div class='del'>-	mdelay(2);</div><div class='add'>+	usleep_range(2000, 3000);</div><div class='ctx'> </div><div class='ctx'> 	ccr &amp;= ~PCC_CCR_RST_ALL;</div><div class='ctx'> 	pcan_write_reg(card, PCC_CCR, ccr);</div><div class='hunk'>@@ -679,7 +670,7 @@ static int pcan_probe(struct pcmcia_device *pdev)</div><div class='ctx'> 	card-&gt;fw_major = pcan_read_reg(card, PCC_FW_MAJOR);</div><div class='ctx'> 	card-&gt;fw_minor = pcan_read_reg(card, PCC_FW_MINOR);</div><div class='ctx'> </div><div class='del'>-	/* display board name and firware version */</div><div class='add'>+	/* display board name and firmware version */</div><div class='ctx'> 	dev_info(&amp;pdev-&gt;dev, "PEAK-System pcmcia card %s fw %d.%d\n",</div><div class='ctx'> 		pdev-&gt;prod_id[1] ? pdev-&gt;prod_id[1] : "PCAN-PC Card",</div><div class='ctx'> 		card-&gt;fw_major, card-&gt;fw_minor);</div><div class='hunk'>@@ -692,9 +683,7 @@ static int pcan_probe(struct pcmcia_device *pdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* init the timer which controls the leds */</div><div class='del'>-	init_timer(&amp;card-&gt;led_timer);</div><div class='del'>-	card-&gt;led_timer.function = pcan_led_timer;</div><div class='del'>-	card-&gt;led_timer.data = (unsigned long)card;</div><div class='add'>+	timer_setup(&amp;card-&gt;led_timer, pcan_led_timer, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* request the given irq */</div><div class='ctx'> 	err = request_irq(pdev-&gt;irq, &amp;pcan_isr, IRQF_SHARED, PCC_NAME, card);</div><div class='head'>diff --git a/drivers/net/can/sja1000/plx_pci.c b/drivers/net/can/sja1000/plx_pci.c<br/>index 8836a7485c81..67e5316c6372 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sja1000/plx_pci.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/sja1000/plx_pci.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sja1000/plx_pci.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/sja1000/plx_pci.c</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (C) 2008-2010 Pavel Cheblakov &lt;P.B.Cheblakov@inp.nsk.su&gt;</div><div class='ctx'>  *</div><div class='hunk'>@@ -5,18 +6,6 @@</div><div class='ctx'>  *	Copyright (C) 2007 Wolfgang Grandegger &lt;wg@grandegger.com&gt;</div><div class='ctx'>  *	Copyright (C) 2008 Markus Plessing &lt;plessing@ems-wuensche.com&gt;</div><div class='ctx'>  *	Copyright (C) 2008 Sebastian Haas &lt;haas@ems-wuensche.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the version 2 of the GNU General Public License</div><div class='del'>- * as published by the Free Software Foundation</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='hunk'>@@ -36,16 +25,6 @@</div><div class='ctx'> MODULE_AUTHOR("Pavel Cheblakov &lt;P.B.Cheblakov@inp.nsk.su&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("Socket-CAN driver for PLX90xx PCI-bridge cards with "</div><div class='ctx'> 		   "the SJA1000 chips");</div><div class='del'>-MODULE_SUPPORTED_DEVICE("Adlink PCI-7841/cPCI-7841, "</div><div class='del'>-			"Adlink PCI-7841/cPCI-7841 SE, "</div><div class='del'>-			"Marathon CAN-bus-PCI, "</div><div class='del'>-			"TEWS TECHNOLOGIES TPMC810, "</div><div class='del'>-			"esd CAN-PCI/CPCI/PCI104/200, "</div><div class='del'>-			"esd CAN-PCI/PMC/266, "</div><div class='del'>-			"esd CAN-PCIe/2000, "</div><div class='del'>-			"Connect Tech Inc. CANpro/104-Plus Opto (CRG001), "</div><div class='del'>-			"IXXAT PC-I 04/PCI, "</div><div class='del'>-			"ELCUS CAN-200-PCI")</div><div class='ctx'> MODULE_LICENSE("GPL v2");</div><div class='ctx'> </div><div class='ctx'> #define PLX_PCI_MAX_CHAN 2</div><div class='hunk'>@@ -69,7 +48,9 @@ struct plx_pci_card {</div><div class='ctx'> 					 */</div><div class='ctx'> </div><div class='ctx'> #define PLX_LINT1_EN	0x1		/* Local interrupt 1 enable */</div><div class='add'>+#define PLX_LINT1_POL	(1 &lt;&lt; 1)	/* Local interrupt 1 polarity */</div><div class='ctx'> #define PLX_LINT2_EN	(1 &lt;&lt; 3)	/* Local interrupt 2 enable */</div><div class='add'>+#define PLX_LINT2_POL	(1 &lt;&lt; 4)	/* Local interrupt 2 polarity */</div><div class='ctx'> #define PLX_PCI_INT_EN	(1 &lt;&lt; 6)	/* PCI Interrupt Enable */</div><div class='ctx'> #define PLX_PCI_RESET	(1 &lt;&lt; 30)	/* PCI Adapter Software Reset */</div><div class='ctx'> </div><div class='hunk'>@@ -91,6 +72,9 @@ struct plx_pci_card {</div><div class='ctx'>  */</div><div class='ctx'> #define PLX_PCI_OCR	(OCR_TX0_PUSHPULL | OCR_TX1_PUSHPULL)</div><div class='ctx'> </div><div class='add'>+/* OCR setting for ASEM Dual CAN raw */</div><div class='add'>+#define ASEM_PCI_OCR	0xfe</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * In the CDR register, you should set CBP to 1.</div><div class='ctx'>  * You will probably also want to set the clock divider value to 7</div><div class='hunk'>@@ -133,16 +117,30 @@ struct plx_pci_card {</div><div class='ctx'> #define IXXAT_PCI_SUB_SYS_ID		0x2540</div><div class='ctx'> </div><div class='ctx'> #define MARATHON_PCI_DEVICE_ID		0x2715</div><div class='add'>+#define MARATHON_PCIE_DEVICE_ID		0x3432</div><div class='ctx'> </div><div class='ctx'> #define TEWS_PCI_VENDOR_ID		0x1498</div><div class='ctx'> #define TEWS_PCI_DEVICE_ID_TMPC810	0x032A</div><div class='ctx'> </div><div class='del'>-#define CTI_PCI_VENDOR_ID		0x12c4</div><div class='ctx'> #define CTI_PCI_DEVICE_ID_CRG001	0x0900</div><div class='ctx'> </div><div class='add'>+#define MOXA_PCI_VENDOR_ID		0x1393</div><div class='add'>+#define MOXA_PCI_DEVICE_ID		0x0100</div><div class='add'>+</div><div class='add'>+#define ASEM_RAW_CAN_VENDOR_ID		0x10b5</div><div class='add'>+#define ASEM_RAW_CAN_DEVICE_ID		0x9030</div><div class='add'>+#define ASEM_RAW_CAN_SUB_VENDOR_ID	0x3000</div><div class='add'>+#define ASEM_RAW_CAN_SUB_DEVICE_ID	0x1001</div><div class='add'>+#define ASEM_RAW_CAN_SUB_DEVICE_ID_BIS	0x1002</div><div class='add'>+#define ASEM_RAW_CAN_RST_REGISTER	0x54</div><div class='add'>+#define ASEM_RAW_CAN_RST_MASK_CAN1	0x20</div><div class='add'>+#define ASEM_RAW_CAN_RST_MASK_CAN2	0x04</div><div class='add'>+</div><div class='ctx'> static void plx_pci_reset_common(struct pci_dev *pdev);</div><div class='del'>-static void plx_pci_reset_marathon(struct pci_dev *pdev);</div><div class='ctx'> static void plx9056_pci_reset_common(struct pci_dev *pdev);</div><div class='add'>+static void plx_pci_reset_marathon_pci(struct pci_dev *pdev);</div><div class='add'>+static void plx_pci_reset_marathon_pcie(struct pci_dev *pdev);</div><div class='add'>+static void plx_pci_reset_asem_dual_can_raw(struct pci_dev *pdev);</div><div class='ctx'> </div><div class='ctx'> struct plx_pci_channel_map {</div><div class='ctx'> 	u32 bar;</div><div class='hunk'>@@ -215,14 +213,22 @@ static struct plx_pci_card_info plx_pci_card_info_ixxat = {</div><div class='ctx'> 	/* based on PLX9050 */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct plx_pci_card_info plx_pci_card_info_marathon = {</div><div class='add'>+static struct plx_pci_card_info plx_pci_card_info_marathon_pci = {</div><div class='ctx'> 	"Marathon CAN-bus-PCI", 2,</div><div class='ctx'> 	PLX_PCI_CAN_CLOCK, PLX_PCI_OCR, PLX_PCI_CDR,</div><div class='ctx'> 	{0, 0x00, 0x00}, { {2, 0x00, 0x00}, {4, 0x00, 0x00} },</div><div class='del'>-	&amp;plx_pci_reset_marathon</div><div class='add'>+	&amp;plx_pci_reset_marathon_pci</div><div class='ctx'> 	/* based on PLX9052 */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct plx_pci_card_info plx_pci_card_info_marathon_pcie = {</div><div class='add'>+	"Marathon CAN-bus-PCIe", 2,</div><div class='add'>+	PLX_PCI_CAN_CLOCK, PLX_PCI_OCR, PLX_PCI_CDR,</div><div class='add'>+	{0, 0x00, 0x00}, { {2, 0x00, 0x00}, {3, 0x80, 0x00} },</div><div class='add'>+	&amp;plx_pci_reset_marathon_pcie</div><div class='add'>+	/* based on PEX8311 */</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static struct plx_pci_card_info plx_pci_card_info_tews = {</div><div class='ctx'> 	"TEWS TECHNOLOGIES TPMC810", 2,</div><div class='ctx'> 	PLX_PCI_CAN_CLOCK, PLX_PCI_OCR, PLX_PCI_CDR,</div><div class='hunk'>@@ -247,6 +253,22 @@ static struct plx_pci_card_info plx_pci_card_info_elcus = {</div><div class='ctx'> 	/* based on PLX9030 */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static struct plx_pci_card_info plx_pci_card_info_moxa = {</div><div class='add'>+	"MOXA", 2,</div><div class='add'>+	PLX_PCI_CAN_CLOCK, PLX_PCI_OCR, PLX_PCI_CDR,</div><div class='add'>+	{0, 0x00, 0x00}, { {0, 0x00, 0x80}, {1, 0x00, 0x80} },</div><div class='add'>+	&amp;plx_pci_reset_common</div><div class='add'>+	 /* based on PLX9052 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct plx_pci_card_info plx_pci_card_info_asem_dual_can = {</div><div class='add'>+	"ASEM Dual CAN raw PCI", 2,</div><div class='add'>+	PLX_PCI_CAN_CLOCK, ASEM_PCI_OCR, PLX_PCI_CDR,</div><div class='add'>+	{0, 0x00, 0x00}, { {2, 0x00, 0x00}, {4, 0x00, 0x00} },</div><div class='add'>+	&amp;plx_pci_reset_asem_dual_can_raw</div><div class='add'>+	/* based on PLX9030 */</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static const struct pci_device_id plx_pci_tbl[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		/* Adlink PCI-7841/cPCI-7841 */</div><div class='hunk'>@@ -316,7 +338,14 @@ static const struct pci_device_id plx_pci_tbl[] = {</div><div class='ctx'> 		PCI_VENDOR_ID_PLX, MARATHON_PCI_DEVICE_ID,</div><div class='ctx'> 		PCI_ANY_ID, PCI_ANY_ID,</div><div class='ctx'> 		0, 0,</div><div class='del'>-		(kernel_ulong_t)&amp;plx_pci_card_info_marathon</div><div class='add'>+		(kernel_ulong_t)&amp;plx_pci_card_info_marathon_pci</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		/* Marathon CAN-bus-PCIe card */</div><div class='add'>+		PCI_VENDOR_ID_PLX, MARATHON_PCIE_DEVICE_ID,</div><div class='add'>+		PCI_ANY_ID, PCI_ANY_ID,</div><div class='add'>+		0, 0,</div><div class='add'>+		(kernel_ulong_t)&amp;plx_pci_card_info_marathon_pcie</div><div class='ctx'> 	},</div><div class='ctx'> 	{</div><div class='ctx'> 		/* TEWS TECHNOLOGIES TPMC810 card */</div><div class='hunk'>@@ -328,7 +357,7 @@ static const struct pci_device_id plx_pci_tbl[] = {</div><div class='ctx'> 	{</div><div class='ctx'> 		/* Connect Tech Inc. CANpro/104-Plus Opto (CRG001) card */</div><div class='ctx'> 		PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9030,</div><div class='del'>-		CTI_PCI_VENDOR_ID, CTI_PCI_DEVICE_ID_CRG001,</div><div class='add'>+		PCI_SUBVENDOR_ID_CONNECT_TECH, CTI_PCI_DEVICE_ID_CRG001,</div><div class='ctx'> 		0, 0,</div><div class='ctx'> 		(kernel_ulong_t)&amp;plx_pci_card_info_cti</div><div class='ctx'> 	},</div><div class='hunk'>@@ -339,6 +368,27 @@ static const struct pci_device_id plx_pci_tbl[] = {</div><div class='ctx'> 		0, 0,</div><div class='ctx'> 		(kernel_ulong_t)&amp;plx_pci_card_info_elcus</div><div class='ctx'> 	},</div><div class='add'>+	{</div><div class='add'>+		/* moxa */</div><div class='add'>+		MOXA_PCI_VENDOR_ID, MOXA_PCI_DEVICE_ID,</div><div class='add'>+		PCI_ANY_ID, PCI_ANY_ID,</div><div class='add'>+		0, 0,</div><div class='add'>+		(kernel_ulong_t)&amp;plx_pci_card_info_moxa</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		/* ASEM Dual CAN raw */</div><div class='add'>+		ASEM_RAW_CAN_VENDOR_ID, ASEM_RAW_CAN_DEVICE_ID,</div><div class='add'>+		ASEM_RAW_CAN_SUB_VENDOR_ID, ASEM_RAW_CAN_SUB_DEVICE_ID,</div><div class='add'>+		0, 0,</div><div class='add'>+		(kernel_ulong_t)&amp;plx_pci_card_info_asem_dual_can</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		/* ASEM Dual CAN raw -new model */</div><div class='add'>+		ASEM_RAW_CAN_VENDOR_ID, ASEM_RAW_CAN_DEVICE_ID,</div><div class='add'>+		ASEM_RAW_CAN_SUB_VENDOR_ID, ASEM_RAW_CAN_SUB_DEVICE_ID_BIS,</div><div class='add'>+		0, 0,</div><div class='add'>+		(kernel_ulong_t)&amp;plx_pci_card_info_asem_dual_can</div><div class='add'>+	},</div><div class='ctx'> 	{ 0,}</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(pci, plx_pci_tbl);</div><div class='hunk'>@@ -437,8 +487,8 @@ static void plx9056_pci_reset_common(struct pci_dev *pdev)</div><div class='ctx'> 	iowrite32(cntrl, card-&gt;conf_addr + PLX9056_CNTRL);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* Special reset function for Marathon card */</div><div class='del'>-static void plx_pci_reset_marathon(struct pci_dev *pdev)</div><div class='add'>+/* Special reset function for Marathon CAN-bus-PCI card */</div><div class='add'>+static void plx_pci_reset_marathon_pci(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	void __iomem *reset_addr;</div><div class='ctx'> 	int i;</div><div class='hunk'>@@ -460,6 +510,59 @@ static void plx_pci_reset_marathon(struct pci_dev *pdev)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Special reset function for Marathon CAN-bus-PCIe card */</div><div class='add'>+static void plx_pci_reset_marathon_pcie(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	void __iomem *addr;</div><div class='add'>+	void __iomem *reset_addr;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	plx9056_pci_reset_common(pdev);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 2; i++) {</div><div class='add'>+		struct plx_pci_channel_map *chan_map =</div><div class='add'>+			&amp;plx_pci_card_info_marathon_pcie.chan_map_tbl[i];</div><div class='add'>+		addr = pci_iomap(pdev, chan_map-&gt;bar, chan_map-&gt;size);</div><div class='add'>+		if (!addr) {</div><div class='add'>+			dev_err(&amp;pdev-&gt;dev, "Failed to remap reset "</div><div class='add'>+				"space %d (BAR%d)\n", i, chan_map-&gt;bar);</div><div class='add'>+		} else {</div><div class='add'>+			/* reset the SJA1000 chip */</div><div class='add'>+			#define MARATHON_PCIE_RESET_OFFSET 32</div><div class='add'>+			reset_addr = addr + chan_map-&gt;offset +</div><div class='add'>+			             MARATHON_PCIE_RESET_OFFSET;</div><div class='add'>+			iowrite8(0x1, reset_addr);</div><div class='add'>+			udelay(100);</div><div class='add'>+			pci_iounmap(pdev, addr);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Special reset function for ASEM Dual CAN raw card */</div><div class='add'>+static void plx_pci_reset_asem_dual_can_raw(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	void __iomem *bar0_addr;</div><div class='add'>+	u8 tmpval;</div><div class='add'>+</div><div class='add'>+	plx_pci_reset_common(pdev);</div><div class='add'>+</div><div class='add'>+	bar0_addr = pci_iomap(pdev, 0, 0);</div><div class='add'>+	if (!bar0_addr) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failed to remap reset space 0 (BAR0)\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* reset the two SJA1000 chips */</div><div class='add'>+	tmpval = ioread8(bar0_addr + ASEM_RAW_CAN_RST_REGISTER);</div><div class='add'>+	tmpval &amp;= ~(ASEM_RAW_CAN_RST_MASK_CAN1 | ASEM_RAW_CAN_RST_MASK_CAN2);</div><div class='add'>+	iowrite8(tmpval, bar0_addr + ASEM_RAW_CAN_RST_REGISTER);</div><div class='add'>+	usleep_range(300, 400);</div><div class='add'>+	tmpval |= ASEM_RAW_CAN_RST_MASK_CAN1 | ASEM_RAW_CAN_RST_MASK_CAN2;</div><div class='add'>+	iowrite8(tmpval, bar0_addr + ASEM_RAW_CAN_RST_REGISTER);</div><div class='add'>+	usleep_range(300, 400);</div><div class='add'>+	pci_iounmap(pdev, bar0_addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void plx_pci_del_card(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct plx_pci_card *card = pci_get_drvdata(pdev);</div><div class='hunk'>@@ -486,7 +589,8 @@ static void plx_pci_del_card(struct pci_dev *pdev)</div><div class='ctx'> 	 * Disable interrupts from PCI-card and disable local</div><div class='ctx'> 	 * interrupts</div><div class='ctx'> 	 */</div><div class='del'>-	if (pdev-&gt;device != PCI_DEVICE_ID_PLX_9056)</div><div class='add'>+	if (pdev-&gt;device != PCI_DEVICE_ID_PLX_9056 &amp;&amp;</div><div class='add'>+	    pdev-&gt;device != MARATHON_PCIE_DEVICE_ID)</div><div class='ctx'> 		iowrite32(0x0, card-&gt;conf_addr + PLX_INTCSR);</div><div class='ctx'> 	else</div><div class='ctx'> 		iowrite32(0x0, card-&gt;conf_addr + PLX9056_INTCSR);</div><div class='hunk'>@@ -619,7 +723,8 @@ static int plx_pci_add_card(struct pci_dev *pdev,</div><div class='ctx'> 	 * Enable interrupts from PCI-card (PLX90xx) and enable Local_1,</div><div class='ctx'> 	 * Local_2 interrupts from the SJA1000 chips</div><div class='ctx'> 	 */</div><div class='del'>-	if (pdev-&gt;device != PCI_DEVICE_ID_PLX_9056) {</div><div class='add'>+	if (pdev-&gt;device != PCI_DEVICE_ID_PLX_9056 &amp;&amp;</div><div class='add'>+	    pdev-&gt;device != MARATHON_PCIE_DEVICE_ID) {</div><div class='ctx'> 		val = ioread32(card-&gt;conf_addr + PLX_INTCSR);</div><div class='ctx'> 		if (pdev-&gt;subsystem_vendor == PCI_VENDOR_ID_ESDGMBH)</div><div class='ctx'> 			val |= PLX_LINT1_EN | PLX_PCI_INT_EN;</div><div class='head'>diff --git a/drivers/net/can/sja1000/sja1000.c b/drivers/net/can/sja1000/sja1000.c<br/>index 7b92e911a616..a8fa0d6516b9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sja1000/sja1000.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/sja1000/sja1000.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sja1000/sja1000.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/sja1000/sja1000.c</a></div><div class='hunk'>@@ -52,6 +52,7 @@</div><div class='ctx'> #include &lt;linux/ptrace.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/if_arp.h&gt;</div><div class='ctx'> #include &lt;linux/if_ether.h&gt;</div><div class='hunk'>@@ -60,7 +61,6 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/can/dev.h&gt;</div><div class='ctx'> #include &lt;linux/can/error.h&gt;</div><div class='del'>-#include &lt;linux/can/led.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "sja1000.h"</div><div class='ctx'> </div><div class='hunk'>@@ -184,8 +184,9 @@ static void chipset_init(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct sja1000_priv *priv = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	/* set clock divider and output control register */</div><div class='del'>-	priv-&gt;write_reg(priv, SJA1000_CDR, priv-&gt;cdr | CDR_PELICAN);</div><div class='add'>+	if (!(priv-&gt;flags &amp; SJA1000_QUIRK_NO_CDR_REG))</div><div class='add'>+		/* set clock divider and output control register */</div><div class='add'>+		priv-&gt;write_reg(priv, SJA1000_CDR, priv-&gt;cdr | CDR_PELICAN);</div><div class='ctx'> </div><div class='ctx'> 	/* set acceptance filter (accept all) */</div><div class='ctx'> 	priv-&gt;write_reg(priv, SJA1000_ACCC0, 0x00);</div><div class='hunk'>@@ -205,12 +206,13 @@ static void sja1000_start(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct sja1000_priv *priv = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	/* leave reset mode */</div><div class='add'>+	/* enter reset mode */</div><div class='ctx'> 	if (priv-&gt;can.state != CAN_STATE_STOPPED)</div><div class='ctx'> 		set_reset_mode(dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize chip if uninitialized at this stage */</div><div class='del'>-	if (!(priv-&gt;read_reg(priv, SJA1000_CDR) &amp; CDR_PELICAN))</div><div class='add'>+	if (!(priv-&gt;flags &amp; SJA1000_QUIRK_NO_CDR_REG ||</div><div class='add'>+	      priv-&gt;read_reg(priv, SJA1000_CDR) &amp; CDR_PELICAN))</div><div class='ctx'> 		chipset_init(dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Clear error counters and error code capture */</div><div class='hunk'>@@ -218,6 +220,9 @@ static void sja1000_start(struct net_device *dev)</div><div class='ctx'> 	priv-&gt;write_reg(priv, SJA1000_RXERR, 0x0);</div><div class='ctx'> 	priv-&gt;read_reg(priv, SJA1000_ECC);</div><div class='ctx'> </div><div class='add'>+	/* clear interrupt flags */</div><div class='add'>+	priv-&gt;read_reg(priv, SJA1000_IR);</div><div class='add'>+</div><div class='ctx'> 	/* leave reset mode */</div><div class='ctx'> 	set_normal_mode(dev);</div><div class='ctx'> }</div><div class='hunk'>@@ -281,18 +286,17 @@ static netdev_tx_t sja1000_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 	struct sja1000_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	struct can_frame *cf = (struct can_frame *)skb-&gt;data;</div><div class='ctx'> 	uint8_t fi;</div><div class='del'>-	uint8_t dlc;</div><div class='ctx'> 	canid_t id;</div><div class='ctx'> 	uint8_t dreg;</div><div class='ctx'> 	u8 cmd_reg_val = 0x00;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	if (can_dropped_invalid_skb(dev, skb))</div><div class='add'>+	if (can_dev_dropped_skb(dev, skb))</div><div class='ctx'> 		return NETDEV_TX_OK;</div><div class='ctx'> </div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='ctx'> </div><div class='del'>-	fi = dlc = cf-&gt;can_dlc;</div><div class='add'>+	fi = can_get_cc_dlc(cf, priv-&gt;can.ctrlmode);</div><div class='ctx'> 	id = cf-&gt;can_id;</div><div class='ctx'> </div><div class='ctx'> 	if (id &amp; CAN_RTR_FLAG)</div><div class='hunk'>@@ -313,10 +317,10 @@ static netdev_tx_t sja1000_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 		priv-&gt;write_reg(priv, SJA1000_ID2, (id &amp; 0x00000007) &lt;&lt; 5);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; dlc; i++)</div><div class='add'>+	for (i = 0; i &lt; cf-&gt;len; i++)</div><div class='ctx'> 		priv-&gt;write_reg(priv, dreg++, cf-&gt;data[i]);</div><div class='ctx'> </div><div class='del'>-	can_put_echo_skb(skb, dev, 0);</div><div class='add'>+	can_put_echo_skb(skb, dev, 0, 0);</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_ONE_SHOT)</div><div class='ctx'> 		cmd_reg_val |= CMD_AT;</div><div class='hunk'>@@ -364,24 +368,39 @@ static void sja1000_rx(struct net_device *dev)</div><div class='ctx'> 		    | (priv-&gt;read_reg(priv, SJA1000_ID2) &gt;&gt; 5);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	cf-&gt;can_dlc = get_can_dlc(fi &amp; 0x0F);</div><div class='add'>+	can_frame_set_cc_len(cf, fi &amp; 0x0F, priv-&gt;can.ctrlmode);</div><div class='ctx'> 	if (fi &amp; SJA1000_FI_RTR) {</div><div class='ctx'> 		id |= CAN_RTR_FLAG;</div><div class='ctx'> 	} else {</div><div class='del'>-		for (i = 0; i &lt; cf-&gt;can_dlc; i++)</div><div class='add'>+		for (i = 0; i &lt; cf-&gt;len; i++)</div><div class='ctx'> 			cf-&gt;data[i] = priv-&gt;read_reg(priv, dreg++);</div><div class='add'>+</div><div class='add'>+		stats-&gt;rx_bytes += cf-&gt;len;</div><div class='ctx'> 	}</div><div class='add'>+	stats-&gt;rx_packets++;</div><div class='ctx'> </div><div class='ctx'> 	cf-&gt;can_id = id;</div><div class='ctx'> </div><div class='ctx'> 	/* release receive buffer */</div><div class='ctx'> 	sja1000_write_cmdreg(priv, CMD_RRB);</div><div class='ctx'> </div><div class='del'>-	stats-&gt;rx_packets++;</div><div class='del'>-	stats-&gt;rx_bytes += cf-&gt;can_dlc;</div><div class='ctx'> 	netif_rx(skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t sja1000_reset_interrupt(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = (struct net_device *)dev_id;</div><div class='add'>+</div><div class='add'>+	netdev_dbg(dev, "performing a soft reset upon overrun\n");</div><div class='add'>+</div><div class='add'>+	netif_tx_lock(dev);</div><div class='add'>+</div><div class='add'>+	can_free_echo_skb(dev, 0, NULL);</div><div class='add'>+	sja1000_set_mode(dev, CAN_MODE_START);</div><div class='ctx'> </div><div class='del'>-	can_led_event(dev, CAN_LED_EVENT_RX);</div><div class='add'>+	netif_tx_unlock(dev);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int sja1000_err(struct net_device *dev, uint8_t isrc, uint8_t status)</div><div class='hunk'>@@ -394,25 +413,33 @@ static int sja1000_err(struct net_device *dev, uint8_t isrc, uint8_t status)</div><div class='ctx'> 	enum can_state rx_state, tx_state;</div><div class='ctx'> 	unsigned int rxerr, txerr;</div><div class='ctx'> 	uint8_t ecc, alc;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> </div><div class='ctx'> 	skb = alloc_can_err_skb(dev, &amp;cf);</div><div class='del'>-	if (skb == NULL)</div><div class='del'>-		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	txerr = priv-&gt;read_reg(priv, SJA1000_TXERR);</div><div class='ctx'> 	rxerr = priv-&gt;read_reg(priv, SJA1000_RXERR);</div><div class='ctx'> </div><div class='del'>-	cf-&gt;data[6] = txerr;</div><div class='del'>-	cf-&gt;data[7] = rxerr;</div><div class='del'>-</div><div class='ctx'> 	if (isrc &amp; IRQ_DOI) {</div><div class='ctx'> 		/* data overrun interrupt */</div><div class='ctx'> 		netdev_dbg(dev, "data overrun interrupt\n");</div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='del'>-		cf-&gt;data[1] = CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='add'>+		if (skb) {</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='add'>+			cf-&gt;data[1] = CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		stats-&gt;rx_over_errors++;</div><div class='ctx'> 		stats-&gt;rx_errors++;</div><div class='ctx'> 		sja1000_write_cmdreg(priv, CMD_CDO);	/* clear bit */</div><div class='add'>+</div><div class='add'>+		/* Some controllers needs additional handling upon overrun</div><div class='add'>+		 * condition: the controller may sometimes be totally confused</div><div class='add'>+		 * and refuse any new frame while its buffer is empty. The only</div><div class='add'>+		 * way to re-sync the read vs. write buffer offsets is to</div><div class='add'>+		 * stop any current handling and perform a reset.</div><div class='add'>+		 */</div><div class='add'>+		if (priv-&gt;flags &amp; SJA1000_QUIRK_RESET_ON_OVERRUN)</div><div class='add'>+			ret = IRQ_WAKE_THREAD;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (isrc &amp; IRQ_EI) {</div><div class='hunk'>@@ -426,33 +453,46 @@ static int sja1000_err(struct net_device *dev, uint8_t isrc, uint8_t status)</div><div class='ctx'> 		else</div><div class='ctx'> 			state = CAN_STATE_ERROR_ACTIVE;</div><div class='ctx'> 	}</div><div class='add'>+	if (state != CAN_STATE_BUS_OFF &amp;&amp; skb) {</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_CNT;</div><div class='add'>+		cf-&gt;data[6] = txerr;</div><div class='add'>+		cf-&gt;data[7] = rxerr;</div><div class='add'>+	}</div><div class='ctx'> 	if (isrc &amp; IRQ_BEI) {</div><div class='ctx'> 		/* bus error interrupt */</div><div class='ctx'> 		priv-&gt;can.can_stats.bus_error++;</div><div class='del'>-		stats-&gt;rx_errors++;</div><div class='ctx'> </div><div class='ctx'> 		ecc = priv-&gt;read_reg(priv, SJA1000_ECC);</div><div class='add'>+		if (skb) {</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='ctx'> </div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='del'>-</div><div class='del'>-		switch (ecc &amp; ECC_MASK) {</div><div class='del'>-		case ECC_BIT:</div><div class='del'>-			cf-&gt;data[2] |= CAN_ERR_PROT_BIT;</div><div class='del'>-			break;</div><div class='del'>-		case ECC_FORM:</div><div class='del'>-			cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='del'>-			break;</div><div class='del'>-		case ECC_STUFF:</div><div class='del'>-			cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			cf-&gt;data[2] |= CAN_ERR_PROT_UNSPEC;</div><div class='add'>+			/* set error type */</div><div class='add'>+			switch (ecc &amp; ECC_MASK) {</div><div class='add'>+			case ECC_BIT:</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_BIT;</div><div class='add'>+				break;</div><div class='add'>+			case ECC_FORM:</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='add'>+				break;</div><div class='add'>+			case ECC_STUFF:</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='add'>+				break;</div><div class='add'>+			default:</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			/* set error location */</div><div class='ctx'> 			cf-&gt;data[3] = ecc &amp; ECC_SEG;</div><div class='del'>-			break;</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='ctx'> 		/* Error occurred during transmission? */</div><div class='del'>-		if ((ecc &amp; ECC_DIR) == 0)</div><div class='del'>-			cf-&gt;data[2] |= CAN_ERR_PROT_TX;</div><div class='add'>+		if ((ecc &amp; ECC_DIR) == 0) {</div><div class='add'>+			stats-&gt;tx_errors++;</div><div class='add'>+			if (skb)</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_TX;</div><div class='add'>+		} else {</div><div class='add'>+			stats-&gt;rx_errors++;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> 	if (isrc &amp; IRQ_EPI) {</div><div class='ctx'> 		/* error passive interrupt */</div><div class='hunk'>@@ -468,9 +508,10 @@ static int sja1000_err(struct net_device *dev, uint8_t isrc, uint8_t status)</div><div class='ctx'> 		netdev_dbg(dev, "arbitration lost interrupt\n");</div><div class='ctx'> 		alc = priv-&gt;read_reg(priv, SJA1000_ALC);</div><div class='ctx'> 		priv-&gt;can.can_stats.arbitration_lost++;</div><div class='del'>-		stats-&gt;tx_errors++;</div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_LOSTARB;</div><div class='del'>-		cf-&gt;data[0] = alc &amp; 0x1f;</div><div class='add'>+		if (skb) {</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_LOSTARB;</div><div class='add'>+			cf-&gt;data[0] = alc &amp; 0x1f;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (state != priv-&gt;can.state) {</div><div class='hunk'>@@ -483,11 +524,12 @@ static int sja1000_err(struct net_device *dev, uint8_t isrc, uint8_t status)</div><div class='ctx'> 			can_bus_off(dev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	stats-&gt;rx_packets++;</div><div class='del'>-	stats-&gt;rx_bytes += cf-&gt;can_dlc;</div><div class='add'>+	if (!skb)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='ctx'> 	netif_rx(skb);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> irqreturn_t sja1000_interrupt(int irq, void *dev_id)</div><div class='hunk'>@@ -496,7 +538,8 @@ irqreturn_t sja1000_interrupt(int irq, void *dev_id)</div><div class='ctx'> 	struct sja1000_priv *priv = netdev_priv(dev);</div><div class='ctx'> 	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='ctx'> 	uint8_t isrc, status;</div><div class='del'>-	int n = 0;</div><div class='add'>+	irqreturn_t ret = 0;</div><div class='add'>+	int n = 0, err;</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;pre_irq)</div><div class='ctx'> 		priv-&gt;pre_irq(priv);</div><div class='hunk'>@@ -505,8 +548,8 @@ irqreturn_t sja1000_interrupt(int irq, void *dev_id)</div><div class='ctx'> 	if (priv-&gt;read_reg(priv, SJA1000_IER) == IRQ_OFF)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	while ((isrc = priv-&gt;read_reg(priv, SJA1000_IR)) &amp;&amp;</div><div class='del'>-	       (n &lt; SJA1000_MAX_IRQ)) {</div><div class='add'>+	while ((n &lt; SJA1000_MAX_IRQ) &amp;&amp;</div><div class='add'>+	       (isrc = priv-&gt;read_reg(priv, SJA1000_IR))) {</div><div class='ctx'> </div><div class='ctx'> 		status = priv-&gt;read_reg(priv, SJA1000_SR);</div><div class='ctx'> 		/* check for absent controller due to hw unplug */</div><div class='hunk'>@@ -521,16 +564,13 @@ irqreturn_t sja1000_interrupt(int irq, void *dev_id)</div><div class='ctx'> 			if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_ONE_SHOT &amp;&amp;</div><div class='ctx'> 			    !(status &amp; SR_TCS)) {</div><div class='ctx'> 				stats-&gt;tx_errors++;</div><div class='del'>-				can_free_echo_skb(dev, 0);</div><div class='add'>+				can_free_echo_skb(dev, 0, NULL);</div><div class='ctx'> 			} else {</div><div class='ctx'> 				/* transmission complete */</div><div class='del'>-				stats-&gt;tx_bytes +=</div><div class='del'>-					priv-&gt;read_reg(priv, SJA1000_FI) &amp; 0xf;</div><div class='add'>+				stats-&gt;tx_bytes += can_get_echo_skb(dev, 0, NULL);</div><div class='ctx'> 				stats-&gt;tx_packets++;</div><div class='del'>-				can_get_echo_skb(dev, 0);</div><div class='ctx'> 			}</div><div class='ctx'> 			netif_wake_queue(dev);</div><div class='del'>-			can_led_event(dev, CAN_LED_EVENT_TX);</div><div class='ctx'> 		}</div><div class='ctx'> 		if (isrc &amp; IRQ_RI) {</div><div class='ctx'> 			/* receive interrupt */</div><div class='hunk'>@@ -544,19 +584,25 @@ irqreturn_t sja1000_interrupt(int irq, void *dev_id)</div><div class='ctx'> 		}</div><div class='ctx'> 		if (isrc &amp; (IRQ_DOI | IRQ_EI | IRQ_BEI | IRQ_EPI | IRQ_ALI)) {</div><div class='ctx'> 			/* error interrupt */</div><div class='del'>-			if (sja1000_err(dev, isrc, status))</div><div class='add'>+			err = sja1000_err(dev, isrc, status);</div><div class='add'>+			if (err == IRQ_WAKE_THREAD)</div><div class='add'>+				ret = err;</div><div class='add'>+			if (err)</div><div class='ctx'> 				break;</div><div class='ctx'> 		}</div><div class='ctx'> 		n++;</div><div class='ctx'> 	}</div><div class='ctx'> out:</div><div class='add'>+	if (!ret)</div><div class='add'>+		ret = (n) ? IRQ_HANDLED : IRQ_NONE;</div><div class='add'>+</div><div class='ctx'> 	if (priv-&gt;post_irq)</div><div class='ctx'> 		priv-&gt;post_irq(priv);</div><div class='ctx'> </div><div class='ctx'> 	if (n &gt;= SJA1000_MAX_IRQ)</div><div class='ctx'> 		netdev_dbg(dev, "%d messages handled in ISR", n);</div><div class='ctx'> </div><div class='del'>-	return (n) ? IRQ_HANDLED : IRQ_NONE;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(sja1000_interrupt);</div><div class='ctx'> </div><div class='hunk'>@@ -575,8 +621,9 @@ static int sja1000_open(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	/* register interrupt handler, if not done by the device driver */</div><div class='ctx'> 	if (!(priv-&gt;flags &amp; SJA1000_CUSTOM_IRQ_HANDLER)) {</div><div class='del'>-		err = request_irq(dev-&gt;irq, sja1000_interrupt, priv-&gt;irq_flags,</div><div class='del'>-				  dev-&gt;name, (void *)dev);</div><div class='add'>+		err = request_threaded_irq(dev-&gt;irq, sja1000_interrupt,</div><div class='add'>+					   sja1000_reset_interrupt,</div><div class='add'>+					   priv-&gt;irq_flags, dev-&gt;name, (void *)dev);</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			close_candev(dev);</div><div class='ctx'> 			return -EAGAIN;</div><div class='hunk'>@@ -586,8 +633,6 @@ static int sja1000_open(struct net_device *dev)</div><div class='ctx'> 	/* init and start chi */</div><div class='ctx'> 	sja1000_start(dev);</div><div class='ctx'> </div><div class='del'>-	can_led_event(dev, CAN_LED_EVENT_OPEN);</div><div class='del'>-</div><div class='ctx'> 	netif_start_queue(dev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -605,8 +650,6 @@ static int sja1000_close(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	close_candev(dev);</div><div class='ctx'> </div><div class='del'>-	can_led_event(dev, CAN_LED_EVENT_STOP);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -632,7 +675,8 @@ struct net_device *alloc_sja1000dev(int sizeof_priv)</div><div class='ctx'> 				       CAN_CTRLMODE_3_SAMPLES |</div><div class='ctx'> 				       CAN_CTRLMODE_ONE_SHOT |</div><div class='ctx'> 				       CAN_CTRLMODE_BERR_REPORTING |</div><div class='del'>-				       CAN_CTRLMODE_PRESUME_ACK;</div><div class='add'>+				       CAN_CTRLMODE_PRESUME_ACK |</div><div class='add'>+				       CAN_CTRLMODE_CC_LEN8_DLC;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_init(&amp;priv-&gt;cmdreg_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -653,28 +697,25 @@ static const struct net_device_ops sja1000_netdev_ops = {</div><div class='ctx'> 	.ndo_open	= sja1000_open,</div><div class='ctx'> 	.ndo_stop	= sja1000_close,</div><div class='ctx'> 	.ndo_start_xmit	= sja1000_start_xmit,</div><div class='del'>-	.ndo_change_mtu	= can_change_mtu,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops sja1000_ethtool_ops = {</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> int register_sja1000dev(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='ctx'> 	if (!sja1000_probe_chip(dev))</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;flags |= IFF_ECHO;	/* we support local echo */</div><div class='ctx'> 	dev-&gt;netdev_ops = &amp;sja1000_netdev_ops;</div><div class='add'>+	dev-&gt;ethtool_ops = &amp;sja1000_ethtool_ops;</div><div class='ctx'> </div><div class='ctx'> 	set_reset_mode(dev);</div><div class='ctx'> 	chipset_init(dev);</div><div class='ctx'> </div><div class='del'>-	ret =  register_candev(dev);</div><div class='del'>-</div><div class='del'>-	if (!ret)</div><div class='del'>-		devm_can_led_init(dev);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='add'>+	return register_candev(dev);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(register_sja1000dev);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/can/sja1000/sja1000.h b/drivers/net/can/sja1000/sja1000.h<br/>index 9d46398f8154..f015e39e2224 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sja1000/sja1000.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/sja1000/sja1000.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sja1000/sja1000.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/sja1000/sja1000.h</a></div><div class='hunk'>@@ -145,7 +145,9 @@</div><div class='ctx'> /*</div><div class='ctx'>  * Flags for sja1000priv.flags</div><div class='ctx'>  */</div><div class='del'>-#define SJA1000_CUSTOM_IRQ_HANDLER 0x1</div><div class='add'>+#define SJA1000_CUSTOM_IRQ_HANDLER	BIT(0)</div><div class='add'>+#define SJA1000_QUIRK_NO_CDR_REG	BIT(1)</div><div class='add'>+#define SJA1000_QUIRK_RESET_ON_OVERRUN	BIT(2)</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * SJA1000 private data structure</div><div class='head'>diff --git a/drivers/net/can/sja1000/sja1000_isa.c b/drivers/net/can/sja1000/sja1000_isa.c<br/>index e97e6d35b300..2d1f715459d7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sja1000/sja1000_isa.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/sja1000/sja1000_isa.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sja1000/sja1000_isa.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/sja1000/sja1000_isa.c</a></div><div class='hunk'>@@ -1,17 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (C) 2009 Wolfgang Grandegger &lt;wg@grandegger.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the version 2 of the GNU General Public License</div><div class='del'>- * as published by the Free Software Foundation</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='hunk'>@@ -48,27 +37,27 @@ static unsigned char ocr[MAXDEV] = {[0 ... (MAXDEV - 1)] = 0xff};</div><div class='ctx'> static int indirect[MAXDEV] = {[0 ... (MAXDEV - 1)] = -1};</div><div class='ctx'> static spinlock_t indirect_lock[MAXDEV];  /* lock for indirect access mode */</div><div class='ctx'> </div><div class='del'>-module_param_array(port, ulong, NULL, S_IRUGO);</div><div class='add'>+module_param_hw_array(port, ulong, ioport, NULL, 0444);</div><div class='ctx'> MODULE_PARM_DESC(port, "I/O port number");</div><div class='ctx'> </div><div class='del'>-module_param_array(mem, ulong, NULL, S_IRUGO);</div><div class='add'>+module_param_hw_array(mem, ulong, iomem, NULL, 0444);</div><div class='ctx'> MODULE_PARM_DESC(mem, "I/O memory address");</div><div class='ctx'> </div><div class='del'>-module_param_array(indirect, int, NULL, S_IRUGO);</div><div class='add'>+module_param_hw_array(indirect, int, ioport, NULL, 0444);</div><div class='ctx'> MODULE_PARM_DESC(indirect, "Indirect access via address and data port");</div><div class='ctx'> </div><div class='del'>-module_param_array(irq, int, NULL, S_IRUGO);</div><div class='add'>+module_param_hw_array(irq, int, irq, NULL, 0444);</div><div class='ctx'> MODULE_PARM_DESC(irq, "IRQ number");</div><div class='ctx'> </div><div class='del'>-module_param_array(clk, int, NULL, S_IRUGO);</div><div class='add'>+module_param_array(clk, int, NULL, 0444);</div><div class='ctx'> MODULE_PARM_DESC(clk, "External oscillator clock frequency "</div><div class='ctx'> 		 "(default=16000000 [16 MHz])");</div><div class='ctx'> </div><div class='del'>-module_param_array(cdr, byte, NULL, S_IRUGO);</div><div class='add'>+module_param_array(cdr, byte, NULL, 0444);</div><div class='ctx'> MODULE_PARM_DESC(cdr, "Clock divider register "</div><div class='ctx'> 		 "(default=0x48 [CDR_CBP | CDR_CLK_OFF])");</div><div class='ctx'> </div><div class='del'>-module_param_array(ocr, byte, NULL, S_IRUGO);</div><div class='add'>+module_param_array(ocr, byte, NULL, 0444);</div><div class='ctx'> MODULE_PARM_DESC(ocr, "Output control register "</div><div class='ctx'> 		 "(default=0x18 [OCR_TX0_PUSHPULL])");</div><div class='ctx'> </div><div class='hunk'>@@ -141,7 +130,7 @@ static int sja1000_isa_probe(struct platform_device *pdev)</div><div class='ctx'> 			err = -EBUSY;</div><div class='ctx'> 			goto exit;</div><div class='ctx'> 		}</div><div class='del'>-		base = ioremap_nocache(mem[idx], iosize);</div><div class='add'>+		base = ioremap(mem[idx], iosize);</div><div class='ctx'> 		if (!base) {</div><div class='ctx'> 			err = -ENOMEM;</div><div class='ctx'> 			goto exit_release;</div><div class='hunk'>@@ -213,26 +202,28 @@ static int sja1000_isa_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "registering %s failed (err=%d)\n",</div><div class='ctx'> 			DRV_NAME, err);</div><div class='del'>-		goto exit_unmap;</div><div class='add'>+		goto exit_free;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dev_info(&amp;pdev-&gt;dev, "%s device registered (reg_base=0x%p, irq=%d)\n",</div><div class='ctx'> 		 DRV_NAME, priv-&gt;reg_base, dev-&gt;irq);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>- exit_unmap:</div><div class='add'>+exit_free:</div><div class='add'>+	free_sja1000dev(dev);</div><div class='add'>+exit_unmap:</div><div class='ctx'> 	if (mem[idx])</div><div class='ctx'> 		iounmap(base);</div><div class='del'>- exit_release:</div><div class='add'>+exit_release:</div><div class='ctx'> 	if (mem[idx])</div><div class='ctx'> 		release_mem_region(mem[idx], iosize);</div><div class='ctx'> 	else</div><div class='ctx'> 		release_region(port[idx], iosize);</div><div class='del'>- exit:</div><div class='add'>+exit:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sja1000_isa_remove(struct platform_device *pdev)</div><div class='add'>+static void sja1000_isa_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = platform_get_drvdata(pdev);</div><div class='ctx'> 	struct sja1000_priv *priv = netdev_priv(dev);</div><div class='hunk'>@@ -250,8 +241,6 @@ static int sja1000_isa_remove(struct platform_device *pdev)</div><div class='ctx'> 			release_region(port[idx], SJA1000_IOSIZE);</div><div class='ctx'> 	}</div><div class='ctx'> 	free_sja1000dev(dev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver sja1000_isa_driver = {</div><div class='head'>diff --git a/drivers/net/can/sja1000/sja1000_platform.c b/drivers/net/can/sja1000/sja1000_platform.c<br/>index 0552ed46a206..2d555f854008 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sja1000/sja1000_platform.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/sja1000/sja1000_platform.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sja1000/sja1000_platform.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/sja1000/sja1000_platform.c</a></div><div class='hunk'>@@ -1,18 +1,7 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (C) 2005 Sascha Hauer, Pengutronix</div><div class='ctx'>  * Copyright (C) 2007 Wolfgang Grandegger &lt;wg@grandegger.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the version 2 of the GNU General Public License</div><div class='del'>- * as published by the Free Software Foundation</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='hunk'>@@ -25,9 +14,9 @@</div><div class='ctx'> #include &lt;linux/irq.h&gt;</div><div class='ctx'> #include &lt;linux/can/dev.h&gt;</div><div class='ctx'> #include &lt;linux/can/platform/sja1000.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='del'>-#include &lt;linux/of_irq.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "sja1000.h"</div><div class='ctx'> </div><div class='hunk'>@@ -40,6 +29,15 @@ MODULE_DESCRIPTION("Socket-CAN driver for SJA1000 on the platform bus");</div><div class='ctx'> MODULE_ALIAS("platform:" DRV_NAME);</div><div class='ctx'> MODULE_LICENSE("GPL v2");</div><div class='ctx'> </div><div class='add'>+struct sja1000_of_data {</div><div class='add'>+	size_t  priv_sz;</div><div class='add'>+	void    (*init)(struct sja1000_priv *priv, struct device_node *of);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct technologic_priv {</div><div class='add'>+	spinlock_t      io_lock;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static u8 sp_read_reg8(const struct sja1000_priv *priv, int reg)</div><div class='ctx'> {</div><div class='ctx'> 	return ioread8(priv-&gt;reg_base + reg);</div><div class='hunk'>@@ -70,6 +68,46 @@ static void sp_write_reg32(const struct sja1000_priv *priv, int reg, u8 val)</div><div class='ctx'> 	iowrite8(val, priv-&gt;reg_base + reg * 4);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u8 sp_technologic_read_reg16(const struct sja1000_priv *priv, int reg)</div><div class='add'>+{</div><div class='add'>+	struct technologic_priv *tp = priv-&gt;priv;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u8 val;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;tp-&gt;io_lock, flags);</div><div class='add'>+	iowrite16(reg, priv-&gt;reg_base + 0);</div><div class='add'>+	val = ioread16(priv-&gt;reg_base + 2);</div><div class='add'>+	spin_unlock_irqrestore(&amp;tp-&gt;io_lock, flags);</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sp_technologic_write_reg16(const struct sja1000_priv *priv,</div><div class='add'>+				       int reg, u8 val)</div><div class='add'>+{</div><div class='add'>+	struct technologic_priv *tp = priv-&gt;priv;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;tp-&gt;io_lock, flags);</div><div class='add'>+	iowrite16(reg, priv-&gt;reg_base + 0);</div><div class='add'>+	iowrite16(val, priv-&gt;reg_base + 2);</div><div class='add'>+	spin_unlock_irqrestore(&amp;tp-&gt;io_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sp_technologic_init(struct sja1000_priv *priv, struct device_node *of)</div><div class='add'>+{</div><div class='add'>+	struct technologic_priv *tp = priv-&gt;priv;</div><div class='add'>+</div><div class='add'>+	priv-&gt;read_reg = sp_technologic_read_reg16;</div><div class='add'>+	priv-&gt;write_reg = sp_technologic_write_reg16;</div><div class='add'>+	spin_lock_init(&amp;tp-&gt;io_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sp_rzn1_init(struct sja1000_priv *priv, struct device_node *of)</div><div class='add'>+{</div><div class='add'>+	priv-&gt;flags = SJA1000_QUIRK_NO_CDR_REG | SJA1000_QUIRK_RESET_ON_OVERRUN;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void sp_populate(struct sja1000_priv *priv,</div><div class='ctx'> 			struct sja1000_platform_data *pdata,</div><div class='ctx'> 			unsigned long resource_mem_flags)</div><div class='hunk'>@@ -114,17 +152,19 @@ static void sp_populate_of(struct sja1000_priv *priv, struct device_node *of)</div><div class='ctx'> 		priv-&gt;read_reg = sp_read_reg16;</div><div class='ctx'> 		priv-&gt;write_reg = sp_write_reg16;</div><div class='ctx'> 		break;</div><div class='del'>-	case 1:	/* fallthrough */</div><div class='add'>+	case 1:</div><div class='ctx'> 	default:</div><div class='ctx'> 		priv-&gt;read_reg = sp_read_reg8;</div><div class='ctx'> 		priv-&gt;write_reg = sp_write_reg8;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = of_property_read_u32(of, "nxp,external-clock-frequency", &amp;prop);</div><div class='del'>-	if (!err)</div><div class='del'>-		priv-&gt;can.clock.freq = prop / 2;</div><div class='del'>-	else</div><div class='del'>-		priv-&gt;can.clock.freq = SP_CAN_CLOCK; /* default */</div><div class='add'>+	if (!priv-&gt;can.clock.freq) {</div><div class='add'>+		err = of_property_read_u32(of, "nxp,external-clock-frequency", &amp;prop);</div><div class='add'>+		if (!err)</div><div class='add'>+			priv-&gt;can.clock.freq = prop / 2;</div><div class='add'>+		else</div><div class='add'>+			priv-&gt;can.clock.freq = SP_CAN_CLOCK; /* default */</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	err = of_property_read_u32(of, "nxp,tx-output-mode", &amp;prop);</div><div class='ctx'> 	if (!err)</div><div class='hunk'>@@ -154,6 +194,23 @@ static void sp_populate_of(struct sja1000_priv *priv, struct device_node *of)</div><div class='ctx'> 		priv-&gt;cdr |= CDR_CBP; /* default */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static struct sja1000_of_data technologic_data = {</div><div class='add'>+	.priv_sz = sizeof(struct technologic_priv),</div><div class='add'>+	.init = sp_technologic_init,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct sja1000_of_data renesas_data = {</div><div class='add'>+	.init = sp_rzn1_init,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct of_device_id sp_of_table[] = {</div><div class='add'>+	{ .compatible = "nxp,sja1000", .data = NULL, },</div><div class='add'>+	{ .compatible = "renesas,rzn1-sja1000", .data = &amp;renesas_data, },</div><div class='add'>+	{ .compatible = "technologic,sja1000", .data = &amp;technologic_data, },</div><div class='add'>+	{ /* sentinel */ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, sp_of_table);</div><div class='add'>+</div><div class='ctx'> static int sp_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	int err, irq = 0;</div><div class='hunk'>@@ -163,6 +220,9 @@ static int sp_probe(struct platform_device *pdev)</div><div class='ctx'> 	struct resource *res_mem, *res_irq = NULL;</div><div class='ctx'> 	struct sja1000_platform_data *pdata;</div><div class='ctx'> 	struct device_node *of = pdev-&gt;dev.of_node;</div><div class='add'>+	const struct sja1000_of_data *of_data = NULL;</div><div class='add'>+	size_t priv_sz = 0;</div><div class='add'>+	struct clk *clk;</div><div class='ctx'> </div><div class='ctx'> 	pdata = dev_get_platdata(&amp;pdev-&gt;dev);</div><div class='ctx'> 	if (!pdata &amp;&amp; !of) {</div><div class='hunk'>@@ -170,28 +230,30 @@ static int sp_probe(struct platform_device *pdev)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='del'>-	if (!res_mem)</div><div class='del'>-		return -ENODEV;</div><div class='add'>+	addr = devm_platform_get_and_ioremap_resource(pdev, 0, &amp;res_mem);</div><div class='add'>+	if (IS_ERR(addr))</div><div class='add'>+		return PTR_ERR(addr);</div><div class='ctx'> </div><div class='del'>-	if (!devm_request_mem_region(&amp;pdev-&gt;dev, res_mem-&gt;start,</div><div class='del'>-				     resource_size(res_mem), DRV_NAME))</div><div class='del'>-		return -EBUSY;</div><div class='add'>+	if (of) {</div><div class='add'>+		irq = platform_get_irq(pdev, 0);</div><div class='add'>+		if (irq &lt; 0)</div><div class='add'>+			return irq;</div><div class='ctx'> </div><div class='del'>-	addr = devm_ioremap_nocache(&amp;pdev-&gt;dev, res_mem-&gt;start,</div><div class='del'>-				    resource_size(res_mem));</div><div class='del'>-	if (!addr)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	if (of)</div><div class='del'>-		irq = irq_of_parse_and_map(of, 0);</div><div class='del'>-	else</div><div class='add'>+		clk = devm_clk_get_optional_enabled(&amp;pdev-&gt;dev, NULL);</div><div class='add'>+		if (IS_ERR(clk))</div><div class='add'>+			return dev_err_probe(&amp;pdev-&gt;dev, PTR_ERR(clk),</div><div class='add'>+					     "CAN clk operation failed");</div><div class='add'>+	} else {</div><div class='ctx'> 		res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);</div><div class='add'>+		if (!res_irq)</div><div class='add'>+			return -ENODEV;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (!irq &amp;&amp; !res_irq)</div><div class='del'>-		return -ENODEV;</div><div class='add'>+	of_data = device_get_match_data(&amp;pdev-&gt;dev);</div><div class='add'>+	if (of_data)</div><div class='add'>+		priv_sz = of_data-&gt;priv_sz;</div><div class='ctx'> </div><div class='del'>-	dev = alloc_sja1000dev(0);</div><div class='add'>+	dev = alloc_sja1000dev(priv_sz);</div><div class='ctx'> 	if (!dev)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	priv = netdev_priv(dev);</div><div class='hunk'>@@ -205,13 +267,29 @@ static int sp_probe(struct platform_device *pdev)</div><div class='ctx'> 		priv-&gt;irq_flags = IRQF_SHARED;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (priv-&gt;flags &amp; SJA1000_QUIRK_RESET_ON_OVERRUN)</div><div class='add'>+		priv-&gt;irq_flags |= IRQF_ONESHOT;</div><div class='add'>+</div><div class='ctx'> 	dev-&gt;irq = irq;</div><div class='ctx'> 	priv-&gt;reg_base = addr;</div><div class='ctx'> </div><div class='del'>-	if (of)</div><div class='add'>+	if (of) {</div><div class='add'>+		if (clk) {</div><div class='add'>+			priv-&gt;can.clock.freq  = clk_get_rate(clk) / 2;</div><div class='add'>+			if (!priv-&gt;can.clock.freq) {</div><div class='add'>+				err = -EINVAL;</div><div class='add'>+				dev_err(&amp;pdev-&gt;dev, "Zero CAN clk rate");</div><div class='add'>+				goto exit_free;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		sp_populate_of(priv, of);</div><div class='del'>-	else</div><div class='add'>+</div><div class='add'>+		if (of_data &amp;&amp; of_data-&gt;init)</div><div class='add'>+			of_data-&gt;init(priv, of);</div><div class='add'>+	} else {</div><div class='ctx'> 		sp_populate(priv, pdata, res_mem-&gt;flags);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	platform_set_drvdata(pdev, dev);</div><div class='ctx'> 	SET_NETDEV_DEV(dev, &amp;pdev-&gt;dev);</div><div class='hunk'>@@ -232,22 +310,14 @@ static int sp_probe(struct platform_device *pdev)</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sp_remove(struct platform_device *pdev)</div><div class='add'>+static void sp_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = platform_get_drvdata(pdev);</div><div class='ctx'> </div><div class='ctx'> 	unregister_sja1000dev(dev);</div><div class='ctx'> 	free_sja1000dev(dev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const struct of_device_id sp_of_table[] = {</div><div class='del'>-	{.compatible = "nxp,sja1000"},</div><div class='del'>-	{},</div><div class='del'>-};</div><div class='del'>-MODULE_DEVICE_TABLE(of, sp_of_table);</div><div class='del'>-</div><div class='ctx'> static struct platform_driver sp_driver = {</div><div class='ctx'> 	.probe = sp_probe,</div><div class='ctx'> 	.remove = sp_remove,</div><div class='head'>diff --git a/drivers/net/can/sja1000/tscan1.c b/drivers/net/can/sja1000/tscan1.c<br/>index 76513dd780c7..f3862bed3d40 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sja1000/tscan1.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/sja1000/tscan1.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sja1000/tscan1.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/sja1000/tscan1.c</a></div><div class='hunk'>@@ -1,26 +1,13 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='ctx'> /*</div><div class='ctx'>  * tscan1.c: driver for Technologic Systems TS-CAN1 PC104 boards</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright 2010 Andre B. Oliveira</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or</div><div class='del'>- * modify it under the terms of the GNU General Public License</div><div class='del'>- * as published by the Free Software Foundation; either version 2</div><div class='del'>- * of the License, or (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * References:</div><div class='del'>- * - Getting started with TS-CAN1, Technologic Systems, Jun 2009</div><div class='del'>- *	http://www.embeddedarm.com/documentation/ts-can1-manual.pdf</div><div class='add'>+/* References:</div><div class='add'>+ * - Getting started with TS-CAN1, Technologic Systems, Feb 2022</div><div class='add'>+ *	https://docs.embeddedts.com/TS-CAN1</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='hunk'>@@ -171,7 +158,7 @@ static int tscan1_probe(struct device *dev, unsigned id)</div><div class='ctx'> 	return -ENXIO;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tscan1_remove(struct device *dev, unsigned id /*unused*/)</div><div class='add'>+static void tscan1_remove(struct device *dev, unsigned id /*unused*/)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *netdev;</div><div class='ctx'> 	struct sja1000_priv *priv;</div><div class='hunk'>@@ -191,8 +178,6 @@ static int tscan1_remove(struct device *dev, unsigned id /*unused*/)</div><div class='ctx'> 	release_region(pld_base, TSCAN1_PLD_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	free_sja1000dev(netdev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct isa_driver tscan1_isa_driver = {</div><div class='hunk'>@@ -203,14 +188,4 @@ static struct isa_driver tscan1_isa_driver = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init tscan1_init(void)</div><div class='del'>-{</div><div class='del'>-	return isa_register_driver(&amp;tscan1_isa_driver, TSCAN1_MAXDEV);</div><div class='del'>-}</div><div class='del'>-module_init(tscan1_init);</div><div class='del'>-</div><div class='del'>-static void __exit tscan1_exit(void)</div><div class='del'>-{</div><div class='del'>-	isa_unregister_driver(&amp;tscan1_isa_driver);</div><div class='del'>-}</div><div class='del'>-module_exit(tscan1_exit);</div><div class='add'>+module_isa_driver(tscan1_isa_driver, TSCAN1_MAXDEV);</div><div class='head'>diff --git a/drivers/net/can/slcan.c b/drivers/net/can/slcan.c<br/>deleted file mode 100644<br/>index 9a3f15cb7ef4..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/slcan.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/slcan.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,780 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * slcan.c - serial line CAN interface driver (using tty line discipline)</div><div class='del'>- *</div><div class='del'>- * This file is derived from linux/drivers/net/slip/slip.c</div><div class='del'>- *</div><div class='del'>- * slip.c Authors  : Laurence Culhane &lt;loz@holmes.demon.co.uk&gt;</div><div class='del'>- *                   Fred N. van Kempen &lt;waltje@uwalt.nl.mugnet.org&gt;</div><div class='del'>- * slcan.c Author  : Oliver Hartkopp &lt;socketcan@hartkopp.net&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms of the GNU General Public License as published by the</div><div class='del'>- * Free Software Foundation; either version 2 of the License, or (at your</div><div class='del'>- * option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License along</div><div class='del'>- * with this program; if not, see http://www.gnu.org/licenses/gpl.html</div><div class='del'>- *</div><div class='del'>- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS</div><div class='del'>- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT</div><div class='del'>- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR</div><div class='del'>- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT</div><div class='del'>- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,</div><div class='del'>- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT</div><div class='del'>- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,</div><div class='del'>- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY</div><div class='del'>- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='del'>- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE</div><div class='del'>- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH</div><div class='del'>- * DAMAGE.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/moduleparam.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;linux/uaccess.h&gt;</div><div class='del'>-#include &lt;linux/bitops.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/tty.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/skbuff.h&gt;</div><div class='del'>-#include &lt;linux/rtnetlink.h&gt;</div><div class='del'>-#include &lt;linux/if_arp.h&gt;</div><div class='del'>-#include &lt;linux/if_ether.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/workqueue.h&gt;</div><div class='del'>-#include &lt;linux/can.h&gt;</div><div class='del'>-#include &lt;linux/can/skb.h&gt;</div><div class='del'>-</div><div class='del'>-MODULE_ALIAS_LDISC(N_SLCAN);</div><div class='del'>-MODULE_DESCRIPTION("serial line CAN interface");</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_AUTHOR("Oliver Hartkopp &lt;socketcan@hartkopp.net&gt;");</div><div class='del'>-</div><div class='del'>-#define SLCAN_MAGIC 0x53CA</div><div class='del'>-</div><div class='del'>-static int maxdev = 10;		/* MAX number of SLCAN channels;</div><div class='del'>-				   This can be overridden with</div><div class='del'>-				   insmod slcan.ko maxdev=nnn	*/</div><div class='del'>-module_param(maxdev, int, 0);</div><div class='del'>-MODULE_PARM_DESC(maxdev, "Maximum number of slcan interfaces");</div><div class='del'>-</div><div class='del'>-/* maximum rx buffer len: extended CAN frame with timestamp */</div><div class='del'>-#define SLC_MTU (sizeof("T1111222281122334455667788EA5F\r")+1)</div><div class='del'>-</div><div class='del'>-#define SLC_CMD_LEN 1</div><div class='del'>-#define SLC_SFF_ID_LEN 3</div><div class='del'>-#define SLC_EFF_ID_LEN 8</div><div class='del'>-</div><div class='del'>-struct slcan {</div><div class='del'>-	int			magic;</div><div class='del'>-</div><div class='del'>-	/* Various fields. */</div><div class='del'>-	struct tty_struct	*tty;		/* ptr to TTY structure	     */</div><div class='del'>-	struct net_device	*dev;		/* easy for intr handling    */</div><div class='del'>-	spinlock_t		lock;</div><div class='del'>-	struct work_struct	tx_work;	/* Flushes transmit buffer   */</div><div class='del'>-</div><div class='del'>-	/* These are pointers to the malloc()ed frame buffers. */</div><div class='del'>-	unsigned char		rbuff[SLC_MTU];	/* receiver buffer	     */</div><div class='del'>-	int			rcount;         /* received chars counter    */</div><div class='del'>-	unsigned char		xbuff[SLC_MTU];	/* transmitter buffer	     */</div><div class='del'>-	unsigned char		*xhead;         /* pointer to next XMIT byte */</div><div class='del'>-	int			xleft;          /* bytes left in XMIT queue  */</div><div class='del'>-</div><div class='del'>-	unsigned long		flags;		/* Flag values/ mode etc     */</div><div class='del'>-#define SLF_INUSE		0		/* Channel in use            */</div><div class='del'>-#define SLF_ERROR		1               /* Parity, etc. error        */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct net_device **slcan_devs;</div><div class='del'>-</div><div class='del'>- /************************************************************************</div><div class='del'>-  *			SLCAN ENCAPSULATION FORMAT			 *</div><div class='del'>-  ************************************************************************/</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * A CAN frame has a can_id (11 bit standard frame format OR 29 bit extended</div><div class='del'>- * frame format) a data length code (can_dlc) which can be from 0 to 8</div><div class='del'>- * and up to &lt;can_dlc&gt; data bytes as payload.</div><div class='del'>- * Additionally a CAN frame may become a remote transmission frame if the</div><div class='del'>- * RTR-bit is set. This causes another ECU to send a CAN frame with the</div><div class='del'>- * given can_id.</div><div class='del'>- *</div><div class='del'>- * The SLCAN ASCII representation of these different frame types is:</div><div class='del'>- * &lt;type&gt; &lt;id&gt; &lt;dlc&gt; &lt;data&gt;*</div><div class='del'>- *</div><div class='del'>- * Extended frames (29 bit) are defined by capital characters in the type.</div><div class='del'>- * RTR frames are defined as 'r' types - normal frames have 't' type:</div><div class='del'>- * t =&gt; 11 bit data frame</div><div class='del'>- * r =&gt; 11 bit RTR frame</div><div class='del'>- * T =&gt; 29 bit data frame</div><div class='del'>- * R =&gt; 29 bit RTR frame</div><div class='del'>- *</div><div class='del'>- * The &lt;id&gt; is 3 (standard) or 8 (extended) bytes in ASCII Hex (base64).</div><div class='del'>- * The &lt;dlc&gt; is a one byte ASCII number ('0' - '8')</div><div class='del'>- * The &lt;data&gt; section has at much ASCII Hex bytes as defined by the &lt;dlc&gt;</div><div class='del'>- *</div><div class='del'>- * Examples:</div><div class='del'>- *</div><div class='del'>- * t1230 : can_id 0x123, can_dlc 0, no data</div><div class='del'>- * t4563112233 : can_id 0x456, can_dlc 3, data 0x11 0x22 0x33</div><div class='del'>- * T12ABCDEF2AA55 : extended can_id 0x12ABCDEF, can_dlc 2, data 0xAA 0x55</div><div class='del'>- * r1230 : can_id 0x123, can_dlc 0, no data, remote transmission request</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>- /************************************************************************</div><div class='del'>-  *			STANDARD SLCAN DECAPSULATION			 *</div><div class='del'>-  ************************************************************************/</div><div class='del'>-</div><div class='del'>-/* Send one completely decapsulated can_frame to the network layer */</div><div class='del'>-static void slc_bump(struct slcan *sl)</div><div class='del'>-{</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	struct can_frame cf;</div><div class='del'>-	int i, tmp;</div><div class='del'>-	u32 tmpid;</div><div class='del'>-	char *cmd = sl-&gt;rbuff;</div><div class='del'>-</div><div class='del'>-	cf.can_id = 0;</div><div class='del'>-</div><div class='del'>-	switch (*cmd) {</div><div class='del'>-	case 'r':</div><div class='del'>-		cf.can_id = CAN_RTR_FLAG;</div><div class='del'>-		/* fallthrough */</div><div class='del'>-	case 't':</div><div class='del'>-		/* store dlc ASCII value and terminate SFF CAN ID string */</div><div class='del'>-		cf.can_dlc = sl-&gt;rbuff[SLC_CMD_LEN + SLC_SFF_ID_LEN];</div><div class='del'>-		sl-&gt;rbuff[SLC_CMD_LEN + SLC_SFF_ID_LEN] = 0;</div><div class='del'>-		/* point to payload data behind the dlc */</div><div class='del'>-		cmd += SLC_CMD_LEN + SLC_SFF_ID_LEN + 1;</div><div class='del'>-		break;</div><div class='del'>-	case 'R':</div><div class='del'>-		cf.can_id = CAN_RTR_FLAG;</div><div class='del'>-		/* fallthrough */</div><div class='del'>-	case 'T':</div><div class='del'>-		cf.can_id |= CAN_EFF_FLAG;</div><div class='del'>-		/* store dlc ASCII value and terminate EFF CAN ID string */</div><div class='del'>-		cf.can_dlc = sl-&gt;rbuff[SLC_CMD_LEN + SLC_EFF_ID_LEN];</div><div class='del'>-		sl-&gt;rbuff[SLC_CMD_LEN + SLC_EFF_ID_LEN] = 0;</div><div class='del'>-		/* point to payload data behind the dlc */</div><div class='del'>-		cmd += SLC_CMD_LEN + SLC_EFF_ID_LEN + 1;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (kstrtou32(sl-&gt;rbuff + SLC_CMD_LEN, 16, &amp;tmpid))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	cf.can_id |= tmpid;</div><div class='del'>-</div><div class='del'>-	/* get can_dlc from sanitized ASCII value */</div><div class='del'>-	if (cf.can_dlc &gt;= '0' &amp;&amp; cf.can_dlc &lt; '9')</div><div class='del'>-		cf.can_dlc -= '0';</div><div class='del'>-	else</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	*(u64 *) (&amp;cf.data) = 0; /* clear payload */</div><div class='del'>-</div><div class='del'>-	/* RTR frames may have a dlc &gt; 0 but they never have any data bytes */</div><div class='del'>-	if (!(cf.can_id &amp; CAN_RTR_FLAG)) {</div><div class='del'>-		for (i = 0; i &lt; cf.can_dlc; i++) {</div><div class='del'>-			tmp = hex_to_bin(*cmd++);</div><div class='del'>-			if (tmp &lt; 0)</div><div class='del'>-				return;</div><div class='del'>-			cf.data[i] = (tmp &lt;&lt; 4);</div><div class='del'>-			tmp = hex_to_bin(*cmd++);</div><div class='del'>-			if (tmp &lt; 0)</div><div class='del'>-				return;</div><div class='del'>-			cf.data[i] |= tmp;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	skb = dev_alloc_skb(sizeof(struct can_frame) +</div><div class='del'>-			    sizeof(struct can_skb_priv));</div><div class='del'>-	if (!skb)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	skb-&gt;dev = sl-&gt;dev;</div><div class='del'>-	skb-&gt;protocol = htons(ETH_P_CAN);</div><div class='del'>-	skb-&gt;pkt_type = PACKET_BROADCAST;</div><div class='del'>-	skb-&gt;ip_summed = CHECKSUM_UNNECESSARY;</div><div class='del'>-</div><div class='del'>-	can_skb_reserve(skb);</div><div class='del'>-	can_skb_prv(skb)-&gt;ifindex = sl-&gt;dev-&gt;ifindex;</div><div class='del'>-	can_skb_prv(skb)-&gt;skbcnt = 0;</div><div class='del'>-</div><div class='del'>-	memcpy(skb_put(skb, sizeof(struct can_frame)),</div><div class='del'>-	       &amp;cf, sizeof(struct can_frame));</div><div class='del'>-</div><div class='del'>-	sl-&gt;dev-&gt;stats.rx_packets++;</div><div class='del'>-	sl-&gt;dev-&gt;stats.rx_bytes += cf.can_dlc;</div><div class='del'>-	netif_rx_ni(skb);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* parse tty input stream */</div><div class='del'>-static void slcan_unesc(struct slcan *sl, unsigned char s)</div><div class='del'>-{</div><div class='del'>-	if ((s == '\r') || (s == '\a')) { /* CR or BEL ends the pdu */</div><div class='del'>-		if (!test_and_clear_bit(SLF_ERROR, &amp;sl-&gt;flags) &amp;&amp;</div><div class='del'>-		    (sl-&gt;rcount &gt; 4))  {</div><div class='del'>-			slc_bump(sl);</div><div class='del'>-		}</div><div class='del'>-		sl-&gt;rcount = 0;</div><div class='del'>-	} else {</div><div class='del'>-		if (!test_bit(SLF_ERROR, &amp;sl-&gt;flags))  {</div><div class='del'>-			if (sl-&gt;rcount &lt; SLC_MTU)  {</div><div class='del'>-				sl-&gt;rbuff[sl-&gt;rcount++] = s;</div><div class='del'>-				return;</div><div class='del'>-			} else {</div><div class='del'>-				sl-&gt;dev-&gt;stats.rx_over_errors++;</div><div class='del'>-				set_bit(SLF_ERROR, &amp;sl-&gt;flags);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>- /************************************************************************</div><div class='del'>-  *			STANDARD SLCAN ENCAPSULATION			 *</div><div class='del'>-  ************************************************************************/</div><div class='del'>-</div><div class='del'>-/* Encapsulate one can_frame and stuff into a TTY queue. */</div><div class='del'>-static void slc_encaps(struct slcan *sl, struct can_frame *cf)</div><div class='del'>-{</div><div class='del'>-	int actual, i;</div><div class='del'>-	unsigned char *pos;</div><div class='del'>-	unsigned char *endpos;</div><div class='del'>-	canid_t id = cf-&gt;can_id;</div><div class='del'>-</div><div class='del'>-	pos = sl-&gt;xbuff;</div><div class='del'>-</div><div class='del'>-	if (cf-&gt;can_id &amp; CAN_RTR_FLAG)</div><div class='del'>-		*pos = 'R'; /* becomes 'r' in standard frame format (SFF) */</div><div class='del'>-	else</div><div class='del'>-		*pos = 'T'; /* becomes 't' in standard frame format (SSF) */</div><div class='del'>-</div><div class='del'>-	/* determine number of chars for the CAN-identifier */</div><div class='del'>-	if (cf-&gt;can_id &amp; CAN_EFF_FLAG) {</div><div class='del'>-		id &amp;= CAN_EFF_MASK;</div><div class='del'>-		endpos = pos + SLC_EFF_ID_LEN;</div><div class='del'>-	} else {</div><div class='del'>-		*pos |= 0x20; /* convert R/T to lower case for SFF */</div><div class='del'>-		id &amp;= CAN_SFF_MASK;</div><div class='del'>-		endpos = pos + SLC_SFF_ID_LEN;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* build 3 (SFF) or 8 (EFF) digit CAN identifier */</div><div class='del'>-	pos++;</div><div class='del'>-	while (endpos &gt;= pos) {</div><div class='del'>-		*endpos-- = hex_asc_upper[id &amp; 0xf];</div><div class='del'>-		id &gt;&gt;= 4;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pos += (cf-&gt;can_id &amp; CAN_EFF_FLAG) ? SLC_EFF_ID_LEN : SLC_SFF_ID_LEN;</div><div class='del'>-</div><div class='del'>-	*pos++ = cf-&gt;can_dlc + '0';</div><div class='del'>-</div><div class='del'>-	/* RTR frames may have a dlc &gt; 0 but they never have any data bytes */</div><div class='del'>-	if (!(cf-&gt;can_id &amp; CAN_RTR_FLAG)) {</div><div class='del'>-		for (i = 0; i &lt; cf-&gt;can_dlc; i++)</div><div class='del'>-			pos = hex_byte_pack_upper(pos, cf-&gt;data[i]);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	*pos++ = '\r';</div><div class='del'>-</div><div class='del'>-	/* Order of next two lines is *very* important.</div><div class='del'>-	 * When we are sending a little amount of data,</div><div class='del'>-	 * the transfer may be completed inside the ops-&gt;write()</div><div class='del'>-	 * routine, because it's running with interrupts enabled.</div><div class='del'>-	 * In this case we *never* got WRITE_WAKEUP event,</div><div class='del'>-	 * if we did not request it before write operation.</div><div class='del'>-	 *       14 Oct 1994  Dmitry Gorodchanin.</div><div class='del'>-	 */</div><div class='del'>-	set_bit(TTY_DO_WRITE_WAKEUP, &amp;sl-&gt;tty-&gt;flags);</div><div class='del'>-	actual = sl-&gt;tty-&gt;ops-&gt;write(sl-&gt;tty, sl-&gt;xbuff, pos - sl-&gt;xbuff);</div><div class='del'>-	sl-&gt;xleft = (pos - sl-&gt;xbuff) - actual;</div><div class='del'>-	sl-&gt;xhead = sl-&gt;xbuff + actual;</div><div class='del'>-	sl-&gt;dev-&gt;stats.tx_bytes += cf-&gt;can_dlc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Write out any remaining transmit buffer. Scheduled when tty is writable */</div><div class='del'>-static void slcan_transmit(struct work_struct *work)</div><div class='del'>-{</div><div class='del'>-	struct slcan *sl = container_of(work, struct slcan, tx_work);</div><div class='del'>-	int actual;</div><div class='del'>-</div><div class='del'>-	spin_lock_bh(&amp;sl-&gt;lock);</div><div class='del'>-	/* First make sure we're connected. */</div><div class='del'>-	if (!sl-&gt;tty || sl-&gt;magic != SLCAN_MAGIC || !netif_running(sl-&gt;dev)) {</div><div class='del'>-		spin_unlock_bh(&amp;sl-&gt;lock);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (sl-&gt;xleft &lt;= 0)  {</div><div class='del'>-		/* Now serial buffer is almost free &amp; we can start</div><div class='del'>-		 * transmission of another packet */</div><div class='del'>-		sl-&gt;dev-&gt;stats.tx_packets++;</div><div class='del'>-		clear_bit(TTY_DO_WRITE_WAKEUP, &amp;sl-&gt;tty-&gt;flags);</div><div class='del'>-		spin_unlock_bh(&amp;sl-&gt;lock);</div><div class='del'>-		netif_wake_queue(sl-&gt;dev);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	actual = sl-&gt;tty-&gt;ops-&gt;write(sl-&gt;tty, sl-&gt;xhead, sl-&gt;xleft);</div><div class='del'>-	sl-&gt;xleft -= actual;</div><div class='del'>-	sl-&gt;xhead += actual;</div><div class='del'>-	spin_unlock_bh(&amp;sl-&gt;lock);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Called by the driver when there's room for more data.</div><div class='del'>- * Schedule the transmit.</div><div class='del'>- */</div><div class='del'>-static void slcan_write_wakeup(struct tty_struct *tty)</div><div class='del'>-{</div><div class='del'>-	struct slcan *sl = tty-&gt;disc_data;</div><div class='del'>-</div><div class='del'>-	schedule_work(&amp;sl-&gt;tx_work);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Send a can_frame to a TTY queue. */</div><div class='del'>-static netdev_tx_t slc_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct slcan *sl = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	if (skb-&gt;len != sizeof(struct can_frame))</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;sl-&gt;lock);</div><div class='del'>-	if (!netif_running(dev))  {</div><div class='del'>-		spin_unlock(&amp;sl-&gt;lock);</div><div class='del'>-		printk(KERN_WARNING "%s: xmit: iface is down\n", dev-&gt;name);</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-	if (sl-&gt;tty == NULL) {</div><div class='del'>-		spin_unlock(&amp;sl-&gt;lock);</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	netif_stop_queue(sl-&gt;dev);</div><div class='del'>-	slc_encaps(sl, (struct can_frame *) skb-&gt;data); /* encaps &amp; send */</div><div class='del'>-	spin_unlock(&amp;sl-&gt;lock);</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	kfree_skb(skb);</div><div class='del'>-	return NETDEV_TX_OK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/******************************************</div><div class='del'>- *   Routines looking at netdevice side.</div><div class='del'>- ******************************************/</div><div class='del'>-</div><div class='del'>-/* Netdevice UP -&gt; DOWN routine */</div><div class='del'>-static int slc_close(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct slcan *sl = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	spin_lock_bh(&amp;sl-&gt;lock);</div><div class='del'>-	if (sl-&gt;tty) {</div><div class='del'>-		/* TTY discipline is running. */</div><div class='del'>-		clear_bit(TTY_DO_WRITE_WAKEUP, &amp;sl-&gt;tty-&gt;flags);</div><div class='del'>-	}</div><div class='del'>-	netif_stop_queue(dev);</div><div class='del'>-	sl-&gt;rcount   = 0;</div><div class='del'>-	sl-&gt;xleft    = 0;</div><div class='del'>-	spin_unlock_bh(&amp;sl-&gt;lock);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Netdevice DOWN -&gt; UP routine */</div><div class='del'>-static int slc_open(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct slcan *sl = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	if (sl-&gt;tty == NULL)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	sl-&gt;flags &amp;= (1 &lt;&lt; SLF_INUSE);</div><div class='del'>-	netif_start_queue(dev);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Hook the destructor so we can free slcan devs at the right point in time */</div><div class='del'>-static void slc_free_netdev(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	int i = dev-&gt;base_addr;</div><div class='del'>-	free_netdev(dev);</div><div class='del'>-	slcan_devs[i] = NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int slcan_change_mtu(struct net_device *dev, int new_mtu)</div><div class='del'>-{</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct net_device_ops slc_netdev_ops = {</div><div class='del'>-	.ndo_open               = slc_open,</div><div class='del'>-	.ndo_stop               = slc_close,</div><div class='del'>-	.ndo_start_xmit         = slc_xmit,</div><div class='del'>-	.ndo_change_mtu         = slcan_change_mtu,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void slc_setup(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	dev-&gt;netdev_ops		= &amp;slc_netdev_ops;</div><div class='del'>-	dev-&gt;destructor		= slc_free_netdev;</div><div class='del'>-</div><div class='del'>-	dev-&gt;hard_header_len	= 0;</div><div class='del'>-	dev-&gt;addr_len		= 0;</div><div class='del'>-	dev-&gt;tx_queue_len	= 10;</div><div class='del'>-</div><div class='del'>-	dev-&gt;mtu		= sizeof(struct can_frame);</div><div class='del'>-	dev-&gt;type		= ARPHRD_CAN;</div><div class='del'>-</div><div class='del'>-	/* New-style flags. */</div><div class='del'>-	dev-&gt;flags		= IFF_NOARP;</div><div class='del'>-	dev-&gt;features           = NETIF_F_HW_CSUM;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/******************************************</div><div class='del'>-  Routines looking at TTY side.</div><div class='del'>- ******************************************/</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Handle the 'receiver data ready' interrupt.</div><div class='del'>- * This function is called by the 'tty_io' module in the kernel when</div><div class='del'>- * a block of SLCAN data has been received, which can now be decapsulated</div><div class='del'>- * and sent on to some IP layer for further processing. This will not</div><div class='del'>- * be re-entered while running but other ldisc functions may be called</div><div class='del'>- * in parallel</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void slcan_receive_buf(struct tty_struct *tty,</div><div class='del'>-			      const unsigned char *cp, char *fp, int count)</div><div class='del'>-{</div><div class='del'>-	struct slcan *sl = (struct slcan *) tty-&gt;disc_data;</div><div class='del'>-</div><div class='del'>-	if (!sl || sl-&gt;magic != SLCAN_MAGIC || !netif_running(sl-&gt;dev))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* Read the characters out of the buffer */</div><div class='del'>-	while (count--) {</div><div class='del'>-		if (fp &amp;&amp; *fp++) {</div><div class='del'>-			if (!test_and_set_bit(SLF_ERROR, &amp;sl-&gt;flags))</div><div class='del'>-				sl-&gt;dev-&gt;stats.rx_errors++;</div><div class='del'>-			cp++;</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-		slcan_unesc(sl, *cp++);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/************************************</div><div class='del'>- *  slcan_open helper routines.</div><div class='del'>- ************************************/</div><div class='del'>-</div><div class='del'>-/* Collect hanged up channels */</div><div class='del'>-static void slc_sync(void)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	struct net_device *dev;</div><div class='del'>-	struct slcan	  *sl;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; maxdev; i++) {</div><div class='del'>-		dev = slcan_devs[i];</div><div class='del'>-		if (dev == NULL)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		sl = netdev_priv(dev);</div><div class='del'>-		if (sl-&gt;tty)</div><div class='del'>-			continue;</div><div class='del'>-		if (dev-&gt;flags &amp; IFF_UP)</div><div class='del'>-			dev_close(dev);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Find a free SLCAN channel, and link in this `tty' line. */</div><div class='del'>-static struct slcan *slc_alloc(dev_t line)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	char name[IFNAMSIZ];</div><div class='del'>-	struct net_device *dev = NULL;</div><div class='del'>-	struct slcan       *sl;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; maxdev; i++) {</div><div class='del'>-		dev = slcan_devs[i];</div><div class='del'>-		if (dev == NULL)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Sorry, too many, all slots in use */</div><div class='del'>-	if (i &gt;= maxdev)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	sprintf(name, "slcan%d", i);</div><div class='del'>-	dev = alloc_netdev(sizeof(*sl), name, NET_NAME_UNKNOWN, slc_setup);</div><div class='del'>-	if (!dev)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	dev-&gt;base_addr  = i;</div><div class='del'>-	sl = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	/* Initialize channel control data */</div><div class='del'>-	sl-&gt;magic = SLCAN_MAGIC;</div><div class='del'>-	sl-&gt;dev	= dev;</div><div class='del'>-	spin_lock_init(&amp;sl-&gt;lock);</div><div class='del'>-	INIT_WORK(&amp;sl-&gt;tx_work, slcan_transmit);</div><div class='del'>-	slcan_devs[i] = dev;</div><div class='del'>-</div><div class='del'>-	return sl;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Open the high-level part of the SLCAN channel.</div><div class='del'>- * This function is called by the TTY module when the</div><div class='del'>- * SLCAN line discipline is called for.  Because we are</div><div class='del'>- * sure the tty line exists, we only have to link it to</div><div class='del'>- * a free SLCAN channel...</div><div class='del'>- *</div><div class='del'>- * Called in process context serialized from other ldisc calls.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int slcan_open(struct tty_struct *tty)</div><div class='del'>-{</div><div class='del'>-	struct slcan *sl;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	if (!capable(CAP_NET_ADMIN))</div><div class='del'>-		return -EPERM;</div><div class='del'>-</div><div class='del'>-	if (tty-&gt;ops-&gt;write == NULL)</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='del'>-	/* RTnetlink lock is misused here to serialize concurrent</div><div class='del'>-	   opens of slcan channels. There are better ways, but it is</div><div class='del'>-	   the simplest one.</div><div class='del'>-	 */</div><div class='del'>-	rtnl_lock();</div><div class='del'>-</div><div class='del'>-	/* Collect hanged up channels. */</div><div class='del'>-	slc_sync();</div><div class='del'>-</div><div class='del'>-	sl = tty-&gt;disc_data;</div><div class='del'>-</div><div class='del'>-	err = -EEXIST;</div><div class='del'>-	/* First make sure we're not already connected. */</div><div class='del'>-	if (sl &amp;&amp; sl-&gt;magic == SLCAN_MAGIC)</div><div class='del'>-		goto err_exit;</div><div class='del'>-</div><div class='del'>-	/* OK.  Find a free SLCAN channel to use. */</div><div class='del'>-	err = -ENFILE;</div><div class='del'>-	sl = slc_alloc(tty_devnum(tty));</div><div class='del'>-	if (sl == NULL)</div><div class='del'>-		goto err_exit;</div><div class='del'>-</div><div class='del'>-	sl-&gt;tty = tty;</div><div class='del'>-	tty-&gt;disc_data = sl;</div><div class='del'>-</div><div class='del'>-	if (!test_bit(SLF_INUSE, &amp;sl-&gt;flags)) {</div><div class='del'>-		/* Perform the low-level SLCAN initialization. */</div><div class='del'>-		sl-&gt;rcount   = 0;</div><div class='del'>-		sl-&gt;xleft    = 0;</div><div class='del'>-</div><div class='del'>-		set_bit(SLF_INUSE, &amp;sl-&gt;flags);</div><div class='del'>-</div><div class='del'>-		err = register_netdevice(sl-&gt;dev);</div><div class='del'>-		if (err)</div><div class='del'>-			goto err_free_chan;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Done.  We have linked the TTY line to a channel. */</div><div class='del'>-	rtnl_unlock();</div><div class='del'>-	tty-&gt;receive_room = 65536;	/* We don't flow control */</div><div class='del'>-</div><div class='del'>-	/* TTY layer expects 0 on success */</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-err_free_chan:</div><div class='del'>-	sl-&gt;tty = NULL;</div><div class='del'>-	tty-&gt;disc_data = NULL;</div><div class='del'>-	clear_bit(SLF_INUSE, &amp;sl-&gt;flags);</div><div class='del'>-</div><div class='del'>-err_exit:</div><div class='del'>-	rtnl_unlock();</div><div class='del'>-</div><div class='del'>-	/* Count references from TTY module */</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Close down a SLCAN channel.</div><div class='del'>- * This means flushing out any pending queues, and then returning. This</div><div class='del'>- * call is serialized against other ldisc functions.</div><div class='del'>- *</div><div class='del'>- * We also use this method for a hangup event.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void slcan_close(struct tty_struct *tty)</div><div class='del'>-{</div><div class='del'>-	struct slcan *sl = (struct slcan *) tty-&gt;disc_data;</div><div class='del'>-</div><div class='del'>-	/* First make sure we're connected. */</div><div class='del'>-	if (!sl || sl-&gt;magic != SLCAN_MAGIC || sl-&gt;tty != tty)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	spin_lock_bh(&amp;sl-&gt;lock);</div><div class='del'>-	tty-&gt;disc_data = NULL;</div><div class='del'>-	sl-&gt;tty = NULL;</div><div class='del'>-	spin_unlock_bh(&amp;sl-&gt;lock);</div><div class='del'>-</div><div class='del'>-	flush_work(&amp;sl-&gt;tx_work);</div><div class='del'>-</div><div class='del'>-	/* Flush network side */</div><div class='del'>-	unregister_netdev(sl-&gt;dev);</div><div class='del'>-	/* This will complete via sl_free_netdev */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int slcan_hangup(struct tty_struct *tty)</div><div class='del'>-{</div><div class='del'>-	slcan_close(tty);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Perform I/O control on an active SLCAN channel. */</div><div class='del'>-static int slcan_ioctl(struct tty_struct *tty, struct file *file,</div><div class='del'>-		       unsigned int cmd, unsigned long arg)</div><div class='del'>-{</div><div class='del'>-	struct slcan *sl = (struct slcan *) tty-&gt;disc_data;</div><div class='del'>-	unsigned int tmp;</div><div class='del'>-</div><div class='del'>-	/* First make sure we're connected. */</div><div class='del'>-	if (!sl || sl-&gt;magic != SLCAN_MAGIC)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case SIOCGIFNAME:</div><div class='del'>-		tmp = strlen(sl-&gt;dev-&gt;name) + 1;</div><div class='del'>-		if (copy_to_user((void __user *)arg, sl-&gt;dev-&gt;name, tmp))</div><div class='del'>-			return -EFAULT;</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	case SIOCSIFHWADDR:</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		return tty_mode_ioctl(tty, file, cmd, arg);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct tty_ldisc_ops slc_ldisc = {</div><div class='del'>-	.owner		= THIS_MODULE,</div><div class='del'>-	.magic		= TTY_LDISC_MAGIC,</div><div class='del'>-	.name		= "slcan",</div><div class='del'>-	.open		= slcan_open,</div><div class='del'>-	.close		= slcan_close,</div><div class='del'>-	.hangup		= slcan_hangup,</div><div class='del'>-	.ioctl		= slcan_ioctl,</div><div class='del'>-	.receive_buf	= slcan_receive_buf,</div><div class='del'>-	.write_wakeup	= slcan_write_wakeup,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init slcan_init(void)</div><div class='del'>-{</div><div class='del'>-	int status;</div><div class='del'>-</div><div class='del'>-	if (maxdev &lt; 4)</div><div class='del'>-		maxdev = 4; /* Sanity */</div><div class='del'>-</div><div class='del'>-	pr_info("slcan: serial line CAN interface driver\n");</div><div class='del'>-	pr_info("slcan: %d dynamic interface channels.\n", maxdev);</div><div class='del'>-</div><div class='del'>-	slcan_devs = kzalloc(sizeof(struct net_device *)*maxdev, GFP_KERNEL);</div><div class='del'>-	if (!slcan_devs)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	/* Fill in our line protocol discipline, and register it */</div><div class='del'>-	status = tty_register_ldisc(N_SLCAN, &amp;slc_ldisc);</div><div class='del'>-	if (status)  {</div><div class='del'>-		printk(KERN_ERR "slcan: can't register line discipline\n");</div><div class='del'>-		kfree(slcan_devs);</div><div class='del'>-	}</div><div class='del'>-	return status;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit slcan_exit(void)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	struct net_device *dev;</div><div class='del'>-	struct slcan *sl;</div><div class='del'>-	unsigned long timeout = jiffies + HZ;</div><div class='del'>-	int busy = 0;</div><div class='del'>-</div><div class='del'>-	if (slcan_devs == NULL)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* First of all: check for active disciplines and hangup them.</div><div class='del'>-	 */</div><div class='del'>-	do {</div><div class='del'>-		if (busy)</div><div class='del'>-			msleep_interruptible(100);</div><div class='del'>-</div><div class='del'>-		busy = 0;</div><div class='del'>-		for (i = 0; i &lt; maxdev; i++) {</div><div class='del'>-			dev = slcan_devs[i];</div><div class='del'>-			if (!dev)</div><div class='del'>-				continue;</div><div class='del'>-			sl = netdev_priv(dev);</div><div class='del'>-			spin_lock_bh(&amp;sl-&gt;lock);</div><div class='del'>-			if (sl-&gt;tty) {</div><div class='del'>-				busy++;</div><div class='del'>-				tty_hangup(sl-&gt;tty);</div><div class='del'>-			}</div><div class='del'>-			spin_unlock_bh(&amp;sl-&gt;lock);</div><div class='del'>-		}</div><div class='del'>-	} while (busy &amp;&amp; time_before(jiffies, timeout));</div><div class='del'>-</div><div class='del'>-	/* FIXME: hangup is async so we should wait when doing this second</div><div class='del'>-	   phase */</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; maxdev; i++) {</div><div class='del'>-		dev = slcan_devs[i];</div><div class='del'>-		if (!dev)</div><div class='del'>-			continue;</div><div class='del'>-		slcan_devs[i] = NULL;</div><div class='del'>-</div><div class='del'>-		sl = netdev_priv(dev);</div><div class='del'>-		if (sl-&gt;tty) {</div><div class='del'>-			printk(KERN_ERR "%s: tty discipline still running\n",</div><div class='del'>-			       dev-&gt;name);</div><div class='del'>-			/* Intentionally leak the control block. */</div><div class='del'>-			dev-&gt;destructor = NULL;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		unregister_netdev(dev);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	kfree(slcan_devs);</div><div class='del'>-	slcan_devs = NULL;</div><div class='del'>-</div><div class='del'>-	i = tty_unregister_ldisc(N_SLCAN);</div><div class='del'>-	if (i)</div><div class='del'>-		printk(KERN_ERR "slcan: can't unregister ldisc (err %d)\n", i);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(slcan_init);</div><div class='del'>-module_exit(slcan_exit);</div><div class='head'>diff --git a/drivers/net/can/slcan/Makefile b/drivers/net/can/slcan/Makefile<br/>new file mode 100644<br/>index 000000000000..8a88e484ee21<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/slcan/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/slcan/Makefile</a></div><div class='hunk'>@@ -0,0 +1,7 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_CAN_SLCAN) += slcan.o</div><div class='add'>+</div><div class='add'>+slcan-objs :=</div><div class='add'>+slcan-objs += slcan-core.o</div><div class='add'>+slcan-objs += slcan-ethtool.o</div><div class='head'>diff --git a/drivers/net/can/slcan/slcan-core.c b/drivers/net/can/slcan/slcan-core.c<br/>new file mode 100644<br/>index 000000000000..cd789e178d34<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/slcan/slcan-core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/slcan/slcan-core.c</a></div><div class='hunk'>@@ -0,0 +1,953 @@</div><div class='add'>+/*</div><div class='add'>+ * slcan.c - serial line CAN interface driver (using tty line discipline)</div><div class='add'>+ *</div><div class='add'>+ * This file is derived from linux/drivers/net/slip/slip.c and got</div><div class='add'>+ * inspiration from linux/drivers/net/can/can327.c for the rework made</div><div class='add'>+ * on the line discipline code.</div><div class='add'>+ *</div><div class='add'>+ * slip.c Authors  : Laurence Culhane &lt;loz@holmes.demon.co.uk&gt;</div><div class='add'>+ *                   Fred N. van Kempen &lt;waltje@uwalt.nl.mugnet.org&gt;</div><div class='add'>+ * slcan.c Author  : Oliver Hartkopp &lt;socketcan@hartkopp.net&gt;</div><div class='add'>+ * can327.c Author : Max Staudt &lt;max-linux@enpas.org&gt;</div><div class='add'>+ *</div><div class='add'>+ * This program is free software; you can redistribute it and/or modify it</div><div class='add'>+ * under the terms of the GNU General Public License as published by the</div><div class='add'>+ * Free Software Foundation; either version 2 of the License, or (at your</div><div class='add'>+ * option) any later version.</div><div class='add'>+ *</div><div class='add'>+ * This program is distributed in the hope that it will be useful, but</div><div class='add'>+ * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='add'>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU</div><div class='add'>+ * General Public License for more details.</div><div class='add'>+ *</div><div class='add'>+ * You should have received a copy of the GNU General Public License along</div><div class='add'>+ * with this program; if not, see http://www.gnu.org/licenses/gpl.html</div><div class='add'>+ *</div><div class='add'>+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS</div><div class='add'>+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT</div><div class='add'>+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR</div><div class='add'>+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT</div><div class='add'>+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,</div><div class='add'>+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT</div><div class='add'>+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,</div><div class='add'>+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY</div><div class='add'>+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='add'>+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE</div><div class='add'>+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH</div><div class='add'>+ * DAMAGE.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='add'>+#include &lt;linux/bitops.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/tty.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/skbuff.h&gt;</div><div class='add'>+#include &lt;linux/rtnetlink.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/workqueue.h&gt;</div><div class='add'>+#include &lt;linux/can.h&gt;</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/can/skb.h&gt;</div><div class='add'>+</div><div class='add'>+#include "slcan.h"</div><div class='add'>+</div><div class='add'>+MODULE_ALIAS_LDISC(N_SLCAN);</div><div class='add'>+MODULE_DESCRIPTION("serial line CAN interface");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_AUTHOR("Oliver Hartkopp &lt;socketcan@hartkopp.net&gt;");</div><div class='add'>+MODULE_AUTHOR("Dario Binacchi &lt;dario.binacchi@amarulasolutions.com&gt;");</div><div class='add'>+</div><div class='add'>+/* maximum rx buffer len: extended CAN frame with timestamp */</div><div class='add'>+#define SLCAN_MTU (sizeof("T1111222281122334455667788EA5F\r") + 1)</div><div class='add'>+</div><div class='add'>+#define SLCAN_CMD_LEN 1</div><div class='add'>+#define SLCAN_SFF_ID_LEN 3</div><div class='add'>+#define SLCAN_EFF_ID_LEN 8</div><div class='add'>+#define SLCAN_DATA_LENGTH_LEN 1</div><div class='add'>+#define SLCAN_ERROR_LEN 1</div><div class='add'>+#define SLCAN_STATE_LEN 1</div><div class='add'>+#define SLCAN_STATE_BE_RXCNT_LEN 3</div><div class='add'>+#define SLCAN_STATE_BE_TXCNT_LEN 3</div><div class='add'>+#define SLCAN_STATE_MSG_LEN     (SLCAN_CMD_LEN +		\</div><div class='add'>+                                 SLCAN_STATE_LEN +		\</div><div class='add'>+                                 SLCAN_STATE_BE_RXCNT_LEN +	\</div><div class='add'>+                                 SLCAN_STATE_BE_TXCNT_LEN)</div><div class='add'>+#define SLCAN_ERROR_MSG_LEN_MIN (SLCAN_CMD_LEN +	\</div><div class='add'>+                                 SLCAN_ERROR_LEN +	\</div><div class='add'>+                                 SLCAN_DATA_LENGTH_LEN)</div><div class='add'>+#define SLCAN_FRAME_MSG_LEN_MIN (SLCAN_CMD_LEN +	\</div><div class='add'>+                                 SLCAN_SFF_ID_LEN +	\</div><div class='add'>+                                 SLCAN_DATA_LENGTH_LEN)</div><div class='add'>+struct slcan {</div><div class='add'>+	struct can_priv         can;</div><div class='add'>+</div><div class='add'>+	/* Various fields. */</div><div class='add'>+	struct tty_struct	*tty;		/* ptr to TTY structure	     */</div><div class='add'>+	struct net_device	*dev;		/* easy for intr handling    */</div><div class='add'>+	spinlock_t		lock;</div><div class='add'>+	struct work_struct	tx_work;	/* Flushes transmit buffer   */</div><div class='add'>+</div><div class='add'>+	/* These are pointers to the malloc()ed frame buffers. */</div><div class='add'>+	unsigned char		rbuff[SLCAN_MTU];	/* receiver buffer   */</div><div class='add'>+	int			rcount;         /* received chars counter    */</div><div class='add'>+	unsigned char		xbuff[SLCAN_MTU];	/* transmitter buffer*/</div><div class='add'>+	unsigned char		*xhead;         /* pointer to next XMIT byte */</div><div class='add'>+	int			xleft;          /* bytes left in XMIT queue  */</div><div class='add'>+</div><div class='add'>+	unsigned long		flags;		/* Flag values/ mode etc     */</div><div class='add'>+#define SLF_ERROR		0               /* Parity, etc. error        */</div><div class='add'>+#define SLF_XCMD		1               /* Command transmission      */</div><div class='add'>+	unsigned long           cmd_flags;      /* Command flags             */</div><div class='add'>+#define CF_ERR_RST		0               /* Reset errors on open      */</div><div class='add'>+	wait_queue_head_t       xcmd_wait;      /* Wait queue for commands   */</div><div class='add'>+						/* transmission              */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 slcan_bitrate_const[] = {</div><div class='add'>+	10000, 20000, 50000, 100000, 125000,</div><div class='add'>+	250000, 500000, 800000, 1000000</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+bool slcan_err_rst_on_open(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct slcan *sl = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	return !!test_bit(CF_ERR_RST, &amp;sl-&gt;cmd_flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int slcan_enable_err_rst_on_open(struct net_device *ndev, bool on)</div><div class='add'>+{</div><div class='add'>+	struct slcan *sl = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	if (netif_running(ndev))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	if (on)</div><div class='add'>+		set_bit(CF_ERR_RST, &amp;sl-&gt;cmd_flags);</div><div class='add'>+	else</div><div class='add'>+		clear_bit(CF_ERR_RST, &amp;sl-&gt;cmd_flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*************************************************************************</div><div class='add'>+ *			SLCAN ENCAPSULATION FORMAT			 *</div><div class='add'>+ *************************************************************************/</div><div class='add'>+</div><div class='add'>+/* A CAN frame has a can_id (11 bit standard frame format OR 29 bit extended</div><div class='add'>+ * frame format) a data length code (len) which can be from 0 to 8</div><div class='add'>+ * and up to &lt;len&gt; data bytes as payload.</div><div class='add'>+ * Additionally a CAN frame may become a remote transmission frame if the</div><div class='add'>+ * RTR-bit is set. This causes another ECU to send a CAN frame with the</div><div class='add'>+ * given can_id.</div><div class='add'>+ *</div><div class='add'>+ * The SLCAN ASCII representation of these different frame types is:</div><div class='add'>+ * &lt;type&gt; &lt;id&gt; &lt;dlc&gt; &lt;data&gt;*</div><div class='add'>+ *</div><div class='add'>+ * Extended frames (29 bit) are defined by capital characters in the type.</div><div class='add'>+ * RTR frames are defined as 'r' types - normal frames have 't' type:</div><div class='add'>+ * t =&gt; 11 bit data frame</div><div class='add'>+ * r =&gt; 11 bit RTR frame</div><div class='add'>+ * T =&gt; 29 bit data frame</div><div class='add'>+ * R =&gt; 29 bit RTR frame</div><div class='add'>+ *</div><div class='add'>+ * The &lt;id&gt; is 3 (standard) or 8 (extended) bytes in ASCII Hex (base64).</div><div class='add'>+ * The &lt;dlc&gt; is a one byte ASCII number ('0' - '8')</div><div class='add'>+ * The &lt;data&gt; section has at much ASCII Hex bytes as defined by the &lt;dlc&gt;</div><div class='add'>+ *</div><div class='add'>+ * Examples:</div><div class='add'>+ *</div><div class='add'>+ * t1230 : can_id 0x123, len 0, no data</div><div class='add'>+ * t4563112233 : can_id 0x456, len 3, data 0x11 0x22 0x33</div><div class='add'>+ * T12ABCDEF2AA55 : extended can_id 0x12ABCDEF, len 2, data 0xAA 0x55</div><div class='add'>+ * r1230 : can_id 0x123, len 0, no data, remote transmission request</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/*************************************************************************</div><div class='add'>+ *			STANDARD SLCAN DECAPSULATION			 *</div><div class='add'>+ *************************************************************************/</div><div class='add'>+</div><div class='add'>+/* Send one completely decapsulated can_frame to the network layer */</div><div class='add'>+static void slcan_bump_frame(struct slcan *sl)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	int i, tmp;</div><div class='add'>+	u32 tmpid;</div><div class='add'>+	char *cmd = sl-&gt;rbuff;</div><div class='add'>+</div><div class='add'>+	if (sl-&gt;rcount &lt; SLCAN_FRAME_MSG_LEN_MIN)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_skb(sl-&gt;dev, &amp;cf);</div><div class='add'>+	if (unlikely(!skb)) {</div><div class='add'>+		sl-&gt;dev-&gt;stats.rx_dropped++;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (*cmd) {</div><div class='add'>+	case 'r':</div><div class='add'>+		cf-&gt;can_id = CAN_RTR_FLAG;</div><div class='add'>+		fallthrough;</div><div class='add'>+	case 't':</div><div class='add'>+		/* store dlc ASCII value and terminate SFF CAN ID string */</div><div class='add'>+		cf-&gt;len = sl-&gt;rbuff[SLCAN_CMD_LEN + SLCAN_SFF_ID_LEN];</div><div class='add'>+		sl-&gt;rbuff[SLCAN_CMD_LEN + SLCAN_SFF_ID_LEN] = 0;</div><div class='add'>+		/* point to payload data behind the dlc */</div><div class='add'>+		cmd += SLCAN_CMD_LEN + SLCAN_SFF_ID_LEN + 1;</div><div class='add'>+		break;</div><div class='add'>+	case 'R':</div><div class='add'>+		cf-&gt;can_id = CAN_RTR_FLAG;</div><div class='add'>+		fallthrough;</div><div class='add'>+	case 'T':</div><div class='add'>+		cf-&gt;can_id |= CAN_EFF_FLAG;</div><div class='add'>+		/* store dlc ASCII value and terminate EFF CAN ID string */</div><div class='add'>+		cf-&gt;len = sl-&gt;rbuff[SLCAN_CMD_LEN + SLCAN_EFF_ID_LEN];</div><div class='add'>+		sl-&gt;rbuff[SLCAN_CMD_LEN + SLCAN_EFF_ID_LEN] = 0;</div><div class='add'>+		/* point to payload data behind the dlc */</div><div class='add'>+		cmd += SLCAN_CMD_LEN + SLCAN_EFF_ID_LEN + 1;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		goto decode_failed;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (kstrtou32(sl-&gt;rbuff + SLCAN_CMD_LEN, 16, &amp;tmpid))</div><div class='add'>+		goto decode_failed;</div><div class='add'>+</div><div class='add'>+	cf-&gt;can_id |= tmpid;</div><div class='add'>+</div><div class='add'>+	/* get len from sanitized ASCII value */</div><div class='add'>+	if (cf-&gt;len &gt;= '0' &amp;&amp; cf-&gt;len &lt; '9')</div><div class='add'>+		cf-&gt;len -= '0';</div><div class='add'>+	else</div><div class='add'>+		goto decode_failed;</div><div class='add'>+</div><div class='add'>+	/* RTR frames may have a dlc &gt; 0 but they never have any data bytes */</div><div class='add'>+	if (!(cf-&gt;can_id &amp; CAN_RTR_FLAG)) {</div><div class='add'>+		for (i = 0; i &lt; cf-&gt;len; i++) {</div><div class='add'>+			tmp = hex_to_bin(*cmd++);</div><div class='add'>+			if (tmp &lt; 0)</div><div class='add'>+				goto decode_failed;</div><div class='add'>+</div><div class='add'>+			cf-&gt;data[i] = (tmp &lt;&lt; 4);</div><div class='add'>+			tmp = hex_to_bin(*cmd++);</div><div class='add'>+			if (tmp &lt; 0)</div><div class='add'>+				goto decode_failed;</div><div class='add'>+</div><div class='add'>+			cf-&gt;data[i] |= tmp;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sl-&gt;dev-&gt;stats.rx_packets++;</div><div class='add'>+	if (!(cf-&gt;can_id &amp; CAN_RTR_FLAG))</div><div class='add'>+		sl-&gt;dev-&gt;stats.rx_bytes += cf-&gt;len;</div><div class='add'>+</div><div class='add'>+	netif_rx(skb);</div><div class='add'>+	return;</div><div class='add'>+</div><div class='add'>+decode_failed:</div><div class='add'>+	sl-&gt;dev-&gt;stats.rx_errors++;</div><div class='add'>+	dev_kfree_skb(skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* A change state frame must contain state info and receive and transmit</div><div class='add'>+ * error counters.</div><div class='add'>+ *</div><div class='add'>+ * Examples:</div><div class='add'>+ *</div><div class='add'>+ * sb256256 : state bus-off: rx counter 256, tx counter 256</div><div class='add'>+ * sa057033 : state active, rx counter 57, tx counter 33</div><div class='add'>+ */</div><div class='add'>+static void slcan_bump_state(struct slcan *sl)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = sl-&gt;dev;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	char *cmd = sl-&gt;rbuff;</div><div class='add'>+	u32 rxerr, txerr;</div><div class='add'>+	enum can_state state, rx_state, tx_state;</div><div class='add'>+</div><div class='add'>+	switch (cmd[1]) {</div><div class='add'>+	case 'a':</div><div class='add'>+		state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+		break;</div><div class='add'>+	case 'w':</div><div class='add'>+		state = CAN_STATE_ERROR_WARNING;</div><div class='add'>+		break;</div><div class='add'>+	case 'p':</div><div class='add'>+		state = CAN_STATE_ERROR_PASSIVE;</div><div class='add'>+		break;</div><div class='add'>+	case 'b':</div><div class='add'>+		state = CAN_STATE_BUS_OFF;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (state == sl-&gt;can.state || sl-&gt;rcount != SLCAN_STATE_MSG_LEN)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	cmd += SLCAN_STATE_BE_RXCNT_LEN + SLCAN_CMD_LEN + 1;</div><div class='add'>+	cmd[SLCAN_STATE_BE_TXCNT_LEN] = 0;</div><div class='add'>+	if (kstrtou32(cmd, 10, &amp;txerr))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	*cmd = 0;</div><div class='add'>+	cmd -= SLCAN_STATE_BE_RXCNT_LEN;</div><div class='add'>+	if (kstrtou32(cmd, 10, &amp;rxerr))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_err_skb(dev, &amp;cf);</div><div class='add'>+</div><div class='add'>+	tx_state = txerr &gt;= rxerr ? state : 0;</div><div class='add'>+	rx_state = txerr &lt;= rxerr ? state : 0;</div><div class='add'>+	can_change_state(dev, cf, tx_state, rx_state);</div><div class='add'>+</div><div class='add'>+	if (state == CAN_STATE_BUS_OFF) {</div><div class='add'>+		can_bus_off(dev);</div><div class='add'>+	} else if (skb) {</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_CNT;</div><div class='add'>+		cf-&gt;data[6] = txerr;</div><div class='add'>+		cf-&gt;data[7] = rxerr;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (skb)</div><div class='add'>+		netif_rx(skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* An error frame can contain more than one type of error.</div><div class='add'>+ *</div><div class='add'>+ * Examples:</div><div class='add'>+ *</div><div class='add'>+ * e1a : len 1, errors: ACK error</div><div class='add'>+ * e3bcO: len 3, errors: Bit0 error, CRC error, Tx overrun error</div><div class='add'>+ */</div><div class='add'>+static void slcan_bump_err(struct slcan *sl)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = sl-&gt;dev;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	char *cmd = sl-&gt;rbuff;</div><div class='add'>+	bool rx_errors = false, tx_errors = false, rx_over_errors = false;</div><div class='add'>+	int i, len;</div><div class='add'>+</div><div class='add'>+	if (sl-&gt;rcount &lt; SLCAN_ERROR_MSG_LEN_MIN)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* get len from sanitized ASCII value */</div><div class='add'>+	len = cmd[1];</div><div class='add'>+	if (len &gt;= '0' &amp;&amp; len &lt; '9')</div><div class='add'>+		len -= '0';</div><div class='add'>+	else</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if ((len + SLCAN_CMD_LEN + 1) &gt; sl-&gt;rcount)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_err_skb(dev, &amp;cf);</div><div class='add'>+</div><div class='add'>+	if (skb)</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='add'>+</div><div class='add'>+	cmd += SLCAN_CMD_LEN + 1;</div><div class='add'>+	for (i = 0; i &lt; len; i++, cmd++) {</div><div class='add'>+		switch (*cmd) {</div><div class='add'>+		case 'a':</div><div class='add'>+			netdev_dbg(dev, "ACK error\n");</div><div class='add'>+			tx_errors = true;</div><div class='add'>+			if (skb) {</div><div class='add'>+				cf-&gt;can_id |= CAN_ERR_ACK;</div><div class='add'>+				cf-&gt;data[3] = CAN_ERR_PROT_LOC_ACK;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			break;</div><div class='add'>+		case 'b':</div><div class='add'>+			netdev_dbg(dev, "Bit0 error\n");</div><div class='add'>+			tx_errors = true;</div><div class='add'>+			if (skb)</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_BIT0;</div><div class='add'>+</div><div class='add'>+			break;</div><div class='add'>+		case 'B':</div><div class='add'>+			netdev_dbg(dev, "Bit1 error\n");</div><div class='add'>+			tx_errors = true;</div><div class='add'>+			if (skb)</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_BIT1;</div><div class='add'>+</div><div class='add'>+			break;</div><div class='add'>+		case 'c':</div><div class='add'>+			netdev_dbg(dev, "CRC error\n");</div><div class='add'>+			rx_errors = true;</div><div class='add'>+			if (skb) {</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_BIT;</div><div class='add'>+				cf-&gt;data[3] = CAN_ERR_PROT_LOC_CRC_SEQ;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			break;</div><div class='add'>+		case 'f':</div><div class='add'>+			netdev_dbg(dev, "Form Error\n");</div><div class='add'>+			rx_errors = true;</div><div class='add'>+			if (skb)</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='add'>+</div><div class='add'>+			break;</div><div class='add'>+		case 'o':</div><div class='add'>+			netdev_dbg(dev, "Rx overrun error\n");</div><div class='add'>+			rx_over_errors = true;</div><div class='add'>+			rx_errors = true;</div><div class='add'>+			if (skb) {</div><div class='add'>+				cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='add'>+				cf-&gt;data[1] = CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			break;</div><div class='add'>+		case 'O':</div><div class='add'>+			netdev_dbg(dev, "Tx overrun error\n");</div><div class='add'>+			tx_errors = true;</div><div class='add'>+			if (skb) {</div><div class='add'>+				cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='add'>+				cf-&gt;data[1] = CAN_ERR_CRTL_TX_OVERFLOW;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			break;</div><div class='add'>+		case 's':</div><div class='add'>+			netdev_dbg(dev, "Stuff error\n");</div><div class='add'>+			rx_errors = true;</div><div class='add'>+			if (skb)</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='add'>+</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			if (skb)</div><div class='add'>+				dev_kfree_skb(skb);</div><div class='add'>+</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rx_errors)</div><div class='add'>+		dev-&gt;stats.rx_errors++;</div><div class='add'>+</div><div class='add'>+	if (rx_over_errors)</div><div class='add'>+		dev-&gt;stats.rx_over_errors++;</div><div class='add'>+</div><div class='add'>+	if (tx_errors)</div><div class='add'>+		dev-&gt;stats.tx_errors++;</div><div class='add'>+</div><div class='add'>+	if (skb)</div><div class='add'>+		netif_rx(skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void slcan_bump(struct slcan *sl)</div><div class='add'>+{</div><div class='add'>+	switch (sl-&gt;rbuff[0]) {</div><div class='add'>+	case 'r':</div><div class='add'>+		fallthrough;</div><div class='add'>+	case 't':</div><div class='add'>+		fallthrough;</div><div class='add'>+	case 'R':</div><div class='add'>+		fallthrough;</div><div class='add'>+	case 'T':</div><div class='add'>+		return slcan_bump_frame(sl);</div><div class='add'>+	case 'e':</div><div class='add'>+		return slcan_bump_err(sl);</div><div class='add'>+	case 's':</div><div class='add'>+		return slcan_bump_state(sl);</div><div class='add'>+	default:</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* parse tty input stream */</div><div class='add'>+static void slcan_unesc(struct slcan *sl, unsigned char s)</div><div class='add'>+{</div><div class='add'>+	if ((s == '\r') || (s == '\a')) { /* CR or BEL ends the pdu */</div><div class='add'>+		if (!test_and_clear_bit(SLF_ERROR, &amp;sl-&gt;flags))</div><div class='add'>+			slcan_bump(sl);</div><div class='add'>+</div><div class='add'>+		sl-&gt;rcount = 0;</div><div class='add'>+	} else {</div><div class='add'>+		if (!test_bit(SLF_ERROR, &amp;sl-&gt;flags))  {</div><div class='add'>+			if (sl-&gt;rcount &lt; SLCAN_MTU)  {</div><div class='add'>+				sl-&gt;rbuff[sl-&gt;rcount++] = s;</div><div class='add'>+				return;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			sl-&gt;dev-&gt;stats.rx_over_errors++;</div><div class='add'>+			set_bit(SLF_ERROR, &amp;sl-&gt;flags);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*************************************************************************</div><div class='add'>+ *			STANDARD SLCAN ENCAPSULATION			 *</div><div class='add'>+ *************************************************************************/</div><div class='add'>+</div><div class='add'>+/* Encapsulate one can_frame and stuff into a TTY queue. */</div><div class='add'>+static void slcan_encaps(struct slcan *sl, struct can_frame *cf)</div><div class='add'>+{</div><div class='add'>+	int actual, i;</div><div class='add'>+	unsigned char *pos;</div><div class='add'>+	unsigned char *endpos;</div><div class='add'>+	canid_t id = cf-&gt;can_id;</div><div class='add'>+</div><div class='add'>+	pos = sl-&gt;xbuff;</div><div class='add'>+</div><div class='add'>+	if (cf-&gt;can_id &amp; CAN_RTR_FLAG)</div><div class='add'>+		*pos = 'R'; /* becomes 'r' in standard frame format (SFF) */</div><div class='add'>+	else</div><div class='add'>+		*pos = 'T'; /* becomes 't' in standard frame format (SSF) */</div><div class='add'>+</div><div class='add'>+	/* determine number of chars for the CAN-identifier */</div><div class='add'>+	if (cf-&gt;can_id &amp; CAN_EFF_FLAG) {</div><div class='add'>+		id &amp;= CAN_EFF_MASK;</div><div class='add'>+		endpos = pos + SLCAN_EFF_ID_LEN;</div><div class='add'>+	} else {</div><div class='add'>+		*pos |= 0x20; /* convert R/T to lower case for SFF */</div><div class='add'>+		id &amp;= CAN_SFF_MASK;</div><div class='add'>+		endpos = pos + SLCAN_SFF_ID_LEN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* build 3 (SFF) or 8 (EFF) digit CAN identifier */</div><div class='add'>+	pos++;</div><div class='add'>+	while (endpos &gt;= pos) {</div><div class='add'>+		*endpos-- = hex_asc_upper[id &amp; 0xf];</div><div class='add'>+		id &gt;&gt;= 4;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pos += (cf-&gt;can_id &amp; CAN_EFF_FLAG) ?</div><div class='add'>+		SLCAN_EFF_ID_LEN : SLCAN_SFF_ID_LEN;</div><div class='add'>+</div><div class='add'>+	*pos++ = cf-&gt;len + '0';</div><div class='add'>+</div><div class='add'>+	/* RTR frames may have a dlc &gt; 0 but they never have any data bytes */</div><div class='add'>+	if (!(cf-&gt;can_id &amp; CAN_RTR_FLAG)) {</div><div class='add'>+		for (i = 0; i &lt; cf-&gt;len; i++)</div><div class='add'>+			pos = hex_byte_pack_upper(pos, cf-&gt;data[i]);</div><div class='add'>+</div><div class='add'>+		sl-&gt;dev-&gt;stats.tx_bytes += cf-&gt;len;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*pos++ = '\r';</div><div class='add'>+</div><div class='add'>+	/* Order of next two lines is *very* important.</div><div class='add'>+	 * When we are sending a little amount of data,</div><div class='add'>+	 * the transfer may be completed inside the ops-&gt;write()</div><div class='add'>+	 * routine, because it's running with interrupts enabled.</div><div class='add'>+	 * In this case we *never* got WRITE_WAKEUP event,</div><div class='add'>+	 * if we did not request it before write operation.</div><div class='add'>+	 *       14 Oct 1994  Dmitry Gorodchanin.</div><div class='add'>+	 */</div><div class='add'>+	set_bit(TTY_DO_WRITE_WAKEUP, &amp;sl-&gt;tty-&gt;flags);</div><div class='add'>+	actual = sl-&gt;tty-&gt;ops-&gt;write(sl-&gt;tty, sl-&gt;xbuff, pos - sl-&gt;xbuff);</div><div class='add'>+	sl-&gt;xleft = (pos - sl-&gt;xbuff) - actual;</div><div class='add'>+	sl-&gt;xhead = sl-&gt;xbuff + actual;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Write out any remaining transmit buffer. Scheduled when tty is writable */</div><div class='add'>+static void slcan_transmit(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct slcan *sl = container_of(work, struct slcan, tx_work);</div><div class='add'>+	int actual;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;sl-&gt;lock);</div><div class='add'>+	/* First make sure we're connected. */</div><div class='add'>+	if (unlikely(!netif_running(sl-&gt;dev)) &amp;&amp;</div><div class='add'>+	    likely(!test_bit(SLF_XCMD, &amp;sl-&gt;flags))) {</div><div class='add'>+		spin_unlock_bh(&amp;sl-&gt;lock);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (sl-&gt;xleft &lt;= 0)  {</div><div class='add'>+		if (unlikely(test_bit(SLF_XCMD, &amp;sl-&gt;flags))) {</div><div class='add'>+			clear_bit(SLF_XCMD, &amp;sl-&gt;flags);</div><div class='add'>+			clear_bit(TTY_DO_WRITE_WAKEUP, &amp;sl-&gt;tty-&gt;flags);</div><div class='add'>+			spin_unlock_bh(&amp;sl-&gt;lock);</div><div class='add'>+			wake_up(&amp;sl-&gt;xcmd_wait);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Now serial buffer is almost free &amp; we can start</div><div class='add'>+		 * transmission of another packet</div><div class='add'>+		 */</div><div class='add'>+		sl-&gt;dev-&gt;stats.tx_packets++;</div><div class='add'>+		clear_bit(TTY_DO_WRITE_WAKEUP, &amp;sl-&gt;tty-&gt;flags);</div><div class='add'>+		spin_unlock_bh(&amp;sl-&gt;lock);</div><div class='add'>+		netif_wake_queue(sl-&gt;dev);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	actual = sl-&gt;tty-&gt;ops-&gt;write(sl-&gt;tty, sl-&gt;xhead, sl-&gt;xleft);</div><div class='add'>+	sl-&gt;xleft -= actual;</div><div class='add'>+	sl-&gt;xhead += actual;</div><div class='add'>+	spin_unlock_bh(&amp;sl-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Called by the driver when there's room for more data.</div><div class='add'>+ * Schedule the transmit.</div><div class='add'>+ */</div><div class='add'>+static void slcan_write_wakeup(struct tty_struct *tty)</div><div class='add'>+{</div><div class='add'>+	struct slcan *sl = tty-&gt;disc_data;</div><div class='add'>+</div><div class='add'>+	schedule_work(&amp;sl-&gt;tx_work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Send a can_frame to a TTY queue. */</div><div class='add'>+static netdev_tx_t slcan_netdev_xmit(struct sk_buff *skb,</div><div class='add'>+				     struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct slcan *sl = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	if (can_dev_dropped_skb(dev, skb))</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;sl-&gt;lock);</div><div class='add'>+	if (!netif_running(dev))  {</div><div class='add'>+		spin_unlock(&amp;sl-&gt;lock);</div><div class='add'>+		netdev_warn(dev, "xmit: iface is down\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	if (!sl-&gt;tty) {</div><div class='add'>+		spin_unlock(&amp;sl-&gt;lock);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(sl-&gt;dev);</div><div class='add'>+	slcan_encaps(sl, (struct can_frame *)skb-&gt;data); /* encaps &amp; send */</div><div class='add'>+	spin_unlock(&amp;sl-&gt;lock);</div><div class='add'>+</div><div class='add'>+	skb_tx_timestamp(skb);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	kfree_skb(skb);</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/******************************************</div><div class='add'>+ *   Routines looking at netdevice side.</div><div class='add'>+ ******************************************/</div><div class='add'>+</div><div class='add'>+static int slcan_transmit_cmd(struct slcan *sl, const unsigned char *cmd)</div><div class='add'>+{</div><div class='add'>+	int ret, actual, n;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;sl-&gt;lock);</div><div class='add'>+	if (!sl-&gt;tty) {</div><div class='add'>+		spin_unlock(&amp;sl-&gt;lock);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	n = scnprintf(sl-&gt;xbuff, sizeof(sl-&gt;xbuff), "%s", cmd);</div><div class='add'>+	set_bit(TTY_DO_WRITE_WAKEUP, &amp;sl-&gt;tty-&gt;flags);</div><div class='add'>+	actual = sl-&gt;tty-&gt;ops-&gt;write(sl-&gt;tty, sl-&gt;xbuff, n);</div><div class='add'>+	sl-&gt;xleft = n - actual;</div><div class='add'>+	sl-&gt;xhead = sl-&gt;xbuff + actual;</div><div class='add'>+	set_bit(SLF_XCMD, &amp;sl-&gt;flags);</div><div class='add'>+	spin_unlock(&amp;sl-&gt;lock);</div><div class='add'>+	ret = wait_event_interruptible_timeout(sl-&gt;xcmd_wait,</div><div class='add'>+					       !test_bit(SLF_XCMD, &amp;sl-&gt;flags),</div><div class='add'>+					       HZ);</div><div class='add'>+	clear_bit(SLF_XCMD, &amp;sl-&gt;flags);</div><div class='add'>+	if (ret == -ERESTARTSYS)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (ret == 0)</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Netdevice UP -&gt; DOWN routine */</div><div class='add'>+static int slcan_netdev_close(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct slcan *sl = netdev_priv(dev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (sl-&gt;can.bittiming.bitrate &amp;&amp;</div><div class='add'>+	    sl-&gt;can.bittiming.bitrate != CAN_BITRATE_UNKNOWN) {</div><div class='add'>+		err = slcan_transmit_cmd(sl, "C\r");</div><div class='add'>+		if (err)</div><div class='add'>+			netdev_warn(dev,</div><div class='add'>+				    "failed to send close command 'C\\r'\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* TTY discipline is running. */</div><div class='add'>+	clear_bit(TTY_DO_WRITE_WAKEUP, &amp;sl-&gt;tty-&gt;flags);</div><div class='add'>+	flush_work(&amp;sl-&gt;tx_work);</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(dev);</div><div class='add'>+	sl-&gt;rcount   = 0;</div><div class='add'>+	sl-&gt;xleft    = 0;</div><div class='add'>+	close_candev(dev);</div><div class='add'>+	sl-&gt;can.state = CAN_STATE_STOPPED;</div><div class='add'>+	if (sl-&gt;can.bittiming.bitrate == CAN_BITRATE_UNKNOWN)</div><div class='add'>+		sl-&gt;can.bittiming.bitrate = CAN_BITRATE_UNSET;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Netdevice DOWN -&gt; UP routine */</div><div class='add'>+static int slcan_netdev_open(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct slcan *sl = netdev_priv(dev);</div><div class='add'>+	unsigned char cmd[SLCAN_MTU];</div><div class='add'>+	int err, s;</div><div class='add'>+</div><div class='add'>+	/* The baud rate is not set with the command</div><div class='add'>+	 * `ip link set &lt;iface&gt; type can bitrate &lt;baud&gt;' and therefore</div><div class='add'>+	 * can.bittiming.bitrate is CAN_BITRATE_UNSET (0), causing</div><div class='add'>+	 * open_candev() to fail. So let's set to a fake value.</div><div class='add'>+	 */</div><div class='add'>+	if (sl-&gt;can.bittiming.bitrate == CAN_BITRATE_UNSET)</div><div class='add'>+		sl-&gt;can.bittiming.bitrate = CAN_BITRATE_UNKNOWN;</div><div class='add'>+</div><div class='add'>+	err = open_candev(dev);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(dev, "failed to open can device\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (sl-&gt;can.bittiming.bitrate != CAN_BITRATE_UNKNOWN) {</div><div class='add'>+		for (s = 0; s &lt; ARRAY_SIZE(slcan_bitrate_const); s++) {</div><div class='add'>+			if (sl-&gt;can.bittiming.bitrate == slcan_bitrate_const[s])</div><div class='add'>+				break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* The CAN framework has already validate the bitrate value,</div><div class='add'>+		 * so we can avoid to check if `s' has been properly set.</div><div class='add'>+		 */</div><div class='add'>+		snprintf(cmd, sizeof(cmd), "C\rS%d\r", s);</div><div class='add'>+		err = slcan_transmit_cmd(sl, cmd);</div><div class='add'>+		if (err) {</div><div class='add'>+			netdev_err(dev,</div><div class='add'>+				   "failed to send bitrate command 'C\\rS%d\\r'\n",</div><div class='add'>+				   s);</div><div class='add'>+			goto cmd_transmit_failed;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (test_bit(CF_ERR_RST, &amp;sl-&gt;cmd_flags)) {</div><div class='add'>+			err = slcan_transmit_cmd(sl, "F\r");</div><div class='add'>+			if (err) {</div><div class='add'>+				netdev_err(dev,</div><div class='add'>+					   "failed to send error command 'F\\r'\n");</div><div class='add'>+				goto cmd_transmit_failed;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (sl-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LISTENONLY) {</div><div class='add'>+			err = slcan_transmit_cmd(sl, "L\r");</div><div class='add'>+			if (err) {</div><div class='add'>+				netdev_err(dev,</div><div class='add'>+					   "failed to send listen-only command 'L\\r'\n");</div><div class='add'>+				goto cmd_transmit_failed;</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			err = slcan_transmit_cmd(sl, "O\r");</div><div class='add'>+			if (err) {</div><div class='add'>+				netdev_err(dev,</div><div class='add'>+					   "failed to send open command 'O\\r'\n");</div><div class='add'>+				goto cmd_transmit_failed;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sl-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+	netif_start_queue(dev);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+cmd_transmit_failed:</div><div class='add'>+	close_candev(dev);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops slcan_netdev_ops = {</div><div class='add'>+	.ndo_open               = slcan_netdev_open,</div><div class='add'>+	.ndo_stop               = slcan_netdev_close,</div><div class='add'>+	.ndo_start_xmit         = slcan_netdev_xmit,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/******************************************</div><div class='add'>+ *  Routines looking at TTY side.</div><div class='add'>+ ******************************************/</div><div class='add'>+</div><div class='add'>+/* Handle the 'receiver data ready' interrupt.</div><div class='add'>+ * This function is called by the 'tty_io' module in the kernel when</div><div class='add'>+ * a block of SLCAN data has been received, which can now be decapsulated</div><div class='add'>+ * and sent on to some IP layer for further processing. This will not</div><div class='add'>+ * be re-entered while running but other ldisc functions may be called</div><div class='add'>+ * in parallel</div><div class='add'>+ */</div><div class='add'>+static void slcan_receive_buf(struct tty_struct *tty, const u8 *cp,</div><div class='add'>+			      const u8 *fp, size_t count)</div><div class='add'>+{</div><div class='add'>+	struct slcan *sl = tty-&gt;disc_data;</div><div class='add'>+</div><div class='add'>+	if (!netif_running(sl-&gt;dev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Read the characters out of the buffer */</div><div class='add'>+	while (count--) {</div><div class='add'>+		if (fp &amp;&amp; *fp++) {</div><div class='add'>+			if (!test_and_set_bit(SLF_ERROR, &amp;sl-&gt;flags))</div><div class='add'>+				sl-&gt;dev-&gt;stats.rx_errors++;</div><div class='add'>+			cp++;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+		slcan_unesc(sl, *cp++);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Open the high-level part of the SLCAN channel.</div><div class='add'>+ * This function is called by the TTY module when the</div><div class='add'>+ * SLCAN line discipline is called for.</div><div class='add'>+ *</div><div class='add'>+ * Called in process context serialized from other ldisc calls.</div><div class='add'>+ */</div><div class='add'>+static int slcan_open(struct tty_struct *tty)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev;</div><div class='add'>+	struct slcan *sl;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!capable(CAP_NET_ADMIN))</div><div class='add'>+		return -EPERM;</div><div class='add'>+</div><div class='add'>+	if (!tty-&gt;ops-&gt;write)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	dev = alloc_candev(sizeof(*sl), 1);</div><div class='add'>+	if (!dev)</div><div class='add'>+		return -ENFILE;</div><div class='add'>+</div><div class='add'>+	sl = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	/* Configure TTY interface */</div><div class='add'>+	tty-&gt;receive_room = 65536; /* We don't flow control */</div><div class='add'>+	sl-&gt;rcount = 0;</div><div class='add'>+	sl-&gt;xleft = 0;</div><div class='add'>+	spin_lock_init(&amp;sl-&gt;lock);</div><div class='add'>+	INIT_WORK(&amp;sl-&gt;tx_work, slcan_transmit);</div><div class='add'>+	init_waitqueue_head(&amp;sl-&gt;xcmd_wait);</div><div class='add'>+</div><div class='add'>+	/* Configure CAN metadata */</div><div class='add'>+	sl-&gt;can.bitrate_const = slcan_bitrate_const;</div><div class='add'>+	sl-&gt;can.bitrate_const_cnt = ARRAY_SIZE(slcan_bitrate_const);</div><div class='add'>+	sl-&gt;can.ctrlmode_supported = CAN_CTRLMODE_LISTENONLY;</div><div class='add'>+</div><div class='add'>+	/* Configure netdev interface */</div><div class='add'>+	sl-&gt;dev	= dev;</div><div class='add'>+	dev-&gt;netdev_ops = &amp;slcan_netdev_ops;</div><div class='add'>+	dev-&gt;ethtool_ops = &amp;slcan_ethtool_ops;</div><div class='add'>+</div><div class='add'>+	/* Mark ldisc channel as alive */</div><div class='add'>+	sl-&gt;tty = tty;</div><div class='add'>+	tty-&gt;disc_data = sl;</div><div class='add'>+</div><div class='add'>+	err = register_candev(dev);</div><div class='add'>+	if (err) {</div><div class='add'>+		free_candev(dev);</div><div class='add'>+		pr_err("can't register candev\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev_info(dev, "slcan on %s.\n", tty-&gt;name);</div><div class='add'>+	/* TTY layer expects 0 on success */</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Close down a SLCAN channel.</div><div class='add'>+ * This means flushing out any pending queues, and then returning. This</div><div class='add'>+ * call is serialized against other ldisc functions.</div><div class='add'>+ * Once this is called, no other ldisc function of ours is entered.</div><div class='add'>+ *</div><div class='add'>+ * We also use this method for a hangup event.</div><div class='add'>+ */</div><div class='add'>+static void slcan_close(struct tty_struct *tty)</div><div class='add'>+{</div><div class='add'>+	struct slcan *sl = tty-&gt;disc_data;</div><div class='add'>+</div><div class='add'>+	unregister_candev(sl-&gt;dev);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * The netdev needn't be UP (so .ndo_stop() is not called). Hence make</div><div class='add'>+	 * sure this is not running before freeing it up.</div><div class='add'>+	 */</div><div class='add'>+	flush_work(&amp;sl-&gt;tx_work);</div><div class='add'>+</div><div class='add'>+	/* Mark channel as dead */</div><div class='add'>+	spin_lock_bh(&amp;sl-&gt;lock);</div><div class='add'>+	tty-&gt;disc_data = NULL;</div><div class='add'>+	sl-&gt;tty = NULL;</div><div class='add'>+	spin_unlock_bh(&amp;sl-&gt;lock);</div><div class='add'>+</div><div class='add'>+	netdev_info(sl-&gt;dev, "slcan off %s.\n", tty-&gt;name);</div><div class='add'>+	free_candev(sl-&gt;dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Perform I/O control on an active SLCAN channel. */</div><div class='add'>+static int slcan_ioctl(struct tty_struct *tty, unsigned int cmd,</div><div class='add'>+		       unsigned long arg)</div><div class='add'>+{</div><div class='add'>+	struct slcan *sl = tty-&gt;disc_data;</div><div class='add'>+	unsigned int tmp;</div><div class='add'>+</div><div class='add'>+	switch (cmd) {</div><div class='add'>+	case SIOCGIFNAME:</div><div class='add'>+		tmp = strlen(sl-&gt;dev-&gt;name) + 1;</div><div class='add'>+		if (copy_to_user((void __user *)arg, sl-&gt;dev-&gt;name, tmp))</div><div class='add'>+			return -EFAULT;</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	case SIOCSIFHWADDR:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		return tty_mode_ioctl(tty, cmd, arg);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct tty_ldisc_ops slcan_ldisc = {</div><div class='add'>+	.owner		= THIS_MODULE,</div><div class='add'>+	.num		= N_SLCAN,</div><div class='add'>+	.name		= KBUILD_MODNAME,</div><div class='add'>+	.open		= slcan_open,</div><div class='add'>+	.close		= slcan_close,</div><div class='add'>+	.ioctl		= slcan_ioctl,</div><div class='add'>+	.receive_buf	= slcan_receive_buf,</div><div class='add'>+	.write_wakeup	= slcan_write_wakeup,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init slcan_init(void)</div><div class='add'>+{</div><div class='add'>+	int status;</div><div class='add'>+</div><div class='add'>+	pr_info("serial line CAN interface driver\n");</div><div class='add'>+</div><div class='add'>+	/* Fill in our line protocol discipline, and register it */</div><div class='add'>+	status = tty_register_ldisc(&amp;slcan_ldisc);</div><div class='add'>+	if (status)</div><div class='add'>+		pr_err("can't register line discipline\n");</div><div class='add'>+</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit slcan_exit(void)</div><div class='add'>+{</div><div class='add'>+	/* This will only be called when all channels have been closed by</div><div class='add'>+	 * userspace - tty_ldisc.c takes care of the module's refcount.</div><div class='add'>+	 */</div><div class='add'>+	tty_unregister_ldisc(&amp;slcan_ldisc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(slcan_init);</div><div class='add'>+module_exit(slcan_exit);</div><div class='head'>diff --git a/drivers/net/can/slcan/slcan-ethtool.c b/drivers/net/can/slcan/slcan-ethtool.c<br/>new file mode 100644<br/>index 000000000000..f598c653fbfa<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/slcan/slcan-ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/slcan/slcan-ethtool.c</a></div><div class='hunk'>@@ -0,0 +1,61 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+/* Copyright (c) 2022 Amarula Solutions, Dario Binacchi &lt;dario.binacchi@amarulasolutions.com&gt;</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+</div><div class='add'>+#include "slcan.h"</div><div class='add'>+</div><div class='add'>+static const char slcan_priv_flags_strings[][ETH_GSTRING_LEN] = {</div><div class='add'>+#define SLCAN_PRIV_FLAGS_ERR_RST_ON_OPEN BIT(0)</div><div class='add'>+	"err-rst-on-open",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void slcan_get_strings(struct net_device *ndev, u32 stringset, u8 *data)</div><div class='add'>+{</div><div class='add'>+	switch (stringset) {</div><div class='add'>+	case ETH_SS_PRIV_FLAGS:</div><div class='add'>+		memcpy(data, slcan_priv_flags_strings,</div><div class='add'>+		       sizeof(slcan_priv_flags_strings));</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 slcan_get_priv_flags(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	u32 flags = 0;</div><div class='add'>+</div><div class='add'>+	if (slcan_err_rst_on_open(ndev))</div><div class='add'>+		flags |= SLCAN_PRIV_FLAGS_ERR_RST_ON_OPEN;</div><div class='add'>+</div><div class='add'>+	return flags;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int slcan_set_priv_flags(struct net_device *ndev, u32 flags)</div><div class='add'>+{</div><div class='add'>+	bool err_rst_op_open = !!(flags &amp; SLCAN_PRIV_FLAGS_ERR_RST_ON_OPEN);</div><div class='add'>+</div><div class='add'>+	return slcan_enable_err_rst_on_open(ndev, err_rst_op_open);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int slcan_get_sset_count(struct net_device *netdev, int sset)</div><div class='add'>+{</div><div class='add'>+	switch (sset) {</div><div class='add'>+	case ETH_SS_PRIV_FLAGS:</div><div class='add'>+		return ARRAY_SIZE(slcan_priv_flags_strings);</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct ethtool_ops slcan_ethtool_ops = {</div><div class='add'>+	.get_strings = slcan_get_strings,</div><div class='add'>+	.get_priv_flags = slcan_get_priv_flags,</div><div class='add'>+	.set_priv_flags = slcan_set_priv_flags,</div><div class='add'>+	.get_sset_count = slcan_get_sset_count,</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/net/can/slcan/slcan.h b/drivers/net/can/slcan/slcan.h<br/>new file mode 100644<br/>index 000000000000..85cedf856db3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/slcan/slcan.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/slcan/slcan.h</a></div><div class='hunk'>@@ -0,0 +1,19 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0</div><div class='add'>+ * slcan.h - serial line CAN interface driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) Laurence Culhane &lt;loz@holmes.demon.co.uk&gt;</div><div class='add'>+ * Copyright (C) Fred N. van Kempen &lt;waltje@uwalt.nl.mugnet.org&gt;</div><div class='add'>+ * Copyright (C) Oliver Hartkopp &lt;socketcan@hartkopp.net&gt;</div><div class='add'>+ * Copyright (C) 2022 Amarula Solutions, Dario Binacchi &lt;dario.binacchi@amarulasolutions.com&gt;</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _SLCAN_H</div><div class='add'>+#define _SLCAN_H</div><div class='add'>+</div><div class='add'>+bool slcan_err_rst_on_open(struct net_device *ndev);</div><div class='add'>+int slcan_enable_err_rst_on_open(struct net_device *ndev, bool on);</div><div class='add'>+</div><div class='add'>+extern const struct ethtool_ops slcan_ethtool_ops;</div><div class='add'>+</div><div class='add'>+#endif /* _SLCAN_H */</div><div class='head'>diff --git a/drivers/net/can/softing/Kconfig b/drivers/net/can/softing/Kconfig<br/>index 96b6fe158b5b..8afd7d0a1000 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/softing/Kconfig?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/softing/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/softing/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/softing/Kconfig</a></div><div class='hunk'>@@ -1,17 +1,18 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> config CAN_SOFTING</div><div class='ctx'> 	tristate "Softing Gmbh CAN generic support"</div><div class='ctx'> 	depends on HAS_IOMEM</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  Support for CAN cards from Softing Gmbh &amp; some cards</div><div class='ctx'> 	  from Vector Gmbh.</div><div class='del'>-	  Softing Gmbh CAN cards come with 1 or 2 physical busses.</div><div class='add'>+	  Softing Gmbh CAN cards come with 1 or 2 physical buses.</div><div class='ctx'> 	  Those cards typically use Dual Port RAM to communicate</div><div class='ctx'> 	  with the host CPU. The interface is then identical for PCI</div><div class='ctx'> 	  and PCMCIA cards. This driver operates on a platform device,</div><div class='ctx'> 	  which has been created by softing_cs or softing_pci driver.</div><div class='ctx'> 	  Warning:</div><div class='ctx'> 	  The API of the card does not allow fine control per bus, but</div><div class='del'>-	  controls the 2 busses on the card together.</div><div class='add'>+	  controls the 2 buses on the card together.</div><div class='ctx'> 	  As such, some actions (start/stop/busoff recovery) on 1 bus</div><div class='ctx'> 	  must bring down the other bus too temporarily.</div><div class='ctx'> </div><div class='hunk'>@@ -19,11 +20,11 @@ config CAN_SOFTING_CS</div><div class='ctx'> 	tristate "Softing Gmbh CAN pcmcia cards"</div><div class='ctx'> 	depends on PCMCIA</div><div class='ctx'> 	depends on CAN_SOFTING</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  Support for PCMCIA cards from Softing Gmbh &amp; some cards</div><div class='ctx'> 	  from Vector Gmbh.</div><div class='ctx'> 	  You need firmware for these, which you can get at</div><div class='del'>-	  http://developer.berlios.de/projects/socketcan/</div><div class='add'>+	  https://github.com/linux-can/can-firmware</div><div class='ctx'> 	  This version of the driver is written against</div><div class='ctx'> 	  firmware version 4.6 (softing-fw-4.6-binaries.tar.gz)</div><div class='ctx'> 	  In order to use the card as CAN device, you need the Softing generic</div><div class='head'>diff --git a/drivers/net/can/softing/Makefile b/drivers/net/can/softing/Makefile<br/>index a23da492dad5..c51154000377 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/softing/Makefile?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/softing/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/softing/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/softing/Makefile</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> </div><div class='ctx'> softing-y := softing_main.o softing_fw.o</div><div class='ctx'> obj-$(CONFIG_CAN_SOFTING) += softing.o</div><div class='head'>diff --git a/drivers/net/can/softing/softing.h b/drivers/net/can/softing/softing.h<br/>index 35f062282dbd..2893007ea05e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/softing/softing.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/softing/softing.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/softing/softing.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/softing/softing.h</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='ctx'> /*</div><div class='ctx'>  * softing common interfaces</div><div class='ctx'>  *</div><div class='head'>diff --git a/drivers/net/can/softing/softing_cs.c b/drivers/net/can/softing/softing_cs.c<br/>index cdc0c7433a4b..e5c939b63fa6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/softing/softing_cs.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/softing/softing_cs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/softing/softing_cs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/softing/softing_cs.c</a></div><div class='hunk'>@@ -1,19 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (C) 2008-2010</div><div class='ctx'>  *</div><div class='ctx'>  * - Kurt Van Dijck, EIA Electronics</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the version 2 of the GNU General Public License</div><div class='del'>- * as published by the Free Software Foundation</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -304,13 +293,13 @@ static int softingcs_probe(struct pcmcia_device *pcmcia)</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> platform_failed:</div><div class='del'>-	kfree(dev);</div><div class='add'>+	platform_device_put(pdev);</div><div class='ctx'> mem_failed:</div><div class='ctx'> pcmcia_bad:</div><div class='ctx'> pcmcia_failed:</div><div class='ctx'> 	pcmcia_disable_device(pcmcia);</div><div class='ctx'> 	pcmcia-&gt;priv = NULL;</div><div class='del'>-	return ret ?: -ENODEV;</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct pcmcia_device_id softingcs_ids[] = {</div><div class='head'>diff --git a/drivers/net/can/softing/softing_fw.c b/drivers/net/can/softing/softing_fw.c<br/>index 52fe50725d74..721df91cdbfb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/softing/softing_fw.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/softing/softing_fw.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/softing/softing_fw.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/softing/softing_fw.c</a></div><div class='hunk'>@@ -1,23 +1,12 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (C) 2008-2010</div><div class='ctx'>  *</div><div class='ctx'>  * - Kurt Van Dijck, EIA Electronics</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the version 2 of the GNU General Public License</div><div class='del'>- * as published by the Free Software Foundation</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/firmware.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='add'>+#include &lt;linux/sched/signal.h&gt;</div><div class='ctx'> #include &lt;asm/div64.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -284,7 +273,7 @@ int softing_load_app_fw(const char *file, struct softing *card)</div><div class='ctx'> 			goto failed;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		/* regualar data */</div><div class='add'>+		/* regular data */</div><div class='ctx'> 		for (sum = 0, j = 0; j &lt; len; ++j)</div><div class='ctx'> 			sum += dat[j];</div><div class='ctx'> 		/* work in 16bit (target) */</div><div class='hunk'>@@ -390,7 +379,7 @@ static void softing_initialize_timestamp(struct softing *card)</div><div class='ctx'> 	ovf = 0x100000000ULL * 16;</div><div class='ctx'> 	do_div(ovf, card-&gt;pdat-&gt;freq ?: 16);</div><div class='ctx'> </div><div class='del'>-	card-&gt;ts_overflow = ktime_add_us(ktime_set(0, 0), ovf);</div><div class='add'>+	card-&gt;ts_overflow = ktime_add_us(0, ovf);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> ktime_t softing_raw2ktime(struct softing *card, u32 raw)</div><div class='hunk'>@@ -447,7 +436,7 @@ int softing_startstop(struct net_device *dev, int up)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	bus_bitmask_start = 0;</div><div class='del'>-	if (dev &amp;&amp; up)</div><div class='add'>+	if (up)</div><div class='ctx'> 		/* prepare to start this bus as well */</div><div class='ctx'> 		bus_bitmask_start |= (1 &lt;&lt; priv-&gt;index);</div><div class='ctx'> 	/* bring netdevs down */</div><div class='hunk'>@@ -485,14 +474,14 @@ int softing_startstop(struct net_device *dev, int up)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto failed;</div><div class='ctx'> 	if (!bus_bitmask_start)</div><div class='del'>-		/* no busses to be brought up */</div><div class='add'>+		/* no buses to be brought up */</div><div class='ctx'> 		goto card_done;</div><div class='ctx'> </div><div class='ctx'> 	if ((bus_bitmask_start &amp; 1) &amp;&amp; (bus_bitmask_start &amp; 2)</div><div class='ctx'> 			&amp;&amp; (softing_error_reporting(card-&gt;net[0])</div><div class='ctx'> 				!= softing_error_reporting(card-&gt;net[1]))) {</div><div class='ctx'> 		dev_alert(&amp;card-&gt;pdev-&gt;dev,</div><div class='del'>-				"err_reporting flag differs for busses\n");</div><div class='add'>+				"err_reporting flag differs for buses\n");</div><div class='ctx'> 		goto invalid;</div><div class='ctx'> 	}</div><div class='ctx'> 	error_reporting = 0;</div><div class='hunk'>@@ -576,18 +565,19 @@ int softing_startstop(struct net_device *dev, int up)</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='ctx'> 			goto failed;</div><div class='ctx'> 	}</div><div class='del'>-	/* enable_error_frame */</div><div class='del'>-	/*</div><div class='add'>+</div><div class='add'>+	/* enable_error_frame</div><div class='add'>+	 *</div><div class='ctx'> 	 * Error reporting is switched off at the moment since</div><div class='ctx'> 	 * the receiving of them is not yet 100% verified</div><div class='ctx'> 	 * This should be enabled sooner or later</div><div class='del'>-	 *</div><div class='del'>-	if (error_reporting) {</div><div class='add'>+	 */</div><div class='add'>+	if (0 &amp;&amp; error_reporting) {</div><div class='ctx'> 		ret = softing_fct_cmd(card, 51, "enable_error_frame");</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='ctx'> 			goto failed;</div><div class='ctx'> 	}</div><div class='del'>-	*/</div><div class='add'>+</div><div class='ctx'> 	/* initialize interface */</div><div class='ctx'> 	iowrite16(1, &amp;card-&gt;dpram[DPRAM_FCT_PARAM + 2]);</div><div class='ctx'> 	iowrite16(1, &amp;card-&gt;dpram[DPRAM_FCT_PARAM + 4]);</div><div class='hunk'>@@ -635,7 +625,7 @@ int softing_startstop(struct net_device *dev, int up)</div><div class='ctx'> 	 */</div><div class='ctx'> 	memset(&amp;msg, 0, sizeof(msg));</div><div class='ctx'> 	msg.can_id = CAN_ERR_FLAG | CAN_ERR_RESTARTED;</div><div class='del'>-	msg.can_dlc = CAN_ERR_DLC;</div><div class='add'>+	msg.len = CAN_ERR_DLC;</div><div class='ctx'> 	for (j = 0; j &lt; ARRAY_SIZE(card-&gt;net); ++j) {</div><div class='ctx'> 		if (!(bus_bitmask_start &amp; (1 &lt;&lt; j)))</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -646,8 +636,8 @@ int softing_startstop(struct net_device *dev, int up)</div><div class='ctx'> 		priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='ctx'> 		open_candev(netdev);</div><div class='ctx'> 		if (dev != netdev) {</div><div class='del'>-			/* notify other busses on the restart */</div><div class='del'>-			softing_netdev_rx(netdev, &amp;msg, ktime_set(0, 0));</div><div class='add'>+			/* notify other buses on the restart */</div><div class='add'>+			softing_netdev_rx(netdev, &amp;msg, 0);</div><div class='ctx'> 			++priv-&gt;can.can_stats.restarts;</div><div class='ctx'> 		}</div><div class='ctx'> 		netif_wake_queue(netdev);</div><div class='head'>diff --git a/drivers/net/can/softing/softing_main.c b/drivers/net/can/softing/softing_main.c<br/>index 7621f91a8a20..79bc64395ac4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/softing/softing_main.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/softing/softing_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/softing/softing_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/softing/softing_main.c</a></div><div class='hunk'>@@ -1,21 +1,11 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='ctx'>  * Copyright (C) 2008-2010</div><div class='ctx'>  *</div><div class='ctx'>  * - Kurt Van Dijck, EIA Electronics</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the version 2 of the GNU General Public License</div><div class='del'>- * as published by the Free Software Foundation</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='hunk'>@@ -70,7 +60,7 @@ static netdev_tx_t softing_netdev_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 	struct can_frame *cf = (struct can_frame *)skb-&gt;data;</div><div class='ctx'> 	uint8_t buf[DPRAM_TX_SIZE];</div><div class='ctx'> </div><div class='del'>-	if (can_dropped_invalid_skb(dev, skb))</div><div class='add'>+	if (can_dev_dropped_skb(dev, skb))</div><div class='ctx'> 		return NETDEV_TX_OK;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;card-&gt;spin);</div><div class='hunk'>@@ -95,7 +85,7 @@ static netdev_tx_t softing_netdev_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 	if (priv-&gt;index)</div><div class='ctx'> 		*ptr |= CMD_BUS2;</div><div class='ctx'> 	++ptr;</div><div class='del'>-	*ptr++ = cf-&gt;can_dlc;</div><div class='add'>+	*ptr++ = cf-&gt;len;</div><div class='ctx'> 	*ptr++ = (cf-&gt;can_id &gt;&gt; 0);</div><div class='ctx'> 	*ptr++ = (cf-&gt;can_id &gt;&gt; 8);</div><div class='ctx'> 	if (cf-&gt;can_id &amp; CAN_EFF_FLAG) {</div><div class='hunk'>@@ -106,7 +96,7 @@ static netdev_tx_t softing_netdev_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 		ptr += 1;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (!(cf-&gt;can_id &amp; CAN_RTR_FLAG))</div><div class='del'>-		memcpy(ptr, &amp;cf-&gt;data[0], cf-&gt;can_dlc);</div><div class='add'>+		memcpy(ptr, &amp;cf-&gt;data[0], cf-&gt;len);</div><div class='ctx'> 	memcpy_toio(&amp;card-&gt;dpram[DPRAM_TX + DPRAM_TX_SIZE * fifo_wr],</div><div class='ctx'> 			buf, DPRAM_TX_SIZE);</div><div class='ctx'> 	if (++fifo_wr &gt;= DPRAM_TX_CNT)</div><div class='hunk'>@@ -115,7 +105,7 @@ static netdev_tx_t softing_netdev_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 	card-&gt;tx.last_bus = priv-&gt;index;</div><div class='ctx'> 	++card-&gt;tx.pending;</div><div class='ctx'> 	++priv-&gt;tx.pending;</div><div class='del'>-	can_put_echo_skb(skb, dev, priv-&gt;tx.echo_put);</div><div class='add'>+	can_put_echo_skb(skb, dev, priv-&gt;tx.echo_put, 0);</div><div class='ctx'> 	++priv-&gt;tx.echo_put;</div><div class='ctx'> 	if (priv-&gt;tx.echo_put &gt;= TX_ECHO_SKB_MAX)</div><div class='ctx'> 		priv-&gt;tx.echo_put = 0;</div><div class='hunk'>@@ -178,11 +168,11 @@ static int softing_handle_1(struct softing *card)</div><div class='ctx'> 		iowrite8(0, &amp;card-&gt;dpram[DPRAM_RX_LOST]);</div><div class='ctx'> 		/* prepare msg */</div><div class='ctx'> 		msg.can_id = CAN_ERR_FLAG | CAN_ERR_CRTL;</div><div class='del'>-		msg.can_dlc = CAN_ERR_DLC;</div><div class='add'>+		msg.len = CAN_ERR_DLC;</div><div class='ctx'> 		msg.data[1] = CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='ctx'> 		/*</div><div class='del'>-		 * service to all busses, we don't know which it was applicable</div><div class='del'>-		 * but only service busses that are online</div><div class='add'>+		 * service to all buses, we don't know which it was applicable</div><div class='add'>+		 * but only service buses that are online</div><div class='ctx'> 		 */</div><div class='ctx'> 		for (j = 0; j &lt; ARRAY_SIZE(card-&gt;net); ++j) {</div><div class='ctx'> 			netdev = card-&gt;net[j];</div><div class='hunk'>@@ -192,7 +182,7 @@ static int softing_handle_1(struct softing *card)</div><div class='ctx'> 				/* a dead bus has no overflows */</div><div class='ctx'> 				continue;</div><div class='ctx'> 			++netdev-&gt;stats.rx_over_errors;</div><div class='del'>-			softing_netdev_rx(netdev, &amp;msg, ktime_set(0, 0));</div><div class='add'>+			softing_netdev_rx(netdev, &amp;msg, 0);</div><div class='ctx'> 		}</div><div class='ctx'> 		/* prepare for other use */</div><div class='ctx'> 		memset(&amp;msg, 0, sizeof(msg));</div><div class='hunk'>@@ -229,7 +219,7 @@ static int softing_handle_1(struct softing *card)</div><div class='ctx'> 		state = *ptr++;</div><div class='ctx'> </div><div class='ctx'> 		msg.can_id = CAN_ERR_FLAG;</div><div class='del'>-		msg.can_dlc = CAN_ERR_DLC;</div><div class='add'>+		msg.len = CAN_ERR_DLC;</div><div class='ctx'> </div><div class='ctx'> 		if (state &amp; SF_MASK_BUSOFF) {</div><div class='ctx'> 			can_state = CAN_STATE_BUS_OFF;</div><div class='hunk'>@@ -250,7 +240,6 @@ static int softing_handle_1(struct softing *card)</div><div class='ctx'> 				DPRAM_INFO_BUSSTATE2 : DPRAM_INFO_BUSSTATE]);</div><div class='ctx'> 		/* timestamp */</div><div class='ctx'> 		tmp_u32 = le32_to_cpup((void *)ptr);</div><div class='del'>-		ptr += 4;</div><div class='ctx'> 		ktime = softing_raw2ktime(card, tmp_u32);</div><div class='ctx'> </div><div class='ctx'> 		++netdev-&gt;stats.rx_errors;</div><div class='hunk'>@@ -272,7 +261,7 @@ static int softing_handle_1(struct softing *card)</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (cmd &amp; CMD_RTR)</div><div class='ctx'> 			msg.can_id |= CAN_RTR_FLAG;</div><div class='del'>-		msg.can_dlc = get_can_dlc(*ptr++);</div><div class='add'>+		msg.len = can_cc_dlc2len(*ptr++);</div><div class='ctx'> 		if (cmd &amp; CMD_XTD) {</div><div class='ctx'> 			msg.can_id |= CAN_EFF_FLAG;</div><div class='ctx'> 			msg.can_id |= le32_to_cpup((void *)ptr);</div><div class='hunk'>@@ -287,7 +276,6 @@ static int softing_handle_1(struct softing *card)</div><div class='ctx'> 		ktime = softing_raw2ktime(card, tmp_u32);</div><div class='ctx'> 		if (!(msg.can_id &amp; CAN_RTR_FLAG))</div><div class='ctx'> 			memcpy(&amp;msg.data[0], ptr, 8);</div><div class='del'>-		ptr += 8;</div><div class='ctx'> 		/* update socket */</div><div class='ctx'> 		if (cmd &amp; CMD_ACK) {</div><div class='ctx'> 			/* acknowledge, was tx msg */</div><div class='hunk'>@@ -295,7 +283,10 @@ static int softing_handle_1(struct softing *card)</div><div class='ctx'> 			skb = priv-&gt;can.echo_skb[priv-&gt;tx.echo_get];</div><div class='ctx'> 			if (skb)</div><div class='ctx'> 				skb-&gt;tstamp = ktime;</div><div class='del'>-			can_get_echo_skb(netdev, priv-&gt;tx.echo_get);</div><div class='add'>+			++netdev-&gt;stats.tx_packets;</div><div class='add'>+			netdev-&gt;stats.tx_bytes +=</div><div class='add'>+				can_get_echo_skb(netdev, priv-&gt;tx.echo_get,</div><div class='add'>+						 NULL);</div><div class='ctx'> 			++priv-&gt;tx.echo_get;</div><div class='ctx'> 			if (priv-&gt;tx.echo_get &gt;= TX_ECHO_SKB_MAX)</div><div class='ctx'> 				priv-&gt;tx.echo_get = 0;</div><div class='hunk'>@@ -303,9 +294,6 @@ static int softing_handle_1(struct softing *card)</div><div class='ctx'> 				--priv-&gt;tx.pending;</div><div class='ctx'> 			if (card-&gt;tx.pending)</div><div class='ctx'> 				--card-&gt;tx.pending;</div><div class='del'>-			++netdev-&gt;stats.tx_packets;</div><div class='del'>-			if (!(msg.can_id &amp; CAN_RTR_FLAG))</div><div class='del'>-				netdev-&gt;stats.tx_bytes += msg.can_dlc;</div><div class='ctx'> 		} else {</div><div class='ctx'> 			int ret;</div><div class='ctx'> </div><div class='hunk'>@@ -313,7 +301,7 @@ static int softing_handle_1(struct softing *card)</div><div class='ctx'> 			if (ret == NET_RX_SUCCESS) {</div><div class='ctx'> 				++netdev-&gt;stats.rx_packets;</div><div class='ctx'> 				if (!(msg.can_id &amp; CAN_RTR_FLAG))</div><div class='del'>-					netdev-&gt;stats.rx_bytes += msg.can_dlc;</div><div class='add'>+					netdev-&gt;stats.rx_bytes += msg.len;</div><div class='ctx'> 			} else {</div><div class='ctx'> 				++netdev-&gt;stats.rx_dropped;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -350,7 +338,7 @@ static irqreturn_t softing_irq_thread(int irq, void *dev_id)</div><div class='ctx'> 			continue;</div><div class='ctx'> 		priv = netdev_priv(netdev);</div><div class='ctx'> 		if (!canif_is_active(netdev))</div><div class='del'>-			/* it makes no sense to wake dead busses */</div><div class='add'>+			/* it makes no sense to wake dead buses */</div><div class='ctx'> 			continue;</div><div class='ctx'> 		if (priv-&gt;tx.pending &gt;= TX_ECHO_SKB_MAX)</div><div class='ctx'> 			continue;</div><div class='hunk'>@@ -385,7 +373,7 @@ static irqreturn_t softing_irq_v1(int irq, void *dev_id)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * netdev/candev inter-operability</div><div class='add'>+ * netdev/candev interoperability</div><div class='ctx'>  */</div><div class='ctx'> static int softing_netdev_open(struct net_device *ndev)</div><div class='ctx'> {</div><div class='hunk'>@@ -393,20 +381,22 @@ static int softing_netdev_open(struct net_device *ndev)</div><div class='ctx'> </div><div class='ctx'> 	/* check or determine and set bittime */</div><div class='ctx'> 	ret = open_candev(ndev);</div><div class='del'>-	if (!ret)</div><div class='del'>-		ret = softing_startstop(ndev, 1);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = softing_startstop(ndev, 1);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		close_candev(ndev);</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int softing_netdev_stop(struct net_device *ndev)</div><div class='ctx'> {</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='ctx'> 	netif_stop_queue(ndev);</div><div class='ctx'> </div><div class='ctx'> 	/* softing cycle does close_candev() */</div><div class='del'>-	ret = softing_startstop(ndev, 0);</div><div class='del'>-	return ret;</div><div class='add'>+	return softing_startstop(ndev, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int softing_candev_set_mode(struct net_device *ndev, enum can_mode mode)</div><div class='hunk'>@@ -458,8 +448,9 @@ static void softing_card_shutdown(struct softing *card)</div><div class='ctx'> {</div><div class='ctx'> 	int fw_up = 0;</div><div class='ctx'> </div><div class='del'>-	if (mutex_lock_interruptible(&amp;card-&gt;fw.lock))</div><div class='add'>+	if (mutex_lock_interruptible(&amp;card-&gt;fw.lock)) {</div><div class='ctx'> 		/* return -ERESTARTSYS */;</div><div class='add'>+	}</div><div class='ctx'> 	fw_up = card-&gt;fw.up;</div><div class='ctx'> 	card-&gt;fw.up = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -601,8 +592,8 @@ static ssize_t store_output(struct device *dev, struct device_attribute *attr,</div><div class='ctx'> 	return count;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static const DEVICE_ATTR(chip, S_IRUGO, show_chip, NULL);</div><div class='del'>-static const DEVICE_ATTR(output, S_IRUGO | S_IWUSR, show_output, store_output);</div><div class='add'>+static const DEVICE_ATTR(chip, 0444, show_chip, NULL);</div><div class='add'>+static const DEVICE_ATTR(output, 0644, show_output, store_output);</div><div class='ctx'> </div><div class='ctx'> static const struct attribute *const netdev_sysfs_attrs[] = {</div><div class='ctx'> 	&amp;dev_attr_chip.attr,</div><div class='hunk'>@@ -618,11 +609,14 @@ static const struct net_device_ops softing_netdev_ops = {</div><div class='ctx'> 	.ndo_open = softing_netdev_open,</div><div class='ctx'> 	.ndo_stop = softing_netdev_stop,</div><div class='ctx'> 	.ndo_start_xmit	= softing_netdev_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops softing_ethtool_ops = {</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct can_bittiming_const softing_btr_const = {</div><div class='del'>-	.name = "softing",</div><div class='add'>+	.name = KBUILD_MODNAME,</div><div class='ctx'> 	.tseg1_min = 1,</div><div class='ctx'> 	.tseg1_max = 16,</div><div class='ctx'> 	.tseg2_min = 1,</div><div class='hunk'>@@ -659,6 +653,7 @@ static struct net_device *softing_netdev_create(struct softing *card,</div><div class='ctx'> </div><div class='ctx'> 	netdev-&gt;flags |= IFF_ECHO;</div><div class='ctx'> 	netdev-&gt;netdev_ops = &amp;softing_netdev_ops;</div><div class='add'>+	netdev-&gt;ethtool_ops = &amp;softing_ethtool_ops;</div><div class='ctx'> 	priv-&gt;can.do_set_mode = softing_candev_set_mode;</div><div class='ctx'> 	priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES;</div><div class='ctx'> </div><div class='hunk'>@@ -694,7 +689,7 @@ static void softing_netdev_cleanup(struct net_device *netdev)</div><div class='ctx'> static ssize_t show_##name(struct device *dev, \</div><div class='ctx'> 		struct device_attribute *attr, char *buf) \</div><div class='ctx'> { \</div><div class='del'>-	struct softing *card = platform_get_drvdata(to_platform_device(dev)); \</div><div class='add'>+	struct softing *card = dev_get_drvdata(dev); \</div><div class='ctx'> 	return sprintf(buf, "%u\n", card-&gt;member); \</div><div class='ctx'> } \</div><div class='ctx'> static DEVICE_ATTR(name, 0444, show_##name, NULL)</div><div class='hunk'>@@ -703,7 +698,7 @@ static DEVICE_ATTR(name, 0444, show_##name, NULL)</div><div class='ctx'> static ssize_t show_##name(struct device *dev, \</div><div class='ctx'> 		struct device_attribute *attr, char *buf) \</div><div class='ctx'> { \</div><div class='del'>-	struct softing *card = platform_get_drvdata(to_platform_device(dev)); \</div><div class='add'>+	struct softing *card = dev_get_drvdata(dev); \</div><div class='ctx'> 	return sprintf(buf, "%s\n", card-&gt;member); \</div><div class='ctx'> } \</div><div class='ctx'> static DEVICE_ATTR(name, 0444, show_##name, NULL)</div><div class='hunk'>@@ -733,7 +728,7 @@ static const struct attribute_group softing_pdev_group = {</div><div class='ctx'> /*</div><div class='ctx'>  * platform driver</div><div class='ctx'>  */</div><div class='del'>-static int softing_pdev_remove(struct platform_device *pdev)</div><div class='add'>+static void softing_pdev_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct softing *card = platform_get_drvdata(pdev);</div><div class='ctx'> 	int j;</div><div class='hunk'>@@ -751,7 +746,6 @@ static int softing_pdev_remove(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	iounmap(card-&gt;dpram);</div><div class='ctx'> 	kfree(card);</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int softing_pdev_probe(struct platform_device *pdev)</div><div class='hunk'>@@ -788,7 +782,7 @@ static int softing_pdev_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto platform_resource_failed;</div><div class='ctx'> 	card-&gt;dpram_phys = pres-&gt;start;</div><div class='ctx'> 	card-&gt;dpram_size = resource_size(pres);</div><div class='del'>-	card-&gt;dpram = ioremap_nocache(card-&gt;dpram_phys, card-&gt;dpram_size);</div><div class='add'>+	card-&gt;dpram = ioremap(card-&gt;dpram_phys, card-&gt;dpram_size);</div><div class='ctx'> 	if (!card-&gt;dpram) {</div><div class='ctx'> 		dev_alert(&amp;card-&gt;pdev-&gt;dev, "dpram ioremap failed\n");</div><div class='ctx'> 		goto ioremap_failed;</div><div class='hunk'>@@ -856,7 +850,7 @@ platform_resource_failed:</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver softing_driver = {</div><div class='ctx'> 	.driver = {</div><div class='del'>-		.name = "softing",</div><div class='add'>+		.name = KBUILD_MODNAME,</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe = softing_pdev_probe,</div><div class='ctx'> 	.remove = softing_pdev_remove,</div><div class='head'>diff --git a/drivers/net/can/softing/softing_platform.h b/drivers/net/can/softing/softing_platform.h<br/>index ebbf69815623..cd8d7904c5f0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/softing/softing_platform.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/softing/softing_platform.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/softing/softing_platform.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/softing/softing_platform.h</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -18,7 +19,7 @@ struct softing_platform_data {</div><div class='ctx'> 	 * 16bit, shared interrupt</div><div class='ctx'> 	 */</div><div class='ctx'> 	int generation;</div><div class='del'>-	int nbus; /* # busses on device */</div><div class='add'>+	int nbus; /* # buses on device */</div><div class='ctx'> 	unsigned int freq; /* operating frequency in Hz */</div><div class='ctx'> 	unsigned int max_brp;</div><div class='ctx'> 	unsigned int max_sjw;</div><div class='head'>diff --git a/drivers/net/can/spi/Kconfig b/drivers/net/can/spi/Kconfig<br/>index 148cae5871a6..f45449210047 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/Kconfig?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/spi/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/spi/Kconfig</a></div><div class='hunk'>@@ -1,10 +1,18 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> menu "CAN SPI interfaces"</div><div class='ctx'> 	depends on SPI</div><div class='ctx'> </div><div class='add'>+config CAN_HI311X</div><div class='add'>+	tristate "Holt HI311x SPI CAN controllers"</div><div class='add'>+	help</div><div class='add'>+	  Driver for the Holt HI311x SPI CAN controllers.</div><div class='add'>+</div><div class='ctx'> config CAN_MCP251X</div><div class='del'>-	tristate "Microchip MCP251x SPI CAN controllers"</div><div class='del'>-	depends on HAS_DMA</div><div class='del'>-	---help---</div><div class='del'>-	  Driver for the Microchip MCP251x SPI CAN controllers.</div><div class='add'>+	tristate "Microchip MCP251x and MCP25625 SPI CAN controllers"</div><div class='add'>+	help</div><div class='add'>+	  Driver for the Microchip MCP251x and MCP25625 SPI CAN</div><div class='add'>+	  controllers.</div><div class='add'>+</div><div class='add'>+source "drivers/net/can/spi/mcp251xfd/Kconfig"</div><div class='ctx'> </div><div class='ctx'> endmenu</div><div class='head'>diff --git a/drivers/net/can/spi/Makefile b/drivers/net/can/spi/Makefile<br/>index 0e86040cdd8c..33e3f60bbc10 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/Makefile?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/spi/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/spi/Makefile</a></div><div class='hunk'>@@ -1,6 +1,9 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> #</div><div class='ctx'> #  Makefile for the Linux Controller Area Network SPI drivers.</div><div class='ctx'> #</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+obj-$(CONFIG_CAN_HI311X)	+= hi311x.o</div><div class='ctx'> obj-$(CONFIG_CAN_MCP251X)	+= mcp251x.o</div><div class='add'>+obj-y				+= mcp251xfd/</div><div class='head'>diff --git a/drivers/net/can/spi/hi311x.c b/drivers/net/can/spi/hi311x.c<br/>new file mode 100644<br/>index 000000000000..e00d3dbc4cf4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/hi311x.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/spi/hi311x.c</a></div><div class='hunk'>@@ -0,0 +1,1041 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* CAN bus driver for Holt HI3110 CAN Controller with SPI Interface</div><div class='add'>+ *</div><div class='add'>+ * Copyright(C) Timesys Corporation 2016</div><div class='add'>+ *</div><div class='add'>+ * Based on Microchip 251x CAN Controller (mcp251x) Linux kernel driver</div><div class='add'>+ * Copyright 2009 Christian Pellegrin EVOL S.r.l.</div><div class='add'>+ * Copyright 2007 Raymarine UK, Ltd. All Rights Reserved.</div><div class='add'>+ * Copyright 2006 Arcom Control Systems Ltd.</div><div class='add'>+ *</div><div class='add'>+ * Based on CAN bus driver for the CCAN controller written by</div><div class='add'>+ * - Sascha Hauer, Marc Kleine-Budde, Pengutronix</div><div class='add'>+ * - Simon Kallweit, intefo AG</div><div class='add'>+ * Copyright 2007</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/can/core.h&gt;</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/completion.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/freezer.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/mod_devicetable.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/property.h&gt;</div><div class='add'>+#include &lt;linux/regulator/consumer.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/spi/spi.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='add'>+</div><div class='add'>+#define HI3110_MASTER_RESET 0x56</div><div class='add'>+#define HI3110_READ_CTRL0 0xD2</div><div class='add'>+#define HI3110_READ_CTRL1 0xD4</div><div class='add'>+#define HI3110_READ_STATF 0xE2</div><div class='add'>+#define HI3110_WRITE_CTRL0 0x14</div><div class='add'>+#define HI3110_WRITE_CTRL1 0x16</div><div class='add'>+#define HI3110_WRITE_INTE 0x1C</div><div class='add'>+#define HI3110_WRITE_BTR0 0x18</div><div class='add'>+#define HI3110_WRITE_BTR1 0x1A</div><div class='add'>+#define HI3110_READ_BTR0 0xD6</div><div class='add'>+#define HI3110_READ_BTR1 0xD8</div><div class='add'>+#define HI3110_READ_INTF 0xDE</div><div class='add'>+#define HI3110_READ_ERR 0xDC</div><div class='add'>+#define HI3110_READ_FIFO_WOTIME 0x48</div><div class='add'>+#define HI3110_WRITE_FIFO 0x12</div><div class='add'>+#define HI3110_READ_MESSTAT 0xDA</div><div class='add'>+#define HI3110_READ_REC 0xEA</div><div class='add'>+#define HI3110_READ_TEC 0xEC</div><div class='add'>+</div><div class='add'>+#define HI3110_CTRL0_MODE_MASK (7 &lt;&lt; 5)</div><div class='add'>+#define HI3110_CTRL0_NORMAL_MODE (0 &lt;&lt; 5)</div><div class='add'>+#define HI3110_CTRL0_LOOPBACK_MODE (1 &lt;&lt; 5)</div><div class='add'>+#define HI3110_CTRL0_MONITOR_MODE (2 &lt;&lt; 5)</div><div class='add'>+#define HI3110_CTRL0_SLEEP_MODE (3 &lt;&lt; 5)</div><div class='add'>+#define HI3110_CTRL0_INIT_MODE (4 &lt;&lt; 5)</div><div class='add'>+</div><div class='add'>+#define HI3110_CTRL1_TXEN BIT(7)</div><div class='add'>+</div><div class='add'>+#define HI3110_INT_RXTMP BIT(7)</div><div class='add'>+#define HI3110_INT_RXFIFO BIT(6)</div><div class='add'>+#define HI3110_INT_TXCPLT BIT(5)</div><div class='add'>+#define HI3110_INT_BUSERR BIT(4)</div><div class='add'>+#define HI3110_INT_MCHG BIT(3)</div><div class='add'>+#define HI3110_INT_WAKEUP BIT(2)</div><div class='add'>+#define HI3110_INT_F1MESS BIT(1)</div><div class='add'>+#define HI3110_INT_F0MESS BIT(0)</div><div class='add'>+</div><div class='add'>+#define HI3110_ERR_BUSOFF BIT(7)</div><div class='add'>+#define HI3110_ERR_TXERRP BIT(6)</div><div class='add'>+#define HI3110_ERR_RXERRP BIT(5)</div><div class='add'>+#define HI3110_ERR_BITERR BIT(4)</div><div class='add'>+#define HI3110_ERR_FRMERR BIT(3)</div><div class='add'>+#define HI3110_ERR_CRCERR BIT(2)</div><div class='add'>+#define HI3110_ERR_ACKERR BIT(1)</div><div class='add'>+#define HI3110_ERR_STUFERR BIT(0)</div><div class='add'>+#define HI3110_ERR_PROTOCOL_MASK (0x1F)</div><div class='add'>+#define HI3110_ERR_PASSIVE_MASK (0x60)</div><div class='add'>+</div><div class='add'>+#define HI3110_STAT_RXFMTY BIT(1)</div><div class='add'>+#define HI3110_STAT_BUSOFF BIT(2)</div><div class='add'>+#define HI3110_STAT_ERRP BIT(3)</div><div class='add'>+#define HI3110_STAT_ERRW BIT(4)</div><div class='add'>+#define HI3110_STAT_TXMTY BIT(7)</div><div class='add'>+</div><div class='add'>+#define HI3110_BTR0_SJW_SHIFT 6</div><div class='add'>+#define HI3110_BTR0_BRP_SHIFT 0</div><div class='add'>+</div><div class='add'>+#define HI3110_BTR1_SAMP_3PERBIT (1 &lt;&lt; 7)</div><div class='add'>+#define HI3110_BTR1_SAMP_1PERBIT (0 &lt;&lt; 7)</div><div class='add'>+#define HI3110_BTR1_TSEG2_SHIFT 4</div><div class='add'>+#define HI3110_BTR1_TSEG1_SHIFT 0</div><div class='add'>+</div><div class='add'>+#define HI3110_FIFO_WOTIME_TAG_OFF 0</div><div class='add'>+#define HI3110_FIFO_WOTIME_ID_OFF 1</div><div class='add'>+#define HI3110_FIFO_WOTIME_DLC_OFF 5</div><div class='add'>+#define HI3110_FIFO_WOTIME_DAT_OFF 6</div><div class='add'>+</div><div class='add'>+#define HI3110_FIFO_WOTIME_TAG_IDE BIT(7)</div><div class='add'>+#define HI3110_FIFO_WOTIME_ID_RTR BIT(0)</div><div class='add'>+</div><div class='add'>+#define HI3110_FIFO_TAG_OFF 0</div><div class='add'>+#define HI3110_FIFO_ID_OFF 1</div><div class='add'>+#define HI3110_FIFO_STD_DLC_OFF 3</div><div class='add'>+#define HI3110_FIFO_STD_DATA_OFF 4</div><div class='add'>+#define HI3110_FIFO_EXT_DLC_OFF 5</div><div class='add'>+#define HI3110_FIFO_EXT_DATA_OFF 6</div><div class='add'>+</div><div class='add'>+#define HI3110_CAN_MAX_DATA_LEN 8</div><div class='add'>+#define HI3110_RX_BUF_LEN 15</div><div class='add'>+#define HI3110_TX_STD_BUF_LEN 12</div><div class='add'>+#define HI3110_TX_EXT_BUF_LEN 14</div><div class='add'>+#define HI3110_CAN_FRAME_MAX_BITS 128</div><div class='add'>+#define HI3110_EFF_FLAGS 0x18 /* IDE + SRR */</div><div class='add'>+</div><div class='add'>+#define HI3110_TX_ECHO_SKB_MAX 1</div><div class='add'>+</div><div class='add'>+#define HI3110_OST_DELAY_MS (10)</div><div class='add'>+</div><div class='add'>+#define DEVICE_NAME "hi3110"</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const hi3110_bittiming_const = {</div><div class='add'>+	.name = DEVICE_NAME,</div><div class='add'>+	.tseg1_min = 2,</div><div class='add'>+	.tseg1_max = 16,</div><div class='add'>+	.tseg2_min = 2,</div><div class='add'>+	.tseg2_max = 8,</div><div class='add'>+	.sjw_max = 4,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 64,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum hi3110_model {</div><div class='add'>+	CAN_HI3110_HI3110 = 0x3110,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hi3110_priv {</div><div class='add'>+	struct can_priv can;</div><div class='add'>+	struct net_device *net;</div><div class='add'>+	struct spi_device *spi;</div><div class='add'>+	enum hi3110_model model;</div><div class='add'>+</div><div class='add'>+	struct mutex hi3110_lock; /* SPI device lock */</div><div class='add'>+</div><div class='add'>+	u8 *spi_tx_buf;</div><div class='add'>+	u8 *spi_rx_buf;</div><div class='add'>+</div><div class='add'>+	struct sk_buff *tx_skb;</div><div class='add'>+</div><div class='add'>+	struct workqueue_struct *wq;</div><div class='add'>+	struct work_struct tx_work;</div><div class='add'>+	struct work_struct restart_work;</div><div class='add'>+</div><div class='add'>+	int force_quit;</div><div class='add'>+	int after_suspend;</div><div class='add'>+#define HI3110_AFTER_SUSPEND_UP 1</div><div class='add'>+#define HI3110_AFTER_SUSPEND_DOWN 2</div><div class='add'>+#define HI3110_AFTER_SUSPEND_POWER 4</div><div class='add'>+#define HI3110_AFTER_SUSPEND_RESTART 8</div><div class='add'>+	int restart_tx;</div><div class='add'>+	bool tx_busy;</div><div class='add'>+</div><div class='add'>+	struct regulator *power;</div><div class='add'>+	struct regulator *transceiver;</div><div class='add'>+	struct clk *clk;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void hi3110_clean(struct net_device *net)</div><div class='add'>+{</div><div class='add'>+	struct hi3110_priv *priv = netdev_priv(net);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;tx_skb || priv-&gt;tx_busy)</div><div class='add'>+		net-&gt;stats.tx_errors++;</div><div class='add'>+	dev_kfree_skb(priv-&gt;tx_skb);</div><div class='add'>+	if (priv-&gt;tx_busy)</div><div class='add'>+		can_free_echo_skb(priv-&gt;net, 0, NULL);</div><div class='add'>+	priv-&gt;tx_skb = NULL;</div><div class='add'>+	priv-&gt;tx_busy = false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Note about handling of error return of hi3110_spi_trans: accessing</div><div class='add'>+ * registers via SPI is not really different conceptually than using</div><div class='add'>+ * normal I/O assembler instructions, although it's much more</div><div class='add'>+ * complicated from a practical POV. So it's not advisable to always</div><div class='add'>+ * check the return value of this function. Imagine that every</div><div class='add'>+ * read{b,l}, write{b,l} and friends would be bracketed in "if ( &lt; 0)</div><div class='add'>+ * error();", it would be a great mess (well there are some situation</div><div class='add'>+ * when exception handling C++ like could be useful after all). So we</div><div class='add'>+ * just check that transfers are OK at the beginning of our</div><div class='add'>+ * conversation with the chip and to avoid doing really nasty things</div><div class='add'>+ * (like injecting bogus packets in the network stack).</div><div class='add'>+ */</div><div class='add'>+static int hi3110_spi_trans(struct spi_device *spi, int len)</div><div class='add'>+{</div><div class='add'>+	struct hi3110_priv *priv = spi_get_drvdata(spi);</div><div class='add'>+	struct spi_transfer t = {</div><div class='add'>+		.tx_buf = priv-&gt;spi_tx_buf,</div><div class='add'>+		.rx_buf = priv-&gt;spi_rx_buf,</div><div class='add'>+		.len = len,</div><div class='add'>+		.cs_change = 0,</div><div class='add'>+	};</div><div class='add'>+	struct spi_message m;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	spi_message_init(&amp;m);</div><div class='add'>+	spi_message_add_tail(&amp;t, &amp;m);</div><div class='add'>+</div><div class='add'>+	ret = spi_sync(spi, &amp;m);</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(&amp;spi-&gt;dev, "spi transfer failed: ret = %d\n", ret);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hi3110_cmd(struct spi_device *spi, u8 command)</div><div class='add'>+{</div><div class='add'>+	struct hi3110_priv *priv = spi_get_drvdata(spi);</div><div class='add'>+</div><div class='add'>+	priv-&gt;spi_tx_buf[0] = command;</div><div class='add'>+	dev_dbg(&amp;spi-&gt;dev, "hi3110_cmd: %02X\n", command);</div><div class='add'>+</div><div class='add'>+	return hi3110_spi_trans(spi, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 hi3110_read(struct spi_device *spi, u8 command)</div><div class='add'>+{</div><div class='add'>+	struct hi3110_priv *priv = spi_get_drvdata(spi);</div><div class='add'>+	u8 val = 0;</div><div class='add'>+</div><div class='add'>+	priv-&gt;spi_tx_buf[0] = command;</div><div class='add'>+	hi3110_spi_trans(spi, 2);</div><div class='add'>+	val = priv-&gt;spi_rx_buf[1];</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hi3110_write(struct spi_device *spi, u8 reg, u8 val)</div><div class='add'>+{</div><div class='add'>+	struct hi3110_priv *priv = spi_get_drvdata(spi);</div><div class='add'>+</div><div class='add'>+	priv-&gt;spi_tx_buf[0] = reg;</div><div class='add'>+	priv-&gt;spi_tx_buf[1] = val;</div><div class='add'>+	hi3110_spi_trans(spi, 2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hi3110_hw_tx_frame(struct spi_device *spi, u8 *buf, int len)</div><div class='add'>+{</div><div class='add'>+	struct hi3110_priv *priv = spi_get_drvdata(spi);</div><div class='add'>+</div><div class='add'>+	priv-&gt;spi_tx_buf[0] = HI3110_WRITE_FIFO;</div><div class='add'>+	memcpy(priv-&gt;spi_tx_buf + 1, buf, len);</div><div class='add'>+	hi3110_spi_trans(spi, len + 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hi3110_hw_tx(struct spi_device *spi, struct can_frame *frame)</div><div class='add'>+{</div><div class='add'>+	u8 buf[HI3110_TX_EXT_BUF_LEN];</div><div class='add'>+</div><div class='add'>+	buf[HI3110_FIFO_TAG_OFF] = 0;</div><div class='add'>+</div><div class='add'>+	if (frame-&gt;can_id &amp; CAN_EFF_FLAG) {</div><div class='add'>+		/* Extended frame */</div><div class='add'>+		buf[HI3110_FIFO_ID_OFF] = (frame-&gt;can_id &amp; CAN_EFF_MASK) &gt;&gt; 21;</div><div class='add'>+		buf[HI3110_FIFO_ID_OFF + 1] =</div><div class='add'>+			(((frame-&gt;can_id &amp; CAN_EFF_MASK) &gt;&gt; 13) &amp; 0xe0) |</div><div class='add'>+			HI3110_EFF_FLAGS |</div><div class='add'>+			(((frame-&gt;can_id &amp; CAN_EFF_MASK) &gt;&gt; 15) &amp; 0x07);</div><div class='add'>+		buf[HI3110_FIFO_ID_OFF + 2] =</div><div class='add'>+			(frame-&gt;can_id &amp; CAN_EFF_MASK) &gt;&gt; 7;</div><div class='add'>+		buf[HI3110_FIFO_ID_OFF + 3] =</div><div class='add'>+			((frame-&gt;can_id &amp; CAN_EFF_MASK) &lt;&lt; 1) |</div><div class='add'>+			((frame-&gt;can_id &amp; CAN_RTR_FLAG) ? 1 : 0);</div><div class='add'>+</div><div class='add'>+		buf[HI3110_FIFO_EXT_DLC_OFF] = frame-&gt;len;</div><div class='add'>+</div><div class='add'>+		memcpy(buf + HI3110_FIFO_EXT_DATA_OFF,</div><div class='add'>+		       frame-&gt;data, frame-&gt;len);</div><div class='add'>+</div><div class='add'>+		hi3110_hw_tx_frame(spi, buf, HI3110_TX_EXT_BUF_LEN -</div><div class='add'>+				   (HI3110_CAN_MAX_DATA_LEN - frame-&gt;len));</div><div class='add'>+	} else {</div><div class='add'>+		/* Standard frame */</div><div class='add'>+		buf[HI3110_FIFO_ID_OFF] =   (frame-&gt;can_id &amp; CAN_SFF_MASK) &gt;&gt; 3;</div><div class='add'>+		buf[HI3110_FIFO_ID_OFF + 1] =</div><div class='add'>+			((frame-&gt;can_id &amp; CAN_SFF_MASK) &lt;&lt; 5) |</div><div class='add'>+			((frame-&gt;can_id &amp; CAN_RTR_FLAG) ? (1 &lt;&lt; 4) : 0);</div><div class='add'>+</div><div class='add'>+		buf[HI3110_FIFO_STD_DLC_OFF] = frame-&gt;len;</div><div class='add'>+</div><div class='add'>+		memcpy(buf + HI3110_FIFO_STD_DATA_OFF,</div><div class='add'>+		       frame-&gt;data, frame-&gt;len);</div><div class='add'>+</div><div class='add'>+		hi3110_hw_tx_frame(spi, buf, HI3110_TX_STD_BUF_LEN -</div><div class='add'>+				   (HI3110_CAN_MAX_DATA_LEN - frame-&gt;len));</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hi3110_hw_rx_frame(struct spi_device *spi, u8 *buf)</div><div class='add'>+{</div><div class='add'>+	struct hi3110_priv *priv = spi_get_drvdata(spi);</div><div class='add'>+</div><div class='add'>+	priv-&gt;spi_tx_buf[0] = HI3110_READ_FIFO_WOTIME;</div><div class='add'>+	hi3110_spi_trans(spi, HI3110_RX_BUF_LEN);</div><div class='add'>+	memcpy(buf, priv-&gt;spi_rx_buf + 1, HI3110_RX_BUF_LEN - 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hi3110_hw_rx(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+	struct hi3110_priv *priv = spi_get_drvdata(spi);</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct can_frame *frame;</div><div class='add'>+	u8 buf[HI3110_RX_BUF_LEN - 1];</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_skb(priv-&gt;net, &amp;frame);</div><div class='add'>+	if (!skb) {</div><div class='add'>+		priv-&gt;net-&gt;stats.rx_dropped++;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hi3110_hw_rx_frame(spi, buf);</div><div class='add'>+	if (buf[HI3110_FIFO_WOTIME_TAG_OFF] &amp; HI3110_FIFO_WOTIME_TAG_IDE) {</div><div class='add'>+		/* IDE is recessive (1), indicating extended 29-bit frame */</div><div class='add'>+		frame-&gt;can_id = CAN_EFF_FLAG;</div><div class='add'>+		frame-&gt;can_id |=</div><div class='add'>+			(buf[HI3110_FIFO_WOTIME_ID_OFF] &lt;&lt; 21) |</div><div class='add'>+			(((buf[HI3110_FIFO_WOTIME_ID_OFF + 1] &amp; 0xE0) &gt;&gt; 5) &lt;&lt; 18) |</div><div class='add'>+			((buf[HI3110_FIFO_WOTIME_ID_OFF + 1] &amp; 0x07) &lt;&lt; 15) |</div><div class='add'>+			(buf[HI3110_FIFO_WOTIME_ID_OFF + 2] &lt;&lt; 7) |</div><div class='add'>+			(buf[HI3110_FIFO_WOTIME_ID_OFF + 3] &gt;&gt; 1);</div><div class='add'>+	} else {</div><div class='add'>+		/* IDE is dominant (0), frame indicating standard 11-bit */</div><div class='add'>+		frame-&gt;can_id =</div><div class='add'>+			(buf[HI3110_FIFO_WOTIME_ID_OFF] &lt;&lt; 3) |</div><div class='add'>+			((buf[HI3110_FIFO_WOTIME_ID_OFF + 1] &amp; 0xE0) &gt;&gt; 5);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Data length */</div><div class='add'>+	frame-&gt;len = can_cc_dlc2len(buf[HI3110_FIFO_WOTIME_DLC_OFF] &amp; 0x0F);</div><div class='add'>+</div><div class='add'>+	if (buf[HI3110_FIFO_WOTIME_ID_OFF + 3] &amp; HI3110_FIFO_WOTIME_ID_RTR) {</div><div class='add'>+		frame-&gt;can_id |= CAN_RTR_FLAG;</div><div class='add'>+	} else {</div><div class='add'>+		memcpy(frame-&gt;data, buf + HI3110_FIFO_WOTIME_DAT_OFF,</div><div class='add'>+		       frame-&gt;len);</div><div class='add'>+</div><div class='add'>+		priv-&gt;net-&gt;stats.rx_bytes += frame-&gt;len;</div><div class='add'>+	}</div><div class='add'>+	priv-&gt;net-&gt;stats.rx_packets++;</div><div class='add'>+</div><div class='add'>+	netif_rx(skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hi3110_hw_sleep(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+	hi3110_write(spi, HI3110_WRITE_CTRL0, HI3110_CTRL0_SLEEP_MODE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static netdev_tx_t hi3110_hard_start_xmit(struct sk_buff *skb,</div><div class='add'>+					  struct net_device *net)</div><div class='add'>+{</div><div class='add'>+	struct hi3110_priv *priv = netdev_priv(net);</div><div class='add'>+	struct spi_device *spi = priv-&gt;spi;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;tx_skb || priv-&gt;tx_busy) {</div><div class='add'>+		dev_err(&amp;spi-&gt;dev, "hard_xmit called while tx busy\n");</div><div class='add'>+		return NETDEV_TX_BUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (can_dev_dropped_skb(net, skb))</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(net);</div><div class='add'>+	priv-&gt;tx_skb = skb;</div><div class='add'>+	queue_work(priv-&gt;wq, &amp;priv-&gt;tx_work);</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hi3110_do_set_mode(struct net_device *net, enum can_mode mode)</div><div class='add'>+{</div><div class='add'>+	struct hi3110_priv *priv = netdev_priv(net);</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case CAN_MODE_START:</div><div class='add'>+		hi3110_clean(net);</div><div class='add'>+		/* We have to delay work since SPI I/O may sleep */</div><div class='add'>+		priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+		priv-&gt;restart_tx = 1;</div><div class='add'>+		if (priv-&gt;can.restart_ms == 0)</div><div class='add'>+			priv-&gt;after_suspend = HI3110_AFTER_SUSPEND_RESTART;</div><div class='add'>+		queue_work(priv-&gt;wq, &amp;priv-&gt;restart_work);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hi3110_get_berr_counter(const struct net_device *net,</div><div class='add'>+				   struct can_berr_counter *bec)</div><div class='add'>+{</div><div class='add'>+	struct hi3110_priv *priv = netdev_priv(net);</div><div class='add'>+	struct spi_device *spi = priv-&gt;spi;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;hi3110_lock);</div><div class='add'>+	bec-&gt;txerr = hi3110_read(spi, HI3110_READ_TEC);</div><div class='add'>+	bec-&gt;rxerr = hi3110_read(spi, HI3110_READ_REC);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;hi3110_lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hi3110_set_normal_mode(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+	struct hi3110_priv *priv = spi_get_drvdata(spi);</div><div class='add'>+	u8 reg = 0;</div><div class='add'>+</div><div class='add'>+	hi3110_write(spi, HI3110_WRITE_INTE, HI3110_INT_BUSERR |</div><div class='add'>+		     HI3110_INT_RXFIFO | HI3110_INT_TXCPLT);</div><div class='add'>+</div><div class='add'>+	/* Enable TX */</div><div class='add'>+	hi3110_write(spi, HI3110_WRITE_CTRL1, HI3110_CTRL1_TXEN);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LOOPBACK)</div><div class='add'>+		reg = HI3110_CTRL0_LOOPBACK_MODE;</div><div class='add'>+	else if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LISTENONLY)</div><div class='add'>+		reg = HI3110_CTRL0_MONITOR_MODE;</div><div class='add'>+	else</div><div class='add'>+		reg = HI3110_CTRL0_NORMAL_MODE;</div><div class='add'>+</div><div class='add'>+	hi3110_write(spi, HI3110_WRITE_CTRL0, reg);</div><div class='add'>+</div><div class='add'>+	/* Wait for the device to enter the mode */</div><div class='add'>+	mdelay(HI3110_OST_DELAY_MS);</div><div class='add'>+	reg = hi3110_read(spi, HI3110_READ_CTRL0);</div><div class='add'>+	if ((reg &amp; HI3110_CTRL0_MODE_MASK) != reg)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hi3110_do_set_bittiming(struct net_device *net)</div><div class='add'>+{</div><div class='add'>+	struct hi3110_priv *priv = netdev_priv(net);</div><div class='add'>+	struct can_bittiming *bt = &amp;priv-&gt;can.bittiming;</div><div class='add'>+	struct spi_device *spi = priv-&gt;spi;</div><div class='add'>+</div><div class='add'>+	hi3110_write(spi, HI3110_WRITE_BTR0,</div><div class='add'>+		     ((bt-&gt;sjw - 1) &lt;&lt; HI3110_BTR0_SJW_SHIFT) |</div><div class='add'>+		     ((bt-&gt;brp - 1) &lt;&lt; HI3110_BTR0_BRP_SHIFT));</div><div class='add'>+</div><div class='add'>+	hi3110_write(spi, HI3110_WRITE_BTR1,</div><div class='add'>+		     (priv-&gt;can.ctrlmode &amp;</div><div class='add'>+		      CAN_CTRLMODE_3_SAMPLES ?</div><div class='add'>+		      HI3110_BTR1_SAMP_3PERBIT : HI3110_BTR1_SAMP_1PERBIT) |</div><div class='add'>+		     ((bt-&gt;phase_seg1 + bt-&gt;prop_seg - 1)</div><div class='add'>+		      &lt;&lt; HI3110_BTR1_TSEG1_SHIFT) |</div><div class='add'>+		     ((bt-&gt;phase_seg2 - 1) &lt;&lt; HI3110_BTR1_TSEG2_SHIFT));</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;spi-&gt;dev, "BT: 0x%02x 0x%02x\n",</div><div class='add'>+		hi3110_read(spi, HI3110_READ_BTR0),</div><div class='add'>+		hi3110_read(spi, HI3110_READ_BTR1));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hi3110_setup(struct net_device *net)</div><div class='add'>+{</div><div class='add'>+	hi3110_do_set_bittiming(net);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hi3110_hw_reset(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+	u8 reg;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Wait for oscillator startup timer after power up */</div><div class='add'>+	mdelay(HI3110_OST_DELAY_MS);</div><div class='add'>+</div><div class='add'>+	ret = hi3110_cmd(spi, HI3110_MASTER_RESET);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Wait for oscillator startup timer after reset */</div><div class='add'>+	mdelay(HI3110_OST_DELAY_MS);</div><div class='add'>+</div><div class='add'>+	reg = hi3110_read(spi, HI3110_READ_CTRL0);</div><div class='add'>+	if ((reg &amp; HI3110_CTRL0_MODE_MASK) != HI3110_CTRL0_INIT_MODE)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	/* As per the datasheet it appears the error flags are</div><div class='add'>+	 * not cleared on reset. Explicitly clear them by performing a read</div><div class='add'>+	 */</div><div class='add'>+	hi3110_read(spi, HI3110_READ_ERR);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hi3110_hw_probe(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+	u8 statf;</div><div class='add'>+</div><div class='add'>+	hi3110_hw_reset(spi);</div><div class='add'>+</div><div class='add'>+	/* Confirm correct operation by checking against reset values</div><div class='add'>+	 * in datasheet</div><div class='add'>+	 */</div><div class='add'>+	statf = hi3110_read(spi, HI3110_READ_STATF);</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;spi-&gt;dev, "statf: %02X\n", statf);</div><div class='add'>+</div><div class='add'>+	if (statf != 0x82)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hi3110_power_enable(struct regulator *reg, int enable)</div><div class='add'>+{</div><div class='add'>+	if (IS_ERR_OR_NULL(reg))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (enable)</div><div class='add'>+		return regulator_enable(reg);</div><div class='add'>+	else</div><div class='add'>+		return regulator_disable(reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hi3110_stop(struct net_device *net)</div><div class='add'>+{</div><div class='add'>+	struct hi3110_priv *priv = netdev_priv(net);</div><div class='add'>+	struct spi_device *spi = priv-&gt;spi;</div><div class='add'>+</div><div class='add'>+	close_candev(net);</div><div class='add'>+</div><div class='add'>+	priv-&gt;force_quit = 1;</div><div class='add'>+	free_irq(spi-&gt;irq, priv);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;hi3110_lock);</div><div class='add'>+</div><div class='add'>+	/* Disable transmit, interrupts and clear flags */</div><div class='add'>+	hi3110_write(spi, HI3110_WRITE_CTRL1, 0x0);</div><div class='add'>+	hi3110_write(spi, HI3110_WRITE_INTE, 0x0);</div><div class='add'>+	hi3110_read(spi, HI3110_READ_INTF);</div><div class='add'>+</div><div class='add'>+	hi3110_clean(net);</div><div class='add'>+</div><div class='add'>+	hi3110_hw_sleep(spi);</div><div class='add'>+</div><div class='add'>+	hi3110_power_enable(priv-&gt;transceiver, 0);</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;hi3110_lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hi3110_tx_work_handler(struct work_struct *ws)</div><div class='add'>+{</div><div class='add'>+	struct hi3110_priv *priv = container_of(ws, struct hi3110_priv,</div><div class='add'>+						tx_work);</div><div class='add'>+	struct spi_device *spi = priv-&gt;spi;</div><div class='add'>+	struct net_device *net = priv-&gt;net;</div><div class='add'>+	struct can_frame *frame;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;hi3110_lock);</div><div class='add'>+	if (priv-&gt;tx_skb) {</div><div class='add'>+		if (priv-&gt;can.state == CAN_STATE_BUS_OFF) {</div><div class='add'>+			hi3110_clean(net);</div><div class='add'>+		} else {</div><div class='add'>+			frame = (struct can_frame *)priv-&gt;tx_skb-&gt;data;</div><div class='add'>+			hi3110_hw_tx(spi, frame);</div><div class='add'>+			priv-&gt;tx_busy = true;</div><div class='add'>+			can_put_echo_skb(priv-&gt;tx_skb, net, 0, 0);</div><div class='add'>+			priv-&gt;tx_skb = NULL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;hi3110_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hi3110_restart_work_handler(struct work_struct *ws)</div><div class='add'>+{</div><div class='add'>+	struct hi3110_priv *priv = container_of(ws, struct hi3110_priv,</div><div class='add'>+						restart_work);</div><div class='add'>+	struct spi_device *spi = priv-&gt;spi;</div><div class='add'>+	struct net_device *net = priv-&gt;net;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;hi3110_lock);</div><div class='add'>+	if (priv-&gt;after_suspend) {</div><div class='add'>+		hi3110_hw_reset(spi);</div><div class='add'>+		hi3110_setup(net);</div><div class='add'>+		if (priv-&gt;after_suspend &amp; HI3110_AFTER_SUSPEND_RESTART) {</div><div class='add'>+			hi3110_set_normal_mode(spi);</div><div class='add'>+		} else if (priv-&gt;after_suspend &amp; HI3110_AFTER_SUSPEND_UP) {</div><div class='add'>+			netif_device_attach(net);</div><div class='add'>+			hi3110_clean(net);</div><div class='add'>+			hi3110_set_normal_mode(spi);</div><div class='add'>+			netif_wake_queue(net);</div><div class='add'>+		} else {</div><div class='add'>+			hi3110_hw_sleep(spi);</div><div class='add'>+		}</div><div class='add'>+		priv-&gt;after_suspend = 0;</div><div class='add'>+		priv-&gt;force_quit = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;restart_tx) {</div><div class='add'>+		priv-&gt;restart_tx = 0;</div><div class='add'>+		hi3110_hw_reset(spi);</div><div class='add'>+		hi3110_setup(net);</div><div class='add'>+		hi3110_clean(net);</div><div class='add'>+		hi3110_set_normal_mode(spi);</div><div class='add'>+		netif_wake_queue(net);</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;hi3110_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t hi3110_can_ist(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct hi3110_priv *priv = dev_id;</div><div class='add'>+	struct spi_device *spi = priv-&gt;spi;</div><div class='add'>+	struct net_device *net = priv-&gt;net;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;hi3110_lock);</div><div class='add'>+</div><div class='add'>+	while (!priv-&gt;force_quit) {</div><div class='add'>+		enum can_state new_state;</div><div class='add'>+		u8 intf, eflag, statf;</div><div class='add'>+</div><div class='add'>+		while (!(HI3110_STAT_RXFMTY &amp;</div><div class='add'>+			 (statf = hi3110_read(spi, HI3110_READ_STATF)))) {</div><div class='add'>+			hi3110_hw_rx(spi);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		intf = hi3110_read(spi, HI3110_READ_INTF);</div><div class='add'>+		eflag = hi3110_read(spi, HI3110_READ_ERR);</div><div class='add'>+		/* Update can state */</div><div class='add'>+		if (eflag &amp; HI3110_ERR_BUSOFF)</div><div class='add'>+			new_state = CAN_STATE_BUS_OFF;</div><div class='add'>+		else if (eflag &amp; HI3110_ERR_PASSIVE_MASK)</div><div class='add'>+			new_state = CAN_STATE_ERROR_PASSIVE;</div><div class='add'>+		else if (statf &amp; HI3110_STAT_ERRW)</div><div class='add'>+			new_state = CAN_STATE_ERROR_WARNING;</div><div class='add'>+		else</div><div class='add'>+			new_state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+</div><div class='add'>+		if (new_state != priv-&gt;can.state) {</div><div class='add'>+			struct can_frame *cf;</div><div class='add'>+			struct sk_buff *skb;</div><div class='add'>+			enum can_state rx_state, tx_state;</div><div class='add'>+			u8 rxerr, txerr;</div><div class='add'>+</div><div class='add'>+			skb = alloc_can_err_skb(net, &amp;cf);</div><div class='add'>+</div><div class='add'>+			txerr = hi3110_read(spi, HI3110_READ_TEC);</div><div class='add'>+			rxerr = hi3110_read(spi, HI3110_READ_REC);</div><div class='add'>+			tx_state = txerr &gt;= rxerr ? new_state : 0;</div><div class='add'>+			rx_state = txerr &lt;= rxerr ? new_state : 0;</div><div class='add'>+			can_change_state(net, cf, tx_state, rx_state);</div><div class='add'>+</div><div class='add'>+			if (new_state == CAN_STATE_BUS_OFF) {</div><div class='add'>+				if (skb)</div><div class='add'>+					netif_rx(skb);</div><div class='add'>+				can_bus_off(net);</div><div class='add'>+				if (priv-&gt;can.restart_ms == 0) {</div><div class='add'>+					priv-&gt;force_quit = 1;</div><div class='add'>+					hi3110_hw_sleep(spi);</div><div class='add'>+					break;</div><div class='add'>+				}</div><div class='add'>+			} else if (skb) {</div><div class='add'>+				cf-&gt;can_id |= CAN_ERR_CNT;</div><div class='add'>+				cf-&gt;data[6] = txerr;</div><div class='add'>+				cf-&gt;data[7] = rxerr;</div><div class='add'>+				netif_rx(skb);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Update bus errors */</div><div class='add'>+		if ((intf &amp; HI3110_INT_BUSERR) &amp;&amp;</div><div class='add'>+		    (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING)) {</div><div class='add'>+			struct can_frame *cf;</div><div class='add'>+			struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+			/* Check for protocol errors */</div><div class='add'>+			if (eflag &amp; HI3110_ERR_PROTOCOL_MASK) {</div><div class='add'>+				skb = alloc_can_err_skb(net, &amp;cf);</div><div class='add'>+				if (skb)</div><div class='add'>+					cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='add'>+</div><div class='add'>+				priv-&gt;can.can_stats.bus_error++;</div><div class='add'>+				if (eflag &amp; HI3110_ERR_BITERR) {</div><div class='add'>+					priv-&gt;net-&gt;stats.tx_errors++;</div><div class='add'>+					if (skb)</div><div class='add'>+						cf-&gt;data[2] |= CAN_ERR_PROT_BIT;</div><div class='add'>+				} else if (eflag &amp; HI3110_ERR_FRMERR) {</div><div class='add'>+					priv-&gt;net-&gt;stats.rx_errors++;</div><div class='add'>+					if (skb)</div><div class='add'>+						cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='add'>+				} else if (eflag &amp; HI3110_ERR_STUFERR) {</div><div class='add'>+					priv-&gt;net-&gt;stats.rx_errors++;</div><div class='add'>+					if (skb)</div><div class='add'>+						cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='add'>+				} else if (eflag &amp; HI3110_ERR_CRCERR) {</div><div class='add'>+					priv-&gt;net-&gt;stats.rx_errors++;</div><div class='add'>+					if (skb)</div><div class='add'>+						cf-&gt;data[3] |= CAN_ERR_PROT_LOC_CRC_SEQ;</div><div class='add'>+				} else if (eflag &amp; HI3110_ERR_ACKERR) {</div><div class='add'>+					priv-&gt;net-&gt;stats.tx_errors++;</div><div class='add'>+					if (skb)</div><div class='add'>+						cf-&gt;data[3] |= CAN_ERR_PROT_LOC_ACK;</div><div class='add'>+				}</div><div class='add'>+</div><div class='add'>+				netdev_dbg(priv-&gt;net, "Bus Error\n");</div><div class='add'>+				if (skb) {</div><div class='add'>+					cf-&gt;data[6] = hi3110_read(spi, HI3110_READ_TEC);</div><div class='add'>+					cf-&gt;data[7] = hi3110_read(spi, HI3110_READ_REC);</div><div class='add'>+					netif_rx(skb);</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (priv-&gt;tx_busy &amp;&amp; statf &amp; HI3110_STAT_TXMTY) {</div><div class='add'>+			net-&gt;stats.tx_packets++;</div><div class='add'>+			net-&gt;stats.tx_bytes += can_get_echo_skb(net, 0, NULL);</div><div class='add'>+			priv-&gt;tx_busy = false;</div><div class='add'>+			netif_wake_queue(net);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (intf == 0)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;hi3110_lock);</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hi3110_open(struct net_device *net)</div><div class='add'>+{</div><div class='add'>+	struct hi3110_priv *priv = netdev_priv(net);</div><div class='add'>+	struct spi_device *spi = priv-&gt;spi;</div><div class='add'>+	unsigned long flags = IRQF_ONESHOT | IRQF_TRIGGER_HIGH;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = open_candev(net);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;hi3110_lock);</div><div class='add'>+	hi3110_power_enable(priv-&gt;transceiver, 1);</div><div class='add'>+</div><div class='add'>+	priv-&gt;force_quit = 0;</div><div class='add'>+	priv-&gt;tx_skb = NULL;</div><div class='add'>+	priv-&gt;tx_busy = false;</div><div class='add'>+</div><div class='add'>+	ret = request_threaded_irq(spi-&gt;irq, NULL, hi3110_can_ist,</div><div class='add'>+				   flags, DEVICE_NAME, priv);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;spi-&gt;dev, "failed to acquire irq %d\n", spi-&gt;irq);</div><div class='add'>+		goto out_close;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = hi3110_hw_reset(spi);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_free_irq;</div><div class='add'>+</div><div class='add'>+	ret = hi3110_setup(net);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_free_irq;</div><div class='add'>+</div><div class='add'>+	ret = hi3110_set_normal_mode(spi);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_free_irq;</div><div class='add'>+</div><div class='add'>+	netif_wake_queue(net);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;hi3110_lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+ out_free_irq:</div><div class='add'>+	free_irq(spi-&gt;irq, priv);</div><div class='add'>+	hi3110_hw_sleep(spi);</div><div class='add'>+ out_close:</div><div class='add'>+	hi3110_power_enable(priv-&gt;transceiver, 0);</div><div class='add'>+	close_candev(net);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;hi3110_lock);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops hi3110_netdev_ops = {</div><div class='add'>+	.ndo_open = hi3110_open,</div><div class='add'>+	.ndo_stop = hi3110_stop,</div><div class='add'>+	.ndo_start_xmit = hi3110_hard_start_xmit,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops hi3110_ethtool_ops = {</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct of_device_id hi3110_of_match[] = {</div><div class='add'>+	{</div><div class='add'>+		.compatible	= "holt,hi3110",</div><div class='add'>+		.data		= (void *)CAN_HI3110_HI3110,</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, hi3110_of_match);</div><div class='add'>+</div><div class='add'>+static const struct spi_device_id hi3110_id_table[] = {</div><div class='add'>+	{</div><div class='add'>+		.name		= "hi3110",</div><div class='add'>+		.driver_data	= (kernel_ulong_t)CAN_HI3110_HI3110,</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(spi, hi3110_id_table);</div><div class='add'>+</div><div class='add'>+static int hi3110_can_probe(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;spi-&gt;dev;</div><div class='add'>+	struct net_device *net;</div><div class='add'>+	struct hi3110_priv *priv;</div><div class='add'>+	struct clk *clk;</div><div class='add'>+	u32 freq;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	clk = devm_clk_get_optional(&amp;spi-&gt;dev, NULL);</div><div class='add'>+	if (IS_ERR(clk))</div><div class='add'>+		return dev_err_probe(dev, PTR_ERR(clk), "no CAN clock source defined\n");</div><div class='add'>+</div><div class='add'>+	if (clk) {</div><div class='add'>+		freq = clk_get_rate(clk);</div><div class='add'>+	} else {</div><div class='add'>+		ret = device_property_read_u32(dev, "clock-frequency", &amp;freq);</div><div class='add'>+		if (ret)</div><div class='add'>+			return dev_err_probe(dev, ret, "Failed to get clock-frequency!\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Sanity check */</div><div class='add'>+	if (freq &gt; 40000000)</div><div class='add'>+		return -ERANGE;</div><div class='add'>+</div><div class='add'>+	/* Allocate can/net device */</div><div class='add'>+	net = alloc_candev(sizeof(struct hi3110_priv), HI3110_TX_ECHO_SKB_MAX);</div><div class='add'>+	if (!net)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ret = clk_prepare_enable(clk);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_free;</div><div class='add'>+</div><div class='add'>+	net-&gt;netdev_ops = &amp;hi3110_netdev_ops;</div><div class='add'>+	net-&gt;ethtool_ops = &amp;hi3110_ethtool_ops;</div><div class='add'>+	net-&gt;flags |= IFF_ECHO;</div><div class='add'>+</div><div class='add'>+	priv = netdev_priv(net);</div><div class='add'>+	priv-&gt;can.bittiming_const = &amp;hi3110_bittiming_const;</div><div class='add'>+	priv-&gt;can.do_set_mode = hi3110_do_set_mode;</div><div class='add'>+	priv-&gt;can.do_get_berr_counter = hi3110_get_berr_counter;</div><div class='add'>+	priv-&gt;can.clock.freq = freq / 2;</div><div class='add'>+	priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES |</div><div class='add'>+		CAN_CTRLMODE_LOOPBACK |</div><div class='add'>+		CAN_CTRLMODE_LISTENONLY |</div><div class='add'>+		CAN_CTRLMODE_BERR_REPORTING;</div><div class='add'>+</div><div class='add'>+	priv-&gt;model = (enum hi3110_model)(uintptr_t)spi_get_device_match_data(spi);</div><div class='add'>+	priv-&gt;net = net;</div><div class='add'>+	priv-&gt;clk = clk;</div><div class='add'>+</div><div class='add'>+	spi_set_drvdata(spi, priv);</div><div class='add'>+</div><div class='add'>+	/* Configure the SPI bus */</div><div class='add'>+	spi-&gt;bits_per_word = 8;</div><div class='add'>+	ret = spi_setup(spi);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_clk;</div><div class='add'>+</div><div class='add'>+	priv-&gt;power = devm_regulator_get_optional(&amp;spi-&gt;dev, "vdd");</div><div class='add'>+	priv-&gt;transceiver = devm_regulator_get_optional(&amp;spi-&gt;dev, "xceiver");</div><div class='add'>+	if ((PTR_ERR(priv-&gt;power) == -EPROBE_DEFER) ||</div><div class='add'>+	    (PTR_ERR(priv-&gt;transceiver) == -EPROBE_DEFER)) {</div><div class='add'>+		ret = -EPROBE_DEFER;</div><div class='add'>+		goto out_clk;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = hi3110_power_enable(priv-&gt;power, 1);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_clk;</div><div class='add'>+</div><div class='add'>+	priv-&gt;wq = alloc_workqueue("hi3110_wq",</div><div class='add'>+				   WQ_FREEZABLE | WQ_MEM_RECLAIM | WQ_PERCPU,</div><div class='add'>+				   0);</div><div class='add'>+	if (!priv-&gt;wq) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto out_clk;</div><div class='add'>+	}</div><div class='add'>+	INIT_WORK(&amp;priv-&gt;tx_work, hi3110_tx_work_handler);</div><div class='add'>+	INIT_WORK(&amp;priv-&gt;restart_work, hi3110_restart_work_handler);</div><div class='add'>+</div><div class='add'>+	priv-&gt;spi = spi;</div><div class='add'>+	mutex_init(&amp;priv-&gt;hi3110_lock);</div><div class='add'>+</div><div class='add'>+	priv-&gt;spi_tx_buf = devm_kzalloc(&amp;spi-&gt;dev, HI3110_RX_BUF_LEN,</div><div class='add'>+					GFP_KERNEL);</div><div class='add'>+	if (!priv-&gt;spi_tx_buf) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto error_probe;</div><div class='add'>+	}</div><div class='add'>+	priv-&gt;spi_rx_buf = devm_kzalloc(&amp;spi-&gt;dev, HI3110_RX_BUF_LEN,</div><div class='add'>+					GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;spi_rx_buf) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto error_probe;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	SET_NETDEV_DEV(net, &amp;spi-&gt;dev);</div><div class='add'>+</div><div class='add'>+	ret = hi3110_hw_probe(spi);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err_probe(dev, ret, "Cannot initialize %x. Wrong wiring?\n", priv-&gt;model);</div><div class='add'>+		goto error_probe;</div><div class='add'>+	}</div><div class='add'>+	hi3110_hw_sleep(spi);</div><div class='add'>+</div><div class='add'>+	ret = register_candev(net);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error_probe;</div><div class='add'>+</div><div class='add'>+	netdev_info(net, "%x successfully initialized.\n", priv-&gt;model);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+ error_probe:</div><div class='add'>+	destroy_workqueue(priv-&gt;wq);</div><div class='add'>+	priv-&gt;wq = NULL;</div><div class='add'>+	hi3110_power_enable(priv-&gt;power, 0);</div><div class='add'>+</div><div class='add'>+ out_clk:</div><div class='add'>+	clk_disable_unprepare(clk);</div><div class='add'>+</div><div class='add'>+ out_free:</div><div class='add'>+	free_candev(net);</div><div class='add'>+</div><div class='add'>+	return dev_err_probe(dev, ret, "Probe failed\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hi3110_can_remove(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+	struct hi3110_priv *priv = spi_get_drvdata(spi);</div><div class='add'>+	struct net_device *net = priv-&gt;net;</div><div class='add'>+</div><div class='add'>+	unregister_candev(net);</div><div class='add'>+</div><div class='add'>+	hi3110_power_enable(priv-&gt;power, 0);</div><div class='add'>+</div><div class='add'>+	destroy_workqueue(priv-&gt;wq);</div><div class='add'>+	priv-&gt;wq = NULL;</div><div class='add'>+</div><div class='add'>+	clk_disable_unprepare(priv-&gt;clk);</div><div class='add'>+</div><div class='add'>+	free_candev(net);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __maybe_unused hi3110_can_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct spi_device *spi = to_spi_device(dev);</div><div class='add'>+	struct hi3110_priv *priv = spi_get_drvdata(spi);</div><div class='add'>+	struct net_device *net = priv-&gt;net;</div><div class='add'>+</div><div class='add'>+	priv-&gt;force_quit = 1;</div><div class='add'>+	disable_irq(spi-&gt;irq);</div><div class='add'>+</div><div class='add'>+	/* Note: at this point neither IST nor workqueues are running.</div><div class='add'>+	 * open/stop cannot be called anyway so locking is not needed</div><div class='add'>+	 */</div><div class='add'>+	if (netif_running(net)) {</div><div class='add'>+		netif_device_detach(net);</div><div class='add'>+</div><div class='add'>+		hi3110_hw_sleep(spi);</div><div class='add'>+		hi3110_power_enable(priv-&gt;transceiver, 0);</div><div class='add'>+		priv-&gt;after_suspend = HI3110_AFTER_SUSPEND_UP;</div><div class='add'>+	} else {</div><div class='add'>+		priv-&gt;after_suspend = HI3110_AFTER_SUSPEND_DOWN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!IS_ERR_OR_NULL(priv-&gt;power)) {</div><div class='add'>+		regulator_disable(priv-&gt;power);</div><div class='add'>+		priv-&gt;after_suspend |= HI3110_AFTER_SUSPEND_POWER;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __maybe_unused hi3110_can_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct spi_device *spi = to_spi_device(dev);</div><div class='add'>+	struct hi3110_priv *priv = spi_get_drvdata(spi);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;after_suspend &amp; HI3110_AFTER_SUSPEND_POWER)</div><div class='add'>+		hi3110_power_enable(priv-&gt;power, 1);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;after_suspend &amp; HI3110_AFTER_SUSPEND_UP) {</div><div class='add'>+		hi3110_power_enable(priv-&gt;transceiver, 1);</div><div class='add'>+		queue_work(priv-&gt;wq, &amp;priv-&gt;restart_work);</div><div class='add'>+	} else {</div><div class='add'>+		priv-&gt;after_suspend = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;force_quit = 0;</div><div class='add'>+	enable_irq(spi-&gt;irq);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static SIMPLE_DEV_PM_OPS(hi3110_can_pm_ops, hi3110_can_suspend, hi3110_can_resume);</div><div class='add'>+</div><div class='add'>+static struct spi_driver hi3110_can_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = DEVICE_NAME,</div><div class='add'>+		.of_match_table = hi3110_of_match,</div><div class='add'>+		.pm = &amp;hi3110_can_pm_ops,</div><div class='add'>+	},</div><div class='add'>+	.id_table = hi3110_id_table,</div><div class='add'>+	.probe = hi3110_can_probe,</div><div class='add'>+	.remove = hi3110_can_remove,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_spi_driver(hi3110_can_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Akshay Bhat &lt;akshay.bhat@timesys.com&gt;");</div><div class='add'>+MODULE_AUTHOR("Casey Fitzpatrick &lt;casey.fitzpatrick@timesys.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Holt HI-3110 CAN driver");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/net/can/spi/mcp251x.c b/drivers/net/can/spi/mcp251x.c<br/>index b7e83c212023..fa97adf25b73 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/mcp251x.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/spi/mcp251x.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/mcp251x.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/spi/mcp251x.c</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='del'>-/*</div><div class='del'>- * CAN bus driver for Microchip 251x CAN Controller with SPI Interface</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* CAN bus driver for Microchip 251x/25625 CAN Controller with SPI Interface</div><div class='ctx'>  *</div><div class='ctx'>  * MCP2510 support and bug fixes by Christian Pellegrin</div><div class='ctx'>  * &lt;chripell@evolware.org&gt;</div><div class='hunk'>@@ -17,65 +17,30 @@</div><div class='ctx'>  * - Sascha Hauer, Marc Kleine-Budde, Pengutronix</div><div class='ctx'>  * - Simon Kallweit, intefo AG</div><div class='ctx'>  * Copyright 2007</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the version 2 of the GNU General Public License</div><div class='del'>- * as published by the Free Software Foundation</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- * Your platform definition file should specify something like:</div><div class='del'>- *</div><div class='del'>- * static struct mcp251x_platform_data mcp251x_info = {</div><div class='del'>- *         .oscillator_frequency = 8000000,</div><div class='del'>- * };</div><div class='del'>- *</div><div class='del'>- * static struct spi_board_info spi_board_info[] = {</div><div class='del'>- *         {</div><div class='del'>- *                 .modalias = "mcp2510",</div><div class='del'>- *			// or "mcp2515" depending on your controller</div><div class='del'>- *                 .platform_data = &amp;mcp251x_info,</div><div class='del'>- *                 .irq = IRQ_EINT13,</div><div class='del'>- *                 .max_speed_hz = 2*1000*1000,</div><div class='del'>- *                 .chip_select = 2,</div><div class='del'>- *         },</div><div class='del'>- * };</div><div class='del'>- *</div><div class='del'>- * Please see mcp251x.h for a description of the fields in</div><div class='del'>- * struct mcp251x_platform_data.</div><div class='del'>- *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='ctx'> #include &lt;linux/can/core.h&gt;</div><div class='ctx'> #include &lt;linux/can/dev.h&gt;</div><div class='del'>-#include &lt;linux/can/led.h&gt;</div><div class='del'>-#include &lt;linux/can/platform/mcp251x.h&gt;</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/completion.h&gt;</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='del'>-#include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='ctx'> #include &lt;linux/freezer.h&gt;</div><div class='add'>+#include &lt;linux/gpio/driver.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/iopoll.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/of.h&gt;</div><div class='del'>-#include &lt;linux/of_device.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/property.h&gt;</div><div class='add'>+#include &lt;linux/regulator/consumer.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/spi/spi.h&gt;</div><div class='ctx'> #include &lt;linux/uaccess.h&gt;</div><div class='del'>-#include &lt;linux/regulator/consumer.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* SPI interface instruction set */</div><div class='ctx'> #define INSTRUCTION_WRITE	0x02</div><div class='hunk'>@@ -89,8 +54,31 @@</div><div class='ctx'> #define RTS_TXB2		0x04</div><div class='ctx'> #define INSTRUCTION_RTS(n)	(0x80 | ((n) &amp; 0x07))</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> /* MPC251x registers */</div><div class='add'>+#define BFPCTRL			0x0c</div><div class='add'>+#  define BFPCTRL_B0BFM		BIT(0)</div><div class='add'>+#  define BFPCTRL_B1BFM		BIT(1)</div><div class='add'>+#  define BFPCTRL_BFM(n)	(BFPCTRL_B0BFM &lt;&lt; (n))</div><div class='add'>+#  define BFPCTRL_BFM_MASK	GENMASK(1, 0)</div><div class='add'>+#  define BFPCTRL_B0BFE		BIT(2)</div><div class='add'>+#  define BFPCTRL_B1BFE		BIT(3)</div><div class='add'>+#  define BFPCTRL_BFE(n)	(BFPCTRL_B0BFE &lt;&lt; (n))</div><div class='add'>+#  define BFPCTRL_BFE_MASK	GENMASK(3, 2)</div><div class='add'>+#  define BFPCTRL_B0BFS		BIT(4)</div><div class='add'>+#  define BFPCTRL_B1BFS		BIT(5)</div><div class='add'>+#  define BFPCTRL_BFS(n)	(BFPCTRL_B0BFS &lt;&lt; (n))</div><div class='add'>+#  define BFPCTRL_BFS_MASK	GENMASK(5, 4)</div><div class='add'>+#define TXRTSCTRL		0x0d</div><div class='add'>+#  define TXRTSCTRL_B0RTSM	BIT(0)</div><div class='add'>+#  define TXRTSCTRL_B1RTSM	BIT(1)</div><div class='add'>+#  define TXRTSCTRL_B2RTSM	BIT(2)</div><div class='add'>+#  define TXRTSCTRL_RTSM(n)	(TXRTSCTRL_B0RTSM &lt;&lt; (n))</div><div class='add'>+#  define TXRTSCTRL_RTSM_MASK	GENMASK(2, 0)</div><div class='add'>+#  define TXRTSCTRL_B0RTS	BIT(3)</div><div class='add'>+#  define TXRTSCTRL_B1RTS	BIT(4)</div><div class='add'>+#  define TXRTSCTRL_B2RTS	BIT(5)</div><div class='add'>+#  define TXRTSCTRL_RTS(n)	(TXRTSCTRL_B0RTS &lt;&lt; (n))</div><div class='add'>+#  define TXRTSCTRL_RTS_MASK	GENMASK(5, 3)</div><div class='ctx'> #define CANSTAT	      0x0e</div><div class='ctx'> #define CANCTRL	      0x0f</div><div class='ctx'> #  define CANCTRL_REQOP_MASK	    0xe0</div><div class='hunk'>@@ -205,8 +193,7 @@</div><div class='ctx'> #define SET_BYTE(val, byte)			\</div><div class='ctx'> 	(((val) &amp; 0xff) &lt;&lt; ((byte) * 8))</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Buffer size required for the largest SPI transfer (i.e., reading a</div><div class='add'>+/* Buffer size required for the largest SPI transfer (i.e., reading a</div><div class='ctx'>  * frame)</div><div class='ctx'>  */</div><div class='ctx'> #define CAN_FRAME_MAX_DATA_LEN	8</div><div class='hunk'>@@ -219,10 +206,6 @@</div><div class='ctx'> </div><div class='ctx'> #define DEVICE_NAME "mcp251x"</div><div class='ctx'> </div><div class='del'>-static int mcp251x_enable_dma; /* Enable SPI DMA. Default: 0 (Off) */</div><div class='del'>-module_param(mcp251x_enable_dma, int, S_IRUGO);</div><div class='del'>-MODULE_PARM_DESC(mcp251x_enable_dma, "Enable SPI DMA. Default: 0 (Off)");</div><div class='del'>-</div><div class='ctx'> static const struct can_bittiming_const mcp251x_bittiming_const = {</div><div class='ctx'> 	.name = DEVICE_NAME,</div><div class='ctx'> 	.tseg1_min = 3,</div><div class='hunk'>@@ -238,6 +221,7 @@ static const struct can_bittiming_const mcp251x_bittiming_const = {</div><div class='ctx'> enum mcp251x_model {</div><div class='ctx'> 	CAN_MCP251X_MCP2510	= 0x2510,</div><div class='ctx'> 	CAN_MCP251X_MCP2515	= 0x2515,</div><div class='add'>+	CAN_MCP251X_MCP25625	= 0x25625,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct mcp251x_priv {</div><div class='hunk'>@@ -250,11 +234,8 @@ struct mcp251x_priv {</div><div class='ctx'> </div><div class='ctx'> 	u8 *spi_tx_buf;</div><div class='ctx'> 	u8 *spi_rx_buf;</div><div class='del'>-	dma_addr_t spi_tx_dma;</div><div class='del'>-	dma_addr_t spi_rx_dma;</div><div class='ctx'> </div><div class='ctx'> 	struct sk_buff *tx_skb;</div><div class='del'>-	int tx_len;</div><div class='ctx'> </div><div class='ctx'> 	struct workqueue_struct *wq;</div><div class='ctx'> 	struct work_struct tx_work;</div><div class='hunk'>@@ -267,9 +248,15 @@ struct mcp251x_priv {</div><div class='ctx'> #define AFTER_SUSPEND_POWER 4</div><div class='ctx'> #define AFTER_SUSPEND_RESTART 8</div><div class='ctx'> 	int restart_tx;</div><div class='add'>+	bool tx_busy;</div><div class='add'>+</div><div class='ctx'> 	struct regulator *power;</div><div class='ctx'> 	struct regulator *transceiver;</div><div class='ctx'> 	struct clk *clk;</div><div class='add'>+#ifdef CONFIG_GPIOLIB</div><div class='add'>+	struct gpio_chip gpio;</div><div class='add'>+	u8 reg_bfpctrl;</div><div class='add'>+#endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define MCP251X_IS(_model) \</div><div class='hunk'>@@ -280,24 +267,21 @@ static inline int mcp251x_is_##_model(struct spi_device *spi) \</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> MCP251X_IS(2510);</div><div class='del'>-MCP251X_IS(2515);</div><div class='ctx'> </div><div class='ctx'> static void mcp251x_clean(struct net_device *net)</div><div class='ctx'> {</div><div class='ctx'> 	struct mcp251x_priv *priv = netdev_priv(net);</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;tx_skb || priv-&gt;tx_len)</div><div class='add'>+	if (priv-&gt;tx_skb || priv-&gt;tx_busy)</div><div class='ctx'> 		net-&gt;stats.tx_errors++;</div><div class='del'>-	if (priv-&gt;tx_skb)</div><div class='del'>-		dev_kfree_skb(priv-&gt;tx_skb);</div><div class='del'>-	if (priv-&gt;tx_len)</div><div class='del'>-		can_free_echo_skb(priv-&gt;net, 0);</div><div class='add'>+	dev_kfree_skb(priv-&gt;tx_skb);</div><div class='add'>+	if (priv-&gt;tx_busy)</div><div class='add'>+		can_free_echo_skb(priv-&gt;net, 0, NULL);</div><div class='ctx'> 	priv-&gt;tx_skb = NULL;</div><div class='del'>-	priv-&gt;tx_len = 0;</div><div class='add'>+	priv-&gt;tx_busy = false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Note about handling of error return of mcp251x_spi_trans: accessing</div><div class='add'>+/* Note about handling of error return of mcp251x_spi_trans: accessing</div><div class='ctx'>  * registers via SPI is not really different conceptually than using</div><div class='ctx'>  * normal I/O assembler instructions, although it's much more</div><div class='ctx'>  * complicated from a practical POV. So it's not advisable to always</div><div class='hunk'>@@ -322,13 +306,6 @@ static int mcp251x_spi_trans(struct spi_device *spi, int len)</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	spi_message_init(&amp;m);</div><div class='del'>-</div><div class='del'>-	if (mcp251x_enable_dma) {</div><div class='del'>-		t.tx_dma = priv-&gt;spi_tx_dma;</div><div class='del'>-		t.rx_dma = priv-&gt;spi_rx_dma;</div><div class='del'>-		m.is_dma_mapped = 1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	spi_message_add_tail(&amp;t, &amp;m);</div><div class='ctx'> </div><div class='ctx'> 	ret = spi_sync(spi, &amp;m);</div><div class='hunk'>@@ -337,7 +314,19 @@ static int mcp251x_spi_trans(struct spi_device *spi, int len)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u8 mcp251x_read_reg(struct spi_device *spi, uint8_t reg)</div><div class='add'>+static int mcp251x_spi_write(struct spi_device *spi, int len)</div><div class='add'>+{</div><div class='add'>+	struct mcp251x_priv *priv = spi_get_drvdata(spi);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = spi_write(spi, priv-&gt;spi_tx_buf, len);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(&amp;spi-&gt;dev, "spi write failed: ret = %d\n", ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 mcp251x_read_reg(struct spi_device *spi, u8 reg)</div><div class='ctx'> {</div><div class='ctx'> 	struct mcp251x_priv *priv = spi_get_drvdata(spi);</div><div class='ctx'> 	u8 val = 0;</div><div class='hunk'>@@ -345,27 +334,38 @@ static u8 mcp251x_read_reg(struct spi_device *spi, uint8_t reg)</div><div class='ctx'> 	priv-&gt;spi_tx_buf[0] = INSTRUCTION_READ;</div><div class='ctx'> 	priv-&gt;spi_tx_buf[1] = reg;</div><div class='ctx'> </div><div class='del'>-	mcp251x_spi_trans(spi, 3);</div><div class='del'>-	val = priv-&gt;spi_rx_buf[2];</div><div class='add'>+	if (spi-&gt;controller-&gt;flags &amp; SPI_CONTROLLER_HALF_DUPLEX) {</div><div class='add'>+		spi_write_then_read(spi, priv-&gt;spi_tx_buf, 2, &amp;val, 1);</div><div class='add'>+	} else {</div><div class='add'>+		mcp251x_spi_trans(spi, 3);</div><div class='add'>+		val = priv-&gt;spi_rx_buf[2];</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return val;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mcp251x_read_2regs(struct spi_device *spi, uint8_t reg,</div><div class='del'>-		uint8_t *v1, uint8_t *v2)</div><div class='add'>+static void mcp251x_read_2regs(struct spi_device *spi, u8 reg, u8 *v1, u8 *v2)</div><div class='ctx'> {</div><div class='ctx'> 	struct mcp251x_priv *priv = spi_get_drvdata(spi);</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;spi_tx_buf[0] = INSTRUCTION_READ;</div><div class='ctx'> 	priv-&gt;spi_tx_buf[1] = reg;</div><div class='ctx'> </div><div class='del'>-	mcp251x_spi_trans(spi, 4);</div><div class='add'>+	if (spi-&gt;controller-&gt;flags &amp; SPI_CONTROLLER_HALF_DUPLEX) {</div><div class='add'>+		u8 val[2] = { 0 };</div><div class='add'>+</div><div class='add'>+		spi_write_then_read(spi, priv-&gt;spi_tx_buf, 2, val, 2);</div><div class='add'>+		*v1 = val[0];</div><div class='add'>+		*v2 = val[1];</div><div class='add'>+	} else {</div><div class='add'>+		mcp251x_spi_trans(spi, 4);</div><div class='ctx'> </div><div class='del'>-	*v1 = priv-&gt;spi_rx_buf[2];</div><div class='del'>-	*v2 = priv-&gt;spi_rx_buf[3];</div><div class='add'>+		*v1 = priv-&gt;spi_rx_buf[2];</div><div class='add'>+		*v2 = priv-&gt;spi_rx_buf[3];</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mcp251x_write_reg(struct spi_device *spi, u8 reg, uint8_t val)</div><div class='add'>+static void mcp251x_write_reg(struct spi_device *spi, u8 reg, u8 val)</div><div class='ctx'> {</div><div class='ctx'> 	struct mcp251x_priv *priv = spi_get_drvdata(spi);</div><div class='ctx'> </div><div class='hunk'>@@ -373,11 +373,23 @@ static void mcp251x_write_reg(struct spi_device *spi, u8 reg, uint8_t val)</div><div class='ctx'> 	priv-&gt;spi_tx_buf[1] = reg;</div><div class='ctx'> 	priv-&gt;spi_tx_buf[2] = val;</div><div class='ctx'> </div><div class='del'>-	mcp251x_spi_trans(spi, 3);</div><div class='add'>+	mcp251x_spi_write(spi, 3);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mcp251x_write_2regs(struct spi_device *spi, u8 reg, u8 v1, u8 v2)</div><div class='add'>+{</div><div class='add'>+	struct mcp251x_priv *priv = spi_get_drvdata(spi);</div><div class='add'>+</div><div class='add'>+	priv-&gt;spi_tx_buf[0] = INSTRUCTION_WRITE;</div><div class='add'>+	priv-&gt;spi_tx_buf[1] = reg;</div><div class='add'>+	priv-&gt;spi_tx_buf[2] = v1;</div><div class='add'>+	priv-&gt;spi_tx_buf[3] = v2;</div><div class='add'>+</div><div class='add'>+	mcp251x_spi_write(spi, 4);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mcp251x_write_bits(struct spi_device *spi, u8 reg,</div><div class='del'>-			       u8 mask, uint8_t val)</div><div class='add'>+static int mcp251x_write_bits(struct spi_device *spi, u8 reg,</div><div class='add'>+			      u8 mask, u8 val)</div><div class='ctx'> {</div><div class='ctx'> 	struct mcp251x_priv *priv = spi_get_drvdata(spi);</div><div class='ctx'> </div><div class='hunk'>@@ -386,9 +398,235 @@ static void mcp251x_write_bits(struct spi_device *spi, u8 reg,</div><div class='ctx'> 	priv-&gt;spi_tx_buf[2] = mask;</div><div class='ctx'> 	priv-&gt;spi_tx_buf[3] = val;</div><div class='ctx'> </div><div class='del'>-	mcp251x_spi_trans(spi, 4);</div><div class='add'>+	return mcp251x_spi_write(spi, 4);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 mcp251x_read_stat(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+	return mcp251x_read_reg(spi, CANSTAT) &amp; CANCTRL_REQOP_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define mcp251x_read_stat_poll_timeout(addr, val, cond, delay_us, timeout_us) \</div><div class='add'>+	readx_poll_timeout(mcp251x_read_stat, addr, val, cond, \</div><div class='add'>+			   delay_us, timeout_us)</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_GPIOLIB</div><div class='add'>+enum {</div><div class='add'>+	MCP251X_GPIO_TX0RTS = 0,		/* inputs */</div><div class='add'>+	MCP251X_GPIO_TX1RTS,</div><div class='add'>+	MCP251X_GPIO_TX2RTS,</div><div class='add'>+	MCP251X_GPIO_RX0BF,			/* outputs */</div><div class='add'>+	MCP251X_GPIO_RX1BF,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define MCP251X_GPIO_INPUT_MASK \</div><div class='add'>+	GENMASK(MCP251X_GPIO_TX2RTS, MCP251X_GPIO_TX0RTS)</div><div class='add'>+#define MCP251X_GPIO_OUTPUT_MASK \</div><div class='add'>+	GENMASK(MCP251X_GPIO_RX1BF, MCP251X_GPIO_RX0BF)</div><div class='add'>+</div><div class='add'>+static const char * const mcp251x_gpio_names[] = {</div><div class='add'>+	[MCP251X_GPIO_TX0RTS] = "TX0RTS",	/* inputs */</div><div class='add'>+	[MCP251X_GPIO_TX1RTS] = "TX1RTS",</div><div class='add'>+	[MCP251X_GPIO_TX2RTS] = "TX2RTS",</div><div class='add'>+	[MCP251X_GPIO_RX0BF] = "RX0BF",		/* outputs */</div><div class='add'>+	[MCP251X_GPIO_RX1BF] = "RX1BF",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline bool mcp251x_gpio_is_input(unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	return offset &lt;= MCP251X_GPIO_TX2RTS;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int mcp251x_gpio_request(struct gpio_chip *chip,</div><div class='add'>+				unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	struct mcp251x_priv *priv = gpiochip_get_data(chip);</div><div class='add'>+	int ret;</div><div class='add'>+	u8 val;</div><div class='add'>+</div><div class='add'>+	/* nothing to be done for inputs */</div><div class='add'>+	if (mcp251x_gpio_is_input(offset))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	val = BFPCTRL_BFE(offset - MCP251X_GPIO_RX0BF);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;mcp_lock);</div><div class='add'>+	ret = mcp251x_write_bits(priv-&gt;spi, BFPCTRL, val, val);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;mcp_lock);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	priv-&gt;reg_bfpctrl |= val;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mcp251x_gpio_free(struct gpio_chip *chip,</div><div class='add'>+			      unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	struct mcp251x_priv *priv = gpiochip_get_data(chip);</div><div class='add'>+	u8 val;</div><div class='add'>+</div><div class='add'>+	/* nothing to be done for inputs */</div><div class='add'>+	if (mcp251x_gpio_is_input(offset))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	val = BFPCTRL_BFE(offset - MCP251X_GPIO_RX0BF);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;mcp_lock);</div><div class='add'>+	mcp251x_write_bits(priv-&gt;spi, BFPCTRL, val, 0);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;mcp_lock);</div><div class='add'>+</div><div class='add'>+	priv-&gt;reg_bfpctrl &amp;= ~val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251x_gpio_get_direction(struct gpio_chip *chip,</div><div class='add'>+				      unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	if (mcp251x_gpio_is_input(offset))</div><div class='add'>+		return GPIO_LINE_DIRECTION_IN;</div><div class='add'>+</div><div class='add'>+	return GPIO_LINE_DIRECTION_OUT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251x_gpio_get(struct gpio_chip *chip, unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	struct mcp251x_priv *priv = gpiochip_get_data(chip);</div><div class='add'>+	u8 reg, mask, val;</div><div class='add'>+</div><div class='add'>+	if (mcp251x_gpio_is_input(offset)) {</div><div class='add'>+		reg = TXRTSCTRL;</div><div class='add'>+		mask = TXRTSCTRL_RTS(offset);</div><div class='add'>+	} else {</div><div class='add'>+		reg = BFPCTRL;</div><div class='add'>+		mask = BFPCTRL_BFS(offset - MCP251X_GPIO_RX0BF);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;mcp_lock);</div><div class='add'>+	val = mcp251x_read_reg(priv-&gt;spi, reg);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;mcp_lock);</div><div class='add'>+</div><div class='add'>+	return !!(val &amp; mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251x_gpio_get_multiple(struct gpio_chip *chip,</div><div class='add'>+				     unsigned long *maskp, unsigned long *bitsp)</div><div class='add'>+{</div><div class='add'>+	struct mcp251x_priv *priv = gpiochip_get_data(chip);</div><div class='add'>+	unsigned long bits = 0;</div><div class='add'>+	u8 val;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;mcp_lock);</div><div class='add'>+	if (maskp[0] &amp; MCP251X_GPIO_INPUT_MASK) {</div><div class='add'>+		val = mcp251x_read_reg(priv-&gt;spi, TXRTSCTRL);</div><div class='add'>+		val = FIELD_GET(TXRTSCTRL_RTS_MASK, val);</div><div class='add'>+		bits |= FIELD_PREP(MCP251X_GPIO_INPUT_MASK, val);</div><div class='add'>+	}</div><div class='add'>+	if (maskp[0] &amp; MCP251X_GPIO_OUTPUT_MASK) {</div><div class='add'>+		val = mcp251x_read_reg(priv-&gt;spi, BFPCTRL);</div><div class='add'>+		val = FIELD_GET(BFPCTRL_BFS_MASK, val);</div><div class='add'>+		bits |= FIELD_PREP(MCP251X_GPIO_OUTPUT_MASK, val);</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;mcp_lock);</div><div class='add'>+</div><div class='add'>+	bitsp[0] = bits;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251x_gpio_set(struct gpio_chip *chip, unsigned int offset,</div><div class='add'>+			    int value)</div><div class='add'>+{</div><div class='add'>+	struct mcp251x_priv *priv = gpiochip_get_data(chip);</div><div class='add'>+	u8 mask, val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mask = BFPCTRL_BFS(offset - MCP251X_GPIO_RX0BF);</div><div class='add'>+	val = value ? mask : 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;mcp_lock);</div><div class='add'>+	ret = mcp251x_write_bits(priv-&gt;spi, BFPCTRL, mask, val);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;mcp_lock);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	priv-&gt;reg_bfpctrl &amp;= ~mask;</div><div class='add'>+	priv-&gt;reg_bfpctrl |= val;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mcp251x_gpio_set_multiple(struct gpio_chip *chip,</div><div class='add'>+			  unsigned long *maskp, unsigned long *bitsp)</div><div class='add'>+{</div><div class='add'>+	struct mcp251x_priv *priv = gpiochip_get_data(chip);</div><div class='add'>+	u8 mask, val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mask = FIELD_GET(MCP251X_GPIO_OUTPUT_MASK, maskp[0]);</div><div class='add'>+	mask = FIELD_PREP(BFPCTRL_BFS_MASK, mask);</div><div class='add'>+</div><div class='add'>+	val = FIELD_GET(MCP251X_GPIO_OUTPUT_MASK, bitsp[0]);</div><div class='add'>+	val = FIELD_PREP(BFPCTRL_BFS_MASK, val);</div><div class='add'>+</div><div class='add'>+	if (!mask)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;mcp_lock);</div><div class='add'>+	ret = mcp251x_write_bits(priv-&gt;spi, BFPCTRL, mask, val);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;mcp_lock);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	priv-&gt;reg_bfpctrl &amp;= ~mask;</div><div class='add'>+	priv-&gt;reg_bfpctrl |= val;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mcp251x_gpio_restore(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+	struct mcp251x_priv *priv = spi_get_drvdata(spi);</div><div class='add'>+</div><div class='add'>+	mcp251x_write_reg(spi, BFPCTRL, priv-&gt;reg_bfpctrl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251x_gpio_setup(struct mcp251x_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct gpio_chip *gpio = &amp;priv-&gt;gpio;</div><div class='add'>+</div><div class='add'>+	if (!device_property_present(&amp;priv-&gt;spi-&gt;dev, "gpio-controller"))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* gpiochip handles TX[0..2]RTS and RX[0..1]BF */</div><div class='add'>+	gpio-&gt;label = priv-&gt;spi-&gt;modalias;</div><div class='add'>+	gpio-&gt;parent = &amp;priv-&gt;spi-&gt;dev;</div><div class='add'>+	gpio-&gt;owner = THIS_MODULE;</div><div class='add'>+	gpio-&gt;request = mcp251x_gpio_request;</div><div class='add'>+	gpio-&gt;free = mcp251x_gpio_free;</div><div class='add'>+	gpio-&gt;get_direction = mcp251x_gpio_get_direction;</div><div class='add'>+	gpio-&gt;get = mcp251x_gpio_get;</div><div class='add'>+	gpio-&gt;get_multiple = mcp251x_gpio_get_multiple;</div><div class='add'>+	gpio-&gt;set = mcp251x_gpio_set;</div><div class='add'>+	gpio-&gt;set_multiple = mcp251x_gpio_set_multiple;</div><div class='add'>+	gpio-&gt;base = -1;</div><div class='add'>+	gpio-&gt;ngpio = ARRAY_SIZE(mcp251x_gpio_names);</div><div class='add'>+	gpio-&gt;names = mcp251x_gpio_names;</div><div class='add'>+	gpio-&gt;can_sleep = true;</div><div class='add'>+</div><div class='add'>+	return devm_gpiochip_add_data(&amp;priv-&gt;spi-&gt;dev, gpio, priv);</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static inline void mcp251x_gpio_restore(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int mcp251x_gpio_setup(struct mcp251x_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static void mcp251x_hw_tx_frame(struct spi_device *spi, u8 *buf,</div><div class='ctx'> 				int len, int tx_buf_idx)</div><div class='ctx'> {</div><div class='hunk'>@@ -402,7 +640,7 @@ static void mcp251x_hw_tx_frame(struct spi_device *spi, u8 *buf,</div><div class='ctx'> 					  buf[i]);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		memcpy(priv-&gt;spi_tx_buf, buf, TXBDAT_OFF + len);</div><div class='del'>-		mcp251x_spi_trans(spi, TXBDAT_OFF + len);</div><div class='add'>+		mcp251x_spi_write(spi, TXBDAT_OFF + len);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -428,13 +666,13 @@ static void mcp251x_hw_tx(struct spi_device *spi, struct can_frame *frame,</div><div class='ctx'> 		((eid &gt;&gt; SIDL_EID_SHIFT) &amp; SIDL_EID_MASK);</div><div class='ctx'> 	buf[TXBEID8_OFF] = GET_BYTE(eid, 1);</div><div class='ctx'> 	buf[TXBEID0_OFF] = GET_BYTE(eid, 0);</div><div class='del'>-	buf[TXBDLC_OFF] = (rtr &lt;&lt; DLC_RTR_SHIFT) | frame-&gt;can_dlc;</div><div class='del'>-	memcpy(buf + TXBDAT_OFF, frame-&gt;data, frame-&gt;can_dlc);</div><div class='del'>-	mcp251x_hw_tx_frame(spi, buf, frame-&gt;can_dlc, tx_buf_idx);</div><div class='add'>+	buf[TXBDLC_OFF] = (rtr &lt;&lt; DLC_RTR_SHIFT) | frame-&gt;len;</div><div class='add'>+	memcpy(buf + TXBDAT_OFF, frame-&gt;data, frame-&gt;len);</div><div class='add'>+	mcp251x_hw_tx_frame(spi, buf, frame-&gt;len, tx_buf_idx);</div><div class='ctx'> </div><div class='ctx'> 	/* use INSTRUCTION_RTS, to avoid "repeated frame problem" */</div><div class='ctx'> 	priv-&gt;spi_tx_buf[0] = INSTRUCTION_RTS(1 &lt;&lt; tx_buf_idx);</div><div class='del'>-	mcp251x_spi_trans(priv-&gt;spi, 1);</div><div class='add'>+	mcp251x_spi_write(priv-&gt;spi, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mcp251x_hw_rx_frame(struct spi_device *spi, u8 *buf,</div><div class='hunk'>@@ -448,13 +686,21 @@ static void mcp251x_hw_rx_frame(struct spi_device *spi, u8 *buf,</div><div class='ctx'> 		for (i = 1; i &lt; RXBDAT_OFF; i++)</div><div class='ctx'> 			buf[i] = mcp251x_read_reg(spi, RXBCTRL(buf_idx) + i);</div><div class='ctx'> </div><div class='del'>-		len = get_can_dlc(buf[RXBDLC_OFF] &amp; RXBDLC_LEN_MASK);</div><div class='add'>+		len = can_cc_dlc2len(buf[RXBDLC_OFF] &amp; RXBDLC_LEN_MASK);</div><div class='ctx'> 		for (; i &lt; (RXBDAT_OFF + len); i++)</div><div class='ctx'> 			buf[i] = mcp251x_read_reg(spi, RXBCTRL(buf_idx) + i);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		priv-&gt;spi_tx_buf[RXBCTRL_OFF] = INSTRUCTION_READ_RXB(buf_idx);</div><div class='del'>-		mcp251x_spi_trans(spi, SPI_TRANSFER_BUF_LEN);</div><div class='del'>-		memcpy(buf, priv-&gt;spi_rx_buf, SPI_TRANSFER_BUF_LEN);</div><div class='add'>+		if (spi-&gt;controller-&gt;flags &amp; SPI_CONTROLLER_HALF_DUPLEX) {</div><div class='add'>+			spi_write_then_read(spi, priv-&gt;spi_tx_buf, 1,</div><div class='add'>+					    priv-&gt;spi_rx_buf,</div><div class='add'>+					    SPI_TRANSFER_BUF_LEN);</div><div class='add'>+			memcpy(buf + 1, priv-&gt;spi_rx_buf,</div><div class='add'>+			       SPI_TRANSFER_BUF_LEN - 1);</div><div class='add'>+		} else {</div><div class='add'>+			mcp251x_spi_trans(spi, SPI_TRANSFER_BUF_LEN);</div><div class='add'>+			memcpy(buf, priv-&gt;spi_rx_buf, SPI_TRANSFER_BUF_LEN);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -496,15 +742,15 @@ static void mcp251x_hw_rx(struct spi_device *spi, int buf_idx)</div><div class='ctx'> 			frame-&gt;can_id |= CAN_RTR_FLAG;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Data length */</div><div class='del'>-	frame-&gt;can_dlc = get_can_dlc(buf[RXBDLC_OFF] &amp; RXBDLC_LEN_MASK);</div><div class='del'>-	memcpy(frame-&gt;data, buf + RXBDAT_OFF, frame-&gt;can_dlc);</div><div class='add'>+	frame-&gt;len = can_cc_dlc2len(buf[RXBDLC_OFF] &amp; RXBDLC_LEN_MASK);</div><div class='add'>+	if (!(frame-&gt;can_id &amp; CAN_RTR_FLAG)) {</div><div class='add'>+		memcpy(frame-&gt;data, buf + RXBDAT_OFF, frame-&gt;len);</div><div class='ctx'> </div><div class='add'>+		priv-&gt;net-&gt;stats.rx_bytes += frame-&gt;len;</div><div class='add'>+	}</div><div class='ctx'> 	priv-&gt;net-&gt;stats.rx_packets++;</div><div class='del'>-	priv-&gt;net-&gt;stats.rx_bytes += frame-&gt;can_dlc;</div><div class='ctx'> </div><div class='del'>-	can_led_event(priv-&gt;net, CAN_LED_EVENT_RX);</div><div class='del'>-</div><div class='del'>-	netif_rx_ni(skb);</div><div class='add'>+	netif_rx(skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void mcp251x_hw_sleep(struct spi_device *spi)</div><div class='hunk'>@@ -512,18 +758,50 @@ static void mcp251x_hw_sleep(struct spi_device *spi)</div><div class='ctx'> 	mcp251x_write_reg(spi, CANCTRL, CANCTRL_REQOP_SLEEP);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* May only be called when device is sleeping! */</div><div class='add'>+static int mcp251x_hw_wake(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+	u8 value;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Force wakeup interrupt to wake device, but don't execute IST */</div><div class='add'>+	disable_irq_nosync(spi-&gt;irq);</div><div class='add'>+	mcp251x_write_2regs(spi, CANINTE, CANINTE_WAKIE, CANINTF_WAKIF);</div><div class='add'>+</div><div class='add'>+	/* Wait for oscillator startup timer after wake up */</div><div class='add'>+	mdelay(MCP251X_OST_DELAY_MS);</div><div class='add'>+</div><div class='add'>+	/* Put device into config mode */</div><div class='add'>+	mcp251x_write_reg(spi, CANCTRL, CANCTRL_REQOP_CONF);</div><div class='add'>+</div><div class='add'>+	/* Wait for the device to enter config mode */</div><div class='add'>+	ret = mcp251x_read_stat_poll_timeout(spi, value, value == CANCTRL_REQOP_CONF,</div><div class='add'>+					     MCP251X_OST_DELAY_MS * 1000,</div><div class='add'>+					     USEC_PER_SEC);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;spi-&gt;dev, "MCP251x didn't enter in config mode\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Disable and clear pending interrupts */</div><div class='add'>+	mcp251x_write_2regs(spi, CANINTE, 0x00, 0x00);</div><div class='add'>+	enable_irq(spi-&gt;irq);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static netdev_tx_t mcp251x_hard_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 					   struct net_device *net)</div><div class='ctx'> {</div><div class='ctx'> 	struct mcp251x_priv *priv = netdev_priv(net);</div><div class='ctx'> 	struct spi_device *spi = priv-&gt;spi;</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;tx_skb || priv-&gt;tx_len) {</div><div class='add'>+	if (priv-&gt;tx_skb || priv-&gt;tx_busy) {</div><div class='ctx'> 		dev_warn(&amp;spi-&gt;dev, "hard_xmit called while tx busy\n");</div><div class='ctx'> 		return NETDEV_TX_BUSY;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (can_dropped_invalid_skb(net, skb))</div><div class='add'>+	if (can_dev_dropped_skb(net, skb))</div><div class='ctx'> 		return NETDEV_TX_OK;</div><div class='ctx'> </div><div class='ctx'> 	netif_stop_queue(net);</div><div class='hunk'>@@ -557,7 +835,8 @@ static int mcp251x_do_set_mode(struct net_device *net, enum can_mode mode)</div><div class='ctx'> static int mcp251x_set_normal_mode(struct spi_device *spi)</div><div class='ctx'> {</div><div class='ctx'> 	struct mcp251x_priv *priv = spi_get_drvdata(spi);</div><div class='del'>-	unsigned long timeout;</div><div class='add'>+	u8 value;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Enable interrupts */</div><div class='ctx'> 	mcp251x_write_reg(spi, CANINTE,</div><div class='hunk'>@@ -575,14 +854,12 @@ static int mcp251x_set_normal_mode(struct spi_device *spi)</div><div class='ctx'> 		mcp251x_write_reg(spi, CANCTRL, CANCTRL_REQOP_NORMAL);</div><div class='ctx'> </div><div class='ctx'> 		/* Wait for the device to enter normal mode */</div><div class='del'>-		timeout = jiffies + HZ;</div><div class='del'>-		while (mcp251x_read_reg(spi, CANSTAT) &amp; CANCTRL_REQOP_MASK) {</div><div class='del'>-			schedule();</div><div class='del'>-			if (time_after(jiffies, timeout)) {</div><div class='del'>-				dev_err(&amp;spi-&gt;dev, "MCP251x didn't"</div><div class='del'>-					" enter in normal mode\n");</div><div class='del'>-				return -EBUSY;</div><div class='del'>-			}</div><div class='add'>+		ret = mcp251x_read_stat_poll_timeout(spi, value, value == 0,</div><div class='add'>+						     MCP251X_OST_DELAY_MS * 1000,</div><div class='add'>+						     USEC_PER_SEC);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(&amp;spi-&gt;dev, "MCP251x didn't enter in normal mode\n");</div><div class='add'>+			return ret;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='hunk'>@@ -612,8 +889,7 @@ static int mcp251x_do_set_bittiming(struct net_device *net)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mcp251x_setup(struct net_device *net, struct mcp251x_priv *priv,</div><div class='del'>-			 struct spi_device *spi)</div><div class='add'>+static int mcp251x_setup(struct net_device *net, struct spi_device *spi)</div><div class='ctx'> {</div><div class='ctx'> 	mcp251x_do_set_bittiming(net);</div><div class='ctx'> </div><div class='hunk'>@@ -627,25 +903,27 @@ static int mcp251x_setup(struct net_device *net, struct mcp251x_priv *priv,</div><div class='ctx'> static int mcp251x_hw_reset(struct spi_device *spi)</div><div class='ctx'> {</div><div class='ctx'> 	struct mcp251x_priv *priv = spi_get_drvdata(spi);</div><div class='del'>-	u8 reg;</div><div class='add'>+	u8 value;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Wait for oscillator startup timer after power up */</div><div class='ctx'> 	mdelay(MCP251X_OST_DELAY_MS);</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;spi_tx_buf[0] = INSTRUCTION_RESET;</div><div class='del'>-	ret = mcp251x_spi_trans(spi, 1);</div><div class='add'>+	ret = mcp251x_spi_write(spi, 1);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Wait for oscillator startup timer after reset */</div><div class='ctx'> 	mdelay(MCP251X_OST_DELAY_MS);</div><div class='del'>-	</div><div class='del'>-	reg = mcp251x_read_reg(spi, CANSTAT);</div><div class='del'>-	if ((reg &amp; CANCTRL_REQOP_MASK) != CANCTRL_REQOP_CONF)</div><div class='del'>-		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	/* Wait for reset to finish */</div><div class='add'>+	ret = mcp251x_read_stat_poll_timeout(spi, value, value == CANCTRL_REQOP_CONF,</div><div class='add'>+					     MCP251X_OST_DELAY_MS * 1000,</div><div class='add'>+					     USEC_PER_SEC);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(&amp;spi-&gt;dev, "MCP251x didn't enter in conf mode after reset\n");</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mcp251x_hw_probe(struct spi_device *spi)</div><div class='hunk'>@@ -679,17 +957,6 @@ static int mcp251x_power_enable(struct regulator *reg, int enable)</div><div class='ctx'> 		return regulator_disable(reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mcp251x_open_clean(struct net_device *net)</div><div class='del'>-{</div><div class='del'>-	struct mcp251x_priv *priv = netdev_priv(net);</div><div class='del'>-	struct spi_device *spi = priv-&gt;spi;</div><div class='del'>-</div><div class='del'>-	free_irq(spi-&gt;irq, priv);</div><div class='del'>-	mcp251x_hw_sleep(spi);</div><div class='del'>-	mcp251x_power_enable(priv-&gt;transceiver, 0);</div><div class='del'>-	close_candev(net);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int mcp251x_stop(struct net_device *net)</div><div class='ctx'> {</div><div class='ctx'> 	struct mcp251x_priv *priv = netdev_priv(net);</div><div class='hunk'>@@ -699,14 +966,11 @@ static int mcp251x_stop(struct net_device *net)</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;force_quit = 1;</div><div class='ctx'> 	free_irq(spi-&gt;irq, priv);</div><div class='del'>-	destroy_workqueue(priv-&gt;wq);</div><div class='del'>-	priv-&gt;wq = NULL;</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;priv-&gt;mcp_lock);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable and clear pending interrupts */</div><div class='del'>-	mcp251x_write_reg(spi, CANINTE, 0x00);</div><div class='del'>-	mcp251x_write_reg(spi, CANINTF, 0x00);</div><div class='add'>+	mcp251x_write_2regs(spi, CANINTE, 0x00, 0x00);</div><div class='ctx'> </div><div class='ctx'> 	mcp251x_write_reg(spi, TXBCTRL(0), 0);</div><div class='ctx'> 	mcp251x_clean(net);</div><div class='hunk'>@@ -719,8 +983,6 @@ static int mcp251x_stop(struct net_device *net)</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;priv-&gt;mcp_lock);</div><div class='ctx'> </div><div class='del'>-	can_led_event(net, CAN_LED_EVENT_STOP);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -733,7 +995,7 @@ static void mcp251x_error_skb(struct net_device *net, int can_id, int data1)</div><div class='ctx'> 	if (skb) {</div><div class='ctx'> 		frame-&gt;can_id |= can_id;</div><div class='ctx'> 		frame-&gt;data[1] = data1;</div><div class='del'>-		netif_rx_ni(skb);</div><div class='add'>+		netif_rx(skb);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		netdev_err(net, "cannot allocate error skb\n");</div><div class='ctx'> 	}</div><div class='hunk'>@@ -754,11 +1016,11 @@ static void mcp251x_tx_work_handler(struct work_struct *ws)</div><div class='ctx'> 		} else {</div><div class='ctx'> 			frame = (struct can_frame *)priv-&gt;tx_skb-&gt;data;</div><div class='ctx'> </div><div class='del'>-			if (frame-&gt;can_dlc &gt; CAN_FRAME_MAX_DATA_LEN)</div><div class='del'>-				frame-&gt;can_dlc = CAN_FRAME_MAX_DATA_LEN;</div><div class='add'>+			if (frame-&gt;len &gt; CAN_FRAME_MAX_DATA_LEN)</div><div class='add'>+				frame-&gt;len = CAN_FRAME_MAX_DATA_LEN;</div><div class='ctx'> 			mcp251x_hw_tx(spi, frame, 0);</div><div class='del'>-			priv-&gt;tx_len = 1 + frame-&gt;can_dlc;</div><div class='del'>-			can_put_echo_skb(priv-&gt;tx_skb, net, 0);</div><div class='add'>+			priv-&gt;tx_busy = true;</div><div class='add'>+			can_put_echo_skb(priv-&gt;tx_skb, net, 0, 0);</div><div class='ctx'> 			priv-&gt;tx_skb = NULL;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -774,8 +1036,14 @@ static void mcp251x_restart_work_handler(struct work_struct *ws)</div><div class='ctx'> </div><div class='ctx'> 	mutex_lock(&amp;priv-&gt;mcp_lock);</div><div class='ctx'> 	if (priv-&gt;after_suspend) {</div><div class='del'>-		mcp251x_hw_reset(spi);</div><div class='del'>-		mcp251x_setup(net, priv, spi);</div><div class='add'>+		if (priv-&gt;after_suspend &amp; AFTER_SUSPEND_POWER) {</div><div class='add'>+			mcp251x_hw_reset(spi);</div><div class='add'>+			mcp251x_setup(net, spi);</div><div class='add'>+			mcp251x_gpio_restore(spi);</div><div class='add'>+		} else {</div><div class='add'>+			mcp251x_hw_wake(spi);</div><div class='add'>+		}</div><div class='add'>+		priv-&gt;force_quit = 0;</div><div class='ctx'> 		if (priv-&gt;after_suspend &amp; AFTER_SUSPEND_RESTART) {</div><div class='ctx'> 			mcp251x_set_normal_mode(spi);</div><div class='ctx'> 		} else if (priv-&gt;after_suspend &amp; AFTER_SUSPEND_UP) {</div><div class='hunk'>@@ -787,7 +1055,6 @@ static void mcp251x_restart_work_handler(struct work_struct *ws)</div><div class='ctx'> 			mcp251x_hw_sleep(spi);</div><div class='ctx'> 		}</div><div class='ctx'> 		priv-&gt;after_suspend = 0;</div><div class='del'>-		priv-&gt;force_quit = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;restart_tx) {</div><div class='hunk'>@@ -815,35 +1082,47 @@ static irqreturn_t mcp251x_can_ist(int irq, void *dev_id)</div><div class='ctx'> </div><div class='ctx'> 		mcp251x_read_2regs(spi, CANINTF, &amp;intf, &amp;eflag);</div><div class='ctx'> </div><div class='del'>-		/* mask out flags we don't care about */</div><div class='del'>-		intf &amp;= CANINTF_RX | CANINTF_TX | CANINTF_ERR;</div><div class='del'>-</div><div class='ctx'> 		/* receive buffer 0 */</div><div class='ctx'> 		if (intf &amp; CANINTF_RX0IF) {</div><div class='ctx'> 			mcp251x_hw_rx(spi, 0);</div><div class='del'>-			/*</div><div class='del'>-			 * Free one buffer ASAP</div><div class='del'>-			 * (The MCP2515 does this automatically.)</div><div class='add'>+			/* Free one buffer ASAP</div><div class='add'>+			 * (The MCP2515/25625 does this automatically.)</div><div class='ctx'> 			 */</div><div class='ctx'> 			if (mcp251x_is_2510(spi))</div><div class='del'>-				mcp251x_write_bits(spi, CANINTF, CANINTF_RX0IF, 0x00);</div><div class='add'>+				mcp251x_write_bits(spi, CANINTF,</div><div class='add'>+						   CANINTF_RX0IF, 0x00);</div><div class='add'>+</div><div class='add'>+			/* check if buffer 1 is already known to be full, no need to re-read */</div><div class='add'>+			if (!(intf &amp; CANINTF_RX1IF)) {</div><div class='add'>+				u8 intf1, eflag1;</div><div class='add'>+</div><div class='add'>+				/* intf needs to be read again to avoid a race condition */</div><div class='add'>+				mcp251x_read_2regs(spi, CANINTF, &amp;intf1, &amp;eflag1);</div><div class='add'>+</div><div class='add'>+				/* combine flags from both operations for error handling */</div><div class='add'>+				intf |= intf1;</div><div class='add'>+				eflag |= eflag1;</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* receive buffer 1 */</div><div class='ctx'> 		if (intf &amp; CANINTF_RX1IF) {</div><div class='ctx'> 			mcp251x_hw_rx(spi, 1);</div><div class='del'>-			/* the MCP2515 does this automatically */</div><div class='add'>+			/* The MCP2515/25625 does this automatically. */</div><div class='ctx'> 			if (mcp251x_is_2510(spi))</div><div class='ctx'> 				clear_intf |= CANINTF_RX1IF;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		/* mask out flags we don't care about */</div><div class='add'>+		intf &amp;= CANINTF_RX | CANINTF_TX | CANINTF_ERR;</div><div class='add'>+</div><div class='ctx'> 		/* any error or tx interrupt we need to clear? */</div><div class='ctx'> 		if (intf &amp; (CANINTF_ERR | CANINTF_TX))</div><div class='ctx'> 			clear_intf |= intf &amp; (CANINTF_ERR | CANINTF_TX);</div><div class='ctx'> 		if (clear_intf)</div><div class='ctx'> 			mcp251x_write_bits(spi, CANINTF, clear_intf, 0x00);</div><div class='ctx'> </div><div class='del'>-		if (eflag)</div><div class='add'>+		if (eflag &amp; (EFLG_RX0OVR | EFLG_RX1OVR))</div><div class='ctx'> 			mcp251x_write_bits(spi, EFLG, eflag, 0x00);</div><div class='ctx'> </div><div class='ctx'> 		/* Update can state */</div><div class='hunk'>@@ -876,7 +1155,8 @@ static irqreturn_t mcp251x_can_ist(int irq, void *dev_id)</div><div class='ctx'> 			if (new_state &gt;= CAN_STATE_ERROR_WARNING &amp;&amp;</div><div class='ctx'> 			    new_state &lt;= CAN_STATE_BUS_OFF)</div><div class='ctx'> 				priv-&gt;can.can_stats.error_warning++;</div><div class='del'>-		case CAN_STATE_ERROR_WARNING:	/* fallthrough */</div><div class='add'>+			fallthrough;</div><div class='add'>+		case CAN_STATE_ERROR_WARNING:</div><div class='ctx'> 			if (new_state &gt;= CAN_STATE_ERROR_PASSIVE &amp;&amp;</div><div class='ctx'> 			    new_state &lt;= CAN_STATE_BUS_OFF)</div><div class='ctx'> 				priv-&gt;can.can_stats.error_passive++;</div><div class='hunk'>@@ -917,16 +1197,14 @@ static irqreturn_t mcp251x_can_ist(int irq, void *dev_id)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		if (intf &amp; CANINTF_TX) {</div><div class='del'>-			net-&gt;stats.tx_packets++;</div><div class='del'>-			net-&gt;stats.tx_bytes += priv-&gt;tx_len - 1;</div><div class='del'>-			can_led_event(net, CAN_LED_EVENT_TX);</div><div class='del'>-			if (priv-&gt;tx_len) {</div><div class='del'>-				can_get_echo_skb(net, 0);</div><div class='del'>-				priv-&gt;tx_len = 0;</div><div class='add'>+			if (priv-&gt;tx_busy) {</div><div class='add'>+				net-&gt;stats.tx_packets++;</div><div class='add'>+				net-&gt;stats.tx_bytes += can_get_echo_skb(net, 0,</div><div class='add'>+									NULL);</div><div class='add'>+				priv-&gt;tx_busy = false;</div><div class='ctx'> 			}</div><div class='ctx'> 			netif_wake_queue(net);</div><div class='ctx'> 		}</div><div class='del'>-</div><div class='ctx'> 	}</div><div class='ctx'> 	mutex_unlock(&amp;priv-&gt;mcp_lock);</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='hunk'>@@ -936,7 +1214,7 @@ static int mcp251x_open(struct net_device *net)</div><div class='ctx'> {</div><div class='ctx'> 	struct mcp251x_priv *priv = netdev_priv(net);</div><div class='ctx'> 	struct spi_device *spi = priv-&gt;spi;</div><div class='del'>-	unsigned long flags = IRQF_ONESHOT | IRQF_TRIGGER_FALLING;</div><div class='add'>+	unsigned long flags = 0;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	ret = open_candev(net);</div><div class='hunk'>@@ -950,42 +1228,40 @@ static int mcp251x_open(struct net_device *net)</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;force_quit = 0;</div><div class='ctx'> 	priv-&gt;tx_skb = NULL;</div><div class='del'>-	priv-&gt;tx_len = 0;</div><div class='add'>+	priv-&gt;tx_busy = false;</div><div class='add'>+</div><div class='add'>+	if (!dev_fwnode(&amp;spi-&gt;dev))</div><div class='add'>+		flags = IRQF_TRIGGER_FALLING;</div><div class='ctx'> </div><div class='ctx'> 	ret = request_threaded_irq(spi-&gt;irq, NULL, mcp251x_can_ist,</div><div class='del'>-				   flags | IRQF_ONESHOT, DEVICE_NAME, priv);</div><div class='add'>+				   flags | IRQF_ONESHOT, dev_name(&amp;spi-&gt;dev),</div><div class='add'>+				   priv);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(&amp;spi-&gt;dev, "failed to acquire irq %d\n", spi-&gt;irq);</div><div class='del'>-		mcp251x_power_enable(priv-&gt;transceiver, 0);</div><div class='del'>-		close_candev(net);</div><div class='del'>-		goto open_unlock;</div><div class='add'>+		goto out_close;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	priv-&gt;wq = create_freezable_workqueue("mcp251x_wq");</div><div class='del'>-	INIT_WORK(&amp;priv-&gt;tx_work, mcp251x_tx_work_handler);</div><div class='del'>-	INIT_WORK(&amp;priv-&gt;restart_work, mcp251x_restart_work_handler);</div><div class='del'>-</div><div class='del'>-	ret = mcp251x_hw_reset(spi);</div><div class='del'>-	if (ret) {</div><div class='del'>-		mcp251x_open_clean(net);</div><div class='del'>-		goto open_unlock;</div><div class='del'>-	}</div><div class='del'>-	ret = mcp251x_setup(net, priv, spi);</div><div class='del'>-	if (ret) {</div><div class='del'>-		mcp251x_open_clean(net);</div><div class='del'>-		goto open_unlock;</div><div class='del'>-	}</div><div class='add'>+	ret = mcp251x_hw_wake(spi);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_free_irq;</div><div class='add'>+	ret = mcp251x_setup(net, spi);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_free_irq;</div><div class='ctx'> 	ret = mcp251x_set_normal_mode(spi);</div><div class='del'>-	if (ret) {</div><div class='del'>-		mcp251x_open_clean(net);</div><div class='del'>-		goto open_unlock;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	can_led_event(net, CAN_LED_EVENT_OPEN);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_free_irq;</div><div class='ctx'> </div><div class='ctx'> 	netif_wake_queue(net);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;mcp_lock);</div><div class='ctx'> </div><div class='del'>-open_unlock:</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_free_irq:</div><div class='add'>+	free_irq(spi-&gt;irq, priv);</div><div class='add'>+	mcp251x_hw_sleep(spi);</div><div class='add'>+out_close:</div><div class='add'>+	mcp251x_power_enable(priv-&gt;transceiver, 0);</div><div class='add'>+	close_candev(net);</div><div class='ctx'> 	mutex_unlock(&amp;priv-&gt;mcp_lock);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -994,7 +1270,10 @@ static const struct net_device_ops mcp251x_netdev_ops = {</div><div class='ctx'> 	.ndo_open = mcp251x_open,</div><div class='ctx'> 	.ndo_stop = mcp251x_stop,</div><div class='ctx'> 	.ndo_start_xmit = mcp251x_hard_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops mcp251x_ethtool_ops = {</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id mcp251x_of_match[] = {</div><div class='hunk'>@@ -1006,6 +1285,10 @@ static const struct of_device_id mcp251x_of_match[] = {</div><div class='ctx'> 		.compatible	= "microchip,mcp2515",</div><div class='ctx'> 		.data		= (void *)CAN_MCP251X_MCP2515,</div><div class='ctx'> 	},</div><div class='add'>+	{</div><div class='add'>+		.compatible	= "microchip,mcp25625",</div><div class='add'>+		.data		= (void *)CAN_MCP251X_MCP25625,</div><div class='add'>+	},</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(of, mcp251x_of_match);</div><div class='hunk'>@@ -1019,46 +1302,47 @@ static const struct spi_device_id mcp251x_id_table[] = {</div><div class='ctx'> 		.name		= "mcp2515",</div><div class='ctx'> 		.driver_data	= (kernel_ulong_t)CAN_MCP251X_MCP2515,</div><div class='ctx'> 	},</div><div class='add'>+	{</div><div class='add'>+		.name		= "mcp25625",</div><div class='add'>+		.driver_data	= (kernel_ulong_t)CAN_MCP251X_MCP25625,</div><div class='add'>+	},</div><div class='ctx'> 	{ }</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(spi, mcp251x_id_table);</div><div class='ctx'> </div><div class='ctx'> static int mcp251x_can_probe(struct spi_device *spi)</div><div class='ctx'> {</div><div class='del'>-	const struct of_device_id *of_id = of_match_device(mcp251x_of_match,</div><div class='del'>-							   &amp;spi-&gt;dev);</div><div class='del'>-	struct mcp251x_platform_data *pdata = dev_get_platdata(&amp;spi-&gt;dev);</div><div class='ctx'> 	struct net_device *net;</div><div class='ctx'> 	struct mcp251x_priv *priv;</div><div class='ctx'> 	struct clk *clk;</div><div class='del'>-	int freq, ret;</div><div class='del'>-</div><div class='del'>-	clk = devm_clk_get(&amp;spi-&gt;dev, NULL);</div><div class='del'>-	if (IS_ERR(clk)) {</div><div class='del'>-		if (pdata)</div><div class='del'>-			freq = pdata-&gt;oscillator_frequency;</div><div class='del'>-		else</div><div class='del'>-			return PTR_ERR(clk);</div><div class='del'>-	} else {</div><div class='del'>-		freq = clk_get_rate(clk);</div><div class='del'>-	}</div><div class='add'>+	u32 freq;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	clk = devm_clk_get_optional(&amp;spi-&gt;dev, NULL);</div><div class='add'>+	if (IS_ERR(clk))</div><div class='add'>+		return dev_err_probe(&amp;spi-&gt;dev, PTR_ERR(clk), "Cannot get clock\n");</div><div class='add'>+</div><div class='add'>+	freq = clk_get_rate(clk);</div><div class='add'>+	if (freq == 0)</div><div class='add'>+		device_property_read_u32(&amp;spi-&gt;dev, "clock-frequency", &amp;freq);</div><div class='ctx'> </div><div class='ctx'> 	/* Sanity check */</div><div class='ctx'> 	if (freq &lt; 1000000 || freq &gt; 25000000)</div><div class='del'>-		return -ERANGE;</div><div class='add'>+		return dev_err_probe(&amp;spi-&gt;dev, -ERANGE, "clock frequency out of range\n");</div><div class='ctx'> </div><div class='ctx'> 	/* Allocate can/net device */</div><div class='ctx'> 	net = alloc_candev(sizeof(struct mcp251x_priv), TX_ECHO_SKB_MAX);</div><div class='ctx'> 	if (!net)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	if (!IS_ERR(clk)) {</div><div class='del'>-		ret = clk_prepare_enable(clk);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto out_free;</div><div class='add'>+	ret = clk_prepare_enable(clk);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err_probe(&amp;spi-&gt;dev, ret, "Cannot enable clock\n");</div><div class='add'>+		goto out_free;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	net-&gt;netdev_ops = &amp;mcp251x_netdev_ops;</div><div class='add'>+	net-&gt;ethtool_ops = &amp;mcp251x_ethtool_ops;</div><div class='ctx'> 	net-&gt;flags |= IFF_ECHO;</div><div class='ctx'> </div><div class='ctx'> 	priv = netdev_priv(net);</div><div class='hunk'>@@ -1067,10 +1351,7 @@ static int mcp251x_can_probe(struct spi_device *spi)</div><div class='ctx'> 	priv-&gt;can.clock.freq = freq / 2;</div><div class='ctx'> 	priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES |</div><div class='ctx'> 		CAN_CTRLMODE_LOOPBACK | CAN_CTRLMODE_LISTENONLY;</div><div class='del'>-	if (of_id)</div><div class='del'>-		priv-&gt;model = (enum mcp251x_model)of_id-&gt;data;</div><div class='del'>-	else</div><div class='del'>-		priv-&gt;model = spi_get_device_id(spi)-&gt;driver_data;</div><div class='add'>+	priv-&gt;model = (enum mcp251x_model)(uintptr_t)spi_get_device_match_data(spi);</div><div class='ctx'> 	priv-&gt;net = net;</div><div class='ctx'> 	priv-&gt;clk = clk;</div><div class='ctx'> </div><div class='hunk'>@@ -1083,86 +1364,90 @@ static int mcp251x_can_probe(struct spi_device *spi)</div><div class='ctx'> 	else</div><div class='ctx'> 		spi-&gt;max_speed_hz = spi-&gt;max_speed_hz ? : 10 * 1000 * 1000;</div><div class='ctx'> 	ret = spi_setup(spi);</div><div class='del'>-	if (ret)</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err_probe(&amp;spi-&gt;dev, ret, "Cannot set up spi\n");</div><div class='ctx'> 		goto out_clk;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;power = devm_regulator_get_optional(&amp;spi-&gt;dev, "vdd");</div><div class='ctx'> 	priv-&gt;transceiver = devm_regulator_get_optional(&amp;spi-&gt;dev, "xceiver");</div><div class='ctx'> 	if ((PTR_ERR(priv-&gt;power) == -EPROBE_DEFER) ||</div><div class='ctx'> 	    (PTR_ERR(priv-&gt;transceiver) == -EPROBE_DEFER)) {</div><div class='ctx'> 		ret = -EPROBE_DEFER;</div><div class='add'>+		dev_err_probe(&amp;spi-&gt;dev, ret, "supply deferred\n");</div><div class='ctx'> 		goto out_clk;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = mcp251x_power_enable(priv-&gt;power, 1);</div><div class='del'>-	if (ret)</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err_probe(&amp;spi-&gt;dev, ret, "Cannot enable power\n");</div><div class='ctx'> 		goto out_clk;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;wq = alloc_workqueue("mcp251x_wq",</div><div class='add'>+				   WQ_FREEZABLE | WQ_MEM_RECLAIM | WQ_PERCPU,</div><div class='add'>+				   0);</div><div class='add'>+	if (!priv-&gt;wq) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto out_clk;</div><div class='add'>+	}</div><div class='add'>+	INIT_WORK(&amp;priv-&gt;tx_work, mcp251x_tx_work_handler);</div><div class='add'>+	INIT_WORK(&amp;priv-&gt;restart_work, mcp251x_restart_work_handler);</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;spi = spi;</div><div class='ctx'> 	mutex_init(&amp;priv-&gt;mcp_lock);</div><div class='ctx'> </div><div class='del'>-	/* If requested, allocate DMA buffers */</div><div class='del'>-	if (mcp251x_enable_dma) {</div><div class='del'>-		spi-&gt;dev.coherent_dma_mask = ~0;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Minimum coherent DMA allocation is PAGE_SIZE, so allocate</div><div class='del'>-		 * that much and share it between Tx and Rx DMA buffers.</div><div class='del'>-		 */</div><div class='del'>-		priv-&gt;spi_tx_buf = dmam_alloc_coherent(&amp;spi-&gt;dev,</div><div class='del'>-						       PAGE_SIZE,</div><div class='del'>-						       &amp;priv-&gt;spi_tx_dma,</div><div class='del'>-						       GFP_DMA);</div><div class='del'>-</div><div class='del'>-		if (priv-&gt;spi_tx_buf) {</div><div class='del'>-			priv-&gt;spi_rx_buf = (priv-&gt;spi_tx_buf + (PAGE_SIZE / 2));</div><div class='del'>-			priv-&gt;spi_rx_dma = (dma_addr_t)(priv-&gt;spi_tx_dma +</div><div class='del'>-							(PAGE_SIZE / 2));</div><div class='del'>-		} else {</div><div class='del'>-			/* Fall back to non-DMA */</div><div class='del'>-			mcp251x_enable_dma = 0;</div><div class='del'>-		}</div><div class='add'>+	priv-&gt;spi_tx_buf = devm_kzalloc(&amp;spi-&gt;dev, SPI_TRANSFER_BUF_LEN,</div><div class='add'>+					GFP_KERNEL);</div><div class='add'>+	if (!priv-&gt;spi_tx_buf) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto error_probe;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Allocate non-DMA buffers */</div><div class='del'>-	if (!mcp251x_enable_dma) {</div><div class='del'>-		priv-&gt;spi_tx_buf = devm_kzalloc(&amp;spi-&gt;dev, SPI_TRANSFER_BUF_LEN,</div><div class='del'>-						GFP_KERNEL);</div><div class='del'>-		if (!priv-&gt;spi_tx_buf) {</div><div class='del'>-			ret = -ENOMEM;</div><div class='del'>-			goto error_probe;</div><div class='del'>-		}</div><div class='del'>-		priv-&gt;spi_rx_buf = devm_kzalloc(&amp;spi-&gt;dev, SPI_TRANSFER_BUF_LEN,</div><div class='del'>-						GFP_KERNEL);</div><div class='del'>-		if (!priv-&gt;spi_rx_buf) {</div><div class='del'>-			ret = -ENOMEM;</div><div class='del'>-			goto error_probe;</div><div class='del'>-		}</div><div class='add'>+	priv-&gt;spi_rx_buf = devm_kzalloc(&amp;spi-&gt;dev, SPI_TRANSFER_BUF_LEN,</div><div class='add'>+					GFP_KERNEL);</div><div class='add'>+	if (!priv-&gt;spi_rx_buf) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto error_probe;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	SET_NETDEV_DEV(net, &amp;spi-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Here is OK to not lock the MCP, no one knows about it yet */</div><div class='ctx'> 	ret = mcp251x_hw_probe(spi);</div><div class='del'>-	if (ret)</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err_probe(&amp;spi-&gt;dev, ret, "Cannot initialize MCP%x. Wrong wiring?\n",</div><div class='add'>+			      priv-&gt;model);</div><div class='ctx'> 		goto error_probe;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	mcp251x_hw_sleep(spi);</div><div class='ctx'> </div><div class='ctx'> 	ret = register_candev(net);</div><div class='del'>-	if (ret)</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err_probe(&amp;spi-&gt;dev, ret, "Cannot register CAN device\n");</div><div class='ctx'> 		goto error_probe;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	devm_can_led_init(net);</div><div class='add'>+	ret = mcp251x_gpio_setup(priv);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err_probe(&amp;spi-&gt;dev, ret, "Cannot set up gpios\n");</div><div class='add'>+		goto out_unregister_candev;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='add'>+	netdev_info(net, "MCP%x successfully initialized.\n", priv-&gt;model);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+out_unregister_candev:</div><div class='add'>+	unregister_candev(net);</div><div class='add'>+</div><div class='ctx'> error_probe:</div><div class='add'>+	destroy_workqueue(priv-&gt;wq);</div><div class='add'>+	priv-&gt;wq = NULL;</div><div class='ctx'> 	mcp251x_power_enable(priv-&gt;power, 0);</div><div class='ctx'> </div><div class='ctx'> out_clk:</div><div class='del'>-	if (!IS_ERR(clk))</div><div class='del'>-		clk_disable_unprepare(clk);</div><div class='add'>+	clk_disable_unprepare(clk);</div><div class='ctx'> </div><div class='ctx'> out_free:</div><div class='ctx'> 	free_candev(net);</div><div class='hunk'>@@ -1170,7 +1455,7 @@ out_free:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mcp251x_can_remove(struct spi_device *spi)</div><div class='add'>+static void mcp251x_can_remove(struct spi_device *spi)</div><div class='ctx'> {</div><div class='ctx'> 	struct mcp251x_priv *priv = spi_get_drvdata(spi);</div><div class='ctx'> 	struct net_device *net = priv-&gt;net;</div><div class='hunk'>@@ -1179,12 +1464,12 @@ static int mcp251x_can_remove(struct spi_device *spi)</div><div class='ctx'> </div><div class='ctx'> 	mcp251x_power_enable(priv-&gt;power, 0);</div><div class='ctx'> </div><div class='del'>-	if (!IS_ERR(priv-&gt;clk))</div><div class='del'>-		clk_disable_unprepare(priv-&gt;clk);</div><div class='add'>+	destroy_workqueue(priv-&gt;wq);</div><div class='add'>+	priv-&gt;wq = NULL;</div><div class='ctx'> </div><div class='del'>-	free_candev(net);</div><div class='add'>+	clk_disable_unprepare(priv-&gt;clk);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	free_candev(net);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int __maybe_unused mcp251x_can_suspend(struct device *dev)</div><div class='hunk'>@@ -1195,8 +1480,7 @@ static int __maybe_unused mcp251x_can_suspend(struct device *dev)</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;force_quit = 1;</div><div class='ctx'> 	disable_irq(spi-&gt;irq);</div><div class='del'>-	/*</div><div class='del'>-	 * Note: at this point neither IST nor workqueues are running.</div><div class='add'>+	/* Note: at this point neither IST nor workqueues are running.</div><div class='ctx'> 	 * open/stop cannot be called anyway so locking is not needed</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (netif_running(net)) {</div><div class='hunk'>@@ -1209,10 +1493,8 @@ static int __maybe_unused mcp251x_can_suspend(struct device *dev)</div><div class='ctx'> 		priv-&gt;after_suspend = AFTER_SUSPEND_DOWN;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!IS_ERR_OR_NULL(priv-&gt;power)) {</div><div class='del'>-		regulator_disable(priv-&gt;power);</div><div class='del'>-		priv-&gt;after_suspend |= AFTER_SUSPEND_POWER;</div><div class='del'>-	}</div><div class='add'>+	mcp251x_power_enable(priv-&gt;power, 0);</div><div class='add'>+	priv-&gt;after_suspend |= AFTER_SUSPEND_POWER;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1224,13 +1506,13 @@ static int __maybe_unused mcp251x_can_resume(struct device *dev)</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;after_suspend &amp; AFTER_SUSPEND_POWER)</div><div class='ctx'> 		mcp251x_power_enable(priv-&gt;power, 1);</div><div class='del'>-</div><div class='del'>-	if (priv-&gt;after_suspend &amp; AFTER_SUSPEND_UP) {</div><div class='add'>+	if (priv-&gt;after_suspend &amp; AFTER_SUSPEND_UP)</div><div class='ctx'> 		mcp251x_power_enable(priv-&gt;transceiver, 1);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;after_suspend &amp; (AFTER_SUSPEND_POWER | AFTER_SUSPEND_UP))</div><div class='ctx'> 		queue_work(priv-&gt;wq, &amp;priv-&gt;restart_work);</div><div class='del'>-	} else {</div><div class='add'>+	else</div><div class='ctx'> 		priv-&gt;after_suspend = 0;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;force_quit = 0;</div><div class='ctx'> 	enable_irq(spi-&gt;irq);</div><div class='hunk'>@@ -1243,7 +1525,6 @@ static SIMPLE_DEV_PM_OPS(mcp251x_can_pm_ops, mcp251x_can_suspend,</div><div class='ctx'> static struct spi_driver mcp251x_can_driver = {</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name = DEVICE_NAME,</div><div class='del'>-		.owner = THIS_MODULE,</div><div class='ctx'> 		.of_match_table = mcp251x_of_match,</div><div class='ctx'> 		.pm = &amp;mcp251x_can_pm_ops,</div><div class='ctx'> 	},</div><div class='hunk'>@@ -1255,5 +1536,5 @@ module_spi_driver(mcp251x_can_driver);</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("Chris Elston &lt;celston@katalix.com&gt;, "</div><div class='ctx'> 	      "Christian Pellegrin &lt;chripell@evolware.org&gt;");</div><div class='del'>-MODULE_DESCRIPTION("Microchip 251x CAN driver");</div><div class='add'>+MODULE_DESCRIPTION("Microchip 251x/25625 CAN driver");</div><div class='ctx'> MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/net/can/spi/mcp251xfd/Kconfig b/drivers/net/can/spi/mcp251xfd/Kconfig<br/>new file mode 100644<br/>index 000000000000..7c29846e6051<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/mcp251xfd/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/spi/mcp251xfd/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,20 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+config CAN_MCP251XFD</div><div class='add'>+	tristate "Microchip MCP251xFD SPI CAN controllers"</div><div class='add'>+	select CAN_RX_OFFLOAD</div><div class='add'>+	select REGMAP</div><div class='add'>+	select WANT_DEV_COREDUMP</div><div class='add'>+	select GPIOLIB</div><div class='add'>+	help</div><div class='add'>+	  Driver for the Microchip MCP251XFD SPI FD-CAN controller</div><div class='add'>+	  family.</div><div class='add'>+</div><div class='add'>+config CAN_MCP251XFD_SANITY</div><div class='add'>+	depends on CAN_MCP251XFD</div><div class='add'>+	bool "Additional Sanity Checks"</div><div class='add'>+	help</div><div class='add'>+	  This option enables additional sanity checks in the driver,</div><div class='add'>+	  that compares various internal counters with the in chip</div><div class='add'>+	  variants. This comes with a runtime overhead.</div><div class='add'>+	  Disable if unsure.</div><div class='head'>diff --git a/drivers/net/can/spi/mcp251xfd/Makefile b/drivers/net/can/spi/mcp251xfd/Makefile<br/>new file mode 100644<br/>index 000000000000..94d7de954294<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/mcp251xfd/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/spi/mcp251xfd/Makefile</a></div><div class='hunk'>@@ -0,0 +1,18 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_CAN_MCP251XFD) += mcp251xfd.o</div><div class='add'>+</div><div class='add'>+mcp251xfd-objs :=</div><div class='add'>+mcp251xfd-objs += mcp251xfd-chip-fifo.o</div><div class='add'>+mcp251xfd-objs += mcp251xfd-core.o</div><div class='add'>+mcp251xfd-objs += mcp251xfd-crc16.o</div><div class='add'>+mcp251xfd-objs += mcp251xfd-ethtool.o</div><div class='add'>+mcp251xfd-objs += mcp251xfd-ram.o</div><div class='add'>+mcp251xfd-objs += mcp251xfd-regmap.o</div><div class='add'>+mcp251xfd-objs += mcp251xfd-ring.o</div><div class='add'>+mcp251xfd-objs += mcp251xfd-rx.o</div><div class='add'>+mcp251xfd-objs += mcp251xfd-tef.o</div><div class='add'>+mcp251xfd-objs += mcp251xfd-timestamp.o</div><div class='add'>+mcp251xfd-objs += mcp251xfd-tx.o</div><div class='add'>+</div><div class='add'>+mcp251xfd-$(CONFIG_DEV_COREDUMP) += mcp251xfd-dump.o</div><div class='head'>diff --git a/drivers/net/can/spi/mcp251xfd/mcp251xfd-chip-fifo.c b/drivers/net/can/spi/mcp251xfd/mcp251xfd-chip-fifo.c<br/>new file mode 100644<br/>index 000000000000..0d96097a2547<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/mcp251xfd/mcp251xfd-chip-fifo.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/spi/mcp251xfd/mcp251xfd-chip-fifo.c</a></div><div class='hunk'>@@ -0,0 +1,119 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+//</div><div class='add'>+// mcp251xfd - Microchip MCP251xFD Family CAN controller driver</div><div class='add'>+//</div><div class='add'>+// Copyright (c) 2019, 2020, 2021 Pengutronix,</div><div class='add'>+//               Marc Kleine-Budde &lt;kernel@pengutronix.de&gt;</div><div class='add'>+//</div><div class='add'>+// Based on:</div><div class='add'>+//</div><div class='add'>+// CAN bus driver for Microchip 25XXFD CAN Controller with SPI Interface</div><div class='add'>+//</div><div class='add'>+// Copyright (c) 2019 Martin Sperl &lt;kernel@martin.sperl.org&gt;</div><div class='add'>+//</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+</div><div class='add'>+#include "mcp251xfd.h"</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mcp251xfd_chip_rx_fifo_init_one(const struct mcp251xfd_priv *priv,</div><div class='add'>+				const struct mcp251xfd_rx_ring *ring)</div><div class='add'>+{</div><div class='add'>+	u32 fifo_con;</div><div class='add'>+</div><div class='add'>+	/* Enable RXOVIE on _all_ RX FIFOs, not just the last one.</div><div class='add'>+	 *</div><div class='add'>+	 * FIFOs hit by a RX MAB overflow and RXOVIE enabled will</div><div class='add'>+	 * generate a RXOVIF, use this to properly detect RX MAB</div><div class='add'>+	 * overflows.</div><div class='add'>+	 */</div><div class='add'>+	fifo_con = FIELD_PREP(MCP251XFD_REG_FIFOCON_FSIZE_MASK,</div><div class='add'>+			      ring-&gt;obj_num - 1) |</div><div class='add'>+		MCP251XFD_REG_FIFOCON_RXTSEN |</div><div class='add'>+		MCP251XFD_REG_FIFOCON_RXOVIE |</div><div class='add'>+		MCP251XFD_REG_FIFOCON_TFNRFNIE;</div><div class='add'>+</div><div class='add'>+	if (mcp251xfd_is_fd_mode(priv))</div><div class='add'>+		fifo_con |= FIELD_PREP(MCP251XFD_REG_FIFOCON_PLSIZE_MASK,</div><div class='add'>+				       MCP251XFD_REG_FIFOCON_PLSIZE_64);</div><div class='add'>+	else</div><div class='add'>+		fifo_con |= FIELD_PREP(MCP251XFD_REG_FIFOCON_PLSIZE_MASK,</div><div class='add'>+				       MCP251XFD_REG_FIFOCON_PLSIZE_8);</div><div class='add'>+</div><div class='add'>+	return regmap_write(priv-&gt;map_reg,</div><div class='add'>+			    MCP251XFD_REG_FIFOCON(ring-&gt;fifo_nr), fifo_con);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mcp251xfd_chip_rx_filter_init_one(const struct mcp251xfd_priv *priv,</div><div class='add'>+				  const struct mcp251xfd_rx_ring *ring)</div><div class='add'>+{</div><div class='add'>+	u32 fltcon;</div><div class='add'>+</div><div class='add'>+	fltcon = MCP251XFD_REG_FLTCON_FLTEN(ring-&gt;nr) |</div><div class='add'>+		MCP251XFD_REG_FLTCON_FBP(ring-&gt;nr, ring-&gt;fifo_nr);</div><div class='add'>+</div><div class='add'>+	return regmap_update_bits(priv-&gt;map_reg,</div><div class='add'>+				  MCP251XFD_REG_FLTCON(ring-&gt;nr &gt;&gt; 2),</div><div class='add'>+				  MCP251XFD_REG_FLTCON_FLT_MASK(ring-&gt;nr),</div><div class='add'>+				  fltcon);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mcp251xfd_chip_fifo_init(const struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	const struct mcp251xfd_tx_ring *tx_ring = priv-&gt;tx;</div><div class='add'>+	const struct mcp251xfd_rx_ring *rx_ring;</div><div class='add'>+	u32 val;</div><div class='add'>+	int err, n;</div><div class='add'>+</div><div class='add'>+	/* TEF */</div><div class='add'>+	val = FIELD_PREP(MCP251XFD_REG_TEFCON_FSIZE_MASK,</div><div class='add'>+			 tx_ring-&gt;obj_num - 1) |</div><div class='add'>+		MCP251XFD_REG_TEFCON_TEFTSEN |</div><div class='add'>+		MCP251XFD_REG_TEFCON_TEFOVIE |</div><div class='add'>+		MCP251XFD_REG_TEFCON_TEFNEIE;</div><div class='add'>+</div><div class='add'>+	err = regmap_write(priv-&gt;map_reg, MCP251XFD_REG_TEFCON, val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* TX FIFO */</div><div class='add'>+	val = FIELD_PREP(MCP251XFD_REG_FIFOCON_FSIZE_MASK,</div><div class='add'>+			 tx_ring-&gt;obj_num - 1) |</div><div class='add'>+		MCP251XFD_REG_FIFOCON_TXEN |</div><div class='add'>+		MCP251XFD_REG_FIFOCON_TXATIE;</div><div class='add'>+</div><div class='add'>+	if (mcp251xfd_is_fd_mode(priv))</div><div class='add'>+		val |= FIELD_PREP(MCP251XFD_REG_FIFOCON_PLSIZE_MASK,</div><div class='add'>+				  MCP251XFD_REG_FIFOCON_PLSIZE_64);</div><div class='add'>+	else</div><div class='add'>+		val |= FIELD_PREP(MCP251XFD_REG_FIFOCON_PLSIZE_MASK,</div><div class='add'>+				  MCP251XFD_REG_FIFOCON_PLSIZE_8);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_ONE_SHOT)</div><div class='add'>+		val |= FIELD_PREP(MCP251XFD_REG_FIFOCON_TXAT_MASK,</div><div class='add'>+				  MCP251XFD_REG_FIFOCON_TXAT_ONE_SHOT);</div><div class='add'>+	else</div><div class='add'>+		val |= FIELD_PREP(MCP251XFD_REG_FIFOCON_TXAT_MASK,</div><div class='add'>+				  MCP251XFD_REG_FIFOCON_TXAT_UNLIMITED);</div><div class='add'>+</div><div class='add'>+	err = regmap_write(priv-&gt;map_reg,</div><div class='add'>+			   MCP251XFD_REG_FIFOCON(priv-&gt;tx-&gt;fifo_nr),</div><div class='add'>+			   val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* RX FIFOs */</div><div class='add'>+	mcp251xfd_for_each_rx_ring(priv, rx_ring, n) {</div><div class='add'>+		err = mcp251xfd_chip_rx_fifo_init_one(priv, rx_ring);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		err = mcp251xfd_chip_rx_filter_init_one(priv, rx_ring);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c b/drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c<br/>new file mode 100644<br/>index 000000000000..5134ebb85880<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c</a></div><div class='hunk'>@@ -0,0 +1,2417 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+//</div><div class='add'>+// mcp251xfd - Microchip MCP251xFD Family CAN controller driver</div><div class='add'>+//</div><div class='add'>+// Copyright (c) 2019, 2020, 2021, 2023 Pengutronix,</div><div class='add'>+//               Marc Kleine-Budde &lt;kernel@pengutronix.de&gt;</div><div class='add'>+//</div><div class='add'>+// Based on:</div><div class='add'>+//</div><div class='add'>+// CAN bus driver for Microchip 25XXFD CAN Controller with SPI Interface</div><div class='add'>+//</div><div class='add'>+// Copyright (c) 2019 Martin Sperl &lt;kernel@martin.sperl.org&gt;</div><div class='add'>+//</div><div class='add'>+</div><div class='add'>+#include &lt;linux/unaligned.h&gt;</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/mod_devicetable.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/pm_runtime.h&gt;</div><div class='add'>+#include &lt;linux/property.h&gt;</div><div class='add'>+</div><div class='add'>+#include "mcp251xfd.h"</div><div class='add'>+</div><div class='add'>+#define DEVICE_NAME "mcp251xfd"</div><div class='add'>+</div><div class='add'>+static const struct mcp251xfd_devtype_data mcp251xfd_devtype_data_mcp2517fd = {</div><div class='add'>+	.quirks = MCP251XFD_QUIRK_MAB_NO_WARN | MCP251XFD_QUIRK_CRC_REG |</div><div class='add'>+		MCP251XFD_QUIRK_CRC_RX | MCP251XFD_QUIRK_CRC_TX |</div><div class='add'>+		MCP251XFD_QUIRK_ECC,</div><div class='add'>+	.model = MCP251XFD_MODEL_MCP2517FD,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct mcp251xfd_devtype_data mcp251xfd_devtype_data_mcp2518fd = {</div><div class='add'>+	.quirks = MCP251XFD_QUIRK_CRC_REG | MCP251XFD_QUIRK_CRC_RX |</div><div class='add'>+		MCP251XFD_QUIRK_CRC_TX | MCP251XFD_QUIRK_ECC,</div><div class='add'>+	.model = MCP251XFD_MODEL_MCP2518FD,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct mcp251xfd_devtype_data mcp251xfd_devtype_data_mcp251863 = {</div><div class='add'>+	.quirks = MCP251XFD_QUIRK_CRC_REG | MCP251XFD_QUIRK_CRC_RX |</div><div class='add'>+		MCP251XFD_QUIRK_CRC_TX | MCP251XFD_QUIRK_ECC,</div><div class='add'>+	.model = MCP251XFD_MODEL_MCP251863,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Autodetect model, start with CRC enabled. */</div><div class='add'>+static const struct mcp251xfd_devtype_data mcp251xfd_devtype_data_mcp251xfd = {</div><div class='add'>+	.quirks = MCP251XFD_QUIRK_CRC_REG | MCP251XFD_QUIRK_CRC_RX |</div><div class='add'>+		MCP251XFD_QUIRK_CRC_TX | MCP251XFD_QUIRK_ECC,</div><div class='add'>+	.model = MCP251XFD_MODEL_MCP251XFD,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const mcp251xfd_bittiming_const = {</div><div class='add'>+	.name = DEVICE_NAME,</div><div class='add'>+	.tseg1_min = 2,</div><div class='add'>+	.tseg1_max = 256,</div><div class='add'>+	.tseg2_min = 1,</div><div class='add'>+	.tseg2_max = 128,</div><div class='add'>+	.sjw_max = 128,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 256,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const mcp251xfd_data_bittiming_const = {</div><div class='add'>+	.name = DEVICE_NAME,</div><div class='add'>+	.tseg1_min = 1,</div><div class='add'>+	.tseg1_max = 32,</div><div class='add'>+	.tseg2_min = 1,</div><div class='add'>+	.tseg2_max = 16,</div><div class='add'>+	.sjw_max = 16,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 256,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* The datasheet of the mcp2518fd (DS20006027B) specifies a range of</div><div class='add'>+ * [-64,63] for TDCO, indicating a relative TDCO.</div><div class='add'>+ *</div><div class='add'>+ * Manual tests have shown, that using a relative TDCO configuration</div><div class='add'>+ * results in bus off, while an absolute configuration works.</div><div class='add'>+ *</div><div class='add'>+ * For TDCO use the max value (63) from the data sheet, but 0 as the</div><div class='add'>+ * minimum.</div><div class='add'>+ */</div><div class='add'>+static const struct can_tdc_const mcp251xfd_tdc_const = {</div><div class='add'>+	.tdcv_min = 0,</div><div class='add'>+	.tdcv_max = 63,</div><div class='add'>+	.tdco_min = 0,</div><div class='add'>+	.tdco_max = 63,</div><div class='add'>+	.tdcf_min = 0,</div><div class='add'>+	.tdcf_max = 0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char *__mcp251xfd_get_model_str(enum mcp251xfd_model model)</div><div class='add'>+{</div><div class='add'>+	switch (model) {</div><div class='add'>+	case MCP251XFD_MODEL_MCP2517FD:</div><div class='add'>+		return "MCP2517FD";</div><div class='add'>+	case MCP251XFD_MODEL_MCP2518FD:</div><div class='add'>+		return "MCP2518FD";</div><div class='add'>+	case MCP251XFD_MODEL_MCP251863:</div><div class='add'>+		return "MCP251863";</div><div class='add'>+	case MCP251XFD_MODEL_MCP251XFD:</div><div class='add'>+		return "MCP251xFD";</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return "&lt;unknown&gt;";</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline const char *</div><div class='add'>+mcp251xfd_get_model_str(const struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return __mcp251xfd_get_model_str(priv-&gt;devtype_data.model);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char *mcp251xfd_get_mode_str(const u8 mode)</div><div class='add'>+{</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case MCP251XFD_REG_CON_MODE_MIXED:</div><div class='add'>+		return "Mixed (CAN FD/CAN 2.0)";</div><div class='add'>+	case MCP251XFD_REG_CON_MODE_SLEEP:</div><div class='add'>+		return "Sleep";</div><div class='add'>+	case MCP251XFD_REG_CON_MODE_INT_LOOPBACK:</div><div class='add'>+		return "Internal Loopback";</div><div class='add'>+	case MCP251XFD_REG_CON_MODE_LISTENONLY:</div><div class='add'>+		return "Listen Only";</div><div class='add'>+	case MCP251XFD_REG_CON_MODE_CONFIG:</div><div class='add'>+		return "Configuration";</div><div class='add'>+	case MCP251XFD_REG_CON_MODE_EXT_LOOPBACK:</div><div class='add'>+		return "External Loopback";</div><div class='add'>+	case MCP251XFD_REG_CON_MODE_CAN2_0:</div><div class='add'>+		return "CAN 2.0";</div><div class='add'>+	case MCP251XFD_REG_CON_MODE_RESTRICTED:</div><div class='add'>+		return "Restricted Operation";</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return "&lt;unknown&gt;";</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char *</div><div class='add'>+mcp251xfd_get_osc_str(const u32 osc, const u32 osc_reference)</div><div class='add'>+{</div><div class='add'>+	switch (~osc &amp; osc_reference &amp;</div><div class='add'>+		(MCP251XFD_REG_OSC_OSCRDY | MCP251XFD_REG_OSC_PLLRDY)) {</div><div class='add'>+	case MCP251XFD_REG_OSC_PLLRDY:</div><div class='add'>+		return "PLL";</div><div class='add'>+	case MCP251XFD_REG_OSC_OSCRDY:</div><div class='add'>+		return "Oscillator";</div><div class='add'>+	case MCP251XFD_REG_OSC_PLLRDY | MCP251XFD_REG_OSC_OSCRDY:</div><div class='add'>+		return "Oscillator/PLL";</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return "&lt;unknown&gt;";</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int mcp251xfd_vdd_enable(const struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	if (!priv-&gt;reg_vdd)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return regulator_enable(priv-&gt;reg_vdd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int mcp251xfd_vdd_disable(const struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	if (!priv-&gt;reg_vdd)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return regulator_disable(priv-&gt;reg_vdd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int</div><div class='add'>+mcp251xfd_transceiver_enable(const struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	if (!priv-&gt;reg_xceiver)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return regulator_enable(priv-&gt;reg_xceiver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int</div><div class='add'>+mcp251xfd_transceiver_disable(const struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	if (!priv-&gt;reg_xceiver)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return regulator_disable(priv-&gt;reg_xceiver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_clks_and_vdd_enable(const struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = clk_prepare_enable(priv-&gt;clk);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_vdd_enable(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		clk_disable_unprepare(priv-&gt;clk);</div><div class='add'>+</div><div class='add'>+	/* Wait for oscillator stabilisation time after power up */</div><div class='add'>+	usleep_range(MCP251XFD_OSC_STAB_SLEEP_US,</div><div class='add'>+		     2 * MCP251XFD_OSC_STAB_SLEEP_US);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_clks_and_vdd_disable(const struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_vdd_disable(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	clk_disable_unprepare(priv-&gt;clk);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool mcp251xfd_reg_invalid(u32 reg)</div><div class='add'>+{</div><div class='add'>+	return reg == 0x0 || reg == 0xffffffff;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int</div><div class='add'>+mcp251xfd_chip_get_mode(const struct mcp251xfd_priv *priv, u8 *mode)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = regmap_read(priv-&gt;map_reg, MCP251XFD_REG_CON, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	*mode = FIELD_GET(MCP251XFD_REG_CON_OPMOD_MASK, val);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+__mcp251xfd_chip_set_mode(const struct mcp251xfd_priv *priv,</div><div class='add'>+			  const u8 mode_req, bool nowait)</div><div class='add'>+{</div><div class='add'>+	const struct can_bittiming *bt = &amp;priv-&gt;can.bittiming;</div><div class='add'>+	unsigned long timeout_us = MCP251XFD_POLL_TIMEOUT_US;</div><div class='add'>+	u32 con = 0, con_reqop, osc = 0;</div><div class='add'>+	u8 mode;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	con_reqop = FIELD_PREP(MCP251XFD_REG_CON_REQOP_MASK, mode_req);</div><div class='add'>+	err = regmap_update_bits(priv-&gt;map_reg, MCP251XFD_REG_CON,</div><div class='add'>+				 MCP251XFD_REG_CON_REQOP_MASK, con_reqop);</div><div class='add'>+	if (err == -EBADMSG) {</div><div class='add'>+		netdev_err(priv-&gt;ndev,</div><div class='add'>+			   "Failed to set Requested Operation Mode.\n");</div><div class='add'>+</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	} else if (err) {</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (mode_req == MCP251XFD_REG_CON_MODE_SLEEP || nowait)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (bt-&gt;bitrate)</div><div class='add'>+		timeout_us = max_t(unsigned long, timeout_us,</div><div class='add'>+				   MCP251XFD_FRAME_LEN_MAX_BITS * USEC_PER_SEC /</div><div class='add'>+				   bt-&gt;bitrate);</div><div class='add'>+</div><div class='add'>+	err = regmap_read_poll_timeout(priv-&gt;map_reg, MCP251XFD_REG_CON, con,</div><div class='add'>+				       !mcp251xfd_reg_invalid(con) &amp;&amp;</div><div class='add'>+				       FIELD_GET(MCP251XFD_REG_CON_OPMOD_MASK,</div><div class='add'>+						 con) == mode_req,</div><div class='add'>+				       MCP251XFD_POLL_SLEEP_US, timeout_us);</div><div class='add'>+	if (err != -ETIMEDOUT &amp;&amp; err != -EBADMSG)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Ignore return value.</div><div class='add'>+	 * Print below error messages, even if this fails.</div><div class='add'>+	 */</div><div class='add'>+	regmap_read(priv-&gt;map_reg, MCP251XFD_REG_OSC, &amp;osc);</div><div class='add'>+</div><div class='add'>+	if (mcp251xfd_reg_invalid(con)) {</div><div class='add'>+		netdev_err(priv-&gt;ndev,</div><div class='add'>+			   "Failed to read CAN Control Register (con=0x%08x, osc=0x%08x).\n",</div><div class='add'>+			   con, osc);</div><div class='add'>+</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mode = FIELD_GET(MCP251XFD_REG_CON_OPMOD_MASK, con);</div><div class='add'>+	netdev_err(priv-&gt;ndev,</div><div class='add'>+		   "Controller failed to enter mode %s Mode (%u) and stays in %s Mode (%u) (con=0x%08x, osc=0x%08x).\n",</div><div class='add'>+		   mcp251xfd_get_mode_str(mode_req), mode_req,</div><div class='add'>+		   mcp251xfd_get_mode_str(mode), mode,</div><div class='add'>+		   con, osc);</div><div class='add'>+</div><div class='add'>+	return -ETIMEDOUT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int</div><div class='add'>+mcp251xfd_chip_set_mode(const struct mcp251xfd_priv *priv,</div><div class='add'>+			const u8 mode_req)</div><div class='add'>+{</div><div class='add'>+	return __mcp251xfd_chip_set_mode(priv, mode_req, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int __maybe_unused</div><div class='add'>+mcp251xfd_chip_set_mode_nowait(const struct mcp251xfd_priv *priv,</div><div class='add'>+			       const u8 mode_req)</div><div class='add'>+{</div><div class='add'>+	return __mcp251xfd_chip_set_mode(priv, mode_req, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mcp251xfd_chip_wait_for_osc_ready(const struct mcp251xfd_priv *priv,</div><div class='add'>+				  u32 osc_reference, u32 osc_mask)</div><div class='add'>+{</div><div class='add'>+	u32 osc;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = regmap_read_poll_timeout(priv-&gt;map_reg, MCP251XFD_REG_OSC, osc,</div><div class='add'>+				       !mcp251xfd_reg_invalid(osc) &amp;&amp;</div><div class='add'>+				       (osc &amp; osc_mask) == osc_reference,</div><div class='add'>+				       MCP251XFD_OSC_STAB_SLEEP_US,</div><div class='add'>+				       MCP251XFD_OSC_STAB_TIMEOUT_US);</div><div class='add'>+	if (err != -ETIMEDOUT)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (mcp251xfd_reg_invalid(osc)) {</div><div class='add'>+		netdev_err(priv-&gt;ndev,</div><div class='add'>+			   "Failed to read Oscillator Configuration Register (osc=0x%08x).\n",</div><div class='add'>+			   osc);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev_err(priv-&gt;ndev,</div><div class='add'>+		   "Timeout waiting for %s ready (osc=0x%08x, osc_reference=0x%08x, osc_mask=0x%08x).\n",</div><div class='add'>+		   mcp251xfd_get_osc_str(osc, osc_reference),</div><div class='add'>+		   osc, osc_reference, osc_mask);</div><div class='add'>+</div><div class='add'>+	return -ETIMEDOUT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_chip_wake(const struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 osc, osc_reference, osc_mask;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* For normal sleep on MCP2517FD and MCP2518FD, clearing</div><div class='add'>+	 * "Oscillator Disable" will wake the chip. For low power mode</div><div class='add'>+	 * on MCP2518FD, asserting the chip select will wake the</div><div class='add'>+	 * chip. Writing to the Oscillator register will wake it in</div><div class='add'>+	 * both cases.</div><div class='add'>+	 */</div><div class='add'>+	osc = FIELD_PREP(MCP251XFD_REG_OSC_CLKODIV_MASK,</div><div class='add'>+			 MCP251XFD_REG_OSC_CLKODIV_10);</div><div class='add'>+</div><div class='add'>+	/* We cannot check for the PLL ready bit (either set or</div><div class='add'>+	 * unset), as the PLL might be enabled. This can happen if the</div><div class='add'>+	 * system reboots, while the mcp251xfd stays powered.</div><div class='add'>+	 */</div><div class='add'>+	osc_reference = MCP251XFD_REG_OSC_OSCRDY;</div><div class='add'>+	osc_mask = MCP251XFD_REG_OSC_OSCRDY;</div><div class='add'>+</div><div class='add'>+	/* If the controller is in Sleep Mode the following write only</div><div class='add'>+	 * removes the "Oscillator Disable" bit and powers it up. All</div><div class='add'>+	 * other bits are unaffected.</div><div class='add'>+	 */</div><div class='add'>+	err = regmap_write(priv-&gt;map_reg, MCP251XFD_REG_OSC, osc);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Sometimes the PLL is stuck enabled, the controller never</div><div class='add'>+	 * sets the OSC Ready bit, and we get an -ETIMEDOUT. Our</div><div class='add'>+	 * caller takes care of retry.</div><div class='add'>+	 */</div><div class='add'>+	return mcp251xfd_chip_wait_for_osc_ready(priv, osc_reference, osc_mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int mcp251xfd_chip_sleep(const struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	if (priv-&gt;pll_enable) {</div><div class='add'>+		u32 osc;</div><div class='add'>+		int err;</div><div class='add'>+</div><div class='add'>+		/* Turn off PLL */</div><div class='add'>+		osc = FIELD_PREP(MCP251XFD_REG_OSC_CLKODIV_MASK,</div><div class='add'>+				 MCP251XFD_REG_OSC_CLKODIV_10);</div><div class='add'>+		err = regmap_write(priv-&gt;map_reg, MCP251XFD_REG_OSC, osc);</div><div class='add'>+		if (err)</div><div class='add'>+			netdev_err(priv-&gt;ndev,</div><div class='add'>+				   "Failed to disable PLL.\n");</div><div class='add'>+</div><div class='add'>+		priv-&gt;spi-&gt;max_speed_hz = priv-&gt;spi_max_speed_hz_slow;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return mcp251xfd_chip_set_mode(priv, MCP251XFD_REG_CON_MODE_SLEEP);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_chip_softreset_do(const struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	const __be16 cmd = mcp251xfd_cmd_reset();</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* The Set Mode and SPI Reset command only works if the</div><div class='add'>+	 * controller is not in Sleep Mode.</div><div class='add'>+	 */</div><div class='add'>+	err = mcp251xfd_chip_wake(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_chip_set_mode(priv, MCP251XFD_REG_CON_MODE_CONFIG);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* spi_write_then_read() works with non DMA-safe buffers */</div><div class='add'>+	return spi_write_then_read(priv-&gt;spi, &amp;cmd, sizeof(cmd), NULL, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_chip_softreset_check(const struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 osc_reference, osc_mask;</div><div class='add'>+	u8 mode;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Check for reset defaults of OSC reg.</div><div class='add'>+	 * This will take care of stabilization period.</div><div class='add'>+	 */</div><div class='add'>+	osc_reference = MCP251XFD_REG_OSC_OSCRDY |</div><div class='add'>+		FIELD_PREP(MCP251XFD_REG_OSC_CLKODIV_MASK,</div><div class='add'>+			   MCP251XFD_REG_OSC_CLKODIV_10);</div><div class='add'>+	osc_mask = osc_reference | MCP251XFD_REG_OSC_PLLRDY;</div><div class='add'>+	err = mcp251xfd_chip_wait_for_osc_ready(priv, osc_reference, osc_mask);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_chip_get_mode(priv, &amp;mode);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (mode != MCP251XFD_REG_CON_MODE_CONFIG) {</div><div class='add'>+		netdev_info(priv-&gt;ndev,</div><div class='add'>+			    "Controller not in Config Mode after reset, but in %s Mode (%u).\n",</div><div class='add'>+			    mcp251xfd_get_mode_str(mode), mode);</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_chip_softreset(const struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int err, i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; MCP251XFD_SOFTRESET_RETRIES_MAX; i++) {</div><div class='add'>+		if (i)</div><div class='add'>+			netdev_info(priv-&gt;ndev,</div><div class='add'>+				    "Retrying to reset controller.\n");</div><div class='add'>+</div><div class='add'>+		err = mcp251xfd_chip_softreset_do(priv);</div><div class='add'>+		if (err == -ETIMEDOUT)</div><div class='add'>+			continue;</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		err = mcp251xfd_chip_softreset_check(priv);</div><div class='add'>+		if (err == -ETIMEDOUT)</div><div class='add'>+			continue;</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_chip_clock_init(const struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 osc, osc_reference, osc_mask;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Activate Low Power Mode on Oscillator Disable. This only</div><div class='add'>+	 * works on the MCP2518FD. The MCP2517FD will go into normal</div><div class='add'>+	 * Sleep Mode instead.</div><div class='add'>+	 */</div><div class='add'>+	osc = MCP251XFD_REG_OSC_LPMEN |</div><div class='add'>+		FIELD_PREP(MCP251XFD_REG_OSC_CLKODIV_MASK,</div><div class='add'>+			   MCP251XFD_REG_OSC_CLKODIV_10);</div><div class='add'>+	osc_reference = MCP251XFD_REG_OSC_OSCRDY;</div><div class='add'>+	osc_mask = MCP251XFD_REG_OSC_OSCRDY | MCP251XFD_REG_OSC_PLLRDY;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;pll_enable) {</div><div class='add'>+		osc |= MCP251XFD_REG_OSC_PLLEN;</div><div class='add'>+		osc_reference |= MCP251XFD_REG_OSC_PLLRDY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = regmap_write(priv-&gt;map_reg, MCP251XFD_REG_OSC, osc);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_chip_wait_for_osc_ready(priv, osc_reference, osc_mask);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	priv-&gt;spi-&gt;max_speed_hz = priv-&gt;spi_max_speed_hz_fast;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_chip_timestamp_init(const struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	/* Set Time Base Counter Prescaler to 1.</div><div class='add'>+	 *</div><div class='add'>+	 * This means an overflow of the 32 bit Time Base Counter</div><div class='add'>+	 * register at 40 MHz every 107 seconds.</div><div class='add'>+	 */</div><div class='add'>+	return regmap_write(priv-&gt;map_reg, MCP251XFD_REG_TSCON,</div><div class='add'>+			    MCP251XFD_REG_TSCON_TBCEN);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_set_bittiming(const struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	const struct can_bittiming *bt = &amp;priv-&gt;can.bittiming;</div><div class='add'>+	const struct can_bittiming *dbt = &amp;priv-&gt;can.fd.data_bittiming;</div><div class='add'>+	u32 tdcmod, val = 0;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* CAN Control Register</div><div class='add'>+	 *</div><div class='add'>+	 * - no transmit bandwidth sharing</div><div class='add'>+	 * - config mode</div><div class='add'>+	 * - disable transmit queue</div><div class='add'>+	 * - store in transmit FIFO event</div><div class='add'>+	 * - transition to restricted operation mode on system error</div><div class='add'>+	 * - ESI is transmitted recessive when ESI of message is high or</div><div class='add'>+	 *   CAN controller error passive</div><div class='add'>+	 * - restricted retransmission attempts,</div><div class='add'>+	 *   use TQXCON_TXAT and FIFOCON_TXAT</div><div class='add'>+	 * - wake-up filter bits T11FILTER</div><div class='add'>+	 * - use CAN bus line filter for wakeup</div><div class='add'>+	 * - protocol exception is treated as a form error</div><div class='add'>+	 * - Do not compare data bytes</div><div class='add'>+	 */</div><div class='add'>+	val = FIELD_PREP(MCP251XFD_REG_CON_REQOP_MASK,</div><div class='add'>+			 MCP251XFD_REG_CON_MODE_CONFIG) |</div><div class='add'>+		MCP251XFD_REG_CON_STEF |</div><div class='add'>+		MCP251XFD_REG_CON_ESIGM |</div><div class='add'>+		MCP251XFD_REG_CON_RTXAT |</div><div class='add'>+		FIELD_PREP(MCP251XFD_REG_CON_WFT_MASK,</div><div class='add'>+			   MCP251XFD_REG_CON_WFT_T11FILTER) |</div><div class='add'>+		MCP251XFD_REG_CON_WAKFIL |</div><div class='add'>+		MCP251XFD_REG_CON_PXEDIS;</div><div class='add'>+</div><div class='add'>+	if (!(priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD_NON_ISO))</div><div class='add'>+		val |= MCP251XFD_REG_CON_ISOCRCEN;</div><div class='add'>+</div><div class='add'>+	err = regmap_write(priv-&gt;map_reg, MCP251XFD_REG_CON, val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Nominal Bit Time */</div><div class='add'>+	val = FIELD_PREP(MCP251XFD_REG_NBTCFG_BRP_MASK, bt-&gt;brp - 1) |</div><div class='add'>+		FIELD_PREP(MCP251XFD_REG_NBTCFG_TSEG1_MASK,</div><div class='add'>+			   bt-&gt;prop_seg + bt-&gt;phase_seg1 - 1) |</div><div class='add'>+		FIELD_PREP(MCP251XFD_REG_NBTCFG_TSEG2_MASK,</div><div class='add'>+			   bt-&gt;phase_seg2 - 1) |</div><div class='add'>+		FIELD_PREP(MCP251XFD_REG_NBTCFG_SJW_MASK, bt-&gt;sjw - 1);</div><div class='add'>+</div><div class='add'>+	err = regmap_write(priv-&gt;map_reg, MCP251XFD_REG_NBTCFG, val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (!(priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Data Bit Time */</div><div class='add'>+	val = FIELD_PREP(MCP251XFD_REG_DBTCFG_BRP_MASK, dbt-&gt;brp - 1) |</div><div class='add'>+		FIELD_PREP(MCP251XFD_REG_DBTCFG_TSEG1_MASK,</div><div class='add'>+			   dbt-&gt;prop_seg + dbt-&gt;phase_seg1 - 1) |</div><div class='add'>+		FIELD_PREP(MCP251XFD_REG_DBTCFG_TSEG2_MASK,</div><div class='add'>+			   dbt-&gt;phase_seg2 - 1) |</div><div class='add'>+		FIELD_PREP(MCP251XFD_REG_DBTCFG_SJW_MASK, dbt-&gt;sjw - 1);</div><div class='add'>+</div><div class='add'>+	err = regmap_write(priv-&gt;map_reg, MCP251XFD_REG_DBTCFG, val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Transmitter Delay Compensation */</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_TDC_AUTO)</div><div class='add'>+		tdcmod = MCP251XFD_REG_TDC_TDCMOD_AUTO;</div><div class='add'>+	else if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_TDC_MANUAL)</div><div class='add'>+		tdcmod = MCP251XFD_REG_TDC_TDCMOD_MANUAL;</div><div class='add'>+	else</div><div class='add'>+		tdcmod = MCP251XFD_REG_TDC_TDCMOD_DISABLED;</div><div class='add'>+</div><div class='add'>+	val = FIELD_PREP(MCP251XFD_REG_TDC_TDCMOD_MASK, tdcmod) |</div><div class='add'>+	      FIELD_PREP(MCP251XFD_REG_TDC_TDCV_MASK, priv-&gt;can.fd.tdc.tdcv) |</div><div class='add'>+	      FIELD_PREP(MCP251XFD_REG_TDC_TDCO_MASK, priv-&gt;can.fd.tdc.tdco);</div><div class='add'>+</div><div class='add'>+	return regmap_write(priv-&gt;map_reg, MCP251XFD_REG_TDC, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_chip_rx_int_enable(const struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 val, mask;</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;rx_int)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Configure PIN1 as RX Interrupt:</div><div class='add'>+	 *</div><div class='add'>+	 * PIN1 must be Input, otherwise there is a glitch on the</div><div class='add'>+	 * rx-INT line. It happens between setting the PIN as output</div><div class='add'>+	 * (in the first byte of the SPI transfer) and configuring the</div><div class='add'>+	 * PIN as interrupt (in the last byte of the SPI transfer).</div><div class='add'>+	 */</div><div class='add'>+	val = MCP251XFD_REG_IOCON_TRIS(1);</div><div class='add'>+	mask = MCP251XFD_REG_IOCON_TRIS(1) | MCP251XFD_REG_IOCON_PM(1);</div><div class='add'>+	return regmap_update_bits(priv-&gt;map_reg, MCP251XFD_REG_IOCON, mask, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_chip_rx_int_disable(const struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;rx_int)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Configure PIN1 as GPIO Input */</div><div class='add'>+	val = MCP251XFD_REG_IOCON_PM(1) | MCP251XFD_REG_IOCON_TRIS(1);</div><div class='add'>+	return regmap_update_bits(priv-&gt;map_reg, MCP251XFD_REG_IOCON, val, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_chip_ecc_init(struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_ecc *ecc = &amp;priv-&gt;ecc;</div><div class='add'>+	void *ram;</div><div class='add'>+	u32 val = 0;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	ecc-&gt;ecc_stat = 0;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; MCP251XFD_QUIRK_ECC)</div><div class='add'>+		val = MCP251XFD_REG_ECCCON_ECCEN;</div><div class='add'>+</div><div class='add'>+	err = regmap_update_bits(priv-&gt;map_reg, MCP251XFD_REG_ECCCON,</div><div class='add'>+				 MCP251XFD_REG_ECCCON_ECCEN, val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	ram = kzalloc(MCP251XFD_RAM_SIZE, GFP_KERNEL);</div><div class='add'>+	if (!ram)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	err = regmap_raw_write(priv-&gt;map_reg, MCP251XFD_RAM_START, ram,</div><div class='add'>+			       MCP251XFD_RAM_SIZE);</div><div class='add'>+	kfree(ram);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 mcp251xfd_get_normal_mode(const struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u8 mode;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LOOPBACK)</div><div class='add'>+		mode = MCP251XFD_REG_CON_MODE_INT_LOOPBACK;</div><div class='add'>+	else if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LISTENONLY)</div><div class='add'>+		mode = MCP251XFD_REG_CON_MODE_LISTENONLY;</div><div class='add'>+	else if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD)</div><div class='add'>+		mode = MCP251XFD_REG_CON_MODE_MIXED;</div><div class='add'>+	else</div><div class='add'>+		mode = MCP251XFD_REG_CON_MODE_CAN2_0;</div><div class='add'>+</div><div class='add'>+	return mode;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+__mcp251xfd_chip_set_normal_mode(const struct mcp251xfd_priv *priv,</div><div class='add'>+				 bool nowait)</div><div class='add'>+{</div><div class='add'>+	u8 mode;</div><div class='add'>+</div><div class='add'>+	mode = mcp251xfd_get_normal_mode(priv);</div><div class='add'>+</div><div class='add'>+	return __mcp251xfd_chip_set_mode(priv, mode, nowait);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int</div><div class='add'>+mcp251xfd_chip_set_normal_mode(const struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return __mcp251xfd_chip_set_normal_mode(priv, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int</div><div class='add'>+mcp251xfd_chip_set_normal_mode_nowait(const struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return __mcp251xfd_chip_set_normal_mode(priv, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_chip_interrupts_enable(const struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	val = MCP251XFD_REG_CRC_FERRIE | MCP251XFD_REG_CRC_CRCERRIE;</div><div class='add'>+	err = regmap_write(priv-&gt;map_reg, MCP251XFD_REG_CRC, val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	val = MCP251XFD_REG_ECCCON_DEDIE | MCP251XFD_REG_ECCCON_SECIE;</div><div class='add'>+	err = regmap_update_bits(priv-&gt;map_reg, MCP251XFD_REG_ECCCON, val, val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	val = MCP251XFD_REG_INT_CERRIE |</div><div class='add'>+		MCP251XFD_REG_INT_SERRIE |</div><div class='add'>+		MCP251XFD_REG_INT_RXOVIE |</div><div class='add'>+		MCP251XFD_REG_INT_TXATIE |</div><div class='add'>+		MCP251XFD_REG_INT_SPICRCIE |</div><div class='add'>+		MCP251XFD_REG_INT_ECCIE |</div><div class='add'>+		MCP251XFD_REG_INT_TEFIE |</div><div class='add'>+		MCP251XFD_REG_INT_MODIE |</div><div class='add'>+		MCP251XFD_REG_INT_RXIE;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING)</div><div class='add'>+		val |= MCP251XFD_REG_INT_IVMIE;</div><div class='add'>+</div><div class='add'>+	return regmap_write(priv-&gt;map_reg, MCP251XFD_REG_INT, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_chip_interrupts_disable(const struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	u32 mask;</div><div class='add'>+</div><div class='add'>+	err = regmap_write(priv-&gt;map_reg, MCP251XFD_REG_INT, 0);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	mask = MCP251XFD_REG_ECCCON_DEDIE | MCP251XFD_REG_ECCCON_SECIE;</div><div class='add'>+	err = regmap_update_bits(priv-&gt;map_reg, MCP251XFD_REG_ECCCON,</div><div class='add'>+				 mask, 0x0);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return regmap_write(priv-&gt;map_reg, MCP251XFD_REG_CRC, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mcp251xfd_chip_stop(struct mcp251xfd_priv *priv,</div><div class='add'>+				const enum can_state state)</div><div class='add'>+{</div><div class='add'>+	priv-&gt;can.state = state;</div><div class='add'>+</div><div class='add'>+	mcp251xfd_chip_interrupts_disable(priv);</div><div class='add'>+	mcp251xfd_chip_rx_int_disable(priv);</div><div class='add'>+	mcp251xfd_timestamp_stop(priv);</div><div class='add'>+	mcp251xfd_chip_set_mode(priv, MCP251XFD_REG_CON_MODE_CONFIG);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_chip_start(struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_chip_timestamp_init(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_chip_stop;</div><div class='add'>+</div><div class='add'>+	mcp251xfd_timestamp_start(priv);</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_set_bittiming(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_chip_stop;</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_chip_rx_int_enable(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_chip_stop;</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_chip_ecc_init(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_chip_stop;</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_ring_init(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_chip_stop;</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_chip_fifo_init(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_chip_stop;</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_chip_set_normal_mode(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_chip_stop;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_chip_stop:</div><div class='add'>+	mcp251xfd_dump(priv);</div><div class='add'>+	mcp251xfd_chip_stop(priv, CAN_STATE_STOPPED);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_set_mode(struct net_device *ndev, enum can_mode mode)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case CAN_MODE_START:</div><div class='add'>+		err = mcp251xfd_chip_start(priv);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		err = mcp251xfd_chip_interrupts_enable(priv);</div><div class='add'>+		if (err) {</div><div class='add'>+			mcp251xfd_chip_stop(priv, CAN_STATE_STOPPED);</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		netif_wake_queue(ndev);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __mcp251xfd_get_berr_counter(const struct net_device *ndev,</div><div class='add'>+					struct can_berr_counter *bec)</div><div class='add'>+{</div><div class='add'>+	const struct mcp251xfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	u32 trec;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = regmap_read(priv-&gt;map_reg, MCP251XFD_REG_TREC, &amp;trec);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (trec &amp; MCP251XFD_REG_TREC_TXBO)</div><div class='add'>+		bec-&gt;txerr = CAN_BUS_OFF_THRESHOLD;</div><div class='add'>+	else</div><div class='add'>+		bec-&gt;txerr = FIELD_GET(MCP251XFD_REG_TREC_TEC_MASK, trec);</div><div class='add'>+	bec-&gt;rxerr = FIELD_GET(MCP251XFD_REG_TREC_REC_MASK, trec);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_get_berr_counter(const struct net_device *ndev,</div><div class='add'>+				      struct can_berr_counter *bec)</div><div class='add'>+{</div><div class='add'>+	const struct mcp251xfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	/* Avoid waking up the controller if the interface is down */</div><div class='add'>+	if (!(ndev-&gt;flags &amp; IFF_UP))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* The controller is powered down during Bus Off, use saved</div><div class='add'>+	 * bec values.</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;can.state == CAN_STATE_BUS_OFF) {</div><div class='add'>+		*bec = priv-&gt;bec;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return __mcp251xfd_get_berr_counter(ndev, bec);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct sk_buff *</div><div class='add'>+mcp251xfd_alloc_can_err_skb(struct mcp251xfd_priv *priv,</div><div class='add'>+			    struct can_frame **cf, u32 *ts_raw)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_get_timestamp_raw(priv, ts_raw);</div><div class='add'>+	if (err)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_err_skb(priv-&gt;ndev, cf);</div><div class='add'>+	if (skb)</div><div class='add'>+		mcp251xfd_skb_set_timestamp_raw(priv, skb, *ts_raw);</div><div class='add'>+</div><div class='add'>+	return skb;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_handle_rxovif(struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct net_device_stats *stats = &amp;priv-&gt;ndev-&gt;stats;</div><div class='add'>+	struct mcp251xfd_rx_ring *ring;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	u32 ts_raw, rxovif;</div><div class='add'>+	int err, i;</div><div class='add'>+</div><div class='add'>+	stats-&gt;rx_over_errors++;</div><div class='add'>+	stats-&gt;rx_errors++;</div><div class='add'>+</div><div class='add'>+	err = regmap_read(priv-&gt;map_reg, MCP251XFD_REG_RXOVIF, &amp;rxovif);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	mcp251xfd_for_each_rx_ring(priv, ring, i) {</div><div class='add'>+		if (!(rxovif &amp; BIT(ring-&gt;fifo_nr)))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* If SERRIF is active, there was a RX MAB overflow. */</div><div class='add'>+		if (priv-&gt;regs_status.intf &amp; MCP251XFD_REG_INT_SERRIF) {</div><div class='add'>+			if (net_ratelimit())</div><div class='add'>+				netdev_dbg(priv-&gt;ndev,</div><div class='add'>+					   "RX-%d: MAB overflow detected.\n",</div><div class='add'>+					   ring-&gt;nr);</div><div class='add'>+		} else {</div><div class='add'>+			if (net_ratelimit())</div><div class='add'>+				netdev_dbg(priv-&gt;ndev,</div><div class='add'>+					   "RX-%d: FIFO overflow.\n",</div><div class='add'>+					   ring-&gt;nr);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = regmap_update_bits(priv-&gt;map_reg,</div><div class='add'>+					 MCP251XFD_REG_FIFOSTA(ring-&gt;fifo_nr),</div><div class='add'>+					 MCP251XFD_REG_FIFOSTA_RXOVIF,</div><div class='add'>+					 0x0);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb = mcp251xfd_alloc_can_err_skb(priv, &amp;cf, &amp;ts_raw);</div><div class='add'>+	if (!skb)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='add'>+	cf-&gt;data[1] = CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='add'>+</div><div class='add'>+	err = can_rx_offload_queue_timestamp(&amp;priv-&gt;offload, skb, ts_raw);</div><div class='add'>+	if (err)</div><div class='add'>+		stats-&gt;rx_fifo_errors++;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_handle_txatif(struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	netdev_info(priv-&gt;ndev, "%s\n", __func__);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_handle_ivmif(struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct net_device_stats *stats = &amp;priv-&gt;ndev-&gt;stats;</div><div class='add'>+	u32 bdiag1, ts_raw;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct can_frame *cf = NULL;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_get_timestamp_raw(priv, &amp;ts_raw);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = regmap_read(priv-&gt;map_reg, MCP251XFD_REG_BDIAG1, &amp;bdiag1);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Write 0s to clear error bits, don't write 1s to non active</div><div class='add'>+	 * bits, as they will be set.</div><div class='add'>+	 */</div><div class='add'>+	err = regmap_write(priv-&gt;map_reg, MCP251XFD_REG_BDIAG1, 0x0);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.can_stats.bus_error++;</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_err_skb(priv-&gt;ndev, &amp;cf);</div><div class='add'>+	if (cf)</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='add'>+</div><div class='add'>+	/* Controller misconfiguration */</div><div class='add'>+	if (WARN_ON(bdiag1 &amp; MCP251XFD_REG_BDIAG1_DLCMM))</div><div class='add'>+		netdev_err(priv-&gt;ndev,</div><div class='add'>+			   "recv'd DLC is larger than PLSIZE of FIFO element.");</div><div class='add'>+</div><div class='add'>+	/* RX errors */</div><div class='add'>+	if (bdiag1 &amp; (MCP251XFD_REG_BDIAG1_DCRCERR |</div><div class='add'>+		      MCP251XFD_REG_BDIAG1_NCRCERR)) {</div><div class='add'>+		netdev_dbg(priv-&gt;ndev, "CRC error\n");</div><div class='add'>+</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+		if (cf)</div><div class='add'>+			cf-&gt;data[3] |= CAN_ERR_PROT_LOC_CRC_SEQ;</div><div class='add'>+	}</div><div class='add'>+	if (bdiag1 &amp; (MCP251XFD_REG_BDIAG1_DSTUFERR |</div><div class='add'>+		      MCP251XFD_REG_BDIAG1_NSTUFERR)) {</div><div class='add'>+		netdev_dbg(priv-&gt;ndev, "Stuff error\n");</div><div class='add'>+</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+		if (cf)</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='add'>+	}</div><div class='add'>+	if (bdiag1 &amp; (MCP251XFD_REG_BDIAG1_DFORMERR |</div><div class='add'>+		      MCP251XFD_REG_BDIAG1_NFORMERR)) {</div><div class='add'>+		netdev_dbg(priv-&gt;ndev, "Format error\n");</div><div class='add'>+</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+		if (cf)</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* TX errors */</div><div class='add'>+	if (bdiag1 &amp; MCP251XFD_REG_BDIAG1_NACKERR) {</div><div class='add'>+		netdev_dbg(priv-&gt;ndev, "NACK error\n");</div><div class='add'>+</div><div class='add'>+		stats-&gt;tx_errors++;</div><div class='add'>+		if (cf) {</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_ACK;</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_TX;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	if (bdiag1 &amp; (MCP251XFD_REG_BDIAG1_DBIT1ERR |</div><div class='add'>+		      MCP251XFD_REG_BDIAG1_NBIT1ERR)) {</div><div class='add'>+		netdev_dbg(priv-&gt;ndev, "Bit1 error\n");</div><div class='add'>+</div><div class='add'>+		stats-&gt;tx_errors++;</div><div class='add'>+		if (cf)</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_TX | CAN_ERR_PROT_BIT1;</div><div class='add'>+	}</div><div class='add'>+	if (bdiag1 &amp; (MCP251XFD_REG_BDIAG1_DBIT0ERR |</div><div class='add'>+		      MCP251XFD_REG_BDIAG1_NBIT0ERR)) {</div><div class='add'>+		netdev_dbg(priv-&gt;ndev, "Bit0 error\n");</div><div class='add'>+</div><div class='add'>+		stats-&gt;tx_errors++;</div><div class='add'>+		if (cf)</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_TX | CAN_ERR_PROT_BIT0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!cf)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	mcp251xfd_skb_set_timestamp_raw(priv, skb, ts_raw);</div><div class='add'>+	err = can_rx_offload_queue_timestamp(&amp;priv-&gt;offload, skb, ts_raw);</div><div class='add'>+	if (err)</div><div class='add'>+		stats-&gt;rx_fifo_errors++;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_handle_cerrif(struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct net_device_stats *stats = &amp;priv-&gt;ndev-&gt;stats;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct can_frame *cf = NULL;</div><div class='add'>+	enum can_state new_state, rx_state, tx_state;</div><div class='add'>+	u32 trec, ts_raw;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = regmap_read(priv-&gt;map_reg, MCP251XFD_REG_TREC, &amp;trec);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (trec &amp; MCP251XFD_REG_TREC_TXBO)</div><div class='add'>+		tx_state = CAN_STATE_BUS_OFF;</div><div class='add'>+	else if (trec &amp; MCP251XFD_REG_TREC_TXBP)</div><div class='add'>+		tx_state = CAN_STATE_ERROR_PASSIVE;</div><div class='add'>+	else if (trec &amp; MCP251XFD_REG_TREC_TXWARN)</div><div class='add'>+		tx_state = CAN_STATE_ERROR_WARNING;</div><div class='add'>+	else</div><div class='add'>+		tx_state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+</div><div class='add'>+	if (trec &amp; MCP251XFD_REG_TREC_RXBP)</div><div class='add'>+		rx_state = CAN_STATE_ERROR_PASSIVE;</div><div class='add'>+	else if (trec &amp; MCP251XFD_REG_TREC_RXWARN)</div><div class='add'>+		rx_state = CAN_STATE_ERROR_WARNING;</div><div class='add'>+	else</div><div class='add'>+		rx_state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+</div><div class='add'>+	new_state = max(tx_state, rx_state);</div><div class='add'>+	if (new_state == priv-&gt;can.state)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* The skb allocation might fail, but can_change_state()</div><div class='add'>+	 * handles cf == NULL.</div><div class='add'>+	 */</div><div class='add'>+	skb = mcp251xfd_alloc_can_err_skb(priv, &amp;cf, &amp;ts_raw);</div><div class='add'>+	can_change_state(priv-&gt;ndev, cf, tx_state, rx_state);</div><div class='add'>+</div><div class='add'>+	if (new_state == CAN_STATE_BUS_OFF) {</div><div class='add'>+		/* As we're going to switch off the chip now, let's</div><div class='add'>+		 * save the error counters and return them to</div><div class='add'>+		 * userspace, if do_get_berr_counter() is called while</div><div class='add'>+		 * the chip is in Bus Off.</div><div class='add'>+		 */</div><div class='add'>+		err = __mcp251xfd_get_berr_counter(priv-&gt;ndev, &amp;priv-&gt;bec);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		mcp251xfd_chip_stop(priv, CAN_STATE_BUS_OFF);</div><div class='add'>+		can_bus_off(priv-&gt;ndev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!skb)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (new_state != CAN_STATE_BUS_OFF) {</div><div class='add'>+		struct can_berr_counter bec;</div><div class='add'>+</div><div class='add'>+		err = mcp251xfd_get_berr_counter(priv-&gt;ndev, &amp;bec);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_CNT;</div><div class='add'>+		cf-&gt;data[6] = bec.txerr;</div><div class='add'>+		cf-&gt;data[7] = bec.rxerr;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = can_rx_offload_queue_timestamp(&amp;priv-&gt;offload, skb, ts_raw);</div><div class='add'>+	if (err)</div><div class='add'>+		stats-&gt;rx_fifo_errors++;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mcp251xfd_handle_modif(const struct mcp251xfd_priv *priv, bool *set_normal_mode)</div><div class='add'>+{</div><div class='add'>+	const u8 mode_reference = mcp251xfd_get_normal_mode(priv);</div><div class='add'>+	u8 mode;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_chip_get_mode(priv, &amp;mode);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (mode == mode_reference) {</div><div class='add'>+		netdev_dbg(priv-&gt;ndev,</div><div class='add'>+			   "Controller changed into %s Mode (%u).\n",</div><div class='add'>+			   mcp251xfd_get_mode_str(mode), mode);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* According to MCP2517FD errata DS80000792C 1., during a TX</div><div class='add'>+	 * MAB underflow, the controller will transition to Restricted</div><div class='add'>+	 * Operation Mode or Listen Only Mode (depending on SERR2LOM).</div><div class='add'>+	 *</div><div class='add'>+	 * However this is not always the case. If SERR2LOM is</div><div class='add'>+	 * configured for Restricted Operation Mode (SERR2LOM not set)</div><div class='add'>+	 * the MCP2517FD will sometimes transition to Listen Only Mode</div><div class='add'>+	 * first. When polling this bit we see that it will transition</div><div class='add'>+	 * to Restricted Operation Mode shortly after.</div><div class='add'>+	 */</div><div class='add'>+	if ((priv-&gt;devtype_data.quirks &amp; MCP251XFD_QUIRK_MAB_NO_WARN) &amp;&amp;</div><div class='add'>+	    (mode == MCP251XFD_REG_CON_MODE_RESTRICTED ||</div><div class='add'>+	     mode == MCP251XFD_REG_CON_MODE_LISTENONLY))</div><div class='add'>+		netdev_dbg(priv-&gt;ndev,</div><div class='add'>+			   "Controller changed into %s Mode (%u).\n",</div><div class='add'>+			   mcp251xfd_get_mode_str(mode), mode);</div><div class='add'>+	else</div><div class='add'>+		netdev_err(priv-&gt;ndev,</div><div class='add'>+			   "Controller changed into %s Mode (%u).\n",</div><div class='add'>+			   mcp251xfd_get_mode_str(mode), mode);</div><div class='add'>+</div><div class='add'>+	/* After the application requests Normal mode, the controller</div><div class='add'>+	 * will automatically attempt to retransmit the message that</div><div class='add'>+	 * caused the TX MAB underflow.</div><div class='add'>+	 *</div><div class='add'>+	 * However, if there is an ECC error in the TX-RAM, we first</div><div class='add'>+	 * have to reload the tx-object before requesting Normal</div><div class='add'>+	 * mode. This is done later in mcp251xfd_handle_eccif().</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;regs_status.intf &amp; MCP251XFD_REG_INT_ECCIF) {</div><div class='add'>+		*set_normal_mode = true;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return mcp251xfd_chip_set_normal_mode_nowait(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_handle_serrif(struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_ecc *ecc = &amp;priv-&gt;ecc;</div><div class='add'>+	struct net_device_stats *stats = &amp;priv-&gt;ndev-&gt;stats;</div><div class='add'>+	bool handled = false;</div><div class='add'>+</div><div class='add'>+	/* TX MAB underflow</div><div class='add'>+	 *</div><div class='add'>+	 * According to MCP2517FD Errata DS80000792C 1. a TX MAB</div><div class='add'>+	 * underflow is indicated by SERRIF and MODIF.</div><div class='add'>+	 *</div><div class='add'>+	 * In addition to the effects mentioned in the Errata, there</div><div class='add'>+	 * are Bus Errors due to the aborted CAN frame, so a IVMIF</div><div class='add'>+	 * will be seen as well.</div><div class='add'>+	 *</div><div class='add'>+	 * Sometimes there is an ECC error in the TX-RAM, which leads</div><div class='add'>+	 * to a TX MAB underflow.</div><div class='add'>+	 *</div><div class='add'>+	 * However, probably due to a race condition, there is no</div><div class='add'>+	 * associated MODIF pending.</div><div class='add'>+	 *</div><div class='add'>+	 * Further, there are situations, where the SERRIF is caused</div><div class='add'>+	 * by an ECC error in the TX-RAM, but not even the ECCIF is</div><div class='add'>+	 * set. This only seems to happen _after_ the first occurrence</div><div class='add'>+	 * of a ECCIF (which is tracked in ecc-&gt;cnt).</div><div class='add'>+	 *</div><div class='add'>+	 * Treat all as a known system errors..</div><div class='add'>+	 */</div><div class='add'>+	if ((priv-&gt;regs_status.intf &amp; MCP251XFD_REG_INT_MODIF &amp;&amp;</div><div class='add'>+	     priv-&gt;regs_status.intf &amp; MCP251XFD_REG_INT_IVMIF) ||</div><div class='add'>+	    priv-&gt;regs_status.intf &amp; MCP251XFD_REG_INT_ECCIF ||</div><div class='add'>+	    ecc-&gt;cnt) {</div><div class='add'>+		const char *msg;</div><div class='add'>+</div><div class='add'>+		if (priv-&gt;regs_status.intf &amp; MCP251XFD_REG_INT_ECCIF ||</div><div class='add'>+		    ecc-&gt;cnt)</div><div class='add'>+			msg = "TX MAB underflow due to ECC error detected.";</div><div class='add'>+		else</div><div class='add'>+			msg = "TX MAB underflow detected.";</div><div class='add'>+</div><div class='add'>+		if (priv-&gt;devtype_data.quirks &amp; MCP251XFD_QUIRK_MAB_NO_WARN)</div><div class='add'>+			netdev_dbg(priv-&gt;ndev, "%s\n", msg);</div><div class='add'>+		else</div><div class='add'>+			netdev_info(priv-&gt;ndev, "%s\n", msg);</div><div class='add'>+</div><div class='add'>+		stats-&gt;tx_aborted_errors++;</div><div class='add'>+		stats-&gt;tx_errors++;</div><div class='add'>+		handled = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* RX MAB overflow</div><div class='add'>+	 *</div><div class='add'>+	 * According to MCP2517FD Errata DS80000792C 1. a RX MAB</div><div class='add'>+	 * overflow is indicated by SERRIF.</div><div class='add'>+	 *</div><div class='add'>+	 * In addition to the effects mentioned in the Errata, (most</div><div class='add'>+	 * of the times) a RXOVIF is raised, if the FIFO that is being</div><div class='add'>+	 * received into has the RXOVIE activated (and we have enabled</div><div class='add'>+	 * RXOVIE on all FIFOs).</div><div class='add'>+	 *</div><div class='add'>+	 * Sometimes there is no RXOVIF just a RXIF is pending.</div><div class='add'>+	 *</div><div class='add'>+	 * Treat all as a known system errors..</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;regs_status.intf &amp; MCP251XFD_REG_INT_RXOVIF ||</div><div class='add'>+	    priv-&gt;regs_status.intf &amp; MCP251XFD_REG_INT_RXIF) {</div><div class='add'>+		stats-&gt;rx_dropped++;</div><div class='add'>+		handled = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!handled)</div><div class='add'>+		netdev_err(priv-&gt;ndev,</div><div class='add'>+			   "Unhandled System Error Interrupt (intf=0x%08x)!\n",</div><div class='add'>+			   priv-&gt;regs_status.intf);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mcp251xfd_handle_eccif_recover(struct mcp251xfd_priv *priv, u8 nr)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_tx_ring *tx_ring = priv-&gt;tx;</div><div class='add'>+	struct mcp251xfd_ecc *ecc = &amp;priv-&gt;ecc;</div><div class='add'>+	struct mcp251xfd_tx_obj *tx_obj;</div><div class='add'>+	u8 chip_tx_tail, tx_tail, offset;</div><div class='add'>+	u16 addr;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	addr = FIELD_GET(MCP251XFD_REG_ECCSTAT_ERRADDR_MASK, ecc-&gt;ecc_stat);</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_tx_tail_get_from_chip(priv, &amp;chip_tx_tail);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	tx_tail = mcp251xfd_get_tx_tail(tx_ring);</div><div class='add'>+	offset = (nr - chip_tx_tail) &amp; (tx_ring-&gt;obj_num - 1);</div><div class='add'>+</div><div class='add'>+	/* Bail out if one of the following is met:</div><div class='add'>+	 * - tx_tail information is inconsistent</div><div class='add'>+	 * - for mcp2517fd: offset not 0</div><div class='add'>+	 * - for mcp2518fd: offset not 0 or 1</div><div class='add'>+	 */</div><div class='add'>+	if (chip_tx_tail != tx_tail ||</div><div class='add'>+	    !(offset == 0 || (offset == 1 &amp;&amp; (mcp251xfd_is_2518FD(priv) ||</div><div class='add'>+					      mcp251xfd_is_251863(priv))))) {</div><div class='add'>+		netdev_err(priv-&gt;ndev,</div><div class='add'>+			   "ECC Error information inconsistent (addr=0x%04x, nr=%d, tx_tail=0x%08x(%d), chip_tx_tail=%d, offset=%d).\n",</div><div class='add'>+			   addr, nr, tx_ring-&gt;tail, tx_tail, chip_tx_tail,</div><div class='add'>+			   offset);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev_info(priv-&gt;ndev,</div><div class='add'>+		    "Recovering %s ECC Error at address 0x%04x (in TX-RAM, tx_obj=%d, tx_tail=0x%08x(%d), offset=%d).\n",</div><div class='add'>+		    ecc-&gt;ecc_stat &amp; MCP251XFD_REG_ECCSTAT_SECIF ?</div><div class='add'>+		    "Single" : "Double",</div><div class='add'>+		    addr, nr, tx_ring-&gt;tail, tx_tail, offset);</div><div class='add'>+</div><div class='add'>+	/* reload tx_obj into controller RAM ... */</div><div class='add'>+	tx_obj = &amp;tx_ring-&gt;obj[nr];</div><div class='add'>+	err = spi_sync_transfer(priv-&gt;spi, tx_obj-&gt;xfer, 1);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* ... and trigger retransmit */</div><div class='add'>+	return mcp251xfd_chip_set_normal_mode(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mcp251xfd_handle_eccif(struct mcp251xfd_priv *priv, bool set_normal_mode)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_ecc *ecc = &amp;priv-&gt;ecc;</div><div class='add'>+	const char *msg;</div><div class='add'>+	bool in_tx_ram;</div><div class='add'>+	u32 ecc_stat;</div><div class='add'>+	u16 addr;</div><div class='add'>+	u8 nr;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = regmap_read(priv-&gt;map_reg, MCP251XFD_REG_ECCSTAT, &amp;ecc_stat);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = regmap_update_bits(priv-&gt;map_reg, MCP251XFD_REG_ECCSTAT,</div><div class='add'>+				 MCP251XFD_REG_ECCSTAT_IF_MASK, ~ecc_stat);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Check if ECC error occurred in TX-RAM */</div><div class='add'>+	addr = FIELD_GET(MCP251XFD_REG_ECCSTAT_ERRADDR_MASK, ecc_stat);</div><div class='add'>+	err = mcp251xfd_get_tx_nr_by_addr(priv-&gt;tx, &amp;nr, addr);</div><div class='add'>+	if (!err)</div><div class='add'>+		in_tx_ram = true;</div><div class='add'>+	else if (err == -ENOENT)</div><div class='add'>+		in_tx_ram = false;</div><div class='add'>+	else</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Errata Reference:</div><div class='add'>+	 * mcp2517fd: DS80000789C 3., mcp2518fd: DS80000792E 2.,</div><div class='add'>+	 * mcp251863: DS80000984A 2.</div><div class='add'>+	 *</div><div class='add'>+	 * ECC single error correction does not work in all cases:</div><div class='add'>+	 *</div><div class='add'>+	 * Fix/Work Around:</div><div class='add'>+	 * Enable single error correction and double error detection</div><div class='add'>+	 * interrupts by setting SECIE and DEDIE. Handle SECIF as a</div><div class='add'>+	 * detection interrupt and do not rely on the error</div><div class='add'>+	 * correction. Instead, handle both interrupts as a</div><div class='add'>+	 * notification that the RAM word at ERRADDR was corrupted.</div><div class='add'>+	 */</div><div class='add'>+	if (ecc_stat &amp; MCP251XFD_REG_ECCSTAT_SECIF)</div><div class='add'>+		msg = "Single ECC Error detected at address";</div><div class='add'>+	else if (ecc_stat &amp; MCP251XFD_REG_ECCSTAT_DEDIF)</div><div class='add'>+		msg = "Double ECC Error detected at address";</div><div class='add'>+	else</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!in_tx_ram) {</div><div class='add'>+		ecc-&gt;ecc_stat = 0;</div><div class='add'>+</div><div class='add'>+		netdev_notice(priv-&gt;ndev, "%s 0x%04x.\n", msg, addr);</div><div class='add'>+	} else {</div><div class='add'>+		/* Re-occurring error? */</div><div class='add'>+		if (ecc-&gt;ecc_stat == ecc_stat) {</div><div class='add'>+			ecc-&gt;cnt++;</div><div class='add'>+		} else {</div><div class='add'>+			ecc-&gt;ecc_stat = ecc_stat;</div><div class='add'>+			ecc-&gt;cnt = 1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		netdev_info(priv-&gt;ndev,</div><div class='add'>+			    "%s 0x%04x (in TX-RAM, tx_obj=%d), occurred %d time%s.\n",</div><div class='add'>+			    msg, addr, nr, ecc-&gt;cnt, ecc-&gt;cnt &gt; 1 ? "s" : "");</div><div class='add'>+</div><div class='add'>+		if (ecc-&gt;cnt &gt;= MCP251XFD_ECC_CNT_MAX)</div><div class='add'>+			return mcp251xfd_handle_eccif_recover(priv, nr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (set_normal_mode)</div><div class='add'>+		return mcp251xfd_chip_set_normal_mode_nowait(priv);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_handle_spicrcif(struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	u32 crc;</div><div class='add'>+</div><div class='add'>+	err = regmap_read(priv-&gt;map_reg, MCP251XFD_REG_CRC, &amp;crc);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = regmap_update_bits(priv-&gt;map_reg, MCP251XFD_REG_CRC,</div><div class='add'>+				 MCP251XFD_REG_CRC_IF_MASK,</div><div class='add'>+				 ~crc);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (crc &amp; MCP251XFD_REG_CRC_FERRIF)</div><div class='add'>+		netdev_notice(priv-&gt;ndev, "CRC write command format error.\n");</div><div class='add'>+	else if (crc &amp; MCP251XFD_REG_CRC_CRCERRIF)</div><div class='add'>+		netdev_notice(priv-&gt;ndev,</div><div class='add'>+			      "CRC write error detected. CRC=0x%04lx.\n",</div><div class='add'>+			      FIELD_GET(MCP251XFD_REG_CRC_MASK, crc));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_read_regs_status(struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	const int val_bytes = regmap_get_val_bytes(priv-&gt;map_reg);</div><div class='add'>+	size_t len;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;rx_ring_num == 1)</div><div class='add'>+		len = sizeof(priv-&gt;regs_status.intf);</div><div class='add'>+	else</div><div class='add'>+		len = sizeof(priv-&gt;regs_status);</div><div class='add'>+</div><div class='add'>+	return regmap_bulk_read(priv-&gt;map_reg, MCP251XFD_REG_INT,</div><div class='add'>+				&amp;priv-&gt;regs_status, len / val_bytes);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define mcp251xfd_handle(priv, irq, ...) \</div><div class='add'>+({ \</div><div class='add'>+	struct mcp251xfd_priv *_priv = (priv); \</div><div class='add'>+	int err; \</div><div class='add'>+\</div><div class='add'>+	err = mcp251xfd_handle_##irq(_priv, ## __VA_ARGS__); \</div><div class='add'>+	if (err) \</div><div class='add'>+		netdev_err(_priv-&gt;ndev, \</div><div class='add'>+			"IRQ handler mcp251xfd_handle_%s() returned %d.\n", \</div><div class='add'>+			__stringify(irq), err); \</div><div class='add'>+	err; \</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+static irqreturn_t mcp251xfd_irq(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_priv *priv = dev_id;</div><div class='add'>+	irqreturn_t handled = IRQ_NONE;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;rx_int)</div><div class='add'>+		do {</div><div class='add'>+			int rx_pending;</div><div class='add'>+</div><div class='add'>+			rx_pending = gpiod_get_value_cansleep(priv-&gt;rx_int);</div><div class='add'>+			if (!rx_pending)</div><div class='add'>+				break;</div><div class='add'>+</div><div class='add'>+			/* Assume 1st RX-FIFO pending, if other FIFOs</div><div class='add'>+			 * are pending the main IRQ handler will take</div><div class='add'>+			 * care.</div><div class='add'>+			 */</div><div class='add'>+			priv-&gt;regs_status.rxif = BIT(priv-&gt;rx[0]-&gt;fifo_nr);</div><div class='add'>+			err = mcp251xfd_handle(priv, rxif);</div><div class='add'>+			if (err)</div><div class='add'>+				goto out_fail;</div><div class='add'>+</div><div class='add'>+			handled = IRQ_HANDLED;</div><div class='add'>+</div><div class='add'>+			/* We don't know which RX-FIFO is pending, but only</div><div class='add'>+			 * handle the 1st RX-FIFO. Leave loop here if we have</div><div class='add'>+			 * more than 1 RX-FIFO to avoid starvation.</div><div class='add'>+			 */</div><div class='add'>+		} while (priv-&gt;rx_ring_num == 1);</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		u32 intf_pending, intf_pending_clearable;</div><div class='add'>+		bool set_normal_mode = false;</div><div class='add'>+</div><div class='add'>+		err = mcp251xfd_read_regs_status(priv);</div><div class='add'>+		if (err)</div><div class='add'>+			goto out_fail;</div><div class='add'>+</div><div class='add'>+		intf_pending = FIELD_GET(MCP251XFD_REG_INT_IF_MASK,</div><div class='add'>+					 priv-&gt;regs_status.intf) &amp;</div><div class='add'>+			FIELD_GET(MCP251XFD_REG_INT_IE_MASK,</div><div class='add'>+				  priv-&gt;regs_status.intf);</div><div class='add'>+</div><div class='add'>+		if (!(intf_pending)) {</div><div class='add'>+			can_rx_offload_threaded_irq_finish(&amp;priv-&gt;offload);</div><div class='add'>+			return handled;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Some interrupts must be ACKed in the</div><div class='add'>+		 * MCP251XFD_REG_INT register.</div><div class='add'>+		 * - First ACK then handle, to avoid lost-IRQ race</div><div class='add'>+		 *   condition on fast re-occurring interrupts.</div><div class='add'>+		 * - Write "0" to clear active IRQs, "1" to all other,</div><div class='add'>+		 *   to avoid r/m/w race condition on the</div><div class='add'>+		 *   MCP251XFD_REG_INT register.</div><div class='add'>+		 */</div><div class='add'>+		intf_pending_clearable = intf_pending &amp;</div><div class='add'>+			MCP251XFD_REG_INT_IF_CLEARABLE_MASK;</div><div class='add'>+		if (intf_pending_clearable) {</div><div class='add'>+			err = regmap_update_bits(priv-&gt;map_reg,</div><div class='add'>+						 MCP251XFD_REG_INT,</div><div class='add'>+						 MCP251XFD_REG_INT_IF_MASK,</div><div class='add'>+						 ~intf_pending_clearable);</div><div class='add'>+			if (err)</div><div class='add'>+				goto out_fail;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (intf_pending &amp; MCP251XFD_REG_INT_MODIF) {</div><div class='add'>+			err = mcp251xfd_handle(priv, modif, &amp;set_normal_mode);</div><div class='add'>+			if (err)</div><div class='add'>+				goto out_fail;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (intf_pending &amp; MCP251XFD_REG_INT_RXIF) {</div><div class='add'>+			err = mcp251xfd_handle(priv, rxif);</div><div class='add'>+			if (err)</div><div class='add'>+				goto out_fail;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (intf_pending &amp; MCP251XFD_REG_INT_TEFIF) {</div><div class='add'>+			err = mcp251xfd_handle(priv, tefif);</div><div class='add'>+			if (err)</div><div class='add'>+				goto out_fail;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (intf_pending &amp; MCP251XFD_REG_INT_RXOVIF) {</div><div class='add'>+			err = mcp251xfd_handle(priv, rxovif);</div><div class='add'>+			if (err)</div><div class='add'>+				goto out_fail;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (intf_pending &amp; MCP251XFD_REG_INT_TXATIF) {</div><div class='add'>+			err = mcp251xfd_handle(priv, txatif);</div><div class='add'>+			if (err)</div><div class='add'>+				goto out_fail;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (intf_pending &amp; MCP251XFD_REG_INT_IVMIF) {</div><div class='add'>+			err = mcp251xfd_handle(priv, ivmif);</div><div class='add'>+			if (err)</div><div class='add'>+				goto out_fail;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (intf_pending &amp; MCP251XFD_REG_INT_SERRIF) {</div><div class='add'>+			err = mcp251xfd_handle(priv, serrif);</div><div class='add'>+			if (err)</div><div class='add'>+				goto out_fail;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (intf_pending &amp; MCP251XFD_REG_INT_ECCIF) {</div><div class='add'>+			err = mcp251xfd_handle(priv, eccif, set_normal_mode);</div><div class='add'>+			if (err)</div><div class='add'>+				goto out_fail;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (intf_pending &amp; MCP251XFD_REG_INT_SPICRCIF) {</div><div class='add'>+			err = mcp251xfd_handle(priv, spicrcif);</div><div class='add'>+			if (err)</div><div class='add'>+				goto out_fail;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* On the MCP2527FD and MCP2518FD, we don't get a</div><div class='add'>+		 * CERRIF IRQ on the transition TX ERROR_WARNING -&gt; TX</div><div class='add'>+		 * ERROR_ACTIVE.</div><div class='add'>+		 */</div><div class='add'>+		if (intf_pending &amp; MCP251XFD_REG_INT_CERRIF ||</div><div class='add'>+		    priv-&gt;can.state &gt; CAN_STATE_ERROR_ACTIVE) {</div><div class='add'>+			err = mcp251xfd_handle(priv, cerrif);</div><div class='add'>+			if (err)</div><div class='add'>+				goto out_fail;</div><div class='add'>+</div><div class='add'>+			/* In Bus Off we completely shut down the</div><div class='add'>+			 * controller. Every subsequent register read</div><div class='add'>+			 * will read bogus data, and if</div><div class='add'>+			 * MCP251XFD_QUIRK_CRC_REG is enabled the CRC</div><div class='add'>+			 * check will fail, too. So leave IRQ handler</div><div class='add'>+			 * directly.</div><div class='add'>+			 */</div><div class='add'>+			if (priv-&gt;can.state == CAN_STATE_BUS_OFF) {</div><div class='add'>+				can_rx_offload_threaded_irq_finish(&amp;priv-&gt;offload);</div><div class='add'>+				return IRQ_HANDLED;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		handled = IRQ_HANDLED;</div><div class='add'>+	} while (1);</div><div class='add'>+</div><div class='add'>+out_fail:</div><div class='add'>+	can_rx_offload_threaded_irq_finish(&amp;priv-&gt;offload);</div><div class='add'>+</div><div class='add'>+	netdev_err(priv-&gt;ndev, "IRQ handler returned %d (intf=0x%08x).\n",</div><div class='add'>+		   err, priv-&gt;regs_status.intf);</div><div class='add'>+	mcp251xfd_dump(priv);</div><div class='add'>+	mcp251xfd_chip_interrupts_disable(priv);</div><div class='add'>+	mcp251xfd_timestamp_stop(priv);</div><div class='add'>+</div><div class='add'>+	return handled;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_open(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	const struct spi_device *spi = priv-&gt;spi;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = open_candev(ndev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = pm_runtime_resume_and_get(ndev-&gt;dev.parent);</div><div class='add'>+	if (err) {</div><div class='add'>+		if (err == -ETIMEDOUT || err == -ENODEV)</div><div class='add'>+			pm_runtime_set_suspended(ndev-&gt;dev.parent);</div><div class='add'>+		goto out_close_candev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_ring_alloc(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_pm_runtime_put;</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_transceiver_enable(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_mcp251xfd_ring_free;</div><div class='add'>+</div><div class='add'>+	mcp251xfd_timestamp_init(priv);</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_chip_start(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_transceiver_disable;</div><div class='add'>+</div><div class='add'>+	clear_bit(MCP251XFD_FLAGS_DOWN, priv-&gt;flags);</div><div class='add'>+	can_rx_offload_enable(&amp;priv-&gt;offload);</div><div class='add'>+</div><div class='add'>+	priv-&gt;wq = alloc_ordered_workqueue("%s-mcp251xfd_wq",</div><div class='add'>+					   WQ_FREEZABLE | WQ_MEM_RECLAIM,</div><div class='add'>+					   dev_name(&amp;spi-&gt;dev));</div><div class='add'>+	if (!priv-&gt;wq) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto out_can_rx_offload_disable;</div><div class='add'>+	}</div><div class='add'>+	INIT_WORK(&amp;priv-&gt;tx_work, mcp251xfd_tx_obj_write_sync);</div><div class='add'>+</div><div class='add'>+	err = request_threaded_irq(spi-&gt;irq, NULL, mcp251xfd_irq,</div><div class='add'>+				   IRQF_SHARED | IRQF_ONESHOT,</div><div class='add'>+				   dev_name(&amp;spi-&gt;dev), priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_destroy_workqueue;</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_chip_interrupts_enable(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_free_irq;</div><div class='add'>+</div><div class='add'>+	netif_start_queue(ndev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_free_irq:</div><div class='add'>+	free_irq(spi-&gt;irq, priv);</div><div class='add'>+out_destroy_workqueue:</div><div class='add'>+	destroy_workqueue(priv-&gt;wq);</div><div class='add'>+out_can_rx_offload_disable:</div><div class='add'>+	can_rx_offload_disable(&amp;priv-&gt;offload);</div><div class='add'>+	set_bit(MCP251XFD_FLAGS_DOWN, priv-&gt;flags);</div><div class='add'>+out_transceiver_disable:</div><div class='add'>+	mcp251xfd_transceiver_disable(priv);</div><div class='add'>+out_mcp251xfd_ring_free:</div><div class='add'>+	mcp251xfd_ring_free(priv);</div><div class='add'>+out_pm_runtime_put:</div><div class='add'>+	mcp251xfd_chip_stop(priv, CAN_STATE_STOPPED);</div><div class='add'>+	pm_runtime_put(ndev-&gt;dev.parent);</div><div class='add'>+out_close_candev:</div><div class='add'>+	close_candev(ndev);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_stop(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(ndev);</div><div class='add'>+	set_bit(MCP251XFD_FLAGS_DOWN, priv-&gt;flags);</div><div class='add'>+	hrtimer_cancel(&amp;priv-&gt;rx_irq_timer);</div><div class='add'>+	hrtimer_cancel(&amp;priv-&gt;tx_irq_timer);</div><div class='add'>+	mcp251xfd_chip_interrupts_disable(priv);</div><div class='add'>+	free_irq(ndev-&gt;irq, priv);</div><div class='add'>+	destroy_workqueue(priv-&gt;wq);</div><div class='add'>+	can_rx_offload_disable(&amp;priv-&gt;offload);</div><div class='add'>+	mcp251xfd_chip_stop(priv, CAN_STATE_STOPPED);</div><div class='add'>+	mcp251xfd_transceiver_disable(priv);</div><div class='add'>+	mcp251xfd_ring_free(priv);</div><div class='add'>+	close_candev(ndev);</div><div class='add'>+</div><div class='add'>+	pm_runtime_put(ndev-&gt;dev.parent);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops mcp251xfd_netdev_ops = {</div><div class='add'>+	.ndo_open = mcp251xfd_open,</div><div class='add'>+	.ndo_stop = mcp251xfd_stop,</div><div class='add'>+	.ndo_start_xmit	= mcp251xfd_start_xmit,</div><div class='add'>+	.ndo_hwtstamp_get = can_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set = can_hwtstamp_set,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mcp251xfd_register_quirks(struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	const struct spi_device *spi = priv-&gt;spi;</div><div class='add'>+	const struct spi_controller *ctlr = spi-&gt;controller;</div><div class='add'>+</div><div class='add'>+	if (ctlr-&gt;flags &amp; SPI_CONTROLLER_HALF_DUPLEX)</div><div class='add'>+		priv-&gt;devtype_data.quirks |= MCP251XFD_QUIRK_HALF_DUPLEX;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_register_chip_detect(struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	const struct net_device *ndev = priv-&gt;ndev;</div><div class='add'>+	const struct mcp251xfd_devtype_data *devtype_data;</div><div class='add'>+	u32 osc;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* The OSC_LPMEN is only supported on MCP2518FD and MCP251863,</div><div class='add'>+	 * so use it to autodetect the model.</div><div class='add'>+	 */</div><div class='add'>+	err = regmap_update_bits(priv-&gt;map_reg, MCP251XFD_REG_OSC,</div><div class='add'>+				 MCP251XFD_REG_OSC_LPMEN,</div><div class='add'>+				 MCP251XFD_REG_OSC_LPMEN);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = regmap_read(priv-&gt;map_reg, MCP251XFD_REG_OSC, &amp;osc);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (osc &amp; MCP251XFD_REG_OSC_LPMEN) {</div><div class='add'>+		/* We cannot distinguish between MCP2518FD and</div><div class='add'>+		 * MCP251863. If firmware specifies MCP251863, keep</div><div class='add'>+		 * it, otherwise set to MCP2518FD.</div><div class='add'>+		 */</div><div class='add'>+		if (mcp251xfd_is_251863(priv))</div><div class='add'>+			devtype_data = &amp;mcp251xfd_devtype_data_mcp251863;</div><div class='add'>+		else</div><div class='add'>+			devtype_data = &amp;mcp251xfd_devtype_data_mcp2518fd;</div><div class='add'>+	} else {</div><div class='add'>+		devtype_data = &amp;mcp251xfd_devtype_data_mcp2517fd;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!mcp251xfd_is_251XFD(priv) &amp;&amp;</div><div class='add'>+	    priv-&gt;devtype_data.model != devtype_data-&gt;model) {</div><div class='add'>+		netdev_info(ndev,</div><div class='add'>+			    "Detected %s, but firmware specifies a %s. Fixing up.\n",</div><div class='add'>+			    __mcp251xfd_get_model_str(devtype_data-&gt;model),</div><div class='add'>+			    mcp251xfd_get_model_str(priv));</div><div class='add'>+	}</div><div class='add'>+	priv-&gt;devtype_data = *devtype_data;</div><div class='add'>+</div><div class='add'>+	/* We need to preserve the Half Duplex Quirk. */</div><div class='add'>+	mcp251xfd_register_quirks(priv);</div><div class='add'>+</div><div class='add'>+	/* Re-init regmap with quirks of detected model. */</div><div class='add'>+	return mcp251xfd_regmap_init(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_register_check_rx_int(struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int err, rx_pending;</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;rx_int)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_chip_rx_int_enable(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Check if RX_INT is properly working. The RX_INT should not</div><div class='add'>+	 * be active after a softreset.</div><div class='add'>+	 */</div><div class='add'>+	rx_pending = gpiod_get_value_cansleep(priv-&gt;rx_int);</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_chip_rx_int_disable(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (!rx_pending)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	netdev_info(priv-&gt;ndev,</div><div class='add'>+		    "RX_INT active after softreset, disabling RX_INT support.\n");</div><div class='add'>+	devm_gpiod_put(&amp;priv-&gt;spi-&gt;dev, priv-&gt;rx_int);</div><div class='add'>+	priv-&gt;rx_int = NULL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char * const mcp251xfd_gpio_names[] = { "GPIO0", "GPIO1" };</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_gpio_request(struct gpio_chip *chip, unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_priv *priv = gpiochip_get_data(chip);</div><div class='add'>+	u32 pin_mask = MCP251XFD_REG_IOCON_PM(offset);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;rx_int &amp;&amp; offset == 1) {</div><div class='add'>+		netdev_err(priv-&gt;ndev, "Can't use GPIO 1 with RX-INT!\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = pm_runtime_resume_and_get(priv-&gt;ndev-&gt;dev.parent);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return regmap_update_bits(priv-&gt;map_reg, MCP251XFD_REG_IOCON, pin_mask, pin_mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mcp251xfd_gpio_free(struct gpio_chip *chip, unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_priv *priv = gpiochip_get_data(chip);</div><div class='add'>+</div><div class='add'>+	pm_runtime_put(priv-&gt;ndev-&gt;dev.parent);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_gpio_get_direction(struct gpio_chip *chip,</div><div class='add'>+					unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_priv *priv = gpiochip_get_data(chip);</div><div class='add'>+	u32 mask = MCP251XFD_REG_IOCON_TRIS(offset);</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_read(priv-&gt;map_reg, MCP251XFD_REG_IOCON, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (mask &amp; val)</div><div class='add'>+		return GPIO_LINE_DIRECTION_IN;</div><div class='add'>+</div><div class='add'>+	return GPIO_LINE_DIRECTION_OUT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_gpio_get(struct gpio_chip *chip, unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_priv *priv = gpiochip_get_data(chip);</div><div class='add'>+	u32 mask = MCP251XFD_REG_IOCON_GPIO(offset);</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_read(priv-&gt;map_reg, MCP251XFD_REG_IOCON, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return !!(mask &amp; val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask,</div><div class='add'>+				       unsigned long *bit)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_priv *priv = gpiochip_get_data(chip);</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_read(priv-&gt;map_reg, MCP251XFD_REG_IOCON, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	*bit = FIELD_GET(MCP251XFD_REG_IOCON_GPIO_MASK, val) &amp; *mask;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_gpio_direction_output(struct gpio_chip *chip,</div><div class='add'>+					   unsigned int offset, int value)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_priv *priv = gpiochip_get_data(chip);</div><div class='add'>+	u32 dir_mask = MCP251XFD_REG_IOCON_TRIS(offset);</div><div class='add'>+	u32 val_mask = MCP251XFD_REG_IOCON_LAT(offset);</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	if (value)</div><div class='add'>+		val = val_mask;</div><div class='add'>+	else</div><div class='add'>+		val = 0;</div><div class='add'>+</div><div class='add'>+	return regmap_update_bits(priv-&gt;map_reg, MCP251XFD_REG_IOCON,</div><div class='add'>+				  dir_mask | val_mask, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_gpio_direction_input(struct gpio_chip *chip,</div><div class='add'>+					  unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_priv *priv = gpiochip_get_data(chip);</div><div class='add'>+	u32 dir_mask = MCP251XFD_REG_IOCON_TRIS(offset);</div><div class='add'>+</div><div class='add'>+	return regmap_update_bits(priv-&gt;map_reg, MCP251XFD_REG_IOCON, dir_mask, dir_mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_gpio_set(struct gpio_chip *chip, unsigned int offset, int value)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_priv *priv = gpiochip_get_data(chip);</div><div class='add'>+	u32 val_mask = MCP251XFD_REG_IOCON_LAT(offset);</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	if (value)</div><div class='add'>+		val = val_mask;</div><div class='add'>+	else</div><div class='add'>+		val = 0;</div><div class='add'>+</div><div class='add'>+	return regmap_update_bits(priv-&gt;map_reg, MCP251XFD_REG_IOCON, val_mask, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_gpio_set_multiple(struct gpio_chip *chip, unsigned long *mask,</div><div class='add'>+				       unsigned long *bits)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_priv *priv = gpiochip_get_data(chip);</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = FIELD_PREP(MCP251XFD_REG_IOCON_LAT_MASK, *bits);</div><div class='add'>+</div><div class='add'>+	return regmap_update_bits(priv-&gt;map_reg, MCP251XFD_REG_IOCON,</div><div class='add'>+				  MCP251XFD_REG_IOCON_LAT_MASK, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251fdx_gpio_setup(struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct gpio_chip *gc = &amp;priv-&gt;gc;</div><div class='add'>+</div><div class='add'>+	if (!device_property_present(&amp;priv-&gt;spi-&gt;dev, "gpio-controller"))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	gc-&gt;label = dev_name(&amp;priv-&gt;spi-&gt;dev);</div><div class='add'>+	gc-&gt;parent = &amp;priv-&gt;spi-&gt;dev;</div><div class='add'>+	gc-&gt;owner = THIS_MODULE;</div><div class='add'>+	gc-&gt;request = mcp251xfd_gpio_request;</div><div class='add'>+	gc-&gt;free = mcp251xfd_gpio_free;</div><div class='add'>+	gc-&gt;get_direction = mcp251xfd_gpio_get_direction;</div><div class='add'>+	gc-&gt;direction_output = mcp251xfd_gpio_direction_output;</div><div class='add'>+	gc-&gt;direction_input = mcp251xfd_gpio_direction_input;</div><div class='add'>+	gc-&gt;get = mcp251xfd_gpio_get;</div><div class='add'>+	gc-&gt;get_multiple = mcp251xfd_gpio_get_multiple;</div><div class='add'>+	gc-&gt;set = mcp251xfd_gpio_set;</div><div class='add'>+	gc-&gt;set_multiple = mcp251xfd_gpio_set_multiple;</div><div class='add'>+	gc-&gt;base = -1;</div><div class='add'>+	gc-&gt;can_sleep = true;</div><div class='add'>+	gc-&gt;ngpio = ARRAY_SIZE(mcp251xfd_gpio_names);</div><div class='add'>+	gc-&gt;names = mcp251xfd_gpio_names;</div><div class='add'>+</div><div class='add'>+	return devm_gpiochip_add_data(&amp;priv-&gt;spi-&gt;dev, gc, priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mcp251xfd_register_get_dev_id(const struct mcp251xfd_priv *priv, u32 *dev_id,</div><div class='add'>+			      u32 *effective_speed_hz_slow,</div><div class='add'>+			      u32 *effective_speed_hz_fast)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_map_buf_nocrc *buf_rx;</div><div class='add'>+	struct mcp251xfd_map_buf_nocrc *buf_tx;</div><div class='add'>+	struct spi_transfer xfer[2] = { };</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	buf_rx = kzalloc(sizeof(*buf_rx), GFP_KERNEL);</div><div class='add'>+	if (!buf_rx)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	buf_tx = kzalloc(sizeof(*buf_tx), GFP_KERNEL);</div><div class='add'>+	if (!buf_tx) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto out_kfree_buf_rx;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	xfer[0].tx_buf = buf_tx;</div><div class='add'>+	xfer[0].len = sizeof(buf_tx-&gt;cmd);</div><div class='add'>+	xfer[0].speed_hz = priv-&gt;spi_max_speed_hz_slow;</div><div class='add'>+	xfer[1].rx_buf = buf_rx-&gt;data;</div><div class='add'>+	xfer[1].len = sizeof(*dev_id);</div><div class='add'>+	xfer[1].speed_hz = priv-&gt;spi_max_speed_hz_fast;</div><div class='add'>+</div><div class='add'>+	mcp251xfd_spi_cmd_read_nocrc(&amp;buf_tx-&gt;cmd, MCP251XFD_REG_DEVID);</div><div class='add'>+</div><div class='add'>+	err = spi_sync_transfer(priv-&gt;spi, xfer, ARRAY_SIZE(xfer));</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_kfree_buf_tx;</div><div class='add'>+</div><div class='add'>+	*dev_id = get_unaligned_le32(buf_rx-&gt;data);</div><div class='add'>+	*effective_speed_hz_slow = xfer[0].effective_speed_hz;</div><div class='add'>+	*effective_speed_hz_fast = xfer[1].effective_speed_hz;</div><div class='add'>+</div><div class='add'>+out_kfree_buf_tx:</div><div class='add'>+	kfree(buf_tx);</div><div class='add'>+out_kfree_buf_rx:</div><div class='add'>+	kfree(buf_rx);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define MCP251XFD_QUIRK_ACTIVE(quirk) \</div><div class='add'>+	(priv-&gt;devtype_data.quirks &amp; MCP251XFD_QUIRK_##quirk ? '+' : '-')</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mcp251xfd_register_done(const struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 dev_id, effective_speed_hz_slow, effective_speed_hz_fast;</div><div class='add'>+	unsigned long clk_rate;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_register_get_dev_id(priv, &amp;dev_id,</div><div class='add'>+					    &amp;effective_speed_hz_slow,</div><div class='add'>+					    &amp;effective_speed_hz_fast);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	clk_rate = clk_get_rate(priv-&gt;clk);</div><div class='add'>+</div><div class='add'>+	netdev_info(priv-&gt;ndev,</div><div class='add'>+		    "%s rev%lu.%lu (%cRX_INT %cPLL %cMAB_NO_WARN %cCRC_REG %cCRC_RX %cCRC_TX %cECC %cHD o:%lu.%02luMHz c:%u.%02uMHz m:%u.%02uMHz rs:%u.%02uMHz es:%u.%02uMHz rf:%u.%02uMHz ef:%u.%02uMHz) successfully initialized.\n",</div><div class='add'>+		    mcp251xfd_get_model_str(priv),</div><div class='add'>+		    FIELD_GET(MCP251XFD_REG_DEVID_ID_MASK, dev_id),</div><div class='add'>+		    FIELD_GET(MCP251XFD_REG_DEVID_REV_MASK, dev_id),</div><div class='add'>+		    priv-&gt;rx_int ? '+' : '-',</div><div class='add'>+		    priv-&gt;pll_enable ? '+' : '-',</div><div class='add'>+		    MCP251XFD_QUIRK_ACTIVE(MAB_NO_WARN),</div><div class='add'>+		    MCP251XFD_QUIRK_ACTIVE(CRC_REG),</div><div class='add'>+		    MCP251XFD_QUIRK_ACTIVE(CRC_RX),</div><div class='add'>+		    MCP251XFD_QUIRK_ACTIVE(CRC_TX),</div><div class='add'>+		    MCP251XFD_QUIRK_ACTIVE(ECC),</div><div class='add'>+		    MCP251XFD_QUIRK_ACTIVE(HALF_DUPLEX),</div><div class='add'>+		    clk_rate / 1000000,</div><div class='add'>+		    clk_rate % 1000000 / 1000 / 10,</div><div class='add'>+		    priv-&gt;can.clock.freq / 1000000,</div><div class='add'>+		    priv-&gt;can.clock.freq % 1000000 / 1000 / 10,</div><div class='add'>+		    priv-&gt;spi_max_speed_hz_orig / 1000000,</div><div class='add'>+		    priv-&gt;spi_max_speed_hz_orig % 1000000 / 1000 / 10,</div><div class='add'>+		    priv-&gt;spi_max_speed_hz_slow / 1000000,</div><div class='add'>+		    priv-&gt;spi_max_speed_hz_slow % 1000000 / 1000 / 10,</div><div class='add'>+		    effective_speed_hz_slow / 1000000,</div><div class='add'>+		    effective_speed_hz_slow % 1000000 / 1000 / 10,</div><div class='add'>+		    priv-&gt;spi_max_speed_hz_fast / 1000000,</div><div class='add'>+		    priv-&gt;spi_max_speed_hz_fast % 1000000 / 1000 / 10,</div><div class='add'>+		    effective_speed_hz_fast / 1000000,</div><div class='add'>+		    effective_speed_hz_fast % 1000000 / 1000 / 10);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_register(struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = priv-&gt;ndev;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mcp251xfd_register_quirks(priv);</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_clks_and_vdd_enable(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_chip_softreset(priv);</div><div class='add'>+	if (err == -ENODEV)</div><div class='add'>+		goto out_clks_and_vdd_disable;</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_chip_sleep;</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_chip_clock_init(priv);</div><div class='add'>+	if (err == -ENODEV)</div><div class='add'>+		goto out_clks_and_vdd_disable;</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_chip_sleep;</div><div class='add'>+</div><div class='add'>+	pm_runtime_get_noresume(ndev-&gt;dev.parent);</div><div class='add'>+	err = pm_runtime_set_active(ndev-&gt;dev.parent);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_runtime_put_noidle;</div><div class='add'>+	pm_runtime_enable(ndev-&gt;dev.parent);</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_register_chip_detect(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_runtime_disable;</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_register_check_rx_int(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_runtime_disable;</div><div class='add'>+</div><div class='add'>+	mcp251xfd_ethtool_init(priv);</div><div class='add'>+</div><div class='add'>+	err = mcp251fdx_gpio_setup(priv);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err_probe(&amp;priv-&gt;spi-&gt;dev, err, "Failed to register gpio-controller.\n");</div><div class='add'>+		goto out_runtime_disable;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = register_candev(ndev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_runtime_disable;</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_register_done(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_unregister_candev;</div><div class='add'>+</div><div class='add'>+	/* Put controller into Config mode and let pm_runtime_put()</div><div class='add'>+	 * put in sleep mode, disable the clocks and vdd. If CONFIG_PM</div><div class='add'>+	 * is not enabled, the clocks and vdd will stay powered.</div><div class='add'>+	 */</div><div class='add'>+	err = mcp251xfd_chip_set_mode(priv, MCP251XFD_REG_CON_MODE_CONFIG);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_unregister_candev;</div><div class='add'>+</div><div class='add'>+	pm_runtime_put(ndev-&gt;dev.parent);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_unregister_candev:</div><div class='add'>+	unregister_candev(ndev);</div><div class='add'>+out_runtime_disable:</div><div class='add'>+	pm_runtime_disable(ndev-&gt;dev.parent);</div><div class='add'>+out_runtime_put_noidle:</div><div class='add'>+	pm_runtime_put_noidle(ndev-&gt;dev.parent);</div><div class='add'>+out_chip_sleep:</div><div class='add'>+	mcp251xfd_chip_sleep(priv);</div><div class='add'>+out_clks_and_vdd_disable:</div><div class='add'>+	mcp251xfd_clks_and_vdd_disable(priv);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void mcp251xfd_unregister(struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev	= priv-&gt;ndev;</div><div class='add'>+</div><div class='add'>+	unregister_candev(ndev);</div><div class='add'>+</div><div class='add'>+	if (pm_runtime_enabled(ndev-&gt;dev.parent)) {</div><div class='add'>+		pm_runtime_disable(ndev-&gt;dev.parent);</div><div class='add'>+	} else {</div><div class='add'>+		mcp251xfd_chip_sleep(priv);</div><div class='add'>+		mcp251xfd_clks_and_vdd_disable(priv);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id mcp251xfd_of_match[] = {</div><div class='add'>+	{</div><div class='add'>+		.compatible = "microchip,mcp2517fd",</div><div class='add'>+		.data = &amp;mcp251xfd_devtype_data_mcp2517fd,</div><div class='add'>+	}, {</div><div class='add'>+		.compatible = "microchip,mcp2518fd",</div><div class='add'>+		.data = &amp;mcp251xfd_devtype_data_mcp2518fd,</div><div class='add'>+	}, {</div><div class='add'>+		.compatible = "microchip,mcp251863",</div><div class='add'>+		.data = &amp;mcp251xfd_devtype_data_mcp251863,</div><div class='add'>+	}, {</div><div class='add'>+		.compatible = "microchip,mcp251xfd",</div><div class='add'>+		.data = &amp;mcp251xfd_devtype_data_mcp251xfd,</div><div class='add'>+	}, {</div><div class='add'>+		/* sentinel */</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, mcp251xfd_of_match);</div><div class='add'>+</div><div class='add'>+static const struct spi_device_id mcp251xfd_id_table[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "mcp2517fd",</div><div class='add'>+		.driver_data = (kernel_ulong_t)&amp;mcp251xfd_devtype_data_mcp2517fd,</div><div class='add'>+	}, {</div><div class='add'>+		.name = "mcp2518fd",</div><div class='add'>+		.driver_data = (kernel_ulong_t)&amp;mcp251xfd_devtype_data_mcp2518fd,</div><div class='add'>+	}, {</div><div class='add'>+		.name = "mcp251863",</div><div class='add'>+		.driver_data = (kernel_ulong_t)&amp;mcp251xfd_devtype_data_mcp251863,</div><div class='add'>+	}, {</div><div class='add'>+		.name = "mcp251xfd",</div><div class='add'>+		.driver_data = (kernel_ulong_t)&amp;mcp251xfd_devtype_data_mcp251xfd,</div><div class='add'>+	}, {</div><div class='add'>+		/* sentinel */</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(spi, mcp251xfd_id_table);</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_probe(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	struct mcp251xfd_priv *priv;</div><div class='add'>+	struct gpio_desc *rx_int;</div><div class='add'>+	struct regulator *reg_vdd, *reg_xceiver;</div><div class='add'>+	struct clk *clk;</div><div class='add'>+	bool pll_enable = false;</div><div class='add'>+	u32 freq = 0;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!spi-&gt;irq)</div><div class='add'>+		return dev_err_probe(&amp;spi-&gt;dev, -ENXIO,</div><div class='add'>+				     "No IRQ specified (maybe node \"interrupts-extended\" in DT missing)!\n");</div><div class='add'>+</div><div class='add'>+	rx_int = devm_gpiod_get_optional(&amp;spi-&gt;dev, "microchip,rx-int",</div><div class='add'>+					 GPIOD_IN);</div><div class='add'>+	if (IS_ERR(rx_int))</div><div class='add'>+		return dev_err_probe(&amp;spi-&gt;dev, PTR_ERR(rx_int),</div><div class='add'>+				     "Failed to get RX-INT!\n");</div><div class='add'>+</div><div class='add'>+	reg_vdd = devm_regulator_get_optional(&amp;spi-&gt;dev, "vdd");</div><div class='add'>+	if (PTR_ERR(reg_vdd) == -ENODEV)</div><div class='add'>+		reg_vdd = NULL;</div><div class='add'>+	else if (IS_ERR(reg_vdd))</div><div class='add'>+		return dev_err_probe(&amp;spi-&gt;dev, PTR_ERR(reg_vdd),</div><div class='add'>+				     "Failed to get VDD regulator!\n");</div><div class='add'>+</div><div class='add'>+	reg_xceiver = devm_regulator_get_optional(&amp;spi-&gt;dev, "xceiver");</div><div class='add'>+	if (PTR_ERR(reg_xceiver) == -ENODEV)</div><div class='add'>+		reg_xceiver = NULL;</div><div class='add'>+	else if (IS_ERR(reg_xceiver))</div><div class='add'>+		return dev_err_probe(&amp;spi-&gt;dev, PTR_ERR(reg_xceiver),</div><div class='add'>+				     "Failed to get Transceiver regulator!\n");</div><div class='add'>+</div><div class='add'>+	clk = devm_clk_get_optional(&amp;spi-&gt;dev, NULL);</div><div class='add'>+	if (IS_ERR(clk))</div><div class='add'>+		return dev_err_probe(&amp;spi-&gt;dev, PTR_ERR(clk),</div><div class='add'>+				     "Failed to get Oscillator (clock)!\n");</div><div class='add'>+	if (clk) {</div><div class='add'>+		freq = clk_get_rate(clk);</div><div class='add'>+	} else {</div><div class='add'>+		err = device_property_read_u32(&amp;spi-&gt;dev, "clock-frequency",</div><div class='add'>+					       &amp;freq);</div><div class='add'>+		if (err)</div><div class='add'>+			return dev_err_probe(&amp;spi-&gt;dev, err,</div><div class='add'>+					     "Failed to get clock-frequency!\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Sanity check */</div><div class='add'>+	if (freq &lt; MCP251XFD_SYSCLOCK_HZ_MIN ||</div><div class='add'>+	    freq &gt; MCP251XFD_SYSCLOCK_HZ_MAX) {</div><div class='add'>+		dev_err(&amp;spi-&gt;dev,</div><div class='add'>+			"Oscillator frequency (%u Hz) is too low or high.\n",</div><div class='add'>+			freq);</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (freq &lt;= MCP251XFD_SYSCLOCK_HZ_MAX / MCP251XFD_OSC_PLL_MULTIPLIER)</div><div class='add'>+		pll_enable = true;</div><div class='add'>+</div><div class='add'>+	ndev = alloc_candev(sizeof(struct mcp251xfd_priv),</div><div class='add'>+			    MCP251XFD_TX_OBJ_NUM_MAX);</div><div class='add'>+	if (!ndev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	SET_NETDEV_DEV(ndev, &amp;spi-&gt;dev);</div><div class='add'>+</div><div class='add'>+	ndev-&gt;netdev_ops = &amp;mcp251xfd_netdev_ops;</div><div class='add'>+	ndev-&gt;irq = spi-&gt;irq;</div><div class='add'>+	ndev-&gt;flags |= IFF_ECHO;</div><div class='add'>+</div><div class='add'>+	priv = netdev_priv(ndev);</div><div class='add'>+	spi_set_drvdata(spi, priv);</div><div class='add'>+	priv-&gt;can.clock.freq = freq;</div><div class='add'>+	if (pll_enable)</div><div class='add'>+		priv-&gt;can.clock.freq *= MCP251XFD_OSC_PLL_MULTIPLIER;</div><div class='add'>+	priv-&gt;can.do_set_mode = mcp251xfd_set_mode;</div><div class='add'>+	priv-&gt;can.do_get_berr_counter = mcp251xfd_get_berr_counter;</div><div class='add'>+	priv-&gt;can.bittiming_const = &amp;mcp251xfd_bittiming_const;</div><div class='add'>+	priv-&gt;can.fd.data_bittiming_const = &amp;mcp251xfd_data_bittiming_const;</div><div class='add'>+	priv-&gt;can.fd.tdc_const = &amp;mcp251xfd_tdc_const;</div><div class='add'>+	priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK |</div><div class='add'>+		CAN_CTRLMODE_LISTENONLY | CAN_CTRLMODE_BERR_REPORTING |</div><div class='add'>+		CAN_CTRLMODE_FD | CAN_CTRLMODE_FD_NON_ISO |</div><div class='add'>+		CAN_CTRLMODE_CC_LEN8_DLC | CAN_CTRLMODE_TDC_AUTO |</div><div class='add'>+		CAN_CTRLMODE_TDC_MANUAL;</div><div class='add'>+	set_bit(MCP251XFD_FLAGS_DOWN, priv-&gt;flags);</div><div class='add'>+	priv-&gt;ndev = ndev;</div><div class='add'>+	priv-&gt;spi = spi;</div><div class='add'>+	priv-&gt;rx_int = rx_int;</div><div class='add'>+	priv-&gt;clk = clk;</div><div class='add'>+	priv-&gt;pll_enable = pll_enable;</div><div class='add'>+	priv-&gt;reg_vdd = reg_vdd;</div><div class='add'>+	priv-&gt;reg_xceiver = reg_xceiver;</div><div class='add'>+	priv-&gt;devtype_data = *(struct mcp251xfd_devtype_data *)spi_get_device_match_data(spi);</div><div class='add'>+</div><div class='add'>+	/* Errata Reference:</div><div class='add'>+	 * mcp2517fd: DS80000792C 5., mcp2518fd: DS80000789E 4.,</div><div class='add'>+	 * mcp251863: DS80000984A 4.</div><div class='add'>+	 *</div><div class='add'>+	 * The SPI can write corrupted data to the RAM at fast SPI</div><div class='add'>+	 * speeds:</div><div class='add'>+	 *</div><div class='add'>+	 * Simultaneous activity on the CAN bus while writing data to</div><div class='add'>+	 * RAM via the SPI interface, with high SCK frequency, can</div><div class='add'>+	 * lead to corrupted data being written to RAM.</div><div class='add'>+	 *</div><div class='add'>+	 * Fix/Work Around:</div><div class='add'>+	 * Ensure that FSCK is less than or equal to 0.85 *</div><div class='add'>+	 * (FSYSCLK/2).</div><div class='add'>+	 *</div><div class='add'>+	 * Known good combinations are:</div><div class='add'>+	 *</div><div class='add'>+	 * MCP	ext-clk	SoC			SPI			SPI-clk		max-clk	parent-clk	config</div><div class='add'>+	 *</div><div class='add'>+	 * 2518	20 MHz	allwinner,sun8i-h3	allwinner,sun8i-h3-spi	 8333333 Hz	 83.33%	600000000 Hz	assigned-clocks = &lt;&amp;ccu CLK_SPIx&gt;</div><div class='add'>+	 * 2518	40 MHz	allwinner,sun8i-h3	allwinner,sun8i-h3-spi	16666667 Hz	 83.33%	600000000 Hz	assigned-clocks = &lt;&amp;ccu CLK_SPIx&gt;</div><div class='add'>+	 * 2517	40 MHz	atmel,sama5d27		atmel,at91rm9200-spi	16400000 Hz	 82.00%	 82000000 Hz	default</div><div class='add'>+	 * 2518	40 MHz	atmel,sama5d27		atmel,at91rm9200-spi	16400000 Hz	 82.00%	 82000000 Hz	default</div><div class='add'>+	 * 2518	40 MHz	fsl,imx6dl		fsl,imx51-ecspi		15000000 Hz	 75.00%	 30000000 Hz	default</div><div class='add'>+	 * 2517	20 MHz	fsl,imx8mm		fsl,imx51-ecspi		 8333333 Hz	 83.33%	 16666667 Hz	assigned-clocks = &lt;&amp;clk IMX8MM_CLK_ECSPIx_ROOT&gt;</div><div class='add'>+	 *</div><div class='add'>+	 */</div><div class='add'>+	priv-&gt;spi_max_speed_hz_orig = spi-&gt;max_speed_hz;</div><div class='add'>+	priv-&gt;spi_max_speed_hz_slow = min(spi-&gt;max_speed_hz,</div><div class='add'>+					  freq / 2 / 1000 * 850);</div><div class='add'>+	if (priv-&gt;pll_enable)</div><div class='add'>+		priv-&gt;spi_max_speed_hz_fast = min(spi-&gt;max_speed_hz,</div><div class='add'>+						  freq *</div><div class='add'>+						  MCP251XFD_OSC_PLL_MULTIPLIER /</div><div class='add'>+						  2 / 1000 * 850);</div><div class='add'>+	else</div><div class='add'>+		priv-&gt;spi_max_speed_hz_fast = priv-&gt;spi_max_speed_hz_slow;</div><div class='add'>+	spi-&gt;max_speed_hz = priv-&gt;spi_max_speed_hz_slow;</div><div class='add'>+	spi-&gt;bits_per_word = 8;</div><div class='add'>+	spi-&gt;rt = true;</div><div class='add'>+	err = spi_setup(spi);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_free_candev;</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_regmap_init(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_free_candev;</div><div class='add'>+</div><div class='add'>+	err = can_rx_offload_add_manual(ndev, &amp;priv-&gt;offload,</div><div class='add'>+					MCP251XFD_NAPI_WEIGHT);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_free_candev;</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_register(priv);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err_probe(&amp;spi-&gt;dev, err, "Failed to detect %s.\n",</div><div class='add'>+			      mcp251xfd_get_model_str(priv));</div><div class='add'>+		goto out_can_rx_offload_del;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_can_rx_offload_del:</div><div class='add'>+	can_rx_offload_del(&amp;priv-&gt;offload);</div><div class='add'>+out_free_candev:</div><div class='add'>+	spi-&gt;max_speed_hz = priv-&gt;spi_max_speed_hz_orig;</div><div class='add'>+</div><div class='add'>+	free_candev(ndev);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mcp251xfd_remove(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_priv *priv = spi_get_drvdata(spi);</div><div class='add'>+	struct net_device *ndev = priv-&gt;ndev;</div><div class='add'>+</div><div class='add'>+	mcp251xfd_unregister(priv);</div><div class='add'>+	can_rx_offload_del(&amp;priv-&gt;offload);</div><div class='add'>+	spi-&gt;max_speed_hz = priv-&gt;spi_max_speed_hz_orig;</div><div class='add'>+	free_candev(ndev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __maybe_unused mcp251xfd_runtime_suspend(struct device *device)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_priv *priv = dev_get_drvdata(device);</div><div class='add'>+</div><div class='add'>+	mcp251xfd_chip_sleep(priv);</div><div class='add'>+	return mcp251xfd_clks_and_vdd_disable(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __maybe_unused mcp251xfd_runtime_resume(struct device *device)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_priv *priv = dev_get_drvdata(device);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_clks_and_vdd_enable(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_chip_softreset(priv);</div><div class='add'>+	if (err == -ENODEV)</div><div class='add'>+		goto out_clks_and_vdd_disable;</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_chip_sleep;</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_chip_clock_init(priv);</div><div class='add'>+	if (err == -ENODEV)</div><div class='add'>+		goto out_clks_and_vdd_disable;</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_chip_sleep;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_chip_sleep:</div><div class='add'>+	mcp251xfd_chip_sleep(priv);</div><div class='add'>+out_clks_and_vdd_disable:</div><div class='add'>+	mcp251xfd_clks_and_vdd_disable(priv);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct dev_pm_ops mcp251xfd_pm_ops = {</div><div class='add'>+	SET_RUNTIME_PM_OPS(mcp251xfd_runtime_suspend,</div><div class='add'>+			   mcp251xfd_runtime_resume, NULL)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct spi_driver mcp251xfd_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = DEVICE_NAME,</div><div class='add'>+		.pm = &amp;mcp251xfd_pm_ops,</div><div class='add'>+		.of_match_table = mcp251xfd_of_match,</div><div class='add'>+	},</div><div class='add'>+	.probe = mcp251xfd_probe,</div><div class='add'>+	.remove = mcp251xfd_remove,</div><div class='add'>+	.id_table = mcp251xfd_id_table,</div><div class='add'>+};</div><div class='add'>+module_spi_driver(mcp251xfd_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Marc Kleine-Budde &lt;mkl@pengutronix.de&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Microchip MCP251xFD Family CAN controller driver");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/net/can/spi/mcp251xfd/mcp251xfd-crc16.c b/drivers/net/can/spi/mcp251xfd/mcp251xfd-crc16.c<br/>new file mode 100644<br/>index 000000000000..a02ca76ac239<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/mcp251xfd/mcp251xfd-crc16.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/spi/mcp251xfd/mcp251xfd-crc16.c</a></div><div class='hunk'>@@ -0,0 +1,89 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+//</div><div class='add'>+// mcp251xfd - Microchip MCP251xFD Family CAN controller driver</div><div class='add'>+//</div><div class='add'>+// Copyright (c) 2020 Pengutronix,</div><div class='add'>+//                    Marc Kleine-Budde &lt;kernel@pengutronix.de&gt;</div><div class='add'>+//</div><div class='add'>+// Based on:</div><div class='add'>+//</div><div class='add'>+// CAN bus driver for Microchip 25XXFD CAN Controller with SPI Interface</div><div class='add'>+//</div><div class='add'>+// Copyright (c) 2019 Martin Sperl &lt;kernel@martin.sperl.org&gt;</div><div class='add'>+//</div><div class='add'>+</div><div class='add'>+#include "mcp251xfd.h"</div><div class='add'>+</div><div class='add'>+/* The standard crc16 in linux/crc16.h is unfortunately not computing</div><div class='add'>+ * the correct results (left shift vs. right shift). So here an</div><div class='add'>+ * implementation with a table generated with the help of:</div><div class='add'>+ *</div><div class='add'>+ * http://lkml.iu.edu/hypermail/linux/kernel/0508.1/1085.html</div><div class='add'>+ */</div><div class='add'>+static const u16 mcp251xfd_crc16_table[] = {</div><div class='add'>+	0x0000, 0x8005, 0x800f, 0x000a, 0x801b, 0x001e, 0x0014, 0x8011,</div><div class='add'>+	0x8033, 0x0036, 0x003c, 0x8039, 0x0028, 0x802d, 0x8027, 0x0022,</div><div class='add'>+	0x8063, 0x0066, 0x006c, 0x8069, 0x0078, 0x807d, 0x8077, 0x0072,</div><div class='add'>+	0x0050, 0x8055, 0x805f, 0x005a, 0x804b, 0x004e, 0x0044, 0x8041,</div><div class='add'>+	0x80c3, 0x00c6, 0x00cc, 0x80c9, 0x00d8, 0x80dd, 0x80d7, 0x00d2,</div><div class='add'>+	0x00f0, 0x80f5, 0x80ff, 0x00fa, 0x80eb, 0x00ee, 0x00e4, 0x80e1,</div><div class='add'>+	0x00a0, 0x80a5, 0x80af, 0x00aa, 0x80bb, 0x00be, 0x00b4, 0x80b1,</div><div class='add'>+	0x8093, 0x0096, 0x009c, 0x8099, 0x0088, 0x808d, 0x8087, 0x0082,</div><div class='add'>+	0x8183, 0x0186, 0x018c, 0x8189, 0x0198, 0x819d, 0x8197, 0x0192,</div><div class='add'>+	0x01b0, 0x81b5, 0x81bf, 0x01ba, 0x81ab, 0x01ae, 0x01a4, 0x81a1,</div><div class='add'>+	0x01e0, 0x81e5, 0x81ef, 0x01ea, 0x81fb, 0x01fe, 0x01f4, 0x81f1,</div><div class='add'>+	0x81d3, 0x01d6, 0x01dc, 0x81d9, 0x01c8, 0x81cd, 0x81c7, 0x01c2,</div><div class='add'>+	0x0140, 0x8145, 0x814f, 0x014a, 0x815b, 0x015e, 0x0154, 0x8151,</div><div class='add'>+	0x8173, 0x0176, 0x017c, 0x8179, 0x0168, 0x816d, 0x8167, 0x0162,</div><div class='add'>+	0x8123, 0x0126, 0x012c, 0x8129, 0x0138, 0x813d, 0x8137, 0x0132,</div><div class='add'>+	0x0110, 0x8115, 0x811f, 0x011a, 0x810b, 0x010e, 0x0104, 0x8101,</div><div class='add'>+	0x8303, 0x0306, 0x030c, 0x8309, 0x0318, 0x831d, 0x8317, 0x0312,</div><div class='add'>+	0x0330, 0x8335, 0x833f, 0x033a, 0x832b, 0x032e, 0x0324, 0x8321,</div><div class='add'>+	0x0360, 0x8365, 0x836f, 0x036a, 0x837b, 0x037e, 0x0374, 0x8371,</div><div class='add'>+	0x8353, 0x0356, 0x035c, 0x8359, 0x0348, 0x834d, 0x8347, 0x0342,</div><div class='add'>+	0x03c0, 0x83c5, 0x83cf, 0x03ca, 0x83db, 0x03de, 0x03d4, 0x83d1,</div><div class='add'>+	0x83f3, 0x03f6, 0x03fc, 0x83f9, 0x03e8, 0x83ed, 0x83e7, 0x03e2,</div><div class='add'>+	0x83a3, 0x03a6, 0x03ac, 0x83a9, 0x03b8, 0x83bd, 0x83b7, 0x03b2,</div><div class='add'>+	0x0390, 0x8395, 0x839f, 0x039a, 0x838b, 0x038e, 0x0384, 0x8381,</div><div class='add'>+	0x0280, 0x8285, 0x828f, 0x028a, 0x829b, 0x029e, 0x0294, 0x8291,</div><div class='add'>+	0x82b3, 0x02b6, 0x02bc, 0x82b9, 0x02a8, 0x82ad, 0x82a7, 0x02a2,</div><div class='add'>+	0x82e3, 0x02e6, 0x02ec, 0x82e9, 0x02f8, 0x82fd, 0x82f7, 0x02f2,</div><div class='add'>+	0x02d0, 0x82d5, 0x82df, 0x02da, 0x82cb, 0x02ce, 0x02c4, 0x82c1,</div><div class='add'>+	0x8243, 0x0246, 0x024c, 0x8249, 0x0258, 0x825d, 0x8257, 0x0252,</div><div class='add'>+	0x0270, 0x8275, 0x827f, 0x027a, 0x826b, 0x026e, 0x0264, 0x8261,</div><div class='add'>+	0x0220, 0x8225, 0x822f, 0x022a, 0x823b, 0x023e, 0x0234, 0x8231,</div><div class='add'>+	0x8213, 0x0216, 0x021c, 0x8219, 0x0208, 0x820d, 0x8207, 0x0202</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline u16 mcp251xfd_crc16_byte(u16 crc, const u8 data)</div><div class='add'>+{</div><div class='add'>+	u8 index = (crc &gt;&gt; 8) ^ data;</div><div class='add'>+</div><div class='add'>+	return (crc &lt;&lt; 8) ^ mcp251xfd_crc16_table[index];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 mcp251xfd_crc16(u16 crc, u8 const *buffer, size_t len)</div><div class='add'>+{</div><div class='add'>+	while (len--)</div><div class='add'>+		crc = mcp251xfd_crc16_byte(crc, *buffer++);</div><div class='add'>+</div><div class='add'>+	return crc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u16 mcp251xfd_crc16_compute(const void *data, size_t data_size)</div><div class='add'>+{</div><div class='add'>+	u16 crc = 0xffff;</div><div class='add'>+</div><div class='add'>+	return mcp251xfd_crc16(crc, data, data_size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u16 mcp251xfd_crc16_compute2(const void *cmd, size_t cmd_size,</div><div class='add'>+			     const void *data, size_t data_size)</div><div class='add'>+{</div><div class='add'>+	u16 crc;</div><div class='add'>+</div><div class='add'>+	crc = mcp251xfd_crc16_compute(cmd, cmd_size);</div><div class='add'>+	crc = mcp251xfd_crc16(crc, data, data_size);</div><div class='add'>+</div><div class='add'>+	return crc;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/can/spi/mcp251xfd/mcp251xfd-dump.c b/drivers/net/can/spi/mcp251xfd/mcp251xfd-dump.c<br/>new file mode 100644<br/>index 000000000000..050321345304<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/mcp251xfd/mcp251xfd-dump.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/spi/mcp251xfd/mcp251xfd-dump.c</a></div><div class='hunk'>@@ -0,0 +1,285 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+//</div><div class='add'>+// mcp251xfd - Microchip MCP251xFD Family CAN controller driver</div><div class='add'>+//</div><div class='add'>+// Copyright (c) 2020, 2021 Pengutronix,</div><div class='add'>+//               Marc Kleine-Budde &lt;kernel@pengutronix.de&gt;</div><div class='add'>+// Copyright (C) 2015-2018 Etnaviv Project</div><div class='add'>+//</div><div class='add'>+</div><div class='add'>+#include &lt;linux/devcoredump.h&gt;</div><div class='add'>+</div><div class='add'>+#include "mcp251xfd.h"</div><div class='add'>+#include "mcp251xfd-dump.h"</div><div class='add'>+</div><div class='add'>+struct mcp251xfd_dump_iter {</div><div class='add'>+	void *start;</div><div class='add'>+	struct mcp251xfd_dump_object_header *hdr;</div><div class='add'>+	void *data;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mcp251xfd_dump_reg_space {</div><div class='add'>+	u16 base;</div><div class='add'>+	u16 size;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mcp251xfd_dump_ring {</div><div class='add'>+	enum mcp251xfd_dump_object_ring_key key;</div><div class='add'>+	u32 val;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct mcp251xfd_dump_reg_space mcp251xfd_dump_reg_space[] = {</div><div class='add'>+	{</div><div class='add'>+		.base = MCP251XFD_REG_CON,</div><div class='add'>+		.size = MCP251XFD_REG_FLTOBJ(32) - MCP251XFD_REG_CON,</div><div class='add'>+	}, {</div><div class='add'>+		.base = MCP251XFD_RAM_START,</div><div class='add'>+		.size = MCP251XFD_RAM_SIZE,</div><div class='add'>+	}, {</div><div class='add'>+		.base = MCP251XFD_REG_OSC,</div><div class='add'>+		.size = MCP251XFD_REG_DEVID - MCP251XFD_REG_OSC,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void mcp251xfd_dump_header(struct mcp251xfd_dump_iter *iter,</div><div class='add'>+				  enum mcp251xfd_dump_object_type object_type,</div><div class='add'>+				  const void *data_end)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_dump_object_header *hdr = iter-&gt;hdr;</div><div class='add'>+	unsigned int len;</div><div class='add'>+</div><div class='add'>+	len = data_end - iter-&gt;data;</div><div class='add'>+	if (!len)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	hdr-&gt;magic = cpu_to_le32(MCP251XFD_DUMP_MAGIC);</div><div class='add'>+	hdr-&gt;type = cpu_to_le32(object_type);</div><div class='add'>+	hdr-&gt;offset = cpu_to_le32(iter-&gt;data - iter-&gt;start);</div><div class='add'>+	hdr-&gt;len = cpu_to_le32(len);</div><div class='add'>+</div><div class='add'>+	iter-&gt;hdr++;</div><div class='add'>+	iter-&gt;data += len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mcp251xfd_dump_registers(const struct mcp251xfd_priv *priv,</div><div class='add'>+				     struct mcp251xfd_dump_iter *iter)</div><div class='add'>+{</div><div class='add'>+	const int val_bytes = regmap_get_val_bytes(priv-&gt;map_rx);</div><div class='add'>+	struct mcp251xfd_dump_object_reg *reg = iter-&gt;data;</div><div class='add'>+	unsigned int i, j;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(mcp251xfd_dump_reg_space); i++) {</div><div class='add'>+		const struct mcp251xfd_dump_reg_space *reg_space;</div><div class='add'>+		void *buf;</div><div class='add'>+</div><div class='add'>+		reg_space = &amp;mcp251xfd_dump_reg_space[i];</div><div class='add'>+</div><div class='add'>+		buf = kmalloc(reg_space-&gt;size, GFP_KERNEL);</div><div class='add'>+		if (!buf)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		err = regmap_bulk_read(priv-&gt;map_reg, reg_space-&gt;base,</div><div class='add'>+				       buf, reg_space-&gt;size / val_bytes);</div><div class='add'>+		if (err) {</div><div class='add'>+			kfree(buf);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		for (j = 0; j &lt; reg_space-&gt;size; j += sizeof(u32), reg++) {</div><div class='add'>+			reg-&gt;reg = cpu_to_le32(reg_space-&gt;base + j);</div><div class='add'>+			reg-&gt;val = cpu_to_le32p(buf + j);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		kfree(buf);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mcp251xfd_dump_header(iter, MCP251XFD_DUMP_OBJECT_TYPE_REG, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mcp251xfd_dump_ring(struct mcp251xfd_dump_iter *iter,</div><div class='add'>+				enum mcp251xfd_dump_object_type object_type,</div><div class='add'>+				const struct mcp251xfd_dump_ring *dump_ring,</div><div class='add'>+				unsigned int len)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_dump_object_reg *reg = iter-&gt;data;</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; len; i++, reg++) {</div><div class='add'>+		reg-&gt;reg = cpu_to_le32(dump_ring[i].key);</div><div class='add'>+		reg-&gt;val = cpu_to_le32(dump_ring[i].val);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mcp251xfd_dump_header(iter, object_type, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mcp251xfd_dump_tef_ring(const struct mcp251xfd_priv *priv,</div><div class='add'>+				    struct mcp251xfd_dump_iter *iter)</div><div class='add'>+{</div><div class='add'>+	const struct mcp251xfd_tef_ring *tef = priv-&gt;tef;</div><div class='add'>+	const struct mcp251xfd_tx_ring *tx = priv-&gt;tx;</div><div class='add'>+	const struct mcp251xfd_dump_ring dump_ring[] = {</div><div class='add'>+		{</div><div class='add'>+			.key = MCP251XFD_DUMP_OBJECT_RING_KEY_HEAD,</div><div class='add'>+			.val = tef-&gt;head,</div><div class='add'>+		}, {</div><div class='add'>+			.key = MCP251XFD_DUMP_OBJECT_RING_KEY_TAIL,</div><div class='add'>+			.val = tef-&gt;tail,</div><div class='add'>+		}, {</div><div class='add'>+			.key = MCP251XFD_DUMP_OBJECT_RING_KEY_BASE,</div><div class='add'>+			.val = 0,</div><div class='add'>+		}, {</div><div class='add'>+			.key = MCP251XFD_DUMP_OBJECT_RING_KEY_NR,</div><div class='add'>+			.val = 0,</div><div class='add'>+		}, {</div><div class='add'>+			.key = MCP251XFD_DUMP_OBJECT_RING_KEY_FIFO_NR,</div><div class='add'>+			.val = 0,</div><div class='add'>+		}, {</div><div class='add'>+			.key = MCP251XFD_DUMP_OBJECT_RING_KEY_OBJ_NUM,</div><div class='add'>+			.val = tx-&gt;obj_num,</div><div class='add'>+		}, {</div><div class='add'>+			.key = MCP251XFD_DUMP_OBJECT_RING_KEY_OBJ_SIZE,</div><div class='add'>+			.val = sizeof(struct mcp251xfd_hw_tef_obj),</div><div class='add'>+		},</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcp251xfd_dump_ring(iter, MCP251XFD_DUMP_OBJECT_TYPE_TEF,</div><div class='add'>+			    dump_ring, ARRAY_SIZE(dump_ring));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mcp251xfd_dump_rx_ring_one(const struct mcp251xfd_priv *priv,</div><div class='add'>+				       struct mcp251xfd_dump_iter *iter,</div><div class='add'>+				       const struct mcp251xfd_rx_ring *rx)</div><div class='add'>+{</div><div class='add'>+	const struct mcp251xfd_dump_ring dump_ring[] = {</div><div class='add'>+		{</div><div class='add'>+			.key = MCP251XFD_DUMP_OBJECT_RING_KEY_HEAD,</div><div class='add'>+			.val = rx-&gt;head,</div><div class='add'>+		}, {</div><div class='add'>+			.key = MCP251XFD_DUMP_OBJECT_RING_KEY_TAIL,</div><div class='add'>+			.val = rx-&gt;tail,</div><div class='add'>+		}, {</div><div class='add'>+			.key = MCP251XFD_DUMP_OBJECT_RING_KEY_BASE,</div><div class='add'>+			.val = rx-&gt;base,</div><div class='add'>+		}, {</div><div class='add'>+			.key = MCP251XFD_DUMP_OBJECT_RING_KEY_NR,</div><div class='add'>+			.val = rx-&gt;nr,</div><div class='add'>+		}, {</div><div class='add'>+			.key = MCP251XFD_DUMP_OBJECT_RING_KEY_FIFO_NR,</div><div class='add'>+			.val = rx-&gt;fifo_nr,</div><div class='add'>+		}, {</div><div class='add'>+			.key = MCP251XFD_DUMP_OBJECT_RING_KEY_OBJ_NUM,</div><div class='add'>+			.val = rx-&gt;obj_num,</div><div class='add'>+		}, {</div><div class='add'>+			.key = MCP251XFD_DUMP_OBJECT_RING_KEY_OBJ_SIZE,</div><div class='add'>+			.val = rx-&gt;obj_size,</div><div class='add'>+		},</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcp251xfd_dump_ring(iter, MCP251XFD_DUMP_OBJECT_TYPE_RX,</div><div class='add'>+			    dump_ring, ARRAY_SIZE(dump_ring));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mcp251xfd_dump_rx_ring(const struct mcp251xfd_priv *priv,</div><div class='add'>+				   struct mcp251xfd_dump_iter *iter)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_rx_ring *rx_ring;</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	mcp251xfd_for_each_rx_ring(priv, rx_ring, i)</div><div class='add'>+		mcp251xfd_dump_rx_ring_one(priv, iter, rx_ring);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mcp251xfd_dump_tx_ring(const struct mcp251xfd_priv *priv,</div><div class='add'>+				   struct mcp251xfd_dump_iter *iter)</div><div class='add'>+{</div><div class='add'>+	const struct mcp251xfd_tx_ring *tx = priv-&gt;tx;</div><div class='add'>+	const struct mcp251xfd_dump_ring dump_ring[] = {</div><div class='add'>+		{</div><div class='add'>+			.key = MCP251XFD_DUMP_OBJECT_RING_KEY_HEAD,</div><div class='add'>+			.val = tx-&gt;head,</div><div class='add'>+		}, {</div><div class='add'>+			.key = MCP251XFD_DUMP_OBJECT_RING_KEY_TAIL,</div><div class='add'>+			.val = tx-&gt;tail,</div><div class='add'>+		}, {</div><div class='add'>+			.key = MCP251XFD_DUMP_OBJECT_RING_KEY_BASE,</div><div class='add'>+			.val = tx-&gt;base,</div><div class='add'>+		}, {</div><div class='add'>+			.key = MCP251XFD_DUMP_OBJECT_RING_KEY_NR,</div><div class='add'>+			.val = tx-&gt;nr,</div><div class='add'>+		}, {</div><div class='add'>+			.key = MCP251XFD_DUMP_OBJECT_RING_KEY_FIFO_NR,</div><div class='add'>+			.val = tx-&gt;fifo_nr,</div><div class='add'>+		}, {</div><div class='add'>+			.key = MCP251XFD_DUMP_OBJECT_RING_KEY_OBJ_NUM,</div><div class='add'>+			.val = tx-&gt;obj_num,</div><div class='add'>+		}, {</div><div class='add'>+			.key = MCP251XFD_DUMP_OBJECT_RING_KEY_OBJ_SIZE,</div><div class='add'>+			.val = tx-&gt;obj_size,</div><div class='add'>+		},</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcp251xfd_dump_ring(iter, MCP251XFD_DUMP_OBJECT_TYPE_TX,</div><div class='add'>+			    dump_ring, ARRAY_SIZE(dump_ring));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mcp251xfd_dump_end(const struct mcp251xfd_priv *priv,</div><div class='add'>+			       struct mcp251xfd_dump_iter *iter)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_dump_object_header *hdr = iter-&gt;hdr;</div><div class='add'>+</div><div class='add'>+	hdr-&gt;magic = cpu_to_le32(MCP251XFD_DUMP_MAGIC);</div><div class='add'>+	hdr-&gt;type = cpu_to_le32(MCP251XFD_DUMP_OBJECT_TYPE_END);</div><div class='add'>+	hdr-&gt;offset = cpu_to_le32(0);</div><div class='add'>+	hdr-&gt;len = cpu_to_le32(0);</div><div class='add'>+</div><div class='add'>+	/* provoke NULL pointer access, if used after END object */</div><div class='add'>+	iter-&gt;hdr = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mcp251xfd_dump(const struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_dump_iter iter;</div><div class='add'>+	unsigned int rings_num, obj_num;</div><div class='add'>+	unsigned int file_size = 0;</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	/* register space + end marker */</div><div class='add'>+	obj_num = 2;</div><div class='add'>+</div><div class='add'>+	/* register space */</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(mcp251xfd_dump_reg_space); i++)</div><div class='add'>+		file_size += mcp251xfd_dump_reg_space[i].size / sizeof(u32) *</div><div class='add'>+			sizeof(struct mcp251xfd_dump_object_reg);</div><div class='add'>+</div><div class='add'>+	/* TEF ring, RX rings, TX ring */</div><div class='add'>+	rings_num = 1 + priv-&gt;rx_ring_num + 1;</div><div class='add'>+	obj_num += rings_num;</div><div class='add'>+	file_size += rings_num * __MCP251XFD_DUMP_OBJECT_RING_KEY_MAX  *</div><div class='add'>+		sizeof(struct mcp251xfd_dump_object_reg);</div><div class='add'>+</div><div class='add'>+	/* size of the headers */</div><div class='add'>+	file_size += sizeof(*iter.hdr) * obj_num;</div><div class='add'>+</div><div class='add'>+	/* allocate the file in vmalloc memory, it's likely to be big */</div><div class='add'>+	iter.start = __vmalloc(file_size, GFP_KERNEL | __GFP_NOWARN |</div><div class='add'>+			       __GFP_ZERO | __GFP_NORETRY);</div><div class='add'>+	if (!iter.start) {</div><div class='add'>+		netdev_warn(priv-&gt;ndev, "Failed to allocate devcoredump file.\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* point the data member after the headers */</div><div class='add'>+	iter.hdr = iter.start;</div><div class='add'>+	iter.data = &amp;iter.hdr[obj_num];</div><div class='add'>+</div><div class='add'>+	mcp251xfd_dump_registers(priv, &amp;iter);</div><div class='add'>+	mcp251xfd_dump_tef_ring(priv, &amp;iter);</div><div class='add'>+	mcp251xfd_dump_rx_ring(priv, &amp;iter);</div><div class='add'>+	mcp251xfd_dump_tx_ring(priv, &amp;iter);</div><div class='add'>+	mcp251xfd_dump_end(priv, &amp;iter);</div><div class='add'>+</div><div class='add'>+	dev_coredumpv(&amp;priv-&gt;spi-&gt;dev, iter.start,</div><div class='add'>+		      iter.data - iter.start, GFP_KERNEL);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/can/spi/mcp251xfd/mcp251xfd-dump.h b/drivers/net/can/spi/mcp251xfd/mcp251xfd-dump.h<br/>new file mode 100644<br/>index 000000000000..e7560b0712eb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/mcp251xfd/mcp251xfd-dump.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/spi/mcp251xfd/mcp251xfd-dump.h</a></div><div class='hunk'>@@ -0,0 +1,45 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0</div><div class='add'>+ *</div><div class='add'>+ * mcp251xfd - Microchip MCP251xFD Family CAN controller driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2019, 2020, 2021 Pengutronix,</div><div class='add'>+ *               Marc Kleine-Budde &lt;kernel@pengutronix.de&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _MCP251XFD_DUMP_H</div><div class='add'>+#define _MCP251XFD_DUMP_H</div><div class='add'>+</div><div class='add'>+#define MCP251XFD_DUMP_MAGIC 0x1825434d</div><div class='add'>+</div><div class='add'>+enum mcp251xfd_dump_object_type {</div><div class='add'>+	MCP251XFD_DUMP_OBJECT_TYPE_REG,</div><div class='add'>+	MCP251XFD_DUMP_OBJECT_TYPE_TEF,</div><div class='add'>+	MCP251XFD_DUMP_OBJECT_TYPE_RX,</div><div class='add'>+	MCP251XFD_DUMP_OBJECT_TYPE_TX,</div><div class='add'>+	MCP251XFD_DUMP_OBJECT_TYPE_END = -1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum mcp251xfd_dump_object_ring_key {</div><div class='add'>+	MCP251XFD_DUMP_OBJECT_RING_KEY_HEAD,</div><div class='add'>+	MCP251XFD_DUMP_OBJECT_RING_KEY_TAIL,</div><div class='add'>+	MCP251XFD_DUMP_OBJECT_RING_KEY_BASE,</div><div class='add'>+	MCP251XFD_DUMP_OBJECT_RING_KEY_NR,</div><div class='add'>+	MCP251XFD_DUMP_OBJECT_RING_KEY_FIFO_NR,</div><div class='add'>+	MCP251XFD_DUMP_OBJECT_RING_KEY_OBJ_NUM,</div><div class='add'>+	MCP251XFD_DUMP_OBJECT_RING_KEY_OBJ_SIZE,</div><div class='add'>+	__MCP251XFD_DUMP_OBJECT_RING_KEY_MAX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mcp251xfd_dump_object_header {</div><div class='add'>+	__le32 magic;</div><div class='add'>+	__le32 type;</div><div class='add'>+	__le32 offset;</div><div class='add'>+	__le32 len;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mcp251xfd_dump_object_reg {</div><div class='add'>+	__le32 reg;</div><div class='add'>+	__le32 val;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/can/spi/mcp251xfd/mcp251xfd-ethtool.c b/drivers/net/can/spi/mcp251xfd/mcp251xfd-ethtool.c<br/>new file mode 100644<br/>index 000000000000..57eeb066a945<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/mcp251xfd/mcp251xfd-ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/spi/mcp251xfd/mcp251xfd-ethtool.c</a></div><div class='hunk'>@@ -0,0 +1,145 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+//</div><div class='add'>+// mcp251xfd - Microchip MCP251xFD Family CAN controller driver</div><div class='add'>+//</div><div class='add'>+// Copyright (c) 2021, 2022 Pengutronix,</div><div class='add'>+//               Marc Kleine-Budde &lt;kernel@pengutronix.de&gt;</div><div class='add'>+//</div><div class='add'>+</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+</div><div class='add'>+#include "mcp251xfd.h"</div><div class='add'>+#include "mcp251xfd-ram.h"</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mcp251xfd_ring_get_ringparam(struct net_device *ndev,</div><div class='add'>+			     struct ethtool_ringparam *ring,</div><div class='add'>+			     struct kernel_ethtool_ringparam *kernel_ring,</div><div class='add'>+			     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	const struct mcp251xfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	const bool fd_mode = mcp251xfd_is_fd_mode(priv);</div><div class='add'>+	struct can_ram_layout layout;</div><div class='add'>+</div><div class='add'>+	can_ram_get_layout(&amp;layout, &amp;mcp251xfd_ram_config, NULL, NULL, fd_mode);</div><div class='add'>+	ring-&gt;rx_max_pending = layout.max_rx;</div><div class='add'>+	ring-&gt;tx_max_pending = layout.max_tx;</div><div class='add'>+</div><div class='add'>+	ring-&gt;rx_pending = priv-&gt;rx_obj_num;</div><div class='add'>+	ring-&gt;tx_pending = priv-&gt;tx-&gt;obj_num;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mcp251xfd_ring_set_ringparam(struct net_device *ndev,</div><div class='add'>+			     struct ethtool_ringparam *ring,</div><div class='add'>+			     struct kernel_ethtool_ringparam *kernel_ring,</div><div class='add'>+			     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	const bool fd_mode = mcp251xfd_is_fd_mode(priv);</div><div class='add'>+	struct can_ram_layout layout;</div><div class='add'>+</div><div class='add'>+	can_ram_get_layout(&amp;layout, &amp;mcp251xfd_ram_config, ring, NULL, fd_mode);</div><div class='add'>+	if ((layout.cur_rx != priv-&gt;rx_obj_num ||</div><div class='add'>+	     layout.cur_tx != priv-&gt;tx-&gt;obj_num) &amp;&amp;</div><div class='add'>+	    netif_running(ndev))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	priv-&gt;rx_obj_num = layout.cur_rx;</div><div class='add'>+	priv-&gt;rx_obj_num_coalesce_irq = layout.rx_coalesce;</div><div class='add'>+	priv-&gt;tx-&gt;obj_num = layout.cur_tx;</div><div class='add'>+	priv-&gt;tx_obj_num_coalesce_irq = layout.tx_coalesce;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_ring_get_coalesce(struct net_device *ndev,</div><div class='add'>+				       struct ethtool_coalesce *ec,</div><div class='add'>+				       struct kernel_ethtool_coalesce *kec,</div><div class='add'>+				       struct netlink_ext_ack *ext_ack)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	u32 rx_max_frames, tx_max_frames;</div><div class='add'>+</div><div class='add'>+	/* The ethtool doc says:</div><div class='add'>+	 * To disable coalescing, set usecs = 0 and max_frames = 1.</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;rx_obj_num_coalesce_irq == 0)</div><div class='add'>+		rx_max_frames = 1;</div><div class='add'>+	else</div><div class='add'>+		rx_max_frames = priv-&gt;rx_obj_num_coalesce_irq;</div><div class='add'>+</div><div class='add'>+	ec-&gt;rx_max_coalesced_frames_irq = rx_max_frames;</div><div class='add'>+	ec-&gt;rx_coalesce_usecs_irq = priv-&gt;rx_coalesce_usecs_irq;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;tx_obj_num_coalesce_irq == 0)</div><div class='add'>+		tx_max_frames = 1;</div><div class='add'>+	else</div><div class='add'>+		tx_max_frames = priv-&gt;tx_obj_num_coalesce_irq;</div><div class='add'>+</div><div class='add'>+	ec-&gt;tx_max_coalesced_frames_irq = tx_max_frames;</div><div class='add'>+	ec-&gt;tx_coalesce_usecs_irq = priv-&gt;tx_coalesce_usecs_irq;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_ring_set_coalesce(struct net_device *ndev,</div><div class='add'>+				       struct ethtool_coalesce *ec,</div><div class='add'>+				       struct kernel_ethtool_coalesce *kec,</div><div class='add'>+				       struct netlink_ext_ack *ext_ack)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	const bool fd_mode = mcp251xfd_is_fd_mode(priv);</div><div class='add'>+	const struct ethtool_ringparam ring = {</div><div class='add'>+		.rx_pending = priv-&gt;rx_obj_num,</div><div class='add'>+		.tx_pending = priv-&gt;tx-&gt;obj_num,</div><div class='add'>+	};</div><div class='add'>+	struct can_ram_layout layout;</div><div class='add'>+</div><div class='add'>+	can_ram_get_layout(&amp;layout, &amp;mcp251xfd_ram_config, &amp;ring, ec, fd_mode);</div><div class='add'>+</div><div class='add'>+	if ((layout.rx_coalesce != priv-&gt;rx_obj_num_coalesce_irq ||</div><div class='add'>+	     ec-&gt;rx_coalesce_usecs_irq != priv-&gt;rx_coalesce_usecs_irq ||</div><div class='add'>+	     layout.tx_coalesce != priv-&gt;tx_obj_num_coalesce_irq ||</div><div class='add'>+	     ec-&gt;tx_coalesce_usecs_irq != priv-&gt;tx_coalesce_usecs_irq) &amp;&amp;</div><div class='add'>+	    netif_running(ndev))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	priv-&gt;rx_obj_num = layout.cur_rx;</div><div class='add'>+	priv-&gt;rx_obj_num_coalesce_irq = layout.rx_coalesce;</div><div class='add'>+	priv-&gt;rx_coalesce_usecs_irq = ec-&gt;rx_coalesce_usecs_irq;</div><div class='add'>+</div><div class='add'>+	priv-&gt;tx-&gt;obj_num = layout.cur_tx;</div><div class='add'>+	priv-&gt;tx_obj_num_coalesce_irq = layout.tx_coalesce;</div><div class='add'>+	priv-&gt;tx_coalesce_usecs_irq = ec-&gt;tx_coalesce_usecs_irq;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops mcp251xfd_ethtool_ops = {</div><div class='add'>+	.supported_coalesce_params = ETHTOOL_COALESCE_RX_USECS_IRQ |</div><div class='add'>+		ETHTOOL_COALESCE_RX_MAX_FRAMES_IRQ |</div><div class='add'>+		ETHTOOL_COALESCE_TX_USECS_IRQ |</div><div class='add'>+		ETHTOOL_COALESCE_TX_MAX_FRAMES_IRQ,</div><div class='add'>+	.get_ringparam = mcp251xfd_ring_get_ringparam,</div><div class='add'>+	.set_ringparam = mcp251xfd_ring_set_ringparam,</div><div class='add'>+	.get_coalesce = mcp251xfd_ring_get_coalesce,</div><div class='add'>+	.set_coalesce = mcp251xfd_ring_set_coalesce,</div><div class='add'>+	.get_ts_info = can_ethtool_op_get_ts_info_hwts,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void mcp251xfd_ethtool_init(struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct can_ram_layout layout;</div><div class='add'>+</div><div class='add'>+	priv-&gt;ndev-&gt;ethtool_ops = &amp;mcp251xfd_ethtool_ops;</div><div class='add'>+</div><div class='add'>+	can_ram_get_layout(&amp;layout, &amp;mcp251xfd_ram_config, NULL, NULL, false);</div><div class='add'>+	priv-&gt;rx_obj_num = layout.default_rx;</div><div class='add'>+	priv-&gt;tx-&gt;obj_num = layout.default_tx;</div><div class='add'>+</div><div class='add'>+	priv-&gt;rx_obj_num_coalesce_irq = 0;</div><div class='add'>+	priv-&gt;tx_obj_num_coalesce_irq = 0;</div><div class='add'>+	priv-&gt;rx_coalesce_usecs_irq = 0;</div><div class='add'>+	priv-&gt;tx_coalesce_usecs_irq = 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/can/spi/mcp251xfd/mcp251xfd-ram.c b/drivers/net/can/spi/mcp251xfd/mcp251xfd-ram.c<br/>new file mode 100644<br/>index 000000000000..61b0d6fa52dd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/mcp251xfd/mcp251xfd-ram.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/spi/mcp251xfd/mcp251xfd-ram.c</a></div><div class='hunk'>@@ -0,0 +1,162 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+//</div><div class='add'>+// mcp251xfd - Microchip MCP251xFD Family CAN controller driver</div><div class='add'>+//</div><div class='add'>+// Copyright (c) 2021, 2022 Pengutronix,</div><div class='add'>+//               Marc Kleine-Budde &lt;kernel@pengutronix.de&gt;</div><div class='add'>+//</div><div class='add'>+</div><div class='add'>+#include "mcp251xfd-ram.h"</div><div class='add'>+</div><div class='add'>+static inline u8 can_ram_clamp(const struct can_ram_config *config,</div><div class='add'>+			       const struct can_ram_obj_config *obj,</div><div class='add'>+			       u8 val)</div><div class='add'>+{</div><div class='add'>+	u8 max;</div><div class='add'>+</div><div class='add'>+	max = min_t(u8, obj-&gt;max, obj-&gt;fifo_num * config-&gt;fifo_depth);</div><div class='add'>+	return clamp(val, obj-&gt;min, max);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8</div><div class='add'>+can_ram_rounddown_pow_of_two(const struct can_ram_config *config,</div><div class='add'>+			     const struct can_ram_obj_config *obj,</div><div class='add'>+			     const u8 coalesce, u8 val)</div><div class='add'>+{</div><div class='add'>+	u8 fifo_num = obj-&gt;fifo_num;</div><div class='add'>+	u8 ret = 0, i;</div><div class='add'>+</div><div class='add'>+	val = can_ram_clamp(config, obj, val);</div><div class='add'>+</div><div class='add'>+	if (coalesce) {</div><div class='add'>+		/* Use 1st FIFO for coalescing, if requested.</div><div class='add'>+		 *</div><div class='add'>+		 * Either use complete FIFO (and FIFO Full IRQ) for</div><div class='add'>+		 * coalescing or only half of FIFO (FIFO Half Full</div><div class='add'>+		 * IRQ) and use remaining half for normal objects.</div><div class='add'>+		 */</div><div class='add'>+		ret = min_t(u8, coalesce * 2, config-&gt;fifo_depth);</div><div class='add'>+		val -= ret;</div><div class='add'>+		fifo_num--;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; fifo_num &amp;&amp; val; i++) {</div><div class='add'>+		u8 n;</div><div class='add'>+</div><div class='add'>+		n = min_t(u8, rounddown_pow_of_two(val),</div><div class='add'>+			  config-&gt;fifo_depth);</div><div class='add'>+</div><div class='add'>+		/* skip small FIFOs */</div><div class='add'>+		if (n &lt; obj-&gt;fifo_depth_min)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		ret += n;</div><div class='add'>+		val -= n;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void can_ram_get_layout(struct can_ram_layout *layout,</div><div class='add'>+			const struct can_ram_config *config,</div><div class='add'>+			const struct ethtool_ringparam *ring,</div><div class='add'>+			const struct ethtool_coalesce *ec,</div><div class='add'>+			const bool fd_mode)</div><div class='add'>+{</div><div class='add'>+	u8 num_rx, num_tx;</div><div class='add'>+	u16 ram_free;</div><div class='add'>+</div><div class='add'>+	/* default CAN */</div><div class='add'>+</div><div class='add'>+	num_tx = config-&gt;tx.def[fd_mode];</div><div class='add'>+	num_tx = can_ram_rounddown_pow_of_two(config, &amp;config-&gt;tx, 0, num_tx);</div><div class='add'>+</div><div class='add'>+	ram_free = config-&gt;size;</div><div class='add'>+	ram_free -= config-&gt;tx.size[fd_mode] * num_tx;</div><div class='add'>+</div><div class='add'>+	num_rx = ram_free / config-&gt;rx.size[fd_mode];</div><div class='add'>+</div><div class='add'>+	layout-&gt;default_rx = can_ram_rounddown_pow_of_two(config, &amp;config-&gt;rx, 0, num_rx);</div><div class='add'>+	layout-&gt;default_tx = num_tx;</div><div class='add'>+</div><div class='add'>+	/* MAX CAN */</div><div class='add'>+</div><div class='add'>+	ram_free = config-&gt;size;</div><div class='add'>+	ram_free -= config-&gt;tx.size[fd_mode] * config-&gt;tx.min;</div><div class='add'>+	num_rx = ram_free / config-&gt;rx.size[fd_mode];</div><div class='add'>+</div><div class='add'>+	ram_free = config-&gt;size;</div><div class='add'>+	ram_free -= config-&gt;rx.size[fd_mode] * config-&gt;rx.min;</div><div class='add'>+	num_tx = ram_free / config-&gt;tx.size[fd_mode];</div><div class='add'>+</div><div class='add'>+	layout-&gt;max_rx = can_ram_rounddown_pow_of_two(config, &amp;config-&gt;rx, 0, num_rx);</div><div class='add'>+	layout-&gt;max_tx = can_ram_rounddown_pow_of_two(config, &amp;config-&gt;tx, 0, num_tx);</div><div class='add'>+</div><div class='add'>+	/* cur CAN */</div><div class='add'>+</div><div class='add'>+	if (ring) {</div><div class='add'>+		u8 num_rx_coalesce = 0, num_tx_coalesce = 0;</div><div class='add'>+</div><div class='add'>+		/* If the ring parameters have been configured in</div><div class='add'>+		 * CAN-CC mode, but and we are in CAN-FD mode now,</div><div class='add'>+		 * they might be to big. Use the default CAN-FD values</div><div class='add'>+		 * in this case.</div><div class='add'>+		 */</div><div class='add'>+		num_rx = ring-&gt;rx_pending;</div><div class='add'>+		if (num_rx &gt; layout-&gt;max_rx)</div><div class='add'>+			num_rx = layout-&gt;default_rx;</div><div class='add'>+</div><div class='add'>+		num_rx = can_ram_rounddown_pow_of_two(config, &amp;config-&gt;rx, 0, num_rx);</div><div class='add'>+</div><div class='add'>+		/* The ethtool doc says:</div><div class='add'>+		 * To disable coalescing, set usecs = 0 and max_frames = 1.</div><div class='add'>+		 */</div><div class='add'>+		if (ec &amp;&amp; !(ec-&gt;rx_coalesce_usecs_irq == 0 &amp;&amp;</div><div class='add'>+			    ec-&gt;rx_max_coalesced_frames_irq == 1)) {</div><div class='add'>+			u8 max;</div><div class='add'>+</div><div class='add'>+			/* use only max half of available objects for coalescing */</div><div class='add'>+			max = min_t(u8, num_rx / 2, config-&gt;fifo_depth);</div><div class='add'>+			num_rx_coalesce = clamp(ec-&gt;rx_max_coalesced_frames_irq,</div><div class='add'>+						(u32)config-&gt;rx.fifo_depth_coalesce_min,</div><div class='add'>+						(u32)max);</div><div class='add'>+			num_rx_coalesce = rounddown_pow_of_two(num_rx_coalesce);</div><div class='add'>+</div><div class='add'>+			num_rx = can_ram_rounddown_pow_of_two(config, &amp;config-&gt;rx,</div><div class='add'>+							      num_rx_coalesce, num_rx);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ram_free = config-&gt;size - config-&gt;rx.size[fd_mode] * num_rx;</div><div class='add'>+		num_tx = ram_free / config-&gt;tx.size[fd_mode];</div><div class='add'>+		num_tx = min_t(u8, ring-&gt;tx_pending, num_tx);</div><div class='add'>+		num_tx = can_ram_rounddown_pow_of_two(config, &amp;config-&gt;tx, 0, num_tx);</div><div class='add'>+</div><div class='add'>+		/* The ethtool doc says:</div><div class='add'>+		 * To disable coalescing, set usecs = 0 and max_frames = 1.</div><div class='add'>+		 */</div><div class='add'>+		if (ec &amp;&amp; !(ec-&gt;tx_coalesce_usecs_irq == 0 &amp;&amp;</div><div class='add'>+			    ec-&gt;tx_max_coalesced_frames_irq == 1)) {</div><div class='add'>+			u8 max;</div><div class='add'>+</div><div class='add'>+			/* use only max half of available objects for coalescing */</div><div class='add'>+			max = min_t(u8, num_tx / 2, config-&gt;fifo_depth);</div><div class='add'>+			num_tx_coalesce = clamp(ec-&gt;tx_max_coalesced_frames_irq,</div><div class='add'>+						(u32)config-&gt;tx.fifo_depth_coalesce_min,</div><div class='add'>+						(u32)max);</div><div class='add'>+			num_tx_coalesce = rounddown_pow_of_two(num_tx_coalesce);</div><div class='add'>+</div><div class='add'>+			num_tx = can_ram_rounddown_pow_of_two(config, &amp;config-&gt;tx,</div><div class='add'>+							      num_tx_coalesce, num_tx);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		layout-&gt;cur_rx = num_rx;</div><div class='add'>+		layout-&gt;cur_tx = num_tx;</div><div class='add'>+		layout-&gt;rx_coalesce = num_rx_coalesce;</div><div class='add'>+		layout-&gt;tx_coalesce = num_tx_coalesce;</div><div class='add'>+	} else {</div><div class='add'>+		layout-&gt;cur_rx = layout-&gt;default_rx;</div><div class='add'>+		layout-&gt;cur_tx = layout-&gt;default_tx;</div><div class='add'>+		layout-&gt;rx_coalesce = 0;</div><div class='add'>+		layout-&gt;tx_coalesce = 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/can/spi/mcp251xfd/mcp251xfd-ram.h b/drivers/net/can/spi/mcp251xfd/mcp251xfd-ram.h<br/>new file mode 100644<br/>index 000000000000..7558c1510cbf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/mcp251xfd/mcp251xfd-ram.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/spi/mcp251xfd/mcp251xfd-ram.h</a></div><div class='hunk'>@@ -0,0 +1,62 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0</div><div class='add'>+ *</div><div class='add'>+ * mcp251xfd - Microchip MCP251xFD Family CAN controller driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2021, 2022 Pengutronix,</div><div class='add'>+ *               Marc Kleine-Budde &lt;kernel@pengutronix.de&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _MCP251XFD_RAM_H</div><div class='add'>+#define _MCP251XFD_RAM_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+</div><div class='add'>+#define CAN_RAM_NUM_MAX (-1)</div><div class='add'>+</div><div class='add'>+enum can_ram_mode {</div><div class='add'>+	CAN_RAM_MODE_CAN,</div><div class='add'>+	CAN_RAM_MODE_CANFD,</div><div class='add'>+	__CAN_RAM_MODE_MAX</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct can_ram_obj_config {</div><div class='add'>+	u8 size[__CAN_RAM_MODE_MAX];</div><div class='add'>+</div><div class='add'>+	u8 def[__CAN_RAM_MODE_MAX];</div><div class='add'>+	u8 min;</div><div class='add'>+	u8 max;</div><div class='add'>+</div><div class='add'>+	u8 fifo_num;</div><div class='add'>+	u8 fifo_depth_min;</div><div class='add'>+	u8 fifo_depth_coalesce_min;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct can_ram_config {</div><div class='add'>+	const struct can_ram_obj_config rx;</div><div class='add'>+	const struct can_ram_obj_config tx;</div><div class='add'>+</div><div class='add'>+	u16 size;</div><div class='add'>+	u8 fifo_depth;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct can_ram_layout {</div><div class='add'>+	u8 default_rx;</div><div class='add'>+	u8 default_tx;</div><div class='add'>+</div><div class='add'>+	u8 max_rx;</div><div class='add'>+	u8 max_tx;</div><div class='add'>+</div><div class='add'>+	u8 cur_rx;</div><div class='add'>+	u8 cur_tx;</div><div class='add'>+</div><div class='add'>+	u8 rx_coalesce;</div><div class='add'>+	u8 tx_coalesce;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void can_ram_get_layout(struct can_ram_layout *layout,</div><div class='add'>+			const struct can_ram_config *config,</div><div class='add'>+			const struct ethtool_ringparam *ring,</div><div class='add'>+			const struct ethtool_coalesce *ec,</div><div class='add'>+			const bool fd_mode);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/can/spi/mcp251xfd/mcp251xfd-regmap.c b/drivers/net/can/spi/mcp251xfd/mcp251xfd-regmap.c<br/>new file mode 100644<br/>index 000000000000..70d5ff0ae7ac<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/mcp251xfd/mcp251xfd-regmap.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/spi/mcp251xfd/mcp251xfd-regmap.c</a></div><div class='hunk'>@@ -0,0 +1,687 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+//</div><div class='add'>+// mcp251xfd - Microchip MCP251xFD Family CAN controller driver</div><div class='add'>+//</div><div class='add'>+// Copyright (c) 2019, 2020, 2021 Pengutronix,</div><div class='add'>+//               Marc Kleine-Budde &lt;kernel@pengutronix.de&gt;</div><div class='add'>+//</div><div class='add'>+</div><div class='add'>+#include "mcp251xfd.h"</div><div class='add'>+</div><div class='add'>+#include &lt;linux/unaligned.h&gt;</div><div class='add'>+</div><div class='add'>+static const struct regmap_config mcp251xfd_regmap_crc;</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+_mcp251xfd_regmap_nocrc_gather_write(void *context,</div><div class='add'>+				     const void *reg, size_t reg_len,</div><div class='add'>+				     const void *val, size_t val_len)</div><div class='add'>+{</div><div class='add'>+	struct spi_device *spi = context;</div><div class='add'>+	struct mcp251xfd_priv *priv = spi_get_drvdata(spi);</div><div class='add'>+	struct mcp251xfd_map_buf_nocrc *buf_tx = priv-&gt;map_buf_nocrc_tx;</div><div class='add'>+	struct spi_transfer xfer[] = {</div><div class='add'>+		{</div><div class='add'>+			.tx_buf = buf_tx,</div><div class='add'>+			.len = sizeof(buf_tx-&gt;cmd) + val_len,</div><div class='add'>+		},</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	BUILD_BUG_ON(sizeof(buf_tx-&gt;cmd) != sizeof(__be16));</div><div class='add'>+</div><div class='add'>+	if (IS_ENABLED(CONFIG_CAN_MCP251XFD_SANITY) &amp;&amp;</div><div class='add'>+	    reg_len != sizeof(buf_tx-&gt;cmd.cmd))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;buf_tx-&gt;cmd, reg, sizeof(buf_tx-&gt;cmd));</div><div class='add'>+	memcpy(buf_tx-&gt;data, val, val_len);</div><div class='add'>+</div><div class='add'>+	return spi_sync_transfer(spi, xfer, ARRAY_SIZE(xfer));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mcp251xfd_regmap_nocrc_gather_write(void *context,</div><div class='add'>+				    const void *reg_p, size_t reg_len,</div><div class='add'>+				    const void *val, size_t val_len)</div><div class='add'>+{</div><div class='add'>+	const u16 byte_exclude = MCP251XFD_REG_IOCON +</div><div class='add'>+				 mcp251xfd_first_byte_set(MCP251XFD_REG_IOCON_GPIO_MASK);</div><div class='add'>+	u16 reg = be16_to_cpu(*(__be16 *)reg_p) &amp; MCP251XFD_SPI_ADDRESS_MASK;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Never write to bits 16..23 of IOCON register to avoid clearing of LAT0/LAT1</div><div class='add'>+	 *</div><div class='add'>+	 * According to MCP2518FD Errata DS80000789E 5 writing IOCON register using one</div><div class='add'>+	 * SPI write command clears LAT0/LAT1.</div><div class='add'>+	 *</div><div class='add'>+	 * Errata Fix/Work Around suggests to write registers with single byte</div><div class='add'>+	 * write instructions. However, it seems that the byte at 0xe06(IOCON[23:16])</div><div class='add'>+	 * is for read-only access and writing to it causes the clearing of LAT0/LAT1.</div><div class='add'>+	 */</div><div class='add'>+	if (reg &lt;= byte_exclude &amp;&amp; reg + val_len &gt; byte_exclude) {</div><div class='add'>+		size_t len = byte_exclude - reg;</div><div class='add'>+</div><div class='add'>+		/* Write up to 0xe05 */</div><div class='add'>+		ret = _mcp251xfd_regmap_nocrc_gather_write(context, reg_p, reg_len, val, len);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		/* Write from 0xe07 on */</div><div class='add'>+		reg += len + 1;</div><div class='add'>+		reg = (__force unsigned short)cpu_to_be16(MCP251XFD_SPI_INSTRUCTION_WRITE | reg);</div><div class='add'>+		return _mcp251xfd_regmap_nocrc_gather_write(context, &amp;reg, reg_len,</div><div class='add'>+							    val + len + 1,</div><div class='add'>+							    val_len - len - 1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return _mcp251xfd_regmap_nocrc_gather_write(context, reg_p, reg_len,</div><div class='add'>+						  val, val_len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mcp251xfd_regmap_nocrc_write(void *context, const void *data, size_t count)</div><div class='add'>+{</div><div class='add'>+	const size_t data_offset = sizeof(__be16);</div><div class='add'>+</div><div class='add'>+	return mcp251xfd_regmap_nocrc_gather_write(context, data, data_offset,</div><div class='add'>+						   data + data_offset, count - data_offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool</div><div class='add'>+mcp251xfd_update_bits_read_reg(const struct mcp251xfd_priv *priv,</div><div class='add'>+			       unsigned int reg)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_rx_ring *ring;</div><div class='add'>+	int n;</div><div class='add'>+</div><div class='add'>+	switch (reg) {</div><div class='add'>+	case MCP251XFD_REG_INT:</div><div class='add'>+	case MCP251XFD_REG_TEFCON:</div><div class='add'>+	case MCP251XFD_REG_FLTCON(0):</div><div class='add'>+	case MCP251XFD_REG_ECCSTAT:</div><div class='add'>+	case MCP251XFD_REG_CRC:</div><div class='add'>+		return false;</div><div class='add'>+	case MCP251XFD_REG_CON:</div><div class='add'>+	case MCP251XFD_REG_OSC:</div><div class='add'>+	case MCP251XFD_REG_ECCCON:</div><div class='add'>+	case MCP251XFD_REG_IOCON:</div><div class='add'>+		return true;</div><div class='add'>+	default:</div><div class='add'>+		mcp251xfd_for_each_rx_ring(priv, ring, n) {</div><div class='add'>+			if (reg == MCP251XFD_REG_FIFOCON(ring-&gt;fifo_nr))</div><div class='add'>+				return false;</div><div class='add'>+			if (reg == MCP251XFD_REG_FIFOSTA(ring-&gt;fifo_nr))</div><div class='add'>+				return true;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		WARN(1, "Status of reg 0x%04x unknown.\n", reg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mcp251xfd_regmap_nocrc_update_bits(void *context, unsigned int reg,</div><div class='add'>+				   unsigned int mask, unsigned int val)</div><div class='add'>+{</div><div class='add'>+	struct spi_device *spi = context;</div><div class='add'>+	struct mcp251xfd_priv *priv = spi_get_drvdata(spi);</div><div class='add'>+	struct mcp251xfd_map_buf_nocrc *buf_rx = priv-&gt;map_buf_nocrc_rx;</div><div class='add'>+	struct mcp251xfd_map_buf_nocrc *buf_tx = priv-&gt;map_buf_nocrc_tx;</div><div class='add'>+	__le32 orig_le32 = 0, mask_le32, val_le32, tmp_le32;</div><div class='add'>+	u8 first_byte, last_byte, len;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	BUILD_BUG_ON(sizeof(buf_rx-&gt;cmd) != sizeof(__be16));</div><div class='add'>+	BUILD_BUG_ON(sizeof(buf_tx-&gt;cmd) != sizeof(__be16));</div><div class='add'>+</div><div class='add'>+	if (IS_ENABLED(CONFIG_CAN_MCP251XFD_SANITY) &amp;&amp;</div><div class='add'>+	    mask == 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	first_byte = mcp251xfd_first_byte_set(mask);</div><div class='add'>+	last_byte = mcp251xfd_last_byte_set(mask);</div><div class='add'>+	len = last_byte - first_byte + 1;</div><div class='add'>+</div><div class='add'>+	if (mcp251xfd_update_bits_read_reg(priv, reg)) {</div><div class='add'>+		struct spi_transfer xfer[2] = { };</div><div class='add'>+		struct spi_message msg;</div><div class='add'>+</div><div class='add'>+		spi_message_init(&amp;msg);</div><div class='add'>+		spi_message_add_tail(&amp;xfer[0], &amp;msg);</div><div class='add'>+</div><div class='add'>+		if (priv-&gt;devtype_data.quirks &amp; MCP251XFD_QUIRK_HALF_DUPLEX) {</div><div class='add'>+			xfer[0].tx_buf = buf_tx;</div><div class='add'>+			xfer[0].len = sizeof(buf_tx-&gt;cmd);</div><div class='add'>+</div><div class='add'>+			xfer[1].rx_buf = buf_rx-&gt;data;</div><div class='add'>+			xfer[1].len = len;</div><div class='add'>+			spi_message_add_tail(&amp;xfer[1], &amp;msg);</div><div class='add'>+		} else {</div><div class='add'>+			xfer[0].tx_buf = buf_tx;</div><div class='add'>+			xfer[0].rx_buf = buf_rx;</div><div class='add'>+			xfer[0].len = sizeof(buf_tx-&gt;cmd) + len;</div><div class='add'>+</div><div class='add'>+			if (MCP251XFD_SANITIZE_SPI)</div><div class='add'>+				memset(buf_tx-&gt;data, 0x0, len);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		mcp251xfd_spi_cmd_read_nocrc(&amp;buf_tx-&gt;cmd, reg + first_byte);</div><div class='add'>+		err = spi_sync(spi, &amp;msg);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		memcpy(&amp;orig_le32, buf_rx-&gt;data, len);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mask_le32 = cpu_to_le32(mask &gt;&gt; BITS_PER_BYTE * first_byte);</div><div class='add'>+	val_le32 = cpu_to_le32(val &gt;&gt; BITS_PER_BYTE * first_byte);</div><div class='add'>+</div><div class='add'>+	tmp_le32 = orig_le32 &amp; ~mask_le32;</div><div class='add'>+	tmp_le32 |= val_le32 &amp; mask_le32;</div><div class='add'>+</div><div class='add'>+	reg += first_byte;</div><div class='add'>+	mcp251xfd_spi_cmd_write_nocrc(&amp;buf_tx-&gt;cmd, reg);</div><div class='add'>+	return mcp251xfd_regmap_nocrc_gather_write(context, &amp;buf_tx-&gt;cmd, 2, &amp;tmp_le32, len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mcp251xfd_regmap_nocrc_read(void *context,</div><div class='add'>+			    const void *reg, size_t reg_len,</div><div class='add'>+			    void *val_buf, size_t val_len)</div><div class='add'>+{</div><div class='add'>+	struct spi_device *spi = context;</div><div class='add'>+	struct mcp251xfd_priv *priv = spi_get_drvdata(spi);</div><div class='add'>+	struct mcp251xfd_map_buf_nocrc *buf_rx = priv-&gt;map_buf_nocrc_rx;</div><div class='add'>+	struct mcp251xfd_map_buf_nocrc *buf_tx = priv-&gt;map_buf_nocrc_tx;</div><div class='add'>+	struct spi_transfer xfer[2] = { };</div><div class='add'>+	struct spi_message msg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	BUILD_BUG_ON(sizeof(buf_rx-&gt;cmd) != sizeof(__be16));</div><div class='add'>+	BUILD_BUG_ON(sizeof(buf_tx-&gt;cmd) != sizeof(__be16));</div><div class='add'>+</div><div class='add'>+	if (IS_ENABLED(CONFIG_CAN_MCP251XFD_SANITY) &amp;&amp;</div><div class='add'>+	    reg_len != sizeof(buf_tx-&gt;cmd.cmd))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	spi_message_init(&amp;msg);</div><div class='add'>+	spi_message_add_tail(&amp;xfer[0], &amp;msg);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; MCP251XFD_QUIRK_HALF_DUPLEX) {</div><div class='add'>+		xfer[0].tx_buf = reg;</div><div class='add'>+		xfer[0].len = sizeof(buf_tx-&gt;cmd);</div><div class='add'>+</div><div class='add'>+		xfer[1].rx_buf = val_buf;</div><div class='add'>+		xfer[1].len = val_len;</div><div class='add'>+		spi_message_add_tail(&amp;xfer[1], &amp;msg);</div><div class='add'>+	} else {</div><div class='add'>+		xfer[0].tx_buf = buf_tx;</div><div class='add'>+		xfer[0].rx_buf = buf_rx;</div><div class='add'>+		xfer[0].len = sizeof(buf_tx-&gt;cmd) + val_len;</div><div class='add'>+</div><div class='add'>+		memcpy(&amp;buf_tx-&gt;cmd, reg, sizeof(buf_tx-&gt;cmd));</div><div class='add'>+		if (MCP251XFD_SANITIZE_SPI)</div><div class='add'>+			memset(buf_tx-&gt;data, 0x0, val_len);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = spi_sync(spi, &amp;msg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (!(priv-&gt;devtype_data.quirks &amp; MCP251XFD_QUIRK_HALF_DUPLEX))</div><div class='add'>+		memcpy(val_buf, buf_rx-&gt;data, val_len);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+_mcp251xfd_regmap_crc_gather_write(void *context,</div><div class='add'>+				   const void *reg_p, size_t reg_len,</div><div class='add'>+				   const void *val, size_t val_len)</div><div class='add'>+{</div><div class='add'>+	struct spi_device *spi = context;</div><div class='add'>+	struct mcp251xfd_priv *priv = spi_get_drvdata(spi);</div><div class='add'>+	struct mcp251xfd_map_buf_crc *buf_tx = priv-&gt;map_buf_crc_tx;</div><div class='add'>+	struct spi_transfer xfer[] = {</div><div class='add'>+		{</div><div class='add'>+			.tx_buf = buf_tx,</div><div class='add'>+			.len = sizeof(buf_tx-&gt;cmd) + val_len +</div><div class='add'>+				sizeof(buf_tx-&gt;crc),</div><div class='add'>+		},</div><div class='add'>+	};</div><div class='add'>+	u16 reg = *(u16 *)reg_p;</div><div class='add'>+	u16 crc;</div><div class='add'>+</div><div class='add'>+	BUILD_BUG_ON(sizeof(buf_tx-&gt;cmd) != sizeof(__be16) + sizeof(u8));</div><div class='add'>+</div><div class='add'>+	if (IS_ENABLED(CONFIG_CAN_MCP251XFD_SANITY) &amp;&amp;</div><div class='add'>+	    reg_len != sizeof(buf_tx-&gt;cmd.cmd) +</div><div class='add'>+	    mcp251xfd_regmap_crc.pad_bits / BITS_PER_BYTE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	mcp251xfd_spi_cmd_write_crc(&amp;buf_tx-&gt;cmd, reg, val_len);</div><div class='add'>+	memcpy(buf_tx-&gt;data, val, val_len);</div><div class='add'>+</div><div class='add'>+	crc = mcp251xfd_crc16_compute(buf_tx, sizeof(buf_tx-&gt;cmd) + val_len);</div><div class='add'>+	put_unaligned_be16(crc, buf_tx-&gt;data + val_len);</div><div class='add'>+</div><div class='add'>+	return spi_sync_transfer(spi, xfer, ARRAY_SIZE(xfer));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mcp251xfd_regmap_crc_gather_write(void *context,</div><div class='add'>+				  const void *reg_p, size_t reg_len,</div><div class='add'>+				  const void *val, size_t val_len)</div><div class='add'>+{</div><div class='add'>+	const u16 byte_exclude = MCP251XFD_REG_IOCON +</div><div class='add'>+				 mcp251xfd_first_byte_set(MCP251XFD_REG_IOCON_GPIO_MASK);</div><div class='add'>+	u16 reg = *(u16 *)reg_p;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Never write to bits 16..23 of IOCON register to avoid clearing of LAT0/LAT1</div><div class='add'>+	 *</div><div class='add'>+	 * According to MCP2518FD Errata DS80000789E 5 writing IOCON register using one</div><div class='add'>+	 * SPI write command clears LAT0/LAT1.</div><div class='add'>+	 *</div><div class='add'>+	 * Errata Fix/Work Around suggests to write registers with single byte</div><div class='add'>+	 * write instructions. However, it seems that the byte at 0xe06(IOCON[23:16])</div><div class='add'>+	 * is for read-only access and writing to it causes the clearing of LAT0/LAT1.</div><div class='add'>+	 */</div><div class='add'>+	if (reg &lt;= byte_exclude  &amp;&amp; reg + val_len &gt; byte_exclude) {</div><div class='add'>+		size_t len = byte_exclude - reg;</div><div class='add'>+</div><div class='add'>+		/* Write up to 0xe05 */</div><div class='add'>+		ret = _mcp251xfd_regmap_crc_gather_write(context, &amp;reg, reg_len, val, len);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		/* Write from 0xe07 on */</div><div class='add'>+		reg += len + 1;</div><div class='add'>+		return _mcp251xfd_regmap_crc_gather_write(context, &amp;reg, reg_len,</div><div class='add'>+							  val + len + 1,</div><div class='add'>+							  val_len - len - 1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return _mcp251xfd_regmap_crc_gather_write(context, reg_p, reg_len,</div><div class='add'>+						  val, val_len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mcp251xfd_regmap_crc_write(void *context,</div><div class='add'>+			   const void *data, size_t count)</div><div class='add'>+{</div><div class='add'>+	const size_t data_offset = sizeof(__be16) +</div><div class='add'>+		mcp251xfd_regmap_crc.pad_bits / BITS_PER_BYTE;</div><div class='add'>+</div><div class='add'>+	return mcp251xfd_regmap_crc_gather_write(context,</div><div class='add'>+						 data, data_offset,</div><div class='add'>+						 data + data_offset,</div><div class='add'>+						 count - data_offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mcp251xfd_regmap_crc_read_check_crc(const struct mcp251xfd_map_buf_crc * const buf_rx,</div><div class='add'>+				    const struct mcp251xfd_map_buf_crc * const buf_tx,</div><div class='add'>+				    unsigned int data_len)</div><div class='add'>+{</div><div class='add'>+	u16 crc_received, crc_calculated;</div><div class='add'>+</div><div class='add'>+	crc_received = get_unaligned_be16(buf_rx-&gt;data + data_len);</div><div class='add'>+	crc_calculated = mcp251xfd_crc16_compute2(&amp;buf_tx-&gt;cmd,</div><div class='add'>+						  sizeof(buf_tx-&gt;cmd),</div><div class='add'>+						  buf_rx-&gt;data,</div><div class='add'>+						  data_len);</div><div class='add'>+	if (crc_received != crc_calculated)</div><div class='add'>+		return -EBADMSG;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mcp251xfd_regmap_crc_read_one(struct mcp251xfd_priv *priv,</div><div class='add'>+			      struct spi_message *msg, unsigned int data_len)</div><div class='add'>+{</div><div class='add'>+	const struct mcp251xfd_map_buf_crc *buf_rx = priv-&gt;map_buf_crc_rx;</div><div class='add'>+	const struct mcp251xfd_map_buf_crc *buf_tx = priv-&gt;map_buf_crc_tx;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	BUILD_BUG_ON(sizeof(buf_rx-&gt;cmd) != sizeof(__be16) + sizeof(u8));</div><div class='add'>+	BUILD_BUG_ON(sizeof(buf_tx-&gt;cmd) != sizeof(__be16) + sizeof(u8));</div><div class='add'>+</div><div class='add'>+	err = spi_sync(priv-&gt;spi, msg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mcp251xfd_regmap_crc_read_check_crc(buf_rx, buf_tx, data_len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mcp251xfd_regmap_crc_read(void *context,</div><div class='add'>+			  const void *reg_p, size_t reg_len,</div><div class='add'>+			  void *val_buf, size_t val_len)</div><div class='add'>+{</div><div class='add'>+	struct spi_device *spi = context;</div><div class='add'>+	struct mcp251xfd_priv *priv = spi_get_drvdata(spi);</div><div class='add'>+	struct mcp251xfd_map_buf_crc *buf_rx = priv-&gt;map_buf_crc_rx;</div><div class='add'>+	struct mcp251xfd_map_buf_crc *buf_tx = priv-&gt;map_buf_crc_tx;</div><div class='add'>+	struct spi_transfer xfer[2] = { };</div><div class='add'>+	struct spi_message msg;</div><div class='add'>+	u16 reg = *(u16 *)reg_p;</div><div class='add'>+	int i, err;</div><div class='add'>+</div><div class='add'>+	BUILD_BUG_ON(sizeof(buf_rx-&gt;cmd) != sizeof(__be16) + sizeof(u8));</div><div class='add'>+	BUILD_BUG_ON(sizeof(buf_tx-&gt;cmd) != sizeof(__be16) + sizeof(u8));</div><div class='add'>+</div><div class='add'>+	if (IS_ENABLED(CONFIG_CAN_MCP251XFD_SANITY) &amp;&amp;</div><div class='add'>+	    reg_len != sizeof(buf_tx-&gt;cmd.cmd) +</div><div class='add'>+	    mcp251xfd_regmap_crc.pad_bits / BITS_PER_BYTE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	spi_message_init(&amp;msg);</div><div class='add'>+	spi_message_add_tail(&amp;xfer[0], &amp;msg);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; MCP251XFD_QUIRK_HALF_DUPLEX) {</div><div class='add'>+		xfer[0].tx_buf = buf_tx;</div><div class='add'>+		xfer[0].len = sizeof(buf_tx-&gt;cmd);</div><div class='add'>+</div><div class='add'>+		xfer[1].rx_buf = buf_rx-&gt;data;</div><div class='add'>+		xfer[1].len = val_len + sizeof(buf_tx-&gt;crc);</div><div class='add'>+		spi_message_add_tail(&amp;xfer[1], &amp;msg);</div><div class='add'>+	} else {</div><div class='add'>+		xfer[0].tx_buf = buf_tx;</div><div class='add'>+		xfer[0].rx_buf = buf_rx;</div><div class='add'>+		xfer[0].len = sizeof(buf_tx-&gt;cmd) + val_len +</div><div class='add'>+			sizeof(buf_tx-&gt;crc);</div><div class='add'>+</div><div class='add'>+		if (MCP251XFD_SANITIZE_SPI)</div><div class='add'>+			memset(buf_tx-&gt;data, 0x0, val_len +</div><div class='add'>+			       sizeof(buf_tx-&gt;crc));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mcp251xfd_spi_cmd_read_crc(&amp;buf_tx-&gt;cmd, reg, val_len);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; MCP251XFD_READ_CRC_RETRIES_MAX; i++) {</div><div class='add'>+		err = mcp251xfd_regmap_crc_read_one(priv, &amp;msg, val_len);</div><div class='add'>+		if (!err)</div><div class='add'>+			goto out;</div><div class='add'>+		if (err != -EBADMSG)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		/* MCP251XFD_REG_TBC is the time base counter</div><div class='add'>+		 * register. It increments once per SYS clock tick,</div><div class='add'>+		 * which is 20 or 40 MHz.</div><div class='add'>+		 *</div><div class='add'>+		 * Observation on the mcp2518fd shows that if the</div><div class='add'>+		 * lowest byte (which is transferred first on the SPI</div><div class='add'>+		 * bus) of that register is 0x00 or 0x80 the</div><div class='add'>+		 * calculated CRC doesn't always match the transferred</div><div class='add'>+		 * one. On the mcp2517fd this problem is not limited</div><div class='add'>+		 * to the first byte being 0x00 or 0x80.</div><div class='add'>+		 *</div><div class='add'>+		 * If the highest bit in the lowest byte is flipped</div><div class='add'>+		 * the transferred CRC matches the calculated one. We</div><div class='add'>+		 * assume for now the CRC operates on the correct</div><div class='add'>+		 * data.</div><div class='add'>+		 */</div><div class='add'>+		if (reg == MCP251XFD_REG_TBC &amp;&amp;</div><div class='add'>+		    ((buf_rx-&gt;data[0] &amp; 0xf8) == 0x0 ||</div><div class='add'>+		     (buf_rx-&gt;data[0] &amp; 0xf8) == 0x80)) {</div><div class='add'>+			/* Flip highest bit in lowest byte of le32 */</div><div class='add'>+			buf_rx-&gt;data[0] ^= 0x80;</div><div class='add'>+</div><div class='add'>+			/* re-check CRC */</div><div class='add'>+			err = mcp251xfd_regmap_crc_read_check_crc(buf_rx,</div><div class='add'>+								  buf_tx,</div><div class='add'>+								  val_len);</div><div class='add'>+			if (!err) {</div><div class='add'>+				/* If CRC is now correct, assume</div><div class='add'>+				 * flipped data is OK.</div><div class='add'>+				 */</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* MCP251XFD_REG_OSC is the first ever reg we read from.</div><div class='add'>+		 *</div><div class='add'>+		 * The chip may be in deep sleep and this SPI transfer</div><div class='add'>+		 * (i.e. the assertion of the CS) will wake the chip</div><div class='add'>+		 * up. This takes about 3ms. The CRC of this transfer</div><div class='add'>+		 * is wrong.</div><div class='add'>+		 *</div><div class='add'>+		 * Or there isn't a chip at all, in this case the CRC</div><div class='add'>+		 * will be wrong, too.</div><div class='add'>+		 *</div><div class='add'>+		 * In both cases ignore the CRC and copy the read data</div><div class='add'>+		 * to the caller. It will take care of both cases.</div><div class='add'>+		 *</div><div class='add'>+		 */</div><div class='add'>+		if (reg == MCP251XFD_REG_OSC &amp;&amp; val_len == sizeof(__le32)) {</div><div class='add'>+			err = 0;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		netdev_info(priv-&gt;ndev,</div><div class='add'>+			    "CRC read error at address 0x%04x (length=%zd, data=%*ph, CRC=0x%04x) retrying.\n",</div><div class='add'>+			    reg, val_len, (int)val_len, buf_rx-&gt;data,</div><div class='add'>+			    get_unaligned_be16(buf_rx-&gt;data + val_len));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(priv-&gt;ndev,</div><div class='add'>+			   "CRC read error at address 0x%04x (length=%zd, data=%*ph, CRC=0x%04x).\n",</div><div class='add'>+			   reg, val_len, (int)val_len, buf_rx-&gt;data,</div><div class='add'>+			   get_unaligned_be16(buf_rx-&gt;data + val_len));</div><div class='add'>+</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+out:</div><div class='add'>+	memcpy(val_buf, buf_rx-&gt;data, val_len);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct regmap_range mcp251xfd_reg_table_yes_range[] = {</div><div class='add'>+	regmap_reg_range(0x000, 0x2ec),	/* CAN FD Controller Module SFR */</div><div class='add'>+	regmap_reg_range(0x400, 0xbfc),	/* RAM */</div><div class='add'>+	regmap_reg_range(0xe00, 0xe14),	/* MCP2517/18FD SFR */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_access_table mcp251xfd_reg_table = {</div><div class='add'>+	.yes_ranges = mcp251xfd_reg_table_yes_range,</div><div class='add'>+	.n_yes_ranges = ARRAY_SIZE(mcp251xfd_reg_table_yes_range),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_config mcp251xfd_regmap_nocrc = {</div><div class='add'>+	.name = "nocrc",</div><div class='add'>+	.reg_bits = 16,</div><div class='add'>+	.reg_stride = 4,</div><div class='add'>+	.pad_bits = 0,</div><div class='add'>+	.val_bits = 32,</div><div class='add'>+	.max_register = 0xffc,</div><div class='add'>+	.wr_table = &amp;mcp251xfd_reg_table,</div><div class='add'>+	.rd_table = &amp;mcp251xfd_reg_table,</div><div class='add'>+	.cache_type = REGCACHE_NONE,</div><div class='add'>+	.read_flag_mask = (__force unsigned long)</div><div class='add'>+		cpu_to_be16(MCP251XFD_SPI_INSTRUCTION_READ),</div><div class='add'>+	.write_flag_mask = (__force unsigned long)</div><div class='add'>+		cpu_to_be16(MCP251XFD_SPI_INSTRUCTION_WRITE),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_bus mcp251xfd_bus_nocrc = {</div><div class='add'>+	.write = mcp251xfd_regmap_nocrc_write,</div><div class='add'>+	.gather_write = mcp251xfd_regmap_nocrc_gather_write,</div><div class='add'>+	.reg_update_bits = mcp251xfd_regmap_nocrc_update_bits,</div><div class='add'>+	.read = mcp251xfd_regmap_nocrc_read,</div><div class='add'>+	.reg_format_endian_default = REGMAP_ENDIAN_BIG,</div><div class='add'>+	.val_format_endian_default = REGMAP_ENDIAN_LITTLE,</div><div class='add'>+	.max_raw_read = sizeof_field(struct mcp251xfd_map_buf_nocrc, data),</div><div class='add'>+	.max_raw_write = sizeof_field(struct mcp251xfd_map_buf_nocrc, data),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_config mcp251xfd_regmap_crc = {</div><div class='add'>+	.name = "crc",</div><div class='add'>+	.reg_bits = 16,</div><div class='add'>+	.reg_stride = 4,</div><div class='add'>+	.pad_bits = 16,		/* keep data bits aligned */</div><div class='add'>+	.val_bits = 32,</div><div class='add'>+	.max_register = 0xffc,</div><div class='add'>+	.wr_table = &amp;mcp251xfd_reg_table,</div><div class='add'>+	.rd_table = &amp;mcp251xfd_reg_table,</div><div class='add'>+	.cache_type = REGCACHE_NONE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_bus mcp251xfd_bus_crc = {</div><div class='add'>+	.write = mcp251xfd_regmap_crc_write,</div><div class='add'>+	.gather_write = mcp251xfd_regmap_crc_gather_write,</div><div class='add'>+	.read = mcp251xfd_regmap_crc_read,</div><div class='add'>+	.reg_format_endian_default = REGMAP_ENDIAN_NATIVE,</div><div class='add'>+	.val_format_endian_default = REGMAP_ENDIAN_LITTLE,</div><div class='add'>+	.max_raw_read = sizeof_field(struct mcp251xfd_map_buf_crc, data),</div><div class='add'>+	.max_raw_write = sizeof_field(struct mcp251xfd_map_buf_crc, data),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline bool</div><div class='add'>+mcp251xfd_regmap_use_nocrc(struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return (!(priv-&gt;devtype_data.quirks &amp; MCP251XFD_QUIRK_CRC_REG)) ||</div><div class='add'>+		(!(priv-&gt;devtype_data.quirks &amp; MCP251XFD_QUIRK_CRC_RX));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool</div><div class='add'>+mcp251xfd_regmap_use_crc(struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return (priv-&gt;devtype_data.quirks &amp; MCP251XFD_QUIRK_CRC_REG) ||</div><div class='add'>+		(priv-&gt;devtype_data.quirks &amp; MCP251XFD_QUIRK_CRC_RX);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mcp251xfd_regmap_init_nocrc(struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	if (!priv-&gt;map_nocrc) {</div><div class='add'>+		struct regmap *map;</div><div class='add'>+</div><div class='add'>+		map = devm_regmap_init(&amp;priv-&gt;spi-&gt;dev, &amp;mcp251xfd_bus_nocrc,</div><div class='add'>+				       priv-&gt;spi, &amp;mcp251xfd_regmap_nocrc);</div><div class='add'>+		if (IS_ERR(map))</div><div class='add'>+			return PTR_ERR(map);</div><div class='add'>+</div><div class='add'>+		priv-&gt;map_nocrc = map;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;map_buf_nocrc_rx) {</div><div class='add'>+		priv-&gt;map_buf_nocrc_rx =</div><div class='add'>+			devm_kzalloc(&amp;priv-&gt;spi-&gt;dev,</div><div class='add'>+				     sizeof(*priv-&gt;map_buf_nocrc_rx),</div><div class='add'>+				     GFP_KERNEL);</div><div class='add'>+		if (!priv-&gt;map_buf_nocrc_rx)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;map_buf_nocrc_tx) {</div><div class='add'>+		priv-&gt;map_buf_nocrc_tx =</div><div class='add'>+			devm_kzalloc(&amp;priv-&gt;spi-&gt;dev,</div><div class='add'>+				     sizeof(*priv-&gt;map_buf_nocrc_tx),</div><div class='add'>+				     GFP_KERNEL);</div><div class='add'>+		if (!priv-&gt;map_buf_nocrc_tx)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!(priv-&gt;devtype_data.quirks &amp; MCP251XFD_QUIRK_CRC_REG))</div><div class='add'>+		priv-&gt;map_reg = priv-&gt;map_nocrc;</div><div class='add'>+</div><div class='add'>+	if (!(priv-&gt;devtype_data.quirks &amp; MCP251XFD_QUIRK_CRC_RX))</div><div class='add'>+		priv-&gt;map_rx = priv-&gt;map_nocrc;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mcp251xfd_regmap_destroy_nocrc(struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	if (priv-&gt;map_buf_nocrc_rx) {</div><div class='add'>+		devm_kfree(&amp;priv-&gt;spi-&gt;dev, priv-&gt;map_buf_nocrc_rx);</div><div class='add'>+		priv-&gt;map_buf_nocrc_rx = NULL;</div><div class='add'>+	}</div><div class='add'>+	if (priv-&gt;map_buf_nocrc_tx) {</div><div class='add'>+		devm_kfree(&amp;priv-&gt;spi-&gt;dev, priv-&gt;map_buf_nocrc_tx);</div><div class='add'>+		priv-&gt;map_buf_nocrc_tx = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mcp251xfd_regmap_init_crc(struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	if (!priv-&gt;map_crc) {</div><div class='add'>+		struct regmap *map;</div><div class='add'>+</div><div class='add'>+		map = devm_regmap_init(&amp;priv-&gt;spi-&gt;dev, &amp;mcp251xfd_bus_crc,</div><div class='add'>+				       priv-&gt;spi, &amp;mcp251xfd_regmap_crc);</div><div class='add'>+		if (IS_ERR(map))</div><div class='add'>+			return PTR_ERR(map);</div><div class='add'>+</div><div class='add'>+		priv-&gt;map_crc = map;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;map_buf_crc_rx) {</div><div class='add'>+		priv-&gt;map_buf_crc_rx =</div><div class='add'>+			devm_kzalloc(&amp;priv-&gt;spi-&gt;dev,</div><div class='add'>+				     sizeof(*priv-&gt;map_buf_crc_rx),</div><div class='add'>+				     GFP_KERNEL);</div><div class='add'>+		if (!priv-&gt;map_buf_crc_rx)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;map_buf_crc_tx) {</div><div class='add'>+		priv-&gt;map_buf_crc_tx =</div><div class='add'>+			devm_kzalloc(&amp;priv-&gt;spi-&gt;dev,</div><div class='add'>+				     sizeof(*priv-&gt;map_buf_crc_tx),</div><div class='add'>+				     GFP_KERNEL);</div><div class='add'>+		if (!priv-&gt;map_buf_crc_tx)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; MCP251XFD_QUIRK_CRC_REG)</div><div class='add'>+		priv-&gt;map_reg = priv-&gt;map_crc;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; MCP251XFD_QUIRK_CRC_RX)</div><div class='add'>+		priv-&gt;map_rx = priv-&gt;map_crc;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mcp251xfd_regmap_destroy_crc(struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	if (priv-&gt;map_buf_crc_rx) {</div><div class='add'>+		devm_kfree(&amp;priv-&gt;spi-&gt;dev, priv-&gt;map_buf_crc_rx);</div><div class='add'>+		priv-&gt;map_buf_crc_rx = NULL;</div><div class='add'>+	}</div><div class='add'>+	if (priv-&gt;map_buf_crc_tx) {</div><div class='add'>+		devm_kfree(&amp;priv-&gt;spi-&gt;dev, priv-&gt;map_buf_crc_tx);</div><div class='add'>+		priv-&gt;map_buf_crc_tx = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mcp251xfd_regmap_init(struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (mcp251xfd_regmap_use_nocrc(priv)) {</div><div class='add'>+		err = mcp251xfd_regmap_init_nocrc(priv);</div><div class='add'>+</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	} else {</div><div class='add'>+		mcp251xfd_regmap_destroy_nocrc(priv);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (mcp251xfd_regmap_use_crc(priv)) {</div><div class='add'>+		err = mcp251xfd_regmap_init_crc(priv);</div><div class='add'>+</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	} else {</div><div class='add'>+		mcp251xfd_regmap_destroy_crc(priv);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/can/spi/mcp251xfd/mcp251xfd-ring.c b/drivers/net/can/spi/mcp251xfd/mcp251xfd-ring.c<br/>new file mode 100644<br/>index 000000000000..c34f2067a989<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/mcp251xfd/mcp251xfd-ring.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/spi/mcp251xfd/mcp251xfd-ring.c</a></div><div class='hunk'>@@ -0,0 +1,551 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+//</div><div class='add'>+// mcp251xfd - Microchip MCP251xFD Family CAN controller driver</div><div class='add'>+//</div><div class='add'>+// Copyright (c) 2019, 2020, 2021, 2024 Pengutronix,</div><div class='add'>+//               Marc Kleine-Budde &lt;kernel@pengutronix.de&gt;</div><div class='add'>+//</div><div class='add'>+// Based on:</div><div class='add'>+//</div><div class='add'>+// CAN bus driver for Microchip 25XXFD CAN Controller with SPI Interface</div><div class='add'>+//</div><div class='add'>+// Copyright (c) 2019 Martin Sperl &lt;kernel@martin.sperl.org&gt;</div><div class='add'>+//</div><div class='add'>+</div><div class='add'>+#include &lt;linux/unaligned.h&gt;</div><div class='add'>+</div><div class='add'>+#include "mcp251xfd.h"</div><div class='add'>+#include "mcp251xfd-ram.h"</div><div class='add'>+</div><div class='add'>+static inline u8</div><div class='add'>+mcp251xfd_cmd_prepare_write_reg(const struct mcp251xfd_priv *priv,</div><div class='add'>+				union mcp251xfd_write_reg_buf *write_reg_buf,</div><div class='add'>+				const u16 reg, const u32 mask, const u32 val)</div><div class='add'>+{</div><div class='add'>+	u8 first_byte, last_byte, len;</div><div class='add'>+	u8 *data;</div><div class='add'>+	__le32 val_le32;</div><div class='add'>+</div><div class='add'>+	first_byte = mcp251xfd_first_byte_set(mask);</div><div class='add'>+	last_byte = mcp251xfd_last_byte_set(mask);</div><div class='add'>+	len = last_byte - first_byte + 1;</div><div class='add'>+</div><div class='add'>+	data = mcp251xfd_spi_cmd_write(priv, write_reg_buf, reg + first_byte, len);</div><div class='add'>+	val_le32 = cpu_to_le32(val &gt;&gt; BITS_PER_BYTE * first_byte);</div><div class='add'>+	memcpy(data, &amp;val_le32, len);</div><div class='add'>+</div><div class='add'>+	if (!(priv-&gt;devtype_data.quirks &amp; MCP251XFD_QUIRK_CRC_REG)) {</div><div class='add'>+		len += sizeof(write_reg_buf-&gt;nocrc.cmd);</div><div class='add'>+	} else if (len == 1) {</div><div class='add'>+		u16 crc;</div><div class='add'>+</div><div class='add'>+		/* CRC */</div><div class='add'>+		len += sizeof(write_reg_buf-&gt;safe.cmd);</div><div class='add'>+		crc = mcp251xfd_crc16_compute(&amp;write_reg_buf-&gt;safe, len);</div><div class='add'>+		put_unaligned_be16(crc, (void *)write_reg_buf + len);</div><div class='add'>+</div><div class='add'>+		/* Total length */</div><div class='add'>+		len += sizeof(write_reg_buf-&gt;safe.crc);</div><div class='add'>+	} else {</div><div class='add'>+		u16 crc;</div><div class='add'>+</div><div class='add'>+		mcp251xfd_spi_cmd_crc_set_len_in_reg(&amp;write_reg_buf-&gt;crc.cmd,</div><div class='add'>+						     len);</div><div class='add'>+		/* CRC */</div><div class='add'>+		len += sizeof(write_reg_buf-&gt;crc.cmd);</div><div class='add'>+		crc = mcp251xfd_crc16_compute(&amp;write_reg_buf-&gt;crc, len);</div><div class='add'>+		put_unaligned_be16(crc, (void *)write_reg_buf + len);</div><div class='add'>+</div><div class='add'>+		/* Total length */</div><div class='add'>+		len += sizeof(write_reg_buf-&gt;crc.crc);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mcp251xfd_ring_init_tef(struct mcp251xfd_priv *priv, u16 *base)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_tef_ring *tef_ring;</div><div class='add'>+	struct spi_transfer *xfer;</div><div class='add'>+	u32 val;</div><div class='add'>+	u16 addr;</div><div class='add'>+	u8 len;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* TEF */</div><div class='add'>+	tef_ring = priv-&gt;tef;</div><div class='add'>+	tef_ring-&gt;head = 0;</div><div class='add'>+	tef_ring-&gt;tail = 0;</div><div class='add'>+</div><div class='add'>+	/* TEF- and TX-FIFO have same number of objects */</div><div class='add'>+	*base = mcp251xfd_get_tef_obj_addr(priv-&gt;tx-&gt;obj_num);</div><div class='add'>+</div><div class='add'>+	/* FIFO IRQ enable */</div><div class='add'>+	addr = MCP251XFD_REG_TEFCON;</div><div class='add'>+	val = MCP251XFD_REG_TEFCON_TEFOVIE | MCP251XFD_REG_TEFCON_TEFNEIE;</div><div class='add'>+</div><div class='add'>+	len = mcp251xfd_cmd_prepare_write_reg(priv, &amp;tef_ring-&gt;irq_enable_buf,</div><div class='add'>+					      addr, val, val);</div><div class='add'>+	tef_ring-&gt;irq_enable_xfer.tx_buf = &amp;tef_ring-&gt;irq_enable_buf;</div><div class='add'>+	tef_ring-&gt;irq_enable_xfer.len = len;</div><div class='add'>+	spi_message_init_with_transfers(&amp;tef_ring-&gt;irq_enable_msg,</div><div class='add'>+					&amp;tef_ring-&gt;irq_enable_xfer, 1);</div><div class='add'>+</div><div class='add'>+	/* FIFO increment TEF tail pointer */</div><div class='add'>+	addr = MCP251XFD_REG_TEFCON;</div><div class='add'>+	val = MCP251XFD_REG_TEFCON_UINC;</div><div class='add'>+	len = mcp251xfd_cmd_prepare_write_reg(priv, &amp;tef_ring-&gt;uinc_buf,</div><div class='add'>+					      addr, val, val);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(tef_ring-&gt;uinc_xfer); i++) {</div><div class='add'>+		xfer = &amp;tef_ring-&gt;uinc_xfer[i];</div><div class='add'>+		xfer-&gt;tx_buf = &amp;tef_ring-&gt;uinc_buf;</div><div class='add'>+		xfer-&gt;len = len;</div><div class='add'>+		xfer-&gt;cs_change = 1;</div><div class='add'>+		xfer-&gt;cs_change_delay.value = 0;</div><div class='add'>+		xfer-&gt;cs_change_delay.unit = SPI_DELAY_UNIT_NSECS;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* "cs_change == 1" on the last transfer results in an active</div><div class='add'>+	 * chip select after the complete SPI message. This causes the</div><div class='add'>+	 * controller to interpret the next register access as</div><div class='add'>+	 * data. Set "cs_change" of the last transfer to "0" to</div><div class='add'>+	 * properly deactivate the chip select at the end of the</div><div class='add'>+	 * message.</div><div class='add'>+	 */</div><div class='add'>+	xfer-&gt;cs_change = 0;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;tx_coalesce_usecs_irq || priv-&gt;tx_obj_num_coalesce_irq) {</div><div class='add'>+		val = MCP251XFD_REG_TEFCON_UINC |</div><div class='add'>+			MCP251XFD_REG_TEFCON_TEFOVIE |</div><div class='add'>+			MCP251XFD_REG_TEFCON_TEFHIE;</div><div class='add'>+</div><div class='add'>+		len = mcp251xfd_cmd_prepare_write_reg(priv,</div><div class='add'>+						      &amp;tef_ring-&gt;uinc_irq_disable_buf,</div><div class='add'>+						      addr, val, val);</div><div class='add'>+		xfer-&gt;tx_buf = &amp;tef_ring-&gt;uinc_irq_disable_buf;</div><div class='add'>+		xfer-&gt;len = len;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mcp251xfd_tx_ring_init_tx_obj(const struct mcp251xfd_priv *priv,</div><div class='add'>+			      const struct mcp251xfd_tx_ring *ring,</div><div class='add'>+			      struct mcp251xfd_tx_obj *tx_obj,</div><div class='add'>+			      const u8 rts_buf_len,</div><div class='add'>+			      const u8 n)</div><div class='add'>+{</div><div class='add'>+	struct spi_transfer *xfer;</div><div class='add'>+	u16 addr;</div><div class='add'>+</div><div class='add'>+	/* FIFO load */</div><div class='add'>+	addr = mcp251xfd_get_tx_obj_addr(ring, n);</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; MCP251XFD_QUIRK_CRC_TX)</div><div class='add'>+		mcp251xfd_spi_cmd_write_crc_set_addr(&amp;tx_obj-&gt;buf.crc.cmd,</div><div class='add'>+						     addr);</div><div class='add'>+	else</div><div class='add'>+		mcp251xfd_spi_cmd_write_nocrc(&amp;tx_obj-&gt;buf.nocrc.cmd,</div><div class='add'>+					      addr);</div><div class='add'>+</div><div class='add'>+	xfer = &amp;tx_obj-&gt;xfer[0];</div><div class='add'>+	xfer-&gt;tx_buf = &amp;tx_obj-&gt;buf;</div><div class='add'>+	xfer-&gt;len = 0;	/* actual len is assigned on the fly */</div><div class='add'>+	xfer-&gt;cs_change = 1;</div><div class='add'>+	xfer-&gt;cs_change_delay.value = 0;</div><div class='add'>+	xfer-&gt;cs_change_delay.unit = SPI_DELAY_UNIT_NSECS;</div><div class='add'>+</div><div class='add'>+	/* FIFO request to send */</div><div class='add'>+	xfer = &amp;tx_obj-&gt;xfer[1];</div><div class='add'>+	xfer-&gt;tx_buf = &amp;ring-&gt;rts_buf;</div><div class='add'>+	xfer-&gt;len = rts_buf_len;</div><div class='add'>+</div><div class='add'>+	/* SPI message */</div><div class='add'>+	spi_message_init_with_transfers(&amp;tx_obj-&gt;msg, tx_obj-&gt;xfer,</div><div class='add'>+					ARRAY_SIZE(tx_obj-&gt;xfer));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mcp251xfd_ring_init_tx(struct mcp251xfd_priv *priv, u16 *base, u8 *fifo_nr)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_tx_ring *tx_ring;</div><div class='add'>+	struct mcp251xfd_tx_obj *tx_obj;</div><div class='add'>+	u32 val;</div><div class='add'>+	u16 addr;</div><div class='add'>+	u8 len;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	tx_ring = priv-&gt;tx;</div><div class='add'>+	tx_ring-&gt;head = 0;</div><div class='add'>+	tx_ring-&gt;tail = 0;</div><div class='add'>+	tx_ring-&gt;base = *base;</div><div class='add'>+	tx_ring-&gt;nr = 0;</div><div class='add'>+	tx_ring-&gt;fifo_nr = *fifo_nr;</div><div class='add'>+</div><div class='add'>+	*base = mcp251xfd_get_tx_obj_addr(tx_ring, tx_ring-&gt;obj_num);</div><div class='add'>+	*fifo_nr += 1;</div><div class='add'>+</div><div class='add'>+	/* FIFO request to send */</div><div class='add'>+	addr = MCP251XFD_REG_FIFOCON(tx_ring-&gt;fifo_nr);</div><div class='add'>+	val = MCP251XFD_REG_FIFOCON_TXREQ | MCP251XFD_REG_FIFOCON_UINC;</div><div class='add'>+	len = mcp251xfd_cmd_prepare_write_reg(priv, &amp;tx_ring-&gt;rts_buf,</div><div class='add'>+					      addr, val, val);</div><div class='add'>+</div><div class='add'>+	mcp251xfd_for_each_tx_obj(tx_ring, tx_obj, i)</div><div class='add'>+		mcp251xfd_tx_ring_init_tx_obj(priv, tx_ring, tx_obj, len, i);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mcp251xfd_ring_init_rx(struct mcp251xfd_priv *priv, u16 *base, u8 *fifo_nr)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_rx_ring *rx_ring;</div><div class='add'>+	struct spi_transfer *xfer;</div><div class='add'>+	u32 val;</div><div class='add'>+	u16 addr;</div><div class='add'>+	u8 len;</div><div class='add'>+	int i, j;</div><div class='add'>+</div><div class='add'>+	mcp251xfd_for_each_rx_ring(priv, rx_ring, i) {</div><div class='add'>+		rx_ring-&gt;last_valid = timecounter_read(&amp;priv-&gt;tc);</div><div class='add'>+		rx_ring-&gt;head = 0;</div><div class='add'>+		rx_ring-&gt;tail = 0;</div><div class='add'>+		rx_ring-&gt;base = *base;</div><div class='add'>+		rx_ring-&gt;nr = i;</div><div class='add'>+		rx_ring-&gt;fifo_nr = *fifo_nr;</div><div class='add'>+</div><div class='add'>+		*base = mcp251xfd_get_rx_obj_addr(rx_ring, rx_ring-&gt;obj_num);</div><div class='add'>+		*fifo_nr += 1;</div><div class='add'>+</div><div class='add'>+		/* FIFO IRQ enable */</div><div class='add'>+		addr = MCP251XFD_REG_FIFOCON(rx_ring-&gt;fifo_nr);</div><div class='add'>+		val = MCP251XFD_REG_FIFOCON_RXOVIE |</div><div class='add'>+			MCP251XFD_REG_FIFOCON_TFNRFNIE;</div><div class='add'>+		len = mcp251xfd_cmd_prepare_write_reg(priv, &amp;rx_ring-&gt;irq_enable_buf,</div><div class='add'>+						      addr, val, val);</div><div class='add'>+		rx_ring-&gt;irq_enable_xfer.tx_buf = &amp;rx_ring-&gt;irq_enable_buf;</div><div class='add'>+		rx_ring-&gt;irq_enable_xfer.len = len;</div><div class='add'>+		spi_message_init_with_transfers(&amp;rx_ring-&gt;irq_enable_msg,</div><div class='add'>+						&amp;rx_ring-&gt;irq_enable_xfer, 1);</div><div class='add'>+</div><div class='add'>+		/* FIFO increment RX tail pointer */</div><div class='add'>+		val = MCP251XFD_REG_FIFOCON_UINC;</div><div class='add'>+		len = mcp251xfd_cmd_prepare_write_reg(priv, &amp;rx_ring-&gt;uinc_buf,</div><div class='add'>+						      addr, val, val);</div><div class='add'>+</div><div class='add'>+		for (j = 0; j &lt; ARRAY_SIZE(rx_ring-&gt;uinc_xfer); j++) {</div><div class='add'>+			xfer = &amp;rx_ring-&gt;uinc_xfer[j];</div><div class='add'>+			xfer-&gt;tx_buf = &amp;rx_ring-&gt;uinc_buf;</div><div class='add'>+			xfer-&gt;len = len;</div><div class='add'>+			xfer-&gt;cs_change = 1;</div><div class='add'>+			xfer-&gt;cs_change_delay.value = 0;</div><div class='add'>+			xfer-&gt;cs_change_delay.unit = SPI_DELAY_UNIT_NSECS;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* "cs_change == 1" on the last transfer results in an</div><div class='add'>+		 * active chip select after the complete SPI</div><div class='add'>+		 * message. This causes the controller to interpret</div><div class='add'>+		 * the next register access as data. Set "cs_change"</div><div class='add'>+		 * of the last transfer to "0" to properly deactivate</div><div class='add'>+		 * the chip select at the end of the message.</div><div class='add'>+		 */</div><div class='add'>+		xfer-&gt;cs_change = 0;</div><div class='add'>+</div><div class='add'>+		/* Use 1st RX-FIFO for IRQ coalescing. If enabled</div><div class='add'>+		 * (rx_coalesce_usecs_irq or rx_max_coalesce_frames_irq</div><div class='add'>+		 * is activated), use the last transfer to disable:</div><div class='add'>+		 *</div><div class='add'>+		 * - TFNRFNIE (Receive FIFO Not Empty Interrupt)</div><div class='add'>+		 *</div><div class='add'>+		 * and enable:</div><div class='add'>+		 *</div><div class='add'>+		 * - TFHRFHIE (Receive FIFO Half Full Interrupt)</div><div class='add'>+		 *   - or -</div><div class='add'>+		 * - TFERFFIE (Receive FIFO Full Interrupt)</div><div class='add'>+		 *</div><div class='add'>+		 * depending on rx_max_coalesce_frames_irq.</div><div class='add'>+		 *</div><div class='add'>+		 * The RXOVIE (Overflow Interrupt) is always enabled.</div><div class='add'>+		 */</div><div class='add'>+		if (rx_ring-&gt;nr == 0 &amp;&amp; (priv-&gt;rx_coalesce_usecs_irq ||</div><div class='add'>+					 priv-&gt;rx_obj_num_coalesce_irq)) {</div><div class='add'>+			val = MCP251XFD_REG_FIFOCON_UINC |</div><div class='add'>+				MCP251XFD_REG_FIFOCON_RXOVIE;</div><div class='add'>+</div><div class='add'>+			if (priv-&gt;rx_obj_num_coalesce_irq == rx_ring-&gt;obj_num)</div><div class='add'>+				val |= MCP251XFD_REG_FIFOCON_TFERFFIE;</div><div class='add'>+			else if (priv-&gt;rx_obj_num_coalesce_irq)</div><div class='add'>+				val |= MCP251XFD_REG_FIFOCON_TFHRFHIE;</div><div class='add'>+</div><div class='add'>+			len = mcp251xfd_cmd_prepare_write_reg(priv,</div><div class='add'>+							      &amp;rx_ring-&gt;uinc_irq_disable_buf,</div><div class='add'>+							      addr, val, val);</div><div class='add'>+			xfer-&gt;tx_buf = &amp;rx_ring-&gt;uinc_irq_disable_buf;</div><div class='add'>+			xfer-&gt;len = len;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mcp251xfd_ring_init(struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	const struct mcp251xfd_rx_ring *rx_ring;</div><div class='add'>+	u16 base = 0, ram_used;</div><div class='add'>+	u8 fifo_nr = 1;</div><div class='add'>+	int err = 0, i;</div><div class='add'>+</div><div class='add'>+	netdev_reset_queue(priv-&gt;ndev);</div><div class='add'>+</div><div class='add'>+	mcp251xfd_ring_init_tef(priv, &amp;base);</div><div class='add'>+	mcp251xfd_ring_init_rx(priv, &amp;base, &amp;fifo_nr);</div><div class='add'>+	mcp251xfd_ring_init_tx(priv, &amp;base, &amp;fifo_nr);</div><div class='add'>+</div><div class='add'>+	/* mcp251xfd_handle_rxif() will iterate over all RX rings.</div><div class='add'>+	 * Rings with their corresponding bit set in</div><div class='add'>+	 * priv-&gt;regs_status.rxif are read out.</div><div class='add'>+	 *</div><div class='add'>+	 * If the chip is configured for only 1 RX-FIFO, and if there</div><div class='add'>+	 * is an RX interrupt pending (RXIF in INT register is set),</div><div class='add'>+	 * it must be the 1st RX-FIFO.</div><div class='add'>+	 *</div><div class='add'>+	 * We mark the RXIF of the 1st FIFO as pending here, so that</div><div class='add'>+	 * we can skip the read of the RXIF register in</div><div class='add'>+	 * mcp251xfd_read_regs_status() for the 1 RX-FIFO only case.</div><div class='add'>+	 *</div><div class='add'>+	 * If we use more than 1 RX-FIFO, this value gets overwritten</div><div class='add'>+	 * in mcp251xfd_read_regs_status(), so set it unconditionally</div><div class='add'>+	 * here.</div><div class='add'>+	 */</div><div class='add'>+	priv-&gt;regs_status.rxif = BIT(priv-&gt;rx[0]-&gt;fifo_nr);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;tx_obj_num_coalesce_irq) {</div><div class='add'>+		netdev_dbg(priv-&gt;ndev,</div><div class='add'>+			   "FIFO setup: TEF:         0x%03x: %2d*%zu bytes = %4zu bytes (coalesce)\n",</div><div class='add'>+			   mcp251xfd_get_tef_obj_addr(0),</div><div class='add'>+			   priv-&gt;tx_obj_num_coalesce_irq,</div><div class='add'>+			   sizeof(struct mcp251xfd_hw_tef_obj),</div><div class='add'>+			   priv-&gt;tx_obj_num_coalesce_irq *</div><div class='add'>+			   sizeof(struct mcp251xfd_hw_tef_obj));</div><div class='add'>+</div><div class='add'>+		netdev_dbg(priv-&gt;ndev,</div><div class='add'>+			   "                         0x%03x: %2d*%zu bytes = %4zu bytes\n",</div><div class='add'>+			   mcp251xfd_get_tef_obj_addr(priv-&gt;tx_obj_num_coalesce_irq),</div><div class='add'>+			   priv-&gt;tx-&gt;obj_num - priv-&gt;tx_obj_num_coalesce_irq,</div><div class='add'>+			   sizeof(struct mcp251xfd_hw_tef_obj),</div><div class='add'>+			   (priv-&gt;tx-&gt;obj_num - priv-&gt;tx_obj_num_coalesce_irq) *</div><div class='add'>+			   sizeof(struct mcp251xfd_hw_tef_obj));</div><div class='add'>+	} else {</div><div class='add'>+		netdev_dbg(priv-&gt;ndev,</div><div class='add'>+			   "FIFO setup: TEF:         0x%03x: %2d*%zu bytes = %4zu bytes\n",</div><div class='add'>+			   mcp251xfd_get_tef_obj_addr(0),</div><div class='add'>+			   priv-&gt;tx-&gt;obj_num, sizeof(struct mcp251xfd_hw_tef_obj),</div><div class='add'>+			   priv-&gt;tx-&gt;obj_num * sizeof(struct mcp251xfd_hw_tef_obj));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mcp251xfd_for_each_rx_ring(priv, rx_ring, i) {</div><div class='add'>+		if (rx_ring-&gt;nr == 0 &amp;&amp; priv-&gt;rx_obj_num_coalesce_irq) {</div><div class='add'>+			netdev_dbg(priv-&gt;ndev,</div><div class='add'>+				   "FIFO setup: RX-%u: FIFO %u/0x%03x: %2u*%u bytes = %4u bytes (coalesce)\n",</div><div class='add'>+				   rx_ring-&gt;nr, rx_ring-&gt;fifo_nr,</div><div class='add'>+				   mcp251xfd_get_rx_obj_addr(rx_ring, 0),</div><div class='add'>+				   priv-&gt;rx_obj_num_coalesce_irq, rx_ring-&gt;obj_size,</div><div class='add'>+				   priv-&gt;rx_obj_num_coalesce_irq * rx_ring-&gt;obj_size);</div><div class='add'>+</div><div class='add'>+			if (priv-&gt;rx_obj_num_coalesce_irq == MCP251XFD_FIFO_DEPTH)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			netdev_dbg(priv-&gt;ndev,</div><div class='add'>+				   "                         0x%03x: %2u*%u bytes = %4u bytes\n",</div><div class='add'>+				   mcp251xfd_get_rx_obj_addr(rx_ring,</div><div class='add'>+							     priv-&gt;rx_obj_num_coalesce_irq),</div><div class='add'>+				   rx_ring-&gt;obj_num - priv-&gt;rx_obj_num_coalesce_irq,</div><div class='add'>+				   rx_ring-&gt;obj_size,</div><div class='add'>+				   (rx_ring-&gt;obj_num - priv-&gt;rx_obj_num_coalesce_irq) *</div><div class='add'>+				   rx_ring-&gt;obj_size);</div><div class='add'>+		} else {</div><div class='add'>+			netdev_dbg(priv-&gt;ndev,</div><div class='add'>+				   "FIFO setup: RX-%u: FIFO %u/0x%03x: %2u*%u bytes = %4u bytes\n",</div><div class='add'>+				   rx_ring-&gt;nr, rx_ring-&gt;fifo_nr,</div><div class='add'>+				   mcp251xfd_get_rx_obj_addr(rx_ring, 0),</div><div class='add'>+				   rx_ring-&gt;obj_num, rx_ring-&gt;obj_size,</div><div class='add'>+				   rx_ring-&gt;obj_num * rx_ring-&gt;obj_size);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev_dbg(priv-&gt;ndev,</div><div class='add'>+		   "FIFO setup: TX:   FIFO %u/0x%03x: %2u*%u bytes = %4u bytes\n",</div><div class='add'>+		   priv-&gt;tx-&gt;fifo_nr,</div><div class='add'>+		   mcp251xfd_get_tx_obj_addr(priv-&gt;tx, 0),</div><div class='add'>+		   priv-&gt;tx-&gt;obj_num, priv-&gt;tx-&gt;obj_size,</div><div class='add'>+		   priv-&gt;tx-&gt;obj_num * priv-&gt;tx-&gt;obj_size);</div><div class='add'>+</div><div class='add'>+	netdev_dbg(priv-&gt;ndev,</div><div class='add'>+		   "FIFO setup: free:                             %4d bytes\n",</div><div class='add'>+		   MCP251XFD_RAM_SIZE - (base - MCP251XFD_RAM_START));</div><div class='add'>+</div><div class='add'>+	ram_used = base - MCP251XFD_RAM_START;</div><div class='add'>+	if (ram_used &gt; MCP251XFD_RAM_SIZE) {</div><div class='add'>+		netdev_err(priv-&gt;ndev,</div><div class='add'>+			   "Error during ring configuration, using more RAM (%u bytes) than available (%u bytes).\n",</div><div class='add'>+			   ram_used, MCP251XFD_RAM_SIZE);</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;tx_obj_num_coalesce_irq &amp;&amp;</div><div class='add'>+	    priv-&gt;tx_obj_num_coalesce_irq * 2 != priv-&gt;tx-&gt;obj_num) {</div><div class='add'>+		netdev_err(priv-&gt;ndev,</div><div class='add'>+			   "Error during ring configuration, number of TEF coalescing buffers (%u) must be half of TEF buffers (%u).\n",</div><div class='add'>+			   priv-&gt;tx_obj_num_coalesce_irq, priv-&gt;tx-&gt;obj_num);</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mcp251xfd_ring_free(struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = ARRAY_SIZE(priv-&gt;rx) - 1; i &gt;= 0; i--) {</div><div class='add'>+		kfree(priv-&gt;rx[i]);</div><div class='add'>+		priv-&gt;rx[i] = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum hrtimer_restart mcp251xfd_rx_irq_timer(struct hrtimer *t)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_priv *priv = container_of(t, struct mcp251xfd_priv,</div><div class='add'>+						   rx_irq_timer);</div><div class='add'>+	struct mcp251xfd_rx_ring *ring = priv-&gt;rx[0];</div><div class='add'>+</div><div class='add'>+	if (test_bit(MCP251XFD_FLAGS_DOWN, priv-&gt;flags))</div><div class='add'>+		return HRTIMER_NORESTART;</div><div class='add'>+</div><div class='add'>+	spi_async(priv-&gt;spi, &amp;ring-&gt;irq_enable_msg);</div><div class='add'>+</div><div class='add'>+	return HRTIMER_NORESTART;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum hrtimer_restart mcp251xfd_tx_irq_timer(struct hrtimer *t)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_priv *priv = container_of(t, struct mcp251xfd_priv,</div><div class='add'>+						   tx_irq_timer);</div><div class='add'>+	struct mcp251xfd_tef_ring *ring = priv-&gt;tef;</div><div class='add'>+</div><div class='add'>+	if (test_bit(MCP251XFD_FLAGS_DOWN, priv-&gt;flags))</div><div class='add'>+		return HRTIMER_NORESTART;</div><div class='add'>+</div><div class='add'>+	spi_async(priv-&gt;spi, &amp;ring-&gt;irq_enable_msg);</div><div class='add'>+</div><div class='add'>+	return HRTIMER_NORESTART;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct can_ram_config mcp251xfd_ram_config = {</div><div class='add'>+	.rx = {</div><div class='add'>+		.size[CAN_RAM_MODE_CAN] = sizeof(struct mcp251xfd_hw_rx_obj_can),</div><div class='add'>+		.size[CAN_RAM_MODE_CANFD] = sizeof(struct mcp251xfd_hw_rx_obj_canfd),</div><div class='add'>+		.min = MCP251XFD_RX_OBJ_NUM_MIN,</div><div class='add'>+		.max = MCP251XFD_RX_OBJ_NUM_MAX,</div><div class='add'>+		.def[CAN_RAM_MODE_CAN] = CAN_RAM_NUM_MAX,</div><div class='add'>+		.def[CAN_RAM_MODE_CANFD] = CAN_RAM_NUM_MAX,</div><div class='add'>+		.fifo_num = MCP251XFD_FIFO_RX_NUM,</div><div class='add'>+		.fifo_depth_min = MCP251XFD_RX_FIFO_DEPTH_MIN,</div><div class='add'>+		.fifo_depth_coalesce_min = MCP251XFD_RX_FIFO_DEPTH_COALESCE_MIN,</div><div class='add'>+	},</div><div class='add'>+	.tx = {</div><div class='add'>+		.size[CAN_RAM_MODE_CAN] = sizeof(struct mcp251xfd_hw_tef_obj) +</div><div class='add'>+			sizeof(struct mcp251xfd_hw_tx_obj_can),</div><div class='add'>+		.size[CAN_RAM_MODE_CANFD] = sizeof(struct mcp251xfd_hw_tef_obj) +</div><div class='add'>+			sizeof(struct mcp251xfd_hw_tx_obj_canfd),</div><div class='add'>+		.min = MCP251XFD_TX_OBJ_NUM_MIN,</div><div class='add'>+		.max = MCP251XFD_TX_OBJ_NUM_MAX,</div><div class='add'>+		.def[CAN_RAM_MODE_CAN] = MCP251XFD_TX_OBJ_NUM_CAN_DEFAULT,</div><div class='add'>+		.def[CAN_RAM_MODE_CANFD] = MCP251XFD_TX_OBJ_NUM_CANFD_DEFAULT,</div><div class='add'>+		.fifo_num = MCP251XFD_FIFO_TX_NUM,</div><div class='add'>+		.fifo_depth_min = MCP251XFD_TX_FIFO_DEPTH_MIN,</div><div class='add'>+		.fifo_depth_coalesce_min = MCP251XFD_TX_FIFO_DEPTH_COALESCE_MIN,</div><div class='add'>+	},</div><div class='add'>+	.size = MCP251XFD_RAM_SIZE,</div><div class='add'>+	.fifo_depth = MCP251XFD_FIFO_DEPTH,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int mcp251xfd_ring_alloc(struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	const bool fd_mode = mcp251xfd_is_fd_mode(priv);</div><div class='add'>+	struct mcp251xfd_tx_ring *tx_ring = priv-&gt;tx;</div><div class='add'>+	struct mcp251xfd_rx_ring *rx_ring;</div><div class='add'>+	u8 tx_obj_size, rx_obj_size;</div><div class='add'>+	u8 rem, i;</div><div class='add'>+</div><div class='add'>+	/* switching from CAN-2.0 to CAN-FD mode or vice versa */</div><div class='add'>+	if (fd_mode != test_bit(MCP251XFD_FLAGS_FD_MODE, priv-&gt;flags)) {</div><div class='add'>+		const struct ethtool_ringparam ring = {</div><div class='add'>+			.rx_pending = priv-&gt;rx_obj_num,</div><div class='add'>+			.tx_pending = priv-&gt;tx-&gt;obj_num,</div><div class='add'>+		};</div><div class='add'>+		const struct ethtool_coalesce ec = {</div><div class='add'>+			.rx_coalesce_usecs_irq = priv-&gt;rx_coalesce_usecs_irq,</div><div class='add'>+			.rx_max_coalesced_frames_irq = priv-&gt;rx_obj_num_coalesce_irq == 0 ?</div><div class='add'>+				1 : priv-&gt;rx_obj_num_coalesce_irq,</div><div class='add'>+			.tx_coalesce_usecs_irq = priv-&gt;tx_coalesce_usecs_irq,</div><div class='add'>+			.tx_max_coalesced_frames_irq = priv-&gt;tx_obj_num_coalesce_irq == 0 ?</div><div class='add'>+				1 : priv-&gt;tx_obj_num_coalesce_irq,</div><div class='add'>+		};</div><div class='add'>+		struct can_ram_layout layout;</div><div class='add'>+</div><div class='add'>+		can_ram_get_layout(&amp;layout, &amp;mcp251xfd_ram_config, &amp;ring, &amp;ec, fd_mode);</div><div class='add'>+</div><div class='add'>+		priv-&gt;rx_obj_num = layout.cur_rx;</div><div class='add'>+		priv-&gt;rx_obj_num_coalesce_irq = layout.rx_coalesce;</div><div class='add'>+</div><div class='add'>+		tx_ring-&gt;obj_num = layout.cur_tx;</div><div class='add'>+		priv-&gt;tx_obj_num_coalesce_irq = layout.tx_coalesce;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (fd_mode) {</div><div class='add'>+		tx_obj_size = sizeof(struct mcp251xfd_hw_tx_obj_canfd);</div><div class='add'>+		rx_obj_size = sizeof(struct mcp251xfd_hw_rx_obj_canfd);</div><div class='add'>+		set_bit(MCP251XFD_FLAGS_FD_MODE, priv-&gt;flags);</div><div class='add'>+	} else {</div><div class='add'>+		tx_obj_size = sizeof(struct mcp251xfd_hw_tx_obj_can);</div><div class='add'>+		rx_obj_size = sizeof(struct mcp251xfd_hw_rx_obj_can);</div><div class='add'>+		clear_bit(MCP251XFD_FLAGS_FD_MODE, priv-&gt;flags);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tx_ring-&gt;obj_num_shift_to_u8 = BITS_PER_TYPE(tx_ring-&gt;obj_num) -</div><div class='add'>+		ilog2(tx_ring-&gt;obj_num);</div><div class='add'>+	tx_ring-&gt;obj_size = tx_obj_size;</div><div class='add'>+</div><div class='add'>+	rem = priv-&gt;rx_obj_num;</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(priv-&gt;rx) &amp;&amp; rem; i++) {</div><div class='add'>+		u8 rx_obj_num;</div><div class='add'>+</div><div class='add'>+		if (i == 0 &amp;&amp; priv-&gt;rx_obj_num_coalesce_irq)</div><div class='add'>+			rx_obj_num = min_t(u8, priv-&gt;rx_obj_num_coalesce_irq * 2,</div><div class='add'>+					   MCP251XFD_FIFO_DEPTH);</div><div class='add'>+		else</div><div class='add'>+			rx_obj_num = min_t(u8, rounddown_pow_of_two(rem),</div><div class='add'>+					   MCP251XFD_FIFO_DEPTH);</div><div class='add'>+		rem -= rx_obj_num;</div><div class='add'>+</div><div class='add'>+		rx_ring = kzalloc(sizeof(*rx_ring) + rx_obj_size * rx_obj_num,</div><div class='add'>+				  GFP_KERNEL);</div><div class='add'>+		if (!rx_ring) {</div><div class='add'>+			mcp251xfd_ring_free(priv);</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		rx_ring-&gt;obj_num = rx_obj_num;</div><div class='add'>+		rx_ring-&gt;obj_num_shift_to_u8 = BITS_PER_TYPE(rx_ring-&gt;obj_num_shift_to_u8) -</div><div class='add'>+			ilog2(rx_obj_num);</div><div class='add'>+		rx_ring-&gt;obj_size = rx_obj_size;</div><div class='add'>+		priv-&gt;rx[i] = rx_ring;</div><div class='add'>+	}</div><div class='add'>+	priv-&gt;rx_ring_num = i;</div><div class='add'>+</div><div class='add'>+	hrtimer_setup(&amp;priv-&gt;rx_irq_timer, mcp251xfd_rx_irq_timer, CLOCK_MONOTONIC,</div><div class='add'>+		      HRTIMER_MODE_REL);</div><div class='add'>+</div><div class='add'>+	hrtimer_setup(&amp;priv-&gt;tx_irq_timer, mcp251xfd_tx_irq_timer, CLOCK_MONOTONIC,</div><div class='add'>+		      HRTIMER_MODE_REL);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/can/spi/mcp251xfd/mcp251xfd-rx.c b/drivers/net/can/spi/mcp251xfd/mcp251xfd-rx.c<br/>new file mode 100644<br/>index 000000000000..fe897f3e4c12<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/mcp251xfd/mcp251xfd-rx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/spi/mcp251xfd/mcp251xfd-rx.c</a></div><div class='hunk'>@@ -0,0 +1,333 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+//</div><div class='add'>+// mcp251xfd - Microchip MCP251xFD Family CAN controller driver</div><div class='add'>+//</div><div class='add'>+// Copyright (c) 2019, 2020, 2021, 2023 Pengutronix,</div><div class='add'>+//               Marc Kleine-Budde &lt;kernel@pengutronix.de&gt;</div><div class='add'>+//</div><div class='add'>+// Based on:</div><div class='add'>+//</div><div class='add'>+// CAN bus driver for Microchip 25XXFD CAN Controller with SPI Interface</div><div class='add'>+//</div><div class='add'>+// Copyright (c) 2019 Martin Sperl &lt;kernel@martin.sperl.org&gt;</div><div class='add'>+//</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+</div><div class='add'>+#include "mcp251xfd.h"</div><div class='add'>+</div><div class='add'>+static inline bool mcp251xfd_rx_fifo_sta_empty(const u32 fifo_sta)</div><div class='add'>+{</div><div class='add'>+	return !(fifo_sta &amp; MCP251XFD_REG_FIFOSTA_TFNRFNIF);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool mcp251xfd_rx_fifo_sta_full(const u32 fifo_sta)</div><div class='add'>+{</div><div class='add'>+	return fifo_sta &amp; MCP251XFD_REG_FIFOSTA_TFERFFIF;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int</div><div class='add'>+mcp251xfd_rx_tail_get_from_chip(const struct mcp251xfd_priv *priv,</div><div class='add'>+				const struct mcp251xfd_rx_ring *ring,</div><div class='add'>+				u8 *rx_tail)</div><div class='add'>+{</div><div class='add'>+	u32 fifo_ua;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = regmap_read(priv-&gt;map_reg, MCP251XFD_REG_FIFOUA(ring-&gt;fifo_nr),</div><div class='add'>+			  &amp;fifo_ua);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	fifo_ua -= ring-&gt;base - MCP251XFD_RAM_START;</div><div class='add'>+	*rx_tail = fifo_ua / ring-&gt;obj_size;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mcp251xfd_check_rx_tail(const struct mcp251xfd_priv *priv,</div><div class='add'>+			const struct mcp251xfd_rx_ring *ring)</div><div class='add'>+{</div><div class='add'>+	u8 rx_tail_chip, rx_tail;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!IS_ENABLED(CONFIG_CAN_MCP251XFD_SANITY))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_rx_tail_get_from_chip(priv, ring, &amp;rx_tail_chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	rx_tail = mcp251xfd_get_rx_tail(ring);</div><div class='add'>+	if (rx_tail_chip != rx_tail) {</div><div class='add'>+		netdev_err(priv-&gt;ndev,</div><div class='add'>+			   "RX tail of chip (%d) and ours (%d) inconsistent.\n",</div><div class='add'>+			   rx_tail_chip, rx_tail);</div><div class='add'>+		return -EILSEQ;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mcp251xfd_get_rx_len(const struct mcp251xfd_priv *priv,</div><div class='add'>+		     const struct mcp251xfd_rx_ring *ring,</div><div class='add'>+		     u8 *len_p)</div><div class='add'>+{</div><div class='add'>+	const u8 shift = ring-&gt;obj_num_shift_to_u8;</div><div class='add'>+	u8 chip_head, tail, len;</div><div class='add'>+	u32 fifo_sta;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = regmap_read(priv-&gt;map_reg, MCP251XFD_REG_FIFOSTA(ring-&gt;fifo_nr),</div><div class='add'>+			  &amp;fifo_sta);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (mcp251xfd_rx_fifo_sta_empty(fifo_sta)) {</div><div class='add'>+		*len_p = 0;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (mcp251xfd_rx_fifo_sta_full(fifo_sta)) {</div><div class='add'>+		*len_p = ring-&gt;obj_num;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	chip_head = FIELD_GET(MCP251XFD_REG_FIFOSTA_FIFOCI_MASK, fifo_sta);</div><div class='add'>+</div><div class='add'>+	err =  mcp251xfd_check_rx_tail(priv, ring);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+	tail = mcp251xfd_get_rx_tail(ring);</div><div class='add'>+</div><div class='add'>+	/* First shift to full u8. The subtraction works on signed</div><div class='add'>+	 * values, that keeps the difference steady around the u8</div><div class='add'>+	 * overflow. The right shift acts on len, which is an u8.</div><div class='add'>+	 */</div><div class='add'>+	BUILD_BUG_ON(sizeof(ring-&gt;obj_num) != sizeof(chip_head));</div><div class='add'>+	BUILD_BUG_ON(sizeof(ring-&gt;obj_num) != sizeof(tail));</div><div class='add'>+	BUILD_BUG_ON(sizeof(ring-&gt;obj_num) != sizeof(len));</div><div class='add'>+</div><div class='add'>+	len = (chip_head &lt;&lt; shift) - (tail &lt;&lt; shift);</div><div class='add'>+	*len_p = len &gt;&gt; shift;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mcp251xfd_hw_rx_obj_to_skb(const struct mcp251xfd_priv *priv,</div><div class='add'>+			   const struct mcp251xfd_hw_rx_obj_canfd *hw_rx_obj,</div><div class='add'>+			   struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct canfd_frame *cfd = (struct canfd_frame *)skb-&gt;data;</div><div class='add'>+	u8 dlc;</div><div class='add'>+</div><div class='add'>+	if (hw_rx_obj-&gt;flags &amp; MCP251XFD_OBJ_FLAGS_IDE) {</div><div class='add'>+		u32 sid, eid;</div><div class='add'>+</div><div class='add'>+		eid = FIELD_GET(MCP251XFD_OBJ_ID_EID_MASK, hw_rx_obj-&gt;id);</div><div class='add'>+		sid = FIELD_GET(MCP251XFD_OBJ_ID_SID_MASK, hw_rx_obj-&gt;id);</div><div class='add'>+</div><div class='add'>+		cfd-&gt;can_id = CAN_EFF_FLAG |</div><div class='add'>+			FIELD_PREP(MCP251XFD_REG_FRAME_EFF_EID_MASK, eid) |</div><div class='add'>+			FIELD_PREP(MCP251XFD_REG_FRAME_EFF_SID_MASK, sid);</div><div class='add'>+	} else {</div><div class='add'>+		cfd-&gt;can_id = FIELD_GET(MCP251XFD_OBJ_ID_SID_MASK,</div><div class='add'>+					hw_rx_obj-&gt;id);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dlc = FIELD_GET(MCP251XFD_OBJ_FLAGS_DLC_MASK, hw_rx_obj-&gt;flags);</div><div class='add'>+</div><div class='add'>+	/* CANFD */</div><div class='add'>+	if (hw_rx_obj-&gt;flags &amp; MCP251XFD_OBJ_FLAGS_FDF) {</div><div class='add'>+		if (hw_rx_obj-&gt;flags &amp; MCP251XFD_OBJ_FLAGS_ESI)</div><div class='add'>+			cfd-&gt;flags |= CANFD_ESI;</div><div class='add'>+</div><div class='add'>+		if (hw_rx_obj-&gt;flags &amp; MCP251XFD_OBJ_FLAGS_BRS)</div><div class='add'>+			cfd-&gt;flags |= CANFD_BRS;</div><div class='add'>+</div><div class='add'>+		cfd-&gt;len = can_fd_dlc2len(dlc);</div><div class='add'>+	} else {</div><div class='add'>+		if (hw_rx_obj-&gt;flags &amp; MCP251XFD_OBJ_FLAGS_RTR)</div><div class='add'>+			cfd-&gt;can_id |= CAN_RTR_FLAG;</div><div class='add'>+</div><div class='add'>+		can_frame_set_cc_len((struct can_frame *)cfd, dlc,</div><div class='add'>+				     priv-&gt;can.ctrlmode);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!(hw_rx_obj-&gt;flags &amp; MCP251XFD_OBJ_FLAGS_RTR))</div><div class='add'>+		memcpy(cfd-&gt;data, hw_rx_obj-&gt;data, cfd-&gt;len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mcp251xfd_handle_rxif_one(struct mcp251xfd_priv *priv,</div><div class='add'>+			  struct mcp251xfd_rx_ring *ring,</div><div class='add'>+			  const struct mcp251xfd_hw_rx_obj_canfd *hw_rx_obj)</div><div class='add'>+{</div><div class='add'>+	struct net_device_stats *stats = &amp;priv-&gt;ndev-&gt;stats;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct canfd_frame *cfd;</div><div class='add'>+	u64 timestamp;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* According to mcp2518fd erratum DS80000789E 6. the FIFOCI</div><div class='add'>+	 * bits of a FIFOSTA register, here the RX FIFO head index</div><div class='add'>+	 * might be corrupted and we might process past the RX FIFO's</div><div class='add'>+	 * head into old CAN frames.</div><div class='add'>+	 *</div><div class='add'>+	 * Compare the timestamp of currently processed CAN frame with</div><div class='add'>+	 * last valid frame received. Abort with -EBADMSG if an old</div><div class='add'>+	 * CAN frame is detected.</div><div class='add'>+	 */</div><div class='add'>+	timestamp = timecounter_cyc2time(&amp;priv-&gt;tc, hw_rx_obj-&gt;ts);</div><div class='add'>+	if (timestamp &lt;= ring-&gt;last_valid) {</div><div class='add'>+		stats-&gt;rx_fifo_errors++;</div><div class='add'>+</div><div class='add'>+		return -EBADMSG;</div><div class='add'>+	}</div><div class='add'>+	ring-&gt;last_valid = timestamp;</div><div class='add'>+</div><div class='add'>+	if (hw_rx_obj-&gt;flags &amp; MCP251XFD_OBJ_FLAGS_FDF)</div><div class='add'>+		skb = alloc_canfd_skb(priv-&gt;ndev, &amp;cfd);</div><div class='add'>+	else</div><div class='add'>+		skb = alloc_can_skb(priv-&gt;ndev, (struct can_frame **)&amp;cfd);</div><div class='add'>+</div><div class='add'>+	if (!skb) {</div><div class='add'>+		stats-&gt;rx_dropped++;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mcp251xfd_skb_set_timestamp(skb, timestamp);</div><div class='add'>+	mcp251xfd_hw_rx_obj_to_skb(priv, hw_rx_obj, skb);</div><div class='add'>+	err = can_rx_offload_queue_timestamp(&amp;priv-&gt;offload, skb, hw_rx_obj-&gt;ts);</div><div class='add'>+	if (err)</div><div class='add'>+		stats-&gt;rx_fifo_errors++;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int</div><div class='add'>+mcp251xfd_rx_obj_read(const struct mcp251xfd_priv *priv,</div><div class='add'>+		      const struct mcp251xfd_rx_ring *ring,</div><div class='add'>+		      struct mcp251xfd_hw_rx_obj_canfd *hw_rx_obj,</div><div class='add'>+		      const u8 offset, const u8 len)</div><div class='add'>+{</div><div class='add'>+	const int val_bytes = regmap_get_val_bytes(priv-&gt;map_rx);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = regmap_bulk_read(priv-&gt;map_rx,</div><div class='add'>+			       mcp251xfd_get_rx_obj_addr(ring, offset),</div><div class='add'>+			       hw_rx_obj,</div><div class='add'>+			       len * ring-&gt;obj_size / val_bytes);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mcp251xfd_handle_rxif_ring_uinc(const struct mcp251xfd_priv *priv,</div><div class='add'>+				struct mcp251xfd_rx_ring *ring,</div><div class='add'>+				u8 len)</div><div class='add'>+{</div><div class='add'>+	int offset;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!len)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ring-&gt;head += len;</div><div class='add'>+</div><div class='add'>+	/* Increment the RX FIFO tail pointer 'len' times in a</div><div class='add'>+	 * single SPI message.</div><div class='add'>+	 *</div><div class='add'>+	 * Note:</div><div class='add'>+	 * Calculate offset, so that the SPI transfer ends on</div><div class='add'>+	 * the last message of the uinc_xfer array, which has</div><div class='add'>+	 * "cs_change == 0", to properly deactivate the chip</div><div class='add'>+	 * select.</div><div class='add'>+	 */</div><div class='add'>+	offset = ARRAY_SIZE(ring-&gt;uinc_xfer) - len;</div><div class='add'>+	err = spi_sync_transfer(priv-&gt;spi,</div><div class='add'>+				ring-&gt;uinc_xfer + offset, len);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	ring-&gt;tail += len;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mcp251xfd_handle_rxif_ring(struct mcp251xfd_priv *priv,</div><div class='add'>+			   struct mcp251xfd_rx_ring *ring)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_hw_rx_obj_canfd *hw_rx_obj = ring-&gt;obj;</div><div class='add'>+	u8 rx_tail, len, l;</div><div class='add'>+	int err, i;</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_get_rx_len(priv, ring, &amp;len);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	while ((l = mcp251xfd_get_rx_linear_len(ring, len))) {</div><div class='add'>+		rx_tail = mcp251xfd_get_rx_tail(ring);</div><div class='add'>+</div><div class='add'>+		err = mcp251xfd_rx_obj_read(priv, ring, hw_rx_obj,</div><div class='add'>+					    rx_tail, l);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; l; i++) {</div><div class='add'>+			err = mcp251xfd_handle_rxif_one(priv, ring,</div><div class='add'>+							(void *)hw_rx_obj +</div><div class='add'>+							i * ring-&gt;obj_size);</div><div class='add'>+</div><div class='add'>+			/* -EBADMSG means we're affected by mcp2518fd</div><div class='add'>+			 * erratum DS80000789E 6., i.e. the timestamp</div><div class='add'>+			 * in the RX object is older that the last</div><div class='add'>+			 * valid received CAN frame. Don't process any</div><div class='add'>+			 * further and mark processed frames as good.</div><div class='add'>+			 */</div><div class='add'>+			if (err == -EBADMSG)</div><div class='add'>+				return mcp251xfd_handle_rxif_ring_uinc(priv, ring, i);</div><div class='add'>+			else if (err)</div><div class='add'>+				return err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = mcp251xfd_handle_rxif_ring_uinc(priv, ring, l);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		len -= l;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mcp251xfd_handle_rxif(struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_rx_ring *ring;</div><div class='add'>+	int err, n;</div><div class='add'>+</div><div class='add'>+	mcp251xfd_for_each_rx_ring(priv, ring, n) {</div><div class='add'>+		/* - if RX IRQ coalescing is active always handle ring 0</div><div class='add'>+		 * - only handle rings if RX IRQ is active</div><div class='add'>+		 */</div><div class='add'>+		if ((ring-&gt;nr &gt; 0 || !priv-&gt;rx_obj_num_coalesce_irq) &amp;&amp;</div><div class='add'>+		    !(priv-&gt;regs_status.rxif &amp; BIT(ring-&gt;fifo_nr)))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		err = mcp251xfd_handle_rxif_ring(priv, ring);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;rx_coalesce_usecs_irq)</div><div class='add'>+		hrtimer_start(&amp;priv-&gt;rx_irq_timer,</div><div class='add'>+			      ns_to_ktime(priv-&gt;rx_coalesce_usecs_irq *</div><div class='add'>+					  NSEC_PER_USEC),</div><div class='add'>+			      HRTIMER_MODE_REL);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/can/spi/mcp251xfd/mcp251xfd-tef.c b/drivers/net/can/spi/mcp251xfd/mcp251xfd-tef.c<br/>new file mode 100644<br/>index 000000000000..e94321849fd7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/mcp251xfd/mcp251xfd-tef.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/spi/mcp251xfd/mcp251xfd-tef.c</a></div><div class='hunk'>@@ -0,0 +1,302 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+//</div><div class='add'>+// mcp251xfd - Microchip MCP251xFD Family CAN controller driver</div><div class='add'>+//</div><div class='add'>+// Copyright (c) 2019, 2020, 2021, 2023 Pengutronix,</div><div class='add'>+//               Marc Kleine-Budde &lt;kernel@pengutronix.de&gt;</div><div class='add'>+//</div><div class='add'>+// Based on:</div><div class='add'>+//</div><div class='add'>+// CAN bus driver for Microchip 25XXFD CAN Controller with SPI Interface</div><div class='add'>+//</div><div class='add'>+// Copyright (c) 2019 Martin Sperl &lt;kernel@martin.sperl.org&gt;</div><div class='add'>+//</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+</div><div class='add'>+#include "mcp251xfd.h"</div><div class='add'>+</div><div class='add'>+static inline bool mcp251xfd_tx_fifo_sta_empty(u32 fifo_sta)</div><div class='add'>+{</div><div class='add'>+	return fifo_sta &amp; MCP251XFD_REG_FIFOSTA_TFERFFIF;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool mcp251xfd_tx_fifo_sta_less_than_half_full(u32 fifo_sta)</div><div class='add'>+{</div><div class='add'>+	return fifo_sta &amp; MCP251XFD_REG_FIFOSTA_TFHRFHIF;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int</div><div class='add'>+mcp251xfd_tef_tail_get_from_chip(const struct mcp251xfd_priv *priv,</div><div class='add'>+				 u8 *tef_tail)</div><div class='add'>+{</div><div class='add'>+	u32 tef_ua;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = regmap_read(priv-&gt;map_reg, MCP251XFD_REG_TEFUA, &amp;tef_ua);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	*tef_tail = tef_ua / sizeof(struct mcp251xfd_hw_tef_obj);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_check_tef_tail(const struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u8 tef_tail_chip, tef_tail;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!IS_ENABLED(CONFIG_CAN_MCP251XFD_SANITY))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_tef_tail_get_from_chip(priv, &amp;tef_tail_chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	tef_tail = mcp251xfd_get_tef_tail(priv);</div><div class='add'>+	if (tef_tail_chip != tef_tail) {</div><div class='add'>+		netdev_err(priv-&gt;ndev,</div><div class='add'>+			   "TEF tail of chip (0x%02x) and ours (0x%08x) inconsistent.\n",</div><div class='add'>+			   tef_tail_chip, tef_tail);</div><div class='add'>+		return -EILSEQ;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mcp251xfd_handle_tefif_one(struct mcp251xfd_priv *priv,</div><div class='add'>+			   const struct mcp251xfd_hw_tef_obj *hw_tef_obj,</div><div class='add'>+			   unsigned int *frame_len_ptr)</div><div class='add'>+{</div><div class='add'>+	struct net_device_stats *stats = &amp;priv-&gt;ndev-&gt;stats;</div><div class='add'>+	u32 seq, tef_tail_masked, tef_tail;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	 /* Use the MCP2517FD mask on the MCP2518FD, too. We only</div><div class='add'>+	  * compare 7 bits, this is enough to detect old TEF objects.</div><div class='add'>+	  */</div><div class='add'>+	seq = FIELD_GET(MCP251XFD_OBJ_FLAGS_SEQ_MCP2517FD_MASK,</div><div class='add'>+			hw_tef_obj-&gt;flags);</div><div class='add'>+	tef_tail_masked = priv-&gt;tef-&gt;tail &amp;</div><div class='add'>+		field_mask(MCP251XFD_OBJ_FLAGS_SEQ_MCP2517FD_MASK);</div><div class='add'>+</div><div class='add'>+	/* According to mcp2518fd erratum DS80000789E 6. the FIFOCI</div><div class='add'>+	 * bits of a FIFOSTA register, here the TX FIFO tail index</div><div class='add'>+	 * might be corrupted and we might process past the TEF FIFO's</div><div class='add'>+	 * head into old CAN frames.</div><div class='add'>+	 *</div><div class='add'>+	 * Compare the sequence number of the currently processed CAN</div><div class='add'>+	 * frame with the expected sequence number. Abort with</div><div class='add'>+	 * -EBADMSG if an old CAN frame is detected.</div><div class='add'>+	 */</div><div class='add'>+	if (seq != tef_tail_masked) {</div><div class='add'>+		netdev_dbg(priv-&gt;ndev, "%s: chip=0x%02x ring=0x%02x\n", __func__,</div><div class='add'>+			   seq, tef_tail_masked);</div><div class='add'>+		stats-&gt;tx_fifo_errors++;</div><div class='add'>+</div><div class='add'>+		return -EBADMSG;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tef_tail = mcp251xfd_get_tef_tail(priv);</div><div class='add'>+	skb = priv-&gt;can.echo_skb[tef_tail];</div><div class='add'>+	if (skb)</div><div class='add'>+		mcp251xfd_skb_set_timestamp_raw(priv, skb, hw_tef_obj-&gt;ts);</div><div class='add'>+	stats-&gt;tx_bytes +=</div><div class='add'>+		can_rx_offload_get_echo_skb_queue_timestamp(&amp;priv-&gt;offload,</div><div class='add'>+							    tef_tail, hw_tef_obj-&gt;ts,</div><div class='add'>+							    frame_len_ptr);</div><div class='add'>+	stats-&gt;tx_packets++;</div><div class='add'>+	priv-&gt;tef-&gt;tail++;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mcp251xfd_get_tef_len(struct mcp251xfd_priv *priv, u8 *len_p)</div><div class='add'>+{</div><div class='add'>+	const struct mcp251xfd_tx_ring *tx_ring = priv-&gt;tx;</div><div class='add'>+	const u8 shift = tx_ring-&gt;obj_num_shift_to_u8;</div><div class='add'>+	u8 chip_tx_tail, tail, len;</div><div class='add'>+	u32 fifo_sta;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = regmap_read(priv-&gt;map_reg, MCP251XFD_REG_FIFOSTA(priv-&gt;tx-&gt;fifo_nr),</div><div class='add'>+			  &amp;fifo_sta);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* If the chip says the TX-FIFO is empty, but there are no TX</div><div class='add'>+	 * buffers free in the ring, we assume all have been sent.</div><div class='add'>+	 */</div><div class='add'>+	if (mcp251xfd_tx_fifo_sta_empty(fifo_sta) &amp;&amp;</div><div class='add'>+	    mcp251xfd_get_tx_free(tx_ring) == 0) {</div><div class='add'>+		*len_p = tx_ring-&gt;obj_num;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	chip_tx_tail = FIELD_GET(MCP251XFD_REG_FIFOSTA_FIFOCI_MASK, fifo_sta);</div><div class='add'>+</div><div class='add'>+	err =  mcp251xfd_check_tef_tail(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+	tail = mcp251xfd_get_tef_tail(priv);</div><div class='add'>+</div><div class='add'>+	/* First shift to full u8. The subtraction works on signed</div><div class='add'>+	 * values, that keeps the difference steady around the u8</div><div class='add'>+	 * overflow. The right shift acts on len, which is an u8.</div><div class='add'>+	 */</div><div class='add'>+	BUILD_BUG_ON(sizeof(tx_ring-&gt;obj_num) != sizeof(chip_tx_tail));</div><div class='add'>+	BUILD_BUG_ON(sizeof(tx_ring-&gt;obj_num) != sizeof(tail));</div><div class='add'>+	BUILD_BUG_ON(sizeof(tx_ring-&gt;obj_num) != sizeof(len));</div><div class='add'>+</div><div class='add'>+	len = (chip_tx_tail &lt;&lt; shift) - (tail &lt;&lt; shift);</div><div class='add'>+	len &gt;&gt;= shift;</div><div class='add'>+</div><div class='add'>+	/* According to mcp2518fd erratum DS80000789E 6. the FIFOCI</div><div class='add'>+	 * bits of a FIFOSTA register, here the TX-FIFO tail index</div><div class='add'>+	 * might be corrupted.</div><div class='add'>+	 *</div><div class='add'>+	 * However here it seems the bit indicating that the TX-FIFO</div><div class='add'>+	 * is empty (MCP251XFD_REG_FIFOSTA_TFERFFIF) is not correct</div><div class='add'>+	 * while the TX-FIFO tail index is.</div><div class='add'>+	 *</div><div class='add'>+	 * We assume the TX-FIFO is empty, i.e. all pending CAN frames</div><div class='add'>+	 * haven been send, if:</div><div class='add'>+	 * - Chip's head and tail index are equal (len == 0).</div><div class='add'>+	 * - The TX-FIFO is less than half full.</div><div class='add'>+	 *   (The TX-FIFO empty case has already been checked at the</div><div class='add'>+	 *    beginning of this function.)</div><div class='add'>+	 * - No free buffers in the TX ring.</div><div class='add'>+	 */</div><div class='add'>+	if (len == 0 &amp;&amp; mcp251xfd_tx_fifo_sta_less_than_half_full(fifo_sta) &amp;&amp;</div><div class='add'>+	    mcp251xfd_get_tx_free(tx_ring) == 0)</div><div class='add'>+		len = tx_ring-&gt;obj_num;</div><div class='add'>+</div><div class='add'>+	*len_p = len;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int</div><div class='add'>+mcp251xfd_tef_obj_read(const struct mcp251xfd_priv *priv,</div><div class='add'>+		       struct mcp251xfd_hw_tef_obj *hw_tef_obj,</div><div class='add'>+		       const u8 offset, const u8 len)</div><div class='add'>+{</div><div class='add'>+	const struct mcp251xfd_tx_ring *tx_ring = priv-&gt;tx;</div><div class='add'>+	const int val_bytes = regmap_get_val_bytes(priv-&gt;map_rx);</div><div class='add'>+</div><div class='add'>+	if (IS_ENABLED(CONFIG_CAN_MCP251XFD_SANITY) &amp;&amp;</div><div class='add'>+	    (offset &gt; tx_ring-&gt;obj_num ||</div><div class='add'>+	     len &gt; tx_ring-&gt;obj_num ||</div><div class='add'>+	     offset + len &gt; tx_ring-&gt;obj_num)) {</div><div class='add'>+		netdev_err(priv-&gt;ndev,</div><div class='add'>+			   "Trying to read too many TEF objects (max=%d, offset=%d, len=%d).\n",</div><div class='add'>+			   tx_ring-&gt;obj_num, offset, len);</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return regmap_bulk_read(priv-&gt;map_rx,</div><div class='add'>+				mcp251xfd_get_tef_obj_addr(offset),</div><div class='add'>+				hw_tef_obj,</div><div class='add'>+				sizeof(*hw_tef_obj) / val_bytes * len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void mcp251xfd_ecc_tefif_successful(struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_ecc *ecc = &amp;priv-&gt;ecc;</div><div class='add'>+</div><div class='add'>+	ecc-&gt;ecc_stat = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mcp251xfd_handle_tefif(struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_hw_tef_obj hw_tef_obj[MCP251XFD_TX_OBJ_NUM_MAX];</div><div class='add'>+	unsigned int total_frame_len = 0;</div><div class='add'>+	u8 tef_tail, len, l;</div><div class='add'>+	int err, i;</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_get_tef_len(priv, &amp;len);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	tef_tail = mcp251xfd_get_tef_tail(priv);</div><div class='add'>+	l = mcp251xfd_get_tef_linear_len(priv, len);</div><div class='add'>+	err = mcp251xfd_tef_obj_read(priv, hw_tef_obj, tef_tail, l);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (l &lt; len) {</div><div class='add'>+		err = mcp251xfd_tef_obj_read(priv, &amp;hw_tef_obj[l], 0, len - l);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; len; i++) {</div><div class='add'>+		unsigned int frame_len = 0;</div><div class='add'>+</div><div class='add'>+		err = mcp251xfd_handle_tefif_one(priv, &amp;hw_tef_obj[i], &amp;frame_len);</div><div class='add'>+		/* -EBADMSG means we're affected by mcp2518fd erratum</div><div class='add'>+		 * DS80000789E 6., i.e. the Sequence Number in the TEF</div><div class='add'>+		 * doesn't match our tef_tail. Don't process any</div><div class='add'>+		 * further and mark processed frames as good.</div><div class='add'>+		 */</div><div class='add'>+		if (err == -EBADMSG)</div><div class='add'>+			goto out_netif_wake_queue;</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		total_frame_len += frame_len;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out_netif_wake_queue:</div><div class='add'>+	len = i;	/* number of handled goods TEFs */</div><div class='add'>+	if (len) {</div><div class='add'>+		struct mcp251xfd_tef_ring *ring = priv-&gt;tef;</div><div class='add'>+		struct mcp251xfd_tx_ring *tx_ring = priv-&gt;tx;</div><div class='add'>+		int offset;</div><div class='add'>+</div><div class='add'>+		ring-&gt;head += len;</div><div class='add'>+</div><div class='add'>+		/* Increment the TEF FIFO tail pointer 'len' times in</div><div class='add'>+		 * a single SPI message.</div><div class='add'>+		 *</div><div class='add'>+		 * Note:</div><div class='add'>+		 * Calculate offset, so that the SPI transfer ends on</div><div class='add'>+		 * the last message of the uinc_xfer array, which has</div><div class='add'>+		 * "cs_change == 0", to properly deactivate the chip</div><div class='add'>+		 * select.</div><div class='add'>+		 */</div><div class='add'>+		offset = ARRAY_SIZE(ring-&gt;uinc_xfer) - len;</div><div class='add'>+		err = spi_sync_transfer(priv-&gt;spi,</div><div class='add'>+					ring-&gt;uinc_xfer + offset, len);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		tx_ring-&gt;tail += len;</div><div class='add'>+		netdev_completed_queue(priv-&gt;ndev, len, total_frame_len);</div><div class='add'>+</div><div class='add'>+		err = mcp251xfd_check_tef_tail(priv);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mcp251xfd_ecc_tefif_successful(priv);</div><div class='add'>+</div><div class='add'>+	if (mcp251xfd_get_tx_free(priv-&gt;tx)) {</div><div class='add'>+		/* Make sure that anybody stopping the queue after</div><div class='add'>+		 * this sees the new tx_ring-&gt;tail.</div><div class='add'>+		 */</div><div class='add'>+		smp_mb();</div><div class='add'>+		netif_wake_queue(priv-&gt;ndev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;tx_coalesce_usecs_irq)</div><div class='add'>+		hrtimer_start(&amp;priv-&gt;tx_irq_timer,</div><div class='add'>+			      ns_to_ktime(priv-&gt;tx_coalesce_usecs_irq *</div><div class='add'>+					  NSEC_PER_USEC),</div><div class='add'>+			      HRTIMER_MODE_REL);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/can/spi/mcp251xfd/mcp251xfd-timestamp.c b/drivers/net/can/spi/mcp251xfd/mcp251xfd-timestamp.c<br/>new file mode 100644<br/>index 000000000000..413a5cb75c13<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/mcp251xfd/mcp251xfd-timestamp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/spi/mcp251xfd/mcp251xfd-timestamp.c</a></div><div class='hunk'>@@ -0,0 +1,64 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+//</div><div class='add'>+// mcp251xfd - Microchip MCP251xFD Family CAN controller driver</div><div class='add'>+//</div><div class='add'>+// Copyright (c) 2021, 2023 Pengutronix,</div><div class='add'>+//               Marc Kleine-Budde &lt;kernel@pengutronix.de&gt;</div><div class='add'>+//</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clocksource.h&gt;</div><div class='add'>+#include &lt;linux/workqueue.h&gt;</div><div class='add'>+</div><div class='add'>+#include "mcp251xfd.h"</div><div class='add'>+</div><div class='add'>+static u64 mcp251xfd_timestamp_raw_read(struct cyclecounter *cc)</div><div class='add'>+{</div><div class='add'>+	const struct mcp251xfd_priv *priv;</div><div class='add'>+	u32 ts_raw = 0;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	priv = container_of(cc, struct mcp251xfd_priv, cc);</div><div class='add'>+	err = mcp251xfd_get_timestamp_raw(priv, &amp;ts_raw);</div><div class='add'>+	if (err)</div><div class='add'>+		netdev_err(priv-&gt;ndev,</div><div class='add'>+			   "Error %d while reading timestamp. HW timestamps may be inaccurate.",</div><div class='add'>+			   err);</div><div class='add'>+</div><div class='add'>+	return ts_raw;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mcp251xfd_timestamp_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct delayed_work *delayed_work = to_delayed_work(work);</div><div class='add'>+	struct mcp251xfd_priv *priv;</div><div class='add'>+</div><div class='add'>+	priv = container_of(delayed_work, struct mcp251xfd_priv, timestamp);</div><div class='add'>+	timecounter_read(&amp;priv-&gt;tc);</div><div class='add'>+</div><div class='add'>+	schedule_delayed_work(&amp;priv-&gt;timestamp,</div><div class='add'>+			      MCP251XFD_TIMESTAMP_WORK_DELAY_SEC * HZ);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mcp251xfd_timestamp_init(struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct cyclecounter *cc = &amp;priv-&gt;cc;</div><div class='add'>+</div><div class='add'>+	cc-&gt;read = mcp251xfd_timestamp_raw_read;</div><div class='add'>+	cc-&gt;mask = CYCLECOUNTER_MASK(32);</div><div class='add'>+	cc-&gt;shift = 1;</div><div class='add'>+	cc-&gt;mult = clocksource_hz2mult(priv-&gt;can.clock.freq, cc-&gt;shift);</div><div class='add'>+</div><div class='add'>+	INIT_DELAYED_WORK(&amp;priv-&gt;timestamp, mcp251xfd_timestamp_work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mcp251xfd_timestamp_start(struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	timecounter_init(&amp;priv-&gt;tc, &amp;priv-&gt;cc, ktime_get_real_ns());</div><div class='add'>+	schedule_delayed_work(&amp;priv-&gt;timestamp,</div><div class='add'>+			      MCP251XFD_TIMESTAMP_WORK_DELAY_SEC * HZ);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mcp251xfd_timestamp_stop(struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	cancel_delayed_work_sync(&amp;priv-&gt;timestamp);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/can/spi/mcp251xfd/mcp251xfd-tx.c b/drivers/net/can/spi/mcp251xfd/mcp251xfd-tx.c<br/>new file mode 100644<br/>index 000000000000..747ae3e8a768<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/mcp251xfd/mcp251xfd-tx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/spi/mcp251xfd/mcp251xfd-tx.c</a></div><div class='hunk'>@@ -0,0 +1,244 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+//</div><div class='add'>+// mcp251xfd - Microchip MCP251xFD Family CAN controller driver</div><div class='add'>+//</div><div class='add'>+// Copyright (c) 2019, 2020, 2021 Pengutronix,</div><div class='add'>+//               Marc Kleine-Budde &lt;kernel@pengutronix.de&gt;</div><div class='add'>+//</div><div class='add'>+// Based on:</div><div class='add'>+//</div><div class='add'>+// CAN bus driver for Microchip 25XXFD CAN Controller with SPI Interface</div><div class='add'>+//</div><div class='add'>+// Copyright (c) 2019 Martin Sperl &lt;kernel@martin.sperl.org&gt;</div><div class='add'>+//</div><div class='add'>+</div><div class='add'>+#include &lt;linux/unaligned.h&gt;</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+</div><div class='add'>+#include "mcp251xfd.h"</div><div class='add'>+</div><div class='add'>+static inline struct</div><div class='add'>+mcp251xfd_tx_obj *mcp251xfd_get_tx_obj_next(struct mcp251xfd_tx_ring *tx_ring)</div><div class='add'>+{</div><div class='add'>+	u8 tx_head;</div><div class='add'>+</div><div class='add'>+	tx_head = mcp251xfd_get_tx_head(tx_ring);</div><div class='add'>+</div><div class='add'>+	return &amp;tx_ring-&gt;obj[tx_head];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mcp251xfd_tx_obj_from_skb(const struct mcp251xfd_priv *priv,</div><div class='add'>+			  struct mcp251xfd_tx_obj *tx_obj,</div><div class='add'>+			  const struct sk_buff *skb,</div><div class='add'>+			  unsigned int seq)</div><div class='add'>+{</div><div class='add'>+	const struct canfd_frame *cfd = (struct canfd_frame *)skb-&gt;data;</div><div class='add'>+	struct mcp251xfd_hw_tx_obj_raw *hw_tx_obj;</div><div class='add'>+	union mcp251xfd_tx_obj_load_buf *load_buf;</div><div class='add'>+	u8 dlc;</div><div class='add'>+	u32 id, flags;</div><div class='add'>+	int len_sanitized = 0, len;</div><div class='add'>+</div><div class='add'>+	if (cfd-&gt;can_id &amp; CAN_EFF_FLAG) {</div><div class='add'>+		u32 sid, eid;</div><div class='add'>+</div><div class='add'>+		sid = FIELD_GET(MCP251XFD_REG_FRAME_EFF_SID_MASK, cfd-&gt;can_id);</div><div class='add'>+		eid = FIELD_GET(MCP251XFD_REG_FRAME_EFF_EID_MASK, cfd-&gt;can_id);</div><div class='add'>+</div><div class='add'>+		id = FIELD_PREP(MCP251XFD_OBJ_ID_EID_MASK, eid) |</div><div class='add'>+			FIELD_PREP(MCP251XFD_OBJ_ID_SID_MASK, sid);</div><div class='add'>+</div><div class='add'>+		flags = MCP251XFD_OBJ_FLAGS_IDE;</div><div class='add'>+	} else {</div><div class='add'>+		id = FIELD_PREP(MCP251XFD_OBJ_ID_SID_MASK, cfd-&gt;can_id);</div><div class='add'>+		flags = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Use the MCP2518FD mask even on the MCP2517FD. It doesn't</div><div class='add'>+	 * harm, only the lower 7 bits will be transferred into the</div><div class='add'>+	 * TEF object.</div><div class='add'>+	 */</div><div class='add'>+	flags |= FIELD_PREP(MCP251XFD_OBJ_FLAGS_SEQ_MCP2518FD_MASK, seq);</div><div class='add'>+</div><div class='add'>+	if (cfd-&gt;can_id &amp; CAN_RTR_FLAG)</div><div class='add'>+		flags |= MCP251XFD_OBJ_FLAGS_RTR;</div><div class='add'>+	else</div><div class='add'>+		len_sanitized = canfd_sanitize_len(cfd-&gt;len);</div><div class='add'>+</div><div class='add'>+	/* CANFD */</div><div class='add'>+	if (can_is_canfd_skb(skb)) {</div><div class='add'>+		if (cfd-&gt;flags &amp; CANFD_ESI)</div><div class='add'>+			flags |= MCP251XFD_OBJ_FLAGS_ESI;</div><div class='add'>+</div><div class='add'>+		flags |= MCP251XFD_OBJ_FLAGS_FDF;</div><div class='add'>+</div><div class='add'>+		if (cfd-&gt;flags &amp; CANFD_BRS)</div><div class='add'>+			flags |= MCP251XFD_OBJ_FLAGS_BRS;</div><div class='add'>+</div><div class='add'>+		dlc = can_fd_len2dlc(cfd-&gt;len);</div><div class='add'>+	} else {</div><div class='add'>+		dlc = can_get_cc_dlc((struct can_frame *)cfd,</div><div class='add'>+				     priv-&gt;can.ctrlmode);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	flags |= FIELD_PREP(MCP251XFD_OBJ_FLAGS_DLC_MASK, dlc);</div><div class='add'>+</div><div class='add'>+	load_buf = &amp;tx_obj-&gt;buf;</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; MCP251XFD_QUIRK_CRC_TX)</div><div class='add'>+		hw_tx_obj = &amp;load_buf-&gt;crc.hw_tx_obj;</div><div class='add'>+	else</div><div class='add'>+		hw_tx_obj = &amp;load_buf-&gt;nocrc.hw_tx_obj;</div><div class='add'>+</div><div class='add'>+	put_unaligned_le32(id, &amp;hw_tx_obj-&gt;id);</div><div class='add'>+	put_unaligned_le32(flags, &amp;hw_tx_obj-&gt;flags);</div><div class='add'>+</div><div class='add'>+	/* Copy data */</div><div class='add'>+	memcpy(hw_tx_obj-&gt;data, cfd-&gt;data, cfd-&gt;len);</div><div class='add'>+</div><div class='add'>+	/* Clear unused data at end of CAN frame */</div><div class='add'>+	if (MCP251XFD_SANITIZE_CAN &amp;&amp; len_sanitized) {</div><div class='add'>+		int pad_len;</div><div class='add'>+</div><div class='add'>+		pad_len = len_sanitized - cfd-&gt;len;</div><div class='add'>+		if (pad_len)</div><div class='add'>+			memset(hw_tx_obj-&gt;data + cfd-&gt;len, 0x0, pad_len);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Number of bytes to be written into the RAM of the controller */</div><div class='add'>+	len = sizeof(hw_tx_obj-&gt;id) + sizeof(hw_tx_obj-&gt;flags);</div><div class='add'>+	if (MCP251XFD_SANITIZE_CAN)</div><div class='add'>+		len += round_up(len_sanitized, sizeof(u32));</div><div class='add'>+	else</div><div class='add'>+		len += round_up(cfd-&gt;len, sizeof(u32));</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; MCP251XFD_QUIRK_CRC_TX) {</div><div class='add'>+		u16 crc;</div><div class='add'>+</div><div class='add'>+		mcp251xfd_spi_cmd_crc_set_len_in_ram(&amp;load_buf-&gt;crc.cmd,</div><div class='add'>+						     len);</div><div class='add'>+		/* CRC */</div><div class='add'>+		len += sizeof(load_buf-&gt;crc.cmd);</div><div class='add'>+		crc = mcp251xfd_crc16_compute(&amp;load_buf-&gt;crc, len);</div><div class='add'>+		put_unaligned_be16(crc, (void *)load_buf + len);</div><div class='add'>+</div><div class='add'>+		/* Total length */</div><div class='add'>+		len += sizeof(load_buf-&gt;crc.crc);</div><div class='add'>+	} else {</div><div class='add'>+		len += sizeof(load_buf-&gt;nocrc.cmd);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tx_obj-&gt;xfer[0].len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mcp251xfd_tx_failure_drop(const struct mcp251xfd_priv *priv,</div><div class='add'>+				      struct mcp251xfd_tx_ring *tx_ring,</div><div class='add'>+				      int err)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = priv-&gt;ndev;</div><div class='add'>+	struct net_device_stats *stats = &amp;ndev-&gt;stats;</div><div class='add'>+	unsigned int frame_len = 0;</div><div class='add'>+	u8 tx_head;</div><div class='add'>+</div><div class='add'>+	tx_ring-&gt;head--;</div><div class='add'>+	stats-&gt;tx_dropped++;</div><div class='add'>+	tx_head = mcp251xfd_get_tx_head(tx_ring);</div><div class='add'>+	can_free_echo_skb(ndev, tx_head, &amp;frame_len);</div><div class='add'>+	netdev_completed_queue(ndev, 1, frame_len);</div><div class='add'>+	netif_wake_queue(ndev);</div><div class='add'>+</div><div class='add'>+	if (net_ratelimit())</div><div class='add'>+		netdev_err(priv-&gt;ndev, "ERROR in %s: %d\n", __func__, err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mcp251xfd_tx_obj_write_sync(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_priv *priv = container_of(work, struct mcp251xfd_priv,</div><div class='add'>+						   tx_work);</div><div class='add'>+	struct mcp251xfd_tx_obj *tx_obj = priv-&gt;tx_work_obj;</div><div class='add'>+	struct mcp251xfd_tx_ring *tx_ring = priv-&gt;tx;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = spi_sync(priv-&gt;spi, &amp;tx_obj-&gt;msg);</div><div class='add'>+	if (err)</div><div class='add'>+		mcp251xfd_tx_failure_drop(priv, tx_ring, err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcp251xfd_tx_obj_write(const struct mcp251xfd_priv *priv,</div><div class='add'>+				  struct mcp251xfd_tx_obj *tx_obj)</div><div class='add'>+{</div><div class='add'>+	return spi_async(priv-&gt;spi, &amp;tx_obj-&gt;msg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool mcp251xfd_tx_busy(const struct mcp251xfd_priv *priv,</div><div class='add'>+			      struct mcp251xfd_tx_ring *tx_ring)</div><div class='add'>+{</div><div class='add'>+	if (mcp251xfd_get_tx_free(tx_ring) &gt; 0)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(priv-&gt;ndev);</div><div class='add'>+</div><div class='add'>+	/* Memory barrier before checking tx_free (head and tail) */</div><div class='add'>+	smp_mb();</div><div class='add'>+</div><div class='add'>+	if (mcp251xfd_get_tx_free(tx_ring) == 0) {</div><div class='add'>+		netdev_dbg(priv-&gt;ndev,</div><div class='add'>+			   "Stopping tx-queue (tx_head=0x%08x, tx_tail=0x%08x, len=%d).\n",</div><div class='add'>+			   tx_ring-&gt;head, tx_ring-&gt;tail,</div><div class='add'>+			   tx_ring-&gt;head - tx_ring-&gt;tail);</div><div class='add'>+</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netif_start_queue(priv-&gt;ndev);</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool mcp251xfd_work_busy(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	return work_busy(work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+netdev_tx_t mcp251xfd_start_xmit(struct sk_buff *skb,</div><div class='add'>+				 struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct mcp251xfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct mcp251xfd_tx_ring *tx_ring = priv-&gt;tx;</div><div class='add'>+	struct mcp251xfd_tx_obj *tx_obj;</div><div class='add'>+	unsigned int frame_len;</div><div class='add'>+	u8 tx_head;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (can_dev_dropped_skb(ndev, skb))</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+	if (mcp251xfd_tx_busy(priv, tx_ring) ||</div><div class='add'>+	    mcp251xfd_work_busy(&amp;priv-&gt;tx_work))</div><div class='add'>+		return NETDEV_TX_BUSY;</div><div class='add'>+</div><div class='add'>+	tx_obj = mcp251xfd_get_tx_obj_next(tx_ring);</div><div class='add'>+	mcp251xfd_tx_obj_from_skb(priv, tx_obj, skb, tx_ring-&gt;head);</div><div class='add'>+</div><div class='add'>+	/* Stop queue if we occupy the complete TX FIFO */</div><div class='add'>+	tx_head = mcp251xfd_get_tx_head(tx_ring);</div><div class='add'>+	tx_ring-&gt;head++;</div><div class='add'>+	if (mcp251xfd_get_tx_free(tx_ring) == 0)</div><div class='add'>+		netif_stop_queue(ndev);</div><div class='add'>+</div><div class='add'>+	frame_len = can_skb_get_frame_len(skb);</div><div class='add'>+	err = can_put_echo_skb(skb, ndev, tx_head, frame_len);</div><div class='add'>+	if (!err)</div><div class='add'>+		netdev_sent_queue(priv-&gt;ndev, frame_len);</div><div class='add'>+</div><div class='add'>+	err = mcp251xfd_tx_obj_write(priv, tx_obj);</div><div class='add'>+	if (err == -EBUSY) {</div><div class='add'>+		netif_stop_queue(ndev);</div><div class='add'>+		priv-&gt;tx_work_obj = tx_obj;</div><div class='add'>+		queue_work(priv-&gt;wq, &amp;priv-&gt;tx_work);</div><div class='add'>+	} else if (err) {</div><div class='add'>+		mcp251xfd_tx_failure_drop(priv, tx_ring, err);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/can/spi/mcp251xfd/mcp251xfd.h b/drivers/net/can/spi/mcp251xfd/mcp251xfd.h<br/>new file mode 100644<br/>index 000000000000..085d7101e595<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/spi/mcp251xfd/mcp251xfd.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/spi/mcp251xfd/mcp251xfd.h</a></div><div class='hunk'>@@ -0,0 +1,983 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0</div><div class='add'>+ *</div><div class='add'>+ * mcp251xfd - Microchip MCP251xFD Family CAN controller driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2019, 2020, 2021, 2023 Pengutronix,</div><div class='add'>+ *               Marc Kleine-Budde &lt;kernel@pengutronix.de&gt;</div><div class='add'>+ * Copyright (c) 2019 Martin Sperl &lt;kernel@martin.sperl.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _MCP251XFD_H</div><div class='add'>+#define _MCP251XFD_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/can/core.h&gt;</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/can/rx-offload.h&gt;</div><div class='add'>+#include &lt;linux/gpio/consumer.h&gt;</div><div class='add'>+#include &lt;linux/gpio/driver.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;linux/regulator/consumer.h&gt;</div><div class='add'>+#include &lt;linux/spi/spi.h&gt;</div><div class='add'>+#include &lt;linux/timecounter.h&gt;</div><div class='add'>+#include &lt;linux/workqueue.h&gt;</div><div class='add'>+</div><div class='add'>+/* MPC251x registers */</div><div class='add'>+</div><div class='add'>+/* CAN FD Controller Module SFR */</div><div class='add'>+#define MCP251XFD_REG_CON 0x00</div><div class='add'>+#define MCP251XFD_REG_CON_TXBWS_MASK GENMASK(31, 28)</div><div class='add'>+#define MCP251XFD_REG_CON_ABAT BIT(27)</div><div class='add'>+#define MCP251XFD_REG_CON_REQOP_MASK GENMASK(26, 24)</div><div class='add'>+#define MCP251XFD_REG_CON_MODE_MIXED 0</div><div class='add'>+#define MCP251XFD_REG_CON_MODE_SLEEP 1</div><div class='add'>+#define MCP251XFD_REG_CON_MODE_INT_LOOPBACK 2</div><div class='add'>+#define MCP251XFD_REG_CON_MODE_LISTENONLY 3</div><div class='add'>+#define MCP251XFD_REG_CON_MODE_CONFIG 4</div><div class='add'>+#define MCP251XFD_REG_CON_MODE_EXT_LOOPBACK 5</div><div class='add'>+#define MCP251XFD_REG_CON_MODE_CAN2_0 6</div><div class='add'>+#define MCP251XFD_REG_CON_MODE_RESTRICTED 7</div><div class='add'>+#define MCP251XFD_REG_CON_OPMOD_MASK GENMASK(23, 21)</div><div class='add'>+#define MCP251XFD_REG_CON_TXQEN BIT(20)</div><div class='add'>+#define MCP251XFD_REG_CON_STEF BIT(19)</div><div class='add'>+#define MCP251XFD_REG_CON_SERR2LOM BIT(18)</div><div class='add'>+#define MCP251XFD_REG_CON_ESIGM BIT(17)</div><div class='add'>+#define MCP251XFD_REG_CON_RTXAT BIT(16)</div><div class='add'>+#define MCP251XFD_REG_CON_BRSDIS BIT(12)</div><div class='add'>+#define MCP251XFD_REG_CON_BUSY BIT(11)</div><div class='add'>+#define MCP251XFD_REG_CON_WFT_MASK GENMASK(10, 9)</div><div class='add'>+#define MCP251XFD_REG_CON_WFT_T00FILTER 0x0</div><div class='add'>+#define MCP251XFD_REG_CON_WFT_T01FILTER 0x1</div><div class='add'>+#define MCP251XFD_REG_CON_WFT_T10FILTER 0x2</div><div class='add'>+#define MCP251XFD_REG_CON_WFT_T11FILTER 0x3</div><div class='add'>+#define MCP251XFD_REG_CON_WAKFIL BIT(8)</div><div class='add'>+#define MCP251XFD_REG_CON_PXEDIS BIT(6)</div><div class='add'>+#define MCP251XFD_REG_CON_ISOCRCEN BIT(5)</div><div class='add'>+#define MCP251XFD_REG_CON_DNCNT_MASK GENMASK(4, 0)</div><div class='add'>+</div><div class='add'>+#define MCP251XFD_REG_NBTCFG 0x04</div><div class='add'>+#define MCP251XFD_REG_NBTCFG_BRP_MASK GENMASK(31, 24)</div><div class='add'>+#define MCP251XFD_REG_NBTCFG_TSEG1_MASK GENMASK(23, 16)</div><div class='add'>+#define MCP251XFD_REG_NBTCFG_TSEG2_MASK GENMASK(14, 8)</div><div class='add'>+#define MCP251XFD_REG_NBTCFG_SJW_MASK GENMASK(6, 0)</div><div class='add'>+</div><div class='add'>+#define MCP251XFD_REG_DBTCFG 0x08</div><div class='add'>+#define MCP251XFD_REG_DBTCFG_BRP_MASK GENMASK(31, 24)</div><div class='add'>+#define MCP251XFD_REG_DBTCFG_TSEG1_MASK GENMASK(20, 16)</div><div class='add'>+#define MCP251XFD_REG_DBTCFG_TSEG2_MASK GENMASK(11, 8)</div><div class='add'>+#define MCP251XFD_REG_DBTCFG_SJW_MASK GENMASK(3, 0)</div><div class='add'>+</div><div class='add'>+#define MCP251XFD_REG_TDC 0x0c</div><div class='add'>+#define MCP251XFD_REG_TDC_EDGFLTEN BIT(25)</div><div class='add'>+#define MCP251XFD_REG_TDC_SID11EN BIT(24)</div><div class='add'>+#define MCP251XFD_REG_TDC_TDCMOD_MASK GENMASK(17, 16)</div><div class='add'>+#define MCP251XFD_REG_TDC_TDCMOD_AUTO 2</div><div class='add'>+#define MCP251XFD_REG_TDC_TDCMOD_MANUAL 1</div><div class='add'>+#define MCP251XFD_REG_TDC_TDCMOD_DISABLED 0</div><div class='add'>+#define MCP251XFD_REG_TDC_TDCO_MASK GENMASK(14, 8)</div><div class='add'>+#define MCP251XFD_REG_TDC_TDCV_MASK GENMASK(5, 0)</div><div class='add'>+</div><div class='add'>+#define MCP251XFD_REG_TBC 0x10</div><div class='add'>+</div><div class='add'>+#define MCP251XFD_REG_TSCON 0x14</div><div class='add'>+#define MCP251XFD_REG_TSCON_TSRES BIT(18)</div><div class='add'>+#define MCP251XFD_REG_TSCON_TSEOF BIT(17)</div><div class='add'>+#define MCP251XFD_REG_TSCON_TBCEN BIT(16)</div><div class='add'>+#define MCP251XFD_REG_TSCON_TBCPRE_MASK GENMASK(9, 0)</div><div class='add'>+</div><div class='add'>+#define MCP251XFD_REG_VEC 0x18</div><div class='add'>+#define MCP251XFD_REG_VEC_RXCODE_MASK GENMASK(30, 24)</div><div class='add'>+#define MCP251XFD_REG_VEC_TXCODE_MASK GENMASK(22, 16)</div><div class='add'>+#define MCP251XFD_REG_VEC_FILHIT_MASK GENMASK(12, 8)</div><div class='add'>+#define MCP251XFD_REG_VEC_ICODE_MASK GENMASK(6, 0)</div><div class='add'>+</div><div class='add'>+#define MCP251XFD_REG_INT 0x1c</div><div class='add'>+#define MCP251XFD_REG_INT_IF_MASK GENMASK(15, 0)</div><div class='add'>+#define MCP251XFD_REG_INT_IE_MASK GENMASK(31, 16)</div><div class='add'>+#define MCP251XFD_REG_INT_IVMIE BIT(31)</div><div class='add'>+#define MCP251XFD_REG_INT_WAKIE BIT(30)</div><div class='add'>+#define MCP251XFD_REG_INT_CERRIE BIT(29)</div><div class='add'>+#define MCP251XFD_REG_INT_SERRIE BIT(28)</div><div class='add'>+#define MCP251XFD_REG_INT_RXOVIE BIT(27)</div><div class='add'>+#define MCP251XFD_REG_INT_TXATIE BIT(26)</div><div class='add'>+#define MCP251XFD_REG_INT_SPICRCIE BIT(25)</div><div class='add'>+#define MCP251XFD_REG_INT_ECCIE BIT(24)</div><div class='add'>+#define MCP251XFD_REG_INT_TEFIE BIT(20)</div><div class='add'>+#define MCP251XFD_REG_INT_MODIE BIT(19)</div><div class='add'>+#define MCP251XFD_REG_INT_TBCIE BIT(18)</div><div class='add'>+#define MCP251XFD_REG_INT_RXIE BIT(17)</div><div class='add'>+#define MCP251XFD_REG_INT_TXIE BIT(16)</div><div class='add'>+#define MCP251XFD_REG_INT_IVMIF BIT(15)</div><div class='add'>+#define MCP251XFD_REG_INT_WAKIF BIT(14)</div><div class='add'>+#define MCP251XFD_REG_INT_CERRIF BIT(13)</div><div class='add'>+#define MCP251XFD_REG_INT_SERRIF BIT(12)</div><div class='add'>+#define MCP251XFD_REG_INT_RXOVIF BIT(11)</div><div class='add'>+#define MCP251XFD_REG_INT_TXATIF BIT(10)</div><div class='add'>+#define MCP251XFD_REG_INT_SPICRCIF BIT(9)</div><div class='add'>+#define MCP251XFD_REG_INT_ECCIF BIT(8)</div><div class='add'>+#define MCP251XFD_REG_INT_TEFIF BIT(4)</div><div class='add'>+#define MCP251XFD_REG_INT_MODIF BIT(3)</div><div class='add'>+#define MCP251XFD_REG_INT_TBCIF BIT(2)</div><div class='add'>+#define MCP251XFD_REG_INT_RXIF BIT(1)</div><div class='add'>+#define MCP251XFD_REG_INT_TXIF BIT(0)</div><div class='add'>+/* These IRQ flags must be cleared by SW in the CAN_INT register */</div><div class='add'>+#define MCP251XFD_REG_INT_IF_CLEARABLE_MASK \</div><div class='add'>+	(MCP251XFD_REG_INT_IVMIF | MCP251XFD_REG_INT_WAKIF | \</div><div class='add'>+	 MCP251XFD_REG_INT_CERRIF |  MCP251XFD_REG_INT_SERRIF | \</div><div class='add'>+	 MCP251XFD_REG_INT_MODIF)</div><div class='add'>+</div><div class='add'>+#define MCP251XFD_REG_RXIF 0x20</div><div class='add'>+#define MCP251XFD_REG_TXIF 0x24</div><div class='add'>+#define MCP251XFD_REG_RXOVIF 0x28</div><div class='add'>+#define MCP251XFD_REG_TXATIF 0x2c</div><div class='add'>+#define MCP251XFD_REG_TXREQ 0x30</div><div class='add'>+</div><div class='add'>+#define MCP251XFD_REG_TREC 0x34</div><div class='add'>+#define MCP251XFD_REG_TREC_TXBO BIT(21)</div><div class='add'>+#define MCP251XFD_REG_TREC_TXBP BIT(20)</div><div class='add'>+#define MCP251XFD_REG_TREC_RXBP BIT(19)</div><div class='add'>+#define MCP251XFD_REG_TREC_TXWARN BIT(18)</div><div class='add'>+#define MCP251XFD_REG_TREC_RXWARN BIT(17)</div><div class='add'>+#define MCP251XFD_REG_TREC_EWARN BIT(16)</div><div class='add'>+#define MCP251XFD_REG_TREC_TEC_MASK GENMASK(15, 8)</div><div class='add'>+#define MCP251XFD_REG_TREC_REC_MASK GENMASK(7, 0)</div><div class='add'>+</div><div class='add'>+#define MCP251XFD_REG_BDIAG0 0x38</div><div class='add'>+#define MCP251XFD_REG_BDIAG0_DTERRCNT_MASK GENMASK(31, 24)</div><div class='add'>+#define MCP251XFD_REG_BDIAG0_DRERRCNT_MASK GENMASK(23, 16)</div><div class='add'>+#define MCP251XFD_REG_BDIAG0_NTERRCNT_MASK GENMASK(15, 8)</div><div class='add'>+#define MCP251XFD_REG_BDIAG0_NRERRCNT_MASK GENMASK(7, 0)</div><div class='add'>+</div><div class='add'>+#define MCP251XFD_REG_BDIAG1 0x3c</div><div class='add'>+#define MCP251XFD_REG_BDIAG1_DLCMM BIT(31)</div><div class='add'>+#define MCP251XFD_REG_BDIAG1_ESI BIT(30)</div><div class='add'>+#define MCP251XFD_REG_BDIAG1_DCRCERR BIT(29)</div><div class='add'>+#define MCP251XFD_REG_BDIAG1_DSTUFERR BIT(28)</div><div class='add'>+#define MCP251XFD_REG_BDIAG1_DFORMERR BIT(27)</div><div class='add'>+#define MCP251XFD_REG_BDIAG1_DBIT1ERR BIT(25)</div><div class='add'>+#define MCP251XFD_REG_BDIAG1_DBIT0ERR BIT(24)</div><div class='add'>+#define MCP251XFD_REG_BDIAG1_TXBOERR BIT(23)</div><div class='add'>+#define MCP251XFD_REG_BDIAG1_NCRCERR BIT(21)</div><div class='add'>+#define MCP251XFD_REG_BDIAG1_NSTUFERR BIT(20)</div><div class='add'>+#define MCP251XFD_REG_BDIAG1_NFORMERR BIT(19)</div><div class='add'>+#define MCP251XFD_REG_BDIAG1_NACKERR BIT(18)</div><div class='add'>+#define MCP251XFD_REG_BDIAG1_NBIT1ERR BIT(17)</div><div class='add'>+#define MCP251XFD_REG_BDIAG1_NBIT0ERR BIT(16)</div><div class='add'>+#define MCP251XFD_REG_BDIAG1_BERR_MASK \</div><div class='add'>+	(MCP251XFD_REG_BDIAG1_DLCMM | MCP251XFD_REG_BDIAG1_ESI | \</div><div class='add'>+	 MCP251XFD_REG_BDIAG1_DCRCERR | MCP251XFD_REG_BDIAG1_DSTUFERR | \</div><div class='add'>+	 MCP251XFD_REG_BDIAG1_DFORMERR | MCP251XFD_REG_BDIAG1_DBIT1ERR | \</div><div class='add'>+	 MCP251XFD_REG_BDIAG1_DBIT0ERR | MCP251XFD_REG_BDIAG1_TXBOERR | \</div><div class='add'>+	 MCP251XFD_REG_BDIAG1_NCRCERR | MCP251XFD_REG_BDIAG1_NSTUFERR | \</div><div class='add'>+	 MCP251XFD_REG_BDIAG1_NFORMERR | MCP251XFD_REG_BDIAG1_NACKERR | \</div><div class='add'>+	 MCP251XFD_REG_BDIAG1_NBIT1ERR | MCP251XFD_REG_BDIAG1_NBIT0ERR)</div><div class='add'>+#define MCP251XFD_REG_BDIAG1_EFMSGCNT_MASK GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define MCP251XFD_REG_TEFCON 0x40</div><div class='add'>+#define MCP251XFD_REG_TEFCON_FSIZE_MASK GENMASK(28, 24)</div><div class='add'>+#define MCP251XFD_REG_TEFCON_FRESET BIT(10)</div><div class='add'>+#define MCP251XFD_REG_TEFCON_UINC BIT(8)</div><div class='add'>+#define MCP251XFD_REG_TEFCON_TEFTSEN BIT(5)</div><div class='add'>+#define MCP251XFD_REG_TEFCON_TEFOVIE BIT(3)</div><div class='add'>+#define MCP251XFD_REG_TEFCON_TEFFIE BIT(2)</div><div class='add'>+#define MCP251XFD_REG_TEFCON_TEFHIE BIT(1)</div><div class='add'>+#define MCP251XFD_REG_TEFCON_TEFNEIE BIT(0)</div><div class='add'>+</div><div class='add'>+#define MCP251XFD_REG_TEFSTA 0x44</div><div class='add'>+#define MCP251XFD_REG_TEFSTA_TEFOVIF BIT(3)</div><div class='add'>+#define MCP251XFD_REG_TEFSTA_TEFFIF BIT(2)</div><div class='add'>+#define MCP251XFD_REG_TEFSTA_TEFHIF BIT(1)</div><div class='add'>+#define MCP251XFD_REG_TEFSTA_TEFNEIF BIT(0)</div><div class='add'>+</div><div class='add'>+#define MCP251XFD_REG_TEFUA 0x48</div><div class='add'>+</div><div class='add'>+#define MCP251XFD_REG_TXQCON 0x50</div><div class='add'>+#define MCP251XFD_REG_TXQCON_PLSIZE_MASK GENMASK(31, 29)</div><div class='add'>+#define MCP251XFD_REG_TXQCON_PLSIZE_8 0</div><div class='add'>+#define MCP251XFD_REG_TXQCON_PLSIZE_12 1</div><div class='add'>+#define MCP251XFD_REG_TXQCON_PLSIZE_16 2</div><div class='add'>+#define MCP251XFD_REG_TXQCON_PLSIZE_20 3</div><div class='add'>+#define MCP251XFD_REG_TXQCON_PLSIZE_24 4</div><div class='add'>+#define MCP251XFD_REG_TXQCON_PLSIZE_32 5</div><div class='add'>+#define MCP251XFD_REG_TXQCON_PLSIZE_48 6</div><div class='add'>+#define MCP251XFD_REG_TXQCON_PLSIZE_64 7</div><div class='add'>+#define MCP251XFD_REG_TXQCON_FSIZE_MASK GENMASK(28, 24)</div><div class='add'>+#define MCP251XFD_REG_TXQCON_TXAT_UNLIMITED 3</div><div class='add'>+#define MCP251XFD_REG_TXQCON_TXAT_THREE_SHOT 1</div><div class='add'>+#define MCP251XFD_REG_TXQCON_TXAT_ONE_SHOT 0</div><div class='add'>+#define MCP251XFD_REG_TXQCON_TXAT_MASK GENMASK(22, 21)</div><div class='add'>+#define MCP251XFD_REG_TXQCON_TXPRI_MASK GENMASK(20, 16)</div><div class='add'>+#define MCP251XFD_REG_TXQCON_FRESET BIT(10)</div><div class='add'>+#define MCP251XFD_REG_TXQCON_TXREQ BIT(9)</div><div class='add'>+#define MCP251XFD_REG_TXQCON_UINC BIT(8)</div><div class='add'>+#define MCP251XFD_REG_TXQCON_TXEN BIT(7)</div><div class='add'>+#define MCP251XFD_REG_TXQCON_TXATIE BIT(4)</div><div class='add'>+#define MCP251XFD_REG_TXQCON_TXQEIE BIT(2)</div><div class='add'>+#define MCP251XFD_REG_TXQCON_TXQNIE BIT(0)</div><div class='add'>+</div><div class='add'>+#define MCP251XFD_REG_TXQSTA 0x54</div><div class='add'>+#define MCP251XFD_REG_TXQSTA_TXQCI_MASK GENMASK(12, 8)</div><div class='add'>+#define MCP251XFD_REG_TXQSTA_TXABT BIT(7)</div><div class='add'>+#define MCP251XFD_REG_TXQSTA_TXLARB BIT(6)</div><div class='add'>+#define MCP251XFD_REG_TXQSTA_TXERR BIT(5)</div><div class='add'>+#define MCP251XFD_REG_TXQSTA_TXATIF BIT(4)</div><div class='add'>+#define MCP251XFD_REG_TXQSTA_TXQEIF BIT(2)</div><div class='add'>+#define MCP251XFD_REG_TXQSTA_TXQNIF BIT(0)</div><div class='add'>+</div><div class='add'>+#define MCP251XFD_REG_TXQUA 0x58</div><div class='add'>+</div><div class='add'>+#define MCP251XFD_REG_FIFOCON(x) (0x50 + 0xc * (x))</div><div class='add'>+#define MCP251XFD_REG_FIFOCON_PLSIZE_MASK GENMASK(31, 29)</div><div class='add'>+#define MCP251XFD_REG_FIFOCON_PLSIZE_8 0</div><div class='add'>+#define MCP251XFD_REG_FIFOCON_PLSIZE_12 1</div><div class='add'>+#define MCP251XFD_REG_FIFOCON_PLSIZE_16 2</div><div class='add'>+#define MCP251XFD_REG_FIFOCON_PLSIZE_20 3</div><div class='add'>+#define MCP251XFD_REG_FIFOCON_PLSIZE_24 4</div><div class='add'>+#define MCP251XFD_REG_FIFOCON_PLSIZE_32 5</div><div class='add'>+#define MCP251XFD_REG_FIFOCON_PLSIZE_48 6</div><div class='add'>+#define MCP251XFD_REG_FIFOCON_PLSIZE_64 7</div><div class='add'>+#define MCP251XFD_REG_FIFOCON_FSIZE_MASK GENMASK(28, 24)</div><div class='add'>+#define MCP251XFD_REG_FIFOCON_TXAT_MASK GENMASK(22, 21)</div><div class='add'>+#define MCP251XFD_REG_FIFOCON_TXAT_ONE_SHOT 0</div><div class='add'>+#define MCP251XFD_REG_FIFOCON_TXAT_THREE_SHOT 1</div><div class='add'>+#define MCP251XFD_REG_FIFOCON_TXAT_UNLIMITED 3</div><div class='add'>+#define MCP251XFD_REG_FIFOCON_TXPRI_MASK GENMASK(20, 16)</div><div class='add'>+#define MCP251XFD_REG_FIFOCON_FRESET BIT(10)</div><div class='add'>+#define MCP251XFD_REG_FIFOCON_TXREQ BIT(9)</div><div class='add'>+#define MCP251XFD_REG_FIFOCON_UINC BIT(8)</div><div class='add'>+#define MCP251XFD_REG_FIFOCON_TXEN BIT(7)</div><div class='add'>+#define MCP251XFD_REG_FIFOCON_RTREN BIT(6)</div><div class='add'>+#define MCP251XFD_REG_FIFOCON_RXTSEN BIT(5)</div><div class='add'>+#define MCP251XFD_REG_FIFOCON_TXATIE BIT(4)</div><div class='add'>+#define MCP251XFD_REG_FIFOCON_RXOVIE BIT(3)</div><div class='add'>+#define MCP251XFD_REG_FIFOCON_TFERFFIE BIT(2)</div><div class='add'>+#define MCP251XFD_REG_FIFOCON_TFHRFHIE BIT(1)</div><div class='add'>+#define MCP251XFD_REG_FIFOCON_TFNRFNIE BIT(0)</div><div class='add'>+</div><div class='add'>+#define MCP251XFD_REG_FIFOSTA(x) (0x54 + 0xc * (x))</div><div class='add'>+#define MCP251XFD_REG_FIFOSTA_FIFOCI_MASK GENMASK(12, 8)</div><div class='add'>+#define MCP251XFD_REG_FIFOSTA_TXABT BIT(7)</div><div class='add'>+#define MCP251XFD_REG_FIFOSTA_TXLARB BIT(6)</div><div class='add'>+#define MCP251XFD_REG_FIFOSTA_TXERR BIT(5)</div><div class='add'>+#define MCP251XFD_REG_FIFOSTA_TXATIF BIT(4)</div><div class='add'>+#define MCP251XFD_REG_FIFOSTA_RXOVIF BIT(3)</div><div class='add'>+#define MCP251XFD_REG_FIFOSTA_TFERFFIF BIT(2)</div><div class='add'>+#define MCP251XFD_REG_FIFOSTA_TFHRFHIF BIT(1)</div><div class='add'>+#define MCP251XFD_REG_FIFOSTA_TFNRFNIF BIT(0)</div><div class='add'>+</div><div class='add'>+#define MCP251XFD_REG_FIFOUA(x) (0x58 + 0xc * (x))</div><div class='add'>+</div><div class='add'>+#define MCP251XFD_REG_FLTCON(x) (0x1d0 + 0x4 * (x))</div><div class='add'>+#define MCP251XFD_REG_FLTCON_FLTEN3 BIT(31)</div><div class='add'>+#define MCP251XFD_REG_FLTCON_F3BP_MASK GENMASK(28, 24)</div><div class='add'>+#define MCP251XFD_REG_FLTCON_FLTEN2 BIT(23)</div><div class='add'>+#define MCP251XFD_REG_FLTCON_F2BP_MASK GENMASK(20, 16)</div><div class='add'>+#define MCP251XFD_REG_FLTCON_FLTEN1 BIT(15)</div><div class='add'>+#define MCP251XFD_REG_FLTCON_F1BP_MASK GENMASK(12, 8)</div><div class='add'>+#define MCP251XFD_REG_FLTCON_FLTEN0 BIT(7)</div><div class='add'>+#define MCP251XFD_REG_FLTCON_F0BP_MASK GENMASK(4, 0)</div><div class='add'>+#define MCP251XFD_REG_FLTCON_FLTEN(x) (BIT(7) &lt;&lt; 8 * ((x) &amp; 0x3))</div><div class='add'>+#define MCP251XFD_REG_FLTCON_FLT_MASK(x) (GENMASK(7, 0) &lt;&lt; (8 * ((x) &amp; 0x3)))</div><div class='add'>+#define MCP251XFD_REG_FLTCON_FBP(x, fifo) ((fifo) &lt;&lt; 8 * ((x) &amp; 0x3))</div><div class='add'>+</div><div class='add'>+#define MCP251XFD_REG_FLTOBJ(x) (0x1f0 + 0x8 * (x))</div><div class='add'>+#define MCP251XFD_REG_FLTOBJ_EXIDE BIT(30)</div><div class='add'>+#define MCP251XFD_REG_FLTOBJ_SID11 BIT(29)</div><div class='add'>+#define MCP251XFD_REG_FLTOBJ_EID_MASK GENMASK(28, 11)</div><div class='add'>+#define MCP251XFD_REG_FLTOBJ_SID_MASK GENMASK(10, 0)</div><div class='add'>+</div><div class='add'>+#define MCP251XFD_REG_FLTMASK(x) (0x1f4 + 0x8 * (x))</div><div class='add'>+#define MCP251XFD_REG_MASK_MIDE BIT(30)</div><div class='add'>+#define MCP251XFD_REG_MASK_MSID11 BIT(29)</div><div class='add'>+#define MCP251XFD_REG_MASK_MEID_MASK GENMASK(28, 11)</div><div class='add'>+#define MCP251XFD_REG_MASK_MSID_MASK GENMASK(10, 0)</div><div class='add'>+</div><div class='add'>+/* RAM */</div><div class='add'>+#define MCP251XFD_RAM_START 0x400</div><div class='add'>+#define MCP251XFD_RAM_SIZE SZ_2K</div><div class='add'>+</div><div class='add'>+/* Message Object */</div><div class='add'>+#define MCP251XFD_OBJ_ID_SID11 BIT(29)</div><div class='add'>+#define MCP251XFD_OBJ_ID_EID_MASK GENMASK(28, 11)</div><div class='add'>+#define MCP251XFD_OBJ_ID_SID_MASK GENMASK(10, 0)</div><div class='add'>+#define MCP251XFD_OBJ_FLAGS_SEQ_MCP2518FD_MASK GENMASK(31, 9)</div><div class='add'>+#define MCP251XFD_OBJ_FLAGS_SEQ_MCP2517FD_MASK GENMASK(15, 9)</div><div class='add'>+#define MCP251XFD_OBJ_FLAGS_SEQ_MASK MCP251XFD_OBJ_FLAGS_SEQ_MCP2518FD_MASK</div><div class='add'>+#define MCP251XFD_OBJ_FLAGS_ESI BIT(8)</div><div class='add'>+#define MCP251XFD_OBJ_FLAGS_FDF BIT(7)</div><div class='add'>+#define MCP251XFD_OBJ_FLAGS_BRS BIT(6)</div><div class='add'>+#define MCP251XFD_OBJ_FLAGS_RTR BIT(5)</div><div class='add'>+#define MCP251XFD_OBJ_FLAGS_IDE BIT(4)</div><div class='add'>+#define MCP251XFD_OBJ_FLAGS_DLC_MASK GENMASK(3, 0)</div><div class='add'>+</div><div class='add'>+#define MCP251XFD_REG_FRAME_EFF_SID_MASK GENMASK(28, 18)</div><div class='add'>+#define MCP251XFD_REG_FRAME_EFF_EID_MASK GENMASK(17, 0)</div><div class='add'>+</div><div class='add'>+/* MCP2517/18FD SFR */</div><div class='add'>+#define MCP251XFD_REG_OSC 0xe00</div><div class='add'>+#define MCP251XFD_REG_OSC_SCLKRDY BIT(12)</div><div class='add'>+#define MCP251XFD_REG_OSC_OSCRDY BIT(10)</div><div class='add'>+#define MCP251XFD_REG_OSC_PLLRDY BIT(8)</div><div class='add'>+#define MCP251XFD_REG_OSC_CLKODIV_10 3</div><div class='add'>+#define MCP251XFD_REG_OSC_CLKODIV_4 2</div><div class='add'>+#define MCP251XFD_REG_OSC_CLKODIV_2 1</div><div class='add'>+#define MCP251XFD_REG_OSC_CLKODIV_1 0</div><div class='add'>+#define MCP251XFD_REG_OSC_CLKODIV_MASK GENMASK(6, 5)</div><div class='add'>+#define MCP251XFD_REG_OSC_SCLKDIV BIT(4)</div><div class='add'>+#define MCP251XFD_REG_OSC_LPMEN BIT(3)	/* MCP2518FD only */</div><div class='add'>+#define MCP251XFD_REG_OSC_OSCDIS BIT(2)</div><div class='add'>+#define MCP251XFD_REG_OSC_PLLEN BIT(0)</div><div class='add'>+</div><div class='add'>+#define MCP251XFD_REG_IOCON 0xe04</div><div class='add'>+#define MCP251XFD_REG_IOCON_INTOD BIT(30)</div><div class='add'>+#define MCP251XFD_REG_IOCON_SOF BIT(29)</div><div class='add'>+#define MCP251XFD_REG_IOCON_TXCANOD BIT(28)</div><div class='add'>+#define MCP251XFD_REG_IOCON_PM1 BIT(25)</div><div class='add'>+#define MCP251XFD_REG_IOCON_PM0 BIT(24)</div><div class='add'>+#define MCP251XFD_REG_IOCON_PM(n) (MCP251XFD_REG_IOCON_PM0 &lt;&lt; (n))</div><div class='add'>+#define MCP251XFD_REG_IOCON_GPIO1 BIT(17)</div><div class='add'>+#define MCP251XFD_REG_IOCON_GPIO0 BIT(16)</div><div class='add'>+#define MCP251XFD_REG_IOCON_GPIO(n) (MCP251XFD_REG_IOCON_GPIO0 &lt;&lt; (n))</div><div class='add'>+#define MCP251XFD_REG_IOCON_GPIO_MASK GENMASK(17, 16)</div><div class='add'>+#define MCP251XFD_REG_IOCON_LAT1 BIT(9)</div><div class='add'>+#define MCP251XFD_REG_IOCON_LAT0 BIT(8)</div><div class='add'>+#define MCP251XFD_REG_IOCON_LAT(n) (MCP251XFD_REG_IOCON_LAT0 &lt;&lt; (n))</div><div class='add'>+#define MCP251XFD_REG_IOCON_LAT_MASK GENMASK(9, 8)</div><div class='add'>+#define MCP251XFD_REG_IOCON_XSTBYEN BIT(6)</div><div class='add'>+#define MCP251XFD_REG_IOCON_TRIS1 BIT(1)</div><div class='add'>+#define MCP251XFD_REG_IOCON_TRIS0 BIT(0)</div><div class='add'>+#define MCP251XFD_REG_IOCON_TRIS(n) (MCP251XFD_REG_IOCON_TRIS0 &lt;&lt; (n))</div><div class='add'>+</div><div class='add'>+#define MCP251XFD_REG_CRC 0xe08</div><div class='add'>+#define MCP251XFD_REG_CRC_FERRIE BIT(25)</div><div class='add'>+#define MCP251XFD_REG_CRC_CRCERRIE BIT(24)</div><div class='add'>+#define MCP251XFD_REG_CRC_FERRIF BIT(17)</div><div class='add'>+#define MCP251XFD_REG_CRC_CRCERRIF BIT(16)</div><div class='add'>+#define MCP251XFD_REG_CRC_IF_MASK GENMASK(17, 16)</div><div class='add'>+#define MCP251XFD_REG_CRC_MASK GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define MCP251XFD_REG_ECCCON 0xe0c</div><div class='add'>+#define MCP251XFD_REG_ECCCON_PARITY_MASK GENMASK(14, 8)</div><div class='add'>+#define MCP251XFD_REG_ECCCON_DEDIE BIT(2)</div><div class='add'>+#define MCP251XFD_REG_ECCCON_SECIE BIT(1)</div><div class='add'>+#define MCP251XFD_REG_ECCCON_ECCEN BIT(0)</div><div class='add'>+</div><div class='add'>+#define MCP251XFD_REG_ECCSTAT 0xe10</div><div class='add'>+#define MCP251XFD_REG_ECCSTAT_ERRADDR_MASK GENMASK(27, 16)</div><div class='add'>+#define MCP251XFD_REG_ECCSTAT_IF_MASK GENMASK(2, 1)</div><div class='add'>+#define MCP251XFD_REG_ECCSTAT_DEDIF BIT(2)</div><div class='add'>+#define MCP251XFD_REG_ECCSTAT_SECIF BIT(1)</div><div class='add'>+</div><div class='add'>+#define MCP251XFD_REG_DEVID 0xe14	/* MCP2518FD only */</div><div class='add'>+#define MCP251XFD_REG_DEVID_ID_MASK GENMASK(7, 4)</div><div class='add'>+#define MCP251XFD_REG_DEVID_REV_MASK GENMASK(3, 0)</div><div class='add'>+</div><div class='add'>+/* SPI commands */</div><div class='add'>+#define MCP251XFD_SPI_INSTRUCTION_RESET 0x0000</div><div class='add'>+#define MCP251XFD_SPI_INSTRUCTION_WRITE 0x2000</div><div class='add'>+#define MCP251XFD_SPI_INSTRUCTION_READ 0x3000</div><div class='add'>+#define MCP251XFD_SPI_INSTRUCTION_WRITE_CRC 0xa000</div><div class='add'>+#define MCP251XFD_SPI_INSTRUCTION_READ_CRC 0xb000</div><div class='add'>+#define MCP251XFD_SPI_INSTRUCTION_WRITE_CRC_SAFE 0xc000</div><div class='add'>+#define MCP251XFD_SPI_ADDRESS_MASK GENMASK(11, 0)</div><div class='add'>+</div><div class='add'>+#define MCP251XFD_SYSCLOCK_HZ_MAX 40000000</div><div class='add'>+#define MCP251XFD_SYSCLOCK_HZ_MIN 1000000</div><div class='add'>+#define MCP251XFD_SPICLOCK_HZ_MAX 20000000</div><div class='add'>+#define MCP251XFD_TIMESTAMP_WORK_DELAY_SEC 45</div><div class='add'>+static_assert(MCP251XFD_TIMESTAMP_WORK_DELAY_SEC &lt;</div><div class='add'>+	      CYCLECOUNTER_MASK(32) / MCP251XFD_SYSCLOCK_HZ_MAX / 2);</div><div class='add'>+#define MCP251XFD_OSC_PLL_MULTIPLIER 10</div><div class='add'>+#define MCP251XFD_OSC_STAB_SLEEP_US (3 * USEC_PER_MSEC)</div><div class='add'>+#define MCP251XFD_OSC_STAB_TIMEOUT_US (10 * MCP251XFD_OSC_STAB_SLEEP_US)</div><div class='add'>+#define MCP251XFD_POLL_SLEEP_US (10)</div><div class='add'>+#define MCP251XFD_POLL_TIMEOUT_US (USEC_PER_MSEC)</div><div class='add'>+#define MCP251XFD_FRAME_LEN_MAX_BITS (736)</div><div class='add'>+</div><div class='add'>+/* Misc */</div><div class='add'>+#define MCP251XFD_NAPI_WEIGHT 32</div><div class='add'>+#define MCP251XFD_SOFTRESET_RETRIES_MAX 3</div><div class='add'>+#define MCP251XFD_READ_CRC_RETRIES_MAX 3</div><div class='add'>+#define MCP251XFD_ECC_CNT_MAX 2</div><div class='add'>+#define MCP251XFD_SANITIZE_SPI 1</div><div class='add'>+#define MCP251XFD_SANITIZE_CAN 1</div><div class='add'>+</div><div class='add'>+/* FIFO and Ring */</div><div class='add'>+#define MCP251XFD_FIFO_TEF_NUM 1U</div><div class='add'>+#define MCP251XFD_FIFO_RX_NUM 3U</div><div class='add'>+#define MCP251XFD_FIFO_TX_NUM 1U</div><div class='add'>+</div><div class='add'>+#define MCP251XFD_FIFO_DEPTH 32U</div><div class='add'>+</div><div class='add'>+#define MCP251XFD_RX_OBJ_NUM_MIN 16U</div><div class='add'>+#define MCP251XFD_RX_OBJ_NUM_MAX (MCP251XFD_FIFO_RX_NUM * MCP251XFD_FIFO_DEPTH)</div><div class='add'>+#define MCP251XFD_RX_FIFO_DEPTH_MIN 4U</div><div class='add'>+#define MCP251XFD_RX_FIFO_DEPTH_COALESCE_MIN 8U</div><div class='add'>+</div><div class='add'>+#define MCP251XFD_TX_OBJ_NUM_MIN 2U</div><div class='add'>+#define MCP251XFD_TX_OBJ_NUM_MAX 16U</div><div class='add'>+#define MCP251XFD_TX_OBJ_NUM_CAN_DEFAULT 8U</div><div class='add'>+#define MCP251XFD_TX_OBJ_NUM_CANFD_DEFAULT 4U</div><div class='add'>+#define MCP251XFD_TX_FIFO_DEPTH_MIN 2U</div><div class='add'>+#define MCP251XFD_TX_FIFO_DEPTH_COALESCE_MIN 2U</div><div class='add'>+</div><div class='add'>+static_assert(MCP251XFD_FIFO_TEF_NUM == 1U);</div><div class='add'>+static_assert(MCP251XFD_FIFO_TEF_NUM == MCP251XFD_FIFO_TX_NUM);</div><div class='add'>+static_assert(MCP251XFD_FIFO_RX_NUM &lt;= 4U);</div><div class='add'>+</div><div class='add'>+/* Silence TX MAB overflow warnings */</div><div class='add'>+#define MCP251XFD_QUIRK_MAB_NO_WARN BIT(0)</div><div class='add'>+/* Use CRC to access registers */</div><div class='add'>+#define MCP251XFD_QUIRK_CRC_REG BIT(1)</div><div class='add'>+/* Use CRC to access RX/TEF-RAM */</div><div class='add'>+#define MCP251XFD_QUIRK_CRC_RX BIT(2)</div><div class='add'>+/* Use CRC to access TX-RAM */</div><div class='add'>+#define MCP251XFD_QUIRK_CRC_TX BIT(3)</div><div class='add'>+/* Enable ECC for RAM */</div><div class='add'>+#define MCP251XFD_QUIRK_ECC BIT(4)</div><div class='add'>+/* Use Half Duplex SPI transfers */</div><div class='add'>+#define MCP251XFD_QUIRK_HALF_DUPLEX BIT(5)</div><div class='add'>+</div><div class='add'>+struct mcp251xfd_hw_tef_obj {</div><div class='add'>+	u32 id;</div><div class='add'>+	u32 flags;</div><div class='add'>+	u32 ts;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* The tx_obj_raw version is used in spi async, i.e. without</div><div class='add'>+ * regmap. We have to take care of endianness ourselves.</div><div class='add'>+ */</div><div class='add'>+struct __packed mcp251xfd_hw_tx_obj_raw {</div><div class='add'>+	__le32 id;</div><div class='add'>+	__le32 flags;</div><div class='add'>+	u8 data[sizeof_field(struct canfd_frame, data)];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mcp251xfd_hw_tx_obj_can {</div><div class='add'>+	u32 id;</div><div class='add'>+	u32 flags;</div><div class='add'>+	u8 data[sizeof_field(struct can_frame, data)];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mcp251xfd_hw_tx_obj_canfd {</div><div class='add'>+	u32 id;</div><div class='add'>+	u32 flags;</div><div class='add'>+	u8 data[sizeof_field(struct canfd_frame, data)];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mcp251xfd_hw_rx_obj_can {</div><div class='add'>+	u32 id;</div><div class='add'>+	u32 flags;</div><div class='add'>+	u32 ts;</div><div class='add'>+	u8 data[sizeof_field(struct can_frame, data)];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mcp251xfd_hw_rx_obj_canfd {</div><div class='add'>+	u32 id;</div><div class='add'>+	u32 flags;</div><div class='add'>+	u32 ts;</div><div class='add'>+	u8 data[sizeof_field(struct canfd_frame, data)];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed mcp251xfd_buf_cmd {</div><div class='add'>+	__be16 cmd;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed mcp251xfd_buf_cmd_crc {</div><div class='add'>+	__be16 cmd;</div><div class='add'>+	u8 len;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+union mcp251xfd_tx_obj_load_buf {</div><div class='add'>+	struct __packed {</div><div class='add'>+		struct mcp251xfd_buf_cmd cmd;</div><div class='add'>+		struct mcp251xfd_hw_tx_obj_raw hw_tx_obj;</div><div class='add'>+	} nocrc;</div><div class='add'>+	struct __packed {</div><div class='add'>+		struct mcp251xfd_buf_cmd_crc cmd;</div><div class='add'>+		struct mcp251xfd_hw_tx_obj_raw hw_tx_obj;</div><div class='add'>+		__be16 crc;</div><div class='add'>+	} crc;</div><div class='add'>+} ____cacheline_aligned;</div><div class='add'>+</div><div class='add'>+union mcp251xfd_write_reg_buf {</div><div class='add'>+	struct __packed {</div><div class='add'>+		struct mcp251xfd_buf_cmd cmd;</div><div class='add'>+		u8 data[4];</div><div class='add'>+	} nocrc;</div><div class='add'>+	struct __packed {</div><div class='add'>+		struct mcp251xfd_buf_cmd_crc cmd;</div><div class='add'>+		u8 data[4];</div><div class='add'>+		__be16 crc;</div><div class='add'>+	} crc;</div><div class='add'>+	struct __packed {</div><div class='add'>+		struct mcp251xfd_buf_cmd cmd;</div><div class='add'>+		u8 data[1];</div><div class='add'>+		__be16 crc;</div><div class='add'>+	} safe;</div><div class='add'>+} ____cacheline_aligned;</div><div class='add'>+</div><div class='add'>+struct mcp251xfd_tx_obj {</div><div class='add'>+	struct spi_message msg;</div><div class='add'>+	struct spi_transfer xfer[2];</div><div class='add'>+	union mcp251xfd_tx_obj_load_buf buf;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mcp251xfd_tef_ring {</div><div class='add'>+	unsigned int head;</div><div class='add'>+	unsigned int tail;</div><div class='add'>+</div><div class='add'>+	/* u8 obj_num equals tx_ring-&gt;obj_num */</div><div class='add'>+	/* u8 obj_size equals sizeof(struct mcp251xfd_hw_tef_obj) */</div><div class='add'>+	/* u8 obj_num_shift_to_u8 equals tx_ring-&gt;obj_num_shift_to_u8 */</div><div class='add'>+</div><div class='add'>+	union mcp251xfd_write_reg_buf irq_enable_buf;</div><div class='add'>+	struct spi_transfer irq_enable_xfer;</div><div class='add'>+	struct spi_message irq_enable_msg;</div><div class='add'>+</div><div class='add'>+	union mcp251xfd_write_reg_buf uinc_buf;</div><div class='add'>+	union mcp251xfd_write_reg_buf uinc_irq_disable_buf;</div><div class='add'>+	struct spi_transfer uinc_xfer[MCP251XFD_TX_OBJ_NUM_MAX];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mcp251xfd_tx_ring {</div><div class='add'>+	unsigned int head;</div><div class='add'>+	unsigned int tail;</div><div class='add'>+</div><div class='add'>+	u16 base;</div><div class='add'>+	u8 nr;</div><div class='add'>+	u8 fifo_nr;</div><div class='add'>+	u8 obj_num;</div><div class='add'>+	u8 obj_num_shift_to_u8;</div><div class='add'>+	u8 obj_size;</div><div class='add'>+</div><div class='add'>+	struct mcp251xfd_tx_obj obj[MCP251XFD_TX_OBJ_NUM_MAX];</div><div class='add'>+	union mcp251xfd_write_reg_buf rts_buf;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mcp251xfd_rx_ring {</div><div class='add'>+	unsigned int head;</div><div class='add'>+	unsigned int tail;</div><div class='add'>+</div><div class='add'>+	/* timestamp of the last valid received CAN frame */</div><div class='add'>+	u64 last_valid;</div><div class='add'>+</div><div class='add'>+	u16 base;</div><div class='add'>+	u8 nr;</div><div class='add'>+	u8 fifo_nr;</div><div class='add'>+	u8 obj_num;</div><div class='add'>+	u8 obj_num_shift_to_u8;</div><div class='add'>+	u8 obj_size;</div><div class='add'>+</div><div class='add'>+	union mcp251xfd_write_reg_buf irq_enable_buf;</div><div class='add'>+	struct spi_transfer irq_enable_xfer;</div><div class='add'>+	struct spi_message irq_enable_msg;</div><div class='add'>+</div><div class='add'>+	union mcp251xfd_write_reg_buf uinc_buf;</div><div class='add'>+	union mcp251xfd_write_reg_buf uinc_irq_disable_buf;</div><div class='add'>+	struct spi_transfer uinc_xfer[MCP251XFD_FIFO_DEPTH];</div><div class='add'>+	struct mcp251xfd_hw_rx_obj_canfd obj[];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed mcp251xfd_map_buf_nocrc {</div><div class='add'>+	struct mcp251xfd_buf_cmd cmd;</div><div class='add'>+	u8 data[256];</div><div class='add'>+} ____cacheline_aligned;</div><div class='add'>+</div><div class='add'>+struct __packed mcp251xfd_map_buf_crc {</div><div class='add'>+	struct mcp251xfd_buf_cmd_crc cmd;</div><div class='add'>+	u8 data[256 - 4];</div><div class='add'>+	__be16 crc;</div><div class='add'>+} ____cacheline_aligned;</div><div class='add'>+</div><div class='add'>+struct mcp251xfd_ecc {</div><div class='add'>+	u32 ecc_stat;</div><div class='add'>+	int cnt;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mcp251xfd_regs_status {</div><div class='add'>+	u32 intf;</div><div class='add'>+	u32 rxif;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum mcp251xfd_model {</div><div class='add'>+	MCP251XFD_MODEL_MCP2517FD = 0x2517,</div><div class='add'>+	MCP251XFD_MODEL_MCP2518FD = 0x2518,</div><div class='add'>+	MCP251XFD_MODEL_MCP251863 = 0x251863,</div><div class='add'>+	MCP251XFD_MODEL_MCP251XFD = 0xffffffff,	/* autodetect model */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mcp251xfd_devtype_data {</div><div class='add'>+	enum mcp251xfd_model model;</div><div class='add'>+	u32 quirks;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum mcp251xfd_flags {</div><div class='add'>+	MCP251XFD_FLAGS_DOWN,</div><div class='add'>+	MCP251XFD_FLAGS_FD_MODE,</div><div class='add'>+</div><div class='add'>+	__MCP251XFD_FLAGS_SIZE__</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mcp251xfd_priv {</div><div class='add'>+	struct can_priv can;</div><div class='add'>+	struct can_rx_offload offload;</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+</div><div class='add'>+	struct regmap *map_reg;			/* register access */</div><div class='add'>+	struct regmap *map_rx;			/* RX/TEF RAM access */</div><div class='add'>+</div><div class='add'>+	struct regmap *map_nocrc;</div><div class='add'>+	struct mcp251xfd_map_buf_nocrc *map_buf_nocrc_rx;</div><div class='add'>+	struct mcp251xfd_map_buf_nocrc *map_buf_nocrc_tx;</div><div class='add'>+</div><div class='add'>+	struct regmap *map_crc;</div><div class='add'>+	struct mcp251xfd_map_buf_crc *map_buf_crc_rx;</div><div class='add'>+	struct mcp251xfd_map_buf_crc *map_buf_crc_tx;</div><div class='add'>+</div><div class='add'>+	struct spi_device *spi;</div><div class='add'>+	u32 spi_max_speed_hz_orig;</div><div class='add'>+	u32 spi_max_speed_hz_fast;</div><div class='add'>+	u32 spi_max_speed_hz_slow;</div><div class='add'>+</div><div class='add'>+	struct mcp251xfd_tef_ring tef[MCP251XFD_FIFO_TEF_NUM];</div><div class='add'>+	struct mcp251xfd_rx_ring *rx[MCP251XFD_FIFO_RX_NUM];</div><div class='add'>+	struct mcp251xfd_tx_ring tx[MCP251XFD_FIFO_TX_NUM];</div><div class='add'>+</div><div class='add'>+	struct workqueue_struct *wq;</div><div class='add'>+	struct work_struct tx_work;</div><div class='add'>+	struct mcp251xfd_tx_obj *tx_work_obj;</div><div class='add'>+</div><div class='add'>+	DECLARE_BITMAP(flags, __MCP251XFD_FLAGS_SIZE__);</div><div class='add'>+</div><div class='add'>+	u8 rx_ring_num;</div><div class='add'>+	u8 rx_obj_num;</div><div class='add'>+	u8 rx_obj_num_coalesce_irq;</div><div class='add'>+	u8 tx_obj_num_coalesce_irq;</div><div class='add'>+</div><div class='add'>+	u32 rx_coalesce_usecs_irq;</div><div class='add'>+	u32 tx_coalesce_usecs_irq;</div><div class='add'>+	struct hrtimer rx_irq_timer;</div><div class='add'>+	struct hrtimer tx_irq_timer;</div><div class='add'>+</div><div class='add'>+	struct mcp251xfd_ecc ecc;</div><div class='add'>+	struct mcp251xfd_regs_status regs_status;</div><div class='add'>+</div><div class='add'>+	struct cyclecounter cc;</div><div class='add'>+	struct timecounter tc;</div><div class='add'>+	struct delayed_work timestamp;</div><div class='add'>+</div><div class='add'>+	struct gpio_desc *rx_int;</div><div class='add'>+	struct clk *clk;</div><div class='add'>+	bool pll_enable;</div><div class='add'>+	struct regulator *reg_vdd;</div><div class='add'>+	struct regulator *reg_xceiver;</div><div class='add'>+</div><div class='add'>+	struct mcp251xfd_devtype_data devtype_data;</div><div class='add'>+	struct can_berr_counter bec;</div><div class='add'>+	struct gpio_chip gc;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define MCP251XFD_IS(_model) \</div><div class='add'>+static inline bool \</div><div class='add'>+mcp251xfd_is_##_model(const struct mcp251xfd_priv *priv) \</div><div class='add'>+{ \</div><div class='add'>+	return priv-&gt;devtype_data.model == MCP251XFD_MODEL_MCP##_model; \</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+MCP251XFD_IS(2517FD);</div><div class='add'>+MCP251XFD_IS(2518FD);</div><div class='add'>+MCP251XFD_IS(251863);</div><div class='add'>+MCP251XFD_IS(251XFD);</div><div class='add'>+</div><div class='add'>+static inline bool mcp251xfd_is_fd_mode(const struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	/* listen-only mode works like FD mode */</div><div class='add'>+	return priv-&gt;can.ctrlmode &amp; (CAN_CTRLMODE_LISTENONLY | CAN_CTRLMODE_FD);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u8 mcp251xfd_first_byte_set(u32 mask)</div><div class='add'>+{</div><div class='add'>+	return (mask &amp; 0x0000ffff) ?</div><div class='add'>+		((mask &amp; 0x000000ff) ? 0 : 1) :</div><div class='add'>+		((mask &amp; 0x00ff0000) ? 2 : 3);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u8 mcp251xfd_last_byte_set(u32 mask)</div><div class='add'>+{</div><div class='add'>+	return (mask &amp; 0xffff0000) ?</div><div class='add'>+		((mask &amp; 0xff000000) ? 3 : 2) :</div><div class='add'>+		((mask &amp; 0x0000ff00) ? 1 : 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline __be16 mcp251xfd_cmd_reset(void)</div><div class='add'>+{</div><div class='add'>+	return cpu_to_be16(MCP251XFD_SPI_INSTRUCTION_RESET);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+mcp251xfd_spi_cmd_read_nocrc(struct mcp251xfd_buf_cmd *cmd, u16 addr)</div><div class='add'>+{</div><div class='add'>+	cmd-&gt;cmd = cpu_to_be16(MCP251XFD_SPI_INSTRUCTION_READ | addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+mcp251xfd_spi_cmd_write_nocrc(struct mcp251xfd_buf_cmd *cmd, u16 addr)</div><div class='add'>+{</div><div class='add'>+	cmd-&gt;cmd = cpu_to_be16(MCP251XFD_SPI_INSTRUCTION_WRITE | addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool mcp251xfd_reg_in_ram(unsigned int reg)</div><div class='add'>+{</div><div class='add'>+	static const struct regmap_range range =</div><div class='add'>+		regmap_reg_range(MCP251XFD_RAM_START,</div><div class='add'>+				 MCP251XFD_RAM_START + MCP251XFD_RAM_SIZE - 4);</div><div class='add'>+</div><div class='add'>+	return regmap_reg_in_range(reg, &amp;range);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+__mcp251xfd_spi_cmd_crc_set_len(struct mcp251xfd_buf_cmd_crc *cmd,</div><div class='add'>+				u16 len, bool in_ram)</div><div class='add'>+{</div><div class='add'>+	/* Number of u32 for RAM access, number of u8 otherwise. */</div><div class='add'>+	if (in_ram)</div><div class='add'>+		cmd-&gt;len = len &gt;&gt; 2;</div><div class='add'>+	else</div><div class='add'>+		cmd-&gt;len = len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+mcp251xfd_spi_cmd_crc_set_len_in_ram(struct mcp251xfd_buf_cmd_crc *cmd, u16 len)</div><div class='add'>+{</div><div class='add'>+	__mcp251xfd_spi_cmd_crc_set_len(cmd, len, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+mcp251xfd_spi_cmd_crc_set_len_in_reg(struct mcp251xfd_buf_cmd_crc *cmd, u16 len)</div><div class='add'>+{</div><div class='add'>+	__mcp251xfd_spi_cmd_crc_set_len(cmd, len, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+mcp251xfd_spi_cmd_read_crc_set_addr(struct mcp251xfd_buf_cmd_crc *cmd, u16 addr)</div><div class='add'>+{</div><div class='add'>+	cmd-&gt;cmd = cpu_to_be16(MCP251XFD_SPI_INSTRUCTION_READ_CRC | addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+mcp251xfd_spi_cmd_read_crc(struct mcp251xfd_buf_cmd_crc *cmd,</div><div class='add'>+			   u16 addr, u16 len)</div><div class='add'>+{</div><div class='add'>+	mcp251xfd_spi_cmd_read_crc_set_addr(cmd, addr);</div><div class='add'>+	__mcp251xfd_spi_cmd_crc_set_len(cmd, len, mcp251xfd_reg_in_ram(addr));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+mcp251xfd_spi_cmd_write_crc_set_addr(struct mcp251xfd_buf_cmd_crc *cmd,</div><div class='add'>+				     u16 addr)</div><div class='add'>+{</div><div class='add'>+	cmd-&gt;cmd = cpu_to_be16(MCP251XFD_SPI_INSTRUCTION_WRITE_CRC | addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+mcp251xfd_spi_cmd_write_safe_set_addr(struct mcp251xfd_buf_cmd *cmd,</div><div class='add'>+				     u16 addr)</div><div class='add'>+{</div><div class='add'>+	cmd-&gt;cmd = cpu_to_be16(MCP251XFD_SPI_INSTRUCTION_WRITE_CRC_SAFE | addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void</div><div class='add'>+mcp251xfd_spi_cmd_write_crc(struct mcp251xfd_buf_cmd_crc *cmd,</div><div class='add'>+			    u16 addr, u16 len)</div><div class='add'>+{</div><div class='add'>+	mcp251xfd_spi_cmd_write_crc_set_addr(cmd, addr);</div><div class='add'>+	__mcp251xfd_spi_cmd_crc_set_len(cmd, len, mcp251xfd_reg_in_ram(addr));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u8 *</div><div class='add'>+mcp251xfd_spi_cmd_write(const struct mcp251xfd_priv *priv,</div><div class='add'>+			union mcp251xfd_write_reg_buf *write_reg_buf,</div><div class='add'>+			u16 addr, u8 len)</div><div class='add'>+{</div><div class='add'>+	u8 *data;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;devtype_data.quirks &amp; MCP251XFD_QUIRK_CRC_REG) {</div><div class='add'>+		if (len == 1) {</div><div class='add'>+			mcp251xfd_spi_cmd_write_safe_set_addr(&amp;write_reg_buf-&gt;safe.cmd,</div><div class='add'>+							     addr);</div><div class='add'>+			data = write_reg_buf-&gt;safe.data;</div><div class='add'>+		} else {</div><div class='add'>+			mcp251xfd_spi_cmd_write_crc_set_addr(&amp;write_reg_buf-&gt;crc.cmd,</div><div class='add'>+							     addr);</div><div class='add'>+			data = write_reg_buf-&gt;crc.data;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		mcp251xfd_spi_cmd_write_nocrc(&amp;write_reg_buf-&gt;nocrc.cmd,</div><div class='add'>+					      addr);</div><div class='add'>+		data = write_reg_buf-&gt;nocrc.data;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return data;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int mcp251xfd_get_timestamp_raw(const struct mcp251xfd_priv *priv,</div><div class='add'>+					      u32 *ts_raw)</div><div class='add'>+{</div><div class='add'>+	return regmap_read(priv-&gt;map_reg, MCP251XFD_REG_TBC, ts_raw);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void mcp251xfd_skb_set_timestamp(struct sk_buff *skb, u64 ns)</div><div class='add'>+{</div><div class='add'>+	struct skb_shared_hwtstamps *hwtstamps = skb_hwtstamps(skb);</div><div class='add'>+</div><div class='add'>+	hwtstamps-&gt;hwtstamp = ns_to_ktime(ns);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline</div><div class='add'>+void mcp251xfd_skb_set_timestamp_raw(const struct mcp251xfd_priv *priv,</div><div class='add'>+				     struct sk_buff *skb, u32 ts_raw)</div><div class='add'>+{</div><div class='add'>+	u64 ns;</div><div class='add'>+</div><div class='add'>+	ns = timecounter_cyc2time(&amp;priv-&gt;tc, ts_raw);</div><div class='add'>+	mcp251xfd_skb_set_timestamp(skb, ns);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u16 mcp251xfd_get_tef_obj_addr(u8 n)</div><div class='add'>+{</div><div class='add'>+	return MCP251XFD_RAM_START +</div><div class='add'>+		sizeof(struct mcp251xfd_hw_tef_obj) * n;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u16</div><div class='add'>+mcp251xfd_get_tx_obj_addr(const struct mcp251xfd_tx_ring *ring, u8 n)</div><div class='add'>+{</div><div class='add'>+	return ring-&gt;base + ring-&gt;obj_size * n;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u16</div><div class='add'>+mcp251xfd_get_rx_obj_addr(const struct mcp251xfd_rx_ring *ring, u8 n)</div><div class='add'>+{</div><div class='add'>+	return ring-&gt;base + ring-&gt;obj_size * n;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int</div><div class='add'>+mcp251xfd_tx_tail_get_from_chip(const struct mcp251xfd_priv *priv,</div><div class='add'>+				u8 *tx_tail)</div><div class='add'>+{</div><div class='add'>+	u32 fifo_sta;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = regmap_read(priv-&gt;map_reg,</div><div class='add'>+			  MCP251XFD_REG_FIFOSTA(priv-&gt;tx-&gt;fifo_nr),</div><div class='add'>+			  &amp;fifo_sta);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	*tx_tail = FIELD_GET(MCP251XFD_REG_FIFOSTA_FIFOCI_MASK, fifo_sta);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u8 mcp251xfd_get_tef_head(const struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return priv-&gt;tef-&gt;head &amp; (priv-&gt;tx-&gt;obj_num - 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u8 mcp251xfd_get_tef_tail(const struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return priv-&gt;tef-&gt;tail &amp; (priv-&gt;tx-&gt;obj_num - 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u8 mcp251xfd_get_tef_linear_len(const struct mcp251xfd_priv *priv, u8 len)</div><div class='add'>+{</div><div class='add'>+	return min_t(u8, len, priv-&gt;tx-&gt;obj_num - mcp251xfd_get_tef_tail(priv));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u8 mcp251xfd_get_tx_head(const struct mcp251xfd_tx_ring *ring)</div><div class='add'>+{</div><div class='add'>+	return ring-&gt;head &amp; (ring-&gt;obj_num - 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u8 mcp251xfd_get_tx_tail(const struct mcp251xfd_tx_ring *ring)</div><div class='add'>+{</div><div class='add'>+	return ring-&gt;tail &amp; (ring-&gt;obj_num - 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u8 mcp251xfd_get_tx_free(const struct mcp251xfd_tx_ring *ring)</div><div class='add'>+{</div><div class='add'>+	return ring-&gt;obj_num - (ring-&gt;head - ring-&gt;tail);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int</div><div class='add'>+mcp251xfd_get_tx_nr_by_addr(const struct mcp251xfd_tx_ring *tx_ring, u8 *nr,</div><div class='add'>+			    u16 addr)</div><div class='add'>+{</div><div class='add'>+	if (addr &lt; mcp251xfd_get_tx_obj_addr(tx_ring, 0) ||</div><div class='add'>+	    addr &gt;= mcp251xfd_get_tx_obj_addr(tx_ring, tx_ring-&gt;obj_num))</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	*nr = (addr - mcp251xfd_get_tx_obj_addr(tx_ring, 0)) /</div><div class='add'>+		tx_ring-&gt;obj_size;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u8 mcp251xfd_get_rx_head(const struct mcp251xfd_rx_ring *ring)</div><div class='add'>+{</div><div class='add'>+	return ring-&gt;head &amp; (ring-&gt;obj_num - 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u8 mcp251xfd_get_rx_tail(const struct mcp251xfd_rx_ring *ring)</div><div class='add'>+{</div><div class='add'>+	return ring-&gt;tail &amp; (ring-&gt;obj_num - 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u8</div><div class='add'>+mcp251xfd_get_rx_linear_len(const struct mcp251xfd_rx_ring *ring, u8 len)</div><div class='add'>+{</div><div class='add'>+	return min_t(u8, len, ring-&gt;obj_num - mcp251xfd_get_rx_tail(ring));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define mcp251xfd_for_each_tx_obj(ring, _obj, n) \</div><div class='add'>+	for ((n) = 0, (_obj) = &amp;(ring)-&gt;obj[(n)]; \</div><div class='add'>+	     (n) &lt; (ring)-&gt;obj_num; \</div><div class='add'>+	     (n)++, (_obj) = &amp;(ring)-&gt;obj[(n)])</div><div class='add'>+</div><div class='add'>+#define mcp251xfd_for_each_rx_ring(priv, ring, n) \</div><div class='add'>+	for ((n) = 0, (ring) = *((priv)-&gt;rx + (n)); \</div><div class='add'>+	     (n) &lt; (priv)-&gt;rx_ring_num; \</div><div class='add'>+	     (n)++, (ring) = *((priv)-&gt;rx + (n)))</div><div class='add'>+</div><div class='add'>+int mcp251xfd_chip_fifo_init(const struct mcp251xfd_priv *priv);</div><div class='add'>+u16 mcp251xfd_crc16_compute2(const void *cmd, size_t cmd_size,</div><div class='add'>+			     const void *data, size_t data_size);</div><div class='add'>+u16 mcp251xfd_crc16_compute(const void *data, size_t data_size);</div><div class='add'>+void mcp251xfd_ethtool_init(struct mcp251xfd_priv *priv);</div><div class='add'>+int mcp251xfd_regmap_init(struct mcp251xfd_priv *priv);</div><div class='add'>+extern const struct can_ram_config mcp251xfd_ram_config;</div><div class='add'>+int mcp251xfd_ring_init(struct mcp251xfd_priv *priv);</div><div class='add'>+void mcp251xfd_ring_free(struct mcp251xfd_priv *priv);</div><div class='add'>+int mcp251xfd_ring_alloc(struct mcp251xfd_priv *priv);</div><div class='add'>+int mcp251xfd_handle_rxif(struct mcp251xfd_priv *priv);</div><div class='add'>+int mcp251xfd_handle_tefif(struct mcp251xfd_priv *priv);</div><div class='add'>+void mcp251xfd_timestamp_init(struct mcp251xfd_priv *priv);</div><div class='add'>+void mcp251xfd_timestamp_start(struct mcp251xfd_priv *priv);</div><div class='add'>+void mcp251xfd_timestamp_stop(struct mcp251xfd_priv *priv);</div><div class='add'>+</div><div class='add'>+void mcp251xfd_tx_obj_write_sync(struct work_struct *work);</div><div class='add'>+netdev_tx_t mcp251xfd_start_xmit(struct sk_buff *skb,</div><div class='add'>+				 struct net_device *ndev);</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_DEV_COREDUMP)</div><div class='add'>+void mcp251xfd_dump(const struct mcp251xfd_priv *priv);</div><div class='add'>+#else</div><div class='add'>+static inline void mcp251xfd_dump(const struct mcp251xfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/can/sun4i_can.c b/drivers/net/can/sun4i_can.c<br/>new file mode 100644<br/>index 000000000000..af52285d5a4e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/sun4i_can.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/sun4i_can.c</a></div><div class='hunk'>@@ -0,0 +1,929 @@</div><div class='add'>+/*</div><div class='add'>+ * sun4i_can.c - CAN bus controller driver for Allwinner SUN4I&amp;SUN7I based SoCs</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2013 Peter Chen</div><div class='add'>+ * Copyright (C) 2015 Gerhard Bertelsmann</div><div class='add'>+ * All rights reserved.</div><div class='add'>+ *</div><div class='add'>+ * Parts of this software are based on (derived from) the SJA1000 code by:</div><div class='add'>+ *   Copyright (C) 2014 Oliver Hartkopp &lt;oliver.hartkopp@volkswagen.de&gt;</div><div class='add'>+ *   Copyright (C) 2007 Wolfgang Grandegger &lt;wg@grandegger.com&gt;</div><div class='add'>+ *   Copyright (C) 2002-2007 Volkswagen Group Electronic Research</div><div class='add'>+ *   Copyright (C) 2003 Matthias Brukner, Trajet Gmbh, Rebenring 33,</div><div class='add'>+ *   38106 Braunschweig, GERMANY</div><div class='add'>+ *</div><div class='add'>+ * Redistribution and use in source and binary forms, with or without</div><div class='add'>+ * modification, are permitted provided that the following conditions</div><div class='add'>+ * are met:</div><div class='add'>+ * 1. Redistributions of source code must retain the above copyright</div><div class='add'>+ *    notice, this list of conditions and the following disclaimer.</div><div class='add'>+ * 2. Redistributions in binary form must reproduce the above copyright</div><div class='add'>+ *    notice, this list of conditions and the following disclaimer in the</div><div class='add'>+ *    documentation and/or other materials provided with the distribution.</div><div class='add'>+ * 3. Neither the name of Volkswagen nor the names of its contributors</div><div class='add'>+ *    may be used to endorse or promote products derived from this software</div><div class='add'>+ *    without specific prior written permission.</div><div class='add'>+ *</div><div class='add'>+ * Alternatively, provided that this notice is retained in full, this</div><div class='add'>+ * software may be distributed under the terms of the GNU General</div><div class='add'>+ * Public License ("GPL") version 2, in which case the provisions of the</div><div class='add'>+ * GPL apply INSTEAD OF those given above.</div><div class='add'>+ *</div><div class='add'>+ * The provided data structures and external interfaces from this code</div><div class='add'>+ * are not restricted to be used by modules with a GPL compatible license.</div><div class='add'>+ *</div><div class='add'>+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS</div><div class='add'>+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT</div><div class='add'>+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR</div><div class='add'>+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT</div><div class='add'>+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,</div><div class='add'>+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT</div><div class='add'>+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,</div><div class='add'>+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY</div><div class='add'>+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='add'>+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE</div><div class='add'>+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH</div><div class='add'>+ * DAMAGE.</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/can.h&gt;</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/can/error.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/reset.h&gt;</div><div class='add'>+</div><div class='add'>+#define DRV_NAME "sun4i_can"</div><div class='add'>+</div><div class='add'>+/* Registers address (physical base address 0x01C2BC00) */</div><div class='add'>+#define SUN4I_REG_MSEL_ADDR	0x0000	/* CAN Mode Select */</div><div class='add'>+#define SUN4I_REG_CMD_ADDR	0x0004	/* CAN Command */</div><div class='add'>+#define SUN4I_REG_STA_ADDR	0x0008	/* CAN Status */</div><div class='add'>+#define SUN4I_REG_INT_ADDR	0x000c	/* CAN Interrupt Flag */</div><div class='add'>+#define SUN4I_REG_INTEN_ADDR	0x0010	/* CAN Interrupt Enable */</div><div class='add'>+#define SUN4I_REG_BTIME_ADDR	0x0014	/* CAN Bus Timing 0 */</div><div class='add'>+#define SUN4I_REG_TEWL_ADDR	0x0018	/* CAN Tx Error Warning Limit */</div><div class='add'>+#define SUN4I_REG_ERRC_ADDR	0x001c	/* CAN Error Counter */</div><div class='add'>+#define SUN4I_REG_RMCNT_ADDR	0x0020	/* CAN Receive Message Counter */</div><div class='add'>+#define SUN4I_REG_RBUFSA_ADDR	0x0024	/* CAN Receive Buffer Start Address */</div><div class='add'>+#define SUN4I_REG_BUF0_ADDR	0x0040	/* CAN Tx/Rx Buffer 0 */</div><div class='add'>+#define SUN4I_REG_BUF1_ADDR	0x0044	/* CAN Tx/Rx Buffer 1 */</div><div class='add'>+#define SUN4I_REG_BUF2_ADDR	0x0048	/* CAN Tx/Rx Buffer 2 */</div><div class='add'>+#define SUN4I_REG_BUF3_ADDR	0x004c	/* CAN Tx/Rx Buffer 3 */</div><div class='add'>+#define SUN4I_REG_BUF4_ADDR	0x0050	/* CAN Tx/Rx Buffer 4 */</div><div class='add'>+#define SUN4I_REG_BUF5_ADDR	0x0054	/* CAN Tx/Rx Buffer 5 */</div><div class='add'>+#define SUN4I_REG_BUF6_ADDR	0x0058	/* CAN Tx/Rx Buffer 6 */</div><div class='add'>+#define SUN4I_REG_BUF7_ADDR	0x005c	/* CAN Tx/Rx Buffer 7 */</div><div class='add'>+#define SUN4I_REG_BUF8_ADDR	0x0060	/* CAN Tx/Rx Buffer 8 */</div><div class='add'>+#define SUN4I_REG_BUF9_ADDR	0x0064	/* CAN Tx/Rx Buffer 9 */</div><div class='add'>+#define SUN4I_REG_BUF10_ADDR	0x0068	/* CAN Tx/Rx Buffer 10 */</div><div class='add'>+#define SUN4I_REG_BUF11_ADDR	0x006c	/* CAN Tx/Rx Buffer 11 */</div><div class='add'>+#define SUN4I_REG_BUF12_ADDR	0x0070	/* CAN Tx/Rx Buffer 12 */</div><div class='add'>+#define SUN4I_REG_ACPC_ADDR	0x0040	/* CAN Acceptance Code 0 */</div><div class='add'>+#define SUN4I_REG_ACPM_ADDR	0x0044	/* CAN Acceptance Mask 0 */</div><div class='add'>+#define SUN4I_REG_ACPC_ADDR_D1	0x0028	/* CAN Acceptance Code 0 on the D1 */</div><div class='add'>+#define SUN4I_REG_ACPM_ADDR_D1	0x002C	/* CAN Acceptance Mask 0 on the D1 */</div><div class='add'>+#define SUN4I_REG_RBUF_RBACK_START_ADDR	0x0180	/* CAN transmit buffer start */</div><div class='add'>+#define SUN4I_REG_RBUF_RBACK_END_ADDR	0x01b0	/* CAN transmit buffer end */</div><div class='add'>+</div><div class='add'>+/* Controller Register Description */</div><div class='add'>+</div><div class='add'>+/* mode select register (r/w)</div><div class='add'>+ * offset:0x0000 default:0x0000_0001</div><div class='add'>+ */</div><div class='add'>+#define SUN4I_MSEL_SLEEP_MODE		(0x01 &lt;&lt; 4) /* write in reset mode */</div><div class='add'>+#define SUN4I_MSEL_WAKE_UP		(0x00 &lt;&lt; 4)</div><div class='add'>+#define SUN4I_MSEL_SINGLE_FILTER	(0x01 &lt;&lt; 3) /* write in reset mode */</div><div class='add'>+#define SUN4I_MSEL_DUAL_FILTERS		(0x00 &lt;&lt; 3)</div><div class='add'>+#define SUN4I_MSEL_LOOPBACK_MODE	BIT(2)</div><div class='add'>+#define SUN4I_MSEL_LISTEN_ONLY_MODE	BIT(1)</div><div class='add'>+#define SUN4I_MSEL_RESET_MODE		BIT(0)</div><div class='add'>+</div><div class='add'>+/* command register (w)</div><div class='add'>+ * offset:0x0004 default:0x0000_0000</div><div class='add'>+ */</div><div class='add'>+#define SUN4I_CMD_BUS_OFF_REQ	BIT(5)</div><div class='add'>+#define SUN4I_CMD_SELF_RCV_REQ	BIT(4)</div><div class='add'>+#define SUN4I_CMD_CLEAR_OR_FLAG	BIT(3)</div><div class='add'>+#define SUN4I_CMD_RELEASE_RBUF	BIT(2)</div><div class='add'>+#define SUN4I_CMD_ABORT_REQ	BIT(1)</div><div class='add'>+#define SUN4I_CMD_TRANS_REQ	BIT(0)</div><div class='add'>+</div><div class='add'>+/* status register (r)</div><div class='add'>+ * offset:0x0008 default:0x0000_003c</div><div class='add'>+ */</div><div class='add'>+#define SUN4I_STA_BIT_ERR	(0x00 &lt;&lt; 22)</div><div class='add'>+#define SUN4I_STA_FORM_ERR	(0x01 &lt;&lt; 22)</div><div class='add'>+#define SUN4I_STA_STUFF_ERR	(0x02 &lt;&lt; 22)</div><div class='add'>+#define SUN4I_STA_OTHER_ERR	(0x03 &lt;&lt; 22)</div><div class='add'>+#define SUN4I_STA_MASK_ERR	(0x03 &lt;&lt; 22)</div><div class='add'>+#define SUN4I_STA_ERR_DIR	BIT(21)</div><div class='add'>+#define SUN4I_STA_ERR_SEG_CODE	(0x1f &lt;&lt; 16)</div><div class='add'>+#define SUN4I_STA_START		(0x03 &lt;&lt; 16)</div><div class='add'>+#define SUN4I_STA_ID28_21	(0x02 &lt;&lt; 16)</div><div class='add'>+#define SUN4I_STA_ID20_18	(0x06 &lt;&lt; 16)</div><div class='add'>+#define SUN4I_STA_SRTR		(0x04 &lt;&lt; 16)</div><div class='add'>+#define SUN4I_STA_IDE		(0x05 &lt;&lt; 16)</div><div class='add'>+#define SUN4I_STA_ID17_13	(0x07 &lt;&lt; 16)</div><div class='add'>+#define SUN4I_STA_ID12_5	(0x0f &lt;&lt; 16)</div><div class='add'>+#define SUN4I_STA_ID4_0		(0x0e &lt;&lt; 16)</div><div class='add'>+#define SUN4I_STA_RTR		(0x0c &lt;&lt; 16)</div><div class='add'>+#define SUN4I_STA_RB1		(0x0d &lt;&lt; 16)</div><div class='add'>+#define SUN4I_STA_RB0		(0x09 &lt;&lt; 16)</div><div class='add'>+#define SUN4I_STA_DLEN		(0x0b &lt;&lt; 16)</div><div class='add'>+#define SUN4I_STA_DATA_FIELD	(0x0a &lt;&lt; 16)</div><div class='add'>+#define SUN4I_STA_CRC_SEQUENCE	(0x08 &lt;&lt; 16)</div><div class='add'>+#define SUN4I_STA_CRC_DELIMITER	(0x18 &lt;&lt; 16)</div><div class='add'>+#define SUN4I_STA_ACK		(0x19 &lt;&lt; 16)</div><div class='add'>+#define SUN4I_STA_ACK_DELIMITER	(0x1b &lt;&lt; 16)</div><div class='add'>+#define SUN4I_STA_END		(0x1a &lt;&lt; 16)</div><div class='add'>+#define SUN4I_STA_INTERMISSION	(0x12 &lt;&lt; 16)</div><div class='add'>+#define SUN4I_STA_ACTIVE_ERROR	(0x11 &lt;&lt; 16)</div><div class='add'>+#define SUN4I_STA_PASSIVE_ERROR	(0x16 &lt;&lt; 16)</div><div class='add'>+#define SUN4I_STA_TOLERATE_DOMINANT_BITS	(0x13 &lt;&lt; 16)</div><div class='add'>+#define SUN4I_STA_ERROR_DELIMITER	(0x17 &lt;&lt; 16)</div><div class='add'>+#define SUN4I_STA_OVERLOAD	(0x1c &lt;&lt; 16)</div><div class='add'>+#define SUN4I_STA_BUS_OFF	BIT(7)</div><div class='add'>+#define SUN4I_STA_ERR_STA	BIT(6)</div><div class='add'>+#define SUN4I_STA_TRANS_BUSY	BIT(5)</div><div class='add'>+#define SUN4I_STA_RCV_BUSY	BIT(4)</div><div class='add'>+#define SUN4I_STA_TRANS_OVER	BIT(3)</div><div class='add'>+#define SUN4I_STA_TBUF_RDY	BIT(2)</div><div class='add'>+#define SUN4I_STA_DATA_ORUN	BIT(1)</div><div class='add'>+#define SUN4I_STA_RBUF_RDY	BIT(0)</div><div class='add'>+</div><div class='add'>+/* interrupt register (r)</div><div class='add'>+ * offset:0x000c default:0x0000_0000</div><div class='add'>+ */</div><div class='add'>+#define SUN4I_INT_BUS_ERR	BIT(7)</div><div class='add'>+#define SUN4I_INT_ARB_LOST	BIT(6)</div><div class='add'>+#define SUN4I_INT_ERR_PASSIVE	BIT(5)</div><div class='add'>+#define SUN4I_INT_WAKEUP	BIT(4)</div><div class='add'>+#define SUN4I_INT_DATA_OR	BIT(3)</div><div class='add'>+#define SUN4I_INT_ERR_WRN	BIT(2)</div><div class='add'>+#define SUN4I_INT_TBUF_VLD	BIT(1)</div><div class='add'>+#define SUN4I_INT_RBUF_VLD	BIT(0)</div><div class='add'>+</div><div class='add'>+/* interrupt enable register (r/w)</div><div class='add'>+ * offset:0x0010 default:0x0000_0000</div><div class='add'>+ */</div><div class='add'>+#define SUN4I_INTEN_BERR	BIT(7)</div><div class='add'>+#define SUN4I_INTEN_ARB_LOST	BIT(6)</div><div class='add'>+#define SUN4I_INTEN_ERR_PASSIVE	BIT(5)</div><div class='add'>+#define SUN4I_INTEN_WAKEUP	BIT(4)</div><div class='add'>+#define SUN4I_INTEN_OR		BIT(3)</div><div class='add'>+#define SUN4I_INTEN_ERR_WRN	BIT(2)</div><div class='add'>+#define SUN4I_INTEN_TX		BIT(1)</div><div class='add'>+#define SUN4I_INTEN_RX		BIT(0)</div><div class='add'>+</div><div class='add'>+/* error code */</div><div class='add'>+#define SUN4I_ERR_INRCV		(0x1 &lt;&lt; 5)</div><div class='add'>+#define SUN4I_ERR_INTRANS	(0x0 &lt;&lt; 5)</div><div class='add'>+</div><div class='add'>+/* filter mode */</div><div class='add'>+#define SUN4I_FILTER_CLOSE	0</div><div class='add'>+#define SUN4I_SINGLE_FLTER_MODE	1</div><div class='add'>+#define SUN4I_DUAL_FILTER_MODE	2</div><div class='add'>+</div><div class='add'>+/* message buffer flags */</div><div class='add'>+#define SUN4I_MSG_EFF_FLAG	BIT(7)</div><div class='add'>+#define SUN4I_MSG_RTR_FLAG	BIT(6)</div><div class='add'>+</div><div class='add'>+/* max. number of interrupts handled in ISR */</div><div class='add'>+#define SUN4I_CAN_MAX_IRQ	20</div><div class='add'>+#define SUN4I_MODE_MAX_RETRIES	100</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct sun4ican_quirks - Differences between SoC variants.</div><div class='add'>+ *</div><div class='add'>+ * @has_reset: SoC needs reset deasserted.</div><div class='add'>+ * @acp_offset: Offset of ACPC and ACPM registers</div><div class='add'>+ */</div><div class='add'>+struct sun4ican_quirks {</div><div class='add'>+	bool has_reset;</div><div class='add'>+	int acp_offset;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sun4ican_priv {</div><div class='add'>+	struct can_priv can;</div><div class='add'>+	void __iomem *base;</div><div class='add'>+	struct clk *clk;</div><div class='add'>+	struct reset_control *reset;</div><div class='add'>+	spinlock_t cmdreg_lock;	/* lock for concurrent cmd register writes */</div><div class='add'>+	int acp_offset;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const sun4ican_bittiming_const = {</div><div class='add'>+	.name = DRV_NAME,</div><div class='add'>+	.tseg1_min = 1,</div><div class='add'>+	.tseg1_max = 16,</div><div class='add'>+	.tseg2_min = 1,</div><div class='add'>+	.tseg2_max = 8,</div><div class='add'>+	.sjw_max = 4,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 64,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void sun4i_can_write_cmdreg(struct sun4ican_priv *priv, u8 val)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;cmdreg_lock, flags);</div><div class='add'>+	writel(val, priv-&gt;base + SUN4I_REG_CMD_ADDR);</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;cmdreg_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int set_normal_mode(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct sun4ican_priv *priv = netdev_priv(dev);</div><div class='add'>+	int retry = SUN4I_MODE_MAX_RETRIES;</div><div class='add'>+	u32 mod_reg_val = 0;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		mod_reg_val = readl(priv-&gt;base + SUN4I_REG_MSEL_ADDR);</div><div class='add'>+		mod_reg_val &amp;= ~SUN4I_MSEL_RESET_MODE;</div><div class='add'>+		writel(mod_reg_val, priv-&gt;base + SUN4I_REG_MSEL_ADDR);</div><div class='add'>+	} while (retry-- &amp;&amp; (mod_reg_val &amp; SUN4I_MSEL_RESET_MODE));</div><div class='add'>+</div><div class='add'>+	if (readl(priv-&gt;base + SUN4I_REG_MSEL_ADDR) &amp; SUN4I_MSEL_RESET_MODE) {</div><div class='add'>+		netdev_err(dev,</div><div class='add'>+			   "setting controller into normal mode failed!\n");</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int set_reset_mode(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct sun4ican_priv *priv = netdev_priv(dev);</div><div class='add'>+	int retry = SUN4I_MODE_MAX_RETRIES;</div><div class='add'>+	u32 mod_reg_val = 0;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		mod_reg_val = readl(priv-&gt;base + SUN4I_REG_MSEL_ADDR);</div><div class='add'>+		mod_reg_val |= SUN4I_MSEL_RESET_MODE;</div><div class='add'>+		writel(mod_reg_val, priv-&gt;base + SUN4I_REG_MSEL_ADDR);</div><div class='add'>+	} while (retry-- &amp;&amp; !(mod_reg_val &amp; SUN4I_MSEL_RESET_MODE));</div><div class='add'>+</div><div class='add'>+	if (!(readl(priv-&gt;base + SUN4I_REG_MSEL_ADDR) &amp;</div><div class='add'>+	      SUN4I_MSEL_RESET_MODE)) {</div><div class='add'>+		netdev_err(dev, "setting controller into reset mode failed!\n");</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* bittiming is called in reset_mode only */</div><div class='add'>+static int sun4ican_set_bittiming(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct sun4ican_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct can_bittiming *bt = &amp;priv-&gt;can.bittiming;</div><div class='add'>+	u32 cfg;</div><div class='add'>+</div><div class='add'>+	cfg = ((bt-&gt;brp - 1) &amp; 0x3FF) |</div><div class='add'>+	     (((bt-&gt;sjw - 1) &amp; 0x3) &lt;&lt; 14) |</div><div class='add'>+	     (((bt-&gt;prop_seg + bt-&gt;phase_seg1 - 1) &amp; 0xf) &lt;&lt; 16) |</div><div class='add'>+	     (((bt-&gt;phase_seg2 - 1) &amp; 0x7) &lt;&lt; 20);</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_3_SAMPLES)</div><div class='add'>+		cfg |= 0x800000;</div><div class='add'>+</div><div class='add'>+	netdev_dbg(dev, "setting BITTIMING=0x%08x\n", cfg);</div><div class='add'>+	writel(cfg, priv-&gt;base + SUN4I_REG_BTIME_ADDR);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sun4ican_get_berr_counter(const struct net_device *dev,</div><div class='add'>+				     struct can_berr_counter *bec)</div><div class='add'>+{</div><div class='add'>+	struct sun4ican_priv *priv = netdev_priv(dev);</div><div class='add'>+	u32 errors;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = clk_prepare_enable(priv-&gt;clk);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(dev, "could not enable clock\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	errors = readl(priv-&gt;base + SUN4I_REG_ERRC_ADDR);</div><div class='add'>+</div><div class='add'>+	bec-&gt;txerr = errors &amp; 0xFF;</div><div class='add'>+	bec-&gt;rxerr = (errors &gt;&gt; 16) &amp; 0xFF;</div><div class='add'>+</div><div class='add'>+	clk_disable_unprepare(priv-&gt;clk);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sun4i_can_start(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct sun4ican_priv *priv = netdev_priv(dev);</div><div class='add'>+	int err;</div><div class='add'>+	u32 mod_reg_val;</div><div class='add'>+</div><div class='add'>+	/* we need to enter the reset mode */</div><div class='add'>+	err = set_reset_mode(dev);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(dev, "could not enter reset mode\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* set filters - we accept all */</div><div class='add'>+	writel(0x00000000, priv-&gt;base + SUN4I_REG_ACPC_ADDR + priv-&gt;acp_offset);</div><div class='add'>+	writel(0xFFFFFFFF, priv-&gt;base + SUN4I_REG_ACPM_ADDR + priv-&gt;acp_offset);</div><div class='add'>+</div><div class='add'>+	/* clear error counters and error code capture */</div><div class='add'>+	writel(0, priv-&gt;base + SUN4I_REG_ERRC_ADDR);</div><div class='add'>+</div><div class='add'>+	/* enable interrupts */</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING)</div><div class='add'>+		writel(0xFF, priv-&gt;base + SUN4I_REG_INTEN_ADDR);</div><div class='add'>+	else</div><div class='add'>+		writel(0xFF &amp; ~SUN4I_INTEN_BERR,</div><div class='add'>+		       priv-&gt;base + SUN4I_REG_INTEN_ADDR);</div><div class='add'>+</div><div class='add'>+	/* enter the selected mode */</div><div class='add'>+	mod_reg_val = readl(priv-&gt;base + SUN4I_REG_MSEL_ADDR);</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LOOPBACK)</div><div class='add'>+		mod_reg_val |= SUN4I_MSEL_LOOPBACK_MODE;</div><div class='add'>+	else if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LISTENONLY)</div><div class='add'>+		mod_reg_val |= SUN4I_MSEL_LISTEN_ONLY_MODE;</div><div class='add'>+	writel(mod_reg_val, priv-&gt;base + SUN4I_REG_MSEL_ADDR);</div><div class='add'>+</div><div class='add'>+	err = sun4ican_set_bittiming(dev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* we are ready to enter the normal mode */</div><div class='add'>+	err = set_normal_mode(dev);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(dev, "could not enter normal mode\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sun4i_can_stop(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct sun4ican_priv *priv = netdev_priv(dev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='add'>+	/* we need to enter reset mode */</div><div class='add'>+	err = set_reset_mode(dev);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(dev, "could not enter reset mode\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* disable all interrupts */</div><div class='add'>+	writel(0, priv-&gt;base + SUN4I_REG_INTEN_ADDR);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sun4ican_set_mode(struct net_device *dev, enum can_mode mode)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case CAN_MODE_START:</div><div class='add'>+		err = sun4i_can_start(dev);</div><div class='add'>+		if (err) {</div><div class='add'>+			netdev_err(dev, "starting CAN controller failed!\n");</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+		if (netif_queue_stopped(dev))</div><div class='add'>+			netif_wake_queue(dev);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* transmit a CAN message</div><div class='add'>+ * message layout in the sk_buff should be like this:</div><div class='add'>+ * xx xx xx xx         ff         ll 00 11 22 33 44 55 66 77</div><div class='add'>+ * [ can_id ] [flags] [len] [can data (up to 8 bytes]</div><div class='add'>+ */</div><div class='add'>+static netdev_tx_t sun4ican_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct sun4ican_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct can_frame *cf = (struct can_frame *)skb-&gt;data;</div><div class='add'>+	u8 dlc;</div><div class='add'>+	u32 dreg, msg_flag_n;</div><div class='add'>+	canid_t id;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (can_dev_dropped_skb(dev, skb))</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(dev);</div><div class='add'>+</div><div class='add'>+	id = cf-&gt;can_id;</div><div class='add'>+	dlc = cf-&gt;len;</div><div class='add'>+	msg_flag_n = dlc;</div><div class='add'>+</div><div class='add'>+	if (id &amp; CAN_RTR_FLAG)</div><div class='add'>+		msg_flag_n |= SUN4I_MSG_RTR_FLAG;</div><div class='add'>+</div><div class='add'>+	if (id &amp; CAN_EFF_FLAG) {</div><div class='add'>+		msg_flag_n |= SUN4I_MSG_EFF_FLAG;</div><div class='add'>+		dreg = SUN4I_REG_BUF5_ADDR;</div><div class='add'>+		writel((id &gt;&gt; 21) &amp; 0xFF, priv-&gt;base + SUN4I_REG_BUF1_ADDR);</div><div class='add'>+		writel((id &gt;&gt; 13) &amp; 0xFF, priv-&gt;base + SUN4I_REG_BUF2_ADDR);</div><div class='add'>+		writel((id &gt;&gt; 5)  &amp; 0xFF, priv-&gt;base + SUN4I_REG_BUF3_ADDR);</div><div class='add'>+		writel((id &lt;&lt; 3)  &amp; 0xF8, priv-&gt;base + SUN4I_REG_BUF4_ADDR);</div><div class='add'>+	} else {</div><div class='add'>+		dreg = SUN4I_REG_BUF3_ADDR;</div><div class='add'>+		writel((id &gt;&gt; 3) &amp; 0xFF, priv-&gt;base + SUN4I_REG_BUF1_ADDR);</div><div class='add'>+		writel((id &lt;&lt; 5) &amp; 0xE0, priv-&gt;base + SUN4I_REG_BUF2_ADDR);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; dlc; i++)</div><div class='add'>+		writel(cf-&gt;data[i], priv-&gt;base + (dreg + i * 4));</div><div class='add'>+</div><div class='add'>+	writel(msg_flag_n, priv-&gt;base + SUN4I_REG_BUF0_ADDR);</div><div class='add'>+</div><div class='add'>+	can_put_echo_skb(skb, dev, 0, 0);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LOOPBACK)</div><div class='add'>+		sun4i_can_write_cmdreg(priv, SUN4I_CMD_SELF_RCV_REQ);</div><div class='add'>+	else</div><div class='add'>+		sun4i_can_write_cmdreg(priv, SUN4I_CMD_TRANS_REQ);</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sun4i_can_rx(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct sun4ican_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	u8 fi;</div><div class='add'>+	u32 dreg;</div><div class='add'>+	canid_t id;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* create zero'ed CAN frame buffer */</div><div class='add'>+	skb = alloc_can_skb(dev, &amp;cf);</div><div class='add'>+	if (!skb)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	fi = readl(priv-&gt;base + SUN4I_REG_BUF0_ADDR);</div><div class='add'>+	cf-&gt;len = can_cc_dlc2len(fi &amp; 0x0F);</div><div class='add'>+	if (fi &amp; SUN4I_MSG_EFF_FLAG) {</div><div class='add'>+		dreg = SUN4I_REG_BUF5_ADDR;</div><div class='add'>+		id = (readl(priv-&gt;base + SUN4I_REG_BUF1_ADDR) &lt;&lt; 21) |</div><div class='add'>+		     (readl(priv-&gt;base + SUN4I_REG_BUF2_ADDR) &lt;&lt; 13) |</div><div class='add'>+		     (readl(priv-&gt;base + SUN4I_REG_BUF3_ADDR) &lt;&lt; 5)  |</div><div class='add'>+		    ((readl(priv-&gt;base + SUN4I_REG_BUF4_ADDR) &gt;&gt; 3)  &amp; 0x1f);</div><div class='add'>+		id |= CAN_EFF_FLAG;</div><div class='add'>+	} else {</div><div class='add'>+		dreg = SUN4I_REG_BUF3_ADDR;</div><div class='add'>+		id = (readl(priv-&gt;base + SUN4I_REG_BUF1_ADDR) &lt;&lt; 3) |</div><div class='add'>+		    ((readl(priv-&gt;base + SUN4I_REG_BUF2_ADDR) &gt;&gt; 5) &amp; 0x7);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* remote frame ? */</div><div class='add'>+	if (fi &amp; SUN4I_MSG_RTR_FLAG) {</div><div class='add'>+		id |= CAN_RTR_FLAG;</div><div class='add'>+	} else {</div><div class='add'>+		for (i = 0; i &lt; cf-&gt;len; i++)</div><div class='add'>+			cf-&gt;data[i] = readl(priv-&gt;base + dreg + i * 4);</div><div class='add'>+</div><div class='add'>+		stats-&gt;rx_bytes += cf-&gt;len;</div><div class='add'>+	}</div><div class='add'>+	stats-&gt;rx_packets++;</div><div class='add'>+</div><div class='add'>+	cf-&gt;can_id = id;</div><div class='add'>+</div><div class='add'>+	sun4i_can_write_cmdreg(priv, SUN4I_CMD_RELEASE_RBUF);</div><div class='add'>+</div><div class='add'>+	netif_rx(skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sun4i_can_err(struct net_device *dev, u8 isrc, u8 status)</div><div class='add'>+{</div><div class='add'>+	struct sun4ican_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	enum can_state state = priv-&gt;can.state;</div><div class='add'>+	enum can_state rx_state, tx_state;</div><div class='add'>+	unsigned int rxerr, txerr, errc;</div><div class='add'>+	u32 ecc, alc;</div><div class='add'>+</div><div class='add'>+	/* we don't skip if alloc fails because we want the stats anyhow */</div><div class='add'>+	skb = alloc_can_err_skb(dev, &amp;cf);</div><div class='add'>+</div><div class='add'>+	errc = readl(priv-&gt;base + SUN4I_REG_ERRC_ADDR);</div><div class='add'>+	rxerr = (errc &gt;&gt; 16) &amp; 0xFF;</div><div class='add'>+	txerr = errc &amp; 0xFF;</div><div class='add'>+</div><div class='add'>+	if (isrc &amp; SUN4I_INT_DATA_OR) {</div><div class='add'>+		/* data overrun interrupt */</div><div class='add'>+		netdev_dbg(dev, "data overrun interrupt\n");</div><div class='add'>+		if (likely(skb)) {</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='add'>+			cf-&gt;data[1] = CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='add'>+		}</div><div class='add'>+		stats-&gt;rx_over_errors++;</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+</div><div class='add'>+		/* reset the CAN IP by entering reset mode</div><div class='add'>+		 * ignoring timeout error</div><div class='add'>+		 */</div><div class='add'>+		set_reset_mode(dev);</div><div class='add'>+		set_normal_mode(dev);</div><div class='add'>+</div><div class='add'>+		/* clear bit */</div><div class='add'>+		sun4i_can_write_cmdreg(priv, SUN4I_CMD_CLEAR_OR_FLAG);</div><div class='add'>+	}</div><div class='add'>+	if (isrc &amp; SUN4I_INT_ERR_WRN) {</div><div class='add'>+		/* error warning interrupt */</div><div class='add'>+		netdev_dbg(dev, "error warning interrupt\n");</div><div class='add'>+</div><div class='add'>+		if (status &amp; SUN4I_STA_BUS_OFF)</div><div class='add'>+			state = CAN_STATE_BUS_OFF;</div><div class='add'>+		else if (status &amp; SUN4I_STA_ERR_STA)</div><div class='add'>+			state = CAN_STATE_ERROR_WARNING;</div><div class='add'>+		else</div><div class='add'>+			state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+	}</div><div class='add'>+	if (likely(skb) &amp;&amp; state != CAN_STATE_BUS_OFF) {</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_CNT;</div><div class='add'>+		cf-&gt;data[6] = txerr;</div><div class='add'>+		cf-&gt;data[7] = rxerr;</div><div class='add'>+	}</div><div class='add'>+	if (isrc &amp; SUN4I_INT_BUS_ERR) {</div><div class='add'>+		/* bus error interrupt */</div><div class='add'>+		netdev_dbg(dev, "bus error interrupt\n");</div><div class='add'>+		priv-&gt;can.can_stats.bus_error++;</div><div class='add'>+		ecc = readl(priv-&gt;base + SUN4I_REG_STA_ADDR);</div><div class='add'>+</div><div class='add'>+		if (likely(skb)) {</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='add'>+</div><div class='add'>+			switch (ecc &amp; SUN4I_STA_MASK_ERR) {</div><div class='add'>+			case SUN4I_STA_BIT_ERR:</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_BIT;</div><div class='add'>+				break;</div><div class='add'>+			case SUN4I_STA_FORM_ERR:</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='add'>+				break;</div><div class='add'>+			case SUN4I_STA_STUFF_ERR:</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='add'>+				break;</div><div class='add'>+			default:</div><div class='add'>+				cf-&gt;data[3] = (ecc &amp; SUN4I_STA_ERR_SEG_CODE)</div><div class='add'>+					       &gt;&gt; 16;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* error occurred during transmission? */</div><div class='add'>+		if ((ecc &amp; SUN4I_STA_ERR_DIR) == 0) {</div><div class='add'>+			if (likely(skb))</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_TX;</div><div class='add'>+			stats-&gt;tx_errors++;</div><div class='add'>+		} else {</div><div class='add'>+			stats-&gt;rx_errors++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	if (isrc &amp; SUN4I_INT_ERR_PASSIVE) {</div><div class='add'>+		/* error passive interrupt */</div><div class='add'>+		netdev_dbg(dev, "error passive interrupt\n");</div><div class='add'>+		if (state == CAN_STATE_ERROR_PASSIVE)</div><div class='add'>+			state = CAN_STATE_ERROR_WARNING;</div><div class='add'>+		else</div><div class='add'>+			state = CAN_STATE_ERROR_PASSIVE;</div><div class='add'>+	}</div><div class='add'>+	if (isrc &amp; SUN4I_INT_ARB_LOST) {</div><div class='add'>+		/* arbitration lost interrupt */</div><div class='add'>+		netdev_dbg(dev, "arbitration lost interrupt\n");</div><div class='add'>+		alc = readl(priv-&gt;base + SUN4I_REG_STA_ADDR);</div><div class='add'>+		priv-&gt;can.can_stats.arbitration_lost++;</div><div class='add'>+		if (likely(skb)) {</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_LOSTARB;</div><div class='add'>+			cf-&gt;data[0] = (alc &gt;&gt; 8) &amp; 0x1f;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (state != priv-&gt;can.state) {</div><div class='add'>+		tx_state = txerr &gt;= rxerr ? state : 0;</div><div class='add'>+		rx_state = txerr &lt;= rxerr ? state : 0;</div><div class='add'>+</div><div class='add'>+		/* The skb allocation might fail, but can_change_state()</div><div class='add'>+		 * handles cf == NULL.</div><div class='add'>+		 */</div><div class='add'>+		can_change_state(dev, cf, tx_state, rx_state);</div><div class='add'>+		if (state == CAN_STATE_BUS_OFF)</div><div class='add'>+			can_bus_off(dev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (likely(skb))</div><div class='add'>+		netif_rx(skb);</div><div class='add'>+	else</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t sun4i_can_interrupt(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = (struct net_device *)dev_id;</div><div class='add'>+	struct sun4ican_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='add'>+	u8 isrc, status;</div><div class='add'>+	int n = 0;</div><div class='add'>+</div><div class='add'>+	while ((n &lt; SUN4I_CAN_MAX_IRQ) &amp;&amp;</div><div class='add'>+	       (isrc = readl(priv-&gt;base + SUN4I_REG_INT_ADDR))) {</div><div class='add'>+		n++;</div><div class='add'>+		status = readl(priv-&gt;base + SUN4I_REG_STA_ADDR);</div><div class='add'>+</div><div class='add'>+		if (isrc &amp; SUN4I_INT_WAKEUP)</div><div class='add'>+			netdev_warn(dev, "wakeup interrupt\n");</div><div class='add'>+</div><div class='add'>+		if (isrc &amp; SUN4I_INT_TBUF_VLD) {</div><div class='add'>+			/* transmission complete interrupt */</div><div class='add'>+			stats-&gt;tx_bytes += can_get_echo_skb(dev, 0, NULL);</div><div class='add'>+			stats-&gt;tx_packets++;</div><div class='add'>+			netif_wake_queue(dev);</div><div class='add'>+		}</div><div class='add'>+		if ((isrc &amp; SUN4I_INT_RBUF_VLD) &amp;&amp;</div><div class='add'>+		    !(isrc &amp; SUN4I_INT_DATA_OR)) {</div><div class='add'>+			/* receive interrupt - don't read if overrun occurred */</div><div class='add'>+			while (status &amp; SUN4I_STA_RBUF_RDY) {</div><div class='add'>+				/* RX buffer is not empty */</div><div class='add'>+				sun4i_can_rx(dev);</div><div class='add'>+				status = readl(priv-&gt;base + SUN4I_REG_STA_ADDR);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		if (isrc &amp;</div><div class='add'>+		    (SUN4I_INT_DATA_OR | SUN4I_INT_ERR_WRN | SUN4I_INT_BUS_ERR |</div><div class='add'>+		     SUN4I_INT_ERR_PASSIVE | SUN4I_INT_ARB_LOST)) {</div><div class='add'>+			/* error interrupt */</div><div class='add'>+			if (sun4i_can_err(dev, isrc, status))</div><div class='add'>+				netdev_err(dev, "can't allocate buffer - clearing pending interrupts\n");</div><div class='add'>+		}</div><div class='add'>+		/* clear interrupts */</div><div class='add'>+		writel(isrc, priv-&gt;base + SUN4I_REG_INT_ADDR);</div><div class='add'>+		readl(priv-&gt;base + SUN4I_REG_INT_ADDR);</div><div class='add'>+	}</div><div class='add'>+	if (n &gt;= SUN4I_CAN_MAX_IRQ)</div><div class='add'>+		netdev_dbg(dev, "%d messages handled in ISR", n);</div><div class='add'>+</div><div class='add'>+	return (n) ? IRQ_HANDLED : IRQ_NONE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sun4ican_open(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct sun4ican_priv *priv = netdev_priv(dev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* common open */</div><div class='add'>+	err = open_candev(dev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* register interrupt handler */</div><div class='add'>+	err = request_irq(dev-&gt;irq, sun4i_can_interrupt, 0, dev-&gt;name, dev);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(dev, "request_irq err: %d\n", err);</div><div class='add'>+		goto exit_irq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* software reset deassert */</div><div class='add'>+	err = reset_control_deassert(priv-&gt;reset);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(dev, "could not deassert CAN reset\n");</div><div class='add'>+		goto exit_soft_reset;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* turn on clocking for CAN peripheral block */</div><div class='add'>+	err = clk_prepare_enable(priv-&gt;clk);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(dev, "could not enable CAN peripheral clock\n");</div><div class='add'>+		goto exit_clock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = sun4i_can_start(dev);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(dev, "could not start CAN peripheral\n");</div><div class='add'>+		goto exit_can_start;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netif_start_queue(dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+exit_can_start:</div><div class='add'>+	clk_disable_unprepare(priv-&gt;clk);</div><div class='add'>+exit_clock:</div><div class='add'>+	reset_control_assert(priv-&gt;reset);</div><div class='add'>+exit_soft_reset:</div><div class='add'>+	free_irq(dev-&gt;irq, dev);</div><div class='add'>+exit_irq:</div><div class='add'>+	close_candev(dev);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sun4ican_close(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct sun4ican_priv *priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(dev);</div><div class='add'>+	sun4i_can_stop(dev);</div><div class='add'>+	clk_disable_unprepare(priv-&gt;clk);</div><div class='add'>+	reset_control_assert(priv-&gt;reset);</div><div class='add'>+</div><div class='add'>+	free_irq(dev-&gt;irq, dev);</div><div class='add'>+	close_candev(dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops sun4ican_netdev_ops = {</div><div class='add'>+	.ndo_open = sun4ican_open,</div><div class='add'>+	.ndo_stop = sun4ican_close,</div><div class='add'>+	.ndo_start_xmit = sun4ican_start_xmit,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops sun4ican_ethtool_ops = {</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct sun4ican_quirks sun4ican_quirks_a10 = {</div><div class='add'>+	.has_reset = false,</div><div class='add'>+	.acp_offset = 0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct sun4ican_quirks sun4ican_quirks_r40 = {</div><div class='add'>+	.has_reset = true,</div><div class='add'>+	.acp_offset = 0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct sun4ican_quirks sun4ican_quirks_d1 = {</div><div class='add'>+	.has_reset = true,</div><div class='add'>+	.acp_offset = (SUN4I_REG_ACPC_ADDR_D1 - SUN4I_REG_ACPC_ADDR),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct of_device_id sun4ican_of_match[] = {</div><div class='add'>+	{</div><div class='add'>+		.compatible = "allwinner,sun4i-a10-can",</div><div class='add'>+		.data = &amp;sun4ican_quirks_a10</div><div class='add'>+	}, {</div><div class='add'>+		.compatible = "allwinner,sun7i-a20-can",</div><div class='add'>+		.data = &amp;sun4ican_quirks_a10</div><div class='add'>+	}, {</div><div class='add'>+		.compatible = "allwinner,sun8i-r40-can",</div><div class='add'>+		.data = &amp;sun4ican_quirks_r40</div><div class='add'>+	}, {</div><div class='add'>+		.compatible = "allwinner,sun20i-d1-can",</div><div class='add'>+		.data = &amp;sun4ican_quirks_d1</div><div class='add'>+	}, {</div><div class='add'>+		/* sentinel */</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+MODULE_DEVICE_TABLE(of, sun4ican_of_match);</div><div class='add'>+</div><div class='add'>+static void sun4ican_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	unregister_netdev(dev);</div><div class='add'>+	free_candev(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sun4ican_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct device_node *np = pdev-&gt;dev.of_node;</div><div class='add'>+	struct clk *clk;</div><div class='add'>+	struct reset_control *reset = NULL;</div><div class='add'>+	void __iomem *addr;</div><div class='add'>+	int err, irq;</div><div class='add'>+	struct net_device *dev;</div><div class='add'>+	struct sun4ican_priv *priv;</div><div class='add'>+	const struct sun4ican_quirks *quirks;</div><div class='add'>+</div><div class='add'>+	quirks = of_device_get_match_data(&amp;pdev-&gt;dev);</div><div class='add'>+	if (!quirks) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to determine the quirks to use\n");</div><div class='add'>+		err = -ENODEV;</div><div class='add'>+		goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (quirks-&gt;has_reset) {</div><div class='add'>+		reset = devm_reset_control_get_exclusive(&amp;pdev-&gt;dev, NULL);</div><div class='add'>+		if (IS_ERR(reset)) {</div><div class='add'>+			dev_err(&amp;pdev-&gt;dev, "unable to request reset\n");</div><div class='add'>+			err = PTR_ERR(reset);</div><div class='add'>+			goto exit;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	clk = of_clk_get(np, 0);</div><div class='add'>+	if (IS_ERR(clk)) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "unable to request clock\n");</div><div class='add'>+		err = -ENODEV;</div><div class='add'>+		goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	irq = platform_get_irq(pdev, 0);</div><div class='add'>+	if (irq &lt; 0) {</div><div class='add'>+		err = -ENODEV;</div><div class='add'>+		goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	addr = devm_platform_ioremap_resource(pdev, 0);</div><div class='add'>+	if (IS_ERR(addr)) {</div><div class='add'>+		err = PTR_ERR(addr);</div><div class='add'>+		goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev = alloc_candev(sizeof(struct sun4ican_priv), 1);</div><div class='add'>+	if (!dev) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+			"could not allocate memory for CAN device\n");</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev-&gt;netdev_ops = &amp;sun4ican_netdev_ops;</div><div class='add'>+	dev-&gt;ethtool_ops = &amp;sun4ican_ethtool_ops;</div><div class='add'>+	dev-&gt;irq = irq;</div><div class='add'>+	dev-&gt;flags |= IFF_ECHO;</div><div class='add'>+</div><div class='add'>+	priv = netdev_priv(dev);</div><div class='add'>+	priv-&gt;can.clock.freq = clk_get_rate(clk);</div><div class='add'>+	priv-&gt;can.bittiming_const = &amp;sun4ican_bittiming_const;</div><div class='add'>+	priv-&gt;can.do_set_mode = sun4ican_set_mode;</div><div class='add'>+	priv-&gt;can.do_get_berr_counter = sun4ican_get_berr_counter;</div><div class='add'>+	priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_BERR_REPORTING |</div><div class='add'>+				       CAN_CTRLMODE_LISTENONLY |</div><div class='add'>+				       CAN_CTRLMODE_LOOPBACK |</div><div class='add'>+				       CAN_CTRLMODE_3_SAMPLES;</div><div class='add'>+	priv-&gt;base = addr;</div><div class='add'>+	priv-&gt;clk = clk;</div><div class='add'>+	priv-&gt;reset = reset;</div><div class='add'>+	priv-&gt;acp_offset = quirks-&gt;acp_offset;</div><div class='add'>+	spin_lock_init(&amp;priv-&gt;cmdreg_lock);</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, dev);</div><div class='add'>+	SET_NETDEV_DEV(dev, &amp;pdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	err = register_candev(dev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "registering %s failed (err=%d)\n",</div><div class='add'>+			DRV_NAME, err);</div><div class='add'>+		goto exit_free;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_info(&amp;pdev-&gt;dev, "device registered (base=%p, irq=%d)\n",</div><div class='add'>+		 priv-&gt;base, dev-&gt;irq);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+exit_free:</div><div class='add'>+	free_candev(dev);</div><div class='add'>+exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver sun4i_can_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = DRV_NAME,</div><div class='add'>+		.of_match_table = sun4ican_of_match,</div><div class='add'>+	},</div><div class='add'>+	.probe = sun4ican_probe,</div><div class='add'>+	.remove = sun4ican_remove,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_platform_driver(sun4i_can_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Peter Chen &lt;xingkongcp@gmail.com&gt;");</div><div class='add'>+MODULE_AUTHOR("Gerhard Bertelsmann &lt;info@gerhard-bertelsmann.de&gt;");</div><div class='add'>+MODULE_LICENSE("Dual BSD/GPL");</div><div class='add'>+MODULE_DESCRIPTION("CAN driver for Allwinner SoCs (A10/A20/D1)");</div><div class='head'>diff --git a/drivers/net/can/ti_hecc.c b/drivers/net/can/ti_hecc.c<br/>index cf345cbfe819..1d3dbf28b105 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/ti_hecc.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/ti_hecc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/ti_hecc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/ti_hecc.c</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='ctx'>  * TI HECC (CAN) device driver</div><div class='ctx'>  *</div><div class='hunk'>@@ -5,35 +6,7 @@</div><div class='ctx'>  * specs for the same is available at &lt;http://www.ti.com&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or</div><div class='del'>- * modify it under the terms of the GNU General Public License as</div><div class='del'>- * published by the Free Software Foundation version 2.</div><div class='del'>- *</div><div class='del'>- * This program is distributed as is WITHOUT ANY WARRANTY of any</div><div class='del'>- * kind, whether express or implied; without even the implied warranty</div><div class='del'>- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Your platform definitions should specify module ram offsets and interrupt</div><div class='del'>- * number to use as follows:</div><div class='del'>- *</div><div class='del'>- * static struct ti_hecc_platform_data am3517_evm_hecc_pdata = {</div><div class='del'>- *         .scc_hecc_offset        = 0,</div><div class='del'>- *         .scc_ram_offset         = 0x3000,</div><div class='del'>- *         .hecc_ram_offset        = 0x3000,</div><div class='del'>- *         .mbx_offset             = 0x2000,</div><div class='del'>- *         .int_line               = 0,</div><div class='del'>- *         .revision               = 1,</div><div class='del'>- *         .transceiver_switch     = hecc_phy_control,</div><div class='del'>- * };</div><div class='del'>- *</div><div class='del'>- * Please see include/linux/can/platform/ti_hecc.h for description of</div><div class='del'>- * above fields.</div><div class='del'>- *</div><div class='add'>+ * Copyright (C) 2019 Jeroen Hofstee &lt;jhofstee@victronenergy.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -41,16 +14,18 @@</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/skbuff.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/regulator/consumer.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/can/dev.h&gt;</div><div class='ctx'> #include &lt;linux/can/error.h&gt;</div><div class='del'>-#include &lt;linux/can/led.h&gt;</div><div class='del'>-#include &lt;linux/can/platform/ti_hecc.h&gt;</div><div class='add'>+#include &lt;linux/can/rx-offload.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define DRV_NAME "ti_hecc"</div><div class='ctx'> #define HECC_MODULE_VERSION     "0.7"</div><div class='hunk'>@@ -61,8 +36,7 @@ MODULE_VERSION(HECC_MODULE_VERSION);</div><div class='ctx'> #define HECC_MAX_MAILBOXES	32	/* hardware mailboxes - do not change */</div><div class='ctx'> #define MAX_TX_PRIO		0x3F	/* hardware value - do not change */</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Important Note: TX mailbox configuration</div><div class='add'>+/* Important Note: TX mailbox configuration</div><div class='ctx'>  * TX mailboxes should be restricted to the number of SKB buffers to avoid</div><div class='ctx'>  * maintaining SKB buffers separately. TX mailboxes should be a power of 2</div><div class='ctx'>  * for the mailbox logic to work.  Top mailbox numbers are reserved for RX</div><div class='hunk'>@@ -80,29 +54,16 @@ MODULE_VERSION(HECC_MODULE_VERSION);</div><div class='ctx'> #define HECC_TX_PRIO_MASK	(MAX_TX_PRIO &lt;&lt; HECC_MB_TX_SHIFT)</div><div class='ctx'> #define HECC_TX_MB_MASK		(HECC_MAX_TX_MBOX - 1)</div><div class='ctx'> #define HECC_TX_MASK		((HECC_MAX_TX_MBOX - 1) | HECC_TX_PRIO_MASK)</div><div class='del'>-#define HECC_TX_MBOX_MASK	(~(BIT(HECC_MAX_TX_MBOX) - 1))</div><div class='del'>-#define HECC_DEF_NAPI_WEIGHT	HECC_MAX_RX_MBOX</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Important Note: RX mailbox configuration</div><div class='del'>- * RX mailboxes are further logically split into two - main and buffer</div><div class='del'>- * mailboxes. The goal is to get all packets into main mailboxes as</div><div class='del'>- * driven by mailbox number and receive priority (higher to lower) and</div><div class='del'>- * buffer mailboxes are used to receive pkts while main mailboxes are being</div><div class='del'>- * processed. This ensures in-order packet reception.</div><div class='del'>- *</div><div class='del'>- * Here are the recommended values for buffer mailbox. Note that RX mailboxes</div><div class='del'>- * start after TX mailboxes:</div><div class='add'>+/* RX mailbox configuration</div><div class='ctx'>  *</div><div class='del'>- * HECC_MAX_RX_MBOX		HECC_RX_BUFFER_MBOX	No of buffer mailboxes</div><div class='del'>- * 28				12			8</div><div class='del'>- * 16				20			4</div><div class='add'>+ * The remaining mailboxes are used for reception and are delivered</div><div class='add'>+ * based on their timestamp, to avoid a hardware race when CANME is</div><div class='add'>+ * changed while CAN-bus traffic is being received.</div><div class='ctx'>  */</div><div class='del'>-</div><div class='ctx'> #define HECC_MAX_RX_MBOX	(HECC_MAX_MAILBOXES - HECC_MAX_TX_MBOX)</div><div class='del'>-#define HECC_RX_BUFFER_MBOX	12 /* as per table above */</div><div class='ctx'> #define HECC_RX_FIRST_MBOX	(HECC_MAX_MAILBOXES - 1)</div><div class='del'>-#define HECC_RX_HIGH_MBOX_MASK	(~(BIT(HECC_RX_BUFFER_MBOX) - 1))</div><div class='add'>+#define HECC_RX_LAST_MBOX	(HECC_MAX_TX_MBOX)</div><div class='ctx'> </div><div class='ctx'> /* TI HECC module registers */</div><div class='ctx'> #define HECC_CANME		0x0	/* Mailbox enable */</div><div class='hunk'>@@ -112,7 +73,7 @@ MODULE_VERSION(HECC_MODULE_VERSION);</div><div class='ctx'> #define HECC_CANTA		0x10	/* Transmission acknowledge */</div><div class='ctx'> #define HECC_CANAA		0x14	/* Abort acknowledge */</div><div class='ctx'> #define HECC_CANRMP		0x18	/* Receive message pending */</div><div class='del'>-#define HECC_CANRML		0x1C	/* Remote message lost */</div><div class='add'>+#define HECC_CANRML		0x1C	/* Receive message lost */</div><div class='ctx'> #define HECC_CANRFP		0x20	/* Remote frame pending */</div><div class='ctx'> #define HECC_CANGAM		0x24	/* SECC only:Global acceptance mask */</div><div class='ctx'> #define HECC_CANMC		0x28	/* Master control */</div><div class='hunk'>@@ -134,6 +95,9 @@ MODULE_VERSION(HECC_MODULE_VERSION);</div><div class='ctx'> #define HECC_CANTIOCE		0x68	/* SCC only:Enhanced TX I/O control */</div><div class='ctx'> #define HECC_CANRIOCE		0x6C	/* SCC only:Enhanced RX I/O control */</div><div class='ctx'> </div><div class='add'>+/* TI HECC RAM registers */</div><div class='add'>+#define HECC_CANMOTS		0x80	/* Message object time stamp */</div><div class='add'>+</div><div class='ctx'> /* Mailbox registers */</div><div class='ctx'> #define HECC_CANMID		0x0</div><div class='ctx'> #define HECC_CANMCF		0x4</div><div class='hunk'>@@ -176,6 +140,8 @@ MODULE_VERSION(HECC_MODULE_VERSION);</div><div class='ctx'> #define HECC_BUS_ERROR		(HECC_CANES_FE | HECC_CANES_BE |\</div><div class='ctx'> 				HECC_CANES_CRCE | HECC_CANES_SE |\</div><div class='ctx'> 				HECC_CANES_ACKE)</div><div class='add'>+#define HECC_CANES_FLAGS	(HECC_BUS_ERROR | HECC_CANES_BO |\</div><div class='add'>+				HECC_CANES_EP | HECC_CANES_EW)</div><div class='ctx'> </div><div class='ctx'> #define HECC_CANMCF_RTR		BIT(4)	/* Remote transmit request */</div><div class='ctx'> </div><div class='hunk'>@@ -210,19 +176,17 @@ static const struct can_bittiming_const ti_hecc_bittiming_const = {</div><div class='ctx'> </div><div class='ctx'> struct ti_hecc_priv {</div><div class='ctx'> 	struct can_priv can;	/* MUST be first member/field */</div><div class='del'>-	struct napi_struct napi;</div><div class='add'>+	struct can_rx_offload offload;</div><div class='ctx'> 	struct net_device *ndev;</div><div class='ctx'> 	struct clk *clk;</div><div class='ctx'> 	void __iomem *base;</div><div class='del'>-	u32 scc_ram_offset;</div><div class='del'>-	u32 hecc_ram_offset;</div><div class='del'>-	u32 mbx_offset;</div><div class='del'>-	u32 int_line;</div><div class='add'>+	void __iomem *hecc_ram;</div><div class='add'>+	void __iomem *mbx;</div><div class='add'>+	bool use_hecc1int;</div><div class='ctx'> 	spinlock_t mbx_lock; /* CANME register needs protection */</div><div class='ctx'> 	u32 tx_head;</div><div class='ctx'> 	u32 tx_tail;</div><div class='del'>-	u32 rx_next;</div><div class='del'>-	void (*transceiver_switch)(int);</div><div class='add'>+	struct regulator *reg_xceiver;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static inline int get_tx_head_mb(struct ti_hecc_priv *priv)</div><div class='hunk'>@@ -242,20 +206,23 @@ static inline int get_tx_head_prio(struct ti_hecc_priv *priv)</div><div class='ctx'> </div><div class='ctx'> static inline void hecc_write_lam(struct ti_hecc_priv *priv, u32 mbxno, u32 val)</div><div class='ctx'> {</div><div class='del'>-	__raw_writel(val, priv-&gt;base + priv-&gt;hecc_ram_offset + mbxno * 4);</div><div class='add'>+	__raw_writel(val, priv-&gt;hecc_ram + mbxno * 4);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 hecc_read_stamp(struct ti_hecc_priv *priv, u32 mbxno)</div><div class='add'>+{</div><div class='add'>+	return __raw_readl(priv-&gt;hecc_ram + HECC_CANMOTS + mbxno * 4);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void hecc_write_mbx(struct ti_hecc_priv *priv, u32 mbxno,</div><div class='del'>-	u32 reg, u32 val)</div><div class='add'>+				  u32 reg, u32 val)</div><div class='ctx'> {</div><div class='del'>-	__raw_writel(val, priv-&gt;base + priv-&gt;mbx_offset + mbxno * 0x10 +</div><div class='del'>-			reg);</div><div class='add'>+	__raw_writel(val, priv-&gt;mbx + mbxno * 0x10 + reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline u32 hecc_read_mbx(struct ti_hecc_priv *priv, u32 mbxno, u32 reg)</div><div class='ctx'> {</div><div class='del'>-	return __raw_readl(priv-&gt;base + priv-&gt;mbx_offset + mbxno * 0x10 +</div><div class='del'>-			reg);</div><div class='add'>+	return __raw_readl(priv-&gt;mbx + mbxno * 0x10 + reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void hecc_write(struct ti_hecc_priv *priv, u32 reg, u32 val)</div><div class='hunk'>@@ -269,13 +236,13 @@ static inline u32 hecc_read(struct ti_hecc_priv *priv, int reg)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void hecc_set_bit(struct ti_hecc_priv *priv, int reg,</div><div class='del'>-	u32 bit_mask)</div><div class='add'>+				u32 bit_mask)</div><div class='ctx'> {</div><div class='ctx'> 	hecc_write(priv, reg, hecc_read(priv, reg) | bit_mask);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline void hecc_clear_bit(struct ti_hecc_priv *priv, int reg,</div><div class='del'>-	u32 bit_mask)</div><div class='add'>+				  u32 bit_mask)</div><div class='ctx'> {</div><div class='ctx'> 	hecc_write(priv, reg, hecc_read(priv, reg) &amp; ~bit_mask);</div><div class='ctx'> }</div><div class='hunk'>@@ -297,8 +264,8 @@ static int ti_hecc_set_btc(struct ti_hecc_priv *priv)</div><div class='ctx'> 		if (bit_timing-&gt;brp &gt; 4)</div><div class='ctx'> 			can_btc |= HECC_CANBTC_SAM;</div><div class='ctx'> 		else</div><div class='del'>-			netdev_warn(priv-&gt;ndev, "WARN: Triple"</div><div class='del'>-				"sampling not set due to h/w limitations");</div><div class='add'>+			netdev_warn(priv-&gt;ndev,</div><div class='add'>+				    "WARN: Triple sampling not set due to h/w limitations");</div><div class='ctx'> 	}</div><div class='ctx'> 	can_btc |= ((bit_timing-&gt;sjw - 1) &amp; 0x3) &lt;&lt; 8;</div><div class='ctx'> 	can_btc |= ((bit_timing-&gt;brp - 1) &amp; 0xFF) &lt;&lt; 16;</div><div class='hunk'>@@ -311,11 +278,16 @@ static int ti_hecc_set_btc(struct ti_hecc_priv *priv)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ti_hecc_transceiver_switch(const struct ti_hecc_priv *priv,</div><div class='del'>-					int on)</div><div class='add'>+static int ti_hecc_transceiver_switch(const struct ti_hecc_priv *priv,</div><div class='add'>+				      int on)</div><div class='ctx'> {</div><div class='del'>-	if (priv-&gt;transceiver_switch)</div><div class='del'>-		priv-&gt;transceiver_switch(on);</div><div class='add'>+	if (!priv-&gt;reg_xceiver)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (on)</div><div class='add'>+		return regulator_enable(priv-&gt;reg_xceiver);</div><div class='add'>+	else</div><div class='add'>+		return regulator_disable(priv-&gt;reg_xceiver);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ti_hecc_reset(struct net_device *ndev)</div><div class='hunk'>@@ -329,8 +301,7 @@ static void ti_hecc_reset(struct net_device *ndev)</div><div class='ctx'> 	/* Set change control request and wait till enabled */</div><div class='ctx'> 	hecc_set_bit(priv, HECC_CANMC, HECC_CANMC_CCR);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * INFO: It has been observed that at times CCE bit may not be</div><div class='add'>+	/* INFO: It has been observed that at times CCE bit may not be</div><div class='ctx'> 	 * set and hw seems to be ok even if this bit is not set so</div><div class='ctx'> 	 * timing out with a timing of 1ms to respect the specs</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -340,8 +311,7 @@ static void ti_hecc_reset(struct net_device *ndev)</div><div class='ctx'> 		udelay(10);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Note: On HECC, BTC can be programmed only in initialization mode, so</div><div class='add'>+	/* Note: On HECC, BTC can be programmed only in initialization mode, so</div><div class='ctx'> 	 * it is expected that the can bittiming parameters are set via ip</div><div class='ctx'> 	 * utility before the device is opened</div><div class='ctx'> 	 */</div><div class='hunk'>@@ -350,13 +320,11 @@ static void ti_hecc_reset(struct net_device *ndev)</div><div class='ctx'> 	/* Clear CCR (and CANMC register) and wait for CCE = 0 enable */</div><div class='ctx'> 	hecc_write(priv, HECC_CANMC, 0);</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * INFO: CAN net stack handles bus off and hence disabling auto-bus-on</div><div class='add'>+	/* INFO: CAN net stack handles bus off and hence disabling auto-bus-on</div><div class='ctx'> 	 * hecc_set_bit(priv, HECC_CANMC, HECC_CANMC_ABO);</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * INFO: It has been observed that at times CCE bit may not be</div><div class='add'>+	/* INFO: It has been observed that at times CCE bit may not be</div><div class='ctx'> 	 * set and hw seems to be ok even if this bit is not set so</div><div class='ctx'> 	 */</div><div class='ctx'> 	cnt = HECC_CCE_WAIT_COUNT;</div><div class='hunk'>@@ -389,8 +357,8 @@ static void ti_hecc_start(struct net_device *ndev)</div><div class='ctx'> 	/* put HECC in initialization mode and set btc */</div><div class='ctx'> 	ti_hecc_reset(ndev);</div><div class='ctx'> </div><div class='del'>-	priv-&gt;tx_head = priv-&gt;tx_tail = HECC_TX_MASK;</div><div class='del'>-	priv-&gt;rx_next = HECC_RX_FIRST_MBOX;</div><div class='add'>+	priv-&gt;tx_head = HECC_TX_MASK;</div><div class='add'>+	priv-&gt;tx_tail = HECC_TX_MASK;</div><div class='ctx'> </div><div class='ctx'> 	/* Enable local and global acceptance mask registers */</div><div class='ctx'> 	hecc_write(priv, HECC_CANGAM, HECC_SET_REG);</div><div class='hunk'>@@ -407,16 +375,26 @@ static void ti_hecc_start(struct net_device *ndev)</div><div class='ctx'> 		hecc_set_bit(priv, HECC_CANMIM, mbx_mask);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Prevent message over-write &amp; Enable interrupts */</div><div class='del'>-	hecc_write(priv, HECC_CANOPC, HECC_SET_REG);</div><div class='del'>-	if (priv-&gt;int_line) {</div><div class='add'>+	/* Enable tx interrupts */</div><div class='add'>+	hecc_set_bit(priv, HECC_CANMIM, BIT(HECC_MAX_TX_MBOX) - 1);</div><div class='add'>+</div><div class='add'>+	/* Prevent message over-write to create a rx fifo, but not for</div><div class='add'>+	 * the lowest priority mailbox, since that allows detecting</div><div class='add'>+	 * overflows instead of the hardware silently dropping the</div><div class='add'>+	 * messages.</div><div class='add'>+	 */</div><div class='add'>+	mbx_mask = ~BIT_U32(HECC_RX_LAST_MBOX);</div><div class='add'>+	hecc_write(priv, HECC_CANOPC, mbx_mask);</div><div class='add'>+</div><div class='add'>+	/* Enable interrupts */</div><div class='add'>+	if (priv-&gt;use_hecc1int) {</div><div class='ctx'> 		hecc_write(priv, HECC_CANMIL, HECC_SET_REG);</div><div class='ctx'> 		hecc_write(priv, HECC_CANGIM, HECC_CANGIM_DEF_MASK |</div><div class='ctx'> 			HECC_CANGIM_I1EN | HECC_CANGIM_SIL);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		hecc_write(priv, HECC_CANMIL, 0);</div><div class='ctx'> 		hecc_write(priv, HECC_CANGIM,</div><div class='del'>-			HECC_CANGIM_DEF_MASK | HECC_CANGIM_I0EN);</div><div class='add'>+			   HECC_CANGIM_DEF_MASK | HECC_CANGIM_I0EN);</div><div class='ctx'> 	}</div><div class='ctx'> 	priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='ctx'> }</div><div class='hunk'>@@ -425,6 +403,9 @@ static void ti_hecc_stop(struct net_device *ndev)</div><div class='ctx'> {</div><div class='ctx'> 	struct ti_hecc_priv *priv = netdev_priv(ndev);</div><div class='ctx'> </div><div class='add'>+	/* Disable the CPK; stop sending, erroring and acking */</div><div class='add'>+	hecc_set_bit(priv, HECC_CANMC, HECC_CANMC_CCR);</div><div class='add'>+</div><div class='ctx'> 	/* Disable interrupts and disable mailboxes */</div><div class='ctx'> 	hecc_write(priv, HECC_CANGIM, 0);</div><div class='ctx'> 	hecc_write(priv, HECC_CANMIM, 0);</div><div class='hunk'>@@ -450,7 +431,7 @@ static int ti_hecc_do_set_mode(struct net_device *ndev, enum can_mode mode)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ti_hecc_get_berr_counter(const struct net_device *ndev,</div><div class='del'>-					struct can_berr_counter *bec)</div><div class='add'>+				    struct can_berr_counter *bec)</div><div class='ctx'> {</div><div class='ctx'> 	struct ti_hecc_priv *priv = netdev_priv(ndev);</div><div class='ctx'> </div><div class='hunk'>@@ -460,11 +441,10 @@ static int ti_hecc_get_berr_counter(const struct net_device *ndev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * ti_hecc_xmit: HECC Transmit</div><div class='add'>+/* ti_hecc_xmit: HECC Transmit</div><div class='ctx'>  *</div><div class='ctx'>  * The transmit mailboxes start from 0 to HECC_MAX_TX_MBOX. In HECC the</div><div class='del'>- * priority of the mailbox for tranmission is dependent upon priority setting</div><div class='add'>+ * priority of the mailbox for transmission is dependent upon priority setting</div><div class='ctx'>  * field in mailbox registers. The mailbox with highest value in priority field</div><div class='ctx'>  * is transmitted first. Only when two mailboxes have the same value in</div><div class='ctx'>  * priority field the highest numbered mailbox is transmitted first.</div><div class='hunk'>@@ -489,7 +469,7 @@ static netdev_tx_t ti_hecc_xmit(struct sk_buff *skb, struct net_device *ndev)</div><div class='ctx'> 	u32 mbxno, mbx_mask, data;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	if (can_dropped_invalid_skb(ndev, skb))</div><div class='add'>+	if (can_dev_dropped_skb(ndev, skb))</div><div class='ctx'> 		return NETDEV_TX_OK;</div><div class='ctx'> </div><div class='ctx'> 	mbxno = get_tx_head_mb(priv);</div><div class='hunk'>@@ -499,14 +479,14 @@ static netdev_tx_t ti_hecc_xmit(struct sk_buff *skb, struct net_device *ndev)</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;priv-&gt;mbx_lock, flags);</div><div class='ctx'> 		netif_stop_queue(ndev);</div><div class='ctx'> 		netdev_err(priv-&gt;ndev,</div><div class='del'>-			"BUG: TX mbx not ready tx_head=%08X, tx_tail=%08X\n",</div><div class='del'>-			priv-&gt;tx_head, priv-&gt;tx_tail);</div><div class='add'>+			   "BUG: TX mbx not ready tx_head=%08X, tx_tail=%08X\n",</div><div class='add'>+			   priv-&gt;tx_head, priv-&gt;tx_tail);</div><div class='ctx'> 		return NETDEV_TX_BUSY;</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;priv-&gt;mbx_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	/* Prepare mailbox for transmission */</div><div class='del'>-	data = cf-&gt;can_dlc | (get_tx_head_prio(priv) &lt;&lt; 8);</div><div class='add'>+	data = cf-&gt;len | (get_tx_head_prio(priv) &lt;&lt; 8);</div><div class='ctx'> 	if (cf-&gt;can_id &amp; CAN_RTR_FLAG) /* Remote transmission request */</div><div class='ctx'> 		data |= HECC_CANMCF_RTR;</div><div class='ctx'> 	hecc_write_mbx(priv, mbxno, HECC_CANMCF, data);</div><div class='hunk'>@@ -517,241 +497,171 @@ static netdev_tx_t ti_hecc_xmit(struct sk_buff *skb, struct net_device *ndev)</div><div class='ctx'> 		data = (cf-&gt;can_id &amp; CAN_SFF_MASK) &lt;&lt; 18;</div><div class='ctx'> 	hecc_write_mbx(priv, mbxno, HECC_CANMID, data);</div><div class='ctx'> 	hecc_write_mbx(priv, mbxno, HECC_CANMDL,</div><div class='del'>-		be32_to_cpu(*(__be32 *)(cf-&gt;data)));</div><div class='del'>-	if (cf-&gt;can_dlc &gt; 4)</div><div class='add'>+		       be32_to_cpu(*(__be32 *)(cf-&gt;data)));</div><div class='add'>+	if (cf-&gt;len &gt; 4)</div><div class='ctx'> 		hecc_write_mbx(priv, mbxno, HECC_CANMDH,</div><div class='del'>-			be32_to_cpu(*(__be32 *)(cf-&gt;data + 4)));</div><div class='add'>+			       be32_to_cpu(*(__be32 *)(cf-&gt;data + 4)));</div><div class='ctx'> 	else</div><div class='ctx'> 		*(u32 *)(cf-&gt;data + 4) = 0;</div><div class='del'>-	can_put_echo_skb(skb, ndev, mbxno);</div><div class='add'>+	can_put_echo_skb(skb, ndev, mbxno, 0);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;priv-&gt;mbx_lock, flags);</div><div class='ctx'> 	--priv-&gt;tx_head;</div><div class='ctx'> 	if ((hecc_read(priv, HECC_CANME) &amp; BIT(get_tx_head_mb(priv))) ||</div><div class='del'>-		(priv-&gt;tx_head &amp; HECC_TX_MASK) == HECC_TX_MASK) {</div><div class='add'>+	    (priv-&gt;tx_head &amp; HECC_TX_MASK) == HECC_TX_MASK) {</div><div class='ctx'> 		netif_stop_queue(ndev);</div><div class='ctx'> 	}</div><div class='ctx'> 	hecc_set_bit(priv, HECC_CANME, mbx_mask);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;priv-&gt;mbx_lock, flags);</div><div class='ctx'> </div><div class='del'>-	hecc_clear_bit(priv, HECC_CANMD, mbx_mask);</div><div class='del'>-	hecc_set_bit(priv, HECC_CANMIM, mbx_mask);</div><div class='ctx'> 	hecc_write(priv, HECC_CANTRS, mbx_mask);</div><div class='ctx'> </div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ti_hecc_rx_pkt(struct ti_hecc_priv *priv, int mbxno)</div><div class='add'>+static inline</div><div class='add'>+struct ti_hecc_priv *rx_offload_to_priv(struct can_rx_offload *offload)</div><div class='ctx'> {</div><div class='del'>-	struct net_device_stats *stats = &amp;priv-&gt;ndev-&gt;stats;</div><div class='del'>-	struct can_frame *cf;</div><div class='add'>+	return container_of(offload, struct ti_hecc_priv, offload);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct sk_buff *ti_hecc_mailbox_read(struct can_rx_offload *offload,</div><div class='add'>+					    unsigned int mbxno, u32 *timestamp,</div><div class='add'>+					    bool drop)</div><div class='add'>+{</div><div class='add'>+	struct ti_hecc_priv *priv = rx_offload_to_priv(offload);</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='add'>+	struct can_frame *cf;</div><div class='ctx'> 	u32 data, mbx_mask;</div><div class='del'>-	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	skb = alloc_can_skb(priv-&gt;ndev, &amp;cf);</div><div class='del'>-	if (!skb) {</div><div class='del'>-		if (printk_ratelimit())</div><div class='del'>-			netdev_err(priv-&gt;ndev,</div><div class='del'>-				"ti_hecc_rx_pkt: alloc_can_skb() failed\n");</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	mbx_mask = BIT(mbxno);</div><div class='add'>+</div><div class='add'>+	if (unlikely(drop)) {</div><div class='add'>+		skb = ERR_PTR(-ENOBUFS);</div><div class='add'>+		goto mark_as_read;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_skb(offload-&gt;dev, &amp;cf);</div><div class='add'>+	if (unlikely(!skb)) {</div><div class='add'>+		skb = ERR_PTR(-ENOMEM);</div><div class='add'>+		goto mark_as_read;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mbx_mask = BIT(mbxno);</div><div class='ctx'> 	data = hecc_read_mbx(priv, mbxno, HECC_CANMID);</div><div class='ctx'> 	if (data &amp; HECC_CANMID_IDE)</div><div class='ctx'> 		cf-&gt;can_id = (data &amp; CAN_EFF_MASK) | CAN_EFF_FLAG;</div><div class='ctx'> 	else</div><div class='ctx'> 		cf-&gt;can_id = (data &gt;&gt; 18) &amp; CAN_SFF_MASK;</div><div class='add'>+</div><div class='ctx'> 	data = hecc_read_mbx(priv, mbxno, HECC_CANMCF);</div><div class='ctx'> 	if (data &amp; HECC_CANMCF_RTR)</div><div class='ctx'> 		cf-&gt;can_id |= CAN_RTR_FLAG;</div><div class='del'>-	cf-&gt;can_dlc = get_can_dlc(data &amp; 0xF);</div><div class='add'>+	cf-&gt;len = can_cc_dlc2len(data &amp; 0xF);</div><div class='add'>+</div><div class='ctx'> 	data = hecc_read_mbx(priv, mbxno, HECC_CANMDL);</div><div class='ctx'> 	*(__be32 *)(cf-&gt;data) = cpu_to_be32(data);</div><div class='del'>-	if (cf-&gt;can_dlc &gt; 4) {</div><div class='add'>+	if (cf-&gt;len &gt; 4) {</div><div class='ctx'> 		data = hecc_read_mbx(priv, mbxno, HECC_CANMDH);</div><div class='ctx'> 		*(__be32 *)(cf-&gt;data + 4) = cpu_to_be32(data);</div><div class='ctx'> 	}</div><div class='del'>-	spin_lock_irqsave(&amp;priv-&gt;mbx_lock, flags);</div><div class='del'>-	hecc_clear_bit(priv, HECC_CANME, mbx_mask);</div><div class='del'>-	hecc_write(priv, HECC_CANRMP, mbx_mask);</div><div class='del'>-	/* enable mailbox only if it is part of rx buffer mailboxes */</div><div class='del'>-	if (priv-&gt;rx_next &lt; HECC_RX_BUFFER_MBOX)</div><div class='del'>-		hecc_set_bit(priv, HECC_CANME, mbx_mask);</div><div class='del'>-	spin_unlock_irqrestore(&amp;priv-&gt;mbx_lock, flags);</div><div class='ctx'> </div><div class='del'>-	stats-&gt;rx_bytes += cf-&gt;can_dlc;</div><div class='del'>-	can_led_event(priv-&gt;ndev, CAN_LED_EVENT_RX);</div><div class='del'>-	netif_receive_skb(skb);</div><div class='del'>-	stats-&gt;rx_packets++;</div><div class='add'>+	*timestamp = hecc_read_stamp(priv, mbxno);</div><div class='add'>+</div><div class='add'>+	/* Check for FIFO overrun.</div><div class='add'>+	 *</div><div class='add'>+	 * All but the last RX mailbox have activated overwrite</div><div class='add'>+	 * protection. So skip check for overrun, if we're not</div><div class='add'>+	 * handling the last RX mailbox.</div><div class='add'>+	 *</div><div class='add'>+	 * As the overwrite protection for the last RX mailbox is</div><div class='add'>+	 * disabled, the CAN core might update while we're reading</div><div class='add'>+	 * it. This means the skb might be inconsistent.</div><div class='add'>+	 *</div><div class='add'>+	 * Return an error to let rx-offload discard this CAN frame.</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely(mbxno == HECC_RX_LAST_MBOX &amp;&amp;</div><div class='add'>+		     hecc_read(priv, HECC_CANRML) &amp; mbx_mask))</div><div class='add'>+		skb = ERR_PTR(-ENOBUFS);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+ mark_as_read:</div><div class='add'>+	hecc_write(priv, HECC_CANRMP, mbx_mask);</div><div class='add'>+</div><div class='add'>+	return skb;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * ti_hecc_rx_poll - HECC receive pkts</div><div class='del'>- *</div><div class='del'>- * The receive mailboxes start from highest numbered mailbox till last xmit</div><div class='del'>- * mailbox. On CAN frame reception the hardware places the data into highest</div><div class='del'>- * numbered mailbox that matches the CAN ID filter. Since all receive mailboxes</div><div class='del'>- * have same filtering (ALL CAN frames) packets will arrive in the highest</div><div class='del'>- * available RX mailbox and we need to ensure in-order packet reception.</div><div class='del'>- *</div><div class='del'>- * To ensure the packets are received in the right order we logically divide</div><div class='del'>- * the RX mailboxes into main and buffer mailboxes. Packets are received as per</div><div class='del'>- * mailbox priotity (higher to lower) in the main bank and once it is full we</div><div class='del'>- * disable further reception into main mailboxes. While the main mailboxes are</div><div class='del'>- * processed in NAPI, further packets are received in buffer mailboxes.</div><div class='del'>- *</div><div class='del'>- * We maintain a RX next mailbox counter to process packets and once all main</div><div class='del'>- * mailboxe packets are passed to the upper stack we enable all of them but</div><div class='del'>- * continue to process packets received in buffer mailboxes. With each packet</div><div class='del'>- * received from buffer mailbox we enable it immediately so as to handle the</div><div class='del'>- * overflow from higher mailboxes.</div><div class='del'>- */</div><div class='del'>-static int ti_hecc_rx_poll(struct napi_struct *napi, int quota)</div><div class='add'>+static int ti_hecc_error(struct net_device *ndev, int int_status,</div><div class='add'>+			 int err_status)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *ndev = napi-&gt;dev;</div><div class='ctx'> 	struct ti_hecc_priv *priv = netdev_priv(ndev);</div><div class='del'>-	u32 num_pkts = 0;</div><div class='del'>-	u32 mbx_mask;</div><div class='del'>-	unsigned long pending_pkts, flags;</div><div class='del'>-</div><div class='del'>-	if (!netif_running(ndev))</div><div class='del'>-		return 0;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	u32 timestamp;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='del'>-	while ((pending_pkts = hecc_read(priv, HECC_CANRMP)) &amp;&amp;</div><div class='del'>-		num_pkts &lt; quota) {</div><div class='del'>-		mbx_mask = BIT(priv-&gt;rx_next); /* next rx mailbox to process */</div><div class='del'>-		if (mbx_mask &amp; pending_pkts) {</div><div class='del'>-			if (ti_hecc_rx_pkt(priv, priv-&gt;rx_next) &lt; 0)</div><div class='del'>-				return num_pkts;</div><div class='del'>-			++num_pkts;</div><div class='del'>-		} else if (priv-&gt;rx_next &gt; HECC_RX_BUFFER_MBOX) {</div><div class='del'>-			break; /* pkt not received yet */</div><div class='del'>-		}</div><div class='del'>-		--priv-&gt;rx_next;</div><div class='del'>-		if (priv-&gt;rx_next == HECC_RX_BUFFER_MBOX) {</div><div class='del'>-			/* enable high bank mailboxes */</div><div class='del'>-			spin_lock_irqsave(&amp;priv-&gt;mbx_lock, flags);</div><div class='del'>-			mbx_mask = hecc_read(priv, HECC_CANME);</div><div class='del'>-			mbx_mask |= HECC_RX_HIGH_MBOX_MASK;</div><div class='del'>-			hecc_write(priv, HECC_CANME, mbx_mask);</div><div class='del'>-			spin_unlock_irqrestore(&amp;priv-&gt;mbx_lock, flags);</div><div class='del'>-		} else if (priv-&gt;rx_next == HECC_MAX_TX_MBOX - 1) {</div><div class='del'>-			priv-&gt;rx_next = HECC_RX_FIRST_MBOX;</div><div class='del'>-			break;</div><div class='add'>+	if (err_status &amp; HECC_BUS_ERROR) {</div><div class='add'>+		/* propagate the error condition to the can stack */</div><div class='add'>+		skb = alloc_can_err_skb(ndev, &amp;cf);</div><div class='add'>+		if (!skb) {</div><div class='add'>+			if (net_ratelimit())</div><div class='add'>+				netdev_err(priv-&gt;ndev,</div><div class='add'>+					   "%s: alloc_can_err_skb() failed\n",</div><div class='add'>+					   __func__);</div><div class='add'>+			return -ENOMEM;</div><div class='ctx'> 		}</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	/* Enable packet interrupt if all pkts are handled */</div><div class='del'>-	if (hecc_read(priv, HECC_CANRMP) == 0) {</div><div class='del'>-		napi_complete(napi);</div><div class='del'>-		/* Re-enable RX mailbox interrupts */</div><div class='del'>-		mbx_mask = hecc_read(priv, HECC_CANMIM);</div><div class='del'>-		mbx_mask |= HECC_TX_MBOX_MASK;</div><div class='del'>-		hecc_write(priv, HECC_CANMIM, mbx_mask);</div><div class='add'>+		++priv-&gt;can.can_stats.bus_error;</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_BUSERROR | CAN_ERR_PROT;</div><div class='add'>+		if (err_status &amp; HECC_CANES_FE)</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='add'>+		if (err_status &amp; HECC_CANES_BE)</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_BIT;</div><div class='add'>+		if (err_status &amp; HECC_CANES_SE)</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='add'>+		if (err_status &amp; HECC_CANES_CRCE)</div><div class='add'>+			cf-&gt;data[3] = CAN_ERR_PROT_LOC_CRC_SEQ;</div><div class='add'>+		if (err_status &amp; HECC_CANES_ACKE)</div><div class='add'>+			cf-&gt;data[3] = CAN_ERR_PROT_LOC_ACK;</div><div class='add'>+</div><div class='add'>+		timestamp = hecc_read(priv, HECC_CANLNT);</div><div class='add'>+		err = can_rx_offload_queue_timestamp(&amp;priv-&gt;offload, skb,</div><div class='add'>+						     timestamp);</div><div class='add'>+		if (err)</div><div class='add'>+			ndev-&gt;stats.rx_fifo_errors++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return num_pkts;</div><div class='add'>+	hecc_write(priv, HECC_CANES, HECC_CANES_FLAGS);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ti_hecc_error(struct net_device *ndev, int int_status,</div><div class='del'>-	int err_status)</div><div class='add'>+static void ti_hecc_change_state(struct net_device *ndev,</div><div class='add'>+				 enum can_state rx_state,</div><div class='add'>+				 enum can_state tx_state)</div><div class='ctx'> {</div><div class='ctx'> 	struct ti_hecc_priv *priv = netdev_priv(ndev);</div><div class='del'>-	struct net_device_stats *stats = &amp;ndev-&gt;stats;</div><div class='ctx'> 	struct can_frame *cf;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='add'>+	u32 timestamp;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='del'>-	/* propagate the error condition to the can stack */</div><div class='del'>-	skb = alloc_can_err_skb(ndev, &amp;cf);</div><div class='del'>-	if (!skb) {</div><div class='del'>-		if (printk_ratelimit())</div><div class='del'>-			netdev_err(priv-&gt;ndev,</div><div class='del'>-				"ti_hecc_error: alloc_can_err_skb() failed\n");</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (int_status &amp; HECC_CANGIF_WLIF) { /* warning level int */</div><div class='del'>-		if ((int_status &amp; HECC_CANGIF_BOIF) == 0) {</div><div class='del'>-			priv-&gt;can.state = CAN_STATE_ERROR_WARNING;</div><div class='del'>-			++priv-&gt;can.can_stats.error_warning;</div><div class='del'>-			cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='del'>-			if (hecc_read(priv, HECC_CANTEC) &gt; 96)</div><div class='del'>-				cf-&gt;data[1] |= CAN_ERR_CRTL_TX_WARNING;</div><div class='del'>-			if (hecc_read(priv, HECC_CANREC) &gt; 96)</div><div class='del'>-				cf-&gt;data[1] |= CAN_ERR_CRTL_RX_WARNING;</div><div class='del'>-		}</div><div class='del'>-		hecc_set_bit(priv, HECC_CANES, HECC_CANES_EW);</div><div class='del'>-		netdev_dbg(priv-&gt;ndev, "Error Warning interrupt\n");</div><div class='del'>-		hecc_clear_bit(priv, HECC_CANMC, HECC_CANMC_CCR);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (int_status &amp; HECC_CANGIF_EPIF) { /* error passive int */</div><div class='del'>-		if ((int_status &amp; HECC_CANGIF_BOIF) == 0) {</div><div class='del'>-			priv-&gt;can.state = CAN_STATE_ERROR_PASSIVE;</div><div class='del'>-			++priv-&gt;can.can_stats.error_passive;</div><div class='del'>-			cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='del'>-			if (hecc_read(priv, HECC_CANTEC) &gt; 127)</div><div class='del'>-				cf-&gt;data[1] |= CAN_ERR_CRTL_TX_PASSIVE;</div><div class='del'>-			if (hecc_read(priv, HECC_CANREC) &gt; 127)</div><div class='del'>-				cf-&gt;data[1] |= CAN_ERR_CRTL_RX_PASSIVE;</div><div class='del'>-		}</div><div class='del'>-		hecc_set_bit(priv, HECC_CANES, HECC_CANES_EP);</div><div class='del'>-		netdev_dbg(priv-&gt;ndev, "Error passive interrupt\n");</div><div class='del'>-		hecc_clear_bit(priv, HECC_CANMC, HECC_CANMC_CCR);</div><div class='add'>+	skb = alloc_can_err_skb(priv-&gt;ndev, &amp;cf);</div><div class='add'>+	if (unlikely(!skb)) {</div><div class='add'>+		priv-&gt;can.state = max(tx_state, rx_state);</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*</div><div class='del'>-	 * Need to check busoff condition in error status register too to</div><div class='del'>-	 * ensure warning interrupts don't hog the system</div><div class='del'>-	 */</div><div class='del'>-	if ((int_status &amp; HECC_CANGIF_BOIF) || (err_status &amp; HECC_CANES_BO)) {</div><div class='del'>-		priv-&gt;can.state = CAN_STATE_BUS_OFF;</div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_BUSOFF;</div><div class='del'>-		hecc_set_bit(priv, HECC_CANES, HECC_CANES_BO);</div><div class='del'>-		hecc_clear_bit(priv, HECC_CANMC, HECC_CANMC_CCR);</div><div class='del'>-		/* Disable all interrupts in bus-off to avoid int hog */</div><div class='del'>-		hecc_write(priv, HECC_CANGIM, 0);</div><div class='del'>-		++priv-&gt;can.can_stats.bus_off;</div><div class='del'>-		can_bus_off(ndev);</div><div class='del'>-	}</div><div class='add'>+	can_change_state(priv-&gt;ndev, cf, tx_state, rx_state);</div><div class='ctx'> </div><div class='del'>-	if (err_status &amp; HECC_BUS_ERROR) {</div><div class='del'>-		++priv-&gt;can.can_stats.bus_error;</div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_BUSERROR | CAN_ERR_PROT;</div><div class='del'>-		cf-&gt;data[2] |= CAN_ERR_PROT_UNSPEC;</div><div class='del'>-		if (err_status &amp; HECC_CANES_FE) {</div><div class='del'>-			hecc_set_bit(priv, HECC_CANES, HECC_CANES_FE);</div><div class='del'>-			cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='del'>-		}</div><div class='del'>-		if (err_status &amp; HECC_CANES_BE) {</div><div class='del'>-			hecc_set_bit(priv, HECC_CANES, HECC_CANES_BE);</div><div class='del'>-			cf-&gt;data[2] |= CAN_ERR_PROT_BIT;</div><div class='del'>-		}</div><div class='del'>-		if (err_status &amp; HECC_CANES_SE) {</div><div class='del'>-			hecc_set_bit(priv, HECC_CANES, HECC_CANES_SE);</div><div class='del'>-			cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='del'>-		}</div><div class='del'>-		if (err_status &amp; HECC_CANES_CRCE) {</div><div class='del'>-			hecc_set_bit(priv, HECC_CANES, HECC_CANES_CRCE);</div><div class='del'>-			cf-&gt;data[3] |= CAN_ERR_PROT_LOC_CRC_SEQ |</div><div class='del'>-					CAN_ERR_PROT_LOC_CRC_DEL;</div><div class='del'>-		}</div><div class='del'>-		if (err_status &amp; HECC_CANES_ACKE) {</div><div class='del'>-			hecc_set_bit(priv, HECC_CANES, HECC_CANES_ACKE);</div><div class='del'>-			cf-&gt;data[3] |= CAN_ERR_PROT_LOC_ACK |</div><div class='del'>-					CAN_ERR_PROT_LOC_ACK_DEL;</div><div class='del'>-		}</div><div class='add'>+	if (max(tx_state, rx_state) != CAN_STATE_BUS_OFF) {</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_CNT;</div><div class='add'>+		cf-&gt;data[6] = hecc_read(priv, HECC_CANTEC);</div><div class='add'>+		cf-&gt;data[7] = hecc_read(priv, HECC_CANREC);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	stats-&gt;rx_packets++;</div><div class='del'>-	stats-&gt;rx_bytes += cf-&gt;can_dlc;</div><div class='del'>-	netif_rx(skb);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	timestamp = hecc_read(priv, HECC_CANLNT);</div><div class='add'>+	err = can_rx_offload_queue_timestamp(&amp;priv-&gt;offload, skb, timestamp);</div><div class='add'>+	if (err)</div><div class='add'>+		ndev-&gt;stats.rx_fifo_errors++;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static irqreturn_t ti_hecc_interrupt(int irq, void *dev_id)</div><div class='hunk'>@@ -759,19 +669,71 @@ static irqreturn_t ti_hecc_interrupt(int irq, void *dev_id)</div><div class='ctx'> 	struct net_device *ndev = (struct net_device *)dev_id;</div><div class='ctx'> 	struct ti_hecc_priv *priv = netdev_priv(ndev);</div><div class='ctx'> 	struct net_device_stats *stats = &amp;ndev-&gt;stats;</div><div class='del'>-	u32 mbxno, mbx_mask, int_status, err_status;</div><div class='del'>-	unsigned long ack, flags;</div><div class='add'>+	u32 mbxno, mbx_mask, int_status, err_status, stamp;</div><div class='add'>+	unsigned long flags, rx_pending;</div><div class='add'>+	u32 handled = 0;</div><div class='ctx'> </div><div class='ctx'> 	int_status = hecc_read(priv,</div><div class='del'>-		(priv-&gt;int_line) ? HECC_CANGIF1 : HECC_CANGIF0);</div><div class='add'>+			       priv-&gt;use_hecc1int ?</div><div class='add'>+			       HECC_CANGIF1 : HECC_CANGIF0);</div><div class='ctx'> </div><div class='ctx'> 	if (!int_status)</div><div class='ctx'> 		return IRQ_NONE;</div><div class='ctx'> </div><div class='ctx'> 	err_status = hecc_read(priv, HECC_CANES);</div><div class='del'>-	if (err_status &amp; (HECC_BUS_ERROR | HECC_CANES_BO |</div><div class='del'>-		HECC_CANES_EP | HECC_CANES_EW))</div><div class='del'>-			ti_hecc_error(ndev, int_status, err_status);</div><div class='add'>+	if (unlikely(err_status &amp; HECC_CANES_FLAGS))</div><div class='add'>+		ti_hecc_error(ndev, int_status, err_status);</div><div class='add'>+</div><div class='add'>+	if (unlikely(int_status &amp; HECC_CANGIM_DEF_MASK)) {</div><div class='add'>+		enum can_state rx_state, tx_state;</div><div class='add'>+		u32 rec = hecc_read(priv, HECC_CANREC);</div><div class='add'>+		u32 tec = hecc_read(priv, HECC_CANTEC);</div><div class='add'>+</div><div class='add'>+		if (int_status &amp; HECC_CANGIF_WLIF) {</div><div class='add'>+			handled |= HECC_CANGIF_WLIF;</div><div class='add'>+			rx_state = rec &gt;= tec ? CAN_STATE_ERROR_WARNING : 0;</div><div class='add'>+			tx_state = rec &lt;= tec ? CAN_STATE_ERROR_WARNING : 0;</div><div class='add'>+			netdev_dbg(priv-&gt;ndev, "Error Warning interrupt\n");</div><div class='add'>+			ti_hecc_change_state(ndev, rx_state, tx_state);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (int_status &amp; HECC_CANGIF_EPIF) {</div><div class='add'>+			handled |= HECC_CANGIF_EPIF;</div><div class='add'>+			rx_state = rec &gt;= tec ? CAN_STATE_ERROR_PASSIVE : 0;</div><div class='add'>+			tx_state = rec &lt;= tec ? CAN_STATE_ERROR_PASSIVE : 0;</div><div class='add'>+			netdev_dbg(priv-&gt;ndev, "Error passive interrupt\n");</div><div class='add'>+			ti_hecc_change_state(ndev, rx_state, tx_state);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (int_status &amp; HECC_CANGIF_BOIF) {</div><div class='add'>+			handled |= HECC_CANGIF_BOIF;</div><div class='add'>+			rx_state = CAN_STATE_BUS_OFF;</div><div class='add'>+			tx_state = CAN_STATE_BUS_OFF;</div><div class='add'>+			netdev_dbg(priv-&gt;ndev, "Bus off interrupt\n");</div><div class='add'>+</div><div class='add'>+			/* Disable all interrupts */</div><div class='add'>+			hecc_write(priv, HECC_CANGIM, 0);</div><div class='add'>+			can_bus_off(ndev);</div><div class='add'>+			ti_hecc_change_state(ndev, rx_state, tx_state);</div><div class='add'>+		}</div><div class='add'>+	} else if (unlikely(priv-&gt;can.state != CAN_STATE_ERROR_ACTIVE)) {</div><div class='add'>+		enum can_state new_state, tx_state, rx_state;</div><div class='add'>+		u32 rec = hecc_read(priv, HECC_CANREC);</div><div class='add'>+		u32 tec = hecc_read(priv, HECC_CANTEC);</div><div class='add'>+</div><div class='add'>+		if (rec &gt;= 128 || tec &gt;= 128)</div><div class='add'>+			new_state = CAN_STATE_ERROR_PASSIVE;</div><div class='add'>+		else if (rec &gt;= 96 || tec &gt;= 96)</div><div class='add'>+			new_state = CAN_STATE_ERROR_WARNING;</div><div class='add'>+		else</div><div class='add'>+			new_state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+</div><div class='add'>+		if (new_state &lt; priv-&gt;can.state) {</div><div class='add'>+			rx_state = rec &gt;= tec ? new_state : 0;</div><div class='add'>+			tx_state = rec &lt;= tec ? new_state : 0;</div><div class='add'>+			ti_hecc_change_state(ndev, rx_state, tx_state);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (int_status &amp; HECC_CANGIF_GMIF) {</div><div class='ctx'> 		while (priv-&gt;tx_tail - priv-&gt;tx_head &gt; 0) {</div><div class='hunk'>@@ -779,44 +741,43 @@ static irqreturn_t ti_hecc_interrupt(int irq, void *dev_id)</div><div class='ctx'> 			mbx_mask = BIT(mbxno);</div><div class='ctx'> 			if (!(mbx_mask &amp; hecc_read(priv, HECC_CANTA)))</div><div class='ctx'> 				break;</div><div class='del'>-			hecc_clear_bit(priv, HECC_CANMIM, mbx_mask);</div><div class='ctx'> 			hecc_write(priv, HECC_CANTA, mbx_mask);</div><div class='ctx'> 			spin_lock_irqsave(&amp;priv-&gt;mbx_lock, flags);</div><div class='ctx'> 			hecc_clear_bit(priv, HECC_CANME, mbx_mask);</div><div class='ctx'> 			spin_unlock_irqrestore(&amp;priv-&gt;mbx_lock, flags);</div><div class='del'>-			stats-&gt;tx_bytes += hecc_read_mbx(priv, mbxno,</div><div class='del'>-						HECC_CANMCF) &amp; 0xF;</div><div class='add'>+			stamp = hecc_read_stamp(priv, mbxno);</div><div class='add'>+			stats-&gt;tx_bytes +=</div><div class='add'>+				can_rx_offload_get_echo_skb_queue_timestamp(&amp;priv-&gt;offload,</div><div class='add'>+									    mbxno, stamp, NULL);</div><div class='ctx'> 			stats-&gt;tx_packets++;</div><div class='del'>-			can_led_event(ndev, CAN_LED_EVENT_TX);</div><div class='del'>-			can_get_echo_skb(ndev, mbxno);</div><div class='ctx'> 			--priv-&gt;tx_tail;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* restart queue if wrap-up or if queue stalled on last pkt */</div><div class='del'>-		if (((priv-&gt;tx_head == priv-&gt;tx_tail) &amp;&amp;</div><div class='del'>-		((priv-&gt;tx_head &amp; HECC_TX_MASK) != HECC_TX_MASK)) ||</div><div class='del'>-		(((priv-&gt;tx_tail &amp; HECC_TX_MASK) == HECC_TX_MASK) &amp;&amp;</div><div class='del'>-		((priv-&gt;tx_head &amp; HECC_TX_MASK) == HECC_TX_MASK)))</div><div class='add'>+		if ((priv-&gt;tx_head == priv-&gt;tx_tail &amp;&amp;</div><div class='add'>+		     ((priv-&gt;tx_head &amp; HECC_TX_MASK) != HECC_TX_MASK)) ||</div><div class='add'>+		    (((priv-&gt;tx_tail &amp; HECC_TX_MASK) == HECC_TX_MASK) &amp;&amp;</div><div class='add'>+		     ((priv-&gt;tx_head &amp; HECC_TX_MASK) == HECC_TX_MASK)))</div><div class='ctx'> 			netif_wake_queue(ndev);</div><div class='ctx'> </div><div class='del'>-		/* Disable RX mailbox interrupts and let NAPI reenable them */</div><div class='del'>-		if (hecc_read(priv, HECC_CANRMP)) {</div><div class='del'>-			ack = hecc_read(priv, HECC_CANMIM);</div><div class='del'>-			ack &amp;= BIT(HECC_MAX_TX_MBOX) - 1;</div><div class='del'>-			hecc_write(priv, HECC_CANMIM, ack);</div><div class='del'>-			napi_schedule(&amp;priv-&gt;napi);</div><div class='add'>+		/* offload RX mailboxes and let NAPI deliver them */</div><div class='add'>+		while ((rx_pending = hecc_read(priv, HECC_CANRMP))) {</div><div class='add'>+			can_rx_offload_irq_offload_timestamp(&amp;priv-&gt;offload,</div><div class='add'>+							     rx_pending);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* clear all interrupt conditions - read back to avoid spurious ints */</div><div class='del'>-	if (priv-&gt;int_line) {</div><div class='del'>-		hecc_write(priv, HECC_CANGIF1, HECC_SET_REG);</div><div class='add'>+	if (priv-&gt;use_hecc1int) {</div><div class='add'>+		hecc_write(priv, HECC_CANGIF1, handled);</div><div class='ctx'> 		int_status = hecc_read(priv, HECC_CANGIF1);</div><div class='ctx'> 	} else {</div><div class='del'>-		hecc_write(priv, HECC_CANGIF0, HECC_SET_REG);</div><div class='add'>+		hecc_write(priv, HECC_CANGIF0, handled);</div><div class='ctx'> 		int_status = hecc_read(priv, HECC_CANGIF0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	can_rx_offload_irq_finish(&amp;priv-&gt;offload);</div><div class='add'>+</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -826,7 +787,7 @@ static int ti_hecc_open(struct net_device *ndev)</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	err = request_irq(ndev-&gt;irq, ti_hecc_interrupt, IRQF_SHARED,</div><div class='del'>-			ndev-&gt;name, ndev);</div><div class='add'>+			  ndev-&gt;name, ndev);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		netdev_err(ndev, "error requesting interrupt\n");</div><div class='ctx'> 		return err;</div><div class='hunk'>@@ -843,10 +804,8 @@ static int ti_hecc_open(struct net_device *ndev)</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	can_led_event(ndev, CAN_LED_EVENT_OPEN);</div><div class='del'>-</div><div class='ctx'> 	ti_hecc_start(ndev);</div><div class='del'>-	napi_enable(&amp;priv-&gt;napi);</div><div class='add'>+	can_rx_offload_enable(&amp;priv-&gt;offload);</div><div class='ctx'> 	netif_start_queue(ndev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -857,14 +816,12 @@ static int ti_hecc_close(struct net_device *ndev)</div><div class='ctx'> 	struct ti_hecc_priv *priv = netdev_priv(ndev);</div><div class='ctx'> </div><div class='ctx'> 	netif_stop_queue(ndev);</div><div class='del'>-	napi_disable(&amp;priv-&gt;napi);</div><div class='add'>+	can_rx_offload_disable(&amp;priv-&gt;offload);</div><div class='ctx'> 	ti_hecc_stop(ndev);</div><div class='ctx'> 	free_irq(ndev-&gt;irq, ndev);</div><div class='ctx'> 	close_candev(ndev);</div><div class='ctx'> 	ti_hecc_transceiver_switch(priv, 0);</div><div class='ctx'> </div><div class='del'>-	can_led_event(ndev, CAN_LED_EVENT_STOP);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -872,61 +829,78 @@ static const struct net_device_ops ti_hecc_netdev_ops = {</div><div class='ctx'> 	.ndo_open		= ti_hecc_open,</div><div class='ctx'> 	.ndo_stop		= ti_hecc_close,</div><div class='ctx'> 	.ndo_start_xmit		= ti_hecc_xmit,</div><div class='del'>-	.ndo_change_mtu		= can_change_mtu,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct ethtool_ops ti_hecc_ethtool_ops = {</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct of_device_id ti_hecc_dt_ids[] = {</div><div class='add'>+	{</div><div class='add'>+		.compatible = "ti,am3517-hecc",</div><div class='add'>+	},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, ti_hecc_dt_ids);</div><div class='add'>+</div><div class='ctx'> static int ti_hecc_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *ndev = (struct net_device *)0;</div><div class='ctx'> 	struct ti_hecc_priv *priv;</div><div class='del'>-	struct ti_hecc_platform_data *pdata;</div><div class='del'>-	struct resource *mem, *irq;</div><div class='del'>-	void __iomem *addr;</div><div class='add'>+	struct device_node *np = pdev-&gt;dev.of_node;</div><div class='add'>+	struct regulator *reg_xceiver;</div><div class='ctx'> 	int err = -ENODEV;</div><div class='ctx'> </div><div class='del'>-	pdata = dev_get_platdata(&amp;pdev-&gt;dev);</div><div class='del'>-	if (!pdata) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "No platform data\n");</div><div class='del'>-		goto probe_exit;</div><div class='del'>-	}</div><div class='add'>+	if (!IS_ENABLED(CONFIG_OF) || !np)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	reg_xceiver = devm_regulator_get(&amp;pdev-&gt;dev, "xceiver");</div><div class='add'>+	if (PTR_ERR(reg_xceiver) == -EPROBE_DEFER)</div><div class='add'>+		return -EPROBE_DEFER;</div><div class='add'>+	else if (IS_ERR(reg_xceiver))</div><div class='add'>+		reg_xceiver = NULL;</div><div class='ctx'> </div><div class='del'>-	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='del'>-	if (!mem) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "No mem resources\n");</div><div class='del'>-		goto probe_exit;</div><div class='add'>+	ndev = alloc_candev(sizeof(struct ti_hecc_priv), HECC_MAX_TX_MBOX);</div><div class='add'>+	if (!ndev) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "alloc_candev failed\n");</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='del'>-	irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);</div><div class='del'>-	if (!irq) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "No irq resource\n");</div><div class='del'>-		goto probe_exit;</div><div class='add'>+	priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	/* handle hecc memory */</div><div class='add'>+	priv-&gt;base = devm_platform_ioremap_resource_byname(pdev, "hecc");</div><div class='add'>+	if (IS_ERR(priv-&gt;base)) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "hecc ioremap failed\n");</div><div class='add'>+		err = PTR_ERR(priv-&gt;base);</div><div class='add'>+		goto probe_exit_candev;</div><div class='ctx'> 	}</div><div class='del'>-	if (!request_mem_region(mem-&gt;start, resource_size(mem), pdev-&gt;name)) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "HECC region already claimed\n");</div><div class='del'>-		err = -EBUSY;</div><div class='del'>-		goto probe_exit;</div><div class='add'>+</div><div class='add'>+	/* handle hecc-ram memory */</div><div class='add'>+	priv-&gt;hecc_ram = devm_platform_ioremap_resource_byname(pdev,</div><div class='add'>+							       "hecc-ram");</div><div class='add'>+	if (IS_ERR(priv-&gt;hecc_ram)) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "hecc-ram ioremap failed\n");</div><div class='add'>+		err = PTR_ERR(priv-&gt;hecc_ram);</div><div class='add'>+		goto probe_exit_candev;</div><div class='ctx'> 	}</div><div class='del'>-	addr = ioremap(mem-&gt;start, resource_size(mem));</div><div class='del'>-	if (!addr) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "ioremap failed\n");</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto probe_exit_free_region;</div><div class='add'>+</div><div class='add'>+	/* handle mbx memory */</div><div class='add'>+	priv-&gt;mbx = devm_platform_ioremap_resource_byname(pdev, "mbx");</div><div class='add'>+	if (IS_ERR(priv-&gt;mbx)) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "mbx ioremap failed\n");</div><div class='add'>+		err = PTR_ERR(priv-&gt;mbx);</div><div class='add'>+		goto probe_exit_candev;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ndev = alloc_candev(sizeof(struct ti_hecc_priv), HECC_MAX_TX_MBOX);</div><div class='del'>-	if (!ndev) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "alloc_candev failed\n");</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto probe_exit_iounmap;</div><div class='add'>+	ndev-&gt;irq = platform_get_irq(pdev, 0);</div><div class='add'>+	if (ndev-&gt;irq &lt; 0) {</div><div class='add'>+		err = ndev-&gt;irq;</div><div class='add'>+		goto probe_exit_candev;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	priv = netdev_priv(ndev);</div><div class='ctx'> 	priv-&gt;ndev = ndev;</div><div class='del'>-	priv-&gt;base = addr;</div><div class='del'>-	priv-&gt;scc_ram_offset = pdata-&gt;scc_ram_offset;</div><div class='del'>-	priv-&gt;hecc_ram_offset = pdata-&gt;hecc_ram_offset;</div><div class='del'>-	priv-&gt;mbx_offset = pdata-&gt;mbx_offset;</div><div class='del'>-	priv-&gt;int_line = pdata-&gt;int_line;</div><div class='del'>-	priv-&gt;transceiver_switch = pdata-&gt;transceiver_switch;</div><div class='add'>+	priv-&gt;reg_xceiver = reg_xceiver;</div><div class='add'>+	priv-&gt;use_hecc1int = of_property_read_bool(np, "ti,use-hecc1int");</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;can.bittiming_const = &amp;ti_hecc_bittiming_const;</div><div class='ctx'> 	priv-&gt;can.do_set_mode = ti_hecc_do_set_mode;</div><div class='hunk'>@@ -934,11 +908,11 @@ static int ti_hecc_probe(struct platform_device *pdev)</div><div class='ctx'> 	priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_init(&amp;priv-&gt;mbx_lock);</div><div class='del'>-	ndev-&gt;irq = irq-&gt;start;</div><div class='ctx'> 	ndev-&gt;flags |= IFF_ECHO;</div><div class='ctx'> 	platform_set_drvdata(pdev, ndev);</div><div class='ctx'> 	SET_NETDEV_DEV(ndev, &amp;pdev-&gt;dev);</div><div class='ctx'> 	ndev-&gt;netdev_ops = &amp;ti_hecc_netdev_ops;</div><div class='add'>+	ndev-&gt;ethtool_ops = &amp;ti_hecc_ethtool_ops;</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;clk = clk_get(&amp;pdev-&gt;dev, "hecc_ck");</div><div class='ctx'> 	if (IS_ERR(priv-&gt;clk)) {</div><div class='hunk'>@@ -948,53 +922,57 @@ static int ti_hecc_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto probe_exit_candev;</div><div class='ctx'> 	}</div><div class='ctx'> 	priv-&gt;can.clock.freq = clk_get_rate(priv-&gt;clk);</div><div class='del'>-	netif_napi_add(ndev, &amp;priv-&gt;napi, ti_hecc_rx_poll,</div><div class='del'>-		HECC_DEF_NAPI_WEIGHT);</div><div class='ctx'> </div><div class='del'>-	clk_enable(priv-&gt;clk);</div><div class='add'>+	err = clk_prepare_enable(priv-&gt;clk);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "clk_prepare_enable() failed\n");</div><div class='add'>+		goto probe_exit_release_clk;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;offload.mailbox_read = ti_hecc_mailbox_read;</div><div class='add'>+	priv-&gt;offload.mb_first = HECC_RX_FIRST_MBOX;</div><div class='add'>+	priv-&gt;offload.mb_last = HECC_RX_LAST_MBOX;</div><div class='add'>+	err = can_rx_offload_add_timestamp(ndev, &amp;priv-&gt;offload);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "can_rx_offload_add_timestamp() failed\n");</div><div class='add'>+		goto probe_exit_disable_clk;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	err = register_candev(ndev);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "register_candev() failed\n");</div><div class='del'>-		goto probe_exit_clk;</div><div class='add'>+		goto probe_exit_offload;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	devm_can_led_init(ndev);</div><div class='del'>-</div><div class='ctx'> 	dev_info(&amp;pdev-&gt;dev, "device registered (reg_base=%p, irq=%u)\n",</div><div class='del'>-		priv-&gt;base, (u32) ndev-&gt;irq);</div><div class='add'>+		 priv-&gt;base, (u32)ndev-&gt;irq);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-probe_exit_clk:</div><div class='add'>+probe_exit_offload:</div><div class='add'>+	can_rx_offload_del(&amp;priv-&gt;offload);</div><div class='add'>+probe_exit_disable_clk:</div><div class='add'>+	clk_disable_unprepare(priv-&gt;clk);</div><div class='add'>+probe_exit_release_clk:</div><div class='ctx'> 	clk_put(priv-&gt;clk);</div><div class='ctx'> probe_exit_candev:</div><div class='ctx'> 	free_candev(ndev);</div><div class='del'>-probe_exit_iounmap:</div><div class='del'>-	iounmap(addr);</div><div class='del'>-probe_exit_free_region:</div><div class='del'>-	release_mem_region(mem-&gt;start, resource_size(mem));</div><div class='del'>-probe_exit:</div><div class='add'>+</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ti_hecc_remove(struct platform_device *pdev)</div><div class='add'>+static void ti_hecc_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='del'>-	struct resource *res;</div><div class='ctx'> 	struct net_device *ndev = platform_get_drvdata(pdev);</div><div class='ctx'> 	struct ti_hecc_priv *priv = netdev_priv(ndev);</div><div class='ctx'> </div><div class='ctx'> 	unregister_candev(ndev);</div><div class='del'>-	clk_disable(priv-&gt;clk);</div><div class='add'>+	clk_disable_unprepare(priv-&gt;clk);</div><div class='ctx'> 	clk_put(priv-&gt;clk);</div><div class='del'>-	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='del'>-	iounmap(priv-&gt;base);</div><div class='del'>-	release_mem_region(res-&gt;start, resource_size(res));</div><div class='add'>+	can_rx_offload_del(&amp;priv-&gt;offload);</div><div class='ctx'> 	free_candev(ndev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> #ifdef CONFIG_PM</div><div class='ctx'> static int ti_hecc_suspend(struct platform_device *pdev, pm_message_t state)</div><div class='ctx'> {</div><div class='hunk'>@@ -1009,7 +987,7 @@ static int ti_hecc_suspend(struct platform_device *pdev, pm_message_t state)</div><div class='ctx'> 	hecc_set_bit(priv, HECC_CANMC, HECC_CANMC_PDR);</div><div class='ctx'> 	priv-&gt;can.state = CAN_STATE_SLEEPING;</div><div class='ctx'> </div><div class='del'>-	clk_disable(priv-&gt;clk);</div><div class='add'>+	clk_disable_unprepare(priv-&gt;clk);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1018,8 +996,11 @@ static int ti_hecc_resume(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = platform_get_drvdata(pdev);</div><div class='ctx'> 	struct ti_hecc_priv *priv = netdev_priv(dev);</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='del'>-	clk_enable(priv-&gt;clk);</div><div class='add'>+	err = clk_prepare_enable(priv-&gt;clk);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='ctx'> </div><div class='ctx'> 	hecc_clear_bit(priv, HECC_CANMC, HECC_CANMC_PDR);</div><div class='ctx'> 	priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='hunk'>@@ -1040,6 +1021,7 @@ static int ti_hecc_resume(struct platform_device *pdev)</div><div class='ctx'> static struct platform_driver ti_hecc_driver = {</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		.name    = DRV_NAME,</div><div class='add'>+		.of_match_table = ti_hecc_dt_ids,</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe = ti_hecc_probe,</div><div class='ctx'> 	.remove = ti_hecc_remove,</div><div class='head'>diff --git a/drivers/net/can/usb/Kconfig b/drivers/net/can/usb/Kconfig<br/>index bcb272f6c68a..cf65a90816b9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/Kconfig?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/Kconfig</a></div><div class='hunk'>@@ -1,31 +1,75 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> menu "CAN USB interfaces"</div><div class='ctx'> 	depends on USB</div><div class='ctx'> </div><div class='add'>+config CAN_8DEV_USB</div><div class='add'>+	tristate "8 devices USB2CAN interface"</div><div class='add'>+	help</div><div class='add'>+	  This driver supports the USB2CAN interface</div><div class='add'>+	  from 8 devices (http://www.8devices.com).</div><div class='add'>+</div><div class='ctx'> config CAN_EMS_USB</div><div class='ctx'> 	tristate "EMS CPC-USB/ARM7 CAN/USB interface"</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  This driver is for the one channel CPC-USB/ARM7 CAN/USB interface</div><div class='ctx'> 	  from EMS Dr. Thomas Wuensche (http://www.ems-wuensche.de).</div><div class='ctx'> </div><div class='del'>-config CAN_ESD_USB2</div><div class='del'>-        tristate "ESD USB/2 CAN/USB interface"</div><div class='del'>-        ---help---</div><div class='del'>-          This driver supports the CAN-USB/2 interface</div><div class='del'>-          from esd electronic system design gmbh (http://www.esd.eu).</div><div class='add'>+config CAN_ESD_USB</div><div class='add'>+	tristate "esd electronics gmbh CAN/USB interfaces"</div><div class='add'>+	help</div><div class='add'>+	  This driver adds support for several CAN/USB interfaces</div><div class='add'>+	  from esd electronics gmbh (https://www.esd.eu).</div><div class='add'>+</div><div class='add'>+	  The drivers supports the following devices:</div><div class='add'>+	    - esd CAN-USB/2</div><div class='add'>+	    - esd CAN-USB/3-FD</div><div class='add'>+	    - esd CAN-USB/Micro</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose M here: the module</div><div class='add'>+	  will be called esd_usb.</div><div class='add'>+</div><div class='add'>+config CAN_ETAS_ES58X</div><div class='add'>+	tristate "ETAS ES58X CAN/USB interfaces"</div><div class='add'>+	select CRC16</div><div class='add'>+	select NET_DEVLINK</div><div class='add'>+	help</div><div class='add'>+	  This driver supports the ES581.4, ES582.1 and ES584.1 interfaces</div><div class='add'>+	  from ETAS GmbH (https://www.etas.com/en/products/es58x.php).</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose M here: the module</div><div class='add'>+	  will be called etas_es58x.</div><div class='add'>+</div><div class='add'>+config CAN_F81604</div><div class='add'>+        tristate "Fintek F81604 USB to 2CAN interface"</div><div class='add'>+        help</div><div class='add'>+          This driver supports the Fintek F81604 USB to 2CAN interface.</div><div class='add'>+          The device can support CAN2.0A/B protocol and also support</div><div class='add'>+          2 output pins to control external terminator (optional).</div><div class='add'>+</div><div class='add'>+          To compile this driver as a module, choose M here: the module will</div><div class='add'>+          be called f81604.</div><div class='add'>+</div><div class='add'>+          (see also https://www.fintek.com.tw).</div><div class='ctx'> </div><div class='ctx'> config CAN_GS_USB</div><div class='del'>-	tristate "Geschwister Schneider UG interfaces"</div><div class='del'>-	---help---</div><div class='del'>-	  This driver supports the Geschwister Schneider USB/CAN devices.</div><div class='add'>+	tristate "Geschwister Schneider UG and candleLight compatible interfaces"</div><div class='add'>+	select CAN_RX_OFFLOAD</div><div class='add'>+	help</div><div class='add'>+	  This driver supports the Geschwister Schneider and</div><div class='add'>+	  bytewerk.org candleLight compatible</div><div class='add'>+	  (https://github.com/candle-usb/candleLight_fw) USB/CAN</div><div class='add'>+	  interfaces.</div><div class='add'>+</div><div class='ctx'> 	  If unsure choose N,</div><div class='ctx'> 	  choose Y for built in support,</div><div class='ctx'> 	  M to compile as module (module will be named: gs_usb).</div><div class='ctx'> </div><div class='ctx'> config CAN_KVASER_USB</div><div class='ctx'> 	tristate "Kvaser CAN/USB interface"</div><div class='del'>-	---help---</div><div class='add'>+	select NET_DEVLINK</div><div class='add'>+	help</div><div class='ctx'> 	  This driver adds support for Kvaser CAN/USB devices like Kvaser</div><div class='del'>-	  Leaf Light and Kvaser USBcan II.</div><div class='add'>+	  Leaf Light, Kvaser USBcan II and Kvaser Memorator Pro 5xHS.</div><div class='ctx'> </div><div class='ctx'> 	  The driver provides support for the following devices:</div><div class='ctx'> 	    - Kvaser Leaf Light</div><div class='hunk'>@@ -44,38 +88,93 @@ config CAN_KVASER_USB</div><div class='ctx'> 	    - Kvaser Leaf Light "China"</div><div class='ctx'> 	    - Kvaser BlackBird SemiPro</div><div class='ctx'> 	    - Kvaser USBcan R</div><div class='add'>+	    - Kvaser USBcan R v2</div><div class='ctx'> 	    - Kvaser Leaf Light v2</div><div class='add'>+	    - Kvaser Leaf Light R v2</div><div class='ctx'> 	    - Kvaser Mini PCI Express HS</div><div class='add'>+	    - Kvaser Mini PCI Express 2xHS</div><div class='add'>+	    - Kvaser Mini PCIe 1xCAN</div><div class='add'>+	    - Kvaser USBcan Light 2xHS</div><div class='ctx'> 	    - Kvaser USBcan II HS/HS</div><div class='ctx'> 	    - Kvaser USBcan II HS/LS</div><div class='ctx'> 	    - Kvaser USBcan Rugged ("USBcan Rev B")</div><div class='ctx'> 	    - Kvaser Memorator HS/HS</div><div class='ctx'> 	    - Kvaser Memorator HS/LS</div><div class='ctx'> 	    - Scania VCI2 (if you have the Kvaser logo on top)</div><div class='add'>+	    - Kvaser BlackBird v2</div><div class='add'>+	    - Kvaser Leaf Pro HS v2</div><div class='add'>+	    - Kvaser Leaf v3</div><div class='add'>+	    - Kvaser Hybrid CAN/LIN</div><div class='add'>+	    - Kvaser Hybrid 2xCAN/LIN</div><div class='add'>+	    - Kvaser Hybrid Pro CAN/LIN</div><div class='add'>+	    - Kvaser Hybrid Pro 2xCAN/LIN</div><div class='add'>+	    - Kvaser Memorator 2xHS v2</div><div class='add'>+	    - Kvaser Memorator Pro 2xHS v2</div><div class='add'>+	    - Kvaser Memorator Pro 5xHS</div><div class='add'>+	    - Kvaser USBcan Light 4xHS</div><div class='add'>+	    - Kvaser USBcan Pro 2xHS v2</div><div class='add'>+	    - Kvaser USBcan Pro 4xHS</div><div class='add'>+	    - Kvaser USBcan Pro 5xCAN</div><div class='add'>+	    - Kvaser USBcan Pro 5xHS</div><div class='add'>+	    - Kvaser U100</div><div class='add'>+	    - Kvaser U100P</div><div class='add'>+	    - Kvaser U100S</div><div class='add'>+	    - ATI Memorator Pro 2xHS v2</div><div class='add'>+	    - ATI USBcan Pro 2xHS v2</div><div class='add'>+	    - Vining 800</div><div class='ctx'> </div><div class='ctx'> 	  If unsure, say N.</div><div class='ctx'> </div><div class='ctx'> 	  To compile this driver as a module, choose M here: the</div><div class='ctx'> 	  module will be called kvaser_usb.</div><div class='ctx'> </div><div class='add'>+config CAN_MCBA_USB</div><div class='add'>+	tristate "Microchip CAN BUS Analyzer interface"</div><div class='add'>+	help</div><div class='add'>+	  This driver supports the CAN BUS Analyzer interface</div><div class='add'>+	  from Microchip (http://www.microchip.com/development-tools/).</div><div class='add'>+</div><div class='add'>+config CAN_NCT6694</div><div class='add'>+	tristate "Nuvoton NCT6694 Socket CANfd support"</div><div class='add'>+	depends on MFD_NCT6694</div><div class='add'>+	select CAN_RX_OFFLOAD</div><div class='add'>+	help</div><div class='add'>+	  If you say yes to this option, support will be included for Nuvoton</div><div class='add'>+	  NCT6694, a USB device to socket CANfd controller.</div><div class='add'>+</div><div class='add'>+	  This driver can also be built as a module. If so, the module will</div><div class='add'>+	  be called nct6694_canfd.</div><div class='add'>+</div><div class='ctx'> config CAN_PEAK_USB</div><div class='ctx'> 	tristate "PEAK PCAN-USB/USB Pro interfaces for CAN 2.0b/CAN-FD"</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  This driver supports the PEAK-System Technik USB adapters that enable</div><div class='del'>-	  access to the CAN bus, with repect to the CAN 2.0b and/or CAN-FD</div><div class='add'>+	  access to the CAN bus, with respect to the CAN 2.0b and/or CAN-FD</div><div class='ctx'> 	  standards, that is:</div><div class='ctx'> </div><div class='ctx'> 	  PCAN-USB             single CAN 2.0b channel USB adapter</div><div class='ctx'> 	  PCAN-USB Pro         dual CAN 2.0b channels USB adapter</div><div class='ctx'> 	  PCAN-USB FD          single CAN-FD channel USB adapter</div><div class='ctx'> 	  PCAN-USB Pro FD      dual CAN-FD channels USB adapter</div><div class='add'>+	  PCAN-Chip USB        CAN-FD to USB stamp module</div><div class='add'>+	  PCAN-USB X6          6 CAN-FD channels USB adapter</div><div class='ctx'> </div><div class='ctx'> 	  (see also http://www.peak-system.com).</div><div class='ctx'> </div><div class='del'>-config CAN_8DEV_USB</div><div class='del'>-	tristate "8 devices USB2CAN interface"</div><div class='del'>-	---help---</div><div class='del'>-	  This driver supports the USB2CAN interface</div><div class='del'>-	  from 8 devices (http://www.8devices.com).</div><div class='add'>+config CAN_UCAN</div><div class='add'>+	tristate "Theobroma Systems UCAN interface"</div><div class='add'>+	help</div><div class='add'>+	  This driver supports the Theobroma Systems</div><div class='add'>+	  UCAN USB-CAN interface.</div><div class='add'>+</div><div class='add'>+	  The UCAN driver supports the microcontroller-based USB/CAN</div><div class='add'>+	  adapters from Theobroma Systems. There are two form-factors</div><div class='add'>+	  that run essentially the same firmware:</div><div class='add'>+</div><div class='add'>+	  * Seal: standalone USB stick</div><div class='add'>+	          https://www.theobroma-systems.com/seal)</div><div class='add'>+	  * Mule: integrated on the PCB of various System-on-Modules</div><div class='add'>+	          from Theobroma Systems like the A31-µQ7 and the RK3399-Q7</div><div class='add'>+	          (https://www.theobroma-systems.com/rk3399-q7)</div><div class='ctx'> </div><div class='ctx'> endmenu</div><div class='head'>diff --git a/drivers/net/can/usb/Makefile b/drivers/net/can/usb/Makefile<br/>index a64cf983fb87..fcafb1ac262e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/Makefile?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/Makefile</a></div><div class='hunk'>@@ -1,10 +1,16 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> #</div><div class='ctx'> #  Makefile for the Linux Controller Area Network USB drivers.</div><div class='ctx'> #</div><div class='ctx'> </div><div class='add'>+obj-$(CONFIG_CAN_8DEV_USB) += usb_8dev.o</div><div class='ctx'> obj-$(CONFIG_CAN_EMS_USB) += ems_usb.o</div><div class='del'>-obj-$(CONFIG_CAN_ESD_USB2) += esd_usb2.o</div><div class='add'>+obj-$(CONFIG_CAN_ESD_USB) += esd_usb.o</div><div class='add'>+obj-$(CONFIG_CAN_ETAS_ES58X) += etas_es58x/</div><div class='add'>+obj-$(CONFIG_CAN_F81604) += f81604.o</div><div class='ctx'> obj-$(CONFIG_CAN_GS_USB) += gs_usb.o</div><div class='del'>-obj-$(CONFIG_CAN_KVASER_USB) += kvaser_usb.o</div><div class='add'>+obj-$(CONFIG_CAN_KVASER_USB) += kvaser_usb/</div><div class='add'>+obj-$(CONFIG_CAN_MCBA_USB) += mcba_usb.o</div><div class='add'>+obj-$(CONFIG_CAN_NCT6694) += nct6694_canfd.o</div><div class='ctx'> obj-$(CONFIG_CAN_PEAK_USB) += peak_usb/</div><div class='del'>-obj-$(CONFIG_CAN_8DEV_USB) += usb_8dev.o</div><div class='add'>+obj-$(CONFIG_CAN_UCAN) += ucan.o</div><div class='head'>diff --git a/drivers/net/can/usb/ems_usb.c b/drivers/net/can/usb/ems_usb.c<br/>index 2d390384ef3b..de8e212a1366 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/ems_usb.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/ems_usb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/ems_usb.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/ems_usb.c</a></div><div class='hunk'>@@ -1,21 +1,10 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='ctx'>  * CAN driver for EMS Dr. Thomas Wuensche CPC-USB/ARM7</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2004-2009 EMS Dr. Thomas Wuensche</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms of the GNU General Public License as published</div><div class='del'>- * by the Free Software Foundation; version 2 of the License.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License along</div><div class='del'>- * with this program; if not, write to the Free Software Foundation, Inc.,</div><div class='del'>- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.</div><div class='ctx'>  */</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='ctx'> #include &lt;linux/signal.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -117,6 +106,9 @@ MODULE_LICENSE("GPL v2");</div><div class='ctx'>  */</div><div class='ctx'> #define EMS_USB_ARM7_CLOCK 8000000</div><div class='ctx'> </div><div class='add'>+#define CPC_TX_QUEUE_TRIGGER_LOW	25</div><div class='add'>+#define CPC_TX_QUEUE_TRIGGER_HIGH	35</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * CAN-Message representation in a CPC_MSG. Message object type is</div><div class='ctx'>  * CPC_MSG_TYPE_CAN_FRAME or CPC_MSG_TYPE_RTR_FRAME or</div><div class='hunk'>@@ -203,7 +195,7 @@ struct __packed ems_cpc_msg {</div><div class='ctx'> 	__le32 ts_sec;	/* timestamp in seconds */</div><div class='ctx'> 	__le32 ts_nsec;	/* timestamp in nano seconds */</div><div class='ctx'> </div><div class='del'>-	union {</div><div class='add'>+	union __packed {</div><div class='ctx'> 		u8 generic[64];</div><div class='ctx'> 		struct cpc_can_msg can_msg;</div><div class='ctx'> 		struct cpc_can_params can_params;</div><div class='hunk'>@@ -239,7 +231,6 @@ struct ems_tx_urb_context {</div><div class='ctx'> 	struct ems_usb *dev;</div><div class='ctx'> </div><div class='ctx'> 	u32 echo_index;</div><div class='del'>-	u8 dlc;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct ems_usb {</div><div class='hunk'>@@ -264,6 +255,8 @@ struct ems_usb {</div><div class='ctx'> 	unsigned int free_slots; /* remember number of available slots */</div><div class='ctx'> </div><div class='ctx'> 	struct ems_cpc_msg active_params; /* active controller parameters */</div><div class='add'>+	void *rxbuf[MAX_RX_URBS];</div><div class='add'>+	dma_addr_t rxbuf_dma[MAX_RX_URBS];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void ems_usb_read_interrupt_callback(struct urb *urb)</div><div class='hunk'>@@ -278,10 +271,15 @@ static void ems_usb_read_interrupt_callback(struct urb *urb)</div><div class='ctx'> 	switch (urb-&gt;status) {</div><div class='ctx'> 	case 0:</div><div class='ctx'> 		dev-&gt;free_slots = dev-&gt;intr_in_buffer[1];</div><div class='add'>+		if (dev-&gt;free_slots &gt; CPC_TX_QUEUE_TRIGGER_HIGH &amp;&amp;</div><div class='add'>+		    netif_queue_stopped(netdev))</div><div class='add'>+			netif_wake_queue(netdev);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case -ECONNRESET: /* unlink */</div><div class='ctx'> 	case -ENOENT:</div><div class='add'>+	case -EPIPE:</div><div class='add'>+	case -EPROTO:</div><div class='ctx'> 	case -ESHUTDOWN:</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -310,7 +308,7 @@ static void ems_usb_rx_can_msg(struct ems_usb *dev, struct ems_cpc_msg *msg)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	cf-&gt;can_id = le32_to_cpu(msg-&gt;msg.can_msg.id);</div><div class='del'>-	cf-&gt;can_dlc = get_can_dlc(msg-&gt;msg.can_msg.length &amp; 0xF);</div><div class='add'>+	cf-&gt;len = can_cc_dlc2len(msg-&gt;msg.can_msg.length &amp; 0xF);</div><div class='ctx'> </div><div class='ctx'> 	if (msg-&gt;type == CPC_MSG_TYPE_EXT_CAN_FRAME ||</div><div class='ctx'> 	    msg-&gt;type == CPC_MSG_TYPE_EXT_RTR_FRAME)</div><div class='hunk'>@@ -320,12 +318,13 @@ static void ems_usb_rx_can_msg(struct ems_usb *dev, struct ems_cpc_msg *msg)</div><div class='ctx'> 	    msg-&gt;type == CPC_MSG_TYPE_EXT_RTR_FRAME) {</div><div class='ctx'> 		cf-&gt;can_id |= CAN_RTR_FLAG;</div><div class='ctx'> 	} else {</div><div class='del'>-		for (i = 0; i &lt; cf-&gt;can_dlc; i++)</div><div class='add'>+		for (i = 0; i &lt; cf-&gt;len; i++)</div><div class='ctx'> 			cf-&gt;data[i] = msg-&gt;msg.can_msg.msg[i];</div><div class='del'>-	}</div><div class='ctx'> </div><div class='add'>+		stats-&gt;rx_bytes += cf-&gt;len;</div><div class='add'>+	}</div><div class='ctx'> 	stats-&gt;rx_packets++;</div><div class='del'>-	stats-&gt;rx_bytes += cf-&gt;can_dlc;</div><div class='add'>+</div><div class='ctx'> 	netif_rx(skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -336,15 +335,14 @@ static void ems_usb_rx_err(struct ems_usb *dev, struct ems_cpc_msg *msg)</div><div class='ctx'> 	struct net_device_stats *stats = &amp;dev-&gt;netdev-&gt;stats;</div><div class='ctx'> </div><div class='ctx'> 	skb = alloc_can_err_skb(dev-&gt;netdev, &amp;cf);</div><div class='del'>-	if (skb == NULL)</div><div class='del'>-		return;</div><div class='ctx'> </div><div class='ctx'> 	if (msg-&gt;type == CPC_MSG_TYPE_CAN_STATE) {</div><div class='ctx'> 		u8 state = msg-&gt;msg.can_state;</div><div class='ctx'> </div><div class='ctx'> 		if (state &amp; SJA1000_SR_BS) {</div><div class='ctx'> 			dev-&gt;can.state = CAN_STATE_BUS_OFF;</div><div class='del'>-			cf-&gt;can_id |= CAN_ERR_BUSOFF;</div><div class='add'>+			if (skb)</div><div class='add'>+				cf-&gt;can_id |= CAN_ERR_BUSOFF;</div><div class='ctx'> </div><div class='ctx'> 			dev-&gt;can.can_stats.bus_off++;</div><div class='ctx'> 			can_bus_off(dev-&gt;netdev);</div><div class='hunk'>@@ -362,46 +360,53 @@ static void ems_usb_rx_err(struct ems_usb *dev, struct ems_cpc_msg *msg)</div><div class='ctx'> </div><div class='ctx'> 		/* bus error interrupt */</div><div class='ctx'> 		dev-&gt;can.can_stats.bus_error++;</div><div class='del'>-		stats-&gt;rx_errors++;</div><div class='ctx'> </div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='add'>+		if (skb) {</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='ctx'> </div><div class='del'>-		switch (ecc &amp; SJA1000_ECC_MASK) {</div><div class='del'>-		case SJA1000_ECC_BIT:</div><div class='del'>-			cf-&gt;data[2] |= CAN_ERR_PROT_BIT;</div><div class='del'>-			break;</div><div class='del'>-		case SJA1000_ECC_FORM:</div><div class='del'>-			cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='del'>-			break;</div><div class='del'>-		case SJA1000_ECC_STUFF:</div><div class='del'>-			cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			cf-&gt;data[2] |= CAN_ERR_PROT_UNSPEC;</div><div class='del'>-			cf-&gt;data[3] = ecc &amp; SJA1000_ECC_SEG;</div><div class='del'>-			break;</div><div class='add'>+			switch (ecc &amp; SJA1000_ECC_MASK) {</div><div class='add'>+			case SJA1000_ECC_BIT:</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_BIT;</div><div class='add'>+				break;</div><div class='add'>+			case SJA1000_ECC_FORM:</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='add'>+				break;</div><div class='add'>+			case SJA1000_ECC_STUFF:</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='add'>+				break;</div><div class='add'>+			default:</div><div class='add'>+				cf-&gt;data[3] = ecc &amp; SJA1000_ECC_SEG;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Error occurred during transmission? */</div><div class='del'>-		if ((ecc &amp; SJA1000_ECC_DIR) == 0)</div><div class='del'>-			cf-&gt;data[2] |= CAN_ERR_PROT_TX;</div><div class='add'>+		if ((ecc &amp; SJA1000_ECC_DIR) == 0) {</div><div class='add'>+			stats-&gt;tx_errors++;</div><div class='add'>+			if (skb)</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_TX;</div><div class='add'>+		} else {</div><div class='add'>+			stats-&gt;rx_errors++;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-		if (dev-&gt;can.state == CAN_STATE_ERROR_WARNING ||</div><div class='del'>-		    dev-&gt;can.state == CAN_STATE_ERROR_PASSIVE) {</div><div class='add'>+		if (skb &amp;&amp; (dev-&gt;can.state == CAN_STATE_ERROR_WARNING ||</div><div class='add'>+			    dev-&gt;can.state == CAN_STATE_ERROR_PASSIVE)) {</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='ctx'> 			cf-&gt;data[1] = (txerr &gt; rxerr) ?</div><div class='ctx'> 			    CAN_ERR_CRTL_TX_PASSIVE : CAN_ERR_CRTL_RX_PASSIVE;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else if (msg-&gt;type == CPC_MSG_TYPE_OVERRUN) {</div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='del'>-		cf-&gt;data[1] = CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='add'>+		if (skb) {</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='add'>+			cf-&gt;data[1] = CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		stats-&gt;rx_over_errors++;</div><div class='ctx'> 		stats-&gt;rx_errors++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	stats-&gt;rx_packets++;</div><div class='del'>-	stats-&gt;rx_bytes += cf-&gt;can_dlc;</div><div class='del'>-	netif_rx(skb);</div><div class='add'>+	if (skb)</div><div class='add'>+		netif_rx(skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -516,19 +521,16 @@ static void ems_usb_write_bulk_callback(struct urb *urb)</div><div class='ctx'> 	if (urb-&gt;status)</div><div class='ctx'> 		netdev_info(netdev, "Tx URB aborted (%d)\n", urb-&gt;status);</div><div class='ctx'> </div><div class='del'>-	netdev-&gt;trans_start = jiffies;</div><div class='add'>+	netif_trans_update(netdev);</div><div class='ctx'> </div><div class='ctx'> 	/* transmission complete interrupt */</div><div class='ctx'> 	netdev-&gt;stats.tx_packets++;</div><div class='del'>-	netdev-&gt;stats.tx_bytes += context-&gt;dlc;</div><div class='del'>-</div><div class='del'>-	can_get_echo_skb(netdev, context-&gt;echo_index);</div><div class='add'>+	netdev-&gt;stats.tx_bytes += can_get_echo_skb(netdev, context-&gt;echo_index,</div><div class='add'>+						   NULL);</div><div class='ctx'> </div><div class='ctx'> 	/* Release context */</div><div class='ctx'> 	context-&gt;echo_index = MAX_TX_URBS;</div><div class='ctx'> </div><div class='del'>-	if (netif_queue_stopped(netdev))</div><div class='del'>-		netif_wake_queue(netdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -588,22 +590,22 @@ static int ems_usb_start(struct ems_usb *dev)</div><div class='ctx'> 	int err, i;</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;intr_in_buffer[0] = 0;</div><div class='del'>-	dev-&gt;free_slots = 15; /* initial size */</div><div class='add'>+	dev-&gt;free_slots = 50; /* initial size */</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; MAX_RX_URBS; i++) {</div><div class='ctx'> 		struct urb *urb = NULL;</div><div class='ctx'> 		u8 *buf = NULL;</div><div class='add'>+		dma_addr_t buf_dma;</div><div class='ctx'> </div><div class='ctx'> 		/* create a URB, and a buffer for it */</div><div class='ctx'> 		urb = usb_alloc_urb(0, GFP_KERNEL);</div><div class='ctx'> 		if (!urb) {</div><div class='del'>-			netdev_err(netdev, "No memory left for URBs\n");</div><div class='ctx'> 			err = -ENOMEM;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		buf = usb_alloc_coherent(dev-&gt;udev, RX_BUFFER_SIZE, GFP_KERNEL,</div><div class='del'>-					 &amp;urb-&gt;transfer_dma);</div><div class='add'>+					 &amp;buf_dma);</div><div class='ctx'> 		if (!buf) {</div><div class='ctx'> 			netdev_err(netdev, "No memory left for USB buffer\n");</div><div class='ctx'> 			usb_free_urb(urb);</div><div class='hunk'>@@ -611,6 +613,8 @@ static int ems_usb_start(struct ems_usb *dev)</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		urb-&gt;transfer_dma = buf_dma;</div><div class='add'>+</div><div class='ctx'> 		usb_fill_bulk_urb(urb, dev-&gt;udev, usb_rcvbulkpipe(dev-&gt;udev, 2),</div><div class='ctx'> 				  buf, RX_BUFFER_SIZE,</div><div class='ctx'> 				  ems_usb_read_bulk_callback, dev);</div><div class='hunk'>@@ -626,6 +630,9 @@ static int ems_usb_start(struct ems_usb *dev)</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		dev-&gt;rxbuf[i] = buf;</div><div class='add'>+		dev-&gt;rxbuf_dma[i] = buf_dma;</div><div class='add'>+</div><div class='ctx'> 		/* Drop reference, USB core will take care of freeing it */</div><div class='ctx'> 		usb_free_urb(urb);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -691,6 +698,10 @@ static void unlink_all_urbs(struct ems_usb *dev)</div><div class='ctx'> </div><div class='ctx'> 	usb_kill_anchored_urbs(&amp;dev-&gt;rx_submitted);</div><div class='ctx'> </div><div class='add'>+	for (i = 0; i &lt; MAX_RX_URBS; ++i)</div><div class='add'>+		usb_free_coherent(dev-&gt;udev, RX_BUFFER_SIZE,</div><div class='add'>+				  dev-&gt;rxbuf[i], dev-&gt;rxbuf_dma[i]);</div><div class='add'>+</div><div class='ctx'> 	usb_kill_anchored_urbs(&amp;dev-&gt;tx_submitted);</div><div class='ctx'> 	atomic_set(&amp;dev-&gt;active_tx_urbs, 0);</div><div class='ctx'> </div><div class='hunk'>@@ -744,15 +755,13 @@ static netdev_tx_t ems_usb_start_xmit(struct sk_buff *skb, struct net_device *ne</div><div class='ctx'> 	size_t size = CPC_HEADER_SIZE + CPC_MSG_HEADER_LEN</div><div class='ctx'> 			+ sizeof(struct cpc_can_msg);</div><div class='ctx'> </div><div class='del'>-	if (can_dropped_invalid_skb(netdev, skb))</div><div class='add'>+	if (can_dev_dropped_skb(netdev, skb))</div><div class='ctx'> 		return NETDEV_TX_OK;</div><div class='ctx'> </div><div class='ctx'> 	/* create a URB, and a buffer for it, and copy the data to the URB */</div><div class='ctx'> 	urb = usb_alloc_urb(0, GFP_ATOMIC);</div><div class='del'>-	if (!urb) {</div><div class='del'>-		netdev_err(netdev, "No memory left for URBs\n");</div><div class='add'>+	if (!urb)</div><div class='ctx'> 		goto nomem;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	buf = usb_alloc_coherent(dev-&gt;udev, size, GFP_ATOMIC, &amp;urb-&gt;transfer_dma);</div><div class='ctx'> 	if (!buf) {</div><div class='hunk'>@@ -764,7 +773,7 @@ static netdev_tx_t ems_usb_start_xmit(struct sk_buff *skb, struct net_device *ne</div><div class='ctx'> 	msg = (struct ems_cpc_msg *)&amp;buf[CPC_HEADER_SIZE];</div><div class='ctx'> </div><div class='ctx'> 	msg-&gt;msg.can_msg.id = cpu_to_le32(cf-&gt;can_id &amp; CAN_ERR_MASK);</div><div class='del'>-	msg-&gt;msg.can_msg.length = cf-&gt;can_dlc;</div><div class='add'>+	msg-&gt;msg.can_msg.length = cf-&gt;len;</div><div class='ctx'> </div><div class='ctx'> 	if (cf-&gt;can_id &amp; CAN_RTR_FLAG) {</div><div class='ctx'> 		msg-&gt;type = cf-&gt;can_id &amp; CAN_EFF_FLAG ?</div><div class='hunk'>@@ -775,10 +784,10 @@ static netdev_tx_t ems_usb_start_xmit(struct sk_buff *skb, struct net_device *ne</div><div class='ctx'> 		msg-&gt;type = cf-&gt;can_id &amp; CAN_EFF_FLAG ?</div><div class='ctx'> 			CPC_CMD_TYPE_EXT_CAN_FRAME : CPC_CMD_TYPE_CAN_FRAME;</div><div class='ctx'> </div><div class='del'>-		for (i = 0; i &lt; cf-&gt;can_dlc; i++)</div><div class='add'>+		for (i = 0; i &lt; cf-&gt;len; i++)</div><div class='ctx'> 			msg-&gt;msg.can_msg.msg[i] = cf-&gt;data[i];</div><div class='ctx'> </div><div class='del'>-		msg-&gt;length = CPC_CAN_MSG_MIN_SIZE + cf-&gt;can_dlc;</div><div class='add'>+		msg-&gt;length = CPC_CAN_MSG_MIN_SIZE + cf-&gt;len;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; MAX_TX_URBS; i++) {</div><div class='hunk'>@@ -803,24 +812,22 @@ static netdev_tx_t ems_usb_start_xmit(struct sk_buff *skb, struct net_device *ne</div><div class='ctx'> </div><div class='ctx'> 	context-&gt;dev = dev;</div><div class='ctx'> 	context-&gt;echo_index = i;</div><div class='del'>-	context-&gt;dlc = cf-&gt;can_dlc;</div><div class='ctx'> </div><div class='ctx'> 	usb_fill_bulk_urb(urb, dev-&gt;udev, usb_sndbulkpipe(dev-&gt;udev, 2), buf,</div><div class='ctx'> 			  size, ems_usb_write_bulk_callback, context);</div><div class='ctx'> 	urb-&gt;transfer_flags |= URB_NO_TRANSFER_DMA_MAP;</div><div class='ctx'> 	usb_anchor_urb(urb, &amp;dev-&gt;tx_submitted);</div><div class='ctx'> </div><div class='del'>-	can_put_echo_skb(skb, netdev, context-&gt;echo_index);</div><div class='add'>+	can_put_echo_skb(skb, netdev, context-&gt;echo_index, 0);</div><div class='ctx'> </div><div class='ctx'> 	atomic_inc(&amp;dev-&gt;active_tx_urbs);</div><div class='ctx'> </div><div class='ctx'> 	err = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='ctx'> 	if (unlikely(err)) {</div><div class='del'>-		can_free_echo_skb(netdev, context-&gt;echo_index);</div><div class='add'>+		can_free_echo_skb(netdev, context-&gt;echo_index, NULL);</div><div class='ctx'> </div><div class='ctx'> 		usb_unanchor_urb(urb);</div><div class='ctx'> 		usb_free_coherent(dev-&gt;udev, size, buf, urb-&gt;transfer_dma);</div><div class='del'>-		dev_kfree_skb(skb);</div><div class='ctx'> </div><div class='ctx'> 		atomic_dec(&amp;dev-&gt;active_tx_urbs);</div><div class='ctx'> </div><div class='hunk'>@@ -832,11 +839,11 @@ static netdev_tx_t ems_usb_start_xmit(struct sk_buff *skb, struct net_device *ne</div><div class='ctx'> 			stats-&gt;tx_dropped++;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='del'>-		netdev-&gt;trans_start = jiffies;</div><div class='add'>+		netif_trans_update(netdev);</div><div class='ctx'> </div><div class='ctx'> 		/* Slow down tx path */</div><div class='ctx'> 		if (atomic_read(&amp;dev-&gt;active_tx_urbs) &gt;= MAX_TX_URBS ||</div><div class='del'>-		    dev-&gt;free_slots &lt; 5) {</div><div class='add'>+		    dev-&gt;free_slots &lt; CPC_TX_QUEUE_TRIGGER_LOW) {</div><div class='ctx'> 			netif_stop_queue(netdev);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -878,11 +885,14 @@ static const struct net_device_ops ems_usb_netdev_ops = {</div><div class='ctx'> 	.ndo_open = ems_usb_open,</div><div class='ctx'> 	.ndo_stop = ems_usb_close,</div><div class='ctx'> 	.ndo_start_xmit = ems_usb_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops ems_usb_ethtool_ops = {</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct can_bittiming_const ems_usb_bittiming_const = {</div><div class='del'>-	.name = "ems_usb",</div><div class='add'>+	.name = KBUILD_MODNAME,</div><div class='ctx'> 	.tseg1_min = 1,</div><div class='ctx'> 	.tseg1_max = 16,</div><div class='ctx'> 	.tseg2_min = 1,</div><div class='hunk'>@@ -992,6 +1002,7 @@ static int ems_usb_probe(struct usb_interface *intf,</div><div class='ctx'> 	dev-&gt;can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES;</div><div class='ctx'> </div><div class='ctx'> 	netdev-&gt;netdev_ops = &amp;ems_usb_netdev_ops;</div><div class='add'>+	netdev-&gt;ethtool_ops = &amp;ems_usb_ethtool_ops;</div><div class='ctx'> </div><div class='ctx'> 	netdev-&gt;flags |= IFF_ECHO; /* we support local echo */</div><div class='ctx'> </div><div class='hunk'>@@ -1004,10 +1015,8 @@ static int ems_usb_probe(struct usb_interface *intf,</div><div class='ctx'> 		dev-&gt;tx_contexts[i].echo_index = MAX_TX_URBS;</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;intr_urb = usb_alloc_urb(0, GFP_KERNEL);</div><div class='del'>-	if (!dev-&gt;intr_urb) {</div><div class='del'>-		dev_err(&amp;intf-&gt;dev, "Couldn't alloc intr URB\n");</div><div class='add'>+	if (!dev-&gt;intr_urb)</div><div class='ctx'> 		goto cleanup_candev;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;intr_in_buffer = kzalloc(INTR_IN_BUFFER_SIZE, GFP_KERNEL);</div><div class='ctx'> 	if (!dev-&gt;intr_in_buffer)</div><div class='hunk'>@@ -1064,19 +1073,21 @@ static void ems_usb_disconnect(struct usb_interface *intf)</div><div class='ctx'> </div><div class='ctx'> 	if (dev) {</div><div class='ctx'> 		unregister_netdev(dev-&gt;netdev);</div><div class='del'>-		free_candev(dev-&gt;netdev);</div><div class='ctx'> </div><div class='ctx'> 		unlink_all_urbs(dev);</div><div class='ctx'> </div><div class='ctx'> 		usb_free_urb(dev-&gt;intr_urb);</div><div class='ctx'> </div><div class='ctx'> 		kfree(dev-&gt;intr_in_buffer);</div><div class='add'>+		kfree(dev-&gt;tx_msg_buffer);</div><div class='add'>+</div><div class='add'>+		free_candev(dev-&gt;netdev);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* usb specific object needed to register this driver with the usb subsystem */</div><div class='ctx'> static struct usb_driver ems_usb_driver = {</div><div class='del'>-	.name = "ems_usb",</div><div class='add'>+	.name = KBUILD_MODNAME,</div><div class='ctx'> 	.probe = ems_usb_probe,</div><div class='ctx'> 	.disconnect = ems_usb_disconnect,</div><div class='ctx'> 	.id_table = ems_usb_table,</div><div class='head'>diff --git a/drivers/net/can/usb/esd_usb.c b/drivers/net/can/usb/esd_usb.c<br/>new file mode 100644<br/>index 000000000000..08da507faef4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/esd_usb.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/esd_usb.c</a></div><div class='hunk'>@@ -0,0 +1,1398 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * CAN driver for esd electronics gmbh CAN-USB/2, CAN-USB/3 and CAN-USB/Micro</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2010-2012 esd electronic system design gmbh, Matthias Fuchs &lt;socketcan@esd.eu&gt;</div><div class='add'>+ * Copyright (C) 2022-2024 esd electronics gmbh, Frank Jungclaus &lt;frank.jungclaus@esd.eu&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/can.h&gt;</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/can/error.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/signal.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/units.h&gt;</div><div class='add'>+#include &lt;linux/usb.h&gt;</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Matthias Fuchs &lt;socketcan@esd.eu&gt;");</div><div class='add'>+MODULE_AUTHOR("Frank Jungclaus &lt;frank.jungclaus@esd.eu&gt;");</div><div class='add'>+MODULE_DESCRIPTION("CAN driver for esd electronics gmbh CAN-USB/2, CAN-USB/3 and CAN-USB/Micro interfaces");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='add'>+</div><div class='add'>+/* USB vendor and product ID */</div><div class='add'>+#define ESD_USB_ESDGMBH_VENDOR_ID	0x0ab4</div><div class='add'>+#define ESD_USB_CANUSB2_PRODUCT_ID	0x0010</div><div class='add'>+#define ESD_USB_CANUSBM_PRODUCT_ID	0x0011</div><div class='add'>+#define ESD_USB_CANUSB3_PRODUCT_ID	0x0014</div><div class='add'>+</div><div class='add'>+/* CAN controller clock frequencies */</div><div class='add'>+#define ESD_USB_2_CAN_CLOCK	(60 * MEGA) /* Hz */</div><div class='add'>+#define ESD_USB_M_CAN_CLOCK	(36 * MEGA) /* Hz */</div><div class='add'>+#define ESD_USB_3_CAN_CLOCK	(80 * MEGA) /* Hz */</div><div class='add'>+</div><div class='add'>+/* Maximum number of CAN nets */</div><div class='add'>+#define ESD_USB_MAX_NETS	2</div><div class='add'>+</div><div class='add'>+/* USB commands */</div><div class='add'>+#define ESD_USB_CMD_VERSION		1 /* also used for VERSION_REPLY */</div><div class='add'>+#define ESD_USB_CMD_CAN_RX		2 /* device to host only */</div><div class='add'>+#define ESD_USB_CMD_CAN_TX		3 /* also used for TX_DONE */</div><div class='add'>+#define ESD_USB_CMD_SETBAUD		4 /* also used for SETBAUD_REPLY */</div><div class='add'>+#define ESD_USB_CMD_TS			5 /* also used for TS_REPLY */</div><div class='add'>+#define ESD_USB_CMD_IDADD		6 /* also used for IDADD_REPLY */</div><div class='add'>+</div><div class='add'>+/* esd CAN message flags - dlc field */</div><div class='add'>+#define ESD_USB_RTR	BIT(4)</div><div class='add'>+#define ESD_USB_NO_BRS	BIT(4)</div><div class='add'>+#define ESD_USB_ESI	BIT(5)</div><div class='add'>+#define ESD_USB_FD	BIT(7)</div><div class='add'>+</div><div class='add'>+/* esd CAN message flags - id field */</div><div class='add'>+#define ESD_USB_EXTID	BIT(29)</div><div class='add'>+#define ESD_USB_EVENT	BIT(30)</div><div class='add'>+#define ESD_USB_IDMASK	GENMASK(28, 0)</div><div class='add'>+</div><div class='add'>+/* esd CAN event ids */</div><div class='add'>+#define ESD_USB_EV_CAN_ERROR_EXT	2 /* CAN controller specific diagnostic data */</div><div class='add'>+</div><div class='add'>+/* baudrate message flags */</div><div class='add'>+#define ESD_USB_LOM	BIT(30) /* Listen Only Mode */</div><div class='add'>+#define ESD_USB_UBR	BIT(31) /* User Bit Rate (controller BTR) in bits 0..27 */</div><div class='add'>+#define ESD_USB_NO_BAUDRATE	GENMASK(30, 0) /* bit rate unconfigured */</div><div class='add'>+</div><div class='add'>+/* bit timing esd CAN-USB */</div><div class='add'>+#define ESD_USB_2_TSEG1_SHIFT	16</div><div class='add'>+#define ESD_USB_2_TSEG2_SHIFT	20</div><div class='add'>+#define ESD_USB_2_SJW_SHIFT	14</div><div class='add'>+#define ESD_USB_M_SJW_SHIFT	24</div><div class='add'>+#define ESD_USB_TRIPLE_SAMPLES	BIT(23)</div><div class='add'>+</div><div class='add'>+/* Transmitter Delay Compensation */</div><div class='add'>+#define ESD_USB_3_TDC_MODE_AUTO	0</div><div class='add'>+</div><div class='add'>+/* esd IDADD message */</div><div class='add'>+#define ESD_USB_ID_ENABLE	BIT(7)</div><div class='add'>+#define ESD_USB_MAX_ID_SEGMENT	64</div><div class='add'>+</div><div class='add'>+/* SJA1000 ECC register (emulated by usb firmware) */</div><div class='add'>+#define ESD_USB_SJA1000_ECC_SEG		GENMASK(4, 0)</div><div class='add'>+#define ESD_USB_SJA1000_ECC_DIR		BIT(5)</div><div class='add'>+#define ESD_USB_SJA1000_ECC_ERR		BIT(2, 1)</div><div class='add'>+#define ESD_USB_SJA1000_ECC_BIT		0x00</div><div class='add'>+#define ESD_USB_SJA1000_ECC_FORM	BIT(6)</div><div class='add'>+#define ESD_USB_SJA1000_ECC_STUFF	BIT(7)</div><div class='add'>+#define ESD_USB_SJA1000_ECC_MASK	GENMASK(7, 6)</div><div class='add'>+</div><div class='add'>+/* esd bus state event codes */</div><div class='add'>+#define ESD_USB_BUSSTATE_MASK	GENMASK(7, 6)</div><div class='add'>+#define ESD_USB_BUSSTATE_WARN	BIT(6)</div><div class='add'>+#define ESD_USB_BUSSTATE_ERRPASSIVE	BIT(7)</div><div class='add'>+#define ESD_USB_BUSSTATE_BUSOFF	GENMASK(7, 6)</div><div class='add'>+</div><div class='add'>+#define ESD_USB_RX_BUFFER_SIZE		1024</div><div class='add'>+#define ESD_USB_MAX_RX_URBS		4</div><div class='add'>+#define ESD_USB_MAX_TX_URBS		16 /* must be power of 2 */</div><div class='add'>+</div><div class='add'>+/* Modes for CAN-USB/3, to be used for esd_usb_3_set_baudrate_msg_x.mode */</div><div class='add'>+#define ESD_USB_3_BAUDRATE_MODE_DISABLE		0 /* remove from bus */</div><div class='add'>+#define ESD_USB_3_BAUDRATE_MODE_INDEX		1 /* ESD (CiA) bit rate idx */</div><div class='add'>+#define ESD_USB_3_BAUDRATE_MODE_BTR_CTRL	2 /* BTR values (controller)*/</div><div class='add'>+#define ESD_USB_3_BAUDRATE_MODE_BTR_CANONICAL	3 /* BTR values (canonical) */</div><div class='add'>+#define ESD_USB_3_BAUDRATE_MODE_NUM		4 /* numerical bit rate */</div><div class='add'>+#define ESD_USB_3_BAUDRATE_MODE_AUTOBAUD	5 /* autobaud */</div><div class='add'>+</div><div class='add'>+/* Flags for CAN-USB/3, to be used for esd_usb_3_set_baudrate_msg_x.flags */</div><div class='add'>+#define ESD_USB_3_BAUDRATE_FLAG_FD	BIT(0) /* enable CAN FD mode */</div><div class='add'>+#define ESD_USB_3_BAUDRATE_FLAG_LOM	BIT(1) /* enable listen only mode */</div><div class='add'>+#define ESD_USB_3_BAUDRATE_FLAG_STM	BIT(2) /* enable self test mode */</div><div class='add'>+#define ESD_USB_3_BAUDRATE_FLAG_TRS	BIT(3) /* enable triple sampling */</div><div class='add'>+#define ESD_USB_3_BAUDRATE_FLAG_TXP	BIT(4) /* enable transmit pause */</div><div class='add'>+</div><div class='add'>+struct esd_usb_header_msg {</div><div class='add'>+	u8 len; /* total message length in 32bit words */</div><div class='add'>+	u8 cmd;</div><div class='add'>+	u8 rsvd[2];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct esd_usb_version_msg {</div><div class='add'>+	u8 len; /* total message length in 32bit words */</div><div class='add'>+	u8 cmd;</div><div class='add'>+	u8 rsvd;</div><div class='add'>+	u8 flags;</div><div class='add'>+	__le32 drv_version;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct esd_usb_version_reply_msg {</div><div class='add'>+	u8 len; /* total message length in 32bit words */</div><div class='add'>+	u8 cmd;</div><div class='add'>+	u8 nets;</div><div class='add'>+	u8 features;</div><div class='add'>+	__le32 version;</div><div class='add'>+	u8 name[16];</div><div class='add'>+	__le32 rsvd;</div><div class='add'>+	__le32 ts;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct esd_usb_rx_msg {</div><div class='add'>+	u8 len; /* total message length in 32bit words */</div><div class='add'>+	u8 cmd;</div><div class='add'>+	u8 net;</div><div class='add'>+	u8 dlc;</div><div class='add'>+	__le32 ts;</div><div class='add'>+	__le32 id; /* upper 3 bits contain flags */</div><div class='add'>+	union {</div><div class='add'>+		u8 data[CAN_MAX_DLEN];</div><div class='add'>+		u8 data_fd[CANFD_MAX_DLEN];</div><div class='add'>+		struct {</div><div class='add'>+			u8 status; /* CAN Controller Status */</div><div class='add'>+			u8 ecc;    /* Error Capture Register */</div><div class='add'>+			u8 rec;    /* RX Error Counter */</div><div class='add'>+			u8 tec;    /* TX Error Counter */</div><div class='add'>+		} ev_can_err_ext;  /* For ESD_EV_CAN_ERROR_EXT */</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct esd_usb_tx_msg {</div><div class='add'>+	u8 len; /* total message length in 32bit words */</div><div class='add'>+	u8 cmd;</div><div class='add'>+	u8 net;</div><div class='add'>+	u8 dlc;</div><div class='add'>+	u32 hnd;	/* opaque handle, not used by device */</div><div class='add'>+	__le32 id; /* upper 3 bits contain flags */</div><div class='add'>+	union {</div><div class='add'>+		u8 data[CAN_MAX_DLEN];</div><div class='add'>+		u8 data_fd[CANFD_MAX_DLEN];</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct esd_usb_tx_done_msg {</div><div class='add'>+	u8 len; /* total message length in 32bit words */</div><div class='add'>+	u8 cmd;</div><div class='add'>+	u8 net;</div><div class='add'>+	u8 status;</div><div class='add'>+	u32 hnd;	/* opaque handle, not used by device */</div><div class='add'>+	__le32 ts;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct esd_usb_id_filter_msg {</div><div class='add'>+	u8 len; /* total message length in 32bit words */</div><div class='add'>+	u8 cmd;</div><div class='add'>+	u8 net;</div><div class='add'>+	u8 option;</div><div class='add'>+	__le32 mask[ESD_USB_MAX_ID_SEGMENT + 1]; /* +1 for 29bit extended IDs */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct esd_usb_set_baudrate_msg {</div><div class='add'>+	u8 len; /* total message length in 32bit words */</div><div class='add'>+	u8 cmd;</div><div class='add'>+	u8 net;</div><div class='add'>+	u8 rsvd;</div><div class='add'>+	__le32 baud;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* CAN-USB/3 baudrate configuration, used for nominal as well as for data bit rate */</div><div class='add'>+struct esd_usb_3_baudrate_cfg {</div><div class='add'>+	__le16 brp;	/* bit rate pre-scaler */</div><div class='add'>+	__le16 tseg1;	/* time segment before sample point */</div><div class='add'>+	__le16 tseg2;	/* time segment after sample point */</div><div class='add'>+	__le16 sjw;	/* synchronization jump Width */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* In principle, the esd CAN-USB/3 supports Transmitter Delay Compensation (TDC),</div><div class='add'>+ * but currently only the automatic TDC mode is supported by this driver.</div><div class='add'>+ * An implementation for manual TDC configuration will follow.</div><div class='add'>+ *</div><div class='add'>+ * For information about struct esd_usb_3_tdc_cfg, see</div><div class='add'>+ * NTCAN Application Developers Manual, 6.2.25 NTCAN_TDC_CFG + related chapters</div><div class='add'>+ * https://esd.eu/fileadmin/esd/docs/manuals/NTCAN_Part1_Function_API_Manual_en_56.pdf</div><div class='add'>+ */</div><div class='add'>+struct esd_usb_3_tdc_cfg {</div><div class='add'>+	u8 tdc_mode;	/* transmitter delay compensation mode  */</div><div class='add'>+	u8 ssp_offset;	/* secondary sample point offset in mtq */</div><div class='add'>+	s8 ssp_shift;	/* secondary sample point shift in mtq */</div><div class='add'>+	u8 tdc_filter;	/* TDC filter in mtq */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Extended version of the above set_baudrate_msg for a CAN-USB/3</div><div class='add'>+ * to define the CAN bit timing configuration of the CAN controller in</div><div class='add'>+ * CAN FD mode as well as in Classical CAN mode.</div><div class='add'>+ *</div><div class='add'>+ * The payload of this command is a NTCAN_BAUDRATE_X structure according to</div><div class='add'>+ * esd electronics gmbh, NTCAN Application Developers Manual, 6.2.15 NTCAN_BAUDRATE_X</div><div class='add'>+ * https://esd.eu/fileadmin/esd/docs/manuals/NTCAN_Part1_Function_API_Manual_en_56.pdf</div><div class='add'>+ */</div><div class='add'>+struct esd_usb_3_set_baudrate_msg_x {</div><div class='add'>+	u8 len;	/* total message length in 32bit words */</div><div class='add'>+	u8 cmd;</div><div class='add'>+	u8 net;</div><div class='add'>+	u8 rsvd;	/*reserved */</div><div class='add'>+	/* Payload ... */</div><div class='add'>+	__le16 mode;	/* mode word, see ESD_USB_3_BAUDRATE_MODE_xxx */</div><div class='add'>+	__le16 flags;	/* control flags, see ESD_USB_3_BAUDRATE_FLAG_xxx */</div><div class='add'>+	struct esd_usb_3_tdc_cfg tdc;	/* TDC configuration */</div><div class='add'>+	struct esd_usb_3_baudrate_cfg nom;	/* nominal bit rate */</div><div class='add'>+	struct esd_usb_3_baudrate_cfg data;	/* data bit rate */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Main message type used between library and application */</div><div class='add'>+union __packed esd_usb_msg {</div><div class='add'>+	struct esd_usb_header_msg hdr;</div><div class='add'>+	struct esd_usb_version_msg version;</div><div class='add'>+	struct esd_usb_version_reply_msg version_reply;</div><div class='add'>+	struct esd_usb_rx_msg rx;</div><div class='add'>+	struct esd_usb_tx_msg tx;</div><div class='add'>+	struct esd_usb_tx_done_msg txdone;</div><div class='add'>+	struct esd_usb_set_baudrate_msg setbaud;</div><div class='add'>+	struct esd_usb_3_set_baudrate_msg_x setbaud_x;</div><div class='add'>+	struct esd_usb_id_filter_msg filter;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct usb_device_id esd_usb_table[] = {</div><div class='add'>+	{USB_DEVICE(ESD_USB_ESDGMBH_VENDOR_ID, ESD_USB_CANUSB2_PRODUCT_ID)},</div><div class='add'>+	{USB_DEVICE(ESD_USB_ESDGMBH_VENDOR_ID, ESD_USB_CANUSBM_PRODUCT_ID)},</div><div class='add'>+	{USB_DEVICE(ESD_USB_ESDGMBH_VENDOR_ID, ESD_USB_CANUSB3_PRODUCT_ID)},</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(usb, esd_usb_table);</div><div class='add'>+</div><div class='add'>+struct esd_usb_net_priv;</div><div class='add'>+</div><div class='add'>+struct esd_tx_urb_context {</div><div class='add'>+	struct esd_usb_net_priv *priv;</div><div class='add'>+	u32 echo_index;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct esd_usb {</div><div class='add'>+	struct usb_device *udev;</div><div class='add'>+	struct esd_usb_net_priv *nets[ESD_USB_MAX_NETS];</div><div class='add'>+</div><div class='add'>+	struct usb_anchor rx_submitted;</div><div class='add'>+</div><div class='add'>+	int net_count;</div><div class='add'>+	u32 version;</div><div class='add'>+	int rxinitdone;</div><div class='add'>+	int in_usb_disconnect;</div><div class='add'>+	void *rxbuf[ESD_USB_MAX_RX_URBS];</div><div class='add'>+	dma_addr_t rxbuf_dma[ESD_USB_MAX_RX_URBS];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct esd_usb_net_priv {</div><div class='add'>+	struct can_priv can; /* must be the first member */</div><div class='add'>+</div><div class='add'>+	atomic_t active_tx_jobs;</div><div class='add'>+	struct usb_anchor tx_submitted;</div><div class='add'>+	struct esd_tx_urb_context tx_contexts[ESD_USB_MAX_TX_URBS];</div><div class='add'>+</div><div class='add'>+	struct esd_usb *usb;</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	int index;</div><div class='add'>+	u8 old_state;</div><div class='add'>+	struct can_berr_counter bec;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void esd_usb_rx_event(struct esd_usb_net_priv *priv,</div><div class='add'>+			     union esd_usb_msg *msg)</div><div class='add'>+{</div><div class='add'>+	struct net_device_stats *stats = &amp;priv-&gt;netdev-&gt;stats;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	u32 id = le32_to_cpu(msg-&gt;rx.id) &amp; ESD_USB_IDMASK;</div><div class='add'>+</div><div class='add'>+	if (id == ESD_USB_EV_CAN_ERROR_EXT) {</div><div class='add'>+		u8 state = msg-&gt;rx.ev_can_err_ext.status;</div><div class='add'>+		u8 ecc = msg-&gt;rx.ev_can_err_ext.ecc;</div><div class='add'>+</div><div class='add'>+		priv-&gt;bec.rxerr = msg-&gt;rx.ev_can_err_ext.rec;</div><div class='add'>+		priv-&gt;bec.txerr = msg-&gt;rx.ev_can_err_ext.tec;</div><div class='add'>+</div><div class='add'>+		netdev_dbg(priv-&gt;netdev,</div><div class='add'>+			   "CAN_ERR_EV_EXT: dlc=%#02x state=%02x ecc=%02x rec=%02x tec=%02x\n",</div><div class='add'>+			   msg-&gt;rx.dlc, state, ecc,</div><div class='add'>+			   priv-&gt;bec.rxerr, priv-&gt;bec.txerr);</div><div class='add'>+</div><div class='add'>+		/* if berr-reporting is off, only pass through on state change ... */</div><div class='add'>+		if (!(priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING) &amp;&amp;</div><div class='add'>+		    state == priv-&gt;old_state)</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		skb = alloc_can_err_skb(priv-&gt;netdev, &amp;cf);</div><div class='add'>+		if (!skb)</div><div class='add'>+			stats-&gt;rx_dropped++;</div><div class='add'>+</div><div class='add'>+		if (state != priv-&gt;old_state) {</div><div class='add'>+			enum can_state tx_state, rx_state;</div><div class='add'>+			enum can_state new_state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+</div><div class='add'>+			priv-&gt;old_state = state;</div><div class='add'>+</div><div class='add'>+			switch (state &amp; ESD_USB_BUSSTATE_MASK) {</div><div class='add'>+			case ESD_USB_BUSSTATE_BUSOFF:</div><div class='add'>+				new_state = CAN_STATE_BUS_OFF;</div><div class='add'>+				can_bus_off(priv-&gt;netdev);</div><div class='add'>+				break;</div><div class='add'>+			case ESD_USB_BUSSTATE_WARN:</div><div class='add'>+				new_state = CAN_STATE_ERROR_WARNING;</div><div class='add'>+				break;</div><div class='add'>+			case ESD_USB_BUSSTATE_ERRPASSIVE:</div><div class='add'>+				new_state = CAN_STATE_ERROR_PASSIVE;</div><div class='add'>+				break;</div><div class='add'>+			default:</div><div class='add'>+				new_state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+				priv-&gt;bec.txerr = 0;</div><div class='add'>+				priv-&gt;bec.rxerr = 0;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (new_state != priv-&gt;can.state) {</div><div class='add'>+				tx_state = (priv-&gt;bec.txerr &gt;= priv-&gt;bec.rxerr) ? new_state : 0;</div><div class='add'>+				rx_state = (priv-&gt;bec.txerr &lt;= priv-&gt;bec.rxerr) ? new_state : 0;</div><div class='add'>+				can_change_state(priv-&gt;netdev, cf,</div><div class='add'>+						 tx_state, rx_state);</div><div class='add'>+			}</div><div class='add'>+		} else if (skb) {</div><div class='add'>+			priv-&gt;can.can_stats.bus_error++;</div><div class='add'>+			stats-&gt;rx_errors++;</div><div class='add'>+</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='add'>+</div><div class='add'>+			switch (ecc &amp; ESD_USB_SJA1000_ECC_MASK) {</div><div class='add'>+			case ESD_USB_SJA1000_ECC_BIT:</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_BIT;</div><div class='add'>+				break;</div><div class='add'>+			case ESD_USB_SJA1000_ECC_FORM:</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='add'>+				break;</div><div class='add'>+			case ESD_USB_SJA1000_ECC_STUFF:</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='add'>+				break;</div><div class='add'>+			default:</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			/* Error occurred during transmission? */</div><div class='add'>+			if (!(ecc &amp; ESD_USB_SJA1000_ECC_DIR))</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_TX;</div><div class='add'>+</div><div class='add'>+			/* Bit stream position in CAN frame as the error was detected */</div><div class='add'>+			cf-&gt;data[3] = ecc &amp; ESD_USB_SJA1000_ECC_SEG;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (skb) {</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_CNT;</div><div class='add'>+			cf-&gt;data[6] = priv-&gt;bec.txerr;</div><div class='add'>+			cf-&gt;data[7] = priv-&gt;bec.rxerr;</div><div class='add'>+</div><div class='add'>+			netif_rx(skb);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void esd_usb_rx_can_msg(struct esd_usb_net_priv *priv,</div><div class='add'>+			       union esd_usb_msg *msg)</div><div class='add'>+{</div><div class='add'>+	struct net_device_stats *stats = &amp;priv-&gt;netdev-&gt;stats;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	struct canfd_frame *cfd;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	u32 id;</div><div class='add'>+	u8 len;</div><div class='add'>+</div><div class='add'>+	if (!netif_device_present(priv-&gt;netdev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	id = le32_to_cpu(msg-&gt;rx.id);</div><div class='add'>+</div><div class='add'>+	if (id &amp; ESD_USB_EVENT) {</div><div class='add'>+		esd_usb_rx_event(priv, msg);</div><div class='add'>+	} else {</div><div class='add'>+		if (msg-&gt;rx.dlc &amp; ESD_USB_FD) {</div><div class='add'>+			skb = alloc_canfd_skb(priv-&gt;netdev, &amp;cfd);</div><div class='add'>+		} else {</div><div class='add'>+			skb = alloc_can_skb(priv-&gt;netdev, &amp;cf);</div><div class='add'>+			cfd = (struct canfd_frame *)cf;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (skb == NULL) {</div><div class='add'>+			stats-&gt;rx_dropped++;</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		cfd-&gt;can_id = id &amp; ESD_USB_IDMASK;</div><div class='add'>+</div><div class='add'>+		if (msg-&gt;rx.dlc &amp; ESD_USB_FD) {</div><div class='add'>+			/* masking by 0x0F is already done within can_fd_dlc2len() */</div><div class='add'>+			cfd-&gt;len = can_fd_dlc2len(msg-&gt;rx.dlc);</div><div class='add'>+			len = cfd-&gt;len;</div><div class='add'>+			if ((msg-&gt;rx.dlc &amp; ESD_USB_NO_BRS) == 0)</div><div class='add'>+				cfd-&gt;flags |= CANFD_BRS;</div><div class='add'>+			if (msg-&gt;rx.dlc &amp; ESD_USB_ESI)</div><div class='add'>+				cfd-&gt;flags |= CANFD_ESI;</div><div class='add'>+		} else {</div><div class='add'>+			can_frame_set_cc_len(cf, msg-&gt;rx.dlc &amp; ~ESD_USB_RTR, priv-&gt;can.ctrlmode);</div><div class='add'>+			len = cf-&gt;len;</div><div class='add'>+			if (msg-&gt;rx.dlc &amp; ESD_USB_RTR) {</div><div class='add'>+				cf-&gt;can_id |= CAN_RTR_FLAG;</div><div class='add'>+				len = 0;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (id &amp; ESD_USB_EXTID)</div><div class='add'>+			cfd-&gt;can_id |= CAN_EFF_FLAG;</div><div class='add'>+</div><div class='add'>+		memcpy(cfd-&gt;data, msg-&gt;rx.data_fd, len);</div><div class='add'>+		stats-&gt;rx_bytes += len;</div><div class='add'>+		stats-&gt;rx_packets++;</div><div class='add'>+</div><div class='add'>+		netif_rx(skb);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void esd_usb_tx_done_msg(struct esd_usb_net_priv *priv,</div><div class='add'>+				union esd_usb_msg *msg)</div><div class='add'>+{</div><div class='add'>+	struct net_device_stats *stats = &amp;priv-&gt;netdev-&gt;stats;</div><div class='add'>+	struct net_device *netdev = priv-&gt;netdev;</div><div class='add'>+	struct esd_tx_urb_context *context;</div><div class='add'>+</div><div class='add'>+	if (!netif_device_present(netdev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	context = &amp;priv-&gt;tx_contexts[msg-&gt;txdone.hnd &amp; (ESD_USB_MAX_TX_URBS - 1)];</div><div class='add'>+</div><div class='add'>+	if (!msg-&gt;txdone.status) {</div><div class='add'>+		stats-&gt;tx_packets++;</div><div class='add'>+		stats-&gt;tx_bytes += can_get_echo_skb(netdev, context-&gt;echo_index,</div><div class='add'>+						    NULL);</div><div class='add'>+	} else {</div><div class='add'>+		stats-&gt;tx_errors++;</div><div class='add'>+		can_free_echo_skb(netdev, context-&gt;echo_index, NULL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Release context */</div><div class='add'>+	context-&gt;echo_index = ESD_USB_MAX_TX_URBS;</div><div class='add'>+	atomic_dec(&amp;priv-&gt;active_tx_jobs);</div><div class='add'>+</div><div class='add'>+	netif_wake_queue(netdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void esd_usb_read_bulk_callback(struct urb *urb)</div><div class='add'>+{</div><div class='add'>+	struct esd_usb *dev = urb-&gt;context;</div><div class='add'>+	int err;</div><div class='add'>+	int pos = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	switch (urb-&gt;status) {</div><div class='add'>+	case 0: /* success */</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case -ENOENT:</div><div class='add'>+	case -EPIPE:</div><div class='add'>+	case -EPROTO:</div><div class='add'>+	case -ESHUTDOWN:</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		dev_info(dev-&gt;udev-&gt;dev.parent,</div><div class='add'>+			 "Rx URB aborted (%pe)\n", ERR_PTR(urb-&gt;status));</div><div class='add'>+		goto resubmit_urb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	while (pos &lt; urb-&gt;actual_length) {</div><div class='add'>+		union esd_usb_msg *msg;</div><div class='add'>+</div><div class='add'>+		msg = (union esd_usb_msg *)(urb-&gt;transfer_buffer + pos);</div><div class='add'>+</div><div class='add'>+		switch (msg-&gt;hdr.cmd) {</div><div class='add'>+		case ESD_USB_CMD_CAN_RX:</div><div class='add'>+			if (msg-&gt;rx.net &gt;= dev-&gt;net_count) {</div><div class='add'>+				dev_err(dev-&gt;udev-&gt;dev.parent, "format error\n");</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			esd_usb_rx_can_msg(dev-&gt;nets[msg-&gt;rx.net], msg);</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case ESD_USB_CMD_CAN_TX:</div><div class='add'>+			if (msg-&gt;txdone.net &gt;= dev-&gt;net_count) {</div><div class='add'>+				dev_err(dev-&gt;udev-&gt;dev.parent, "format error\n");</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			esd_usb_tx_done_msg(dev-&gt;nets[msg-&gt;txdone.net],</div><div class='add'>+					    msg);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		pos += msg-&gt;hdr.len * sizeof(u32); /* convert to # of bytes */</div><div class='add'>+</div><div class='add'>+		if (pos &gt; urb-&gt;actual_length) {</div><div class='add'>+			dev_err(dev-&gt;udev-&gt;dev.parent, "format error\n");</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+resubmit_urb:</div><div class='add'>+	usb_fill_bulk_urb(urb, dev-&gt;udev, usb_rcvbulkpipe(dev-&gt;udev, 1),</div><div class='add'>+			  urb-&gt;transfer_buffer, ESD_USB_RX_BUFFER_SIZE,</div><div class='add'>+			  esd_usb_read_bulk_callback, dev);</div><div class='add'>+</div><div class='add'>+	err = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='add'>+	if (err == -ENODEV) {</div><div class='add'>+		for (i = 0; i &lt; dev-&gt;net_count; i++) {</div><div class='add'>+			if (dev-&gt;nets[i])</div><div class='add'>+				netif_device_detach(dev-&gt;nets[i]-&gt;netdev);</div><div class='add'>+		}</div><div class='add'>+	} else if (err) {</div><div class='add'>+		dev_err(dev-&gt;udev-&gt;dev.parent,</div><div class='add'>+			"failed resubmitting read bulk urb: %pe\n", ERR_PTR(err));</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* callback for bulk IN urb */</div><div class='add'>+static void esd_usb_write_bulk_callback(struct urb *urb)</div><div class='add'>+{</div><div class='add'>+	struct esd_tx_urb_context *context = urb-&gt;context;</div><div class='add'>+	struct esd_usb_net_priv *priv;</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	size_t size = sizeof(union esd_usb_msg);</div><div class='add'>+</div><div class='add'>+	WARN_ON(!context);</div><div class='add'>+</div><div class='add'>+	priv = context-&gt;priv;</div><div class='add'>+	netdev = priv-&gt;netdev;</div><div class='add'>+</div><div class='add'>+	/* free up our allocated buffer */</div><div class='add'>+	usb_free_coherent(urb-&gt;dev, size,</div><div class='add'>+			  urb-&gt;transfer_buffer, urb-&gt;transfer_dma);</div><div class='add'>+</div><div class='add'>+	if (!netif_device_present(netdev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (urb-&gt;status)</div><div class='add'>+		netdev_info(netdev, "Tx URB aborted (%pe)\n", ERR_PTR(urb-&gt;status));</div><div class='add'>+</div><div class='add'>+	netif_trans_update(netdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t firmware_show(struct device *d,</div><div class='add'>+			     struct device_attribute *attr, char *buf)</div><div class='add'>+{</div><div class='add'>+	struct usb_interface *intf = to_usb_interface(d);</div><div class='add'>+	struct esd_usb *dev = usb_get_intfdata(intf);</div><div class='add'>+</div><div class='add'>+	return sprintf(buf, "%d.%d.%d\n",</div><div class='add'>+		       (dev-&gt;version &gt;&gt; 12) &amp; 0xf,</div><div class='add'>+		       (dev-&gt;version &gt;&gt; 8) &amp; 0xf,</div><div class='add'>+		       dev-&gt;version &amp; 0xff);</div><div class='add'>+}</div><div class='add'>+static DEVICE_ATTR_RO(firmware);</div><div class='add'>+</div><div class='add'>+static ssize_t hardware_show(struct device *d,</div><div class='add'>+			     struct device_attribute *attr, char *buf)</div><div class='add'>+{</div><div class='add'>+	struct usb_interface *intf = to_usb_interface(d);</div><div class='add'>+	struct esd_usb *dev = usb_get_intfdata(intf);</div><div class='add'>+</div><div class='add'>+	return sprintf(buf, "%d.%d.%d\n",</div><div class='add'>+		       (dev-&gt;version &gt;&gt; 28) &amp; 0xf,</div><div class='add'>+		       (dev-&gt;version &gt;&gt; 24) &amp; 0xf,</div><div class='add'>+		       (dev-&gt;version &gt;&gt; 16) &amp; 0xff);</div><div class='add'>+}</div><div class='add'>+static DEVICE_ATTR_RO(hardware);</div><div class='add'>+</div><div class='add'>+static ssize_t nets_show(struct device *d,</div><div class='add'>+			 struct device_attribute *attr, char *buf)</div><div class='add'>+{</div><div class='add'>+	struct usb_interface *intf = to_usb_interface(d);</div><div class='add'>+	struct esd_usb *dev = usb_get_intfdata(intf);</div><div class='add'>+</div><div class='add'>+	return sprintf(buf, "%d", dev-&gt;net_count);</div><div class='add'>+}</div><div class='add'>+static DEVICE_ATTR_RO(nets);</div><div class='add'>+</div><div class='add'>+static int esd_usb_send_msg(struct esd_usb *dev, union esd_usb_msg *msg)</div><div class='add'>+{</div><div class='add'>+	int actual_length;</div><div class='add'>+</div><div class='add'>+	return usb_bulk_msg(dev-&gt;udev,</div><div class='add'>+			    usb_sndbulkpipe(dev-&gt;udev, 2),</div><div class='add'>+			    msg,</div><div class='add'>+			    msg-&gt;hdr.len * sizeof(u32), /* convert to # of bytes */</div><div class='add'>+			    &amp;actual_length,</div><div class='add'>+			    1000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int esd_usb_wait_msg(struct esd_usb *dev,</div><div class='add'>+			    union esd_usb_msg *msg)</div><div class='add'>+{</div><div class='add'>+	int actual_length;</div><div class='add'>+</div><div class='add'>+	return usb_bulk_msg(dev-&gt;udev,</div><div class='add'>+			    usb_rcvbulkpipe(dev-&gt;udev, 1),</div><div class='add'>+			    msg,</div><div class='add'>+			    sizeof(*msg),</div><div class='add'>+			    &amp;actual_length,</div><div class='add'>+			    1000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int esd_usb_setup_rx_urbs(struct esd_usb *dev)</div><div class='add'>+{</div><div class='add'>+	int i, err = 0;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;rxinitdone)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ESD_USB_MAX_RX_URBS; i++) {</div><div class='add'>+		struct urb *urb = NULL;</div><div class='add'>+		u8 *buf = NULL;</div><div class='add'>+		dma_addr_t buf_dma;</div><div class='add'>+</div><div class='add'>+		/* create a URB, and a buffer for it */</div><div class='add'>+		urb = usb_alloc_urb(0, GFP_KERNEL);</div><div class='add'>+		if (!urb) {</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		buf = usb_alloc_coherent(dev-&gt;udev, ESD_USB_RX_BUFFER_SIZE, GFP_KERNEL,</div><div class='add'>+					 &amp;buf_dma);</div><div class='add'>+		if (!buf) {</div><div class='add'>+			dev_warn(dev-&gt;udev-&gt;dev.parent,</div><div class='add'>+				 "No memory left for USB buffer\n");</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto freeurb;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		urb-&gt;transfer_dma = buf_dma;</div><div class='add'>+</div><div class='add'>+		usb_fill_bulk_urb(urb, dev-&gt;udev,</div><div class='add'>+				  usb_rcvbulkpipe(dev-&gt;udev, 1),</div><div class='add'>+				  buf, ESD_USB_RX_BUFFER_SIZE,</div><div class='add'>+				  esd_usb_read_bulk_callback, dev);</div><div class='add'>+		urb-&gt;transfer_flags |= URB_NO_TRANSFER_DMA_MAP;</div><div class='add'>+		usb_anchor_urb(urb, &amp;dev-&gt;rx_submitted);</div><div class='add'>+</div><div class='add'>+		err = usb_submit_urb(urb, GFP_KERNEL);</div><div class='add'>+		if (err) {</div><div class='add'>+			usb_unanchor_urb(urb);</div><div class='add'>+			usb_free_coherent(dev-&gt;udev, ESD_USB_RX_BUFFER_SIZE, buf,</div><div class='add'>+					  urb-&gt;transfer_dma);</div><div class='add'>+			goto freeurb;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		dev-&gt;rxbuf[i] = buf;</div><div class='add'>+		dev-&gt;rxbuf_dma[i] = buf_dma;</div><div class='add'>+</div><div class='add'>+freeurb:</div><div class='add'>+		/* Drop reference, USB core will take care of freeing it */</div><div class='add'>+		usb_free_urb(urb);</div><div class='add'>+		if (err)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Did we submit any URBs */</div><div class='add'>+	if (i == 0) {</div><div class='add'>+		dev_err(dev-&gt;udev-&gt;dev.parent, "couldn't setup read URBs\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Warn if we've couldn't transmit all the URBs */</div><div class='add'>+	if (i &lt; ESD_USB_MAX_RX_URBS) {</div><div class='add'>+		dev_warn(dev-&gt;udev-&gt;dev.parent,</div><div class='add'>+			 "rx performance may be slow\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev-&gt;rxinitdone = 1;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Start interface */</div><div class='add'>+static int esd_usb_start(struct esd_usb_net_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct esd_usb *dev = priv-&gt;usb;</div><div class='add'>+	struct net_device *netdev = priv-&gt;netdev;</div><div class='add'>+	union esd_usb_msg *msg;</div><div class='add'>+	int err, i;</div><div class='add'>+</div><div class='add'>+	msg = kmalloc(sizeof(*msg), GFP_KERNEL);</div><div class='add'>+	if (!msg) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Enable all IDs</div><div class='add'>+	 * The IDADD message takes up to 64 32 bit bitmasks (2048 bits).</div><div class='add'>+	 * Each bit represents one 11 bit CAN identifier. A set bit</div><div class='add'>+	 * enables reception of the corresponding CAN identifier. A cleared</div><div class='add'>+	 * bit disabled this identifier. An additional bitmask value</div><div class='add'>+	 * following the CAN 2.0A bits is used to enable reception of</div><div class='add'>+	 * extended CAN frames. Only the LSB of this final mask is checked</div><div class='add'>+	 * for the complete 29 bit ID range. The IDADD message also allows</div><div class='add'>+	 * filter configuration for an ID subset. In this case you can add</div><div class='add'>+	 * the number of the starting bitmask (0..64) to the filter.option</div><div class='add'>+	 * field followed by only some bitmasks.</div><div class='add'>+	 */</div><div class='add'>+	msg-&gt;hdr.cmd = ESD_USB_CMD_IDADD;</div><div class='add'>+	msg-&gt;hdr.len = sizeof(struct esd_usb_id_filter_msg) / sizeof(u32); /* # of 32bit words */</div><div class='add'>+	msg-&gt;filter.net = priv-&gt;index;</div><div class='add'>+	msg-&gt;filter.option = ESD_USB_ID_ENABLE; /* start with segment 0 */</div><div class='add'>+	for (i = 0; i &lt; ESD_USB_MAX_ID_SEGMENT; i++)</div><div class='add'>+		msg-&gt;filter.mask[i] = cpu_to_le32(GENMASK(31, 0));</div><div class='add'>+	/* enable 29bit extended IDs */</div><div class='add'>+	msg-&gt;filter.mask[ESD_USB_MAX_ID_SEGMENT] = cpu_to_le32(BIT(0));</div><div class='add'>+</div><div class='add'>+	err = esd_usb_send_msg(dev, msg);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	err = esd_usb_setup_rx_urbs(dev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	if (err == -ENODEV)</div><div class='add'>+		netif_device_detach(netdev);</div><div class='add'>+	if (err)</div><div class='add'>+		netdev_err(netdev, "couldn't start device: %pe\n", ERR_PTR(err));</div><div class='add'>+</div><div class='add'>+	kfree(msg);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void unlink_all_urbs(struct esd_usb *dev)</div><div class='add'>+{</div><div class='add'>+	struct esd_usb_net_priv *priv;</div><div class='add'>+	int i, j;</div><div class='add'>+</div><div class='add'>+	usb_kill_anchored_urbs(&amp;dev-&gt;rx_submitted);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ESD_USB_MAX_RX_URBS; ++i)</div><div class='add'>+		usb_free_coherent(dev-&gt;udev, ESD_USB_RX_BUFFER_SIZE,</div><div class='add'>+				  dev-&gt;rxbuf[i], dev-&gt;rxbuf_dma[i]);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; dev-&gt;net_count; i++) {</div><div class='add'>+		priv = dev-&gt;nets[i];</div><div class='add'>+		if (priv) {</div><div class='add'>+			usb_kill_anchored_urbs(&amp;priv-&gt;tx_submitted);</div><div class='add'>+			atomic_set(&amp;priv-&gt;active_tx_jobs, 0);</div><div class='add'>+</div><div class='add'>+			for (j = 0; j &lt; ESD_USB_MAX_TX_URBS; j++)</div><div class='add'>+				priv-&gt;tx_contexts[j].echo_index = ESD_USB_MAX_TX_URBS;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int esd_usb_open(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct esd_usb_net_priv *priv = netdev_priv(netdev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* common open */</div><div class='add'>+	err = open_candev(netdev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* finally start device */</div><div class='add'>+	err = esd_usb_start(priv);</div><div class='add'>+	if (err) {</div><div class='add'>+		close_candev(netdev);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netif_start_queue(netdev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static netdev_tx_t esd_usb_start_xmit(struct sk_buff *skb,</div><div class='add'>+				      struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct esd_usb_net_priv *priv = netdev_priv(netdev);</div><div class='add'>+	struct esd_usb *dev = priv-&gt;usb;</div><div class='add'>+	struct esd_tx_urb_context *context = NULL;</div><div class='add'>+	struct net_device_stats *stats = &amp;netdev-&gt;stats;</div><div class='add'>+	struct canfd_frame *cfd = (struct canfd_frame *)skb-&gt;data;</div><div class='add'>+	union esd_usb_msg *msg;</div><div class='add'>+	struct urb *urb;</div><div class='add'>+	u8 *buf;</div><div class='add'>+	int i, err;</div><div class='add'>+	int ret = NETDEV_TX_OK;</div><div class='add'>+	size_t size = sizeof(union esd_usb_msg);</div><div class='add'>+</div><div class='add'>+	if (can_dev_dropped_skb(netdev, skb))</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+	/* create a URB, and a buffer for it, and copy the data to the URB */</div><div class='add'>+	urb = usb_alloc_urb(0, GFP_ATOMIC);</div><div class='add'>+	if (!urb) {</div><div class='add'>+		stats-&gt;tx_dropped++;</div><div class='add'>+		dev_kfree_skb(skb);</div><div class='add'>+		goto nourbmem;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	buf = usb_alloc_coherent(dev-&gt;udev, size, GFP_ATOMIC,</div><div class='add'>+				 &amp;urb-&gt;transfer_dma);</div><div class='add'>+	if (!buf) {</div><div class='add'>+		netdev_err(netdev, "No memory left for USB buffer\n");</div><div class='add'>+		stats-&gt;tx_dropped++;</div><div class='add'>+		dev_kfree_skb(skb);</div><div class='add'>+		goto nobufmem;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	msg = (union esd_usb_msg *)buf;</div><div class='add'>+</div><div class='add'>+	/* minimal length as # of 32bit words */</div><div class='add'>+	msg-&gt;hdr.len = offsetof(struct esd_usb_tx_msg, data) / sizeof(u32);</div><div class='add'>+	msg-&gt;hdr.cmd = ESD_USB_CMD_CAN_TX;</div><div class='add'>+	msg-&gt;tx.net = priv-&gt;index;</div><div class='add'>+</div><div class='add'>+	if (can_is_canfd_skb(skb)) {</div><div class='add'>+		msg-&gt;tx.dlc = can_fd_len2dlc(cfd-&gt;len);</div><div class='add'>+		msg-&gt;tx.dlc |= ESD_USB_FD;</div><div class='add'>+</div><div class='add'>+		if ((cfd-&gt;flags &amp; CANFD_BRS) == 0)</div><div class='add'>+			msg-&gt;tx.dlc |= ESD_USB_NO_BRS;</div><div class='add'>+	} else {</div><div class='add'>+		msg-&gt;tx.dlc = can_get_cc_dlc((struct can_frame *)cfd, priv-&gt;can.ctrlmode);</div><div class='add'>+</div><div class='add'>+		if (cfd-&gt;can_id &amp; CAN_RTR_FLAG)</div><div class='add'>+			msg-&gt;tx.dlc |= ESD_USB_RTR;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	msg-&gt;tx.id = cpu_to_le32(cfd-&gt;can_id &amp; CAN_ERR_MASK);</div><div class='add'>+</div><div class='add'>+	if (cfd-&gt;can_id &amp; CAN_EFF_FLAG)</div><div class='add'>+		msg-&gt;tx.id |= cpu_to_le32(ESD_USB_EXTID);</div><div class='add'>+</div><div class='add'>+	memcpy(msg-&gt;tx.data_fd, cfd-&gt;data, cfd-&gt;len);</div><div class='add'>+</div><div class='add'>+	/* round up, then divide by 4 to add the payload length as # of 32bit words */</div><div class='add'>+	msg-&gt;hdr.len += DIV_ROUND_UP(cfd-&gt;len, sizeof(u32));</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ESD_USB_MAX_TX_URBS; i++) {</div><div class='add'>+		if (priv-&gt;tx_contexts[i].echo_index == ESD_USB_MAX_TX_URBS) {</div><div class='add'>+			context = &amp;priv-&gt;tx_contexts[i];</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* This may never happen */</div><div class='add'>+	if (!context) {</div><div class='add'>+		netdev_warn(netdev, "couldn't find free context\n");</div><div class='add'>+		ret = NETDEV_TX_BUSY;</div><div class='add'>+		goto releasebuf;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	context-&gt;priv = priv;</div><div class='add'>+	context-&gt;echo_index = i;</div><div class='add'>+</div><div class='add'>+	/* hnd must not be 0 - MSB is stripped in txdone handling */</div><div class='add'>+	msg-&gt;tx.hnd = BIT(31) | i; /* returned in TX done message */</div><div class='add'>+</div><div class='add'>+	usb_fill_bulk_urb(urb, dev-&gt;udev, usb_sndbulkpipe(dev-&gt;udev, 2), buf,</div><div class='add'>+			  msg-&gt;hdr.len * sizeof(u32), /* convert to # of bytes */</div><div class='add'>+			  esd_usb_write_bulk_callback, context);</div><div class='add'>+</div><div class='add'>+	urb-&gt;transfer_flags |= URB_NO_TRANSFER_DMA_MAP;</div><div class='add'>+</div><div class='add'>+	usb_anchor_urb(urb, &amp;priv-&gt;tx_submitted);</div><div class='add'>+</div><div class='add'>+	can_put_echo_skb(skb, netdev, context-&gt;echo_index, 0);</div><div class='add'>+</div><div class='add'>+	atomic_inc(&amp;priv-&gt;active_tx_jobs);</div><div class='add'>+</div><div class='add'>+	/* Slow down tx path */</div><div class='add'>+	if (atomic_read(&amp;priv-&gt;active_tx_jobs) &gt;= ESD_USB_MAX_TX_URBS)</div><div class='add'>+		netif_stop_queue(netdev);</div><div class='add'>+</div><div class='add'>+	err = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='add'>+	if (err) {</div><div class='add'>+		can_free_echo_skb(netdev, context-&gt;echo_index, NULL);</div><div class='add'>+</div><div class='add'>+		atomic_dec(&amp;priv-&gt;active_tx_jobs);</div><div class='add'>+		usb_unanchor_urb(urb);</div><div class='add'>+</div><div class='add'>+		stats-&gt;tx_dropped++;</div><div class='add'>+</div><div class='add'>+		if (err == -ENODEV)</div><div class='add'>+			netif_device_detach(netdev);</div><div class='add'>+		else</div><div class='add'>+			netdev_warn(netdev, "failed tx_urb %pe\n", ERR_PTR(err));</div><div class='add'>+</div><div class='add'>+		goto releasebuf;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netif_trans_update(netdev);</div><div class='add'>+</div><div class='add'>+	/* Release our reference to this URB, the USB core will eventually free</div><div class='add'>+	 * it entirely.</div><div class='add'>+	 */</div><div class='add'>+	usb_free_urb(urb);</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+releasebuf:</div><div class='add'>+	usb_free_coherent(dev-&gt;udev, size, buf, urb-&gt;transfer_dma);</div><div class='add'>+</div><div class='add'>+nobufmem:</div><div class='add'>+	usb_free_urb(urb);</div><div class='add'>+</div><div class='add'>+nourbmem:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Stop interface */</div><div class='add'>+static int esd_usb_stop(struct esd_usb_net_priv *priv)</div><div class='add'>+{</div><div class='add'>+	union esd_usb_msg *msg;</div><div class='add'>+	int err;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	msg = kmalloc(sizeof(*msg), GFP_KERNEL);</div><div class='add'>+	if (!msg)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* Disable all IDs (see esd_usb_start()) */</div><div class='add'>+	msg-&gt;hdr.cmd = ESD_USB_CMD_IDADD;</div><div class='add'>+	msg-&gt;hdr.len = sizeof(struct esd_usb_id_filter_msg) / sizeof(u32);/* # of 32bit words */</div><div class='add'>+	msg-&gt;filter.net = priv-&gt;index;</div><div class='add'>+	msg-&gt;filter.option = ESD_USB_ID_ENABLE; /* start with segment 0 */</div><div class='add'>+	for (i = 0; i &lt;= ESD_USB_MAX_ID_SEGMENT; i++)</div><div class='add'>+		msg-&gt;filter.mask[i] = 0;</div><div class='add'>+	err = esd_usb_send_msg(priv-&gt;usb, msg);</div><div class='add'>+	if (err &lt; 0) {</div><div class='add'>+		netdev_err(priv-&gt;netdev, "sending idadd message failed: %pe\n", ERR_PTR(err));</div><div class='add'>+		goto bail;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* set CAN controller to reset mode */</div><div class='add'>+	msg-&gt;hdr.len = sizeof(struct esd_usb_set_baudrate_msg) / sizeof(u32); /* # of 32bit words */</div><div class='add'>+	msg-&gt;hdr.cmd = ESD_USB_CMD_SETBAUD;</div><div class='add'>+	msg-&gt;setbaud.net = priv-&gt;index;</div><div class='add'>+	msg-&gt;setbaud.rsvd = 0;</div><div class='add'>+	msg-&gt;setbaud.baud = cpu_to_le32(ESD_USB_NO_BAUDRATE);</div><div class='add'>+	err = esd_usb_send_msg(priv-&gt;usb, msg);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		netdev_err(priv-&gt;netdev, "sending setbaud message failed: %pe\n", ERR_PTR(err));</div><div class='add'>+</div><div class='add'>+bail:</div><div class='add'>+	kfree(msg);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int esd_usb_close(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct esd_usb_net_priv *priv = netdev_priv(netdev);</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;usb-&gt;in_usb_disconnect) {</div><div class='add'>+		/* It's moot to try this in usb_disconnect()! */</div><div class='add'>+		err = esd_usb_stop(priv);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(netdev);</div><div class='add'>+</div><div class='add'>+	close_candev(netdev);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops esd_usb_netdev_ops = {</div><div class='add'>+	.ndo_open = esd_usb_open,</div><div class='add'>+	.ndo_stop = esd_usb_close,</div><div class='add'>+	.ndo_start_xmit = esd_usb_start_xmit,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops esd_usb_ethtool_ops = {</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const esd_usb_2_bittiming_const = {</div><div class='add'>+	.name = "esd_usb_2",</div><div class='add'>+	.tseg1_min = 1,</div><div class='add'>+	.tseg1_max = 16,</div><div class='add'>+	.tseg2_min = 1,</div><div class='add'>+	.tseg2_max = 8,</div><div class='add'>+	.sjw_max = 4,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 1024,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int esd_usb_2_set_bittiming(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	const struct can_bittiming_const *btc = &amp;esd_usb_2_bittiming_const;</div><div class='add'>+	struct esd_usb_net_priv *priv = netdev_priv(netdev);</div><div class='add'>+	struct can_bittiming *bt = &amp;priv-&gt;can.bittiming;</div><div class='add'>+	union esd_usb_msg *msg;</div><div class='add'>+	int err;</div><div class='add'>+	u32 canbtr;</div><div class='add'>+	int sjw_shift;</div><div class='add'>+</div><div class='add'>+	canbtr = ESD_USB_UBR;</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LISTENONLY)</div><div class='add'>+		canbtr |= ESD_USB_LOM;</div><div class='add'>+</div><div class='add'>+	canbtr |= (bt-&gt;brp - 1) &amp; (btc-&gt;brp_max - 1);</div><div class='add'>+</div><div class='add'>+	if (le16_to_cpu(priv-&gt;usb-&gt;udev-&gt;descriptor.idProduct) ==</div><div class='add'>+	    ESD_USB_CANUSBM_PRODUCT_ID)</div><div class='add'>+		sjw_shift = ESD_USB_M_SJW_SHIFT;</div><div class='add'>+	else</div><div class='add'>+		sjw_shift = ESD_USB_2_SJW_SHIFT;</div><div class='add'>+</div><div class='add'>+	canbtr |= ((bt-&gt;sjw - 1) &amp; (btc-&gt;sjw_max - 1))</div><div class='add'>+		&lt;&lt; sjw_shift;</div><div class='add'>+	canbtr |= ((bt-&gt;prop_seg + bt-&gt;phase_seg1 - 1)</div><div class='add'>+		   &amp; (btc-&gt;tseg1_max - 1))</div><div class='add'>+		&lt;&lt; ESD_USB_2_TSEG1_SHIFT;</div><div class='add'>+	canbtr |= ((bt-&gt;phase_seg2 - 1) &amp; (btc-&gt;tseg2_max - 1))</div><div class='add'>+		&lt;&lt; ESD_USB_2_TSEG2_SHIFT;</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_3_SAMPLES)</div><div class='add'>+		canbtr |= ESD_USB_TRIPLE_SAMPLES;</div><div class='add'>+</div><div class='add'>+	msg = kmalloc(sizeof(*msg), GFP_KERNEL);</div><div class='add'>+	if (!msg)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	msg-&gt;hdr.len = sizeof(struct esd_usb_set_baudrate_msg) / sizeof(u32); /* # of 32bit words */</div><div class='add'>+	msg-&gt;hdr.cmd = ESD_USB_CMD_SETBAUD;</div><div class='add'>+	msg-&gt;setbaud.net = priv-&gt;index;</div><div class='add'>+	msg-&gt;setbaud.rsvd = 0;</div><div class='add'>+	msg-&gt;setbaud.baud = cpu_to_le32(canbtr);</div><div class='add'>+</div><div class='add'>+	netdev_dbg(netdev, "setting BTR=%#x\n", canbtr);</div><div class='add'>+</div><div class='add'>+	err = esd_usb_send_msg(priv-&gt;usb, msg);</div><div class='add'>+</div><div class='add'>+	kfree(msg);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Nominal bittiming constants, see</div><div class='add'>+ * Microchip SAM E70/S70/V70/V71, Data Sheet, Rev. G - 07/2022</div><div class='add'>+ * 48.6.8 MCAN Nominal Bit Timing and Prescaler Register</div><div class='add'>+ */</div><div class='add'>+static const struct can_bittiming_const esd_usb_3_nom_bittiming_const = {</div><div class='add'>+	.name = "esd_usb_3",</div><div class='add'>+	.tseg1_min = 2,</div><div class='add'>+	.tseg1_max = 256,</div><div class='add'>+	.tseg2_min = 2,</div><div class='add'>+	.tseg2_max = 128,</div><div class='add'>+	.sjw_max = 128,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 512,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Data bittiming constants, see</div><div class='add'>+ * Microchip SAM E70/S70/V70/V71, Data Sheet, Rev. G - 07/2022</div><div class='add'>+ * 48.6.4 MCAN Data Bit Timing and Prescaler Register</div><div class='add'>+ */</div><div class='add'>+static const struct can_bittiming_const esd_usb_3_data_bittiming_const = {</div><div class='add'>+	.name = "esd_usb_3",</div><div class='add'>+	.tseg1_min = 2,</div><div class='add'>+	.tseg1_max = 32,</div><div class='add'>+	.tseg2_min = 1,</div><div class='add'>+	.tseg2_max = 16,</div><div class='add'>+	.sjw_max = 8,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 32,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int esd_usb_3_set_bittiming(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	const struct can_bittiming_const *nom_btc = &amp;esd_usb_3_nom_bittiming_const;</div><div class='add'>+	const struct can_bittiming_const *data_btc = &amp;esd_usb_3_data_bittiming_const;</div><div class='add'>+	struct esd_usb_net_priv *priv = netdev_priv(netdev);</div><div class='add'>+	struct can_bittiming *nom_bt = &amp;priv-&gt;can.bittiming;</div><div class='add'>+	struct can_bittiming *data_bt = &amp;priv-&gt;can.fd.data_bittiming;</div><div class='add'>+	struct esd_usb_3_set_baudrate_msg_x *baud_x;</div><div class='add'>+	union esd_usb_msg *msg;</div><div class='add'>+	u16 flags = 0;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	msg = kmalloc(sizeof(*msg), GFP_KERNEL);</div><div class='add'>+	if (!msg)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	baud_x = &amp;msg-&gt;setbaud_x;</div><div class='add'>+</div><div class='add'>+	/* Canonical is the most reasonable mode for SocketCAN on CAN-USB/3 ... */</div><div class='add'>+	baud_x-&gt;mode = cpu_to_le16(ESD_USB_3_BAUDRATE_MODE_BTR_CANONICAL);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LISTENONLY)</div><div class='add'>+		flags |= ESD_USB_3_BAUDRATE_FLAG_LOM;</div><div class='add'>+</div><div class='add'>+	baud_x-&gt;nom.brp = cpu_to_le16(nom_bt-&gt;brp &amp; (nom_btc-&gt;brp_max - 1));</div><div class='add'>+	baud_x-&gt;nom.sjw = cpu_to_le16(nom_bt-&gt;sjw &amp; (nom_btc-&gt;sjw_max - 1));</div><div class='add'>+	baud_x-&gt;nom.tseg1 = cpu_to_le16((nom_bt-&gt;prop_seg + nom_bt-&gt;phase_seg1)</div><div class='add'>+					&amp; (nom_btc-&gt;tseg1_max - 1));</div><div class='add'>+	baud_x-&gt;nom.tseg2 = cpu_to_le16(nom_bt-&gt;phase_seg2 &amp; (nom_btc-&gt;tseg2_max - 1));</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD) {</div><div class='add'>+		baud_x-&gt;data.brp = cpu_to_le16(data_bt-&gt;brp &amp; (data_btc-&gt;brp_max - 1));</div><div class='add'>+		baud_x-&gt;data.sjw = cpu_to_le16(data_bt-&gt;sjw &amp; (data_btc-&gt;sjw_max - 1));</div><div class='add'>+		baud_x-&gt;data.tseg1 = cpu_to_le16((data_bt-&gt;prop_seg + data_bt-&gt;phase_seg1)</div><div class='add'>+						 &amp; (data_btc-&gt;tseg1_max - 1));</div><div class='add'>+		baud_x-&gt;data.tseg2 = cpu_to_le16(data_bt-&gt;phase_seg2 &amp; (data_btc-&gt;tseg2_max - 1));</div><div class='add'>+		flags |= ESD_USB_3_BAUDRATE_FLAG_FD;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Currently this driver only supports the automatic TDC mode */</div><div class='add'>+	baud_x-&gt;tdc.tdc_mode = ESD_USB_3_TDC_MODE_AUTO;</div><div class='add'>+	baud_x-&gt;tdc.ssp_offset = 0;</div><div class='add'>+	baud_x-&gt;tdc.ssp_shift = 0;</div><div class='add'>+	baud_x-&gt;tdc.tdc_filter = 0;</div><div class='add'>+</div><div class='add'>+	baud_x-&gt;flags = cpu_to_le16(flags);</div><div class='add'>+	baud_x-&gt;net = priv-&gt;index;</div><div class='add'>+	baud_x-&gt;rsvd = 0;</div><div class='add'>+</div><div class='add'>+	/* set len as # of 32bit words */</div><div class='add'>+	msg-&gt;hdr.len = sizeof(struct esd_usb_3_set_baudrate_msg_x) / sizeof(u32);</div><div class='add'>+	msg-&gt;hdr.cmd = ESD_USB_CMD_SETBAUD;</div><div class='add'>+</div><div class='add'>+	netdev_dbg(netdev,</div><div class='add'>+		   "ctrlmode=%#x/%#x, esd-net=%u, esd-mode=%#x, esd-flags=%#x\n",</div><div class='add'>+		   priv-&gt;can.ctrlmode, priv-&gt;can.ctrlmode_supported,</div><div class='add'>+		   priv-&gt;index, le16_to_cpu(baud_x-&gt;mode), flags);</div><div class='add'>+</div><div class='add'>+	err = esd_usb_send_msg(priv-&gt;usb, msg);</div><div class='add'>+</div><div class='add'>+	kfree(msg);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int esd_usb_get_berr_counter(const struct net_device *netdev,</div><div class='add'>+				    struct can_berr_counter *bec)</div><div class='add'>+{</div><div class='add'>+	struct esd_usb_net_priv *priv = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	bec-&gt;txerr = priv-&gt;bec.txerr;</div><div class='add'>+	bec-&gt;rxerr = priv-&gt;bec.rxerr;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int esd_usb_set_mode(struct net_device *netdev, enum can_mode mode)</div><div class='add'>+{</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case CAN_MODE_START:</div><div class='add'>+		netif_wake_queue(netdev);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int esd_usb_probe_one_net(struct usb_interface *intf, int index)</div><div class='add'>+{</div><div class='add'>+	struct esd_usb *dev = usb_get_intfdata(intf);</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	struct esd_usb_net_priv *priv;</div><div class='add'>+	int err = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	netdev = alloc_candev(sizeof(*priv), ESD_USB_MAX_TX_URBS);</div><div class='add'>+	if (!netdev) {</div><div class='add'>+		dev_err(&amp;intf-&gt;dev, "couldn't alloc candev\n");</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	init_usb_anchor(&amp;priv-&gt;tx_submitted);</div><div class='add'>+	atomic_set(&amp;priv-&gt;active_tx_jobs, 0);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ESD_USB_MAX_TX_URBS; i++)</div><div class='add'>+		priv-&gt;tx_contexts[i].echo_index = ESD_USB_MAX_TX_URBS;</div><div class='add'>+</div><div class='add'>+	priv-&gt;usb = dev;</div><div class='add'>+	priv-&gt;netdev = netdev;</div><div class='add'>+	priv-&gt;index = index;</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='add'>+	priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_LISTENONLY |</div><div class='add'>+		CAN_CTRLMODE_CC_LEN8_DLC |</div><div class='add'>+		CAN_CTRLMODE_BERR_REPORTING;</div><div class='add'>+</div><div class='add'>+	switch (le16_to_cpu(dev-&gt;udev-&gt;descriptor.idProduct)) {</div><div class='add'>+	case ESD_USB_CANUSB3_PRODUCT_ID:</div><div class='add'>+		priv-&gt;can.clock.freq = ESD_USB_3_CAN_CLOCK;</div><div class='add'>+		priv-&gt;can.ctrlmode_supported |= CAN_CTRLMODE_FD;</div><div class='add'>+		priv-&gt;can.bittiming_const = &amp;esd_usb_3_nom_bittiming_const;</div><div class='add'>+		priv-&gt;can.fd.data_bittiming_const = &amp;esd_usb_3_data_bittiming_const;</div><div class='add'>+		priv-&gt;can.do_set_bittiming = esd_usb_3_set_bittiming;</div><div class='add'>+		priv-&gt;can.fd.do_set_data_bittiming = esd_usb_3_set_bittiming;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case ESD_USB_CANUSBM_PRODUCT_ID:</div><div class='add'>+		priv-&gt;can.clock.freq = ESD_USB_M_CAN_CLOCK;</div><div class='add'>+		priv-&gt;can.bittiming_const = &amp;esd_usb_2_bittiming_const;</div><div class='add'>+		priv-&gt;can.do_set_bittiming = esd_usb_2_set_bittiming;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case ESD_USB_CANUSB2_PRODUCT_ID:</div><div class='add'>+	default:</div><div class='add'>+		priv-&gt;can.clock.freq = ESD_USB_2_CAN_CLOCK;</div><div class='add'>+		priv-&gt;can.ctrlmode_supported |= CAN_CTRLMODE_3_SAMPLES;</div><div class='add'>+		priv-&gt;can.bittiming_const = &amp;esd_usb_2_bittiming_const;</div><div class='add'>+		priv-&gt;can.do_set_bittiming = esd_usb_2_set_bittiming;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.do_set_mode = esd_usb_set_mode;</div><div class='add'>+	priv-&gt;can.do_get_berr_counter = esd_usb_get_berr_counter;</div><div class='add'>+</div><div class='add'>+	netdev-&gt;flags |= IFF_ECHO; /* we support local echo */</div><div class='add'>+</div><div class='add'>+	netdev-&gt;netdev_ops = &amp;esd_usb_netdev_ops;</div><div class='add'>+	netdev-&gt;ethtool_ops = &amp;esd_usb_ethtool_ops;</div><div class='add'>+</div><div class='add'>+	SET_NETDEV_DEV(netdev, &amp;intf-&gt;dev);</div><div class='add'>+	netdev-&gt;dev_id = index;</div><div class='add'>+</div><div class='add'>+	err = register_candev(netdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;intf-&gt;dev, "couldn't register CAN device: %pe\n", ERR_PTR(err));</div><div class='add'>+		free_candev(netdev);</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev-&gt;nets[index] = priv;</div><div class='add'>+	netdev_info(netdev, "registered\n");</div><div class='add'>+</div><div class='add'>+done:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* probe function for new USB devices</div><div class='add'>+ *</div><div class='add'>+ * check version information and number of available</div><div class='add'>+ * CAN interfaces</div><div class='add'>+ */</div><div class='add'>+static int esd_usb_probe(struct usb_interface *intf,</div><div class='add'>+			 const struct usb_device_id *id)</div><div class='add'>+{</div><div class='add'>+	struct esd_usb *dev;</div><div class='add'>+	union esd_usb_msg *msg;</div><div class='add'>+	int i, err;</div><div class='add'>+</div><div class='add'>+	dev = kzalloc(sizeof(*dev), GFP_KERNEL);</div><div class='add'>+	if (!dev) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev-&gt;udev = interface_to_usbdev(intf);</div><div class='add'>+</div><div class='add'>+	init_usb_anchor(&amp;dev-&gt;rx_submitted);</div><div class='add'>+</div><div class='add'>+	usb_set_intfdata(intf, dev);</div><div class='add'>+</div><div class='add'>+	msg = kmalloc(sizeof(*msg), GFP_KERNEL);</div><div class='add'>+	if (!msg) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto free_msg;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* query number of CAN interfaces (nets) */</div><div class='add'>+	msg-&gt;hdr.cmd = ESD_USB_CMD_VERSION;</div><div class='add'>+	msg-&gt;hdr.len = sizeof(struct esd_usb_version_msg) / sizeof(u32); /* # of 32bit words */</div><div class='add'>+	msg-&gt;version.rsvd = 0;</div><div class='add'>+	msg-&gt;version.flags = 0;</div><div class='add'>+	msg-&gt;version.drv_version = 0;</div><div class='add'>+</div><div class='add'>+	err = esd_usb_send_msg(dev, msg);</div><div class='add'>+	if (err &lt; 0) {</div><div class='add'>+		dev_err(&amp;intf-&gt;dev, "sending version message failed\n");</div><div class='add'>+		goto free_msg;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = esd_usb_wait_msg(dev, msg);</div><div class='add'>+	if (err &lt; 0) {</div><div class='add'>+		dev_err(&amp;intf-&gt;dev, "no version message answer\n");</div><div class='add'>+		goto free_msg;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev-&gt;net_count = (int)msg-&gt;version_reply.nets;</div><div class='add'>+	dev-&gt;version = le32_to_cpu(msg-&gt;version_reply.version);</div><div class='add'>+</div><div class='add'>+	if (device_create_file(&amp;intf-&gt;dev, &amp;dev_attr_firmware))</div><div class='add'>+		dev_err(&amp;intf-&gt;dev,</div><div class='add'>+			"Couldn't create device file for firmware\n");</div><div class='add'>+</div><div class='add'>+	if (device_create_file(&amp;intf-&gt;dev, &amp;dev_attr_hardware))</div><div class='add'>+		dev_err(&amp;intf-&gt;dev,</div><div class='add'>+			"Couldn't create device file for hardware\n");</div><div class='add'>+</div><div class='add'>+	if (device_create_file(&amp;intf-&gt;dev, &amp;dev_attr_nets))</div><div class='add'>+		dev_err(&amp;intf-&gt;dev,</div><div class='add'>+			"Couldn't create device file for nets\n");</div><div class='add'>+</div><div class='add'>+	/* do per device probing */</div><div class='add'>+	for (i = 0; i &lt; dev-&gt;net_count; i++)</div><div class='add'>+		esd_usb_probe_one_net(intf, i);</div><div class='add'>+</div><div class='add'>+free_msg:</div><div class='add'>+	kfree(msg);</div><div class='add'>+	if (err)</div><div class='add'>+		kfree(dev);</div><div class='add'>+done:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* called by the usb core when the device is removed from the system */</div><div class='add'>+static void esd_usb_disconnect(struct usb_interface *intf)</div><div class='add'>+{</div><div class='add'>+	struct esd_usb *dev = usb_get_intfdata(intf);</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	device_remove_file(&amp;intf-&gt;dev, &amp;dev_attr_firmware);</div><div class='add'>+	device_remove_file(&amp;intf-&gt;dev, &amp;dev_attr_hardware);</div><div class='add'>+	device_remove_file(&amp;intf-&gt;dev, &amp;dev_attr_nets);</div><div class='add'>+</div><div class='add'>+	usb_set_intfdata(intf, NULL);</div><div class='add'>+</div><div class='add'>+	if (dev) {</div><div class='add'>+		dev-&gt;in_usb_disconnect = 1;</div><div class='add'>+		for (i = 0; i &lt; dev-&gt;net_count; i++) {</div><div class='add'>+			if (dev-&gt;nets[i]) {</div><div class='add'>+				netdev = dev-&gt;nets[i]-&gt;netdev;</div><div class='add'>+				netdev_info(netdev, "unregister\n");</div><div class='add'>+				unregister_netdev(netdev);</div><div class='add'>+				free_candev(netdev);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		unlink_all_urbs(dev);</div><div class='add'>+		kfree(dev);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* usb specific object needed to register this driver with the usb subsystem */</div><div class='add'>+static struct usb_driver esd_usb_driver = {</div><div class='add'>+	.name = KBUILD_MODNAME,</div><div class='add'>+	.probe = esd_usb_probe,</div><div class='add'>+	.disconnect = esd_usb_disconnect,</div><div class='add'>+	.id_table = esd_usb_table,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_usb_driver(esd_usb_driver);</div><div class='head'>diff --git a/drivers/net/can/usb/esd_usb2.c b/drivers/net/can/usb/esd_usb2.c<br/>deleted file mode 100644<br/>index 0e5a4493ba4f..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/esd_usb2.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/esd_usb2.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,1155 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * CAN driver for esd CAN-USB/2 and CAN-USB/Micro</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2010-2012 Matthias Fuchs &lt;matthias.fuchs@esd.eu&gt;, esd gmbh</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms of the GNU General Public License as published</div><div class='del'>- * by the Free Software Foundation; version 2 of the License.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License along</div><div class='del'>- * with this program; if not, write to the Free Software Foundation, Inc.,</div><div class='del'>- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.</div><div class='del'>- */</div><div class='del'>-#include &lt;linux/signal.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/usb.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;linux/can.h&gt;</div><div class='del'>-#include &lt;linux/can/dev.h&gt;</div><div class='del'>-#include &lt;linux/can/error.h&gt;</div><div class='del'>-</div><div class='del'>-MODULE_AUTHOR("Matthias Fuchs &lt;matthias.fuchs@esd.eu&gt;");</div><div class='del'>-MODULE_DESCRIPTION("CAN driver for esd CAN-USB/2 and CAN-USB/Micro interfaces");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='del'>-</div><div class='del'>-/* Define these values to match your devices */</div><div class='del'>-#define USB_ESDGMBH_VENDOR_ID	0x0ab4</div><div class='del'>-#define USB_CANUSB2_PRODUCT_ID	0x0010</div><div class='del'>-#define USB_CANUSBM_PRODUCT_ID	0x0011</div><div class='del'>-</div><div class='del'>-#define ESD_USB2_CAN_CLOCK	60000000</div><div class='del'>-#define ESD_USBM_CAN_CLOCK	36000000</div><div class='del'>-#define ESD_USB2_MAX_NETS	2</div><div class='del'>-</div><div class='del'>-/* USB2 commands */</div><div class='del'>-#define CMD_VERSION		1 /* also used for VERSION_REPLY */</div><div class='del'>-#define CMD_CAN_RX		2 /* device to host only */</div><div class='del'>-#define CMD_CAN_TX		3 /* also used for TX_DONE */</div><div class='del'>-#define CMD_SETBAUD		4 /* also used for SETBAUD_REPLY */</div><div class='del'>-#define CMD_TS			5 /* also used for TS_REPLY */</div><div class='del'>-#define CMD_IDADD		6 /* also used for IDADD_REPLY */</div><div class='del'>-</div><div class='del'>-/* esd CAN message flags - dlc field */</div><div class='del'>-#define ESD_RTR			0x10</div><div class='del'>-</div><div class='del'>-/* esd CAN message flags - id field */</div><div class='del'>-#define ESD_EXTID		0x20000000</div><div class='del'>-#define ESD_EVENT		0x40000000</div><div class='del'>-#define ESD_IDMASK		0x1fffffff</div><div class='del'>-</div><div class='del'>-/* esd CAN event ids used by this driver */</div><div class='del'>-#define ESD_EV_CAN_ERROR_EXT	2</div><div class='del'>-</div><div class='del'>-/* baudrate message flags */</div><div class='del'>-#define ESD_USB2_UBR		0x80000000</div><div class='del'>-#define ESD_USB2_LOM		0x40000000</div><div class='del'>-#define ESD_USB2_NO_BAUDRATE	0x7fffffff</div><div class='del'>-#define ESD_USB2_TSEG1_MIN	1</div><div class='del'>-#define ESD_USB2_TSEG1_MAX	16</div><div class='del'>-#define ESD_USB2_TSEG1_SHIFT	16</div><div class='del'>-#define ESD_USB2_TSEG2_MIN	1</div><div class='del'>-#define ESD_USB2_TSEG2_MAX	8</div><div class='del'>-#define ESD_USB2_TSEG2_SHIFT	20</div><div class='del'>-#define ESD_USB2_SJW_MAX	4</div><div class='del'>-#define ESD_USB2_SJW_SHIFT	14</div><div class='del'>-#define ESD_USBM_SJW_SHIFT	24</div><div class='del'>-#define ESD_USB2_BRP_MIN	1</div><div class='del'>-#define ESD_USB2_BRP_MAX	1024</div><div class='del'>-#define ESD_USB2_BRP_INC	1</div><div class='del'>-#define ESD_USB2_3_SAMPLES	0x00800000</div><div class='del'>-</div><div class='del'>-/* esd IDADD message */</div><div class='del'>-#define ESD_ID_ENABLE		0x80</div><div class='del'>-#define ESD_MAX_ID_SEGMENT	64</div><div class='del'>-</div><div class='del'>-/* SJA1000 ECC register (emulated by usb2 firmware) */</div><div class='del'>-#define SJA1000_ECC_SEG		0x1F</div><div class='del'>-#define SJA1000_ECC_DIR		0x20</div><div class='del'>-#define SJA1000_ECC_ERR		0x06</div><div class='del'>-#define SJA1000_ECC_BIT		0x00</div><div class='del'>-#define SJA1000_ECC_FORM	0x40</div><div class='del'>-#define SJA1000_ECC_STUFF	0x80</div><div class='del'>-#define SJA1000_ECC_MASK	0xc0</div><div class='del'>-</div><div class='del'>-/* esd bus state event codes */</div><div class='del'>-#define ESD_BUSSTATE_MASK	0xc0</div><div class='del'>-#define ESD_BUSSTATE_WARN	0x40</div><div class='del'>-#define ESD_BUSSTATE_ERRPASSIVE	0x80</div><div class='del'>-#define ESD_BUSSTATE_BUSOFF	0xc0</div><div class='del'>-</div><div class='del'>-#define RX_BUFFER_SIZE		1024</div><div class='del'>-#define MAX_RX_URBS		4</div><div class='del'>-#define MAX_TX_URBS		16 /* must be power of 2 */</div><div class='del'>-</div><div class='del'>-struct header_msg {</div><div class='del'>-	u8 len; /* len is always the total message length in 32bit words */</div><div class='del'>-	u8 cmd;</div><div class='del'>-	u8 rsvd[2];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct version_msg {</div><div class='del'>-	u8 len;</div><div class='del'>-	u8 cmd;</div><div class='del'>-	u8 rsvd;</div><div class='del'>-	u8 flags;</div><div class='del'>-	__le32 drv_version;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct version_reply_msg {</div><div class='del'>-	u8 len;</div><div class='del'>-	u8 cmd;</div><div class='del'>-	u8 nets;</div><div class='del'>-	u8 features;</div><div class='del'>-	__le32 version;</div><div class='del'>-	u8 name[16];</div><div class='del'>-	__le32 rsvd;</div><div class='del'>-	__le32 ts;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct rx_msg {</div><div class='del'>-	u8 len;</div><div class='del'>-	u8 cmd;</div><div class='del'>-	u8 net;</div><div class='del'>-	u8 dlc;</div><div class='del'>-	__le32 ts;</div><div class='del'>-	__le32 id; /* upper 3 bits contain flags */</div><div class='del'>-	u8 data[8];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct tx_msg {</div><div class='del'>-	u8 len;</div><div class='del'>-	u8 cmd;</div><div class='del'>-	u8 net;</div><div class='del'>-	u8 dlc;</div><div class='del'>-	u32 hnd;	/* opaque handle, not used by device */</div><div class='del'>-	__le32 id; /* upper 3 bits contain flags */</div><div class='del'>-	u8 data[8];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct tx_done_msg {</div><div class='del'>-	u8 len;</div><div class='del'>-	u8 cmd;</div><div class='del'>-	u8 net;</div><div class='del'>-	u8 status;</div><div class='del'>-	u32 hnd;	/* opaque handle, not used by device */</div><div class='del'>-	__le32 ts;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct id_filter_msg {</div><div class='del'>-	u8 len;</div><div class='del'>-	u8 cmd;</div><div class='del'>-	u8 net;</div><div class='del'>-	u8 option;</div><div class='del'>-	__le32 mask[ESD_MAX_ID_SEGMENT + 1];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct set_baudrate_msg {</div><div class='del'>-	u8 len;</div><div class='del'>-	u8 cmd;</div><div class='del'>-	u8 net;</div><div class='del'>-	u8 rsvd;</div><div class='del'>-	__le32 baud;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Main message type used between library and application */</div><div class='del'>-struct __attribute__ ((packed)) esd_usb2_msg {</div><div class='del'>-	union {</div><div class='del'>-		struct header_msg hdr;</div><div class='del'>-		struct version_msg version;</div><div class='del'>-		struct version_reply_msg version_reply;</div><div class='del'>-		struct rx_msg rx;</div><div class='del'>-		struct tx_msg tx;</div><div class='del'>-		struct tx_done_msg txdone;</div><div class='del'>-		struct set_baudrate_msg setbaud;</div><div class='del'>-		struct id_filter_msg filter;</div><div class='del'>-	} msg;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct usb_device_id esd_usb2_table[] = {</div><div class='del'>-	{USB_DEVICE(USB_ESDGMBH_VENDOR_ID, USB_CANUSB2_PRODUCT_ID)},</div><div class='del'>-	{USB_DEVICE(USB_ESDGMBH_VENDOR_ID, USB_CANUSBM_PRODUCT_ID)},</div><div class='del'>-	{}</div><div class='del'>-};</div><div class='del'>-MODULE_DEVICE_TABLE(usb, esd_usb2_table);</div><div class='del'>-</div><div class='del'>-struct esd_usb2_net_priv;</div><div class='del'>-</div><div class='del'>-struct esd_tx_urb_context {</div><div class='del'>-	struct esd_usb2_net_priv *priv;</div><div class='del'>-	u32 echo_index;</div><div class='del'>-	int dlc;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct esd_usb2 {</div><div class='del'>-	struct usb_device *udev;</div><div class='del'>-	struct esd_usb2_net_priv *nets[ESD_USB2_MAX_NETS];</div><div class='del'>-</div><div class='del'>-	struct usb_anchor rx_submitted;</div><div class='del'>-</div><div class='del'>-	int net_count;</div><div class='del'>-	u32 version;</div><div class='del'>-	int rxinitdone;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct esd_usb2_net_priv {</div><div class='del'>-	struct can_priv can; /* must be the first member */</div><div class='del'>-</div><div class='del'>-	atomic_t active_tx_jobs;</div><div class='del'>-	struct usb_anchor tx_submitted;</div><div class='del'>-	struct esd_tx_urb_context tx_contexts[MAX_TX_URBS];</div><div class='del'>-</div><div class='del'>-	struct esd_usb2 *usb2;</div><div class='del'>-	struct net_device *netdev;</div><div class='del'>-	int index;</div><div class='del'>-	u8 old_state;</div><div class='del'>-	struct can_berr_counter bec;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void esd_usb2_rx_event(struct esd_usb2_net_priv *priv,</div><div class='del'>-			      struct esd_usb2_msg *msg)</div><div class='del'>-{</div><div class='del'>-	struct net_device_stats *stats = &amp;priv-&gt;netdev-&gt;stats;</div><div class='del'>-	struct can_frame *cf;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	u32 id = le32_to_cpu(msg-&gt;msg.rx.id) &amp; ESD_IDMASK;</div><div class='del'>-</div><div class='del'>-	if (id == ESD_EV_CAN_ERROR_EXT) {</div><div class='del'>-		u8 state = msg-&gt;msg.rx.data[0];</div><div class='del'>-		u8 ecc = msg-&gt;msg.rx.data[1];</div><div class='del'>-		u8 txerr = msg-&gt;msg.rx.data[2];</div><div class='del'>-		u8 rxerr = msg-&gt;msg.rx.data[3];</div><div class='del'>-</div><div class='del'>-		skb = alloc_can_err_skb(priv-&gt;netdev, &amp;cf);</div><div class='del'>-		if (skb == NULL) {</div><div class='del'>-			stats-&gt;rx_dropped++;</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (state != priv-&gt;old_state) {</div><div class='del'>-			priv-&gt;old_state = state;</div><div class='del'>-</div><div class='del'>-			switch (state &amp; ESD_BUSSTATE_MASK) {</div><div class='del'>-			case ESD_BUSSTATE_BUSOFF:</div><div class='del'>-				priv-&gt;can.state = CAN_STATE_BUS_OFF;</div><div class='del'>-				cf-&gt;can_id |= CAN_ERR_BUSOFF;</div><div class='del'>-				priv-&gt;can.can_stats.bus_off++;</div><div class='del'>-				can_bus_off(priv-&gt;netdev);</div><div class='del'>-				break;</div><div class='del'>-			case ESD_BUSSTATE_WARN:</div><div class='del'>-				priv-&gt;can.state = CAN_STATE_ERROR_WARNING;</div><div class='del'>-				priv-&gt;can.can_stats.error_warning++;</div><div class='del'>-				break;</div><div class='del'>-			case ESD_BUSSTATE_ERRPASSIVE:</div><div class='del'>-				priv-&gt;can.state = CAN_STATE_ERROR_PASSIVE;</div><div class='del'>-				priv-&gt;can.can_stats.error_passive++;</div><div class='del'>-				break;</div><div class='del'>-			default:</div><div class='del'>-				priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-		} else {</div><div class='del'>-			priv-&gt;can.can_stats.bus_error++;</div><div class='del'>-			stats-&gt;rx_errors++;</div><div class='del'>-</div><div class='del'>-			cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='del'>-</div><div class='del'>-			switch (ecc &amp; SJA1000_ECC_MASK) {</div><div class='del'>-			case SJA1000_ECC_BIT:</div><div class='del'>-				cf-&gt;data[2] |= CAN_ERR_PROT_BIT;</div><div class='del'>-				break;</div><div class='del'>-			case SJA1000_ECC_FORM:</div><div class='del'>-				cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='del'>-				break;</div><div class='del'>-			case SJA1000_ECC_STUFF:</div><div class='del'>-				cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='del'>-				break;</div><div class='del'>-			default:</div><div class='del'>-				cf-&gt;data[2] |= CAN_ERR_PROT_UNSPEC;</div><div class='del'>-				cf-&gt;data[3] = ecc &amp; SJA1000_ECC_SEG;</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			/* Error occurred during transmission? */</div><div class='del'>-			if (!(ecc &amp; SJA1000_ECC_DIR))</div><div class='del'>-				cf-&gt;data[2] |= CAN_ERR_PROT_TX;</div><div class='del'>-</div><div class='del'>-			if (priv-&gt;can.state == CAN_STATE_ERROR_WARNING ||</div><div class='del'>-			    priv-&gt;can.state == CAN_STATE_ERROR_PASSIVE) {</div><div class='del'>-				cf-&gt;data[1] = (txerr &gt; rxerr) ?</div><div class='del'>-					CAN_ERR_CRTL_TX_PASSIVE :</div><div class='del'>-					CAN_ERR_CRTL_RX_PASSIVE;</div><div class='del'>-			}</div><div class='del'>-			cf-&gt;data[6] = txerr;</div><div class='del'>-			cf-&gt;data[7] = rxerr;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		priv-&gt;bec.txerr = txerr;</div><div class='del'>-		priv-&gt;bec.rxerr = rxerr;</div><div class='del'>-</div><div class='del'>-		stats-&gt;rx_packets++;</div><div class='del'>-		stats-&gt;rx_bytes += cf-&gt;can_dlc;</div><div class='del'>-		netif_rx(skb);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void esd_usb2_rx_can_msg(struct esd_usb2_net_priv *priv,</div><div class='del'>-				struct esd_usb2_msg *msg)</div><div class='del'>-{</div><div class='del'>-	struct net_device_stats *stats = &amp;priv-&gt;netdev-&gt;stats;</div><div class='del'>-	struct can_frame *cf;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	int i;</div><div class='del'>-	u32 id;</div><div class='del'>-</div><div class='del'>-	if (!netif_device_present(priv-&gt;netdev))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	id = le32_to_cpu(msg-&gt;msg.rx.id);</div><div class='del'>-</div><div class='del'>-	if (id &amp; ESD_EVENT) {</div><div class='del'>-		esd_usb2_rx_event(priv, msg);</div><div class='del'>-	} else {</div><div class='del'>-		skb = alloc_can_skb(priv-&gt;netdev, &amp;cf);</div><div class='del'>-		if (skb == NULL) {</div><div class='del'>-			stats-&gt;rx_dropped++;</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		cf-&gt;can_id = id &amp; ESD_IDMASK;</div><div class='del'>-		cf-&gt;can_dlc = get_can_dlc(msg-&gt;msg.rx.dlc);</div><div class='del'>-</div><div class='del'>-		if (id &amp; ESD_EXTID)</div><div class='del'>-			cf-&gt;can_id |= CAN_EFF_FLAG;</div><div class='del'>-</div><div class='del'>-		if (msg-&gt;msg.rx.dlc &amp; ESD_RTR) {</div><div class='del'>-			cf-&gt;can_id |= CAN_RTR_FLAG;</div><div class='del'>-		} else {</div><div class='del'>-			for (i = 0; i &lt; cf-&gt;can_dlc; i++)</div><div class='del'>-				cf-&gt;data[i] = msg-&gt;msg.rx.data[i];</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		stats-&gt;rx_packets++;</div><div class='del'>-		stats-&gt;rx_bytes += cf-&gt;can_dlc;</div><div class='del'>-		netif_rx(skb);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void esd_usb2_tx_done_msg(struct esd_usb2_net_priv *priv,</div><div class='del'>-				 struct esd_usb2_msg *msg)</div><div class='del'>-{</div><div class='del'>-	struct net_device_stats *stats = &amp;priv-&gt;netdev-&gt;stats;</div><div class='del'>-	struct net_device *netdev = priv-&gt;netdev;</div><div class='del'>-	struct esd_tx_urb_context *context;</div><div class='del'>-</div><div class='del'>-	if (!netif_device_present(netdev))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	context = &amp;priv-&gt;tx_contexts[msg-&gt;msg.txdone.hnd &amp; (MAX_TX_URBS - 1)];</div><div class='del'>-</div><div class='del'>-	if (!msg-&gt;msg.txdone.status) {</div><div class='del'>-		stats-&gt;tx_packets++;</div><div class='del'>-		stats-&gt;tx_bytes += context-&gt;dlc;</div><div class='del'>-		can_get_echo_skb(netdev, context-&gt;echo_index);</div><div class='del'>-	} else {</div><div class='del'>-		stats-&gt;tx_errors++;</div><div class='del'>-		can_free_echo_skb(netdev, context-&gt;echo_index);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Release context */</div><div class='del'>-	context-&gt;echo_index = MAX_TX_URBS;</div><div class='del'>-	atomic_dec(&amp;priv-&gt;active_tx_jobs);</div><div class='del'>-</div><div class='del'>-	netif_wake_queue(netdev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void esd_usb2_read_bulk_callback(struct urb *urb)</div><div class='del'>-{</div><div class='del'>-	struct esd_usb2 *dev = urb-&gt;context;</div><div class='del'>-	int retval;</div><div class='del'>-	int pos = 0;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	switch (urb-&gt;status) {</div><div class='del'>-	case 0: /* success */</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case -ENOENT:</div><div class='del'>-	case -ESHUTDOWN:</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		dev_info(dev-&gt;udev-&gt;dev.parent,</div><div class='del'>-			 "Rx URB aborted (%d)\n", urb-&gt;status);</div><div class='del'>-		goto resubmit_urb;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (pos &lt; urb-&gt;actual_length) {</div><div class='del'>-		struct esd_usb2_msg *msg;</div><div class='del'>-</div><div class='del'>-		msg = (struct esd_usb2_msg *)(urb-&gt;transfer_buffer + pos);</div><div class='del'>-</div><div class='del'>-		switch (msg-&gt;msg.hdr.cmd) {</div><div class='del'>-		case CMD_CAN_RX:</div><div class='del'>-			if (msg-&gt;msg.rx.net &gt;= dev-&gt;net_count) {</div><div class='del'>-				dev_err(dev-&gt;udev-&gt;dev.parent, "format error\n");</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			esd_usb2_rx_can_msg(dev-&gt;nets[msg-&gt;msg.rx.net], msg);</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		case CMD_CAN_TX:</div><div class='del'>-			if (msg-&gt;msg.txdone.net &gt;= dev-&gt;net_count) {</div><div class='del'>-				dev_err(dev-&gt;udev-&gt;dev.parent, "format error\n");</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			esd_usb2_tx_done_msg(dev-&gt;nets[msg-&gt;msg.txdone.net],</div><div class='del'>-					     msg);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		pos += msg-&gt;msg.hdr.len &lt;&lt; 2;</div><div class='del'>-</div><div class='del'>-		if (pos &gt; urb-&gt;actual_length) {</div><div class='del'>-			dev_err(dev-&gt;udev-&gt;dev.parent, "format error\n");</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-resubmit_urb:</div><div class='del'>-	usb_fill_bulk_urb(urb, dev-&gt;udev, usb_rcvbulkpipe(dev-&gt;udev, 1),</div><div class='del'>-			  urb-&gt;transfer_buffer, RX_BUFFER_SIZE,</div><div class='del'>-			  esd_usb2_read_bulk_callback, dev);</div><div class='del'>-</div><div class='del'>-	retval = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='del'>-	if (retval == -ENODEV) {</div><div class='del'>-		for (i = 0; i &lt; dev-&gt;net_count; i++) {</div><div class='del'>-			if (dev-&gt;nets[i])</div><div class='del'>-				netif_device_detach(dev-&gt;nets[i]-&gt;netdev);</div><div class='del'>-		}</div><div class='del'>-	} else if (retval) {</div><div class='del'>-		dev_err(dev-&gt;udev-&gt;dev.parent,</div><div class='del'>-			"failed resubmitting read bulk urb: %d\n", retval);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * callback for bulk IN urb</div><div class='del'>- */</div><div class='del'>-static void esd_usb2_write_bulk_callback(struct urb *urb)</div><div class='del'>-{</div><div class='del'>-	struct esd_tx_urb_context *context = urb-&gt;context;</div><div class='del'>-	struct esd_usb2_net_priv *priv;</div><div class='del'>-	struct net_device *netdev;</div><div class='del'>-	size_t size = sizeof(struct esd_usb2_msg);</div><div class='del'>-</div><div class='del'>-	WARN_ON(!context);</div><div class='del'>-</div><div class='del'>-	priv = context-&gt;priv;</div><div class='del'>-	netdev = priv-&gt;netdev;</div><div class='del'>-</div><div class='del'>-	/* free up our allocated buffer */</div><div class='del'>-	usb_free_coherent(urb-&gt;dev, size,</div><div class='del'>-			  urb-&gt;transfer_buffer, urb-&gt;transfer_dma);</div><div class='del'>-</div><div class='del'>-	if (!netif_device_present(netdev))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (urb-&gt;status)</div><div class='del'>-		netdev_info(netdev, "Tx URB aborted (%d)\n", urb-&gt;status);</div><div class='del'>-</div><div class='del'>-	netdev-&gt;trans_start = jiffies;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static ssize_t show_firmware(struct device *d,</div><div class='del'>-			     struct device_attribute *attr, char *buf)</div><div class='del'>-{</div><div class='del'>-	struct usb_interface *intf = to_usb_interface(d);</div><div class='del'>-	struct esd_usb2 *dev = usb_get_intfdata(intf);</div><div class='del'>-</div><div class='del'>-	return sprintf(buf, "%d.%d.%d\n",</div><div class='del'>-		       (dev-&gt;version &gt;&gt; 12) &amp; 0xf,</div><div class='del'>-		       (dev-&gt;version &gt;&gt; 8) &amp; 0xf,</div><div class='del'>-		       dev-&gt;version &amp; 0xff);</div><div class='del'>-}</div><div class='del'>-static DEVICE_ATTR(firmware, S_IRUGO, show_firmware, NULL);</div><div class='del'>-</div><div class='del'>-static ssize_t show_hardware(struct device *d,</div><div class='del'>-			     struct device_attribute *attr, char *buf)</div><div class='del'>-{</div><div class='del'>-	struct usb_interface *intf = to_usb_interface(d);</div><div class='del'>-	struct esd_usb2 *dev = usb_get_intfdata(intf);</div><div class='del'>-</div><div class='del'>-	return sprintf(buf, "%d.%d.%d\n",</div><div class='del'>-		       (dev-&gt;version &gt;&gt; 28) &amp; 0xf,</div><div class='del'>-		       (dev-&gt;version &gt;&gt; 24) &amp; 0xf,</div><div class='del'>-		       (dev-&gt;version &gt;&gt; 16) &amp; 0xff);</div><div class='del'>-}</div><div class='del'>-static DEVICE_ATTR(hardware, S_IRUGO, show_hardware, NULL);</div><div class='del'>-</div><div class='del'>-static ssize_t show_nets(struct device *d,</div><div class='del'>-			 struct device_attribute *attr, char *buf)</div><div class='del'>-{</div><div class='del'>-	struct usb_interface *intf = to_usb_interface(d);</div><div class='del'>-	struct esd_usb2 *dev = usb_get_intfdata(intf);</div><div class='del'>-</div><div class='del'>-	return sprintf(buf, "%d", dev-&gt;net_count);</div><div class='del'>-}</div><div class='del'>-static DEVICE_ATTR(nets, S_IRUGO, show_nets, NULL);</div><div class='del'>-</div><div class='del'>-static int esd_usb2_send_msg(struct esd_usb2 *dev, struct esd_usb2_msg *msg)</div><div class='del'>-{</div><div class='del'>-	int actual_length;</div><div class='del'>-</div><div class='del'>-	return usb_bulk_msg(dev-&gt;udev,</div><div class='del'>-			    usb_sndbulkpipe(dev-&gt;udev, 2),</div><div class='del'>-			    msg,</div><div class='del'>-			    msg-&gt;msg.hdr.len &lt;&lt; 2,</div><div class='del'>-			    &amp;actual_length,</div><div class='del'>-			    1000);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int esd_usb2_wait_msg(struct esd_usb2 *dev,</div><div class='del'>-			     struct esd_usb2_msg *msg)</div><div class='del'>-{</div><div class='del'>-	int actual_length;</div><div class='del'>-</div><div class='del'>-	return usb_bulk_msg(dev-&gt;udev,</div><div class='del'>-			    usb_rcvbulkpipe(dev-&gt;udev, 1),</div><div class='del'>-			    msg,</div><div class='del'>-			    sizeof(*msg),</div><div class='del'>-			    &amp;actual_length,</div><div class='del'>-			    1000);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int esd_usb2_setup_rx_urbs(struct esd_usb2 *dev)</div><div class='del'>-{</div><div class='del'>-	int i, err = 0;</div><div class='del'>-</div><div class='del'>-	if (dev-&gt;rxinitdone)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; MAX_RX_URBS; i++) {</div><div class='del'>-		struct urb *urb = NULL;</div><div class='del'>-		u8 *buf = NULL;</div><div class='del'>-</div><div class='del'>-		/* create a URB, and a buffer for it */</div><div class='del'>-		urb = usb_alloc_urb(0, GFP_KERNEL);</div><div class='del'>-		if (!urb) {</div><div class='del'>-			dev_warn(dev-&gt;udev-&gt;dev.parent,</div><div class='del'>-				 "No memory left for URBs\n");</div><div class='del'>-			err = -ENOMEM;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		buf = usb_alloc_coherent(dev-&gt;udev, RX_BUFFER_SIZE, GFP_KERNEL,</div><div class='del'>-					 &amp;urb-&gt;transfer_dma);</div><div class='del'>-		if (!buf) {</div><div class='del'>-			dev_warn(dev-&gt;udev-&gt;dev.parent,</div><div class='del'>-				 "No memory left for USB buffer\n");</div><div class='del'>-			err = -ENOMEM;</div><div class='del'>-			goto freeurb;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		usb_fill_bulk_urb(urb, dev-&gt;udev,</div><div class='del'>-				  usb_rcvbulkpipe(dev-&gt;udev, 1),</div><div class='del'>-				  buf, RX_BUFFER_SIZE,</div><div class='del'>-				  esd_usb2_read_bulk_callback, dev);</div><div class='del'>-		urb-&gt;transfer_flags |= URB_NO_TRANSFER_DMA_MAP;</div><div class='del'>-		usb_anchor_urb(urb, &amp;dev-&gt;rx_submitted);</div><div class='del'>-</div><div class='del'>-		err = usb_submit_urb(urb, GFP_KERNEL);</div><div class='del'>-		if (err) {</div><div class='del'>-			usb_unanchor_urb(urb);</div><div class='del'>-			usb_free_coherent(dev-&gt;udev, RX_BUFFER_SIZE, buf,</div><div class='del'>-					  urb-&gt;transfer_dma);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-freeurb:</div><div class='del'>-		/* Drop reference, USB core will take care of freeing it */</div><div class='del'>-		usb_free_urb(urb);</div><div class='del'>-		if (err)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Did we submit any URBs */</div><div class='del'>-	if (i == 0) {</div><div class='del'>-		dev_err(dev-&gt;udev-&gt;dev.parent, "couldn't setup read URBs\n");</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Warn if we've couldn't transmit all the URBs */</div><div class='del'>-	if (i &lt; MAX_RX_URBS) {</div><div class='del'>-		dev_warn(dev-&gt;udev-&gt;dev.parent,</div><div class='del'>-			 "rx performance may be slow\n");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev-&gt;rxinitdone = 1;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Start interface</div><div class='del'>- */</div><div class='del'>-static int esd_usb2_start(struct esd_usb2_net_priv *priv)</div><div class='del'>-{</div><div class='del'>-	struct esd_usb2 *dev = priv-&gt;usb2;</div><div class='del'>-	struct net_device *netdev = priv-&gt;netdev;</div><div class='del'>-	struct esd_usb2_msg *msg;</div><div class='del'>-	int err, i;</div><div class='del'>-</div><div class='del'>-	msg = kmalloc(sizeof(*msg), GFP_KERNEL);</div><div class='del'>-	if (!msg) {</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Enable all IDs</div><div class='del'>-	 * The IDADD message takes up to 64 32 bit bitmasks (2048 bits).</div><div class='del'>-	 * Each bit represents one 11 bit CAN identifier. A set bit</div><div class='del'>-	 * enables reception of the corresponding CAN identifier. A cleared</div><div class='del'>-	 * bit disabled this identifier. An additional bitmask value</div><div class='del'>-	 * following the CAN 2.0A bits is used to enable reception of</div><div class='del'>-	 * extended CAN frames. Only the LSB of this final mask is checked</div><div class='del'>-	 * for the complete 29 bit ID range. The IDADD message also allows</div><div class='del'>-	 * filter configuration for an ID subset. In this case you can add</div><div class='del'>-	 * the number of the starting bitmask (0..64) to the filter.option</div><div class='del'>-	 * field followed by only some bitmasks.</div><div class='del'>-	 */</div><div class='del'>-	msg-&gt;msg.hdr.cmd = CMD_IDADD;</div><div class='del'>-	msg-&gt;msg.hdr.len = 2 + ESD_MAX_ID_SEGMENT;</div><div class='del'>-	msg-&gt;msg.filter.net = priv-&gt;index;</div><div class='del'>-	msg-&gt;msg.filter.option = ESD_ID_ENABLE; /* start with segment 0 */</div><div class='del'>-	for (i = 0; i &lt; ESD_MAX_ID_SEGMENT; i++)</div><div class='del'>-		msg-&gt;msg.filter.mask[i] = cpu_to_le32(0xffffffff);</div><div class='del'>-	/* enable 29bit extended IDs */</div><div class='del'>-	msg-&gt;msg.filter.mask[ESD_MAX_ID_SEGMENT] = cpu_to_le32(0x00000001);</div><div class='del'>-</div><div class='del'>-	err = esd_usb2_send_msg(dev, msg);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	err = esd_usb2_setup_rx_urbs(dev);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	if (err == -ENODEV)</div><div class='del'>-		netif_device_detach(netdev);</div><div class='del'>-	if (err)</div><div class='del'>-		netdev_err(netdev, "couldn't start device: %d\n", err);</div><div class='del'>-</div><div class='del'>-	kfree(msg);</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void unlink_all_urbs(struct esd_usb2 *dev)</div><div class='del'>-{</div><div class='del'>-	struct esd_usb2_net_priv *priv;</div><div class='del'>-	int i, j;</div><div class='del'>-</div><div class='del'>-	usb_kill_anchored_urbs(&amp;dev-&gt;rx_submitted);</div><div class='del'>-	for (i = 0; i &lt; dev-&gt;net_count; i++) {</div><div class='del'>-		priv = dev-&gt;nets[i];</div><div class='del'>-		if (priv) {</div><div class='del'>-			usb_kill_anchored_urbs(&amp;priv-&gt;tx_submitted);</div><div class='del'>-			atomic_set(&amp;priv-&gt;active_tx_jobs, 0);</div><div class='del'>-</div><div class='del'>-			for (j = 0; j &lt; MAX_TX_URBS; j++)</div><div class='del'>-				priv-&gt;tx_contexts[j].echo_index = MAX_TX_URBS;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int esd_usb2_open(struct net_device *netdev)</div><div class='del'>-{</div><div class='del'>-	struct esd_usb2_net_priv *priv = netdev_priv(netdev);</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	/* common open */</div><div class='del'>-	err = open_candev(netdev);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	/* finally start device */</div><div class='del'>-	err = esd_usb2_start(priv);</div><div class='del'>-	if (err) {</div><div class='del'>-		netdev_warn(netdev, "couldn't start device: %d\n", err);</div><div class='del'>-		close_candev(netdev);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	netif_start_queue(netdev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static netdev_tx_t esd_usb2_start_xmit(struct sk_buff *skb,</div><div class='del'>-				      struct net_device *netdev)</div><div class='del'>-{</div><div class='del'>-	struct esd_usb2_net_priv *priv = netdev_priv(netdev);</div><div class='del'>-	struct esd_usb2 *dev = priv-&gt;usb2;</div><div class='del'>-	struct esd_tx_urb_context *context = NULL;</div><div class='del'>-	struct net_device_stats *stats = &amp;netdev-&gt;stats;</div><div class='del'>-	struct can_frame *cf = (struct can_frame *)skb-&gt;data;</div><div class='del'>-	struct esd_usb2_msg *msg;</div><div class='del'>-	struct urb *urb;</div><div class='del'>-	u8 *buf;</div><div class='del'>-	int i, err;</div><div class='del'>-	int ret = NETDEV_TX_OK;</div><div class='del'>-	size_t size = sizeof(struct esd_usb2_msg);</div><div class='del'>-</div><div class='del'>-	if (can_dropped_invalid_skb(netdev, skb))</div><div class='del'>-		return NETDEV_TX_OK;</div><div class='del'>-</div><div class='del'>-	/* create a URB, and a buffer for it, and copy the data to the URB */</div><div class='del'>-	urb = usb_alloc_urb(0, GFP_ATOMIC);</div><div class='del'>-	if (!urb) {</div><div class='del'>-		netdev_err(netdev, "No memory left for URBs\n");</div><div class='del'>-		stats-&gt;tx_dropped++;</div><div class='del'>-		dev_kfree_skb(skb);</div><div class='del'>-		goto nourbmem;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	buf = usb_alloc_coherent(dev-&gt;udev, size, GFP_ATOMIC,</div><div class='del'>-				 &amp;urb-&gt;transfer_dma);</div><div class='del'>-	if (!buf) {</div><div class='del'>-		netdev_err(netdev, "No memory left for USB buffer\n");</div><div class='del'>-		stats-&gt;tx_dropped++;</div><div class='del'>-		dev_kfree_skb(skb);</div><div class='del'>-		goto nobufmem;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	msg = (struct esd_usb2_msg *)buf;</div><div class='del'>-</div><div class='del'>-	msg-&gt;msg.hdr.len = 3; /* minimal length */</div><div class='del'>-	msg-&gt;msg.hdr.cmd = CMD_CAN_TX;</div><div class='del'>-	msg-&gt;msg.tx.net = priv-&gt;index;</div><div class='del'>-	msg-&gt;msg.tx.dlc = cf-&gt;can_dlc;</div><div class='del'>-	msg-&gt;msg.tx.id = cpu_to_le32(cf-&gt;can_id &amp; CAN_ERR_MASK);</div><div class='del'>-</div><div class='del'>-	if (cf-&gt;can_id &amp; CAN_RTR_FLAG)</div><div class='del'>-		msg-&gt;msg.tx.dlc |= ESD_RTR;</div><div class='del'>-</div><div class='del'>-	if (cf-&gt;can_id &amp; CAN_EFF_FLAG)</div><div class='del'>-		msg-&gt;msg.tx.id |= cpu_to_le32(ESD_EXTID);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; cf-&gt;can_dlc; i++)</div><div class='del'>-		msg-&gt;msg.tx.data[i] = cf-&gt;data[i];</div><div class='del'>-</div><div class='del'>-	msg-&gt;msg.hdr.len += (cf-&gt;can_dlc + 3) &gt;&gt; 2;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; MAX_TX_URBS; i++) {</div><div class='del'>-		if (priv-&gt;tx_contexts[i].echo_index == MAX_TX_URBS) {</div><div class='del'>-			context = &amp;priv-&gt;tx_contexts[i];</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * This may never happen.</div><div class='del'>-	 */</div><div class='del'>-	if (!context) {</div><div class='del'>-		netdev_warn(netdev, "couldn't find free context\n");</div><div class='del'>-		ret = NETDEV_TX_BUSY;</div><div class='del'>-		goto releasebuf;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	context-&gt;priv = priv;</div><div class='del'>-	context-&gt;echo_index = i;</div><div class='del'>-	context-&gt;dlc = cf-&gt;can_dlc;</div><div class='del'>-</div><div class='del'>-	/* hnd must not be 0 - MSB is stripped in txdone handling */</div><div class='del'>-	msg-&gt;msg.tx.hnd = 0x80000000 | i; /* returned in TX done message */</div><div class='del'>-</div><div class='del'>-	usb_fill_bulk_urb(urb, dev-&gt;udev, usb_sndbulkpipe(dev-&gt;udev, 2), buf,</div><div class='del'>-			  msg-&gt;msg.hdr.len &lt;&lt; 2,</div><div class='del'>-			  esd_usb2_write_bulk_callback, context);</div><div class='del'>-</div><div class='del'>-	urb-&gt;transfer_flags |= URB_NO_TRANSFER_DMA_MAP;</div><div class='del'>-</div><div class='del'>-	usb_anchor_urb(urb, &amp;priv-&gt;tx_submitted);</div><div class='del'>-</div><div class='del'>-	can_put_echo_skb(skb, netdev, context-&gt;echo_index);</div><div class='del'>-</div><div class='del'>-	atomic_inc(&amp;priv-&gt;active_tx_jobs);</div><div class='del'>-</div><div class='del'>-	/* Slow down tx path */</div><div class='del'>-	if (atomic_read(&amp;priv-&gt;active_tx_jobs) &gt;= MAX_TX_URBS)</div><div class='del'>-		netif_stop_queue(netdev);</div><div class='del'>-</div><div class='del'>-	err = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='del'>-	if (err) {</div><div class='del'>-		can_free_echo_skb(netdev, context-&gt;echo_index);</div><div class='del'>-</div><div class='del'>-		atomic_dec(&amp;priv-&gt;active_tx_jobs);</div><div class='del'>-		usb_unanchor_urb(urb);</div><div class='del'>-</div><div class='del'>-		stats-&gt;tx_dropped++;</div><div class='del'>-</div><div class='del'>-		if (err == -ENODEV)</div><div class='del'>-			netif_device_detach(netdev);</div><div class='del'>-		else</div><div class='del'>-			netdev_warn(netdev, "failed tx_urb %d\n", err);</div><div class='del'>-</div><div class='del'>-		goto releasebuf;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	netdev-&gt;trans_start = jiffies;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Release our reference to this URB, the USB core will eventually free</div><div class='del'>-	 * it entirely.</div><div class='del'>-	 */</div><div class='del'>-	usb_free_urb(urb);</div><div class='del'>-</div><div class='del'>-	return NETDEV_TX_OK;</div><div class='del'>-</div><div class='del'>-releasebuf:</div><div class='del'>-	usb_free_coherent(dev-&gt;udev, size, buf, urb-&gt;transfer_dma);</div><div class='del'>-</div><div class='del'>-nobufmem:</div><div class='del'>-	usb_free_urb(urb);</div><div class='del'>-</div><div class='del'>-nourbmem:</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int esd_usb2_close(struct net_device *netdev)</div><div class='del'>-{</div><div class='del'>-	struct esd_usb2_net_priv *priv = netdev_priv(netdev);</div><div class='del'>-	struct esd_usb2_msg *msg;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	msg = kmalloc(sizeof(*msg), GFP_KERNEL);</div><div class='del'>-	if (!msg)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	/* Disable all IDs (see esd_usb2_start()) */</div><div class='del'>-	msg-&gt;msg.hdr.cmd = CMD_IDADD;</div><div class='del'>-	msg-&gt;msg.hdr.len = 2 + ESD_MAX_ID_SEGMENT;</div><div class='del'>-	msg-&gt;msg.filter.net = priv-&gt;index;</div><div class='del'>-	msg-&gt;msg.filter.option = ESD_ID_ENABLE; /* start with segment 0 */</div><div class='del'>-	for (i = 0; i &lt;= ESD_MAX_ID_SEGMENT; i++)</div><div class='del'>-		msg-&gt;msg.filter.mask[i] = 0;</div><div class='del'>-	if (esd_usb2_send_msg(priv-&gt;usb2, msg) &lt; 0)</div><div class='del'>-		netdev_err(netdev, "sending idadd message failed\n");</div><div class='del'>-</div><div class='del'>-	/* set CAN controller to reset mode */</div><div class='del'>-	msg-&gt;msg.hdr.len = 2;</div><div class='del'>-	msg-&gt;msg.hdr.cmd = CMD_SETBAUD;</div><div class='del'>-	msg-&gt;msg.setbaud.net = priv-&gt;index;</div><div class='del'>-	msg-&gt;msg.setbaud.rsvd = 0;</div><div class='del'>-	msg-&gt;msg.setbaud.baud = cpu_to_le32(ESD_USB2_NO_BAUDRATE);</div><div class='del'>-	if (esd_usb2_send_msg(priv-&gt;usb2, msg) &lt; 0)</div><div class='del'>-		netdev_err(netdev, "sending setbaud message failed\n");</div><div class='del'>-</div><div class='del'>-	priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='del'>-</div><div class='del'>-	netif_stop_queue(netdev);</div><div class='del'>-</div><div class='del'>-	close_candev(netdev);</div><div class='del'>-</div><div class='del'>-	kfree(msg);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct net_device_ops esd_usb2_netdev_ops = {</div><div class='del'>-	.ndo_open = esd_usb2_open,</div><div class='del'>-	.ndo_stop = esd_usb2_close,</div><div class='del'>-	.ndo_start_xmit = esd_usb2_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct can_bittiming_const esd_usb2_bittiming_const = {</div><div class='del'>-	.name = "esd_usb2",</div><div class='del'>-	.tseg1_min = ESD_USB2_TSEG1_MIN,</div><div class='del'>-	.tseg1_max = ESD_USB2_TSEG1_MAX,</div><div class='del'>-	.tseg2_min = ESD_USB2_TSEG2_MIN,</div><div class='del'>-	.tseg2_max = ESD_USB2_TSEG2_MAX,</div><div class='del'>-	.sjw_max = ESD_USB2_SJW_MAX,</div><div class='del'>-	.brp_min = ESD_USB2_BRP_MIN,</div><div class='del'>-	.brp_max = ESD_USB2_BRP_MAX,</div><div class='del'>-	.brp_inc = ESD_USB2_BRP_INC,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int esd_usb2_set_bittiming(struct net_device *netdev)</div><div class='del'>-{</div><div class='del'>-	struct esd_usb2_net_priv *priv = netdev_priv(netdev);</div><div class='del'>-	struct can_bittiming *bt = &amp;priv-&gt;can.bittiming;</div><div class='del'>-	struct esd_usb2_msg *msg;</div><div class='del'>-	int err;</div><div class='del'>-	u32 canbtr;</div><div class='del'>-	int sjw_shift;</div><div class='del'>-</div><div class='del'>-	canbtr = ESD_USB2_UBR;</div><div class='del'>-	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LISTENONLY)</div><div class='del'>-		canbtr |= ESD_USB2_LOM;</div><div class='del'>-</div><div class='del'>-	canbtr |= (bt-&gt;brp - 1) &amp; (ESD_USB2_BRP_MAX - 1);</div><div class='del'>-</div><div class='del'>-	if (le16_to_cpu(priv-&gt;usb2-&gt;udev-&gt;descriptor.idProduct) ==</div><div class='del'>-	    USB_CANUSBM_PRODUCT_ID)</div><div class='del'>-		sjw_shift = ESD_USBM_SJW_SHIFT;</div><div class='del'>-	else</div><div class='del'>-		sjw_shift = ESD_USB2_SJW_SHIFT;</div><div class='del'>-</div><div class='del'>-	canbtr |= ((bt-&gt;sjw - 1) &amp; (ESD_USB2_SJW_MAX - 1))</div><div class='del'>-		&lt;&lt; sjw_shift;</div><div class='del'>-	canbtr |= ((bt-&gt;prop_seg + bt-&gt;phase_seg1 - 1)</div><div class='del'>-		   &amp; (ESD_USB2_TSEG1_MAX - 1))</div><div class='del'>-		&lt;&lt; ESD_USB2_TSEG1_SHIFT;</div><div class='del'>-	canbtr |= ((bt-&gt;phase_seg2 - 1) &amp; (ESD_USB2_TSEG2_MAX - 1))</div><div class='del'>-		&lt;&lt; ESD_USB2_TSEG2_SHIFT;</div><div class='del'>-	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_3_SAMPLES)</div><div class='del'>-		canbtr |= ESD_USB2_3_SAMPLES;</div><div class='del'>-</div><div class='del'>-	msg = kmalloc(sizeof(*msg), GFP_KERNEL);</div><div class='del'>-	if (!msg)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	msg-&gt;msg.hdr.len = 2;</div><div class='del'>-	msg-&gt;msg.hdr.cmd = CMD_SETBAUD;</div><div class='del'>-	msg-&gt;msg.setbaud.net = priv-&gt;index;</div><div class='del'>-	msg-&gt;msg.setbaud.rsvd = 0;</div><div class='del'>-	msg-&gt;msg.setbaud.baud = cpu_to_le32(canbtr);</div><div class='del'>-</div><div class='del'>-	netdev_info(netdev, "setting BTR=%#x\n", canbtr);</div><div class='del'>-</div><div class='del'>-	err = esd_usb2_send_msg(priv-&gt;usb2, msg);</div><div class='del'>-</div><div class='del'>-	kfree(msg);</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int esd_usb2_get_berr_counter(const struct net_device *netdev,</div><div class='del'>-				     struct can_berr_counter *bec)</div><div class='del'>-{</div><div class='del'>-	struct esd_usb2_net_priv *priv = netdev_priv(netdev);</div><div class='del'>-</div><div class='del'>-	bec-&gt;txerr = priv-&gt;bec.txerr;</div><div class='del'>-	bec-&gt;rxerr = priv-&gt;bec.rxerr;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int esd_usb2_set_mode(struct net_device *netdev, enum can_mode mode)</div><div class='del'>-{</div><div class='del'>-	switch (mode) {</div><div class='del'>-	case CAN_MODE_START:</div><div class='del'>-		netif_wake_queue(netdev);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int esd_usb2_probe_one_net(struct usb_interface *intf, int index)</div><div class='del'>-{</div><div class='del'>-	struct esd_usb2 *dev = usb_get_intfdata(intf);</div><div class='del'>-	struct net_device *netdev;</div><div class='del'>-	struct esd_usb2_net_priv *priv;</div><div class='del'>-	int err = 0;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	netdev = alloc_candev(sizeof(*priv), MAX_TX_URBS);</div><div class='del'>-	if (!netdev) {</div><div class='del'>-		dev_err(&amp;intf-&gt;dev, "couldn't alloc candev\n");</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto done;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	priv = netdev_priv(netdev);</div><div class='del'>-</div><div class='del'>-	init_usb_anchor(&amp;priv-&gt;tx_submitted);</div><div class='del'>-	atomic_set(&amp;priv-&gt;active_tx_jobs, 0);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; MAX_TX_URBS; i++)</div><div class='del'>-		priv-&gt;tx_contexts[i].echo_index = MAX_TX_URBS;</div><div class='del'>-</div><div class='del'>-	priv-&gt;usb2 = dev;</div><div class='del'>-	priv-&gt;netdev = netdev;</div><div class='del'>-	priv-&gt;index = index;</div><div class='del'>-</div><div class='del'>-	priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='del'>-	priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_LISTENONLY;</div><div class='del'>-</div><div class='del'>-	if (le16_to_cpu(dev-&gt;udev-&gt;descriptor.idProduct) ==</div><div class='del'>-	    USB_CANUSBM_PRODUCT_ID)</div><div class='del'>-		priv-&gt;can.clock.freq = ESD_USBM_CAN_CLOCK;</div><div class='del'>-	else {</div><div class='del'>-		priv-&gt;can.clock.freq = ESD_USB2_CAN_CLOCK;</div><div class='del'>-		priv-&gt;can.ctrlmode_supported |= CAN_CTRLMODE_3_SAMPLES;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	priv-&gt;can.bittiming_const = &amp;esd_usb2_bittiming_const;</div><div class='del'>-	priv-&gt;can.do_set_bittiming = esd_usb2_set_bittiming;</div><div class='del'>-	priv-&gt;can.do_set_mode = esd_usb2_set_mode;</div><div class='del'>-	priv-&gt;can.do_get_berr_counter = esd_usb2_get_berr_counter;</div><div class='del'>-</div><div class='del'>-	netdev-&gt;flags |= IFF_ECHO; /* we support local echo */</div><div class='del'>-</div><div class='del'>-	netdev-&gt;netdev_ops = &amp;esd_usb2_netdev_ops;</div><div class='del'>-</div><div class='del'>-	SET_NETDEV_DEV(netdev, &amp;intf-&gt;dev);</div><div class='del'>-	netdev-&gt;dev_id = index;</div><div class='del'>-</div><div class='del'>-	err = register_candev(netdev);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(&amp;intf-&gt;dev, "couldn't register CAN device: %d\n", err);</div><div class='del'>-		free_candev(netdev);</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto done;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev-&gt;nets[index] = priv;</div><div class='del'>-	netdev_info(netdev, "device %s registered\n", netdev-&gt;name);</div><div class='del'>-</div><div class='del'>-done:</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * probe function for new USB2 devices</div><div class='del'>- *</div><div class='del'>- * check version information and number of available</div><div class='del'>- * CAN interfaces</div><div class='del'>- */</div><div class='del'>-static int esd_usb2_probe(struct usb_interface *intf,</div><div class='del'>-			 const struct usb_device_id *id)</div><div class='del'>-{</div><div class='del'>-	struct esd_usb2 *dev;</div><div class='del'>-	struct esd_usb2_msg *msg;</div><div class='del'>-	int i, err;</div><div class='del'>-</div><div class='del'>-	dev = kzalloc(sizeof(*dev), GFP_KERNEL);</div><div class='del'>-	if (!dev) {</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto done;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev-&gt;udev = interface_to_usbdev(intf);</div><div class='del'>-</div><div class='del'>-	init_usb_anchor(&amp;dev-&gt;rx_submitted);</div><div class='del'>-</div><div class='del'>-	usb_set_intfdata(intf, dev);</div><div class='del'>-</div><div class='del'>-	msg = kmalloc(sizeof(*msg), GFP_KERNEL);</div><div class='del'>-	if (!msg) {</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto free_msg;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* query number of CAN interfaces (nets) */</div><div class='del'>-	msg-&gt;msg.hdr.cmd = CMD_VERSION;</div><div class='del'>-	msg-&gt;msg.hdr.len = 2;</div><div class='del'>-	msg-&gt;msg.version.rsvd = 0;</div><div class='del'>-	msg-&gt;msg.version.flags = 0;</div><div class='del'>-	msg-&gt;msg.version.drv_version = 0;</div><div class='del'>-</div><div class='del'>-	err = esd_usb2_send_msg(dev, msg);</div><div class='del'>-	if (err &lt; 0) {</div><div class='del'>-		dev_err(&amp;intf-&gt;dev, "sending version message failed\n");</div><div class='del'>-		goto free_msg;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err = esd_usb2_wait_msg(dev, msg);</div><div class='del'>-	if (err &lt; 0) {</div><div class='del'>-		dev_err(&amp;intf-&gt;dev, "no version message answer\n");</div><div class='del'>-		goto free_msg;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev-&gt;net_count = (int)msg-&gt;msg.version_reply.nets;</div><div class='del'>-	dev-&gt;version = le32_to_cpu(msg-&gt;msg.version_reply.version);</div><div class='del'>-</div><div class='del'>-	if (device_create_file(&amp;intf-&gt;dev, &amp;dev_attr_firmware))</div><div class='del'>-		dev_err(&amp;intf-&gt;dev,</div><div class='del'>-			"Couldn't create device file for firmware\n");</div><div class='del'>-</div><div class='del'>-	if (device_create_file(&amp;intf-&gt;dev, &amp;dev_attr_hardware))</div><div class='del'>-		dev_err(&amp;intf-&gt;dev,</div><div class='del'>-			"Couldn't create device file for hardware\n");</div><div class='del'>-</div><div class='del'>-	if (device_create_file(&amp;intf-&gt;dev, &amp;dev_attr_nets))</div><div class='del'>-		dev_err(&amp;intf-&gt;dev,</div><div class='del'>-			"Couldn't create device file for nets\n");</div><div class='del'>-</div><div class='del'>-	/* do per device probing */</div><div class='del'>-	for (i = 0; i &lt; dev-&gt;net_count; i++)</div><div class='del'>-		esd_usb2_probe_one_net(intf, i);</div><div class='del'>-</div><div class='del'>-free_msg:</div><div class='del'>-	kfree(msg);</div><div class='del'>-	if (err)</div><div class='del'>-		kfree(dev);</div><div class='del'>-done:</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * called by the usb core when the device is removed from the system</div><div class='del'>- */</div><div class='del'>-static void esd_usb2_disconnect(struct usb_interface *intf)</div><div class='del'>-{</div><div class='del'>-	struct esd_usb2 *dev = usb_get_intfdata(intf);</div><div class='del'>-	struct net_device *netdev;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	device_remove_file(&amp;intf-&gt;dev, &amp;dev_attr_firmware);</div><div class='del'>-	device_remove_file(&amp;intf-&gt;dev, &amp;dev_attr_hardware);</div><div class='del'>-	device_remove_file(&amp;intf-&gt;dev, &amp;dev_attr_nets);</div><div class='del'>-</div><div class='del'>-	usb_set_intfdata(intf, NULL);</div><div class='del'>-</div><div class='del'>-	if (dev) {</div><div class='del'>-		for (i = 0; i &lt; dev-&gt;net_count; i++) {</div><div class='del'>-			if (dev-&gt;nets[i]) {</div><div class='del'>-				netdev = dev-&gt;nets[i]-&gt;netdev;</div><div class='del'>-				unregister_netdev(netdev);</div><div class='del'>-				free_candev(netdev);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		unlink_all_urbs(dev);</div><div class='del'>-		kfree(dev);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* usb specific object needed to register this driver with the usb subsystem */</div><div class='del'>-static struct usb_driver esd_usb2_driver = {</div><div class='del'>-	.name = "esd_usb2",</div><div class='del'>-	.probe = esd_usb2_probe,</div><div class='del'>-	.disconnect = esd_usb2_disconnect,</div><div class='del'>-	.id_table = esd_usb2_table,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-module_usb_driver(esd_usb2_driver);</div><div class='head'>diff --git a/drivers/net/can/usb/etas_es58x/Makefile b/drivers/net/can/usb/etas_es58x/Makefile<br/>new file mode 100644<br/>index 000000000000..d6667ebe259f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/etas_es58x/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/etas_es58x/Makefile</a></div><div class='hunk'>@@ -0,0 +1,3 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+obj-$(CONFIG_CAN_ETAS_ES58X) += etas_es58x.o</div><div class='add'>+etas_es58x-y = es58x_core.o es58x_devlink.o es581_4.o es58x_fd.o</div><div class='head'>diff --git a/drivers/net/can/usb/etas_es58x/es581_4.c b/drivers/net/can/usb/etas_es58x/es581_4.c<br/>new file mode 100644<br/>index 000000000000..1888ca1de7b6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/etas_es58x/es581_4.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/etas_es58x/es581_4.c</a></div><div class='hunk'>@@ -0,0 +1,507 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+/* Driver for ETAS GmbH ES58X USB CAN(-FD) Bus Interfaces.</div><div class='add'>+ *</div><div class='add'>+ * File es581_4.c: Adds support to ETAS ES581.4.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2019 Robert Bosch Engineering and Business Solutions. All rights reserved.</div><div class='add'>+ * Copyright (c) 2020 ETAS K.K.. All rights reserved.</div><div class='add'>+ * Copyright (c) 2020-2022 Vincent Mailhol &lt;mailhol.vincent@wanadoo.fr&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/unaligned.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/units.h&gt;</div><div class='add'>+</div><div class='add'>+#include "es58x_core.h"</div><div class='add'>+#include "es581_4.h"</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es581_4_sizeof_rx_tx_msg() - Calculate the actual length of the</div><div class='add'>+ *	structure of a rx or tx message.</div><div class='add'>+ * @msg: message of variable length, must have a dlc field.</div><div class='add'>+ *</div><div class='add'>+ * Even if RTR frames have actually no payload, the ES58X devices</div><div class='add'>+ * still expect it. Must be a macro in order to accept several types</div><div class='add'>+ * (struct es581_4_tx_can_msg and struct es581_4_rx_can_msg) as an</div><div class='add'>+ * input.</div><div class='add'>+ *</div><div class='add'>+ * Return: length of the message.</div><div class='add'>+ */</div><div class='add'>+#define es581_4_sizeof_rx_tx_msg(msg)				\</div><div class='add'>+	offsetof(typeof(msg), data[can_cc_dlc2len((msg).dlc)])</div><div class='add'>+</div><div class='add'>+static u16 es581_4_get_msg_len(const union es58x_urb_cmd *urb_cmd)</div><div class='add'>+{</div><div class='add'>+	return get_unaligned_le16(&amp;urb_cmd-&gt;es581_4_urb_cmd.msg_len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int es581_4_echo_msg(struct es58x_device *es58x_dev,</div><div class='add'>+			    const struct es581_4_urb_cmd *es581_4_urb_cmd)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	const struct es581_4_bulk_echo_msg *bulk_echo_msg;</div><div class='add'>+	const struct es581_4_echo_msg *echo_msg;</div><div class='add'>+	u64 *tstamps = es58x_dev-&gt;timestamps;</div><div class='add'>+	u16 msg_len;</div><div class='add'>+	u32 first_packet_idx, packet_idx;</div><div class='add'>+	unsigned int dropped = 0;</div><div class='add'>+	int i, num_element, ret;</div><div class='add'>+</div><div class='add'>+	bulk_echo_msg = &amp;es581_4_urb_cmd-&gt;bulk_echo_msg;</div><div class='add'>+	msg_len = get_unaligned_le16(&amp;es581_4_urb_cmd-&gt;msg_len) -</div><div class='add'>+	    sizeof(bulk_echo_msg-&gt;channel_no);</div><div class='add'>+	num_element = es58x_msg_num_element(es58x_dev-&gt;dev,</div><div class='add'>+					    bulk_echo_msg-&gt;echo_msg, msg_len);</div><div class='add'>+	if (num_element &lt;= 0)</div><div class='add'>+		return num_element;</div><div class='add'>+</div><div class='add'>+	ret = es58x_get_netdev(es58x_dev, bulk_echo_msg-&gt;channel_no,</div><div class='add'>+			       ES581_4_CHANNEL_IDX_OFFSET, &amp;netdev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	echo_msg = &amp;bulk_echo_msg-&gt;echo_msg[0];</div><div class='add'>+	first_packet_idx = get_unaligned_le32(&amp;echo_msg-&gt;packet_idx);</div><div class='add'>+	packet_idx = first_packet_idx;</div><div class='add'>+	for (i = 0; i &lt; num_element; i++) {</div><div class='add'>+		u32 tmp_idx;</div><div class='add'>+</div><div class='add'>+		echo_msg = &amp;bulk_echo_msg-&gt;echo_msg[i];</div><div class='add'>+		tmp_idx = get_unaligned_le32(&amp;echo_msg-&gt;packet_idx);</div><div class='add'>+		if (tmp_idx == packet_idx - 1) {</div><div class='add'>+			if (net_ratelimit())</div><div class='add'>+				netdev_warn(netdev,</div><div class='add'>+					    "Received echo packet idx %u twice\n",</div><div class='add'>+					    packet_idx - 1);</div><div class='add'>+			dropped++;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+		if (tmp_idx != packet_idx) {</div><div class='add'>+			netdev_err(netdev, "Echo packet idx jumped from %u to %u\n",</div><div class='add'>+				   packet_idx - 1, echo_msg-&gt;packet_idx);</div><div class='add'>+			return -EBADMSG;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		tstamps[i] = get_unaligned_le64(&amp;echo_msg-&gt;timestamp);</div><div class='add'>+		packet_idx++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev-&gt;stats.tx_dropped += dropped;</div><div class='add'>+	return es58x_can_get_echo_skb(netdev, first_packet_idx,</div><div class='add'>+				      tstamps, num_element - dropped);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int es581_4_rx_can_msg(struct es58x_device *es58x_dev,</div><div class='add'>+			      const struct es581_4_urb_cmd *es581_4_urb_cmd,</div><div class='add'>+			      u16 msg_len)</div><div class='add'>+{</div><div class='add'>+	const struct device *dev = es58x_dev-&gt;dev;</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	int pkts, num_element, channel_no, ret;</div><div class='add'>+</div><div class='add'>+	num_element = es58x_msg_num_element(dev, es581_4_urb_cmd-&gt;rx_can_msg,</div><div class='add'>+					    msg_len);</div><div class='add'>+	if (num_element &lt;= 0)</div><div class='add'>+		return num_element;</div><div class='add'>+</div><div class='add'>+	channel_no = es581_4_urb_cmd-&gt;rx_can_msg[0].channel_no;</div><div class='add'>+	ret = es58x_get_netdev(es58x_dev, channel_no,</div><div class='add'>+			       ES581_4_CHANNEL_IDX_OFFSET, &amp;netdev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (!netif_running(netdev)) {</div><div class='add'>+		if (net_ratelimit())</div><div class='add'>+			netdev_info(netdev,</div><div class='add'>+				    "%s: %s is down, dropping %d rx packets\n",</div><div class='add'>+				    __func__, netdev-&gt;name, num_element);</div><div class='add'>+		netdev-&gt;stats.rx_dropped += num_element;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (pkts = 0; pkts &lt; num_element; pkts++) {</div><div class='add'>+		const struct es581_4_rx_can_msg *rx_can_msg =</div><div class='add'>+		    &amp;es581_4_urb_cmd-&gt;rx_can_msg[pkts];</div><div class='add'>+		u64 tstamp = get_unaligned_le64(&amp;rx_can_msg-&gt;timestamp);</div><div class='add'>+		canid_t can_id = get_unaligned_le32(&amp;rx_can_msg-&gt;can_id);</div><div class='add'>+</div><div class='add'>+		if (channel_no != rx_can_msg-&gt;channel_no)</div><div class='add'>+			return -EBADMSG;</div><div class='add'>+</div><div class='add'>+		ret = es58x_rx_can_msg(netdev, tstamp, rx_can_msg-&gt;data,</div><div class='add'>+				       can_id, rx_can_msg-&gt;flags,</div><div class='add'>+				       rx_can_msg-&gt;dlc);</div><div class='add'>+		if (ret)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int es581_4_rx_err_msg(struct es58x_device *es58x_dev,</div><div class='add'>+			      const struct es581_4_rx_err_msg *rx_err_msg)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	enum es58x_err error = get_unaligned_le32(&amp;rx_err_msg-&gt;error);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = es58x_get_netdev(es58x_dev, rx_err_msg-&gt;channel_no,</div><div class='add'>+			       ES581_4_CHANNEL_IDX_OFFSET, &amp;netdev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return es58x_rx_err_msg(netdev, error, 0,</div><div class='add'>+				get_unaligned_le64(&amp;rx_err_msg-&gt;timestamp));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int es581_4_rx_event_msg(struct es58x_device *es58x_dev,</div><div class='add'>+				const struct es581_4_rx_event_msg *rx_event_msg)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	enum es58x_event event = get_unaligned_le32(&amp;rx_event_msg-&gt;event);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = es58x_get_netdev(es58x_dev, rx_event_msg-&gt;channel_no,</div><div class='add'>+			       ES581_4_CHANNEL_IDX_OFFSET, &amp;netdev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return es58x_rx_err_msg(netdev, 0, event,</div><div class='add'>+				get_unaligned_le64(&amp;rx_event_msg-&gt;timestamp));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int es581_4_rx_cmd_ret_u32(struct es58x_device *es58x_dev,</div><div class='add'>+				  const struct es581_4_urb_cmd *es581_4_urb_cmd,</div><div class='add'>+				  enum es58x_ret_type ret_type)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	const struct es581_4_rx_cmd_ret *rx_cmd_ret;</div><div class='add'>+	u16 msg_len = get_unaligned_le16(&amp;es581_4_urb_cmd-&gt;msg_len);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = es58x_check_msg_len(es58x_dev-&gt;dev,</div><div class='add'>+				  es581_4_urb_cmd-&gt;rx_cmd_ret, msg_len);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	rx_cmd_ret = &amp;es581_4_urb_cmd-&gt;rx_cmd_ret;</div><div class='add'>+</div><div class='add'>+	ret = es58x_get_netdev(es58x_dev, rx_cmd_ret-&gt;channel_no,</div><div class='add'>+			       ES581_4_CHANNEL_IDX_OFFSET, &amp;netdev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return es58x_rx_cmd_ret_u32(netdev, ret_type,</div><div class='add'>+				    get_unaligned_le32(&amp;rx_cmd_ret-&gt;rx_cmd_ret_le32));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int es581_4_tx_ack_msg(struct es58x_device *es58x_dev,</div><div class='add'>+			      const struct es581_4_urb_cmd *es581_4_urb_cmd)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	const struct es581_4_tx_ack_msg *tx_ack_msg;</div><div class='add'>+	u16 msg_len = get_unaligned_le16(&amp;es581_4_urb_cmd-&gt;msg_len);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	tx_ack_msg = &amp;es581_4_urb_cmd-&gt;tx_ack_msg;</div><div class='add'>+	ret = es58x_check_msg_len(es58x_dev-&gt;dev, *tx_ack_msg, msg_len);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (tx_ack_msg-&gt;rx_cmd_ret_u8 != ES58X_RET_U8_OK)</div><div class='add'>+		return es58x_rx_cmd_ret_u8(es58x_dev-&gt;dev,</div><div class='add'>+					   ES58X_RET_TYPE_TX_MSG,</div><div class='add'>+					   tx_ack_msg-&gt;rx_cmd_ret_u8);</div><div class='add'>+</div><div class='add'>+	ret = es58x_get_netdev(es58x_dev, tx_ack_msg-&gt;channel_no,</div><div class='add'>+			       ES581_4_CHANNEL_IDX_OFFSET, &amp;netdev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return es58x_tx_ack_msg(netdev,</div><div class='add'>+				get_unaligned_le16(&amp;tx_ack_msg-&gt;tx_free_entries),</div><div class='add'>+				ES58X_RET_U32_OK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int es581_4_dispatch_rx_cmd(struct es58x_device *es58x_dev,</div><div class='add'>+				   const struct es581_4_urb_cmd *es581_4_urb_cmd)</div><div class='add'>+{</div><div class='add'>+	const struct device *dev = es58x_dev-&gt;dev;</div><div class='add'>+	u16 msg_len = get_unaligned_le16(&amp;es581_4_urb_cmd-&gt;msg_len);</div><div class='add'>+	enum es581_4_rx_type rx_type = es581_4_urb_cmd-&gt;rx_can_msg[0].rx_type;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	switch (rx_type) {</div><div class='add'>+	case ES581_4_RX_TYPE_MESSAGE:</div><div class='add'>+		return es581_4_rx_can_msg(es58x_dev, es581_4_urb_cmd, msg_len);</div><div class='add'>+</div><div class='add'>+	case ES581_4_RX_TYPE_ERROR:</div><div class='add'>+		ret = es58x_check_msg_len(dev, es581_4_urb_cmd-&gt;rx_err_msg,</div><div class='add'>+					  msg_len);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+		return es581_4_rx_err_msg(es58x_dev,</div><div class='add'>+					  &amp;es581_4_urb_cmd-&gt;rx_err_msg);</div><div class='add'>+</div><div class='add'>+	case ES581_4_RX_TYPE_EVENT:</div><div class='add'>+		ret = es58x_check_msg_len(dev, es581_4_urb_cmd-&gt;rx_event_msg,</div><div class='add'>+					  msg_len);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+		return es581_4_rx_event_msg(es58x_dev,</div><div class='add'>+					    &amp;es581_4_urb_cmd-&gt;rx_event_msg);</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		dev_err(dev, "%s: Unknown rx_type 0x%02X\n", __func__, rx_type);</div><div class='add'>+		return -EBADRQC;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int es581_4_handle_urb_cmd(struct es58x_device *es58x_dev,</div><div class='add'>+				  const union es58x_urb_cmd *urb_cmd)</div><div class='add'>+{</div><div class='add'>+	const struct es581_4_urb_cmd *es581_4_urb_cmd;</div><div class='add'>+	struct device *dev = es58x_dev-&gt;dev;</div><div class='add'>+	u16 msg_len = es581_4_get_msg_len(urb_cmd);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	es581_4_urb_cmd = &amp;urb_cmd-&gt;es581_4_urb_cmd;</div><div class='add'>+</div><div class='add'>+	if (es581_4_urb_cmd-&gt;cmd_type != ES581_4_CAN_COMMAND_TYPE) {</div><div class='add'>+		dev_err(dev, "%s: Unknown command type (0x%02X)\n",</div><div class='add'>+			__func__, es581_4_urb_cmd-&gt;cmd_type);</div><div class='add'>+		return -EBADRQC;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch ((enum es581_4_cmd_id)es581_4_urb_cmd-&gt;cmd_id) {</div><div class='add'>+	case ES581_4_CMD_ID_SET_BITTIMING:</div><div class='add'>+		return es581_4_rx_cmd_ret_u32(es58x_dev, es581_4_urb_cmd,</div><div class='add'>+					      ES58X_RET_TYPE_SET_BITTIMING);</div><div class='add'>+</div><div class='add'>+	case ES581_4_CMD_ID_ENABLE_CHANNEL:</div><div class='add'>+		return es581_4_rx_cmd_ret_u32(es58x_dev, es581_4_urb_cmd,</div><div class='add'>+					      ES58X_RET_TYPE_ENABLE_CHANNEL);</div><div class='add'>+</div><div class='add'>+	case ES581_4_CMD_ID_TX_MSG:</div><div class='add'>+		return es581_4_tx_ack_msg(es58x_dev, es581_4_urb_cmd);</div><div class='add'>+</div><div class='add'>+	case ES581_4_CMD_ID_RX_MSG:</div><div class='add'>+		return es581_4_dispatch_rx_cmd(es58x_dev, es581_4_urb_cmd);</div><div class='add'>+</div><div class='add'>+	case ES581_4_CMD_ID_RESET_RX:</div><div class='add'>+		ret = es581_4_rx_cmd_ret_u32(es58x_dev, es581_4_urb_cmd,</div><div class='add'>+					     ES58X_RET_TYPE_RESET_RX);</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	case ES581_4_CMD_ID_RESET_TX:</div><div class='add'>+		ret = es581_4_rx_cmd_ret_u32(es58x_dev, es581_4_urb_cmd,</div><div class='add'>+					     ES58X_RET_TYPE_RESET_TX);</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	case ES581_4_CMD_ID_DISABLE_CHANNEL:</div><div class='add'>+		return es581_4_rx_cmd_ret_u32(es58x_dev, es581_4_urb_cmd,</div><div class='add'>+					      ES58X_RET_TYPE_DISABLE_CHANNEL);</div><div class='add'>+</div><div class='add'>+	case ES581_4_CMD_ID_TIMESTAMP:</div><div class='add'>+		ret = es58x_check_msg_len(dev, es581_4_urb_cmd-&gt;timestamp,</div><div class='add'>+					  msg_len);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+		es58x_rx_timestamp(es58x_dev,</div><div class='add'>+				   get_unaligned_le64(&amp;es581_4_urb_cmd-&gt;timestamp));</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	case ES581_4_CMD_ID_ECHO:</div><div class='add'>+		return es581_4_echo_msg(es58x_dev, es581_4_urb_cmd);</div><div class='add'>+</div><div class='add'>+	case ES581_4_CMD_ID_DEVICE_ERR:</div><div class='add'>+		ret = es58x_check_msg_len(dev, es581_4_urb_cmd-&gt;rx_cmd_ret_u8,</div><div class='add'>+					  msg_len);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+		return es58x_rx_cmd_ret_u8(dev, ES58X_RET_TYPE_DEVICE_ERR,</div><div class='add'>+					   es581_4_urb_cmd-&gt;rx_cmd_ret_u8);</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		dev_warn(dev, "%s: Unexpected command ID: 0x%02X\n",</div><div class='add'>+			 __func__, es581_4_urb_cmd-&gt;cmd_id);</div><div class='add'>+		return -EBADRQC;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void es581_4_fill_urb_header(union es58x_urb_cmd *urb_cmd, u8 cmd_type,</div><div class='add'>+				    u8 cmd_id, u8 channel_idx, u16 msg_len)</div><div class='add'>+{</div><div class='add'>+	struct es581_4_urb_cmd *es581_4_urb_cmd = &amp;urb_cmd-&gt;es581_4_urb_cmd;</div><div class='add'>+</div><div class='add'>+	es581_4_urb_cmd-&gt;SOF = cpu_to_le16(es581_4_param.tx_start_of_frame);</div><div class='add'>+	es581_4_urb_cmd-&gt;cmd_type = cmd_type;</div><div class='add'>+	es581_4_urb_cmd-&gt;cmd_id = cmd_id;</div><div class='add'>+	es581_4_urb_cmd-&gt;msg_len = cpu_to_le16(msg_len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int es581_4_tx_can_msg(struct es58x_priv *priv,</div><div class='add'>+			      const struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct es58x_device *es58x_dev = priv-&gt;es58x_dev;</div><div class='add'>+	union es58x_urb_cmd *urb_cmd = priv-&gt;tx_urb-&gt;transfer_buffer;</div><div class='add'>+	struct es581_4_urb_cmd *es581_4_urb_cmd = &amp;urb_cmd-&gt;es581_4_urb_cmd;</div><div class='add'>+	struct can_frame *cf = (struct can_frame *)skb-&gt;data;</div><div class='add'>+	struct es581_4_tx_can_msg *tx_can_msg;</div><div class='add'>+	u16 msg_len;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (can_is_canfd_skb(skb))</div><div class='add'>+		return -EMSGSIZE;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;tx_can_msg_cnt == 0) {</div><div class='add'>+		msg_len = sizeof(es581_4_urb_cmd-&gt;bulk_tx_can_msg.num_can_msg);</div><div class='add'>+		es581_4_fill_urb_header(urb_cmd, ES581_4_CAN_COMMAND_TYPE,</div><div class='add'>+					ES581_4_CMD_ID_TX_MSG,</div><div class='add'>+					priv-&gt;channel_idx, msg_len);</div><div class='add'>+		es581_4_urb_cmd-&gt;bulk_tx_can_msg.num_can_msg = 0;</div><div class='add'>+	} else {</div><div class='add'>+		msg_len = es581_4_get_msg_len(urb_cmd);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = es58x_check_msg_max_len(es58x_dev-&gt;dev,</div><div class='add'>+				      es581_4_urb_cmd-&gt;bulk_tx_can_msg,</div><div class='add'>+				      msg_len + sizeof(*tx_can_msg));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Fill message contents. */</div><div class='add'>+	tx_can_msg = (typeof(tx_can_msg))&amp;es581_4_urb_cmd-&gt;raw_msg[msg_len];</div><div class='add'>+	put_unaligned_le32(es58x_get_raw_can_id(cf), &amp;tx_can_msg-&gt;can_id);</div><div class='add'>+	put_unaligned_le32(priv-&gt;tx_head, &amp;tx_can_msg-&gt;packet_idx);</div><div class='add'>+	put_unaligned_le16((u16)es58x_get_flags(skb), &amp;tx_can_msg-&gt;flags);</div><div class='add'>+	tx_can_msg-&gt;channel_no = priv-&gt;channel_idx + ES581_4_CHANNEL_IDX_OFFSET;</div><div class='add'>+	tx_can_msg-&gt;dlc = can_get_cc_dlc(cf, priv-&gt;can.ctrlmode);</div><div class='add'>+</div><div class='add'>+	memcpy(tx_can_msg-&gt;data, cf-&gt;data, cf-&gt;len);</div><div class='add'>+</div><div class='add'>+	/* Calculate new sizes. */</div><div class='add'>+	es581_4_urb_cmd-&gt;bulk_tx_can_msg.num_can_msg++;</div><div class='add'>+	msg_len += es581_4_sizeof_rx_tx_msg(*tx_can_msg);</div><div class='add'>+	priv-&gt;tx_urb-&gt;transfer_buffer_length = es58x_get_urb_cmd_len(es58x_dev,</div><div class='add'>+								     msg_len);</div><div class='add'>+	es581_4_urb_cmd-&gt;msg_len = cpu_to_le16(msg_len);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int es581_4_set_bittiming(struct es58x_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct es581_4_tx_conf_msg tx_conf_msg = { 0 };</div><div class='add'>+	struct can_bittiming *bt = &amp;priv-&gt;can.bittiming;</div><div class='add'>+</div><div class='add'>+	tx_conf_msg.bitrate = cpu_to_le32(bt-&gt;bitrate);</div><div class='add'>+	/* bt-&gt;sample_point is in tenth of percent. Convert it to percent. */</div><div class='add'>+	tx_conf_msg.sample_point = cpu_to_le32(bt-&gt;sample_point / 10U);</div><div class='add'>+	tx_conf_msg.samples_per_bit = cpu_to_le32(ES58X_SAMPLES_PER_BIT_ONE);</div><div class='add'>+	tx_conf_msg.bit_time = cpu_to_le32(can_bit_time(bt));</div><div class='add'>+	tx_conf_msg.sjw = cpu_to_le32(bt-&gt;sjw);</div><div class='add'>+	tx_conf_msg.sync_edge = cpu_to_le32(ES58X_SYNC_EDGE_SINGLE);</div><div class='add'>+	tx_conf_msg.physical_layer =</div><div class='add'>+	    cpu_to_le32(ES58X_PHYSICAL_LAYER_HIGH_SPEED);</div><div class='add'>+	tx_conf_msg.echo_mode = cpu_to_le32(ES58X_ECHO_ON);</div><div class='add'>+	tx_conf_msg.channel_no = priv-&gt;channel_idx + ES581_4_CHANNEL_IDX_OFFSET;</div><div class='add'>+</div><div class='add'>+	return es58x_send_msg(priv-&gt;es58x_dev, ES581_4_CAN_COMMAND_TYPE,</div><div class='add'>+			      ES581_4_CMD_ID_SET_BITTIMING, &amp;tx_conf_msg,</div><div class='add'>+			      sizeof(tx_conf_msg), priv-&gt;channel_idx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int es581_4_enable_channel(struct es58x_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u8 msg = priv-&gt;channel_idx + ES581_4_CHANNEL_IDX_OFFSET;</div><div class='add'>+</div><div class='add'>+	ret = es581_4_set_bittiming(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return es58x_send_msg(priv-&gt;es58x_dev, ES581_4_CAN_COMMAND_TYPE,</div><div class='add'>+			      ES581_4_CMD_ID_ENABLE_CHANNEL, &amp;msg, sizeof(msg),</div><div class='add'>+			      priv-&gt;channel_idx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int es581_4_disable_channel(struct es58x_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u8 msg = priv-&gt;channel_idx + ES581_4_CHANNEL_IDX_OFFSET;</div><div class='add'>+</div><div class='add'>+	return es58x_send_msg(priv-&gt;es58x_dev, ES581_4_CAN_COMMAND_TYPE,</div><div class='add'>+			      ES581_4_CMD_ID_DISABLE_CHANNEL, &amp;msg, sizeof(msg),</div><div class='add'>+			      priv-&gt;channel_idx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int es581_4_reset_device(struct es58x_device *es58x_dev)</div><div class='add'>+{</div><div class='add'>+	return es58x_send_msg(es58x_dev, ES581_4_CAN_COMMAND_TYPE,</div><div class='add'>+			      ES581_4_CMD_ID_RESET_DEVICE,</div><div class='add'>+			      ES58X_EMPTY_MSG, 0, ES58X_CHANNEL_IDX_NA);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int es581_4_get_timestamp(struct es58x_device *es58x_dev)</div><div class='add'>+{</div><div class='add'>+	return es58x_send_msg(es58x_dev, ES581_4_CAN_COMMAND_TYPE,</div><div class='add'>+			      ES581_4_CMD_ID_TIMESTAMP,</div><div class='add'>+			      ES58X_EMPTY_MSG, 0, ES58X_CHANNEL_IDX_NA);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Nominal bittiming constants for ES581.4 as specified in the</div><div class='add'>+ * microcontroller datasheet: "Stellaris(R) LM3S5B91 Microcontroller"</div><div class='add'>+ * table 17-4 "CAN Protocol Ranges" from Texas Instruments.</div><div class='add'>+ */</div><div class='add'>+static const struct can_bittiming_const es581_4_bittiming_const = {</div><div class='add'>+	.name = "ES581.4",</div><div class='add'>+	.tseg1_min = 1,</div><div class='add'>+	.tseg1_max = 8,</div><div class='add'>+	.tseg2_min = 1,</div><div class='add'>+	.tseg2_max = 8,</div><div class='add'>+	.sjw_max = 4,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 128,</div><div class='add'>+	.brp_inc = 1</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct es58x_parameters es581_4_param = {</div><div class='add'>+	.bittiming_const = &amp;es581_4_bittiming_const,</div><div class='add'>+	.data_bittiming_const = NULL,</div><div class='add'>+	.tdc_const = NULL,</div><div class='add'>+	.bitrate_max = 1 * MEGA /* BPS */,</div><div class='add'>+	.clock = {.freq = 50 * MEGA /* Hz */},</div><div class='add'>+	.ctrlmode_supported = CAN_CTRLMODE_CC_LEN8_DLC,</div><div class='add'>+	.tx_start_of_frame = 0xAFAF,</div><div class='add'>+	.rx_start_of_frame = 0xFAFA,</div><div class='add'>+	.tx_urb_cmd_max_len = ES581_4_TX_URB_CMD_MAX_LEN,</div><div class='add'>+	.rx_urb_cmd_max_len = ES581_4_RX_URB_CMD_MAX_LEN,</div><div class='add'>+	/* Size of internal device TX queue is 330.</div><div class='add'>+	 *</div><div class='add'>+	 * However, we witnessed some ES58X_ERR_PROT_CRC errors from</div><div class='add'>+	 * the device and thus, echo_skb_max was lowered to the</div><div class='add'>+	 * empirical value of 75 which seems stable and then rounded</div><div class='add'>+	 * down to become a power of two.</div><div class='add'>+	 *</div><div class='add'>+	 * Root cause of those ES58X_ERR_PROT_CRC errors is still</div><div class='add'>+	 * unclear.</div><div class='add'>+	 */</div><div class='add'>+	.fifo_mask = 63, /* echo_skb_max = 64 */</div><div class='add'>+	.dql_min_limit = CAN_FRAME_LEN_MAX * 50, /* Empirical value. */</div><div class='add'>+	.tx_bulk_max = ES581_4_TX_BULK_MAX,</div><div class='add'>+	.urb_cmd_header_len = ES581_4_URB_CMD_HEADER_LEN,</div><div class='add'>+	.rx_urb_max = ES58X_RX_URBS_MAX,</div><div class='add'>+	.tx_urb_max = ES58X_TX_URBS_MAX</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct es58x_operators es581_4_ops = {</div><div class='add'>+	.get_msg_len = es581_4_get_msg_len,</div><div class='add'>+	.handle_urb_cmd = es581_4_handle_urb_cmd,</div><div class='add'>+	.fill_urb_header = es581_4_fill_urb_header,</div><div class='add'>+	.tx_can_msg = es581_4_tx_can_msg,</div><div class='add'>+	.enable_channel = es581_4_enable_channel,</div><div class='add'>+	.disable_channel = es581_4_disable_channel,</div><div class='add'>+	.reset_device = es581_4_reset_device,</div><div class='add'>+	.get_timestamp = es581_4_get_timestamp</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/net/can/usb/etas_es58x/es581_4.h b/drivers/net/can/usb/etas_es58x/es581_4.h<br/>new file mode 100644<br/>index 000000000000..667ecb77168c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/etas_es58x/es581_4.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/etas_es58x/es581_4.h</a></div><div class='hunk'>@@ -0,0 +1,207 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+</div><div class='add'>+/* Driver for ETAS GmbH ES58X USB CAN(-FD) Bus Interfaces.</div><div class='add'>+ *</div><div class='add'>+ * File es581_4.h: Definitions and declarations specific to ETAS</div><div class='add'>+ * ES581.4.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2019 Robert Bosch Engineering and Business Solutions. All rights reserved.</div><div class='add'>+ * Copyright (c) 2020 ETAS K.K.. All rights reserved.</div><div class='add'>+ * Copyright (c) 2020, 2021 Vincent Mailhol &lt;mailhol.vincent@wanadoo.fr&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __ES581_4_H__</div><div class='add'>+#define __ES581_4_H__</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+#define ES581_4_NUM_CAN_CH 2</div><div class='add'>+#define ES581_4_CHANNEL_IDX_OFFSET 1</div><div class='add'>+</div><div class='add'>+#define ES581_4_TX_BULK_MAX 25</div><div class='add'>+#define ES581_4_RX_BULK_MAX 30</div><div class='add'>+#define ES581_4_ECHO_BULK_MAX 30</div><div class='add'>+</div><div class='add'>+enum es581_4_cmd_type {</div><div class='add'>+	ES581_4_CAN_COMMAND_TYPE = 0x45</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum es581_4_cmd_id {</div><div class='add'>+	ES581_4_CMD_ID_OPEN_CHANNEL = 0x01,</div><div class='add'>+	ES581_4_CMD_ID_CLOSE_CHANNEL = 0x02,</div><div class='add'>+	ES581_4_CMD_ID_SET_BITTIMING = 0x03,</div><div class='add'>+	ES581_4_CMD_ID_ENABLE_CHANNEL = 0x04,</div><div class='add'>+	ES581_4_CMD_ID_TX_MSG = 0x05,</div><div class='add'>+	ES581_4_CMD_ID_RX_MSG = 0x06,</div><div class='add'>+	ES581_4_CMD_ID_RESET_RX = 0x0A,</div><div class='add'>+	ES581_4_CMD_ID_RESET_TX = 0x0B,</div><div class='add'>+	ES581_4_CMD_ID_DISABLE_CHANNEL = 0x0C,</div><div class='add'>+	ES581_4_CMD_ID_TIMESTAMP = 0x0E,</div><div class='add'>+	ES581_4_CMD_ID_RESET_DEVICE = 0x28,</div><div class='add'>+	ES581_4_CMD_ID_ECHO = 0x71,</div><div class='add'>+	ES581_4_CMD_ID_DEVICE_ERR = 0x72</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum es581_4_rx_type {</div><div class='add'>+	ES581_4_RX_TYPE_MESSAGE = 1,</div><div class='add'>+	ES581_4_RX_TYPE_ERROR = 3,</div><div class='add'>+	ES581_4_RX_TYPE_EVENT = 4</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct es581_4_tx_conf_msg - Channel configuration.</div><div class='add'>+ * @bitrate: Bitrate.</div><div class='add'>+ * @sample_point: Sample point is in percent [0..100].</div><div class='add'>+ * @samples_per_bit: type enum es58x_samples_per_bit.</div><div class='add'>+ * @bit_time: Number of time quanta in one bit.</div><div class='add'>+ * @sjw: Synchronization Jump Width.</div><div class='add'>+ * @sync_edge: type enum es58x_sync_edge.</div><div class='add'>+ * @physical_layer: type enum es58x_physical_layer.</div><div class='add'>+ * @echo_mode: type enum es58x_echo_mode.</div><div class='add'>+ * @channel_no: Channel number, starting from 1. Not to be confused</div><div class='add'>+ *	with channed_idx of the ES58X FD which starts from 0.</div><div class='add'>+ */</div><div class='add'>+struct es581_4_tx_conf_msg {</div><div class='add'>+	__le32 bitrate;</div><div class='add'>+	__le32 sample_point;</div><div class='add'>+	__le32 samples_per_bit;</div><div class='add'>+	__le32 bit_time;</div><div class='add'>+	__le32 sjw;</div><div class='add'>+	__le32 sync_edge;</div><div class='add'>+	__le32 physical_layer;</div><div class='add'>+	__le32 echo_mode;</div><div class='add'>+	u8 channel_no;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct es581_4_tx_can_msg {</div><div class='add'>+	__le32 can_id;</div><div class='add'>+	__le32 packet_idx;</div><div class='add'>+	__le16 flags;</div><div class='add'>+	u8 channel_no;</div><div class='add'>+	u8 dlc;</div><div class='add'>+	u8 data[CAN_MAX_DLEN];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* The ES581.4 allows bulk transfer.  */</div><div class='add'>+struct es581_4_bulk_tx_can_msg {</div><div class='add'>+	u8 num_can_msg;</div><div class='add'>+	/* Using type "u8[]" instead of "struct es581_4_tx_can_msg[]"</div><div class='add'>+	 * for tx_msg_buf because each member has a flexible size.</div><div class='add'>+	 */</div><div class='add'>+	u8 tx_can_msg_buf[ES581_4_TX_BULK_MAX *</div><div class='add'>+			  sizeof(struct es581_4_tx_can_msg)];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct es581_4_echo_msg {</div><div class='add'>+	__le64 timestamp;</div><div class='add'>+	__le32 packet_idx;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct es581_4_bulk_echo_msg {</div><div class='add'>+	u8 channel_no;</div><div class='add'>+	struct es581_4_echo_msg echo_msg[ES581_4_ECHO_BULK_MAX];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* Normal Rx CAN Message */</div><div class='add'>+struct es581_4_rx_can_msg {</div><div class='add'>+	__le64 timestamp;</div><div class='add'>+	u8 rx_type;		/* type enum es581_4_rx_type */</div><div class='add'>+	u8 flags;		/* type enum es58x_flag */</div><div class='add'>+	u8 channel_no;</div><div class='add'>+	u8 dlc;</div><div class='add'>+	__le32 can_id;</div><div class='add'>+	u8 data[CAN_MAX_DLEN];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct es581_4_rx_err_msg {</div><div class='add'>+	__le64 timestamp;</div><div class='add'>+	__le16 rx_type;		/* type enum es581_4_rx_type */</div><div class='add'>+	__le16 flags;		/* type enum es58x_flag */</div><div class='add'>+	u8 channel_no;</div><div class='add'>+	u8 __padding[2];</div><div class='add'>+	u8 dlc;</div><div class='add'>+	__le32 tag;		/* Related to the CAN filtering. Unused in this module */</div><div class='add'>+	__le32 can_id;</div><div class='add'>+	__le32 error;		/* type enum es58x_error */</div><div class='add'>+	__le32 destination;	/* Unused in this module */</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct es581_4_rx_event_msg {</div><div class='add'>+	__le64 timestamp;</div><div class='add'>+	__le16 rx_type;		/* type enum es581_4_rx_type */</div><div class='add'>+	u8 channel_no;</div><div class='add'>+	u8 __padding;</div><div class='add'>+	__le32 tag;		/* Related to the CAN filtering. Unused in this module */</div><div class='add'>+	__le32 event;		/* type enum es58x_event */</div><div class='add'>+	__le32 destination;	/* Unused in this module */</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct es581_4_tx_ack_msg {</div><div class='add'>+	__le16 tx_free_entries;	/* Number of remaining free entries in the device TX queue */</div><div class='add'>+	u8 channel_no;</div><div class='add'>+	u8 rx_cmd_ret_u8;	/* type enum es58x_cmd_ret_code_u8 */</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct es581_4_rx_cmd_ret {</div><div class='add'>+	__le32 rx_cmd_ret_le32;</div><div class='add'>+	u8 channel_no;</div><div class='add'>+	u8 __padding[3];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct es581_4_urb_cmd - Commands received from or sent to the</div><div class='add'>+ *	ES581.4 device.</div><div class='add'>+ * @SOF: Start of Frame.</div><div class='add'>+ * @cmd_type: Command Type (type: enum es581_4_cmd_type). The CRC</div><div class='add'>+ *	calculation starts at this position.</div><div class='add'>+ * @cmd_id: Command ID (type: enum es581_4_cmd_id).</div><div class='add'>+ * @msg_len: Length of the message, excluding CRC (i.e. length of the</div><div class='add'>+ *	union).</div><div class='add'>+ * @tx_conf_msg: Channel configuration.</div><div class='add'>+ * @bulk_tx_can_msg: Tx messages.</div><div class='add'>+ * @rx_can_msg: Array of Rx messages.</div><div class='add'>+ * @bulk_echo_msg: Tx message being looped back.</div><div class='add'>+ * @rx_err_msg: Error message.</div><div class='add'>+ * @rx_event_msg: Event message.</div><div class='add'>+ * @tx_ack_msg: Tx acknowledgment message.</div><div class='add'>+ * @rx_cmd_ret: Command return code.</div><div class='add'>+ * @timestamp: Timestamp reply.</div><div class='add'>+ * @rx_cmd_ret_u8: Rx 8 bits return code (type: enum</div><div class='add'>+ *	es58x_cmd_ret_code_u8).</div><div class='add'>+ * @raw_msg: Message raw payload.</div><div class='add'>+ * @reserved_for_crc16_do_not_use: The structure ends with a</div><div class='add'>+ *	CRC16. Because the structures in above union are of variable</div><div class='add'>+ *	lengths, we can not predict the offset of the CRC in</div><div class='add'>+ *	advance. Use functions es58x_get_crc() and es58x_set_crc() to</div><div class='add'>+ *	manipulate it.</div><div class='add'>+ */</div><div class='add'>+struct es581_4_urb_cmd {</div><div class='add'>+	__le16 SOF;</div><div class='add'>+	u8 cmd_type;</div><div class='add'>+	u8 cmd_id;</div><div class='add'>+	__le16 msg_len;</div><div class='add'>+</div><div class='add'>+	union {</div><div class='add'>+		struct es581_4_tx_conf_msg tx_conf_msg;</div><div class='add'>+		struct es581_4_bulk_tx_can_msg bulk_tx_can_msg;</div><div class='add'>+		struct es581_4_rx_can_msg rx_can_msg[ES581_4_RX_BULK_MAX];</div><div class='add'>+		struct es581_4_bulk_echo_msg bulk_echo_msg;</div><div class='add'>+		struct es581_4_rx_err_msg rx_err_msg;</div><div class='add'>+		struct es581_4_rx_event_msg rx_event_msg;</div><div class='add'>+		struct es581_4_tx_ack_msg tx_ack_msg;</div><div class='add'>+		struct es581_4_rx_cmd_ret rx_cmd_ret;</div><div class='add'>+		__le64 timestamp;</div><div class='add'>+		u8 rx_cmd_ret_u8;</div><div class='add'>+		DECLARE_FLEX_ARRAY(u8, raw_msg);</div><div class='add'>+	} __packed;</div><div class='add'>+</div><div class='add'>+	__le16 reserved_for_crc16_do_not_use;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+#define ES581_4_URB_CMD_HEADER_LEN (offsetof(struct es581_4_urb_cmd, raw_msg))</div><div class='add'>+#define ES581_4_TX_URB_CMD_MAX_LEN					\</div><div class='add'>+	ES58X_SIZEOF_URB_CMD(struct es581_4_urb_cmd, bulk_tx_can_msg)</div><div class='add'>+#define ES581_4_RX_URB_CMD_MAX_LEN					\</div><div class='add'>+	ES58X_SIZEOF_URB_CMD(struct es581_4_urb_cmd, rx_can_msg)</div><div class='add'>+</div><div class='add'>+#endif /* __ES581_4_H__ */</div><div class='head'>diff --git a/drivers/net/can/usb/etas_es58x/es58x_core.c b/drivers/net/can/usb/etas_es58x/es58x_core.c<br/>new file mode 100644<br/>index 000000000000..f799233c2b72<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/etas_es58x/es58x_core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/etas_es58x/es58x_core.c</a></div><div class='hunk'>@@ -0,0 +1,2272 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+/* Driver for ETAS GmbH ES58X USB CAN(-FD) Bus Interfaces.</div><div class='add'>+ *</div><div class='add'>+ * File es58x_core.c: Core logic to manage the network devices and the</div><div class='add'>+ * USB interface.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2019 Robert Bosch Engineering and Business Solutions. All rights reserved.</div><div class='add'>+ * Copyright (c) 2020 ETAS K.K.. All rights reserved.</div><div class='add'>+ * Copyright (c) 2020-2025 Vincent Mailhol &lt;mailhol@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/unaligned.h&gt;</div><div class='add'>+#include &lt;linux/crc16.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/usb.h&gt;</div><div class='add'>+#include &lt;net/devlink.h&gt;</div><div class='add'>+</div><div class='add'>+#include "es58x_core.h"</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Vincent Mailhol &lt;mailhol.vincent@wanadoo.fr&gt;");</div><div class='add'>+MODULE_AUTHOR("Arunachalam Santhanam &lt;arunachalam.santhanam@in.bosch.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Socket CAN driver for ETAS ES58X USB adapters");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='add'>+</div><div class='add'>+#define ES58X_VENDOR_ID 0x108C</div><div class='add'>+#define ES581_4_PRODUCT_ID 0x0159</div><div class='add'>+#define ES582_1_PRODUCT_ID 0x0168</div><div class='add'>+#define ES584_1_PRODUCT_ID 0x0169</div><div class='add'>+</div><div class='add'>+/* ES58X FD has some interface protocols unsupported by this driver. */</div><div class='add'>+#define ES58X_FD_INTERFACE_PROTOCOL 0</div><div class='add'>+</div><div class='add'>+/* Table of devices which work with this driver. */</div><div class='add'>+static const struct usb_device_id es58x_id_table[] = {</div><div class='add'>+	{</div><div class='add'>+		/* ETAS GmbH ES581.4 USB dual-channel CAN Bus Interface module. */</div><div class='add'>+		USB_DEVICE(ES58X_VENDOR_ID, ES581_4_PRODUCT_ID),</div><div class='add'>+		.driver_info = ES58X_DUAL_CHANNEL</div><div class='add'>+	}, {</div><div class='add'>+		/* ETAS GmbH ES582.1 USB dual-channel CAN FD Bus Interface module. */</div><div class='add'>+		USB_DEVICE_INTERFACE_PROTOCOL(ES58X_VENDOR_ID, ES582_1_PRODUCT_ID,</div><div class='add'>+					      ES58X_FD_INTERFACE_PROTOCOL),</div><div class='add'>+		.driver_info = ES58X_DUAL_CHANNEL | ES58X_FD_FAMILY</div><div class='add'>+	}, {</div><div class='add'>+		/* ETAS GmbH ES584.1 USB single-channel CAN FD Bus Interface module. */</div><div class='add'>+		USB_DEVICE_INTERFACE_PROTOCOL(ES58X_VENDOR_ID, ES584_1_PRODUCT_ID,</div><div class='add'>+					      ES58X_FD_INTERFACE_PROTOCOL),</div><div class='add'>+		.driver_info = ES58X_FD_FAMILY</div><div class='add'>+	}, {</div><div class='add'>+		/* Terminating entry */</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+MODULE_DEVICE_TABLE(usb, es58x_id_table);</div><div class='add'>+</div><div class='add'>+#define es58x_print_hex_dump(buf, len)					\</div><div class='add'>+	print_hex_dump(KERN_DEBUG,					\</div><div class='add'>+		       KBUILD_MODNAME " " __stringify(buf) ": ",	\</div><div class='add'>+		       DUMP_PREFIX_NONE, 16, 1, buf, len, false)</div><div class='add'>+</div><div class='add'>+#define es58x_print_hex_dump_debug(buf, len)				 \</div><div class='add'>+	print_hex_dump_debug(KBUILD_MODNAME " " __stringify(buf) ": ",\</div><div class='add'>+			     DUMP_PREFIX_NONE, 16, 1, buf, len, false)</div><div class='add'>+</div><div class='add'>+/* The last two bytes of an ES58X command is a CRC16. The first two</div><div class='add'>+ * bytes (the start of frame) are skipped and the CRC calculation</div><div class='add'>+ * starts on the third byte.</div><div class='add'>+ */</div><div class='add'>+#define ES58X_CRC_CALC_OFFSET sizeof_field(union es58x_urb_cmd, sof)</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_calculate_crc() - Compute the crc16 of a given URB.</div><div class='add'>+ * @urb_cmd: The URB command for which we want to calculate the CRC.</div><div class='add'>+ * @urb_len: Length of @urb_cmd. Must be at least bigger than 4</div><div class='add'>+ *	(ES58X_CRC_CALC_OFFSET + sizeof(crc))</div><div class='add'>+ *</div><div class='add'>+ * Return: crc16 value.</div><div class='add'>+ */</div><div class='add'>+static u16 es58x_calculate_crc(const union es58x_urb_cmd *urb_cmd, u16 urb_len)</div><div class='add'>+{</div><div class='add'>+	u16 crc;</div><div class='add'>+	ssize_t len = urb_len - ES58X_CRC_CALC_OFFSET - sizeof(crc);</div><div class='add'>+</div><div class='add'>+	crc = crc16(0, &amp;urb_cmd-&gt;raw_cmd[ES58X_CRC_CALC_OFFSET], len);</div><div class='add'>+	return crc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_get_crc() - Get the CRC value of a given URB.</div><div class='add'>+ * @urb_cmd: The URB command for which we want to get the CRC.</div><div class='add'>+ * @urb_len: Length of @urb_cmd. Must be at least bigger than 4</div><div class='add'>+ *	(ES58X_CRC_CALC_OFFSET + sizeof(crc))</div><div class='add'>+ *</div><div class='add'>+ * Return: crc16 value.</div><div class='add'>+ */</div><div class='add'>+static u16 es58x_get_crc(const union es58x_urb_cmd *urb_cmd, u16 urb_len)</div><div class='add'>+{</div><div class='add'>+	u16 crc;</div><div class='add'>+	const __le16 *crc_addr;</div><div class='add'>+</div><div class='add'>+	crc_addr = (__le16 *)&amp;urb_cmd-&gt;raw_cmd[urb_len - sizeof(crc)];</div><div class='add'>+	crc = get_unaligned_le16(crc_addr);</div><div class='add'>+	return crc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_set_crc() - Set the CRC value of a given URB.</div><div class='add'>+ * @urb_cmd: The URB command for which we want to get the CRC.</div><div class='add'>+ * @urb_len: Length of @urb_cmd. Must be at least bigger than 4</div><div class='add'>+ *	(ES58X_CRC_CALC_OFFSET + sizeof(crc))</div><div class='add'>+ */</div><div class='add'>+static void es58x_set_crc(union es58x_urb_cmd *urb_cmd, u16 urb_len)</div><div class='add'>+{</div><div class='add'>+	u16 crc;</div><div class='add'>+	__le16 *crc_addr;</div><div class='add'>+</div><div class='add'>+	crc = es58x_calculate_crc(urb_cmd, urb_len);</div><div class='add'>+	crc_addr = (__le16 *)&amp;urb_cmd-&gt;raw_cmd[urb_len - sizeof(crc)];</div><div class='add'>+	put_unaligned_le16(crc, crc_addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_check_crc() - Validate the CRC value of a given URB.</div><div class='add'>+ * @es58x_dev: ES58X device.</div><div class='add'>+ * @urb_cmd: The URB command for which we want to check the CRC.</div><div class='add'>+ * @urb_len: Length of @urb_cmd. Must be at least bigger than 4</div><div class='add'>+ *	(ES58X_CRC_CALC_OFFSET + sizeof(crc))</div><div class='add'>+ *</div><div class='add'>+ * Return: zero on success, -EBADMSG if the CRC check fails.</div><div class='add'>+ */</div><div class='add'>+static int es58x_check_crc(struct es58x_device *es58x_dev,</div><div class='add'>+			   const union es58x_urb_cmd *urb_cmd, u16 urb_len)</div><div class='add'>+{</div><div class='add'>+	u16 calculated_crc = es58x_calculate_crc(urb_cmd, urb_len);</div><div class='add'>+	u16 expected_crc = es58x_get_crc(urb_cmd, urb_len);</div><div class='add'>+</div><div class='add'>+	if (expected_crc != calculated_crc) {</div><div class='add'>+		dev_err_ratelimited(es58x_dev-&gt;dev,</div><div class='add'>+				    "%s: Bad CRC, urb_len: %d\n",</div><div class='add'>+				    __func__, urb_len);</div><div class='add'>+		return -EBADMSG;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_timestamp_to_ns() - Convert a timestamp value received from a</div><div class='add'>+ *	ES58X device to nanoseconds.</div><div class='add'>+ * @timestamp: Timestamp received from a ES58X device.</div><div class='add'>+ *</div><div class='add'>+ * The timestamp received from ES58X is expressed in multiples of 0.5</div><div class='add'>+ * micro seconds. This function converts it in to nanoseconds.</div><div class='add'>+ *</div><div class='add'>+ * Return: Timestamp value in nanoseconds.</div><div class='add'>+ */</div><div class='add'>+static u64 es58x_timestamp_to_ns(u64 timestamp)</div><div class='add'>+{</div><div class='add'>+	const u64 es58x_timestamp_ns_mult_coef = 500ULL;</div><div class='add'>+</div><div class='add'>+	return es58x_timestamp_ns_mult_coef * timestamp;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_set_skb_timestamp() - Set the hardware timestamp of an skb.</div><div class='add'>+ * @netdev: CAN network device.</div><div class='add'>+ * @skb: socket buffer of a CAN message.</div><div class='add'>+ * @timestamp: Timestamp received from an ES58X device.</div><div class='add'>+ *</div><div class='add'>+ * Used for both received and echo messages.</div><div class='add'>+ */</div><div class='add'>+static void es58x_set_skb_timestamp(struct net_device *netdev,</div><div class='add'>+				    struct sk_buff *skb, u64 timestamp)</div><div class='add'>+{</div><div class='add'>+	struct es58x_device *es58x_dev = es58x_priv(netdev)-&gt;es58x_dev;</div><div class='add'>+	struct skb_shared_hwtstamps *hwts;</div><div class='add'>+</div><div class='add'>+	hwts = skb_hwtstamps(skb);</div><div class='add'>+	/* Ignoring overflow (overflow on 64 bits timestamp with nano</div><div class='add'>+	 * second precision would occur after more than 500 years).</div><div class='add'>+	 */</div><div class='add'>+	hwts-&gt;hwtstamp = ns_to_ktime(es58x_timestamp_to_ns(timestamp) +</div><div class='add'>+				     es58x_dev-&gt;realtime_diff_ns);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_rx_timestamp() - Handle a received timestamp.</div><div class='add'>+ * @es58x_dev: ES58X device.</div><div class='add'>+ * @timestamp: Timestamp received from a ES58X device.</div><div class='add'>+ *</div><div class='add'>+ * Calculate the difference between the ES58X device and the kernel</div><div class='add'>+ * internal clocks. This difference will be later used as an offset to</div><div class='add'>+ * convert the timestamps of RX and echo messages to match the kernel</div><div class='add'>+ * system time (e.g. convert to UNIX time).</div><div class='add'>+ */</div><div class='add'>+void es58x_rx_timestamp(struct es58x_device *es58x_dev, u64 timestamp)</div><div class='add'>+{</div><div class='add'>+	u64 ktime_real_ns = ktime_get_real_ns();</div><div class='add'>+	u64 device_timestamp = es58x_timestamp_to_ns(timestamp);</div><div class='add'>+</div><div class='add'>+	dev_dbg(es58x_dev-&gt;dev, "%s: request round-trip time: %llu ns\n",</div><div class='add'>+		__func__, ktime_real_ns - es58x_dev-&gt;ktime_req_ns);</div><div class='add'>+</div><div class='add'>+	es58x_dev-&gt;realtime_diff_ns =</div><div class='add'>+	    (es58x_dev-&gt;ktime_req_ns + ktime_real_ns) / 2 - device_timestamp;</div><div class='add'>+	es58x_dev-&gt;ktime_req_ns = 0;</div><div class='add'>+</div><div class='add'>+	dev_dbg(es58x_dev-&gt;dev,</div><div class='add'>+		"%s: Device timestamp: %llu, diff with kernel: %llu\n",</div><div class='add'>+		__func__, device_timestamp, es58x_dev-&gt;realtime_diff_ns);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_set_realtime_diff_ns() - Calculate difference between the</div><div class='add'>+ *	clocks of the ES58X device and the kernel</div><div class='add'>+ * @es58x_dev: ES58X device.</div><div class='add'>+ *</div><div class='add'>+ * Request a timestamp from the ES58X device. Once the answer is</div><div class='add'>+ * received, the timestamp difference will be set by the callback</div><div class='add'>+ * function es58x_rx_timestamp().</div><div class='add'>+ *</div><div class='add'>+ * Return: zero on success, errno when any error occurs.</div><div class='add'>+ */</div><div class='add'>+static int es58x_set_realtime_diff_ns(struct es58x_device *es58x_dev)</div><div class='add'>+{</div><div class='add'>+	if (es58x_dev-&gt;ktime_req_ns) {</div><div class='add'>+		dev_warn(es58x_dev-&gt;dev,</div><div class='add'>+			 "%s: Previous request to set timestamp has not completed yet\n",</div><div class='add'>+			 __func__);</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	es58x_dev-&gt;ktime_req_ns = ktime_get_real_ns();</div><div class='add'>+	return es58x_dev-&gt;ops-&gt;get_timestamp(es58x_dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_is_can_state_active() - Is the network device in an active</div><div class='add'>+ *	CAN state?</div><div class='add'>+ * @netdev: CAN network device.</div><div class='add'>+ *</div><div class='add'>+ * The device is considered active if it is able to send or receive</div><div class='add'>+ * CAN frames, that is to say if it is in any of</div><div class='add'>+ * CAN_STATE_ERROR_ACTIVE, CAN_STATE_ERROR_WARNING or</div><div class='add'>+ * CAN_STATE_ERROR_PASSIVE states.</div><div class='add'>+ *</div><div class='add'>+ * Caution: when recovering from a bus-off,</div><div class='add'>+ * net/core/dev.c#can_restart() will call</div><div class='add'>+ * net/core/dev.c#can_flush_echo_skb() without using any kind of</div><div class='add'>+ * locks. For this reason, it is critical to guarantee that no TX or</div><div class='add'>+ * echo operations (i.e. any access to priv-&gt;echo_skb[]) can be done</div><div class='add'>+ * while this function is returning false.</div><div class='add'>+ *</div><div class='add'>+ * Return: true if the device is active, else returns false.</div><div class='add'>+ */</div><div class='add'>+static bool es58x_is_can_state_active(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	return es58x_priv(netdev)-&gt;can.state &lt; CAN_STATE_BUS_OFF;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_is_echo_skb_threshold_reached() - Determine the limit of how</div><div class='add'>+ *	many skb slots can be taken before we should stop the network</div><div class='add'>+ *	queue.</div><div class='add'>+ * @priv: ES58X private parameters related to the network device.</div><div class='add'>+ *</div><div class='add'>+ * We need to save enough free skb slots in order to be able to do</div><div class='add'>+ * bulk send. This function can be used to determine when to wake or</div><div class='add'>+ * stop the network queue in regard to the number of skb slots already</div><div class='add'>+ * taken if the echo FIFO.</div><div class='add'>+ *</div><div class='add'>+ * Return: boolean.</div><div class='add'>+ */</div><div class='add'>+static bool es58x_is_echo_skb_threshold_reached(struct es58x_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 num_echo_skb =  priv-&gt;tx_head - priv-&gt;tx_tail;</div><div class='add'>+	u32 threshold = priv-&gt;can.echo_skb_max -</div><div class='add'>+		priv-&gt;es58x_dev-&gt;param-&gt;tx_bulk_max + 1;</div><div class='add'>+</div><div class='add'>+	return num_echo_skb &gt;= threshold;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_can_free_echo_skb_tail() - Remove the oldest echo skb of the</div><div class='add'>+ *	echo FIFO.</div><div class='add'>+ * @netdev: CAN network device.</div><div class='add'>+ *</div><div class='add'>+ * Naming convention: the tail is the beginning of the FIFO, i.e. the</div><div class='add'>+ * first skb to have entered the FIFO.</div><div class='add'>+ */</div><div class='add'>+static void es58x_can_free_echo_skb_tail(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct es58x_priv *priv = es58x_priv(netdev);</div><div class='add'>+	u16 fifo_mask = priv-&gt;es58x_dev-&gt;param-&gt;fifo_mask;</div><div class='add'>+	unsigned int frame_len = 0;</div><div class='add'>+</div><div class='add'>+	can_free_echo_skb(netdev, priv-&gt;tx_tail &amp; fifo_mask, &amp;frame_len);</div><div class='add'>+	netdev_completed_queue(netdev, 1, frame_len);</div><div class='add'>+</div><div class='add'>+	priv-&gt;tx_tail++;</div><div class='add'>+</div><div class='add'>+	netdev-&gt;stats.tx_dropped++;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_can_get_echo_skb_recovery() - Try to re-sync the echo FIFO.</div><div class='add'>+ * @netdev: CAN network device.</div><div class='add'>+ * @rcv_packet_idx: Index</div><div class='add'>+ *</div><div class='add'>+ * This function should not be called under normal circumstances. In</div><div class='add'>+ * the unlikely case that one or several URB packages get dropped by</div><div class='add'>+ * the device, the index will get out of sync. Try to recover by</div><div class='add'>+ * dropping the echo skb packets with older indexes.</div><div class='add'>+ *</div><div class='add'>+ * Return: zero if recovery was successful, -EINVAL otherwise.</div><div class='add'>+ */</div><div class='add'>+static int es58x_can_get_echo_skb_recovery(struct net_device *netdev,</div><div class='add'>+					   u32 rcv_packet_idx)</div><div class='add'>+{</div><div class='add'>+	struct es58x_priv *priv = es58x_priv(netdev);</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	netdev-&gt;stats.tx_errors++;</div><div class='add'>+</div><div class='add'>+	if (net_ratelimit())</div><div class='add'>+		netdev_warn(netdev,</div><div class='add'>+			    "Bad echo packet index: %u. First index: %u, end index %u, num_echo_skb: %02u/%02u\n",</div><div class='add'>+			    rcv_packet_idx, priv-&gt;tx_tail, priv-&gt;tx_head,</div><div class='add'>+			    priv-&gt;tx_head - priv-&gt;tx_tail,</div><div class='add'>+			    priv-&gt;can.echo_skb_max);</div><div class='add'>+</div><div class='add'>+	if ((s32)(rcv_packet_idx - priv-&gt;tx_tail) &lt; 0) {</div><div class='add'>+		if (net_ratelimit())</div><div class='add'>+			netdev_warn(netdev,</div><div class='add'>+				    "Received echo index is from the past. Ignoring it\n");</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+	} else if ((s32)(rcv_packet_idx - priv-&gt;tx_head) &gt;= 0) {</div><div class='add'>+		if (net_ratelimit())</div><div class='add'>+			netdev_err(netdev,</div><div class='add'>+				   "Received echo index is from the future. Ignoring it\n");</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+	} else {</div><div class='add'>+		if (net_ratelimit())</div><div class='add'>+			netdev_warn(netdev,</div><div class='add'>+				    "Recovery: dropping %u echo skb from index %u to %u\n",</div><div class='add'>+				    rcv_packet_idx - priv-&gt;tx_tail,</div><div class='add'>+				    priv-&gt;tx_tail, rcv_packet_idx - 1);</div><div class='add'>+		while (priv-&gt;tx_tail != rcv_packet_idx) {</div><div class='add'>+			if (priv-&gt;tx_tail == priv-&gt;tx_head)</div><div class='add'>+				return -EINVAL;</div><div class='add'>+			es58x_can_free_echo_skb_tail(netdev);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_can_get_echo_skb() - Get the skb from the echo FIFO and loop</div><div class='add'>+ *	it back locally.</div><div class='add'>+ * @netdev: CAN network device.</div><div class='add'>+ * @rcv_packet_idx: Index of the first packet received from the device.</div><div class='add'>+ * @tstamps: Array of hardware timestamps received from a ES58X device.</div><div class='add'>+ * @pkts: Number of packets (and so, length of @tstamps).</div><div class='add'>+ *</div><div class='add'>+ * Callback function for when we receive a self reception</div><div class='add'>+ * acknowledgment.  Retrieves the skb from the echo FIFO, sets its</div><div class='add'>+ * hardware timestamp (the actual time it was sent) and loops it back</div><div class='add'>+ * locally.</div><div class='add'>+ *</div><div class='add'>+ * The device has to be active (i.e. network interface UP and not in</div><div class='add'>+ * bus off state or restarting).</div><div class='add'>+ *</div><div class='add'>+ * Packet indexes must be consecutive (i.e. index of first packet is</div><div class='add'>+ * @rcv_packet_idx, index of second packet is @rcv_packet_idx + 1 and</div><div class='add'>+ * index of last packet is @rcv_packet_idx + @pkts - 1).</div><div class='add'>+ *</div><div class='add'>+ * Return: zero on success.</div><div class='add'>+ */</div><div class='add'>+int es58x_can_get_echo_skb(struct net_device *netdev, u32 rcv_packet_idx,</div><div class='add'>+			   u64 *tstamps, unsigned int pkts)</div><div class='add'>+{</div><div class='add'>+	struct es58x_priv *priv = es58x_priv(netdev);</div><div class='add'>+	unsigned int rx_total_frame_len = 0;</div><div class='add'>+	unsigned int num_echo_skb = priv-&gt;tx_head - priv-&gt;tx_tail;</div><div class='add'>+	int i;</div><div class='add'>+	u16 fifo_mask = priv-&gt;es58x_dev-&gt;param-&gt;fifo_mask;</div><div class='add'>+</div><div class='add'>+	if (!netif_running(netdev)) {</div><div class='add'>+		if (net_ratelimit())</div><div class='add'>+			netdev_info(netdev,</div><div class='add'>+				    "%s: %s is down, dropping %d echo packets\n",</div><div class='add'>+				    __func__, netdev-&gt;name, pkts);</div><div class='add'>+		netdev-&gt;stats.tx_dropped += pkts;</div><div class='add'>+		return 0;</div><div class='add'>+	} else if (!es58x_is_can_state_active(netdev)) {</div><div class='add'>+		if (net_ratelimit())</div><div class='add'>+			netdev_dbg(netdev,</div><div class='add'>+				   "Bus is off or device is restarting. Ignoring %u echo packets from index %u\n",</div><div class='add'>+				   pkts, rcv_packet_idx);</div><div class='add'>+		/* stats.tx_dropped will be (or was already)</div><div class='add'>+		 * incremented by</div><div class='add'>+		 * drivers/net/can/net/dev.c:can_flush_echo_skb().</div><div class='add'>+		 */</div><div class='add'>+		return 0;</div><div class='add'>+	} else if (num_echo_skb == 0) {</div><div class='add'>+		if (net_ratelimit())</div><div class='add'>+			netdev_warn(netdev,</div><div class='add'>+				    "Received %u echo packets from index: %u but echo skb queue is empty.\n",</div><div class='add'>+				    pkts, rcv_packet_idx);</div><div class='add'>+		netdev-&gt;stats.tx_dropped += pkts;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;tx_tail != rcv_packet_idx) {</div><div class='add'>+		if (es58x_can_get_echo_skb_recovery(netdev, rcv_packet_idx) &lt; 0) {</div><div class='add'>+			if (net_ratelimit())</div><div class='add'>+				netdev_warn(netdev,</div><div class='add'>+					    "Could not find echo skb for echo packet index: %u\n",</div><div class='add'>+					    rcv_packet_idx);</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	if (num_echo_skb &lt; pkts) {</div><div class='add'>+		int pkts_drop = pkts - num_echo_skb;</div><div class='add'>+</div><div class='add'>+		if (net_ratelimit())</div><div class='add'>+			netdev_err(netdev,</div><div class='add'>+				   "Received %u echo packets but have only %d echo skb. Dropping %d echo skb\n",</div><div class='add'>+				   pkts, num_echo_skb, pkts_drop);</div><div class='add'>+		netdev-&gt;stats.tx_dropped += pkts_drop;</div><div class='add'>+		pkts -= pkts_drop;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pkts; i++) {</div><div class='add'>+		unsigned int skb_idx = priv-&gt;tx_tail &amp; fifo_mask;</div><div class='add'>+		struct sk_buff *skb = priv-&gt;can.echo_skb[skb_idx];</div><div class='add'>+		unsigned int frame_len = 0;</div><div class='add'>+</div><div class='add'>+		if (skb)</div><div class='add'>+			es58x_set_skb_timestamp(netdev, skb, tstamps[i]);</div><div class='add'>+</div><div class='add'>+		netdev-&gt;stats.tx_bytes += can_get_echo_skb(netdev, skb_idx,</div><div class='add'>+							   &amp;frame_len);</div><div class='add'>+		rx_total_frame_len += frame_len;</div><div class='add'>+</div><div class='add'>+		priv-&gt;tx_tail++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev_completed_queue(netdev, pkts, rx_total_frame_len);</div><div class='add'>+	netdev-&gt;stats.tx_packets += pkts;</div><div class='add'>+</div><div class='add'>+	priv-&gt;err_passive_before_rtx_success = 0;</div><div class='add'>+	if (!es58x_is_echo_skb_threshold_reached(priv))</div><div class='add'>+		netif_wake_queue(netdev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_can_reset_echo_fifo() - Reset the echo FIFO.</div><div class='add'>+ * @netdev: CAN network device.</div><div class='add'>+ *</div><div class='add'>+ * The echo_skb array of struct can_priv will be flushed by</div><div class='add'>+ * drivers/net/can/dev.c:can_flush_echo_skb(). This function resets</div><div class='add'>+ * the parameters of the struct es58x_priv of our device and reset the</div><div class='add'>+ * queue (c.f. BQL).</div><div class='add'>+ */</div><div class='add'>+static void es58x_can_reset_echo_fifo(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct es58x_priv *priv = es58x_priv(netdev);</div><div class='add'>+</div><div class='add'>+	priv-&gt;tx_tail = 0;</div><div class='add'>+	priv-&gt;tx_head = 0;</div><div class='add'>+	priv-&gt;tx_urb = NULL;</div><div class='add'>+	priv-&gt;err_passive_before_rtx_success = 0;</div><div class='add'>+	netdev_reset_queue(netdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_flush_pending_tx_msg() - Reset the buffer for transmission messages.</div><div class='add'>+ * @netdev: CAN network device.</div><div class='add'>+ *</div><div class='add'>+ * es58x_start_xmit() will queue up to tx_bulk_max messages in</div><div class='add'>+ * &amp;tx_urb buffer and do a bulk send of all messages in one single URB</div><div class='add'>+ * (c.f. xmit_more flag). When the device recovers from a bus off</div><div class='add'>+ * state or when the device stops, the tx_urb buffer might still have</div><div class='add'>+ * pending messages in it and thus need to be flushed.</div><div class='add'>+ */</div><div class='add'>+static void es58x_flush_pending_tx_msg(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct es58x_priv *priv = es58x_priv(netdev);</div><div class='add'>+	struct es58x_device *es58x_dev = priv-&gt;es58x_dev;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;tx_urb) {</div><div class='add'>+		netdev_warn(netdev, "%s: dropping %d TX messages\n",</div><div class='add'>+			    __func__, priv-&gt;tx_can_msg_cnt);</div><div class='add'>+		netdev-&gt;stats.tx_dropped += priv-&gt;tx_can_msg_cnt;</div><div class='add'>+		while (priv-&gt;tx_can_msg_cnt &gt; 0) {</div><div class='add'>+			unsigned int frame_len = 0;</div><div class='add'>+			u16 fifo_mask = priv-&gt;es58x_dev-&gt;param-&gt;fifo_mask;</div><div class='add'>+</div><div class='add'>+			priv-&gt;tx_head--;</div><div class='add'>+			priv-&gt;tx_can_msg_cnt--;</div><div class='add'>+			can_free_echo_skb(netdev, priv-&gt;tx_head &amp; fifo_mask,</div><div class='add'>+					  &amp;frame_len);</div><div class='add'>+			netdev_completed_queue(netdev, 1, frame_len);</div><div class='add'>+		}</div><div class='add'>+		usb_anchor_urb(priv-&gt;tx_urb, &amp;priv-&gt;es58x_dev-&gt;tx_urbs_idle);</div><div class='add'>+		atomic_inc(&amp;es58x_dev-&gt;tx_urbs_idle_cnt);</div><div class='add'>+		usb_free_urb(priv-&gt;tx_urb);</div><div class='add'>+	}</div><div class='add'>+	priv-&gt;tx_urb = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_tx_ack_msg() - Handle acknowledgment messages.</div><div class='add'>+ * @netdev: CAN network device.</div><div class='add'>+ * @tx_free_entries: Number of free entries in the device transmit FIFO.</div><div class='add'>+ * @rx_cmd_ret_u32: error code as returned by the ES58X device.</div><div class='add'>+ *</div><div class='add'>+ * ES58X sends an acknowledgment message after a transmission request</div><div class='add'>+ * is done. This is mandatory for the ES581.4 but is optional (and</div><div class='add'>+ * deactivated in this driver) for the ES58X_FD family.</div><div class='add'>+ *</div><div class='add'>+ * Under normal circumstances, this function should never throw an</div><div class='add'>+ * error message.</div><div class='add'>+ *</div><div class='add'>+ * Return: zero on success, errno when any error occurs.</div><div class='add'>+ */</div><div class='add'>+int es58x_tx_ack_msg(struct net_device *netdev, u16 tx_free_entries,</div><div class='add'>+		     enum es58x_ret_u32 rx_cmd_ret_u32)</div><div class='add'>+{</div><div class='add'>+	struct es58x_priv *priv = es58x_priv(netdev);</div><div class='add'>+</div><div class='add'>+	if (tx_free_entries &lt;= priv-&gt;es58x_dev-&gt;param-&gt;tx_bulk_max) {</div><div class='add'>+		if (net_ratelimit())</div><div class='add'>+			netdev_err(netdev,</div><div class='add'>+				   "Only %d entries left in device queue, num_echo_skb: %d/%d\n",</div><div class='add'>+				   tx_free_entries,</div><div class='add'>+				   priv-&gt;tx_head - priv-&gt;tx_tail,</div><div class='add'>+				   priv-&gt;can.echo_skb_max);</div><div class='add'>+		netif_stop_queue(netdev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return es58x_rx_cmd_ret_u32(netdev, ES58X_RET_TYPE_TX_MSG,</div><div class='add'>+				    rx_cmd_ret_u32);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_rx_can_msg() - Handle a received a CAN message.</div><div class='add'>+ * @netdev: CAN network device.</div><div class='add'>+ * @timestamp: Hardware time stamp (only relevant in rx branches).</div><div class='add'>+ * @data: CAN payload.</div><div class='add'>+ * @can_id: CAN ID.</div><div class='add'>+ * @es58x_flags: Please refer to enum es58x_flag.</div><div class='add'>+ * @dlc: Data Length Code (raw value).</div><div class='add'>+ *</div><div class='add'>+ * Fill up a CAN skb and post it.</div><div class='add'>+ *</div><div class='add'>+ * This function handles the case where the DLC of a classical CAN</div><div class='add'>+ * frame is greater than CAN_MAX_DLEN (c.f. the len8_dlc field of</div><div class='add'>+ * struct can_frame).</div><div class='add'>+ *</div><div class='add'>+ * Return: zero on success.</div><div class='add'>+ */</div><div class='add'>+int es58x_rx_can_msg(struct net_device *netdev, u64 timestamp, const u8 *data,</div><div class='add'>+		     canid_t can_id, enum es58x_flag es58x_flags, u8 dlc)</div><div class='add'>+{</div><div class='add'>+	struct canfd_frame *cfd;</div><div class='add'>+	struct can_frame *ccf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	u8 len;</div><div class='add'>+	bool is_can_fd = !!(es58x_flags &amp; ES58X_FLAG_FD_DATA);</div><div class='add'>+</div><div class='add'>+	if (dlc &gt; CAN_MAX_RAW_DLC) {</div><div class='add'>+		netdev_err(netdev,</div><div class='add'>+			   "%s: DLC is %d but maximum should be %d\n",</div><div class='add'>+			   __func__, dlc, CAN_MAX_RAW_DLC);</div><div class='add'>+		return -EMSGSIZE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (is_can_fd) {</div><div class='add'>+		len = can_fd_dlc2len(dlc);</div><div class='add'>+		skb = alloc_canfd_skb(netdev, &amp;cfd);</div><div class='add'>+	} else {</div><div class='add'>+		len = can_cc_dlc2len(dlc);</div><div class='add'>+		skb = alloc_can_skb(netdev, &amp;ccf);</div><div class='add'>+		cfd = (struct canfd_frame *)ccf;</div><div class='add'>+	}</div><div class='add'>+	if (!skb) {</div><div class='add'>+		netdev-&gt;stats.rx_dropped++;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cfd-&gt;can_id = can_id;</div><div class='add'>+	if (es58x_flags &amp; ES58X_FLAG_EFF)</div><div class='add'>+		cfd-&gt;can_id |= CAN_EFF_FLAG;</div><div class='add'>+	if (is_can_fd) {</div><div class='add'>+		cfd-&gt;len = len;</div><div class='add'>+		if (es58x_flags &amp; ES58X_FLAG_FD_BRS)</div><div class='add'>+			cfd-&gt;flags |= CANFD_BRS;</div><div class='add'>+		if (es58x_flags &amp; ES58X_FLAG_FD_ESI)</div><div class='add'>+			cfd-&gt;flags |= CANFD_ESI;</div><div class='add'>+	} else {</div><div class='add'>+		can_frame_set_cc_len(ccf, dlc, es58x_priv(netdev)-&gt;can.ctrlmode);</div><div class='add'>+		if (es58x_flags &amp; ES58X_FLAG_RTR) {</div><div class='add'>+			ccf-&gt;can_id |= CAN_RTR_FLAG;</div><div class='add'>+			len = 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	memcpy(cfd-&gt;data, data, len);</div><div class='add'>+	netdev-&gt;stats.rx_packets++;</div><div class='add'>+	netdev-&gt;stats.rx_bytes += len;</div><div class='add'>+</div><div class='add'>+	es58x_set_skb_timestamp(netdev, skb, timestamp);</div><div class='add'>+	netif_rx(skb);</div><div class='add'>+</div><div class='add'>+	es58x_priv(netdev)-&gt;err_passive_before_rtx_success = 0;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_rx_err_msg() - Handle a received CAN event or error message.</div><div class='add'>+ * @netdev: CAN network device.</div><div class='add'>+ * @error: Error code.</div><div class='add'>+ * @event: Event code.</div><div class='add'>+ * @timestamp: Timestamp received from a ES58X device.</div><div class='add'>+ *</div><div class='add'>+ * Handle the errors and events received by the ES58X device, create</div><div class='add'>+ * a CAN error skb and post it.</div><div class='add'>+ *</div><div class='add'>+ * In some rare cases the devices might get stuck alternating between</div><div class='add'>+ * CAN_STATE_ERROR_PASSIVE and CAN_STATE_ERROR_WARNING. To prevent</div><div class='add'>+ * this behavior, we force a bus off state if the device goes in</div><div class='add'>+ * CAN_STATE_ERROR_WARNING for ES58X_MAX_CONSECUTIVE_WARN consecutive</div><div class='add'>+ * times with no successful transmission or reception in between.</div><div class='add'>+ *</div><div class='add'>+ * Once the device is in bus off state, the only way to restart it is</div><div class='add'>+ * through the drivers/net/can/dev.c:can_restart() function. The</div><div class='add'>+ * device is technically capable to recover by itself under certain</div><div class='add'>+ * circumstances, however, allowing self recovery would create</div><div class='add'>+ * complex race conditions with drivers/net/can/dev.c:can_restart()</div><div class='add'>+ * and thus was not implemented. To activate automatic restart, please</div><div class='add'>+ * set the restart-ms parameter (e.g. ip link set can0 type can</div><div class='add'>+ * restart-ms 100).</div><div class='add'>+ *</div><div class='add'>+ * If the bus is really instable, this function would try to send a</div><div class='add'>+ * lot of log messages. Those are rate limited (i.e. you will see</div><div class='add'>+ * messages such as "net_ratelimit: XXX callbacks suppressed" in</div><div class='add'>+ * dmesg).</div><div class='add'>+ *</div><div class='add'>+ * Return: zero on success, errno when any error occurs.</div><div class='add'>+ */</div><div class='add'>+int es58x_rx_err_msg(struct net_device *netdev, enum es58x_err error,</div><div class='add'>+		     enum es58x_event event, u64 timestamp)</div><div class='add'>+{</div><div class='add'>+	struct es58x_priv *priv = es58x_priv(netdev);</div><div class='add'>+	struct can_priv *can = netdev_priv(netdev);</div><div class='add'>+	struct can_device_stats *can_stats = &amp;can-&gt;can_stats;</div><div class='add'>+	struct can_frame *cf = NULL;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (!netif_running(netdev)) {</div><div class='add'>+		if (net_ratelimit())</div><div class='add'>+			netdev_info(netdev, "%s: %s is down, dropping packet\n",</div><div class='add'>+				    __func__, netdev-&gt;name);</div><div class='add'>+		netdev-&gt;stats.rx_dropped++;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (error == ES58X_ERR_OK &amp;&amp; event == ES58X_EVENT_OK) {</div><div class='add'>+		netdev_err(netdev, "%s: Both error and event are zero\n",</div><div class='add'>+			   __func__);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_err_skb(netdev, &amp;cf);</div><div class='add'>+</div><div class='add'>+	switch (error) {</div><div class='add'>+	case ES58X_ERR_OK:	/* 0: No error */</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case ES58X_ERR_PROT_STUFF:</div><div class='add'>+		if (net_ratelimit())</div><div class='add'>+			netdev_dbg(netdev, "Error BITSTUFF\n");</div><div class='add'>+		if (cf)</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case ES58X_ERR_PROT_FORM:</div><div class='add'>+		if (net_ratelimit())</div><div class='add'>+			netdev_dbg(netdev, "Error FORMAT\n");</div><div class='add'>+		if (cf)</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case ES58X_ERR_ACK:</div><div class='add'>+		if (net_ratelimit())</div><div class='add'>+			netdev_dbg(netdev, "Error ACK\n");</div><div class='add'>+		if (cf)</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_ACK;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case ES58X_ERR_PROT_BIT:</div><div class='add'>+		if (net_ratelimit())</div><div class='add'>+			netdev_dbg(netdev, "Error BIT\n");</div><div class='add'>+		if (cf)</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_BIT;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case ES58X_ERR_PROT_CRC:</div><div class='add'>+		if (net_ratelimit())</div><div class='add'>+			netdev_dbg(netdev, "Error CRC\n");</div><div class='add'>+		if (cf)</div><div class='add'>+			cf-&gt;data[3] |= CAN_ERR_PROT_LOC_CRC_SEQ;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case ES58X_ERR_PROT_BIT1:</div><div class='add'>+		if (net_ratelimit())</div><div class='add'>+			netdev_dbg(netdev,</div><div class='add'>+				   "Error: expected a recessive bit but monitored a dominant one\n");</div><div class='add'>+		if (cf)</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_BIT1;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case ES58X_ERR_PROT_BIT0:</div><div class='add'>+		if (net_ratelimit())</div><div class='add'>+			netdev_dbg(netdev,</div><div class='add'>+				   "Error expected a dominant bit but monitored a recessive one\n");</div><div class='add'>+		if (cf)</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_BIT0;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case ES58X_ERR_PROT_OVERLOAD:</div><div class='add'>+		if (net_ratelimit())</div><div class='add'>+			netdev_dbg(netdev, "Error OVERLOAD\n");</div><div class='add'>+		if (cf)</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_OVERLOAD;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case ES58X_ERR_PROT_UNSPEC:</div><div class='add'>+		if (net_ratelimit())</div><div class='add'>+			netdev_dbg(netdev, "Unspecified error\n");</div><div class='add'>+		if (cf)</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_PROT;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		if (net_ratelimit())</div><div class='add'>+			netdev_err(netdev,</div><div class='add'>+				   "%s: Unspecified error code 0x%04X\n",</div><div class='add'>+				   __func__, (int)error);</div><div class='add'>+		if (cf)</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_PROT;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (event) {</div><div class='add'>+	case ES58X_EVENT_OK:	/* 0: No event */</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case ES58X_EVENT_CRTL_ACTIVE:</div><div class='add'>+		if (can-&gt;state == CAN_STATE_BUS_OFF) {</div><div class='add'>+			netdev_err(netdev,</div><div class='add'>+				   "%s: state transition: BUS OFF -&gt; ACTIVE\n",</div><div class='add'>+				   __func__);</div><div class='add'>+		}</div><div class='add'>+		if (net_ratelimit())</div><div class='add'>+			netdev_dbg(netdev, "Event CAN BUS ACTIVE\n");</div><div class='add'>+		if (cf)</div><div class='add'>+			cf-&gt;data[1] |= CAN_ERR_CRTL_ACTIVE;</div><div class='add'>+		can-&gt;state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case ES58X_EVENT_CRTL_PASSIVE:</div><div class='add'>+		if (net_ratelimit())</div><div class='add'>+			netdev_dbg(netdev, "Event CAN BUS PASSIVE\n");</div><div class='add'>+		/* Either TX or RX error count reached passive state</div><div class='add'>+		 * but we do not know which. Setting both flags by</div><div class='add'>+		 * default.</div><div class='add'>+		 */</div><div class='add'>+		if (cf) {</div><div class='add'>+			cf-&gt;data[1] |= CAN_ERR_CRTL_RX_PASSIVE;</div><div class='add'>+			cf-&gt;data[1] |= CAN_ERR_CRTL_TX_PASSIVE;</div><div class='add'>+		}</div><div class='add'>+		if (can-&gt;state &lt; CAN_STATE_BUS_OFF)</div><div class='add'>+			can-&gt;state = CAN_STATE_ERROR_PASSIVE;</div><div class='add'>+		can_stats-&gt;error_passive++;</div><div class='add'>+		if (priv-&gt;err_passive_before_rtx_success &lt; U8_MAX)</div><div class='add'>+			priv-&gt;err_passive_before_rtx_success++;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case ES58X_EVENT_CRTL_WARNING:</div><div class='add'>+		if (net_ratelimit())</div><div class='add'>+			netdev_dbg(netdev, "Event CAN BUS WARNING\n");</div><div class='add'>+		/* Either TX or RX error count reached warning state</div><div class='add'>+		 * but we do not know which. Setting both flags by</div><div class='add'>+		 * default.</div><div class='add'>+		 */</div><div class='add'>+		if (cf) {</div><div class='add'>+			cf-&gt;data[1] |= CAN_ERR_CRTL_RX_WARNING;</div><div class='add'>+			cf-&gt;data[1] |= CAN_ERR_CRTL_TX_WARNING;</div><div class='add'>+		}</div><div class='add'>+		if (can-&gt;state &lt; CAN_STATE_BUS_OFF)</div><div class='add'>+			can-&gt;state = CAN_STATE_ERROR_WARNING;</div><div class='add'>+		can_stats-&gt;error_warning++;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case ES58X_EVENT_BUSOFF:</div><div class='add'>+		if (net_ratelimit())</div><div class='add'>+			netdev_dbg(netdev, "Event CAN BUS OFF\n");</div><div class='add'>+		if (cf)</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_BUSOFF;</div><div class='add'>+		can_stats-&gt;bus_off++;</div><div class='add'>+		netif_stop_queue(netdev);</div><div class='add'>+		if (can-&gt;state != CAN_STATE_BUS_OFF) {</div><div class='add'>+			can-&gt;state = CAN_STATE_BUS_OFF;</div><div class='add'>+			can_bus_off(netdev);</div><div class='add'>+			ret = can-&gt;do_set_mode(netdev, CAN_MODE_STOP);</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case ES58X_EVENT_SINGLE_WIRE:</div><div class='add'>+		if (net_ratelimit())</div><div class='add'>+			netdev_warn(netdev,</div><div class='add'>+				    "Lost connection on either CAN high or CAN low\n");</div><div class='add'>+		/* Lost connection on either CAN high or CAN</div><div class='add'>+		 * low. Setting both flags by default.</div><div class='add'>+		 */</div><div class='add'>+		if (cf) {</div><div class='add'>+			cf-&gt;data[4] |= CAN_ERR_TRX_CANH_NO_WIRE;</div><div class='add'>+			cf-&gt;data[4] |= CAN_ERR_TRX_CANL_NO_WIRE;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		if (net_ratelimit())</div><div class='add'>+			netdev_err(netdev,</div><div class='add'>+				   "%s: Unspecified event code 0x%04X\n",</div><div class='add'>+				   __func__, (int)event);</div><div class='add'>+		if (cf)</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cf) {</div><div class='add'>+		if (cf-&gt;data[1])</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='add'>+		if (cf-&gt;data[2] || cf-&gt;data[3]) {</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_PROT;</div><div class='add'>+			can_stats-&gt;bus_error++;</div><div class='add'>+		}</div><div class='add'>+		if (cf-&gt;data[4])</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_TRX;</div><div class='add'>+</div><div class='add'>+		es58x_set_skb_timestamp(netdev, skb, timestamp);</div><div class='add'>+		netif_rx(skb);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((event &amp; ES58X_EVENT_CRTL_PASSIVE) &amp;&amp;</div><div class='add'>+	    priv-&gt;err_passive_before_rtx_success == ES58X_CONSECUTIVE_ERR_PASSIVE_MAX) {</div><div class='add'>+		netdev_info(netdev,</div><div class='add'>+			    "Got %d consecutive warning events with no successful RX or TX. Forcing bus-off\n",</div><div class='add'>+			    priv-&gt;err_passive_before_rtx_success);</div><div class='add'>+		return es58x_rx_err_msg(netdev, ES58X_ERR_OK,</div><div class='add'>+					ES58X_EVENT_BUSOFF, timestamp);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_cmd_ret_desc() - Convert a command type to a string.</div><div class='add'>+ * @cmd_ret_type: Type of the command which triggered the return code.</div><div class='add'>+ *</div><div class='add'>+ * The final line (return "&lt;unknown&gt;") should not be reached. If this</div><div class='add'>+ * is the case, there is an implementation bug.</div><div class='add'>+ *</div><div class='add'>+ * Return: a readable description of the @cmd_ret_type.</div><div class='add'>+ */</div><div class='add'>+static const char *es58x_cmd_ret_desc(enum es58x_ret_type cmd_ret_type)</div><div class='add'>+{</div><div class='add'>+	switch (cmd_ret_type) {</div><div class='add'>+	case ES58X_RET_TYPE_SET_BITTIMING:</div><div class='add'>+		return "Set bittiming";</div><div class='add'>+	case ES58X_RET_TYPE_ENABLE_CHANNEL:</div><div class='add'>+		return "Enable channel";</div><div class='add'>+	case ES58X_RET_TYPE_DISABLE_CHANNEL:</div><div class='add'>+		return "Disable channel";</div><div class='add'>+	case ES58X_RET_TYPE_TX_MSG:</div><div class='add'>+		return "Transmit message";</div><div class='add'>+	case ES58X_RET_TYPE_RESET_RX:</div><div class='add'>+		return "Reset RX";</div><div class='add'>+	case ES58X_RET_TYPE_RESET_TX:</div><div class='add'>+		return "Reset TX";</div><div class='add'>+	case ES58X_RET_TYPE_DEVICE_ERR:</div><div class='add'>+		return "Device error";</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return "&lt;unknown&gt;";</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_rx_cmd_ret_u8() - Handle the command's return code received</div><div class='add'>+ *	from the ES58X device.</div><div class='add'>+ * @dev: Device, only used for the dev_XXX() print functions.</div><div class='add'>+ * @cmd_ret_type: Type of the command which triggered the return code.</div><div class='add'>+ * @rx_cmd_ret_u8: Command error code as returned by the ES58X device.</div><div class='add'>+ *</div><div class='add'>+ * Handles the 8 bits command return code. Those are specific to the</div><div class='add'>+ * ES581.4 device. The return value will eventually be used by</div><div class='add'>+ * es58x_handle_urb_cmd() function which will take proper actions in</div><div class='add'>+ * case of critical issues such and memory errors or bad CRC values.</div><div class='add'>+ *</div><div class='add'>+ * In contrast with es58x_rx_cmd_ret_u32(), the network device is</div><div class='add'>+ * unknown.</div><div class='add'>+ *</div><div class='add'>+ * Return: zero on success, return errno when any error occurs.</div><div class='add'>+ */</div><div class='add'>+int es58x_rx_cmd_ret_u8(struct device *dev,</div><div class='add'>+			enum es58x_ret_type cmd_ret_type,</div><div class='add'>+			enum es58x_ret_u8 rx_cmd_ret_u8)</div><div class='add'>+{</div><div class='add'>+	const char *ret_desc = es58x_cmd_ret_desc(cmd_ret_type);</div><div class='add'>+</div><div class='add'>+	switch (rx_cmd_ret_u8) {</div><div class='add'>+	case ES58X_RET_U8_OK:</div><div class='add'>+		dev_dbg_ratelimited(dev, "%s: OK\n", ret_desc);</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	case ES58X_RET_U8_ERR_UNSPECIFIED_FAILURE:</div><div class='add'>+		dev_err(dev, "%s: unspecified failure\n", ret_desc);</div><div class='add'>+		return -EBADMSG;</div><div class='add'>+</div><div class='add'>+	case ES58X_RET_U8_ERR_NO_MEM:</div><div class='add'>+		dev_err(dev, "%s: device ran out of memory\n", ret_desc);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	case ES58X_RET_U8_ERR_BAD_CRC:</div><div class='add'>+		dev_err(dev, "%s: CRC of previous command is incorrect\n",</div><div class='add'>+			ret_desc);</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		dev_err(dev, "%s: returned unknown value: 0x%02X\n",</div><div class='add'>+			ret_desc, rx_cmd_ret_u8);</div><div class='add'>+		return -EBADMSG;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_rx_cmd_ret_u32() - Handle the command return code received</div><div class='add'>+ *	from the ES58X device.</div><div class='add'>+ * @netdev: CAN network device.</div><div class='add'>+ * @cmd_ret_type: Type of the command which triggered the return code.</div><div class='add'>+ * @rx_cmd_ret_u32: error code as returned by the ES58X device.</div><div class='add'>+ *</div><div class='add'>+ * Handles the 32 bits command return code. The return value will</div><div class='add'>+ * eventually be used by es58x_handle_urb_cmd() function which will</div><div class='add'>+ * take proper actions in case of critical issues such and memory</div><div class='add'>+ * errors or bad CRC values.</div><div class='add'>+ *</div><div class='add'>+ * Return: zero on success, errno when any error occurs.</div><div class='add'>+ */</div><div class='add'>+int es58x_rx_cmd_ret_u32(struct net_device *netdev,</div><div class='add'>+			 enum es58x_ret_type cmd_ret_type,</div><div class='add'>+			 enum es58x_ret_u32 rx_cmd_ret_u32)</div><div class='add'>+{</div><div class='add'>+	struct es58x_priv *priv = es58x_priv(netdev);</div><div class='add'>+	const struct es58x_operators *ops = priv-&gt;es58x_dev-&gt;ops;</div><div class='add'>+	const char *ret_desc = es58x_cmd_ret_desc(cmd_ret_type);</div><div class='add'>+</div><div class='add'>+	switch (rx_cmd_ret_u32) {</div><div class='add'>+	case ES58X_RET_U32_OK:</div><div class='add'>+		switch (cmd_ret_type) {</div><div class='add'>+		case ES58X_RET_TYPE_ENABLE_CHANNEL:</div><div class='add'>+			es58x_can_reset_echo_fifo(netdev);</div><div class='add'>+			priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+			netif_wake_queue(netdev);</div><div class='add'>+			netdev_info(netdev,</div><div class='add'>+				    "%s: %s (Serial Number %s): CAN%d channel becomes ready\n",</div><div class='add'>+				    ret_desc, priv-&gt;es58x_dev-&gt;udev-&gt;product,</div><div class='add'>+				    priv-&gt;es58x_dev-&gt;udev-&gt;serial,</div><div class='add'>+				    priv-&gt;channel_idx + 1);</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case ES58X_RET_TYPE_TX_MSG:</div><div class='add'>+			if (IS_ENABLED(CONFIG_VERBOSE_DEBUG) &amp;&amp; net_ratelimit())</div><div class='add'>+				netdev_vdbg(netdev, "%s: OK\n", ret_desc);</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		default:</div><div class='add'>+			netdev_dbg(netdev, "%s: OK\n", ret_desc);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	case ES58X_RET_U32_ERR_UNSPECIFIED_FAILURE:</div><div class='add'>+		if (cmd_ret_type == ES58X_RET_TYPE_ENABLE_CHANNEL) {</div><div class='add'>+			int ret;</div><div class='add'>+</div><div class='add'>+			netdev_warn(netdev,</div><div class='add'>+				    "%s: channel is already opened, closing and re-opening it to reflect new configuration\n",</div><div class='add'>+				    ret_desc);</div><div class='add'>+			ret = ops-&gt;disable_channel(es58x_priv(netdev));</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+			return ops-&gt;enable_channel(es58x_priv(netdev));</div><div class='add'>+		}</div><div class='add'>+		if (cmd_ret_type == ES58X_RET_TYPE_DISABLE_CHANNEL) {</div><div class='add'>+			netdev_info(netdev,</div><div class='add'>+				    "%s: channel is already closed\n", ret_desc);</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+		netdev_err(netdev,</div><div class='add'>+			   "%s: unspecified failure\n", ret_desc);</div><div class='add'>+		return -EBADMSG;</div><div class='add'>+</div><div class='add'>+	case ES58X_RET_U32_ERR_NO_MEM:</div><div class='add'>+		netdev_err(netdev, "%s: device ran out of memory\n", ret_desc);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	case ES58X_RET_U32_WARN_PARAM_ADJUSTED:</div><div class='add'>+		netdev_warn(netdev,</div><div class='add'>+			    "%s: some incompatible parameters have been adjusted\n",</div><div class='add'>+			    ret_desc);</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	case ES58X_RET_U32_WARN_TX_MAYBE_REORDER:</div><div class='add'>+		netdev_warn(netdev,</div><div class='add'>+			    "%s: TX messages might have been reordered\n",</div><div class='add'>+			    ret_desc);</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	case ES58X_RET_U32_ERR_TIMEDOUT:</div><div class='add'>+		netdev_err(netdev, "%s: command timed out\n", ret_desc);</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+	case ES58X_RET_U32_ERR_FIFO_FULL:</div><div class='add'>+		netdev_warn(netdev, "%s: fifo is full\n", ret_desc);</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	case ES58X_RET_U32_ERR_BAD_CONFIG:</div><div class='add'>+		netdev_err(netdev, "%s: bad configuration\n", ret_desc);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	case ES58X_RET_U32_ERR_NO_RESOURCE:</div><div class='add'>+		netdev_err(netdev, "%s: no resource available\n", ret_desc);</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		netdev_err(netdev, "%s returned unknown value: 0x%08X\n",</div><div class='add'>+			   ret_desc, rx_cmd_ret_u32);</div><div class='add'>+		return -EBADMSG;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_increment_rx_errors() - Increment the network devices' error</div><div class='add'>+ *	count.</div><div class='add'>+ * @es58x_dev: ES58X device.</div><div class='add'>+ *</div><div class='add'>+ * If an error occurs on the early stages on receiving an URB command,</div><div class='add'>+ * we might not be able to figure out on which network device the</div><div class='add'>+ * error occurred. In such case, we arbitrarily increment the error</div><div class='add'>+ * count of all the network devices attached to our ES58X device.</div><div class='add'>+ */</div><div class='add'>+static void es58x_increment_rx_errors(struct es58x_device *es58x_dev)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; es58x_dev-&gt;num_can_ch; i++)</div><div class='add'>+		if (es58x_dev-&gt;netdev[i])</div><div class='add'>+			es58x_dev-&gt;netdev[i]-&gt;stats.rx_errors++;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_handle_urb_cmd() - Handle the URB command</div><div class='add'>+ * @es58x_dev: ES58X device.</div><div class='add'>+ * @urb_cmd: The URB command received from the ES58X device, might not</div><div class='add'>+ *	be aligned.</div><div class='add'>+ *</div><div class='add'>+ * Sends the URB command to the device specific function. Manages the</div><div class='add'>+ * errors thrown back by those functions.</div><div class='add'>+ */</div><div class='add'>+static void es58x_handle_urb_cmd(struct es58x_device *es58x_dev,</div><div class='add'>+				 const union es58x_urb_cmd *urb_cmd)</div><div class='add'>+{</div><div class='add'>+	const struct es58x_operators *ops = es58x_dev-&gt;ops;</div><div class='add'>+	size_t cmd_len;</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	ret = ops-&gt;handle_urb_cmd(es58x_dev, urb_cmd);</div><div class='add'>+	switch (ret) {</div><div class='add'>+	case 0:		/* OK */</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	case -ENODEV:</div><div class='add'>+		dev_err_ratelimited(es58x_dev-&gt;dev, "Device is not ready\n");</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case -EINVAL:</div><div class='add'>+	case -EMSGSIZE:</div><div class='add'>+	case -EBADRQC:</div><div class='add'>+	case -EBADMSG:</div><div class='add'>+	case -ECHRNG:</div><div class='add'>+	case -ETIMEDOUT:</div><div class='add'>+		cmd_len = es58x_get_urb_cmd_len(es58x_dev,</div><div class='add'>+						ops-&gt;get_msg_len(urb_cmd));</div><div class='add'>+		dev_err(es58x_dev-&gt;dev,</div><div class='add'>+			"ops-&gt;handle_urb_cmd() returned error %pe",</div><div class='add'>+			ERR_PTR(ret));</div><div class='add'>+		es58x_print_hex_dump(urb_cmd, cmd_len);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case -EFAULT:</div><div class='add'>+	case -ENOMEM:</div><div class='add'>+	case -EIO:</div><div class='add'>+	default:</div><div class='add'>+		dev_crit(es58x_dev-&gt;dev,</div><div class='add'>+			 "ops-&gt;handle_urb_cmd() returned error %pe, detaching all network devices\n",</div><div class='add'>+			 ERR_PTR(ret));</div><div class='add'>+		for (i = 0; i &lt; es58x_dev-&gt;num_can_ch; i++)</div><div class='add'>+			if (es58x_dev-&gt;netdev[i])</div><div class='add'>+				netif_device_detach(es58x_dev-&gt;netdev[i]);</div><div class='add'>+		if (es58x_dev-&gt;ops-&gt;reset_device)</div><div class='add'>+			es58x_dev-&gt;ops-&gt;reset_device(es58x_dev);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Because the urb command could not fully be parsed,</div><div class='add'>+	 * channel_id is not confirmed. Incrementing rx_errors count</div><div class='add'>+	 * of all channels.</div><div class='add'>+	 */</div><div class='add'>+	es58x_increment_rx_errors(es58x_dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_check_rx_urb() - Check the length and format of the URB command.</div><div class='add'>+ * @es58x_dev: ES58X device.</div><div class='add'>+ * @urb_cmd: The URB command received from the ES58X device, might not</div><div class='add'>+ *	be aligned.</div><div class='add'>+ * @urb_actual_len: The actual length of the URB command.</div><div class='add'>+ *</div><div class='add'>+ * Check if the first message of the received urb is valid, that is to</div><div class='add'>+ * say that both the header and the length are coherent.</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ * the length of the first message of the URB on success.</div><div class='add'>+ *</div><div class='add'>+ * -ENODATA if the URB command is incomplete (in which case, the URB</div><div class='add'>+ * command should be buffered and combined with the next URB to try to</div><div class='add'>+ * reconstitute the URB command).</div><div class='add'>+ *</div><div class='add'>+ * -EOVERFLOW if the length is bigger than the maximum expected one.</div><div class='add'>+ *</div><div class='add'>+ * -EBADRQC if the start of frame does not match the expected value.</div><div class='add'>+ */</div><div class='add'>+static signed int es58x_check_rx_urb(struct es58x_device *es58x_dev,</div><div class='add'>+				     const union es58x_urb_cmd *urb_cmd,</div><div class='add'>+				     u32 urb_actual_len)</div><div class='add'>+{</div><div class='add'>+	const struct device *dev = es58x_dev-&gt;dev;</div><div class='add'>+	const struct es58x_parameters *param = es58x_dev-&gt;param;</div><div class='add'>+	u16 sof, msg_len;</div><div class='add'>+	signed int urb_cmd_len, ret;</div><div class='add'>+</div><div class='add'>+	if (urb_actual_len &lt; param-&gt;urb_cmd_header_len) {</div><div class='add'>+		dev_vdbg(dev,</div><div class='add'>+			 "%s: Received %d bytes [%*ph]: header incomplete\n",</div><div class='add'>+			 __func__, urb_actual_len, urb_actual_len,</div><div class='add'>+			 urb_cmd-&gt;raw_cmd);</div><div class='add'>+		return -ENODATA;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sof = get_unaligned_le16(&amp;urb_cmd-&gt;sof);</div><div class='add'>+	if (sof != param-&gt;rx_start_of_frame) {</div><div class='add'>+		dev_err_ratelimited(es58x_dev-&gt;dev,</div><div class='add'>+				    "%s: Expected sequence 0x%04X for start of frame but got 0x%04X.\n",</div><div class='add'>+				    __func__, param-&gt;rx_start_of_frame, sof);</div><div class='add'>+		return -EBADRQC;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	msg_len = es58x_dev-&gt;ops-&gt;get_msg_len(urb_cmd);</div><div class='add'>+	urb_cmd_len = es58x_get_urb_cmd_len(es58x_dev, msg_len);</div><div class='add'>+	if (urb_cmd_len &gt; param-&gt;rx_urb_cmd_max_len) {</div><div class='add'>+		dev_err_ratelimited(es58x_dev-&gt;dev,</div><div class='add'>+				    "%s: Biggest expected size for rx urb_cmd is %u but receive a command of size %d\n",</div><div class='add'>+				    __func__,</div><div class='add'>+				    param-&gt;rx_urb_cmd_max_len, urb_cmd_len);</div><div class='add'>+		return -EOVERFLOW;</div><div class='add'>+	} else if (urb_actual_len &lt; urb_cmd_len) {</div><div class='add'>+		dev_vdbg(dev, "%s: Received %02d/%02d bytes\n",</div><div class='add'>+			 __func__, urb_actual_len, urb_cmd_len);</div><div class='add'>+		return -ENODATA;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = es58x_check_crc(es58x_dev, urb_cmd, urb_cmd_len);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return urb_cmd_len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_copy_to_cmd_buf() - Copy an array to the URB command buffer.</div><div class='add'>+ * @es58x_dev: ES58X device.</div><div class='add'>+ * @raw_cmd: the buffer we want to copy.</div><div class='add'>+ * @raw_cmd_len: length of @raw_cmd.</div><div class='add'>+ *</div><div class='add'>+ * Concatenates @raw_cmd_len bytes of @raw_cmd to the end of the URB</div><div class='add'>+ * command buffer.</div><div class='add'>+ *</div><div class='add'>+ * Return: zero on success, -EMSGSIZE if not enough space is available</div><div class='add'>+ * to do the copy.</div><div class='add'>+ */</div><div class='add'>+static int es58x_copy_to_cmd_buf(struct es58x_device *es58x_dev,</div><div class='add'>+				 u8 *raw_cmd, int raw_cmd_len)</div><div class='add'>+{</div><div class='add'>+	if (es58x_dev-&gt;rx_cmd_buf_len + raw_cmd_len &gt;</div><div class='add'>+	    es58x_dev-&gt;param-&gt;rx_urb_cmd_max_len)</div><div class='add'>+		return -EMSGSIZE;</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;es58x_dev-&gt;rx_cmd_buf.raw_cmd[es58x_dev-&gt;rx_cmd_buf_len],</div><div class='add'>+	       raw_cmd, raw_cmd_len);</div><div class='add'>+	es58x_dev-&gt;rx_cmd_buf_len += raw_cmd_len;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_split_urb_try_recovery() - Try to recover bad URB sequences.</div><div class='add'>+ * @es58x_dev: ES58X device.</div><div class='add'>+ * @raw_cmd: pointer to the buffer we want to copy.</div><div class='add'>+ * @raw_cmd_len: length of @raw_cmd.</div><div class='add'>+ *</div><div class='add'>+ * Under some rare conditions, we might get incorrect URBs from the</div><div class='add'>+ * device. From our observations, one of the valid URB gets replaced</div><div class='add'>+ * by one from the past. The full root cause is not identified.</div><div class='add'>+ *</div><div class='add'>+ * This function looks for the next start of frame in the urb buffer</div><div class='add'>+ * in order to try to recover.</div><div class='add'>+ *</div><div class='add'>+ * Such behavior was not observed on the devices of the ES58X FD</div><div class='add'>+ * family and only seems to impact the ES581.4.</div><div class='add'>+ *</div><div class='add'>+ * Return: the number of bytes dropped on success, -EBADMSG if recovery failed.</div><div class='add'>+ */</div><div class='add'>+static int es58x_split_urb_try_recovery(struct es58x_device *es58x_dev,</div><div class='add'>+					u8 *raw_cmd, size_t raw_cmd_len)</div><div class='add'>+{</div><div class='add'>+	union es58x_urb_cmd *urb_cmd;</div><div class='add'>+	signed int urb_cmd_len;</div><div class='add'>+	u16 sof;</div><div class='add'>+	int dropped_bytes = 0;</div><div class='add'>+</div><div class='add'>+	es58x_increment_rx_errors(es58x_dev);</div><div class='add'>+</div><div class='add'>+	while (raw_cmd_len &gt; sizeof(sof)) {</div><div class='add'>+		urb_cmd = (union es58x_urb_cmd *)raw_cmd;</div><div class='add'>+		sof = get_unaligned_le16(&amp;urb_cmd-&gt;sof);</div><div class='add'>+</div><div class='add'>+		if (sof == es58x_dev-&gt;param-&gt;rx_start_of_frame) {</div><div class='add'>+			urb_cmd_len = es58x_check_rx_urb(es58x_dev,</div><div class='add'>+							 urb_cmd, raw_cmd_len);</div><div class='add'>+			if ((urb_cmd_len == -ENODATA) || urb_cmd_len &gt; 0) {</div><div class='add'>+				dev_info_ratelimited(es58x_dev-&gt;dev,</div><div class='add'>+						     "Recovery successful! Dropped %d bytes (urb_cmd_len: %d)\n",</div><div class='add'>+						     dropped_bytes,</div><div class='add'>+						     urb_cmd_len);</div><div class='add'>+				return dropped_bytes;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		raw_cmd++;</div><div class='add'>+		raw_cmd_len--;</div><div class='add'>+		dropped_bytes++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_warn_ratelimited(es58x_dev-&gt;dev, "%s: Recovery failed\n", __func__);</div><div class='add'>+	return -EBADMSG;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_handle_incomplete_cmd() - Reconstitute an URB command from</div><div class='add'>+ *	different URB pieces.</div><div class='add'>+ * @es58x_dev: ES58X device.</div><div class='add'>+ * @urb: last urb buffer received.</div><div class='add'>+ *</div><div class='add'>+ * The device might split the URB commands in an arbitrary amount of</div><div class='add'>+ * pieces. This function concatenates those in an URB buffer until a</div><div class='add'>+ * full URB command is reconstituted and consume it.</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ * number of bytes consumed from @urb if successful.</div><div class='add'>+ *</div><div class='add'>+ * -ENODATA if the URB command is still incomplete.</div><div class='add'>+ *</div><div class='add'>+ * -EBADMSG if the URB command is incorrect.</div><div class='add'>+ */</div><div class='add'>+static signed int es58x_handle_incomplete_cmd(struct es58x_device *es58x_dev,</div><div class='add'>+					      struct urb *urb)</div><div class='add'>+{</div><div class='add'>+	size_t cpy_len;</div><div class='add'>+	signed int urb_cmd_len, tmp_cmd_buf_len, ret;</div><div class='add'>+</div><div class='add'>+	tmp_cmd_buf_len = es58x_dev-&gt;rx_cmd_buf_len;</div><div class='add'>+	cpy_len = min_t(int, es58x_dev-&gt;param-&gt;rx_urb_cmd_max_len -</div><div class='add'>+			es58x_dev-&gt;rx_cmd_buf_len, urb-&gt;actual_length);</div><div class='add'>+	ret = es58x_copy_to_cmd_buf(es58x_dev, urb-&gt;transfer_buffer, cpy_len);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	urb_cmd_len = es58x_check_rx_urb(es58x_dev, &amp;es58x_dev-&gt;rx_cmd_buf,</div><div class='add'>+					 es58x_dev-&gt;rx_cmd_buf_len);</div><div class='add'>+	if (urb_cmd_len == -ENODATA) {</div><div class='add'>+		return -ENODATA;</div><div class='add'>+	} else if (urb_cmd_len &lt; 0) {</div><div class='add'>+		dev_err_ratelimited(es58x_dev-&gt;dev,</div><div class='add'>+				    "Could not reconstitute incomplete command from previous URB, dropping %d bytes\n",</div><div class='add'>+				    tmp_cmd_buf_len + urb-&gt;actual_length);</div><div class='add'>+		dev_err_ratelimited(es58x_dev-&gt;dev,</div><div class='add'>+				    "Error code: %pe, es58x_dev-&gt;rx_cmd_buf_len: %d, urb-&gt;actual_length: %u\n",</div><div class='add'>+				    ERR_PTR(urb_cmd_len),</div><div class='add'>+				    tmp_cmd_buf_len, urb-&gt;actual_length);</div><div class='add'>+		es58x_print_hex_dump(&amp;es58x_dev-&gt;rx_cmd_buf, tmp_cmd_buf_len);</div><div class='add'>+		es58x_print_hex_dump(urb-&gt;transfer_buffer, urb-&gt;actual_length);</div><div class='add'>+		return urb-&gt;actual_length;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	es58x_handle_urb_cmd(es58x_dev, &amp;es58x_dev-&gt;rx_cmd_buf);</div><div class='add'>+	return urb_cmd_len - tmp_cmd_buf_len;	/* consumed length */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_split_urb() - Cut the received URB in individual URB commands.</div><div class='add'>+ * @es58x_dev: ES58X device.</div><div class='add'>+ * @urb: last urb buffer received.</div><div class='add'>+ *</div><div class='add'>+ * The device might send urb in bulk format (i.e. several URB commands</div><div class='add'>+ * concatenated together). This function will split all the commands</div><div class='add'>+ * contained in the urb.</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ * number of bytes consumed from @urb if successful.</div><div class='add'>+ *</div><div class='add'>+ * -ENODATA if the URB command is incomplete.</div><div class='add'>+ *</div><div class='add'>+ * -EBADMSG if the URB command is incorrect.</div><div class='add'>+ */</div><div class='add'>+static signed int es58x_split_urb(struct es58x_device *es58x_dev,</div><div class='add'>+				  struct urb *urb)</div><div class='add'>+{</div><div class='add'>+	union es58x_urb_cmd *urb_cmd;</div><div class='add'>+	u8 *raw_cmd = urb-&gt;transfer_buffer;</div><div class='add'>+	s32 raw_cmd_len = urb-&gt;actual_length;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (es58x_dev-&gt;rx_cmd_buf_len != 0) {</div><div class='add'>+		ret = es58x_handle_incomplete_cmd(es58x_dev, urb);</div><div class='add'>+		if (ret != -ENODATA)</div><div class='add'>+			es58x_dev-&gt;rx_cmd_buf_len = 0;</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		raw_cmd += ret;</div><div class='add'>+		raw_cmd_len -= ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	while (raw_cmd_len &gt; 0) {</div><div class='add'>+		if (raw_cmd[0] == ES58X_HEARTBEAT) {</div><div class='add'>+			raw_cmd++;</div><div class='add'>+			raw_cmd_len--;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+		urb_cmd = (union es58x_urb_cmd *)raw_cmd;</div><div class='add'>+		ret = es58x_check_rx_urb(es58x_dev, urb_cmd, raw_cmd_len);</div><div class='add'>+		if (ret &gt; 0) {</div><div class='add'>+			es58x_handle_urb_cmd(es58x_dev, urb_cmd);</div><div class='add'>+		} else if (ret == -ENODATA) {</div><div class='add'>+			es58x_copy_to_cmd_buf(es58x_dev, raw_cmd, raw_cmd_len);</div><div class='add'>+			return -ENODATA;</div><div class='add'>+		} else if (ret &lt; 0) {</div><div class='add'>+			ret = es58x_split_urb_try_recovery(es58x_dev, raw_cmd,</div><div class='add'>+							   raw_cmd_len);</div><div class='add'>+			if (ret &lt; 0)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='add'>+		raw_cmd += ret;</div><div class='add'>+		raw_cmd_len -= ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_read_bulk_callback() - Callback for reading data from device.</div><div class='add'>+ * @urb: last urb buffer received.</div><div class='add'>+ *</div><div class='add'>+ * This function gets eventually called each time an URB is received</div><div class='add'>+ * from the ES58X device.</div><div class='add'>+ *</div><div class='add'>+ * Checks urb status, calls read function and resubmits urb read</div><div class='add'>+ * operation.</div><div class='add'>+ */</div><div class='add'>+static void es58x_read_bulk_callback(struct urb *urb)</div><div class='add'>+{</div><div class='add'>+	struct es58x_device *es58x_dev = urb-&gt;context;</div><div class='add'>+	const struct device *dev = es58x_dev-&gt;dev;</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	switch (urb-&gt;status) {</div><div class='add'>+	case 0:		/* success */</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case -EOVERFLOW:</div><div class='add'>+		dev_err_ratelimited(dev, "%s: error %pe\n",</div><div class='add'>+				    __func__, ERR_PTR(urb-&gt;status));</div><div class='add'>+		es58x_print_hex_dump_debug(urb-&gt;transfer_buffer,</div><div class='add'>+					   urb-&gt;transfer_buffer_length);</div><div class='add'>+		goto resubmit_urb;</div><div class='add'>+</div><div class='add'>+	case -EPROTO:</div><div class='add'>+		dev_warn_ratelimited(dev, "%s: error %pe. Device unplugged?\n",</div><div class='add'>+				     __func__, ERR_PTR(urb-&gt;status));</div><div class='add'>+		goto free_urb;</div><div class='add'>+</div><div class='add'>+	case -ENOENT:</div><div class='add'>+	case -EPIPE:</div><div class='add'>+		dev_err_ratelimited(dev, "%s: error %pe\n",</div><div class='add'>+				    __func__, ERR_PTR(urb-&gt;status));</div><div class='add'>+		goto free_urb;</div><div class='add'>+</div><div class='add'>+	case -ESHUTDOWN:</div><div class='add'>+		dev_dbg_ratelimited(dev, "%s: error %pe\n",</div><div class='add'>+				    __func__, ERR_PTR(urb-&gt;status));</div><div class='add'>+		goto free_urb;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		dev_err_ratelimited(dev, "%s: error %pe\n",</div><div class='add'>+				    __func__, ERR_PTR(urb-&gt;status));</div><div class='add'>+		goto resubmit_urb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = es58x_split_urb(es58x_dev, urb);</div><div class='add'>+	if ((ret != -ENODATA) &amp;&amp; ret &lt; 0) {</div><div class='add'>+		dev_err(es58x_dev-&gt;dev, "es58x_split_urb() returned error %pe",</div><div class='add'>+			ERR_PTR(ret));</div><div class='add'>+		es58x_print_hex_dump_debug(urb-&gt;transfer_buffer,</div><div class='add'>+					   urb-&gt;actual_length);</div><div class='add'>+</div><div class='add'>+		/* Because the urb command could not be parsed,</div><div class='add'>+		 * channel_id is not confirmed. Incrementing rx_errors</div><div class='add'>+		 * count of all channels.</div><div class='add'>+		 */</div><div class='add'>+		es58x_increment_rx_errors(es58x_dev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+ resubmit_urb:</div><div class='add'>+	ret = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='add'>+	if (ret == -ENODEV) {</div><div class='add'>+		for (i = 0; i &lt; es58x_dev-&gt;num_can_ch; i++)</div><div class='add'>+			if (es58x_dev-&gt;netdev[i])</div><div class='add'>+				netif_device_detach(es58x_dev-&gt;netdev[i]);</div><div class='add'>+	} else if (ret)</div><div class='add'>+		dev_err_ratelimited(dev,</div><div class='add'>+				    "Failed resubmitting read bulk urb: %pe\n",</div><div class='add'>+				    ERR_PTR(ret));</div><div class='add'>+	return;</div><div class='add'>+</div><div class='add'>+ free_urb:</div><div class='add'>+	usb_free_coherent(urb-&gt;dev, urb-&gt;transfer_buffer_length,</div><div class='add'>+			  urb-&gt;transfer_buffer, urb-&gt;transfer_dma);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_write_bulk_callback() - Callback after writing data to the device.</div><div class='add'>+ * @urb: urb buffer which was previously submitted.</div><div class='add'>+ *</div><div class='add'>+ * This function gets eventually called each time an URB was sent to</div><div class='add'>+ * the ES58X device.</div><div class='add'>+ *</div><div class='add'>+ * Puts the @urb back to the urbs idle anchor and tries to restart the</div><div class='add'>+ * network queue.</div><div class='add'>+ */</div><div class='add'>+static void es58x_write_bulk_callback(struct urb *urb)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = urb-&gt;context;</div><div class='add'>+	struct es58x_device *es58x_dev = es58x_priv(netdev)-&gt;es58x_dev;</div><div class='add'>+</div><div class='add'>+	switch (urb-&gt;status) {</div><div class='add'>+	case 0:		/* success */</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case -EOVERFLOW:</div><div class='add'>+		if (net_ratelimit())</div><div class='add'>+			netdev_err(netdev, "%s: error %pe\n",</div><div class='add'>+				   __func__, ERR_PTR(urb-&gt;status));</div><div class='add'>+		es58x_print_hex_dump(urb-&gt;transfer_buffer,</div><div class='add'>+				     urb-&gt;transfer_buffer_length);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case -ENOENT:</div><div class='add'>+		if (net_ratelimit())</div><div class='add'>+			netdev_dbg(netdev, "%s: error %pe\n",</div><div class='add'>+				   __func__, ERR_PTR(urb-&gt;status));</div><div class='add'>+		usb_free_coherent(urb-&gt;dev,</div><div class='add'>+				  es58x_dev-&gt;param-&gt;tx_urb_cmd_max_len,</div><div class='add'>+				  urb-&gt;transfer_buffer, urb-&gt;transfer_dma);</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		if (net_ratelimit())</div><div class='add'>+			netdev_info(netdev, "%s: error %pe\n",</div><div class='add'>+				    __func__, ERR_PTR(urb-&gt;status));</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	usb_anchor_urb(urb, &amp;es58x_dev-&gt;tx_urbs_idle);</div><div class='add'>+	atomic_inc(&amp;es58x_dev-&gt;tx_urbs_idle_cnt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_alloc_urb() - Allocate memory for an URB and its transfer</div><div class='add'>+ *	buffer.</div><div class='add'>+ * @es58x_dev: ES58X device.</div><div class='add'>+ * @urb: URB to be allocated.</div><div class='add'>+ * @buf: used to return DMA address of buffer.</div><div class='add'>+ * @buf_len: requested buffer size.</div><div class='add'>+ * @mem_flags: affect whether allocation may block.</div><div class='add'>+ *</div><div class='add'>+ * Allocates an URB and its @transfer_buffer and set its @transfer_dma</div><div class='add'>+ * address.</div><div class='add'>+ *</div><div class='add'>+ * This function is used at start-up to allocate all RX URBs at once</div><div class='add'>+ * and during run time for TX URBs.</div><div class='add'>+ *</div><div class='add'>+ * Return: zero on success, -ENOMEM if no memory is available.</div><div class='add'>+ */</div><div class='add'>+static int es58x_alloc_urb(struct es58x_device *es58x_dev, struct urb **urb,</div><div class='add'>+			   u8 **buf, size_t buf_len, gfp_t mem_flags)</div><div class='add'>+{</div><div class='add'>+	*urb = usb_alloc_urb(0, mem_flags);</div><div class='add'>+	if (!*urb) {</div><div class='add'>+		dev_err(es58x_dev-&gt;dev, "No memory left for URBs\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*buf = usb_alloc_coherent(es58x_dev-&gt;udev, buf_len,</div><div class='add'>+				  mem_flags, &amp;(*urb)-&gt;transfer_dma);</div><div class='add'>+	if (!*buf) {</div><div class='add'>+		dev_err(es58x_dev-&gt;dev, "No memory left for USB buffer\n");</div><div class='add'>+		usb_free_urb(*urb);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	(*urb)-&gt;transfer_flags |= URB_NO_TRANSFER_DMA_MAP;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_get_tx_urb() - Get an URB for transmission.</div><div class='add'>+ * @es58x_dev: ES58X device.</div><div class='add'>+ *</div><div class='add'>+ * Gets an URB from the idle urbs anchor or allocate a new one if the</div><div class='add'>+ * anchor is empty.</div><div class='add'>+ *</div><div class='add'>+ * If there are more than ES58X_TX_URBS_MAX in the idle anchor, do</div><div class='add'>+ * some garbage collection. The garbage collection is done here</div><div class='add'>+ * instead of within es58x_write_bulk_callback() because</div><div class='add'>+ * usb_free_coherent() should not be used in IRQ context:</div><div class='add'>+ * c.f. WARN_ON(irqs_disabled()) in dma_free_attrs().</div><div class='add'>+ *</div><div class='add'>+ * Return: a pointer to an URB on success, NULL if no memory is</div><div class='add'>+ * available.</div><div class='add'>+ */</div><div class='add'>+static struct urb *es58x_get_tx_urb(struct es58x_device *es58x_dev)</div><div class='add'>+{</div><div class='add'>+	atomic_t *idle_cnt = &amp;es58x_dev-&gt;tx_urbs_idle_cnt;</div><div class='add'>+	struct urb *urb = usb_get_from_anchor(&amp;es58x_dev-&gt;tx_urbs_idle);</div><div class='add'>+</div><div class='add'>+	if (!urb) {</div><div class='add'>+		size_t tx_buf_len;</div><div class='add'>+		u8 *buf;</div><div class='add'>+</div><div class='add'>+		tx_buf_len = es58x_dev-&gt;param-&gt;tx_urb_cmd_max_len;</div><div class='add'>+		if (es58x_alloc_urb(es58x_dev, &amp;urb, &amp;buf, tx_buf_len,</div><div class='add'>+				    GFP_ATOMIC))</div><div class='add'>+			return NULL;</div><div class='add'>+</div><div class='add'>+		usb_fill_bulk_urb(urb, es58x_dev-&gt;udev, es58x_dev-&gt;tx_pipe,</div><div class='add'>+				  buf, tx_buf_len, es58x_write_bulk_callback,</div><div class='add'>+				  NULL);</div><div class='add'>+		return urb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	while (atomic_dec_return(idle_cnt) &gt; ES58X_TX_URBS_MAX) {</div><div class='add'>+		/* Garbage collector */</div><div class='add'>+		struct urb *tmp = usb_get_from_anchor(&amp;es58x_dev-&gt;tx_urbs_idle);</div><div class='add'>+</div><div class='add'>+		if (!tmp)</div><div class='add'>+			break;</div><div class='add'>+		usb_free_coherent(tmp-&gt;dev,</div><div class='add'>+				  es58x_dev-&gt;param-&gt;tx_urb_cmd_max_len,</div><div class='add'>+				  tmp-&gt;transfer_buffer, tmp-&gt;transfer_dma);</div><div class='add'>+		usb_free_urb(tmp);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return urb;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_submit_urb() - Send data to the device.</div><div class='add'>+ * @es58x_dev: ES58X device.</div><div class='add'>+ * @urb: URB to be sent.</div><div class='add'>+ * @netdev: CAN network device.</div><div class='add'>+ *</div><div class='add'>+ * Return: zero on success, errno when any error occurs.</div><div class='add'>+ */</div><div class='add'>+static int es58x_submit_urb(struct es58x_device *es58x_dev, struct urb *urb,</div><div class='add'>+			    struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	es58x_set_crc(urb-&gt;transfer_buffer, urb-&gt;transfer_buffer_length);</div><div class='add'>+	urb-&gt;context = netdev;</div><div class='add'>+	usb_anchor_urb(urb, &amp;es58x_dev-&gt;tx_urbs_busy);</div><div class='add'>+	ret = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(netdev, "%s: USB send urb failure: %pe\n",</div><div class='add'>+			   __func__, ERR_PTR(ret));</div><div class='add'>+		usb_unanchor_urb(urb);</div><div class='add'>+		usb_free_coherent(urb-&gt;dev,</div><div class='add'>+				  es58x_dev-&gt;param-&gt;tx_urb_cmd_max_len,</div><div class='add'>+				  urb-&gt;transfer_buffer, urb-&gt;transfer_dma);</div><div class='add'>+	}</div><div class='add'>+	usb_free_urb(urb);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_send_msg() - Prepare an URB and submit it.</div><div class='add'>+ * @es58x_dev: ES58X device.</div><div class='add'>+ * @cmd_type: Command type.</div><div class='add'>+ * @cmd_id: Command ID.</div><div class='add'>+ * @msg: ES58X message to be sent.</div><div class='add'>+ * @msg_len: Length of @msg.</div><div class='add'>+ * @channel_idx: Index of the network device.</div><div class='add'>+ *</div><div class='add'>+ * Creates an URB command from a given message, sets the header and the</div><div class='add'>+ * CRC and then submits it.</div><div class='add'>+ *</div><div class='add'>+ * Return: zero on success, errno when any error occurs.</div><div class='add'>+ */</div><div class='add'>+int es58x_send_msg(struct es58x_device *es58x_dev, u8 cmd_type, u8 cmd_id,</div><div class='add'>+		   const void *msg, u16 msg_len, int channel_idx)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	union es58x_urb_cmd *urb_cmd;</div><div class='add'>+	struct urb *urb;</div><div class='add'>+	int urb_cmd_len;</div><div class='add'>+</div><div class='add'>+	if (channel_idx == ES58X_CHANNEL_IDX_NA)</div><div class='add'>+		netdev = es58x_dev-&gt;netdev[0];	/* Default to first channel */</div><div class='add'>+	else</div><div class='add'>+		netdev = es58x_dev-&gt;netdev[channel_idx];</div><div class='add'>+</div><div class='add'>+	urb_cmd_len = es58x_get_urb_cmd_len(es58x_dev, msg_len);</div><div class='add'>+	if (urb_cmd_len &gt; es58x_dev-&gt;param-&gt;tx_urb_cmd_max_len)</div><div class='add'>+		return -EOVERFLOW;</div><div class='add'>+</div><div class='add'>+	urb = es58x_get_tx_urb(es58x_dev);</div><div class='add'>+	if (!urb)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	urb_cmd = urb-&gt;transfer_buffer;</div><div class='add'>+	es58x_dev-&gt;ops-&gt;fill_urb_header(urb_cmd, cmd_type, cmd_id,</div><div class='add'>+					channel_idx, msg_len);</div><div class='add'>+	memcpy(&amp;urb_cmd-&gt;raw_cmd[es58x_dev-&gt;param-&gt;urb_cmd_header_len],</div><div class='add'>+	       msg, msg_len);</div><div class='add'>+	urb-&gt;transfer_buffer_length = urb_cmd_len;</div><div class='add'>+</div><div class='add'>+	return es58x_submit_urb(es58x_dev, urb, netdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_alloc_rx_urbs() - Allocate RX URBs.</div><div class='add'>+ * @es58x_dev: ES58X device.</div><div class='add'>+ *</div><div class='add'>+ * Allocate URBs for reception and anchor them.</div><div class='add'>+ *</div><div class='add'>+ * Return: zero on success, errno when any error occurs.</div><div class='add'>+ */</div><div class='add'>+static int es58x_alloc_rx_urbs(struct es58x_device *es58x_dev)</div><div class='add'>+{</div><div class='add'>+	const struct device *dev = es58x_dev-&gt;dev;</div><div class='add'>+	const struct es58x_parameters *param = es58x_dev-&gt;param;</div><div class='add'>+	u16 rx_buf_len = usb_maxpacket(es58x_dev-&gt;udev, es58x_dev-&gt;rx_pipe);</div><div class='add'>+	struct urb *urb;</div><div class='add'>+	u8 *buf;</div><div class='add'>+	int i;</div><div class='add'>+	int ret = -EINVAL;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; param-&gt;rx_urb_max; i++) {</div><div class='add'>+		ret = es58x_alloc_urb(es58x_dev, &amp;urb, &amp;buf, rx_buf_len,</div><div class='add'>+				      GFP_KERNEL);</div><div class='add'>+		if (ret)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		usb_fill_bulk_urb(urb, es58x_dev-&gt;udev, es58x_dev-&gt;rx_pipe,</div><div class='add'>+				  buf, rx_buf_len, es58x_read_bulk_callback,</div><div class='add'>+				  es58x_dev);</div><div class='add'>+		usb_anchor_urb(urb, &amp;es58x_dev-&gt;rx_urbs);</div><div class='add'>+</div><div class='add'>+		ret = usb_submit_urb(urb, GFP_KERNEL);</div><div class='add'>+		if (ret) {</div><div class='add'>+			usb_unanchor_urb(urb);</div><div class='add'>+			usb_free_coherent(es58x_dev-&gt;udev, rx_buf_len,</div><div class='add'>+					  buf, urb-&gt;transfer_dma);</div><div class='add'>+			usb_free_urb(urb);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		usb_free_urb(urb);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (i == 0) {</div><div class='add'>+		dev_err(dev, "%s: Could not setup any rx URBs\n", __func__);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	dev_dbg(dev, "%s: Allocated %d rx URBs each of size %u\n",</div><div class='add'>+		__func__, i, rx_buf_len);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_free_urbs() - Free all the TX and RX URBs.</div><div class='add'>+ * @es58x_dev: ES58X device.</div><div class='add'>+ */</div><div class='add'>+static void es58x_free_urbs(struct es58x_device *es58x_dev)</div><div class='add'>+{</div><div class='add'>+	struct urb *urb;</div><div class='add'>+</div><div class='add'>+	if (!usb_wait_anchor_empty_timeout(&amp;es58x_dev-&gt;tx_urbs_busy, 1000)) {</div><div class='add'>+		dev_err(es58x_dev-&gt;dev, "%s: Timeout, some TX urbs still remain\n",</div><div class='add'>+			__func__);</div><div class='add'>+		usb_kill_anchored_urbs(&amp;es58x_dev-&gt;tx_urbs_busy);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	while ((urb = usb_get_from_anchor(&amp;es58x_dev-&gt;tx_urbs_idle)) != NULL) {</div><div class='add'>+		usb_free_coherent(urb-&gt;dev, es58x_dev-&gt;param-&gt;tx_urb_cmd_max_len,</div><div class='add'>+				  urb-&gt;transfer_buffer, urb-&gt;transfer_dma);</div><div class='add'>+		usb_free_urb(urb);</div><div class='add'>+		atomic_dec(&amp;es58x_dev-&gt;tx_urbs_idle_cnt);</div><div class='add'>+	}</div><div class='add'>+	if (atomic_read(&amp;es58x_dev-&gt;tx_urbs_idle_cnt))</div><div class='add'>+		dev_err(es58x_dev-&gt;dev,</div><div class='add'>+			"All idle urbs were freed but tx_urb_idle_cnt is %d\n",</div><div class='add'>+			atomic_read(&amp;es58x_dev-&gt;tx_urbs_idle_cnt));</div><div class='add'>+</div><div class='add'>+	usb_kill_anchored_urbs(&amp;es58x_dev-&gt;rx_urbs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_open() - Enable the network device.</div><div class='add'>+ * @netdev: CAN network device.</div><div class='add'>+ *</div><div class='add'>+ * Called when the network transitions to the up state. Allocate the</div><div class='add'>+ * URB resources if needed and open the channel.</div><div class='add'>+ *</div><div class='add'>+ * Return: zero on success, errno when any error occurs.</div><div class='add'>+ */</div><div class='add'>+static int es58x_open(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct es58x_device *es58x_dev = es58x_priv(netdev)-&gt;es58x_dev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!es58x_dev-&gt;opened_channel_cnt) {</div><div class='add'>+		ret = es58x_alloc_rx_urbs(es58x_dev);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		ret = es58x_set_realtime_diff_ns(es58x_dev);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto free_urbs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = open_candev(netdev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto free_urbs;</div><div class='add'>+</div><div class='add'>+	ret = es58x_dev-&gt;ops-&gt;enable_channel(es58x_priv(netdev));</div><div class='add'>+	if (ret)</div><div class='add'>+		goto free_urbs;</div><div class='add'>+</div><div class='add'>+	es58x_dev-&gt;opened_channel_cnt++;</div><div class='add'>+	netif_start_queue(netdev);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+</div><div class='add'>+ free_urbs:</div><div class='add'>+	if (!es58x_dev-&gt;opened_channel_cnt)</div><div class='add'>+		es58x_free_urbs(es58x_dev);</div><div class='add'>+	netdev_err(netdev, "%s: Could not open the network device: %pe\n",</div><div class='add'>+		   __func__, ERR_PTR(ret));</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_stop() - Disable the network device.</div><div class='add'>+ * @netdev: CAN network device.</div><div class='add'>+ *</div><div class='add'>+ * Called when the network transitions to the down state. If all the</div><div class='add'>+ * channels of the device are closed, free the URB resources which are</div><div class='add'>+ * not needed anymore.</div><div class='add'>+ *</div><div class='add'>+ * Return: zero on success, errno when any error occurs.</div><div class='add'>+ */</div><div class='add'>+static int es58x_stop(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct es58x_priv *priv = es58x_priv(netdev);</div><div class='add'>+	struct es58x_device *es58x_dev = priv-&gt;es58x_dev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(netdev);</div><div class='add'>+	ret = es58x_dev-&gt;ops-&gt;disable_channel(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='add'>+	es58x_can_reset_echo_fifo(netdev);</div><div class='add'>+	close_candev(netdev);</div><div class='add'>+</div><div class='add'>+	es58x_flush_pending_tx_msg(netdev);</div><div class='add'>+</div><div class='add'>+	es58x_dev-&gt;opened_channel_cnt--;</div><div class='add'>+	if (!es58x_dev-&gt;opened_channel_cnt)</div><div class='add'>+		es58x_free_urbs(es58x_dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_xmit_commit() - Send the bulk urb.</div><div class='add'>+ * @netdev: CAN network device.</div><div class='add'>+ *</div><div class='add'>+ * Do the bulk send. This function should be called only once by bulk</div><div class='add'>+ * transmission.</div><div class='add'>+ *</div><div class='add'>+ * Return: zero on success, errno when any error occurs.</div><div class='add'>+ */</div><div class='add'>+static int es58x_xmit_commit(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct es58x_priv *priv = es58x_priv(netdev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!es58x_is_can_state_active(netdev))</div><div class='add'>+		return -ENETDOWN;</div><div class='add'>+</div><div class='add'>+	if (es58x_is_echo_skb_threshold_reached(priv))</div><div class='add'>+		netif_stop_queue(netdev);</div><div class='add'>+</div><div class='add'>+	ret = es58x_submit_urb(priv-&gt;es58x_dev, priv-&gt;tx_urb, netdev);</div><div class='add'>+	if (ret == 0)</div><div class='add'>+		priv-&gt;tx_urb = NULL;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_xmit_more() - Can we put more packets?</div><div class='add'>+ * @priv: ES58X private parameters related to the network device.</div><div class='add'>+ *</div><div class='add'>+ * Return: true if we can put more, false if it is time to send.</div><div class='add'>+ */</div><div class='add'>+static bool es58x_xmit_more(struct es58x_priv *priv)</div><div class='add'>+{</div><div class='add'>+	unsigned int free_slots =</div><div class='add'>+	    priv-&gt;can.echo_skb_max - (priv-&gt;tx_head - priv-&gt;tx_tail);</div><div class='add'>+</div><div class='add'>+	return netdev_xmit_more() &amp;&amp; free_slots &gt; 0 &amp;&amp;</div><div class='add'>+		priv-&gt;tx_can_msg_cnt &lt; priv-&gt;es58x_dev-&gt;param-&gt;tx_bulk_max;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_start_xmit() - Transmit an skb.</div><div class='add'>+ * @skb: socket buffer of a CAN message.</div><div class='add'>+ * @netdev: CAN network device.</div><div class='add'>+ *</div><div class='add'>+ * Called when a packet needs to be transmitted.</div><div class='add'>+ *</div><div class='add'>+ * This function relies on Byte Queue Limits (BQL). The main benefit</div><div class='add'>+ * is to increase the throughput by allowing bulk transfers</div><div class='add'>+ * (c.f. xmit_more flag).</div><div class='add'>+ *</div><div class='add'>+ * Queues up to tx_bulk_max messages in &amp;tx_urb buffer and does</div><div class='add'>+ * a bulk send of all messages in one single URB.</div><div class='add'>+ *</div><div class='add'>+ * Return: NETDEV_TX_OK regardless of if we could transmit the @skb or</div><div class='add'>+ *	had to drop it.</div><div class='add'>+ */</div><div class='add'>+static netdev_tx_t es58x_start_xmit(struct sk_buff *skb,</div><div class='add'>+				    struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct es58x_priv *priv = es58x_priv(netdev);</div><div class='add'>+	struct es58x_device *es58x_dev = priv-&gt;es58x_dev;</div><div class='add'>+	unsigned int frame_len;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (can_dev_dropped_skb(netdev, skb)) {</div><div class='add'>+		if (priv-&gt;tx_urb)</div><div class='add'>+			goto xmit_commit;</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;tx_urb &amp;&amp; priv-&gt;tx_can_msg_is_fd != can_is_canfd_skb(skb)) {</div><div class='add'>+		/* Can not do bulk send with mixed CAN and CAN FD frames. */</div><div class='add'>+		ret = es58x_xmit_commit(netdev);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto drop_skb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;tx_urb) {</div><div class='add'>+		priv-&gt;tx_urb = es58x_get_tx_urb(es58x_dev);</div><div class='add'>+		if (!priv-&gt;tx_urb) {</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto drop_skb;</div><div class='add'>+		}</div><div class='add'>+		priv-&gt;tx_can_msg_cnt = 0;</div><div class='add'>+		priv-&gt;tx_can_msg_is_fd = can_is_canfd_skb(skb);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = es58x_dev-&gt;ops-&gt;tx_can_msg(priv, skb);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto drop_skb;</div><div class='add'>+</div><div class='add'>+	frame_len = can_skb_get_frame_len(skb);</div><div class='add'>+	ret = can_put_echo_skb(skb, netdev,</div><div class='add'>+			       priv-&gt;tx_head &amp; es58x_dev-&gt;param-&gt;fifo_mask,</div><div class='add'>+			       frame_len);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto xmit_failure;</div><div class='add'>+	netdev_sent_queue(netdev, frame_len);</div><div class='add'>+</div><div class='add'>+	priv-&gt;tx_head++;</div><div class='add'>+	priv-&gt;tx_can_msg_cnt++;</div><div class='add'>+</div><div class='add'>+ xmit_commit:</div><div class='add'>+	if (!es58x_xmit_more(priv)) {</div><div class='add'>+		ret = es58x_xmit_commit(netdev);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto xmit_failure;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+ drop_skb:</div><div class='add'>+	dev_kfree_skb(skb);</div><div class='add'>+	netdev-&gt;stats.tx_dropped++;</div><div class='add'>+ xmit_failure:</div><div class='add'>+	netdev_warn(netdev, "%s: send message failure: %pe\n",</div><div class='add'>+		    __func__, ERR_PTR(ret));</div><div class='add'>+	netdev-&gt;stats.tx_errors++;</div><div class='add'>+	es58x_flush_pending_tx_msg(netdev);</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops es58x_netdev_ops = {</div><div class='add'>+	.ndo_open = es58x_open,</div><div class='add'>+	.ndo_stop = es58x_stop,</div><div class='add'>+	.ndo_start_xmit = es58x_start_xmit,</div><div class='add'>+	.ndo_hwtstamp_get = can_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set = can_hwtstamp_set,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops es58x_ethtool_ops = {</div><div class='add'>+	.get_ts_info = can_ethtool_op_get_ts_info_hwts,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_set_mode() - Change network device mode.</div><div class='add'>+ * @netdev: CAN network device.</div><div class='add'>+ * @mode: either %CAN_MODE_START, %CAN_MODE_STOP or %CAN_MODE_SLEEP</div><div class='add'>+ *</div><div class='add'>+ * Currently, this function is only used to stop and restart the</div><div class='add'>+ * channel during a bus off event (c.f. es58x_rx_err_msg() and</div><div class='add'>+ * drivers/net/can/dev.c:can_restart() which are the two only</div><div class='add'>+ * callers).</div><div class='add'>+ *</div><div class='add'>+ * Return: zero on success, errno when any error occurs.</div><div class='add'>+ */</div><div class='add'>+static int es58x_set_mode(struct net_device *netdev, enum can_mode mode)</div><div class='add'>+{</div><div class='add'>+	struct es58x_priv *priv = es58x_priv(netdev);</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case CAN_MODE_START:</div><div class='add'>+		switch (priv-&gt;can.state) {</div><div class='add'>+		case CAN_STATE_BUS_OFF:</div><div class='add'>+			return priv-&gt;es58x_dev-&gt;ops-&gt;enable_channel(priv);</div><div class='add'>+</div><div class='add'>+		case CAN_STATE_STOPPED:</div><div class='add'>+			return es58x_open(netdev);</div><div class='add'>+</div><div class='add'>+		case CAN_STATE_ERROR_ACTIVE:</div><div class='add'>+		case CAN_STATE_ERROR_WARNING:</div><div class='add'>+		case CAN_STATE_ERROR_PASSIVE:</div><div class='add'>+		default:</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+	case CAN_MODE_STOP:</div><div class='add'>+		switch (priv-&gt;can.state) {</div><div class='add'>+		case CAN_STATE_STOPPED:</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		case CAN_STATE_ERROR_ACTIVE:</div><div class='add'>+		case CAN_STATE_ERROR_WARNING:</div><div class='add'>+		case CAN_STATE_ERROR_PASSIVE:</div><div class='add'>+		case CAN_STATE_BUS_OFF:</div><div class='add'>+		default:</div><div class='add'>+			return priv-&gt;es58x_dev-&gt;ops-&gt;disable_channel(priv);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+	case CAN_MODE_SLEEP:</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_init_priv() - Initialize private parameters.</div><div class='add'>+ * @es58x_dev: ES58X device.</div><div class='add'>+ * @priv: ES58X private parameters related to the network device.</div><div class='add'>+ * @channel_idx: Index of the network device.</div><div class='add'>+ *</div><div class='add'>+ * Return: zero on success, errno if devlink port could not be</div><div class='add'>+ *	properly registered.</div><div class='add'>+ */</div><div class='add'>+static int es58x_init_priv(struct es58x_device *es58x_dev,</div><div class='add'>+			   struct es58x_priv *priv, int channel_idx)</div><div class='add'>+{</div><div class='add'>+	struct devlink_port_attrs attrs = {</div><div class='add'>+		.flavour = DEVLINK_PORT_FLAVOUR_PHYSICAL,</div><div class='add'>+	};</div><div class='add'>+	const struct es58x_parameters *param = es58x_dev-&gt;param;</div><div class='add'>+	struct can_priv *can = &amp;priv-&gt;can;</div><div class='add'>+</div><div class='add'>+	priv-&gt;es58x_dev = es58x_dev;</div><div class='add'>+	priv-&gt;channel_idx = channel_idx;</div><div class='add'>+	priv-&gt;tx_urb = NULL;</div><div class='add'>+	priv-&gt;tx_can_msg_cnt = 0;</div><div class='add'>+</div><div class='add'>+	can-&gt;bittiming_const = param-&gt;bittiming_const;</div><div class='add'>+	if (param-&gt;ctrlmode_supported &amp; CAN_CTRLMODE_FD) {</div><div class='add'>+		can-&gt;fd.data_bittiming_const = param-&gt;data_bittiming_const;</div><div class='add'>+		can-&gt;fd.tdc_const = param-&gt;tdc_const;</div><div class='add'>+	}</div><div class='add'>+	can-&gt;bitrate_max = param-&gt;bitrate_max;</div><div class='add'>+	can-&gt;clock = param-&gt;clock;</div><div class='add'>+	can-&gt;state = CAN_STATE_STOPPED;</div><div class='add'>+	can-&gt;ctrlmode_supported = param-&gt;ctrlmode_supported;</div><div class='add'>+	can-&gt;do_set_mode = es58x_set_mode;</div><div class='add'>+</div><div class='add'>+	devlink_port_attrs_set(&amp;priv-&gt;devlink_port, &amp;attrs);</div><div class='add'>+	return devlink_port_register(priv_to_devlink(es58x_dev),</div><div class='add'>+				     &amp;priv-&gt;devlink_port, channel_idx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_init_netdev() - Initialize the network device.</div><div class='add'>+ * @es58x_dev: ES58X device.</div><div class='add'>+ * @channel_idx: Index of the network device.</div><div class='add'>+ *</div><div class='add'>+ * Return: zero on success, errno when any error occurs.</div><div class='add'>+ */</div><div class='add'>+static int es58x_init_netdev(struct es58x_device *es58x_dev, int channel_idx)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	struct device *dev = es58x_dev-&gt;dev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	netdev = alloc_candev(sizeof(struct es58x_priv),</div><div class='add'>+			      es58x_dev-&gt;param-&gt;fifo_mask + 1);</div><div class='add'>+	if (!netdev) {</div><div class='add'>+		dev_err(dev, "Could not allocate candev\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+	SET_NETDEV_DEV(netdev, dev);</div><div class='add'>+	es58x_dev-&gt;netdev[channel_idx] = netdev;</div><div class='add'>+	ret = es58x_init_priv(es58x_dev, es58x_priv(netdev), channel_idx);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto free_candev;</div><div class='add'>+	SET_NETDEV_DEVLINK_PORT(netdev, &amp;es58x_priv(netdev)-&gt;devlink_port);</div><div class='add'>+</div><div class='add'>+	netdev-&gt;netdev_ops = &amp;es58x_netdev_ops;</div><div class='add'>+	netdev-&gt;ethtool_ops = &amp;es58x_ethtool_ops;</div><div class='add'>+	netdev-&gt;flags |= IFF_ECHO;	/* We support local echo */</div><div class='add'>+	netdev-&gt;dev_port = channel_idx;</div><div class='add'>+</div><div class='add'>+	ret = register_candev(netdev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto devlink_port_unregister;</div><div class='add'>+</div><div class='add'>+	netdev_queue_set_dql_min_limit(netdev_get_tx_queue(netdev, 0),</div><div class='add'>+				       es58x_dev-&gt;param-&gt;dql_min_limit);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+</div><div class='add'>+ devlink_port_unregister:</div><div class='add'>+	devlink_port_unregister(&amp;es58x_priv(netdev)-&gt;devlink_port);</div><div class='add'>+ free_candev:</div><div class='add'>+	es58x_dev-&gt;netdev[channel_idx] = NULL;</div><div class='add'>+	free_candev(netdev);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_free_netdevs() - Release all network resources of the device.</div><div class='add'>+ * @es58x_dev: ES58X device.</div><div class='add'>+ */</div><div class='add'>+static void es58x_free_netdevs(struct es58x_device *es58x_dev)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; es58x_dev-&gt;num_can_ch; i++) {</div><div class='add'>+		struct net_device *netdev = es58x_dev-&gt;netdev[i];</div><div class='add'>+</div><div class='add'>+		if (!netdev)</div><div class='add'>+			continue;</div><div class='add'>+		unregister_candev(netdev);</div><div class='add'>+		devlink_port_unregister(&amp;es58x_priv(netdev)-&gt;devlink_port);</div><div class='add'>+		es58x_dev-&gt;netdev[i] = NULL;</div><div class='add'>+		free_candev(netdev);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_init_es58x_dev() - Initialize the ES58X device.</div><div class='add'>+ * @intf: USB interface.</div><div class='add'>+ * @driver_info: Quirks of the device.</div><div class='add'>+ *</div><div class='add'>+ * Return: pointer to an ES58X device on success, error pointer when</div><div class='add'>+ *	any error occurs.</div><div class='add'>+ */</div><div class='add'>+static struct es58x_device *es58x_init_es58x_dev(struct usb_interface *intf,</div><div class='add'>+						 kernel_ulong_t driver_info)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;intf-&gt;dev;</div><div class='add'>+	struct es58x_device *es58x_dev;</div><div class='add'>+	struct devlink *devlink;</div><div class='add'>+	const struct es58x_parameters *param;</div><div class='add'>+	const struct es58x_operators *ops;</div><div class='add'>+	struct usb_device *udev = interface_to_usbdev(intf);</div><div class='add'>+	struct usb_endpoint_descriptor *ep_in, *ep_out;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	dev_info(dev, "Starting %s %s (Serial Number %s)\n",</div><div class='add'>+		 udev-&gt;manufacturer, udev-&gt;product, udev-&gt;serial);</div><div class='add'>+</div><div class='add'>+	ret = usb_find_common_endpoints(intf-&gt;cur_altsetting, &amp;ep_in, &amp;ep_out,</div><div class='add'>+					NULL, NULL);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ERR_PTR(ret);</div><div class='add'>+</div><div class='add'>+	if (driver_info &amp; ES58X_FD_FAMILY) {</div><div class='add'>+		param = &amp;es58x_fd_param;</div><div class='add'>+		ops = &amp;es58x_fd_ops;</div><div class='add'>+	} else {</div><div class='add'>+		param = &amp;es581_4_param;</div><div class='add'>+		ops = &amp;es581_4_ops;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	devlink = devlink_alloc(&amp;es58x_dl_ops, es58x_sizeof_es58x_device(param),</div><div class='add'>+				dev);</div><div class='add'>+	if (!devlink)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	es58x_dev = devlink_priv(devlink);</div><div class='add'>+	es58x_dev-&gt;param = param;</div><div class='add'>+	es58x_dev-&gt;ops = ops;</div><div class='add'>+	es58x_dev-&gt;dev = dev;</div><div class='add'>+	es58x_dev-&gt;udev = udev;</div><div class='add'>+</div><div class='add'>+	if (driver_info &amp; ES58X_DUAL_CHANNEL)</div><div class='add'>+		es58x_dev-&gt;num_can_ch = 2;</div><div class='add'>+	else</div><div class='add'>+		es58x_dev-&gt;num_can_ch = 1;</div><div class='add'>+</div><div class='add'>+	init_usb_anchor(&amp;es58x_dev-&gt;rx_urbs);</div><div class='add'>+	init_usb_anchor(&amp;es58x_dev-&gt;tx_urbs_idle);</div><div class='add'>+	init_usb_anchor(&amp;es58x_dev-&gt;tx_urbs_busy);</div><div class='add'>+	atomic_set(&amp;es58x_dev-&gt;tx_urbs_idle_cnt, 0);</div><div class='add'>+	usb_set_intfdata(intf, es58x_dev);</div><div class='add'>+</div><div class='add'>+	es58x_dev-&gt;rx_pipe = usb_rcvbulkpipe(es58x_dev-&gt;udev,</div><div class='add'>+					     ep_in-&gt;bEndpointAddress);</div><div class='add'>+	es58x_dev-&gt;tx_pipe = usb_sndbulkpipe(es58x_dev-&gt;udev,</div><div class='add'>+					     ep_out-&gt;bEndpointAddress);</div><div class='add'>+</div><div class='add'>+	return es58x_dev;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_probe() - Initialize the USB device.</div><div class='add'>+ * @intf: USB interface.</div><div class='add'>+ * @id: USB device ID.</div><div class='add'>+ *</div><div class='add'>+ * Return: zero on success, -ENODEV if the interface is not supported</div><div class='add'>+ * or errno when any other error occurs.</div><div class='add'>+ */</div><div class='add'>+static int es58x_probe(struct usb_interface *intf,</div><div class='add'>+		       const struct usb_device_id *id)</div><div class='add'>+{</div><div class='add'>+	struct es58x_device *es58x_dev;</div><div class='add'>+	int ch_idx;</div><div class='add'>+</div><div class='add'>+	es58x_dev = es58x_init_es58x_dev(intf, id-&gt;driver_info);</div><div class='add'>+	if (IS_ERR(es58x_dev))</div><div class='add'>+		return PTR_ERR(es58x_dev);</div><div class='add'>+</div><div class='add'>+	es58x_parse_product_info(es58x_dev);</div><div class='add'>+	devlink_register(priv_to_devlink(es58x_dev));</div><div class='add'>+</div><div class='add'>+	for (ch_idx = 0; ch_idx &lt; es58x_dev-&gt;num_can_ch; ch_idx++) {</div><div class='add'>+		int ret = es58x_init_netdev(es58x_dev, ch_idx);</div><div class='add'>+</div><div class='add'>+		if (ret) {</div><div class='add'>+			es58x_free_netdevs(es58x_dev);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_disconnect() - Disconnect the USB device.</div><div class='add'>+ * @intf: USB interface</div><div class='add'>+ *</div><div class='add'>+ * Called by the usb core when driver is unloaded or device is</div><div class='add'>+ * removed.</div><div class='add'>+ */</div><div class='add'>+static void es58x_disconnect(struct usb_interface *intf)</div><div class='add'>+{</div><div class='add'>+	struct es58x_device *es58x_dev = usb_get_intfdata(intf);</div><div class='add'>+</div><div class='add'>+	dev_info(&amp;intf-&gt;dev, "Disconnecting %s %s\n",</div><div class='add'>+		 es58x_dev-&gt;udev-&gt;manufacturer, es58x_dev-&gt;udev-&gt;product);</div><div class='add'>+</div><div class='add'>+	devlink_unregister(priv_to_devlink(es58x_dev));</div><div class='add'>+	es58x_free_netdevs(es58x_dev);</div><div class='add'>+	es58x_free_urbs(es58x_dev);</div><div class='add'>+	devlink_free(priv_to_devlink(es58x_dev));</div><div class='add'>+	usb_set_intfdata(intf, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct usb_driver es58x_driver = {</div><div class='add'>+	.name = KBUILD_MODNAME,</div><div class='add'>+	.probe = es58x_probe,</div><div class='add'>+	.disconnect = es58x_disconnect,</div><div class='add'>+	.id_table = es58x_id_table</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_usb_driver(es58x_driver);</div><div class='head'>diff --git a/drivers/net/can/usb/etas_es58x/es58x_core.h b/drivers/net/can/usb/etas_es58x/es58x_core.h<br/>new file mode 100644<br/>index 000000000000..2e183bdeedd7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/etas_es58x/es58x_core.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/etas_es58x/es58x_core.h</a></div><div class='hunk'>@@ -0,0 +1,750 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+</div><div class='add'>+/* Driver for ETAS GmbH ES58X USB CAN(-FD) Bus Interfaces.</div><div class='add'>+ *</div><div class='add'>+ * File es58x_core.h: All common definitions and declarations.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2019 Robert Bosch Engineering and Business Solutions. All rights reserved.</div><div class='add'>+ * Copyright (c) 2020 ETAS K.K.. All rights reserved.</div><div class='add'>+ * Copyright (c) 2020-2022 Vincent Mailhol &lt;mailhol.vincent@wanadoo.fr&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __ES58X_COMMON_H__</div><div class='add'>+#define __ES58X_COMMON_H__</div><div class='add'>+</div><div class='add'>+#include &lt;linux/can.h&gt;</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/usb.h&gt;</div><div class='add'>+#include &lt;net/devlink.h&gt;</div><div class='add'>+</div><div class='add'>+#include "es581_4.h"</div><div class='add'>+#include "es58x_fd.h"</div><div class='add'>+</div><div class='add'>+/* Driver constants */</div><div class='add'>+#define ES58X_RX_URBS_MAX 5	/* Empirical value */</div><div class='add'>+#define ES58X_TX_URBS_MAX 6	/* Empirical value */</div><div class='add'>+</div><div class='add'>+#define ES58X_MAX(param)				\</div><div class='add'>+	(ES581_4_##param &gt; ES58X_FD_##param ?		\</div><div class='add'>+		ES581_4_##param : ES58X_FD_##param)</div><div class='add'>+#define ES58X_TX_BULK_MAX ES58X_MAX(TX_BULK_MAX)</div><div class='add'>+#define ES58X_RX_BULK_MAX ES58X_MAX(RX_BULK_MAX)</div><div class='add'>+#define ES58X_ECHO_BULK_MAX ES58X_MAX(ECHO_BULK_MAX)</div><div class='add'>+#define ES58X_NUM_CAN_CH_MAX ES58X_MAX(NUM_CAN_CH)</div><div class='add'>+</div><div class='add'>+/* Use this when channel index is irrelevant (e.g. device</div><div class='add'>+ * timestamp).</div><div class='add'>+ */</div><div class='add'>+#define ES58X_CHANNEL_IDX_NA 0xFF</div><div class='add'>+#define ES58X_EMPTY_MSG NULL</div><div class='add'>+</div><div class='add'>+/* Threshold on consecutive CAN_STATE_ERROR_PASSIVE. If we receive</div><div class='add'>+ * ES58X_CONSECUTIVE_ERR_PASSIVE_MAX times the event</div><div class='add'>+ * ES58X_ERR_CRTL_PASSIVE in a row without any successful RX or TX,</div><div class='add'>+ * we force the device to switch to CAN_STATE_BUS_OFF state.</div><div class='add'>+ */</div><div class='add'>+#define ES58X_CONSECUTIVE_ERR_PASSIVE_MAX 254</div><div class='add'>+</div><div class='add'>+/* A magic number sent by the ES581.4 to inform it is alive. */</div><div class='add'>+#define ES58X_HEARTBEAT 0x11</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * enum es58x_driver_info - Quirks of the device.</div><div class='add'>+ * @ES58X_DUAL_CHANNEL: Device has two CAN channels. If this flag is</div><div class='add'>+ *	not set, it is implied that the device has only one CAN</div><div class='add'>+ *	channel.</div><div class='add'>+ * @ES58X_FD_FAMILY: Device is CAN-FD capable. If this flag is not</div><div class='add'>+ *	set, the device only supports classical CAN.</div><div class='add'>+ */</div><div class='add'>+enum es58x_driver_info {</div><div class='add'>+	ES58X_DUAL_CHANNEL = BIT(0),</div><div class='add'>+	ES58X_FD_FAMILY = BIT(1)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum es58x_echo {</div><div class='add'>+	ES58X_ECHO_OFF = 0,</div><div class='add'>+	ES58X_ECHO_ON = 1</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * enum es58x_physical_layer - Type of the physical layer.</div><div class='add'>+ * @ES58X_PHYSICAL_LAYER_HIGH_SPEED: High-speed CAN (c.f. ISO</div><div class='add'>+ *	11898-2).</div><div class='add'>+ *</div><div class='add'>+ * Some products of the ETAS portfolio also support low-speed CAN</div><div class='add'>+ * (c.f. ISO 11898-3). However, all the devices in scope of this</div><div class='add'>+ * driver do not support the option, thus, the enum has only one</div><div class='add'>+ * member.</div><div class='add'>+ */</div><div class='add'>+enum es58x_physical_layer {</div><div class='add'>+	ES58X_PHYSICAL_LAYER_HIGH_SPEED = 1</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum es58x_samples_per_bit {</div><div class='add'>+	ES58X_SAMPLES_PER_BIT_ONE = 1,</div><div class='add'>+	ES58X_SAMPLES_PER_BIT_THREE = 2</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * enum es58x_sync_edge - Synchronization method.</div><div class='add'>+ * @ES58X_SYNC_EDGE_SINGLE: ISO CAN specification defines the use of a</div><div class='add'>+ *	single edge synchronization.  The synchronization should be</div><div class='add'>+ *	done on recessive to dominant level change.</div><div class='add'>+ *</div><div class='add'>+ * For information, ES582.1 and ES584.1 also support a double</div><div class='add'>+ * synchronization, requiring both recessive to dominant then dominant</div><div class='add'>+ * to recessive level change. However, this is not supported in</div><div class='add'>+ * SocketCAN framework, thus, the enum has only one member.</div><div class='add'>+ */</div><div class='add'>+enum es58x_sync_edge {</div><div class='add'>+	ES58X_SYNC_EDGE_SINGLE = 1</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * enum es58x_flag - CAN flags for RX/TX messages.</div><div class='add'>+ * @ES58X_FLAG_EFF: Extended Frame Format (EFF).</div><div class='add'>+ * @ES58X_FLAG_RTR: Remote Transmission Request (RTR).</div><div class='add'>+ * @ES58X_FLAG_FD_BRS: Bit rate switch (BRS): second bitrate for</div><div class='add'>+ *	payload data.</div><div class='add'>+ * @ES58X_FLAG_FD_ESI: Error State Indicator (ESI): tell if the</div><div class='add'>+ *	transmitting node is in error passive mode.</div><div class='add'>+ * @ES58X_FLAG_FD_DATA: CAN FD frame.</div><div class='add'>+ */</div><div class='add'>+enum es58x_flag {</div><div class='add'>+	ES58X_FLAG_EFF = BIT(0),</div><div class='add'>+	ES58X_FLAG_RTR = BIT(1),</div><div class='add'>+	ES58X_FLAG_FD_BRS = BIT(3),</div><div class='add'>+	ES58X_FLAG_FD_ESI = BIT(5),</div><div class='add'>+	ES58X_FLAG_FD_DATA = BIT(6)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * enum es58x_err - CAN error detection.</div><div class='add'>+ * @ES58X_ERR_OK: No errors.</div><div class='add'>+ * @ES58X_ERR_PROT_STUFF: Bit stuffing error: more than 5 consecutive</div><div class='add'>+ *	equal bits.</div><div class='add'>+ * @ES58X_ERR_PROT_FORM: Frame format error.</div><div class='add'>+ * @ES58X_ERR_ACK: Received no ACK on transmission.</div><div class='add'>+ * @ES58X_ERR_PROT_BIT: Single bit error.</div><div class='add'>+ * @ES58X_ERR_PROT_CRC: Incorrect 15, 17 or 21 bits CRC.</div><div class='add'>+ * @ES58X_ERR_PROT_BIT1: Unable to send recessive bit: tried to send</div><div class='add'>+ *	recessive bit 1 but monitored dominant bit 0.</div><div class='add'>+ * @ES58X_ERR_PROT_BIT0: Unable to send dominant bit: tried to send</div><div class='add'>+ *	dominant bit 0 but monitored recessive bit 1.</div><div class='add'>+ * @ES58X_ERR_PROT_OVERLOAD: Bus overload.</div><div class='add'>+ * @ES58X_ERR_PROT_UNSPEC: Unspecified.</div><div class='add'>+ *</div><div class='add'>+ * Please refer to ISO 11898-1:2015, section 10.11 "Error detection"</div><div class='add'>+ * and section 10.13 "Overload signaling" for additional details.</div><div class='add'>+ */</div><div class='add'>+enum es58x_err {</div><div class='add'>+	ES58X_ERR_OK = 0,</div><div class='add'>+	ES58X_ERR_PROT_STUFF = BIT(0),</div><div class='add'>+	ES58X_ERR_PROT_FORM = BIT(1),</div><div class='add'>+	ES58X_ERR_ACK = BIT(2),</div><div class='add'>+	ES58X_ERR_PROT_BIT = BIT(3),</div><div class='add'>+	ES58X_ERR_PROT_CRC = BIT(4),</div><div class='add'>+	ES58X_ERR_PROT_BIT1 = BIT(5),</div><div class='add'>+	ES58X_ERR_PROT_BIT0 = BIT(6),</div><div class='add'>+	ES58X_ERR_PROT_OVERLOAD = BIT(7),</div><div class='add'>+	ES58X_ERR_PROT_UNSPEC = BIT(31)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * enum es58x_event - CAN error codes returned by the device.</div><div class='add'>+ * @ES58X_EVENT_OK: No errors.</div><div class='add'>+ * @ES58X_EVENT_CRTL_ACTIVE: Active state: both TR and RX error count</div><div class='add'>+ *	is less than 128.</div><div class='add'>+ * @ES58X_EVENT_CRTL_PASSIVE: Passive state: either TX or RX error</div><div class='add'>+ *	count is greater than 127.</div><div class='add'>+ * @ES58X_EVENT_CRTL_WARNING: Warning state: either TX or RX error</div><div class='add'>+ *	count is greater than 96.</div><div class='add'>+ * @ES58X_EVENT_BUSOFF: Bus off.</div><div class='add'>+ * @ES58X_EVENT_SINGLE_WIRE: Lost connection on either CAN high or CAN</div><div class='add'>+ *	low.</div><div class='add'>+ *</div><div class='add'>+ * Please refer to ISO 11898-1:2015, section 12.1.4 "Rules of fault</div><div class='add'>+ * confinement" for additional details.</div><div class='add'>+ */</div><div class='add'>+enum es58x_event {</div><div class='add'>+	ES58X_EVENT_OK = 0,</div><div class='add'>+	ES58X_EVENT_CRTL_ACTIVE = BIT(0),</div><div class='add'>+	ES58X_EVENT_CRTL_PASSIVE = BIT(1),</div><div class='add'>+	ES58X_EVENT_CRTL_WARNING = BIT(2),</div><div class='add'>+	ES58X_EVENT_BUSOFF = BIT(3),</div><div class='add'>+	ES58X_EVENT_SINGLE_WIRE = BIT(4)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* enum es58x_ret_u8 - Device return error codes, 8 bit format.</div><div class='add'>+ *</div><div class='add'>+ * Specific to ES581.4.</div><div class='add'>+ */</div><div class='add'>+enum es58x_ret_u8 {</div><div class='add'>+	ES58X_RET_U8_OK = 0x00,</div><div class='add'>+	ES58X_RET_U8_ERR_UNSPECIFIED_FAILURE = 0x80,</div><div class='add'>+	ES58X_RET_U8_ERR_NO_MEM = 0x81,</div><div class='add'>+	ES58X_RET_U8_ERR_BAD_CRC = 0x99</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* enum es58x_ret_u32 - Device return error codes, 32 bit format.</div><div class='add'>+ */</div><div class='add'>+enum es58x_ret_u32 {</div><div class='add'>+	ES58X_RET_U32_OK = 0x00000000UL,</div><div class='add'>+	ES58X_RET_U32_ERR_UNSPECIFIED_FAILURE = 0x80000000UL,</div><div class='add'>+	ES58X_RET_U32_ERR_NO_MEM = 0x80004001UL,</div><div class='add'>+	ES58X_RET_U32_WARN_PARAM_ADJUSTED = 0x40004000UL,</div><div class='add'>+	ES58X_RET_U32_WARN_TX_MAYBE_REORDER = 0x40004001UL,</div><div class='add'>+	ES58X_RET_U32_ERR_TIMEDOUT = 0x80000008UL,</div><div class='add'>+	ES58X_RET_U32_ERR_FIFO_FULL = 0x80003002UL,</div><div class='add'>+	ES58X_RET_U32_ERR_BAD_CONFIG = 0x80004000UL,</div><div class='add'>+	ES58X_RET_U32_ERR_NO_RESOURCE = 0x80004002UL</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* enum es58x_ret_type - Type of the command returned by the ES58X</div><div class='add'>+ *	device.</div><div class='add'>+ */</div><div class='add'>+enum es58x_ret_type {</div><div class='add'>+	ES58X_RET_TYPE_SET_BITTIMING,</div><div class='add'>+	ES58X_RET_TYPE_ENABLE_CHANNEL,</div><div class='add'>+	ES58X_RET_TYPE_DISABLE_CHANNEL,</div><div class='add'>+	ES58X_RET_TYPE_TX_MSG,</div><div class='add'>+	ES58X_RET_TYPE_RESET_RX,</div><div class='add'>+	ES58X_RET_TYPE_RESET_TX,</div><div class='add'>+	ES58X_RET_TYPE_DEVICE_ERR</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+union es58x_urb_cmd {</div><div class='add'>+	struct es581_4_urb_cmd es581_4_urb_cmd;</div><div class='add'>+	struct es58x_fd_urb_cmd es58x_fd_urb_cmd;</div><div class='add'>+	struct {		/* Common header parts of all variants */</div><div class='add'>+		__le16 sof;</div><div class='add'>+		u8 cmd_type;</div><div class='add'>+		u8 cmd_id;</div><div class='add'>+	} __packed;</div><div class='add'>+	DECLARE_FLEX_ARRAY(u8, raw_cmd);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct es58x_priv - All information specific to a CAN channel.</div><div class='add'>+ * @can: struct can_priv must be the first member (Socket CAN relies</div><div class='add'>+ *	on the fact that function netdev_priv() returns a pointer to</div><div class='add'>+ *	a struct can_priv).</div><div class='add'>+ * @devlink_port: devlink instance for the network interface.</div><div class='add'>+ * @es58x_dev: pointer to the corresponding ES58X device.</div><div class='add'>+ * @tx_urb: Used as a buffer to concatenate the TX messages and to do</div><div class='add'>+ *	a bulk send. Please refer to es58x_start_xmit() for more</div><div class='add'>+ *	details.</div><div class='add'>+ * @tx_tail: Index of the oldest packet still pending for</div><div class='add'>+ *	completion. @tx_tail &amp; echo_skb_mask represents the beginning</div><div class='add'>+ *	of the echo skb FIFO, i.e. index of the first element.</div><div class='add'>+ * @tx_head: Index of the next packet to be sent to the</div><div class='add'>+ *	device. @tx_head &amp; echo_skb_mask represents the end of the</div><div class='add'>+ *	echo skb FIFO plus one, i.e. the first free index.</div><div class='add'>+ * @tx_can_msg_cnt: Number of messages in @tx_urb.</div><div class='add'>+ * @tx_can_msg_is_fd: false: all messages in @tx_urb are Classical</div><div class='add'>+ *	CAN, true: all messages in @tx_urb are CAN FD. Rationale:</div><div class='add'>+ *	ES58X FD devices do not allow to mix Classical CAN and FD CAN</div><div class='add'>+ *	frames in one single bulk transmission.</div><div class='add'>+ * @err_passive_before_rtx_success: The ES58X device might enter in a</div><div class='add'>+ *	state in which it keeps alternating between error passive</div><div class='add'>+ *	and active states. This counter keeps track of the number of</div><div class='add'>+ *	error passive and if it gets bigger than</div><div class='add'>+ *	ES58X_CONSECUTIVE_ERR_PASSIVE_MAX, es58x_rx_err_msg() will</div><div class='add'>+ *	force the status to bus-off.</div><div class='add'>+ * @channel_idx: Channel index, starts at zero.</div><div class='add'>+ */</div><div class='add'>+struct es58x_priv {</div><div class='add'>+	struct can_priv can;</div><div class='add'>+	struct devlink_port devlink_port;</div><div class='add'>+	struct es58x_device *es58x_dev;</div><div class='add'>+	struct urb *tx_urb;</div><div class='add'>+</div><div class='add'>+	u32 tx_tail;</div><div class='add'>+	u32 tx_head;</div><div class='add'>+</div><div class='add'>+	u8 tx_can_msg_cnt;</div><div class='add'>+	bool tx_can_msg_is_fd;</div><div class='add'>+</div><div class='add'>+	u8 err_passive_before_rtx_success;</div><div class='add'>+</div><div class='add'>+	u8 channel_idx;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct es58x_parameters - Constant parameters of a given hardware</div><div class='add'>+ *	variant.</div><div class='add'>+ * @bittiming_const: Nominal bittimming constant parameters.</div><div class='add'>+ * @data_bittiming_const: Data bittiming constant parameters.</div><div class='add'>+ * @tdc_const: Transmission Delay Compensation constant parameters.</div><div class='add'>+ * @bitrate_max: Maximum bitrate supported by the device.</div><div class='add'>+ * @clock: CAN clock parameters.</div><div class='add'>+ * @ctrlmode_supported: List of supported modes. Please refer to</div><div class='add'>+ *	can/netlink.h file for additional details.</div><div class='add'>+ * @tx_start_of_frame: Magic number at the beginning of each TX URB</div><div class='add'>+ *	command.</div><div class='add'>+ * @rx_start_of_frame: Magic number at the beginning of each RX URB</div><div class='add'>+ *	command.</div><div class='add'>+ * @tx_urb_cmd_max_len: Maximum length of a TX URB command.</div><div class='add'>+ * @rx_urb_cmd_max_len: Maximum length of a RX URB command.</div><div class='add'>+ * @fifo_mask: Bit mask to quickly convert the tx_tail and tx_head</div><div class='add'>+ *	field of the struct es58x_priv into echo_skb</div><div class='add'>+ *	indexes. Properties: @fifo_mask = echo_skb_max - 1 where</div><div class='add'>+ *	echo_skb_max must be a power of two. Also, echo_skb_max must</div><div class='add'>+ *	not exceed the maximum size of the device internal TX FIFO</div><div class='add'>+ *	length. This parameter is used to control the network queue</div><div class='add'>+ *	wake/stop logic.</div><div class='add'>+ * @dql_min_limit: Dynamic Queue Limits (DQL) absolute minimum limit</div><div class='add'>+ *	of bytes allowed to be queued on this network device transmit</div><div class='add'>+ *	queue. Used by the Byte Queue Limits (BQL) to determine how</div><div class='add'>+ *	frequently the xmit_more flag will be set to true in</div><div class='add'>+ *	es58x_start_xmit(). Set this value higher to optimize for</div><div class='add'>+ *	throughput but be aware that it might have a negative impact</div><div class='add'>+ *	on the latency! This value can also be set dynamically. Please</div><div class='add'>+ *	refer to Documentation/ABI/testing/sysfs-class-net-queues for</div><div class='add'>+ *	more details.</div><div class='add'>+ * @tx_bulk_max: Maximum number of TX messages that can be sent in one</div><div class='add'>+ *	single URB packet.</div><div class='add'>+ * @urb_cmd_header_len: Length of the URB command header.</div><div class='add'>+ * @rx_urb_max: Number of RX URB to be allocated during device probe.</div><div class='add'>+ * @tx_urb_max: Number of TX URB to be allocated during device probe.</div><div class='add'>+ */</div><div class='add'>+struct es58x_parameters {</div><div class='add'>+	const struct can_bittiming_const *bittiming_const;</div><div class='add'>+	const struct can_bittiming_const *data_bittiming_const;</div><div class='add'>+	const struct can_tdc_const *tdc_const;</div><div class='add'>+	u32 bitrate_max;</div><div class='add'>+	struct can_clock clock;</div><div class='add'>+	u32 ctrlmode_supported;</div><div class='add'>+	u16 tx_start_of_frame;</div><div class='add'>+	u16 rx_start_of_frame;</div><div class='add'>+	u16 tx_urb_cmd_max_len;</div><div class='add'>+	u16 rx_urb_cmd_max_len;</div><div class='add'>+	u16 fifo_mask;</div><div class='add'>+	u16 dql_min_limit;</div><div class='add'>+	u8 tx_bulk_max;</div><div class='add'>+	u8 urb_cmd_header_len;</div><div class='add'>+	u8 rx_urb_max;</div><div class='add'>+	u8 tx_urb_max;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct es58x_operators - Function pointers used to encode/decode</div><div class='add'>+ *	the TX/RX messages.</div><div class='add'>+ * @get_msg_len: Get field msg_len of the urb_cmd. The offset of</div><div class='add'>+ *	msg_len inside urb_cmd depends of the device model.</div><div class='add'>+ * @handle_urb_cmd: Decode the URB command received from the device</div><div class='add'>+ *	and dispatch it to the relevant sub function.</div><div class='add'>+ * @fill_urb_header: Fill the header of urb_cmd.</div><div class='add'>+ * @tx_can_msg: Encode a TX CAN message and add it to the bulk buffer</div><div class='add'>+ *	cmd_buf of es58x_dev.</div><div class='add'>+ * @enable_channel: Start the CAN channel.</div><div class='add'>+ * @disable_channel: Stop the CAN channel.</div><div class='add'>+ * @reset_device: Full reset of the device. N.B: this feature is only</div><div class='add'>+ *	present on the ES581.4. For ES58X FD devices, this field is</div><div class='add'>+ *	set to NULL.</div><div class='add'>+ * @get_timestamp: Request a timestamp from the ES58X device.</div><div class='add'>+ */</div><div class='add'>+struct es58x_operators {</div><div class='add'>+	u16 (*get_msg_len)(const union es58x_urb_cmd *urb_cmd);</div><div class='add'>+	int (*handle_urb_cmd)(struct es58x_device *es58x_dev,</div><div class='add'>+			      const union es58x_urb_cmd *urb_cmd);</div><div class='add'>+	void (*fill_urb_header)(union es58x_urb_cmd *urb_cmd, u8 cmd_type,</div><div class='add'>+				u8 cmd_id, u8 channel_idx, u16 cmd_len);</div><div class='add'>+	int (*tx_can_msg)(struct es58x_priv *priv, const struct sk_buff *skb);</div><div class='add'>+	int (*enable_channel)(struct es58x_priv *priv);</div><div class='add'>+	int (*disable_channel)(struct es58x_priv *priv);</div><div class='add'>+	int (*reset_device)(struct es58x_device *es58x_dev);</div><div class='add'>+	int (*get_timestamp)(struct es58x_device *es58x_dev);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct es58x_sw_version - Version number of the firmware or the</div><div class='add'>+ *	bootloader.</div><div class='add'>+ * @major: Version major number, represented on two digits.</div><div class='add'>+ * @minor: Version minor number, represented on two digits.</div><div class='add'>+ * @revision: Version revision number, represented on two digits.</div><div class='add'>+ *</div><div class='add'>+ * The firmware and the bootloader share the same format: "xx.xx.xx"</div><div class='add'>+ * where 'x' is a digit. Both can be retrieved from the product</div><div class='add'>+ * information string.</div><div class='add'>+ */</div><div class='add'>+struct es58x_sw_version {</div><div class='add'>+	u8 major;</div><div class='add'>+	u8 minor;</div><div class='add'>+	u8 revision;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct es58x_hw_revision - Hardware revision number.</div><div class='add'>+ * @letter: Revision letter, an alphanumeric character.</div><div class='add'>+ * @major: Version major number, represented on three digits.</div><div class='add'>+ * @minor: Version minor number, represented on three digits.</div><div class='add'>+ *</div><div class='add'>+ * The hardware revision uses its own format: "axxx/xxx" where 'a' is</div><div class='add'>+ * an alphanumeric character and 'x' a digit. It can be retrieved from</div><div class='add'>+ * the product information string.</div><div class='add'>+ */</div><div class='add'>+struct es58x_hw_revision {</div><div class='add'>+	char letter;</div><div class='add'>+	u16 major;</div><div class='add'>+	u16 minor;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct es58x_device - All information specific to an ES58X device.</div><div class='add'>+ * @dev: Device information.</div><div class='add'>+ * @udev: USB device information.</div><div class='add'>+ * @netdev: Array of our CAN channels.</div><div class='add'>+ * @param: The constant parameters.</div><div class='add'>+ * @ops: Operators.</div><div class='add'>+ * @rx_pipe: USB reception pipe.</div><div class='add'>+ * @tx_pipe: USB transmission pipe.</div><div class='add'>+ * @rx_urbs: Anchor for received URBs.</div><div class='add'>+ * @tx_urbs_busy: Anchor for TX URBs which were send to the device.</div><div class='add'>+ * @tx_urbs_idle: Anchor for TX USB which are idle. This driver</div><div class='add'>+ *	allocates the memory for the URBs during the probe. When a TX</div><div class='add'>+ *	URB is needed, it can be taken from this anchor. The network</div><div class='add'>+ *	queue wake/stop logic should prevent this URB from getting</div><div class='add'>+ *	empty. Please refer to es58x_get_tx_urb() for more details.</div><div class='add'>+ * @tx_urbs_idle_cnt: number of urbs in @tx_urbs_idle.</div><div class='add'>+ * @firmware_version: The firmware version number.</div><div class='add'>+ * @bootloader_version: The bootloader version number.</div><div class='add'>+ * @hardware_revision: The hardware revision number.</div><div class='add'>+ * @ktime_req_ns: kernel timestamp when es58x_set_realtime_diff_ns()</div><div class='add'>+ *	was called.</div><div class='add'>+ * @realtime_diff_ns: difference in nanoseconds between the clocks of</div><div class='add'>+ *	the ES58X device and the kernel.</div><div class='add'>+ * @timestamps: a temporary buffer to store the time stamps before</div><div class='add'>+ *	feeding them to es58x_can_get_echo_skb(). Can only be used</div><div class='add'>+ *	in RX branches.</div><div class='add'>+ * @num_can_ch: Number of CAN channel (i.e. number of elements of @netdev).</div><div class='add'>+ * @opened_channel_cnt: number of channels opened. Free of race</div><div class='add'>+ *	conditions because its two users (net_device_ops:ndo_open()</div><div class='add'>+ *	and net_device_ops:ndo_close()) guarantee that the network</div><div class='add'>+ *	stack big kernel lock (a.k.a. rtnl_mutex) is being hold.</div><div class='add'>+ * @rx_cmd_buf_len: Length of @rx_cmd_buf.</div><div class='add'>+ * @rx_cmd_buf: The device might split the URB commands in an</div><div class='add'>+ *	arbitrary amount of pieces. This buffer is used to concatenate</div><div class='add'>+ *	all those pieces. Can only be used in RX branches. This field</div><div class='add'>+ *	has to be the last one of the structure because it is has a</div><div class='add'>+ *	flexible size (c.f. es58x_sizeof_es58x_device() function).</div><div class='add'>+ */</div><div class='add'>+struct es58x_device {</div><div class='add'>+	struct device *dev;</div><div class='add'>+	struct usb_device *udev;</div><div class='add'>+	struct net_device *netdev[ES58X_NUM_CAN_CH_MAX];</div><div class='add'>+</div><div class='add'>+	const struct es58x_parameters *param;</div><div class='add'>+	const struct es58x_operators *ops;</div><div class='add'>+</div><div class='add'>+	unsigned int rx_pipe;</div><div class='add'>+	unsigned int tx_pipe;</div><div class='add'>+</div><div class='add'>+	struct usb_anchor rx_urbs;</div><div class='add'>+	struct usb_anchor tx_urbs_busy;</div><div class='add'>+	struct usb_anchor tx_urbs_idle;</div><div class='add'>+	atomic_t tx_urbs_idle_cnt;</div><div class='add'>+</div><div class='add'>+	struct es58x_sw_version firmware_version;</div><div class='add'>+	struct es58x_sw_version bootloader_version;</div><div class='add'>+	struct es58x_hw_revision hardware_revision;</div><div class='add'>+</div><div class='add'>+	u64 ktime_req_ns;</div><div class='add'>+	s64 realtime_diff_ns;</div><div class='add'>+</div><div class='add'>+	u64 timestamps[ES58X_ECHO_BULK_MAX];</div><div class='add'>+</div><div class='add'>+	u8 num_can_ch;</div><div class='add'>+	u8 opened_channel_cnt;</div><div class='add'>+</div><div class='add'>+	u16 rx_cmd_buf_len;</div><div class='add'>+	union es58x_urb_cmd rx_cmd_buf;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_sizeof_es58x_device() - Calculate the maximum length of</div><div class='add'>+ *	struct es58x_device.</div><div class='add'>+ * @es58x_dev_param: The constant parameters of the device.</div><div class='add'>+ *</div><div class='add'>+ * The length of struct es58x_device depends on the length of its last</div><div class='add'>+ * field: rx_cmd_buf. This macro allows to optimize the memory</div><div class='add'>+ * allocation.</div><div class='add'>+ *</div><div class='add'>+ * Return: length of struct es58x_device.</div><div class='add'>+ */</div><div class='add'>+static inline size_t es58x_sizeof_es58x_device(const struct es58x_parameters</div><div class='add'>+					       *es58x_dev_param)</div><div class='add'>+{</div><div class='add'>+	return offsetof(struct es58x_device, rx_cmd_buf) +</div><div class='add'>+		es58x_dev_param-&gt;rx_urb_cmd_max_len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int __es58x_check_msg_len(const struct device *dev,</div><div class='add'>+					const char *stringified_msg,</div><div class='add'>+					size_t actual_len, size_t expected_len)</div><div class='add'>+{</div><div class='add'>+	if (expected_len != actual_len) {</div><div class='add'>+		dev_err(dev,</div><div class='add'>+			"Length of %s is %zu but received command is %zu.\n",</div><div class='add'>+			stringified_msg, expected_len, actual_len);</div><div class='add'>+		return -EMSGSIZE;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_check_msg_len() - Check the size of a received message.</div><div class='add'>+ * @dev: Device, used to print error messages.</div><div class='add'>+ * @msg: Received message, must not be a pointer.</div><div class='add'>+ * @actual_len: Length of the message as advertised in the command header.</div><div class='add'>+ *</div><div class='add'>+ * Must be a macro in order to accept the different types of messages</div><div class='add'>+ * as an input. Can be use with any of the messages which have a fixed</div><div class='add'>+ * length. Check for an exact match of the size.</div><div class='add'>+ *</div><div class='add'>+ * Return: zero on success, -EMSGSIZE if @actual_len differs from the</div><div class='add'>+ * expected length.</div><div class='add'>+ */</div><div class='add'>+#define es58x_check_msg_len(dev, msg, actual_len)			\</div><div class='add'>+	__es58x_check_msg_len(dev, __stringify(msg),			\</div><div class='add'>+			      actual_len, sizeof(msg))</div><div class='add'>+</div><div class='add'>+static inline int __es58x_check_msg_max_len(const struct device *dev,</div><div class='add'>+					    const char *stringified_msg,</div><div class='add'>+					    size_t actual_len,</div><div class='add'>+					    size_t expected_len)</div><div class='add'>+{</div><div class='add'>+	if (actual_len &gt; expected_len) {</div><div class='add'>+		dev_err(dev,</div><div class='add'>+			"Maximum length for %s is %zu but received command is %zu.\n",</div><div class='add'>+			stringified_msg, expected_len, actual_len);</div><div class='add'>+		return -EOVERFLOW;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_check_msg_max_len() - Check the maximum size of a received message.</div><div class='add'>+ * @dev: Device, used to print error messages.</div><div class='add'>+ * @msg: Received message, must not be a pointer.</div><div class='add'>+ * @actual_len: Length of the message as advertised in the command header.</div><div class='add'>+ *</div><div class='add'>+ * Must be a macro in order to accept the different types of messages</div><div class='add'>+ * as an input. To be used with the messages of variable sizes. Only</div><div class='add'>+ * check that the message is not bigger than the maximum expected</div><div class='add'>+ * size.</div><div class='add'>+ *</div><div class='add'>+ * Return: zero on success, -EOVERFLOW if @actual_len is greater than</div><div class='add'>+ * the expected length.</div><div class='add'>+ */</div><div class='add'>+#define es58x_check_msg_max_len(dev, msg, actual_len)			\</div><div class='add'>+	__es58x_check_msg_max_len(dev, __stringify(msg),		\</div><div class='add'>+				  actual_len, sizeof(msg))</div><div class='add'>+</div><div class='add'>+static inline int __es58x_msg_num_element(const struct device *dev,</div><div class='add'>+					  const char *stringified_msg,</div><div class='add'>+					  size_t actual_len, size_t msg_len,</div><div class='add'>+					  size_t elem_len)</div><div class='add'>+{</div><div class='add'>+	size_t actual_num_elem = actual_len / elem_len;</div><div class='add'>+	size_t expected_num_elem = msg_len / elem_len;</div><div class='add'>+</div><div class='add'>+	if (actual_num_elem == 0) {</div><div class='add'>+		dev_err(dev,</div><div class='add'>+			"Minimum length for %s is %zu but received command is %zu.\n",</div><div class='add'>+			stringified_msg, elem_len, actual_len);</div><div class='add'>+		return -EMSGSIZE;</div><div class='add'>+	} else if ((actual_len % elem_len) != 0) {</div><div class='add'>+		dev_err(dev,</div><div class='add'>+			"Received command length: %zu is not a multiple of %s[0]: %zu\n",</div><div class='add'>+			actual_len, stringified_msg, elem_len);</div><div class='add'>+		return -EMSGSIZE;</div><div class='add'>+	} else if (actual_num_elem &gt; expected_num_elem) {</div><div class='add'>+		dev_err(dev,</div><div class='add'>+			"Array %s is supposed to have %zu elements each of size %zu...\n",</div><div class='add'>+			stringified_msg, expected_num_elem, elem_len);</div><div class='add'>+		dev_err(dev,</div><div class='add'>+			"... But received command has %zu elements (total length %zu).\n",</div><div class='add'>+			actual_num_elem, actual_len);</div><div class='add'>+		return -EOVERFLOW;</div><div class='add'>+	}</div><div class='add'>+	return actual_num_elem;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_msg_num_element() - Check size and give the number of</div><div class='add'>+ *	elements in a message of array type.</div><div class='add'>+ * @dev: Device, used to print error messages.</div><div class='add'>+ * @msg: Received message, must be an array.</div><div class='add'>+ * @actual_len: Length of the message as advertised in the command</div><div class='add'>+ *	header.</div><div class='add'>+ *</div><div class='add'>+ * Must be a macro in order to accept the different types of messages</div><div class='add'>+ * as an input. To be used on message of array type. Array's element</div><div class='add'>+ * has to be of fixed size (else use es58x_check_msg_max_len()). Check</div><div class='add'>+ * that the total length is an exact multiple of the length of a</div><div class='add'>+ * single element.</div><div class='add'>+ *</div><div class='add'>+ * Return: number of elements in the array on success, -EOVERFLOW if</div><div class='add'>+ * @actual_len is greater than the expected length, -EMSGSIZE if</div><div class='add'>+ * @actual_len is not a multiple of a single element.</div><div class='add'>+ */</div><div class='add'>+#define es58x_msg_num_element(dev, msg, actual_len)			\</div><div class='add'>+({									\</div><div class='add'>+	size_t __elem_len = sizeof((msg)[0]) + __must_be_array(msg);	\</div><div class='add'>+	__es58x_msg_num_element(dev, __stringify(msg), actual_len,	\</div><div class='add'>+				sizeof(msg), __elem_len);		\</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_priv() - Get the priv member and cast it to struct es58x_priv.</div><div class='add'>+ * @netdev: CAN network device.</div><div class='add'>+ *</div><div class='add'>+ * Return: ES58X device.</div><div class='add'>+ */</div><div class='add'>+static inline struct es58x_priv *es58x_priv(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	return (struct es58x_priv *)netdev_priv(netdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ES58X_SIZEOF_URB_CMD() - Calculate the maximum length of an urb</div><div class='add'>+ *	command for a given message field name.</div><div class='add'>+ * @es58x_urb_cmd_type: type (either "struct es581_4_urb_cmd" or</div><div class='add'>+ *	"struct es58x_fd_urb_cmd").</div><div class='add'>+ * @msg_field: name of the message field.</div><div class='add'>+ *</div><div class='add'>+ * Must be a macro in order to accept the different command types as</div><div class='add'>+ * an input.</div><div class='add'>+ *</div><div class='add'>+ * Return: length of the urb command.</div><div class='add'>+ */</div><div class='add'>+#define ES58X_SIZEOF_URB_CMD(es58x_urb_cmd_type, msg_field)		\</div><div class='add'>+	(offsetof(es58x_urb_cmd_type, raw_msg)				\</div><div class='add'>+		+ sizeof_field(es58x_urb_cmd_type, msg_field)		\</div><div class='add'>+		+ sizeof_field(es58x_urb_cmd_type,			\</div><div class='add'>+			       reserved_for_crc16_do_not_use))</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_get_urb_cmd_len() - Calculate the actual length of an urb</div><div class='add'>+ *	command for a given message length.</div><div class='add'>+ * @es58x_dev: ES58X device.</div><div class='add'>+ * @msg_len: Length of the message.</div><div class='add'>+ *</div><div class='add'>+ * Add the header and CRC lengths to the message length.</div><div class='add'>+ *</div><div class='add'>+ * Return: length of the urb command.</div><div class='add'>+ */</div><div class='add'>+static inline size_t es58x_get_urb_cmd_len(struct es58x_device *es58x_dev,</div><div class='add'>+					   u16 msg_len)</div><div class='add'>+{</div><div class='add'>+	return es58x_dev-&gt;param-&gt;urb_cmd_header_len + msg_len + sizeof(u16);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_get_netdev() - Get the network device.</div><div class='add'>+ * @es58x_dev: ES58X device.</div><div class='add'>+ * @channel_no: The channel number as advertised in the urb command.</div><div class='add'>+ * @channel_idx_offset: Some of the ES58x starts channel numbering</div><div class='add'>+ *	from 0 (ES58X FD), others from 1 (ES581.4).</div><div class='add'>+ * @netdev: CAN network device.</div><div class='add'>+ *</div><div class='add'>+ * Do a sanity check on the index provided by the device.</div><div class='add'>+ *</div><div class='add'>+ * Return: zero on success, -ECHRNG if the received channel number is</div><div class='add'>+ *	out of range and -ENODEV if the network device is not yet</div><div class='add'>+ *	configured.</div><div class='add'>+ */</div><div class='add'>+static inline int es58x_get_netdev(struct es58x_device *es58x_dev,</div><div class='add'>+				   int channel_no, int channel_idx_offset,</div><div class='add'>+				   struct net_device **netdev)</div><div class='add'>+{</div><div class='add'>+	int channel_idx = channel_no - channel_idx_offset;</div><div class='add'>+</div><div class='add'>+	*netdev = NULL;</div><div class='add'>+	if (channel_idx &lt; 0 || channel_idx &gt;= es58x_dev-&gt;num_can_ch)</div><div class='add'>+		return -ECHRNG;</div><div class='add'>+</div><div class='add'>+	*netdev = es58x_dev-&gt;netdev[channel_idx];</div><div class='add'>+	if (!*netdev || !netif_device_present(*netdev))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_get_raw_can_id() - Get the CAN ID.</div><div class='add'>+ * @cf: CAN frame.</div><div class='add'>+ *</div><div class='add'>+ * Mask the CAN ID in order to only keep the significant bits.</div><div class='add'>+ *</div><div class='add'>+ * Return: the raw value of the CAN ID.</div><div class='add'>+ */</div><div class='add'>+static inline int es58x_get_raw_can_id(const struct can_frame *cf)</div><div class='add'>+{</div><div class='add'>+	if (cf-&gt;can_id &amp; CAN_EFF_FLAG)</div><div class='add'>+		return cf-&gt;can_id &amp; CAN_EFF_MASK;</div><div class='add'>+	else</div><div class='add'>+		return cf-&gt;can_id &amp; CAN_SFF_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_get_flags() - Get the CAN flags.</div><div class='add'>+ * @skb: socket buffer of a CAN message.</div><div class='add'>+ *</div><div class='add'>+ * Return: the CAN flag as an enum es58x_flag.</div><div class='add'>+ */</div><div class='add'>+static inline enum es58x_flag es58x_get_flags(const struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct canfd_frame *cf = (struct canfd_frame *)skb-&gt;data;</div><div class='add'>+	enum es58x_flag es58x_flags = 0;</div><div class='add'>+</div><div class='add'>+	if (cf-&gt;can_id &amp; CAN_EFF_FLAG)</div><div class='add'>+		es58x_flags |= ES58X_FLAG_EFF;</div><div class='add'>+</div><div class='add'>+	if (can_is_canfd_skb(skb)) {</div><div class='add'>+		es58x_flags |= ES58X_FLAG_FD_DATA;</div><div class='add'>+		if (cf-&gt;flags &amp; CANFD_BRS)</div><div class='add'>+			es58x_flags |= ES58X_FLAG_FD_BRS;</div><div class='add'>+		if (cf-&gt;flags &amp; CANFD_ESI)</div><div class='add'>+			es58x_flags |= ES58X_FLAG_FD_ESI;</div><div class='add'>+	} else if (cf-&gt;can_id &amp; CAN_RTR_FLAG)</div><div class='add'>+		/* Remote frames are only defined in Classical CAN frames */</div><div class='add'>+		es58x_flags |= ES58X_FLAG_RTR;</div><div class='add'>+</div><div class='add'>+	return es58x_flags;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* es58x_core.c. */</div><div class='add'>+int es58x_can_get_echo_skb(struct net_device *netdev, u32 packet_idx,</div><div class='add'>+			   u64 *tstamps, unsigned int pkts);</div><div class='add'>+int es58x_tx_ack_msg(struct net_device *netdev, u16 tx_free_entries,</div><div class='add'>+		     enum es58x_ret_u32 rx_cmd_ret_u32);</div><div class='add'>+int es58x_rx_can_msg(struct net_device *netdev, u64 timestamp, const u8 *data,</div><div class='add'>+		     canid_t can_id, enum es58x_flag es58x_flags, u8 dlc);</div><div class='add'>+int es58x_rx_err_msg(struct net_device *netdev, enum es58x_err error,</div><div class='add'>+		     enum es58x_event event, u64 timestamp);</div><div class='add'>+void es58x_rx_timestamp(struct es58x_device *es58x_dev, u64 timestamp);</div><div class='add'>+int es58x_rx_cmd_ret_u8(struct device *dev, enum es58x_ret_type cmd_ret_type,</div><div class='add'>+			enum es58x_ret_u8 rx_cmd_ret_u8);</div><div class='add'>+int es58x_rx_cmd_ret_u32(struct net_device *netdev,</div><div class='add'>+			 enum es58x_ret_type cmd_ret_type,</div><div class='add'>+			 enum es58x_ret_u32 rx_cmd_ret_u32);</div><div class='add'>+int es58x_send_msg(struct es58x_device *es58x_dev, u8 cmd_type, u8 cmd_id,</div><div class='add'>+		   const void *msg, u16 cmd_len, int channel_idx);</div><div class='add'>+</div><div class='add'>+/* es58x_devlink.c. */</div><div class='add'>+void es58x_parse_product_info(struct es58x_device *es58x_dev);</div><div class='add'>+extern const struct devlink_ops es58x_dl_ops;</div><div class='add'>+</div><div class='add'>+/* es581_4.c. */</div><div class='add'>+extern const struct es58x_parameters es581_4_param;</div><div class='add'>+extern const struct es58x_operators es581_4_ops;</div><div class='add'>+</div><div class='add'>+/* es58x_fd.c. */</div><div class='add'>+extern const struct es58x_parameters es58x_fd_param;</div><div class='add'>+extern const struct es58x_operators es58x_fd_ops;</div><div class='add'>+</div><div class='add'>+#endif /* __ES58X_COMMON_H__ */</div><div class='head'>diff --git a/drivers/net/can/usb/etas_es58x/es58x_devlink.c b/drivers/net/can/usb/etas_es58x/es58x_devlink.c<br/>new file mode 100644<br/>index 000000000000..0d155eb1b9e9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/etas_es58x/es58x_devlink.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/etas_es58x/es58x_devlink.c</a></div><div class='hunk'>@@ -0,0 +1,260 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+/* Driver for ETAS GmbH ES58X USB CAN(-FD) Bus Interfaces.</div><div class='add'>+ *</div><div class='add'>+ * File es58x_devlink.c: report the product information using devlink.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2022 Vincent Mailhol &lt;mailhol.vincent@wanadoo.fr&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/ctype.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/usb.h&gt;</div><div class='add'>+#include &lt;net/devlink.h&gt;</div><div class='add'>+</div><div class='add'>+#include "es58x_core.h"</div><div class='add'>+</div><div class='add'>+/* USB descriptor index containing the product information string. */</div><div class='add'>+#define ES58X_PROD_INFO_IDX 6</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_parse_sw_version() - Extract boot loader or firmware version.</div><div class='add'>+ * @es58x_dev: ES58X device.</div><div class='add'>+ * @prod_info: USB custom string returned by the device.</div><div class='add'>+ * @prefix: Select which information should be parsed. Set it to "FW"</div><div class='add'>+ *	to parse the firmware version or to "BL" to parse the</div><div class='add'>+ *	bootloader version.</div><div class='add'>+ *</div><div class='add'>+ * The @prod_info string contains the firmware and the bootloader</div><div class='add'>+ * version number all prefixed by a magic string and concatenated with</div><div class='add'>+ * other numbers. Depending on the device, the firmware (bootloader)</div><div class='add'>+ * format is either "FW_Vxx.xx.xx" ("BL_Vxx.xx.xx") or "FW:xx.xx.xx"</div><div class='add'>+ * ("BL:xx.xx.xx") where 'x' represents a digit. @prod_info must</div><div class='add'>+ * contains the common part of those prefixes: "FW" or "BL".</div><div class='add'>+ *</div><div class='add'>+ * Parse @prod_info and store the version number in</div><div class='add'>+ * &amp;es58x_dev.firmware_version or &amp;es58x_dev.bootloader_version</div><div class='add'>+ * according to @prefix value.</div><div class='add'>+ *</div><div class='add'>+ * Return: zero on success, -EINVAL if @prefix contains an invalid</div><div class='add'>+ *	value and -EBADMSG if @prod_info could not be parsed.</div><div class='add'>+ */</div><div class='add'>+static int es58x_parse_sw_version(struct es58x_device *es58x_dev,</div><div class='add'>+				  const char *prod_info, const char *prefix)</div><div class='add'>+{</div><div class='add'>+	struct es58x_sw_version *version;</div><div class='add'>+	int major, minor, revision;</div><div class='add'>+</div><div class='add'>+	if (!strcmp(prefix, "FW"))</div><div class='add'>+		version = &amp;es58x_dev-&gt;firmware_version;</div><div class='add'>+	else if (!strcmp(prefix, "BL"))</div><div class='add'>+		version = &amp;es58x_dev-&gt;bootloader_version;</div><div class='add'>+	else</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Go to prefix */</div><div class='add'>+	prod_info = strstr(prod_info, prefix);</div><div class='add'>+	if (!prod_info)</div><div class='add'>+		return -EBADMSG;</div><div class='add'>+	/* Go to beginning of the version number */</div><div class='add'>+	while (!isdigit(*prod_info)) {</div><div class='add'>+		prod_info++;</div><div class='add'>+		if (!*prod_info)</div><div class='add'>+			return -EBADMSG;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (sscanf(prod_info, "%2u.%2u.%2u", &amp;major, &amp;minor, &amp;revision) != 3)</div><div class='add'>+		return -EBADMSG;</div><div class='add'>+</div><div class='add'>+	version-&gt;major = major;</div><div class='add'>+	version-&gt;minor = minor;</div><div class='add'>+	version-&gt;revision = revision;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_parse_hw_rev() - Extract hardware revision number.</div><div class='add'>+ * @es58x_dev: ES58X device.</div><div class='add'>+ * @prod_info: USB custom string returned by the device.</div><div class='add'>+ *</div><div class='add'>+ * @prod_info contains the hardware revision prefixed by a magic</div><div class='add'>+ * string and conquenated together with other numbers. Depending on</div><div class='add'>+ * the device, the hardware revision format is either</div><div class='add'>+ * "HW_VER:axxx/xxx" or "HR:axxx/xxx" where 'a' represents a letter</div><div class='add'>+ * and 'x' a digit.</div><div class='add'>+ *</div><div class='add'>+ * Parse @prod_info and store the hardware revision number in</div><div class='add'>+ * &amp;es58x_dev.hardware_revision.</div><div class='add'>+ *</div><div class='add'>+ * Return: zero on success, -EBADMSG if @prod_info could not be</div><div class='add'>+ *	parsed.</div><div class='add'>+ */</div><div class='add'>+static int es58x_parse_hw_rev(struct es58x_device *es58x_dev,</div><div class='add'>+			      const char *prod_info)</div><div class='add'>+{</div><div class='add'>+	char letter;</div><div class='add'>+	int major, minor;</div><div class='add'>+</div><div class='add'>+	/* The only occurrence of 'H' is in the hardware revision prefix. */</div><div class='add'>+	prod_info = strchr(prod_info, 'H');</div><div class='add'>+	if (!prod_info)</div><div class='add'>+		return -EBADMSG;</div><div class='add'>+	/* Go to beginning of the hardware revision */</div><div class='add'>+	prod_info = strchr(prod_info, ':');</div><div class='add'>+	if (!prod_info)</div><div class='add'>+		return -EBADMSG;</div><div class='add'>+	prod_info++;</div><div class='add'>+</div><div class='add'>+	if (sscanf(prod_info, "%c%3u/%3u", &amp;letter, &amp;major, &amp;minor) != 3)</div><div class='add'>+		return -EBADMSG;</div><div class='add'>+</div><div class='add'>+	es58x_dev-&gt;hardware_revision.letter = letter;</div><div class='add'>+	es58x_dev-&gt;hardware_revision.major = major;</div><div class='add'>+	es58x_dev-&gt;hardware_revision.minor = minor;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_parse_product_info() - Parse the ES58x product information</div><div class='add'>+ *	string.</div><div class='add'>+ * @es58x_dev: ES58X device.</div><div class='add'>+ *</div><div class='add'>+ * Retrieve the product information string and parse it to extract the</div><div class='add'>+ * firmware version, the bootloader version and the hardware</div><div class='add'>+ * revision.</div><div class='add'>+ *</div><div class='add'>+ * If the function fails, set the version or revision to an invalid</div><div class='add'>+ * value and emit an informal message. Continue probing because the</div><div class='add'>+ * product information is not critical for the driver to operate.</div><div class='add'>+ */</div><div class='add'>+void es58x_parse_product_info(struct es58x_device *es58x_dev)</div><div class='add'>+{</div><div class='add'>+	static const struct es58x_sw_version sw_version_not_set = {</div><div class='add'>+		.major = -1,</div><div class='add'>+		.minor = -1,</div><div class='add'>+		.revision = -1,</div><div class='add'>+	};</div><div class='add'>+	static const struct es58x_hw_revision hw_revision_not_set = {</div><div class='add'>+		.letter = '\0',</div><div class='add'>+		.major = -1,</div><div class='add'>+		.minor = -1,</div><div class='add'>+	};</div><div class='add'>+	char *prod_info;</div><div class='add'>+</div><div class='add'>+	es58x_dev-&gt;firmware_version = sw_version_not_set;</div><div class='add'>+	es58x_dev-&gt;bootloader_version = sw_version_not_set;</div><div class='add'>+	es58x_dev-&gt;hardware_revision = hw_revision_not_set;</div><div class='add'>+</div><div class='add'>+	prod_info = usb_cache_string(es58x_dev-&gt;udev, ES58X_PROD_INFO_IDX);</div><div class='add'>+	if (!prod_info) {</div><div class='add'>+		dev_warn(es58x_dev-&gt;dev,</div><div class='add'>+			 "could not retrieve the product info string\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (es58x_parse_sw_version(es58x_dev, prod_info, "FW") ||</div><div class='add'>+	    es58x_parse_sw_version(es58x_dev, prod_info, "BL") ||</div><div class='add'>+	    es58x_parse_hw_rev(es58x_dev, prod_info))</div><div class='add'>+		dev_info(es58x_dev-&gt;dev,</div><div class='add'>+			 "could not parse product info: '%s'\n", prod_info);</div><div class='add'>+</div><div class='add'>+	kfree(prod_info);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_sw_version_is_valid() - Check if the version is a valid number.</div><div class='add'>+ * @sw_ver: Version number of either the firmware or the bootloader.</div><div class='add'>+ *</div><div class='add'>+ * If any of the software version sub-numbers do not fit on two</div><div class='add'>+ * digits, the version is invalid, most probably because the product</div><div class='add'>+ * string could not be parsed.</div><div class='add'>+ *</div><div class='add'>+ * Return: @true if the software version is valid, @false otherwise.</div><div class='add'>+ */</div><div class='add'>+static inline bool es58x_sw_version_is_valid(struct es58x_sw_version *sw_ver)</div><div class='add'>+{</div><div class='add'>+	return sw_ver-&gt;major &lt; 100 &amp;&amp; sw_ver-&gt;minor &lt; 100 &amp;&amp;</div><div class='add'>+		sw_ver-&gt;revision &lt; 100;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_hw_revision_is_valid() - Check if the revision is a valid number.</div><div class='add'>+ * @hw_rev: Revision number of the hardware.</div><div class='add'>+ *</div><div class='add'>+ * If &amp;es58x_hw_revision.letter is not a alphanumeric character or if</div><div class='add'>+ * any of the hardware revision sub-numbers do not fit on three</div><div class='add'>+ * digits, the revision is invalid, most probably because the product</div><div class='add'>+ * string could not be parsed.</div><div class='add'>+ *</div><div class='add'>+ * Return: @true if the hardware revision is valid, @false otherwise.</div><div class='add'>+ */</div><div class='add'>+static inline bool es58x_hw_revision_is_valid(struct es58x_hw_revision *hw_rev)</div><div class='add'>+{</div><div class='add'>+	return isalnum(hw_rev-&gt;letter) &amp;&amp; hw_rev-&gt;major &lt; 1000 &amp;&amp;</div><div class='add'>+		hw_rev-&gt;minor &lt; 1000;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_devlink_info_get() - Report the product information.</div><div class='add'>+ * @devlink: Devlink.</div><div class='add'>+ * @req: skb wrapper where to put requested information.</div><div class='add'>+ * @extack: Unused.</div><div class='add'>+ *</div><div class='add'>+ * Report the firmware version, the bootloader version, the hardware</div><div class='add'>+ * revision and the serial number through netlink.</div><div class='add'>+ *</div><div class='add'>+ * Return: zero on success, errno when any error occurs.</div><div class='add'>+ */</div><div class='add'>+static int es58x_devlink_info_get(struct devlink *devlink,</div><div class='add'>+				  struct devlink_info_req *req,</div><div class='add'>+				  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct es58x_device *es58x_dev = devlink_priv(devlink);</div><div class='add'>+	struct es58x_sw_version *fw_ver = &amp;es58x_dev-&gt;firmware_version;</div><div class='add'>+	struct es58x_sw_version *bl_ver = &amp;es58x_dev-&gt;bootloader_version;</div><div class='add'>+	struct es58x_hw_revision *hw_rev = &amp;es58x_dev-&gt;hardware_revision;</div><div class='add'>+	char buf[MAX(sizeof("xx.xx.xx"), sizeof("axxx/xxx"))];</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (es58x_sw_version_is_valid(fw_ver)) {</div><div class='add'>+		snprintf(buf, sizeof(buf), "%02u.%02u.%02u",</div><div class='add'>+			 fw_ver-&gt;major, fw_ver-&gt;minor, fw_ver-&gt;revision);</div><div class='add'>+		ret = devlink_info_version_running_put(req,</div><div class='add'>+						       DEVLINK_INFO_VERSION_GENERIC_FW,</div><div class='add'>+						       buf);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (es58x_sw_version_is_valid(bl_ver)) {</div><div class='add'>+		snprintf(buf, sizeof(buf), "%02u.%02u.%02u",</div><div class='add'>+			 bl_ver-&gt;major, bl_ver-&gt;minor, bl_ver-&gt;revision);</div><div class='add'>+		ret = devlink_info_version_running_put(req,</div><div class='add'>+						       DEVLINK_INFO_VERSION_GENERIC_FW_BOOTLOADER,</div><div class='add'>+						       buf);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (es58x_hw_revision_is_valid(hw_rev)) {</div><div class='add'>+		snprintf(buf, sizeof(buf), "%c%03u/%03u",</div><div class='add'>+			 hw_rev-&gt;letter, hw_rev-&gt;major, hw_rev-&gt;minor);</div><div class='add'>+		ret = devlink_info_version_fixed_put(req,</div><div class='add'>+						     DEVLINK_INFO_VERSION_GENERIC_BOARD_REV,</div><div class='add'>+						     buf);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (es58x_dev-&gt;udev-&gt;serial)</div><div class='add'>+		ret = devlink_info_serial_number_put(req,</div><div class='add'>+						     es58x_dev-&gt;udev-&gt;serial);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct devlink_ops es58x_dl_ops = {</div><div class='add'>+	.info_get = es58x_devlink_info_get,</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/net/can/usb/etas_es58x/es58x_fd.c b/drivers/net/can/usb/etas_es58x/es58x_fd.c<br/>new file mode 100644<br/>index 000000000000..6476add1c105<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/etas_es58x/es58x_fd.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/etas_es58x/es58x_fd.c</a></div><div class='hunk'>@@ -0,0 +1,565 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+/* Driver for ETAS GmbH ES58X USB CAN(-FD) Bus Interfaces.</div><div class='add'>+ *</div><div class='add'>+ * File es58x_fd.c: Adds support to ETAS ES582.1 and ES584.1 (naming</div><div class='add'>+ * convention: we use the term "ES58X FD" when referring to those two</div><div class='add'>+ * variants together).</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2019 Robert Bosch Engineering and Business Solutions. All rights reserved.</div><div class='add'>+ * Copyright (c) 2020 ETAS K.K.. All rights reserved.</div><div class='add'>+ * Copyright (c) 2020-2022 Vincent Mailhol &lt;mailhol.vincent@wanadoo.fr&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/unaligned.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/units.h&gt;</div><div class='add'>+</div><div class='add'>+#include "es58x_core.h"</div><div class='add'>+#include "es58x_fd.h"</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * es58x_fd_sizeof_rx_tx_msg() - Calculate the actual length of the</div><div class='add'>+ *	structure of a rx or tx message.</div><div class='add'>+ * @msg: message of variable length, must have a dlc and a len fields.</div><div class='add'>+ *</div><div class='add'>+ * Even if RTR frames have actually no payload, the ES58X devices</div><div class='add'>+ * still expect it. Must be a macro in order to accept several types</div><div class='add'>+ * (struct es58x_fd_tx_can_msg and struct es58x_fd_rx_can_msg) as an</div><div class='add'>+ * input.</div><div class='add'>+ *</div><div class='add'>+ * Return: length of the message.</div><div class='add'>+ */</div><div class='add'>+#define es58x_fd_sizeof_rx_tx_msg(msg)					\</div><div class='add'>+({									\</div><div class='add'>+	typeof(msg) __msg = (msg);					\</div><div class='add'>+	size_t __msg_len;						\</div><div class='add'>+									\</div><div class='add'>+	if (__msg.flags &amp; ES58X_FLAG_FD_DATA)				\</div><div class='add'>+		__msg_len = canfd_sanitize_len(__msg.len);		\</div><div class='add'>+	else								\</div><div class='add'>+		__msg_len = can_cc_dlc2len(__msg.dlc);			\</div><div class='add'>+									\</div><div class='add'>+	offsetof(typeof(__msg), data[__msg_len]);			\</div><div class='add'>+})</div><div class='add'>+</div><div class='add'>+static enum es58x_fd_cmd_type es58x_fd_cmd_type(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	u32 ctrlmode = es58x_priv(netdev)-&gt;can.ctrlmode;</div><div class='add'>+</div><div class='add'>+	if (ctrlmode &amp; (CAN_CTRLMODE_FD | CAN_CTRLMODE_FD_NON_ISO))</div><div class='add'>+		return ES58X_FD_CMD_TYPE_CANFD;</div><div class='add'>+	else</div><div class='add'>+		return ES58X_FD_CMD_TYPE_CAN;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 es58x_fd_get_msg_len(const union es58x_urb_cmd *urb_cmd)</div><div class='add'>+{</div><div class='add'>+	return get_unaligned_le16(&amp;urb_cmd-&gt;es58x_fd_urb_cmd.msg_len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int es58x_fd_echo_msg(struct net_device *netdev,</div><div class='add'>+			     const struct es58x_fd_urb_cmd *es58x_fd_urb_cmd)</div><div class='add'>+{</div><div class='add'>+	struct es58x_priv *priv = es58x_priv(netdev);</div><div class='add'>+	const struct es58x_fd_echo_msg *echo_msg;</div><div class='add'>+	struct es58x_device *es58x_dev = priv-&gt;es58x_dev;</div><div class='add'>+	u64 *tstamps = es58x_dev-&gt;timestamps;</div><div class='add'>+	u16 msg_len = get_unaligned_le16(&amp;es58x_fd_urb_cmd-&gt;msg_len);</div><div class='add'>+	int i, num_element;</div><div class='add'>+	u32 rcv_packet_idx;</div><div class='add'>+</div><div class='add'>+	const u32 mask = GENMASK(BITS_PER_TYPE(mask) - 1,</div><div class='add'>+				 BITS_PER_TYPE(echo_msg-&gt;packet_idx));</div><div class='add'>+</div><div class='add'>+	num_element = es58x_msg_num_element(es58x_dev-&gt;dev,</div><div class='add'>+					    es58x_fd_urb_cmd-&gt;echo_msg,</div><div class='add'>+					    msg_len);</div><div class='add'>+	if (num_element &lt; 0)</div><div class='add'>+		return num_element;</div><div class='add'>+	echo_msg = es58x_fd_urb_cmd-&gt;echo_msg;</div><div class='add'>+</div><div class='add'>+	rcv_packet_idx = (priv-&gt;tx_tail &amp; mask) | echo_msg[0].packet_idx;</div><div class='add'>+	for (i = 0; i &lt; num_element; i++) {</div><div class='add'>+		if ((u8)rcv_packet_idx != echo_msg[i].packet_idx) {</div><div class='add'>+			netdev_err(netdev, "Packet idx jumped from %u to %u\n",</div><div class='add'>+				   (u8)rcv_packet_idx - 1,</div><div class='add'>+				   echo_msg[i].packet_idx);</div><div class='add'>+			return -EBADMSG;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		tstamps[i] = get_unaligned_le64(&amp;echo_msg[i].timestamp);</div><div class='add'>+		rcv_packet_idx++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return es58x_can_get_echo_skb(netdev, priv-&gt;tx_tail, tstamps, num_element);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int es58x_fd_rx_can_msg(struct net_device *netdev,</div><div class='add'>+			       const struct es58x_fd_urb_cmd *es58x_fd_urb_cmd)</div><div class='add'>+{</div><div class='add'>+	struct es58x_device *es58x_dev = es58x_priv(netdev)-&gt;es58x_dev;</div><div class='add'>+	const u8 *rx_can_msg_buf = es58x_fd_urb_cmd-&gt;rx_can_msg_buf;</div><div class='add'>+	u16 rx_can_msg_buf_len = get_unaligned_le16(&amp;es58x_fd_urb_cmd-&gt;msg_len);</div><div class='add'>+	int pkts, ret;</div><div class='add'>+</div><div class='add'>+	ret = es58x_check_msg_max_len(es58x_dev-&gt;dev,</div><div class='add'>+				      es58x_fd_urb_cmd-&gt;rx_can_msg_buf,</div><div class='add'>+				      rx_can_msg_buf_len);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	for (pkts = 0; rx_can_msg_buf_len &gt; 0; pkts++) {</div><div class='add'>+		const struct es58x_fd_rx_can_msg *rx_can_msg =</div><div class='add'>+		    (const struct es58x_fd_rx_can_msg *)rx_can_msg_buf;</div><div class='add'>+		bool is_can_fd = !!(rx_can_msg-&gt;flags &amp; ES58X_FLAG_FD_DATA);</div><div class='add'>+		/* rx_can_msg_len is the length of the rx_can_msg</div><div class='add'>+		 * buffer. Not to be confused with rx_can_msg-&gt;len</div><div class='add'>+		 * which is the length of the CAN payload</div><div class='add'>+		 * rx_can_msg-&gt;data.</div><div class='add'>+		 */</div><div class='add'>+		u16 rx_can_msg_len = es58x_fd_sizeof_rx_tx_msg(*rx_can_msg);</div><div class='add'>+</div><div class='add'>+		if (rx_can_msg_len &gt; rx_can_msg_buf_len) {</div><div class='add'>+			netdev_err(netdev,</div><div class='add'>+				   "%s: Expected a rx_can_msg of size %d but only %d bytes are left in rx_can_msg_buf\n",</div><div class='add'>+				   __func__,</div><div class='add'>+				   rx_can_msg_len, rx_can_msg_buf_len);</div><div class='add'>+			return -EMSGSIZE;</div><div class='add'>+		}</div><div class='add'>+		if (rx_can_msg-&gt;len &gt; CANFD_MAX_DLEN) {</div><div class='add'>+			netdev_err(netdev,</div><div class='add'>+				   "%s: Data length is %d but maximum should be %d\n",</div><div class='add'>+				   __func__, rx_can_msg-&gt;len, CANFD_MAX_DLEN);</div><div class='add'>+			return -EMSGSIZE;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (netif_running(netdev)) {</div><div class='add'>+			u64 tstamp = get_unaligned_le64(&amp;rx_can_msg-&gt;timestamp);</div><div class='add'>+			canid_t can_id = get_unaligned_le32(&amp;rx_can_msg-&gt;can_id);</div><div class='add'>+			u8 dlc;</div><div class='add'>+</div><div class='add'>+			if (is_can_fd)</div><div class='add'>+				dlc = can_fd_len2dlc(rx_can_msg-&gt;len);</div><div class='add'>+			else</div><div class='add'>+				dlc = rx_can_msg-&gt;dlc;</div><div class='add'>+</div><div class='add'>+			ret = es58x_rx_can_msg(netdev, tstamp, rx_can_msg-&gt;data,</div><div class='add'>+					       can_id, rx_can_msg-&gt;flags, dlc);</div><div class='add'>+			if (ret)</div><div class='add'>+				break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		rx_can_msg_buf_len -= rx_can_msg_len;</div><div class='add'>+		rx_can_msg_buf += rx_can_msg_len;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!netif_running(netdev)) {</div><div class='add'>+		if (net_ratelimit())</div><div class='add'>+			netdev_info(netdev,</div><div class='add'>+				    "%s: %s is down, dropping %d rx packets\n",</div><div class='add'>+				    __func__, netdev-&gt;name, pkts);</div><div class='add'>+		netdev-&gt;stats.rx_dropped += pkts;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int es58x_fd_rx_event_msg(struct net_device *netdev,</div><div class='add'>+				 const struct es58x_fd_urb_cmd *es58x_fd_urb_cmd)</div><div class='add'>+{</div><div class='add'>+	struct es58x_device *es58x_dev = es58x_priv(netdev)-&gt;es58x_dev;</div><div class='add'>+	u16 msg_len = get_unaligned_le16(&amp;es58x_fd_urb_cmd-&gt;msg_len);</div><div class='add'>+	const struct es58x_fd_rx_event_msg *rx_event_msg;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	rx_event_msg = &amp;es58x_fd_urb_cmd-&gt;rx_event_msg;</div><div class='add'>+	ret = es58x_check_msg_len(es58x_dev-&gt;dev, *rx_event_msg, msg_len);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return es58x_rx_err_msg(netdev, rx_event_msg-&gt;error_code,</div><div class='add'>+				rx_event_msg-&gt;event_code,</div><div class='add'>+				get_unaligned_le64(&amp;rx_event_msg-&gt;timestamp));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int es58x_fd_rx_cmd_ret_u32(struct net_device *netdev,</div><div class='add'>+				   const struct es58x_fd_urb_cmd *es58x_fd_urb_cmd,</div><div class='add'>+				   enum es58x_ret_type cmd_ret_type)</div><div class='add'>+{</div><div class='add'>+	struct es58x_device *es58x_dev = es58x_priv(netdev)-&gt;es58x_dev;</div><div class='add'>+	u16 msg_len = get_unaligned_le16(&amp;es58x_fd_urb_cmd-&gt;msg_len);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = es58x_check_msg_len(es58x_dev-&gt;dev,</div><div class='add'>+				  es58x_fd_urb_cmd-&gt;rx_cmd_ret_le32, msg_len);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return es58x_rx_cmd_ret_u32(netdev, cmd_ret_type,</div><div class='add'>+				    get_unaligned_le32(&amp;es58x_fd_urb_cmd-&gt;rx_cmd_ret_le32));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int es58x_fd_tx_ack_msg(struct net_device *netdev,</div><div class='add'>+			       const struct es58x_fd_urb_cmd *es58x_fd_urb_cmd)</div><div class='add'>+{</div><div class='add'>+	struct es58x_device *es58x_dev = es58x_priv(netdev)-&gt;es58x_dev;</div><div class='add'>+	const struct es58x_fd_tx_ack_msg *tx_ack_msg;</div><div class='add'>+	u16 msg_len = get_unaligned_le16(&amp;es58x_fd_urb_cmd-&gt;msg_len);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	tx_ack_msg = &amp;es58x_fd_urb_cmd-&gt;tx_ack_msg;</div><div class='add'>+	ret = es58x_check_msg_len(es58x_dev-&gt;dev, *tx_ack_msg, msg_len);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return es58x_tx_ack_msg(netdev,</div><div class='add'>+				get_unaligned_le16(&amp;tx_ack_msg-&gt;tx_free_entries),</div><div class='add'>+				get_unaligned_le32(&amp;tx_ack_msg-&gt;rx_cmd_ret_le32));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int es58x_fd_can_cmd_id(struct es58x_device *es58x_dev,</div><div class='add'>+			       const struct es58x_fd_urb_cmd *es58x_fd_urb_cmd)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = es58x_get_netdev(es58x_dev, es58x_fd_urb_cmd-&gt;channel_idx,</div><div class='add'>+			       ES58X_FD_CHANNEL_IDX_OFFSET, &amp;netdev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	switch ((enum es58x_fd_can_cmd_id)es58x_fd_urb_cmd-&gt;cmd_id) {</div><div class='add'>+	case ES58X_FD_CAN_CMD_ID_ENABLE_CHANNEL:</div><div class='add'>+		return es58x_fd_rx_cmd_ret_u32(netdev, es58x_fd_urb_cmd,</div><div class='add'>+					       ES58X_RET_TYPE_ENABLE_CHANNEL);</div><div class='add'>+</div><div class='add'>+	case ES58X_FD_CAN_CMD_ID_DISABLE_CHANNEL:</div><div class='add'>+		return es58x_fd_rx_cmd_ret_u32(netdev, es58x_fd_urb_cmd,</div><div class='add'>+					       ES58X_RET_TYPE_DISABLE_CHANNEL);</div><div class='add'>+</div><div class='add'>+	case ES58X_FD_CAN_CMD_ID_TX_MSG:</div><div class='add'>+		return es58x_fd_tx_ack_msg(netdev, es58x_fd_urb_cmd);</div><div class='add'>+</div><div class='add'>+	case ES58X_FD_CAN_CMD_ID_ECHO_MSG:</div><div class='add'>+		return es58x_fd_echo_msg(netdev, es58x_fd_urb_cmd);</div><div class='add'>+</div><div class='add'>+	case ES58X_FD_CAN_CMD_ID_RX_MSG:</div><div class='add'>+		return es58x_fd_rx_can_msg(netdev, es58x_fd_urb_cmd);</div><div class='add'>+</div><div class='add'>+	case ES58X_FD_CAN_CMD_ID_RESET_RX:</div><div class='add'>+		return es58x_fd_rx_cmd_ret_u32(netdev, es58x_fd_urb_cmd,</div><div class='add'>+					       ES58X_RET_TYPE_RESET_RX);</div><div class='add'>+</div><div class='add'>+	case ES58X_FD_CAN_CMD_ID_RESET_TX:</div><div class='add'>+		return es58x_fd_rx_cmd_ret_u32(netdev, es58x_fd_urb_cmd,</div><div class='add'>+					       ES58X_RET_TYPE_RESET_TX);</div><div class='add'>+</div><div class='add'>+	case ES58X_FD_CAN_CMD_ID_ERROR_OR_EVENT_MSG:</div><div class='add'>+		return es58x_fd_rx_event_msg(netdev, es58x_fd_urb_cmd);</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		return -EBADRQC;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int es58x_fd_device_cmd_id(struct es58x_device *es58x_dev,</div><div class='add'>+				  const struct es58x_fd_urb_cmd *es58x_fd_urb_cmd)</div><div class='add'>+{</div><div class='add'>+	u16 msg_len = get_unaligned_le16(&amp;es58x_fd_urb_cmd-&gt;msg_len);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	switch ((enum es58x_fd_dev_cmd_id)es58x_fd_urb_cmd-&gt;cmd_id) {</div><div class='add'>+	case ES58X_FD_DEV_CMD_ID_TIMESTAMP:</div><div class='add'>+		ret = es58x_check_msg_len(es58x_dev-&gt;dev,</div><div class='add'>+					  es58x_fd_urb_cmd-&gt;timestamp, msg_len);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+		es58x_rx_timestamp(es58x_dev,</div><div class='add'>+				   get_unaligned_le64(&amp;es58x_fd_urb_cmd-&gt;timestamp));</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		return -EBADRQC;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int es58x_fd_handle_urb_cmd(struct es58x_device *es58x_dev,</div><div class='add'>+				   const union es58x_urb_cmd *urb_cmd)</div><div class='add'>+{</div><div class='add'>+	const struct es58x_fd_urb_cmd *es58x_fd_urb_cmd;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	es58x_fd_urb_cmd = &amp;urb_cmd-&gt;es58x_fd_urb_cmd;</div><div class='add'>+</div><div class='add'>+	switch ((enum es58x_fd_cmd_type)es58x_fd_urb_cmd-&gt;cmd_type) {</div><div class='add'>+	case ES58X_FD_CMD_TYPE_CAN:</div><div class='add'>+	case ES58X_FD_CMD_TYPE_CANFD:</div><div class='add'>+		ret = es58x_fd_can_cmd_id(es58x_dev, es58x_fd_urb_cmd);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case ES58X_FD_CMD_TYPE_DEVICE:</div><div class='add'>+		ret = es58x_fd_device_cmd_id(es58x_dev, es58x_fd_urb_cmd);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		ret = -EBADRQC;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ret == -EBADRQC)</div><div class='add'>+		dev_err(es58x_dev-&gt;dev,</div><div class='add'>+			"%s: Unknown command type (0x%02X) and command ID (0x%02X) combination\n",</div><div class='add'>+			__func__, es58x_fd_urb_cmd-&gt;cmd_type,</div><div class='add'>+			es58x_fd_urb_cmd-&gt;cmd_id);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void es58x_fd_fill_urb_header(union es58x_urb_cmd *urb_cmd, u8 cmd_type,</div><div class='add'>+				     u8 cmd_id, u8 channel_idx, u16 msg_len)</div><div class='add'>+{</div><div class='add'>+	struct es58x_fd_urb_cmd *es58x_fd_urb_cmd = &amp;urb_cmd-&gt;es58x_fd_urb_cmd;</div><div class='add'>+</div><div class='add'>+	es58x_fd_urb_cmd-&gt;SOF = cpu_to_le16(es58x_fd_param.tx_start_of_frame);</div><div class='add'>+	es58x_fd_urb_cmd-&gt;cmd_type = cmd_type;</div><div class='add'>+	es58x_fd_urb_cmd-&gt;cmd_id = cmd_id;</div><div class='add'>+	es58x_fd_urb_cmd-&gt;channel_idx = channel_idx;</div><div class='add'>+	es58x_fd_urb_cmd-&gt;msg_len = cpu_to_le16(msg_len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int es58x_fd_tx_can_msg(struct es58x_priv *priv,</div><div class='add'>+			       const struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct es58x_device *es58x_dev = priv-&gt;es58x_dev;</div><div class='add'>+	union es58x_urb_cmd *urb_cmd = priv-&gt;tx_urb-&gt;transfer_buffer;</div><div class='add'>+	struct es58x_fd_urb_cmd *es58x_fd_urb_cmd = &amp;urb_cmd-&gt;es58x_fd_urb_cmd;</div><div class='add'>+	struct can_frame *cf = (struct can_frame *)skb-&gt;data;</div><div class='add'>+	struct es58x_fd_tx_can_msg *tx_can_msg;</div><div class='add'>+	bool is_fd = can_is_canfd_skb(skb);</div><div class='add'>+	u16 msg_len;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;tx_can_msg_cnt == 0) {</div><div class='add'>+		msg_len = 0;</div><div class='add'>+		es58x_fd_fill_urb_header(urb_cmd,</div><div class='add'>+					 is_fd ? ES58X_FD_CMD_TYPE_CANFD</div><div class='add'>+					       : ES58X_FD_CMD_TYPE_CAN,</div><div class='add'>+					 ES58X_FD_CAN_CMD_ID_TX_MSG_NO_ACK,</div><div class='add'>+					 priv-&gt;channel_idx, msg_len);</div><div class='add'>+	} else {</div><div class='add'>+		msg_len = es58x_fd_get_msg_len(urb_cmd);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = es58x_check_msg_max_len(es58x_dev-&gt;dev,</div><div class='add'>+				      es58x_fd_urb_cmd-&gt;tx_can_msg_buf,</div><div class='add'>+				      msg_len + sizeof(*tx_can_msg));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Fill message contents. */</div><div class='add'>+	tx_can_msg = (typeof(tx_can_msg))&amp;es58x_fd_urb_cmd-&gt;raw_msg[msg_len];</div><div class='add'>+	tx_can_msg-&gt;packet_idx = (u8)priv-&gt;tx_head;</div><div class='add'>+	put_unaligned_le32(es58x_get_raw_can_id(cf), &amp;tx_can_msg-&gt;can_id);</div><div class='add'>+	tx_can_msg-&gt;flags = (u8)es58x_get_flags(skb);</div><div class='add'>+	if (is_fd)</div><div class='add'>+		tx_can_msg-&gt;len = cf-&gt;len;</div><div class='add'>+	else</div><div class='add'>+		tx_can_msg-&gt;dlc = can_get_cc_dlc(cf, priv-&gt;can.ctrlmode);</div><div class='add'>+	memcpy(tx_can_msg-&gt;data, cf-&gt;data, cf-&gt;len);</div><div class='add'>+</div><div class='add'>+	/* Calculate new sizes */</div><div class='add'>+	msg_len += es58x_fd_sizeof_rx_tx_msg(*tx_can_msg);</div><div class='add'>+	priv-&gt;tx_urb-&gt;transfer_buffer_length = es58x_get_urb_cmd_len(es58x_dev,</div><div class='add'>+								     msg_len);</div><div class='add'>+	put_unaligned_le16(msg_len, &amp;es58x_fd_urb_cmd-&gt;msg_len);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void es58x_fd_convert_bittiming(struct es58x_fd_bittiming *es58x_fd_bt,</div><div class='add'>+				       struct can_bittiming *bt)</div><div class='add'>+{</div><div class='add'>+	/* The actual value set in the hardware registers is one less</div><div class='add'>+	 * than the functional value.</div><div class='add'>+	 */</div><div class='add'>+	const int offset = 1;</div><div class='add'>+</div><div class='add'>+	es58x_fd_bt-&gt;bitrate = cpu_to_le32(bt-&gt;bitrate);</div><div class='add'>+	es58x_fd_bt-&gt;tseg1 =</div><div class='add'>+	    cpu_to_le16(bt-&gt;prop_seg + bt-&gt;phase_seg1 - offset);</div><div class='add'>+	es58x_fd_bt-&gt;tseg2 = cpu_to_le16(bt-&gt;phase_seg2 - offset);</div><div class='add'>+	es58x_fd_bt-&gt;brp = cpu_to_le16(bt-&gt;brp - offset);</div><div class='add'>+	es58x_fd_bt-&gt;sjw = cpu_to_le16(bt-&gt;sjw - offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int es58x_fd_enable_channel(struct es58x_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct es58x_device *es58x_dev = priv-&gt;es58x_dev;</div><div class='add'>+	struct net_device *netdev = es58x_dev-&gt;netdev[priv-&gt;channel_idx];</div><div class='add'>+	struct es58x_fd_tx_conf_msg tx_conf_msg = { 0 };</div><div class='add'>+	u32 ctrlmode;</div><div class='add'>+	size_t conf_len = 0;</div><div class='add'>+</div><div class='add'>+	es58x_fd_convert_bittiming(&amp;tx_conf_msg.nominal_bittiming,</div><div class='add'>+				   &amp;priv-&gt;can.bittiming);</div><div class='add'>+	ctrlmode = priv-&gt;can.ctrlmode;</div><div class='add'>+</div><div class='add'>+	if (ctrlmode &amp; CAN_CTRLMODE_3_SAMPLES)</div><div class='add'>+		tx_conf_msg.samples_per_bit = ES58X_SAMPLES_PER_BIT_THREE;</div><div class='add'>+	else</div><div class='add'>+		tx_conf_msg.samples_per_bit = ES58X_SAMPLES_PER_BIT_ONE;</div><div class='add'>+	tx_conf_msg.sync_edge = ES58X_SYNC_EDGE_SINGLE;</div><div class='add'>+	tx_conf_msg.physical_layer = ES58X_PHYSICAL_LAYER_HIGH_SPEED;</div><div class='add'>+	tx_conf_msg.echo_mode = ES58X_ECHO_ON;</div><div class='add'>+	if (ctrlmode &amp; CAN_CTRLMODE_LISTENONLY)</div><div class='add'>+		tx_conf_msg.ctrlmode |= ES58X_FD_CTRLMODE_PASSIVE;</div><div class='add'>+	else</div><div class='add'>+		tx_conf_msg.ctrlmode |=  ES58X_FD_CTRLMODE_ACTIVE;</div><div class='add'>+</div><div class='add'>+	if (ctrlmode &amp; CAN_CTRLMODE_FD_NON_ISO) {</div><div class='add'>+		tx_conf_msg.ctrlmode |= ES58X_FD_CTRLMODE_FD_NON_ISO;</div><div class='add'>+		tx_conf_msg.canfd_enabled = 1;</div><div class='add'>+	} else if (ctrlmode &amp; CAN_CTRLMODE_FD) {</div><div class='add'>+		tx_conf_msg.ctrlmode |= ES58X_FD_CTRLMODE_FD;</div><div class='add'>+		tx_conf_msg.canfd_enabled = 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (tx_conf_msg.canfd_enabled) {</div><div class='add'>+		es58x_fd_convert_bittiming(&amp;tx_conf_msg.data_bittiming,</div><div class='add'>+					   &amp;priv-&gt;can.fd.data_bittiming);</div><div class='add'>+</div><div class='add'>+		if (can_fd_tdc_is_enabled(&amp;priv-&gt;can)) {</div><div class='add'>+			tx_conf_msg.tdc_enabled = 1;</div><div class='add'>+			tx_conf_msg.tdco = cpu_to_le16(priv-&gt;can.fd.tdc.tdco);</div><div class='add'>+			tx_conf_msg.tdcf = cpu_to_le16(priv-&gt;can.fd.tdc.tdcf);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		conf_len = ES58X_FD_CANFD_CONF_LEN;</div><div class='add'>+	} else {</div><div class='add'>+		conf_len = ES58X_FD_CAN_CONF_LEN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return es58x_send_msg(es58x_dev, es58x_fd_cmd_type(netdev),</div><div class='add'>+			      ES58X_FD_CAN_CMD_ID_ENABLE_CHANNEL,</div><div class='add'>+			      &amp;tx_conf_msg, conf_len, priv-&gt;channel_idx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int es58x_fd_disable_channel(struct es58x_priv *priv)</div><div class='add'>+{</div><div class='add'>+	/* The type (ES58X_FD_CMD_TYPE_CAN or ES58X_FD_CMD_TYPE_CANFD) does</div><div class='add'>+	 * not matter here.</div><div class='add'>+	 */</div><div class='add'>+	return es58x_send_msg(priv-&gt;es58x_dev, ES58X_FD_CMD_TYPE_CAN,</div><div class='add'>+			      ES58X_FD_CAN_CMD_ID_DISABLE_CHANNEL,</div><div class='add'>+			      ES58X_EMPTY_MSG, 0, priv-&gt;channel_idx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int es58x_fd_get_timestamp(struct es58x_device *es58x_dev)</div><div class='add'>+{</div><div class='add'>+	return es58x_send_msg(es58x_dev, ES58X_FD_CMD_TYPE_DEVICE,</div><div class='add'>+			      ES58X_FD_DEV_CMD_ID_TIMESTAMP, ES58X_EMPTY_MSG,</div><div class='add'>+			      0, ES58X_CHANNEL_IDX_NA);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Nominal bittiming constants for ES582.1 and ES584.1 as specified in</div><div class='add'>+ * the microcontroller datasheet: "SAM E70/S70/V70/V71 Family" section</div><div class='add'>+ * 49.6.8 "MCAN Nominal Bit Timing and Prescaler Register" from</div><div class='add'>+ * Microchip.</div><div class='add'>+ *</div><div class='add'>+ * The values from the specification are the hardware register</div><div class='add'>+ * values. To convert them to the functional values, all ranges were</div><div class='add'>+ * incremented by 1 (e.g. range [0..n-1] changed to [1..n]).</div><div class='add'>+ */</div><div class='add'>+static const struct can_bittiming_const es58x_fd_nom_bittiming_const = {</div><div class='add'>+	.name = "ES582.1/ES584.1",</div><div class='add'>+	.tseg1_min = 2,</div><div class='add'>+	.tseg1_max = 256,</div><div class='add'>+	.tseg2_min = 2,</div><div class='add'>+	.tseg2_max = 128,</div><div class='add'>+	.sjw_max = 128,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 512,</div><div class='add'>+	.brp_inc = 1</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Data bittiming constants for ES582.1 and ES584.1 as specified in</div><div class='add'>+ * the microcontroller datasheet: "SAM E70/S70/V70/V71 Family" section</div><div class='add'>+ * 49.6.4 "MCAN Data Bit Timing and Prescaler Register" from</div><div class='add'>+ * Microchip.</div><div class='add'>+ */</div><div class='add'>+static const struct can_bittiming_const es58x_fd_data_bittiming_const = {</div><div class='add'>+	.name = "ES582.1/ES584.1",</div><div class='add'>+	.tseg1_min = 2,</div><div class='add'>+	.tseg1_max = 32,</div><div class='add'>+	.tseg2_min = 1,</div><div class='add'>+	.tseg2_max = 16,</div><div class='add'>+	.sjw_max = 8,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 32,</div><div class='add'>+	.brp_inc = 1</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Transmission Delay Compensation constants for ES582.1 and ES584.1</div><div class='add'>+ * as specified in the microcontroller datasheet: "SAM E70/S70/V70/V71</div><div class='add'>+ * Family" section 49.6.15 "MCAN Transmitter Delay Compensation</div><div class='add'>+ * Register" from Microchip.</div><div class='add'>+ */</div><div class='add'>+static const struct can_tdc_const es58x_tdc_const = {</div><div class='add'>+	.tdcv_min = 0,</div><div class='add'>+	.tdcv_max = 0, /* Manual mode not supported. */</div><div class='add'>+	.tdco_min = 0,</div><div class='add'>+	.tdco_max = 127,</div><div class='add'>+	.tdcf_min = 0,</div><div class='add'>+	.tdcf_max = 127</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct es58x_parameters es58x_fd_param = {</div><div class='add'>+	.bittiming_const = &amp;es58x_fd_nom_bittiming_const,</div><div class='add'>+	.data_bittiming_const = &amp;es58x_fd_data_bittiming_const,</div><div class='add'>+	.tdc_const = &amp;es58x_tdc_const,</div><div class='add'>+	/* The devices use NXP TJA1044G transievers which guarantee</div><div class='add'>+	 * the timing for data rates up to 5 Mbps. Bitrates up to 8</div><div class='add'>+	 * Mbps work in an optimal environment but are not recommended</div><div class='add'>+	 * for production environment.</div><div class='add'>+	 */</div><div class='add'>+	.bitrate_max = 8 * MEGA /* BPS */,</div><div class='add'>+	.clock = {.freq = 80 * MEGA /* Hz */},</div><div class='add'>+	.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK | CAN_CTRLMODE_LISTENONLY |</div><div class='add'>+	    CAN_CTRLMODE_3_SAMPLES | CAN_CTRLMODE_FD | CAN_CTRLMODE_FD_NON_ISO |</div><div class='add'>+	    CAN_CTRLMODE_CC_LEN8_DLC | CAN_CTRLMODE_TDC_AUTO,</div><div class='add'>+	.tx_start_of_frame = 0xCEFA,	/* FACE in little endian */</div><div class='add'>+	.rx_start_of_frame = 0xFECA,	/* CAFE in little endian */</div><div class='add'>+	.tx_urb_cmd_max_len = ES58X_FD_TX_URB_CMD_MAX_LEN,</div><div class='add'>+	.rx_urb_cmd_max_len = ES58X_FD_RX_URB_CMD_MAX_LEN,</div><div class='add'>+	/* Size of internal device TX queue is 500.</div><div class='add'>+	 *</div><div class='add'>+	 * However, when reaching value around 278, the device's busy</div><div class='add'>+	 * LED turns on and thus maximum value of 500 is never reached</div><div class='add'>+	 * in practice. Also, when this value is too high, some error</div><div class='add'>+	 * on the echo_msg were witnessed when the device is</div><div class='add'>+	 * recovering from bus off.</div><div class='add'>+	 *</div><div class='add'>+	 * For above reasons, a value that would prevent the device</div><div class='add'>+	 * from becoming busy was chosen. In practice, BQL would</div><div class='add'>+	 * prevent the value from even getting closer to below</div><div class='add'>+	 * maximum, so no impact on performance was measured.</div><div class='add'>+	 */</div><div class='add'>+	.fifo_mask = 255, /* echo_skb_max = 256 */</div><div class='add'>+	.dql_min_limit = CAN_FRAME_LEN_MAX * 15, /* Empirical value. */</div><div class='add'>+	.tx_bulk_max = ES58X_FD_TX_BULK_MAX,</div><div class='add'>+	.urb_cmd_header_len = ES58X_FD_URB_CMD_HEADER_LEN,</div><div class='add'>+	.rx_urb_max = ES58X_RX_URBS_MAX,</div><div class='add'>+	.tx_urb_max = ES58X_TX_URBS_MAX</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct es58x_operators es58x_fd_ops = {</div><div class='add'>+	.get_msg_len = es58x_fd_get_msg_len,</div><div class='add'>+	.handle_urb_cmd = es58x_fd_handle_urb_cmd,</div><div class='add'>+	.fill_urb_header = es58x_fd_fill_urb_header,</div><div class='add'>+	.tx_can_msg = es58x_fd_tx_can_msg,</div><div class='add'>+	.enable_channel = es58x_fd_enable_channel,</div><div class='add'>+	.disable_channel = es58x_fd_disable_channel,</div><div class='add'>+	.reset_device = NULL, /* Not implemented in the device firmware. */</div><div class='add'>+	.get_timestamp = es58x_fd_get_timestamp</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/net/can/usb/etas_es58x/es58x_fd.h b/drivers/net/can/usb/etas_es58x/es58x_fd.h<br/>new file mode 100644<br/>index 000000000000..c4b19a6a33ae<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/etas_es58x/es58x_fd.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/etas_es58x/es58x_fd.h</a></div><div class='hunk'>@@ -0,0 +1,234 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+</div><div class='add'>+/* Driver for ETAS GmbH ES58X USB CAN(-FD) Bus Interfaces.</div><div class='add'>+ *</div><div class='add'>+ * File es58x_fd.h: Definitions and declarations specific to ETAS</div><div class='add'>+ * ES582.1 and ES584.1 (naming convention: we use the term "ES58X FD"</div><div class='add'>+ * when referring to those two variants together).</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2019 Robert Bosch Engineering and Business Solutions. All rights reserved.</div><div class='add'>+ * Copyright (c) 2020 ETAS K.K.. All rights reserved.</div><div class='add'>+ * Copyright (c) 2020, 2021 Vincent Mailhol &lt;mailhol.vincent@wanadoo.fr&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __ES58X_FD_H__</div><div class='add'>+#define __ES58X_FD_H__</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+#define ES582_1_NUM_CAN_CH 2</div><div class='add'>+#define ES584_1_NUM_CAN_CH 1</div><div class='add'>+#define ES58X_FD_NUM_CAN_CH 2</div><div class='add'>+#define ES58X_FD_CHANNEL_IDX_OFFSET 0</div><div class='add'>+</div><div class='add'>+#define ES58X_FD_TX_BULK_MAX 100</div><div class='add'>+#define ES58X_FD_RX_BULK_MAX 100</div><div class='add'>+#define ES58X_FD_ECHO_BULK_MAX 100</div><div class='add'>+</div><div class='add'>+enum es58x_fd_cmd_type {</div><div class='add'>+	ES58X_FD_CMD_TYPE_CAN = 0x03,</div><div class='add'>+	ES58X_FD_CMD_TYPE_CANFD = 0x04,</div><div class='add'>+	ES58X_FD_CMD_TYPE_DEVICE = 0xFF</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Command IDs for ES58X_FD_CMD_TYPE_{CAN,CANFD}. */</div><div class='add'>+enum es58x_fd_can_cmd_id {</div><div class='add'>+	ES58X_FD_CAN_CMD_ID_ENABLE_CHANNEL = 0x01,</div><div class='add'>+	ES58X_FD_CAN_CMD_ID_DISABLE_CHANNEL = 0x02,</div><div class='add'>+	ES58X_FD_CAN_CMD_ID_TX_MSG = 0x05,</div><div class='add'>+	ES58X_FD_CAN_CMD_ID_ECHO_MSG = 0x07,</div><div class='add'>+	ES58X_FD_CAN_CMD_ID_RX_MSG = 0x10,</div><div class='add'>+	ES58X_FD_CAN_CMD_ID_ERROR_OR_EVENT_MSG = 0x11,</div><div class='add'>+	ES58X_FD_CAN_CMD_ID_RESET_RX = 0x20,</div><div class='add'>+	ES58X_FD_CAN_CMD_ID_RESET_TX = 0x21,</div><div class='add'>+	ES58X_FD_CAN_CMD_ID_TX_MSG_NO_ACK = 0x55</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Command IDs for ES58X_FD_CMD_TYPE_DEVICE. */</div><div class='add'>+enum es58x_fd_dev_cmd_id {</div><div class='add'>+	ES58X_FD_DEV_CMD_ID_GETTIMETICKS = 0x01,</div><div class='add'>+	ES58X_FD_DEV_CMD_ID_TIMESTAMP = 0x02</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * enum es58x_fd_ctrlmode - Controller mode.</div><div class='add'>+ * @ES58X_FD_CTRLMODE_ACTIVE: send and receive messages.</div><div class='add'>+ * @ES58X_FD_CTRLMODE_PASSIVE: only receive messages (monitor). Do not</div><div class='add'>+ *	send anything, not even the acknowledgment bit.</div><div class='add'>+ * @ES58X_FD_CTRLMODE_FD: CAN FD according to ISO11898-1.</div><div class='add'>+ * @ES58X_FD_CTRLMODE_FD_NON_ISO: follow Bosch CAN FD Specification</div><div class='add'>+ *	V1.0</div><div class='add'>+ * @ES58X_FD_CTRLMODE_DISABLE_PROTOCOL_EXCEPTION_HANDLING: How to</div><div class='add'>+ *	behave when CAN FD reserved bit is monitored as</div><div class='add'>+ *	dominant. (c.f. ISO 11898-1:2015, section 10.4.2.4 "Control</div><div class='add'>+ *	field", paragraph "r0 bit"). 0 (not disable = enable): send</div><div class='add'>+ *	error frame. 1 (disable): goes into bus integration mode</div><div class='add'>+ *	(c.f. below).</div><div class='add'>+ * @ES58X_FD_CTRLMODE_EDGE_FILTER_DURING_BUS_INTEGRATION: 0: Edge</div><div class='add'>+ *	filtering is disabled. 1: Edge filtering is enabled. Two</div><div class='add'>+ *	consecutive dominant bits required to detect an edge for hard</div><div class='add'>+ *	synchronization.</div><div class='add'>+ */</div><div class='add'>+enum es58x_fd_ctrlmode {</div><div class='add'>+	ES58X_FD_CTRLMODE_ACTIVE = 0,</div><div class='add'>+	ES58X_FD_CTRLMODE_PASSIVE = BIT(0),</div><div class='add'>+	ES58X_FD_CTRLMODE_FD = BIT(4),</div><div class='add'>+	ES58X_FD_CTRLMODE_FD_NON_ISO = BIT(5),</div><div class='add'>+	ES58X_FD_CTRLMODE_DISABLE_PROTOCOL_EXCEPTION_HANDLING = BIT(6),</div><div class='add'>+	ES58X_FD_CTRLMODE_EDGE_FILTER_DURING_BUS_INTEGRATION = BIT(7)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct es58x_fd_bittiming {</div><div class='add'>+	__le32 bitrate;</div><div class='add'>+	__le16 tseg1;		/* range: [tseg1_min-1..tseg1_max-1] */</div><div class='add'>+	__le16 tseg2;		/* range: [tseg2_min-1..tseg2_max-1] */</div><div class='add'>+	__le16 brp;		/* range: [brp_min-1..brp_max-1] */</div><div class='add'>+	__le16 sjw;		/* range: [0..sjw_max-1] */</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct es58x_fd_tx_conf_msg - Channel configuration.</div><div class='add'>+ * @nominal_bittiming: Nominal bittiming.</div><div class='add'>+ * @samples_per_bit: type enum es58x_samples_per_bit.</div><div class='add'>+ * @sync_edge: type enum es58x_sync_edge.</div><div class='add'>+ * @physical_layer: type enum es58x_physical_layer.</div><div class='add'>+ * @echo_mode: type enum es58x_echo_mode.</div><div class='add'>+ * @ctrlmode: type enum es58x_fd_ctrlmode.</div><div class='add'>+ * @canfd_enabled: boolean (0: Classical CAN, 1: CAN and/or CANFD).</div><div class='add'>+ * @data_bittiming: Bittiming for flexible data-rate transmission.</div><div class='add'>+ * @tdc_enabled: Transmitter Delay Compensation switch (0: TDC is</div><div class='add'>+ *	disabled, 1: TDC is enabled).</div><div class='add'>+ * @tdco: Transmitter Delay Compensation Offset.</div><div class='add'>+ * @tdcf: Transmitter Delay Compensation Filter window.</div><div class='add'>+ *</div><div class='add'>+ * Please refer to the microcontroller datasheet: "SAM E70/S70/V70/V71</div><div class='add'>+ * Family" section 49 "Controller Area Network (MCAN)" for additional</div><div class='add'>+ * information.</div><div class='add'>+ */</div><div class='add'>+struct es58x_fd_tx_conf_msg {</div><div class='add'>+	struct es58x_fd_bittiming nominal_bittiming;</div><div class='add'>+	u8 samples_per_bit;</div><div class='add'>+	u8 sync_edge;</div><div class='add'>+	u8 physical_layer;</div><div class='add'>+	u8 echo_mode;</div><div class='add'>+	u8 ctrlmode;</div><div class='add'>+	u8 canfd_enabled;</div><div class='add'>+	struct es58x_fd_bittiming data_bittiming;</div><div class='add'>+	u8 tdc_enabled;</div><div class='add'>+	__le16 tdco;</div><div class='add'>+	__le16 tdcf;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+#define ES58X_FD_CAN_CONF_LEN					\</div><div class='add'>+	(offsetof(struct es58x_fd_tx_conf_msg, canfd_enabled))</div><div class='add'>+#define ES58X_FD_CANFD_CONF_LEN (sizeof(struct es58x_fd_tx_conf_msg))</div><div class='add'>+</div><div class='add'>+struct es58x_fd_tx_can_msg {</div><div class='add'>+	u8 packet_idx;</div><div class='add'>+	__le32 can_id;</div><div class='add'>+	u8 flags;</div><div class='add'>+	union {</div><div class='add'>+		u8 dlc;		/* Only if cmd_id is ES58X_FD_CMD_TYPE_CAN */</div><div class='add'>+		u8 len;		/* Only if cmd_id is ES58X_FD_CMD_TYPE_CANFD */</div><div class='add'>+	} __packed;</div><div class='add'>+	u8 data[CANFD_MAX_DLEN];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+#define ES58X_FD_CAN_TX_LEN						\</div><div class='add'>+	(offsetof(struct es58x_fd_tx_can_msg, data[CAN_MAX_DLEN]))</div><div class='add'>+#define ES58X_FD_CANFD_TX_LEN (sizeof(struct es58x_fd_tx_can_msg))</div><div class='add'>+</div><div class='add'>+struct es58x_fd_rx_can_msg {</div><div class='add'>+	__le64 timestamp;</div><div class='add'>+	__le32 can_id;</div><div class='add'>+	u8 flags;</div><div class='add'>+	union {</div><div class='add'>+		u8 dlc;		/* Only if cmd_id is ES58X_FD_CMD_TYPE_CAN */</div><div class='add'>+		u8 len;		/* Only if cmd_id is ES58X_FD_CMD_TYPE_CANFD */</div><div class='add'>+	} __packed;</div><div class='add'>+	u8 data[CANFD_MAX_DLEN];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+#define ES58X_FD_CAN_RX_LEN						\</div><div class='add'>+	(offsetof(struct es58x_fd_rx_can_msg, data[CAN_MAX_DLEN]))</div><div class='add'>+#define ES58X_FD_CANFD_RX_LEN (sizeof(struct es58x_fd_rx_can_msg))</div><div class='add'>+</div><div class='add'>+struct es58x_fd_echo_msg {</div><div class='add'>+	__le64 timestamp;</div><div class='add'>+	u8 packet_idx;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct es58x_fd_rx_event_msg {</div><div class='add'>+	__le64 timestamp;</div><div class='add'>+	__le32 can_id;</div><div class='add'>+	u8 flags;		/* type enum es58x_flag */</div><div class='add'>+	u8 error_type;		/* 0: event, 1: error */</div><div class='add'>+	u8 error_code;</div><div class='add'>+	u8 event_code;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct es58x_fd_tx_ack_msg {</div><div class='add'>+	__le32 rx_cmd_ret_le32;	/* type enum es58x_cmd_ret_code_u32 */</div><div class='add'>+	__le16 tx_free_entries;	/* Number of remaining free entries in the device TX queue */</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct es58x_fd_urb_cmd - Commands received from or sent to the</div><div class='add'>+ *	ES58X FD device.</div><div class='add'>+ * @SOF: Start of Frame.</div><div class='add'>+ * @cmd_type: Command Type (type: enum es58x_fd_cmd_type). The CRC</div><div class='add'>+ *	calculation starts at this position.</div><div class='add'>+ * @cmd_id: Command ID (type: enum es58x_fd_cmd_id).</div><div class='add'>+ * @channel_idx: Channel index starting at 0.</div><div class='add'>+ * @msg_len: Length of the message, excluding CRC (i.e. length of the</div><div class='add'>+ *	union).</div><div class='add'>+ * @tx_conf_msg: Channel configuration.</div><div class='add'>+ * @tx_can_msg_buf: Concatenation of Tx messages. Type is "u8[]"</div><div class='add'>+ *	instead of "struct es58x_fd_tx_msg[]" because the structure</div><div class='add'>+ *	has a flexible size.</div><div class='add'>+ * @rx_can_msg_buf: Concatenation Rx messages. Type is "u8[]" instead</div><div class='add'>+ *	of "struct es58x_fd_rx_msg[]" because the structure has a</div><div class='add'>+ *	flexible size.</div><div class='add'>+ * @echo_msg: Array of echo messages (e.g. Tx messages being looped</div><div class='add'>+ *	back).</div><div class='add'>+ * @rx_event_msg: Error or event message.</div><div class='add'>+ * @tx_ack_msg: Tx acknowledgment message.</div><div class='add'>+ * @timestamp: Timestamp reply.</div><div class='add'>+ * @rx_cmd_ret_le32: Rx 32 bits return code (type: enum</div><div class='add'>+ *	es58x_cmd_ret_code_u32).</div><div class='add'>+ * @raw_msg: Message raw payload.</div><div class='add'>+ * @reserved_for_crc16_do_not_use: The structure ends with a</div><div class='add'>+ *	CRC16. Because the structures in above union are of variable</div><div class='add'>+ *	lengths, we can not predict the offset of the CRC in</div><div class='add'>+ *	advance. Use functions es58x_get_crc() and es58x_set_crc() to</div><div class='add'>+ *	manipulate it.</div><div class='add'>+ */</div><div class='add'>+struct es58x_fd_urb_cmd {</div><div class='add'>+	__le16 SOF;</div><div class='add'>+	u8 cmd_type;</div><div class='add'>+	u8 cmd_id;</div><div class='add'>+	u8 channel_idx;</div><div class='add'>+	__le16 msg_len;</div><div class='add'>+</div><div class='add'>+	union {</div><div class='add'>+		struct es58x_fd_tx_conf_msg tx_conf_msg;</div><div class='add'>+		u8 tx_can_msg_buf[ES58X_FD_TX_BULK_MAX * ES58X_FD_CANFD_TX_LEN];</div><div class='add'>+		u8 rx_can_msg_buf[ES58X_FD_RX_BULK_MAX * ES58X_FD_CANFD_RX_LEN];</div><div class='add'>+		struct es58x_fd_echo_msg echo_msg[ES58X_FD_ECHO_BULK_MAX];</div><div class='add'>+		struct es58x_fd_rx_event_msg rx_event_msg;</div><div class='add'>+		struct es58x_fd_tx_ack_msg tx_ack_msg;</div><div class='add'>+		__le64 timestamp;</div><div class='add'>+		__le32 rx_cmd_ret_le32;</div><div class='add'>+		DECLARE_FLEX_ARRAY(u8, raw_msg);</div><div class='add'>+	} __packed;</div><div class='add'>+</div><div class='add'>+	__le16 reserved_for_crc16_do_not_use;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+#define ES58X_FD_URB_CMD_HEADER_LEN (offsetof(struct es58x_fd_urb_cmd, raw_msg))</div><div class='add'>+#define ES58X_FD_TX_URB_CMD_MAX_LEN					\</div><div class='add'>+	ES58X_SIZEOF_URB_CMD(struct es58x_fd_urb_cmd, tx_can_msg_buf)</div><div class='add'>+#define ES58X_FD_RX_URB_CMD_MAX_LEN					\</div><div class='add'>+	ES58X_SIZEOF_URB_CMD(struct es58x_fd_urb_cmd, rx_can_msg_buf)</div><div class='add'>+</div><div class='add'>+#endif /* __ES58X_FD_H__ */</div><div class='head'>diff --git a/drivers/net/can/usb/f81604.c b/drivers/net/can/usb/f81604.c<br/>new file mode 100644<br/>index 000000000000..efe61ece79ea<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/f81604.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/f81604.c</a></div><div class='hunk'>@@ -0,0 +1,1204 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Fintek F81604 USB-to-2CAN controller driver.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2023 Ji-Ze Hong (Peter Hong) &lt;peter_hong@fintek.com.tw&gt;</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/units.h&gt;</div><div class='add'>+#include &lt;linux/usb.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/can.h&gt;</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/can/error.h&gt;</div><div class='add'>+#include &lt;linux/can/platform/sja1000.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/unaligned.h&gt;</div><div class='add'>+</div><div class='add'>+/* vendor and product id */</div><div class='add'>+#define F81604_VENDOR_ID 0x2c42</div><div class='add'>+#define F81604_PRODUCT_ID 0x1709</div><div class='add'>+#define F81604_CAN_CLOCK (12 * MEGA)</div><div class='add'>+#define F81604_MAX_DEV 2</div><div class='add'>+#define F81604_SET_DEVICE_RETRY 10</div><div class='add'>+</div><div class='add'>+#define F81604_USB_TIMEOUT 2000</div><div class='add'>+#define F81604_SET_GET_REGISTER 0xA0</div><div class='add'>+#define F81604_PORT_OFFSET 0x1000</div><div class='add'>+#define F81604_MAX_RX_URBS 4</div><div class='add'>+</div><div class='add'>+#define F81604_CMD_DATA 0x00</div><div class='add'>+</div><div class='add'>+#define F81604_DLC_LEN_MASK GENMASK(3, 0)</div><div class='add'>+#define F81604_DLC_EFF_BIT BIT(7)</div><div class='add'>+#define F81604_DLC_RTR_BIT BIT(6)</div><div class='add'>+</div><div class='add'>+#define F81604_SFF_SHIFT 5</div><div class='add'>+#define F81604_EFF_SHIFT 3</div><div class='add'>+</div><div class='add'>+#define F81604_BRP_MASK GENMASK(5, 0)</div><div class='add'>+#define F81604_SJW_MASK GENMASK(7, 6)</div><div class='add'>+</div><div class='add'>+#define F81604_SEG1_MASK GENMASK(3, 0)</div><div class='add'>+#define F81604_SEG2_MASK GENMASK(6, 4)</div><div class='add'>+</div><div class='add'>+#define F81604_CLEAR_ALC 0</div><div class='add'>+#define F81604_CLEAR_ECC 1</div><div class='add'>+#define F81604_CLEAR_OVERRUN 2</div><div class='add'>+</div><div class='add'>+/* device setting */</div><div class='add'>+#define F81604_CTRL_MODE_REG 0x80</div><div class='add'>+#define F81604_TX_ONESHOT (0x03 &lt;&lt; 3)</div><div class='add'>+#define F81604_TX_NORMAL (0x01 &lt;&lt; 3)</div><div class='add'>+#define F81604_RX_AUTO_RELEASE_BUF BIT(1)</div><div class='add'>+#define F81604_INT_WHEN_CHANGE BIT(0)</div><div class='add'>+</div><div class='add'>+#define F81604_TERMINATOR_REG 0x105</div><div class='add'>+#define F81604_CAN0_TERM BIT(2)</div><div class='add'>+#define F81604_CAN1_TERM BIT(3)</div><div class='add'>+</div><div class='add'>+#define F81604_TERMINATION_DISABLED CAN_TERMINATION_DISABLED</div><div class='add'>+#define F81604_TERMINATION_ENABLED 120</div><div class='add'>+</div><div class='add'>+/* SJA1000 registers - manual section 6.4 (Pelican Mode) */</div><div class='add'>+#define F81604_SJA1000_MOD 0x00</div><div class='add'>+#define F81604_SJA1000_CMR 0x01</div><div class='add'>+#define F81604_SJA1000_IR 0x03</div><div class='add'>+#define F81604_SJA1000_IER 0x04</div><div class='add'>+#define F81604_SJA1000_ALC 0x0B</div><div class='add'>+#define F81604_SJA1000_ECC 0x0C</div><div class='add'>+#define F81604_SJA1000_RXERR 0x0E</div><div class='add'>+#define F81604_SJA1000_TXERR 0x0F</div><div class='add'>+#define F81604_SJA1000_ACCC0 0x10</div><div class='add'>+#define F81604_SJA1000_ACCM0 0x14</div><div class='add'>+#define F81604_MAX_FILTER_CNT 4</div><div class='add'>+</div><div class='add'>+/* Common registers - manual section 6.5 */</div><div class='add'>+#define F81604_SJA1000_BTR0 0x06</div><div class='add'>+#define F81604_SJA1000_BTR1 0x07</div><div class='add'>+#define F81604_SJA1000_BTR1_SAMPLE_TRIPLE BIT(7)</div><div class='add'>+#define F81604_SJA1000_OCR 0x08</div><div class='add'>+#define F81604_SJA1000_CDR 0x1F</div><div class='add'>+</div><div class='add'>+/* mode register */</div><div class='add'>+#define F81604_SJA1000_MOD_RM 0x01</div><div class='add'>+#define F81604_SJA1000_MOD_LOM 0x02</div><div class='add'>+#define F81604_SJA1000_MOD_STM 0x04</div><div class='add'>+</div><div class='add'>+/* commands */</div><div class='add'>+#define F81604_SJA1000_CMD_CDO 0x08</div><div class='add'>+</div><div class='add'>+/* interrupt sources */</div><div class='add'>+#define F81604_SJA1000_IRQ_BEI 0x80</div><div class='add'>+#define F81604_SJA1000_IRQ_ALI 0x40</div><div class='add'>+#define F81604_SJA1000_IRQ_EPI 0x20</div><div class='add'>+#define F81604_SJA1000_IRQ_DOI 0x08</div><div class='add'>+#define F81604_SJA1000_IRQ_EI 0x04</div><div class='add'>+#define F81604_SJA1000_IRQ_TI 0x02</div><div class='add'>+#define F81604_SJA1000_IRQ_RI 0x01</div><div class='add'>+#define F81604_SJA1000_IRQ_ALL 0xFF</div><div class='add'>+#define F81604_SJA1000_IRQ_OFF 0x00</div><div class='add'>+</div><div class='add'>+/* status register content */</div><div class='add'>+#define F81604_SJA1000_SR_BS 0x80</div><div class='add'>+#define F81604_SJA1000_SR_ES 0x40</div><div class='add'>+#define F81604_SJA1000_SR_TCS 0x08</div><div class='add'>+</div><div class='add'>+/* ECC register */</div><div class='add'>+#define F81604_SJA1000_ECC_SEG 0x1F</div><div class='add'>+#define F81604_SJA1000_ECC_DIR 0x20</div><div class='add'>+#define F81604_SJA1000_ECC_BIT 0x00</div><div class='add'>+#define F81604_SJA1000_ECC_FORM 0x40</div><div class='add'>+#define F81604_SJA1000_ECC_STUFF 0x80</div><div class='add'>+#define F81604_SJA1000_ECC_MASK 0xc0</div><div class='add'>+</div><div class='add'>+/* ALC register */</div><div class='add'>+#define F81604_SJA1000_ALC_MASK 0x1f</div><div class='add'>+</div><div class='add'>+/* table of devices that work with this driver */</div><div class='add'>+static const struct usb_device_id f81604_table[] = {</div><div class='add'>+	{ USB_DEVICE(F81604_VENDOR_ID, F81604_PRODUCT_ID) },</div><div class='add'>+	{} /* Terminating entry */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+MODULE_DEVICE_TABLE(usb, f81604_table);</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops f81604_ethtool_ops = {</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u16 f81604_termination[] = { F81604_TERMINATION_DISABLED,</div><div class='add'>+					  F81604_TERMINATION_ENABLED };</div><div class='add'>+</div><div class='add'>+struct f81604_priv {</div><div class='add'>+	struct net_device *netdev[F81604_MAX_DEV];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct f81604_port_priv {</div><div class='add'>+	struct can_priv can;</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	struct sk_buff *echo_skb;</div><div class='add'>+</div><div class='add'>+	unsigned long clear_flags;</div><div class='add'>+	struct work_struct clear_reg_work;</div><div class='add'>+</div><div class='add'>+	struct usb_device *dev;</div><div class='add'>+	struct usb_interface *intf;</div><div class='add'>+</div><div class='add'>+	struct usb_anchor urbs_anchor;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Interrupt endpoint data format:</div><div class='add'>+ *	Byte 0: Status register.</div><div class='add'>+ *	Byte 1: Interrupt register.</div><div class='add'>+ *	Byte 2: Interrupt enable register.</div><div class='add'>+ *	Byte 3: Arbitration lost capture(ALC) register.</div><div class='add'>+ *	Byte 4: Error code capture(ECC) register.</div><div class='add'>+ *	Byte 5: Error warning limit register.</div><div class='add'>+ *	Byte 6: RX error counter register.</div><div class='add'>+ *	Byte 7: TX error counter register.</div><div class='add'>+ *	Byte 8: Reserved.</div><div class='add'>+ */</div><div class='add'>+struct f81604_int_data {</div><div class='add'>+	u8 sr;</div><div class='add'>+	u8 isrc;</div><div class='add'>+	u8 ier;</div><div class='add'>+	u8 alc;</div><div class='add'>+	u8 ecc;</div><div class='add'>+	u8 ewlr;</div><div class='add'>+	u8 rxerr;</div><div class='add'>+	u8 txerr;</div><div class='add'>+	u8 val;</div><div class='add'>+} __packed __aligned(4);</div><div class='add'>+</div><div class='add'>+struct f81604_sff {</div><div class='add'>+	__be16 id;</div><div class='add'>+	u8 data[CAN_MAX_DLEN];</div><div class='add'>+} __packed __aligned(2);</div><div class='add'>+</div><div class='add'>+struct f81604_eff {</div><div class='add'>+	__be32 id;</div><div class='add'>+	u8 data[CAN_MAX_DLEN];</div><div class='add'>+} __packed __aligned(2);</div><div class='add'>+</div><div class='add'>+struct f81604_can_frame {</div><div class='add'>+	u8 cmd;</div><div class='add'>+</div><div class='add'>+	/* According for F81604 DLC define:</div><div class='add'>+	 *	bit 3~0: data length (0~8)</div><div class='add'>+	 *	bit6: is RTR flag.</div><div class='add'>+	 *	bit7: is EFF frame.</div><div class='add'>+	 */</div><div class='add'>+	u8 dlc;</div><div class='add'>+</div><div class='add'>+	union {</div><div class='add'>+		struct f81604_sff sff;</div><div class='add'>+		struct f81604_eff eff;</div><div class='add'>+	};</div><div class='add'>+} __packed __aligned(2);</div><div class='add'>+</div><div class='add'>+static const u8 bulk_in_addr[F81604_MAX_DEV] = { 2, 4 };</div><div class='add'>+static const u8 bulk_out_addr[F81604_MAX_DEV] = { 1, 3 };</div><div class='add'>+static const u8 int_in_addr[F81604_MAX_DEV] = { 1, 3 };</div><div class='add'>+</div><div class='add'>+static int f81604_write(struct usb_device *dev, u16 reg, u8 data)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = usb_control_msg_send(dev, 0, F81604_SET_GET_REGISTER,</div><div class='add'>+				   USB_TYPE_VENDOR | USB_DIR_OUT, 0, reg,</div><div class='add'>+				   &amp;data, sizeof(data), F81604_USB_TIMEOUT,</div><div class='add'>+				   GFP_KERNEL);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(&amp;dev-&gt;dev, "%s: reg: %x data: %x failed: %pe\n",</div><div class='add'>+			__func__, reg, data, ERR_PTR(ret));</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int f81604_read(struct usb_device *dev, u16 reg, u8 *data)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = usb_control_msg_recv(dev, 0, F81604_SET_GET_REGISTER,</div><div class='add'>+				   USB_TYPE_VENDOR | USB_DIR_IN, 0, reg, data,</div><div class='add'>+				   sizeof(*data), F81604_USB_TIMEOUT,</div><div class='add'>+				   GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		dev_err(&amp;dev-&gt;dev, "%s: reg: %x failed: %pe\n", __func__, reg,</div><div class='add'>+			ERR_PTR(ret));</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int f81604_update_bits(struct usb_device *dev, u16 reg, u8 mask,</div><div class='add'>+			      u8 data)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u8 tmp;</div><div class='add'>+</div><div class='add'>+	ret = f81604_read(dev, reg, &amp;tmp);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	tmp &amp;= ~mask;</div><div class='add'>+	tmp |= (mask &amp; data);</div><div class='add'>+</div><div class='add'>+	return f81604_write(dev, reg, tmp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int f81604_sja1000_write(struct f81604_port_priv *priv, u16 reg,</div><div class='add'>+				u8 data)</div><div class='add'>+{</div><div class='add'>+	int port = priv-&gt;netdev-&gt;dev_port;</div><div class='add'>+	int real_reg;</div><div class='add'>+</div><div class='add'>+	real_reg = reg + F81604_PORT_OFFSET * port + F81604_PORT_OFFSET;</div><div class='add'>+	return f81604_write(priv-&gt;dev, real_reg, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int f81604_sja1000_read(struct f81604_port_priv *priv, u16 reg,</div><div class='add'>+			       u8 *data)</div><div class='add'>+{</div><div class='add'>+	int port = priv-&gt;netdev-&gt;dev_port;</div><div class='add'>+	int real_reg;</div><div class='add'>+</div><div class='add'>+	real_reg = reg + F81604_PORT_OFFSET * port + F81604_PORT_OFFSET;</div><div class='add'>+	return f81604_read(priv-&gt;dev, real_reg, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int f81604_set_reset_mode(struct f81604_port_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int ret, i;</div><div class='add'>+	u8 tmp;</div><div class='add'>+</div><div class='add'>+	/* disable interrupts */</div><div class='add'>+	ret = f81604_sja1000_write(priv, F81604_SJA1000_IER,</div><div class='add'>+				   F81604_SJA1000_IRQ_OFF);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; F81604_SET_DEVICE_RETRY; i++) {</div><div class='add'>+		ret = f81604_sja1000_read(priv, F81604_SJA1000_MOD, &amp;tmp);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		/* check reset bit */</div><div class='add'>+		if (tmp &amp; F81604_SJA1000_MOD_RM) {</div><div class='add'>+			priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* reset chip */</div><div class='add'>+		ret = f81604_sja1000_write(priv, F81604_SJA1000_MOD,</div><div class='add'>+					   F81604_SJA1000_MOD_RM);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EPERM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int f81604_set_normal_mode(struct f81604_port_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u8 tmp, ier = 0;</div><div class='add'>+	u8 mod_reg = 0;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; F81604_SET_DEVICE_RETRY; i++) {</div><div class='add'>+		ret = f81604_sja1000_read(priv, F81604_SJA1000_MOD, &amp;tmp);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		/* check reset bit */</div><div class='add'>+		if ((tmp &amp; F81604_SJA1000_MOD_RM) == 0) {</div><div class='add'>+			priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+			/* enable interrupts, RI handled by bulk-in */</div><div class='add'>+			ier = F81604_SJA1000_IRQ_ALL &amp; ~F81604_SJA1000_IRQ_RI;</div><div class='add'>+			if (!(priv-&gt;can.ctrlmode &amp;</div><div class='add'>+			      CAN_CTRLMODE_BERR_REPORTING))</div><div class='add'>+				ier &amp;= ~F81604_SJA1000_IRQ_BEI;</div><div class='add'>+</div><div class='add'>+			return f81604_sja1000_write(priv, F81604_SJA1000_IER,</div><div class='add'>+						    ier);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* set chip to normal mode */</div><div class='add'>+		if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LISTENONLY)</div><div class='add'>+			mod_reg |= F81604_SJA1000_MOD_LOM;</div><div class='add'>+		if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_PRESUME_ACK)</div><div class='add'>+			mod_reg |= F81604_SJA1000_MOD_STM;</div><div class='add'>+</div><div class='add'>+		ret = f81604_sja1000_write(priv, F81604_SJA1000_MOD, mod_reg);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EPERM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int f81604_chipset_init(struct f81604_port_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	/* set clock divider and output control register */</div><div class='add'>+	ret = f81604_sja1000_write(priv, F81604_SJA1000_CDR,</div><div class='add'>+				   CDR_CBP | CDR_PELICAN);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* set acceptance filter (accept all) */</div><div class='add'>+	for (i = 0; i &lt; F81604_MAX_FILTER_CNT; ++i) {</div><div class='add'>+		ret = f81604_sja1000_write(priv, F81604_SJA1000_ACCC0 + i, 0);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; F81604_MAX_FILTER_CNT; ++i) {</div><div class='add'>+		ret = f81604_sja1000_write(priv, F81604_SJA1000_ACCM0 + i,</div><div class='add'>+					   0xFF);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return f81604_sja1000_write(priv, F81604_SJA1000_OCR,</div><div class='add'>+				    OCR_TX0_PUSHPULL | OCR_TX1_PUSHPULL |</div><div class='add'>+					    OCR_MODE_NORMAL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void f81604_process_rx_packet(struct net_device *netdev,</div><div class='add'>+				     struct f81604_can_frame *frame)</div><div class='add'>+{</div><div class='add'>+	struct net_device_stats *stats = &amp;netdev-&gt;stats;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	if (frame-&gt;cmd != F81604_CMD_DATA)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_skb(netdev, &amp;cf);</div><div class='add'>+	if (!skb) {</div><div class='add'>+		stats-&gt;rx_dropped++;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cf-&gt;len = can_cc_dlc2len(frame-&gt;dlc &amp; F81604_DLC_LEN_MASK);</div><div class='add'>+</div><div class='add'>+	if (frame-&gt;dlc &amp; F81604_DLC_EFF_BIT) {</div><div class='add'>+		cf-&gt;can_id = get_unaligned_be32(&amp;frame-&gt;eff.id) &gt;&gt;</div><div class='add'>+			     F81604_EFF_SHIFT;</div><div class='add'>+		cf-&gt;can_id |= CAN_EFF_FLAG;</div><div class='add'>+</div><div class='add'>+		if (!(frame-&gt;dlc &amp; F81604_DLC_RTR_BIT))</div><div class='add'>+			memcpy(cf-&gt;data, frame-&gt;eff.data, cf-&gt;len);</div><div class='add'>+	} else {</div><div class='add'>+		cf-&gt;can_id = get_unaligned_be16(&amp;frame-&gt;sff.id) &gt;&gt;</div><div class='add'>+			     F81604_SFF_SHIFT;</div><div class='add'>+</div><div class='add'>+		if (!(frame-&gt;dlc &amp; F81604_DLC_RTR_BIT))</div><div class='add'>+			memcpy(cf-&gt;data, frame-&gt;sff.data, cf-&gt;len);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (frame-&gt;dlc &amp; F81604_DLC_RTR_BIT)</div><div class='add'>+		cf-&gt;can_id |= CAN_RTR_FLAG;</div><div class='add'>+	else</div><div class='add'>+		stats-&gt;rx_bytes += cf-&gt;len;</div><div class='add'>+</div><div class='add'>+	stats-&gt;rx_packets++;</div><div class='add'>+	netif_rx(skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void f81604_read_bulk_callback(struct urb *urb)</div><div class='add'>+{</div><div class='add'>+	struct f81604_can_frame *frame = urb-&gt;transfer_buffer;</div><div class='add'>+	struct net_device *netdev = urb-&gt;context;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!netif_device_present(netdev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (urb-&gt;status)</div><div class='add'>+		netdev_info(netdev, "%s: URB aborted %pe\n", __func__,</div><div class='add'>+			    ERR_PTR(urb-&gt;status));</div><div class='add'>+</div><div class='add'>+	switch (urb-&gt;status) {</div><div class='add'>+	case 0: /* success */</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case -ENOENT:</div><div class='add'>+	case -EPIPE:</div><div class='add'>+	case -EPROTO:</div><div class='add'>+	case -ESHUTDOWN:</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		goto resubmit_urb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (urb-&gt;actual_length != sizeof(*frame)) {</div><div class='add'>+		netdev_warn(netdev, "URB length %u not equal to %zu\n",</div><div class='add'>+			    urb-&gt;actual_length, sizeof(*frame));</div><div class='add'>+		goto resubmit_urb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	f81604_process_rx_packet(netdev, frame);</div><div class='add'>+</div><div class='add'>+resubmit_urb:</div><div class='add'>+	ret = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='add'>+	if (ret == -ENODEV)</div><div class='add'>+		netif_device_detach(netdev);</div><div class='add'>+	else if (ret)</div><div class='add'>+		netdev_err(netdev,</div><div class='add'>+			   "%s: failed to resubmit read bulk urb: %pe\n",</div><div class='add'>+			   __func__, ERR_PTR(ret));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void f81604_handle_tx(struct f81604_port_priv *priv,</div><div class='add'>+			     struct f81604_int_data *data)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = priv-&gt;netdev;</div><div class='add'>+	struct net_device_stats *stats = &amp;netdev-&gt;stats;</div><div class='add'>+</div><div class='add'>+	/* transmission buffer released */</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_ONE_SHOT &amp;&amp;</div><div class='add'>+	    !(data-&gt;sr &amp; F81604_SJA1000_SR_TCS)) {</div><div class='add'>+		stats-&gt;tx_errors++;</div><div class='add'>+		can_free_echo_skb(netdev, 0, NULL);</div><div class='add'>+	} else {</div><div class='add'>+		/* transmission complete */</div><div class='add'>+		stats-&gt;tx_bytes += can_get_echo_skb(netdev, 0, NULL);</div><div class='add'>+		stats-&gt;tx_packets++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netif_wake_queue(netdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void f81604_handle_can_bus_errors(struct f81604_port_priv *priv,</div><div class='add'>+					 struct f81604_int_data *data)</div><div class='add'>+{</div><div class='add'>+	enum can_state can_state = priv-&gt;can.state;</div><div class='add'>+	struct net_device *netdev = priv-&gt;netdev;</div><div class='add'>+	struct net_device_stats *stats = &amp;netdev-&gt;stats;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	/* Note: ALC/ECC will not auto clear by read here, must be cleared by</div><div class='add'>+	 * read register (via clear_reg_work).</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_err_skb(netdev, &amp;cf);</div><div class='add'>+	if (skb) {</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_CNT;</div><div class='add'>+		cf-&gt;data[6] = data-&gt;txerr;</div><div class='add'>+		cf-&gt;data[7] = data-&gt;rxerr;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (data-&gt;isrc &amp; F81604_SJA1000_IRQ_DOI) {</div><div class='add'>+		/* data overrun interrupt */</div><div class='add'>+		netdev_dbg(netdev, "data overrun interrupt\n");</div><div class='add'>+</div><div class='add'>+		if (skb) {</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='add'>+			cf-&gt;data[1] = CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		stats-&gt;rx_over_errors++;</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+</div><div class='add'>+		set_bit(F81604_CLEAR_OVERRUN, &amp;priv-&gt;clear_flags);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (data-&gt;isrc &amp; F81604_SJA1000_IRQ_EI) {</div><div class='add'>+		/* error warning interrupt */</div><div class='add'>+		netdev_dbg(netdev, "error warning interrupt\n");</div><div class='add'>+</div><div class='add'>+		if (data-&gt;sr &amp; F81604_SJA1000_SR_BS)</div><div class='add'>+			can_state = CAN_STATE_BUS_OFF;</div><div class='add'>+		else if (data-&gt;sr &amp; F81604_SJA1000_SR_ES)</div><div class='add'>+			can_state = CAN_STATE_ERROR_WARNING;</div><div class='add'>+		else</div><div class='add'>+			can_state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (data-&gt;isrc &amp; F81604_SJA1000_IRQ_BEI) {</div><div class='add'>+		/* bus error interrupt */</div><div class='add'>+		netdev_dbg(netdev, "bus error interrupt\n");</div><div class='add'>+</div><div class='add'>+		priv-&gt;can.can_stats.bus_error++;</div><div class='add'>+</div><div class='add'>+		if (skb) {</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='add'>+</div><div class='add'>+			/* set error type */</div><div class='add'>+			switch (data-&gt;ecc &amp; F81604_SJA1000_ECC_MASK) {</div><div class='add'>+			case F81604_SJA1000_ECC_BIT:</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_BIT;</div><div class='add'>+				break;</div><div class='add'>+			case F81604_SJA1000_ECC_FORM:</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='add'>+				break;</div><div class='add'>+			case F81604_SJA1000_ECC_STUFF:</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='add'>+				break;</div><div class='add'>+			default:</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			/* set error location */</div><div class='add'>+			cf-&gt;data[3] = data-&gt;ecc &amp; F81604_SJA1000_ECC_SEG;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Error occurred during transmission? */</div><div class='add'>+		if ((data-&gt;ecc &amp; F81604_SJA1000_ECC_DIR) == 0) {</div><div class='add'>+			stats-&gt;tx_errors++;</div><div class='add'>+			if (skb)</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_TX;</div><div class='add'>+		} else {</div><div class='add'>+			stats-&gt;rx_errors++;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		set_bit(F81604_CLEAR_ECC, &amp;priv-&gt;clear_flags);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (data-&gt;isrc &amp; F81604_SJA1000_IRQ_EPI) {</div><div class='add'>+		if (can_state == CAN_STATE_ERROR_PASSIVE)</div><div class='add'>+			can_state = CAN_STATE_ERROR_WARNING;</div><div class='add'>+		else</div><div class='add'>+			can_state = CAN_STATE_ERROR_PASSIVE;</div><div class='add'>+</div><div class='add'>+		/* error passive interrupt */</div><div class='add'>+		netdev_dbg(netdev, "error passive interrupt: %d\n", can_state);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (data-&gt;isrc &amp; F81604_SJA1000_IRQ_ALI) {</div><div class='add'>+		/* arbitration lost interrupt */</div><div class='add'>+		netdev_dbg(netdev, "arbitration lost interrupt\n");</div><div class='add'>+</div><div class='add'>+		priv-&gt;can.can_stats.arbitration_lost++;</div><div class='add'>+</div><div class='add'>+		if (skb) {</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_LOSTARB;</div><div class='add'>+			cf-&gt;data[0] = data-&gt;alc &amp; F81604_SJA1000_ALC_MASK;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		set_bit(F81604_CLEAR_ALC, &amp;priv-&gt;clear_flags);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (can_state != priv-&gt;can.state) {</div><div class='add'>+		enum can_state tx_state, rx_state;</div><div class='add'>+</div><div class='add'>+		tx_state = data-&gt;txerr &gt;= data-&gt;rxerr ? can_state : 0;</div><div class='add'>+		rx_state = data-&gt;txerr &lt;= data-&gt;rxerr ? can_state : 0;</div><div class='add'>+</div><div class='add'>+		can_change_state(netdev, cf, tx_state, rx_state);</div><div class='add'>+</div><div class='add'>+		if (can_state == CAN_STATE_BUS_OFF)</div><div class='add'>+			can_bus_off(netdev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;clear_flags)</div><div class='add'>+		schedule_work(&amp;priv-&gt;clear_reg_work);</div><div class='add'>+</div><div class='add'>+	if (skb)</div><div class='add'>+		netif_rx(skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void f81604_read_int_callback(struct urb *urb)</div><div class='add'>+{</div><div class='add'>+	struct f81604_int_data *data = urb-&gt;transfer_buffer;</div><div class='add'>+	struct net_device *netdev = urb-&gt;context;</div><div class='add'>+	struct f81604_port_priv *priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	priv = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	if (!netif_device_present(netdev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (urb-&gt;status)</div><div class='add'>+		netdev_info(netdev, "%s: Int URB aborted: %pe\n", __func__,</div><div class='add'>+			    ERR_PTR(urb-&gt;status));</div><div class='add'>+</div><div class='add'>+	switch (urb-&gt;status) {</div><div class='add'>+	case 0: /* success */</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case -ENOENT:</div><div class='add'>+	case -EPIPE:</div><div class='add'>+	case -EPROTO:</div><div class='add'>+	case -ESHUTDOWN:</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		goto resubmit_urb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* handle Errors */</div><div class='add'>+	if (data-&gt;isrc &amp; (F81604_SJA1000_IRQ_DOI | F81604_SJA1000_IRQ_EI |</div><div class='add'>+			  F81604_SJA1000_IRQ_BEI | F81604_SJA1000_IRQ_EPI |</div><div class='add'>+			  F81604_SJA1000_IRQ_ALI))</div><div class='add'>+		f81604_handle_can_bus_errors(priv, data);</div><div class='add'>+</div><div class='add'>+	/* handle TX */</div><div class='add'>+	if (priv-&gt;can.state != CAN_STATE_BUS_OFF &amp;&amp;</div><div class='add'>+	    (data-&gt;isrc &amp; F81604_SJA1000_IRQ_TI))</div><div class='add'>+		f81604_handle_tx(priv, data);</div><div class='add'>+</div><div class='add'>+resubmit_urb:</div><div class='add'>+	ret = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='add'>+	if (ret == -ENODEV)</div><div class='add'>+		netif_device_detach(netdev);</div><div class='add'>+	else if (ret)</div><div class='add'>+		netdev_err(netdev, "%s: failed to resubmit int urb: %pe\n",</div><div class='add'>+			   __func__, ERR_PTR(ret));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void f81604_unregister_urbs(struct f81604_port_priv *priv)</div><div class='add'>+{</div><div class='add'>+	usb_kill_anchored_urbs(&amp;priv-&gt;urbs_anchor);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int f81604_register_urbs(struct f81604_port_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = priv-&gt;netdev;</div><div class='add'>+	struct f81604_int_data *int_data;</div><div class='add'>+	int id = netdev-&gt;dev_port;</div><div class='add'>+	struct urb *int_urb;</div><div class='add'>+	int rx_urb_cnt;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	for (rx_urb_cnt = 0; rx_urb_cnt &lt; F81604_MAX_RX_URBS; ++rx_urb_cnt) {</div><div class='add'>+		struct f81604_can_frame *frame;</div><div class='add'>+		struct urb *rx_urb;</div><div class='add'>+</div><div class='add'>+		rx_urb = usb_alloc_urb(0, GFP_KERNEL);</div><div class='add'>+		if (!rx_urb) {</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		frame = kmalloc(sizeof(*frame), GFP_KERNEL);</div><div class='add'>+		if (!frame) {</div><div class='add'>+			usb_free_urb(rx_urb);</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		usb_fill_bulk_urb(rx_urb, priv-&gt;dev,</div><div class='add'>+				  usb_rcvbulkpipe(priv-&gt;dev, bulk_in_addr[id]),</div><div class='add'>+				  frame, sizeof(*frame),</div><div class='add'>+				  f81604_read_bulk_callback, netdev);</div><div class='add'>+</div><div class='add'>+		rx_urb-&gt;transfer_flags |= URB_FREE_BUFFER;</div><div class='add'>+		usb_anchor_urb(rx_urb, &amp;priv-&gt;urbs_anchor);</div><div class='add'>+</div><div class='add'>+		ret = usb_submit_urb(rx_urb, GFP_KERNEL);</div><div class='add'>+		if (ret) {</div><div class='add'>+			usb_unanchor_urb(rx_urb);</div><div class='add'>+			usb_free_urb(rx_urb);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Drop reference, USB core will take care of freeing it */</div><div class='add'>+		usb_free_urb(rx_urb);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rx_urb_cnt == 0) {</div><div class='add'>+		netdev_warn(netdev, "%s: submit rx urb failed: %pe\n",</div><div class='add'>+			    __func__, ERR_PTR(ret));</div><div class='add'>+</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	int_urb = usb_alloc_urb(0, GFP_KERNEL);</div><div class='add'>+	if (!int_urb) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	int_data = kmalloc(sizeof(*int_data), GFP_KERNEL);</div><div class='add'>+	if (!int_data) {</div><div class='add'>+		usb_free_urb(int_urb);</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	usb_fill_int_urb(int_urb, priv-&gt;dev,</div><div class='add'>+			 usb_rcvintpipe(priv-&gt;dev, int_in_addr[id]), int_data,</div><div class='add'>+			 sizeof(*int_data), f81604_read_int_callback, netdev,</div><div class='add'>+			 1);</div><div class='add'>+</div><div class='add'>+	int_urb-&gt;transfer_flags |= URB_FREE_BUFFER;</div><div class='add'>+	usb_anchor_urb(int_urb, &amp;priv-&gt;urbs_anchor);</div><div class='add'>+</div><div class='add'>+	ret = usb_submit_urb(int_urb, GFP_KERNEL);</div><div class='add'>+	if (ret) {</div><div class='add'>+		usb_unanchor_urb(int_urb);</div><div class='add'>+		usb_free_urb(int_urb);</div><div class='add'>+</div><div class='add'>+		netdev_warn(netdev, "%s: submit int urb failed: %pe\n",</div><div class='add'>+			    __func__, ERR_PTR(ret));</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Drop reference, USB core will take care of freeing it */</div><div class='add'>+	usb_free_urb(int_urb);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+error:</div><div class='add'>+	f81604_unregister_urbs(priv);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int f81604_start(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct f81604_port_priv *priv = netdev_priv(netdev);</div><div class='add'>+	int ret;</div><div class='add'>+	u8 mode;</div><div class='add'>+	u8 tmp;</div><div class='add'>+</div><div class='add'>+	mode = F81604_RX_AUTO_RELEASE_BUF | F81604_INT_WHEN_CHANGE;</div><div class='add'>+</div><div class='add'>+	/* Set TR/AT mode */</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_ONE_SHOT)</div><div class='add'>+		mode |= F81604_TX_ONESHOT;</div><div class='add'>+	else</div><div class='add'>+		mode |= F81604_TX_NORMAL;</div><div class='add'>+</div><div class='add'>+	ret = f81604_sja1000_write(priv, F81604_CTRL_MODE_REG, mode);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* set reset mode */</div><div class='add'>+	ret = f81604_set_reset_mode(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = f81604_chipset_init(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Clear error counters and error code capture */</div><div class='add'>+	ret = f81604_sja1000_write(priv, F81604_SJA1000_TXERR, 0);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = f81604_sja1000_write(priv, F81604_SJA1000_RXERR, 0);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Read clear for ECC/ALC/IR register */</div><div class='add'>+	ret = f81604_sja1000_read(priv, F81604_SJA1000_ECC, &amp;tmp);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = f81604_sja1000_read(priv, F81604_SJA1000_ALC, &amp;tmp);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = f81604_sja1000_read(priv, F81604_SJA1000_IR, &amp;tmp);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = f81604_register_urbs(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = f81604_set_normal_mode(priv);</div><div class='add'>+	if (ret) {</div><div class='add'>+		f81604_unregister_urbs(priv);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int f81604_set_bittiming(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct f81604_port_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct can_bittiming *bt = &amp;priv-&gt;can.bittiming;</div><div class='add'>+	u8 btr0, btr1;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	btr0 = FIELD_PREP(F81604_BRP_MASK, bt-&gt;brp - 1) |</div><div class='add'>+	       FIELD_PREP(F81604_SJW_MASK, bt-&gt;sjw - 1);</div><div class='add'>+</div><div class='add'>+	btr1 = FIELD_PREP(F81604_SEG1_MASK,</div><div class='add'>+			  bt-&gt;prop_seg + bt-&gt;phase_seg1 - 1) |</div><div class='add'>+	       FIELD_PREP(F81604_SEG2_MASK, bt-&gt;phase_seg2 - 1);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_3_SAMPLES)</div><div class='add'>+		btr1 |= F81604_SJA1000_BTR1_SAMPLE_TRIPLE;</div><div class='add'>+</div><div class='add'>+	ret = f81604_sja1000_write(priv, F81604_SJA1000_BTR0, btr0);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_warn(dev, "%s: Set BTR0 failed: %pe\n", __func__,</div><div class='add'>+			    ERR_PTR(ret));</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = f81604_sja1000_write(priv, F81604_SJA1000_BTR1, btr1);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_warn(dev, "%s: Set BTR1 failed: %pe\n", __func__,</div><div class='add'>+			    ERR_PTR(ret));</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int f81604_set_mode(struct net_device *netdev, enum can_mode mode)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case CAN_MODE_START:</div><div class='add'>+		ret = f81604_start(netdev);</div><div class='add'>+		if (!ret &amp;&amp; netif_queue_stopped(netdev))</div><div class='add'>+			netif_wake_queue(netdev);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		ret = -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void f81604_write_bulk_callback(struct urb *urb)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = urb-&gt;context;</div><div class='add'>+</div><div class='add'>+	if (!netif_device_present(netdev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (urb-&gt;status)</div><div class='add'>+		netdev_info(netdev, "%s: Tx URB error: %pe\n", __func__,</div><div class='add'>+			    ERR_PTR(urb-&gt;status));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void f81604_clear_reg_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct f81604_port_priv *priv;</div><div class='add'>+	u8 tmp;</div><div class='add'>+</div><div class='add'>+	priv = container_of(work, struct f81604_port_priv, clear_reg_work);</div><div class='add'>+</div><div class='add'>+	/* dummy read for clear Arbitration lost capture(ALC) register. */</div><div class='add'>+	if (test_and_clear_bit(F81604_CLEAR_ALC, &amp;priv-&gt;clear_flags))</div><div class='add'>+		f81604_sja1000_read(priv, F81604_SJA1000_ALC, &amp;tmp);</div><div class='add'>+</div><div class='add'>+	/* dummy read for clear Error code capture(ECC) register. */</div><div class='add'>+	if (test_and_clear_bit(F81604_CLEAR_ECC, &amp;priv-&gt;clear_flags))</div><div class='add'>+		f81604_sja1000_read(priv, F81604_SJA1000_ECC, &amp;tmp);</div><div class='add'>+</div><div class='add'>+	/* dummy write for clear data overrun flag. */</div><div class='add'>+	if (test_and_clear_bit(F81604_CLEAR_OVERRUN, &amp;priv-&gt;clear_flags))</div><div class='add'>+		f81604_sja1000_write(priv, F81604_SJA1000_CMR,</div><div class='add'>+				     F81604_SJA1000_CMD_CDO);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static netdev_tx_t f81604_start_xmit(struct sk_buff *skb,</div><div class='add'>+				     struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct can_frame *cf = (struct can_frame *)skb-&gt;data;</div><div class='add'>+	struct f81604_port_priv *priv = netdev_priv(netdev);</div><div class='add'>+	struct net_device_stats *stats = &amp;netdev-&gt;stats;</div><div class='add'>+	struct f81604_can_frame *frame;</div><div class='add'>+	struct urb *write_urb;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (can_dev_dropped_skb(netdev, skb))</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(netdev);</div><div class='add'>+</div><div class='add'>+	write_urb = usb_alloc_urb(0, GFP_ATOMIC);</div><div class='add'>+	if (!write_urb)</div><div class='add'>+		goto nomem_urb;</div><div class='add'>+</div><div class='add'>+	frame = kzalloc(sizeof(*frame), GFP_ATOMIC);</div><div class='add'>+	if (!frame)</div><div class='add'>+		goto nomem_buf;</div><div class='add'>+</div><div class='add'>+	usb_fill_bulk_urb(write_urb, priv-&gt;dev,</div><div class='add'>+			  usb_sndbulkpipe(priv-&gt;dev,</div><div class='add'>+					  bulk_out_addr[netdev-&gt;dev_port]),</div><div class='add'>+			  frame, sizeof(*frame), f81604_write_bulk_callback,</div><div class='add'>+			  priv-&gt;netdev);</div><div class='add'>+</div><div class='add'>+	write_urb-&gt;transfer_flags |= URB_FREE_BUFFER;</div><div class='add'>+</div><div class='add'>+	frame-&gt;cmd = F81604_CMD_DATA;</div><div class='add'>+	frame-&gt;dlc = cf-&gt;len;</div><div class='add'>+</div><div class='add'>+	if (cf-&gt;can_id &amp; CAN_RTR_FLAG)</div><div class='add'>+		frame-&gt;dlc |= F81604_DLC_RTR_BIT;</div><div class='add'>+</div><div class='add'>+	if (cf-&gt;can_id &amp; CAN_EFF_FLAG) {</div><div class='add'>+		u32 id = (cf-&gt;can_id &amp; CAN_EFF_MASK) &lt;&lt; F81604_EFF_SHIFT;</div><div class='add'>+</div><div class='add'>+		put_unaligned_be32(id, &amp;frame-&gt;eff.id);</div><div class='add'>+</div><div class='add'>+		frame-&gt;dlc |= F81604_DLC_EFF_BIT;</div><div class='add'>+</div><div class='add'>+		if (!(cf-&gt;can_id &amp; CAN_RTR_FLAG))</div><div class='add'>+			memcpy(&amp;frame-&gt;eff.data, cf-&gt;data, cf-&gt;len);</div><div class='add'>+	} else {</div><div class='add'>+		u32 id = (cf-&gt;can_id &amp; CAN_SFF_MASK) &lt;&lt; F81604_SFF_SHIFT;</div><div class='add'>+</div><div class='add'>+		put_unaligned_be16(id, &amp;frame-&gt;sff.id);</div><div class='add'>+</div><div class='add'>+		if (!(cf-&gt;can_id &amp; CAN_RTR_FLAG))</div><div class='add'>+			memcpy(&amp;frame-&gt;sff.data, cf-&gt;data, cf-&gt;len);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	can_put_echo_skb(skb, netdev, 0, 0);</div><div class='add'>+</div><div class='add'>+	ret = usb_submit_urb(write_urb, GFP_ATOMIC);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(netdev, "%s: failed to resubmit tx bulk urb: %pe\n",</div><div class='add'>+			   __func__, ERR_PTR(ret));</div><div class='add'>+</div><div class='add'>+		can_free_echo_skb(netdev, 0, NULL);</div><div class='add'>+		stats-&gt;tx_dropped++;</div><div class='add'>+		stats-&gt;tx_errors++;</div><div class='add'>+</div><div class='add'>+		if (ret == -ENODEV)</div><div class='add'>+			netif_device_detach(netdev);</div><div class='add'>+		else</div><div class='add'>+			netif_wake_queue(netdev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* let usb core take care of this urb */</div><div class='add'>+	usb_free_urb(write_urb);</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+nomem_buf:</div><div class='add'>+	usb_free_urb(write_urb);</div><div class='add'>+</div><div class='add'>+nomem_urb:</div><div class='add'>+	dev_kfree_skb(skb);</div><div class='add'>+	stats-&gt;tx_dropped++;</div><div class='add'>+	stats-&gt;tx_errors++;</div><div class='add'>+	netif_wake_queue(netdev);</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int f81604_get_berr_counter(const struct net_device *netdev,</div><div class='add'>+				   struct can_berr_counter *bec)</div><div class='add'>+{</div><div class='add'>+	struct f81604_port_priv *priv = netdev_priv(netdev);</div><div class='add'>+	u8 txerr, rxerr;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = f81604_sja1000_read(priv, F81604_SJA1000_TXERR, &amp;txerr);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = f81604_sja1000_read(priv, F81604_SJA1000_RXERR, &amp;rxerr);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	bec-&gt;txerr = txerr;</div><div class='add'>+	bec-&gt;rxerr = rxerr;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Open USB device */</div><div class='add'>+static int f81604_open(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = open_candev(netdev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = f81604_start(netdev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		if (ret == -ENODEV)</div><div class='add'>+			netif_device_detach(netdev);</div><div class='add'>+</div><div class='add'>+		close_candev(netdev);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netif_start_queue(netdev);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Close USB device */</div><div class='add'>+static int f81604_close(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct f81604_port_priv *priv = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	f81604_set_reset_mode(priv);</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(netdev);</div><div class='add'>+	cancel_work_sync(&amp;priv-&gt;clear_reg_work);</div><div class='add'>+	close_candev(netdev);</div><div class='add'>+</div><div class='add'>+	f81604_unregister_urbs(priv);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops f81604_netdev_ops = {</div><div class='add'>+	.ndo_open = f81604_open,</div><div class='add'>+	.ndo_stop = f81604_close,</div><div class='add'>+	.ndo_start_xmit = f81604_start_xmit,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const f81604_bittiming_const = {</div><div class='add'>+	.name = KBUILD_MODNAME,</div><div class='add'>+	.tseg1_min = 1,</div><div class='add'>+	.tseg1_max = 16,</div><div class='add'>+	.tseg2_min = 1,</div><div class='add'>+	.tseg2_max = 8,</div><div class='add'>+	.sjw_max = 4,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 64,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Called by the usb core when driver is unloaded or device is removed */</div><div class='add'>+static void f81604_disconnect(struct usb_interface *intf)</div><div class='add'>+{</div><div class='add'>+	struct f81604_priv *priv = usb_get_intfdata(intf);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(priv-&gt;netdev); ++i) {</div><div class='add'>+		if (!priv-&gt;netdev[i])</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		unregister_netdev(priv-&gt;netdev[i]);</div><div class='add'>+		free_candev(priv-&gt;netdev[i]);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __f81604_set_termination(struct usb_device *dev, int idx, u16 term)</div><div class='add'>+{</div><div class='add'>+	u8 mask, data = 0;</div><div class='add'>+</div><div class='add'>+	if (idx == 0)</div><div class='add'>+		mask = F81604_CAN0_TERM;</div><div class='add'>+	else</div><div class='add'>+		mask = F81604_CAN1_TERM;</div><div class='add'>+</div><div class='add'>+	if (term)</div><div class='add'>+		data = mask;</div><div class='add'>+</div><div class='add'>+	return f81604_update_bits(dev, F81604_TERMINATOR_REG, mask, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int f81604_set_termination(struct net_device *netdev, u16 term)</div><div class='add'>+{</div><div class='add'>+	struct f81604_port_priv *port_priv = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	ASSERT_RTNL();</div><div class='add'>+</div><div class='add'>+	return __f81604_set_termination(port_priv-&gt;dev, netdev-&gt;dev_port,</div><div class='add'>+					term);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int f81604_probe(struct usb_interface *intf,</div><div class='add'>+			const struct usb_device_id *id)</div><div class='add'>+{</div><div class='add'>+	struct usb_device *dev = interface_to_usbdev(intf);</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	struct f81604_priv *priv;</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	priv = devm_kzalloc(&amp;intf-&gt;dev, sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	usb_set_intfdata(intf, priv);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(priv-&gt;netdev); ++i) {</div><div class='add'>+		ret = __f81604_set_termination(dev, i, 0);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(&amp;intf-&gt;dev,</div><div class='add'>+				"Setting termination of CH#%d failed: %pe\n",</div><div class='add'>+				i, ERR_PTR(ret));</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(priv-&gt;netdev); ++i) {</div><div class='add'>+		struct f81604_port_priv *port_priv;</div><div class='add'>+</div><div class='add'>+		netdev = alloc_candev(sizeof(*port_priv), 1);</div><div class='add'>+		if (!netdev) {</div><div class='add'>+			dev_err(&amp;intf-&gt;dev, "Couldn't alloc candev: %d\n", i);</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+</div><div class='add'>+			goto failure_cleanup;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		port_priv = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+		INIT_WORK(&amp;port_priv-&gt;clear_reg_work, f81604_clear_reg_work);</div><div class='add'>+		init_usb_anchor(&amp;port_priv-&gt;urbs_anchor);</div><div class='add'>+</div><div class='add'>+		port_priv-&gt;intf = intf;</div><div class='add'>+		port_priv-&gt;dev = dev;</div><div class='add'>+		port_priv-&gt;netdev = netdev;</div><div class='add'>+		port_priv-&gt;can.clock.freq = F81604_CAN_CLOCK;</div><div class='add'>+</div><div class='add'>+		port_priv-&gt;can.termination_const = f81604_termination;</div><div class='add'>+		port_priv-&gt;can.termination_const_cnt =</div><div class='add'>+			ARRAY_SIZE(f81604_termination);</div><div class='add'>+		port_priv-&gt;can.bittiming_const = &amp;f81604_bittiming_const;</div><div class='add'>+		port_priv-&gt;can.do_set_bittiming = f81604_set_bittiming;</div><div class='add'>+		port_priv-&gt;can.do_set_mode = f81604_set_mode;</div><div class='add'>+		port_priv-&gt;can.do_set_termination = f81604_set_termination;</div><div class='add'>+		port_priv-&gt;can.do_get_berr_counter = f81604_get_berr_counter;</div><div class='add'>+		port_priv-&gt;can.ctrlmode_supported =</div><div class='add'>+			CAN_CTRLMODE_LISTENONLY | CAN_CTRLMODE_3_SAMPLES |</div><div class='add'>+			CAN_CTRLMODE_ONE_SHOT | CAN_CTRLMODE_BERR_REPORTING |</div><div class='add'>+			CAN_CTRLMODE_PRESUME_ACK;</div><div class='add'>+</div><div class='add'>+		netdev-&gt;ethtool_ops = &amp;f81604_ethtool_ops;</div><div class='add'>+		netdev-&gt;netdev_ops = &amp;f81604_netdev_ops;</div><div class='add'>+		netdev-&gt;flags |= IFF_ECHO;</div><div class='add'>+		netdev-&gt;dev_port = i;</div><div class='add'>+</div><div class='add'>+		SET_NETDEV_DEV(netdev, &amp;intf-&gt;dev);</div><div class='add'>+</div><div class='add'>+		ret = register_candev(netdev);</div><div class='add'>+		if (ret) {</div><div class='add'>+			netdev_err(netdev, "register CAN device failed: %pe\n",</div><div class='add'>+				   ERR_PTR(ret));</div><div class='add'>+			free_candev(netdev);</div><div class='add'>+</div><div class='add'>+			goto failure_cleanup;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		priv-&gt;netdev[i] = netdev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+failure_cleanup:</div><div class='add'>+	f81604_disconnect(intf);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct usb_driver f81604_driver = {</div><div class='add'>+	.name = KBUILD_MODNAME,</div><div class='add'>+	.probe = f81604_probe,</div><div class='add'>+	.disconnect = f81604_disconnect,</div><div class='add'>+	.id_table = f81604_table,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_usb_driver(f81604_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Ji-Ze Hong (Peter Hong) &lt;peter_hong@fintek.com.tw&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Fintek F81604 USB to 2xCANBUS");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/can/usb/gs_usb.c b/drivers/net/can/usb/gs_usb.c<br/>index 8b4d3e6875eb..e29e85b67fd4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/gs_usb.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/gs_usb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/gs_usb.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/gs_usb.c</a></div><div class='hunk'>@@ -1,36 +1,58 @@</div><div class='del'>-/* CAN driver for Geschwister Schneider USB/CAN devices.</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* CAN driver for Geschwister Schneider USB/CAN devices</div><div class='add'>+ * and bytewerk.org candleLight USB CAN interfaces.</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2013 Geschwister Schneider Technologie-,</div><div class='add'>+ * Copyright (C) 2013-2016 Geschwister Schneider Technologie-,</div><div class='ctx'>  * Entwicklungs- und Vertriebs UG (Haftungsbeschränkt).</div><div class='add'>+ * Copyright (C) 2016 Hubert Denkmair</div><div class='add'>+ * Copyright (c) 2023 Pengutronix, Marc Kleine-Budde &lt;kernel@pengutronix.de&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * Many thanks to all socketcan devs!</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms of the GNU General Public License as published</div><div class='del'>- * by the Free Software Foundation; version 2 of the License.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/clocksource.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/signal.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/signal.h&gt;</div><div class='add'>+#include &lt;linux/timecounter.h&gt;</div><div class='add'>+#include &lt;linux/units.h&gt;</div><div class='ctx'> #include &lt;linux/usb.h&gt;</div><div class='add'>+#include &lt;linux/workqueue.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/can.h&gt;</div><div class='ctx'> #include &lt;linux/can/dev.h&gt;</div><div class='ctx'> #include &lt;linux/can/error.h&gt;</div><div class='add'>+#include &lt;linux/can/rx-offload.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* Device specific constants */</div><div class='del'>-#define USB_GSUSB_1_VENDOR_ID      0x1d50</div><div class='del'>-#define USB_GSUSB_1_PRODUCT_ID     0x606f</div><div class='add'>+#define USB_GS_USB_1_VENDOR_ID 0x1d50</div><div class='add'>+#define USB_GS_USB_1_PRODUCT_ID 0x606f</div><div class='add'>+</div><div class='add'>+#define USB_CANDLELIGHT_VENDOR_ID 0x1209</div><div class='add'>+#define USB_CANDLELIGHT_PRODUCT_ID 0x2323</div><div class='add'>+</div><div class='add'>+#define USB_CES_CANEXT_FD_VENDOR_ID 0x1cd2</div><div class='add'>+#define USB_CES_CANEXT_FD_PRODUCT_ID 0x606f</div><div class='ctx'> </div><div class='del'>-#define GSUSB_ENDPOINT_IN          1</div><div class='del'>-#define GSUSB_ENDPOINT_OUT         2</div><div class='add'>+#define USB_ABE_CANDEBUGGER_FD_VENDOR_ID 0x16d0</div><div class='add'>+#define USB_ABE_CANDEBUGGER_FD_PRODUCT_ID 0x10b8</div><div class='add'>+</div><div class='add'>+#define USB_XYLANTA_SAINT3_VENDOR_ID 0x16d0</div><div class='add'>+#define USB_XYLANTA_SAINT3_PRODUCT_ID 0x0f30</div><div class='add'>+</div><div class='add'>+#define USB_CANNECTIVITY_VENDOR_ID 0x1209</div><div class='add'>+#define USB_CANNECTIVITY_PRODUCT_ID 0xca01</div><div class='add'>+</div><div class='add'>+/* Timestamp 32 bit timer runs at 1 MHz (1 µs tick). Worker accounts</div><div class='add'>+ * for timer overflow (will be after ~71 minutes)</div><div class='add'>+ */</div><div class='add'>+#define GS_USB_TIMESTAMP_TIMER_HZ (1 * HZ_PER_MHZ)</div><div class='add'>+#define GS_USB_TIMESTAMP_WORK_DELAY_SEC 1800</div><div class='add'>+static_assert(GS_USB_TIMESTAMP_WORK_DELAY_SEC &lt;</div><div class='add'>+	      CYCLECOUNTER_MASK(32) / GS_USB_TIMESTAMP_TIMER_HZ / 2);</div><div class='ctx'> </div><div class='ctx'> /* Device specific constants */</div><div class='ctx'> enum gs_usb_breq {</div><div class='hunk'>@@ -39,7 +61,17 @@ enum gs_usb_breq {</div><div class='ctx'> 	GS_USB_BREQ_MODE,</div><div class='ctx'> 	GS_USB_BREQ_BERR,</div><div class='ctx'> 	GS_USB_BREQ_BT_CONST,</div><div class='del'>-	GS_USB_BREQ_DEVICE_CONFIG</div><div class='add'>+	GS_USB_BREQ_DEVICE_CONFIG,</div><div class='add'>+	GS_USB_BREQ_TIMESTAMP,</div><div class='add'>+	GS_USB_BREQ_IDENTIFY,</div><div class='add'>+	GS_USB_BREQ_GET_USER_ID,</div><div class='add'>+	GS_USB_BREQ_QUIRK_CANTACT_PRO_DATA_BITTIMING = GS_USB_BREQ_GET_USER_ID,</div><div class='add'>+	GS_USB_BREQ_SET_USER_ID,</div><div class='add'>+	GS_USB_BREQ_DATA_BITTIMING,</div><div class='add'>+	GS_USB_BREQ_BT_CONST_EXT,</div><div class='add'>+	GS_USB_BREQ_SET_TERMINATION,</div><div class='add'>+	GS_USB_BREQ_GET_TERMINATION,</div><div class='add'>+	GS_USB_BREQ_GET_STATE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum gs_can_mode {</div><div class='hunk'>@@ -58,79 +90,201 @@ enum gs_can_state {</div><div class='ctx'> 	GS_CAN_STATE_SLEEPING</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+enum gs_can_identify_mode {</div><div class='add'>+	GS_CAN_IDENTIFY_OFF = 0,</div><div class='add'>+	GS_CAN_IDENTIFY_ON</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum gs_can_termination_state {</div><div class='add'>+	GS_CAN_TERMINATION_STATE_OFF = 0,</div><div class='add'>+	GS_CAN_TERMINATION_STATE_ON</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define GS_USB_TERMINATION_DISABLED CAN_TERMINATION_DISABLED</div><div class='add'>+#define GS_USB_TERMINATION_ENABLED 120</div><div class='add'>+</div><div class='ctx'> /* data types passed between host and device */</div><div class='add'>+</div><div class='add'>+/* The firmware on the original USB2CAN by Geschwister Schneider</div><div class='add'>+ * Technologie Entwicklungs- und Vertriebs UG exchanges all data</div><div class='add'>+ * between the host and the device in host byte order. This is done</div><div class='add'>+ * with the struct gs_host_config::byte_order member, which is sent</div><div class='add'>+ * first to indicate the desired byte order.</div><div class='add'>+ *</div><div class='add'>+ * The widely used open source firmware candleLight doesn't support</div><div class='add'>+ * this feature and exchanges the data in little endian byte order.</div><div class='add'>+ */</div><div class='ctx'> struct gs_host_config {</div><div class='del'>-	u32 byte_order;</div><div class='add'>+	__le32 byte_order;</div><div class='ctx'> } __packed;</div><div class='del'>-/* All data exchanged between host and device is exchanged in host byte order,</div><div class='del'>- * thanks to the struct gs_host_config byte_order member, which is sent first</div><div class='del'>- * to indicate the desired byte order.</div><div class='del'>- */</div><div class='ctx'> </div><div class='ctx'> struct gs_device_config {</div><div class='ctx'> 	u8 reserved1;</div><div class='ctx'> 	u8 reserved2;</div><div class='ctx'> 	u8 reserved3;</div><div class='ctx'> 	u8 icount;</div><div class='del'>-	u32 sw_version;</div><div class='del'>-	u32 hw_version;</div><div class='add'>+	__le32 sw_version;</div><div class='add'>+	__le32 hw_version;</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='del'>-#define GS_CAN_MODE_NORMAL               0</div><div class='del'>-#define GS_CAN_MODE_LISTEN_ONLY          (1&lt;&lt;0)</div><div class='del'>-#define GS_CAN_MODE_LOOP_BACK            (1&lt;&lt;1)</div><div class='del'>-#define GS_CAN_MODE_TRIPLE_SAMPLE        (1&lt;&lt;2)</div><div class='del'>-#define GS_CAN_MODE_ONE_SHOT             (1&lt;&lt;3)</div><div class='add'>+#define GS_CAN_MODE_NORMAL 0</div><div class='add'>+#define GS_CAN_MODE_LISTEN_ONLY BIT(0)</div><div class='add'>+#define GS_CAN_MODE_LOOP_BACK BIT(1)</div><div class='add'>+#define GS_CAN_MODE_TRIPLE_SAMPLE BIT(2)</div><div class='add'>+#define GS_CAN_MODE_ONE_SHOT BIT(3)</div><div class='add'>+#define GS_CAN_MODE_HW_TIMESTAMP BIT(4)</div><div class='add'>+/* GS_CAN_FEATURE_IDENTIFY BIT(5) */</div><div class='add'>+/* GS_CAN_FEATURE_USER_ID BIT(6) */</div><div class='add'>+#define GS_CAN_MODE_PAD_PKTS_TO_MAX_PKT_SIZE BIT(7)</div><div class='add'>+#define GS_CAN_MODE_FD BIT(8)</div><div class='add'>+/* GS_CAN_FEATURE_REQ_USB_QUIRK_LPC546XX BIT(9) */</div><div class='add'>+/* GS_CAN_FEATURE_BT_CONST_EXT BIT(10) */</div><div class='add'>+/* GS_CAN_FEATURE_TERMINATION BIT(11) */</div><div class='add'>+#define GS_CAN_MODE_BERR_REPORTING BIT(12)</div><div class='add'>+/* GS_CAN_FEATURE_GET_STATE BIT(13) */</div><div class='ctx'> </div><div class='ctx'> struct gs_device_mode {</div><div class='del'>-	u32 mode;</div><div class='del'>-	u32 flags;</div><div class='add'>+	__le32 mode;</div><div class='add'>+	__le32 flags;</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='ctx'> struct gs_device_state {</div><div class='del'>-	u32 state;</div><div class='del'>-	u32 rxerr;</div><div class='del'>-	u32 txerr;</div><div class='add'>+	__le32 state;</div><div class='add'>+	__le32 rxerr;</div><div class='add'>+	__le32 txerr;</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='ctx'> struct gs_device_bittiming {</div><div class='del'>-	u32 prop_seg;</div><div class='del'>-	u32 phase_seg1;</div><div class='del'>-	u32 phase_seg2;</div><div class='del'>-	u32 sjw;</div><div class='del'>-	u32 brp;</div><div class='add'>+	__le32 prop_seg;</div><div class='add'>+	__le32 phase_seg1;</div><div class='add'>+	__le32 phase_seg2;</div><div class='add'>+	__le32 sjw;</div><div class='add'>+	__le32 brp;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct gs_identify_mode {</div><div class='add'>+	__le32 mode;</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='del'>-#define GS_CAN_FEATURE_LISTEN_ONLY      (1&lt;&lt;0)</div><div class='del'>-#define GS_CAN_FEATURE_LOOP_BACK        (1&lt;&lt;1)</div><div class='del'>-#define GS_CAN_FEATURE_TRIPLE_SAMPLE    (1&lt;&lt;2)</div><div class='del'>-#define GS_CAN_FEATURE_ONE_SHOT         (1&lt;&lt;3)</div><div class='add'>+struct gs_device_termination_state {</div><div class='add'>+	__le32 state;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+#define GS_CAN_FEATURE_LISTEN_ONLY BIT(0)</div><div class='add'>+#define GS_CAN_FEATURE_LOOP_BACK BIT(1)</div><div class='add'>+#define GS_CAN_FEATURE_TRIPLE_SAMPLE BIT(2)</div><div class='add'>+#define GS_CAN_FEATURE_ONE_SHOT BIT(3)</div><div class='add'>+#define GS_CAN_FEATURE_HW_TIMESTAMP BIT(4)</div><div class='add'>+#define GS_CAN_FEATURE_IDENTIFY BIT(5)</div><div class='add'>+#define GS_CAN_FEATURE_USER_ID BIT(6)</div><div class='add'>+#define GS_CAN_FEATURE_PAD_PKTS_TO_MAX_PKT_SIZE BIT(7)</div><div class='add'>+#define GS_CAN_FEATURE_FD BIT(8)</div><div class='add'>+#define GS_CAN_FEATURE_REQ_USB_QUIRK_LPC546XX BIT(9)</div><div class='add'>+#define GS_CAN_FEATURE_BT_CONST_EXT BIT(10)</div><div class='add'>+#define GS_CAN_FEATURE_TERMINATION BIT(11)</div><div class='add'>+#define GS_CAN_FEATURE_BERR_REPORTING BIT(12)</div><div class='add'>+#define GS_CAN_FEATURE_GET_STATE BIT(13)</div><div class='add'>+#define GS_CAN_FEATURE_MASK GENMASK(13, 0)</div><div class='add'>+</div><div class='add'>+/* internal quirks - keep in GS_CAN_FEATURE space for now */</div><div class='add'>+</div><div class='add'>+/* CANtact Pro original firmware:</div><div class='add'>+ * BREQ DATA_BITTIMING overlaps with GET_USER_ID</div><div class='add'>+ */</div><div class='add'>+#define GS_CAN_FEATURE_QUIRK_BREQ_CANTACT_PRO BIT(31)</div><div class='ctx'> </div><div class='ctx'> struct gs_device_bt_const {</div><div class='del'>-	u32 feature;</div><div class='del'>-	u32 fclk_can;</div><div class='del'>-	u32 tseg1_min;</div><div class='del'>-	u32 tseg1_max;</div><div class='del'>-	u32 tseg2_min;</div><div class='del'>-	u32 tseg2_max;</div><div class='del'>-	u32 sjw_max;</div><div class='del'>-	u32 brp_min;</div><div class='del'>-	u32 brp_max;</div><div class='del'>-	u32 brp_inc;</div><div class='add'>+	__le32 feature;</div><div class='add'>+	__le32 fclk_can;</div><div class='add'>+	__le32 tseg1_min;</div><div class='add'>+	__le32 tseg1_max;</div><div class='add'>+	__le32 tseg2_min;</div><div class='add'>+	__le32 tseg2_max;</div><div class='add'>+	__le32 sjw_max;</div><div class='add'>+	__le32 brp_min;</div><div class='add'>+	__le32 brp_max;</div><div class='add'>+	__le32 brp_inc;</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='del'>-#define GS_CAN_FLAG_OVERFLOW 1</div><div class='add'>+struct gs_device_bt_const_extended {</div><div class='add'>+	__le32 feature;</div><div class='add'>+	__le32 fclk_can;</div><div class='add'>+	__le32 tseg1_min;</div><div class='add'>+	__le32 tseg1_max;</div><div class='add'>+	__le32 tseg2_min;</div><div class='add'>+	__le32 tseg2_max;</div><div class='add'>+	__le32 sjw_max;</div><div class='add'>+	__le32 brp_min;</div><div class='add'>+	__le32 brp_max;</div><div class='add'>+	__le32 brp_inc;</div><div class='add'>+</div><div class='add'>+	__le32 dtseg1_min;</div><div class='add'>+	__le32 dtseg1_max;</div><div class='add'>+	__le32 dtseg2_min;</div><div class='add'>+	__le32 dtseg2_max;</div><div class='add'>+	__le32 dsjw_max;</div><div class='add'>+	__le32 dbrp_min;</div><div class='add'>+	__le32 dbrp_max;</div><div class='add'>+	__le32 dbrp_inc;</div><div class='add'>+} __packed;</div><div class='ctx'> </div><div class='del'>-struct gs_host_frame {</div><div class='del'>-	u32 echo_id;</div><div class='del'>-	u32 can_id;</div><div class='add'>+#define GS_CAN_FLAG_OVERFLOW BIT(0)</div><div class='add'>+#define GS_CAN_FLAG_FD BIT(1)</div><div class='add'>+#define GS_CAN_FLAG_BRS BIT(2)</div><div class='add'>+#define GS_CAN_FLAG_ESI BIT(3)</div><div class='ctx'> </div><div class='del'>-	u8 can_dlc;</div><div class='del'>-	u8 channel;</div><div class='del'>-	u8 flags;</div><div class='del'>-	u8 reserved;</div><div class='add'>+struct classic_can {</div><div class='add'>+	u8 data[8];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct classic_can_ts {</div><div class='add'>+	u8 data[8];</div><div class='add'>+	__le32 timestamp_us;</div><div class='add'>+} __packed;</div><div class='ctx'> </div><div class='add'>+struct classic_can_quirk {</div><div class='ctx'> 	u8 data[8];</div><div class='add'>+	u8 quirk;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct canfd {</div><div class='add'>+	u8 data[64];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct canfd_ts {</div><div class='add'>+	u8 data[64];</div><div class='add'>+	__le32 timestamp_us;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct canfd_quirk {</div><div class='add'>+	u8 data[64];</div><div class='add'>+	u8 quirk;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* struct gs_host_frame::echo_id == GS_HOST_FRAME_ECHO_ID_RX indicates</div><div class='add'>+ * a regular RX'ed CAN frame</div><div class='add'>+ */</div><div class='add'>+#define GS_HOST_FRAME_ECHO_ID_RX 0xffffffff</div><div class='add'>+</div><div class='add'>+struct gs_host_frame {</div><div class='add'>+	struct_group(header,</div><div class='add'>+		u32 echo_id;</div><div class='add'>+		__le32 can_id;</div><div class='add'>+</div><div class='add'>+		u8 can_dlc;</div><div class='add'>+		u8 channel;</div><div class='add'>+		u8 flags;</div><div class='add'>+		u8 reserved;</div><div class='add'>+	);</div><div class='add'>+</div><div class='add'>+	union {</div><div class='add'>+		DECLARE_FLEX_ARRAY(struct classic_can, classic_can);</div><div class='add'>+		DECLARE_FLEX_ARRAY(struct classic_can_ts, classic_can_ts);</div><div class='add'>+		DECLARE_FLEX_ARRAY(struct classic_can_quirk, classic_can_quirk);</div><div class='add'>+		DECLARE_FLEX_ARRAY(struct canfd, canfd);</div><div class='add'>+		DECLARE_FLEX_ARRAY(struct canfd_ts, canfd_ts);</div><div class='add'>+		DECLARE_FLEX_ARRAY(struct canfd_quirk, canfd_quirk);</div><div class='add'>+	};</div><div class='ctx'> } __packed;</div><div class='ctx'> /* The GS USB devices make use of the same flags and masks as in</div><div class='ctx'>  * linux/can.h and linux/can/error.h, and no additional mapping is necessary.</div><div class='hunk'>@@ -140,10 +294,7 @@ struct gs_host_frame {</div><div class='ctx'> #define GS_MAX_TX_URBS 10</div><div class='ctx'> /* Only launch a max of GS_MAX_RX_URBS usb requests at a time. */</div><div class='ctx'> #define GS_MAX_RX_URBS 30</div><div class='del'>-/* Maximum number of interfaces the driver supports per device.</div><div class='del'>- * Current hardware only supports 2 interfaces. The future may vary.</div><div class='del'>- */</div><div class='del'>-#define GS_MAX_INTF 2</div><div class='add'>+#define GS_NAPI_WEIGHT 32</div><div class='ctx'> </div><div class='ctx'> struct gs_tx_context {</div><div class='ctx'> 	struct gs_can *dev;</div><div class='hunk'>@@ -153,16 +304,19 @@ struct gs_tx_context {</div><div class='ctx'> struct gs_can {</div><div class='ctx'> 	struct can_priv can; /* must be the first member */</div><div class='ctx'> </div><div class='add'>+	struct can_rx_offload offload;</div><div class='ctx'> 	struct gs_usb *parent;</div><div class='ctx'> </div><div class='ctx'> 	struct net_device *netdev;</div><div class='ctx'> 	struct usb_device *udev;</div><div class='del'>-	struct usb_interface *iface;</div><div class='ctx'> </div><div class='del'>-	struct can_bittiming_const bt_const;</div><div class='add'>+	struct can_bittiming_const bt_const, data_bt_const;</div><div class='ctx'> 	unsigned int channel;	/* channel number */</div><div class='ctx'> </div><div class='del'>-	/* This lock prevents a race condition between xmit and recieve. */</div><div class='add'>+	u32 feature;</div><div class='add'>+	unsigned int hf_size_tx;</div><div class='add'>+</div><div class='add'>+	/* This lock prevents a race condition between xmit and receive. */</div><div class='ctx'> 	spinlock_t tx_ctx_lock;</div><div class='ctx'> 	struct gs_tx_context tx_context[GS_MAX_TX_URBS];</div><div class='ctx'> </div><div class='hunk'>@@ -172,10 +326,22 @@ struct gs_can {</div><div class='ctx'> </div><div class='ctx'> /* usb interface struct */</div><div class='ctx'> struct gs_usb {</div><div class='del'>-	struct gs_can *canch[GS_MAX_INTF];</div><div class='ctx'> 	struct usb_anchor rx_submitted;</div><div class='del'>-	atomic_t active_channels;</div><div class='ctx'> 	struct usb_device *udev;</div><div class='add'>+</div><div class='add'>+	/* time counter for hardware timestamps */</div><div class='add'>+	struct cyclecounter cc;</div><div class='add'>+	struct timecounter tc;</div><div class='add'>+	spinlock_t tc_lock; /* spinlock to guard access tc-&gt;cycle_last */</div><div class='add'>+	struct delayed_work timestamp;</div><div class='add'>+</div><div class='add'>+	unsigned int hf_size_rx;</div><div class='add'>+	u8 active_channels;</div><div class='add'>+	u8 channel_cnt;</div><div class='add'>+</div><div class='add'>+	unsigned int pipe_in;</div><div class='add'>+	unsigned int pipe_out;</div><div class='add'>+	struct gs_can *canch[] __counted_by(channel_cnt);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* 'allocate' a tx context.</div><div class='hunk'>@@ -209,7 +375,8 @@ static void gs_free_tx_context(struct gs_tx_context *txc)</div><div class='ctx'> </div><div class='ctx'> /* Get a tx context by id.</div><div class='ctx'>  */</div><div class='del'>-static struct gs_tx_context *gs_get_tx_context(struct gs_can *dev, unsigned int id)</div><div class='add'>+static struct gs_tx_context *gs_get_tx_context(struct gs_can *dev,</div><div class='add'>+					       unsigned int id)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='hunk'>@@ -224,29 +391,108 @@ static struct gs_tx_context *gs_get_tx_context(struct gs_can *dev, unsigned int</div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int gs_cmd_reset(struct gs_usb *gsusb, struct gs_can *gsdev)</div><div class='add'>+static int gs_cmd_reset(struct gs_can *dev)</div><div class='ctx'> {</div><div class='del'>-	struct gs_device_mode *dm;</div><div class='del'>-	struct usb_interface *intf = gsdev-&gt;iface;</div><div class='add'>+	struct gs_device_mode dm = {</div><div class='add'>+		.mode = cpu_to_le32(GS_CAN_MODE_RESET),</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return usb_control_msg_send(dev-&gt;udev, 0, GS_USB_BREQ_MODE,</div><div class='add'>+				    USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_INTERFACE,</div><div class='add'>+				    dev-&gt;channel, 0, &amp;dm, sizeof(dm), 1000,</div><div class='add'>+				    GFP_KERNEL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int gs_usb_get_timestamp(const struct gs_usb *parent,</div><div class='add'>+				       u32 *timestamp_p)</div><div class='add'>+{</div><div class='add'>+	__le32 timestamp;</div><div class='ctx'> 	int rc;</div><div class='ctx'> </div><div class='del'>-	dm = kzalloc(sizeof(*dm), GFP_KERNEL);</div><div class='del'>-	if (!dm)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	rc = usb_control_msg_recv(parent-&gt;udev, 0, GS_USB_BREQ_TIMESTAMP,</div><div class='add'>+				  USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_INTERFACE,</div><div class='add'>+				  0, 0,</div><div class='add'>+				  &amp;timestamp, sizeof(timestamp),</div><div class='add'>+				  USB_CTRL_GET_TIMEOUT,</div><div class='add'>+				  GFP_KERNEL);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='ctx'> </div><div class='del'>-	dm-&gt;mode = GS_CAN_MODE_RESET;</div><div class='add'>+	*timestamp_p = le32_to_cpu(timestamp);</div><div class='ctx'> </div><div class='del'>-	rc = usb_control_msg(interface_to_usbdev(intf),</div><div class='del'>-			     usb_sndctrlpipe(interface_to_usbdev(intf), 0),</div><div class='del'>-			     GS_USB_BREQ_MODE,</div><div class='del'>-			     USB_DIR_OUT|USB_TYPE_VENDOR|USB_RECIP_INTERFACE,</div><div class='del'>-			     gsdev-&gt;channel,</div><div class='del'>-			     0,</div><div class='del'>-			     dm,</div><div class='del'>-			     sizeof(*dm),</div><div class='del'>-			     1000);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	return rc;</div><div class='add'>+static u64 gs_usb_timestamp_read(struct cyclecounter *cc) __must_hold(&amp;dev-&gt;tc_lock)</div><div class='add'>+{</div><div class='add'>+	struct gs_usb *parent = container_of(cc, struct gs_usb, cc);</div><div class='add'>+	u32 timestamp = 0;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;parent-&gt;tc_lock);</div><div class='add'>+</div><div class='add'>+	/* drop lock for synchronous USB transfer */</div><div class='add'>+	spin_unlock_bh(&amp;parent-&gt;tc_lock);</div><div class='add'>+	err = gs_usb_get_timestamp(parent, &amp;timestamp);</div><div class='add'>+	spin_lock_bh(&amp;parent-&gt;tc_lock);</div><div class='add'>+	if (err)</div><div class='add'>+		dev_err(&amp;parent-&gt;udev-&gt;dev,</div><div class='add'>+			"Error %d while reading timestamp. HW timestamps may be inaccurate.",</div><div class='add'>+			err);</div><div class='add'>+</div><div class='add'>+	return timestamp;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gs_usb_timestamp_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct delayed_work *delayed_work = to_delayed_work(work);</div><div class='add'>+	struct gs_usb *parent;</div><div class='add'>+</div><div class='add'>+	parent = container_of(delayed_work, struct gs_usb, timestamp);</div><div class='add'>+	spin_lock_bh(&amp;parent-&gt;tc_lock);</div><div class='add'>+	timecounter_read(&amp;parent-&gt;tc);</div><div class='add'>+	spin_unlock_bh(&amp;parent-&gt;tc_lock);</div><div class='add'>+</div><div class='add'>+	schedule_delayed_work(&amp;parent-&gt;timestamp,</div><div class='add'>+			      GS_USB_TIMESTAMP_WORK_DELAY_SEC * HZ);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gs_usb_skb_set_timestamp(struct gs_can *dev,</div><div class='add'>+				     struct sk_buff *skb, u32 timestamp)</div><div class='add'>+{</div><div class='add'>+	struct skb_shared_hwtstamps *hwtstamps = skb_hwtstamps(skb);</div><div class='add'>+	struct gs_usb *parent = dev-&gt;parent;</div><div class='add'>+	u64 ns;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;parent-&gt;tc_lock);</div><div class='add'>+	ns = timecounter_cyc2time(&amp;parent-&gt;tc, timestamp);</div><div class='add'>+	spin_unlock_bh(&amp;parent-&gt;tc_lock);</div><div class='add'>+</div><div class='add'>+	hwtstamps-&gt;hwtstamp = ns_to_ktime(ns);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gs_usb_timestamp_init(struct gs_usb *parent)</div><div class='add'>+{</div><div class='add'>+	struct cyclecounter *cc = &amp;parent-&gt;cc;</div><div class='add'>+</div><div class='add'>+	cc-&gt;read = gs_usb_timestamp_read;</div><div class='add'>+	cc-&gt;mask = CYCLECOUNTER_MASK(32);</div><div class='add'>+	cc-&gt;shift = 32 - bits_per(NSEC_PER_SEC / GS_USB_TIMESTAMP_TIMER_HZ);</div><div class='add'>+	cc-&gt;mult = clocksource_hz2mult(GS_USB_TIMESTAMP_TIMER_HZ, cc-&gt;shift);</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;parent-&gt;tc_lock);</div><div class='add'>+	spin_lock_bh(&amp;parent-&gt;tc_lock);</div><div class='add'>+	timecounter_init(&amp;parent-&gt;tc, &amp;parent-&gt;cc, ktime_get_real_ns());</div><div class='add'>+	spin_unlock_bh(&amp;parent-&gt;tc_lock);</div><div class='add'>+</div><div class='add'>+	INIT_DELAYED_WORK(&amp;parent-&gt;timestamp, gs_usb_timestamp_work);</div><div class='add'>+	schedule_delayed_work(&amp;parent-&gt;timestamp,</div><div class='add'>+			      GS_USB_TIMESTAMP_WORK_DELAY_SEC * HZ);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gs_usb_timestamp_stop(struct gs_usb *parent)</div><div class='add'>+{</div><div class='add'>+	cancel_delayed_work_sync(&amp;parent-&gt;timestamp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void gs_update_state(struct gs_can *dev, struct can_frame *cf)</div><div class='hunk'>@@ -274,19 +520,107 @@ static void gs_update_state(struct gs_can *dev, struct can_frame *cf)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void gs_usb_recieve_bulk_callback(struct urb *urb)</div><div class='add'>+static u32 gs_usb_set_timestamp(struct gs_can *dev, struct sk_buff *skb,</div><div class='add'>+				const struct gs_host_frame *hf)</div><div class='ctx'> {</div><div class='del'>-	struct gs_usb *usbcan = urb-&gt;context;</div><div class='add'>+	u32 timestamp;</div><div class='add'>+</div><div class='add'>+	if (hf-&gt;flags &amp; GS_CAN_FLAG_FD)</div><div class='add'>+		timestamp = le32_to_cpu(hf-&gt;canfd_ts-&gt;timestamp_us);</div><div class='add'>+	else</div><div class='add'>+		timestamp = le32_to_cpu(hf-&gt;classic_can_ts-&gt;timestamp_us);</div><div class='add'>+</div><div class='add'>+	if (skb)</div><div class='add'>+		gs_usb_skb_set_timestamp(dev, skb, timestamp);</div><div class='add'>+</div><div class='add'>+	return timestamp;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gs_usb_rx_offload(struct gs_can *dev, struct sk_buff *skb,</div><div class='add'>+			      const struct gs_host_frame *hf)</div><div class='add'>+{</div><div class='add'>+	struct can_rx_offload *offload = &amp;dev-&gt;offload;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;feature &amp; GS_CAN_FEATURE_HW_TIMESTAMP) {</div><div class='add'>+		const u32 ts = gs_usb_set_timestamp(dev, skb, hf);</div><div class='add'>+</div><div class='add'>+		rc = can_rx_offload_queue_timestamp(offload, skb, ts);</div><div class='add'>+	} else {</div><div class='add'>+		rc = can_rx_offload_queue_tail(offload, skb);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rc)</div><div class='add'>+		dev-&gt;netdev-&gt;stats.rx_fifo_errors++;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int</div><div class='add'>+gs_usb_get_echo_skb(struct gs_can *dev, struct sk_buff *skb,</div><div class='add'>+		    const struct gs_host_frame *hf)</div><div class='add'>+{</div><div class='add'>+	struct can_rx_offload *offload = &amp;dev-&gt;offload;</div><div class='add'>+	const u32 echo_id = hf-&gt;echo_id;</div><div class='add'>+	unsigned int len;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;feature &amp; GS_CAN_FEATURE_HW_TIMESTAMP) {</div><div class='add'>+		const u32 ts = gs_usb_set_timestamp(dev, skb, hf);</div><div class='add'>+</div><div class='add'>+		len = can_rx_offload_get_echo_skb_queue_timestamp(offload, echo_id,</div><div class='add'>+								  ts, NULL);</div><div class='add'>+	} else {</div><div class='add'>+		len = can_rx_offload_get_echo_skb_queue_tail(offload, echo_id,</div><div class='add'>+							     NULL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int</div><div class='add'>+gs_usb_get_minimum_rx_length(const struct gs_can *dev, const struct gs_host_frame *hf,</div><div class='add'>+			     unsigned int *data_length_p)</div><div class='add'>+{</div><div class='add'>+	unsigned int minimum_length, data_length = 0;</div><div class='add'>+</div><div class='add'>+	if (hf-&gt;flags &amp; GS_CAN_FLAG_FD) {</div><div class='add'>+		if (hf-&gt;echo_id == GS_HOST_FRAME_ECHO_ID_RX)</div><div class='add'>+			data_length = can_fd_dlc2len(hf-&gt;can_dlc);</div><div class='add'>+</div><div class='add'>+		if (dev-&gt;feature &amp; GS_CAN_FEATURE_HW_TIMESTAMP)</div><div class='add'>+			/* timestamp follows data field of max size */</div><div class='add'>+			minimum_length = struct_size(hf, canfd_ts, 1);</div><div class='add'>+		else</div><div class='add'>+			minimum_length = sizeof(hf-&gt;header) + data_length;</div><div class='add'>+	} else {</div><div class='add'>+		if (hf-&gt;echo_id == GS_HOST_FRAME_ECHO_ID_RX &amp;&amp;</div><div class='add'>+		    !(hf-&gt;can_id &amp; cpu_to_le32(CAN_RTR_FLAG)))</div><div class='add'>+			data_length = can_cc_dlc2len(hf-&gt;can_dlc);</div><div class='add'>+</div><div class='add'>+		if (dev-&gt;feature &amp; GS_CAN_FEATURE_HW_TIMESTAMP)</div><div class='add'>+			/* timestamp follows data field of max size */</div><div class='add'>+			minimum_length = struct_size(hf, classic_can_ts, 1);</div><div class='add'>+		else</div><div class='add'>+			minimum_length = sizeof(hf-&gt;header) + data_length;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*data_length_p = data_length;</div><div class='add'>+	return minimum_length;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gs_usb_receive_bulk_callback(struct urb *urb)</div><div class='add'>+{</div><div class='add'>+	struct gs_usb *parent = urb-&gt;context;</div><div class='ctx'> 	struct gs_can *dev;</div><div class='ctx'> 	struct net_device *netdev;</div><div class='ctx'> 	int rc;</div><div class='ctx'> 	struct net_device_stats *stats;</div><div class='ctx'> 	struct gs_host_frame *hf = urb-&gt;transfer_buffer;</div><div class='add'>+	unsigned int minimum_length, data_length;</div><div class='ctx'> 	struct gs_tx_context *txc;</div><div class='ctx'> 	struct can_frame *cf;</div><div class='add'>+	struct canfd_frame *cfd;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> </div><div class='del'>-	BUG_ON(!usbcan);</div><div class='add'>+	BUG_ON(!parent);</div><div class='ctx'> </div><div class='ctx'> 	switch (urb-&gt;status) {</div><div class='ctx'> 	case 0: /* success */</div><div class='hunk'>@@ -299,11 +633,20 @@ static void gs_usb_recieve_bulk_callback(struct urb *urb)</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* device reports out of range channel id */</div><div class='del'>-	if (hf-&gt;channel &gt;= GS_MAX_INTF)</div><div class='add'>+	minimum_length = sizeof(hf-&gt;header);</div><div class='add'>+	if (urb-&gt;actual_length &lt; minimum_length) {</div><div class='add'>+		dev_err_ratelimited(&amp;parent-&gt;udev-&gt;dev,</div><div class='add'>+				    "short read (actual_length=%u, minimum_length=%u)\n",</div><div class='add'>+				    urb-&gt;actual_length, minimum_length);</div><div class='add'>+</div><div class='ctx'> 		goto resubmit_urb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* device reports out of range channel id */</div><div class='add'>+	if (hf-&gt;channel &gt;= parent-&gt;channel_cnt)</div><div class='add'>+		goto device_detach;</div><div class='ctx'> </div><div class='del'>-	dev = usbcan-&gt;canch[hf-&gt;channel];</div><div class='add'>+	dev = parent-&gt;canch[hf-&gt;channel];</div><div class='ctx'> </div><div class='ctx'> 	netdev = dev-&gt;netdev;</div><div class='ctx'> 	stats = &amp;netdev-&gt;stats;</div><div class='hunk'>@@ -311,82 +654,111 @@ static void gs_usb_recieve_bulk_callback(struct urb *urb)</div><div class='ctx'> 	if (!netif_device_present(netdev))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	if (hf-&gt;echo_id == -1) { /* normal rx */</div><div class='del'>-		skb = alloc_can_skb(dev-&gt;netdev, &amp;cf);</div><div class='del'>-		if (!skb)</div><div class='del'>-			return;</div><div class='add'>+	if (!netif_running(netdev))</div><div class='add'>+		goto resubmit_urb;</div><div class='add'>+</div><div class='add'>+	minimum_length = gs_usb_get_minimum_rx_length(dev, hf, &amp;data_length);</div><div class='add'>+	if (urb-&gt;actual_length &lt; minimum_length) {</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+		stats-&gt;rx_length_errors++;</div><div class='add'>+</div><div class='add'>+		if (net_ratelimit())</div><div class='add'>+			netdev_err(netdev,</div><div class='add'>+				   "short read (actual_length=%u, minimum_length=%u)\n",</div><div class='add'>+				   urb-&gt;actual_length, minimum_length);</div><div class='add'>+</div><div class='add'>+		goto resubmit_urb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (hf-&gt;echo_id == GS_HOST_FRAME_ECHO_ID_RX) { /* normal rx */</div><div class='add'>+		if (hf-&gt;flags &amp; GS_CAN_FLAG_FD) {</div><div class='add'>+			skb = alloc_canfd_skb(netdev, &amp;cfd);</div><div class='add'>+			if (!skb)</div><div class='add'>+				return;</div><div class='ctx'> </div><div class='del'>-		cf-&gt;can_id = hf-&gt;can_id;</div><div class='add'>+			cfd-&gt;can_id = le32_to_cpu(hf-&gt;can_id);</div><div class='add'>+			cfd-&gt;len = data_length;</div><div class='add'>+			if (hf-&gt;flags &amp; GS_CAN_FLAG_BRS)</div><div class='add'>+				cfd-&gt;flags |= CANFD_BRS;</div><div class='add'>+			if (hf-&gt;flags &amp; GS_CAN_FLAG_ESI)</div><div class='add'>+				cfd-&gt;flags |= CANFD_ESI;</div><div class='ctx'> </div><div class='del'>-		cf-&gt;can_dlc = get_can_dlc(hf-&gt;can_dlc);</div><div class='del'>-		memcpy(cf-&gt;data, hf-&gt;data, 8);</div><div class='add'>+			memcpy(cfd-&gt;data, hf-&gt;canfd-&gt;data, data_length);</div><div class='add'>+		} else {</div><div class='add'>+			skb = alloc_can_skb(netdev, &amp;cf);</div><div class='add'>+			if (!skb)</div><div class='add'>+				return;</div><div class='add'>+</div><div class='add'>+			cf-&gt;can_id = le32_to_cpu(hf-&gt;can_id);</div><div class='add'>+			can_frame_set_cc_len(cf, hf-&gt;can_dlc, dev-&gt;can.ctrlmode);</div><div class='ctx'> </div><div class='del'>-		/* ERROR frames tell us information about the controller */</div><div class='del'>-		if (hf-&gt;can_id &amp; CAN_ERR_FLAG)</div><div class='del'>-			gs_update_state(dev, cf);</div><div class='add'>+			memcpy(cf-&gt;data, hf-&gt;classic_can-&gt;data, data_length);</div><div class='ctx'> </div><div class='del'>-		netdev-&gt;stats.rx_packets++;</div><div class='del'>-		netdev-&gt;stats.rx_bytes += hf-&gt;can_dlc;</div><div class='add'>+			/* ERROR frames tell us information about the controller */</div><div class='add'>+			if (le32_to_cpu(hf-&gt;can_id) &amp; CAN_ERR_FLAG)</div><div class='add'>+				gs_update_state(dev, cf);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-		netif_rx(skb);</div><div class='add'>+		gs_usb_rx_offload(dev, skb, hf);</div><div class='ctx'> 	} else { /* echo_id == hf-&gt;echo_id */</div><div class='ctx'> 		if (hf-&gt;echo_id &gt;= GS_MAX_TX_URBS) {</div><div class='ctx'> 			netdev_err(netdev,</div><div class='del'>-				   "Unexpected out of range echo id %d\n",</div><div class='add'>+				   "Unexpected out of range echo id %u\n",</div><div class='ctx'> 				   hf-&gt;echo_id);</div><div class='ctx'> 			goto resubmit_urb;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		netdev-&gt;stats.tx_packets++;</div><div class='del'>-		netdev-&gt;stats.tx_bytes += hf-&gt;can_dlc;</div><div class='del'>-</div><div class='ctx'> 		txc = gs_get_tx_context(dev, hf-&gt;echo_id);</div><div class='ctx'> </div><div class='ctx'> 		/* bad devices send bad echo_ids. */</div><div class='ctx'> 		if (!txc) {</div><div class='ctx'> 			netdev_err(netdev,</div><div class='del'>-				   "Unexpected unused echo id %d\n",</div><div class='add'>+				   "Unexpected unused echo id %u\n",</div><div class='ctx'> 				   hf-&gt;echo_id);</div><div class='ctx'> 			goto resubmit_urb;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		can_get_echo_skb(netdev, hf-&gt;echo_id);</div><div class='del'>-</div><div class='add'>+		skb = dev-&gt;can.echo_skb[hf-&gt;echo_id];</div><div class='add'>+		stats-&gt;tx_packets++;</div><div class='add'>+		stats-&gt;tx_bytes += gs_usb_get_echo_skb(dev, skb, hf);</div><div class='ctx'> 		gs_free_tx_context(txc);</div><div class='ctx'> </div><div class='add'>+		atomic_dec(&amp;dev-&gt;active_tx_urbs);</div><div class='add'>+</div><div class='ctx'> 		netif_wake_queue(netdev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (hf-&gt;flags &amp; GS_CAN_FLAG_OVERFLOW) {</div><div class='add'>+		stats-&gt;rx_over_errors++;</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+</div><div class='ctx'> 		skb = alloc_can_err_skb(netdev, &amp;cf);</div><div class='ctx'> 		if (!skb)</div><div class='ctx'> 			goto resubmit_urb;</div><div class='ctx'> </div><div class='ctx'> 		cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='del'>-		cf-&gt;can_dlc = CAN_ERR_DLC;</div><div class='add'>+		cf-&gt;len = CAN_ERR_DLC;</div><div class='ctx'> 		cf-&gt;data[1] = CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='del'>-		stats-&gt;rx_over_errors++;</div><div class='del'>-		stats-&gt;rx_errors++;</div><div class='del'>-		netif_rx(skb);</div><div class='add'>+</div><div class='add'>+		gs_usb_rx_offload(dev, skb, hf);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>- resubmit_urb:</div><div class='del'>-	usb_fill_bulk_urb(urb,</div><div class='del'>-			  usbcan-&gt;udev,</div><div class='del'>-			  usb_rcvbulkpipe(usbcan-&gt;udev, GSUSB_ENDPOINT_IN),</div><div class='del'>-			  hf,</div><div class='del'>-			  sizeof(struct gs_host_frame),</div><div class='del'>-			  gs_usb_recieve_bulk_callback,</div><div class='del'>-			  usbcan</div><div class='del'>-			  );</div><div class='add'>+	can_rx_offload_irq_finish(&amp;dev-&gt;offload);</div><div class='add'>+</div><div class='add'>+resubmit_urb:</div><div class='add'>+	usb_fill_bulk_urb(urb, parent-&gt;udev,</div><div class='add'>+			  parent-&gt;pipe_in,</div><div class='add'>+			  hf, parent-&gt;hf_size_rx,</div><div class='add'>+			  gs_usb_receive_bulk_callback, parent);</div><div class='ctx'> </div><div class='ctx'> 	rc = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='ctx'> </div><div class='ctx'> 	/* USB failure take down all interfaces */</div><div class='ctx'> 	if (rc == -ENODEV) {</div><div class='del'>-		for (rc = 0; rc &lt; GS_MAX_INTF; rc++) {</div><div class='del'>-			if (usbcan-&gt;canch[rc])</div><div class='del'>-				netif_device_detach(usbcan-&gt;canch[rc]-&gt;netdev);</div><div class='add'>+device_detach:</div><div class='add'>+		for (rc = 0; rc &lt; parent-&gt;channel_cnt; rc++) {</div><div class='add'>+			if (parent-&gt;canch[rc])</div><div class='add'>+				netif_device_detach(parent-&gt;canch[rc]-&gt;netdev);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -395,38 +767,42 @@ static int gs_usb_set_bittiming(struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct gs_can *dev = netdev_priv(netdev);</div><div class='ctx'> 	struct can_bittiming *bt = &amp;dev-&gt;can.bittiming;</div><div class='del'>-	struct usb_interface *intf = dev-&gt;iface;</div><div class='del'>-	int rc;</div><div class='del'>-	struct gs_device_bittiming *dbt;</div><div class='del'>-</div><div class='del'>-	dbt = kmalloc(sizeof(*dbt), GFP_KERNEL);</div><div class='del'>-	if (!dbt)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	dbt-&gt;prop_seg = bt-&gt;prop_seg;</div><div class='del'>-	dbt-&gt;phase_seg1 = bt-&gt;phase_seg1;</div><div class='del'>-	dbt-&gt;phase_seg2 = bt-&gt;phase_seg2;</div><div class='del'>-	dbt-&gt;sjw = bt-&gt;sjw;</div><div class='del'>-	dbt-&gt;brp = bt-&gt;brp;</div><div class='add'>+	struct gs_device_bittiming dbt = {</div><div class='add'>+		.prop_seg = cpu_to_le32(bt-&gt;prop_seg),</div><div class='add'>+		.phase_seg1 = cpu_to_le32(bt-&gt;phase_seg1),</div><div class='add'>+		.phase_seg2 = cpu_to_le32(bt-&gt;phase_seg2),</div><div class='add'>+		.sjw = cpu_to_le32(bt-&gt;sjw),</div><div class='add'>+		.brp = cpu_to_le32(bt-&gt;brp),</div><div class='add'>+	};</div><div class='ctx'> </div><div class='ctx'> 	/* request bit timings */</div><div class='del'>-	rc = usb_control_msg(interface_to_usbdev(intf),</div><div class='del'>-			     usb_sndctrlpipe(interface_to_usbdev(intf), 0),</div><div class='del'>-			     GS_USB_BREQ_BITTIMING,</div><div class='del'>-			     USB_DIR_OUT|USB_TYPE_VENDOR|USB_RECIP_INTERFACE,</div><div class='del'>-			     dev-&gt;channel,</div><div class='del'>-			     0,</div><div class='del'>-			     dbt,</div><div class='del'>-			     sizeof(*dbt),</div><div class='del'>-			     1000);</div><div class='del'>-</div><div class='del'>-	kfree(dbt);</div><div class='del'>-</div><div class='del'>-	if (rc &lt; 0)</div><div class='del'>-		dev_err(netdev-&gt;dev.parent, "Couldn't set bittimings (err=%d)",</div><div class='del'>-			rc);</div><div class='add'>+	return usb_control_msg_send(dev-&gt;udev, 0, GS_USB_BREQ_BITTIMING,</div><div class='add'>+				    USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_INTERFACE,</div><div class='add'>+				    dev-&gt;channel, 0, &amp;dbt, sizeof(dbt), 1000,</div><div class='add'>+				    GFP_KERNEL);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	return rc;</div><div class='add'>+static int gs_usb_set_data_bittiming(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct gs_can *dev = netdev_priv(netdev);</div><div class='add'>+	struct can_bittiming *bt = &amp;dev-&gt;can.fd.data_bittiming;</div><div class='add'>+	struct gs_device_bittiming dbt = {</div><div class='add'>+		.prop_seg = cpu_to_le32(bt-&gt;prop_seg),</div><div class='add'>+		.phase_seg1 = cpu_to_le32(bt-&gt;phase_seg1),</div><div class='add'>+		.phase_seg2 = cpu_to_le32(bt-&gt;phase_seg2),</div><div class='add'>+		.sjw = cpu_to_le32(bt-&gt;sjw),</div><div class='add'>+		.brp = cpu_to_le32(bt-&gt;brp),</div><div class='add'>+	};</div><div class='add'>+	u8 request = GS_USB_BREQ_DATA_BITTIMING;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;feature &amp; GS_CAN_FEATURE_QUIRK_BREQ_CANTACT_PRO)</div><div class='add'>+		request = GS_USB_BREQ_QUIRK_CANTACT_PRO_DATA_BITTIMING;</div><div class='add'>+</div><div class='add'>+	/* request data bit timings */</div><div class='add'>+	return usb_control_msg_send(dev-&gt;udev, 0, request,</div><div class='add'>+				    USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_INTERFACE,</div><div class='add'>+				    dev-&gt;channel, 0, &amp;dbt, sizeof(dbt), 1000,</div><div class='add'>+				    GFP_KERNEL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void gs_usb_xmit_callback(struct urb *urb)</div><div class='hunk'>@@ -435,35 +811,37 @@ static void gs_usb_xmit_callback(struct urb *urb)</div><div class='ctx'> 	struct gs_can *dev = txc-&gt;dev;</div><div class='ctx'> 	struct net_device *netdev = dev-&gt;netdev;</div><div class='ctx'> </div><div class='del'>-	if (urb-&gt;status)</div><div class='del'>-		netdev_info(netdev, "usb xmit fail %d\n", txc-&gt;echo_id);</div><div class='add'>+	if (!urb-&gt;status)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	usb_free_coherent(urb-&gt;dev,</div><div class='del'>-			  urb-&gt;transfer_buffer_length,</div><div class='del'>-			  urb-&gt;transfer_buffer,</div><div class='del'>-			  urb-&gt;transfer_dma);</div><div class='add'>+	if (urb-&gt;status != -ESHUTDOWN &amp;&amp; net_ratelimit())</div><div class='add'>+		netdev_info(netdev, "failed to xmit URB %u: %pe\n",</div><div class='add'>+			    txc-&gt;echo_id, ERR_PTR(urb-&gt;status));</div><div class='ctx'> </div><div class='del'>-	atomic_dec(&amp;dev-&gt;active_tx_urbs);</div><div class='add'>+	netdev-&gt;stats.tx_dropped++;</div><div class='add'>+	netdev-&gt;stats.tx_errors++;</div><div class='ctx'> </div><div class='del'>-	if (!netif_device_present(netdev))</div><div class='del'>-		return;</div><div class='add'>+	can_free_echo_skb(netdev, txc-&gt;echo_id, NULL);</div><div class='add'>+	gs_free_tx_context(txc);</div><div class='add'>+	atomic_dec(&amp;dev-&gt;active_tx_urbs);</div><div class='ctx'> </div><div class='del'>-	if (netif_queue_stopped(netdev))</div><div class='del'>-		netif_wake_queue(netdev);</div><div class='add'>+	netif_wake_queue(netdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static netdev_tx_t gs_can_start_xmit(struct sk_buff *skb, struct net_device *netdev)</div><div class='add'>+static netdev_tx_t gs_can_start_xmit(struct sk_buff *skb,</div><div class='add'>+				     struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct gs_can *dev = netdev_priv(netdev);</div><div class='ctx'> 	struct net_device_stats *stats = &amp;dev-&gt;netdev-&gt;stats;</div><div class='ctx'> 	struct urb *urb;</div><div class='ctx'> 	struct gs_host_frame *hf;</div><div class='ctx'> 	struct can_frame *cf;</div><div class='add'>+	struct canfd_frame *cfd;</div><div class='ctx'> 	int rc;</div><div class='ctx'> 	unsigned int idx;</div><div class='ctx'> 	struct gs_tx_context *txc;</div><div class='ctx'> </div><div class='del'>-	if (can_dropped_invalid_skb(netdev, skb))</div><div class='add'>+	if (can_dev_dropped_skb(netdev, skb))</div><div class='ctx'> 		return NETDEV_TX_OK;</div><div class='ctx'> </div><div class='ctx'> 	/* find an empty context to keep track of transmission */</div><div class='hunk'>@@ -473,45 +851,55 @@ static netdev_tx_t gs_can_start_xmit(struct sk_buff *skb, struct net_device *net</div><div class='ctx'> </div><div class='ctx'> 	/* create a URB, and a buffer for it */</div><div class='ctx'> 	urb = usb_alloc_urb(0, GFP_ATOMIC);</div><div class='del'>-	if (!urb) {</div><div class='del'>-		netdev_err(netdev, "No memory left for URB\n");</div><div class='add'>+	if (!urb)</div><div class='ctx'> 		goto nomem_urb;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	hf = usb_alloc_coherent(dev-&gt;udev, sizeof(*hf), GFP_ATOMIC,</div><div class='del'>-				&amp;urb-&gt;transfer_dma);</div><div class='del'>-	if (!hf) {</div><div class='del'>-		netdev_err(netdev, "No memory left for USB buffer\n");</div><div class='add'>+	hf = kmalloc(dev-&gt;hf_size_tx, GFP_ATOMIC);</div><div class='add'>+	if (!hf)</div><div class='ctx'> 		goto nomem_hf;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	idx = txc-&gt;echo_id;</div><div class='ctx'> </div><div class='ctx'> 	if (idx &gt;= GS_MAX_TX_URBS) {</div><div class='del'>-		netdev_err(netdev, "Invalid tx context %d\n", idx);</div><div class='add'>+		netdev_err(netdev, "Invalid tx context %u\n", idx);</div><div class='ctx'> 		goto badidx;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	hf-&gt;echo_id = idx;</div><div class='ctx'> 	hf-&gt;channel = dev-&gt;channel;</div><div class='add'>+	hf-&gt;flags = 0;</div><div class='add'>+	hf-&gt;reserved = 0;</div><div class='add'>+</div><div class='add'>+	if (can_is_canfd_skb(skb)) {</div><div class='add'>+		cfd = (struct canfd_frame *)skb-&gt;data;</div><div class='ctx'> </div><div class='del'>-	cf = (struct can_frame *)skb-&gt;data;</div><div class='add'>+		hf-&gt;can_id = cpu_to_le32(cfd-&gt;can_id);</div><div class='add'>+		hf-&gt;can_dlc = can_fd_len2dlc(cfd-&gt;len);</div><div class='add'>+		hf-&gt;flags |= GS_CAN_FLAG_FD;</div><div class='add'>+		if (cfd-&gt;flags &amp; CANFD_BRS)</div><div class='add'>+			hf-&gt;flags |= GS_CAN_FLAG_BRS;</div><div class='add'>+		if (cfd-&gt;flags &amp; CANFD_ESI)</div><div class='add'>+			hf-&gt;flags |= GS_CAN_FLAG_ESI;</div><div class='ctx'> </div><div class='del'>-	hf-&gt;can_id = cf-&gt;can_id;</div><div class='del'>-	hf-&gt;can_dlc = cf-&gt;can_dlc;</div><div class='del'>-	memcpy(hf-&gt;data, cf-&gt;data, cf-&gt;can_dlc);</div><div class='add'>+		memcpy(hf-&gt;canfd-&gt;data, cfd-&gt;data, cfd-&gt;len);</div><div class='add'>+	} else {</div><div class='add'>+		cf = (struct can_frame *)skb-&gt;data;</div><div class='add'>+</div><div class='add'>+		hf-&gt;can_id = cpu_to_le32(cf-&gt;can_id);</div><div class='add'>+		hf-&gt;can_dlc = can_get_cc_dlc(cf, dev-&gt;can.ctrlmode);</div><div class='add'>+</div><div class='add'>+		memcpy(hf-&gt;classic_can-&gt;data, cf-&gt;data, cf-&gt;len);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	usb_fill_bulk_urb(urb, dev-&gt;udev,</div><div class='del'>-			  usb_sndbulkpipe(dev-&gt;udev, GSUSB_ENDPOINT_OUT),</div><div class='del'>-			  hf,</div><div class='del'>-			  sizeof(*hf),</div><div class='del'>-			  gs_usb_xmit_callback,</div><div class='del'>-			  txc);</div><div class='add'>+			  dev-&gt;parent-&gt;pipe_out,</div><div class='add'>+			  hf, dev-&gt;hf_size_tx,</div><div class='add'>+			  gs_usb_xmit_callback, txc);</div><div class='ctx'> </div><div class='del'>-	urb-&gt;transfer_flags |= URB_NO_TRANSFER_DMA_MAP;</div><div class='add'>+	urb-&gt;transfer_flags |= URB_FREE_BUFFER;</div><div class='ctx'> 	usb_anchor_urb(urb, &amp;dev-&gt;tx_submitted);</div><div class='ctx'> </div><div class='del'>-	can_put_echo_skb(skb, netdev, idx);</div><div class='add'>+	can_put_echo_skb(skb, netdev, idx, 0);</div><div class='ctx'> </div><div class='ctx'> 	atomic_inc(&amp;dev-&gt;active_tx_urbs);</div><div class='ctx'> </div><div class='hunk'>@@ -519,15 +907,10 @@ static netdev_tx_t gs_can_start_xmit(struct sk_buff *skb, struct net_device *net</div><div class='ctx'> 	if (unlikely(rc)) {			/* usb send failed */</div><div class='ctx'> 		atomic_dec(&amp;dev-&gt;active_tx_urbs);</div><div class='ctx'> </div><div class='del'>-		can_free_echo_skb(netdev, idx);</div><div class='add'>+		can_free_echo_skb(netdev, idx, NULL);</div><div class='ctx'> 		gs_free_tx_context(txc);</div><div class='ctx'> </div><div class='ctx'> 		usb_unanchor_urb(urb);</div><div class='del'>-		usb_free_coherent(dev-&gt;udev,</div><div class='del'>-				  sizeof(*hf),</div><div class='del'>-				  hf,</div><div class='del'>-				  urb-&gt;transfer_dma);</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> 		if (rc == -ENODEV) {</div><div class='ctx'> 			netif_device_detach(netdev);</div><div class='hunk'>@@ -546,15 +929,12 @@ static netdev_tx_t gs_can_start_xmit(struct sk_buff *skb, struct net_device *net</div><div class='ctx'> </div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> </div><div class='del'>- badidx:</div><div class='del'>-	usb_free_coherent(dev-&gt;udev,</div><div class='del'>-			  sizeof(*hf),</div><div class='del'>-			  hf,</div><div class='del'>-			  urb-&gt;transfer_dma);</div><div class='del'>- nomem_hf:</div><div class='add'>+badidx:</div><div class='add'>+	kfree(hf);</div><div class='add'>+nomem_hf:</div><div class='ctx'> 	usb_free_urb(urb);</div><div class='ctx'> </div><div class='del'>- nomem_urb:</div><div class='add'>+nomem_urb:</div><div class='ctx'> 	gs_free_tx_context(txc);</div><div class='ctx'> 	dev_kfree_skb(skb);</div><div class='ctx'> 	stats-&gt;tx_dropped++;</div><div class='hunk'>@@ -565,49 +945,64 @@ static int gs_can_open(struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct gs_can *dev = netdev_priv(netdev);</div><div class='ctx'> 	struct gs_usb *parent = dev-&gt;parent;</div><div class='del'>-	int rc, i;</div><div class='del'>-	struct gs_device_mode *dm;</div><div class='add'>+	struct gs_device_mode dm = {</div><div class='add'>+		.mode = cpu_to_le32(GS_CAN_MODE_START),</div><div class='add'>+	};</div><div class='add'>+	struct gs_host_frame *hf;</div><div class='add'>+	struct urb *urb = NULL;</div><div class='ctx'> 	u32 ctrlmode;</div><div class='add'>+	u32 flags = 0;</div><div class='add'>+	int rc, i;</div><div class='ctx'> </div><div class='ctx'> 	rc = open_candev(netdev);</div><div class='ctx'> 	if (rc)</div><div class='ctx'> 		return rc;</div><div class='ctx'> </div><div class='del'>-	if (atomic_add_return(1, &amp;parent-&gt;active_channels) == 1) {</div><div class='add'>+	ctrlmode = dev-&gt;can.ctrlmode;</div><div class='add'>+	if (ctrlmode &amp; CAN_CTRLMODE_FD) {</div><div class='add'>+		if (dev-&gt;feature &amp; GS_CAN_FEATURE_REQ_USB_QUIRK_LPC546XX)</div><div class='add'>+			dev-&gt;hf_size_tx = struct_size(hf, canfd_quirk, 1);</div><div class='add'>+		else</div><div class='add'>+			dev-&gt;hf_size_tx = struct_size(hf, canfd, 1);</div><div class='add'>+	} else {</div><div class='add'>+		if (dev-&gt;feature &amp; GS_CAN_FEATURE_REQ_USB_QUIRK_LPC546XX)</div><div class='add'>+			dev-&gt;hf_size_tx = struct_size(hf, classic_can_quirk, 1);</div><div class='add'>+		else</div><div class='add'>+			dev-&gt;hf_size_tx = struct_size(hf, classic_can, 1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	can_rx_offload_enable(&amp;dev-&gt;offload);</div><div class='add'>+</div><div class='add'>+	if (!parent-&gt;active_channels) {</div><div class='add'>+		if (dev-&gt;feature &amp; GS_CAN_FEATURE_HW_TIMESTAMP)</div><div class='add'>+			gs_usb_timestamp_init(parent);</div><div class='add'>+</div><div class='ctx'> 		for (i = 0; i &lt; GS_MAX_RX_URBS; i++) {</div><div class='del'>-			struct urb *urb;</div><div class='ctx'> 			u8 *buf;</div><div class='ctx'> </div><div class='ctx'> 			/* alloc rx urb */</div><div class='ctx'> 			urb = usb_alloc_urb(0, GFP_KERNEL);</div><div class='ctx'> 			if (!urb) {</div><div class='del'>-				netdev_err(netdev,</div><div class='del'>-					   "No memory left for URB\n");</div><div class='del'>-				return -ENOMEM;</div><div class='add'>+				rc = -ENOMEM;</div><div class='add'>+				goto out_usb_kill_anchored_urbs;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			/* alloc rx buffer */</div><div class='del'>-			buf = usb_alloc_coherent(dev-&gt;udev,</div><div class='del'>-						 sizeof(struct gs_host_frame),</div><div class='del'>-						 GFP_KERNEL,</div><div class='del'>-						 &amp;urb-&gt;transfer_dma);</div><div class='add'>+			buf = kmalloc(dev-&gt;parent-&gt;hf_size_rx,</div><div class='add'>+				      GFP_KERNEL);</div><div class='ctx'> 			if (!buf) {</div><div class='del'>-				netdev_err(netdev,</div><div class='del'>-					   "No memory left for USB buffer\n");</div><div class='del'>-				usb_free_urb(urb);</div><div class='del'>-				return -ENOMEM;</div><div class='add'>+				rc = -ENOMEM;</div><div class='add'>+				goto out_usb_free_urb;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			/* fill, anchor, and submit rx urb */</div><div class='ctx'> 			usb_fill_bulk_urb(urb,</div><div class='ctx'> 					  dev-&gt;udev,</div><div class='del'>-					  usb_rcvbulkpipe(dev-&gt;udev,</div><div class='del'>-							  GSUSB_ENDPOINT_IN),</div><div class='add'>+					  dev-&gt;parent-&gt;pipe_in,</div><div class='ctx'> 					  buf,</div><div class='del'>-					  sizeof(struct gs_host_frame),</div><div class='del'>-					  gs_usb_recieve_bulk_callback,</div><div class='del'>-					  parent);</div><div class='del'>-			urb-&gt;transfer_flags |= URB_NO_TRANSFER_DMA_MAP;</div><div class='add'>+					  dev-&gt;parent-&gt;hf_size_rx,</div><div class='add'>+					  gs_usb_receive_bulk_callback, parent);</div><div class='add'>+			urb-&gt;transfer_flags |= URB_FREE_BUFFER;</div><div class='ctx'> </div><div class='ctx'> 			usb_anchor_urb(urb, &amp;parent-&gt;rx_submitted);</div><div class='ctx'> </div><div class='hunk'>@@ -617,11 +1012,10 @@ static int gs_can_open(struct net_device *netdev)</div><div class='ctx'> 					netif_device_detach(dev-&gt;netdev);</div><div class='ctx'> </div><div class='ctx'> 				netdev_err(netdev,</div><div class='del'>-					   "usb_submit failed (err=%d)\n",</div><div class='del'>-					   rc);</div><div class='add'>+					   "usb_submit_urb() failed, error %pe\n",</div><div class='add'>+					   ERR_PTR(rc));</div><div class='ctx'> </div><div class='del'>-				usb_unanchor_urb(urb);</div><div class='del'>-				break;</div><div class='add'>+				goto out_usb_unanchor_urb;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			/* Drop reference,</div><div class='hunk'>@@ -631,54 +1025,100 @@ static int gs_can_open(struct net_device *netdev)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dm = kmalloc(sizeof(*dm), GFP_KERNEL);</div><div class='del'>-	if (!dm)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='ctx'> 	/* flags */</div><div class='del'>-	ctrlmode = dev-&gt;can.ctrlmode;</div><div class='del'>-	dm-&gt;flags = 0;</div><div class='del'>-</div><div class='ctx'> 	if (ctrlmode &amp; CAN_CTRLMODE_LOOPBACK)</div><div class='del'>-		dm-&gt;flags |= GS_CAN_MODE_LOOP_BACK;</div><div class='del'>-	else if (ctrlmode &amp; CAN_CTRLMODE_LISTENONLY)</div><div class='del'>-		dm-&gt;flags |= GS_CAN_MODE_LISTEN_ONLY;</div><div class='add'>+		flags |= GS_CAN_MODE_LOOP_BACK;</div><div class='ctx'> </div><div class='del'>-	/* Controller is not allowed to retry TX</div><div class='del'>-	 * this mode is unavailable on atmels uc3c hardware</div><div class='del'>-	 */</div><div class='del'>-	if (ctrlmode &amp; CAN_CTRLMODE_ONE_SHOT)</div><div class='del'>-		dm-&gt;flags |= GS_CAN_MODE_ONE_SHOT;</div><div class='add'>+	if (ctrlmode &amp; CAN_CTRLMODE_LISTENONLY)</div><div class='add'>+		flags |= GS_CAN_MODE_LISTEN_ONLY;</div><div class='ctx'> </div><div class='ctx'> 	if (ctrlmode &amp; CAN_CTRLMODE_3_SAMPLES)</div><div class='del'>-		dm-&gt;flags |= GS_CAN_MODE_TRIPLE_SAMPLE;</div><div class='add'>+		flags |= GS_CAN_MODE_TRIPLE_SAMPLE;</div><div class='ctx'> </div><div class='del'>-	/* finally start device */</div><div class='del'>-	dm-&gt;mode = GS_CAN_MODE_START;</div><div class='del'>-	rc = usb_control_msg(interface_to_usbdev(dev-&gt;iface),</div><div class='del'>-			     usb_sndctrlpipe(interface_to_usbdev(dev-&gt;iface), 0),</div><div class='del'>-			     GS_USB_BREQ_MODE,</div><div class='del'>-			     USB_DIR_OUT|USB_TYPE_VENDOR|USB_RECIP_INTERFACE,</div><div class='del'>-			     dev-&gt;channel,</div><div class='del'>-			     0,</div><div class='del'>-			     dm,</div><div class='del'>-			     sizeof(*dm),</div><div class='del'>-			     1000);</div><div class='del'>-</div><div class='del'>-	if (rc &lt; 0) {</div><div class='del'>-		netdev_err(netdev, "Couldn't start device (err=%d)\n", rc);</div><div class='del'>-		kfree(dm);</div><div class='del'>-		return rc;</div><div class='del'>-	}</div><div class='add'>+	if (ctrlmode &amp; CAN_CTRLMODE_ONE_SHOT)</div><div class='add'>+		flags |= GS_CAN_MODE_ONE_SHOT;</div><div class='add'>+</div><div class='add'>+	if (ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING)</div><div class='add'>+		flags |= GS_CAN_MODE_BERR_REPORTING;</div><div class='add'>+</div><div class='add'>+	if (ctrlmode &amp; CAN_CTRLMODE_FD)</div><div class='add'>+		flags |= GS_CAN_MODE_FD;</div><div class='ctx'> </div><div class='del'>-	kfree(dm);</div><div class='add'>+	/* if hardware supports timestamps, enable it */</div><div class='add'>+	if (dev-&gt;feature &amp; GS_CAN_FEATURE_HW_TIMESTAMP)</div><div class='add'>+		flags |= GS_CAN_MODE_HW_TIMESTAMP;</div><div class='ctx'> </div><div class='add'>+	/* finally start device */</div><div class='ctx'> 	dev-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+	dm.flags = cpu_to_le32(flags);</div><div class='add'>+	rc = usb_control_msg_send(dev-&gt;udev, 0, GS_USB_BREQ_MODE,</div><div class='add'>+				  USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_INTERFACE,</div><div class='add'>+				  dev-&gt;channel, 0, &amp;dm, sizeof(dm), 1000,</div><div class='add'>+				  GFP_KERNEL);</div><div class='add'>+	if (rc) {</div><div class='add'>+		netdev_err(netdev, "Couldn't start device (err=%d)\n", rc);</div><div class='add'>+		dev-&gt;can.state = CAN_STATE_STOPPED;</div><div class='ctx'> </div><div class='add'>+		goto out_usb_kill_anchored_urbs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	parent-&gt;active_channels++;</div><div class='ctx'> 	if (!(dev-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LISTENONLY))</div><div class='ctx'> 		netif_start_queue(netdev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='add'>+</div><div class='add'>+out_usb_unanchor_urb:</div><div class='add'>+	usb_unanchor_urb(urb);</div><div class='add'>+out_usb_free_urb:</div><div class='add'>+	usb_free_urb(urb);</div><div class='add'>+out_usb_kill_anchored_urbs:</div><div class='add'>+	if (!parent-&gt;active_channels) {</div><div class='add'>+		usb_kill_anchored_urbs(&amp;dev-&gt;tx_submitted);</div><div class='add'>+</div><div class='add'>+		if (dev-&gt;feature &amp; GS_CAN_FEATURE_HW_TIMESTAMP)</div><div class='add'>+			gs_usb_timestamp_stop(parent);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	can_rx_offload_disable(&amp;dev-&gt;offload);</div><div class='add'>+	close_candev(netdev);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gs_usb_get_state(const struct net_device *netdev,</div><div class='add'>+			    struct can_berr_counter *bec,</div><div class='add'>+			    enum can_state *state)</div><div class='add'>+{</div><div class='add'>+	struct gs_can *dev = netdev_priv(netdev);</div><div class='add'>+	struct gs_device_state ds;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = usb_control_msg_recv(dev-&gt;udev, 0, GS_USB_BREQ_GET_STATE,</div><div class='add'>+				  USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_INTERFACE,</div><div class='add'>+				  dev-&gt;channel, 0,</div><div class='add'>+				  &amp;ds, sizeof(ds),</div><div class='add'>+				  USB_CTRL_GET_TIMEOUT,</div><div class='add'>+				  GFP_KERNEL);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	if (le32_to_cpu(ds.state) &gt;= CAN_STATE_MAX)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	*state = le32_to_cpu(ds.state);</div><div class='add'>+	bec-&gt;txerr = le32_to_cpu(ds.txerr);</div><div class='add'>+	bec-&gt;rxerr = le32_to_cpu(ds.rxerr);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gs_usb_can_get_berr_counter(const struct net_device *netdev,</div><div class='add'>+				       struct can_berr_counter *bec)</div><div class='add'>+{</div><div class='add'>+	enum can_state state;</div><div class='add'>+</div><div class='add'>+	return gs_usb_get_state(netdev, bec, &amp;state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int gs_can_close(struct net_device *netdev)</div><div class='hunk'>@@ -690,17 +1130,22 @@ static int gs_can_close(struct net_device *netdev)</div><div class='ctx'> 	netif_stop_queue(netdev);</div><div class='ctx'> </div><div class='ctx'> 	/* Stop polling */</div><div class='del'>-	if (atomic_dec_and_test(&amp;parent-&gt;active_channels))</div><div class='add'>+	parent-&gt;active_channels--;</div><div class='add'>+	if (!parent-&gt;active_channels) {</div><div class='ctx'> 		usb_kill_anchored_urbs(&amp;parent-&gt;rx_submitted);</div><div class='ctx'> </div><div class='add'>+		if (dev-&gt;feature &amp; GS_CAN_FEATURE_HW_TIMESTAMP)</div><div class='add'>+			gs_usb_timestamp_stop(parent);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Stop sending URBs */</div><div class='ctx'> 	usb_kill_anchored_urbs(&amp;dev-&gt;tx_submitted);</div><div class='ctx'> 	atomic_set(&amp;dev-&gt;active_tx_urbs, 0);</div><div class='ctx'> </div><div class='add'>+	dev-&gt;can.state = CAN_STATE_STOPPED;</div><div class='add'>+</div><div class='ctx'> 	/* reset the device */</div><div class='del'>-	rc = gs_cmd_reset(parent, dev);</div><div class='del'>-	if (rc &lt; 0)</div><div class='del'>-		netdev_warn(netdev, "Couldn't shutdown device (err=%d)", rc);</div><div class='add'>+	gs_cmd_reset(dev);</div><div class='ctx'> </div><div class='ctx'> 	/* reset tx contexts */</div><div class='ctx'> 	for (rc = 0; rc &lt; GS_MAX_TX_URBS; rc++) {</div><div class='hunk'>@@ -708,46 +1153,168 @@ static int gs_can_close(struct net_device *netdev)</div><div class='ctx'> 		dev-&gt;tx_context[rc].echo_id = GS_MAX_TX_URBS;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	can_rx_offload_disable(&amp;dev-&gt;offload);</div><div class='add'>+</div><div class='ctx'> 	/* close the netdev */</div><div class='ctx'> 	close_candev(netdev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int gs_can_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+			       struct kernel_hwtstamp_config *cfg)</div><div class='add'>+{</div><div class='add'>+	const struct gs_can *dev = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;feature &amp; GS_CAN_FEATURE_HW_TIMESTAMP)</div><div class='add'>+		return can_hwtstamp_get(netdev, cfg);</div><div class='add'>+</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gs_can_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+			       struct kernel_hwtstamp_config *cfg,</div><div class='add'>+			       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	const struct gs_can *dev = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;feature &amp; GS_CAN_FEATURE_HW_TIMESTAMP)</div><div class='add'>+		return can_hwtstamp_set(netdev, cfg, extack);</div><div class='add'>+</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct net_device_ops gs_usb_netdev_ops = {</div><div class='ctx'> 	.ndo_open = gs_can_open,</div><div class='ctx'> 	.ndo_stop = gs_can_close,</div><div class='ctx'> 	.ndo_start_xmit = gs_can_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='add'>+	.ndo_hwtstamp_get = gs_can_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set = gs_can_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static struct gs_can *gs_make_candev(unsigned int channel, struct usb_interface *intf)</div><div class='add'>+static int gs_usb_set_identify(struct net_device *netdev, bool do_identify)</div><div class='add'>+{</div><div class='add'>+	struct gs_can *dev = netdev_priv(netdev);</div><div class='add'>+	struct gs_identify_mode imode;</div><div class='add'>+</div><div class='add'>+	if (do_identify)</div><div class='add'>+		imode.mode = cpu_to_le32(GS_CAN_IDENTIFY_ON);</div><div class='add'>+	else</div><div class='add'>+		imode.mode = cpu_to_le32(GS_CAN_IDENTIFY_OFF);</div><div class='add'>+</div><div class='add'>+	return usb_control_msg_send(dev-&gt;udev, 0, GS_USB_BREQ_IDENTIFY,</div><div class='add'>+				    USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_INTERFACE,</div><div class='add'>+				    dev-&gt;channel, 0, &amp;imode, sizeof(imode), 100,</div><div class='add'>+				    GFP_KERNEL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* blink LED's for finding the this interface */</div><div class='add'>+static int gs_usb_set_phys_id(struct net_device *netdev,</div><div class='add'>+			      enum ethtool_phys_id_state state)</div><div class='add'>+{</div><div class='add'>+	const struct gs_can *dev = netdev_priv(netdev);</div><div class='add'>+	int rc = 0;</div><div class='add'>+</div><div class='add'>+	if (!(dev-&gt;feature &amp; GS_CAN_FEATURE_IDENTIFY))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	switch (state) {</div><div class='add'>+	case ETHTOOL_ID_ACTIVE:</div><div class='add'>+		rc = gs_usb_set_identify(netdev, GS_CAN_IDENTIFY_ON);</div><div class='add'>+		break;</div><div class='add'>+	case ETHTOOL_ID_INACTIVE:</div><div class='add'>+		rc = gs_usb_set_identify(netdev, GS_CAN_IDENTIFY_OFF);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gs_usb_get_ts_info(struct net_device *netdev,</div><div class='add'>+			      struct kernel_ethtool_ts_info *info)</div><div class='add'>+{</div><div class='add'>+	struct gs_can *dev = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	/* report if device supports HW timestamps */</div><div class='add'>+	if (dev-&gt;feature &amp; GS_CAN_FEATURE_HW_TIMESTAMP)</div><div class='add'>+		return can_ethtool_op_get_ts_info_hwts(netdev, info);</div><div class='add'>+</div><div class='add'>+	return ethtool_op_get_ts_info(netdev, info);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops gs_usb_ethtool_ops = {</div><div class='add'>+	.set_phys_id = gs_usb_set_phys_id,</div><div class='add'>+	.get_ts_info = gs_usb_get_ts_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int gs_usb_get_termination(struct net_device *netdev, u16 *term)</div><div class='add'>+{</div><div class='add'>+	struct gs_can *dev = netdev_priv(netdev);</div><div class='add'>+	struct gs_device_termination_state term_state;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = usb_control_msg_recv(dev-&gt;udev, 0, GS_USB_BREQ_GET_TERMINATION,</div><div class='add'>+				  USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_INTERFACE,</div><div class='add'>+				  dev-&gt;channel, 0,</div><div class='add'>+				  &amp;term_state, sizeof(term_state), 1000,</div><div class='add'>+				  GFP_KERNEL);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	if (term_state.state == cpu_to_le32(GS_CAN_TERMINATION_STATE_ON))</div><div class='add'>+		*term = GS_USB_TERMINATION_ENABLED;</div><div class='add'>+	else</div><div class='add'>+		*term = GS_USB_TERMINATION_DISABLED;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gs_usb_set_termination(struct net_device *netdev, u16 term)</div><div class='add'>+{</div><div class='add'>+	struct gs_can *dev = netdev_priv(netdev);</div><div class='add'>+	struct gs_device_termination_state term_state;</div><div class='add'>+</div><div class='add'>+	if (term == GS_USB_TERMINATION_ENABLED)</div><div class='add'>+		term_state.state = cpu_to_le32(GS_CAN_TERMINATION_STATE_ON);</div><div class='add'>+	else</div><div class='add'>+		term_state.state = cpu_to_le32(GS_CAN_TERMINATION_STATE_OFF);</div><div class='add'>+</div><div class='add'>+	return usb_control_msg_send(dev-&gt;udev, 0, GS_USB_BREQ_SET_TERMINATION,</div><div class='add'>+				    USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_INTERFACE,</div><div class='add'>+				    dev-&gt;channel, 0,</div><div class='add'>+				    &amp;term_state, sizeof(term_state), 1000,</div><div class='add'>+				    GFP_KERNEL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const u16 gs_usb_termination_const[] = {</div><div class='add'>+	GS_USB_TERMINATION_DISABLED,</div><div class='add'>+	GS_USB_TERMINATION_ENABLED</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct gs_can *gs_make_candev(unsigned int channel,</div><div class='add'>+				     struct usb_interface *intf,</div><div class='add'>+				     struct gs_device_config *dconf)</div><div class='ctx'> {</div><div class='ctx'> 	struct gs_can *dev;</div><div class='ctx'> 	struct net_device *netdev;</div><div class='ctx'> 	int rc;</div><div class='del'>-	struct gs_device_bt_const *bt_const;</div><div class='del'>-</div><div class='del'>-	bt_const = kmalloc(sizeof(*bt_const), GFP_KERNEL);</div><div class='del'>-	if (!bt_const)</div><div class='del'>-		return ERR_PTR(-ENOMEM);</div><div class='add'>+	struct gs_device_bt_const_extended bt_const_extended;</div><div class='add'>+	struct gs_device_bt_const bt_const;</div><div class='add'>+	u32 feature;</div><div class='ctx'> </div><div class='ctx'> 	/* fetch bit timing constants */</div><div class='del'>-	rc = usb_control_msg(interface_to_usbdev(intf),</div><div class='del'>-			     usb_rcvctrlpipe(interface_to_usbdev(intf), 0),</div><div class='del'>-			     GS_USB_BREQ_BT_CONST,</div><div class='del'>-			     USB_DIR_IN|USB_TYPE_VENDOR|USB_RECIP_INTERFACE,</div><div class='del'>-			     channel,</div><div class='del'>-			     0,</div><div class='del'>-			     bt_const,</div><div class='del'>-			     sizeof(*bt_const),</div><div class='del'>-			     1000);</div><div class='del'>-</div><div class='del'>-	if (rc &lt; 0) {</div><div class='add'>+	rc = usb_control_msg_recv(interface_to_usbdev(intf), 0,</div><div class='add'>+				  GS_USB_BREQ_BT_CONST,</div><div class='add'>+				  USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_INTERFACE,</div><div class='add'>+				  channel, 0, &amp;bt_const, sizeof(bt_const), 1000,</div><div class='add'>+				  GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	if (rc) {</div><div class='ctx'> 		dev_err(&amp;intf-&gt;dev,</div><div class='del'>-			"Couldn't get bit timing const for channel (err=%d)\n",</div><div class='del'>-			rc);</div><div class='del'>-		kfree(bt_const);</div><div class='add'>+			"Couldn't get bit timing const for channel %d (%pe)\n",</div><div class='add'>+			channel, ERR_PTR(rc));</div><div class='ctx'> 		return ERR_PTR(rc);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -755,29 +1322,30 @@ static struct gs_can *gs_make_candev(unsigned int channel, struct usb_interface</div><div class='ctx'> 	netdev = alloc_candev(sizeof(struct gs_can), GS_MAX_TX_URBS);</div><div class='ctx'> 	if (!netdev) {</div><div class='ctx'> 		dev_err(&amp;intf-&gt;dev, "Couldn't allocate candev\n");</div><div class='del'>-		kfree(bt_const);</div><div class='ctx'> 		return ERR_PTR(-ENOMEM);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dev = netdev_priv(netdev);</div><div class='ctx'> </div><div class='ctx'> 	netdev-&gt;netdev_ops = &amp;gs_usb_netdev_ops;</div><div class='add'>+	netdev-&gt;ethtool_ops = &amp;gs_usb_ethtool_ops;</div><div class='ctx'> </div><div class='ctx'> 	netdev-&gt;flags |= IFF_ECHO; /* we support full roundtrip echo */</div><div class='del'>-</div><div class='del'>-	/* dev settup */</div><div class='del'>-	strcpy(dev-&gt;bt_const.name, "gs_usb");</div><div class='del'>-	dev-&gt;bt_const.tseg1_min = bt_const-&gt;tseg1_min;</div><div class='del'>-	dev-&gt;bt_const.tseg1_max = bt_const-&gt;tseg1_max;</div><div class='del'>-	dev-&gt;bt_const.tseg2_min = bt_const-&gt;tseg2_min;</div><div class='del'>-	dev-&gt;bt_const.tseg2_max = bt_const-&gt;tseg2_max;</div><div class='del'>-	dev-&gt;bt_const.sjw_max = bt_const-&gt;sjw_max;</div><div class='del'>-	dev-&gt;bt_const.brp_min = bt_const-&gt;brp_min;</div><div class='del'>-	dev-&gt;bt_const.brp_max = bt_const-&gt;brp_max;</div><div class='del'>-	dev-&gt;bt_const.brp_inc = bt_const-&gt;brp_inc;</div><div class='add'>+	netdev-&gt;dev_id = channel;</div><div class='add'>+	netdev-&gt;dev_port = channel;</div><div class='add'>+</div><div class='add'>+	/* dev setup */</div><div class='add'>+	strcpy(dev-&gt;bt_const.name, KBUILD_MODNAME);</div><div class='add'>+	dev-&gt;bt_const.tseg1_min = le32_to_cpu(bt_const.tseg1_min);</div><div class='add'>+	dev-&gt;bt_const.tseg1_max = le32_to_cpu(bt_const.tseg1_max);</div><div class='add'>+	dev-&gt;bt_const.tseg2_min = le32_to_cpu(bt_const.tseg2_min);</div><div class='add'>+	dev-&gt;bt_const.tseg2_max = le32_to_cpu(bt_const.tseg2_max);</div><div class='add'>+	dev-&gt;bt_const.sjw_max = le32_to_cpu(bt_const.sjw_max);</div><div class='add'>+	dev-&gt;bt_const.brp_min = le32_to_cpu(bt_const.brp_min);</div><div class='add'>+	dev-&gt;bt_const.brp_max = le32_to_cpu(bt_const.brp_max);</div><div class='add'>+	dev-&gt;bt_const.brp_inc = le32_to_cpu(bt_const.brp_inc);</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;udev = interface_to_usbdev(intf);</div><div class='del'>-	dev-&gt;iface = intf;</div><div class='ctx'> 	dev-&gt;netdev = netdev;</div><div class='ctx'> 	dev-&gt;channel = channel;</div><div class='ctx'> </div><div class='hunk'>@@ -789,140 +1357,249 @@ static struct gs_can *gs_make_candev(unsigned int channel, struct usb_interface</div><div class='ctx'> 		dev-&gt;tx_context[rc].echo_id = GS_MAX_TX_URBS;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* can settup */</div><div class='add'>+	/* can setup */</div><div class='ctx'> 	dev-&gt;can.state = CAN_STATE_STOPPED;</div><div class='del'>-	dev-&gt;can.clock.freq = bt_const-&gt;fclk_can;</div><div class='add'>+	dev-&gt;can.clock.freq = le32_to_cpu(bt_const.fclk_can);</div><div class='ctx'> 	dev-&gt;can.bittiming_const = &amp;dev-&gt;bt_const;</div><div class='ctx'> 	dev-&gt;can.do_set_bittiming = gs_usb_set_bittiming;</div><div class='ctx'> </div><div class='del'>-	dev-&gt;can.ctrlmode_supported = 0;</div><div class='add'>+	dev-&gt;can.ctrlmode_supported = CAN_CTRLMODE_CC_LEN8_DLC;</div><div class='ctx'> </div><div class='del'>-	if (bt_const-&gt;feature &amp; GS_CAN_FEATURE_LISTEN_ONLY)</div><div class='add'>+	feature = le32_to_cpu(bt_const.feature);</div><div class='add'>+	dev-&gt;feature = FIELD_GET(GS_CAN_FEATURE_MASK, feature);</div><div class='add'>+	if (feature &amp; GS_CAN_FEATURE_LISTEN_ONLY)</div><div class='ctx'> 		dev-&gt;can.ctrlmode_supported |= CAN_CTRLMODE_LISTENONLY;</div><div class='ctx'> </div><div class='del'>-	if (bt_const-&gt;feature &amp; GS_CAN_FEATURE_LOOP_BACK)</div><div class='add'>+	if (feature &amp; GS_CAN_FEATURE_LOOP_BACK)</div><div class='ctx'> 		dev-&gt;can.ctrlmode_supported |= CAN_CTRLMODE_LOOPBACK;</div><div class='ctx'> </div><div class='del'>-	if (bt_const-&gt;feature &amp; GS_CAN_FEATURE_TRIPLE_SAMPLE)</div><div class='add'>+	if (feature &amp; GS_CAN_FEATURE_TRIPLE_SAMPLE)</div><div class='ctx'> 		dev-&gt;can.ctrlmode_supported |= CAN_CTRLMODE_3_SAMPLES;</div><div class='ctx'> </div><div class='del'>-	if (bt_const-&gt;feature &amp; GS_CAN_FEATURE_ONE_SHOT)</div><div class='add'>+	if (feature &amp; GS_CAN_FEATURE_ONE_SHOT)</div><div class='ctx'> 		dev-&gt;can.ctrlmode_supported |= CAN_CTRLMODE_ONE_SHOT;</div><div class='ctx'> </div><div class='del'>-	kfree(bt_const);</div><div class='add'>+	if (feature &amp; GS_CAN_FEATURE_FD) {</div><div class='add'>+		dev-&gt;can.ctrlmode_supported |= CAN_CTRLMODE_FD;</div><div class='add'>+		/* The data bit timing will be overwritten, if</div><div class='add'>+		 * GS_CAN_FEATURE_BT_CONST_EXT is set.</div><div class='add'>+		 */</div><div class='add'>+		dev-&gt;can.fd.data_bittiming_const = &amp;dev-&gt;bt_const;</div><div class='add'>+		dev-&gt;can.fd.do_set_data_bittiming = gs_usb_set_data_bittiming;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (feature &amp; GS_CAN_FEATURE_TERMINATION) {</div><div class='add'>+		rc = gs_usb_get_termination(netdev, &amp;dev-&gt;can.termination);</div><div class='add'>+		if (rc) {</div><div class='add'>+			dev-&gt;feature &amp;= ~GS_CAN_FEATURE_TERMINATION;</div><div class='add'>+</div><div class='add'>+			dev_info(&amp;intf-&gt;dev,</div><div class='add'>+				 "Disabling termination support for channel %d (%pe)\n",</div><div class='add'>+				 channel, ERR_PTR(rc));</div><div class='add'>+		} else {</div><div class='add'>+			dev-&gt;can.termination_const = gs_usb_termination_const;</div><div class='add'>+			dev-&gt;can.termination_const_cnt = ARRAY_SIZE(gs_usb_termination_const);</div><div class='add'>+			dev-&gt;can.do_set_termination = gs_usb_set_termination;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (feature &amp; GS_CAN_FEATURE_BERR_REPORTING)</div><div class='add'>+		dev-&gt;can.ctrlmode_supported |= CAN_CTRLMODE_BERR_REPORTING;</div><div class='add'>+</div><div class='add'>+	if (feature &amp; GS_CAN_FEATURE_GET_STATE)</div><div class='add'>+		dev-&gt;can.do_get_berr_counter = gs_usb_can_get_berr_counter;</div><div class='add'>+</div><div class='add'>+	/* The CANtact Pro from LinkLayer Labs is based on the</div><div class='add'>+	 * LPC54616 µC, which is affected by the NXP LPC USB transfer</div><div class='add'>+	 * erratum. However, the current firmware (version 2) doesn't</div><div class='add'>+	 * set the GS_CAN_FEATURE_REQ_USB_QUIRK_LPC546XX bit. Set the</div><div class='add'>+	 * feature GS_CAN_FEATURE_REQ_USB_QUIRK_LPC546XX to workaround</div><div class='add'>+	 * this issue.</div><div class='add'>+	 *</div><div class='add'>+	 * For the GS_USB_BREQ_DATA_BITTIMING USB control message the</div><div class='add'>+	 * CANtact Pro firmware uses a request value, which is already</div><div class='add'>+	 * used by the candleLight firmware for a different purpose</div><div class='add'>+	 * (GS_USB_BREQ_GET_USER_ID). Set the feature</div><div class='add'>+	 * GS_CAN_FEATURE_QUIRK_BREQ_CANTACT_PRO to workaround this</div><div class='add'>+	 * issue.</div><div class='add'>+	 */</div><div class='add'>+	if (dev-&gt;udev-&gt;descriptor.idVendor == cpu_to_le16(USB_GS_USB_1_VENDOR_ID) &amp;&amp;</div><div class='add'>+	    dev-&gt;udev-&gt;descriptor.idProduct == cpu_to_le16(USB_GS_USB_1_PRODUCT_ID) &amp;&amp;</div><div class='add'>+	    dev-&gt;udev-&gt;manufacturer &amp;&amp; dev-&gt;udev-&gt;product &amp;&amp;</div><div class='add'>+	    !strcmp(dev-&gt;udev-&gt;manufacturer, "LinkLayer Labs") &amp;&amp;</div><div class='add'>+	    !strcmp(dev-&gt;udev-&gt;product, "CANtact Pro") &amp;&amp;</div><div class='add'>+	    (le32_to_cpu(dconf-&gt;sw_version) &lt;= 2))</div><div class='add'>+		dev-&gt;feature |= GS_CAN_FEATURE_REQ_USB_QUIRK_LPC546XX |</div><div class='add'>+			GS_CAN_FEATURE_QUIRK_BREQ_CANTACT_PRO;</div><div class='add'>+</div><div class='add'>+	/* GS_CAN_FEATURE_IDENTIFY is only supported for sw_version &gt; 1 */</div><div class='add'>+	if (!(le32_to_cpu(dconf-&gt;sw_version) &gt; 1 &amp;&amp;</div><div class='add'>+	      feature &amp; GS_CAN_FEATURE_IDENTIFY))</div><div class='add'>+		dev-&gt;feature &amp;= ~GS_CAN_FEATURE_IDENTIFY;</div><div class='add'>+</div><div class='add'>+	/* fetch extended bit timing constants if device has feature</div><div class='add'>+	 * GS_CAN_FEATURE_FD and GS_CAN_FEATURE_BT_CONST_EXT</div><div class='add'>+	 */</div><div class='add'>+	if (feature &amp; GS_CAN_FEATURE_FD &amp;&amp;</div><div class='add'>+	    feature &amp; GS_CAN_FEATURE_BT_CONST_EXT) {</div><div class='add'>+		rc = usb_control_msg_recv(interface_to_usbdev(intf), 0,</div><div class='add'>+					  GS_USB_BREQ_BT_CONST_EXT,</div><div class='add'>+					  USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_INTERFACE,</div><div class='add'>+					  channel, 0, &amp;bt_const_extended,</div><div class='add'>+					  sizeof(bt_const_extended),</div><div class='add'>+					  1000, GFP_KERNEL);</div><div class='add'>+		if (rc) {</div><div class='add'>+			dev_err(&amp;intf-&gt;dev,</div><div class='add'>+				"Couldn't get extended bit timing const for channel %d (%pe)\n",</div><div class='add'>+				channel, ERR_PTR(rc));</div><div class='add'>+			goto out_free_candev;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		strcpy(dev-&gt;data_bt_const.name, KBUILD_MODNAME);</div><div class='add'>+		dev-&gt;data_bt_const.tseg1_min = le32_to_cpu(bt_const_extended.dtseg1_min);</div><div class='add'>+		dev-&gt;data_bt_const.tseg1_max = le32_to_cpu(bt_const_extended.dtseg1_max);</div><div class='add'>+		dev-&gt;data_bt_const.tseg2_min = le32_to_cpu(bt_const_extended.dtseg2_min);</div><div class='add'>+		dev-&gt;data_bt_const.tseg2_max = le32_to_cpu(bt_const_extended.dtseg2_max);</div><div class='add'>+		dev-&gt;data_bt_const.sjw_max = le32_to_cpu(bt_const_extended.dsjw_max);</div><div class='add'>+		dev-&gt;data_bt_const.brp_min = le32_to_cpu(bt_const_extended.dbrp_min);</div><div class='add'>+		dev-&gt;data_bt_const.brp_max = le32_to_cpu(bt_const_extended.dbrp_max);</div><div class='add'>+		dev-&gt;data_bt_const.brp_inc = le32_to_cpu(bt_const_extended.dbrp_inc);</div><div class='add'>+</div><div class='add'>+		dev-&gt;can.fd.data_bittiming_const = &amp;dev-&gt;data_bt_const;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='add'>+	can_rx_offload_add_manual(netdev, &amp;dev-&gt;offload, GS_NAPI_WEIGHT);</div><div class='ctx'> 	SET_NETDEV_DEV(netdev, &amp;intf-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	rc = register_candev(dev-&gt;netdev);</div><div class='ctx'> 	if (rc) {</div><div class='del'>-		free_candev(dev-&gt;netdev);</div><div class='del'>-		dev_err(&amp;intf-&gt;dev, "Couldn't register candev (err=%d)\n", rc);</div><div class='del'>-		return ERR_PTR(rc);</div><div class='add'>+		dev_err(&amp;intf-&gt;dev,</div><div class='add'>+			"Couldn't register candev for channel %d (%pe)\n",</div><div class='add'>+			channel, ERR_PTR(rc));</div><div class='add'>+		goto out_can_rx_offload_del;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return dev;</div><div class='add'>+</div><div class='add'>+out_can_rx_offload_del:</div><div class='add'>+	can_rx_offload_del(&amp;dev-&gt;offload);</div><div class='add'>+out_free_candev:</div><div class='add'>+	free_candev(dev-&gt;netdev);</div><div class='add'>+	return ERR_PTR(rc);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void gs_destroy_candev(struct gs_can *dev)</div><div class='ctx'> {</div><div class='ctx'> 	unregister_candev(dev-&gt;netdev);</div><div class='add'>+	can_rx_offload_del(&amp;dev-&gt;offload);</div><div class='ctx'> 	free_candev(dev-&gt;netdev);</div><div class='del'>-	usb_kill_anchored_urbs(&amp;dev-&gt;tx_submitted);</div><div class='del'>-	kfree(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int gs_usb_probe(struct usb_interface *intf, const struct usb_device_id *id)</div><div class='add'>+static int gs_usb_probe(struct usb_interface *intf,</div><div class='add'>+			const struct usb_device_id *id)</div><div class='ctx'> {</div><div class='del'>-	struct gs_usb *dev;</div><div class='del'>-	int rc = -ENOMEM;</div><div class='add'>+	struct usb_device *udev = interface_to_usbdev(intf);</div><div class='add'>+	struct usb_endpoint_descriptor *ep_in, *ep_out;</div><div class='add'>+	struct gs_host_frame *hf;</div><div class='add'>+	struct gs_usb *parent;</div><div class='add'>+	struct gs_host_config hconf = {</div><div class='add'>+		.byte_order = cpu_to_le32(0x0000beef),</div><div class='add'>+	};</div><div class='add'>+	struct gs_device_config dconf;</div><div class='ctx'> 	unsigned int icount, i;</div><div class='del'>-	struct gs_host_config *hconf;</div><div class='del'>-	struct gs_device_config *dconf;</div><div class='del'>-</div><div class='del'>-	hconf = kmalloc(sizeof(*hconf), GFP_KERNEL);</div><div class='del'>-	if (!hconf)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	int rc;</div><div class='ctx'> </div><div class='del'>-	hconf-&gt;byte_order = 0x0000beef;</div><div class='add'>+	rc = usb_find_common_endpoints(intf-&gt;cur_altsetting,</div><div class='add'>+				       &amp;ep_in, &amp;ep_out, NULL, NULL);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(&amp;intf-&gt;dev, "Required endpoints not found\n");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* send host config */</div><div class='del'>-	rc = usb_control_msg(interface_to_usbdev(intf),</div><div class='del'>-			     usb_sndctrlpipe(interface_to_usbdev(intf), 0),</div><div class='del'>-			     GS_USB_BREQ_HOST_FORMAT,</div><div class='del'>-			     USB_DIR_OUT|USB_TYPE_VENDOR|USB_RECIP_INTERFACE,</div><div class='del'>-			     1,</div><div class='del'>-			     intf-&gt;altsetting[0].desc.bInterfaceNumber,</div><div class='del'>-			     hconf,</div><div class='del'>-			     sizeof(*hconf),</div><div class='del'>-			     1000);</div><div class='del'>-</div><div class='del'>-	kfree(hconf);</div><div class='del'>-</div><div class='del'>-	if (rc &lt; 0) {</div><div class='del'>-		dev_err(&amp;intf-&gt;dev, "Couldn't send data format (err=%d)\n",</div><div class='del'>-			rc);</div><div class='add'>+	rc = usb_control_msg_send(udev, 0,</div><div class='add'>+				  GS_USB_BREQ_HOST_FORMAT,</div><div class='add'>+				  USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_INTERFACE,</div><div class='add'>+				  1, intf-&gt;cur_altsetting-&gt;desc.bInterfaceNumber,</div><div class='add'>+				  &amp;hconf, sizeof(hconf), 1000,</div><div class='add'>+				  GFP_KERNEL);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(&amp;intf-&gt;dev, "Couldn't send data format (err=%d)\n", rc);</div><div class='ctx'> 		return rc;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dconf = kmalloc(sizeof(*dconf), GFP_KERNEL);</div><div class='del'>-	if (!dconf)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='ctx'> 	/* read device config */</div><div class='del'>-	rc = usb_control_msg(interface_to_usbdev(intf),</div><div class='del'>-			     usb_rcvctrlpipe(interface_to_usbdev(intf), 0),</div><div class='del'>-			     GS_USB_BREQ_DEVICE_CONFIG,</div><div class='del'>-			     USB_DIR_IN|USB_TYPE_VENDOR|USB_RECIP_INTERFACE,</div><div class='del'>-			     1,</div><div class='del'>-			     intf-&gt;altsetting[0].desc.bInterfaceNumber,</div><div class='del'>-			     dconf,</div><div class='del'>-			     sizeof(*dconf),</div><div class='del'>-			     1000);</div><div class='del'>-	if (rc &lt; 0) {</div><div class='add'>+	rc = usb_control_msg_recv(udev, 0,</div><div class='add'>+				  GS_USB_BREQ_DEVICE_CONFIG,</div><div class='add'>+				  USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_INTERFACE,</div><div class='add'>+				  1, intf-&gt;cur_altsetting-&gt;desc.bInterfaceNumber,</div><div class='add'>+				  &amp;dconf, sizeof(dconf), 1000,</div><div class='add'>+				  GFP_KERNEL);</div><div class='add'>+	if (rc) {</div><div class='ctx'> 		dev_err(&amp;intf-&gt;dev, "Couldn't get device config: (err=%d)\n",</div><div class='ctx'> 			rc);</div><div class='del'>-</div><div class='del'>-		kfree(dconf);</div><div class='del'>-</div><div class='ctx'> 		return rc;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	icount = dconf-&gt;icount+1;</div><div class='add'>+	icount = dconf.icount + 1;</div><div class='add'>+	dev_info(&amp;intf-&gt;dev, "Configuring for %u interfaces\n", icount);</div><div class='ctx'> </div><div class='del'>-	kfree(dconf);</div><div class='del'>-</div><div class='del'>-	dev_info(&amp;intf-&gt;dev, "Configuring for %d interfaces\n", icount);</div><div class='del'>-</div><div class='del'>-	if (icount &gt; GS_MAX_INTF) {</div><div class='add'>+	if (icount &gt; type_max(parent-&gt;channel_cnt)) {</div><div class='ctx'> 		dev_err(&amp;intf-&gt;dev,</div><div class='del'>-			"Driver cannot handle more that %d CAN interfaces\n",</div><div class='del'>-			GS_MAX_INTF);</div><div class='add'>+			"Driver cannot handle more that %u CAN interfaces\n",</div><div class='add'>+			type_max(parent-&gt;channel_cnt));</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dev = kzalloc(sizeof(*dev), GFP_KERNEL);</div><div class='del'>-	if (!dev)</div><div class='add'>+	parent = kzalloc(struct_size(parent, canch, icount), GFP_KERNEL);</div><div class='add'>+	if (!parent)</div><div class='ctx'> 		return -ENOMEM;</div><div class='del'>-	init_usb_anchor(&amp;dev-&gt;rx_submitted);</div><div class='ctx'> </div><div class='del'>-	atomic_set(&amp;dev-&gt;active_channels, 0);</div><div class='add'>+	parent-&gt;channel_cnt = icount;</div><div class='ctx'> </div><div class='del'>-	usb_set_intfdata(intf, dev);</div><div class='del'>-	dev-&gt;udev = interface_to_usbdev(intf);</div><div class='add'>+	init_usb_anchor(&amp;parent-&gt;rx_submitted);</div><div class='add'>+</div><div class='add'>+	usb_set_intfdata(intf, parent);</div><div class='add'>+	parent-&gt;udev = udev;</div><div class='add'>+</div><div class='add'>+	/* store the detected endpoints */</div><div class='add'>+	parent-&gt;pipe_in = usb_rcvbulkpipe(parent-&gt;udev, ep_in-&gt;bEndpointAddress);</div><div class='add'>+	parent-&gt;pipe_out = usb_sndbulkpipe(parent-&gt;udev, ep_out-&gt;bEndpointAddress);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; icount; i++) {</div><div class='del'>-		dev-&gt;canch[i] = gs_make_candev(i, intf);</div><div class='del'>-		if (IS_ERR_OR_NULL(dev-&gt;canch[i])) {</div><div class='add'>+		unsigned int hf_size_rx = 0;</div><div class='add'>+</div><div class='add'>+		parent-&gt;canch[i] = gs_make_candev(i, intf, &amp;dconf);</div><div class='add'>+		if (IS_ERR_OR_NULL(parent-&gt;canch[i])) {</div><div class='add'>+			/* save error code to return later */</div><div class='add'>+			rc = PTR_ERR(parent-&gt;canch[i]);</div><div class='add'>+</div><div class='ctx'> 			/* on failure destroy previously created candevs */</div><div class='ctx'> 			icount = i;</div><div class='del'>-			for (i = 0; i &lt; icount; i++) {</div><div class='del'>-				gs_destroy_candev(dev-&gt;canch[i]);</div><div class='del'>-				dev-&gt;canch[i] = NULL;</div><div class='del'>-			}</div><div class='del'>-			kfree(dev);</div><div class='add'>+			for (i = 0; i &lt; icount; i++)</div><div class='add'>+				gs_destroy_candev(parent-&gt;canch[i]);</div><div class='add'>+</div><div class='add'>+			usb_kill_anchored_urbs(&amp;parent-&gt;rx_submitted);</div><div class='add'>+			kfree(parent);</div><div class='ctx'> 			return rc;</div><div class='ctx'> 		}</div><div class='del'>-		dev-&gt;canch[i]-&gt;parent = dev;</div><div class='add'>+		parent-&gt;canch[i]-&gt;parent = parent;</div><div class='add'>+</div><div class='add'>+		/* set RX packet size based on FD and if hardware</div><div class='add'>+		 * timestamps are supported.</div><div class='add'>+		 */</div><div class='add'>+		if (parent-&gt;canch[i]-&gt;can.ctrlmode_supported &amp; CAN_CTRLMODE_FD) {</div><div class='add'>+			if (parent-&gt;canch[i]-&gt;feature &amp; GS_CAN_FEATURE_HW_TIMESTAMP)</div><div class='add'>+				hf_size_rx = struct_size(hf, canfd_ts, 1);</div><div class='add'>+			else</div><div class='add'>+				hf_size_rx = struct_size(hf, canfd, 1);</div><div class='add'>+		} else {</div><div class='add'>+			if (parent-&gt;canch[i]-&gt;feature &amp; GS_CAN_FEATURE_HW_TIMESTAMP)</div><div class='add'>+				hf_size_rx = struct_size(hf, classic_can_ts, 1);</div><div class='add'>+			else</div><div class='add'>+				hf_size_rx = struct_size(hf, classic_can, 1);</div><div class='add'>+		}</div><div class='add'>+		parent-&gt;hf_size_rx = max(parent-&gt;hf_size_rx, hf_size_rx);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -930,39 +1607,46 @@ static int gs_usb_probe(struct usb_interface *intf, const struct usb_device_id *</div><div class='ctx'> </div><div class='ctx'> static void gs_usb_disconnect(struct usb_interface *intf)</div><div class='ctx'> {</div><div class='del'>-	unsigned i;</div><div class='del'>-	struct gs_usb *dev = usb_get_intfdata(intf);</div><div class='add'>+	struct gs_usb *parent = usb_get_intfdata(intf);</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='ctx'> 	usb_set_intfdata(intf, NULL);</div><div class='ctx'> </div><div class='del'>-	if (!dev) {</div><div class='add'>+	if (!parent) {</div><div class='ctx'> 		dev_err(&amp;intf-&gt;dev, "Disconnect (nodata)\n");</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; GS_MAX_INTF; i++) {</div><div class='del'>-		struct gs_can *can = dev-&gt;canch[i];</div><div class='del'>-</div><div class='del'>-		if (!can)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		gs_destroy_candev(can);</div><div class='del'>-	}</div><div class='add'>+	for (i = 0; i &lt; parent-&gt;channel_cnt; i++)</div><div class='add'>+		if (parent-&gt;canch[i])</div><div class='add'>+			gs_destroy_candev(parent-&gt;canch[i]);</div><div class='ctx'> </div><div class='del'>-	usb_kill_anchored_urbs(&amp;dev-&gt;rx_submitted);</div><div class='add'>+	kfree(parent);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct usb_device_id gs_usb_table[] = {</div><div class='del'>-	{USB_DEVICE(USB_GSUSB_1_VENDOR_ID, USB_GSUSB_1_PRODUCT_ID)},</div><div class='add'>+	{ USB_DEVICE_INTERFACE_NUMBER(USB_GS_USB_1_VENDOR_ID,</div><div class='add'>+				      USB_GS_USB_1_PRODUCT_ID, 0) },</div><div class='add'>+	{ USB_DEVICE_INTERFACE_NUMBER(USB_CANDLELIGHT_VENDOR_ID,</div><div class='add'>+				      USB_CANDLELIGHT_PRODUCT_ID, 0) },</div><div class='add'>+	{ USB_DEVICE_INTERFACE_NUMBER(USB_CES_CANEXT_FD_VENDOR_ID,</div><div class='add'>+				      USB_CES_CANEXT_FD_PRODUCT_ID, 0) },</div><div class='add'>+	{ USB_DEVICE_INTERFACE_NUMBER(USB_ABE_CANDEBUGGER_FD_VENDOR_ID,</div><div class='add'>+				      USB_ABE_CANDEBUGGER_FD_PRODUCT_ID, 0) },</div><div class='add'>+	{ USB_DEVICE_INTERFACE_NUMBER(USB_XYLANTA_SAINT3_VENDOR_ID,</div><div class='add'>+				      USB_XYLANTA_SAINT3_PRODUCT_ID, 0) },</div><div class='add'>+	{ USB_DEVICE_INTERFACE_NUMBER(USB_CANNECTIVITY_VENDOR_ID,</div><div class='add'>+				      USB_CANNECTIVITY_PRODUCT_ID, 0) },</div><div class='ctx'> 	{} /* Terminating entry */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> MODULE_DEVICE_TABLE(usb, gs_usb_table);</div><div class='ctx'> </div><div class='ctx'> static struct usb_driver gs_usb_driver = {</div><div class='del'>-	.name       = "gs_usb",</div><div class='del'>-	.probe      = gs_usb_probe,</div><div class='add'>+	.name = KBUILD_MODNAME,</div><div class='add'>+	.probe = gs_usb_probe,</div><div class='ctx'> 	.disconnect = gs_usb_disconnect,</div><div class='del'>-	.id_table   = gs_usb_table,</div><div class='add'>+	.id_table = gs_usb_table,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_usb_driver(gs_usb_driver);</div><div class='hunk'>@@ -970,5 +1654,6 @@ module_usb_driver(gs_usb_driver);</div><div class='ctx'> MODULE_AUTHOR("Maximilian Schneider &lt;mws@schneidersoft.net&gt;");</div><div class='ctx'> MODULE_DESCRIPTION(</div><div class='ctx'> "Socket CAN device driver for Geschwister Schneider Technologie-, "</div><div class='del'>-"Entwicklungs- und Vertriebs UG. USB2.0 to CAN interfaces.");</div><div class='add'>+"Entwicklungs- und Vertriebs UG. USB2.0 to CAN interfaces\n"</div><div class='add'>+"and bytewerk.org candleLight USB CAN interfaces.");</div><div class='ctx'> MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/net/can/usb/kvaser_usb.c b/drivers/net/can/usb/kvaser_usb.c<br/>deleted file mode 100644<br/>index 8b17a9065b0b..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/kvaser_usb.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/kvaser_usb.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,2073 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * This program is free software; you can redistribute it and/or</div><div class='del'>- * modify it under the terms of the GNU General Public License as</div><div class='del'>- * published by the Free Software Foundation version 2.</div><div class='del'>- *</div><div class='del'>- * Parts of this driver are based on the following:</div><div class='del'>- *  - Kvaser linux leaf driver (version 4.78)</div><div class='del'>- *  - CAN driver for esd CAN-USB/2</div><div class='del'>- *  - Kvaser linux usbcanII driver (version 5.3)</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2002-2006 KVASER AB, Sweden. All rights reserved.</div><div class='del'>- * Copyright (C) 2010 Matthias Fuchs &lt;matthias.fuchs@esd.eu&gt;, esd gmbh</div><div class='del'>- * Copyright (C) 2012 Olivier Sobrie &lt;olivier@sobrie.be&gt;</div><div class='del'>- * Copyright (C) 2015 Valeo S.A.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/spinlock.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/completion.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/usb.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;linux/can.h&gt;</div><div class='del'>-#include &lt;linux/can/dev.h&gt;</div><div class='del'>-#include &lt;linux/can/error.h&gt;</div><div class='del'>-</div><div class='del'>-#define MAX_RX_URBS			4</div><div class='del'>-#define START_TIMEOUT			1000 /* msecs */</div><div class='del'>-#define STOP_TIMEOUT			1000 /* msecs */</div><div class='del'>-#define USB_SEND_TIMEOUT		1000 /* msecs */</div><div class='del'>-#define USB_RECV_TIMEOUT		1000 /* msecs */</div><div class='del'>-#define RX_BUFFER_SIZE			3072</div><div class='del'>-#define CAN_USB_CLOCK			8000000</div><div class='del'>-#define MAX_NET_DEVICES			3</div><div class='del'>-#define MAX_USBCAN_NET_DEVICES		2</div><div class='del'>-</div><div class='del'>-/* Kvaser Leaf USB devices */</div><div class='del'>-#define KVASER_VENDOR_ID		0x0bfd</div><div class='del'>-#define USB_LEAF_DEVEL_PRODUCT_ID	10</div><div class='del'>-#define USB_LEAF_LITE_PRODUCT_ID	11</div><div class='del'>-#define USB_LEAF_PRO_PRODUCT_ID		12</div><div class='del'>-#define USB_LEAF_SPRO_PRODUCT_ID	14</div><div class='del'>-#define USB_LEAF_PRO_LS_PRODUCT_ID	15</div><div class='del'>-#define USB_LEAF_PRO_SWC_PRODUCT_ID	16</div><div class='del'>-#define USB_LEAF_PRO_LIN_PRODUCT_ID	17</div><div class='del'>-#define USB_LEAF_SPRO_LS_PRODUCT_ID	18</div><div class='del'>-#define USB_LEAF_SPRO_SWC_PRODUCT_ID	19</div><div class='del'>-#define USB_MEMO2_DEVEL_PRODUCT_ID	22</div><div class='del'>-#define USB_MEMO2_HSHS_PRODUCT_ID	23</div><div class='del'>-#define USB_UPRO_HSHS_PRODUCT_ID	24</div><div class='del'>-#define USB_LEAF_LITE_GI_PRODUCT_ID	25</div><div class='del'>-#define USB_LEAF_PRO_OBDII_PRODUCT_ID	26</div><div class='del'>-#define USB_MEMO2_HSLS_PRODUCT_ID	27</div><div class='del'>-#define USB_LEAF_LITE_CH_PRODUCT_ID	28</div><div class='del'>-#define USB_BLACKBIRD_SPRO_PRODUCT_ID	29</div><div class='del'>-#define USB_OEM_MERCURY_PRODUCT_ID	34</div><div class='del'>-#define USB_OEM_LEAF_PRODUCT_ID		35</div><div class='del'>-#define USB_CAN_R_PRODUCT_ID		39</div><div class='del'>-#define USB_LEAF_LITE_V2_PRODUCT_ID	288</div><div class='del'>-#define USB_MINI_PCIE_HS_PRODUCT_ID	289</div><div class='del'>-</div><div class='del'>-static inline bool kvaser_is_leaf(const struct usb_device_id *id)</div><div class='del'>-{</div><div class='del'>-	return id-&gt;idProduct &gt;= USB_LEAF_DEVEL_PRODUCT_ID &amp;&amp;</div><div class='del'>-	       id-&gt;idProduct &lt;= USB_MINI_PCIE_HS_PRODUCT_ID;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Kvaser USBCan-II devices */</div><div class='del'>-#define USB_USBCAN_REVB_PRODUCT_ID	2</div><div class='del'>-#define USB_VCI2_PRODUCT_ID		3</div><div class='del'>-#define USB_USBCAN2_PRODUCT_ID		4</div><div class='del'>-#define USB_MEMORATOR_PRODUCT_ID	5</div><div class='del'>-</div><div class='del'>-static inline bool kvaser_is_usbcan(const struct usb_device_id *id)</div><div class='del'>-{</div><div class='del'>-	return id-&gt;idProduct &gt;= USB_USBCAN_REVB_PRODUCT_ID &amp;&amp;</div><div class='del'>-	       id-&gt;idProduct &lt;= USB_MEMORATOR_PRODUCT_ID;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* USB devices features */</div><div class='del'>-#define KVASER_HAS_SILENT_MODE		BIT(0)</div><div class='del'>-#define KVASER_HAS_TXRX_ERRORS		BIT(1)</div><div class='del'>-</div><div class='del'>-/* Message header size */</div><div class='del'>-#define MSG_HEADER_LEN			2</div><div class='del'>-</div><div class='del'>-/* Can message flags */</div><div class='del'>-#define MSG_FLAG_ERROR_FRAME		BIT(0)</div><div class='del'>-#define MSG_FLAG_OVERRUN		BIT(1)</div><div class='del'>-#define MSG_FLAG_NERR			BIT(2)</div><div class='del'>-#define MSG_FLAG_WAKEUP			BIT(3)</div><div class='del'>-#define MSG_FLAG_REMOTE_FRAME		BIT(4)</div><div class='del'>-#define MSG_FLAG_RESERVED		BIT(5)</div><div class='del'>-#define MSG_FLAG_TX_ACK			BIT(6)</div><div class='del'>-#define MSG_FLAG_TX_REQUEST		BIT(7)</div><div class='del'>-</div><div class='del'>-/* Can states (M16C CxSTRH register) */</div><div class='del'>-#define M16C_STATE_BUS_RESET		BIT(0)</div><div class='del'>-#define M16C_STATE_BUS_ERROR		BIT(4)</div><div class='del'>-#define M16C_STATE_BUS_PASSIVE		BIT(5)</div><div class='del'>-#define M16C_STATE_BUS_OFF		BIT(6)</div><div class='del'>-</div><div class='del'>-/* Can msg ids */</div><div class='del'>-#define CMD_RX_STD_MESSAGE		12</div><div class='del'>-#define CMD_TX_STD_MESSAGE		13</div><div class='del'>-#define CMD_RX_EXT_MESSAGE		14</div><div class='del'>-#define CMD_TX_EXT_MESSAGE		15</div><div class='del'>-#define CMD_SET_BUS_PARAMS		16</div><div class='del'>-#define CMD_GET_BUS_PARAMS		17</div><div class='del'>-#define CMD_GET_BUS_PARAMS_REPLY	18</div><div class='del'>-#define CMD_GET_CHIP_STATE		19</div><div class='del'>-#define CMD_CHIP_STATE_EVENT		20</div><div class='del'>-#define CMD_SET_CTRL_MODE		21</div><div class='del'>-#define CMD_GET_CTRL_MODE		22</div><div class='del'>-#define CMD_GET_CTRL_MODE_REPLY		23</div><div class='del'>-#define CMD_RESET_CHIP			24</div><div class='del'>-#define CMD_RESET_CARD			25</div><div class='del'>-#define CMD_START_CHIP			26</div><div class='del'>-#define CMD_START_CHIP_REPLY		27</div><div class='del'>-#define CMD_STOP_CHIP			28</div><div class='del'>-#define CMD_STOP_CHIP_REPLY		29</div><div class='del'>-</div><div class='del'>-#define CMD_LEAF_GET_CARD_INFO2		32</div><div class='del'>-#define CMD_USBCAN_RESET_CLOCK		32</div><div class='del'>-#define CMD_USBCAN_CLOCK_OVERFLOW_EVENT	33</div><div class='del'>-</div><div class='del'>-#define CMD_GET_CARD_INFO		34</div><div class='del'>-#define CMD_GET_CARD_INFO_REPLY		35</div><div class='del'>-#define CMD_GET_SOFTWARE_INFO		38</div><div class='del'>-#define CMD_GET_SOFTWARE_INFO_REPLY	39</div><div class='del'>-#define CMD_ERROR_EVENT			45</div><div class='del'>-#define CMD_FLUSH_QUEUE			48</div><div class='del'>-#define CMD_RESET_ERROR_COUNTER		49</div><div class='del'>-#define CMD_TX_ACKNOWLEDGE		50</div><div class='del'>-#define CMD_CAN_ERROR_EVENT		51</div><div class='del'>-</div><div class='del'>-#define CMD_LEAF_USB_THROTTLE		77</div><div class='del'>-#define CMD_LEAF_LOG_MESSAGE		106</div><div class='del'>-</div><div class='del'>-/* error factors */</div><div class='del'>-#define M16C_EF_ACKE			BIT(0)</div><div class='del'>-#define M16C_EF_CRCE			BIT(1)</div><div class='del'>-#define M16C_EF_FORME			BIT(2)</div><div class='del'>-#define M16C_EF_STFE			BIT(3)</div><div class='del'>-#define M16C_EF_BITE0			BIT(4)</div><div class='del'>-#define M16C_EF_BITE1			BIT(5)</div><div class='del'>-#define M16C_EF_RCVE			BIT(6)</div><div class='del'>-#define M16C_EF_TRE			BIT(7)</div><div class='del'>-</div><div class='del'>-/* Only Leaf-based devices can report M16C error factors,</div><div class='del'>- * thus define our own error status flags for USBCANII</div><div class='del'>- */</div><div class='del'>-#define USBCAN_ERROR_STATE_NONE		0</div><div class='del'>-#define USBCAN_ERROR_STATE_TX_ERROR	BIT(0)</div><div class='del'>-#define USBCAN_ERROR_STATE_RX_ERROR	BIT(1)</div><div class='del'>-#define USBCAN_ERROR_STATE_BUSERROR	BIT(2)</div><div class='del'>-</div><div class='del'>-/* bittiming parameters */</div><div class='del'>-#define KVASER_USB_TSEG1_MIN		1</div><div class='del'>-#define KVASER_USB_TSEG1_MAX		16</div><div class='del'>-#define KVASER_USB_TSEG2_MIN		1</div><div class='del'>-#define KVASER_USB_TSEG2_MAX		8</div><div class='del'>-#define KVASER_USB_SJW_MAX		4</div><div class='del'>-#define KVASER_USB_BRP_MIN		1</div><div class='del'>-#define KVASER_USB_BRP_MAX		64</div><div class='del'>-#define KVASER_USB_BRP_INC		1</div><div class='del'>-</div><div class='del'>-/* ctrl modes */</div><div class='del'>-#define KVASER_CTRL_MODE_NORMAL		1</div><div class='del'>-#define KVASER_CTRL_MODE_SILENT		2</div><div class='del'>-#define KVASER_CTRL_MODE_SELFRECEPTION	3</div><div class='del'>-#define KVASER_CTRL_MODE_OFF		4</div><div class='del'>-</div><div class='del'>-/* Extended CAN identifier flag */</div><div class='del'>-#define KVASER_EXTENDED_FRAME		BIT(31)</div><div class='del'>-</div><div class='del'>-/* Kvaser USB CAN dongles are divided into two major families:</div><div class='del'>- * - Leaf: Based on Renesas M32C, running firmware labeled as 'filo'</div><div class='del'>- * - UsbcanII: Based on Renesas M16C, running firmware labeled as 'helios'</div><div class='del'>- */</div><div class='del'>-enum kvaser_usb_family {</div><div class='del'>-	KVASER_LEAF,</div><div class='del'>-	KVASER_USBCAN,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct kvaser_msg_simple {</div><div class='del'>-	u8 tid;</div><div class='del'>-	u8 channel;</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='del'>-struct kvaser_msg_cardinfo {</div><div class='del'>-	u8 tid;</div><div class='del'>-	u8 nchannels;</div><div class='del'>-	union {</div><div class='del'>-		struct {</div><div class='del'>-			__le32 serial_number;</div><div class='del'>-			__le32 padding;</div><div class='del'>-		} __packed leaf0;</div><div class='del'>-		struct {</div><div class='del'>-			__le32 serial_number_low;</div><div class='del'>-			__le32 serial_number_high;</div><div class='del'>-		} __packed usbcan0;</div><div class='del'>-	} __packed;</div><div class='del'>-	__le32 clock_resolution;</div><div class='del'>-	__le32 mfgdate;</div><div class='del'>-	u8 ean[8];</div><div class='del'>-	u8 hw_revision;</div><div class='del'>-	union {</div><div class='del'>-		struct {</div><div class='del'>-			u8 usb_hs_mode;</div><div class='del'>-		} __packed leaf1;</div><div class='del'>-		struct {</div><div class='del'>-			u8 padding;</div><div class='del'>-		} __packed usbcan1;</div><div class='del'>-	} __packed;</div><div class='del'>-	__le16 padding;</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='del'>-struct kvaser_msg_cardinfo2 {</div><div class='del'>-	u8 tid;</div><div class='del'>-	u8 reserved;</div><div class='del'>-	u8 pcb_id[24];</div><div class='del'>-	__le32 oem_unlock_code;</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='del'>-struct leaf_msg_softinfo {</div><div class='del'>-	u8 tid;</div><div class='del'>-	u8 padding0;</div><div class='del'>-	__le32 sw_options;</div><div class='del'>-	__le32 fw_version;</div><div class='del'>-	__le16 max_outstanding_tx;</div><div class='del'>-	__le16 padding1[9];</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='del'>-struct usbcan_msg_softinfo {</div><div class='del'>-	u8 tid;</div><div class='del'>-	u8 fw_name[5];</div><div class='del'>-	__le16 max_outstanding_tx;</div><div class='del'>-	u8 padding[6];</div><div class='del'>-	__le32 fw_version;</div><div class='del'>-	__le16 checksum;</div><div class='del'>-	__le16 sw_options;</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='del'>-struct kvaser_msg_busparams {</div><div class='del'>-	u8 tid;</div><div class='del'>-	u8 channel;</div><div class='del'>-	__le32 bitrate;</div><div class='del'>-	u8 tseg1;</div><div class='del'>-	u8 tseg2;</div><div class='del'>-	u8 sjw;</div><div class='del'>-	u8 no_samp;</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='del'>-struct kvaser_msg_tx_can {</div><div class='del'>-	u8 channel;</div><div class='del'>-	u8 tid;</div><div class='del'>-	u8 msg[14];</div><div class='del'>-	union {</div><div class='del'>-		struct {</div><div class='del'>-			u8 padding;</div><div class='del'>-			u8 flags;</div><div class='del'>-		} __packed leaf;</div><div class='del'>-		struct {</div><div class='del'>-			u8 flags;</div><div class='del'>-			u8 padding;</div><div class='del'>-		} __packed usbcan;</div><div class='del'>-	} __packed;</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='del'>-struct kvaser_msg_rx_can_header {</div><div class='del'>-	u8 channel;</div><div class='del'>-	u8 flag;</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='del'>-struct leaf_msg_rx_can {</div><div class='del'>-	u8 channel;</div><div class='del'>-	u8 flag;</div><div class='del'>-</div><div class='del'>-	__le16 time[3];</div><div class='del'>-	u8 msg[14];</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='del'>-struct usbcan_msg_rx_can {</div><div class='del'>-	u8 channel;</div><div class='del'>-	u8 flag;</div><div class='del'>-</div><div class='del'>-	u8 msg[14];</div><div class='del'>-	__le16 time;</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='del'>-struct leaf_msg_chip_state_event {</div><div class='del'>-	u8 tid;</div><div class='del'>-	u8 channel;</div><div class='del'>-</div><div class='del'>-	__le16 time[3];</div><div class='del'>-	u8 tx_errors_count;</div><div class='del'>-	u8 rx_errors_count;</div><div class='del'>-</div><div class='del'>-	u8 status;</div><div class='del'>-	u8 padding[3];</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='del'>-struct usbcan_msg_chip_state_event {</div><div class='del'>-	u8 tid;</div><div class='del'>-	u8 channel;</div><div class='del'>-</div><div class='del'>-	u8 tx_errors_count;</div><div class='del'>-	u8 rx_errors_count;</div><div class='del'>-	__le16 time;</div><div class='del'>-</div><div class='del'>-	u8 status;</div><div class='del'>-	u8 padding[3];</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='del'>-struct kvaser_msg_tx_acknowledge_header {</div><div class='del'>-	u8 channel;</div><div class='del'>-	u8 tid;</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='del'>-struct leaf_msg_tx_acknowledge {</div><div class='del'>-	u8 channel;</div><div class='del'>-	u8 tid;</div><div class='del'>-</div><div class='del'>-	__le16 time[3];</div><div class='del'>-	u8 flags;</div><div class='del'>-	u8 time_offset;</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='del'>-struct usbcan_msg_tx_acknowledge {</div><div class='del'>-	u8 channel;</div><div class='del'>-	u8 tid;</div><div class='del'>-</div><div class='del'>-	__le16 time;</div><div class='del'>-	__le16 padding;</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='del'>-struct leaf_msg_error_event {</div><div class='del'>-	u8 tid;</div><div class='del'>-	u8 flags;</div><div class='del'>-	__le16 time[3];</div><div class='del'>-	u8 channel;</div><div class='del'>-	u8 padding;</div><div class='del'>-	u8 tx_errors_count;</div><div class='del'>-	u8 rx_errors_count;</div><div class='del'>-	u8 status;</div><div class='del'>-	u8 error_factor;</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='del'>-struct usbcan_msg_error_event {</div><div class='del'>-	u8 tid;</div><div class='del'>-	u8 padding;</div><div class='del'>-	u8 tx_errors_count_ch0;</div><div class='del'>-	u8 rx_errors_count_ch0;</div><div class='del'>-	u8 tx_errors_count_ch1;</div><div class='del'>-	u8 rx_errors_count_ch1;</div><div class='del'>-	u8 status_ch0;</div><div class='del'>-	u8 status_ch1;</div><div class='del'>-	__le16 time;</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='del'>-struct kvaser_msg_ctrl_mode {</div><div class='del'>-	u8 tid;</div><div class='del'>-	u8 channel;</div><div class='del'>-	u8 ctrl_mode;</div><div class='del'>-	u8 padding[3];</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='del'>-struct kvaser_msg_flush_queue {</div><div class='del'>-	u8 tid;</div><div class='del'>-	u8 channel;</div><div class='del'>-	u8 flags;</div><div class='del'>-	u8 padding[3];</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='del'>-struct leaf_msg_log_message {</div><div class='del'>-	u8 channel;</div><div class='del'>-	u8 flags;</div><div class='del'>-	__le16 time[3];</div><div class='del'>-	u8 dlc;</div><div class='del'>-	u8 time_offset;</div><div class='del'>-	__le32 id;</div><div class='del'>-	u8 data[8];</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='del'>-struct kvaser_msg {</div><div class='del'>-	u8 len;</div><div class='del'>-	u8 id;</div><div class='del'>-	union	{</div><div class='del'>-		struct kvaser_msg_simple simple;</div><div class='del'>-		struct kvaser_msg_cardinfo cardinfo;</div><div class='del'>-		struct kvaser_msg_cardinfo2 cardinfo2;</div><div class='del'>-		struct kvaser_msg_busparams busparams;</div><div class='del'>-</div><div class='del'>-		struct kvaser_msg_rx_can_header rx_can_header;</div><div class='del'>-		struct kvaser_msg_tx_acknowledge_header tx_acknowledge_header;</div><div class='del'>-</div><div class='del'>-		union {</div><div class='del'>-			struct leaf_msg_softinfo softinfo;</div><div class='del'>-			struct leaf_msg_rx_can rx_can;</div><div class='del'>-			struct leaf_msg_chip_state_event chip_state_event;</div><div class='del'>-			struct leaf_msg_tx_acknowledge tx_acknowledge;</div><div class='del'>-			struct leaf_msg_error_event error_event;</div><div class='del'>-			struct leaf_msg_log_message log_message;</div><div class='del'>-		} __packed leaf;</div><div class='del'>-</div><div class='del'>-		union {</div><div class='del'>-			struct usbcan_msg_softinfo softinfo;</div><div class='del'>-			struct usbcan_msg_rx_can rx_can;</div><div class='del'>-			struct usbcan_msg_chip_state_event chip_state_event;</div><div class='del'>-			struct usbcan_msg_tx_acknowledge tx_acknowledge;</div><div class='del'>-			struct usbcan_msg_error_event error_event;</div><div class='del'>-		} __packed usbcan;</div><div class='del'>-</div><div class='del'>-		struct kvaser_msg_tx_can tx_can;</div><div class='del'>-		struct kvaser_msg_ctrl_mode ctrl_mode;</div><div class='del'>-		struct kvaser_msg_flush_queue flush_queue;</div><div class='del'>-	} u;</div><div class='del'>-} __packed;</div><div class='del'>-</div><div class='del'>-/* Summary of a kvaser error event, for a unified Leaf/Usbcan error</div><div class='del'>- * handling. Some discrepancies between the two families exist:</div><div class='del'>- *</div><div class='del'>- * - USBCAN firmware does not report M16C "error factors"</div><div class='del'>- * - USBCAN controllers has difficulties reporting if the raised error</div><div class='del'>- *   event is for ch0 or ch1. They leave such arbitration to the OS</div><div class='del'>- *   driver by letting it compare error counters with previous values</div><div class='del'>- *   and decide the error event's channel. Thus for USBCAN, the channel</div><div class='del'>- *   field is only advisory.</div><div class='del'>- */</div><div class='del'>-struct kvaser_usb_error_summary {</div><div class='del'>-	u8 channel, status, txerr, rxerr;</div><div class='del'>-	union {</div><div class='del'>-		struct {</div><div class='del'>-			u8 error_factor;</div><div class='del'>-		} leaf;</div><div class='del'>-		struct {</div><div class='del'>-			u8 other_ch_status;</div><div class='del'>-			u8 error_state;</div><div class='del'>-		} usbcan;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Context for an outstanding, not yet ACKed, transmission */</div><div class='del'>-struct kvaser_usb_tx_urb_context {</div><div class='del'>-	struct kvaser_usb_net_priv *priv;</div><div class='del'>-	u32 echo_index;</div><div class='del'>-	int dlc;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct kvaser_usb {</div><div class='del'>-	struct usb_device *udev;</div><div class='del'>-	struct kvaser_usb_net_priv *nets[MAX_NET_DEVICES];</div><div class='del'>-</div><div class='del'>-	struct usb_endpoint_descriptor *bulk_in, *bulk_out;</div><div class='del'>-	struct usb_anchor rx_submitted;</div><div class='del'>-</div><div class='del'>-	/* @max_tx_urbs: Firmware-reported maximum number of oustanding,</div><div class='del'>-	 * not yet ACKed, transmissions on this device. This value is</div><div class='del'>-	 * also used as a sentinel for marking free tx contexts.</div><div class='del'>-	 */</div><div class='del'>-	u32 fw_version;</div><div class='del'>-	unsigned int nchannels;</div><div class='del'>-	unsigned int max_tx_urbs;</div><div class='del'>-	enum kvaser_usb_family family;</div><div class='del'>-</div><div class='del'>-	bool rxinitdone;</div><div class='del'>-	void *rxbuf[MAX_RX_URBS];</div><div class='del'>-	dma_addr_t rxbuf_dma[MAX_RX_URBS];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct kvaser_usb_net_priv {</div><div class='del'>-	struct can_priv can;</div><div class='del'>-	struct can_berr_counter bec;</div><div class='del'>-</div><div class='del'>-	struct kvaser_usb *dev;</div><div class='del'>-	struct net_device *netdev;</div><div class='del'>-	int channel;</div><div class='del'>-</div><div class='del'>-	struct completion start_comp, stop_comp;</div><div class='del'>-	struct usb_anchor tx_submitted;</div><div class='del'>-</div><div class='del'>-	spinlock_t tx_contexts_lock;</div><div class='del'>-	int active_tx_contexts;</div><div class='del'>-	struct kvaser_usb_tx_urb_context tx_contexts[];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct usb_device_id kvaser_usb_table[] = {</div><div class='del'>-	/* Leaf family IDs */</div><div class='del'>-	{ USB_DEVICE(KVASER_VENDOR_ID, USB_LEAF_DEVEL_PRODUCT_ID) },</div><div class='del'>-	{ USB_DEVICE(KVASER_VENDOR_ID, USB_LEAF_LITE_PRODUCT_ID) },</div><div class='del'>-	{ USB_DEVICE(KVASER_VENDOR_ID, USB_LEAF_PRO_PRODUCT_ID),</div><div class='del'>-		.driver_info = KVASER_HAS_TXRX_ERRORS |</div><div class='del'>-			       KVASER_HAS_SILENT_MODE },</div><div class='del'>-	{ USB_DEVICE(KVASER_VENDOR_ID, USB_LEAF_SPRO_PRODUCT_ID),</div><div class='del'>-		.driver_info = KVASER_HAS_TXRX_ERRORS |</div><div class='del'>-			       KVASER_HAS_SILENT_MODE },</div><div class='del'>-	{ USB_DEVICE(KVASER_VENDOR_ID, USB_LEAF_PRO_LS_PRODUCT_ID),</div><div class='del'>-		.driver_info = KVASER_HAS_TXRX_ERRORS |</div><div class='del'>-			       KVASER_HAS_SILENT_MODE },</div><div class='del'>-	{ USB_DEVICE(KVASER_VENDOR_ID, USB_LEAF_PRO_SWC_PRODUCT_ID),</div><div class='del'>-		.driver_info = KVASER_HAS_TXRX_ERRORS |</div><div class='del'>-			       KVASER_HAS_SILENT_MODE },</div><div class='del'>-	{ USB_DEVICE(KVASER_VENDOR_ID, USB_LEAF_PRO_LIN_PRODUCT_ID),</div><div class='del'>-		.driver_info = KVASER_HAS_TXRX_ERRORS |</div><div class='del'>-			       KVASER_HAS_SILENT_MODE },</div><div class='del'>-	{ USB_DEVICE(KVASER_VENDOR_ID, USB_LEAF_SPRO_LS_PRODUCT_ID),</div><div class='del'>-		.driver_info = KVASER_HAS_TXRX_ERRORS |</div><div class='del'>-			       KVASER_HAS_SILENT_MODE },</div><div class='del'>-	{ USB_DEVICE(KVASER_VENDOR_ID, USB_LEAF_SPRO_SWC_PRODUCT_ID),</div><div class='del'>-		.driver_info = KVASER_HAS_TXRX_ERRORS |</div><div class='del'>-			       KVASER_HAS_SILENT_MODE },</div><div class='del'>-	{ USB_DEVICE(KVASER_VENDOR_ID, USB_MEMO2_DEVEL_PRODUCT_ID),</div><div class='del'>-		.driver_info = KVASER_HAS_TXRX_ERRORS |</div><div class='del'>-			       KVASER_HAS_SILENT_MODE },</div><div class='del'>-	{ USB_DEVICE(KVASER_VENDOR_ID, USB_MEMO2_HSHS_PRODUCT_ID),</div><div class='del'>-		.driver_info = KVASER_HAS_TXRX_ERRORS |</div><div class='del'>-			       KVASER_HAS_SILENT_MODE },</div><div class='del'>-	{ USB_DEVICE(KVASER_VENDOR_ID, USB_UPRO_HSHS_PRODUCT_ID),</div><div class='del'>-		.driver_info = KVASER_HAS_TXRX_ERRORS },</div><div class='del'>-	{ USB_DEVICE(KVASER_VENDOR_ID, USB_LEAF_LITE_GI_PRODUCT_ID) },</div><div class='del'>-	{ USB_DEVICE(KVASER_VENDOR_ID, USB_LEAF_PRO_OBDII_PRODUCT_ID),</div><div class='del'>-		.driver_info = KVASER_HAS_TXRX_ERRORS |</div><div class='del'>-			       KVASER_HAS_SILENT_MODE },</div><div class='del'>-	{ USB_DEVICE(KVASER_VENDOR_ID, USB_MEMO2_HSLS_PRODUCT_ID),</div><div class='del'>-		.driver_info = KVASER_HAS_TXRX_ERRORS },</div><div class='del'>-	{ USB_DEVICE(KVASER_VENDOR_ID, USB_LEAF_LITE_CH_PRODUCT_ID),</div><div class='del'>-		.driver_info = KVASER_HAS_TXRX_ERRORS },</div><div class='del'>-	{ USB_DEVICE(KVASER_VENDOR_ID, USB_BLACKBIRD_SPRO_PRODUCT_ID),</div><div class='del'>-		.driver_info = KVASER_HAS_TXRX_ERRORS },</div><div class='del'>-	{ USB_DEVICE(KVASER_VENDOR_ID, USB_OEM_MERCURY_PRODUCT_ID),</div><div class='del'>-		.driver_info = KVASER_HAS_TXRX_ERRORS },</div><div class='del'>-	{ USB_DEVICE(KVASER_VENDOR_ID, USB_OEM_LEAF_PRODUCT_ID),</div><div class='del'>-		.driver_info = KVASER_HAS_TXRX_ERRORS },</div><div class='del'>-	{ USB_DEVICE(KVASER_VENDOR_ID, USB_CAN_R_PRODUCT_ID),</div><div class='del'>-		.driver_info = KVASER_HAS_TXRX_ERRORS },</div><div class='del'>-	{ USB_DEVICE(KVASER_VENDOR_ID, USB_LEAF_LITE_V2_PRODUCT_ID) },</div><div class='del'>-	{ USB_DEVICE(KVASER_VENDOR_ID, USB_MINI_PCIE_HS_PRODUCT_ID) },</div><div class='del'>-</div><div class='del'>-	/* USBCANII family IDs */</div><div class='del'>-	{ USB_DEVICE(KVASER_VENDOR_ID, USB_USBCAN2_PRODUCT_ID),</div><div class='del'>-		.driver_info = KVASER_HAS_TXRX_ERRORS },</div><div class='del'>-	{ USB_DEVICE(KVASER_VENDOR_ID, USB_USBCAN_REVB_PRODUCT_ID),</div><div class='del'>-		.driver_info = KVASER_HAS_TXRX_ERRORS },</div><div class='del'>-	{ USB_DEVICE(KVASER_VENDOR_ID, USB_MEMORATOR_PRODUCT_ID),</div><div class='del'>-		.driver_info = KVASER_HAS_TXRX_ERRORS },</div><div class='del'>-	{ USB_DEVICE(KVASER_VENDOR_ID, USB_VCI2_PRODUCT_ID),</div><div class='del'>-		.driver_info = KVASER_HAS_TXRX_ERRORS },</div><div class='del'>-</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-MODULE_DEVICE_TABLE(usb, kvaser_usb_table);</div><div class='del'>-</div><div class='del'>-static inline int kvaser_usb_send_msg(const struct kvaser_usb *dev,</div><div class='del'>-				      struct kvaser_msg *msg)</div><div class='del'>-{</div><div class='del'>-	int actual_len;</div><div class='del'>-</div><div class='del'>-	return usb_bulk_msg(dev-&gt;udev,</div><div class='del'>-			    usb_sndbulkpipe(dev-&gt;udev,</div><div class='del'>-					dev-&gt;bulk_out-&gt;bEndpointAddress),</div><div class='del'>-			    msg, msg-&gt;len, &amp;actual_len,</div><div class='del'>-			    USB_SEND_TIMEOUT);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int kvaser_usb_wait_msg(const struct kvaser_usb *dev, u8 id,</div><div class='del'>-			       struct kvaser_msg *msg)</div><div class='del'>-{</div><div class='del'>-	struct kvaser_msg *tmp;</div><div class='del'>-	void *buf;</div><div class='del'>-	int actual_len;</div><div class='del'>-	int err;</div><div class='del'>-	int pos;</div><div class='del'>-	unsigned long to = jiffies + msecs_to_jiffies(USB_RECV_TIMEOUT);</div><div class='del'>-</div><div class='del'>-	buf = kzalloc(RX_BUFFER_SIZE, GFP_KERNEL);</div><div class='del'>-	if (!buf)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	do {</div><div class='del'>-		err = usb_bulk_msg(dev-&gt;udev,</div><div class='del'>-				   usb_rcvbulkpipe(dev-&gt;udev,</div><div class='del'>-					dev-&gt;bulk_in-&gt;bEndpointAddress),</div><div class='del'>-				   buf, RX_BUFFER_SIZE, &amp;actual_len,</div><div class='del'>-				   USB_RECV_TIMEOUT);</div><div class='del'>-		if (err &lt; 0)</div><div class='del'>-			goto end;</div><div class='del'>-</div><div class='del'>-		pos = 0;</div><div class='del'>-		while (pos &lt;= actual_len - MSG_HEADER_LEN) {</div><div class='del'>-			tmp = buf + pos;</div><div class='del'>-</div><div class='del'>-			/* Handle messages crossing the USB endpoint max packet</div><div class='del'>-			 * size boundary. Check kvaser_usb_read_bulk_callback()</div><div class='del'>-			 * for further details.</div><div class='del'>-			 */</div><div class='del'>-			if (tmp-&gt;len == 0) {</div><div class='del'>-				pos = round_up(pos, le16_to_cpu(dev-&gt;bulk_in-&gt;</div><div class='del'>-								wMaxPacketSize));</div><div class='del'>-				continue;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			if (pos + tmp-&gt;len &gt; actual_len) {</div><div class='del'>-				dev_err(dev-&gt;udev-&gt;dev.parent,</div><div class='del'>-					"Format error\n");</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			if (tmp-&gt;id == id) {</div><div class='del'>-				memcpy(msg, tmp, tmp-&gt;len);</div><div class='del'>-				goto end;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			pos += tmp-&gt;len;</div><div class='del'>-		}</div><div class='del'>-	} while (time_before(jiffies, to));</div><div class='del'>-</div><div class='del'>-	err = -EINVAL;</div><div class='del'>-</div><div class='del'>-end:</div><div class='del'>-	kfree(buf);</div><div class='del'>-</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int kvaser_usb_send_simple_msg(const struct kvaser_usb *dev,</div><div class='del'>-				      u8 msg_id, int channel)</div><div class='del'>-{</div><div class='del'>-	struct kvaser_msg *msg;</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	msg = kmalloc(sizeof(*msg), GFP_KERNEL);</div><div class='del'>-	if (!msg)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	msg-&gt;id = msg_id;</div><div class='del'>-	msg-&gt;len = MSG_HEADER_LEN + sizeof(struct kvaser_msg_simple);</div><div class='del'>-	msg-&gt;u.simple.channel = channel;</div><div class='del'>-	msg-&gt;u.simple.tid = 0xff;</div><div class='del'>-</div><div class='del'>-	rc = kvaser_usb_send_msg(dev, msg);</div><div class='del'>-</div><div class='del'>-	kfree(msg);</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int kvaser_usb_get_software_info(struct kvaser_usb *dev)</div><div class='del'>-{</div><div class='del'>-	struct kvaser_msg msg;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = kvaser_usb_send_simple_msg(dev, CMD_GET_SOFTWARE_INFO, 0);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = kvaser_usb_wait_msg(dev, CMD_GET_SOFTWARE_INFO_REPLY, &amp;msg);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	switch (dev-&gt;family) {</div><div class='del'>-	case KVASER_LEAF:</div><div class='del'>-		dev-&gt;fw_version = le32_to_cpu(msg.u.leaf.softinfo.fw_version);</div><div class='del'>-		dev-&gt;max_tx_urbs =</div><div class='del'>-			le16_to_cpu(msg.u.leaf.softinfo.max_outstanding_tx);</div><div class='del'>-		break;</div><div class='del'>-	case KVASER_USBCAN:</div><div class='del'>-		dev-&gt;fw_version = le32_to_cpu(msg.u.usbcan.softinfo.fw_version);</div><div class='del'>-		dev-&gt;max_tx_urbs =</div><div class='del'>-			le16_to_cpu(msg.u.usbcan.softinfo.max_outstanding_tx);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int kvaser_usb_get_card_info(struct kvaser_usb *dev)</div><div class='del'>-{</div><div class='del'>-	struct kvaser_msg msg;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = kvaser_usb_send_simple_msg(dev, CMD_GET_CARD_INFO, 0);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = kvaser_usb_wait_msg(dev, CMD_GET_CARD_INFO_REPLY, &amp;msg);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	dev-&gt;nchannels = msg.u.cardinfo.nchannels;</div><div class='del'>-	if ((dev-&gt;nchannels &gt; MAX_NET_DEVICES) ||</div><div class='del'>-	    (dev-&gt;family == KVASER_USBCAN &amp;&amp;</div><div class='del'>-	     dev-&gt;nchannels &gt; MAX_USBCAN_NET_DEVICES))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void kvaser_usb_tx_acknowledge(const struct kvaser_usb *dev,</div><div class='del'>-				      const struct kvaser_msg *msg)</div><div class='del'>-{</div><div class='del'>-	struct net_device_stats *stats;</div><div class='del'>-	struct kvaser_usb_tx_urb_context *context;</div><div class='del'>-	struct kvaser_usb_net_priv *priv;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	struct can_frame *cf;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	u8 channel, tid;</div><div class='del'>-</div><div class='del'>-	channel = msg-&gt;u.tx_acknowledge_header.channel;</div><div class='del'>-	tid = msg-&gt;u.tx_acknowledge_header.tid;</div><div class='del'>-</div><div class='del'>-	if (channel &gt;= dev-&gt;nchannels) {</div><div class='del'>-		dev_err(dev-&gt;udev-&gt;dev.parent,</div><div class='del'>-			"Invalid channel number (%d)\n", channel);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	priv = dev-&gt;nets[channel];</div><div class='del'>-</div><div class='del'>-	if (!netif_device_present(priv-&gt;netdev))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	stats = &amp;priv-&gt;netdev-&gt;stats;</div><div class='del'>-</div><div class='del'>-	context = &amp;priv-&gt;tx_contexts[tid % dev-&gt;max_tx_urbs];</div><div class='del'>-</div><div class='del'>-	/* Sometimes the state change doesn't come after a bus-off event */</div><div class='del'>-	if (priv-&gt;can.restart_ms &amp;&amp;</div><div class='del'>-	    (priv-&gt;can.state &gt;= CAN_STATE_BUS_OFF)) {</div><div class='del'>-		skb = alloc_can_err_skb(priv-&gt;netdev, &amp;cf);</div><div class='del'>-		if (skb) {</div><div class='del'>-			cf-&gt;can_id |= CAN_ERR_RESTARTED;</div><div class='del'>-</div><div class='del'>-			stats-&gt;rx_packets++;</div><div class='del'>-			stats-&gt;rx_bytes += cf-&gt;can_dlc;</div><div class='del'>-			netif_rx(skb);</div><div class='del'>-		} else {</div><div class='del'>-			netdev_err(priv-&gt;netdev,</div><div class='del'>-				   "No memory left for err_skb\n");</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		priv-&gt;can.can_stats.restarts++;</div><div class='del'>-		netif_carrier_on(priv-&gt;netdev);</div><div class='del'>-</div><div class='del'>-		priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	stats-&gt;tx_packets++;</div><div class='del'>-	stats-&gt;tx_bytes += context-&gt;dlc;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;priv-&gt;tx_contexts_lock, flags);</div><div class='del'>-</div><div class='del'>-	can_get_echo_skb(priv-&gt;netdev, context-&gt;echo_index);</div><div class='del'>-	context-&gt;echo_index = dev-&gt;max_tx_urbs;</div><div class='del'>-	--priv-&gt;active_tx_contexts;</div><div class='del'>-	netif_wake_queue(priv-&gt;netdev);</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(&amp;priv-&gt;tx_contexts_lock, flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void kvaser_usb_simple_msg_callback(struct urb *urb)</div><div class='del'>-{</div><div class='del'>-	struct net_device *netdev = urb-&gt;context;</div><div class='del'>-</div><div class='del'>-	kfree(urb-&gt;transfer_buffer);</div><div class='del'>-</div><div class='del'>-	if (urb-&gt;status)</div><div class='del'>-		netdev_warn(netdev, "urb status received: %d\n",</div><div class='del'>-			    urb-&gt;status);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int kvaser_usb_simple_msg_async(struct kvaser_usb_net_priv *priv,</div><div class='del'>-				       u8 msg_id)</div><div class='del'>-{</div><div class='del'>-	struct kvaser_usb *dev = priv-&gt;dev;</div><div class='del'>-	struct net_device *netdev = priv-&gt;netdev;</div><div class='del'>-	struct kvaser_msg *msg;</div><div class='del'>-	struct urb *urb;</div><div class='del'>-	void *buf;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	urb = usb_alloc_urb(0, GFP_ATOMIC);</div><div class='del'>-	if (!urb) {</div><div class='del'>-		netdev_err(netdev, "No memory left for URBs\n");</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	buf = kmalloc(sizeof(struct kvaser_msg), GFP_ATOMIC);</div><div class='del'>-	if (!buf) {</div><div class='del'>-		usb_free_urb(urb);</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	msg = (struct kvaser_msg *)buf;</div><div class='del'>-	msg-&gt;len = MSG_HEADER_LEN + sizeof(struct kvaser_msg_simple);</div><div class='del'>-	msg-&gt;id = msg_id;</div><div class='del'>-	msg-&gt;u.simple.channel = priv-&gt;channel;</div><div class='del'>-</div><div class='del'>-	usb_fill_bulk_urb(urb, dev-&gt;udev,</div><div class='del'>-			  usb_sndbulkpipe(dev-&gt;udev,</div><div class='del'>-					  dev-&gt;bulk_out-&gt;bEndpointAddress),</div><div class='del'>-			  buf, msg-&gt;len,</div><div class='del'>-			  kvaser_usb_simple_msg_callback, netdev);</div><div class='del'>-	usb_anchor_urb(urb, &amp;priv-&gt;tx_submitted);</div><div class='del'>-</div><div class='del'>-	err = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='del'>-	if (err) {</div><div class='del'>-		netdev_err(netdev, "Error transmitting URB\n");</div><div class='del'>-		usb_unanchor_urb(urb);</div><div class='del'>-		usb_free_urb(urb);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	usb_free_urb(urb);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void kvaser_usb_rx_error_update_can_state(struct kvaser_usb_net_priv *priv,</div><div class='del'>-						 const struct kvaser_usb_error_summary *es,</div><div class='del'>-						 struct can_frame *cf)</div><div class='del'>-{</div><div class='del'>-	struct kvaser_usb *dev = priv-&gt;dev;</div><div class='del'>-	struct net_device_stats *stats = &amp;priv-&gt;netdev-&gt;stats;</div><div class='del'>-	enum can_state cur_state, new_state, tx_state, rx_state;</div><div class='del'>-</div><div class='del'>-	netdev_dbg(priv-&gt;netdev, "Error status: 0x%02x\n", es-&gt;status);</div><div class='del'>-</div><div class='del'>-	new_state = cur_state = priv-&gt;can.state;</div><div class='del'>-</div><div class='del'>-	if (es-&gt;status &amp; (M16C_STATE_BUS_OFF | M16C_STATE_BUS_RESET))</div><div class='del'>-		new_state = CAN_STATE_BUS_OFF;</div><div class='del'>-	else if (es-&gt;status &amp; M16C_STATE_BUS_PASSIVE)</div><div class='del'>-		new_state = CAN_STATE_ERROR_PASSIVE;</div><div class='del'>-	else if (es-&gt;status &amp; M16C_STATE_BUS_ERROR) {</div><div class='del'>-		/* Guard against spurious error events after a busoff */</div><div class='del'>-		if (cur_state &lt; CAN_STATE_BUS_OFF) {</div><div class='del'>-			if ((es-&gt;txerr &gt;= 128) || (es-&gt;rxerr &gt;= 128))</div><div class='del'>-				new_state = CAN_STATE_ERROR_PASSIVE;</div><div class='del'>-			else if ((es-&gt;txerr &gt;= 96) || (es-&gt;rxerr &gt;= 96))</div><div class='del'>-				new_state = CAN_STATE_ERROR_WARNING;</div><div class='del'>-			else if (cur_state &gt; CAN_STATE_ERROR_ACTIVE)</div><div class='del'>-				new_state = CAN_STATE_ERROR_ACTIVE;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!es-&gt;status)</div><div class='del'>-		new_state = CAN_STATE_ERROR_ACTIVE;</div><div class='del'>-</div><div class='del'>-	if (new_state != cur_state) {</div><div class='del'>-		tx_state = (es-&gt;txerr &gt;= es-&gt;rxerr) ? new_state : 0;</div><div class='del'>-		rx_state = (es-&gt;txerr &lt;= es-&gt;rxerr) ? new_state : 0;</div><div class='del'>-</div><div class='del'>-		can_change_state(priv-&gt;netdev, cf, tx_state, rx_state);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (priv-&gt;can.restart_ms &amp;&amp;</div><div class='del'>-	    (cur_state &gt;= CAN_STATE_BUS_OFF) &amp;&amp;</div><div class='del'>-	    (new_state &lt; CAN_STATE_BUS_OFF)) {</div><div class='del'>-		priv-&gt;can.can_stats.restarts++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	switch (dev-&gt;family) {</div><div class='del'>-	case KVASER_LEAF:</div><div class='del'>-		if (es-&gt;leaf.error_factor) {</div><div class='del'>-			priv-&gt;can.can_stats.bus_error++;</div><div class='del'>-			stats-&gt;rx_errors++;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	case KVASER_USBCAN:</div><div class='del'>-		if (es-&gt;usbcan.error_state &amp; USBCAN_ERROR_STATE_TX_ERROR)</div><div class='del'>-			stats-&gt;tx_errors++;</div><div class='del'>-		if (es-&gt;usbcan.error_state &amp; USBCAN_ERROR_STATE_RX_ERROR)</div><div class='del'>-			stats-&gt;rx_errors++;</div><div class='del'>-		if (es-&gt;usbcan.error_state &amp; USBCAN_ERROR_STATE_BUSERROR) {</div><div class='del'>-			priv-&gt;can.can_stats.bus_error++;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	priv-&gt;bec.txerr = es-&gt;txerr;</div><div class='del'>-	priv-&gt;bec.rxerr = es-&gt;rxerr;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void kvaser_usb_rx_error(const struct kvaser_usb *dev,</div><div class='del'>-				const struct kvaser_usb_error_summary *es)</div><div class='del'>-{</div><div class='del'>-	struct can_frame *cf, tmp_cf = { .can_id = CAN_ERR_FLAG, .can_dlc = CAN_ERR_DLC };</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	struct net_device_stats *stats;</div><div class='del'>-	struct kvaser_usb_net_priv *priv;</div><div class='del'>-	enum can_state old_state, new_state;</div><div class='del'>-</div><div class='del'>-	if (es-&gt;channel &gt;= dev-&gt;nchannels) {</div><div class='del'>-		dev_err(dev-&gt;udev-&gt;dev.parent,</div><div class='del'>-			"Invalid channel number (%d)\n", es-&gt;channel);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	priv = dev-&gt;nets[es-&gt;channel];</div><div class='del'>-	stats = &amp;priv-&gt;netdev-&gt;stats;</div><div class='del'>-</div><div class='del'>-	/* Update all of the can interface's state and error counters before</div><div class='del'>-	 * trying any memory allocation that can actually fail with -ENOMEM.</div><div class='del'>-	 *</div><div class='del'>-	 * We send a temporary stack-allocated error can frame to</div><div class='del'>-	 * can_change_state() for the very same reason.</div><div class='del'>-	 *</div><div class='del'>-	 * TODO: Split can_change_state() responsibility between updating the</div><div class='del'>-	 * can interface's state and counters, and the setting up of can error</div><div class='del'>-	 * frame ID and data to userspace. Remove stack allocation afterwards.</div><div class='del'>-	 */</div><div class='del'>-	old_state = priv-&gt;can.state;</div><div class='del'>-	kvaser_usb_rx_error_update_can_state(priv, es, &amp;tmp_cf);</div><div class='del'>-	new_state = priv-&gt;can.state;</div><div class='del'>-</div><div class='del'>-	skb = alloc_can_err_skb(priv-&gt;netdev, &amp;cf);</div><div class='del'>-	if (!skb) {</div><div class='del'>-		stats-&gt;rx_dropped++;</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-	memcpy(cf, &amp;tmp_cf, sizeof(*cf));</div><div class='del'>-</div><div class='del'>-	if (new_state != old_state) {</div><div class='del'>-		if (es-&gt;status &amp;</div><div class='del'>-		    (M16C_STATE_BUS_OFF | M16C_STATE_BUS_RESET)) {</div><div class='del'>-			if (!priv-&gt;can.restart_ms)</div><div class='del'>-				kvaser_usb_simple_msg_async(priv, CMD_STOP_CHIP);</div><div class='del'>-			netif_carrier_off(priv-&gt;netdev);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (priv-&gt;can.restart_ms &amp;&amp;</div><div class='del'>-		    (old_state &gt;= CAN_STATE_BUS_OFF) &amp;&amp;</div><div class='del'>-		    (new_state &lt; CAN_STATE_BUS_OFF)) {</div><div class='del'>-			cf-&gt;can_id |= CAN_ERR_RESTARTED;</div><div class='del'>-			netif_carrier_on(priv-&gt;netdev);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	switch (dev-&gt;family) {</div><div class='del'>-	case KVASER_LEAF:</div><div class='del'>-		if (es-&gt;leaf.error_factor) {</div><div class='del'>-			cf-&gt;can_id |= CAN_ERR_BUSERROR | CAN_ERR_PROT;</div><div class='del'>-</div><div class='del'>-			if (es-&gt;leaf.error_factor &amp; M16C_EF_ACKE)</div><div class='del'>-				cf-&gt;data[3] |= (CAN_ERR_PROT_LOC_ACK);</div><div class='del'>-			if (es-&gt;leaf.error_factor &amp; M16C_EF_CRCE)</div><div class='del'>-				cf-&gt;data[3] |= (CAN_ERR_PROT_LOC_CRC_SEQ |</div><div class='del'>-						CAN_ERR_PROT_LOC_CRC_DEL);</div><div class='del'>-			if (es-&gt;leaf.error_factor &amp; M16C_EF_FORME)</div><div class='del'>-				cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='del'>-			if (es-&gt;leaf.error_factor &amp; M16C_EF_STFE)</div><div class='del'>-				cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='del'>-			if (es-&gt;leaf.error_factor &amp; M16C_EF_BITE0)</div><div class='del'>-				cf-&gt;data[2] |= CAN_ERR_PROT_BIT0;</div><div class='del'>-			if (es-&gt;leaf.error_factor &amp; M16C_EF_BITE1)</div><div class='del'>-				cf-&gt;data[2] |= CAN_ERR_PROT_BIT1;</div><div class='del'>-			if (es-&gt;leaf.error_factor &amp; M16C_EF_TRE)</div><div class='del'>-				cf-&gt;data[2] |= CAN_ERR_PROT_TX;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	case KVASER_USBCAN:</div><div class='del'>-		if (es-&gt;usbcan.error_state &amp; USBCAN_ERROR_STATE_BUSERROR) {</div><div class='del'>-			cf-&gt;can_id |= CAN_ERR_BUSERROR;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	cf-&gt;data[6] = es-&gt;txerr;</div><div class='del'>-	cf-&gt;data[7] = es-&gt;rxerr;</div><div class='del'>-</div><div class='del'>-	stats-&gt;rx_packets++;</div><div class='del'>-	stats-&gt;rx_bytes += cf-&gt;can_dlc;</div><div class='del'>-	netif_rx(skb);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* For USBCAN, report error to userspace iff the channels's errors counter</div><div class='del'>- * has changed, or we're the only channel seeing a bus error state.</div><div class='del'>- */</div><div class='del'>-static void kvaser_usbcan_conditionally_rx_error(const struct kvaser_usb *dev,</div><div class='del'>-						 struct kvaser_usb_error_summary *es)</div><div class='del'>-{</div><div class='del'>-	struct kvaser_usb_net_priv *priv;</div><div class='del'>-	int channel;</div><div class='del'>-	bool report_error;</div><div class='del'>-</div><div class='del'>-	channel = es-&gt;channel;</div><div class='del'>-	if (channel &gt;= dev-&gt;nchannels) {</div><div class='del'>-		dev_err(dev-&gt;udev-&gt;dev.parent,</div><div class='del'>-			"Invalid channel number (%d)\n", channel);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	priv = dev-&gt;nets[channel];</div><div class='del'>-	report_error = false;</div><div class='del'>-</div><div class='del'>-	if (es-&gt;txerr != priv-&gt;bec.txerr) {</div><div class='del'>-		es-&gt;usbcan.error_state |= USBCAN_ERROR_STATE_TX_ERROR;</div><div class='del'>-		report_error = true;</div><div class='del'>-	}</div><div class='del'>-	if (es-&gt;rxerr != priv-&gt;bec.rxerr) {</div><div class='del'>-		es-&gt;usbcan.error_state |= USBCAN_ERROR_STATE_RX_ERROR;</div><div class='del'>-		report_error = true;</div><div class='del'>-	}</div><div class='del'>-	if ((es-&gt;status &amp; M16C_STATE_BUS_ERROR) &amp;&amp;</div><div class='del'>-	    !(es-&gt;usbcan.other_ch_status &amp; M16C_STATE_BUS_ERROR)) {</div><div class='del'>-		es-&gt;usbcan.error_state |= USBCAN_ERROR_STATE_BUSERROR;</div><div class='del'>-		report_error = true;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (report_error)</div><div class='del'>-		kvaser_usb_rx_error(dev, es);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void kvaser_usbcan_rx_error(const struct kvaser_usb *dev,</div><div class='del'>-				   const struct kvaser_msg *msg)</div><div class='del'>-{</div><div class='del'>-	struct kvaser_usb_error_summary es = { };</div><div class='del'>-</div><div class='del'>-	switch (msg-&gt;id) {</div><div class='del'>-	/* Sometimes errors are sent as unsolicited chip state events */</div><div class='del'>-	case CMD_CHIP_STATE_EVENT:</div><div class='del'>-		es.channel = msg-&gt;u.usbcan.chip_state_event.channel;</div><div class='del'>-		es.status =  msg-&gt;u.usbcan.chip_state_event.status;</div><div class='del'>-		es.txerr = msg-&gt;u.usbcan.chip_state_event.tx_errors_count;</div><div class='del'>-		es.rxerr = msg-&gt;u.usbcan.chip_state_event.rx_errors_count;</div><div class='del'>-		kvaser_usbcan_conditionally_rx_error(dev, &amp;es);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case CMD_CAN_ERROR_EVENT:</div><div class='del'>-		es.channel = 0;</div><div class='del'>-		es.status = msg-&gt;u.usbcan.error_event.status_ch0;</div><div class='del'>-		es.txerr = msg-&gt;u.usbcan.error_event.tx_errors_count_ch0;</div><div class='del'>-		es.rxerr = msg-&gt;u.usbcan.error_event.rx_errors_count_ch0;</div><div class='del'>-		es.usbcan.other_ch_status =</div><div class='del'>-			msg-&gt;u.usbcan.error_event.status_ch1;</div><div class='del'>-		kvaser_usbcan_conditionally_rx_error(dev, &amp;es);</div><div class='del'>-</div><div class='del'>-		/* The USBCAN firmware supports up to 2 channels.</div><div class='del'>-		 * Now that ch0 was checked, check if ch1 has any errors.</div><div class='del'>-		 */</div><div class='del'>-		if (dev-&gt;nchannels == MAX_USBCAN_NET_DEVICES) {</div><div class='del'>-			es.channel = 1;</div><div class='del'>-			es.status = msg-&gt;u.usbcan.error_event.status_ch1;</div><div class='del'>-			es.txerr = msg-&gt;u.usbcan.error_event.tx_errors_count_ch1;</div><div class='del'>-			es.rxerr = msg-&gt;u.usbcan.error_event.rx_errors_count_ch1;</div><div class='del'>-			es.usbcan.other_ch_status =</div><div class='del'>-				msg-&gt;u.usbcan.error_event.status_ch0;</div><div class='del'>-			kvaser_usbcan_conditionally_rx_error(dev, &amp;es);</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		dev_err(dev-&gt;udev-&gt;dev.parent, "Invalid msg id (%d)\n",</div><div class='del'>-			msg-&gt;id);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void kvaser_leaf_rx_error(const struct kvaser_usb *dev,</div><div class='del'>-				 const struct kvaser_msg *msg)</div><div class='del'>-{</div><div class='del'>-	struct kvaser_usb_error_summary es = { };</div><div class='del'>-</div><div class='del'>-	switch (msg-&gt;id) {</div><div class='del'>-	case CMD_CAN_ERROR_EVENT:</div><div class='del'>-		es.channel = msg-&gt;u.leaf.error_event.channel;</div><div class='del'>-		es.status =  msg-&gt;u.leaf.error_event.status;</div><div class='del'>-		es.txerr = msg-&gt;u.leaf.error_event.tx_errors_count;</div><div class='del'>-		es.rxerr = msg-&gt;u.leaf.error_event.rx_errors_count;</div><div class='del'>-		es.leaf.error_factor = msg-&gt;u.leaf.error_event.error_factor;</div><div class='del'>-		break;</div><div class='del'>-	case CMD_LEAF_LOG_MESSAGE:</div><div class='del'>-		es.channel = msg-&gt;u.leaf.log_message.channel;</div><div class='del'>-		es.status = msg-&gt;u.leaf.log_message.data[0];</div><div class='del'>-		es.txerr = msg-&gt;u.leaf.log_message.data[2];</div><div class='del'>-		es.rxerr = msg-&gt;u.leaf.log_message.data[3];</div><div class='del'>-		es.leaf.error_factor = msg-&gt;u.leaf.log_message.data[1];</div><div class='del'>-		break;</div><div class='del'>-	case CMD_CHIP_STATE_EVENT:</div><div class='del'>-		es.channel = msg-&gt;u.leaf.chip_state_event.channel;</div><div class='del'>-		es.status =  msg-&gt;u.leaf.chip_state_event.status;</div><div class='del'>-		es.txerr = msg-&gt;u.leaf.chip_state_event.tx_errors_count;</div><div class='del'>-		es.rxerr = msg-&gt;u.leaf.chip_state_event.rx_errors_count;</div><div class='del'>-		es.leaf.error_factor = 0;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		dev_err(dev-&gt;udev-&gt;dev.parent, "Invalid msg id (%d)\n",</div><div class='del'>-			msg-&gt;id);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	kvaser_usb_rx_error(dev, &amp;es);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void kvaser_usb_rx_can_err(const struct kvaser_usb_net_priv *priv,</div><div class='del'>-				  const struct kvaser_msg *msg)</div><div class='del'>-{</div><div class='del'>-	struct can_frame *cf;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	struct net_device_stats *stats = &amp;priv-&gt;netdev-&gt;stats;</div><div class='del'>-</div><div class='del'>-	if (msg-&gt;u.rx_can_header.flag &amp; (MSG_FLAG_ERROR_FRAME |</div><div class='del'>-					 MSG_FLAG_NERR)) {</div><div class='del'>-		netdev_err(priv-&gt;netdev, "Unknown error (flags: 0x%02x)\n",</div><div class='del'>-			   msg-&gt;u.rx_can_header.flag);</div><div class='del'>-</div><div class='del'>-		stats-&gt;rx_errors++;</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (msg-&gt;u.rx_can_header.flag &amp; MSG_FLAG_OVERRUN) {</div><div class='del'>-		stats-&gt;rx_over_errors++;</div><div class='del'>-		stats-&gt;rx_errors++;</div><div class='del'>-</div><div class='del'>-		skb = alloc_can_err_skb(priv-&gt;netdev, &amp;cf);</div><div class='del'>-		if (!skb) {</div><div class='del'>-			stats-&gt;rx_dropped++;</div><div class='del'>-			return;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='del'>-		cf-&gt;data[1] = CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='del'>-</div><div class='del'>-		stats-&gt;rx_packets++;</div><div class='del'>-		stats-&gt;rx_bytes += cf-&gt;can_dlc;</div><div class='del'>-		netif_rx(skb);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void kvaser_usb_rx_can_msg(const struct kvaser_usb *dev,</div><div class='del'>-				  const struct kvaser_msg *msg)</div><div class='del'>-{</div><div class='del'>-	struct kvaser_usb_net_priv *priv;</div><div class='del'>-	struct can_frame *cf;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	struct net_device_stats *stats;</div><div class='del'>-	u8 channel = msg-&gt;u.rx_can_header.channel;</div><div class='del'>-	const u8 *rx_msg = NULL;	/* GCC */</div><div class='del'>-</div><div class='del'>-	if (channel &gt;= dev-&gt;nchannels) {</div><div class='del'>-		dev_err(dev-&gt;udev-&gt;dev.parent,</div><div class='del'>-			"Invalid channel number (%d)\n", channel);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	priv = dev-&gt;nets[channel];</div><div class='del'>-	stats = &amp;priv-&gt;netdev-&gt;stats;</div><div class='del'>-</div><div class='del'>-	if ((msg-&gt;u.rx_can_header.flag &amp; MSG_FLAG_ERROR_FRAME) &amp;&amp;</div><div class='del'>-	    (dev-&gt;family == KVASER_LEAF &amp;&amp; msg-&gt;id == CMD_LEAF_LOG_MESSAGE)) {</div><div class='del'>-		kvaser_leaf_rx_error(dev, msg);</div><div class='del'>-		return;</div><div class='del'>-	} else if (msg-&gt;u.rx_can_header.flag &amp; (MSG_FLAG_ERROR_FRAME |</div><div class='del'>-						MSG_FLAG_NERR |</div><div class='del'>-						MSG_FLAG_OVERRUN)) {</div><div class='del'>-		kvaser_usb_rx_can_err(priv, msg);</div><div class='del'>-		return;</div><div class='del'>-	} else if (msg-&gt;u.rx_can_header.flag &amp; ~MSG_FLAG_REMOTE_FRAME) {</div><div class='del'>-		netdev_warn(priv-&gt;netdev,</div><div class='del'>-			    "Unhandled frame (flags: 0x%02x)",</div><div class='del'>-			    msg-&gt;u.rx_can_header.flag);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	switch (dev-&gt;family) {</div><div class='del'>-	case KVASER_LEAF:</div><div class='del'>-		rx_msg = msg-&gt;u.leaf.rx_can.msg;</div><div class='del'>-		break;</div><div class='del'>-	case KVASER_USBCAN:</div><div class='del'>-		rx_msg = msg-&gt;u.usbcan.rx_can.msg;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	skb = alloc_can_skb(priv-&gt;netdev, &amp;cf);</div><div class='del'>-	if (!skb) {</div><div class='del'>-		stats-&gt;tx_dropped++;</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (dev-&gt;family == KVASER_LEAF &amp;&amp; msg-&gt;id == CMD_LEAF_LOG_MESSAGE) {</div><div class='del'>-		cf-&gt;can_id = le32_to_cpu(msg-&gt;u.leaf.log_message.id);</div><div class='del'>-		if (cf-&gt;can_id &amp; KVASER_EXTENDED_FRAME)</div><div class='del'>-			cf-&gt;can_id &amp;= CAN_EFF_MASK | CAN_EFF_FLAG;</div><div class='del'>-		else</div><div class='del'>-			cf-&gt;can_id &amp;= CAN_SFF_MASK;</div><div class='del'>-</div><div class='del'>-		cf-&gt;can_dlc = get_can_dlc(msg-&gt;u.leaf.log_message.dlc);</div><div class='del'>-</div><div class='del'>-		if (msg-&gt;u.leaf.log_message.flags &amp; MSG_FLAG_REMOTE_FRAME)</div><div class='del'>-			cf-&gt;can_id |= CAN_RTR_FLAG;</div><div class='del'>-		else</div><div class='del'>-			memcpy(cf-&gt;data, &amp;msg-&gt;u.leaf.log_message.data,</div><div class='del'>-			       cf-&gt;can_dlc);</div><div class='del'>-	} else {</div><div class='del'>-		cf-&gt;can_id = ((rx_msg[0] &amp; 0x1f) &lt;&lt; 6) | (rx_msg[1] &amp; 0x3f);</div><div class='del'>-</div><div class='del'>-		if (msg-&gt;id == CMD_RX_EXT_MESSAGE) {</div><div class='del'>-			cf-&gt;can_id &lt;&lt;= 18;</div><div class='del'>-			cf-&gt;can_id |= ((rx_msg[2] &amp; 0x0f) &lt;&lt; 14) |</div><div class='del'>-				      ((rx_msg[3] &amp; 0xff) &lt;&lt; 6) |</div><div class='del'>-				      (rx_msg[4] &amp; 0x3f);</div><div class='del'>-			cf-&gt;can_id |= CAN_EFF_FLAG;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		cf-&gt;can_dlc = get_can_dlc(rx_msg[5]);</div><div class='del'>-</div><div class='del'>-		if (msg-&gt;u.rx_can_header.flag &amp; MSG_FLAG_REMOTE_FRAME)</div><div class='del'>-			cf-&gt;can_id |= CAN_RTR_FLAG;</div><div class='del'>-		else</div><div class='del'>-			memcpy(cf-&gt;data, &amp;rx_msg[6],</div><div class='del'>-			       cf-&gt;can_dlc);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	stats-&gt;rx_packets++;</div><div class='del'>-	stats-&gt;rx_bytes += cf-&gt;can_dlc;</div><div class='del'>-	netif_rx(skb);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void kvaser_usb_start_chip_reply(const struct kvaser_usb *dev,</div><div class='del'>-					const struct kvaser_msg *msg)</div><div class='del'>-{</div><div class='del'>-	struct kvaser_usb_net_priv *priv;</div><div class='del'>-	u8 channel = msg-&gt;u.simple.channel;</div><div class='del'>-</div><div class='del'>-	if (channel &gt;= dev-&gt;nchannels) {</div><div class='del'>-		dev_err(dev-&gt;udev-&gt;dev.parent,</div><div class='del'>-			"Invalid channel number (%d)\n", channel);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	priv = dev-&gt;nets[channel];</div><div class='del'>-</div><div class='del'>-	if (completion_done(&amp;priv-&gt;start_comp) &amp;&amp;</div><div class='del'>-	    netif_queue_stopped(priv-&gt;netdev)) {</div><div class='del'>-		netif_wake_queue(priv-&gt;netdev);</div><div class='del'>-	} else {</div><div class='del'>-		netif_start_queue(priv-&gt;netdev);</div><div class='del'>-		complete(&amp;priv-&gt;start_comp);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void kvaser_usb_stop_chip_reply(const struct kvaser_usb *dev,</div><div class='del'>-				       const struct kvaser_msg *msg)</div><div class='del'>-{</div><div class='del'>-	struct kvaser_usb_net_priv *priv;</div><div class='del'>-	u8 channel = msg-&gt;u.simple.channel;</div><div class='del'>-</div><div class='del'>-	if (channel &gt;= dev-&gt;nchannels) {</div><div class='del'>-		dev_err(dev-&gt;udev-&gt;dev.parent,</div><div class='del'>-			"Invalid channel number (%d)\n", channel);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	priv = dev-&gt;nets[channel];</div><div class='del'>-</div><div class='del'>-	complete(&amp;priv-&gt;stop_comp);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void kvaser_usb_handle_message(const struct kvaser_usb *dev,</div><div class='del'>-				      const struct kvaser_msg *msg)</div><div class='del'>-{</div><div class='del'>-	switch (msg-&gt;id) {</div><div class='del'>-	case CMD_START_CHIP_REPLY:</div><div class='del'>-		kvaser_usb_start_chip_reply(dev, msg);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case CMD_STOP_CHIP_REPLY:</div><div class='del'>-		kvaser_usb_stop_chip_reply(dev, msg);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case CMD_RX_STD_MESSAGE:</div><div class='del'>-	case CMD_RX_EXT_MESSAGE:</div><div class='del'>-		kvaser_usb_rx_can_msg(dev, msg);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case CMD_LEAF_LOG_MESSAGE:</div><div class='del'>-		if (dev-&gt;family != KVASER_LEAF)</div><div class='del'>-			goto warn;</div><div class='del'>-		kvaser_usb_rx_can_msg(dev, msg);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case CMD_CHIP_STATE_EVENT:</div><div class='del'>-	case CMD_CAN_ERROR_EVENT:</div><div class='del'>-		if (dev-&gt;family == KVASER_LEAF)</div><div class='del'>-			kvaser_leaf_rx_error(dev, msg);</div><div class='del'>-		else</div><div class='del'>-			kvaser_usbcan_rx_error(dev, msg);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case CMD_TX_ACKNOWLEDGE:</div><div class='del'>-		kvaser_usb_tx_acknowledge(dev, msg);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	/* Ignored messages */</div><div class='del'>-	case CMD_USBCAN_CLOCK_OVERFLOW_EVENT:</div><div class='del'>-		if (dev-&gt;family != KVASER_USBCAN)</div><div class='del'>-			goto warn;</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-warn:		dev_warn(dev-&gt;udev-&gt;dev.parent,</div><div class='del'>-			 "Unhandled message (%d)\n", msg-&gt;id);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void kvaser_usb_read_bulk_callback(struct urb *urb)</div><div class='del'>-{</div><div class='del'>-	struct kvaser_usb *dev = urb-&gt;context;</div><div class='del'>-	struct kvaser_msg *msg;</div><div class='del'>-	int pos = 0;</div><div class='del'>-	int err, i;</div><div class='del'>-</div><div class='del'>-	switch (urb-&gt;status) {</div><div class='del'>-	case 0:</div><div class='del'>-		break;</div><div class='del'>-	case -ENOENT:</div><div class='del'>-	case -ESHUTDOWN:</div><div class='del'>-		return;</div><div class='del'>-	default:</div><div class='del'>-		dev_info(dev-&gt;udev-&gt;dev.parent, "Rx URB aborted (%d)\n",</div><div class='del'>-			 urb-&gt;status);</div><div class='del'>-		goto resubmit_urb;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (pos &lt;= urb-&gt;actual_length - MSG_HEADER_LEN) {</div><div class='del'>-		msg = urb-&gt;transfer_buffer + pos;</div><div class='del'>-</div><div class='del'>-		/* The Kvaser firmware can only read and write messages that</div><div class='del'>-		 * does not cross the USB's endpoint wMaxPacketSize boundary.</div><div class='del'>-		 * If a follow-up command crosses such boundary, firmware puts</div><div class='del'>-		 * a placeholder zero-length command in its place then aligns</div><div class='del'>-		 * the real command to the next max packet size.</div><div class='del'>-		 *</div><div class='del'>-		 * Handle such cases or we're going to miss a significant</div><div class='del'>-		 * number of events in case of a heavy rx load on the bus.</div><div class='del'>-		 */</div><div class='del'>-		if (msg-&gt;len == 0) {</div><div class='del'>-			pos = round_up(pos, le16_to_cpu(dev-&gt;bulk_in-&gt;</div><div class='del'>-							wMaxPacketSize));</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (pos + msg-&gt;len &gt; urb-&gt;actual_length) {</div><div class='del'>-			dev_err(dev-&gt;udev-&gt;dev.parent, "Format error\n");</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		kvaser_usb_handle_message(dev, msg);</div><div class='del'>-		pos += msg-&gt;len;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-resubmit_urb:</div><div class='del'>-	usb_fill_bulk_urb(urb, dev-&gt;udev,</div><div class='del'>-			  usb_rcvbulkpipe(dev-&gt;udev,</div><div class='del'>-					  dev-&gt;bulk_in-&gt;bEndpointAddress),</div><div class='del'>-			  urb-&gt;transfer_buffer, RX_BUFFER_SIZE,</div><div class='del'>-			  kvaser_usb_read_bulk_callback, dev);</div><div class='del'>-</div><div class='del'>-	err = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='del'>-	if (err == -ENODEV) {</div><div class='del'>-		for (i = 0; i &lt; dev-&gt;nchannels; i++) {</div><div class='del'>-			if (!dev-&gt;nets[i])</div><div class='del'>-				continue;</div><div class='del'>-</div><div class='del'>-			netif_device_detach(dev-&gt;nets[i]-&gt;netdev);</div><div class='del'>-		}</div><div class='del'>-	} else if (err) {</div><div class='del'>-		dev_err(dev-&gt;udev-&gt;dev.parent,</div><div class='del'>-			"Failed resubmitting read bulk urb: %d\n", err);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int kvaser_usb_setup_rx_urbs(struct kvaser_usb *dev)</div><div class='del'>-{</div><div class='del'>-	int i, err = 0;</div><div class='del'>-</div><div class='del'>-	if (dev-&gt;rxinitdone)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; MAX_RX_URBS; i++) {</div><div class='del'>-		struct urb *urb = NULL;</div><div class='del'>-		u8 *buf = NULL;</div><div class='del'>-		dma_addr_t buf_dma;</div><div class='del'>-</div><div class='del'>-		urb = usb_alloc_urb(0, GFP_KERNEL);</div><div class='del'>-		if (!urb) {</div><div class='del'>-			dev_warn(dev-&gt;udev-&gt;dev.parent,</div><div class='del'>-				 "No memory left for URBs\n");</div><div class='del'>-			err = -ENOMEM;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		buf = usb_alloc_coherent(dev-&gt;udev, RX_BUFFER_SIZE,</div><div class='del'>-					 GFP_KERNEL, &amp;buf_dma);</div><div class='del'>-		if (!buf) {</div><div class='del'>-			dev_warn(dev-&gt;udev-&gt;dev.parent,</div><div class='del'>-				 "No memory left for USB buffer\n");</div><div class='del'>-			usb_free_urb(urb);</div><div class='del'>-			err = -ENOMEM;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		usb_fill_bulk_urb(urb, dev-&gt;udev,</div><div class='del'>-				  usb_rcvbulkpipe(dev-&gt;udev,</div><div class='del'>-					  dev-&gt;bulk_in-&gt;bEndpointAddress),</div><div class='del'>-				  buf, RX_BUFFER_SIZE,</div><div class='del'>-				  kvaser_usb_read_bulk_callback,</div><div class='del'>-				  dev);</div><div class='del'>-		urb-&gt;transfer_dma = buf_dma;</div><div class='del'>-		urb-&gt;transfer_flags |= URB_NO_TRANSFER_DMA_MAP;</div><div class='del'>-		usb_anchor_urb(urb, &amp;dev-&gt;rx_submitted);</div><div class='del'>-</div><div class='del'>-		err = usb_submit_urb(urb, GFP_KERNEL);</div><div class='del'>-		if (err) {</div><div class='del'>-			usb_unanchor_urb(urb);</div><div class='del'>-			usb_free_coherent(dev-&gt;udev, RX_BUFFER_SIZE, buf,</div><div class='del'>-					  buf_dma);</div><div class='del'>-			usb_free_urb(urb);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		dev-&gt;rxbuf[i] = buf;</div><div class='del'>-		dev-&gt;rxbuf_dma[i] = buf_dma;</div><div class='del'>-</div><div class='del'>-		usb_free_urb(urb);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (i == 0) {</div><div class='del'>-		dev_warn(dev-&gt;udev-&gt;dev.parent,</div><div class='del'>-			 "Cannot setup read URBs, error %d\n", err);</div><div class='del'>-		return err;</div><div class='del'>-	} else if (i &lt; MAX_RX_URBS) {</div><div class='del'>-		dev_warn(dev-&gt;udev-&gt;dev.parent,</div><div class='del'>-			 "RX performances may be slow\n");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev-&gt;rxinitdone = true;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int kvaser_usb_set_opt_mode(const struct kvaser_usb_net_priv *priv)</div><div class='del'>-{</div><div class='del'>-	struct kvaser_msg *msg;</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	msg = kmalloc(sizeof(*msg), GFP_KERNEL);</div><div class='del'>-	if (!msg)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	msg-&gt;id = CMD_SET_CTRL_MODE;</div><div class='del'>-	msg-&gt;len = MSG_HEADER_LEN + sizeof(struct kvaser_msg_ctrl_mode);</div><div class='del'>-	msg-&gt;u.ctrl_mode.tid = 0xff;</div><div class='del'>-	msg-&gt;u.ctrl_mode.channel = priv-&gt;channel;</div><div class='del'>-</div><div class='del'>-	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LISTENONLY)</div><div class='del'>-		msg-&gt;u.ctrl_mode.ctrl_mode = KVASER_CTRL_MODE_SILENT;</div><div class='del'>-	else</div><div class='del'>-		msg-&gt;u.ctrl_mode.ctrl_mode = KVASER_CTRL_MODE_NORMAL;</div><div class='del'>-</div><div class='del'>-	rc = kvaser_usb_send_msg(priv-&gt;dev, msg);</div><div class='del'>-</div><div class='del'>-	kfree(msg);</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int kvaser_usb_start_chip(struct kvaser_usb_net_priv *priv)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	init_completion(&amp;priv-&gt;start_comp);</div><div class='del'>-</div><div class='del'>-	err = kvaser_usb_send_simple_msg(priv-&gt;dev, CMD_START_CHIP,</div><div class='del'>-					 priv-&gt;channel);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	if (!wait_for_completion_timeout(&amp;priv-&gt;start_comp,</div><div class='del'>-					 msecs_to_jiffies(START_TIMEOUT)))</div><div class='del'>-		return -ETIMEDOUT;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int kvaser_usb_open(struct net_device *netdev)</div><div class='del'>-{</div><div class='del'>-	struct kvaser_usb_net_priv *priv = netdev_priv(netdev);</div><div class='del'>-	struct kvaser_usb *dev = priv-&gt;dev;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = open_candev(netdev);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	err = kvaser_usb_setup_rx_urbs(dev);</div><div class='del'>-	if (err)</div><div class='del'>-		goto error;</div><div class='del'>-</div><div class='del'>-	err = kvaser_usb_set_opt_mode(priv);</div><div class='del'>-	if (err)</div><div class='del'>-		goto error;</div><div class='del'>-</div><div class='del'>-	err = kvaser_usb_start_chip(priv);</div><div class='del'>-	if (err) {</div><div class='del'>-		netdev_warn(netdev, "Cannot start device, error %d\n", err);</div><div class='del'>-		goto error;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-error:</div><div class='del'>-	close_candev(netdev);</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void kvaser_usb_reset_tx_urb_contexts(struct kvaser_usb_net_priv *priv)</div><div class='del'>-{</div><div class='del'>-	int i, max_tx_urbs;</div><div class='del'>-</div><div class='del'>-	max_tx_urbs = priv-&gt;dev-&gt;max_tx_urbs;</div><div class='del'>-</div><div class='del'>-	priv-&gt;active_tx_contexts = 0;</div><div class='del'>-	for (i = 0; i &lt; max_tx_urbs; i++)</div><div class='del'>-		priv-&gt;tx_contexts[i].echo_index = max_tx_urbs;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* This method might sleep. Do not call it in the atomic context</div><div class='del'>- * of URB completions.</div><div class='del'>- */</div><div class='del'>-static void kvaser_usb_unlink_tx_urbs(struct kvaser_usb_net_priv *priv)</div><div class='del'>-{</div><div class='del'>-	usb_kill_anchored_urbs(&amp;priv-&gt;tx_submitted);</div><div class='del'>-	kvaser_usb_reset_tx_urb_contexts(priv);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void kvaser_usb_unlink_all_urbs(struct kvaser_usb *dev)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	usb_kill_anchored_urbs(&amp;dev-&gt;rx_submitted);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; MAX_RX_URBS; i++)</div><div class='del'>-		usb_free_coherent(dev-&gt;udev, RX_BUFFER_SIZE,</div><div class='del'>-				  dev-&gt;rxbuf[i],</div><div class='del'>-				  dev-&gt;rxbuf_dma[i]);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; dev-&gt;nchannels; i++) {</div><div class='del'>-		struct kvaser_usb_net_priv *priv = dev-&gt;nets[i];</div><div class='del'>-</div><div class='del'>-		if (priv)</div><div class='del'>-			kvaser_usb_unlink_tx_urbs(priv);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int kvaser_usb_stop_chip(struct kvaser_usb_net_priv *priv)</div><div class='del'>-{</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	init_completion(&amp;priv-&gt;stop_comp);</div><div class='del'>-</div><div class='del'>-	err = kvaser_usb_send_simple_msg(priv-&gt;dev, CMD_STOP_CHIP,</div><div class='del'>-					 priv-&gt;channel);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	if (!wait_for_completion_timeout(&amp;priv-&gt;stop_comp,</div><div class='del'>-					 msecs_to_jiffies(STOP_TIMEOUT)))</div><div class='del'>-		return -ETIMEDOUT;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int kvaser_usb_flush_queue(struct kvaser_usb_net_priv *priv)</div><div class='del'>-{</div><div class='del'>-	struct kvaser_msg *msg;</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	msg = kmalloc(sizeof(*msg), GFP_KERNEL);</div><div class='del'>-	if (!msg)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	msg-&gt;id = CMD_FLUSH_QUEUE;</div><div class='del'>-	msg-&gt;len = MSG_HEADER_LEN + sizeof(struct kvaser_msg_flush_queue);</div><div class='del'>-	msg-&gt;u.flush_queue.channel = priv-&gt;channel;</div><div class='del'>-	msg-&gt;u.flush_queue.flags = 0x00;</div><div class='del'>-</div><div class='del'>-	rc = kvaser_usb_send_msg(priv-&gt;dev, msg);</div><div class='del'>-</div><div class='del'>-	kfree(msg);</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int kvaser_usb_close(struct net_device *netdev)</div><div class='del'>-{</div><div class='del'>-	struct kvaser_usb_net_priv *priv = netdev_priv(netdev);</div><div class='del'>-	struct kvaser_usb *dev = priv-&gt;dev;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	netif_stop_queue(netdev);</div><div class='del'>-</div><div class='del'>-	err = kvaser_usb_flush_queue(priv);</div><div class='del'>-	if (err)</div><div class='del'>-		netdev_warn(netdev, "Cannot flush queue, error %d\n", err);</div><div class='del'>-</div><div class='del'>-	if (kvaser_usb_send_simple_msg(dev, CMD_RESET_CHIP, priv-&gt;channel))</div><div class='del'>-		netdev_warn(netdev, "Cannot reset card, error %d\n", err);</div><div class='del'>-</div><div class='del'>-	err = kvaser_usb_stop_chip(priv);</div><div class='del'>-	if (err)</div><div class='del'>-		netdev_warn(netdev, "Cannot stop device, error %d\n", err);</div><div class='del'>-</div><div class='del'>-	/* reset tx contexts */</div><div class='del'>-	kvaser_usb_unlink_tx_urbs(priv);</div><div class='del'>-</div><div class='del'>-	priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='del'>-	close_candev(priv-&gt;netdev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void kvaser_usb_write_bulk_callback(struct urb *urb)</div><div class='del'>-{</div><div class='del'>-	struct kvaser_usb_tx_urb_context *context = urb-&gt;context;</div><div class='del'>-	struct kvaser_usb_net_priv *priv;</div><div class='del'>-	struct net_device *netdev;</div><div class='del'>-</div><div class='del'>-	if (WARN_ON(!context))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	priv = context-&gt;priv;</div><div class='del'>-	netdev = priv-&gt;netdev;</div><div class='del'>-</div><div class='del'>-	kfree(urb-&gt;transfer_buffer);</div><div class='del'>-</div><div class='del'>-	if (!netif_device_present(netdev))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	if (urb-&gt;status)</div><div class='del'>-		netdev_info(netdev, "Tx URB aborted (%d)\n", urb-&gt;status);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static netdev_tx_t kvaser_usb_start_xmit(struct sk_buff *skb,</div><div class='del'>-					 struct net_device *netdev)</div><div class='del'>-{</div><div class='del'>-	struct kvaser_usb_net_priv *priv = netdev_priv(netdev);</div><div class='del'>-	struct kvaser_usb *dev = priv-&gt;dev;</div><div class='del'>-	struct net_device_stats *stats = &amp;netdev-&gt;stats;</div><div class='del'>-	struct can_frame *cf = (struct can_frame *)skb-&gt;data;</div><div class='del'>-	struct kvaser_usb_tx_urb_context *context = NULL;</div><div class='del'>-	struct urb *urb;</div><div class='del'>-	void *buf;</div><div class='del'>-	struct kvaser_msg *msg;</div><div class='del'>-	int i, err, ret = NETDEV_TX_OK;</div><div class='del'>-	u8 *msg_tx_can_flags = NULL;		/* GCC */</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	if (can_dropped_invalid_skb(netdev, skb))</div><div class='del'>-		return NETDEV_TX_OK;</div><div class='del'>-</div><div class='del'>-	urb = usb_alloc_urb(0, GFP_ATOMIC);</div><div class='del'>-	if (!urb) {</div><div class='del'>-		netdev_err(netdev, "No memory left for URBs\n");</div><div class='del'>-		stats-&gt;tx_dropped++;</div><div class='del'>-		dev_kfree_skb(skb);</div><div class='del'>-		return NETDEV_TX_OK;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	buf = kmalloc(sizeof(struct kvaser_msg), GFP_ATOMIC);</div><div class='del'>-	if (!buf) {</div><div class='del'>-		stats-&gt;tx_dropped++;</div><div class='del'>-		dev_kfree_skb(skb);</div><div class='del'>-		goto freeurb;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	msg = buf;</div><div class='del'>-	msg-&gt;len = MSG_HEADER_LEN + sizeof(struct kvaser_msg_tx_can);</div><div class='del'>-	msg-&gt;u.tx_can.channel = priv-&gt;channel;</div><div class='del'>-</div><div class='del'>-	switch (dev-&gt;family) {</div><div class='del'>-	case KVASER_LEAF:</div><div class='del'>-		msg_tx_can_flags = &amp;msg-&gt;u.tx_can.leaf.flags;</div><div class='del'>-		break;</div><div class='del'>-	case KVASER_USBCAN:</div><div class='del'>-		msg_tx_can_flags = &amp;msg-&gt;u.tx_can.usbcan.flags;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	*msg_tx_can_flags = 0;</div><div class='del'>-</div><div class='del'>-	if (cf-&gt;can_id &amp; CAN_EFF_FLAG) {</div><div class='del'>-		msg-&gt;id = CMD_TX_EXT_MESSAGE;</div><div class='del'>-		msg-&gt;u.tx_can.msg[0] = (cf-&gt;can_id &gt;&gt; 24) &amp; 0x1f;</div><div class='del'>-		msg-&gt;u.tx_can.msg[1] = (cf-&gt;can_id &gt;&gt; 18) &amp; 0x3f;</div><div class='del'>-		msg-&gt;u.tx_can.msg[2] = (cf-&gt;can_id &gt;&gt; 14) &amp; 0x0f;</div><div class='del'>-		msg-&gt;u.tx_can.msg[3] = (cf-&gt;can_id &gt;&gt; 6) &amp; 0xff;</div><div class='del'>-		msg-&gt;u.tx_can.msg[4] = cf-&gt;can_id &amp; 0x3f;</div><div class='del'>-	} else {</div><div class='del'>-		msg-&gt;id = CMD_TX_STD_MESSAGE;</div><div class='del'>-		msg-&gt;u.tx_can.msg[0] = (cf-&gt;can_id &gt;&gt; 6) &amp; 0x1f;</div><div class='del'>-		msg-&gt;u.tx_can.msg[1] = cf-&gt;can_id &amp; 0x3f;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	msg-&gt;u.tx_can.msg[5] = cf-&gt;can_dlc;</div><div class='del'>-	memcpy(&amp;msg-&gt;u.tx_can.msg[6], cf-&gt;data, cf-&gt;can_dlc);</div><div class='del'>-</div><div class='del'>-	if (cf-&gt;can_id &amp; CAN_RTR_FLAG)</div><div class='del'>-		*msg_tx_can_flags |= MSG_FLAG_REMOTE_FRAME;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;priv-&gt;tx_contexts_lock, flags);</div><div class='del'>-	for (i = 0; i &lt; dev-&gt;max_tx_urbs; i++) {</div><div class='del'>-		if (priv-&gt;tx_contexts[i].echo_index == dev-&gt;max_tx_urbs) {</div><div class='del'>-			context = &amp;priv-&gt;tx_contexts[i];</div><div class='del'>-</div><div class='del'>-			context-&gt;echo_index = i;</div><div class='del'>-			can_put_echo_skb(skb, netdev, context-&gt;echo_index);</div><div class='del'>-			++priv-&gt;active_tx_contexts;</div><div class='del'>-			if (priv-&gt;active_tx_contexts &gt;= dev-&gt;max_tx_urbs)</div><div class='del'>-				netif_stop_queue(netdev);</div><div class='del'>-</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	spin_unlock_irqrestore(&amp;priv-&gt;tx_contexts_lock, flags);</div><div class='del'>-</div><div class='del'>-	/* This should never happen; it implies a flow control bug */</div><div class='del'>-	if (!context) {</div><div class='del'>-		netdev_warn(netdev, "cannot find free context\n");</div><div class='del'>-</div><div class='del'>-		kfree(buf);</div><div class='del'>-		ret =  NETDEV_TX_BUSY;</div><div class='del'>-		goto freeurb;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	context-&gt;priv = priv;</div><div class='del'>-	context-&gt;dlc = cf-&gt;can_dlc;</div><div class='del'>-</div><div class='del'>-	msg-&gt;u.tx_can.tid = context-&gt;echo_index;</div><div class='del'>-</div><div class='del'>-	usb_fill_bulk_urb(urb, dev-&gt;udev,</div><div class='del'>-			  usb_sndbulkpipe(dev-&gt;udev,</div><div class='del'>-					  dev-&gt;bulk_out-&gt;bEndpointAddress),</div><div class='del'>-			  buf, msg-&gt;len,</div><div class='del'>-			  kvaser_usb_write_bulk_callback, context);</div><div class='del'>-	usb_anchor_urb(urb, &amp;priv-&gt;tx_submitted);</div><div class='del'>-</div><div class='del'>-	err = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='del'>-	if (unlikely(err)) {</div><div class='del'>-		spin_lock_irqsave(&amp;priv-&gt;tx_contexts_lock, flags);</div><div class='del'>-</div><div class='del'>-		can_free_echo_skb(netdev, context-&gt;echo_index);</div><div class='del'>-		context-&gt;echo_index = dev-&gt;max_tx_urbs;</div><div class='del'>-		--priv-&gt;active_tx_contexts;</div><div class='del'>-		netif_wake_queue(netdev);</div><div class='del'>-</div><div class='del'>-		spin_unlock_irqrestore(&amp;priv-&gt;tx_contexts_lock, flags);</div><div class='del'>-</div><div class='del'>-		usb_unanchor_urb(urb);</div><div class='del'>-</div><div class='del'>-		stats-&gt;tx_dropped++;</div><div class='del'>-</div><div class='del'>-		if (err == -ENODEV)</div><div class='del'>-			netif_device_detach(netdev);</div><div class='del'>-		else</div><div class='del'>-			netdev_warn(netdev, "Failed tx_urb %d\n", err);</div><div class='del'>-</div><div class='del'>-		goto freeurb;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = NETDEV_TX_OK;</div><div class='del'>-</div><div class='del'>-freeurb:</div><div class='del'>-	usb_free_urb(urb);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct net_device_ops kvaser_usb_netdev_ops = {</div><div class='del'>-	.ndo_open = kvaser_usb_open,</div><div class='del'>-	.ndo_stop = kvaser_usb_close,</div><div class='del'>-	.ndo_start_xmit = kvaser_usb_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const struct can_bittiming_const kvaser_usb_bittiming_const = {</div><div class='del'>-	.name = "kvaser_usb",</div><div class='del'>-	.tseg1_min = KVASER_USB_TSEG1_MIN,</div><div class='del'>-	.tseg1_max = KVASER_USB_TSEG1_MAX,</div><div class='del'>-	.tseg2_min = KVASER_USB_TSEG2_MIN,</div><div class='del'>-	.tseg2_max = KVASER_USB_TSEG2_MAX,</div><div class='del'>-	.sjw_max = KVASER_USB_SJW_MAX,</div><div class='del'>-	.brp_min = KVASER_USB_BRP_MIN,</div><div class='del'>-	.brp_max = KVASER_USB_BRP_MAX,</div><div class='del'>-	.brp_inc = KVASER_USB_BRP_INC,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int kvaser_usb_set_bittiming(struct net_device *netdev)</div><div class='del'>-{</div><div class='del'>-	struct kvaser_usb_net_priv *priv = netdev_priv(netdev);</div><div class='del'>-	struct can_bittiming *bt = &amp;priv-&gt;can.bittiming;</div><div class='del'>-	struct kvaser_usb *dev = priv-&gt;dev;</div><div class='del'>-	struct kvaser_msg *msg;</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	msg = kmalloc(sizeof(*msg), GFP_KERNEL);</div><div class='del'>-	if (!msg)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	msg-&gt;id = CMD_SET_BUS_PARAMS;</div><div class='del'>-	msg-&gt;len = MSG_HEADER_LEN + sizeof(struct kvaser_msg_busparams);</div><div class='del'>-	msg-&gt;u.busparams.channel = priv-&gt;channel;</div><div class='del'>-	msg-&gt;u.busparams.tid = 0xff;</div><div class='del'>-	msg-&gt;u.busparams.bitrate = cpu_to_le32(bt-&gt;bitrate);</div><div class='del'>-	msg-&gt;u.busparams.sjw = bt-&gt;sjw;</div><div class='del'>-	msg-&gt;u.busparams.tseg1 = bt-&gt;prop_seg + bt-&gt;phase_seg1;</div><div class='del'>-	msg-&gt;u.busparams.tseg2 = bt-&gt;phase_seg2;</div><div class='del'>-</div><div class='del'>-	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_3_SAMPLES)</div><div class='del'>-		msg-&gt;u.busparams.no_samp = 3;</div><div class='del'>-	else</div><div class='del'>-		msg-&gt;u.busparams.no_samp = 1;</div><div class='del'>-</div><div class='del'>-	rc = kvaser_usb_send_msg(dev, msg);</div><div class='del'>-</div><div class='del'>-	kfree(msg);</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int kvaser_usb_set_mode(struct net_device *netdev,</div><div class='del'>-			       enum can_mode mode)</div><div class='del'>-{</div><div class='del'>-	struct kvaser_usb_net_priv *priv = netdev_priv(netdev);</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	switch (mode) {</div><div class='del'>-	case CAN_MODE_START:</div><div class='del'>-		err = kvaser_usb_simple_msg_async(priv, CMD_START_CHIP);</div><div class='del'>-		if (err)</div><div class='del'>-			return err;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int kvaser_usb_get_berr_counter(const struct net_device *netdev,</div><div class='del'>-				       struct can_berr_counter *bec)</div><div class='del'>-{</div><div class='del'>-	struct kvaser_usb_net_priv *priv = netdev_priv(netdev);</div><div class='del'>-</div><div class='del'>-	*bec = priv-&gt;bec;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void kvaser_usb_remove_interfaces(struct kvaser_usb *dev)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; dev-&gt;nchannels; i++) {</div><div class='del'>-		if (!dev-&gt;nets[i])</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		unregister_candev(dev-&gt;nets[i]-&gt;netdev);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	kvaser_usb_unlink_all_urbs(dev);</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; dev-&gt;nchannels; i++) {</div><div class='del'>-		if (!dev-&gt;nets[i])</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		free_candev(dev-&gt;nets[i]-&gt;netdev);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int kvaser_usb_init_one(struct usb_interface *intf,</div><div class='del'>-			       const struct usb_device_id *id, int channel)</div><div class='del'>-{</div><div class='del'>-	struct kvaser_usb *dev = usb_get_intfdata(intf);</div><div class='del'>-	struct net_device *netdev;</div><div class='del'>-	struct kvaser_usb_net_priv *priv;</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	err = kvaser_usb_send_simple_msg(dev, CMD_RESET_CHIP, channel);</div><div class='del'>-	if (err)</div><div class='del'>-		return err;</div><div class='del'>-</div><div class='del'>-	netdev = alloc_candev(sizeof(*priv) +</div><div class='del'>-			      dev-&gt;max_tx_urbs * sizeof(*priv-&gt;tx_contexts),</div><div class='del'>-			      dev-&gt;max_tx_urbs);</div><div class='del'>-	if (!netdev) {</div><div class='del'>-		dev_err(&amp;intf-&gt;dev, "Cannot alloc candev\n");</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	priv = netdev_priv(netdev);</div><div class='del'>-</div><div class='del'>-	init_usb_anchor(&amp;priv-&gt;tx_submitted);</div><div class='del'>-	init_completion(&amp;priv-&gt;start_comp);</div><div class='del'>-	init_completion(&amp;priv-&gt;stop_comp);</div><div class='del'>-</div><div class='del'>-	priv-&gt;dev = dev;</div><div class='del'>-	priv-&gt;netdev = netdev;</div><div class='del'>-	priv-&gt;channel = channel;</div><div class='del'>-</div><div class='del'>-	spin_lock_init(&amp;priv-&gt;tx_contexts_lock);</div><div class='del'>-	kvaser_usb_reset_tx_urb_contexts(priv);</div><div class='del'>-</div><div class='del'>-	priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='del'>-	priv-&gt;can.clock.freq = CAN_USB_CLOCK;</div><div class='del'>-	priv-&gt;can.bittiming_const = &amp;kvaser_usb_bittiming_const;</div><div class='del'>-	priv-&gt;can.do_set_bittiming = kvaser_usb_set_bittiming;</div><div class='del'>-	priv-&gt;can.do_set_mode = kvaser_usb_set_mode;</div><div class='del'>-	if (id-&gt;driver_info &amp; KVASER_HAS_TXRX_ERRORS)</div><div class='del'>-		priv-&gt;can.do_get_berr_counter = kvaser_usb_get_berr_counter;</div><div class='del'>-	priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES;</div><div class='del'>-	if (id-&gt;driver_info &amp; KVASER_HAS_SILENT_MODE)</div><div class='del'>-		priv-&gt;can.ctrlmode_supported |= CAN_CTRLMODE_LISTENONLY;</div><div class='del'>-</div><div class='del'>-	netdev-&gt;flags |= IFF_ECHO;</div><div class='del'>-</div><div class='del'>-	netdev-&gt;netdev_ops = &amp;kvaser_usb_netdev_ops;</div><div class='del'>-</div><div class='del'>-	SET_NETDEV_DEV(netdev, &amp;intf-&gt;dev);</div><div class='del'>-	netdev-&gt;dev_id = channel;</div><div class='del'>-</div><div class='del'>-	dev-&gt;nets[channel] = priv;</div><div class='del'>-</div><div class='del'>-	err = register_candev(netdev);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(&amp;intf-&gt;dev, "Failed to register can device\n");</div><div class='del'>-		free_candev(netdev);</div><div class='del'>-		dev-&gt;nets[channel] = NULL;</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	netdev_dbg(netdev, "device registered\n");</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int kvaser_usb_get_endpoints(const struct usb_interface *intf,</div><div class='del'>-				    struct usb_endpoint_descriptor **in,</div><div class='del'>-				    struct usb_endpoint_descriptor **out)</div><div class='del'>-{</div><div class='del'>-	const struct usb_host_interface *iface_desc;</div><div class='del'>-	struct usb_endpoint_descriptor *endpoint;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	iface_desc = &amp;intf-&gt;altsetting[0];</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; iface_desc-&gt;desc.bNumEndpoints; ++i) {</div><div class='del'>-		endpoint = &amp;iface_desc-&gt;endpoint[i].desc;</div><div class='del'>-</div><div class='del'>-		if (!*in &amp;&amp; usb_endpoint_is_bulk_in(endpoint))</div><div class='del'>-			*in = endpoint;</div><div class='del'>-</div><div class='del'>-		if (!*out &amp;&amp; usb_endpoint_is_bulk_out(endpoint))</div><div class='del'>-			*out = endpoint;</div><div class='del'>-</div><div class='del'>-		/* use first bulk endpoint for in and out */</div><div class='del'>-		if (*in &amp;&amp; *out)</div><div class='del'>-			return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return -ENODEV;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int kvaser_usb_probe(struct usb_interface *intf,</div><div class='del'>-			    const struct usb_device_id *id)</div><div class='del'>-{</div><div class='del'>-	struct kvaser_usb *dev;</div><div class='del'>-	int err = -ENOMEM;</div><div class='del'>-	int i, retry = 3;</div><div class='del'>-</div><div class='del'>-	dev = devm_kzalloc(&amp;intf-&gt;dev, sizeof(*dev), GFP_KERNEL);</div><div class='del'>-	if (!dev)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	if (kvaser_is_leaf(id)) {</div><div class='del'>-		dev-&gt;family = KVASER_LEAF;</div><div class='del'>-	} else if (kvaser_is_usbcan(id)) {</div><div class='del'>-		dev-&gt;family = KVASER_USBCAN;</div><div class='del'>-	} else {</div><div class='del'>-		dev_err(&amp;intf-&gt;dev,</div><div class='del'>-			"Product ID (%d) does not belong to any known Kvaser USB family",</div><div class='del'>-			id-&gt;idProduct);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	err = kvaser_usb_get_endpoints(intf, &amp;dev-&gt;bulk_in, &amp;dev-&gt;bulk_out);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(&amp;intf-&gt;dev, "Cannot get usb endpoint(s)");</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev-&gt;udev = interface_to_usbdev(intf);</div><div class='del'>-</div><div class='del'>-	init_usb_anchor(&amp;dev-&gt;rx_submitted);</div><div class='del'>-</div><div class='del'>-	usb_set_intfdata(intf, dev);</div><div class='del'>-</div><div class='del'>-	/* On some x86 laptops, plugging a Kvaser device again after</div><div class='del'>-	 * an unplug makes the firmware always ignore the very first</div><div class='del'>-	 * command. For such a case, provide some room for retries</div><div class='del'>-	 * instead of completely exiting the driver.</div><div class='del'>-	 */</div><div class='del'>-	do {</div><div class='del'>-		err = kvaser_usb_get_software_info(dev);</div><div class='del'>-	} while (--retry &amp;&amp; err == -ETIMEDOUT);</div><div class='del'>-</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(&amp;intf-&gt;dev,</div><div class='del'>-			"Cannot get software infos, error %d\n", err);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev_dbg(&amp;intf-&gt;dev, "Firmware version: %d.%d.%d\n",</div><div class='del'>-		((dev-&gt;fw_version &gt;&gt; 24) &amp; 0xff),</div><div class='del'>-		((dev-&gt;fw_version &gt;&gt; 16) &amp; 0xff),</div><div class='del'>-		(dev-&gt;fw_version &amp; 0xffff));</div><div class='del'>-</div><div class='del'>-	dev_dbg(&amp;intf-&gt;dev, "Max oustanding tx = %d URBs\n", dev-&gt;max_tx_urbs);</div><div class='del'>-</div><div class='del'>-	err = kvaser_usb_get_card_info(dev);</div><div class='del'>-	if (err) {</div><div class='del'>-		dev_err(&amp;intf-&gt;dev,</div><div class='del'>-			"Cannot get card infos, error %d\n", err);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; dev-&gt;nchannels; i++) {</div><div class='del'>-		err = kvaser_usb_init_one(intf, id, i);</div><div class='del'>-		if (err) {</div><div class='del'>-			kvaser_usb_remove_interfaces(dev);</div><div class='del'>-			return err;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void kvaser_usb_disconnect(struct usb_interface *intf)</div><div class='del'>-{</div><div class='del'>-	struct kvaser_usb *dev = usb_get_intfdata(intf);</div><div class='del'>-</div><div class='del'>-	usb_set_intfdata(intf, NULL);</div><div class='del'>-</div><div class='del'>-	if (!dev)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	kvaser_usb_remove_interfaces(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct usb_driver kvaser_usb_driver = {</div><div class='del'>-	.name = "kvaser_usb",</div><div class='del'>-	.probe = kvaser_usb_probe,</div><div class='del'>-	.disconnect = kvaser_usb_disconnect,</div><div class='del'>-	.id_table = kvaser_usb_table,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-module_usb_driver(kvaser_usb_driver);</div><div class='del'>-</div><div class='del'>-MODULE_AUTHOR("Olivier Sobrie &lt;olivier@sobrie.be&gt;");</div><div class='del'>-MODULE_DESCRIPTION("CAN driver for Kvaser CAN/USB devices");</div><div class='del'>-MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/net/can/usb/kvaser_usb/Makefile b/drivers/net/can/usb/kvaser_usb/Makefile<br/>new file mode 100644<br/>index 000000000000..41b4a11555aa<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/kvaser_usb/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/kvaser_usb/Makefile</a></div><div class='hunk'>@@ -0,0 +1,3 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+obj-$(CONFIG_CAN_KVASER_USB) += kvaser_usb.o</div><div class='add'>+kvaser_usb-y = kvaser_usb_core.o kvaser_usb_devlink.o kvaser_usb_leaf.o kvaser_usb_hydra.o</div><div class='head'>diff --git a/drivers/net/can/usb/kvaser_usb/kvaser_usb.h b/drivers/net/can/usb/kvaser_usb/kvaser_usb.h<br/>new file mode 100644<br/>index 000000000000..46a1b6907a50<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/kvaser_usb/kvaser_usb.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/kvaser_usb/kvaser_usb.h</a></div><div class='hunk'>@@ -0,0 +1,272 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Parts of this driver are based on the following:</div><div class='add'>+ *  - Kvaser linux leaf driver (version 4.78)</div><div class='add'>+ *  - CAN driver for esd CAN-USB/2</div><div class='add'>+ *  - Kvaser linux usbcanII driver (version 5.3)</div><div class='add'>+ *  - Kvaser linux mhydra driver (version 5.24)</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2002-2018 KVASER AB, Sweden. All rights reserved.</div><div class='add'>+ * Copyright (C) 2010 Matthias Fuchs &lt;matthias.fuchs@esd.eu&gt;, esd gmbh</div><div class='add'>+ * Copyright (C) 2012 Olivier Sobrie &lt;olivier@sobrie.be&gt;</div><div class='add'>+ * Copyright (C) 2015 Valeo S.A.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef KVASER_USB_H</div><div class='add'>+#define KVASER_USB_H</div><div class='add'>+</div><div class='add'>+/* Kvaser USB CAN dongles are divided into three major platforms:</div><div class='add'>+ * - Hydra: Running firmware labeled as 'mhydra'</div><div class='add'>+ * - Leaf: Based on Renesas M32C or Freescale i.MX28, running firmware labeled</div><div class='add'>+ *         as 'filo'</div><div class='add'>+ * - UsbcanII: Based on Renesas M16C, running firmware labeled as 'helios'</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/completion.h&gt;</div><div class='add'>+#include &lt;linux/ktime.h&gt;</div><div class='add'>+#include &lt;linux/math64.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/usb.h&gt;</div><div class='add'>+#include &lt;net/devlink.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/can.h&gt;</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+</div><div class='add'>+#define KVASER_USB_MAX_RX_URBS			4</div><div class='add'>+#define KVASER_USB_MAX_TX_URBS			128</div><div class='add'>+#define KVASER_USB_TIMEOUT			1000 /* msecs */</div><div class='add'>+#define KVASER_USB_RX_BUFFER_SIZE		3072</div><div class='add'>+#define KVASER_USB_MAX_NET_DEVICES		5</div><div class='add'>+</div><div class='add'>+/* Kvaser USB device quirks */</div><div class='add'>+#define KVASER_USB_QUIRK_HAS_SILENT_MODE	BIT(0)</div><div class='add'>+#define KVASER_USB_QUIRK_HAS_TXRX_ERRORS	BIT(1)</div><div class='add'>+#define KVASER_USB_QUIRK_IGNORE_CLK_FREQ	BIT(2)</div><div class='add'>+</div><div class='add'>+/* Device capabilities */</div><div class='add'>+#define KVASER_USB_CAP_BERR_CAP			0x01</div><div class='add'>+#define KVASER_USB_CAP_EXT_CAP			0x02</div><div class='add'>+#define KVASER_USB_HYDRA_CAP_EXT_CMD		0x04</div><div class='add'>+</div><div class='add'>+#define KVASER_USB_SW_VERSION_MAJOR_MASK GENMASK(31, 24)</div><div class='add'>+#define KVASER_USB_SW_VERSION_MINOR_MASK GENMASK(23, 16)</div><div class='add'>+#define KVASER_USB_SW_VERSION_BUILD_MASK GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+struct kvaser_usb_dev_cfg;</div><div class='add'>+</div><div class='add'>+enum kvaser_usb_leaf_family {</div><div class='add'>+	KVASER_LEAF,</div><div class='add'>+	KVASER_USBCAN,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum kvaser_usb_led_state {</div><div class='add'>+	KVASER_USB_LED_ON = 0,</div><div class='add'>+	KVASER_USB_LED_OFF = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define KVASER_USB_HYDRA_MAX_CMD_LEN		128</div><div class='add'>+struct kvaser_usb_dev_card_data_hydra {</div><div class='add'>+	u8 channel_to_he[KVASER_USB_MAX_NET_DEVICES];</div><div class='add'>+	u8 sysdbg_he;</div><div class='add'>+	spinlock_t transid_lock; /* lock for transid */</div><div class='add'>+	u16 transid;</div><div class='add'>+	/* lock for usb_rx_leftover and usb_rx_leftover_len */</div><div class='add'>+	spinlock_t usb_rx_leftover_lock;</div><div class='add'>+	u8 usb_rx_leftover[KVASER_USB_HYDRA_MAX_CMD_LEN];</div><div class='add'>+	u8 usb_rx_leftover_len;</div><div class='add'>+};</div><div class='add'>+struct kvaser_usb_dev_card_data {</div><div class='add'>+	u32 ctrlmode_supported;</div><div class='add'>+	u32 capabilities;</div><div class='add'>+	struct kvaser_usb_dev_card_data_hydra hydra;</div><div class='add'>+	u32 usbcan_timestamp_msb;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Context for an outstanding, not yet ACKed, transmission */</div><div class='add'>+struct kvaser_usb_tx_urb_context {</div><div class='add'>+	struct kvaser_usb_net_priv *priv;</div><div class='add'>+	u32 echo_index;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct kvaser_usb_fw_version {</div><div class='add'>+	u8 major;</div><div class='add'>+	u8 minor;</div><div class='add'>+	u16 build;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct kvaser_usb_busparams {</div><div class='add'>+	__le32 bitrate;</div><div class='add'>+	u8 tseg1;</div><div class='add'>+	u8 tseg2;</div><div class='add'>+	u8 sjw;</div><div class='add'>+	u8 nsamples;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct kvaser_usb {</div><div class='add'>+	struct usb_device *udev;</div><div class='add'>+	struct usb_interface *intf;</div><div class='add'>+	struct kvaser_usb_net_priv *nets[KVASER_USB_MAX_NET_DEVICES];</div><div class='add'>+	const struct kvaser_usb_driver_info *driver_info;</div><div class='add'>+	const struct kvaser_usb_dev_cfg *cfg;</div><div class='add'>+</div><div class='add'>+	struct usb_endpoint_descriptor *bulk_in, *bulk_out;</div><div class='add'>+	struct usb_anchor rx_submitted;</div><div class='add'>+</div><div class='add'>+	u32 ean[2];</div><div class='add'>+	u32 serial_number;</div><div class='add'>+	struct kvaser_usb_fw_version fw_version;</div><div class='add'>+	u8 hw_revision;</div><div class='add'>+	unsigned int nchannels;</div><div class='add'>+	/* @max_tx_urbs: Firmware-reported maximum number of outstanding,</div><div class='add'>+	 * not yet ACKed, transmissions on this device. This value is</div><div class='add'>+	 * also used as a sentinel for marking free tx contexts.</div><div class='add'>+	 */</div><div class='add'>+	unsigned int max_tx_urbs;</div><div class='add'>+	struct kvaser_usb_dev_card_data card_data;</div><div class='add'>+</div><div class='add'>+	bool rxinitdone;</div><div class='add'>+	void *rxbuf[KVASER_USB_MAX_RX_URBS];</div><div class='add'>+	dma_addr_t rxbuf_dma[KVASER_USB_MAX_RX_URBS];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct kvaser_usb_net_priv {</div><div class='add'>+	struct can_priv can;</div><div class='add'>+	struct devlink_port devlink_port;</div><div class='add'>+	struct can_berr_counter bec;</div><div class='add'>+</div><div class='add'>+	/* subdriver-specific data */</div><div class='add'>+	void *sub_priv;</div><div class='add'>+</div><div class='add'>+	struct kvaser_usb *dev;</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	int channel;</div><div class='add'>+</div><div class='add'>+	struct completion start_comp, stop_comp, flush_comp,</div><div class='add'>+			  get_busparams_comp;</div><div class='add'>+	struct usb_anchor tx_submitted;</div><div class='add'>+</div><div class='add'>+	struct kvaser_usb_busparams busparams_nominal, busparams_data;</div><div class='add'>+</div><div class='add'>+	spinlock_t tx_contexts_lock; /* lock for active_tx_contexts */</div><div class='add'>+	int active_tx_contexts;</div><div class='add'>+	struct kvaser_usb_tx_urb_context tx_contexts[];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct kvaser_usb_dev_ops - Device specific functions</div><div class='add'>+ * @dev_set_mode:		used for can.do_set_mode</div><div class='add'>+ * @dev_set_bittiming:		used for can.do_set_bittiming</div><div class='add'>+ * @dev_get_busparams:		readback arbitration busparams</div><div class='add'>+ * @dev_set_data_bittiming:	used for can.fd.do_set_data_bittiming</div><div class='add'>+ * @dev_get_data_busparams:	readback data busparams</div><div class='add'>+ * @dev_get_berr_counter:	used for can.do_get_berr_counter</div><div class='add'>+ *</div><div class='add'>+ * @dev_setup_endpoints:	setup USB in and out endpoints</div><div class='add'>+ * @dev_init_card:		initialize card</div><div class='add'>+ * @dev_init_channel:		initialize channel</div><div class='add'>+ * @dev_remove_channel:		uninitialize channel</div><div class='add'>+ * @dev_get_software_info:	get software info</div><div class='add'>+ * @dev_get_software_details:	get software details</div><div class='add'>+ * @dev_get_card_info:		get card info</div><div class='add'>+ * @dev_get_capabilities:	discover device capabilities</div><div class='add'>+ * @dev_set_led:		turn on/off device LED</div><div class='add'>+ *</div><div class='add'>+ * @dev_set_opt_mode:		set ctrlmod</div><div class='add'>+ * @dev_start_chip:		start the CAN controller</div><div class='add'>+ * @dev_stop_chip:		stop the CAN controller</div><div class='add'>+ * @dev_reset_chip:		reset the CAN controller</div><div class='add'>+ * @dev_flush_queue:		flush outstanding CAN messages</div><div class='add'>+ * @dev_read_bulk_callback:	handle incoming commands</div><div class='add'>+ * @dev_frame_to_cmd:		translate struct can_frame into device command</div><div class='add'>+ */</div><div class='add'>+struct kvaser_usb_dev_ops {</div><div class='add'>+	int (*dev_set_mode)(struct net_device *netdev, enum can_mode mode);</div><div class='add'>+	int (*dev_set_bittiming)(const struct net_device *netdev,</div><div class='add'>+				 const struct kvaser_usb_busparams *busparams);</div><div class='add'>+	int (*dev_get_busparams)(struct kvaser_usb_net_priv *priv);</div><div class='add'>+	int (*dev_set_data_bittiming)(const struct net_device *netdev,</div><div class='add'>+				      const struct kvaser_usb_busparams *busparams);</div><div class='add'>+	int (*dev_get_data_busparams)(struct kvaser_usb_net_priv *priv);</div><div class='add'>+	int (*dev_get_berr_counter)(const struct net_device *netdev,</div><div class='add'>+				    struct can_berr_counter *bec);</div><div class='add'>+	int (*dev_setup_endpoints)(struct kvaser_usb *dev);</div><div class='add'>+	int (*dev_init_card)(struct kvaser_usb *dev);</div><div class='add'>+	int (*dev_init_channel)(struct kvaser_usb_net_priv *priv);</div><div class='add'>+	void (*dev_remove_channel)(struct kvaser_usb_net_priv *priv);</div><div class='add'>+	int (*dev_get_software_info)(struct kvaser_usb *dev);</div><div class='add'>+	int (*dev_get_software_details)(struct kvaser_usb *dev);</div><div class='add'>+	int (*dev_get_card_info)(struct kvaser_usb *dev);</div><div class='add'>+	int (*dev_get_capabilities)(struct kvaser_usb *dev);</div><div class='add'>+	int (*dev_set_led)(struct kvaser_usb_net_priv *priv,</div><div class='add'>+			   enum kvaser_usb_led_state state,</div><div class='add'>+			   u16 duration_ms);</div><div class='add'>+	int (*dev_set_opt_mode)(const struct kvaser_usb_net_priv *priv);</div><div class='add'>+	int (*dev_start_chip)(struct kvaser_usb_net_priv *priv);</div><div class='add'>+	int (*dev_stop_chip)(struct kvaser_usb_net_priv *priv);</div><div class='add'>+	int (*dev_reset_chip)(struct kvaser_usb *dev, int channel);</div><div class='add'>+	int (*dev_flush_queue)(struct kvaser_usb_net_priv *priv);</div><div class='add'>+	void (*dev_read_bulk_callback)(struct kvaser_usb *dev, void *buf,</div><div class='add'>+				       int len);</div><div class='add'>+	void *(*dev_frame_to_cmd)(const struct kvaser_usb_net_priv *priv,</div><div class='add'>+				  const struct sk_buff *skb, int *cmd_len,</div><div class='add'>+				  u16 transid);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct kvaser_usb_driver_info {</div><div class='add'>+	u32 quirks;</div><div class='add'>+	enum kvaser_usb_leaf_family family;</div><div class='add'>+	const struct kvaser_usb_dev_ops *ops;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct kvaser_usb_dev_cfg {</div><div class='add'>+	const struct can_clock clock;</div><div class='add'>+	const unsigned int timestamp_freq;</div><div class='add'>+	const struct can_bittiming_const * const bittiming_const;</div><div class='add'>+	const struct can_bittiming_const * const data_bittiming_const;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+extern const struct kvaser_usb_dev_ops kvaser_usb_hydra_dev_ops;</div><div class='add'>+extern const struct kvaser_usb_dev_ops kvaser_usb_leaf_dev_ops;</div><div class='add'>+</div><div class='add'>+extern const struct devlink_ops kvaser_usb_devlink_ops;</div><div class='add'>+</div><div class='add'>+int kvaser_usb_devlink_port_register(struct kvaser_usb_net_priv *priv);</div><div class='add'>+void kvaser_usb_devlink_port_unregister(struct kvaser_usb_net_priv *priv);</div><div class='add'>+</div><div class='add'>+void kvaser_usb_unlink_tx_urbs(struct kvaser_usb_net_priv *priv);</div><div class='add'>+</div><div class='add'>+int kvaser_usb_recv_cmd(const struct kvaser_usb *dev, void *cmd, int len,</div><div class='add'>+			int *actual_len);</div><div class='add'>+</div><div class='add'>+int kvaser_usb_send_cmd(const struct kvaser_usb *dev, void *cmd, int len);</div><div class='add'>+</div><div class='add'>+int kvaser_usb_send_cmd_async(struct kvaser_usb_net_priv *priv, void *cmd,</div><div class='add'>+			      int len);</div><div class='add'>+</div><div class='add'>+int kvaser_usb_can_rx_over_error(struct net_device *netdev);</div><div class='add'>+</div><div class='add'>+extern const struct can_bittiming_const kvaser_usb_flexc_bittiming_const;</div><div class='add'>+</div><div class='add'>+static inline ktime_t kvaser_usb_ticks_to_ktime(const struct kvaser_usb_dev_cfg *cfg,</div><div class='add'>+						u64 ticks)</div><div class='add'>+{</div><div class='add'>+	return ns_to_ktime(div_u64(ticks * 1000, cfg-&gt;timestamp_freq));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline ktime_t kvaser_usb_timestamp48_to_ktime(const struct kvaser_usb_dev_cfg *cfg,</div><div class='add'>+						      const __le16 *timestamp)</div><div class='add'>+{</div><div class='add'>+	u64 ticks = le16_to_cpu(timestamp[0]) |</div><div class='add'>+		    (u64)(le16_to_cpu(timestamp[1])) &lt;&lt; 16 |</div><div class='add'>+		    (u64)(le16_to_cpu(timestamp[2])) &lt;&lt; 32;</div><div class='add'>+</div><div class='add'>+	return kvaser_usb_ticks_to_ktime(cfg, ticks);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline ktime_t kvaser_usb_timestamp64_to_ktime(const struct kvaser_usb_dev_cfg *cfg,</div><div class='add'>+						      __le64 timestamp)</div><div class='add'>+{</div><div class='add'>+	return kvaser_usb_ticks_to_ktime(cfg, le64_to_cpu(timestamp));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* KVASER_USB_H */</div><div class='head'>diff --git a/drivers/net/can/usb/kvaser_usb/kvaser_usb_core.c b/drivers/net/can/usb/kvaser_usb/kvaser_usb_core.c<br/>new file mode 100644<br/>index 000000000000..62701ec34272<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/kvaser_usb/kvaser_usb_core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/kvaser_usb/kvaser_usb_core.c</a></div><div class='hunk'>@@ -0,0 +1,1048 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Parts of this driver are based on the following:</div><div class='add'>+ *  - Kvaser linux leaf driver (version 4.78)</div><div class='add'>+ *  - CAN driver for esd CAN-USB/2</div><div class='add'>+ *  - Kvaser linux usbcanII driver (version 5.3)</div><div class='add'>+ *  - Kvaser linux mhydra driver (version 5.24)</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2002-2018 KVASER AB, Sweden. All rights reserved.</div><div class='add'>+ * Copyright (C) 2010 Matthias Fuchs &lt;matthias.fuchs@esd.eu&gt;, esd gmbh</div><div class='add'>+ * Copyright (C) 2012 Olivier Sobrie &lt;olivier@sobrie.be&gt;</div><div class='add'>+ * Copyright (C) 2015 Valeo S.A.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/completion.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/gfp.h&gt;</div><div class='add'>+#include &lt;linux/if.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/usb.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/can.h&gt;</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/can/error.h&gt;</div><div class='add'>+#include &lt;linux/can/netlink.h&gt;</div><div class='add'>+</div><div class='add'>+#include "kvaser_usb.h"</div><div class='add'>+</div><div class='add'>+/* Kvaser USB vendor id. */</div><div class='add'>+#define KVASER_VENDOR_ID 0x0bfd</div><div class='add'>+</div><div class='add'>+/* Kvaser Leaf USB devices product ids */</div><div class='add'>+#define USB_LEAF_DEVEL_PRODUCT_ID 0x000a</div><div class='add'>+#define USB_LEAF_LITE_PRODUCT_ID 0x000b</div><div class='add'>+#define USB_LEAF_PRO_PRODUCT_ID 0x000c</div><div class='add'>+#define USB_LEAF_SPRO_PRODUCT_ID 0x000e</div><div class='add'>+#define USB_LEAF_PRO_LS_PRODUCT_ID 0x000f</div><div class='add'>+#define USB_LEAF_PRO_SWC_PRODUCT_ID 0x0010</div><div class='add'>+#define USB_LEAF_PRO_LIN_PRODUCT_ID 0x0011</div><div class='add'>+#define USB_LEAF_SPRO_LS_PRODUCT_ID 0x0012</div><div class='add'>+#define USB_LEAF_SPRO_SWC_PRODUCT_ID 0x0013</div><div class='add'>+#define USB_MEMO2_DEVEL_PRODUCT_ID 0x0016</div><div class='add'>+#define USB_MEMO2_HSHS_PRODUCT_ID 0x0017</div><div class='add'>+#define USB_UPRO_HSHS_PRODUCT_ID 0x0018</div><div class='add'>+#define USB_LEAF_LITE_GI_PRODUCT_ID 0x0019</div><div class='add'>+#define USB_LEAF_PRO_OBDII_PRODUCT_ID 0x001a</div><div class='add'>+#define USB_MEMO2_HSLS_PRODUCT_ID 0x001b</div><div class='add'>+#define USB_LEAF_LITE_CH_PRODUCT_ID 0x001c</div><div class='add'>+#define USB_BLACKBIRD_SPRO_PRODUCT_ID 0x001d</div><div class='add'>+#define USB_OEM_MERCURY_PRODUCT_ID 0x0022</div><div class='add'>+#define USB_OEM_LEAF_PRODUCT_ID 0x0023</div><div class='add'>+#define USB_CAN_R_PRODUCT_ID 0x0027</div><div class='add'>+#define USB_LEAF_LITE_V2_PRODUCT_ID 0x0120</div><div class='add'>+#define USB_MINI_PCIE_HS_PRODUCT_ID 0x0121</div><div class='add'>+#define USB_LEAF_LIGHT_HS_V2_OEM_PRODUCT_ID 0x0122</div><div class='add'>+#define USB_USBCAN_LIGHT_2HS_PRODUCT_ID 0x0123</div><div class='add'>+#define USB_MINI_PCIE_2HS_PRODUCT_ID 0x0124</div><div class='add'>+#define USB_USBCAN_R_V2_PRODUCT_ID 0x0126</div><div class='add'>+#define USB_LEAF_LIGHT_R_V2_PRODUCT_ID 0x0127</div><div class='add'>+#define USB_LEAF_LIGHT_HS_V2_OEM2_PRODUCT_ID 0x0128</div><div class='add'>+</div><div class='add'>+/* Kvaser USBCan-II devices product ids */</div><div class='add'>+#define USB_USBCAN_REVB_PRODUCT_ID 0x0002</div><div class='add'>+#define USB_VCI2_PRODUCT_ID 0x0003</div><div class='add'>+#define USB_USBCAN2_PRODUCT_ID 0x0004</div><div class='add'>+#define USB_MEMORATOR_PRODUCT_ID 0x0005</div><div class='add'>+</div><div class='add'>+/* Kvaser Minihydra USB devices product ids */</div><div class='add'>+#define USB_BLACKBIRD_V2_PRODUCT_ID 0x0102</div><div class='add'>+#define USB_MEMO_PRO_5HS_PRODUCT_ID 0x0104</div><div class='add'>+#define USB_USBCAN_PRO_5HS_PRODUCT_ID 0x0105</div><div class='add'>+#define USB_USBCAN_LIGHT_4HS_PRODUCT_ID 0x0106</div><div class='add'>+#define USB_LEAF_PRO_HS_V2_PRODUCT_ID 0x0107</div><div class='add'>+#define USB_USBCAN_PRO_2HS_V2_PRODUCT_ID 0x0108</div><div class='add'>+#define USB_MEMO_2HS_PRODUCT_ID 0x0109</div><div class='add'>+#define USB_MEMO_PRO_2HS_V2_PRODUCT_ID 0x010a</div><div class='add'>+#define USB_HYBRID_2CANLIN_PRODUCT_ID 0x010b</div><div class='add'>+#define USB_ATI_USBCAN_PRO_2HS_V2_PRODUCT_ID 0x010c</div><div class='add'>+#define USB_ATI_MEMO_PRO_2HS_V2_PRODUCT_ID 0x010d</div><div class='add'>+#define USB_HYBRID_PRO_2CANLIN_PRODUCT_ID 0x010e</div><div class='add'>+#define USB_U100_PRODUCT_ID 0x0111</div><div class='add'>+#define USB_U100P_PRODUCT_ID 0x0112</div><div class='add'>+#define USB_U100S_PRODUCT_ID 0x0113</div><div class='add'>+#define USB_USBCAN_PRO_4HS_PRODUCT_ID 0x0114</div><div class='add'>+#define USB_HYBRID_CANLIN_PRODUCT_ID 0x0115</div><div class='add'>+#define USB_HYBRID_PRO_CANLIN_PRODUCT_ID 0x0116</div><div class='add'>+#define USB_LEAF_V3_PRODUCT_ID 0x0117</div><div class='add'>+#define USB_VINING_800_PRODUCT_ID 0x0119</div><div class='add'>+#define USB_USBCAN_PRO_5XCAN_PRODUCT_ID 0x011A</div><div class='add'>+#define USB_MINI_PCIE_1XCAN_PRODUCT_ID 0x011B</div><div class='add'>+</div><div class='add'>+static const struct kvaser_usb_driver_info kvaser_usb_driver_info_hydra = {</div><div class='add'>+	.quirks = 0,</div><div class='add'>+	.ops = &amp;kvaser_usb_hydra_dev_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct kvaser_usb_driver_info kvaser_usb_driver_info_usbcan = {</div><div class='add'>+	.quirks = KVASER_USB_QUIRK_HAS_TXRX_ERRORS |</div><div class='add'>+		  KVASER_USB_QUIRK_HAS_SILENT_MODE,</div><div class='add'>+	.family = KVASER_USBCAN,</div><div class='add'>+	.ops = &amp;kvaser_usb_leaf_dev_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct kvaser_usb_driver_info kvaser_usb_driver_info_leaf = {</div><div class='add'>+	.quirks = KVASER_USB_QUIRK_IGNORE_CLK_FREQ,</div><div class='add'>+	.family = KVASER_LEAF,</div><div class='add'>+	.ops = &amp;kvaser_usb_leaf_dev_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct kvaser_usb_driver_info kvaser_usb_driver_info_leaf_err = {</div><div class='add'>+	.quirks = KVASER_USB_QUIRK_HAS_TXRX_ERRORS |</div><div class='add'>+		  KVASER_USB_QUIRK_IGNORE_CLK_FREQ,</div><div class='add'>+	.family = KVASER_LEAF,</div><div class='add'>+	.ops = &amp;kvaser_usb_leaf_dev_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct kvaser_usb_driver_info kvaser_usb_driver_info_leaf_err_listen = {</div><div class='add'>+	.quirks = KVASER_USB_QUIRK_HAS_TXRX_ERRORS |</div><div class='add'>+		  KVASER_USB_QUIRK_HAS_SILENT_MODE |</div><div class='add'>+		  KVASER_USB_QUIRK_IGNORE_CLK_FREQ,</div><div class='add'>+	.family = KVASER_LEAF,</div><div class='add'>+	.ops = &amp;kvaser_usb_leaf_dev_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct kvaser_usb_driver_info kvaser_usb_driver_info_leafimx = {</div><div class='add'>+	.quirks = 0,</div><div class='add'>+	.family = KVASER_LEAF,</div><div class='add'>+	.ops = &amp;kvaser_usb_leaf_dev_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct usb_device_id kvaser_usb_table[] = {</div><div class='add'>+	/* Leaf M32C USB product IDs */</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_LEAF_DEVEL_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_leaf },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_LEAF_LITE_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_leaf },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_LEAF_PRO_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_leaf_err_listen },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_LEAF_SPRO_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_leaf_err_listen },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_LEAF_PRO_LS_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_leaf_err_listen },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_LEAF_PRO_SWC_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_leaf_err_listen },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_LEAF_PRO_LIN_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_leaf_err_listen },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_LEAF_SPRO_LS_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_leaf_err_listen },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_LEAF_SPRO_SWC_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_leaf_err_listen },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_MEMO2_DEVEL_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_leaf_err_listen },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_MEMO2_HSHS_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_leaf_err_listen },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_UPRO_HSHS_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_leaf_err },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_LEAF_LITE_GI_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_leaf },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_LEAF_PRO_OBDII_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_leaf_err_listen },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_MEMO2_HSLS_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_leaf_err },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_LEAF_LITE_CH_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_leaf_err },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_BLACKBIRD_SPRO_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_leaf_err },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_OEM_MERCURY_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_leaf_err },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_OEM_LEAF_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_leaf_err },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_CAN_R_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_leaf_err },</div><div class='add'>+</div><div class='add'>+	/* Leaf i.MX28 USB product IDs */</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_LEAF_LITE_V2_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_leafimx },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_MINI_PCIE_HS_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_leafimx },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_LEAF_LIGHT_HS_V2_OEM_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_leafimx },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_USBCAN_LIGHT_2HS_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_leafimx },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_MINI_PCIE_2HS_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_leafimx },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_USBCAN_R_V2_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_leafimx },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_LEAF_LIGHT_R_V2_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_leafimx },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_LEAF_LIGHT_HS_V2_OEM2_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_leafimx },</div><div class='add'>+</div><div class='add'>+	/* USBCANII USB product IDs */</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_USBCAN2_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_usbcan },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_USBCAN_REVB_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_usbcan },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_MEMORATOR_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_usbcan },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_VCI2_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_usbcan },</div><div class='add'>+</div><div class='add'>+	/* Minihydra USB product IDs */</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_BLACKBIRD_V2_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_hydra },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_MEMO_PRO_5HS_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_hydra },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_USBCAN_PRO_5HS_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_hydra },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_USBCAN_LIGHT_4HS_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_hydra },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_LEAF_PRO_HS_V2_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_hydra },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_USBCAN_PRO_2HS_V2_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_hydra },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_MEMO_2HS_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_hydra },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_MEMO_PRO_2HS_V2_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_hydra },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_HYBRID_2CANLIN_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_hydra },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_ATI_USBCAN_PRO_2HS_V2_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_hydra },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_ATI_MEMO_PRO_2HS_V2_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_hydra },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_HYBRID_PRO_2CANLIN_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_hydra },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_U100_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_hydra },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_U100P_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_hydra },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_U100S_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_hydra },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_USBCAN_PRO_4HS_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_hydra },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_HYBRID_CANLIN_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_hydra },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_HYBRID_PRO_CANLIN_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_hydra },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_LEAF_V3_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_hydra },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_VINING_800_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_hydra },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_USBCAN_PRO_5XCAN_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_hydra },</div><div class='add'>+	{ USB_DEVICE(KVASER_VENDOR_ID, USB_MINI_PCIE_1XCAN_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;kvaser_usb_driver_info_hydra },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(usb, kvaser_usb_table);</div><div class='add'>+</div><div class='add'>+int kvaser_usb_send_cmd(const struct kvaser_usb *dev, void *cmd, int len)</div><div class='add'>+{</div><div class='add'>+	return usb_bulk_msg(dev-&gt;udev,</div><div class='add'>+			    usb_sndbulkpipe(dev-&gt;udev,</div><div class='add'>+					    dev-&gt;bulk_out-&gt;bEndpointAddress),</div><div class='add'>+			    cmd, len, NULL, KVASER_USB_TIMEOUT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int kvaser_usb_recv_cmd(const struct kvaser_usb *dev, void *cmd, int len,</div><div class='add'>+			int *actual_len)</div><div class='add'>+{</div><div class='add'>+	return usb_bulk_msg(dev-&gt;udev,</div><div class='add'>+			    usb_rcvbulkpipe(dev-&gt;udev,</div><div class='add'>+					    dev-&gt;bulk_in-&gt;bEndpointAddress),</div><div class='add'>+			    cmd, len, actual_len, KVASER_USB_TIMEOUT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_send_cmd_callback(struct urb *urb)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = urb-&gt;context;</div><div class='add'>+</div><div class='add'>+	kfree(urb-&gt;transfer_buffer);</div><div class='add'>+</div><div class='add'>+	if (urb-&gt;status)</div><div class='add'>+		netdev_warn(netdev, "urb status received: %d\n", urb-&gt;status);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int kvaser_usb_send_cmd_async(struct kvaser_usb_net_priv *priv, void *cmd,</div><div class='add'>+			      int len)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb *dev = priv-&gt;dev;</div><div class='add'>+	struct net_device *netdev = priv-&gt;netdev;</div><div class='add'>+	struct urb *urb;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	urb = usb_alloc_urb(0, GFP_ATOMIC);</div><div class='add'>+	if (!urb)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	usb_fill_bulk_urb(urb, dev-&gt;udev,</div><div class='add'>+			  usb_sndbulkpipe(dev-&gt;udev,</div><div class='add'>+					  dev-&gt;bulk_out-&gt;bEndpointAddress),</div><div class='add'>+			  cmd, len, kvaser_usb_send_cmd_callback, netdev);</div><div class='add'>+	usb_anchor_urb(urb, &amp;priv-&gt;tx_submitted);</div><div class='add'>+</div><div class='add'>+	err = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(netdev, "Error transmitting URB\n");</div><div class='add'>+		usb_unanchor_urb(urb);</div><div class='add'>+	}</div><div class='add'>+	usb_free_urb(urb);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int kvaser_usb_can_rx_over_error(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct net_device_stats *stats = &amp;netdev-&gt;stats;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	stats-&gt;rx_over_errors++;</div><div class='add'>+	stats-&gt;rx_errors++;</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_err_skb(netdev, &amp;cf);</div><div class='add'>+	if (!skb) {</div><div class='add'>+		stats-&gt;rx_dropped++;</div><div class='add'>+		netdev_warn(netdev, "No memory left for err_skb\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='add'>+	cf-&gt;data[1] = CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='add'>+</div><div class='add'>+	netif_rx(skb);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_read_bulk_callback(struct urb *urb)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb *dev = urb-&gt;context;</div><div class='add'>+	const struct kvaser_usb_dev_ops *ops = dev-&gt;driver_info-&gt;ops;</div><div class='add'>+	int err;</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	switch (urb-&gt;status) {</div><div class='add'>+	case 0:</div><div class='add'>+		break;</div><div class='add'>+	case -ENOENT:</div><div class='add'>+	case -EPIPE:</div><div class='add'>+	case -EPROTO:</div><div class='add'>+	case -ESHUTDOWN:</div><div class='add'>+		return;</div><div class='add'>+	default:</div><div class='add'>+		dev_info(&amp;dev-&gt;intf-&gt;dev, "Rx URB aborted (%d)\n", urb-&gt;status);</div><div class='add'>+		goto resubmit_urb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ops-&gt;dev_read_bulk_callback(dev, urb-&gt;transfer_buffer,</div><div class='add'>+				    urb-&gt;actual_length);</div><div class='add'>+</div><div class='add'>+resubmit_urb:</div><div class='add'>+	usb_fill_bulk_urb(urb, dev-&gt;udev,</div><div class='add'>+			  usb_rcvbulkpipe(dev-&gt;udev,</div><div class='add'>+					  dev-&gt;bulk_in-&gt;bEndpointAddress),</div><div class='add'>+			  urb-&gt;transfer_buffer, KVASER_USB_RX_BUFFER_SIZE,</div><div class='add'>+			  kvaser_usb_read_bulk_callback, dev);</div><div class='add'>+</div><div class='add'>+	err = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='add'>+	if (err == -ENODEV) {</div><div class='add'>+		for (i = 0; i &lt; dev-&gt;nchannels; i++) {</div><div class='add'>+			struct kvaser_usb_net_priv *priv;</div><div class='add'>+</div><div class='add'>+			priv = dev-&gt;nets[i];</div><div class='add'>+			if (!priv)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			netif_device_detach(priv-&gt;netdev);</div><div class='add'>+		}</div><div class='add'>+	} else if (err) {</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			"Failed resubmitting read bulk urb: %d\n", err);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_setup_rx_urbs(struct kvaser_usb *dev)</div><div class='add'>+{</div><div class='add'>+	int i, err = 0;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;rxinitdone)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; KVASER_USB_MAX_RX_URBS; i++) {</div><div class='add'>+		struct urb *urb = NULL;</div><div class='add'>+		u8 *buf = NULL;</div><div class='add'>+		dma_addr_t buf_dma;</div><div class='add'>+</div><div class='add'>+		urb = usb_alloc_urb(0, GFP_KERNEL);</div><div class='add'>+		if (!urb) {</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		buf = usb_alloc_coherent(dev-&gt;udev, KVASER_USB_RX_BUFFER_SIZE,</div><div class='add'>+					 GFP_KERNEL, &amp;buf_dma);</div><div class='add'>+		if (!buf) {</div><div class='add'>+			dev_warn(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+				 "No memory left for USB buffer\n");</div><div class='add'>+			usb_free_urb(urb);</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		usb_fill_bulk_urb(urb, dev-&gt;udev,</div><div class='add'>+				  usb_rcvbulkpipe</div><div class='add'>+					(dev-&gt;udev,</div><div class='add'>+					 dev-&gt;bulk_in-&gt;bEndpointAddress),</div><div class='add'>+				  buf, KVASER_USB_RX_BUFFER_SIZE,</div><div class='add'>+				  kvaser_usb_read_bulk_callback, dev);</div><div class='add'>+		urb-&gt;transfer_dma = buf_dma;</div><div class='add'>+		urb-&gt;transfer_flags |= URB_NO_TRANSFER_DMA_MAP;</div><div class='add'>+		usb_anchor_urb(urb, &amp;dev-&gt;rx_submitted);</div><div class='add'>+</div><div class='add'>+		err = usb_submit_urb(urb, GFP_KERNEL);</div><div class='add'>+		if (err) {</div><div class='add'>+			usb_unanchor_urb(urb);</div><div class='add'>+			usb_free_coherent(dev-&gt;udev,</div><div class='add'>+					  KVASER_USB_RX_BUFFER_SIZE, buf,</div><div class='add'>+					  buf_dma);</div><div class='add'>+			usb_free_urb(urb);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		dev-&gt;rxbuf[i] = buf;</div><div class='add'>+		dev-&gt;rxbuf_dma[i] = buf_dma;</div><div class='add'>+</div><div class='add'>+		usb_free_urb(urb);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (i == 0) {</div><div class='add'>+		dev_warn(&amp;dev-&gt;intf-&gt;dev, "Cannot setup read URBs, error %d\n",</div><div class='add'>+			 err);</div><div class='add'>+		return err;</div><div class='add'>+	} else if (i &lt; KVASER_USB_MAX_RX_URBS) {</div><div class='add'>+		dev_warn(&amp;dev-&gt;intf-&gt;dev, "RX performances may be slow\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev-&gt;rxinitdone = true;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_open(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb_net_priv *priv = netdev_priv(netdev);</div><div class='add'>+	struct kvaser_usb *dev = priv-&gt;dev;</div><div class='add'>+	const struct kvaser_usb_dev_ops *ops = dev-&gt;driver_info-&gt;ops;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = open_candev(netdev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = ops-&gt;dev_set_opt_mode(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	err = ops-&gt;dev_start_chip(priv);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_warn(netdev, "Cannot start device, error %d\n", err);</div><div class='add'>+		goto error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+error:</div><div class='add'>+	close_candev(netdev);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_reset_tx_urb_contexts(struct kvaser_usb_net_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int i, max_tx_urbs;</div><div class='add'>+</div><div class='add'>+	max_tx_urbs = priv-&gt;dev-&gt;max_tx_urbs;</div><div class='add'>+</div><div class='add'>+	priv-&gt;active_tx_contexts = 0;</div><div class='add'>+	for (i = 0; i &lt; max_tx_urbs; i++)</div><div class='add'>+		priv-&gt;tx_contexts[i].echo_index = max_tx_urbs;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This method might sleep. Do not call it in the atomic context</div><div class='add'>+ * of URB completions.</div><div class='add'>+ */</div><div class='add'>+void kvaser_usb_unlink_tx_urbs(struct kvaser_usb_net_priv *priv)</div><div class='add'>+{</div><div class='add'>+	usb_kill_anchored_urbs(&amp;priv-&gt;tx_submitted);</div><div class='add'>+	kvaser_usb_reset_tx_urb_contexts(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_unlink_all_urbs(struct kvaser_usb *dev)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	usb_kill_anchored_urbs(&amp;dev-&gt;rx_submitted);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; KVASER_USB_MAX_RX_URBS; i++)</div><div class='add'>+		usb_free_coherent(dev-&gt;udev, KVASER_USB_RX_BUFFER_SIZE,</div><div class='add'>+				  dev-&gt;rxbuf[i], dev-&gt;rxbuf_dma[i]);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; dev-&gt;nchannels; i++) {</div><div class='add'>+		struct kvaser_usb_net_priv *priv = dev-&gt;nets[i];</div><div class='add'>+</div><div class='add'>+		if (priv)</div><div class='add'>+			kvaser_usb_unlink_tx_urbs(priv);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_close(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb_net_priv *priv = netdev_priv(netdev);</div><div class='add'>+	struct kvaser_usb *dev = priv-&gt;dev;</div><div class='add'>+	const struct kvaser_usb_dev_ops *ops = dev-&gt;driver_info-&gt;ops;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(netdev);</div><div class='add'>+</div><div class='add'>+	err = ops-&gt;dev_flush_queue(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		netdev_warn(netdev, "Cannot flush queue, error %d\n", err);</div><div class='add'>+</div><div class='add'>+	if (ops-&gt;dev_reset_chip) {</div><div class='add'>+		err = ops-&gt;dev_reset_chip(dev, priv-&gt;channel);</div><div class='add'>+		if (err)</div><div class='add'>+			netdev_warn(netdev, "Cannot reset card, error %d\n",</div><div class='add'>+				    err);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = ops-&gt;dev_stop_chip(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		netdev_warn(netdev, "Cannot stop device, error %d\n", err);</div><div class='add'>+</div><div class='add'>+	/* reset tx contexts */</div><div class='add'>+	kvaser_usb_unlink_tx_urbs(priv);</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='add'>+	close_candev(priv-&gt;netdev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_set_bittiming(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb_net_priv *priv = netdev_priv(netdev);</div><div class='add'>+	struct kvaser_usb *dev = priv-&gt;dev;</div><div class='add'>+	const struct kvaser_usb_dev_ops *ops = dev-&gt;driver_info-&gt;ops;</div><div class='add'>+	struct can_bittiming *bt = &amp;priv-&gt;can.bittiming;</div><div class='add'>+	struct kvaser_usb_busparams busparams;</div><div class='add'>+	int tseg1 = bt-&gt;prop_seg + bt-&gt;phase_seg1;</div><div class='add'>+	int tseg2 = bt-&gt;phase_seg2;</div><div class='add'>+	int sjw = bt-&gt;sjw;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	busparams.bitrate = cpu_to_le32(bt-&gt;bitrate);</div><div class='add'>+	busparams.sjw = (u8)sjw;</div><div class='add'>+	busparams.tseg1 = (u8)tseg1;</div><div class='add'>+	busparams.tseg2 = (u8)tseg2;</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_3_SAMPLES)</div><div class='add'>+		busparams.nsamples = 3;</div><div class='add'>+	else</div><div class='add'>+		busparams.nsamples = 1;</div><div class='add'>+</div><div class='add'>+	err = ops-&gt;dev_set_bittiming(netdev, &amp;busparams);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_setup_rx_urbs(priv-&gt;dev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = ops-&gt;dev_get_busparams(priv);</div><div class='add'>+	if (err) {</div><div class='add'>+		/* Treat EOPNOTSUPP as success */</div><div class='add'>+		if (err == -EOPNOTSUPP)</div><div class='add'>+			err = 0;</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (memcmp(&amp;busparams, &amp;priv-&gt;busparams_nominal,</div><div class='add'>+		   sizeof(priv-&gt;busparams_nominal)) != 0)</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_set_data_bittiming(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb_net_priv *priv = netdev_priv(netdev);</div><div class='add'>+	struct kvaser_usb *dev = priv-&gt;dev;</div><div class='add'>+	const struct kvaser_usb_dev_ops *ops = dev-&gt;driver_info-&gt;ops;</div><div class='add'>+	struct can_bittiming *dbt = &amp;priv-&gt;can.fd.data_bittiming;</div><div class='add'>+	struct kvaser_usb_busparams busparams;</div><div class='add'>+	int tseg1 = dbt-&gt;prop_seg + dbt-&gt;phase_seg1;</div><div class='add'>+	int tseg2 = dbt-&gt;phase_seg2;</div><div class='add'>+	int sjw = dbt-&gt;sjw;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!ops-&gt;dev_set_data_bittiming ||</div><div class='add'>+	    !ops-&gt;dev_get_data_busparams)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	busparams.bitrate = cpu_to_le32(dbt-&gt;bitrate);</div><div class='add'>+	busparams.sjw = (u8)sjw;</div><div class='add'>+	busparams.tseg1 = (u8)tseg1;</div><div class='add'>+	busparams.tseg2 = (u8)tseg2;</div><div class='add'>+	busparams.nsamples = 1;</div><div class='add'>+</div><div class='add'>+	err = ops-&gt;dev_set_data_bittiming(netdev, &amp;busparams);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_setup_rx_urbs(priv-&gt;dev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = ops-&gt;dev_get_data_busparams(priv);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (memcmp(&amp;busparams, &amp;priv-&gt;busparams_data,</div><div class='add'>+		   sizeof(priv-&gt;busparams_data)) != 0)</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_write_bulk_callback(struct urb *urb)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb_tx_urb_context *context = urb-&gt;context;</div><div class='add'>+	struct kvaser_usb_net_priv *priv;</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+</div><div class='add'>+	if (WARN_ON(!context))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	priv = context-&gt;priv;</div><div class='add'>+	netdev = priv-&gt;netdev;</div><div class='add'>+</div><div class='add'>+	kfree(urb-&gt;transfer_buffer);</div><div class='add'>+</div><div class='add'>+	if (!netif_device_present(netdev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (urb-&gt;status)</div><div class='add'>+		netdev_info(netdev, "Tx URB aborted (%d)\n", urb-&gt;status);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static netdev_tx_t kvaser_usb_start_xmit(struct sk_buff *skb,</div><div class='add'>+					 struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb_net_priv *priv = netdev_priv(netdev);</div><div class='add'>+	struct kvaser_usb *dev = priv-&gt;dev;</div><div class='add'>+	const struct kvaser_usb_dev_ops *ops = dev-&gt;driver_info-&gt;ops;</div><div class='add'>+	struct net_device_stats *stats = &amp;netdev-&gt;stats;</div><div class='add'>+	struct kvaser_usb_tx_urb_context *context = NULL;</div><div class='add'>+	struct urb *urb;</div><div class='add'>+	void *buf;</div><div class='add'>+	int cmd_len = 0;</div><div class='add'>+	int err, ret = NETDEV_TX_OK;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (can_dev_dropped_skb(netdev, skb))</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+	urb = usb_alloc_urb(0, GFP_ATOMIC);</div><div class='add'>+	if (!urb) {</div><div class='add'>+		stats-&gt;tx_dropped++;</div><div class='add'>+		dev_kfree_skb(skb);</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;tx_contexts_lock, flags);</div><div class='add'>+	for (i = 0; i &lt; dev-&gt;max_tx_urbs; i++) {</div><div class='add'>+		if (priv-&gt;tx_contexts[i].echo_index == dev-&gt;max_tx_urbs) {</div><div class='add'>+			context = &amp;priv-&gt;tx_contexts[i];</div><div class='add'>+</div><div class='add'>+			context-&gt;echo_index = i;</div><div class='add'>+			++priv-&gt;active_tx_contexts;</div><div class='add'>+			if (priv-&gt;active_tx_contexts &gt;= (int)dev-&gt;max_tx_urbs)</div><div class='add'>+				netif_stop_queue(netdev);</div><div class='add'>+</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;tx_contexts_lock, flags);</div><div class='add'>+</div><div class='add'>+	/* This should never happen; it implies a flow control bug */</div><div class='add'>+	if (!context) {</div><div class='add'>+		netdev_warn(netdev, "cannot find free context\n");</div><div class='add'>+</div><div class='add'>+		ret = NETDEV_TX_BUSY;</div><div class='add'>+		goto freeurb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	buf = ops-&gt;dev_frame_to_cmd(priv, skb, &amp;cmd_len, context-&gt;echo_index);</div><div class='add'>+	if (!buf) {</div><div class='add'>+		stats-&gt;tx_dropped++;</div><div class='add'>+		dev_kfree_skb(skb);</div><div class='add'>+		spin_lock_irqsave(&amp;priv-&gt;tx_contexts_lock, flags);</div><div class='add'>+</div><div class='add'>+		context-&gt;echo_index = dev-&gt;max_tx_urbs;</div><div class='add'>+		--priv-&gt;active_tx_contexts;</div><div class='add'>+		netif_wake_queue(netdev);</div><div class='add'>+</div><div class='add'>+		spin_unlock_irqrestore(&amp;priv-&gt;tx_contexts_lock, flags);</div><div class='add'>+		goto freeurb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	context-&gt;priv = priv;</div><div class='add'>+</div><div class='add'>+	can_put_echo_skb(skb, netdev, context-&gt;echo_index, 0);</div><div class='add'>+</div><div class='add'>+	usb_fill_bulk_urb(urb, dev-&gt;udev,</div><div class='add'>+			  usb_sndbulkpipe(dev-&gt;udev,</div><div class='add'>+					  dev-&gt;bulk_out-&gt;bEndpointAddress),</div><div class='add'>+			  buf, cmd_len, kvaser_usb_write_bulk_callback,</div><div class='add'>+			  context);</div><div class='add'>+	usb_anchor_urb(urb, &amp;priv-&gt;tx_submitted);</div><div class='add'>+</div><div class='add'>+	err = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='add'>+	if (unlikely(err)) {</div><div class='add'>+		spin_lock_irqsave(&amp;priv-&gt;tx_contexts_lock, flags);</div><div class='add'>+</div><div class='add'>+		can_free_echo_skb(netdev, context-&gt;echo_index, NULL);</div><div class='add'>+		context-&gt;echo_index = dev-&gt;max_tx_urbs;</div><div class='add'>+		--priv-&gt;active_tx_contexts;</div><div class='add'>+		netif_wake_queue(netdev);</div><div class='add'>+</div><div class='add'>+		spin_unlock_irqrestore(&amp;priv-&gt;tx_contexts_lock, flags);</div><div class='add'>+</div><div class='add'>+		usb_unanchor_urb(urb);</div><div class='add'>+		kfree(buf);</div><div class='add'>+</div><div class='add'>+		stats-&gt;tx_dropped++;</div><div class='add'>+</div><div class='add'>+		if (err == -ENODEV)</div><div class='add'>+			netif_device_detach(netdev);</div><div class='add'>+		else</div><div class='add'>+			netdev_warn(netdev, "Failed tx_urb %d\n", err);</div><div class='add'>+</div><div class='add'>+		goto freeurb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+freeurb:</div><div class='add'>+	usb_free_urb(urb);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_set_phys_id(struct net_device *netdev,</div><div class='add'>+				  enum ethtool_phys_id_state state)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb_net_priv *priv = netdev_priv(netdev);</div><div class='add'>+	const struct kvaser_usb_dev_ops *ops = priv-&gt;dev-&gt;driver_info-&gt;ops;</div><div class='add'>+</div><div class='add'>+	switch (state) {</div><div class='add'>+	case ETHTOOL_ID_ACTIVE:</div><div class='add'>+		return 3; /* 3 On/Off cycles per second */</div><div class='add'>+</div><div class='add'>+	case ETHTOOL_ID_ON:</div><div class='add'>+		return ops-&gt;dev_set_led(priv, KVASER_USB_LED_ON, 1000);</div><div class='add'>+</div><div class='add'>+	case ETHTOOL_ID_OFF:</div><div class='add'>+		return ops-&gt;dev_set_led(priv, KVASER_USB_LED_OFF, 1000);</div><div class='add'>+</div><div class='add'>+	case ETHTOOL_ID_INACTIVE:</div><div class='add'>+		/* Turn LED off and restore standard function after 1ms */</div><div class='add'>+		return ops-&gt;dev_set_led(priv, KVASER_USB_LED_OFF, 1);</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops kvaser_usb_netdev_ops = {</div><div class='add'>+	.ndo_open = kvaser_usb_open,</div><div class='add'>+	.ndo_stop = kvaser_usb_close,</div><div class='add'>+	.ndo_start_xmit = kvaser_usb_start_xmit,</div><div class='add'>+	.ndo_hwtstamp_get = can_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set = can_hwtstamp_set,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops kvaser_usb_ethtool_ops = {</div><div class='add'>+	.get_ts_info = can_ethtool_op_get_ts_info_hwts,</div><div class='add'>+	.set_phys_id = kvaser_usb_set_phys_id,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_remove_interfaces(struct kvaser_usb *dev)</div><div class='add'>+{</div><div class='add'>+	const struct kvaser_usb_dev_ops *ops = dev-&gt;driver_info-&gt;ops;</div><div class='add'>+	int i;</div><div class='add'>+	struct kvaser_usb_net_priv *priv;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; dev-&gt;nchannels; i++) {</div><div class='add'>+		priv = dev-&gt;nets[i];</div><div class='add'>+		if (!priv)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		unregister_candev(priv-&gt;netdev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kvaser_usb_unlink_all_urbs(dev);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; dev-&gt;nchannels; i++) {</div><div class='add'>+		priv = dev-&gt;nets[i];</div><div class='add'>+		if (!priv)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (ops-&gt;dev_remove_channel)</div><div class='add'>+			ops-&gt;dev_remove_channel(priv);</div><div class='add'>+</div><div class='add'>+		kvaser_usb_devlink_port_unregister(priv);</div><div class='add'>+		free_candev(priv-&gt;netdev);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_init_one(struct kvaser_usb *dev, int channel)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	struct kvaser_usb_net_priv *priv;</div><div class='add'>+	const struct kvaser_usb_driver_info *driver_info = dev-&gt;driver_info;</div><div class='add'>+	const struct kvaser_usb_dev_ops *ops = driver_info-&gt;ops;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (ops-&gt;dev_reset_chip) {</div><div class='add'>+		err = ops-&gt;dev_reset_chip(dev, channel);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev = alloc_candev(struct_size(priv, tx_contexts, dev-&gt;max_tx_urbs),</div><div class='add'>+			      dev-&gt;max_tx_urbs);</div><div class='add'>+	if (!netdev) {</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev, "Cannot alloc candev\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	init_usb_anchor(&amp;priv-&gt;tx_submitted);</div><div class='add'>+	init_completion(&amp;priv-&gt;start_comp);</div><div class='add'>+	init_completion(&amp;priv-&gt;stop_comp);</div><div class='add'>+	init_completion(&amp;priv-&gt;flush_comp);</div><div class='add'>+	init_completion(&amp;priv-&gt;get_busparams_comp);</div><div class='add'>+	priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_CC_LEN8_DLC |</div><div class='add'>+				       CAN_CTRLMODE_BERR_REPORTING;</div><div class='add'>+</div><div class='add'>+	priv-&gt;dev = dev;</div><div class='add'>+	priv-&gt;netdev = netdev;</div><div class='add'>+	priv-&gt;channel = channel;</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;priv-&gt;tx_contexts_lock);</div><div class='add'>+	kvaser_usb_reset_tx_urb_contexts(priv);</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='add'>+	priv-&gt;can.clock.freq = dev-&gt;cfg-&gt;clock.freq;</div><div class='add'>+	priv-&gt;can.bittiming_const = dev-&gt;cfg-&gt;bittiming_const;</div><div class='add'>+	priv-&gt;can.do_set_bittiming = kvaser_usb_set_bittiming;</div><div class='add'>+	priv-&gt;can.do_set_mode = ops-&gt;dev_set_mode;</div><div class='add'>+	if ((driver_info-&gt;quirks &amp; KVASER_USB_QUIRK_HAS_TXRX_ERRORS) ||</div><div class='add'>+	    (priv-&gt;dev-&gt;card_data.capabilities &amp; KVASER_USB_CAP_BERR_CAP))</div><div class='add'>+		priv-&gt;can.do_get_berr_counter = ops-&gt;dev_get_berr_counter;</div><div class='add'>+	if (driver_info-&gt;quirks &amp; KVASER_USB_QUIRK_HAS_SILENT_MODE)</div><div class='add'>+		priv-&gt;can.ctrlmode_supported |= CAN_CTRLMODE_LISTENONLY;</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.ctrlmode_supported |= dev-&gt;card_data.ctrlmode_supported;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.ctrlmode_supported &amp; CAN_CTRLMODE_FD) {</div><div class='add'>+		priv-&gt;can.fd.data_bittiming_const = dev-&gt;cfg-&gt;data_bittiming_const;</div><div class='add'>+		priv-&gt;can.fd.do_set_data_bittiming = kvaser_usb_set_data_bittiming;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev-&gt;flags |= IFF_ECHO;</div><div class='add'>+</div><div class='add'>+	netdev-&gt;netdev_ops = &amp;kvaser_usb_netdev_ops;</div><div class='add'>+	netdev-&gt;ethtool_ops = &amp;kvaser_usb_ethtool_ops;</div><div class='add'>+	SET_NETDEV_DEV(netdev, &amp;dev-&gt;intf-&gt;dev);</div><div class='add'>+	netdev-&gt;dev_id = channel;</div><div class='add'>+	netdev-&gt;dev_port = channel;</div><div class='add'>+</div><div class='add'>+	dev-&gt;nets[channel] = priv;</div><div class='add'>+</div><div class='add'>+	if (ops-&gt;dev_init_channel) {</div><div class='add'>+		err = ops-&gt;dev_init_channel(priv);</div><div class='add'>+		if (err)</div><div class='add'>+			goto candev_free;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_devlink_port_register(priv);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev, "Failed to register devlink port\n");</div><div class='add'>+		goto candev_free;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = register_candev(netdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev, "Failed to register CAN device\n");</div><div class='add'>+		goto unregister_devlink_port;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev_dbg(netdev, "device registered\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+unregister_devlink_port:</div><div class='add'>+	kvaser_usb_devlink_port_unregister(priv);</div><div class='add'>+candev_free:</div><div class='add'>+	free_candev(netdev);</div><div class='add'>+	dev-&gt;nets[channel] = NULL;</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_probe(struct usb_interface *intf,</div><div class='add'>+			    const struct usb_device_id *id)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb *dev;</div><div class='add'>+	struct devlink *devlink;</div><div class='add'>+	int err;</div><div class='add'>+	int i;</div><div class='add'>+	const struct kvaser_usb_driver_info *driver_info;</div><div class='add'>+	const struct kvaser_usb_dev_ops *ops;</div><div class='add'>+</div><div class='add'>+	driver_info = (const struct kvaser_usb_driver_info *)id-&gt;driver_info;</div><div class='add'>+	if (!driver_info)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	devlink = devlink_alloc(&amp;kvaser_usb_devlink_ops, sizeof(*dev), &amp;intf-&gt;dev);</div><div class='add'>+	if (!devlink)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	dev = devlink_priv(devlink);</div><div class='add'>+	dev-&gt;intf = intf;</div><div class='add'>+	dev-&gt;driver_info = driver_info;</div><div class='add'>+	ops = driver_info-&gt;ops;</div><div class='add'>+</div><div class='add'>+	err = ops-&gt;dev_setup_endpoints(dev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err_probe(&amp;intf-&gt;dev, err, "Cannot get usb endpoint(s)");</div><div class='add'>+		goto free_devlink;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev-&gt;udev = interface_to_usbdev(intf);</div><div class='add'>+</div><div class='add'>+	init_usb_anchor(&amp;dev-&gt;rx_submitted);</div><div class='add'>+</div><div class='add'>+	usb_set_intfdata(intf, dev);</div><div class='add'>+</div><div class='add'>+	dev-&gt;card_data.ctrlmode_supported = 0;</div><div class='add'>+	dev-&gt;card_data.capabilities = 0;</div><div class='add'>+	err = ops-&gt;dev_init_card(dev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err_probe(&amp;intf-&gt;dev, err,</div><div class='add'>+			      "Failed to initialize card\n");</div><div class='add'>+		goto free_devlink;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = ops-&gt;dev_get_software_info(dev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err_probe(&amp;intf-&gt;dev, err,</div><div class='add'>+			      "Cannot get software info\n");</div><div class='add'>+		goto free_devlink;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ops-&gt;dev_get_software_details) {</div><div class='add'>+		err = ops-&gt;dev_get_software_details(dev);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err_probe(&amp;intf-&gt;dev, err,</div><div class='add'>+				      "Cannot get software details\n");</div><div class='add'>+			goto free_devlink;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (WARN_ON(!dev-&gt;cfg)) {</div><div class='add'>+		err = -ENODEV;</div><div class='add'>+		goto free_devlink;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;intf-&gt;dev, "Max outstanding tx = %d URBs\n", dev-&gt;max_tx_urbs);</div><div class='add'>+</div><div class='add'>+	err = ops-&gt;dev_get_card_info(dev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err_probe(&amp;intf-&gt;dev, err,</div><div class='add'>+			      "Cannot get card info\n");</div><div class='add'>+		goto free_devlink;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ops-&gt;dev_get_capabilities) {</div><div class='add'>+		err = ops-&gt;dev_get_capabilities(dev);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err_probe(&amp;intf-&gt;dev, err,</div><div class='add'>+				      "Cannot get capabilities\n");</div><div class='add'>+			goto remove_interfaces;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; dev-&gt;nchannels; i++) {</div><div class='add'>+		err = kvaser_usb_init_one(dev, i);</div><div class='add'>+		if (err)</div><div class='add'>+			goto remove_interfaces;</div><div class='add'>+	}</div><div class='add'>+	devlink_register(devlink);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+remove_interfaces:</div><div class='add'>+	kvaser_usb_remove_interfaces(dev);</div><div class='add'>+free_devlink:</div><div class='add'>+	devlink_free(devlink);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_disconnect(struct usb_interface *intf)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb *dev = usb_get_intfdata(intf);</div><div class='add'>+</div><div class='add'>+	usb_set_intfdata(intf, NULL);</div><div class='add'>+</div><div class='add'>+	if (!dev)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	kvaser_usb_remove_interfaces(dev);</div><div class='add'>+	devlink_unregister(priv_to_devlink(dev));</div><div class='add'>+	devlink_free(priv_to_devlink(dev));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct usb_driver kvaser_usb_driver = {</div><div class='add'>+	.name = KBUILD_MODNAME,</div><div class='add'>+	.probe = kvaser_usb_probe,</div><div class='add'>+	.disconnect = kvaser_usb_disconnect,</div><div class='add'>+	.id_table = kvaser_usb_table,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_usb_driver(kvaser_usb_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Olivier Sobrie &lt;olivier@sobrie.be&gt;");</div><div class='add'>+MODULE_AUTHOR("Kvaser AB &lt;support@kvaser.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("CAN driver for Kvaser CAN/USB devices");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/net/can/usb/kvaser_usb/kvaser_usb_devlink.c b/drivers/net/can/usb/kvaser_usb/kvaser_usb_devlink.c<br/>new file mode 100644<br/>index 000000000000..e838b82298ae<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/kvaser_usb/kvaser_usb_devlink.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/kvaser_usb/kvaser_usb_devlink.c</a></div><div class='hunk'>@@ -0,0 +1,87 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* kvaser_usb devlink functions</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 KVASER AB, Sweden. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+#include "kvaser_usb.h"</div><div class='add'>+</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;net/devlink.h&gt;</div><div class='add'>+</div><div class='add'>+#define KVASER_USB_EAN_MSB 0x00073301</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_devlink_info_get(struct devlink *devlink,</div><div class='add'>+				       struct devlink_info_req *req,</div><div class='add'>+				       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb *dev = devlink_priv(devlink);</div><div class='add'>+	char buf[] = "73301XXXXXXXXXX";</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;serial_number) {</div><div class='add'>+		snprintf(buf, sizeof(buf), "%u", dev-&gt;serial_number);</div><div class='add'>+		ret = devlink_info_serial_number_put(req, buf);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;fw_version.major) {</div><div class='add'>+		snprintf(buf, sizeof(buf), "%u.%u.%u",</div><div class='add'>+			 dev-&gt;fw_version.major,</div><div class='add'>+			 dev-&gt;fw_version.minor,</div><div class='add'>+			 dev-&gt;fw_version.build);</div><div class='add'>+		ret = devlink_info_version_running_put(req,</div><div class='add'>+						       DEVLINK_INFO_VERSION_GENERIC_FW,</div><div class='add'>+						       buf);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;hw_revision) {</div><div class='add'>+		snprintf(buf, sizeof(buf), "%u", dev-&gt;hw_revision);</div><div class='add'>+		ret = devlink_info_version_fixed_put(req,</div><div class='add'>+						     DEVLINK_INFO_VERSION_GENERIC_BOARD_REV,</div><div class='add'>+						     buf);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;ean[1] == KVASER_USB_EAN_MSB) {</div><div class='add'>+		snprintf(buf, sizeof(buf), "%x%08x", dev-&gt;ean[1], dev-&gt;ean[0]);</div><div class='add'>+		ret = devlink_info_version_fixed_put(req,</div><div class='add'>+						     DEVLINK_INFO_VERSION_GENERIC_BOARD_ID,</div><div class='add'>+						     buf);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct devlink_ops kvaser_usb_devlink_ops = {</div><div class='add'>+	.info_get = kvaser_usb_devlink_info_get,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int kvaser_usb_devlink_port_register(struct kvaser_usb_net_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct devlink_port_attrs attrs = {</div><div class='add'>+		.flavour = DEVLINK_PORT_FLAVOUR_PHYSICAL,</div><div class='add'>+		.phys.port_number = priv-&gt;channel,</div><div class='add'>+	};</div><div class='add'>+	devlink_port_attrs_set(&amp;priv-&gt;devlink_port, &amp;attrs);</div><div class='add'>+</div><div class='add'>+	ret = devlink_port_register(priv_to_devlink(priv-&gt;dev),</div><div class='add'>+				    &amp;priv-&gt;devlink_port, priv-&gt;channel);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	SET_NETDEV_DEVLINK_PORT(priv-&gt;netdev, &amp;priv-&gt;devlink_port);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void kvaser_usb_devlink_port_unregister(struct kvaser_usb_net_priv *priv)</div><div class='add'>+{</div><div class='add'>+	devlink_port_unregister(&amp;priv-&gt;devlink_port);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/can/usb/kvaser_usb/kvaser_usb_hydra.c b/drivers/net/can/usb/kvaser_usb/kvaser_usb_hydra.c<br/>new file mode 100644<br/>index 000000000000..a59f20dad692<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/kvaser_usb/kvaser_usb_hydra.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/kvaser_usb/kvaser_usb_hydra.c</a></div><div class='hunk'>@@ -0,0 +1,2246 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Parts of this driver are based on the following:</div><div class='add'>+ *  - Kvaser linux mhydra driver (version 5.24)</div><div class='add'>+ *  - CAN driver for esd CAN-USB/2</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2018 KVASER AB, Sweden. All rights reserved.</div><div class='add'>+ * Copyright (C) 2010 Matthias Fuchs &lt;matthias.fuchs@esd.eu&gt;, esd gmbh</div><div class='add'>+ *</div><div class='add'>+ * Known issues:</div><div class='add'>+ *  - Transition from CAN_STATE_ERROR_WARNING to CAN_STATE_ERROR_ACTIVE is only</div><div class='add'>+ *    reported after a call to do_get_berr_counter(), since firmware does not</div><div class='add'>+ *    distinguish between ERROR_WARNING and ERROR_ACTIVE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/completion.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/gfp.h&gt;</div><div class='add'>+#include &lt;linux/jiffies.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/units.h&gt;</div><div class='add'>+#include &lt;linux/usb.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/can.h&gt;</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/can/error.h&gt;</div><div class='add'>+#include &lt;linux/can/netlink.h&gt;</div><div class='add'>+</div><div class='add'>+#include "kvaser_usb.h"</div><div class='add'>+</div><div class='add'>+/* Forward declarations */</div><div class='add'>+static const struct kvaser_usb_dev_cfg kvaser_usb_hydra_dev_cfg_kcan;</div><div class='add'>+static const struct kvaser_usb_dev_cfg kvaser_usb_hydra_dev_cfg_flexc;</div><div class='add'>+static const struct kvaser_usb_dev_cfg kvaser_usb_hydra_dev_cfg_rt;</div><div class='add'>+</div><div class='add'>+#define KVASER_USB_HYDRA_BULK_EP_IN_ADDR	0x82</div><div class='add'>+#define KVASER_USB_HYDRA_BULK_EP_OUT_ADDR	0x02</div><div class='add'>+</div><div class='add'>+#define KVASER_USB_HYDRA_MAX_TRANSID		0xff</div><div class='add'>+#define KVASER_USB_HYDRA_MIN_TRANSID		0x01</div><div class='add'>+</div><div class='add'>+/* Minihydra command IDs */</div><div class='add'>+#define CMD_SET_BUSPARAMS_REQ			16</div><div class='add'>+#define CMD_GET_BUSPARAMS_REQ			17</div><div class='add'>+#define CMD_GET_BUSPARAMS_RESP			18</div><div class='add'>+#define CMD_GET_CHIP_STATE_REQ			19</div><div class='add'>+#define CMD_CHIP_STATE_EVENT			20</div><div class='add'>+#define CMD_SET_DRIVERMODE_REQ			21</div><div class='add'>+#define CMD_START_CHIP_REQ			26</div><div class='add'>+#define CMD_START_CHIP_RESP			27</div><div class='add'>+#define CMD_STOP_CHIP_REQ			28</div><div class='add'>+#define CMD_STOP_CHIP_RESP			29</div><div class='add'>+#define CMD_TX_CAN_MESSAGE			33</div><div class='add'>+#define CMD_GET_CARD_INFO_REQ			34</div><div class='add'>+#define CMD_GET_CARD_INFO_RESP			35</div><div class='add'>+#define CMD_GET_SOFTWARE_INFO_REQ		38</div><div class='add'>+#define CMD_GET_SOFTWARE_INFO_RESP		39</div><div class='add'>+#define CMD_ERROR_EVENT				45</div><div class='add'>+#define CMD_FLUSH_QUEUE				48</div><div class='add'>+#define CMD_TX_ACKNOWLEDGE			50</div><div class='add'>+#define CMD_FLUSH_QUEUE_RESP			66</div><div class='add'>+#define CMD_SET_BUSPARAMS_FD_REQ		69</div><div class='add'>+#define CMD_SET_BUSPARAMS_FD_RESP		70</div><div class='add'>+#define CMD_SET_BUSPARAMS_RESP			85</div><div class='add'>+#define CMD_GET_CAPABILITIES_REQ		95</div><div class='add'>+#define CMD_GET_CAPABILITIES_RESP		96</div><div class='add'>+#define CMD_LED_ACTION_REQ			101</div><div class='add'>+#define CMD_LED_ACTION_RESP			102</div><div class='add'>+#define CMD_RX_MESSAGE				106</div><div class='add'>+#define CMD_MAP_CHANNEL_REQ			200</div><div class='add'>+#define CMD_MAP_CHANNEL_RESP			201</div><div class='add'>+#define CMD_GET_SOFTWARE_DETAILS_REQ		202</div><div class='add'>+#define CMD_GET_SOFTWARE_DETAILS_RESP		203</div><div class='add'>+#define CMD_EXTENDED				255</div><div class='add'>+</div><div class='add'>+/* Minihydra extended command IDs */</div><div class='add'>+#define CMD_TX_CAN_MESSAGE_FD			224</div><div class='add'>+#define CMD_TX_ACKNOWLEDGE_FD			225</div><div class='add'>+#define CMD_RX_MESSAGE_FD			226</div><div class='add'>+</div><div class='add'>+/* Hydra commands are handled by different threads in firmware.</div><div class='add'>+ * The threads are denoted hydra entity (HE). Each HE got a unique 6-bit</div><div class='add'>+ * address. The address is used in hydra commands to get/set source and</div><div class='add'>+ * destination HE. There are two predefined HE addresses, the remaining</div><div class='add'>+ * addresses are different between devices and firmware versions. Hence, we need</div><div class='add'>+ * to enumerate the addresses (see kvaser_usb_hydra_map_channel()).</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Well-known HE addresses */</div><div class='add'>+#define KVASER_USB_HYDRA_HE_ADDRESS_ROUTER	0x00</div><div class='add'>+#define KVASER_USB_HYDRA_HE_ADDRESS_ILLEGAL	0x3e</div><div class='add'>+</div><div class='add'>+#define KVASER_USB_HYDRA_TRANSID_CANHE		0x40</div><div class='add'>+#define KVASER_USB_HYDRA_TRANSID_SYSDBG		0x61</div><div class='add'>+</div><div class='add'>+struct kvaser_cmd_map_ch_req {</div><div class='add'>+	char name[16];</div><div class='add'>+	u8 channel;</div><div class='add'>+	u8 reserved[11];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct kvaser_cmd_map_ch_res {</div><div class='add'>+	u8 he_addr;</div><div class='add'>+	u8 channel;</div><div class='add'>+	u8 reserved[26];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct kvaser_cmd_card_info {</div><div class='add'>+	__le32 serial_number;</div><div class='add'>+	__le32 clock_res;</div><div class='add'>+	__le32 mfg_date;</div><div class='add'>+	__le32 ean[2];</div><div class='add'>+	u8 hw_revision;</div><div class='add'>+	u8 usb_mode;</div><div class='add'>+	u8 hw_type;</div><div class='add'>+	u8 reserved0;</div><div class='add'>+	u8 nchannels;</div><div class='add'>+	u8 reserved1[3];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct kvaser_cmd_sw_info {</div><div class='add'>+	u8 reserved0[8];</div><div class='add'>+	__le16 max_outstanding_tx;</div><div class='add'>+	u8 reserved1[18];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct kvaser_cmd_sw_detail_req {</div><div class='add'>+	u8 use_ext_cmd;</div><div class='add'>+	u8 reserved[27];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* Software detail flags */</div><div class='add'>+#define KVASER_USB_HYDRA_SW_FLAG_FW_BETA	BIT(2)</div><div class='add'>+#define KVASER_USB_HYDRA_SW_FLAG_FW_BAD		BIT(4)</div><div class='add'>+#define KVASER_USB_HYDRA_SW_FLAG_FREQ_80M	BIT(5)</div><div class='add'>+#define KVASER_USB_HYDRA_SW_FLAG_EXT_CMD	BIT(9)</div><div class='add'>+#define KVASER_USB_HYDRA_SW_FLAG_CANFD		BIT(10)</div><div class='add'>+#define KVASER_USB_HYDRA_SW_FLAG_NONISO		BIT(11)</div><div class='add'>+#define KVASER_USB_HYDRA_SW_FLAG_EXT_CAP	BIT(12)</div><div class='add'>+#define KVASER_USB_HYDRA_SW_FLAG_CAN_FREQ_80M	BIT(13)</div><div class='add'>+struct kvaser_cmd_sw_detail_res {</div><div class='add'>+	__le32 sw_flags;</div><div class='add'>+	__le32 sw_version;</div><div class='add'>+	__le32 sw_name;</div><div class='add'>+	__le32 ean[2];</div><div class='add'>+	__le32 max_bitrate;</div><div class='add'>+	u8 reserved[4];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* Sub commands for cap_req and cap_res */</div><div class='add'>+#define KVASER_USB_HYDRA_CAP_CMD_LISTEN_MODE	0x02</div><div class='add'>+#define KVASER_USB_HYDRA_CAP_CMD_ERR_REPORT	0x05</div><div class='add'>+#define KVASER_USB_HYDRA_CAP_CMD_ONE_SHOT	0x06</div><div class='add'>+struct kvaser_cmd_cap_req {</div><div class='add'>+	__le16 cap_cmd;</div><div class='add'>+	u8 reserved[26];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* Status codes for cap_res */</div><div class='add'>+#define KVASER_USB_HYDRA_CAP_STAT_OK		0x00</div><div class='add'>+#define KVASER_USB_HYDRA_CAP_STAT_NOT_IMPL	0x01</div><div class='add'>+#define KVASER_USB_HYDRA_CAP_STAT_UNAVAIL	0x02</div><div class='add'>+struct kvaser_cmd_cap_res {</div><div class='add'>+	__le16 cap_cmd;</div><div class='add'>+	__le16 status;</div><div class='add'>+	__le32 mask;</div><div class='add'>+	__le32 value;</div><div class='add'>+	u8 reserved[16];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* CMD_ERROR_EVENT error codes */</div><div class='add'>+#define KVASER_USB_HYDRA_ERROR_EVENT_CAN	0x01</div><div class='add'>+#define KVASER_USB_HYDRA_ERROR_EVENT_PARAM	0x09</div><div class='add'>+struct kvaser_cmd_error_event {</div><div class='add'>+	__le16 timestamp[3];</div><div class='add'>+	u8 reserved;</div><div class='add'>+	u8 error_code;</div><div class='add'>+	__le16 info1;</div><div class='add'>+	__le16 info2;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* Chip state status flags. Used for chip_state_event and err_frame_data. */</div><div class='add'>+#define KVASER_USB_HYDRA_BUS_ERR_ACT		0x00</div><div class='add'>+#define KVASER_USB_HYDRA_BUS_ERR_PASS		BIT(5)</div><div class='add'>+#define KVASER_USB_HYDRA_BUS_BUS_OFF		BIT(6)</div><div class='add'>+struct kvaser_cmd_chip_state_event {</div><div class='add'>+	__le16 timestamp[3];</div><div class='add'>+	u8 tx_err_counter;</div><div class='add'>+	u8 rx_err_counter;</div><div class='add'>+	u8 bus_status;</div><div class='add'>+	u8 reserved[19];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* Busparam modes */</div><div class='add'>+#define KVASER_USB_HYDRA_BUS_MODE_CAN		0x00</div><div class='add'>+#define KVASER_USB_HYDRA_BUS_MODE_CANFD_ISO	0x01</div><div class='add'>+#define KVASER_USB_HYDRA_BUS_MODE_NONISO	0x02</div><div class='add'>+struct kvaser_cmd_set_busparams {</div><div class='add'>+	struct kvaser_usb_busparams busparams_nominal;</div><div class='add'>+	u8 reserved0[4];</div><div class='add'>+	struct kvaser_usb_busparams busparams_data;</div><div class='add'>+	u8 canfd_mode;</div><div class='add'>+	u8 reserved1[7];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* Busparam type */</div><div class='add'>+#define KVASER_USB_HYDRA_BUSPARAM_TYPE_CAN	0x00</div><div class='add'>+#define KVASER_USB_HYDRA_BUSPARAM_TYPE_CANFD	0x01</div><div class='add'>+struct kvaser_cmd_get_busparams_req {</div><div class='add'>+	u8 type;</div><div class='add'>+	u8 reserved[27];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct kvaser_cmd_get_busparams_res {</div><div class='add'>+	struct kvaser_usb_busparams busparams;</div><div class='add'>+	u8 reserved[20];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* The device has two LEDs per CAN channel</div><div class='add'>+ * The LSB of action field controls the state:</div><div class='add'>+ *   0 = ON</div><div class='add'>+ *   1 = OFF</div><div class='add'>+ * The remaining bits of action field is the LED index</div><div class='add'>+ */</div><div class='add'>+#define KVASER_USB_HYDRA_LED_IDX_MASK GENMASK(31, 1)</div><div class='add'>+#define KVASER_USB_HYDRA_LED_YELLOW_CH0_IDX 3</div><div class='add'>+#define KVASER_USB_HYDRA_LEDS_PER_CHANNEL 2</div><div class='add'>+struct kvaser_cmd_led_action_req {</div><div class='add'>+	u8 action;</div><div class='add'>+	u8 padding;</div><div class='add'>+	__le16 duration_ms;</div><div class='add'>+	u8 reserved[24];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* Ctrl modes */</div><div class='add'>+#define KVASER_USB_HYDRA_CTRLMODE_NORMAL	0x01</div><div class='add'>+#define KVASER_USB_HYDRA_CTRLMODE_LISTEN	0x02</div><div class='add'>+struct kvaser_cmd_set_ctrlmode {</div><div class='add'>+	u8 mode;</div><div class='add'>+	u8 reserved[27];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct kvaser_err_frame_data {</div><div class='add'>+	u8 bus_status;</div><div class='add'>+	u8 reserved0;</div><div class='add'>+	u8 tx_err_counter;</div><div class='add'>+	u8 rx_err_counter;</div><div class='add'>+	u8 reserved1[4];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct kvaser_cmd_rx_can {</div><div class='add'>+	u8 cmd_len;</div><div class='add'>+	u8 cmd_no;</div><div class='add'>+	u8 channel;</div><div class='add'>+	u8 flags;</div><div class='add'>+	__le16 timestamp[3];</div><div class='add'>+	u8 dlc;</div><div class='add'>+	u8 padding;</div><div class='add'>+	__le32 id;</div><div class='add'>+	union {</div><div class='add'>+		u8 data[8];</div><div class='add'>+		struct kvaser_err_frame_data err_frame_data;</div><div class='add'>+	};</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* Extended CAN ID flag. Used in rx_can and tx_can */</div><div class='add'>+#define KVASER_USB_HYDRA_EXTENDED_FRAME_ID	BIT(31)</div><div class='add'>+struct kvaser_cmd_tx_can {</div><div class='add'>+	__le32 id;</div><div class='add'>+	u8 data[8];</div><div class='add'>+	u8 dlc;</div><div class='add'>+	u8 flags;</div><div class='add'>+	__le16 transid;</div><div class='add'>+	u8 channel;</div><div class='add'>+	u8 reserved[11];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct kvaser_cmd_tx_ack {</div><div class='add'>+	__le32 id;</div><div class='add'>+	u8 data[8];</div><div class='add'>+	u8 dlc;</div><div class='add'>+	u8 flags;</div><div class='add'>+	__le16 timestamp[3];</div><div class='add'>+	u8 reserved0[8];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct kvaser_cmd_header {</div><div class='add'>+	u8 cmd_no;</div><div class='add'>+	/* The destination HE address is stored in 0..5 of he_addr.</div><div class='add'>+	 * The upper part of source HE address is stored in 6..7 of he_addr, and</div><div class='add'>+	 * the lower part is stored in 12..15 of transid.</div><div class='add'>+	 */</div><div class='add'>+	u8 he_addr;</div><div class='add'>+	__le16 transid;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct kvaser_cmd {</div><div class='add'>+	struct kvaser_cmd_header header;</div><div class='add'>+	union {</div><div class='add'>+		struct kvaser_cmd_map_ch_req map_ch_req;</div><div class='add'>+		struct kvaser_cmd_map_ch_res map_ch_res;</div><div class='add'>+</div><div class='add'>+		struct kvaser_cmd_card_info card_info;</div><div class='add'>+		struct kvaser_cmd_sw_info sw_info;</div><div class='add'>+		struct kvaser_cmd_sw_detail_req sw_detail_req;</div><div class='add'>+		struct kvaser_cmd_sw_detail_res sw_detail_res;</div><div class='add'>+</div><div class='add'>+		struct kvaser_cmd_cap_req cap_req;</div><div class='add'>+		struct kvaser_cmd_cap_res cap_res;</div><div class='add'>+</div><div class='add'>+		struct kvaser_cmd_error_event error_event;</div><div class='add'>+</div><div class='add'>+		struct kvaser_cmd_set_busparams set_busparams_req;</div><div class='add'>+		struct kvaser_cmd_get_busparams_req get_busparams_req;</div><div class='add'>+		struct kvaser_cmd_get_busparams_res get_busparams_res;</div><div class='add'>+</div><div class='add'>+		struct kvaser_cmd_led_action_req led_action_req;</div><div class='add'>+</div><div class='add'>+		struct kvaser_cmd_chip_state_event chip_state_event;</div><div class='add'>+</div><div class='add'>+		struct kvaser_cmd_set_ctrlmode set_ctrlmode;</div><div class='add'>+</div><div class='add'>+		struct kvaser_cmd_rx_can rx_can;</div><div class='add'>+		struct kvaser_cmd_tx_can tx_can;</div><div class='add'>+		struct kvaser_cmd_tx_ack tx_ack;</div><div class='add'>+	} __packed;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* CAN frame flags. Used in rx_can, ext_rx_can, tx_can and ext_tx_can */</div><div class='add'>+#define KVASER_USB_HYDRA_CF_FLAG_ERROR_FRAME	BIT(0)</div><div class='add'>+#define KVASER_USB_HYDRA_CF_FLAG_OVERRUN	BIT(1)</div><div class='add'>+#define KVASER_USB_HYDRA_CF_FLAG_REMOTE_FRAME	BIT(4)</div><div class='add'>+#define KVASER_USB_HYDRA_CF_FLAG_EXTENDED_ID	BIT(5)</div><div class='add'>+#define KVASER_USB_HYDRA_CF_FLAG_TX_ACK		BIT(6)</div><div class='add'>+/* CAN frame flags. Used in ext_rx_can and ext_tx_can */</div><div class='add'>+#define KVASER_USB_HYDRA_CF_FLAG_OSM_NACK	BIT(12)</div><div class='add'>+#define KVASER_USB_HYDRA_CF_FLAG_ABL		BIT(13)</div><div class='add'>+#define KVASER_USB_HYDRA_CF_FLAG_FDF		BIT(16)</div><div class='add'>+#define KVASER_USB_HYDRA_CF_FLAG_BRS		BIT(17)</div><div class='add'>+#define KVASER_USB_HYDRA_CF_FLAG_ESI		BIT(18)</div><div class='add'>+</div><div class='add'>+/* KCAN packet header macros. Used in ext_rx_can and ext_tx_can */</div><div class='add'>+#define KVASER_USB_KCAN_DATA_DLC_BITS		4</div><div class='add'>+#define KVASER_USB_KCAN_DATA_DLC_SHIFT		8</div><div class='add'>+#define KVASER_USB_KCAN_DATA_DLC_MASK \</div><div class='add'>+				GENMASK(KVASER_USB_KCAN_DATA_DLC_BITS - 1 + \</div><div class='add'>+				KVASER_USB_KCAN_DATA_DLC_SHIFT, \</div><div class='add'>+				KVASER_USB_KCAN_DATA_DLC_SHIFT)</div><div class='add'>+</div><div class='add'>+#define KVASER_USB_KCAN_DATA_BRS		BIT(14)</div><div class='add'>+#define KVASER_USB_KCAN_DATA_FDF		BIT(15)</div><div class='add'>+#define KVASER_USB_KCAN_DATA_OSM		BIT(16)</div><div class='add'>+#define KVASER_USB_KCAN_DATA_AREQ		BIT(31)</div><div class='add'>+#define KVASER_USB_KCAN_DATA_SRR		BIT(31)</div><div class='add'>+#define KVASER_USB_KCAN_DATA_RTR		BIT(29)</div><div class='add'>+#define KVASER_USB_KCAN_DATA_IDE		BIT(30)</div><div class='add'>+struct kvaser_cmd_ext_rx_can {</div><div class='add'>+	__le32 flags;</div><div class='add'>+	__le32 id;</div><div class='add'>+	__le32 kcan_id;</div><div class='add'>+	__le32 kcan_header;</div><div class='add'>+	__le64 timestamp;</div><div class='add'>+	union {</div><div class='add'>+		u8 kcan_payload[64];</div><div class='add'>+		struct kvaser_err_frame_data err_frame_data;</div><div class='add'>+	};</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct kvaser_cmd_ext_tx_can {</div><div class='add'>+	__le32 flags;</div><div class='add'>+	__le32 id;</div><div class='add'>+	__le32 kcan_id;</div><div class='add'>+	__le32 kcan_header;</div><div class='add'>+	u8 databytes;</div><div class='add'>+	u8 dlc;</div><div class='add'>+	u8 reserved[6];</div><div class='add'>+	u8 kcan_payload[64];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct kvaser_cmd_ext_tx_ack {</div><div class='add'>+	__le32 flags;</div><div class='add'>+	u8 reserved0[4];</div><div class='add'>+	__le64 timestamp;</div><div class='add'>+	u8 reserved1[8];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* struct for extended commands (CMD_EXTENDED) */</div><div class='add'>+struct kvaser_cmd_ext {</div><div class='add'>+	struct kvaser_cmd_header header;</div><div class='add'>+	__le16 len;</div><div class='add'>+	u8 cmd_no_ext;</div><div class='add'>+	u8 reserved;</div><div class='add'>+</div><div class='add'>+	union {</div><div class='add'>+		struct kvaser_cmd_ext_rx_can rx_can;</div><div class='add'>+		struct kvaser_cmd_ext_tx_can tx_can;</div><div class='add'>+		struct kvaser_cmd_ext_tx_ack tx_ack;</div><div class='add'>+	} __packed;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct kvaser_usb_net_hydra_priv {</div><div class='add'>+	int pending_get_busparams_type;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const kvaser_usb_hydra_kcan_bittiming_c = {</div><div class='add'>+	.name = "kvaser_usb_kcan",</div><div class='add'>+	.tseg1_min = 1,</div><div class='add'>+	.tseg1_max = 255,</div><div class='add'>+	.tseg2_min = 1,</div><div class='add'>+	.tseg2_max = 32,</div><div class='add'>+	.sjw_max = 16,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 8192,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct can_bittiming_const kvaser_usb_flexc_bittiming_const = {</div><div class='add'>+	.name = "kvaser_usb_flex",</div><div class='add'>+	.tseg1_min = 4,</div><div class='add'>+	.tseg1_max = 16,</div><div class='add'>+	.tseg2_min = 2,</div><div class='add'>+	.tseg2_max = 8,</div><div class='add'>+	.sjw_max = 4,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 256,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const kvaser_usb_hydra_rt_bittiming_c = {</div><div class='add'>+	.name = "kvaser_usb_rt",</div><div class='add'>+	.tseg1_min = 2,</div><div class='add'>+	.tseg1_max = 96,</div><div class='add'>+	.tseg2_min = 2,</div><div class='add'>+	.tseg2_max = 32,</div><div class='add'>+	.sjw_max = 32,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 1024,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const kvaser_usb_hydra_rtd_bittiming_c = {</div><div class='add'>+	.name = "kvaser_usb_rt",</div><div class='add'>+	.tseg1_min = 2,</div><div class='add'>+	.tseg1_max = 39,</div><div class='add'>+	.tseg2_min = 2,</div><div class='add'>+	.tseg2_max = 8,</div><div class='add'>+	.sjw_max = 8,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 1024,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define KVASER_USB_HYDRA_TRANSID_BITS		12</div><div class='add'>+#define KVASER_USB_HYDRA_TRANSID_MASK \</div><div class='add'>+				GENMASK(KVASER_USB_HYDRA_TRANSID_BITS - 1, 0)</div><div class='add'>+#define KVASER_USB_HYDRA_HE_ADDR_SRC_MASK	GENMASK(7, 6)</div><div class='add'>+#define KVASER_USB_HYDRA_HE_ADDR_DEST_MASK	GENMASK(5, 0)</div><div class='add'>+#define KVASER_USB_HYDRA_HE_ADDR_SRC_BITS	2</div><div class='add'>+static inline u16 kvaser_usb_hydra_get_cmd_transid(const struct kvaser_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	return le16_to_cpu(cmd-&gt;header.transid) &amp; KVASER_USB_HYDRA_TRANSID_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void kvaser_usb_hydra_set_cmd_transid(struct kvaser_cmd *cmd,</div><div class='add'>+						    u16 transid)</div><div class='add'>+{</div><div class='add'>+	cmd-&gt;header.transid =</div><div class='add'>+			cpu_to_le16(transid &amp; KVASER_USB_HYDRA_TRANSID_MASK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u8 kvaser_usb_hydra_get_cmd_src_he(const struct kvaser_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	return (cmd-&gt;header.he_addr &amp; KVASER_USB_HYDRA_HE_ADDR_SRC_MASK) &gt;&gt;</div><div class='add'>+		KVASER_USB_HYDRA_HE_ADDR_SRC_BITS |</div><div class='add'>+		le16_to_cpu(cmd-&gt;header.transid) &gt;&gt;</div><div class='add'>+		KVASER_USB_HYDRA_TRANSID_BITS;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void kvaser_usb_hydra_set_cmd_dest_he(struct kvaser_cmd *cmd,</div><div class='add'>+						    u8 dest_he)</div><div class='add'>+{</div><div class='add'>+	cmd-&gt;header.he_addr =</div><div class='add'>+		(cmd-&gt;header.he_addr &amp; KVASER_USB_HYDRA_HE_ADDR_SRC_MASK) |</div><div class='add'>+		(dest_he &amp; KVASER_USB_HYDRA_HE_ADDR_DEST_MASK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 kvaser_usb_hydra_channel_from_cmd(const struct kvaser_usb *dev,</div><div class='add'>+					    const struct kvaser_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	u8 channel = 0xff;</div><div class='add'>+	u8 src_he = kvaser_usb_hydra_get_cmd_src_he(cmd);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; KVASER_USB_MAX_NET_DEVICES; i++) {</div><div class='add'>+		if (dev-&gt;card_data.hydra.channel_to_he[i] == src_he) {</div><div class='add'>+			channel = i;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return channel;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 kvaser_usb_hydra_get_next_transid(struct kvaser_usb *dev)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u16 transid;</div><div class='add'>+	struct kvaser_usb_dev_card_data_hydra *card_data =</div><div class='add'>+							&amp;dev-&gt;card_data.hydra;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;card_data-&gt;transid_lock, flags);</div><div class='add'>+	transid = card_data-&gt;transid;</div><div class='add'>+	if (transid &gt;= KVASER_USB_HYDRA_MAX_TRANSID)</div><div class='add'>+		transid = KVASER_USB_HYDRA_MIN_TRANSID;</div><div class='add'>+	else</div><div class='add'>+		transid++;</div><div class='add'>+	card_data-&gt;transid = transid;</div><div class='add'>+	spin_unlock_irqrestore(&amp;card_data-&gt;transid_lock, flags);</div><div class='add'>+</div><div class='add'>+	return transid;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t kvaser_usb_hydra_cmd_size(struct kvaser_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	size_t ret;</div><div class='add'>+</div><div class='add'>+	if (cmd-&gt;header.cmd_no == CMD_EXTENDED)</div><div class='add'>+		ret = le16_to_cpu(((struct kvaser_cmd_ext *)cmd)-&gt;len);</div><div class='add'>+	else</div><div class='add'>+		ret = sizeof(struct kvaser_cmd);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct kvaser_usb_net_priv *</div><div class='add'>+kvaser_usb_hydra_net_priv_from_cmd(const struct kvaser_usb *dev,</div><div class='add'>+				   const struct kvaser_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb_net_priv *priv = NULL;</div><div class='add'>+	u8 channel = kvaser_usb_hydra_channel_from_cmd(dev, cmd);</div><div class='add'>+</div><div class='add'>+	if (channel &gt;= dev-&gt;nchannels)</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			"Invalid channel number (%d)\n", channel);</div><div class='add'>+	else</div><div class='add'>+		priv = dev-&gt;nets[channel];</div><div class='add'>+</div><div class='add'>+	return priv;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ktime_t kvaser_usb_hydra_ktime_from_cmd(const struct kvaser_usb_dev_cfg *cfg,</div><div class='add'>+					       const struct kvaser_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	ktime_t hwtstamp = 0;</div><div class='add'>+</div><div class='add'>+	if (cmd-&gt;header.cmd_no == CMD_EXTENDED) {</div><div class='add'>+		struct kvaser_cmd_ext *cmd_ext = (struct kvaser_cmd_ext *)cmd;</div><div class='add'>+</div><div class='add'>+		if (cmd_ext-&gt;cmd_no_ext == CMD_RX_MESSAGE_FD)</div><div class='add'>+			hwtstamp = kvaser_usb_timestamp64_to_ktime(cfg, cmd_ext-&gt;rx_can.timestamp);</div><div class='add'>+		else if (cmd_ext-&gt;cmd_no_ext == CMD_TX_ACKNOWLEDGE_FD)</div><div class='add'>+			hwtstamp = kvaser_usb_timestamp64_to_ktime(cfg, cmd_ext-&gt;tx_ack.timestamp);</div><div class='add'>+	} else if (cmd-&gt;header.cmd_no == CMD_RX_MESSAGE) {</div><div class='add'>+		hwtstamp = kvaser_usb_timestamp48_to_ktime(cfg, cmd-&gt;rx_can.timestamp);</div><div class='add'>+	} else if (cmd-&gt;header.cmd_no == CMD_TX_ACKNOWLEDGE) {</div><div class='add'>+		hwtstamp = kvaser_usb_timestamp48_to_ktime(cfg, cmd-&gt;tx_ack.timestamp);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return hwtstamp;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_hydra_send_simple_cmd(struct kvaser_usb *dev,</div><div class='add'>+					    u8 cmd_no, int channel)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_cmd *cmd;</div><div class='add'>+	size_t cmd_len;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;header.cmd_no = cmd_no;</div><div class='add'>+	cmd_len = kvaser_usb_hydra_cmd_size(cmd);</div><div class='add'>+	if (channel &lt; 0) {</div><div class='add'>+		kvaser_usb_hydra_set_cmd_dest_he</div><div class='add'>+				(cmd, KVASER_USB_HYDRA_HE_ADDRESS_ILLEGAL);</div><div class='add'>+	} else {</div><div class='add'>+		if (channel &gt;= KVASER_USB_MAX_NET_DEVICES) {</div><div class='add'>+			dev_err(&amp;dev-&gt;intf-&gt;dev, "channel (%d) out of range.\n",</div><div class='add'>+				channel);</div><div class='add'>+			err = -EINVAL;</div><div class='add'>+			goto end;</div><div class='add'>+		}</div><div class='add'>+		kvaser_usb_hydra_set_cmd_dest_he</div><div class='add'>+			(cmd, dev-&gt;card_data.hydra.channel_to_he[channel]);</div><div class='add'>+	}</div><div class='add'>+	kvaser_usb_hydra_set_cmd_transid</div><div class='add'>+				(cmd, kvaser_usb_hydra_get_next_transid(dev));</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_send_cmd(dev, cmd, cmd_len);</div><div class='add'>+	if (err)</div><div class='add'>+		goto end;</div><div class='add'>+</div><div class='add'>+end:</div><div class='add'>+	kfree(cmd);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+kvaser_usb_hydra_send_simple_cmd_async(struct kvaser_usb_net_priv *priv,</div><div class='add'>+				       u8 cmd_no)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_cmd *cmd;</div><div class='add'>+	struct kvaser_usb *dev = priv-&gt;dev;</div><div class='add'>+	size_t cmd_len;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	cmd = kzalloc(sizeof(*cmd), GFP_ATOMIC);</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;header.cmd_no = cmd_no;</div><div class='add'>+	cmd_len = kvaser_usb_hydra_cmd_size(cmd);</div><div class='add'>+</div><div class='add'>+	kvaser_usb_hydra_set_cmd_dest_he</div><div class='add'>+		(cmd, dev-&gt;card_data.hydra.channel_to_he[priv-&gt;channel]);</div><div class='add'>+	kvaser_usb_hydra_set_cmd_transid</div><div class='add'>+				(cmd, kvaser_usb_hydra_get_next_transid(dev));</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_send_cmd_async(priv, cmd, cmd_len);</div><div class='add'>+	if (err)</div><div class='add'>+		kfree(cmd);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This function is used for synchronously waiting on hydra control commands.</div><div class='add'>+ * Note: Compared to kvaser_usb_hydra_read_bulk_callback(), we never need to</div><div class='add'>+ *       handle partial hydra commands. Since hydra control commands are always</div><div class='add'>+ *       non-extended commands.</div><div class='add'>+ */</div><div class='add'>+static int kvaser_usb_hydra_wait_cmd(const struct kvaser_usb *dev, u8 cmd_no,</div><div class='add'>+				     struct kvaser_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	void *buf;</div><div class='add'>+	int err;</div><div class='add'>+	unsigned long timeout = jiffies + msecs_to_jiffies(KVASER_USB_TIMEOUT);</div><div class='add'>+</div><div class='add'>+	if (cmd-&gt;header.cmd_no == CMD_EXTENDED) {</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev, "Wait for CMD_EXTENDED not allowed\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	buf = kzalloc(KVASER_USB_RX_BUFFER_SIZE, GFP_KERNEL);</div><div class='add'>+	if (!buf)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		int actual_len = 0;</div><div class='add'>+		int pos = 0;</div><div class='add'>+</div><div class='add'>+		err = kvaser_usb_recv_cmd(dev, buf, KVASER_USB_RX_BUFFER_SIZE,</div><div class='add'>+					  &amp;actual_len);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			goto end;</div><div class='add'>+</div><div class='add'>+		while (pos &lt; actual_len) {</div><div class='add'>+			struct kvaser_cmd *tmp_cmd;</div><div class='add'>+			size_t cmd_len;</div><div class='add'>+</div><div class='add'>+			tmp_cmd = buf + pos;</div><div class='add'>+			cmd_len = kvaser_usb_hydra_cmd_size(tmp_cmd);</div><div class='add'>+			if (pos + cmd_len &gt; actual_len) {</div><div class='add'>+				dev_err_ratelimited(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+						    "Format error\n");</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (tmp_cmd-&gt;header.cmd_no == cmd_no) {</div><div class='add'>+				memcpy(cmd, tmp_cmd, cmd_len);</div><div class='add'>+				goto end;</div><div class='add'>+			}</div><div class='add'>+			pos += cmd_len;</div><div class='add'>+		}</div><div class='add'>+	} while (time_before(jiffies, timeout));</div><div class='add'>+</div><div class='add'>+	err = -EINVAL;</div><div class='add'>+</div><div class='add'>+end:</div><div class='add'>+	kfree(buf);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_hydra_map_channel_resp(struct kvaser_usb *dev,</div><div class='add'>+					     const struct kvaser_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	u8 he, channel;</div><div class='add'>+	u16 transid = kvaser_usb_hydra_get_cmd_transid(cmd);</div><div class='add'>+	struct kvaser_usb_dev_card_data_hydra *card_data =</div><div class='add'>+							&amp;dev-&gt;card_data.hydra;</div><div class='add'>+</div><div class='add'>+	if (transid &gt; 0x007f || transid &lt; 0x0040) {</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			"CMD_MAP_CHANNEL_RESP, invalid transid: 0x%x\n",</div><div class='add'>+			transid);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (transid) {</div><div class='add'>+	case KVASER_USB_HYDRA_TRANSID_CANHE:</div><div class='add'>+	case KVASER_USB_HYDRA_TRANSID_CANHE + 1:</div><div class='add'>+	case KVASER_USB_HYDRA_TRANSID_CANHE + 2:</div><div class='add'>+	case KVASER_USB_HYDRA_TRANSID_CANHE + 3:</div><div class='add'>+	case KVASER_USB_HYDRA_TRANSID_CANHE + 4:</div><div class='add'>+		channel = transid &amp; 0x000f;</div><div class='add'>+		he = cmd-&gt;map_ch_res.he_addr;</div><div class='add'>+		card_data-&gt;channel_to_he[channel] = he;</div><div class='add'>+		break;</div><div class='add'>+	case KVASER_USB_HYDRA_TRANSID_SYSDBG:</div><div class='add'>+		card_data-&gt;sysdbg_he = cmd-&gt;map_ch_res.he_addr;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_warn(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			 "Unknown CMD_MAP_CHANNEL_RESP transid=0x%x\n",</div><div class='add'>+			 transid);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_hydra_map_channel(struct kvaser_usb *dev, u16 transid,</div><div class='add'>+					u8 channel, const char *name)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_cmd *cmd;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	strcpy(cmd-&gt;map_ch_req.name, name);</div><div class='add'>+	cmd-&gt;header.cmd_no = CMD_MAP_CHANNEL_REQ;</div><div class='add'>+	kvaser_usb_hydra_set_cmd_dest_he</div><div class='add'>+				(cmd, KVASER_USB_HYDRA_HE_ADDRESS_ROUTER);</div><div class='add'>+	cmd-&gt;map_ch_req.channel = channel;</div><div class='add'>+</div><div class='add'>+	kvaser_usb_hydra_set_cmd_transid(cmd, transid);</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_send_cmd(dev, cmd, kvaser_usb_hydra_cmd_size(cmd));</div><div class='add'>+	if (err)</div><div class='add'>+		goto end;</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_hydra_wait_cmd(dev, CMD_MAP_CHANNEL_RESP, cmd);</div><div class='add'>+	if (err)</div><div class='add'>+		goto end;</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_hydra_map_channel_resp(dev, cmd);</div><div class='add'>+	if (err)</div><div class='add'>+		goto end;</div><div class='add'>+</div><div class='add'>+end:</div><div class='add'>+	kfree(cmd);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_hydra_get_single_capability(struct kvaser_usb *dev,</div><div class='add'>+						  u16 cap_cmd_req, u16 *status)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb_dev_card_data *card_data = &amp;dev-&gt;card_data;</div><div class='add'>+	struct kvaser_cmd *cmd;</div><div class='add'>+	size_t cmd_len;</div><div class='add'>+	u32 value = 0;</div><div class='add'>+	u32 mask = 0;</div><div class='add'>+	u16 cap_cmd_res;</div><div class='add'>+	int err;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;header.cmd_no = CMD_GET_CAPABILITIES_REQ;</div><div class='add'>+	cmd_len = kvaser_usb_hydra_cmd_size(cmd);</div><div class='add'>+	cmd-&gt;cap_req.cap_cmd = cpu_to_le16(cap_cmd_req);</div><div class='add'>+</div><div class='add'>+	kvaser_usb_hydra_set_cmd_dest_he(cmd, card_data-&gt;hydra.sysdbg_he);</div><div class='add'>+	kvaser_usb_hydra_set_cmd_transid</div><div class='add'>+				(cmd, kvaser_usb_hydra_get_next_transid(dev));</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_send_cmd(dev, cmd, cmd_len);</div><div class='add'>+	if (err)</div><div class='add'>+		goto end;</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_hydra_wait_cmd(dev, CMD_GET_CAPABILITIES_RESP, cmd);</div><div class='add'>+	if (err)</div><div class='add'>+		goto end;</div><div class='add'>+</div><div class='add'>+	*status = le16_to_cpu(cmd-&gt;cap_res.status);</div><div class='add'>+</div><div class='add'>+	if (*status != KVASER_USB_HYDRA_CAP_STAT_OK)</div><div class='add'>+		goto end;</div><div class='add'>+</div><div class='add'>+	cap_cmd_res = le16_to_cpu(cmd-&gt;cap_res.cap_cmd);</div><div class='add'>+	switch (cap_cmd_res) {</div><div class='add'>+	case KVASER_USB_HYDRA_CAP_CMD_LISTEN_MODE:</div><div class='add'>+	case KVASER_USB_HYDRA_CAP_CMD_ERR_REPORT:</div><div class='add'>+	case KVASER_USB_HYDRA_CAP_CMD_ONE_SHOT:</div><div class='add'>+		value = le32_to_cpu(cmd-&gt;cap_res.value);</div><div class='add'>+		mask = le32_to_cpu(cmd-&gt;cap_res.mask);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_warn(&amp;dev-&gt;intf-&gt;dev, "Unknown capability command %u\n",</div><div class='add'>+			 cap_cmd_res);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; dev-&gt;nchannels; i++) {</div><div class='add'>+		if (BIT(i) &amp; (value &amp; mask)) {</div><div class='add'>+			switch (cap_cmd_res) {</div><div class='add'>+			case KVASER_USB_HYDRA_CAP_CMD_LISTEN_MODE:</div><div class='add'>+				card_data-&gt;ctrlmode_supported |=</div><div class='add'>+						CAN_CTRLMODE_LISTENONLY;</div><div class='add'>+				break;</div><div class='add'>+			case KVASER_USB_HYDRA_CAP_CMD_ERR_REPORT:</div><div class='add'>+				card_data-&gt;capabilities |=</div><div class='add'>+						KVASER_USB_CAP_BERR_CAP;</div><div class='add'>+				break;</div><div class='add'>+			case KVASER_USB_HYDRA_CAP_CMD_ONE_SHOT:</div><div class='add'>+				card_data-&gt;ctrlmode_supported |=</div><div class='add'>+						CAN_CTRLMODE_ONE_SHOT;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+end:</div><div class='add'>+	kfree(cmd);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_hydra_start_chip_reply(const struct kvaser_usb *dev,</div><div class='add'>+					      const struct kvaser_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb_net_priv *priv;</div><div class='add'>+</div><div class='add'>+	priv = kvaser_usb_hydra_net_priv_from_cmd(dev, cmd);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (completion_done(&amp;priv-&gt;start_comp) &amp;&amp;</div><div class='add'>+	    netif_queue_stopped(priv-&gt;netdev)) {</div><div class='add'>+		netif_wake_queue(priv-&gt;netdev);</div><div class='add'>+	} else {</div><div class='add'>+		netif_start_queue(priv-&gt;netdev);</div><div class='add'>+		complete(&amp;priv-&gt;start_comp);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_hydra_stop_chip_reply(const struct kvaser_usb *dev,</div><div class='add'>+					     const struct kvaser_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb_net_priv *priv;</div><div class='add'>+</div><div class='add'>+	priv = kvaser_usb_hydra_net_priv_from_cmd(dev, cmd);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	complete(&amp;priv-&gt;stop_comp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_hydra_flush_queue_reply(const struct kvaser_usb *dev,</div><div class='add'>+					       const struct kvaser_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb_net_priv *priv;</div><div class='add'>+</div><div class='add'>+	priv = kvaser_usb_hydra_net_priv_from_cmd(dev, cmd);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	complete(&amp;priv-&gt;flush_comp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_hydra_get_busparams_reply(const struct kvaser_usb *dev,</div><div class='add'>+						 const struct kvaser_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb_net_priv *priv;</div><div class='add'>+	struct kvaser_usb_net_hydra_priv *hydra;</div><div class='add'>+</div><div class='add'>+	priv = kvaser_usb_hydra_net_priv_from_cmd(dev, cmd);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	hydra = priv-&gt;sub_priv;</div><div class='add'>+	if (!hydra)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	switch (hydra-&gt;pending_get_busparams_type) {</div><div class='add'>+	case KVASER_USB_HYDRA_BUSPARAM_TYPE_CAN:</div><div class='add'>+		memcpy(&amp;priv-&gt;busparams_nominal, &amp;cmd-&gt;get_busparams_res.busparams,</div><div class='add'>+		       sizeof(priv-&gt;busparams_nominal));</div><div class='add'>+		break;</div><div class='add'>+	case KVASER_USB_HYDRA_BUSPARAM_TYPE_CANFD:</div><div class='add'>+		memcpy(&amp;priv-&gt;busparams_data, &amp;cmd-&gt;get_busparams_res.busparams,</div><div class='add'>+		       sizeof(priv-&gt;busparams_nominal));</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_warn(&amp;dev-&gt;intf-&gt;dev, "Unknown get_busparams_type %d\n",</div><div class='add'>+			 hydra-&gt;pending_get_busparams_type);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	hydra-&gt;pending_get_busparams_type = -1;</div><div class='add'>+</div><div class='add'>+	complete(&amp;priv-&gt;get_busparams_comp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+kvaser_usb_hydra_bus_status_to_can_state(const struct kvaser_usb_net_priv *priv,</div><div class='add'>+					 u8 bus_status,</div><div class='add'>+					 const struct can_berr_counter *bec,</div><div class='add'>+					 enum can_state *new_state)</div><div class='add'>+{</div><div class='add'>+	if (bus_status &amp; KVASER_USB_HYDRA_BUS_BUS_OFF) {</div><div class='add'>+		*new_state = CAN_STATE_BUS_OFF;</div><div class='add'>+	} else if (bus_status &amp; KVASER_USB_HYDRA_BUS_ERR_PASS) {</div><div class='add'>+		*new_state = CAN_STATE_ERROR_PASSIVE;</div><div class='add'>+	} else if (bus_status == KVASER_USB_HYDRA_BUS_ERR_ACT) {</div><div class='add'>+		if (bec-&gt;txerr &gt;= 128 || bec-&gt;rxerr &gt;= 128) {</div><div class='add'>+			netdev_warn(priv-&gt;netdev,</div><div class='add'>+				    "ERR_ACTIVE but err tx=%u or rx=%u &gt;=128\n",</div><div class='add'>+				    bec-&gt;txerr, bec-&gt;rxerr);</div><div class='add'>+			*new_state = CAN_STATE_ERROR_PASSIVE;</div><div class='add'>+		} else if (bec-&gt;txerr &gt;= 96 || bec-&gt;rxerr &gt;= 96) {</div><div class='add'>+			*new_state = CAN_STATE_ERROR_WARNING;</div><div class='add'>+		} else {</div><div class='add'>+			*new_state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_hydra_change_state(struct kvaser_usb_net_priv *priv,</div><div class='add'>+					  const struct can_berr_counter *bec,</div><div class='add'>+					  struct can_frame *cf,</div><div class='add'>+					  enum can_state new_state)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = priv-&gt;netdev;</div><div class='add'>+	enum can_state old_state = priv-&gt;can.state;</div><div class='add'>+	enum can_state tx_state, rx_state;</div><div class='add'>+</div><div class='add'>+	tx_state = (bec-&gt;txerr &gt;= bec-&gt;rxerr) ?</div><div class='add'>+				new_state : CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+	rx_state = (bec-&gt;txerr &lt;= bec-&gt;rxerr) ?</div><div class='add'>+				new_state : CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+	can_change_state(netdev, cf, tx_state, rx_state);</div><div class='add'>+</div><div class='add'>+	if (new_state == CAN_STATE_BUS_OFF &amp;&amp; old_state &lt; CAN_STATE_BUS_OFF) {</div><div class='add'>+		if (priv-&gt;can.restart_ms == 0)</div><div class='add'>+			kvaser_usb_hydra_send_simple_cmd_async(priv, CMD_STOP_CHIP_REQ);</div><div class='add'>+</div><div class='add'>+		can_bus_off(netdev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.restart_ms &amp;&amp;</div><div class='add'>+	    old_state &gt;= CAN_STATE_BUS_OFF &amp;&amp;</div><div class='add'>+	    new_state &lt; CAN_STATE_BUS_OFF) {</div><div class='add'>+		priv-&gt;can.can_stats.restarts++;</div><div class='add'>+		if (cf)</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_RESTARTED;</div><div class='add'>+	}</div><div class='add'>+	if (cf &amp;&amp; new_state != CAN_STATE_BUS_OFF) {</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_CNT;</div><div class='add'>+		cf-&gt;data[6] = bec-&gt;txerr;</div><div class='add'>+		cf-&gt;data[7] = bec-&gt;rxerr;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_hydra_update_state(struct kvaser_usb_net_priv *priv,</div><div class='add'>+					  u8 bus_status,</div><div class='add'>+					  const struct can_berr_counter *bec)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = priv-&gt;netdev;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	enum can_state new_state, old_state;</div><div class='add'>+</div><div class='add'>+	old_state = priv-&gt;can.state;</div><div class='add'>+</div><div class='add'>+	kvaser_usb_hydra_bus_status_to_can_state(priv, bus_status, bec,</div><div class='add'>+						 &amp;new_state);</div><div class='add'>+</div><div class='add'>+	if (new_state == old_state)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Ignore state change if previous state was STOPPED and the new state</div><div class='add'>+	 * is BUS_OFF. Firmware always report this as BUS_OFF, since firmware</div><div class='add'>+	 * does not distinguish between BUS_OFF and STOPPED.</div><div class='add'>+	 */</div><div class='add'>+	if (old_state == CAN_STATE_STOPPED &amp;&amp; new_state == CAN_STATE_BUS_OFF)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_err_skb(netdev, &amp;cf);</div><div class='add'>+	kvaser_usb_hydra_change_state(priv, bec, cf, new_state);</div><div class='add'>+	if (skb)</div><div class='add'>+		netif_rx(skb);</div><div class='add'>+	else</div><div class='add'>+		netdev_warn(netdev, "No memory left for err_skb\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_hydra_state_event(const struct kvaser_usb *dev,</div><div class='add'>+					 const struct kvaser_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb_net_priv *priv;</div><div class='add'>+	struct can_berr_counter bec;</div><div class='add'>+	u8 bus_status;</div><div class='add'>+</div><div class='add'>+	priv = kvaser_usb_hydra_net_priv_from_cmd(dev, cmd);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	bus_status = cmd-&gt;chip_state_event.bus_status;</div><div class='add'>+	bec.txerr = cmd-&gt;chip_state_event.tx_err_counter;</div><div class='add'>+	bec.rxerr = cmd-&gt;chip_state_event.rx_err_counter;</div><div class='add'>+</div><div class='add'>+	kvaser_usb_hydra_update_state(priv, bus_status, &amp;bec);</div><div class='add'>+	priv-&gt;bec.txerr = bec.txerr;</div><div class='add'>+	priv-&gt;bec.rxerr = bec.rxerr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_hydra_error_event_parameter(const struct kvaser_usb *dev,</div><div class='add'>+						   const struct kvaser_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	/* info1 will contain the offending cmd_no */</div><div class='add'>+	switch (le16_to_cpu(cmd-&gt;error_event.info1)) {</div><div class='add'>+	case CMD_START_CHIP_REQ:</div><div class='add'>+		dev_warn(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			 "CMD_START_CHIP_REQ error in parameter\n");</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case CMD_STOP_CHIP_REQ:</div><div class='add'>+		dev_warn(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			 "CMD_STOP_CHIP_REQ error in parameter\n");</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case CMD_FLUSH_QUEUE:</div><div class='add'>+		dev_warn(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			 "CMD_FLUSH_QUEUE error in parameter\n");</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case CMD_SET_BUSPARAMS_REQ:</div><div class='add'>+		dev_warn(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			 "Set bittiming failed. Error in parameter\n");</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case CMD_SET_BUSPARAMS_FD_REQ:</div><div class='add'>+		dev_warn(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			 "Set data bittiming failed. Error in parameter\n");</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		dev_warn(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			 "Unhandled parameter error event cmd_no (%u)\n",</div><div class='add'>+			 le16_to_cpu(cmd-&gt;error_event.info1));</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_hydra_error_event(const struct kvaser_usb *dev,</div><div class='add'>+					 const struct kvaser_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	switch (cmd-&gt;error_event.error_code) {</div><div class='add'>+	case KVASER_USB_HYDRA_ERROR_EVENT_PARAM:</div><div class='add'>+		kvaser_usb_hydra_error_event_parameter(dev, cmd);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case KVASER_USB_HYDRA_ERROR_EVENT_CAN:</div><div class='add'>+		/* Wrong channel mapping?! This should never happen!</div><div class='add'>+		 * info1 will contain the offending cmd_no</div><div class='add'>+		 */</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			"Received CAN error event for cmd_no (%u)\n",</div><div class='add'>+			le16_to_cpu(cmd-&gt;error_event.info1));</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		dev_warn(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			 "Unhandled error event (%d)\n",</div><div class='add'>+			 cmd-&gt;error_event.error_code);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+kvaser_usb_hydra_error_frame(struct kvaser_usb_net_priv *priv,</div><div class='add'>+			     const struct kvaser_err_frame_data *err_frame_data,</div><div class='add'>+			     ktime_t hwtstamp)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = priv-&gt;netdev;</div><div class='add'>+	struct net_device_stats *stats = &amp;netdev-&gt;stats;</div><div class='add'>+	struct can_frame *cf = NULL;</div><div class='add'>+	struct sk_buff *skb = NULL;</div><div class='add'>+	struct can_berr_counter bec;</div><div class='add'>+	enum can_state new_state, old_state;</div><div class='add'>+	u8 bus_status;</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.can_stats.bus_error++;</div><div class='add'>+	stats-&gt;rx_errors++;</div><div class='add'>+</div><div class='add'>+	bus_status = err_frame_data-&gt;bus_status;</div><div class='add'>+	bec.txerr = err_frame_data-&gt;tx_err_counter;</div><div class='add'>+	bec.rxerr = err_frame_data-&gt;rx_err_counter;</div><div class='add'>+</div><div class='add'>+	old_state = priv-&gt;can.state;</div><div class='add'>+	kvaser_usb_hydra_bus_status_to_can_state(priv, bus_status, &amp;bec,</div><div class='add'>+						 &amp;new_state);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING)</div><div class='add'>+		skb = alloc_can_err_skb(netdev, &amp;cf);</div><div class='add'>+	if (new_state != old_state)</div><div class='add'>+		kvaser_usb_hydra_change_state(priv, &amp;bec, cf, new_state);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING) {</div><div class='add'>+		if (skb) {</div><div class='add'>+			struct skb_shared_hwtstamps *shhwtstamps = skb_hwtstamps(skb);</div><div class='add'>+</div><div class='add'>+			shhwtstamps-&gt;hwtstamp = hwtstamp;</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_BUSERROR | CAN_ERR_CNT;</div><div class='add'>+			cf-&gt;data[6] = bec.txerr;</div><div class='add'>+			cf-&gt;data[7] = bec.rxerr;</div><div class='add'>+			netif_rx(skb);</div><div class='add'>+		} else {</div><div class='add'>+			stats-&gt;rx_dropped++;</div><div class='add'>+			netdev_warn(netdev, "No memory left for err_skb\n");</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;bec.txerr = bec.txerr;</div><div class='add'>+	priv-&gt;bec.rxerr = bec.rxerr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_hydra_one_shot_fail(struct kvaser_usb_net_priv *priv,</div><div class='add'>+					   const struct kvaser_cmd_ext *cmd)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = priv-&gt;netdev;</div><div class='add'>+	struct net_device_stats *stats = &amp;netdev-&gt;stats;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	u32 flags;</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_err_skb(netdev, &amp;cf);</div><div class='add'>+	if (!skb) {</div><div class='add'>+		stats-&gt;rx_dropped++;</div><div class='add'>+		netdev_warn(netdev, "No memory left for err_skb\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cf-&gt;can_id |= CAN_ERR_BUSERROR;</div><div class='add'>+	flags = le32_to_cpu(cmd-&gt;tx_ack.flags);</div><div class='add'>+</div><div class='add'>+	if (flags &amp; KVASER_USB_HYDRA_CF_FLAG_OSM_NACK)</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_ACK;</div><div class='add'>+	if (flags &amp; KVASER_USB_HYDRA_CF_FLAG_ABL) {</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_LOSTARB;</div><div class='add'>+		priv-&gt;can.can_stats.arbitration_lost++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	stats-&gt;tx_errors++;</div><div class='add'>+	netif_rx(skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_hydra_tx_acknowledge(const struct kvaser_usb *dev,</div><div class='add'>+					    const struct kvaser_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb_tx_urb_context *context;</div><div class='add'>+	struct kvaser_usb_net_priv *priv;</div><div class='add'>+	unsigned long irq_flags;</div><div class='add'>+	unsigned int len;</div><div class='add'>+	bool one_shot_fail = false;</div><div class='add'>+	bool is_err_frame = false;</div><div class='add'>+	u16 transid = kvaser_usb_hydra_get_cmd_transid(cmd);</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	priv = kvaser_usb_hydra_net_priv_from_cmd(dev, cmd);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!netif_device_present(priv-&gt;netdev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (cmd-&gt;header.cmd_no == CMD_EXTENDED) {</div><div class='add'>+		struct kvaser_cmd_ext *cmd_ext = (struct kvaser_cmd_ext *)cmd;</div><div class='add'>+		u32 flags = le32_to_cpu(cmd_ext-&gt;tx_ack.flags);</div><div class='add'>+</div><div class='add'>+		if (flags &amp; (KVASER_USB_HYDRA_CF_FLAG_OSM_NACK |</div><div class='add'>+			     KVASER_USB_HYDRA_CF_FLAG_ABL)) {</div><div class='add'>+			kvaser_usb_hydra_one_shot_fail(priv, cmd_ext);</div><div class='add'>+			one_shot_fail = true;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		is_err_frame = flags &amp; KVASER_USB_HYDRA_CF_FLAG_TX_ACK &amp;&amp;</div><div class='add'>+			       flags &amp; KVASER_USB_HYDRA_CF_FLAG_ERROR_FRAME;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	context = &amp;priv-&gt;tx_contexts[transid % dev-&gt;max_tx_urbs];</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;tx_contexts_lock, irq_flags);</div><div class='add'>+</div><div class='add'>+	skb = priv-&gt;can.echo_skb[context-&gt;echo_index];</div><div class='add'>+	if (skb)</div><div class='add'>+		skb_hwtstamps(skb)-&gt;hwtstamp = kvaser_usb_hydra_ktime_from_cmd(dev-&gt;cfg, cmd);</div><div class='add'>+	len = can_get_echo_skb(priv-&gt;netdev, context-&gt;echo_index, NULL);</div><div class='add'>+	context-&gt;echo_index = dev-&gt;max_tx_urbs;</div><div class='add'>+	--priv-&gt;active_tx_contexts;</div><div class='add'>+	netif_wake_queue(priv-&gt;netdev);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;tx_contexts_lock, irq_flags);</div><div class='add'>+</div><div class='add'>+	if (!one_shot_fail &amp;&amp; !is_err_frame) {</div><div class='add'>+		struct net_device_stats *stats = &amp;priv-&gt;netdev-&gt;stats;</div><div class='add'>+</div><div class='add'>+		stats-&gt;tx_packets++;</div><div class='add'>+		stats-&gt;tx_bytes += len;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_hydra_rx_msg_std(const struct kvaser_usb *dev,</div><div class='add'>+					const struct kvaser_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb_net_priv *priv = NULL;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct skb_shared_hwtstamps *shhwtstamps;</div><div class='add'>+	struct net_device_stats *stats;</div><div class='add'>+	u8 flags;</div><div class='add'>+	ktime_t hwtstamp;</div><div class='add'>+</div><div class='add'>+	priv = kvaser_usb_hydra_net_priv_from_cmd(dev, cmd);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	stats = &amp;priv-&gt;netdev-&gt;stats;</div><div class='add'>+</div><div class='add'>+	flags = cmd-&gt;rx_can.flags;</div><div class='add'>+	hwtstamp = kvaser_usb_hydra_ktime_from_cmd(dev-&gt;cfg, cmd);</div><div class='add'>+</div><div class='add'>+	if (flags &amp; KVASER_USB_HYDRA_CF_FLAG_ERROR_FRAME) {</div><div class='add'>+		kvaser_usb_hydra_error_frame(priv, &amp;cmd-&gt;rx_can.err_frame_data,</div><div class='add'>+					     hwtstamp);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_skb(priv-&gt;netdev, &amp;cf);</div><div class='add'>+	if (!skb) {</div><div class='add'>+		stats-&gt;rx_dropped++;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	shhwtstamps = skb_hwtstamps(skb);</div><div class='add'>+	shhwtstamps-&gt;hwtstamp = hwtstamp;</div><div class='add'>+</div><div class='add'>+	cf-&gt;can_id = le32_to_cpu(cmd-&gt;rx_can.id);</div><div class='add'>+</div><div class='add'>+	if (cf-&gt;can_id &amp;  KVASER_USB_HYDRA_EXTENDED_FRAME_ID) {</div><div class='add'>+		cf-&gt;can_id &amp;= CAN_EFF_MASK;</div><div class='add'>+		cf-&gt;can_id |= CAN_EFF_FLAG;</div><div class='add'>+	} else {</div><div class='add'>+		cf-&gt;can_id &amp;= CAN_SFF_MASK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flags &amp; KVASER_USB_HYDRA_CF_FLAG_OVERRUN)</div><div class='add'>+		kvaser_usb_can_rx_over_error(priv-&gt;netdev);</div><div class='add'>+</div><div class='add'>+	can_frame_set_cc_len((struct can_frame *)cf, cmd-&gt;rx_can.dlc, priv-&gt;can.ctrlmode);</div><div class='add'>+</div><div class='add'>+	if (flags &amp; KVASER_USB_HYDRA_CF_FLAG_REMOTE_FRAME) {</div><div class='add'>+		cf-&gt;can_id |= CAN_RTR_FLAG;</div><div class='add'>+	} else {</div><div class='add'>+		memcpy(cf-&gt;data, cmd-&gt;rx_can.data, cf-&gt;len);</div><div class='add'>+</div><div class='add'>+		stats-&gt;rx_bytes += cf-&gt;len;</div><div class='add'>+	}</div><div class='add'>+	stats-&gt;rx_packets++;</div><div class='add'>+</div><div class='add'>+	netif_rx(skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_hydra_rx_msg_ext(const struct kvaser_usb *dev,</div><div class='add'>+					const struct kvaser_cmd_ext *cmd)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_cmd *std_cmd = (struct kvaser_cmd *)cmd;</div><div class='add'>+	struct kvaser_usb_net_priv *priv;</div><div class='add'>+	struct canfd_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct skb_shared_hwtstamps *shhwtstamps;</div><div class='add'>+	struct net_device_stats *stats;</div><div class='add'>+	u32 flags;</div><div class='add'>+	u8 dlc;</div><div class='add'>+	u32 kcan_header;</div><div class='add'>+	ktime_t hwtstamp;</div><div class='add'>+</div><div class='add'>+	priv = kvaser_usb_hydra_net_priv_from_cmd(dev, std_cmd);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	stats = &amp;priv-&gt;netdev-&gt;stats;</div><div class='add'>+</div><div class='add'>+	kcan_header = le32_to_cpu(cmd-&gt;rx_can.kcan_header);</div><div class='add'>+	dlc = (kcan_header &amp; KVASER_USB_KCAN_DATA_DLC_MASK) &gt;&gt;</div><div class='add'>+		KVASER_USB_KCAN_DATA_DLC_SHIFT;</div><div class='add'>+</div><div class='add'>+	flags = le32_to_cpu(cmd-&gt;rx_can.flags);</div><div class='add'>+	hwtstamp = kvaser_usb_hydra_ktime_from_cmd(dev-&gt;cfg, std_cmd);</div><div class='add'>+</div><div class='add'>+	if (flags &amp; KVASER_USB_HYDRA_CF_FLAG_ERROR_FRAME) {</div><div class='add'>+		kvaser_usb_hydra_error_frame(priv, &amp;cmd-&gt;rx_can.err_frame_data,</div><div class='add'>+					     hwtstamp);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flags &amp; KVASER_USB_HYDRA_CF_FLAG_FDF)</div><div class='add'>+		skb = alloc_canfd_skb(priv-&gt;netdev, &amp;cf);</div><div class='add'>+	else</div><div class='add'>+		skb = alloc_can_skb(priv-&gt;netdev, (struct can_frame **)&amp;cf);</div><div class='add'>+</div><div class='add'>+	if (!skb) {</div><div class='add'>+		stats-&gt;rx_dropped++;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	shhwtstamps = skb_hwtstamps(skb);</div><div class='add'>+	shhwtstamps-&gt;hwtstamp = hwtstamp;</div><div class='add'>+</div><div class='add'>+	cf-&gt;can_id = le32_to_cpu(cmd-&gt;rx_can.id);</div><div class='add'>+</div><div class='add'>+	if (flags &amp; KVASER_USB_HYDRA_CF_FLAG_EXTENDED_ID) {</div><div class='add'>+		cf-&gt;can_id &amp;= CAN_EFF_MASK;</div><div class='add'>+		cf-&gt;can_id |= CAN_EFF_FLAG;</div><div class='add'>+	} else {</div><div class='add'>+		cf-&gt;can_id &amp;= CAN_SFF_MASK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flags &amp; KVASER_USB_HYDRA_CF_FLAG_OVERRUN)</div><div class='add'>+		kvaser_usb_can_rx_over_error(priv-&gt;netdev);</div><div class='add'>+</div><div class='add'>+	if (flags &amp; KVASER_USB_HYDRA_CF_FLAG_FDF) {</div><div class='add'>+		cf-&gt;len = can_fd_dlc2len(dlc);</div><div class='add'>+		if (flags &amp; KVASER_USB_HYDRA_CF_FLAG_BRS)</div><div class='add'>+			cf-&gt;flags |= CANFD_BRS;</div><div class='add'>+		if (flags &amp; KVASER_USB_HYDRA_CF_FLAG_ESI)</div><div class='add'>+			cf-&gt;flags |= CANFD_ESI;</div><div class='add'>+	} else {</div><div class='add'>+		can_frame_set_cc_len((struct can_frame *)cf, dlc, priv-&gt;can.ctrlmode);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flags &amp; KVASER_USB_HYDRA_CF_FLAG_REMOTE_FRAME) {</div><div class='add'>+		cf-&gt;can_id |= CAN_RTR_FLAG;</div><div class='add'>+	} else {</div><div class='add'>+		memcpy(cf-&gt;data, cmd-&gt;rx_can.kcan_payload, cf-&gt;len);</div><div class='add'>+</div><div class='add'>+		stats-&gt;rx_bytes += cf-&gt;len;</div><div class='add'>+	}</div><div class='add'>+	stats-&gt;rx_packets++;</div><div class='add'>+</div><div class='add'>+	netif_rx(skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_hydra_handle_cmd_std(const struct kvaser_usb *dev,</div><div class='add'>+					    const struct kvaser_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	switch (cmd-&gt;header.cmd_no) {</div><div class='add'>+	case CMD_START_CHIP_RESP:</div><div class='add'>+		kvaser_usb_hydra_start_chip_reply(dev, cmd);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case CMD_STOP_CHIP_RESP:</div><div class='add'>+		kvaser_usb_hydra_stop_chip_reply(dev, cmd);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case CMD_FLUSH_QUEUE_RESP:</div><div class='add'>+		kvaser_usb_hydra_flush_queue_reply(dev, cmd);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case CMD_CHIP_STATE_EVENT:</div><div class='add'>+		kvaser_usb_hydra_state_event(dev, cmd);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case CMD_GET_BUSPARAMS_RESP:</div><div class='add'>+		kvaser_usb_hydra_get_busparams_reply(dev, cmd);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case CMD_ERROR_EVENT:</div><div class='add'>+		kvaser_usb_hydra_error_event(dev, cmd);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case CMD_TX_ACKNOWLEDGE:</div><div class='add'>+		kvaser_usb_hydra_tx_acknowledge(dev, cmd);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case CMD_RX_MESSAGE:</div><div class='add'>+		kvaser_usb_hydra_rx_msg_std(dev, cmd);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	/* Ignored commands */</div><div class='add'>+	case CMD_SET_BUSPARAMS_RESP:</div><div class='add'>+	case CMD_SET_BUSPARAMS_FD_RESP:</div><div class='add'>+	case CMD_LED_ACTION_RESP:</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		dev_warn(&amp;dev-&gt;intf-&gt;dev, "Unhandled command (%d)\n",</div><div class='add'>+			 cmd-&gt;header.cmd_no);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_hydra_handle_cmd_ext(const struct kvaser_usb *dev,</div><div class='add'>+					    const struct kvaser_cmd_ext *cmd)</div><div class='add'>+{</div><div class='add'>+	switch (cmd-&gt;cmd_no_ext) {</div><div class='add'>+	case CMD_TX_ACKNOWLEDGE_FD:</div><div class='add'>+		kvaser_usb_hydra_tx_acknowledge(dev, (struct kvaser_cmd *)cmd);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case CMD_RX_MESSAGE_FD:</div><div class='add'>+		kvaser_usb_hydra_rx_msg_ext(dev, cmd);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		dev_warn(&amp;dev-&gt;intf-&gt;dev, "Unhandled extended command (%d)\n",</div><div class='add'>+			 cmd-&gt;header.cmd_no);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_hydra_handle_cmd(const struct kvaser_usb *dev,</div><div class='add'>+					const struct kvaser_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+		if (cmd-&gt;header.cmd_no == CMD_EXTENDED)</div><div class='add'>+			kvaser_usb_hydra_handle_cmd_ext</div><div class='add'>+					(dev, (struct kvaser_cmd_ext *)cmd);</div><div class='add'>+		else</div><div class='add'>+			kvaser_usb_hydra_handle_cmd_std(dev, cmd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void *</div><div class='add'>+kvaser_usb_hydra_frame_to_cmd_ext(const struct kvaser_usb_net_priv *priv,</div><div class='add'>+				  const struct sk_buff *skb, int *cmd_len,</div><div class='add'>+				  u16 transid)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb *dev = priv-&gt;dev;</div><div class='add'>+	struct kvaser_cmd_ext *cmd;</div><div class='add'>+	struct canfd_frame *cf = (struct canfd_frame *)skb-&gt;data;</div><div class='add'>+	u8 dlc;</div><div class='add'>+	u8 nbr_of_bytes = cf-&gt;len;</div><div class='add'>+	u32 flags;</div><div class='add'>+	u32 id;</div><div class='add'>+	u32 kcan_id;</div><div class='add'>+	u32 kcan_header;</div><div class='add'>+</div><div class='add'>+	cmd = kzalloc(sizeof(*cmd), GFP_ATOMIC);</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	kvaser_usb_hydra_set_cmd_dest_he</div><div class='add'>+			((struct kvaser_cmd *)cmd,</div><div class='add'>+			 dev-&gt;card_data.hydra.channel_to_he[priv-&gt;channel]);</div><div class='add'>+	kvaser_usb_hydra_set_cmd_transid((struct kvaser_cmd *)cmd, transid);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;header.cmd_no = CMD_EXTENDED;</div><div class='add'>+	cmd-&gt;cmd_no_ext = CMD_TX_CAN_MESSAGE_FD;</div><div class='add'>+</div><div class='add'>+	*cmd_len = ALIGN(sizeof(struct kvaser_cmd_ext) -</div><div class='add'>+			 sizeof(cmd-&gt;tx_can.kcan_payload) + nbr_of_bytes,</div><div class='add'>+			 8);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;len = cpu_to_le16(*cmd_len);</div><div class='add'>+</div><div class='add'>+	if (can_is_canfd_skb(skb))</div><div class='add'>+		dlc = can_fd_len2dlc(cf-&gt;len);</div><div class='add'>+	else</div><div class='add'>+		dlc = can_get_cc_dlc((struct can_frame *)cf, priv-&gt;can.ctrlmode);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;tx_can.databytes = nbr_of_bytes;</div><div class='add'>+	cmd-&gt;tx_can.dlc = dlc;</div><div class='add'>+</div><div class='add'>+	if (cf-&gt;can_id &amp; CAN_EFF_FLAG) {</div><div class='add'>+		id = cf-&gt;can_id &amp; CAN_EFF_MASK;</div><div class='add'>+		flags = KVASER_USB_HYDRA_CF_FLAG_EXTENDED_ID;</div><div class='add'>+		kcan_id = (cf-&gt;can_id &amp; CAN_EFF_MASK) |</div><div class='add'>+			  KVASER_USB_KCAN_DATA_IDE | KVASER_USB_KCAN_DATA_SRR;</div><div class='add'>+	} else {</div><div class='add'>+		id = cf-&gt;can_id &amp; CAN_SFF_MASK;</div><div class='add'>+		flags = 0;</div><div class='add'>+		kcan_id = cf-&gt;can_id &amp; CAN_SFF_MASK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cf-&gt;can_id &amp; CAN_ERR_FLAG)</div><div class='add'>+		flags |= KVASER_USB_HYDRA_CF_FLAG_ERROR_FRAME;</div><div class='add'>+</div><div class='add'>+	kcan_header = ((dlc &lt;&lt; KVASER_USB_KCAN_DATA_DLC_SHIFT) &amp;</div><div class='add'>+				KVASER_USB_KCAN_DATA_DLC_MASK) |</div><div class='add'>+			KVASER_USB_KCAN_DATA_AREQ |</div><div class='add'>+			(priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_ONE_SHOT ?</div><div class='add'>+				KVASER_USB_KCAN_DATA_OSM : 0);</div><div class='add'>+</div><div class='add'>+	if (can_is_canfd_skb(skb)) {</div><div class='add'>+		kcan_header |= KVASER_USB_KCAN_DATA_FDF |</div><div class='add'>+			       (cf-&gt;flags &amp; CANFD_BRS ?</div><div class='add'>+					KVASER_USB_KCAN_DATA_BRS : 0);</div><div class='add'>+	} else {</div><div class='add'>+		if (cf-&gt;can_id &amp; CAN_RTR_FLAG) {</div><div class='add'>+			kcan_id |= KVASER_USB_KCAN_DATA_RTR;</div><div class='add'>+			cmd-&gt;tx_can.databytes = 0;</div><div class='add'>+			flags |= KVASER_USB_HYDRA_CF_FLAG_REMOTE_FRAME;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cmd-&gt;tx_can.kcan_id = cpu_to_le32(kcan_id);</div><div class='add'>+	cmd-&gt;tx_can.id = cpu_to_le32(id);</div><div class='add'>+	cmd-&gt;tx_can.flags = cpu_to_le32(flags);</div><div class='add'>+	cmd-&gt;tx_can.kcan_header = cpu_to_le32(kcan_header);</div><div class='add'>+</div><div class='add'>+	memcpy(cmd-&gt;tx_can.kcan_payload, cf-&gt;data, nbr_of_bytes);</div><div class='add'>+</div><div class='add'>+	return cmd;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void *</div><div class='add'>+kvaser_usb_hydra_frame_to_cmd_std(const struct kvaser_usb_net_priv *priv,</div><div class='add'>+				  const struct sk_buff *skb, int *cmd_len,</div><div class='add'>+				  u16 transid)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb *dev = priv-&gt;dev;</div><div class='add'>+	struct kvaser_cmd *cmd;</div><div class='add'>+	struct can_frame *cf = (struct can_frame *)skb-&gt;data;</div><div class='add'>+	u32 flags;</div><div class='add'>+	u32 id;</div><div class='add'>+</div><div class='add'>+	cmd = kzalloc(sizeof(*cmd), GFP_ATOMIC);</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	kvaser_usb_hydra_set_cmd_dest_he</div><div class='add'>+		(cmd, dev-&gt;card_data.hydra.channel_to_he[priv-&gt;channel]);</div><div class='add'>+	kvaser_usb_hydra_set_cmd_transid(cmd, transid);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;header.cmd_no = CMD_TX_CAN_MESSAGE;</div><div class='add'>+</div><div class='add'>+	*cmd_len = ALIGN(sizeof(struct kvaser_cmd), 8);</div><div class='add'>+</div><div class='add'>+	if (cf-&gt;can_id &amp; CAN_EFF_FLAG) {</div><div class='add'>+		id = (cf-&gt;can_id &amp; CAN_EFF_MASK);</div><div class='add'>+		id |= KVASER_USB_HYDRA_EXTENDED_FRAME_ID;</div><div class='add'>+	} else {</div><div class='add'>+		id = cf-&gt;can_id &amp; CAN_SFF_MASK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cmd-&gt;tx_can.dlc = can_get_cc_dlc(cf, priv-&gt;can.ctrlmode);</div><div class='add'>+</div><div class='add'>+	flags = (cf-&gt;can_id &amp; CAN_EFF_FLAG ?</div><div class='add'>+		 KVASER_USB_HYDRA_CF_FLAG_EXTENDED_ID : 0);</div><div class='add'>+</div><div class='add'>+	if (cf-&gt;can_id &amp; CAN_RTR_FLAG)</div><div class='add'>+		flags |= KVASER_USB_HYDRA_CF_FLAG_REMOTE_FRAME;</div><div class='add'>+</div><div class='add'>+	flags |= (cf-&gt;can_id &amp; CAN_ERR_FLAG ?</div><div class='add'>+		  KVASER_USB_HYDRA_CF_FLAG_ERROR_FRAME : 0);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;tx_can.id = cpu_to_le32(id);</div><div class='add'>+	cmd-&gt;tx_can.flags = flags;</div><div class='add'>+</div><div class='add'>+	memcpy(cmd-&gt;tx_can.data, cf-&gt;data, cf-&gt;len);</div><div class='add'>+</div><div class='add'>+	return cmd;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_hydra_set_mode(struct net_device *netdev,</div><div class='add'>+				     enum can_mode mode)</div><div class='add'>+{</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case CAN_MODE_START:</div><div class='add'>+		/* CAN controller automatically recovers from BUS_OFF */</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		err = -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_hydra_get_busparams(struct kvaser_usb_net_priv *priv,</div><div class='add'>+					  int busparams_type)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb *dev = priv-&gt;dev;</div><div class='add'>+	struct kvaser_usb_net_hydra_priv *hydra = priv-&gt;sub_priv;</div><div class='add'>+	struct kvaser_cmd *cmd;</div><div class='add'>+	size_t cmd_len;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!hydra)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	cmd = kcalloc(1, sizeof(struct kvaser_cmd), GFP_KERNEL);</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;header.cmd_no = CMD_GET_BUSPARAMS_REQ;</div><div class='add'>+	cmd_len = kvaser_usb_hydra_cmd_size(cmd);</div><div class='add'>+	kvaser_usb_hydra_set_cmd_dest_he</div><div class='add'>+		(cmd, dev-&gt;card_data.hydra.channel_to_he[priv-&gt;channel]);</div><div class='add'>+	kvaser_usb_hydra_set_cmd_transid</div><div class='add'>+				(cmd, kvaser_usb_hydra_get_next_transid(dev));</div><div class='add'>+	cmd-&gt;get_busparams_req.type = busparams_type;</div><div class='add'>+	hydra-&gt;pending_get_busparams_type = busparams_type;</div><div class='add'>+</div><div class='add'>+	reinit_completion(&amp;priv-&gt;get_busparams_comp);</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_send_cmd(dev, cmd, cmd_len);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (!wait_for_completion_timeout(&amp;priv-&gt;get_busparams_comp,</div><div class='add'>+					 msecs_to_jiffies(KVASER_USB_TIMEOUT)))</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_hydra_get_nominal_busparams(struct kvaser_usb_net_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return kvaser_usb_hydra_get_busparams(priv, KVASER_USB_HYDRA_BUSPARAM_TYPE_CAN);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_hydra_get_data_busparams(struct kvaser_usb_net_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return kvaser_usb_hydra_get_busparams(priv, KVASER_USB_HYDRA_BUSPARAM_TYPE_CANFD);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_hydra_set_bittiming(const struct net_device *netdev,</div><div class='add'>+					  const struct kvaser_usb_busparams *busparams)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_cmd *cmd;</div><div class='add'>+	struct kvaser_usb_net_priv *priv = netdev_priv(netdev);</div><div class='add'>+	struct kvaser_usb *dev = priv-&gt;dev;</div><div class='add'>+	size_t cmd_len;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;header.cmd_no = CMD_SET_BUSPARAMS_REQ;</div><div class='add'>+	cmd_len = kvaser_usb_hydra_cmd_size(cmd);</div><div class='add'>+	memcpy(&amp;cmd-&gt;set_busparams_req.busparams_nominal, busparams,</div><div class='add'>+	       sizeof(cmd-&gt;set_busparams_req.busparams_nominal));</div><div class='add'>+</div><div class='add'>+	kvaser_usb_hydra_set_cmd_dest_he</div><div class='add'>+		(cmd, dev-&gt;card_data.hydra.channel_to_he[priv-&gt;channel]);</div><div class='add'>+	kvaser_usb_hydra_set_cmd_transid</div><div class='add'>+				(cmd, kvaser_usb_hydra_get_next_transid(dev));</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_send_cmd(dev, cmd, cmd_len);</div><div class='add'>+</div><div class='add'>+	kfree(cmd);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_hydra_set_data_bittiming(const struct net_device *netdev,</div><div class='add'>+					       const struct kvaser_usb_busparams *busparams)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_cmd *cmd;</div><div class='add'>+	struct kvaser_usb_net_priv *priv = netdev_priv(netdev);</div><div class='add'>+	struct kvaser_usb *dev = priv-&gt;dev;</div><div class='add'>+	size_t cmd_len;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;header.cmd_no = CMD_SET_BUSPARAMS_FD_REQ;</div><div class='add'>+	cmd_len = kvaser_usb_hydra_cmd_size(cmd);</div><div class='add'>+	memcpy(&amp;cmd-&gt;set_busparams_req.busparams_data, busparams,</div><div class='add'>+	       sizeof(cmd-&gt;set_busparams_req.busparams_data));</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD) {</div><div class='add'>+		if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD_NON_ISO)</div><div class='add'>+			cmd-&gt;set_busparams_req.canfd_mode =</div><div class='add'>+					KVASER_USB_HYDRA_BUS_MODE_NONISO;</div><div class='add'>+		else</div><div class='add'>+			cmd-&gt;set_busparams_req.canfd_mode =</div><div class='add'>+					KVASER_USB_HYDRA_BUS_MODE_CANFD_ISO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kvaser_usb_hydra_set_cmd_dest_he</div><div class='add'>+		(cmd, dev-&gt;card_data.hydra.channel_to_he[priv-&gt;channel]);</div><div class='add'>+	kvaser_usb_hydra_set_cmd_transid</div><div class='add'>+				(cmd, kvaser_usb_hydra_get_next_transid(dev));</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_send_cmd(dev, cmd, cmd_len);</div><div class='add'>+</div><div class='add'>+	kfree(cmd);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_hydra_get_berr_counter(const struct net_device *netdev,</div><div class='add'>+					     struct can_berr_counter *bec)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb_net_priv *priv = netdev_priv(netdev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_hydra_send_simple_cmd(priv-&gt;dev,</div><div class='add'>+					       CMD_GET_CHIP_STATE_REQ,</div><div class='add'>+					       priv-&gt;channel);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	*bec = priv-&gt;bec;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_hydra_setup_endpoints(struct kvaser_usb *dev)</div><div class='add'>+{</div><div class='add'>+	const struct usb_host_interface *iface_desc;</div><div class='add'>+	struct usb_endpoint_descriptor *ep;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	iface_desc = dev-&gt;intf-&gt;cur_altsetting;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; iface_desc-&gt;desc.bNumEndpoints; ++i) {</div><div class='add'>+		ep = &amp;iface_desc-&gt;endpoint[i].desc;</div><div class='add'>+</div><div class='add'>+		if (!dev-&gt;bulk_in &amp;&amp; usb_endpoint_is_bulk_in(ep) &amp;&amp;</div><div class='add'>+		    ep-&gt;bEndpointAddress == KVASER_USB_HYDRA_BULK_EP_IN_ADDR)</div><div class='add'>+			dev-&gt;bulk_in = ep;</div><div class='add'>+</div><div class='add'>+		if (!dev-&gt;bulk_out &amp;&amp; usb_endpoint_is_bulk_out(ep) &amp;&amp;</div><div class='add'>+		    ep-&gt;bEndpointAddress == KVASER_USB_HYDRA_BULK_EP_OUT_ADDR)</div><div class='add'>+			dev-&gt;bulk_out = ep;</div><div class='add'>+</div><div class='add'>+		if (dev-&gt;bulk_in &amp;&amp; dev-&gt;bulk_out)</div><div class='add'>+			return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -ENODEV;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_hydra_init_card(struct kvaser_usb *dev)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	struct kvaser_usb_dev_card_data_hydra *card_data =</div><div class='add'>+							&amp;dev-&gt;card_data.hydra;</div><div class='add'>+</div><div class='add'>+	card_data-&gt;transid = KVASER_USB_HYDRA_MIN_TRANSID;</div><div class='add'>+	spin_lock_init(&amp;card_data-&gt;transid_lock);</div><div class='add'>+</div><div class='add'>+	memset(card_data-&gt;usb_rx_leftover, 0, KVASER_USB_HYDRA_MAX_CMD_LEN);</div><div class='add'>+	card_data-&gt;usb_rx_leftover_len = 0;</div><div class='add'>+	spin_lock_init(&amp;card_data-&gt;usb_rx_leftover_lock);</div><div class='add'>+</div><div class='add'>+	memset(card_data-&gt;channel_to_he, KVASER_USB_HYDRA_HE_ADDRESS_ILLEGAL,</div><div class='add'>+	       sizeof(card_data-&gt;channel_to_he));</div><div class='add'>+	card_data-&gt;sysdbg_he = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; KVASER_USB_MAX_NET_DEVICES; i++) {</div><div class='add'>+		err = kvaser_usb_hydra_map_channel</div><div class='add'>+					(dev,</div><div class='add'>+					 (KVASER_USB_HYDRA_TRANSID_CANHE | i),</div><div class='add'>+					 i, "CAN");</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+				"CMD_MAP_CHANNEL_REQ failed for CAN%u\n", i);</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_hydra_map_channel(dev, KVASER_USB_HYDRA_TRANSID_SYSDBG,</div><div class='add'>+					   0, "SYSDBG");</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			"CMD_MAP_CHANNEL_REQ failed for SYSDBG\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_hydra_init_channel(struct kvaser_usb_net_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb_net_hydra_priv *hydra;</div><div class='add'>+</div><div class='add'>+	hydra = devm_kzalloc(&amp;priv-&gt;dev-&gt;intf-&gt;dev, sizeof(*hydra), GFP_KERNEL);</div><div class='add'>+	if (!hydra)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv-&gt;sub_priv = hydra;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_hydra_get_software_info(struct kvaser_usb *dev)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_cmd cmd;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_hydra_send_simple_cmd(dev, CMD_GET_SOFTWARE_INFO_REQ,</div><div class='add'>+					       -1);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	memset(&amp;cmd, 0, sizeof(struct kvaser_cmd));</div><div class='add'>+	err = kvaser_usb_hydra_wait_cmd(dev, CMD_GET_SOFTWARE_INFO_RESP, &amp;cmd);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	dev-&gt;max_tx_urbs = min_t(unsigned int, KVASER_USB_MAX_TX_URBS,</div><div class='add'>+				 le16_to_cpu(cmd.sw_info.max_outstanding_tx));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_hydra_get_software_details(struct kvaser_usb *dev)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_cmd *cmd;</div><div class='add'>+	size_t cmd_len;</div><div class='add'>+	int err;</div><div class='add'>+	u32 flags;</div><div class='add'>+	u32 fw_version;</div><div class='add'>+	struct kvaser_usb_dev_card_data *card_data = &amp;dev-&gt;card_data;</div><div class='add'>+</div><div class='add'>+	cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;header.cmd_no = CMD_GET_SOFTWARE_DETAILS_REQ;</div><div class='add'>+	cmd_len = kvaser_usb_hydra_cmd_size(cmd);</div><div class='add'>+	cmd-&gt;sw_detail_req.use_ext_cmd = 1;</div><div class='add'>+	kvaser_usb_hydra_set_cmd_dest_he</div><div class='add'>+				(cmd, KVASER_USB_HYDRA_HE_ADDRESS_ILLEGAL);</div><div class='add'>+</div><div class='add'>+	kvaser_usb_hydra_set_cmd_transid</div><div class='add'>+				(cmd, kvaser_usb_hydra_get_next_transid(dev));</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_send_cmd(dev, cmd, cmd_len);</div><div class='add'>+	if (err)</div><div class='add'>+		goto end;</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_hydra_wait_cmd(dev, CMD_GET_SOFTWARE_DETAILS_RESP,</div><div class='add'>+					cmd);</div><div class='add'>+	if (err)</div><div class='add'>+		goto end;</div><div class='add'>+</div><div class='add'>+	fw_version = le32_to_cpu(cmd-&gt;sw_detail_res.sw_version);</div><div class='add'>+	dev-&gt;fw_version.major = FIELD_GET(KVASER_USB_SW_VERSION_MAJOR_MASK, fw_version);</div><div class='add'>+	dev-&gt;fw_version.minor = FIELD_GET(KVASER_USB_SW_VERSION_MINOR_MASK, fw_version);</div><div class='add'>+	dev-&gt;fw_version.build = FIELD_GET(KVASER_USB_SW_VERSION_BUILD_MASK, fw_version);</div><div class='add'>+	flags = le32_to_cpu(cmd-&gt;sw_detail_res.sw_flags);</div><div class='add'>+</div><div class='add'>+	if (flags &amp; KVASER_USB_HYDRA_SW_FLAG_FW_BAD) {</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			"Bad firmware, device refuse to run!\n");</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto end;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flags &amp; KVASER_USB_HYDRA_SW_FLAG_FW_BETA)</div><div class='add'>+		dev_info(&amp;dev-&gt;intf-&gt;dev, "Beta firmware in use\n");</div><div class='add'>+</div><div class='add'>+	if (flags &amp; KVASER_USB_HYDRA_SW_FLAG_EXT_CAP)</div><div class='add'>+		card_data-&gt;capabilities |= KVASER_USB_CAP_EXT_CAP;</div><div class='add'>+</div><div class='add'>+	if (flags &amp; KVASER_USB_HYDRA_SW_FLAG_EXT_CMD)</div><div class='add'>+		card_data-&gt;capabilities |= KVASER_USB_HYDRA_CAP_EXT_CMD;</div><div class='add'>+</div><div class='add'>+	if (flags &amp; KVASER_USB_HYDRA_SW_FLAG_CANFD)</div><div class='add'>+		card_data-&gt;ctrlmode_supported |= CAN_CTRLMODE_FD;</div><div class='add'>+</div><div class='add'>+	if (flags &amp; KVASER_USB_HYDRA_SW_FLAG_NONISO)</div><div class='add'>+		card_data-&gt;ctrlmode_supported |= CAN_CTRLMODE_FD_NON_ISO;</div><div class='add'>+</div><div class='add'>+	if (flags &amp;  KVASER_USB_HYDRA_SW_FLAG_FREQ_80M)</div><div class='add'>+		dev-&gt;cfg = &amp;kvaser_usb_hydra_dev_cfg_kcan;</div><div class='add'>+	else if (flags &amp; KVASER_USB_HYDRA_SW_FLAG_CAN_FREQ_80M)</div><div class='add'>+		dev-&gt;cfg = &amp;kvaser_usb_hydra_dev_cfg_rt;</div><div class='add'>+	else</div><div class='add'>+		dev-&gt;cfg = &amp;kvaser_usb_hydra_dev_cfg_flexc;</div><div class='add'>+</div><div class='add'>+end:</div><div class='add'>+	kfree(cmd);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_hydra_get_card_info(struct kvaser_usb *dev)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_cmd cmd;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_hydra_send_simple_cmd(dev, CMD_GET_CARD_INFO_REQ, -1);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	memset(&amp;cmd, 0, sizeof(struct kvaser_cmd));</div><div class='add'>+	err = kvaser_usb_hydra_wait_cmd(dev, CMD_GET_CARD_INFO_RESP, &amp;cmd);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+	dev-&gt;ean[1] = le32_to_cpu(cmd.card_info.ean[1]);</div><div class='add'>+	dev-&gt;ean[0] = le32_to_cpu(cmd.card_info.ean[0]);</div><div class='add'>+	dev-&gt;serial_number = le32_to_cpu(cmd.card_info.serial_number);</div><div class='add'>+	dev-&gt;hw_revision = cmd.card_info.hw_revision;</div><div class='add'>+</div><div class='add'>+	dev-&gt;nchannels = cmd.card_info.nchannels;</div><div class='add'>+	if (dev-&gt;nchannels &gt; KVASER_USB_MAX_NET_DEVICES)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_hydra_get_capabilities(struct kvaser_usb *dev)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	u16 status;</div><div class='add'>+</div><div class='add'>+	if (!(dev-&gt;card_data.capabilities &amp; KVASER_USB_CAP_EXT_CAP)) {</div><div class='add'>+		dev_info(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			 "No extended capability support. Upgrade your device.\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_hydra_get_single_capability</div><div class='add'>+					(dev,</div><div class='add'>+					 KVASER_USB_HYDRA_CAP_CMD_LISTEN_MODE,</div><div class='add'>+					 &amp;status);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+	if (status)</div><div class='add'>+		dev_info(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			 "KVASER_USB_HYDRA_CAP_CMD_LISTEN_MODE failed %u\n",</div><div class='add'>+			 status);</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_hydra_get_single_capability</div><div class='add'>+					(dev,</div><div class='add'>+					 KVASER_USB_HYDRA_CAP_CMD_ERR_REPORT,</div><div class='add'>+					 &amp;status);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+	if (status)</div><div class='add'>+		dev_info(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			 "KVASER_USB_HYDRA_CAP_CMD_ERR_REPORT failed %u\n",</div><div class='add'>+			 status);</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_hydra_get_single_capability</div><div class='add'>+					(dev, KVASER_USB_HYDRA_CAP_CMD_ONE_SHOT,</div><div class='add'>+					 &amp;status);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+	if (status)</div><div class='add'>+		dev_info(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			 "KVASER_USB_HYDRA_CAP_CMD_ONE_SHOT failed %u\n",</div><div class='add'>+			 status);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_hydra_set_led(struct kvaser_usb_net_priv *priv,</div><div class='add'>+				    enum kvaser_usb_led_state state,</div><div class='add'>+				    u16 duration_ms)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb *dev = priv-&gt;dev;</div><div class='add'>+	struct kvaser_cmd *cmd;</div><div class='add'>+	size_t cmd_len;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;header.cmd_no = CMD_LED_ACTION_REQ;</div><div class='add'>+	cmd_len = kvaser_usb_hydra_cmd_size(cmd);</div><div class='add'>+	kvaser_usb_hydra_set_cmd_dest_he(cmd, dev-&gt;card_data.hydra.sysdbg_he);</div><div class='add'>+	kvaser_usb_hydra_set_cmd_transid(cmd, kvaser_usb_hydra_get_next_transid(dev));</div><div class='add'>+</div><div class='add'>+	cmd-&gt;led_action_req.duration_ms = cpu_to_le16(duration_ms);</div><div class='add'>+	cmd-&gt;led_action_req.action = state |</div><div class='add'>+				     FIELD_PREP(KVASER_USB_HYDRA_LED_IDX_MASK,</div><div class='add'>+						KVASER_USB_HYDRA_LED_YELLOW_CH0_IDX +</div><div class='add'>+						KVASER_USB_HYDRA_LEDS_PER_CHANNEL * priv-&gt;channel);</div><div class='add'>+</div><div class='add'>+	ret = kvaser_usb_send_cmd(dev, cmd, cmd_len);</div><div class='add'>+	kfree(cmd);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_hydra_set_opt_mode(const struct kvaser_usb_net_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb *dev = priv-&gt;dev;</div><div class='add'>+	struct kvaser_cmd *cmd;</div><div class='add'>+	size_t cmd_len;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if ((priv-&gt;can.ctrlmode &amp;</div><div class='add'>+	    (CAN_CTRLMODE_FD | CAN_CTRLMODE_FD_NON_ISO)) ==</div><div class='add'>+	    CAN_CTRLMODE_FD_NON_ISO) {</div><div class='add'>+		netdev_warn(priv-&gt;netdev,</div><div class='add'>+			    "CTRLMODE_FD shall be on if CTRLMODE_FD_NON_ISO is on\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;header.cmd_no = CMD_SET_DRIVERMODE_REQ;</div><div class='add'>+	cmd_len = kvaser_usb_hydra_cmd_size(cmd);</div><div class='add'>+	kvaser_usb_hydra_set_cmd_dest_he</div><div class='add'>+		(cmd, dev-&gt;card_data.hydra.channel_to_he[priv-&gt;channel]);</div><div class='add'>+	kvaser_usb_hydra_set_cmd_transid</div><div class='add'>+				(cmd, kvaser_usb_hydra_get_next_transid(dev));</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LISTENONLY)</div><div class='add'>+		cmd-&gt;set_ctrlmode.mode = KVASER_USB_HYDRA_CTRLMODE_LISTEN;</div><div class='add'>+	else</div><div class='add'>+		cmd-&gt;set_ctrlmode.mode = KVASER_USB_HYDRA_CTRLMODE_NORMAL;</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_send_cmd(dev, cmd, cmd_len);</div><div class='add'>+	kfree(cmd);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_hydra_start_chip(struct kvaser_usb_net_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	reinit_completion(&amp;priv-&gt;start_comp);</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_hydra_send_simple_cmd(priv-&gt;dev, CMD_START_CHIP_REQ,</div><div class='add'>+					       priv-&gt;channel);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (!wait_for_completion_timeout(&amp;priv-&gt;start_comp,</div><div class='add'>+					 msecs_to_jiffies(KVASER_USB_TIMEOUT)))</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_hydra_stop_chip(struct kvaser_usb_net_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	reinit_completion(&amp;priv-&gt;stop_comp);</div><div class='add'>+</div><div class='add'>+	/* Make sure we do not report invalid BUS_OFF from CMD_CHIP_STATE_EVENT</div><div class='add'>+	 * see comment in kvaser_usb_hydra_update_state()</div><div class='add'>+	 */</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_hydra_send_simple_cmd(priv-&gt;dev, CMD_STOP_CHIP_REQ,</div><div class='add'>+					       priv-&gt;channel);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (!wait_for_completion_timeout(&amp;priv-&gt;stop_comp,</div><div class='add'>+					 msecs_to_jiffies(KVASER_USB_TIMEOUT)))</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_hydra_flush_queue(struct kvaser_usb_net_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	reinit_completion(&amp;priv-&gt;flush_comp);</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_hydra_send_simple_cmd(priv-&gt;dev, CMD_FLUSH_QUEUE,</div><div class='add'>+					       priv-&gt;channel);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (!wait_for_completion_timeout(&amp;priv-&gt;flush_comp,</div><div class='add'>+					 msecs_to_jiffies(KVASER_USB_TIMEOUT)))</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* A single extended hydra command can be transmitted in multiple transfers</div><div class='add'>+ * We have to buffer partial hydra commands, and handle them on next callback.</div><div class='add'>+ */</div><div class='add'>+static void kvaser_usb_hydra_read_bulk_callback(struct kvaser_usb *dev,</div><div class='add'>+						void *buf, int len)</div><div class='add'>+{</div><div class='add'>+	unsigned long irq_flags;</div><div class='add'>+	struct kvaser_cmd *cmd;</div><div class='add'>+	int pos = 0;</div><div class='add'>+	size_t cmd_len;</div><div class='add'>+	struct kvaser_usb_dev_card_data_hydra *card_data =</div><div class='add'>+							&amp;dev-&gt;card_data.hydra;</div><div class='add'>+	int usb_rx_leftover_len;</div><div class='add'>+	spinlock_t *usb_rx_leftover_lock = &amp;card_data-&gt;usb_rx_leftover_lock;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(usb_rx_leftover_lock, irq_flags);</div><div class='add'>+	usb_rx_leftover_len = card_data-&gt;usb_rx_leftover_len;</div><div class='add'>+	if (usb_rx_leftover_len) {</div><div class='add'>+		int remaining_bytes;</div><div class='add'>+</div><div class='add'>+		cmd = (struct kvaser_cmd *)card_data-&gt;usb_rx_leftover;</div><div class='add'>+</div><div class='add'>+		cmd_len = kvaser_usb_hydra_cmd_size(cmd);</div><div class='add'>+</div><div class='add'>+		remaining_bytes = min_t(unsigned int, len,</div><div class='add'>+					cmd_len - usb_rx_leftover_len);</div><div class='add'>+		/* Make sure we do not overflow usb_rx_leftover */</div><div class='add'>+		if (remaining_bytes + usb_rx_leftover_len &gt;</div><div class='add'>+						KVASER_USB_HYDRA_MAX_CMD_LEN) {</div><div class='add'>+			dev_err(&amp;dev-&gt;intf-&gt;dev, "Format error\n");</div><div class='add'>+			spin_unlock_irqrestore(usb_rx_leftover_lock, irq_flags);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		memcpy(card_data-&gt;usb_rx_leftover + usb_rx_leftover_len, buf,</div><div class='add'>+		       remaining_bytes);</div><div class='add'>+		pos += remaining_bytes;</div><div class='add'>+</div><div class='add'>+		if (remaining_bytes + usb_rx_leftover_len == cmd_len) {</div><div class='add'>+			kvaser_usb_hydra_handle_cmd(dev, cmd);</div><div class='add'>+			usb_rx_leftover_len = 0;</div><div class='add'>+		} else {</div><div class='add'>+			/* Command still not complete */</div><div class='add'>+			usb_rx_leftover_len += remaining_bytes;</div><div class='add'>+		}</div><div class='add'>+		card_data-&gt;usb_rx_leftover_len = usb_rx_leftover_len;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(usb_rx_leftover_lock, irq_flags);</div><div class='add'>+</div><div class='add'>+	while (pos &lt; len) {</div><div class='add'>+		cmd = buf + pos;</div><div class='add'>+</div><div class='add'>+		cmd_len = kvaser_usb_hydra_cmd_size(cmd);</div><div class='add'>+</div><div class='add'>+		if (pos + cmd_len &gt; len) {</div><div class='add'>+			/* We got first part of a command */</div><div class='add'>+			int leftover_bytes;</div><div class='add'>+</div><div class='add'>+			leftover_bytes = len - pos;</div><div class='add'>+			/* Make sure we do not overflow usb_rx_leftover */</div><div class='add'>+			if (leftover_bytes &gt; KVASER_USB_HYDRA_MAX_CMD_LEN) {</div><div class='add'>+				dev_err(&amp;dev-&gt;intf-&gt;dev, "Format error\n");</div><div class='add'>+				return;</div><div class='add'>+			}</div><div class='add'>+			spin_lock_irqsave(usb_rx_leftover_lock, irq_flags);</div><div class='add'>+			memcpy(card_data-&gt;usb_rx_leftover, buf + pos,</div><div class='add'>+			       leftover_bytes);</div><div class='add'>+			card_data-&gt;usb_rx_leftover_len = leftover_bytes;</div><div class='add'>+			spin_unlock_irqrestore(usb_rx_leftover_lock, irq_flags);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		kvaser_usb_hydra_handle_cmd(dev, cmd);</div><div class='add'>+		pos += cmd_len;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void *</div><div class='add'>+kvaser_usb_hydra_frame_to_cmd(const struct kvaser_usb_net_priv *priv,</div><div class='add'>+			      const struct sk_buff *skb, int *cmd_len,</div><div class='add'>+			      u16 transid)</div><div class='add'>+{</div><div class='add'>+	void *buf;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;dev-&gt;card_data.capabilities &amp; KVASER_USB_HYDRA_CAP_EXT_CMD)</div><div class='add'>+		buf = kvaser_usb_hydra_frame_to_cmd_ext(priv, skb, cmd_len,</div><div class='add'>+							transid);</div><div class='add'>+	else</div><div class='add'>+		buf = kvaser_usb_hydra_frame_to_cmd_std(priv, skb, cmd_len,</div><div class='add'>+							transid);</div><div class='add'>+</div><div class='add'>+	return buf;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct kvaser_usb_dev_ops kvaser_usb_hydra_dev_ops = {</div><div class='add'>+	.dev_set_mode = kvaser_usb_hydra_set_mode,</div><div class='add'>+	.dev_set_bittiming = kvaser_usb_hydra_set_bittiming,</div><div class='add'>+	.dev_get_busparams = kvaser_usb_hydra_get_nominal_busparams,</div><div class='add'>+	.dev_set_data_bittiming = kvaser_usb_hydra_set_data_bittiming,</div><div class='add'>+	.dev_get_data_busparams = kvaser_usb_hydra_get_data_busparams,</div><div class='add'>+	.dev_get_berr_counter = kvaser_usb_hydra_get_berr_counter,</div><div class='add'>+	.dev_setup_endpoints = kvaser_usb_hydra_setup_endpoints,</div><div class='add'>+	.dev_init_card = kvaser_usb_hydra_init_card,</div><div class='add'>+	.dev_init_channel = kvaser_usb_hydra_init_channel,</div><div class='add'>+	.dev_get_software_info = kvaser_usb_hydra_get_software_info,</div><div class='add'>+	.dev_get_software_details = kvaser_usb_hydra_get_software_details,</div><div class='add'>+	.dev_get_card_info = kvaser_usb_hydra_get_card_info,</div><div class='add'>+	.dev_get_capabilities = kvaser_usb_hydra_get_capabilities,</div><div class='add'>+	.dev_set_led = kvaser_usb_hydra_set_led,</div><div class='add'>+	.dev_set_opt_mode = kvaser_usb_hydra_set_opt_mode,</div><div class='add'>+	.dev_start_chip = kvaser_usb_hydra_start_chip,</div><div class='add'>+	.dev_stop_chip = kvaser_usb_hydra_stop_chip,</div><div class='add'>+	.dev_reset_chip = NULL,</div><div class='add'>+	.dev_flush_queue = kvaser_usb_hydra_flush_queue,</div><div class='add'>+	.dev_read_bulk_callback = kvaser_usb_hydra_read_bulk_callback,</div><div class='add'>+	.dev_frame_to_cmd = kvaser_usb_hydra_frame_to_cmd,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct kvaser_usb_dev_cfg kvaser_usb_hydra_dev_cfg_kcan = {</div><div class='add'>+	.clock = {</div><div class='add'>+		.freq = 80 * MEGA /* Hz */,</div><div class='add'>+	},</div><div class='add'>+	.timestamp_freq = 80,</div><div class='add'>+	.bittiming_const = &amp;kvaser_usb_hydra_kcan_bittiming_c,</div><div class='add'>+	.data_bittiming_const = &amp;kvaser_usb_hydra_kcan_bittiming_c,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct kvaser_usb_dev_cfg kvaser_usb_hydra_dev_cfg_flexc = {</div><div class='add'>+	.clock = {</div><div class='add'>+		.freq = 24 * MEGA /* Hz */,</div><div class='add'>+	},</div><div class='add'>+	.timestamp_freq = 1,</div><div class='add'>+	.bittiming_const = &amp;kvaser_usb_flexc_bittiming_const,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct kvaser_usb_dev_cfg kvaser_usb_hydra_dev_cfg_rt = {</div><div class='add'>+	.clock = {</div><div class='add'>+		.freq = 80 * MEGA /* Hz */,</div><div class='add'>+	},</div><div class='add'>+	.timestamp_freq = 24,</div><div class='add'>+	.bittiming_const = &amp;kvaser_usb_hydra_rt_bittiming_c,</div><div class='add'>+	.data_bittiming_const = &amp;kvaser_usb_hydra_rtd_bittiming_c,</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/net/can/usb/kvaser_usb/kvaser_usb_leaf.c b/drivers/net/can/usb/kvaser_usb/kvaser_usb_leaf.c<br/>new file mode 100644<br/>index 000000000000..1167d38344f1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/kvaser_usb/kvaser_usb_leaf.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/kvaser_usb/kvaser_usb_leaf.c</a></div><div class='hunk'>@@ -0,0 +1,2006 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Parts of this driver are based on the following:</div><div class='add'>+ *  - Kvaser linux leaf driver (version 4.78)</div><div class='add'>+ *  - CAN driver for esd CAN-USB/2</div><div class='add'>+ *  - Kvaser linux usbcanII driver (version 5.3)</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2002-2018 KVASER AB, Sweden. All rights reserved.</div><div class='add'>+ * Copyright (C) 2010 Matthias Fuchs &lt;matthias.fuchs@esd.eu&gt;, esd gmbh</div><div class='add'>+ * Copyright (C) 2012 Olivier Sobrie &lt;olivier@sobrie.be&gt;</div><div class='add'>+ * Copyright (C) 2015 Valeo S.A.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/completion.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/gfp.h&gt;</div><div class='add'>+#include &lt;linux/jiffies.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/units.h&gt;</div><div class='add'>+#include &lt;linux/usb.h&gt;</div><div class='add'>+#include &lt;linux/workqueue.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/can.h&gt;</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/can/error.h&gt;</div><div class='add'>+#include &lt;linux/can/netlink.h&gt;</div><div class='add'>+</div><div class='add'>+#include "kvaser_usb.h"</div><div class='add'>+</div><div class='add'>+#define MAX_USBCAN_NET_DEVICES		2</div><div class='add'>+</div><div class='add'>+/* Command header size */</div><div class='add'>+#define CMD_HEADER_LEN			2</div><div class='add'>+</div><div class='add'>+/* Kvaser CAN message flags */</div><div class='add'>+#define MSG_FLAG_ERROR_FRAME		BIT(0)</div><div class='add'>+#define MSG_FLAG_OVERRUN		BIT(1)</div><div class='add'>+#define MSG_FLAG_NERR			BIT(2)</div><div class='add'>+#define MSG_FLAG_WAKEUP			BIT(3)</div><div class='add'>+#define MSG_FLAG_REMOTE_FRAME		BIT(4)</div><div class='add'>+#define MSG_FLAG_RESERVED		BIT(5)</div><div class='add'>+#define MSG_FLAG_TX_ACK			BIT(6)</div><div class='add'>+#define MSG_FLAG_TX_REQUEST		BIT(7)</div><div class='add'>+</div><div class='add'>+/* CAN states (M16C CxSTRH register) */</div><div class='add'>+#define M16C_STATE_BUS_RESET		BIT(0)</div><div class='add'>+#define M16C_STATE_BUS_ERROR		BIT(4)</div><div class='add'>+#define M16C_STATE_BUS_PASSIVE		BIT(5)</div><div class='add'>+#define M16C_STATE_BUS_OFF		BIT(6)</div><div class='add'>+</div><div class='add'>+/* Leaf/usbcan command ids */</div><div class='add'>+#define CMD_RX_STD_MESSAGE		12</div><div class='add'>+#define CMD_TX_STD_MESSAGE		13</div><div class='add'>+#define CMD_RX_EXT_MESSAGE		14</div><div class='add'>+#define CMD_TX_EXT_MESSAGE		15</div><div class='add'>+#define CMD_SET_BUS_PARAMS		16</div><div class='add'>+#define CMD_GET_BUS_PARAMS		17</div><div class='add'>+#define CMD_GET_BUS_PARAMS_REPLY	18</div><div class='add'>+#define CMD_GET_CHIP_STATE		19</div><div class='add'>+#define CMD_CHIP_STATE_EVENT		20</div><div class='add'>+#define CMD_SET_CTRL_MODE		21</div><div class='add'>+#define CMD_RESET_CHIP			24</div><div class='add'>+#define CMD_START_CHIP			26</div><div class='add'>+#define CMD_START_CHIP_REPLY		27</div><div class='add'>+#define CMD_STOP_CHIP			28</div><div class='add'>+#define CMD_STOP_CHIP_REPLY		29</div><div class='add'>+</div><div class='add'>+#define CMD_USBCAN_CLOCK_OVERFLOW_EVENT	33</div><div class='add'>+</div><div class='add'>+#define CMD_GET_CARD_INFO		34</div><div class='add'>+#define CMD_GET_CARD_INFO_REPLY		35</div><div class='add'>+#define CMD_GET_SOFTWARE_INFO		38</div><div class='add'>+#define CMD_GET_SOFTWARE_INFO_REPLY	39</div><div class='add'>+#define CMD_ERROR_EVENT			45</div><div class='add'>+#define CMD_FLUSH_QUEUE			48</div><div class='add'>+#define CMD_TX_ACKNOWLEDGE		50</div><div class='add'>+#define CMD_CAN_ERROR_EVENT		51</div><div class='add'>+#define CMD_FLUSH_QUEUE_REPLY		68</div><div class='add'>+#define CMD_GET_CAPABILITIES_REQ	95</div><div class='add'>+#define CMD_GET_CAPABILITIES_RESP	96</div><div class='add'>+#define CMD_LED_ACTION_REQ		101</div><div class='add'>+#define CMD_LED_ACTION_RESP		102</div><div class='add'>+</div><div class='add'>+#define CMD_LEAF_LOG_MESSAGE		106</div><div class='add'>+</div><div class='add'>+/* Leaf frequency options */</div><div class='add'>+#define KVASER_USB_LEAF_SWOPTION_FREQ_MASK 0x60</div><div class='add'>+#define KVASER_USB_LEAF_SWOPTION_FREQ_16_MHZ_CLK 0</div><div class='add'>+#define KVASER_USB_LEAF_SWOPTION_FREQ_32_MHZ_CLK BIT(5)</div><div class='add'>+#define KVASER_USB_LEAF_SWOPTION_FREQ_24_MHZ_CLK BIT(6)</div><div class='add'>+</div><div class='add'>+#define KVASER_USB_LEAF_SWOPTION_EXT_CAP BIT(12)</div><div class='add'>+</div><div class='add'>+/* error factors */</div><div class='add'>+#define M16C_EF_ACKE			BIT(0)</div><div class='add'>+#define M16C_EF_CRCE			BIT(1)</div><div class='add'>+#define M16C_EF_FORME			BIT(2)</div><div class='add'>+#define M16C_EF_STFE			BIT(3)</div><div class='add'>+#define M16C_EF_BITE0			BIT(4)</div><div class='add'>+#define M16C_EF_BITE1			BIT(5)</div><div class='add'>+#define M16C_EF_RCVE			BIT(6)</div><div class='add'>+#define M16C_EF_TRE			BIT(7)</div><div class='add'>+</div><div class='add'>+/* Only Leaf-based devices can report M16C error factors,</div><div class='add'>+ * thus define our own error status flags for USBCANII</div><div class='add'>+ */</div><div class='add'>+#define USBCAN_ERROR_STATE_NONE		0</div><div class='add'>+#define USBCAN_ERROR_STATE_TX_ERROR	BIT(0)</div><div class='add'>+#define USBCAN_ERROR_STATE_RX_ERROR	BIT(1)</div><div class='add'>+#define USBCAN_ERROR_STATE_BUSERROR	BIT(2)</div><div class='add'>+</div><div class='add'>+/* ctrl modes */</div><div class='add'>+#define KVASER_CTRL_MODE_NORMAL		1</div><div class='add'>+#define KVASER_CTRL_MODE_SILENT		2</div><div class='add'>+#define KVASER_CTRL_MODE_SELFRECEPTION	3</div><div class='add'>+#define KVASER_CTRL_MODE_OFF		4</div><div class='add'>+</div><div class='add'>+/* Extended CAN identifier flag */</div><div class='add'>+#define KVASER_EXTENDED_FRAME		BIT(31)</div><div class='add'>+</div><div class='add'>+/* USBCanII timestamp */</div><div class='add'>+#define KVASER_USB_USBCAN_CLK_OVERFLOW_MASK GENMASK(31, 16)</div><div class='add'>+#define KVASER_USB_USBCAN_TIMESTAMP_FACTOR 10</div><div class='add'>+</div><div class='add'>+struct kvaser_cmd_simple {</div><div class='add'>+	u8 tid;</div><div class='add'>+	u8 channel;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct kvaser_cmd_cardinfo {</div><div class='add'>+	u8 tid;</div><div class='add'>+	u8 nchannels;</div><div class='add'>+	__le32 serial_number;</div><div class='add'>+	__le32 padding0;</div><div class='add'>+	__le32 clock_resolution;</div><div class='add'>+	__le32 mfgdate;</div><div class='add'>+	__le32 ean[2];</div><div class='add'>+	u8 hw_revision;</div><div class='add'>+	union {</div><div class='add'>+		struct {</div><div class='add'>+			u8 usb_hs_mode;</div><div class='add'>+		} __packed leaf1;</div><div class='add'>+		struct {</div><div class='add'>+			u8 padding;</div><div class='add'>+		} __packed usbcan1;</div><div class='add'>+	} __packed;</div><div class='add'>+	__le16 padding1;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct leaf_cmd_softinfo {</div><div class='add'>+	u8 tid;</div><div class='add'>+	u8 padding0;</div><div class='add'>+	__le32 sw_options;</div><div class='add'>+	__le32 fw_version;</div><div class='add'>+	__le16 max_outstanding_tx;</div><div class='add'>+	__le16 padding1[9];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct usbcan_cmd_softinfo {</div><div class='add'>+	u8 tid;</div><div class='add'>+	u8 fw_name[5];</div><div class='add'>+	__le16 max_outstanding_tx;</div><div class='add'>+	u8 padding[6];</div><div class='add'>+	__le32 fw_version;</div><div class='add'>+	__le16 checksum;</div><div class='add'>+	__le16 sw_options;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct kvaser_cmd_busparams {</div><div class='add'>+	u8 tid;</div><div class='add'>+	u8 channel;</div><div class='add'>+	struct kvaser_usb_busparams busparams;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* The device has one LED per CAN channel</div><div class='add'>+ * The LSB of action field controls the state:</div><div class='add'>+ *   0 = ON</div><div class='add'>+ *   1 = OFF</div><div class='add'>+ * The remaining bits of action field is the LED index</div><div class='add'>+ */</div><div class='add'>+#define KVASER_USB_LEAF_LED_IDX_MASK GENMASK(31, 1)</div><div class='add'>+#define KVASER_USB_LEAF_LED_YELLOW_CH0_IDX 2</div><div class='add'>+struct kvaser_cmd_led_action_req {</div><div class='add'>+	u8 tid;</div><div class='add'>+	u8 action;</div><div class='add'>+	__le16 duration_ms;</div><div class='add'>+	u8 padding[24];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct kvaser_cmd_tx_can {</div><div class='add'>+	u8 channel;</div><div class='add'>+	u8 tid;</div><div class='add'>+	u8 data[14];</div><div class='add'>+	union {</div><div class='add'>+		struct {</div><div class='add'>+			u8 padding;</div><div class='add'>+			u8 flags;</div><div class='add'>+		} __packed leaf;</div><div class='add'>+		struct {</div><div class='add'>+			u8 flags;</div><div class='add'>+			u8 padding;</div><div class='add'>+		} __packed usbcan;</div><div class='add'>+	} __packed;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct kvaser_cmd_rx_can_header {</div><div class='add'>+	u8 channel;</div><div class='add'>+	u8 flag;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct leaf_cmd_rx_can {</div><div class='add'>+	u8 channel;</div><div class='add'>+	u8 flag;</div><div class='add'>+</div><div class='add'>+	__le16 time[3];</div><div class='add'>+	u8 data[14];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct usbcan_cmd_rx_can {</div><div class='add'>+	u8 channel;</div><div class='add'>+	u8 flag;</div><div class='add'>+</div><div class='add'>+	u8 data[14];</div><div class='add'>+	__le16 time;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct leaf_cmd_chip_state_event {</div><div class='add'>+	u8 tid;</div><div class='add'>+	u8 channel;</div><div class='add'>+</div><div class='add'>+	__le16 time[3];</div><div class='add'>+	u8 tx_errors_count;</div><div class='add'>+	u8 rx_errors_count;</div><div class='add'>+</div><div class='add'>+	u8 status;</div><div class='add'>+	u8 padding[3];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct usbcan_cmd_chip_state_event {</div><div class='add'>+	u8 tid;</div><div class='add'>+	u8 channel;</div><div class='add'>+</div><div class='add'>+	u8 tx_errors_count;</div><div class='add'>+	u8 rx_errors_count;</div><div class='add'>+	__le16 time;</div><div class='add'>+</div><div class='add'>+	u8 status;</div><div class='add'>+	u8 padding[3];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct kvaser_cmd_tx_acknowledge_header {</div><div class='add'>+	u8 channel;</div><div class='add'>+	u8 tid;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct leaf_cmd_tx_acknowledge {</div><div class='add'>+	u8 channel;</div><div class='add'>+	u8 tid;</div><div class='add'>+	__le16 time[3];</div><div class='add'>+	u8 padding[2];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct usbcan_cmd_tx_acknowledge {</div><div class='add'>+	u8 channel;</div><div class='add'>+	u8 tid;</div><div class='add'>+	__le16 time;</div><div class='add'>+	u8 padding[2];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct leaf_cmd_can_error_event {</div><div class='add'>+	u8 tid;</div><div class='add'>+	u8 flags;</div><div class='add'>+	__le16 time[3];</div><div class='add'>+	u8 channel;</div><div class='add'>+	u8 padding;</div><div class='add'>+	u8 tx_errors_count;</div><div class='add'>+	u8 rx_errors_count;</div><div class='add'>+	u8 status;</div><div class='add'>+	u8 error_factor;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct usbcan_cmd_can_error_event {</div><div class='add'>+	u8 tid;</div><div class='add'>+	u8 padding;</div><div class='add'>+	u8 tx_errors_count_ch0;</div><div class='add'>+	u8 rx_errors_count_ch0;</div><div class='add'>+	u8 tx_errors_count_ch1;</div><div class='add'>+	u8 rx_errors_count_ch1;</div><div class='add'>+	u8 status_ch0;</div><div class='add'>+	u8 status_ch1;</div><div class='add'>+	__le16 time;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* CMD_ERROR_EVENT error codes */</div><div class='add'>+#define KVASER_USB_LEAF_ERROR_EVENT_TX_QUEUE_FULL 0x8</div><div class='add'>+#define KVASER_USB_LEAF_ERROR_EVENT_PARAM 0x9</div><div class='add'>+</div><div class='add'>+struct leaf_cmd_error_event {</div><div class='add'>+	u8 tid;</div><div class='add'>+	u8 error_code;</div><div class='add'>+	__le16 timestamp[3];</div><div class='add'>+	__le16 padding;</div><div class='add'>+	__le16 info1;</div><div class='add'>+	__le16 info2;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct usbcan_cmd_error_event {</div><div class='add'>+	u8 tid;</div><div class='add'>+	u8 error_code;</div><div class='add'>+	__le16 info1;</div><div class='add'>+	__le16 info2;</div><div class='add'>+	__le16 timestamp;</div><div class='add'>+	__le16 padding;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct usbcan_cmd_clk_overflow_event {</div><div class='add'>+	u8 tid;</div><div class='add'>+	u8 padding;</div><div class='add'>+	__le32 time;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct kvaser_cmd_ctrl_mode {</div><div class='add'>+	u8 tid;</div><div class='add'>+	u8 channel;</div><div class='add'>+	u8 ctrl_mode;</div><div class='add'>+	u8 padding[3];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct kvaser_cmd_flush_queue {</div><div class='add'>+	u8 tid;</div><div class='add'>+	u8 channel;</div><div class='add'>+	u8 flags;</div><div class='add'>+	u8 padding[3];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct leaf_cmd_log_message {</div><div class='add'>+	u8 channel;</div><div class='add'>+	u8 flags;</div><div class='add'>+	__le16 time[3];</div><div class='add'>+	u8 dlc;</div><div class='add'>+	u8 time_offset;</div><div class='add'>+	__le32 id;</div><div class='add'>+	u8 data[8];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* Sub commands for cap_req and cap_res */</div><div class='add'>+#define KVASER_USB_LEAF_CAP_CMD_LISTEN_MODE 0x02</div><div class='add'>+#define KVASER_USB_LEAF_CAP_CMD_ERR_REPORT 0x05</div><div class='add'>+struct kvaser_cmd_cap_req {</div><div class='add'>+	__le16 padding0;</div><div class='add'>+	__le16 cap_cmd;</div><div class='add'>+	__le16 padding1;</div><div class='add'>+	__le16 channel;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* Status codes for cap_res */</div><div class='add'>+#define KVASER_USB_LEAF_CAP_STAT_OK 0x00</div><div class='add'>+#define KVASER_USB_LEAF_CAP_STAT_NOT_IMPL 0x01</div><div class='add'>+#define KVASER_USB_LEAF_CAP_STAT_UNAVAIL 0x02</div><div class='add'>+struct kvaser_cmd_cap_res {</div><div class='add'>+	__le16 padding;</div><div class='add'>+	__le16 cap_cmd;</div><div class='add'>+	__le16 status;</div><div class='add'>+	__le32 mask;</div><div class='add'>+	__le32 value;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct kvaser_cmd {</div><div class='add'>+	u8 len;</div><div class='add'>+	u8 id;</div><div class='add'>+	union	{</div><div class='add'>+		struct kvaser_cmd_simple simple;</div><div class='add'>+		struct kvaser_cmd_cardinfo cardinfo;</div><div class='add'>+		struct kvaser_cmd_busparams busparams;</div><div class='add'>+</div><div class='add'>+		struct kvaser_cmd_led_action_req led_action_req;</div><div class='add'>+</div><div class='add'>+		struct kvaser_cmd_rx_can_header rx_can_header;</div><div class='add'>+		struct kvaser_cmd_tx_acknowledge_header tx_acknowledge_header;</div><div class='add'>+</div><div class='add'>+		union {</div><div class='add'>+			struct leaf_cmd_softinfo softinfo;</div><div class='add'>+			struct leaf_cmd_rx_can rx_can;</div><div class='add'>+			struct leaf_cmd_chip_state_event chip_state_event;</div><div class='add'>+			struct leaf_cmd_can_error_event can_error_event;</div><div class='add'>+			struct leaf_cmd_log_message log_message;</div><div class='add'>+			struct leaf_cmd_error_event error_event;</div><div class='add'>+			struct kvaser_cmd_cap_req cap_req;</div><div class='add'>+			struct kvaser_cmd_cap_res cap_res;</div><div class='add'>+			struct leaf_cmd_tx_acknowledge tx_ack;</div><div class='add'>+		} __packed leaf;</div><div class='add'>+</div><div class='add'>+		union {</div><div class='add'>+			struct usbcan_cmd_softinfo softinfo;</div><div class='add'>+			struct usbcan_cmd_rx_can rx_can;</div><div class='add'>+			struct usbcan_cmd_chip_state_event chip_state_event;</div><div class='add'>+			struct usbcan_cmd_can_error_event can_error_event;</div><div class='add'>+			struct usbcan_cmd_error_event error_event;</div><div class='add'>+			struct usbcan_cmd_tx_acknowledge tx_ack;</div><div class='add'>+			struct usbcan_cmd_clk_overflow_event clk_overflow_event;</div><div class='add'>+		} __packed usbcan;</div><div class='add'>+</div><div class='add'>+		struct kvaser_cmd_tx_can tx_can;</div><div class='add'>+		struct kvaser_cmd_ctrl_mode ctrl_mode;</div><div class='add'>+		struct kvaser_cmd_flush_queue flush_queue;</div><div class='add'>+	} u;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+#define CMD_SIZE_ANY 0xff</div><div class='add'>+#define kvaser_fsize(field) sizeof_field(struct kvaser_cmd, field)</div><div class='add'>+</div><div class='add'>+static const u8 kvaser_usb_leaf_cmd_sizes_leaf[] = {</div><div class='add'>+	[CMD_START_CHIP_REPLY]		= kvaser_fsize(u.simple),</div><div class='add'>+	[CMD_STOP_CHIP_REPLY]		= kvaser_fsize(u.simple),</div><div class='add'>+	[CMD_GET_CARD_INFO_REPLY]	= kvaser_fsize(u.cardinfo),</div><div class='add'>+	[CMD_TX_ACKNOWLEDGE]		= kvaser_fsize(u.leaf.tx_ack),</div><div class='add'>+	[CMD_GET_SOFTWARE_INFO_REPLY]	= kvaser_fsize(u.leaf.softinfo),</div><div class='add'>+	[CMD_RX_STD_MESSAGE]		= kvaser_fsize(u.leaf.rx_can),</div><div class='add'>+	[CMD_RX_EXT_MESSAGE]		= kvaser_fsize(u.leaf.rx_can),</div><div class='add'>+	[CMD_LEAF_LOG_MESSAGE]		= kvaser_fsize(u.leaf.log_message),</div><div class='add'>+	[CMD_CHIP_STATE_EVENT]		= kvaser_fsize(u.leaf.chip_state_event),</div><div class='add'>+	[CMD_CAN_ERROR_EVENT]		= kvaser_fsize(u.leaf.can_error_event),</div><div class='add'>+	[CMD_GET_CAPABILITIES_RESP]	= kvaser_fsize(u.leaf.cap_res),</div><div class='add'>+	[CMD_GET_BUS_PARAMS_REPLY]	= kvaser_fsize(u.busparams),</div><div class='add'>+	[CMD_ERROR_EVENT]		= kvaser_fsize(u.leaf.error_event),</div><div class='add'>+	/* ignored events: */</div><div class='add'>+	[CMD_FLUSH_QUEUE_REPLY]		= CMD_SIZE_ANY,</div><div class='add'>+	[CMD_LED_ACTION_RESP]		= CMD_SIZE_ANY,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u8 kvaser_usb_leaf_cmd_sizes_usbcan[] = {</div><div class='add'>+	[CMD_START_CHIP_REPLY]		= kvaser_fsize(u.simple),</div><div class='add'>+	[CMD_STOP_CHIP_REPLY]		= kvaser_fsize(u.simple),</div><div class='add'>+	[CMD_GET_CARD_INFO_REPLY]	= kvaser_fsize(u.cardinfo),</div><div class='add'>+	[CMD_TX_ACKNOWLEDGE]		= kvaser_fsize(u.usbcan.tx_ack),</div><div class='add'>+	[CMD_GET_SOFTWARE_INFO_REPLY]	= kvaser_fsize(u.usbcan.softinfo),</div><div class='add'>+	[CMD_RX_STD_MESSAGE]		= kvaser_fsize(u.usbcan.rx_can),</div><div class='add'>+	[CMD_RX_EXT_MESSAGE]		= kvaser_fsize(u.usbcan.rx_can),</div><div class='add'>+	[CMD_CHIP_STATE_EVENT]		= kvaser_fsize(u.usbcan.chip_state_event),</div><div class='add'>+	[CMD_CAN_ERROR_EVENT]		= kvaser_fsize(u.usbcan.can_error_event),</div><div class='add'>+	[CMD_ERROR_EVENT]		= kvaser_fsize(u.usbcan.error_event),</div><div class='add'>+	[CMD_USBCAN_CLOCK_OVERFLOW_EVENT] = kvaser_fsize(u.usbcan.clk_overflow_event),</div><div class='add'>+	/* ignored events: */</div><div class='add'>+	[CMD_LED_ACTION_RESP]		= CMD_SIZE_ANY,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Summary of a kvaser error event, for a unified Leaf/Usbcan error</div><div class='add'>+ * handling. Some discrepancies between the two families exist:</div><div class='add'>+ *</div><div class='add'>+ * - USBCAN firmware does not report M16C "error factors"</div><div class='add'>+ * - USBCAN controllers has difficulties reporting if the raised error</div><div class='add'>+ *   event is for ch0 or ch1. They leave such arbitration to the OS</div><div class='add'>+ *   driver by letting it compare error counters with previous values</div><div class='add'>+ *   and decide the error event's channel. Thus for USBCAN, the channel</div><div class='add'>+ *   field is only advisory.</div><div class='add'>+ */</div><div class='add'>+struct kvaser_usb_err_summary {</div><div class='add'>+	u8 channel, status, txerr, rxerr;</div><div class='add'>+	union {</div><div class='add'>+		struct {</div><div class='add'>+			u8 error_factor;</div><div class='add'>+		} leaf;</div><div class='add'>+		struct {</div><div class='add'>+			u8 other_ch_status;</div><div class='add'>+			u8 error_state;</div><div class='add'>+		} usbcan;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct kvaser_usb_net_leaf_priv {</div><div class='add'>+	struct kvaser_usb_net_priv *net;</div><div class='add'>+</div><div class='add'>+	struct delayed_work chip_state_req_work;</div><div class='add'>+</div><div class='add'>+	/* started but not reported as bus-on yet */</div><div class='add'>+	bool joining_bus;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const kvaser_usb_leaf_m16c_bittiming_const = {</div><div class='add'>+	.name = "kvaser_usb_ucii",</div><div class='add'>+	.tseg1_min = 4,</div><div class='add'>+	.tseg1_max = 16,</div><div class='add'>+	.tseg2_min = 2,</div><div class='add'>+	.tseg2_max = 8,</div><div class='add'>+	.sjw_max = 4,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 16,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const kvaser_usb_leaf_m32c_bittiming_const = {</div><div class='add'>+	.name = "kvaser_usb_leaf",</div><div class='add'>+	.tseg1_min = 3,</div><div class='add'>+	.tseg1_max = 16,</div><div class='add'>+	.tseg2_min = 2,</div><div class='add'>+	.tseg2_max = 8,</div><div class='add'>+	.sjw_max = 4,</div><div class='add'>+	.brp_min = 2,</div><div class='add'>+	.brp_max = 128,</div><div class='add'>+	.brp_inc = 2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct kvaser_usb_dev_cfg kvaser_usb_leaf_usbcan_dev_cfg = {</div><div class='add'>+	.clock = {</div><div class='add'>+		.freq = 8 * MEGA /* Hz */,</div><div class='add'>+	},</div><div class='add'>+	.timestamp_freq = 1,</div><div class='add'>+	.bittiming_const = &amp;kvaser_usb_leaf_m16c_bittiming_const,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct kvaser_usb_dev_cfg kvaser_usb_leaf_m32c_dev_cfg_16mhz = {</div><div class='add'>+	.clock = {</div><div class='add'>+		.freq = 16 * MEGA /* Hz */,</div><div class='add'>+	},</div><div class='add'>+	.timestamp_freq = 16,</div><div class='add'>+	.bittiming_const = &amp;kvaser_usb_leaf_m32c_bittiming_const,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct kvaser_usb_dev_cfg kvaser_usb_leaf_m32c_dev_cfg_24mhz = {</div><div class='add'>+	.clock = {</div><div class='add'>+		.freq = 16 * MEGA /* Hz */,</div><div class='add'>+	},</div><div class='add'>+	.timestamp_freq = 24,</div><div class='add'>+	.bittiming_const = &amp;kvaser_usb_leaf_m32c_bittiming_const,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct kvaser_usb_dev_cfg kvaser_usb_leaf_m32c_dev_cfg_32mhz = {</div><div class='add'>+	.clock = {</div><div class='add'>+		.freq = 16 * MEGA /* Hz */,</div><div class='add'>+	},</div><div class='add'>+	.timestamp_freq = 32,</div><div class='add'>+	.bittiming_const = &amp;kvaser_usb_leaf_m32c_bittiming_const,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct kvaser_usb_dev_cfg kvaser_usb_leaf_imx_dev_cfg_16mhz = {</div><div class='add'>+	.clock = {</div><div class='add'>+		.freq = 16 * MEGA /* Hz */,</div><div class='add'>+	},</div><div class='add'>+	.timestamp_freq = 16,</div><div class='add'>+	.bittiming_const = &amp;kvaser_usb_flexc_bittiming_const,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct kvaser_usb_dev_cfg kvaser_usb_leaf_imx_dev_cfg_24mhz = {</div><div class='add'>+	.clock = {</div><div class='add'>+		.freq = 24 * MEGA /* Hz */,</div><div class='add'>+	},</div><div class='add'>+	.timestamp_freq = 24,</div><div class='add'>+	.bittiming_const = &amp;kvaser_usb_flexc_bittiming_const,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct kvaser_usb_dev_cfg kvaser_usb_leaf_imx_dev_cfg_32mhz = {</div><div class='add'>+	.clock = {</div><div class='add'>+		.freq = 32 * MEGA /* Hz */,</div><div class='add'>+	},</div><div class='add'>+	.timestamp_freq = 32,</div><div class='add'>+	.bittiming_const = &amp;kvaser_usb_flexc_bittiming_const,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline ktime_t kvaser_usb_usbcan_timestamp_to_ktime(const struct kvaser_usb *dev,</div><div class='add'>+							   __le16 timestamp)</div><div class='add'>+{</div><div class='add'>+	u64 ticks = le16_to_cpu(timestamp) |</div><div class='add'>+		    dev-&gt;card_data.usbcan_timestamp_msb;</div><div class='add'>+</div><div class='add'>+	return kvaser_usb_ticks_to_ktime(dev-&gt;cfg, ticks * KVASER_USB_USBCAN_TIMESTAMP_FACTOR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_leaf_verify_size(const struct kvaser_usb *dev,</div><div class='add'>+				       const struct kvaser_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	/* buffer size &gt;= cmd-&gt;len ensured by caller */</div><div class='add'>+	u8 min_size = 0;</div><div class='add'>+</div><div class='add'>+	switch (dev-&gt;driver_info-&gt;family) {</div><div class='add'>+	case KVASER_LEAF:</div><div class='add'>+		if (cmd-&gt;id &lt; ARRAY_SIZE(kvaser_usb_leaf_cmd_sizes_leaf))</div><div class='add'>+			min_size = kvaser_usb_leaf_cmd_sizes_leaf[cmd-&gt;id];</div><div class='add'>+		break;</div><div class='add'>+	case KVASER_USBCAN:</div><div class='add'>+		if (cmd-&gt;id &lt; ARRAY_SIZE(kvaser_usb_leaf_cmd_sizes_usbcan))</div><div class='add'>+			min_size = kvaser_usb_leaf_cmd_sizes_usbcan[cmd-&gt;id];</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (min_size == CMD_SIZE_ANY)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (min_size) {</div><div class='add'>+		min_size += CMD_HEADER_LEN;</div><div class='add'>+		if (cmd-&gt;len &gt;= min_size)</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		dev_err_ratelimited(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+				    "Received command %u too short (size %u, needed %u)",</div><div class='add'>+				    cmd-&gt;id, cmd-&gt;len, min_size);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_warn_ratelimited(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			     "Unhandled command (%d, size %d)\n",</div><div class='add'>+			     cmd-&gt;id, cmd-&gt;len);</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void *</div><div class='add'>+kvaser_usb_leaf_frame_to_cmd(const struct kvaser_usb_net_priv *priv,</div><div class='add'>+			     const struct sk_buff *skb, int *cmd_len,</div><div class='add'>+			     u16 transid)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb *dev = priv-&gt;dev;</div><div class='add'>+	struct kvaser_cmd *cmd;</div><div class='add'>+	u8 *cmd_tx_can_flags = NULL;		/* GCC */</div><div class='add'>+	struct can_frame *cf = (struct can_frame *)skb-&gt;data;</div><div class='add'>+</div><div class='add'>+	cmd = kmalloc(sizeof(*cmd), GFP_ATOMIC);</div><div class='add'>+	if (cmd) {</div><div class='add'>+		cmd-&gt;u.tx_can.tid = transid &amp; 0xff;</div><div class='add'>+		cmd-&gt;len = *cmd_len = CMD_HEADER_LEN +</div><div class='add'>+				      sizeof(struct kvaser_cmd_tx_can);</div><div class='add'>+		cmd-&gt;u.tx_can.channel = priv-&gt;channel;</div><div class='add'>+</div><div class='add'>+		switch (dev-&gt;driver_info-&gt;family) {</div><div class='add'>+		case KVASER_LEAF:</div><div class='add'>+			cmd_tx_can_flags = &amp;cmd-&gt;u.tx_can.leaf.flags;</div><div class='add'>+			break;</div><div class='add'>+		case KVASER_USBCAN:</div><div class='add'>+			cmd_tx_can_flags = &amp;cmd-&gt;u.tx_can.usbcan.flags;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		*cmd_tx_can_flags = 0;</div><div class='add'>+</div><div class='add'>+		if (cf-&gt;can_id &amp; CAN_EFF_FLAG) {</div><div class='add'>+			cmd-&gt;id = CMD_TX_EXT_MESSAGE;</div><div class='add'>+			cmd-&gt;u.tx_can.data[0] = (cf-&gt;can_id &gt;&gt; 24) &amp; 0x1f;</div><div class='add'>+			cmd-&gt;u.tx_can.data[1] = (cf-&gt;can_id &gt;&gt; 18) &amp; 0x3f;</div><div class='add'>+			cmd-&gt;u.tx_can.data[2] = (cf-&gt;can_id &gt;&gt; 14) &amp; 0x0f;</div><div class='add'>+			cmd-&gt;u.tx_can.data[3] = (cf-&gt;can_id &gt;&gt; 6) &amp; 0xff;</div><div class='add'>+			cmd-&gt;u.tx_can.data[4] = cf-&gt;can_id &amp; 0x3f;</div><div class='add'>+		} else {</div><div class='add'>+			cmd-&gt;id = CMD_TX_STD_MESSAGE;</div><div class='add'>+			cmd-&gt;u.tx_can.data[0] = (cf-&gt;can_id &gt;&gt; 6) &amp; 0x1f;</div><div class='add'>+			cmd-&gt;u.tx_can.data[1] = cf-&gt;can_id &amp; 0x3f;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		cmd-&gt;u.tx_can.data[5] = can_get_cc_dlc(cf, priv-&gt;can.ctrlmode);</div><div class='add'>+		memcpy(&amp;cmd-&gt;u.tx_can.data[6], cf-&gt;data, cf-&gt;len);</div><div class='add'>+</div><div class='add'>+		if (cf-&gt;can_id &amp; CAN_RTR_FLAG)</div><div class='add'>+			*cmd_tx_can_flags |= MSG_FLAG_REMOTE_FRAME;</div><div class='add'>+	}</div><div class='add'>+	return cmd;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_leaf_wait_cmd(const struct kvaser_usb *dev, u8 id,</div><div class='add'>+				    struct kvaser_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_cmd *tmp;</div><div class='add'>+	void *buf;</div><div class='add'>+	int actual_len;</div><div class='add'>+	int err;</div><div class='add'>+	int pos;</div><div class='add'>+	unsigned long to = jiffies + msecs_to_jiffies(KVASER_USB_TIMEOUT);</div><div class='add'>+</div><div class='add'>+	buf = kzalloc(KVASER_USB_RX_BUFFER_SIZE, GFP_KERNEL);</div><div class='add'>+	if (!buf)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		err = kvaser_usb_recv_cmd(dev, buf, KVASER_USB_RX_BUFFER_SIZE,</div><div class='add'>+					  &amp;actual_len);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			goto end;</div><div class='add'>+</div><div class='add'>+		pos = 0;</div><div class='add'>+		while (pos &lt;= actual_len - CMD_HEADER_LEN) {</div><div class='add'>+			tmp = buf + pos;</div><div class='add'>+</div><div class='add'>+			/* Handle commands crossing the USB endpoint max packet</div><div class='add'>+			 * size boundary. Check kvaser_usb_read_bulk_callback()</div><div class='add'>+			 * for further details.</div><div class='add'>+			 */</div><div class='add'>+			if (tmp-&gt;len == 0) {</div><div class='add'>+				pos = round_up(pos + 1,</div><div class='add'>+					       le16_to_cpu</div><div class='add'>+						(dev-&gt;bulk_in-&gt;wMaxPacketSize));</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (pos + tmp-&gt;len &gt; actual_len) {</div><div class='add'>+				dev_err_ratelimited(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+						    "Format error\n");</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (tmp-&gt;id == id) {</div><div class='add'>+				memcpy(cmd, tmp, tmp-&gt;len);</div><div class='add'>+				goto end;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			pos += tmp-&gt;len;</div><div class='add'>+		}</div><div class='add'>+	} while (time_before(jiffies, to));</div><div class='add'>+</div><div class='add'>+	err = -EINVAL;</div><div class='add'>+</div><div class='add'>+end:</div><div class='add'>+	kfree(buf);</div><div class='add'>+</div><div class='add'>+	if (err == 0)</div><div class='add'>+		err = kvaser_usb_leaf_verify_size(dev, cmd);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_leaf_send_simple_cmd(const struct kvaser_usb *dev,</div><div class='add'>+					   u8 cmd_id, int channel)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_cmd *cmd;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	cmd = kmalloc(sizeof(*cmd), GFP_KERNEL);</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;id = cmd_id;</div><div class='add'>+	cmd-&gt;len = CMD_HEADER_LEN + sizeof(struct kvaser_cmd_simple);</div><div class='add'>+	cmd-&gt;u.simple.channel = channel;</div><div class='add'>+	cmd-&gt;u.simple.tid = 0xff;</div><div class='add'>+</div><div class='add'>+	rc = kvaser_usb_send_cmd(dev, cmd, cmd-&gt;len);</div><div class='add'>+</div><div class='add'>+	kfree(cmd);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_leaf_get_software_info_leaf(struct kvaser_usb *dev,</div><div class='add'>+						   const struct leaf_cmd_softinfo *softinfo)</div><div class='add'>+{</div><div class='add'>+	u32 fw_version;</div><div class='add'>+	u32 sw_options = le32_to_cpu(softinfo-&gt;sw_options);</div><div class='add'>+</div><div class='add'>+	fw_version = le32_to_cpu(softinfo-&gt;fw_version);</div><div class='add'>+	dev-&gt;fw_version.major = FIELD_GET(KVASER_USB_SW_VERSION_MAJOR_MASK, fw_version);</div><div class='add'>+	dev-&gt;fw_version.minor = FIELD_GET(KVASER_USB_SW_VERSION_MINOR_MASK, fw_version);</div><div class='add'>+	dev-&gt;fw_version.build = FIELD_GET(KVASER_USB_SW_VERSION_BUILD_MASK, fw_version);</div><div class='add'>+	dev-&gt;max_tx_urbs = le16_to_cpu(softinfo-&gt;max_outstanding_tx);</div><div class='add'>+</div><div class='add'>+	if (sw_options &amp; KVASER_USB_LEAF_SWOPTION_EXT_CAP)</div><div class='add'>+		dev-&gt;card_data.capabilities |= KVASER_USB_CAP_EXT_CAP;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;driver_info-&gt;quirks &amp; KVASER_USB_QUIRK_IGNORE_CLK_FREQ) {</div><div class='add'>+		/* Firmware expects bittiming parameters calculated for 16MHz</div><div class='add'>+		 * clock, regardless of the actual clock</div><div class='add'>+		 * Though, the reported freq is used for timestamps</div><div class='add'>+		 */</div><div class='add'>+		switch (sw_options &amp; KVASER_USB_LEAF_SWOPTION_FREQ_MASK) {</div><div class='add'>+		case KVASER_USB_LEAF_SWOPTION_FREQ_16_MHZ_CLK:</div><div class='add'>+			dev-&gt;cfg = &amp;kvaser_usb_leaf_m32c_dev_cfg_16mhz;</div><div class='add'>+			break;</div><div class='add'>+		case KVASER_USB_LEAF_SWOPTION_FREQ_24_MHZ_CLK:</div><div class='add'>+			dev-&gt;cfg = &amp;kvaser_usb_leaf_m32c_dev_cfg_24mhz;</div><div class='add'>+			break;</div><div class='add'>+		case KVASER_USB_LEAF_SWOPTION_FREQ_32_MHZ_CLK:</div><div class='add'>+			dev-&gt;cfg = &amp;kvaser_usb_leaf_m32c_dev_cfg_32mhz;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		switch (sw_options &amp; KVASER_USB_LEAF_SWOPTION_FREQ_MASK) {</div><div class='add'>+		case KVASER_USB_LEAF_SWOPTION_FREQ_16_MHZ_CLK:</div><div class='add'>+			dev-&gt;cfg = &amp;kvaser_usb_leaf_imx_dev_cfg_16mhz;</div><div class='add'>+			break;</div><div class='add'>+		case KVASER_USB_LEAF_SWOPTION_FREQ_24_MHZ_CLK:</div><div class='add'>+			dev-&gt;cfg = &amp;kvaser_usb_leaf_imx_dev_cfg_24mhz;</div><div class='add'>+			break;</div><div class='add'>+		case KVASER_USB_LEAF_SWOPTION_FREQ_32_MHZ_CLK:</div><div class='add'>+			dev-&gt;cfg = &amp;kvaser_usb_leaf_imx_dev_cfg_32mhz;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_leaf_get_software_info_inner(struct kvaser_usb *dev)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_cmd cmd;</div><div class='add'>+	int err;</div><div class='add'>+	u32 fw_version;</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_leaf_send_simple_cmd(dev, CMD_GET_SOFTWARE_INFO, 0);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_leaf_wait_cmd(dev, CMD_GET_SOFTWARE_INFO_REPLY, &amp;cmd);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	switch (dev-&gt;driver_info-&gt;family) {</div><div class='add'>+	case KVASER_LEAF:</div><div class='add'>+		kvaser_usb_leaf_get_software_info_leaf(dev, &amp;cmd.u.leaf.softinfo);</div><div class='add'>+		break;</div><div class='add'>+	case KVASER_USBCAN:</div><div class='add'>+		fw_version = le32_to_cpu(cmd.u.usbcan.softinfo.fw_version);</div><div class='add'>+		dev-&gt;fw_version.major = FIELD_GET(KVASER_USB_SW_VERSION_MAJOR_MASK,</div><div class='add'>+						  fw_version);</div><div class='add'>+		dev-&gt;fw_version.minor = FIELD_GET(KVASER_USB_SW_VERSION_MINOR_MASK,</div><div class='add'>+						  fw_version);</div><div class='add'>+		dev-&gt;fw_version.build = FIELD_GET(KVASER_USB_SW_VERSION_BUILD_MASK,</div><div class='add'>+						  fw_version);</div><div class='add'>+		dev-&gt;max_tx_urbs =</div><div class='add'>+			le16_to_cpu(cmd.u.usbcan.softinfo.max_outstanding_tx);</div><div class='add'>+		dev-&gt;cfg = &amp;kvaser_usb_leaf_usbcan_dev_cfg;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_leaf_get_software_info(struct kvaser_usb *dev)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	int retry = 3;</div><div class='add'>+</div><div class='add'>+	/* On some x86 laptops, plugging a Kvaser device again after</div><div class='add'>+	 * an unplug makes the firmware always ignore the very first</div><div class='add'>+	 * command. For such a case, provide some room for retries</div><div class='add'>+	 * instead of completely exiting the driver.</div><div class='add'>+	 */</div><div class='add'>+	do {</div><div class='add'>+		err = kvaser_usb_leaf_get_software_info_inner(dev);</div><div class='add'>+	} while (--retry &amp;&amp; err == -ETIMEDOUT);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_leaf_get_card_info(struct kvaser_usb *dev)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_cmd cmd;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_leaf_send_simple_cmd(dev, CMD_GET_CARD_INFO, 0);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_leaf_wait_cmd(dev, CMD_GET_CARD_INFO_REPLY, &amp;cmd);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	dev-&gt;nchannels = cmd.u.cardinfo.nchannels;</div><div class='add'>+	if (dev-&gt;nchannels &gt; KVASER_USB_MAX_NET_DEVICES ||</div><div class='add'>+	    (dev-&gt;driver_info-&gt;family == KVASER_USBCAN &amp;&amp;</div><div class='add'>+	     dev-&gt;nchannels &gt; MAX_USBCAN_NET_DEVICES))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	dev-&gt;ean[1] = le32_to_cpu(cmd.u.cardinfo.ean[1]);</div><div class='add'>+	dev-&gt;ean[0] = le32_to_cpu(cmd.u.cardinfo.ean[0]);</div><div class='add'>+	dev-&gt;serial_number = le32_to_cpu(cmd.u.cardinfo.serial_number);</div><div class='add'>+	dev-&gt;hw_revision = cmd.u.cardinfo.hw_revision;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_leaf_get_single_capability(struct kvaser_usb *dev,</div><div class='add'>+						 u16 cap_cmd_req, u16 *status)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb_dev_card_data *card_data = &amp;dev-&gt;card_data;</div><div class='add'>+	struct kvaser_cmd *cmd;</div><div class='add'>+	u32 value = 0;</div><div class='add'>+	u32 mask = 0;</div><div class='add'>+	u16 cap_cmd_res;</div><div class='add'>+	int err;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;id = CMD_GET_CAPABILITIES_REQ;</div><div class='add'>+	cmd-&gt;u.leaf.cap_req.cap_cmd = cpu_to_le16(cap_cmd_req);</div><div class='add'>+	cmd-&gt;len = CMD_HEADER_LEN + sizeof(struct kvaser_cmd_cap_req);</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_send_cmd(dev, cmd, cmd-&gt;len);</div><div class='add'>+	if (err)</div><div class='add'>+		goto end;</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_leaf_wait_cmd(dev, CMD_GET_CAPABILITIES_RESP, cmd);</div><div class='add'>+	if (err)</div><div class='add'>+		goto end;</div><div class='add'>+</div><div class='add'>+	*status = le16_to_cpu(cmd-&gt;u.leaf.cap_res.status);</div><div class='add'>+</div><div class='add'>+	if (*status != KVASER_USB_LEAF_CAP_STAT_OK)</div><div class='add'>+		goto end;</div><div class='add'>+</div><div class='add'>+	cap_cmd_res = le16_to_cpu(cmd-&gt;u.leaf.cap_res.cap_cmd);</div><div class='add'>+	switch (cap_cmd_res) {</div><div class='add'>+	case KVASER_USB_LEAF_CAP_CMD_LISTEN_MODE:</div><div class='add'>+	case KVASER_USB_LEAF_CAP_CMD_ERR_REPORT:</div><div class='add'>+		value = le32_to_cpu(cmd-&gt;u.leaf.cap_res.value);</div><div class='add'>+		mask = le32_to_cpu(cmd-&gt;u.leaf.cap_res.mask);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_warn(&amp;dev-&gt;intf-&gt;dev, "Unknown capability command %u\n",</div><div class='add'>+			 cap_cmd_res);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; dev-&gt;nchannels; i++) {</div><div class='add'>+		if (BIT(i) &amp; (value &amp; mask)) {</div><div class='add'>+			switch (cap_cmd_res) {</div><div class='add'>+			case KVASER_USB_LEAF_CAP_CMD_LISTEN_MODE:</div><div class='add'>+				card_data-&gt;ctrlmode_supported |=</div><div class='add'>+						CAN_CTRLMODE_LISTENONLY;</div><div class='add'>+				break;</div><div class='add'>+			case KVASER_USB_LEAF_CAP_CMD_ERR_REPORT:</div><div class='add'>+				card_data-&gt;capabilities |=</div><div class='add'>+						KVASER_USB_CAP_BERR_CAP;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+end:</div><div class='add'>+	kfree(cmd);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_leaf_get_capabilities_leaf(struct kvaser_usb *dev)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	u16 status;</div><div class='add'>+</div><div class='add'>+	if (!(dev-&gt;card_data.capabilities &amp; KVASER_USB_CAP_EXT_CAP)) {</div><div class='add'>+		dev_info(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			 "No extended capability support. Upgrade device firmware.\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_leaf_get_single_capability(dev,</div><div class='add'>+						    KVASER_USB_LEAF_CAP_CMD_LISTEN_MODE,</div><div class='add'>+						    &amp;status);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+	if (status)</div><div class='add'>+		dev_info(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			 "KVASER_USB_LEAF_CAP_CMD_LISTEN_MODE failed %u\n",</div><div class='add'>+			 status);</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_leaf_get_single_capability(dev,</div><div class='add'>+						    KVASER_USB_LEAF_CAP_CMD_ERR_REPORT,</div><div class='add'>+						    &amp;status);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+	if (status)</div><div class='add'>+		dev_info(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			 "KVASER_USB_LEAF_CAP_CMD_ERR_REPORT failed %u\n",</div><div class='add'>+			 status);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_leaf_set_led(struct kvaser_usb_net_priv *priv,</div><div class='add'>+				   enum kvaser_usb_led_state state,</div><div class='add'>+				   u16 duration_ms)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb *dev = priv-&gt;dev;</div><div class='add'>+	struct kvaser_cmd *cmd;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;id = CMD_LED_ACTION_REQ;</div><div class='add'>+	cmd-&gt;len = CMD_HEADER_LEN + sizeof(struct kvaser_cmd_led_action_req);</div><div class='add'>+	cmd-&gt;u.led_action_req.tid = 0xff;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;u.led_action_req.duration_ms = cpu_to_le16(duration_ms);</div><div class='add'>+	cmd-&gt;u.led_action_req.action = state |</div><div class='add'>+				       FIELD_PREP(KVASER_USB_LEAF_LED_IDX_MASK,</div><div class='add'>+						  KVASER_USB_LEAF_LED_YELLOW_CH0_IDX +</div><div class='add'>+						  priv-&gt;channel);</div><div class='add'>+</div><div class='add'>+	ret = kvaser_usb_send_cmd(dev, cmd, cmd-&gt;len);</div><div class='add'>+	kfree(cmd);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_leaf_get_capabilities(struct kvaser_usb *dev)</div><div class='add'>+{</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;driver_info-&gt;family == KVASER_LEAF)</div><div class='add'>+		err = kvaser_usb_leaf_get_capabilities_leaf(dev);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_leaf_tx_acknowledge(const struct kvaser_usb *dev,</div><div class='add'>+					   const struct kvaser_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	struct net_device_stats *stats;</div><div class='add'>+	struct kvaser_usb_tx_urb_context *context;</div><div class='add'>+	struct kvaser_usb_net_priv *priv;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u8 channel, tid;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	ktime_t hwtstamp = 0;</div><div class='add'>+</div><div class='add'>+	channel = cmd-&gt;u.tx_acknowledge_header.channel;</div><div class='add'>+	tid = cmd-&gt;u.tx_acknowledge_header.tid;</div><div class='add'>+</div><div class='add'>+	if (channel &gt;= dev-&gt;nchannels) {</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			"Invalid channel number (%d)\n", channel);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv = dev-&gt;nets[channel];</div><div class='add'>+</div><div class='add'>+	if (!netif_device_present(priv-&gt;netdev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	stats = &amp;priv-&gt;netdev-&gt;stats;</div><div class='add'>+</div><div class='add'>+	context = &amp;priv-&gt;tx_contexts[tid % dev-&gt;max_tx_urbs];</div><div class='add'>+</div><div class='add'>+	/* Sometimes the state change doesn't come after a bus-off event */</div><div class='add'>+	if (priv-&gt;can.restart_ms &amp;&amp; priv-&gt;can.state == CAN_STATE_BUS_OFF) {</div><div class='add'>+		struct sk_buff *err_skb;</div><div class='add'>+		struct can_frame *cf;</div><div class='add'>+</div><div class='add'>+		err_skb = alloc_can_err_skb(priv-&gt;netdev, &amp;cf);</div><div class='add'>+		if (err_skb) {</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_RESTARTED;</div><div class='add'>+</div><div class='add'>+			netif_rx(err_skb);</div><div class='add'>+		} else {</div><div class='add'>+			netdev_err(priv-&gt;netdev,</div><div class='add'>+				   "No memory left for err_skb\n");</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		priv-&gt;can.can_stats.restarts++;</div><div class='add'>+		netif_carrier_on(priv-&gt;netdev);</div><div class='add'>+</div><div class='add'>+		priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+	}</div><div class='add'>+	switch (dev-&gt;driver_info-&gt;family) {</div><div class='add'>+	case KVASER_LEAF:</div><div class='add'>+		hwtstamp = kvaser_usb_timestamp48_to_ktime(dev-&gt;cfg, cmd-&gt;u.leaf.tx_ack.time);</div><div class='add'>+		break;</div><div class='add'>+	case KVASER_USBCAN:</div><div class='add'>+		hwtstamp = kvaser_usb_usbcan_timestamp_to_ktime(dev, cmd-&gt;u.usbcan.tx_ack.time);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;tx_contexts_lock, flags);</div><div class='add'>+</div><div class='add'>+	skb = priv-&gt;can.echo_skb[context-&gt;echo_index];</div><div class='add'>+	if (skb)</div><div class='add'>+		skb_hwtstamps(skb)-&gt;hwtstamp = hwtstamp;</div><div class='add'>+	stats-&gt;tx_packets++;</div><div class='add'>+	stats-&gt;tx_bytes += can_get_echo_skb(priv-&gt;netdev,</div><div class='add'>+					    context-&gt;echo_index, NULL);</div><div class='add'>+	context-&gt;echo_index = dev-&gt;max_tx_urbs;</div><div class='add'>+	--priv-&gt;active_tx_contexts;</div><div class='add'>+	netif_wake_queue(priv-&gt;netdev);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;tx_contexts_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_leaf_simple_cmd_async(struct kvaser_usb_net_priv *priv,</div><div class='add'>+					    u8 cmd_id)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_cmd *cmd;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	cmd = kzalloc(sizeof(*cmd), GFP_ATOMIC);</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;len = CMD_HEADER_LEN + sizeof(struct kvaser_cmd_simple);</div><div class='add'>+	cmd-&gt;id = cmd_id;</div><div class='add'>+	cmd-&gt;u.simple.channel = priv-&gt;channel;</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_send_cmd_async(priv, cmd, cmd-&gt;len);</div><div class='add'>+	if (err)</div><div class='add'>+		kfree(cmd);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_leaf_chip_state_req_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb_net_leaf_priv *leaf =</div><div class='add'>+		container_of(work, struct kvaser_usb_net_leaf_priv,</div><div class='add'>+			     chip_state_req_work.work);</div><div class='add'>+	struct kvaser_usb_net_priv *priv = leaf-&gt;net;</div><div class='add'>+</div><div class='add'>+	kvaser_usb_leaf_simple_cmd_async(priv, CMD_GET_CHIP_STATE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+kvaser_usb_leaf_rx_error_update_can_state(struct kvaser_usb_net_priv *priv,</div><div class='add'>+					const struct kvaser_usb_err_summary *es,</div><div class='add'>+					struct can_frame *cf)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb_net_leaf_priv *leaf = priv-&gt;sub_priv;</div><div class='add'>+	struct kvaser_usb *dev = priv-&gt;dev;</div><div class='add'>+	struct net_device_stats *stats = &amp;priv-&gt;netdev-&gt;stats;</div><div class='add'>+	enum can_state cur_state, new_state, tx_state, rx_state;</div><div class='add'>+</div><div class='add'>+	netdev_dbg(priv-&gt;netdev, "Error status: 0x%02x\n", es-&gt;status);</div><div class='add'>+</div><div class='add'>+	new_state = priv-&gt;can.state;</div><div class='add'>+	cur_state = priv-&gt;can.state;</div><div class='add'>+</div><div class='add'>+	if (es-&gt;status &amp; (M16C_STATE_BUS_OFF | M16C_STATE_BUS_RESET)) {</div><div class='add'>+		new_state = CAN_STATE_BUS_OFF;</div><div class='add'>+	} else if (es-&gt;status &amp; M16C_STATE_BUS_PASSIVE) {</div><div class='add'>+		new_state = CAN_STATE_ERROR_PASSIVE;</div><div class='add'>+	} else if ((es-&gt;status &amp; M16C_STATE_BUS_ERROR) &amp;&amp;</div><div class='add'>+		   cur_state &gt;= CAN_STATE_BUS_OFF) {</div><div class='add'>+		/* Guard against spurious error events after a busoff */</div><div class='add'>+	} else if (es-&gt;txerr &gt;= 128 || es-&gt;rxerr &gt;= 128) {</div><div class='add'>+		new_state = CAN_STATE_ERROR_PASSIVE;</div><div class='add'>+	} else if (es-&gt;txerr &gt;= 96 || es-&gt;rxerr &gt;= 96) {</div><div class='add'>+		new_state = CAN_STATE_ERROR_WARNING;</div><div class='add'>+	} else {</div><div class='add'>+		new_state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* 0bfd:0124 FW 4.18.778 was observed to send the initial</div><div class='add'>+	 * CMD_CHIP_STATE_EVENT after CMD_START_CHIP with M16C_STATE_BUS_OFF</div><div class='add'>+	 * bit set if the channel was bus-off when it was last stopped (even</div><div class='add'>+	 * across chip resets). This bit will clear shortly afterwards, without</div><div class='add'>+	 * triggering a second unsolicited chip state event.</div><div class='add'>+	 * Ignore this initial bus-off.</div><div class='add'>+	 */</div><div class='add'>+	if (leaf-&gt;joining_bus) {</div><div class='add'>+		if (new_state == CAN_STATE_BUS_OFF) {</div><div class='add'>+			netdev_dbg(priv-&gt;netdev, "ignoring bus-off during startup");</div><div class='add'>+			new_state = cur_state;</div><div class='add'>+		} else {</div><div class='add'>+			leaf-&gt;joining_bus = false;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (new_state != cur_state) {</div><div class='add'>+		tx_state = (es-&gt;txerr &gt;= es-&gt;rxerr) ? new_state : 0;</div><div class='add'>+		rx_state = (es-&gt;txerr &lt;= es-&gt;rxerr) ? new_state : 0;</div><div class='add'>+</div><div class='add'>+		can_change_state(priv-&gt;netdev, cf, tx_state, rx_state);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.restart_ms &amp;&amp;</div><div class='add'>+	    cur_state == CAN_STATE_BUS_OFF &amp;&amp;</div><div class='add'>+	    new_state &lt; CAN_STATE_BUS_OFF)</div><div class='add'>+		priv-&gt;can.can_stats.restarts++;</div><div class='add'>+</div><div class='add'>+	switch (dev-&gt;driver_info-&gt;family) {</div><div class='add'>+	case KVASER_LEAF:</div><div class='add'>+		if (es-&gt;leaf.error_factor) {</div><div class='add'>+			priv-&gt;can.can_stats.bus_error++;</div><div class='add'>+			stats-&gt;rx_errors++;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case KVASER_USBCAN:</div><div class='add'>+		if (es-&gt;usbcan.error_state &amp; USBCAN_ERROR_STATE_TX_ERROR)</div><div class='add'>+			stats-&gt;tx_errors++;</div><div class='add'>+		if (es-&gt;usbcan.error_state &amp; USBCAN_ERROR_STATE_RX_ERROR)</div><div class='add'>+			stats-&gt;rx_errors++;</div><div class='add'>+		if (es-&gt;usbcan.error_state &amp; USBCAN_ERROR_STATE_BUSERROR)</div><div class='add'>+			priv-&gt;can.can_stats.bus_error++;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;bec.txerr = es-&gt;txerr;</div><div class='add'>+	priv-&gt;bec.rxerr = es-&gt;rxerr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_leaf_rx_error(const struct kvaser_usb *dev,</div><div class='add'>+				     const struct kvaser_usb_err_summary *es)</div><div class='add'>+{</div><div class='add'>+	struct can_frame *cf = NULL;</div><div class='add'>+	struct sk_buff *skb = NULL;</div><div class='add'>+	struct net_device_stats *stats;</div><div class='add'>+	struct kvaser_usb_net_priv *priv;</div><div class='add'>+	struct kvaser_usb_net_leaf_priv *leaf;</div><div class='add'>+	enum can_state old_state, new_state;</div><div class='add'>+</div><div class='add'>+	if (es-&gt;channel &gt;= dev-&gt;nchannels) {</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			"Invalid channel number (%d)\n", es-&gt;channel);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv = dev-&gt;nets[es-&gt;channel];</div><div class='add'>+	leaf = priv-&gt;sub_priv;</div><div class='add'>+	stats = &amp;priv-&gt;netdev-&gt;stats;</div><div class='add'>+</div><div class='add'>+	/* Ignore e.g. state change to bus-off reported just after stopping */</div><div class='add'>+	if (!netif_running(priv-&gt;netdev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	old_state = priv-&gt;can.state;</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING)</div><div class='add'>+		skb = alloc_can_err_skb(priv-&gt;netdev, &amp;cf);</div><div class='add'>+	kvaser_usb_leaf_rx_error_update_can_state(priv, es, cf);</div><div class='add'>+	new_state = priv-&gt;can.state;</div><div class='add'>+</div><div class='add'>+	/* If there are errors, request status updates periodically as we do</div><div class='add'>+	 * not get automatic notifications of improved state.</div><div class='add'>+	 * Also request updates if we saw a stale BUS_OFF during startup</div><div class='add'>+	 * (joining_bus).</div><div class='add'>+	 */</div><div class='add'>+	if (new_state &lt; CAN_STATE_BUS_OFF &amp;&amp;</div><div class='add'>+	    (es-&gt;rxerr || es-&gt;txerr || new_state == CAN_STATE_ERROR_PASSIVE ||</div><div class='add'>+	     leaf-&gt;joining_bus))</div><div class='add'>+		schedule_delayed_work(&amp;leaf-&gt;chip_state_req_work,</div><div class='add'>+				      msecs_to_jiffies(500));</div><div class='add'>+</div><div class='add'>+	if (new_state != old_state) {</div><div class='add'>+		if (es-&gt;status &amp;</div><div class='add'>+		    (M16C_STATE_BUS_OFF | M16C_STATE_BUS_RESET)) {</div><div class='add'>+			if (!priv-&gt;can.restart_ms)</div><div class='add'>+				kvaser_usb_leaf_simple_cmd_async(priv,</div><div class='add'>+								 CMD_STOP_CHIP);</div><div class='add'>+			netif_carrier_off(priv-&gt;netdev);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (priv-&gt;can.restart_ms &amp;&amp;</div><div class='add'>+		    old_state == CAN_STATE_BUS_OFF &amp;&amp;</div><div class='add'>+		    new_state &lt; CAN_STATE_BUS_OFF) {</div><div class='add'>+			if (cf)</div><div class='add'>+				cf-&gt;can_id |= CAN_ERR_RESTARTED;</div><div class='add'>+			netif_carrier_on(priv-&gt;netdev);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!skb) {</div><div class='add'>+		if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING) {</div><div class='add'>+			stats-&gt;rx_dropped++;</div><div class='add'>+			netdev_warn(priv-&gt;netdev, "No memory left for err_skb\n");</div><div class='add'>+		}</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (dev-&gt;driver_info-&gt;family) {</div><div class='add'>+	case KVASER_LEAF:</div><div class='add'>+		if (es-&gt;leaf.error_factor) {</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_BUSERROR | CAN_ERR_PROT;</div><div class='add'>+</div><div class='add'>+			if (es-&gt;leaf.error_factor &amp; M16C_EF_ACKE)</div><div class='add'>+				cf-&gt;data[3] = CAN_ERR_PROT_LOC_ACK;</div><div class='add'>+			if (es-&gt;leaf.error_factor &amp; M16C_EF_CRCE)</div><div class='add'>+				cf-&gt;data[3] = CAN_ERR_PROT_LOC_CRC_SEQ;</div><div class='add'>+			if (es-&gt;leaf.error_factor &amp; M16C_EF_FORME)</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='add'>+			if (es-&gt;leaf.error_factor &amp; M16C_EF_STFE)</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='add'>+			if (es-&gt;leaf.error_factor &amp; M16C_EF_BITE0)</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_BIT0;</div><div class='add'>+			if (es-&gt;leaf.error_factor &amp; M16C_EF_BITE1)</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_BIT1;</div><div class='add'>+			if (es-&gt;leaf.error_factor &amp; M16C_EF_TRE)</div><div class='add'>+				cf-&gt;data[2] |= CAN_ERR_PROT_TX;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case KVASER_USBCAN:</div><div class='add'>+		if (es-&gt;usbcan.error_state &amp; USBCAN_ERROR_STATE_BUSERROR)</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_BUSERROR;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (new_state != CAN_STATE_BUS_OFF) {</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_CNT;</div><div class='add'>+		cf-&gt;data[6] = es-&gt;txerr;</div><div class='add'>+		cf-&gt;data[7] = es-&gt;rxerr;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netif_rx(skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* For USBCAN, report error to userspace if the channels's errors counter</div><div class='add'>+ * has changed, or we're the only channel seeing a bus error state.</div><div class='add'>+ */</div><div class='add'>+static void</div><div class='add'>+kvaser_usb_leaf_usbcan_conditionally_rx_error(const struct kvaser_usb *dev,</div><div class='add'>+					      struct kvaser_usb_err_summary *es)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb_net_priv *priv;</div><div class='add'>+	unsigned int channel;</div><div class='add'>+	bool report_error;</div><div class='add'>+</div><div class='add'>+	channel = es-&gt;channel;</div><div class='add'>+	if (channel &gt;= dev-&gt;nchannels) {</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			"Invalid channel number (%d)\n", channel);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv = dev-&gt;nets[channel];</div><div class='add'>+	report_error = false;</div><div class='add'>+</div><div class='add'>+	if (es-&gt;txerr != priv-&gt;bec.txerr) {</div><div class='add'>+		es-&gt;usbcan.error_state |= USBCAN_ERROR_STATE_TX_ERROR;</div><div class='add'>+		report_error = true;</div><div class='add'>+	}</div><div class='add'>+	if (es-&gt;rxerr != priv-&gt;bec.rxerr) {</div><div class='add'>+		es-&gt;usbcan.error_state |= USBCAN_ERROR_STATE_RX_ERROR;</div><div class='add'>+		report_error = true;</div><div class='add'>+	}</div><div class='add'>+	if ((es-&gt;status &amp; M16C_STATE_BUS_ERROR) &amp;&amp;</div><div class='add'>+	    !(es-&gt;usbcan.other_ch_status &amp; M16C_STATE_BUS_ERROR)) {</div><div class='add'>+		es-&gt;usbcan.error_state |= USBCAN_ERROR_STATE_BUSERROR;</div><div class='add'>+		report_error = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (report_error)</div><div class='add'>+		kvaser_usb_leaf_rx_error(dev, es);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_leaf_usbcan_rx_error(const struct kvaser_usb *dev,</div><div class='add'>+					    const struct kvaser_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb_err_summary es = { };</div><div class='add'>+</div><div class='add'>+	switch (cmd-&gt;id) {</div><div class='add'>+	/* Sometimes errors are sent as unsolicited chip state events */</div><div class='add'>+	case CMD_CHIP_STATE_EVENT:</div><div class='add'>+		es.channel = cmd-&gt;u.usbcan.chip_state_event.channel;</div><div class='add'>+		es.status = cmd-&gt;u.usbcan.chip_state_event.status;</div><div class='add'>+		es.txerr = cmd-&gt;u.usbcan.chip_state_event.tx_errors_count;</div><div class='add'>+		es.rxerr = cmd-&gt;u.usbcan.chip_state_event.rx_errors_count;</div><div class='add'>+		kvaser_usb_leaf_usbcan_conditionally_rx_error(dev, &amp;es);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case CMD_CAN_ERROR_EVENT:</div><div class='add'>+		es.channel = 0;</div><div class='add'>+		es.status = cmd-&gt;u.usbcan.can_error_event.status_ch0;</div><div class='add'>+		es.txerr = cmd-&gt;u.usbcan.can_error_event.tx_errors_count_ch0;</div><div class='add'>+		es.rxerr = cmd-&gt;u.usbcan.can_error_event.rx_errors_count_ch0;</div><div class='add'>+		es.usbcan.other_ch_status =</div><div class='add'>+			cmd-&gt;u.usbcan.can_error_event.status_ch1;</div><div class='add'>+		kvaser_usb_leaf_usbcan_conditionally_rx_error(dev, &amp;es);</div><div class='add'>+</div><div class='add'>+		/* The USBCAN firmware supports up to 2 channels.</div><div class='add'>+		 * Now that ch0 was checked, check if ch1 has any errors.</div><div class='add'>+		 */</div><div class='add'>+		if (dev-&gt;nchannels == MAX_USBCAN_NET_DEVICES) {</div><div class='add'>+			es.channel = 1;</div><div class='add'>+			es.status = cmd-&gt;u.usbcan.can_error_event.status_ch1;</div><div class='add'>+			es.txerr =</div><div class='add'>+				cmd-&gt;u.usbcan.can_error_event.tx_errors_count_ch1;</div><div class='add'>+			es.rxerr =</div><div class='add'>+				cmd-&gt;u.usbcan.can_error_event.rx_errors_count_ch1;</div><div class='add'>+			es.usbcan.other_ch_status =</div><div class='add'>+				cmd-&gt;u.usbcan.can_error_event.status_ch0;</div><div class='add'>+			kvaser_usb_leaf_usbcan_conditionally_rx_error(dev, &amp;es);</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev, "Invalid cmd id (%d)\n", cmd-&gt;id);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_leaf_leaf_rx_error(const struct kvaser_usb *dev,</div><div class='add'>+					  const struct kvaser_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb_err_summary es = { };</div><div class='add'>+</div><div class='add'>+	switch (cmd-&gt;id) {</div><div class='add'>+	case CMD_CAN_ERROR_EVENT:</div><div class='add'>+		es.channel = cmd-&gt;u.leaf.can_error_event.channel;</div><div class='add'>+		es.status = cmd-&gt;u.leaf.can_error_event.status;</div><div class='add'>+		es.txerr = cmd-&gt;u.leaf.can_error_event.tx_errors_count;</div><div class='add'>+		es.rxerr = cmd-&gt;u.leaf.can_error_event.rx_errors_count;</div><div class='add'>+		es.leaf.error_factor = cmd-&gt;u.leaf.can_error_event.error_factor;</div><div class='add'>+		break;</div><div class='add'>+	case CMD_LEAF_LOG_MESSAGE:</div><div class='add'>+		es.channel = cmd-&gt;u.leaf.log_message.channel;</div><div class='add'>+		es.status = cmd-&gt;u.leaf.log_message.data[0];</div><div class='add'>+		es.txerr = cmd-&gt;u.leaf.log_message.data[2];</div><div class='add'>+		es.rxerr = cmd-&gt;u.leaf.log_message.data[3];</div><div class='add'>+		es.leaf.error_factor = cmd-&gt;u.leaf.log_message.data[1];</div><div class='add'>+		break;</div><div class='add'>+	case CMD_CHIP_STATE_EVENT:</div><div class='add'>+		es.channel = cmd-&gt;u.leaf.chip_state_event.channel;</div><div class='add'>+		es.status = cmd-&gt;u.leaf.chip_state_event.status;</div><div class='add'>+		es.txerr = cmd-&gt;u.leaf.chip_state_event.tx_errors_count;</div><div class='add'>+		es.rxerr = cmd-&gt;u.leaf.chip_state_event.rx_errors_count;</div><div class='add'>+		es.leaf.error_factor = 0;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev, "Invalid cmd id (%d)\n", cmd-&gt;id);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kvaser_usb_leaf_rx_error(dev, &amp;es);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_leaf_rx_can_err(const struct kvaser_usb_net_priv *priv,</div><div class='add'>+				       const struct kvaser_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	if (cmd-&gt;u.rx_can_header.flag &amp; (MSG_FLAG_ERROR_FRAME |</div><div class='add'>+					 MSG_FLAG_NERR)) {</div><div class='add'>+		struct net_device_stats *stats = &amp;priv-&gt;netdev-&gt;stats;</div><div class='add'>+</div><div class='add'>+		netdev_err(priv-&gt;netdev, "Unknown error (flags: 0x%02x)\n",</div><div class='add'>+			   cmd-&gt;u.rx_can_header.flag);</div><div class='add'>+</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cmd-&gt;u.rx_can_header.flag &amp; MSG_FLAG_OVERRUN)</div><div class='add'>+		kvaser_usb_can_rx_over_error(priv-&gt;netdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_leaf_rx_can_msg(const struct kvaser_usb *dev,</div><div class='add'>+				       const struct kvaser_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb_net_priv *priv;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct net_device_stats *stats;</div><div class='add'>+	u8 channel = cmd-&gt;u.rx_can_header.channel;</div><div class='add'>+	const u8 *rx_data = NULL;	/* GCC */</div><div class='add'>+	ktime_t hwtstamp = 0;</div><div class='add'>+</div><div class='add'>+	if (channel &gt;= dev-&gt;nchannels) {</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			"Invalid channel number (%d)\n", channel);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv = dev-&gt;nets[channel];</div><div class='add'>+	stats = &amp;priv-&gt;netdev-&gt;stats;</div><div class='add'>+</div><div class='add'>+	if ((cmd-&gt;u.rx_can_header.flag &amp; MSG_FLAG_ERROR_FRAME) &amp;&amp;</div><div class='add'>+	    (dev-&gt;driver_info-&gt;family == KVASER_LEAF &amp;&amp;</div><div class='add'>+	     cmd-&gt;id == CMD_LEAF_LOG_MESSAGE)) {</div><div class='add'>+		kvaser_usb_leaf_leaf_rx_error(dev, cmd);</div><div class='add'>+		return;</div><div class='add'>+	} else if (cmd-&gt;u.rx_can_header.flag &amp; (MSG_FLAG_ERROR_FRAME |</div><div class='add'>+						MSG_FLAG_NERR |</div><div class='add'>+						MSG_FLAG_OVERRUN)) {</div><div class='add'>+		kvaser_usb_leaf_rx_can_err(priv, cmd);</div><div class='add'>+		return;</div><div class='add'>+	} else if (cmd-&gt;u.rx_can_header.flag &amp; ~MSG_FLAG_REMOTE_FRAME) {</div><div class='add'>+		netdev_warn(priv-&gt;netdev,</div><div class='add'>+			    "Unhandled frame (flags: 0x%02x)\n",</div><div class='add'>+			    cmd-&gt;u.rx_can_header.flag);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (dev-&gt;driver_info-&gt;family) {</div><div class='add'>+	case KVASER_LEAF:</div><div class='add'>+		rx_data = cmd-&gt;u.leaf.rx_can.data;</div><div class='add'>+		hwtstamp = kvaser_usb_timestamp48_to_ktime(dev-&gt;cfg, cmd-&gt;u.leaf.rx_can.time);</div><div class='add'>+		break;</div><div class='add'>+	case KVASER_USBCAN:</div><div class='add'>+		rx_data = cmd-&gt;u.usbcan.rx_can.data;</div><div class='add'>+		hwtstamp = kvaser_usb_usbcan_timestamp_to_ktime(dev, cmd-&gt;u.usbcan.rx_can.time);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_skb(priv-&gt;netdev, &amp;cf);</div><div class='add'>+	if (!skb) {</div><div class='add'>+		stats-&gt;rx_dropped++;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;driver_info-&gt;family == KVASER_LEAF &amp;&amp; cmd-&gt;id ==</div><div class='add'>+	    CMD_LEAF_LOG_MESSAGE) {</div><div class='add'>+		cf-&gt;can_id = le32_to_cpu(cmd-&gt;u.leaf.log_message.id);</div><div class='add'>+		if (cf-&gt;can_id &amp; KVASER_EXTENDED_FRAME)</div><div class='add'>+			cf-&gt;can_id &amp;= CAN_EFF_MASK | CAN_EFF_FLAG;</div><div class='add'>+		else</div><div class='add'>+			cf-&gt;can_id &amp;= CAN_SFF_MASK;</div><div class='add'>+</div><div class='add'>+		can_frame_set_cc_len(cf, cmd-&gt;u.leaf.log_message.dlc &amp; 0xF, priv-&gt;can.ctrlmode);</div><div class='add'>+</div><div class='add'>+		if (cmd-&gt;u.leaf.log_message.flags &amp; MSG_FLAG_REMOTE_FRAME)</div><div class='add'>+			cf-&gt;can_id |= CAN_RTR_FLAG;</div><div class='add'>+		else</div><div class='add'>+			memcpy(cf-&gt;data, &amp;cmd-&gt;u.leaf.log_message.data,</div><div class='add'>+			       cf-&gt;len);</div><div class='add'>+	} else {</div><div class='add'>+		cf-&gt;can_id = ((rx_data[0] &amp; 0x1f) &lt;&lt; 6) | (rx_data[1] &amp; 0x3f);</div><div class='add'>+</div><div class='add'>+		if (cmd-&gt;id == CMD_RX_EXT_MESSAGE) {</div><div class='add'>+			cf-&gt;can_id &lt;&lt;= 18;</div><div class='add'>+			cf-&gt;can_id |= ((rx_data[2] &amp; 0x0f) &lt;&lt; 14) |</div><div class='add'>+				      ((rx_data[3] &amp; 0xff) &lt;&lt; 6) |</div><div class='add'>+				      (rx_data[4] &amp; 0x3f);</div><div class='add'>+			cf-&gt;can_id |= CAN_EFF_FLAG;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		can_frame_set_cc_len(cf, rx_data[5] &amp; 0xF, priv-&gt;can.ctrlmode);</div><div class='add'>+</div><div class='add'>+		if (cmd-&gt;u.rx_can_header.flag &amp; MSG_FLAG_REMOTE_FRAME)</div><div class='add'>+			cf-&gt;can_id |= CAN_RTR_FLAG;</div><div class='add'>+		else</div><div class='add'>+			memcpy(cf-&gt;data, &amp;rx_data[6], cf-&gt;len);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb_hwtstamps(skb)-&gt;hwtstamp = hwtstamp;</div><div class='add'>+	stats-&gt;rx_packets++;</div><div class='add'>+	if (!(cf-&gt;can_id &amp; CAN_RTR_FLAG))</div><div class='add'>+		stats-&gt;rx_bytes += cf-&gt;len;</div><div class='add'>+	netif_rx(skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_leaf_error_event_parameter(const struct kvaser_usb *dev,</div><div class='add'>+						  const struct kvaser_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	u16 info1 = 0;</div><div class='add'>+</div><div class='add'>+	switch (dev-&gt;driver_info-&gt;family) {</div><div class='add'>+	case KVASER_LEAF:</div><div class='add'>+		info1 = le16_to_cpu(cmd-&gt;u.leaf.error_event.info1);</div><div class='add'>+		break;</div><div class='add'>+	case KVASER_USBCAN:</div><div class='add'>+		info1 = le16_to_cpu(cmd-&gt;u.usbcan.error_event.info1);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* info1 will contain the offending cmd_no */</div><div class='add'>+	switch (info1) {</div><div class='add'>+	case CMD_SET_CTRL_MODE:</div><div class='add'>+		dev_warn(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			 "CMD_SET_CTRL_MODE error in parameter\n");</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case CMD_SET_BUS_PARAMS:</div><div class='add'>+		dev_warn(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			 "CMD_SET_BUS_PARAMS error in parameter\n");</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		dev_warn(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			 "Unhandled parameter error event cmd_no (%u)\n",</div><div class='add'>+			 info1);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_leaf_error_event(const struct kvaser_usb *dev,</div><div class='add'>+					const struct kvaser_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	u8 error_code = 0;</div><div class='add'>+</div><div class='add'>+	switch (dev-&gt;driver_info-&gt;family) {</div><div class='add'>+	case KVASER_LEAF:</div><div class='add'>+		error_code = cmd-&gt;u.leaf.error_event.error_code;</div><div class='add'>+		break;</div><div class='add'>+	case KVASER_USBCAN:</div><div class='add'>+		error_code = cmd-&gt;u.usbcan.error_event.error_code;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (error_code) {</div><div class='add'>+	case KVASER_USB_LEAF_ERROR_EVENT_TX_QUEUE_FULL:</div><div class='add'>+		/* Received additional CAN message, when firmware TX queue is</div><div class='add'>+		 * already full. Something is wrong with the driver.</div><div class='add'>+		 * This should never happen!</div><div class='add'>+		 */</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			"Received error event TX_QUEUE_FULL\n");</div><div class='add'>+		break;</div><div class='add'>+	case KVASER_USB_LEAF_ERROR_EVENT_PARAM:</div><div class='add'>+		kvaser_usb_leaf_error_event_parameter(dev, cmd);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		dev_warn(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			 "Unhandled error event (%d)\n", error_code);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_leaf_start_chip_reply(const struct kvaser_usb *dev,</div><div class='add'>+					     const struct kvaser_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb_net_priv *priv;</div><div class='add'>+	u8 channel = cmd-&gt;u.simple.channel;</div><div class='add'>+</div><div class='add'>+	if (channel &gt;= dev-&gt;nchannels) {</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			"Invalid channel number (%d)\n", channel);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv = dev-&gt;nets[channel];</div><div class='add'>+</div><div class='add'>+	if (completion_done(&amp;priv-&gt;start_comp) &amp;&amp;</div><div class='add'>+	    netif_queue_stopped(priv-&gt;netdev)) {</div><div class='add'>+		netif_wake_queue(priv-&gt;netdev);</div><div class='add'>+	} else {</div><div class='add'>+		netif_start_queue(priv-&gt;netdev);</div><div class='add'>+		complete(&amp;priv-&gt;start_comp);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_leaf_stop_chip_reply(const struct kvaser_usb *dev,</div><div class='add'>+					    const struct kvaser_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb_net_priv *priv;</div><div class='add'>+	u8 channel = cmd-&gt;u.simple.channel;</div><div class='add'>+</div><div class='add'>+	if (channel &gt;= dev-&gt;nchannels) {</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			"Invalid channel number (%d)\n", channel);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv = dev-&gt;nets[channel];</div><div class='add'>+</div><div class='add'>+	complete(&amp;priv-&gt;stop_comp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_leaf_get_busparams_reply(const struct kvaser_usb *dev,</div><div class='add'>+						const struct kvaser_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb_net_priv *priv;</div><div class='add'>+	u8 channel = cmd-&gt;u.busparams.channel;</div><div class='add'>+</div><div class='add'>+	if (channel &gt;= dev-&gt;nchannels) {</div><div class='add'>+		dev_err(&amp;dev-&gt;intf-&gt;dev,</div><div class='add'>+			"Invalid channel number (%d)\n", channel);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv = dev-&gt;nets[channel];</div><div class='add'>+	memcpy(&amp;priv-&gt;busparams_nominal, &amp;cmd-&gt;u.busparams.busparams,</div><div class='add'>+	       sizeof(priv-&gt;busparams_nominal));</div><div class='add'>+</div><div class='add'>+	complete(&amp;priv-&gt;get_busparams_comp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_leaf_handle_command(struct kvaser_usb *dev,</div><div class='add'>+					   const struct kvaser_cmd *cmd)</div><div class='add'>+{</div><div class='add'>+	if (kvaser_usb_leaf_verify_size(dev, cmd) &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	switch (cmd-&gt;id) {</div><div class='add'>+	case CMD_START_CHIP_REPLY:</div><div class='add'>+		kvaser_usb_leaf_start_chip_reply(dev, cmd);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case CMD_STOP_CHIP_REPLY:</div><div class='add'>+		kvaser_usb_leaf_stop_chip_reply(dev, cmd);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case CMD_RX_STD_MESSAGE:</div><div class='add'>+	case CMD_RX_EXT_MESSAGE:</div><div class='add'>+		kvaser_usb_leaf_rx_can_msg(dev, cmd);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case CMD_LEAF_LOG_MESSAGE:</div><div class='add'>+		if (dev-&gt;driver_info-&gt;family != KVASER_LEAF)</div><div class='add'>+			goto warn;</div><div class='add'>+		kvaser_usb_leaf_rx_can_msg(dev, cmd);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case CMD_CHIP_STATE_EVENT:</div><div class='add'>+	case CMD_CAN_ERROR_EVENT:</div><div class='add'>+		if (dev-&gt;driver_info-&gt;family == KVASER_LEAF)</div><div class='add'>+			kvaser_usb_leaf_leaf_rx_error(dev, cmd);</div><div class='add'>+		else</div><div class='add'>+			kvaser_usb_leaf_usbcan_rx_error(dev, cmd);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case CMD_TX_ACKNOWLEDGE:</div><div class='add'>+		kvaser_usb_leaf_tx_acknowledge(dev, cmd);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case CMD_ERROR_EVENT:</div><div class='add'>+		kvaser_usb_leaf_error_event(dev, cmd);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case CMD_GET_BUS_PARAMS_REPLY:</div><div class='add'>+		kvaser_usb_leaf_get_busparams_reply(dev, cmd);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case CMD_USBCAN_CLOCK_OVERFLOW_EVENT:</div><div class='add'>+		if (dev-&gt;driver_info-&gt;family != KVASER_USBCAN)</div><div class='add'>+			goto warn;</div><div class='add'>+		dev-&gt;card_data.usbcan_timestamp_msb =</div><div class='add'>+					le32_to_cpu(cmd-&gt;u.usbcan.clk_overflow_event.time) &amp;</div><div class='add'>+					KVASER_USB_USBCAN_CLK_OVERFLOW_MASK;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	/* Ignored commands */</div><div class='add'>+	case CMD_FLUSH_QUEUE_REPLY:</div><div class='add'>+		if (dev-&gt;driver_info-&gt;family != KVASER_LEAF)</div><div class='add'>+			goto warn;</div><div class='add'>+		break;</div><div class='add'>+	case CMD_LED_ACTION_RESP:</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+warn:		dev_warn(&amp;dev-&gt;intf-&gt;dev, "Unhandled command (%d)\n", cmd-&gt;id);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_leaf_read_bulk_callback(struct kvaser_usb *dev,</div><div class='add'>+					       void *buf, int len)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_cmd *cmd;</div><div class='add'>+	int pos = 0;</div><div class='add'>+</div><div class='add'>+	while (pos &lt;= len - CMD_HEADER_LEN) {</div><div class='add'>+		cmd = buf + pos;</div><div class='add'>+</div><div class='add'>+		/* The Kvaser firmware can only read and write commands that</div><div class='add'>+		 * does not cross the USB's endpoint wMaxPacketSize boundary.</div><div class='add'>+		 * If a follow-up command crosses such boundary, firmware puts</div><div class='add'>+		 * a placeholder zero-length command in its place then aligns</div><div class='add'>+		 * the real command to the next max packet size.</div><div class='add'>+		 *</div><div class='add'>+		 * Handle such cases or we're going to miss a significant</div><div class='add'>+		 * number of events in case of a heavy rx load on the bus.</div><div class='add'>+		 */</div><div class='add'>+		if (cmd-&gt;len == 0) {</div><div class='add'>+			pos = round_up(pos + 1, le16_to_cpu</div><div class='add'>+						(dev-&gt;bulk_in-&gt;wMaxPacketSize));</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (pos + cmd-&gt;len &gt; len) {</div><div class='add'>+			dev_err_ratelimited(&amp;dev-&gt;intf-&gt;dev, "Format error\n");</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		kvaser_usb_leaf_handle_command(dev, cmd);</div><div class='add'>+		pos += cmd-&gt;len;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_leaf_set_opt_mode(const struct kvaser_usb_net_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_cmd *cmd;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;id = CMD_SET_CTRL_MODE;</div><div class='add'>+	cmd-&gt;len = CMD_HEADER_LEN + sizeof(struct kvaser_cmd_ctrl_mode);</div><div class='add'>+	cmd-&gt;u.ctrl_mode.tid = 0xff;</div><div class='add'>+	cmd-&gt;u.ctrl_mode.channel = priv-&gt;channel;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LISTENONLY)</div><div class='add'>+		cmd-&gt;u.ctrl_mode.ctrl_mode = KVASER_CTRL_MODE_SILENT;</div><div class='add'>+	else</div><div class='add'>+		cmd-&gt;u.ctrl_mode.ctrl_mode = KVASER_CTRL_MODE_NORMAL;</div><div class='add'>+</div><div class='add'>+	rc = kvaser_usb_send_cmd(priv-&gt;dev, cmd, cmd-&gt;len);</div><div class='add'>+</div><div class='add'>+	kfree(cmd);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_leaf_start_chip(struct kvaser_usb_net_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb_net_leaf_priv *leaf = priv-&gt;sub_priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	leaf-&gt;joining_bus = true;</div><div class='add'>+</div><div class='add'>+	reinit_completion(&amp;priv-&gt;start_comp);</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_leaf_send_simple_cmd(priv-&gt;dev, CMD_START_CHIP,</div><div class='add'>+					      priv-&gt;channel);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (!wait_for_completion_timeout(&amp;priv-&gt;start_comp,</div><div class='add'>+					 msecs_to_jiffies(KVASER_USB_TIMEOUT)))</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_leaf_stop_chip(struct kvaser_usb_net_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb_net_leaf_priv *leaf = priv-&gt;sub_priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	reinit_completion(&amp;priv-&gt;stop_comp);</div><div class='add'>+</div><div class='add'>+	cancel_delayed_work(&amp;leaf-&gt;chip_state_req_work);</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_leaf_send_simple_cmd(priv-&gt;dev, CMD_STOP_CHIP,</div><div class='add'>+					      priv-&gt;channel);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (!wait_for_completion_timeout(&amp;priv-&gt;stop_comp,</div><div class='add'>+					 msecs_to_jiffies(KVASER_USB_TIMEOUT)))</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_leaf_reset_chip(struct kvaser_usb *dev, int channel)</div><div class='add'>+{</div><div class='add'>+	return kvaser_usb_leaf_send_simple_cmd(dev, CMD_RESET_CHIP, channel);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_leaf_flush_queue(struct kvaser_usb_net_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_cmd *cmd;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;id = CMD_FLUSH_QUEUE;</div><div class='add'>+	cmd-&gt;len = CMD_HEADER_LEN + sizeof(struct kvaser_cmd_flush_queue);</div><div class='add'>+	cmd-&gt;u.flush_queue.channel = priv-&gt;channel;</div><div class='add'>+	cmd-&gt;u.flush_queue.flags = 0x00;</div><div class='add'>+</div><div class='add'>+	rc = kvaser_usb_send_cmd(priv-&gt;dev, cmd, cmd-&gt;len);</div><div class='add'>+</div><div class='add'>+	kfree(cmd);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_leaf_init_card(struct kvaser_usb *dev)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb_dev_card_data *card_data = &amp;dev-&gt;card_data;</div><div class='add'>+</div><div class='add'>+	card_data-&gt;ctrlmode_supported |= CAN_CTRLMODE_3_SAMPLES;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_leaf_init_channel(struct kvaser_usb_net_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb_net_leaf_priv *leaf;</div><div class='add'>+</div><div class='add'>+	leaf = devm_kzalloc(&amp;priv-&gt;dev-&gt;intf-&gt;dev, sizeof(*leaf), GFP_KERNEL);</div><div class='add'>+	if (!leaf)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	leaf-&gt;net = priv;</div><div class='add'>+	INIT_DELAYED_WORK(&amp;leaf-&gt;chip_state_req_work,</div><div class='add'>+			  kvaser_usb_leaf_chip_state_req_work);</div><div class='add'>+</div><div class='add'>+	priv-&gt;sub_priv = leaf;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void kvaser_usb_leaf_remove_channel(struct kvaser_usb_net_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb_net_leaf_priv *leaf = priv-&gt;sub_priv;</div><div class='add'>+</div><div class='add'>+	if (leaf)</div><div class='add'>+		cancel_delayed_work_sync(&amp;leaf-&gt;chip_state_req_work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_leaf_set_bittiming(const struct net_device *netdev,</div><div class='add'>+					 const struct kvaser_usb_busparams *busparams)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb_net_priv *priv = netdev_priv(netdev);</div><div class='add'>+	struct kvaser_usb *dev = priv-&gt;dev;</div><div class='add'>+	struct kvaser_cmd *cmd;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	cmd = kmalloc(sizeof(*cmd), GFP_KERNEL);</div><div class='add'>+	if (!cmd)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;id = CMD_SET_BUS_PARAMS;</div><div class='add'>+	cmd-&gt;len = CMD_HEADER_LEN + sizeof(struct kvaser_cmd_busparams);</div><div class='add'>+	cmd-&gt;u.busparams.channel = priv-&gt;channel;</div><div class='add'>+	cmd-&gt;u.busparams.tid = 0xff;</div><div class='add'>+	memcpy(&amp;cmd-&gt;u.busparams.busparams, busparams,</div><div class='add'>+	       sizeof(cmd-&gt;u.busparams.busparams));</div><div class='add'>+</div><div class='add'>+	rc = kvaser_usb_send_cmd(dev, cmd, cmd-&gt;len);</div><div class='add'>+</div><div class='add'>+	kfree(cmd);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_leaf_get_busparams(struct kvaser_usb_net_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;dev-&gt;driver_info-&gt;family == KVASER_USBCAN)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	reinit_completion(&amp;priv-&gt;get_busparams_comp);</div><div class='add'>+</div><div class='add'>+	err = kvaser_usb_leaf_send_simple_cmd(priv-&gt;dev, CMD_GET_BUS_PARAMS,</div><div class='add'>+					      priv-&gt;channel);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (!wait_for_completion_timeout(&amp;priv-&gt;get_busparams_comp,</div><div class='add'>+					 msecs_to_jiffies(KVASER_USB_TIMEOUT)))</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_leaf_set_mode(struct net_device *netdev,</div><div class='add'>+				    enum can_mode mode)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb_net_priv *priv = netdev_priv(netdev);</div><div class='add'>+	struct kvaser_usb_net_leaf_priv *leaf = priv-&gt;sub_priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case CAN_MODE_START:</div><div class='add'>+		kvaser_usb_unlink_tx_urbs(priv);</div><div class='add'>+</div><div class='add'>+		leaf-&gt;joining_bus = true;</div><div class='add'>+</div><div class='add'>+		err = kvaser_usb_leaf_simple_cmd_async(priv, CMD_START_CHIP);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_leaf_get_berr_counter(const struct net_device *netdev,</div><div class='add'>+					    struct can_berr_counter *bec)</div><div class='add'>+{</div><div class='add'>+	struct kvaser_usb_net_priv *priv = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	*bec = priv-&gt;bec;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int kvaser_usb_leaf_setup_endpoints(struct kvaser_usb *dev)</div><div class='add'>+{</div><div class='add'>+	const struct usb_host_interface *iface_desc;</div><div class='add'>+	struct usb_endpoint_descriptor *endpoint;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	iface_desc = dev-&gt;intf-&gt;cur_altsetting;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; iface_desc-&gt;desc.bNumEndpoints; ++i) {</div><div class='add'>+		endpoint = &amp;iface_desc-&gt;endpoint[i].desc;</div><div class='add'>+</div><div class='add'>+		if (!dev-&gt;bulk_in &amp;&amp; usb_endpoint_is_bulk_in(endpoint))</div><div class='add'>+			dev-&gt;bulk_in = endpoint;</div><div class='add'>+</div><div class='add'>+		if (!dev-&gt;bulk_out &amp;&amp; usb_endpoint_is_bulk_out(endpoint))</div><div class='add'>+			dev-&gt;bulk_out = endpoint;</div><div class='add'>+</div><div class='add'>+		/* use first bulk endpoint for in and out */</div><div class='add'>+		if (dev-&gt;bulk_in &amp;&amp; dev-&gt;bulk_out)</div><div class='add'>+			return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -ENODEV;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct kvaser_usb_dev_ops kvaser_usb_leaf_dev_ops = {</div><div class='add'>+	.dev_set_mode = kvaser_usb_leaf_set_mode,</div><div class='add'>+	.dev_set_bittiming = kvaser_usb_leaf_set_bittiming,</div><div class='add'>+	.dev_get_busparams = kvaser_usb_leaf_get_busparams,</div><div class='add'>+	.dev_set_data_bittiming = NULL,</div><div class='add'>+	.dev_get_data_busparams = NULL,</div><div class='add'>+	.dev_get_berr_counter = kvaser_usb_leaf_get_berr_counter,</div><div class='add'>+	.dev_setup_endpoints = kvaser_usb_leaf_setup_endpoints,</div><div class='add'>+	.dev_init_card = kvaser_usb_leaf_init_card,</div><div class='add'>+	.dev_init_channel = kvaser_usb_leaf_init_channel,</div><div class='add'>+	.dev_remove_channel = kvaser_usb_leaf_remove_channel,</div><div class='add'>+	.dev_get_software_info = kvaser_usb_leaf_get_software_info,</div><div class='add'>+	.dev_get_software_details = NULL,</div><div class='add'>+	.dev_get_card_info = kvaser_usb_leaf_get_card_info,</div><div class='add'>+	.dev_get_capabilities = kvaser_usb_leaf_get_capabilities,</div><div class='add'>+	.dev_set_led = kvaser_usb_leaf_set_led,</div><div class='add'>+	.dev_set_opt_mode = kvaser_usb_leaf_set_opt_mode,</div><div class='add'>+	.dev_start_chip = kvaser_usb_leaf_start_chip,</div><div class='add'>+	.dev_stop_chip = kvaser_usb_leaf_stop_chip,</div><div class='add'>+	.dev_reset_chip = kvaser_usb_leaf_reset_chip,</div><div class='add'>+	.dev_flush_queue = kvaser_usb_leaf_flush_queue,</div><div class='add'>+	.dev_read_bulk_callback = kvaser_usb_leaf_read_bulk_callback,</div><div class='add'>+	.dev_frame_to_cmd = kvaser_usb_leaf_frame_to_cmd,</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/net/can/usb/mcba_usb.c b/drivers/net/can/usb/mcba_usb.c<br/>new file mode 100644<br/>index 000000000000..41c0a1c399bf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/mcba_usb.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/mcba_usb.c</a></div><div class='hunk'>@@ -0,0 +1,913 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* SocketCAN driver for Microchip CAN BUS Analyzer Tool</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2017 Mobica Limited</div><div class='add'>+ *</div><div class='add'>+ * This driver is inspired by the 4.6.2 version of net/can/usb/usb_8dev.c</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/unaligned.h&gt;</div><div class='add'>+#include &lt;linux/can.h&gt;</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/can/error.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/signal.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/usb.h&gt;</div><div class='add'>+</div><div class='add'>+/* vendor and product id */</div><div class='add'>+#define MCBA_MODULE_NAME "mcba_usb"</div><div class='add'>+#define MCBA_VENDOR_ID 0x04d8</div><div class='add'>+#define MCBA_PRODUCT_ID 0x0a30</div><div class='add'>+</div><div class='add'>+/* driver constants */</div><div class='add'>+#define MCBA_MAX_RX_URBS 20</div><div class='add'>+#define MCBA_MAX_TX_URBS 20</div><div class='add'>+#define MCBA_CTX_FREE MCBA_MAX_TX_URBS</div><div class='add'>+</div><div class='add'>+/* RX buffer must be bigger than msg size since at the</div><div class='add'>+ * beginning USB messages are stacked.</div><div class='add'>+ */</div><div class='add'>+#define MCBA_USB_RX_BUFF_SIZE 64</div><div class='add'>+#define MCBA_USB_TX_BUFF_SIZE (sizeof(struct mcba_usb_msg))</div><div class='add'>+</div><div class='add'>+/* Microchip command id */</div><div class='add'>+#define MBCA_CMD_RECEIVE_MESSAGE 0xE3</div><div class='add'>+#define MBCA_CMD_I_AM_ALIVE_FROM_CAN 0xF5</div><div class='add'>+#define MBCA_CMD_I_AM_ALIVE_FROM_USB 0xF7</div><div class='add'>+#define MBCA_CMD_CHANGE_BIT_RATE 0xA1</div><div class='add'>+#define MBCA_CMD_TRANSMIT_MESSAGE_EV 0xA3</div><div class='add'>+#define MBCA_CMD_SETUP_TERMINATION_RESISTANCE 0xA8</div><div class='add'>+#define MBCA_CMD_READ_FW_VERSION 0xA9</div><div class='add'>+#define MBCA_CMD_NOTHING_TO_SEND 0xFF</div><div class='add'>+#define MBCA_CMD_TRANSMIT_MESSAGE_RSP 0xE2</div><div class='add'>+</div><div class='add'>+#define MCBA_VER_REQ_USB 1</div><div class='add'>+#define MCBA_VER_REQ_CAN 2</div><div class='add'>+</div><div class='add'>+/* Drive the CAN_RES signal LOW "0" to activate R24 and R25 */</div><div class='add'>+#define MCBA_VER_TERMINATION_ON 0</div><div class='add'>+#define MCBA_VER_TERMINATION_OFF 1</div><div class='add'>+</div><div class='add'>+#define MCBA_SIDL_EXID_MASK 0x8</div><div class='add'>+#define MCBA_DLC_MASK 0xf</div><div class='add'>+#define MCBA_DLC_RTR_MASK 0x40</div><div class='add'>+</div><div class='add'>+#define MCBA_CAN_STATE_WRN_TH 95</div><div class='add'>+#define MCBA_CAN_STATE_ERR_PSV_TH 127</div><div class='add'>+</div><div class='add'>+#define MCBA_TERMINATION_DISABLED CAN_TERMINATION_DISABLED</div><div class='add'>+#define MCBA_TERMINATION_ENABLED 120</div><div class='add'>+</div><div class='add'>+struct mcba_usb_ctx {</div><div class='add'>+	struct mcba_priv *priv;</div><div class='add'>+	u32 ndx;</div><div class='add'>+	bool can;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Structure to hold all of our device specific stuff */</div><div class='add'>+struct mcba_priv {</div><div class='add'>+	struct can_priv can; /* must be the first member */</div><div class='add'>+	struct sk_buff *echo_skb[MCBA_MAX_TX_URBS];</div><div class='add'>+	struct mcba_usb_ctx tx_context[MCBA_MAX_TX_URBS];</div><div class='add'>+	struct usb_device *udev;</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	struct usb_anchor tx_submitted;</div><div class='add'>+	struct usb_anchor rx_submitted;</div><div class='add'>+	struct can_berr_counter bec;</div><div class='add'>+	bool usb_ka_first_pass;</div><div class='add'>+	bool can_ka_first_pass;</div><div class='add'>+	bool can_speed_check;</div><div class='add'>+	atomic_t free_ctx_cnt;</div><div class='add'>+	void *rxbuf[MCBA_MAX_RX_URBS];</div><div class='add'>+	dma_addr_t rxbuf_dma[MCBA_MAX_RX_URBS];</div><div class='add'>+	int rx_pipe;</div><div class='add'>+	int tx_pipe;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* CAN frame */</div><div class='add'>+struct __packed mcba_usb_msg_can {</div><div class='add'>+	u8 cmd_id;</div><div class='add'>+	__be16 eid;</div><div class='add'>+	__be16 sid;</div><div class='add'>+	u8 dlc;</div><div class='add'>+	u8 data[8];</div><div class='add'>+	u8 timestamp[4];</div><div class='add'>+	u8 checksum;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* command frame */</div><div class='add'>+struct __packed mcba_usb_msg {</div><div class='add'>+	u8 cmd_id;</div><div class='add'>+	u8 unused[18];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed mcba_usb_msg_ka_usb {</div><div class='add'>+	u8 cmd_id;</div><div class='add'>+	u8 termination_state;</div><div class='add'>+	u8 soft_ver_major;</div><div class='add'>+	u8 soft_ver_minor;</div><div class='add'>+	u8 unused[15];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed mcba_usb_msg_ka_can {</div><div class='add'>+	u8 cmd_id;</div><div class='add'>+	u8 tx_err_cnt;</div><div class='add'>+	u8 rx_err_cnt;</div><div class='add'>+	u8 rx_buff_ovfl;</div><div class='add'>+	u8 tx_bus_off;</div><div class='add'>+	__be16 can_bitrate;</div><div class='add'>+	__le16 rx_lost;</div><div class='add'>+	u8 can_stat;</div><div class='add'>+	u8 soft_ver_major;</div><div class='add'>+	u8 soft_ver_minor;</div><div class='add'>+	u8 debug_mode;</div><div class='add'>+	u8 test_complete;</div><div class='add'>+	u8 test_result;</div><div class='add'>+	u8 unused[4];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed mcba_usb_msg_change_bitrate {</div><div class='add'>+	u8 cmd_id;</div><div class='add'>+	__be16 bitrate;</div><div class='add'>+	u8 unused[16];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed mcba_usb_msg_termination {</div><div class='add'>+	u8 cmd_id;</div><div class='add'>+	u8 termination;</div><div class='add'>+	u8 unused[17];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed mcba_usb_msg_fw_ver {</div><div class='add'>+	u8 cmd_id;</div><div class='add'>+	u8 pic;</div><div class='add'>+	u8 unused[17];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct usb_device_id mcba_usb_table[] = {</div><div class='add'>+	{ USB_DEVICE(MCBA_VENDOR_ID, MCBA_PRODUCT_ID) },</div><div class='add'>+	{} /* Terminating entry */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+MODULE_DEVICE_TABLE(usb, mcba_usb_table);</div><div class='add'>+</div><div class='add'>+static const u16 mcba_termination[] = { MCBA_TERMINATION_DISABLED,</div><div class='add'>+					MCBA_TERMINATION_ENABLED };</div><div class='add'>+</div><div class='add'>+static const u32 mcba_bitrate[] = { 20000,  33333,  50000,  80000,  83333,</div><div class='add'>+				    100000, 125000, 150000, 175000, 200000,</div><div class='add'>+				    225000, 250000, 275000, 300000, 500000,</div><div class='add'>+				    625000, 800000, 1000000 };</div><div class='add'>+</div><div class='add'>+static inline void mcba_init_ctx(struct mcba_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int i = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; MCBA_MAX_TX_URBS; i++) {</div><div class='add'>+		priv-&gt;tx_context[i].ndx = MCBA_CTX_FREE;</div><div class='add'>+		priv-&gt;tx_context[i].priv = priv;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	atomic_set(&amp;priv-&gt;free_ctx_cnt, ARRAY_SIZE(priv-&gt;tx_context));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct mcba_usb_ctx *mcba_usb_get_free_ctx(struct mcba_priv *priv,</div><div class='add'>+							 struct can_frame *cf)</div><div class='add'>+{</div><div class='add'>+	int i = 0;</div><div class='add'>+	struct mcba_usb_ctx *ctx = NULL;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; MCBA_MAX_TX_URBS; i++) {</div><div class='add'>+		if (priv-&gt;tx_context[i].ndx == MCBA_CTX_FREE) {</div><div class='add'>+			ctx = &amp;priv-&gt;tx_context[i];</div><div class='add'>+			ctx-&gt;ndx = i;</div><div class='add'>+</div><div class='add'>+			if (cf)</div><div class='add'>+				ctx-&gt;can = true;</div><div class='add'>+			else</div><div class='add'>+				ctx-&gt;can = false;</div><div class='add'>+</div><div class='add'>+			atomic_dec(&amp;priv-&gt;free_ctx_cnt);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!atomic_read(&amp;priv-&gt;free_ctx_cnt))</div><div class='add'>+		/* That was the last free ctx. Slow down tx path */</div><div class='add'>+		netif_stop_queue(priv-&gt;netdev);</div><div class='add'>+</div><div class='add'>+	return ctx;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* mcba_usb_free_ctx and mcba_usb_get_free_ctx are executed by different</div><div class='add'>+ * threads. The order of execution in below function is important.</div><div class='add'>+ */</div><div class='add'>+static inline void mcba_usb_free_ctx(struct mcba_usb_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	/* Increase number of free ctxs before freeing ctx */</div><div class='add'>+	atomic_inc(&amp;ctx-&gt;priv-&gt;free_ctx_cnt);</div><div class='add'>+</div><div class='add'>+	ctx-&gt;ndx = MCBA_CTX_FREE;</div><div class='add'>+</div><div class='add'>+	/* Wake up the queue once ctx is marked free */</div><div class='add'>+	netif_wake_queue(ctx-&gt;priv-&gt;netdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mcba_usb_write_bulk_callback(struct urb *urb)</div><div class='add'>+{</div><div class='add'>+	struct mcba_usb_ctx *ctx = urb-&gt;context;</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+</div><div class='add'>+	WARN_ON(!ctx);</div><div class='add'>+</div><div class='add'>+	netdev = ctx-&gt;priv-&gt;netdev;</div><div class='add'>+</div><div class='add'>+	/* free up our allocated buffer */</div><div class='add'>+	usb_free_coherent(urb-&gt;dev, urb-&gt;transfer_buffer_length,</div><div class='add'>+			  urb-&gt;transfer_buffer, urb-&gt;transfer_dma);</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;can) {</div><div class='add'>+		if (!netif_device_present(netdev))</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		netdev-&gt;stats.tx_packets++;</div><div class='add'>+		netdev-&gt;stats.tx_bytes += can_get_echo_skb(netdev, ctx-&gt;ndx,</div><div class='add'>+							   NULL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (urb-&gt;status)</div><div class='add'>+		netdev_info(netdev, "Tx URB aborted (%d)\n", urb-&gt;status);</div><div class='add'>+</div><div class='add'>+	/* Release the context */</div><div class='add'>+	mcba_usb_free_ctx(ctx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Send data to device */</div><div class='add'>+static netdev_tx_t mcba_usb_xmit(struct mcba_priv *priv,</div><div class='add'>+				 struct mcba_usb_msg *usb_msg,</div><div class='add'>+				 struct mcba_usb_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	struct urb *urb;</div><div class='add'>+	u8 *buf;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* create a URB, and a buffer for it, and copy the data to the URB */</div><div class='add'>+	urb = usb_alloc_urb(0, GFP_ATOMIC);</div><div class='add'>+	if (!urb)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	buf = usb_alloc_coherent(priv-&gt;udev, MCBA_USB_TX_BUFF_SIZE, GFP_ATOMIC,</div><div class='add'>+				 &amp;urb-&gt;transfer_dma);</div><div class='add'>+	if (!buf) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto nomembuf;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(buf, usb_msg, MCBA_USB_TX_BUFF_SIZE);</div><div class='add'>+</div><div class='add'>+	usb_fill_bulk_urb(urb, priv-&gt;udev, priv-&gt;tx_pipe, buf, MCBA_USB_TX_BUFF_SIZE,</div><div class='add'>+			  mcba_usb_write_bulk_callback, ctx);</div><div class='add'>+</div><div class='add'>+	urb-&gt;transfer_flags |= URB_NO_TRANSFER_DMA_MAP;</div><div class='add'>+	usb_anchor_urb(urb, &amp;priv-&gt;tx_submitted);</div><div class='add'>+</div><div class='add'>+	err = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='add'>+	if (unlikely(err))</div><div class='add'>+		goto failed;</div><div class='add'>+</div><div class='add'>+	/* Release our reference to this URB, the USB core will eventually free</div><div class='add'>+	 * it entirely.</div><div class='add'>+	 */</div><div class='add'>+	usb_free_urb(urb);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+failed:</div><div class='add'>+	usb_unanchor_urb(urb);</div><div class='add'>+	usb_free_coherent(priv-&gt;udev, MCBA_USB_TX_BUFF_SIZE, buf,</div><div class='add'>+			  urb-&gt;transfer_dma);</div><div class='add'>+</div><div class='add'>+	if (err == -ENODEV)</div><div class='add'>+		netif_device_detach(priv-&gt;netdev);</div><div class='add'>+	else</div><div class='add'>+		netdev_warn(priv-&gt;netdev, "failed tx_urb %d\n", err);</div><div class='add'>+</div><div class='add'>+nomembuf:</div><div class='add'>+	usb_free_urb(urb);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Send data to device */</div><div class='add'>+static netdev_tx_t mcba_usb_start_xmit(struct sk_buff *skb,</div><div class='add'>+				       struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct mcba_priv *priv = netdev_priv(netdev);</div><div class='add'>+	struct can_frame *cf = (struct can_frame *)skb-&gt;data;</div><div class='add'>+	struct mcba_usb_ctx *ctx = NULL;</div><div class='add'>+	struct net_device_stats *stats = &amp;priv-&gt;netdev-&gt;stats;</div><div class='add'>+	u16 sid;</div><div class='add'>+	int err;</div><div class='add'>+	struct mcba_usb_msg_can usb_msg = {</div><div class='add'>+		.cmd_id = MBCA_CMD_TRANSMIT_MESSAGE_EV</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	if (can_dev_dropped_skb(netdev, skb))</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+	ctx = mcba_usb_get_free_ctx(priv, cf);</div><div class='add'>+	if (!ctx)</div><div class='add'>+		return NETDEV_TX_BUSY;</div><div class='add'>+</div><div class='add'>+	if (cf-&gt;can_id &amp; CAN_EFF_FLAG) {</div><div class='add'>+		/* SIDH    | SIDL                 | EIDH   | EIDL</div><div class='add'>+		 * 28 - 21 | 20 19 18 x x x 17 16 | 15 - 8 | 7 - 0</div><div class='add'>+		 */</div><div class='add'>+		sid = MCBA_SIDL_EXID_MASK;</div><div class='add'>+		/* store 28-18 bits */</div><div class='add'>+		sid |= (cf-&gt;can_id &amp; 0x1ffc0000) &gt;&gt; 13;</div><div class='add'>+		/* store 17-16 bits */</div><div class='add'>+		sid |= (cf-&gt;can_id &amp; 0x30000) &gt;&gt; 16;</div><div class='add'>+		put_unaligned_be16(sid, &amp;usb_msg.sid);</div><div class='add'>+</div><div class='add'>+		/* store 15-0 bits */</div><div class='add'>+		put_unaligned_be16(cf-&gt;can_id &amp; 0xffff, &amp;usb_msg.eid);</div><div class='add'>+	} else {</div><div class='add'>+		/* SIDH   | SIDL</div><div class='add'>+		 * 10 - 3 | 2 1 0 x x x x x</div><div class='add'>+		 */</div><div class='add'>+		put_unaligned_be16((cf-&gt;can_id &amp; CAN_SFF_MASK) &lt;&lt; 5,</div><div class='add'>+				   &amp;usb_msg.sid);</div><div class='add'>+		usb_msg.eid = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	usb_msg.dlc = cf-&gt;len;</div><div class='add'>+</div><div class='add'>+	memcpy(usb_msg.data, cf-&gt;data, usb_msg.dlc);</div><div class='add'>+</div><div class='add'>+	if (cf-&gt;can_id &amp; CAN_RTR_FLAG)</div><div class='add'>+		usb_msg.dlc |= MCBA_DLC_RTR_MASK;</div><div class='add'>+</div><div class='add'>+	can_put_echo_skb(skb, priv-&gt;netdev, ctx-&gt;ndx, 0);</div><div class='add'>+</div><div class='add'>+	err = mcba_usb_xmit(priv, (struct mcba_usb_msg *)&amp;usb_msg, ctx);</div><div class='add'>+	if (err)</div><div class='add'>+		goto xmit_failed;</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+xmit_failed:</div><div class='add'>+	can_free_echo_skb(priv-&gt;netdev, ctx-&gt;ndx, NULL);</div><div class='add'>+	mcba_usb_free_ctx(ctx);</div><div class='add'>+	stats-&gt;tx_dropped++;</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Send cmd to device */</div><div class='add'>+static void mcba_usb_xmit_cmd(struct mcba_priv *priv,</div><div class='add'>+			      struct mcba_usb_msg *usb_msg)</div><div class='add'>+{</div><div class='add'>+	struct mcba_usb_ctx *ctx = NULL;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	ctx = mcba_usb_get_free_ctx(priv, NULL);</div><div class='add'>+	if (!ctx) {</div><div class='add'>+		netdev_err(priv-&gt;netdev,</div><div class='add'>+			   "Lack of free ctx. Sending (%d) cmd aborted",</div><div class='add'>+			   usb_msg-&gt;cmd_id);</div><div class='add'>+</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mcba_usb_xmit(priv, usb_msg, ctx);</div><div class='add'>+	if (err)</div><div class='add'>+		netdev_err(priv-&gt;netdev, "Failed to send cmd (%d)",</div><div class='add'>+			   usb_msg-&gt;cmd_id);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mcba_usb_xmit_change_bitrate(struct mcba_priv *priv, u16 bitrate)</div><div class='add'>+{</div><div class='add'>+	struct mcba_usb_msg_change_bitrate usb_msg = {</div><div class='add'>+		.cmd_id = MBCA_CMD_CHANGE_BIT_RATE</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	put_unaligned_be16(bitrate, &amp;usb_msg.bitrate);</div><div class='add'>+</div><div class='add'>+	mcba_usb_xmit_cmd(priv, (struct mcba_usb_msg *)&amp;usb_msg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mcba_usb_xmit_read_fw_ver(struct mcba_priv *priv, u8 pic)</div><div class='add'>+{</div><div class='add'>+	struct mcba_usb_msg_fw_ver usb_msg = {</div><div class='add'>+		.cmd_id = MBCA_CMD_READ_FW_VERSION,</div><div class='add'>+		.pic = pic</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	mcba_usb_xmit_cmd(priv, (struct mcba_usb_msg *)&amp;usb_msg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mcba_usb_process_can(struct mcba_priv *priv,</div><div class='add'>+				 struct mcba_usb_msg_can *msg)</div><div class='add'>+{</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct net_device_stats *stats = &amp;priv-&gt;netdev-&gt;stats;</div><div class='add'>+	u16 sid;</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_skb(priv-&gt;netdev, &amp;cf);</div><div class='add'>+	if (!skb)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	sid = get_unaligned_be16(&amp;msg-&gt;sid);</div><div class='add'>+</div><div class='add'>+	if (sid &amp; MCBA_SIDL_EXID_MASK) {</div><div class='add'>+		/* SIDH    | SIDL                 | EIDH   | EIDL</div><div class='add'>+		 * 28 - 21 | 20 19 18 x x x 17 16 | 15 - 8 | 7 - 0</div><div class='add'>+		 */</div><div class='add'>+		cf-&gt;can_id = CAN_EFF_FLAG;</div><div class='add'>+</div><div class='add'>+		/* store 28-18 bits */</div><div class='add'>+		cf-&gt;can_id |= (sid &amp; 0xffe0) &lt;&lt; 13;</div><div class='add'>+		/* store 17-16 bits */</div><div class='add'>+		cf-&gt;can_id |= (sid &amp; 3) &lt;&lt; 16;</div><div class='add'>+		/* store 15-0 bits */</div><div class='add'>+		cf-&gt;can_id |= get_unaligned_be16(&amp;msg-&gt;eid);</div><div class='add'>+	} else {</div><div class='add'>+		/* SIDH   | SIDL</div><div class='add'>+		 * 10 - 3 | 2 1 0 x x x x x</div><div class='add'>+		 */</div><div class='add'>+		cf-&gt;can_id = (sid &amp; 0xffe0) &gt;&gt; 5;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cf-&gt;len = can_cc_dlc2len(msg-&gt;dlc &amp; MCBA_DLC_MASK);</div><div class='add'>+</div><div class='add'>+	if (msg-&gt;dlc &amp; MCBA_DLC_RTR_MASK) {</div><div class='add'>+		cf-&gt;can_id |= CAN_RTR_FLAG;</div><div class='add'>+	} else {</div><div class='add'>+		memcpy(cf-&gt;data, msg-&gt;data, cf-&gt;len);</div><div class='add'>+</div><div class='add'>+		stats-&gt;rx_bytes += cf-&gt;len;</div><div class='add'>+	}</div><div class='add'>+	stats-&gt;rx_packets++;</div><div class='add'>+</div><div class='add'>+	netif_rx(skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mcba_usb_process_ka_usb(struct mcba_priv *priv,</div><div class='add'>+				    struct mcba_usb_msg_ka_usb *msg)</div><div class='add'>+{</div><div class='add'>+	if (unlikely(priv-&gt;usb_ka_first_pass)) {</div><div class='add'>+		netdev_info(priv-&gt;netdev, "PIC USB version %u.%u\n",</div><div class='add'>+			    msg-&gt;soft_ver_major, msg-&gt;soft_ver_minor);</div><div class='add'>+</div><div class='add'>+		priv-&gt;usb_ka_first_pass = false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (msg-&gt;termination_state == MCBA_VER_TERMINATION_ON)</div><div class='add'>+		priv-&gt;can.termination = MCBA_TERMINATION_ENABLED;</div><div class='add'>+	else</div><div class='add'>+		priv-&gt;can.termination = MCBA_TERMINATION_DISABLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 convert_can2host_bitrate(struct mcba_usb_msg_ka_can *msg)</div><div class='add'>+{</div><div class='add'>+	const u32 bitrate = get_unaligned_be16(&amp;msg-&gt;can_bitrate);</div><div class='add'>+</div><div class='add'>+	if ((bitrate == 33) || (bitrate == 83))</div><div class='add'>+		return bitrate * 1000 + 333;</div><div class='add'>+	else</div><div class='add'>+		return bitrate * 1000;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mcba_usb_process_ka_can(struct mcba_priv *priv,</div><div class='add'>+				    struct mcba_usb_msg_ka_can *msg)</div><div class='add'>+{</div><div class='add'>+	if (unlikely(priv-&gt;can_ka_first_pass)) {</div><div class='add'>+		netdev_info(priv-&gt;netdev, "PIC CAN version %u.%u\n",</div><div class='add'>+			    msg-&gt;soft_ver_major, msg-&gt;soft_ver_minor);</div><div class='add'>+</div><div class='add'>+		priv-&gt;can_ka_first_pass = false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (unlikely(priv-&gt;can_speed_check)) {</div><div class='add'>+		const u32 bitrate = convert_can2host_bitrate(msg);</div><div class='add'>+</div><div class='add'>+		priv-&gt;can_speed_check = false;</div><div class='add'>+</div><div class='add'>+		if (bitrate != priv-&gt;can.bittiming.bitrate)</div><div class='add'>+			netdev_err(</div><div class='add'>+			    priv-&gt;netdev,</div><div class='add'>+			    "Wrong bitrate reported by the device (%u). Expected %u",</div><div class='add'>+			    bitrate, priv-&gt;can.bittiming.bitrate);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;bec.txerr = msg-&gt;tx_err_cnt;</div><div class='add'>+	priv-&gt;bec.rxerr = msg-&gt;rx_err_cnt;</div><div class='add'>+</div><div class='add'>+	if (msg-&gt;tx_bus_off)</div><div class='add'>+		priv-&gt;can.state = CAN_STATE_BUS_OFF;</div><div class='add'>+</div><div class='add'>+	else if ((priv-&gt;bec.txerr &gt; MCBA_CAN_STATE_ERR_PSV_TH) ||</div><div class='add'>+		 (priv-&gt;bec.rxerr &gt; MCBA_CAN_STATE_ERR_PSV_TH))</div><div class='add'>+		priv-&gt;can.state = CAN_STATE_ERROR_PASSIVE;</div><div class='add'>+</div><div class='add'>+	else if ((priv-&gt;bec.txerr &gt; MCBA_CAN_STATE_WRN_TH) ||</div><div class='add'>+		 (priv-&gt;bec.rxerr &gt; MCBA_CAN_STATE_WRN_TH))</div><div class='add'>+		priv-&gt;can.state = CAN_STATE_ERROR_WARNING;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mcba_usb_process_rx(struct mcba_priv *priv,</div><div class='add'>+				struct mcba_usb_msg *msg)</div><div class='add'>+{</div><div class='add'>+	switch (msg-&gt;cmd_id) {</div><div class='add'>+	case MBCA_CMD_I_AM_ALIVE_FROM_CAN:</div><div class='add'>+		mcba_usb_process_ka_can(priv,</div><div class='add'>+					(struct mcba_usb_msg_ka_can *)msg);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case MBCA_CMD_I_AM_ALIVE_FROM_USB:</div><div class='add'>+		mcba_usb_process_ka_usb(priv,</div><div class='add'>+					(struct mcba_usb_msg_ka_usb *)msg);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case MBCA_CMD_RECEIVE_MESSAGE:</div><div class='add'>+		mcba_usb_process_can(priv, (struct mcba_usb_msg_can *)msg);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case MBCA_CMD_NOTHING_TO_SEND:</div><div class='add'>+		/* Side effect of communication between PIC_USB and PIC_CAN.</div><div class='add'>+		 * PIC_CAN is telling us that it has nothing to send</div><div class='add'>+		 */</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case MBCA_CMD_TRANSMIT_MESSAGE_RSP:</div><div class='add'>+		/* Transmission response from the device containing timestamp */</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		netdev_warn(priv-&gt;netdev, "Unsupported msg (0x%X)",</div><div class='add'>+			    msg-&gt;cmd_id);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Callback for reading data from device</div><div class='add'>+ *</div><div class='add'>+ * Check urb status, call read function and resubmit urb read operation.</div><div class='add'>+ */</div><div class='add'>+static void mcba_usb_read_bulk_callback(struct urb *urb)</div><div class='add'>+{</div><div class='add'>+	struct mcba_priv *priv = urb-&gt;context;</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	int retval;</div><div class='add'>+	int pos = 0;</div><div class='add'>+</div><div class='add'>+	netdev = priv-&gt;netdev;</div><div class='add'>+</div><div class='add'>+	if (!netif_device_present(netdev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	switch (urb-&gt;status) {</div><div class='add'>+	case 0: /* success */</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case -ENOENT:</div><div class='add'>+	case -EPIPE:</div><div class='add'>+	case -EPROTO:</div><div class='add'>+	case -ESHUTDOWN:</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		netdev_info(netdev, "Rx URB aborted (%d)\n", urb-&gt;status);</div><div class='add'>+</div><div class='add'>+		goto resubmit_urb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	while (pos &lt; urb-&gt;actual_length) {</div><div class='add'>+		struct mcba_usb_msg *msg;</div><div class='add'>+</div><div class='add'>+		if (pos + sizeof(struct mcba_usb_msg) &gt; urb-&gt;actual_length) {</div><div class='add'>+			netdev_err(priv-&gt;netdev, "format error\n");</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		msg = (struct mcba_usb_msg *)(urb-&gt;transfer_buffer + pos);</div><div class='add'>+		mcba_usb_process_rx(priv, msg);</div><div class='add'>+</div><div class='add'>+		pos += sizeof(struct mcba_usb_msg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+resubmit_urb:</div><div class='add'>+</div><div class='add'>+	usb_fill_bulk_urb(urb, priv-&gt;udev,</div><div class='add'>+			  priv-&gt;rx_pipe,</div><div class='add'>+			  urb-&gt;transfer_buffer, MCBA_USB_RX_BUFF_SIZE,</div><div class='add'>+			  mcba_usb_read_bulk_callback, priv);</div><div class='add'>+</div><div class='add'>+	retval = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='add'>+</div><div class='add'>+	if (retval == -ENODEV)</div><div class='add'>+		netif_device_detach(netdev);</div><div class='add'>+	else if (retval)</div><div class='add'>+		netdev_err(netdev, "failed resubmitting read bulk urb: %d\n",</div><div class='add'>+			   retval);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Start USB device */</div><div class='add'>+static int mcba_usb_start(struct mcba_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = priv-&gt;netdev;</div><div class='add'>+	int err, i;</div><div class='add'>+</div><div class='add'>+	mcba_init_ctx(priv);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; MCBA_MAX_RX_URBS; i++) {</div><div class='add'>+		struct urb *urb = NULL;</div><div class='add'>+		u8 *buf;</div><div class='add'>+		dma_addr_t buf_dma;</div><div class='add'>+</div><div class='add'>+		/* create a URB, and a buffer for it */</div><div class='add'>+		urb = usb_alloc_urb(0, GFP_KERNEL);</div><div class='add'>+		if (!urb) {</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		buf = usb_alloc_coherent(priv-&gt;udev, MCBA_USB_RX_BUFF_SIZE,</div><div class='add'>+					 GFP_KERNEL, &amp;buf_dma);</div><div class='add'>+		if (!buf) {</div><div class='add'>+			netdev_err(netdev, "No memory left for USB buffer\n");</div><div class='add'>+			usb_free_urb(urb);</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		urb-&gt;transfer_dma = buf_dma;</div><div class='add'>+</div><div class='add'>+		usb_fill_bulk_urb(urb, priv-&gt;udev,</div><div class='add'>+				  priv-&gt;rx_pipe,</div><div class='add'>+				  buf, MCBA_USB_RX_BUFF_SIZE,</div><div class='add'>+				  mcba_usb_read_bulk_callback, priv);</div><div class='add'>+		urb-&gt;transfer_flags |= URB_NO_TRANSFER_DMA_MAP;</div><div class='add'>+		usb_anchor_urb(urb, &amp;priv-&gt;rx_submitted);</div><div class='add'>+</div><div class='add'>+		err = usb_submit_urb(urb, GFP_KERNEL);</div><div class='add'>+		if (err) {</div><div class='add'>+			usb_unanchor_urb(urb);</div><div class='add'>+			usb_free_coherent(priv-&gt;udev, MCBA_USB_RX_BUFF_SIZE,</div><div class='add'>+					  buf, buf_dma);</div><div class='add'>+			usb_free_urb(urb);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		priv-&gt;rxbuf[i] = buf;</div><div class='add'>+		priv-&gt;rxbuf_dma[i] = buf_dma;</div><div class='add'>+</div><div class='add'>+		/* Drop reference, USB core will take care of freeing it */</div><div class='add'>+		usb_free_urb(urb);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Did we submit any URBs */</div><div class='add'>+	if (i == 0) {</div><div class='add'>+		netdev_warn(netdev, "couldn't setup read URBs\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Warn if we've couldn't transmit all the URBs */</div><div class='add'>+	if (i &lt; MCBA_MAX_RX_URBS)</div><div class='add'>+		netdev_warn(netdev, "rx performance may be slow\n");</div><div class='add'>+</div><div class='add'>+	mcba_usb_xmit_read_fw_ver(priv, MCBA_VER_REQ_USB);</div><div class='add'>+	mcba_usb_xmit_read_fw_ver(priv, MCBA_VER_REQ_CAN);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Open USB device */</div><div class='add'>+static int mcba_usb_open(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct mcba_priv *priv = netdev_priv(netdev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* common open */</div><div class='add'>+	err = open_candev(netdev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	priv-&gt;can_speed_check = true;</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+</div><div class='add'>+	netif_start_queue(netdev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mcba_urb_unlink(struct mcba_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	usb_kill_anchored_urbs(&amp;priv-&gt;rx_submitted);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; MCBA_MAX_RX_URBS; ++i)</div><div class='add'>+		usb_free_coherent(priv-&gt;udev, MCBA_USB_RX_BUFF_SIZE,</div><div class='add'>+				  priv-&gt;rxbuf[i], priv-&gt;rxbuf_dma[i]);</div><div class='add'>+</div><div class='add'>+	usb_kill_anchored_urbs(&amp;priv-&gt;tx_submitted);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Close USB device */</div><div class='add'>+static int mcba_usb_close(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct mcba_priv *priv = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(netdev);</div><div class='add'>+</div><div class='add'>+	/* Stop polling */</div><div class='add'>+	mcba_urb_unlink(priv);</div><div class='add'>+</div><div class='add'>+	close_candev(netdev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Set network device mode</div><div class='add'>+ *</div><div class='add'>+ * Maybe we should leave this function empty, because the device</div><div class='add'>+ * set mode variable with open command.</div><div class='add'>+ */</div><div class='add'>+static int mcba_net_set_mode(struct net_device *netdev, enum can_mode mode)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcba_net_get_berr_counter(const struct net_device *netdev,</div><div class='add'>+				     struct can_berr_counter *bec)</div><div class='add'>+{</div><div class='add'>+	struct mcba_priv *priv = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	bec-&gt;txerr = priv-&gt;bec.txerr;</div><div class='add'>+	bec-&gt;rxerr = priv-&gt;bec.rxerr;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops mcba_netdev_ops = {</div><div class='add'>+	.ndo_open = mcba_usb_open,</div><div class='add'>+	.ndo_stop = mcba_usb_close,</div><div class='add'>+	.ndo_start_xmit = mcba_usb_start_xmit,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops mcba_ethtool_ops = {</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Microchip CANBUS has hardcoded bittiming values by default.</div><div class='add'>+ * This function sends request via USB to change the speed and align bittiming</div><div class='add'>+ * values for presentation purposes only</div><div class='add'>+ */</div><div class='add'>+static int mcba_net_set_bittiming(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct mcba_priv *priv = netdev_priv(netdev);</div><div class='add'>+	const u16 bitrate_kbps = priv-&gt;can.bittiming.bitrate / 1000;</div><div class='add'>+</div><div class='add'>+	mcba_usb_xmit_change_bitrate(priv, bitrate_kbps);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcba_set_termination(struct net_device *netdev, u16 term)</div><div class='add'>+{</div><div class='add'>+	struct mcba_priv *priv = netdev_priv(netdev);</div><div class='add'>+	struct mcba_usb_msg_termination usb_msg = {</div><div class='add'>+		.cmd_id = MBCA_CMD_SETUP_TERMINATION_RESISTANCE</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	if (term == MCBA_TERMINATION_ENABLED)</div><div class='add'>+		usb_msg.termination = MCBA_VER_TERMINATION_ON;</div><div class='add'>+	else</div><div class='add'>+		usb_msg.termination = MCBA_VER_TERMINATION_OFF;</div><div class='add'>+</div><div class='add'>+	mcba_usb_xmit_cmd(priv, (struct mcba_usb_msg *)&amp;usb_msg);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mcba_usb_probe(struct usb_interface *intf,</div><div class='add'>+			  const struct usb_device_id *id)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	struct mcba_priv *priv;</div><div class='add'>+	int err;</div><div class='add'>+	struct usb_device *usbdev = interface_to_usbdev(intf);</div><div class='add'>+	struct usb_endpoint_descriptor *in, *out;</div><div class='add'>+</div><div class='add'>+	err = usb_find_common_endpoints(intf-&gt;cur_altsetting, &amp;in, &amp;out, NULL, NULL);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;intf-&gt;dev, "Can't find endpoints\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev = alloc_candev(sizeof(struct mcba_priv), MCBA_MAX_TX_URBS);</div><div class='add'>+	if (!netdev) {</div><div class='add'>+		dev_err(&amp;intf-&gt;dev, "Couldn't alloc candev\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	priv-&gt;udev = usbdev;</div><div class='add'>+	priv-&gt;netdev = netdev;</div><div class='add'>+	priv-&gt;usb_ka_first_pass = true;</div><div class='add'>+	priv-&gt;can_ka_first_pass = true;</div><div class='add'>+	priv-&gt;can_speed_check = false;</div><div class='add'>+</div><div class='add'>+	init_usb_anchor(&amp;priv-&gt;rx_submitted);</div><div class='add'>+	init_usb_anchor(&amp;priv-&gt;tx_submitted);</div><div class='add'>+</div><div class='add'>+	usb_set_intfdata(intf, priv);</div><div class='add'>+</div><div class='add'>+	/* Init CAN device */</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='add'>+	priv-&gt;can.termination_const = mcba_termination;</div><div class='add'>+	priv-&gt;can.termination_const_cnt = ARRAY_SIZE(mcba_termination);</div><div class='add'>+	priv-&gt;can.bitrate_const = mcba_bitrate;</div><div class='add'>+	priv-&gt;can.bitrate_const_cnt = ARRAY_SIZE(mcba_bitrate);</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.do_set_termination = mcba_set_termination;</div><div class='add'>+	priv-&gt;can.do_set_mode = mcba_net_set_mode;</div><div class='add'>+	priv-&gt;can.do_get_berr_counter = mcba_net_get_berr_counter;</div><div class='add'>+	priv-&gt;can.do_set_bittiming = mcba_net_set_bittiming;</div><div class='add'>+</div><div class='add'>+	netdev-&gt;netdev_ops = &amp;mcba_netdev_ops;</div><div class='add'>+	netdev-&gt;ethtool_ops = &amp;mcba_ethtool_ops;</div><div class='add'>+</div><div class='add'>+	netdev-&gt;flags |= IFF_ECHO; /* we support local echo */</div><div class='add'>+</div><div class='add'>+	SET_NETDEV_DEV(netdev, &amp;intf-&gt;dev);</div><div class='add'>+</div><div class='add'>+	err = register_candev(netdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(netdev, "couldn't register CAN device: %d\n", err);</div><div class='add'>+</div><div class='add'>+		goto cleanup_free_candev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;rx_pipe = usb_rcvbulkpipe(priv-&gt;udev, in-&gt;bEndpointAddress);</div><div class='add'>+	priv-&gt;tx_pipe = usb_sndbulkpipe(priv-&gt;udev, out-&gt;bEndpointAddress);</div><div class='add'>+</div><div class='add'>+	/* Start USB dev only if we have successfully registered CAN device */</div><div class='add'>+	err = mcba_usb_start(priv);</div><div class='add'>+	if (err) {</div><div class='add'>+		if (err == -ENODEV)</div><div class='add'>+			netif_device_detach(priv-&gt;netdev);</div><div class='add'>+</div><div class='add'>+		netdev_warn(netdev, "couldn't start device: %d\n", err);</div><div class='add'>+</div><div class='add'>+		goto cleanup_unregister_candev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_info(&amp;intf-&gt;dev, "Microchip CAN BUS Analyzer connected\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+cleanup_unregister_candev:</div><div class='add'>+	unregister_candev(priv-&gt;netdev);</div><div class='add'>+</div><div class='add'>+cleanup_free_candev:</div><div class='add'>+	free_candev(netdev);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Called by the usb core when driver is unloaded or device is removed */</div><div class='add'>+static void mcba_usb_disconnect(struct usb_interface *intf)</div><div class='add'>+{</div><div class='add'>+	struct mcba_priv *priv = usb_get_intfdata(intf);</div><div class='add'>+</div><div class='add'>+	usb_set_intfdata(intf, NULL);</div><div class='add'>+</div><div class='add'>+	netdev_info(priv-&gt;netdev, "device disconnected\n");</div><div class='add'>+</div><div class='add'>+	unregister_candev(priv-&gt;netdev);</div><div class='add'>+	mcba_urb_unlink(priv);</div><div class='add'>+	free_candev(priv-&gt;netdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct usb_driver mcba_usb_driver = {</div><div class='add'>+	.name = MCBA_MODULE_NAME,</div><div class='add'>+	.probe = mcba_usb_probe,</div><div class='add'>+	.disconnect = mcba_usb_disconnect,</div><div class='add'>+	.id_table = mcba_usb_table,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_usb_driver(mcba_usb_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Remigiusz Kołłątaj &lt;remigiusz.kollataj@mobica.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("SocketCAN driver for Microchip CAN BUS Analyzer Tool");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/net/can/usb/nct6694_canfd.c b/drivers/net/can/usb/nct6694_canfd.c<br/>new file mode 100644<br/>index 000000000000..dd6df2ec3742<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/nct6694_canfd.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/nct6694_canfd.c</a></div><div class='hunk'>@@ -0,0 +1,831 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Nuvoton NCT6694 Socket CANfd driver based on USB interface.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Nuvoton Technology Corp.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/can/rx-offload.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/idr.h&gt;</div><div class='add'>+#include &lt;linux/irqdomain.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/mfd/nct6694.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+</div><div class='add'>+#define DEVICE_NAME "nct6694-canfd"</div><div class='add'>+</div><div class='add'>+/* USB command module type for NCT6694 CANfd controller.</div><div class='add'>+ * This defines the module type used for communication with the NCT6694</div><div class='add'>+ * CANfd controller over the USB interface.</div><div class='add'>+ */</div><div class='add'>+#define NCT6694_CANFD_MOD			0x05</div><div class='add'>+</div><div class='add'>+/* Command 00h - CAN Setting and Initialization */</div><div class='add'>+#define NCT6694_CANFD_SETTING			0x00</div><div class='add'>+#define NCT6694_CANFD_SETTING_ACTIVE_CTRL1	BIT(0)</div><div class='add'>+#define NCT6694_CANFD_SETTING_ACTIVE_CTRL2	BIT(1)</div><div class='add'>+#define NCT6694_CANFD_SETTING_ACTIVE_NBTP_DBTP	BIT(2)</div><div class='add'>+#define NCT6694_CANFD_SETTING_CTRL1_MON		BIT(0)</div><div class='add'>+#define NCT6694_CANFD_SETTING_CTRL1_NISO	BIT(1)</div><div class='add'>+#define NCT6694_CANFD_SETTING_CTRL1_LBCK	BIT(2)</div><div class='add'>+#define NCT6694_CANFD_SETTING_NBTP_NTSEG2	GENMASK(6, 0)</div><div class='add'>+#define NCT6694_CANFD_SETTING_NBTP_NTSEG1	GENMASK(15, 8)</div><div class='add'>+#define NCT6694_CANFD_SETTING_NBTP_NBRP		GENMASK(24, 16)</div><div class='add'>+#define NCT6694_CANFD_SETTING_NBTP_NSJW		GENMASK(31, 25)</div><div class='add'>+#define NCT6694_CANFD_SETTING_DBTP_DSJW		GENMASK(3, 0)</div><div class='add'>+#define NCT6694_CANFD_SETTING_DBTP_DTSEG2	GENMASK(7, 4)</div><div class='add'>+#define NCT6694_CANFD_SETTING_DBTP_DTSEG1	GENMASK(12, 8)</div><div class='add'>+#define NCT6694_CANFD_SETTING_DBTP_DBRP		GENMASK(20, 16)</div><div class='add'>+#define NCT6694_CANFD_SETTING_DBTP_TDC		BIT(23)</div><div class='add'>+</div><div class='add'>+/* Command 01h - CAN Information */</div><div class='add'>+#define NCT6694_CANFD_INFORMATION		0x01</div><div class='add'>+#define NCT6694_CANFD_INFORMATION_SEL		0x00</div><div class='add'>+</div><div class='add'>+/* Command 02h - CAN Event */</div><div class='add'>+#define NCT6694_CANFD_EVENT			0x02</div><div class='add'>+#define NCT6694_CANFD_EVENT_SEL(idx, mask)	\</div><div class='add'>+	((idx ? 0x80 : 0x00) | ((mask) &amp; 0x7F))</div><div class='add'>+</div><div class='add'>+#define NCT6694_CANFD_EVENT_MASK		GENMASK(5, 0)</div><div class='add'>+#define NCT6694_CANFD_EVT_TX_FIFO_EMPTY		BIT(7)	/* Read-clear */</div><div class='add'>+#define NCT6694_CANFD_EVT_RX_DATA_LOST		BIT(5)	/* Read-clear */</div><div class='add'>+#define NCT6694_CANFD_EVT_RX_DATA_IN		BIT(7)	/* Read-clear */</div><div class='add'>+</div><div class='add'>+/* Command 10h - CAN Deliver */</div><div class='add'>+#define NCT6694_CANFD_DELIVER			0x10</div><div class='add'>+#define NCT6694_CANFD_DELIVER_SEL(buf_cnt)	\</div><div class='add'>+	((buf_cnt) &amp; 0xFF)</div><div class='add'>+</div><div class='add'>+/* Command 11h - CAN Receive */</div><div class='add'>+#define NCT6694_CANFD_RECEIVE			0x11</div><div class='add'>+#define NCT6694_CANFD_RECEIVE_SEL(idx, buf_cnt)	\</div><div class='add'>+	((idx ? 0x80 : 0x00) | ((buf_cnt) &amp; 0x7F))</div><div class='add'>+</div><div class='add'>+#define NCT6694_CANFD_FRAME_TAG(idx)		(0xC0 | (idx))</div><div class='add'>+#define NCT6694_CANFD_FRAME_FLAG_EFF		BIT(0)</div><div class='add'>+#define NCT6694_CANFD_FRAME_FLAG_RTR		BIT(1)</div><div class='add'>+#define NCT6694_CANFD_FRAME_FLAG_FD		BIT(2)</div><div class='add'>+#define NCT6694_CANFD_FRAME_FLAG_BRS		BIT(3)</div><div class='add'>+#define NCT6694_CANFD_FRAME_FLAG_ERR		BIT(4)</div><div class='add'>+</div><div class='add'>+#define NCT6694_NAPI_WEIGHT			32</div><div class='add'>+</div><div class='add'>+enum nct6694_event_err {</div><div class='add'>+	NCT6694_CANFD_EVT_ERR_NO_ERROR = 0,</div><div class='add'>+	NCT6694_CANFD_EVT_ERR_CRC_ERROR,</div><div class='add'>+	NCT6694_CANFD_EVT_ERR_STUFF_ERROR,</div><div class='add'>+	NCT6694_CANFD_EVT_ERR_ACK_ERROR,</div><div class='add'>+	NCT6694_CANFD_EVT_ERR_FORM_ERROR,</div><div class='add'>+	NCT6694_CANFD_EVT_ERR_BIT_ERROR,</div><div class='add'>+	NCT6694_CANFD_EVT_ERR_TIMEOUT_ERROR,</div><div class='add'>+	NCT6694_CANFD_EVT_ERR_UNKNOWN_ERROR,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum nct6694_event_status {</div><div class='add'>+	NCT6694_CANFD_EVT_STS_ERROR_ACTIVE = 0,</div><div class='add'>+	NCT6694_CANFD_EVT_STS_ERROR_PASSIVE,</div><div class='add'>+	NCT6694_CANFD_EVT_STS_BUS_OFF,</div><div class='add'>+	NCT6694_CANFD_EVT_STS_WARNING,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed nct6694_canfd_setting {</div><div class='add'>+	__le32 nbr;</div><div class='add'>+	__le32 dbr;</div><div class='add'>+	u8 active;</div><div class='add'>+	u8 reserved[3];</div><div class='add'>+	__le16 ctrl1;</div><div class='add'>+	__le16 ctrl2;</div><div class='add'>+	__le32 nbtp;</div><div class='add'>+	__le32 dbtp;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed nct6694_canfd_information {</div><div class='add'>+	u8 tx_fifo_cnt;</div><div class='add'>+	u8 rx_fifo_cnt;</div><div class='add'>+	u8 reserved[2];</div><div class='add'>+	__le32 can_clk;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed nct6694_canfd_event {</div><div class='add'>+	u8 err;</div><div class='add'>+	u8 status;</div><div class='add'>+	u8 tx_evt;</div><div class='add'>+	u8 rx_evt;</div><div class='add'>+	u8 rec;</div><div class='add'>+	u8 tec;</div><div class='add'>+	u8 reserved[2];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed nct6694_canfd_frame {</div><div class='add'>+	u8 tag;</div><div class='add'>+	u8 flag;</div><div class='add'>+	u8 reserved;</div><div class='add'>+	u8 length;</div><div class='add'>+	__le32 id;</div><div class='add'>+	u8 data[CANFD_MAX_DLEN];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct nct6694_canfd_priv {</div><div class='add'>+	struct can_priv can;	/* must be the first member */</div><div class='add'>+	struct can_rx_offload offload;</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	struct nct6694 *nct6694;</div><div class='add'>+	struct workqueue_struct *wq;</div><div class='add'>+	struct work_struct tx_work;</div><div class='add'>+	struct nct6694_canfd_frame tx;</div><div class='add'>+	struct nct6694_canfd_frame rx;</div><div class='add'>+	struct nct6694_canfd_event event[2];</div><div class='add'>+	struct can_berr_counter bec;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline struct nct6694_canfd_priv *rx_offload_to_priv(struct can_rx_offload *offload)</div><div class='add'>+{</div><div class='add'>+	return container_of(offload, struct nct6694_canfd_priv, offload);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const nct6694_canfd_bittiming_nominal_const = {</div><div class='add'>+	.name = DEVICE_NAME,</div><div class='add'>+	.tseg1_min = 1,</div><div class='add'>+	.tseg1_max = 256,</div><div class='add'>+	.tseg2_min = 1,</div><div class='add'>+	.tseg2_max = 128,</div><div class='add'>+	.sjw_max = 128,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 512,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const nct6694_canfd_bittiming_data_const = {</div><div class='add'>+	.name = DEVICE_NAME,</div><div class='add'>+	.tseg1_min = 1,</div><div class='add'>+	.tseg1_max = 32,</div><div class='add'>+	.tseg2_min = 1,</div><div class='add'>+	.tseg2_max = 16,</div><div class='add'>+	.sjw_max = 16,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 32,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void nct6694_canfd_rx_offload(struct can_rx_offload *offload,</div><div class='add'>+				     struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct nct6694_canfd_priv *priv = rx_offload_to_priv(offload);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = can_rx_offload_queue_tail(offload, skb);</div><div class='add'>+	if (ret)</div><div class='add'>+		priv-&gt;ndev-&gt;stats.rx_fifo_errors++;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nct6694_canfd_handle_lost_msg(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct nct6694_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct net_device_stats *stats = &amp;ndev-&gt;stats;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	netdev_dbg(ndev, "RX FIFO overflow, message(s) lost.\n");</div><div class='add'>+</div><div class='add'>+	stats-&gt;rx_errors++;</div><div class='add'>+	stats-&gt;rx_over_errors++;</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_err_skb(ndev, &amp;cf);</div><div class='add'>+	if (!skb)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='add'>+	cf-&gt;data[1] = CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='add'>+</div><div class='add'>+	nct6694_canfd_rx_offload(&amp;priv-&gt;offload, skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nct6694_canfd_handle_rx(struct net_device *ndev, u8 rx_evt)</div><div class='add'>+{</div><div class='add'>+	struct net_device_stats *stats = &amp;ndev-&gt;stats;</div><div class='add'>+	struct nct6694_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct nct6694_canfd_frame *frame = &amp;priv-&gt;rx;</div><div class='add'>+	const struct nct6694_cmd_header cmd_hd = {</div><div class='add'>+		.mod = NCT6694_CANFD_MOD,</div><div class='add'>+		.cmd = NCT6694_CANFD_RECEIVE,</div><div class='add'>+		.sel = NCT6694_CANFD_RECEIVE_SEL(ndev-&gt;dev_port, 1),</div><div class='add'>+		.len = cpu_to_le16(sizeof(*frame))</div><div class='add'>+	};</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = nct6694_read_msg(priv-&gt;nct6694, &amp;cmd_hd, frame);</div><div class='add'>+	if (ret)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (frame-&gt;flag &amp; NCT6694_CANFD_FRAME_FLAG_FD) {</div><div class='add'>+		struct canfd_frame *cfd;</div><div class='add'>+</div><div class='add'>+		skb = alloc_canfd_skb(priv-&gt;ndev, &amp;cfd);</div><div class='add'>+		if (!skb) {</div><div class='add'>+			stats-&gt;rx_dropped++;</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		cfd-&gt;can_id = le32_to_cpu(frame-&gt;id);</div><div class='add'>+		cfd-&gt;len = canfd_sanitize_len(frame-&gt;length);</div><div class='add'>+		if (frame-&gt;flag &amp; NCT6694_CANFD_FRAME_FLAG_EFF)</div><div class='add'>+			cfd-&gt;can_id |= CAN_EFF_FLAG;</div><div class='add'>+		if (frame-&gt;flag &amp; NCT6694_CANFD_FRAME_FLAG_BRS)</div><div class='add'>+			cfd-&gt;flags |= CANFD_BRS;</div><div class='add'>+		if (frame-&gt;flag &amp; NCT6694_CANFD_FRAME_FLAG_ERR)</div><div class='add'>+			cfd-&gt;flags |= CANFD_ESI;</div><div class='add'>+</div><div class='add'>+		memcpy(cfd-&gt;data, frame-&gt;data, cfd-&gt;len);</div><div class='add'>+	} else {</div><div class='add'>+		struct can_frame *cf;</div><div class='add'>+</div><div class='add'>+		skb = alloc_can_skb(priv-&gt;ndev, &amp;cf);</div><div class='add'>+		if (!skb) {</div><div class='add'>+			stats-&gt;rx_dropped++;</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		cf-&gt;can_id = le32_to_cpu(frame-&gt;id);</div><div class='add'>+		cf-&gt;len = can_cc_dlc2len(frame-&gt;length);</div><div class='add'>+		if (frame-&gt;flag &amp; NCT6694_CANFD_FRAME_FLAG_EFF)</div><div class='add'>+			cf-&gt;can_id |= CAN_EFF_FLAG;</div><div class='add'>+</div><div class='add'>+		if (frame-&gt;flag &amp; NCT6694_CANFD_FRAME_FLAG_RTR)</div><div class='add'>+			cf-&gt;can_id |= CAN_RTR_FLAG;</div><div class='add'>+		else</div><div class='add'>+			memcpy(cf-&gt;data, frame-&gt;data, cf-&gt;len);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	nct6694_canfd_rx_offload(&amp;priv-&gt;offload, skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nct6694_canfd_get_berr_counter(const struct net_device *ndev,</div><div class='add'>+					  struct can_berr_counter *bec)</div><div class='add'>+{</div><div class='add'>+	struct nct6694_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	*bec = priv-&gt;bec;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nct6694_canfd_handle_state_change(struct net_device *ndev, u8 status)</div><div class='add'>+{</div><div class='add'>+	struct nct6694_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	enum can_state new_state, rx_state, tx_state;</div><div class='add'>+	struct can_berr_counter bec;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	nct6694_canfd_get_berr_counter(ndev, &amp;bec);</div><div class='add'>+	can_state_get_by_berr_counter(ndev, &amp;bec, &amp;tx_state, &amp;rx_state);</div><div class='add'>+</div><div class='add'>+	new_state = max(tx_state, rx_state);</div><div class='add'>+</div><div class='add'>+	/* state hasn't changed */</div><div class='add'>+	if (new_state == priv-&gt;can.state)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_err_skb(ndev, &amp;cf);</div><div class='add'>+</div><div class='add'>+	can_change_state(ndev, cf, tx_state, rx_state);</div><div class='add'>+</div><div class='add'>+	if (new_state == CAN_STATE_BUS_OFF) {</div><div class='add'>+		can_bus_off(ndev);</div><div class='add'>+	} else if (cf) {</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_CNT;</div><div class='add'>+		cf-&gt;data[6] = bec.txerr;</div><div class='add'>+		cf-&gt;data[7] = bec.rxerr;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (skb)</div><div class='add'>+		nct6694_canfd_rx_offload(&amp;priv-&gt;offload, skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nct6694_canfd_handle_bus_err(struct net_device *ndev, u8 bus_err)</div><div class='add'>+{</div><div class='add'>+	struct nct6694_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.can_stats.bus_error++;</div><div class='add'>+</div><div class='add'>+	skb = alloc_can_err_skb(ndev, &amp;cf);</div><div class='add'>+	if (cf)</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='add'>+</div><div class='add'>+	switch (bus_err) {</div><div class='add'>+	case NCT6694_CANFD_EVT_ERR_CRC_ERROR:</div><div class='add'>+		netdev_dbg(ndev, "CRC error\n");</div><div class='add'>+		ndev-&gt;stats.rx_errors++;</div><div class='add'>+		if (cf)</div><div class='add'>+			cf-&gt;data[3] |= CAN_ERR_PROT_LOC_CRC_SEQ;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case NCT6694_CANFD_EVT_ERR_STUFF_ERROR:</div><div class='add'>+		netdev_dbg(ndev, "Stuff error\n");</div><div class='add'>+		ndev-&gt;stats.rx_errors++;</div><div class='add'>+		if (cf)</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_STUFF;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case NCT6694_CANFD_EVT_ERR_ACK_ERROR:</div><div class='add'>+		netdev_dbg(ndev, "Ack error\n");</div><div class='add'>+		ndev-&gt;stats.tx_errors++;</div><div class='add'>+		if (cf) {</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_ACK;</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_TX;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case NCT6694_CANFD_EVT_ERR_FORM_ERROR:</div><div class='add'>+		netdev_dbg(ndev, "Form error\n");</div><div class='add'>+		ndev-&gt;stats.rx_errors++;</div><div class='add'>+		if (cf)</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_FORM;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case NCT6694_CANFD_EVT_ERR_BIT_ERROR:</div><div class='add'>+		netdev_dbg(ndev, "Bit error\n");</div><div class='add'>+		ndev-&gt;stats.tx_errors++;</div><div class='add'>+		if (cf)</div><div class='add'>+			cf-&gt;data[2] |= CAN_ERR_PROT_TX | CAN_ERR_PROT_BIT;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (skb)</div><div class='add'>+		nct6694_canfd_rx_offload(&amp;priv-&gt;offload, skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nct6694_canfd_handle_tx(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct nct6694_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct net_device_stats *stats = &amp;ndev-&gt;stats;</div><div class='add'>+</div><div class='add'>+	stats-&gt;tx_bytes += can_rx_offload_get_echo_skb_queue_tail(&amp;priv-&gt;offload,</div><div class='add'>+								  0, NULL);</div><div class='add'>+	stats-&gt;tx_packets++;</div><div class='add'>+	netif_wake_queue(ndev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t nct6694_canfd_irq(int irq, void *data)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = data;</div><div class='add'>+	struct nct6694_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct nct6694_canfd_event *event = &amp;priv-&gt;event[ndev-&gt;dev_port];</div><div class='add'>+	const struct nct6694_cmd_header cmd_hd = {</div><div class='add'>+		.mod = NCT6694_CANFD_MOD,</div><div class='add'>+		.cmd = NCT6694_CANFD_EVENT,</div><div class='add'>+		.sel = NCT6694_CANFD_EVENT_SEL(ndev-&gt;dev_port, NCT6694_CANFD_EVENT_MASK),</div><div class='add'>+		.len = cpu_to_le16(sizeof(priv-&gt;event))</div><div class='add'>+	};</div><div class='add'>+	irqreturn_t handled = IRQ_NONE;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = nct6694_read_msg(priv-&gt;nct6694, &amp;cmd_hd, priv-&gt;event);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return handled;</div><div class='add'>+</div><div class='add'>+	if (event-&gt;rx_evt &amp; NCT6694_CANFD_EVT_RX_DATA_IN) {</div><div class='add'>+		nct6694_canfd_handle_rx(ndev, event-&gt;rx_evt);</div><div class='add'>+		handled = IRQ_HANDLED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (event-&gt;rx_evt &amp; NCT6694_CANFD_EVT_RX_DATA_LOST) {</div><div class='add'>+		nct6694_canfd_handle_lost_msg(ndev);</div><div class='add'>+		handled = IRQ_HANDLED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (event-&gt;status) {</div><div class='add'>+		nct6694_canfd_handle_state_change(ndev, event-&gt;status);</div><div class='add'>+		handled = IRQ_HANDLED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (event-&gt;err != NCT6694_CANFD_EVT_ERR_NO_ERROR) {</div><div class='add'>+		if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING)</div><div class='add'>+			nct6694_canfd_handle_bus_err(ndev, event-&gt;err);</div><div class='add'>+		handled = IRQ_HANDLED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (event-&gt;tx_evt &amp; NCT6694_CANFD_EVT_TX_FIFO_EMPTY) {</div><div class='add'>+		nct6694_canfd_handle_tx(ndev);</div><div class='add'>+		handled = IRQ_HANDLED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (handled)</div><div class='add'>+		can_rx_offload_threaded_irq_finish(&amp;priv-&gt;offload);</div><div class='add'>+</div><div class='add'>+	priv-&gt;bec.rxerr = event-&gt;rec;</div><div class='add'>+	priv-&gt;bec.txerr = event-&gt;tec;</div><div class='add'>+</div><div class='add'>+	return handled;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nct6694_canfd_tx_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct nct6694_canfd_priv *priv = container_of(work,</div><div class='add'>+						       struct nct6694_canfd_priv,</div><div class='add'>+						       tx_work);</div><div class='add'>+	struct nct6694_canfd_frame *frame = &amp;priv-&gt;tx;</div><div class='add'>+	struct net_device *ndev = priv-&gt;ndev;</div><div class='add'>+	struct net_device_stats *stats = &amp;ndev-&gt;stats;</div><div class='add'>+	struct sk_buff *skb = priv-&gt;can.echo_skb[0];</div><div class='add'>+	static const struct nct6694_cmd_header cmd_hd = {</div><div class='add'>+		.mod = NCT6694_CANFD_MOD,</div><div class='add'>+		.cmd = NCT6694_CANFD_DELIVER,</div><div class='add'>+		.sel = NCT6694_CANFD_DELIVER_SEL(1),</div><div class='add'>+		.len = cpu_to_le16(sizeof(*frame))</div><div class='add'>+	};</div><div class='add'>+	u32 txid;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	memset(frame, 0, sizeof(*frame));</div><div class='add'>+</div><div class='add'>+	frame-&gt;tag = NCT6694_CANFD_FRAME_TAG(ndev-&gt;dev_port);</div><div class='add'>+</div><div class='add'>+	if (can_is_canfd_skb(skb)) {</div><div class='add'>+		struct canfd_frame *cfd = (struct canfd_frame *)skb-&gt;data;</div><div class='add'>+</div><div class='add'>+		if (cfd-&gt;flags &amp; CANFD_BRS)</div><div class='add'>+			frame-&gt;flag |= NCT6694_CANFD_FRAME_FLAG_BRS;</div><div class='add'>+</div><div class='add'>+		if (cfd-&gt;can_id &amp; CAN_EFF_FLAG) {</div><div class='add'>+			txid = cfd-&gt;can_id &amp; CAN_EFF_MASK;</div><div class='add'>+			frame-&gt;flag |= NCT6694_CANFD_FRAME_FLAG_EFF;</div><div class='add'>+		} else {</div><div class='add'>+			txid = cfd-&gt;can_id &amp; CAN_SFF_MASK;</div><div class='add'>+		}</div><div class='add'>+		frame-&gt;flag |= NCT6694_CANFD_FRAME_FLAG_FD;</div><div class='add'>+		frame-&gt;id = cpu_to_le32(txid);</div><div class='add'>+		frame-&gt;length = canfd_sanitize_len(cfd-&gt;len);</div><div class='add'>+</div><div class='add'>+		memcpy(frame-&gt;data, cfd-&gt;data, frame-&gt;length);</div><div class='add'>+	} else {</div><div class='add'>+		struct can_frame *cf = (struct can_frame *)skb-&gt;data;</div><div class='add'>+</div><div class='add'>+		if (cf-&gt;can_id &amp; CAN_EFF_FLAG) {</div><div class='add'>+			txid = cf-&gt;can_id &amp; CAN_EFF_MASK;</div><div class='add'>+			frame-&gt;flag |= NCT6694_CANFD_FRAME_FLAG_EFF;</div><div class='add'>+		} else {</div><div class='add'>+			txid = cf-&gt;can_id &amp; CAN_SFF_MASK;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (cf-&gt;can_id &amp; CAN_RTR_FLAG)</div><div class='add'>+			frame-&gt;flag |= NCT6694_CANFD_FRAME_FLAG_RTR;</div><div class='add'>+		else</div><div class='add'>+			memcpy(frame-&gt;data, cf-&gt;data, cf-&gt;len);</div><div class='add'>+</div><div class='add'>+		frame-&gt;id = cpu_to_le32(txid);</div><div class='add'>+		frame-&gt;length = cf-&gt;len;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = nct6694_write_msg(priv-&gt;nct6694, &amp;cmd_hd, frame);</div><div class='add'>+	if (err) {</div><div class='add'>+		can_free_echo_skb(ndev, 0, NULL);</div><div class='add'>+		stats-&gt;tx_dropped++;</div><div class='add'>+		stats-&gt;tx_errors++;</div><div class='add'>+		netif_wake_queue(ndev);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static netdev_tx_t nct6694_canfd_start_xmit(struct sk_buff *skb,</div><div class='add'>+					    struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct nct6694_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	if (can_dev_dropped_skb(ndev, skb))</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(ndev);</div><div class='add'>+	can_put_echo_skb(skb, ndev, 0, 0);</div><div class='add'>+	queue_work(priv-&gt;wq, &amp;priv-&gt;tx_work);</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nct6694_canfd_start(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct nct6694_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	const struct can_bittiming *n_bt = &amp;priv-&gt;can.bittiming;</div><div class='add'>+	const struct can_bittiming *d_bt = &amp;priv-&gt;can.fd.data_bittiming;</div><div class='add'>+	struct nct6694_canfd_setting *setting __free(kfree) = NULL;</div><div class='add'>+	const struct nct6694_cmd_header cmd_hd = {</div><div class='add'>+		.mod = NCT6694_CANFD_MOD,</div><div class='add'>+		.cmd = NCT6694_CANFD_SETTING,</div><div class='add'>+		.sel = ndev-&gt;dev_port,</div><div class='add'>+		.len = cpu_to_le16(sizeof(*setting))</div><div class='add'>+	};</div><div class='add'>+	u32 en_tdc;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	setting = kzalloc(sizeof(*setting), GFP_KERNEL);</div><div class='add'>+	if (!setting)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LISTENONLY)</div><div class='add'>+		setting-&gt;ctrl1 |= cpu_to_le16(NCT6694_CANFD_SETTING_CTRL1_MON);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD_NON_ISO)</div><div class='add'>+		setting-&gt;ctrl1 |= cpu_to_le16(NCT6694_CANFD_SETTING_CTRL1_NISO);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LOOPBACK)</div><div class='add'>+		setting-&gt;ctrl1 |= cpu_to_le16(NCT6694_CANFD_SETTING_CTRL1_LBCK);</div><div class='add'>+</div><div class='add'>+	/* Disable clock divider */</div><div class='add'>+	setting-&gt;ctrl2 = 0;</div><div class='add'>+</div><div class='add'>+	setting-&gt;nbtp = cpu_to_le32(FIELD_PREP(NCT6694_CANFD_SETTING_NBTP_NSJW,</div><div class='add'>+					       n_bt-&gt;sjw - 1) |</div><div class='add'>+				    FIELD_PREP(NCT6694_CANFD_SETTING_NBTP_NBRP,</div><div class='add'>+					       n_bt-&gt;brp - 1) |</div><div class='add'>+				    FIELD_PREP(NCT6694_CANFD_SETTING_NBTP_NTSEG2,</div><div class='add'>+					       n_bt-&gt;phase_seg2 - 1) |</div><div class='add'>+				    FIELD_PREP(NCT6694_CANFD_SETTING_NBTP_NTSEG1,</div><div class='add'>+					       n_bt-&gt;prop_seg + n_bt-&gt;phase_seg1 - 1));</div><div class='add'>+</div><div class='add'>+	if (d_bt-&gt;brp &lt;= 2)</div><div class='add'>+		en_tdc = NCT6694_CANFD_SETTING_DBTP_TDC;</div><div class='add'>+	else</div><div class='add'>+		en_tdc = 0;</div><div class='add'>+</div><div class='add'>+	setting-&gt;dbtp = cpu_to_le32(FIELD_PREP(NCT6694_CANFD_SETTING_DBTP_DSJW,</div><div class='add'>+					       d_bt-&gt;sjw - 1) |</div><div class='add'>+				    FIELD_PREP(NCT6694_CANFD_SETTING_DBTP_DBRP,</div><div class='add'>+					       d_bt-&gt;brp - 1) |</div><div class='add'>+				    FIELD_PREP(NCT6694_CANFD_SETTING_DBTP_DTSEG2,</div><div class='add'>+					       d_bt-&gt;phase_seg2 - 1) |</div><div class='add'>+				    FIELD_PREP(NCT6694_CANFD_SETTING_DBTP_DTSEG1,</div><div class='add'>+					       d_bt-&gt;prop_seg + d_bt-&gt;phase_seg1 - 1) |</div><div class='add'>+				    en_tdc);</div><div class='add'>+</div><div class='add'>+	setting-&gt;active = NCT6694_CANFD_SETTING_ACTIVE_CTRL1 |</div><div class='add'>+			  NCT6694_CANFD_SETTING_ACTIVE_CTRL2 |</div><div class='add'>+			  NCT6694_CANFD_SETTING_ACTIVE_NBTP_DBTP;</div><div class='add'>+</div><div class='add'>+	ret = nct6694_write_msg(priv-&gt;nct6694, &amp;cmd_hd, setting);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nct6694_canfd_stop(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct nct6694_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct nct6694_canfd_setting *setting __free(kfree) = NULL;</div><div class='add'>+	const struct nct6694_cmd_header cmd_hd = {</div><div class='add'>+		.mod = NCT6694_CANFD_MOD,</div><div class='add'>+		.cmd = NCT6694_CANFD_SETTING,</div><div class='add'>+		.sel = ndev-&gt;dev_port,</div><div class='add'>+		.len = cpu_to_le16(sizeof(*setting))</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* The NCT6694 cannot be stopped. To ensure safe operation and avoid</div><div class='add'>+	 * interference, the control mode is set to Listen-Only mode. This</div><div class='add'>+	 * mode allows the device to monitor bus activity without actively</div><div class='add'>+	 * participating in communication.</div><div class='add'>+	 */</div><div class='add'>+	setting = kzalloc(sizeof(*setting), GFP_KERNEL);</div><div class='add'>+	if (!setting)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	nct6694_read_msg(priv-&gt;nct6694, &amp;cmd_hd, setting);</div><div class='add'>+	setting-&gt;ctrl1 = cpu_to_le16(NCT6694_CANFD_SETTING_CTRL1_MON);</div><div class='add'>+	setting-&gt;active = NCT6694_CANFD_SETTING_ACTIVE_CTRL1;</div><div class='add'>+	nct6694_write_msg(priv-&gt;nct6694, &amp;cmd_hd, setting);</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nct6694_canfd_close(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct nct6694_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(ndev);</div><div class='add'>+	nct6694_canfd_stop(ndev);</div><div class='add'>+	destroy_workqueue(priv-&gt;wq);</div><div class='add'>+	free_irq(ndev-&gt;irq, ndev);</div><div class='add'>+	can_rx_offload_disable(&amp;priv-&gt;offload);</div><div class='add'>+	close_candev(ndev);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nct6694_canfd_set_mode(struct net_device *ndev, enum can_mode mode)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case CAN_MODE_START:</div><div class='add'>+		ret = nct6694_canfd_start(ndev);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		netif_wake_queue(ndev);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nct6694_canfd_open(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct nct6694_canfd_priv *priv = netdev_priv(ndev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = open_candev(ndev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	can_rx_offload_enable(&amp;priv-&gt;offload);</div><div class='add'>+</div><div class='add'>+	ret = request_threaded_irq(ndev-&gt;irq, NULL,</div><div class='add'>+				   nct6694_canfd_irq, IRQF_ONESHOT,</div><div class='add'>+				   "nct6694_canfd", ndev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(ndev, "Failed to request IRQ\n");</div><div class='add'>+		goto can_rx_offload_disable;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;wq = alloc_ordered_workqueue("%s-nct6694_wq",</div><div class='add'>+					   WQ_FREEZABLE | WQ_MEM_RECLAIM,</div><div class='add'>+					   ndev-&gt;name);</div><div class='add'>+	if (!priv-&gt;wq) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto free_irq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = nct6694_canfd_start(ndev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto destroy_wq;</div><div class='add'>+</div><div class='add'>+	netif_start_queue(ndev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+destroy_wq:</div><div class='add'>+	destroy_workqueue(priv-&gt;wq);</div><div class='add'>+free_irq:</div><div class='add'>+	free_irq(ndev-&gt;irq, ndev);</div><div class='add'>+can_rx_offload_disable:</div><div class='add'>+	can_rx_offload_disable(&amp;priv-&gt;offload);</div><div class='add'>+	close_candev(ndev);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops nct6694_canfd_netdev_ops = {</div><div class='add'>+	.ndo_open = nct6694_canfd_open,</div><div class='add'>+	.ndo_stop = nct6694_canfd_close,</div><div class='add'>+	.ndo_start_xmit = nct6694_canfd_start_xmit,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops nct6694_canfd_ethtool_ops = {</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int nct6694_canfd_get_clock(struct nct6694_canfd_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct nct6694_canfd_information *info __free(kfree) = NULL;</div><div class='add'>+	static const struct nct6694_cmd_header cmd_hd = {</div><div class='add'>+		.mod = NCT6694_CANFD_MOD,</div><div class='add'>+		.cmd = NCT6694_CANFD_INFORMATION,</div><div class='add'>+		.sel = NCT6694_CANFD_INFORMATION_SEL,</div><div class='add'>+		.len = cpu_to_le16(sizeof(*info))</div><div class='add'>+	};</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	info = kzalloc(sizeof(*info), GFP_KERNEL);</div><div class='add'>+	if (!info)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ret = nct6694_read_msg(priv-&gt;nct6694, &amp;cmd_hd, info);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return le32_to_cpu(info-&gt;can_clk);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int nct6694_canfd_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct nct6694 *nct6694 = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='add'>+	struct nct6694_canfd_priv *priv;</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	int port, irq, ret, can_clk;</div><div class='add'>+</div><div class='add'>+	port = ida_alloc(&amp;nct6694-&gt;canfd_ida, GFP_KERNEL);</div><div class='add'>+	if (port &lt; 0)</div><div class='add'>+		return port;</div><div class='add'>+</div><div class='add'>+	irq = irq_create_mapping(nct6694-&gt;domain,</div><div class='add'>+				 NCT6694_IRQ_CAN0 + port);</div><div class='add'>+	if (!irq) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto free_ida;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ndev = alloc_candev(sizeof(struct nct6694_canfd_priv), 1);</div><div class='add'>+	if (!ndev) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto dispose_irq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ndev-&gt;irq = irq;</div><div class='add'>+	ndev-&gt;flags |= IFF_ECHO;</div><div class='add'>+	ndev-&gt;dev_port = port;</div><div class='add'>+	ndev-&gt;netdev_ops = &amp;nct6694_canfd_netdev_ops;</div><div class='add'>+	ndev-&gt;ethtool_ops = &amp;nct6694_canfd_ethtool_ops;</div><div class='add'>+</div><div class='add'>+	priv = netdev_priv(ndev);</div><div class='add'>+	priv-&gt;nct6694 = nct6694;</div><div class='add'>+	priv-&gt;ndev = ndev;</div><div class='add'>+</div><div class='add'>+	can_clk = nct6694_canfd_get_clock(priv);</div><div class='add'>+	if (can_clk &lt; 0) {</div><div class='add'>+		ret = dev_err_probe(&amp;pdev-&gt;dev, can_clk,</div><div class='add'>+				    "Failed to get clock\n");</div><div class='add'>+		goto free_candev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	INIT_WORK(&amp;priv-&gt;tx_work, nct6694_canfd_tx_work);</div><div class='add'>+</div><div class='add'>+	priv-&gt;can.clock.freq = can_clk;</div><div class='add'>+	priv-&gt;can.bittiming_const = &amp;nct6694_canfd_bittiming_nominal_const;</div><div class='add'>+	priv-&gt;can.fd.data_bittiming_const = &amp;nct6694_canfd_bittiming_data_const;</div><div class='add'>+	priv-&gt;can.do_set_mode = nct6694_canfd_set_mode;</div><div class='add'>+	priv-&gt;can.do_get_berr_counter = nct6694_canfd_get_berr_counter;</div><div class='add'>+	priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK |</div><div class='add'>+		CAN_CTRLMODE_LISTENONLY | CAN_CTRLMODE_BERR_REPORTING |</div><div class='add'>+		CAN_CTRLMODE_FD_NON_ISO;</div><div class='add'>+</div><div class='add'>+	ret = can_set_static_ctrlmode(ndev, CAN_CTRLMODE_FD);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto free_candev;</div><div class='add'>+</div><div class='add'>+	ret = can_rx_offload_add_manual(ndev, &amp;priv-&gt;offload,</div><div class='add'>+					NCT6694_NAPI_WEIGHT);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err_probe(&amp;pdev-&gt;dev, ret, "Failed to add rx_offload\n");</div><div class='add'>+		goto free_candev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, priv);</div><div class='add'>+	SET_NETDEV_DEV(priv-&gt;ndev, &amp;pdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	ret = register_candev(priv-&gt;ndev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto rx_offload_del;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+rx_offload_del:</div><div class='add'>+	can_rx_offload_del(&amp;priv-&gt;offload);</div><div class='add'>+free_candev:</div><div class='add'>+	free_candev(ndev);</div><div class='add'>+dispose_irq:</div><div class='add'>+	irq_dispose_mapping(irq);</div><div class='add'>+free_ida:</div><div class='add'>+	ida_free(&amp;nct6694-&gt;canfd_ida, port);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void nct6694_canfd_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct nct6694_canfd_priv *priv = platform_get_drvdata(pdev);</div><div class='add'>+	struct nct6694 *nct6694 = priv-&gt;nct6694;</div><div class='add'>+	struct net_device *ndev = priv-&gt;ndev;</div><div class='add'>+	int port = ndev-&gt;dev_port;</div><div class='add'>+	int irq = ndev-&gt;irq;</div><div class='add'>+</div><div class='add'>+	unregister_candev(ndev);</div><div class='add'>+	can_rx_offload_del(&amp;priv-&gt;offload);</div><div class='add'>+	free_candev(ndev);</div><div class='add'>+	irq_dispose_mapping(irq);</div><div class='add'>+	ida_free(&amp;nct6694-&gt;canfd_ida, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver nct6694_canfd_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name	= DEVICE_NAME,</div><div class='add'>+	},</div><div class='add'>+	.probe		= nct6694_canfd_probe,</div><div class='add'>+	.remove		= nct6694_canfd_remove,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_platform_driver(nct6694_canfd_driver);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("USB-CAN FD driver for NCT6694");</div><div class='add'>+MODULE_AUTHOR("Ming Yu &lt;tmyu0@nuvoton.com&gt;");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/can/usb/peak_usb/Makefile b/drivers/net/can/usb/peak_usb/Makefile<br/>index 1839e9ca62e7..80789f91e300 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/peak_usb/Makefile?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/peak_usb/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/peak_usb/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/peak_usb/Makefile</a></div><div class='hunk'>@@ -1,2 +1,3 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> obj-$(CONFIG_CAN_PEAK_USB) += peak_usb.o</div><div class='ctx'> peak_usb-y = pcan_usb_core.o pcan_usb.o pcan_usb_pro.o pcan_usb_fd.o</div><div class='head'>diff --git a/drivers/net/can/usb/peak_usb/pcan_ucan.h b/drivers/net/can/usb/peak_usb/pcan_ucan.h<br/>deleted file mode 100644<br/>index e8fc4952c6b0..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/peak_usb/pcan_ucan.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/peak_usb/pcan_ucan.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,223 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * CAN driver for PEAK System micro-CAN based adapters</div><div class='del'>- *</div><div class='del'>- * Copyright (C) 2003-2011 PEAK System-Technik GmbH</div><div class='del'>- * Copyright (C) 2011-2013 Stephane Grosjean &lt;s.grosjean@peak-system.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms of the GNU General Public License as published</div><div class='del'>- * by the Free Software Foundation; version 2 of the License.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- */</div><div class='del'>-#ifndef PUCAN_H</div><div class='del'>-#define PUCAN_H</div><div class='del'>-</div><div class='del'>-/* uCAN commands opcodes list (low-order 10 bits) */</div><div class='del'>-#define PUCAN_CMD_NOP			0x000</div><div class='del'>-#define PUCAN_CMD_RESET_MODE		0x001</div><div class='del'>-#define PUCAN_CMD_NORMAL_MODE		0x002</div><div class='del'>-#define PUCAN_CMD_LISTEN_ONLY_MODE	0x003</div><div class='del'>-#define PUCAN_CMD_TIMING_SLOW		0x004</div><div class='del'>-#define PUCAN_CMD_TIMING_FAST		0x005</div><div class='del'>-#define PUCAN_CMD_FILTER_STD		0x008</div><div class='del'>-#define PUCAN_CMD_TX_ABORT		0x009</div><div class='del'>-#define PUCAN_CMD_WR_ERR_CNT		0x00a</div><div class='del'>-#define PUCAN_CMD_SET_EN_OPTION		0x00b</div><div class='del'>-#define PUCAN_CMD_CLR_DIS_OPTION	0x00c</div><div class='del'>-#define PUCAN_CMD_END_OF_COLLECTION	0x3ff</div><div class='del'>-</div><div class='del'>-/* uCAN received messages list */</div><div class='del'>-#define PUCAN_MSG_CAN_RX		0x0001</div><div class='del'>-#define PUCAN_MSG_ERROR			0x0002</div><div class='del'>-#define PUCAN_MSG_STATUS		0x0003</div><div class='del'>-#define PUCAN_MSG_BUSLOAD		0x0004</div><div class='del'>-#define PUCAN_MSG_CAN_TX		0x1000</div><div class='del'>-</div><div class='del'>-/* uCAN command common header */</div><div class='del'>-struct __packed pucan_command {</div><div class='del'>-	__le16	opcode_channel;</div><div class='del'>-	u16	args[3];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* uCAN TIMING_SLOW command fields */</div><div class='del'>-#define PUCAN_TSLOW_SJW_T(s, t)		(((s) &amp; 0xf) | ((!!(t)) &lt;&lt; 7))</div><div class='del'>-#define PUCAN_TSLOW_TSEG2(t)		((t) &amp; 0xf)</div><div class='del'>-#define PUCAN_TSLOW_TSEG1(t)		((t) &amp; 0x3f)</div><div class='del'>-#define PUCAN_TSLOW_BRP(b)		((b) &amp; 0x3ff)</div><div class='del'>-</div><div class='del'>-struct __packed pucan_timing_slow {</div><div class='del'>-	__le16	opcode_channel;</div><div class='del'>-</div><div class='del'>-	u8	ewl;		/* Error Warning limit */</div><div class='del'>-	u8	sjw_t;		/* Sync Jump Width + Triple sampling */</div><div class='del'>-	u8	tseg2;		/* Timing SEGment 2 */</div><div class='del'>-	u8	tseg1;		/* Timing SEGment 1 */</div><div class='del'>-</div><div class='del'>-	__le16	brp;		/* BaudRate Prescaler */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* uCAN TIMING_FAST command fields */</div><div class='del'>-#define PUCAN_TFAST_SJW(s)		((s) &amp; 0x3)</div><div class='del'>-#define PUCAN_TFAST_TSEG2(t)		((t) &amp; 0x7)</div><div class='del'>-#define PUCAN_TFAST_TSEG1(t)		((t) &amp; 0xf)</div><div class='del'>-#define PUCAN_TFAST_BRP(b)		((b) &amp; 0x3ff)</div><div class='del'>-</div><div class='del'>-struct __packed pucan_timing_fast {</div><div class='del'>-	__le16	opcode_channel;</div><div class='del'>-</div><div class='del'>-	u8	unused;</div><div class='del'>-	u8	sjw;		/* Sync Jump Width */</div><div class='del'>-	u8	tseg2;		/* Timing SEGment 2 */</div><div class='del'>-	u8	tseg1;		/* Timing SEGment 1 */</div><div class='del'>-</div><div class='del'>-	__le16	brp;		/* BaudRate Prescaler */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* uCAN FILTER_STD command fields */</div><div class='del'>-#define PUCAN_FLTSTD_ROW_IDX_BITS	6</div><div class='del'>-</div><div class='del'>-struct __packed pucan_filter_std {</div><div class='del'>-	__le16	opcode_channel;</div><div class='del'>-</div><div class='del'>-	__le16	idx;</div><div class='del'>-	__le32	mask;		/* CAN-ID bitmask in idx range */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* uCAN WR_ERR_CNT command fields */</div><div class='del'>-#define PUCAN_WRERRCNT_TE		0x4000	/* Tx error cntr write Enable */</div><div class='del'>-#define PUCAN_WRERRCNT_RE		0x8000	/* Rx error cntr write Enable */</div><div class='del'>-</div><div class='del'>-struct __packed pucan_wr_err_cnt {</div><div class='del'>-	__le16	opcode_channel;</div><div class='del'>-</div><div class='del'>-	__le16	sel_mask;</div><div class='del'>-	u8	tx_counter;	/* Tx error counter new value */</div><div class='del'>-	u8	rx_counter;	/* Rx error counter new value */</div><div class='del'>-</div><div class='del'>-	u16	unused;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* uCAN SET_EN/CLR_DIS _OPTION command fields */</div><div class='del'>-#define PUCAN_OPTION_ERROR		0x0001</div><div class='del'>-#define PUCAN_OPTION_BUSLOAD		0x0002</div><div class='del'>-#define PUCAN_OPTION_CANDFDISO		0x0004</div><div class='del'>-</div><div class='del'>-struct __packed pucan_options {</div><div class='del'>-	__le16	opcode_channel;</div><div class='del'>-</div><div class='del'>-	__le16	options;</div><div class='del'>-	u32	unused;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* uCAN received messages global format */</div><div class='del'>-struct __packed pucan_msg {</div><div class='del'>-	__le16	size;</div><div class='del'>-	__le16	type;</div><div class='del'>-	__le32	ts_low;</div><div class='del'>-	__le32	ts_high;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* uCAN flags for CAN/CANFD messages */</div><div class='del'>-#define PUCAN_MSG_SELF_RECEIVE		0x80</div><div class='del'>-#define PUCAN_MSG_ERROR_STATE_IND	0x40	/* error state indicator */</div><div class='del'>-#define PUCAN_MSG_BITRATE_SWITCH	0x20	/* bitrate switch */</div><div class='del'>-#define PUCAN_MSG_EXT_DATA_LEN		0x10	/* extended data length */</div><div class='del'>-#define PUCAN_MSG_SINGLE_SHOT		0x08</div><div class='del'>-#define PUCAN_MSG_LOOPED_BACK		0x04</div><div class='del'>-#define PUCAN_MSG_EXT_ID		0x02</div><div class='del'>-#define PUCAN_MSG_RTR			0x01</div><div class='del'>-</div><div class='del'>-struct __packed pucan_rx_msg {</div><div class='del'>-	__le16	size;</div><div class='del'>-	__le16	type;</div><div class='del'>-	__le32	ts_low;</div><div class='del'>-	__le32	ts_high;</div><div class='del'>-	__le32	tag_low;</div><div class='del'>-	__le32	tag_high;</div><div class='del'>-	u8	channel_dlc;</div><div class='del'>-	u8	client;</div><div class='del'>-	__le16	flags;</div><div class='del'>-	__le32	can_id;</div><div class='del'>-	u8	d[0];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* uCAN error types */</div><div class='del'>-#define PUCAN_ERMSG_BIT_ERROR		0</div><div class='del'>-#define PUCAN_ERMSG_FORM_ERROR		1</div><div class='del'>-#define PUCAN_ERMSG_STUFF_ERROR		2</div><div class='del'>-#define PUCAN_ERMSG_OTHER_ERROR		3</div><div class='del'>-#define PUCAN_ERMSG_ERR_CNT_DEC		4</div><div class='del'>-</div><div class='del'>-struct __packed pucan_error_msg {</div><div class='del'>-	__le16	size;</div><div class='del'>-	__le16	type;</div><div class='del'>-	__le32	ts_low;</div><div class='del'>-	__le32	ts_high;</div><div class='del'>-	u8	channel_type_d;</div><div class='del'>-	u8	code_g;</div><div class='del'>-	u8	tx_err_cnt;</div><div class='del'>-	u8	rx_err_cnt;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define PUCAN_BUS_PASSIVE		0x20</div><div class='del'>-#define PUCAN_BUS_WARNING		0x40</div><div class='del'>-#define PUCAN_BUS_BUSOFF		0x80</div><div class='del'>-</div><div class='del'>-struct __packed pucan_status_msg {</div><div class='del'>-	__le16	size;</div><div class='del'>-	__le16	type;</div><div class='del'>-	__le32	ts_low;</div><div class='del'>-	__le32	ts_high;</div><div class='del'>-	u8	channel_p_w_b;</div><div class='del'>-	u8	unused[3];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* uCAN transmitted message format */</div><div class='del'>-#define PUCAN_MSG_CHANNEL_DLC(c, d)	(((c) &amp; 0xf) | ((d) &lt;&lt; 4))</div><div class='del'>-</div><div class='del'>-struct __packed pucan_tx_msg {</div><div class='del'>-	__le16	size;</div><div class='del'>-	__le16	type;</div><div class='del'>-	__le32	tag_low;</div><div class='del'>-	__le32	tag_high;</div><div class='del'>-	u8	channel_dlc;</div><div class='del'>-	u8	client;</div><div class='del'>-	__le16	flags;</div><div class='del'>-	__le32	can_id;</div><div class='del'>-	u8	d[0];</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* build the cmd opcode_channel field with respect to the correct endianness */</div><div class='del'>-static inline __le16 pucan_cmd_opcode_channel(struct peak_usb_device *dev,</div><div class='del'>-					      int opcode)</div><div class='del'>-{</div><div class='del'>-	return cpu_to_le16(((dev-&gt;ctrl_idx) &lt;&lt; 12) | ((opcode) &amp; 0x3ff));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* return the channel number part from any received message channel_dlc field */</div><div class='del'>-static inline int pucan_msg_get_channel(struct pucan_rx_msg *rm)</div><div class='del'>-{</div><div class='del'>-	return rm-&gt;channel_dlc &amp; 0xf;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* return the dlc value from any received message channel_dlc field */</div><div class='del'>-static inline int pucan_msg_get_dlc(struct pucan_rx_msg *rm)</div><div class='del'>-{</div><div class='del'>-	return rm-&gt;channel_dlc &gt;&gt; 4;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int pucan_ermsg_get_channel(struct pucan_error_msg *em)</div><div class='del'>-{</div><div class='del'>-	return em-&gt;channel_type_d &amp; 0x0f;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline int pucan_stmsg_get_channel(struct pucan_status_msg *sm)</div><div class='del'>-{</div><div class='del'>-	return sm-&gt;channel_p_w_b &amp; 0x0f;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/drivers/net/can/usb/peak_usb/pcan_usb.c b/drivers/net/can/usb/peak_usb/pcan_usb.c<br/>index 6b94007ae052..9278a1522aae 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/peak_usb/pcan_usb.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/peak_usb/pcan_usb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/peak_usb/pcan_usb.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/peak_usb/pcan_usb.c</a></div><div class='hunk'>@@ -1,24 +1,19 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='ctx'>  * CAN driver for PEAK System PCAN-USB adapter</div><div class='ctx'>  * Derived from the PCAN project file driver/src/pcan_usb.c</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2003-2010 PEAK System-Technik GmbH</div><div class='del'>- * Copyright (C) 2011-2012 Stephane Grosjean &lt;s.grosjean@peak-system.com&gt;</div><div class='add'>+ * Copyright (C) 2003-2025 PEAK System-Technik GmbH</div><div class='add'>+ * Author: Stéphane Grosjean &lt;stephane.grosjean@hms-networks.com&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * Many thanks to Klaus Hitschler &lt;klaus.hitschler@gmx.de&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms of the GNU General Public License as published</div><div class='del'>- * by the Free Software Foundation; version 2 of the License.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='ctx'>  */</div><div class='add'>+#include &lt;linux/unaligned.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/usb.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/can.h&gt;</div><div class='ctx'> #include &lt;linux/can/dev.h&gt;</div><div class='hunk'>@@ -26,8 +21,6 @@</div><div class='ctx'> </div><div class='ctx'> #include "pcan_usb_core.h"</div><div class='ctx'> </div><div class='del'>-MODULE_SUPPORTED_DEVICE("PEAK-System PCAN-USB adapter");</div><div class='del'>-</div><div class='ctx'> /* PCAN-USB Endpoints */</div><div class='ctx'> #define PCAN_USB_EP_CMDOUT		1</div><div class='ctx'> #define PCAN_USB_EP_CMDIN		(PCAN_USB_EP_CMDOUT | USB_DIR_IN)</div><div class='hunk'>@@ -42,6 +35,24 @@ MODULE_SUPPORTED_DEVICE("PEAK-System PCAN-USB adapter");</div><div class='ctx'> #define PCAN_USB_CMD_LEN		(PCAN_USB_CMD_ARGS + \</div><div class='ctx'> 					 PCAN_USB_CMD_ARGS_LEN)</div><div class='ctx'> </div><div class='add'>+/* PCAN-USB commands */</div><div class='add'>+#define PCAN_USB_CMD_BITRATE	1</div><div class='add'>+#define PCAN_USB_CMD_SET_BUS	3</div><div class='add'>+#define PCAN_USB_CMD_DEVID	4</div><div class='add'>+#define PCAN_USB_CMD_SN		6</div><div class='add'>+#define PCAN_USB_CMD_REGISTER	9</div><div class='add'>+#define PCAN_USB_CMD_EXT_VCC	10</div><div class='add'>+#define PCAN_USB_CMD_ERR_FR	11</div><div class='add'>+#define PCAN_USB_CMD_LED	12</div><div class='add'>+</div><div class='add'>+/* PCAN_USB_CMD_SET_BUS number arg */</div><div class='add'>+#define PCAN_USB_BUS_XCVER		2</div><div class='add'>+#define PCAN_USB_BUS_SILENT_MODE	3</div><div class='add'>+</div><div class='add'>+/* PCAN_USB_CMD_xxx functions */</div><div class='add'>+#define PCAN_USB_GET		1</div><div class='add'>+#define PCAN_USB_SET		2</div><div class='add'>+</div><div class='ctx'> /* PCAN-USB command timeout (ms.) */</div><div class='ctx'> #define PCAN_USB_COMMAND_TIMEOUT	1000</div><div class='ctx'> </div><div class='hunk'>@@ -54,6 +65,8 @@ MODULE_SUPPORTED_DEVICE("PEAK-System PCAN-USB adapter");</div><div class='ctx'> </div><div class='ctx'> #define PCAN_USB_MSG_HEADER_LEN		2</div><div class='ctx'> </div><div class='add'>+#define PCAN_USB_MSG_TX_CAN		2	/* Tx msg is a CAN frame */</div><div class='add'>+</div><div class='ctx'> /* PCAN-USB adapter internal clock (MHz) */</div><div class='ctx'> #define PCAN_USB_CRYSTAL_HZ		16000000</div><div class='ctx'> </div><div class='hunk'>@@ -64,6 +77,10 @@ MODULE_SUPPORTED_DEVICE("PEAK-System PCAN-USB adapter");</div><div class='ctx'> #define PCAN_USB_STATUSLEN_RTR		(1 &lt;&lt; 4)</div><div class='ctx'> #define PCAN_USB_STATUSLEN_DLC		(0xf)</div><div class='ctx'> </div><div class='add'>+/* PCAN-USB 4.1 CAN Id tx extended flags */</div><div class='add'>+#define PCAN_USB_TX_SRR			0x01	/* SJA1000 SRR command */</div><div class='add'>+#define PCAN_USB_TX_AT			0x02	/* SJA1000 AT command */</div><div class='add'>+</div><div class='ctx'> /* PCAN-USB error flags */</div><div class='ctx'> #define PCAN_USB_ERROR_TXFULL		0x01</div><div class='ctx'> #define PCAN_USB_ERROR_RXQOVR		0x02</div><div class='hunk'>@@ -74,6 +91,10 @@ MODULE_SUPPORTED_DEVICE("PEAK-System PCAN-USB adapter");</div><div class='ctx'> #define PCAN_USB_ERROR_QOVR		0x40</div><div class='ctx'> #define PCAN_USB_ERROR_TXQFULL		0x80</div><div class='ctx'> </div><div class='add'>+#define PCAN_USB_ERROR_BUS		(PCAN_USB_ERROR_BUS_LIGHT | \</div><div class='add'>+					 PCAN_USB_ERROR_BUS_HEAVY | \</div><div class='add'>+					 PCAN_USB_ERROR_BUS_OFF)</div><div class='add'>+</div><div class='ctx'> /* SJA1000 modes */</div><div class='ctx'> #define SJA1000_MODE_NORMAL		0x00</div><div class='ctx'> #define SJA1000_MODE_INIT		0x01</div><div class='hunk'>@@ -93,11 +114,26 @@ MODULE_SUPPORTED_DEVICE("PEAK-System PCAN-USB adapter");</div><div class='ctx'> #define PCAN_USB_REC_TS			4</div><div class='ctx'> #define PCAN_USB_REC_BUSEVT		5</div><div class='ctx'> </div><div class='add'>+/* CAN bus events notifications selection mask */</div><div class='add'>+#define PCAN_USB_ERR_RXERR		0x02	/* ask for rxerr counter */</div><div class='add'>+#define PCAN_USB_ERR_TXERR		0x04	/* ask for txerr counter */</div><div class='add'>+</div><div class='add'>+/* This mask generates an usb packet each time the state of the bus changes.</div><div class='add'>+ * In other words, its interest is to know which side among rx and tx is</div><div class='add'>+ * responsible of the change of the bus state.</div><div class='add'>+ */</div><div class='add'>+#define PCAN_USB_BERR_MASK	(PCAN_USB_ERR_RXERR | PCAN_USB_ERR_TXERR)</div><div class='add'>+</div><div class='add'>+/* identify bus event packets with rx/tx error counters */</div><div class='add'>+#define PCAN_USB_ERR_CNT_DEC		0x00	/* counters are decreasing */</div><div class='add'>+#define PCAN_USB_ERR_CNT_INC		0x80	/* counters are increasing */</div><div class='add'>+</div><div class='ctx'> /* private to PCAN-USB adapter */</div><div class='ctx'> struct pcan_usb {</div><div class='ctx'> 	struct peak_usb_device dev;</div><div class='ctx'> 	struct peak_time_ref time_ref;</div><div class='ctx'> 	struct timer_list restart_timer;</div><div class='add'>+	struct can_berr_counter bec;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* incoming message context for decoding */</div><div class='hunk'>@@ -108,7 +144,7 @@ struct pcan_usb_msg_context {</div><div class='ctx'> 	u8 *end;</div><div class='ctx'> 	u8 rec_cnt;</div><div class='ctx'> 	u8 rec_idx;</div><div class='del'>-	u8 rec_data_idx;</div><div class='add'>+	u8 rec_ts_idx;</div><div class='ctx'> 	struct net_device *netdev;</div><div class='ctx'> 	struct pcan_usb *pdev;</div><div class='ctx'> };</div><div class='hunk'>@@ -180,7 +216,8 @@ static int pcan_usb_set_sja1000(struct peak_usb_device *dev, u8 mode)</div><div class='ctx'> 		[1] = mode,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	return pcan_usb_send_cmd(dev, 9, 2, args);</div><div class='add'>+	return pcan_usb_send_cmd(dev, PCAN_USB_CMD_REGISTER, PCAN_USB_SET,</div><div class='add'>+				 args);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int pcan_usb_set_bus(struct peak_usb_device *dev, u8 onoff)</div><div class='hunk'>@@ -189,7 +226,8 @@ static int pcan_usb_set_bus(struct peak_usb_device *dev, u8 onoff)</div><div class='ctx'> 		[0] = !!onoff,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	return pcan_usb_send_cmd(dev, 3, 2, args);</div><div class='add'>+	return pcan_usb_send_cmd(dev, PCAN_USB_CMD_SET_BUS, PCAN_USB_BUS_XCVER,</div><div class='add'>+				 args);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int pcan_usb_set_silent(struct peak_usb_device *dev, u8 onoff)</div><div class='hunk'>@@ -198,7 +236,18 @@ static int pcan_usb_set_silent(struct peak_usb_device *dev, u8 onoff)</div><div class='ctx'> 		[0] = !!onoff,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	return pcan_usb_send_cmd(dev, 3, 3, args);</div><div class='add'>+	return pcan_usb_send_cmd(dev, PCAN_USB_CMD_SET_BUS,</div><div class='add'>+				 PCAN_USB_BUS_SILENT_MODE, args);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* send the cmd to be notified from bus errors */</div><div class='add'>+static int pcan_usb_set_err_frame(struct peak_usb_device *dev, u8 err_mask)</div><div class='add'>+{</div><div class='add'>+	u8 args[PCAN_USB_CMD_ARGS_LEN] = {</div><div class='add'>+		[0] = err_mask,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return pcan_usb_send_cmd(dev, PCAN_USB_CMD_ERR_FR, PCAN_USB_SET, args);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int pcan_usb_set_ext_vcc(struct peak_usb_device *dev, u8 onoff)</div><div class='hunk'>@@ -207,7 +256,16 @@ static int pcan_usb_set_ext_vcc(struct peak_usb_device *dev, u8 onoff)</div><div class='ctx'> 		[0] = !!onoff,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	return pcan_usb_send_cmd(dev, 10, 2, args);</div><div class='add'>+	return pcan_usb_send_cmd(dev, PCAN_USB_CMD_EXT_VCC, PCAN_USB_SET, args);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pcan_usb_set_led(struct peak_usb_device *dev, u8 onoff)</div><div class='add'>+{</div><div class='add'>+	u8 args[PCAN_USB_CMD_ARGS_LEN] = {</div><div class='add'>+		[0] = !!onoff,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return pcan_usb_send_cmd(dev, PCAN_USB_CMD_LED, PCAN_USB_SET, args);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -231,7 +289,7 @@ static int pcan_usb_set_bittiming(struct peak_usb_device *dev,</div><div class='ctx'> 	args[0] = btr1;</div><div class='ctx'> 	args[1] = btr0;</div><div class='ctx'> </div><div class='del'>-	return pcan_usb_send_cmd(dev, 1, 2, args);</div><div class='add'>+	return pcan_usb_send_cmd(dev, PCAN_USB_CMD_BITRATE, PCAN_USB_SET, args);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -259,10 +317,13 @@ static int pcan_usb_write_mode(struct peak_usb_device *dev, u8 onoff)</div><div class='ctx'> /*</div><div class='ctx'>  * handle end of waiting for the device to reset</div><div class='ctx'>  */</div><div class='del'>-static void pcan_usb_restart(unsigned long arg)</div><div class='add'>+static void pcan_usb_restart(struct timer_list *t)</div><div class='ctx'> {</div><div class='add'>+	struct pcan_usb *pdev = timer_container_of(pdev, t, restart_timer);</div><div class='add'>+	struct peak_usb_device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+</div><div class='ctx'> 	/* notify candev and netdev */</div><div class='del'>-	peak_usb_restart_complete((struct peak_usb_device *)arg);</div><div class='add'>+	peak_usb_restart_complete(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -312,49 +373,60 @@ static int pcan_usb_get_serial(struct peak_usb_device *dev, u32 *serial_number)</div><div class='ctx'> 	u8 args[PCAN_USB_CMD_ARGS_LEN];</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = pcan_usb_wait_rsp(dev, 6, 1, args);</div><div class='del'>-	if (err) {</div><div class='del'>-		netdev_err(dev-&gt;netdev, "getting serial failure: %d\n", err);</div><div class='del'>-	} else if (serial_number) {</div><div class='del'>-		__le32 tmp32;</div><div class='del'>-</div><div class='del'>-		memcpy(&amp;tmp32, args, 4);</div><div class='del'>-		*serial_number = le32_to_cpu(tmp32);</div><div class='del'>-	}</div><div class='add'>+	err = pcan_usb_wait_rsp(dev, PCAN_USB_CMD_SN, PCAN_USB_GET, args);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+	*serial_number = le32_to_cpup((__le32 *)args);</div><div class='ctx'> </div><div class='del'>-	return err;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * read device id from device</div><div class='add'>+ * read can channel id from device</div><div class='ctx'>  */</div><div class='del'>-static int pcan_usb_get_device_id(struct peak_usb_device *dev, u32 *device_id)</div><div class='add'>+static int pcan_usb_get_can_channel_id(struct peak_usb_device *dev, u32 *can_ch_id)</div><div class='ctx'> {</div><div class='ctx'> 	u8 args[PCAN_USB_CMD_ARGS_LEN];</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	err = pcan_usb_wait_rsp(dev, 4, 1, args);</div><div class='add'>+	err = pcan_usb_wait_rsp(dev, PCAN_USB_CMD_DEVID, PCAN_USB_GET, args);</div><div class='ctx'> 	if (err)</div><div class='del'>-		netdev_err(dev-&gt;netdev, "getting device id failure: %d\n", err);</div><div class='del'>-	else if (device_id)</div><div class='del'>-		*device_id = args[0];</div><div class='add'>+		netdev_err(dev-&gt;netdev, "getting can channel id failure: %d\n", err);</div><div class='add'>+</div><div class='add'>+	else</div><div class='add'>+		*can_ch_id = args[0];</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* set a new CAN channel id in the flash memory of the device */</div><div class='add'>+static int pcan_usb_set_can_channel_id(struct peak_usb_device *dev, u32 can_ch_id)</div><div class='add'>+{</div><div class='add'>+	u8 args[PCAN_USB_CMD_ARGS_LEN];</div><div class='add'>+</div><div class='add'>+	/* this kind of device supports 8-bit values only */</div><div class='add'>+	if (can_ch_id &gt; U8_MAX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* during the flash process the device disconnects during ~1.25 s.:</div><div class='add'>+	 * prohibit access when interface is UP</div><div class='add'>+	 */</div><div class='add'>+	if (dev-&gt;netdev-&gt;flags &amp; IFF_UP)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	args[0] = can_ch_id;</div><div class='add'>+	return pcan_usb_send_cmd(dev, PCAN_USB_CMD_DEVID, PCAN_USB_SET, args);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * update current time ref with received timestamp</div><div class='ctx'>  */</div><div class='ctx'> static int pcan_usb_update_ts(struct pcan_usb_msg_context *mc)</div><div class='ctx'> {</div><div class='del'>-	__le16 tmp16;</div><div class='del'>-</div><div class='del'>-	if ((mc-&gt;ptr+2) &gt; mc-&gt;end)</div><div class='add'>+	if ((mc-&gt;ptr + 2) &gt; mc-&gt;end)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	memcpy(&amp;tmp16, mc-&gt;ptr, 2);</div><div class='del'>-</div><div class='del'>-	mc-&gt;ts16 = le16_to_cpu(tmp16);</div><div class='add'>+	mc-&gt;ts16 = get_unaligned_le16(mc-&gt;ptr);</div><div class='ctx'> </div><div class='ctx'> 	if (mc-&gt;rec_idx &gt; 0)</div><div class='ctx'> 		peak_usb_update_ts_now(&amp;mc-&gt;pdev-&gt;time_ref, mc-&gt;ts16);</div><div class='hunk'>@@ -371,16 +443,13 @@ static int pcan_usb_decode_ts(struct pcan_usb_msg_context *mc, u8 first_packet)</div><div class='ctx'> {</div><div class='ctx'> 	/* only 1st packet supplies a word timestamp */</div><div class='ctx'> 	if (first_packet) {</div><div class='del'>-		__le16 tmp16;</div><div class='del'>-</div><div class='ctx'> 		if ((mc-&gt;ptr + 2) &gt; mc-&gt;end)</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> </div><div class='del'>-		memcpy(&amp;tmp16, mc-&gt;ptr, 2);</div><div class='del'>-		mc-&gt;ptr += 2;</div><div class='del'>-</div><div class='del'>-		mc-&gt;ts16 = le16_to_cpu(tmp16);</div><div class='add'>+		mc-&gt;ts16 = get_unaligned_le16(mc-&gt;ptr);</div><div class='ctx'> 		mc-&gt;prev_ts8 = mc-&gt;ts16 &amp; 0x00ff;</div><div class='add'>+</div><div class='add'>+		mc-&gt;ptr += 2;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		u8 ts8;</div><div class='ctx'> </div><div class='hunk'>@@ -405,131 +474,101 @@ static int pcan_usb_decode_error(struct pcan_usb_msg_context *mc, u8 n,</div><div class='ctx'> {</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	struct can_frame *cf;</div><div class='del'>-	struct timeval tv;</div><div class='del'>-	enum can_state new_state;</div><div class='add'>+	enum can_state new_state = CAN_STATE_ERROR_ACTIVE;</div><div class='ctx'> </div><div class='ctx'> 	/* ignore this error until 1st ts received */</div><div class='ctx'> 	if (n == PCAN_USB_ERROR_QOVR)</div><div class='ctx'> 		if (!mc-&gt;pdev-&gt;time_ref.tick_count)</div><div class='ctx'> 			return 0;</div><div class='ctx'> </div><div class='del'>-	new_state = mc-&gt;pdev-&gt;dev.can.state;</div><div class='add'>+	/* allocate an skb to store the error frame */</div><div class='add'>+	skb = alloc_can_err_skb(mc-&gt;netdev, &amp;cf);</div><div class='ctx'> </div><div class='del'>-	switch (mc-&gt;pdev-&gt;dev.can.state) {</div><div class='del'>-	case CAN_STATE_ERROR_ACTIVE:</div><div class='del'>-		if (n &amp; PCAN_USB_ERROR_BUS_LIGHT) {</div><div class='del'>-			new_state = CAN_STATE_ERROR_WARNING;</div><div class='del'>-			break;</div><div class='add'>+	if (n &amp; PCAN_USB_ERROR_RXQOVR) {</div><div class='add'>+		/* data overrun interrupt */</div><div class='add'>+		netdev_dbg(mc-&gt;netdev, "data overrun interrupt\n");</div><div class='add'>+		mc-&gt;netdev-&gt;stats.rx_over_errors++;</div><div class='add'>+		mc-&gt;netdev-&gt;stats.rx_errors++;</div><div class='add'>+		if (cf) {</div><div class='add'>+			cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='add'>+			cf-&gt;data[1] |= CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='ctx'> 		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	case CAN_STATE_ERROR_WARNING:</div><div class='del'>-		if (n &amp; PCAN_USB_ERROR_BUS_HEAVY) {</div><div class='del'>-			new_state = CAN_STATE_ERROR_PASSIVE;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		if (n &amp; PCAN_USB_ERROR_BUS_OFF) {</div><div class='del'>-			new_state = CAN_STATE_BUS_OFF;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		if (n &amp; (PCAN_USB_ERROR_RXQOVR | PCAN_USB_ERROR_QOVR)) {</div><div class='del'>-			/*</div><div class='del'>-			 * trick to bypass next comparison and process other</div><div class='del'>-			 * errors</div><div class='del'>-			 */</div><div class='del'>-			new_state = CAN_STATE_MAX;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		if ((n &amp; PCAN_USB_ERROR_BUS_LIGHT) == 0) {</div><div class='del'>-			/* no error (back to active state) */</div><div class='del'>-			mc-&gt;pdev-&gt;dev.can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='add'>+	if (n &amp; PCAN_USB_ERROR_TXQFULL)</div><div class='add'>+		netdev_dbg(mc-&gt;netdev, "device Tx queue full)\n");</div><div class='ctx'> </div><div class='del'>-	case CAN_STATE_ERROR_PASSIVE:</div><div class='del'>-		if (n &amp; PCAN_USB_ERROR_BUS_OFF) {</div><div class='del'>-			new_state = CAN_STATE_BUS_OFF;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		if (n &amp; PCAN_USB_ERROR_BUS_LIGHT) {</div><div class='del'>-			new_state = CAN_STATE_ERROR_WARNING;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		if (n &amp; (PCAN_USB_ERROR_RXQOVR | PCAN_USB_ERROR_QOVR)) {</div><div class='del'>-			/*</div><div class='del'>-			 * trick to bypass next comparison and process other</div><div class='del'>-			 * errors</div><div class='del'>-			 */</div><div class='del'>-			new_state = CAN_STATE_MAX;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='add'>+	if (n &amp; PCAN_USB_ERROR_BUS_OFF) {</div><div class='add'>+		new_state = CAN_STATE_BUS_OFF;</div><div class='add'>+	} else if (n &amp; PCAN_USB_ERROR_BUS_HEAVY) {</div><div class='add'>+		new_state = ((mc-&gt;pdev-&gt;bec.txerr &gt;= 128) ||</div><div class='add'>+			     (mc-&gt;pdev-&gt;bec.rxerr &gt;= 128)) ?</div><div class='add'>+				CAN_STATE_ERROR_PASSIVE :</div><div class='add'>+				CAN_STATE_ERROR_WARNING;</div><div class='add'>+	} else {</div><div class='add'>+		new_state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		if ((n &amp; PCAN_USB_ERROR_BUS_HEAVY) == 0) {</div><div class='del'>-			/* no error (back to active state) */</div><div class='del'>-			mc-&gt;pdev-&gt;dev.can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='del'>-			return 0;</div><div class='add'>+	/* handle change of state */</div><div class='add'>+	if (new_state != mc-&gt;pdev-&gt;dev.can.state) {</div><div class='add'>+		enum can_state tx_state =</div><div class='add'>+			(mc-&gt;pdev-&gt;bec.txerr &gt;= mc-&gt;pdev-&gt;bec.rxerr) ?</div><div class='add'>+				new_state : 0;</div><div class='add'>+		enum can_state rx_state =</div><div class='add'>+			(mc-&gt;pdev-&gt;bec.txerr &lt;= mc-&gt;pdev-&gt;bec.rxerr) ?</div><div class='add'>+				new_state : 0;</div><div class='add'>+</div><div class='add'>+		can_change_state(mc-&gt;netdev, cf, tx_state, rx_state);</div><div class='add'>+</div><div class='add'>+		if (new_state == CAN_STATE_BUS_OFF) {</div><div class='add'>+			can_bus_off(mc-&gt;netdev);</div><div class='add'>+		} else if (cf &amp;&amp; (cf-&gt;can_id &amp; CAN_ERR_CRTL)) {</div><div class='add'>+			/* Supply TX/RX error counters in case of</div><div class='add'>+			 * controller error.</div><div class='add'>+			 */</div><div class='add'>+			cf-&gt;can_id = CAN_ERR_CNT;</div><div class='add'>+			cf-&gt;data[6] = mc-&gt;pdev-&gt;bec.txerr;</div><div class='add'>+			cf-&gt;data[7] = mc-&gt;pdev-&gt;bec.rxerr;</div><div class='ctx'> 		}</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		/* do nothing waiting for restart */</div><div class='del'>-		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* donot post any error if current state didn't change */</div><div class='del'>-	if (mc-&gt;pdev-&gt;dev.can.state == new_state)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	/* allocate an skb to store the error frame */</div><div class='del'>-	skb = alloc_can_err_skb(mc-&gt;netdev, &amp;cf);</div><div class='ctx'> 	if (!skb)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	switch (new_state) {</div><div class='del'>-	case CAN_STATE_BUS_OFF:</div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_BUSOFF;</div><div class='del'>-		mc-&gt;pdev-&gt;dev.can.can_stats.bus_off++;</div><div class='del'>-		can_bus_off(mc-&gt;netdev);</div><div class='del'>-		break;</div><div class='add'>+	if (status_len &amp; PCAN_USB_STATUSLEN_TIMESTAMP) {</div><div class='add'>+		struct skb_shared_hwtstamps *hwts = skb_hwtstamps(skb);</div><div class='ctx'> </div><div class='del'>-	case CAN_STATE_ERROR_PASSIVE:</div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='del'>-		cf-&gt;data[1] |= CAN_ERR_CRTL_TX_PASSIVE |</div><div class='del'>-			       CAN_ERR_CRTL_RX_PASSIVE;</div><div class='del'>-		mc-&gt;pdev-&gt;dev.can.can_stats.error_passive++;</div><div class='del'>-		break;</div><div class='add'>+		peak_usb_get_ts_time(&amp;mc-&gt;pdev-&gt;time_ref, mc-&gt;ts16,</div><div class='add'>+				     &amp;hwts-&gt;hwtstamp);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	case CAN_STATE_ERROR_WARNING:</div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='del'>-		cf-&gt;data[1] |= CAN_ERR_CRTL_TX_WARNING |</div><div class='del'>-			       CAN_ERR_CRTL_RX_WARNING;</div><div class='del'>-		mc-&gt;pdev-&gt;dev.can.can_stats.error_warning++;</div><div class='del'>-		break;</div><div class='add'>+	netif_rx(skb);</div><div class='ctx'> </div><div class='del'>-	default:</div><div class='del'>-		/* CAN_STATE_MAX (trick to handle other errors) */</div><div class='del'>-		cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='del'>-		cf-&gt;data[1] |= CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='del'>-		mc-&gt;netdev-&gt;stats.rx_over_errors++;</div><div class='del'>-		mc-&gt;netdev-&gt;stats.rx_errors++;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		new_state = mc-&gt;pdev-&gt;dev.can.state;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+/* decode bus event usb packet: first byte contains rxerr while 2nd one contains</div><div class='add'>+ * txerr.</div><div class='add'>+ */</div><div class='add'>+static int pcan_usb_handle_bus_evt(struct pcan_usb_msg_context *mc, u8 ir)</div><div class='add'>+{</div><div class='add'>+	struct pcan_usb *pdev = mc-&gt;pdev;</div><div class='ctx'> </div><div class='del'>-	mc-&gt;pdev-&gt;dev.can.state = new_state;</div><div class='add'>+	/* according to the content of the packet */</div><div class='add'>+	switch (ir) {</div><div class='add'>+	case PCAN_USB_ERR_CNT_DEC:</div><div class='add'>+	case PCAN_USB_ERR_CNT_INC:</div><div class='ctx'> </div><div class='del'>-	if (status_len &amp; PCAN_USB_STATUSLEN_TIMESTAMP) {</div><div class='del'>-		struct skb_shared_hwtstamps *hwts = skb_hwtstamps(skb);</div><div class='add'>+		/* save rx/tx error counters from in the device context */</div><div class='add'>+		pdev-&gt;bec.rxerr = mc-&gt;ptr[1];</div><div class='add'>+		pdev-&gt;bec.txerr = mc-&gt;ptr[2];</div><div class='add'>+		break;</div><div class='ctx'> </div><div class='del'>-		peak_usb_get_ts_tv(&amp;mc-&gt;pdev-&gt;time_ref, mc-&gt;ts16, &amp;tv);</div><div class='del'>-		hwts-&gt;hwtstamp = timeval_to_ktime(tv);</div><div class='add'>+	default:</div><div class='add'>+		/* reserved */</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mc-&gt;netdev-&gt;stats.rx_packets++;</div><div class='del'>-	mc-&gt;netdev-&gt;stats.rx_bytes += cf-&gt;can_dlc;</div><div class='del'>-	netif_rx(skb);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -552,10 +591,15 @@ static int pcan_usb_decode_status(struct pcan_usb_msg_context *mc,</div><div class='ctx'> 	mc-&gt;ptr += PCAN_USB_CMD_ARGS;</div><div class='ctx'> </div><div class='ctx'> 	if (status_len &amp; PCAN_USB_STATUSLEN_TIMESTAMP) {</div><div class='del'>-		int err = pcan_usb_decode_ts(mc, !mc-&gt;rec_idx);</div><div class='add'>+		int err = pcan_usb_decode_ts(mc, !mc-&gt;rec_ts_idx);</div><div class='ctx'> </div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='add'>+</div><div class='add'>+		/* Next packet in the buffer will have a timestamp on a single</div><div class='add'>+		 * byte</div><div class='add'>+		 */</div><div class='add'>+		mc-&gt;rec_ts_idx++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	switch (f) {</div><div class='hunk'>@@ -582,9 +626,10 @@ static int pcan_usb_decode_status(struct pcan_usb_msg_context *mc,</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case PCAN_USB_REC_BUSEVT:</div><div class='del'>-		/* error frame/bus event */</div><div class='del'>-		if (n &amp; PCAN_USB_ERROR_TXQFULL)</div><div class='del'>-			netdev_dbg(mc-&gt;netdev, "device Tx queue full)\n");</div><div class='add'>+		/* bus event notifications (get rxerr/txerr) */</div><div class='add'>+		err = pcan_usb_handle_bus_evt(mc, n);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		netdev_err(mc-&gt;netdev, "unexpected function %u\n", f);</div><div class='hunk'>@@ -607,41 +652,38 @@ static int pcan_usb_decode_data(struct pcan_usb_msg_context *mc, u8 status_len)</div><div class='ctx'> 	u8 rec_len = status_len &amp; PCAN_USB_STATUSLEN_DLC;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	struct can_frame *cf;</div><div class='del'>-	struct timeval tv;</div><div class='ctx'> 	struct skb_shared_hwtstamps *hwts;</div><div class='add'>+	u32 can_id_flags;</div><div class='ctx'> </div><div class='ctx'> 	skb = alloc_can_skb(mc-&gt;netdev, &amp;cf);</div><div class='ctx'> 	if (!skb)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	if (status_len &amp; PCAN_USB_STATUSLEN_EXT_ID) {</div><div class='del'>-		__le32 tmp32;</div><div class='del'>-</div><div class='ctx'> 		if ((mc-&gt;ptr + 4) &gt; mc-&gt;end)</div><div class='ctx'> 			goto decode_failed;</div><div class='ctx'> </div><div class='del'>-		memcpy(&amp;tmp32, mc-&gt;ptr, 4);</div><div class='add'>+		can_id_flags = get_unaligned_le32(mc-&gt;ptr);</div><div class='add'>+		cf-&gt;can_id = can_id_flags &gt;&gt; 3 | CAN_EFF_FLAG;</div><div class='ctx'> 		mc-&gt;ptr += 4;</div><div class='del'>-</div><div class='del'>-		cf-&gt;can_id = (le32_to_cpu(tmp32) &gt;&gt; 3) | CAN_EFF_FLAG;</div><div class='ctx'> 	} else {</div><div class='del'>-		__le16 tmp16;</div><div class='del'>-</div><div class='ctx'> 		if ((mc-&gt;ptr + 2) &gt; mc-&gt;end)</div><div class='ctx'> 			goto decode_failed;</div><div class='ctx'> </div><div class='del'>-		memcpy(&amp;tmp16, mc-&gt;ptr, 2);</div><div class='add'>+		can_id_flags = get_unaligned_le16(mc-&gt;ptr);</div><div class='add'>+		cf-&gt;can_id = can_id_flags &gt;&gt; 5;</div><div class='ctx'> 		mc-&gt;ptr += 2;</div><div class='del'>-</div><div class='del'>-		cf-&gt;can_id = le16_to_cpu(tmp16) &gt;&gt; 5;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	cf-&gt;can_dlc = get_can_dlc(rec_len);</div><div class='add'>+	can_frame_set_cc_len(cf, rec_len, mc-&gt;pdev-&gt;dev.can.ctrlmode);</div><div class='ctx'> </div><div class='del'>-	/* first data packet timestamp is a word */</div><div class='del'>-	if (pcan_usb_decode_ts(mc, !mc-&gt;rec_data_idx))</div><div class='add'>+	/* Only first packet timestamp is a word */</div><div class='add'>+	if (pcan_usb_decode_ts(mc, !mc-&gt;rec_ts_idx))</div><div class='ctx'> 		goto decode_failed;</div><div class='ctx'> </div><div class='add'>+	/* Next packet in the buffer will have a timestamp on a single byte */</div><div class='add'>+	mc-&gt;rec_ts_idx++;</div><div class='add'>+</div><div class='ctx'> 	/* read data */</div><div class='ctx'> 	memset(cf-&gt;data, 0x0, sizeof(cf-&gt;data));</div><div class='ctx'> 	if (status_len &amp; PCAN_USB_STATUSLEN_RTR) {</div><div class='hunk'>@@ -650,18 +692,22 @@ static int pcan_usb_decode_data(struct pcan_usb_msg_context *mc, u8 status_len)</div><div class='ctx'> 		if ((mc-&gt;ptr + rec_len) &gt; mc-&gt;end)</div><div class='ctx'> 			goto decode_failed;</div><div class='ctx'> </div><div class='del'>-		memcpy(cf-&gt;data, mc-&gt;ptr, cf-&gt;can_dlc);</div><div class='add'>+		memcpy(cf-&gt;data, mc-&gt;ptr, cf-&gt;len);</div><div class='ctx'> 		mc-&gt;ptr += rec_len;</div><div class='add'>+</div><div class='add'>+		/* Ignore next byte (client private id) if SRR bit is set */</div><div class='add'>+		if (can_id_flags &amp; PCAN_USB_TX_SRR)</div><div class='add'>+			mc-&gt;ptr++;</div><div class='add'>+</div><div class='add'>+		/* update statistics */</div><div class='add'>+		mc-&gt;netdev-&gt;stats.rx_bytes += cf-&gt;len;</div><div class='ctx'> 	}</div><div class='add'>+	mc-&gt;netdev-&gt;stats.rx_packets++;</div><div class='ctx'> </div><div class='ctx'> 	/* convert timestamp into kernel time */</div><div class='del'>-	peak_usb_get_ts_tv(&amp;mc-&gt;pdev-&gt;time_ref, mc-&gt;ts16, &amp;tv);</div><div class='ctx'> 	hwts = skb_hwtstamps(skb);</div><div class='del'>-	hwts-&gt;hwtstamp = timeval_to_ktime(tv);</div><div class='add'>+	peak_usb_get_ts_time(&amp;mc-&gt;pdev-&gt;time_ref, mc-&gt;ts16, &amp;hwts-&gt;hwtstamp);</div><div class='ctx'> </div><div class='del'>-	/* update statistics */</div><div class='del'>-	mc-&gt;netdev-&gt;stats.rx_packets++;</div><div class='del'>-	mc-&gt;netdev-&gt;stats.rx_bytes += cf-&gt;can_dlc;</div><div class='ctx'> 	/* push the skb */</div><div class='ctx'> 	netif_rx(skb);</div><div class='ctx'> </div><div class='hunk'>@@ -695,7 +741,6 @@ static int pcan_usb_decode_msg(struct peak_usb_device *dev, u8 *ibuf, u32 lbuf)</div><div class='ctx'> 		/* handle normal can frames here */</div><div class='ctx'> 		} else {</div><div class='ctx'> 			err = pcan_usb_decode_data(&amp;mc, sl);</div><div class='del'>-			mc.rec_data_idx++;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -731,57 +776,103 @@ static int pcan_usb_encode_msg(struct peak_usb_device *dev, struct sk_buff *skb,</div><div class='ctx'> 	struct net_device *netdev = dev-&gt;netdev;</div><div class='ctx'> 	struct net_device_stats *stats = &amp;netdev-&gt;stats;</div><div class='ctx'> 	struct can_frame *cf = (struct can_frame *)skb-&gt;data;</div><div class='add'>+	u32 can_id_flags = cf-&gt;can_id &amp; CAN_ERR_MASK;</div><div class='ctx'> 	u8 *pc;</div><div class='ctx'> </div><div class='del'>-	obuf[0] = 2;</div><div class='del'>-	obuf[1] = 1;</div><div class='add'>+	obuf[0] = PCAN_USB_MSG_TX_CAN;</div><div class='add'>+	obuf[1] = 1;	/* only one CAN frame is stored in the packet */</div><div class='ctx'> </div><div class='ctx'> 	pc = obuf + PCAN_USB_MSG_HEADER_LEN;</div><div class='ctx'> </div><div class='ctx'> 	/* status/len byte */</div><div class='del'>-	*pc = cf-&gt;can_dlc;</div><div class='add'>+	*pc = can_get_cc_dlc(cf, dev-&gt;can.ctrlmode);</div><div class='add'>+</div><div class='ctx'> 	if (cf-&gt;can_id &amp; CAN_RTR_FLAG)</div><div class='ctx'> 		*pc |= PCAN_USB_STATUSLEN_RTR;</div><div class='ctx'> </div><div class='ctx'> 	/* can id */</div><div class='ctx'> 	if (cf-&gt;can_id &amp; CAN_EFF_FLAG) {</div><div class='del'>-		__le32 tmp32 = cpu_to_le32((cf-&gt;can_id &amp; CAN_ERR_MASK) &lt;&lt; 3);</div><div class='del'>-</div><div class='ctx'> 		*pc |= PCAN_USB_STATUSLEN_EXT_ID;</div><div class='del'>-		memcpy(++pc, &amp;tmp32, 4);</div><div class='add'>+		pc++;</div><div class='add'>+</div><div class='add'>+		can_id_flags &lt;&lt;= 3;</div><div class='add'>+</div><div class='add'>+		if (dev-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LOOPBACK)</div><div class='add'>+			can_id_flags |= PCAN_USB_TX_SRR;</div><div class='add'>+</div><div class='add'>+		if (dev-&gt;can.ctrlmode &amp; CAN_CTRLMODE_ONE_SHOT)</div><div class='add'>+			can_id_flags |= PCAN_USB_TX_AT;</div><div class='add'>+</div><div class='add'>+		put_unaligned_le32(can_id_flags, pc);</div><div class='ctx'> 		pc += 4;</div><div class='ctx'> 	} else {</div><div class='del'>-		__le16 tmp16 = cpu_to_le16((cf-&gt;can_id &amp; CAN_ERR_MASK) &lt;&lt; 5);</div><div class='add'>+		pc++;</div><div class='add'>+</div><div class='add'>+		can_id_flags &lt;&lt;= 5;</div><div class='add'>+</div><div class='add'>+		if (dev-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LOOPBACK)</div><div class='add'>+			can_id_flags |= PCAN_USB_TX_SRR;</div><div class='ctx'> </div><div class='del'>-		memcpy(++pc, &amp;tmp16, 2);</div><div class='add'>+		if (dev-&gt;can.ctrlmode &amp; CAN_CTRLMODE_ONE_SHOT)</div><div class='add'>+			can_id_flags |= PCAN_USB_TX_AT;</div><div class='add'>+</div><div class='add'>+		put_unaligned_le16(can_id_flags, pc);</div><div class='ctx'> 		pc += 2;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* can data */</div><div class='ctx'> 	if (!(cf-&gt;can_id &amp; CAN_RTR_FLAG)) {</div><div class='del'>-		memcpy(pc, cf-&gt;data, cf-&gt;can_dlc);</div><div class='del'>-		pc += cf-&gt;can_dlc;</div><div class='add'>+		memcpy(pc, cf-&gt;data, cf-&gt;len);</div><div class='add'>+		pc += cf-&gt;len;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* SRR bit needs a writer id (useless here) */</div><div class='add'>+	if (can_id_flags &amp; PCAN_USB_TX_SRR)</div><div class='add'>+		*pc++ = 0x80;</div><div class='add'>+</div><div class='ctx'> 	obuf[(*size)-1] = (u8)(stats-&gt;tx_packets &amp; 0xff);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* socket callback used to copy berr counters values received through USB */</div><div class='add'>+static int pcan_usb_get_berr_counter(const struct net_device *netdev,</div><div class='add'>+				     struct can_berr_counter *bec)</div><div class='add'>+{</div><div class='add'>+	struct peak_usb_device *dev = netdev_priv(netdev);</div><div class='add'>+	struct pcan_usb *pdev = container_of(dev, struct pcan_usb, dev);</div><div class='add'>+</div><div class='add'>+	*bec = pdev-&gt;bec;</div><div class='add'>+</div><div class='add'>+	/* must return 0 */</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * start interface</div><div class='ctx'>  */</div><div class='ctx'> static int pcan_usb_start(struct peak_usb_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct pcan_usb *pdev = container_of(dev, struct pcan_usb, dev);</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='ctx'> 	/* number of bits used in timestamps read from adapter struct */</div><div class='ctx'> 	peak_usb_init_time_ref(&amp;pdev-&gt;time_ref, &amp;pcan_usb);</div><div class='ctx'> </div><div class='add'>+	pdev-&gt;bec.rxerr = 0;</div><div class='add'>+	pdev-&gt;bec.txerr = 0;</div><div class='add'>+</div><div class='add'>+	/* always ask the device for BERR reporting, to be able to switch from</div><div class='add'>+	 * WARNING to PASSIVE state</div><div class='add'>+	 */</div><div class='add'>+	err = pcan_usb_set_err_frame(dev, PCAN_USB_BERR_MASK);</div><div class='add'>+	if (err)</div><div class='add'>+		netdev_warn(dev-&gt;netdev,</div><div class='add'>+			    "Asking for BERR reporting error %u\n",</div><div class='add'>+			    err);</div><div class='add'>+</div><div class='ctx'> 	/* if revision greater than 3, can put silent mode on/off */</div><div class='ctx'> 	if (dev-&gt;device_rev &gt; 3) {</div><div class='del'>-		int err;</div><div class='del'>-</div><div class='ctx'> 		err = pcan_usb_set_silent(dev,</div><div class='ctx'> 				dev-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LISTENONLY);</div><div class='ctx'> 		if (err)</div><div class='hunk'>@@ -798,9 +889,7 @@ static int pcan_usb_init(struct peak_usb_device *dev)</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	/* initialize a timer needed to wait for hardware restart */</div><div class='del'>-	init_timer(&amp;pdev-&gt;restart_timer);</div><div class='del'>-	pdev-&gt;restart_timer.function = pcan_usb_restart;</div><div class='del'>-	pdev-&gt;restart_timer.data = (unsigned long)dev;</div><div class='add'>+	timer_setup(&amp;pdev-&gt;restart_timer, pcan_usb_restart, 0);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * explicit use of dev_xxx() instead of netdev_xxx() here:</div><div class='hunk'>@@ -820,6 +909,19 @@ static int pcan_usb_init(struct peak_usb_device *dev)</div><div class='ctx'> 		 pcan_usb.name, dev-&gt;device_rev, serial_number,</div><div class='ctx'> 		 pcan_usb.ctrl_count);</div><div class='ctx'> </div><div class='add'>+	/* Since rev 4.1, PCAN-USB is able to make single-shot as well as</div><div class='add'>+	 * looped back frames.</div><div class='add'>+	 */</div><div class='add'>+	if (dev-&gt;device_rev &gt;= 41) {</div><div class='add'>+		struct can_priv *priv = netdev_priv(dev-&gt;netdev);</div><div class='add'>+</div><div class='add'>+		priv-&gt;ctrlmode_supported |= CAN_CTRLMODE_ONE_SHOT |</div><div class='add'>+					    CAN_CTRLMODE_LOOPBACK;</div><div class='add'>+	} else {</div><div class='add'>+		dev_info(dev-&gt;netdev-&gt;dev.parent,</div><div class='add'>+			 "Firmware update available. Please contact support.peak@hms-networks.com\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -851,35 +953,83 @@ static int pcan_usb_probe(struct usb_interface *intf)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int pcan_usb_set_phys_id(struct net_device *netdev,</div><div class='add'>+				enum ethtool_phys_id_state state)</div><div class='add'>+{</div><div class='add'>+	struct peak_usb_device *dev = netdev_priv(netdev);</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	switch (state) {</div><div class='add'>+	case ETHTOOL_ID_ACTIVE:</div><div class='add'>+		/* call ON/OFF twice a second */</div><div class='add'>+		return 2;</div><div class='add'>+</div><div class='add'>+	case ETHTOOL_ID_OFF:</div><div class='add'>+		err = pcan_usb_set_led(dev, 0);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case ETHTOOL_ID_ON:</div><div class='add'>+		fallthrough;</div><div class='add'>+</div><div class='add'>+	case ETHTOOL_ID_INACTIVE:</div><div class='add'>+		/* restore LED default */</div><div class='add'>+		err = pcan_usb_set_led(dev, 1);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This device only handles 8-bit CAN channel id. */</div><div class='add'>+static int pcan_usb_get_eeprom_len(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	return sizeof(u8);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops pcan_usb_ethtool_ops = {</div><div class='add'>+	.set_phys_id = pcan_usb_set_phys_id,</div><div class='add'>+	.get_ts_info = pcan_get_ts_info,</div><div class='add'>+	.get_eeprom_len	= pcan_usb_get_eeprom_len,</div><div class='add'>+	.get_eeprom = peak_usb_get_eeprom,</div><div class='add'>+	.set_eeprom = peak_usb_set_eeprom,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * describe the PCAN-USB adapter</div><div class='ctx'>  */</div><div class='add'>+static const struct can_bittiming_const pcan_usb_const = {</div><div class='add'>+	.name = "pcan_usb",</div><div class='add'>+	.tseg1_min = 1,</div><div class='add'>+	.tseg1_max = 16,</div><div class='add'>+	.tseg2_min = 1,</div><div class='add'>+	.tseg2_max = 8,</div><div class='add'>+	.sjw_max = 4,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 64,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> const struct peak_usb_adapter pcan_usb = {</div><div class='ctx'> 	.name = "PCAN-USB",</div><div class='ctx'> 	.device_id = PCAN_USB_PRODUCT_ID,</div><div class='ctx'> 	.ctrl_count = 1,</div><div class='del'>-	.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES | CAN_CTRLMODE_LISTENONLY,</div><div class='add'>+	.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES | CAN_CTRLMODE_LISTENONLY |</div><div class='add'>+			      CAN_CTRLMODE_CC_LEN8_DLC,</div><div class='ctx'> 	.clock = {</div><div class='del'>-		.freq = PCAN_USB_CRYSTAL_HZ / 2 ,</div><div class='del'>-	},</div><div class='del'>-	.bittiming_const = {</div><div class='del'>-		.name = "pcan_usb",</div><div class='del'>-		.tseg1_min = 1,</div><div class='del'>-		.tseg1_max = 16,</div><div class='del'>-		.tseg2_min = 1,</div><div class='del'>-		.tseg2_max = 8,</div><div class='del'>-		.sjw_max = 4,</div><div class='del'>-		.brp_min = 1,</div><div class='del'>-		.brp_max = 64,</div><div class='del'>-		.brp_inc = 1,</div><div class='add'>+		.freq = PCAN_USB_CRYSTAL_HZ / 2,</div><div class='ctx'> 	},</div><div class='add'>+	.bittiming_const = &amp;pcan_usb_const,</div><div class='ctx'> </div><div class='ctx'> 	/* size of device private data */</div><div class='ctx'> 	.sizeof_dev_private = sizeof(struct pcan_usb),</div><div class='ctx'> </div><div class='add'>+	.ethtool_ops = &amp;pcan_usb_ethtool_ops,</div><div class='add'>+</div><div class='ctx'> 	/* timestamps usage */</div><div class='ctx'> 	.ts_used_bits = 16,</div><div class='del'>-	.ts_period = 24575, /* calibration period in ts. */</div><div class='ctx'> 	.us_per_ts_scale = PCAN_USB_TS_US_PER_TICK, /* us=(ts*scale) */</div><div class='ctx'> 	.us_per_ts_shift = PCAN_USB_TS_DIV_SHIFTER, /*  &gt;&gt; shift     */</div><div class='ctx'> </div><div class='hunk'>@@ -896,9 +1046,11 @@ const struct peak_usb_adapter pcan_usb = {</div><div class='ctx'> 	.dev_init = pcan_usb_init,</div><div class='ctx'> 	.dev_set_bus = pcan_usb_write_mode,</div><div class='ctx'> 	.dev_set_bittiming = pcan_usb_set_bittiming,</div><div class='del'>-	.dev_get_device_id = pcan_usb_get_device_id,</div><div class='add'>+	.dev_get_can_channel_id = pcan_usb_get_can_channel_id,</div><div class='add'>+	.dev_set_can_channel_id = pcan_usb_set_can_channel_id,</div><div class='ctx'> 	.dev_decode_buf = pcan_usb_decode_buf,</div><div class='ctx'> 	.dev_encode_msg = pcan_usb_encode_msg,</div><div class='ctx'> 	.dev_start = pcan_usb_start,</div><div class='ctx'> 	.dev_restart_async = pcan_usb_restart_async,</div><div class='add'>+	.do_get_berr_counter = pcan_usb_get_berr_counter,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/can/usb/peak_usb/pcan_usb_core.c b/drivers/net/can/usb/peak_usb/pcan_usb_core.c<br/>index 7921cff93a63..cf48bb26d46d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/peak_usb/pcan_usb_core.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/peak_usb/pcan_usb_core.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/peak_usb/pcan_usb_core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/peak_usb/pcan_usb_core.c</a></div><div class='hunk'>@@ -1,26 +1,21 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='ctx'>  * CAN driver for PEAK System USB adapters</div><div class='ctx'>  * Derived from the PCAN project file driver/src/pcan_usb_core.c</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2003-2010 PEAK System-Technik GmbH</div><div class='del'>- * Copyright (C) 2010-2012 Stephane Grosjean &lt;s.grosjean@peak-system.com&gt;</div><div class='add'>+ * Copyright (C) 2003-2025 PEAK System-Technik GmbH</div><div class='add'>+ * Author: Stéphane Grosjean &lt;stephane.grosjean@hms-networks.com&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * Many thanks to Klaus Hitschler &lt;klaus.hitschler@gmx.de&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms of the GNU General Public License as published</div><div class='del'>- * by the Free Software Foundation; version 2 of the License.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='ctx'>  */</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/signal.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/signal.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/sysfs.h&gt;</div><div class='ctx'> #include &lt;linux/usb.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/can.h&gt;</div><div class='hunk'>@@ -29,34 +24,62 @@</div><div class='ctx'> </div><div class='ctx'> #include "pcan_usb_core.h"</div><div class='ctx'> </div><div class='del'>-MODULE_AUTHOR("Stephane Grosjean &lt;s.grosjean@peak-system.com&gt;");</div><div class='add'>+MODULE_AUTHOR("Stéphane Grosjean &lt;stephane.grosjean@hms-networks.com&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("CAN driver for PEAK-System USB adapters");</div><div class='ctx'> MODULE_LICENSE("GPL v2");</div><div class='ctx'> </div><div class='ctx'> /* Table of devices that work with this driver */</div><div class='del'>-static struct usb_device_id peak_usb_table[] = {</div><div class='del'>-	{USB_DEVICE(PCAN_USB_VENDOR_ID, PCAN_USB_PRODUCT_ID)},</div><div class='del'>-	{USB_DEVICE(PCAN_USB_VENDOR_ID, PCAN_USBPRO_PRODUCT_ID)},</div><div class='del'>-	{USB_DEVICE(PCAN_USB_VENDOR_ID, PCAN_USBFD_PRODUCT_ID)},</div><div class='del'>-	{USB_DEVICE(PCAN_USB_VENDOR_ID, PCAN_USBPROFD_PRODUCT_ID)},</div><div class='del'>-	{} /* Terminating entry */</div><div class='add'>+static const struct usb_device_id peak_usb_table[] = {</div><div class='add'>+	{</div><div class='add'>+		USB_DEVICE(PCAN_USB_VENDOR_ID, PCAN_USB_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;pcan_usb,</div><div class='add'>+	}, {</div><div class='add'>+		USB_DEVICE(PCAN_USB_VENDOR_ID, PCAN_USBPRO_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;pcan_usb_pro,</div><div class='add'>+	}, {</div><div class='add'>+		USB_DEVICE(PCAN_USB_VENDOR_ID, PCAN_USBFD_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;pcan_usb_fd,</div><div class='add'>+	}, {</div><div class='add'>+		USB_DEVICE(PCAN_USB_VENDOR_ID, PCAN_USBPROFD_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;pcan_usb_pro_fd,</div><div class='add'>+	}, {</div><div class='add'>+		USB_DEVICE(PCAN_USB_VENDOR_ID, PCAN_USBCHIP_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;pcan_usb_chip,</div><div class='add'>+	}, {</div><div class='add'>+		USB_DEVICE(PCAN_USB_VENDOR_ID, PCAN_USBX6_PRODUCT_ID),</div><div class='add'>+		.driver_info = (kernel_ulong_t)&amp;pcan_usb_x6,</div><div class='add'>+	}, {</div><div class='add'>+		/* Terminating entry */</div><div class='add'>+	}</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> MODULE_DEVICE_TABLE(usb, peak_usb_table);</div><div class='ctx'> </div><div class='del'>-/* List of supported PCAN-USB adapters (NULL terminated list) */</div><div class='del'>-static const struct peak_usb_adapter *const peak_usb_adapters_list[] = {</div><div class='del'>-	&amp;pcan_usb,</div><div class='del'>-	&amp;pcan_usb_pro,</div><div class='del'>-	&amp;pcan_usb_fd,</div><div class='del'>-	&amp;pcan_usb_pro_fd,</div><div class='add'>+static ssize_t can_channel_id_show(struct device *dev, struct device_attribute *attr, char *buf)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = to_net_dev(dev);</div><div class='add'>+	struct peak_usb_device *peak_dev = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	return sysfs_emit(buf, "%08X\n", peak_dev-&gt;can_channel_id);</div><div class='add'>+}</div><div class='add'>+static DEVICE_ATTR_RO(can_channel_id);</div><div class='add'>+</div><div class='add'>+/* mutable to avoid cast in attribute_group */</div><div class='add'>+static struct attribute *peak_usb_sysfs_attrs[] = {</div><div class='add'>+	&amp;dev_attr_can_channel_id.attr,</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct attribute_group peak_usb_sysfs_group = {</div><div class='add'>+	.name	= "peak_usb",</div><div class='add'>+	.attrs	= peak_usb_sysfs_attrs,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * dump memory</div><div class='ctx'>  */</div><div class='ctx'> #define DUMP_WIDTH	16</div><div class='del'>-void pcan_dump_mem(char *prompt, void *p, int l)</div><div class='add'>+void pcan_dump_mem(const char *prompt, const void *p, int l)</div><div class='ctx'> {</div><div class='ctx'> 	pr_info("%s dumping %s (%d bytes):\n",</div><div class='ctx'> 		PCAN_USB_DRIVER_NAME, prompt ? prompt : "memory", l);</div><div class='hunk'>@@ -76,21 +99,6 @@ void peak_usb_init_time_ref(struct peak_time_ref *time_ref,</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void peak_usb_add_us(struct timeval *tv, u32 delta_us)</div><div class='del'>-{</div><div class='del'>-	/* number of s. to add to final time */</div><div class='del'>-	u32 delta_s = delta_us / 1000000;</div><div class='del'>-</div><div class='del'>-	delta_us -= delta_s * 1000000;</div><div class='del'>-</div><div class='del'>-	tv-&gt;tv_usec += delta_us;</div><div class='del'>-	if (tv-&gt;tv_usec &gt;= 1000000) {</div><div class='del'>-		tv-&gt;tv_usec -= 1000000;</div><div class='del'>-		delta_s++;</div><div class='del'>-	}</div><div class='del'>-	tv-&gt;tv_sec += delta_s;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * sometimes, another now may be  more recent than current one...</div><div class='ctx'>  */</div><div class='hunk'>@@ -99,11 +107,11 @@ void peak_usb_update_ts_now(struct peak_time_ref *time_ref, u32 ts_now)</div><div class='ctx'> 	time_ref-&gt;ts_dev_2 = ts_now;</div><div class='ctx'> </div><div class='ctx'> 	/* should wait at least two passes before computing */</div><div class='del'>-	if (time_ref-&gt;tv_host.tv_sec &gt; 0) {</div><div class='add'>+	if (ktime_to_ns(time_ref-&gt;tv_host) &gt; 0) {</div><div class='ctx'> 		u32 delta_ts = time_ref-&gt;ts_dev_2 - time_ref-&gt;ts_dev_1;</div><div class='ctx'> </div><div class='ctx'> 		if (time_ref-&gt;ts_dev_2 &lt; time_ref-&gt;ts_dev_1)</div><div class='del'>-			delta_ts &amp;= (1 &lt;&lt; time_ref-&gt;adapter-&gt;ts_used_bits) - 1;</div><div class='add'>+			delta_ts &amp;= (1ULL &lt;&lt; time_ref-&gt;adapter-&gt;ts_used_bits) - 1;</div><div class='ctx'> </div><div class='ctx'> 		time_ref-&gt;ts_total += delta_ts;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -114,26 +122,26 @@ void peak_usb_update_ts_now(struct peak_time_ref *time_ref, u32 ts_now)</div><div class='ctx'>  */</div><div class='ctx'> void peak_usb_set_ts_now(struct peak_time_ref *time_ref, u32 ts_now)</div><div class='ctx'> {</div><div class='del'>-	if (time_ref-&gt;tv_host_0.tv_sec == 0) {</div><div class='add'>+	if (ktime_to_ns(time_ref-&gt;tv_host_0) == 0) {</div><div class='ctx'> 		/* use monotonic clock to correctly compute further deltas */</div><div class='del'>-		time_ref-&gt;tv_host_0 = ktime_to_timeval(ktime_get());</div><div class='del'>-		time_ref-&gt;tv_host.tv_sec = 0;</div><div class='add'>+		time_ref-&gt;tv_host_0 = ktime_get();</div><div class='add'>+		time_ref-&gt;tv_host = ktime_set(0, 0);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/*</div><div class='del'>-		 * delta_us should not be &gt;= 2^32 =&gt; delta_s should be &lt; 4294</div><div class='add'>+		 * delta_us should not be &gt;= 2^32 =&gt; delta should be &lt; 4294s</div><div class='ctx'> 		 * handle 32-bits wrapping here: if count of s. reaches 4200,</div><div class='ctx'> 		 * reset counters and change time base</div><div class='ctx'> 		 */</div><div class='del'>-		if (time_ref-&gt;tv_host.tv_sec != 0) {</div><div class='del'>-			u32 delta_s = time_ref-&gt;tv_host.tv_sec</div><div class='del'>-						- time_ref-&gt;tv_host_0.tv_sec;</div><div class='del'>-			if (delta_s &gt; 4200) {</div><div class='add'>+		if (ktime_to_ns(time_ref-&gt;tv_host)) {</div><div class='add'>+			ktime_t delta = ktime_sub(time_ref-&gt;tv_host,</div><div class='add'>+						  time_ref-&gt;tv_host_0);</div><div class='add'>+			if (ktime_to_ns(delta) &gt; (4200ull * NSEC_PER_SEC)) {</div><div class='ctx'> 				time_ref-&gt;tv_host_0 = time_ref-&gt;tv_host;</div><div class='ctx'> 				time_ref-&gt;ts_total = 0;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		time_ref-&gt;tv_host = ktime_to_timeval(ktime_get());</div><div class='add'>+		time_ref-&gt;tv_host = ktime_get();</div><div class='ctx'> 		time_ref-&gt;tick_count++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -142,42 +150,79 @@ void peak_usb_set_ts_now(struct peak_time_ref *time_ref, u32 ts_now)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * compute timeval according to current ts and time_ref data</div><div class='add'>+ * compute time according to current ts and time_ref data</div><div class='ctx'>  */</div><div class='del'>-void peak_usb_get_ts_tv(struct peak_time_ref *time_ref, u32 ts,</div><div class='del'>-			struct timeval *tv)</div><div class='add'>+void peak_usb_get_ts_time(struct peak_time_ref *time_ref, u32 ts, ktime_t *time)</div><div class='ctx'> {</div><div class='del'>-	/* protect from getting timeval before setting now */</div><div class='del'>-	if (time_ref-&gt;tv_host.tv_sec &gt; 0) {</div><div class='add'>+	/* protect from getting time before setting now */</div><div class='add'>+	if (ktime_to_ns(time_ref-&gt;tv_host)) {</div><div class='ctx'> 		u64 delta_us;</div><div class='add'>+		s64 delta_ts = 0;</div><div class='add'>+</div><div class='add'>+		/* General case: dev_ts_1 &lt; dev_ts_2 &lt; ts, with:</div><div class='add'>+		 *</div><div class='add'>+		 * - dev_ts_1 = previous sync timestamp</div><div class='add'>+		 * - dev_ts_2 = last sync timestamp</div><div class='add'>+		 * - ts = event timestamp</div><div class='add'>+		 * - ts_period = known sync period (theoretical)</div><div class='add'>+		 *             ~ dev_ts2 - dev_ts1</div><div class='add'>+		 * *but*:</div><div class='add'>+		 *</div><div class='add'>+		 * - time counters wrap (see adapter-&gt;ts_used_bits)</div><div class='add'>+		 * - sometimes, dev_ts_1 &lt; ts &lt; dev_ts2</div><div class='add'>+		 *</div><div class='add'>+		 * "normal" case (sync time counters increase):</div><div class='add'>+		 * must take into account case when ts wraps (tsw)</div><div class='add'>+		 *</div><div class='add'>+		 *      &lt; ts_period &gt; &lt;          &gt;</div><div class='add'>+		 *     |             |            |</div><div class='add'>+		 *  ---+--------+----+-------0-+--+--&gt;</div><div class='add'>+		 *     ts_dev_1 |    ts_dev_2  |</div><div class='add'>+		 *              ts             tsw</div><div class='add'>+		 */</div><div class='add'>+		if (time_ref-&gt;ts_dev_1 &lt; time_ref-&gt;ts_dev_2) {</div><div class='add'>+			/* case when event time (tsw) wraps */</div><div class='add'>+			if (ts &lt; time_ref-&gt;ts_dev_1)</div><div class='add'>+				delta_ts = BIT_ULL(time_ref-&gt;adapter-&gt;ts_used_bits);</div><div class='add'>+</div><div class='add'>+		/* Otherwise, sync time counter (ts_dev_2) has wrapped:</div><div class='add'>+		 * handle case when event time (tsn) hasn't.</div><div class='add'>+		 *</div><div class='add'>+		 *      &lt; ts_period &gt; &lt;          &gt;</div><div class='add'>+		 *     |             |            |</div><div class='add'>+		 *  ---+--------+--0-+---------+--+--&gt;</div><div class='add'>+		 *     ts_dev_1 |    ts_dev_2  |</div><div class='add'>+		 *              tsn            ts</div><div class='add'>+		 */</div><div class='add'>+		} else if (time_ref-&gt;ts_dev_1 &lt; ts) {</div><div class='add'>+			delta_ts = -BIT_ULL(time_ref-&gt;adapter-&gt;ts_used_bits);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-		delta_us = ts - time_ref-&gt;ts_dev_2;</div><div class='del'>-		if (ts &lt; time_ref-&gt;ts_dev_2)</div><div class='del'>-			delta_us &amp;= (1 &lt;&lt; time_ref-&gt;adapter-&gt;ts_used_bits) - 1;</div><div class='add'>+		/* add delay between last sync and event timestamps */</div><div class='add'>+		delta_ts += (signed int)(ts - time_ref-&gt;ts_dev_2);</div><div class='ctx'> </div><div class='del'>-		delta_us += time_ref-&gt;ts_total;</div><div class='add'>+		/* add time from beginning to last sync */</div><div class='add'>+		delta_ts += time_ref-&gt;ts_total;</div><div class='ctx'> </div><div class='del'>-		delta_us *= time_ref-&gt;adapter-&gt;us_per_ts_scale;</div><div class='add'>+		/* convert ticks number into microseconds */</div><div class='add'>+		delta_us = delta_ts * time_ref-&gt;adapter-&gt;us_per_ts_scale;</div><div class='ctx'> 		delta_us &gt;&gt;= time_ref-&gt;adapter-&gt;us_per_ts_shift;</div><div class='ctx'> </div><div class='del'>-		*tv = time_ref-&gt;tv_host_0;</div><div class='del'>-		peak_usb_add_us(tv, (u32)delta_us);</div><div class='add'>+		*time = ktime_add_us(time_ref-&gt;tv_host_0, delta_us);</div><div class='ctx'> 	} else {</div><div class='del'>-		*tv = ktime_to_timeval(ktime_get());</div><div class='add'>+		*time = ktime_get();</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * post received skb after having set any hw timestamp</div><div class='del'>- */</div><div class='del'>-int peak_usb_netif_rx(struct sk_buff *skb,</div><div class='del'>-		      struct peak_time_ref *time_ref, u32 ts_low, u32 ts_high)</div><div class='add'>+/* post received skb with native 64-bit hw timestamp */</div><div class='add'>+int peak_usb_netif_rx_64(struct sk_buff *skb, u32 ts_low, u32 ts_high)</div><div class='ctx'> {</div><div class='ctx'> 	struct skb_shared_hwtstamps *hwts = skb_hwtstamps(skb);</div><div class='del'>-	struct timeval tv;</div><div class='add'>+	u64 ns_ts;</div><div class='ctx'> </div><div class='del'>-	peak_usb_get_ts_tv(time_ref, ts_low, &amp;tv);</div><div class='del'>-	hwts-&gt;hwtstamp = timeval_to_ktime(tv);</div><div class='add'>+	ns_ts = (u64)ts_high &lt;&lt; 32 | ts_low;</div><div class='add'>+	ns_ts *= NSEC_PER_USEC;</div><div class='add'>+	hwts-&gt;hwtstamp = ns_to_ktime(ns_ts);</div><div class='ctx'> </div><div class='ctx'> 	return netif_rx(skb);</div><div class='ctx'> }</div><div class='hunk'>@@ -255,6 +300,7 @@ static void peak_usb_write_bulk_callback(struct urb *urb)</div><div class='ctx'> 	struct peak_tx_urb_context *context = urb-&gt;context;</div><div class='ctx'> 	struct peak_usb_device *dev;</div><div class='ctx'> 	struct net_device *netdev;</div><div class='add'>+	int tx_bytes;</div><div class='ctx'> </div><div class='ctx'> 	BUG_ON(!context);</div><div class='ctx'> </div><div class='hunk'>@@ -269,33 +315,35 @@ static void peak_usb_write_bulk_callback(struct urb *urb)</div><div class='ctx'> 	/* check tx status */</div><div class='ctx'> 	switch (urb-&gt;status) {</div><div class='ctx'> 	case 0:</div><div class='del'>-		/* transmission complete */</div><div class='del'>-		netdev-&gt;stats.tx_packets++;</div><div class='del'>-		netdev-&gt;stats.tx_bytes += context-&gt;data_len;</div><div class='del'>-</div><div class='ctx'> 		/* prevent tx timeout */</div><div class='del'>-		netdev-&gt;trans_start = jiffies;</div><div class='add'>+		netif_trans_update(netdev);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='del'>-	default:</div><div class='del'>-		if (net_ratelimit())</div><div class='del'>-			netdev_err(netdev, "Tx urb aborted (%d)\n",</div><div class='del'>-				   urb-&gt;status);</div><div class='ctx'> 	case -EPROTO:</div><div class='ctx'> 	case -ENOENT:</div><div class='ctx'> 	case -ECONNRESET:</div><div class='ctx'> 	case -ESHUTDOWN:</div><div class='add'>+		break;</div><div class='ctx'> </div><div class='add'>+	default:</div><div class='add'>+		if (net_ratelimit())</div><div class='add'>+			netdev_err(netdev, "Tx urb aborted (%d)\n",</div><div class='add'>+				   urb-&gt;status);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* should always release echo skb and corresponding context */</div><div class='del'>-	can_get_echo_skb(netdev, context-&gt;echo_index);</div><div class='add'>+	tx_bytes = can_get_echo_skb(netdev, context-&gt;echo_index, NULL);</div><div class='ctx'> 	context-&gt;echo_index = PCAN_USB_MAX_TX_URBS;</div><div class='ctx'> </div><div class='del'>-	/* do wakeup tx queue in case of success only */</div><div class='del'>-	if (!urb-&gt;status)</div><div class='add'>+	if (!urb-&gt;status) {</div><div class='add'>+		/* transmission complete */</div><div class='add'>+		netdev-&gt;stats.tx_packets++;</div><div class='add'>+		netdev-&gt;stats.tx_bytes += tx_bytes;</div><div class='add'>+</div><div class='add'>+		/* do wakeup tx queue in case of success only */</div><div class='ctx'> 		netif_wake_queue(netdev);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -307,13 +355,12 @@ static netdev_tx_t peak_usb_ndo_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 	struct peak_usb_device *dev = netdev_priv(netdev);</div><div class='ctx'> 	struct peak_tx_urb_context *context = NULL;</div><div class='ctx'> 	struct net_device_stats *stats = &amp;netdev-&gt;stats;</div><div class='del'>-	struct canfd_frame *cfd = (struct canfd_frame *)skb-&gt;data;</div><div class='ctx'> 	struct urb *urb;</div><div class='ctx'> 	u8 *obuf;</div><div class='ctx'> 	int i, err;</div><div class='ctx'> 	size_t size = dev-&gt;adapter-&gt;tx_buffer_size;</div><div class='ctx'> </div><div class='del'>-	if (can_dropped_invalid_skb(netdev, skb))</div><div class='add'>+	if (can_dev_dropped_skb(netdev, skb))</div><div class='ctx'> 		return NETDEV_TX_OK;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; PCAN_USB_MAX_TX_URBS; i++)</div><div class='hunk'>@@ -341,18 +388,15 @@ static netdev_tx_t peak_usb_ndo_start_xmit(struct sk_buff *skb,</div><div class='ctx'> </div><div class='ctx'> 	context-&gt;echo_index = i;</div><div class='ctx'> </div><div class='del'>-	/* Note: this works with CANFD frames too */</div><div class='del'>-	context-&gt;data_len = cfd-&gt;len;</div><div class='del'>-</div><div class='ctx'> 	usb_anchor_urb(urb, &amp;dev-&gt;tx_submitted);</div><div class='ctx'> </div><div class='del'>-	can_put_echo_skb(skb, netdev, context-&gt;echo_index);</div><div class='add'>+	can_put_echo_skb(skb, netdev, context-&gt;echo_index, 0);</div><div class='ctx'> </div><div class='ctx'> 	atomic_inc(&amp;dev-&gt;active_tx_urbs);</div><div class='ctx'> </div><div class='ctx'> 	err = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='ctx'> 	if (err) {</div><div class='del'>-		can_free_echo_skb(netdev, context-&gt;echo_index);</div><div class='add'>+		can_free_echo_skb(netdev, context-&gt;echo_index, NULL);</div><div class='ctx'> </div><div class='ctx'> 		usb_unanchor_urb(urb);</div><div class='ctx'> </div><div class='hunk'>@@ -368,12 +412,13 @@ static netdev_tx_t peak_usb_ndo_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 		default:</div><div class='ctx'> 			netdev_warn(netdev, "tx urb submitting failed err=%d\n",</div><div class='ctx'> 				    err);</div><div class='add'>+			fallthrough;</div><div class='ctx'> 		case -ENOENT:</div><div class='ctx'> 			/* cable unplugged */</div><div class='ctx'> 			stats-&gt;tx_dropped++;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='del'>-		netdev-&gt;trans_start = jiffies;</div><div class='add'>+		netif_trans_update(netdev);</div><div class='ctx'> </div><div class='ctx'> 		/* slow down tx path */</div><div class='ctx'> 		if (atomic_read(&amp;dev-&gt;active_tx_urbs) &gt;= PCAN_USB_MAX_TX_URBS)</div><div class='hunk'>@@ -399,7 +444,6 @@ static int peak_usb_start(struct peak_usb_device *dev)</div><div class='ctx'> 		/* create a URB, and a buffer for it, to receive usb messages */</div><div class='ctx'> 		urb = usb_alloc_urb(0, GFP_KERNEL);</div><div class='ctx'> 		if (!urb) {</div><div class='del'>-			netdev_err(netdev, "No memory left for URBs\n");</div><div class='ctx'> 			err = -ENOMEM;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -454,7 +498,6 @@ static int peak_usb_start(struct peak_usb_device *dev)</div><div class='ctx'> 		/* create a URB and a buffer for it, to transmit usb messages */</div><div class='ctx'> 		urb = usb_alloc_urb(0, GFP_KERNEL);</div><div class='ctx'> 		if (!urb) {</div><div class='del'>-			netdev_err(netdev, "No memory left for URBs\n");</div><div class='ctx'> 			err = -ENOMEM;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -592,19 +635,20 @@ static int peak_usb_ndo_stop(struct net_device *netdev)</div><div class='ctx'> 	dev-&gt;state &amp;= ~PCAN_USB_STATE_STARTED;</div><div class='ctx'> 	netif_stop_queue(netdev);</div><div class='ctx'> </div><div class='add'>+	close_candev(netdev);</div><div class='add'>+</div><div class='add'>+	dev-&gt;can.state = CAN_STATE_STOPPED;</div><div class='add'>+</div><div class='ctx'> 	/* unlink all pending urbs and free used memory */</div><div class='ctx'> 	peak_usb_unlink_all_urbs(dev);</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;adapter-&gt;dev_stop)</div><div class='ctx'> 		dev-&gt;adapter-&gt;dev_stop(dev);</div><div class='ctx'> </div><div class='del'>-	close_candev(netdev);</div><div class='del'>-</div><div class='del'>-	dev-&gt;can.state = CAN_STATE_STOPPED;</div><div class='del'>-</div><div class='ctx'> 	/* can set bus off now */</div><div class='ctx'> 	if (dev-&gt;adapter-&gt;dev_set_bus) {</div><div class='ctx'> 		int err = dev-&gt;adapter-&gt;dev_set_bus(dev, 0);</div><div class='add'>+</div><div class='ctx'> 		if (err)</div><div class='ctx'> 			return err;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -651,10 +695,8 @@ static int peak_usb_restart(struct peak_usb_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	/* first allocate a urb to handle the asynchronous steps */</div><div class='ctx'> 	urb = usb_alloc_urb(0, GFP_ATOMIC);</div><div class='del'>-	if (!urb) {</div><div class='del'>-		netdev_err(dev-&gt;netdev, "no memory left for urb\n");</div><div class='add'>+	if (!urb)</div><div class='ctx'> 		return -ENOMEM;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	/* also allocate enough space for the commands to send */</div><div class='ctx'> 	buf = kmalloc(PCAN_USB_MAX_CMD_LEN, GFP_ATOMIC);</div><div class='hunk'>@@ -728,7 +770,7 @@ static int peak_usb_set_data_bittiming(struct net_device *netdev)</div><div class='ctx'> 	const struct peak_usb_adapter *pa = dev-&gt;adapter;</div><div class='ctx'> </div><div class='ctx'> 	if (pa-&gt;dev_set_data_bittiming) {</div><div class='del'>-		struct can_bittiming *bt = &amp;dev-&gt;can.data_bittiming;</div><div class='add'>+		struct can_bittiming *bt = &amp;dev-&gt;can.fd.data_bittiming;</div><div class='ctx'> 		int err = pa-&gt;dev_set_data_bittiming(dev, bt);</div><div class='ctx'> </div><div class='ctx'> 		if (err)</div><div class='hunk'>@@ -742,13 +784,127 @@ static int peak_usb_set_data_bittiming(struct net_device *netdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int peak_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+			     struct kernel_hwtstamp_config *config)</div><div class='add'>+{</div><div class='add'>+	config-&gt;tx_type = HWTSTAMP_TX_OFF;</div><div class='add'>+	config-&gt;rx_filter = HWTSTAMP_FILTER_ALL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int peak_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+			     struct kernel_hwtstamp_config *config,</div><div class='add'>+			     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	if (config-&gt;tx_type == HWTSTAMP_TX_OFF &amp;&amp;</div><div class='add'>+	    config-&gt;rx_filter == HWTSTAMP_FILTER_ALL)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	NL_SET_ERR_MSG_MOD(extack, "Only RX HWTSTAMP_FILTER_ALL is supported");</div><div class='add'>+	return -ERANGE;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct net_device_ops peak_usb_netdev_ops = {</div><div class='ctx'> 	.ndo_open = peak_usb_ndo_open,</div><div class='ctx'> 	.ndo_stop = peak_usb_ndo_stop,</div><div class='ctx'> 	.ndo_start_xmit = peak_usb_ndo_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='add'>+	.ndo_hwtstamp_get = peak_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set = peak_hwtstamp_set,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* CAN-USB devices generally handle 32-bit CAN channel IDs.</div><div class='add'>+ * In case one doesn't, then it have to overload this function.</div><div class='add'>+ */</div><div class='add'>+int peak_usb_get_eeprom_len(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	return sizeof(u32);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Every CAN-USB device exports the dev_get_can_channel_id() operation. It is used</div><div class='add'>+ * here to fill the data buffer with the user defined CAN channel ID.</div><div class='add'>+ */</div><div class='add'>+int peak_usb_get_eeprom(struct net_device *netdev,</div><div class='add'>+			struct ethtool_eeprom *eeprom, u8 *data)</div><div class='add'>+{</div><div class='add'>+	struct peak_usb_device *dev = netdev_priv(netdev);</div><div class='add'>+	u32 ch_id;</div><div class='add'>+	__le32 ch_id_le;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = dev-&gt;adapter-&gt;dev_get_can_channel_id(dev, &amp;ch_id);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* ethtool operates on individual bytes. The byte order of the CAN</div><div class='add'>+	 * channel id in memory depends on the kernel architecture. We</div><div class='add'>+	 * convert the CAN channel id back to the native byte order of the PEAK</div><div class='add'>+	 * device itself to ensure that the order is consistent for all</div><div class='add'>+	 * host architectures.</div><div class='add'>+	 */</div><div class='add'>+	ch_id_le = cpu_to_le32(ch_id);</div><div class='add'>+	memcpy(data, (u8 *)&amp;ch_id_le + eeprom-&gt;offset, eeprom-&gt;len);</div><div class='add'>+</div><div class='add'>+	/* update cached value */</div><div class='add'>+	dev-&gt;can_channel_id = ch_id;</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Every CAN-USB device exports the dev_get_can_channel_id()/dev_set_can_channel_id()</div><div class='add'>+ * operations. They are used here to set the new user defined CAN channel ID.</div><div class='add'>+ */</div><div class='add'>+int peak_usb_set_eeprom(struct net_device *netdev,</div><div class='add'>+			struct ethtool_eeprom *eeprom, u8 *data)</div><div class='add'>+{</div><div class='add'>+	struct peak_usb_device *dev = netdev_priv(netdev);</div><div class='add'>+	u32 ch_id;</div><div class='add'>+	__le32 ch_id_le;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* first, read the current user defined CAN channel ID */</div><div class='add'>+	err = dev-&gt;adapter-&gt;dev_get_can_channel_id(dev, &amp;ch_id);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(netdev, "Failed to init CAN channel id (err %d)\n", err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* do update the value with user given bytes.</div><div class='add'>+	 * ethtool operates on individual bytes. The byte order of the CAN</div><div class='add'>+	 * channel ID in memory depends on the kernel architecture. We</div><div class='add'>+	 * convert the CAN channel ID back to the native byte order of the PEAK</div><div class='add'>+	 * device itself to ensure that the order is consistent for all</div><div class='add'>+	 * host architectures.</div><div class='add'>+	 */</div><div class='add'>+	ch_id_le = cpu_to_le32(ch_id);</div><div class='add'>+	memcpy((u8 *)&amp;ch_id_le + eeprom-&gt;offset, data, eeprom-&gt;len);</div><div class='add'>+	ch_id = le32_to_cpu(ch_id_le);</div><div class='add'>+</div><div class='add'>+	/* flash the new value now */</div><div class='add'>+	err = dev-&gt;adapter-&gt;dev_set_can_channel_id(dev, ch_id);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(netdev, "Failed to write new CAN channel id (err %d)\n",</div><div class='add'>+			   err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* update cached value with the new one */</div><div class='add'>+	dev-&gt;can_channel_id = ch_id;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int pcan_get_ts_info(struct net_device *dev, struct kernel_ethtool_ts_info *info)</div><div class='add'>+{</div><div class='add'>+	info-&gt;so_timestamping =</div><div class='add'>+		SOF_TIMESTAMPING_TX_SOFTWARE |</div><div class='add'>+		SOF_TIMESTAMPING_RX_HARDWARE |</div><div class='add'>+		SOF_TIMESTAMPING_RAW_HARDWARE;</div><div class='add'>+	info-&gt;tx_types = BIT(HWTSTAMP_TX_OFF);</div><div class='add'>+	info-&gt;rx_filters = BIT(HWTSTAMP_FILTER_ALL);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * create one device which is attached to CAN controller #ctrl_idx of the</div><div class='ctx'>  * usb adapter.</div><div class='hunk'>@@ -776,7 +932,7 @@ static int peak_usb_create_dev(const struct peak_usb_adapter *peak_usb_adapter,</div><div class='ctx'> 	dev = netdev_priv(netdev);</div><div class='ctx'> </div><div class='ctx'> 	/* allocate a buffer large enough to send commands */</div><div class='del'>-	dev-&gt;cmd_buf = kmalloc(PCAN_USB_MAX_CMD_LEN, GFP_KERNEL);</div><div class='add'>+	dev-&gt;cmd_buf = kzalloc(PCAN_USB_MAX_CMD_LEN, GFP_KERNEL);</div><div class='ctx'> 	if (!dev-&gt;cmd_buf) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='ctx'> 		goto lbl_free_candev;</div><div class='hunk'>@@ -792,10 +948,10 @@ static int peak_usb_create_dev(const struct peak_usb_adapter *peak_usb_adapter,</div><div class='ctx'> 	dev-&gt;ep_msg_out = peak_usb_adapter-&gt;ep_msg_out[ctrl_idx];</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;can.clock = peak_usb_adapter-&gt;clock;</div><div class='del'>-	dev-&gt;can.bittiming_const = &amp;peak_usb_adapter-&gt;bittiming_const;</div><div class='add'>+	dev-&gt;can.bittiming_const = peak_usb_adapter-&gt;bittiming_const;</div><div class='ctx'> 	dev-&gt;can.do_set_bittiming = peak_usb_set_bittiming;</div><div class='del'>-	dev-&gt;can.data_bittiming_const = &amp;peak_usb_adapter-&gt;data_bittiming_const;</div><div class='del'>-	dev-&gt;can.do_set_data_bittiming = peak_usb_set_data_bittiming;</div><div class='add'>+	dev-&gt;can.fd.data_bittiming_const = peak_usb_adapter-&gt;data_bittiming_const;</div><div class='add'>+	dev-&gt;can.fd.do_set_data_bittiming = peak_usb_set_data_bittiming;</div><div class='ctx'> 	dev-&gt;can.do_set_mode = peak_usb_set_mode;</div><div class='ctx'> 	dev-&gt;can.do_get_berr_counter = peak_usb_adapter-&gt;do_get_berr_counter;</div><div class='ctx'> 	dev-&gt;can.ctrlmode_supported = peak_usb_adapter-&gt;ctrlmode_supported;</div><div class='hunk'>@@ -804,6 +960,12 @@ static int peak_usb_create_dev(const struct peak_usb_adapter *peak_usb_adapter,</div><div class='ctx'> </div><div class='ctx'> 	netdev-&gt;flags |= IFF_ECHO; /* we support local echo */</div><div class='ctx'> </div><div class='add'>+	/* add ethtool support */</div><div class='add'>+	netdev-&gt;ethtool_ops = peak_usb_adapter-&gt;ethtool_ops;</div><div class='add'>+</div><div class='add'>+	/* register peak_usb sysfs files */</div><div class='add'>+	netdev-&gt;sysfs_groups[0] = &amp;peak_usb_sysfs_group;</div><div class='add'>+</div><div class='ctx'> 	init_usb_anchor(&amp;dev-&gt;rx_submitted);</div><div class='ctx'> </div><div class='ctx'> 	init_usb_anchor(&amp;dev-&gt;tx_submitted);</div><div class='hunk'>@@ -841,18 +1003,21 @@ static int peak_usb_create_dev(const struct peak_usb_adapter *peak_usb_adapter,</div><div class='ctx'> 	if (dev-&gt;adapter-&gt;dev_set_bus) {</div><div class='ctx'> 		err = dev-&gt;adapter-&gt;dev_set_bus(dev, 0);</div><div class='ctx'> 		if (err)</div><div class='del'>-			goto lbl_unregister_candev;</div><div class='add'>+			goto adap_dev_free;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* get device number early */</div><div class='del'>-	if (dev-&gt;adapter-&gt;dev_get_device_id)</div><div class='del'>-		dev-&gt;adapter-&gt;dev_get_device_id(dev, &amp;dev-&gt;device_number);</div><div class='add'>+	/* get CAN channel id early */</div><div class='add'>+	dev-&gt;adapter-&gt;dev_get_can_channel_id(dev, &amp;dev-&gt;can_channel_id);</div><div class='ctx'> </div><div class='del'>-	netdev_info(netdev, "attached to %s channel %u (device %u)\n",</div><div class='del'>-			peak_usb_adapter-&gt;name, ctrl_idx, dev-&gt;device_number);</div><div class='add'>+	netdev_info(netdev, "attached to %s channel %u (device 0x%08X)\n",</div><div class='add'>+		    peak_usb_adapter-&gt;name, ctrl_idx, dev-&gt;can_channel_id);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+adap_dev_free:</div><div class='add'>+	if (dev-&gt;adapter-&gt;dev_free)</div><div class='add'>+		dev-&gt;adapter-&gt;dev_free(dev);</div><div class='add'>+</div><div class='ctx'> lbl_unregister_candev:</div><div class='ctx'> 	unregister_candev(netdev);</div><div class='ctx'> </div><div class='hunk'>@@ -872,23 +1037,25 @@ lbl_free_candev:</div><div class='ctx'> static void peak_usb_disconnect(struct usb_interface *intf)</div><div class='ctx'> {</div><div class='ctx'> 	struct peak_usb_device *dev;</div><div class='add'>+	struct peak_usb_device *dev_prev_siblings;</div><div class='ctx'> </div><div class='ctx'> 	/* unregister as many netdev devices as siblings */</div><div class='del'>-	for (dev = usb_get_intfdata(intf); dev; dev = dev-&gt;prev_siblings) {</div><div class='add'>+	for (dev = usb_get_intfdata(intf); dev; dev = dev_prev_siblings) {</div><div class='ctx'> 		struct net_device *netdev = dev-&gt;netdev;</div><div class='ctx'> 		char name[IFNAMSIZ];</div><div class='ctx'> </div><div class='add'>+		dev_prev_siblings = dev-&gt;prev_siblings;</div><div class='ctx'> 		dev-&gt;state &amp;= ~PCAN_USB_STATE_CONNECTED;</div><div class='del'>-		strncpy(name, netdev-&gt;name, IFNAMSIZ);</div><div class='add'>+		strscpy(name, netdev-&gt;name, IFNAMSIZ);</div><div class='ctx'> </div><div class='del'>-		unregister_netdev(netdev);</div><div class='del'>-		free_candev(netdev);</div><div class='add'>+		unregister_candev(netdev);</div><div class='ctx'> </div><div class='ctx'> 		kfree(dev-&gt;cmd_buf);</div><div class='ctx'> 		dev-&gt;next_siblings = NULL;</div><div class='ctx'> 		if (dev-&gt;adapter-&gt;dev_free)</div><div class='ctx'> 			dev-&gt;adapter-&gt;dev_free(dev);</div><div class='ctx'> </div><div class='add'>+		free_candev(netdev);</div><div class='ctx'> 		dev_info(&amp;intf-&gt;dev, "%s removed\n", name);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -901,26 +1068,11 @@ static void peak_usb_disconnect(struct usb_interface *intf)</div><div class='ctx'> static int peak_usb_probe(struct usb_interface *intf,</div><div class='ctx'> 			  const struct usb_device_id *id)</div><div class='ctx'> {</div><div class='del'>-	struct usb_device *usb_dev = interface_to_usbdev(intf);</div><div class='del'>-	const u16 usb_id_product = le16_to_cpu(usb_dev-&gt;descriptor.idProduct);</div><div class='del'>-	const struct peak_usb_adapter *peak_usb_adapter = NULL;</div><div class='add'>+	const struct peak_usb_adapter *peak_usb_adapter;</div><div class='ctx'> 	int i, err = -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	usb_dev = interface_to_usbdev(intf);</div><div class='del'>-</div><div class='ctx'> 	/* get corresponding PCAN-USB adapter */</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(peak_usb_adapters_list); i++)</div><div class='del'>-		if (peak_usb_adapters_list[i]-&gt;device_id == usb_id_product) {</div><div class='del'>-			peak_usb_adapter = peak_usb_adapters_list[i];</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-	if (!peak_usb_adapter) {</div><div class='del'>-		/* should never come except device_id bad usage in this file */</div><div class='del'>-		pr_err("%s: didn't find device id. 0x%x in devices list\n",</div><div class='del'>-			PCAN_USB_DRIVER_NAME, usb_dev-&gt;descriptor.idProduct);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='add'>+	peak_usb_adapter = (const struct peak_usb_adapter *)id-&gt;driver_info;</div><div class='ctx'> </div><div class='ctx'> 	/* got corresponding adapter: check if it handles current interface */</div><div class='ctx'> 	if (peak_usb_adapter-&gt;intf_probe) {</div><div class='hunk'>@@ -984,7 +1136,7 @@ static void __exit peak_usb_exit(void)</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	/* last chance do send any synchronous commands here */</div><div class='del'>-	err = driver_for_each_device(&amp;peak_usb_driver.drvwrap.driver, NULL,</div><div class='add'>+	err = driver_for_each_device(&amp;peak_usb_driver.driver, NULL,</div><div class='ctx'> 				     NULL, peak_usb_do_device_exit);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		pr_err("%s: failed to stop all can devices (err %d)\n",</div><div class='head'>diff --git a/drivers/net/can/usb/peak_usb/pcan_usb_core.h b/drivers/net/can/usb/peak_usb/pcan_usb_core.h<br/>index 9e624f05ad4d..d1c1897d47b9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/peak_usb/pcan_usb_core.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/peak_usb/pcan_usb_core.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/peak_usb/pcan_usb_core.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/peak_usb/pcan_usb_core.h</a></div><div class='hunk'>@@ -1,20 +1,12 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='ctx'> /*</div><div class='ctx'>  * CAN driver for PEAK System USB adapters</div><div class='ctx'>  * Derived from the PCAN project file driver/src/pcan_usb_core.c</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2003-2010 PEAK System-Technik GmbH</div><div class='del'>- * Copyright (C) 2010-2012 Stephane Grosjean &lt;s.grosjean@peak-system.com&gt;</div><div class='add'>+ * Copyright (C) 2003-2025 PEAK System-Technik GmbH</div><div class='add'>+ * Author: Stéphane Grosjean &lt;stephane.grosjean@hms-networks.com&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * Many thanks to Klaus Hitschler &lt;klaus.hitschler@gmx.de&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms of the GNU General Public License as published</div><div class='del'>- * by the Free Software Foundation; version 2 of the License.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='ctx'>  */</div><div class='ctx'> #ifndef PCAN_USB_CORE_H</div><div class='ctx'> #define PCAN_USB_CORE_H</div><div class='hunk'>@@ -27,6 +19,8 @@</div><div class='ctx'> #define PCAN_USBPRO_PRODUCT_ID		0x000d</div><div class='ctx'> #define PCAN_USBPROFD_PRODUCT_ID	0x0011</div><div class='ctx'> #define PCAN_USBFD_PRODUCT_ID		0x0012</div><div class='add'>+#define PCAN_USBCHIP_PRODUCT_ID		0x0013</div><div class='add'>+#define PCAN_USBX6_PRODUCT_ID		0x0014</div><div class='ctx'> </div><div class='ctx'> #define PCAN_USB_DRIVER_NAME		"peak_usb"</div><div class='ctx'> </div><div class='hunk'>@@ -37,7 +31,7 @@</div><div class='ctx'> /* usb adapters maximum channels per usb interface */</div><div class='ctx'> #define PCAN_USB_MAX_CHANNEL		2</div><div class='ctx'> </div><div class='del'>-/* maximum length of the usb commands sent to/received from  the devices */</div><div class='add'>+/* maximum length of the usb commands sent to/received from the devices */</div><div class='ctx'> #define PCAN_USB_MAX_CMD_LEN		32</div><div class='ctx'> </div><div class='ctx'> struct peak_usb_device;</div><div class='hunk'>@@ -48,10 +42,12 @@ struct peak_usb_adapter {</div><div class='ctx'> 	u32 device_id;</div><div class='ctx'> 	u32 ctrlmode_supported;</div><div class='ctx'> 	struct can_clock clock;</div><div class='del'>-	const struct can_bittiming_const bittiming_const;</div><div class='del'>-	const struct can_bittiming_const data_bittiming_const;</div><div class='add'>+	const struct can_bittiming_const * const bittiming_const;</div><div class='add'>+	const struct can_bittiming_const * const data_bittiming_const;</div><div class='ctx'> 	unsigned int ctrl_count;</div><div class='ctx'> </div><div class='add'>+	const struct ethtool_ops *ethtool_ops;</div><div class='add'>+</div><div class='ctx'> 	int (*intf_probe)(struct usb_interface *intf);</div><div class='ctx'> </div><div class='ctx'> 	int (*dev_init)(struct peak_usb_device *dev);</div><div class='hunk'>@@ -64,7 +60,8 @@ struct peak_usb_adapter {</div><div class='ctx'> 	int (*dev_set_data_bittiming)(struct peak_usb_device *dev,</div><div class='ctx'> 				      struct can_bittiming *bt);</div><div class='ctx'> 	int (*dev_set_bus)(struct peak_usb_device *dev, u8 onoff);</div><div class='del'>-	int (*dev_get_device_id)(struct peak_usb_device *dev, u32 *device_id);</div><div class='add'>+	int (*dev_get_can_channel_id)(struct peak_usb_device *dev, u32 *can_ch_id);</div><div class='add'>+	int (*dev_set_can_channel_id)(struct peak_usb_device *dev, u32 can_ch_id);</div><div class='ctx'> 	int (*dev_decode_buf)(struct peak_usb_device *dev, struct urb *urb);</div><div class='ctx'> 	int (*dev_encode_msg)(struct peak_usb_device *dev, struct sk_buff *skb,</div><div class='ctx'> 					u8 *obuf, size_t *size);</div><div class='hunk'>@@ -77,7 +74,6 @@ struct peak_usb_adapter {</div><div class='ctx'> 	u8 ep_msg_in;</div><div class='ctx'> 	u8 ep_msg_out[PCAN_USB_MAX_CHANNEL];</div><div class='ctx'> 	u8 ts_used_bits;</div><div class='del'>-	u32 ts_period;</div><div class='ctx'> 	u8 us_per_ts_shift;</div><div class='ctx'> 	u32 us_per_ts_scale;</div><div class='ctx'> </div><div class='hunk'>@@ -89,10 +85,12 @@ struct peak_usb_adapter {</div><div class='ctx'> extern const struct peak_usb_adapter pcan_usb;</div><div class='ctx'> extern const struct peak_usb_adapter pcan_usb_pro;</div><div class='ctx'> extern const struct peak_usb_adapter pcan_usb_fd;</div><div class='add'>+extern const struct peak_usb_adapter pcan_usb_chip;</div><div class='ctx'> extern const struct peak_usb_adapter pcan_usb_pro_fd;</div><div class='add'>+extern const struct peak_usb_adapter pcan_usb_x6;</div><div class='ctx'> </div><div class='ctx'> struct peak_time_ref {</div><div class='del'>-	struct timeval tv_host_0, tv_host;</div><div class='add'>+	ktime_t tv_host_0, tv_host;</div><div class='ctx'> 	u32 ts_dev_1, ts_dev_2;</div><div class='ctx'> 	u64 ts_total;</div><div class='ctx'> 	u32 tick_count;</div><div class='hunk'>@@ -102,7 +100,6 @@ struct peak_time_ref {</div><div class='ctx'> struct peak_tx_urb_context {</div><div class='ctx'> 	struct peak_usb_device *dev;</div><div class='ctx'> 	u32 echo_index;</div><div class='del'>-	u8 data_len;</div><div class='ctx'> 	struct urb *urb;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -116,8 +113,6 @@ struct peak_usb_device {</div><div class='ctx'> 	unsigned int ctrl_idx;</div><div class='ctx'> 	u32 state;</div><div class='ctx'> </div><div class='del'>-	struct sk_buff *echo_skb[PCAN_USB_MAX_TX_URBS];</div><div class='del'>-</div><div class='ctx'> 	struct usb_device *udev;</div><div class='ctx'> 	struct net_device *netdev;</div><div class='ctx'> </div><div class='hunk'>@@ -128,30 +123,34 @@ struct peak_usb_device {</div><div class='ctx'> 	u8 *cmd_buf;</div><div class='ctx'> 	struct usb_anchor rx_submitted;</div><div class='ctx'> </div><div class='del'>-	u32 device_number;</div><div class='add'>+	/* equivalent to the device ID in the Windows API */</div><div class='add'>+	u32 can_channel_id;</div><div class='ctx'> 	u8 device_rev;</div><div class='ctx'> </div><div class='ctx'> 	u8 ep_msg_in;</div><div class='ctx'> 	u8 ep_msg_out;</div><div class='ctx'> </div><div class='del'>-	u16 bus_load;</div><div class='del'>-</div><div class='ctx'> 	struct peak_usb_device *prev_siblings;</div><div class='ctx'> 	struct peak_usb_device *next_siblings;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-void pcan_dump_mem(char *prompt, void *p, int l);</div><div class='add'>+void pcan_dump_mem(const char *prompt, const void *p, int l);</div><div class='ctx'> </div><div class='ctx'> /* common timestamp management */</div><div class='ctx'> void peak_usb_init_time_ref(struct peak_time_ref *time_ref,</div><div class='ctx'> 			    const struct peak_usb_adapter *adapter);</div><div class='ctx'> void peak_usb_update_ts_now(struct peak_time_ref *time_ref, u32 ts_now);</div><div class='ctx'> void peak_usb_set_ts_now(struct peak_time_ref *time_ref, u32 ts_now);</div><div class='del'>-void peak_usb_get_ts_tv(struct peak_time_ref *time_ref, u32 ts,</div><div class='del'>-			struct timeval *tv);</div><div class='del'>-int peak_usb_netif_rx(struct sk_buff *skb,</div><div class='del'>-		      struct peak_time_ref *time_ref, u32 ts_low, u32 ts_high);</div><div class='add'>+void peak_usb_get_ts_time(struct peak_time_ref *time_ref, u32 ts, ktime_t *tv);</div><div class='add'>+int peak_usb_netif_rx_64(struct sk_buff *skb, u32 ts_low, u32 ts_high);</div><div class='ctx'> void peak_usb_async_complete(struct urb *urb);</div><div class='ctx'> void peak_usb_restart_complete(struct peak_usb_device *dev);</div><div class='del'>-</div><div class='add'>+int pcan_get_ts_info(struct net_device *dev, struct kernel_ethtool_ts_info *info);</div><div class='add'>+</div><div class='add'>+/* common 32-bit CAN channel ID ethtool management */</div><div class='add'>+int peak_usb_get_eeprom_len(struct net_device *netdev);</div><div class='add'>+int peak_usb_get_eeprom(struct net_device *netdev,</div><div class='add'>+			struct ethtool_eeprom *eeprom, u8 *data);</div><div class='add'>+int peak_usb_set_eeprom(struct net_device *netdev,</div><div class='add'>+			struct ethtool_eeprom *eeprom, u8 *data);</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/can/usb/peak_usb/pcan_usb_fd.c b/drivers/net/can/usb/peak_usb/pcan_usb_fd.c<br/>index 09d14e70abd7..be84191cde56 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/peak_usb/pcan_usb_fd.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/peak_usb/pcan_usb_fd.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/peak_usb/pcan_usb_fd.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/peak_usb/pcan_usb_fd.c</a></div><div class='hunk'>@@ -1,31 +1,22 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='ctx'>  * CAN driver for PEAK System PCAN-USB FD / PCAN-USB Pro FD adapter</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2013-2014 Stephane Grosjean &lt;s.grosjean@peak-system.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms of the GNU General Public License as published</div><div class='del'>- * by the Free Software Foundation; version 2 of the License.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='add'>+ * Copyright (C) 2013-2025 PEAK System-Technik GmbH</div><div class='add'>+ * Author: Stéphane Grosjean &lt;stephane.grosjean@hms-networks.com&gt;</div><div class='ctx'>  */</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/usb.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/can.h&gt;</div><div class='ctx'> #include &lt;linux/can/dev.h&gt;</div><div class='ctx'> #include &lt;linux/can/error.h&gt;</div><div class='add'>+#include &lt;linux/can/dev/peak_canfd.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "pcan_usb_core.h"</div><div class='ctx'> #include "pcan_usb_pro.h"</div><div class='del'>-#include "pcan_ucan.h"</div><div class='del'>-</div><div class='del'>-MODULE_SUPPORTED_DEVICE("PEAK-System PCAN-USB FD adapter");</div><div class='del'>-MODULE_SUPPORTED_DEVICE("PEAK-System PCAN-USB Pro FD adapter");</div><div class='ctx'> </div><div class='ctx'> #define PCAN_USBPROFD_CHANNEL_COUNT	2</div><div class='ctx'> #define PCAN_USBFD_CHANNEL_COUNT	1</div><div class='hunk'>@@ -43,7 +34,11 @@ MODULE_SUPPORTED_DEVICE("PEAK-System PCAN-USB Pro FD adapter");</div><div class='ctx'> #define PCAN_UFD_RX_BUFFER_SIZE		2048</div><div class='ctx'> #define PCAN_UFD_TX_BUFFER_SIZE		512</div><div class='ctx'> </div><div class='del'>-/* read some versions info from the hw devcie */</div><div class='add'>+/* struct pcan_ufd_fw_info::type */</div><div class='add'>+#define PCAN_USBFD_TYPE_STD		1</div><div class='add'>+#define PCAN_USBFD_TYPE_EXT		2	/* includes EP numbers */</div><div class='add'>+</div><div class='add'>+/* read some versions info from the hw device */</div><div class='ctx'> struct __packed pcan_ufd_fw_info {</div><div class='ctx'> 	__le16	size_of;	/* sizeof this */</div><div class='ctx'> 	__le16	type;		/* type of this structure */</div><div class='hunk'>@@ -54,6 +49,13 @@ struct __packed pcan_ufd_fw_info {</div><div class='ctx'> 	__le32	dev_id[2];	/* "device id" per CAN */</div><div class='ctx'> 	__le32	ser_no;		/* S/N */</div><div class='ctx'> 	__le32	flags;		/* special functions */</div><div class='add'>+</div><div class='add'>+	/* extended data when type &gt;= PCAN_USBFD_TYPE_EXT */</div><div class='add'>+	u8	cmd_out_ep;	/* ep for cmd */</div><div class='add'>+	u8	cmd_in_ep;	/* ep for replies */</div><div class='add'>+	u8	data_out_ep[2];	/* ep for CANx TX */</div><div class='add'>+	u8	data_in_ep;	/* ep for CAN RX */</div><div class='add'>+	u8	dummy[3];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* handle device specific info used by the netdevices */</div><div class='hunk'>@@ -146,6 +148,15 @@ struct __packed pcan_ufd_ovr_msg {</div><div class='ctx'> 	u8	unused[3];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define PCAN_UFD_CMD_DEVID_SET		0x81</div><div class='add'>+</div><div class='add'>+struct __packed pcan_ufd_device_id {</div><div class='add'>+	__le16	opcode_channel;</div><div class='add'>+</div><div class='add'>+	u16	unused;</div><div class='add'>+	__le32	device_id;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static inline int pufd_omsg_get_channel(struct pcan_ufd_ovr_msg *om)</div><div class='ctx'> {</div><div class='ctx'> 	return om-&gt;channel &amp; 0xf;</div><div class='hunk'>@@ -181,10 +192,13 @@ static inline void *pcan_usb_fd_cmd_buffer(struct peak_usb_device *dev)</div><div class='ctx'> /* send PCAN-USB Pro FD commands synchronously */</div><div class='ctx'> static int pcan_usb_fd_send_cmd(struct peak_usb_device *dev, void *cmd_tail)</div><div class='ctx'> {</div><div class='add'>+	struct pcan_usb_fd_device *pdev =</div><div class='add'>+		container_of(dev, struct pcan_usb_fd_device, dev);</div><div class='add'>+	struct pcan_ufd_fw_info *fw_info = &amp;pdev-&gt;usb_if-&gt;fw_info;</div><div class='ctx'> 	void *cmd_head = pcan_usb_fd_cmd_buffer(dev);</div><div class='ctx'> 	int err = 0;</div><div class='ctx'> 	u8 *packet_ptr;</div><div class='del'>-	int i, n = 1, packet_len;</div><div class='add'>+	int packet_len;</div><div class='ctx'> 	ptrdiff_t cmd_len;</div><div class='ctx'> </div><div class='ctx'> 	/* usb device unregistered? */</div><div class='hunk'>@@ -201,20 +215,16 @@ static int pcan_usb_fd_send_cmd(struct peak_usb_device *dev, void *cmd_tail)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	packet_ptr = cmd_head;</div><div class='add'>+	packet_len = cmd_len;</div><div class='ctx'> </div><div class='ctx'> 	/* firmware is not able to re-assemble 512 bytes buffer in full-speed */</div><div class='del'>-	if ((dev-&gt;udev-&gt;speed != USB_SPEED_HIGH) &amp;&amp;</div><div class='del'>-	    (cmd_len &gt; PCAN_UFD_LOSPD_PKT_SIZE)) {</div><div class='del'>-		packet_len = PCAN_UFD_LOSPD_PKT_SIZE;</div><div class='del'>-		n += cmd_len / packet_len;</div><div class='del'>-	} else {</div><div class='del'>-		packet_len = cmd_len;</div><div class='del'>-	}</div><div class='add'>+	if (unlikely(dev-&gt;udev-&gt;speed != USB_SPEED_HIGH))</div><div class='add'>+		packet_len = min(packet_len, PCAN_UFD_LOSPD_PKT_SIZE);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; n; i++) {</div><div class='add'>+	do {</div><div class='ctx'> 		err = usb_bulk_msg(dev-&gt;udev,</div><div class='ctx'> 				   usb_sndbulkpipe(dev-&gt;udev,</div><div class='del'>-						   PCAN_USBPRO_EP_CMDOUT),</div><div class='add'>+						   fw_info-&gt;cmd_out_ep),</div><div class='ctx'> 				   packet_ptr, packet_len,</div><div class='ctx'> 				   NULL, PCAN_UFD_CMD_TIMEOUT_MS);</div><div class='ctx'> 		if (err) {</div><div class='hunk'>@@ -224,11 +234,25 @@ static int pcan_usb_fd_send_cmd(struct peak_usb_device *dev, void *cmd_tail)</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		packet_ptr += packet_len;</div><div class='del'>-	}</div><div class='add'>+		cmd_len -= packet_len;</div><div class='add'>+</div><div class='add'>+		if (cmd_len &lt; PCAN_UFD_LOSPD_PKT_SIZE)</div><div class='add'>+			packet_len = cmd_len;</div><div class='add'>+</div><div class='add'>+	} while (packet_len &gt; 0);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int pcan_usb_fd_read_fwinfo(struct peak_usb_device *dev,</div><div class='add'>+				   struct pcan_ufd_fw_info *fw_info)</div><div class='add'>+{</div><div class='add'>+	return pcan_usb_pro_send_req(dev, PCAN_USBPRO_REQ_INFO,</div><div class='add'>+				     PCAN_USBPRO_INFO_FW,</div><div class='add'>+				     fw_info,</div><div class='add'>+				     sizeof(*fw_info));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* build the commands list in the given buffer, to enter operational mode */</div><div class='ctx'> static int pcan_usb_fd_build_restart_cmd(struct peak_usb_device *dev, u8 *buf)</div><div class='ctx'> {</div><div class='hunk'>@@ -238,7 +262,7 @@ static int pcan_usb_fd_build_restart_cmd(struct peak_usb_device *dev, u8 *buf)</div><div class='ctx'> </div><div class='ctx'> 	/* 1st, reset error counters: */</div><div class='ctx'> 	prc = (struct pucan_wr_err_cnt *)pc;</div><div class='del'>-	prc-&gt;opcode_channel = pucan_cmd_opcode_channel(dev,</div><div class='add'>+	prc-&gt;opcode_channel = pucan_cmd_opcode_channel(dev-&gt;ctrl_idx,</div><div class='ctx'> 						       PUCAN_CMD_WR_ERR_CNT);</div><div class='ctx'> </div><div class='ctx'> 	/* select both counters */</div><div class='hunk'>@@ -257,9 +281,10 @@ static int pcan_usb_fd_build_restart_cmd(struct peak_usb_device *dev, u8 *buf)</div><div class='ctx'> </div><div class='ctx'> 		puo-&gt;opcode_channel =</div><div class='ctx'> 			(dev-&gt;can.ctrlmode &amp; CAN_CTRLMODE_FD_NON_ISO) ?</div><div class='del'>-			pucan_cmd_opcode_channel(dev,</div><div class='add'>+			pucan_cmd_opcode_channel(dev-&gt;ctrl_idx,</div><div class='ctx'> 						 PUCAN_CMD_CLR_DIS_OPTION) :</div><div class='del'>-			pucan_cmd_opcode_channel(dev, PUCAN_CMD_SET_EN_OPTION);</div><div class='add'>+			pucan_cmd_opcode_channel(dev-&gt;ctrl_idx,</div><div class='add'>+						 PUCAN_CMD_SET_EN_OPTION);</div><div class='ctx'> </div><div class='ctx'> 		puo-&gt;options = cpu_to_le16(PUCAN_OPTION_CANDFDISO);</div><div class='ctx'> </div><div class='hunk'>@@ -274,7 +299,7 @@ static int pcan_usb_fd_build_restart_cmd(struct peak_usb_device *dev, u8 *buf)</div><div class='ctx'> </div><div class='ctx'> 	/* next, go back to operational mode */</div><div class='ctx'> 	cmd = (struct pucan_command *)pc;</div><div class='del'>-	cmd-&gt;opcode_channel = pucan_cmd_opcode_channel(dev,</div><div class='add'>+	cmd-&gt;opcode_channel = pucan_cmd_opcode_channel(dev-&gt;ctrl_idx,</div><div class='ctx'> 				(dev-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LISTENONLY) ?</div><div class='ctx'> 						PUCAN_CMD_LISTEN_ONLY_MODE :</div><div class='ctx'> 						PUCAN_CMD_NORMAL_MODE);</div><div class='hunk'>@@ -296,7 +321,7 @@ static int pcan_usb_fd_set_bus(struct peak_usb_device *dev, u8 onoff)</div><div class='ctx'> 		struct pucan_command *cmd = (struct pucan_command *)pc;</div><div class='ctx'> </div><div class='ctx'> 		/* build cmd to go back to reset mode */</div><div class='del'>-		cmd-&gt;opcode_channel = pucan_cmd_opcode_channel(dev,</div><div class='add'>+		cmd-&gt;opcode_channel = pucan_cmd_opcode_channel(dev-&gt;ctrl_idx,</div><div class='ctx'> 							PUCAN_CMD_RESET_MODE);</div><div class='ctx'> 		l = sizeof(struct pucan_command);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -332,7 +357,7 @@ static int pcan_usb_fd_set_filter_std(struct peak_usb_device *dev, int idx,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = idx; i &lt; n; i++, cmd++) {</div><div class='del'>-		cmd-&gt;opcode_channel = pucan_cmd_opcode_channel(dev,</div><div class='add'>+		cmd-&gt;opcode_channel = pucan_cmd_opcode_channel(dev-&gt;ctrl_idx,</div><div class='ctx'> 							PUCAN_CMD_FILTER_STD);</div><div class='ctx'> 		cmd-&gt;idx = cpu_to_le16(i);</div><div class='ctx'> 		cmd-&gt;mask = cpu_to_le32(mask);</div><div class='hunk'>@@ -352,7 +377,7 @@ static int pcan_usb_fd_set_options(struct peak_usb_device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct pcan_ufd_options *cmd = pcan_usb_fd_cmd_buffer(dev);</div><div class='ctx'> </div><div class='del'>-	cmd-&gt;opcode_channel = pucan_cmd_opcode_channel(dev,</div><div class='add'>+	cmd-&gt;opcode_channel = pucan_cmd_opcode_channel(dev-&gt;ctrl_idx,</div><div class='ctx'> 					(onoff) ? PUCAN_CMD_SET_EN_OPTION :</div><div class='ctx'> 						  PUCAN_CMD_CLR_DIS_OPTION);</div><div class='ctx'> </div><div class='hunk'>@@ -368,7 +393,7 @@ static int pcan_usb_fd_set_can_led(struct peak_usb_device *dev, u8 led_mode)</div><div class='ctx'> {</div><div class='ctx'> 	struct pcan_ufd_led *cmd = pcan_usb_fd_cmd_buffer(dev);</div><div class='ctx'> </div><div class='del'>-	cmd-&gt;opcode_channel = pucan_cmd_opcode_channel(dev,</div><div class='add'>+	cmd-&gt;opcode_channel = pucan_cmd_opcode_channel(dev-&gt;ctrl_idx,</div><div class='ctx'> 						       PCAN_UFD_CMD_LED_SET);</div><div class='ctx'> 	cmd-&gt;mode = led_mode;</div><div class='ctx'> </div><div class='hunk'>@@ -382,7 +407,7 @@ static int pcan_usb_fd_set_clock_domain(struct peak_usb_device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct pcan_ufd_clock *cmd = pcan_usb_fd_cmd_buffer(dev);</div><div class='ctx'> </div><div class='del'>-	cmd-&gt;opcode_channel = pucan_cmd_opcode_channel(dev,</div><div class='add'>+	cmd-&gt;opcode_channel = pucan_cmd_opcode_channel(dev-&gt;ctrl_idx,</div><div class='ctx'> 						       PCAN_UFD_CMD_CLK_SET);</div><div class='ctx'> 	cmd-&gt;mode = clk_mode;</div><div class='ctx'> </div><div class='hunk'>@@ -396,7 +421,7 @@ static int pcan_usb_fd_set_bittiming_slow(struct peak_usb_device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct pucan_timing_slow *cmd = pcan_usb_fd_cmd_buffer(dev);</div><div class='ctx'> </div><div class='del'>-	cmd-&gt;opcode_channel = pucan_cmd_opcode_channel(dev,</div><div class='add'>+	cmd-&gt;opcode_channel = pucan_cmd_opcode_channel(dev-&gt;ctrl_idx,</div><div class='ctx'> 						       PUCAN_CMD_TIMING_SLOW);</div><div class='ctx'> 	cmd-&gt;sjw_t = PUCAN_TSLOW_SJW_T(bt-&gt;sjw - 1,</div><div class='ctx'> 				dev-&gt;can.ctrlmode &amp; CAN_CTRLMODE_3_SAMPLES);</div><div class='hunk'>@@ -417,7 +442,7 @@ static int pcan_usb_fd_set_bittiming_fast(struct peak_usb_device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct pucan_timing_fast *cmd = pcan_usb_fd_cmd_buffer(dev);</div><div class='ctx'> </div><div class='del'>-	cmd-&gt;opcode_channel = pucan_cmd_opcode_channel(dev,</div><div class='add'>+	cmd-&gt;opcode_channel = pucan_cmd_opcode_channel(dev-&gt;ctrl_idx,</div><div class='ctx'> 						       PUCAN_CMD_TIMING_FAST);</div><div class='ctx'> 	cmd-&gt;sjw = PUCAN_TFAST_SJW(bt-&gt;sjw - 1);</div><div class='ctx'> 	cmd-&gt;tseg2 = PUCAN_TFAST_TSEG2(bt-&gt;phase_seg2 - 1);</div><div class='hunk'>@@ -428,12 +453,43 @@ static int pcan_usb_fd_set_bittiming_fast(struct peak_usb_device *dev,</div><div class='ctx'> 	return pcan_usb_fd_send_cmd(dev, ++cmd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* read user CAN channel id from device */</div><div class='add'>+static int pcan_usb_fd_get_can_channel_id(struct peak_usb_device *dev,</div><div class='add'>+					  u32 *can_ch_id)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	struct pcan_usb_fd_if *usb_if = pcan_usb_fd_dev_if(dev);</div><div class='add'>+</div><div class='add'>+	err = pcan_usb_fd_read_fwinfo(dev, &amp;usb_if-&gt;fw_info);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	*can_ch_id = le32_to_cpu(usb_if-&gt;fw_info.dev_id[dev-&gt;ctrl_idx]);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* set a new CAN channel id in the flash memory of the device */</div><div class='add'>+static int pcan_usb_fd_set_can_channel_id(struct peak_usb_device *dev, u32 can_ch_id)</div><div class='add'>+{</div><div class='add'>+	struct pcan_ufd_device_id *cmd = pcan_usb_fd_cmd_buffer(dev);</div><div class='add'>+</div><div class='add'>+	cmd-&gt;opcode_channel = pucan_cmd_opcode_channel(dev-&gt;ctrl_idx,</div><div class='add'>+						       PCAN_UFD_CMD_DEVID_SET);</div><div class='add'>+	cmd-&gt;device_id = cpu_to_le32(can_ch_id);</div><div class='add'>+</div><div class='add'>+	/* send the command */</div><div class='add'>+	return pcan_usb_fd_send_cmd(dev, ++cmd);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* handle restart but in asynchronously way</div><div class='ctx'>  * (uses PCAN-USB Pro code to complete asynchronous request)</div><div class='ctx'>  */</div><div class='ctx'> static int pcan_usb_fd_restart_async(struct peak_usb_device *dev,</div><div class='ctx'> 				     struct urb *urb, u8 *buf)</div><div class='ctx'> {</div><div class='add'>+	struct pcan_usb_fd_device *pdev =</div><div class='add'>+		container_of(dev, struct pcan_usb_fd_device, dev);</div><div class='add'>+	struct pcan_ufd_fw_info *fw_info = &amp;pdev-&gt;usb_if-&gt;fw_info;</div><div class='ctx'> 	u8 *pc = buf;</div><div class='ctx'> </div><div class='ctx'> 	/* build the entire cmds list in the provided buffer, to go back into</div><div class='hunk'>@@ -447,7 +503,7 @@ static int pcan_usb_fd_restart_async(struct peak_usb_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	/* complete the URB */</div><div class='ctx'> 	usb_fill_bulk_urb(urb, dev-&gt;udev,</div><div class='del'>-			  usb_sndbulkpipe(dev-&gt;udev, PCAN_USBPRO_EP_CMDOUT),</div><div class='add'>+			  usb_sndbulkpipe(dev-&gt;udev, fw_info-&gt;cmd_out_ep),</div><div class='ctx'> 			  buf, pc - buf,</div><div class='ctx'> 			  pcan_usb_pro_restart_complete, dev);</div><div class='ctx'> </div><div class='hunk'>@@ -474,12 +530,18 @@ static int pcan_usb_fd_decode_canmsg(struct pcan_usb_fd_if *usb_if,</div><div class='ctx'> 				     struct pucan_msg *rx_msg)</div><div class='ctx'> {</div><div class='ctx'> 	struct pucan_rx_msg *rm = (struct pucan_rx_msg *)rx_msg;</div><div class='del'>-	struct peak_usb_device *dev = usb_if-&gt;dev[pucan_msg_get_channel(rm)];</div><div class='del'>-	struct net_device *netdev = dev-&gt;netdev;</div><div class='add'>+	struct peak_usb_device *dev;</div><div class='add'>+	struct net_device *netdev;</div><div class='ctx'> 	struct canfd_frame *cfd;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	const u16 rx_msg_flags = le16_to_cpu(rm-&gt;flags);</div><div class='ctx'> </div><div class='add'>+	if (pucan_msg_get_channel(rm) &gt;= ARRAY_SIZE(usb_if-&gt;dev))</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	dev = usb_if-&gt;dev[pucan_msg_get_channel(rm)];</div><div class='add'>+	netdev = dev-&gt;netdev;</div><div class='add'>+</div><div class='ctx'> 	if (rx_msg_flags &amp; PUCAN_MSG_EXT_DATA_LEN) {</div><div class='ctx'> 		/* CANFD frame case */</div><div class='ctx'> 		skb = alloc_canfd_skb(netdev, &amp;cfd);</div><div class='hunk'>@@ -492,14 +554,16 @@ static int pcan_usb_fd_decode_canmsg(struct pcan_usb_fd_if *usb_if,</div><div class='ctx'> 		if (rx_msg_flags &amp; PUCAN_MSG_ERROR_STATE_IND)</div><div class='ctx'> 			cfd-&gt;flags |= CANFD_ESI;</div><div class='ctx'> </div><div class='del'>-		cfd-&gt;len = can_dlc2len(get_canfd_dlc(pucan_msg_get_dlc(rm)));</div><div class='add'>+		cfd-&gt;len = can_fd_dlc2len(pucan_msg_get_dlc(rm));</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* CAN 2.0 frame case */</div><div class='ctx'> 		skb = alloc_can_skb(netdev, (struct can_frame **)&amp;cfd);</div><div class='ctx'> 		if (!skb)</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-		cfd-&gt;len = get_can_dlc(pucan_msg_get_dlc(rm));</div><div class='add'>+		can_frame_set_cc_len((struct can_frame *)cfd,</div><div class='add'>+				     pucan_msg_get_dlc(rm),</div><div class='add'>+				     dev-&gt;can.ctrlmode);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	cfd-&gt;can_id = le32_to_cpu(rm-&gt;can_id);</div><div class='hunk'>@@ -507,16 +571,16 @@ static int pcan_usb_fd_decode_canmsg(struct pcan_usb_fd_if *usb_if,</div><div class='ctx'> 	if (rx_msg_flags &amp; PUCAN_MSG_EXT_ID)</div><div class='ctx'> 		cfd-&gt;can_id |= CAN_EFF_FLAG;</div><div class='ctx'> </div><div class='del'>-	if (rx_msg_flags &amp; PUCAN_MSG_RTR)</div><div class='add'>+	if (rx_msg_flags &amp; PUCAN_MSG_RTR) {</div><div class='ctx'> 		cfd-&gt;can_id |= CAN_RTR_FLAG;</div><div class='del'>-	else</div><div class='add'>+	} else {</div><div class='ctx'> 		memcpy(cfd-&gt;data, rm-&gt;d, cfd-&gt;len);</div><div class='del'>-</div><div class='del'>-	peak_usb_netif_rx(skb, &amp;usb_if-&gt;time_ref,</div><div class='del'>-			  le32_to_cpu(rm-&gt;ts_low), le32_to_cpu(rm-&gt;ts_high));</div><div class='del'>-</div><div class='add'>+		netdev-&gt;stats.rx_bytes += cfd-&gt;len;</div><div class='add'>+	}</div><div class='ctx'> 	netdev-&gt;stats.rx_packets++;</div><div class='del'>-	netdev-&gt;stats.rx_bytes += cfd-&gt;len;</div><div class='add'>+</div><div class='add'>+	peak_usb_netif_rx_64(skb, le32_to_cpu(rm-&gt;ts_low),</div><div class='add'>+			     le32_to_cpu(rm-&gt;ts_high));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -526,15 +590,21 @@ static int pcan_usb_fd_decode_status(struct pcan_usb_fd_if *usb_if,</div><div class='ctx'> 				     struct pucan_msg *rx_msg)</div><div class='ctx'> {</div><div class='ctx'> 	struct pucan_status_msg *sm = (struct pucan_status_msg *)rx_msg;</div><div class='del'>-	struct peak_usb_device *dev = usb_if-&gt;dev[pucan_stmsg_get_channel(sm)];</div><div class='del'>-	struct pcan_usb_fd_device *pdev =</div><div class='del'>-			container_of(dev, struct pcan_usb_fd_device, dev);</div><div class='add'>+	struct pcan_usb_fd_device *pdev;</div><div class='ctx'> 	enum can_state new_state = CAN_STATE_ERROR_ACTIVE;</div><div class='ctx'> 	enum can_state rx_state, tx_state;</div><div class='del'>-	struct net_device *netdev = dev-&gt;netdev;</div><div class='add'>+	struct peak_usb_device *dev;</div><div class='add'>+	struct net_device *netdev;</div><div class='ctx'> 	struct can_frame *cf;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> </div><div class='add'>+	if (pucan_stmsg_get_channel(sm) &gt;= ARRAY_SIZE(usb_if-&gt;dev))</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	dev = usb_if-&gt;dev[pucan_stmsg_get_channel(sm)];</div><div class='add'>+	pdev = container_of(dev, struct pcan_usb_fd_device, dev);</div><div class='add'>+	netdev = dev-&gt;netdev;</div><div class='add'>+</div><div class='ctx'> 	/* nothing should be sent while in BUS_OFF state */</div><div class='ctx'> 	if (dev-&gt;can.state == CAN_STATE_BUS_OFF)</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -546,11 +616,10 @@ static int pcan_usb_fd_decode_status(struct pcan_usb_fd_if *usb_if,</div><div class='ctx'> 	} else if (sm-&gt;channel_p_w_b &amp; PUCAN_BUS_WARNING) {</div><div class='ctx'> 		new_state = CAN_STATE_ERROR_WARNING;</div><div class='ctx'> 	} else {</div><div class='del'>-		/* no error bit (so, no error skb, back to active state) */</div><div class='del'>-		dev-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+		/* back to (or still in) ERROR_ACTIVE state */</div><div class='add'>+		new_state = CAN_STATE_ERROR_ACTIVE;</div><div class='ctx'> 		pdev-&gt;bec.txerr = 0;</div><div class='ctx'> 		pdev-&gt;bec.rxerr = 0;</div><div class='del'>-		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* state hasn't changed */</div><div class='hunk'>@@ -563,8 +632,7 @@ static int pcan_usb_fd_decode_status(struct pcan_usb_fd_if *usb_if,</div><div class='ctx'> </div><div class='ctx'> 	/* allocate an skb to store the error frame */</div><div class='ctx'> 	skb = alloc_can_err_skb(netdev, &amp;cf);</div><div class='del'>-	if (skb)</div><div class='del'>-		can_change_state(netdev, cf, tx_state, rx_state);</div><div class='add'>+	can_change_state(netdev, cf, tx_state, rx_state);</div><div class='ctx'> </div><div class='ctx'> 	/* things must be done even in case of OOM */</div><div class='ctx'> 	if (new_state == CAN_STATE_BUS_OFF)</div><div class='hunk'>@@ -573,11 +641,8 @@ static int pcan_usb_fd_decode_status(struct pcan_usb_fd_if *usb_if,</div><div class='ctx'> 	if (!skb)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	peak_usb_netif_rx(skb, &amp;usb_if-&gt;time_ref,</div><div class='del'>-			  le32_to_cpu(sm-&gt;ts_low), le32_to_cpu(sm-&gt;ts_high));</div><div class='del'>-</div><div class='del'>-	netdev-&gt;stats.rx_packets++;</div><div class='del'>-	netdev-&gt;stats.rx_bytes += cf-&gt;can_dlc;</div><div class='add'>+	peak_usb_netif_rx_64(skb, le32_to_cpu(sm-&gt;ts_low),</div><div class='add'>+			     le32_to_cpu(sm-&gt;ts_high));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -587,9 +652,14 @@ static int pcan_usb_fd_decode_error(struct pcan_usb_fd_if *usb_if,</div><div class='ctx'> 				    struct pucan_msg *rx_msg)</div><div class='ctx'> {</div><div class='ctx'> 	struct pucan_error_msg *er = (struct pucan_error_msg *)rx_msg;</div><div class='del'>-	struct peak_usb_device *dev = usb_if-&gt;dev[pucan_ermsg_get_channel(er)];</div><div class='del'>-	struct pcan_usb_fd_device *pdev =</div><div class='del'>-			container_of(dev, struct pcan_usb_fd_device, dev);</div><div class='add'>+	struct pcan_usb_fd_device *pdev;</div><div class='add'>+	struct peak_usb_device *dev;</div><div class='add'>+</div><div class='add'>+	if (pucan_ermsg_get_channel(er) &gt;= ARRAY_SIZE(usb_if-&gt;dev))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	dev = usb_if-&gt;dev[pucan_ermsg_get_channel(er)];</div><div class='add'>+	pdev = container_of(dev, struct pcan_usb_fd_device, dev);</div><div class='ctx'> </div><div class='ctx'> 	/* keep a trace of tx and rx error counters for later use */</div><div class='ctx'> 	pdev-&gt;bec.txerr = er-&gt;tx_err_cnt;</div><div class='hunk'>@@ -603,11 +673,17 @@ static int pcan_usb_fd_decode_overrun(struct pcan_usb_fd_if *usb_if,</div><div class='ctx'> 				      struct pucan_msg *rx_msg)</div><div class='ctx'> {</div><div class='ctx'> 	struct pcan_ufd_ovr_msg *ov = (struct pcan_ufd_ovr_msg *)rx_msg;</div><div class='del'>-	struct peak_usb_device *dev = usb_if-&gt;dev[pufd_omsg_get_channel(ov)];</div><div class='del'>-	struct net_device *netdev = dev-&gt;netdev;</div><div class='add'>+	struct peak_usb_device *dev;</div><div class='add'>+	struct net_device *netdev;</div><div class='ctx'> 	struct can_frame *cf;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> </div><div class='add'>+	if (pufd_omsg_get_channel(ov) &gt;= ARRAY_SIZE(usb_if-&gt;dev))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	dev = usb_if-&gt;dev[pufd_omsg_get_channel(ov)];</div><div class='add'>+	netdev = dev-&gt;netdev;</div><div class='add'>+</div><div class='ctx'> 	/* allocate an skb to store the error frame */</div><div class='ctx'> 	skb = alloc_can_err_skb(netdev, &amp;cf);</div><div class='ctx'> 	if (!skb)</div><div class='hunk'>@@ -616,8 +692,8 @@ static int pcan_usb_fd_decode_overrun(struct pcan_usb_fd_if *usb_if,</div><div class='ctx'> 	cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='ctx'> 	cf-&gt;data[1] |= CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='ctx'> </div><div class='del'>-	peak_usb_netif_rx(skb, &amp;usb_if-&gt;time_ref,</div><div class='del'>-			  le32_to_cpu(ov-&gt;ts_low), le32_to_cpu(ov-&gt;ts_high));</div><div class='add'>+	peak_usb_netif_rx_64(skb, le32_to_cpu(ov-&gt;ts_low),</div><div class='add'>+			     le32_to_cpu(ov-&gt;ts_high));</div><div class='ctx'> </div><div class='ctx'> 	netdev-&gt;stats.rx_over_errors++;</div><div class='ctx'> 	netdev-&gt;stats.rx_errors++;</div><div class='hunk'>@@ -723,7 +799,10 @@ static int pcan_usb_fd_encode_msg(struct peak_usb_device *dev,</div><div class='ctx'> 	struct pucan_tx_msg *tx_msg = (struct pucan_tx_msg *)obuf;</div><div class='ctx'> 	struct canfd_frame *cfd = (struct canfd_frame *)skb-&gt;data;</div><div class='ctx'> 	u16 tx_msg_size, tx_msg_flags;</div><div class='del'>-	u8 can_dlc;</div><div class='add'>+	u8 dlc;</div><div class='add'>+</div><div class='add'>+	if (cfd-&gt;len &gt; CANFD_MAX_DLEN)</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	tx_msg_size = ALIGN(sizeof(struct pucan_tx_msg) + cfd-&gt;len, 4);</div><div class='ctx'> 	tx_msg-&gt;size = cpu_to_le16(tx_msg_size);</div><div class='hunk'>@@ -739,7 +818,7 @@ static int pcan_usb_fd_encode_msg(struct peak_usb_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	if (can_is_canfd_skb(skb)) {</div><div class='ctx'> 		/* considering a CANFD frame */</div><div class='del'>-		can_dlc = can_len2dlc(cfd-&gt;len);</div><div class='add'>+		dlc = can_fd_len2dlc(cfd-&gt;len);</div><div class='ctx'> </div><div class='ctx'> 		tx_msg_flags |= PUCAN_MSG_EXT_DATA_LEN;</div><div class='ctx'> </div><div class='hunk'>@@ -750,14 +829,19 @@ static int pcan_usb_fd_encode_msg(struct peak_usb_device *dev,</div><div class='ctx'> 			tx_msg_flags |= PUCAN_MSG_ERROR_STATE_IND;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* CAND 2.0 frames */</div><div class='del'>-		can_dlc = cfd-&gt;len;</div><div class='add'>+		dlc = can_get_cc_dlc((struct can_frame *)cfd,</div><div class='add'>+				     dev-&gt;can.ctrlmode);</div><div class='ctx'> </div><div class='ctx'> 		if (cfd-&gt;can_id &amp; CAN_RTR_FLAG)</div><div class='ctx'> 			tx_msg_flags |= PUCAN_MSG_RTR;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Single-Shot frame */</div><div class='add'>+	if (dev-&gt;can.ctrlmode &amp; CAN_CTRLMODE_ONE_SHOT)</div><div class='add'>+		tx_msg_flags |= PUCAN_MSG_SINGLE_SHOT;</div><div class='add'>+</div><div class='ctx'> 	tx_msg-&gt;flags = cpu_to_le16(tx_msg_flags);</div><div class='del'>-	tx_msg-&gt;channel_dlc = PUCAN_MSG_CHANNEL_DLC(dev-&gt;ctrl_idx, can_dlc);</div><div class='add'>+	tx_msg-&gt;channel_dlc = PUCAN_MSG_CHANNEL_DLC(dev-&gt;ctrl_idx, dlc);</div><div class='ctx'> 	memcpy(tx_msg-&gt;d, cfd-&gt;data, cfd-&gt;len);</div><div class='ctx'> </div><div class='ctx'> 	/* add null size message to tag the end (messages are 32-bits aligned)</div><div class='hunk'>@@ -805,7 +889,7 @@ static int pcan_usb_fd_start(struct peak_usb_device *dev)</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* socket callback used to copy berr counters values receieved through USB */</div><div class='add'>+/* socket callback used to copy berr counters values received through USB */</div><div class='ctx'> static int pcan_usb_fd_get_berr_counter(const struct net_device *netdev,</div><div class='ctx'> 					struct can_berr_counter *bec)</div><div class='ctx'> {</div><div class='hunk'>@@ -819,6 +903,15 @@ static int pcan_usb_fd_get_berr_counter(const struct net_device *netdev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* probe function for all PCAN-USB FD family usb interfaces */</div><div class='add'>+static int pcan_usb_fd_probe(struct usb_interface *intf)</div><div class='add'>+{</div><div class='add'>+	struct usb_host_interface *iface_desc = &amp;intf-&gt;altsetting[0];</div><div class='add'>+</div><div class='add'>+	/* CAN interface is always interface #0 */</div><div class='add'>+	return iface_desc-&gt;desc.bInterfaceNumber;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* stop interface (last chance before set bus off) */</div><div class='ctx'> static int pcan_usb_fd_stop(struct peak_usb_device *dev)</div><div class='ctx'> {</div><div class='hunk'>@@ -840,6 +933,7 @@ static int pcan_usb_fd_init(struct peak_usb_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct pcan_usb_fd_device *pdev =</div><div class='ctx'> 			container_of(dev, struct pcan_usb_fd_device, dev);</div><div class='add'>+	struct pcan_ufd_fw_info *fw_info;</div><div class='ctx'> 	int i, err = -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	/* do this for 1st channel only */</div><div class='hunk'>@@ -850,7 +944,7 @@ static int pcan_usb_fd_init(struct peak_usb_device *dev)</div><div class='ctx'> 			goto err_out;</div><div class='ctx'> </div><div class='ctx'> 		/* allocate command buffer once for all for the interface */</div><div class='del'>-		pdev-&gt;cmd_buffer_addr = kmalloc(PCAN_UFD_CMD_BUFFER_SIZE,</div><div class='add'>+		pdev-&gt;cmd_buffer_addr = kzalloc(PCAN_UFD_CMD_BUFFER_SIZE,</div><div class='ctx'> 						GFP_KERNEL);</div><div class='ctx'> 		if (!pdev-&gt;cmd_buffer_addr)</div><div class='ctx'> 			goto err_out_1;</div><div class='hunk'>@@ -858,10 +952,9 @@ static int pcan_usb_fd_init(struct peak_usb_device *dev)</div><div class='ctx'> 		/* number of ts msgs to ignore before taking one into account */</div><div class='ctx'> 		pdev-&gt;usb_if-&gt;cm_ignore_count = 5;</div><div class='ctx'> </div><div class='del'>-		err = pcan_usb_pro_send_req(dev, PCAN_USBPRO_REQ_INFO,</div><div class='del'>-					    PCAN_USBPRO_INFO_FW,</div><div class='del'>-					    &amp;pdev-&gt;usb_if-&gt;fw_info,</div><div class='del'>-					    sizeof(pdev-&gt;usb_if-&gt;fw_info));</div><div class='add'>+		fw_info = &amp;pdev-&gt;usb_if-&gt;fw_info;</div><div class='add'>+</div><div class='add'>+		err = pcan_usb_fd_read_fwinfo(dev, fw_info);</div><div class='ctx'> 		if (err) {</div><div class='ctx'> 			dev_err(dev-&gt;netdev-&gt;dev.parent,</div><div class='ctx'> 				"unable to read %s firmware info (err %d)\n",</div><div class='hunk'>@@ -875,14 +968,14 @@ static int pcan_usb_fd_init(struct peak_usb_device *dev)</div><div class='ctx'> 		 */</div><div class='ctx'> 		dev_info(dev-&gt;netdev-&gt;dev.parent,</div><div class='ctx'> 			 "PEAK-System %s v%u fw v%u.%u.%u (%u channels)\n",</div><div class='del'>-			 dev-&gt;adapter-&gt;name, pdev-&gt;usb_if-&gt;fw_info.hw_version,</div><div class='del'>-			 pdev-&gt;usb_if-&gt;fw_info.fw_version[0],</div><div class='del'>-			 pdev-&gt;usb_if-&gt;fw_info.fw_version[1],</div><div class='del'>-			 pdev-&gt;usb_if-&gt;fw_info.fw_version[2],</div><div class='add'>+			 dev-&gt;adapter-&gt;name, fw_info-&gt;hw_version,</div><div class='add'>+			 fw_info-&gt;fw_version[0],</div><div class='add'>+			 fw_info-&gt;fw_version[1],</div><div class='add'>+			 fw_info-&gt;fw_version[2],</div><div class='ctx'> 			 dev-&gt;adapter-&gt;ctrl_count);</div><div class='ctx'> </div><div class='ctx'> 		/* check for ability to switch between ISO/non-ISO modes */</div><div class='del'>-		if (pdev-&gt;usb_if-&gt;fw_info.fw_version[0] &gt;= 2) {</div><div class='add'>+		if (fw_info-&gt;fw_version[0] &gt;= 2) {</div><div class='ctx'> 			/* firmware &gt;= 2.x supports ISO/non-ISO switching */</div><div class='ctx'> 			dev-&gt;can.ctrlmode_supported |= CAN_CTRLMODE_FD_NON_ISO;</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -890,6 +983,15 @@ static int pcan_usb_fd_init(struct peak_usb_device *dev)</div><div class='ctx'> 			dev-&gt;can.ctrlmode |= CAN_CTRLMODE_FD_NON_ISO;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		/* if vendor rsp type is greater than or equal to 2, then it</div><div class='add'>+		 * contains EP numbers to use for cmds pipes. If not, then</div><div class='add'>+		 * default EP should be used.</div><div class='add'>+		 */</div><div class='add'>+		if (le16_to_cpu(fw_info-&gt;type) &lt; PCAN_USBFD_TYPE_EXT) {</div><div class='add'>+			fw_info-&gt;cmd_out_ep = PCAN_USBPRO_EP_CMDOUT;</div><div class='add'>+			fw_info-&gt;cmd_in_ep = PCAN_USBPRO_EP_CMDIN;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		/* tell the hardware the can driver is running */</div><div class='ctx'> 		err = pcan_usb_fd_drv_loaded(dev, 1);</div><div class='ctx'> 		if (err) {</div><div class='hunk'>@@ -910,12 +1012,23 @@ static int pcan_usb_fd_init(struct peak_usb_device *dev)</div><div class='ctx'> 		/* do a copy of the ctrlmode[_supported] too */</div><div class='ctx'> 		dev-&gt;can.ctrlmode = ppdev-&gt;dev.can.ctrlmode;</div><div class='ctx'> 		dev-&gt;can.ctrlmode_supported = ppdev-&gt;dev.can.ctrlmode_supported;</div><div class='add'>+</div><div class='add'>+		fw_info = &amp;pdev-&gt;usb_if-&gt;fw_info;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	pdev-&gt;usb_if-&gt;dev[dev-&gt;ctrl_idx] = dev;</div><div class='del'>-	dev-&gt;device_number =</div><div class='add'>+	dev-&gt;can_channel_id =</div><div class='ctx'> 		le32_to_cpu(pdev-&gt;usb_if-&gt;fw_info.dev_id[dev-&gt;ctrl_idx]);</div><div class='ctx'> </div><div class='add'>+	/* if vendor rsp type is greater than or equal to 2, then it contains EP</div><div class='add'>+	 * numbers to use for data pipes. If not, then statically defined EP are</div><div class='add'>+	 * used (see peak_usb_create_dev()).</div><div class='add'>+	 */</div><div class='add'>+	if (le16_to_cpu(fw_info-&gt;type) &gt;= PCAN_USBFD_TYPE_EXT) {</div><div class='add'>+		dev-&gt;ep_msg_in = fw_info-&gt;data_in_ep;</div><div class='add'>+		dev-&gt;ep_msg_out = fw_info-&gt;data_out_ep[dev-&gt;ctrl_idx];</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* set clock domain */</div><div class='ctx'> 	for (i = 0; i &lt; ARRAY_SIZE(pcan_usb_fd_clk_freq); i++)</div><div class='ctx'> 		if (dev-&gt;adapter-&gt;clock.freq == pcan_usb_fd_clk_freq[i])</div><div class='hunk'>@@ -989,45 +1102,156 @@ static void pcan_usb_fd_free(struct peak_usb_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* blink LED's */</div><div class='add'>+static int pcan_usb_fd_set_phys_id(struct net_device *netdev,</div><div class='add'>+				   enum ethtool_phys_id_state state)</div><div class='add'>+{</div><div class='add'>+	struct peak_usb_device *dev = netdev_priv(netdev);</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	switch (state) {</div><div class='add'>+	case ETHTOOL_ID_ACTIVE:</div><div class='add'>+		err = pcan_usb_fd_set_can_led(dev, PCAN_UFD_LED_FAST);</div><div class='add'>+		break;</div><div class='add'>+	case ETHTOOL_ID_INACTIVE:</div><div class='add'>+		err = pcan_usb_fd_set_can_led(dev, PCAN_UFD_LED_DEF);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops pcan_usb_fd_ethtool_ops = {</div><div class='add'>+	.set_phys_id = pcan_usb_fd_set_phys_id,</div><div class='add'>+	.get_ts_info = pcan_get_ts_info,</div><div class='add'>+	.get_eeprom_len	= peak_usb_get_eeprom_len,</div><div class='add'>+	.get_eeprom = peak_usb_get_eeprom,</div><div class='add'>+	.set_eeprom = peak_usb_set_eeprom,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* describes the PCAN-USB FD adapter */</div><div class='add'>+static const struct can_bittiming_const pcan_usb_fd_const = {</div><div class='add'>+	.name = "pcan_usb_fd",</div><div class='add'>+	.tseg1_min = 1,</div><div class='add'>+	.tseg1_max = (1 &lt;&lt; PUCAN_TSLOW_TSGEG1_BITS),</div><div class='add'>+	.tseg2_min = 1,</div><div class='add'>+	.tseg2_max = (1 &lt;&lt; PUCAN_TSLOW_TSGEG2_BITS),</div><div class='add'>+	.sjw_max = (1 &lt;&lt; PUCAN_TSLOW_SJW_BITS),</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = (1 &lt;&lt; PUCAN_TSLOW_BRP_BITS),</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const pcan_usb_fd_data_const = {</div><div class='add'>+	.name = "pcan_usb_fd",</div><div class='add'>+	.tseg1_min = 1,</div><div class='add'>+	.tseg1_max = (1 &lt;&lt; PUCAN_TFAST_TSGEG1_BITS),</div><div class='add'>+	.tseg2_min = 1,</div><div class='add'>+	.tseg2_max = (1 &lt;&lt; PUCAN_TFAST_TSGEG2_BITS),</div><div class='add'>+	.sjw_max = (1 &lt;&lt; PUCAN_TFAST_SJW_BITS),</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = (1 &lt;&lt; PUCAN_TFAST_BRP_BITS),</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> const struct peak_usb_adapter pcan_usb_fd = {</div><div class='ctx'> 	.name = "PCAN-USB FD",</div><div class='ctx'> 	.device_id = PCAN_USBFD_PRODUCT_ID,</div><div class='ctx'> 	.ctrl_count = PCAN_USBFD_CHANNEL_COUNT,</div><div class='ctx'> 	.ctrlmode_supported = CAN_CTRLMODE_FD |</div><div class='del'>-			CAN_CTRLMODE_3_SAMPLES | CAN_CTRLMODE_LISTENONLY,</div><div class='add'>+			CAN_CTRLMODE_3_SAMPLES | CAN_CTRLMODE_LISTENONLY |</div><div class='add'>+			CAN_CTRLMODE_ONE_SHOT | CAN_CTRLMODE_CC_LEN8_DLC,</div><div class='ctx'> 	.clock = {</div><div class='ctx'> 		.freq = PCAN_UFD_CRYSTAL_HZ,</div><div class='ctx'> 	},</div><div class='del'>-	.bittiming_const = {</div><div class='del'>-		.name = "pcan_usb_fd",</div><div class='del'>-		.tseg1_min = 1,</div><div class='del'>-		.tseg1_max = 64,</div><div class='del'>-		.tseg2_min = 1,</div><div class='del'>-		.tseg2_max = 16,</div><div class='del'>-		.sjw_max = 16,</div><div class='del'>-		.brp_min = 1,</div><div class='del'>-		.brp_max = 1024,</div><div class='del'>-		.brp_inc = 1,</div><div class='del'>-	},</div><div class='del'>-	.data_bittiming_const = {</div><div class='del'>-		.name = "pcan_usb_fd",</div><div class='del'>-		.tseg1_min = 1,</div><div class='del'>-		.tseg1_max = 16,</div><div class='del'>-		.tseg2_min = 1,</div><div class='del'>-		.tseg2_max = 8,</div><div class='del'>-		.sjw_max = 4,</div><div class='del'>-		.brp_min = 1,</div><div class='del'>-		.brp_max = 1024,</div><div class='del'>-		.brp_inc = 1,</div><div class='add'>+	.bittiming_const = &amp;pcan_usb_fd_const,</div><div class='add'>+	.data_bittiming_const = &amp;pcan_usb_fd_data_const,</div><div class='add'>+</div><div class='add'>+	/* size of device private data */</div><div class='add'>+	.sizeof_dev_private = sizeof(struct pcan_usb_fd_device),</div><div class='add'>+</div><div class='add'>+	.ethtool_ops = &amp;pcan_usb_fd_ethtool_ops,</div><div class='add'>+</div><div class='add'>+	/* timestamps usage */</div><div class='add'>+	.ts_used_bits = 32,</div><div class='add'>+	.us_per_ts_scale = 1, /* us = (ts * scale) &gt;&gt; shift */</div><div class='add'>+	.us_per_ts_shift = 0,</div><div class='add'>+</div><div class='add'>+	/* give here messages in/out endpoints */</div><div class='add'>+	.ep_msg_in = PCAN_USBPRO_EP_MSGIN,</div><div class='add'>+	.ep_msg_out = {PCAN_USBPRO_EP_MSGOUT_0},</div><div class='add'>+</div><div class='add'>+	/* size of rx/tx usb buffers */</div><div class='add'>+	.rx_buffer_size = PCAN_UFD_RX_BUFFER_SIZE,</div><div class='add'>+	.tx_buffer_size = PCAN_UFD_TX_BUFFER_SIZE,</div><div class='add'>+</div><div class='add'>+	/* device callbacks */</div><div class='add'>+	.intf_probe = pcan_usb_fd_probe,</div><div class='add'>+	.dev_init = pcan_usb_fd_init,</div><div class='add'>+</div><div class='add'>+	.dev_exit = pcan_usb_fd_exit,</div><div class='add'>+	.dev_free = pcan_usb_fd_free,</div><div class='add'>+	.dev_set_bus = pcan_usb_fd_set_bus,</div><div class='add'>+	.dev_set_bittiming = pcan_usb_fd_set_bittiming_slow,</div><div class='add'>+	.dev_set_data_bittiming = pcan_usb_fd_set_bittiming_fast,</div><div class='add'>+	.dev_get_can_channel_id = pcan_usb_fd_get_can_channel_id,</div><div class='add'>+	.dev_set_can_channel_id = pcan_usb_fd_set_can_channel_id,</div><div class='add'>+	.dev_decode_buf = pcan_usb_fd_decode_buf,</div><div class='add'>+	.dev_start = pcan_usb_fd_start,</div><div class='add'>+	.dev_stop = pcan_usb_fd_stop,</div><div class='add'>+	.dev_restart_async = pcan_usb_fd_restart_async,</div><div class='add'>+	.dev_encode_msg = pcan_usb_fd_encode_msg,</div><div class='add'>+</div><div class='add'>+	.do_get_berr_counter = pcan_usb_fd_get_berr_counter,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* describes the PCAN-CHIP USB */</div><div class='add'>+static const struct can_bittiming_const pcan_usb_chip_const = {</div><div class='add'>+	.name = "pcan_chip_usb",</div><div class='add'>+	.tseg1_min = 1,</div><div class='add'>+	.tseg1_max = (1 &lt;&lt; PUCAN_TSLOW_TSGEG1_BITS),</div><div class='add'>+	.tseg2_min = 1,</div><div class='add'>+	.tseg2_max = (1 &lt;&lt; PUCAN_TSLOW_TSGEG2_BITS),</div><div class='add'>+	.sjw_max = (1 &lt;&lt; PUCAN_TSLOW_SJW_BITS),</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = (1 &lt;&lt; PUCAN_TSLOW_BRP_BITS),</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const pcan_usb_chip_data_const = {</div><div class='add'>+	.name = "pcan_chip_usb",</div><div class='add'>+	.tseg1_min = 1,</div><div class='add'>+	.tseg1_max = (1 &lt;&lt; PUCAN_TFAST_TSGEG1_BITS),</div><div class='add'>+	.tseg2_min = 1,</div><div class='add'>+	.tseg2_max = (1 &lt;&lt; PUCAN_TFAST_TSGEG2_BITS),</div><div class='add'>+	.sjw_max = (1 &lt;&lt; PUCAN_TFAST_SJW_BITS),</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = (1 &lt;&lt; PUCAN_TFAST_BRP_BITS),</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct peak_usb_adapter pcan_usb_chip = {</div><div class='add'>+	.name = "PCAN-Chip USB",</div><div class='add'>+	.device_id = PCAN_USBCHIP_PRODUCT_ID,</div><div class='add'>+	.ctrl_count = PCAN_USBFD_CHANNEL_COUNT,</div><div class='add'>+	.ctrlmode_supported = CAN_CTRLMODE_FD |</div><div class='add'>+		CAN_CTRLMODE_3_SAMPLES | CAN_CTRLMODE_LISTENONLY |</div><div class='add'>+		CAN_CTRLMODE_ONE_SHOT | CAN_CTRLMODE_CC_LEN8_DLC,</div><div class='add'>+	.clock = {</div><div class='add'>+		.freq = PCAN_UFD_CRYSTAL_HZ,</div><div class='ctx'> 	},</div><div class='add'>+	.bittiming_const = &amp;pcan_usb_chip_const,</div><div class='add'>+	.data_bittiming_const = &amp;pcan_usb_chip_data_const,</div><div class='ctx'> </div><div class='ctx'> 	/* size of device private data */</div><div class='ctx'> 	.sizeof_dev_private = sizeof(struct pcan_usb_fd_device),</div><div class='ctx'> </div><div class='add'>+	.ethtool_ops = &amp;pcan_usb_fd_ethtool_ops,</div><div class='add'>+</div><div class='ctx'> 	/* timestamps usage */</div><div class='ctx'> 	.ts_used_bits = 32,</div><div class='del'>-	.ts_period = 1000000, /* calibration period in ts. */</div><div class='ctx'> 	.us_per_ts_scale = 1, /* us = (ts * scale) &gt;&gt; shift */</div><div class='ctx'> 	.us_per_ts_shift = 0,</div><div class='ctx'> </div><div class='hunk'>@@ -1048,6 +1272,8 @@ const struct peak_usb_adapter pcan_usb_fd = {</div><div class='ctx'> 	.dev_set_bus = pcan_usb_fd_set_bus,</div><div class='ctx'> 	.dev_set_bittiming = pcan_usb_fd_set_bittiming_slow,</div><div class='ctx'> 	.dev_set_data_bittiming = pcan_usb_fd_set_bittiming_fast,</div><div class='add'>+	.dev_get_can_channel_id = pcan_usb_fd_get_can_channel_id,</div><div class='add'>+	.dev_set_can_channel_id = pcan_usb_fd_set_can_channel_id,</div><div class='ctx'> 	.dev_decode_buf = pcan_usb_fd_decode_buf,</div><div class='ctx'> 	.dev_start = pcan_usb_fd_start,</div><div class='ctx'> 	.dev_stop = pcan_usb_fd_stop,</div><div class='hunk'>@@ -1058,44 +1284,126 @@ const struct peak_usb_adapter pcan_usb_fd = {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* describes the PCAN-USB Pro FD adapter */</div><div class='add'>+static const struct can_bittiming_const pcan_usb_pro_fd_const = {</div><div class='add'>+	.name = "pcan_usb_pro_fd",</div><div class='add'>+	.tseg1_min = 1,</div><div class='add'>+	.tseg1_max = (1 &lt;&lt; PUCAN_TSLOW_TSGEG1_BITS),</div><div class='add'>+	.tseg2_min = 1,</div><div class='add'>+	.tseg2_max = (1 &lt;&lt; PUCAN_TSLOW_TSGEG2_BITS),</div><div class='add'>+	.sjw_max = (1 &lt;&lt; PUCAN_TSLOW_SJW_BITS),</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = (1 &lt;&lt; PUCAN_TSLOW_BRP_BITS),</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const pcan_usb_pro_fd_data_const = {</div><div class='add'>+	.name = "pcan_usb_pro_fd",</div><div class='add'>+	.tseg1_min = 1,</div><div class='add'>+	.tseg1_max = (1 &lt;&lt; PUCAN_TFAST_TSGEG1_BITS),</div><div class='add'>+	.tseg2_min = 1,</div><div class='add'>+	.tseg2_max = (1 &lt;&lt; PUCAN_TFAST_TSGEG2_BITS),</div><div class='add'>+	.sjw_max = (1 &lt;&lt; PUCAN_TFAST_SJW_BITS),</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = (1 &lt;&lt; PUCAN_TFAST_BRP_BITS),</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> const struct peak_usb_adapter pcan_usb_pro_fd = {</div><div class='ctx'> 	.name = "PCAN-USB Pro FD",</div><div class='ctx'> 	.device_id = PCAN_USBPROFD_PRODUCT_ID,</div><div class='ctx'> 	.ctrl_count = PCAN_USBPROFD_CHANNEL_COUNT,</div><div class='ctx'> 	.ctrlmode_supported = CAN_CTRLMODE_FD |</div><div class='del'>-			CAN_CTRLMODE_3_SAMPLES | CAN_CTRLMODE_LISTENONLY,</div><div class='add'>+			CAN_CTRLMODE_3_SAMPLES | CAN_CTRLMODE_LISTENONLY |</div><div class='add'>+			CAN_CTRLMODE_ONE_SHOT | CAN_CTRLMODE_CC_LEN8_DLC,</div><div class='ctx'> 	.clock = {</div><div class='ctx'> 		.freq = PCAN_UFD_CRYSTAL_HZ,</div><div class='ctx'> 	},</div><div class='del'>-	.bittiming_const = {</div><div class='del'>-		.name = "pcan_usb_pro_fd",</div><div class='del'>-		.tseg1_min = 1,</div><div class='del'>-		.tseg1_max = 64,</div><div class='del'>-		.tseg2_min = 1,</div><div class='del'>-		.tseg2_max = 16,</div><div class='del'>-		.sjw_max = 16,</div><div class='del'>-		.brp_min = 1,</div><div class='del'>-		.brp_max = 1024,</div><div class='del'>-		.brp_inc = 1,</div><div class='del'>-	},</div><div class='del'>-	.data_bittiming_const = {</div><div class='del'>-		.name = "pcan_usb_pro_fd",</div><div class='del'>-		.tseg1_min = 1,</div><div class='del'>-		.tseg1_max = 16,</div><div class='del'>-		.tseg2_min = 1,</div><div class='del'>-		.tseg2_max = 8,</div><div class='del'>-		.sjw_max = 4,</div><div class='del'>-		.brp_min = 1,</div><div class='del'>-		.brp_max = 1024,</div><div class='del'>-		.brp_inc = 1,</div><div class='add'>+	.bittiming_const = &amp;pcan_usb_pro_fd_const,</div><div class='add'>+	.data_bittiming_const = &amp;pcan_usb_pro_fd_data_const,</div><div class='add'>+</div><div class='add'>+	/* size of device private data */</div><div class='add'>+	.sizeof_dev_private = sizeof(struct pcan_usb_fd_device),</div><div class='add'>+</div><div class='add'>+	.ethtool_ops = &amp;pcan_usb_fd_ethtool_ops,</div><div class='add'>+</div><div class='add'>+	/* timestamps usage */</div><div class='add'>+	.ts_used_bits = 32,</div><div class='add'>+	.us_per_ts_scale = 1, /* us = (ts * scale) &gt;&gt; shift */</div><div class='add'>+	.us_per_ts_shift = 0,</div><div class='add'>+</div><div class='add'>+	/* give here messages in/out endpoints */</div><div class='add'>+	.ep_msg_in = PCAN_USBPRO_EP_MSGIN,</div><div class='add'>+	.ep_msg_out = {PCAN_USBPRO_EP_MSGOUT_0, PCAN_USBPRO_EP_MSGOUT_1},</div><div class='add'>+</div><div class='add'>+	/* size of rx/tx usb buffers */</div><div class='add'>+	.rx_buffer_size = PCAN_UFD_RX_BUFFER_SIZE,</div><div class='add'>+	.tx_buffer_size = PCAN_UFD_TX_BUFFER_SIZE,</div><div class='add'>+</div><div class='add'>+	/* device callbacks */</div><div class='add'>+	.intf_probe = pcan_usb_pro_probe,	/* same as PCAN-USB Pro */</div><div class='add'>+	.dev_init = pcan_usb_fd_init,</div><div class='add'>+</div><div class='add'>+	.dev_exit = pcan_usb_fd_exit,</div><div class='add'>+	.dev_free = pcan_usb_fd_free,</div><div class='add'>+	.dev_set_bus = pcan_usb_fd_set_bus,</div><div class='add'>+	.dev_set_bittiming = pcan_usb_fd_set_bittiming_slow,</div><div class='add'>+	.dev_set_data_bittiming = pcan_usb_fd_set_bittiming_fast,</div><div class='add'>+	.dev_get_can_channel_id = pcan_usb_fd_get_can_channel_id,</div><div class='add'>+	.dev_set_can_channel_id = pcan_usb_fd_set_can_channel_id,</div><div class='add'>+	.dev_decode_buf = pcan_usb_fd_decode_buf,</div><div class='add'>+	.dev_start = pcan_usb_fd_start,</div><div class='add'>+	.dev_stop = pcan_usb_fd_stop,</div><div class='add'>+	.dev_restart_async = pcan_usb_fd_restart_async,</div><div class='add'>+	.dev_encode_msg = pcan_usb_fd_encode_msg,</div><div class='add'>+</div><div class='add'>+	.do_get_berr_counter = pcan_usb_fd_get_berr_counter,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* describes the PCAN-USB X6 adapter */</div><div class='add'>+static const struct can_bittiming_const pcan_usb_x6_const = {</div><div class='add'>+	.name = "pcan_usb_x6",</div><div class='add'>+	.tseg1_min = 1,</div><div class='add'>+	.tseg1_max = (1 &lt;&lt; PUCAN_TSLOW_TSGEG1_BITS),</div><div class='add'>+	.tseg2_min = 1,</div><div class='add'>+	.tseg2_max = (1 &lt;&lt; PUCAN_TSLOW_TSGEG2_BITS),</div><div class='add'>+	.sjw_max = (1 &lt;&lt; PUCAN_TSLOW_SJW_BITS),</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = (1 &lt;&lt; PUCAN_TSLOW_BRP_BITS),</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct can_bittiming_const pcan_usb_x6_data_const = {</div><div class='add'>+	.name = "pcan_usb_x6",</div><div class='add'>+	.tseg1_min = 1,</div><div class='add'>+	.tseg1_max = (1 &lt;&lt; PUCAN_TFAST_TSGEG1_BITS),</div><div class='add'>+	.tseg2_min = 1,</div><div class='add'>+	.tseg2_max = (1 &lt;&lt; PUCAN_TFAST_TSGEG2_BITS),</div><div class='add'>+	.sjw_max = (1 &lt;&lt; PUCAN_TFAST_SJW_BITS),</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = (1 &lt;&lt; PUCAN_TFAST_BRP_BITS),</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct peak_usb_adapter pcan_usb_x6 = {</div><div class='add'>+	.name = "PCAN-USB X6",</div><div class='add'>+	.device_id = PCAN_USBX6_PRODUCT_ID,</div><div class='add'>+	.ctrl_count = PCAN_USBPROFD_CHANNEL_COUNT,</div><div class='add'>+	.ctrlmode_supported = CAN_CTRLMODE_FD |</div><div class='add'>+			CAN_CTRLMODE_3_SAMPLES | CAN_CTRLMODE_LISTENONLY |</div><div class='add'>+			CAN_CTRLMODE_ONE_SHOT | CAN_CTRLMODE_CC_LEN8_DLC,</div><div class='add'>+	.clock = {</div><div class='add'>+		.freq = PCAN_UFD_CRYSTAL_HZ,</div><div class='ctx'> 	},</div><div class='add'>+	.bittiming_const = &amp;pcan_usb_x6_const,</div><div class='add'>+	.data_bittiming_const = &amp;pcan_usb_x6_data_const,</div><div class='ctx'> </div><div class='ctx'> 	/* size of device private data */</div><div class='ctx'> 	.sizeof_dev_private = sizeof(struct pcan_usb_fd_device),</div><div class='ctx'> </div><div class='add'>+	.ethtool_ops = &amp;pcan_usb_fd_ethtool_ops,</div><div class='add'>+</div><div class='ctx'> 	/* timestamps usage */</div><div class='ctx'> 	.ts_used_bits = 32,</div><div class='del'>-	.ts_period = 1000000, /* calibration period in ts. */</div><div class='ctx'> 	.us_per_ts_scale = 1, /* us = (ts * scale) &gt;&gt; shift */</div><div class='ctx'> 	.us_per_ts_shift = 0,</div><div class='ctx'> </div><div class='hunk'>@@ -1116,6 +1424,8 @@ const struct peak_usb_adapter pcan_usb_pro_fd = {</div><div class='ctx'> 	.dev_set_bus = pcan_usb_fd_set_bus,</div><div class='ctx'> 	.dev_set_bittiming = pcan_usb_fd_set_bittiming_slow,</div><div class='ctx'> 	.dev_set_data_bittiming = pcan_usb_fd_set_bittiming_fast,</div><div class='add'>+	.dev_get_can_channel_id = pcan_usb_fd_get_can_channel_id,</div><div class='add'>+	.dev_set_can_channel_id = pcan_usb_fd_set_can_channel_id,</div><div class='ctx'> 	.dev_decode_buf = pcan_usb_fd_decode_buf,</div><div class='ctx'> 	.dev_start = pcan_usb_fd_start,</div><div class='ctx'> 	.dev_stop = pcan_usb_fd_stop,</div><div class='head'>diff --git a/drivers/net/can/usb/peak_usb/pcan_usb_pro.c b/drivers/net/can/usb/peak_usb/pcan_usb_pro.c<br/>index 7d61b3279798..7be286293b1a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/peak_usb/pcan_usb_pro.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/peak_usb/pcan_usb_pro.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/peak_usb/pcan_usb_pro.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/peak_usb/pcan_usb_pro.c</a></div><div class='hunk'>@@ -1,22 +1,15 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='ctx'>  * CAN driver for PEAK System PCAN-USB Pro adapter</div><div class='ctx'>  * Derived from the PCAN project file driver/src/pcan_usbpro.c</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2003-2011 PEAK System-Technik GmbH</div><div class='del'>- * Copyright (C) 2011-2012 Stephane Grosjean &lt;s.grosjean@peak-system.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms of the GNU General Public License as published</div><div class='del'>- * by the Free Software Foundation; version 2 of the License.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='add'>+ * Copyright (C) 2003-2025 PEAK System-Technik GmbH</div><div class='add'>+ * Author: Stéphane Grosjean &lt;stephane.grosjean@hms-networks.com&gt;</div><div class='ctx'>  */</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/usb.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/can.h&gt;</div><div class='ctx'> #include &lt;linux/can/dev.h&gt;</div><div class='hunk'>@@ -25,8 +18,6 @@</div><div class='ctx'> #include "pcan_usb_core.h"</div><div class='ctx'> #include "pcan_usb_pro.h"</div><div class='ctx'> </div><div class='del'>-MODULE_SUPPORTED_DEVICE("PEAK-System PCAN-USB Pro adapter");</div><div class='del'>-</div><div class='ctx'> #define PCAN_USBPRO_CHANNEL_COUNT	2</div><div class='ctx'> </div><div class='ctx'> /* PCAN-USB Pro adapter internal clock (MHz) */</div><div class='hunk'>@@ -46,6 +37,7 @@ MODULE_SUPPORTED_DEVICE("PEAK-System PCAN-USB Pro adapter");</div><div class='ctx'> </div><div class='ctx'> #define PCAN_USBPRO_RTR			0x01</div><div class='ctx'> #define PCAN_USBPRO_EXT			0x02</div><div class='add'>+#define PCAN_USBPRO_SS			0x08</div><div class='ctx'> </div><div class='ctx'> #define PCAN_USBPRO_CMD_BUFFER_SIZE	512</div><div class='ctx'> </div><div class='hunk'>@@ -84,6 +76,7 @@ static u16 pcan_usb_pro_sizeof_rec[256] = {</div><div class='ctx'> 	[PCAN_USBPRO_SETFILTR] = sizeof(struct pcan_usb_pro_filter),</div><div class='ctx'> 	[PCAN_USBPRO_SETTS] = sizeof(struct pcan_usb_pro_setts),</div><div class='ctx'> 	[PCAN_USBPRO_GETDEVID] = sizeof(struct pcan_usb_pro_devid),</div><div class='add'>+	[PCAN_USBPRO_SETDEVID] = sizeof(struct pcan_usb_pro_devid),</div><div class='ctx'> 	[PCAN_USBPRO_SETLED] = sizeof(struct pcan_usb_pro_setled),</div><div class='ctx'> 	[PCAN_USBPRO_RXMSG8] = sizeof(struct pcan_usb_pro_rxmsg),</div><div class='ctx'> 	[PCAN_USBPRO_RXMSG4] = sizeof(struct pcan_usb_pro_rxmsg) - 4,</div><div class='hunk'>@@ -127,7 +120,7 @@ static u8 *pcan_msg_init_empty(struct pcan_usb_pro_msg *pm,</div><div class='ctx'> /*</div><div class='ctx'>  * add one record to a message being built</div><div class='ctx'>  */</div><div class='del'>-static int pcan_msg_add_rec(struct pcan_usb_pro_msg *pm, u8 id, ...)</div><div class='add'>+static int pcan_msg_add_rec(struct pcan_usb_pro_msg *pm, int id, ...)</div><div class='ctx'> {</div><div class='ctx'> 	int len, i;</div><div class='ctx'> 	u8 *pc;</div><div class='hunk'>@@ -141,8 +134,10 @@ static int pcan_msg_add_rec(struct pcan_usb_pro_msg *pm, u8 id, ...)</div><div class='ctx'> 	switch (id) {</div><div class='ctx'> 	case PCAN_USBPRO_TXMSG8:</div><div class='ctx'> 		i += 4;</div><div class='add'>+		fallthrough;</div><div class='ctx'> 	case PCAN_USBPRO_TXMSG4:</div><div class='ctx'> 		i += 4;</div><div class='add'>+		fallthrough;</div><div class='ctx'> 	case PCAN_USBPRO_TXMSG0:</div><div class='ctx'> 		*pc++ = va_arg(ap, int);</div><div class='ctx'> 		*pc++ = va_arg(ap, int);</div><div class='hunk'>@@ -155,6 +150,7 @@ static int pcan_msg_add_rec(struct pcan_usb_pro_msg *pm, u8 id, ...)</div><div class='ctx'> </div><div class='ctx'> 	case PCAN_USBPRO_SETBTR:</div><div class='ctx'> 	case PCAN_USBPRO_GETDEVID:</div><div class='add'>+	case PCAN_USBPRO_SETDEVID:</div><div class='ctx'> 		*pc++ = va_arg(ap, int);</div><div class='ctx'> 		pc += 2;</div><div class='ctx'> 		*(__le32 *)pc = cpu_to_le32(va_arg(ap, u32));</div><div class='hunk'>@@ -192,7 +188,7 @@ static int pcan_msg_add_rec(struct pcan_usb_pro_msg *pm, u8 id, ...)</div><div class='ctx'> </div><div class='ctx'> 	len = pc - pm-&gt;rec_ptr;</div><div class='ctx'> 	if (len &gt; 0) {</div><div class='del'>-		*pm-&gt;u.rec_cnt = cpu_to_le32(le32_to_cpu(*pm-&gt;u.rec_cnt) + 1);</div><div class='add'>+		le32_add_cpu(pm-&gt;u.rec_cnt, 1);</div><div class='ctx'> 		*pm-&gt;rec_ptr = id;</div><div class='ctx'> </div><div class='ctx'> 		pm-&gt;rec_ptr = pc;</div><div class='hunk'>@@ -296,7 +292,7 @@ static int pcan_usb_pro_wait_rsp(struct peak_usb_device *dev,</div><div class='ctx'> 					   pr-&gt;data_type);</div><div class='ctx'> </div><div class='ctx'> 			/* check if channel in response corresponds too */</div><div class='del'>-			else if ((req_channel != 0xff) &amp;&amp; \</div><div class='add'>+			else if ((req_channel != 0xff) &amp;&amp;</div><div class='ctx'> 				(pr-&gt;bus_act.channel != req_channel))</div><div class='ctx'> 				netdev_err(dev-&gt;netdev,</div><div class='ctx'> 					"got rsp %xh but on chan%u: ignored\n",</div><div class='hunk'>@@ -425,8 +421,8 @@ static int pcan_usb_pro_set_led(struct peak_usb_device *dev, u8 mode,</div><div class='ctx'> 	return pcan_usb_pro_send_cmd(dev, &amp;um);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pcan_usb_pro_get_device_id(struct peak_usb_device *dev,</div><div class='del'>-				      u32 *device_id)</div><div class='add'>+static int pcan_usb_pro_get_can_channel_id(struct peak_usb_device *dev,</div><div class='add'>+					   u32 *can_ch_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct pcan_usb_pro_devid *pdn;</div><div class='ctx'> 	struct pcan_usb_pro_msg um;</div><div class='hunk'>@@ -445,12 +441,23 @@ static int pcan_usb_pro_get_device_id(struct peak_usb_device *dev,</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='ctx'> 	pdn = (struct pcan_usb_pro_devid *)pc;</div><div class='del'>-	if (device_id)</div><div class='del'>-		*device_id = le32_to_cpu(pdn-&gt;serial_num);</div><div class='add'>+	*can_ch_id = le32_to_cpu(pdn-&gt;dev_num);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int pcan_usb_pro_set_can_channel_id(struct peak_usb_device *dev,</div><div class='add'>+					   u32 can_ch_id)</div><div class='add'>+{</div><div class='add'>+	struct pcan_usb_pro_msg um;</div><div class='add'>+</div><div class='add'>+	pcan_msg_init_empty(&amp;um, dev-&gt;cmd_buf, PCAN_USB_MAX_CMD_LEN);</div><div class='add'>+	pcan_msg_add_rec(&amp;um, PCAN_USBPRO_SETDEVID, dev-&gt;ctrl_idx,</div><div class='add'>+			 can_ch_id);</div><div class='add'>+</div><div class='add'>+	return pcan_usb_pro_send_cmd(dev, &amp;um);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int pcan_usb_pro_set_bittiming(struct peak_usb_device *dev,</div><div class='ctx'> 				      struct can_bittiming *bt)</div><div class='ctx'> {</div><div class='hunk'>@@ -500,7 +507,7 @@ static int pcan_usb_pro_drv_loaded(struct peak_usb_device *dev, int loaded)</div><div class='ctx'> 	u8 *buffer;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	buffer = kmalloc(PCAN_USBPRO_FCT_DRVLD_REQ_LEN, GFP_KERNEL);</div><div class='add'>+	buffer = kzalloc(PCAN_USBPRO_FCT_DRVLD_REQ_LEN, GFP_KERNEL);</div><div class='ctx'> 	if (!buffer)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -531,7 +538,6 @@ static int pcan_usb_pro_handle_canmsg(struct pcan_usb_pro_interface *usb_if,</div><div class='ctx'> 	struct net_device *netdev = dev-&gt;netdev;</div><div class='ctx'> 	struct can_frame *can_frame;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='del'>-	struct timeval tv;</div><div class='ctx'> 	struct skb_shared_hwtstamps *hwts;</div><div class='ctx'> </div><div class='ctx'> 	skb = alloc_can_skb(netdev, &amp;can_frame);</div><div class='hunk'>@@ -539,22 +545,24 @@ static int pcan_usb_pro_handle_canmsg(struct pcan_usb_pro_interface *usb_if,</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	can_frame-&gt;can_id = le32_to_cpu(rx-&gt;id);</div><div class='del'>-	can_frame-&gt;can_dlc = rx-&gt;len &amp; 0x0f;</div><div class='add'>+	can_frame-&gt;len = rx-&gt;len &amp; 0x0f;</div><div class='ctx'> </div><div class='ctx'> 	if (rx-&gt;flags &amp; PCAN_USBPRO_EXT)</div><div class='ctx'> 		can_frame-&gt;can_id |= CAN_EFF_FLAG;</div><div class='ctx'> </div><div class='del'>-	if (rx-&gt;flags &amp; PCAN_USBPRO_RTR)</div><div class='add'>+	if (rx-&gt;flags &amp; PCAN_USBPRO_RTR) {</div><div class='ctx'> 		can_frame-&gt;can_id |= CAN_RTR_FLAG;</div><div class='del'>-	else</div><div class='del'>-		memcpy(can_frame-&gt;data, rx-&gt;data, can_frame-&gt;can_dlc);</div><div class='add'>+	} else {</div><div class='add'>+		memcpy(can_frame-&gt;data, rx-&gt;data, can_frame-&gt;len);</div><div class='add'>+</div><div class='add'>+		netdev-&gt;stats.rx_bytes += can_frame-&gt;len;</div><div class='add'>+	}</div><div class='add'>+	netdev-&gt;stats.rx_packets++;</div><div class='ctx'> </div><div class='del'>-	peak_usb_get_ts_tv(&amp;usb_if-&gt;time_ref, le32_to_cpu(rx-&gt;ts32), &amp;tv);</div><div class='ctx'> 	hwts = skb_hwtstamps(skb);</div><div class='del'>-	hwts-&gt;hwtstamp = timeval_to_ktime(tv);</div><div class='add'>+	peak_usb_get_ts_time(&amp;usb_if-&gt;time_ref, le32_to_cpu(rx-&gt;ts32),</div><div class='add'>+			     &amp;hwts-&gt;hwtstamp);</div><div class='ctx'> </div><div class='del'>-	netdev-&gt;stats.rx_packets++;</div><div class='del'>-	netdev-&gt;stats.rx_bytes += can_frame-&gt;can_dlc;</div><div class='ctx'> 	netif_rx(skb);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -571,7 +579,6 @@ static int pcan_usb_pro_handle_error(struct pcan_usb_pro_interface *usb_if,</div><div class='ctx'> 	enum can_state new_state = CAN_STATE_ERROR_ACTIVE;</div><div class='ctx'> 	u8 err_mask = 0;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='del'>-	struct timeval tv;</div><div class='ctx'> 	struct skb_shared_hwtstamps *hwts;</div><div class='ctx'> </div><div class='ctx'> 	/* nothing should be sent while in BUS_OFF state */</div><div class='hunk'>@@ -667,11 +674,8 @@ static int pcan_usb_pro_handle_error(struct pcan_usb_pro_interface *usb_if,</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;can.state = new_state;</div><div class='ctx'> </div><div class='del'>-	peak_usb_get_ts_tv(&amp;usb_if-&gt;time_ref, le32_to_cpu(er-&gt;ts32), &amp;tv);</div><div class='ctx'> 	hwts = skb_hwtstamps(skb);</div><div class='del'>-	hwts-&gt;hwtstamp = timeval_to_ktime(tv);</div><div class='del'>-	netdev-&gt;stats.rx_packets++;</div><div class='del'>-	netdev-&gt;stats.rx_bytes += can_frame-&gt;can_dlc;</div><div class='add'>+	peak_usb_get_ts_time(&amp;usb_if-&gt;time_ref, le32_to_cpu(er-&gt;ts32), &amp;hwts-&gt;hwtstamp);</div><div class='ctx'> 	netif_rx(skb);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -776,20 +780,24 @@ static int pcan_usb_pro_encode_msg(struct peak_usb_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	pcan_msg_init_empty(&amp;usb_msg, obuf, *size);</div><div class='ctx'> </div><div class='del'>-	if ((cf-&gt;can_id &amp; CAN_RTR_FLAG) || (cf-&gt;can_dlc == 0))</div><div class='add'>+	if ((cf-&gt;can_id &amp; CAN_RTR_FLAG) || (cf-&gt;len == 0))</div><div class='ctx'> 		data_type = PCAN_USBPRO_TXMSG0;</div><div class='del'>-	else if (cf-&gt;can_dlc &lt;= 4)</div><div class='add'>+	else if (cf-&gt;len &lt;= 4)</div><div class='ctx'> 		data_type = PCAN_USBPRO_TXMSG4;</div><div class='ctx'> 	else</div><div class='ctx'> 		data_type = PCAN_USBPRO_TXMSG8;</div><div class='ctx'> </div><div class='del'>-	len = (dev-&gt;ctrl_idx &lt;&lt; 4) | (cf-&gt;can_dlc &amp; 0x0f);</div><div class='add'>+	len = (dev-&gt;ctrl_idx &lt;&lt; 4) | (cf-&gt;len &amp; 0x0f);</div><div class='ctx'> </div><div class='ctx'> 	flags = 0;</div><div class='ctx'> 	if (cf-&gt;can_id &amp; CAN_EFF_FLAG)</div><div class='del'>-		flags |= 0x02;</div><div class='add'>+		flags |= PCAN_USBPRO_EXT;</div><div class='ctx'> 	if (cf-&gt;can_id &amp; CAN_RTR_FLAG)</div><div class='del'>-		flags |= 0x01;</div><div class='add'>+		flags |= PCAN_USBPRO_RTR;</div><div class='add'>+</div><div class='add'>+	/* Single-Shot frame */</div><div class='add'>+	if (dev-&gt;can.ctrlmode &amp; CAN_CTRLMODE_ONE_SHOT)</div><div class='add'>+		flags |= PCAN_USBPRO_SS;</div><div class='ctx'> </div><div class='ctx'> 	pcan_msg_add_rec(&amp;usb_msg, data_type, 0, flags, len, cf-&gt;can_id,</div><div class='ctx'> 			 cf-&gt;data);</div><div class='hunk'>@@ -917,7 +925,7 @@ static int pcan_usb_pro_init(struct peak_usb_device *dev)</div><div class='ctx'> 	usb_if-&gt;dev[dev-&gt;ctrl_idx] = dev;</div><div class='ctx'> </div><div class='ctx'> 	/* set LED in default state (end of init phase) */</div><div class='del'>-	pcan_usb_pro_set_led(dev, 0, 1);</div><div class='add'>+	pcan_usb_pro_set_led(dev, PCAN_USBPRO_LED_DEVICE, 1);</div><div class='ctx'> </div><div class='ctx'> 	kfree(bi);</div><div class='ctx'> 	kfree(fi);</div><div class='hunk'>@@ -982,7 +990,7 @@ int pcan_usb_pro_probe(struct usb_interface *intf)</div><div class='ctx'> 		struct usb_endpoint_descriptor *ep = &amp;if_desc-&gt;endpoint[i].desc;</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='del'>-		 * below is the list of valid ep addreses. Any other ep address</div><div class='add'>+		 * below is the list of valid ep addresses. Any other ep address</div><div class='ctx'> 		 * is considered as not-CAN interface address =&gt; no dev created</div><div class='ctx'> 		 */</div><div class='ctx'> 		switch (ep-&gt;bEndpointAddress) {</div><div class='hunk'>@@ -1001,35 +1009,72 @@ int pcan_usb_pro_probe(struct usb_interface *intf)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int pcan_usb_pro_set_phys_id(struct net_device *netdev,</div><div class='add'>+				    enum ethtool_phys_id_state state)</div><div class='add'>+{</div><div class='add'>+	struct peak_usb_device *dev = netdev_priv(netdev);</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	switch (state) {</div><div class='add'>+	case ETHTOOL_ID_ACTIVE:</div><div class='add'>+		/* fast blinking forever */</div><div class='add'>+		err = pcan_usb_pro_set_led(dev, PCAN_USBPRO_LED_BLINK_FAST,</div><div class='add'>+					   0xffffffff);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case ETHTOOL_ID_INACTIVE:</div><div class='add'>+		/* restore LED default */</div><div class='add'>+		err = pcan_usb_pro_set_led(dev, PCAN_USBPRO_LED_DEVICE, 1);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops pcan_usb_pro_ethtool_ops = {</div><div class='add'>+	.set_phys_id = pcan_usb_pro_set_phys_id,</div><div class='add'>+	.get_ts_info = pcan_get_ts_info,</div><div class='add'>+	.get_eeprom_len	= peak_usb_get_eeprom_len,</div><div class='add'>+	.get_eeprom = peak_usb_get_eeprom,</div><div class='add'>+	.set_eeprom = peak_usb_set_eeprom,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * describe the PCAN-USB Pro adapter</div><div class='ctx'>  */</div><div class='add'>+static const struct can_bittiming_const pcan_usb_pro_const = {</div><div class='add'>+	.name = "pcan_usb_pro",</div><div class='add'>+	.tseg1_min = 1,</div><div class='add'>+	.tseg1_max = 16,</div><div class='add'>+	.tseg2_min = 1,</div><div class='add'>+	.tseg2_max = 8,</div><div class='add'>+	.sjw_max = 4,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 1024,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> const struct peak_usb_adapter pcan_usb_pro = {</div><div class='ctx'> 	.name = "PCAN-USB Pro",</div><div class='ctx'> 	.device_id = PCAN_USBPRO_PRODUCT_ID,</div><div class='ctx'> 	.ctrl_count = PCAN_USBPRO_CHANNEL_COUNT,</div><div class='del'>-	.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES | CAN_CTRLMODE_LISTENONLY,</div><div class='add'>+	.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES | CAN_CTRLMODE_LISTENONLY |</div><div class='add'>+			      CAN_CTRLMODE_ONE_SHOT,</div><div class='ctx'> 	.clock = {</div><div class='ctx'> 		.freq = PCAN_USBPRO_CRYSTAL_HZ,</div><div class='ctx'> 	},</div><div class='del'>-	.bittiming_const = {</div><div class='del'>-		.name = "pcan_usb_pro",</div><div class='del'>-		.tseg1_min = 1,</div><div class='del'>-		.tseg1_max = 16,</div><div class='del'>-		.tseg2_min = 1,</div><div class='del'>-		.tseg2_max = 8,</div><div class='del'>-		.sjw_max = 4,</div><div class='del'>-		.brp_min = 1,</div><div class='del'>-		.brp_max = 1024,</div><div class='del'>-		.brp_inc = 1,</div><div class='del'>-	},</div><div class='add'>+	.bittiming_const = &amp;pcan_usb_pro_const,</div><div class='ctx'> </div><div class='ctx'> 	/* size of device private data */</div><div class='ctx'> 	.sizeof_dev_private = sizeof(struct pcan_usb_pro_device),</div><div class='ctx'> </div><div class='add'>+	.ethtool_ops = &amp;pcan_usb_pro_ethtool_ops,</div><div class='add'>+</div><div class='ctx'> 	/* timestamps usage */</div><div class='ctx'> 	.ts_used_bits = 32,</div><div class='del'>-	.ts_period = 1000000, /* calibration period in ts. */</div><div class='ctx'> 	.us_per_ts_scale = 1, /* us = (ts * scale) &gt;&gt; shift */</div><div class='ctx'> 	.us_per_ts_shift = 0,</div><div class='ctx'> </div><div class='hunk'>@@ -1048,7 +1093,8 @@ const struct peak_usb_adapter pcan_usb_pro = {</div><div class='ctx'> 	.dev_free = pcan_usb_pro_free,</div><div class='ctx'> 	.dev_set_bus = pcan_usb_pro_set_bus,</div><div class='ctx'> 	.dev_set_bittiming = pcan_usb_pro_set_bittiming,</div><div class='del'>-	.dev_get_device_id = pcan_usb_pro_get_device_id,</div><div class='add'>+	.dev_get_can_channel_id = pcan_usb_pro_get_can_channel_id,</div><div class='add'>+	.dev_set_can_channel_id = pcan_usb_pro_set_can_channel_id,</div><div class='ctx'> 	.dev_decode_buf = pcan_usb_pro_decode_buf,</div><div class='ctx'> 	.dev_encode_msg = pcan_usb_pro_encode_msg,</div><div class='ctx'> 	.dev_start = pcan_usb_pro_start,</div><div class='head'>diff --git a/drivers/net/can/usb/peak_usb/pcan_usb_pro.h b/drivers/net/can/usb/peak_usb/pcan_usb_pro.h<br/>index a62f7ab8980f..162c7546d3a8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/peak_usb/pcan_usb_pro.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/peak_usb/pcan_usb_pro.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/peak_usb/pcan_usb_pro.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/peak_usb/pcan_usb_pro.h</a></div><div class='hunk'>@@ -1,18 +1,10 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='ctx'> /*</div><div class='ctx'>  * CAN driver for PEAK System PCAN-USB Pro adapter</div><div class='ctx'>  * Derived from the PCAN project file driver/src/pcan_usbpro_fw.h</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2003-2011 PEAK System-Technik GmbH</div><div class='del'>- * Copyright (C) 2011-2012 Stephane Grosjean &lt;s.grosjean@peak-system.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms of the GNU General Public License as published</div><div class='del'>- * by the Free Software Foundation; version 2 of the License.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='add'>+ * Copyright (C) 2003-2025 PEAK System-Technik GmbH</div><div class='add'>+ * Author: Stéphane Grosjean &lt;stephane.grosjean@hms-networks.com&gt;</div><div class='ctx'>  */</div><div class='ctx'> #ifndef PCAN_USB_PRO_H</div><div class='ctx'> #define PCAN_USB_PRO_H</div><div class='hunk'>@@ -42,11 +34,11 @@</div><div class='ctx'> /* PCAN_USBPRO_INFO_BL vendor request record type */</div><div class='ctx'> struct __packed pcan_usb_pro_blinfo {</div><div class='ctx'> 	__le32 ctrl_type;</div><div class='del'>-	u8  version[4];</div><div class='del'>-	u8  day;</div><div class='del'>-	u8  month;</div><div class='del'>-	u8  year;</div><div class='del'>-	u8  dummy;</div><div class='add'>+	u8 version[4];</div><div class='add'>+	u8 day;</div><div class='add'>+	u8 month;</div><div class='add'>+	u8 year;</div><div class='add'>+	u8 dummy;</div><div class='ctx'> 	__le32 serial_num_hi;</div><div class='ctx'> 	__le32 serial_num_lo;</div><div class='ctx'> 	__le32 hw_type;</div><div class='hunk'>@@ -56,11 +48,11 @@ struct __packed pcan_usb_pro_blinfo {</div><div class='ctx'> /* PCAN_USBPRO_INFO_FW vendor request record type */</div><div class='ctx'> struct __packed pcan_usb_pro_fwinfo {</div><div class='ctx'> 	__le32 ctrl_type;</div><div class='del'>-	u8  version[4];</div><div class='del'>-	u8  day;</div><div class='del'>-	u8  month;</div><div class='del'>-	u8  year;</div><div class='del'>-	u8  dummy;</div><div class='add'>+	u8 version[4];</div><div class='add'>+	u8 day;</div><div class='add'>+	u8 month;</div><div class='add'>+	u8 year;</div><div class='add'>+	u8 dummy;</div><div class='ctx'> 	__le32 fw_type;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -70,6 +62,7 @@ struct __packed pcan_usb_pro_fwinfo {</div><div class='ctx'> #define PCAN_USBPRO_SETBTR	0x02</div><div class='ctx'> #define PCAN_USBPRO_SETBUSACT	0x04</div><div class='ctx'> #define PCAN_USBPRO_SETSILENT	0x05</div><div class='add'>+#define PCAN_USBPRO_SETDEVID	0x06</div><div class='ctx'> #define PCAN_USBPRO_SETFILTR	0x0a</div><div class='ctx'> #define PCAN_USBPRO_SETTS	0x10</div><div class='ctx'> #define PCAN_USBPRO_GETDEVID	0x12</div><div class='hunk'>@@ -86,59 +79,65 @@ struct __packed pcan_usb_pro_fwinfo {</div><div class='ctx'> </div><div class='ctx'> /* record structures */</div><div class='ctx'> struct __packed pcan_usb_pro_btr {</div><div class='del'>-	u8  data_type;</div><div class='del'>-	u8  channel;</div><div class='add'>+	u8 data_type;</div><div class='add'>+	u8 channel;</div><div class='ctx'> 	__le16 dummy;</div><div class='ctx'> 	__le32 CCBT;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct __packed pcan_usb_pro_busact {</div><div class='del'>-	u8  data_type;</div><div class='del'>-	u8  channel;</div><div class='add'>+	u8 data_type;</div><div class='add'>+	u8 channel;</div><div class='ctx'> 	__le16 onoff;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct __packed pcan_usb_pro_silent {</div><div class='del'>-	u8  data_type;</div><div class='del'>-	u8  channel;</div><div class='add'>+	u8 data_type;</div><div class='add'>+	u8 channel;</div><div class='ctx'> 	__le16 onoff;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct __packed pcan_usb_pro_filter {</div><div class='del'>-	u8  data_type;</div><div class='del'>-	u8  dummy;</div><div class='add'>+	u8 data_type;</div><div class='add'>+	u8 dummy;</div><div class='ctx'> 	__le16 filter_mode;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct __packed pcan_usb_pro_setts {</div><div class='del'>-	u8  data_type;</div><div class='del'>-	u8  dummy;</div><div class='add'>+	u8 data_type;</div><div class='add'>+	u8 dummy;</div><div class='ctx'> 	__le16 mode;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct __packed pcan_usb_pro_devid {</div><div class='del'>-	u8  data_type;</div><div class='del'>-	u8  channel;</div><div class='add'>+	u8 data_type;</div><div class='add'>+	u8 channel;</div><div class='ctx'> 	__le16 dummy;</div><div class='del'>-	__le32 serial_num;</div><div class='add'>+	__le32 dev_num;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define PCAN_USBPRO_LED_DEVICE		0x00</div><div class='add'>+#define PCAN_USBPRO_LED_BLINK_FAST	0x01</div><div class='add'>+#define PCAN_USBPRO_LED_BLINK_SLOW	0x02</div><div class='add'>+#define PCAN_USBPRO_LED_ON		0x03</div><div class='add'>+#define PCAN_USBPRO_LED_OFF		0x04</div><div class='add'>+</div><div class='ctx'> struct __packed pcan_usb_pro_setled {</div><div class='del'>-	u8  data_type;</div><div class='del'>-	u8  channel;</div><div class='add'>+	u8 data_type;</div><div class='add'>+	u8 channel;</div><div class='ctx'> 	__le16 mode;</div><div class='ctx'> 	__le32 timeout;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct __packed pcan_usb_pro_rxmsg {</div><div class='del'>-	u8  data_type;</div><div class='del'>-	u8  client;</div><div class='del'>-	u8  flags;</div><div class='del'>-	u8  len;</div><div class='add'>+	u8 data_type;</div><div class='add'>+	u8 client;</div><div class='add'>+	u8 flags;</div><div class='add'>+	u8 len;</div><div class='ctx'> 	__le32 ts32;</div><div class='ctx'> 	__le32 id;</div><div class='ctx'> </div><div class='del'>-	u8  data[8];</div><div class='add'>+	u8 data[8];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define PCAN_USBPRO_STATUS_ERROR	0x0001</div><div class='hunk'>@@ -147,26 +146,26 @@ struct __packed pcan_usb_pro_rxmsg {</div><div class='ctx'> #define PCAN_USBPRO_STATUS_QOVERRUN	0x0008</div><div class='ctx'> </div><div class='ctx'> struct __packed pcan_usb_pro_rxstatus {</div><div class='del'>-	u8  data_type;</div><div class='del'>-	u8  channel;</div><div class='add'>+	u8 data_type;</div><div class='add'>+	u8 channel;</div><div class='ctx'> 	__le16 status;</div><div class='ctx'> 	__le32 ts32;</div><div class='ctx'> 	__le32 err_frm;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct __packed pcan_usb_pro_rxts {</div><div class='del'>-	u8  data_type;</div><div class='del'>-	u8  dummy[3];</div><div class='add'>+	u8 data_type;</div><div class='add'>+	u8 dummy[3];</div><div class='ctx'> 	__le32 ts64[2];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct __packed pcan_usb_pro_txmsg {</div><div class='del'>-	u8  data_type;</div><div class='del'>-	u8  client;</div><div class='del'>-	u8  flags;</div><div class='del'>-	u8  len;</div><div class='add'>+	u8 data_type;</div><div class='add'>+	u8 client;</div><div class='add'>+	u8 flags;</div><div class='add'>+	u8 len;</div><div class='ctx'> 	__le32 id;</div><div class='del'>-	u8  data[8];</div><div class='add'>+	u8 data[8];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> union pcan_usb_pro_rec {</div><div class='head'>diff --git a/drivers/net/can/usb/ucan.c b/drivers/net/can/usb/ucan.c<br/>new file mode 100644<br/>index 000000000000..de61d9da99e3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/ucan.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/ucan.c</a></div><div class='hunk'>@@ -0,0 +1,1601 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+/* Driver for Theobroma Systems UCAN devices, Protocol Version 3</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2018 Theobroma Systems Design und Consulting GmbH</div><div class='add'>+ *</div><div class='add'>+ *</div><div class='add'>+ * General Description:</div><div class='add'>+ *</div><div class='add'>+ * The USB Device uses three Endpoints:</div><div class='add'>+ *</div><div class='add'>+ *   CONTROL Endpoint: Is used the setup the device (start, stop,</div><div class='add'>+ *   info, configure).</div><div class='add'>+ *</div><div class='add'>+ *   IN Endpoint: The device sends CAN Frame Messages and Device</div><div class='add'>+ *   Information using the IN endpoint.</div><div class='add'>+ *</div><div class='add'>+ *   OUT Endpoint: The driver sends configuration requests, and CAN</div><div class='add'>+ *   Frames on the out endpoint.</div><div class='add'>+ *</div><div class='add'>+ * Error Handling:</div><div class='add'>+ *</div><div class='add'>+ *   If error reporting is turned on the device encodes error into CAN</div><div class='add'>+ *   error frames (see uapi/linux/can/error.h) and sends it using the</div><div class='add'>+ *   IN Endpoint. The driver updates statistics and forward it.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/can.h&gt;</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/can/error.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/signal.h&gt;</div><div class='add'>+#include &lt;linux/skbuff.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/usb.h&gt;</div><div class='add'>+</div><div class='add'>+#define UCAN_DRIVER_NAME "ucan"</div><div class='add'>+#define UCAN_MAX_RX_URBS 8</div><div class='add'>+/* the CAN controller needs a while to enable/disable the bus */</div><div class='add'>+#define UCAN_USB_CTL_PIPE_TIMEOUT 1000</div><div class='add'>+/* this driver currently supports protocol version 3 only */</div><div class='add'>+#define UCAN_PROTOCOL_VERSION_MIN 3</div><div class='add'>+#define UCAN_PROTOCOL_VERSION_MAX 3</div><div class='add'>+</div><div class='add'>+/* UCAN Message Definitions</div><div class='add'>+ * ------------------------</div><div class='add'>+ *</div><div class='add'>+ *  ucan_message_out_t and ucan_message_in_t define the messages</div><div class='add'>+ *  transmitted on the OUT and IN endpoint.</div><div class='add'>+ *</div><div class='add'>+ *  Multibyte fields are transmitted with little endianness</div><div class='add'>+ *</div><div class='add'>+ *  INTR Endpoint: a single uint32_t storing the current space in the fifo</div><div class='add'>+ *</div><div class='add'>+ *  OUT Endpoint: single message of type ucan_message_out_t is</div><div class='add'>+ *    transmitted on the out endpoint</div><div class='add'>+ *</div><div class='add'>+ *  IN Endpoint: multiple messages ucan_message_in_t concateted in</div><div class='add'>+ *    the following way:</div><div class='add'>+ *</div><div class='add'>+ *	m[n].len &lt;=&gt; the length if message n(including the header in bytes)</div><div class='add'>+ *	m[n] is is aligned to a 4 byte boundary, hence</div><div class='add'>+ *	  offset(m[0])	 := 0;</div><div class='add'>+ *	  offset(m[n+1]) := offset(m[n]) + (m[n].len + 3) &amp; 3</div><div class='add'>+ *</div><div class='add'>+ *	this implies that</div><div class='add'>+ *	  offset(m[n]) % 4 &lt;=&gt; 0</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Device Global Commands */</div><div class='add'>+enum {</div><div class='add'>+	UCAN_DEVICE_GET_FW_STRING = 0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* UCAN Commands */</div><div class='add'>+enum {</div><div class='add'>+	/* start the can transceiver - val defines the operation mode */</div><div class='add'>+	UCAN_COMMAND_START = 0,</div><div class='add'>+	/* cancel pending transmissions and stop the can transceiver */</div><div class='add'>+	UCAN_COMMAND_STOP = 1,</div><div class='add'>+	/* send can transceiver into low-power sleep mode */</div><div class='add'>+	UCAN_COMMAND_SLEEP = 2,</div><div class='add'>+	/* wake up can transceiver from low-power sleep mode */</div><div class='add'>+	UCAN_COMMAND_WAKEUP = 3,</div><div class='add'>+	/* reset the can transceiver */</div><div class='add'>+	UCAN_COMMAND_RESET = 4,</div><div class='add'>+	/* get piece of info from the can transceiver - subcmd defines what</div><div class='add'>+	 * piece</div><div class='add'>+	 */</div><div class='add'>+	UCAN_COMMAND_GET = 5,</div><div class='add'>+	/* clear or disable hardware filter - subcmd defines which of the two */</div><div class='add'>+	UCAN_COMMAND_FILTER = 6,</div><div class='add'>+	/* Setup bittiming */</div><div class='add'>+	UCAN_COMMAND_SET_BITTIMING = 7,</div><div class='add'>+	/* recover from bus-off state */</div><div class='add'>+	UCAN_COMMAND_RESTART = 8,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* UCAN_COMMAND_START and UCAN_COMMAND_GET_INFO operation modes (bitmap).</div><div class='add'>+ * Undefined bits must be set to 0.</div><div class='add'>+ */</div><div class='add'>+enum {</div><div class='add'>+	UCAN_MODE_LOOPBACK = BIT(0),</div><div class='add'>+	UCAN_MODE_SILENT = BIT(1),</div><div class='add'>+	UCAN_MODE_3_SAMPLES = BIT(2),</div><div class='add'>+	UCAN_MODE_ONE_SHOT = BIT(3),</div><div class='add'>+	UCAN_MODE_BERR_REPORT = BIT(4),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* UCAN_COMMAND_GET subcommands */</div><div class='add'>+enum {</div><div class='add'>+	UCAN_COMMAND_GET_INFO = 0,</div><div class='add'>+	UCAN_COMMAND_GET_PROTOCOL_VERSION = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* UCAN_COMMAND_FILTER subcommands */</div><div class='add'>+enum {</div><div class='add'>+	UCAN_FILTER_CLEAR = 0,</div><div class='add'>+	UCAN_FILTER_DISABLE = 1,</div><div class='add'>+	UCAN_FILTER_ENABLE = 2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* OUT endpoint message types */</div><div class='add'>+enum {</div><div class='add'>+	UCAN_OUT_TX = 2,     /* transmit a CAN frame */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* IN endpoint message types */</div><div class='add'>+enum {</div><div class='add'>+	UCAN_IN_TX_COMPLETE = 1,  /* CAN frame transmission completed */</div><div class='add'>+	UCAN_IN_RX = 2,           /* CAN frame received */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ucan_ctl_cmd_start {</div><div class='add'>+	__le16 mode;         /* OR-ing any of UCAN_MODE_* */</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ucan_ctl_cmd_set_bittiming {</div><div class='add'>+	__le32 tq;           /* Time quanta (TQ) in nanoseconds */</div><div class='add'>+	__le16 brp;          /* TQ Prescaler */</div><div class='add'>+	__le16 sample_point; /* Samplepoint on tenth percent */</div><div class='add'>+	u8 prop_seg;         /* Propagation segment in TQs */</div><div class='add'>+	u8 phase_seg1;       /* Phase buffer segment 1 in TQs */</div><div class='add'>+	u8 phase_seg2;       /* Phase buffer segment 2 in TQs */</div><div class='add'>+	u8 sjw;              /* Synchronisation jump width in TQs */</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ucan_ctl_cmd_device_info {</div><div class='add'>+	__le32 freq;         /* Clock Frequency for tq generation */</div><div class='add'>+	u8 tx_fifo;          /* Size of the transmission fifo */</div><div class='add'>+	u8 sjw_max;          /* can_bittiming fields... */</div><div class='add'>+	u8 tseg1_min;</div><div class='add'>+	u8 tseg1_max;</div><div class='add'>+	u8 tseg2_min;</div><div class='add'>+	u8 tseg2_max;</div><div class='add'>+	__le16 brp_inc;</div><div class='add'>+	__le32 brp_min;</div><div class='add'>+	__le32 brp_max;      /* ...can_bittiming fields */</div><div class='add'>+	__le16 ctrlmodes;    /* supported control modes */</div><div class='add'>+	__le16 hwfilter;     /* Number of HW filter banks */</div><div class='add'>+	__le16 rxmboxes;     /* Number of receive Mailboxes */</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+struct ucan_ctl_cmd_get_protocol_version {</div><div class='add'>+	__le32 version;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+union ucan_ctl_payload {</div><div class='add'>+	/* Setup Bittiming</div><div class='add'>+	 * bmRequest == UCAN_COMMAND_START</div><div class='add'>+	 */</div><div class='add'>+	struct ucan_ctl_cmd_start cmd_start;</div><div class='add'>+	/* Setup Bittiming</div><div class='add'>+	 * bmRequest == UCAN_COMMAND_SET_BITTIMING</div><div class='add'>+	 */</div><div class='add'>+	struct ucan_ctl_cmd_set_bittiming cmd_set_bittiming;</div><div class='add'>+	/* Get Device Information</div><div class='add'>+	 * bmRequest == UCAN_COMMAND_GET; wValue = UCAN_COMMAND_GET_INFO</div><div class='add'>+	 */</div><div class='add'>+	struct ucan_ctl_cmd_device_info cmd_get_device_info;</div><div class='add'>+	/* Get Protocol Version</div><div class='add'>+	 * bmRequest == UCAN_COMMAND_GET;</div><div class='add'>+	 * wValue = UCAN_COMMAND_GET_PROTOCOL_VERSION</div><div class='add'>+	 */</div><div class='add'>+	struct ucan_ctl_cmd_get_protocol_version cmd_get_protocol_version;</div><div class='add'>+</div><div class='add'>+	u8 fw_str[128];</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	UCAN_TX_COMPLETE_SUCCESS = BIT(0),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Transmission Complete within ucan_message_in */</div><div class='add'>+struct ucan_tx_complete_entry_t {</div><div class='add'>+	u8 echo_index;</div><div class='add'>+	u8 flags;</div><div class='add'>+} __packed __aligned(0x2);</div><div class='add'>+</div><div class='add'>+/* CAN Data message format within ucan_message_in/out */</div><div class='add'>+struct ucan_can_msg {</div><div class='add'>+	/* note DLC is computed by</div><div class='add'>+	 *    msg.len - sizeof (msg.len)</div><div class='add'>+	 *            - sizeof (msg.type)</div><div class='add'>+	 *            - sizeof (msg.can_msg.id)</div><div class='add'>+	 */</div><div class='add'>+	__le32 id;</div><div class='add'>+</div><div class='add'>+	union {</div><div class='add'>+		u8 data[CAN_MAX_DLEN];  /* Data of CAN frames */</div><div class='add'>+		u8 dlc;                 /* RTR dlc */</div><div class='add'>+	};</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+/* OUT Endpoint, outbound messages */</div><div class='add'>+struct ucan_message_out {</div><div class='add'>+	__le16 len; /* Length of the content include header */</div><div class='add'>+	u8 type;    /* UCAN_OUT_TX and friends */</div><div class='add'>+	u8 subtype; /* command sub type */</div><div class='add'>+</div><div class='add'>+	union {</div><div class='add'>+		/* Transmit CAN frame</div><div class='add'>+		 * (type == UCAN_TX) &amp;&amp; ((msg.can_msg.id &amp; CAN_RTR_FLAG) == 0)</div><div class='add'>+		 * subtype stores the echo id</div><div class='add'>+		 */</div><div class='add'>+		struct ucan_can_msg can_msg;</div><div class='add'>+	} msg;</div><div class='add'>+} __packed __aligned(0x4);</div><div class='add'>+</div><div class='add'>+/* IN Endpoint, inbound messages */</div><div class='add'>+struct ucan_message_in {</div><div class='add'>+	__le16 len; /* Length of the content include header */</div><div class='add'>+	u8 type;    /* UCAN_IN_RX and friends */</div><div class='add'>+	u8 subtype; /* command sub type */</div><div class='add'>+</div><div class='add'>+	union {</div><div class='add'>+		/* CAN Frame received</div><div class='add'>+		 * (type == UCAN_IN_RX)</div><div class='add'>+		 * &amp;&amp; ((msg.can_msg.id &amp; CAN_RTR_FLAG) == 0)</div><div class='add'>+		 */</div><div class='add'>+		struct ucan_can_msg can_msg;</div><div class='add'>+</div><div class='add'>+		/* CAN transmission complete</div><div class='add'>+		 * (type == UCAN_IN_TX_COMPLETE)</div><div class='add'>+		 */</div><div class='add'>+		DECLARE_FLEX_ARRAY(struct ucan_tx_complete_entry_t,</div><div class='add'>+				   can_tx_complete_msg);</div><div class='add'>+	} __aligned(0x4) msg;</div><div class='add'>+} __packed __aligned(0x4);</div><div class='add'>+</div><div class='add'>+/* Macros to calculate message lengths */</div><div class='add'>+#define UCAN_OUT_HDR_SIZE offsetof(struct ucan_message_out, msg)</div><div class='add'>+</div><div class='add'>+#define UCAN_IN_HDR_SIZE offsetof(struct ucan_message_in, msg)</div><div class='add'>+#define UCAN_IN_LEN(member) (UCAN_OUT_HDR_SIZE + sizeof(member))</div><div class='add'>+</div><div class='add'>+struct ucan_priv;</div><div class='add'>+</div><div class='add'>+/* Context Information for transmission URBs */</div><div class='add'>+struct ucan_urb_context {</div><div class='add'>+	struct ucan_priv *up;</div><div class='add'>+	bool allocated;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Information reported by the USB device */</div><div class='add'>+struct ucan_device_info {</div><div class='add'>+	struct can_bittiming_const bittiming_const;</div><div class='add'>+	u8 tx_fifo;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Driver private data */</div><div class='add'>+struct ucan_priv {</div><div class='add'>+	/* must be the first member */</div><div class='add'>+	struct can_priv can;</div><div class='add'>+</div><div class='add'>+	/* linux USB device structures */</div><div class='add'>+	struct usb_device *udev;</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+</div><div class='add'>+	/* lock for can-&gt;echo_skb (used around</div><div class='add'>+	 * can_put/get/free_echo_skb</div><div class='add'>+	 */</div><div class='add'>+	spinlock_t echo_skb_lock;</div><div class='add'>+</div><div class='add'>+	/* usb device information */</div><div class='add'>+	u8 intf_index;</div><div class='add'>+	u8 in_ep_addr;</div><div class='add'>+	u8 out_ep_addr;</div><div class='add'>+	u16 in_ep_size;</div><div class='add'>+</div><div class='add'>+	/* transmission and reception buffers */</div><div class='add'>+	struct usb_anchor rx_urbs;</div><div class='add'>+	struct usb_anchor tx_urbs;</div><div class='add'>+</div><div class='add'>+	union ucan_ctl_payload *ctl_msg_buffer;</div><div class='add'>+	struct ucan_device_info device_info;</div><div class='add'>+</div><div class='add'>+	/* transmission control information and locks */</div><div class='add'>+	spinlock_t context_lock;</div><div class='add'>+	unsigned int available_tx_urbs;</div><div class='add'>+	struct ucan_urb_context *context_array;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static u8 ucan_can_cc_dlc2len(struct ucan_can_msg *msg, u16 len)</div><div class='add'>+{</div><div class='add'>+	if (le32_to_cpu(msg-&gt;id) &amp; CAN_RTR_FLAG)</div><div class='add'>+		return can_cc_dlc2len(msg-&gt;dlc);</div><div class='add'>+	else</div><div class='add'>+		return can_cc_dlc2len(len - (UCAN_IN_HDR_SIZE + sizeof(msg-&gt;id)));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ucan_release_context_array(struct ucan_priv *up)</div><div class='add'>+{</div><div class='add'>+	if (!up-&gt;context_array)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* lock is not needed because, driver is currently opening or closing */</div><div class='add'>+	up-&gt;available_tx_urbs = 0;</div><div class='add'>+</div><div class='add'>+	kfree(up-&gt;context_array);</div><div class='add'>+	up-&gt;context_array = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ucan_alloc_context_array(struct ucan_priv *up)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* release contexts if any */</div><div class='add'>+	ucan_release_context_array(up);</div><div class='add'>+</div><div class='add'>+	up-&gt;context_array = kcalloc(up-&gt;device_info.tx_fifo,</div><div class='add'>+				    sizeof(*up-&gt;context_array),</div><div class='add'>+				    GFP_KERNEL);</div><div class='add'>+	if (!up-&gt;context_array) {</div><div class='add'>+		netdev_err(up-&gt;netdev,</div><div class='add'>+			   "Not enough memory to allocate tx contexts\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; up-&gt;device_info.tx_fifo; i++) {</div><div class='add'>+		up-&gt;context_array[i].allocated = false;</div><div class='add'>+		up-&gt;context_array[i].up = up;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* lock is not needed because, driver is currently opening */</div><div class='add'>+	up-&gt;available_tx_urbs = up-&gt;device_info.tx_fifo;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct ucan_urb_context *ucan_alloc_context(struct ucan_priv *up)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	struct ucan_urb_context *ret = NULL;</div><div class='add'>+</div><div class='add'>+	if (WARN_ON_ONCE(!up-&gt;context_array))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	/* execute context operation atomically */</div><div class='add'>+	spin_lock_irqsave(&amp;up-&gt;context_lock, flags);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; up-&gt;device_info.tx_fifo; i++) {</div><div class='add'>+		if (!up-&gt;context_array[i].allocated) {</div><div class='add'>+			/* update context */</div><div class='add'>+			ret = &amp;up-&gt;context_array[i];</div><div class='add'>+			up-&gt;context_array[i].allocated = true;</div><div class='add'>+</div><div class='add'>+			/* stop queue if necessary */</div><div class='add'>+			up-&gt;available_tx_urbs--;</div><div class='add'>+			if (!up-&gt;available_tx_urbs)</div><div class='add'>+				netif_stop_queue(up-&gt;netdev);</div><div class='add'>+</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;up-&gt;context_lock, flags);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool ucan_release_context(struct ucan_priv *up,</div><div class='add'>+				 struct ucan_urb_context *ctx)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	bool ret = false;</div><div class='add'>+</div><div class='add'>+	if (WARN_ON_ONCE(!up-&gt;context_array))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* execute context operation atomically */</div><div class='add'>+	spin_lock_irqsave(&amp;up-&gt;context_lock, flags);</div><div class='add'>+</div><div class='add'>+	/* context was not allocated, maybe the device sent garbage */</div><div class='add'>+	if (ctx-&gt;allocated) {</div><div class='add'>+		ctx-&gt;allocated = false;</div><div class='add'>+</div><div class='add'>+		/* check if the queue needs to be woken */</div><div class='add'>+		if (!up-&gt;available_tx_urbs)</div><div class='add'>+			netif_wake_queue(up-&gt;netdev);</div><div class='add'>+		up-&gt;available_tx_urbs++;</div><div class='add'>+</div><div class='add'>+		ret = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;up-&gt;context_lock, flags);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ucan_ctrl_command_out(struct ucan_priv *up,</div><div class='add'>+				 u8 cmd, u16 subcmd, u16 datalen)</div><div class='add'>+{</div><div class='add'>+	return usb_control_msg(up-&gt;udev,</div><div class='add'>+			       usb_sndctrlpipe(up-&gt;udev, 0),</div><div class='add'>+			       cmd,</div><div class='add'>+			       USB_DIR_OUT | USB_TYPE_VENDOR |</div><div class='add'>+						USB_RECIP_INTERFACE,</div><div class='add'>+			       subcmd,</div><div class='add'>+			       up-&gt;intf_index,</div><div class='add'>+			       up-&gt;ctl_msg_buffer,</div><div class='add'>+			       datalen,</div><div class='add'>+			       UCAN_USB_CTL_PIPE_TIMEOUT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ucan_get_fw_str(struct ucan_priv *up, char *fw_str, size_t size)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = usb_control_msg(up-&gt;udev, usb_rcvctrlpipe(up-&gt;udev, 0),</div><div class='add'>+			      UCAN_DEVICE_GET_FW_STRING,</div><div class='add'>+			      USB_DIR_IN | USB_TYPE_VENDOR |</div><div class='add'>+			      USB_RECIP_DEVICE,</div><div class='add'>+			      0, 0, fw_str, size - 1,</div><div class='add'>+			      UCAN_USB_CTL_PIPE_TIMEOUT);</div><div class='add'>+	if (ret &gt; 0)</div><div class='add'>+		fw_str[ret] = '\0';</div><div class='add'>+	else</div><div class='add'>+		strscpy(fw_str, "unknown", size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Parse the device information structure reported by the device and</div><div class='add'>+ * setup private variables accordingly</div><div class='add'>+ */</div><div class='add'>+static void ucan_parse_device_info(struct ucan_priv *up,</div><div class='add'>+				   struct ucan_ctl_cmd_device_info *device_info)</div><div class='add'>+{</div><div class='add'>+	struct can_bittiming_const *bittiming =</div><div class='add'>+		&amp;up-&gt;device_info.bittiming_const;</div><div class='add'>+	u16 ctrlmodes;</div><div class='add'>+</div><div class='add'>+	/* store the data */</div><div class='add'>+	up-&gt;can.clock.freq = le32_to_cpu(device_info-&gt;freq);</div><div class='add'>+	up-&gt;device_info.tx_fifo = device_info-&gt;tx_fifo;</div><div class='add'>+	strcpy(bittiming-&gt;name, "ucan");</div><div class='add'>+	bittiming-&gt;tseg1_min = device_info-&gt;tseg1_min;</div><div class='add'>+	bittiming-&gt;tseg1_max = device_info-&gt;tseg1_max;</div><div class='add'>+	bittiming-&gt;tseg2_min = device_info-&gt;tseg2_min;</div><div class='add'>+	bittiming-&gt;tseg2_max = device_info-&gt;tseg2_max;</div><div class='add'>+	bittiming-&gt;sjw_max = device_info-&gt;sjw_max;</div><div class='add'>+	bittiming-&gt;brp_min = le32_to_cpu(device_info-&gt;brp_min);</div><div class='add'>+	bittiming-&gt;brp_max = le32_to_cpu(device_info-&gt;brp_max);</div><div class='add'>+	bittiming-&gt;brp_inc = le16_to_cpu(device_info-&gt;brp_inc);</div><div class='add'>+</div><div class='add'>+	ctrlmodes = le16_to_cpu(device_info-&gt;ctrlmodes);</div><div class='add'>+</div><div class='add'>+	up-&gt;can.ctrlmode_supported = 0;</div><div class='add'>+</div><div class='add'>+	if (ctrlmodes &amp; UCAN_MODE_LOOPBACK)</div><div class='add'>+		up-&gt;can.ctrlmode_supported |= CAN_CTRLMODE_LOOPBACK;</div><div class='add'>+	if (ctrlmodes &amp; UCAN_MODE_SILENT)</div><div class='add'>+		up-&gt;can.ctrlmode_supported |= CAN_CTRLMODE_LISTENONLY;</div><div class='add'>+	if (ctrlmodes &amp; UCAN_MODE_3_SAMPLES)</div><div class='add'>+		up-&gt;can.ctrlmode_supported |= CAN_CTRLMODE_3_SAMPLES;</div><div class='add'>+	if (ctrlmodes &amp; UCAN_MODE_ONE_SHOT)</div><div class='add'>+		up-&gt;can.ctrlmode_supported |= CAN_CTRLMODE_ONE_SHOT;</div><div class='add'>+	if (ctrlmodes &amp; UCAN_MODE_BERR_REPORT)</div><div class='add'>+		up-&gt;can.ctrlmode_supported |= CAN_CTRLMODE_BERR_REPORTING;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Handle a CAN error frame that we have received from the device.</div><div class='add'>+ * Returns true if the can state has changed.</div><div class='add'>+ */</div><div class='add'>+static bool ucan_handle_error_frame(struct ucan_priv *up,</div><div class='add'>+				    struct ucan_message_in *m,</div><div class='add'>+				    canid_t canid)</div><div class='add'>+{</div><div class='add'>+	enum can_state new_state = up-&gt;can.state;</div><div class='add'>+	struct net_device_stats *net_stats = &amp;up-&gt;netdev-&gt;stats;</div><div class='add'>+	struct can_device_stats *can_stats = &amp;up-&gt;can.can_stats;</div><div class='add'>+</div><div class='add'>+	if (canid &amp; CAN_ERR_LOSTARB)</div><div class='add'>+		can_stats-&gt;arbitration_lost++;</div><div class='add'>+</div><div class='add'>+	if (canid &amp; CAN_ERR_BUSERROR)</div><div class='add'>+		can_stats-&gt;bus_error++;</div><div class='add'>+</div><div class='add'>+	if (canid &amp; CAN_ERR_ACK)</div><div class='add'>+		net_stats-&gt;tx_errors++;</div><div class='add'>+</div><div class='add'>+	if (canid &amp; CAN_ERR_BUSOFF)</div><div class='add'>+		new_state = CAN_STATE_BUS_OFF;</div><div class='add'>+</div><div class='add'>+	/* controller problems, details in data[1] */</div><div class='add'>+	if (canid &amp; CAN_ERR_CRTL) {</div><div class='add'>+		u8 d1 = m-&gt;msg.can_msg.data[1];</div><div class='add'>+</div><div class='add'>+		if (d1 &amp; CAN_ERR_CRTL_RX_OVERFLOW)</div><div class='add'>+			net_stats-&gt;rx_over_errors++;</div><div class='add'>+</div><div class='add'>+		/* controller state bits: if multiple are set the worst wins */</div><div class='add'>+		if (d1 &amp; CAN_ERR_CRTL_ACTIVE)</div><div class='add'>+			new_state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+</div><div class='add'>+		if (d1 &amp; (CAN_ERR_CRTL_RX_WARNING | CAN_ERR_CRTL_TX_WARNING))</div><div class='add'>+			new_state = CAN_STATE_ERROR_WARNING;</div><div class='add'>+</div><div class='add'>+		if (d1 &amp; (CAN_ERR_CRTL_RX_PASSIVE | CAN_ERR_CRTL_TX_PASSIVE))</div><div class='add'>+			new_state = CAN_STATE_ERROR_PASSIVE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* protocol error, details in data[2] */</div><div class='add'>+	if (canid &amp; CAN_ERR_PROT) {</div><div class='add'>+		u8 d2 = m-&gt;msg.can_msg.data[2];</div><div class='add'>+</div><div class='add'>+		if (d2 &amp; CAN_ERR_PROT_TX)</div><div class='add'>+			net_stats-&gt;tx_errors++;</div><div class='add'>+		else</div><div class='add'>+			net_stats-&gt;rx_errors++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* no state change - we are done */</div><div class='add'>+	if (up-&gt;can.state == new_state)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* we switched into a better state */</div><div class='add'>+	if (up-&gt;can.state &gt; new_state) {</div><div class='add'>+		up-&gt;can.state = new_state;</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* we switched into a worse state */</div><div class='add'>+	up-&gt;can.state = new_state;</div><div class='add'>+	switch (new_state) {</div><div class='add'>+	case CAN_STATE_BUS_OFF:</div><div class='add'>+		can_stats-&gt;bus_off++;</div><div class='add'>+		can_bus_off(up-&gt;netdev);</div><div class='add'>+		break;</div><div class='add'>+	case CAN_STATE_ERROR_PASSIVE:</div><div class='add'>+		can_stats-&gt;error_passive++;</div><div class='add'>+		break;</div><div class='add'>+	case CAN_STATE_ERROR_WARNING:</div><div class='add'>+		can_stats-&gt;error_warning++;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Callback on reception of a can frame via the IN endpoint</div><div class='add'>+ *</div><div class='add'>+ * This function allocates an skb and transferres it to the Linux</div><div class='add'>+ * network stack</div><div class='add'>+ */</div><div class='add'>+static void ucan_rx_can_msg(struct ucan_priv *up, struct ucan_message_in *m)</div><div class='add'>+{</div><div class='add'>+	int len;</div><div class='add'>+	canid_t canid;</div><div class='add'>+	struct can_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct net_device_stats *stats = &amp;up-&gt;netdev-&gt;stats;</div><div class='add'>+</div><div class='add'>+	/* get the contents of the length field */</div><div class='add'>+	len = le16_to_cpu(m-&gt;len);</div><div class='add'>+</div><div class='add'>+	/* check sanity */</div><div class='add'>+	if (len &lt; UCAN_IN_HDR_SIZE + sizeof(m-&gt;msg.can_msg.id)) {</div><div class='add'>+		netdev_warn(up-&gt;netdev, "invalid input message len: %d\n", len);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* handle error frames */</div><div class='add'>+	canid = le32_to_cpu(m-&gt;msg.can_msg.id);</div><div class='add'>+	if (canid &amp; CAN_ERR_FLAG) {</div><div class='add'>+		bool busstate_changed = ucan_handle_error_frame(up, m, canid);</div><div class='add'>+</div><div class='add'>+		/* if berr-reporting is off only state changes get through */</div><div class='add'>+		if (!(up-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING) &amp;&amp;</div><div class='add'>+		    !busstate_changed)</div><div class='add'>+			return;</div><div class='add'>+	} else {</div><div class='add'>+		canid_t canid_mask;</div><div class='add'>+		/* compute the mask for canid */</div><div class='add'>+		canid_mask = CAN_RTR_FLAG;</div><div class='add'>+		if (canid &amp; CAN_EFF_FLAG)</div><div class='add'>+			canid_mask |= CAN_EFF_MASK | CAN_EFF_FLAG;</div><div class='add'>+		else</div><div class='add'>+			canid_mask |= CAN_SFF_MASK;</div><div class='add'>+</div><div class='add'>+		if (canid &amp; ~canid_mask)</div><div class='add'>+			netdev_warn(up-&gt;netdev,</div><div class='add'>+				    "unexpected bits set (canid %x, mask %x)",</div><div class='add'>+				    canid, canid_mask);</div><div class='add'>+</div><div class='add'>+		canid &amp;= canid_mask;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* allocate skb */</div><div class='add'>+	skb = alloc_can_skb(up-&gt;netdev, &amp;cf);</div><div class='add'>+	if (!skb)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* fill the can frame */</div><div class='add'>+	cf-&gt;can_id = canid;</div><div class='add'>+</div><div class='add'>+	/* compute DLC taking RTR_FLAG into account */</div><div class='add'>+	cf-&gt;len = ucan_can_cc_dlc2len(&amp;m-&gt;msg.can_msg, len);</div><div class='add'>+</div><div class='add'>+	/* copy the payload of non RTR frames */</div><div class='add'>+	if (!(cf-&gt;can_id &amp; CAN_RTR_FLAG) || (cf-&gt;can_id &amp; CAN_ERR_FLAG))</div><div class='add'>+		memcpy(cf-&gt;data, m-&gt;msg.can_msg.data, cf-&gt;len);</div><div class='add'>+</div><div class='add'>+	/* don't count error frames as real packets */</div><div class='add'>+	if (!(cf-&gt;can_id &amp; CAN_ERR_FLAG)) {</div><div class='add'>+		stats-&gt;rx_packets++;</div><div class='add'>+		if (!(cf-&gt;can_id &amp; CAN_RTR_FLAG))</div><div class='add'>+			stats-&gt;rx_bytes += cf-&gt;len;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* pass it to Linux */</div><div class='add'>+	netif_rx(skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* callback indicating completed transmission */</div><div class='add'>+static void ucan_tx_complete_msg(struct ucan_priv *up,</div><div class='add'>+				 struct ucan_message_in *m)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u16 count, i;</div><div class='add'>+	u8 echo_index;</div><div class='add'>+	u16 len = le16_to_cpu(m-&gt;len);</div><div class='add'>+</div><div class='add'>+	struct ucan_urb_context *context;</div><div class='add'>+</div><div class='add'>+	if (len &lt; UCAN_IN_HDR_SIZE || (len % 2 != 0)) {</div><div class='add'>+		netdev_err(up-&gt;netdev, "invalid tx complete length\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	count = (len - UCAN_IN_HDR_SIZE) / 2;</div><div class='add'>+	for (i = 0; i &lt; count; i++) {</div><div class='add'>+		/* we did not submit such echo ids */</div><div class='add'>+		echo_index = m-&gt;msg.can_tx_complete_msg[i].echo_index;</div><div class='add'>+		if (echo_index &gt;= up-&gt;device_info.tx_fifo) {</div><div class='add'>+			up-&gt;netdev-&gt;stats.tx_errors++;</div><div class='add'>+			netdev_err(up-&gt;netdev,</div><div class='add'>+				   "invalid echo_index %d received\n",</div><div class='add'>+				   echo_index);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* gather information from the context */</div><div class='add'>+		context = &amp;up-&gt;context_array[echo_index];</div><div class='add'>+</div><div class='add'>+		/* Release context and restart queue if necessary.</div><div class='add'>+		 * Also check if the context was allocated</div><div class='add'>+		 */</div><div class='add'>+		if (!ucan_release_context(up, context))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		spin_lock_irqsave(&amp;up-&gt;echo_skb_lock, flags);</div><div class='add'>+		if (m-&gt;msg.can_tx_complete_msg[i].flags &amp;</div><div class='add'>+		    UCAN_TX_COMPLETE_SUCCESS) {</div><div class='add'>+			/* update statistics */</div><div class='add'>+			up-&gt;netdev-&gt;stats.tx_packets++;</div><div class='add'>+			up-&gt;netdev-&gt;stats.tx_bytes +=</div><div class='add'>+				can_get_echo_skb(up-&gt;netdev, echo_index, NULL);</div><div class='add'>+		} else {</div><div class='add'>+			up-&gt;netdev-&gt;stats.tx_dropped++;</div><div class='add'>+			can_free_echo_skb(up-&gt;netdev, echo_index, NULL);</div><div class='add'>+		}</div><div class='add'>+		spin_unlock_irqrestore(&amp;up-&gt;echo_skb_lock, flags);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* callback on reception of a USB message */</div><div class='add'>+static void ucan_read_bulk_callback(struct urb *urb)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	int pos;</div><div class='add'>+	struct ucan_priv *up = urb-&gt;context;</div><div class='add'>+	struct net_device *netdev = up-&gt;netdev;</div><div class='add'>+	struct ucan_message_in *m;</div><div class='add'>+</div><div class='add'>+	/* the device is not up and the driver should not receive any</div><div class='add'>+	 * data on the bulk in pipe</div><div class='add'>+	 */</div><div class='add'>+	if (WARN_ON(!up-&gt;context_array)) {</div><div class='add'>+		usb_free_coherent(up-&gt;udev,</div><div class='add'>+				  up-&gt;in_ep_size,</div><div class='add'>+				  urb-&gt;transfer_buffer,</div><div class='add'>+				  urb-&gt;transfer_dma);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* check URB status */</div><div class='add'>+	switch (urb-&gt;status) {</div><div class='add'>+	case 0:</div><div class='add'>+		break;</div><div class='add'>+	case -ENOENT:</div><div class='add'>+	case -EPIPE:</div><div class='add'>+	case -EPROTO:</div><div class='add'>+	case -ESHUTDOWN:</div><div class='add'>+	case -ETIME:</div><div class='add'>+		/* urb is not resubmitted -&gt; free dma data */</div><div class='add'>+		usb_free_coherent(up-&gt;udev,</div><div class='add'>+				  up-&gt;in_ep_size,</div><div class='add'>+				  urb-&gt;transfer_buffer,</div><div class='add'>+				  urb-&gt;transfer_dma);</div><div class='add'>+		netdev_dbg(up-&gt;netdev, "not resubmitting urb; status: %d\n",</div><div class='add'>+			   urb-&gt;status);</div><div class='add'>+		return;</div><div class='add'>+	default:</div><div class='add'>+		goto resubmit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* sanity check */</div><div class='add'>+	if (!netif_device_present(netdev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* iterate over input */</div><div class='add'>+	pos = 0;</div><div class='add'>+	while (pos &lt; urb-&gt;actual_length) {</div><div class='add'>+		int len;</div><div class='add'>+</div><div class='add'>+		/* check sanity (length of header) */</div><div class='add'>+		if ((urb-&gt;actual_length - pos) &lt; UCAN_IN_HDR_SIZE) {</div><div class='add'>+			netdev_warn(up-&gt;netdev,</div><div class='add'>+				    "invalid message (short; no hdr; l:%d)\n",</div><div class='add'>+				    urb-&gt;actual_length);</div><div class='add'>+			goto resubmit;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* setup the message address */</div><div class='add'>+		m = (struct ucan_message_in *)</div><div class='add'>+			((u8 *)urb-&gt;transfer_buffer + pos);</div><div class='add'>+		len = le16_to_cpu(m-&gt;len);</div><div class='add'>+</div><div class='add'>+		/* check sanity (length of content) */</div><div class='add'>+		if (urb-&gt;actual_length - pos &lt; len) {</div><div class='add'>+			netdev_warn(up-&gt;netdev,</div><div class='add'>+				    "invalid message (short; no data; l:%d)\n",</div><div class='add'>+				    urb-&gt;actual_length);</div><div class='add'>+			print_hex_dump(KERN_WARNING,</div><div class='add'>+				       "raw data: ",</div><div class='add'>+				       DUMP_PREFIX_ADDRESS,</div><div class='add'>+				       16,</div><div class='add'>+				       1,</div><div class='add'>+				       urb-&gt;transfer_buffer,</div><div class='add'>+				       urb-&gt;actual_length,</div><div class='add'>+				       true);</div><div class='add'>+</div><div class='add'>+			goto resubmit;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		switch (m-&gt;type) {</div><div class='add'>+		case UCAN_IN_RX:</div><div class='add'>+			ucan_rx_can_msg(up, m);</div><div class='add'>+			break;</div><div class='add'>+		case UCAN_IN_TX_COMPLETE:</div><div class='add'>+			ucan_tx_complete_msg(up, m);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			netdev_warn(up-&gt;netdev,</div><div class='add'>+				    "invalid message (type; t:%d)\n",</div><div class='add'>+				    m-&gt;type);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* proceed to next message */</div><div class='add'>+		pos += len;</div><div class='add'>+		/* align to 4 byte boundary */</div><div class='add'>+		pos = round_up(pos, 4);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+resubmit:</div><div class='add'>+	/* resubmit urb when done */</div><div class='add'>+	usb_fill_bulk_urb(urb, up-&gt;udev,</div><div class='add'>+			  usb_rcvbulkpipe(up-&gt;udev,</div><div class='add'>+					  up-&gt;in_ep_addr),</div><div class='add'>+			  urb-&gt;transfer_buffer,</div><div class='add'>+			  up-&gt;in_ep_size,</div><div class='add'>+			  ucan_read_bulk_callback,</div><div class='add'>+			  up);</div><div class='add'>+</div><div class='add'>+	usb_anchor_urb(urb, &amp;up-&gt;rx_urbs);</div><div class='add'>+	ret = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='add'>+</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		netdev_err(up-&gt;netdev,</div><div class='add'>+			   "failed resubmitting read bulk urb: %d\n",</div><div class='add'>+			   ret);</div><div class='add'>+</div><div class='add'>+		usb_unanchor_urb(urb);</div><div class='add'>+		usb_free_coherent(up-&gt;udev,</div><div class='add'>+				  up-&gt;in_ep_size,</div><div class='add'>+				  urb-&gt;transfer_buffer,</div><div class='add'>+				  urb-&gt;transfer_dma);</div><div class='add'>+</div><div class='add'>+		if (ret == -ENODEV)</div><div class='add'>+			netif_device_detach(netdev);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* callback after transmission of a USB message */</div><div class='add'>+static void ucan_write_bulk_callback(struct urb *urb)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	struct ucan_priv *up;</div><div class='add'>+	struct ucan_urb_context *context = urb-&gt;context;</div><div class='add'>+</div><div class='add'>+	/* get the urb context */</div><div class='add'>+	if (WARN_ON_ONCE(!context))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* free up our allocated buffer */</div><div class='add'>+	usb_free_coherent(urb-&gt;dev,</div><div class='add'>+			  sizeof(struct ucan_message_out),</div><div class='add'>+			  urb-&gt;transfer_buffer,</div><div class='add'>+			  urb-&gt;transfer_dma);</div><div class='add'>+</div><div class='add'>+	up = context-&gt;up;</div><div class='add'>+	if (WARN_ON_ONCE(!up))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* sanity check */</div><div class='add'>+	if (!netif_device_present(up-&gt;netdev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* transmission failed (USB - the device will not send a TX complete) */</div><div class='add'>+	if (urb-&gt;status) {</div><div class='add'>+		netdev_warn(up-&gt;netdev,</div><div class='add'>+			    "failed to transmit USB message to device: %d\n",</div><div class='add'>+			     urb-&gt;status);</div><div class='add'>+</div><div class='add'>+		/* update counters an cleanup */</div><div class='add'>+		spin_lock_irqsave(&amp;up-&gt;echo_skb_lock, flags);</div><div class='add'>+		can_free_echo_skb(up-&gt;netdev, context - up-&gt;context_array, NULL);</div><div class='add'>+		spin_unlock_irqrestore(&amp;up-&gt;echo_skb_lock, flags);</div><div class='add'>+</div><div class='add'>+		up-&gt;netdev-&gt;stats.tx_dropped++;</div><div class='add'>+</div><div class='add'>+		/* release context and restart the queue if necessary */</div><div class='add'>+		if (!ucan_release_context(up, context))</div><div class='add'>+			netdev_err(up-&gt;netdev,</div><div class='add'>+				   "urb failed, failed to release context\n");</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ucan_cleanup_rx_urbs(struct ucan_priv *up, struct urb **urbs)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; UCAN_MAX_RX_URBS; i++) {</div><div class='add'>+		if (urbs[i]) {</div><div class='add'>+			usb_unanchor_urb(urbs[i]);</div><div class='add'>+			usb_free_coherent(up-&gt;udev,</div><div class='add'>+					  up-&gt;in_ep_size,</div><div class='add'>+					  urbs[i]-&gt;transfer_buffer,</div><div class='add'>+					  urbs[i]-&gt;transfer_dma);</div><div class='add'>+			usb_free_urb(urbs[i]);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memset(urbs, 0, sizeof(*urbs) * UCAN_MAX_RX_URBS);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ucan_prepare_and_anchor_rx_urbs(struct ucan_priv *up,</div><div class='add'>+					   struct urb **urbs)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	memset(urbs, 0, sizeof(*urbs) * UCAN_MAX_RX_URBS);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; UCAN_MAX_RX_URBS; i++) {</div><div class='add'>+		void *buf;</div><div class='add'>+</div><div class='add'>+		urbs[i] = usb_alloc_urb(0, GFP_KERNEL);</div><div class='add'>+		if (!urbs[i])</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		buf = usb_alloc_coherent(up-&gt;udev,</div><div class='add'>+					 up-&gt;in_ep_size,</div><div class='add'>+					 GFP_KERNEL, &amp;urbs[i]-&gt;transfer_dma);</div><div class='add'>+		if (!buf) {</div><div class='add'>+			/* cleanup this urb */</div><div class='add'>+			usb_free_urb(urbs[i]);</div><div class='add'>+			urbs[i] = NULL;</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		usb_fill_bulk_urb(urbs[i], up-&gt;udev,</div><div class='add'>+				  usb_rcvbulkpipe(up-&gt;udev,</div><div class='add'>+						  up-&gt;in_ep_addr),</div><div class='add'>+				  buf,</div><div class='add'>+				  up-&gt;in_ep_size,</div><div class='add'>+				  ucan_read_bulk_callback,</div><div class='add'>+				  up);</div><div class='add'>+</div><div class='add'>+		urbs[i]-&gt;transfer_flags |= URB_NO_TRANSFER_DMA_MAP;</div><div class='add'>+</div><div class='add'>+		usb_anchor_urb(urbs[i], &amp;up-&gt;rx_urbs);</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	/* cleanup other unsubmitted urbs */</div><div class='add'>+	ucan_cleanup_rx_urbs(up, urbs);</div><div class='add'>+	return -ENOMEM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Submits rx urbs with the semantic: Either submit all, or cleanup</div><div class='add'>+ * everything. I case of errors submitted urbs are killed and all urbs in</div><div class='add'>+ * the array are freed. I case of no errors every entry in the urb</div><div class='add'>+ * array is set to NULL.</div><div class='add'>+ */</div><div class='add'>+static int ucan_submit_rx_urbs(struct ucan_priv *up, struct urb **urbs)</div><div class='add'>+{</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	/* Iterate over all urbs to submit. On success remove the urb</div><div class='add'>+	 * from the list.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; UCAN_MAX_RX_URBS; i++) {</div><div class='add'>+		ret = usb_submit_urb(urbs[i], GFP_KERNEL);</div><div class='add'>+		if (ret) {</div><div class='add'>+			netdev_err(up-&gt;netdev,</div><div class='add'>+				   "could not submit urb; code: %d\n",</div><div class='add'>+				   ret);</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Anchor URB and drop reference, USB core will take</div><div class='add'>+		 * care of freeing it</div><div class='add'>+		 */</div><div class='add'>+		usb_free_urb(urbs[i]);</div><div class='add'>+		urbs[i] = NULL;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	/* Cleanup unsubmitted urbs */</div><div class='add'>+	ucan_cleanup_rx_urbs(up, urbs);</div><div class='add'>+</div><div class='add'>+	/* Kill urbs that are already submitted */</div><div class='add'>+	usb_kill_anchored_urbs(&amp;up-&gt;rx_urbs);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Open the network device */</div><div class='add'>+static int ucan_open(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	int ret, ret_cleanup;</div><div class='add'>+	u16 ctrlmode;</div><div class='add'>+	struct urb *urbs[UCAN_MAX_RX_URBS];</div><div class='add'>+	struct ucan_priv *up = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	ret = ucan_alloc_context_array(up);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Allocate and prepare IN URBS - allocated and anchored</div><div class='add'>+	 * urbs are stored in urbs[] for clean</div><div class='add'>+	 */</div><div class='add'>+	ret = ucan_prepare_and_anchor_rx_urbs(up, urbs);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_contexts;</div><div class='add'>+</div><div class='add'>+	/* Check the control mode */</div><div class='add'>+	ctrlmode = 0;</div><div class='add'>+	if (up-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LOOPBACK)</div><div class='add'>+		ctrlmode |= UCAN_MODE_LOOPBACK;</div><div class='add'>+	if (up-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LISTENONLY)</div><div class='add'>+		ctrlmode |= UCAN_MODE_SILENT;</div><div class='add'>+	if (up-&gt;can.ctrlmode &amp; CAN_CTRLMODE_3_SAMPLES)</div><div class='add'>+		ctrlmode |= UCAN_MODE_3_SAMPLES;</div><div class='add'>+	if (up-&gt;can.ctrlmode &amp; CAN_CTRLMODE_ONE_SHOT)</div><div class='add'>+		ctrlmode |= UCAN_MODE_ONE_SHOT;</div><div class='add'>+</div><div class='add'>+	/* Enable this in any case - filtering is down within the</div><div class='add'>+	 * receive path</div><div class='add'>+	 */</div><div class='add'>+	ctrlmode |= UCAN_MODE_BERR_REPORT;</div><div class='add'>+	up-&gt;ctl_msg_buffer-&gt;cmd_start.mode = cpu_to_le16(ctrlmode);</div><div class='add'>+</div><div class='add'>+	/* Driver is ready to receive data - start the USB device */</div><div class='add'>+	ret = ucan_ctrl_command_out(up, UCAN_COMMAND_START, 0, 2);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		netdev_err(up-&gt;netdev,</div><div class='add'>+			   "could not start device, code: %d\n",</div><div class='add'>+			   ret);</div><div class='add'>+		goto err_reset;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Call CAN layer open */</div><div class='add'>+	ret = open_candev(netdev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_stop;</div><div class='add'>+</div><div class='add'>+	/* Driver is ready to receive data. Submit RX URBS */</div><div class='add'>+	ret = ucan_submit_rx_urbs(up, urbs);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_stop;</div><div class='add'>+</div><div class='add'>+	up-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+</div><div class='add'>+	/* Start the network queue */</div><div class='add'>+	netif_start_queue(netdev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_stop:</div><div class='add'>+	/* The device have started already stop it */</div><div class='add'>+	ret_cleanup = ucan_ctrl_command_out(up, UCAN_COMMAND_STOP, 0, 0);</div><div class='add'>+	if (ret_cleanup &lt; 0)</div><div class='add'>+		netdev_err(up-&gt;netdev,</div><div class='add'>+			   "could not stop device, code: %d\n",</div><div class='add'>+			   ret_cleanup);</div><div class='add'>+</div><div class='add'>+err_reset:</div><div class='add'>+	/* The device might have received data, reset it for</div><div class='add'>+	 * consistent state</div><div class='add'>+	 */</div><div class='add'>+	ret_cleanup = ucan_ctrl_command_out(up, UCAN_COMMAND_RESET, 0, 0);</div><div class='add'>+	if (ret_cleanup &lt; 0)</div><div class='add'>+		netdev_err(up-&gt;netdev,</div><div class='add'>+			   "could not reset device, code: %d\n",</div><div class='add'>+			   ret_cleanup);</div><div class='add'>+</div><div class='add'>+	/* clean up unsubmitted urbs */</div><div class='add'>+	ucan_cleanup_rx_urbs(up, urbs);</div><div class='add'>+</div><div class='add'>+err_contexts:</div><div class='add'>+	ucan_release_context_array(up);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct urb *ucan_prepare_tx_urb(struct ucan_priv *up,</div><div class='add'>+				       struct ucan_urb_context *context,</div><div class='add'>+				       struct can_frame *cf,</div><div class='add'>+				       u8 echo_index)</div><div class='add'>+{</div><div class='add'>+	int mlen;</div><div class='add'>+	struct urb *urb;</div><div class='add'>+	struct ucan_message_out *m;</div><div class='add'>+</div><div class='add'>+	/* create a URB, and a buffer for it, and copy the data to the URB */</div><div class='add'>+	urb = usb_alloc_urb(0, GFP_ATOMIC);</div><div class='add'>+	if (!urb) {</div><div class='add'>+		netdev_err(up-&gt;netdev, "no memory left for URBs\n");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	m = usb_alloc_coherent(up-&gt;udev,</div><div class='add'>+			       sizeof(struct ucan_message_out),</div><div class='add'>+			       GFP_ATOMIC,</div><div class='add'>+			       &amp;urb-&gt;transfer_dma);</div><div class='add'>+	if (!m) {</div><div class='add'>+		netdev_err(up-&gt;netdev, "no memory left for USB buffer\n");</div><div class='add'>+		usb_free_urb(urb);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* build the USB message */</div><div class='add'>+	m-&gt;type = UCAN_OUT_TX;</div><div class='add'>+	m-&gt;msg.can_msg.id = cpu_to_le32(cf-&gt;can_id);</div><div class='add'>+</div><div class='add'>+	if (cf-&gt;can_id &amp; CAN_RTR_FLAG) {</div><div class='add'>+		mlen = UCAN_OUT_HDR_SIZE +</div><div class='add'>+			offsetof(struct ucan_can_msg, dlc) +</div><div class='add'>+			sizeof(m-&gt;msg.can_msg.dlc);</div><div class='add'>+		m-&gt;msg.can_msg.dlc = cf-&gt;len;</div><div class='add'>+	} else {</div><div class='add'>+		mlen = UCAN_OUT_HDR_SIZE +</div><div class='add'>+			sizeof(m-&gt;msg.can_msg.id) + cf-&gt;len;</div><div class='add'>+		memcpy(m-&gt;msg.can_msg.data, cf-&gt;data, cf-&gt;len);</div><div class='add'>+	}</div><div class='add'>+	m-&gt;len = cpu_to_le16(mlen);</div><div class='add'>+</div><div class='add'>+	m-&gt;subtype = echo_index;</div><div class='add'>+</div><div class='add'>+	/* build the urb */</div><div class='add'>+	usb_fill_bulk_urb(urb, up-&gt;udev,</div><div class='add'>+			  usb_sndbulkpipe(up-&gt;udev,</div><div class='add'>+					  up-&gt;out_ep_addr),</div><div class='add'>+			  m, mlen, ucan_write_bulk_callback, context);</div><div class='add'>+	urb-&gt;transfer_flags |= URB_NO_TRANSFER_DMA_MAP;</div><div class='add'>+</div><div class='add'>+	return urb;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ucan_clean_up_tx_urb(struct ucan_priv *up, struct urb *urb)</div><div class='add'>+{</div><div class='add'>+	usb_free_coherent(up-&gt;udev, sizeof(struct ucan_message_out),</div><div class='add'>+			  urb-&gt;transfer_buffer, urb-&gt;transfer_dma);</div><div class='add'>+	usb_free_urb(urb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* callback when Linux needs to send a can frame */</div><div class='add'>+static netdev_tx_t ucan_start_xmit(struct sk_buff *skb,</div><div class='add'>+				   struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int ret;</div><div class='add'>+	u8 echo_index;</div><div class='add'>+	struct urb *urb;</div><div class='add'>+	struct ucan_urb_context *context;</div><div class='add'>+	struct ucan_priv *up = netdev_priv(netdev);</div><div class='add'>+	struct can_frame *cf = (struct can_frame *)skb-&gt;data;</div><div class='add'>+</div><div class='add'>+	/* check skb */</div><div class='add'>+	if (can_dev_dropped_skb(netdev, skb))</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+	/* allocate a context and slow down tx path, if fifo state is low */</div><div class='add'>+	context = ucan_alloc_context(up);</div><div class='add'>+	echo_index = context - up-&gt;context_array;</div><div class='add'>+</div><div class='add'>+	if (WARN_ON_ONCE(!context))</div><div class='add'>+		return NETDEV_TX_BUSY;</div><div class='add'>+</div><div class='add'>+	/* prepare urb for transmission */</div><div class='add'>+	urb = ucan_prepare_tx_urb(up, context, cf, echo_index);</div><div class='add'>+	if (!urb)</div><div class='add'>+		goto drop;</div><div class='add'>+</div><div class='add'>+	/* put the skb on can loopback stack */</div><div class='add'>+	spin_lock_irqsave(&amp;up-&gt;echo_skb_lock, flags);</div><div class='add'>+	can_put_echo_skb(skb, up-&gt;netdev, echo_index, 0);</div><div class='add'>+	spin_unlock_irqrestore(&amp;up-&gt;echo_skb_lock, flags);</div><div class='add'>+</div><div class='add'>+	/* transmit it */</div><div class='add'>+	usb_anchor_urb(urb, &amp;up-&gt;tx_urbs);</div><div class='add'>+	ret = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='add'>+</div><div class='add'>+	/* cleanup urb */</div><div class='add'>+	if (ret) {</div><div class='add'>+		/* on error, clean up */</div><div class='add'>+		usb_unanchor_urb(urb);</div><div class='add'>+		ucan_clean_up_tx_urb(up, urb);</div><div class='add'>+		if (!ucan_release_context(up, context))</div><div class='add'>+			netdev_err(up-&gt;netdev,</div><div class='add'>+				   "xmit err: failed to release context\n");</div><div class='add'>+</div><div class='add'>+		/* remove the skb from the echo stack - this also</div><div class='add'>+		 * frees the skb</div><div class='add'>+		 */</div><div class='add'>+		spin_lock_irqsave(&amp;up-&gt;echo_skb_lock, flags);</div><div class='add'>+		can_free_echo_skb(up-&gt;netdev, echo_index, NULL);</div><div class='add'>+		spin_unlock_irqrestore(&amp;up-&gt;echo_skb_lock, flags);</div><div class='add'>+</div><div class='add'>+		if (ret == -ENODEV) {</div><div class='add'>+			netif_device_detach(up-&gt;netdev);</div><div class='add'>+		} else {</div><div class='add'>+			netdev_warn(up-&gt;netdev,</div><div class='add'>+				    "xmit err: failed to submit urb %d\n",</div><div class='add'>+				    ret);</div><div class='add'>+			up-&gt;netdev-&gt;stats.tx_dropped++;</div><div class='add'>+		}</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netif_trans_update(netdev);</div><div class='add'>+</div><div class='add'>+	/* release ref, as we do not need the urb anymore */</div><div class='add'>+	usb_free_urb(urb);</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+drop:</div><div class='add'>+	if (!ucan_release_context(up, context))</div><div class='add'>+		netdev_err(up-&gt;netdev,</div><div class='add'>+			   "xmit drop: failed to release context\n");</div><div class='add'>+	dev_kfree_skb(skb);</div><div class='add'>+	up-&gt;netdev-&gt;stats.tx_dropped++;</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Device goes down</div><div class='add'>+ *</div><div class='add'>+ * Clean up used resources</div><div class='add'>+ */</div><div class='add'>+static int ucan_close(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct ucan_priv *up = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	up-&gt;can.state = CAN_STATE_STOPPED;</div><div class='add'>+</div><div class='add'>+	/* stop sending data */</div><div class='add'>+	usb_kill_anchored_urbs(&amp;up-&gt;tx_urbs);</div><div class='add'>+</div><div class='add'>+	/* stop receiving data */</div><div class='add'>+	usb_kill_anchored_urbs(&amp;up-&gt;rx_urbs);</div><div class='add'>+</div><div class='add'>+	/* stop and reset can device */</div><div class='add'>+	ret = ucan_ctrl_command_out(up, UCAN_COMMAND_STOP, 0, 0);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		netdev_err(up-&gt;netdev,</div><div class='add'>+			   "could not stop device, code: %d\n",</div><div class='add'>+			   ret);</div><div class='add'>+</div><div class='add'>+	ret = ucan_ctrl_command_out(up, UCAN_COMMAND_RESET, 0, 0);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		netdev_err(up-&gt;netdev,</div><div class='add'>+			   "could not reset device, code: %d\n",</div><div class='add'>+			   ret);</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(netdev);</div><div class='add'>+</div><div class='add'>+	ucan_release_context_array(up);</div><div class='add'>+</div><div class='add'>+	close_candev(up-&gt;netdev);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* CAN driver callbacks */</div><div class='add'>+static const struct net_device_ops ucan_netdev_ops = {</div><div class='add'>+	.ndo_open = ucan_open,</div><div class='add'>+	.ndo_stop = ucan_close,</div><div class='add'>+	.ndo_start_xmit = ucan_start_xmit,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops ucan_ethtool_ops = {</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Request to set bittiming</div><div class='add'>+ *</div><div class='add'>+ * This function generates an USB set bittiming message and transmits</div><div class='add'>+ * it to the device</div><div class='add'>+ */</div><div class='add'>+static int ucan_set_bittiming(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	struct ucan_priv *up = netdev_priv(netdev);</div><div class='add'>+	struct ucan_ctl_cmd_set_bittiming *cmd_set_bittiming;</div><div class='add'>+</div><div class='add'>+	cmd_set_bittiming = &amp;up-&gt;ctl_msg_buffer-&gt;cmd_set_bittiming;</div><div class='add'>+	cmd_set_bittiming-&gt;tq = cpu_to_le32(up-&gt;can.bittiming.tq);</div><div class='add'>+	cmd_set_bittiming-&gt;brp = cpu_to_le16(up-&gt;can.bittiming.brp);</div><div class='add'>+	cmd_set_bittiming-&gt;sample_point =</div><div class='add'>+	    cpu_to_le16(up-&gt;can.bittiming.sample_point);</div><div class='add'>+	cmd_set_bittiming-&gt;prop_seg = up-&gt;can.bittiming.prop_seg;</div><div class='add'>+	cmd_set_bittiming-&gt;phase_seg1 = up-&gt;can.bittiming.phase_seg1;</div><div class='add'>+	cmd_set_bittiming-&gt;phase_seg2 = up-&gt;can.bittiming.phase_seg2;</div><div class='add'>+	cmd_set_bittiming-&gt;sjw = up-&gt;can.bittiming.sjw;</div><div class='add'>+</div><div class='add'>+	ret = ucan_ctrl_command_out(up, UCAN_COMMAND_SET_BITTIMING, 0,</div><div class='add'>+				    sizeof(*cmd_set_bittiming));</div><div class='add'>+	return (ret &lt; 0) ? ret : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Restart the device to get it out of BUS-OFF state.</div><div class='add'>+ * Called when the user runs "ip link set can1 type can restart".</div><div class='add'>+ */</div><div class='add'>+static int ucan_set_mode(struct net_device *netdev, enum can_mode mode)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	struct ucan_priv *up = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case CAN_MODE_START:</div><div class='add'>+		netdev_dbg(up-&gt;netdev, "restarting device\n");</div><div class='add'>+</div><div class='add'>+		ret = ucan_ctrl_command_out(up, UCAN_COMMAND_RESTART, 0, 0);</div><div class='add'>+		up-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+</div><div class='add'>+		/* check if queue can be restarted,</div><div class='add'>+		 * up-&gt;available_tx_urbs must be protected by the</div><div class='add'>+		 * lock</div><div class='add'>+		 */</div><div class='add'>+		spin_lock_irqsave(&amp;up-&gt;context_lock, flags);</div><div class='add'>+</div><div class='add'>+		if (up-&gt;available_tx_urbs &gt; 0)</div><div class='add'>+			netif_wake_queue(up-&gt;netdev);</div><div class='add'>+</div><div class='add'>+		spin_unlock_irqrestore(&amp;up-&gt;context_lock, flags);</div><div class='add'>+</div><div class='add'>+		return ret;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Probe the device, reset it and gather general device information */</div><div class='add'>+static int ucan_probe(struct usb_interface *intf,</div><div class='add'>+		      const struct usb_device_id *id)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='add'>+	u32 protocol_version;</div><div class='add'>+	struct usb_device *udev;</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	struct usb_host_interface *iface_desc;</div><div class='add'>+	struct ucan_priv *up;</div><div class='add'>+	struct usb_endpoint_descriptor *ep;</div><div class='add'>+	u16 in_ep_size;</div><div class='add'>+	u16 out_ep_size;</div><div class='add'>+	u8 in_ep_addr;</div><div class='add'>+	u8 out_ep_addr;</div><div class='add'>+	union ucan_ctl_payload *ctl_msg_buffer;</div><div class='add'>+</div><div class='add'>+	udev = interface_to_usbdev(intf);</div><div class='add'>+</div><div class='add'>+	/* Stage 1 - Interface Parsing</div><div class='add'>+	 * ---------------------------</div><div class='add'>+	 *</div><div class='add'>+	 * Identifie the device USB interface descriptor and its</div><div class='add'>+	 * endpoints. Probing is aborted on errors.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	/* check if the interface is sane */</div><div class='add'>+	iface_desc = intf-&gt;cur_altsetting;</div><div class='add'>+	if (!iface_desc)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	dev_info(&amp;udev-&gt;dev,</div><div class='add'>+		 "%s: probing device on interface #%d\n",</div><div class='add'>+		 UCAN_DRIVER_NAME,</div><div class='add'>+		 iface_desc-&gt;desc.bInterfaceNumber);</div><div class='add'>+</div><div class='add'>+	/* interface sanity check */</div><div class='add'>+	if (iface_desc-&gt;desc.bNumEndpoints != 2) {</div><div class='add'>+		dev_err(&amp;udev-&gt;dev,</div><div class='add'>+			"%s: invalid EP count (%d)",</div><div class='add'>+			UCAN_DRIVER_NAME, iface_desc-&gt;desc.bNumEndpoints);</div><div class='add'>+		goto err_firmware_needs_update;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* check interface endpoints */</div><div class='add'>+	in_ep_addr = 0;</div><div class='add'>+	out_ep_addr = 0;</div><div class='add'>+	in_ep_size = 0;</div><div class='add'>+	out_ep_size = 0;</div><div class='add'>+	for (i = 0; i &lt; iface_desc-&gt;desc.bNumEndpoints; i++) {</div><div class='add'>+		ep = &amp;iface_desc-&gt;endpoint[i].desc;</div><div class='add'>+</div><div class='add'>+		if (((ep-&gt;bEndpointAddress &amp; USB_ENDPOINT_DIR_MASK) != 0) &amp;&amp;</div><div class='add'>+		    ((ep-&gt;bmAttributes &amp; USB_ENDPOINT_XFERTYPE_MASK) ==</div><div class='add'>+		     USB_ENDPOINT_XFER_BULK)) {</div><div class='add'>+			/* In Endpoint */</div><div class='add'>+			in_ep_addr = ep-&gt;bEndpointAddress;</div><div class='add'>+			in_ep_addr &amp;= USB_ENDPOINT_NUMBER_MASK;</div><div class='add'>+			in_ep_size = le16_to_cpu(ep-&gt;wMaxPacketSize);</div><div class='add'>+		} else if (((ep-&gt;bEndpointAddress &amp; USB_ENDPOINT_DIR_MASK) ==</div><div class='add'>+			    0) &amp;&amp;</div><div class='add'>+			   ((ep-&gt;bmAttributes &amp; USB_ENDPOINT_XFERTYPE_MASK) ==</div><div class='add'>+			    USB_ENDPOINT_XFER_BULK)) {</div><div class='add'>+			/* Out Endpoint */</div><div class='add'>+			out_ep_addr = ep-&gt;bEndpointAddress;</div><div class='add'>+			out_ep_addr &amp;= USB_ENDPOINT_NUMBER_MASK;</div><div class='add'>+			out_ep_size = le16_to_cpu(ep-&gt;wMaxPacketSize);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* check if interface is sane */</div><div class='add'>+	if (!in_ep_addr || !out_ep_addr) {</div><div class='add'>+		dev_err(&amp;udev-&gt;dev, "%s: invalid endpoint configuration\n",</div><div class='add'>+			UCAN_DRIVER_NAME);</div><div class='add'>+		goto err_firmware_needs_update;</div><div class='add'>+	}</div><div class='add'>+	if (in_ep_size &lt; sizeof(struct ucan_message_in)) {</div><div class='add'>+		dev_err(&amp;udev-&gt;dev, "%s: invalid in_ep MaxPacketSize\n",</div><div class='add'>+			UCAN_DRIVER_NAME);</div><div class='add'>+		goto err_firmware_needs_update;</div><div class='add'>+	}</div><div class='add'>+	if (out_ep_size &lt; sizeof(struct ucan_message_out)) {</div><div class='add'>+		dev_err(&amp;udev-&gt;dev, "%s: invalid out_ep MaxPacketSize\n",</div><div class='add'>+			UCAN_DRIVER_NAME);</div><div class='add'>+		goto err_firmware_needs_update;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Stage 2 - Device Identification</div><div class='add'>+	 * -------------------------------</div><div class='add'>+	 *</div><div class='add'>+	 * The device interface seems to be a ucan device. Do further</div><div class='add'>+	 * compatibility checks. On error probing is aborted, on</div><div class='add'>+	 * success this stage leaves the ctl_msg_buffer with the</div><div class='add'>+	 * reported contents of a GET_INFO command (supported</div><div class='add'>+	 * bittimings, tx_fifo depth). This information is used in</div><div class='add'>+	 * Stage 3 for the final driver initialisation.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	/* Prepare Memory for control transfers */</div><div class='add'>+	ctl_msg_buffer = devm_kzalloc(&amp;udev-&gt;dev,</div><div class='add'>+				      sizeof(union ucan_ctl_payload),</div><div class='add'>+				      GFP_KERNEL);</div><div class='add'>+	if (!ctl_msg_buffer) {</div><div class='add'>+		dev_err(&amp;udev-&gt;dev,</div><div class='add'>+			"%s: failed to allocate control pipe memory\n",</div><div class='add'>+			UCAN_DRIVER_NAME);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* get protocol version</div><div class='add'>+	 *</div><div class='add'>+	 * note: ucan_ctrl_command_* wrappers cannot be used yet</div><div class='add'>+	 * because `up` is initialised in Stage 3</div><div class='add'>+	 */</div><div class='add'>+	ret = usb_control_msg(udev,</div><div class='add'>+			      usb_rcvctrlpipe(udev, 0),</div><div class='add'>+			      UCAN_COMMAND_GET,</div><div class='add'>+			      USB_DIR_IN | USB_TYPE_VENDOR |</div><div class='add'>+					USB_RECIP_INTERFACE,</div><div class='add'>+			      UCAN_COMMAND_GET_PROTOCOL_VERSION,</div><div class='add'>+			      iface_desc-&gt;desc.bInterfaceNumber,</div><div class='add'>+			      ctl_msg_buffer,</div><div class='add'>+			      sizeof(union ucan_ctl_payload),</div><div class='add'>+			      UCAN_USB_CTL_PIPE_TIMEOUT);</div><div class='add'>+</div><div class='add'>+	/* older firmware version do not support this command - those</div><div class='add'>+	 * are not supported by this drive</div><div class='add'>+	 */</div><div class='add'>+	if (ret != 4) {</div><div class='add'>+		dev_err(&amp;udev-&gt;dev,</div><div class='add'>+			"%s: could not read protocol version, ret=%d\n",</div><div class='add'>+			UCAN_DRIVER_NAME, ret);</div><div class='add'>+		if (ret &gt;= 0)</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+		goto err_firmware_needs_update;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* this driver currently supports protocol version 3 only */</div><div class='add'>+	protocol_version =</div><div class='add'>+		le32_to_cpu(ctl_msg_buffer-&gt;cmd_get_protocol_version.version);</div><div class='add'>+	if (protocol_version &lt; UCAN_PROTOCOL_VERSION_MIN ||</div><div class='add'>+	    protocol_version &gt; UCAN_PROTOCOL_VERSION_MAX) {</div><div class='add'>+		dev_err(&amp;udev-&gt;dev,</div><div class='add'>+			"%s: device protocol version %d is not supported\n",</div><div class='add'>+			UCAN_DRIVER_NAME, protocol_version);</div><div class='add'>+		goto err_firmware_needs_update;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* request the device information and store it in ctl_msg_buffer</div><div class='add'>+	 *</div><div class='add'>+	 * note: ucan_ctrl_command_* wrappers cannot be used yet</div><div class='add'>+	 * because `up` is initialised in Stage 3</div><div class='add'>+	 */</div><div class='add'>+	ret = usb_control_msg(udev,</div><div class='add'>+			      usb_rcvctrlpipe(udev, 0),</div><div class='add'>+			      UCAN_COMMAND_GET,</div><div class='add'>+			      USB_DIR_IN | USB_TYPE_VENDOR |</div><div class='add'>+					USB_RECIP_INTERFACE,</div><div class='add'>+			      UCAN_COMMAND_GET_INFO,</div><div class='add'>+			      iface_desc-&gt;desc.bInterfaceNumber,</div><div class='add'>+			      ctl_msg_buffer,</div><div class='add'>+			      sizeof(ctl_msg_buffer-&gt;cmd_get_device_info),</div><div class='add'>+			      UCAN_USB_CTL_PIPE_TIMEOUT);</div><div class='add'>+</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(&amp;udev-&gt;dev, "%s: failed to retrieve device info\n",</div><div class='add'>+			UCAN_DRIVER_NAME);</div><div class='add'>+		goto err_firmware_needs_update;</div><div class='add'>+	}</div><div class='add'>+	if (ret &lt; sizeof(ctl_msg_buffer-&gt;cmd_get_device_info)) {</div><div class='add'>+		dev_err(&amp;udev-&gt;dev, "%s: device reported invalid device info\n",</div><div class='add'>+			UCAN_DRIVER_NAME);</div><div class='add'>+		goto err_firmware_needs_update;</div><div class='add'>+	}</div><div class='add'>+	if (ctl_msg_buffer-&gt;cmd_get_device_info.tx_fifo == 0) {</div><div class='add'>+		dev_err(&amp;udev-&gt;dev,</div><div class='add'>+			"%s: device reported invalid tx-fifo size\n",</div><div class='add'>+			UCAN_DRIVER_NAME);</div><div class='add'>+		goto err_firmware_needs_update;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Stage 3 - Driver Initialisation</div><div class='add'>+	 * -------------------------------</div><div class='add'>+	 *</div><div class='add'>+	 * Register device to Linux, prepare private structures and</div><div class='add'>+	 * reset the device.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	/* allocate driver resources */</div><div class='add'>+	netdev = alloc_candev(sizeof(struct ucan_priv),</div><div class='add'>+			      ctl_msg_buffer-&gt;cmd_get_device_info.tx_fifo);</div><div class='add'>+	if (!netdev) {</div><div class='add'>+		dev_err(&amp;udev-&gt;dev,</div><div class='add'>+			"%s: cannot allocate candev\n", UCAN_DRIVER_NAME);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	up = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	/* initialize data */</div><div class='add'>+	up-&gt;udev = udev;</div><div class='add'>+	up-&gt;netdev = netdev;</div><div class='add'>+	up-&gt;intf_index = iface_desc-&gt;desc.bInterfaceNumber;</div><div class='add'>+	up-&gt;in_ep_addr = in_ep_addr;</div><div class='add'>+	up-&gt;out_ep_addr = out_ep_addr;</div><div class='add'>+	up-&gt;in_ep_size = in_ep_size;</div><div class='add'>+	up-&gt;ctl_msg_buffer = ctl_msg_buffer;</div><div class='add'>+	up-&gt;context_array = NULL;</div><div class='add'>+	up-&gt;available_tx_urbs = 0;</div><div class='add'>+</div><div class='add'>+	up-&gt;can.state = CAN_STATE_STOPPED;</div><div class='add'>+	up-&gt;can.bittiming_const = &amp;up-&gt;device_info.bittiming_const;</div><div class='add'>+	up-&gt;can.do_set_bittiming = ucan_set_bittiming;</div><div class='add'>+	up-&gt;can.do_set_mode = &amp;ucan_set_mode;</div><div class='add'>+	spin_lock_init(&amp;up-&gt;context_lock);</div><div class='add'>+	spin_lock_init(&amp;up-&gt;echo_skb_lock);</div><div class='add'>+	netdev-&gt;netdev_ops = &amp;ucan_netdev_ops;</div><div class='add'>+	netdev-&gt;ethtool_ops = &amp;ucan_ethtool_ops;</div><div class='add'>+</div><div class='add'>+	usb_set_intfdata(intf, up);</div><div class='add'>+	SET_NETDEV_DEV(netdev, &amp;intf-&gt;dev);</div><div class='add'>+</div><div class='add'>+	/* parse device information</div><div class='add'>+	 * the data retrieved in Stage 2 is still available in</div><div class='add'>+	 * up-&gt;ctl_msg_buffer</div><div class='add'>+	 */</div><div class='add'>+	ucan_parse_device_info(up, &amp;ctl_msg_buffer-&gt;cmd_get_device_info);</div><div class='add'>+</div><div class='add'>+	/* device is compatible, reset it */</div><div class='add'>+	ret = ucan_ctrl_command_out(up, UCAN_COMMAND_RESET, 0, 0);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err_free_candev;</div><div class='add'>+</div><div class='add'>+	init_usb_anchor(&amp;up-&gt;rx_urbs);</div><div class='add'>+	init_usb_anchor(&amp;up-&gt;tx_urbs);</div><div class='add'>+</div><div class='add'>+	up-&gt;can.state = CAN_STATE_STOPPED;</div><div class='add'>+</div><div class='add'>+	/* register the device */</div><div class='add'>+	ret = register_candev(netdev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_free_candev;</div><div class='add'>+</div><div class='add'>+	/* initialisation complete, log device info */</div><div class='add'>+	netdev_info(up-&gt;netdev, "registered device\n");</div><div class='add'>+	ucan_get_fw_str(up, up-&gt;ctl_msg_buffer-&gt;fw_str,</div><div class='add'>+			sizeof(up-&gt;ctl_msg_buffer-&gt;fw_str));</div><div class='add'>+	netdev_info(up-&gt;netdev, "firmware string: %s\n",</div><div class='add'>+		    up-&gt;ctl_msg_buffer-&gt;fw_str);</div><div class='add'>+</div><div class='add'>+	/* success */</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_candev:</div><div class='add'>+	free_candev(netdev);</div><div class='add'>+	return ret;</div><div class='add'>+</div><div class='add'>+err_firmware_needs_update:</div><div class='add'>+	dev_err(&amp;udev-&gt;dev,</div><div class='add'>+		"%s: probe failed; try to update the device firmware\n",</div><div class='add'>+		UCAN_DRIVER_NAME);</div><div class='add'>+	return -ENODEV;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* disconnect the device */</div><div class='add'>+static void ucan_disconnect(struct usb_interface *intf)</div><div class='add'>+{</div><div class='add'>+	struct ucan_priv *up = usb_get_intfdata(intf);</div><div class='add'>+</div><div class='add'>+	usb_set_intfdata(intf, NULL);</div><div class='add'>+</div><div class='add'>+	if (up) {</div><div class='add'>+		unregister_candev(up-&gt;netdev);</div><div class='add'>+		free_candev(up-&gt;netdev);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct usb_device_id ucan_table[] = {</div><div class='add'>+	/* Mule (soldered onto compute modules) */</div><div class='add'>+	{USB_DEVICE_INTERFACE_NUMBER(0x2294, 0x425a, 0)},</div><div class='add'>+	/* Seal (standalone USB stick) */</div><div class='add'>+	{USB_DEVICE_INTERFACE_NUMBER(0x2294, 0x425b, 0)},</div><div class='add'>+	{} /* Terminating entry */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+MODULE_DEVICE_TABLE(usb, ucan_table);</div><div class='add'>+/* driver callbacks */</div><div class='add'>+static struct usb_driver ucan_driver = {</div><div class='add'>+	.name = UCAN_DRIVER_NAME,</div><div class='add'>+	.probe = ucan_probe,</div><div class='add'>+	.disconnect = ucan_disconnect,</div><div class='add'>+	.id_table = ucan_table,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_usb_driver(ucan_driver);</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='add'>+MODULE_AUTHOR("Martin Elshuber &lt;martin.elshuber@theobroma-systems.com&gt;");</div><div class='add'>+MODULE_AUTHOR("Jakob Unterwurzacher &lt;jakob.unterwurzacher@theobroma-systems.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Driver for Theobroma Systems UCAN devices");</div><div class='head'>diff --git a/drivers/net/can/usb/usb_8dev.c b/drivers/net/can/usb/usb_8dev.c<br/>index de95b1ccba3e..7449328f7cd7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/usb_8dev.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/usb/usb_8dev.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/usb/usb_8dev.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/usb/usb_8dev.c</a></div><div class='hunk'>@@ -1,20 +1,9 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='ctx'>  * CAN driver for "8 devices" USB2CAN converter</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2012 Bernd Krumboeck (krumboeck@universalnet.at)</div><div class='ctx'>  *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms of the GNU General Public License as published</div><div class='del'>- * by the Free Software Foundation; version 2 of the License.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License along</div><div class='del'>- * with this program.</div><div class='del'>- *</div><div class='ctx'>  * This driver is inspired by the 3.2.0 version of drivers/net/can/usb/ems_usb.c</div><div class='ctx'>  * and drivers/net/can/usb/esd_usb2.c</div><div class='ctx'>  *</div><div class='hunk'>@@ -23,6 +12,7 @@</div><div class='ctx'>  * who were very cooperative and answered my questions.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='ctx'> #include &lt;linux/signal.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -32,7 +22,6 @@</div><div class='ctx'> #include &lt;linux/can.h&gt;</div><div class='ctx'> #include &lt;linux/can/dev.h&gt;</div><div class='ctx'> #include &lt;linux/can/error.h&gt;</div><div class='del'>-#include &lt;linux/can/led.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* driver constants */</div><div class='ctx'> #define MAX_RX_URBS			20</div><div class='hunk'>@@ -99,7 +88,7 @@ enum usb_8dev_cmd {</div><div class='ctx'> </div><div class='ctx'> /* status */</div><div class='ctx'> #define USB_8DEV_STATUSMSG_OK		0x00  /* Normal condition. */</div><div class='del'>-#define USB_8DEV_STATUSMSG_OVERRUN	0x01  /* Overrun occured when sending */</div><div class='add'>+#define USB_8DEV_STATUSMSG_OVERRUN	0x01  /* Overrun occurred when sending */</div><div class='ctx'> #define USB_8DEV_STATUSMSG_BUSLIGHT	0x02  /* Error counter has reached 96 */</div><div class='ctx'> #define USB_8DEV_STATUSMSG_BUSHEAVY	0x03  /* Error count. has reached 128 */</div><div class='ctx'> #define USB_8DEV_STATUSMSG_BUSOFF	0x04  /* Device is in BUSOFF */</div><div class='hunk'>@@ -125,15 +114,12 @@ struct usb_8dev_tx_urb_context {</div><div class='ctx'> 	struct usb_8dev_priv *priv;</div><div class='ctx'> </div><div class='ctx'> 	u32 echo_index;</div><div class='del'>-	u8 dlc;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Structure to hold all of our device specific stuff */</div><div class='ctx'> struct usb_8dev_priv {</div><div class='ctx'> 	struct can_priv can; /* must be the first member */</div><div class='ctx'> </div><div class='del'>-	struct sk_buff *echo_skb[MAX_TX_URBS];</div><div class='del'>-</div><div class='ctx'> 	struct usb_device *udev;</div><div class='ctx'> 	struct net_device *netdev;</div><div class='ctx'> </div><div class='hunk'>@@ -148,7 +134,8 @@ struct usb_8dev_priv {</div><div class='ctx'> 	u8 *cmd_msg_buffer;</div><div class='ctx'> </div><div class='ctx'> 	struct mutex usb_8dev_cmd_lock;</div><div class='del'>-</div><div class='add'>+	void *rxbuf[MAX_RX_URBS];</div><div class='add'>+	dma_addr_t rxbuf_dma[MAX_RX_URBS];</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* tx frame */</div><div class='hunk'>@@ -176,7 +163,7 @@ struct __packed usb_8dev_rx_msg {</div><div class='ctx'> /* command frame */</div><div class='ctx'> struct __packed usb_8dev_cmd_msg {</div><div class='ctx'> 	u8 begin;</div><div class='del'>-	u8 channel;	/* unkown - always 0 */</div><div class='add'>+	u8 channel;	/* unknown - always 0 */</div><div class='ctx'> 	u8 command;	/* command to execute */</div><div class='ctx'> 	u8 opt1;	/* optional parameter / return value */</div><div class='ctx'> 	u8 opt2;	/* optional parameter 2 */</div><div class='hunk'>@@ -401,9 +388,7 @@ static void usb_8dev_rx_err_msg(struct usb_8dev_priv *priv,</div><div class='ctx'> 		tx_errors = 1;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case USB_8DEV_STATUSMSG_CRC:</div><div class='del'>-		cf-&gt;data[2] |= CAN_ERR_PROT_UNSPEC;</div><div class='del'>-		cf-&gt;data[3] |= CAN_ERR_PROT_LOC_CRC_SEQ |</div><div class='del'>-			       CAN_ERR_PROT_LOC_CRC_DEL;</div><div class='add'>+		cf-&gt;data[3] = CAN_ERR_PROT_LOC_CRC_SEQ;</div><div class='ctx'> 		rx_errors = 1;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case USB_8DEV_STATUSMSG_BIT0:</div><div class='hunk'>@@ -454,15 +439,15 @@ static void usb_8dev_rx_err_msg(struct usb_8dev_priv *priv,</div><div class='ctx'> </div><div class='ctx'> 	if (rx_errors)</div><div class='ctx'> 		stats-&gt;rx_errors++;</div><div class='del'>-</div><div class='del'>-	cf-&gt;data[6] = txerr;</div><div class='del'>-	cf-&gt;data[7] = rxerr;</div><div class='add'>+	if (priv-&gt;can.state != CAN_STATE_BUS_OFF) {</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_CNT;</div><div class='add'>+		cf-&gt;data[6] = txerr;</div><div class='add'>+		cf-&gt;data[7] = rxerr;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;bec.txerr = txerr;</div><div class='ctx'> 	priv-&gt;bec.rxerr = rxerr;</div><div class='ctx'> </div><div class='del'>-	stats-&gt;rx_packets++;</div><div class='del'>-	stats-&gt;rx_bytes += cf-&gt;can_dlc;</div><div class='ctx'> 	netif_rx(skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -483,21 +468,20 @@ static void usb_8dev_rx_can_msg(struct usb_8dev_priv *priv,</div><div class='ctx'> 			return;</div><div class='ctx'> </div><div class='ctx'> 		cf-&gt;can_id = be32_to_cpu(msg-&gt;id);</div><div class='del'>-		cf-&gt;can_dlc = get_can_dlc(msg-&gt;dlc &amp; 0xF);</div><div class='add'>+		can_frame_set_cc_len(cf, msg-&gt;dlc &amp; 0xF, priv-&gt;can.ctrlmode);</div><div class='ctx'> </div><div class='ctx'> 		if (msg-&gt;flags &amp; USB_8DEV_EXTID)</div><div class='ctx'> 			cf-&gt;can_id |= CAN_EFF_FLAG;</div><div class='ctx'> </div><div class='del'>-		if (msg-&gt;flags &amp; USB_8DEV_RTR)</div><div class='add'>+		if (msg-&gt;flags &amp; USB_8DEV_RTR) {</div><div class='ctx'> 			cf-&gt;can_id |= CAN_RTR_FLAG;</div><div class='del'>-		else</div><div class='del'>-			memcpy(cf-&gt;data, msg-&gt;data, cf-&gt;can_dlc);</div><div class='del'>-</div><div class='add'>+		} else {</div><div class='add'>+			memcpy(cf-&gt;data, msg-&gt;data, cf-&gt;len);</div><div class='add'>+			stats-&gt;rx_bytes += cf-&gt;len;</div><div class='add'>+		}</div><div class='ctx'> 		stats-&gt;rx_packets++;</div><div class='del'>-		stats-&gt;rx_bytes += cf-&gt;can_dlc;</div><div class='del'>-		netif_rx(skb);</div><div class='ctx'> </div><div class='del'>-		can_led_event(priv-&gt;netdev, CAN_LED_EVENT_RX);</div><div class='add'>+		netif_rx(skb);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		netdev_warn(priv-&gt;netdev, "frame type %d unknown",</div><div class='ctx'> 			 msg-&gt;type);</div><div class='hunk'>@@ -526,6 +510,8 @@ static void usb_8dev_read_bulk_callback(struct urb *urb)</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case -ENOENT:</div><div class='add'>+	case -EPIPE:</div><div class='add'>+	case -EPROTO:</div><div class='ctx'> 	case -ESHUTDOWN:</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='hunk'>@@ -594,11 +580,7 @@ static void usb_8dev_write_bulk_callback(struct urb *urb)</div><div class='ctx'> 			 urb-&gt;status);</div><div class='ctx'> </div><div class='ctx'> 	netdev-&gt;stats.tx_packets++;</div><div class='del'>-	netdev-&gt;stats.tx_bytes += context-&gt;dlc;</div><div class='del'>-</div><div class='del'>-	can_get_echo_skb(netdev, context-&gt;echo_index);</div><div class='del'>-</div><div class='del'>-	can_led_event(netdev, CAN_LED_EVENT_TX);</div><div class='add'>+	netdev-&gt;stats.tx_bytes += can_get_echo_skb(netdev, context-&gt;echo_index, NULL);</div><div class='ctx'> </div><div class='ctx'> 	/* Release context */</div><div class='ctx'> 	context-&gt;echo_index = MAX_TX_URBS;</div><div class='hunk'>@@ -620,15 +602,13 @@ static netdev_tx_t usb_8dev_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 	int i, err;</div><div class='ctx'> 	size_t size = sizeof(struct usb_8dev_tx_msg);</div><div class='ctx'> </div><div class='del'>-	if (can_dropped_invalid_skb(netdev, skb))</div><div class='add'>+	if (can_dev_dropped_skb(netdev, skb))</div><div class='ctx'> 		return NETDEV_TX_OK;</div><div class='ctx'> </div><div class='ctx'> 	/* create a URB, and a buffer for it, and copy the data to the URB */</div><div class='ctx'> 	urb = usb_alloc_urb(0, GFP_ATOMIC);</div><div class='del'>-	if (!urb) {</div><div class='del'>-		netdev_err(netdev, "No memory left for URBs\n");</div><div class='add'>+	if (!urb)</div><div class='ctx'> 		goto nomem;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	buf = usb_alloc_coherent(priv-&gt;udev, size, GFP_ATOMIC,</div><div class='ctx'> 				 &amp;urb-&gt;transfer_dma);</div><div class='hunk'>@@ -650,8 +630,8 @@ static netdev_tx_t usb_8dev_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 		msg-&gt;flags |= USB_8DEV_EXTID;</div><div class='ctx'> </div><div class='ctx'> 	msg-&gt;id = cpu_to_be32(cf-&gt;can_id &amp; CAN_ERR_MASK);</div><div class='del'>-	msg-&gt;dlc = cf-&gt;can_dlc;</div><div class='del'>-	memcpy(msg-&gt;data, cf-&gt;data, cf-&gt;can_dlc);</div><div class='add'>+	msg-&gt;dlc = can_get_cc_dlc(cf, priv-&gt;can.ctrlmode);</div><div class='add'>+	memcpy(msg-&gt;data, cf-&gt;data, cf-&gt;len);</div><div class='ctx'> 	msg-&gt;end = USB_8DEV_DATA_END;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; MAX_TX_URBS; i++) {</div><div class='hunk'>@@ -669,7 +649,6 @@ static netdev_tx_t usb_8dev_start_xmit(struct sk_buff *skb,</div><div class='ctx'> </div><div class='ctx'> 	context-&gt;priv = priv;</div><div class='ctx'> 	context-&gt;echo_index = i;</div><div class='del'>-	context-&gt;dlc = cf-&gt;can_dlc;</div><div class='ctx'> </div><div class='ctx'> 	usb_fill_bulk_urb(urb, priv-&gt;udev,</div><div class='ctx'> 			  usb_sndbulkpipe(priv-&gt;udev, USB_8DEV_ENDP_DATA_TX),</div><div class='hunk'>@@ -677,14 +656,25 @@ static netdev_tx_t usb_8dev_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 	urb-&gt;transfer_flags |= URB_NO_TRANSFER_DMA_MAP;</div><div class='ctx'> 	usb_anchor_urb(urb, &amp;priv-&gt;tx_submitted);</div><div class='ctx'> </div><div class='del'>-	can_put_echo_skb(skb, netdev, context-&gt;echo_index);</div><div class='add'>+	can_put_echo_skb(skb, netdev, context-&gt;echo_index, 0);</div><div class='ctx'> </div><div class='ctx'> 	atomic_inc(&amp;priv-&gt;active_tx_urbs);</div><div class='ctx'> </div><div class='ctx'> 	err = usb_submit_urb(urb, GFP_ATOMIC);</div><div class='del'>-	if (unlikely(err))</div><div class='del'>-		goto failed;</div><div class='del'>-	else if (atomic_read(&amp;priv-&gt;active_tx_urbs) &gt;= MAX_TX_URBS)</div><div class='add'>+	if (unlikely(err)) {</div><div class='add'>+		can_free_echo_skb(netdev, context-&gt;echo_index, NULL);</div><div class='add'>+</div><div class='add'>+		usb_unanchor_urb(urb);</div><div class='add'>+		usb_free_coherent(priv-&gt;udev, size, buf, urb-&gt;transfer_dma);</div><div class='add'>+</div><div class='add'>+		atomic_dec(&amp;priv-&gt;active_tx_urbs);</div><div class='add'>+</div><div class='add'>+		if (err == -ENODEV)</div><div class='add'>+			netif_device_detach(netdev);</div><div class='add'>+		else</div><div class='add'>+			netdev_warn(netdev, "failed tx_urb %d\n", err);</div><div class='add'>+		stats-&gt;tx_dropped++;</div><div class='add'>+	} else if (atomic_read(&amp;priv-&gt;active_tx_urbs) &gt;= MAX_TX_URBS)</div><div class='ctx'> 		/* Slow down tx path */</div><div class='ctx'> 		netif_stop_queue(netdev);</div><div class='ctx'> </div><div class='hunk'>@@ -703,19 +693,6 @@ nofreecontext:</div><div class='ctx'> </div><div class='ctx'> 	return NETDEV_TX_BUSY;</div><div class='ctx'> </div><div class='del'>-failed:</div><div class='del'>-	can_free_echo_skb(netdev, context-&gt;echo_index);</div><div class='del'>-</div><div class='del'>-	usb_unanchor_urb(urb);</div><div class='del'>-	usb_free_coherent(priv-&gt;udev, size, buf, urb-&gt;transfer_dma);</div><div class='del'>-</div><div class='del'>-	atomic_dec(&amp;priv-&gt;active_tx_urbs);</div><div class='del'>-</div><div class='del'>-	if (err == -ENODEV)</div><div class='del'>-		netif_device_detach(netdev);</div><div class='del'>-	else</div><div class='del'>-		netdev_warn(netdev, "failed tx_urb %d\n", err);</div><div class='del'>-</div><div class='ctx'> nomembuf:</div><div class='ctx'> 	usb_free_urb(urb);</div><div class='ctx'> </div><div class='hunk'>@@ -746,17 +723,17 @@ static int usb_8dev_start(struct usb_8dev_priv *priv)</div><div class='ctx'> 	for (i = 0; i &lt; MAX_RX_URBS; i++) {</div><div class='ctx'> 		struct urb *urb = NULL;</div><div class='ctx'> 		u8 *buf;</div><div class='add'>+		dma_addr_t buf_dma;</div><div class='ctx'> </div><div class='ctx'> 		/* create a URB, and a buffer for it */</div><div class='ctx'> 		urb = usb_alloc_urb(0, GFP_KERNEL);</div><div class='ctx'> 		if (!urb) {</div><div class='del'>-			netdev_err(netdev, "No memory left for URBs\n");</div><div class='ctx'> 			err = -ENOMEM;</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		buf = usb_alloc_coherent(priv-&gt;udev, RX_BUFFER_SIZE, GFP_KERNEL,</div><div class='del'>-					 &amp;urb-&gt;transfer_dma);</div><div class='add'>+					 &amp;buf_dma);</div><div class='ctx'> 		if (!buf) {</div><div class='ctx'> 			netdev_err(netdev, "No memory left for USB buffer\n");</div><div class='ctx'> 			usb_free_urb(urb);</div><div class='hunk'>@@ -764,6 +741,8 @@ static int usb_8dev_start(struct usb_8dev_priv *priv)</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		urb-&gt;transfer_dma = buf_dma;</div><div class='add'>+</div><div class='ctx'> 		usb_fill_bulk_urb(urb, priv-&gt;udev,</div><div class='ctx'> 				  usb_rcvbulkpipe(priv-&gt;udev,</div><div class='ctx'> 						  USB_8DEV_ENDP_DATA_RX),</div><div class='hunk'>@@ -781,6 +760,9 @@ static int usb_8dev_start(struct usb_8dev_priv *priv)</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		priv-&gt;rxbuf[i] = buf;</div><div class='add'>+		priv-&gt;rxbuf_dma[i] = buf_dma;</div><div class='add'>+</div><div class='ctx'> 		/* Drop reference, USB core will take care of freeing it */</div><div class='ctx'> 		usb_free_urb(urb);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -823,8 +805,6 @@ static int usb_8dev_open(struct net_device *netdev)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	can_led_event(netdev, CAN_LED_EVENT_OPEN);</div><div class='del'>-</div><div class='ctx'> 	/* finally start device */</div><div class='ctx'> 	err = usb_8dev_start(priv);</div><div class='ctx'> 	if (err) {</div><div class='hunk'>@@ -850,6 +830,10 @@ static void unlink_all_urbs(struct usb_8dev_priv *priv)</div><div class='ctx'> </div><div class='ctx'> 	usb_kill_anchored_urbs(&amp;priv-&gt;rx_submitted);</div><div class='ctx'> </div><div class='add'>+	for (i = 0; i &lt; MAX_RX_URBS; ++i)</div><div class='add'>+		usb_free_coherent(priv-&gt;udev, RX_BUFFER_SIZE,</div><div class='add'>+				  priv-&gt;rxbuf[i], priv-&gt;rxbuf_dma[i]);</div><div class='add'>+</div><div class='ctx'> 	usb_kill_anchored_urbs(&amp;priv-&gt;tx_submitted);</div><div class='ctx'> 	atomic_set(&amp;priv-&gt;active_tx_urbs, 0);</div><div class='ctx'> </div><div class='hunk'>@@ -877,8 +861,6 @@ static int usb_8dev_close(struct net_device *netdev)</div><div class='ctx'> </div><div class='ctx'> 	close_candev(netdev);</div><div class='ctx'> </div><div class='del'>-	can_led_event(netdev, CAN_LED_EVENT_STOP);</div><div class='del'>-</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -886,11 +868,14 @@ static const struct net_device_ops usb_8dev_netdev_ops = {</div><div class='ctx'> 	.ndo_open = usb_8dev_open,</div><div class='ctx'> 	.ndo_stop = usb_8dev_close,</div><div class='ctx'> 	.ndo_start_xmit = usb_8dev_start_xmit,</div><div class='del'>-	.ndo_change_mtu = can_change_mtu,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops usb_8dev_ethtool_ops = {</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct can_bittiming_const usb_8dev_bittiming_const = {</div><div class='del'>-	.name = "usb_8dev",</div><div class='add'>+	.name = KBUILD_MODNAME,</div><div class='ctx'> 	.tseg1_min = 1,</div><div class='ctx'> 	.tseg1_max = 16,</div><div class='ctx'> 	.tseg2_min = 1,</div><div class='hunk'>@@ -942,9 +927,11 @@ static int usb_8dev_probe(struct usb_interface *intf,</div><div class='ctx'> 	priv-&gt;can.do_get_berr_counter = usb_8dev_get_berr_counter;</div><div class='ctx'> 	priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK |</div><div class='ctx'> 				      CAN_CTRLMODE_LISTENONLY |</div><div class='del'>-				      CAN_CTRLMODE_ONE_SHOT;</div><div class='add'>+				      CAN_CTRLMODE_ONE_SHOT |</div><div class='add'>+				      CAN_CTRLMODE_CC_LEN8_DLC;</div><div class='ctx'> </div><div class='ctx'> 	netdev-&gt;netdev_ops = &amp;usb_8dev_netdev_ops;</div><div class='add'>+	netdev-&gt;ethtool_ops = &amp;usb_8dev_ethtool_ops;</div><div class='ctx'> </div><div class='ctx'> 	netdev-&gt;flags |= IFF_ECHO; /* we support local echo */</div><div class='ctx'> </div><div class='hunk'>@@ -956,8 +943,8 @@ static int usb_8dev_probe(struct usb_interface *intf,</div><div class='ctx'> 	for (i = 0; i &lt; MAX_TX_URBS; i++)</div><div class='ctx'> 		priv-&gt;tx_contexts[i].echo_index = MAX_TX_URBS;</div><div class='ctx'> </div><div class='del'>-	priv-&gt;cmd_msg_buffer = kzalloc(sizeof(struct usb_8dev_cmd_msg),</div><div class='del'>-				      GFP_KERNEL);</div><div class='add'>+	priv-&gt;cmd_msg_buffer = devm_kzalloc(&amp;intf-&gt;dev, sizeof(struct usb_8dev_cmd_msg),</div><div class='add'>+					    GFP_KERNEL);</div><div class='ctx'> 	if (!priv-&gt;cmd_msg_buffer)</div><div class='ctx'> 		goto cleanup_candev;</div><div class='ctx'> </div><div class='hunk'>@@ -971,7 +958,7 @@ static int usb_8dev_probe(struct usb_interface *intf,</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		netdev_err(netdev,</div><div class='ctx'> 			"couldn't register CAN device: %d\n", err);</div><div class='del'>-		goto cleanup_cmd_msg_buffer;</div><div class='add'>+		goto cleanup_candev;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	err = usb_8dev_cmd_version(priv, &amp;version);</div><div class='hunk'>@@ -985,16 +972,11 @@ static int usb_8dev_probe(struct usb_interface *intf,</div><div class='ctx'> 			 (version&gt;&gt;8) &amp; 0xff, version &amp; 0xff);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	devm_can_led_init(netdev);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> cleanup_unregister_candev:</div><div class='ctx'> 	unregister_netdev(priv-&gt;netdev);</div><div class='ctx'> </div><div class='del'>-cleanup_cmd_msg_buffer:</div><div class='del'>-	kfree(priv-&gt;cmd_msg_buffer);</div><div class='del'>-</div><div class='ctx'> cleanup_candev:</div><div class='ctx'> 	free_candev(netdev);</div><div class='ctx'> </div><div class='hunk'>@@ -1013,15 +995,14 @@ static void usb_8dev_disconnect(struct usb_interface *intf)</div><div class='ctx'> 		netdev_info(priv-&gt;netdev, "device disconnected\n");</div><div class='ctx'> </div><div class='ctx'> 		unregister_netdev(priv-&gt;netdev);</div><div class='del'>-		free_candev(priv-&gt;netdev);</div><div class='del'>-</div><div class='ctx'> 		unlink_all_urbs(priv);</div><div class='add'>+		free_candev(priv-&gt;netdev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct usb_driver usb_8dev_driver = {</div><div class='del'>-	.name =		"usb_8dev",</div><div class='add'>+	.name =		KBUILD_MODNAME,</div><div class='ctx'> 	.probe =	usb_8dev_probe,</div><div class='ctx'> 	.disconnect =	usb_8dev_disconnect,</div><div class='ctx'> 	.id_table =	usb_8dev_table,</div><div class='head'>diff --git a/drivers/net/can/vcan.c b/drivers/net/can/vcan.c<br/>index 674f367087c5..fdc662aea279 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/vcan.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/vcan.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/vcan.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/vcan.c</a></div><div class='hunk'>@@ -1,7 +1,6 @@</div><div class='del'>-/*</div><div class='del'>- * vcan.c - Virtual CAN interface</div><div class='add'>+/* vcan.c - Virtual CAN interface</div><div class='ctx'>  *</div><div class='del'>- * Copyright (c) 2002-2007 Volkswagen Group Electronic Research</div><div class='add'>+ * Copyright (c) 2002-2017 Volkswagen Group Electronic Research</div><div class='ctx'>  * All rights reserved.</div><div class='ctx'>  *</div><div class='ctx'>  * Redistribution and use in source and binary forms, with or without</div><div class='hunk'>@@ -39,73 +38,77 @@</div><div class='ctx'>  *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/if_arp.h&gt;</div><div class='ctx'> #include &lt;linux/if_ether.h&gt;</div><div class='ctx'> #include &lt;linux/can.h&gt;</div><div class='add'>+#include &lt;linux/can/can-ml.h&gt;</div><div class='ctx'> #include &lt;linux/can/dev.h&gt;</div><div class='ctx'> #include &lt;linux/can/skb.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;net/rtnetlink.h&gt;</div><div class='ctx'> </div><div class='add'>+#define DRV_NAME "vcan"</div><div class='add'>+</div><div class='ctx'> MODULE_DESCRIPTION("virtual CAN interface");</div><div class='ctx'> MODULE_LICENSE("Dual BSD/GPL");</div><div class='ctx'> MODULE_AUTHOR("Urs Thuermann &lt;urs.thuermann@volkswagen.de&gt;");</div><div class='add'>+MODULE_ALIAS_RTNL_LINK(DRV_NAME);</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * CAN test feature:</div><div class='add'>+/* CAN test feature:</div><div class='ctx'>  * Enable the echo on driver level for testing the CAN core echo modes.</div><div class='del'>- * See Documentation/networking/can.txt for details.</div><div class='add'>+ * See Documentation/networking/can.rst for details.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> static bool echo; /* echo testing. Default: 0 (Off) */</div><div class='del'>-module_param(echo, bool, S_IRUGO);</div><div class='add'>+module_param(echo, bool, 0444);</div><div class='ctx'> MODULE_PARM_DESC(echo, "Echo sent frames (for testing). Default: 0 (Off)");</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> static void vcan_rx(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct canfd_frame *cfd = (struct canfd_frame *)skb-&gt;data;</div><div class='ctx'> 	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='ctx'> </div><div class='ctx'> 	stats-&gt;rx_packets++;</div><div class='del'>-	stats-&gt;rx_bytes += cfd-&gt;len;</div><div class='add'>+	stats-&gt;rx_bytes += can_skb_get_data_len(skb);</div><div class='ctx'> </div><div class='ctx'> 	skb-&gt;pkt_type  = PACKET_BROADCAST;</div><div class='ctx'> 	skb-&gt;dev       = dev;</div><div class='ctx'> 	skb-&gt;ip_summed = CHECKSUM_UNNECESSARY;</div><div class='ctx'> </div><div class='del'>-	netif_rx_ni(skb);</div><div class='add'>+	netif_rx(skb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static netdev_tx_t vcan_tx(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct canfd_frame *cfd = (struct canfd_frame *)skb-&gt;data;</div><div class='ctx'> 	struct net_device_stats *stats = &amp;dev-&gt;stats;</div><div class='add'>+	unsigned int len;</div><div class='ctx'> 	int loop;</div><div class='ctx'> </div><div class='ctx'> 	if (can_dropped_invalid_skb(dev, skb))</div><div class='ctx'> 		return NETDEV_TX_OK;</div><div class='ctx'> </div><div class='add'>+	len = can_skb_get_data_len(skb);</div><div class='ctx'> 	stats-&gt;tx_packets++;</div><div class='del'>-	stats-&gt;tx_bytes += cfd-&gt;len;</div><div class='add'>+	stats-&gt;tx_bytes += len;</div><div class='ctx'> </div><div class='ctx'> 	/* set flag whether this packet has to be looped back */</div><div class='ctx'> 	loop = skb-&gt;pkt_type == PACKET_LOOPBACK;</div><div class='ctx'> </div><div class='add'>+	skb_tx_timestamp(skb);</div><div class='add'>+</div><div class='ctx'> 	if (!echo) {</div><div class='ctx'> 		/* no echo handling available inside this driver */</div><div class='del'>-</div><div class='ctx'> 		if (loop) {</div><div class='del'>-			/*</div><div class='del'>-			 * only count the packets here, because the</div><div class='add'>+			/* only count the packets here, because the</div><div class='ctx'> 			 * CAN core already did the echo for us</div><div class='ctx'> 			 */</div><div class='ctx'> 			stats-&gt;rx_packets++;</div><div class='del'>-			stats-&gt;rx_bytes += cfd-&gt;len;</div><div class='add'>+			stats-&gt;rx_bytes += len;</div><div class='ctx'> 		}</div><div class='ctx'> 		consume_skb(skb);</div><div class='ctx'> 		return NETDEV_TX_OK;</div><div class='hunk'>@@ -114,7 +117,6 @@ static netdev_tx_t vcan_tx(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	/* perform standard echo handling for CAN network interfaces */</div><div class='ctx'> </div><div class='ctx'> 	if (loop) {</div><div class='del'>-</div><div class='ctx'> 		skb = can_create_echo_skb(skb);</div><div class='ctx'> 		if (!skb)</div><div class='ctx'> 			return NETDEV_TX_OK;</div><div class='hunk'>@@ -134,10 +136,11 @@ static int vcan_change_mtu(struct net_device *dev, int new_mtu)</div><div class='ctx'> 	if (dev-&gt;flags &amp; IFF_UP)</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> </div><div class='del'>-	if (new_mtu != CAN_MTU &amp;&amp; new_mtu != CANFD_MTU)</div><div class='add'>+	if (new_mtu != CAN_MTU &amp;&amp; new_mtu != CANFD_MTU &amp;&amp;</div><div class='add'>+	    !can_is_canxl_dev_mtu(new_mtu))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	dev-&gt;mtu = new_mtu;</div><div class='add'>+	WRITE_ONCE(dev-&gt;mtu, new_mtu);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -146,34 +149,41 @@ static const struct net_device_ops vcan_netdev_ops = {</div><div class='ctx'> 	.ndo_change_mtu = vcan_change_mtu,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct ethtool_ops vcan_ethtool_ops = {</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static void vcan_setup(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	dev-&gt;type		= ARPHRD_CAN;</div><div class='del'>-	dev-&gt;mtu		= CAN_MTU;</div><div class='add'>+	dev-&gt;mtu		= CANXL_MTU;</div><div class='ctx'> 	dev-&gt;hard_header_len	= 0;</div><div class='ctx'> 	dev-&gt;addr_len		= 0;</div><div class='ctx'> 	dev-&gt;tx_queue_len	= 0;</div><div class='ctx'> 	dev-&gt;flags		= IFF_NOARP;</div><div class='add'>+	can_set_ml_priv(dev, netdev_priv(dev));</div><div class='ctx'> </div><div class='ctx'> 	/* set flags according to driver capabilities */</div><div class='ctx'> 	if (echo)</div><div class='ctx'> 		dev-&gt;flags |= IFF_ECHO;</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;netdev_ops		= &amp;vcan_netdev_ops;</div><div class='del'>-	dev-&gt;destructor		= free_netdev;</div><div class='add'>+	dev-&gt;ethtool_ops	= &amp;vcan_ethtool_ops;</div><div class='add'>+	dev-&gt;needs_free_netdev	= true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct rtnl_link_ops vcan_link_ops __read_mostly = {</div><div class='del'>-	.kind	= "vcan",</div><div class='del'>-	.setup	= vcan_setup,</div><div class='add'>+	.kind = DRV_NAME,</div><div class='add'>+	.priv_size = sizeof(struct can_ml_priv),</div><div class='add'>+	.setup = vcan_setup,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static __init int vcan_init_module(void)</div><div class='ctx'> {</div><div class='del'>-	pr_info("vcan: Virtual CAN interface driver\n");</div><div class='add'>+	pr_info("Virtual CAN interface driver\n");</div><div class='ctx'> </div><div class='ctx'> 	if (echo)</div><div class='del'>-		printk(KERN_INFO "vcan: enabled echo on driver level.\n");</div><div class='add'>+		pr_info("enabled echo on driver level.\n");</div><div class='ctx'> </div><div class='ctx'> 	return rtnl_link_register(&amp;vcan_link_ops);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/can/vxcan.c b/drivers/net/can/vxcan.c<br/>new file mode 100644<br/>index 000000000000..b2c19f8c5f8e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/vxcan.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/vxcan.c</a></div><div class='hunk'>@@ -0,0 +1,313 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * vxcan.c - Virtual CAN Tunnel for cross namespace communication</div><div class='add'>+ *</div><div class='add'>+ * This code is derived from drivers/net/can/vcan.c for the virtual CAN</div><div class='add'>+ * specific parts and from drivers/net/veth.c to implement the netlink API</div><div class='add'>+ * for network interface pairs in a common and established way.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2017 Oliver Hartkopp &lt;socketcan@hartkopp.net&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/if_arp.h&gt;</div><div class='add'>+#include &lt;linux/if_ether.h&gt;</div><div class='add'>+#include &lt;linux/can.h&gt;</div><div class='add'>+#include &lt;linux/can/dev.h&gt;</div><div class='add'>+#include &lt;linux/can/skb.h&gt;</div><div class='add'>+#include &lt;linux/can/vxcan.h&gt;</div><div class='add'>+#include &lt;linux/can/can-ml.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;net/rtnetlink.h&gt;</div><div class='add'>+</div><div class='add'>+#define DRV_NAME "vxcan"</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("Virtual CAN Tunnel");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_AUTHOR("Oliver Hartkopp &lt;socketcan@hartkopp.net&gt;");</div><div class='add'>+MODULE_ALIAS_RTNL_LINK(DRV_NAME);</div><div class='add'>+</div><div class='add'>+struct vxcan_priv {</div><div class='add'>+	struct net_device __rcu	*peer;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static netdev_tx_t vxcan_xmit(struct sk_buff *oskb, struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct vxcan_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct net_device *peer;</div><div class='add'>+	struct net_device_stats *peerstats, *srcstats = &amp;dev-&gt;stats;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	unsigned int len;</div><div class='add'>+</div><div class='add'>+	if (can_dropped_invalid_skb(dev, oskb))</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	peer = rcu_dereference(priv-&gt;peer);</div><div class='add'>+	if (unlikely(!peer)) {</div><div class='add'>+		kfree_skb(oskb);</div><div class='add'>+		dev-&gt;stats.tx_dropped++;</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb_tx_timestamp(oskb);</div><div class='add'>+</div><div class='add'>+	skb = skb_clone(oskb, GFP_ATOMIC);</div><div class='add'>+	if (skb) {</div><div class='add'>+		consume_skb(oskb);</div><div class='add'>+	} else {</div><div class='add'>+		kfree_skb(oskb);</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* reset CAN GW hop counter */</div><div class='add'>+	skb-&gt;csum_start = 0;</div><div class='add'>+	skb-&gt;pkt_type   = PACKET_BROADCAST;</div><div class='add'>+	skb-&gt;dev        = peer;</div><div class='add'>+	skb-&gt;ip_summed  = CHECKSUM_UNNECESSARY;</div><div class='add'>+</div><div class='add'>+	len = can_skb_get_data_len(skb);</div><div class='add'>+	if (netif_rx(skb) == NET_RX_SUCCESS) {</div><div class='add'>+		srcstats-&gt;tx_packets++;</div><div class='add'>+		srcstats-&gt;tx_bytes += len;</div><div class='add'>+		peerstats = &amp;peer-&gt;stats;</div><div class='add'>+		peerstats-&gt;rx_packets++;</div><div class='add'>+		peerstats-&gt;rx_bytes += len;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out_unlock:</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static int vxcan_open(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct vxcan_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct net_device *peer = rtnl_dereference(priv-&gt;peer);</div><div class='add'>+</div><div class='add'>+	if (!peer)</div><div class='add'>+		return -ENOTCONN;</div><div class='add'>+</div><div class='add'>+	if (peer-&gt;flags &amp; IFF_UP) {</div><div class='add'>+		netif_carrier_on(dev);</div><div class='add'>+		netif_carrier_on(peer);</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vxcan_close(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct vxcan_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct net_device *peer = rtnl_dereference(priv-&gt;peer);</div><div class='add'>+</div><div class='add'>+	netif_carrier_off(dev);</div><div class='add'>+	if (peer)</div><div class='add'>+		netif_carrier_off(peer);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vxcan_get_iflink(const struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct vxcan_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct net_device *peer;</div><div class='add'>+	int iflink;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	peer = rcu_dereference(priv-&gt;peer);</div><div class='add'>+	iflink = peer ? READ_ONCE(peer-&gt;ifindex) : 0;</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+	return iflink;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vxcan_change_mtu(struct net_device *dev, int new_mtu)</div><div class='add'>+{</div><div class='add'>+	/* Do not allow changing the MTU while running */</div><div class='add'>+	if (dev-&gt;flags &amp; IFF_UP)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	if (new_mtu != CAN_MTU &amp;&amp; new_mtu != CANFD_MTU &amp;&amp;</div><div class='add'>+	    !can_is_canxl_dev_mtu(new_mtu))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	WRITE_ONCE(dev-&gt;mtu, new_mtu);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops vxcan_netdev_ops = {</div><div class='add'>+	.ndo_open	= vxcan_open,</div><div class='add'>+	.ndo_stop	= vxcan_close,</div><div class='add'>+	.ndo_start_xmit	= vxcan_xmit,</div><div class='add'>+	.ndo_get_iflink	= vxcan_get_iflink,</div><div class='add'>+	.ndo_change_mtu = vxcan_change_mtu,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops vxcan_ethtool_ops = {</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void vxcan_setup(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct can_ml_priv *can_ml;</div><div class='add'>+</div><div class='add'>+	dev-&gt;type		= ARPHRD_CAN;</div><div class='add'>+	dev-&gt;mtu		= CANXL_MTU;</div><div class='add'>+	dev-&gt;hard_header_len	= 0;</div><div class='add'>+	dev-&gt;addr_len		= 0;</div><div class='add'>+	dev-&gt;tx_queue_len	= 0;</div><div class='add'>+	dev-&gt;flags		= IFF_NOARP;</div><div class='add'>+	dev-&gt;netdev_ops		= &amp;vxcan_netdev_ops;</div><div class='add'>+	dev-&gt;ethtool_ops	= &amp;vxcan_ethtool_ops;</div><div class='add'>+	dev-&gt;needs_free_netdev	= true;</div><div class='add'>+</div><div class='add'>+	can_ml = netdev_priv(dev) + ALIGN(sizeof(struct vxcan_priv), NETDEV_ALIGN);</div><div class='add'>+	can_set_ml_priv(dev, can_ml);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* forward declaration for rtnl_create_link() */</div><div class='add'>+static struct rtnl_link_ops vxcan_link_ops;</div><div class='add'>+</div><div class='add'>+static int vxcan_newlink(struct net_device *dev,</div><div class='add'>+			 struct rtnl_newlink_params *params,</div><div class='add'>+			 struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct net *peer_net = rtnl_newlink_peer_net(params);</div><div class='add'>+	struct nlattr **data = params-&gt;data;</div><div class='add'>+	struct nlattr **tb = params-&gt;tb;</div><div class='add'>+	struct vxcan_priv *priv;</div><div class='add'>+	struct net_device *peer;</div><div class='add'>+</div><div class='add'>+	struct nlattr *peer_tb[IFLA_MAX + 1], **tbp = tb;</div><div class='add'>+	char ifname[IFNAMSIZ];</div><div class='add'>+	unsigned char name_assign_type;</div><div class='add'>+	struct ifinfomsg *ifmp = NULL;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* register peer device */</div><div class='add'>+	if (data &amp;&amp; data[VXCAN_INFO_PEER]) {</div><div class='add'>+		struct nlattr *nla_peer = data[VXCAN_INFO_PEER];</div><div class='add'>+</div><div class='add'>+		ifmp = nla_data(nla_peer);</div><div class='add'>+		rtnl_nla_parse_ifinfomsg(peer_tb, nla_peer, extack);</div><div class='add'>+		tbp = peer_tb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ifmp &amp;&amp; tbp[IFLA_IFNAME]) {</div><div class='add'>+		nla_strscpy(ifname, tbp[IFLA_IFNAME], IFNAMSIZ);</div><div class='add'>+		name_assign_type = NET_NAME_USER;</div><div class='add'>+	} else {</div><div class='add'>+		snprintf(ifname, IFNAMSIZ, DRV_NAME "%%d");</div><div class='add'>+		name_assign_type = NET_NAME_ENUM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	peer = rtnl_create_link(peer_net, ifname, name_assign_type,</div><div class='add'>+				&amp;vxcan_link_ops, tbp, extack);</div><div class='add'>+	if (IS_ERR(peer))</div><div class='add'>+		return PTR_ERR(peer);</div><div class='add'>+</div><div class='add'>+	if (ifmp &amp;&amp; dev-&gt;ifindex)</div><div class='add'>+		peer-&gt;ifindex = ifmp-&gt;ifi_index;</div><div class='add'>+</div><div class='add'>+	err = register_netdevice(peer);</div><div class='add'>+	if (err &lt; 0) {</div><div class='add'>+		free_netdev(peer);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netif_carrier_off(peer);</div><div class='add'>+</div><div class='add'>+	err = rtnl_configure_link(peer, ifmp, 0, NULL);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto unregister_network_device;</div><div class='add'>+</div><div class='add'>+	/* register first device */</div><div class='add'>+	if (tb[IFLA_IFNAME])</div><div class='add'>+		nla_strscpy(dev-&gt;name, tb[IFLA_IFNAME], IFNAMSIZ);</div><div class='add'>+	else</div><div class='add'>+		snprintf(dev-&gt;name, IFNAMSIZ, DRV_NAME "%%d");</div><div class='add'>+</div><div class='add'>+	err = register_netdevice(dev);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto unregister_network_device;</div><div class='add'>+</div><div class='add'>+	netif_carrier_off(dev);</div><div class='add'>+</div><div class='add'>+	/* cross link the device pair */</div><div class='add'>+	priv = netdev_priv(dev);</div><div class='add'>+	rcu_assign_pointer(priv-&gt;peer, peer);</div><div class='add'>+</div><div class='add'>+	priv = netdev_priv(peer);</div><div class='add'>+	rcu_assign_pointer(priv-&gt;peer, dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+unregister_network_device:</div><div class='add'>+	unregister_netdevice(peer);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vxcan_dellink(struct net_device *dev, struct list_head *head)</div><div class='add'>+{</div><div class='add'>+	struct vxcan_priv *priv;</div><div class='add'>+	struct net_device *peer;</div><div class='add'>+</div><div class='add'>+	priv = netdev_priv(dev);</div><div class='add'>+	peer = rtnl_dereference(priv-&gt;peer);</div><div class='add'>+</div><div class='add'>+	/* Note : dellink() is called from default_device_exit_batch(),</div><div class='add'>+	 * before a rcu_synchronize() point. The devices are guaranteed</div><div class='add'>+	 * not being freed before one RCU grace period.</div><div class='add'>+	 */</div><div class='add'>+	RCU_INIT_POINTER(priv-&gt;peer, NULL);</div><div class='add'>+	unregister_netdevice_queue(dev, head);</div><div class='add'>+</div><div class='add'>+	if (peer) {</div><div class='add'>+		priv = netdev_priv(peer);</div><div class='add'>+		RCU_INIT_POINTER(priv-&gt;peer, NULL);</div><div class='add'>+		unregister_netdevice_queue(peer, head);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct nla_policy vxcan_policy[VXCAN_INFO_MAX + 1] = {</div><div class='add'>+	[VXCAN_INFO_PEER] = { .len = sizeof(struct ifinfomsg) },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct net *vxcan_get_link_net(const struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct vxcan_priv *priv = netdev_priv(dev);</div><div class='add'>+	struct net_device *peer = rtnl_dereference(priv-&gt;peer);</div><div class='add'>+</div><div class='add'>+	return peer ? dev_net(peer) : dev_net(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct rtnl_link_ops vxcan_link_ops = {</div><div class='add'>+	.kind		= DRV_NAME,</div><div class='add'>+	.priv_size	= ALIGN(sizeof(struct vxcan_priv), NETDEV_ALIGN) + sizeof(struct can_ml_priv),</div><div class='add'>+	.setup		= vxcan_setup,</div><div class='add'>+	.newlink	= vxcan_newlink,</div><div class='add'>+	.dellink	= vxcan_dellink,</div><div class='add'>+	.policy		= vxcan_policy,</div><div class='add'>+	.peer_type	= VXCAN_INFO_PEER,</div><div class='add'>+	.maxtype	= VXCAN_INFO_MAX,</div><div class='add'>+	.get_link_net	= vxcan_get_link_net,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static __init int vxcan_init(void)</div><div class='add'>+{</div><div class='add'>+	pr_info("vxcan: Virtual CAN Tunnel driver\n");</div><div class='add'>+</div><div class='add'>+	return rtnl_link_register(&amp;vxcan_link_ops);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __exit void vxcan_exit(void)</div><div class='add'>+{</div><div class='add'>+	rtnl_link_unregister(&amp;vxcan_link_ops);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(vxcan_init);</div><div class='add'>+module_exit(vxcan_exit);</div><div class='head'>diff --git a/drivers/net/can/xilinx_can.c b/drivers/net/can/xilinx_can.c<br/>index fc55e8e0351d..43d7f22820b8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/can/xilinx_can.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/can/xilinx_can.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/can/xilinx_can.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/can/xilinx_can.c</a></div><div class='hunk'>@@ -1,23 +1,18 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='ctx'> /* Xilinx CAN device driver</div><div class='ctx'>  *</div><div class='del'>- * Copyright (C) 2012 - 2014 Xilinx, Inc.</div><div class='add'>+ * Copyright (C) 2012 - 2022 Xilinx, Inc.</div><div class='ctx'>  * Copyright (C) 2009 PetaLogix. All rights reserved.</div><div class='add'>+ * Copyright (C) 2017 - 2018 Sandvik Mining and Construction Oy</div><div class='ctx'>  *</div><div class='ctx'>  * Description:</div><div class='del'>- * This driver is developed for Axi CAN IP and for Zynq CANPS Controller.</div><div class='del'>- * This program is free software: you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation, either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='add'>+ * This driver is developed for AXI CAN IP, AXI CANFD IP, CANPS and CANFD PS Controller.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='hunk'>@@ -26,12 +21,17 @@</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/property.h&gt;</div><div class='ctx'> #include &lt;linux/skbuff.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/types.h&gt;</div><div class='ctx'> #include &lt;linux/can/dev.h&gt;</div><div class='ctx'> #include &lt;linux/can/error.h&gt;</div><div class='del'>-#include &lt;linux/can/led.h&gt;</div><div class='add'>+#include &lt;linux/phy/phy.h&gt;</div><div class='add'>+#include &lt;linux/pm_runtime.h&gt;</div><div class='add'>+#include &lt;linux/reset.h&gt;</div><div class='add'>+#include &lt;linux/u64_stats_sync.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define DRIVER_NAME	"xilinx_can"</div><div class='ctx'> </div><div class='hunk'>@@ -47,25 +47,65 @@ enum xcan_reg {</div><div class='ctx'> 	XCAN_ISR_OFFSET		= 0x1C, /* Interrupt status */</div><div class='ctx'> 	XCAN_IER_OFFSET		= 0x20, /* Interrupt enable */</div><div class='ctx'> 	XCAN_ICR_OFFSET		= 0x24, /* Interrupt clear */</div><div class='del'>-	XCAN_TXFIFO_ID_OFFSET	= 0x30,/* TX FIFO ID */</div><div class='del'>-	XCAN_TXFIFO_DLC_OFFSET	= 0x34, /* TX FIFO DLC */</div><div class='del'>-	XCAN_TXFIFO_DW1_OFFSET	= 0x38, /* TX FIFO Data Word 1 */</div><div class='del'>-	XCAN_TXFIFO_DW2_OFFSET	= 0x3C, /* TX FIFO Data Word 2 */</div><div class='del'>-	XCAN_RXFIFO_ID_OFFSET	= 0x50, /* RX FIFO ID */</div><div class='del'>-	XCAN_RXFIFO_DLC_OFFSET	= 0x54, /* RX FIFO DLC */</div><div class='del'>-	XCAN_RXFIFO_DW1_OFFSET	= 0x58, /* RX FIFO Data Word 1 */</div><div class='del'>-	XCAN_RXFIFO_DW2_OFFSET	= 0x5C, /* RX FIFO Data Word 2 */</div><div class='add'>+</div><div class='add'>+	/* not on CAN FD cores */</div><div class='add'>+	XCAN_TXFIFO_OFFSET	= 0x30, /* TX FIFO base */</div><div class='add'>+	XCAN_RXFIFO_OFFSET	= 0x50, /* RX FIFO base */</div><div class='add'>+	XCAN_AFR_OFFSET		= 0x60, /* Acceptance Filter */</div><div class='add'>+</div><div class='add'>+	/* only on CAN FD cores */</div><div class='add'>+	XCAN_F_BRPR_OFFSET	= 0x088, /* Data Phase Baud Rate</div><div class='add'>+					  * Prescaler</div><div class='add'>+					  */</div><div class='add'>+	XCAN_F_BTR_OFFSET	= 0x08C, /* Data Phase Bit Timing */</div><div class='add'>+	XCAN_TRR_OFFSET		= 0x0090, /* TX Buffer Ready Request */</div><div class='add'>+</div><div class='add'>+	/* only on AXI CAN cores */</div><div class='add'>+	XCAN_ECC_CFG_OFFSET	= 0xC8, /* ECC Configuration */</div><div class='add'>+	XCAN_TXTLFIFO_ECC_OFFSET	= 0xCC, /* TXTL FIFO ECC error counter */</div><div class='add'>+	XCAN_TXOLFIFO_ECC_OFFSET	= 0xD0, /* TXOL FIFO ECC error counter */</div><div class='add'>+	XCAN_RXFIFO_ECC_OFFSET	= 0xD4, /* RX FIFO ECC error counter */</div><div class='add'>+</div><div class='add'>+	XCAN_AFR_EXT_OFFSET	= 0x00E0, /* Acceptance Filter */</div><div class='add'>+	XCAN_FSR_OFFSET		= 0x00E8, /* RX FIFO Status */</div><div class='add'>+	XCAN_TXMSG_BASE_OFFSET	= 0x0100, /* TX Message Space */</div><div class='add'>+	XCAN_RXMSG_BASE_OFFSET	= 0x1100, /* RX Message Space */</div><div class='add'>+	XCAN_RXMSG_2_BASE_OFFSET	= 0x2100, /* RX Message Space */</div><div class='add'>+	XCAN_AFR_2_MASK_OFFSET	= 0x0A00, /* Acceptance Filter MASK */</div><div class='add'>+	XCAN_AFR_2_ID_OFFSET	= 0x0A04, /* Acceptance Filter ID */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+#define XCAN_FRAME_ID_OFFSET(frame_base)	((frame_base) + 0x00)</div><div class='add'>+#define XCAN_FRAME_DLC_OFFSET(frame_base)	((frame_base) + 0x04)</div><div class='add'>+#define XCAN_FRAME_DW1_OFFSET(frame_base)	((frame_base) + 0x08)</div><div class='add'>+#define XCAN_FRAME_DW2_OFFSET(frame_base)	((frame_base) + 0x0C)</div><div class='add'>+#define XCANFD_FRAME_DW_OFFSET(frame_base)	((frame_base) + 0x08)</div><div class='add'>+</div><div class='add'>+#define XCAN_CANFD_FRAME_SIZE		0x48</div><div class='add'>+#define XCAN_TXMSG_FRAME_OFFSET(n)	(XCAN_TXMSG_BASE_OFFSET + \</div><div class='add'>+					 XCAN_CANFD_FRAME_SIZE * (n))</div><div class='add'>+#define XCAN_RXMSG_FRAME_OFFSET(n)	(XCAN_RXMSG_BASE_OFFSET + \</div><div class='add'>+					 XCAN_CANFD_FRAME_SIZE * (n))</div><div class='add'>+#define XCAN_RXMSG_2_FRAME_OFFSET(n)	(XCAN_RXMSG_2_BASE_OFFSET + \</div><div class='add'>+					 XCAN_CANFD_FRAME_SIZE * (n))</div><div class='add'>+</div><div class='add'>+/* the single TX mailbox used by this driver on CAN FD HW */</div><div class='add'>+#define XCAN_TX_MAILBOX_IDX		0</div><div class='add'>+</div><div class='ctx'> /* CAN register bit masks - XCAN_&lt;REG&gt;_&lt;BIT&gt;_MASK */</div><div class='ctx'> #define XCAN_SRR_CEN_MASK		0x00000002 /* CAN enable */</div><div class='ctx'> #define XCAN_SRR_RESET_MASK		0x00000001 /* Soft Reset the CAN core */</div><div class='ctx'> #define XCAN_MSR_LBACK_MASK		0x00000002 /* Loop back mode select */</div><div class='ctx'> #define XCAN_MSR_SLEEP_MASK		0x00000001 /* Sleep mode select */</div><div class='ctx'> #define XCAN_BRPR_BRP_MASK		0x000000FF /* Baud rate prescaler */</div><div class='add'>+#define XCAN_BRPR_TDCO_MASK		GENMASK(12, 8)  /* TDCO */</div><div class='add'>+#define XCAN_2_BRPR_TDCO_MASK		GENMASK(13, 8)  /* TDCO for CANFD 2.0 */</div><div class='ctx'> #define XCAN_BTR_SJW_MASK		0x00000180 /* Synchronous jump width */</div><div class='ctx'> #define XCAN_BTR_TS2_MASK		0x00000070 /* Time segment 2 */</div><div class='ctx'> #define XCAN_BTR_TS1_MASK		0x0000000F /* Time segment 1 */</div><div class='add'>+#define XCAN_BTR_SJW_MASK_CANFD		0x000F0000 /* Synchronous jump width */</div><div class='add'>+#define XCAN_BTR_TS2_MASK_CANFD		0x00000F00 /* Time segment 2 */</div><div class='add'>+#define XCAN_BTR_TS1_MASK_CANFD		0x0000003F /* Time segment 1 */</div><div class='ctx'> #define XCAN_ECR_REC_MASK		0x0000FF00 /* Receive error counter */</div><div class='ctx'> #define XCAN_ECR_TEC_MASK		0x000000FF /* Transmit error counter */</div><div class='ctx'> #define XCAN_ESR_ACKER_MASK		0x00000010 /* ACK error */</div><div class='hunk'>@@ -73,12 +113,14 @@ enum xcan_reg {</div><div class='ctx'> #define XCAN_ESR_STER_MASK		0x00000004 /* Stuff error */</div><div class='ctx'> #define XCAN_ESR_FMER_MASK		0x00000002 /* Form error */</div><div class='ctx'> #define XCAN_ESR_CRCER_MASK		0x00000001 /* CRC error */</div><div class='add'>+#define XCAN_SR_TDCV_MASK		GENMASK(22, 16) /* TDCV Value */</div><div class='ctx'> #define XCAN_SR_TXFLL_MASK		0x00000400 /* TX FIFO is full */</div><div class='ctx'> #define XCAN_SR_ESTAT_MASK		0x00000180 /* Error status */</div><div class='ctx'> #define XCAN_SR_ERRWRN_MASK		0x00000040 /* Error warning */</div><div class='ctx'> #define XCAN_SR_NORMAL_MASK		0x00000008 /* Normal mode */</div><div class='ctx'> #define XCAN_SR_LBACK_MASK		0x00000002 /* Loop back mode */</div><div class='ctx'> #define XCAN_SR_CONFIG_MASK		0x00000001 /* Configuration mode */</div><div class='add'>+#define XCAN_IXR_RXMNF_MASK		0x00020000 /* RX match not finished */</div><div class='ctx'> #define XCAN_IXR_TXFEMP_MASK		0x00004000 /* TX FIFO Empty */</div><div class='ctx'> #define XCAN_IXR_WKUP_MASK		0x00000800 /* Wake up interrupt */</div><div class='ctx'> #define XCAN_IXR_SLP_MASK		0x00000400 /* Sleep interrupt */</div><div class='hunk'>@@ -90,21 +132,43 @@ enum xcan_reg {</div><div class='ctx'> #define XCAN_IXR_TXFLL_MASK		0x00000004 /* Tx FIFO Full intr */</div><div class='ctx'> #define XCAN_IXR_TXOK_MASK		0x00000002 /* TX successful intr */</div><div class='ctx'> #define XCAN_IXR_ARBLST_MASK		0x00000001 /* Arbitration lost intr */</div><div class='add'>+#define XCAN_IXR_E2BERX_MASK		BIT(23) /* RX FIFO two bit ECC error */</div><div class='add'>+#define XCAN_IXR_E1BERX_MASK		BIT(22) /* RX FIFO one bit ECC error */</div><div class='add'>+#define XCAN_IXR_E2BETXOL_MASK		BIT(21) /* TXOL FIFO two bit ECC error */</div><div class='add'>+#define XCAN_IXR_E1BETXOL_MASK		BIT(20) /* TXOL FIFO One bit ECC error */</div><div class='add'>+#define XCAN_IXR_E2BETXTL_MASK		BIT(19) /* TXTL FIFO Two bit ECC error */</div><div class='add'>+#define XCAN_IXR_E1BETXTL_MASK		BIT(18) /* TXTL FIFO One bit ECC error */</div><div class='add'>+#define XCAN_IXR_ECC_MASK		(XCAN_IXR_E2BERX_MASK | \</div><div class='add'>+					XCAN_IXR_E1BERX_MASK | \</div><div class='add'>+					XCAN_IXR_E2BETXOL_MASK | \</div><div class='add'>+					XCAN_IXR_E1BETXOL_MASK | \</div><div class='add'>+					XCAN_IXR_E2BETXTL_MASK | \</div><div class='add'>+					XCAN_IXR_E1BETXTL_MASK)</div><div class='ctx'> #define XCAN_IDR_ID1_MASK		0xFFE00000 /* Standard msg identifier */</div><div class='ctx'> #define XCAN_IDR_SRR_MASK		0x00100000 /* Substitute remote TXreq */</div><div class='ctx'> #define XCAN_IDR_IDE_MASK		0x00080000 /* Identifier extension */</div><div class='ctx'> #define XCAN_IDR_ID2_MASK		0x0007FFFE /* Extended message ident */</div><div class='ctx'> #define XCAN_IDR_RTR_MASK		0x00000001 /* Remote TX request */</div><div class='ctx'> #define XCAN_DLCR_DLC_MASK		0xF0000000 /* Data length code */</div><div class='del'>-</div><div class='del'>-#define XCAN_INTR_ALL		(XCAN_IXR_TXOK_MASK | XCAN_IXR_BSOFF_MASK |\</div><div class='del'>-				 XCAN_IXR_WKUP_MASK | XCAN_IXR_SLP_MASK | \</div><div class='del'>-				 XCAN_IXR_RXNEMP_MASK | XCAN_IXR_ERROR_MASK | \</div><div class='del'>-				 XCAN_IXR_ARBLST_MASK | XCAN_IXR_RXOK_MASK)</div><div class='add'>+#define XCAN_FSR_FL_MASK		0x00003F00 /* RX Fill Level */</div><div class='add'>+#define XCAN_2_FSR_FL_MASK		0x00007F00 /* RX Fill Level */</div><div class='add'>+#define XCAN_FSR_IRI_MASK		0x00000080 /* RX Increment Read Index */</div><div class='add'>+#define XCAN_FSR_RI_MASK		0x0000001F /* RX Read Index */</div><div class='add'>+#define XCAN_2_FSR_RI_MASK		0x0000003F /* RX Read Index */</div><div class='add'>+#define XCAN_DLCR_EDL_MASK		0x08000000 /* EDL Mask in DLC */</div><div class='add'>+#define XCAN_DLCR_BRS_MASK		0x04000000 /* BRS Mask in DLC */</div><div class='add'>+#define XCAN_ECC_CFG_REECRX_MASK	BIT(2) /* Reset RX FIFO ECC error counters */</div><div class='add'>+#define XCAN_ECC_CFG_REECTXOL_MASK	BIT(1) /* Reset TXOL FIFO ECC error counters */</div><div class='add'>+#define XCAN_ECC_CFG_REECTXTL_MASK	BIT(0) /* Reset TXTL FIFO ECC error counters */</div><div class='add'>+#define XCAN_ECC_1BIT_CNT_MASK		GENMASK(15, 0) /* FIFO ECC 1bit count mask */</div><div class='add'>+#define XCAN_ECC_2BIT_CNT_MASK		GENMASK(31, 16) /* FIFO ECC 2bit count mask */</div><div class='ctx'> </div><div class='ctx'> /* CAN register bit shift - XCAN_&lt;REG&gt;_&lt;BIT&gt;_SHIFT */</div><div class='add'>+#define XCAN_BRPR_TDC_ENABLE		BIT(16) /* Transmitter Delay Compensation (TDC) Enable */</div><div class='ctx'> #define XCAN_BTR_SJW_SHIFT		7  /* Synchronous jump width */</div><div class='ctx'> #define XCAN_BTR_TS2_SHIFT		4  /* Time segment 2 */</div><div class='add'>+#define XCAN_BTR_SJW_SHIFT_CANFD	16 /* Synchronous jump width */</div><div class='add'>+#define XCAN_BTR_TS2_SHIFT_CANFD	8  /* Time segment 2 */</div><div class='ctx'> #define XCAN_IDR_ID1_SHIFT		21 /* Standard Messg Identifier */</div><div class='ctx'> #define XCAN_IDR_ID2_SHIFT		1  /* Extended Message Identifier */</div><div class='ctx'> #define XCAN_DLCR_DLC_SHIFT		28 /* Data length code */</div><div class='hunk'>@@ -112,11 +176,43 @@ enum xcan_reg {</div><div class='ctx'> </div><div class='ctx'> /* CAN frame length constants */</div><div class='ctx'> #define XCAN_FRAME_MAX_DATA_LEN		8</div><div class='add'>+#define XCANFD_DW_BYTES			4</div><div class='ctx'> #define XCAN_TIMEOUT			(1 * HZ)</div><div class='ctx'> </div><div class='add'>+/* TX-FIFO-empty interrupt available */</div><div class='add'>+#define XCAN_FLAG_TXFEMP	0x0001</div><div class='add'>+/* RX Match Not Finished interrupt available */</div><div class='add'>+#define XCAN_FLAG_RXMNF		0x0002</div><div class='add'>+/* Extended acceptance filters with control at 0xE0 */</div><div class='add'>+#define XCAN_FLAG_EXT_FILTERS	0x0004</div><div class='add'>+/* TX mailboxes instead of TX FIFO */</div><div class='add'>+#define XCAN_FLAG_TX_MAILBOXES	0x0008</div><div class='add'>+/* RX FIFO with each buffer in separate registers at 0x1100</div><div class='add'>+ * instead of the regular FIFO at 0x50</div><div class='add'>+ */</div><div class='add'>+#define XCAN_FLAG_RX_FIFO_MULTI	0x0010</div><div class='add'>+#define XCAN_FLAG_CANFD_2	0x0020</div><div class='add'>+</div><div class='add'>+enum xcan_ip_type {</div><div class='add'>+	XAXI_CAN = 0,</div><div class='add'>+	XZYNQ_CANPS,</div><div class='add'>+	XAXI_CANFD,</div><div class='add'>+	XAXI_CANFD_2_0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct xcan_devtype_data {</div><div class='add'>+	enum xcan_ip_type cantype;</div><div class='add'>+	unsigned int flags;</div><div class='add'>+	const struct can_bittiming_const *bittiming_const;</div><div class='add'>+	const char *bus_clk_name;</div><div class='add'>+	unsigned int btr_ts2_shift;</div><div class='add'>+	unsigned int btr_sjw_shift;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * struct xcan_priv - This definition define CAN driver instance</div><div class='ctx'>  * @can:			CAN private data structure.</div><div class='add'>+ * @tx_lock:			Lock for synchronizing TX interrupt handling</div><div class='ctx'>  * @tx_head:			Tx CAN packets ready to send on the queue</div><div class='ctx'>  * @tx_tail:			Tx CAN packets successfully sended on the queue</div><div class='ctx'>  * @tx_max:			Maximum number packets the driver can send</div><div class='hunk'>@@ -128,21 +224,44 @@ enum xcan_reg {</div><div class='ctx'>  * @irq_flags:			For request_irq()</div><div class='ctx'>  * @bus_clk:			Pointer to struct clk</div><div class='ctx'>  * @can_clk:			Pointer to struct clk</div><div class='add'>+ * @devtype:			Device type specific constants</div><div class='add'>+ * @transceiver:		Optional pointer to associated CAN transceiver</div><div class='add'>+ * @rstc:			Pointer to reset control</div><div class='add'>+ * @ecc_enable:			ECC enable flag</div><div class='add'>+ * @syncp:			synchronization for ECC error stats</div><div class='add'>+ * @ecc_rx_2_bit_errors:	RXFIFO 2bit ECC count</div><div class='add'>+ * @ecc_rx_1_bit_errors:	RXFIFO 1bit ECC count</div><div class='add'>+ * @ecc_txol_2_bit_errors:	TXOLFIFO 2bit ECC count</div><div class='add'>+ * @ecc_txol_1_bit_errors:	TXOLFIFO 1bit ECC count</div><div class='add'>+ * @ecc_txtl_2_bit_errors:	TXTLFIFO 2bit ECC count</div><div class='add'>+ * @ecc_txtl_1_bit_errors:	TXTLFIFO 1bit ECC count</div><div class='ctx'>  */</div><div class='ctx'> struct xcan_priv {</div><div class='ctx'> 	struct can_priv can;</div><div class='add'>+	spinlock_t tx_lock; /* Lock for synchronizing TX interrupt handling */</div><div class='ctx'> 	unsigned int tx_head;</div><div class='ctx'> 	unsigned int tx_tail;</div><div class='ctx'> 	unsigned int tx_max;</div><div class='ctx'> 	struct napi_struct napi;</div><div class='ctx'> 	u32 (*read_reg)(const struct xcan_priv *priv, enum xcan_reg reg);</div><div class='ctx'> 	void (*write_reg)(const struct xcan_priv *priv, enum xcan_reg reg,</div><div class='del'>-			u32 val);</div><div class='del'>-	struct net_device *dev;</div><div class='add'>+			  u32 val);</div><div class='add'>+	struct device *dev;</div><div class='ctx'> 	void __iomem *reg_base;</div><div class='ctx'> 	unsigned long irq_flags;</div><div class='ctx'> 	struct clk *bus_clk;</div><div class='ctx'> 	struct clk *can_clk;</div><div class='add'>+	struct xcan_devtype_data devtype;</div><div class='add'>+	struct phy *transceiver;</div><div class='add'>+	struct reset_control *rstc;</div><div class='add'>+	bool ecc_enable;</div><div class='add'>+	struct u64_stats_sync syncp;</div><div class='add'>+	u64_stats_t ecc_rx_2_bit_errors;</div><div class='add'>+	u64_stats_t ecc_rx_1_bit_errors;</div><div class='add'>+	u64_stats_t ecc_txol_2_bit_errors;</div><div class='add'>+	u64_stats_t ecc_txol_1_bit_errors;</div><div class='add'>+	u64_stats_t ecc_txtl_2_bit_errors;</div><div class='add'>+	u64_stats_t ecc_txtl_1_bit_errors;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* CAN Bittiming constants as per Xilinx CAN specs */</div><div class='hunk'>@@ -158,6 +277,96 @@ static const struct can_bittiming_const xcan_bittiming_const = {</div><div class='ctx'> 	.brp_inc = 1,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+/* AXI CANFD Arbitration Bittiming constants as per AXI CANFD 1.0 spec */</div><div class='add'>+static const struct can_bittiming_const xcan_bittiming_const_canfd = {</div><div class='add'>+	.name = DRIVER_NAME,</div><div class='add'>+	.tseg1_min = 1,</div><div class='add'>+	.tseg1_max = 64,</div><div class='add'>+	.tseg2_min = 1,</div><div class='add'>+	.tseg2_max = 16,</div><div class='add'>+	.sjw_max = 16,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 256,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* AXI CANFD Data Bittiming constants as per AXI CANFD 1.0 specs */</div><div class='add'>+static const struct can_bittiming_const xcan_data_bittiming_const_canfd = {</div><div class='add'>+	.name = DRIVER_NAME,</div><div class='add'>+	.tseg1_min = 1,</div><div class='add'>+	.tseg1_max = 16,</div><div class='add'>+	.tseg2_min = 1,</div><div class='add'>+	.tseg2_max = 8,</div><div class='add'>+	.sjw_max = 8,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 256,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* AXI CANFD 2.0 Arbitration Bittiming constants as per AXI CANFD 2.0 spec */</div><div class='add'>+static const struct can_bittiming_const xcan_bittiming_const_canfd2 = {</div><div class='add'>+	.name = DRIVER_NAME,</div><div class='add'>+	.tseg1_min = 1,</div><div class='add'>+	.tseg1_max = 256,</div><div class='add'>+	.tseg2_min = 1,</div><div class='add'>+	.tseg2_max = 128,</div><div class='add'>+	.sjw_max = 128,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 256,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* AXI CANFD 2.0 Data Bittiming constants as per AXI CANFD 2.0 spec */</div><div class='add'>+static const struct can_bittiming_const xcan_data_bittiming_const_canfd2 = {</div><div class='add'>+	.name = DRIVER_NAME,</div><div class='add'>+	.tseg1_min = 1,</div><div class='add'>+	.tseg1_max = 32,</div><div class='add'>+	.tseg2_min = 1,</div><div class='add'>+	.tseg2_max = 16,</div><div class='add'>+	.sjw_max = 16,</div><div class='add'>+	.brp_min = 1,</div><div class='add'>+	.brp_max = 256,</div><div class='add'>+	.brp_inc = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Transmission Delay Compensation constants for CANFD 1.0 */</div><div class='add'>+static const struct can_tdc_const xcan_tdc_const_canfd = {</div><div class='add'>+	.tdcv_min = 0,</div><div class='add'>+	.tdcv_max = 0, /* Manual mode not supported. */</div><div class='add'>+	.tdco_min = 0,</div><div class='add'>+	.tdco_max = 32,</div><div class='add'>+	.tdcf_min = 0, /* Filter window not supported */</div><div class='add'>+	.tdcf_max = 0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Transmission Delay Compensation constants for CANFD 2.0 */</div><div class='add'>+static const struct can_tdc_const xcan_tdc_const_canfd2 = {</div><div class='add'>+	.tdcv_min = 0,</div><div class='add'>+	.tdcv_max = 0, /* Manual mode not supported. */</div><div class='add'>+	.tdco_min = 0,</div><div class='add'>+	.tdco_max = 64,</div><div class='add'>+	.tdcf_min = 0, /* Filter window not supported */</div><div class='add'>+	.tdcf_max = 0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum xcan_stats_type {</div><div class='add'>+	XCAN_ECC_RX_2_BIT_ERRORS,</div><div class='add'>+	XCAN_ECC_RX_1_BIT_ERRORS,</div><div class='add'>+	XCAN_ECC_TXOL_2_BIT_ERRORS,</div><div class='add'>+	XCAN_ECC_TXOL_1_BIT_ERRORS,</div><div class='add'>+	XCAN_ECC_TXTL_2_BIT_ERRORS,</div><div class='add'>+	XCAN_ECC_TXTL_1_BIT_ERRORS,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char xcan_priv_flags_strings[][ETH_GSTRING_LEN] = {</div><div class='add'>+	[XCAN_ECC_RX_2_BIT_ERRORS] = "ecc_rx_2_bit_errors",</div><div class='add'>+	[XCAN_ECC_RX_1_BIT_ERRORS] = "ecc_rx_1_bit_errors",</div><div class='add'>+	[XCAN_ECC_TXOL_2_BIT_ERRORS] = "ecc_txol_2_bit_errors",</div><div class='add'>+	[XCAN_ECC_TXOL_1_BIT_ERRORS] = "ecc_txol_1_bit_errors",</div><div class='add'>+	[XCAN_ECC_TXTL_2_BIT_ERRORS] = "ecc_txtl_2_bit_errors",</div><div class='add'>+	[XCAN_ECC_TXTL_1_BIT_ERRORS] = "ecc_txtl_1_bit_errors",</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /**</div><div class='ctx'>  * xcan_write_reg_le - Write a value to the device register little endian</div><div class='ctx'>  * @priv:	Driver private data structure</div><div class='hunk'>@@ -167,7 +376,7 @@ static const struct can_bittiming_const xcan_bittiming_const = {</div><div class='ctx'>  * Write data to the paricular CAN register</div><div class='ctx'>  */</div><div class='ctx'> static void xcan_write_reg_le(const struct xcan_priv *priv, enum xcan_reg reg,</div><div class='del'>-			u32 val)</div><div class='add'>+			      u32 val)</div><div class='ctx'> {</div><div class='ctx'> 	iowrite32(val, priv-&gt;reg_base + reg);</div><div class='ctx'> }</div><div class='hunk'>@@ -194,7 +403,7 @@ static u32 xcan_read_reg_le(const struct xcan_priv *priv, enum xcan_reg reg)</div><div class='ctx'>  * Write data to the paricular CAN register</div><div class='ctx'>  */</div><div class='ctx'> static void xcan_write_reg_be(const struct xcan_priv *priv, enum xcan_reg reg,</div><div class='del'>-			u32 val)</div><div class='add'>+			      u32 val)</div><div class='ctx'> {</div><div class='ctx'> 	iowrite32be(val, priv-&gt;reg_base + reg);</div><div class='ctx'> }</div><div class='hunk'>@@ -213,6 +422,23 @@ static u32 xcan_read_reg_be(const struct xcan_priv *priv, enum xcan_reg reg)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * xcan_rx_int_mask - Get the mask for the receive interrupt</div><div class='add'>+ * @priv:	Driver private data structure</div><div class='add'>+ *</div><div class='add'>+ * Return: The receive interrupt mask used by the driver on this HW</div><div class='add'>+ */</div><div class='add'>+static u32 xcan_rx_int_mask(const struct xcan_priv *priv)</div><div class='add'>+{</div><div class='add'>+	/* RXNEMP is better suited for our use case as it cannot be cleared</div><div class='add'>+	 * while the FIFO is non-empty, but CAN FD HW does not have it</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;devtype.flags &amp; XCAN_FLAG_RX_FIFO_MULTI)</div><div class='add'>+		return XCAN_IXR_RXOK_MASK;</div><div class='add'>+	else</div><div class='add'>+		return XCAN_IXR_RXNEMP_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * set_reset_mode - Resets the CAN device mode</div><div class='ctx'>  * @ndev:	Pointer to net_device structure</div><div class='ctx'>  *</div><div class='hunk'>@@ -237,6 +463,10 @@ static int set_reset_mode(struct net_device *ndev)</div><div class='ctx'> 		usleep_range(500, 10000);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* reset clears FIFOs */</div><div class='add'>+	priv-&gt;tx_head = 0;</div><div class='add'>+	priv-&gt;tx_tail = 0;</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -251,6 +481,7 @@ static int xcan_set_bittiming(struct net_device *ndev)</div><div class='ctx'> {</div><div class='ctx'> 	struct xcan_priv *priv = netdev_priv(ndev);</div><div class='ctx'> 	struct can_bittiming *bt = &amp;priv-&gt;can.bittiming;</div><div class='add'>+	struct can_bittiming *dbt = &amp;priv-&gt;can.fd.data_bittiming;</div><div class='ctx'> 	u32 btr0, btr1;</div><div class='ctx'> 	u32 is_config_mode;</div><div class='ctx'> </div><div class='hunk'>@@ -261,28 +492,54 @@ static int xcan_set_bittiming(struct net_device *ndev)</div><div class='ctx'> 				XCAN_SR_CONFIG_MASK;</div><div class='ctx'> 	if (!is_config_mode) {</div><div class='ctx'> 		netdev_alert(ndev,</div><div class='del'>-		     "BUG! Cannot set bittiming - CAN is not in config mode\n");</div><div class='add'>+			     "BUG! Cannot set bittiming - CAN is not in config mode\n");</div><div class='ctx'> 		return -EPERM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Setting Baud Rate prescalar value in BRPR Register */</div><div class='add'>+	/* Setting Baud Rate prescaler value in BRPR Register */</div><div class='ctx'> 	btr0 = (bt-&gt;brp - 1);</div><div class='ctx'> </div><div class='ctx'> 	/* Setting Time Segment 1 in BTR Register */</div><div class='ctx'> 	btr1 = (bt-&gt;prop_seg + bt-&gt;phase_seg1 - 1);</div><div class='ctx'> </div><div class='ctx'> 	/* Setting Time Segment 2 in BTR Register */</div><div class='del'>-	btr1 |= (bt-&gt;phase_seg2 - 1) &lt;&lt; XCAN_BTR_TS2_SHIFT;</div><div class='add'>+	btr1 |= (bt-&gt;phase_seg2 - 1) &lt;&lt; priv-&gt;devtype.btr_ts2_shift;</div><div class='ctx'> </div><div class='ctx'> 	/* Setting Synchronous jump width in BTR Register */</div><div class='del'>-	btr1 |= (bt-&gt;sjw - 1) &lt;&lt; XCAN_BTR_SJW_SHIFT;</div><div class='add'>+	btr1 |= (bt-&gt;sjw - 1) &lt;&lt; priv-&gt;devtype.btr_sjw_shift;</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;write_reg(priv, XCAN_BRPR_OFFSET, btr0);</div><div class='ctx'> 	priv-&gt;write_reg(priv, XCAN_BTR_OFFSET, btr1);</div><div class='ctx'> </div><div class='add'>+	if (priv-&gt;devtype.cantype == XAXI_CANFD ||</div><div class='add'>+	    priv-&gt;devtype.cantype == XAXI_CANFD_2_0) {</div><div class='add'>+		/* Setting Baud Rate prescaler value in F_BRPR Register */</div><div class='add'>+		btr0 = dbt-&gt;brp - 1;</div><div class='add'>+		if (can_fd_tdc_is_enabled(&amp;priv-&gt;can)) {</div><div class='add'>+			if (priv-&gt;devtype.cantype == XAXI_CANFD)</div><div class='add'>+				btr0 |= FIELD_PREP(XCAN_BRPR_TDCO_MASK, priv-&gt;can.fd.tdc.tdco) |</div><div class='add'>+					XCAN_BRPR_TDC_ENABLE;</div><div class='add'>+			else</div><div class='add'>+				btr0 |= FIELD_PREP(XCAN_2_BRPR_TDCO_MASK, priv-&gt;can.fd.tdc.tdco) |</div><div class='add'>+					XCAN_BRPR_TDC_ENABLE;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Setting Time Segment 1 in BTR Register */</div><div class='add'>+		btr1 = dbt-&gt;prop_seg + dbt-&gt;phase_seg1 - 1;</div><div class='add'>+</div><div class='add'>+		/* Setting Time Segment 2 in BTR Register */</div><div class='add'>+		btr1 |= (dbt-&gt;phase_seg2 - 1) &lt;&lt; priv-&gt;devtype.btr_ts2_shift;</div><div class='add'>+</div><div class='add'>+		/* Setting Synchronous jump width in BTR Register */</div><div class='add'>+		btr1 |= (dbt-&gt;sjw - 1) &lt;&lt; priv-&gt;devtype.btr_sjw_shift;</div><div class='add'>+</div><div class='add'>+		priv-&gt;write_reg(priv, XCAN_F_BRPR_OFFSET, btr0);</div><div class='add'>+		priv-&gt;write_reg(priv, XCAN_F_BTR_OFFSET, btr1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	netdev_dbg(ndev, "BRPR=0x%08x, BTR=0x%08x\n",</div><div class='del'>-			priv-&gt;read_reg(priv, XCAN_BRPR_OFFSET),</div><div class='del'>-			priv-&gt;read_reg(priv, XCAN_BTR_OFFSET));</div><div class='add'>+		   priv-&gt;read_reg(priv, XCAN_BRPR_OFFSET),</div><div class='add'>+		   priv-&gt;read_reg(priv, XCAN_BTR_OFFSET));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -300,9 +557,9 @@ static int xcan_set_bittiming(struct net_device *ndev)</div><div class='ctx'> static int xcan_chip_start(struct net_device *ndev)</div><div class='ctx'> {</div><div class='ctx'> 	struct xcan_priv *priv = netdev_priv(ndev);</div><div class='del'>-	u32 reg_msr, reg_sr_mask;</div><div class='add'>+	u32 reg_msr;</div><div class='ctx'> 	int err;</div><div class='del'>-	unsigned long timeout;</div><div class='add'>+	u32 ier;</div><div class='ctx'> </div><div class='ctx'> 	/* Check if it is in reset mode */</div><div class='ctx'> 	err = set_reset_mode(ndev);</div><div class='hunk'>@@ -313,31 +570,43 @@ static int xcan_chip_start(struct net_device *ndev)</div><div class='ctx'> 	if (err &lt; 0)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='del'>-	/* Enable interrupts */</div><div class='del'>-	priv-&gt;write_reg(priv, XCAN_IER_OFFSET, XCAN_INTR_ALL);</div><div class='add'>+	/* Enable interrupts</div><div class='add'>+	 *</div><div class='add'>+	 * We enable the ERROR interrupt even with</div><div class='add'>+	 * CAN_CTRLMODE_BERR_REPORTING disabled as there is no</div><div class='add'>+	 * dedicated interrupt for a state change to</div><div class='add'>+	 * ERROR_WARNING/ERROR_PASSIVE.</div><div class='add'>+	 */</div><div class='add'>+	ier = XCAN_IXR_TXOK_MASK | XCAN_IXR_BSOFF_MASK |</div><div class='add'>+		XCAN_IXR_WKUP_MASK | XCAN_IXR_SLP_MASK |</div><div class='add'>+		XCAN_IXR_ERROR_MASK | XCAN_IXR_RXOFLW_MASK |</div><div class='add'>+		XCAN_IXR_ARBLST_MASK | xcan_rx_int_mask(priv);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;ecc_enable)</div><div class='add'>+		ier |= XCAN_IXR_ECC_MASK;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;devtype.flags &amp; XCAN_FLAG_RXMNF)</div><div class='add'>+		ier |= XCAN_IXR_RXMNF_MASK;</div><div class='add'>+</div><div class='add'>+	priv-&gt;write_reg(priv, XCAN_IER_OFFSET, ier);</div><div class='ctx'> </div><div class='ctx'> 	/* Check whether it is loopback mode or normal mode  */</div><div class='del'>-	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LOOPBACK) {</div><div class='add'>+	if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_LOOPBACK)</div><div class='ctx'> 		reg_msr = XCAN_MSR_LBACK_MASK;</div><div class='del'>-		reg_sr_mask = XCAN_SR_LBACK_MASK;</div><div class='del'>-	} else {</div><div class='add'>+	else</div><div class='ctx'> 		reg_msr = 0x0;</div><div class='del'>-		reg_sr_mask = XCAN_SR_NORMAL_MASK;</div><div class='del'>-	}</div><div class='add'>+</div><div class='add'>+	/* enable the first extended filter, if any, as cores with extended</div><div class='add'>+	 * filtering default to non-receipt if all filters are disabled</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;devtype.flags &amp; XCAN_FLAG_EXT_FILTERS)</div><div class='add'>+		priv-&gt;write_reg(priv, XCAN_AFR_EXT_OFFSET, 0x00000001);</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;write_reg(priv, XCAN_MSR_OFFSET, reg_msr);</div><div class='ctx'> 	priv-&gt;write_reg(priv, XCAN_SRR_OFFSET, XCAN_SRR_CEN_MASK);</div><div class='ctx'> </div><div class='del'>-	timeout = jiffies + XCAN_TIMEOUT;</div><div class='del'>-	while (!(priv-&gt;read_reg(priv, XCAN_SR_OFFSET) &amp; reg_sr_mask)) {</div><div class='del'>-		if (time_after(jiffies, timeout)) {</div><div class='del'>-			netdev_warn(ndev,</div><div class='del'>-				"timed out for correct mode\n");</div><div class='del'>-			return -ETIMEDOUT;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='ctx'> 	netdev_dbg(ndev, "status:#x%08x\n",</div><div class='del'>-			priv-&gt;read_reg(priv, XCAN_SR_OFFSET));</div><div class='add'>+		   priv-&gt;read_reg(priv, XCAN_SR_OFFSET));</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -348,8 +617,7 @@ static int xcan_chip_start(struct net_device *ndev)</div><div class='ctx'>  * @ndev:	Pointer to net_device structure</div><div class='ctx'>  * @mode:	Tells the mode of the driver</div><div class='ctx'>  *</div><div class='del'>- * This check the drivers state and calls the</div><div class='del'>- * the corresponding modes to set.</div><div class='add'>+ * This check the drivers state and calls the corresponding modes to set.</div><div class='ctx'>  *</div><div class='ctx'>  * Return: 0 on success and failure value on error</div><div class='ctx'>  */</div><div class='hunk'>@@ -375,33 +643,18 @@ static int xcan_do_set_mode(struct net_device *ndev, enum can_mode mode)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * xcan_start_xmit - Starts the transmission</div><div class='del'>- * @skb:	sk_buff pointer that contains data to be Txed</div><div class='del'>- * @ndev:	Pointer to net_device structure</div><div class='del'>- *</div><div class='del'>- * This function is invoked from upper layers to initiate transmission. This</div><div class='del'>- * function uses the next available free txbuff and populates their fields to</div><div class='del'>- * start the transmission.</div><div class='del'>- *</div><div class='del'>- * Return: 0 on success and failure value on error</div><div class='add'>+ * xcan_write_frame - Write a frame to HW</div><div class='add'>+ * @ndev:		Pointer to net_device structure</div><div class='add'>+ * @skb:		sk_buff pointer that contains data to be Txed</div><div class='add'>+ * @frame_offset:	Register offset to write the frame to</div><div class='ctx'>  */</div><div class='del'>-static int xcan_start_xmit(struct sk_buff *skb, struct net_device *ndev)</div><div class='add'>+static void xcan_write_frame(struct net_device *ndev, struct sk_buff *skb,</div><div class='add'>+			     int frame_offset)</div><div class='ctx'> {</div><div class='del'>-	struct xcan_priv *priv = netdev_priv(ndev);</div><div class='del'>-	struct net_device_stats *stats = &amp;ndev-&gt;stats;</div><div class='del'>-	struct can_frame *cf = (struct can_frame *)skb-&gt;data;</div><div class='ctx'> 	u32 id, dlc, data[2] = {0, 0};</div><div class='del'>-</div><div class='del'>-	if (can_dropped_invalid_skb(ndev, skb))</div><div class='del'>-		return NETDEV_TX_OK;</div><div class='del'>-</div><div class='del'>-	/* Check if the TX buffer is full */</div><div class='del'>-	if (unlikely(priv-&gt;read_reg(priv, XCAN_SR_OFFSET) &amp;</div><div class='del'>-			XCAN_SR_TXFLL_MASK)) {</div><div class='del'>-		netif_stop_queue(ndev);</div><div class='del'>-		netdev_err(ndev, "BUG!, TX FIFO full when queue awake!\n");</div><div class='del'>-		return NETDEV_TX_BUSY;</div><div class='del'>-	}</div><div class='add'>+	struct canfd_frame *cf = (struct canfd_frame *)skb-&gt;data;</div><div class='add'>+	u32 ramoff, dwindex = 0, i;</div><div class='add'>+	struct xcan_priv *priv = netdev_priv(ndev);</div><div class='ctx'> </div><div class='ctx'> 	/* Watch carefully on the bit sequence */</div><div class='ctx'> 	if (cf-&gt;can_id &amp; CAN_EFF_FLAG) {</div><div class='hunk'>@@ -409,7 +662,7 @@ static int xcan_start_xmit(struct sk_buff *skb, struct net_device *ndev)</div><div class='ctx'> 		id = ((cf-&gt;can_id &amp; CAN_EFF_MASK) &lt;&lt; XCAN_IDR_ID2_SHIFT) &amp;</div><div class='ctx'> 			XCAN_IDR_ID2_MASK;</div><div class='ctx'> 		id |= (((cf-&gt;can_id &amp; CAN_EFF_MASK) &gt;&gt;</div><div class='del'>-			(CAN_EFF_ID_BITS-CAN_SFF_ID_BITS)) &lt;&lt;</div><div class='add'>+			(CAN_EFF_ID_BITS - CAN_SFF_ID_BITS)) &lt;&lt;</div><div class='ctx'> 			XCAN_IDR_ID1_SHIFT) &amp; XCAN_IDR_ID1_MASK;</div><div class='ctx'> </div><div class='ctx'> 		/* The substibute remote TX request bit should be "1"</div><div class='hunk'>@@ -430,33 +683,148 @@ static int xcan_start_xmit(struct sk_buff *skb, struct net_device *ndev)</div><div class='ctx'> 			id |= XCAN_IDR_SRR_MASK;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dlc = cf-&gt;can_dlc &lt;&lt; XCAN_DLCR_DLC_SHIFT;</div><div class='add'>+	dlc = can_fd_len2dlc(cf-&gt;len) &lt;&lt; XCAN_DLCR_DLC_SHIFT;</div><div class='add'>+	if (can_is_canfd_skb(skb)) {</div><div class='add'>+		if (cf-&gt;flags &amp; CANFD_BRS)</div><div class='add'>+			dlc |= XCAN_DLCR_BRS_MASK;</div><div class='add'>+		dlc |= XCAN_DLCR_EDL_MASK;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (cf-&gt;can_dlc &gt; 0)</div><div class='del'>-		data[0] = be32_to_cpup((__be32 *)(cf-&gt;data + 0));</div><div class='del'>-	if (cf-&gt;can_dlc &gt; 4)</div><div class='del'>-		data[1] = be32_to_cpup((__be32 *)(cf-&gt;data + 4));</div><div class='add'>+	priv-&gt;write_reg(priv, XCAN_FRAME_ID_OFFSET(frame_offset), id);</div><div class='add'>+	/* If the CAN frame is RTR frame this write triggers transmission</div><div class='add'>+	 * (not on CAN FD)</div><div class='add'>+	 */</div><div class='add'>+	priv-&gt;write_reg(priv, XCAN_FRAME_DLC_OFFSET(frame_offset), dlc);</div><div class='add'>+	if (priv-&gt;devtype.cantype == XAXI_CANFD ||</div><div class='add'>+	    priv-&gt;devtype.cantype == XAXI_CANFD_2_0) {</div><div class='add'>+		for (i = 0; i &lt; cf-&gt;len; i += 4) {</div><div class='add'>+			ramoff = XCANFD_FRAME_DW_OFFSET(frame_offset) +</div><div class='add'>+					(dwindex * XCANFD_DW_BYTES);</div><div class='add'>+			priv-&gt;write_reg(priv, ramoff,</div><div class='add'>+					be32_to_cpup((__be32 *)(cf-&gt;data + i)));</div><div class='add'>+			dwindex++;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		if (cf-&gt;len &gt; 0)</div><div class='add'>+			data[0] = be32_to_cpup((__be32 *)(cf-&gt;data + 0));</div><div class='add'>+		if (cf-&gt;len &gt; 4)</div><div class='add'>+			data[1] = be32_to_cpup((__be32 *)(cf-&gt;data + 4));</div><div class='add'>+</div><div class='add'>+		if (!(cf-&gt;can_id &amp; CAN_RTR_FLAG)) {</div><div class='add'>+			priv-&gt;write_reg(priv,</div><div class='add'>+					XCAN_FRAME_DW1_OFFSET(frame_offset),</div><div class='add'>+					data[0]);</div><div class='add'>+			/* If the CAN frame is Standard/Extended frame this</div><div class='add'>+			 * write triggers transmission (not on CAN FD)</div><div class='add'>+			 */</div><div class='add'>+			priv-&gt;write_reg(priv,</div><div class='add'>+					XCAN_FRAME_DW2_OFFSET(frame_offset),</div><div class='add'>+					data[1]);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!(priv-&gt;devtype.flags &amp; XCAN_FLAG_TX_MAILBOXES) &amp;&amp;</div><div class='add'>+	    (priv-&gt;devtype.flags &amp; XCAN_FLAG_TXFEMP))</div><div class='add'>+		can_put_echo_skb(skb, ndev, priv-&gt;tx_head % priv-&gt;tx_max, 0);</div><div class='add'>+	else</div><div class='add'>+		can_put_echo_skb(skb, ndev, 0, 0);</div><div class='ctx'> </div><div class='del'>-	can_put_echo_skb(skb, ndev, priv-&gt;tx_head % priv-&gt;tx_max);</div><div class='ctx'> 	priv-&gt;tx_head++;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	/* Write the Frame to Xilinx CAN TX FIFO */</div><div class='del'>-	priv-&gt;write_reg(priv, XCAN_TXFIFO_ID_OFFSET, id);</div><div class='del'>-	/* If the CAN frame is RTR frame this write triggers tranmission */</div><div class='del'>-	priv-&gt;write_reg(priv, XCAN_TXFIFO_DLC_OFFSET, dlc);</div><div class='del'>-	if (!(cf-&gt;can_id &amp; CAN_RTR_FLAG)) {</div><div class='del'>-		priv-&gt;write_reg(priv, XCAN_TXFIFO_DW1_OFFSET, data[0]);</div><div class='del'>-		/* If the CAN frame is Standard/Extended frame this</div><div class='del'>-		 * write triggers tranmission</div><div class='del'>-		 */</div><div class='del'>-		priv-&gt;write_reg(priv, XCAN_TXFIFO_DW2_OFFSET, data[1]);</div><div class='del'>-		stats-&gt;tx_bytes += cf-&gt;can_dlc;</div><div class='del'>-	}</div><div class='add'>+/**</div><div class='add'>+ * xcan_start_xmit_fifo - Starts the transmission (FIFO mode)</div><div class='add'>+ * @skb:	sk_buff pointer that contains data to be Txed</div><div class='add'>+ * @ndev:	Pointer to net_device structure</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -ENOSPC if FIFO is full.</div><div class='add'>+ */</div><div class='add'>+static int xcan_start_xmit_fifo(struct sk_buff *skb, struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct xcan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	/* Check if the TX buffer is full */</div><div class='add'>+	if (unlikely(priv-&gt;read_reg(priv, XCAN_SR_OFFSET) &amp;</div><div class='add'>+			XCAN_SR_TXFLL_MASK))</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;tx_lock, flags);</div><div class='add'>+</div><div class='add'>+	xcan_write_frame(ndev, skb, XCAN_TXFIFO_OFFSET);</div><div class='add'>+</div><div class='add'>+	/* Clear TX-FIFO-empty interrupt for xcan_tx_interrupt() */</div><div class='add'>+	if (priv-&gt;tx_max &gt; 1)</div><div class='add'>+		priv-&gt;write_reg(priv, XCAN_ICR_OFFSET, XCAN_IXR_TXFEMP_MASK);</div><div class='ctx'> </div><div class='ctx'> 	/* Check if the TX buffer is full */</div><div class='ctx'> 	if ((priv-&gt;tx_head - priv-&gt;tx_tail) == priv-&gt;tx_max)</div><div class='ctx'> 		netif_stop_queue(ndev);</div><div class='ctx'> </div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;tx_lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * xcan_start_xmit_mailbox - Starts the transmission (mailbox mode)</div><div class='add'>+ * @skb:	sk_buff pointer that contains data to be Txed</div><div class='add'>+ * @ndev:	Pointer to net_device structure</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, -ENOSPC if there is no space</div><div class='add'>+ */</div><div class='add'>+static int xcan_start_xmit_mailbox(struct sk_buff *skb, struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct xcan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (unlikely(priv-&gt;read_reg(priv, XCAN_TRR_OFFSET) &amp;</div><div class='add'>+		     BIT(XCAN_TX_MAILBOX_IDX)))</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;tx_lock, flags);</div><div class='add'>+</div><div class='add'>+	xcan_write_frame(ndev, skb,</div><div class='add'>+			 XCAN_TXMSG_FRAME_OFFSET(XCAN_TX_MAILBOX_IDX));</div><div class='add'>+</div><div class='add'>+	/* Mark buffer as ready for transmit */</div><div class='add'>+	priv-&gt;write_reg(priv, XCAN_TRR_OFFSET, BIT(XCAN_TX_MAILBOX_IDX));</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(ndev);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;tx_lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * xcan_start_xmit - Starts the transmission</div><div class='add'>+ * @skb:	sk_buff pointer that contains data to be Txed</div><div class='add'>+ * @ndev:	Pointer to net_device structure</div><div class='add'>+ *</div><div class='add'>+ * This function is invoked from upper layers to initiate transmission.</div><div class='add'>+ *</div><div class='add'>+ * Return: NETDEV_TX_OK on success and NETDEV_TX_BUSY when the tx queue is full</div><div class='add'>+ */</div><div class='add'>+static netdev_tx_t xcan_start_xmit(struct sk_buff *skb, struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct xcan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (can_dev_dropped_skb(ndev, skb))</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;devtype.flags &amp; XCAN_FLAG_TX_MAILBOXES)</div><div class='add'>+		ret = xcan_start_xmit_mailbox(skb, ndev);</div><div class='add'>+	else</div><div class='add'>+		ret = xcan_start_xmit_fifo(skb, ndev);</div><div class='add'>+</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		netdev_err(ndev, "BUG!, TX full when queue awake!\n");</div><div class='add'>+		netif_stop_queue(ndev);</div><div class='add'>+		return NETDEV_TX_BUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -464,13 +832,14 @@ static int xcan_start_xmit(struct sk_buff *skb, struct net_device *ndev)</div><div class='ctx'>  * xcan_rx -  Is called from CAN isr to complete the received</div><div class='ctx'>  *		frame  processing</div><div class='ctx'>  * @ndev:	Pointer to net_device structure</div><div class='add'>+ * @frame_base:	Register offset to the frame to be read</div><div class='ctx'>  *</div><div class='ctx'>  * This function is invoked from the CAN isr(poll) to process the Rx frames. It</div><div class='ctx'>  * does minimal processing and invokes "netif_receive_skb" to complete further</div><div class='ctx'>  * processing.</div><div class='ctx'>  * Return: 1 on success and 0 on failure.</div><div class='ctx'>  */</div><div class='del'>-static int xcan_rx(struct net_device *ndev)</div><div class='add'>+static int xcan_rx(struct net_device *ndev, int frame_base)</div><div class='ctx'> {</div><div class='ctx'> 	struct xcan_priv *priv = netdev_priv(ndev);</div><div class='ctx'> 	struct net_device_stats *stats = &amp;ndev-&gt;stats;</div><div class='hunk'>@@ -485,12 +854,12 @@ static int xcan_rx(struct net_device *ndev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Read a frame from Xilinx zynq CANPS */</div><div class='del'>-	id_xcan = priv-&gt;read_reg(priv, XCAN_RXFIFO_ID_OFFSET);</div><div class='del'>-	dlc = priv-&gt;read_reg(priv, XCAN_RXFIFO_DLC_OFFSET) &gt;&gt;</div><div class='del'>-				XCAN_DLCR_DLC_SHIFT;</div><div class='add'>+	id_xcan = priv-&gt;read_reg(priv, XCAN_FRAME_ID_OFFSET(frame_base));</div><div class='add'>+	dlc = priv-&gt;read_reg(priv, XCAN_FRAME_DLC_OFFSET(frame_base)) &gt;&gt;</div><div class='add'>+				   XCAN_DLCR_DLC_SHIFT;</div><div class='ctx'> </div><div class='ctx'> 	/* Change Xilinx CAN data length format to socketCAN data format */</div><div class='del'>-	cf-&gt;can_dlc = get_can_dlc(dlc);</div><div class='add'>+	cf-&gt;len = can_cc_dlc2len(dlc);</div><div class='ctx'> </div><div class='ctx'> 	/* Change Xilinx CAN ID format to socketCAN ID format */</div><div class='ctx'> 	if (id_xcan &amp; XCAN_IDR_IDE_MASK) {</div><div class='hunk'>@@ -510,49 +879,221 @@ static int xcan_rx(struct net_device *ndev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* DW1/DW2 must always be read to remove message from RXFIFO */</div><div class='del'>-	data[0] = priv-&gt;read_reg(priv, XCAN_RXFIFO_DW1_OFFSET);</div><div class='del'>-	data[1] = priv-&gt;read_reg(priv, XCAN_RXFIFO_DW2_OFFSET);</div><div class='add'>+	data[0] = priv-&gt;read_reg(priv, XCAN_FRAME_DW1_OFFSET(frame_base));</div><div class='add'>+	data[1] = priv-&gt;read_reg(priv, XCAN_FRAME_DW2_OFFSET(frame_base));</div><div class='ctx'> </div><div class='ctx'> 	if (!(cf-&gt;can_id &amp; CAN_RTR_FLAG)) {</div><div class='ctx'> 		/* Change Xilinx CAN data format to socketCAN data format */</div><div class='del'>-		if (cf-&gt;can_dlc &gt; 0)</div><div class='add'>+		if (cf-&gt;len &gt; 0)</div><div class='ctx'> 			*(__be32 *)(cf-&gt;data) = cpu_to_be32(data[0]);</div><div class='del'>-		if (cf-&gt;can_dlc &gt; 4)</div><div class='add'>+		if (cf-&gt;len &gt; 4)</div><div class='ctx'> 			*(__be32 *)(cf-&gt;data + 4) = cpu_to_be32(data[1]);</div><div class='add'>+</div><div class='add'>+		stats-&gt;rx_bytes += cf-&gt;len;</div><div class='add'>+	}</div><div class='add'>+	stats-&gt;rx_packets++;</div><div class='add'>+</div><div class='add'>+	netif_receive_skb(skb);</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * xcanfd_rx -  Is called from CAN isr to complete the received</div><div class='add'>+ *		frame  processing</div><div class='add'>+ * @ndev:	Pointer to net_device structure</div><div class='add'>+ * @frame_base:	Register offset to the frame to be read</div><div class='add'>+ *</div><div class='add'>+ * This function is invoked from the CAN isr(poll) to process the Rx frames. It</div><div class='add'>+ * does minimal processing and invokes "netif_receive_skb" to complete further</div><div class='add'>+ * processing.</div><div class='add'>+ * Return: 1 on success and 0 on failure.</div><div class='add'>+ */</div><div class='add'>+static int xcanfd_rx(struct net_device *ndev, int frame_base)</div><div class='add'>+{</div><div class='add'>+	struct xcan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct net_device_stats *stats = &amp;ndev-&gt;stats;</div><div class='add'>+	struct canfd_frame *cf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	u32 id_xcan, dlc, data[2] = {0, 0}, dwindex = 0, i, dw_offset;</div><div class='add'>+</div><div class='add'>+	id_xcan = priv-&gt;read_reg(priv, XCAN_FRAME_ID_OFFSET(frame_base));</div><div class='add'>+	dlc = priv-&gt;read_reg(priv, XCAN_FRAME_DLC_OFFSET(frame_base));</div><div class='add'>+	if (dlc &amp; XCAN_DLCR_EDL_MASK)</div><div class='add'>+		skb = alloc_canfd_skb(ndev, &amp;cf);</div><div class='add'>+	else</div><div class='add'>+		skb = alloc_can_skb(ndev, (struct can_frame **)&amp;cf);</div><div class='add'>+</div><div class='add'>+	if (unlikely(!skb)) {</div><div class='add'>+		stats-&gt;rx_dropped++;</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	stats-&gt;rx_bytes += cf-&gt;can_dlc;</div><div class='add'>+	/* Change Xilinx CANFD data length format to socketCAN data</div><div class='add'>+	 * format</div><div class='add'>+	 */</div><div class='add'>+	if (dlc &amp; XCAN_DLCR_EDL_MASK)</div><div class='add'>+		cf-&gt;len = can_fd_dlc2len((dlc &amp; XCAN_DLCR_DLC_MASK) &gt;&gt;</div><div class='add'>+				  XCAN_DLCR_DLC_SHIFT);</div><div class='add'>+	else</div><div class='add'>+		cf-&gt;len = can_cc_dlc2len((dlc &amp; XCAN_DLCR_DLC_MASK) &gt;&gt;</div><div class='add'>+					  XCAN_DLCR_DLC_SHIFT);</div><div class='add'>+</div><div class='add'>+	/* Change Xilinx CAN ID format to socketCAN ID format */</div><div class='add'>+	if (id_xcan &amp; XCAN_IDR_IDE_MASK) {</div><div class='add'>+		/* The received frame is an Extended format frame */</div><div class='add'>+		cf-&gt;can_id = (id_xcan &amp; XCAN_IDR_ID1_MASK) &gt;&gt; 3;</div><div class='add'>+		cf-&gt;can_id |= (id_xcan &amp; XCAN_IDR_ID2_MASK) &gt;&gt;</div><div class='add'>+				XCAN_IDR_ID2_SHIFT;</div><div class='add'>+		cf-&gt;can_id |= CAN_EFF_FLAG;</div><div class='add'>+		if (id_xcan &amp; XCAN_IDR_RTR_MASK)</div><div class='add'>+			cf-&gt;can_id |= CAN_RTR_FLAG;</div><div class='add'>+	} else {</div><div class='add'>+		/* The received frame is a standard format frame */</div><div class='add'>+		cf-&gt;can_id = (id_xcan &amp; XCAN_IDR_ID1_MASK) &gt;&gt;</div><div class='add'>+				XCAN_IDR_ID1_SHIFT;</div><div class='add'>+		if (!(dlc &amp; XCAN_DLCR_EDL_MASK) &amp;&amp; (id_xcan &amp;</div><div class='add'>+					XCAN_IDR_SRR_MASK))</div><div class='add'>+			cf-&gt;can_id |= CAN_RTR_FLAG;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Check the frame received is FD or not*/</div><div class='add'>+	if (dlc &amp; XCAN_DLCR_EDL_MASK) {</div><div class='add'>+		for (i = 0; i &lt; cf-&gt;len; i += 4) {</div><div class='add'>+			dw_offset = XCANFD_FRAME_DW_OFFSET(frame_base) +</div><div class='add'>+					(dwindex * XCANFD_DW_BYTES);</div><div class='add'>+			data[0] = priv-&gt;read_reg(priv, dw_offset);</div><div class='add'>+			*(__be32 *)(cf-&gt;data + i) = cpu_to_be32(data[0]);</div><div class='add'>+			dwindex++;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		for (i = 0; i &lt; cf-&gt;len; i += 4) {</div><div class='add'>+			dw_offset = XCANFD_FRAME_DW_OFFSET(frame_base);</div><div class='add'>+			data[0] = priv-&gt;read_reg(priv, dw_offset + i);</div><div class='add'>+			*(__be32 *)(cf-&gt;data + i) = cpu_to_be32(data[0]);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!(cf-&gt;can_id &amp; CAN_RTR_FLAG))</div><div class='add'>+		stats-&gt;rx_bytes += cf-&gt;len;</div><div class='ctx'> 	stats-&gt;rx_packets++;</div><div class='add'>+</div><div class='ctx'> 	netif_receive_skb(skb);</div><div class='ctx'> </div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * xcan_current_error_state - Get current error state from HW</div><div class='add'>+ * @ndev:	Pointer to net_device structure</div><div class='add'>+ *</div><div class='add'>+ * Checks the current CAN error state from the HW. Note that this</div><div class='add'>+ * only checks for ERROR_PASSIVE and ERROR_WARNING.</div><div class='add'>+ *</div><div class='add'>+ * Return:</div><div class='add'>+ * ERROR_PASSIVE or ERROR_WARNING if either is active, ERROR_ACTIVE</div><div class='add'>+ * otherwise.</div><div class='add'>+ */</div><div class='add'>+static enum can_state xcan_current_error_state(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct xcan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	u32 status = priv-&gt;read_reg(priv, XCAN_SR_OFFSET);</div><div class='add'>+</div><div class='add'>+	if ((status &amp; XCAN_SR_ESTAT_MASK) == XCAN_SR_ESTAT_MASK)</div><div class='add'>+		return CAN_STATE_ERROR_PASSIVE;</div><div class='add'>+	else if (status &amp; XCAN_SR_ERRWRN_MASK)</div><div class='add'>+		return CAN_STATE_ERROR_WARNING;</div><div class='add'>+	else</div><div class='add'>+		return CAN_STATE_ERROR_ACTIVE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * xcan_set_error_state - Set new CAN error state</div><div class='add'>+ * @ndev:	Pointer to net_device structure</div><div class='add'>+ * @new_state:	The new CAN state to be set</div><div class='add'>+ * @cf:		Error frame to be populated or NULL</div><div class='add'>+ *</div><div class='add'>+ * Set new CAN error state for the device, updating statistics and</div><div class='add'>+ * populating the error frame if given.</div><div class='add'>+ */</div><div class='add'>+static void xcan_set_error_state(struct net_device *ndev,</div><div class='add'>+				 enum can_state new_state,</div><div class='add'>+				 struct can_frame *cf)</div><div class='add'>+{</div><div class='add'>+	struct xcan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	u32 ecr = priv-&gt;read_reg(priv, XCAN_ECR_OFFSET);</div><div class='add'>+	u32 txerr = ecr &amp; XCAN_ECR_TEC_MASK;</div><div class='add'>+	u32 rxerr = (ecr &amp; XCAN_ECR_REC_MASK) &gt;&gt; XCAN_ESR_REC_SHIFT;</div><div class='add'>+	enum can_state tx_state = txerr &gt;= rxerr ? new_state : 0;</div><div class='add'>+	enum can_state rx_state = txerr &lt;= rxerr ? new_state : 0;</div><div class='add'>+</div><div class='add'>+	/* non-ERROR states are handled elsewhere */</div><div class='add'>+	if (WARN_ON(new_state &gt; CAN_STATE_ERROR_PASSIVE))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	can_change_state(ndev, cf, tx_state, rx_state);</div><div class='add'>+</div><div class='add'>+	if (cf) {</div><div class='add'>+		cf-&gt;can_id |= CAN_ERR_CNT;</div><div class='add'>+		cf-&gt;data[6] = txerr;</div><div class='add'>+		cf-&gt;data[7] = rxerr;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * xcan_update_error_state_after_rxtx - Update CAN error state after RX/TX</div><div class='add'>+ * @ndev:	Pointer to net_device structure</div><div class='add'>+ *</div><div class='add'>+ * If the device is in a ERROR-WARNING or ERROR-PASSIVE state, check if</div><div class='add'>+ * the performed RX/TX has caused it to drop to a lesser state and set</div><div class='add'>+ * the interface state accordingly.</div><div class='add'>+ */</div><div class='add'>+static void xcan_update_error_state_after_rxtx(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct xcan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	enum can_state old_state = priv-&gt;can.state;</div><div class='add'>+	enum can_state new_state;</div><div class='add'>+</div><div class='add'>+	/* changing error state due to successful frame RX/TX can only</div><div class='add'>+	 * occur from these states</div><div class='add'>+	 */</div><div class='add'>+	if (old_state != CAN_STATE_ERROR_WARNING &amp;&amp;</div><div class='add'>+	    old_state != CAN_STATE_ERROR_PASSIVE)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	new_state = xcan_current_error_state(ndev);</div><div class='add'>+</div><div class='add'>+	if (new_state != old_state) {</div><div class='add'>+		struct sk_buff *skb;</div><div class='add'>+		struct can_frame *cf;</div><div class='add'>+</div><div class='add'>+		skb = alloc_can_err_skb(ndev, &amp;cf);</div><div class='add'>+</div><div class='add'>+		xcan_set_error_state(ndev, new_state, skb ? cf : NULL);</div><div class='add'>+</div><div class='add'>+		if (skb)</div><div class='add'>+			netif_rx(skb);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * xcan_err_interrupt - error frame Isr</div><div class='ctx'>  * @ndev:	net_device pointer</div><div class='ctx'>  * @isr:	interrupt status register value</div><div class='ctx'>  *</div><div class='ctx'>  * This is the CAN error interrupt and it will</div><div class='del'>- * check the the type of error and forward the error</div><div class='add'>+ * check the type of error and forward the error</div><div class='ctx'>  * frame to upper layers.</div><div class='ctx'>  */</div><div class='ctx'> static void xcan_err_interrupt(struct net_device *ndev, u32 isr)</div><div class='ctx'> {</div><div class='ctx'> 	struct xcan_priv *priv = netdev_priv(ndev);</div><div class='ctx'> 	struct net_device_stats *stats = &amp;ndev-&gt;stats;</div><div class='del'>-	struct can_frame *cf;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	u32 err_status, status, txerr = 0, rxerr = 0;</div><div class='del'>-</div><div class='del'>-	skb = alloc_can_err_skb(ndev, &amp;cf);</div><div class='add'>+	struct can_frame cf = { };</div><div class='add'>+	u32 err_status;</div><div class='ctx'> </div><div class='ctx'> 	err_status = priv-&gt;read_reg(priv, XCAN_ESR_OFFSET);</div><div class='ctx'> 	priv-&gt;write_reg(priv, XCAN_ESR_OFFSET, err_status);</div><div class='del'>-	txerr = priv-&gt;read_reg(priv, XCAN_ECR_OFFSET) &amp; XCAN_ECR_TEC_MASK;</div><div class='del'>-	rxerr = ((priv-&gt;read_reg(priv, XCAN_ECR_OFFSET) &amp;</div><div class='del'>-			XCAN_ECR_REC_MASK) &gt;&gt; XCAN_ESR_REC_SHIFT);</div><div class='del'>-	status = priv-&gt;read_reg(priv, XCAN_SR_OFFSET);</div><div class='ctx'> </div><div class='ctx'> 	if (isr &amp; XCAN_IXR_BSOFF_MASK) {</div><div class='ctx'> 		priv-&gt;can.state = CAN_STATE_BUS_OFF;</div><div class='hunk'>@@ -560,115 +1101,155 @@ static void xcan_err_interrupt(struct net_device *ndev, u32 isr)</div><div class='ctx'> 		/* Leave device in Config Mode in bus-off state */</div><div class='ctx'> 		priv-&gt;write_reg(priv, XCAN_SRR_OFFSET, XCAN_SRR_RESET_MASK);</div><div class='ctx'> 		can_bus_off(ndev);</div><div class='del'>-		if (skb)</div><div class='del'>-			cf-&gt;can_id |= CAN_ERR_BUSOFF;</div><div class='del'>-	} else if ((status &amp; XCAN_SR_ESTAT_MASK) == XCAN_SR_ESTAT_MASK) {</div><div class='del'>-		priv-&gt;can.state = CAN_STATE_ERROR_PASSIVE;</div><div class='del'>-		priv-&gt;can.can_stats.error_passive++;</div><div class='del'>-		if (skb) {</div><div class='del'>-			cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='del'>-			cf-&gt;data[1] = (rxerr &gt; 127) ?</div><div class='del'>-					CAN_ERR_CRTL_RX_PASSIVE :</div><div class='del'>-					CAN_ERR_CRTL_TX_PASSIVE;</div><div class='del'>-			cf-&gt;data[6] = txerr;</div><div class='del'>-			cf-&gt;data[7] = rxerr;</div><div class='del'>-		}</div><div class='del'>-	} else if (status &amp; XCAN_SR_ERRWRN_MASK) {</div><div class='del'>-		priv-&gt;can.state = CAN_STATE_ERROR_WARNING;</div><div class='del'>-		priv-&gt;can.can_stats.error_warning++;</div><div class='del'>-		if (skb) {</div><div class='del'>-			cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='del'>-			cf-&gt;data[1] |= (txerr &gt; rxerr) ?</div><div class='del'>-					CAN_ERR_CRTL_TX_WARNING :</div><div class='del'>-					CAN_ERR_CRTL_RX_WARNING;</div><div class='del'>-			cf-&gt;data[6] = txerr;</div><div class='del'>-			cf-&gt;data[7] = rxerr;</div><div class='del'>-		}</div><div class='add'>+		cf.can_id |= CAN_ERR_BUSOFF;</div><div class='add'>+	} else {</div><div class='add'>+		enum can_state new_state = xcan_current_error_state(ndev);</div><div class='add'>+</div><div class='add'>+		if (new_state != priv-&gt;can.state)</div><div class='add'>+			xcan_set_error_state(ndev, new_state, &amp;cf);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Check for Arbitration lost interrupt */</div><div class='ctx'> 	if (isr &amp; XCAN_IXR_ARBLST_MASK) {</div><div class='ctx'> 		priv-&gt;can.can_stats.arbitration_lost++;</div><div class='del'>-		if (skb) {</div><div class='del'>-			cf-&gt;can_id |= CAN_ERR_LOSTARB;</div><div class='del'>-			cf-&gt;data[0] = CAN_ERR_LOSTARB_UNSPEC;</div><div class='del'>-		}</div><div class='add'>+		cf.can_id |= CAN_ERR_LOSTARB;</div><div class='add'>+		cf.data[0] = CAN_ERR_LOSTARB_UNSPEC;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Check for RX FIFO Overflow interrupt */</div><div class='ctx'> 	if (isr &amp; XCAN_IXR_RXOFLW_MASK) {</div><div class='ctx'> 		stats-&gt;rx_over_errors++;</div><div class='ctx'> 		stats-&gt;rx_errors++;</div><div class='del'>-		priv-&gt;write_reg(priv, XCAN_SRR_OFFSET, XCAN_SRR_RESET_MASK);</div><div class='del'>-		if (skb) {</div><div class='del'>-			cf-&gt;can_id |= CAN_ERR_CRTL;</div><div class='del'>-			cf-&gt;data[1] |= CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='del'>-		}</div><div class='add'>+		cf.can_id |= CAN_ERR_CRTL;</div><div class='add'>+		cf.data[1] |= CAN_ERR_CRTL_RX_OVERFLOW;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Check for RX Match Not Finished interrupt */</div><div class='add'>+	if (isr &amp; XCAN_IXR_RXMNF_MASK) {</div><div class='add'>+		stats-&gt;rx_dropped++;</div><div class='add'>+		stats-&gt;rx_errors++;</div><div class='add'>+		netdev_err(ndev, "RX match not finished, frame discarded\n");</div><div class='add'>+		cf.can_id |= CAN_ERR_CRTL;</div><div class='add'>+		cf.data[1] |= CAN_ERR_CRTL_UNSPEC;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Check for error interrupt */</div><div class='ctx'> 	if (isr &amp; XCAN_IXR_ERROR_MASK) {</div><div class='del'>-		if (skb) {</div><div class='del'>-			cf-&gt;can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='del'>-			cf-&gt;data[2] |= CAN_ERR_PROT_UNSPEC;</div><div class='add'>+		bool berr_reporting = false;</div><div class='add'>+</div><div class='add'>+		if (priv-&gt;can.ctrlmode &amp; CAN_CTRLMODE_BERR_REPORTING) {</div><div class='add'>+			berr_reporting = true;</div><div class='add'>+			cf.can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Check for Ack error interrupt */</div><div class='ctx'> 		if (err_status &amp; XCAN_ESR_ACKER_MASK) {</div><div class='ctx'> 			stats-&gt;tx_errors++;</div><div class='del'>-			if (skb) {</div><div class='del'>-				cf-&gt;can_id |= CAN_ERR_ACK;</div><div class='del'>-				cf-&gt;data[3] |= CAN_ERR_PROT_LOC_ACK;</div><div class='add'>+			if (berr_reporting) {</div><div class='add'>+				cf.can_id |= CAN_ERR_ACK;</div><div class='add'>+				cf.data[3] = CAN_ERR_PROT_LOC_ACK;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Check for Bit error interrupt */</div><div class='ctx'> 		if (err_status &amp; XCAN_ESR_BERR_MASK) {</div><div class='ctx'> 			stats-&gt;tx_errors++;</div><div class='del'>-			if (skb) {</div><div class='del'>-				cf-&gt;can_id |= CAN_ERR_PROT;</div><div class='del'>-				cf-&gt;data[2] = CAN_ERR_PROT_BIT;</div><div class='add'>+			if (berr_reporting) {</div><div class='add'>+				cf.can_id |= CAN_ERR_PROT;</div><div class='add'>+				cf.data[2] = CAN_ERR_PROT_BIT;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Check for Stuff error interrupt */</div><div class='ctx'> 		if (err_status &amp; XCAN_ESR_STER_MASK) {</div><div class='ctx'> 			stats-&gt;rx_errors++;</div><div class='del'>-			if (skb) {</div><div class='del'>-				cf-&gt;can_id |= CAN_ERR_PROT;</div><div class='del'>-				cf-&gt;data[2] = CAN_ERR_PROT_STUFF;</div><div class='add'>+			if (berr_reporting) {</div><div class='add'>+				cf.can_id |= CAN_ERR_PROT;</div><div class='add'>+				cf.data[2] = CAN_ERR_PROT_STUFF;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Check for Form error interrupt */</div><div class='ctx'> 		if (err_status &amp; XCAN_ESR_FMER_MASK) {</div><div class='ctx'> 			stats-&gt;rx_errors++;</div><div class='del'>-			if (skb) {</div><div class='del'>-				cf-&gt;can_id |= CAN_ERR_PROT;</div><div class='del'>-				cf-&gt;data[2] = CAN_ERR_PROT_FORM;</div><div class='add'>+			if (berr_reporting) {</div><div class='add'>+				cf.can_id |= CAN_ERR_PROT;</div><div class='add'>+				cf.data[2] = CAN_ERR_PROT_FORM;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Check for CRC error interrupt */</div><div class='ctx'> 		if (err_status &amp; XCAN_ESR_CRCER_MASK) {</div><div class='ctx'> 			stats-&gt;rx_errors++;</div><div class='del'>-			if (skb) {</div><div class='del'>-				cf-&gt;can_id |= CAN_ERR_PROT;</div><div class='del'>-				cf-&gt;data[3] = CAN_ERR_PROT_LOC_CRC_SEQ |</div><div class='del'>-						CAN_ERR_PROT_LOC_CRC_DEL;</div><div class='add'>+			if (berr_reporting) {</div><div class='add'>+				cf.can_id |= CAN_ERR_PROT;</div><div class='add'>+				cf.data[3] = CAN_ERR_PROT_LOC_CRC_SEQ;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='del'>-			priv-&gt;can.can_stats.bus_error++;</div><div class='add'>+		priv-&gt;can.can_stats.bus_error++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;ecc_enable &amp;&amp; isr &amp; XCAN_IXR_ECC_MASK) {</div><div class='add'>+		u32 reg_rx_ecc, reg_txol_ecc, reg_txtl_ecc;</div><div class='add'>+</div><div class='add'>+		reg_rx_ecc = priv-&gt;read_reg(priv, XCAN_RXFIFO_ECC_OFFSET);</div><div class='add'>+		reg_txol_ecc = priv-&gt;read_reg(priv, XCAN_TXOLFIFO_ECC_OFFSET);</div><div class='add'>+		reg_txtl_ecc = priv-&gt;read_reg(priv, XCAN_TXTLFIFO_ECC_OFFSET);</div><div class='add'>+</div><div class='add'>+		/* The counter reaches its maximum at 0xffff and does not overflow.</div><div class='add'>+		 * Accept the small race window between reading and resetting ECC counters.</div><div class='add'>+		 */</div><div class='add'>+		priv-&gt;write_reg(priv, XCAN_ECC_CFG_OFFSET, XCAN_ECC_CFG_REECRX_MASK |</div><div class='add'>+				XCAN_ECC_CFG_REECTXOL_MASK | XCAN_ECC_CFG_REECTXTL_MASK);</div><div class='add'>+</div><div class='add'>+		u64_stats_update_begin(&amp;priv-&gt;syncp);</div><div class='add'>+</div><div class='add'>+		if (isr &amp; XCAN_IXR_E2BERX_MASK) {</div><div class='add'>+			u64_stats_add(&amp;priv-&gt;ecc_rx_2_bit_errors,</div><div class='add'>+				      FIELD_GET(XCAN_ECC_2BIT_CNT_MASK, reg_rx_ecc));</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (isr &amp; XCAN_IXR_E1BERX_MASK) {</div><div class='add'>+			u64_stats_add(&amp;priv-&gt;ecc_rx_1_bit_errors,</div><div class='add'>+				      FIELD_GET(XCAN_ECC_1BIT_CNT_MASK, reg_rx_ecc));</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (isr &amp; XCAN_IXR_E2BETXOL_MASK) {</div><div class='add'>+			u64_stats_add(&amp;priv-&gt;ecc_txol_2_bit_errors,</div><div class='add'>+				      FIELD_GET(XCAN_ECC_2BIT_CNT_MASK, reg_txol_ecc));</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (isr &amp; XCAN_IXR_E1BETXOL_MASK) {</div><div class='add'>+			u64_stats_add(&amp;priv-&gt;ecc_txol_1_bit_errors,</div><div class='add'>+				      FIELD_GET(XCAN_ECC_1BIT_CNT_MASK, reg_txol_ecc));</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (isr &amp; XCAN_IXR_E2BETXTL_MASK) {</div><div class='add'>+			u64_stats_add(&amp;priv-&gt;ecc_txtl_2_bit_errors,</div><div class='add'>+				      FIELD_GET(XCAN_ECC_2BIT_CNT_MASK, reg_txtl_ecc));</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (isr &amp; XCAN_IXR_E1BETXTL_MASK) {</div><div class='add'>+			u64_stats_add(&amp;priv-&gt;ecc_txtl_1_bit_errors,</div><div class='add'>+				      FIELD_GET(XCAN_ECC_1BIT_CNT_MASK, reg_txtl_ecc));</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		u64_stats_update_end(&amp;priv-&gt;syncp);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (skb) {</div><div class='del'>-		stats-&gt;rx_packets++;</div><div class='del'>-		stats-&gt;rx_bytes += cf-&gt;can_dlc;</div><div class='del'>-		netif_rx(skb);</div><div class='add'>+	if (cf.can_id) {</div><div class='add'>+		struct can_frame *skb_cf;</div><div class='add'>+		struct sk_buff *skb = alloc_can_err_skb(ndev, &amp;skb_cf);</div><div class='add'>+</div><div class='add'>+		if (skb) {</div><div class='add'>+			skb_cf-&gt;can_id |= cf.can_id;</div><div class='add'>+			memcpy(skb_cf-&gt;data, cf.data, CAN_ERR_DLC);</div><div class='add'>+			netif_rx(skb);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	netdev_dbg(ndev, "%s: error status register:0x%x\n",</div><div class='del'>-			__func__, priv-&gt;read_reg(priv, XCAN_ESR_OFFSET));</div><div class='add'>+		   __func__, priv-&gt;read_reg(priv, XCAN_ESR_OFFSET));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -693,6 +1274,55 @@ static void xcan_state_interrupt(struct net_device *ndev, u32 isr)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='add'>+ * xcan_rx_fifo_get_next_frame - Get register offset of next RX frame</div><div class='add'>+ * @priv:	Driver private data structure</div><div class='add'>+ *</div><div class='add'>+ * Return: Register offset of the next frame in RX FIFO.</div><div class='add'>+ */</div><div class='add'>+static int xcan_rx_fifo_get_next_frame(struct xcan_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int offset;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;devtype.flags &amp; XCAN_FLAG_RX_FIFO_MULTI) {</div><div class='add'>+		u32 fsr, mask;</div><div class='add'>+</div><div class='add'>+		/* clear RXOK before the is-empty check so that any newly</div><div class='add'>+		 * received frame will reassert it without a race</div><div class='add'>+		 */</div><div class='add'>+		priv-&gt;write_reg(priv, XCAN_ICR_OFFSET, XCAN_IXR_RXOK_MASK);</div><div class='add'>+</div><div class='add'>+		fsr = priv-&gt;read_reg(priv, XCAN_FSR_OFFSET);</div><div class='add'>+</div><div class='add'>+		/* check if RX FIFO is empty */</div><div class='add'>+		if (priv-&gt;devtype.flags &amp; XCAN_FLAG_CANFD_2)</div><div class='add'>+			mask = XCAN_2_FSR_FL_MASK;</div><div class='add'>+		else</div><div class='add'>+			mask = XCAN_FSR_FL_MASK;</div><div class='add'>+</div><div class='add'>+		if (!(fsr &amp; mask))</div><div class='add'>+			return -ENOENT;</div><div class='add'>+</div><div class='add'>+		if (priv-&gt;devtype.flags &amp; XCAN_FLAG_CANFD_2)</div><div class='add'>+			offset =</div><div class='add'>+			  XCAN_RXMSG_2_FRAME_OFFSET(fsr &amp; XCAN_2_FSR_RI_MASK);</div><div class='add'>+		else</div><div class='add'>+			offset =</div><div class='add'>+			  XCAN_RXMSG_FRAME_OFFSET(fsr &amp; XCAN_FSR_RI_MASK);</div><div class='add'>+</div><div class='add'>+	} else {</div><div class='add'>+		/* check if RX FIFO is empty */</div><div class='add'>+		if (!(priv-&gt;read_reg(priv, XCAN_ISR_OFFSET) &amp;</div><div class='add'>+		      XCAN_IXR_RXNEMP_MASK))</div><div class='add'>+			return -ENOENT;</div><div class='add'>+</div><div class='add'>+		/* frames are read from a static offset */</div><div class='add'>+		offset = XCAN_RXFIFO_OFFSET;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return offset;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='ctx'>  * xcan_rx_poll - Poll routine for rx packets (NAPI)</div><div class='ctx'>  * @napi:	napi structure pointer</div><div class='ctx'>  * @quota:	Max number of rx packets to be processed.</div><div class='hunk'>@@ -706,32 +1336,38 @@ static int xcan_rx_poll(struct napi_struct *napi, int quota)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *ndev = napi-&gt;dev;</div><div class='ctx'> 	struct xcan_priv *priv = netdev_priv(ndev);</div><div class='del'>-	u32 isr, ier;</div><div class='add'>+	u32 ier;</div><div class='ctx'> 	int work_done = 0;</div><div class='del'>-</div><div class='del'>-	isr = priv-&gt;read_reg(priv, XCAN_ISR_OFFSET);</div><div class='del'>-	while ((isr &amp; XCAN_IXR_RXNEMP_MASK) &amp;&amp; (work_done &lt; quota)) {</div><div class='del'>-		if (isr &amp; XCAN_IXR_RXOK_MASK) {</div><div class='add'>+	int frame_offset;</div><div class='add'>+</div><div class='add'>+	while ((frame_offset = xcan_rx_fifo_get_next_frame(priv)) &gt;= 0 &amp;&amp;</div><div class='add'>+	       (work_done &lt; quota)) {</div><div class='add'>+		if (xcan_rx_int_mask(priv) &amp; XCAN_IXR_RXOK_MASK)</div><div class='add'>+			work_done += xcanfd_rx(ndev, frame_offset);</div><div class='add'>+		else</div><div class='add'>+			work_done += xcan_rx(ndev, frame_offset);</div><div class='add'>+</div><div class='add'>+		if (priv-&gt;devtype.flags &amp; XCAN_FLAG_RX_FIFO_MULTI)</div><div class='add'>+			/* increment read index */</div><div class='add'>+			priv-&gt;write_reg(priv, XCAN_FSR_OFFSET,</div><div class='add'>+					XCAN_FSR_IRI_MASK);</div><div class='add'>+		else</div><div class='add'>+			/* clear rx-not-empty (will actually clear only if</div><div class='add'>+			 * empty)</div><div class='add'>+			 */</div><div class='ctx'> 			priv-&gt;write_reg(priv, XCAN_ICR_OFFSET,</div><div class='del'>-				XCAN_IXR_RXOK_MASK);</div><div class='del'>-			work_done += xcan_rx(ndev);</div><div class='del'>-		} else {</div><div class='del'>-			priv-&gt;write_reg(priv, XCAN_ICR_OFFSET,</div><div class='del'>-				XCAN_IXR_RXNEMP_MASK);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		priv-&gt;write_reg(priv, XCAN_ICR_OFFSET, XCAN_IXR_RXNEMP_MASK);</div><div class='del'>-		isr = priv-&gt;read_reg(priv, XCAN_ISR_OFFSET);</div><div class='add'>+					XCAN_IXR_RXNEMP_MASK);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (work_done)</div><div class='del'>-		can_led_event(ndev, CAN_LED_EVENT_RX);</div><div class='add'>+		xcan_update_error_state_after_rxtx(ndev);</div><div class='ctx'> </div><div class='ctx'> 	if (work_done &lt; quota) {</div><div class='del'>-		napi_complete(napi);</div><div class='del'>-		ier = priv-&gt;read_reg(priv, XCAN_IER_OFFSET);</div><div class='del'>-		ier |= (XCAN_IXR_RXOK_MASK | XCAN_IXR_RXNEMP_MASK);</div><div class='del'>-		priv-&gt;write_reg(priv, XCAN_IER_OFFSET, ier);</div><div class='add'>+		if (napi_complete_done(napi, work_done)) {</div><div class='add'>+			ier = priv-&gt;read_reg(priv, XCAN_IER_OFFSET);</div><div class='add'>+			ier |= xcan_rx_int_mask(priv);</div><div class='add'>+			priv-&gt;write_reg(priv, XCAN_IER_OFFSET, ier);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> 	return work_done;</div><div class='ctx'> }</div><div class='hunk'>@@ -745,24 +1381,78 @@ static void xcan_tx_interrupt(struct net_device *ndev, u32 isr)</div><div class='ctx'> {</div><div class='ctx'> 	struct xcan_priv *priv = netdev_priv(ndev);</div><div class='ctx'> 	struct net_device_stats *stats = &amp;ndev-&gt;stats;</div><div class='add'>+	unsigned int frames_in_fifo;</div><div class='add'>+	int frames_sent = 1; /* TXOK =&gt; at least 1 frame was sent */</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int retries = 0;</div><div class='add'>+</div><div class='add'>+	/* Synchronize with xmit as we need to know the exact number</div><div class='add'>+	 * of frames in the FIFO to stay in sync due to the TXFEMP</div><div class='add'>+	 * handling.</div><div class='add'>+	 * This also prevents a race between netif_wake_queue() and</div><div class='add'>+	 * netif_stop_queue().</div><div class='add'>+	 */</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;tx_lock, flags);</div><div class='add'>+</div><div class='add'>+	frames_in_fifo = priv-&gt;tx_head - priv-&gt;tx_tail;</div><div class='ctx'> </div><div class='del'>-	while ((priv-&gt;tx_head - priv-&gt;tx_tail &gt; 0) &amp;&amp;</div><div class='del'>-			(isr &amp; XCAN_IXR_TXOK_MASK)) {</div><div class='add'>+	if (WARN_ON_ONCE(frames_in_fifo == 0)) {</div><div class='add'>+		/* clear TXOK anyway to avoid getting back here */</div><div class='add'>+		priv-&gt;write_reg(priv, XCAN_ICR_OFFSET, XCAN_IXR_TXOK_MASK);</div><div class='add'>+		spin_unlock_irqrestore(&amp;priv-&gt;tx_lock, flags);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Check if 2 frames were sent (TXOK only means that at least 1</div><div class='add'>+	 * frame was sent).</div><div class='add'>+	 */</div><div class='add'>+	if (frames_in_fifo &gt; 1) {</div><div class='add'>+		WARN_ON(frames_in_fifo &gt; priv-&gt;tx_max);</div><div class='add'>+</div><div class='add'>+		/* Synchronize TXOK and isr so that after the loop:</div><div class='add'>+		 * (1) isr variable is up-to-date at least up to TXOK clear</div><div class='add'>+		 *     time. This avoids us clearing a TXOK of a second frame</div><div class='add'>+		 *     but not noticing that the FIFO is now empty and thus</div><div class='add'>+		 *     marking only a single frame as sent.</div><div class='add'>+		 * (2) No TXOK is left. Having one could mean leaving a</div><div class='add'>+		 *     stray TXOK as we might process the associated frame</div><div class='add'>+		 *     via TXFEMP handling as we read TXFEMP *after* TXOK</div><div class='add'>+		 *     clear to satisfy (1).</div><div class='add'>+		 */</div><div class='add'>+		while ((isr &amp; XCAN_IXR_TXOK_MASK) &amp;&amp;</div><div class='add'>+		       !WARN_ON(++retries == 100)) {</div><div class='add'>+			priv-&gt;write_reg(priv, XCAN_ICR_OFFSET,</div><div class='add'>+					XCAN_IXR_TXOK_MASK);</div><div class='add'>+			isr = priv-&gt;read_reg(priv, XCAN_ISR_OFFSET);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (isr &amp; XCAN_IXR_TXFEMP_MASK) {</div><div class='add'>+			/* nothing in FIFO anymore */</div><div class='add'>+			frames_sent = frames_in_fifo;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		/* single frame in fifo, just clear TXOK */</div><div class='ctx'> 		priv-&gt;write_reg(priv, XCAN_ICR_OFFSET, XCAN_IXR_TXOK_MASK);</div><div class='del'>-		can_get_echo_skb(ndev, priv-&gt;tx_tail %</div><div class='del'>-					priv-&gt;tx_max);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	while (frames_sent--) {</div><div class='add'>+		stats-&gt;tx_bytes += can_get_echo_skb(ndev, priv-&gt;tx_tail %</div><div class='add'>+						    priv-&gt;tx_max, NULL);</div><div class='ctx'> 		priv-&gt;tx_tail++;</div><div class='ctx'> 		stats-&gt;tx_packets++;</div><div class='del'>-		isr = priv-&gt;read_reg(priv, XCAN_ISR_OFFSET);</div><div class='ctx'> 	}</div><div class='del'>-	can_led_event(ndev, CAN_LED_EVENT_TX);</div><div class='add'>+</div><div class='ctx'> 	netif_wake_queue(ndev);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;tx_lock, flags);</div><div class='add'>+</div><div class='add'>+	xcan_update_error_state_after_rxtx(ndev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * xcan_interrupt - CAN Isr</div><div class='ctx'>  * @irq:	irq number</div><div class='del'>- * @dev_id:	device id poniter</div><div class='add'>+ * @dev_id:	device id pointer</div><div class='ctx'>  *</div><div class='ctx'>  * This is the xilinx CAN Isr. It checks for the type of interrupt</div><div class='ctx'>  * and invokes the corresponding ISR.</div><div class='hunk'>@@ -774,7 +1464,9 @@ static irqreturn_t xcan_interrupt(int irq, void *dev_id)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *ndev = (struct net_device *)dev_id;</div><div class='ctx'> 	struct xcan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	u32 isr_errors, mask;</div><div class='ctx'> 	u32 isr, ier;</div><div class='add'>+	u32 rx_int_mask = xcan_rx_int_mask(priv);</div><div class='ctx'> </div><div class='ctx'> 	/* Get the interrupt status from Xilinx CAN */</div><div class='ctx'> 	isr = priv-&gt;read_reg(priv, XCAN_ISR_OFFSET);</div><div class='hunk'>@@ -792,19 +1484,24 @@ static irqreturn_t xcan_interrupt(int irq, void *dev_id)</div><div class='ctx'> 	if (isr &amp; XCAN_IXR_TXOK_MASK)</div><div class='ctx'> 		xcan_tx_interrupt(ndev, isr);</div><div class='ctx'> </div><div class='add'>+	mask = XCAN_IXR_ERROR_MASK | XCAN_IXR_RXOFLW_MASK |</div><div class='add'>+		XCAN_IXR_BSOFF_MASK | XCAN_IXR_ARBLST_MASK |</div><div class='add'>+		XCAN_IXR_RXMNF_MASK;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;ecc_enable)</div><div class='add'>+		mask |= XCAN_IXR_ECC_MASK;</div><div class='add'>+</div><div class='ctx'> 	/* Check for the type of error interrupt and Processing it */</div><div class='del'>-	if (isr &amp; (XCAN_IXR_ERROR_MASK | XCAN_IXR_RXOFLW_MASK |</div><div class='del'>-			XCAN_IXR_BSOFF_MASK | XCAN_IXR_ARBLST_MASK)) {</div><div class='del'>-		priv-&gt;write_reg(priv, XCAN_ICR_OFFSET, (XCAN_IXR_ERROR_MASK |</div><div class='del'>-				XCAN_IXR_RXOFLW_MASK | XCAN_IXR_BSOFF_MASK |</div><div class='del'>-				XCAN_IXR_ARBLST_MASK));</div><div class='add'>+	isr_errors = isr &amp; mask;</div><div class='add'>+	if (isr_errors) {</div><div class='add'>+		priv-&gt;write_reg(priv, XCAN_ICR_OFFSET, isr_errors);</div><div class='ctx'> 		xcan_err_interrupt(ndev, isr);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Check for the type of receive interrupt and Processing it */</div><div class='del'>-	if (isr &amp; (XCAN_IXR_RXNEMP_MASK | XCAN_IXR_RXOK_MASK)) {</div><div class='add'>+	if (isr &amp; rx_int_mask) {</div><div class='ctx'> 		ier = priv-&gt;read_reg(priv, XCAN_IER_OFFSET);</div><div class='del'>-		ier &amp;= ~(XCAN_IXR_RXNEMP_MASK | XCAN_IXR_RXOK_MASK);</div><div class='add'>+		ier &amp;= ~rx_int_mask;</div><div class='ctx'> 		priv-&gt;write_reg(priv, XCAN_IER_OFFSET, ier);</div><div class='ctx'> 		napi_schedule(&amp;priv-&gt;napi);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -821,13 +1518,13 @@ static irqreturn_t xcan_interrupt(int irq, void *dev_id)</div><div class='ctx'> static void xcan_chip_stop(struct net_device *ndev)</div><div class='ctx'> {</div><div class='ctx'> 	struct xcan_priv *priv = netdev_priv(ndev);</div><div class='del'>-	u32 ier;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Disable interrupts and leave the can in configuration mode */</div><div class='del'>-	ier = priv-&gt;read_reg(priv, XCAN_IER_OFFSET);</div><div class='del'>-	ier &amp;= ~XCAN_INTR_ALL;</div><div class='del'>-	priv-&gt;write_reg(priv, XCAN_IER_OFFSET, ier);</div><div class='del'>-	priv-&gt;write_reg(priv, XCAN_SRR_OFFSET, XCAN_SRR_RESET_MASK);</div><div class='add'>+	ret = set_reset_mode(ndev);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		netdev_dbg(ndev, "set_reset_mode() Failed\n");</div><div class='add'>+</div><div class='ctx'> 	priv-&gt;can.state = CAN_STATE_STOPPED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -843,36 +1540,35 @@ static int xcan_open(struct net_device *ndev)</div><div class='ctx'> 	struct xcan_priv *priv = netdev_priv(ndev);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = request_irq(ndev-&gt;irq, xcan_interrupt, priv-&gt;irq_flags,</div><div class='del'>-			ndev-&gt;name, ndev);</div><div class='add'>+	ret = phy_power_on(priv-&gt;transceiver);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = pm_runtime_get_sync(priv-&gt;dev);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='del'>-		netdev_err(ndev, "irq allocation for CAN failed\n");</div><div class='add'>+		netdev_err(ndev, "%s: pm_runtime_get failed(%d)\n",</div><div class='add'>+			   __func__, ret);</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = clk_prepare_enable(priv-&gt;can_clk);</div><div class='del'>-	if (ret) {</div><div class='del'>-		netdev_err(ndev, "unable to enable device clock\n");</div><div class='del'>-		goto err_irq;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = clk_prepare_enable(priv-&gt;bus_clk);</div><div class='del'>-	if (ret) {</div><div class='del'>-		netdev_err(ndev, "unable to enable bus clock\n");</div><div class='del'>-		goto err_can_clk;</div><div class='add'>+	ret = request_irq(ndev-&gt;irq, xcan_interrupt, priv-&gt;irq_flags,</div><div class='add'>+			  ndev-&gt;name, ndev);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		netdev_err(ndev, "irq allocation for CAN failed\n");</div><div class='add'>+		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Set chip into reset mode */</div><div class='ctx'> 	ret = set_reset_mode(ndev);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='ctx'> 		netdev_err(ndev, "mode resetting failed!\n");</div><div class='del'>-		goto err_bus_clk;</div><div class='add'>+		goto err_irq;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Common open */</div><div class='ctx'> 	ret = open_candev(ndev);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto err_bus_clk;</div><div class='add'>+		goto err_irq;</div><div class='ctx'> </div><div class='ctx'> 	ret = xcan_chip_start(ndev);</div><div class='ctx'> 	if (ret &lt; 0) {</div><div class='hunk'>@@ -880,7 +1576,6 @@ static int xcan_open(struct net_device *ndev)</div><div class='ctx'> 		goto err_candev;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	can_led_event(ndev, CAN_LED_EVENT_OPEN);</div><div class='ctx'> 	napi_enable(&amp;priv-&gt;napi);</div><div class='ctx'> 	netif_start_queue(ndev);</div><div class='ctx'> </div><div class='hunk'>@@ -888,13 +1583,12 @@ static int xcan_open(struct net_device *ndev)</div><div class='ctx'> </div><div class='ctx'> err_candev:</div><div class='ctx'> 	close_candev(ndev);</div><div class='del'>-err_bus_clk:</div><div class='del'>-	clk_disable_unprepare(priv-&gt;bus_clk);</div><div class='del'>-err_can_clk:</div><div class='del'>-	clk_disable_unprepare(priv-&gt;can_clk);</div><div class='ctx'> err_irq:</div><div class='ctx'> 	free_irq(ndev-&gt;irq, ndev);</div><div class='ctx'> err:</div><div class='add'>+	pm_runtime_put(priv-&gt;dev);</div><div class='add'>+	phy_power_off(priv-&gt;transceiver);</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -911,12 +1605,11 @@ static int xcan_close(struct net_device *ndev)</div><div class='ctx'> 	netif_stop_queue(ndev);</div><div class='ctx'> 	napi_disable(&amp;priv-&gt;napi);</div><div class='ctx'> 	xcan_chip_stop(ndev);</div><div class='del'>-	clk_disable_unprepare(priv-&gt;bus_clk);</div><div class='del'>-	clk_disable_unprepare(priv-&gt;can_clk);</div><div class='ctx'> 	free_irq(ndev-&gt;irq, ndev);</div><div class='ctx'> 	close_candev(ndev);</div><div class='ctx'> </div><div class='del'>-	can_led_event(ndev, CAN_LED_EVENT_STOP);</div><div class='add'>+	pm_runtime_put(priv-&gt;dev);</div><div class='add'>+	phy_power_off(priv-&gt;transceiver);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -930,108 +1623,248 @@ static int xcan_close(struct net_device *ndev)</div><div class='ctx'>  * Return: 0 on success and failure value on error</div><div class='ctx'>  */</div><div class='ctx'> static int xcan_get_berr_counter(const struct net_device *ndev,</div><div class='del'>-					struct can_berr_counter *bec)</div><div class='add'>+				 struct can_berr_counter *bec)</div><div class='ctx'> {</div><div class='ctx'> 	struct xcan_priv *priv = netdev_priv(ndev);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = clk_prepare_enable(priv-&gt;can_clk);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto err;</div><div class='del'>-</div><div class='del'>-	ret = clk_prepare_enable(priv-&gt;bus_clk);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto err_clk;</div><div class='add'>+	ret = pm_runtime_get_sync(priv-&gt;dev);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		netdev_err(ndev, "%s: pm_runtime_get failed(%d)\n",</div><div class='add'>+			   __func__, ret);</div><div class='add'>+		pm_runtime_put(priv-&gt;dev);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	bec-&gt;txerr = priv-&gt;read_reg(priv, XCAN_ECR_OFFSET) &amp; XCAN_ECR_TEC_MASK;</div><div class='ctx'> 	bec-&gt;rxerr = ((priv-&gt;read_reg(priv, XCAN_ECR_OFFSET) &amp;</div><div class='ctx'> 			XCAN_ECR_REC_MASK) &gt;&gt; XCAN_ESR_REC_SHIFT);</div><div class='ctx'> </div><div class='del'>-	clk_disable_unprepare(priv-&gt;bus_clk);</div><div class='del'>-	clk_disable_unprepare(priv-&gt;can_clk);</div><div class='add'>+	pm_runtime_put(priv-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-err_clk:</div><div class='del'>-	clk_disable_unprepare(priv-&gt;can_clk);</div><div class='del'>-err:</div><div class='del'>-	return ret;</div><div class='add'>+/**</div><div class='add'>+ * xcan_get_auto_tdcv - Get Transmitter Delay Compensation Value</div><div class='add'>+ * @ndev:	Pointer to net_device structure</div><div class='add'>+ * @tdcv:	Pointer to TDCV value</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success</div><div class='add'>+ */</div><div class='add'>+static int xcan_get_auto_tdcv(const struct net_device *ndev, u32 *tdcv)</div><div class='add'>+{</div><div class='add'>+	struct xcan_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	*tdcv = FIELD_GET(XCAN_SR_TDCV_MASK, priv-&gt;read_reg(priv, XCAN_SR_OFFSET));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xcan_get_strings(struct net_device *ndev, u32 stringset, u8 *buf)</div><div class='add'>+{</div><div class='add'>+	switch (stringset) {</div><div class='add'>+	case ETH_SS_STATS:</div><div class='add'>+		memcpy(buf, &amp;xcan_priv_flags_strings,</div><div class='add'>+		       sizeof(xcan_priv_flags_strings));</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xcan_get_sset_count(struct net_device *netdev, int sset)</div><div class='add'>+{</div><div class='add'>+	switch (sset) {</div><div class='add'>+	case ETH_SS_STATS:</div><div class='add'>+		return ARRAY_SIZE(xcan_priv_flags_strings);</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void xcan_get_ethtool_stats(struct net_device *ndev,</div><div class='add'>+				   struct ethtool_stats *stats, u64 *data)</div><div class='add'>+{</div><div class='add'>+	struct xcan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	unsigned int start;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		start = u64_stats_fetch_begin(&amp;priv-&gt;syncp);</div><div class='add'>+</div><div class='add'>+		data[XCAN_ECC_RX_2_BIT_ERRORS] = u64_stats_read(&amp;priv-&gt;ecc_rx_2_bit_errors);</div><div class='add'>+		data[XCAN_ECC_RX_1_BIT_ERRORS] = u64_stats_read(&amp;priv-&gt;ecc_rx_1_bit_errors);</div><div class='add'>+		data[XCAN_ECC_TXOL_2_BIT_ERRORS] = u64_stats_read(&amp;priv-&gt;ecc_txol_2_bit_errors);</div><div class='add'>+		data[XCAN_ECC_TXOL_1_BIT_ERRORS] = u64_stats_read(&amp;priv-&gt;ecc_txol_1_bit_errors);</div><div class='add'>+		data[XCAN_ECC_TXTL_2_BIT_ERRORS] = u64_stats_read(&amp;priv-&gt;ecc_txtl_2_bit_errors);</div><div class='add'>+		data[XCAN_ECC_TXTL_1_BIT_ERRORS] = u64_stats_read(&amp;priv-&gt;ecc_txtl_1_bit_errors);</div><div class='add'>+	} while (u64_stats_fetch_retry(&amp;priv-&gt;syncp, start));</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static const struct net_device_ops xcan_netdev_ops = {</div><div class='ctx'> 	.ndo_open	= xcan_open,</div><div class='ctx'> 	.ndo_stop	= xcan_close,</div><div class='ctx'> 	.ndo_start_xmit	= xcan_start_xmit,</div><div class='del'>-	.ndo_change_mtu	= can_change_mtu,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops xcan_ethtool_ops = {</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='add'>+	.get_strings = xcan_get_strings,</div><div class='add'>+	.get_sset_count = xcan_get_sset_count,</div><div class='add'>+	.get_ethtool_stats = xcan_get_ethtool_stats,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * xcan_suspend - Suspend method for the driver</div><div class='del'>- * @dev:	Address of the platform_device structure</div><div class='add'>+ * @dev:	Address of the device structure</div><div class='ctx'>  *</div><div class='ctx'>  * Put the driver into low power mode.</div><div class='del'>- * Return: 0 always</div><div class='add'>+ * Return: 0 on success and failure value on error</div><div class='ctx'>  */</div><div class='ctx'> static int __maybe_unused xcan_suspend(struct device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct platform_device *pdev = dev_get_drvdata(dev);</div><div class='del'>-	struct net_device *ndev = platform_get_drvdata(pdev);</div><div class='del'>-	struct xcan_priv *priv = netdev_priv(ndev);</div><div class='add'>+	struct net_device *ndev = dev_get_drvdata(dev);</div><div class='ctx'> </div><div class='ctx'> 	if (netif_running(ndev)) {</div><div class='ctx'> 		netif_stop_queue(ndev);</div><div class='ctx'> 		netif_device_detach(ndev);</div><div class='add'>+		xcan_chip_stop(ndev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return pm_runtime_force_suspend(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * xcan_resume - Resume from suspend</div><div class='add'>+ * @dev:	Address of the device structure</div><div class='add'>+ *</div><div class='add'>+ * Resume operation after suspend.</div><div class='add'>+ * Return: 0 on success and failure value on error</div><div class='add'>+ */</div><div class='add'>+static int __maybe_unused xcan_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = dev_get_drvdata(dev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = pm_runtime_force_resume(dev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "pm_runtime_force_resume failed on resume\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (netif_running(ndev)) {</div><div class='add'>+		ret = xcan_chip_start(ndev);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(dev, "xcan_chip_start failed on resume\n");</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		netif_device_attach(ndev);</div><div class='add'>+		netif_start_queue(ndev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	priv-&gt;write_reg(priv, XCAN_MSR_OFFSET, XCAN_MSR_SLEEP_MASK);</div><div class='del'>-	priv-&gt;can.state = CAN_STATE_SLEEPING;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	clk_disable(priv-&gt;bus_clk);</div><div class='del'>-	clk_disable(priv-&gt;can_clk);</div><div class='add'>+/**</div><div class='add'>+ * xcan_runtime_suspend - Runtime suspend method for the driver</div><div class='add'>+ * @dev:	Address of the device structure</div><div class='add'>+ *</div><div class='add'>+ * Put the driver into low power mode.</div><div class='add'>+ * Return: 0 always</div><div class='add'>+ */</div><div class='add'>+static int __maybe_unused xcan_runtime_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = dev_get_drvdata(dev);</div><div class='add'>+	struct xcan_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	clk_disable_unprepare(priv-&gt;bus_clk);</div><div class='add'>+	clk_disable_unprepare(priv-&gt;can_clk);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='del'>- * xcan_resume - Resume from suspend</div><div class='del'>- * @dev:	Address of the platformdevice structure</div><div class='add'>+ * xcan_runtime_resume - Runtime resume from suspend</div><div class='add'>+ * @dev:	Address of the device structure</div><div class='ctx'>  *</div><div class='ctx'>  * Resume operation after suspend.</div><div class='ctx'>  * Return: 0 on success and failure value on error</div><div class='ctx'>  */</div><div class='del'>-static int __maybe_unused xcan_resume(struct device *dev)</div><div class='add'>+static int __maybe_unused xcan_runtime_resume(struct device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct platform_device *pdev = dev_get_drvdata(dev);</div><div class='del'>-	struct net_device *ndev = platform_get_drvdata(pdev);</div><div class='add'>+	struct net_device *ndev = dev_get_drvdata(dev);</div><div class='ctx'> 	struct xcan_priv *priv = netdev_priv(ndev);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = clk_enable(priv-&gt;bus_clk);</div><div class='add'>+	ret = clk_prepare_enable(priv-&gt;bus_clk);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(dev, "Cannot enable clock.\n");</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='del'>-	ret = clk_enable(priv-&gt;can_clk);</div><div class='add'>+	ret = clk_prepare_enable(priv-&gt;can_clk);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(dev, "Cannot enable clock.\n");</div><div class='ctx'> 		clk_disable_unprepare(priv-&gt;bus_clk);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	priv-&gt;write_reg(priv, XCAN_MSR_OFFSET, 0);</div><div class='del'>-	priv-&gt;write_reg(priv, XCAN_SRR_OFFSET, XCAN_SRR_CEN_MASK);</div><div class='del'>-	priv-&gt;can.state = CAN_STATE_ERROR_ACTIVE;</div><div class='del'>-</div><div class='del'>-	if (netif_running(ndev)) {</div><div class='del'>-		netif_device_attach(ndev);</div><div class='del'>-		netif_start_queue(ndev);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static SIMPLE_DEV_PM_OPS(xcan_dev_pm_ops, xcan_suspend, xcan_resume);</div><div class='add'>+static const struct dev_pm_ops xcan_dev_pm_ops = {</div><div class='add'>+	SET_SYSTEM_SLEEP_PM_OPS(xcan_suspend, xcan_resume)</div><div class='add'>+	SET_RUNTIME_PM_OPS(xcan_runtime_suspend, xcan_runtime_resume, NULL)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct xcan_devtype_data xcan_zynq_data = {</div><div class='add'>+	.cantype = XZYNQ_CANPS,</div><div class='add'>+	.flags = XCAN_FLAG_TXFEMP,</div><div class='add'>+	.bittiming_const = &amp;xcan_bittiming_const,</div><div class='add'>+	.btr_ts2_shift = XCAN_BTR_TS2_SHIFT,</div><div class='add'>+	.btr_sjw_shift = XCAN_BTR_SJW_SHIFT,</div><div class='add'>+	.bus_clk_name = "pclk",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct xcan_devtype_data xcan_axi_data = {</div><div class='add'>+	.cantype = XAXI_CAN,</div><div class='add'>+	.bittiming_const = &amp;xcan_bittiming_const,</div><div class='add'>+	.btr_ts2_shift = XCAN_BTR_TS2_SHIFT,</div><div class='add'>+	.btr_sjw_shift = XCAN_BTR_SJW_SHIFT,</div><div class='add'>+	.bus_clk_name = "s_axi_aclk",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct xcan_devtype_data xcan_canfd_data = {</div><div class='add'>+	.cantype = XAXI_CANFD,</div><div class='add'>+	.flags = XCAN_FLAG_EXT_FILTERS |</div><div class='add'>+		 XCAN_FLAG_RXMNF |</div><div class='add'>+		 XCAN_FLAG_TX_MAILBOXES |</div><div class='add'>+		 XCAN_FLAG_RX_FIFO_MULTI,</div><div class='add'>+	.bittiming_const = &amp;xcan_bittiming_const_canfd,</div><div class='add'>+	.btr_ts2_shift = XCAN_BTR_TS2_SHIFT_CANFD,</div><div class='add'>+	.btr_sjw_shift = XCAN_BTR_SJW_SHIFT_CANFD,</div><div class='add'>+	.bus_clk_name = "s_axi_aclk",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct xcan_devtype_data xcan_canfd2_data = {</div><div class='add'>+	.cantype = XAXI_CANFD_2_0,</div><div class='add'>+	.flags = XCAN_FLAG_EXT_FILTERS |</div><div class='add'>+		 XCAN_FLAG_RXMNF |</div><div class='add'>+		 XCAN_FLAG_TX_MAILBOXES |</div><div class='add'>+		 XCAN_FLAG_CANFD_2 |</div><div class='add'>+		 XCAN_FLAG_RX_FIFO_MULTI,</div><div class='add'>+	.bittiming_const = &amp;xcan_bittiming_const_canfd2,</div><div class='add'>+	.btr_ts2_shift = XCAN_BTR_TS2_SHIFT_CANFD,</div><div class='add'>+	.btr_sjw_shift = XCAN_BTR_SJW_SHIFT_CANFD,</div><div class='add'>+	.bus_clk_name = "s_axi_aclk",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Match table for OF platform binding */</div><div class='add'>+static const struct of_device_id xcan_of_match[] = {</div><div class='add'>+	{ .compatible = "xlnx,zynq-can-1.0", .data = &amp;xcan_zynq_data },</div><div class='add'>+	{ .compatible = "xlnx,axi-can-1.00.a", .data = &amp;xcan_axi_data },</div><div class='add'>+	{ .compatible = "xlnx,canfd-1.0", .data = &amp;xcan_canfd_data },</div><div class='add'>+	{ .compatible = "xlnx,canfd-2.0", .data = &amp;xcan_canfd2_data },</div><div class='add'>+	{ /* end of list */ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, xcan_of_match);</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='ctx'>  * xcan_probe - Platform registration call</div><div class='hunk'>@@ -1044,27 +1877,69 @@ static SIMPLE_DEV_PM_OPS(xcan_dev_pm_ops, xcan_suspend, xcan_resume);</div><div class='ctx'>  */</div><div class='ctx'> static int xcan_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='del'>-	struct resource *res; /* IO mem resources */</div><div class='ctx'> 	struct net_device *ndev;</div><div class='ctx'> 	struct xcan_priv *priv;</div><div class='add'>+	struct phy *transceiver;</div><div class='add'>+	const struct xcan_devtype_data *devtype;</div><div class='ctx'> 	void __iomem *addr;</div><div class='del'>-	int ret, rx_max, tx_max;</div><div class='add'>+	int ret;</div><div class='add'>+	int rx_max, tx_max;</div><div class='add'>+	u32 hw_tx_max = 0, hw_rx_max = 0;</div><div class='add'>+	const char *hw_tx_max_property;</div><div class='ctx'> </div><div class='ctx'> 	/* Get the virtual base address for the device */</div><div class='del'>-	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='del'>-	addr = devm_ioremap_resource(&amp;pdev-&gt;dev, res);</div><div class='add'>+	addr = devm_platform_ioremap_resource(pdev, 0);</div><div class='ctx'> 	if (IS_ERR(addr)) {</div><div class='ctx'> 		ret = PTR_ERR(addr);</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = of_property_read_u32(pdev-&gt;dev.of_node, "tx-fifo-depth", &amp;tx_max);</div><div class='del'>-	if (ret &lt; 0)</div><div class='add'>+	devtype = device_get_match_data(&amp;pdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	hw_tx_max_property = devtype-&gt;flags &amp; XCAN_FLAG_TX_MAILBOXES ?</div><div class='add'>+			     "tx-mailbox-count" : "tx-fifo-depth";</div><div class='add'>+</div><div class='add'>+	ret = of_property_read_u32(pdev-&gt;dev.of_node, hw_tx_max_property,</div><div class='add'>+				   &amp;hw_tx_max);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "missing %s property\n",</div><div class='add'>+			hw_tx_max_property);</div><div class='ctx'> 		goto err;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	ret = of_property_read_u32(pdev-&gt;dev.of_node, "rx-fifo-depth", &amp;rx_max);</div><div class='del'>-	if (ret &lt; 0)</div><div class='add'>+	ret = of_property_read_u32(pdev-&gt;dev.of_node, "rx-fifo-depth",</div><div class='add'>+				   &amp;hw_rx_max);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+			"missing rx-fifo-depth property (mailbox mode is not supported)\n");</div><div class='ctx'> 		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* With TX FIFO:</div><div class='add'>+	 *</div><div class='add'>+	 * There is no way to directly figure out how many frames have been</div><div class='add'>+	 * sent when the TXOK interrupt is processed. If TXFEMP</div><div class='add'>+	 * is supported, we can have 2 frames in the FIFO and use TXFEMP</div><div class='add'>+	 * to determine if 1 or 2 frames have been sent.</div><div class='add'>+	 * Theoretically we should be able to use TXFWMEMP to determine up</div><div class='add'>+	 * to 3 frames, but it seems that after putting a second frame in the</div><div class='add'>+	 * FIFO, with watermark at 2 frames, it can happen that TXFWMEMP (less</div><div class='add'>+	 * than 2 frames in FIFO) is set anyway with no TXOK (a frame was</div><div class='add'>+	 * sent), which is not a sensible state - possibly TXFWMEMP is not</div><div class='add'>+	 * completely synchronized with the rest of the bits?</div><div class='add'>+	 *</div><div class='add'>+	 * With TX mailboxes:</div><div class='add'>+	 *</div><div class='add'>+	 * HW sends frames in CAN ID priority order. To preserve FIFO ordering</div><div class='add'>+	 * we submit frames one at a time.</div><div class='add'>+	 */</div><div class='add'>+	if (!(devtype-&gt;flags &amp; XCAN_FLAG_TX_MAILBOXES) &amp;&amp;</div><div class='add'>+	    (devtype-&gt;flags &amp; XCAN_FLAG_TXFEMP))</div><div class='add'>+		tx_max = min(hw_tx_max, 2U);</div><div class='add'>+	else</div><div class='add'>+		tx_max = 1;</div><div class='add'>+</div><div class='add'>+	rx_max = hw_rx_max;</div><div class='ctx'> </div><div class='ctx'> 	/* Create a CAN device instance */</div><div class='ctx'> 	ndev = alloc_candev(sizeof(struct xcan_priv), tx_max);</div><div class='hunk'>@@ -1072,63 +1947,96 @@ static int xcan_probe(struct platform_device *pdev)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	priv = netdev_priv(ndev);</div><div class='del'>-	priv-&gt;dev = ndev;</div><div class='del'>-	priv-&gt;can.bittiming_const = &amp;xcan_bittiming_const;</div><div class='add'>+	priv-&gt;ecc_enable = of_property_read_bool(pdev-&gt;dev.of_node, "xlnx,has-ecc");</div><div class='add'>+	priv-&gt;dev = &amp;pdev-&gt;dev;</div><div class='add'>+	priv-&gt;can.bittiming_const = devtype-&gt;bittiming_const;</div><div class='ctx'> 	priv-&gt;can.do_set_mode = xcan_do_set_mode;</div><div class='ctx'> 	priv-&gt;can.do_get_berr_counter = xcan_get_berr_counter;</div><div class='ctx'> 	priv-&gt;can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK |</div><div class='ctx'> 					CAN_CTRLMODE_BERR_REPORTING;</div><div class='add'>+	priv-&gt;rstc = devm_reset_control_get_optional_exclusive(&amp;pdev-&gt;dev, NULL);</div><div class='add'>+	if (IS_ERR(priv-&gt;rstc)) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Cannot get CAN reset.\n");</div><div class='add'>+		ret = PTR_ERR(priv-&gt;rstc);</div><div class='add'>+		goto err_free;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = reset_control_reset(priv-&gt;rstc);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_free;</div><div class='add'>+</div><div class='add'>+	if (devtype-&gt;cantype == XAXI_CANFD) {</div><div class='add'>+		priv-&gt;can.fd.data_bittiming_const =</div><div class='add'>+			&amp;xcan_data_bittiming_const_canfd;</div><div class='add'>+		priv-&gt;can.fd.tdc_const = &amp;xcan_tdc_const_canfd;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (devtype-&gt;cantype == XAXI_CANFD_2_0) {</div><div class='add'>+		priv-&gt;can.fd.data_bittiming_const =</div><div class='add'>+			&amp;xcan_data_bittiming_const_canfd2;</div><div class='add'>+		priv-&gt;can.fd.tdc_const = &amp;xcan_tdc_const_canfd2;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (devtype-&gt;cantype == XAXI_CANFD ||</div><div class='add'>+	    devtype-&gt;cantype == XAXI_CANFD_2_0) {</div><div class='add'>+		priv-&gt;can.ctrlmode_supported |= CAN_CTRLMODE_FD |</div><div class='add'>+						CAN_CTRLMODE_TDC_AUTO;</div><div class='add'>+		priv-&gt;can.fd.do_get_auto_tdcv = xcan_get_auto_tdcv;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	priv-&gt;reg_base = addr;</div><div class='ctx'> 	priv-&gt;tx_max = tx_max;</div><div class='add'>+	priv-&gt;devtype = *devtype;</div><div class='add'>+	spin_lock_init(&amp;priv-&gt;tx_lock);</div><div class='ctx'> </div><div class='ctx'> 	/* Get IRQ for the device */</div><div class='del'>-	ndev-&gt;irq = platform_get_irq(pdev, 0);</div><div class='add'>+	ret = platform_get_irq(pdev, 0);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err_reset;</div><div class='add'>+</div><div class='add'>+	ndev-&gt;irq = ret;</div><div class='add'>+</div><div class='ctx'> 	ndev-&gt;flags |= IFF_ECHO;	/* We support local echo */</div><div class='ctx'> </div><div class='ctx'> 	platform_set_drvdata(pdev, ndev);</div><div class='ctx'> 	SET_NETDEV_DEV(ndev, &amp;pdev-&gt;dev);</div><div class='ctx'> 	ndev-&gt;netdev_ops = &amp;xcan_netdev_ops;</div><div class='add'>+	ndev-&gt;ethtool_ops = &amp;xcan_ethtool_ops;</div><div class='ctx'> </div><div class='ctx'> 	/* Getting the CAN can_clk info */</div><div class='ctx'> 	priv-&gt;can_clk = devm_clk_get(&amp;pdev-&gt;dev, "can_clk");</div><div class='ctx'> 	if (IS_ERR(priv-&gt;can_clk)) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "Device clock not found.\n");</div><div class='del'>-		ret = PTR_ERR(priv-&gt;can_clk);</div><div class='del'>-		goto err_free;</div><div class='del'>-	}</div><div class='del'>-	/* Check for type of CAN device */</div><div class='del'>-	if (of_device_is_compatible(pdev-&gt;dev.of_node,</div><div class='del'>-				    "xlnx,zynq-can-1.0")) {</div><div class='del'>-		priv-&gt;bus_clk = devm_clk_get(&amp;pdev-&gt;dev, "pclk");</div><div class='del'>-		if (IS_ERR(priv-&gt;bus_clk)) {</div><div class='del'>-			dev_err(&amp;pdev-&gt;dev, "bus clock not found\n");</div><div class='del'>-			ret = PTR_ERR(priv-&gt;bus_clk);</div><div class='del'>-			goto err_free;</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		priv-&gt;bus_clk = devm_clk_get(&amp;pdev-&gt;dev, "s_axi_aclk");</div><div class='del'>-		if (IS_ERR(priv-&gt;bus_clk)) {</div><div class='del'>-			dev_err(&amp;pdev-&gt;dev, "bus clock not found\n");</div><div class='del'>-			ret = PTR_ERR(priv-&gt;bus_clk);</div><div class='del'>-			goto err_free;</div><div class='del'>-		}</div><div class='add'>+		ret = dev_err_probe(&amp;pdev-&gt;dev, PTR_ERR(priv-&gt;can_clk),</div><div class='add'>+				    "device clock not found\n");</div><div class='add'>+		goto err_reset;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = clk_prepare_enable(priv-&gt;can_clk);</div><div class='del'>-	if (ret) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "unable to enable device clock\n");</div><div class='del'>-		goto err_free;</div><div class='add'>+	priv-&gt;bus_clk = devm_clk_get(&amp;pdev-&gt;dev, devtype-&gt;bus_clk_name);</div><div class='add'>+	if (IS_ERR(priv-&gt;bus_clk)) {</div><div class='add'>+		ret = dev_err_probe(&amp;pdev-&gt;dev, PTR_ERR(priv-&gt;bus_clk),</div><div class='add'>+				    "bus clock not found\n");</div><div class='add'>+		goto err_reset;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = clk_prepare_enable(priv-&gt;bus_clk);</div><div class='del'>-	if (ret) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "unable to enable bus clock\n");</div><div class='del'>-		goto err_unprepare_disable_dev;</div><div class='add'>+	transceiver = devm_phy_optional_get(&amp;pdev-&gt;dev, NULL);</div><div class='add'>+	if (IS_ERR(transceiver)) {</div><div class='add'>+		ret = PTR_ERR(transceiver);</div><div class='add'>+		dev_err_probe(&amp;pdev-&gt;dev, ret, "failed to get phy\n");</div><div class='add'>+		goto err_reset;</div><div class='ctx'> 	}</div><div class='add'>+	priv-&gt;transceiver = transceiver;</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;write_reg = xcan_write_reg_le;</div><div class='ctx'> 	priv-&gt;read_reg = xcan_read_reg_le;</div><div class='ctx'> </div><div class='add'>+	pm_runtime_enable(&amp;pdev-&gt;dev);</div><div class='add'>+	ret = pm_runtime_get_sync(&amp;pdev-&gt;dev);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		netdev_err(ndev, "%s: pm_runtime_get failed(%d)\n",</div><div class='add'>+			   __func__, ret);</div><div class='add'>+		goto err_disableclks;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (priv-&gt;read_reg(priv, XCAN_SR_OFFSET) != XCAN_SR_CONFIG_MASK) {</div><div class='ctx'> 		priv-&gt;write_reg = xcan_write_reg_be;</div><div class='ctx'> 		priv-&gt;read_reg = xcan_read_reg_be;</div><div class='hunk'>@@ -1136,27 +2044,38 @@ static int xcan_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;can.clock.freq = clk_get_rate(priv-&gt;can_clk);</div><div class='ctx'> </div><div class='del'>-	netif_napi_add(ndev, &amp;priv-&gt;napi, xcan_rx_poll, rx_max);</div><div class='add'>+	netif_napi_add_weight(ndev, &amp;priv-&gt;napi, xcan_rx_poll, rx_max);</div><div class='ctx'> </div><div class='ctx'> 	ret = register_candev(ndev);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "fail to register failed (err=%d)\n", ret);</div><div class='del'>-		goto err_unprepare_disable_busclk;</div><div class='add'>+		goto err_disableclks;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	devm_can_led_init(ndev);</div><div class='del'>-	clk_disable_unprepare(priv-&gt;bus_clk);</div><div class='del'>-	clk_disable_unprepare(priv-&gt;can_clk);</div><div class='del'>-	netdev_dbg(ndev, "reg_base=0x%p irq=%d clock=%d, tx fifo depth:%d\n",</div><div class='del'>-			priv-&gt;reg_base, ndev-&gt;irq, priv-&gt;can.clock.freq,</div><div class='del'>-			priv-&gt;tx_max);</div><div class='add'>+	of_can_transceiver(ndev);</div><div class='add'>+	pm_runtime_put(&amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='add'>+	if (priv-&gt;devtype.flags &amp; XCAN_FLAG_CANFD_2) {</div><div class='add'>+		priv-&gt;write_reg(priv, XCAN_AFR_2_ID_OFFSET, 0x00000000);</div><div class='add'>+		priv-&gt;write_reg(priv, XCAN_AFR_2_MASK_OFFSET, 0x00000000);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev_dbg(ndev, "reg_base=0x%p irq=%d clock=%d, tx buffers: actual %d, using %d\n",</div><div class='add'>+		   priv-&gt;reg_base, ndev-&gt;irq, priv-&gt;can.clock.freq,</div><div class='add'>+		   hw_tx_max, priv-&gt;tx_max);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;ecc_enable) {</div><div class='add'>+		/* Reset FIFO ECC counters */</div><div class='add'>+		priv-&gt;write_reg(priv, XCAN_ECC_CFG_OFFSET, XCAN_ECC_CFG_REECRX_MASK |</div><div class='add'>+			XCAN_ECC_CFG_REECTXOL_MASK | XCAN_ECC_CFG_REECTXTL_MASK);</div><div class='add'>+	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-err_unprepare_disable_busclk:</div><div class='del'>-	clk_disable_unprepare(priv-&gt;bus_clk);</div><div class='del'>-err_unprepare_disable_dev:</div><div class='del'>-	clk_disable_unprepare(priv-&gt;can_clk);</div><div class='add'>+err_disableclks:</div><div class='add'>+	pm_runtime_put(priv-&gt;dev);</div><div class='add'>+	pm_runtime_disable(&amp;pdev-&gt;dev);</div><div class='add'>+err_reset:</div><div class='add'>+	reset_control_assert(priv-&gt;rstc);</div><div class='ctx'> err_free:</div><div class='ctx'> 	free_candev(ndev);</div><div class='ctx'> err:</div><div class='hunk'>@@ -1170,32 +2089,20 @@ err:</div><div class='ctx'>  * This function frees all the resources allocated to the device.</div><div class='ctx'>  * Return: 0 always</div><div class='ctx'>  */</div><div class='del'>-static int xcan_remove(struct platform_device *pdev)</div><div class='add'>+static void xcan_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *ndev = platform_get_drvdata(pdev);</div><div class='ctx'> 	struct xcan_priv *priv = netdev_priv(ndev);</div><div class='ctx'> </div><div class='del'>-	if (set_reset_mode(ndev) &lt; 0)</div><div class='del'>-		netdev_err(ndev, "mode resetting failed!\n");</div><div class='del'>-</div><div class='ctx'> 	unregister_candev(ndev);</div><div class='del'>-	netif_napi_del(&amp;priv-&gt;napi);</div><div class='add'>+	pm_runtime_disable(&amp;pdev-&gt;dev);</div><div class='add'>+	reset_control_assert(priv-&gt;rstc);</div><div class='ctx'> 	free_candev(ndev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Match table for OF platform binding */</div><div class='del'>-static const struct of_device_id xcan_of_match[] = {</div><div class='del'>-	{ .compatible = "xlnx,zynq-can-1.0", },</div><div class='del'>-	{ .compatible = "xlnx,axi-can-1.00.a", },</div><div class='del'>-	{ /* end of list */ },</div><div class='del'>-};</div><div class='del'>-MODULE_DEVICE_TABLE(of, xcan_of_match);</div><div class='del'>-</div><div class='ctx'> static struct platform_driver xcan_driver = {</div><div class='ctx'> 	.probe = xcan_probe,</div><div class='del'>-	.remove	= xcan_remove,</div><div class='add'>+	.remove = xcan_remove,</div><div class='ctx'> 	.driver	= {</div><div class='ctx'> 		.name = DRIVER_NAME,</div><div class='ctx'> 		.pm = &amp;xcan_dev_pm_ops,</div><div class='head'>diff --git a/drivers/net/cris/Makefile b/drivers/net/cris/Makefile<br/>deleted file mode 100644<br/>index b4e8932227b6..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/cris/Makefile?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/cris/Makefile</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1 +0,0 @@</div><div class='del'>-obj-$(CONFIG_ETRAX_ARCH_V10) += eth_v10.o</div><div class='head'>diff --git a/drivers/net/cris/eth_v10.c b/drivers/net/cris/eth_v10.c<br/>deleted file mode 100644<br/>index 64c016a99af8..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/cris/eth_v10.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/cris/eth_v10.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,1746 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * e100net.c: A network driver for the ETRAX 100LX network controller.</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 1998-2002 Axis Communications AB.</div><div class='del'>- *</div><div class='del'>- * The outline of this driver comes from skeleton.c.</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/fcntl.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/ptrace.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;linux/in.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/spinlock.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/bitops.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;linux/if.h&gt;</div><div class='del'>-#include &lt;linux/mii.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/etherdevice.h&gt;</div><div class='del'>-#include &lt;linux/skbuff.h&gt;</div><div class='del'>-#include &lt;linux/ethtool.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;arch/svinto.h&gt;/* DMA and register descriptions */</div><div class='del'>-#include &lt;asm/io.h&gt;         /* CRIS_LED_* I/O functions */</div><div class='del'>-#include &lt;asm/irq.h&gt;</div><div class='del'>-#include &lt;asm/dma.h&gt;</div><div class='del'>-#include &lt;asm/ethernet.h&gt;</div><div class='del'>-#include &lt;asm/cache.h&gt;</div><div class='del'>-#include &lt;arch/io_interface_mux.h&gt;</div><div class='del'>-</div><div class='del'>-//#define ETHDEBUG</div><div class='del'>-#define D(x)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The name of the card. Is used for messages and in the requests for</div><div class='del'>- * io regions, irqs and dma channels</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static const char* cardname = "ETRAX 100LX built-in ethernet controller";</div><div class='del'>-</div><div class='del'>-/* A default ethernet address. Highlevel SW will set the real one later */</div><div class='del'>-</div><div class='del'>-static struct sockaddr default_mac = {</div><div class='del'>-	0,</div><div class='del'>-	{ 0x00, 0x40, 0x8C, 0xCD, 0x00, 0x00 }</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Information that need to be kept for each board. */</div><div class='del'>-struct net_local {</div><div class='del'>-	struct mii_if_info mii_if;</div><div class='del'>-</div><div class='del'>-	/* Tx control lock.  This protects the transmit buffer ring</div><div class='del'>-	 * state along with the "tx full" state of the driver.  This</div><div class='del'>-	 * means all netif_queue flow control actions are protected</div><div class='del'>-	 * by this lock as well.</div><div class='del'>-	 */</div><div class='del'>-	spinlock_t lock;</div><div class='del'>-</div><div class='del'>-	spinlock_t led_lock; /* Protect LED state */</div><div class='del'>-	spinlock_t transceiver_lock; /* Protect transceiver state. */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-typedef struct etrax_eth_descr</div><div class='del'>-{</div><div class='del'>-	etrax_dma_descr descr;</div><div class='del'>-	struct sk_buff* skb;</div><div class='del'>-} etrax_eth_descr;</div><div class='del'>-</div><div class='del'>-/* Some transceivers requires special handling */</div><div class='del'>-struct transceiver_ops</div><div class='del'>-{</div><div class='del'>-	unsigned int oui;</div><div class='del'>-	void (*check_speed)(struct net_device* dev);</div><div class='del'>-	void (*check_duplex)(struct net_device* dev);</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Duplex settings */</div><div class='del'>-enum duplex</div><div class='del'>-{</div><div class='del'>-	half,</div><div class='del'>-	full,</div><div class='del'>-	autoneg</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* Dma descriptors etc. */</div><div class='del'>-</div><div class='del'>-#define MAX_MEDIA_DATA_SIZE 1522</div><div class='del'>-</div><div class='del'>-#define MIN_PACKET_LEN      46</div><div class='del'>-#define ETHER_HEAD_LEN      14</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>-** MDIO constants.</div><div class='del'>-*/</div><div class='del'>-#define MDIO_START                          0x1</div><div class='del'>-#define MDIO_READ                           0x2</div><div class='del'>-#define MDIO_WRITE                          0x1</div><div class='del'>-#define MDIO_PREAMBLE              0xfffffffful</div><div class='del'>-</div><div class='del'>-/* Broadcom specific */</div><div class='del'>-#define MDIO_AUX_CTRL_STATUS_REG           0x18</div><div class='del'>-#define MDIO_BC_FULL_DUPLEX_IND             0x1</div><div class='del'>-#define MDIO_BC_SPEED                       0x2</div><div class='del'>-</div><div class='del'>-/* TDK specific */</div><div class='del'>-#define MDIO_TDK_DIAGNOSTIC_REG              18</div><div class='del'>-#define MDIO_TDK_DIAGNOSTIC_RATE          0x400</div><div class='del'>-#define MDIO_TDK_DIAGNOSTIC_DPLX          0x800</div><div class='del'>-</div><div class='del'>-/*Intel LXT972A specific*/</div><div class='del'>-#define MDIO_INT_STATUS_REG_2			0x0011</div><div class='del'>-#define MDIO_INT_FULL_DUPLEX_IND       (1 &lt;&lt; 9)</div><div class='del'>-#define MDIO_INT_SPEED                (1 &lt;&lt; 14)</div><div class='del'>-</div><div class='del'>-/* Network flash constants */</div><div class='del'>-#define NET_FLASH_TIME                  (HZ/50) /* 20 ms */</div><div class='del'>-#define NET_FLASH_PAUSE                (HZ/100) /* 10 ms */</div><div class='del'>-#define NET_LINK_UP_CHECK_INTERVAL       (2*HZ) /* 2 s   */</div><div class='del'>-#define NET_DUPLEX_CHECK_INTERVAL        (2*HZ) /* 2 s   */</div><div class='del'>-</div><div class='del'>-#define NO_NETWORK_ACTIVITY 0</div><div class='del'>-#define NETWORK_ACTIVITY    1</div><div class='del'>-</div><div class='del'>-#define NBR_OF_RX_DESC     32</div><div class='del'>-#define NBR_OF_TX_DESC     16</div><div class='del'>-</div><div class='del'>-/* Large packets are sent directly to upper layers while small packets are */</div><div class='del'>-/* copied (to reduce memory waste). The following constant decides the breakpoint */</div><div class='del'>-#define RX_COPYBREAK 256</div><div class='del'>-</div><div class='del'>-/* Due to a chip bug we need to flush the cache when descriptors are returned */</div><div class='del'>-/* to the DMA. To decrease performance impact we return descriptors in chunks. */</div><div class='del'>-/* The following constant determines the number of descriptors to return. */</div><div class='del'>-#define RX_QUEUE_THRESHOLD  NBR_OF_RX_DESC/2</div><div class='del'>-</div><div class='del'>-#define GET_BIT(bit,val)   (((val) &gt;&gt; (bit)) &amp; 0x01)</div><div class='del'>-</div><div class='del'>-/* Define some macros to access ETRAX 100 registers */</div><div class='del'>-#define SETF(var, reg, field, val) var = (var &amp; ~IO_MASK_(reg##_, field##_)) | \</div><div class='del'>-					  IO_FIELD_(reg##_, field##_, val)</div><div class='del'>-#define SETS(var, reg, field, val) var = (var &amp; ~IO_MASK_(reg##_, field##_)) | \</div><div class='del'>-					  IO_STATE_(reg##_, field##_, _##val)</div><div class='del'>-</div><div class='del'>-static etrax_eth_descr *myNextRxDesc;  /* Points to the next descriptor to</div><div class='del'>-                                          to be processed */</div><div class='del'>-static etrax_eth_descr *myLastRxDesc;  /* The last processed descriptor */</div><div class='del'>-</div><div class='del'>-static etrax_eth_descr RxDescList[NBR_OF_RX_DESC] __attribute__ ((aligned(32)));</div><div class='del'>-</div><div class='del'>-static etrax_eth_descr* myFirstTxDesc; /* First packet not yet sent */</div><div class='del'>-static etrax_eth_descr* myLastTxDesc;  /* End of send queue */</div><div class='del'>-static etrax_eth_descr* myNextTxDesc;  /* Next descriptor to use */</div><div class='del'>-static etrax_eth_descr TxDescList[NBR_OF_TX_DESC] __attribute__ ((aligned(32)));</div><div class='del'>-</div><div class='del'>-static unsigned int network_rec_config_shadow = 0;</div><div class='del'>-</div><div class='del'>-static unsigned int network_tr_ctrl_shadow = 0;</div><div class='del'>-</div><div class='del'>-/* Network speed indication. */</div><div class='del'>-static DEFINE_TIMER(speed_timer, NULL, 0, 0);</div><div class='del'>-static DEFINE_TIMER(clear_led_timer, NULL, 0, 0);</div><div class='del'>-static int current_speed; /* Speed read from transceiver */</div><div class='del'>-static int current_speed_selection; /* Speed selected by user */</div><div class='del'>-static unsigned long led_next_time;</div><div class='del'>-static int led_active;</div><div class='del'>-static int rx_queue_len;</div><div class='del'>-</div><div class='del'>-/* Duplex */</div><div class='del'>-static DEFINE_TIMER(duplex_timer, NULL, 0, 0);</div><div class='del'>-static int full_duplex;</div><div class='del'>-static enum duplex current_duplex;</div><div class='del'>-</div><div class='del'>-/* Index to functions, as function prototypes. */</div><div class='del'>-</div><div class='del'>-static int etrax_ethernet_init(void);</div><div class='del'>-</div><div class='del'>-static int e100_open(struct net_device *dev);</div><div class='del'>-static int e100_set_mac_address(struct net_device *dev, void *addr);</div><div class='del'>-static int e100_send_packet(struct sk_buff *skb, struct net_device *dev);</div><div class='del'>-static irqreturn_t e100rxtx_interrupt(int irq, void *dev_id);</div><div class='del'>-static irqreturn_t e100nw_interrupt(int irq, void *dev_id);</div><div class='del'>-static void e100_rx(struct net_device *dev);</div><div class='del'>-static int e100_close(struct net_device *dev);</div><div class='del'>-static int e100_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);</div><div class='del'>-static int e100_set_config(struct net_device* dev, struct ifmap* map);</div><div class='del'>-static void e100_tx_timeout(struct net_device *dev);</div><div class='del'>-static struct net_device_stats *e100_get_stats(struct net_device *dev);</div><div class='del'>-static void set_multicast_list(struct net_device *dev);</div><div class='del'>-static void e100_hardware_send_packet(struct net_local* np, char *buf, int length);</div><div class='del'>-static void update_rx_stats(struct net_device_stats *);</div><div class='del'>-static void update_tx_stats(struct net_device_stats *);</div><div class='del'>-static int e100_probe_transceiver(struct net_device* dev);</div><div class='del'>-</div><div class='del'>-static void e100_check_speed(unsigned long priv);</div><div class='del'>-static void e100_set_speed(struct net_device* dev, unsigned long speed);</div><div class='del'>-static void e100_check_duplex(unsigned long priv);</div><div class='del'>-static void e100_set_duplex(struct net_device* dev, enum duplex);</div><div class='del'>-static void e100_negotiate(struct net_device* dev);</div><div class='del'>-</div><div class='del'>-static int e100_get_mdio_reg(struct net_device *dev, int phy_id, int location);</div><div class='del'>-static void e100_set_mdio_reg(struct net_device *dev, int phy_id, int location, int value);</div><div class='del'>-</div><div class='del'>-static void e100_send_mdio_cmd(unsigned short cmd, int write_cmd);</div><div class='del'>-static void e100_send_mdio_bit(unsigned char bit);</div><div class='del'>-static unsigned char e100_receive_mdio_bit(void);</div><div class='del'>-static void e100_reset_transceiver(struct net_device* net);</div><div class='del'>-</div><div class='del'>-static void e100_clear_network_leds(unsigned long dummy);</div><div class='del'>-static void e100_set_network_leds(int active);</div><div class='del'>-</div><div class='del'>-static const struct ethtool_ops e100_ethtool_ops;</div><div class='del'>-#if defined(CONFIG_ETRAX_NO_PHY)</div><div class='del'>-static void dummy_check_speed(struct net_device* dev);</div><div class='del'>-static void dummy_check_duplex(struct net_device* dev);</div><div class='del'>-#else</div><div class='del'>-static void broadcom_check_speed(struct net_device* dev);</div><div class='del'>-static void broadcom_check_duplex(struct net_device* dev);</div><div class='del'>-static void tdk_check_speed(struct net_device* dev);</div><div class='del'>-static void tdk_check_duplex(struct net_device* dev);</div><div class='del'>-static void intel_check_speed(struct net_device* dev);</div><div class='del'>-static void intel_check_duplex(struct net_device* dev);</div><div class='del'>-static void generic_check_speed(struct net_device* dev);</div><div class='del'>-static void generic_check_duplex(struct net_device* dev);</div><div class='del'>-#endif</div><div class='del'>-#ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='del'>-static void e100_netpoll(struct net_device* dev);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static int autoneg_normal = 1;</div><div class='del'>-</div><div class='del'>-struct transceiver_ops transceivers[] =</div><div class='del'>-{</div><div class='del'>-#if defined(CONFIG_ETRAX_NO_PHY)</div><div class='del'>-	{0x0000, dummy_check_speed, dummy_check_duplex}        /* Dummy */</div><div class='del'>-#else</div><div class='del'>-	{0x1018, broadcom_check_speed, broadcom_check_duplex},  /* Broadcom */</div><div class='del'>-	{0xC039, tdk_check_speed, tdk_check_duplex},            /* TDK 2120 */</div><div class='del'>-	{0x039C, tdk_check_speed, tdk_check_duplex},            /* TDK 2120C */</div><div class='del'>-        {0x04de, intel_check_speed, intel_check_duplex},     	/* Intel LXT972A*/</div><div class='del'>-	{0x0000, generic_check_speed, generic_check_duplex}     /* Generic, must be last */</div><div class='del'>-#endif</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct transceiver_ops* transceiver = &amp;transceivers[0];</div><div class='del'>-</div><div class='del'>-static const struct net_device_ops e100_netdev_ops = {</div><div class='del'>-	.ndo_open		= e100_open,</div><div class='del'>-	.ndo_stop		= e100_close,</div><div class='del'>-	.ndo_start_xmit		= e100_send_packet,</div><div class='del'>-	.ndo_tx_timeout		= e100_tx_timeout,</div><div class='del'>-	.ndo_get_stats		= e100_get_stats,</div><div class='del'>-	.ndo_set_rx_mode	= set_multicast_list,</div><div class='del'>-	.ndo_do_ioctl		= e100_ioctl,</div><div class='del'>-	.ndo_set_mac_address	= e100_set_mac_address,</div><div class='del'>-	.ndo_validate_addr	= eth_validate_addr,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='del'>-	.ndo_set_config		= e100_set_config,</div><div class='del'>-#ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='del'>-	.ndo_poll_controller	= e100_netpoll,</div><div class='del'>-#endif</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define tx_done(dev) (*R_DMA_CH0_CMD == 0)</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Check for a network adaptor of this type, and return '0' if one exists.</div><div class='del'>- * If dev-&gt;base_addr == 0, probe all likely locations.</div><div class='del'>- * If dev-&gt;base_addr == 1, always return failure.</div><div class='del'>- * If dev-&gt;base_addr == 2, allocate space for the device and return success</div><div class='del'>- * (detachable devices only).</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int __init</div><div class='del'>-etrax_ethernet_init(void)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev;</div><div class='del'>-        struct net_local* np;</div><div class='del'>-	int i, err;</div><div class='del'>-</div><div class='del'>-	printk(KERN_INFO</div><div class='del'>-	       "ETRAX 100LX 10/100MBit ethernet v2.0 (c) 1998-2007 Axis Communications AB\n");</div><div class='del'>-</div><div class='del'>-	if (cris_request_io_interface(if_eth, cardname)) {</div><div class='del'>-		printk(KERN_CRIT "etrax_ethernet_init failed to get IO interface\n");</div><div class='del'>-		return -EBUSY;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev = alloc_etherdev(sizeof(struct net_local));</div><div class='del'>-	if (!dev)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	np = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	/* we do our own locking */</div><div class='del'>-	dev-&gt;features |= NETIF_F_LLTX;</div><div class='del'>-</div><div class='del'>-	dev-&gt;base_addr = (unsigned int)R_NETWORK_SA_0; /* just to have something to show */</div><div class='del'>-</div><div class='del'>-	/* now setup our etrax specific stuff */</div><div class='del'>-</div><div class='del'>-	dev-&gt;irq = NETWORK_DMA_RX_IRQ_NBR; /* we really use DMATX as well... */</div><div class='del'>-	dev-&gt;dma = NETWORK_RX_DMA_NBR;</div><div class='del'>-</div><div class='del'>-	/* fill in our handlers so the network layer can talk to us in the future */</div><div class='del'>-</div><div class='del'>-	dev-&gt;ethtool_ops	= &amp;e100_ethtool_ops;</div><div class='del'>-	dev-&gt;netdev_ops		= &amp;e100_netdev_ops;</div><div class='del'>-</div><div class='del'>-	spin_lock_init(&amp;np-&gt;lock);</div><div class='del'>-	spin_lock_init(&amp;np-&gt;led_lock);</div><div class='del'>-	spin_lock_init(&amp;np-&gt;transceiver_lock);</div><div class='del'>-</div><div class='del'>-	/* Initialise the list of Etrax DMA-descriptors */</div><div class='del'>-</div><div class='del'>-	/* Initialise receive descriptors */</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; NBR_OF_RX_DESC; i++) {</div><div class='del'>-		/* Allocate two extra cachelines to make sure that buffer used</div><div class='del'>-		 * by DMA does not share cacheline with any other data (to</div><div class='del'>-		 * avoid cache bug)</div><div class='del'>-		 */</div><div class='del'>-		RxDescList[i].skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE + 2 * L1_CACHE_BYTES);</div><div class='del'>-		if (!RxDescList[i].skb)</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-		RxDescList[i].descr.ctrl   = 0;</div><div class='del'>-		RxDescList[i].descr.sw_len = MAX_MEDIA_DATA_SIZE;</div><div class='del'>-		RxDescList[i].descr.next   = virt_to_phys(&amp;RxDescList[i + 1]);</div><div class='del'>-		RxDescList[i].descr.buf    = L1_CACHE_ALIGN(virt_to_phys(RxDescList[i].skb-&gt;data));</div><div class='del'>-		RxDescList[i].descr.status = 0;</div><div class='del'>-		RxDescList[i].descr.hw_len = 0;</div><div class='del'>-		prepare_rx_descriptor(&amp;RxDescList[i].descr);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	RxDescList[NBR_OF_RX_DESC - 1].descr.ctrl   = d_eol;</div><div class='del'>-	RxDescList[NBR_OF_RX_DESC - 1].descr.next   = virt_to_phys(&amp;RxDescList[0]);</div><div class='del'>-	rx_queue_len = 0;</div><div class='del'>-</div><div class='del'>-	/* Initialize transmit descriptors */</div><div class='del'>-	for (i = 0; i &lt; NBR_OF_TX_DESC; i++) {</div><div class='del'>-		TxDescList[i].descr.ctrl   = 0;</div><div class='del'>-		TxDescList[i].descr.sw_len = 0;</div><div class='del'>-		TxDescList[i].descr.next   = virt_to_phys(&amp;TxDescList[i + 1].descr);</div><div class='del'>-		TxDescList[i].descr.buf    = 0;</div><div class='del'>-		TxDescList[i].descr.status = 0;</div><div class='del'>-		TxDescList[i].descr.hw_len = 0;</div><div class='del'>-		TxDescList[i].skb = 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	TxDescList[NBR_OF_TX_DESC - 1].descr.ctrl   = d_eol;</div><div class='del'>-	TxDescList[NBR_OF_TX_DESC - 1].descr.next   = virt_to_phys(&amp;TxDescList[0].descr);</div><div class='del'>-</div><div class='del'>-	/* Initialise initial pointers */</div><div class='del'>-</div><div class='del'>-	myNextRxDesc  = &amp;RxDescList[0];</div><div class='del'>-	myLastRxDesc  = &amp;RxDescList[NBR_OF_RX_DESC - 1];</div><div class='del'>-	myFirstTxDesc = &amp;TxDescList[0];</div><div class='del'>-	myNextTxDesc  = &amp;TxDescList[0];</div><div class='del'>-	myLastTxDesc  = &amp;TxDescList[NBR_OF_TX_DESC - 1];</div><div class='del'>-</div><div class='del'>-	/* Register device */</div><div class='del'>-	err = register_netdev(dev);</div><div class='del'>-	if (err) {</div><div class='del'>-		free_netdev(dev);</div><div class='del'>-		return err;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* set the default MAC address */</div><div class='del'>-</div><div class='del'>-	e100_set_mac_address(dev, &amp;default_mac);</div><div class='del'>-</div><div class='del'>-	/* Initialize speed indicator stuff. */</div><div class='del'>-</div><div class='del'>-	current_speed = 10;</div><div class='del'>-	current_speed_selection = 0; /* Auto */</div><div class='del'>-	speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL;</div><div class='del'>-	speed_timer.data = (unsigned long)dev;</div><div class='del'>-	speed_timer.function = e100_check_speed;</div><div class='del'>-</div><div class='del'>-	clear_led_timer.function = e100_clear_network_leds;</div><div class='del'>-	clear_led_timer.data = (unsigned long)dev;</div><div class='del'>-</div><div class='del'>-	full_duplex = 0;</div><div class='del'>-	current_duplex = autoneg;</div><div class='del'>-	duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL;</div><div class='del'>-        duplex_timer.data = (unsigned long)dev;</div><div class='del'>-	duplex_timer.function = e100_check_duplex;</div><div class='del'>-</div><div class='del'>-        /* Initialize mii interface */</div><div class='del'>-	np-&gt;mii_if.phy_id_mask = 0x1f;</div><div class='del'>-	np-&gt;mii_if.reg_num_mask = 0x1f;</div><div class='del'>-	np-&gt;mii_if.dev = dev;</div><div class='del'>-	np-&gt;mii_if.mdio_read = e100_get_mdio_reg;</div><div class='del'>-	np-&gt;mii_if.mdio_write = e100_set_mdio_reg;</div><div class='del'>-</div><div class='del'>-	/* Initialize group address registers to make sure that no */</div><div class='del'>-	/* unwanted addresses are matched */</div><div class='del'>-	*R_NETWORK_GA_0 = 0x00000000;</div><div class='del'>-	*R_NETWORK_GA_1 = 0x00000000;</div><div class='del'>-</div><div class='del'>-	/* Initialize next time the led can flash */</div><div class='del'>-	led_next_time = jiffies;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* set MAC address of the interface. called from the core after a</div><div class='del'>- * SIOCSIFADDR ioctl, and from the bootup above.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-e100_set_mac_address(struct net_device *dev, void *p)</div><div class='del'>-{</div><div class='del'>-	struct net_local *np = netdev_priv(dev);</div><div class='del'>-	struct sockaddr *addr = p;</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;np-&gt;lock); /* preemption protection */</div><div class='del'>-</div><div class='del'>-	/* remember it */</div><div class='del'>-</div><div class='del'>-	memcpy(dev-&gt;dev_addr, addr-&gt;sa_data, dev-&gt;addr_len);</div><div class='del'>-</div><div class='del'>-	/* Write it to the hardware.</div><div class='del'>-	 * Note the way the address is wrapped:</div><div class='del'>-	 * *R_NETWORK_SA_0 = a0_0 | (a0_1 &lt;&lt; 8) | (a0_2 &lt;&lt; 16) | (a0_3 &lt;&lt; 24);</div><div class='del'>-	 * *R_NETWORK_SA_1 = a0_4 | (a0_5 &lt;&lt; 8);</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	*R_NETWORK_SA_0 = dev-&gt;dev_addr[0] | (dev-&gt;dev_addr[1] &lt;&lt; 8) |</div><div class='del'>-		(dev-&gt;dev_addr[2] &lt;&lt; 16) | (dev-&gt;dev_addr[3] &lt;&lt; 24);</div><div class='del'>-	*R_NETWORK_SA_1 = dev-&gt;dev_addr[4] | (dev-&gt;dev_addr[5] &lt;&lt; 8);</div><div class='del'>-	*R_NETWORK_SA_2 = 0;</div><div class='del'>-</div><div class='del'>-	/* show it in the log as well */</div><div class='del'>-</div><div class='del'>-	printk(KERN_INFO "%s: changed MAC to %pM\n", dev-&gt;name, dev-&gt;dev_addr);</div><div class='del'>-</div><div class='del'>-	spin_unlock(&amp;np-&gt;lock);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Open/initialize the board. This is called (in the current kernel)</div><div class='del'>- * sometime after booting when the 'ifconfig' program is run.</div><div class='del'>- *</div><div class='del'>- * This routine should set everything up anew at each open, even</div><div class='del'>- * registers that "should" only need to be set once at boot, so that</div><div class='del'>- * there is non-reboot way to recover if something goes wrong.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-e100_open(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	/* enable the MDIO output pin */</div><div class='del'>-</div><div class='del'>-	*R_NETWORK_MGM_CTRL = IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable);</div><div class='del'>-</div><div class='del'>-	*R_IRQ_MASK0_CLR =</div><div class='del'>-		IO_STATE(R_IRQ_MASK0_CLR, overrun, clr) |</div><div class='del'>-		IO_STATE(R_IRQ_MASK0_CLR, underrun, clr) |</div><div class='del'>-		IO_STATE(R_IRQ_MASK0_CLR, excessive_col, clr);</div><div class='del'>-</div><div class='del'>-	/* clear dma0 and 1 eop and descr irq masks */</div><div class='del'>-	*R_IRQ_MASK2_CLR =</div><div class='del'>-		IO_STATE(R_IRQ_MASK2_CLR, dma0_descr, clr) |</div><div class='del'>-		IO_STATE(R_IRQ_MASK2_CLR, dma0_eop, clr) |</div><div class='del'>-		IO_STATE(R_IRQ_MASK2_CLR, dma1_descr, clr) |</div><div class='del'>-		IO_STATE(R_IRQ_MASK2_CLR, dma1_eop, clr);</div><div class='del'>-</div><div class='del'>-	/* Reset and wait for the DMA channels */</div><div class='del'>-</div><div class='del'>-	RESET_DMA(NETWORK_TX_DMA_NBR);</div><div class='del'>-	RESET_DMA(NETWORK_RX_DMA_NBR);</div><div class='del'>-	WAIT_DMA(NETWORK_TX_DMA_NBR);</div><div class='del'>-	WAIT_DMA(NETWORK_RX_DMA_NBR);</div><div class='del'>-</div><div class='del'>-	/* Initialise the etrax network controller */</div><div class='del'>-</div><div class='del'>-	/* allocate the irq corresponding to the receiving DMA */</div><div class='del'>-</div><div class='del'>-	if (request_irq(NETWORK_DMA_RX_IRQ_NBR, e100rxtx_interrupt, 0, cardname,</div><div class='del'>-			(void *)dev)) {</div><div class='del'>-		goto grace_exit0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* allocate the irq corresponding to the transmitting DMA */</div><div class='del'>-</div><div class='del'>-	if (request_irq(NETWORK_DMA_TX_IRQ_NBR, e100rxtx_interrupt, 0,</div><div class='del'>-			cardname, (void *)dev)) {</div><div class='del'>-		goto grace_exit1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* allocate the irq corresponding to the network errors etc */</div><div class='del'>-</div><div class='del'>-	if (request_irq(NETWORK_STATUS_IRQ_NBR, e100nw_interrupt, 0,</div><div class='del'>-			cardname, (void *)dev)) {</div><div class='del'>-		goto grace_exit2;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Always allocate the DMA channels after the IRQ,</div><div class='del'>-	 * and clean up on failure.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	if (cris_request_dma(NETWORK_TX_DMA_NBR,</div><div class='del'>-	                     cardname,</div><div class='del'>-	                     DMA_VERBOSE_ON_ERROR,</div><div class='del'>-	                     dma_eth)) {</div><div class='del'>-		goto grace_exit3;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-	if (cris_request_dma(NETWORK_RX_DMA_NBR,</div><div class='del'>-	                     cardname,</div><div class='del'>-	                     DMA_VERBOSE_ON_ERROR,</div><div class='del'>-	                     dma_eth)) {</div><div class='del'>-		goto grace_exit4;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-	/* give the HW an idea of what MAC address we want */</div><div class='del'>-</div><div class='del'>-	*R_NETWORK_SA_0 = dev-&gt;dev_addr[0] | (dev-&gt;dev_addr[1] &lt;&lt; 8) |</div><div class='del'>-		(dev-&gt;dev_addr[2] &lt;&lt; 16) | (dev-&gt;dev_addr[3] &lt;&lt; 24);</div><div class='del'>-	*R_NETWORK_SA_1 = dev-&gt;dev_addr[4] | (dev-&gt;dev_addr[5] &lt;&lt; 8);</div><div class='del'>-	*R_NETWORK_SA_2 = 0;</div><div class='del'>-</div><div class='del'>-#if 0</div><div class='del'>-	/* use promiscuous mode for testing */</div><div class='del'>-	*R_NETWORK_GA_0 = 0xffffffff;</div><div class='del'>-	*R_NETWORK_GA_1 = 0xffffffff;</div><div class='del'>-</div><div class='del'>-	*R_NETWORK_REC_CONFIG = 0xd; /* broadcast rec, individ. rec, ma0 enabled */</div><div class='del'>-#else</div><div class='del'>-	SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, max_size, size1522);</div><div class='del'>-	SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, broadcast, receive);</div><div class='del'>-	SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, ma0, enable);</div><div class='del'>-	SETF(network_rec_config_shadow, R_NETWORK_REC_CONFIG, duplex, full_duplex);</div><div class='del'>-	*R_NETWORK_REC_CONFIG = network_rec_config_shadow;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	*R_NETWORK_GEN_CONFIG =</div><div class='del'>-		IO_STATE(R_NETWORK_GEN_CONFIG, phy,    mii_clk) |</div><div class='del'>-		IO_STATE(R_NETWORK_GEN_CONFIG, enable, on);</div><div class='del'>-</div><div class='del'>-	SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr);</div><div class='del'>-	SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, delay, none);</div><div class='del'>-	SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, cancel, dont);</div><div class='del'>-	SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, cd, enable);</div><div class='del'>-	SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, retry, enable);</div><div class='del'>-	SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, pad, enable);</div><div class='del'>-	SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, crc, enable);</div><div class='del'>-	*R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;</div><div class='del'>-</div><div class='del'>-	local_irq_save(flags);</div><div class='del'>-</div><div class='del'>-	/* enable the irq's for ethernet DMA */</div><div class='del'>-</div><div class='del'>-	*R_IRQ_MASK2_SET =</div><div class='del'>-		IO_STATE(R_IRQ_MASK2_SET, dma0_eop, set) |</div><div class='del'>-		IO_STATE(R_IRQ_MASK2_SET, dma1_eop, set);</div><div class='del'>-</div><div class='del'>-	*R_IRQ_MASK0_SET =</div><div class='del'>-		IO_STATE(R_IRQ_MASK0_SET, overrun,       set) |</div><div class='del'>-		IO_STATE(R_IRQ_MASK0_SET, underrun,      set) |</div><div class='del'>-		IO_STATE(R_IRQ_MASK0_SET, excessive_col, set);</div><div class='del'>-</div><div class='del'>-	/* make sure the irqs are cleared */</div><div class='del'>-</div><div class='del'>-	*R_DMA_CH0_CLR_INTR = IO_STATE(R_DMA_CH0_CLR_INTR, clr_eop, do);</div><div class='del'>-	*R_DMA_CH1_CLR_INTR = IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do);</div><div class='del'>-</div><div class='del'>-	/* make sure the rec and transmit error counters are cleared */</div><div class='del'>-</div><div class='del'>-	(void)*R_REC_COUNTERS;  /* dummy read */</div><div class='del'>-	(void)*R_TR_COUNTERS;   /* dummy read */</div><div class='del'>-</div><div class='del'>-	/* start the receiving DMA channel so we can receive packets from now on */</div><div class='del'>-</div><div class='del'>-	*R_DMA_CH1_FIRST = virt_to_phys(myNextRxDesc);</div><div class='del'>-	*R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, start);</div><div class='del'>-</div><div class='del'>-	/* Set up transmit DMA channel so it can be restarted later */</div><div class='del'>-</div><div class='del'>-	*R_DMA_CH0_FIRST = 0;</div><div class='del'>-	*R_DMA_CH0_DESCR = virt_to_phys(myLastTxDesc);</div><div class='del'>-	netif_start_queue(dev);</div><div class='del'>-</div><div class='del'>-	local_irq_restore(flags);</div><div class='del'>-</div><div class='del'>-	/* Probe for transceiver */</div><div class='del'>-	if (e100_probe_transceiver(dev))</div><div class='del'>-		goto grace_exit5;</div><div class='del'>-</div><div class='del'>-	/* Start duplex/speed timers */</div><div class='del'>-	add_timer(&amp;speed_timer);</div><div class='del'>-	add_timer(&amp;duplex_timer);</div><div class='del'>-</div><div class='del'>-	/* We are now ready to accept transmit requeusts from</div><div class='del'>-	 * the queueing layer of the networking.</div><div class='del'>-	 */</div><div class='del'>-	netif_carrier_on(dev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-grace_exit5:</div><div class='del'>-	cris_free_dma(NETWORK_RX_DMA_NBR, cardname);</div><div class='del'>-grace_exit4:</div><div class='del'>-	cris_free_dma(NETWORK_TX_DMA_NBR, cardname);</div><div class='del'>-grace_exit3:</div><div class='del'>-	free_irq(NETWORK_STATUS_IRQ_NBR, (void *)dev);</div><div class='del'>-grace_exit2:</div><div class='del'>-	free_irq(NETWORK_DMA_TX_IRQ_NBR, (void *)dev);</div><div class='del'>-grace_exit1:</div><div class='del'>-	free_irq(NETWORK_DMA_RX_IRQ_NBR, (void *)dev);</div><div class='del'>-grace_exit0:</div><div class='del'>-	return -EAGAIN;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_ETRAX_NO_PHY)</div><div class='del'>-static void</div><div class='del'>-dummy_check_speed(struct net_device* dev)</div><div class='del'>-{</div><div class='del'>-	current_speed = 100;</div><div class='del'>-}</div><div class='del'>-#else</div><div class='del'>-static void</div><div class='del'>-generic_check_speed(struct net_device* dev)</div><div class='del'>-{</div><div class='del'>-	unsigned long data;</div><div class='del'>-	struct net_local *np = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	data = e100_get_mdio_reg(dev, np-&gt;mii_if.phy_id, MII_ADVERTISE);</div><div class='del'>-	if ((data &amp; ADVERTISE_100FULL) ||</div><div class='del'>-	    (data &amp; ADVERTISE_100HALF))</div><div class='del'>-		current_speed = 100;</div><div class='del'>-	else</div><div class='del'>-		current_speed = 10;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-tdk_check_speed(struct net_device* dev)</div><div class='del'>-{</div><div class='del'>-	unsigned long data;</div><div class='del'>-	struct net_local *np = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	data = e100_get_mdio_reg(dev, np-&gt;mii_if.phy_id,</div><div class='del'>-				 MDIO_TDK_DIAGNOSTIC_REG);</div><div class='del'>-	current_speed = (data &amp; MDIO_TDK_DIAGNOSTIC_RATE ? 100 : 10);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-broadcom_check_speed(struct net_device* dev)</div><div class='del'>-{</div><div class='del'>-	unsigned long data;</div><div class='del'>-	struct net_local *np = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	data = e100_get_mdio_reg(dev, np-&gt;mii_if.phy_id,</div><div class='del'>-				 MDIO_AUX_CTRL_STATUS_REG);</div><div class='del'>-	current_speed = (data &amp; MDIO_BC_SPEED ? 100 : 10);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-intel_check_speed(struct net_device* dev)</div><div class='del'>-{</div><div class='del'>-	unsigned long data;</div><div class='del'>-	struct net_local *np = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	data = e100_get_mdio_reg(dev, np-&gt;mii_if.phy_id,</div><div class='del'>-				 MDIO_INT_STATUS_REG_2);</div><div class='del'>-	current_speed = (data &amp; MDIO_INT_SPEED ? 100 : 10);</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-static void</div><div class='del'>-e100_check_speed(unsigned long priv)</div><div class='del'>-{</div><div class='del'>-	struct net_device* dev = (struct net_device*)priv;</div><div class='del'>-	struct net_local *np = netdev_priv(dev);</div><div class='del'>-	static int led_initiated = 0;</div><div class='del'>-	unsigned long data;</div><div class='del'>-	int old_speed = current_speed;</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;np-&gt;transceiver_lock);</div><div class='del'>-</div><div class='del'>-	data = e100_get_mdio_reg(dev, np-&gt;mii_if.phy_id, MII_BMSR);</div><div class='del'>-	if (!(data &amp; BMSR_LSTATUS)) {</div><div class='del'>-		current_speed = 0;</div><div class='del'>-	} else {</div><div class='del'>-		transceiver-&gt;check_speed(dev);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;np-&gt;led_lock);</div><div class='del'>-	if ((old_speed != current_speed) || !led_initiated) {</div><div class='del'>-		led_initiated = 1;</div><div class='del'>-		e100_set_network_leds(NO_NETWORK_ACTIVITY);</div><div class='del'>-		if (current_speed)</div><div class='del'>-			netif_carrier_on(dev);</div><div class='del'>-		else</div><div class='del'>-			netif_carrier_off(dev);</div><div class='del'>-	}</div><div class='del'>-	spin_unlock(&amp;np-&gt;led_lock);</div><div class='del'>-</div><div class='del'>-	/* Reinitialize the timer. */</div><div class='del'>-	speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL;</div><div class='del'>-	add_timer(&amp;speed_timer);</div><div class='del'>-</div><div class='del'>-	spin_unlock(&amp;np-&gt;transceiver_lock);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-e100_negotiate(struct net_device* dev)</div><div class='del'>-{</div><div class='del'>-	struct net_local *np = netdev_priv(dev);</div><div class='del'>-	unsigned short data = e100_get_mdio_reg(dev, np-&gt;mii_if.phy_id,</div><div class='del'>-						MII_ADVERTISE);</div><div class='del'>-</div><div class='del'>-	/* Discard old speed and duplex settings */</div><div class='del'>-	data &amp;= ~(ADVERTISE_100HALF | ADVERTISE_100FULL |</div><div class='del'>-	          ADVERTISE_10HALF | ADVERTISE_10FULL);</div><div class='del'>-</div><div class='del'>-	switch (current_speed_selection) {</div><div class='del'>-		case 10:</div><div class='del'>-			if (current_duplex == full)</div><div class='del'>-				data |= ADVERTISE_10FULL;</div><div class='del'>-			else if (current_duplex == half)</div><div class='del'>-				data |= ADVERTISE_10HALF;</div><div class='del'>-			else</div><div class='del'>-				data |= ADVERTISE_10HALF | ADVERTISE_10FULL;</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		case 100:</div><div class='del'>-			 if (current_duplex == full)</div><div class='del'>-				data |= ADVERTISE_100FULL;</div><div class='del'>-			else if (current_duplex == half)</div><div class='del'>-				data |= ADVERTISE_100HALF;</div><div class='del'>-			else</div><div class='del'>-				data |= ADVERTISE_100HALF | ADVERTISE_100FULL;</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		case 0: /* Auto */</div><div class='del'>-			 if (current_duplex == full)</div><div class='del'>-				data |= ADVERTISE_100FULL | ADVERTISE_10FULL;</div><div class='del'>-			else if (current_duplex == half)</div><div class='del'>-				data |= ADVERTISE_100HALF | ADVERTISE_10HALF;</div><div class='del'>-			else</div><div class='del'>-				data |= ADVERTISE_10HALF | ADVERTISE_10FULL |</div><div class='del'>-				  ADVERTISE_100HALF | ADVERTISE_100FULL;</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		default: /* assume autoneg speed and duplex */</div><div class='del'>-			data |= ADVERTISE_10HALF | ADVERTISE_10FULL |</div><div class='del'>-				  ADVERTISE_100HALF | ADVERTISE_100FULL;</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	e100_set_mdio_reg(dev, np-&gt;mii_if.phy_id, MII_ADVERTISE, data);</div><div class='del'>-</div><div class='del'>-	data = e100_get_mdio_reg(dev, np-&gt;mii_if.phy_id, MII_BMCR);</div><div class='del'>-	if (autoneg_normal) {</div><div class='del'>-		/* Renegotiate with link partner */</div><div class='del'>-		data |= BMCR_ANENABLE | BMCR_ANRESTART;</div><div class='del'>-	} else {</div><div class='del'>-		/* Don't negotiate speed or duplex */</div><div class='del'>-		data &amp;= ~(BMCR_ANENABLE | BMCR_ANRESTART);</div><div class='del'>-</div><div class='del'>-		/* Set speed and duplex static */</div><div class='del'>-		if (current_speed_selection == 10)</div><div class='del'>-			data &amp;= ~BMCR_SPEED100;</div><div class='del'>-		else</div><div class='del'>-			data |= BMCR_SPEED100;</div><div class='del'>-</div><div class='del'>-		if (current_duplex != full)</div><div class='del'>-			data &amp;= ~BMCR_FULLDPLX;</div><div class='del'>-		else</div><div class='del'>-			data |= BMCR_FULLDPLX;</div><div class='del'>-	}</div><div class='del'>-	e100_set_mdio_reg(dev, np-&gt;mii_if.phy_id, MII_BMCR, data);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-e100_set_speed(struct net_device* dev, unsigned long speed)</div><div class='del'>-{</div><div class='del'>-	struct net_local *np = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;np-&gt;transceiver_lock);</div><div class='del'>-	if (speed != current_speed_selection) {</div><div class='del'>-		current_speed_selection = speed;</div><div class='del'>-		e100_negotiate(dev);</div><div class='del'>-	}</div><div class='del'>-	spin_unlock(&amp;np-&gt;transceiver_lock);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-e100_check_duplex(unsigned long priv)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = (struct net_device *)priv;</div><div class='del'>-	struct net_local *np = netdev_priv(dev);</div><div class='del'>-	int old_duplex;</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;np-&gt;transceiver_lock);</div><div class='del'>-	old_duplex = full_duplex;</div><div class='del'>-	transceiver-&gt;check_duplex(dev);</div><div class='del'>-	if (old_duplex != full_duplex) {</div><div class='del'>-		/* Duplex changed */</div><div class='del'>-		SETF(network_rec_config_shadow, R_NETWORK_REC_CONFIG, duplex, full_duplex);</div><div class='del'>-		*R_NETWORK_REC_CONFIG = network_rec_config_shadow;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Reinitialize the timer. */</div><div class='del'>-	duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL;</div><div class='del'>-	add_timer(&amp;duplex_timer);</div><div class='del'>-	np-&gt;mii_if.full_duplex = full_duplex;</div><div class='del'>-	spin_unlock(&amp;np-&gt;transceiver_lock);</div><div class='del'>-}</div><div class='del'>-#if defined(CONFIG_ETRAX_NO_PHY)</div><div class='del'>-static void</div><div class='del'>-dummy_check_duplex(struct net_device* dev)</div><div class='del'>-{</div><div class='del'>-	full_duplex = 1;</div><div class='del'>-}</div><div class='del'>-#else</div><div class='del'>-static void</div><div class='del'>-generic_check_duplex(struct net_device* dev)</div><div class='del'>-{</div><div class='del'>-	unsigned long data;</div><div class='del'>-	struct net_local *np = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	data = e100_get_mdio_reg(dev, np-&gt;mii_if.phy_id, MII_ADVERTISE);</div><div class='del'>-	if ((data &amp; ADVERTISE_10FULL) ||</div><div class='del'>-	    (data &amp; ADVERTISE_100FULL))</div><div class='del'>-		full_duplex = 1;</div><div class='del'>-	else</div><div class='del'>-		full_duplex = 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-tdk_check_duplex(struct net_device* dev)</div><div class='del'>-{</div><div class='del'>-	unsigned long data;</div><div class='del'>-	struct net_local *np = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	data = e100_get_mdio_reg(dev, np-&gt;mii_if.phy_id,</div><div class='del'>-				 MDIO_TDK_DIAGNOSTIC_REG);</div><div class='del'>-	full_duplex = (data &amp; MDIO_TDK_DIAGNOSTIC_DPLX) ? 1 : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-broadcom_check_duplex(struct net_device* dev)</div><div class='del'>-{</div><div class='del'>-	unsigned long data;</div><div class='del'>-	struct net_local *np = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	data = e100_get_mdio_reg(dev, np-&gt;mii_if.phy_id,</div><div class='del'>-				 MDIO_AUX_CTRL_STATUS_REG);</div><div class='del'>-	full_duplex = (data &amp; MDIO_BC_FULL_DUPLEX_IND) ? 1 : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-intel_check_duplex(struct net_device* dev)</div><div class='del'>-{</div><div class='del'>-	unsigned long data;</div><div class='del'>-	struct net_local *np = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	data = e100_get_mdio_reg(dev, np-&gt;mii_if.phy_id,</div><div class='del'>-				 MDIO_INT_STATUS_REG_2);</div><div class='del'>-	full_duplex = (data &amp; MDIO_INT_FULL_DUPLEX_IND) ? 1 : 0;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-static void</div><div class='del'>-e100_set_duplex(struct net_device* dev, enum duplex new_duplex)</div><div class='del'>-{</div><div class='del'>-	struct net_local *np = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;np-&gt;transceiver_lock);</div><div class='del'>-	if (new_duplex != current_duplex) {</div><div class='del'>-		current_duplex = new_duplex;</div><div class='del'>-		e100_negotiate(dev);</div><div class='del'>-	}</div><div class='del'>-	spin_unlock(&amp;np-&gt;transceiver_lock);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-e100_probe_transceiver(struct net_device* dev)</div><div class='del'>-{</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-#if !defined(CONFIG_ETRAX_NO_PHY)</div><div class='del'>-	unsigned int phyid_high;</div><div class='del'>-	unsigned int phyid_low;</div><div class='del'>-	unsigned int oui;</div><div class='del'>-	struct transceiver_ops* ops = NULL;</div><div class='del'>-	struct net_local *np = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;np-&gt;transceiver_lock);</div><div class='del'>-</div><div class='del'>-	/* Probe MDIO physical address */</div><div class='del'>-	for (np-&gt;mii_if.phy_id = 0; np-&gt;mii_if.phy_id &lt;= 31;</div><div class='del'>-	     np-&gt;mii_if.phy_id++) {</div><div class='del'>-		if (e100_get_mdio_reg(dev,</div><div class='del'>-				      np-&gt;mii_if.phy_id, MII_BMSR) != 0xffff)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-	if (np-&gt;mii_if.phy_id == 32) {</div><div class='del'>-		ret = -ENODEV;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Get manufacturer */</div><div class='del'>-	phyid_high = e100_get_mdio_reg(dev, np-&gt;mii_if.phy_id, MII_PHYSID1);</div><div class='del'>-	phyid_low = e100_get_mdio_reg(dev, np-&gt;mii_if.phy_id, MII_PHYSID2);</div><div class='del'>-	oui = (phyid_high &lt;&lt; 6) | (phyid_low &gt;&gt; 10);</div><div class='del'>-</div><div class='del'>-	for (ops = &amp;transceivers[0]; ops-&gt;oui; ops++) {</div><div class='del'>-		if (ops-&gt;oui == oui)</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-	transceiver = ops;</div><div class='del'>-out:</div><div class='del'>-	spin_unlock(&amp;np-&gt;transceiver_lock);</div><div class='del'>-#endif</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-e100_get_mdio_reg(struct net_device *dev, int phy_id, int location)</div><div class='del'>-{</div><div class='del'>-	unsigned short cmd;    /* Data to be sent on MDIO port */</div><div class='del'>-	int data;   /* Data read from MDIO */</div><div class='del'>-	int bitCounter;</div><div class='del'>-</div><div class='del'>-	/* Start of frame, OP Code, Physical Address, Register Address */</div><div class='del'>-	cmd = (MDIO_START &lt;&lt; 14) | (MDIO_READ &lt;&lt; 12) | (phy_id &lt;&lt; 7) |</div><div class='del'>-		(location &lt;&lt; 2);</div><div class='del'>-</div><div class='del'>-	e100_send_mdio_cmd(cmd, 0);</div><div class='del'>-</div><div class='del'>-	data = 0;</div><div class='del'>-</div><div class='del'>-	/* Data... */</div><div class='del'>-	for (bitCounter=15; bitCounter&gt;=0 ; bitCounter--) {</div><div class='del'>-		data |= (e100_receive_mdio_bit() &lt;&lt; bitCounter);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return data;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-e100_set_mdio_reg(struct net_device *dev, int phy_id, int location, int value)</div><div class='del'>-{</div><div class='del'>-	int bitCounter;</div><div class='del'>-	unsigned short cmd;</div><div class='del'>-</div><div class='del'>-	cmd = (MDIO_START &lt;&lt; 14) | (MDIO_WRITE &lt;&lt; 12) | (phy_id &lt;&lt; 7) |</div><div class='del'>-	      (location &lt;&lt; 2);</div><div class='del'>-</div><div class='del'>-	e100_send_mdio_cmd(cmd, 1);</div><div class='del'>-</div><div class='del'>-	/* Data... */</div><div class='del'>-	for (bitCounter=15; bitCounter&gt;=0 ; bitCounter--) {</div><div class='del'>-		e100_send_mdio_bit(GET_BIT(bitCounter, value));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-e100_send_mdio_cmd(unsigned short cmd, int write_cmd)</div><div class='del'>-{</div><div class='del'>-	int bitCounter;</div><div class='del'>-	unsigned char data = 0x2;</div><div class='del'>-</div><div class='del'>-	/* Preamble */</div><div class='del'>-	for (bitCounter = 31; bitCounter&gt;= 0; bitCounter--)</div><div class='del'>-		e100_send_mdio_bit(GET_BIT(bitCounter, MDIO_PREAMBLE));</div><div class='del'>-</div><div class='del'>-	for (bitCounter = 15; bitCounter &gt;= 2; bitCounter--)</div><div class='del'>-		e100_send_mdio_bit(GET_BIT(bitCounter, cmd));</div><div class='del'>-</div><div class='del'>-	/* Turnaround */</div><div class='del'>-	for (bitCounter = 1; bitCounter &gt;= 0 ; bitCounter--)</div><div class='del'>-		if (write_cmd)</div><div class='del'>-			e100_send_mdio_bit(GET_BIT(bitCounter, data));</div><div class='del'>-		else</div><div class='del'>-			e100_receive_mdio_bit();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-e100_send_mdio_bit(unsigned char bit)</div><div class='del'>-{</div><div class='del'>-	*R_NETWORK_MGM_CTRL =</div><div class='del'>-		IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable) |</div><div class='del'>-		IO_FIELD(R_NETWORK_MGM_CTRL, mdio, bit);</div><div class='del'>-	udelay(1);</div><div class='del'>-	*R_NETWORK_MGM_CTRL =</div><div class='del'>-		IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable) |</div><div class='del'>-		IO_MASK(R_NETWORK_MGM_CTRL, mdck) |</div><div class='del'>-		IO_FIELD(R_NETWORK_MGM_CTRL, mdio, bit);</div><div class='del'>-	udelay(1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned char</div><div class='del'>-e100_receive_mdio_bit(void)</div><div class='del'>-{</div><div class='del'>-	unsigned char bit;</div><div class='del'>-	*R_NETWORK_MGM_CTRL = 0;</div><div class='del'>-	bit = IO_EXTRACT(R_NETWORK_STAT, mdio, *R_NETWORK_STAT);</div><div class='del'>-	udelay(1);</div><div class='del'>-	*R_NETWORK_MGM_CTRL = IO_MASK(R_NETWORK_MGM_CTRL, mdck);</div><div class='del'>-	udelay(1);</div><div class='del'>-	return bit;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-e100_reset_transceiver(struct net_device* dev)</div><div class='del'>-{</div><div class='del'>-	struct net_local *np = netdev_priv(dev);</div><div class='del'>-	unsigned short cmd;</div><div class='del'>-	unsigned short data;</div><div class='del'>-	int bitCounter;</div><div class='del'>-</div><div class='del'>-	data = e100_get_mdio_reg(dev, np-&gt;mii_if.phy_id, MII_BMCR);</div><div class='del'>-</div><div class='del'>-	cmd = (MDIO_START &lt;&lt; 14) | (MDIO_WRITE &lt;&lt; 12) | (np-&gt;mii_if.phy_id &lt;&lt; 7) | (MII_BMCR &lt;&lt; 2);</div><div class='del'>-</div><div class='del'>-	e100_send_mdio_cmd(cmd, 1);</div><div class='del'>-</div><div class='del'>-	data |= 0x8000;</div><div class='del'>-</div><div class='del'>-	for (bitCounter = 15; bitCounter &gt;= 0 ; bitCounter--) {</div><div class='del'>-		e100_send_mdio_bit(GET_BIT(bitCounter, data));</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Called by upper layers if they decide it took too long to complete</div><div class='del'>- * sending a packet - we need to reset and stuff.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-e100_tx_timeout(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct net_local *np = netdev_priv(dev);</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;np-&gt;lock, flags);</div><div class='del'>-</div><div class='del'>-	printk(KERN_WARNING "%s: transmit timed out, %s?\n", dev-&gt;name,</div><div class='del'>-	       tx_done(dev) ? "IRQ problem" : "network cable problem");</div><div class='del'>-</div><div class='del'>-	/* remember we got an error */</div><div class='del'>-</div><div class='del'>-	dev-&gt;stats.tx_errors++;</div><div class='del'>-</div><div class='del'>-	/* reset the TX DMA in case it has hung on something */</div><div class='del'>-</div><div class='del'>-	RESET_DMA(NETWORK_TX_DMA_NBR);</div><div class='del'>-	WAIT_DMA(NETWORK_TX_DMA_NBR);</div><div class='del'>-</div><div class='del'>-	/* Reset the transceiver. */</div><div class='del'>-</div><div class='del'>-	e100_reset_transceiver(dev);</div><div class='del'>-</div><div class='del'>-	/* and get rid of the packets that never got an interrupt */</div><div class='del'>-	while (myFirstTxDesc != myNextTxDesc) {</div><div class='del'>-		dev_kfree_skb(myFirstTxDesc-&gt;skb);</div><div class='del'>-		myFirstTxDesc-&gt;skb = 0;</div><div class='del'>-		myFirstTxDesc = phys_to_virt(myFirstTxDesc-&gt;descr.next);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Set up transmit DMA channel so it can be restarted later */</div><div class='del'>-	*R_DMA_CH0_FIRST = 0;</div><div class='del'>-	*R_DMA_CH0_DESCR = virt_to_phys(myLastTxDesc);</div><div class='del'>-</div><div class='del'>-	/* tell the upper layers we're ok again */</div><div class='del'>-</div><div class='del'>-	netif_wake_queue(dev);</div><div class='del'>-	spin_unlock_irqrestore(&amp;np-&gt;lock, flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/* This will only be invoked if the driver is _not_ in XOFF state.</div><div class='del'>- * What this means is that we need not check it, and that this</div><div class='del'>- * invariant will hold if we make sure that the netif_*_queue()</div><div class='del'>- * calls are done at the proper times.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-e100_send_packet(struct sk_buff *skb, struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct net_local *np = netdev_priv(dev);</div><div class='del'>-	unsigned char *buf = skb-&gt;data;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-#ifdef ETHDEBUG</div><div class='del'>-	printk("send packet len %d\n", length);</div><div class='del'>-#endif</div><div class='del'>-	spin_lock_irqsave(&amp;np-&gt;lock, flags);  /* protect from tx_interrupt and ourself */</div><div class='del'>-</div><div class='del'>-	myNextTxDesc-&gt;skb = skb;</div><div class='del'>-</div><div class='del'>-	dev-&gt;trans_start = jiffies; /* NETIF_F_LLTX driver :( */</div><div class='del'>-</div><div class='del'>-	e100_hardware_send_packet(np, buf, skb-&gt;len);</div><div class='del'>-</div><div class='del'>-	myNextTxDesc = phys_to_virt(myNextTxDesc-&gt;descr.next);</div><div class='del'>-</div><div class='del'>-	/* Stop queue if full */</div><div class='del'>-	if (myNextTxDesc == myFirstTxDesc) {</div><div class='del'>-		netif_stop_queue(dev);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(&amp;np-&gt;lock, flags);</div><div class='del'>-</div><div class='del'>-	return NETDEV_TX_OK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The typical workload of the driver:</div><div class='del'>- *   Handle the network interface interrupts.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static irqreturn_t</div><div class='del'>-e100rxtx_interrupt(int irq, void *dev_id)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = (struct net_device *)dev_id;</div><div class='del'>-	unsigned long irqbits;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Note that both rx and tx interrupts are blocked at this point,</div><div class='del'>-	 * regardless of which got us here.</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	irqbits = *R_IRQ_MASK2_RD;</div><div class='del'>-</div><div class='del'>-	/* Handle received packets */</div><div class='del'>-	if (irqbits &amp; IO_STATE(R_IRQ_MASK2_RD, dma1_eop, active)) {</div><div class='del'>-		/* acknowledge the eop interrupt */</div><div class='del'>-</div><div class='del'>-		*R_DMA_CH1_CLR_INTR = IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do);</div><div class='del'>-</div><div class='del'>-		/* check if one or more complete packets were indeed received */</div><div class='del'>-</div><div class='del'>-		while ((*R_DMA_CH1_FIRST != virt_to_phys(myNextRxDesc)) &amp;&amp;</div><div class='del'>-		       (myNextRxDesc != myLastRxDesc)) {</div><div class='del'>-			/* Take out the buffer and give it to the OS, then</div><div class='del'>-			 * allocate a new buffer to put a packet in.</div><div class='del'>-			 */</div><div class='del'>-			e100_rx(dev);</div><div class='del'>-			dev-&gt;stats.rx_packets++;</div><div class='del'>-			/* restart/continue on the channel, for safety */</div><div class='del'>-			*R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, restart);</div><div class='del'>-			/* clear dma channel 1 eop/descr irq bits */</div><div class='del'>-			*R_DMA_CH1_CLR_INTR =</div><div class='del'>-				IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do) |</div><div class='del'>-				IO_STATE(R_DMA_CH1_CLR_INTR, clr_descr, do);</div><div class='del'>-</div><div class='del'>-			/* now, we might have gotten another packet</div><div class='del'>-			   so we have to loop back and check if so */</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Report any packets that have been sent */</div><div class='del'>-	while (virt_to_phys(myFirstTxDesc) != *R_DMA_CH0_FIRST &amp;&amp;</div><div class='del'>-	       (netif_queue_stopped(dev) || myFirstTxDesc != myNextTxDesc)) {</div><div class='del'>-		dev-&gt;stats.tx_bytes += myFirstTxDesc-&gt;skb-&gt;len;</div><div class='del'>-		dev-&gt;stats.tx_packets++;</div><div class='del'>-</div><div class='del'>-		/* dma is ready with the transmission of the data in tx_skb, so now</div><div class='del'>-		   we can release the skb memory */</div><div class='del'>-		dev_kfree_skb_irq(myFirstTxDesc-&gt;skb);</div><div class='del'>-		myFirstTxDesc-&gt;skb = 0;</div><div class='del'>-		myFirstTxDesc = phys_to_virt(myFirstTxDesc-&gt;descr.next);</div><div class='del'>-                /* Wake up queue. */</div><div class='del'>-		netif_wake_queue(dev);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (irqbits &amp; IO_STATE(R_IRQ_MASK2_RD, dma0_eop, active)) {</div><div class='del'>-		/* acknowledge the eop interrupt. */</div><div class='del'>-		*R_DMA_CH0_CLR_INTR = IO_STATE(R_DMA_CH0_CLR_INTR, clr_eop, do);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static irqreturn_t</div><div class='del'>-e100nw_interrupt(int irq, void *dev_id)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = (struct net_device *)dev_id;</div><div class='del'>-	unsigned long irqbits = *R_IRQ_MASK0_RD;</div><div class='del'>-</div><div class='del'>-	/* check for underrun irq */</div><div class='del'>-	if (irqbits &amp; IO_STATE(R_IRQ_MASK0_RD, underrun, active)) {</div><div class='del'>-		SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr);</div><div class='del'>-		*R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;</div><div class='del'>-		SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, nop);</div><div class='del'>-		dev-&gt;stats.tx_errors++;</div><div class='del'>-		D(printk("ethernet receiver underrun!\n"));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* check for overrun irq */</div><div class='del'>-	if (irqbits &amp; IO_STATE(R_IRQ_MASK0_RD, overrun, active)) {</div><div class='del'>-		update_rx_stats(&amp;dev-&gt;stats); /* this will ack the irq */</div><div class='del'>-		D(printk("ethernet receiver overrun!\n"));</div><div class='del'>-	}</div><div class='del'>-	/* check for excessive collision irq */</div><div class='del'>-	if (irqbits &amp; IO_STATE(R_IRQ_MASK0_RD, excessive_col, active)) {</div><div class='del'>-		SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr);</div><div class='del'>-		*R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;</div><div class='del'>-		SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, nop);</div><div class='del'>-		dev-&gt;stats.tx_errors++;</div><div class='del'>-		D(printk("ethernet excessive collisions!\n"));</div><div class='del'>-	}</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* We have a good packet(s), get it/them out of the buffers. */</div><div class='del'>-static void</div><div class='del'>-e100_rx(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	int length = 0;</div><div class='del'>-	struct net_local *np = netdev_priv(dev);</div><div class='del'>-	unsigned char *skb_data_ptr;</div><div class='del'>-#ifdef ETHDEBUG</div><div class='del'>-	int i;</div><div class='del'>-#endif</div><div class='del'>-	etrax_eth_descr *prevRxDesc;  /* The descriptor right before myNextRxDesc */</div><div class='del'>-	spin_lock(&amp;np-&gt;led_lock);</div><div class='del'>-	if (!led_active &amp;&amp; time_after(jiffies, led_next_time)) {</div><div class='del'>-		/* light the network leds depending on the current speed. */</div><div class='del'>-		e100_set_network_leds(NETWORK_ACTIVITY);</div><div class='del'>-</div><div class='del'>-		/* Set the earliest time we may clear the LED */</div><div class='del'>-		led_next_time = jiffies + NET_FLASH_TIME;</div><div class='del'>-		led_active = 1;</div><div class='del'>-		mod_timer(&amp;clear_led_timer, jiffies + HZ/10);</div><div class='del'>-	}</div><div class='del'>-	spin_unlock(&amp;np-&gt;led_lock);</div><div class='del'>-</div><div class='del'>-	length = myNextRxDesc-&gt;descr.hw_len - 4;</div><div class='del'>-	dev-&gt;stats.rx_bytes += length;</div><div class='del'>-</div><div class='del'>-#ifdef ETHDEBUG</div><div class='del'>-	printk("Got a packet of length %d:\n", length);</div><div class='del'>-	/* dump the first bytes in the packet */</div><div class='del'>-	skb_data_ptr = (unsigned char *)phys_to_virt(myNextRxDesc-&gt;descr.buf);</div><div class='del'>-	for (i = 0; i &lt; 8; i++) {</div><div class='del'>-		printk("%d: %.2x %.2x %.2x %.2x %.2x %.2x %.2x %.2x\n", i * 8,</div><div class='del'>-		       skb_data_ptr[0],skb_data_ptr[1],skb_data_ptr[2],skb_data_ptr[3],</div><div class='del'>-		       skb_data_ptr[4],skb_data_ptr[5],skb_data_ptr[6],skb_data_ptr[7]);</div><div class='del'>-		skb_data_ptr += 8;</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	if (length &lt; RX_COPYBREAK) {</div><div class='del'>-		/* Small packet, copy data */</div><div class='del'>-		skb = dev_alloc_skb(length - ETHER_HEAD_LEN);</div><div class='del'>-		if (!skb) {</div><div class='del'>-			dev-&gt;stats.rx_errors++;</div><div class='del'>-			printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", dev-&gt;name);</div><div class='del'>-			goto update_nextrxdesc;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		skb_put(skb, length - ETHER_HEAD_LEN);        /* allocate room for the packet body */</div><div class='del'>-		skb_data_ptr = skb_push(skb, ETHER_HEAD_LEN); /* allocate room for the header */</div><div class='del'>-</div><div class='del'>-#ifdef ETHDEBUG</div><div class='del'>-		printk("head = 0x%x, data = 0x%x, tail = 0x%x, end = 0x%x\n",</div><div class='del'>-		       skb-&gt;head, skb-&gt;data, skb_tail_pointer(skb),</div><div class='del'>-		       skb_end_pointer(skb));</div><div class='del'>-		printk("copying packet to 0x%x.\n", skb_data_ptr);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-		memcpy(skb_data_ptr, phys_to_virt(myNextRxDesc-&gt;descr.buf), length);</div><div class='del'>-	}</div><div class='del'>-	else {</div><div class='del'>-		/* Large packet, send directly to upper layers and allocate new</div><div class='del'>-		 * memory (aligned to cache line boundary to avoid bug).</div><div class='del'>-		 * Before sending the skb to upper layers we must make sure</div><div class='del'>-		 * that skb-&gt;data points to the aligned start of the packet.</div><div class='del'>-		 */</div><div class='del'>-		int align;</div><div class='del'>-		struct sk_buff *new_skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE + 2 * L1_CACHE_BYTES);</div><div class='del'>-		if (!new_skb) {</div><div class='del'>-			dev-&gt;stats.rx_errors++;</div><div class='del'>-			printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", dev-&gt;name);</div><div class='del'>-			goto update_nextrxdesc;</div><div class='del'>-		}</div><div class='del'>-		skb = myNextRxDesc-&gt;skb;</div><div class='del'>-		align = (int)phys_to_virt(myNextRxDesc-&gt;descr.buf) - (int)skb-&gt;data;</div><div class='del'>-		skb_put(skb, length + align);</div><div class='del'>-		skb_pull(skb, align); /* Remove alignment bytes */</div><div class='del'>-		myNextRxDesc-&gt;skb = new_skb;</div><div class='del'>-		myNextRxDesc-&gt;descr.buf = L1_CACHE_ALIGN(virt_to_phys(myNextRxDesc-&gt;skb-&gt;data));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	skb-&gt;protocol = eth_type_trans(skb, dev);</div><div class='del'>-</div><div class='del'>-	/* Send the packet to the upper layers */</div><div class='del'>-	netif_rx(skb);</div><div class='del'>-</div><div class='del'>-  update_nextrxdesc:</div><div class='del'>-	/* Prepare for next packet */</div><div class='del'>-	myNextRxDesc-&gt;descr.status = 0;</div><div class='del'>-	prevRxDesc = myNextRxDesc;</div><div class='del'>-	myNextRxDesc = phys_to_virt(myNextRxDesc-&gt;descr.next);</div><div class='del'>-</div><div class='del'>-	rx_queue_len++;</div><div class='del'>-</div><div class='del'>-	/* Check if descriptors should be returned */</div><div class='del'>-	if (rx_queue_len == RX_QUEUE_THRESHOLD) {</div><div class='del'>-		flush_etrax_cache();</div><div class='del'>-		prevRxDesc-&gt;descr.ctrl |= d_eol;</div><div class='del'>-		myLastRxDesc-&gt;descr.ctrl &amp;= ~d_eol;</div><div class='del'>-		myLastRxDesc = prevRxDesc;</div><div class='del'>-		rx_queue_len = 0;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* The inverse routine to net_open(). */</div><div class='del'>-static int</div><div class='del'>-e100_close(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	printk(KERN_INFO "Closing %s.\n", dev-&gt;name);</div><div class='del'>-</div><div class='del'>-	netif_stop_queue(dev);</div><div class='del'>-</div><div class='del'>-	*R_IRQ_MASK0_CLR =</div><div class='del'>-		IO_STATE(R_IRQ_MASK0_CLR, overrun, clr) |</div><div class='del'>-		IO_STATE(R_IRQ_MASK0_CLR, underrun, clr) |</div><div class='del'>-		IO_STATE(R_IRQ_MASK0_CLR, excessive_col, clr);</div><div class='del'>-</div><div class='del'>-	*R_IRQ_MASK2_CLR =</div><div class='del'>-		IO_STATE(R_IRQ_MASK2_CLR, dma0_descr, clr) |</div><div class='del'>-		IO_STATE(R_IRQ_MASK2_CLR, dma0_eop, clr) |</div><div class='del'>-		IO_STATE(R_IRQ_MASK2_CLR, dma1_descr, clr) |</div><div class='del'>-		IO_STATE(R_IRQ_MASK2_CLR, dma1_eop, clr);</div><div class='del'>-</div><div class='del'>-	/* Stop the receiver and the transmitter */</div><div class='del'>-</div><div class='del'>-	RESET_DMA(NETWORK_TX_DMA_NBR);</div><div class='del'>-	RESET_DMA(NETWORK_RX_DMA_NBR);</div><div class='del'>-</div><div class='del'>-	/* Flush the Tx and disable Rx here. */</div><div class='del'>-</div><div class='del'>-	free_irq(NETWORK_DMA_RX_IRQ_NBR, (void *)dev);</div><div class='del'>-	free_irq(NETWORK_DMA_TX_IRQ_NBR, (void *)dev);</div><div class='del'>-	free_irq(NETWORK_STATUS_IRQ_NBR, (void *)dev);</div><div class='del'>-</div><div class='del'>-	cris_free_dma(NETWORK_TX_DMA_NBR, cardname);</div><div class='del'>-	cris_free_dma(NETWORK_RX_DMA_NBR, cardname);</div><div class='del'>-</div><div class='del'>-	/* Update the statistics here. */</div><div class='del'>-</div><div class='del'>-	update_rx_stats(&amp;dev-&gt;stats);</div><div class='del'>-	update_tx_stats(&amp;dev-&gt;stats);</div><div class='del'>-</div><div class='del'>-	/* Stop speed/duplex timers */</div><div class='del'>-	del_timer(&amp;speed_timer);</div><div class='del'>-	del_timer(&amp;duplex_timer);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-e100_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)</div><div class='del'>-{</div><div class='del'>-	struct mii_ioctl_data *data = if_mii(ifr);</div><div class='del'>-	struct net_local *np = netdev_priv(dev);</div><div class='del'>-	int rc = 0;</div><div class='del'>-        int old_autoneg;</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;np-&gt;lock); /* Preempt protection */</div><div class='del'>-	switch (cmd) {</div><div class='del'>-		/* The ioctls below should be considered obsolete but are */</div><div class='del'>-		/* still present for compatibility with old scripts/apps  */</div><div class='del'>-		case SET_ETH_SPEED_10:                  /* 10 Mbps */</div><div class='del'>-			e100_set_speed(dev, 10);</div><div class='del'>-			break;</div><div class='del'>-		case SET_ETH_SPEED_100:                /* 100 Mbps */</div><div class='del'>-			e100_set_speed(dev, 100);</div><div class='del'>-			break;</div><div class='del'>-		case SET_ETH_SPEED_AUTO:        /* Auto-negotiate speed */</div><div class='del'>-			e100_set_speed(dev, 0);</div><div class='del'>-			break;</div><div class='del'>-		case SET_ETH_DUPLEX_HALF:       /* Half duplex */</div><div class='del'>-			e100_set_duplex(dev, half);</div><div class='del'>-			break;</div><div class='del'>-		case SET_ETH_DUPLEX_FULL:       /* Full duplex */</div><div class='del'>-			e100_set_duplex(dev, full);</div><div class='del'>-			break;</div><div class='del'>-		case SET_ETH_DUPLEX_AUTO:       /* Auto-negotiate duplex */</div><div class='del'>-			e100_set_duplex(dev, autoneg);</div><div class='del'>-			break;</div><div class='del'>-	        case SET_ETH_AUTONEG:</div><div class='del'>-			old_autoneg = autoneg_normal;</div><div class='del'>-		        autoneg_normal = *(int*)data;</div><div class='del'>-			if (autoneg_normal != old_autoneg)</div><div class='del'>-				e100_negotiate(dev);</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			rc = generic_mii_ioctl(&amp;np-&gt;mii_if, if_mii(ifr),</div><div class='del'>-						cmd, NULL);</div><div class='del'>-			break;</div><div class='del'>-	}</div><div class='del'>-	spin_unlock(&amp;np-&gt;lock);</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int e100_get_settings(struct net_device *dev,</div><div class='del'>-			     struct ethtool_cmd *cmd)</div><div class='del'>-{</div><div class='del'>-	struct net_local *np = netdev_priv(dev);</div><div class='del'>-	int err;</div><div class='del'>-</div><div class='del'>-	spin_lock_irq(&amp;np-&gt;lock);</div><div class='del'>-	err = mii_ethtool_gset(&amp;np-&gt;mii_if, cmd);</div><div class='del'>-	spin_unlock_irq(&amp;np-&gt;lock);</div><div class='del'>-</div><div class='del'>-	/* The PHY may support 1000baseT, but the Etrax100 does not.  */</div><div class='del'>-	cmd-&gt;supported &amp;= ~(SUPPORTED_1000baseT_Half</div><div class='del'>-			    | SUPPORTED_1000baseT_Full);</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int e100_set_settings(struct net_device *dev,</div><div class='del'>-			     struct ethtool_cmd *ecmd)</div><div class='del'>-{</div><div class='del'>-	if (ecmd-&gt;autoneg == AUTONEG_ENABLE) {</div><div class='del'>-		e100_set_duplex(dev, autoneg);</div><div class='del'>-		e100_set_speed(dev, 0);</div><div class='del'>-	} else {</div><div class='del'>-		e100_set_duplex(dev, ecmd-&gt;duplex == DUPLEX_HALF ? half : full);</div><div class='del'>-		e100_set_speed(dev, ecmd-&gt;speed == SPEED_10 ? 10: 100);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void e100_get_drvinfo(struct net_device *dev,</div><div class='del'>-			     struct ethtool_drvinfo *info)</div><div class='del'>-{</div><div class='del'>-	strlcpy(info-&gt;driver, "ETRAX 100LX", sizeof(info-&gt;driver));</div><div class='del'>-	strlcpy(info-&gt;version, "$Revision: 1.31 $", sizeof(info-&gt;version));</div><div class='del'>-	strlcpy(info-&gt;fw_version, "N/A", sizeof(info-&gt;fw_version));</div><div class='del'>-	strlcpy(info-&gt;bus_info, "N/A", sizeof(info-&gt;bus_info));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int e100_nway_reset(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	if (current_duplex == autoneg &amp;&amp; current_speed_selection == 0)</div><div class='del'>-		e100_negotiate(dev);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct ethtool_ops e100_ethtool_ops = {</div><div class='del'>-	.get_settings	= e100_get_settings,</div><div class='del'>-	.set_settings	= e100_set_settings,</div><div class='del'>-	.get_drvinfo	= e100_get_drvinfo,</div><div class='del'>-	.nway_reset	= e100_nway_reset,</div><div class='del'>-	.get_link	= ethtool_op_get_link,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-e100_set_config(struct net_device *dev, struct ifmap *map)</div><div class='del'>-{</div><div class='del'>-	struct net_local *np = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;np-&gt;lock); /* Preempt protection */</div><div class='del'>-</div><div class='del'>-	switch(map-&gt;port) {</div><div class='del'>-		case IF_PORT_UNKNOWN:</div><div class='del'>-			/* Use autoneg */</div><div class='del'>-			e100_set_speed(dev, 0);</div><div class='del'>-			e100_set_duplex(dev, autoneg);</div><div class='del'>-			break;</div><div class='del'>-		case IF_PORT_10BASET:</div><div class='del'>-			e100_set_speed(dev, 10);</div><div class='del'>-			e100_set_duplex(dev, autoneg);</div><div class='del'>-			break;</div><div class='del'>-		case IF_PORT_100BASET:</div><div class='del'>-		case IF_PORT_100BASETX:</div><div class='del'>-			e100_set_speed(dev, 100);</div><div class='del'>-			e100_set_duplex(dev, autoneg);</div><div class='del'>-			break;</div><div class='del'>-		case IF_PORT_100BASEFX:</div><div class='del'>-		case IF_PORT_10BASE2:</div><div class='del'>-		case IF_PORT_AUI:</div><div class='del'>-			spin_unlock(&amp;np-&gt;lock);</div><div class='del'>-			return -EOPNOTSUPP;</div><div class='del'>-		default:</div><div class='del'>-			printk(KERN_ERR "%s: Invalid media selected", dev-&gt;name);</div><div class='del'>-			spin_unlock(&amp;np-&gt;lock);</div><div class='del'>-			return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-	spin_unlock(&amp;np-&gt;lock);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-update_rx_stats(struct net_device_stats *es)</div><div class='del'>-{</div><div class='del'>-	unsigned long r = *R_REC_COUNTERS;</div><div class='del'>-	/* update stats relevant to reception errors */</div><div class='del'>-	es-&gt;rx_fifo_errors += IO_EXTRACT(R_REC_COUNTERS, congestion, r);</div><div class='del'>-	es-&gt;rx_crc_errors += IO_EXTRACT(R_REC_COUNTERS, crc_error, r);</div><div class='del'>-	es-&gt;rx_frame_errors += IO_EXTRACT(R_REC_COUNTERS, alignment_error, r);</div><div class='del'>-	es-&gt;rx_length_errors += IO_EXTRACT(R_REC_COUNTERS, oversize, r);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-update_tx_stats(struct net_device_stats *es)</div><div class='del'>-{</div><div class='del'>-	unsigned long r = *R_TR_COUNTERS;</div><div class='del'>-	/* update stats relevant to transmission errors */</div><div class='del'>-	es-&gt;collisions +=</div><div class='del'>-		IO_EXTRACT(R_TR_COUNTERS, single_col, r) +</div><div class='del'>-		IO_EXTRACT(R_TR_COUNTERS, multiple_col, r);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Get the current statistics.</div><div class='del'>- * This may be called with the card open or closed.</div><div class='del'>- */</div><div class='del'>-static struct net_device_stats *</div><div class='del'>-e100_get_stats(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct net_local *lp = netdev_priv(dev);</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;lp-&gt;lock, flags);</div><div class='del'>-</div><div class='del'>-	update_rx_stats(&amp;dev-&gt;stats);</div><div class='del'>-	update_tx_stats(&amp;dev-&gt;stats);</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);</div><div class='del'>-	return &amp;dev-&gt;stats;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Set or clear the multicast filter for this adaptor.</div><div class='del'>- * num_addrs == -1	Promiscuous mode, receive all packets</div><div class='del'>- * num_addrs == 0	Normal mode, clear multicast list</div><div class='del'>- * num_addrs &gt; 0	Multicast mode, receive normal and MC packets,</div><div class='del'>- *			and do best-effort filtering.</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-set_multicast_list(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct net_local *lp = netdev_priv(dev);</div><div class='del'>-	int num_addr = netdev_mc_count(dev);</div><div class='del'>-	unsigned long int lo_bits;</div><div class='del'>-	unsigned long int hi_bits;</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;lp-&gt;lock);</div><div class='del'>-	if (dev-&gt;flags &amp; IFF_PROMISC) {</div><div class='del'>-		/* promiscuous mode */</div><div class='del'>-		lo_bits = 0xfffffffful;</div><div class='del'>-		hi_bits = 0xfffffffful;</div><div class='del'>-</div><div class='del'>-		/* Enable individual receive */</div><div class='del'>-		SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, receive);</div><div class='del'>-		*R_NETWORK_REC_CONFIG = network_rec_config_shadow;</div><div class='del'>-	} else if (dev-&gt;flags &amp; IFF_ALLMULTI) {</div><div class='del'>-		/* enable all multicasts */</div><div class='del'>-		lo_bits = 0xfffffffful;</div><div class='del'>-		hi_bits = 0xfffffffful;</div><div class='del'>-</div><div class='del'>-		/* Disable individual receive */</div><div class='del'>-		SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard);</div><div class='del'>-		*R_NETWORK_REC_CONFIG =  network_rec_config_shadow;</div><div class='del'>-	} else if (num_addr == 0) {</div><div class='del'>-		/* Normal, clear the mc list */</div><div class='del'>-		lo_bits = 0x00000000ul;</div><div class='del'>-		hi_bits = 0x00000000ul;</div><div class='del'>-</div><div class='del'>-		/* Disable individual receive */</div><div class='del'>-		SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard);</div><div class='del'>-		*R_NETWORK_REC_CONFIG =  network_rec_config_shadow;</div><div class='del'>-	} else {</div><div class='del'>-		/* MC mode, receive normal and MC packets */</div><div class='del'>-		char hash_ix;</div><div class='del'>-		struct netdev_hw_addr *ha;</div><div class='del'>-		char *baddr;</div><div class='del'>-</div><div class='del'>-		lo_bits = 0x00000000ul;</div><div class='del'>-		hi_bits = 0x00000000ul;</div><div class='del'>-		netdev_for_each_mc_addr(ha, dev) {</div><div class='del'>-			/* Calculate the hash index for the GA registers */</div><div class='del'>-</div><div class='del'>-			hash_ix = 0;</div><div class='del'>-			baddr = ha-&gt;addr;</div><div class='del'>-			hash_ix ^= (*baddr) &amp; 0x3f;</div><div class='del'>-			hash_ix ^= ((*baddr) &gt;&gt; 6) &amp; 0x03;</div><div class='del'>-			++baddr;</div><div class='del'>-			hash_ix ^= ((*baddr) &lt;&lt; 2) &amp; 0x03c;</div><div class='del'>-			hash_ix ^= ((*baddr) &gt;&gt; 4) &amp; 0xf;</div><div class='del'>-			++baddr;</div><div class='del'>-			hash_ix ^= ((*baddr) &lt;&lt; 4) &amp; 0x30;</div><div class='del'>-			hash_ix ^= ((*baddr) &gt;&gt; 2) &amp; 0x3f;</div><div class='del'>-			++baddr;</div><div class='del'>-			hash_ix ^= (*baddr) &amp; 0x3f;</div><div class='del'>-			hash_ix ^= ((*baddr) &gt;&gt; 6) &amp; 0x03;</div><div class='del'>-			++baddr;</div><div class='del'>-			hash_ix ^= ((*baddr) &lt;&lt; 2) &amp; 0x03c;</div><div class='del'>-			hash_ix ^= ((*baddr) &gt;&gt; 4) &amp; 0xf;</div><div class='del'>-			++baddr;</div><div class='del'>-			hash_ix ^= ((*baddr) &lt;&lt; 4) &amp; 0x30;</div><div class='del'>-			hash_ix ^= ((*baddr) &gt;&gt; 2) &amp; 0x3f;</div><div class='del'>-</div><div class='del'>-			hash_ix &amp;= 0x3f;</div><div class='del'>-</div><div class='del'>-			if (hash_ix &gt;= 32) {</div><div class='del'>-				hi_bits |= (1 &lt;&lt; (hash_ix-32));</div><div class='del'>-			} else {</div><div class='del'>-				lo_bits |= (1 &lt;&lt; hash_ix);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		/* Disable individual receive */</div><div class='del'>-		SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard);</div><div class='del'>-		*R_NETWORK_REC_CONFIG = network_rec_config_shadow;</div><div class='del'>-	}</div><div class='del'>-	*R_NETWORK_GA_0 = lo_bits;</div><div class='del'>-	*R_NETWORK_GA_1 = hi_bits;</div><div class='del'>-	spin_unlock(&amp;lp-&gt;lock);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void</div><div class='del'>-e100_hardware_send_packet(struct net_local *np, char *buf, int length)</div><div class='del'>-{</div><div class='del'>-	D(printk("e100 send pack, buf 0x%x len %d\n", buf, length));</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;np-&gt;led_lock);</div><div class='del'>-	if (!led_active &amp;&amp; time_after(jiffies, led_next_time)) {</div><div class='del'>-		/* light the network leds depending on the current speed. */</div><div class='del'>-		e100_set_network_leds(NETWORK_ACTIVITY);</div><div class='del'>-</div><div class='del'>-		/* Set the earliest time we may clear the LED */</div><div class='del'>-		led_next_time = jiffies + NET_FLASH_TIME;</div><div class='del'>-		led_active = 1;</div><div class='del'>-		mod_timer(&amp;clear_led_timer, jiffies + HZ/10);</div><div class='del'>-	}</div><div class='del'>-	spin_unlock(&amp;np-&gt;led_lock);</div><div class='del'>-</div><div class='del'>-	/* configure the tx dma descriptor */</div><div class='del'>-	myNextTxDesc-&gt;descr.sw_len = length;</div><div class='del'>-	myNextTxDesc-&gt;descr.ctrl = d_eop | d_eol | d_wait;</div><div class='del'>-	myNextTxDesc-&gt;descr.buf = virt_to_phys(buf);</div><div class='del'>-</div><div class='del'>-        /* Move end of list */</div><div class='del'>-        myLastTxDesc-&gt;descr.ctrl &amp;= ~d_eol;</div><div class='del'>-        myLastTxDesc = myNextTxDesc;</div><div class='del'>-</div><div class='del'>-	/* Restart DMA channel */</div><div class='del'>-	*R_DMA_CH0_CMD = IO_STATE(R_DMA_CH0_CMD, cmd, restart);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-e100_clear_network_leds(unsigned long dummy)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = (struct net_device *)dummy;</div><div class='del'>-	struct net_local *np = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;np-&gt;led_lock);</div><div class='del'>-</div><div class='del'>-	if (led_active &amp;&amp; time_after(jiffies, led_next_time)) {</div><div class='del'>-		e100_set_network_leds(NO_NETWORK_ACTIVITY);</div><div class='del'>-</div><div class='del'>-		/* Set the earliest time we may set the LED */</div><div class='del'>-		led_next_time = jiffies + NET_FLASH_PAUSE;</div><div class='del'>-		led_active = 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	spin_unlock(&amp;np-&gt;led_lock);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-e100_set_network_leds(int active)</div><div class='del'>-{</div><div class='del'>-#if defined(CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK)</div><div class='del'>-	int light_leds = (active == NO_NETWORK_ACTIVITY);</div><div class='del'>-#elif defined(CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY)</div><div class='del'>-	int light_leds = (active == NETWORK_ACTIVITY);</div><div class='del'>-#else</div><div class='del'>-#error "Define either CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK or CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY"</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	if (!current_speed) {</div><div class='del'>-		/* Make LED red, link is down */</div><div class='del'>-		CRIS_LED_NETWORK_SET(CRIS_LED_OFF);</div><div class='del'>-	} else if (light_leds) {</div><div class='del'>-		if (current_speed == 10) {</div><div class='del'>-			CRIS_LED_NETWORK_SET(CRIS_LED_ORANGE);</div><div class='del'>-		} else {</div><div class='del'>-			CRIS_LED_NETWORK_SET(CRIS_LED_GREEN);</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		CRIS_LED_NETWORK_SET(CRIS_LED_OFF);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='del'>-static void</div><div class='del'>-e100_netpoll(struct net_device* netdev)</div><div class='del'>-{</div><div class='del'>-	e100rxtx_interrupt(NETWORK_DMA_TX_IRQ_NBR, netdev);</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-etrax_init_module(void)</div><div class='del'>-{</div><div class='del'>-	return etrax_ethernet_init();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init</div><div class='del'>-e100_boot_setup(char* str)</div><div class='del'>-{</div><div class='del'>-	struct sockaddr sa = {0};</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* Parse the colon separated Ethernet station address */</div><div class='del'>-	for (i = 0; i &lt;  ETH_ALEN; i++) {</div><div class='del'>-		unsigned int tmp;</div><div class='del'>-		if (sscanf(str + 3*i, "%2x", &amp;tmp) != 1) {</div><div class='del'>-			printk(KERN_WARNING "Malformed station address");</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-		sa.sa_data[i] = (char)tmp;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	default_mac = sa;</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__setup("etrax100_eth=", e100_boot_setup);</div><div class='del'>-</div><div class='del'>-module_init(etrax_init_module);</div><div class='head'>diff --git a/drivers/net/dsa/Kconfig b/drivers/net/dsa/Kconfig<br/>index 7ad0a4d8e475..7eb301fd987d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/Kconfig?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/Kconfig</a></div><div class='hunk'>@@ -1,68 +1,164 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> menu "Distributed Switch Architecture drivers"</div><div class='del'>-	depends on HAVE_NET_DSA</div><div class='del'>-</div><div class='del'>-config NET_DSA_MV88E6XXX</div><div class='del'>-	tristate</div><div class='del'>-	default n</div><div class='del'>-</div><div class='del'>-config NET_DSA_MV88E6060</div><div class='del'>-	tristate "Marvell 88E6060 ethernet switch chip support"</div><div class='ctx'> 	depends on NET_DSA</div><div class='del'>-	select NET_DSA_TAG_TRAILER</div><div class='del'>-	---help---</div><div class='del'>-	  This enables support for the Marvell 88E6060 ethernet switch</div><div class='del'>-	  chip.</div><div class='ctx'> </div><div class='del'>-config NET_DSA_MV88E6XXX_NEED_PPU</div><div class='del'>-	bool</div><div class='del'>-	default n</div><div class='del'>-</div><div class='del'>-config NET_DSA_MV88E6131</div><div class='del'>-	tristate "Marvell 88E6085/6095/6095F/6131 ethernet switch chip support"</div><div class='del'>-	depends on NET_DSA</div><div class='del'>-	select NET_DSA_MV88E6XXX</div><div class='del'>-	select NET_DSA_MV88E6XXX_NEED_PPU</div><div class='del'>-	select NET_DSA_TAG_DSA</div><div class='del'>-	---help---</div><div class='del'>-	  This enables support for the Marvell 88E6085/6095/6095F/6131</div><div class='del'>-	  ethernet switch chips.</div><div class='del'>-</div><div class='del'>-config NET_DSA_MV88E6123_61_65</div><div class='del'>-	tristate "Marvell 88E6123/6161/6165 ethernet switch chip support"</div><div class='del'>-	depends on NET_DSA</div><div class='del'>-	select NET_DSA_MV88E6XXX</div><div class='del'>-	select NET_DSA_TAG_EDSA</div><div class='del'>-	---help---</div><div class='del'>-	  This enables support for the Marvell 88E6123/6161/6165</div><div class='del'>-	  ethernet switch chips.</div><div class='del'>-</div><div class='del'>-config NET_DSA_MV88E6171</div><div class='del'>-	tristate "Marvell 88E6171/6175/6350/6351 ethernet switch chip support"</div><div class='del'>-	depends on NET_DSA</div><div class='del'>-	select NET_DSA_MV88E6XXX</div><div class='del'>-	select NET_DSA_TAG_EDSA</div><div class='del'>-	---help---</div><div class='del'>-	  This enables support for the Marvell 88E6171/6175/6350/6351</div><div class='del'>-	  ethernet switches chips.</div><div class='del'>-</div><div class='del'>-config NET_DSA_MV88E6352</div><div class='del'>-	tristate "Marvell 88E6172/88E6176/88E6352 ethernet switch chip support"</div><div class='del'>-	depends on NET_DSA</div><div class='del'>-	select NET_DSA_MV88E6XXX</div><div class='del'>-	select NET_DSA_TAG_EDSA</div><div class='del'>-	---help---</div><div class='del'>-	  This enables support for the Marvell 88E6172, 88E6176 and 88E6352</div><div class='del'>-	  ethernet switch chips.</div><div class='add'>+source "drivers/net/dsa/b53/Kconfig"</div><div class='ctx'> </div><div class='ctx'> config NET_DSA_BCM_SF2</div><div class='ctx'> 	tristate "Broadcom Starfighter 2 Ethernet switch support"</div><div class='del'>-	depends on HAS_IOMEM &amp;&amp; NET_DSA</div><div class='add'>+	depends on HAS_IOMEM</div><div class='ctx'> 	select NET_DSA_TAG_BRCM</div><div class='ctx'> 	select FIXED_PHY</div><div class='ctx'> 	select BCM7XXX_PHY</div><div class='ctx'> 	select MDIO_BCM_UNIMAC</div><div class='del'>-	---help---</div><div class='add'>+	select B53</div><div class='add'>+	help</div><div class='ctx'> 	  This enables support for the Broadcom Starfighter 2 Ethernet</div><div class='ctx'> 	  switch chips.</div><div class='ctx'> </div><div class='add'>+config NET_DSA_LOOP</div><div class='add'>+	tristate "DSA mock-up Ethernet switch chip support"</div><div class='add'>+	select NET_DSA_TAG_NONE</div><div class='add'>+	select FIXED_PHY</div><div class='add'>+	help</div><div class='add'>+	  This enables support for a fake mock-up switch chip which</div><div class='add'>+	  exercises the DSA APIs.</div><div class='add'>+</div><div class='add'>+source "drivers/net/dsa/hirschmann/Kconfig"</div><div class='add'>+</div><div class='add'>+source "drivers/net/dsa/lantiq/Kconfig"</div><div class='add'>+</div><div class='add'>+config NET_DSA_MT7530</div><div class='add'>+	tristate "MediaTek MT7530 and MT7531 Ethernet switch support"</div><div class='add'>+	select NET_DSA_TAG_MTK</div><div class='add'>+	select REGMAP_IRQ</div><div class='add'>+	imply NET_DSA_MT7530_MDIO</div><div class='add'>+	imply NET_DSA_MT7530_MMIO</div><div class='add'>+	help</div><div class='add'>+	  This enables support for the MediaTek MT7530 and MT7531 Ethernet</div><div class='add'>+	  switch chips. Multi-chip module MT7530 in MT7621AT, MT7621DAT,</div><div class='add'>+	  MT7621ST and MT7623AI SoCs, and built-in switch in MT7988 SoC are</div><div class='add'>+	  supported as well.</div><div class='add'>+</div><div class='add'>+config NET_DSA_MT7530_MDIO</div><div class='add'>+	tristate "MediaTek MT7530 MDIO interface driver"</div><div class='add'>+	depends on NET_DSA_MT7530</div><div class='add'>+	select MEDIATEK_GE_PHY</div><div class='add'>+	select PCS_MTK_LYNXI</div><div class='add'>+	help</div><div class='add'>+	  This enables support for the MediaTek MT7530 and MT7531 switch</div><div class='add'>+	  chips which are connected via MDIO, as well as multi-chip</div><div class='add'>+	  module MT7530 which can be found in the MT7621AT, MT7621DAT,</div><div class='add'>+	  MT7621ST and MT7623AI SoCs.</div><div class='add'>+</div><div class='add'>+config NET_DSA_MT7530_MMIO</div><div class='add'>+	tristate "MediaTek MT7530 MMIO interface driver"</div><div class='add'>+	depends on NET_DSA_MT7530</div><div class='add'>+	depends on HAS_IOMEM</div><div class='add'>+	imply MEDIATEK_GE_SOC_PHY</div><div class='add'>+	help</div><div class='add'>+	  This enables support for the built-in Ethernet switch found</div><div class='add'>+	  in the MediaTek MT7988 SoC.</div><div class='add'>+	  The switch is a similar design as MT7531, but the switch registers</div><div class='add'>+	  are directly mapped into the SoCs register space rather than being</div><div class='add'>+	  accessible via MDIO.</div><div class='add'>+</div><div class='add'>+config NET_DSA_MV88E6060</div><div class='add'>+	tristate "Marvell 88E6060 ethernet switch chip support"</div><div class='add'>+	select NET_DSA_TAG_TRAILER</div><div class='add'>+	help</div><div class='add'>+	  This enables support for the Marvell 88E6060 ethernet switch</div><div class='add'>+	  chip.</div><div class='add'>+</div><div class='add'>+source "drivers/net/dsa/microchip/Kconfig"</div><div class='add'>+</div><div class='add'>+source "drivers/net/dsa/mv88e6xxx/Kconfig"</div><div class='add'>+</div><div class='add'>+source "drivers/net/dsa/ocelot/Kconfig"</div><div class='add'>+</div><div class='add'>+source "drivers/net/dsa/qca/Kconfig"</div><div class='add'>+</div><div class='add'>+source "drivers/net/dsa/sja1105/Kconfig"</div><div class='add'>+</div><div class='add'>+source "drivers/net/dsa/xrs700x/Kconfig"</div><div class='add'>+</div><div class='add'>+source "drivers/net/dsa/realtek/Kconfig"</div><div class='add'>+</div><div class='add'>+config NET_DSA_RZN1_A5PSW</div><div class='add'>+	tristate "Renesas RZ/N1 A5PSW Ethernet switch support"</div><div class='add'>+	depends on OF &amp;&amp; (ARCH_RZN1 || COMPILE_TEST)</div><div class='add'>+	select NET_DSA_TAG_RZN1_A5PSW</div><div class='add'>+	select PCS_RZN1_MIIC</div><div class='add'>+	help</div><div class='add'>+	  This driver supports the A5PSW switch, which is embedded in Renesas</div><div class='add'>+	  RZ/N1 SoC.</div><div class='add'>+</div><div class='add'>+config NET_DSA_KS8995</div><div class='add'>+	tristate "Micrel KS8995 family 5-ports 10/100 Ethernet switches"</div><div class='add'>+	depends on SPI</div><div class='add'>+	select NET_DSA_TAG_NONE</div><div class='add'>+	help</div><div class='add'>+	  This driver supports the Micrel KS8995 family of 10/100 Mbit ethernet</div><div class='add'>+	  switches, managed over SPI.</div><div class='add'>+</div><div class='add'>+config NET_DSA_SMSC_LAN9303</div><div class='add'>+	tristate</div><div class='add'>+	select NET_DSA_TAG_LAN9303</div><div class='add'>+	select REGMAP</div><div class='add'>+	imply SMSC_PHY</div><div class='add'>+	help</div><div class='add'>+	  This enables support for the Microchip LAN9303/LAN9354 3 port ethernet</div><div class='add'>+	  switch chips.</div><div class='add'>+</div><div class='add'>+config NET_DSA_SMSC_LAN9303_I2C</div><div class='add'>+	tristate "SMSC/Microchip LAN9303 3-ports 10/100 ethernet switch in I2C managed mode"</div><div class='add'>+	depends on I2C</div><div class='add'>+	depends on VLAN_8021Q || VLAN_8021Q=n</div><div class='add'>+	select NET_DSA_SMSC_LAN9303</div><div class='add'>+	select REGMAP_I2C</div><div class='add'>+	help</div><div class='add'>+	  Enable access functions if the SMSC/Microchip LAN9303 is configured</div><div class='add'>+	  for I2C managed mode.</div><div class='add'>+</div><div class='add'>+config NET_DSA_SMSC_LAN9303_MDIO</div><div class='add'>+	tristate "Microchip LAN9303/LAN9354 3-ports 10/100 ethernet switch in MDIO managed mode"</div><div class='add'>+	select NET_DSA_SMSC_LAN9303</div><div class='add'>+	depends on VLAN_8021Q || VLAN_8021Q=n</div><div class='add'>+	help</div><div class='add'>+	  Enable access functions if the Microchip LAN9303/LAN9354 is configured</div><div class='add'>+	  for MDIO managed mode.</div><div class='add'>+</div><div class='add'>+config NET_DSA_VITESSE_VSC73XX</div><div class='add'>+	tristate</div><div class='add'>+	select NET_DSA_TAG_VSC73XX_8021Q</div><div class='add'>+	select FIXED_PHY</div><div class='add'>+	select VITESSE_PHY</div><div class='add'>+	select GPIOLIB</div><div class='add'>+	help</div><div class='add'>+	  This enables support for the Vitesse VSC7385, VSC7388,</div><div class='add'>+	  VSC7395 and VSC7398 SparX integrated ethernet switches.</div><div class='add'>+</div><div class='add'>+config NET_DSA_VITESSE_VSC73XX_SPI</div><div class='add'>+	tristate "Vitesse VSC7385/7388/7395/7398 SPI mode support"</div><div class='add'>+	depends on SPI</div><div class='add'>+	select NET_DSA_VITESSE_VSC73XX</div><div class='add'>+	help</div><div class='add'>+	  This enables support for the Vitesse VSC7385, VSC7388, VSC7395</div><div class='add'>+	  and VSC7398 SparX integrated ethernet switches in SPI managed mode.</div><div class='add'>+</div><div class='add'>+config NET_DSA_VITESSE_VSC73XX_PLATFORM</div><div class='add'>+	tristate "Vitesse VSC7385/7388/7395/7398 Platform mode support"</div><div class='add'>+	depends on HAS_IOMEM</div><div class='add'>+	select NET_DSA_VITESSE_VSC73XX</div><div class='add'>+	help</div><div class='add'>+	  This enables support for the Vitesse VSC7385, VSC7388, VSC7395</div><div class='add'>+	  and VSC7398 SparX integrated ethernet switches, connected over</div><div class='add'>+	  a CPU-attached address bus and work in memory-mapped I/O mode.</div><div class='add'>+</div><div class='add'>+config NET_DSA_YT921X</div><div class='add'>+	tristate "Motorcomm YT9215 ethernet switch chip support"</div><div class='add'>+	select NET_DSA_TAG_YT921X</div><div class='add'>+	help</div><div class='add'>+	  This enables support for the Motorcomm YT9215 ethernet switch</div><div class='add'>+	  chip.</div><div class='ctx'> endmenu</div><div class='head'>diff --git a/drivers/net/dsa/Makefile b/drivers/net/dsa/Makefile<br/>index e2d51c4b9382..16de4ba3fa38 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/Makefile?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/Makefile</a></div><div class='hunk'>@@ -1,16 +1,27 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+obj-$(CONFIG_NET_DSA_BCM_SF2)	+= bcm-sf2.o</div><div class='add'>+bcm-sf2-objs			:= bcm_sf2.o bcm_sf2_cfp.o</div><div class='add'>+obj-$(CONFIG_NET_DSA_LOOP)	+= dsa_loop.o</div><div class='add'>+obj-$(CONFIG_NET_DSA_KS8995) 	+= ks8995.o</div><div class='add'>+obj-$(CONFIG_NET_DSA_MT7530)	+= mt7530.o</div><div class='add'>+obj-$(CONFIG_NET_DSA_MT7530_MDIO) += mt7530-mdio.o</div><div class='add'>+obj-$(CONFIG_NET_DSA_MT7530_MMIO) += mt7530-mmio.o</div><div class='ctx'> obj-$(CONFIG_NET_DSA_MV88E6060) += mv88e6060.o</div><div class='del'>-obj-$(CONFIG_NET_DSA_MV88E6XXX) += mv88e6xxx_drv.o</div><div class='del'>-mv88e6xxx_drv-y += mv88e6xxx.o</div><div class='del'>-ifdef CONFIG_NET_DSA_MV88E6123_61_65</div><div class='del'>-mv88e6xxx_drv-y += mv88e6123_61_65.o</div><div class='del'>-endif</div><div class='del'>-ifdef CONFIG_NET_DSA_MV88E6131</div><div class='del'>-mv88e6xxx_drv-y += mv88e6131.o</div><div class='del'>-endif</div><div class='del'>-ifdef CONFIG_NET_DSA_MV88E6352</div><div class='del'>-mv88e6xxx_drv-y += mv88e6352.o</div><div class='del'>-endif</div><div class='del'>-ifdef CONFIG_NET_DSA_MV88E6171</div><div class='del'>-mv88e6xxx_drv-y += mv88e6171.o</div><div class='del'>-endif</div><div class='del'>-obj-$(CONFIG_NET_DSA_BCM_SF2)	+= bcm_sf2.o</div><div class='add'>+obj-$(CONFIG_NET_DSA_RZN1_A5PSW) += rzn1_a5psw.o</div><div class='add'>+obj-$(CONFIG_NET_DSA_SMSC_LAN9303) += lan9303-core.o</div><div class='add'>+obj-$(CONFIG_NET_DSA_SMSC_LAN9303_I2C) += lan9303_i2c.o</div><div class='add'>+obj-$(CONFIG_NET_DSA_SMSC_LAN9303_MDIO) += lan9303_mdio.o</div><div class='add'>+obj-$(CONFIG_NET_DSA_VITESSE_VSC73XX) += vitesse-vsc73xx-core.o</div><div class='add'>+obj-$(CONFIG_NET_DSA_VITESSE_VSC73XX_PLATFORM) += vitesse-vsc73xx-platform.o</div><div class='add'>+obj-$(CONFIG_NET_DSA_VITESSE_VSC73XX_SPI) += vitesse-vsc73xx-spi.o</div><div class='add'>+obj-$(CONFIG_NET_DSA_YT921X) += yt921x.o</div><div class='add'>+obj-y				+= b53/</div><div class='add'>+obj-y				+= hirschmann/</div><div class='add'>+obj-y				+= lantiq/</div><div class='add'>+obj-y				+= microchip/</div><div class='add'>+obj-y				+= mv88e6xxx/</div><div class='add'>+obj-y				+= ocelot/</div><div class='add'>+obj-y				+= qca/</div><div class='add'>+obj-y				+= realtek/</div><div class='add'>+obj-y				+= sja1105/</div><div class='add'>+obj-y				+= xrs700x/</div><div class='head'>diff --git a/drivers/net/dsa/b53/Kconfig b/drivers/net/dsa/b53/Kconfig<br/>new file mode 100644<br/>index 000000000000..915008e8eff5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/b53/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/b53/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,49 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+menuconfig B53</div><div class='add'>+	tristate "Broadcom BCM53xx managed switch support"</div><div class='add'>+	depends on NET_DSA</div><div class='add'>+	select NET_DSA_TAG_NONE</div><div class='add'>+	select NET_DSA_TAG_BRCM</div><div class='add'>+	select NET_DSA_TAG_BRCM_LEGACY</div><div class='add'>+	select NET_DSA_TAG_BRCM_LEGACY_FCS</div><div class='add'>+	select NET_DSA_TAG_BRCM_PREPEND</div><div class='add'>+	help</div><div class='add'>+	  This driver adds support for Broadcom managed switch chips. It supports</div><div class='add'>+	  BCM5325E, BCM5365, BCM539x, BCM53115 and BCM53125 as well as BCM63XX</div><div class='add'>+	  integrated switches.</div><div class='add'>+</div><div class='add'>+config B53_SPI_DRIVER</div><div class='add'>+	tristate "B53 SPI connected switch driver"</div><div class='add'>+	depends on B53 &amp;&amp; SPI</div><div class='add'>+	help</div><div class='add'>+	  Select to enable support for registering switches configured through SPI.</div><div class='add'>+</div><div class='add'>+config B53_MDIO_DRIVER</div><div class='add'>+	tristate "B53 MDIO connected switch driver"</div><div class='add'>+	depends on B53</div><div class='add'>+	help</div><div class='add'>+	  Select to enable support for registering switches configured through MDIO.</div><div class='add'>+</div><div class='add'>+config B53_MMAP_DRIVER</div><div class='add'>+	tristate "B53 MMAP connected switch driver"</div><div class='add'>+	depends on B53 &amp;&amp; HAS_IOMEM</div><div class='add'>+	default BCM63XX || BMIPS_GENERIC</div><div class='add'>+	help</div><div class='add'>+	  Select to enable support for memory-mapped switches like the BCM63XX</div><div class='add'>+	  integrated switches.</div><div class='add'>+</div><div class='add'>+config B53_SRAB_DRIVER</div><div class='add'>+	tristate "B53 SRAB connected switch driver"</div><div class='add'>+	depends on B53 &amp;&amp; HAS_IOMEM</div><div class='add'>+	depends on B53_SERDES || !B53_SERDES</div><div class='add'>+	default ARCH_BCM_IPROC</div><div class='add'>+	help</div><div class='add'>+	  Select to enable support for memory-mapped Switch Register Access</div><div class='add'>+	  Bridge Registers (SRAB) like it is found on the BCM53010</div><div class='add'>+</div><div class='add'>+config B53_SERDES</div><div class='add'>+	tristate "B53 SerDes support"</div><div class='add'>+	depends on B53</div><div class='add'>+	default ARCH_BCM_NSP</div><div class='add'>+	help</div><div class='add'>+	  Select to enable support for SerDes on e.g: Northstar Plus SoCs.</div><div class='head'>diff --git a/drivers/net/dsa/b53/Makefile b/drivers/net/dsa/b53/Makefile<br/>new file mode 100644<br/>index 000000000000..b1be13023ae4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/b53/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/b53/Makefile</a></div><div class='hunk'>@@ -0,0 +1,8 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+obj-$(CONFIG_B53)		+= b53_common.o</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_B53_SPI_DRIVER)	+= b53_spi.o</div><div class='add'>+obj-$(CONFIG_B53_MDIO_DRIVER)	+= b53_mdio.o</div><div class='add'>+obj-$(CONFIG_B53_MMAP_DRIVER)	+= b53_mmap.o</div><div class='add'>+obj-$(CONFIG_B53_SRAB_DRIVER)	+= b53_srab.o</div><div class='add'>+obj-$(CONFIG_B53_SERDES)	+= b53_serdes.o</div><div class='head'>diff --git a/drivers/net/dsa/b53/b53_common.c b/drivers/net/dsa/b53/b53_common.c<br/>new file mode 100644<br/>index 000000000000..a1a177713d99<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/b53/b53_common.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/b53/b53_common.c</a></div><div class='hunk'>@@ -0,0 +1,3333 @@</div><div class='add'>+/*</div><div class='add'>+ * B53 switch driver main logic</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2011-2013 Jonas Gorski &lt;jogo@openwrt.org&gt;</div><div class='add'>+ * Copyright (C) 2016 Florian Fainelli &lt;f.fainelli@gmail.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Permission to use, copy, modify, and/or distribute this software for any</div><div class='add'>+ * purpose with or without fee is hereby granted, provided that the above</div><div class='add'>+ * copyright notice and this permission notice appear in all copies.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES</div><div class='add'>+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF</div><div class='add'>+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR</div><div class='add'>+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES</div><div class='add'>+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN</div><div class='add'>+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF</div><div class='add'>+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/math.h&gt;</div><div class='add'>+#include &lt;linux/minmax.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/platform_data/b53.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/phylink.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/if_bridge.h&gt;</div><div class='add'>+#include &lt;linux/if_vlan.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+</div><div class='add'>+#include "b53_regs.h"</div><div class='add'>+#include "b53_priv.h"</div><div class='add'>+</div><div class='add'>+struct b53_mib_desc {</div><div class='add'>+	u8 size;</div><div class='add'>+	u8 offset;</div><div class='add'>+	const char *name;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* BCM5365 MIB counters */</div><div class='add'>+static const struct b53_mib_desc b53_mibs_65[] = {</div><div class='add'>+	{ 8, 0x00, "TxOctets" },</div><div class='add'>+	{ 4, 0x08, "TxDropPkts" },</div><div class='add'>+	{ 4, 0x10, "TxBroadcastPkts" },</div><div class='add'>+	{ 4, 0x14, "TxMulticastPkts" },</div><div class='add'>+	{ 4, 0x18, "TxUnicastPkts" },</div><div class='add'>+	{ 4, 0x1c, "TxCollisions" },</div><div class='add'>+	{ 4, 0x20, "TxSingleCollision" },</div><div class='add'>+	{ 4, 0x24, "TxMultipleCollision" },</div><div class='add'>+	{ 4, 0x28, "TxDeferredTransmit" },</div><div class='add'>+	{ 4, 0x2c, "TxLateCollision" },</div><div class='add'>+	{ 4, 0x30, "TxExcessiveCollision" },</div><div class='add'>+	{ 4, 0x38, "TxPausePkts" },</div><div class='add'>+	{ 8, 0x44, "RxOctets" },</div><div class='add'>+	{ 4, 0x4c, "RxUndersizePkts" },</div><div class='add'>+	{ 4, 0x50, "RxPausePkts" },</div><div class='add'>+	{ 4, 0x54, "Pkts64Octets" },</div><div class='add'>+	{ 4, 0x58, "Pkts65to127Octets" },</div><div class='add'>+	{ 4, 0x5c, "Pkts128to255Octets" },</div><div class='add'>+	{ 4, 0x60, "Pkts256to511Octets" },</div><div class='add'>+	{ 4, 0x64, "Pkts512to1023Octets" },</div><div class='add'>+	{ 4, 0x68, "Pkts1024to1522Octets" },</div><div class='add'>+	{ 4, 0x6c, "RxOversizePkts" },</div><div class='add'>+	{ 4, 0x70, "RxJabbers" },</div><div class='add'>+	{ 4, 0x74, "RxAlignmentErrors" },</div><div class='add'>+	{ 4, 0x78, "RxFCSErrors" },</div><div class='add'>+	{ 8, 0x7c, "RxGoodOctets" },</div><div class='add'>+	{ 4, 0x84, "RxDropPkts" },</div><div class='add'>+	{ 4, 0x88, "RxUnicastPkts" },</div><div class='add'>+	{ 4, 0x8c, "RxMulticastPkts" },</div><div class='add'>+	{ 4, 0x90, "RxBroadcastPkts" },</div><div class='add'>+	{ 4, 0x94, "RxSAChanges" },</div><div class='add'>+	{ 4, 0x98, "RxFragments" },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define B53_MIBS_65_SIZE	ARRAY_SIZE(b53_mibs_65)</div><div class='add'>+</div><div class='add'>+/* BCM63xx MIB counters */</div><div class='add'>+static const struct b53_mib_desc b53_mibs_63xx[] = {</div><div class='add'>+	{ 8, 0x00, "TxOctets" },</div><div class='add'>+	{ 4, 0x08, "TxDropPkts" },</div><div class='add'>+	{ 4, 0x0c, "TxQoSPkts" },</div><div class='add'>+	{ 4, 0x10, "TxBroadcastPkts" },</div><div class='add'>+	{ 4, 0x14, "TxMulticastPkts" },</div><div class='add'>+	{ 4, 0x18, "TxUnicastPkts" },</div><div class='add'>+	{ 4, 0x1c, "TxCollisions" },</div><div class='add'>+	{ 4, 0x20, "TxSingleCollision" },</div><div class='add'>+	{ 4, 0x24, "TxMultipleCollision" },</div><div class='add'>+	{ 4, 0x28, "TxDeferredTransmit" },</div><div class='add'>+	{ 4, 0x2c, "TxLateCollision" },</div><div class='add'>+	{ 4, 0x30, "TxExcessiveCollision" },</div><div class='add'>+	{ 4, 0x38, "TxPausePkts" },</div><div class='add'>+	{ 8, 0x3c, "TxQoSOctets" },</div><div class='add'>+	{ 8, 0x44, "RxOctets" },</div><div class='add'>+	{ 4, 0x4c, "RxUndersizePkts" },</div><div class='add'>+	{ 4, 0x50, "RxPausePkts" },</div><div class='add'>+	{ 4, 0x54, "Pkts64Octets" },</div><div class='add'>+	{ 4, 0x58, "Pkts65to127Octets" },</div><div class='add'>+	{ 4, 0x5c, "Pkts128to255Octets" },</div><div class='add'>+	{ 4, 0x60, "Pkts256to511Octets" },</div><div class='add'>+	{ 4, 0x64, "Pkts512to1023Octets" },</div><div class='add'>+	{ 4, 0x68, "Pkts1024to1522Octets" },</div><div class='add'>+	{ 4, 0x6c, "RxOversizePkts" },</div><div class='add'>+	{ 4, 0x70, "RxJabbers" },</div><div class='add'>+	{ 4, 0x74, "RxAlignmentErrors" },</div><div class='add'>+	{ 4, 0x78, "RxFCSErrors" },</div><div class='add'>+	{ 8, 0x7c, "RxGoodOctets" },</div><div class='add'>+	{ 4, 0x84, "RxDropPkts" },</div><div class='add'>+	{ 4, 0x88, "RxUnicastPkts" },</div><div class='add'>+	{ 4, 0x8c, "RxMulticastPkts" },</div><div class='add'>+	{ 4, 0x90, "RxBroadcastPkts" },</div><div class='add'>+	{ 4, 0x94, "RxSAChanges" },</div><div class='add'>+	{ 4, 0x98, "RxFragments" },</div><div class='add'>+	{ 4, 0xa0, "RxSymbolErrors" },</div><div class='add'>+	{ 4, 0xa4, "RxQoSPkts" },</div><div class='add'>+	{ 8, 0xa8, "RxQoSOctets" },</div><div class='add'>+	{ 4, 0xb0, "Pkts1523to2047Octets" },</div><div class='add'>+	{ 4, 0xb4, "Pkts2048to4095Octets" },</div><div class='add'>+	{ 4, 0xb8, "Pkts4096to8191Octets" },</div><div class='add'>+	{ 4, 0xbc, "Pkts8192to9728Octets" },</div><div class='add'>+	{ 4, 0xc0, "RxDiscarded" },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define B53_MIBS_63XX_SIZE	ARRAY_SIZE(b53_mibs_63xx)</div><div class='add'>+</div><div class='add'>+/* MIB counters */</div><div class='add'>+static const struct b53_mib_desc b53_mibs[] = {</div><div class='add'>+	{ 8, 0x00, "TxOctets" },</div><div class='add'>+	{ 4, 0x08, "TxDropPkts" },</div><div class='add'>+	{ 4, 0x10, "TxBroadcastPkts" },</div><div class='add'>+	{ 4, 0x14, "TxMulticastPkts" },</div><div class='add'>+	{ 4, 0x18, "TxUnicastPkts" },</div><div class='add'>+	{ 4, 0x1c, "TxCollisions" },</div><div class='add'>+	{ 4, 0x20, "TxSingleCollision" },</div><div class='add'>+	{ 4, 0x24, "TxMultipleCollision" },</div><div class='add'>+	{ 4, 0x28, "TxDeferredTransmit" },</div><div class='add'>+	{ 4, 0x2c, "TxLateCollision" },</div><div class='add'>+	{ 4, 0x30, "TxExcessiveCollision" },</div><div class='add'>+	{ 4, 0x38, "TxPausePkts" },</div><div class='add'>+	{ 8, 0x50, "RxOctets" },</div><div class='add'>+	{ 4, 0x58, "RxUndersizePkts" },</div><div class='add'>+	{ 4, 0x5c, "RxPausePkts" },</div><div class='add'>+	{ 4, 0x60, "Pkts64Octets" },</div><div class='add'>+	{ 4, 0x64, "Pkts65to127Octets" },</div><div class='add'>+	{ 4, 0x68, "Pkts128to255Octets" },</div><div class='add'>+	{ 4, 0x6c, "Pkts256to511Octets" },</div><div class='add'>+	{ 4, 0x70, "Pkts512to1023Octets" },</div><div class='add'>+	{ 4, 0x74, "Pkts1024to1522Octets" },</div><div class='add'>+	{ 4, 0x78, "RxOversizePkts" },</div><div class='add'>+	{ 4, 0x7c, "RxJabbers" },</div><div class='add'>+	{ 4, 0x80, "RxAlignmentErrors" },</div><div class='add'>+	{ 4, 0x84, "RxFCSErrors" },</div><div class='add'>+	{ 8, 0x88, "RxGoodOctets" },</div><div class='add'>+	{ 4, 0x90, "RxDropPkts" },</div><div class='add'>+	{ 4, 0x94, "RxUnicastPkts" },</div><div class='add'>+	{ 4, 0x98, "RxMulticastPkts" },</div><div class='add'>+	{ 4, 0x9c, "RxBroadcastPkts" },</div><div class='add'>+	{ 4, 0xa0, "RxSAChanges" },</div><div class='add'>+	{ 4, 0xa4, "RxFragments" },</div><div class='add'>+	{ 4, 0xa8, "RxJumboPkts" },</div><div class='add'>+	{ 4, 0xac, "RxSymbolErrors" },</div><div class='add'>+	{ 4, 0xc0, "RxDiscarded" },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define B53_MIBS_SIZE	ARRAY_SIZE(b53_mibs)</div><div class='add'>+</div><div class='add'>+static const struct b53_mib_desc b53_mibs_58xx[] = {</div><div class='add'>+	{ 8, 0x00, "TxOctets" },</div><div class='add'>+	{ 4, 0x08, "TxDropPkts" },</div><div class='add'>+	{ 4, 0x0c, "TxQPKTQ0" },</div><div class='add'>+	{ 4, 0x10, "TxBroadcastPkts" },</div><div class='add'>+	{ 4, 0x14, "TxMulticastPkts" },</div><div class='add'>+	{ 4, 0x18, "TxUnicastPKts" },</div><div class='add'>+	{ 4, 0x1c, "TxCollisions" },</div><div class='add'>+	{ 4, 0x20, "TxSingleCollision" },</div><div class='add'>+	{ 4, 0x24, "TxMultipleCollision" },</div><div class='add'>+	{ 4, 0x28, "TxDeferredCollision" },</div><div class='add'>+	{ 4, 0x2c, "TxLateCollision" },</div><div class='add'>+	{ 4, 0x30, "TxExcessiveCollision" },</div><div class='add'>+	{ 4, 0x34, "TxFrameInDisc" },</div><div class='add'>+	{ 4, 0x38, "TxPausePkts" },</div><div class='add'>+	{ 4, 0x3c, "TxQPKTQ1" },</div><div class='add'>+	{ 4, 0x40, "TxQPKTQ2" },</div><div class='add'>+	{ 4, 0x44, "TxQPKTQ3" },</div><div class='add'>+	{ 4, 0x48, "TxQPKTQ4" },</div><div class='add'>+	{ 4, 0x4c, "TxQPKTQ5" },</div><div class='add'>+	{ 8, 0x50, "RxOctets" },</div><div class='add'>+	{ 4, 0x58, "RxUndersizePkts" },</div><div class='add'>+	{ 4, 0x5c, "RxPausePkts" },</div><div class='add'>+	{ 4, 0x60, "RxPkts64Octets" },</div><div class='add'>+	{ 4, 0x64, "RxPkts65to127Octets" },</div><div class='add'>+	{ 4, 0x68, "RxPkts128to255Octets" },</div><div class='add'>+	{ 4, 0x6c, "RxPkts256to511Octets" },</div><div class='add'>+	{ 4, 0x70, "RxPkts512to1023Octets" },</div><div class='add'>+	{ 4, 0x74, "RxPkts1024toMaxPktsOctets" },</div><div class='add'>+	{ 4, 0x78, "RxOversizePkts" },</div><div class='add'>+	{ 4, 0x7c, "RxJabbers" },</div><div class='add'>+	{ 4, 0x80, "RxAlignmentErrors" },</div><div class='add'>+	{ 4, 0x84, "RxFCSErrors" },</div><div class='add'>+	{ 8, 0x88, "RxGoodOctets" },</div><div class='add'>+	{ 4, 0x90, "RxDropPkts" },</div><div class='add'>+	{ 4, 0x94, "RxUnicastPkts" },</div><div class='add'>+	{ 4, 0x98, "RxMulticastPkts" },</div><div class='add'>+	{ 4, 0x9c, "RxBroadcastPkts" },</div><div class='add'>+	{ 4, 0xa0, "RxSAChanges" },</div><div class='add'>+	{ 4, 0xa4, "RxFragments" },</div><div class='add'>+	{ 4, 0xa8, "RxJumboPkt" },</div><div class='add'>+	{ 4, 0xac, "RxSymblErr" },</div><div class='add'>+	{ 4, 0xb0, "InRangeErrCount" },</div><div class='add'>+	{ 4, 0xb4, "OutRangeErrCount" },</div><div class='add'>+	{ 4, 0xb8, "EEELpiEvent" },</div><div class='add'>+	{ 4, 0xbc, "EEELpiDuration" },</div><div class='add'>+	{ 4, 0xc0, "RxDiscard" },</div><div class='add'>+	{ 4, 0xc8, "TxQPKTQ6" },</div><div class='add'>+	{ 4, 0xcc, "TxQPKTQ7" },</div><div class='add'>+	{ 4, 0xd0, "TxPkts64Octets" },</div><div class='add'>+	{ 4, 0xd4, "TxPkts65to127Octets" },</div><div class='add'>+	{ 4, 0xd8, "TxPkts128to255Octets" },</div><div class='add'>+	{ 4, 0xdc, "TxPkts256to511Ocets" },</div><div class='add'>+	{ 4, 0xe0, "TxPkts512to1023Ocets" },</div><div class='add'>+	{ 4, 0xe4, "TxPkts1024toMaxPktOcets" },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define B53_MIBS_58XX_SIZE	ARRAY_SIZE(b53_mibs_58xx)</div><div class='add'>+</div><div class='add'>+#define B53_MAX_MTU_25		(1536 - ETH_HLEN - VLAN_HLEN - ETH_FCS_LEN)</div><div class='add'>+#define B53_MAX_MTU		(9720 - ETH_HLEN - VLAN_HLEN - ETH_FCS_LEN)</div><div class='add'>+</div><div class='add'>+static int b53_do_vlan_op(struct b53_device *dev, u8 op)</div><div class='add'>+{</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	b53_write8(dev, B53_ARLIO_PAGE, dev-&gt;vta_regs[0], VTA_START_CMD | op);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 10; i++) {</div><div class='add'>+		u8 vta;</div><div class='add'>+</div><div class='add'>+		b53_read8(dev, B53_ARLIO_PAGE, dev-&gt;vta_regs[0], &amp;vta);</div><div class='add'>+		if (!(vta &amp; VTA_START_CMD))</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		usleep_range(100, 200);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EIO;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_set_vlan_entry(struct b53_device *dev, u16 vid,</div><div class='add'>+			       struct b53_vlan *vlan)</div><div class='add'>+{</div><div class='add'>+	if (is5325(dev)) {</div><div class='add'>+		u32 entry = 0;</div><div class='add'>+</div><div class='add'>+		if (vlan-&gt;members) {</div><div class='add'>+			entry = ((vlan-&gt;untag &amp; VA_UNTAG_MASK_25) &lt;&lt;</div><div class='add'>+				 VA_UNTAG_S_25) | vlan-&gt;members;</div><div class='add'>+			if (dev-&gt;core_rev &gt;= 3)</div><div class='add'>+				entry |= VA_VALID_25_R4 | vid &lt;&lt; VA_VID_HIGH_S;</div><div class='add'>+			else</div><div class='add'>+				entry |= VA_VALID_25;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		b53_write32(dev, B53_VLAN_PAGE, B53_VLAN_WRITE_25, entry);</div><div class='add'>+		b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_TABLE_ACCESS_25, vid |</div><div class='add'>+			    VTA_RW_STATE_WR | VTA_RW_OP_EN);</div><div class='add'>+	} else if (is5365(dev)) {</div><div class='add'>+		u16 entry = 0;</div><div class='add'>+</div><div class='add'>+		if (vlan-&gt;members)</div><div class='add'>+			entry = ((vlan-&gt;untag &amp; VA_UNTAG_MASK_65) &lt;&lt;</div><div class='add'>+				 VA_UNTAG_S_65) | vlan-&gt;members | VA_VALID_65;</div><div class='add'>+</div><div class='add'>+		b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_WRITE_65, entry);</div><div class='add'>+		b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_TABLE_ACCESS_65, vid |</div><div class='add'>+			    VTA_RW_STATE_WR | VTA_RW_OP_EN);</div><div class='add'>+	} else {</div><div class='add'>+		b53_write16(dev, B53_ARLIO_PAGE, dev-&gt;vta_regs[1], vid);</div><div class='add'>+		b53_write32(dev, B53_ARLIO_PAGE, dev-&gt;vta_regs[2],</div><div class='add'>+			    (vlan-&gt;untag &lt;&lt; VTE_UNTAG_S) | vlan-&gt;members);</div><div class='add'>+</div><div class='add'>+		b53_do_vlan_op(dev, VTA_CMD_WRITE);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(dev-&gt;ds-&gt;dev, "VID: %d, members: 0x%04x, untag: 0x%04x\n",</div><div class='add'>+		vid, vlan-&gt;members, vlan-&gt;untag);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_get_vlan_entry(struct b53_device *dev, u16 vid,</div><div class='add'>+			       struct b53_vlan *vlan)</div><div class='add'>+{</div><div class='add'>+	if (is5325(dev)) {</div><div class='add'>+		u32 entry = 0;</div><div class='add'>+</div><div class='add'>+		b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_TABLE_ACCESS_25, vid |</div><div class='add'>+			    VTA_RW_STATE_RD | VTA_RW_OP_EN);</div><div class='add'>+		b53_read32(dev, B53_VLAN_PAGE, B53_VLAN_WRITE_25, &amp;entry);</div><div class='add'>+</div><div class='add'>+		if (dev-&gt;core_rev &gt;= 3)</div><div class='add'>+			vlan-&gt;valid = !!(entry &amp; VA_VALID_25_R4);</div><div class='add'>+		else</div><div class='add'>+			vlan-&gt;valid = !!(entry &amp; VA_VALID_25);</div><div class='add'>+		vlan-&gt;members = entry &amp; VA_MEMBER_MASK;</div><div class='add'>+		vlan-&gt;untag = (entry &gt;&gt; VA_UNTAG_S_25) &amp; VA_UNTAG_MASK_25;</div><div class='add'>+</div><div class='add'>+	} else if (is5365(dev)) {</div><div class='add'>+		u16 entry = 0;</div><div class='add'>+</div><div class='add'>+		b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_TABLE_ACCESS_65, vid |</div><div class='add'>+			    VTA_RW_STATE_WR | VTA_RW_OP_EN);</div><div class='add'>+		b53_read16(dev, B53_VLAN_PAGE, B53_VLAN_WRITE_65, &amp;entry);</div><div class='add'>+</div><div class='add'>+		vlan-&gt;valid = !!(entry &amp; VA_VALID_65);</div><div class='add'>+		vlan-&gt;members = entry &amp; VA_MEMBER_MASK;</div><div class='add'>+		vlan-&gt;untag = (entry &gt;&gt; VA_UNTAG_S_65) &amp; VA_UNTAG_MASK_65;</div><div class='add'>+	} else {</div><div class='add'>+		u32 entry = 0;</div><div class='add'>+</div><div class='add'>+		b53_write16(dev, B53_ARLIO_PAGE, dev-&gt;vta_regs[1], vid);</div><div class='add'>+		b53_do_vlan_op(dev, VTA_CMD_READ);</div><div class='add'>+		b53_read32(dev, B53_ARLIO_PAGE, dev-&gt;vta_regs[2], &amp;entry);</div><div class='add'>+		vlan-&gt;members = entry &amp; VTE_MEMBERS;</div><div class='add'>+		vlan-&gt;untag = (entry &gt;&gt; VTE_UNTAG_S) &amp; VTE_MEMBERS;</div><div class='add'>+		vlan-&gt;valid = true;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_set_eap_mode(struct b53_device *dev, int port, int mode)</div><div class='add'>+{</div><div class='add'>+	u64 eap_conf;</div><div class='add'>+</div><div class='add'>+	if (is5325(dev) || is5365(dev) || dev-&gt;chip_id == BCM5389_DEVICE_ID)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	b53_read64(dev, B53_EAP_PAGE, B53_PORT_EAP_CONF(port), &amp;eap_conf);</div><div class='add'>+</div><div class='add'>+	if (is63xx(dev)) {</div><div class='add'>+		eap_conf &amp;= ~EAP_MODE_MASK_63XX;</div><div class='add'>+		eap_conf |= (u64)mode &lt;&lt; EAP_MODE_SHIFT_63XX;</div><div class='add'>+	} else {</div><div class='add'>+		eap_conf &amp;= ~EAP_MODE_MASK;</div><div class='add'>+		eap_conf |= (u64)mode &lt;&lt; EAP_MODE_SHIFT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	b53_write64(dev, B53_EAP_PAGE, B53_PORT_EAP_CONF(port), eap_conf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_set_forwarding(struct b53_device *dev, int enable)</div><div class='add'>+{</div><div class='add'>+	u8 mgmt;</div><div class='add'>+</div><div class='add'>+	b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, &amp;mgmt);</div><div class='add'>+</div><div class='add'>+	if (enable)</div><div class='add'>+		mgmt |= SM_SW_FWD_EN;</div><div class='add'>+	else</div><div class='add'>+		mgmt &amp;= ~SM_SW_FWD_EN;</div><div class='add'>+</div><div class='add'>+	b53_write8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, mgmt);</div><div class='add'>+</div><div class='add'>+	if (!is5325(dev)) {</div><div class='add'>+		/* Include IMP port in dumb forwarding mode */</div><div class='add'>+		b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_CTRL, &amp;mgmt);</div><div class='add'>+		mgmt |= B53_MII_DUMB_FWDG_EN;</div><div class='add'>+		b53_write8(dev, B53_CTRL_PAGE, B53_SWITCH_CTRL, mgmt);</div><div class='add'>+</div><div class='add'>+		/* Look at B53_UC_FWD_EN and B53_MC_FWD_EN to decide whether</div><div class='add'>+		 * frames should be flooded or not.</div><div class='add'>+		 */</div><div class='add'>+		b53_read8(dev, B53_CTRL_PAGE, B53_IP_MULTICAST_CTRL, &amp;mgmt);</div><div class='add'>+		mgmt |= B53_UC_FWD_EN | B53_MC_FWD_EN | B53_IP_MC;</div><div class='add'>+		b53_write8(dev, B53_CTRL_PAGE, B53_IP_MULTICAST_CTRL, mgmt);</div><div class='add'>+	} else {</div><div class='add'>+		b53_read8(dev, B53_CTRL_PAGE, B53_IP_MULTICAST_CTRL, &amp;mgmt);</div><div class='add'>+		mgmt |= B53_IP_MC;</div><div class='add'>+		b53_write8(dev, B53_CTRL_PAGE, B53_IP_MULTICAST_CTRL, mgmt);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_enable_vlan(struct b53_device *dev, int port, bool enable,</div><div class='add'>+			    bool enable_filtering)</div><div class='add'>+{</div><div class='add'>+	u8 mgmt, vc0, vc1, vc4 = 0, vc5;</div><div class='add'>+</div><div class='add'>+	b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, &amp;mgmt);</div><div class='add'>+	b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL0, &amp;vc0);</div><div class='add'>+	b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL1, &amp;vc1);</div><div class='add'>+</div><div class='add'>+	if (is5325(dev) || is5365(dev)) {</div><div class='add'>+		b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4_25, &amp;vc4);</div><div class='add'>+		b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5_25, &amp;vc5);</div><div class='add'>+	} else if (is63xx(dev)) {</div><div class='add'>+		b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4_63XX, &amp;vc4);</div><div class='add'>+		b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5_63XX, &amp;vc5);</div><div class='add'>+	} else {</div><div class='add'>+		b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4, &amp;vc4);</div><div class='add'>+		b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5, &amp;vc5);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vc1 &amp;= ~VC1_RX_MCST_FWD_EN;</div><div class='add'>+</div><div class='add'>+	if (enable) {</div><div class='add'>+		vc0 |= VC0_VLAN_EN | VC0_VID_CHK_EN | VC0_VID_HASH_VID;</div><div class='add'>+		vc1 |= VC1_RX_MCST_UNTAG_EN;</div><div class='add'>+		vc4 &amp;= ~VC4_ING_VID_CHECK_MASK;</div><div class='add'>+		if (enable_filtering) {</div><div class='add'>+			vc4 |= VC4_ING_VID_VIO_DROP &lt;&lt; VC4_ING_VID_CHECK_S;</div><div class='add'>+			vc5 |= VC5_DROP_VTABLE_MISS;</div><div class='add'>+		} else {</div><div class='add'>+			vc4 |= VC4_NO_ING_VID_CHK &lt;&lt; VC4_ING_VID_CHECK_S;</div><div class='add'>+			vc5 &amp;= ~VC5_DROP_VTABLE_MISS;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (is5325(dev))</div><div class='add'>+			vc0 &amp;= ~VC0_RESERVED_1;</div><div class='add'>+</div><div class='add'>+		if (is5325(dev) || is5365(dev))</div><div class='add'>+			vc1 |= VC1_RX_MCST_TAG_EN;</div><div class='add'>+</div><div class='add'>+	} else {</div><div class='add'>+		vc0 &amp;= ~(VC0_VLAN_EN | VC0_VID_CHK_EN | VC0_VID_HASH_VID);</div><div class='add'>+		vc1 &amp;= ~VC1_RX_MCST_UNTAG_EN;</div><div class='add'>+		vc4 &amp;= ~VC4_ING_VID_CHECK_MASK;</div><div class='add'>+		vc5 &amp;= ~VC5_DROP_VTABLE_MISS;</div><div class='add'>+</div><div class='add'>+		if (is5325(dev) || is5365(dev))</div><div class='add'>+			vc4 |= VC4_ING_VID_VIO_FWD &lt;&lt; VC4_ING_VID_CHECK_S;</div><div class='add'>+		else</div><div class='add'>+			vc4 |= VC4_ING_VID_VIO_TO_IMP &lt;&lt; VC4_ING_VID_CHECK_S;</div><div class='add'>+</div><div class='add'>+		if (is5325(dev) || is5365(dev))</div><div class='add'>+			vc1 &amp;= ~VC1_RX_MCST_TAG_EN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!is5325(dev) &amp;&amp; !is5365(dev))</div><div class='add'>+		vc5 &amp;= ~VC5_VID_FFF_EN;</div><div class='add'>+</div><div class='add'>+	b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL0, vc0);</div><div class='add'>+	b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL1, vc1);</div><div class='add'>+</div><div class='add'>+	if (is5325(dev) || is5365(dev)) {</div><div class='add'>+		/* enable the high 8 bit vid check on 5325 */</div><div class='add'>+		if (is5325(dev) &amp;&amp; enable)</div><div class='add'>+			b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL3,</div><div class='add'>+				   VC3_HIGH_8BIT_EN);</div><div class='add'>+		else</div><div class='add'>+			b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL3, 0);</div><div class='add'>+</div><div class='add'>+		b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4_25, vc4);</div><div class='add'>+		b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5_25, vc5);</div><div class='add'>+	} else if (is63xx(dev)) {</div><div class='add'>+		b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_CTRL3_63XX, 0);</div><div class='add'>+		b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4_63XX, vc4);</div><div class='add'>+		b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5_63XX, vc5);</div><div class='add'>+	} else {</div><div class='add'>+		b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_CTRL3, 0);</div><div class='add'>+		b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4, vc4);</div><div class='add'>+		b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5, vc5);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	b53_write8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, mgmt);</div><div class='add'>+</div><div class='add'>+	dev-&gt;vlan_enabled = enable;</div><div class='add'>+</div><div class='add'>+	dev_dbg(dev-&gt;dev, "Port %d VLAN enabled: %d, filtering: %d\n",</div><div class='add'>+		port, enable, enable_filtering);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_set_jumbo(struct b53_device *dev, bool enable, bool allow_10_100)</div><div class='add'>+{</div><div class='add'>+	u32 port_mask = 0;</div><div class='add'>+	u16 max_size = JMS_MIN_SIZE;</div><div class='add'>+</div><div class='add'>+	if (is5325(dev) || is5365(dev))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (enable) {</div><div class='add'>+		port_mask = dev-&gt;enabled_ports;</div><div class='add'>+		max_size = JMS_MAX_SIZE;</div><div class='add'>+		if (allow_10_100)</div><div class='add'>+			port_mask |= JPM_10_100_JUMBO_EN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	b53_write32(dev, B53_JUMBO_PAGE, dev-&gt;jumbo_pm_reg, port_mask);</div><div class='add'>+	return b53_write16(dev, B53_JUMBO_PAGE, dev-&gt;jumbo_size_reg, max_size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_flush_arl(struct b53_device *dev, u8 mask)</div><div class='add'>+{</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	if (is5325(dev))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	b53_write8(dev, B53_CTRL_PAGE, B53_FAST_AGE_CTRL,</div><div class='add'>+		   FAST_AGE_DONE | FAST_AGE_DYNAMIC | mask);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 10; i++) {</div><div class='add'>+		u8 fast_age_ctrl;</div><div class='add'>+</div><div class='add'>+		b53_read8(dev, B53_CTRL_PAGE, B53_FAST_AGE_CTRL,</div><div class='add'>+			  &amp;fast_age_ctrl);</div><div class='add'>+</div><div class='add'>+		if (!(fast_age_ctrl &amp; FAST_AGE_DONE))</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		msleep(1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -ETIMEDOUT;</div><div class='add'>+out:</div><div class='add'>+	/* Only age dynamic entries (default behavior) */</div><div class='add'>+	b53_write8(dev, B53_CTRL_PAGE, B53_FAST_AGE_CTRL, FAST_AGE_DYNAMIC);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_fast_age_port(struct b53_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	if (is5325(dev))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	b53_write8(dev, B53_CTRL_PAGE, B53_FAST_AGE_PORT_CTRL, port);</div><div class='add'>+</div><div class='add'>+	return b53_flush_arl(dev, FAST_AGE_PORT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_fast_age_vlan(struct b53_device *dev, u16 vid)</div><div class='add'>+{</div><div class='add'>+	if (is5325(dev))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	b53_write16(dev, B53_CTRL_PAGE, B53_FAST_AGE_VID_CTRL, vid);</div><div class='add'>+</div><div class='add'>+	return b53_flush_arl(dev, FAST_AGE_VLAN);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void b53_imp_vlan_setup(struct dsa_switch *ds, int cpu_port)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	u16 pvlan;</div><div class='add'>+</div><div class='add'>+	/* BCM5325 CPU port is at 8 */</div><div class='add'>+	if ((is5325(dev) || is5365(dev)) &amp;&amp; cpu_port == B53_CPU_PORT_25)</div><div class='add'>+		cpu_port = B53_CPU_PORT;</div><div class='add'>+</div><div class='add'>+	/* Enable the IMP port to be in the same VLAN as the other ports</div><div class='add'>+	 * on a per-port basis such that we only have Port i and IMP in</div><div class='add'>+	 * the same VLAN.</div><div class='add'>+	 */</div><div class='add'>+	b53_for_each_port(dev, i) {</div><div class='add'>+		b53_read16(dev, B53_PVLAN_PAGE, B53_PVLAN_PORT_MASK(i), &amp;pvlan);</div><div class='add'>+		pvlan |= BIT(cpu_port);</div><div class='add'>+		b53_write16(dev, B53_PVLAN_PAGE, B53_PVLAN_PORT_MASK(i), pvlan);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_imp_vlan_setup);</div><div class='add'>+</div><div class='add'>+static void b53_port_set_ucast_flood(struct b53_device *dev, int port,</div><div class='add'>+				     bool unicast)</div><div class='add'>+{</div><div class='add'>+	u16 uc;</div><div class='add'>+</div><div class='add'>+	if (is5325(dev)) {</div><div class='add'>+		if (port == B53_CPU_PORT_25)</div><div class='add'>+			port = B53_CPU_PORT;</div><div class='add'>+</div><div class='add'>+		b53_read16(dev, B53_IEEE_PAGE, B53_IEEE_UCAST_DLF, &amp;uc);</div><div class='add'>+		if (unicast)</div><div class='add'>+			uc |= BIT(port) | B53_IEEE_UCAST_DROP_EN;</div><div class='add'>+		else</div><div class='add'>+			uc &amp;= ~BIT(port);</div><div class='add'>+		b53_write16(dev, B53_IEEE_PAGE, B53_IEEE_UCAST_DLF, uc);</div><div class='add'>+	} else {</div><div class='add'>+		b53_read16(dev, B53_CTRL_PAGE, B53_UC_FLOOD_MASK, &amp;uc);</div><div class='add'>+		if (unicast)</div><div class='add'>+			uc |= BIT(port);</div><div class='add'>+		else</div><div class='add'>+			uc &amp;= ~BIT(port);</div><div class='add'>+		b53_write16(dev, B53_CTRL_PAGE, B53_UC_FLOOD_MASK, uc);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_port_set_mcast_flood(struct b53_device *dev, int port,</div><div class='add'>+				     bool multicast)</div><div class='add'>+{</div><div class='add'>+	u16 mc;</div><div class='add'>+</div><div class='add'>+	if (is5325(dev)) {</div><div class='add'>+		if (port == B53_CPU_PORT_25)</div><div class='add'>+			port = B53_CPU_PORT;</div><div class='add'>+</div><div class='add'>+		b53_read16(dev, B53_IEEE_PAGE, B53_IEEE_MCAST_DLF, &amp;mc);</div><div class='add'>+		if (multicast)</div><div class='add'>+			mc |= BIT(port) | B53_IEEE_MCAST_DROP_EN;</div><div class='add'>+		else</div><div class='add'>+			mc &amp;= ~BIT(port);</div><div class='add'>+		b53_write16(dev, B53_IEEE_PAGE, B53_IEEE_MCAST_DLF, mc);</div><div class='add'>+	} else {</div><div class='add'>+		b53_read16(dev, B53_CTRL_PAGE, B53_MC_FLOOD_MASK, &amp;mc);</div><div class='add'>+		if (multicast)</div><div class='add'>+			mc |= BIT(port);</div><div class='add'>+		else</div><div class='add'>+			mc &amp;= ~BIT(port);</div><div class='add'>+		b53_write16(dev, B53_CTRL_PAGE, B53_MC_FLOOD_MASK, mc);</div><div class='add'>+</div><div class='add'>+		b53_read16(dev, B53_CTRL_PAGE, B53_IPMC_FLOOD_MASK, &amp;mc);</div><div class='add'>+		if (multicast)</div><div class='add'>+			mc |= BIT(port);</div><div class='add'>+		else</div><div class='add'>+			mc &amp;= ~BIT(port);</div><div class='add'>+		b53_write16(dev, B53_CTRL_PAGE, B53_IPMC_FLOOD_MASK, mc);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_port_set_learning(struct b53_device *dev, int port,</div><div class='add'>+				  bool learning)</div><div class='add'>+{</div><div class='add'>+	u16 reg;</div><div class='add'>+</div><div class='add'>+	if (is5325(dev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	b53_read16(dev, B53_CTRL_PAGE, B53_DIS_LEARNING, &amp;reg);</div><div class='add'>+	if (learning)</div><div class='add'>+		reg &amp;= ~BIT(port);</div><div class='add'>+	else</div><div class='add'>+		reg |= BIT(port);</div><div class='add'>+	b53_write16(dev, B53_CTRL_PAGE, B53_DIS_LEARNING, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_port_set_isolated(struct b53_device *dev, int port,</div><div class='add'>+				  bool isolated)</div><div class='add'>+{</div><div class='add'>+	u8 offset;</div><div class='add'>+	u16 reg;</div><div class='add'>+</div><div class='add'>+	if (is5325(dev))</div><div class='add'>+		offset = B53_PROTECTED_PORT_SEL_25;</div><div class='add'>+	else</div><div class='add'>+		offset = B53_PROTECTED_PORT_SEL;</div><div class='add'>+</div><div class='add'>+	b53_read16(dev, B53_CTRL_PAGE, offset, &amp;reg);</div><div class='add'>+	if (isolated)</div><div class='add'>+		reg |= BIT(port);</div><div class='add'>+	else</div><div class='add'>+		reg &amp;= ~BIT(port);</div><div class='add'>+	b53_write16(dev, B53_CTRL_PAGE, offset, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_eee_enable_set(struct dsa_switch *ds, int port, bool enable)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+	u16 reg;</div><div class='add'>+</div><div class='add'>+	b53_read16(dev, B53_EEE_PAGE, B53_EEE_EN_CTRL, &amp;reg);</div><div class='add'>+	if (enable)</div><div class='add'>+		reg |= BIT(port);</div><div class='add'>+	else</div><div class='add'>+		reg &amp;= ~BIT(port);</div><div class='add'>+	b53_write16(dev, B53_EEE_PAGE, B53_EEE_EN_CTRL, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int b53_setup_port(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	b53_port_set_ucast_flood(dev, port, true);</div><div class='add'>+	b53_port_set_mcast_flood(dev, port, true);</div><div class='add'>+	b53_port_set_learning(dev, port, false);</div><div class='add'>+	b53_port_set_isolated(dev, port, false);</div><div class='add'>+</div><div class='add'>+	/* Force all traffic to go to the CPU port to prevent the ASIC from</div><div class='add'>+	 * trying to forward to bridged ports on matching FDB entries, then</div><div class='add'>+	 * dropping frames because it isn't allowed to forward there.</div><div class='add'>+	 */</div><div class='add'>+	if (dsa_is_user_port(ds, port))</div><div class='add'>+		b53_set_eap_mode(dev, port, EAP_MODE_SIMPLIFIED);</div><div class='add'>+</div><div class='add'>+	if (is5325(dev) &amp;&amp;</div><div class='add'>+	    in_range(port, 1, 4)) {</div><div class='add'>+		u8 reg;</div><div class='add'>+</div><div class='add'>+		b53_read8(dev, B53_CTRL_PAGE, B53_PD_MODE_CTRL_25, &amp;reg);</div><div class='add'>+		reg &amp;= ~PD_MODE_POWER_DOWN_PORT(0);</div><div class='add'>+		if (dsa_is_unused_port(ds, port))</div><div class='add'>+			reg |= PD_MODE_POWER_DOWN_PORT(port);</div><div class='add'>+		else</div><div class='add'>+			reg &amp;= ~PD_MODE_POWER_DOWN_PORT(port);</div><div class='add'>+		b53_write8(dev, B53_CTRL_PAGE, B53_PD_MODE_CTRL_25, reg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_setup_port);</div><div class='add'>+</div><div class='add'>+int b53_enable_port(struct dsa_switch *ds, int port, struct phy_device *phy)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+	unsigned int cpu_port;</div><div class='add'>+	int ret = 0;</div><div class='add'>+	u16 pvlan;</div><div class='add'>+</div><div class='add'>+	if (!dsa_is_user_port(ds, port))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	cpu_port = dsa_to_port(ds, port)-&gt;cpu_dp-&gt;index;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;ops-&gt;phy_enable)</div><div class='add'>+		dev-&gt;ops-&gt;phy_enable(dev, port);</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;ops-&gt;irq_enable)</div><div class='add'>+		ret = dev-&gt;ops-&gt;irq_enable(dev, port);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Clear the Rx and Tx disable bits and set to no spanning tree */</div><div class='add'>+	b53_write8(dev, B53_CTRL_PAGE, B53_PORT_CTRL(port), 0);</div><div class='add'>+</div><div class='add'>+	/* Set this port, and only this one to be in the default VLAN,</div><div class='add'>+	 * if member of a bridge, restore its membership prior to</div><div class='add'>+	 * bringing down this port.</div><div class='add'>+	 */</div><div class='add'>+	b53_read16(dev, B53_PVLAN_PAGE, B53_PVLAN_PORT_MASK(port), &amp;pvlan);</div><div class='add'>+	pvlan &amp;= ~0x1ff;</div><div class='add'>+	pvlan |= BIT(port);</div><div class='add'>+	pvlan |= dev-&gt;ports[port].vlan_ctl_mask;</div><div class='add'>+	b53_write16(dev, B53_PVLAN_PAGE, B53_PVLAN_PORT_MASK(port), pvlan);</div><div class='add'>+</div><div class='add'>+	b53_imp_vlan_setup(ds, cpu_port);</div><div class='add'>+</div><div class='add'>+	/* If EEE was enabled, restore it */</div><div class='add'>+	if (dev-&gt;ports[port].eee.eee_enabled)</div><div class='add'>+		b53_eee_enable_set(ds, port, true);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_enable_port);</div><div class='add'>+</div><div class='add'>+void b53_disable_port(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+	u8 reg;</div><div class='add'>+</div><div class='add'>+	/* Disable Tx/Rx for the port */</div><div class='add'>+	b53_read8(dev, B53_CTRL_PAGE, B53_PORT_CTRL(port), &amp;reg);</div><div class='add'>+	reg |= PORT_CTRL_RX_DISABLE | PORT_CTRL_TX_DISABLE;</div><div class='add'>+	b53_write8(dev, B53_CTRL_PAGE, B53_PORT_CTRL(port), reg);</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;ops-&gt;phy_disable)</div><div class='add'>+		dev-&gt;ops-&gt;phy_disable(dev, port);</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;ops-&gt;irq_disable)</div><div class='add'>+		dev-&gt;ops-&gt;irq_disable(dev, port);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_disable_port);</div><div class='add'>+</div><div class='add'>+void b53_brcm_hdr_setup(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+	bool tag_en = !(dev-&gt;tag_protocol == DSA_TAG_PROTO_NONE);</div><div class='add'>+	u8 hdr_ctl, val;</div><div class='add'>+	u16 reg;</div><div class='add'>+</div><div class='add'>+	/* Resolve which bit controls the Broadcom tag */</div><div class='add'>+	switch (port) {</div><div class='add'>+	case 8:</div><div class='add'>+		val = BRCM_HDR_P8_EN;</div><div class='add'>+		break;</div><div class='add'>+	case 7:</div><div class='add'>+		val = BRCM_HDR_P7_EN;</div><div class='add'>+		break;</div><div class='add'>+	case 5:</div><div class='add'>+		val = BRCM_HDR_P5_EN;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		val = 0;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Enable management mode if tagging is requested */</div><div class='add'>+	b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, &amp;hdr_ctl);</div><div class='add'>+	if (tag_en)</div><div class='add'>+		hdr_ctl |= SM_SW_FWD_MODE;</div><div class='add'>+	else</div><div class='add'>+		hdr_ctl &amp;= ~SM_SW_FWD_MODE;</div><div class='add'>+	b53_write8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, hdr_ctl);</div><div class='add'>+</div><div class='add'>+	/* Configure the appropriate IMP port */</div><div class='add'>+	b53_read8(dev, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, &amp;hdr_ctl);</div><div class='add'>+	if (port == 8)</div><div class='add'>+		hdr_ctl |= GC_FRM_MGMT_PORT_MII;</div><div class='add'>+	else if (port == 5)</div><div class='add'>+		hdr_ctl |= GC_FRM_MGMT_PORT_M;</div><div class='add'>+	b53_write8(dev, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, hdr_ctl);</div><div class='add'>+</div><div class='add'>+	/* B53_BRCM_HDR not present on devices with legacy tags */</div><div class='add'>+	if (dev-&gt;tag_protocol == DSA_TAG_PROTO_BRCM_LEGACY ||</div><div class='add'>+	    dev-&gt;tag_protocol == DSA_TAG_PROTO_BRCM_LEGACY_FCS)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Enable Broadcom tags for IMP port */</div><div class='add'>+	b53_read8(dev, B53_MGMT_PAGE, B53_BRCM_HDR, &amp;hdr_ctl);</div><div class='add'>+	if (tag_en)</div><div class='add'>+		hdr_ctl |= val;</div><div class='add'>+	else</div><div class='add'>+		hdr_ctl &amp;= ~val;</div><div class='add'>+	b53_write8(dev, B53_MGMT_PAGE, B53_BRCM_HDR, hdr_ctl);</div><div class='add'>+</div><div class='add'>+	/* Registers below are only accessible on newer devices */</div><div class='add'>+	if (!is58xx(dev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Enable reception Broadcom tag for CPU TX (switch RX) to</div><div class='add'>+	 * allow us to tag outgoing frames</div><div class='add'>+	 */</div><div class='add'>+	b53_read16(dev, B53_MGMT_PAGE, B53_BRCM_HDR_RX_DIS, &amp;reg);</div><div class='add'>+	if (tag_en)</div><div class='add'>+		reg &amp;= ~BIT(port);</div><div class='add'>+	else</div><div class='add'>+		reg |= BIT(port);</div><div class='add'>+	b53_write16(dev, B53_MGMT_PAGE, B53_BRCM_HDR_RX_DIS, reg);</div><div class='add'>+</div><div class='add'>+	/* Enable transmission of Broadcom tags from the switch (CPU RX) to</div><div class='add'>+	 * allow delivering frames to the per-port net_devices</div><div class='add'>+	 */</div><div class='add'>+	b53_read16(dev, B53_MGMT_PAGE, B53_BRCM_HDR_TX_DIS, &amp;reg);</div><div class='add'>+	if (tag_en)</div><div class='add'>+		reg &amp;= ~BIT(port);</div><div class='add'>+	else</div><div class='add'>+		reg |= BIT(port);</div><div class='add'>+	b53_write16(dev, B53_MGMT_PAGE, B53_BRCM_HDR_TX_DIS, reg);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_brcm_hdr_setup);</div><div class='add'>+</div><div class='add'>+static void b53_enable_cpu_port(struct b53_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	u8 port_ctrl;</div><div class='add'>+</div><div class='add'>+	/* BCM5325 CPU port is at 8 */</div><div class='add'>+	if ((is5325(dev) || is5365(dev)) &amp;&amp; port == B53_CPU_PORT_25)</div><div class='add'>+		port = B53_CPU_PORT;</div><div class='add'>+</div><div class='add'>+	port_ctrl = PORT_CTRL_RX_BCST_EN |</div><div class='add'>+		    PORT_CTRL_RX_MCST_EN |</div><div class='add'>+		    PORT_CTRL_RX_UCST_EN;</div><div class='add'>+	b53_write8(dev, B53_CTRL_PAGE, B53_PORT_CTRL(port), port_ctrl);</div><div class='add'>+</div><div class='add'>+	b53_brcm_hdr_setup(dev-&gt;ds, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_enable_mib(struct b53_device *dev)</div><div class='add'>+{</div><div class='add'>+	u8 gc;</div><div class='add'>+</div><div class='add'>+	b53_read8(dev, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, &amp;gc);</div><div class='add'>+	gc &amp;= ~(GC_RESET_MIB | GC_MIB_AC_EN);</div><div class='add'>+	b53_write8(dev, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, gc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_enable_stp(struct b53_device *dev)</div><div class='add'>+{</div><div class='add'>+	u8 gc;</div><div class='add'>+</div><div class='add'>+	b53_read8(dev, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, &amp;gc);</div><div class='add'>+	gc |= GC_RX_BPDU_EN;</div><div class='add'>+	b53_write8(dev, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, gc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 b53_default_pvid(struct b53_device *dev)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool b53_vlan_port_needs_forced_tagged(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return dev-&gt;tag_protocol == DSA_TAG_PROTO_NONE &amp;&amp; dsa_is_cpu_port(ds, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool b53_vlan_port_may_join_untagged(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+	struct dsa_port *dp;</div><div class='add'>+</div><div class='add'>+	if (!dev-&gt;vlan_filtering)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	dp = dsa_to_port(ds, port);</div><div class='add'>+</div><div class='add'>+	if (dsa_port_is_cpu(dp))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return dp-&gt;bridge == NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int b53_configure_vlan(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+	struct b53_vlan vl = { 0 };</div><div class='add'>+	struct b53_vlan *v;</div><div class='add'>+	int i, def_vid;</div><div class='add'>+	u16 vid;</div><div class='add'>+</div><div class='add'>+	def_vid = b53_default_pvid(dev);</div><div class='add'>+</div><div class='add'>+	/* clear all vlan entries */</div><div class='add'>+	if (is5325(dev) || is5365(dev)) {</div><div class='add'>+		for (i = def_vid; i &lt; dev-&gt;num_vlans; i++)</div><div class='add'>+			b53_set_vlan_entry(dev, i, &amp;vl);</div><div class='add'>+	} else {</div><div class='add'>+		b53_do_vlan_op(dev, VTA_CMD_CLEAR);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	b53_enable_vlan(dev, -1, dev-&gt;vlan_enabled, dev-&gt;vlan_filtering);</div><div class='add'>+</div><div class='add'>+	/* Create an untagged VLAN entry for the default PVID in case</div><div class='add'>+	 * CONFIG_VLAN_8021Q is disabled and there are no calls to</div><div class='add'>+	 * dsa_user_vlan_rx_add_vid() to create the default VLAN</div><div class='add'>+	 * entry. Do this only when the tagging protocol is not</div><div class='add'>+	 * DSA_TAG_PROTO_NONE</div><div class='add'>+	 */</div><div class='add'>+	v = &amp;dev-&gt;vlans[def_vid];</div><div class='add'>+	b53_for_each_port(dev, i) {</div><div class='add'>+		if (!b53_vlan_port_may_join_untagged(ds, i))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		vl.members |= BIT(i);</div><div class='add'>+		if (!b53_vlan_port_needs_forced_tagged(ds, i))</div><div class='add'>+			vl.untag = vl.members;</div><div class='add'>+		b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_PORT_DEF_TAG(i),</div><div class='add'>+			    def_vid);</div><div class='add'>+	}</div><div class='add'>+	b53_set_vlan_entry(dev, def_vid, &amp;vl);</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;vlan_filtering) {</div><div class='add'>+		/* Upon initial call we have not set-up any VLANs, but upon</div><div class='add'>+		 * system resume, we need to restore all VLAN entries.</div><div class='add'>+		 */</div><div class='add'>+		for (vid = def_vid + 1; vid &lt; dev-&gt;num_vlans; vid++) {</div><div class='add'>+			v = &amp;dev-&gt;vlans[vid];</div><div class='add'>+</div><div class='add'>+			if (!v-&gt;members)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			b53_set_vlan_entry(dev, vid, v);</div><div class='add'>+			b53_fast_age_vlan(dev, vid);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		b53_for_each_port(dev, i) {</div><div class='add'>+			if (!dsa_is_cpu_port(ds, i))</div><div class='add'>+				b53_write16(dev, B53_VLAN_PAGE,</div><div class='add'>+					    B53_VLAN_PORT_DEF_TAG(i),</div><div class='add'>+					    dev-&gt;ports[i].pvid);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_configure_vlan);</div><div class='add'>+</div><div class='add'>+static void b53_switch_reset_gpio(struct b53_device *dev)</div><div class='add'>+{</div><div class='add'>+	int gpio = dev-&gt;reset_gpio;</div><div class='add'>+</div><div class='add'>+	if (gpio &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Reset sequence: RESET low(50ms)-&gt;high(20ms)</div><div class='add'>+	 */</div><div class='add'>+	gpio_set_value(gpio, 0);</div><div class='add'>+	mdelay(50);</div><div class='add'>+</div><div class='add'>+	gpio_set_value(gpio, 1);</div><div class='add'>+	mdelay(20);</div><div class='add'>+</div><div class='add'>+	dev-&gt;current_page = 0xff;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_switch_reset(struct b53_device *dev)</div><div class='add'>+{</div><div class='add'>+	unsigned int timeout = 1000;</div><div class='add'>+	u8 mgmt, reg;</div><div class='add'>+</div><div class='add'>+	b53_switch_reset_gpio(dev);</div><div class='add'>+</div><div class='add'>+	if (is539x(dev)) {</div><div class='add'>+		b53_write8(dev, B53_CTRL_PAGE, B53_SOFTRESET, 0x83);</div><div class='add'>+		b53_write8(dev, B53_CTRL_PAGE, B53_SOFTRESET, 0x00);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* This is specific to 58xx devices here, do not use is58xx() which</div><div class='add'>+	 * covers the larger Starfigther 2 family, including 7445/7278 which</div><div class='add'>+	 * still use this driver as a library and need to perform the reset</div><div class='add'>+	 * earlier.</div><div class='add'>+	 */</div><div class='add'>+	if (dev-&gt;chip_id == BCM58XX_DEVICE_ID ||</div><div class='add'>+	    dev-&gt;chip_id == BCM583XX_DEVICE_ID) {</div><div class='add'>+		b53_read8(dev, B53_CTRL_PAGE, B53_SOFTRESET, &amp;reg);</div><div class='add'>+		reg |= SW_RST | EN_SW_RST | EN_CH_RST;</div><div class='add'>+		b53_write8(dev, B53_CTRL_PAGE, B53_SOFTRESET, reg);</div><div class='add'>+</div><div class='add'>+		do {</div><div class='add'>+			b53_read8(dev, B53_CTRL_PAGE, B53_SOFTRESET, &amp;reg);</div><div class='add'>+			if (!(reg &amp; SW_RST))</div><div class='add'>+				break;</div><div class='add'>+</div><div class='add'>+			usleep_range(1000, 2000);</div><div class='add'>+		} while (timeout-- &gt; 0);</div><div class='add'>+</div><div class='add'>+		if (timeout == 0) {</div><div class='add'>+			dev_err(dev-&gt;dev,</div><div class='add'>+				"Timeout waiting for SW_RST to clear!\n");</div><div class='add'>+			return -ETIMEDOUT;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, &amp;mgmt);</div><div class='add'>+</div><div class='add'>+	if (!(mgmt &amp; SM_SW_FWD_EN)) {</div><div class='add'>+		mgmt &amp;= ~SM_SW_FWD_MODE;</div><div class='add'>+		mgmt |= SM_SW_FWD_EN;</div><div class='add'>+</div><div class='add'>+		b53_write8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, mgmt);</div><div class='add'>+		b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, &amp;mgmt);</div><div class='add'>+</div><div class='add'>+		if (!(mgmt &amp; SM_SW_FWD_EN)) {</div><div class='add'>+			dev_err(dev-&gt;dev, "Failed to enable switch!\n");</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	b53_enable_mib(dev);</div><div class='add'>+	b53_enable_stp(dev);</div><div class='add'>+</div><div class='add'>+	return b53_flush_arl(dev, FAST_AGE_STATIC);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_phy_read16(struct dsa_switch *ds, int addr, int reg)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *priv = ds-&gt;priv;</div><div class='add'>+	u16 value = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;ops-&gt;phy_read16)</div><div class='add'>+		ret = priv-&gt;ops-&gt;phy_read16(priv, addr, reg, &amp;value);</div><div class='add'>+	else</div><div class='add'>+		ret = b53_read16(priv, B53_PORT_MII_PAGE(addr),</div><div class='add'>+				 reg * 2, &amp;value);</div><div class='add'>+</div><div class='add'>+	return ret ? ret : value;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_phy_write16(struct dsa_switch *ds, int addr, int reg, u16 val)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;ops-&gt;phy_write16)</div><div class='add'>+		return priv-&gt;ops-&gt;phy_write16(priv, addr, reg, val);</div><div class='add'>+</div><div class='add'>+	return b53_write16(priv, B53_PORT_MII_PAGE(addr), reg * 2, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_reset_switch(struct b53_device *priv)</div><div class='add'>+{</div><div class='add'>+	/* reset vlans */</div><div class='add'>+	memset(priv-&gt;vlans, 0, sizeof(*priv-&gt;vlans) * priv-&gt;num_vlans);</div><div class='add'>+	memset(priv-&gt;ports, 0, sizeof(*priv-&gt;ports) * priv-&gt;num_ports);</div><div class='add'>+</div><div class='add'>+	priv-&gt;serdes_lane = B53_INVALID_LANE;</div><div class='add'>+</div><div class='add'>+	return b53_switch_reset(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_apply_config(struct b53_device *priv)</div><div class='add'>+{</div><div class='add'>+	/* disable switching */</div><div class='add'>+	b53_set_forwarding(priv, 0);</div><div class='add'>+</div><div class='add'>+	b53_configure_vlan(priv-&gt;ds);</div><div class='add'>+</div><div class='add'>+	/* enable switching */</div><div class='add'>+	b53_set_forwarding(priv, 1);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_reset_mib(struct b53_device *priv)</div><div class='add'>+{</div><div class='add'>+	u8 gc;</div><div class='add'>+</div><div class='add'>+	b53_read8(priv, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, &amp;gc);</div><div class='add'>+</div><div class='add'>+	b53_write8(priv, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, gc | GC_RESET_MIB);</div><div class='add'>+	msleep(1);</div><div class='add'>+	b53_write8(priv, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, gc &amp; ~GC_RESET_MIB);</div><div class='add'>+	msleep(1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct b53_mib_desc *b53_get_mib(struct b53_device *dev)</div><div class='add'>+{</div><div class='add'>+	if (is5365(dev))</div><div class='add'>+		return b53_mibs_65;</div><div class='add'>+	else if (is63xx(dev))</div><div class='add'>+		return b53_mibs_63xx;</div><div class='add'>+	else if (is58xx(dev))</div><div class='add'>+		return b53_mibs_58xx;</div><div class='add'>+	else</div><div class='add'>+		return b53_mibs;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int b53_get_mib_size(struct b53_device *dev)</div><div class='add'>+{</div><div class='add'>+	if (is5365(dev))</div><div class='add'>+		return B53_MIBS_65_SIZE;</div><div class='add'>+	else if (is63xx(dev))</div><div class='add'>+		return B53_MIBS_63XX_SIZE;</div><div class='add'>+	else if (is58xx(dev))</div><div class='add'>+		return B53_MIBS_58XX_SIZE;</div><div class='add'>+	else</div><div class='add'>+		return B53_MIBS_SIZE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct phy_device *b53_get_phy_device(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	/* These ports typically do not have built-in PHYs */</div><div class='add'>+	switch (port) {</div><div class='add'>+	case B53_CPU_PORT_25:</div><div class='add'>+	case 7:</div><div class='add'>+	case B53_CPU_PORT:</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return mdiobus_get_phy(ds-&gt;user_mii_bus, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void b53_get_strings(struct dsa_switch *ds, int port, u32 stringset,</div><div class='add'>+		     uint8_t *data)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+	const struct b53_mib_desc *mibs = b53_get_mib(dev);</div><div class='add'>+	unsigned int mib_size = b53_get_mib_size(dev);</div><div class='add'>+	struct phy_device *phydev;</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	if (stringset == ETH_SS_STATS) {</div><div class='add'>+		for (i = 0; i &lt; mib_size; i++)</div><div class='add'>+			ethtool_puts(&amp;data, mibs[i].name);</div><div class='add'>+	} else if (stringset == ETH_SS_PHY_STATS) {</div><div class='add'>+		phydev = b53_get_phy_device(ds, port);</div><div class='add'>+		if (!phydev)</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		phy_ethtool_get_strings(phydev, data);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_get_strings);</div><div class='add'>+</div><div class='add'>+void b53_get_ethtool_stats(struct dsa_switch *ds, int port, uint64_t *data)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+	const struct b53_mib_desc *mibs = b53_get_mib(dev);</div><div class='add'>+	unsigned int mib_size = b53_get_mib_size(dev);</div><div class='add'>+	const struct b53_mib_desc *s;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	u64 val = 0;</div><div class='add'>+</div><div class='add'>+	if (is5365(dev) &amp;&amp; port == 5)</div><div class='add'>+		port = 8;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;stats_mutex);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; mib_size; i++) {</div><div class='add'>+		s = &amp;mibs[i];</div><div class='add'>+</div><div class='add'>+		if (s-&gt;size == 8) {</div><div class='add'>+			b53_read64(dev, B53_MIB_PAGE(port), s-&gt;offset, &amp;val);</div><div class='add'>+		} else {</div><div class='add'>+			u32 val32;</div><div class='add'>+</div><div class='add'>+			b53_read32(dev, B53_MIB_PAGE(port), s-&gt;offset,</div><div class='add'>+				   &amp;val32);</div><div class='add'>+			val = val32;</div><div class='add'>+		}</div><div class='add'>+		data[i] = (u64)val;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;stats_mutex);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_get_ethtool_stats);</div><div class='add'>+</div><div class='add'>+void b53_get_ethtool_phy_stats(struct dsa_switch *ds, int port, uint64_t *data)</div><div class='add'>+{</div><div class='add'>+	struct phy_device *phydev;</div><div class='add'>+</div><div class='add'>+	phydev = b53_get_phy_device(ds, port);</div><div class='add'>+	if (!phydev)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	phy_ethtool_get_stats(phydev, NULL, data);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_get_ethtool_phy_stats);</div><div class='add'>+</div><div class='add'>+int b53_get_sset_count(struct dsa_switch *ds, int port, int sset)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+	struct phy_device *phydev;</div><div class='add'>+</div><div class='add'>+	if (sset == ETH_SS_STATS) {</div><div class='add'>+		return b53_get_mib_size(dev);</div><div class='add'>+	} else if (sset == ETH_SS_PHY_STATS) {</div><div class='add'>+		phydev = b53_get_phy_device(ds, port);</div><div class='add'>+		if (!phydev)</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		return phy_ethtool_get_sset_count(phydev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_get_sset_count);</div><div class='add'>+</div><div class='add'>+enum b53_devlink_resource_id {</div><div class='add'>+	B53_DEVLINK_PARAM_ID_VLAN_TABLE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static u64 b53_devlink_vlan_table_get(void *priv)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = priv;</div><div class='add'>+	struct b53_vlan *vl;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	u64 count = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; dev-&gt;num_vlans; i++) {</div><div class='add'>+		vl = &amp;dev-&gt;vlans[i];</div><div class='add'>+		if (vl-&gt;members)</div><div class='add'>+			count++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int b53_setup_devlink_resources(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct devlink_resource_size_params size_params;</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	devlink_resource_size_params_init(&amp;size_params, dev-&gt;num_vlans,</div><div class='add'>+					  dev-&gt;num_vlans,</div><div class='add'>+					  1, DEVLINK_RESOURCE_UNIT_ENTRY);</div><div class='add'>+</div><div class='add'>+	err = dsa_devlink_resource_register(ds, "VLAN", dev-&gt;num_vlans,</div><div class='add'>+					    B53_DEVLINK_PARAM_ID_VLAN_TABLE,</div><div class='add'>+					    DEVLINK_RESOURCE_ID_PARENT_TOP,</div><div class='add'>+					    &amp;size_params);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	dsa_devlink_resource_occ_get_register(ds,</div><div class='add'>+					      B53_DEVLINK_PARAM_ID_VLAN_TABLE,</div><div class='add'>+					      b53_devlink_vlan_table_get, dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+out:</div><div class='add'>+	dsa_devlink_resources_unregister(ds);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_setup_devlink_resources);</div><div class='add'>+</div><div class='add'>+static int b53_setup(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+	struct b53_vlan *vl;</div><div class='add'>+	unsigned int port;</div><div class='add'>+	u16 pvid;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Request bridge PVID untagged when DSA_TAG_PROTO_NONE is set</div><div class='add'>+	 * which forces the CPU port to be tagged in all VLANs.</div><div class='add'>+	 */</div><div class='add'>+	ds-&gt;untag_bridge_pvid = dev-&gt;tag_protocol == DSA_TAG_PROTO_NONE;</div><div class='add'>+</div><div class='add'>+	/* The switch does not tell us the original VLAN for untagged</div><div class='add'>+	 * packets, so keep the CPU port always tagged.</div><div class='add'>+	 */</div><div class='add'>+	ds-&gt;untag_vlan_aware_bridge_pvid = true;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;chip_id == BCM53101_DEVICE_ID) {</div><div class='add'>+		/* BCM53101 uses 0.5 second increments */</div><div class='add'>+		ds-&gt;ageing_time_min = 1 * 500;</div><div class='add'>+		ds-&gt;ageing_time_max = AGE_TIME_MAX * 500;</div><div class='add'>+	} else {</div><div class='add'>+		/* Everything else uses 1 second increments */</div><div class='add'>+		ds-&gt;ageing_time_min = 1 * 1000;</div><div class='add'>+		ds-&gt;ageing_time_max = AGE_TIME_MAX * 1000;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = b53_reset_switch(dev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(ds-&gt;dev, "failed to reset switch\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* setup default vlan for filtering mode */</div><div class='add'>+	pvid = b53_default_pvid(dev);</div><div class='add'>+	vl = &amp;dev-&gt;vlans[pvid];</div><div class='add'>+	b53_for_each_port(dev, port) {</div><div class='add'>+		vl-&gt;members |= BIT(port);</div><div class='add'>+		if (!b53_vlan_port_needs_forced_tagged(ds, port))</div><div class='add'>+			vl-&gt;untag |= BIT(port);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	b53_reset_mib(dev);</div><div class='add'>+</div><div class='add'>+	ret = b53_apply_config(dev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(ds-&gt;dev, "failed to apply configuration\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Configure IMP/CPU port, disable all other ports. Enabled</div><div class='add'>+	 * ports will be configured with .port_enable</div><div class='add'>+	 */</div><div class='add'>+	for (port = 0; port &lt; dev-&gt;num_ports; port++) {</div><div class='add'>+		if (dsa_is_cpu_port(ds, port))</div><div class='add'>+			b53_enable_cpu_port(dev, port);</div><div class='add'>+		else</div><div class='add'>+			b53_disable_port(ds, port);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return b53_setup_devlink_resources(ds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_teardown(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	dsa_devlink_resources_unregister(ds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_force_link(struct b53_device *dev, int port, int link)</div><div class='add'>+{</div><div class='add'>+	u8 reg, val, off;</div><div class='add'>+</div><div class='add'>+	/* Override the port settings */</div><div class='add'>+	if (port == dev-&gt;imp_port) {</div><div class='add'>+		off = B53_PORT_OVERRIDE_CTRL;</div><div class='add'>+		val = PORT_OVERRIDE_EN;</div><div class='add'>+	} else if (is5325(dev)) {</div><div class='add'>+		return;</div><div class='add'>+	} else {</div><div class='add'>+		off = B53_GMII_PORT_OVERRIDE_CTRL(port);</div><div class='add'>+		val = GMII_PO_EN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	b53_read8(dev, B53_CTRL_PAGE, off, &amp;reg);</div><div class='add'>+	reg |= val;</div><div class='add'>+	if (link)</div><div class='add'>+		reg |= PORT_OVERRIDE_LINK;</div><div class='add'>+	else</div><div class='add'>+		reg &amp;= ~PORT_OVERRIDE_LINK;</div><div class='add'>+	b53_write8(dev, B53_CTRL_PAGE, off, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_force_port_config(struct b53_device *dev, int port,</div><div class='add'>+				  int speed, int duplex,</div><div class='add'>+				  bool tx_pause, bool rx_pause)</div><div class='add'>+{</div><div class='add'>+	u8 reg, val, off;</div><div class='add'>+</div><div class='add'>+	/* Override the port settings */</div><div class='add'>+	if (port == dev-&gt;imp_port) {</div><div class='add'>+		off = B53_PORT_OVERRIDE_CTRL;</div><div class='add'>+		val = PORT_OVERRIDE_EN;</div><div class='add'>+	} else if (is5325(dev)) {</div><div class='add'>+		return;</div><div class='add'>+	} else {</div><div class='add'>+		off = B53_GMII_PORT_OVERRIDE_CTRL(port);</div><div class='add'>+		val = GMII_PO_EN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	b53_read8(dev, B53_CTRL_PAGE, off, &amp;reg);</div><div class='add'>+	reg |= val;</div><div class='add'>+	if (duplex == DUPLEX_FULL)</div><div class='add'>+		reg |= PORT_OVERRIDE_FULL_DUPLEX;</div><div class='add'>+	else</div><div class='add'>+		reg &amp;= ~PORT_OVERRIDE_FULL_DUPLEX;</div><div class='add'>+</div><div class='add'>+	reg &amp;= ~(0x3 &lt;&lt; GMII_PO_SPEED_S);</div><div class='add'>+	if (is5301x(dev) || is58xx(dev))</div><div class='add'>+		reg &amp;= ~PORT_OVERRIDE_SPEED_2000M;</div><div class='add'>+</div><div class='add'>+	switch (speed) {</div><div class='add'>+	case 2000:</div><div class='add'>+		reg |= PORT_OVERRIDE_SPEED_2000M;</div><div class='add'>+		fallthrough;</div><div class='add'>+	case SPEED_1000:</div><div class='add'>+		reg |= PORT_OVERRIDE_SPEED_1000M;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_100:</div><div class='add'>+		reg |= PORT_OVERRIDE_SPEED_100M;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_10:</div><div class='add'>+		reg |= PORT_OVERRIDE_SPEED_10M;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(dev-&gt;dev, "unknown speed: %d\n", speed);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (is5325(dev))</div><div class='add'>+		reg &amp;= ~PORT_OVERRIDE_LP_FLOW_25;</div><div class='add'>+	else</div><div class='add'>+		reg &amp;= ~(PORT_OVERRIDE_RX_FLOW | PORT_OVERRIDE_TX_FLOW);</div><div class='add'>+</div><div class='add'>+	if (rx_pause) {</div><div class='add'>+		if (is5325(dev))</div><div class='add'>+			reg |= PORT_OVERRIDE_LP_FLOW_25;</div><div class='add'>+		else</div><div class='add'>+			reg |= PORT_OVERRIDE_RX_FLOW;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (tx_pause) {</div><div class='add'>+		if (is5325(dev))</div><div class='add'>+			reg |= PORT_OVERRIDE_LP_FLOW_25;</div><div class='add'>+		else</div><div class='add'>+			reg |= PORT_OVERRIDE_TX_FLOW;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	b53_write8(dev, B53_CTRL_PAGE, off, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_adjust_63xx_rgmii(struct dsa_switch *ds, int port,</div><div class='add'>+				  phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+	u8 rgmii_ctrl = 0;</div><div class='add'>+</div><div class='add'>+	b53_read8(dev, B53_CTRL_PAGE, B53_RGMII_CTRL_P(port), &amp;rgmii_ctrl);</div><div class='add'>+	rgmii_ctrl &amp;= ~(RGMII_CTRL_DLL_RXC | RGMII_CTRL_DLL_TXC);</div><div class='add'>+</div><div class='add'>+	if (is6318_268(dev))</div><div class='add'>+		rgmii_ctrl |= RGMII_CTRL_MII_OVERRIDE;</div><div class='add'>+</div><div class='add'>+	rgmii_ctrl |= RGMII_CTRL_ENABLE_GMII;</div><div class='add'>+</div><div class='add'>+	b53_write8(dev, B53_CTRL_PAGE, B53_RGMII_CTRL_P(port), rgmii_ctrl);</div><div class='add'>+</div><div class='add'>+	dev_dbg(ds-&gt;dev, "Configured port %d for %s\n", port,</div><div class='add'>+		phy_modes(interface));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_adjust_531x5_rgmii(struct dsa_switch *ds, int port,</div><div class='add'>+				   phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+	u8 rgmii_ctrl = 0, off;</div><div class='add'>+</div><div class='add'>+	if (port == dev-&gt;imp_port)</div><div class='add'>+		off = B53_RGMII_CTRL_IMP;</div><div class='add'>+	else</div><div class='add'>+		off = B53_RGMII_CTRL_P(port);</div><div class='add'>+</div><div class='add'>+	/* Configure the port RGMII clock delay by DLL disabled and</div><div class='add'>+	 * tx_clk aligned timing (restoring to reset defaults)</div><div class='add'>+	 */</div><div class='add'>+	b53_read8(dev, B53_CTRL_PAGE, off, &amp;rgmii_ctrl);</div><div class='add'>+	rgmii_ctrl &amp;= ~(RGMII_CTRL_DLL_RXC | RGMII_CTRL_DLL_TXC);</div><div class='add'>+</div><div class='add'>+	/* PHY_INTERFACE_MODE_RGMII_TXID means TX internal delay, make</div><div class='add'>+	 * sure that we enable the port TX clock internal delay to</div><div class='add'>+	 * account for this internal delay that is inserted, otherwise</div><div class='add'>+	 * the switch won't be able to receive correctly.</div><div class='add'>+	 *</div><div class='add'>+	 * PHY_INTERFACE_MODE_RGMII means that we are not introducing</div><div class='add'>+	 * any delay neither on transmission nor reception, so the</div><div class='add'>+	 * BCM53125 must also be configured accordingly to account for</div><div class='add'>+	 * the lack of delay and introduce</div><div class='add'>+	 *</div><div class='add'>+	 * The BCM53125 switch has its RX clock and TX clock control</div><div class='add'>+	 * swapped, hence the reason why we modify the TX clock path in</div><div class='add'>+	 * the "RGMII" case</div><div class='add'>+	 */</div><div class='add'>+	if (interface == PHY_INTERFACE_MODE_RGMII_TXID)</div><div class='add'>+		rgmii_ctrl |= RGMII_CTRL_DLL_TXC;</div><div class='add'>+	if (interface == PHY_INTERFACE_MODE_RGMII)</div><div class='add'>+		rgmii_ctrl |= RGMII_CTRL_DLL_TXC | RGMII_CTRL_DLL_RXC;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;chip_id != BCM53115_DEVICE_ID)</div><div class='add'>+		rgmii_ctrl |= RGMII_CTRL_TIMING_SEL;</div><div class='add'>+</div><div class='add'>+	b53_write8(dev, B53_CTRL_PAGE, off, rgmii_ctrl);</div><div class='add'>+</div><div class='add'>+	dev_info(ds-&gt;dev, "Configured port %d for %s\n", port,</div><div class='add'>+		 phy_modes(interface));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_adjust_5325_mii(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+	u8 reg = 0;</div><div class='add'>+</div><div class='add'>+	b53_read8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,</div><div class='add'>+		  &amp;reg);</div><div class='add'>+</div><div class='add'>+	/* reverse mii needs to be enabled */</div><div class='add'>+	if (!(reg &amp; PORT_OVERRIDE_RV_MII_25)) {</div><div class='add'>+		b53_write8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,</div><div class='add'>+			   reg | PORT_OVERRIDE_RV_MII_25);</div><div class='add'>+		b53_read8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,</div><div class='add'>+			  &amp;reg);</div><div class='add'>+</div><div class='add'>+		if (!(reg &amp; PORT_OVERRIDE_RV_MII_25)) {</div><div class='add'>+			dev_err(ds-&gt;dev,</div><div class='add'>+				"Failed to enable reverse MII mode\n");</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void b53_port_event(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+	bool link;</div><div class='add'>+	u16 sts;</div><div class='add'>+</div><div class='add'>+	b53_read16(dev, B53_STAT_PAGE, B53_LINK_STAT, &amp;sts);</div><div class='add'>+	link = !!(sts &amp; BIT(port));</div><div class='add'>+	dsa_port_phylink_mac_change(ds, port, link);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_port_event);</div><div class='add'>+</div><div class='add'>+static void b53_phylink_get_caps(struct dsa_switch *ds, int port,</div><div class='add'>+				 struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	/* Internal ports need GMII for PHYLIB */</div><div class='add'>+	__set_bit(PHY_INTERFACE_MODE_GMII, config-&gt;supported_interfaces);</div><div class='add'>+</div><div class='add'>+	/* These switches appear to support MII and RevMII too, but beyond</div><div class='add'>+	 * this, the code gives very few clues. FIXME: We probably need more</div><div class='add'>+	 * interface modes here.</div><div class='add'>+	 *</div><div class='add'>+	 * According to b53_srab_mux_init(), ports 3..5 can support:</div><div class='add'>+	 *  SGMII, MII, GMII, RGMII or INTERNAL depending on the MUX setting.</div><div class='add'>+	 * However, the interface mode read from the MUX configuration is</div><div class='add'>+	 * not passed back to DSA, so phylink uses NA.</div><div class='add'>+	 * DT can specify RGMII for ports 0, 1.</div><div class='add'>+	 * For MDIO, port 8 can be RGMII_TXID.</div><div class='add'>+	 */</div><div class='add'>+	__set_bit(PHY_INTERFACE_MODE_MII, config-&gt;supported_interfaces);</div><div class='add'>+	__set_bit(PHY_INTERFACE_MODE_REVMII, config-&gt;supported_interfaces);</div><div class='add'>+</div><div class='add'>+	/* BCM63xx RGMII ports support RGMII */</div><div class='add'>+	if (is63xx(dev) &amp;&amp; in_range(port, B53_63XX_RGMII0, 4))</div><div class='add'>+		phy_interface_set_rgmii(config-&gt;supported_interfaces);</div><div class='add'>+</div><div class='add'>+	config-&gt;mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |</div><div class='add'>+		MAC_10 | MAC_100;</div><div class='add'>+</div><div class='add'>+	/* 5325/5365 are not capable of gigabit speeds, everything else is.</div><div class='add'>+	 * Note: the original code also exclulded Gigagbit for MII, RevMII</div><div class='add'>+	 * and 802.3z modes. MII and RevMII are not able to work above 100M,</div><div class='add'>+	 * so will be excluded by the generic validator implementation.</div><div class='add'>+	 * However, the exclusion of Gigabit for 802.3z just seems wrong.</div><div class='add'>+	 */</div><div class='add'>+	if (!(is5325(dev) || is5365(dev)))</div><div class='add'>+		config-&gt;mac_capabilities |= MAC_1000;</div><div class='add'>+</div><div class='add'>+	/* Get the implementation specific capabilities */</div><div class='add'>+	if (dev-&gt;ops-&gt;phylink_get_caps)</div><div class='add'>+		dev-&gt;ops-&gt;phylink_get_caps(dev, port, config);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct phylink_pcs *b53_phylink_mac_select_pcs(struct phylink_config *config,</div><div class='add'>+						      phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct b53_device *dev = dp-&gt;ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (!dev-&gt;ops-&gt;phylink_mac_select_pcs)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	return dev-&gt;ops-&gt;phylink_mac_select_pcs(dev, dp-&gt;index, interface);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_phylink_mac_config(struct phylink_config *config,</div><div class='add'>+				   unsigned int mode,</div><div class='add'>+				   const struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	phy_interface_t interface = state-&gt;interface;</div><div class='add'>+	struct dsa_switch *ds = dp-&gt;ds;</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+</div><div class='add'>+	if (is63xx(dev) &amp;&amp; in_range(port, B53_63XX_RGMII0, 4))</div><div class='add'>+		b53_adjust_63xx_rgmii(ds, port, interface);</div><div class='add'>+</div><div class='add'>+	if (mode == MLO_AN_FIXED) {</div><div class='add'>+		if (is531x5(dev) &amp;&amp; phy_interface_mode_is_rgmii(interface))</div><div class='add'>+			b53_adjust_531x5_rgmii(ds, port, interface);</div><div class='add'>+</div><div class='add'>+		/* configure MII port if necessary */</div><div class='add'>+		if (is5325(dev))</div><div class='add'>+			b53_adjust_5325_mii(ds, port);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_phylink_mac_link_down(struct phylink_config *config,</div><div class='add'>+				      unsigned int mode,</div><div class='add'>+				      phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct b53_device *dev = dp-&gt;ds-&gt;priv;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+</div><div class='add'>+	if (mode == MLO_AN_PHY) {</div><div class='add'>+		if (is63xx(dev) &amp;&amp; in_range(port, B53_63XX_RGMII0, 4))</div><div class='add'>+			b53_force_link(dev, port, false);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (mode == MLO_AN_FIXED) {</div><div class='add'>+		b53_force_link(dev, port, false);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (phy_interface_mode_is_8023z(interface) &amp;&amp;</div><div class='add'>+	    dev-&gt;ops-&gt;serdes_link_set)</div><div class='add'>+		dev-&gt;ops-&gt;serdes_link_set(dev, port, mode, interface, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_phylink_mac_link_up(struct phylink_config *config,</div><div class='add'>+				    struct phy_device *phydev,</div><div class='add'>+				    unsigned int mode,</div><div class='add'>+				    phy_interface_t interface,</div><div class='add'>+				    int speed, int duplex,</div><div class='add'>+				    bool tx_pause, bool rx_pause)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct dsa_switch *ds = dp-&gt;ds;</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+	struct ethtool_keee *p = &amp;dev-&gt;ports[dp-&gt;index].eee;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+</div><div class='add'>+	if (mode == MLO_AN_PHY) {</div><div class='add'>+		/* Re-negotiate EEE if it was enabled already */</div><div class='add'>+		p-&gt;eee_enabled = b53_eee_init(ds, port, phydev);</div><div class='add'>+</div><div class='add'>+		if (is63xx(dev) &amp;&amp; in_range(port, B53_63XX_RGMII0, 4)) {</div><div class='add'>+			b53_force_port_config(dev, port, speed, duplex,</div><div class='add'>+					      tx_pause, rx_pause);</div><div class='add'>+			b53_force_link(dev, port, true);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (mode == MLO_AN_FIXED) {</div><div class='add'>+		/* Force flow control on BCM5301x's CPU port */</div><div class='add'>+		if (is5301x(dev) &amp;&amp; dsa_is_cpu_port(ds, port))</div><div class='add'>+			tx_pause = rx_pause = true;</div><div class='add'>+</div><div class='add'>+		b53_force_port_config(dev, port, speed, duplex,</div><div class='add'>+				      tx_pause, rx_pause);</div><div class='add'>+		b53_force_link(dev, port, true);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (phy_interface_mode_is_8023z(interface) &amp;&amp;</div><div class='add'>+	    dev-&gt;ops-&gt;serdes_link_set)</div><div class='add'>+		dev-&gt;ops-&gt;serdes_link_set(dev, port, mode, interface, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int b53_vlan_filtering(struct dsa_switch *ds, int port, bool vlan_filtering,</div><div class='add'>+		       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;vlan_filtering != vlan_filtering) {</div><div class='add'>+		dev-&gt;vlan_filtering = vlan_filtering;</div><div class='add'>+		b53_apply_config(dev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_vlan_filtering);</div><div class='add'>+</div><div class='add'>+static int b53_vlan_prepare(struct dsa_switch *ds, int port,</div><div class='add'>+			    const struct switchdev_obj_port_vlan *vlan)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	/* Port 7 on 7278 connects to the ASP's UniMAC which is not capable of</div><div class='add'>+	 * receiving VLAN tagged frames at all, we can still allow the port to</div><div class='add'>+	 * be configured for egress untagged.</div><div class='add'>+	 */</div><div class='add'>+	if (dev-&gt;chip_id == BCM7278_DEVICE_ID &amp;&amp; port == 7 &amp;&amp;</div><div class='add'>+	    !(vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_UNTAGGED))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (vlan-&gt;vid &gt;= dev-&gt;num_vlans)</div><div class='add'>+		return -ERANGE;</div><div class='add'>+</div><div class='add'>+	b53_enable_vlan(dev, port, true, dev-&gt;vlan_filtering);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int b53_vlan_add(struct dsa_switch *ds, int port,</div><div class='add'>+		 const struct switchdev_obj_port_vlan *vlan,</div><div class='add'>+		 struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+	bool untagged = vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_UNTAGGED;</div><div class='add'>+	bool pvid = vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_PVID;</div><div class='add'>+	struct b53_vlan *vl;</div><div class='add'>+	u16 old_pvid, new_pvid;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = b53_vlan_prepare(ds, port, vlan);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (vlan-&gt;vid == 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	old_pvid = dev-&gt;ports[port].pvid;</div><div class='add'>+	if (pvid)</div><div class='add'>+		new_pvid = vlan-&gt;vid;</div><div class='add'>+	else if (!pvid &amp;&amp; vlan-&gt;vid == old_pvid)</div><div class='add'>+		new_pvid = b53_default_pvid(dev);</div><div class='add'>+	else</div><div class='add'>+		new_pvid = old_pvid;</div><div class='add'>+	dev-&gt;ports[port].pvid = new_pvid;</div><div class='add'>+</div><div class='add'>+	vl = &amp;dev-&gt;vlans[vlan-&gt;vid];</div><div class='add'>+</div><div class='add'>+	if (dsa_is_cpu_port(ds, port))</div><div class='add'>+		untagged = false;</div><div class='add'>+</div><div class='add'>+	vl-&gt;members |= BIT(port);</div><div class='add'>+	if (untagged &amp;&amp; !b53_vlan_port_needs_forced_tagged(ds, port))</div><div class='add'>+		vl-&gt;untag |= BIT(port);</div><div class='add'>+	else</div><div class='add'>+		vl-&gt;untag &amp;= ~BIT(port);</div><div class='add'>+</div><div class='add'>+	if (!dev-&gt;vlan_filtering)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	b53_set_vlan_entry(dev, vlan-&gt;vid, vl);</div><div class='add'>+	b53_fast_age_vlan(dev, vlan-&gt;vid);</div><div class='add'>+</div><div class='add'>+	if (!dsa_is_cpu_port(ds, port) &amp;&amp; new_pvid != old_pvid) {</div><div class='add'>+		b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_PORT_DEF_TAG(port),</div><div class='add'>+			    new_pvid);</div><div class='add'>+		b53_fast_age_vlan(dev, old_pvid);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_vlan_add);</div><div class='add'>+</div><div class='add'>+int b53_vlan_del(struct dsa_switch *ds, int port,</div><div class='add'>+		 const struct switchdev_obj_port_vlan *vlan)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+	bool untagged = vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_UNTAGGED;</div><div class='add'>+	struct b53_vlan *vl;</div><div class='add'>+	u16 pvid;</div><div class='add'>+</div><div class='add'>+	if (vlan-&gt;vid == 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	pvid = dev-&gt;ports[port].pvid;</div><div class='add'>+</div><div class='add'>+	vl = &amp;dev-&gt;vlans[vlan-&gt;vid];</div><div class='add'>+</div><div class='add'>+	vl-&gt;members &amp;= ~BIT(port);</div><div class='add'>+</div><div class='add'>+	if (pvid == vlan-&gt;vid)</div><div class='add'>+		pvid = b53_default_pvid(dev);</div><div class='add'>+	dev-&gt;ports[port].pvid = pvid;</div><div class='add'>+</div><div class='add'>+	if (untagged &amp;&amp; !b53_vlan_port_needs_forced_tagged(ds, port))</div><div class='add'>+		vl-&gt;untag &amp;= ~(BIT(port));</div><div class='add'>+</div><div class='add'>+	if (!dev-&gt;vlan_filtering)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	b53_set_vlan_entry(dev, vlan-&gt;vid, vl);</div><div class='add'>+	b53_fast_age_vlan(dev, vlan-&gt;vid);</div><div class='add'>+</div><div class='add'>+	b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_PORT_DEF_TAG(port), pvid);</div><div class='add'>+	b53_fast_age_vlan(dev, pvid);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_vlan_del);</div><div class='add'>+</div><div class='add'>+/* Address Resolution Logic routines. Caller must hold &amp;dev-&gt;arl_mutex. */</div><div class='add'>+static int b53_arl_op_wait(struct b53_device *dev)</div><div class='add'>+{</div><div class='add'>+	unsigned int timeout = 10;</div><div class='add'>+	u8 reg;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		b53_read8(dev, B53_ARLIO_PAGE, B53_ARLTBL_RW_CTRL, &amp;reg);</div><div class='add'>+		if (!(reg &amp; ARLTBL_START_DONE))</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		usleep_range(1000, 2000);</div><div class='add'>+	} while (timeout--);</div><div class='add'>+</div><div class='add'>+	dev_warn(dev-&gt;dev, "timeout waiting for ARL to finish: 0x%02x\n", reg);</div><div class='add'>+</div><div class='add'>+	return -ETIMEDOUT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_arl_rw_op(struct b53_device *dev, unsigned int op)</div><div class='add'>+{</div><div class='add'>+	u8 reg;</div><div class='add'>+</div><div class='add'>+	if (op &gt; ARLTBL_RW)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	b53_read8(dev, B53_ARLIO_PAGE, B53_ARLTBL_RW_CTRL, &amp;reg);</div><div class='add'>+	reg |= ARLTBL_START_DONE;</div><div class='add'>+	if (op)</div><div class='add'>+		reg |= ARLTBL_RW;</div><div class='add'>+	else</div><div class='add'>+		reg &amp;= ~ARLTBL_RW;</div><div class='add'>+	if (dev-&gt;vlan_enabled)</div><div class='add'>+		reg &amp;= ~ARLTBL_IVL_SVL_SELECT;</div><div class='add'>+	else</div><div class='add'>+		reg |= ARLTBL_IVL_SVL_SELECT;</div><div class='add'>+	b53_write8(dev, B53_ARLIO_PAGE, B53_ARLTBL_RW_CTRL, reg);</div><div class='add'>+</div><div class='add'>+	return b53_arl_op_wait(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_arl_read_entry_25(struct b53_device *dev,</div><div class='add'>+				  struct b53_arl_entry *ent, u8 idx)</div><div class='add'>+{</div><div class='add'>+	u8 vid_entry;</div><div class='add'>+	u64 mac_vid;</div><div class='add'>+</div><div class='add'>+	b53_read8(dev, B53_ARLIO_PAGE, B53_ARLTBL_VID_ENTRY_25(idx),</div><div class='add'>+		  &amp;vid_entry);</div><div class='add'>+	b53_read64(dev, B53_ARLIO_PAGE, B53_ARLTBL_MAC_VID_ENTRY(idx),</div><div class='add'>+		   &amp;mac_vid);</div><div class='add'>+	b53_arl_to_entry_25(ent, mac_vid, vid_entry);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_arl_write_entry_25(struct b53_device *dev,</div><div class='add'>+				   const struct b53_arl_entry *ent, u8 idx)</div><div class='add'>+{</div><div class='add'>+	u8 vid_entry;</div><div class='add'>+	u64 mac_vid;</div><div class='add'>+</div><div class='add'>+	b53_arl_from_entry_25(&amp;mac_vid, &amp;vid_entry, ent);</div><div class='add'>+	b53_write8(dev, B53_ARLIO_PAGE, B53_ARLTBL_VID_ENTRY_25(idx), vid_entry);</div><div class='add'>+	b53_write64(dev, B53_ARLIO_PAGE, B53_ARLTBL_MAC_VID_ENTRY(idx),</div><div class='add'>+		    mac_vid);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_arl_read_entry_89(struct b53_device *dev,</div><div class='add'>+				  struct b53_arl_entry *ent, u8 idx)</div><div class='add'>+{</div><div class='add'>+	u64 mac_vid;</div><div class='add'>+	u16 fwd_entry;</div><div class='add'>+</div><div class='add'>+	b53_read64(dev, B53_ARLIO_PAGE, B53_ARLTBL_MAC_VID_ENTRY(idx),</div><div class='add'>+		   &amp;mac_vid);</div><div class='add'>+	b53_read16(dev, B53_ARLIO_PAGE, B53_ARLTBL_DATA_ENTRY(idx), &amp;fwd_entry);</div><div class='add'>+	b53_arl_to_entry_89(ent, mac_vid, fwd_entry);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_arl_write_entry_89(struct b53_device *dev,</div><div class='add'>+				   const struct b53_arl_entry *ent, u8 idx)</div><div class='add'>+{</div><div class='add'>+	u32 fwd_entry;</div><div class='add'>+	u64 mac_vid;</div><div class='add'>+</div><div class='add'>+	b53_arl_from_entry_89(&amp;mac_vid, &amp;fwd_entry, ent);</div><div class='add'>+	b53_write64(dev, B53_ARLIO_PAGE,</div><div class='add'>+		    B53_ARLTBL_MAC_VID_ENTRY(idx), mac_vid);</div><div class='add'>+	b53_write16(dev, B53_ARLIO_PAGE,</div><div class='add'>+		    B53_ARLTBL_DATA_ENTRY(idx), fwd_entry);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_arl_read_entry_95(struct b53_device *dev,</div><div class='add'>+				  struct b53_arl_entry *ent, u8 idx)</div><div class='add'>+{</div><div class='add'>+	u32 fwd_entry;</div><div class='add'>+	u64 mac_vid;</div><div class='add'>+</div><div class='add'>+	b53_read64(dev, B53_ARLIO_PAGE, B53_ARLTBL_MAC_VID_ENTRY(idx),</div><div class='add'>+		   &amp;mac_vid);</div><div class='add'>+	b53_read32(dev, B53_ARLIO_PAGE, B53_ARLTBL_DATA_ENTRY(idx), &amp;fwd_entry);</div><div class='add'>+	b53_arl_to_entry(ent, mac_vid, fwd_entry);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_arl_write_entry_95(struct b53_device *dev,</div><div class='add'>+				   const struct b53_arl_entry *ent, u8 idx)</div><div class='add'>+{</div><div class='add'>+	u32 fwd_entry;</div><div class='add'>+	u64 mac_vid;</div><div class='add'>+</div><div class='add'>+	b53_arl_from_entry(&amp;mac_vid, &amp;fwd_entry, ent);</div><div class='add'>+	b53_write64(dev, B53_ARLIO_PAGE, B53_ARLTBL_MAC_VID_ENTRY(idx),</div><div class='add'>+		    mac_vid);</div><div class='add'>+	b53_write32(dev, B53_ARLIO_PAGE, B53_ARLTBL_DATA_ENTRY(idx),</div><div class='add'>+		    fwd_entry);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_arl_read(struct b53_device *dev, const u8 *mac,</div><div class='add'>+			u16 vid, struct b53_arl_entry *ent, u8 *idx)</div><div class='add'>+{</div><div class='add'>+	DECLARE_BITMAP(free_bins, B53_ARLTBL_MAX_BIN_ENTRIES);</div><div class='add'>+	unsigned int i;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = b53_arl_op_wait(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	bitmap_zero(free_bins, dev-&gt;num_arl_bins);</div><div class='add'>+</div><div class='add'>+	/* Read the bins */</div><div class='add'>+	for (i = 0; i &lt; dev-&gt;num_arl_bins; i++) {</div><div class='add'>+		b53_arl_read_entry(dev, ent, i);</div><div class='add'>+</div><div class='add'>+		if (!ent-&gt;is_valid) {</div><div class='add'>+			set_bit(i, free_bins);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+		if (!ether_addr_equal(ent-&gt;mac, mac))</div><div class='add'>+			continue;</div><div class='add'>+		if (dev-&gt;vlan_enabled &amp;&amp; ent-&gt;vid != vid)</div><div class='add'>+			continue;</div><div class='add'>+		*idx = i;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*idx = find_first_bit(free_bins, dev-&gt;num_arl_bins);</div><div class='add'>+	return *idx &gt;= dev-&gt;num_arl_bins ? -ENOSPC : -ENOENT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_arl_op(struct b53_device *dev, int op, int port,</div><div class='add'>+		      const unsigned char *addr, u16 vid, bool is_valid)</div><div class='add'>+{</div><div class='add'>+	struct b53_arl_entry ent;</div><div class='add'>+	u8 idx = 0;</div><div class='add'>+	u64 mac;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Convert the array into a 64-bit MAC */</div><div class='add'>+	mac = ether_addr_to_u64(addr);</div><div class='add'>+</div><div class='add'>+	/* Perform a read for the given MAC and VID */</div><div class='add'>+	b53_write48(dev, B53_ARLIO_PAGE, B53_MAC_ADDR_IDX, mac);</div><div class='add'>+	if (!is5325m(dev)) {</div><div class='add'>+		if (is5325(dev) || is5365(dev))</div><div class='add'>+			b53_write8(dev, B53_ARLIO_PAGE, B53_VLAN_ID_IDX, vid);</div><div class='add'>+		else</div><div class='add'>+			b53_write16(dev, B53_ARLIO_PAGE, B53_VLAN_ID_IDX, vid);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Issue a read operation for this MAC */</div><div class='add'>+	ret = b53_arl_rw_op(dev, 1);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = b53_arl_read(dev, addr, vid, &amp;ent, &amp;idx);</div><div class='add'>+</div><div class='add'>+	/* If this is a read, just finish now */</div><div class='add'>+	if (op)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	switch (ret) {</div><div class='add'>+	case -ETIMEDOUT:</div><div class='add'>+		return ret;</div><div class='add'>+	case -ENOSPC:</div><div class='add'>+		dev_dbg(dev-&gt;dev, "{%pM,%.4d} no space left in ARL\n",</div><div class='add'>+			addr, vid);</div><div class='add'>+		return is_valid ? ret : 0;</div><div class='add'>+	case -ENOENT:</div><div class='add'>+		/* We could not find a matching MAC, so reset to a new entry */</div><div class='add'>+		dev_dbg(dev-&gt;dev, "{%pM,%.4d} not found, using idx: %d\n",</div><div class='add'>+			addr, vid, idx);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_dbg(dev-&gt;dev, "{%pM,%.4d} found, using idx: %d\n",</div><div class='add'>+			addr, vid, idx);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* For multicast address, the port is a bitmask and the validity</div><div class='add'>+	 * is determined by having at least one port being still active</div><div class='add'>+	 */</div><div class='add'>+	if (!is_multicast_ether_addr(addr)) {</div><div class='add'>+		ent.port = port;</div><div class='add'>+		ent.is_valid = is_valid;</div><div class='add'>+	} else {</div><div class='add'>+		if (is_valid)</div><div class='add'>+			ent.port |= BIT(port);</div><div class='add'>+		else</div><div class='add'>+			ent.port &amp;= ~BIT(port);</div><div class='add'>+</div><div class='add'>+		ent.is_valid = !!(ent.port);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ent.vid = vid;</div><div class='add'>+	ent.is_static = true;</div><div class='add'>+	ent.is_age = false;</div><div class='add'>+	memcpy(ent.mac, addr, ETH_ALEN);</div><div class='add'>+	b53_arl_write_entry(dev, &amp;ent, idx);</div><div class='add'>+</div><div class='add'>+	return b53_arl_rw_op(dev, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int b53_fdb_add(struct dsa_switch *ds, int port,</div><div class='add'>+		const unsigned char *addr, u16 vid,</div><div class='add'>+		struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *priv = ds-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;arl_mutex);</div><div class='add'>+	ret = b53_arl_op(priv, 0, port, addr, vid, true);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;arl_mutex);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_fdb_add);</div><div class='add'>+</div><div class='add'>+int b53_fdb_del(struct dsa_switch *ds, int port,</div><div class='add'>+		const unsigned char *addr, u16 vid,</div><div class='add'>+		struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *priv = ds-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;arl_mutex);</div><div class='add'>+	ret = b53_arl_op(priv, 0, port, addr, vid, false);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;arl_mutex);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_fdb_del);</div><div class='add'>+</div><div class='add'>+static void b53_read_arl_srch_ctl(struct b53_device *dev, u8 *val)</div><div class='add'>+{</div><div class='add'>+	u8 offset;</div><div class='add'>+</div><div class='add'>+	if (is5325(dev) || is5365(dev))</div><div class='add'>+		offset = B53_ARL_SRCH_CTL_25;</div><div class='add'>+	else if (dev-&gt;chip_id == BCM5389_DEVICE_ID || is5397_98(dev) ||</div><div class='add'>+		 is63xx(dev))</div><div class='add'>+		offset = B53_ARL_SRCH_CTL_89;</div><div class='add'>+	else</div><div class='add'>+		offset = B53_ARL_SRCH_CTL;</div><div class='add'>+</div><div class='add'>+	if (is63xx(dev)) {</div><div class='add'>+		u16 val16;</div><div class='add'>+</div><div class='add'>+		b53_read16(dev, B53_ARLIO_PAGE, offset, &amp;val16);</div><div class='add'>+		*val = val16 &amp; 0xff;</div><div class='add'>+	} else {</div><div class='add'>+		b53_read8(dev, B53_ARLIO_PAGE, offset, val);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_write_arl_srch_ctl(struct b53_device *dev, u8 val)</div><div class='add'>+{</div><div class='add'>+	u8 offset;</div><div class='add'>+</div><div class='add'>+	if (is5325(dev) || is5365(dev))</div><div class='add'>+		offset = B53_ARL_SRCH_CTL_25;</div><div class='add'>+	else if (dev-&gt;chip_id == BCM5389_DEVICE_ID || is5397_98(dev) ||</div><div class='add'>+		 is63xx(dev))</div><div class='add'>+		offset = B53_ARL_SRCH_CTL_89;</div><div class='add'>+	else</div><div class='add'>+		offset = B53_ARL_SRCH_CTL;</div><div class='add'>+</div><div class='add'>+	if (is63xx(dev))</div><div class='add'>+		b53_write16(dev, B53_ARLIO_PAGE, offset, val);</div><div class='add'>+	else</div><div class='add'>+		b53_write8(dev, B53_ARLIO_PAGE, offset, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_arl_search_wait(struct b53_device *dev)</div><div class='add'>+{</div><div class='add'>+	unsigned int timeout = 1000;</div><div class='add'>+	u8 reg;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		b53_read_arl_srch_ctl(dev, &amp;reg);</div><div class='add'>+		if (!(reg &amp; ARL_SRCH_STDN))</div><div class='add'>+			return -ENOENT;</div><div class='add'>+</div><div class='add'>+		if (reg &amp; ARL_SRCH_VLID)</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		usleep_range(1000, 2000);</div><div class='add'>+	} while (timeout--);</div><div class='add'>+</div><div class='add'>+	return -ETIMEDOUT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_arl_search_read_25(struct b53_device *dev, u8 idx,</div><div class='add'>+				   struct b53_arl_entry *ent)</div><div class='add'>+{</div><div class='add'>+	u64 mac_vid;</div><div class='add'>+	u8 ext;</div><div class='add'>+</div><div class='add'>+	b53_read8(dev, B53_ARLIO_PAGE, B53_ARL_SRCH_RSLT_EXT_25, &amp;ext);</div><div class='add'>+	b53_read64(dev, B53_ARLIO_PAGE, B53_ARL_SRCH_RSTL_0_MACVID_25,</div><div class='add'>+		   &amp;mac_vid);</div><div class='add'>+	b53_arl_search_to_entry_25(ent, mac_vid, ext);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_arl_search_read_89(struct b53_device *dev, u8 idx,</div><div class='add'>+				   struct b53_arl_entry *ent)</div><div class='add'>+{</div><div class='add'>+	u16 fwd_entry;</div><div class='add'>+	u64 mac_vid;</div><div class='add'>+</div><div class='add'>+	b53_read64(dev, B53_ARLIO_PAGE, B53_ARL_SRCH_RSLT_MACVID_89,</div><div class='add'>+		   &amp;mac_vid);</div><div class='add'>+	b53_read16(dev, B53_ARLIO_PAGE, B53_ARL_SRCH_RSLT_89, &amp;fwd_entry);</div><div class='add'>+	b53_arl_to_entry_89(ent, mac_vid, fwd_entry);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_arl_search_read_63xx(struct b53_device *dev, u8 idx,</div><div class='add'>+				     struct b53_arl_entry *ent)</div><div class='add'>+{</div><div class='add'>+	u16 fwd_entry;</div><div class='add'>+	u64 mac_vid;</div><div class='add'>+</div><div class='add'>+	b53_read64(dev, B53_ARLIO_PAGE, B53_ARL_SRCH_RSLT_MACVID_63XX,</div><div class='add'>+		   &amp;mac_vid);</div><div class='add'>+	b53_read16(dev, B53_ARLIO_PAGE, B53_ARL_SRCH_RSLT_63XX, &amp;fwd_entry);</div><div class='add'>+	b53_arl_search_to_entry_63xx(ent, mac_vid, fwd_entry);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_arl_search_read_95(struct b53_device *dev, u8 idx,</div><div class='add'>+				   struct b53_arl_entry *ent)</div><div class='add'>+{</div><div class='add'>+	u32 fwd_entry;</div><div class='add'>+	u64 mac_vid;</div><div class='add'>+</div><div class='add'>+	b53_read64(dev, B53_ARLIO_PAGE, B53_ARL_SRCH_RSTL_MACVID(idx),</div><div class='add'>+		   &amp;mac_vid);</div><div class='add'>+	b53_read32(dev, B53_ARLIO_PAGE, B53_ARL_SRCH_RSTL(idx),</div><div class='add'>+		   &amp;fwd_entry);</div><div class='add'>+	b53_arl_to_entry(ent, mac_vid, fwd_entry);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_fdb_copy(int port, const struct b53_arl_entry *ent,</div><div class='add'>+			dsa_fdb_dump_cb_t *cb, void *data)</div><div class='add'>+{</div><div class='add'>+	if (!ent-&gt;is_valid)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (port != ent-&gt;port)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return cb(ent-&gt;mac, ent-&gt;vid, ent-&gt;is_static, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int b53_fdb_dump(struct dsa_switch *ds, int port,</div><div class='add'>+		 dsa_fdb_dump_cb_t *cb, void *data)</div><div class='add'>+{</div><div class='add'>+	unsigned int count = 0, results_per_hit = 1;</div><div class='add'>+	struct b53_device *priv = ds-&gt;priv;</div><div class='add'>+	struct b53_arl_entry results[2];</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;num_arl_bins &gt; 2)</div><div class='add'>+		results_per_hit = 2;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;arl_mutex);</div><div class='add'>+</div><div class='add'>+	/* Start search operation */</div><div class='add'>+	b53_write_arl_srch_ctl(priv, ARL_SRCH_STDN);</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		ret = b53_arl_search_wait(priv);</div><div class='add'>+		if (ret)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		b53_arl_search_read(priv, 0, &amp;results[0]);</div><div class='add'>+		ret = b53_fdb_copy(port, &amp;results[0], cb, data);</div><div class='add'>+		if (ret)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if (results_per_hit == 2) {</div><div class='add'>+			b53_arl_search_read(priv, 1, &amp;results[1]);</div><div class='add'>+			ret = b53_fdb_copy(port, &amp;results[1], cb, data);</div><div class='add'>+			if (ret)</div><div class='add'>+				break;</div><div class='add'>+</div><div class='add'>+			if (!results[0].is_valid &amp;&amp; !results[1].is_valid)</div><div class='add'>+				break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+	} while (count++ &lt; b53_max_arl_entries(priv) / results_per_hit);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;arl_mutex);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_fdb_dump);</div><div class='add'>+</div><div class='add'>+int b53_mdb_add(struct dsa_switch *ds, int port,</div><div class='add'>+		const struct switchdev_obj_port_mdb *mdb,</div><div class='add'>+		struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *priv = ds-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* 5325 and 5365 require some more massaging, but could</div><div class='add'>+	 * be supported eventually</div><div class='add'>+	 */</div><div class='add'>+	if (is5325(priv) || is5365(priv))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;arl_mutex);</div><div class='add'>+	ret = b53_arl_op(priv, 0, port, mdb-&gt;addr, mdb-&gt;vid, true);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;arl_mutex);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_mdb_add);</div><div class='add'>+</div><div class='add'>+int b53_mdb_del(struct dsa_switch *ds, int port,</div><div class='add'>+		const struct switchdev_obj_port_mdb *mdb,</div><div class='add'>+		struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *priv = ds-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;arl_mutex);</div><div class='add'>+	ret = b53_arl_op(priv, 0, port, mdb-&gt;addr, mdb-&gt;vid, false);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;arl_mutex);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(ds-&gt;dev, "failed to delete MDB entry\n");</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_mdb_del);</div><div class='add'>+</div><div class='add'>+int b53_br_join(struct dsa_switch *ds, int port, struct dsa_bridge bridge,</div><div class='add'>+		bool *tx_fwd_offload, struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+	struct b53_vlan *vl;</div><div class='add'>+	s8 cpu_port = dsa_to_port(ds, port)-&gt;cpu_dp-&gt;index;</div><div class='add'>+	u16 pvlan, reg, pvid;</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	/* On 7278, port 7 which connects to the ASP should only receive</div><div class='add'>+	 * traffic from matching CFP rules.</div><div class='add'>+	 */</div><div class='add'>+	if (dev-&gt;chip_id == BCM7278_DEVICE_ID &amp;&amp; port == 7)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	pvid = b53_default_pvid(dev);</div><div class='add'>+	vl = &amp;dev-&gt;vlans[pvid];</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;vlan_filtering) {</div><div class='add'>+		/* Make this port leave the all VLANs join since we will have</div><div class='add'>+		 * proper VLAN entries from now on</div><div class='add'>+		 */</div><div class='add'>+		if (is58xx(dev)) {</div><div class='add'>+			b53_read16(dev, B53_VLAN_PAGE, B53_JOIN_ALL_VLAN_EN,</div><div class='add'>+				   &amp;reg);</div><div class='add'>+			reg &amp;= ~BIT(port);</div><div class='add'>+			if ((reg &amp; BIT(cpu_port)) == BIT(cpu_port))</div><div class='add'>+				reg &amp;= ~BIT(cpu_port);</div><div class='add'>+			b53_write16(dev, B53_VLAN_PAGE, B53_JOIN_ALL_VLAN_EN,</div><div class='add'>+				    reg);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		b53_get_vlan_entry(dev, pvid, vl);</div><div class='add'>+		vl-&gt;members &amp;= ~BIT(port);</div><div class='add'>+		b53_set_vlan_entry(dev, pvid, vl);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	b53_read16(dev, B53_PVLAN_PAGE, B53_PVLAN_PORT_MASK(port), &amp;pvlan);</div><div class='add'>+</div><div class='add'>+	b53_for_each_port(dev, i) {</div><div class='add'>+		if (!dsa_port_offloads_bridge(dsa_to_port(ds, i), &amp;bridge))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* Add this local port to the remote port VLAN control</div><div class='add'>+		 * membership and update the remote port bitmask</div><div class='add'>+		 */</div><div class='add'>+		b53_read16(dev, B53_PVLAN_PAGE, B53_PVLAN_PORT_MASK(i), &amp;reg);</div><div class='add'>+		reg |= BIT(port);</div><div class='add'>+		b53_write16(dev, B53_PVLAN_PAGE, B53_PVLAN_PORT_MASK(i), reg);</div><div class='add'>+		dev-&gt;ports[i].vlan_ctl_mask = reg;</div><div class='add'>+</div><div class='add'>+		pvlan |= BIT(i);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Disable redirection of unknown SA to the CPU port */</div><div class='add'>+	b53_set_eap_mode(dev, port, EAP_MODE_BASIC);</div><div class='add'>+</div><div class='add'>+	/* Configure the local port VLAN control membership to include</div><div class='add'>+	 * remote ports and update the local port bitmask</div><div class='add'>+	 */</div><div class='add'>+	b53_write16(dev, B53_PVLAN_PAGE, B53_PVLAN_PORT_MASK(port), pvlan);</div><div class='add'>+	dev-&gt;ports[port].vlan_ctl_mask = pvlan;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_br_join);</div><div class='add'>+</div><div class='add'>+void b53_br_leave(struct dsa_switch *ds, int port, struct dsa_bridge bridge)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+	struct b53_vlan *vl;</div><div class='add'>+	s8 cpu_port = dsa_to_port(ds, port)-&gt;cpu_dp-&gt;index;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	u16 pvlan, reg, pvid;</div><div class='add'>+</div><div class='add'>+	b53_read16(dev, B53_PVLAN_PAGE, B53_PVLAN_PORT_MASK(port), &amp;pvlan);</div><div class='add'>+</div><div class='add'>+	b53_for_each_port(dev, i) {</div><div class='add'>+		/* Don't touch the remaining ports */</div><div class='add'>+		if (!dsa_port_offloads_bridge(dsa_to_port(ds, i), &amp;bridge))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		b53_read16(dev, B53_PVLAN_PAGE, B53_PVLAN_PORT_MASK(i), &amp;reg);</div><div class='add'>+		reg &amp;= ~BIT(port);</div><div class='add'>+		b53_write16(dev, B53_PVLAN_PAGE, B53_PVLAN_PORT_MASK(i), reg);</div><div class='add'>+		dev-&gt;ports[port].vlan_ctl_mask = reg;</div><div class='add'>+</div><div class='add'>+		/* Prevent self removal to preserve isolation */</div><div class='add'>+		if (port != i)</div><div class='add'>+			pvlan &amp;= ~BIT(i);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Enable redirection of unknown SA to the CPU port */</div><div class='add'>+	b53_set_eap_mode(dev, port, EAP_MODE_SIMPLIFIED);</div><div class='add'>+</div><div class='add'>+	b53_write16(dev, B53_PVLAN_PAGE, B53_PVLAN_PORT_MASK(port), pvlan);</div><div class='add'>+	dev-&gt;ports[port].vlan_ctl_mask = pvlan;</div><div class='add'>+</div><div class='add'>+	pvid = b53_default_pvid(dev);</div><div class='add'>+	vl = &amp;dev-&gt;vlans[pvid];</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;vlan_filtering) {</div><div class='add'>+		/* Make this port join all VLANs without VLAN entries */</div><div class='add'>+		if (is58xx(dev)) {</div><div class='add'>+			b53_read16(dev, B53_VLAN_PAGE, B53_JOIN_ALL_VLAN_EN, &amp;reg);</div><div class='add'>+			reg |= BIT(port);</div><div class='add'>+			if (!(reg &amp; BIT(cpu_port)))</div><div class='add'>+				reg |= BIT(cpu_port);</div><div class='add'>+			b53_write16(dev, B53_VLAN_PAGE, B53_JOIN_ALL_VLAN_EN, reg);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		b53_get_vlan_entry(dev, pvid, vl);</div><div class='add'>+		vl-&gt;members |= BIT(port);</div><div class='add'>+		b53_set_vlan_entry(dev, pvid, vl);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_br_leave);</div><div class='add'>+</div><div class='add'>+void b53_br_set_stp_state(struct dsa_switch *ds, int port, u8 state)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+	u8 hw_state;</div><div class='add'>+	u8 reg;</div><div class='add'>+</div><div class='add'>+	switch (state) {</div><div class='add'>+	case BR_STATE_DISABLED:</div><div class='add'>+		hw_state = PORT_CTRL_DIS_STATE;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_LISTENING:</div><div class='add'>+		hw_state = PORT_CTRL_LISTEN_STATE;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_LEARNING:</div><div class='add'>+		hw_state = PORT_CTRL_LEARN_STATE;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_FORWARDING:</div><div class='add'>+		hw_state = PORT_CTRL_FWD_STATE;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_BLOCKING:</div><div class='add'>+		hw_state = PORT_CTRL_BLOCK_STATE;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(ds-&gt;dev, "invalid STP state: %d\n", state);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	b53_read8(dev, B53_CTRL_PAGE, B53_PORT_CTRL(port), &amp;reg);</div><div class='add'>+	reg &amp;= ~PORT_CTRL_STP_STATE_MASK;</div><div class='add'>+	reg |= hw_state;</div><div class='add'>+	b53_write8(dev, B53_CTRL_PAGE, B53_PORT_CTRL(port), reg);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_br_set_stp_state);</div><div class='add'>+</div><div class='add'>+void b53_br_fast_age(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (b53_fast_age_port(dev, port))</div><div class='add'>+		dev_err(ds-&gt;dev, "fast ageing failed\n");</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_br_fast_age);</div><div class='add'>+</div><div class='add'>+int b53_br_flags_pre(struct dsa_switch *ds, int port,</div><div class='add'>+		     struct switchdev_brport_flags flags,</div><div class='add'>+		     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+	unsigned long mask = (BR_FLOOD | BR_MCAST_FLOOD | BR_ISOLATED);</div><div class='add'>+</div><div class='add'>+	if (!is5325(dev))</div><div class='add'>+		mask |= BR_LEARNING;</div><div class='add'>+</div><div class='add'>+	if (flags.mask &amp; ~mask)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_br_flags_pre);</div><div class='add'>+</div><div class='add'>+int b53_br_flags(struct dsa_switch *ds, int port,</div><div class='add'>+		 struct switchdev_brport_flags flags,</div><div class='add'>+		 struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	if (flags.mask &amp; BR_FLOOD)</div><div class='add'>+		b53_port_set_ucast_flood(ds-&gt;priv, port,</div><div class='add'>+					 !!(flags.val &amp; BR_FLOOD));</div><div class='add'>+	if (flags.mask &amp; BR_MCAST_FLOOD)</div><div class='add'>+		b53_port_set_mcast_flood(ds-&gt;priv, port,</div><div class='add'>+					 !!(flags.val &amp; BR_MCAST_FLOOD));</div><div class='add'>+	if (flags.mask &amp; BR_LEARNING)</div><div class='add'>+		b53_port_set_learning(ds-&gt;priv, port,</div><div class='add'>+				      !!(flags.val &amp; BR_LEARNING));</div><div class='add'>+	if (flags.mask &amp; BR_ISOLATED)</div><div class='add'>+		b53_port_set_isolated(ds-&gt;priv, port,</div><div class='add'>+				      !!(flags.val &amp; BR_ISOLATED));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_br_flags);</div><div class='add'>+</div><div class='add'>+static bool b53_possible_cpu_port(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	/* Broadcom switches will accept enabling Broadcom tags on the</div><div class='add'>+	 * following ports: 5, 7 and 8, any other port is not supported</div><div class='add'>+	 */</div><div class='add'>+	switch (port) {</div><div class='add'>+	case B53_CPU_PORT_25:</div><div class='add'>+	case 7:</div><div class='add'>+	case B53_CPU_PORT:</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool b53_can_enable_brcm_tags(struct dsa_switch *ds, int port,</div><div class='add'>+				     enum dsa_tag_protocol tag_protocol)</div><div class='add'>+{</div><div class='add'>+	bool ret = b53_possible_cpu_port(ds, port);</div><div class='add'>+</div><div class='add'>+	if (!ret) {</div><div class='add'>+		dev_warn(ds-&gt;dev, "Port %d is not Broadcom tag capable\n",</div><div class='add'>+			 port);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (tag_protocol) {</div><div class='add'>+	case DSA_TAG_PROTO_BRCM:</div><div class='add'>+	case DSA_TAG_PROTO_BRCM_PREPEND:</div><div class='add'>+		dev_warn(ds-&gt;dev,</div><div class='add'>+			 "Port %d is stacked to Broadcom tag switch\n", port);</div><div class='add'>+		ret = false;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = true;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+enum dsa_tag_protocol b53_get_tag_protocol(struct dsa_switch *ds, int port,</div><div class='add'>+					   enum dsa_tag_protocol mprot)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (!b53_can_enable_brcm_tags(ds, port, mprot)) {</div><div class='add'>+		dev-&gt;tag_protocol = DSA_TAG_PROTO_NONE;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Older models require different 6 byte tags */</div><div class='add'>+	if (is5325(dev) || is5365(dev)) {</div><div class='add'>+		dev-&gt;tag_protocol = DSA_TAG_PROTO_BRCM_LEGACY_FCS;</div><div class='add'>+		goto out;</div><div class='add'>+	} else if (is63xx(dev)) {</div><div class='add'>+		dev-&gt;tag_protocol = DSA_TAG_PROTO_BRCM_LEGACY;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Broadcom BCM58xx chips have a flow accelerator on Port 8</div><div class='add'>+	 * which requires us to use the prepended Broadcom tag type</div><div class='add'>+	 */</div><div class='add'>+	if (dev-&gt;chip_id == BCM58XX_DEVICE_ID &amp;&amp; port == B53_CPU_PORT) {</div><div class='add'>+		dev-&gt;tag_protocol = DSA_TAG_PROTO_BRCM_PREPEND;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev-&gt;tag_protocol = DSA_TAG_PROTO_BRCM;</div><div class='add'>+out:</div><div class='add'>+	return dev-&gt;tag_protocol;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_get_tag_protocol);</div><div class='add'>+</div><div class='add'>+int b53_mirror_add(struct dsa_switch *ds, int port,</div><div class='add'>+		   struct dsa_mall_mirror_tc_entry *mirror, bool ingress,</div><div class='add'>+		   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+	u16 reg, loc;</div><div class='add'>+</div><div class='add'>+	if (ingress)</div><div class='add'>+		loc = B53_IG_MIR_CTL;</div><div class='add'>+	else</div><div class='add'>+		loc = B53_EG_MIR_CTL;</div><div class='add'>+</div><div class='add'>+	b53_read16(dev, B53_MGMT_PAGE, loc, &amp;reg);</div><div class='add'>+	reg |= BIT(port);</div><div class='add'>+	b53_write16(dev, B53_MGMT_PAGE, loc, reg);</div><div class='add'>+</div><div class='add'>+	b53_read16(dev, B53_MGMT_PAGE, B53_MIR_CAP_CTL, &amp;reg);</div><div class='add'>+	reg &amp;= ~CAP_PORT_MASK;</div><div class='add'>+	reg |= mirror-&gt;to_local_port;</div><div class='add'>+	reg |= MIRROR_EN;</div><div class='add'>+	b53_write16(dev, B53_MGMT_PAGE, B53_MIR_CAP_CTL, reg);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_mirror_add);</div><div class='add'>+</div><div class='add'>+void b53_mirror_del(struct dsa_switch *ds, int port,</div><div class='add'>+		    struct dsa_mall_mirror_tc_entry *mirror)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+	bool loc_disable = false, other_loc_disable = false;</div><div class='add'>+	u16 reg, loc;</div><div class='add'>+</div><div class='add'>+	if (mirror-&gt;ingress)</div><div class='add'>+		loc = B53_IG_MIR_CTL;</div><div class='add'>+	else</div><div class='add'>+		loc = B53_EG_MIR_CTL;</div><div class='add'>+</div><div class='add'>+	/* Update the desired ingress/egress register */</div><div class='add'>+	b53_read16(dev, B53_MGMT_PAGE, loc, &amp;reg);</div><div class='add'>+	reg &amp;= ~BIT(port);</div><div class='add'>+	if (!(reg &amp; MIRROR_MASK))</div><div class='add'>+		loc_disable = true;</div><div class='add'>+	b53_write16(dev, B53_MGMT_PAGE, loc, reg);</div><div class='add'>+</div><div class='add'>+	/* Now look at the other one to know if we can disable mirroring</div><div class='add'>+	 * entirely</div><div class='add'>+	 */</div><div class='add'>+	if (mirror-&gt;ingress)</div><div class='add'>+		b53_read16(dev, B53_MGMT_PAGE, B53_EG_MIR_CTL, &amp;reg);</div><div class='add'>+	else</div><div class='add'>+		b53_read16(dev, B53_MGMT_PAGE, B53_IG_MIR_CTL, &amp;reg);</div><div class='add'>+	if (!(reg &amp; MIRROR_MASK))</div><div class='add'>+		other_loc_disable = true;</div><div class='add'>+</div><div class='add'>+	b53_read16(dev, B53_MGMT_PAGE, B53_MIR_CAP_CTL, &amp;reg);</div><div class='add'>+	/* Both no longer have ports, let's disable mirroring */</div><div class='add'>+	if (loc_disable &amp;&amp; other_loc_disable) {</div><div class='add'>+		reg &amp;= ~MIRROR_EN;</div><div class='add'>+		reg &amp;= ~mirror-&gt;to_local_port;</div><div class='add'>+	}</div><div class='add'>+	b53_write16(dev, B53_MGMT_PAGE, B53_MIR_CAP_CTL, reg);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_mirror_del);</div><div class='add'>+</div><div class='add'>+/* Returns 0 if EEE was not enabled, or 1 otherwise</div><div class='add'>+ */</div><div class='add'>+int b53_eee_init(struct dsa_switch *ds, int port, struct phy_device *phy)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!b53_support_eee(ds, port))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ret = phy_init_eee(phy, false);</div><div class='add'>+	if (ret)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	b53_eee_enable_set(ds, port, true);</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_eee_init);</div><div class='add'>+</div><div class='add'>+bool b53_support_eee(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return !is5325(dev) &amp;&amp; !is5365(dev) &amp;&amp; !is63xx(dev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_support_eee);</div><div class='add'>+</div><div class='add'>+int b53_set_mac_eee(struct dsa_switch *ds, int port, struct ethtool_keee *e)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+	struct ethtool_keee *p = &amp;dev-&gt;ports[port].eee;</div><div class='add'>+</div><div class='add'>+	p-&gt;eee_enabled = e-&gt;eee_enabled;</div><div class='add'>+	b53_eee_enable_set(ds, port, e-&gt;eee_enabled);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_set_mac_eee);</div><div class='add'>+</div><div class='add'>+static int b53_change_mtu(struct dsa_switch *ds, int port, int mtu)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+	bool enable_jumbo;</div><div class='add'>+	bool allow_10_100;</div><div class='add'>+</div><div class='add'>+	if (is5325(dev) || is5365(dev))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (!dsa_is_cpu_port(ds, port))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	enable_jumbo = (mtu &gt; ETH_DATA_LEN);</div><div class='add'>+	allow_10_100 = !is63xx(dev);</div><div class='add'>+</div><div class='add'>+	return b53_set_jumbo(dev, enable_jumbo, allow_10_100);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_get_max_mtu(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (is5325(dev) || is5365(dev))</div><div class='add'>+		return B53_MAX_MTU_25;</div><div class='add'>+</div><div class='add'>+	return B53_MAX_MTU;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int b53_set_ageing_time(struct dsa_switch *ds, unsigned int msecs)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+	u32 atc;</div><div class='add'>+	int reg;</div><div class='add'>+</div><div class='add'>+	if (is63xx(dev))</div><div class='add'>+		reg = B53_AGING_TIME_CONTROL_63XX;</div><div class='add'>+	else</div><div class='add'>+		reg = B53_AGING_TIME_CONTROL;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;chip_id == BCM53101_DEVICE_ID)</div><div class='add'>+		atc = DIV_ROUND_CLOSEST(msecs, 500);</div><div class='add'>+	else</div><div class='add'>+		atc = DIV_ROUND_CLOSEST(msecs, 1000);</div><div class='add'>+</div><div class='add'>+	if (!is5325(dev) &amp;&amp; !is5365(dev))</div><div class='add'>+		atc |= AGE_CHANGE;</div><div class='add'>+</div><div class='add'>+	b53_write32(dev, B53_MGMT_PAGE, reg, atc);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(b53_set_ageing_time);</div><div class='add'>+</div><div class='add'>+static const struct phylink_mac_ops b53_phylink_mac_ops = {</div><div class='add'>+	.mac_select_pcs	= b53_phylink_mac_select_pcs,</div><div class='add'>+	.mac_config	= b53_phylink_mac_config,</div><div class='add'>+	.mac_link_down	= b53_phylink_mac_link_down,</div><div class='add'>+	.mac_link_up	= b53_phylink_mac_link_up,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct dsa_switch_ops b53_switch_ops = {</div><div class='add'>+	.get_tag_protocol	= b53_get_tag_protocol,</div><div class='add'>+	.setup			= b53_setup,</div><div class='add'>+	.teardown		= b53_teardown,</div><div class='add'>+	.get_strings		= b53_get_strings,</div><div class='add'>+	.get_ethtool_stats	= b53_get_ethtool_stats,</div><div class='add'>+	.get_sset_count		= b53_get_sset_count,</div><div class='add'>+	.get_ethtool_phy_stats	= b53_get_ethtool_phy_stats,</div><div class='add'>+	.phy_read		= b53_phy_read16,</div><div class='add'>+	.phy_write		= b53_phy_write16,</div><div class='add'>+	.phylink_get_caps	= b53_phylink_get_caps,</div><div class='add'>+	.port_setup		= b53_setup_port,</div><div class='add'>+	.port_enable		= b53_enable_port,</div><div class='add'>+	.port_disable		= b53_disable_port,</div><div class='add'>+	.support_eee		= b53_support_eee,</div><div class='add'>+	.set_mac_eee		= b53_set_mac_eee,</div><div class='add'>+	.set_ageing_time	= b53_set_ageing_time,</div><div class='add'>+	.port_bridge_join	= b53_br_join,</div><div class='add'>+	.port_bridge_leave	= b53_br_leave,</div><div class='add'>+	.port_pre_bridge_flags	= b53_br_flags_pre,</div><div class='add'>+	.port_bridge_flags	= b53_br_flags,</div><div class='add'>+	.port_stp_state_set	= b53_br_set_stp_state,</div><div class='add'>+	.port_fast_age		= b53_br_fast_age,</div><div class='add'>+	.port_vlan_filtering	= b53_vlan_filtering,</div><div class='add'>+	.port_vlan_add		= b53_vlan_add,</div><div class='add'>+	.port_vlan_del		= b53_vlan_del,</div><div class='add'>+	.port_fdb_dump		= b53_fdb_dump,</div><div class='add'>+	.port_fdb_add		= b53_fdb_add,</div><div class='add'>+	.port_fdb_del		= b53_fdb_del,</div><div class='add'>+	.port_mirror_add	= b53_mirror_add,</div><div class='add'>+	.port_mirror_del	= b53_mirror_del,</div><div class='add'>+	.port_mdb_add		= b53_mdb_add,</div><div class='add'>+	.port_mdb_del		= b53_mdb_del,</div><div class='add'>+	.port_max_mtu		= b53_get_max_mtu,</div><div class='add'>+	.port_change_mtu	= b53_change_mtu,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct b53_arl_ops b53_arl_ops_25 = {</div><div class='add'>+	.arl_read_entry = b53_arl_read_entry_25,</div><div class='add'>+	.arl_write_entry = b53_arl_write_entry_25,</div><div class='add'>+	.arl_search_read = b53_arl_search_read_25,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct b53_arl_ops b53_arl_ops_89 = {</div><div class='add'>+	.arl_read_entry = b53_arl_read_entry_89,</div><div class='add'>+	.arl_write_entry = b53_arl_write_entry_89,</div><div class='add'>+	.arl_search_read = b53_arl_search_read_89,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct b53_arl_ops b53_arl_ops_63xx = {</div><div class='add'>+	.arl_read_entry = b53_arl_read_entry_89,</div><div class='add'>+	.arl_write_entry = b53_arl_write_entry_89,</div><div class='add'>+	.arl_search_read = b53_arl_search_read_63xx,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct b53_arl_ops b53_arl_ops_95 = {</div><div class='add'>+	.arl_read_entry = b53_arl_read_entry_95,</div><div class='add'>+	.arl_write_entry = b53_arl_write_entry_95,</div><div class='add'>+	.arl_search_read = b53_arl_search_read_95,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct b53_chip_data {</div><div class='add'>+	u32 chip_id;</div><div class='add'>+	const char *dev_name;</div><div class='add'>+	u16 vlans;</div><div class='add'>+	u16 enabled_ports;</div><div class='add'>+	u8 imp_port;</div><div class='add'>+	u8 cpu_port;</div><div class='add'>+	u8 vta_regs[3];</div><div class='add'>+	u8 arl_bins;</div><div class='add'>+	u16 arl_buckets;</div><div class='add'>+	u8 duplex_reg;</div><div class='add'>+	u8 jumbo_pm_reg;</div><div class='add'>+	u8 jumbo_size_reg;</div><div class='add'>+	const struct b53_arl_ops *arl_ops;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define B53_VTA_REGS	\</div><div class='add'>+	{ B53_VT_ACCESS, B53_VT_INDEX, B53_VT_ENTRY }</div><div class='add'>+#define B53_VTA_REGS_9798 \</div><div class='add'>+	{ B53_VT_ACCESS_9798, B53_VT_INDEX_9798, B53_VT_ENTRY_9798 }</div><div class='add'>+#define B53_VTA_REGS_63XX \</div><div class='add'>+	{ B53_VT_ACCESS_63XX, B53_VT_INDEX_63XX, B53_VT_ENTRY_63XX }</div><div class='add'>+</div><div class='add'>+static const struct b53_chip_data b53_switch_chips[] = {</div><div class='add'>+	{</div><div class='add'>+		.chip_id = BCM5325_DEVICE_ID,</div><div class='add'>+		.dev_name = "BCM5325",</div><div class='add'>+		.vlans = 16,</div><div class='add'>+		.enabled_ports = 0x3f,</div><div class='add'>+		.arl_bins = 2,</div><div class='add'>+		.arl_buckets = 1024,</div><div class='add'>+		.imp_port = 5,</div><div class='add'>+		.duplex_reg = B53_DUPLEX_STAT_FE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_25,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.chip_id = BCM5365_DEVICE_ID,</div><div class='add'>+		.dev_name = "BCM5365",</div><div class='add'>+		.vlans = 256,</div><div class='add'>+		.enabled_ports = 0x3f,</div><div class='add'>+		.arl_bins = 2,</div><div class='add'>+		.arl_buckets = 1024,</div><div class='add'>+		.imp_port = 5,</div><div class='add'>+		.duplex_reg = B53_DUPLEX_STAT_FE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_25,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.chip_id = BCM5389_DEVICE_ID,</div><div class='add'>+		.dev_name = "BCM5389",</div><div class='add'>+		.vlans = 4096,</div><div class='add'>+		.enabled_ports = 0x11f,</div><div class='add'>+		.arl_bins = 4,</div><div class='add'>+		.arl_buckets = 1024,</div><div class='add'>+		.imp_port = 8,</div><div class='add'>+		.vta_regs = B53_VTA_REGS,</div><div class='add'>+		.duplex_reg = B53_DUPLEX_STAT_GE,</div><div class='add'>+		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,</div><div class='add'>+		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_89,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.chip_id = BCM5395_DEVICE_ID,</div><div class='add'>+		.dev_name = "BCM5395",</div><div class='add'>+		.vlans = 4096,</div><div class='add'>+		.enabled_ports = 0x11f,</div><div class='add'>+		.arl_bins = 4,</div><div class='add'>+		.arl_buckets = 1024,</div><div class='add'>+		.imp_port = 8,</div><div class='add'>+		.vta_regs = B53_VTA_REGS,</div><div class='add'>+		.duplex_reg = B53_DUPLEX_STAT_GE,</div><div class='add'>+		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,</div><div class='add'>+		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_95,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.chip_id = BCM5397_DEVICE_ID,</div><div class='add'>+		.dev_name = "BCM5397",</div><div class='add'>+		.vlans = 4096,</div><div class='add'>+		.enabled_ports = 0x11f,</div><div class='add'>+		.arl_bins = 4,</div><div class='add'>+		.arl_buckets = 1024,</div><div class='add'>+		.imp_port = 8,</div><div class='add'>+		.vta_regs = B53_VTA_REGS_9798,</div><div class='add'>+		.duplex_reg = B53_DUPLEX_STAT_GE,</div><div class='add'>+		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,</div><div class='add'>+		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_89,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.chip_id = BCM5398_DEVICE_ID,</div><div class='add'>+		.dev_name = "BCM5398",</div><div class='add'>+		.vlans = 4096,</div><div class='add'>+		.enabled_ports = 0x17f,</div><div class='add'>+		.arl_bins = 4,</div><div class='add'>+		.arl_buckets = 1024,</div><div class='add'>+		.imp_port = 8,</div><div class='add'>+		.vta_regs = B53_VTA_REGS_9798,</div><div class='add'>+		.duplex_reg = B53_DUPLEX_STAT_GE,</div><div class='add'>+		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,</div><div class='add'>+		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_89,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.chip_id = BCM53101_DEVICE_ID,</div><div class='add'>+		.dev_name = "BCM53101",</div><div class='add'>+		.vlans = 4096,</div><div class='add'>+		.enabled_ports = 0x11f,</div><div class='add'>+		.arl_bins = 4,</div><div class='add'>+		.arl_buckets = 512,</div><div class='add'>+		.vta_regs = B53_VTA_REGS,</div><div class='add'>+		.imp_port = 8,</div><div class='add'>+		.duplex_reg = B53_DUPLEX_STAT_GE,</div><div class='add'>+		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,</div><div class='add'>+		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_95,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.chip_id = BCM53115_DEVICE_ID,</div><div class='add'>+		.dev_name = "BCM53115",</div><div class='add'>+		.vlans = 4096,</div><div class='add'>+		.enabled_ports = 0x11f,</div><div class='add'>+		.arl_bins = 4,</div><div class='add'>+		.arl_buckets = 1024,</div><div class='add'>+		.vta_regs = B53_VTA_REGS,</div><div class='add'>+		.imp_port = 8,</div><div class='add'>+		.duplex_reg = B53_DUPLEX_STAT_GE,</div><div class='add'>+		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,</div><div class='add'>+		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_95,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.chip_id = BCM53125_DEVICE_ID,</div><div class='add'>+		.dev_name = "BCM53125",</div><div class='add'>+		.vlans = 4096,</div><div class='add'>+		.enabled_ports = 0x1ff,</div><div class='add'>+		.arl_bins = 4,</div><div class='add'>+		.arl_buckets = 1024,</div><div class='add'>+		.imp_port = 8,</div><div class='add'>+		.vta_regs = B53_VTA_REGS,</div><div class='add'>+		.duplex_reg = B53_DUPLEX_STAT_GE,</div><div class='add'>+		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,</div><div class='add'>+		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_95,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.chip_id = BCM53128_DEVICE_ID,</div><div class='add'>+		.dev_name = "BCM53128",</div><div class='add'>+		.vlans = 4096,</div><div class='add'>+		.enabled_ports = 0x1ff,</div><div class='add'>+		.arl_bins = 4,</div><div class='add'>+		.arl_buckets = 1024,</div><div class='add'>+		.imp_port = 8,</div><div class='add'>+		.vta_regs = B53_VTA_REGS,</div><div class='add'>+		.duplex_reg = B53_DUPLEX_STAT_GE,</div><div class='add'>+		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,</div><div class='add'>+		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_95,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.chip_id = BCM63XX_DEVICE_ID,</div><div class='add'>+		.dev_name = "BCM63xx",</div><div class='add'>+		.vlans = 4096,</div><div class='add'>+		.enabled_ports = 0, /* pdata must provide them */</div><div class='add'>+		.arl_bins = 1,</div><div class='add'>+		.arl_buckets = 4096,</div><div class='add'>+		.imp_port = 8,</div><div class='add'>+		.vta_regs = B53_VTA_REGS_63XX,</div><div class='add'>+		.duplex_reg = B53_DUPLEX_STAT_63XX,</div><div class='add'>+		.jumbo_pm_reg = B53_JUMBO_PORT_MASK_63XX,</div><div class='add'>+		.jumbo_size_reg = B53_JUMBO_MAX_SIZE_63XX,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_63xx,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.chip_id = BCM53010_DEVICE_ID,</div><div class='add'>+		.dev_name = "BCM53010",</div><div class='add'>+		.vlans = 4096,</div><div class='add'>+		.enabled_ports = 0x1bf,</div><div class='add'>+		.arl_bins = 4,</div><div class='add'>+		.arl_buckets = 1024,</div><div class='add'>+		.imp_port = 8,</div><div class='add'>+		.vta_regs = B53_VTA_REGS,</div><div class='add'>+		.duplex_reg = B53_DUPLEX_STAT_GE,</div><div class='add'>+		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,</div><div class='add'>+		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_95,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.chip_id = BCM53011_DEVICE_ID,</div><div class='add'>+		.dev_name = "BCM53011",</div><div class='add'>+		.vlans = 4096,</div><div class='add'>+		.enabled_ports = 0x1bf,</div><div class='add'>+		.arl_bins = 4,</div><div class='add'>+		.arl_buckets = 1024,</div><div class='add'>+		.imp_port = 8,</div><div class='add'>+		.vta_regs = B53_VTA_REGS,</div><div class='add'>+		.duplex_reg = B53_DUPLEX_STAT_GE,</div><div class='add'>+		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,</div><div class='add'>+		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_95,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.chip_id = BCM53012_DEVICE_ID,</div><div class='add'>+		.dev_name = "BCM53012",</div><div class='add'>+		.vlans = 4096,</div><div class='add'>+		.enabled_ports = 0x1bf,</div><div class='add'>+		.arl_bins = 4,</div><div class='add'>+		.arl_buckets = 1024,</div><div class='add'>+		.imp_port = 8,</div><div class='add'>+		.vta_regs = B53_VTA_REGS,</div><div class='add'>+		.duplex_reg = B53_DUPLEX_STAT_GE,</div><div class='add'>+		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,</div><div class='add'>+		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_95,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.chip_id = BCM53018_DEVICE_ID,</div><div class='add'>+		.dev_name = "BCM53018",</div><div class='add'>+		.vlans = 4096,</div><div class='add'>+		.enabled_ports = 0x1bf,</div><div class='add'>+		.arl_bins = 4,</div><div class='add'>+		.arl_buckets = 1024,</div><div class='add'>+		.imp_port = 8,</div><div class='add'>+		.vta_regs = B53_VTA_REGS,</div><div class='add'>+		.duplex_reg = B53_DUPLEX_STAT_GE,</div><div class='add'>+		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,</div><div class='add'>+		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_95,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.chip_id = BCM53019_DEVICE_ID,</div><div class='add'>+		.dev_name = "BCM53019",</div><div class='add'>+		.vlans = 4096,</div><div class='add'>+		.enabled_ports = 0x1bf,</div><div class='add'>+		.arl_bins = 4,</div><div class='add'>+		.arl_buckets = 1024,</div><div class='add'>+		.imp_port = 8,</div><div class='add'>+		.vta_regs = B53_VTA_REGS,</div><div class='add'>+		.duplex_reg = B53_DUPLEX_STAT_GE,</div><div class='add'>+		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,</div><div class='add'>+		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_95,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.chip_id = BCM58XX_DEVICE_ID,</div><div class='add'>+		.dev_name = "BCM585xx/586xx/88312",</div><div class='add'>+		.vlans	= 4096,</div><div class='add'>+		.enabled_ports = 0x1ff,</div><div class='add'>+		.arl_bins = 4,</div><div class='add'>+		.arl_buckets = 1024,</div><div class='add'>+		.imp_port = 8,</div><div class='add'>+		.vta_regs = B53_VTA_REGS,</div><div class='add'>+		.duplex_reg = B53_DUPLEX_STAT_GE,</div><div class='add'>+		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,</div><div class='add'>+		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_95,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.chip_id = BCM583XX_DEVICE_ID,</div><div class='add'>+		.dev_name = "BCM583xx/11360",</div><div class='add'>+		.vlans = 4096,</div><div class='add'>+		.enabled_ports = 0x103,</div><div class='add'>+		.arl_bins = 4,</div><div class='add'>+		.arl_buckets = 1024,</div><div class='add'>+		.imp_port = 8,</div><div class='add'>+		.vta_regs = B53_VTA_REGS,</div><div class='add'>+		.duplex_reg = B53_DUPLEX_STAT_GE,</div><div class='add'>+		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,</div><div class='add'>+		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_95,</div><div class='add'>+	},</div><div class='add'>+	/* Starfighter 2 */</div><div class='add'>+	{</div><div class='add'>+		.chip_id = BCM4908_DEVICE_ID,</div><div class='add'>+		.dev_name = "BCM4908",</div><div class='add'>+		.vlans = 4096,</div><div class='add'>+		.enabled_ports = 0x1bf,</div><div class='add'>+		.arl_bins = 4,</div><div class='add'>+		.arl_buckets = 256,</div><div class='add'>+		.imp_port = 8,</div><div class='add'>+		.vta_regs = B53_VTA_REGS,</div><div class='add'>+		.duplex_reg = B53_DUPLEX_STAT_GE,</div><div class='add'>+		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,</div><div class='add'>+		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_95,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.chip_id = BCM7445_DEVICE_ID,</div><div class='add'>+		.dev_name = "BCM7445",</div><div class='add'>+		.vlans	= 4096,</div><div class='add'>+		.enabled_ports = 0x1ff,</div><div class='add'>+		.arl_bins = 4,</div><div class='add'>+		.arl_buckets = 1024,</div><div class='add'>+		.imp_port = 8,</div><div class='add'>+		.vta_regs = B53_VTA_REGS,</div><div class='add'>+		.duplex_reg = B53_DUPLEX_STAT_GE,</div><div class='add'>+		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,</div><div class='add'>+		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_95,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.chip_id = BCM7278_DEVICE_ID,</div><div class='add'>+		.dev_name = "BCM7278",</div><div class='add'>+		.vlans = 4096,</div><div class='add'>+		.enabled_ports = 0x1ff,</div><div class='add'>+		.arl_bins = 4,</div><div class='add'>+		.arl_buckets = 256,</div><div class='add'>+		.imp_port = 8,</div><div class='add'>+		.vta_regs = B53_VTA_REGS,</div><div class='add'>+		.duplex_reg = B53_DUPLEX_STAT_GE,</div><div class='add'>+		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,</div><div class='add'>+		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_95,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.chip_id = BCM53134_DEVICE_ID,</div><div class='add'>+		.dev_name = "BCM53134",</div><div class='add'>+		.vlans = 4096,</div><div class='add'>+		.enabled_ports = 0x12f,</div><div class='add'>+		.imp_port = 8,</div><div class='add'>+		.cpu_port = B53_CPU_PORT,</div><div class='add'>+		.vta_regs = B53_VTA_REGS,</div><div class='add'>+		.arl_bins = 4,</div><div class='add'>+		.arl_buckets = 1024,</div><div class='add'>+		.duplex_reg = B53_DUPLEX_STAT_GE,</div><div class='add'>+		.jumbo_pm_reg = B53_JUMBO_PORT_MASK,</div><div class='add'>+		.jumbo_size_reg = B53_JUMBO_MAX_SIZE,</div><div class='add'>+		.arl_ops = &amp;b53_arl_ops_95,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int b53_switch_init(struct b53_device *dev)</div><div class='add'>+{</div><div class='add'>+	u32 chip_id = dev-&gt;chip_id;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (is63xx(dev))</div><div class='add'>+		chip_id = BCM63XX_DEVICE_ID;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(b53_switch_chips); i++) {</div><div class='add'>+		const struct b53_chip_data *chip = &amp;b53_switch_chips[i];</div><div class='add'>+</div><div class='add'>+		if (chip-&gt;chip_id == chip_id) {</div><div class='add'>+			if (!dev-&gt;enabled_ports)</div><div class='add'>+				dev-&gt;enabled_ports = chip-&gt;enabled_ports;</div><div class='add'>+			dev-&gt;name = chip-&gt;dev_name;</div><div class='add'>+			dev-&gt;duplex_reg = chip-&gt;duplex_reg;</div><div class='add'>+			dev-&gt;vta_regs[0] = chip-&gt;vta_regs[0];</div><div class='add'>+			dev-&gt;vta_regs[1] = chip-&gt;vta_regs[1];</div><div class='add'>+			dev-&gt;vta_regs[2] = chip-&gt;vta_regs[2];</div><div class='add'>+			dev-&gt;jumbo_pm_reg = chip-&gt;jumbo_pm_reg;</div><div class='add'>+			dev-&gt;imp_port = chip-&gt;imp_port;</div><div class='add'>+			dev-&gt;num_vlans = chip-&gt;vlans;</div><div class='add'>+			dev-&gt;num_arl_bins = chip-&gt;arl_bins;</div><div class='add'>+			dev-&gt;num_arl_buckets = chip-&gt;arl_buckets;</div><div class='add'>+			dev-&gt;arl_ops = chip-&gt;arl_ops;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* check which BCM5325x version we have */</div><div class='add'>+	if (is5325(dev)) {</div><div class='add'>+		u8 vc4;</div><div class='add'>+</div><div class='add'>+		b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4_25, &amp;vc4);</div><div class='add'>+</div><div class='add'>+		/* check reserved bits */</div><div class='add'>+		switch (vc4 &amp; 3) {</div><div class='add'>+		case 1:</div><div class='add'>+			/* BCM5325E */</div><div class='add'>+			break;</div><div class='add'>+		case 3:</div><div class='add'>+			/* BCM5325F - do not use port 4 */</div><div class='add'>+			dev-&gt;enabled_ports &amp;= ~BIT(4);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+/* On the BCM47XX SoCs this is the supported internal switch.*/</div><div class='add'>+#ifndef CONFIG_BCM47XX</div><div class='add'>+			/* BCM5325M */</div><div class='add'>+			return -EINVAL;</div><div class='add'>+#else</div><div class='add'>+			break;</div><div class='add'>+#endif</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (is5325e(dev))</div><div class='add'>+		dev-&gt;num_arl_buckets = 512;</div><div class='add'>+</div><div class='add'>+	dev-&gt;num_ports = fls(dev-&gt;enabled_ports);</div><div class='add'>+</div><div class='add'>+	dev-&gt;ds-&gt;num_ports = min_t(unsigned int, dev-&gt;num_ports, DSA_MAX_PORTS);</div><div class='add'>+</div><div class='add'>+	/* Include non standard CPU port built-in PHYs to be probed */</div><div class='add'>+	if (is539x(dev) || is531x5(dev)) {</div><div class='add'>+		for (i = 0; i &lt; dev-&gt;num_ports; i++) {</div><div class='add'>+			if (!(dev-&gt;ds-&gt;phys_mii_mask &amp; BIT(i)) &amp;&amp;</div><div class='add'>+			    !b53_possible_cpu_port(dev-&gt;ds, i))</div><div class='add'>+				dev-&gt;ds-&gt;phys_mii_mask |= BIT(i);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev-&gt;ports = devm_kcalloc(dev-&gt;dev,</div><div class='add'>+				  dev-&gt;num_ports, sizeof(struct b53_port),</div><div class='add'>+				  GFP_KERNEL);</div><div class='add'>+	if (!dev-&gt;ports)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	dev-&gt;vlans = devm_kcalloc(dev-&gt;dev,</div><div class='add'>+				  dev-&gt;num_vlans, sizeof(struct b53_vlan),</div><div class='add'>+				  GFP_KERNEL);</div><div class='add'>+	if (!dev-&gt;vlans)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	dev-&gt;reset_gpio = b53_switch_get_reset_gpio(dev);</div><div class='add'>+	if (dev-&gt;reset_gpio &gt;= 0) {</div><div class='add'>+		ret = devm_gpio_request_one(dev-&gt;dev, dev-&gt;reset_gpio,</div><div class='add'>+					    GPIOF_OUT_INIT_HIGH, "robo_reset");</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct b53_device *b53_switch_alloc(struct device *base,</div><div class='add'>+				    const struct b53_io_ops *ops,</div><div class='add'>+				    void *priv)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds;</div><div class='add'>+	struct b53_device *dev;</div><div class='add'>+</div><div class='add'>+	ds = devm_kzalloc(base, sizeof(*ds), GFP_KERNEL);</div><div class='add'>+	if (!ds)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	ds-&gt;dev = base;</div><div class='add'>+</div><div class='add'>+	dev = devm_kzalloc(base, sizeof(*dev), GFP_KERNEL);</div><div class='add'>+	if (!dev)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	ds-&gt;priv = dev;</div><div class='add'>+	dev-&gt;dev = base;</div><div class='add'>+</div><div class='add'>+	dev-&gt;ds = ds;</div><div class='add'>+	dev-&gt;priv = priv;</div><div class='add'>+	dev-&gt;ops = ops;</div><div class='add'>+	ds-&gt;ops = &amp;b53_switch_ops;</div><div class='add'>+	ds-&gt;phylink_mac_ops = &amp;b53_phylink_mac_ops;</div><div class='add'>+	dev-&gt;vlan_enabled = true;</div><div class='add'>+	dev-&gt;vlan_filtering = false;</div><div class='add'>+	/* Let DSA handle the case were multiple bridges span the same switch</div><div class='add'>+	 * device and different VLAN awareness settings are requested, which</div><div class='add'>+	 * would be breaking filtering semantics for any of the other bridge</div><div class='add'>+	 * devices. (not hardware supported)</div><div class='add'>+	 */</div><div class='add'>+	ds-&gt;vlan_filtering_is_global = true;</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;dev-&gt;reg_mutex);</div><div class='add'>+	mutex_init(&amp;dev-&gt;stats_mutex);</div><div class='add'>+	mutex_init(&amp;dev-&gt;arl_mutex);</div><div class='add'>+</div><div class='add'>+	return dev;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_switch_alloc);</div><div class='add'>+</div><div class='add'>+int b53_switch_detect(struct b53_device *dev)</div><div class='add'>+{</div><div class='add'>+	u32 id32;</div><div class='add'>+	u16 tmp;</div><div class='add'>+	u8 id8;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = b53_read8(dev, B53_MGMT_PAGE, B53_DEVICE_ID, &amp;id8);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	switch (id8) {</div><div class='add'>+	case 0:</div><div class='add'>+		/* BCM5325 and BCM5365 do not have this register so reads</div><div class='add'>+		 * return 0. But the read operation did succeed, so assume this</div><div class='add'>+		 * is one of them.</div><div class='add'>+		 *</div><div class='add'>+		 * Next check if we can write to the 5325's VTA register; for</div><div class='add'>+		 * 5365 it is read only.</div><div class='add'>+		 */</div><div class='add'>+		b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_TABLE_ACCESS_25, 0xf);</div><div class='add'>+		b53_read16(dev, B53_VLAN_PAGE, B53_VLAN_TABLE_ACCESS_25, &amp;tmp);</div><div class='add'>+</div><div class='add'>+		if (tmp == 0xf) {</div><div class='add'>+			u32 phy_id;</div><div class='add'>+			int val;</div><div class='add'>+</div><div class='add'>+			dev-&gt;chip_id = BCM5325_DEVICE_ID;</div><div class='add'>+</div><div class='add'>+			val = b53_phy_read16(dev-&gt;ds, 0, MII_PHYSID1);</div><div class='add'>+			phy_id = (val &amp; 0xffff) &lt;&lt; 16;</div><div class='add'>+			val = b53_phy_read16(dev-&gt;ds, 0, MII_PHYSID2);</div><div class='add'>+			phy_id |= (val &amp; 0xfff0);</div><div class='add'>+</div><div class='add'>+			if (phy_id == 0x00406330)</div><div class='add'>+				dev-&gt;variant_id = B53_VARIANT_5325M;</div><div class='add'>+			else if (phy_id == 0x0143bc30)</div><div class='add'>+				dev-&gt;variant_id = B53_VARIANT_5325E;</div><div class='add'>+		} else {</div><div class='add'>+			dev-&gt;chip_id = BCM5365_DEVICE_ID;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case BCM5389_DEVICE_ID:</div><div class='add'>+	case BCM5395_DEVICE_ID:</div><div class='add'>+	case BCM5397_DEVICE_ID:</div><div class='add'>+	case BCM5398_DEVICE_ID:</div><div class='add'>+		dev-&gt;chip_id = id8;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = b53_read32(dev, B53_MGMT_PAGE, B53_DEVICE_ID, &amp;id32);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		switch (id32) {</div><div class='add'>+		case BCM53101_DEVICE_ID:</div><div class='add'>+		case BCM53115_DEVICE_ID:</div><div class='add'>+		case BCM53125_DEVICE_ID:</div><div class='add'>+		case BCM53128_DEVICE_ID:</div><div class='add'>+		case BCM53010_DEVICE_ID:</div><div class='add'>+		case BCM53011_DEVICE_ID:</div><div class='add'>+		case BCM53012_DEVICE_ID:</div><div class='add'>+		case BCM53018_DEVICE_ID:</div><div class='add'>+		case BCM53019_DEVICE_ID:</div><div class='add'>+		case BCM53134_DEVICE_ID:</div><div class='add'>+			dev-&gt;chip_id = id32;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			dev_err(dev-&gt;dev,</div><div class='add'>+				"unsupported switch detected (BCM53%02x/BCM%x)\n",</div><div class='add'>+				id8, id32);</div><div class='add'>+			return -ENODEV;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;chip_id == BCM5325_DEVICE_ID)</div><div class='add'>+		return b53_read8(dev, B53_STAT_PAGE, B53_REV_ID_25,</div><div class='add'>+				 &amp;dev-&gt;core_rev);</div><div class='add'>+	else</div><div class='add'>+		return b53_read8(dev, B53_MGMT_PAGE, B53_REV_ID,</div><div class='add'>+				 &amp;dev-&gt;core_rev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_switch_detect);</div><div class='add'>+</div><div class='add'>+int b53_switch_register(struct b53_device *dev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;pdata) {</div><div class='add'>+		dev-&gt;chip_id = dev-&gt;pdata-&gt;chip_id;</div><div class='add'>+		dev-&gt;enabled_ports = dev-&gt;pdata-&gt;enabled_ports;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!dev-&gt;chip_id &amp;&amp; b53_switch_detect(dev))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = b53_switch_init(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	dev_info(dev-&gt;dev, "found switch: %s, rev %i\n",</div><div class='add'>+		 dev-&gt;name, dev-&gt;core_rev);</div><div class='add'>+</div><div class='add'>+	return dsa_register_switch(dev-&gt;ds);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_switch_register);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Jonas Gorski &lt;jogo@openwrt.org&gt;");</div><div class='add'>+MODULE_DESCRIPTION("B53 switch library");</div><div class='add'>+MODULE_LICENSE("Dual BSD/GPL");</div><div class='head'>diff --git a/drivers/net/dsa/b53/b53_mdio.c b/drivers/net/dsa/b53/b53_mdio.c<br/>new file mode 100644<br/>index 000000000000..43a3b37b731b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/b53/b53_mdio.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/b53/b53_mdio.c</a></div><div class='hunk'>@@ -0,0 +1,403 @@</div><div class='add'>+/*</div><div class='add'>+ * B53 register access through MII registers</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2011-2013 Jonas Gorski &lt;jogo@openwrt.org&gt;</div><div class='add'>+ *</div><div class='add'>+ * Permission to use, copy, modify, and/or distribute this software for any</div><div class='add'>+ * purpose with or without fee is hereby granted, provided that the above</div><div class='add'>+ * copyright notice and this permission notice appear in all copies.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES</div><div class='add'>+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF</div><div class='add'>+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR</div><div class='add'>+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES</div><div class='add'>+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN</div><div class='add'>+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF</div><div class='add'>+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/brcmphy.h&gt;</div><div class='add'>+#include &lt;linux/rtnetlink.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+</div><div class='add'>+#include "b53_priv.h"</div><div class='add'>+</div><div class='add'>+/* MII registers */</div><div class='add'>+#define REG_MII_PAGE    0x10    /* MII Page register */</div><div class='add'>+#define REG_MII_ADDR    0x11    /* MII Address register */</div><div class='add'>+#define REG_MII_DATA0   0x18    /* MII Data register 0 */</div><div class='add'>+#define REG_MII_DATA1   0x19    /* MII Data register 1 */</div><div class='add'>+#define REG_MII_DATA2   0x1a    /* MII Data register 2 */</div><div class='add'>+#define REG_MII_DATA3   0x1b    /* MII Data register 3 */</div><div class='add'>+</div><div class='add'>+#define REG_MII_PAGE_ENABLE     BIT(0)</div><div class='add'>+#define REG_MII_ADDR_WRITE      BIT(0)</div><div class='add'>+#define REG_MII_ADDR_READ       BIT(1)</div><div class='add'>+</div><div class='add'>+static int b53_mdio_op(struct b53_device *dev, u8 page, u8 reg, u16 op)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	u16 v;</div><div class='add'>+	int ret;</div><div class='add'>+	struct mii_bus *bus = dev-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;current_page != page) {</div><div class='add'>+		/* set page number */</div><div class='add'>+		v = (page &lt;&lt; 8) | REG_MII_PAGE_ENABLE;</div><div class='add'>+		ret = mdiobus_write_nested(bus, BRCM_PSEUDO_PHY_ADDR,</div><div class='add'>+					   REG_MII_PAGE, v);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+		dev-&gt;current_page = page;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* set register address */</div><div class='add'>+	v = (reg &lt;&lt; 8) | op;</div><div class='add'>+	ret = mdiobus_write_nested(bus, BRCM_PSEUDO_PHY_ADDR, REG_MII_ADDR, v);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* check if operation completed */</div><div class='add'>+	for (i = 0; i &lt; 5; ++i) {</div><div class='add'>+		v = mdiobus_read_nested(bus, BRCM_PSEUDO_PHY_ADDR,</div><div class='add'>+					REG_MII_ADDR);</div><div class='add'>+		if (!(v &amp; (REG_MII_ADDR_WRITE | REG_MII_ADDR_READ)))</div><div class='add'>+			break;</div><div class='add'>+		usleep_range(10, 100);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (WARN_ON(i == 5))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_mdio_read8(struct b53_device *dev, u8 page, u8 reg, u8 *val)</div><div class='add'>+{</div><div class='add'>+	struct mii_bus *bus = dev-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = b53_mdio_op(dev, page, reg, REG_MII_ADDR_READ);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	*val = mdiobus_read_nested(bus, BRCM_PSEUDO_PHY_ADDR,</div><div class='add'>+				   REG_MII_DATA0) &amp; 0xff;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_mdio_read16(struct b53_device *dev, u8 page, u8 reg, u16 *val)</div><div class='add'>+{</div><div class='add'>+	struct mii_bus *bus = dev-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = b53_mdio_op(dev, page, reg, REG_MII_ADDR_READ);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	*val = mdiobus_read_nested(bus, BRCM_PSEUDO_PHY_ADDR, REG_MII_DATA0);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_mdio_read32(struct b53_device *dev, u8 page, u8 reg, u32 *val)</div><div class='add'>+{</div><div class='add'>+	struct mii_bus *bus = dev-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = b53_mdio_op(dev, page, reg, REG_MII_ADDR_READ);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	*val = mdiobus_read_nested(bus, BRCM_PSEUDO_PHY_ADDR, REG_MII_DATA0);</div><div class='add'>+	*val |= mdiobus_read_nested(bus, BRCM_PSEUDO_PHY_ADDR,</div><div class='add'>+				    REG_MII_DATA1) &lt;&lt; 16;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_mdio_read48(struct b53_device *dev, u8 page, u8 reg, u64 *val)</div><div class='add'>+{</div><div class='add'>+	struct mii_bus *bus = dev-&gt;priv;</div><div class='add'>+	u64 temp = 0;</div><div class='add'>+	int i;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = b53_mdio_op(dev, page, reg, REG_MII_ADDR_READ);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	for (i = 2; i &gt;= 0; i--) {</div><div class='add'>+		temp &lt;&lt;= 16;</div><div class='add'>+		temp |= mdiobus_read_nested(bus, BRCM_PSEUDO_PHY_ADDR,</div><div class='add'>+				     REG_MII_DATA0 + i);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*val = temp;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_mdio_read64(struct b53_device *dev, u8 page, u8 reg, u64 *val)</div><div class='add'>+{</div><div class='add'>+	struct mii_bus *bus = dev-&gt;priv;</div><div class='add'>+	u64 temp = 0;</div><div class='add'>+	int i;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = b53_mdio_op(dev, page, reg, REG_MII_ADDR_READ);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	for (i = 3; i &gt;= 0; i--) {</div><div class='add'>+		temp &lt;&lt;= 16;</div><div class='add'>+		temp |= mdiobus_read_nested(bus, BRCM_PSEUDO_PHY_ADDR,</div><div class='add'>+					    REG_MII_DATA0 + i);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*val = temp;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_mdio_write8(struct b53_device *dev, u8 page, u8 reg, u8 value)</div><div class='add'>+{</div><div class='add'>+	struct mii_bus *bus = dev-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = mdiobus_write_nested(bus, BRCM_PSEUDO_PHY_ADDR,</div><div class='add'>+				   REG_MII_DATA0, value);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return b53_mdio_op(dev, page, reg, REG_MII_ADDR_WRITE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_mdio_write16(struct b53_device *dev, u8 page, u8 reg,</div><div class='add'>+			    u16 value)</div><div class='add'>+{</div><div class='add'>+	struct mii_bus *bus = dev-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = mdiobus_write_nested(bus, BRCM_PSEUDO_PHY_ADDR,</div><div class='add'>+				   REG_MII_DATA0, value);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return b53_mdio_op(dev, page, reg, REG_MII_ADDR_WRITE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_mdio_write32(struct b53_device *dev, u8 page, u8 reg,</div><div class='add'>+			    u32 value)</div><div class='add'>+{</div><div class='add'>+	struct mii_bus *bus = dev-&gt;priv;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	u32 temp = value;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 2; i++) {</div><div class='add'>+		int ret = mdiobus_write_nested(bus, BRCM_PSEUDO_PHY_ADDR,</div><div class='add'>+					       REG_MII_DATA0 + i,</div><div class='add'>+					       temp &amp; 0xffff);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+		temp &gt;&gt;= 16;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return b53_mdio_op(dev, page, reg, REG_MII_ADDR_WRITE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_mdio_write48(struct b53_device *dev, u8 page, u8 reg,</div><div class='add'>+			    u64 value)</div><div class='add'>+{</div><div class='add'>+	struct mii_bus *bus = dev-&gt;priv;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	u64 temp = value;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 3; i++) {</div><div class='add'>+		int ret = mdiobus_write_nested(bus, BRCM_PSEUDO_PHY_ADDR,</div><div class='add'>+					       REG_MII_DATA0 + i,</div><div class='add'>+					       temp &amp; 0xffff);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+		temp &gt;&gt;= 16;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return b53_mdio_op(dev, page, reg, REG_MII_ADDR_WRITE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_mdio_write64(struct b53_device *dev, u8 page, u8 reg,</div><div class='add'>+			    u64 value)</div><div class='add'>+{</div><div class='add'>+	struct mii_bus *bus = dev-&gt;priv;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	u64 temp = value;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 4; i++) {</div><div class='add'>+		int ret = mdiobus_write_nested(bus, BRCM_PSEUDO_PHY_ADDR,</div><div class='add'>+					       REG_MII_DATA0 + i,</div><div class='add'>+					       temp &amp; 0xffff);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+		temp &gt;&gt;= 16;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return b53_mdio_op(dev, page, reg, REG_MII_ADDR_WRITE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_mdio_phy_read16(struct b53_device *dev, int addr, int reg,</div><div class='add'>+			       u16 *value)</div><div class='add'>+{</div><div class='add'>+	struct mii_bus *bus = dev-&gt;priv;</div><div class='add'>+</div><div class='add'>+	*value = mdiobus_read_nested(bus, addr, reg);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_mdio_phy_write16(struct b53_device *dev, int addr, int reg,</div><div class='add'>+				u16 value)</div><div class='add'>+{</div><div class='add'>+	struct mii_bus *bus = dev-&gt;bus;</div><div class='add'>+</div><div class='add'>+	return mdiobus_write_nested(bus, addr, reg, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct b53_io_ops b53_mdio_ops = {</div><div class='add'>+	.read8 = b53_mdio_read8,</div><div class='add'>+	.read16 = b53_mdio_read16,</div><div class='add'>+	.read32 = b53_mdio_read32,</div><div class='add'>+	.read48 = b53_mdio_read48,</div><div class='add'>+	.read64 = b53_mdio_read64,</div><div class='add'>+	.write8 = b53_mdio_write8,</div><div class='add'>+	.write16 = b53_mdio_write16,</div><div class='add'>+	.write32 = b53_mdio_write32,</div><div class='add'>+	.write48 = b53_mdio_write48,</div><div class='add'>+	.write64 = b53_mdio_write64,</div><div class='add'>+	.phy_read16 = b53_mdio_phy_read16,</div><div class='add'>+	.phy_write16 = b53_mdio_phy_write16,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define B53_BRCM_OUI_1	0x0143bc00</div><div class='add'>+#define B53_BRCM_OUI_2	0x03625c00</div><div class='add'>+#define B53_BRCM_OUI_3	0x00406000</div><div class='add'>+#define B53_BRCM_OUI_4	0x01410c00</div><div class='add'>+#define B53_BRCM_OUI_5	0xae025000</div><div class='add'>+</div><div class='add'>+static int b53_mdio_probe(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev;</div><div class='add'>+	u32 phy_id;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* allow the generic PHY driver to take over the non-management MDIO</div><div class='add'>+	 * addresses</div><div class='add'>+	 */</div><div class='add'>+	if (mdiodev-&gt;addr != BRCM_PSEUDO_PHY_ADDR &amp;&amp; mdiodev-&gt;addr != 0) {</div><div class='add'>+		dev_err(&amp;mdiodev-&gt;dev, "leaving address %d to PHY\n",</div><div class='add'>+			mdiodev-&gt;addr);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* read the first port's id */</div><div class='add'>+	phy_id = mdiobus_read(mdiodev-&gt;bus, 0, 2) &lt;&lt; 16;</div><div class='add'>+	phy_id |= mdiobus_read(mdiodev-&gt;bus, 0, 3);</div><div class='add'>+</div><div class='add'>+	/* BCM5325, BCM539x (OUI_1)</div><div class='add'>+	 * BCM53125, BCM53128 (OUI_2)</div><div class='add'>+	 * BCM5365 (OUI_3)</div><div class='add'>+	 */</div><div class='add'>+	if ((phy_id &amp; 0xfffffc00) != B53_BRCM_OUI_1 &amp;&amp;</div><div class='add'>+	    (phy_id &amp; 0xfffffc00) != B53_BRCM_OUI_2 &amp;&amp;</div><div class='add'>+	    (phy_id &amp; 0xfffffc00) != B53_BRCM_OUI_3 &amp;&amp;</div><div class='add'>+	    (phy_id &amp; 0xfffffc00) != B53_BRCM_OUI_4 &amp;&amp;</div><div class='add'>+	    (phy_id &amp; 0xfffffc00) != B53_BRCM_OUI_5) {</div><div class='add'>+		dev_err(&amp;mdiodev-&gt;dev, "Unsupported device: 0x%08x\n", phy_id);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* First probe will come from SWITCH_MDIO controller on the 7445D0</div><div class='add'>+	 * switch, which will conflict with the 7445 integrated switch</div><div class='add'>+	 * pseudo-phy (we end-up programming both). In that case, we return</div><div class='add'>+	 * -EPROBE_DEFER for the first time we get here, and wait until we come</div><div class='add'>+	 * back with the slave MDIO bus which has the correct indirection</div><div class='add'>+	 * layer setup</div><div class='add'>+	 */</div><div class='add'>+	if (of_machine_is_compatible("brcm,bcm7445d0") &amp;&amp;</div><div class='add'>+	    strcmp(mdiodev-&gt;bus-&gt;name, "sf2 user mii"))</div><div class='add'>+		return -EPROBE_DEFER;</div><div class='add'>+</div><div class='add'>+	dev = b53_switch_alloc(&amp;mdiodev-&gt;dev, &amp;b53_mdio_ops, mdiodev-&gt;bus);</div><div class='add'>+	if (!dev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* we don't use page 0xff, so force a page set */</div><div class='add'>+	dev-&gt;current_page = 0xff;</div><div class='add'>+	dev-&gt;bus = mdiodev-&gt;bus;</div><div class='add'>+</div><div class='add'>+	dev_set_drvdata(&amp;mdiodev-&gt;dev, dev);</div><div class='add'>+</div><div class='add'>+	ret = b53_switch_register(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return dev_err_probe(&amp;mdiodev-&gt;dev, ret,</div><div class='add'>+				     "failed to register switch\n");</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_mdio_remove(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = dev_get_drvdata(&amp;mdiodev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	if (!dev)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	b53_switch_remove(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_mdio_shutdown(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = dev_get_drvdata(&amp;mdiodev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	if (!dev)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	b53_switch_shutdown(dev);</div><div class='add'>+</div><div class='add'>+	dev_set_drvdata(&amp;mdiodev-&gt;dev, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id b53_of_match[] = {</div><div class='add'>+	{ .compatible = "brcm,bcm5325" },</div><div class='add'>+	{ .compatible = "brcm,bcm53101" },</div><div class='add'>+	{ .compatible = "brcm,bcm53115" },</div><div class='add'>+	{ .compatible = "brcm,bcm53125" },</div><div class='add'>+	{ .compatible = "brcm,bcm53128" },</div><div class='add'>+	{ .compatible = "brcm,bcm53134" },</div><div class='add'>+	{ .compatible = "brcm,bcm5365" },</div><div class='add'>+	{ .compatible = "brcm,bcm5389" },</div><div class='add'>+	{ .compatible = "brcm,bcm5395" },</div><div class='add'>+	{ .compatible = "brcm,bcm5397" },</div><div class='add'>+	{ .compatible = "brcm,bcm5398" },</div><div class='add'>+	{ /* sentinel */ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, b53_of_match);</div><div class='add'>+</div><div class='add'>+static struct mdio_driver b53_mdio_driver = {</div><div class='add'>+	.probe	= b53_mdio_probe,</div><div class='add'>+	.remove	= b53_mdio_remove,</div><div class='add'>+	.shutdown = b53_mdio_shutdown,</div><div class='add'>+	.mdiodrv.driver = {</div><div class='add'>+		.name = "bcm53xx",</div><div class='add'>+		.of_match_table = b53_of_match,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+mdio_module_driver(b53_mdio_driver);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("B53 MDIO access driver");</div><div class='add'>+MODULE_LICENSE("Dual BSD/GPL");</div><div class='head'>diff --git a/drivers/net/dsa/b53/b53_mmap.c b/drivers/net/dsa/b53/b53_mmap.c<br/>new file mode 100644<br/>index 000000000000..f4a59d8fbdd6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/b53/b53_mmap.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/b53/b53_mmap.c</a></div><div class='hunk'>@@ -0,0 +1,510 @@</div><div class='add'>+/*</div><div class='add'>+ * B53 register access through memory mapped registers</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2012-2013 Jonas Gorski &lt;jogo@openwrt.org&gt;</div><div class='add'>+ *</div><div class='add'>+ * Permission to use, copy, modify, and/or distribute this software for any</div><div class='add'>+ * purpose with or without fee is hereby granted, provided that the above</div><div class='add'>+ * copyright notice and this permission notice appear in all copies.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES</div><div class='add'>+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF</div><div class='add'>+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR</div><div class='add'>+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES</div><div class='add'>+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN</div><div class='add'>+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF</div><div class='add'>+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bits.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/mfd/syscon.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/platform_data/b53.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+</div><div class='add'>+#include "b53_priv.h"</div><div class='add'>+</div><div class='add'>+#define BCM63XX_EPHY_REG 0x3C</div><div class='add'>+#define BCM63268_GPHY_REG 0x54</div><div class='add'>+</div><div class='add'>+#define GPHY_CTRL_LOW_PWR	BIT(3)</div><div class='add'>+#define GPHY_CTRL_IDDQ_BIAS	BIT(0)</div><div class='add'>+</div><div class='add'>+struct b53_phy_info {</div><div class='add'>+	u32 gphy_port_mask;</div><div class='add'>+	u32 ephy_enable_mask;</div><div class='add'>+	u32 ephy_port_mask;</div><div class='add'>+	u32 ephy_bias_bit;</div><div class='add'>+	const u32 *ephy_offset;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct b53_mmap_priv {</div><div class='add'>+	void __iomem *regs;</div><div class='add'>+	struct regmap *gpio_ctrl;</div><div class='add'>+	const struct b53_phy_info *phy_info;</div><div class='add'>+	u32 phys_enabled;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 bcm6318_ephy_offsets[] = {4, 5, 6, 7};</div><div class='add'>+</div><div class='add'>+static const struct b53_phy_info bcm6318_ephy_info = {</div><div class='add'>+	.ephy_enable_mask = BIT(0) | BIT(4) | BIT(8) | BIT(12) | BIT(16),</div><div class='add'>+	.ephy_port_mask = GENMASK((ARRAY_SIZE(bcm6318_ephy_offsets) - 1), 0),</div><div class='add'>+	.ephy_bias_bit = 24,</div><div class='add'>+	.ephy_offset = bcm6318_ephy_offsets,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 bcm6368_ephy_offsets[] = {2, 3, 4, 5};</div><div class='add'>+</div><div class='add'>+static const struct b53_phy_info bcm6368_ephy_info = {</div><div class='add'>+	.ephy_enable_mask = BIT(0),</div><div class='add'>+	.ephy_port_mask = GENMASK((ARRAY_SIZE(bcm6368_ephy_offsets) - 1), 0),</div><div class='add'>+	.ephy_bias_bit = 0,</div><div class='add'>+	.ephy_offset = bcm6368_ephy_offsets,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 bcm63268_ephy_offsets[] = {4, 9, 14};</div><div class='add'>+</div><div class='add'>+static const struct b53_phy_info bcm63268_ephy_info = {</div><div class='add'>+	.gphy_port_mask = BIT(3),</div><div class='add'>+	.ephy_enable_mask = GENMASK(4, 0),</div><div class='add'>+	.ephy_port_mask = GENMASK((ARRAY_SIZE(bcm63268_ephy_offsets) - 1), 0),</div><div class='add'>+	.ephy_bias_bit = 24,</div><div class='add'>+	.ephy_offset = bcm63268_ephy_offsets,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int b53_mmap_read8(struct b53_device *dev, u8 page, u8 reg, u8 *val)</div><div class='add'>+{</div><div class='add'>+	struct b53_mmap_priv *priv = dev-&gt;priv;</div><div class='add'>+	void __iomem *regs = priv-&gt;regs;</div><div class='add'>+</div><div class='add'>+	*val = readb(regs + (page &lt;&lt; 8) + reg);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_mmap_read16(struct b53_device *dev, u8 page, u8 reg, u16 *val)</div><div class='add'>+{</div><div class='add'>+	struct b53_mmap_priv *priv = dev-&gt;priv;</div><div class='add'>+	void __iomem *regs = priv-&gt;regs;</div><div class='add'>+</div><div class='add'>+	if (WARN_ON(reg % 2))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;pdata &amp;&amp; dev-&gt;pdata-&gt;big_endian)</div><div class='add'>+		*val = ioread16be(regs + (page &lt;&lt; 8) + reg);</div><div class='add'>+	else</div><div class='add'>+		*val = readw(regs + (page &lt;&lt; 8) + reg);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_mmap_read32(struct b53_device *dev, u8 page, u8 reg, u32 *val)</div><div class='add'>+{</div><div class='add'>+	struct b53_mmap_priv *priv = dev-&gt;priv;</div><div class='add'>+	void __iomem *regs = priv-&gt;regs;</div><div class='add'>+</div><div class='add'>+	if (WARN_ON(reg % 4))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;pdata &amp;&amp; dev-&gt;pdata-&gt;big_endian)</div><div class='add'>+		*val = ioread32be(regs + (page &lt;&lt; 8) + reg);</div><div class='add'>+	else</div><div class='add'>+		*val = readl(regs + (page &lt;&lt; 8) + reg);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_mmap_read48(struct b53_device *dev, u8 page, u8 reg, u64 *val)</div><div class='add'>+{</div><div class='add'>+	struct b53_mmap_priv *priv = dev-&gt;priv;</div><div class='add'>+	void __iomem *regs = priv-&gt;regs;</div><div class='add'>+</div><div class='add'>+	if (WARN_ON(reg % 2))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (reg % 4) {</div><div class='add'>+		u16 lo;</div><div class='add'>+		u32 hi;</div><div class='add'>+</div><div class='add'>+		if (dev-&gt;pdata &amp;&amp; dev-&gt;pdata-&gt;big_endian) {</div><div class='add'>+			lo = ioread16be(regs + (page &lt;&lt; 8) + reg);</div><div class='add'>+			hi = ioread32be(regs + (page &lt;&lt; 8) + reg + 2);</div><div class='add'>+		} else {</div><div class='add'>+			lo = readw(regs + (page &lt;&lt; 8) + reg);</div><div class='add'>+			hi = readl(regs + (page &lt;&lt; 8) + reg + 2);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		*val = ((u64)hi &lt;&lt; 16) | lo;</div><div class='add'>+	} else {</div><div class='add'>+		u32 lo;</div><div class='add'>+		u16 hi;</div><div class='add'>+</div><div class='add'>+		if (dev-&gt;pdata &amp;&amp; dev-&gt;pdata-&gt;big_endian) {</div><div class='add'>+			lo = ioread32be(regs + (page &lt;&lt; 8) + reg);</div><div class='add'>+			hi = ioread16be(regs + (page &lt;&lt; 8) + reg + 4);</div><div class='add'>+		} else {</div><div class='add'>+			lo = readl(regs + (page &lt;&lt; 8) + reg);</div><div class='add'>+			hi = readw(regs + (page &lt;&lt; 8) + reg + 4);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		*val = ((u64)hi &lt;&lt; 32) | lo;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_mmap_read64(struct b53_device *dev, u8 page, u8 reg, u64 *val)</div><div class='add'>+{</div><div class='add'>+	struct b53_mmap_priv *priv = dev-&gt;priv;</div><div class='add'>+	void __iomem *regs = priv-&gt;regs;</div><div class='add'>+	u32 hi, lo;</div><div class='add'>+</div><div class='add'>+	if (WARN_ON(reg % 4))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;pdata &amp;&amp; dev-&gt;pdata-&gt;big_endian) {</div><div class='add'>+		lo = ioread32be(regs + (page &lt;&lt; 8) + reg);</div><div class='add'>+		hi = ioread32be(regs + (page &lt;&lt; 8) + reg + 4);</div><div class='add'>+	} else {</div><div class='add'>+		lo = readl(regs + (page &lt;&lt; 8) + reg);</div><div class='add'>+		hi = readl(regs + (page &lt;&lt; 8) + reg + 4);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*val = ((u64)hi &lt;&lt; 32) | lo;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_mmap_write8(struct b53_device *dev, u8 page, u8 reg, u8 value)</div><div class='add'>+{</div><div class='add'>+	struct b53_mmap_priv *priv = dev-&gt;priv;</div><div class='add'>+	void __iomem *regs = priv-&gt;regs;</div><div class='add'>+</div><div class='add'>+	writeb(value, regs + (page &lt;&lt; 8) + reg);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_mmap_write16(struct b53_device *dev, u8 page, u8 reg,</div><div class='add'>+			    u16 value)</div><div class='add'>+{</div><div class='add'>+	struct b53_mmap_priv *priv = dev-&gt;priv;</div><div class='add'>+	void __iomem *regs = priv-&gt;regs;</div><div class='add'>+</div><div class='add'>+	if (WARN_ON(reg % 2))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;pdata &amp;&amp; dev-&gt;pdata-&gt;big_endian)</div><div class='add'>+		iowrite16be(value, regs + (page &lt;&lt; 8) + reg);</div><div class='add'>+	else</div><div class='add'>+		writew(value, regs + (page &lt;&lt; 8) + reg);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_mmap_write32(struct b53_device *dev, u8 page, u8 reg,</div><div class='add'>+			    u32 value)</div><div class='add'>+{</div><div class='add'>+	struct b53_mmap_priv *priv = dev-&gt;priv;</div><div class='add'>+	void __iomem *regs = priv-&gt;regs;</div><div class='add'>+</div><div class='add'>+	if (WARN_ON(reg % 4))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;pdata &amp;&amp; dev-&gt;pdata-&gt;big_endian)</div><div class='add'>+		iowrite32be(value, regs + (page &lt;&lt; 8) + reg);</div><div class='add'>+	else</div><div class='add'>+		writel(value, regs + (page &lt;&lt; 8) + reg);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_mmap_write48(struct b53_device *dev, u8 page, u8 reg,</div><div class='add'>+			    u64 value)</div><div class='add'>+{</div><div class='add'>+	if (WARN_ON(reg % 2))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (reg % 4) {</div><div class='add'>+		u32 hi = (u32)(value &gt;&gt; 16);</div><div class='add'>+		u16 lo = (u16)value;</div><div class='add'>+</div><div class='add'>+		b53_mmap_write16(dev, page, reg, lo);</div><div class='add'>+		b53_mmap_write32(dev, page, reg + 2, hi);</div><div class='add'>+	} else {</div><div class='add'>+		u16 hi = (u16)(value &gt;&gt; 32);</div><div class='add'>+		u32 lo = (u32)value;</div><div class='add'>+</div><div class='add'>+		b53_mmap_write32(dev, page, reg, lo);</div><div class='add'>+		b53_mmap_write16(dev, page, reg + 4, hi);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_mmap_write64(struct b53_device *dev, u8 page, u8 reg,</div><div class='add'>+			    u64 value)</div><div class='add'>+{</div><div class='add'>+	u32 hi, lo;</div><div class='add'>+</div><div class='add'>+	hi = upper_32_bits(value);</div><div class='add'>+	lo = lower_32_bits(value);</div><div class='add'>+</div><div class='add'>+	if (WARN_ON(reg % 4))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	b53_mmap_write32(dev, page, reg, lo);</div><div class='add'>+	b53_mmap_write32(dev, page, reg + 4, hi);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_mmap_phy_read16(struct b53_device *dev, int addr, int reg,</div><div class='add'>+			       u16 *value)</div><div class='add'>+{</div><div class='add'>+	return -EIO;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_mmap_phy_write16(struct b53_device *dev, int addr, int reg,</div><div class='add'>+				u16 value)</div><div class='add'>+{</div><div class='add'>+	return -EIO;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bcm63xx_ephy_set(struct b53_device *dev, int port, bool enable)</div><div class='add'>+{</div><div class='add'>+	struct b53_mmap_priv *priv = dev-&gt;priv;</div><div class='add'>+	const struct b53_phy_info *info = priv-&gt;phy_info;</div><div class='add'>+	struct regmap *gpio_ctrl = priv-&gt;gpio_ctrl;</div><div class='add'>+	u32 mask, val;</div><div class='add'>+</div><div class='add'>+	if (enable) {</div><div class='add'>+		mask = (info-&gt;ephy_enable_mask &lt;&lt; info-&gt;ephy_offset[port])</div><div class='add'>+				| BIT(info-&gt;ephy_bias_bit);</div><div class='add'>+		val = 0;</div><div class='add'>+	} else {</div><div class='add'>+		mask = (info-&gt;ephy_enable_mask &lt;&lt; info-&gt;ephy_offset[port]);</div><div class='add'>+		if (!((priv-&gt;phys_enabled &amp; ~BIT(port)) &amp; info-&gt;ephy_port_mask))</div><div class='add'>+			mask |= BIT(info-&gt;ephy_bias_bit);</div><div class='add'>+		val = mask;</div><div class='add'>+	}</div><div class='add'>+	return regmap_update_bits(gpio_ctrl, BCM63XX_EPHY_REG, mask, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bcm63268_gphy_set(struct b53_device *dev, bool enable)</div><div class='add'>+{</div><div class='add'>+	struct b53_mmap_priv *priv = dev-&gt;priv;</div><div class='add'>+	struct regmap *gpio_ctrl = priv-&gt;gpio_ctrl;</div><div class='add'>+	u32 mask = GPHY_CTRL_IDDQ_BIAS | GPHY_CTRL_LOW_PWR;</div><div class='add'>+	u32 val = 0;</div><div class='add'>+</div><div class='add'>+	if (!enable)</div><div class='add'>+		val = mask;</div><div class='add'>+</div><div class='add'>+	return regmap_update_bits(gpio_ctrl, BCM63268_GPHY_REG, mask, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_mmap_phy_enable(struct b53_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	struct b53_mmap_priv *priv = dev-&gt;priv;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;phy_info) {</div><div class='add'>+		if (BIT(port) &amp; priv-&gt;phy_info-&gt;ephy_port_mask)</div><div class='add'>+			ret = bcm63xx_ephy_set(dev, port, true);</div><div class='add'>+		else if (BIT(port) &amp; priv-&gt;phy_info-&gt;gphy_port_mask)</div><div class='add'>+			ret = bcm63268_gphy_set(dev, true);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!ret)</div><div class='add'>+		priv-&gt;phys_enabled |= BIT(port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_mmap_phy_disable(struct b53_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	struct b53_mmap_priv *priv = dev-&gt;priv;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;phy_info) {</div><div class='add'>+		if (BIT(port) &amp; priv-&gt;phy_info-&gt;ephy_port_mask)</div><div class='add'>+			ret = bcm63xx_ephy_set(dev, port, false);</div><div class='add'>+		else if (BIT(port) &amp; priv-&gt;phy_info-&gt;gphy_port_mask)</div><div class='add'>+			ret = bcm63268_gphy_set(dev, false);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!ret)</div><div class='add'>+		priv-&gt;phys_enabled &amp;= ~BIT(port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct b53_io_ops b53_mmap_ops = {</div><div class='add'>+	.read8 = b53_mmap_read8,</div><div class='add'>+	.read16 = b53_mmap_read16,</div><div class='add'>+	.read32 = b53_mmap_read32,</div><div class='add'>+	.read48 = b53_mmap_read48,</div><div class='add'>+	.read64 = b53_mmap_read64,</div><div class='add'>+	.write8 = b53_mmap_write8,</div><div class='add'>+	.write16 = b53_mmap_write16,</div><div class='add'>+	.write32 = b53_mmap_write32,</div><div class='add'>+	.write48 = b53_mmap_write48,</div><div class='add'>+	.write64 = b53_mmap_write64,</div><div class='add'>+	.phy_read16 = b53_mmap_phy_read16,</div><div class='add'>+	.phy_write16 = b53_mmap_phy_write16,</div><div class='add'>+	.phy_enable = b53_mmap_phy_enable,</div><div class='add'>+	.phy_disable = b53_mmap_phy_disable,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int b53_mmap_probe_of(struct platform_device *pdev,</div><div class='add'>+			     struct b53_platform_data **ppdata)</div><div class='add'>+{</div><div class='add'>+	struct device_node *np = pdev-&gt;dev.of_node;</div><div class='add'>+	struct device_node *of_ports, *of_port;</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct b53_platform_data *pdata;</div><div class='add'>+	void __iomem *mem;</div><div class='add'>+</div><div class='add'>+	mem = devm_platform_ioremap_resource(pdev, 0);</div><div class='add'>+	if (IS_ERR(mem))</div><div class='add'>+		return PTR_ERR(mem);</div><div class='add'>+</div><div class='add'>+	pdata = devm_kzalloc(dev, sizeof(struct b53_platform_data),</div><div class='add'>+			     GFP_KERNEL);</div><div class='add'>+	if (!pdata)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	pdata-&gt;regs = mem;</div><div class='add'>+	pdata-&gt;chip_id = (u32)(unsigned long)device_get_match_data(dev);</div><div class='add'>+	pdata-&gt;big_endian = of_property_read_bool(np, "big-endian");</div><div class='add'>+</div><div class='add'>+	of_ports = of_get_child_by_name(np, "ports");</div><div class='add'>+	if (!of_ports) {</div><div class='add'>+		dev_err(dev, "no ports child node found\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for_each_available_child_of_node(of_ports, of_port) {</div><div class='add'>+		u32 reg;</div><div class='add'>+</div><div class='add'>+		if (of_property_read_u32(of_port, "reg", &amp;reg))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (reg &lt; B53_N_PORTS)</div><div class='add'>+			pdata-&gt;enabled_ports |= BIT(reg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	of_node_put(of_ports);</div><div class='add'>+	*ppdata = pdata;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_mmap_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct device_node *np = pdev-&gt;dev.of_node;</div><div class='add'>+	struct b53_platform_data *pdata = pdev-&gt;dev.platform_data;</div><div class='add'>+	struct b53_mmap_priv *priv;</div><div class='add'>+	struct b53_device *dev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!pdata &amp;&amp; np) {</div><div class='add'>+		ret = b53_mmap_probe_of(pdev, &amp;pdata);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(&amp;pdev-&gt;dev, "OF probe error\n");</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!pdata)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	priv = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv-&gt;regs = pdata-&gt;regs;</div><div class='add'>+</div><div class='add'>+	priv-&gt;gpio_ctrl = syscon_regmap_lookup_by_phandle(np, "brcm,gpio-ctrl");</div><div class='add'>+	if (!IS_ERR(priv-&gt;gpio_ctrl)) {</div><div class='add'>+		if (pdata-&gt;chip_id == BCM6318_DEVICE_ID ||</div><div class='add'>+		    pdata-&gt;chip_id == BCM6328_DEVICE_ID ||</div><div class='add'>+		    pdata-&gt;chip_id == BCM6362_DEVICE_ID)</div><div class='add'>+			priv-&gt;phy_info = &amp;bcm6318_ephy_info;</div><div class='add'>+		else if (pdata-&gt;chip_id == BCM6368_DEVICE_ID)</div><div class='add'>+			priv-&gt;phy_info = &amp;bcm6368_ephy_info;</div><div class='add'>+		else if (pdata-&gt;chip_id == BCM63268_DEVICE_ID)</div><div class='add'>+			priv-&gt;phy_info = &amp;bcm63268_ephy_info;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev = b53_switch_alloc(&amp;pdev-&gt;dev, &amp;b53_mmap_ops, priv);</div><div class='add'>+	if (!dev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	dev-&gt;pdata = pdata;</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, dev);</div><div class='add'>+</div><div class='add'>+	return b53_switch_register(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_mmap_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	if (dev)</div><div class='add'>+		b53_switch_remove(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_mmap_shutdown(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	if (dev)</div><div class='add'>+		b53_switch_shutdown(dev);</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id b53_mmap_of_table[] = {</div><div class='add'>+	{</div><div class='add'>+		.compatible = "brcm,bcm3384-switch",</div><div class='add'>+		.data = (void *)BCM63XX_DEVICE_ID,</div><div class='add'>+	}, {</div><div class='add'>+		.compatible = "brcm,bcm6318-switch",</div><div class='add'>+		.data = (void *)BCM6318_DEVICE_ID,</div><div class='add'>+	}, {</div><div class='add'>+		.compatible = "brcm,bcm6328-switch",</div><div class='add'>+		.data = (void *)BCM6328_DEVICE_ID,</div><div class='add'>+	}, {</div><div class='add'>+		.compatible = "brcm,bcm6362-switch",</div><div class='add'>+		.data = (void *)BCM6362_DEVICE_ID,</div><div class='add'>+	}, {</div><div class='add'>+		.compatible = "brcm,bcm6368-switch",</div><div class='add'>+		.data = (void *)BCM6368_DEVICE_ID,</div><div class='add'>+	}, {</div><div class='add'>+		.compatible = "brcm,bcm63268-switch",</div><div class='add'>+		.data = (void *)BCM63268_DEVICE_ID,</div><div class='add'>+	}, {</div><div class='add'>+		.compatible = "brcm,bcm63xx-switch",</div><div class='add'>+		.data = (void *)BCM63XX_DEVICE_ID,</div><div class='add'>+	}, { /* sentinel */ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, b53_mmap_of_table);</div><div class='add'>+</div><div class='add'>+static struct platform_driver b53_mmap_driver = {</div><div class='add'>+	.probe = b53_mmap_probe,</div><div class='add'>+	.remove = b53_mmap_remove,</div><div class='add'>+	.shutdown = b53_mmap_shutdown,</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "b53-switch",</div><div class='add'>+		.of_match_table = b53_mmap_of_table,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_platform_driver(b53_mmap_driver);</div><div class='add'>+MODULE_AUTHOR("Jonas Gorski &lt;jogo@openwrt.org&gt;");</div><div class='add'>+MODULE_DESCRIPTION("B53 MMAP access driver");</div><div class='add'>+MODULE_LICENSE("Dual BSD/GPL");</div><div class='head'>diff --git a/drivers/net/dsa/b53/b53_priv.h b/drivers/net/dsa/b53/b53_priv.h<br/>new file mode 100644<br/>index 000000000000..bd6849e5bb93<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/b53/b53_priv.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/b53/b53_priv.h</a></div><div class='hunk'>@@ -0,0 +1,548 @@</div><div class='add'>+/*</div><div class='add'>+ * B53 common definitions</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2011-2013 Jonas Gorski &lt;jogo@openwrt.org&gt;</div><div class='add'>+ *</div><div class='add'>+ * Permission to use, copy, modify, and/or distribute this software for any</div><div class='add'>+ * purpose with or without fee is hereby granted, provided that the above</div><div class='add'>+ * copyright notice and this permission notice appear in all copies.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES</div><div class='add'>+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF</div><div class='add'>+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR</div><div class='add'>+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES</div><div class='add'>+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN</div><div class='add'>+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF</div><div class='add'>+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __B53_PRIV_H</div><div class='add'>+#define __B53_PRIV_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/mutex.h&gt;</div><div class='add'>+#include &lt;linux/phylink.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+</div><div class='add'>+#include "b53_regs.h"</div><div class='add'>+</div><div class='add'>+struct b53_device;</div><div class='add'>+struct net_device;</div><div class='add'>+</div><div class='add'>+struct b53_io_ops {</div><div class='add'>+	int (*read8)(struct b53_device *dev, u8 page, u8 reg, u8 *value);</div><div class='add'>+	int (*read16)(struct b53_device *dev, u8 page, u8 reg, u16 *value);</div><div class='add'>+	int (*read32)(struct b53_device *dev, u8 page, u8 reg, u32 *value);</div><div class='add'>+	int (*read48)(struct b53_device *dev, u8 page, u8 reg, u64 *value);</div><div class='add'>+	int (*read64)(struct b53_device *dev, u8 page, u8 reg, u64 *value);</div><div class='add'>+	int (*write8)(struct b53_device *dev, u8 page, u8 reg, u8 value);</div><div class='add'>+	int (*write16)(struct b53_device *dev, u8 page, u8 reg, u16 value);</div><div class='add'>+	int (*write32)(struct b53_device *dev, u8 page, u8 reg, u32 value);</div><div class='add'>+	int (*write48)(struct b53_device *dev, u8 page, u8 reg, u64 value);</div><div class='add'>+	int (*write64)(struct b53_device *dev, u8 page, u8 reg, u64 value);</div><div class='add'>+	int (*phy_read16)(struct b53_device *dev, int addr, int reg, u16 *value);</div><div class='add'>+	int (*phy_write16)(struct b53_device *dev, int addr, int reg, u16 value);</div><div class='add'>+	int (*irq_enable)(struct b53_device *dev, int port);</div><div class='add'>+	void (*irq_disable)(struct b53_device *dev, int port);</div><div class='add'>+	void (*phy_enable)(struct b53_device *dev, int port);</div><div class='add'>+	void (*phy_disable)(struct b53_device *dev, int port);</div><div class='add'>+	void (*phylink_get_caps)(struct b53_device *dev, int port,</div><div class='add'>+				 struct phylink_config *config);</div><div class='add'>+	struct phylink_pcs *(*phylink_mac_select_pcs)(struct b53_device *dev,</div><div class='add'>+						      int port,</div><div class='add'>+						      phy_interface_t interface);</div><div class='add'>+	u8 (*serdes_map_lane)(struct b53_device *dev, int port);</div><div class='add'>+	void (*serdes_link_set)(struct b53_device *dev, int port,</div><div class='add'>+				unsigned int mode, phy_interface_t interface,</div><div class='add'>+				bool link_up);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct b53_arl_entry;</div><div class='add'>+</div><div class='add'>+struct b53_arl_ops {</div><div class='add'>+	void (*arl_read_entry)(struct b53_device *dev,</div><div class='add'>+			       struct b53_arl_entry *ent, u8 idx);</div><div class='add'>+	void (*arl_write_entry)(struct b53_device *dev,</div><div class='add'>+				const struct b53_arl_entry *ent, u8 idx);</div><div class='add'>+	void (*arl_search_read)(struct b53_device *dev, u8 idx,</div><div class='add'>+				struct b53_arl_entry *ent);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define B53_INVALID_LANE	0xff</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	BCM4908_DEVICE_ID = 0x4908,</div><div class='add'>+	BCM5325_DEVICE_ID = 0x25,</div><div class='add'>+	BCM5365_DEVICE_ID = 0x65,</div><div class='add'>+	BCM5389_DEVICE_ID = 0x89,</div><div class='add'>+	BCM5395_DEVICE_ID = 0x95,</div><div class='add'>+	BCM5397_DEVICE_ID = 0x97,</div><div class='add'>+	BCM5398_DEVICE_ID = 0x98,</div><div class='add'>+	BCM53101_DEVICE_ID = 0x53101,</div><div class='add'>+	BCM53115_DEVICE_ID = 0x53115,</div><div class='add'>+	BCM53125_DEVICE_ID = 0x53125,</div><div class='add'>+	BCM53128_DEVICE_ID = 0x53128,</div><div class='add'>+	BCM63XX_DEVICE_ID = 0x6300,</div><div class='add'>+	BCM6318_DEVICE_ID = 0x6318,</div><div class='add'>+	BCM6328_DEVICE_ID = 0x6328,</div><div class='add'>+	BCM6362_DEVICE_ID = 0x6362,</div><div class='add'>+	BCM6368_DEVICE_ID = 0x6368,</div><div class='add'>+	BCM63268_DEVICE_ID = 0x63268,</div><div class='add'>+	BCM53010_DEVICE_ID = 0x53010,</div><div class='add'>+	BCM53011_DEVICE_ID = 0x53011,</div><div class='add'>+	BCM53012_DEVICE_ID = 0x53012,</div><div class='add'>+	BCM53018_DEVICE_ID = 0x53018,</div><div class='add'>+	BCM53019_DEVICE_ID = 0x53019,</div><div class='add'>+	BCM58XX_DEVICE_ID = 0x5800,</div><div class='add'>+	BCM583XX_DEVICE_ID = 0x58300,</div><div class='add'>+	BCM7445_DEVICE_ID = 0x7445,</div><div class='add'>+	BCM7278_DEVICE_ID = 0x7278,</div><div class='add'>+	BCM53134_DEVICE_ID = 0x5075,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum b53_variant_id {</div><div class='add'>+	B53_VARIANT_NONE = 0,</div><div class='add'>+	B53_VARIANT_5325E,</div><div class='add'>+	B53_VARIANT_5325M,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct b53_pcs {</div><div class='add'>+	struct phylink_pcs pcs;</div><div class='add'>+	struct b53_device *dev;</div><div class='add'>+	u8 lane;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define B53_N_PORTS	9</div><div class='add'>+#define B53_N_PORTS_25	6</div><div class='add'>+#define B53_N_PCS	2</div><div class='add'>+</div><div class='add'>+struct b53_port {</div><div class='add'>+	u16		vlan_ctl_mask;</div><div class='add'>+	u16		pvid;</div><div class='add'>+	struct ethtool_keee eee;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct b53_vlan {</div><div class='add'>+	u16 members;</div><div class='add'>+	u16 untag;</div><div class='add'>+	bool valid;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct b53_device {</div><div class='add'>+	struct dsa_switch *ds;</div><div class='add'>+	struct b53_platform_data *pdata;</div><div class='add'>+	const char *name;</div><div class='add'>+</div><div class='add'>+	struct mutex reg_mutex;</div><div class='add'>+	struct mutex stats_mutex;</div><div class='add'>+	struct mutex arl_mutex;</div><div class='add'>+	const struct b53_io_ops *ops;</div><div class='add'>+	const struct b53_arl_ops *arl_ops;</div><div class='add'>+</div><div class='add'>+	/* chip specific data */</div><div class='add'>+	u32 chip_id;</div><div class='add'>+	enum b53_variant_id variant_id;</div><div class='add'>+	u8 core_rev;</div><div class='add'>+	u8 vta_regs[3];</div><div class='add'>+	u8 duplex_reg;</div><div class='add'>+	u8 jumbo_pm_reg;</div><div class='add'>+	u8 jumbo_size_reg;</div><div class='add'>+	int reset_gpio;</div><div class='add'>+	u8 num_arl_bins;</div><div class='add'>+	u16 num_arl_buckets;</div><div class='add'>+	enum dsa_tag_protocol tag_protocol;</div><div class='add'>+</div><div class='add'>+	/* used ports mask */</div><div class='add'>+	u16 enabled_ports;</div><div class='add'>+	unsigned int imp_port;</div><div class='add'>+</div><div class='add'>+	/* connect specific data */</div><div class='add'>+	u8 current_page;</div><div class='add'>+	struct device *dev;</div><div class='add'>+	u8 serdes_lane;</div><div class='add'>+</div><div class='add'>+	/* Master MDIO bus we got probed from */</div><div class='add'>+	struct mii_bus *bus;</div><div class='add'>+</div><div class='add'>+	void *priv;</div><div class='add'>+</div><div class='add'>+	/* run time configuration */</div><div class='add'>+	bool enable_jumbo;</div><div class='add'>+</div><div class='add'>+	unsigned int num_vlans;</div><div class='add'>+	struct b53_vlan *vlans;</div><div class='add'>+	bool vlan_enabled;</div><div class='add'>+	bool vlan_filtering;</div><div class='add'>+	unsigned int num_ports;</div><div class='add'>+	struct b53_port *ports;</div><div class='add'>+</div><div class='add'>+	struct b53_pcs pcs[B53_N_PCS];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define b53_for_each_port(dev, i) \</div><div class='add'>+	for (i = 0; i &lt; B53_N_PORTS; i++) \</div><div class='add'>+		if (dev-&gt;enabled_ports &amp; BIT(i))</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static inline int is5325(struct b53_device *dev)</div><div class='add'>+{</div><div class='add'>+	return dev-&gt;chip_id == BCM5325_DEVICE_ID;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int is5325e(struct b53_device *dev)</div><div class='add'>+{</div><div class='add'>+	return is5325(dev) &amp;&amp;</div><div class='add'>+		dev-&gt;variant_id == B53_VARIANT_5325E;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int is5325m(struct b53_device *dev)</div><div class='add'>+{</div><div class='add'>+	return is5325(dev) &amp;&amp;</div><div class='add'>+		dev-&gt;variant_id == B53_VARIANT_5325M;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int is5365(struct b53_device *dev)</div><div class='add'>+{</div><div class='add'>+#ifdef CONFIG_BCM47XX</div><div class='add'>+	return dev-&gt;chip_id == BCM5365_DEVICE_ID;</div><div class='add'>+#else</div><div class='add'>+	return 0;</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int is5397_98(struct b53_device *dev)</div><div class='add'>+{</div><div class='add'>+	return dev-&gt;chip_id == BCM5397_DEVICE_ID ||</div><div class='add'>+		dev-&gt;chip_id == BCM5398_DEVICE_ID;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int is539x(struct b53_device *dev)</div><div class='add'>+{</div><div class='add'>+	return dev-&gt;chip_id == BCM5395_DEVICE_ID ||</div><div class='add'>+		dev-&gt;chip_id == BCM5397_DEVICE_ID ||</div><div class='add'>+		dev-&gt;chip_id == BCM5398_DEVICE_ID;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int is531x5(struct b53_device *dev)</div><div class='add'>+{</div><div class='add'>+	return dev-&gt;chip_id == BCM53115_DEVICE_ID ||</div><div class='add'>+		dev-&gt;chip_id == BCM53125_DEVICE_ID ||</div><div class='add'>+		dev-&gt;chip_id == BCM53101_DEVICE_ID ||</div><div class='add'>+		dev-&gt;chip_id == BCM53128_DEVICE_ID ||</div><div class='add'>+		dev-&gt;chip_id == BCM53134_DEVICE_ID;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int is63xx(struct b53_device *dev)</div><div class='add'>+{</div><div class='add'>+	return dev-&gt;chip_id == BCM63XX_DEVICE_ID ||</div><div class='add'>+		dev-&gt;chip_id == BCM6318_DEVICE_ID ||</div><div class='add'>+		dev-&gt;chip_id == BCM6328_DEVICE_ID ||</div><div class='add'>+		dev-&gt;chip_id == BCM6362_DEVICE_ID ||</div><div class='add'>+		dev-&gt;chip_id == BCM6368_DEVICE_ID ||</div><div class='add'>+		dev-&gt;chip_id == BCM63268_DEVICE_ID;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int is6318_268(struct b53_device *dev)</div><div class='add'>+{</div><div class='add'>+	return dev-&gt;chip_id == BCM6318_DEVICE_ID ||</div><div class='add'>+		dev-&gt;chip_id == BCM63268_DEVICE_ID;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int is5301x(struct b53_device *dev)</div><div class='add'>+{</div><div class='add'>+	return dev-&gt;chip_id == BCM53010_DEVICE_ID ||</div><div class='add'>+		dev-&gt;chip_id == BCM53011_DEVICE_ID ||</div><div class='add'>+		dev-&gt;chip_id == BCM53012_DEVICE_ID ||</div><div class='add'>+		dev-&gt;chip_id == BCM53018_DEVICE_ID ||</div><div class='add'>+		dev-&gt;chip_id == BCM53019_DEVICE_ID;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int is58xx(struct b53_device *dev)</div><div class='add'>+{</div><div class='add'>+	return dev-&gt;chip_id == BCM58XX_DEVICE_ID ||</div><div class='add'>+		dev-&gt;chip_id == BCM583XX_DEVICE_ID ||</div><div class='add'>+		dev-&gt;chip_id == BCM7445_DEVICE_ID ||</div><div class='add'>+		dev-&gt;chip_id == BCM7278_DEVICE_ID ||</div><div class='add'>+		dev-&gt;chip_id == BCM53134_DEVICE_ID;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define B53_63XX_RGMII0	4</div><div class='add'>+#define B53_CPU_PORT_25	5</div><div class='add'>+#define B53_CPU_PORT	8</div><div class='add'>+</div><div class='add'>+static inline unsigned int b53_max_arl_entries(struct b53_device *dev)</div><div class='add'>+{</div><div class='add'>+	return dev-&gt;num_arl_buckets * dev-&gt;num_arl_bins;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct b53_device *b53_switch_alloc(struct device *base,</div><div class='add'>+				    const struct b53_io_ops *ops,</div><div class='add'>+				    void *priv);</div><div class='add'>+</div><div class='add'>+int b53_switch_detect(struct b53_device *dev);</div><div class='add'>+</div><div class='add'>+int b53_switch_register(struct b53_device *dev);</div><div class='add'>+</div><div class='add'>+static inline void b53_switch_remove(struct b53_device *dev)</div><div class='add'>+{</div><div class='add'>+	dsa_unregister_switch(dev-&gt;ds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void b53_switch_shutdown(struct b53_device *dev)</div><div class='add'>+{</div><div class='add'>+	dsa_switch_shutdown(dev-&gt;ds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define b53_build_op(type_op_size, val_type)				\</div><div class='add'>+static inline int b53_##type_op_size(struct b53_device *dev, u8 page,	\</div><div class='add'>+				     u8 reg, val_type val)		\</div><div class='add'>+{									\</div><div class='add'>+	int ret;							\</div><div class='add'>+									\</div><div class='add'>+	mutex_lock(&amp;dev-&gt;reg_mutex);					\</div><div class='add'>+	ret = dev-&gt;ops-&gt;type_op_size(dev, page, reg, val);		\</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;reg_mutex);					\</div><div class='add'>+									\</div><div class='add'>+	return ret;							\</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+b53_build_op(read8, u8 *);</div><div class='add'>+b53_build_op(read16, u16 *);</div><div class='add'>+b53_build_op(read32, u32 *);</div><div class='add'>+b53_build_op(read48, u64 *);</div><div class='add'>+b53_build_op(read64, u64 *);</div><div class='add'>+</div><div class='add'>+b53_build_op(write8, u8);</div><div class='add'>+b53_build_op(write16, u16);</div><div class='add'>+b53_build_op(write32, u32);</div><div class='add'>+b53_build_op(write48, u64);</div><div class='add'>+b53_build_op(write64, u64);</div><div class='add'>+</div><div class='add'>+struct b53_arl_entry {</div><div class='add'>+	u16 port;</div><div class='add'>+	u8 mac[ETH_ALEN];</div><div class='add'>+	u16 vid;</div><div class='add'>+	u8 is_valid:1;</div><div class='add'>+	u8 is_age:1;</div><div class='add'>+	u8 is_static:1;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline void b53_arl_to_entry(struct b53_arl_entry *ent,</div><div class='add'>+				    u64 mac_vid, u32 fwd_entry)</div><div class='add'>+{</div><div class='add'>+	memset(ent, 0, sizeof(*ent));</div><div class='add'>+	ent-&gt;port = fwd_entry &amp; ARLTBL_DATA_PORT_ID_MASK;</div><div class='add'>+	ent-&gt;is_valid = !!(fwd_entry &amp; ARLTBL_VALID);</div><div class='add'>+	ent-&gt;is_age = !!(fwd_entry &amp; ARLTBL_AGE);</div><div class='add'>+	ent-&gt;is_static = !!(fwd_entry &amp; ARLTBL_STATIC);</div><div class='add'>+	u64_to_ether_addr(mac_vid, ent-&gt;mac);</div><div class='add'>+	ent-&gt;vid = mac_vid &gt;&gt; ARLTBL_VID_S;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void b53_arl_to_entry_25(struct b53_arl_entry *ent,</div><div class='add'>+				       u64 mac_vid, u8 vid_entry)</div><div class='add'>+{</div><div class='add'>+	memset(ent, 0, sizeof(*ent));</div><div class='add'>+	ent-&gt;is_valid = !!(mac_vid &amp; ARLTBL_VALID_25);</div><div class='add'>+	ent-&gt;is_age = !!(mac_vid &amp; ARLTBL_AGE_25);</div><div class='add'>+	ent-&gt;is_static = !!(mac_vid &amp; ARLTBL_STATIC_25);</div><div class='add'>+	u64_to_ether_addr(mac_vid, ent-&gt;mac);</div><div class='add'>+	ent-&gt;port = (mac_vid &amp; ARLTBL_DATA_PORT_ID_MASK_25) &gt;&gt;</div><div class='add'>+		     ARLTBL_DATA_PORT_ID_S_25;</div><div class='add'>+	if (is_unicast_ether_addr(ent-&gt;mac) &amp;&amp; ent-&gt;port == B53_CPU_PORT)</div><div class='add'>+		ent-&gt;port = B53_CPU_PORT_25;</div><div class='add'>+	ent-&gt;vid = vid_entry;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void b53_arl_to_entry_89(struct b53_arl_entry *ent,</div><div class='add'>+				       u64 mac_vid, u16 fwd_entry)</div><div class='add'>+{</div><div class='add'>+	memset(ent, 0, sizeof(*ent));</div><div class='add'>+	ent-&gt;port = fwd_entry &amp; ARLTBL_DATA_PORT_ID_MASK_89;</div><div class='add'>+	ent-&gt;is_valid = !!(fwd_entry &amp; ARLTBL_VALID_89);</div><div class='add'>+	ent-&gt;is_age = !!(fwd_entry &amp; ARLTBL_AGE_89);</div><div class='add'>+	ent-&gt;is_static = !!(fwd_entry &amp; ARLTBL_STATIC_89);</div><div class='add'>+	u64_to_ether_addr(mac_vid, ent-&gt;mac);</div><div class='add'>+	ent-&gt;vid = mac_vid &gt;&gt; ARLTBL_VID_S;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void b53_arl_from_entry(u64 *mac_vid, u32 *fwd_entry,</div><div class='add'>+				      const struct b53_arl_entry *ent)</div><div class='add'>+{</div><div class='add'>+	*mac_vid = ether_addr_to_u64(ent-&gt;mac);</div><div class='add'>+	*mac_vid |= (u64)(ent-&gt;vid &amp; ARLTBL_VID_MASK) &lt;&lt; ARLTBL_VID_S;</div><div class='add'>+	*fwd_entry = ent-&gt;port &amp; ARLTBL_DATA_PORT_ID_MASK;</div><div class='add'>+	if (ent-&gt;is_valid)</div><div class='add'>+		*fwd_entry |= ARLTBL_VALID;</div><div class='add'>+	if (ent-&gt;is_static)</div><div class='add'>+		*fwd_entry |= ARLTBL_STATIC;</div><div class='add'>+	if (ent-&gt;is_age)</div><div class='add'>+		*fwd_entry |= ARLTBL_AGE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void b53_arl_from_entry_25(u64 *mac_vid, u8 *vid_entry,</div><div class='add'>+					 const struct b53_arl_entry *ent)</div><div class='add'>+{</div><div class='add'>+	*mac_vid = ether_addr_to_u64(ent-&gt;mac);</div><div class='add'>+	if (is_unicast_ether_addr(ent-&gt;mac) &amp;&amp; ent-&gt;port == B53_CPU_PORT_25)</div><div class='add'>+		*mac_vid |= (u64)B53_CPU_PORT &lt;&lt; ARLTBL_DATA_PORT_ID_S_25;</div><div class='add'>+	else</div><div class='add'>+		*mac_vid |= ((u64)ent-&gt;port &lt;&lt; ARLTBL_DATA_PORT_ID_S_25) &amp;</div><div class='add'>+			    ARLTBL_DATA_PORT_ID_MASK_25;</div><div class='add'>+	if (ent-&gt;is_valid)</div><div class='add'>+		*mac_vid |= ARLTBL_VALID_25;</div><div class='add'>+	if (ent-&gt;is_static)</div><div class='add'>+		*mac_vid |= ARLTBL_STATIC_25;</div><div class='add'>+	if (ent-&gt;is_age)</div><div class='add'>+		*mac_vid |= ARLTBL_AGE_25;</div><div class='add'>+	*vid_entry = ent-&gt;vid;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void b53_arl_from_entry_89(u64 *mac_vid, u32 *fwd_entry,</div><div class='add'>+					 const struct b53_arl_entry *ent)</div><div class='add'>+{</div><div class='add'>+	*mac_vid = ether_addr_to_u64(ent-&gt;mac);</div><div class='add'>+	*mac_vid |= (u64)(ent-&gt;vid &amp; ARLTBL_VID_MASK) &lt;&lt; ARLTBL_VID_S;</div><div class='add'>+	*fwd_entry = ent-&gt;port &amp; ARLTBL_DATA_PORT_ID_MASK_89;</div><div class='add'>+	if (ent-&gt;is_valid)</div><div class='add'>+		*fwd_entry |= ARLTBL_VALID_89;</div><div class='add'>+	if (ent-&gt;is_static)</div><div class='add'>+		*fwd_entry |= ARLTBL_STATIC_89;</div><div class='add'>+	if (ent-&gt;is_age)</div><div class='add'>+		*fwd_entry |= ARLTBL_AGE_89;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void b53_arl_search_to_entry_25(struct b53_arl_entry *ent,</div><div class='add'>+					      u64 mac_vid, u8 ext)</div><div class='add'>+{</div><div class='add'>+	memset(ent, 0, sizeof(*ent));</div><div class='add'>+	ent-&gt;is_valid = !!(mac_vid &amp; ARLTBL_VALID_25);</div><div class='add'>+	ent-&gt;is_age = !!(mac_vid &amp; ARLTBL_AGE_25);</div><div class='add'>+	ent-&gt;is_static = !!(mac_vid &amp; ARLTBL_STATIC_25);</div><div class='add'>+	u64_to_ether_addr(mac_vid, ent-&gt;mac);</div><div class='add'>+	ent-&gt;vid = (mac_vid &amp; ARL_SRCH_RSLT_VID_MASK_25) &gt;&gt;</div><div class='add'>+		   ARL_SRCH_RSLT_VID_S_25;</div><div class='add'>+	ent-&gt;port = (mac_vid &amp; ARL_SRCH_RSLT_PORT_ID_MASK_25) &gt;&gt;</div><div class='add'>+		    ARL_SRCH_RSLT_PORT_ID_S_25;</div><div class='add'>+	if (is_multicast_ether_addr(ent-&gt;mac) &amp;&amp; (ext &amp; ARL_SRCH_RSLT_EXT_MC_MII))</div><div class='add'>+		ent-&gt;port |= BIT(B53_CPU_PORT_25);</div><div class='add'>+	else if (!is_multicast_ether_addr(ent-&gt;mac) &amp;&amp; ent-&gt;port == B53_CPU_PORT)</div><div class='add'>+		ent-&gt;port = B53_CPU_PORT_25;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void b53_arl_search_to_entry_63xx(struct b53_arl_entry *ent,</div><div class='add'>+						u64 mac_vid, u16 fwd_entry)</div><div class='add'>+{</div><div class='add'>+	memset(ent, 0, sizeof(*ent));</div><div class='add'>+	u64_to_ether_addr(mac_vid, ent-&gt;mac);</div><div class='add'>+	ent-&gt;vid = mac_vid &gt;&gt; ARLTBL_VID_S;</div><div class='add'>+</div><div class='add'>+	ent-&gt;port = fwd_entry &amp; ARL_SRST_PORT_ID_MASK_63XX;</div><div class='add'>+	ent-&gt;port &gt;&gt;= 1;</div><div class='add'>+</div><div class='add'>+	ent-&gt;is_age = !!(fwd_entry &amp; ARL_SRST_AGE_63XX);</div><div class='add'>+	ent-&gt;is_static = !!(fwd_entry &amp; ARL_SRST_STATIC_63XX);</div><div class='add'>+	ent-&gt;is_valid = 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void b53_arl_read_entry(struct b53_device *dev,</div><div class='add'>+				      struct b53_arl_entry *ent, u8 idx)</div><div class='add'>+{</div><div class='add'>+	dev-&gt;arl_ops-&gt;arl_read_entry(dev, ent, idx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void b53_arl_write_entry(struct b53_device *dev,</div><div class='add'>+				       const struct b53_arl_entry *ent, u8 idx)</div><div class='add'>+{</div><div class='add'>+	dev-&gt;arl_ops-&gt;arl_write_entry(dev, ent, idx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void b53_arl_search_read(struct b53_device *dev, u8 idx,</div><div class='add'>+				       struct b53_arl_entry *ent)</div><div class='add'>+{</div><div class='add'>+	dev-&gt;arl_ops-&gt;arl_search_read(dev, idx, ent);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_BCM47XX</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bcm47xx_nvram.h&gt;</div><div class='add'>+#include &lt;bcm47xx_board.h&gt;</div><div class='add'>+static inline int b53_switch_get_reset_gpio(struct b53_device *dev)</div><div class='add'>+{</div><div class='add'>+	enum bcm47xx_board board = bcm47xx_board_get();</div><div class='add'>+</div><div class='add'>+	switch (board) {</div><div class='add'>+	case BCM47XX_BOARD_LINKSYS_WRT300NV11:</div><div class='add'>+	case BCM47XX_BOARD_LINKSYS_WRT310NV1:</div><div class='add'>+		return 8;</div><div class='add'>+	default:</div><div class='add'>+		return bcm47xx_nvram_gpio_pin("robo_reset");</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+#else</div><div class='add'>+static inline int b53_switch_get_reset_gpio(struct b53_device *dev)</div><div class='add'>+{</div><div class='add'>+	return -ENOENT;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+/* Exported functions towards other drivers */</div><div class='add'>+void b53_imp_vlan_setup(struct dsa_switch *ds, int cpu_port);</div><div class='add'>+int b53_configure_vlan(struct dsa_switch *ds);</div><div class='add'>+void b53_get_strings(struct dsa_switch *ds, int port, u32 stringset,</div><div class='add'>+		     uint8_t *data);</div><div class='add'>+void b53_get_ethtool_stats(struct dsa_switch *ds, int port, uint64_t *data);</div><div class='add'>+int b53_get_sset_count(struct dsa_switch *ds, int port, int sset);</div><div class='add'>+void b53_get_ethtool_phy_stats(struct dsa_switch *ds, int port, uint64_t *data);</div><div class='add'>+int b53_set_ageing_time(struct dsa_switch *ds, unsigned int msecs);</div><div class='add'>+int b53_br_join(struct dsa_switch *ds, int port, struct dsa_bridge bridge,</div><div class='add'>+		bool *tx_fwd_offload, struct netlink_ext_ack *extack);</div><div class='add'>+void b53_br_leave(struct dsa_switch *ds, int port, struct dsa_bridge bridge);</div><div class='add'>+void b53_br_set_stp_state(struct dsa_switch *ds, int port, u8 state);</div><div class='add'>+void b53_br_fast_age(struct dsa_switch *ds, int port);</div><div class='add'>+int b53_br_flags_pre(struct dsa_switch *ds, int port,</div><div class='add'>+		     struct switchdev_brport_flags flags,</div><div class='add'>+		     struct netlink_ext_ack *extack);</div><div class='add'>+int b53_br_flags(struct dsa_switch *ds, int port,</div><div class='add'>+		 struct switchdev_brport_flags flags,</div><div class='add'>+		 struct netlink_ext_ack *extack);</div><div class='add'>+int b53_setup_devlink_resources(struct dsa_switch *ds);</div><div class='add'>+void b53_port_event(struct dsa_switch *ds, int port);</div><div class='add'>+int b53_vlan_filtering(struct dsa_switch *ds, int port, bool vlan_filtering,</div><div class='add'>+		       struct netlink_ext_ack *extack);</div><div class='add'>+int b53_vlan_add(struct dsa_switch *ds, int port,</div><div class='add'>+		 const struct switchdev_obj_port_vlan *vlan,</div><div class='add'>+		 struct netlink_ext_ack *extack);</div><div class='add'>+int b53_vlan_del(struct dsa_switch *ds, int port,</div><div class='add'>+		 const struct switchdev_obj_port_vlan *vlan);</div><div class='add'>+int b53_fdb_add(struct dsa_switch *ds, int port,</div><div class='add'>+		const unsigned char *addr, u16 vid,</div><div class='add'>+		struct dsa_db db);</div><div class='add'>+int b53_fdb_del(struct dsa_switch *ds, int port,</div><div class='add'>+		const unsigned char *addr, u16 vid,</div><div class='add'>+		struct dsa_db db);</div><div class='add'>+int b53_fdb_dump(struct dsa_switch *ds, int port,</div><div class='add'>+		 dsa_fdb_dump_cb_t *cb, void *data);</div><div class='add'>+int b53_mdb_add(struct dsa_switch *ds, int port,</div><div class='add'>+		const struct switchdev_obj_port_mdb *mdb,</div><div class='add'>+		struct dsa_db db);</div><div class='add'>+int b53_mdb_del(struct dsa_switch *ds, int port,</div><div class='add'>+		const struct switchdev_obj_port_mdb *mdb,</div><div class='add'>+		struct dsa_db db);</div><div class='add'>+int b53_mirror_add(struct dsa_switch *ds, int port,</div><div class='add'>+		   struct dsa_mall_mirror_tc_entry *mirror, bool ingress,</div><div class='add'>+		   struct netlink_ext_ack *extack);</div><div class='add'>+enum dsa_tag_protocol b53_get_tag_protocol(struct dsa_switch *ds, int port,</div><div class='add'>+					   enum dsa_tag_protocol mprot);</div><div class='add'>+void b53_mirror_del(struct dsa_switch *ds, int port,</div><div class='add'>+		    struct dsa_mall_mirror_tc_entry *mirror);</div><div class='add'>+int b53_setup_port(struct dsa_switch *ds, int port);</div><div class='add'>+int b53_enable_port(struct dsa_switch *ds, int port, struct phy_device *phy);</div><div class='add'>+void b53_disable_port(struct dsa_switch *ds, int port);</div><div class='add'>+void b53_brcm_hdr_setup(struct dsa_switch *ds, int port);</div><div class='add'>+int b53_eee_init(struct dsa_switch *ds, int port, struct phy_device *phy);</div><div class='add'>+bool b53_support_eee(struct dsa_switch *ds, int port);</div><div class='add'>+int b53_set_mac_eee(struct dsa_switch *ds, int port, struct ethtool_keee *e);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/dsa/b53/b53_regs.h b/drivers/net/dsa/b53/b53_regs.h<br/>new file mode 100644<br/>index 000000000000..54a278db67c9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/b53/b53_regs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/b53/b53_regs.h</a></div><div class='hunk'>@@ -0,0 +1,600 @@</div><div class='add'>+/*</div><div class='add'>+ * B53 register definitions</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2004 Broadcom Corporation</div><div class='add'>+ * Copyright (C) 2011-2013 Jonas Gorski &lt;jogo@openwrt.org&gt;</div><div class='add'>+ *</div><div class='add'>+ * Permission to use, copy, modify, and/or distribute this software for any</div><div class='add'>+ * purpose with or without fee is hereby granted, provided that the above</div><div class='add'>+ * copyright notice and this permission notice appear in all copies.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES</div><div class='add'>+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF</div><div class='add'>+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR</div><div class='add'>+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES</div><div class='add'>+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN</div><div class='add'>+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF</div><div class='add'>+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __B53_REGS_H</div><div class='add'>+#define __B53_REGS_H</div><div class='add'>+</div><div class='add'>+/* Management Port (SMP) Page offsets */</div><div class='add'>+#define B53_CTRL_PAGE			0x00 /* Control */</div><div class='add'>+#define B53_STAT_PAGE			0x01 /* Status */</div><div class='add'>+#define B53_MGMT_PAGE			0x02 /* Management Mode */</div><div class='add'>+#define B53_MIB_AC_PAGE			0x03 /* MIB Autocast */</div><div class='add'>+#define B53_ARLCTRL_PAGE		0x04 /* ARL Control */</div><div class='add'>+#define B53_ARLIO_PAGE			0x05 /* ARL Access */</div><div class='add'>+#define B53_FRAMEBUF_PAGE		0x06 /* Management frame access */</div><div class='add'>+#define B53_MEM_ACCESS_PAGE		0x08 /* Memory access */</div><div class='add'>+#define B53_IEEE_PAGE			0x0a /* IEEE 802.1X */</div><div class='add'>+</div><div class='add'>+/* PHY Registers */</div><div class='add'>+#define B53_PORT_MII_PAGE(i)		(0x10 + (i)) /* Port i MII Registers */</div><div class='add'>+#define B53_IM_PORT_PAGE		0x18 /* Inverse MII Port (to EMAC) */</div><div class='add'>+#define B53_ALL_PORT_PAGE		0x19 /* All ports MII (broadcast) */</div><div class='add'>+</div><div class='add'>+/* MIB registers */</div><div class='add'>+#define B53_MIB_PAGE(i)			(0x20 + (i))</div><div class='add'>+</div><div class='add'>+/* Quality of Service (QoS) Registers */</div><div class='add'>+#define B53_QOS_PAGE			0x30</div><div class='add'>+</div><div class='add'>+/* Port VLAN Page */</div><div class='add'>+#define B53_PVLAN_PAGE			0x31</div><div class='add'>+</div><div class='add'>+/* VLAN Registers */</div><div class='add'>+#define B53_VLAN_PAGE			0x34</div><div class='add'>+</div><div class='add'>+/* Jumbo Frame Registers */</div><div class='add'>+#define B53_JUMBO_PAGE			0x40</div><div class='add'>+</div><div class='add'>+/* EAP Registers */</div><div class='add'>+#define B53_EAP_PAGE			0x42</div><div class='add'>+</div><div class='add'>+/* EEE Control Registers Page */</div><div class='add'>+#define B53_EEE_PAGE			0x92</div><div class='add'>+</div><div class='add'>+/* CFP Configuration Registers Page */</div><div class='add'>+#define B53_CFP_PAGE			0xa1</div><div class='add'>+</div><div class='add'>+/*************************************************************************</div><div class='add'>+ * Control Page registers</div><div class='add'>+ *************************************************************************/</div><div class='add'>+</div><div class='add'>+/* Port Control Register (8 bit) */</div><div class='add'>+#define B53_PORT_CTRL(i)		(0x00 + (i))</div><div class='add'>+#define   PORT_CTRL_RX_DISABLE		BIT(0)</div><div class='add'>+#define   PORT_CTRL_TX_DISABLE		BIT(1)</div><div class='add'>+#define   PORT_CTRL_RX_BCST_EN		BIT(2) /* Broadcast RX (P8 only) */</div><div class='add'>+#define   PORT_CTRL_RX_MCST_EN		BIT(3) /* Multicast RX (P8 only) */</div><div class='add'>+#define   PORT_CTRL_RX_UCST_EN		BIT(4) /* Unicast RX (P8 only) */</div><div class='add'>+#define	  PORT_CTRL_STP_STATE_S		5</div><div class='add'>+#define   PORT_CTRL_NO_STP		(0 &lt;&lt; PORT_CTRL_STP_STATE_S)</div><div class='add'>+#define   PORT_CTRL_DIS_STATE		(1 &lt;&lt; PORT_CTRL_STP_STATE_S)</div><div class='add'>+#define   PORT_CTRL_BLOCK_STATE		(2 &lt;&lt; PORT_CTRL_STP_STATE_S)</div><div class='add'>+#define   PORT_CTRL_LISTEN_STATE	(3 &lt;&lt; PORT_CTRL_STP_STATE_S)</div><div class='add'>+#define   PORT_CTRL_LEARN_STATE		(4 &lt;&lt; PORT_CTRL_STP_STATE_S)</div><div class='add'>+#define   PORT_CTRL_FWD_STATE		(5 &lt;&lt; PORT_CTRL_STP_STATE_S)</div><div class='add'>+#define   PORT_CTRL_STP_STATE_MASK	(0x7 &lt;&lt; PORT_CTRL_STP_STATE_S)</div><div class='add'>+</div><div class='add'>+/* SMP Control Register (8 bit) */</div><div class='add'>+#define B53_SMP_CTRL			0x0a</div><div class='add'>+</div><div class='add'>+/* Switch Mode Control Register (8 bit) */</div><div class='add'>+#define B53_SWITCH_MODE			0x0b</div><div class='add'>+#define   SM_SW_FWD_MODE		BIT(0)	/* 1 = Managed Mode */</div><div class='add'>+#define   SM_SW_FWD_EN			BIT(1)	/* Forwarding Enable */</div><div class='add'>+</div><div class='add'>+/* IMP Port state override register (8 bit) */</div><div class='add'>+#define B53_PORT_OVERRIDE_CTRL		0x0e</div><div class='add'>+#define   PORT_OVERRIDE_LINK		BIT(0)</div><div class='add'>+#define   PORT_OVERRIDE_FULL_DUPLEX	BIT(1) /* 0 = Half Duplex */</div><div class='add'>+#define   PORT_OVERRIDE_SPEED_S		2</div><div class='add'>+#define   PORT_OVERRIDE_SPEED_10M	(0 &lt;&lt; PORT_OVERRIDE_SPEED_S)</div><div class='add'>+#define   PORT_OVERRIDE_SPEED_100M	(1 &lt;&lt; PORT_OVERRIDE_SPEED_S)</div><div class='add'>+#define   PORT_OVERRIDE_SPEED_1000M	(2 &lt;&lt; PORT_OVERRIDE_SPEED_S)</div><div class='add'>+#define   PORT_OVERRIDE_LP_FLOW_25	BIT(3) /* BCM5325 only */</div><div class='add'>+#define   PORT_OVERRIDE_RV_MII_25	BIT(4) /* BCM5325 only */</div><div class='add'>+#define   PORT_OVERRIDE_RX_FLOW		BIT(4)</div><div class='add'>+#define   PORT_OVERRIDE_TX_FLOW		BIT(5)</div><div class='add'>+#define   PORT_OVERRIDE_SPEED_2000M	BIT(6) /* BCM5301X only, requires setting 1000M */</div><div class='add'>+#define   PORT_OVERRIDE_EN		BIT(7) /* Use the register contents */</div><div class='add'>+</div><div class='add'>+/* Power-down mode control (8 bit) */</div><div class='add'>+#define B53_PD_MODE_CTRL_25		0x0f</div><div class='add'>+#define  PD_MODE_PORT_MASK		0x1f</div><div class='add'>+/* Bit 0 also powers down the switch. */</div><div class='add'>+#define  PD_MODE_POWER_DOWN_PORT(i)	BIT(i)</div><div class='add'>+</div><div class='add'>+/* IP Multicast control (8 bit) */</div><div class='add'>+#define B53_IP_MULTICAST_CTRL		0x21</div><div class='add'>+#define  B53_IP_MC			BIT(0)</div><div class='add'>+#define  B53_UC_FWD_EN			BIT(6)</div><div class='add'>+#define  B53_MC_FWD_EN			BIT(7)</div><div class='add'>+</div><div class='add'>+/* Switch control (8 bit) */</div><div class='add'>+#define B53_SWITCH_CTRL			0x22</div><div class='add'>+#define  B53_MII_DUMB_FWDG_EN		BIT(6)</div><div class='add'>+</div><div class='add'>+/* Protected Port Selection (16 bit) */</div><div class='add'>+#define B53_PROTECTED_PORT_SEL		0x24</div><div class='add'>+#define B53_PROTECTED_PORT_SEL_25	0x26</div><div class='add'>+</div><div class='add'>+/* (16 bit) */</div><div class='add'>+#define B53_UC_FLOOD_MASK		0x32</div><div class='add'>+#define B53_MC_FLOOD_MASK		0x34</div><div class='add'>+#define B53_IPMC_FLOOD_MASK		0x36</div><div class='add'>+#define B53_DIS_LEARNING		0x3c</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Override Ports 0-7 State on devices with xMII interfaces (8 bit)</div><div class='add'>+ *</div><div class='add'>+ * For port 8 still use B53_PORT_OVERRIDE_CTRL</div><div class='add'>+ * Please note that not all ports are available on every hardware, e.g. BCM5301X</div><div class='add'>+ * don't include overriding port 6, BCM63xx also have some limitations.</div><div class='add'>+ */</div><div class='add'>+#define B53_GMII_PORT_OVERRIDE_CTRL(i)	(0x58 + (i))</div><div class='add'>+#define   GMII_PO_LINK			BIT(0)</div><div class='add'>+#define   GMII_PO_FULL_DUPLEX		BIT(1) /* 0 = Half Duplex */</div><div class='add'>+#define   GMII_PO_SPEED_S		2</div><div class='add'>+#define   GMII_PO_SPEED_10M		(0 &lt;&lt; GMII_PO_SPEED_S)</div><div class='add'>+#define   GMII_PO_SPEED_100M		(1 &lt;&lt; GMII_PO_SPEED_S)</div><div class='add'>+#define   GMII_PO_SPEED_1000M		(2 &lt;&lt; GMII_PO_SPEED_S)</div><div class='add'>+#define   GMII_PO_RX_FLOW		BIT(4)</div><div class='add'>+#define   GMII_PO_TX_FLOW		BIT(5)</div><div class='add'>+#define   GMII_PO_EN			BIT(6) /* Use the register contents */</div><div class='add'>+#define   GMII_PO_SPEED_2000M		BIT(7) /* BCM5301X only, requires setting 1000M */</div><div class='add'>+</div><div class='add'>+#define B53_RGMII_CTRL_IMP		0x60</div><div class='add'>+#define   RGMII_CTRL_ENABLE_GMII	BIT(7)</div><div class='add'>+#define   RGMII_CTRL_MII_OVERRIDE	BIT(6)</div><div class='add'>+#define   RGMII_CTRL_TIMING_SEL		BIT(2)</div><div class='add'>+#define   RGMII_CTRL_DLL_RXC		BIT(1)</div><div class='add'>+#define   RGMII_CTRL_DLL_TXC		BIT(0)</div><div class='add'>+</div><div class='add'>+#define B53_RGMII_CTRL_P(i)		(B53_RGMII_CTRL_IMP + (i))</div><div class='add'>+</div><div class='add'>+/* Software reset register (8 bit) */</div><div class='add'>+#define B53_SOFTRESET			0x79</div><div class='add'>+#define   SW_RST			BIT(7)</div><div class='add'>+#define   EN_CH_RST			BIT(6)</div><div class='add'>+#define   EN_SW_RST			BIT(4)</div><div class='add'>+</div><div class='add'>+/* Fast Aging Control register (8 bit) */</div><div class='add'>+#define B53_FAST_AGE_CTRL		0x88</div><div class='add'>+#define   FAST_AGE_STATIC		BIT(0)</div><div class='add'>+#define   FAST_AGE_DYNAMIC		BIT(1)</div><div class='add'>+#define   FAST_AGE_PORT			BIT(2)</div><div class='add'>+#define   FAST_AGE_VLAN			BIT(3)</div><div class='add'>+#define   FAST_AGE_STP			BIT(4)</div><div class='add'>+#define   FAST_AGE_MC			BIT(5)</div><div class='add'>+#define   FAST_AGE_DONE			BIT(7)</div><div class='add'>+</div><div class='add'>+/* Fast Aging Port Control register (8 bit) */</div><div class='add'>+#define B53_FAST_AGE_PORT_CTRL		0x89</div><div class='add'>+</div><div class='add'>+/* Fast Aging VID Control register (16 bit) */</div><div class='add'>+#define B53_FAST_AGE_VID_CTRL		0x8a</div><div class='add'>+</div><div class='add'>+/*************************************************************************</div><div class='add'>+ * Status Page registers</div><div class='add'>+ *************************************************************************/</div><div class='add'>+</div><div class='add'>+/* Link Status Summary Register (16bit) */</div><div class='add'>+#define B53_LINK_STAT			0x00</div><div class='add'>+</div><div class='add'>+/* Link Status Change Register (16 bit) */</div><div class='add'>+#define B53_LINK_STAT_CHANGE		0x02</div><div class='add'>+</div><div class='add'>+/* Port Speed Summary Register (16 bit for FE, 32 bit for GE) */</div><div class='add'>+#define B53_SPEED_STAT			0x04</div><div class='add'>+#define  SPEED_PORT_FE(reg, port)	(((reg) &gt;&gt; (port)) &amp; 1)</div><div class='add'>+#define  SPEED_PORT_GE(reg, port)	(((reg) &gt;&gt; 2 * (port)) &amp; 3)</div><div class='add'>+#define  SPEED_STAT_10M			0</div><div class='add'>+#define  SPEED_STAT_100M		1</div><div class='add'>+#define  SPEED_STAT_1000M		2</div><div class='add'>+</div><div class='add'>+/* Duplex Status Summary (16 bit) */</div><div class='add'>+#define B53_DUPLEX_STAT_FE		0x06</div><div class='add'>+#define B53_DUPLEX_STAT_GE		0x08</div><div class='add'>+#define B53_DUPLEX_STAT_63XX		0x0c</div><div class='add'>+</div><div class='add'>+/* Revision ID register for BCM5325 */</div><div class='add'>+#define B53_REV_ID_25			0x50</div><div class='add'>+</div><div class='add'>+/* Strap Value (48 bit) */</div><div class='add'>+#define B53_STRAP_VALUE			0x70</div><div class='add'>+#define   SV_GMII_CTRL_115		BIT(27)</div><div class='add'>+</div><div class='add'>+/*************************************************************************</div><div class='add'>+ * Management Mode Page Registers</div><div class='add'>+ *************************************************************************/</div><div class='add'>+</div><div class='add'>+/* Global Management Config Register (8 bit) */</div><div class='add'>+#define B53_GLOBAL_CONFIG		0x00</div><div class='add'>+#define   GC_RESET_MIB			0x01</div><div class='add'>+#define   GC_RX_BPDU_EN			0x02</div><div class='add'>+#define   GC_MIB_AC_HDR_EN		0x10</div><div class='add'>+#define   GC_MIB_AC_EN			0x20</div><div class='add'>+#define   GC_FRM_MGMT_PORT_M		0xC0</div><div class='add'>+#define   GC_FRM_MGMT_PORT_04		0x00</div><div class='add'>+#define   GC_FRM_MGMT_PORT_MII		0x80</div><div class='add'>+</div><div class='add'>+/* Broadcom Header control register (8 bit) */</div><div class='add'>+#define B53_BRCM_HDR			0x03</div><div class='add'>+#define   BRCM_HDR_P8_EN		BIT(0) /* Enable tagging on port 8 */</div><div class='add'>+#define   BRCM_HDR_P5_EN		BIT(1) /* Enable tagging on port 5 */</div><div class='add'>+#define   BRCM_HDR_P7_EN		BIT(2) /* Enable tagging on port 7 */</div><div class='add'>+</div><div class='add'>+/* Aging Time control register (32 bit) */</div><div class='add'>+#define B53_AGING_TIME_CONTROL		0x06</div><div class='add'>+#define B53_AGING_TIME_CONTROL_63XX	0x08</div><div class='add'>+#define  AGE_CHANGE			BIT(20)</div><div class='add'>+#define  AGE_TIME_MASK			0x7ffff</div><div class='add'>+#define  AGE_TIME_MAX			1048575</div><div class='add'>+</div><div class='add'>+/* Mirror capture control register (16 bit) */</div><div class='add'>+#define B53_MIR_CAP_CTL			0x10</div><div class='add'>+#define  CAP_PORT_MASK			0xf</div><div class='add'>+#define  BLK_NOT_MIR			BIT(14)</div><div class='add'>+#define  MIRROR_EN			BIT(15)</div><div class='add'>+</div><div class='add'>+/* Ingress mirror control register (16 bit) */</div><div class='add'>+#define B53_IG_MIR_CTL			0x12</div><div class='add'>+#define  MIRROR_MASK			0x1ff</div><div class='add'>+#define  DIV_EN				BIT(13)</div><div class='add'>+#define  MIRROR_FILTER_MASK		0x3</div><div class='add'>+#define  MIRROR_FILTER_SHIFT		14</div><div class='add'>+#define  MIRROR_ALL			0</div><div class='add'>+#define  MIRROR_DA			1</div><div class='add'>+#define  MIRROR_SA			2</div><div class='add'>+</div><div class='add'>+/* Ingress mirror divider register (16 bit) */</div><div class='add'>+#define B53_IG_MIR_DIV			0x14</div><div class='add'>+#define  IN_MIRROR_DIV_MASK		0x3ff</div><div class='add'>+</div><div class='add'>+/* Ingress mirror MAC address register (48 bit) */</div><div class='add'>+#define B53_IG_MIR_MAC			0x16</div><div class='add'>+</div><div class='add'>+/* Egress mirror control register (16 bit) */</div><div class='add'>+#define B53_EG_MIR_CTL			0x1C</div><div class='add'>+</div><div class='add'>+/* Egress mirror divider register (16 bit) */</div><div class='add'>+#define B53_EG_MIR_DIV			0x1E</div><div class='add'>+</div><div class='add'>+/* Egress mirror MAC address register (48 bit) */</div><div class='add'>+#define B53_EG_MIR_MAC			0x20</div><div class='add'>+</div><div class='add'>+/* Device ID register (8 or 32 bit) */</div><div class='add'>+#define B53_DEVICE_ID			0x30</div><div class='add'>+</div><div class='add'>+/* Revision ID register (8 bit) */</div><div class='add'>+#define B53_REV_ID			0x40</div><div class='add'>+</div><div class='add'>+/* Broadcom header RX control (16 bit) */</div><div class='add'>+#define B53_BRCM_HDR_RX_DIS		0x60</div><div class='add'>+</div><div class='add'>+/* Broadcom header TX control (16 bit)	*/</div><div class='add'>+#define B53_BRCM_HDR_TX_DIS		0x62</div><div class='add'>+</div><div class='add'>+/*************************************************************************</div><div class='add'>+ * ARL Access Page Registers</div><div class='add'>+ *************************************************************************/</div><div class='add'>+</div><div class='add'>+/* VLAN Table Access Register (8 bit) */</div><div class='add'>+#define B53_VT_ACCESS			0x80</div><div class='add'>+#define B53_VT_ACCESS_9798		0x60 /* for BCM5397/BCM5398 */</div><div class='add'>+#define B53_VT_ACCESS_63XX		0x60 /* for BCM6328/62/68 */</div><div class='add'>+#define   VTA_CMD_WRITE			0</div><div class='add'>+#define   VTA_CMD_READ			1</div><div class='add'>+#define   VTA_CMD_CLEAR			2</div><div class='add'>+#define   VTA_START_CMD			BIT(7)</div><div class='add'>+</div><div class='add'>+/* VLAN Table Index Register (16 bit) */</div><div class='add'>+#define B53_VT_INDEX			0x81</div><div class='add'>+#define B53_VT_INDEX_9798		0x61</div><div class='add'>+#define B53_VT_INDEX_63XX		0x62</div><div class='add'>+</div><div class='add'>+/* VLAN Table Entry Register (32 bit) */</div><div class='add'>+#define B53_VT_ENTRY			0x83</div><div class='add'>+#define B53_VT_ENTRY_9798		0x63</div><div class='add'>+#define B53_VT_ENTRY_63XX		0x64</div><div class='add'>+#define   VTE_MEMBERS			0x1ff</div><div class='add'>+#define   VTE_UNTAG_S			9</div><div class='add'>+#define   VTE_UNTAG			(0x1ff &lt;&lt; 9)</div><div class='add'>+</div><div class='add'>+/*************************************************************************</div><div class='add'>+ * ARL I/O Registers</div><div class='add'>+ *************************************************************************/</div><div class='add'>+</div><div class='add'>+/* ARL Table Read/Write Register (8 bit) */</div><div class='add'>+#define B53_ARLTBL_RW_CTRL		0x00</div><div class='add'>+#define    ARLTBL_RW			BIT(0)</div><div class='add'>+#define    ARLTBL_IVL_SVL_SELECT	BIT(6)</div><div class='add'>+#define    ARLTBL_START_DONE		BIT(7)</div><div class='add'>+</div><div class='add'>+/* MAC Address Index Register (48 bit) */</div><div class='add'>+#define B53_MAC_ADDR_IDX		0x02</div><div class='add'>+</div><div class='add'>+/* VLAN ID Index Register (16 bit) */</div><div class='add'>+#define B53_VLAN_ID_IDX			0x08</div><div class='add'>+</div><div class='add'>+/* ARL Table MAC/VID Entry N Registers (64 bit)</div><div class='add'>+ *</div><div class='add'>+ * BCM5325 and BCM5365 share most definitions below</div><div class='add'>+ */</div><div class='add'>+#define B53_ARLTBL_MAC_VID_ENTRY(n)	((0x10 * (n)) + 0x10)</div><div class='add'>+#define   ARLTBL_MAC_MASK		0xffffffffffffULL</div><div class='add'>+#define   ARLTBL_VID_S			48</div><div class='add'>+#define   ARLTBL_VID_MASK		0xfff</div><div class='add'>+#define   ARLTBL_DATA_PORT_ID_S_25	48</div><div class='add'>+#define   ARLTBL_DATA_PORT_ID_MASK_25	GENMASK_ULL(53, 48)</div><div class='add'>+#define   ARLTBL_AGE_25			BIT_ULL(61)</div><div class='add'>+#define   ARLTBL_STATIC_25		BIT_ULL(62)</div><div class='add'>+#define   ARLTBL_VALID_25		BIT_ULL(63)</div><div class='add'>+</div><div class='add'>+/* ARL Table Data Entry N Registers (32 bit) */</div><div class='add'>+#define B53_ARLTBL_DATA_ENTRY(n)	((0x10 * (n)) + 0x18)</div><div class='add'>+#define   ARLTBL_DATA_PORT_ID_MASK	0x1ff</div><div class='add'>+#define   ARLTBL_TC(tc)			((3 &amp; tc) &lt;&lt; 11)</div><div class='add'>+#define   ARLTBL_AGE			BIT(14)</div><div class='add'>+#define   ARLTBL_STATIC			BIT(15)</div><div class='add'>+#define   ARLTBL_VALID			BIT(16)</div><div class='add'>+</div><div class='add'>+/* BCM5389 ARL Table Data Entry N Register format (16 bit) */</div><div class='add'>+#define   ARLTBL_DATA_PORT_ID_MASK_89	GENMASK(8, 0)</div><div class='add'>+#define   ARLTBL_TC_MASK_89		GENMASK(12, 10)</div><div class='add'>+#define   ARLTBL_AGE_89			BIT(13)</div><div class='add'>+#define   ARLTBL_STATIC_89		BIT(14)</div><div class='add'>+#define   ARLTBL_VALID_89		BIT(15)</div><div class='add'>+</div><div class='add'>+/* BCM5325/BCM565 ARL Table VID Entry N Registers (8 bit) */</div><div class='add'>+#define B53_ARLTBL_VID_ENTRY_25(n)	((0x2 * (n)) + 0x30)</div><div class='add'>+</div><div class='add'>+/* Maximum number of bin entries in the ARL for all switches */</div><div class='add'>+#define B53_ARLTBL_MAX_BIN_ENTRIES	4</div><div class='add'>+</div><div class='add'>+/* ARL Search Control Register (8 bit) */</div><div class='add'>+#define B53_ARL_SRCH_CTL		0x50</div><div class='add'>+#define B53_ARL_SRCH_CTL_25		0x20</div><div class='add'>+#define B53_ARL_SRCH_CTL_89		0x30</div><div class='add'>+#define   ARL_SRCH_VLID			BIT(0)</div><div class='add'>+#define   ARL_SRCH_STDN			BIT(7)</div><div class='add'>+</div><div class='add'>+/* ARL Search Address Register (16 bit) */</div><div class='add'>+#define B53_ARL_SRCH_ADDR		0x51</div><div class='add'>+#define B53_ARL_SRCH_ADDR_25		0x22</div><div class='add'>+#define B53_ARL_SRCH_ADDR_65		0x24</div><div class='add'>+#define B53_ARL_SRCH_ADDR_89		0x31</div><div class='add'>+#define B53_ARL_SRCH_ADDR_63XX		0x32</div><div class='add'>+#define  ARL_ADDR_MASK			GENMASK(14, 0)</div><div class='add'>+</div><div class='add'>+/* ARL Search MAC/VID Result (64 bit) */</div><div class='add'>+#define B53_ARL_SRCH_RSTL_0_MACVID	0x60</div><div class='add'>+#define B53_ARL_SRCH_RSLT_MACVID_89	0x33</div><div class='add'>+#define B53_ARL_SRCH_RSLT_MACVID_63XX	0x34</div><div class='add'>+</div><div class='add'>+/* Single register search result on 5325/5365 */</div><div class='add'>+#define B53_ARL_SRCH_RSTL_0_MACVID_25	0x24</div><div class='add'>+#define   ARL_SRCH_RSLT_PORT_ID_S_25	48</div><div class='add'>+#define   ARL_SRCH_RSLT_PORT_ID_MASK_25	GENMASK_ULL(52, 48)</div><div class='add'>+#define   ARL_SRCH_RSLT_VID_S_25	53</div><div class='add'>+#define   ARL_SRCH_RSLT_VID_MASK_25	GENMASK_ULL(60, 53)</div><div class='add'>+</div><div class='add'>+/* BCM5325/5365 Search result extend register (8 bit) */</div><div class='add'>+#define B53_ARL_SRCH_RSLT_EXT_25	0x2c</div><div class='add'>+#define   ARL_SRCH_RSLT_EXT_MC_MII	BIT(2)</div><div class='add'>+</div><div class='add'>+/* ARL Search Data Result (32 bit) */</div><div class='add'>+#define B53_ARL_SRCH_RSTL_0		0x68</div><div class='add'>+</div><div class='add'>+/* BCM5389 ARL Search Data Result (16 bit) */</div><div class='add'>+#define B53_ARL_SRCH_RSLT_89		0x3b</div><div class='add'>+</div><div class='add'>+#define B53_ARL_SRCH_RSTL_MACVID(x)	(B53_ARL_SRCH_RSTL_0_MACVID + ((x) * 0x10))</div><div class='add'>+#define B53_ARL_SRCH_RSTL(x)		(B53_ARL_SRCH_RSTL_0 + ((x) * 0x10))</div><div class='add'>+</div><div class='add'>+/* 63XX ARL Search Data Result (16 bit) */</div><div class='add'>+#define B53_ARL_SRCH_RSLT_63XX		0x3c</div><div class='add'>+#define   ARL_SRST_PORT_ID_MASK_63XX	GENMASK(9, 1)</div><div class='add'>+#define   ARL_SRST_TC_MASK_63XX		GENMASK(13, 11)</div><div class='add'>+#define   ARL_SRST_AGE_63XX		BIT(14)</div><div class='add'>+#define   ARL_SRST_STATIC_63XX		BIT(15)</div><div class='add'>+</div><div class='add'>+/*************************************************************************</div><div class='add'>+ * IEEE 802.1X Registers</div><div class='add'>+ *************************************************************************/</div><div class='add'>+</div><div class='add'>+/* Multicast DLF Drop Control register (16 bit) */</div><div class='add'>+#define B53_IEEE_MCAST_DLF		0x94</div><div class='add'>+#define B53_IEEE_MCAST_DROP_EN		BIT(11)</div><div class='add'>+</div><div class='add'>+/* Unicast DLF Drop Control register (16 bit) */</div><div class='add'>+#define B53_IEEE_UCAST_DLF		0x96</div><div class='add'>+#define B53_IEEE_UCAST_DROP_EN		BIT(11)</div><div class='add'>+</div><div class='add'>+/*************************************************************************</div><div class='add'>+ * Port VLAN Registers</div><div class='add'>+ *************************************************************************/</div><div class='add'>+</div><div class='add'>+/* Port VLAN mask (16 bit) IMP port is always 8, also on 5325 &amp; co */</div><div class='add'>+#define B53_PVLAN_PORT_MASK(i)		((i) * 2)</div><div class='add'>+</div><div class='add'>+/* Join all VLANs register (16 bit) */</div><div class='add'>+#define B53_JOIN_ALL_VLAN_EN		0x50</div><div class='add'>+</div><div class='add'>+/*************************************************************************</div><div class='add'>+ * 802.1Q Page Registers</div><div class='add'>+ *************************************************************************/</div><div class='add'>+</div><div class='add'>+/* Global QoS Control (8 bit) */</div><div class='add'>+#define B53_QOS_GLOBAL_CTL		0x00</div><div class='add'>+</div><div class='add'>+/* Enable 802.1Q for individual Ports (16 bit) */</div><div class='add'>+#define B53_802_1P_EN			0x04</div><div class='add'>+</div><div class='add'>+/*************************************************************************</div><div class='add'>+ * VLAN Page Registers</div><div class='add'>+ *************************************************************************/</div><div class='add'>+</div><div class='add'>+/* VLAN Control 0 (8 bit) */</div><div class='add'>+#define B53_VLAN_CTRL0			0x00</div><div class='add'>+#define   VC0_8021PF_CTRL_MASK		0x3</div><div class='add'>+#define   VC0_8021PF_CTRL_NONE		0x0</div><div class='add'>+#define   VC0_8021PF_CTRL_CHANGE_PRI	0x1</div><div class='add'>+#define   VC0_8021PF_CTRL_CHANGE_VID	0x2</div><div class='add'>+#define   VC0_8021PF_CTRL_CHANGE_BOTH	0x3</div><div class='add'>+#define   VC0_8021QF_CTRL_MASK		0xc</div><div class='add'>+#define   VC0_8021QF_CTRL_CHANGE_PRI	0x1</div><div class='add'>+#define   VC0_8021QF_CTRL_CHANGE_VID	0x2</div><div class='add'>+#define   VC0_8021QF_CTRL_CHANGE_BOTH	0x3</div><div class='add'>+#define   VC0_RESERVED_1		BIT(1)</div><div class='add'>+#define   VC0_DROP_VID_MISS		BIT(4)</div><div class='add'>+#define   VC0_VID_HASH_VID		BIT(5)</div><div class='add'>+#define   VC0_VID_CHK_EN		BIT(6)	/* Use VID,DA or VID,SA */</div><div class='add'>+#define   VC0_VLAN_EN			BIT(7)	/* 802.1Q VLAN Enabled */</div><div class='add'>+</div><div class='add'>+/* VLAN Control 1 (8 bit) */</div><div class='add'>+#define B53_VLAN_CTRL1			0x01</div><div class='add'>+#define   VC1_RX_MCST_TAG_EN		BIT(1)</div><div class='add'>+#define   VC1_RX_MCST_FWD_EN		BIT(2)</div><div class='add'>+#define   VC1_RX_MCST_UNTAG_EN		BIT(3)</div><div class='add'>+</div><div class='add'>+/* VLAN Control 2 (8 bit) */</div><div class='add'>+#define B53_VLAN_CTRL2			0x02</div><div class='add'>+</div><div class='add'>+/* VLAN Control 3 (8 bit when BCM5325, 16 bit else) */</div><div class='add'>+#define B53_VLAN_CTRL3			0x03</div><div class='add'>+#define B53_VLAN_CTRL3_63XX		0x04</div><div class='add'>+#define   VC3_MAXSIZE_1532		BIT(6) /* 5325 only */</div><div class='add'>+#define   VC3_HIGH_8BIT_EN		BIT(7) /* 5325 only */</div><div class='add'>+</div><div class='add'>+/* VLAN Control 4 (8 bit) */</div><div class='add'>+#define B53_VLAN_CTRL4			0x05</div><div class='add'>+#define B53_VLAN_CTRL4_25		0x04</div><div class='add'>+#define B53_VLAN_CTRL4_63XX		0x06</div><div class='add'>+#define   VC4_ING_VID_CHECK_S		6</div><div class='add'>+#define   VC4_ING_VID_CHECK_MASK	(0x3 &lt;&lt; VC4_ING_VID_CHECK_S)</div><div class='add'>+#define   VC4_ING_VID_VIO_FWD		0 /* forward, but do not learn */</div><div class='add'>+#define   VC4_ING_VID_VIO_DROP		1 /* drop VID violations */</div><div class='add'>+#define   VC4_NO_ING_VID_CHK		2 /* do not check */</div><div class='add'>+#define   VC4_ING_VID_VIO_TO_IMP	3 /* redirect to MII port */</div><div class='add'>+</div><div class='add'>+/* VLAN Control 5 (8 bit) */</div><div class='add'>+#define B53_VLAN_CTRL5			0x06</div><div class='add'>+#define B53_VLAN_CTRL5_25		0x05</div><div class='add'>+#define B53_VLAN_CTRL5_63XX		0x07</div><div class='add'>+#define   VC5_VID_FFF_EN		BIT(2)</div><div class='add'>+#define   VC5_DROP_VTABLE_MISS		BIT(3)</div><div class='add'>+</div><div class='add'>+/* VLAN Control 6 (8 bit) */</div><div class='add'>+#define B53_VLAN_CTRL6			0x07</div><div class='add'>+#define B53_VLAN_CTRL6_63XX		0x08</div><div class='add'>+</div><div class='add'>+/* VLAN Table Access Register (16 bit) */</div><div class='add'>+#define B53_VLAN_TABLE_ACCESS_25	0x06	/* BCM5325E/5350 */</div><div class='add'>+#define B53_VLAN_TABLE_ACCESS_65	0x08	/* BCM5365 */</div><div class='add'>+#define   VTA_VID_LOW_MASK_25		0xf</div><div class='add'>+#define   VTA_VID_LOW_MASK_65		0xff</div><div class='add'>+#define   VTA_VID_HIGH_S_25		4</div><div class='add'>+#define   VTA_VID_HIGH_S_65		8</div><div class='add'>+#define   VTA_VID_HIGH_MASK_25		(0xff &lt;&lt; VTA_VID_HIGH_S_25E)</div><div class='add'>+#define   VTA_VID_HIGH_MASK_65		(0xf &lt;&lt; VTA_VID_HIGH_S_65)</div><div class='add'>+#define   VTA_RW_STATE			BIT(12)</div><div class='add'>+#define   VTA_RW_STATE_RD		0</div><div class='add'>+#define   VTA_RW_STATE_WR		BIT(12)</div><div class='add'>+#define   VTA_RW_OP_EN			BIT(13)</div><div class='add'>+</div><div class='add'>+/* VLAN Read/Write Registers for (16/32 bit) */</div><div class='add'>+#define B53_VLAN_WRITE_25		0x08</div><div class='add'>+#define B53_VLAN_WRITE_65		0x0a</div><div class='add'>+#define B53_VLAN_READ			0x0c</div><div class='add'>+#define   VA_MEMBER_MASK		0x3f</div><div class='add'>+#define   VA_UNTAG_S_25			6</div><div class='add'>+#define   VA_UNTAG_MASK_25		0x3f</div><div class='add'>+#define   VA_UNTAG_S_65			7</div><div class='add'>+#define   VA_UNTAG_MASK_65		0x1f</div><div class='add'>+#define   VA_VID_HIGH_S			12</div><div class='add'>+#define   VA_VID_HIGH_MASK		(0xffff &lt;&lt; VA_VID_HIGH_S)</div><div class='add'>+#define   VA_VALID_25			BIT(20)</div><div class='add'>+#define   VA_VALID_25_R4		BIT(24)</div><div class='add'>+#define   VA_VALID_65			BIT(14)</div><div class='add'>+</div><div class='add'>+/* VLAN Port Default Tag (16 bit) */</div><div class='add'>+#define B53_VLAN_PORT_DEF_TAG(i)	(0x10 + 2 * (i))</div><div class='add'>+</div><div class='add'>+/*************************************************************************</div><div class='add'>+ * Jumbo Frame Page Registers</div><div class='add'>+ *************************************************************************/</div><div class='add'>+</div><div class='add'>+/* Jumbo Enable Port Mask (bit i == port i enabled) (32 bit) */</div><div class='add'>+#define B53_JUMBO_PORT_MASK		0x01</div><div class='add'>+#define B53_JUMBO_PORT_MASK_63XX	0x04</div><div class='add'>+#define   JPM_10_100_JUMBO_EN		BIT(24) /* GigE always enabled */</div><div class='add'>+</div><div class='add'>+/* Good Frame Max Size without 802.1Q TAG (16 bit) */</div><div class='add'>+#define B53_JUMBO_MAX_SIZE		0x05</div><div class='add'>+#define B53_JUMBO_MAX_SIZE_63XX		0x08</div><div class='add'>+#define   JMS_MIN_SIZE			1518</div><div class='add'>+#define   JMS_MAX_SIZE			9724</div><div class='add'>+</div><div class='add'>+/*************************************************************************</div><div class='add'>+ * EAP Page Registers</div><div class='add'>+ *************************************************************************/</div><div class='add'>+#define B53_PORT_EAP_CONF(i)		(0x20 + 8 * (i))</div><div class='add'>+#define  EAP_MODE_SHIFT			51</div><div class='add'>+#define  EAP_MODE_SHIFT_63XX		50</div><div class='add'>+#define  EAP_MODE_MASK			(0x3ull &lt;&lt; EAP_MODE_SHIFT)</div><div class='add'>+#define  EAP_MODE_MASK_63XX		(0x3ull &lt;&lt; EAP_MODE_SHIFT_63XX)</div><div class='add'>+#define  EAP_MODE_BASIC			0</div><div class='add'>+#define  EAP_MODE_SIMPLIFIED		3</div><div class='add'>+</div><div class='add'>+/*************************************************************************</div><div class='add'>+ * EEE Configuration Page Registers</div><div class='add'>+ *************************************************************************/</div><div class='add'>+</div><div class='add'>+/* EEE Enable control register (16 bit) */</div><div class='add'>+#define B53_EEE_EN_CTRL			0x00</div><div class='add'>+</div><div class='add'>+/* EEE LPI assert status register (16 bit) */</div><div class='add'>+#define B53_EEE_LPI_ASSERT_STS		0x02</div><div class='add'>+</div><div class='add'>+/* EEE LPI indicate status register (16 bit) */</div><div class='add'>+#define B53_EEE_LPI_INDICATE		0x4</div><div class='add'>+</div><div class='add'>+/* EEE Receiving idle symbols status register (16 bit) */</div><div class='add'>+#define B53_EEE_RX_IDLE_SYM_STS		0x6</div><div class='add'>+</div><div class='add'>+/* EEE Pipeline timer register (32 bit) */</div><div class='add'>+#define B53_EEE_PIP_TIMER		0xC</div><div class='add'>+</div><div class='add'>+/* EEE Sleep timer Gig register (32 bit) */</div><div class='add'>+#define B53_EEE_SLEEP_TIMER_GIG(i)	(0x10 + 4 * (i))</div><div class='add'>+</div><div class='add'>+/* EEE Sleep timer FE register (32 bit) */</div><div class='add'>+#define B53_EEE_SLEEP_TIMER_FE(i)	(0x34 + 4 * (i))</div><div class='add'>+</div><div class='add'>+/* EEE Minimum LP timer Gig register (32 bit) */</div><div class='add'>+#define B53_EEE_MIN_LP_TIMER_GIG(i)	(0x58 + 4 * (i))</div><div class='add'>+</div><div class='add'>+/* EEE Minimum LP timer FE register (32 bit) */</div><div class='add'>+#define B53_EEE_MIN_LP_TIMER_FE(i)	(0x7c + 4 * (i))</div><div class='add'>+</div><div class='add'>+/* EEE Wake timer Gig register (16 bit) */</div><div class='add'>+#define B53_EEE_WAKE_TIMER_GIG(i)	(0xa0 + 2 * (i))</div><div class='add'>+</div><div class='add'>+/* EEE Wake timer FE register (16 bit) */</div><div class='add'>+#define B53_EEE_WAKE_TIMER_FE(i)	(0xb2 + 2 * (i))</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/*************************************************************************</div><div class='add'>+ * CFP Configuration Page Registers</div><div class='add'>+ *************************************************************************/</div><div class='add'>+</div><div class='add'>+/* CFP Control Register with ports map (8 bit) */</div><div class='add'>+#define B53_CFP_CTRL			0x00</div><div class='add'>+</div><div class='add'>+#endif /* !__B53_REGS_H */</div><div class='head'>diff --git a/drivers/net/dsa/b53/b53_serdes.c b/drivers/net/dsa/b53/b53_serdes.c<br/>new file mode 100644<br/>index 000000000000..7460122f6abc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/b53/b53_serdes.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/b53/b53_serdes.c</a></div><div class='hunk'>@@ -0,0 +1,249 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause</div><div class='add'>+/*</div><div class='add'>+ * Northstar Plus switch SerDes/SGMII PHY main logic</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2018 Florian Fainelli &lt;f.fainelli@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/phylink.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+</div><div class='add'>+#include "b53_priv.h"</div><div class='add'>+#include "b53_serdes.h"</div><div class='add'>+#include "b53_regs.h"</div><div class='add'>+</div><div class='add'>+static inline struct b53_pcs *pcs_to_b53_pcs(struct phylink_pcs *pcs)</div><div class='add'>+{</div><div class='add'>+	return container_of(pcs, struct b53_pcs, pcs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_serdes_write_blk(struct b53_device *dev, u8 offset, u16 block,</div><div class='add'>+				 u16 value)</div><div class='add'>+{</div><div class='add'>+	b53_write16(dev, B53_SERDES_PAGE, B53_SERDES_BLKADDR, block);</div><div class='add'>+	b53_write16(dev, B53_SERDES_PAGE, offset, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 b53_serdes_read_blk(struct b53_device *dev, u8 offset, u16 block)</div><div class='add'>+{</div><div class='add'>+	u16 value;</div><div class='add'>+</div><div class='add'>+	b53_write16(dev, B53_SERDES_PAGE, B53_SERDES_BLKADDR, block);</div><div class='add'>+	b53_read16(dev, B53_SERDES_PAGE, offset, &amp;value);</div><div class='add'>+</div><div class='add'>+	return value;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_serdes_set_lane(struct b53_device *dev, u8 lane)</div><div class='add'>+{</div><div class='add'>+	if (dev-&gt;serdes_lane == lane)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	WARN_ON(lane &gt; 1);</div><div class='add'>+</div><div class='add'>+	b53_serdes_write_blk(dev, B53_SERDES_LANE,</div><div class='add'>+			     SERDES_XGXSBLK0_BLOCKADDRESS, lane);</div><div class='add'>+	dev-&gt;serdes_lane = lane;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_serdes_write(struct b53_device *dev, u8 lane,</div><div class='add'>+			     u8 offset, u16 block, u16 value)</div><div class='add'>+{</div><div class='add'>+	b53_serdes_set_lane(dev, lane);</div><div class='add'>+	b53_serdes_write_blk(dev, offset, block, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 b53_serdes_read(struct b53_device *dev, u8 lane,</div><div class='add'>+			   u8 offset, u16 block)</div><div class='add'>+{</div><div class='add'>+	b53_serdes_set_lane(dev, lane);</div><div class='add'>+	return b53_serdes_read_blk(dev, offset, block);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_serdes_config(struct phylink_pcs *pcs, unsigned int neg_mode,</div><div class='add'>+			     phy_interface_t interface,</div><div class='add'>+			     const unsigned long *advertising,</div><div class='add'>+			     bool permit_pause_to_mac)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = pcs_to_b53_pcs(pcs)-&gt;dev;</div><div class='add'>+	u8 lane = pcs_to_b53_pcs(pcs)-&gt;lane;</div><div class='add'>+	u16 reg;</div><div class='add'>+</div><div class='add'>+	reg = b53_serdes_read(dev, lane, B53_SERDES_DIGITAL_CONTROL(1),</div><div class='add'>+			      SERDES_DIGITAL_BLK);</div><div class='add'>+	if (interface == PHY_INTERFACE_MODE_1000BASEX)</div><div class='add'>+		reg |= FIBER_MODE_1000X;</div><div class='add'>+	else</div><div class='add'>+		reg &amp;= ~FIBER_MODE_1000X;</div><div class='add'>+	b53_serdes_write(dev, lane, B53_SERDES_DIGITAL_CONTROL(1),</div><div class='add'>+			 SERDES_DIGITAL_BLK, reg);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_serdes_an_restart(struct phylink_pcs *pcs)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = pcs_to_b53_pcs(pcs)-&gt;dev;</div><div class='add'>+	u8 lane = pcs_to_b53_pcs(pcs)-&gt;lane;</div><div class='add'>+	u16 reg;</div><div class='add'>+</div><div class='add'>+	reg = b53_serdes_read(dev, lane, B53_SERDES_MII_REG(MII_BMCR),</div><div class='add'>+			      SERDES_MII_BLK);</div><div class='add'>+	reg |= BMCR_ANRESTART;</div><div class='add'>+	b53_serdes_write(dev, lane, B53_SERDES_MII_REG(MII_BMCR),</div><div class='add'>+			 SERDES_MII_BLK, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_serdes_get_state(struct phylink_pcs *pcs, unsigned int neg_mode,</div><div class='add'>+				 struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = pcs_to_b53_pcs(pcs)-&gt;dev;</div><div class='add'>+	u8 lane = pcs_to_b53_pcs(pcs)-&gt;lane;</div><div class='add'>+	u16 dig, bmsr;</div><div class='add'>+</div><div class='add'>+	dig = b53_serdes_read(dev, lane, B53_SERDES_DIGITAL_STATUS,</div><div class='add'>+			      SERDES_DIGITAL_BLK);</div><div class='add'>+	bmsr = b53_serdes_read(dev, lane, B53_SERDES_MII_REG(MII_BMSR),</div><div class='add'>+			       SERDES_MII_BLK);</div><div class='add'>+</div><div class='add'>+	switch ((dig &gt;&gt; SPEED_STATUS_SHIFT) &amp; SPEED_STATUS_MASK) {</div><div class='add'>+	case SPEED_STATUS_10:</div><div class='add'>+		state-&gt;speed = SPEED_10;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_STATUS_100:</div><div class='add'>+		state-&gt;speed = SPEED_100;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_STATUS_1000:</div><div class='add'>+		state-&gt;speed = SPEED_1000;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+	case SPEED_STATUS_2500:</div><div class='add'>+		state-&gt;speed = SPEED_2500;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	state-&gt;duplex = dig &amp; DUPLEX_STATUS ? DUPLEX_FULL : DUPLEX_HALF;</div><div class='add'>+	state-&gt;an_complete = !!(bmsr &amp; BMSR_ANEGCOMPLETE);</div><div class='add'>+	state-&gt;link = !!(dig &amp; LINK_STATUS);</div><div class='add'>+	if (dig &amp; PAUSE_RESOLUTION_RX_SIDE)</div><div class='add'>+		state-&gt;pause |= MLO_PAUSE_RX;</div><div class='add'>+	if (dig &amp; PAUSE_RESOLUTION_TX_SIDE)</div><div class='add'>+		state-&gt;pause |= MLO_PAUSE_TX;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void b53_serdes_link_set(struct b53_device *dev, int port, unsigned int mode,</div><div class='add'>+			 phy_interface_t interface, bool link_up)</div><div class='add'>+{</div><div class='add'>+	u8 lane = b53_serdes_map_lane(dev, port);</div><div class='add'>+	u16 reg;</div><div class='add'>+</div><div class='add'>+	if (lane == B53_INVALID_LANE)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	reg = b53_serdes_read(dev, lane, B53_SERDES_MII_REG(MII_BMCR),</div><div class='add'>+			      SERDES_MII_BLK);</div><div class='add'>+	if (link_up)</div><div class='add'>+		reg &amp;= ~BMCR_PDOWN;</div><div class='add'>+	else</div><div class='add'>+		reg |= BMCR_PDOWN;</div><div class='add'>+	b53_serdes_write(dev, lane, B53_SERDES_MII_REG(MII_BMCR),</div><div class='add'>+			 SERDES_MII_BLK, reg);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_serdes_link_set);</div><div class='add'>+</div><div class='add'>+static const struct phylink_pcs_ops b53_pcs_ops = {</div><div class='add'>+	.pcs_get_state = b53_serdes_get_state,</div><div class='add'>+	.pcs_config = b53_serdes_config,</div><div class='add'>+	.pcs_an_restart = b53_serdes_an_restart,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void b53_serdes_phylink_get_caps(struct b53_device *dev, int port,</div><div class='add'>+				 struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	u8 lane = b53_serdes_map_lane(dev, port);</div><div class='add'>+</div><div class='add'>+	if (lane == B53_INVALID_LANE)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	switch (lane) {</div><div class='add'>+	case 0:</div><div class='add'>+		/* It appears lane 0 supports 2500base-X and 1000base-X */</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_2500BASEX,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		config-&gt;mac_capabilities |= MAC_2500FD;</div><div class='add'>+		fallthrough;</div><div class='add'>+	case 1:</div><div class='add'>+		/* It appears lane 1 only supports 1000base-X and SGMII */</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_1000BASEX,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_SGMII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		config-&gt;mac_capabilities |= MAC_1000FD;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_serdes_phylink_get_caps);</div><div class='add'>+</div><div class='add'>+struct phylink_pcs *b53_serdes_phylink_mac_select_pcs(struct b53_device *dev,</div><div class='add'>+						      int port,</div><div class='add'>+						      phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	u8 lane = b53_serdes_map_lane(dev, port);</div><div class='add'>+</div><div class='add'>+	if (lane == B53_INVALID_LANE || lane &gt;= B53_N_PCS ||</div><div class='add'>+	    !dev-&gt;pcs[lane].dev)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (!phy_interface_mode_is_8023z(interface) &amp;&amp;</div><div class='add'>+	    interface != PHY_INTERFACE_MODE_SGMII)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	return &amp;dev-&gt;pcs[lane].pcs;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_serdes_phylink_mac_select_pcs);</div><div class='add'>+</div><div class='add'>+int b53_serdes_init(struct b53_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	u8 lane = b53_serdes_map_lane(dev, port);</div><div class='add'>+	struct b53_pcs *pcs;</div><div class='add'>+	u16 id0, msb, lsb;</div><div class='add'>+</div><div class='add'>+	if (lane == B53_INVALID_LANE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	id0 = b53_serdes_read(dev, lane, B53_SERDES_ID0, SERDES_ID0);</div><div class='add'>+	msb = b53_serdes_read(dev, lane, B53_SERDES_MII_REG(MII_PHYSID1),</div><div class='add'>+			      SERDES_MII_BLK);</div><div class='add'>+	lsb = b53_serdes_read(dev, lane, B53_SERDES_MII_REG(MII_PHYSID2),</div><div class='add'>+			      SERDES_MII_BLK);</div><div class='add'>+	if (id0 == 0 || id0 == 0xffff) {</div><div class='add'>+		dev_err(dev-&gt;dev, "SerDes not initialized, check settings\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_info(dev-&gt;dev,</div><div class='add'>+		 "SerDes lane %d, model: %d, rev %c%d (OUI: 0x%08x)\n",</div><div class='add'>+		 lane, id0 &amp; SERDES_ID0_MODEL_MASK,</div><div class='add'>+		 (id0 &gt;&gt; SERDES_ID0_REV_LETTER_SHIFT) + 0x41,</div><div class='add'>+		 (id0 &gt;&gt; SERDES_ID0_REV_NUM_SHIFT) &amp; SERDES_ID0_REV_NUM_MASK,</div><div class='add'>+		 (u32)msb &lt;&lt; 16 | lsb);</div><div class='add'>+</div><div class='add'>+	pcs = &amp;dev-&gt;pcs[lane];</div><div class='add'>+	pcs-&gt;dev = dev;</div><div class='add'>+	pcs-&gt;lane = lane;</div><div class='add'>+	pcs-&gt;pcs.ops = &amp;b53_pcs_ops;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(b53_serdes_init);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Florian Fainelli &lt;f.fainelli@gmail.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("B53 Switch SerDes driver");</div><div class='add'>+MODULE_LICENSE("Dual BSD/GPL");</div><div class='head'>diff --git a/drivers/net/dsa/b53/b53_serdes.h b/drivers/net/dsa/b53/b53_serdes.h<br/>new file mode 100644<br/>index 000000000000..3d367c4df4d9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/b53/b53_serdes.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/b53/b53_serdes.h</a></div><div class='hunk'>@@ -0,0 +1,124 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */</div><div class='add'>+/*</div><div class='add'>+ * Northstar Plus switch SerDes/SGMII PHY definitions</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2018 Florian Fainelli &lt;f.fainelli@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+/* Non-standard page used to access SerDes PHY registers on NorthStar Plus */</div><div class='add'>+#define B53_SERDES_PAGE			0x16</div><div class='add'>+#define B53_SERDES_BLKADDR		0x3e</div><div class='add'>+#define B53_SERDES_LANE			0x3c</div><div class='add'>+</div><div class='add'>+#define B53_SERDES_ID0			0x20</div><div class='add'>+#define  SERDES_ID0_MODEL_MASK		0x3f</div><div class='add'>+#define  SERDES_ID0_REV_NUM_SHIFT	11</div><div class='add'>+#define  SERDES_ID0_REV_NUM_MASK	0x7</div><div class='add'>+#define  SERDES_ID0_REV_LETTER_SHIFT	14</div><div class='add'>+</div><div class='add'>+#define B53_SERDES_MII_REG(x)		(0x20 + (x) * 2)</div><div class='add'>+#define B53_SERDES_DIGITAL_CONTROL(x)	(0x1e + (x) * 2)</div><div class='add'>+#define B53_SERDES_DIGITAL_STATUS	0x28</div><div class='add'>+</div><div class='add'>+/* SERDES_DIGITAL_CONTROL1 */</div><div class='add'>+#define  FIBER_MODE_1000X		BIT(0)</div><div class='add'>+#define  TBI_INTERFACE			BIT(1)</div><div class='add'>+#define  SIGNAL_DETECT_EN		BIT(2)</div><div class='add'>+#define  INVERT_SIGNAL_DETECT		BIT(3)</div><div class='add'>+#define  AUTODET_EN			BIT(4)</div><div class='add'>+#define  SGMII_MASTER_MODE		BIT(5)</div><div class='add'>+#define  DISABLE_DLL_PWRDOWN		BIT(6)</div><div class='add'>+#define  CRC_CHECKER_DIS		BIT(7)</div><div class='add'>+#define  COMMA_DET_EN			BIT(8)</div><div class='add'>+#define  ZERO_COMMA_DET_EN		BIT(9)</div><div class='add'>+#define  REMOTE_LOOPBACK		BIT(10)</div><div class='add'>+#define  SEL_RX_PKTS_FOR_CNTR		BIT(11)</div><div class='add'>+#define  MASTER_MDIO_PHY_SEL		BIT(13)</div><div class='add'>+#define  DISABLE_SIGNAL_DETECT_FLT	BIT(14)</div><div class='add'>+</div><div class='add'>+/* SERDES_DIGITAL_CONTROL2 */</div><div class='add'>+#define  EN_PARALLEL_DET		BIT(0)</div><div class='add'>+#define  DIS_FALSE_LINK			BIT(1)</div><div class='add'>+#define  FLT_FORCE_LINK			BIT(2)</div><div class='add'>+#define  EN_AUTONEG_ERR_TIMER		BIT(3)</div><div class='add'>+#define  DIS_REMOTE_FAULT_SENSING	BIT(4)</div><div class='add'>+#define  FORCE_XMIT_DATA		BIT(5)</div><div class='add'>+#define  AUTONEG_FAST_TIMERS		BIT(6)</div><div class='add'>+#define  DIS_CARRIER_EXTEND		BIT(7)</div><div class='add'>+#define  DIS_TRRR_GENERATION		BIT(8)</div><div class='add'>+#define  BYPASS_PCS_RX			BIT(9)</div><div class='add'>+#define  BYPASS_PCS_TX			BIT(10)</div><div class='add'>+#define  TEST_CNTR_EN			BIT(11)</div><div class='add'>+#define  TX_PACKET_SEQ_TEST		BIT(12)</div><div class='add'>+#define  TX_IDLE_JAM_SEQ_TEST		BIT(13)</div><div class='add'>+#define  CLR_BER_CNTR			BIT(14)</div><div class='add'>+</div><div class='add'>+/* SERDES_DIGITAL_CONTROL3 */</div><div class='add'>+#define  TX_FIFO_RST			BIT(0)</div><div class='add'>+#define  FIFO_ELAST_TX_RX_SHIFT		1</div><div class='add'>+#define  FIFO_ELAST_TX_RX_5K		0</div><div class='add'>+#define  FIFO_ELAST_TX_RX_10K		1</div><div class='add'>+#define  FIFO_ELAST_TX_RX_13_5K		2</div><div class='add'>+#define  FIFO_ELAST_TX_RX_18_5K		3</div><div class='add'>+#define  BLOCK_TXEN_MODE		BIT(9)</div><div class='add'>+#define  JAM_FALSE_CARRIER_MODE		BIT(10)</div><div class='add'>+#define  EXT_PHY_CRS_MODE		BIT(11)</div><div class='add'>+#define  INVERT_EXT_PHY_CRS		BIT(12)</div><div class='add'>+#define  DISABLE_TX_CRS			BIT(13)</div><div class='add'>+</div><div class='add'>+/* SERDES_DIGITAL_STATUS */</div><div class='add'>+#define  SGMII_MODE			BIT(0)</div><div class='add'>+#define  LINK_STATUS			BIT(1)</div><div class='add'>+#define  DUPLEX_STATUS			BIT(2)</div><div class='add'>+#define  SPEED_STATUS_SHIFT		3</div><div class='add'>+#define  SPEED_STATUS_10		0</div><div class='add'>+#define  SPEED_STATUS_100		1</div><div class='add'>+#define  SPEED_STATUS_1000		2</div><div class='add'>+#define  SPEED_STATUS_2500		3</div><div class='add'>+#define  SPEED_STATUS_MASK		SPEED_STATUS_2500</div><div class='add'>+#define  PAUSE_RESOLUTION_TX_SIDE	BIT(5)</div><div class='add'>+#define  PAUSE_RESOLUTION_RX_SIDE	BIT(6)</div><div class='add'>+#define  LINK_STATUS_CHANGE		BIT(7)</div><div class='add'>+#define  EARLY_END_EXT_DET		BIT(8)</div><div class='add'>+#define  CARRIER_EXT_ERR_DET		BIT(9)</div><div class='add'>+#define  RX_ERR_DET			BIT(10)</div><div class='add'>+#define  TX_ERR_DET			BIT(11)</div><div class='add'>+#define  CRC_ERR_DET			BIT(12)</div><div class='add'>+#define  FALSE_CARRIER_ERR_DET		BIT(13)</div><div class='add'>+#define  RXFIFO_ERR_DET			BIT(14)</div><div class='add'>+#define  TXFIFO_ERR_DET			BIT(15)</div><div class='add'>+</div><div class='add'>+/* Block offsets */</div><div class='add'>+#define SERDES_DIGITAL_BLK		0x8300</div><div class='add'>+#define SERDES_ID0			0x8310</div><div class='add'>+#define SERDES_MII_BLK			0xffe0</div><div class='add'>+#define SERDES_XGXSBLK0_BLOCKADDRESS	0xffd0</div><div class='add'>+</div><div class='add'>+struct phylink_link_state;</div><div class='add'>+</div><div class='add'>+static inline u8 b53_serdes_map_lane(struct b53_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	if (!dev-&gt;ops-&gt;serdes_map_lane)</div><div class='add'>+		return B53_INVALID_LANE;</div><div class='add'>+</div><div class='add'>+	return dev-&gt;ops-&gt;serdes_map_lane(dev, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void b53_serdes_link_set(struct b53_device *dev, int port, unsigned int mode,</div><div class='add'>+			 phy_interface_t interface, bool link_up);</div><div class='add'>+struct phylink_pcs *b53_serdes_phylink_mac_select_pcs(struct b53_device *dev,</div><div class='add'>+						      int port,</div><div class='add'>+						      phy_interface_t interface);</div><div class='add'>+void b53_serdes_phylink_get_caps(struct b53_device *dev, int port,</div><div class='add'>+				 struct phylink_config *config);</div><div class='add'>+#if IS_ENABLED(CONFIG_B53_SERDES)</div><div class='add'>+int b53_serdes_init(struct b53_device *dev, int port);</div><div class='add'>+#else</div><div class='add'>+static inline int b53_serdes_init(struct b53_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	return -ENODEV;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/dsa/b53/b53_spi.c b/drivers/net/dsa/b53/b53_spi.c<br/>new file mode 100644<br/>index 000000000000..467da057579e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/b53/b53_spi.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/b53/b53_spi.c</a></div><div class='hunk'>@@ -0,0 +1,376 @@</div><div class='add'>+/*</div><div class='add'>+ * B53 register access through SPI</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2011-2013 Jonas Gorski &lt;jogo@openwrt.org&gt;</div><div class='add'>+ *</div><div class='add'>+ * Permission to use, copy, modify, and/or distribute this software for any</div><div class='add'>+ * purpose with or without fee is hereby granted, provided that the above</div><div class='add'>+ * copyright notice and this permission notice appear in all copies.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES</div><div class='add'>+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF</div><div class='add'>+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR</div><div class='add'>+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES</div><div class='add'>+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN</div><div class='add'>+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF</div><div class='add'>+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/unaligned.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/spi/spi.h&gt;</div><div class='add'>+#include &lt;linux/platform_data/b53.h&gt;</div><div class='add'>+</div><div class='add'>+#include "b53_priv.h"</div><div class='add'>+</div><div class='add'>+#define B53_SPI_DATA		0xf0</div><div class='add'>+</div><div class='add'>+#define B53_SPI_STATUS		0xfe</div><div class='add'>+#define B53_SPI_CMD_SPIF	BIT(7)</div><div class='add'>+#define B53_SPI_CMD_RACK	BIT(5)</div><div class='add'>+</div><div class='add'>+#define B53_SPI_CMD_READ	0x00</div><div class='add'>+#define B53_SPI_CMD_WRITE	0x01</div><div class='add'>+#define B53_SPI_CMD_NORMAL	0x60</div><div class='add'>+#define B53_SPI_CMD_FAST	0x10</div><div class='add'>+</div><div class='add'>+#define B53_SPI_PAGE_SELECT	0xff</div><div class='add'>+</div><div class='add'>+static inline int b53_spi_read_reg(struct spi_device *spi, u8 reg, u8 *val,</div><div class='add'>+				   unsigned int len)</div><div class='add'>+{</div><div class='add'>+	u8 txbuf[2];</div><div class='add'>+</div><div class='add'>+	txbuf[0] = B53_SPI_CMD_NORMAL | B53_SPI_CMD_READ;</div><div class='add'>+	txbuf[1] = reg;</div><div class='add'>+</div><div class='add'>+	return spi_write_then_read(spi, txbuf, 2, val, len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int b53_spi_clear_status(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+	unsigned int i;</div><div class='add'>+	u8 rxbuf;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 10; i++) {</div><div class='add'>+		ret = b53_spi_read_reg(spi, B53_SPI_STATUS, &amp;rxbuf, 1);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		if (!(rxbuf &amp; B53_SPI_CMD_SPIF))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		mdelay(1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (i == 10)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int b53_spi_set_page(struct spi_device *spi, u8 page)</div><div class='add'>+{</div><div class='add'>+	u8 txbuf[3];</div><div class='add'>+</div><div class='add'>+	txbuf[0] = B53_SPI_CMD_NORMAL | B53_SPI_CMD_WRITE;</div><div class='add'>+	txbuf[1] = B53_SPI_PAGE_SELECT;</div><div class='add'>+	txbuf[2] = page;</div><div class='add'>+</div><div class='add'>+	return spi_write(spi, txbuf, sizeof(txbuf));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int b53_prepare_reg_access(struct spi_device *spi, u8 page)</div><div class='add'>+{</div><div class='add'>+	int ret = b53_spi_clear_status(spi);</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return b53_spi_set_page(spi, page);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_spi_prepare_reg_read(struct spi_device *spi, u8 reg)</div><div class='add'>+{</div><div class='add'>+	u8 rxbuf;</div><div class='add'>+	int retry_count;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = b53_spi_read_reg(spi, reg, &amp;rxbuf, 1);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	for (retry_count = 0; retry_count &lt; 10; retry_count++) {</div><div class='add'>+		ret = b53_spi_read_reg(spi, B53_SPI_STATUS, &amp;rxbuf, 1);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		if (rxbuf &amp; B53_SPI_CMD_RACK)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		mdelay(1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (retry_count == 10)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_spi_read(struct b53_device *dev, u8 page, u8 reg, u8 *data,</div><div class='add'>+			unsigned int len)</div><div class='add'>+{</div><div class='add'>+	struct spi_device *spi = dev-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = b53_prepare_reg_access(spi, page);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = b53_spi_prepare_reg_read(spi, reg);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return b53_spi_read_reg(spi, B53_SPI_DATA, data, len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_spi_read8(struct b53_device *dev, u8 page, u8 reg, u8 *val)</div><div class='add'>+{</div><div class='add'>+	return b53_spi_read(dev, page, reg, val, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_spi_read16(struct b53_device *dev, u8 page, u8 reg, u16 *val)</div><div class='add'>+{</div><div class='add'>+	__le16 value;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = b53_spi_read(dev, page, reg, (u8 *)&amp;value, 2);</div><div class='add'>+</div><div class='add'>+	if (!ret)</div><div class='add'>+		*val = le16_to_cpu(value);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_spi_read32(struct b53_device *dev, u8 page, u8 reg, u32 *val)</div><div class='add'>+{</div><div class='add'>+	__le32 value;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = b53_spi_read(dev, page, reg, (u8 *)&amp;value, 4);</div><div class='add'>+</div><div class='add'>+	if (!ret)</div><div class='add'>+		*val = le32_to_cpu(value);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_spi_read48(struct b53_device *dev, u8 page, u8 reg, u64 *val)</div><div class='add'>+{</div><div class='add'>+	__le64 value;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	*val = 0;</div><div class='add'>+	ret = b53_spi_read(dev, page, reg, (u8 *)&amp;value, 6);</div><div class='add'>+	if (!ret)</div><div class='add'>+		*val = le64_to_cpu(value);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_spi_read64(struct b53_device *dev, u8 page, u8 reg, u64 *val)</div><div class='add'>+{</div><div class='add'>+	__le64 value;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = b53_spi_read(dev, page, reg, (u8 *)&amp;value, 8);</div><div class='add'>+</div><div class='add'>+	if (!ret)</div><div class='add'>+		*val = le64_to_cpu(value);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_spi_write8(struct b53_device *dev, u8 page, u8 reg, u8 value)</div><div class='add'>+{</div><div class='add'>+	struct spi_device *spi = dev-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+	u8 txbuf[3];</div><div class='add'>+</div><div class='add'>+	ret = b53_prepare_reg_access(spi, page);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	txbuf[0] = B53_SPI_CMD_NORMAL | B53_SPI_CMD_WRITE;</div><div class='add'>+	txbuf[1] = reg;</div><div class='add'>+	txbuf[2] = value;</div><div class='add'>+</div><div class='add'>+	return spi_write(spi, txbuf, sizeof(txbuf));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_spi_write16(struct b53_device *dev, u8 page, u8 reg, u16 value)</div><div class='add'>+{</div><div class='add'>+	struct spi_device *spi = dev-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+	u8 txbuf[4];</div><div class='add'>+</div><div class='add'>+	ret = b53_prepare_reg_access(spi, page);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	txbuf[0] = B53_SPI_CMD_NORMAL | B53_SPI_CMD_WRITE;</div><div class='add'>+	txbuf[1] = reg;</div><div class='add'>+	put_unaligned_le16(value, &amp;txbuf[2]);</div><div class='add'>+</div><div class='add'>+	return spi_write(spi, txbuf, sizeof(txbuf));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_spi_write32(struct b53_device *dev, u8 page, u8 reg, u32 value)</div><div class='add'>+{</div><div class='add'>+	struct spi_device *spi = dev-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+	u8 txbuf[6];</div><div class='add'>+</div><div class='add'>+	ret = b53_prepare_reg_access(spi, page);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	txbuf[0] = B53_SPI_CMD_NORMAL | B53_SPI_CMD_WRITE;</div><div class='add'>+	txbuf[1] = reg;</div><div class='add'>+	put_unaligned_le32(value, &amp;txbuf[2]);</div><div class='add'>+</div><div class='add'>+	return spi_write(spi, txbuf, sizeof(txbuf));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_spi_write48(struct b53_device *dev, u8 page, u8 reg, u64 value)</div><div class='add'>+{</div><div class='add'>+	struct spi_device *spi = dev-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+	u8 txbuf[10];</div><div class='add'>+</div><div class='add'>+	ret = b53_prepare_reg_access(spi, page);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	txbuf[0] = B53_SPI_CMD_NORMAL | B53_SPI_CMD_WRITE;</div><div class='add'>+	txbuf[1] = reg;</div><div class='add'>+	put_unaligned_le64(value, &amp;txbuf[2]);</div><div class='add'>+</div><div class='add'>+	return spi_write(spi, txbuf, sizeof(txbuf) - 2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_spi_write64(struct b53_device *dev, u8 page, u8 reg, u64 value)</div><div class='add'>+{</div><div class='add'>+	struct spi_device *spi = dev-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+	u8 txbuf[10];</div><div class='add'>+</div><div class='add'>+	ret = b53_prepare_reg_access(spi, page);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	txbuf[0] = B53_SPI_CMD_NORMAL | B53_SPI_CMD_WRITE;</div><div class='add'>+	txbuf[1] = reg;</div><div class='add'>+	put_unaligned_le64(value, &amp;txbuf[2]);</div><div class='add'>+</div><div class='add'>+	return spi_write(spi, txbuf, sizeof(txbuf));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct b53_io_ops b53_spi_ops = {</div><div class='add'>+	.read8 = b53_spi_read8,</div><div class='add'>+	.read16 = b53_spi_read16,</div><div class='add'>+	.read32 = b53_spi_read32,</div><div class='add'>+	.read48 = b53_spi_read48,</div><div class='add'>+	.read64 = b53_spi_read64,</div><div class='add'>+	.write8 = b53_spi_write8,</div><div class='add'>+	.write16 = b53_spi_write16,</div><div class='add'>+	.write32 = b53_spi_write32,</div><div class='add'>+	.write48 = b53_spi_write48,</div><div class='add'>+	.write64 = b53_spi_write64,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int b53_spi_probe(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	dev = b53_switch_alloc(&amp;spi-&gt;dev, &amp;b53_spi_ops, spi);</div><div class='add'>+	if (!dev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	if (spi-&gt;dev.platform_data)</div><div class='add'>+		dev-&gt;pdata = spi-&gt;dev.platform_data;</div><div class='add'>+</div><div class='add'>+	ret = b53_switch_register(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	spi_set_drvdata(spi, dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_spi_remove(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = spi_get_drvdata(spi);</div><div class='add'>+</div><div class='add'>+	if (dev)</div><div class='add'>+		b53_switch_remove(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_spi_shutdown(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = spi_get_drvdata(spi);</div><div class='add'>+</div><div class='add'>+	if (dev)</div><div class='add'>+		b53_switch_shutdown(dev);</div><div class='add'>+</div><div class='add'>+	spi_set_drvdata(spi, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id b53_spi_of_match[] = {</div><div class='add'>+	{ .compatible = "brcm,bcm5325" },</div><div class='add'>+	{ .compatible = "brcm,bcm5365" },</div><div class='add'>+	{ .compatible = "brcm,bcm5395" },</div><div class='add'>+	{ .compatible = "brcm,bcm5397" },</div><div class='add'>+	{ .compatible = "brcm,bcm5398" },</div><div class='add'>+	{ .compatible = "brcm,bcm53115" },</div><div class='add'>+	{ .compatible = "brcm,bcm53125" },</div><div class='add'>+	{ .compatible = "brcm,bcm53128" },</div><div class='add'>+	{ /* sentinel */ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, b53_spi_of_match);</div><div class='add'>+</div><div class='add'>+static const struct spi_device_id b53_spi_ids[] = {</div><div class='add'>+	{ .name = "bcm5325" },</div><div class='add'>+	{ .name = "bcm5365" },</div><div class='add'>+	{ .name = "bcm5395" },</div><div class='add'>+	{ .name = "bcm5397" },</div><div class='add'>+	{ .name = "bcm5398" },</div><div class='add'>+	{ .name = "bcm53115" },</div><div class='add'>+	{ .name = "bcm53125" },</div><div class='add'>+	{ .name = "bcm53128" },</div><div class='add'>+	{ /* sentinel */ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(spi, b53_spi_ids);</div><div class='add'>+</div><div class='add'>+static struct spi_driver b53_spi_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name	= "b53-switch",</div><div class='add'>+		.of_match_table = b53_spi_of_match,</div><div class='add'>+	},</div><div class='add'>+	.probe	= b53_spi_probe,</div><div class='add'>+	.remove	= b53_spi_remove,</div><div class='add'>+	.shutdown = b53_spi_shutdown,</div><div class='add'>+	.id_table = b53_spi_ids,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_spi_driver(b53_spi_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Jonas Gorski &lt;jogo@openwrt.org&gt;");</div><div class='add'>+MODULE_DESCRIPTION("B53 SPI access driver");</div><div class='add'>+MODULE_LICENSE("Dual BSD/GPL");</div><div class='head'>diff --git a/drivers/net/dsa/b53/b53_srab.c b/drivers/net/dsa/b53/b53_srab.c<br/>new file mode 100644<br/>index 000000000000..b9939bbd2cd5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/b53/b53_srab.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/b53/b53_srab.c</a></div><div class='hunk'>@@ -0,0 +1,696 @@</div><div class='add'>+/*</div><div class='add'>+ * B53 register access through Switch Register Access Bridge Registers</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2013 Hauke Mehrtens &lt;hauke@hauke-m.de&gt;</div><div class='add'>+ *</div><div class='add'>+ * Permission to use, copy, modify, and/or distribute this software for any</div><div class='add'>+ * purpose with or without fee is hereby granted, provided that the above</div><div class='add'>+ * copyright notice and this permission notice appear in all copies.</div><div class='add'>+ *</div><div class='add'>+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES</div><div class='add'>+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF</div><div class='add'>+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR</div><div class='add'>+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES</div><div class='add'>+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN</div><div class='add'>+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF</div><div class='add'>+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/platform_data/b53.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+</div><div class='add'>+#include "b53_priv.h"</div><div class='add'>+#include "b53_serdes.h"</div><div class='add'>+</div><div class='add'>+/* command and status register of the SRAB */</div><div class='add'>+#define B53_SRAB_CMDSTAT		0x2c</div><div class='add'>+#define  B53_SRAB_CMDSTAT_RST		BIT(2)</div><div class='add'>+#define  B53_SRAB_CMDSTAT_WRITE		BIT(1)</div><div class='add'>+#define  B53_SRAB_CMDSTAT_GORDYN	BIT(0)</div><div class='add'>+#define  B53_SRAB_CMDSTAT_PAGE		24</div><div class='add'>+#define  B53_SRAB_CMDSTAT_REG		16</div><div class='add'>+</div><div class='add'>+/* high order word of write data to switch registe */</div><div class='add'>+#define B53_SRAB_WD_H			0x30</div><div class='add'>+</div><div class='add'>+/* low order word of write data to switch registe */</div><div class='add'>+#define B53_SRAB_WD_L			0x34</div><div class='add'>+</div><div class='add'>+/* high order word of read data from switch register */</div><div class='add'>+#define B53_SRAB_RD_H			0x38</div><div class='add'>+</div><div class='add'>+/* low order word of read data from switch register */</div><div class='add'>+#define B53_SRAB_RD_L			0x3c</div><div class='add'>+</div><div class='add'>+/* command and status register of the SRAB */</div><div class='add'>+#define B53_SRAB_CTRLS			0x40</div><div class='add'>+#define  B53_SRAB_CTRLS_HOST_INTR	BIT(1)</div><div class='add'>+#define  B53_SRAB_CTRLS_RCAREQ		BIT(3)</div><div class='add'>+#define  B53_SRAB_CTRLS_RCAGNT		BIT(4)</div><div class='add'>+#define  B53_SRAB_CTRLS_SW_INIT_DONE	BIT(6)</div><div class='add'>+</div><div class='add'>+/* the register captures interrupt pulses from the switch */</div><div class='add'>+#define B53_SRAB_INTR			0x44</div><div class='add'>+#define  B53_SRAB_INTR_P(x)		BIT(x)</div><div class='add'>+#define  B53_SRAB_SWITCH_PHY		BIT(8)</div><div class='add'>+#define  B53_SRAB_1588_SYNC		BIT(9)</div><div class='add'>+#define  B53_SRAB_IMP1_SLEEP_TIMER	BIT(10)</div><div class='add'>+#define  B53_SRAB_P7_SLEEP_TIMER	BIT(11)</div><div class='add'>+#define  B53_SRAB_IMP0_SLEEP_TIMER	BIT(12)</div><div class='add'>+</div><div class='add'>+/* Port mux configuration registers */</div><div class='add'>+#define B53_MUX_CONFIG_P5		0x00</div><div class='add'>+#define  MUX_CONFIG_SGMII		0</div><div class='add'>+#define  MUX_CONFIG_MII_LITE		1</div><div class='add'>+#define  MUX_CONFIG_RGMII		2</div><div class='add'>+#define  MUX_CONFIG_GMII		3</div><div class='add'>+#define  MUX_CONFIG_GPHY		4</div><div class='add'>+#define  MUX_CONFIG_INTERNAL		5</div><div class='add'>+#define  MUX_CONFIG_MASK		0x7</div><div class='add'>+#define B53_MUX_CONFIG_P4		0x04</div><div class='add'>+</div><div class='add'>+struct b53_srab_port_priv {</div><div class='add'>+	int irq;</div><div class='add'>+	bool irq_enabled;</div><div class='add'>+	struct b53_device *dev;</div><div class='add'>+	unsigned int num;</div><div class='add'>+	phy_interface_t mode;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct b53_srab_priv {</div><div class='add'>+	void __iomem *regs;</div><div class='add'>+	void __iomem *mux_config;</div><div class='add'>+	struct b53_srab_port_priv port_intrs[B53_N_PORTS];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int b53_srab_request_grant(struct b53_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct b53_srab_priv *priv = dev-&gt;priv;</div><div class='add'>+	u8 __iomem *regs = priv-&gt;regs;</div><div class='add'>+	u32 ctrls;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	ctrls = readl(regs + B53_SRAB_CTRLS);</div><div class='add'>+	ctrls |= B53_SRAB_CTRLS_RCAREQ;</div><div class='add'>+	writel(ctrls, regs + B53_SRAB_CTRLS);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 20; i++) {</div><div class='add'>+		ctrls = readl(regs + B53_SRAB_CTRLS);</div><div class='add'>+		if (ctrls &amp; B53_SRAB_CTRLS_RCAGNT)</div><div class='add'>+			break;</div><div class='add'>+		usleep_range(10, 100);</div><div class='add'>+	}</div><div class='add'>+	if (WARN_ON(i == 5))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_srab_release_grant(struct b53_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct b53_srab_priv *priv = dev-&gt;priv;</div><div class='add'>+	u8 __iomem *regs = priv-&gt;regs;</div><div class='add'>+	u32 ctrls;</div><div class='add'>+</div><div class='add'>+	ctrls = readl(regs + B53_SRAB_CTRLS);</div><div class='add'>+	ctrls &amp;= ~B53_SRAB_CTRLS_RCAREQ;</div><div class='add'>+	writel(ctrls, regs + B53_SRAB_CTRLS);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_srab_op(struct b53_device *dev, u8 page, u8 reg, u32 op)</div><div class='add'>+{</div><div class='add'>+	struct b53_srab_priv *priv = dev-&gt;priv;</div><div class='add'>+	u8 __iomem *regs = priv-&gt;regs;</div><div class='add'>+	int i;</div><div class='add'>+	u32 cmdstat;</div><div class='add'>+</div><div class='add'>+	/* set register address */</div><div class='add'>+	cmdstat = (page &lt;&lt; B53_SRAB_CMDSTAT_PAGE) |</div><div class='add'>+		  (reg &lt;&lt; B53_SRAB_CMDSTAT_REG) |</div><div class='add'>+		  B53_SRAB_CMDSTAT_GORDYN |</div><div class='add'>+		  op;</div><div class='add'>+	writel(cmdstat, regs + B53_SRAB_CMDSTAT);</div><div class='add'>+</div><div class='add'>+	/* check if operation completed */</div><div class='add'>+	for (i = 0; i &lt; 5; ++i) {</div><div class='add'>+		cmdstat = readl(regs + B53_SRAB_CMDSTAT);</div><div class='add'>+		if (!(cmdstat &amp; B53_SRAB_CMDSTAT_GORDYN))</div><div class='add'>+			break;</div><div class='add'>+		usleep_range(10, 100);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (WARN_ON(i == 5))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_srab_read8(struct b53_device *dev, u8 page, u8 reg, u8 *val)</div><div class='add'>+{</div><div class='add'>+	struct b53_srab_priv *priv = dev-&gt;priv;</div><div class='add'>+	u8 __iomem *regs = priv-&gt;regs;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	ret = b53_srab_request_grant(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	ret = b53_srab_op(dev, page, reg, 0);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	*val = readl(regs + B53_SRAB_RD_L) &amp; 0xff;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	b53_srab_release_grant(dev);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_srab_read16(struct b53_device *dev, u8 page, u8 reg, u16 *val)</div><div class='add'>+{</div><div class='add'>+	struct b53_srab_priv *priv = dev-&gt;priv;</div><div class='add'>+	u8 __iomem *regs = priv-&gt;regs;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	ret = b53_srab_request_grant(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	ret = b53_srab_op(dev, page, reg, 0);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	*val = readl(regs + B53_SRAB_RD_L) &amp; 0xffff;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	b53_srab_release_grant(dev);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_srab_read32(struct b53_device *dev, u8 page, u8 reg, u32 *val)</div><div class='add'>+{</div><div class='add'>+	struct b53_srab_priv *priv = dev-&gt;priv;</div><div class='add'>+	u8 __iomem *regs = priv-&gt;regs;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	ret = b53_srab_request_grant(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	ret = b53_srab_op(dev, page, reg, 0);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	*val = readl(regs + B53_SRAB_RD_L);</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	b53_srab_release_grant(dev);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_srab_read48(struct b53_device *dev, u8 page, u8 reg, u64 *val)</div><div class='add'>+{</div><div class='add'>+	struct b53_srab_priv *priv = dev-&gt;priv;</div><div class='add'>+	u8 __iomem *regs = priv-&gt;regs;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	ret = b53_srab_request_grant(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	ret = b53_srab_op(dev, page, reg, 0);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	*val = readl(regs + B53_SRAB_RD_L);</div><div class='add'>+	*val += ((u64)readl(regs + B53_SRAB_RD_H) &amp; 0xffff) &lt;&lt; 32;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	b53_srab_release_grant(dev);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_srab_read64(struct b53_device *dev, u8 page, u8 reg, u64 *val)</div><div class='add'>+{</div><div class='add'>+	struct b53_srab_priv *priv = dev-&gt;priv;</div><div class='add'>+	u8 __iomem *regs = priv-&gt;regs;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	ret = b53_srab_request_grant(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	ret = b53_srab_op(dev, page, reg, 0);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	*val = readl(regs + B53_SRAB_RD_L);</div><div class='add'>+	*val += (u64)readl(regs + B53_SRAB_RD_H) &lt;&lt; 32;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	b53_srab_release_grant(dev);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_srab_write8(struct b53_device *dev, u8 page, u8 reg, u8 value)</div><div class='add'>+{</div><div class='add'>+	struct b53_srab_priv *priv = dev-&gt;priv;</div><div class='add'>+	u8 __iomem *regs = priv-&gt;regs;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	ret = b53_srab_request_grant(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	writel(value, regs + B53_SRAB_WD_L);</div><div class='add'>+</div><div class='add'>+	ret = b53_srab_op(dev, page, reg, B53_SRAB_CMDSTAT_WRITE);</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	b53_srab_release_grant(dev);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_srab_write16(struct b53_device *dev, u8 page, u8 reg,</div><div class='add'>+			    u16 value)</div><div class='add'>+{</div><div class='add'>+	struct b53_srab_priv *priv = dev-&gt;priv;</div><div class='add'>+	u8 __iomem *regs = priv-&gt;regs;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	ret = b53_srab_request_grant(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	writel(value, regs + B53_SRAB_WD_L);</div><div class='add'>+</div><div class='add'>+	ret = b53_srab_op(dev, page, reg, B53_SRAB_CMDSTAT_WRITE);</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	b53_srab_release_grant(dev);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_srab_write32(struct b53_device *dev, u8 page, u8 reg,</div><div class='add'>+			    u32 value)</div><div class='add'>+{</div><div class='add'>+	struct b53_srab_priv *priv = dev-&gt;priv;</div><div class='add'>+	u8 __iomem *regs = priv-&gt;regs;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	ret = b53_srab_request_grant(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	writel(value, regs + B53_SRAB_WD_L);</div><div class='add'>+</div><div class='add'>+	ret = b53_srab_op(dev, page, reg, B53_SRAB_CMDSTAT_WRITE);</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	b53_srab_release_grant(dev);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_srab_write48(struct b53_device *dev, u8 page, u8 reg,</div><div class='add'>+			    u64 value)</div><div class='add'>+{</div><div class='add'>+	struct b53_srab_priv *priv = dev-&gt;priv;</div><div class='add'>+	u8 __iomem *regs = priv-&gt;regs;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	ret = b53_srab_request_grant(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	writel((u32)value, regs + B53_SRAB_WD_L);</div><div class='add'>+	writel((u16)(value &gt;&gt; 32), regs + B53_SRAB_WD_H);</div><div class='add'>+</div><div class='add'>+	ret = b53_srab_op(dev, page, reg, B53_SRAB_CMDSTAT_WRITE);</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	b53_srab_release_grant(dev);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_srab_write64(struct b53_device *dev, u8 page, u8 reg,</div><div class='add'>+			    u64 value)</div><div class='add'>+{</div><div class='add'>+	struct b53_srab_priv *priv = dev-&gt;priv;</div><div class='add'>+	u8 __iomem *regs = priv-&gt;regs;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	ret = b53_srab_request_grant(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	writel((u32)value, regs + B53_SRAB_WD_L);</div><div class='add'>+	writel((u32)(value &gt;&gt; 32), regs + B53_SRAB_WD_H);</div><div class='add'>+</div><div class='add'>+	ret = b53_srab_op(dev, page, reg, B53_SRAB_CMDSTAT_WRITE);</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	b53_srab_release_grant(dev);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t b53_srab_port_thread(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct b53_srab_port_priv *port = dev_id;</div><div class='add'>+	struct b53_device *dev = port-&gt;dev;</div><div class='add'>+</div><div class='add'>+	if (port-&gt;mode == PHY_INTERFACE_MODE_SGMII)</div><div class='add'>+		b53_port_event(dev-&gt;ds, port-&gt;num);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t b53_srab_port_isr(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct b53_srab_port_priv *port = dev_id;</div><div class='add'>+	struct b53_device *dev = port-&gt;dev;</div><div class='add'>+	struct b53_srab_priv *priv = dev-&gt;priv;</div><div class='add'>+</div><div class='add'>+	/* Acknowledge the interrupt */</div><div class='add'>+	writel(BIT(port-&gt;num), priv-&gt;regs + B53_SRAB_INTR);</div><div class='add'>+</div><div class='add'>+	return IRQ_WAKE_THREAD;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_B53_SERDES)</div><div class='add'>+static u8 b53_srab_serdes_map_lane(struct b53_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	struct b53_srab_priv *priv = dev-&gt;priv;</div><div class='add'>+	struct b53_srab_port_priv *p = &amp;priv-&gt;port_intrs[port];</div><div class='add'>+</div><div class='add'>+	if (p-&gt;mode != PHY_INTERFACE_MODE_SGMII)</div><div class='add'>+		return B53_INVALID_LANE;</div><div class='add'>+</div><div class='add'>+	switch (port) {</div><div class='add'>+	case 5:</div><div class='add'>+		return 0;</div><div class='add'>+	case 4:</div><div class='add'>+		return 1;</div><div class='add'>+	default:</div><div class='add'>+		return B53_INVALID_LANE;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static int b53_srab_irq_enable(struct b53_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	struct b53_srab_priv *priv = dev-&gt;priv;</div><div class='add'>+	struct b53_srab_port_priv *p = &amp;priv-&gt;port_intrs[port];</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	/* Interrupt is optional and was not specified, do not make</div><div class='add'>+	 * this fatal</div><div class='add'>+	 */</div><div class='add'>+	if (p-&gt;irq == -ENXIO)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = request_threaded_irq(p-&gt;irq, b53_srab_port_isr,</div><div class='add'>+				   b53_srab_port_thread, 0,</div><div class='add'>+				   dev_name(dev-&gt;dev), p);</div><div class='add'>+	if (!ret)</div><div class='add'>+		p-&gt;irq_enabled = true;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_srab_irq_disable(struct b53_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	struct b53_srab_priv *priv = dev-&gt;priv;</div><div class='add'>+	struct b53_srab_port_priv *p = &amp;priv-&gt;port_intrs[port];</div><div class='add'>+</div><div class='add'>+	if (p-&gt;irq_enabled) {</div><div class='add'>+		free_irq(p-&gt;irq, p);</div><div class='add'>+		p-&gt;irq_enabled = false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_srab_phylink_get_caps(struct b53_device *dev, int port,</div><div class='add'>+				      struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	struct b53_srab_priv *priv = dev-&gt;priv;</div><div class='add'>+	struct b53_srab_port_priv *p = &amp;priv-&gt;port_intrs[port];</div><div class='add'>+</div><div class='add'>+	switch (p-&gt;mode) {</div><div class='add'>+	case PHY_INTERFACE_MODE_SGMII:</div><div class='add'>+#if IS_ENABLED(CONFIG_B53_SERDES)</div><div class='add'>+		/* If p-&gt;mode indicates SGMII mode, that essentially means we</div><div class='add'>+		 * are using a serdes. As the serdes for the capabilities.</div><div class='add'>+		 */</div><div class='add'>+		b53_serdes_phylink_get_caps(dev, port, config);</div><div class='add'>+#endif</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case PHY_INTERFACE_MODE_NA:</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII:</div><div class='add'>+		/* If we support RGMII, support all RGMII modes, since</div><div class='add'>+		 * that dictates the PHY delay settings.</div><div class='add'>+		 */</div><div class='add'>+		phy_interface_set_rgmii(config-&gt;supported_interfaces);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		/* Some other mode (e.g. MII, GMII etc) */</div><div class='add'>+		__set_bit(p-&gt;mode, config-&gt;supported_interfaces);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct b53_io_ops b53_srab_ops = {</div><div class='add'>+	.read8 = b53_srab_read8,</div><div class='add'>+	.read16 = b53_srab_read16,</div><div class='add'>+	.read32 = b53_srab_read32,</div><div class='add'>+	.read48 = b53_srab_read48,</div><div class='add'>+	.read64 = b53_srab_read64,</div><div class='add'>+	.write8 = b53_srab_write8,</div><div class='add'>+	.write16 = b53_srab_write16,</div><div class='add'>+	.write32 = b53_srab_write32,</div><div class='add'>+	.write48 = b53_srab_write48,</div><div class='add'>+	.write64 = b53_srab_write64,</div><div class='add'>+	.irq_enable = b53_srab_irq_enable,</div><div class='add'>+	.irq_disable = b53_srab_irq_disable,</div><div class='add'>+	.phylink_get_caps = b53_srab_phylink_get_caps,</div><div class='add'>+#if IS_ENABLED(CONFIG_B53_SERDES)</div><div class='add'>+	.phylink_mac_select_pcs = b53_serdes_phylink_mac_select_pcs,</div><div class='add'>+	.serdes_map_lane = b53_srab_serdes_map_lane,</div><div class='add'>+	.serdes_link_set = b53_serdes_link_set,</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct of_device_id b53_srab_of_match[] = {</div><div class='add'>+	{ .compatible = "brcm,bcm53010-srab" },</div><div class='add'>+	{ .compatible = "brcm,bcm53011-srab" },</div><div class='add'>+	{ .compatible = "brcm,bcm53012-srab" },</div><div class='add'>+	{ .compatible = "brcm,bcm53018-srab" },</div><div class='add'>+	{ .compatible = "brcm,bcm53019-srab" },</div><div class='add'>+	{ .compatible = "brcm,bcm5301x-srab" },</div><div class='add'>+	{ .compatible = "brcm,bcm11360-srab", .data = (void *)BCM583XX_DEVICE_ID },</div><div class='add'>+	{ .compatible = "brcm,bcm58522-srab", .data = (void *)BCM58XX_DEVICE_ID },</div><div class='add'>+	{ .compatible = "brcm,bcm58525-srab", .data = (void *)BCM58XX_DEVICE_ID },</div><div class='add'>+	{ .compatible = "brcm,bcm58535-srab", .data = (void *)BCM58XX_DEVICE_ID },</div><div class='add'>+	{ .compatible = "brcm,bcm58622-srab", .data = (void *)BCM58XX_DEVICE_ID },</div><div class='add'>+	{ .compatible = "brcm,bcm58623-srab", .data = (void *)BCM58XX_DEVICE_ID },</div><div class='add'>+	{ .compatible = "brcm,bcm58625-srab", .data = (void *)BCM58XX_DEVICE_ID },</div><div class='add'>+	{ .compatible = "brcm,bcm88312-srab", .data = (void *)BCM58XX_DEVICE_ID },</div><div class='add'>+	{ .compatible = "brcm,cygnus-srab", .data = (void *)BCM583XX_DEVICE_ID },</div><div class='add'>+	{ .compatible = "brcm,nsp-srab", .data = (void *)BCM58XX_DEVICE_ID },</div><div class='add'>+	{ .compatible = "brcm,omega-srab", .data = (void *)BCM583XX_DEVICE_ID },</div><div class='add'>+	{ /* sentinel */ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, b53_srab_of_match);</div><div class='add'>+</div><div class='add'>+static void b53_srab_intr_set(struct b53_srab_priv *priv, bool set)</div><div class='add'>+{</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	reg = readl(priv-&gt;regs + B53_SRAB_CTRLS);</div><div class='add'>+	if (set)</div><div class='add'>+		reg |= B53_SRAB_CTRLS_HOST_INTR;</div><div class='add'>+	else</div><div class='add'>+		reg &amp;= ~B53_SRAB_CTRLS_HOST_INTR;</div><div class='add'>+	writel(reg, priv-&gt;regs + B53_SRAB_CTRLS);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_srab_prepare_irq(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = platform_get_drvdata(pdev);</div><div class='add'>+	struct b53_srab_priv *priv = dev-&gt;priv;</div><div class='add'>+	struct b53_srab_port_priv *port;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	char *name;</div><div class='add'>+</div><div class='add'>+	/* Clear all pending interrupts */</div><div class='add'>+	writel(0xffffffff, priv-&gt;regs + B53_SRAB_INTR);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; B53_N_PORTS; i++) {</div><div class='add'>+		port = &amp;priv-&gt;port_intrs[i];</div><div class='add'>+</div><div class='add'>+		/* There is no port 6 */</div><div class='add'>+		if (i == 6)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		name = kasprintf(GFP_KERNEL, "link_state_p%d", i);</div><div class='add'>+		if (!name)</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		port-&gt;num = i;</div><div class='add'>+		port-&gt;dev = dev;</div><div class='add'>+		port-&gt;irq = platform_get_irq_byname_optional(pdev, name);</div><div class='add'>+		kfree(name);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	b53_srab_intr_set(priv, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_srab_mux_init(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = platform_get_drvdata(pdev);</div><div class='add'>+	struct b53_srab_priv *priv = dev-&gt;priv;</div><div class='add'>+	struct b53_srab_port_priv *p;</div><div class='add'>+	unsigned int port;</div><div class='add'>+	u32 reg, off = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;pdata &amp;&amp; dev-&gt;pdata-&gt;chip_id != BCM58XX_DEVICE_ID)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	priv-&gt;mux_config = devm_platform_ioremap_resource(pdev, 1);</div><div class='add'>+	if (IS_ERR(priv-&gt;mux_config))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Obtain the port mux configuration so we know which lanes</div><div class='add'>+	 * actually map to SerDes lanes</div><div class='add'>+	 */</div><div class='add'>+	for (port = 5; port &gt; 3; port--, off += 4) {</div><div class='add'>+		p = &amp;priv-&gt;port_intrs[port];</div><div class='add'>+</div><div class='add'>+		reg = readl(priv-&gt;mux_config + B53_MUX_CONFIG_P5 + off);</div><div class='add'>+		switch (reg &amp; MUX_CONFIG_MASK) {</div><div class='add'>+		case MUX_CONFIG_SGMII:</div><div class='add'>+			p-&gt;mode = PHY_INTERFACE_MODE_SGMII;</div><div class='add'>+			ret = b53_serdes_init(dev, port);</div><div class='add'>+			if (ret)</div><div class='add'>+				continue;</div><div class='add'>+			break;</div><div class='add'>+		case MUX_CONFIG_MII_LITE:</div><div class='add'>+			p-&gt;mode = PHY_INTERFACE_MODE_MII;</div><div class='add'>+			break;</div><div class='add'>+		case MUX_CONFIG_GMII:</div><div class='add'>+			p-&gt;mode = PHY_INTERFACE_MODE_GMII;</div><div class='add'>+			break;</div><div class='add'>+		case MUX_CONFIG_RGMII:</div><div class='add'>+			p-&gt;mode = PHY_INTERFACE_MODE_RGMII;</div><div class='add'>+			break;</div><div class='add'>+		case MUX_CONFIG_INTERNAL:</div><div class='add'>+			p-&gt;mode = PHY_INTERFACE_MODE_INTERNAL;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			p-&gt;mode = PHY_INTERFACE_MODE_NA;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (p-&gt;mode != PHY_INTERFACE_MODE_NA)</div><div class='add'>+			dev_info(&amp;pdev-&gt;dev, "Port %d mode: %s\n",</div><div class='add'>+				 port, phy_modes(p-&gt;mode));</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int b53_srab_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct b53_platform_data *pdata = pdev-&gt;dev.platform_data;</div><div class='add'>+	struct device_node *dn = pdev-&gt;dev.of_node;</div><div class='add'>+	const struct of_device_id *of_id = NULL;</div><div class='add'>+	struct b53_srab_priv *priv;</div><div class='add'>+	struct b53_device *dev;</div><div class='add'>+</div><div class='add'>+	if (dn)</div><div class='add'>+		of_id = of_match_node(b53_srab_of_match, dn);</div><div class='add'>+</div><div class='add'>+	if (of_id) {</div><div class='add'>+		pdata = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*pdata), GFP_KERNEL);</div><div class='add'>+		if (!pdata)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		pdata-&gt;chip_id = (u32)(unsigned long)of_id-&gt;data;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv-&gt;regs = devm_platform_ioremap_resource(pdev, 0);</div><div class='add'>+	if (IS_ERR(priv-&gt;regs))</div><div class='add'>+		return PTR_ERR(priv-&gt;regs);</div><div class='add'>+</div><div class='add'>+	dev = b53_switch_alloc(&amp;pdev-&gt;dev, &amp;b53_srab_ops, priv);</div><div class='add'>+	if (!dev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	if (pdata)</div><div class='add'>+		dev-&gt;pdata = pdata;</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, dev);</div><div class='add'>+</div><div class='add'>+	b53_srab_prepare_irq(pdev);</div><div class='add'>+	b53_srab_mux_init(pdev);</div><div class='add'>+</div><div class='add'>+	return b53_switch_register(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_srab_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	if (!dev)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	b53_srab_intr_set(dev-&gt;priv, false);</div><div class='add'>+	b53_switch_remove(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void b53_srab_shutdown(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	if (!dev)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	b53_switch_shutdown(dev);</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver b53_srab_driver = {</div><div class='add'>+	.probe = b53_srab_probe,</div><div class='add'>+	.remove = b53_srab_remove,</div><div class='add'>+	.shutdown = b53_srab_shutdown,</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "b53-srab-switch",</div><div class='add'>+		.of_match_table = b53_srab_of_match,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_platform_driver(b53_srab_driver);</div><div class='add'>+MODULE_AUTHOR("Hauke Mehrtens &lt;hauke@hauke-m.de&gt;");</div><div class='add'>+MODULE_DESCRIPTION("B53 Switch Register Access Bridge Registers (SRAB) access driver");</div><div class='add'>+MODULE_LICENSE("Dual BSD/GPL");</div><div class='head'>diff --git a/drivers/net/dsa/bcm_sf2.c b/drivers/net/dsa/bcm_sf2.c<br/>index 079897b3a955..960685596093 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/bcm_sf2.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/bcm_sf2.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/bcm_sf2.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/bcm_sf2.c</a></div><div class='hunk'>@@ -1,12 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='ctx'> /*</div><div class='ctx'>  * Broadcom Starfighter 2 DSA switch driver</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2014, Broadcom Corporation</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/list.h&gt;</div><div class='hunk'>@@ -14,165 +10,162 @@</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='ctx'> #include &lt;linux/phy_fixed.h&gt;</div><div class='add'>+#include &lt;linux/phylink.h&gt;</div><div class='ctx'> #include &lt;linux/mii.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/of_irq.h&gt;</div><div class='ctx'> #include &lt;linux/of_address.h&gt;</div><div class='add'>+#include &lt;linux/of_net.h&gt;</div><div class='add'>+#include &lt;linux/of_mdio.h&gt;</div><div class='ctx'> #include &lt;net/dsa.h&gt;</div><div class='ctx'> #include &lt;linux/ethtool.h&gt;</div><div class='ctx'> #include &lt;linux/if_bridge.h&gt;</div><div class='ctx'> #include &lt;linux/brcmphy.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/platform_data/b53.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "bcm_sf2.h"</div><div class='ctx'> #include "bcm_sf2_regs.h"</div><div class='add'>+#include "b53/b53_priv.h"</div><div class='add'>+#include "b53/b53_regs.h"</div><div class='ctx'> </div><div class='del'>-/* String, offset, and register size in bytes if different from 4 bytes */</div><div class='del'>-static const struct bcm_sf2_hw_stats bcm_sf2_mib[] = {</div><div class='del'>-	{ "TxOctets",		0x000, 8	},</div><div class='del'>-	{ "TxDropPkts",		0x020		},</div><div class='del'>-	{ "TxQPKTQ0",		0x030		},</div><div class='del'>-	{ "TxBroadcastPkts",	0x040		},</div><div class='del'>-	{ "TxMulticastPkts",	0x050		},</div><div class='del'>-	{ "TxUnicastPKts",	0x060		},</div><div class='del'>-	{ "TxCollisions",	0x070		},</div><div class='del'>-	{ "TxSingleCollision",	0x080		},</div><div class='del'>-	{ "TxMultipleCollision", 0x090		},</div><div class='del'>-	{ "TxDeferredCollision", 0x0a0		},</div><div class='del'>-	{ "TxLateCollision",	0x0b0		},</div><div class='del'>-	{ "TxExcessiveCollision", 0x0c0		},</div><div class='del'>-	{ "TxFrameInDisc",	0x0d0		},</div><div class='del'>-	{ "TxPausePkts",	0x0e0		},</div><div class='del'>-	{ "TxQPKTQ1",		0x0f0		},</div><div class='del'>-	{ "TxQPKTQ2",		0x100		},</div><div class='del'>-	{ "TxQPKTQ3",		0x110		},</div><div class='del'>-	{ "TxQPKTQ4",		0x120		},</div><div class='del'>-	{ "TxQPKTQ5",		0x130		},</div><div class='del'>-	{ "RxOctets",		0x140, 8	},</div><div class='del'>-	{ "RxUndersizePkts",	0x160		},</div><div class='del'>-	{ "RxPausePkts",	0x170		},</div><div class='del'>-	{ "RxPkts64Octets",	0x180		},</div><div class='del'>-	{ "RxPkts65to127Octets", 0x190		},</div><div class='del'>-	{ "RxPkts128to255Octets", 0x1a0		},</div><div class='del'>-	{ "RxPkts256to511Octets", 0x1b0		},</div><div class='del'>-	{ "RxPkts512to1023Octets", 0x1c0	},</div><div class='del'>-	{ "RxPkts1024toMaxPktsOctets", 0x1d0	},</div><div class='del'>-	{ "RxOversizePkts",	0x1e0		},</div><div class='del'>-	{ "RxJabbers",		0x1f0		},</div><div class='del'>-	{ "RxAlignmentErrors",	0x200		},</div><div class='del'>-	{ "RxFCSErrors",	0x210		},</div><div class='del'>-	{ "RxGoodOctets",	0x220, 8	},</div><div class='del'>-	{ "RxDropPkts",		0x240		},</div><div class='del'>-	{ "RxUnicastPkts",	0x250		},</div><div class='del'>-	{ "RxMulticastPkts",	0x260		},</div><div class='del'>-	{ "RxBroadcastPkts",	0x270		},</div><div class='del'>-	{ "RxSAChanges",	0x280		},</div><div class='del'>-	{ "RxFragments",	0x290		},</div><div class='del'>-	{ "RxJumboPkt",		0x2a0		},</div><div class='del'>-	{ "RxSymblErr",		0x2b0		},</div><div class='del'>-	{ "InRangeErrCount",	0x2c0		},</div><div class='del'>-	{ "OutRangeErrCount",	0x2d0		},</div><div class='del'>-	{ "EEELpiEvent",	0x2e0		},</div><div class='del'>-	{ "EEELpiDuration",	0x2f0		},</div><div class='del'>-	{ "RxDiscard",		0x300, 8	},</div><div class='del'>-	{ "TxQPKTQ6",		0x320		},</div><div class='del'>-	{ "TxQPKTQ7",		0x330		},</div><div class='del'>-	{ "TxPkts64Octets",	0x340		},</div><div class='del'>-	{ "TxPkts65to127Octets", 0x350		},</div><div class='del'>-	{ "TxPkts128to255Octets", 0x360		},</div><div class='del'>-	{ "TxPkts256to511Ocets", 0x370		},</div><div class='del'>-	{ "TxPkts512to1023Ocets", 0x380		},</div><div class='del'>-	{ "TxPkts1024toMaxPktOcets", 0x390	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#define BCM_SF2_STATS_SIZE	ARRAY_SIZE(bcm_sf2_mib)</div><div class='del'>-</div><div class='del'>-static void bcm_sf2_sw_get_strings(struct dsa_switch *ds,</div><div class='del'>-				   int port, uint8_t *data)</div><div class='add'>+static u16 bcm_sf2_reg_rgmii_cntrl(struct bcm_sf2_priv *priv, int port)</div><div class='ctx'> {</div><div class='del'>-	unsigned int i;</div><div class='add'>+	switch (priv-&gt;type) {</div><div class='add'>+	case BCM4908_DEVICE_ID:</div><div class='add'>+		switch (port) {</div><div class='add'>+		case 7:</div><div class='add'>+			return REG_RGMII_11_CNTRL;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		switch (port) {</div><div class='add'>+		case 0:</div><div class='add'>+			return REG_RGMII_0_CNTRL;</div><div class='add'>+		case 1:</div><div class='add'>+			return REG_RGMII_1_CNTRL;</div><div class='add'>+		case 2:</div><div class='add'>+			return REG_RGMII_2_CNTRL;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; BCM_SF2_STATS_SIZE; i++)</div><div class='del'>-		memcpy(data + i * ETH_GSTRING_LEN,</div><div class='del'>-		       bcm_sf2_mib[i].string, ETH_GSTRING_LEN);</div><div class='add'>+	WARN_ONCE(1, "Unsupported port %d\n", port);</div><div class='add'>+</div><div class='add'>+	/* RO fallback reg */</div><div class='add'>+	return REG_SWITCH_STATUS;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void bcm_sf2_sw_get_ethtool_stats(struct dsa_switch *ds,</div><div class='del'>-					 int port, uint64_t *data)</div><div class='add'>+static u16 bcm_sf2_reg_led_base(struct bcm_sf2_priv *priv, int port)</div><div class='ctx'> {</div><div class='del'>-	struct bcm_sf2_priv *priv = ds_to_priv(ds);</div><div class='del'>-	const struct bcm_sf2_hw_stats *s;</div><div class='del'>-	unsigned int i;</div><div class='del'>-	u64 val = 0;</div><div class='del'>-	u32 offset;</div><div class='add'>+	switch (port) {</div><div class='add'>+	case 0:</div><div class='add'>+		return REG_LED_0_CNTRL;</div><div class='add'>+	case 1:</div><div class='add'>+		return REG_LED_1_CNTRL;</div><div class='add'>+	case 2:</div><div class='add'>+		return REG_LED_2_CNTRL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;priv-&gt;stats_mutex);</div><div class='add'>+	switch (priv-&gt;type) {</div><div class='add'>+	case BCM4908_DEVICE_ID:</div><div class='add'>+		switch (port) {</div><div class='add'>+		case 3:</div><div class='add'>+			return REG_LED_3_CNTRL;</div><div class='add'>+		case 7:</div><div class='add'>+			return REG_LED_4_CNTRL;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	/* Now fetch the per-port counters */</div><div class='del'>-	for (i = 0; i &lt; BCM_SF2_STATS_SIZE; i++) {</div><div class='del'>-		s = &amp;bcm_sf2_mib[i];</div><div class='add'>+	WARN_ONCE(1, "Unsupported port %d\n", port);</div><div class='ctx'> </div><div class='del'>-		/* Do a latched 64-bit read if needed */</div><div class='del'>-		offset = s-&gt;reg + CORE_P_MIB_OFFSET(port);</div><div class='del'>-		if (s-&gt;sizeof_stat == 8)</div><div class='del'>-			val = core_readq(priv, offset);</div><div class='del'>-		else</div><div class='del'>-			val = core_readl(priv, offset);</div><div class='add'>+	/* RO fallback reg */</div><div class='add'>+	return REG_SWITCH_STATUS;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		data[i] = (u64)val;</div><div class='add'>+static u32 bcm_sf2_port_override_offset(struct bcm_sf2_priv *priv, int port)</div><div class='add'>+{</div><div class='add'>+	switch (priv-&gt;type) {</div><div class='add'>+	case BCM4908_DEVICE_ID:</div><div class='add'>+	case BCM7445_DEVICE_ID:</div><div class='add'>+		return port == 8 ? CORE_STS_OVERRIDE_IMP :</div><div class='add'>+				   CORE_STS_OVERRIDE_GMIIP_PORT(port);</div><div class='add'>+	case BCM7278_DEVICE_ID:</div><div class='add'>+		return port == 8 ? CORE_STS_OVERRIDE_IMP2 :</div><div class='add'>+				   CORE_STS_OVERRIDE_GMIIP2_PORT(port);</div><div class='add'>+	default:</div><div class='add'>+		WARN_ONCE(1, "Unsupported device: %d\n", priv-&gt;type);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mutex_unlock(&amp;priv-&gt;stats_mutex);</div><div class='add'>+	/* RO fallback register */</div><div class='add'>+	return REG_SWITCH_STATUS;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int bcm_sf2_sw_get_sset_count(struct dsa_switch *ds)</div><div class='add'>+/* Return the number of active ports, not counting the IMP (CPU) port */</div><div class='add'>+static unsigned int bcm_sf2_num_active_ports(struct dsa_switch *ds)</div><div class='ctx'> {</div><div class='del'>-	return BCM_SF2_STATS_SIZE;</div><div class='del'>-}</div><div class='add'>+	struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);</div><div class='add'>+	unsigned int port, count = 0;</div><div class='ctx'> </div><div class='del'>-static char *bcm_sf2_sw_probe(struct device *host_dev, int sw_addr)</div><div class='del'>-{</div><div class='del'>-	return "Broadcom Starfighter 2";</div><div class='add'>+	for (port = 0; port &lt; ds-&gt;num_ports; port++) {</div><div class='add'>+		if (dsa_is_cpu_port(ds, port))</div><div class='add'>+			continue;</div><div class='add'>+		if (priv-&gt;port_sts[port].enabled)</div><div class='add'>+			count++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void bcm_sf2_imp_vlan_setup(struct dsa_switch *ds, int cpu_port)</div><div class='add'>+static void bcm_sf2_recalc_clock(struct dsa_switch *ds)</div><div class='ctx'> {</div><div class='del'>-	struct bcm_sf2_priv *priv = ds_to_priv(ds);</div><div class='del'>-	unsigned int i;</div><div class='del'>-	u32 reg;</div><div class='add'>+	struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);</div><div class='add'>+	unsigned long new_rate;</div><div class='add'>+	unsigned int ports_active;</div><div class='add'>+	/* Frequenty in Mhz */</div><div class='add'>+	static const unsigned long rate_table[] = {</div><div class='add'>+		59220000,</div><div class='add'>+		60820000,</div><div class='add'>+		62500000,</div><div class='add'>+		62500000,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	ports_active = bcm_sf2_num_active_ports(ds);</div><div class='add'>+	if (ports_active == 0 || !priv-&gt;clk_mdiv)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	/* Enable the IMP Port to be in the same VLAN as the other ports</div><div class='del'>-	 * on a per-port basis such that we only have Port i and IMP in</div><div class='del'>-	 * the same VLAN.</div><div class='add'>+	/* If we overflow our table, just use the recommended operational</div><div class='add'>+	 * frequency</div><div class='ctx'> 	 */</div><div class='del'>-	for (i = 0; i &lt; priv-&gt;hw_params.num_ports; i++) {</div><div class='del'>-		if (!((1 &lt;&lt; i) &amp; ds-&gt;phys_port_mask))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		reg = core_readl(priv, CORE_PORT_VLAN_CTL_PORT(i));</div><div class='del'>-		reg |= (1 &lt;&lt; cpu_port);</div><div class='del'>-		core_writel(priv, reg, CORE_PORT_VLAN_CTL_PORT(i));</div><div class='del'>-	}</div><div class='add'>+	if (ports_active &gt; ARRAY_SIZE(rate_table))</div><div class='add'>+		new_rate = 90000000;</div><div class='add'>+	else</div><div class='add'>+		new_rate = rate_table[ports_active - 1];</div><div class='add'>+	clk_set_rate(priv-&gt;clk_mdiv, new_rate);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bcm_sf2_imp_setup(struct dsa_switch *ds, int port)</div><div class='ctx'> {</div><div class='del'>-	struct bcm_sf2_priv *priv = ds_to_priv(ds);</div><div class='del'>-	u32 reg, val;</div><div class='add'>+	struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);</div><div class='add'>+	unsigned int i;</div><div class='add'>+	u32 reg;</div><div class='ctx'> </div><div class='ctx'> 	/* Enable the port memories */</div><div class='ctx'> 	reg = core_readl(priv, CORE_MEM_PSM_VDD_CTRL);</div><div class='ctx'> 	reg &amp;= ~P_TXQ_PSM_VDD(port);</div><div class='ctx'> 	core_writel(priv, reg, CORE_MEM_PSM_VDD_CTRL);</div><div class='ctx'> </div><div class='del'>-	/* Enable Broadcast, Multicast, Unicast forwarding to IMP port */</div><div class='del'>-	reg = core_readl(priv, CORE_IMP_CTL);</div><div class='del'>-	reg |= (RX_BCST_EN | RX_MCST_EN | RX_UCST_EN);</div><div class='del'>-	reg &amp;= ~(RX_DIS | TX_DIS);</div><div class='del'>-	core_writel(priv, reg, CORE_IMP_CTL);</div><div class='del'>-</div><div class='ctx'> 	/* Enable forwarding */</div><div class='ctx'> 	core_writel(priv, SW_FWDG_EN, CORE_SWMODE);</div><div class='ctx'> </div><div class='hunk'>@@ -181,69 +174,40 @@ static void bcm_sf2_imp_setup(struct dsa_switch *ds, int port)</div><div class='ctx'> 	reg |= MII_DUMB_FWDG_EN;</div><div class='ctx'> 	core_writel(priv, reg, CORE_SWITCH_CTRL);</div><div class='ctx'> </div><div class='del'>-	/* Resolve which bit controls the Broadcom tag */</div><div class='del'>-	switch (port) {</div><div class='del'>-	case 8:</div><div class='del'>-		val = BRCM_HDR_EN_P8;</div><div class='del'>-		break;</div><div class='del'>-	case 7:</div><div class='del'>-		val = BRCM_HDR_EN_P7;</div><div class='del'>-		break;</div><div class='del'>-	case 5:</div><div class='del'>-		val = BRCM_HDR_EN_P5;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		val = 0;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Enable Broadcom tags for IMP port */</div><div class='del'>-	reg = core_readl(priv, CORE_BRCM_HDR_CTRL);</div><div class='del'>-	reg |= val;</div><div class='del'>-	core_writel(priv, reg, CORE_BRCM_HDR_CTRL);</div><div class='del'>-</div><div class='del'>-	/* Enable reception Broadcom tag for CPU TX (switch RX) to</div><div class='del'>-	 * allow us to tag outgoing frames</div><div class='del'>-	 */</div><div class='del'>-	reg = core_readl(priv, CORE_BRCM_HDR_RX_DIS);</div><div class='del'>-	reg &amp;= ~(1 &lt;&lt; port);</div><div class='del'>-	core_writel(priv, reg, CORE_BRCM_HDR_RX_DIS);</div><div class='del'>-</div><div class='del'>-	/* Enable transmission of Broadcom tags from the switch (CPU RX) to</div><div class='del'>-	 * allow delivering frames to the per-port net_devices</div><div class='add'>+	/* Configure Traffic Class to QoS mapping, allow each priority to map</div><div class='add'>+	 * to a different queue number</div><div class='ctx'> 	 */</div><div class='del'>-	reg = core_readl(priv, CORE_BRCM_HDR_TX_DIS);</div><div class='del'>-	reg &amp;= ~(1 &lt;&lt; port);</div><div class='del'>-	core_writel(priv, reg, CORE_BRCM_HDR_TX_DIS);</div><div class='del'>-</div><div class='del'>-	/* Force link status for IMP port */</div><div class='del'>-	reg = core_readl(priv, CORE_STS_OVERRIDE_IMP);</div><div class='del'>-	reg |= (MII_SW_OR | LINK_STS);</div><div class='del'>-	core_writel(priv, reg, CORE_STS_OVERRIDE_IMP);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void bcm_sf2_eee_enable_set(struct dsa_switch *ds, int port, bool enable)</div><div class='del'>-{</div><div class='del'>-	struct bcm_sf2_priv *priv = ds_to_priv(ds);</div><div class='del'>-	u32 reg;</div><div class='add'>+	reg = core_readl(priv, CORE_PORT_TC2_QOS_MAP_PORT(port));</div><div class='add'>+	for (i = 0; i &lt; SF2_NUM_EGRESS_QUEUES; i++)</div><div class='add'>+		reg |= i &lt;&lt; (PRT_TO_QID_SHIFT * i);</div><div class='add'>+	core_writel(priv, reg, CORE_PORT_TC2_QOS_MAP_PORT(port));</div><div class='add'>+</div><div class='add'>+	b53_brcm_hdr_setup(ds, port);</div><div class='add'>+</div><div class='add'>+	if (port == 8) {</div><div class='add'>+		/* Enable Broadcast, Multicast, Unicast forwarding to IMP port */</div><div class='add'>+		reg = core_readl(priv, CORE_IMP_CTL);</div><div class='add'>+		reg |= (RX_BCST_EN | RX_MCST_EN | RX_UCST_EN);</div><div class='add'>+		reg &amp;= ~(RX_DIS | TX_DIS);</div><div class='add'>+		core_writel(priv, reg, CORE_IMP_CTL);</div><div class='add'>+	} else {</div><div class='add'>+		reg = core_readl(priv, CORE_G_PCTL_PORT(port));</div><div class='add'>+		reg &amp;= ~(RX_DIS | TX_DIS);</div><div class='add'>+		core_writel(priv, reg, CORE_G_PCTL_PORT(port));</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	reg = core_readl(priv, CORE_EEE_EN_CTRL);</div><div class='del'>-	if (enable)</div><div class='del'>-		reg |= 1 &lt;&lt; port;</div><div class='del'>-	else</div><div class='del'>-		reg &amp;= ~(1 &lt;&lt; port);</div><div class='del'>-	core_writel(priv, reg, CORE_EEE_EN_CTRL);</div><div class='add'>+	priv-&gt;port_sts[port].enabled = true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void bcm_sf2_gphy_enable_set(struct dsa_switch *ds, bool enable)</div><div class='ctx'> {</div><div class='del'>-	struct bcm_sf2_priv *priv = ds_to_priv(ds);</div><div class='add'>+	struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);</div><div class='ctx'> 	u32 reg;</div><div class='ctx'> </div><div class='ctx'> 	reg = reg_readl(priv, REG_SPHY_CNTRL);</div><div class='ctx'> 	if (enable) {</div><div class='ctx'> 		reg |= PHY_RESET;</div><div class='del'>-		reg &amp;= ~(EXT_PWR_DOWN | IDDQ_BIAS | CK25_DIS);</div><div class='add'>+		reg &amp;= ~(EXT_PWR_DOWN | IDDQ_BIAS | IDDQ_GLOBAL_PWR | CK25_DIS);</div><div class='ctx'> 		reg_writel(priv, reg, REG_SPHY_CNTRL);</div><div class='ctx'> 		udelay(21);</div><div class='ctx'> 		reg = reg_readl(priv, REG_SPHY_CNTRL);</div><div class='hunk'>@@ -258,29 +222,94 @@ static void bcm_sf2_gphy_enable_set(struct dsa_switch *ds, bool enable)</div><div class='ctx'> </div><div class='ctx'> 	/* Use PHY-driven LED signaling */</div><div class='ctx'> 	if (!enable) {</div><div class='del'>-		reg = reg_readl(priv, REG_LED_CNTRL(0));</div><div class='del'>-		reg |= SPDLNK_SRC_SEL;</div><div class='del'>-		reg_writel(priv, reg, REG_LED_CNTRL(0));</div><div class='add'>+		u16 led_ctrl = bcm_sf2_reg_led_base(priv, 0);</div><div class='add'>+</div><div class='add'>+		if (priv-&gt;type == BCM7278_DEVICE_ID ||</div><div class='add'>+		    priv-&gt;type == BCM7445_DEVICE_ID) {</div><div class='add'>+			reg = reg_led_readl(priv, led_ctrl, 0);</div><div class='add'>+			reg |= LED_CNTRL_SPDLNK_SRC_SEL;</div><div class='add'>+			reg_led_writel(priv, reg, led_ctrl, 0);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void bcm_sf2_port_intr_enable(struct bcm_sf2_priv *priv,</div><div class='add'>+					    int port)</div><div class='add'>+{</div><div class='add'>+	unsigned int off;</div><div class='add'>+</div><div class='add'>+	switch (port) {</div><div class='add'>+	case 7:</div><div class='add'>+		off = P7_IRQ_OFF;</div><div class='add'>+		break;</div><div class='add'>+	case 0:</div><div class='add'>+		/* Port 0 interrupts are located on the first bank */</div><div class='add'>+		intrl2_0_mask_clear(priv, P_IRQ_MASK(P0_IRQ_OFF));</div><div class='add'>+		return;</div><div class='add'>+	default:</div><div class='add'>+		off = P_IRQ_OFF(port);</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	intrl2_1_mask_clear(priv, P_IRQ_MASK(off));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void bcm_sf2_port_intr_disable(struct bcm_sf2_priv *priv,</div><div class='add'>+					     int port)</div><div class='add'>+{</div><div class='add'>+	unsigned int off;</div><div class='add'>+</div><div class='add'>+	switch (port) {</div><div class='add'>+	case 7:</div><div class='add'>+		off = P7_IRQ_OFF;</div><div class='add'>+		break;</div><div class='add'>+	case 0:</div><div class='add'>+		/* Port 0 interrupts are located on the first bank */</div><div class='add'>+		intrl2_0_mask_set(priv, P_IRQ_MASK(P0_IRQ_OFF));</div><div class='add'>+		intrl2_0_writel(priv, P_IRQ_MASK(P0_IRQ_OFF), INTRL2_CPU_CLEAR);</div><div class='add'>+		return;</div><div class='add'>+	default:</div><div class='add'>+		off = P_IRQ_OFF(port);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	intrl2_1_mask_set(priv, P_IRQ_MASK(off));</div><div class='add'>+	intrl2_1_writel(priv, P_IRQ_MASK(off), INTRL2_CPU_CLEAR);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int bcm_sf2_port_setup(struct dsa_switch *ds, int port,</div><div class='ctx'> 			      struct phy_device *phy)</div><div class='ctx'> {</div><div class='del'>-	struct bcm_sf2_priv *priv = ds_to_priv(ds);</div><div class='del'>-	s8 cpu_port = ds-&gt;dst[ds-&gt;index].cpu_port;</div><div class='add'>+	struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);</div><div class='add'>+	unsigned int i;</div><div class='ctx'> 	u32 reg;</div><div class='ctx'> </div><div class='add'>+	if (!dsa_is_user_port(ds, port))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	priv-&gt;port_sts[port].enabled = true;</div><div class='add'>+</div><div class='add'>+	bcm_sf2_recalc_clock(ds);</div><div class='add'>+</div><div class='ctx'> 	/* Clear the memory power down */</div><div class='ctx'> 	reg = core_readl(priv, CORE_MEM_PSM_VDD_CTRL);</div><div class='ctx'> 	reg &amp;= ~P_TXQ_PSM_VDD(port);</div><div class='ctx'> 	core_writel(priv, reg, CORE_MEM_PSM_VDD_CTRL);</div><div class='ctx'> </div><div class='del'>-	/* Clear the Rx and Tx disable bits and set to no spanning tree */</div><div class='del'>-	core_writel(priv, 0, CORE_G_PCTL_PORT(port));</div><div class='add'>+	/* Enable Broadcom tags for that port if requested */</div><div class='add'>+	if (priv-&gt;brcm_tag_mask &amp; BIT(port))</div><div class='add'>+		b53_brcm_hdr_setup(ds, port);</div><div class='add'>+</div><div class='add'>+	/* Configure Traffic Class to QoS mapping, allow each priority to map</div><div class='add'>+	 * to a different queue number</div><div class='add'>+	 */</div><div class='add'>+	reg = core_readl(priv, CORE_PORT_TC2_QOS_MAP_PORT(port));</div><div class='add'>+	for (i = 0; i &lt; SF2_NUM_EGRESS_QUEUES; i++)</div><div class='add'>+		reg |= i &lt;&lt; (PRT_TO_QID_SHIFT * i);</div><div class='add'>+	core_writel(priv, reg, CORE_PORT_TC2_QOS_MAP_PORT(port));</div><div class='ctx'> </div><div class='ctx'> 	/* Re-enable the GPHY and re-apply workarounds */</div><div class='del'>-	if (port == 0 &amp;&amp; priv-&gt;hw_params.num_gphy == 1) {</div><div class='add'>+	if (priv-&gt;int_phy_mask &amp; 1 &lt;&lt; port &amp;&amp; priv-&gt;hw_params.num_gphy == 1) {</div><div class='ctx'> 		bcm_sf2_gphy_enable_set(ds, true);</div><div class='ctx'> 		if (phy) {</div><div class='ctx'> 			/* if phy_stop() has been called before, phy</div><div class='hunk'>@@ -297,263 +326,121 @@ static int bcm_sf2_port_setup(struct dsa_switch *ds, int port,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Enable port 7 interrupts to get notified */</div><div class='del'>-	if (port == 7)</div><div class='del'>-		intrl2_1_mask_clear(priv, P_IRQ_MASK(P7_IRQ_OFF));</div><div class='del'>-</div><div class='del'>-	/* Set this port, and only this one to be in the default VLAN,</div><div class='del'>-	 * if member of a bridge, restore its membership prior to</div><div class='del'>-	 * bringing down this port.</div><div class='del'>-	 */</div><div class='del'>-	reg = core_readl(priv, CORE_PORT_VLAN_CTL_PORT(port));</div><div class='del'>-	reg &amp;= ~PORT_VLAN_CTRL_MASK;</div><div class='del'>-	reg |= (1 &lt;&lt; port);</div><div class='del'>-	reg |= priv-&gt;port_sts[port].vlan_ctl_mask;</div><div class='del'>-	core_writel(priv, reg, CORE_PORT_VLAN_CTL_PORT(port));</div><div class='del'>-</div><div class='del'>-	bcm_sf2_imp_vlan_setup(ds, cpu_port);</div><div class='del'>-</div><div class='del'>-	/* If EEE was enabled, restore it */</div><div class='del'>-	if (priv-&gt;port_sts[port].eee.eee_enabled)</div><div class='del'>-		bcm_sf2_eee_enable_set(ds, port, true);</div><div class='add'>+	/* Enable MoCA port interrupts to get notified */</div><div class='add'>+	if (port == priv-&gt;moca_port)</div><div class='add'>+		bcm_sf2_port_intr_enable(priv, port);</div><div class='add'>+</div><div class='add'>+	/* Set per-queue pause threshold to 32 */</div><div class='add'>+	core_writel(priv, 32, CORE_TXQ_THD_PAUSE_QN_PORT(port));</div><div class='add'>+</div><div class='add'>+	/* Set ACB threshold to 24 */</div><div class='add'>+	for (i = 0; i &lt; SF2_NUM_EGRESS_QUEUES; i++) {</div><div class='add'>+		reg = acb_readl(priv, ACB_QUEUE_CFG(port *</div><div class='add'>+						    SF2_NUM_EGRESS_QUEUES + i));</div><div class='add'>+		reg &amp;= ~XOFF_THRESHOLD_MASK;</div><div class='add'>+		reg |= 24;</div><div class='add'>+		acb_writel(priv, reg, ACB_QUEUE_CFG(port *</div><div class='add'>+						    SF2_NUM_EGRESS_QUEUES + i));</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return b53_enable_port(ds, port, phy);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void bcm_sf2_port_disable(struct dsa_switch *ds, int port,</div><div class='del'>-				 struct phy_device *phy)</div><div class='add'>+static void bcm_sf2_port_disable(struct dsa_switch *ds, int port)</div><div class='ctx'> {</div><div class='del'>-	struct bcm_sf2_priv *priv = ds_to_priv(ds);</div><div class='del'>-	u32 off, reg;</div><div class='add'>+	struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);</div><div class='add'>+	u32 reg;</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;wol_ports_mask &amp; (1 &lt;&lt; port))</div><div class='add'>+	/* Disable learning while in WoL mode */</div><div class='add'>+	if (priv-&gt;wol_ports_mask &amp; (1 &lt;&lt; port)) {</div><div class='add'>+		reg = core_readl(priv, CORE_DIS_LEARN);</div><div class='add'>+		reg |= BIT(port);</div><div class='add'>+		core_writel(priv, reg, CORE_DIS_LEARN);</div><div class='ctx'> 		return;</div><div class='del'>-</div><div class='del'>-	if (port == 7) {</div><div class='del'>-		intrl2_1_mask_set(priv, P_IRQ_MASK(P7_IRQ_OFF));</div><div class='del'>-		intrl2_1_writel(priv, P_IRQ_MASK(P7_IRQ_OFF), INTRL2_CPU_CLEAR);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (port == 0 &amp;&amp; priv-&gt;hw_params.num_gphy == 1)</div><div class='del'>-		bcm_sf2_gphy_enable_set(ds, false);</div><div class='add'>+	if (port == priv-&gt;moca_port)</div><div class='add'>+		bcm_sf2_port_intr_disable(priv, port);</div><div class='ctx'> </div><div class='del'>-	if (dsa_is_cpu_port(ds, port))</div><div class='del'>-		off = CORE_IMP_CTL;</div><div class='del'>-	else</div><div class='del'>-		off = CORE_G_PCTL_PORT(port);</div><div class='add'>+	if (priv-&gt;int_phy_mask &amp; 1 &lt;&lt; port &amp;&amp; priv-&gt;hw_params.num_gphy == 1)</div><div class='add'>+		bcm_sf2_gphy_enable_set(ds, false);</div><div class='ctx'> </div><div class='del'>-	reg = core_readl(priv, off);</div><div class='del'>-	reg |= RX_DIS | TX_DIS;</div><div class='del'>-	core_writel(priv, reg, off);</div><div class='add'>+	b53_disable_port(ds, port);</div><div class='ctx'> </div><div class='ctx'> 	/* Power down the port memory */</div><div class='ctx'> 	reg = core_readl(priv, CORE_MEM_PSM_VDD_CTRL);</div><div class='ctx'> 	reg |= P_TXQ_PSM_VDD(port);</div><div class='ctx'> 	core_writel(priv, reg, CORE_MEM_PSM_VDD_CTRL);</div><div class='del'>-}</div><div class='ctx'> </div><div class='del'>-/* Returns 0 if EEE was not enabled, or 1 otherwise</div><div class='del'>- */</div><div class='del'>-static int bcm_sf2_eee_init(struct dsa_switch *ds, int port,</div><div class='del'>-			    struct phy_device *phy)</div><div class='del'>-{</div><div class='del'>-	struct bcm_sf2_priv *priv = ds_to_priv(ds);</div><div class='del'>-	struct ethtool_eee *p = &amp;priv-&gt;port_sts[port].eee;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	p-&gt;supported = (SUPPORTED_1000baseT_Full | SUPPORTED_100baseT_Full);</div><div class='del'>-</div><div class='del'>-	ret = phy_init_eee(phy, 0);</div><div class='del'>-	if (ret)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	bcm_sf2_eee_enable_set(ds, port, true);</div><div class='add'>+	priv-&gt;port_sts[port].enabled = false;</div><div class='ctx'> </div><div class='del'>-	return 1;</div><div class='add'>+	bcm_sf2_recalc_clock(ds);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int bcm_sf2_sw_get_eee(struct dsa_switch *ds, int port,</div><div class='del'>-			      struct ethtool_eee *e)</div><div class='del'>-{</div><div class='del'>-	struct bcm_sf2_priv *priv = ds_to_priv(ds);</div><div class='del'>-	struct ethtool_eee *p = &amp;priv-&gt;port_sts[port].eee;</div><div class='del'>-	u32 reg;</div><div class='ctx'> </div><div class='del'>-	reg = core_readl(priv, CORE_EEE_LPI_INDICATE);</div><div class='del'>-	e-&gt;eee_enabled = p-&gt;eee_enabled;</div><div class='del'>-	e-&gt;eee_active = !!(reg &amp; (1 &lt;&lt; port));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int bcm_sf2_sw_set_eee(struct dsa_switch *ds, int port,</div><div class='del'>-			      struct phy_device *phydev,</div><div class='del'>-			      struct ethtool_eee *e)</div><div class='del'>-{</div><div class='del'>-	struct bcm_sf2_priv *priv = ds_to_priv(ds);</div><div class='del'>-	struct ethtool_eee *p = &amp;priv-&gt;port_sts[port].eee;</div><div class='del'>-</div><div class='del'>-	p-&gt;eee_enabled = e-&gt;eee_enabled;</div><div class='del'>-</div><div class='del'>-	if (!p-&gt;eee_enabled) {</div><div class='del'>-		bcm_sf2_eee_enable_set(ds, port, false);</div><div class='del'>-	} else {</div><div class='del'>-		p-&gt;eee_enabled = bcm_sf2_eee_init(ds, port, phydev);</div><div class='del'>-		if (!p-&gt;eee_enabled)</div><div class='del'>-			return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Fast-ageing of ARL entries for a given port, equivalent to an ARL</div><div class='del'>- * flush for that port.</div><div class='del'>- */</div><div class='del'>-static int bcm_sf2_sw_fast_age_port(struct dsa_switch  *ds, int port)</div><div class='add'>+static int bcm_sf2_sw_indir_rw(struct bcm_sf2_priv *priv, int op, int addr,</div><div class='add'>+			       int regnum, u16 val)</div><div class='ctx'> {</div><div class='del'>-	struct bcm_sf2_priv *priv = ds_to_priv(ds);</div><div class='del'>-	unsigned int timeout = 1000;</div><div class='add'>+	int ret = 0;</div><div class='ctx'> 	u32 reg;</div><div class='ctx'> </div><div class='del'>-	core_writel(priv, port, CORE_FAST_AGE_PORT);</div><div class='add'>+	reg = reg_readl(priv, REG_SWITCH_CNTRL);</div><div class='add'>+	reg |= MDIO_MASTER_SEL;</div><div class='add'>+	reg_writel(priv, reg, REG_SWITCH_CNTRL);</div><div class='ctx'> </div><div class='del'>-	reg = core_readl(priv, CORE_FAST_AGE_CTRL);</div><div class='del'>-	reg |= EN_AGE_PORT | FAST_AGE_STR_DONE;</div><div class='del'>-	core_writel(priv, reg, CORE_FAST_AGE_CTRL);</div><div class='add'>+	/* Page &lt;&lt; 8 | offset */</div><div class='add'>+	reg = 0x70;</div><div class='add'>+	reg &lt;&lt;= 2;</div><div class='add'>+	core_writel(priv, addr, reg);</div><div class='ctx'> </div><div class='del'>-	do {</div><div class='del'>-		reg = core_readl(priv, CORE_FAST_AGE_CTRL);</div><div class='del'>-		if (!(reg &amp; FAST_AGE_STR_DONE))</div><div class='del'>-			break;</div><div class='add'>+	/* Page &lt;&lt; 8 | offset */</div><div class='add'>+	reg = 0x80 &lt;&lt; 8 | regnum &lt;&lt; 1;</div><div class='add'>+	reg &lt;&lt;= 2;</div><div class='ctx'> </div><div class='del'>-		cpu_relax();</div><div class='del'>-	} while (timeout--);</div><div class='add'>+	if (op)</div><div class='add'>+		ret = core_readl(priv, reg);</div><div class='add'>+	else</div><div class='add'>+		core_writel(priv, val, reg);</div><div class='ctx'> </div><div class='del'>-	if (!timeout)</div><div class='del'>-		return -ETIMEDOUT;</div><div class='add'>+	reg = reg_readl(priv, REG_SWITCH_CNTRL);</div><div class='add'>+	reg &amp;= ~MDIO_MASTER_SEL;</div><div class='add'>+	reg_writel(priv, reg, REG_SWITCH_CNTRL);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return ret &amp; 0xffff;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int bcm_sf2_sw_br_join(struct dsa_switch *ds, int port,</div><div class='del'>-			      u32 br_port_mask)</div><div class='add'>+static int bcm_sf2_sw_mdio_read(struct mii_bus *bus, int addr, int regnum)</div><div class='ctx'> {</div><div class='del'>-	struct bcm_sf2_priv *priv = ds_to_priv(ds);</div><div class='del'>-	unsigned int i;</div><div class='del'>-	u32 reg, p_ctl;</div><div class='del'>-</div><div class='del'>-	p_ctl = core_readl(priv, CORE_PORT_VLAN_CTL_PORT(port));</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; priv-&gt;hw_params.num_ports; i++) {</div><div class='del'>-		if (!((1 &lt;&lt; i) &amp; br_port_mask))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		/* Add this local port to the remote port VLAN control</div><div class='del'>-		 * membership and update the remote port bitmask</div><div class='del'>-		 */</div><div class='del'>-		reg = core_readl(priv, CORE_PORT_VLAN_CTL_PORT(i));</div><div class='del'>-		reg |= 1 &lt;&lt; port;</div><div class='del'>-		core_writel(priv, reg, CORE_PORT_VLAN_CTL_PORT(i));</div><div class='del'>-		priv-&gt;port_sts[i].vlan_ctl_mask = reg;</div><div class='del'>-</div><div class='del'>-		p_ctl |= 1 &lt;&lt; i;</div><div class='del'>-	}</div><div class='add'>+	struct bcm_sf2_priv *priv = bus-&gt;priv;</div><div class='ctx'> </div><div class='del'>-	/* Configure the local port VLAN control membership to include</div><div class='del'>-	 * remote ports and update the local port bitmask</div><div class='add'>+	/* Intercept reads from Broadcom pseudo-PHY address, else, send</div><div class='add'>+	 * them to our master MDIO bus controller</div><div class='ctx'> 	 */</div><div class='del'>-	core_writel(priv, p_ctl, CORE_PORT_VLAN_CTL_PORT(port));</div><div class='del'>-	priv-&gt;port_sts[port].vlan_ctl_mask = p_ctl;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int bcm_sf2_sw_br_leave(struct dsa_switch *ds, int port,</div><div class='del'>-			       u32 br_port_mask)</div><div class='del'>-{</div><div class='del'>-	struct bcm_sf2_priv *priv = ds_to_priv(ds);</div><div class='del'>-	unsigned int i;</div><div class='del'>-	u32 reg, p_ctl;</div><div class='del'>-</div><div class='del'>-	p_ctl = core_readl(priv, CORE_PORT_VLAN_CTL_PORT(port));</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; priv-&gt;hw_params.num_ports; i++) {</div><div class='del'>-		/* Don't touch the remaining ports */</div><div class='del'>-		if (!((1 &lt;&lt; i) &amp; br_port_mask))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		reg = core_readl(priv, CORE_PORT_VLAN_CTL_PORT(i));</div><div class='del'>-		reg &amp;= ~(1 &lt;&lt; port);</div><div class='del'>-		core_writel(priv, reg, CORE_PORT_VLAN_CTL_PORT(i));</div><div class='del'>-		priv-&gt;port_sts[port].vlan_ctl_mask = reg;</div><div class='del'>-</div><div class='del'>-		/* Prevent self removal to preserve isolation */</div><div class='del'>-		if (port != i)</div><div class='del'>-			p_ctl &amp;= ~(1 &lt;&lt; i);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	core_writel(priv, p_ctl, CORE_PORT_VLAN_CTL_PORT(port));</div><div class='del'>-	priv-&gt;port_sts[port].vlan_ctl_mask = p_ctl;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	if (addr == BRCM_PSEUDO_PHY_ADDR &amp;&amp; priv-&gt;indir_phy_mask &amp; BIT(addr))</div><div class='add'>+		return bcm_sf2_sw_indir_rw(priv, 1, addr, regnum, 0);</div><div class='add'>+	else</div><div class='add'>+		return mdiobus_read_nested(priv-&gt;master_mii_bus, addr, regnum);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int bcm_sf2_sw_br_set_stp_state(struct dsa_switch *ds, int port,</div><div class='del'>-				       u8 state)</div><div class='add'>+static int bcm_sf2_sw_mdio_write(struct mii_bus *bus, int addr, int regnum,</div><div class='add'>+				 u16 val)</div><div class='ctx'> {</div><div class='del'>-	struct bcm_sf2_priv *priv = ds_to_priv(ds);</div><div class='del'>-	u8 hw_state, cur_hw_state;</div><div class='del'>-	int ret = 0;</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	reg = core_readl(priv, CORE_G_PCTL_PORT(port));</div><div class='del'>-	cur_hw_state = reg &gt;&gt; G_MISTP_STATE_SHIFT;</div><div class='del'>-</div><div class='del'>-	switch (state) {</div><div class='del'>-	case BR_STATE_DISABLED:</div><div class='del'>-		hw_state = G_MISTP_DIS_STATE;</div><div class='del'>-		break;</div><div class='del'>-	case BR_STATE_LISTENING:</div><div class='del'>-		hw_state = G_MISTP_LISTEN_STATE;</div><div class='del'>-		break;</div><div class='del'>-	case BR_STATE_LEARNING:</div><div class='del'>-		hw_state = G_MISTP_LEARN_STATE;</div><div class='del'>-		break;</div><div class='del'>-	case BR_STATE_FORWARDING:</div><div class='del'>-		hw_state = G_MISTP_FWD_STATE;</div><div class='del'>-		break;</div><div class='del'>-	case BR_STATE_BLOCKING:</div><div class='del'>-		hw_state = G_MISTP_BLOCK_STATE;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		pr_err("%s: invalid STP state: %d\n", __func__, state);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='add'>+	struct bcm_sf2_priv *priv = bus-&gt;priv;</div><div class='ctx'> </div><div class='del'>-	/* Fast-age ARL entries if we are moving a port from Learning or</div><div class='del'>-	 * Forwarding state to Disabled, Blocking or Listening state</div><div class='add'>+	/* Intercept writes to the Broadcom pseudo-PHY address, else,</div><div class='add'>+	 * send them to our master MDIO bus controller</div><div class='ctx'> 	 */</div><div class='del'>-	if (cur_hw_state != hw_state) {</div><div class='del'>-		if (cur_hw_state &amp; 4 &amp;&amp; !(hw_state &amp; 4)) {</div><div class='del'>-			ret = bcm_sf2_sw_fast_age_port(ds, port);</div><div class='del'>-			if (ret) {</div><div class='del'>-				pr_err("%s: fast-ageing failed\n", __func__);</div><div class='del'>-				return ret;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	reg = core_readl(priv, CORE_G_PCTL_PORT(port));</div><div class='del'>-	reg &amp;= ~(G_MISTP_STATE_MASK &lt;&lt; G_MISTP_STATE_SHIFT);</div><div class='del'>-	reg |= hw_state;</div><div class='del'>-	core_writel(priv, reg, CORE_G_PCTL_PORT(port));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	if (addr == BRCM_PSEUDO_PHY_ADDR &amp;&amp; priv-&gt;indir_phy_mask &amp; BIT(addr))</div><div class='add'>+		return bcm_sf2_sw_indir_rw(priv, 0, addr, regnum, val);</div><div class='add'>+	else</div><div class='add'>+		return mdiobus_write_nested(priv-&gt;master_mii_bus, addr,</div><div class='add'>+				regnum, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static irqreturn_t bcm_sf2_switch_0_isr(int irq, void *dev_id)</div><div class='ctx'> {</div><div class='del'>-	struct bcm_sf2_priv *priv = dev_id;</div><div class='add'>+	struct dsa_switch *ds = dev_id;</div><div class='add'>+	struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;irq0_stat = intrl2_0_readl(priv, INTRL2_CPU_STATUS) &amp;</div><div class='ctx'> 				~priv-&gt;irq0_mask;</div><div class='hunk'>@@ -564,16 +451,21 @@ static irqreturn_t bcm_sf2_switch_0_isr(int irq, void *dev_id)</div><div class='ctx'> </div><div class='ctx'> static irqreturn_t bcm_sf2_switch_1_isr(int irq, void *dev_id)</div><div class='ctx'> {</div><div class='del'>-	struct bcm_sf2_priv *priv = dev_id;</div><div class='add'>+	struct dsa_switch *ds = dev_id;</div><div class='add'>+	struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;irq1_stat = intrl2_1_readl(priv, INTRL2_CPU_STATUS) &amp;</div><div class='ctx'> 				~priv-&gt;irq1_mask;</div><div class='ctx'> 	intrl2_1_writel(priv, priv-&gt;irq1_stat, INTRL2_CPU_CLEAR);</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;irq1_stat &amp; P_LINK_UP_IRQ(P7_IRQ_OFF))</div><div class='del'>-		priv-&gt;port_sts[7].link = 1;</div><div class='del'>-	if (priv-&gt;irq1_stat &amp; P_LINK_DOWN_IRQ(P7_IRQ_OFF))</div><div class='del'>-		priv-&gt;port_sts[7].link = 0;</div><div class='add'>+	if (priv-&gt;irq1_stat &amp; P_LINK_UP_IRQ(P7_IRQ_OFF)) {</div><div class='add'>+		priv-&gt;port_sts[7].link = true;</div><div class='add'>+		dsa_port_phylink_mac_change(ds, 7, true);</div><div class='add'>+	}</div><div class='add'>+	if (priv-&gt;irq1_stat &amp; P_LINK_DOWN_IRQ(P7_IRQ_OFF)) {</div><div class='add'>+		priv-&gt;port_sts[7].link = false;</div><div class='add'>+		dsa_port_phylink_mac_change(ds, 7, false);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='hunk'>@@ -582,6 +474,18 @@ static int bcm_sf2_sw_rst(struct bcm_sf2_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int timeout = 1000;</div><div class='ctx'> 	u32 reg;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* The watchdog reset does not work on 7278, we need to hit the</div><div class='add'>+	 * "external" reset line through the reset controller.</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;type == BCM7278_DEVICE_ID) {</div><div class='add'>+		ret = reset_control_assert(priv-&gt;rcdev);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		return reset_control_deassert(priv-&gt;rcdev);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	reg = core_readl(priv, CORE_WATCHDOG_CTRL);</div><div class='ctx'> 	reg |= SOFTWARE_RESET | EN_CHIP_RST | EN_SW_RESET;</div><div class='hunk'>@@ -601,286 +505,380 @@ static int bcm_sf2_sw_rst(struct bcm_sf2_priv *priv)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void bcm_sf2_crossbar_setup(struct bcm_sf2_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = priv-&gt;dev-&gt;ds-&gt;dev;</div><div class='add'>+	int shift;</div><div class='add'>+	u32 mask;</div><div class='add'>+	u32 reg;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	mask = BIT(priv-&gt;num_crossbar_ext_bits) - 1;</div><div class='add'>+</div><div class='add'>+	reg = reg_readl(priv, REG_CROSSBAR);</div><div class='add'>+	switch (priv-&gt;type) {</div><div class='add'>+	case BCM4908_DEVICE_ID:</div><div class='add'>+		shift = CROSSBAR_BCM4908_INT_P7 * priv-&gt;num_crossbar_ext_bits;</div><div class='add'>+		reg &amp;= ~(mask &lt;&lt; shift);</div><div class='add'>+		if (0) /* FIXME */</div><div class='add'>+			reg |= CROSSBAR_BCM4908_EXT_SERDES &lt;&lt; shift;</div><div class='add'>+		else if (priv-&gt;int_phy_mask &amp; BIT(7))</div><div class='add'>+			reg |= CROSSBAR_BCM4908_EXT_GPHY4 &lt;&lt; shift;</div><div class='add'>+		else if (phy_interface_mode_is_rgmii(priv-&gt;port_sts[7].mode))</div><div class='add'>+			reg |= CROSSBAR_BCM4908_EXT_RGMII &lt;&lt; shift;</div><div class='add'>+		else if (WARN(1, "Invalid port mode\n"))</div><div class='add'>+			return;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	reg_writel(priv, reg, REG_CROSSBAR);</div><div class='add'>+</div><div class='add'>+	reg = reg_readl(priv, REG_CROSSBAR);</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;num_crossbar_int_ports; i++) {</div><div class='add'>+		shift = i * priv-&gt;num_crossbar_ext_bits;</div><div class='add'>+</div><div class='add'>+		dev_dbg(dev, "crossbar int port #%d - ext port #%d\n", i,</div><div class='add'>+			(reg &gt;&gt; shift) &amp; mask);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void bcm_sf2_intr_disable(struct bcm_sf2_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_MASK_SET);</div><div class='add'>+	intrl2_0_mask_set(priv, 0xffffffff);</div><div class='ctx'> 	intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);</div><div class='del'>-	intrl2_0_writel(priv, 0, INTRL2_CPU_MASK_CLEAR);</div><div class='del'>-	intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_MASK_SET);</div><div class='add'>+	intrl2_1_mask_set(priv, 0xffffffff);</div><div class='ctx'> 	intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);</div><div class='del'>-	intrl2_1_writel(priv, 0, INTRL2_CPU_MASK_CLEAR);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int bcm_sf2_sw_setup(struct dsa_switch *ds)</div><div class='add'>+static void bcm_sf2_identify_ports(struct bcm_sf2_priv *priv,</div><div class='add'>+				   struct device_node *dn)</div><div class='ctx'> {</div><div class='del'>-	const char *reg_names[BCM_SF2_REGS_NUM] = BCM_SF2_REGS_NAME;</div><div class='del'>-	struct bcm_sf2_priv *priv = ds_to_priv(ds);</div><div class='del'>-	struct device_node *dn;</div><div class='del'>-	void __iomem **base;</div><div class='del'>-	unsigned int port;</div><div class='del'>-	unsigned int i;</div><div class='del'>-	u32 reg, rev;</div><div class='del'>-	int ret;</div><div class='add'>+	struct device *dev = priv-&gt;dev-&gt;ds-&gt;dev;</div><div class='add'>+	struct bcm_sf2_port_status *port_st;</div><div class='add'>+	struct device_node *port;</div><div class='add'>+	unsigned int port_num;</div><div class='add'>+	struct property *prop;</div><div class='add'>+	int err;</div><div class='ctx'> </div><div class='del'>-	spin_lock_init(&amp;priv-&gt;indir_lock);</div><div class='del'>-	mutex_init(&amp;priv-&gt;stats_mutex);</div><div class='del'>-</div><div class='del'>-	/* All the interesting properties are at the parent device_node</div><div class='del'>-	 * level</div><div class='del'>-	 */</div><div class='del'>-	dn = ds-&gt;pd-&gt;of_node-&gt;parent;</div><div class='add'>+	priv-&gt;moca_port = -1;</div><div class='ctx'> </div><div class='del'>-	priv-&gt;irq0 = irq_of_parse_and_map(dn, 0);</div><div class='del'>-	priv-&gt;irq1 = irq_of_parse_and_map(dn, 1);</div><div class='add'>+	for_each_available_child_of_node(dn, port) {</div><div class='add'>+		if (of_property_read_u32(port, "reg", &amp;port_num))</div><div class='add'>+			continue;</div><div class='ctx'> </div><div class='del'>-	base = &amp;priv-&gt;core;</div><div class='del'>-	for (i = 0; i &lt; BCM_SF2_REGS_NUM; i++) {</div><div class='del'>-		*base = of_iomap(dn, i);</div><div class='del'>-		if (*base == NULL) {</div><div class='del'>-			pr_err("unable to find register: %s\n", reg_names[i]);</div><div class='del'>-			ret = -ENOMEM;</div><div class='del'>-			goto out_unmap;</div><div class='add'>+		if (port_num &gt;= DSA_MAX_PORTS) {</div><div class='add'>+			dev_err(dev, "Invalid port number %d\n", port_num);</div><div class='add'>+			continue;</div><div class='ctx'> 		}</div><div class='del'>-		base++;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	ret = bcm_sf2_sw_rst(priv);</div><div class='del'>-	if (ret) {</div><div class='del'>-		pr_err("unable to software reset switch: %d\n", ret);</div><div class='del'>-		goto out_unmap;</div><div class='del'>-	}</div><div class='add'>+		port_st = &amp;priv-&gt;port_sts[port_num];</div><div class='ctx'> </div><div class='del'>-	/* Disable all interrupts and request them */</div><div class='del'>-	bcm_sf2_intr_disable(priv);</div><div class='add'>+		/* Internal PHYs get assigned a specific 'phy-mode' property</div><div class='add'>+		 * value: "internal" to help flag them before MDIO probing</div><div class='add'>+		 * has completed, since they might be turned off at that</div><div class='add'>+		 * time</div><div class='add'>+		 */</div><div class='add'>+		err = of_get_phy_mode(port, &amp;port_st-&gt;mode);</div><div class='add'>+		if (err)</div><div class='add'>+			continue;</div><div class='ctx'> </div><div class='del'>-	ret = request_irq(priv-&gt;irq0, bcm_sf2_switch_0_isr, 0,</div><div class='del'>-			  "switch_0", priv);</div><div class='del'>-	if (ret &lt; 0) {</div><div class='del'>-		pr_err("failed to request switch_0 IRQ\n");</div><div class='del'>-		goto out_unmap;</div><div class='del'>-	}</div><div class='add'>+		if (port_st-&gt;mode == PHY_INTERFACE_MODE_INTERNAL)</div><div class='add'>+			priv-&gt;int_phy_mask |= 1 &lt;&lt; port_num;</div><div class='ctx'> </div><div class='del'>-	ret = request_irq(priv-&gt;irq1, bcm_sf2_switch_1_isr, 0,</div><div class='del'>-			  "switch_1", priv);</div><div class='del'>-	if (ret &lt; 0) {</div><div class='del'>-		pr_err("failed to request switch_1 IRQ\n");</div><div class='del'>-		goto out_free_irq0;</div><div class='del'>-	}</div><div class='add'>+		if (port_st-&gt;mode == PHY_INTERFACE_MODE_MOCA)</div><div class='add'>+			priv-&gt;moca_port = port_num;</div><div class='ctx'> </div><div class='del'>-	/* Reset the MIB counters */</div><div class='del'>-	reg = core_readl(priv, CORE_GMNCFGCFG);</div><div class='del'>-	reg |= RST_MIB_CNT;</div><div class='del'>-	core_writel(priv, reg, CORE_GMNCFGCFG);</div><div class='del'>-	reg &amp;= ~RST_MIB_CNT;</div><div class='del'>-	core_writel(priv, reg, CORE_GMNCFGCFG);</div><div class='add'>+		if (of_property_read_bool(port, "brcm,use-bcm-hdr"))</div><div class='add'>+			priv-&gt;brcm_tag_mask |= 1 &lt;&lt; port_num;</div><div class='ctx'> </div><div class='del'>-	/* Get the maximum number of ports for this switch */</div><div class='del'>-	priv-&gt;hw_params.num_ports = core_readl(priv, CORE_IMP0_PRT_ID) + 1;</div><div class='del'>-	if (priv-&gt;hw_params.num_ports &gt; DSA_MAX_PORTS)</div><div class='del'>-		priv-&gt;hw_params.num_ports = DSA_MAX_PORTS;</div><div class='add'>+		/* Ensure that port 5 is not picked up as a DSA CPU port</div><div class='add'>+		 * flavour but a regular port instead. We should be using</div><div class='add'>+		 * devlink to be able to set the port flavour.</div><div class='add'>+		 */</div><div class='add'>+		if (port_num == 5 &amp;&amp; priv-&gt;type == BCM7278_DEVICE_ID) {</div><div class='add'>+			prop = of_find_property(port, "ethernet", NULL);</div><div class='add'>+			if (prop)</div><div class='add'>+				of_remove_property(port, prop);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	/* Assume a single GPHY setup if we can't read that property */</div><div class='del'>-	if (of_property_read_u32(dn, "brcm,num-gphy",</div><div class='del'>-				 &amp;priv-&gt;hw_params.num_gphy))</div><div class='del'>-		priv-&gt;hw_params.num_gphy = 1;</div><div class='add'>+static int bcm_sf2_mdio_register(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);</div><div class='add'>+	struct device_node *dn, *child;</div><div class='add'>+	struct phy_device *phydev;</div><div class='add'>+	struct property *prop;</div><div class='add'>+	static int index;</div><div class='add'>+	int err, reg;</div><div class='add'>+</div><div class='add'>+	/* Find our integrated MDIO bus node */</div><div class='add'>+	dn = of_find_compatible_node(NULL, NULL, "brcm,unimac-mdio");</div><div class='add'>+	priv-&gt;master_mii_bus = of_mdio_find_bus(dn);</div><div class='add'>+	if (!priv-&gt;master_mii_bus) {</div><div class='add'>+		err = -EPROBE_DEFER;</div><div class='add'>+		goto err_of_node_put;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	/* Enable all valid ports and disable those unused */</div><div class='del'>-	for (port = 0; port &lt; priv-&gt;hw_params.num_ports; port++) {</div><div class='del'>-		/* IMP port receives special treatment */</div><div class='del'>-		if ((1 &lt;&lt; port) &amp; ds-&gt;phys_port_mask)</div><div class='del'>-			bcm_sf2_port_setup(ds, port, NULL);</div><div class='del'>-		else if (dsa_is_cpu_port(ds, port))</div><div class='del'>-			bcm_sf2_imp_setup(ds, port);</div><div class='del'>-		else</div><div class='del'>-			bcm_sf2_port_disable(ds, port, NULL);</div><div class='add'>+	priv-&gt;user_mii_bus = mdiobus_alloc();</div><div class='add'>+	if (!priv-&gt;user_mii_bus) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto err_put_master_mii_bus_dev;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Include the pseudo-PHY address and the broadcast PHY address to</div><div class='del'>-	 * divert reads towards our workaround. This is only required for</div><div class='del'>-	 * 7445D0, since 7445E0 disconnects the internal switch pseudo-PHY such</div><div class='del'>-	 * that we can use the regular SWITCH_MDIO master controller instead.</div><div class='add'>+	priv-&gt;user_mii_bus-&gt;priv = priv;</div><div class='add'>+	priv-&gt;user_mii_bus-&gt;name = "sf2 user mii";</div><div class='add'>+	priv-&gt;user_mii_bus-&gt;read = bcm_sf2_sw_mdio_read;</div><div class='add'>+	priv-&gt;user_mii_bus-&gt;write = bcm_sf2_sw_mdio_write;</div><div class='add'>+	snprintf(priv-&gt;user_mii_bus-&gt;id, MII_BUS_ID_SIZE, "sf2-%d",</div><div class='add'>+		 index++);</div><div class='add'>+</div><div class='add'>+	/* Include the pseudo-PHY address to divert reads towards our</div><div class='add'>+	 * workaround. This is only required for 7445D0, since 7445E0</div><div class='add'>+	 * disconnects the internal switch pseudo-PHY such that we can use the</div><div class='add'>+	 * regular SWITCH_MDIO master controller instead.</div><div class='ctx'> 	 *</div><div class='del'>-	 * By default, DSA initializes ds-&gt;phys_mii_mask to ds-&gt;phys_port_mask</div><div class='del'>-	 * to have a 1:1 mapping between Port address and PHY address in order</div><div class='del'>-	 * to utilize the slave_mii_bus instance to read from Port PHYs. This is</div><div class='del'>-	 * not what we want here, so we initialize phys_mii_mask 0 to always</div><div class='del'>-	 * utilize the "master" MDIO bus backed by the "mdio-unimac" driver.</div><div class='add'>+	 * Here we flag the pseudo PHY as needing special treatment and would</div><div class='add'>+	 * otherwise make all other PHY read/writes go to the master MDIO bus</div><div class='add'>+	 * controller that comes with this switch backed by the "mdio-unimac"</div><div class='add'>+	 * driver.</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (of_machine_is_compatible("brcm,bcm7445d0"))</div><div class='del'>-		ds-&gt;phys_mii_mask |= ((1 &lt;&lt; BRCM_PSEUDO_PHY_ADDR) | (1 &lt;&lt; 0));</div><div class='add'>+		priv-&gt;indir_phy_mask |= (1 &lt;&lt; BRCM_PSEUDO_PHY_ADDR) | (1 &lt;&lt; 0);</div><div class='ctx'> 	else</div><div class='del'>-		ds-&gt;phys_mii_mask = 0;</div><div class='add'>+		priv-&gt;indir_phy_mask = 0;</div><div class='ctx'> </div><div class='del'>-	rev = reg_readl(priv, REG_SWITCH_REVISION);</div><div class='del'>-	priv-&gt;hw_params.top_rev = (rev &gt;&gt; SWITCH_TOP_REV_SHIFT) &amp;</div><div class='del'>-					SWITCH_TOP_REV_MASK;</div><div class='del'>-	priv-&gt;hw_params.core_rev = (rev &amp; SF2_REV_MASK);</div><div class='add'>+	ds-&gt;phys_mii_mask = priv-&gt;indir_phy_mask;</div><div class='add'>+	ds-&gt;user_mii_bus = priv-&gt;user_mii_bus;</div><div class='add'>+	priv-&gt;user_mii_bus-&gt;parent = ds-&gt;dev-&gt;parent;</div><div class='add'>+	priv-&gt;user_mii_bus-&gt;phy_mask = ~priv-&gt;indir_phy_mask;</div><div class='ctx'> </div><div class='del'>-	rev = reg_readl(priv, REG_PHY_REVISION);</div><div class='del'>-	priv-&gt;hw_params.gphy_rev = rev &amp; PHY_REVISION_MASK;</div><div class='add'>+	/* We need to make sure that of_phy_connect() will not work by</div><div class='add'>+	 * removing the 'phandle' and 'linux,phandle' properties and</div><div class='add'>+	 * unregister the existing PHY device that was already registered.</div><div class='add'>+	 */</div><div class='add'>+	for_each_available_child_of_node(dn, child) {</div><div class='add'>+		if (of_property_read_u32(child, "reg", &amp;reg) ||</div><div class='add'>+		    reg &gt;= PHY_MAX_ADDR)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (!(priv-&gt;indir_phy_mask &amp; BIT(reg)))</div><div class='add'>+			continue;</div><div class='ctx'> </div><div class='del'>-	pr_info("Starfighter 2 top: %x.%02x, core: %x.%02x base: 0x%p, IRQs: %d, %d\n",</div><div class='del'>-		priv-&gt;hw_params.top_rev &gt;&gt; 8, priv-&gt;hw_params.top_rev &amp; 0xff,</div><div class='del'>-		priv-&gt;hw_params.core_rev &gt;&gt; 8, priv-&gt;hw_params.core_rev &amp; 0xff,</div><div class='del'>-		priv-&gt;core, priv-&gt;irq0, priv-&gt;irq1);</div><div class='add'>+		prop = of_find_property(child, "phandle", NULL);</div><div class='add'>+		if (prop)</div><div class='add'>+			of_remove_property(child, prop);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+		prop = of_find_property(child, "linux,phandle", NULL);</div><div class='add'>+		if (prop)</div><div class='add'>+			of_remove_property(child, prop);</div><div class='ctx'> </div><div class='del'>-out_free_irq0:</div><div class='del'>-	free_irq(priv-&gt;irq0, priv);</div><div class='del'>-out_unmap:</div><div class='del'>-	base = &amp;priv-&gt;core;</div><div class='del'>-	for (i = 0; i &lt; BCM_SF2_REGS_NUM; i++) {</div><div class='del'>-		if (*base)</div><div class='del'>-			iounmap(*base);</div><div class='del'>-		base++;</div><div class='add'>+		phydev = of_phy_find_device(child);</div><div class='add'>+		if (phydev) {</div><div class='add'>+			phy_device_remove(phydev);</div><div class='add'>+			phy_device_free(phydev);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='del'>-	return ret;</div><div class='add'>+</div><div class='add'>+	err = mdiobus_register(priv-&gt;user_mii_bus);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free_user_mii_bus;</div><div class='add'>+</div><div class='add'>+	of_node_put(dn);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_user_mii_bus:</div><div class='add'>+	mdiobus_free(priv-&gt;user_mii_bus);</div><div class='add'>+err_put_master_mii_bus_dev:</div><div class='add'>+	put_device(&amp;priv-&gt;master_mii_bus-&gt;dev);</div><div class='add'>+err_of_node_put:</div><div class='add'>+	of_node_put(dn);</div><div class='add'>+	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int bcm_sf2_sw_set_addr(struct dsa_switch *ds, u8 *addr)</div><div class='add'>+static void bcm_sf2_mdio_unregister(struct bcm_sf2_priv *priv)</div><div class='ctx'> {</div><div class='del'>-	return 0;</div><div class='add'>+	mdiobus_unregister(priv-&gt;user_mii_bus);</div><div class='add'>+	mdiobus_free(priv-&gt;user_mii_bus);</div><div class='add'>+	put_device(&amp;priv-&gt;master_mii_bus-&gt;dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u32 bcm_sf2_sw_get_phy_flags(struct dsa_switch *ds, int port)</div><div class='ctx'> {</div><div class='del'>-	struct bcm_sf2_priv *priv = ds_to_priv(ds);</div><div class='add'>+	struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);</div><div class='ctx'> </div><div class='ctx'> 	/* The BCM7xxx PHY driver expects to find the integrated PHY revision</div><div class='ctx'> 	 * in bits 15:8 and the patch level in bits 7:0 which is exactly what</div><div class='ctx'> 	 * the REG_PHY_REVISION register layout is.</div><div class='ctx'> 	 */</div><div class='del'>-</div><div class='del'>-	return priv-&gt;hw_params.gphy_rev;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int bcm_sf2_sw_indir_rw(struct dsa_switch *ds, int op, int addr,</div><div class='del'>-			       int regnum, u16 val)</div><div class='del'>-{</div><div class='del'>-	struct bcm_sf2_priv *priv = ds_to_priv(ds);</div><div class='del'>-	int ret = 0;</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	reg = reg_readl(priv, REG_SWITCH_CNTRL);</div><div class='del'>-	reg |= MDIO_MASTER_SEL;</div><div class='del'>-	reg_writel(priv, reg, REG_SWITCH_CNTRL);</div><div class='del'>-</div><div class='del'>-	/* Page &lt;&lt; 8 | offset */</div><div class='del'>-	reg = 0x70;</div><div class='del'>-	reg &lt;&lt;= 2;</div><div class='del'>-	core_writel(priv, addr, reg);</div><div class='del'>-</div><div class='del'>-	/* Page &lt;&lt; 8 | offset */</div><div class='del'>-	reg = 0x80 &lt;&lt; 8 | regnum &lt;&lt; 1;</div><div class='del'>-	reg &lt;&lt;= 2;</div><div class='del'>-</div><div class='del'>-	if (op)</div><div class='del'>-		ret = core_readl(priv, reg);</div><div class='add'>+	if (priv-&gt;int_phy_mask &amp; BIT(port))</div><div class='add'>+		return priv-&gt;hw_params.gphy_rev;</div><div class='ctx'> 	else</div><div class='del'>-		core_writel(priv, val, reg);</div><div class='del'>-</div><div class='del'>-	reg = reg_readl(priv, REG_SWITCH_CNTRL);</div><div class='del'>-	reg &amp;= ~MDIO_MASTER_SEL;</div><div class='del'>-	reg_writel(priv, reg, REG_SWITCH_CNTRL);</div><div class='del'>-</div><div class='del'>-	return ret &amp; 0xffff;</div><div class='add'>+		return PHY_BRCM_AUTO_PWRDWN_ENABLE |</div><div class='add'>+		       PHY_BRCM_DIS_TXCRXC_NOENRGY |</div><div class='add'>+		       PHY_BRCM_IDDQ_SUSPEND;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int bcm_sf2_sw_phy_read(struct dsa_switch *ds, int addr, int regnum)</div><div class='add'>+static void bcm_sf2_sw_get_caps(struct dsa_switch *ds, int port,</div><div class='add'>+				struct phylink_config *config)</div><div class='ctx'> {</div><div class='del'>-	/* Intercept reads from the MDIO broadcast address or Broadcom</div><div class='del'>-	 * pseudo-PHY address</div><div class='del'>-	 */</div><div class='del'>-	switch (addr) {</div><div class='del'>-	case 0:</div><div class='del'>-	case BRCM_PSEUDO_PHY_ADDR:</div><div class='del'>-		return bcm_sf2_sw_indir_rw(ds, 1, addr, regnum, 0);</div><div class='del'>-	default:</div><div class='del'>-		return 0xffff;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='add'>+	unsigned long *interfaces = config-&gt;supported_interfaces;</div><div class='add'>+	struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);</div><div class='ctx'> </div><div class='del'>-static int bcm_sf2_sw_phy_write(struct dsa_switch *ds, int addr, int regnum,</div><div class='del'>-				u16 val)</div><div class='del'>-{</div><div class='del'>-	/* Intercept writes to the MDIO broadcast address or Broadcom</div><div class='del'>-	 * pseudo-PHY address</div><div class='del'>-	 */</div><div class='del'>-	switch (addr) {</div><div class='del'>-	case 0:</div><div class='del'>-	case BRCM_PSEUDO_PHY_ADDR:</div><div class='del'>-		bcm_sf2_sw_indir_rw(ds, 0, addr, regnum, val);</div><div class='del'>-		break;</div><div class='add'>+	if (priv-&gt;int_phy_mask &amp; BIT(port)) {</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_INTERNAL, interfaces);</div><div class='add'>+	} else if (priv-&gt;moca_port == port) {</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_MOCA, interfaces);</div><div class='add'>+	} else {</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_MII, interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_REVMII, interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_GMII, interfaces);</div><div class='add'>+		phy_interface_set_rgmii(interfaces);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	config-&gt;mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |</div><div class='add'>+		MAC_10 | MAC_100 | MAC_1000;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void bcm_sf2_sw_adjust_link(struct dsa_switch *ds, int port,</div><div class='del'>-				   struct phy_device *phydev)</div><div class='add'>+static void bcm_sf2_sw_mac_config(struct phylink_config *config,</div><div class='add'>+				  unsigned int mode,</div><div class='add'>+				  const struct phylink_link_state *state)</div><div class='ctx'> {</div><div class='del'>-	struct bcm_sf2_priv *priv = ds_to_priv(ds);</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='ctx'> 	u32 id_mode_dis = 0, port_mode;</div><div class='del'>-	const char *str = NULL;</div><div class='add'>+	struct bcm_sf2_priv *priv;</div><div class='add'>+	u32 reg_rgmii_ctrl;</div><div class='ctx'> 	u32 reg;</div><div class='ctx'> </div><div class='del'>-	switch (phydev-&gt;interface) {</div><div class='add'>+	priv = bcm_sf2_to_priv(dp-&gt;ds);</div><div class='add'>+</div><div class='add'>+	if (dp-&gt;index == core_readl(priv, CORE_IMP0_PRT_ID))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	switch (state-&gt;interface) {</div><div class='ctx'> 	case PHY_INTERFACE_MODE_RGMII:</div><div class='del'>-		str = "RGMII (no delay)";</div><div class='ctx'> 		id_mode_dis = 1;</div><div class='add'>+		fallthrough;</div><div class='ctx'> 	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='del'>-		if (!str)</div><div class='del'>-			str = "RGMII (TX delay)";</div><div class='ctx'> 		port_mode = EXT_GPHY;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PHY_INTERFACE_MODE_MII:</div><div class='del'>-		str = "MII";</div><div class='ctx'> 		port_mode = EXT_EPHY;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PHY_INTERFACE_MODE_REVMII:</div><div class='del'>-		str = "Reverse MII";</div><div class='ctx'> 		port_mode = EXT_REVMII;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='del'>-		/* All other PHYs: internal and MoCA */</div><div class='del'>-		goto force_link;</div><div class='add'>+		/* Nothing required for all other PHYs: internal and MoCA */</div><div class='add'>+		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* If the link is down, just disable the interface to conserve power */</div><div class='del'>-	if (!phydev-&gt;link) {</div><div class='del'>-		reg = reg_readl(priv, REG_RGMII_CNTRL_P(port));</div><div class='del'>-		reg &amp;= ~RGMII_MODE_EN;</div><div class='del'>-		reg_writel(priv, reg, REG_RGMII_CNTRL_P(port));</div><div class='del'>-		goto force_link;</div><div class='del'>-	}</div><div class='add'>+	reg_rgmii_ctrl = bcm_sf2_reg_rgmii_cntrl(priv, dp-&gt;index);</div><div class='ctx'> </div><div class='del'>-	/* Clear id_mode_dis bit, and the existing port mode, but</div><div class='del'>-	 * make sure we enable the RGMII block for data to pass</div><div class='add'>+	/* Clear id_mode_dis bit, and the existing port mode, let</div><div class='add'>+	 * RGMII_MODE_EN bet set by mac_link_{up,down}</div><div class='ctx'> 	 */</div><div class='del'>-	reg = reg_readl(priv, REG_RGMII_CNTRL_P(port));</div><div class='add'>+	reg = reg_readl(priv, reg_rgmii_ctrl);</div><div class='ctx'> 	reg &amp;= ~ID_MODE_DIS;</div><div class='ctx'> 	reg &amp;= ~(PORT_MODE_MASK &lt;&lt; PORT_MODE_SHIFT);</div><div class='del'>-	reg &amp;= ~(RX_PAUSE_EN | TX_PAUSE_EN);</div><div class='ctx'> </div><div class='del'>-	reg |= port_mode | RGMII_MODE_EN;</div><div class='add'>+	reg |= port_mode;</div><div class='ctx'> 	if (id_mode_dis)</div><div class='ctx'> 		reg |= ID_MODE_DIS;</div><div class='ctx'> </div><div class='del'>-	if (phydev-&gt;pause) {</div><div class='del'>-		if (phydev-&gt;asym_pause)</div><div class='add'>+	reg_writel(priv, reg, reg_rgmii_ctrl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bcm_sf2_sw_mac_link_set(struct dsa_switch *ds, int port,</div><div class='add'>+				    phy_interface_t interface, bool link)</div><div class='add'>+{</div><div class='add'>+	struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);</div><div class='add'>+	u32 reg_rgmii_ctrl;</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	if (!phy_interface_mode_is_rgmii(interface) &amp;&amp;</div><div class='add'>+	    interface != PHY_INTERFACE_MODE_MII &amp;&amp;</div><div class='add'>+	    interface != PHY_INTERFACE_MODE_REVMII)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	reg_rgmii_ctrl = bcm_sf2_reg_rgmii_cntrl(priv, port);</div><div class='add'>+</div><div class='add'>+	/* If the link is down, just disable the interface to conserve power */</div><div class='add'>+	reg = reg_readl(priv, reg_rgmii_ctrl);</div><div class='add'>+	if (link)</div><div class='add'>+		reg |= RGMII_MODE_EN;</div><div class='add'>+	else</div><div class='add'>+		reg &amp;= ~RGMII_MODE_EN;</div><div class='add'>+	reg_writel(priv, reg, reg_rgmii_ctrl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bcm_sf2_sw_mac_link_down(struct phylink_config *config,</div><div class='add'>+				     unsigned int mode,</div><div class='add'>+				     phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct bcm_sf2_priv *priv;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+	u32 reg, offset;</div><div class='add'>+</div><div class='add'>+	priv = bcm_sf2_to_priv(dp-&gt;ds);</div><div class='add'>+	if (priv-&gt;wol_ports_mask &amp; BIT(port))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	offset = bcm_sf2_port_override_offset(priv, port);</div><div class='add'>+	reg = core_readl(priv, offset);</div><div class='add'>+	reg &amp;= ~LINK_STS;</div><div class='add'>+	core_writel(priv, reg, offset);</div><div class='add'>+</div><div class='add'>+	bcm_sf2_sw_mac_link_set(dp-&gt;ds, port, interface, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bcm_sf2_sw_mac_link_up(struct phylink_config *config,</div><div class='add'>+				   struct phy_device *phydev,</div><div class='add'>+				   unsigned int mode,</div><div class='add'>+				   phy_interface_t interface,</div><div class='add'>+				   int speed, int duplex,</div><div class='add'>+				   bool tx_pause, bool rx_pause)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct bcm_sf2_priv *priv;</div><div class='add'>+	u32 reg_rgmii_ctrl = 0;</div><div class='add'>+	struct ethtool_keee *p;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+	u32 reg, offset;</div><div class='add'>+</div><div class='add'>+	bcm_sf2_sw_mac_link_set(dp-&gt;ds, port, interface, true);</div><div class='add'>+</div><div class='add'>+	priv = bcm_sf2_to_priv(dp-&gt;ds);</div><div class='add'>+	offset = bcm_sf2_port_override_offset(priv, port);</div><div class='add'>+</div><div class='add'>+	if (phy_interface_mode_is_rgmii(interface) ||</div><div class='add'>+	    interface == PHY_INTERFACE_MODE_MII ||</div><div class='add'>+	    interface == PHY_INTERFACE_MODE_REVMII) {</div><div class='add'>+		reg_rgmii_ctrl = bcm_sf2_reg_rgmii_cntrl(priv, port);</div><div class='add'>+		reg = reg_readl(priv, reg_rgmii_ctrl);</div><div class='add'>+		reg &amp;= ~(RX_PAUSE_EN | TX_PAUSE_EN);</div><div class='add'>+</div><div class='add'>+		if (tx_pause)</div><div class='ctx'> 			reg |= TX_PAUSE_EN;</div><div class='del'>-		reg |= RX_PAUSE_EN;</div><div class='del'>-	}</div><div class='add'>+		if (rx_pause)</div><div class='add'>+			reg |= RX_PAUSE_EN;</div><div class='ctx'> </div><div class='del'>-	reg_writel(priv, reg, REG_RGMII_CNTRL_P(port));</div><div class='add'>+		reg_writel(priv, reg, reg_rgmii_ctrl);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	pr_info("Port %d configured for %s\n", port, str);</div><div class='add'>+	reg = LINK_STS;</div><div class='add'>+	if (port == 8) {</div><div class='add'>+		if (priv-&gt;type == BCM4908_DEVICE_ID)</div><div class='add'>+			reg |= GMII_SPEED_UP_2G;</div><div class='add'>+		reg |= MII_SW_OR;</div><div class='add'>+	} else {</div><div class='add'>+		reg |= SW_OVERRIDE;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-force_link:</div><div class='del'>-	/* Force link settings detected from the PHY */</div><div class='del'>-	reg = SW_OVERRIDE;</div><div class='del'>-	switch (phydev-&gt;speed) {</div><div class='add'>+	switch (speed) {</div><div class='ctx'> 	case SPEED_1000:</div><div class='ctx'> 		reg |= SPDSTS_1000 &lt;&lt; SPEED_SHIFT;</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -889,31 +887,30 @@ force_link:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (phydev-&gt;link)</div><div class='del'>-		reg |= LINK_STS;</div><div class='del'>-	if (phydev-&gt;duplex == DUPLEX_FULL)</div><div class='add'>+	if (duplex == DUPLEX_FULL)</div><div class='ctx'> 		reg |= DUPLX_MODE;</div><div class='ctx'> </div><div class='del'>-	core_writel(priv, reg, CORE_STS_OVERRIDE_GMIIP_PORT(port));</div><div class='del'>-}</div><div class='add'>+	if (tx_pause)</div><div class='add'>+		reg |= TXFLOW_CNTL;</div><div class='add'>+	if (rx_pause)</div><div class='add'>+		reg |= RXFLOW_CNTL;</div><div class='ctx'> </div><div class='del'>-static void bcm_sf2_sw_fixed_link_update(struct dsa_switch *ds, int port,</div><div class='del'>-					 struct fixed_phy_status *status)</div><div class='del'>-{</div><div class='del'>-	struct bcm_sf2_priv *priv = ds_to_priv(ds);</div><div class='del'>-	u32 duplex, pause, speed;</div><div class='del'>-	u32 reg;</div><div class='add'>+	core_writel(priv, reg, offset);</div><div class='ctx'> </div><div class='del'>-	duplex = core_readl(priv, CORE_DUPSTS);</div><div class='del'>-	pause = core_readl(priv, CORE_PAUSESTS);</div><div class='del'>-	speed = core_readl(priv, CORE_SPDSTS);</div><div class='add'>+	if (mode == MLO_AN_PHY &amp;&amp; phydev) {</div><div class='add'>+		p = &amp;priv-&gt;dev-&gt;ports[port].eee;</div><div class='add'>+		p-&gt;eee_enabled = b53_eee_init(dp-&gt;ds, port, phydev);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	speed &gt;&gt;= (port * SPDSTS_SHIFT);</div><div class='del'>-	speed &amp;= SPDSTS_MASK;</div><div class='add'>+static void bcm_sf2_sw_fixed_state(struct dsa_switch *ds, int port,</div><div class='add'>+				   struct phylink_link_state *status)</div><div class='add'>+{</div><div class='add'>+	struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);</div><div class='ctx'> </div><div class='del'>-	status-&gt;link = 0;</div><div class='add'>+	status-&gt;link = false;</div><div class='ctx'> </div><div class='del'>-	/* Port 7 is special as we do not get link status from CORE_LNKSTS,</div><div class='add'>+	/* MoCA port is special as we do not get link status from CORE_LNKSTS,</div><div class='ctx'> 	 * which means that we need to force the link at the port override</div><div class='ctx'> 	 * level to get the data to flow. We do use what the interrupt handler</div><div class='ctx'> 	 * did determine before.</div><div class='hunk'>@@ -921,7 +918,7 @@ static void bcm_sf2_sw_fixed_link_update(struct dsa_switch *ds, int port,</div><div class='ctx'> 	 * For the other ports, we just force the link status, since this is</div><div class='ctx'> 	 * a fixed PHY device.</div><div class='ctx'> 	 */</div><div class='del'>-	if (port == 7) {</div><div class='add'>+	if (port == priv-&gt;moca_port) {</div><div class='ctx'> 		status-&gt;link = priv-&gt;port_sts[port].link;</div><div class='ctx'> 		/* For MoCA interfaces, also force a link down notification</div><div class='ctx'> 		 * since some version of the user-space daemon (mocad) use</div><div class='hunk'>@@ -929,46 +926,30 @@ static void bcm_sf2_sw_fixed_link_update(struct dsa_switch *ds, int port,</div><div class='ctx'> 		 * state machine and make it go in PHY_FORCING state instead.</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (!status-&gt;link)</div><div class='del'>-			netif_carrier_off(ds-&gt;ports[port]);</div><div class='del'>-		status-&gt;duplex = 1;</div><div class='add'>+			netif_carrier_off(dsa_to_port(ds, port)-&gt;user);</div><div class='add'>+		status-&gt;duplex = DUPLEX_FULL;</div><div class='ctx'> 	} else {</div><div class='del'>-		status-&gt;link = 1;</div><div class='del'>-		status-&gt;duplex = !!(duplex &amp; (1 &lt;&lt; port));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	reg = core_readl(priv, CORE_STS_OVERRIDE_GMIIP_PORT(port));</div><div class='del'>-	reg |= SW_OVERRIDE;</div><div class='del'>-	if (status-&gt;link)</div><div class='del'>-		reg |= LINK_STS;</div><div class='del'>-	else</div><div class='del'>-		reg &amp;= ~LINK_STS;</div><div class='del'>-	core_writel(priv, reg, CORE_STS_OVERRIDE_GMIIP_PORT(port));</div><div class='del'>-</div><div class='del'>-	switch (speed) {</div><div class='del'>-	case SPDSTS_10:</div><div class='del'>-		status-&gt;speed = SPEED_10;</div><div class='del'>-		break;</div><div class='del'>-	case SPDSTS_100:</div><div class='del'>-		status-&gt;speed = SPEED_100;</div><div class='del'>-		break;</div><div class='del'>-	case SPDSTS_1000:</div><div class='del'>-		status-&gt;speed = SPEED_1000;</div><div class='del'>-		break;</div><div class='add'>+		status-&gt;link = true;</div><div class='ctx'> 	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	if ((pause &amp; (1 &lt;&lt; port)) &amp;&amp;</div><div class='del'>-	    (pause &amp; (1 &lt;&lt; (port + PAUSESTS_TX_PAUSE_SHIFT)))) {</div><div class='del'>-		status-&gt;asym_pause = 1;</div><div class='del'>-		status-&gt;pause = 1;</div><div class='del'>-	}</div><div class='add'>+static void bcm_sf2_enable_acb(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);</div><div class='add'>+	u32 reg;</div><div class='ctx'> </div><div class='del'>-	if (pause &amp; (1 &lt;&lt; port))</div><div class='del'>-		status-&gt;pause = 1;</div><div class='add'>+	/* Enable ACB globally */</div><div class='add'>+	reg = acb_readl(priv, ACB_CONTROL);</div><div class='add'>+	reg |= (ACB_FLUSH_MASK &lt;&lt; ACB_FLUSH_SHIFT);</div><div class='add'>+	acb_writel(priv, reg, ACB_CONTROL);</div><div class='add'>+	reg &amp;= ~(ACB_FLUSH_MASK &lt;&lt; ACB_FLUSH_SHIFT);</div><div class='add'>+	reg |= ACB_EN | ACB_ALGORITHM;</div><div class='add'>+	acb_writel(priv, reg, ACB_CONTROL);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int bcm_sf2_sw_suspend(struct dsa_switch *ds)</div><div class='ctx'> {</div><div class='del'>-	struct bcm_sf2_priv *priv = ds_to_priv(ds);</div><div class='add'>+	struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);</div><div class='ctx'> 	unsigned int port;</div><div class='ctx'> </div><div class='ctx'> 	bcm_sf2_intr_disable(priv);</div><div class='hunk'>@@ -977,36 +958,41 @@ static int bcm_sf2_sw_suspend(struct dsa_switch *ds)</div><div class='ctx'> 	 * port, the other ones have already been disabled during</div><div class='ctx'> 	 * bcm_sf2_sw_setup</div><div class='ctx'> 	 */</div><div class='del'>-	for (port = 0; port &lt; DSA_MAX_PORTS; port++) {</div><div class='del'>-		if ((1 &lt;&lt; port) &amp; ds-&gt;phys_port_mask ||</div><div class='del'>-		    dsa_is_cpu_port(ds, port))</div><div class='del'>-			bcm_sf2_port_disable(ds, port, NULL);</div><div class='add'>+	for (port = 0; port &lt; ds-&gt;num_ports; port++) {</div><div class='add'>+		if (dsa_is_user_port(ds, port) || dsa_is_cpu_port(ds, port))</div><div class='add'>+			bcm_sf2_port_disable(ds, port);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (!priv-&gt;wol_ports_mask)</div><div class='add'>+		clk_disable_unprepare(priv-&gt;clk);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int bcm_sf2_sw_resume(struct dsa_switch *ds)</div><div class='ctx'> {</div><div class='del'>-	struct bcm_sf2_priv *priv = ds_to_priv(ds);</div><div class='del'>-	unsigned int port;</div><div class='add'>+	struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	if (!priv-&gt;wol_ports_mask)</div><div class='add'>+		clk_prepare_enable(priv-&gt;clk);</div><div class='add'>+</div><div class='ctx'> 	ret = bcm_sf2_sw_rst(priv);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		pr_err("%s: failed to software reset switch\n", __func__);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	bcm_sf2_crossbar_setup(priv);</div><div class='add'>+</div><div class='add'>+	ret = bcm_sf2_cfp_resume(ds);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='ctx'> 	if (priv-&gt;hw_params.num_gphy == 1)</div><div class='ctx'> 		bcm_sf2_gphy_enable_set(ds, true);</div><div class='ctx'> </div><div class='del'>-	for (port = 0; port &lt; DSA_MAX_PORTS; port++) {</div><div class='del'>-		if ((1 &lt;&lt; port) &amp; ds-&gt;phys_port_mask)</div><div class='del'>-			bcm_sf2_port_setup(ds, port, NULL);</div><div class='del'>-		else if (dsa_is_cpu_port(ds, port))</div><div class='del'>-			bcm_sf2_imp_setup(ds, port);</div><div class='del'>-	}</div><div class='add'>+	ds-&gt;ops-&gt;setup(ds);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1014,12 +1000,13 @@ static int bcm_sf2_sw_resume(struct dsa_switch *ds)</div><div class='ctx'> static void bcm_sf2_sw_get_wol(struct dsa_switch *ds, int port,</div><div class='ctx'> 			       struct ethtool_wolinfo *wol)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *p = ds-&gt;dst[ds-&gt;index].master_netdev;</div><div class='del'>-	struct bcm_sf2_priv *priv = ds_to_priv(ds);</div><div class='del'>-	struct ethtool_wolinfo pwol;</div><div class='add'>+	struct net_device *p = dsa_port_to_conduit(dsa_to_port(ds, port));</div><div class='add'>+	struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);</div><div class='add'>+	struct ethtool_wolinfo pwol = { };</div><div class='ctx'> </div><div class='ctx'> 	/* Get the parent device WoL settings */</div><div class='del'>-	p-&gt;ethtool_ops-&gt;get_wol(p, &amp;pwol);</div><div class='add'>+	if (p-&gt;ethtool_ops-&gt;get_wol)</div><div class='add'>+		p-&gt;ethtool_ops-&gt;get_wol(p, &amp;pwol);</div><div class='ctx'> </div><div class='ctx'> 	/* Advertise the parent device supported settings */</div><div class='ctx'> 	wol-&gt;supported = pwol.supported;</div><div class='hunk'>@@ -1037,12 +1024,13 @@ static void bcm_sf2_sw_get_wol(struct dsa_switch *ds, int port,</div><div class='ctx'> static int bcm_sf2_sw_set_wol(struct dsa_switch *ds, int port,</div><div class='ctx'> 			      struct ethtool_wolinfo *wol)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *p = ds-&gt;dst[ds-&gt;index].master_netdev;</div><div class='del'>-	struct bcm_sf2_priv *priv = ds_to_priv(ds);</div><div class='del'>-	s8 cpu_port = ds-&gt;dst[ds-&gt;index].cpu_port;</div><div class='del'>-	struct ethtool_wolinfo pwol;</div><div class='add'>+	struct net_device *p = dsa_port_to_conduit(dsa_to_port(ds, port));</div><div class='add'>+	struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);</div><div class='add'>+	s8 cpu_port = dsa_to_port(ds, port)-&gt;cpu_dp-&gt;index;</div><div class='add'>+	struct ethtool_wolinfo pwol =  { };</div><div class='ctx'> </div><div class='del'>-	p-&gt;ethtool_ops-&gt;get_wol(p, &amp;pwol);</div><div class='add'>+	if (p-&gt;ethtool_ops-&gt;get_wol)</div><div class='add'>+		p-&gt;ethtool_ops-&gt;get_wol(p, &amp;pwol);</div><div class='ctx'> 	if (wol-&gt;wolopts &amp; ~pwol.supported)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='hunk'>@@ -1063,46 +1051,589 @@ static int bcm_sf2_sw_set_wol(struct dsa_switch *ds, int port,</div><div class='ctx'> 	return p-&gt;ethtool_ops-&gt;set_wol(p, wol);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct dsa_switch_driver bcm_sf2_switch_driver = {</div><div class='del'>-	.tag_protocol		= DSA_TAG_PROTO_BRCM,</div><div class='del'>-	.priv_size		= sizeof(struct bcm_sf2_priv),</div><div class='del'>-	.probe			= bcm_sf2_sw_probe,</div><div class='add'>+static int bcm_sf2_sw_setup(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);</div><div class='add'>+	unsigned int port;</div><div class='add'>+</div><div class='add'>+	/* Enable all valid ports and disable those unused */</div><div class='add'>+	for (port = 0; port &lt; priv-&gt;hw_params.num_ports; port++) {</div><div class='add'>+		/* IMP port receives special treatment */</div><div class='add'>+		if (dsa_is_user_port(ds, port))</div><div class='add'>+			bcm_sf2_port_setup(ds, port, NULL);</div><div class='add'>+		else if (dsa_is_cpu_port(ds, port))</div><div class='add'>+			bcm_sf2_imp_setup(ds, port);</div><div class='add'>+		else</div><div class='add'>+			bcm_sf2_port_disable(ds, port);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	b53_configure_vlan(ds);</div><div class='add'>+	bcm_sf2_enable_acb(ds);</div><div class='add'>+</div><div class='add'>+	return b53_setup_devlink_resources(ds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bcm_sf2_sw_teardown(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	dsa_devlink_resources_unregister(ds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The SWITCH_CORE register space is managed by b53 but operates on a page +</div><div class='add'>+ * register basis so we need to translate that into an address that the</div><div class='add'>+ * bus-glue understands.</div><div class='add'>+ */</div><div class='add'>+#define SF2_PAGE_REG_MKADDR(page, reg)	((page) &lt;&lt; 10 | (reg) &lt;&lt; 2)</div><div class='add'>+</div><div class='add'>+static int bcm_sf2_core_read8(struct b53_device *dev, u8 page, u8 reg,</div><div class='add'>+			      u8 *val)</div><div class='add'>+{</div><div class='add'>+	struct bcm_sf2_priv *priv = dev-&gt;priv;</div><div class='add'>+</div><div class='add'>+	*val = core_readl(priv, SF2_PAGE_REG_MKADDR(page, reg));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bcm_sf2_core_read16(struct b53_device *dev, u8 page, u8 reg,</div><div class='add'>+			       u16 *val)</div><div class='add'>+{</div><div class='add'>+	struct bcm_sf2_priv *priv = dev-&gt;priv;</div><div class='add'>+</div><div class='add'>+	*val = core_readl(priv, SF2_PAGE_REG_MKADDR(page, reg));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bcm_sf2_core_read32(struct b53_device *dev, u8 page, u8 reg,</div><div class='add'>+			       u32 *val)</div><div class='add'>+{</div><div class='add'>+	struct bcm_sf2_priv *priv = dev-&gt;priv;</div><div class='add'>+</div><div class='add'>+	*val = core_readl(priv, SF2_PAGE_REG_MKADDR(page, reg));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bcm_sf2_core_read64(struct b53_device *dev, u8 page, u8 reg,</div><div class='add'>+			       u64 *val)</div><div class='add'>+{</div><div class='add'>+	struct bcm_sf2_priv *priv = dev-&gt;priv;</div><div class='add'>+</div><div class='add'>+	*val = core_readq(priv, SF2_PAGE_REG_MKADDR(page, reg));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bcm_sf2_core_write8(struct b53_device *dev, u8 page, u8 reg,</div><div class='add'>+			       u8 value)</div><div class='add'>+{</div><div class='add'>+	struct bcm_sf2_priv *priv = dev-&gt;priv;</div><div class='add'>+</div><div class='add'>+	core_writel(priv, value, SF2_PAGE_REG_MKADDR(page, reg));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bcm_sf2_core_write16(struct b53_device *dev, u8 page, u8 reg,</div><div class='add'>+				u16 value)</div><div class='add'>+{</div><div class='add'>+	struct bcm_sf2_priv *priv = dev-&gt;priv;</div><div class='add'>+</div><div class='add'>+	core_writel(priv, value, SF2_PAGE_REG_MKADDR(page, reg));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bcm_sf2_core_write32(struct b53_device *dev, u8 page, u8 reg,</div><div class='add'>+				u32 value)</div><div class='add'>+{</div><div class='add'>+	struct bcm_sf2_priv *priv = dev-&gt;priv;</div><div class='add'>+</div><div class='add'>+	core_writel(priv, value, SF2_PAGE_REG_MKADDR(page, reg));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bcm_sf2_core_write64(struct b53_device *dev, u8 page, u8 reg,</div><div class='add'>+				u64 value)</div><div class='add'>+{</div><div class='add'>+	struct bcm_sf2_priv *priv = dev-&gt;priv;</div><div class='add'>+</div><div class='add'>+	core_writeq(priv, value, SF2_PAGE_REG_MKADDR(page, reg));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct b53_io_ops bcm_sf2_io_ops = {</div><div class='add'>+	.read8	= bcm_sf2_core_read8,</div><div class='add'>+	.read16	= bcm_sf2_core_read16,</div><div class='add'>+	.read32	= bcm_sf2_core_read32,</div><div class='add'>+	.read48	= bcm_sf2_core_read64,</div><div class='add'>+	.read64	= bcm_sf2_core_read64,</div><div class='add'>+	.write8	= bcm_sf2_core_write8,</div><div class='add'>+	.write16 = bcm_sf2_core_write16,</div><div class='add'>+	.write32 = bcm_sf2_core_write32,</div><div class='add'>+	.write48 = bcm_sf2_core_write64,</div><div class='add'>+	.write64 = bcm_sf2_core_write64,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void bcm_sf2_sw_get_strings(struct dsa_switch *ds, int port,</div><div class='add'>+				   u32 stringset, uint8_t *data)</div><div class='add'>+{</div><div class='add'>+	int cnt = b53_get_sset_count(ds, port, stringset);</div><div class='add'>+</div><div class='add'>+	b53_get_strings(ds, port, stringset, data);</div><div class='add'>+	data += cnt * ETH_GSTRING_LEN;</div><div class='add'>+	bcm_sf2_cfp_get_strings(ds, port, stringset, &amp;data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bcm_sf2_sw_get_ethtool_stats(struct dsa_switch *ds, int port,</div><div class='add'>+					 uint64_t *data)</div><div class='add'>+{</div><div class='add'>+	int cnt = b53_get_sset_count(ds, port, ETH_SS_STATS);</div><div class='add'>+</div><div class='add'>+	b53_get_ethtool_stats(ds, port, data);</div><div class='add'>+	bcm_sf2_cfp_get_ethtool_stats(ds, port, data + cnt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bcm_sf2_sw_get_sset_count(struct dsa_switch *ds, int port,</div><div class='add'>+				     int sset)</div><div class='add'>+{</div><div class='add'>+	int cnt = b53_get_sset_count(ds, port, sset);</div><div class='add'>+</div><div class='add'>+	if (cnt &lt; 0)</div><div class='add'>+		return cnt;</div><div class='add'>+</div><div class='add'>+	cnt += bcm_sf2_cfp_get_sset_count(ds, port, sset);</div><div class='add'>+</div><div class='add'>+	return cnt;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct phylink_mac_ops bcm_sf2_phylink_mac_ops = {</div><div class='add'>+	.mac_config	= bcm_sf2_sw_mac_config,</div><div class='add'>+	.mac_link_down	= bcm_sf2_sw_mac_link_down,</div><div class='add'>+	.mac_link_up	= bcm_sf2_sw_mac_link_up,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct dsa_switch_ops bcm_sf2_ops = {</div><div class='add'>+	.get_tag_protocol	= b53_get_tag_protocol,</div><div class='ctx'> 	.setup			= bcm_sf2_sw_setup,</div><div class='del'>-	.set_addr		= bcm_sf2_sw_set_addr,</div><div class='del'>-	.get_phy_flags		= bcm_sf2_sw_get_phy_flags,</div><div class='del'>-	.phy_read		= bcm_sf2_sw_phy_read,</div><div class='del'>-	.phy_write		= bcm_sf2_sw_phy_write,</div><div class='add'>+	.teardown		= bcm_sf2_sw_teardown,</div><div class='ctx'> 	.get_strings		= bcm_sf2_sw_get_strings,</div><div class='ctx'> 	.get_ethtool_stats	= bcm_sf2_sw_get_ethtool_stats,</div><div class='ctx'> 	.get_sset_count		= bcm_sf2_sw_get_sset_count,</div><div class='del'>-	.adjust_link		= bcm_sf2_sw_adjust_link,</div><div class='del'>-	.fixed_link_update	= bcm_sf2_sw_fixed_link_update,</div><div class='add'>+	.get_ethtool_phy_stats	= b53_get_ethtool_phy_stats,</div><div class='add'>+	.get_phy_flags		= bcm_sf2_sw_get_phy_flags,</div><div class='add'>+	.phylink_get_caps	= bcm_sf2_sw_get_caps,</div><div class='add'>+	.phylink_fixed_state	= bcm_sf2_sw_fixed_state,</div><div class='ctx'> 	.suspend		= bcm_sf2_sw_suspend,</div><div class='ctx'> 	.resume			= bcm_sf2_sw_resume,</div><div class='ctx'> 	.get_wol		= bcm_sf2_sw_get_wol,</div><div class='ctx'> 	.set_wol		= bcm_sf2_sw_set_wol,</div><div class='add'>+	.port_setup		= b53_setup_port,</div><div class='ctx'> 	.port_enable		= bcm_sf2_port_setup,</div><div class='ctx'> 	.port_disable		= bcm_sf2_port_disable,</div><div class='del'>-	.get_eee		= bcm_sf2_sw_get_eee,</div><div class='del'>-	.set_eee		= bcm_sf2_sw_set_eee,</div><div class='del'>-	.port_join_bridge	= bcm_sf2_sw_br_join,</div><div class='del'>-	.port_leave_bridge	= bcm_sf2_sw_br_leave,</div><div class='del'>-	.port_stp_update	= bcm_sf2_sw_br_set_stp_state,</div><div class='add'>+	.support_eee		= b53_support_eee,</div><div class='add'>+	.set_mac_eee		= b53_set_mac_eee,</div><div class='add'>+	.set_ageing_time	= b53_set_ageing_time,</div><div class='add'>+	.port_bridge_join	= b53_br_join,</div><div class='add'>+	.port_bridge_leave	= b53_br_leave,</div><div class='add'>+	.port_pre_bridge_flags	= b53_br_flags_pre,</div><div class='add'>+	.port_bridge_flags	= b53_br_flags,</div><div class='add'>+	.port_stp_state_set	= b53_br_set_stp_state,</div><div class='add'>+	.port_fast_age		= b53_br_fast_age,</div><div class='add'>+	.port_vlan_filtering	= b53_vlan_filtering,</div><div class='add'>+	.port_vlan_add		= b53_vlan_add,</div><div class='add'>+	.port_vlan_del		= b53_vlan_del,</div><div class='add'>+	.port_fdb_dump		= b53_fdb_dump,</div><div class='add'>+	.port_fdb_add		= b53_fdb_add,</div><div class='add'>+	.port_fdb_del		= b53_fdb_del,</div><div class='add'>+	.get_rxnfc		= bcm_sf2_get_rxnfc,</div><div class='add'>+	.set_rxnfc		= bcm_sf2_set_rxnfc,</div><div class='add'>+	.port_mirror_add	= b53_mirror_add,</div><div class='add'>+	.port_mirror_del	= b53_mirror_del,</div><div class='add'>+	.port_mdb_add		= b53_mdb_add,</div><div class='add'>+	.port_mdb_del		= b53_mdb_del,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct bcm_sf2_of_data {</div><div class='add'>+	u32 type;</div><div class='add'>+	const u16 *reg_offsets;</div><div class='add'>+	unsigned int core_reg_align;</div><div class='add'>+	unsigned int num_cfp_rules;</div><div class='add'>+	unsigned int num_crossbar_int_ports;</div><div class='add'>+	unsigned int num_crossbar_ext_bits;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u16 bcm_sf2_4908_reg_offsets[] = {</div><div class='add'>+	[REG_SWITCH_CNTRL]	= 0x00,</div><div class='add'>+	[REG_SWITCH_STATUS]	= 0x04,</div><div class='add'>+	[REG_DIR_DATA_WRITE]	= 0x08,</div><div class='add'>+	[REG_DIR_DATA_READ]	= 0x0c,</div><div class='add'>+	[REG_SWITCH_REVISION]	= 0x10,</div><div class='add'>+	[REG_PHY_REVISION]	= 0x14,</div><div class='add'>+	[REG_SPHY_CNTRL]	= 0x24,</div><div class='add'>+	[REG_CROSSBAR]		= 0xc8,</div><div class='add'>+	[REG_RGMII_11_CNTRL]	= 0x014c,</div><div class='add'>+	[REG_LED_0_CNTRL]		= 0x40,</div><div class='add'>+	[REG_LED_1_CNTRL]		= 0x4c,</div><div class='add'>+	[REG_LED_2_CNTRL]		= 0x58,</div><div class='add'>+	[REG_LED_3_CNTRL]		= 0x64,</div><div class='add'>+	[REG_LED_4_CNTRL]		= 0x88,</div><div class='add'>+	[REG_LED_5_CNTRL]		= 0xa0,</div><div class='add'>+	[REG_LED_AGGREGATE_CTRL]	= 0xb8,</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct bcm_sf2_of_data bcm_sf2_4908_data = {</div><div class='add'>+	.type		= BCM4908_DEVICE_ID,</div><div class='add'>+	.core_reg_align	= 0,</div><div class='add'>+	.reg_offsets	= bcm_sf2_4908_reg_offsets,</div><div class='add'>+	.num_cfp_rules	= 256,</div><div class='add'>+	.num_crossbar_int_ports = 2,</div><div class='add'>+	.num_crossbar_ext_bits = 2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Register offsets for the SWITCH_REG_* block */</div><div class='add'>+static const u16 bcm_sf2_7445_reg_offsets[] = {</div><div class='add'>+	[REG_SWITCH_CNTRL]	= 0x00,</div><div class='add'>+	[REG_SWITCH_STATUS]	= 0x04,</div><div class='add'>+	[REG_DIR_DATA_WRITE]	= 0x08,</div><div class='add'>+	[REG_DIR_DATA_READ]	= 0x0C,</div><div class='add'>+	[REG_SWITCH_REVISION]	= 0x18,</div><div class='add'>+	[REG_PHY_REVISION]	= 0x1C,</div><div class='add'>+	[REG_SPHY_CNTRL]	= 0x2C,</div><div class='add'>+	[REG_RGMII_0_CNTRL]	= 0x34,</div><div class='add'>+	[REG_RGMII_1_CNTRL]	= 0x40,</div><div class='add'>+	[REG_RGMII_2_CNTRL]	= 0x4c,</div><div class='add'>+	[REG_LED_0_CNTRL]	= 0x90,</div><div class='add'>+	[REG_LED_1_CNTRL]	= 0x94,</div><div class='add'>+	[REG_LED_2_CNTRL]	= 0x98,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct bcm_sf2_of_data bcm_sf2_7445_data = {</div><div class='add'>+	.type		= BCM7445_DEVICE_ID,</div><div class='add'>+	.core_reg_align	= 0,</div><div class='add'>+	.reg_offsets	= bcm_sf2_7445_reg_offsets,</div><div class='add'>+	.num_cfp_rules	= 256,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u16 bcm_sf2_7278_reg_offsets[] = {</div><div class='add'>+	[REG_SWITCH_CNTRL]	= 0x00,</div><div class='add'>+	[REG_SWITCH_STATUS]	= 0x04,</div><div class='add'>+	[REG_DIR_DATA_WRITE]	= 0x08,</div><div class='add'>+	[REG_DIR_DATA_READ]	= 0x0c,</div><div class='add'>+	[REG_SWITCH_REVISION]	= 0x10,</div><div class='add'>+	[REG_PHY_REVISION]	= 0x14,</div><div class='add'>+	[REG_SPHY_CNTRL]	= 0x24,</div><div class='add'>+	[REG_RGMII_0_CNTRL]	= 0xe0,</div><div class='add'>+	[REG_RGMII_1_CNTRL]	= 0xec,</div><div class='add'>+	[REG_RGMII_2_CNTRL]	= 0xf8,</div><div class='add'>+	[REG_LED_0_CNTRL]	= 0x40,</div><div class='add'>+	[REG_LED_1_CNTRL]	= 0x4c,</div><div class='add'>+	[REG_LED_2_CNTRL]	= 0x58,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init bcm_sf2_init(void)</div><div class='add'>+static const struct bcm_sf2_of_data bcm_sf2_7278_data = {</div><div class='add'>+	.type		= BCM7278_DEVICE_ID,</div><div class='add'>+	.core_reg_align	= 1,</div><div class='add'>+	.reg_offsets	= bcm_sf2_7278_reg_offsets,</div><div class='add'>+	.num_cfp_rules	= 128,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct of_device_id bcm_sf2_of_match[] = {</div><div class='add'>+	{ .compatible = "brcm,bcm4908-switch",</div><div class='add'>+	  .data = &amp;bcm_sf2_4908_data</div><div class='add'>+	},</div><div class='add'>+	{ .compatible = "brcm,bcm7445-switch-v4.0",</div><div class='add'>+	  .data = &amp;bcm_sf2_7445_data</div><div class='add'>+	},</div><div class='add'>+	{ .compatible = "brcm,bcm7278-switch-v4.0",</div><div class='add'>+	  .data = &amp;bcm_sf2_7278_data</div><div class='add'>+	},</div><div class='add'>+	{ .compatible = "brcm,bcm7278-switch-v4.8",</div><div class='add'>+	  .data = &amp;bcm_sf2_7278_data</div><div class='add'>+	},</div><div class='add'>+	{ /* sentinel */ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, bcm_sf2_of_match);</div><div class='add'>+</div><div class='add'>+static int bcm_sf2_sw_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='del'>-	register_switch_driver(&amp;bcm_sf2_switch_driver);</div><div class='add'>+	const char *reg_names[BCM_SF2_REGS_NUM] = BCM_SF2_REGS_NAME;</div><div class='add'>+	struct device_node *dn = pdev-&gt;dev.of_node;</div><div class='add'>+	const struct of_device_id *of_id = NULL;</div><div class='add'>+	const struct bcm_sf2_of_data *data;</div><div class='add'>+	struct b53_platform_data *pdata;</div><div class='add'>+	struct dsa_switch_ops *ops;</div><div class='add'>+	struct device_node *ports;</div><div class='add'>+	struct bcm_sf2_priv *priv;</div><div class='add'>+	struct b53_device *dev;</div><div class='add'>+	struct dsa_switch *ds;</div><div class='add'>+	void __iomem **base;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	u32 reg, rev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	priv = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ops = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*ops), GFP_KERNEL);</div><div class='add'>+	if (!ops)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	dev = b53_switch_alloc(&amp;pdev-&gt;dev, &amp;bcm_sf2_io_ops, priv);</div><div class='add'>+	if (!dev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	pdata = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*pdata), GFP_KERNEL);</div><div class='add'>+	if (!pdata)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	of_id = of_match_node(bcm_sf2_of_match, dn);</div><div class='add'>+	if (!of_id || !of_id-&gt;data)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	data = of_id-&gt;data;</div><div class='add'>+</div><div class='add'>+	/* Set SWITCH_REG register offsets and SWITCH_CORE align factor */</div><div class='add'>+	priv-&gt;type = data-&gt;type;</div><div class='add'>+	priv-&gt;reg_offsets = data-&gt;reg_offsets;</div><div class='add'>+	priv-&gt;core_reg_align = data-&gt;core_reg_align;</div><div class='add'>+	priv-&gt;num_cfp_rules = data-&gt;num_cfp_rules;</div><div class='add'>+	priv-&gt;num_crossbar_int_ports = data-&gt;num_crossbar_int_ports;</div><div class='add'>+	priv-&gt;num_crossbar_ext_bits = data-&gt;num_crossbar_ext_bits;</div><div class='add'>+</div><div class='add'>+	priv-&gt;rcdev = devm_reset_control_get_optional_exclusive(&amp;pdev-&gt;dev,</div><div class='add'>+								"switch");</div><div class='add'>+	if (IS_ERR(priv-&gt;rcdev))</div><div class='add'>+		return PTR_ERR(priv-&gt;rcdev);</div><div class='add'>+</div><div class='add'>+	/* Auto-detection using standard registers will not work, so</div><div class='add'>+	 * provide an indication of what kind of device we are for</div><div class='add'>+	 * b53_common to work with</div><div class='add'>+	 */</div><div class='add'>+	pdata-&gt;chip_id = priv-&gt;type;</div><div class='add'>+	dev-&gt;pdata = pdata;</div><div class='add'>+</div><div class='add'>+	priv-&gt;dev = dev;</div><div class='add'>+	ds = dev-&gt;ds;</div><div class='add'>+	ds-&gt;ops = &amp;bcm_sf2_ops;</div><div class='add'>+	ds-&gt;phylink_mac_ops = &amp;bcm_sf2_phylink_mac_ops;</div><div class='add'>+</div><div class='add'>+	/* Advertise the 8 egress queues */</div><div class='add'>+	ds-&gt;num_tx_queues = SF2_NUM_EGRESS_QUEUES;</div><div class='add'>+</div><div class='add'>+	dev_set_drvdata(&amp;pdev-&gt;dev, priv);</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;priv-&gt;indir_lock);</div><div class='add'>+	mutex_init(&amp;priv-&gt;cfp.lock);</div><div class='add'>+	INIT_LIST_HEAD(&amp;priv-&gt;cfp.rules_list);</div><div class='add'>+</div><div class='add'>+	/* CFP rule #0 cannot be used for specific classifications, flag it as</div><div class='add'>+	 * permanently used</div><div class='add'>+	 */</div><div class='add'>+	set_bit(0, priv-&gt;cfp.used);</div><div class='add'>+	set_bit(0, priv-&gt;cfp.unique);</div><div class='add'>+</div><div class='add'>+	/* Balance of_node_put() done by of_find_node_by_name() */</div><div class='add'>+	of_node_get(dn);</div><div class='add'>+	ports = of_find_node_by_name(dn, "ports");</div><div class='add'>+	if (ports) {</div><div class='add'>+		bcm_sf2_identify_ports(priv, ports);</div><div class='add'>+		of_node_put(ports);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;irq0 = irq_of_parse_and_map(dn, 0);</div><div class='add'>+	priv-&gt;irq1 = irq_of_parse_and_map(dn, 1);</div><div class='add'>+</div><div class='add'>+	base = &amp;priv-&gt;core;</div><div class='add'>+	for (i = 0; i &lt; BCM_SF2_REGS_NUM; i++) {</div><div class='add'>+		*base = devm_platform_ioremap_resource(pdev, i);</div><div class='add'>+		if (IS_ERR(*base)) {</div><div class='add'>+			pr_err("unable to find register: %s\n", reg_names[i]);</div><div class='add'>+			return PTR_ERR(*base);</div><div class='add'>+		}</div><div class='add'>+		base++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;clk = devm_clk_get_optional(&amp;pdev-&gt;dev, "sw_switch");</div><div class='add'>+	if (IS_ERR(priv-&gt;clk))</div><div class='add'>+		return PTR_ERR(priv-&gt;clk);</div><div class='add'>+</div><div class='add'>+	ret = clk_prepare_enable(priv-&gt;clk);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	priv-&gt;clk_mdiv = devm_clk_get_optional(&amp;pdev-&gt;dev, "sw_switch_mdiv");</div><div class='add'>+	if (IS_ERR(priv-&gt;clk_mdiv)) {</div><div class='add'>+		ret = PTR_ERR(priv-&gt;clk_mdiv);</div><div class='add'>+		goto out_clk;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = clk_prepare_enable(priv-&gt;clk_mdiv);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_clk;</div><div class='add'>+</div><div class='add'>+	ret = bcm_sf2_sw_rst(priv);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_err("unable to software reset switch: %d\n", ret);</div><div class='add'>+		goto out_clk_mdiv;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bcm_sf2_crossbar_setup(priv);</div><div class='add'>+</div><div class='add'>+	bcm_sf2_gphy_enable_set(priv-&gt;dev-&gt;ds, true);</div><div class='add'>+</div><div class='add'>+	ret = bcm_sf2_mdio_register(ds);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_err("failed to register MDIO bus\n");</div><div class='add'>+		goto out_clk_mdiv;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bcm_sf2_gphy_enable_set(priv-&gt;dev-&gt;ds, false);</div><div class='add'>+</div><div class='add'>+	ret = bcm_sf2_cfp_rst(priv);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_err("failed to reset CFP\n");</div><div class='add'>+		goto out_mdio;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Disable all interrupts and request them */</div><div class='add'>+	bcm_sf2_intr_disable(priv);</div><div class='add'>+</div><div class='add'>+	ret = devm_request_irq(&amp;pdev-&gt;dev, priv-&gt;irq0, bcm_sf2_switch_0_isr, 0,</div><div class='add'>+			       "switch_0", ds);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		pr_err("failed to request switch_0 IRQ\n");</div><div class='add'>+		goto out_mdio;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = devm_request_irq(&amp;pdev-&gt;dev, priv-&gt;irq1, bcm_sf2_switch_1_isr, 0,</div><div class='add'>+			       "switch_1", ds);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		pr_err("failed to request switch_1 IRQ\n");</div><div class='add'>+		goto out_mdio;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Reset the MIB counters */</div><div class='add'>+	reg = core_readl(priv, CORE_GMNCFGCFG);</div><div class='add'>+	reg |= RST_MIB_CNT;</div><div class='add'>+	core_writel(priv, reg, CORE_GMNCFGCFG);</div><div class='add'>+	reg &amp;= ~RST_MIB_CNT;</div><div class='add'>+	core_writel(priv, reg, CORE_GMNCFGCFG);</div><div class='add'>+</div><div class='add'>+	/* Get the maximum number of ports for this switch */</div><div class='add'>+	priv-&gt;hw_params.num_ports = core_readl(priv, CORE_IMP0_PRT_ID) + 1;</div><div class='add'>+	if (priv-&gt;hw_params.num_ports &gt; DSA_MAX_PORTS)</div><div class='add'>+		priv-&gt;hw_params.num_ports = DSA_MAX_PORTS;</div><div class='add'>+</div><div class='add'>+	/* Assume a single GPHY setup if we can't read that property */</div><div class='add'>+	if (of_property_read_u32(dn, "brcm,num-gphy",</div><div class='add'>+				 &amp;priv-&gt;hw_params.num_gphy))</div><div class='add'>+		priv-&gt;hw_params.num_gphy = 1;</div><div class='add'>+</div><div class='add'>+	rev = reg_readl(priv, REG_SWITCH_REVISION);</div><div class='add'>+	priv-&gt;hw_params.top_rev = (rev &gt;&gt; SWITCH_TOP_REV_SHIFT) &amp;</div><div class='add'>+					SWITCH_TOP_REV_MASK;</div><div class='add'>+	priv-&gt;hw_params.core_rev = (rev &amp; SF2_REV_MASK);</div><div class='add'>+</div><div class='add'>+	rev = reg_readl(priv, REG_PHY_REVISION);</div><div class='add'>+	priv-&gt;hw_params.gphy_rev = rev &amp; PHY_REVISION_MASK;</div><div class='add'>+</div><div class='add'>+	ret = b53_switch_register(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_mdio;</div><div class='add'>+</div><div class='add'>+	dev_info(&amp;pdev-&gt;dev,</div><div class='add'>+		 "Starfighter 2 top: %x.%02x, core: %x.%02x, IRQs: %d, %d\n",</div><div class='add'>+		 priv-&gt;hw_params.top_rev &gt;&gt; 8, priv-&gt;hw_params.top_rev &amp; 0xff,</div><div class='add'>+		 priv-&gt;hw_params.core_rev &gt;&gt; 8, priv-&gt;hw_params.core_rev &amp; 0xff,</div><div class='add'>+		 priv-&gt;irq0, priv-&gt;irq1);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='add'>+</div><div class='add'>+out_mdio:</div><div class='add'>+	bcm_sf2_mdio_unregister(priv);</div><div class='add'>+out_clk_mdiv:</div><div class='add'>+	clk_disable_unprepare(priv-&gt;clk_mdiv);</div><div class='add'>+out_clk:</div><div class='add'>+	clk_disable_unprepare(priv-&gt;clk);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='del'>-module_init(bcm_sf2_init);</div><div class='ctx'> </div><div class='del'>-static void __exit bcm_sf2_exit(void)</div><div class='add'>+static void bcm_sf2_sw_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='del'>-	unregister_switch_driver(&amp;bcm_sf2_switch_driver);</div><div class='add'>+	struct bcm_sf2_priv *priv = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	priv-&gt;wol_ports_mask = 0;</div><div class='add'>+	/* Disable interrupts */</div><div class='add'>+	bcm_sf2_intr_disable(priv);</div><div class='add'>+	dsa_unregister_switch(priv-&gt;dev-&gt;ds);</div><div class='add'>+	bcm_sf2_cfp_exit(priv-&gt;dev-&gt;ds);</div><div class='add'>+	bcm_sf2_mdio_unregister(priv);</div><div class='add'>+	clk_disable_unprepare(priv-&gt;clk_mdiv);</div><div class='add'>+	clk_disable_unprepare(priv-&gt;clk);</div><div class='add'>+	if (priv-&gt;type == BCM7278_DEVICE_ID)</div><div class='add'>+		reset_control_assert(priv-&gt;rcdev);</div><div class='ctx'> }</div><div class='del'>-module_exit(bcm_sf2_exit);</div><div class='add'>+</div><div class='add'>+static void bcm_sf2_sw_shutdown(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct bcm_sf2_priv *priv = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* For a kernel about to be kexec'd we want to keep the GPHY on for a</div><div class='add'>+	 * successful MDIO bus scan to occur. If we did turn off the GPHY</div><div class='add'>+	 * before (e.g: port_disable), this will also power it back on.</div><div class='add'>+	 *</div><div class='add'>+	 * Do not rely on kexec_in_progress, just power the PHY on.</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;hw_params.num_gphy == 1)</div><div class='add'>+		bcm_sf2_gphy_enable_set(priv-&gt;dev-&gt;ds, true);</div><div class='add'>+</div><div class='add'>+	dsa_switch_shutdown(priv-&gt;dev-&gt;ds);</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PM_SLEEP</div><div class='add'>+static int bcm_sf2_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct bcm_sf2_priv *priv = dev_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	return dsa_switch_suspend(priv-&gt;dev-&gt;ds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bcm_sf2_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct bcm_sf2_priv *priv = dev_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	return dsa_switch_resume(priv-&gt;dev-&gt;ds);</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_PM_SLEEP */</div><div class='add'>+</div><div class='add'>+static SIMPLE_DEV_PM_OPS(bcm_sf2_pm_ops,</div><div class='add'>+			 bcm_sf2_suspend, bcm_sf2_resume);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+static struct platform_driver bcm_sf2_driver = {</div><div class='add'>+	.probe	= bcm_sf2_sw_probe,</div><div class='add'>+	.remove = bcm_sf2_sw_remove,</div><div class='add'>+	.shutdown = bcm_sf2_sw_shutdown,</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "brcm-sf2",</div><div class='add'>+		.of_match_table = bcm_sf2_of_match,</div><div class='add'>+		.pm = &amp;bcm_sf2_pm_ops,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+module_platform_driver(bcm_sf2_driver);</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("Broadcom Corporation");</div><div class='ctx'> MODULE_DESCRIPTION("Driver for Broadcom Starfighter 2 ethernet switch chip");</div><div class='head'>diff --git a/drivers/net/dsa/bcm_sf2.h b/drivers/net/dsa/bcm_sf2.h<br/>index 22e2ebf31333..be9f3b29019f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/bcm_sf2.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/bcm_sf2.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/bcm_sf2.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/bcm_sf2.h</a></div><div class='hunk'>@@ -1,12 +1,8 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='ctx'> /*</div><div class='ctx'>  * Broadcom Starfighter2 private context</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2014, Broadcom Corporation</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef __BCM_SF2_H</div><div class='hunk'>@@ -19,10 +15,15 @@</div><div class='ctx'> #include &lt;linux/mutex.h&gt;</div><div class='ctx'> #include &lt;linux/mii.h&gt;</div><div class='ctx'> #include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/bitops.h&gt;</div><div class='add'>+#include &lt;linux/if_vlan.h&gt;</div><div class='add'>+#include &lt;linux/reset.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;net/dsa.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "bcm_sf2_regs.h"</div><div class='add'>+#include "b53/b53_priv.h"</div><div class='ctx'> </div><div class='ctx'> struct bcm_sf2_hw_params {</div><div class='ctx'> 	u16	top_rev;</div><div class='hunk'>@@ -43,11 +44,18 @@ struct bcm_sf2_hw_params {</div><div class='ctx'> #define BCM_SF2_REGS_NUM	6</div><div class='ctx'> </div><div class='ctx'> struct bcm_sf2_port_status {</div><div class='add'>+	phy_interface_t mode;</div><div class='ctx'> 	unsigned int link;</div><div class='add'>+	bool enabled;</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	struct ethtool_eee eee;</div><div class='del'>-</div><div class='del'>-	u32 vlan_ctl_mask;</div><div class='add'>+struct bcm_sf2_cfp_priv {</div><div class='add'>+	/* Mutex protecting concurrent accesses to the CFP registers */</div><div class='add'>+	struct mutex lock;</div><div class='add'>+	DECLARE_BITMAP(used, CFP_NUM_RULES);</div><div class='add'>+	DECLARE_BITMAP(unique, CFP_NUM_RULES);</div><div class='add'>+	unsigned int rules_cnt;</div><div class='add'>+	struct list_head rules_list;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct bcm_sf2_priv {</div><div class='hunk'>@@ -59,6 +67,16 @@ struct bcm_sf2_priv {</div><div class='ctx'> 	void __iomem			*fcb;</div><div class='ctx'> 	void __iomem			*acb;</div><div class='ctx'> </div><div class='add'>+	struct reset_control		*rcdev;</div><div class='add'>+</div><div class='add'>+	/* Register offsets indirection tables */</div><div class='add'>+	u32 				type;</div><div class='add'>+	const u16			*reg_offsets;</div><div class='add'>+	unsigned int			core_reg_align;</div><div class='add'>+	unsigned int			num_cfp_rules;</div><div class='add'>+	unsigned int			num_crossbar_int_ports;</div><div class='add'>+	unsigned int			num_crossbar_ext_bits;</div><div class='add'>+</div><div class='ctx'> 	/* spinlock protecting access to the indirect registers */</div><div class='ctx'> 	spinlock_t			indir_lock;</div><div class='ctx'> </div><div class='hunk'>@@ -69,8 +87,8 @@ struct bcm_sf2_priv {</div><div class='ctx'> 	u32				irq1_stat;</div><div class='ctx'> 	u32				irq1_mask;</div><div class='ctx'> </div><div class='del'>-	/* Mutex protecting access to the MIB counters */</div><div class='del'>-	struct mutex			stats_mutex;</div><div class='add'>+	/* Backing b53_device */</div><div class='add'>+	struct b53_device		*dev;</div><div class='ctx'> </div><div class='ctx'> 	struct bcm_sf2_hw_params	hw_params;</div><div class='ctx'> </div><div class='hunk'>@@ -78,23 +96,49 @@ struct bcm_sf2_priv {</div><div class='ctx'> </div><div class='ctx'> 	/* Mask of ports enabled for Wake-on-LAN */</div><div class='ctx'> 	u32				wol_ports_mask;</div><div class='del'>-};</div><div class='ctx'> </div><div class='del'>-struct bcm_sf2_hw_stats {</div><div class='del'>-	const char	*string;</div><div class='del'>-	u16		reg;</div><div class='del'>-	u8		sizeof_stat;</div><div class='add'>+	struct clk			*clk;</div><div class='add'>+	struct clk			*clk_mdiv;</div><div class='add'>+</div><div class='add'>+	/* MoCA port location */</div><div class='add'>+	int				moca_port;</div><div class='add'>+</div><div class='add'>+	/* Bitmask of ports having an integrated PHY */</div><div class='add'>+	unsigned int			int_phy_mask;</div><div class='add'>+</div><div class='add'>+	/* Master and slave MDIO bus controller */</div><div class='add'>+	unsigned int			indir_phy_mask;</div><div class='add'>+	struct mii_bus			*user_mii_bus;</div><div class='add'>+	struct mii_bus			*master_mii_bus;</div><div class='add'>+</div><div class='add'>+	/* Bitmask of ports needing BRCM tags */</div><div class='add'>+	unsigned int			brcm_tag_mask;</div><div class='add'>+</div><div class='add'>+	/* CFP rules context */</div><div class='add'>+	struct bcm_sf2_cfp_priv		cfp;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static inline struct bcm_sf2_priv *bcm_sf2_to_priv(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct b53_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return dev-&gt;priv;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 bcm_sf2_mangle_addr(struct bcm_sf2_priv *priv, u32 off)</div><div class='add'>+{</div><div class='add'>+	return off &lt;&lt; priv-&gt;core_reg_align;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> #define SF2_IO_MACRO(name) \</div><div class='ctx'> static inline u32 name##_readl(struct bcm_sf2_priv *priv, u32 off)	\</div><div class='ctx'> {									\</div><div class='del'>-	return __raw_readl(priv-&gt;name + off);				\</div><div class='add'>+	return readl_relaxed(priv-&gt;name + off);				\</div><div class='ctx'> }									\</div><div class='ctx'> static inline void name##_writel(struct bcm_sf2_priv *priv,		\</div><div class='ctx'> 				  u32 val, u32 off)			\</div><div class='ctx'> {									\</div><div class='del'>-	__raw_writel(val, priv-&gt;name + off);				\</div><div class='add'>+	writel_relaxed(val, priv-&gt;name + off);				\</div><div class='ctx'> }									\</div><div class='ctx'> </div><div class='ctx'> /* Accesses to 64-bits register requires us to latch the hi/lo pairs</div><div class='hunk'>@@ -107,17 +151,17 @@ static inline u64 name##_readq(struct bcm_sf2_priv *priv, u32 off)	\</div><div class='ctx'> {									\</div><div class='ctx'> 	u32 indir, dir;							\</div><div class='ctx'> 	spin_lock(&amp;priv-&gt;indir_lock);					\</div><div class='del'>-	dir = __raw_readl(priv-&gt;name + off);				\</div><div class='add'>+	dir = name##_readl(priv, off);					\</div><div class='ctx'> 	indir = reg_readl(priv, REG_DIR_DATA_READ);			\</div><div class='ctx'> 	spin_unlock(&amp;priv-&gt;indir_lock);					\</div><div class='ctx'> 	return (u64)indir &lt;&lt; 32 | dir;					\</div><div class='ctx'> }									\</div><div class='del'>-static inline void name##_writeq(struct bcm_sf2_priv *priv, u32 off,	\</div><div class='del'>-							u64 val)	\</div><div class='add'>+static inline void name##_writeq(struct bcm_sf2_priv *priv, u64 val,	\</div><div class='add'>+							u32 off)	\</div><div class='ctx'> {									\</div><div class='ctx'> 	spin_lock(&amp;priv-&gt;indir_lock);					\</div><div class='ctx'> 	reg_writel(priv, upper_32_bits(val), REG_DIR_DATA_WRITE);	\</div><div class='del'>-	__raw_writel(lower_32_bits(val), priv-&gt;name + off);		\</div><div class='add'>+	name##_writel(priv, lower_32_bits(val), off);			\</div><div class='ctx'> 	spin_unlock(&amp;priv-&gt;indir_lock);					\</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -125,8 +169,8 @@ static inline void name##_writeq(struct bcm_sf2_priv *priv, u32 off,	\</div><div class='ctx'> static inline void intrl2_##which##_mask_clear(struct bcm_sf2_priv *priv, \</div><div class='ctx'> 						u32 mask)		\</div><div class='ctx'> {									\</div><div class='del'>-	intrl2_##which##_writel(priv, mask, INTRL2_CPU_MASK_CLEAR);	\</div><div class='ctx'> 	priv-&gt;irq##which##_mask &amp;= ~(mask);				\</div><div class='add'>+	intrl2_##which##_writel(priv, mask, INTRL2_CPU_MASK_CLEAR);	\</div><div class='ctx'> }									\</div><div class='ctx'> static inline void intrl2_##which##_mask_set(struct bcm_sf2_priv *priv, \</div><div class='ctx'> 						u32 mask)		\</div><div class='hunk'>@@ -135,8 +179,28 @@ static inline void intrl2_##which##_mask_set(struct bcm_sf2_priv *priv, \</div><div class='ctx'> 	priv-&gt;irq##which##_mask |= (mask);				\</div><div class='ctx'> }									\</div><div class='ctx'> </div><div class='del'>-SF2_IO_MACRO(core);</div><div class='del'>-SF2_IO_MACRO(reg);</div><div class='add'>+static inline u32 core_readl(struct bcm_sf2_priv *priv, u32 off)</div><div class='add'>+{</div><div class='add'>+	u32 tmp = bcm_sf2_mangle_addr(priv, off);</div><div class='add'>+	return readl_relaxed(priv-&gt;core + tmp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void core_writel(struct bcm_sf2_priv *priv, u32 val, u32 off)</div><div class='add'>+{</div><div class='add'>+	u32 tmp = bcm_sf2_mangle_addr(priv, off);</div><div class='add'>+	writel_relaxed(val, priv-&gt;core + tmp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 reg_readl(struct bcm_sf2_priv *priv, u16 off)</div><div class='add'>+{</div><div class='add'>+	return readl_relaxed(priv-&gt;reg + priv-&gt;reg_offsets[off]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void reg_writel(struct bcm_sf2_priv *priv, u32 val, u16 off)</div><div class='add'>+{</div><div class='add'>+	writel_relaxed(val, priv-&gt;reg + priv-&gt;reg_offsets[off]);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> SF2_IO64_MACRO(core);</div><div class='ctx'> SF2_IO_MACRO(intrl2_0);</div><div class='ctx'> SF2_IO_MACRO(intrl2_1);</div><div class='hunk'>@@ -146,4 +210,28 @@ SF2_IO_MACRO(acb);</div><div class='ctx'> SWITCH_INTR_L2(0);</div><div class='ctx'> SWITCH_INTR_L2(1);</div><div class='ctx'> </div><div class='add'>+static inline u32 reg_led_readl(struct bcm_sf2_priv *priv, u16 off, u16 reg)</div><div class='add'>+{</div><div class='add'>+	return readl_relaxed(priv-&gt;reg + priv-&gt;reg_offsets[off] + reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void reg_led_writel(struct bcm_sf2_priv *priv, u32 val, u16 off, u16 reg)</div><div class='add'>+{</div><div class='add'>+	writel_relaxed(val, priv-&gt;reg + priv-&gt;reg_offsets[off] + reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* RXNFC */</div><div class='add'>+int bcm_sf2_get_rxnfc(struct dsa_switch *ds, int port,</div><div class='add'>+		      struct ethtool_rxnfc *nfc, u32 *rule_locs);</div><div class='add'>+int bcm_sf2_set_rxnfc(struct dsa_switch *ds, int port,</div><div class='add'>+		      struct ethtool_rxnfc *nfc);</div><div class='add'>+int bcm_sf2_cfp_rst(struct bcm_sf2_priv *priv);</div><div class='add'>+void bcm_sf2_cfp_exit(struct dsa_switch *ds);</div><div class='add'>+int bcm_sf2_cfp_resume(struct dsa_switch *ds);</div><div class='add'>+void bcm_sf2_cfp_get_strings(struct dsa_switch *ds, int port, u32 stringset,</div><div class='add'>+			     uint8_t **data);</div><div class='add'>+void bcm_sf2_cfp_get_ethtool_stats(struct dsa_switch *ds, int port,</div><div class='add'>+				   uint64_t *data);</div><div class='add'>+int bcm_sf2_cfp_get_sset_count(struct dsa_switch *ds, int port, int sset);</div><div class='add'>+</div><div class='ctx'> #endif /* __BCM_SF2_H */</div><div class='head'>diff --git a/drivers/net/dsa/bcm_sf2_cfp.c b/drivers/net/dsa/bcm_sf2_cfp.c<br/>new file mode 100644<br/>index 000000000000..e22362e6f0cd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/bcm_sf2_cfp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/bcm_sf2_cfp.c</a></div><div class='hunk'>@@ -0,0 +1,1338 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Broadcom Starfighter 2 DSA switch CFP support</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2016, Broadcom</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/list.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/if_ether.h&gt;</div><div class='add'>+#include &lt;linux/in.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+#include &lt;linux/bitmap.h&gt;</div><div class='add'>+#include &lt;net/flow_offload.h&gt;</div><div class='add'>+#include &lt;net/switchdev.h&gt;</div><div class='add'>+#include &lt;uapi/linux/if_bridge.h&gt;</div><div class='add'>+</div><div class='add'>+#include "bcm_sf2.h"</div><div class='add'>+#include "bcm_sf2_regs.h"</div><div class='add'>+</div><div class='add'>+struct cfp_rule {</div><div class='add'>+	int port;</div><div class='add'>+	struct ethtool_rx_flow_spec fs;</div><div class='add'>+	struct list_head next;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct cfp_udf_slice_layout {</div><div class='add'>+	u8 slices[UDFS_PER_SLICE];</div><div class='add'>+	u32 mask_value;</div><div class='add'>+	u32 base_offset;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct cfp_udf_layout {</div><div class='add'>+	struct cfp_udf_slice_layout udfs[UDF_NUM_SLICES];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u8 zero_slice[UDFS_PER_SLICE] = { };</div><div class='add'>+</div><div class='add'>+/* UDF slices layout for a TCPv4/UDPv4 specification */</div><div class='add'>+static const struct cfp_udf_layout udf_tcpip4_layout = {</div><div class='add'>+	.udfs = {</div><div class='add'>+		[1] = {</div><div class='add'>+			.slices = {</div><div class='add'>+				/* End of L2, byte offset 12, src IP[0:15] */</div><div class='add'>+				CFG_UDF_EOL2 | 6,</div><div class='add'>+				/* End of L2, byte offset 14, src IP[16:31] */</div><div class='add'>+				CFG_UDF_EOL2 | 7,</div><div class='add'>+				/* End of L2, byte offset 16, dst IP[0:15] */</div><div class='add'>+				CFG_UDF_EOL2 | 8,</div><div class='add'>+				/* End of L2, byte offset 18, dst IP[16:31] */</div><div class='add'>+				CFG_UDF_EOL2 | 9,</div><div class='add'>+				/* End of L3, byte offset 0, src port */</div><div class='add'>+				CFG_UDF_EOL3 | 0,</div><div class='add'>+				/* End of L3, byte offset 2, dst port */</div><div class='add'>+				CFG_UDF_EOL3 | 1,</div><div class='add'>+				0, 0, 0</div><div class='add'>+			},</div><div class='add'>+			.mask_value = L3_FRAMING_MASK | IPPROTO_MASK | IP_FRAG,</div><div class='add'>+			.base_offset = CORE_UDF_0_A_0_8_PORT_0 + UDF_SLICE_OFFSET,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* UDF slices layout for a TCPv6/UDPv6 specification */</div><div class='add'>+static const struct cfp_udf_layout udf_tcpip6_layout = {</div><div class='add'>+	.udfs = {</div><div class='add'>+		[0] = {</div><div class='add'>+			.slices = {</div><div class='add'>+				/* End of L2, byte offset 8, src IP[0:15] */</div><div class='add'>+				CFG_UDF_EOL2 | 4,</div><div class='add'>+				/* End of L2, byte offset 10, src IP[16:31] */</div><div class='add'>+				CFG_UDF_EOL2 | 5,</div><div class='add'>+				/* End of L2, byte offset 12, src IP[32:47] */</div><div class='add'>+				CFG_UDF_EOL2 | 6,</div><div class='add'>+				/* End of L2, byte offset 14, src IP[48:63] */</div><div class='add'>+				CFG_UDF_EOL2 | 7,</div><div class='add'>+				/* End of L2, byte offset 16, src IP[64:79] */</div><div class='add'>+				CFG_UDF_EOL2 | 8,</div><div class='add'>+				/* End of L2, byte offset 18, src IP[80:95] */</div><div class='add'>+				CFG_UDF_EOL2 | 9,</div><div class='add'>+				/* End of L2, byte offset 20, src IP[96:111] */</div><div class='add'>+				CFG_UDF_EOL2 | 10,</div><div class='add'>+				/* End of L2, byte offset 22, src IP[112:127] */</div><div class='add'>+				CFG_UDF_EOL2 | 11,</div><div class='add'>+				/* End of L3, byte offset 0, src port */</div><div class='add'>+				CFG_UDF_EOL3 | 0,</div><div class='add'>+			},</div><div class='add'>+			.mask_value = L3_FRAMING_MASK | IPPROTO_MASK | IP_FRAG,</div><div class='add'>+			.base_offset = CORE_UDF_0_B_0_8_PORT_0,</div><div class='add'>+		},</div><div class='add'>+		[3] = {</div><div class='add'>+			.slices = {</div><div class='add'>+				/* End of L2, byte offset 24, dst IP[0:15] */</div><div class='add'>+				CFG_UDF_EOL2 | 12,</div><div class='add'>+				/* End of L2, byte offset 26, dst IP[16:31] */</div><div class='add'>+				CFG_UDF_EOL2 | 13,</div><div class='add'>+				/* End of L2, byte offset 28, dst IP[32:47] */</div><div class='add'>+				CFG_UDF_EOL2 | 14,</div><div class='add'>+				/* End of L2, byte offset 30, dst IP[48:63] */</div><div class='add'>+				CFG_UDF_EOL2 | 15,</div><div class='add'>+				/* End of L2, byte offset 32, dst IP[64:79] */</div><div class='add'>+				CFG_UDF_EOL2 | 16,</div><div class='add'>+				/* End of L2, byte offset 34, dst IP[80:95] */</div><div class='add'>+				CFG_UDF_EOL2 | 17,</div><div class='add'>+				/* End of L2, byte offset 36, dst IP[96:111] */</div><div class='add'>+				CFG_UDF_EOL2 | 18,</div><div class='add'>+				/* End of L2, byte offset 38, dst IP[112:127] */</div><div class='add'>+				CFG_UDF_EOL2 | 19,</div><div class='add'>+				/* End of L3, byte offset 2, dst port */</div><div class='add'>+				CFG_UDF_EOL3 | 1,</div><div class='add'>+			},</div><div class='add'>+			.mask_value = L3_FRAMING_MASK | IPPROTO_MASK | IP_FRAG,</div><div class='add'>+			.base_offset = CORE_UDF_0_D_0_11_PORT_0,</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline unsigned int bcm_sf2_get_num_udf_slices(const u8 *layout)</div><div class='add'>+{</div><div class='add'>+	unsigned int i, count = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; UDFS_PER_SLICE; i++) {</div><div class='add'>+		if (layout[i] != 0)</div><div class='add'>+			count++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 udf_upper_bits(int num_udf)</div><div class='add'>+{</div><div class='add'>+	return GENMASK(num_udf - 1, 0) &gt;&gt; (UDFS_PER_SLICE - 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 udf_lower_bits(int num_udf)</div><div class='add'>+{</div><div class='add'>+	return (u8)GENMASK(num_udf - 1, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int bcm_sf2_get_slice_number(const struct cfp_udf_layout *l,</div><div class='add'>+					     unsigned int start)</div><div class='add'>+{</div><div class='add'>+	const struct cfp_udf_slice_layout *slice_layout;</div><div class='add'>+	unsigned int slice_idx;</div><div class='add'>+</div><div class='add'>+	for (slice_idx = start; slice_idx &lt; UDF_NUM_SLICES; slice_idx++) {</div><div class='add'>+		slice_layout = &amp;l-&gt;udfs[slice_idx];</div><div class='add'>+		if (memcmp(slice_layout-&gt;slices, zero_slice,</div><div class='add'>+			   sizeof(zero_slice)))</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return slice_idx;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bcm_sf2_cfp_udf_set(struct bcm_sf2_priv *priv,</div><div class='add'>+				const struct cfp_udf_layout *layout,</div><div class='add'>+				unsigned int slice_num)</div><div class='add'>+{</div><div class='add'>+	u32 offset = layout-&gt;udfs[slice_num].base_offset;</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; UDFS_PER_SLICE; i++)</div><div class='add'>+		core_writel(priv, layout-&gt;udfs[slice_num].slices[i],</div><div class='add'>+			    offset + i * 4);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bcm_sf2_cfp_op(struct bcm_sf2_priv *priv, unsigned int op)</div><div class='add'>+{</div><div class='add'>+	unsigned int timeout = 1000;</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	reg = core_readl(priv, CORE_CFP_ACC);</div><div class='add'>+	reg &amp;= ~(OP_SEL_MASK | RAM_SEL_MASK);</div><div class='add'>+	reg |= OP_STR_DONE | op;</div><div class='add'>+	core_writel(priv, reg, CORE_CFP_ACC);</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		reg = core_readl(priv, CORE_CFP_ACC);</div><div class='add'>+		if (!(reg &amp; OP_STR_DONE))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		cpu_relax();</div><div class='add'>+	} while (timeout--);</div><div class='add'>+</div><div class='add'>+	if (!timeout)</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void bcm_sf2_cfp_rule_addr_set(struct bcm_sf2_priv *priv,</div><div class='add'>+					     unsigned int addr)</div><div class='add'>+{</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	WARN_ON(addr &gt;= priv-&gt;num_cfp_rules);</div><div class='add'>+</div><div class='add'>+	reg = core_readl(priv, CORE_CFP_ACC);</div><div class='add'>+	reg &amp;= ~(XCESS_ADDR_MASK &lt;&lt; XCESS_ADDR_SHIFT);</div><div class='add'>+	reg |= addr &lt;&lt; XCESS_ADDR_SHIFT;</div><div class='add'>+	core_writel(priv, reg, CORE_CFP_ACC);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int bcm_sf2_cfp_rule_size(struct bcm_sf2_priv *priv)</div><div class='add'>+{</div><div class='add'>+	/* Entry #0 is reserved */</div><div class='add'>+	return priv-&gt;num_cfp_rules - 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bcm_sf2_cfp_act_pol_set(struct bcm_sf2_priv *priv,</div><div class='add'>+				   unsigned int rule_index,</div><div class='add'>+				   int src_port,</div><div class='add'>+				   unsigned int port_num,</div><div class='add'>+				   unsigned int queue_num,</div><div class='add'>+				   bool fwd_map_change)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	/* Replace ARL derived destination with DST_MAP derived, define</div><div class='add'>+	 * which port and queue this should be forwarded to.</div><div class='add'>+	 */</div><div class='add'>+	if (fwd_map_change)</div><div class='add'>+		reg = CHANGE_FWRD_MAP_IB_REP_ARL |</div><div class='add'>+		      BIT(port_num + DST_MAP_IB_SHIFT) |</div><div class='add'>+		      CHANGE_TC | queue_num &lt;&lt; NEW_TC_SHIFT;</div><div class='add'>+	else</div><div class='add'>+		reg = 0;</div><div class='add'>+</div><div class='add'>+	/* Enable looping back to the original port */</div><div class='add'>+	if (src_port == port_num)</div><div class='add'>+		reg |= LOOP_BK_EN;</div><div class='add'>+</div><div class='add'>+	core_writel(priv, reg, CORE_ACT_POL_DATA0);</div><div class='add'>+</div><div class='add'>+	/* Set classification ID that needs to be put in Broadcom tag */</div><div class='add'>+	core_writel(priv, rule_index &lt;&lt; CHAIN_ID_SHIFT, CORE_ACT_POL_DATA1);</div><div class='add'>+</div><div class='add'>+	core_writel(priv, 0, CORE_ACT_POL_DATA2);</div><div class='add'>+</div><div class='add'>+	/* Configure policer RAM now */</div><div class='add'>+	ret = bcm_sf2_cfp_op(priv, OP_SEL_WRITE | ACT_POL_RAM);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_err("Policer entry at %d failed\n", rule_index);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Disable the policer */</div><div class='add'>+	core_writel(priv, POLICER_MODE_DISABLE, CORE_RATE_METER0);</div><div class='add'>+</div><div class='add'>+	/* Now the rate meter */</div><div class='add'>+	ret = bcm_sf2_cfp_op(priv, OP_SEL_WRITE | RATE_METER_RAM);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_err("Meter entry at %d failed\n", rule_index);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bcm_sf2_cfp_slice_ipv4(struct bcm_sf2_priv *priv,</div><div class='add'>+				   struct flow_dissector_key_ipv4_addrs *addrs,</div><div class='add'>+				   struct flow_dissector_key_ports *ports,</div><div class='add'>+				   const __be16 vlan_tci,</div><div class='add'>+				   unsigned int slice_num, u8 num_udf,</div><div class='add'>+				   bool mask)</div><div class='add'>+{</div><div class='add'>+	u32 reg, offset;</div><div class='add'>+</div><div class='add'>+	/* UDF_Valid[7:0]	[31:24]</div><div class='add'>+	 * S-Tag		[23:8]</div><div class='add'>+	 * C-Tag		[7:0]</div><div class='add'>+	 */</div><div class='add'>+	reg = udf_lower_bits(num_udf) &lt;&lt; 24 | be16_to_cpu(vlan_tci) &gt;&gt; 8;</div><div class='add'>+	if (mask)</div><div class='add'>+		core_writel(priv, reg, CORE_CFP_MASK_PORT(5));</div><div class='add'>+	else</div><div class='add'>+		core_writel(priv, reg, CORE_CFP_DATA_PORT(5));</div><div class='add'>+</div><div class='add'>+	/* C-Tag		[31:24]</div><div class='add'>+	 * UDF_n_A8		[23:8]</div><div class='add'>+	 * UDF_n_A7		[7:0]</div><div class='add'>+	 */</div><div class='add'>+	reg = (u32)(be16_to_cpu(vlan_tci) &amp; 0xff) &lt;&lt; 24;</div><div class='add'>+	if (mask)</div><div class='add'>+		offset = CORE_CFP_MASK_PORT(4);</div><div class='add'>+	else</div><div class='add'>+		offset = CORE_CFP_DATA_PORT(4);</div><div class='add'>+	core_writel(priv, reg, offset);</div><div class='add'>+</div><div class='add'>+	/* UDF_n_A7		[31:24]</div><div class='add'>+	 * UDF_n_A6		[23:8]</div><div class='add'>+	 * UDF_n_A5		[7:0]</div><div class='add'>+	 */</div><div class='add'>+	reg = be16_to_cpu(ports-&gt;dst) &gt;&gt; 8;</div><div class='add'>+	if (mask)</div><div class='add'>+		offset = CORE_CFP_MASK_PORT(3);</div><div class='add'>+	else</div><div class='add'>+		offset = CORE_CFP_DATA_PORT(3);</div><div class='add'>+	core_writel(priv, reg, offset);</div><div class='add'>+</div><div class='add'>+	/* UDF_n_A5		[31:24]</div><div class='add'>+	 * UDF_n_A4		[23:8]</div><div class='add'>+	 * UDF_n_A3		[7:0]</div><div class='add'>+	 */</div><div class='add'>+	reg = (be16_to_cpu(ports-&gt;dst) &amp; 0xff) &lt;&lt; 24 |</div><div class='add'>+	      (u32)be16_to_cpu(ports-&gt;src) &lt;&lt; 8 |</div><div class='add'>+	      (be32_to_cpu(addrs-&gt;dst) &amp; 0x0000ff00) &gt;&gt; 8;</div><div class='add'>+	if (mask)</div><div class='add'>+		offset = CORE_CFP_MASK_PORT(2);</div><div class='add'>+	else</div><div class='add'>+		offset = CORE_CFP_DATA_PORT(2);</div><div class='add'>+	core_writel(priv, reg, offset);</div><div class='add'>+</div><div class='add'>+	/* UDF_n_A3		[31:24]</div><div class='add'>+	 * UDF_n_A2		[23:8]</div><div class='add'>+	 * UDF_n_A1		[7:0]</div><div class='add'>+	 */</div><div class='add'>+	reg = (u32)(be32_to_cpu(addrs-&gt;dst) &amp; 0xff) &lt;&lt; 24 |</div><div class='add'>+	      (u32)(be32_to_cpu(addrs-&gt;dst) &gt;&gt; 16) &lt;&lt; 8 |</div><div class='add'>+	      (be32_to_cpu(addrs-&gt;src) &amp; 0x0000ff00) &gt;&gt; 8;</div><div class='add'>+	if (mask)</div><div class='add'>+		offset = CORE_CFP_MASK_PORT(1);</div><div class='add'>+	else</div><div class='add'>+		offset = CORE_CFP_DATA_PORT(1);</div><div class='add'>+	core_writel(priv, reg, offset);</div><div class='add'>+</div><div class='add'>+	/* UDF_n_A1		[31:24]</div><div class='add'>+	 * UDF_n_A0		[23:8]</div><div class='add'>+	 * Reserved		[7:4]</div><div class='add'>+	 * Slice ID		[3:2]</div><div class='add'>+	 * Slice valid		[1:0]</div><div class='add'>+	 */</div><div class='add'>+	reg = (u32)(be32_to_cpu(addrs-&gt;src) &amp; 0xff) &lt;&lt; 24 |</div><div class='add'>+	      (u32)(be32_to_cpu(addrs-&gt;src) &gt;&gt; 16) &lt;&lt; 8 |</div><div class='add'>+	      SLICE_NUM(slice_num) | SLICE_VALID;</div><div class='add'>+	if (mask)</div><div class='add'>+		offset = CORE_CFP_MASK_PORT(0);</div><div class='add'>+	else</div><div class='add'>+		offset = CORE_CFP_DATA_PORT(0);</div><div class='add'>+	core_writel(priv, reg, offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bcm_sf2_cfp_ipv4_rule_set(struct bcm_sf2_priv *priv, int port,</div><div class='add'>+				     unsigned int port_num,</div><div class='add'>+				     unsigned int queue_num,</div><div class='add'>+				     struct ethtool_rx_flow_spec *fs)</div><div class='add'>+{</div><div class='add'>+	__be16 vlan_tci = 0, vlan_m_tci = htons(0xffff);</div><div class='add'>+	struct ethtool_rx_flow_spec_input input = {};</div><div class='add'>+	const struct cfp_udf_layout *layout;</div><div class='add'>+	unsigned int slice_num, rule_index;</div><div class='add'>+	struct ethtool_rx_flow_rule *flow;</div><div class='add'>+	struct flow_match_ipv4_addrs ipv4;</div><div class='add'>+	struct flow_match_ports ports;</div><div class='add'>+	struct flow_match_ip ip;</div><div class='add'>+	u8 ip_proto, ip_frag;</div><div class='add'>+	u8 num_udf;</div><div class='add'>+	u32 reg;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	switch (fs-&gt;flow_type &amp; ~FLOW_EXT) {</div><div class='add'>+	case TCP_V4_FLOW:</div><div class='add'>+		ip_proto = IPPROTO_TCP;</div><div class='add'>+		break;</div><div class='add'>+	case UDP_V4_FLOW:</div><div class='add'>+		ip_proto = IPPROTO_UDP;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ip_frag = !!(be32_to_cpu(fs-&gt;h_ext.data[0]) &amp; 1);</div><div class='add'>+</div><div class='add'>+	/* Extract VLAN TCI */</div><div class='add'>+	if (fs-&gt;flow_type &amp; FLOW_EXT) {</div><div class='add'>+		vlan_tci = fs-&gt;h_ext.vlan_tci;</div><div class='add'>+		vlan_m_tci = fs-&gt;m_ext.vlan_tci;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Locate the first rule available */</div><div class='add'>+	if (fs-&gt;location == RX_CLS_LOC_ANY)</div><div class='add'>+		rule_index = find_first_zero_bit(priv-&gt;cfp.used,</div><div class='add'>+						 priv-&gt;num_cfp_rules);</div><div class='add'>+	else</div><div class='add'>+		rule_index = fs-&gt;location;</div><div class='add'>+</div><div class='add'>+	if (rule_index &gt; bcm_sf2_cfp_rule_size(priv))</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+</div><div class='add'>+	input.fs = fs;</div><div class='add'>+	flow = ethtool_rx_flow_rule_create(&amp;input);</div><div class='add'>+	if (IS_ERR(flow))</div><div class='add'>+		return PTR_ERR(flow);</div><div class='add'>+</div><div class='add'>+	flow_rule_match_ipv4_addrs(flow-&gt;rule, &amp;ipv4);</div><div class='add'>+	flow_rule_match_ports(flow-&gt;rule, &amp;ports);</div><div class='add'>+	flow_rule_match_ip(flow-&gt;rule, &amp;ip);</div><div class='add'>+</div><div class='add'>+	layout = &amp;udf_tcpip4_layout;</div><div class='add'>+	/* We only use one UDF slice for now */</div><div class='add'>+	slice_num = bcm_sf2_get_slice_number(layout, 0);</div><div class='add'>+	if (slice_num == UDF_NUM_SLICES) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto out_err_flow_rule;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	num_udf = bcm_sf2_get_num_udf_slices(layout-&gt;udfs[slice_num].slices);</div><div class='add'>+</div><div class='add'>+	/* Apply the UDF layout for this filter */</div><div class='add'>+	bcm_sf2_cfp_udf_set(priv, layout, slice_num);</div><div class='add'>+</div><div class='add'>+	/* Apply to all packets received through this port */</div><div class='add'>+	core_writel(priv, BIT(port), CORE_CFP_DATA_PORT(7));</div><div class='add'>+</div><div class='add'>+	/* Source port map match */</div><div class='add'>+	core_writel(priv, 0xff, CORE_CFP_MASK_PORT(7));</div><div class='add'>+</div><div class='add'>+	/* S-Tag status		[31:30]</div><div class='add'>+	 * C-Tag status		[29:28]</div><div class='add'>+	 * L2 framing		[27:26]</div><div class='add'>+	 * L3 framing		[25:24]</div><div class='add'>+	 * IP ToS		[23:16]</div><div class='add'>+	 * IP proto		[15:08]</div><div class='add'>+	 * IP Fragm		[7]</div><div class='add'>+	 * Non 1st frag		[6]</div><div class='add'>+	 * IP Authen		[5]</div><div class='add'>+	 * TTL range		[4:3]</div><div class='add'>+	 * PPPoE session	[2]</div><div class='add'>+	 * Reserved		[1]</div><div class='add'>+	 * UDF_Valid[8]		[0]</div><div class='add'>+	 */</div><div class='add'>+	core_writel(priv, ip.key-&gt;tos &lt;&lt; IPTOS_SHIFT |</div><div class='add'>+		    ip_proto &lt;&lt; IPPROTO_SHIFT | ip_frag &lt;&lt; IP_FRAG_SHIFT |</div><div class='add'>+		    udf_upper_bits(num_udf),</div><div class='add'>+		    CORE_CFP_DATA_PORT(6));</div><div class='add'>+</div><div class='add'>+	/* Mask with the specific layout for IPv4 packets */</div><div class='add'>+	core_writel(priv, layout-&gt;udfs[slice_num].mask_value |</div><div class='add'>+		    udf_upper_bits(num_udf), CORE_CFP_MASK_PORT(6));</div><div class='add'>+</div><div class='add'>+	/* Program the match and the mask */</div><div class='add'>+	bcm_sf2_cfp_slice_ipv4(priv, ipv4.key, ports.key, vlan_tci,</div><div class='add'>+			       slice_num, num_udf, false);</div><div class='add'>+	bcm_sf2_cfp_slice_ipv4(priv, ipv4.mask, ports.mask, vlan_m_tci,</div><div class='add'>+			       SLICE_NUM_MASK, num_udf, true);</div><div class='add'>+</div><div class='add'>+	/* Insert into TCAM now */</div><div class='add'>+	bcm_sf2_cfp_rule_addr_set(priv, rule_index);</div><div class='add'>+</div><div class='add'>+	ret = bcm_sf2_cfp_op(priv, OP_SEL_WRITE | TCAM_SEL);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_err("TCAM entry at addr %d failed\n", rule_index);</div><div class='add'>+		goto out_err_flow_rule;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Insert into Action and policer RAMs now */</div><div class='add'>+	ret = bcm_sf2_cfp_act_pol_set(priv, rule_index, port, port_num,</div><div class='add'>+				      queue_num, true);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_err_flow_rule;</div><div class='add'>+</div><div class='add'>+	/* Turn on CFP for this rule now */</div><div class='add'>+	reg = core_readl(priv, CORE_CFP_CTL_REG);</div><div class='add'>+	reg |= BIT(port);</div><div class='add'>+	core_writel(priv, reg, CORE_CFP_CTL_REG);</div><div class='add'>+</div><div class='add'>+	/* Flag the rule as being used and return it */</div><div class='add'>+	set_bit(rule_index, priv-&gt;cfp.used);</div><div class='add'>+	set_bit(rule_index, priv-&gt;cfp.unique);</div><div class='add'>+	fs-&gt;location = rule_index;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_err_flow_rule:</div><div class='add'>+	ethtool_rx_flow_rule_destroy(flow);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bcm_sf2_cfp_slice_ipv6(struct bcm_sf2_priv *priv,</div><div class='add'>+				   const __be32 *ip6_addr, const __be16 port,</div><div class='add'>+				   const __be16 vlan_tci,</div><div class='add'>+				   unsigned int slice_num, u32 udf_bits,</div><div class='add'>+				   bool mask)</div><div class='add'>+{</div><div class='add'>+	u32 reg, tmp, val, offset;</div><div class='add'>+</div><div class='add'>+	/* UDF_Valid[7:0]	[31:24]</div><div class='add'>+	 * S-Tag		[23:8]</div><div class='add'>+	 * C-Tag		[7:0]</div><div class='add'>+	 */</div><div class='add'>+	reg = udf_bits &lt;&lt; 24 | be16_to_cpu(vlan_tci) &gt;&gt; 8;</div><div class='add'>+	if (mask)</div><div class='add'>+		core_writel(priv, reg, CORE_CFP_MASK_PORT(5));</div><div class='add'>+	else</div><div class='add'>+		core_writel(priv, reg, CORE_CFP_DATA_PORT(5));</div><div class='add'>+</div><div class='add'>+	/* C-Tag		[31:24]</div><div class='add'>+	 * UDF_n_B8		[23:8]	(port)</div><div class='add'>+	 * UDF_n_B7 (upper)	[7:0]	(addr[15:8])</div><div class='add'>+	 */</div><div class='add'>+	reg = be32_to_cpu(ip6_addr[3]);</div><div class='add'>+	val = (u32)be16_to_cpu(port) &lt;&lt; 8 | ((reg &gt;&gt; 8) &amp; 0xff);</div><div class='add'>+	val |= (u32)(be16_to_cpu(vlan_tci) &amp; 0xff) &lt;&lt; 24;</div><div class='add'>+	if (mask)</div><div class='add'>+		offset = CORE_CFP_MASK_PORT(4);</div><div class='add'>+	else</div><div class='add'>+		offset = CORE_CFP_DATA_PORT(4);</div><div class='add'>+	core_writel(priv, val, offset);</div><div class='add'>+</div><div class='add'>+	/* UDF_n_B7 (lower)	[31:24]	(addr[7:0])</div><div class='add'>+	 * UDF_n_B6		[23:8] (addr[31:16])</div><div class='add'>+	 * UDF_n_B5 (upper)	[7:0] (addr[47:40])</div><div class='add'>+	 */</div><div class='add'>+	tmp = be32_to_cpu(ip6_addr[2]);</div><div class='add'>+	val = (u32)(reg &amp; 0xff) &lt;&lt; 24 | (u32)(reg &gt;&gt; 16) &lt;&lt; 8 |</div><div class='add'>+	      ((tmp &gt;&gt; 8) &amp; 0xff);</div><div class='add'>+	if (mask)</div><div class='add'>+		offset = CORE_CFP_MASK_PORT(3);</div><div class='add'>+	else</div><div class='add'>+		offset = CORE_CFP_DATA_PORT(3);</div><div class='add'>+	core_writel(priv, val, offset);</div><div class='add'>+</div><div class='add'>+	/* UDF_n_B5 (lower)	[31:24] (addr[39:32])</div><div class='add'>+	 * UDF_n_B4		[23:8] (addr[63:48])</div><div class='add'>+	 * UDF_n_B3 (upper)	[7:0] (addr[79:72])</div><div class='add'>+	 */</div><div class='add'>+	reg = be32_to_cpu(ip6_addr[1]);</div><div class='add'>+	val = (u32)(tmp &amp; 0xff) &lt;&lt; 24 | (u32)(tmp &gt;&gt; 16) &lt;&lt; 8 |</div><div class='add'>+	      ((reg &gt;&gt; 8) &amp; 0xff);</div><div class='add'>+	if (mask)</div><div class='add'>+		offset = CORE_CFP_MASK_PORT(2);</div><div class='add'>+	else</div><div class='add'>+		offset = CORE_CFP_DATA_PORT(2);</div><div class='add'>+	core_writel(priv, val, offset);</div><div class='add'>+</div><div class='add'>+	/* UDF_n_B3 (lower)	[31:24] (addr[71:64])</div><div class='add'>+	 * UDF_n_B2		[23:8] (addr[95:80])</div><div class='add'>+	 * UDF_n_B1 (upper)	[7:0] (addr[111:104])</div><div class='add'>+	 */</div><div class='add'>+	tmp = be32_to_cpu(ip6_addr[0]);</div><div class='add'>+	val = (u32)(reg &amp; 0xff) &lt;&lt; 24 | (u32)(reg &gt;&gt; 16) &lt;&lt; 8 |</div><div class='add'>+	      ((tmp &gt;&gt; 8) &amp; 0xff);</div><div class='add'>+	if (mask)</div><div class='add'>+		offset = CORE_CFP_MASK_PORT(1);</div><div class='add'>+	else</div><div class='add'>+		offset = CORE_CFP_DATA_PORT(1);</div><div class='add'>+	core_writel(priv, val, offset);</div><div class='add'>+</div><div class='add'>+	/* UDF_n_B1 (lower)	[31:24] (addr[103:96])</div><div class='add'>+	 * UDF_n_B0		[23:8] (addr[127:112])</div><div class='add'>+	 * Reserved		[7:4]</div><div class='add'>+	 * Slice ID		[3:2]</div><div class='add'>+	 * Slice valid		[1:0]</div><div class='add'>+	 */</div><div class='add'>+	reg = (u32)(tmp &amp; 0xff) &lt;&lt; 24 | (u32)(tmp &gt;&gt; 16) &lt;&lt; 8 |</div><div class='add'>+	       SLICE_NUM(slice_num) | SLICE_VALID;</div><div class='add'>+	if (mask)</div><div class='add'>+		offset = CORE_CFP_MASK_PORT(0);</div><div class='add'>+	else</div><div class='add'>+		offset = CORE_CFP_DATA_PORT(0);</div><div class='add'>+	core_writel(priv, reg, offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct cfp_rule *bcm_sf2_cfp_rule_find(struct bcm_sf2_priv *priv,</div><div class='add'>+					      int port, u32 location)</div><div class='add'>+{</div><div class='add'>+	struct cfp_rule *rule;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(rule, &amp;priv-&gt;cfp.rules_list, next) {</div><div class='add'>+		if (rule-&gt;port == port &amp;&amp; rule-&gt;fs.location == location)</div><div class='add'>+			return rule;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bcm_sf2_cfp_rule_cmp(struct bcm_sf2_priv *priv, int port,</div><div class='add'>+				struct ethtool_rx_flow_spec *fs)</div><div class='add'>+{</div><div class='add'>+	struct cfp_rule *rule = NULL;</div><div class='add'>+	size_t fs_size = 0;</div><div class='add'>+	int ret = 1;</div><div class='add'>+</div><div class='add'>+	if (list_empty(&amp;priv-&gt;cfp.rules_list))</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(rule, &amp;priv-&gt;cfp.rules_list, next) {</div><div class='add'>+		ret = 1;</div><div class='add'>+		if (rule-&gt;port != port)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (rule-&gt;fs.flow_type != fs-&gt;flow_type ||</div><div class='add'>+		    rule-&gt;fs.ring_cookie != fs-&gt;ring_cookie ||</div><div class='add'>+		    rule-&gt;fs.h_ext.data[0] != fs-&gt;h_ext.data[0])</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		switch (fs-&gt;flow_type &amp; ~FLOW_EXT) {</div><div class='add'>+		case TCP_V6_FLOW:</div><div class='add'>+		case UDP_V6_FLOW:</div><div class='add'>+			fs_size = sizeof(struct ethtool_tcpip6_spec);</div><div class='add'>+			break;</div><div class='add'>+		case TCP_V4_FLOW:</div><div class='add'>+		case UDP_V4_FLOW:</div><div class='add'>+			fs_size = sizeof(struct ethtool_tcpip4_spec);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = memcmp(&amp;rule-&gt;fs.h_u, &amp;fs-&gt;h_u, fs_size);</div><div class='add'>+		ret |= memcmp(&amp;rule-&gt;fs.m_u, &amp;fs-&gt;m_u, fs_size);</div><div class='add'>+		/* Compare VLAN TCI values as well */</div><div class='add'>+		if (rule-&gt;fs.flow_type &amp; FLOW_EXT) {</div><div class='add'>+			ret |= rule-&gt;fs.h_ext.vlan_tci != fs-&gt;h_ext.vlan_tci;</div><div class='add'>+			ret |= rule-&gt;fs.m_ext.vlan_tci != fs-&gt;m_ext.vlan_tci;</div><div class='add'>+		}</div><div class='add'>+		if (ret == 0)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bcm_sf2_cfp_ipv6_rule_set(struct bcm_sf2_priv *priv, int port,</div><div class='add'>+				     unsigned int port_num,</div><div class='add'>+				     unsigned int queue_num,</div><div class='add'>+				     struct ethtool_rx_flow_spec *fs)</div><div class='add'>+{</div><div class='add'>+	__be16 vlan_tci = 0, vlan_m_tci = htons(0xffff);</div><div class='add'>+	struct ethtool_rx_flow_spec_input input = {};</div><div class='add'>+	unsigned int slice_num, rule_index[2];</div><div class='add'>+	const struct cfp_udf_layout *layout;</div><div class='add'>+	struct ethtool_rx_flow_rule *flow;</div><div class='add'>+	struct flow_match_ipv6_addrs ipv6;</div><div class='add'>+	struct flow_match_ports ports;</div><div class='add'>+	u8 ip_proto, ip_frag;</div><div class='add'>+	int ret = 0;</div><div class='add'>+	u8 num_udf;</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	switch (fs-&gt;flow_type &amp; ~FLOW_EXT) {</div><div class='add'>+	case TCP_V6_FLOW:</div><div class='add'>+		ip_proto = IPPROTO_TCP;</div><div class='add'>+		break;</div><div class='add'>+	case UDP_V6_FLOW:</div><div class='add'>+		ip_proto = IPPROTO_UDP;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ip_frag = !!(be32_to_cpu(fs-&gt;h_ext.data[0]) &amp; 1);</div><div class='add'>+</div><div class='add'>+	/* Extract VLAN TCI */</div><div class='add'>+	if (fs-&gt;flow_type &amp; FLOW_EXT) {</div><div class='add'>+		vlan_tci = fs-&gt;h_ext.vlan_tci;</div><div class='add'>+		vlan_m_tci = fs-&gt;m_ext.vlan_tci;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	layout = &amp;udf_tcpip6_layout;</div><div class='add'>+	slice_num = bcm_sf2_get_slice_number(layout, 0);</div><div class='add'>+	if (slice_num == UDF_NUM_SLICES)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	num_udf = bcm_sf2_get_num_udf_slices(layout-&gt;udfs[slice_num].slices);</div><div class='add'>+</div><div class='add'>+	/* Negotiate two indexes, one for the second half which we are chained</div><div class='add'>+	 * from, which is what we will return to user-space, and a second one</div><div class='add'>+	 * which is used to store its first half. That first half does not</div><div class='add'>+	 * allow any choice of placement, so it just needs to find the next</div><div class='add'>+	 * available bit. We return the second half as fs-&gt;location because</div><div class='add'>+	 * that helps with the rule lookup later on since the second half is</div><div class='add'>+	 * chained from its first half, we can easily identify IPv6 CFP rules</div><div class='add'>+	 * by looking whether they carry a CHAIN_ID.</div><div class='add'>+	 *</div><div class='add'>+	 * We also want the second half to have a lower rule_index than its</div><div class='add'>+	 * first half because the HW search is by incrementing addresses.</div><div class='add'>+	 */</div><div class='add'>+	if (fs-&gt;location == RX_CLS_LOC_ANY)</div><div class='add'>+		rule_index[1] = find_first_zero_bit(priv-&gt;cfp.used,</div><div class='add'>+						    priv-&gt;num_cfp_rules);</div><div class='add'>+	else</div><div class='add'>+		rule_index[1] = fs-&gt;location;</div><div class='add'>+	if (rule_index[1] &gt; bcm_sf2_cfp_rule_size(priv))</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+</div><div class='add'>+	/* Flag it as used (cleared on error path) such that we can immediately</div><div class='add'>+	 * obtain a second one to chain from.</div><div class='add'>+	 */</div><div class='add'>+	set_bit(rule_index[1], priv-&gt;cfp.used);</div><div class='add'>+</div><div class='add'>+	rule_index[0] = find_first_zero_bit(priv-&gt;cfp.used,</div><div class='add'>+					    priv-&gt;num_cfp_rules);</div><div class='add'>+	if (rule_index[0] &gt; bcm_sf2_cfp_rule_size(priv)) {</div><div class='add'>+		ret = -ENOSPC;</div><div class='add'>+		goto out_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	input.fs = fs;</div><div class='add'>+	flow = ethtool_rx_flow_rule_create(&amp;input);</div><div class='add'>+	if (IS_ERR(flow)) {</div><div class='add'>+		ret = PTR_ERR(flow);</div><div class='add'>+		goto out_err;</div><div class='add'>+	}</div><div class='add'>+	flow_rule_match_ipv6_addrs(flow-&gt;rule, &amp;ipv6);</div><div class='add'>+	flow_rule_match_ports(flow-&gt;rule, &amp;ports);</div><div class='add'>+</div><div class='add'>+	/* Apply the UDF layout for this filter */</div><div class='add'>+	bcm_sf2_cfp_udf_set(priv, layout, slice_num);</div><div class='add'>+</div><div class='add'>+	/* Apply to all packets received through this port */</div><div class='add'>+	core_writel(priv, BIT(port), CORE_CFP_DATA_PORT(7));</div><div class='add'>+</div><div class='add'>+	/* Source port map match */</div><div class='add'>+	core_writel(priv, 0xff, CORE_CFP_MASK_PORT(7));</div><div class='add'>+</div><div class='add'>+	/* S-Tag status		[31:30]</div><div class='add'>+	 * C-Tag status		[29:28]</div><div class='add'>+	 * L2 framing		[27:26]</div><div class='add'>+	 * L3 framing		[25:24]</div><div class='add'>+	 * IP ToS		[23:16]</div><div class='add'>+	 * IP proto		[15:08]</div><div class='add'>+	 * IP Fragm		[7]</div><div class='add'>+	 * Non 1st frag		[6]</div><div class='add'>+	 * IP Authen		[5]</div><div class='add'>+	 * TTL range		[4:3]</div><div class='add'>+	 * PPPoE session	[2]</div><div class='add'>+	 * Reserved		[1]</div><div class='add'>+	 * UDF_Valid[8]		[0]</div><div class='add'>+	 */</div><div class='add'>+	reg = 1 &lt;&lt; L3_FRAMING_SHIFT | ip_proto &lt;&lt; IPPROTO_SHIFT |</div><div class='add'>+		ip_frag &lt;&lt; IP_FRAG_SHIFT | udf_upper_bits(num_udf);</div><div class='add'>+	core_writel(priv, reg, CORE_CFP_DATA_PORT(6));</div><div class='add'>+</div><div class='add'>+	/* Mask with the specific layout for IPv6 packets including</div><div class='add'>+	 * UDF_Valid[8]</div><div class='add'>+	 */</div><div class='add'>+	reg = layout-&gt;udfs[slice_num].mask_value | udf_upper_bits(num_udf);</div><div class='add'>+	core_writel(priv, reg, CORE_CFP_MASK_PORT(6));</div><div class='add'>+</div><div class='add'>+	/* Slice the IPv6 source address and port */</div><div class='add'>+	bcm_sf2_cfp_slice_ipv6(priv, ipv6.key-&gt;src.in6_u.u6_addr32,</div><div class='add'>+			       ports.key-&gt;src, vlan_tci, slice_num,</div><div class='add'>+			       udf_lower_bits(num_udf), false);</div><div class='add'>+	bcm_sf2_cfp_slice_ipv6(priv, ipv6.mask-&gt;src.in6_u.u6_addr32,</div><div class='add'>+			       ports.mask-&gt;src, vlan_m_tci, SLICE_NUM_MASK,</div><div class='add'>+			       udf_lower_bits(num_udf), true);</div><div class='add'>+</div><div class='add'>+	/* Insert into TCAM now because we need to insert a second rule */</div><div class='add'>+	bcm_sf2_cfp_rule_addr_set(priv, rule_index[0]);</div><div class='add'>+</div><div class='add'>+	ret = bcm_sf2_cfp_op(priv, OP_SEL_WRITE | TCAM_SEL);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_err("TCAM entry at addr %d failed\n", rule_index[0]);</div><div class='add'>+		goto out_err_flow_rule;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Insert into Action and policer RAMs now */</div><div class='add'>+	ret = bcm_sf2_cfp_act_pol_set(priv, rule_index[0], port, port_num,</div><div class='add'>+				      queue_num, false);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_err_flow_rule;</div><div class='add'>+</div><div class='add'>+	/* Now deal with the second slice to chain this rule */</div><div class='add'>+	slice_num = bcm_sf2_get_slice_number(layout, slice_num + 1);</div><div class='add'>+	if (slice_num == UDF_NUM_SLICES) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto out_err_flow_rule;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	num_udf = bcm_sf2_get_num_udf_slices(layout-&gt;udfs[slice_num].slices);</div><div class='add'>+</div><div class='add'>+	/* Apply the UDF layout for this filter */</div><div class='add'>+	bcm_sf2_cfp_udf_set(priv, layout, slice_num);</div><div class='add'>+</div><div class='add'>+	/* Chained rule, source port match is coming from the rule we are</div><div class='add'>+	 * chained from.</div><div class='add'>+	 */</div><div class='add'>+	core_writel(priv, 0, CORE_CFP_DATA_PORT(7));</div><div class='add'>+	core_writel(priv, 0, CORE_CFP_MASK_PORT(7));</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * CHAIN ID		[31:24] chain to previous slice</div><div class='add'>+	 * Reserved		[23:20]</div><div class='add'>+	 * UDF_Valid[11:8]	[19:16]</div><div class='add'>+	 * UDF_Valid[7:0]	[15:8]</div><div class='add'>+	 * UDF_n_D11		[7:0]</div><div class='add'>+	 */</div><div class='add'>+	reg = rule_index[0] &lt;&lt; 24 | udf_upper_bits(num_udf) &lt;&lt; 16 |</div><div class='add'>+		udf_lower_bits(num_udf) &lt;&lt; 8;</div><div class='add'>+	core_writel(priv, reg, CORE_CFP_DATA_PORT(6));</div><div class='add'>+</div><div class='add'>+	/* Mask all except chain ID, UDF Valid[8] and UDF Valid[7:0] */</div><div class='add'>+	reg = XCESS_ADDR_MASK &lt;&lt; 24 | udf_upper_bits(num_udf) &lt;&lt; 16 |</div><div class='add'>+		udf_lower_bits(num_udf) &lt;&lt; 8;</div><div class='add'>+	core_writel(priv, reg, CORE_CFP_MASK_PORT(6));</div><div class='add'>+</div><div class='add'>+	bcm_sf2_cfp_slice_ipv6(priv, ipv6.key-&gt;dst.in6_u.u6_addr32,</div><div class='add'>+			       ports.key-&gt;dst, 0, slice_num,</div><div class='add'>+			       0, false);</div><div class='add'>+	bcm_sf2_cfp_slice_ipv6(priv, ipv6.mask-&gt;dst.in6_u.u6_addr32,</div><div class='add'>+			       ports.key-&gt;dst, 0, SLICE_NUM_MASK,</div><div class='add'>+			       0, true);</div><div class='add'>+</div><div class='add'>+	/* Insert into TCAM now */</div><div class='add'>+	bcm_sf2_cfp_rule_addr_set(priv, rule_index[1]);</div><div class='add'>+</div><div class='add'>+	ret = bcm_sf2_cfp_op(priv, OP_SEL_WRITE | TCAM_SEL);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pr_err("TCAM entry at addr %d failed\n", rule_index[1]);</div><div class='add'>+		goto out_err_flow_rule;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Insert into Action and policer RAMs now, set chain ID to</div><div class='add'>+	 * the one we are chained to</div><div class='add'>+	 */</div><div class='add'>+	ret = bcm_sf2_cfp_act_pol_set(priv, rule_index[1], port, port_num,</div><div class='add'>+				      queue_num, true);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_err_flow_rule;</div><div class='add'>+</div><div class='add'>+	/* Turn on CFP for this rule now */</div><div class='add'>+	reg = core_readl(priv, CORE_CFP_CTL_REG);</div><div class='add'>+	reg |= BIT(port);</div><div class='add'>+	core_writel(priv, reg, CORE_CFP_CTL_REG);</div><div class='add'>+</div><div class='add'>+	/* Flag the second half rule as being used now, return it as the</div><div class='add'>+	 * location, and flag it as unique while dumping rules</div><div class='add'>+	 */</div><div class='add'>+	set_bit(rule_index[0], priv-&gt;cfp.used);</div><div class='add'>+	set_bit(rule_index[1], priv-&gt;cfp.unique);</div><div class='add'>+	fs-&gt;location = rule_index[1];</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+</div><div class='add'>+out_err_flow_rule:</div><div class='add'>+	ethtool_rx_flow_rule_destroy(flow);</div><div class='add'>+out_err:</div><div class='add'>+	clear_bit(rule_index[1], priv-&gt;cfp.used);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bcm_sf2_cfp_rule_insert(struct dsa_switch *ds, int port,</div><div class='add'>+				   struct ethtool_rx_flow_spec *fs)</div><div class='add'>+{</div><div class='add'>+	struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);</div><div class='add'>+	s8 cpu_port = dsa_to_port(ds, port)-&gt;cpu_dp-&gt;index;</div><div class='add'>+	__u64 ring_cookie = fs-&gt;ring_cookie;</div><div class='add'>+	struct switchdev_obj_port_vlan vlan;</div><div class='add'>+	unsigned int queue_num, port_num;</div><div class='add'>+	u16 vid;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* This rule is a Wake-on-LAN filter and we must specifically</div><div class='add'>+	 * target the CPU port in order for it to be working.</div><div class='add'>+	 */</div><div class='add'>+	if (ring_cookie == RX_CLS_FLOW_WAKE)</div><div class='add'>+		ring_cookie = cpu_port * SF2_NUM_EGRESS_QUEUES;</div><div class='add'>+</div><div class='add'>+	/* We do not support discarding packets, check that the</div><div class='add'>+	 * destination port is enabled and that we are within the</div><div class='add'>+	 * number of ports supported by the switch</div><div class='add'>+	 */</div><div class='add'>+	port_num = ring_cookie / SF2_NUM_EGRESS_QUEUES;</div><div class='add'>+</div><div class='add'>+	if (ring_cookie == RX_CLS_FLOW_DISC ||</div><div class='add'>+	    !(dsa_is_user_port(ds, port_num) ||</div><div class='add'>+	      dsa_is_cpu_port(ds, port_num)) ||</div><div class='add'>+	    port_num &gt;= priv-&gt;hw_params.num_ports)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* If the rule is matching a particular VLAN, make sure that we honor</div><div class='add'>+	 * the matching and have it tagged or untagged on the destination port,</div><div class='add'>+	 * we do this on egress with a VLAN entry. The egress tagging attribute</div><div class='add'>+	 * is expected to be provided in h_ext.data[1] bit 0. A 1 means untagged,</div><div class='add'>+	 * a 0 means tagged.</div><div class='add'>+	 */</div><div class='add'>+	if (fs-&gt;flow_type &amp; FLOW_EXT) {</div><div class='add'>+		/* We cannot support matching multiple VLAN IDs yet */</div><div class='add'>+		if ((be16_to_cpu(fs-&gt;m_ext.vlan_tci) &amp; VLAN_VID_MASK) !=</div><div class='add'>+		    VLAN_VID_MASK)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		vid = be16_to_cpu(fs-&gt;h_ext.vlan_tci) &amp; VLAN_VID_MASK;</div><div class='add'>+		vlan.vid = vid;</div><div class='add'>+		if (be32_to_cpu(fs-&gt;h_ext.data[1]) &amp; 1)</div><div class='add'>+			vlan.flags = BRIDGE_VLAN_INFO_UNTAGGED;</div><div class='add'>+		else</div><div class='add'>+			vlan.flags = 0;</div><div class='add'>+</div><div class='add'>+		ret = ds-&gt;ops-&gt;port_vlan_add(ds, port_num, &amp;vlan, NULL);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * We have a small oddity where Port 6 just does not have a</div><div class='add'>+	 * valid bit here (so we substract by one).</div><div class='add'>+	 */</div><div class='add'>+	queue_num = ring_cookie % SF2_NUM_EGRESS_QUEUES;</div><div class='add'>+	if (port_num &gt;= 7)</div><div class='add'>+		port_num -= 1;</div><div class='add'>+</div><div class='add'>+	switch (fs-&gt;flow_type &amp; ~FLOW_EXT) {</div><div class='add'>+	case TCP_V4_FLOW:</div><div class='add'>+	case UDP_V4_FLOW:</div><div class='add'>+		ret = bcm_sf2_cfp_ipv4_rule_set(priv, port, port_num,</div><div class='add'>+						queue_num, fs);</div><div class='add'>+		break;</div><div class='add'>+	case TCP_V6_FLOW:</div><div class='add'>+	case UDP_V6_FLOW:</div><div class='add'>+		ret = bcm_sf2_cfp_ipv6_rule_set(priv, port, port_num,</div><div class='add'>+						queue_num, fs);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bcm_sf2_cfp_rule_set(struct dsa_switch *ds, int port,</div><div class='add'>+				struct ethtool_rx_flow_spec *fs)</div><div class='add'>+{</div><div class='add'>+	struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);</div><div class='add'>+	struct cfp_rule *rule = NULL;</div><div class='add'>+	int ret = -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Check for unsupported extensions */</div><div class='add'>+	if (fs-&gt;flow_type &amp; FLOW_MAC_EXT)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (fs-&gt;location != RX_CLS_LOC_ANY &amp;&amp;</div><div class='add'>+	    fs-&gt;location &gt; bcm_sf2_cfp_rule_size(priv))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if ((fs-&gt;flow_type &amp; FLOW_EXT) &amp;&amp;</div><div class='add'>+	    !(ds-&gt;ops-&gt;port_vlan_add || ds-&gt;ops-&gt;port_vlan_del))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (fs-&gt;location != RX_CLS_LOC_ANY &amp;&amp;</div><div class='add'>+	    test_bit(fs-&gt;location, priv-&gt;cfp.used))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	ret = bcm_sf2_cfp_rule_cmp(priv, port, fs);</div><div class='add'>+	if (ret == 0)</div><div class='add'>+		return -EEXIST;</div><div class='add'>+</div><div class='add'>+	rule = kzalloc(sizeof(*rule), GFP_KERNEL);</div><div class='add'>+	if (!rule)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ret = bcm_sf2_cfp_rule_insert(ds, port, fs);</div><div class='add'>+	if (ret) {</div><div class='add'>+		kfree(rule);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rule-&gt;port = port;</div><div class='add'>+	memcpy(&amp;rule-&gt;fs, fs, sizeof(*fs));</div><div class='add'>+	list_add_tail(&amp;rule-&gt;next, &amp;priv-&gt;cfp.rules_list);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bcm_sf2_cfp_rule_del_one(struct bcm_sf2_priv *priv, int port,</div><div class='add'>+				    u32 loc, u32 *next_loc)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	/* Indicate which rule we want to read */</div><div class='add'>+	bcm_sf2_cfp_rule_addr_set(priv, loc);</div><div class='add'>+</div><div class='add'>+	ret =  bcm_sf2_cfp_op(priv, OP_SEL_READ | TCAM_SEL);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Check if this is possibly an IPv6 rule that would</div><div class='add'>+	 * indicate we need to delete its companion rule</div><div class='add'>+	 * as well</div><div class='add'>+	 */</div><div class='add'>+	reg = core_readl(priv, CORE_CFP_DATA_PORT(6));</div><div class='add'>+	if (next_loc)</div><div class='add'>+		*next_loc = (reg &gt;&gt; 24) &amp; CHAIN_ID_MASK;</div><div class='add'>+</div><div class='add'>+	/* Clear its valid bits */</div><div class='add'>+	reg = core_readl(priv, CORE_CFP_DATA_PORT(0));</div><div class='add'>+	reg &amp;= ~SLICE_VALID;</div><div class='add'>+	core_writel(priv, reg, CORE_CFP_DATA_PORT(0));</div><div class='add'>+</div><div class='add'>+	/* Write back this entry into the TCAM now */</div><div class='add'>+	ret = bcm_sf2_cfp_op(priv, OP_SEL_WRITE | TCAM_SEL);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	clear_bit(loc, priv-&gt;cfp.used);</div><div class='add'>+	clear_bit(loc, priv-&gt;cfp.unique);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bcm_sf2_cfp_rule_remove(struct bcm_sf2_priv *priv, int port,</div><div class='add'>+				   u32 loc)</div><div class='add'>+{</div><div class='add'>+	u32 next_loc = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = bcm_sf2_cfp_rule_del_one(priv, port, loc, &amp;next_loc);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* If this was an IPv6 rule, delete is companion rule too */</div><div class='add'>+	if (next_loc)</div><div class='add'>+		ret = bcm_sf2_cfp_rule_del_one(priv, port, next_loc, NULL);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bcm_sf2_cfp_rule_del(struct bcm_sf2_priv *priv, int port, u32 loc)</div><div class='add'>+{</div><div class='add'>+	struct cfp_rule *rule;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (loc &gt; bcm_sf2_cfp_rule_size(priv))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Refuse deleting unused rules, and those that are not unique since</div><div class='add'>+	 * that could leave IPv6 rules with one of the chained rule in the</div><div class='add'>+	 * table.</div><div class='add'>+	 */</div><div class='add'>+	if (!test_bit(loc, priv-&gt;cfp.unique) || loc == 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	rule = bcm_sf2_cfp_rule_find(priv, port, loc);</div><div class='add'>+	if (!rule)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = bcm_sf2_cfp_rule_remove(priv, port, loc);</div><div class='add'>+</div><div class='add'>+	list_del(&amp;rule-&gt;next);</div><div class='add'>+	kfree(rule);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void bcm_sf2_invert_masks(struct ethtool_rx_flow_spec *flow)</div><div class='add'>+{</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; sizeof(flow-&gt;m_u); i++)</div><div class='add'>+		flow-&gt;m_u.hdata[i] ^= 0xff;</div><div class='add'>+</div><div class='add'>+	flow-&gt;m_ext.vlan_etype ^= cpu_to_be16(~0);</div><div class='add'>+	flow-&gt;m_ext.vlan_tci ^= cpu_to_be16(~0);</div><div class='add'>+	flow-&gt;m_ext.data[0] ^= cpu_to_be32(~0);</div><div class='add'>+	flow-&gt;m_ext.data[1] ^= cpu_to_be32(~0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int bcm_sf2_cfp_rule_get(struct bcm_sf2_priv *priv, int port,</div><div class='add'>+				struct ethtool_rxnfc *nfc)</div><div class='add'>+{</div><div class='add'>+	struct cfp_rule *rule;</div><div class='add'>+</div><div class='add'>+	rule = bcm_sf2_cfp_rule_find(priv, port, nfc-&gt;fs.location);</div><div class='add'>+	if (!rule)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;nfc-&gt;fs, &amp;rule-&gt;fs, sizeof(rule-&gt;fs));</div><div class='add'>+</div><div class='add'>+	bcm_sf2_invert_masks(&amp;nfc-&gt;fs);</div><div class='add'>+</div><div class='add'>+	/* Put the TCAM size here */</div><div class='add'>+	nfc-&gt;data = bcm_sf2_cfp_rule_size(priv);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* We implement the search doing a TCAM search operation */</div><div class='add'>+static int bcm_sf2_cfp_rule_get_all(struct bcm_sf2_priv *priv,</div><div class='add'>+				    int port, struct ethtool_rxnfc *nfc,</div><div class='add'>+				    u32 *rule_locs)</div><div class='add'>+{</div><div class='add'>+	unsigned int index = 1, rules_cnt = 0;</div><div class='add'>+</div><div class='add'>+	for_each_set_bit_from(index, priv-&gt;cfp.unique, priv-&gt;num_cfp_rules) {</div><div class='add'>+		rule_locs[rules_cnt] = index;</div><div class='add'>+		rules_cnt++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Put the TCAM size here */</div><div class='add'>+	nfc-&gt;data = bcm_sf2_cfp_rule_size(priv);</div><div class='add'>+	nfc-&gt;rule_cnt = rules_cnt;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bcm_sf2_get_rxnfc(struct dsa_switch *ds, int port,</div><div class='add'>+		      struct ethtool_rxnfc *nfc, u32 *rule_locs)</div><div class='add'>+{</div><div class='add'>+	struct net_device *p = dsa_port_to_conduit(dsa_to_port(ds, port));</div><div class='add'>+	struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;cfp.lock);</div><div class='add'>+</div><div class='add'>+	switch (nfc-&gt;cmd) {</div><div class='add'>+	case ETHTOOL_GRXCLSRLCNT:</div><div class='add'>+		/* Subtract the default, unusable rule */</div><div class='add'>+		nfc-&gt;rule_cnt = bitmap_weight(priv-&gt;cfp.unique,</div><div class='add'>+					      priv-&gt;num_cfp_rules) - 1;</div><div class='add'>+		/* We support specifying rule locations */</div><div class='add'>+		nfc-&gt;data |= RX_CLS_LOC_SPECIAL;</div><div class='add'>+		break;</div><div class='add'>+	case ETHTOOL_GRXCLSRULE:</div><div class='add'>+		ret = bcm_sf2_cfp_rule_get(priv, port, nfc);</div><div class='add'>+		break;</div><div class='add'>+	case ETHTOOL_GRXCLSRLALL:</div><div class='add'>+		ret = bcm_sf2_cfp_rule_get_all(priv, port, nfc, rule_locs);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EOPNOTSUPP;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;cfp.lock);</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Pass up the commands to the attached master network device */</div><div class='add'>+	if (p-&gt;ethtool_ops-&gt;get_rxnfc) {</div><div class='add'>+		ret = p-&gt;ethtool_ops-&gt;get_rxnfc(p, nfc, rule_locs);</div><div class='add'>+		if (ret == -EOPNOTSUPP)</div><div class='add'>+			ret = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bcm_sf2_set_rxnfc(struct dsa_switch *ds, int port,</div><div class='add'>+		      struct ethtool_rxnfc *nfc)</div><div class='add'>+{</div><div class='add'>+	struct net_device *p = dsa_port_to_conduit(dsa_to_port(ds, port));</div><div class='add'>+	struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;cfp.lock);</div><div class='add'>+</div><div class='add'>+	switch (nfc-&gt;cmd) {</div><div class='add'>+	case ETHTOOL_SRXCLSRLINS:</div><div class='add'>+		ret = bcm_sf2_cfp_rule_set(ds, port, &amp;nfc-&gt;fs);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case ETHTOOL_SRXCLSRLDEL:</div><div class='add'>+		ret = bcm_sf2_cfp_rule_del(priv, port, nfc-&gt;fs.location);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EOPNOTSUPP;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;cfp.lock);</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Pass up the commands to the attached master network device.</div><div class='add'>+	 * This can fail, so rollback the operation if we need to.</div><div class='add'>+	 */</div><div class='add'>+	if (p-&gt;ethtool_ops-&gt;set_rxnfc) {</div><div class='add'>+		ret = p-&gt;ethtool_ops-&gt;set_rxnfc(p, nfc);</div><div class='add'>+		if (ret &amp;&amp; ret != -EOPNOTSUPP) {</div><div class='add'>+			mutex_lock(&amp;priv-&gt;cfp.lock);</div><div class='add'>+			bcm_sf2_cfp_rule_del(priv, port, nfc-&gt;fs.location);</div><div class='add'>+			mutex_unlock(&amp;priv-&gt;cfp.lock);</div><div class='add'>+		} else {</div><div class='add'>+			ret = 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bcm_sf2_cfp_rst(struct bcm_sf2_priv *priv)</div><div class='add'>+{</div><div class='add'>+	unsigned int timeout = 1000;</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	reg = core_readl(priv, CORE_CFP_ACC);</div><div class='add'>+	reg |= TCAM_RESET;</div><div class='add'>+	core_writel(priv, reg, CORE_CFP_ACC);</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		reg = core_readl(priv, CORE_CFP_ACC);</div><div class='add'>+		if (!(reg &amp; TCAM_RESET))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		cpu_relax();</div><div class='add'>+	} while (timeout--);</div><div class='add'>+</div><div class='add'>+	if (!timeout)</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void bcm_sf2_cfp_exit(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);</div><div class='add'>+	struct cfp_rule *rule, *n;</div><div class='add'>+</div><div class='add'>+	if (list_empty(&amp;priv-&gt;cfp.rules_list))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_safe_reverse(rule, n, &amp;priv-&gt;cfp.rules_list, next)</div><div class='add'>+		bcm_sf2_cfp_rule_del(priv, rule-&gt;port, rule-&gt;fs.location);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bcm_sf2_cfp_resume(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);</div><div class='add'>+	struct cfp_rule *rule;</div><div class='add'>+	int ret = 0;</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	if (list_empty(&amp;priv-&gt;cfp.rules_list))</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	reg = core_readl(priv, CORE_CFP_CTL_REG);</div><div class='add'>+	reg &amp;= ~CFP_EN_MAP_MASK;</div><div class='add'>+	core_writel(priv, reg, CORE_CFP_CTL_REG);</div><div class='add'>+</div><div class='add'>+	ret = bcm_sf2_cfp_rst(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(rule, &amp;priv-&gt;cfp.rules_list, next) {</div><div class='add'>+		ret = bcm_sf2_cfp_rule_remove(priv, rule-&gt;port,</div><div class='add'>+					      rule-&gt;fs.location);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(ds-&gt;dev, "failed to remove rule\n");</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = bcm_sf2_cfp_rule_insert(ds, rule-&gt;port, &amp;rule-&gt;fs);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(ds-&gt;dev, "failed to restore rule\n");</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct bcm_sf2_cfp_stat {</div><div class='add'>+	unsigned int offset;</div><div class='add'>+	unsigned int ram_loc;</div><div class='add'>+	const char *name;</div><div class='add'>+} bcm_sf2_cfp_stats[] = {</div><div class='add'>+	{</div><div class='add'>+		.offset = CORE_STAT_GREEN_CNTR,</div><div class='add'>+		.ram_loc = GREEN_STAT_RAM,</div><div class='add'>+		.name = "Green"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.offset = CORE_STAT_YELLOW_CNTR,</div><div class='add'>+		.ram_loc = YELLOW_STAT_RAM,</div><div class='add'>+		.name = "Yellow"</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.offset = CORE_STAT_RED_CNTR,</div><div class='add'>+		.ram_loc = RED_STAT_RAM,</div><div class='add'>+		.name = "Red"</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void bcm_sf2_cfp_get_strings(struct dsa_switch *ds, int port, u32 stringset,</div><div class='add'>+			     uint8_t **data)</div><div class='add'>+{</div><div class='add'>+	struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);</div><div class='add'>+	unsigned int i, j;</div><div class='add'>+</div><div class='add'>+	if (stringset != ETH_SS_STATS)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 1; i &lt; priv-&gt;num_cfp_rules; i++)</div><div class='add'>+		for (j = 0; j &lt; ARRAY_SIZE(bcm_sf2_cfp_stats); j++)</div><div class='add'>+			ethtool_sprintf(data, "CFP%03d_%sCntr", i,</div><div class='add'>+					bcm_sf2_cfp_stats[j].name);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void bcm_sf2_cfp_get_ethtool_stats(struct dsa_switch *ds, int port,</div><div class='add'>+				   uint64_t *data)</div><div class='add'>+{</div><div class='add'>+	struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);</div><div class='add'>+	unsigned int s = ARRAY_SIZE(bcm_sf2_cfp_stats);</div><div class='add'>+	const struct bcm_sf2_cfp_stat *stat;</div><div class='add'>+	unsigned int i, j, iter;</div><div class='add'>+	struct cfp_rule *rule;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;cfp.lock);</div><div class='add'>+	for (i = 1; i &lt; priv-&gt;num_cfp_rules; i++) {</div><div class='add'>+		rule = bcm_sf2_cfp_rule_find(priv, port, i);</div><div class='add'>+		if (!rule)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		for (j = 0; j &lt; s; j++) {</div><div class='add'>+			stat = &amp;bcm_sf2_cfp_stats[j];</div><div class='add'>+</div><div class='add'>+			bcm_sf2_cfp_rule_addr_set(priv, i);</div><div class='add'>+			ret = bcm_sf2_cfp_op(priv, stat-&gt;ram_loc | OP_SEL_READ);</div><div class='add'>+			if (ret)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			iter = (i - 1) * s + j;</div><div class='add'>+			data[iter] = core_readl(priv, stat-&gt;offset);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;cfp.lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int bcm_sf2_cfp_get_sset_count(struct dsa_switch *ds, int port, int sset)</div><div class='add'>+{</div><div class='add'>+	struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);</div><div class='add'>+</div><div class='add'>+	if (sset != ETH_SS_STATS)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* 3 counters per CFP rules */</div><div class='add'>+	return (priv-&gt;num_cfp_rules - 1) * ARRAY_SIZE(bcm_sf2_cfp_stats);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/dsa/bcm_sf2_regs.h b/drivers/net/dsa/bcm_sf2_regs.h<br/>index fa4e6e78c9ea..da0dedbd6555 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/bcm_sf2_regs.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/bcm_sf2_regs.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/bcm_sf2_regs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/bcm_sf2_regs.h</a></div><div class='hunk'>@@ -1,33 +1,49 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='ctx'> /*</div><div class='ctx'>  * Broadcom Starfighter 2 switch register defines</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 2014, Broadcom Corporation</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='ctx'>  */</div><div class='ctx'> #ifndef __BCM_SF2_REGS_H</div><div class='ctx'> #define __BCM_SF2_REGS_H</div><div class='ctx'> </div><div class='ctx'> /* Register set relative to 'REG' */</div><div class='del'>-#define REG_SWITCH_CNTRL		0x00</div><div class='del'>-#define  MDIO_MASTER_SEL		(1 &lt;&lt; 0)</div><div class='ctx'> </div><div class='del'>-#define REG_SWITCH_STATUS		0x04</div><div class='del'>-#define REG_DIR_DATA_WRITE		0x08</div><div class='del'>-#define REG_DIR_DATA_READ		0x0C</div><div class='add'>+enum bcm_sf2_reg_offs {</div><div class='add'>+	REG_SWITCH_CNTRL = 0,</div><div class='add'>+	REG_SWITCH_STATUS,</div><div class='add'>+	REG_DIR_DATA_WRITE,</div><div class='add'>+	REG_DIR_DATA_READ,</div><div class='add'>+	REG_SWITCH_REVISION,</div><div class='add'>+	REG_PHY_REVISION,</div><div class='add'>+	REG_SPHY_CNTRL,</div><div class='add'>+	REG_CROSSBAR,</div><div class='add'>+	REG_RGMII_0_CNTRL,</div><div class='add'>+	REG_RGMII_1_CNTRL,</div><div class='add'>+	REG_RGMII_2_CNTRL,</div><div class='add'>+	REG_RGMII_11_CNTRL,</div><div class='add'>+	REG_LED_0_CNTRL,</div><div class='add'>+	REG_LED_1_CNTRL,</div><div class='add'>+	REG_LED_2_CNTRL,</div><div class='add'>+	REG_LED_3_CNTRL,</div><div class='add'>+	REG_LED_4_CNTRL,</div><div class='add'>+	REG_LED_5_CNTRL,</div><div class='add'>+	REG_LED_AGGREGATE_CTRL,</div><div class='add'>+	REG_SWITCH_REG_MAX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Relative to REG_SWITCH_CNTRL */</div><div class='add'>+#define  MDIO_MASTER_SEL		(1 &lt;&lt; 0)</div><div class='ctx'> </div><div class='del'>-#define REG_SWITCH_REVISION		0x18</div><div class='add'>+/* Relative to REG_SWITCH_REVISION */</div><div class='ctx'> #define  SF2_REV_MASK			0xffff</div><div class='ctx'> #define  SWITCH_TOP_REV_SHIFT		16</div><div class='ctx'> #define  SWITCH_TOP_REV_MASK		0xffff</div><div class='ctx'> </div><div class='del'>-#define REG_PHY_REVISION		0x1C</div><div class='add'>+/* Relative to REG_PHY_REVISION */</div><div class='ctx'> #define  PHY_REVISION_MASK		0xffff</div><div class='ctx'> </div><div class='del'>-#define REG_SPHY_CNTRL			0x2C</div><div class='add'>+/* Relative to REG_SPHY_CNTRL */</div><div class='ctx'> #define  IDDQ_BIAS			(1 &lt;&lt; 0)</div><div class='ctx'> #define  EXT_PWR_DOWN			(1 &lt;&lt; 1)</div><div class='ctx'> #define  FORCE_DLL_EN			(1 &lt;&lt; 2)</div><div class='hunk'>@@ -37,13 +53,70 @@</div><div class='ctx'> #define  PHY_PHYAD_SHIFT		8</div><div class='ctx'> #define  PHY_PHYAD_MASK			0x1F</div><div class='ctx'> </div><div class='del'>-#define REG_RGMII_0_BASE		0x34</div><div class='del'>-#define REG_RGMII_CNTRL			0x00</div><div class='del'>-#define REG_RGMII_IB_STATUS		0x04</div><div class='del'>-#define REG_RGMII_RX_CLOCK_DELAY_CNTRL	0x08</div><div class='del'>-#define REG_RGMII_CNTRL_SIZE		0x0C</div><div class='del'>-#define REG_RGMII_CNTRL_P(x)		(REG_RGMII_0_BASE + \</div><div class='del'>-					((x) * REG_RGMII_CNTRL_SIZE))</div><div class='add'>+/* Relative to REG_CROSSBAR */</div><div class='add'>+#define CROSSBAR_BCM4908_INT_P7		0</div><div class='add'>+#define CROSSBAR_BCM4908_INT_RUNNER	1</div><div class='add'>+#define CROSSBAR_BCM4908_EXT_SERDES	0</div><div class='add'>+#define CROSSBAR_BCM4908_EXT_GPHY4	1</div><div class='add'>+#define CROSSBAR_BCM4908_EXT_RGMII	2</div><div class='add'>+</div><div class='add'>+/* Relative to REG_LED_*_CNTRL (BCM7278, BCM7445) */</div><div class='add'>+#define  LED_CNTRL_NO_LINK_ENCODE_SHIFT		0</div><div class='add'>+#define  LED_CNTRL_M10_ENCODE_SHIFT		2</div><div class='add'>+#define  LED_CNTRL_M100_ENCODE_SHIFT		4</div><div class='add'>+#define  LED_CNTRL_M1000_ENCODE_SHIFT		6</div><div class='add'>+#define  LED_CNTRL_SEL_NO_LINK_ENCODE_SHIFT	8</div><div class='add'>+#define  LED_CNTRL_SEL_10M_ENCODE_SHIFT		10</div><div class='add'>+#define  LED_CNTRL_SEL_100M_ENCODE_SHIFT	12</div><div class='add'>+#define  LED_CNTRL_SEL_1000M_ENCODE_SHIFT	14</div><div class='add'>+#define  LED_CNTRL_RX_DV_EN			(1 &lt;&lt; 16)</div><div class='add'>+#define  LED_CNTRL_TX_EN_EN			(1 &lt;&lt; 17)</div><div class='add'>+#define  LED_CNTRL_SPDLNK_LED0_ACT_SEL_SHIFT	18</div><div class='add'>+#define  LED_CNTRL_SPDLNK_LED1_ACT_SEL_SHIFT	20</div><div class='add'>+#define  LED_CNTRL_ACT_LED_ACT_SEL_SHIFT	22</div><div class='add'>+#define  LED_CNTRL_SPDLNK_SRC_SEL		(1 &lt;&lt; 24)</div><div class='add'>+#define  LED_CNTRL_SPDLNK_LED0_ACT_POL_SEL	(1 &lt;&lt; 25)</div><div class='add'>+#define  LED_CNTRL_SPDLNK_LED1_ACT_POL_SEL	(1 &lt;&lt; 26)</div><div class='add'>+#define  LED_CNTRL_ACT_LED_POL_SEL		(1 &lt;&lt; 27)</div><div class='add'>+#define  LED_CNTRL_MASK				0x3</div><div class='add'>+</div><div class='add'>+/* Register relative to REG_LED_*_CNTRL (BCM4908) */</div><div class='add'>+#define REG_LED_CTRL				0x0</div><div class='add'>+#define  LED_CTRL_RX_ACT_EN			0x00000001</div><div class='add'>+#define  LED_CTRL_TX_ACT_EN			0x00000002</div><div class='add'>+#define  LED_CTRL_SPDLNK_LED0_ACT_SEL		0x00000004</div><div class='add'>+#define  LED_CTRL_SPDLNK_LED1_ACT_SEL		0x00000008</div><div class='add'>+#define  LED_CTRL_SPDLNK_LED2_ACT_SEL		0x00000010</div><div class='add'>+#define  LED_CTRL_ACT_LED_ACT_SEL		0x00000020</div><div class='add'>+#define  LED_CTRL_SPDLNK_LED0_ACT_POL_SEL	0x00000040</div><div class='add'>+#define  LED_CTRL_SPDLNK_LED1_ACT_POL_SEL	0x00000080</div><div class='add'>+#define  LED_CTRL_SPDLNK_LED2_ACT_POL_SEL	0x00000100</div><div class='add'>+#define  LED_CTRL_ACT_LED_POL_SEL		0x00000200</div><div class='add'>+#define  LED_CTRL_LED_SPD_OVRD			0x00001c00</div><div class='add'>+#define  LED_CTRL_LNK_STATUS_OVRD		0x00002000</div><div class='add'>+#define  LED_CTRL_SPD_OVRD_EN			0x00004000</div><div class='add'>+#define  LED_CTRL_LNK_OVRD_EN			0x00008000</div><div class='add'>+</div><div class='add'>+/* Register relative to REG_LED_*_CNTRL (BCM4908) */</div><div class='add'>+#define REG_LED_LINK_SPEED_ENC_SEL		0x4</div><div class='add'>+#define  LED_LINK_SPEED_ENC_SEL_NO_LINK_SHIFT	0</div><div class='add'>+#define  LED_LINK_SPEED_ENC_SEL_10M_SHIFT	3</div><div class='add'>+#define  LED_LINK_SPEED_ENC_SEL_100M_SHIFT	6</div><div class='add'>+#define  LED_LINK_SPEED_ENC_SEL_1000M_SHIFT	9</div><div class='add'>+#define  LED_LINK_SPEED_ENC_SEL_2500M_SHIFT	12</div><div class='add'>+#define  LED_LINK_SPEED_ENC_SEL_10G_SHIFT	15</div><div class='add'>+#define  LED_LINK_SPEED_ENC_SEL_MASK		0x7</div><div class='add'>+</div><div class='add'>+/* Register relative to REG_LED_*_CNTRL (BCM4908) */</div><div class='add'>+#define REG_LED_LINK_SPEED_ENC			0x8</div><div class='add'>+#define  LED_LINK_SPEED_ENC_NO_LINK_SHIFT	0</div><div class='add'>+#define  LED_LINK_SPEED_ENC_M10_SHIFT		3</div><div class='add'>+#define  LED_LINK_SPEED_ENC_M100_SHIFT		6</div><div class='add'>+#define  LED_LINK_SPEED_ENC_M1000_SHIFT		9</div><div class='add'>+#define  LED_LINK_SPEED_ENC_M2500_SHIFT		12</div><div class='add'>+#define  LED_LINK_SPEED_ENC_M10G_SHIFT		15</div><div class='add'>+#define  LED_LINK_SPEED_ENC_MASK		0x7</div><div class='add'>+</div><div class='ctx'> /* Relative to REG_RGMII_CNTRL */</div><div class='ctx'> #define  RGMII_MODE_EN			(1 &lt;&lt; 0)</div><div class='ctx'> #define  ID_MODE_DIS			(1 &lt;&lt; 1)</div><div class='hunk'>@@ -61,10 +134,6 @@</div><div class='ctx'> #define  LPI_COUNT_SHIFT		9</div><div class='ctx'> #define  LPI_COUNT_MASK			0x3F</div><div class='ctx'> </div><div class='del'>-#define REG_LED_CNTRL_BASE		0x90</div><div class='del'>-#define REG_LED_CNTRL(x)		(REG_LED_CNTRL_BASE + (x) * 4)</div><div class='del'>-#define  SPDLNK_SRC_SEL			(1 &lt;&lt; 24)</div><div class='del'>-</div><div class='ctx'> /* Register set relative to 'INTRL2_0' and 'INTRL2_1' */</div><div class='ctx'> #define INTRL2_CPU_STATUS		0x00</div><div class='ctx'> #define INTRL2_CPU_SET			0x04</div><div class='hunk'>@@ -106,6 +175,24 @@</div><div class='ctx'> #define P7_IRQ_OFF			0</div><div class='ctx'> #define P_IRQ_OFF(x)			((6 - (x)) * P_NUM_IRQ)</div><div class='ctx'> </div><div class='add'>+/* Register set relative to 'ACB' */</div><div class='add'>+#define ACB_CONTROL			0x00</div><div class='add'>+#define  ACB_EN				(1 &lt;&lt; 0)</div><div class='add'>+#define  ACB_ALGORITHM			(1 &lt;&lt; 1)</div><div class='add'>+#define  ACB_FLUSH_SHIFT		2</div><div class='add'>+#define  ACB_FLUSH_MASK			0x3</div><div class='add'>+</div><div class='add'>+#define ACB_QUEUE_0_CFG			0x08</div><div class='add'>+#define  XOFF_THRESHOLD_MASK		0x7ff</div><div class='add'>+#define  XON_EN				(1 &lt;&lt; 11)</div><div class='add'>+#define  TOTAL_XOFF_THRESHOLD_SHIFT	12</div><div class='add'>+#define  TOTAL_XOFF_THRESHOLD_MASK	0x7ff</div><div class='add'>+#define  TOTAL_XOFF_EN			(1 &lt;&lt; 23)</div><div class='add'>+#define  TOTAL_XON_EN			(1 &lt;&lt; 24)</div><div class='add'>+#define  PKTLEN_SHIFT			25</div><div class='add'>+#define  PKTLEN_MASK			0x3f</div><div class='add'>+#define ACB_QUEUE_CFG(x)		(ACB_QUEUE_0_CFG + ((x) * 0x4))</div><div class='add'>+</div><div class='ctx'> /* Register set relative to 'CORE' */</div><div class='ctx'> #define CORE_G_PCTL_PORT0		0x00000</div><div class='ctx'> #define CORE_G_PCTL_PORT(x)		(CORE_G_PCTL_PORT0 + (x * 0x4))</div><div class='hunk'>@@ -115,14 +202,6 @@</div><div class='ctx'> #define  RX_BCST_EN			(1 &lt;&lt; 2)</div><div class='ctx'> #define  RX_MCST_EN			(1 &lt;&lt; 3)</div><div class='ctx'> #define  RX_UCST_EN			(1 &lt;&lt; 4)</div><div class='del'>-#define  G_MISTP_STATE_SHIFT		5</div><div class='del'>-#define  G_MISTP_NO_STP			(0 &lt;&lt; G_MISTP_STATE_SHIFT)</div><div class='del'>-#define  G_MISTP_DIS_STATE		(1 &lt;&lt; G_MISTP_STATE_SHIFT)</div><div class='del'>-#define  G_MISTP_BLOCK_STATE		(2 &lt;&lt; G_MISTP_STATE_SHIFT)</div><div class='del'>-#define  G_MISTP_LISTEN_STATE		(3 &lt;&lt; G_MISTP_STATE_SHIFT)</div><div class='del'>-#define  G_MISTP_LEARN_STATE		(4 &lt;&lt; G_MISTP_STATE_SHIFT)</div><div class='del'>-#define  G_MISTP_FWD_STATE		(5 &lt;&lt; G_MISTP_STATE_SHIFT)</div><div class='del'>-#define  G_MISTP_STATE_MASK		0x7</div><div class='ctx'> </div><div class='ctx'> #define CORE_SWMODE			0x0002c</div><div class='ctx'> #define  SW_FWDG_MODE			(1 &lt;&lt; 0)</div><div class='hunk'>@@ -133,6 +212,9 @@</div><div class='ctx'> #define  GMII_SPEED_UP_2G		(1 &lt;&lt; 6)</div><div class='ctx'> #define  MII_SW_OR			(1 &lt;&lt; 7)</div><div class='ctx'> </div><div class='add'>+/* Alternate layout for e.g: 7278 */</div><div class='add'>+#define CORE_STS_OVERRIDE_IMP2		0x39040</div><div class='add'>+</div><div class='ctx'> #define CORE_NEW_CTRL			0x00084</div><div class='ctx'> #define  IP_MC				(1 &lt;&lt; 0)</div><div class='ctx'> #define  OUTRANGEERR_DISCARD		(1 &lt;&lt; 1)</div><div class='hunk'>@@ -146,10 +228,13 @@</div><div class='ctx'> #define CORE_SWITCH_CTRL		0x00088</div><div class='ctx'> #define  MII_DUMB_FWDG_EN		(1 &lt;&lt; 6)</div><div class='ctx'> </div><div class='add'>+#define CORE_DIS_LEARN			0x000f0</div><div class='add'>+</div><div class='ctx'> #define CORE_SFT_LRN_CTRL		0x000f8</div><div class='ctx'> #define  SW_LEARN_CNTL(x)		(1 &lt;&lt; (x))</div><div class='ctx'> </div><div class='ctx'> #define CORE_STS_OVERRIDE_GMIIP_PORT(x)	(0x160 + (x) * 4)</div><div class='add'>+#define CORE_STS_OVERRIDE_GMIIP2_PORT(x) (0x39000 + (x) * 8)</div><div class='ctx'> #define  LINK_STS			(1 &lt;&lt; 0)</div><div class='ctx'> #define  DUPLX_MODE			(1 &lt;&lt; 1)</div><div class='ctx'> #define  SPEED_SHIFT			2</div><div class='hunk'>@@ -200,36 +285,24 @@</div><div class='ctx'> </div><div class='ctx'> #define CORE_IMP0_PRT_ID		0x0804</div><div class='ctx'> </div><div class='del'>-#define CORE_BRCM_HDR_CTRL		0x0080c</div><div class='del'>-#define  BRCM_HDR_EN_P8			(1 &lt;&lt; 0)</div><div class='del'>-#define  BRCM_HDR_EN_P5			(1 &lt;&lt; 1)</div><div class='del'>-#define  BRCM_HDR_EN_P7			(1 &lt;&lt; 2)</div><div class='del'>-</div><div class='del'>-#define CORE_BRCM_HDR_CTRL2		0x0828</div><div class='del'>-</div><div class='del'>-#define CORE_HL_PRTC_CTRL		0x0940</div><div class='del'>-#define  ARP_EN				(1 &lt;&lt; 0)</div><div class='del'>-#define  RARP_EN			(1 &lt;&lt; 1)</div><div class='del'>-#define  DHCP_EN			(1 &lt;&lt; 2)</div><div class='del'>-#define  ICMPV4_EN			(1 &lt;&lt; 3)</div><div class='del'>-#define  ICMPV6_EN			(1 &lt;&lt; 4)</div><div class='del'>-#define  ICMPV6_FWD_MODE		(1 &lt;&lt; 5)</div><div class='del'>-#define  IGMP_DIP_EN			(1 &lt;&lt; 8)</div><div class='del'>-#define  IGMP_RPTLVE_EN			(1 &lt;&lt; 9)</div><div class='del'>-#define  IGMP_RTPLVE_FWD_MODE		(1 &lt;&lt; 10)</div><div class='del'>-#define  IGMP_QRY_EN			(1 &lt;&lt; 11)</div><div class='del'>-#define  IGMP_QRY_FWD_MODE		(1 &lt;&lt; 12)</div><div class='del'>-#define  IGMP_UKN_EN			(1 &lt;&lt; 13)</div><div class='del'>-#define  IGMP_UKN_FWD_MODE		(1 &lt;&lt; 14)</div><div class='del'>-#define  MLD_RPTDONE_EN			(1 &lt;&lt; 15)</div><div class='del'>-#define  MLD_RPTDONE_FWD_MODE		(1 &lt;&lt; 16)</div><div class='del'>-#define  MLD_QRY_EN			(1 &lt;&lt; 17)</div><div class='del'>-#define  MLD_QRY_FWD_MODE		(1 &lt;&lt; 18)</div><div class='del'>-</div><div class='ctx'> #define CORE_RST_MIB_CNT_EN		0x0950</div><div class='ctx'> </div><div class='del'>-#define CORE_BRCM_HDR_RX_DIS		0x0980</div><div class='del'>-#define CORE_BRCM_HDR_TX_DIS		0x0988</div><div class='add'>+#define CORE_ARLA_VTBL_RWCTRL		0x1600</div><div class='add'>+#define  ARLA_VTBL_CMD_WRITE		0</div><div class='add'>+#define  ARLA_VTBL_CMD_READ		1</div><div class='add'>+#define  ARLA_VTBL_CMD_CLEAR		2</div><div class='add'>+#define  ARLA_VTBL_STDN			(1 &lt;&lt; 7)</div><div class='add'>+</div><div class='add'>+#define CORE_ARLA_VTBL_ADDR		0x1604</div><div class='add'>+#define  VTBL_ADDR_INDEX_MASK		0xfff</div><div class='add'>+</div><div class='add'>+#define CORE_ARLA_VTBL_ENTRY		0x160c</div><div class='add'>+#define  FWD_MAP_MASK			0x1ff</div><div class='add'>+#define  UNTAG_MAP_MASK			0x1ff</div><div class='add'>+#define  UNTAG_MAP_SHIFT		9</div><div class='add'>+#define  MSTP_INDEX_MASK		0x7</div><div class='add'>+#define  MSTP_INDEX_SHIFT		18</div><div class='add'>+#define  FWD_MODE			(1 &lt;&lt; 21)</div><div class='ctx'> </div><div class='ctx'> #define CORE_MEM_PSM_VDD_CTRL		0x2380</div><div class='ctx'> #define  P_TXQ_PSM_VDD_SHIFT		2</div><div class='hunk'>@@ -237,14 +310,187 @@</div><div class='ctx'> #define  P_TXQ_PSM_VDD(x)		(P_TXQ_PSM_VDD_MASK &lt;&lt; \</div><div class='ctx'> 					((x) * P_TXQ_PSM_VDD_SHIFT))</div><div class='ctx'> </div><div class='del'>-#define	CORE_P0_MIB_OFFSET		0x8000</div><div class='del'>-#define P_MIB_SIZE			0x400</div><div class='del'>-#define CORE_P_MIB_OFFSET(x)		(CORE_P0_MIB_OFFSET + (x) * P_MIB_SIZE)</div><div class='add'>+#define CORE_PORT_TC2_QOS_MAP_PORT(x)	(0xc1c0 + ((x) * 0x10))</div><div class='add'>+#define  PRT_TO_QID_MASK		0x3</div><div class='add'>+#define  PRT_TO_QID_SHIFT		3</div><div class='ctx'> </div><div class='ctx'> #define CORE_PORT_VLAN_CTL_PORT(x)	(0xc400 + ((x) * 0x8))</div><div class='ctx'> #define  PORT_VLAN_CTRL_MASK		0x1ff</div><div class='ctx'> </div><div class='del'>-#define CORE_EEE_EN_CTRL		0x24800</div><div class='del'>-#define CORE_EEE_LPI_INDICATE		0x24810</div><div class='add'>+#define CORE_TXQ_THD_PAUSE_QN_PORT_0	0x2c80</div><div class='add'>+#define  TXQ_PAUSE_THD_MASK		0x7ff</div><div class='add'>+#define CORE_TXQ_THD_PAUSE_QN_PORT(x)	(CORE_TXQ_THD_PAUSE_QN_PORT_0 + \</div><div class='add'>+					(x) * 0x8)</div><div class='add'>+</div><div class='add'>+#define CORE_DEFAULT_1Q_TAG_P(x)	(0xd040 + ((x) * 8))</div><div class='add'>+#define  CFI_SHIFT			12</div><div class='add'>+#define  PRI_SHIFT			13</div><div class='add'>+#define  PRI_MASK			0x7</div><div class='add'>+</div><div class='add'>+#define CORE_JOIN_ALL_VLAN_EN		0xd140</div><div class='add'>+</div><div class='add'>+#define CORE_CFP_ACC			0x28000</div><div class='add'>+#define  OP_STR_DONE			(1 &lt;&lt; 0)</div><div class='add'>+#define  OP_SEL_SHIFT			1</div><div class='add'>+#define  OP_SEL_READ			(1 &lt;&lt; OP_SEL_SHIFT)</div><div class='add'>+#define  OP_SEL_WRITE			(2 &lt;&lt; OP_SEL_SHIFT)</div><div class='add'>+#define  OP_SEL_SEARCH			(4 &lt;&lt; OP_SEL_SHIFT)</div><div class='add'>+#define  OP_SEL_MASK			(7 &lt;&lt; OP_SEL_SHIFT)</div><div class='add'>+#define  CFP_RAM_CLEAR			(1 &lt;&lt; 4)</div><div class='add'>+#define  RAM_SEL_SHIFT			10</div><div class='add'>+#define  TCAM_SEL			(1 &lt;&lt; RAM_SEL_SHIFT)</div><div class='add'>+#define  ACT_POL_RAM			(2 &lt;&lt; RAM_SEL_SHIFT)</div><div class='add'>+#define  RATE_METER_RAM			(4 &lt;&lt; RAM_SEL_SHIFT)</div><div class='add'>+#define  GREEN_STAT_RAM			(8 &lt;&lt; RAM_SEL_SHIFT)</div><div class='add'>+#define  YELLOW_STAT_RAM		(16 &lt;&lt; RAM_SEL_SHIFT)</div><div class='add'>+#define  RED_STAT_RAM			(24 &lt;&lt; RAM_SEL_SHIFT)</div><div class='add'>+#define  RAM_SEL_MASK			(0x1f &lt;&lt; RAM_SEL_SHIFT)</div><div class='add'>+#define  TCAM_RESET			(1 &lt;&lt; 15)</div><div class='add'>+#define  XCESS_ADDR_SHIFT		16</div><div class='add'>+#define  XCESS_ADDR_MASK		0xff</div><div class='add'>+#define  SEARCH_STS			(1 &lt;&lt; 27)</div><div class='add'>+#define  RD_STS_SHIFT			28</div><div class='add'>+#define  RD_STS_TCAM			(1 &lt;&lt; RD_STS_SHIFT)</div><div class='add'>+#define  RD_STS_ACT_POL_RAM		(2 &lt;&lt; RD_STS_SHIFT)</div><div class='add'>+#define  RD_STS_RATE_METER_RAM		(4 &lt;&lt; RD_STS_SHIFT)</div><div class='add'>+#define  RD_STS_STAT_RAM		(8 &lt;&lt; RD_STS_SHIFT)</div><div class='add'>+</div><div class='add'>+#define CORE_CFP_RATE_METER_GLOBAL_CTL	0x28010</div><div class='add'>+</div><div class='add'>+#define CORE_CFP_DATA_PORT_0		0x28040</div><div class='add'>+#define CORE_CFP_DATA_PORT(x)		(CORE_CFP_DATA_PORT_0 + \</div><div class='add'>+					(x) * 0x10)</div><div class='add'>+</div><div class='add'>+/* UDF_DATA7 */</div><div class='add'>+#define L3_FRAMING_SHIFT		24</div><div class='add'>+#define L3_FRAMING_MASK			(0x3 &lt;&lt; L3_FRAMING_SHIFT)</div><div class='add'>+#define IPTOS_SHIFT			16</div><div class='add'>+#define IPTOS_MASK			0xff</div><div class='add'>+#define IPPROTO_SHIFT			8</div><div class='add'>+#define IPPROTO_MASK			(0xff &lt;&lt; IPPROTO_SHIFT)</div><div class='add'>+#define IP_FRAG_SHIFT			7</div><div class='add'>+#define IP_FRAG				(1 &lt;&lt; IP_FRAG_SHIFT)</div><div class='add'>+</div><div class='add'>+/* UDF_DATA0 */</div><div class='add'>+#define  SLICE_VALID			3</div><div class='add'>+#define  SLICE_NUM_SHIFT		2</div><div class='add'>+#define  SLICE_NUM(x)			((x) &lt;&lt; SLICE_NUM_SHIFT)</div><div class='add'>+#define  SLICE_NUM_MASK			0x3</div><div class='add'>+</div><div class='add'>+#define CORE_CFP_MASK_PORT_0		0x280c0</div><div class='add'>+</div><div class='add'>+#define CORE_CFP_MASK_PORT(x)		(CORE_CFP_MASK_PORT_0 + \</div><div class='add'>+					(x) * 0x10)</div><div class='add'>+</div><div class='add'>+#define CORE_ACT_POL_DATA0		0x28140</div><div class='add'>+#define  VLAN_BYP			(1 &lt;&lt; 0)</div><div class='add'>+#define  EAP_BYP			(1 &lt;&lt; 1)</div><div class='add'>+#define  STP_BYP			(1 &lt;&lt; 2)</div><div class='add'>+#define  REASON_CODE_SHIFT		3</div><div class='add'>+#define  REASON_CODE_MASK		0x3f</div><div class='add'>+#define  LOOP_BK_EN			(1 &lt;&lt; 9)</div><div class='add'>+#define  NEW_TC_SHIFT			10</div><div class='add'>+#define  NEW_TC_MASK			0x7</div><div class='add'>+#define  CHANGE_TC			(1 &lt;&lt; 13)</div><div class='add'>+#define  DST_MAP_IB_SHIFT		14</div><div class='add'>+#define  DST_MAP_IB_MASK		0x1ff</div><div class='add'>+#define  CHANGE_FWRD_MAP_IB_SHIFT	24</div><div class='add'>+#define  CHANGE_FWRD_MAP_IB_MASK	0x3</div><div class='add'>+#define  CHANGE_FWRD_MAP_IB_NO_DEST	(0 &lt;&lt; CHANGE_FWRD_MAP_IB_SHIFT)</div><div class='add'>+#define  CHANGE_FWRD_MAP_IB_REM_ARL	(1 &lt;&lt; CHANGE_FWRD_MAP_IB_SHIFT)</div><div class='add'>+#define  CHANGE_FWRD_MAP_IB_REP_ARL	(2 &lt;&lt; CHANGE_FWRD_MAP_IB_SHIFT)</div><div class='add'>+#define  CHANGE_FWRD_MAP_IB_ADD_DST	(3 &lt;&lt; CHANGE_FWRD_MAP_IB_SHIFT)</div><div class='add'>+#define  NEW_DSCP_IB_SHIFT		26</div><div class='add'>+#define  NEW_DSCP_IB_MASK		0x3f</div><div class='add'>+</div><div class='add'>+#define CORE_ACT_POL_DATA1		0x28150</div><div class='add'>+#define  CHANGE_DSCP_IB			(1 &lt;&lt; 0)</div><div class='add'>+#define  DST_MAP_OB_SHIFT		1</div><div class='add'>+#define  DST_MAP_OB_MASK		0x3ff</div><div class='add'>+#define  CHANGE_FWRD_MAP_OB_SHIT	11</div><div class='add'>+#define  CHANGE_FWRD_MAP_OB_MASK	0x3</div><div class='add'>+#define  NEW_DSCP_OB_SHIFT		13</div><div class='add'>+#define  NEW_DSCP_OB_MASK		0x3f</div><div class='add'>+#define  CHANGE_DSCP_OB			(1 &lt;&lt; 19)</div><div class='add'>+#define  CHAIN_ID_SHIFT			20</div><div class='add'>+#define  CHAIN_ID_MASK			0xff</div><div class='add'>+#define  CHANGE_COLOR			(1 &lt;&lt; 28)</div><div class='add'>+#define  NEW_COLOR_SHIFT		29</div><div class='add'>+#define  NEW_COLOR_MASK			0x3</div><div class='add'>+#define  NEW_COLOR_GREEN		(0 &lt;&lt; NEW_COLOR_SHIFT)</div><div class='add'>+#define  NEW_COLOR_YELLOW		(1 &lt;&lt; NEW_COLOR_SHIFT)</div><div class='add'>+#define  NEW_COLOR_RED			(2 &lt;&lt; NEW_COLOR_SHIFT)</div><div class='add'>+#define  RED_DEFAULT			(1 &lt;&lt; 31)</div><div class='add'>+</div><div class='add'>+#define CORE_ACT_POL_DATA2		0x28160</div><div class='add'>+#define  MAC_LIMIT_BYPASS		(1 &lt;&lt; 0)</div><div class='add'>+#define  CHANGE_TC_O			(1 &lt;&lt; 1)</div><div class='add'>+#define  NEW_TC_O_SHIFT			2</div><div class='add'>+#define  NEW_TC_O_MASK			0x7</div><div class='add'>+#define  SPCP_RMK_DISABLE		(1 &lt;&lt; 5)</div><div class='add'>+#define  CPCP_RMK_DISABLE		(1 &lt;&lt; 6)</div><div class='add'>+#define  DEI_RMK_DISABLE		(1 &lt;&lt; 7)</div><div class='add'>+</div><div class='add'>+#define CORE_RATE_METER0		0x28180</div><div class='add'>+#define  COLOR_MODE			(1 &lt;&lt; 0)</div><div class='add'>+#define  POLICER_ACTION			(1 &lt;&lt; 1)</div><div class='add'>+#define  COUPLING_FLAG			(1 &lt;&lt; 2)</div><div class='add'>+#define  POLICER_MODE_SHIFT		3</div><div class='add'>+#define  POLICER_MODE_MASK		0x3</div><div class='add'>+#define  POLICER_MODE_RFC2698		(0 &lt;&lt; POLICER_MODE_SHIFT)</div><div class='add'>+#define  POLICER_MODE_RFC4115		(1 &lt;&lt; POLICER_MODE_SHIFT)</div><div class='add'>+#define  POLICER_MODE_MEF		(2 &lt;&lt; POLICER_MODE_SHIFT)</div><div class='add'>+#define  POLICER_MODE_DISABLE		(3 &lt;&lt; POLICER_MODE_SHIFT)</div><div class='add'>+</div><div class='add'>+#define CORE_RATE_METER1		0x28190</div><div class='add'>+#define  EIR_TK_BKT_MASK		0x7fffff</div><div class='add'>+</div><div class='add'>+#define CORE_RATE_METER2		0x281a0</div><div class='add'>+#define  EIR_BKT_SIZE_MASK		0xfffff</div><div class='add'>+</div><div class='add'>+#define CORE_RATE_METER3		0x281b0</div><div class='add'>+#define  EIR_REF_CNT_MASK		0x7ffff</div><div class='add'>+</div><div class='add'>+#define CORE_RATE_METER4		0x281c0</div><div class='add'>+#define  CIR_TK_BKT_MASK		0x7fffff</div><div class='add'>+</div><div class='add'>+#define CORE_RATE_METER5		0x281d0</div><div class='add'>+#define  CIR_BKT_SIZE_MASK		0xfffff</div><div class='add'>+</div><div class='add'>+#define CORE_RATE_METER6		0x281e0</div><div class='add'>+#define  CIR_REF_CNT_MASK		0x7ffff</div><div class='add'>+</div><div class='add'>+#define CORE_STAT_GREEN_CNTR		0x28200</div><div class='add'>+#define CORE_STAT_YELLOW_CNTR		0x28210</div><div class='add'>+#define CORE_STAT_RED_CNTR		0x28220</div><div class='add'>+</div><div class='add'>+#define CORE_CFP_CTL_REG		0x28400</div><div class='add'>+#define  CFP_EN_MAP_MASK		0x1ff</div><div class='add'>+</div><div class='add'>+/* IPv4 slices, 3 of them */</div><div class='add'>+#define CORE_UDF_0_A_0_8_PORT_0		0x28440</div><div class='add'>+#define  CFG_UDF_OFFSET_MASK		0x1f</div><div class='add'>+#define  CFG_UDF_OFFSET_BASE_SHIFT	5</div><div class='add'>+#define  CFG_UDF_SOF			(0 &lt;&lt; CFG_UDF_OFFSET_BASE_SHIFT)</div><div class='add'>+#define  CFG_UDF_EOL2			(2 &lt;&lt; CFG_UDF_OFFSET_BASE_SHIFT)</div><div class='add'>+#define  CFG_UDF_EOL3			(3 &lt;&lt; CFG_UDF_OFFSET_BASE_SHIFT)</div><div class='add'>+</div><div class='add'>+/* IPv6 slices */</div><div class='add'>+#define CORE_UDF_0_B_0_8_PORT_0		0x28500</div><div class='add'>+</div><div class='add'>+/* IPv6 chained slices */</div><div class='add'>+#define CORE_UDF_0_D_0_11_PORT_0	0x28680</div><div class='add'>+</div><div class='add'>+/* Number of slices for IPv4, IPv6 and non-IP */</div><div class='add'>+#define UDF_NUM_SLICES			4</div><div class='add'>+#define UDFS_PER_SLICE			9</div><div class='add'>+</div><div class='add'>+/* Spacing between different slices */</div><div class='add'>+#define UDF_SLICE_OFFSET		0x40</div><div class='add'>+</div><div class='add'>+#define CFP_NUM_RULES			256</div><div class='add'>+</div><div class='add'>+/* Number of egress queues per port */</div><div class='add'>+#define SF2_NUM_EGRESS_QUEUES		8</div><div class='ctx'> </div><div class='ctx'> #endif /* __BCM_SF2_REGS_H */</div><div class='head'>diff --git a/drivers/net/dsa/dsa_loop.c b/drivers/net/dsa/dsa_loop.c<br/>new file mode 100644<br/>index 000000000000..4a416f2717ba<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/dsa_loop.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/dsa_loop.c</a></div><div class='hunk'>@@ -0,0 +1,476 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Distributed Switch Architecture loopback driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2016, Florian Fainelli &lt;f.fainelli@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/phy_fixed.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/workqueue.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/if_bridge.h&gt;</div><div class='add'>+#include &lt;linux/dsa/loop.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+</div><div class='add'>+#define DSA_LOOP_NUM_PORTS	6</div><div class='add'>+#define DSA_LOOP_CPU_PORT	(DSA_LOOP_NUM_PORTS - 1)</div><div class='add'>+#define NUM_FIXED_PHYS		(DSA_LOOP_NUM_PORTS - 2)</div><div class='add'>+</div><div class='add'>+struct dsa_loop_pdata {</div><div class='add'>+	/* Must be first, such that dsa_register_switch() can access this</div><div class='add'>+	 * without gory pointer manipulations</div><div class='add'>+	 */</div><div class='add'>+	struct dsa_chip_data cd;</div><div class='add'>+	const char *name;</div><div class='add'>+	unsigned int enabled_ports;</div><div class='add'>+	const char *netdev;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct dsa_loop_mib_entry dsa_loop_mibs[] = {</div><div class='add'>+	[DSA_LOOP_PHY_READ_OK]	= { "phy_read_ok", },</div><div class='add'>+	[DSA_LOOP_PHY_READ_ERR]	= { "phy_read_err", },</div><div class='add'>+	[DSA_LOOP_PHY_WRITE_OK] = { "phy_write_ok", },</div><div class='add'>+	[DSA_LOOP_PHY_WRITE_ERR] = { "phy_write_err", },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct phy_device *phydevs[PHY_MAX_ADDR];</div><div class='add'>+static struct mdio_device *switch_mdiodev;</div><div class='add'>+</div><div class='add'>+enum dsa_loop_devlink_resource_id {</div><div class='add'>+	DSA_LOOP_DEVLINK_PARAM_ID_VTU,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static u64 dsa_loop_devlink_vtu_get(void *priv)</div><div class='add'>+{</div><div class='add'>+	struct dsa_loop_priv *ps = priv;</div><div class='add'>+	unsigned int i, count = 0;</div><div class='add'>+	struct dsa_loop_vlan *vl;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(ps-&gt;vlans); i++) {</div><div class='add'>+		vl = &amp;ps-&gt;vlans[i];</div><div class='add'>+		if (vl-&gt;members)</div><div class='add'>+			count++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dsa_loop_setup_devlink_resources(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct devlink_resource_size_params size_params;</div><div class='add'>+	struct dsa_loop_priv *ps = ds-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	devlink_resource_size_params_init(&amp;size_params, ARRAY_SIZE(ps-&gt;vlans),</div><div class='add'>+					  ARRAY_SIZE(ps-&gt;vlans),</div><div class='add'>+					  1, DEVLINK_RESOURCE_UNIT_ENTRY);</div><div class='add'>+</div><div class='add'>+	err = dsa_devlink_resource_register(ds, "VTU", ARRAY_SIZE(ps-&gt;vlans),</div><div class='add'>+					    DSA_LOOP_DEVLINK_PARAM_ID_VTU,</div><div class='add'>+					    DEVLINK_RESOURCE_ID_PARENT_TOP,</div><div class='add'>+					    &amp;size_params);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	dsa_devlink_resource_occ_get_register(ds,</div><div class='add'>+					      DSA_LOOP_DEVLINK_PARAM_ID_VTU,</div><div class='add'>+					      dsa_loop_devlink_vtu_get, ps);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	dsa_devlink_resources_unregister(ds);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum dsa_tag_protocol dsa_loop_get_protocol(struct dsa_switch *ds,</div><div class='add'>+						   int port,</div><div class='add'>+						   enum dsa_tag_protocol mp)</div><div class='add'>+{</div><div class='add'>+	dev_dbg(ds-&gt;dev, "%s: port: %d\n", __func__, port);</div><div class='add'>+</div><div class='add'>+	return DSA_TAG_PROTO_NONE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dsa_loop_setup(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct dsa_loop_priv *ps = ds-&gt;priv;</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ds-&gt;num_ports; i++)</div><div class='add'>+		memcpy(ps-&gt;ports[i].mib, dsa_loop_mibs,</div><div class='add'>+		       sizeof(dsa_loop_mibs));</div><div class='add'>+</div><div class='add'>+	dev_dbg(ds-&gt;dev, "%s\n", __func__);</div><div class='add'>+</div><div class='add'>+	return dsa_loop_setup_devlink_resources(ds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dsa_loop_teardown(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	dsa_devlink_resources_unregister(ds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dsa_loop_get_sset_count(struct dsa_switch *ds, int port, int sset)</div><div class='add'>+{</div><div class='add'>+	if (sset != ETH_SS_STATS &amp;&amp; sset != ETH_SS_PHY_STATS)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return __DSA_LOOP_CNT_MAX;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dsa_loop_get_strings(struct dsa_switch *ds, int port,</div><div class='add'>+				 u32 stringset, uint8_t *data)</div><div class='add'>+{</div><div class='add'>+	struct dsa_loop_priv *ps = ds-&gt;priv;</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	if (stringset != ETH_SS_STATS &amp;&amp; stringset != ETH_SS_PHY_STATS)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; __DSA_LOOP_CNT_MAX; i++)</div><div class='add'>+		ethtool_puts(&amp;data, ps-&gt;ports[port].mib[i].name);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dsa_loop_get_ethtool_stats(struct dsa_switch *ds, int port,</div><div class='add'>+				       uint64_t *data)</div><div class='add'>+{</div><div class='add'>+	struct dsa_loop_priv *ps = ds-&gt;priv;</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; __DSA_LOOP_CNT_MAX; i++)</div><div class='add'>+		data[i] = ps-&gt;ports[port].mib[i].val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dsa_loop_phy_read(struct dsa_switch *ds, int port, int regnum)</div><div class='add'>+{</div><div class='add'>+	struct dsa_loop_priv *ps = ds-&gt;priv;</div><div class='add'>+	struct mii_bus *bus = ps-&gt;bus;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = mdiobus_read_nested(bus, ps-&gt;port_base + port, regnum);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		ps-&gt;ports[port].mib[DSA_LOOP_PHY_READ_ERR].val++;</div><div class='add'>+	else</div><div class='add'>+		ps-&gt;ports[port].mib[DSA_LOOP_PHY_READ_OK].val++;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dsa_loop_phy_write(struct dsa_switch *ds, int port,</div><div class='add'>+			      int regnum, u16 value)</div><div class='add'>+{</div><div class='add'>+	struct dsa_loop_priv *ps = ds-&gt;priv;</div><div class='add'>+	struct mii_bus *bus = ps-&gt;bus;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = mdiobus_write_nested(bus, ps-&gt;port_base + port, regnum, value);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		ps-&gt;ports[port].mib[DSA_LOOP_PHY_WRITE_ERR].val++;</div><div class='add'>+	else</div><div class='add'>+		ps-&gt;ports[port].mib[DSA_LOOP_PHY_WRITE_OK].val++;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dsa_loop_port_bridge_join(struct dsa_switch *ds, int port,</div><div class='add'>+				     struct dsa_bridge bridge,</div><div class='add'>+				     bool *tx_fwd_offload,</div><div class='add'>+				     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	dev_dbg(ds-&gt;dev, "%s: port: %d, bridge: %s\n",</div><div class='add'>+		__func__, port, bridge.dev-&gt;name);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dsa_loop_port_bridge_leave(struct dsa_switch *ds, int port,</div><div class='add'>+				       struct dsa_bridge bridge)</div><div class='add'>+{</div><div class='add'>+	dev_dbg(ds-&gt;dev, "%s: port: %d, bridge: %s\n",</div><div class='add'>+		__func__, port, bridge.dev-&gt;name);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dsa_loop_port_stp_state_set(struct dsa_switch *ds, int port,</div><div class='add'>+					u8 state)</div><div class='add'>+{</div><div class='add'>+	dev_dbg(ds-&gt;dev, "%s: port: %d, state: %d\n",</div><div class='add'>+		__func__, port, state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dsa_loop_port_vlan_filtering(struct dsa_switch *ds, int port,</div><div class='add'>+					bool vlan_filtering,</div><div class='add'>+					struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	dev_dbg(ds-&gt;dev, "%s: port: %d, vlan_filtering: %d\n",</div><div class='add'>+		__func__, port, vlan_filtering);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dsa_loop_port_vlan_add(struct dsa_switch *ds, int port,</div><div class='add'>+				  const struct switchdev_obj_port_vlan *vlan,</div><div class='add'>+				  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	bool untagged = vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_UNTAGGED;</div><div class='add'>+	bool pvid = vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_PVID;</div><div class='add'>+	struct dsa_loop_priv *ps = ds-&gt;priv;</div><div class='add'>+	struct mii_bus *bus = ps-&gt;bus;</div><div class='add'>+	struct dsa_loop_vlan *vl;</div><div class='add'>+</div><div class='add'>+	if (vlan-&gt;vid &gt;= ARRAY_SIZE(ps-&gt;vlans))</div><div class='add'>+		return -ERANGE;</div><div class='add'>+</div><div class='add'>+	/* Just do a sleeping operation to make lockdep checks effective */</div><div class='add'>+	mdiobus_read(bus, ps-&gt;port_base + port, MII_BMSR);</div><div class='add'>+</div><div class='add'>+	vl = &amp;ps-&gt;vlans[vlan-&gt;vid];</div><div class='add'>+</div><div class='add'>+	vl-&gt;members |= BIT(port);</div><div class='add'>+	if (untagged)</div><div class='add'>+		vl-&gt;untagged |= BIT(port);</div><div class='add'>+	else</div><div class='add'>+		vl-&gt;untagged &amp;= ~BIT(port);</div><div class='add'>+</div><div class='add'>+	dev_dbg(ds-&gt;dev, "%s: port: %d vlan: %d, %stagged, pvid: %d\n",</div><div class='add'>+		__func__, port, vlan-&gt;vid, untagged ? "un" : "", pvid);</div><div class='add'>+</div><div class='add'>+	if (pvid)</div><div class='add'>+		ps-&gt;ports[port].pvid = vlan-&gt;vid;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dsa_loop_port_vlan_del(struct dsa_switch *ds, int port,</div><div class='add'>+				  const struct switchdev_obj_port_vlan *vlan)</div><div class='add'>+{</div><div class='add'>+	bool untagged = vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_UNTAGGED;</div><div class='add'>+	struct dsa_loop_priv *ps = ds-&gt;priv;</div><div class='add'>+	u16 pvid = ps-&gt;ports[port].pvid;</div><div class='add'>+	struct mii_bus *bus = ps-&gt;bus;</div><div class='add'>+	struct dsa_loop_vlan *vl;</div><div class='add'>+</div><div class='add'>+	/* Just do a sleeping operation to make lockdep checks effective */</div><div class='add'>+	mdiobus_read(bus, ps-&gt;port_base + port, MII_BMSR);</div><div class='add'>+</div><div class='add'>+	vl = &amp;ps-&gt;vlans[vlan-&gt;vid];</div><div class='add'>+</div><div class='add'>+	vl-&gt;members &amp;= ~BIT(port);</div><div class='add'>+	if (untagged)</div><div class='add'>+		vl-&gt;untagged &amp;= ~BIT(port);</div><div class='add'>+</div><div class='add'>+	if (pvid == vlan-&gt;vid)</div><div class='add'>+		pvid = 1;</div><div class='add'>+</div><div class='add'>+	dev_dbg(ds-&gt;dev, "%s: port: %d vlan: %d, %stagged, pvid: %d\n",</div><div class='add'>+		__func__, port, vlan-&gt;vid, untagged ? "un" : "", pvid);</div><div class='add'>+	ps-&gt;ports[port].pvid = pvid;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dsa_loop_port_change_mtu(struct dsa_switch *ds, int port,</div><div class='add'>+				    int new_mtu)</div><div class='add'>+{</div><div class='add'>+	struct dsa_loop_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	priv-&gt;ports[port].mtu = new_mtu;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dsa_loop_port_max_mtu(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	return ETH_MAX_MTU;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dsa_loop_phylink_get_caps(struct dsa_switch *dsa, int port,</div><div class='add'>+				      struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	bitmap_fill(config-&gt;supported_interfaces, PHY_INTERFACE_MODE_MAX);</div><div class='add'>+	__clear_bit(PHY_INTERFACE_MODE_NA, config-&gt;supported_interfaces);</div><div class='add'>+	config-&gt;mac_capabilities = ~0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct dsa_switch_ops dsa_loop_driver = {</div><div class='add'>+	.get_tag_protocol	= dsa_loop_get_protocol,</div><div class='add'>+	.setup			= dsa_loop_setup,</div><div class='add'>+	.teardown		= dsa_loop_teardown,</div><div class='add'>+	.get_strings		= dsa_loop_get_strings,</div><div class='add'>+	.get_ethtool_stats	= dsa_loop_get_ethtool_stats,</div><div class='add'>+	.get_sset_count		= dsa_loop_get_sset_count,</div><div class='add'>+	.get_ethtool_phy_stats	= dsa_loop_get_ethtool_stats,</div><div class='add'>+	.phy_read		= dsa_loop_phy_read,</div><div class='add'>+	.phy_write		= dsa_loop_phy_write,</div><div class='add'>+	.port_bridge_join	= dsa_loop_port_bridge_join,</div><div class='add'>+	.port_bridge_leave	= dsa_loop_port_bridge_leave,</div><div class='add'>+	.port_stp_state_set	= dsa_loop_port_stp_state_set,</div><div class='add'>+	.port_vlan_filtering	= dsa_loop_port_vlan_filtering,</div><div class='add'>+	.port_vlan_add		= dsa_loop_port_vlan_add,</div><div class='add'>+	.port_vlan_del		= dsa_loop_port_vlan_del,</div><div class='add'>+	.port_change_mtu	= dsa_loop_port_change_mtu,</div><div class='add'>+	.port_max_mtu		= dsa_loop_port_max_mtu,</div><div class='add'>+	.phylink_get_caps	= dsa_loop_phylink_get_caps,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int dsa_loop_drv_probe(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct dsa_loop_pdata *pdata = mdiodev-&gt;dev.platform_data;</div><div class='add'>+	struct dsa_loop_priv *ps;</div><div class='add'>+	struct dsa_switch *ds;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!pdata)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	ds = devm_kzalloc(&amp;mdiodev-&gt;dev, sizeof(*ds), GFP_KERNEL);</div><div class='add'>+	if (!ds)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ds-&gt;dev = &amp;mdiodev-&gt;dev;</div><div class='add'>+	ds-&gt;num_ports = DSA_LOOP_NUM_PORTS;</div><div class='add'>+</div><div class='add'>+	ps = devm_kzalloc(&amp;mdiodev-&gt;dev, sizeof(*ps), GFP_KERNEL);</div><div class='add'>+	if (!ps)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ps-&gt;netdev = dev_get_by_name(&amp;init_net, pdata-&gt;netdev);</div><div class='add'>+	if (!ps-&gt;netdev)</div><div class='add'>+		return -EPROBE_DEFER;</div><div class='add'>+</div><div class='add'>+	pdata-&gt;cd.netdev[DSA_LOOP_CPU_PORT] = &amp;ps-&gt;netdev-&gt;dev;</div><div class='add'>+</div><div class='add'>+	ds-&gt;dev = &amp;mdiodev-&gt;dev;</div><div class='add'>+	ds-&gt;ops = &amp;dsa_loop_driver;</div><div class='add'>+	ds-&gt;priv = ps;</div><div class='add'>+	ps-&gt;bus = mdiodev-&gt;bus;</div><div class='add'>+</div><div class='add'>+	dev_set_drvdata(&amp;mdiodev-&gt;dev, ds);</div><div class='add'>+</div><div class='add'>+	ret = dsa_register_switch(ds);</div><div class='add'>+	if (!ret)</div><div class='add'>+		dev_info(&amp;mdiodev-&gt;dev, "%s: 0x%0x\n",</div><div class='add'>+			 pdata-&gt;name, pdata-&gt;enabled_ports);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dsa_loop_drv_remove(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds = dev_get_drvdata(&amp;mdiodev-&gt;dev);</div><div class='add'>+	struct dsa_loop_priv *ps;</div><div class='add'>+</div><div class='add'>+	if (!ds)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ps = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	dsa_unregister_switch(ds);</div><div class='add'>+	dev_put(ps-&gt;netdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void dsa_loop_drv_shutdown(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds = dev_get_drvdata(&amp;mdiodev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	if (!ds)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dsa_switch_shutdown(ds);</div><div class='add'>+</div><div class='add'>+	dev_set_drvdata(&amp;mdiodev-&gt;dev, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mdio_driver dsa_loop_drv = {</div><div class='add'>+	.mdiodrv.driver	= {</div><div class='add'>+		.name	= "dsa-loop",</div><div class='add'>+	},</div><div class='add'>+	.probe	= dsa_loop_drv_probe,</div><div class='add'>+	.remove	= dsa_loop_drv_remove,</div><div class='add'>+	.shutdown = dsa_loop_drv_shutdown,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void dsa_loop_phydevs_unregister(void)</div><div class='add'>+{</div><div class='add'>+	for (int i = 0; i &lt; NUM_FIXED_PHYS; i++) {</div><div class='add'>+		if (!IS_ERR(phydevs[i]))</div><div class='add'>+			fixed_phy_unregister(phydevs[i]);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __init dsa_loop_create_switch_mdiodev(void)</div><div class='add'>+{</div><div class='add'>+	static struct dsa_loop_pdata dsa_loop_pdata = {</div><div class='add'>+		.cd = {</div><div class='add'>+			.port_names[0] = "lan1",</div><div class='add'>+			.port_names[1] = "lan2",</div><div class='add'>+			.port_names[2] = "lan3",</div><div class='add'>+			.port_names[3] = "lan4",</div><div class='add'>+			.port_names[DSA_LOOP_CPU_PORT] = "cpu",</div><div class='add'>+		},</div><div class='add'>+		.name = "DSA mockup driver",</div><div class='add'>+		.enabled_ports = 0x1f,</div><div class='add'>+		.netdev = "eth0",</div><div class='add'>+	};</div><div class='add'>+	struct mii_bus *bus;</div><div class='add'>+	int ret = -ENODEV;</div><div class='add'>+</div><div class='add'>+	bus = mdio_find_bus("fixed-0");</div><div class='add'>+	if (WARN_ON(!bus))</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	switch_mdiodev = mdio_device_create(bus, 31);</div><div class='add'>+	if (IS_ERR(switch_mdiodev))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	strscpy(switch_mdiodev-&gt;modalias, "dsa-loop");</div><div class='add'>+	switch_mdiodev-&gt;dev.platform_data = &amp;dsa_loop_pdata;</div><div class='add'>+</div><div class='add'>+	ret = mdio_device_register(switch_mdiodev);</div><div class='add'>+	if (ret)</div><div class='add'>+		mdio_device_free(switch_mdiodev);</div><div class='add'>+out:</div><div class='add'>+	put_device(&amp;bus-&gt;dev);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __init dsa_loop_init(void)</div><div class='add'>+{</div><div class='add'>+	unsigned int i;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = dsa_loop_create_switch_mdiodev();</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; NUM_FIXED_PHYS; i++)</div><div class='add'>+		phydevs[i] = fixed_phy_register_100fd();</div><div class='add'>+</div><div class='add'>+	ret = mdio_driver_register(&amp;dsa_loop_drv);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dsa_loop_phydevs_unregister();</div><div class='add'>+		mdio_device_remove(switch_mdiodev);</div><div class='add'>+		mdio_device_free(switch_mdiodev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+module_init(dsa_loop_init);</div><div class='add'>+</div><div class='add'>+static void __exit dsa_loop_exit(void)</div><div class='add'>+{</div><div class='add'>+	mdio_driver_unregister(&amp;dsa_loop_drv);</div><div class='add'>+	dsa_loop_phydevs_unregister();</div><div class='add'>+	mdio_device_remove(switch_mdiodev);</div><div class='add'>+	mdio_device_free(switch_mdiodev);</div><div class='add'>+}</div><div class='add'>+module_exit(dsa_loop_exit);</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_AUTHOR("Florian Fainelli");</div><div class='add'>+MODULE_DESCRIPTION("DSA loopback driver");</div><div class='head'>diff --git a/drivers/net/dsa/hirschmann/Kconfig b/drivers/net/dsa/hirschmann/Kconfig<br/>new file mode 100644<br/>index 000000000000..9ea2c643f8f8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/hirschmann/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/hirschmann/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+config NET_DSA_HIRSCHMANN_HELLCREEK</div><div class='add'>+	tristate "Hirschmann Hellcreek TSN Switch support"</div><div class='add'>+	depends on HAS_IOMEM</div><div class='add'>+	depends on NET_DSA</div><div class='add'>+	depends on PTP_1588_CLOCK</div><div class='add'>+	depends on LEDS_CLASS</div><div class='add'>+	depends on NET_SCH_TAPRIO</div><div class='add'>+	select NET_DSA_TAG_HELLCREEK</div><div class='add'>+	help</div><div class='add'>+	  This driver adds support for Hirschmann Hellcreek TSN switches.</div><div class='head'>diff --git a/drivers/net/dsa/hirschmann/Makefile b/drivers/net/dsa/hirschmann/Makefile<br/>new file mode 100644<br/>index 000000000000..f4075c2998b5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/hirschmann/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/hirschmann/Makefile</a></div><div class='hunk'>@@ -0,0 +1,5 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+obj-$(CONFIG_NET_DSA_HIRSCHMANN_HELLCREEK)	+= hellcreek_sw.o</div><div class='add'>+hellcreek_sw-objs := hellcreek.o</div><div class='add'>+hellcreek_sw-objs += hellcreek_ptp.o</div><div class='add'>+hellcreek_sw-objs += hellcreek_hwtstamp.o</div><div class='head'>diff --git a/drivers/net/dsa/hirschmann/hellcreek.c b/drivers/net/dsa/hirschmann/hellcreek.c<br/>new file mode 100644<br/>index 000000000000..dd5f263ab984<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/hirschmann/hellcreek.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/hirschmann/hellcreek.c</a></div><div class='hunk'>@@ -0,0 +1,2117 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * DSA driver for:</div><div class='add'>+ * Hirschmann Hellcreek TSN switch.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2019-2021 Linutronix GmbH</div><div class='add'>+ * Author Kurt Kanzenbach &lt;kurt@linutronix.de&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_mdio.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/bitops.h&gt;</div><div class='add'>+#include &lt;linux/if_bridge.h&gt;</div><div class='add'>+#include &lt;linux/if_vlan.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/random.h&gt;</div><div class='add'>+#include &lt;linux/iopoll.h&gt;</div><div class='add'>+#include &lt;linux/mutex.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+</div><div class='add'>+#include "hellcreek.h"</div><div class='add'>+#include "hellcreek_ptp.h"</div><div class='add'>+#include "hellcreek_hwtstamp.h"</div><div class='add'>+</div><div class='add'>+static const struct hellcreek_counter hellcreek_counter[] = {</div><div class='add'>+	{ 0x00, "RxFiltered", },</div><div class='add'>+	{ 0x01, "RxOctets1k", },</div><div class='add'>+	{ 0x02, "RxVTAG", },</div><div class='add'>+	{ 0x03, "RxL2BAD", },</div><div class='add'>+	{ 0x04, "RxOverloadDrop", },</div><div class='add'>+	{ 0x05, "RxUC", },</div><div class='add'>+	{ 0x06, "RxMC", },</div><div class='add'>+	{ 0x07, "RxBC", },</div><div class='add'>+	{ 0x08, "RxRS&lt;64", },</div><div class='add'>+	{ 0x09, "RxRS64", },</div><div class='add'>+	{ 0x0a, "RxRS65_127", },</div><div class='add'>+	{ 0x0b, "RxRS128_255", },</div><div class='add'>+	{ 0x0c, "RxRS256_511", },</div><div class='add'>+	{ 0x0d, "RxRS512_1023", },</div><div class='add'>+	{ 0x0e, "RxRS1024_1518", },</div><div class='add'>+	{ 0x0f, "RxRS&gt;1518", },</div><div class='add'>+	{ 0x10, "TxTailDropQueue0", },</div><div class='add'>+	{ 0x11, "TxTailDropQueue1", },</div><div class='add'>+	{ 0x12, "TxTailDropQueue2", },</div><div class='add'>+	{ 0x13, "TxTailDropQueue3", },</div><div class='add'>+	{ 0x14, "TxTailDropQueue4", },</div><div class='add'>+	{ 0x15, "TxTailDropQueue5", },</div><div class='add'>+	{ 0x16, "TxTailDropQueue6", },</div><div class='add'>+	{ 0x17, "TxTailDropQueue7", },</div><div class='add'>+	{ 0x18, "RxTrafficClass0", },</div><div class='add'>+	{ 0x19, "RxTrafficClass1", },</div><div class='add'>+	{ 0x1a, "RxTrafficClass2", },</div><div class='add'>+	{ 0x1b, "RxTrafficClass3", },</div><div class='add'>+	{ 0x1c, "RxTrafficClass4", },</div><div class='add'>+	{ 0x1d, "RxTrafficClass5", },</div><div class='add'>+	{ 0x1e, "RxTrafficClass6", },</div><div class='add'>+	{ 0x1f, "RxTrafficClass7", },</div><div class='add'>+	{ 0x21, "TxOctets1k", },</div><div class='add'>+	{ 0x22, "TxVTAG", },</div><div class='add'>+	{ 0x23, "TxL2BAD", },</div><div class='add'>+	{ 0x25, "TxUC", },</div><div class='add'>+	{ 0x26, "TxMC", },</div><div class='add'>+	{ 0x27, "TxBC", },</div><div class='add'>+	{ 0x28, "TxTS&lt;64", },</div><div class='add'>+	{ 0x29, "TxTS64", },</div><div class='add'>+	{ 0x2a, "TxTS65_127", },</div><div class='add'>+	{ 0x2b, "TxTS128_255", },</div><div class='add'>+	{ 0x2c, "TxTS256_511", },</div><div class='add'>+	{ 0x2d, "TxTS512_1023", },</div><div class='add'>+	{ 0x2e, "TxTS1024_1518", },</div><div class='add'>+	{ 0x2f, "TxTS&gt;1518", },</div><div class='add'>+	{ 0x30, "TxTrafficClassOverrun0", },</div><div class='add'>+	{ 0x31, "TxTrafficClassOverrun1", },</div><div class='add'>+	{ 0x32, "TxTrafficClassOverrun2", },</div><div class='add'>+	{ 0x33, "TxTrafficClassOverrun3", },</div><div class='add'>+	{ 0x34, "TxTrafficClassOverrun4", },</div><div class='add'>+	{ 0x35, "TxTrafficClassOverrun5", },</div><div class='add'>+	{ 0x36, "TxTrafficClassOverrun6", },</div><div class='add'>+	{ 0x37, "TxTrafficClassOverrun7", },</div><div class='add'>+	{ 0x38, "TxTrafficClass0", },</div><div class='add'>+	{ 0x39, "TxTrafficClass1", },</div><div class='add'>+	{ 0x3a, "TxTrafficClass2", },</div><div class='add'>+	{ 0x3b, "TxTrafficClass3", },</div><div class='add'>+	{ 0x3c, "TxTrafficClass4", },</div><div class='add'>+	{ 0x3d, "TxTrafficClass5", },</div><div class='add'>+	{ 0x3e, "TxTrafficClass6", },</div><div class='add'>+	{ 0x3f, "TxTrafficClass7", },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static u16 hellcreek_read(struct hellcreek *hellcreek, unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	return readw(hellcreek-&gt;base + offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 hellcreek_read_ctrl(struct hellcreek *hellcreek)</div><div class='add'>+{</div><div class='add'>+	return readw(hellcreek-&gt;base + HR_CTRL_C);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 hellcreek_read_stat(struct hellcreek *hellcreek)</div><div class='add'>+{</div><div class='add'>+	return readw(hellcreek-&gt;base + HR_SWSTAT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_write(struct hellcreek *hellcreek, u16 data,</div><div class='add'>+			    unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	writew(data, hellcreek-&gt;base + offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_select_port(struct hellcreek *hellcreek, int port)</div><div class='add'>+{</div><div class='add'>+	u16 val = port &lt;&lt; HR_PSEL_PTWSEL_SHIFT;</div><div class='add'>+</div><div class='add'>+	hellcreek_write(hellcreek, val, HR_PSEL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_select_prio(struct hellcreek *hellcreek, int prio)</div><div class='add'>+{</div><div class='add'>+	u16 val = prio &lt;&lt; HR_PSEL_PRTCWSEL_SHIFT;</div><div class='add'>+</div><div class='add'>+	hellcreek_write(hellcreek, val, HR_PSEL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_select_port_prio(struct hellcreek *hellcreek, int port,</div><div class='add'>+				       int prio)</div><div class='add'>+{</div><div class='add'>+	u16 val = port &lt;&lt; HR_PSEL_PTWSEL_SHIFT;</div><div class='add'>+</div><div class='add'>+	val |= prio &lt;&lt; HR_PSEL_PRTCWSEL_SHIFT;</div><div class='add'>+</div><div class='add'>+	hellcreek_write(hellcreek, val, HR_PSEL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_select_counter(struct hellcreek *hellcreek, int counter)</div><div class='add'>+{</div><div class='add'>+	u16 val = counter &lt;&lt; HR_CSEL_SHIFT;</div><div class='add'>+</div><div class='add'>+	hellcreek_write(hellcreek, val, HR_CSEL);</div><div class='add'>+</div><div class='add'>+	/* Data sheet states to wait at least 20 internal clock cycles */</div><div class='add'>+	ndelay(200);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_select_vlan(struct hellcreek *hellcreek, int vid,</div><div class='add'>+				  bool pvid)</div><div class='add'>+{</div><div class='add'>+	u16 val = 0;</div><div class='add'>+</div><div class='add'>+	/* Set pvid bit first */</div><div class='add'>+	if (pvid)</div><div class='add'>+		val |= HR_VIDCFG_PVID;</div><div class='add'>+	hellcreek_write(hellcreek, val, HR_VIDCFG);</div><div class='add'>+</div><div class='add'>+	/* Set vlan */</div><div class='add'>+	val |= vid &lt;&lt; HR_VIDCFG_VID_SHIFT;</div><div class='add'>+	hellcreek_write(hellcreek, val, HR_VIDCFG);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_select_tgd(struct hellcreek *hellcreek, int port)</div><div class='add'>+{</div><div class='add'>+	u16 val = port &lt;&lt; TR_TGDSEL_TDGSEL_SHIFT;</div><div class='add'>+</div><div class='add'>+	hellcreek_write(hellcreek, val, TR_TGDSEL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hellcreek_wait_until_ready(struct hellcreek *hellcreek)</div><div class='add'>+{</div><div class='add'>+	u16 val;</div><div class='add'>+</div><div class='add'>+	/* Wait up to 1ms, although 3 us should be enough */</div><div class='add'>+	return readx_poll_timeout(hellcreek_read_ctrl, hellcreek,</div><div class='add'>+				  val, val &amp; HR_CTRL_C_READY,</div><div class='add'>+				  3, 1000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hellcreek_wait_until_transitioned(struct hellcreek *hellcreek)</div><div class='add'>+{</div><div class='add'>+	u16 val;</div><div class='add'>+</div><div class='add'>+	return readx_poll_timeout_atomic(hellcreek_read_ctrl, hellcreek,</div><div class='add'>+					 val, !(val &amp; HR_CTRL_C_TRANSITION),</div><div class='add'>+					 1, 1000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hellcreek_wait_fdb_ready(struct hellcreek *hellcreek)</div><div class='add'>+{</div><div class='add'>+	u16 val;</div><div class='add'>+</div><div class='add'>+	return readx_poll_timeout_atomic(hellcreek_read_stat, hellcreek,</div><div class='add'>+					 val, !(val &amp; HR_SWSTAT_BUSY),</div><div class='add'>+					 1, 1000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hellcreek_detect(struct hellcreek *hellcreek)</div><div class='add'>+{</div><div class='add'>+	u16 id, rel_low, rel_high, date_low, date_high, tgd_ver;</div><div class='add'>+	u8 tgd_maj, tgd_min;</div><div class='add'>+	u32 rel, date;</div><div class='add'>+</div><div class='add'>+	id	  = hellcreek_read(hellcreek, HR_MODID_C);</div><div class='add'>+	rel_low	  = hellcreek_read(hellcreek, HR_REL_L_C);</div><div class='add'>+	rel_high  = hellcreek_read(hellcreek, HR_REL_H_C);</div><div class='add'>+	date_low  = hellcreek_read(hellcreek, HR_BLD_L_C);</div><div class='add'>+	date_high = hellcreek_read(hellcreek, HR_BLD_H_C);</div><div class='add'>+	tgd_ver   = hellcreek_read(hellcreek, TR_TGDVER);</div><div class='add'>+</div><div class='add'>+	if (id != hellcreek-&gt;pdata-&gt;module_id)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	rel	= rel_low | (rel_high &lt;&lt; 16);</div><div class='add'>+	date	= date_low | (date_high &lt;&lt; 16);</div><div class='add'>+	tgd_maj = (tgd_ver &amp; TR_TGDVER_REV_MAJ_MASK) &gt;&gt; TR_TGDVER_REV_MAJ_SHIFT;</div><div class='add'>+	tgd_min = (tgd_ver &amp; TR_TGDVER_REV_MIN_MASK) &gt;&gt; TR_TGDVER_REV_MIN_SHIFT;</div><div class='add'>+</div><div class='add'>+	dev_info(hellcreek-&gt;dev, "Module ID=%02x Release=%04x Date=%04x TGD Version=%02x.%02x\n",</div><div class='add'>+		 id, rel, date, tgd_maj, tgd_min);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_feature_detect(struct hellcreek *hellcreek)</div><div class='add'>+{</div><div class='add'>+	u16 features;</div><div class='add'>+</div><div class='add'>+	features = hellcreek_read(hellcreek, HR_FEABITS0);</div><div class='add'>+</div><div class='add'>+	/* Only detect the size of the FDB table. The size and current</div><div class='add'>+	 * utilization can be queried via devlink.</div><div class='add'>+	 */</div><div class='add'>+	hellcreek-&gt;fdb_entries = ((features &amp; HR_FEABITS0_FDBBINS_MASK) &gt;&gt;</div><div class='add'>+			       HR_FEABITS0_FDBBINS_SHIFT) * 32;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum dsa_tag_protocol hellcreek_get_tag_protocol(struct dsa_switch *ds,</div><div class='add'>+							int port,</div><div class='add'>+							enum dsa_tag_protocol mp)</div><div class='add'>+{</div><div class='add'>+	return DSA_TAG_PROTO_HELLCREEK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hellcreek_port_enable(struct dsa_switch *ds, int port,</div><div class='add'>+				 struct phy_device *phy)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek *hellcreek = ds-&gt;priv;</div><div class='add'>+	struct hellcreek_port *hellcreek_port;</div><div class='add'>+	u16 val;</div><div class='add'>+</div><div class='add'>+	hellcreek_port = &amp;hellcreek-&gt;ports[port];</div><div class='add'>+</div><div class='add'>+	dev_dbg(hellcreek-&gt;dev, "Enable port %d\n", port);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	hellcreek_select_port(hellcreek, port);</div><div class='add'>+	val = hellcreek_port-&gt;ptcfg;</div><div class='add'>+	val |= HR_PTCFG_ADMIN_EN;</div><div class='add'>+	hellcreek_write(hellcreek, val, HR_PTCFG);</div><div class='add'>+	hellcreek_port-&gt;ptcfg = val;</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_port_disable(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek *hellcreek = ds-&gt;priv;</div><div class='add'>+	struct hellcreek_port *hellcreek_port;</div><div class='add'>+	u16 val;</div><div class='add'>+</div><div class='add'>+	hellcreek_port = &amp;hellcreek-&gt;ports[port];</div><div class='add'>+</div><div class='add'>+	dev_dbg(hellcreek-&gt;dev, "Disable port %d\n", port);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	hellcreek_select_port(hellcreek, port);</div><div class='add'>+	val = hellcreek_port-&gt;ptcfg;</div><div class='add'>+	val &amp;= ~HR_PTCFG_ADMIN_EN;</div><div class='add'>+	hellcreek_write(hellcreek, val, HR_PTCFG);</div><div class='add'>+	hellcreek_port-&gt;ptcfg = val;</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_get_strings(struct dsa_switch *ds, int port,</div><div class='add'>+				  u32 stringset, uint8_t *data)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(hellcreek_counter); ++i)</div><div class='add'>+		ethtool_puts(&amp;data, hellcreek_counter[i].name);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hellcreek_get_sset_count(struct dsa_switch *ds, int port, int sset)</div><div class='add'>+{</div><div class='add'>+	if (sset != ETH_SS_STATS)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return ARRAY_SIZE(hellcreek_counter);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_get_ethtool_stats(struct dsa_switch *ds, int port,</div><div class='add'>+					uint64_t *data)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek *hellcreek = ds-&gt;priv;</div><div class='add'>+	struct hellcreek_port *hellcreek_port;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	hellcreek_port = &amp;hellcreek-&gt;ports[port];</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(hellcreek_counter); ++i) {</div><div class='add'>+		const struct hellcreek_counter *counter = &amp;hellcreek_counter[i];</div><div class='add'>+		u8 offset = counter-&gt;offset + port * 64;</div><div class='add'>+		u16 high, low;</div><div class='add'>+		u64 value;</div><div class='add'>+</div><div class='add'>+		mutex_lock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+		hellcreek_select_counter(hellcreek, offset);</div><div class='add'>+</div><div class='add'>+		/* The registers are locked internally by selecting the</div><div class='add'>+		 * counter. So low and high can be read without reading high</div><div class='add'>+		 * again.</div><div class='add'>+		 */</div><div class='add'>+		high  = hellcreek_read(hellcreek, HR_CRDH);</div><div class='add'>+		low   = hellcreek_read(hellcreek, HR_CRDL);</div><div class='add'>+		value = ((u64)high &lt;&lt; 16) | low;</div><div class='add'>+</div><div class='add'>+		hellcreek_port-&gt;counter_values[i] += value;</div><div class='add'>+		data[i] = hellcreek_port-&gt;counter_values[i];</div><div class='add'>+</div><div class='add'>+		mutex_unlock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 hellcreek_private_vid(int port)</div><div class='add'>+{</div><div class='add'>+	return VLAN_N_VID - port + 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hellcreek_vlan_prepare(struct dsa_switch *ds, int port,</div><div class='add'>+				  const struct switchdev_obj_port_vlan *vlan,</div><div class='add'>+				  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek *hellcreek = ds-&gt;priv;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	dev_dbg(hellcreek-&gt;dev, "VLAN prepare for port %d\n", port);</div><div class='add'>+</div><div class='add'>+	/* Restriction: Make sure that nobody uses the "private" VLANs. These</div><div class='add'>+	 * VLANs are internally used by the driver to ensure port</div><div class='add'>+	 * separation. Thus, they cannot be used by someone else.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; hellcreek-&gt;pdata-&gt;num_ports; ++i) {</div><div class='add'>+		const u16 restricted_vid = hellcreek_private_vid(i);</div><div class='add'>+</div><div class='add'>+		if (!dsa_is_user_port(ds, i))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (vlan-&gt;vid == restricted_vid) {</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack, "VID restricted by driver");</div><div class='add'>+			return -EBUSY;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_select_vlan_params(struct hellcreek *hellcreek, int port,</div><div class='add'>+					 int *shift, int *mask)</div><div class='add'>+{</div><div class='add'>+	switch (port) {</div><div class='add'>+	case 0:</div><div class='add'>+		*shift = HR_VIDMBRCFG_P0MBR_SHIFT;</div><div class='add'>+		*mask  = HR_VIDMBRCFG_P0MBR_MASK;</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		*shift = HR_VIDMBRCFG_P1MBR_SHIFT;</div><div class='add'>+		*mask  = HR_VIDMBRCFG_P1MBR_MASK;</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		*shift = HR_VIDMBRCFG_P2MBR_SHIFT;</div><div class='add'>+		*mask  = HR_VIDMBRCFG_P2MBR_MASK;</div><div class='add'>+		break;</div><div class='add'>+	case 3:</div><div class='add'>+		*shift = HR_VIDMBRCFG_P3MBR_SHIFT;</div><div class='add'>+		*mask  = HR_VIDMBRCFG_P3MBR_MASK;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		*shift = *mask = 0;</div><div class='add'>+		dev_err(hellcreek-&gt;dev, "Unknown port %d selected!\n", port);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_apply_vlan(struct hellcreek *hellcreek, int port, u16 vid,</div><div class='add'>+				 bool pvid, bool untagged)</div><div class='add'>+{</div><div class='add'>+	int shift, mask;</div><div class='add'>+	u16 val;</div><div class='add'>+</div><div class='add'>+	dev_dbg(hellcreek-&gt;dev, "Apply VLAN: port=%d vid=%u pvid=%d untagged=%d",</div><div class='add'>+		port, vid, pvid, untagged);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	hellcreek_select_port(hellcreek, port);</div><div class='add'>+	hellcreek_select_vlan(hellcreek, vid, pvid);</div><div class='add'>+</div><div class='add'>+	/* Setup port vlan membership */</div><div class='add'>+	hellcreek_select_vlan_params(hellcreek, port, &amp;shift, &amp;mask);</div><div class='add'>+	val = hellcreek-&gt;vidmbrcfg[vid];</div><div class='add'>+	val &amp;= ~mask;</div><div class='add'>+	if (untagged)</div><div class='add'>+		val |= HELLCREEK_VLAN_UNTAGGED_MEMBER &lt;&lt; shift;</div><div class='add'>+	else</div><div class='add'>+		val |= HELLCREEK_VLAN_TAGGED_MEMBER &lt;&lt; shift;</div><div class='add'>+</div><div class='add'>+	hellcreek_write(hellcreek, val, HR_VIDMBRCFG);</div><div class='add'>+	hellcreek-&gt;vidmbrcfg[vid] = val;</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_unapply_vlan(struct hellcreek *hellcreek, int port,</div><div class='add'>+				   u16 vid)</div><div class='add'>+{</div><div class='add'>+	int shift, mask;</div><div class='add'>+	u16 val;</div><div class='add'>+</div><div class='add'>+	dev_dbg(hellcreek-&gt;dev, "Unapply VLAN: port=%d vid=%u\n", port, vid);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	hellcreek_select_vlan(hellcreek, vid, false);</div><div class='add'>+</div><div class='add'>+	/* Setup port vlan membership */</div><div class='add'>+	hellcreek_select_vlan_params(hellcreek, port, &amp;shift, &amp;mask);</div><div class='add'>+	val = hellcreek-&gt;vidmbrcfg[vid];</div><div class='add'>+	val &amp;= ~mask;</div><div class='add'>+	val |= HELLCREEK_VLAN_NO_MEMBER &lt;&lt; shift;</div><div class='add'>+</div><div class='add'>+	hellcreek_write(hellcreek, val, HR_VIDMBRCFG);</div><div class='add'>+	hellcreek-&gt;vidmbrcfg[vid] = val;</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hellcreek_vlan_add(struct dsa_switch *ds, int port,</div><div class='add'>+			      const struct switchdev_obj_port_vlan *vlan,</div><div class='add'>+			      struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	bool untagged = vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_UNTAGGED;</div><div class='add'>+	bool pvid = vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_PVID;</div><div class='add'>+	struct hellcreek *hellcreek = ds-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = hellcreek_vlan_prepare(ds, port, vlan, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	dev_dbg(hellcreek-&gt;dev, "Add VLAN %d on port %d, %s, %s\n",</div><div class='add'>+		vlan-&gt;vid, port, untagged ? "untagged" : "tagged",</div><div class='add'>+		pvid ? "PVID" : "no PVID");</div><div class='add'>+</div><div class='add'>+	hellcreek_apply_vlan(hellcreek, port, vlan-&gt;vid, pvid, untagged);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hellcreek_vlan_del(struct dsa_switch *ds, int port,</div><div class='add'>+			      const struct switchdev_obj_port_vlan *vlan)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek *hellcreek = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	dev_dbg(hellcreek-&gt;dev, "Remove VLAN %d on port %d\n", vlan-&gt;vid, port);</div><div class='add'>+</div><div class='add'>+	hellcreek_unapply_vlan(hellcreek, port, vlan-&gt;vid);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_port_stp_state_set(struct dsa_switch *ds, int port,</div><div class='add'>+					 u8 state)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek *hellcreek = ds-&gt;priv;</div><div class='add'>+	struct hellcreek_port *hellcreek_port;</div><div class='add'>+	const char *new_state;</div><div class='add'>+	u16 val;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	hellcreek_port = &amp;hellcreek-&gt;ports[port];</div><div class='add'>+	val = hellcreek_port-&gt;ptcfg;</div><div class='add'>+</div><div class='add'>+	switch (state) {</div><div class='add'>+	case BR_STATE_DISABLED:</div><div class='add'>+		new_state = "DISABLED";</div><div class='add'>+		val |= HR_PTCFG_BLOCKED;</div><div class='add'>+		val &amp;= ~HR_PTCFG_LEARNING_EN;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_BLOCKING:</div><div class='add'>+		new_state = "BLOCKING";</div><div class='add'>+		val |= HR_PTCFG_BLOCKED;</div><div class='add'>+		val &amp;= ~HR_PTCFG_LEARNING_EN;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_LISTENING:</div><div class='add'>+		new_state = "LISTENING";</div><div class='add'>+		val |= HR_PTCFG_BLOCKED;</div><div class='add'>+		val &amp;= ~HR_PTCFG_LEARNING_EN;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_LEARNING:</div><div class='add'>+		new_state = "LEARNING";</div><div class='add'>+		val |= HR_PTCFG_BLOCKED;</div><div class='add'>+		val |= HR_PTCFG_LEARNING_EN;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_FORWARDING:</div><div class='add'>+		new_state = "FORWARDING";</div><div class='add'>+		val &amp;= ~HR_PTCFG_BLOCKED;</div><div class='add'>+		val |= HR_PTCFG_LEARNING_EN;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		new_state = "UNKNOWN";</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hellcreek_select_port(hellcreek, port);</div><div class='add'>+	hellcreek_write(hellcreek, val, HR_PTCFG);</div><div class='add'>+	hellcreek_port-&gt;ptcfg = val;</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	dev_dbg(hellcreek-&gt;dev, "Configured STP state for port %d: %s\n",</div><div class='add'>+		port, new_state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_setup_ingressflt(struct hellcreek *hellcreek, int port,</div><div class='add'>+				       bool enable)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek_port *hellcreek_port = &amp;hellcreek-&gt;ports[port];</div><div class='add'>+	u16 ptcfg;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	ptcfg = hellcreek_port-&gt;ptcfg;</div><div class='add'>+</div><div class='add'>+	if (enable)</div><div class='add'>+		ptcfg |= HR_PTCFG_INGRESSFLT;</div><div class='add'>+	else</div><div class='add'>+		ptcfg &amp;= ~HR_PTCFG_INGRESSFLT;</div><div class='add'>+</div><div class='add'>+	hellcreek_select_port(hellcreek, port);</div><div class='add'>+	hellcreek_write(hellcreek, ptcfg, HR_PTCFG);</div><div class='add'>+	hellcreek_port-&gt;ptcfg = ptcfg;</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_setup_vlan_awareness(struct hellcreek *hellcreek,</div><div class='add'>+					   bool enable)</div><div class='add'>+{</div><div class='add'>+	u16 swcfg;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	swcfg = hellcreek-&gt;swcfg;</div><div class='add'>+</div><div class='add'>+	if (enable)</div><div class='add'>+		swcfg |= HR_SWCFG_VLAN_UNAWARE;</div><div class='add'>+	else</div><div class='add'>+		swcfg &amp;= ~HR_SWCFG_VLAN_UNAWARE;</div><div class='add'>+</div><div class='add'>+	hellcreek_write(hellcreek, swcfg, HR_SWCFG);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Default setup for DSA: VLAN &lt;X&gt;: CPU and Port &lt;X&gt; egress untagged. */</div><div class='add'>+static void hellcreek_setup_vlan_membership(struct dsa_switch *ds, int port,</div><div class='add'>+					    bool enabled)</div><div class='add'>+{</div><div class='add'>+	const u16 vid = hellcreek_private_vid(port);</div><div class='add'>+	int upstream = dsa_upstream_port(ds, port);</div><div class='add'>+	struct hellcreek *hellcreek = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	/* Apply vid to port as egress untagged and port vlan id */</div><div class='add'>+	if (enabled)</div><div class='add'>+		hellcreek_apply_vlan(hellcreek, port, vid, true, true);</div><div class='add'>+	else</div><div class='add'>+		hellcreek_unapply_vlan(hellcreek, port, vid);</div><div class='add'>+</div><div class='add'>+	/* Apply vid to cpu port as well */</div><div class='add'>+	if (enabled)</div><div class='add'>+		hellcreek_apply_vlan(hellcreek, upstream, vid, false, true);</div><div class='add'>+	else</div><div class='add'>+		hellcreek_unapply_vlan(hellcreek, upstream, vid);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_port_set_ucast_flood(struct hellcreek *hellcreek,</div><div class='add'>+					   int port, bool enable)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek_port *hellcreek_port;</div><div class='add'>+	u16 val;</div><div class='add'>+</div><div class='add'>+	hellcreek_port = &amp;hellcreek-&gt;ports[port];</div><div class='add'>+</div><div class='add'>+	dev_dbg(hellcreek-&gt;dev, "%s unicast flooding on port %d\n",</div><div class='add'>+		enable ? "Enable" : "Disable", port);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	hellcreek_select_port(hellcreek, port);</div><div class='add'>+	val = hellcreek_port-&gt;ptcfg;</div><div class='add'>+	if (enable)</div><div class='add'>+		val &amp;= ~HR_PTCFG_UUC_FLT;</div><div class='add'>+	else</div><div class='add'>+		val |= HR_PTCFG_UUC_FLT;</div><div class='add'>+	hellcreek_write(hellcreek, val, HR_PTCFG);</div><div class='add'>+	hellcreek_port-&gt;ptcfg = val;</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_port_set_mcast_flood(struct hellcreek *hellcreek,</div><div class='add'>+					   int port, bool enable)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek_port *hellcreek_port;</div><div class='add'>+	u16 val;</div><div class='add'>+</div><div class='add'>+	hellcreek_port = &amp;hellcreek-&gt;ports[port];</div><div class='add'>+</div><div class='add'>+	dev_dbg(hellcreek-&gt;dev, "%s multicast flooding on port %d\n",</div><div class='add'>+		enable ? "Enable" : "Disable", port);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	hellcreek_select_port(hellcreek, port);</div><div class='add'>+	val = hellcreek_port-&gt;ptcfg;</div><div class='add'>+	if (enable)</div><div class='add'>+		val &amp;= ~HR_PTCFG_UMC_FLT;</div><div class='add'>+	else</div><div class='add'>+		val |= HR_PTCFG_UMC_FLT;</div><div class='add'>+	hellcreek_write(hellcreek, val, HR_PTCFG);</div><div class='add'>+	hellcreek_port-&gt;ptcfg = val;</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hellcreek_pre_bridge_flags(struct dsa_switch *ds, int port,</div><div class='add'>+				      struct switchdev_brport_flags flags,</div><div class='add'>+				      struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	if (flags.mask &amp; ~(BR_FLOOD | BR_MCAST_FLOOD))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hellcreek_bridge_flags(struct dsa_switch *ds, int port,</div><div class='add'>+				  struct switchdev_brport_flags flags,</div><div class='add'>+				  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek *hellcreek = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (flags.mask &amp; BR_FLOOD)</div><div class='add'>+		hellcreek_port_set_ucast_flood(hellcreek, port,</div><div class='add'>+					       !!(flags.val &amp; BR_FLOOD));</div><div class='add'>+</div><div class='add'>+	if (flags.mask &amp; BR_MCAST_FLOOD)</div><div class='add'>+		hellcreek_port_set_mcast_flood(hellcreek, port,</div><div class='add'>+					       !!(flags.val &amp; BR_MCAST_FLOOD));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hellcreek_port_bridge_join(struct dsa_switch *ds, int port,</div><div class='add'>+				      struct dsa_bridge bridge,</div><div class='add'>+				      bool *tx_fwd_offload,</div><div class='add'>+				      struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek *hellcreek = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	dev_dbg(hellcreek-&gt;dev, "Port %d joins a bridge\n", port);</div><div class='add'>+</div><div class='add'>+	/* When joining a vlan_filtering bridge, keep the switch VLAN aware */</div><div class='add'>+	if (!ds-&gt;vlan_filtering)</div><div class='add'>+		hellcreek_setup_vlan_awareness(hellcreek, false);</div><div class='add'>+</div><div class='add'>+	/* Drop private vlans */</div><div class='add'>+	hellcreek_setup_vlan_membership(ds, port, false);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_port_bridge_leave(struct dsa_switch *ds, int port,</div><div class='add'>+					struct dsa_bridge bridge)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek *hellcreek = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	dev_dbg(hellcreek-&gt;dev, "Port %d leaves a bridge\n", port);</div><div class='add'>+</div><div class='add'>+	/* Enable VLAN awareness */</div><div class='add'>+	hellcreek_setup_vlan_awareness(hellcreek, true);</div><div class='add'>+</div><div class='add'>+	/* Enable private vlans */</div><div class='add'>+	hellcreek_setup_vlan_membership(ds, port, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __hellcreek_fdb_add(struct hellcreek *hellcreek,</div><div class='add'>+			       const struct hellcreek_fdb_entry *entry)</div><div class='add'>+{</div><div class='add'>+	u16 meta = 0;</div><div class='add'>+</div><div class='add'>+	dev_dbg(hellcreek-&gt;dev, "Add static FDB entry: MAC=%pM, MASK=0x%02x, "</div><div class='add'>+		"OBT=%d, PASS_BLOCKED=%d, REPRIO_EN=%d, PRIO=%d\n", entry-&gt;mac,</div><div class='add'>+		entry-&gt;portmask, entry-&gt;is_obt, entry-&gt;pass_blocked,</div><div class='add'>+		entry-&gt;reprio_en, entry-&gt;reprio_tc);</div><div class='add'>+</div><div class='add'>+	/* Add mac address */</div><div class='add'>+	hellcreek_write(hellcreek, entry-&gt;mac[1] | (entry-&gt;mac[0] &lt;&lt; 8), HR_FDBWDH);</div><div class='add'>+	hellcreek_write(hellcreek, entry-&gt;mac[3] | (entry-&gt;mac[2] &lt;&lt; 8), HR_FDBWDM);</div><div class='add'>+	hellcreek_write(hellcreek, entry-&gt;mac[5] | (entry-&gt;mac[4] &lt;&lt; 8), HR_FDBWDL);</div><div class='add'>+</div><div class='add'>+	/* Meta data */</div><div class='add'>+	meta |= entry-&gt;portmask &lt;&lt; HR_FDBWRM0_PORTMASK_SHIFT;</div><div class='add'>+	if (entry-&gt;is_obt)</div><div class='add'>+		meta |= HR_FDBWRM0_OBT;</div><div class='add'>+	if (entry-&gt;pass_blocked)</div><div class='add'>+		meta |= HR_FDBWRM0_PASS_BLOCKED;</div><div class='add'>+	if (entry-&gt;reprio_en) {</div><div class='add'>+		meta |= HR_FDBWRM0_REPRIO_EN;</div><div class='add'>+		meta |= entry-&gt;reprio_tc &lt;&lt; HR_FDBWRM0_REPRIO_TC_SHIFT;</div><div class='add'>+	}</div><div class='add'>+	hellcreek_write(hellcreek, meta, HR_FDBWRM0);</div><div class='add'>+</div><div class='add'>+	/* Commit */</div><div class='add'>+	hellcreek_write(hellcreek, 0x00, HR_FDBWRCMD);</div><div class='add'>+</div><div class='add'>+	/* Wait until done */</div><div class='add'>+	return hellcreek_wait_fdb_ready(hellcreek);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __hellcreek_fdb_del(struct hellcreek *hellcreek,</div><div class='add'>+			       const struct hellcreek_fdb_entry *entry)</div><div class='add'>+{</div><div class='add'>+	dev_dbg(hellcreek-&gt;dev, "Delete FDB entry: MAC=%pM!\n", entry-&gt;mac);</div><div class='add'>+</div><div class='add'>+	/* Delete by matching idx */</div><div class='add'>+	hellcreek_write(hellcreek, entry-&gt;idx | HR_FDBWRCMD_FDBDEL, HR_FDBWRCMD);</div><div class='add'>+</div><div class='add'>+	/* Wait until done */</div><div class='add'>+	return hellcreek_wait_fdb_ready(hellcreek);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_populate_fdb_entry(struct hellcreek *hellcreek,</div><div class='add'>+					 struct hellcreek_fdb_entry *entry,</div><div class='add'>+					 size_t idx)</div><div class='add'>+{</div><div class='add'>+	unsigned char addr[ETH_ALEN];</div><div class='add'>+	u16 meta, mac;</div><div class='add'>+</div><div class='add'>+	/* Read values */</div><div class='add'>+	meta	= hellcreek_read(hellcreek, HR_FDBMDRD);</div><div class='add'>+	mac	= hellcreek_read(hellcreek, HR_FDBRDL);</div><div class='add'>+	addr[5] = mac &amp; 0xff;</div><div class='add'>+	addr[4] = (mac &amp; 0xff00) &gt;&gt; 8;</div><div class='add'>+	mac	= hellcreek_read(hellcreek, HR_FDBRDM);</div><div class='add'>+	addr[3] = mac &amp; 0xff;</div><div class='add'>+	addr[2] = (mac &amp; 0xff00) &gt;&gt; 8;</div><div class='add'>+	mac	= hellcreek_read(hellcreek, HR_FDBRDH);</div><div class='add'>+	addr[1] = mac &amp; 0xff;</div><div class='add'>+	addr[0] = (mac &amp; 0xff00) &gt;&gt; 8;</div><div class='add'>+</div><div class='add'>+	/* Populate @entry */</div><div class='add'>+	memcpy(entry-&gt;mac, addr, sizeof(addr));</div><div class='add'>+	entry-&gt;idx	    = idx;</div><div class='add'>+	entry-&gt;portmask	    = (meta &amp; HR_FDBMDRD_PORTMASK_MASK) &gt;&gt;</div><div class='add'>+		HR_FDBMDRD_PORTMASK_SHIFT;</div><div class='add'>+	entry-&gt;age	    = (meta &amp; HR_FDBMDRD_AGE_MASK) &gt;&gt;</div><div class='add'>+		HR_FDBMDRD_AGE_SHIFT;</div><div class='add'>+	entry-&gt;is_obt	    = !!(meta &amp; HR_FDBMDRD_OBT);</div><div class='add'>+	entry-&gt;pass_blocked = !!(meta &amp; HR_FDBMDRD_PASS_BLOCKED);</div><div class='add'>+	entry-&gt;is_static    = !!(meta &amp; HR_FDBMDRD_STATIC);</div><div class='add'>+	entry-&gt;reprio_tc    = (meta &amp; HR_FDBMDRD_REPRIO_TC_MASK) &gt;&gt;</div><div class='add'>+		HR_FDBMDRD_REPRIO_TC_SHIFT;</div><div class='add'>+	entry-&gt;reprio_en    = !!(meta &amp; HR_FDBMDRD_REPRIO_EN);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Retrieve the index of a FDB entry by mac address. Currently we search through</div><div class='add'>+ * the complete table in hardware. If that's too slow, we might have to cache</div><div class='add'>+ * the complete FDB table in software.</div><div class='add'>+ */</div><div class='add'>+static int hellcreek_fdb_get(struct hellcreek *hellcreek,</div><div class='add'>+			     const unsigned char *dest,</div><div class='add'>+			     struct hellcreek_fdb_entry *entry)</div><div class='add'>+{</div><div class='add'>+	size_t i;</div><div class='add'>+</div><div class='add'>+	/* Set read pointer to zero: The read of HR_FDBMAX (read-only register)</div><div class='add'>+	 * should reset the internal pointer. But, that doesn't work. The vendor</div><div class='add'>+	 * suggested a subsequent write as workaround. Same for HR_FDBRDH below.</div><div class='add'>+	 */</div><div class='add'>+	hellcreek_read(hellcreek, HR_FDBMAX);</div><div class='add'>+	hellcreek_write(hellcreek, 0x00, HR_FDBMAX);</div><div class='add'>+</div><div class='add'>+	/* We have to read the complete table, because the switch/driver might</div><div class='add'>+	 * enter new entries anywhere.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; hellcreek-&gt;fdb_entries; ++i) {</div><div class='add'>+		struct hellcreek_fdb_entry tmp = { 0 };</div><div class='add'>+</div><div class='add'>+		/* Read entry */</div><div class='add'>+		hellcreek_populate_fdb_entry(hellcreek, &amp;tmp, i);</div><div class='add'>+</div><div class='add'>+		/* Force next entry */</div><div class='add'>+		hellcreek_write(hellcreek, 0x00, HR_FDBRDH);</div><div class='add'>+</div><div class='add'>+		if (memcmp(tmp.mac, dest, ETH_ALEN))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* Match found */</div><div class='add'>+		memcpy(entry, &amp;tmp, sizeof(*entry));</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -ENOENT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hellcreek_fdb_add(struct dsa_switch *ds, int port,</div><div class='add'>+			     const unsigned char *addr, u16 vid,</div><div class='add'>+			     struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek_fdb_entry entry = { 0 };</div><div class='add'>+	struct hellcreek *hellcreek = ds-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	dev_dbg(hellcreek-&gt;dev, "Add FDB entry for MAC=%pM\n", addr);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	ret = hellcreek_fdb_get(hellcreek, addr, &amp;entry);</div><div class='add'>+	if (ret) {</div><div class='add'>+		/* Not found */</div><div class='add'>+		memcpy(entry.mac, addr, sizeof(entry.mac));</div><div class='add'>+		entry.portmask = BIT(port);</div><div class='add'>+</div><div class='add'>+		ret = __hellcreek_fdb_add(hellcreek, &amp;entry);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(hellcreek-&gt;dev, "Failed to add FDB entry!\n");</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		/* Found */</div><div class='add'>+		ret = __hellcreek_fdb_del(hellcreek, &amp;entry);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(hellcreek-&gt;dev, "Failed to delete FDB entry!\n");</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		entry.portmask |= BIT(port);</div><div class='add'>+</div><div class='add'>+		ret = __hellcreek_fdb_add(hellcreek, &amp;entry);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(hellcreek-&gt;dev, "Failed to add FDB entry!\n");</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hellcreek_fdb_del(struct dsa_switch *ds, int port,</div><div class='add'>+			     const unsigned char *addr, u16 vid,</div><div class='add'>+			     struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek_fdb_entry entry = { 0 };</div><div class='add'>+	struct hellcreek *hellcreek = ds-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	dev_dbg(hellcreek-&gt;dev, "Delete FDB entry for MAC=%pM\n", addr);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	ret = hellcreek_fdb_get(hellcreek, addr, &amp;entry);</div><div class='add'>+	if (ret) {</div><div class='add'>+		/* Not found */</div><div class='add'>+		dev_err(hellcreek-&gt;dev, "FDB entry for deletion not found!\n");</div><div class='add'>+	} else {</div><div class='add'>+		/* Found */</div><div class='add'>+		ret = __hellcreek_fdb_del(hellcreek, &amp;entry);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(hellcreek-&gt;dev, "Failed to delete FDB entry!\n");</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		entry.portmask &amp;= ~BIT(port);</div><div class='add'>+</div><div class='add'>+		if (entry.portmask != 0x00) {</div><div class='add'>+			ret = __hellcreek_fdb_add(hellcreek, &amp;entry);</div><div class='add'>+			if (ret) {</div><div class='add'>+				dev_err(hellcreek-&gt;dev, "Failed to add FDB entry!\n");</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hellcreek_fdb_dump(struct dsa_switch *ds, int port,</div><div class='add'>+			      dsa_fdb_dump_cb_t *cb, void *data)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek *hellcreek = ds-&gt;priv;</div><div class='add'>+	u16 entries;</div><div class='add'>+	int ret = 0;</div><div class='add'>+	size_t i;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	/* Set read pointer to zero: The read of HR_FDBMAX (read-only register)</div><div class='add'>+	 * should reset the internal pointer. But, that doesn't work. The vendor</div><div class='add'>+	 * suggested a subsequent write as workaround. Same for HR_FDBRDH below.</div><div class='add'>+	 */</div><div class='add'>+	entries = hellcreek_read(hellcreek, HR_FDBMAX);</div><div class='add'>+	hellcreek_write(hellcreek, 0x00, HR_FDBMAX);</div><div class='add'>+</div><div class='add'>+	dev_dbg(hellcreek-&gt;dev, "FDB dump for port %d, entries=%d!\n", port, entries);</div><div class='add'>+</div><div class='add'>+	/* Read table */</div><div class='add'>+	for (i = 0; i &lt; hellcreek-&gt;fdb_entries; ++i) {</div><div class='add'>+		struct hellcreek_fdb_entry entry = { 0 };</div><div class='add'>+</div><div class='add'>+		/* Read entry */</div><div class='add'>+		hellcreek_populate_fdb_entry(hellcreek, &amp;entry, i);</div><div class='add'>+</div><div class='add'>+		/* Force next entry */</div><div class='add'>+		hellcreek_write(hellcreek, 0x00, HR_FDBRDH);</div><div class='add'>+</div><div class='add'>+		/* Check valid */</div><div class='add'>+		if (is_zero_ether_addr(entry.mac))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* Check port mask */</div><div class='add'>+		if (!(entry.portmask &amp; BIT(port)))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		ret = cb(entry.mac, 0, entry.is_static, data);</div><div class='add'>+		if (ret)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hellcreek_vlan_filtering(struct dsa_switch *ds, int port,</div><div class='add'>+				    bool vlan_filtering,</div><div class='add'>+				    struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek *hellcreek = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	dev_dbg(hellcreek-&gt;dev, "%s VLAN filtering on port %d\n",</div><div class='add'>+		vlan_filtering ? "Enable" : "Disable", port);</div><div class='add'>+</div><div class='add'>+	/* Configure port to drop packages with not known vids */</div><div class='add'>+	hellcreek_setup_ingressflt(hellcreek, port, vlan_filtering);</div><div class='add'>+</div><div class='add'>+	/* Enable VLAN awareness on the switch. This save due to</div><div class='add'>+	 * ds-&gt;vlan_filtering_is_global.</div><div class='add'>+	 */</div><div class='add'>+	hellcreek_setup_vlan_awareness(hellcreek, vlan_filtering);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hellcreek_enable_ip_core(struct hellcreek *hellcreek)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u16 val;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	val = hellcreek_read(hellcreek, HR_CTRL_C);</div><div class='add'>+	val |= HR_CTRL_C_ENABLE;</div><div class='add'>+	hellcreek_write(hellcreek, val, HR_CTRL_C);</div><div class='add'>+	ret = hellcreek_wait_until_transitioned(hellcreek);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_setup_cpu_and_tunnel_port(struct hellcreek *hellcreek)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek_port *tunnel_port = &amp;hellcreek-&gt;ports[TUNNEL_PORT];</div><div class='add'>+	struct hellcreek_port *cpu_port = &amp;hellcreek-&gt;ports[CPU_PORT];</div><div class='add'>+	u16 ptcfg = 0;</div><div class='add'>+</div><div class='add'>+	ptcfg |= HR_PTCFG_LEARNING_EN | HR_PTCFG_ADMIN_EN;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	hellcreek_select_port(hellcreek, CPU_PORT);</div><div class='add'>+	hellcreek_write(hellcreek, ptcfg, HR_PTCFG);</div><div class='add'>+</div><div class='add'>+	hellcreek_select_port(hellcreek, TUNNEL_PORT);</div><div class='add'>+	hellcreek_write(hellcreek, ptcfg, HR_PTCFG);</div><div class='add'>+</div><div class='add'>+	cpu_port-&gt;ptcfg	   = ptcfg;</div><div class='add'>+	tunnel_port-&gt;ptcfg = ptcfg;</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_setup_tc_identity_mapping(struct hellcreek *hellcreek)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* The switch has multiple egress queues per port. The queue is selected</div><div class='add'>+	 * via the PCP field in the VLAN header. The switch internally deals</div><div class='add'>+	 * with traffic classes instead of PCP values and this mapping is</div><div class='add'>+	 * configurable.</div><div class='add'>+	 *</div><div class='add'>+	 * The default mapping is (PCP - TC):</div><div class='add'>+	 *  7 - 7</div><div class='add'>+	 *  6 - 6</div><div class='add'>+	 *  5 - 5</div><div class='add'>+	 *  4 - 4</div><div class='add'>+	 *  3 - 3</div><div class='add'>+	 *  2 - 1</div><div class='add'>+	 *  1 - 0</div><div class='add'>+	 *  0 - 2</div><div class='add'>+	 *</div><div class='add'>+	 * The default should be an identity mapping.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 8; ++i) {</div><div class='add'>+		mutex_lock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+		hellcreek_select_prio(hellcreek, i);</div><div class='add'>+		hellcreek_write(hellcreek,</div><div class='add'>+				i &lt;&lt; HR_PRTCCFG_PCP_TC_MAP_SHIFT,</div><div class='add'>+				HR_PRTCCFG);</div><div class='add'>+</div><div class='add'>+		mutex_unlock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hellcreek_setup_fdb(struct hellcreek *hellcreek)</div><div class='add'>+{</div><div class='add'>+	static const struct hellcreek_fdb_entry l2_ptp = {</div><div class='add'>+		/* MAC: 01-1B-19-00-00-00 */</div><div class='add'>+		.mac	      = { 0x01, 0x1b, 0x19, 0x00, 0x00, 0x00 },</div><div class='add'>+		.portmask     = 0x03,	/* Management ports */</div><div class='add'>+		.age	      = 0,</div><div class='add'>+		.is_obt	      = 0,</div><div class='add'>+		.pass_blocked = 0,</div><div class='add'>+		.is_static    = 1,</div><div class='add'>+		.reprio_tc    = 6,	/* TC: 6 as per IEEE 802.1AS */</div><div class='add'>+		.reprio_en    = 1,</div><div class='add'>+	};</div><div class='add'>+	static const struct hellcreek_fdb_entry udp4_ptp = {</div><div class='add'>+		/* MAC: 01-00-5E-00-01-81 */</div><div class='add'>+		.mac	      = { 0x01, 0x00, 0x5e, 0x00, 0x01, 0x81 },</div><div class='add'>+		.portmask     = 0x03,	/* Management ports */</div><div class='add'>+		.age	      = 0,</div><div class='add'>+		.is_obt	      = 0,</div><div class='add'>+		.pass_blocked = 0,</div><div class='add'>+		.is_static    = 1,</div><div class='add'>+		.reprio_tc    = 6,</div><div class='add'>+		.reprio_en    = 1,</div><div class='add'>+	};</div><div class='add'>+	static const struct hellcreek_fdb_entry udp6_ptp = {</div><div class='add'>+		/* MAC: 33-33-00-00-01-81 */</div><div class='add'>+		.mac	      = { 0x33, 0x33, 0x00, 0x00, 0x01, 0x81 },</div><div class='add'>+		.portmask     = 0x03,	/* Management ports */</div><div class='add'>+		.age	      = 0,</div><div class='add'>+		.is_obt	      = 0,</div><div class='add'>+		.pass_blocked = 0,</div><div class='add'>+		.is_static    = 1,</div><div class='add'>+		.reprio_tc    = 6,</div><div class='add'>+		.reprio_en    = 1,</div><div class='add'>+	};</div><div class='add'>+	static const struct hellcreek_fdb_entry l2_p2p = {</div><div class='add'>+		/* MAC: 01-80-C2-00-00-0E */</div><div class='add'>+		.mac	      = { 0x01, 0x80, 0xc2, 0x00, 0x00, 0x0e },</div><div class='add'>+		.portmask     = 0x03,	/* Management ports */</div><div class='add'>+		.age	      = 0,</div><div class='add'>+		.is_obt	      = 0,</div><div class='add'>+		.pass_blocked = 1,</div><div class='add'>+		.is_static    = 1,</div><div class='add'>+		.reprio_tc    = 6,	/* TC: 6 as per IEEE 802.1AS */</div><div class='add'>+		.reprio_en    = 1,</div><div class='add'>+	};</div><div class='add'>+	static const struct hellcreek_fdb_entry udp4_p2p = {</div><div class='add'>+		/* MAC: 01-00-5E-00-00-6B */</div><div class='add'>+		.mac	      = { 0x01, 0x00, 0x5e, 0x00, 0x00, 0x6b },</div><div class='add'>+		.portmask     = 0x03,	/* Management ports */</div><div class='add'>+		.age	      = 0,</div><div class='add'>+		.is_obt	      = 0,</div><div class='add'>+		.pass_blocked = 1,</div><div class='add'>+		.is_static    = 1,</div><div class='add'>+		.reprio_tc    = 6,</div><div class='add'>+		.reprio_en    = 1,</div><div class='add'>+	};</div><div class='add'>+	static const struct hellcreek_fdb_entry udp6_p2p = {</div><div class='add'>+		/* MAC: 33-33-00-00-00-6B */</div><div class='add'>+		.mac	      = { 0x33, 0x33, 0x00, 0x00, 0x00, 0x6b },</div><div class='add'>+		.portmask     = 0x03,	/* Management ports */</div><div class='add'>+		.age	      = 0,</div><div class='add'>+		.is_obt	      = 0,</div><div class='add'>+		.pass_blocked = 1,</div><div class='add'>+		.is_static    = 1,</div><div class='add'>+		.reprio_tc    = 6,</div><div class='add'>+		.reprio_en    = 1,</div><div class='add'>+	};</div><div class='add'>+	static const struct hellcreek_fdb_entry stp = {</div><div class='add'>+		/* MAC: 01-80-C2-00-00-00 */</div><div class='add'>+		.mac	      = { 0x01, 0x80, 0xc2, 0x00, 0x00, 0x00 },</div><div class='add'>+		.portmask     = 0x03,	/* Management ports */</div><div class='add'>+		.age	      = 0,</div><div class='add'>+		.is_obt	      = 0,</div><div class='add'>+		.pass_blocked = 1,</div><div class='add'>+		.is_static    = 1,</div><div class='add'>+		.reprio_tc    = 6,</div><div class='add'>+		.reprio_en    = 1,</div><div class='add'>+	};</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+	ret = __hellcreek_fdb_add(hellcreek, &amp;l2_ptp);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+	ret = __hellcreek_fdb_add(hellcreek, &amp;udp4_ptp);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+	ret = __hellcreek_fdb_add(hellcreek, &amp;udp6_ptp);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+	ret = __hellcreek_fdb_add(hellcreek, &amp;l2_p2p);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+	ret = __hellcreek_fdb_add(hellcreek, &amp;udp4_p2p);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+	ret = __hellcreek_fdb_add(hellcreek, &amp;udp6_p2p);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+	ret = __hellcreek_fdb_add(hellcreek, &amp;stp);</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hellcreek_devlink_info_get(struct dsa_switch *ds,</div><div class='add'>+				      struct devlink_info_req *req,</div><div class='add'>+				      struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek *hellcreek = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return devlink_info_version_fixed_put(req,</div><div class='add'>+					      DEVLINK_INFO_VERSION_GENERIC_ASIC_ID,</div><div class='add'>+					      hellcreek-&gt;pdata-&gt;name);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 hellcreek_devlink_vlan_table_get(void *priv)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek *hellcreek = priv;</div><div class='add'>+	u64 count = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+	for (i = 0; i &lt; VLAN_N_VID; ++i)</div><div class='add'>+		if (hellcreek-&gt;vidmbrcfg[i])</div><div class='add'>+			count++;</div><div class='add'>+	mutex_unlock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 hellcreek_devlink_fdb_table_get(void *priv)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek *hellcreek = priv;</div><div class='add'>+	u64 count = 0;</div><div class='add'>+</div><div class='add'>+	/* Reading this register has side effects. Synchronize against the other</div><div class='add'>+	 * FDB operations.</div><div class='add'>+	 */</div><div class='add'>+	mutex_lock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+	count = hellcreek_read(hellcreek, HR_FDBMAX);</div><div class='add'>+	mutex_unlock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hellcreek_setup_devlink_resources(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct devlink_resource_size_params size_vlan_params;</div><div class='add'>+	struct devlink_resource_size_params size_fdb_params;</div><div class='add'>+	struct hellcreek *hellcreek = ds-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	devlink_resource_size_params_init(&amp;size_vlan_params, VLAN_N_VID,</div><div class='add'>+					  VLAN_N_VID,</div><div class='add'>+					  1, DEVLINK_RESOURCE_UNIT_ENTRY);</div><div class='add'>+</div><div class='add'>+	devlink_resource_size_params_init(&amp;size_fdb_params,</div><div class='add'>+					  hellcreek-&gt;fdb_entries,</div><div class='add'>+					  hellcreek-&gt;fdb_entries,</div><div class='add'>+					  1, DEVLINK_RESOURCE_UNIT_ENTRY);</div><div class='add'>+</div><div class='add'>+	err = dsa_devlink_resource_register(ds, "VLAN", VLAN_N_VID,</div><div class='add'>+					    HELLCREEK_DEVLINK_PARAM_ID_VLAN_TABLE,</div><div class='add'>+					    DEVLINK_RESOURCE_ID_PARENT_TOP,</div><div class='add'>+					    &amp;size_vlan_params);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	err = dsa_devlink_resource_register(ds, "FDB", hellcreek-&gt;fdb_entries,</div><div class='add'>+					    HELLCREEK_DEVLINK_PARAM_ID_FDB_TABLE,</div><div class='add'>+					    DEVLINK_RESOURCE_ID_PARENT_TOP,</div><div class='add'>+					    &amp;size_fdb_params);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	dsa_devlink_resource_occ_get_register(ds,</div><div class='add'>+					      HELLCREEK_DEVLINK_PARAM_ID_VLAN_TABLE,</div><div class='add'>+					      hellcreek_devlink_vlan_table_get,</div><div class='add'>+					      hellcreek);</div><div class='add'>+</div><div class='add'>+	dsa_devlink_resource_occ_get_register(ds,</div><div class='add'>+					      HELLCREEK_DEVLINK_PARAM_ID_FDB_TABLE,</div><div class='add'>+					      hellcreek_devlink_fdb_table_get,</div><div class='add'>+					      hellcreek);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	dsa_devlink_resources_unregister(ds);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hellcreek_devlink_region_vlan_snapshot(struct devlink *dl,</div><div class='add'>+						  const struct devlink_region_ops *ops,</div><div class='add'>+						  struct netlink_ext_ack *extack,</div><div class='add'>+						  u8 **data)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek_devlink_vlan_entry *table, *entry;</div><div class='add'>+	struct dsa_switch *ds = dsa_devlink_to_ds(dl);</div><div class='add'>+	struct hellcreek *hellcreek = ds-&gt;priv;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	table = kcalloc(VLAN_N_VID, sizeof(*entry), GFP_KERNEL);</div><div class='add'>+	if (!table)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	entry = table;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+	for (i = 0; i &lt; VLAN_N_VID; ++i, ++entry) {</div><div class='add'>+		entry-&gt;member = hellcreek-&gt;vidmbrcfg[i];</div><div class='add'>+		entry-&gt;vid    = i;</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	*data = (u8 *)table;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hellcreek_devlink_region_fdb_snapshot(struct devlink *dl,</div><div class='add'>+						 const struct devlink_region_ops *ops,</div><div class='add'>+						 struct netlink_ext_ack *extack,</div><div class='add'>+						 u8 **data)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds = dsa_devlink_to_ds(dl);</div><div class='add'>+	struct hellcreek_fdb_entry *table, *entry;</div><div class='add'>+	struct hellcreek *hellcreek = ds-&gt;priv;</div><div class='add'>+	size_t i;</div><div class='add'>+</div><div class='add'>+	table = kcalloc(hellcreek-&gt;fdb_entries, sizeof(*entry), GFP_KERNEL);</div><div class='add'>+	if (!table)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	entry = table;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	/* Start table read */</div><div class='add'>+	hellcreek_read(hellcreek, HR_FDBMAX);</div><div class='add'>+	hellcreek_write(hellcreek, 0x00, HR_FDBMAX);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; hellcreek-&gt;fdb_entries; ++i, ++entry) {</div><div class='add'>+		/* Read current entry */</div><div class='add'>+		hellcreek_populate_fdb_entry(hellcreek, entry, i);</div><div class='add'>+</div><div class='add'>+		/* Advance read pointer */</div><div class='add'>+		hellcreek_write(hellcreek, 0x00, HR_FDBRDH);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	*data = (u8 *)table;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct devlink_region_ops hellcreek_region_vlan_ops = {</div><div class='add'>+	.name	    = "vlan",</div><div class='add'>+	.snapshot   = hellcreek_devlink_region_vlan_snapshot,</div><div class='add'>+	.destructor = kfree,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct devlink_region_ops hellcreek_region_fdb_ops = {</div><div class='add'>+	.name	    = "fdb",</div><div class='add'>+	.snapshot   = hellcreek_devlink_region_fdb_snapshot,</div><div class='add'>+	.destructor = kfree,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int hellcreek_setup_devlink_regions(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek *hellcreek = ds-&gt;priv;</div><div class='add'>+	const struct devlink_region_ops *ops;</div><div class='add'>+	struct devlink_region *region;</div><div class='add'>+	u64 size;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* VLAN table */</div><div class='add'>+	size = VLAN_N_VID * sizeof(struct hellcreek_devlink_vlan_entry);</div><div class='add'>+	ops  = &amp;hellcreek_region_vlan_ops;</div><div class='add'>+</div><div class='add'>+	region = dsa_devlink_region_create(ds, ops, 1, size);</div><div class='add'>+	if (IS_ERR(region))</div><div class='add'>+		return PTR_ERR(region);</div><div class='add'>+</div><div class='add'>+	hellcreek-&gt;vlan_region = region;</div><div class='add'>+</div><div class='add'>+	/* FDB table */</div><div class='add'>+	size = hellcreek-&gt;fdb_entries * sizeof(struct hellcreek_fdb_entry);</div><div class='add'>+	ops  = &amp;hellcreek_region_fdb_ops;</div><div class='add'>+</div><div class='add'>+	region = dsa_devlink_region_create(ds, ops, 1, size);</div><div class='add'>+	if (IS_ERR(region)) {</div><div class='add'>+		ret = PTR_ERR(region);</div><div class='add'>+		goto err_fdb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hellcreek-&gt;fdb_region = region;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_fdb:</div><div class='add'>+	dsa_devlink_region_destroy(hellcreek-&gt;vlan_region);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_teardown_devlink_regions(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek *hellcreek = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	dsa_devlink_region_destroy(hellcreek-&gt;fdb_region);</div><div class='add'>+	dsa_devlink_region_destroy(hellcreek-&gt;vlan_region);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hellcreek_setup(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek *hellcreek = ds-&gt;priv;</div><div class='add'>+	u16 swcfg = 0;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	dev_dbg(hellcreek-&gt;dev, "Set up the switch\n");</div><div class='add'>+</div><div class='add'>+	/* Let's go */</div><div class='add'>+	ret = hellcreek_enable_ip_core(hellcreek);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(hellcreek-&gt;dev, "Failed to enable IP core!\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Enable CPU/Tunnel ports */</div><div class='add'>+	hellcreek_setup_cpu_and_tunnel_port(hellcreek);</div><div class='add'>+</div><div class='add'>+	/* Switch config: Keep defaults, enable FDB aging and learning and tag</div><div class='add'>+	 * each frame from/to cpu port for DSA tagging.  Also enable the length</div><div class='add'>+	 * aware shaping mode. This eliminates the need for Qbv guard bands.</div><div class='add'>+	 */</div><div class='add'>+	swcfg |= HR_SWCFG_FDBAGE_EN |</div><div class='add'>+		HR_SWCFG_FDBLRN_EN  |</div><div class='add'>+		HR_SWCFG_ALWAYS_OBT |</div><div class='add'>+		(HR_SWCFG_LAS_ON &lt;&lt; HR_SWCFG_LAS_MODE_SHIFT);</div><div class='add'>+	hellcreek-&gt;swcfg = swcfg;</div><div class='add'>+	hellcreek_write(hellcreek, swcfg, HR_SWCFG);</div><div class='add'>+</div><div class='add'>+	/* Initial vlan membership to reflect port separation */</div><div class='add'>+	for (i = 0; i &lt; ds-&gt;num_ports; ++i) {</div><div class='add'>+		if (!dsa_is_user_port(ds, i))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		hellcreek_setup_vlan_membership(ds, i, true);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Configure PCP &lt;-&gt; TC mapping */</div><div class='add'>+	hellcreek_setup_tc_identity_mapping(hellcreek);</div><div class='add'>+</div><div class='add'>+	/* The VLAN awareness is a global switch setting. Therefore, mixed vlan</div><div class='add'>+	 * filtering setups are not supported.</div><div class='add'>+	 */</div><div class='add'>+	ds-&gt;vlan_filtering_is_global = true;</div><div class='add'>+	ds-&gt;needs_standalone_vlan_filtering = true;</div><div class='add'>+</div><div class='add'>+	/* Intercept _all_ PTP multicast traffic */</div><div class='add'>+	ret = hellcreek_setup_fdb(hellcreek);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(hellcreek-&gt;dev,</div><div class='add'>+			"Failed to insert static PTP FDB entries\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Register devlink resources with DSA */</div><div class='add'>+	ret = hellcreek_setup_devlink_resources(ds);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(hellcreek-&gt;dev,</div><div class='add'>+			"Failed to setup devlink resources!\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = hellcreek_setup_devlink_regions(ds);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(hellcreek-&gt;dev,</div><div class='add'>+			"Failed to setup devlink regions!\n");</div><div class='add'>+		goto err_regions;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_regions:</div><div class='add'>+	dsa_devlink_resources_unregister(ds);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_teardown(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	hellcreek_teardown_devlink_regions(ds);</div><div class='add'>+	dsa_devlink_resources_unregister(ds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_phylink_get_caps(struct dsa_switch *ds, int port,</div><div class='add'>+				       struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek *hellcreek = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	__set_bit(PHY_INTERFACE_MODE_MII, config-&gt;supported_interfaces);</div><div class='add'>+	__set_bit(PHY_INTERFACE_MODE_RGMII, config-&gt;supported_interfaces);</div><div class='add'>+</div><div class='add'>+	/* Include GMII - the hardware does not support this interface</div><div class='add'>+	 * mode, but it's the default interface mode for phylib, so we</div><div class='add'>+	 * need it for compatibility with existing DT.</div><div class='add'>+	 */</div><div class='add'>+	__set_bit(PHY_INTERFACE_MODE_GMII, config-&gt;supported_interfaces);</div><div class='add'>+</div><div class='add'>+	/* The MAC settings are a hardware configuration option and cannot be</div><div class='add'>+	 * changed at run time or by strapping. Therefore the attached PHYs</div><div class='add'>+	 * should be programmed to only advertise settings which are supported</div><div class='add'>+	 * by the hardware.</div><div class='add'>+	 */</div><div class='add'>+	if (hellcreek-&gt;pdata-&gt;is_100_mbits)</div><div class='add'>+		config-&gt;mac_capabilities = MAC_100FD;</div><div class='add'>+	else</div><div class='add'>+		config-&gt;mac_capabilities = MAC_1000FD;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+hellcreek_port_prechangeupper(struct dsa_switch *ds, int port,</div><div class='add'>+			      struct netdev_notifier_changeupper_info *info)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek *hellcreek = ds-&gt;priv;</div><div class='add'>+	bool used = true;</div><div class='add'>+	int ret = -EBUSY;</div><div class='add'>+	u16 vid;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	dev_dbg(hellcreek-&gt;dev, "Pre change upper for port %d\n", port);</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Deny VLAN devices on top of lan ports with the same VLAN ids, because</div><div class='add'>+	 * it breaks the port separation due to the private VLANs. Example:</div><div class='add'>+	 *</div><div class='add'>+	 * lan0.100 *and* lan1.100 cannot be used in parallel. However, lan0.99</div><div class='add'>+	 * and lan1.100 works.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	if (!is_vlan_dev(info-&gt;upper_dev))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	vid = vlan_dev_vlan_id(info-&gt;upper_dev);</div><div class='add'>+</div><div class='add'>+	/* For all ports, check bitmaps */</div><div class='add'>+	mutex_lock(&amp;hellcreek-&gt;vlan_lock);</div><div class='add'>+	for (i = 0; i &lt; hellcreek-&gt;pdata-&gt;num_ports; ++i) {</div><div class='add'>+		if (!dsa_is_user_port(ds, i))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (port == i)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		used = used &amp;&amp; test_bit(vid, hellcreek-&gt;ports[i].vlan_dev_bitmap);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (used)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* Update bitmap */</div><div class='add'>+	set_bit(vid, hellcreek-&gt;ports[port].vlan_dev_bitmap);</div><div class='add'>+</div><div class='add'>+	ret = 0;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;hellcreek-&gt;vlan_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_setup_maxsdu(struct hellcreek *hellcreek, int port,</div><div class='add'>+				   const struct tc_taprio_qopt_offload *schedule)</div><div class='add'>+{</div><div class='add'>+	int tc;</div><div class='add'>+</div><div class='add'>+	for (tc = 0; tc &lt; 8; ++tc) {</div><div class='add'>+		u32 max_sdu = schedule-&gt;max_sdu[tc] + VLAN_ETH_HLEN - ETH_FCS_LEN;</div><div class='add'>+		u16 val;</div><div class='add'>+</div><div class='add'>+		if (!schedule-&gt;max_sdu[tc])</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		dev_dbg(hellcreek-&gt;dev, "Configure max-sdu %u for tc %d on port %d\n",</div><div class='add'>+			max_sdu, tc, port);</div><div class='add'>+</div><div class='add'>+		hellcreek_select_port_prio(hellcreek, port, tc);</div><div class='add'>+</div><div class='add'>+		val = (max_sdu &amp; HR_PTPRTCCFG_MAXSDU_MASK) &lt;&lt; HR_PTPRTCCFG_MAXSDU_SHIFT;</div><div class='add'>+</div><div class='add'>+		hellcreek_write(hellcreek, val, HR_PTPRTCCFG);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_reset_maxsdu(struct hellcreek *hellcreek, int port)</div><div class='add'>+{</div><div class='add'>+	int tc;</div><div class='add'>+</div><div class='add'>+	for (tc = 0; tc &lt; 8; ++tc) {</div><div class='add'>+		u16 val;</div><div class='add'>+</div><div class='add'>+		hellcreek_select_port_prio(hellcreek, port, tc);</div><div class='add'>+</div><div class='add'>+		val = (HELLCREEK_DEFAULT_MAX_SDU &amp; HR_PTPRTCCFG_MAXSDU_MASK)</div><div class='add'>+			&lt;&lt; HR_PTPRTCCFG_MAXSDU_SHIFT;</div><div class='add'>+</div><div class='add'>+		hellcreek_write(hellcreek, val, HR_PTPRTCCFG);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_setup_gcl(struct hellcreek *hellcreek, int port,</div><div class='add'>+				const struct tc_taprio_qopt_offload *schedule)</div><div class='add'>+{</div><div class='add'>+	const struct tc_taprio_sched_entry *cur, *initial, *next;</div><div class='add'>+	size_t i;</div><div class='add'>+</div><div class='add'>+	cur = initial = &amp;schedule-&gt;entries[0];</div><div class='add'>+	next = cur + 1;</div><div class='add'>+</div><div class='add'>+	for (i = 1; i &lt;= schedule-&gt;num_entries; ++i) {</div><div class='add'>+		u16 data;</div><div class='add'>+		u8 gates;</div><div class='add'>+</div><div class='add'>+		if (i == schedule-&gt;num_entries)</div><div class='add'>+			gates = initial-&gt;gate_mask ^</div><div class='add'>+				cur-&gt;gate_mask;</div><div class='add'>+		else</div><div class='add'>+			gates = next-&gt;gate_mask ^</div><div class='add'>+				cur-&gt;gate_mask;</div><div class='add'>+</div><div class='add'>+		data = gates;</div><div class='add'>+</div><div class='add'>+		if (i == schedule-&gt;num_entries)</div><div class='add'>+			data |= TR_GCLDAT_GCLWRLAST;</div><div class='add'>+</div><div class='add'>+		/* Gates states */</div><div class='add'>+		hellcreek_write(hellcreek, data, TR_GCLDAT);</div><div class='add'>+</div><div class='add'>+		/* Time interval */</div><div class='add'>+		hellcreek_write(hellcreek,</div><div class='add'>+				cur-&gt;interval &amp; 0x0000ffff,</div><div class='add'>+				TR_GCLTIL);</div><div class='add'>+		hellcreek_write(hellcreek,</div><div class='add'>+				(cur-&gt;interval &amp; 0xffff0000) &gt;&gt; 16,</div><div class='add'>+				TR_GCLTIH);</div><div class='add'>+</div><div class='add'>+		/* Commit entry */</div><div class='add'>+		data = ((i - 1) &lt;&lt; TR_GCLCMD_GCLWRADR_SHIFT) |</div><div class='add'>+			(initial-&gt;gate_mask &lt;&lt;</div><div class='add'>+			 TR_GCLCMD_INIT_GATE_STATES_SHIFT);</div><div class='add'>+		hellcreek_write(hellcreek, data, TR_GCLCMD);</div><div class='add'>+</div><div class='add'>+		cur++;</div><div class='add'>+		next++;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_set_cycle_time(struct hellcreek *hellcreek,</div><div class='add'>+				     const struct tc_taprio_qopt_offload *schedule)</div><div class='add'>+{</div><div class='add'>+	u32 cycle_time = schedule-&gt;cycle_time;</div><div class='add'>+</div><div class='add'>+	hellcreek_write(hellcreek, cycle_time &amp; 0x0000ffff, TR_CTWRL);</div><div class='add'>+	hellcreek_write(hellcreek, (cycle_time &amp; 0xffff0000) &gt;&gt; 16, TR_CTWRH);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_switch_schedule(struct hellcreek *hellcreek,</div><div class='add'>+				      ktime_t start_time)</div><div class='add'>+{</div><div class='add'>+	struct timespec64 ts = ktime_to_timespec64(start_time);</div><div class='add'>+</div><div class='add'>+	/* Start schedule at this point of time */</div><div class='add'>+	hellcreek_write(hellcreek, ts.tv_nsec &amp; 0x0000ffff, TR_ESTWRL);</div><div class='add'>+	hellcreek_write(hellcreek, (ts.tv_nsec &amp; 0xffff0000) &gt;&gt; 16, TR_ESTWRH);</div><div class='add'>+</div><div class='add'>+	/* Arm timer, set seconds and switch schedule */</div><div class='add'>+	hellcreek_write(hellcreek, TR_ESTCMD_ESTARM | TR_ESTCMD_ESTSWCFG |</div><div class='add'>+			((ts.tv_sec &amp; TR_ESTCMD_ESTSEC_MASK) &lt;&lt;</div><div class='add'>+			 TR_ESTCMD_ESTSEC_SHIFT), TR_ESTCMD);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool hellcreek_schedule_startable(struct hellcreek *hellcreek, int port)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek_port *hellcreek_port = &amp;hellcreek-&gt;ports[port];</div><div class='add'>+	s64 base_time_ns, current_ns;</div><div class='add'>+</div><div class='add'>+	/* The switch allows a schedule to be started only eight seconds within</div><div class='add'>+	 * the future. Therefore, check the current PTP time if the schedule is</div><div class='add'>+	 * startable or not.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	/* Use the "cached" time. That should be alright, as it's updated quite</div><div class='add'>+	 * frequently in the PTP code.</div><div class='add'>+	 */</div><div class='add'>+	mutex_lock(&amp;hellcreek-&gt;ptp_lock);</div><div class='add'>+	current_ns = hellcreek-&gt;seconds * NSEC_PER_SEC + hellcreek-&gt;last_ts;</div><div class='add'>+	mutex_unlock(&amp;hellcreek-&gt;ptp_lock);</div><div class='add'>+</div><div class='add'>+	/* Calculate difference to admin base time */</div><div class='add'>+	base_time_ns = ktime_to_ns(hellcreek_port-&gt;current_schedule-&gt;base_time);</div><div class='add'>+</div><div class='add'>+	return base_time_ns - current_ns &lt; (s64)4 * NSEC_PER_SEC;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_start_schedule(struct hellcreek *hellcreek, int port)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek_port *hellcreek_port = &amp;hellcreek-&gt;ports[port];</div><div class='add'>+	ktime_t base_time, current_time;</div><div class='add'>+	s64 current_ns;</div><div class='add'>+	u32 cycle_time;</div><div class='add'>+</div><div class='add'>+	/* First select port */</div><div class='add'>+	hellcreek_select_tgd(hellcreek, port);</div><div class='add'>+</div><div class='add'>+	/* Forward base time into the future if needed */</div><div class='add'>+	mutex_lock(&amp;hellcreek-&gt;ptp_lock);</div><div class='add'>+	current_ns = hellcreek-&gt;seconds * NSEC_PER_SEC + hellcreek-&gt;last_ts;</div><div class='add'>+	mutex_unlock(&amp;hellcreek-&gt;ptp_lock);</div><div class='add'>+</div><div class='add'>+	current_time = ns_to_ktime(current_ns);</div><div class='add'>+	base_time    = hellcreek_port-&gt;current_schedule-&gt;base_time;</div><div class='add'>+	cycle_time   = hellcreek_port-&gt;current_schedule-&gt;cycle_time;</div><div class='add'>+</div><div class='add'>+	if (ktime_compare(current_time, base_time) &gt; 0) {</div><div class='add'>+		s64 n;</div><div class='add'>+</div><div class='add'>+		n = div64_s64(ktime_sub_ns(current_time, base_time),</div><div class='add'>+			      cycle_time);</div><div class='add'>+		base_time = ktime_add_ns(base_time, (n + 1) * cycle_time);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set admin base time and switch schedule */</div><div class='add'>+	hellcreek_switch_schedule(hellcreek, base_time);</div><div class='add'>+</div><div class='add'>+	taprio_offload_free(hellcreek_port-&gt;current_schedule);</div><div class='add'>+	hellcreek_port-&gt;current_schedule = NULL;</div><div class='add'>+</div><div class='add'>+	dev_dbg(hellcreek-&gt;dev, "Armed EST timer for port %d\n",</div><div class='add'>+		hellcreek_port-&gt;port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_check_schedule(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct delayed_work *dw = to_delayed_work(work);</div><div class='add'>+	struct hellcreek_port *hellcreek_port;</div><div class='add'>+	struct hellcreek *hellcreek;</div><div class='add'>+	bool startable;</div><div class='add'>+</div><div class='add'>+	hellcreek_port = dw_to_hellcreek_port(dw);</div><div class='add'>+	hellcreek = hellcreek_port-&gt;hellcreek;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	/* Check starting time */</div><div class='add'>+	startable = hellcreek_schedule_startable(hellcreek,</div><div class='add'>+						 hellcreek_port-&gt;port);</div><div class='add'>+	if (startable) {</div><div class='add'>+		hellcreek_start_schedule(hellcreek, hellcreek_port-&gt;port);</div><div class='add'>+		mutex_unlock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	/* Reschedule */</div><div class='add'>+	schedule_delayed_work(&amp;hellcreek_port-&gt;schedule_work,</div><div class='add'>+			      HELLCREEK_SCHEDULE_PERIOD);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hellcreek_port_set_schedule(struct dsa_switch *ds, int port,</div><div class='add'>+				       struct tc_taprio_qopt_offload *taprio)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek *hellcreek = ds-&gt;priv;</div><div class='add'>+	struct hellcreek_port *hellcreek_port;</div><div class='add'>+	bool startable;</div><div class='add'>+	u16 ctrl;</div><div class='add'>+</div><div class='add'>+	hellcreek_port = &amp;hellcreek-&gt;ports[port];</div><div class='add'>+</div><div class='add'>+	dev_dbg(hellcreek-&gt;dev, "Configure traffic schedule on port %d\n",</div><div class='add'>+		port);</div><div class='add'>+</div><div class='add'>+	/* First cancel delayed work */</div><div class='add'>+	cancel_delayed_work_sync(&amp;hellcreek_port-&gt;schedule_work);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	if (hellcreek_port-&gt;current_schedule) {</div><div class='add'>+		taprio_offload_free(hellcreek_port-&gt;current_schedule);</div><div class='add'>+		hellcreek_port-&gt;current_schedule = NULL;</div><div class='add'>+	}</div><div class='add'>+	hellcreek_port-&gt;current_schedule = taprio_offload_get(taprio);</div><div class='add'>+</div><div class='add'>+	/* Configure max sdu */</div><div class='add'>+	hellcreek_setup_maxsdu(hellcreek, port, hellcreek_port-&gt;current_schedule);</div><div class='add'>+</div><div class='add'>+	/* Select tdg */</div><div class='add'>+	hellcreek_select_tgd(hellcreek, port);</div><div class='add'>+</div><div class='add'>+	/* Enable gating and keep defaults */</div><div class='add'>+	ctrl = (0xff &lt;&lt; TR_TGDCTRL_ADMINGATESTATES_SHIFT) | TR_TGDCTRL_GATE_EN;</div><div class='add'>+	hellcreek_write(hellcreek, ctrl, TR_TGDCTRL);</div><div class='add'>+</div><div class='add'>+	/* Cancel pending schedule */</div><div class='add'>+	hellcreek_write(hellcreek, 0x00, TR_ESTCMD);</div><div class='add'>+</div><div class='add'>+	/* Setup a new schedule */</div><div class='add'>+	hellcreek_setup_gcl(hellcreek, port, hellcreek_port-&gt;current_schedule);</div><div class='add'>+</div><div class='add'>+	/* Configure cycle time */</div><div class='add'>+	hellcreek_set_cycle_time(hellcreek, hellcreek_port-&gt;current_schedule);</div><div class='add'>+</div><div class='add'>+	/* Check starting time */</div><div class='add'>+	startable = hellcreek_schedule_startable(hellcreek, port);</div><div class='add'>+	if (startable) {</div><div class='add'>+		hellcreek_start_schedule(hellcreek, port);</div><div class='add'>+		mutex_unlock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	/* Schedule periodic schedule check */</div><div class='add'>+	schedule_delayed_work(&amp;hellcreek_port-&gt;schedule_work,</div><div class='add'>+			      HELLCREEK_SCHEDULE_PERIOD);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hellcreek_port_del_schedule(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek *hellcreek = ds-&gt;priv;</div><div class='add'>+	struct hellcreek_port *hellcreek_port;</div><div class='add'>+</div><div class='add'>+	hellcreek_port = &amp;hellcreek-&gt;ports[port];</div><div class='add'>+</div><div class='add'>+	dev_dbg(hellcreek-&gt;dev, "Remove traffic schedule on port %d\n", port);</div><div class='add'>+</div><div class='add'>+	/* First cancel delayed work */</div><div class='add'>+	cancel_delayed_work_sync(&amp;hellcreek_port-&gt;schedule_work);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	if (hellcreek_port-&gt;current_schedule) {</div><div class='add'>+		taprio_offload_free(hellcreek_port-&gt;current_schedule);</div><div class='add'>+		hellcreek_port-&gt;current_schedule = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Reset max sdu */</div><div class='add'>+	hellcreek_reset_maxsdu(hellcreek, port);</div><div class='add'>+</div><div class='add'>+	/* Select tgd */</div><div class='add'>+	hellcreek_select_tgd(hellcreek, port);</div><div class='add'>+</div><div class='add'>+	/* Disable gating and return to regular switching flow */</div><div class='add'>+	hellcreek_write(hellcreek, 0xff &lt;&lt; TR_TGDCTRL_ADMINGATESTATES_SHIFT,</div><div class='add'>+			TR_TGDCTRL);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool hellcreek_validate_schedule(struct hellcreek *hellcreek,</div><div class='add'>+					struct tc_taprio_qopt_offload *schedule)</div><div class='add'>+{</div><div class='add'>+	size_t i;</div><div class='add'>+</div><div class='add'>+	/* Does this hellcreek version support Qbv in hardware? */</div><div class='add'>+	if (!hellcreek-&gt;pdata-&gt;qbv_support)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* cycle time can only be 32bit */</div><div class='add'>+	if (schedule-&gt;cycle_time &gt; (u32)-1)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* cycle time extension is not supported */</div><div class='add'>+	if (schedule-&gt;cycle_time_extension)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* Only set command is supported */</div><div class='add'>+	for (i = 0; i &lt; schedule-&gt;num_entries; ++i)</div><div class='add'>+		if (schedule-&gt;entries[i].command != TC_TAPRIO_CMD_SET_GATES)</div><div class='add'>+			return false;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hellcreek_tc_query_caps(struct tc_query_caps_base *base)</div><div class='add'>+{</div><div class='add'>+	switch (base-&gt;type) {</div><div class='add'>+	case TC_SETUP_QDISC_TAPRIO: {</div><div class='add'>+		struct tc_taprio_caps *caps = base-&gt;caps;</div><div class='add'>+</div><div class='add'>+		caps-&gt;supports_queue_max_sdu = true;</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hellcreek_port_setup_tc(struct dsa_switch *ds, int port,</div><div class='add'>+				   enum tc_setup_type type, void *type_data)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek *hellcreek = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	switch (type) {</div><div class='add'>+	case TC_QUERY_CAPS:</div><div class='add'>+		return hellcreek_tc_query_caps(type_data);</div><div class='add'>+	case TC_SETUP_QDISC_TAPRIO: {</div><div class='add'>+		struct tc_taprio_qopt_offload *taprio = type_data;</div><div class='add'>+</div><div class='add'>+		switch (taprio-&gt;cmd) {</div><div class='add'>+		case TAPRIO_CMD_REPLACE:</div><div class='add'>+			if (!hellcreek_validate_schedule(hellcreek, taprio))</div><div class='add'>+				return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+			return hellcreek_port_set_schedule(ds, port, taprio);</div><div class='add'>+		case TAPRIO_CMD_DESTROY:</div><div class='add'>+			return hellcreek_port_del_schedule(ds, port);</div><div class='add'>+		default:</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct dsa_switch_ops hellcreek_ds_ops = {</div><div class='add'>+	.devlink_info_get      = hellcreek_devlink_info_get,</div><div class='add'>+	.get_ethtool_stats     = hellcreek_get_ethtool_stats,</div><div class='add'>+	.get_sset_count	       = hellcreek_get_sset_count,</div><div class='add'>+	.get_strings	       = hellcreek_get_strings,</div><div class='add'>+	.get_tag_protocol      = hellcreek_get_tag_protocol,</div><div class='add'>+	.get_ts_info	       = hellcreek_get_ts_info,</div><div class='add'>+	.phylink_get_caps      = hellcreek_phylink_get_caps,</div><div class='add'>+	.port_bridge_flags     = hellcreek_bridge_flags,</div><div class='add'>+	.port_bridge_join      = hellcreek_port_bridge_join,</div><div class='add'>+	.port_bridge_leave     = hellcreek_port_bridge_leave,</div><div class='add'>+	.port_disable	       = hellcreek_port_disable,</div><div class='add'>+	.port_enable	       = hellcreek_port_enable,</div><div class='add'>+	.port_fdb_add	       = hellcreek_fdb_add,</div><div class='add'>+	.port_fdb_del	       = hellcreek_fdb_del,</div><div class='add'>+	.port_fdb_dump	       = hellcreek_fdb_dump,</div><div class='add'>+	.port_hwtstamp_set     = hellcreek_port_hwtstamp_set,</div><div class='add'>+	.port_hwtstamp_get     = hellcreek_port_hwtstamp_get,</div><div class='add'>+	.port_pre_bridge_flags = hellcreek_pre_bridge_flags,</div><div class='add'>+	.port_prechangeupper   = hellcreek_port_prechangeupper,</div><div class='add'>+	.port_rxtstamp	       = hellcreek_port_rxtstamp,</div><div class='add'>+	.port_setup_tc	       = hellcreek_port_setup_tc,</div><div class='add'>+	.port_stp_state_set    = hellcreek_port_stp_state_set,</div><div class='add'>+	.port_txtstamp	       = hellcreek_port_txtstamp,</div><div class='add'>+	.port_vlan_add	       = hellcreek_vlan_add,</div><div class='add'>+	.port_vlan_del	       = hellcreek_vlan_del,</div><div class='add'>+	.port_vlan_filtering   = hellcreek_vlan_filtering,</div><div class='add'>+	.setup		       = hellcreek_setup,</div><div class='add'>+	.teardown	       = hellcreek_teardown,</div><div class='add'>+	.port_hsr_join	       = dsa_port_simple_hsr_join,</div><div class='add'>+	.port_hsr_leave	       = dsa_port_simple_hsr_leave,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int hellcreek_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct hellcreek *hellcreek;</div><div class='add'>+	struct resource *res;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	hellcreek = devm_kzalloc(dev, sizeof(*hellcreek), GFP_KERNEL);</div><div class='add'>+	if (!hellcreek)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	hellcreek-&gt;vidmbrcfg = devm_kcalloc(dev, VLAN_N_VID,</div><div class='add'>+					    sizeof(*hellcreek-&gt;vidmbrcfg),</div><div class='add'>+					    GFP_KERNEL);</div><div class='add'>+	if (!hellcreek-&gt;vidmbrcfg)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	hellcreek-&gt;pdata = of_device_get_match_data(dev);</div><div class='add'>+</div><div class='add'>+	hellcreek-&gt;ports = devm_kcalloc(dev, hellcreek-&gt;pdata-&gt;num_ports,</div><div class='add'>+					sizeof(*hellcreek-&gt;ports),</div><div class='add'>+					GFP_KERNEL);</div><div class='add'>+	if (!hellcreek-&gt;ports)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; hellcreek-&gt;pdata-&gt;num_ports; ++i) {</div><div class='add'>+		struct hellcreek_port *port = &amp;hellcreek-&gt;ports[i];</div><div class='add'>+</div><div class='add'>+		port-&gt;counter_values =</div><div class='add'>+			devm_kcalloc(dev,</div><div class='add'>+				     ARRAY_SIZE(hellcreek_counter),</div><div class='add'>+				     sizeof(*port-&gt;counter_values),</div><div class='add'>+				     GFP_KERNEL);</div><div class='add'>+		if (!port-&gt;counter_values)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		port-&gt;vlan_dev_bitmap = devm_bitmap_zalloc(dev, VLAN_N_VID,</div><div class='add'>+							   GFP_KERNEL);</div><div class='add'>+		if (!port-&gt;vlan_dev_bitmap)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		port-&gt;hellcreek	= hellcreek;</div><div class='add'>+		port-&gt;port	= i;</div><div class='add'>+</div><div class='add'>+		INIT_DELAYED_WORK(&amp;port-&gt;schedule_work,</div><div class='add'>+				  hellcreek_check_schedule);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;hellcreek-&gt;reg_lock);</div><div class='add'>+	mutex_init(&amp;hellcreek-&gt;vlan_lock);</div><div class='add'>+	mutex_init(&amp;hellcreek-&gt;ptp_lock);</div><div class='add'>+</div><div class='add'>+	hellcreek-&gt;dev = dev;</div><div class='add'>+</div><div class='add'>+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "tsn");</div><div class='add'>+	if (!res) {</div><div class='add'>+		dev_err(dev, "No memory region provided!\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hellcreek-&gt;base = devm_ioremap_resource(dev, res);</div><div class='add'>+	if (IS_ERR(hellcreek-&gt;base))</div><div class='add'>+		return PTR_ERR(hellcreek-&gt;base);</div><div class='add'>+</div><div class='add'>+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ptp");</div><div class='add'>+	if (!res) {</div><div class='add'>+		dev_err(dev, "No PTP memory region provided!\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hellcreek-&gt;ptp_base = devm_ioremap_resource(dev, res);</div><div class='add'>+	if (IS_ERR(hellcreek-&gt;ptp_base))</div><div class='add'>+		return PTR_ERR(hellcreek-&gt;ptp_base);</div><div class='add'>+</div><div class='add'>+	ret = hellcreek_detect(hellcreek);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "No (known) chip found!\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = hellcreek_wait_until_ready(hellcreek);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "Switch didn't become ready!\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hellcreek_feature_detect(hellcreek);</div><div class='add'>+</div><div class='add'>+	hellcreek-&gt;ds = devm_kzalloc(dev, sizeof(*hellcreek-&gt;ds), GFP_KERNEL);</div><div class='add'>+	if (!hellcreek-&gt;ds)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	hellcreek-&gt;ds-&gt;dev	     = dev;</div><div class='add'>+	hellcreek-&gt;ds-&gt;priv	     = hellcreek;</div><div class='add'>+	hellcreek-&gt;ds-&gt;ops	     = &amp;hellcreek_ds_ops;</div><div class='add'>+	hellcreek-&gt;ds-&gt;num_ports     = hellcreek-&gt;pdata-&gt;num_ports;</div><div class='add'>+	hellcreek-&gt;ds-&gt;num_tx_queues = HELLCREEK_NUM_EGRESS_QUEUES;</div><div class='add'>+</div><div class='add'>+	ret = dsa_register_switch(hellcreek-&gt;ds);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err_probe(dev, ret, "Unable to register switch\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = hellcreek_ptp_setup(hellcreek);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "Failed to setup PTP!\n");</div><div class='add'>+		goto err_ptp_setup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = hellcreek_hwtstamp_setup(hellcreek);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "Failed to setup hardware timestamping!\n");</div><div class='add'>+		goto err_tstamp_setup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, hellcreek);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_tstamp_setup:</div><div class='add'>+	hellcreek_ptp_free(hellcreek);</div><div class='add'>+err_ptp_setup:</div><div class='add'>+	dsa_unregister_switch(hellcreek-&gt;ds);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek *hellcreek = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	if (!hellcreek)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	hellcreek_hwtstamp_free(hellcreek);</div><div class='add'>+	hellcreek_ptp_free(hellcreek);</div><div class='add'>+	dsa_unregister_switch(hellcreek-&gt;ds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_shutdown(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek *hellcreek = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	if (!hellcreek)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dsa_switch_shutdown(hellcreek-&gt;ds);</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct hellcreek_platform_data de1soc_r1_pdata = {</div><div class='add'>+	.name		 = "r4c30",</div><div class='add'>+	.num_ports	 = 4,</div><div class='add'>+	.is_100_mbits	 = 1,</div><div class='add'>+	.qbv_support	 = 1,</div><div class='add'>+	.qbv_on_cpu_port = 1,</div><div class='add'>+	.qbu_support	 = 0,</div><div class='add'>+	.module_id	 = 0x4c30,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct of_device_id hellcreek_of_match[] = {</div><div class='add'>+	{</div><div class='add'>+		.compatible = "hirschmann,hellcreek-de1soc-r1",</div><div class='add'>+		.data	    = &amp;de1soc_r1_pdata,</div><div class='add'>+	},</div><div class='add'>+	{ /* sentinel */ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, hellcreek_of_match);</div><div class='add'>+</div><div class='add'>+static struct platform_driver hellcreek_driver = {</div><div class='add'>+	.probe	= hellcreek_probe,</div><div class='add'>+	.remove = hellcreek_remove,</div><div class='add'>+	.shutdown = hellcreek_shutdown,</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "hellcreek",</div><div class='add'>+		.of_match_table = hellcreek_of_match,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+module_platform_driver(hellcreek_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Kurt Kanzenbach &lt;kurt@linutronix.de&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Hirschmann Hellcreek driver");</div><div class='add'>+MODULE_LICENSE("Dual MIT/GPL");</div><div class='head'>diff --git a/drivers/net/dsa/hirschmann/hellcreek.h b/drivers/net/dsa/hirschmann/hellcreek.h<br/>new file mode 100644<br/>index 000000000000..bebf0d3ff330<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/hirschmann/hellcreek.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/hirschmann/hellcreek.h</a></div><div class='hunk'>@@ -0,0 +1,323 @@</div><div class='add'>+/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */</div><div class='add'>+/*</div><div class='add'>+ * DSA driver for:</div><div class='add'>+ * Hirschmann Hellcreek TSN switch.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2019-2021 Linutronix GmbH</div><div class='add'>+ * Author Kurt Kanzenbach &lt;kurt@linutronix.de&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _HELLCREEK_H_</div><div class='add'>+#define _HELLCREEK_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitmap.h&gt;</div><div class='add'>+#include &lt;linux/bitops.h&gt;</div><div class='add'>+#include &lt;linux/container_of.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/leds.h&gt;</div><div class='add'>+#include &lt;linux/mutex.h&gt;</div><div class='add'>+#include &lt;linux/platform_data/hirschmann-hellcreek.h&gt;</div><div class='add'>+#include &lt;linux/ptp_clock_kernel.h&gt;</div><div class='add'>+#include &lt;linux/timecounter.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/workqueue.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+#include &lt;net/pkt_sched.h&gt;</div><div class='add'>+</div><div class='add'>+/* Ports:</div><div class='add'>+ *  - 0: CPU</div><div class='add'>+ *  - 1: Tunnel</div><div class='add'>+ *  - 2: TSN front port 1</div><div class='add'>+ *  - 3: TSN front port 2</div><div class='add'>+ *  - ...</div><div class='add'>+ */</div><div class='add'>+#define CPU_PORT			0</div><div class='add'>+#define TUNNEL_PORT			1</div><div class='add'>+</div><div class='add'>+#define HELLCREEK_VLAN_NO_MEMBER	0x0</div><div class='add'>+#define HELLCREEK_VLAN_UNTAGGED_MEMBER	0x1</div><div class='add'>+#define HELLCREEK_VLAN_TAGGED_MEMBER	0x3</div><div class='add'>+#define HELLCREEK_NUM_EGRESS_QUEUES	8</div><div class='add'>+#define HELLCREEK_DEFAULT_MAX_SDU	1536</div><div class='add'>+</div><div class='add'>+/* Register definitions */</div><div class='add'>+#define HR_MODID_C			(0 * 2)</div><div class='add'>+#define HR_REL_L_C			(1 * 2)</div><div class='add'>+#define HR_REL_H_C			(2 * 2)</div><div class='add'>+#define HR_BLD_L_C			(3 * 2)</div><div class='add'>+#define HR_BLD_H_C			(4 * 2)</div><div class='add'>+#define HR_CTRL_C			(5 * 2)</div><div class='add'>+#define HR_CTRL_C_READY			BIT(14)</div><div class='add'>+#define HR_CTRL_C_TRANSITION		BIT(13)</div><div class='add'>+#define HR_CTRL_C_ENABLE		BIT(0)</div><div class='add'>+</div><div class='add'>+#define HR_PSEL				(0xa6 * 2)</div><div class='add'>+#define HR_PSEL_PTWSEL_SHIFT		4</div><div class='add'>+#define HR_PSEL_PTWSEL_MASK		GENMASK(5, 4)</div><div class='add'>+#define HR_PSEL_PRTCWSEL_SHIFT		0</div><div class='add'>+#define HR_PSEL_PRTCWSEL_MASK		GENMASK(2, 0)</div><div class='add'>+</div><div class='add'>+#define HR_PTCFG			(0xa7 * 2)</div><div class='add'>+#define HR_PTCFG_MLIMIT_EN		BIT(13)</div><div class='add'>+#define HR_PTCFG_UMC_FLT		BIT(10)</div><div class='add'>+#define HR_PTCFG_UUC_FLT		BIT(9)</div><div class='add'>+#define HR_PTCFG_UNTRUST		BIT(8)</div><div class='add'>+#define HR_PTCFG_TAG_REQUIRED		BIT(7)</div><div class='add'>+#define HR_PTCFG_PPRIO_SHIFT		4</div><div class='add'>+#define HR_PTCFG_PPRIO_MASK		GENMASK(6, 4)</div><div class='add'>+#define HR_PTCFG_INGRESSFLT		BIT(3)</div><div class='add'>+#define HR_PTCFG_BLOCKED		BIT(2)</div><div class='add'>+#define HR_PTCFG_LEARNING_EN		BIT(1)</div><div class='add'>+#define HR_PTCFG_ADMIN_EN		BIT(0)</div><div class='add'>+</div><div class='add'>+#define HR_PRTCCFG			(0xa8 * 2)</div><div class='add'>+#define HR_PRTCCFG_PCP_TC_MAP_SHIFT	0</div><div class='add'>+#define HR_PRTCCFG_PCP_TC_MAP_MASK	GENMASK(2, 0)</div><div class='add'>+</div><div class='add'>+#define HR_PTPRTCCFG			(0xa9 * 2)</div><div class='add'>+#define HR_PTPRTCCFG_SET_QTRACK		BIT(15)</div><div class='add'>+#define HR_PTPRTCCFG_REJECT		BIT(14)</div><div class='add'>+#define HR_PTPRTCCFG_MAXSDU_SHIFT	0</div><div class='add'>+#define HR_PTPRTCCFG_MAXSDU_MASK	GENMASK(10, 0)</div><div class='add'>+</div><div class='add'>+#define HR_CSEL				(0x8d * 2)</div><div class='add'>+#define HR_CSEL_SHIFT			0</div><div class='add'>+#define HR_CSEL_MASK			GENMASK(7, 0)</div><div class='add'>+#define HR_CRDL				(0x8e * 2)</div><div class='add'>+#define HR_CRDH				(0x8f * 2)</div><div class='add'>+</div><div class='add'>+#define HR_SWTRC_CFG			(0x90 * 2)</div><div class='add'>+#define HR_SWTRC0			(0x91 * 2)</div><div class='add'>+#define HR_SWTRC1			(0x92 * 2)</div><div class='add'>+#define HR_PFREE			(0x93 * 2)</div><div class='add'>+#define HR_MFREE			(0x94 * 2)</div><div class='add'>+</div><div class='add'>+#define HR_FDBAGE			(0x97 * 2)</div><div class='add'>+#define HR_FDBMAX			(0x98 * 2)</div><div class='add'>+#define HR_FDBRDL			(0x99 * 2)</div><div class='add'>+#define HR_FDBRDM			(0x9a * 2)</div><div class='add'>+#define HR_FDBRDH			(0x9b * 2)</div><div class='add'>+</div><div class='add'>+#define HR_FDBMDRD			(0x9c * 2)</div><div class='add'>+#define HR_FDBMDRD_PORTMASK_SHIFT	0</div><div class='add'>+#define HR_FDBMDRD_PORTMASK_MASK	GENMASK(3, 0)</div><div class='add'>+#define HR_FDBMDRD_AGE_SHIFT		4</div><div class='add'>+#define HR_FDBMDRD_AGE_MASK		GENMASK(7, 4)</div><div class='add'>+#define HR_FDBMDRD_OBT			BIT(8)</div><div class='add'>+#define HR_FDBMDRD_PASS_BLOCKED		BIT(9)</div><div class='add'>+#define HR_FDBMDRD_STATIC		BIT(11)</div><div class='add'>+#define HR_FDBMDRD_REPRIO_TC_SHIFT	12</div><div class='add'>+#define HR_FDBMDRD_REPRIO_TC_MASK	GENMASK(14, 12)</div><div class='add'>+#define HR_FDBMDRD_REPRIO_EN		BIT(15)</div><div class='add'>+</div><div class='add'>+#define HR_FDBWDL			(0x9d * 2)</div><div class='add'>+#define HR_FDBWDM			(0x9e * 2)</div><div class='add'>+#define HR_FDBWDH			(0x9f * 2)</div><div class='add'>+#define HR_FDBWRM0			(0xa0 * 2)</div><div class='add'>+#define HR_FDBWRM0_PORTMASK_SHIFT	0</div><div class='add'>+#define HR_FDBWRM0_PORTMASK_MASK	GENMASK(3, 0)</div><div class='add'>+#define HR_FDBWRM0_OBT			BIT(8)</div><div class='add'>+#define HR_FDBWRM0_PASS_BLOCKED		BIT(9)</div><div class='add'>+#define HR_FDBWRM0_REPRIO_TC_SHIFT	12</div><div class='add'>+#define HR_FDBWRM0_REPRIO_TC_MASK	GENMASK(14, 12)</div><div class='add'>+#define HR_FDBWRM0_REPRIO_EN		BIT(15)</div><div class='add'>+#define HR_FDBWRM1			(0xa1 * 2)</div><div class='add'>+</div><div class='add'>+#define HR_FDBWRCMD			(0xa2 * 2)</div><div class='add'>+#define HR_FDBWRCMD_FDBDEL		BIT(9)</div><div class='add'>+</div><div class='add'>+#define HR_SWCFG			(0xa3 * 2)</div><div class='add'>+#define HR_SWCFG_GM_STATEMD		BIT(15)</div><div class='add'>+#define HR_SWCFG_LAS_MODE_SHIFT		12</div><div class='add'>+#define HR_SWCFG_LAS_MODE_MASK		GENMASK(13, 12)</div><div class='add'>+#define HR_SWCFG_LAS_OFF		(0x00)</div><div class='add'>+#define HR_SWCFG_LAS_ON			(0x01)</div><div class='add'>+#define HR_SWCFG_LAS_STATIC		(0x10)</div><div class='add'>+#define HR_SWCFG_CT_EN			BIT(11)</div><div class='add'>+#define HR_SWCFG_VLAN_UNAWARE		BIT(10)</div><div class='add'>+#define HR_SWCFG_ALWAYS_OBT		BIT(9)</div><div class='add'>+#define HR_SWCFG_FDBAGE_EN		BIT(5)</div><div class='add'>+#define HR_SWCFG_FDBLRN_EN		BIT(4)</div><div class='add'>+</div><div class='add'>+#define HR_SWSTAT			(0xa4 * 2)</div><div class='add'>+#define HR_SWSTAT_FAIL			BIT(4)</div><div class='add'>+#define HR_SWSTAT_BUSY			BIT(0)</div><div class='add'>+</div><div class='add'>+#define HR_SWCMD			(0xa5 * 2)</div><div class='add'>+#define HW_SWCMD_FLUSH			BIT(0)</div><div class='add'>+</div><div class='add'>+#define HR_VIDCFG			(0xaa * 2)</div><div class='add'>+#define HR_VIDCFG_VID_SHIFT		0</div><div class='add'>+#define HR_VIDCFG_VID_MASK		GENMASK(11, 0)</div><div class='add'>+#define HR_VIDCFG_PVID			BIT(12)</div><div class='add'>+</div><div class='add'>+#define HR_VIDMBRCFG			(0xab * 2)</div><div class='add'>+#define HR_VIDMBRCFG_P0MBR_SHIFT	0</div><div class='add'>+#define HR_VIDMBRCFG_P0MBR_MASK		GENMASK(1, 0)</div><div class='add'>+#define HR_VIDMBRCFG_P1MBR_SHIFT	2</div><div class='add'>+#define HR_VIDMBRCFG_P1MBR_MASK		GENMASK(3, 2)</div><div class='add'>+#define HR_VIDMBRCFG_P2MBR_SHIFT	4</div><div class='add'>+#define HR_VIDMBRCFG_P2MBR_MASK		GENMASK(5, 4)</div><div class='add'>+#define HR_VIDMBRCFG_P3MBR_SHIFT	6</div><div class='add'>+#define HR_VIDMBRCFG_P3MBR_MASK		GENMASK(7, 6)</div><div class='add'>+</div><div class='add'>+#define HR_FEABITS0			(0xac * 2)</div><div class='add'>+#define HR_FEABITS0_FDBBINS_SHIFT	4</div><div class='add'>+#define HR_FEABITS0_FDBBINS_MASK	GENMASK(7, 4)</div><div class='add'>+#define HR_FEABITS0_PCNT_SHIFT		8</div><div class='add'>+#define HR_FEABITS0_PCNT_MASK		GENMASK(11, 8)</div><div class='add'>+#define HR_FEABITS0_MCNT_SHIFT		12</div><div class='add'>+#define HR_FEABITS0_MCNT_MASK		GENMASK(15, 12)</div><div class='add'>+</div><div class='add'>+#define TR_QTRACK			(0xb1 * 2)</div><div class='add'>+#define TR_TGDVER			(0xb3 * 2)</div><div class='add'>+#define TR_TGDVER_REV_MIN_MASK		GENMASK(7, 0)</div><div class='add'>+#define TR_TGDVER_REV_MIN_SHIFT		0</div><div class='add'>+#define TR_TGDVER_REV_MAJ_MASK		GENMASK(15, 8)</div><div class='add'>+#define TR_TGDVER_REV_MAJ_SHIFT		8</div><div class='add'>+#define TR_TGDSEL			(0xb4 * 2)</div><div class='add'>+#define TR_TGDSEL_TDGSEL_MASK		GENMASK(1, 0)</div><div class='add'>+#define TR_TGDSEL_TDGSEL_SHIFT		0</div><div class='add'>+#define TR_TGDCTRL			(0xb5 * 2)</div><div class='add'>+#define TR_TGDCTRL_GATE_EN		BIT(0)</div><div class='add'>+#define TR_TGDCTRL_CYC_SNAP		BIT(4)</div><div class='add'>+#define TR_TGDCTRL_SNAP_EST		BIT(5)</div><div class='add'>+#define TR_TGDCTRL_ADMINGATESTATES_MASK	GENMASK(15, 8)</div><div class='add'>+#define TR_TGDCTRL_ADMINGATESTATES_SHIFT	8</div><div class='add'>+#define TR_TGDSTAT0			(0xb6 * 2)</div><div class='add'>+#define TR_TGDSTAT1			(0xb7 * 2)</div><div class='add'>+#define TR_ESTWRL			(0xb8 * 2)</div><div class='add'>+#define TR_ESTWRH			(0xb9 * 2)</div><div class='add'>+#define TR_ESTCMD			(0xba * 2)</div><div class='add'>+#define TR_ESTCMD_ESTSEC_MASK		GENMASK(2, 0)</div><div class='add'>+#define TR_ESTCMD_ESTSEC_SHIFT		0</div><div class='add'>+#define TR_ESTCMD_ESTARM		BIT(4)</div><div class='add'>+#define TR_ESTCMD_ESTSWCFG		BIT(5)</div><div class='add'>+#define TR_EETWRL			(0xbb * 2)</div><div class='add'>+#define TR_EETWRH			(0xbc * 2)</div><div class='add'>+#define TR_EETCMD			(0xbd * 2)</div><div class='add'>+#define TR_EETCMD_EETSEC_MASK		GEMASK(2, 0)</div><div class='add'>+#define TR_EETCMD_EETSEC_SHIFT		0</div><div class='add'>+#define TR_EETCMD_EETARM		BIT(4)</div><div class='add'>+#define TR_CTWRL			(0xbe * 2)</div><div class='add'>+#define TR_CTWRH			(0xbf * 2)</div><div class='add'>+#define TR_LCNSL			(0xc1 * 2)</div><div class='add'>+#define TR_LCNSH			(0xc2 * 2)</div><div class='add'>+#define TR_LCS				(0xc3 * 2)</div><div class='add'>+#define TR_GCLDAT			(0xc4 * 2)</div><div class='add'>+#define TR_GCLDAT_GCLWRGATES_MASK	GENMASK(7, 0)</div><div class='add'>+#define TR_GCLDAT_GCLWRGATES_SHIFT	0</div><div class='add'>+#define TR_GCLDAT_GCLWRLAST		BIT(8)</div><div class='add'>+#define TR_GCLDAT_GCLOVRI		BIT(9)</div><div class='add'>+#define TR_GCLTIL			(0xc5 * 2)</div><div class='add'>+#define TR_GCLTIH			(0xc6 * 2)</div><div class='add'>+#define TR_GCLCMD			(0xc7 * 2)</div><div class='add'>+#define TR_GCLCMD_GCLWRADR_MASK		GENMASK(7, 0)</div><div class='add'>+#define TR_GCLCMD_GCLWRADR_SHIFT	0</div><div class='add'>+#define TR_GCLCMD_INIT_GATE_STATES_MASK	GENMASK(15, 8)</div><div class='add'>+#define TR_GCLCMD_INIT_GATE_STATES_SHIFT	8</div><div class='add'>+</div><div class='add'>+struct hellcreek_counter {</div><div class='add'>+	u8 offset;</div><div class='add'>+	const char *name;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hellcreek;</div><div class='add'>+</div><div class='add'>+/* State flags for hellcreek_port_hwtstamp::state */</div><div class='add'>+enum {</div><div class='add'>+	HELLCREEK_HWTSTAMP_ENABLED,</div><div class='add'>+	HELLCREEK_HWTSTAMP_TX_IN_PROGRESS,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* A structure to hold hardware timestamping information per port */</div><div class='add'>+struct hellcreek_port_hwtstamp {</div><div class='add'>+	/* Timestamping state */</div><div class='add'>+	unsigned long state;</div><div class='add'>+</div><div class='add'>+	/* Resources for receive timestamping */</div><div class='add'>+	struct sk_buff_head rx_queue; /* For synchronization messages */</div><div class='add'>+</div><div class='add'>+	/* Resources for transmit timestamping */</div><div class='add'>+	unsigned long tx_tstamp_start;</div><div class='add'>+	struct sk_buff *tx_skb;</div><div class='add'>+</div><div class='add'>+	/* Current timestamp configuration */</div><div class='add'>+	struct kernel_hwtstamp_config tstamp_config;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hellcreek_port {</div><div class='add'>+	struct hellcreek *hellcreek;</div><div class='add'>+	unsigned long *vlan_dev_bitmap;</div><div class='add'>+	int port;</div><div class='add'>+	u16 ptcfg;		/* ptcfg shadow */</div><div class='add'>+	u64 *counter_values;</div><div class='add'>+</div><div class='add'>+	/* Per-port timestamping resources */</div><div class='add'>+	struct hellcreek_port_hwtstamp port_hwtstamp;</div><div class='add'>+</div><div class='add'>+	/* Per-port Qbv schedule information */</div><div class='add'>+	struct tc_taprio_qopt_offload *current_schedule;</div><div class='add'>+	struct delayed_work schedule_work;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hellcreek_fdb_entry {</div><div class='add'>+	size_t idx;</div><div class='add'>+	unsigned char mac[ETH_ALEN];</div><div class='add'>+	u8 portmask;</div><div class='add'>+	u8 age;</div><div class='add'>+	u8 is_obt;</div><div class='add'>+	u8 pass_blocked;</div><div class='add'>+	u8 is_static;</div><div class='add'>+	u8 reprio_tc;</div><div class='add'>+	u8 reprio_en;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hellcreek {</div><div class='add'>+	const struct hellcreek_platform_data *pdata;</div><div class='add'>+	struct device *dev;</div><div class='add'>+	struct dsa_switch *ds;</div><div class='add'>+	struct ptp_clock *ptp_clock;</div><div class='add'>+	struct ptp_clock_info ptp_clock_info;</div><div class='add'>+	struct hellcreek_port *ports;</div><div class='add'>+	struct delayed_work overflow_work;</div><div class='add'>+	struct led_classdev led_is_gm;</div><div class='add'>+	struct led_classdev led_sync_good;</div><div class='add'>+	struct mutex reg_lock;	/* Switch IP register lock */</div><div class='add'>+	struct mutex vlan_lock;	/* VLAN bitmaps lock */</div><div class='add'>+	struct mutex ptp_lock;	/* PTP IP register lock */</div><div class='add'>+	struct devlink_region *vlan_region;</div><div class='add'>+	struct devlink_region *fdb_region;</div><div class='add'>+	void __iomem *base;</div><div class='add'>+	void __iomem *ptp_base;</div><div class='add'>+	u16 swcfg;		/* swcfg shadow */</div><div class='add'>+	u8 *vidmbrcfg;		/* vidmbrcfg shadow */</div><div class='add'>+	u64 seconds;		/* PTP seconds */</div><div class='add'>+	u64 last_ts;		/* Used for overflow detection */</div><div class='add'>+	u16 status_out;		/* ptp.status_out shadow */</div><div class='add'>+	size_t fdb_entries;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* A Qbv schedule can only started up to 8 seconds in the future. If the delta</div><div class='add'>+ * between the base time and the current ptp time is larger than 8 seconds, then</div><div class='add'>+ * use periodic work to check for the schedule to be started. The delayed work</div><div class='add'>+ * cannot be armed directly to $base_time - 8 + X, because for large deltas the</div><div class='add'>+ * PTP frequency matters.</div><div class='add'>+ */</div><div class='add'>+#define HELLCREEK_SCHEDULE_PERIOD	(2 * HZ)</div><div class='add'>+#define dw_to_hellcreek_port(dw)				\</div><div class='add'>+	container_of(dw, struct hellcreek_port, schedule_work)</div><div class='add'>+</div><div class='add'>+/* Devlink resources */</div><div class='add'>+enum hellcreek_devlink_resource_id {</div><div class='add'>+	HELLCREEK_DEVLINK_PARAM_ID_VLAN_TABLE,</div><div class='add'>+	HELLCREEK_DEVLINK_PARAM_ID_FDB_TABLE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct hellcreek_devlink_vlan_entry {</div><div class='add'>+	u16 vid;</div><div class='add'>+	u16 member;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif /* _HELLCREEK_H_ */</div><div class='head'>diff --git a/drivers/net/dsa/hirschmann/hellcreek_hwtstamp.c b/drivers/net/dsa/hirschmann/hellcreek_hwtstamp.c<br/>new file mode 100644<br/>index 000000000000..99941ff1ebf9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/hirschmann/hellcreek_hwtstamp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/hirschmann/hellcreek_hwtstamp.c</a></div><div class='hunk'>@@ -0,0 +1,468 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * DSA driver for:</div><div class='add'>+ * Hirschmann Hellcreek TSN switch.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2019,2020 Hochschule Offenburg</div><div class='add'>+ * Copyright (C) 2019,2020 Linutronix GmbH</div><div class='add'>+ * Authors: Kamil Alkhouri &lt;kamil.alkhouri@hs-offenburg.de&gt;</div><div class='add'>+ *	    Kurt Kanzenbach &lt;kurt@linutronix.de&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/ptp_classify.h&gt;</div><div class='add'>+</div><div class='add'>+#include "hellcreek.h"</div><div class='add'>+#include "hellcreek_hwtstamp.h"</div><div class='add'>+#include "hellcreek_ptp.h"</div><div class='add'>+</div><div class='add'>+int hellcreek_get_ts_info(struct dsa_switch *ds, int port,</div><div class='add'>+			  struct kernel_ethtool_ts_info *info)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek *hellcreek = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	info-&gt;phc_index = hellcreek-&gt;ptp_clock ?</div><div class='add'>+		ptp_clock_index(hellcreek-&gt;ptp_clock) : -1;</div><div class='add'>+	info-&gt;so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE |</div><div class='add'>+		SOF_TIMESTAMPING_RX_HARDWARE |</div><div class='add'>+		SOF_TIMESTAMPING_RAW_HARDWARE;</div><div class='add'>+</div><div class='add'>+	/* enabled tx timestamping */</div><div class='add'>+	info-&gt;tx_types = BIT(HWTSTAMP_TX_ON);</div><div class='add'>+</div><div class='add'>+	/* L2 &amp; L4 PTPv2 event rx messages are timestamped */</div><div class='add'>+	info-&gt;rx_filters = BIT(HWTSTAMP_FILTER_PTP_V2_EVENT);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Enabling/disabling TX and RX HW timestamping for different PTP messages is</div><div class='add'>+ * not available in the switch. Thus, this function only serves as a check if</div><div class='add'>+ * the user requested what is actually available or not</div><div class='add'>+ */</div><div class='add'>+static int hellcreek_set_hwtstamp_config(struct hellcreek *hellcreek, int port,</div><div class='add'>+					 struct kernel_hwtstamp_config *config)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek_port_hwtstamp *ps =</div><div class='add'>+		&amp;hellcreek-&gt;ports[port].port_hwtstamp;</div><div class='add'>+	bool tx_tstamp_enable = false;</div><div class='add'>+	bool rx_tstamp_enable = false;</div><div class='add'>+</div><div class='add'>+	/* Interaction with the timestamp hardware is prevented here.  It is</div><div class='add'>+	 * enabled when this config function ends successfully</div><div class='add'>+	 */</div><div class='add'>+	clear_bit_unlock(HELLCREEK_HWTSTAMP_ENABLED, &amp;ps-&gt;state);</div><div class='add'>+</div><div class='add'>+	switch (config-&gt;tx_type) {</div><div class='add'>+	case HWTSTAMP_TX_ON:</div><div class='add'>+		tx_tstamp_enable = true;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	/* TX HW timestamping can't be disabled on the switch */</div><div class='add'>+	case HWTSTAMP_TX_OFF:</div><div class='add'>+		config-&gt;tx_type = HWTSTAMP_TX_ON;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (config-&gt;rx_filter) {</div><div class='add'>+	/* RX HW timestamping can't be disabled on the switch */</div><div class='add'>+	case HWTSTAMP_FILTER_NONE:</div><div class='add'>+		config-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_EVENT:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_SYNC:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:</div><div class='add'>+		config-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;</div><div class='add'>+		rx_tstamp_enable = true;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	/* RX HW timestamping can't be enabled for all messages on the switch */</div><div class='add'>+	case HWTSTAMP_FILTER_ALL:</div><div class='add'>+		config-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!tx_tstamp_enable)</div><div class='add'>+		return -ERANGE;</div><div class='add'>+</div><div class='add'>+	if (!rx_tstamp_enable)</div><div class='add'>+		return -ERANGE;</div><div class='add'>+</div><div class='add'>+	/* If this point is reached, then the requested hwtstamp config is</div><div class='add'>+	 * compatible with the hwtstamp offered by the switch.  Therefore,</div><div class='add'>+	 * enable the interaction with the HW timestamping</div><div class='add'>+	 */</div><div class='add'>+	set_bit(HELLCREEK_HWTSTAMP_ENABLED, &amp;ps-&gt;state);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hellcreek_port_hwtstamp_set(struct dsa_switch *ds, int port,</div><div class='add'>+				struct kernel_hwtstamp_config *config,</div><div class='add'>+				struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek *hellcreek = ds-&gt;priv;</div><div class='add'>+	struct hellcreek_port_hwtstamp *ps;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	ps = &amp;hellcreek-&gt;ports[port].port_hwtstamp;</div><div class='add'>+</div><div class='add'>+	err = hellcreek_set_hwtstamp_config(hellcreek, port, config);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Save the chosen configuration to be returned later */</div><div class='add'>+	ps-&gt;tstamp_config = *config;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hellcreek_port_hwtstamp_get(struct dsa_switch *ds, int port,</div><div class='add'>+				struct kernel_hwtstamp_config *config)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek *hellcreek = ds-&gt;priv;</div><div class='add'>+	struct hellcreek_port_hwtstamp *ps;</div><div class='add'>+</div><div class='add'>+	ps = &amp;hellcreek-&gt;ports[port].port_hwtstamp;</div><div class='add'>+	*config = ps-&gt;tstamp_config;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Returns a pointer to the PTP header if the caller should time stamp, or NULL</div><div class='add'>+ * if the caller should not.</div><div class='add'>+ */</div><div class='add'>+static struct ptp_header *hellcreek_should_tstamp(struct hellcreek *hellcreek,</div><div class='add'>+						  int port, struct sk_buff *skb,</div><div class='add'>+						  unsigned int type)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek_port_hwtstamp *ps =</div><div class='add'>+		&amp;hellcreek-&gt;ports[port].port_hwtstamp;</div><div class='add'>+	struct ptp_header *hdr;</div><div class='add'>+</div><div class='add'>+	hdr = ptp_parse_header(skb, type);</div><div class='add'>+	if (!hdr)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(HELLCREEK_HWTSTAMP_ENABLED, &amp;ps-&gt;state))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	return hdr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 hellcreek_get_reserved_field(const struct ptp_header *hdr)</div><div class='add'>+{</div><div class='add'>+	return be32_to_cpu(hdr-&gt;reserved2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_clear_reserved_field(struct ptp_header *hdr)</div><div class='add'>+{</div><div class='add'>+	hdr-&gt;reserved2 = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hellcreek_ptp_hwtstamp_available(struct hellcreek *hellcreek,</div><div class='add'>+					    unsigned int ts_reg)</div><div class='add'>+{</div><div class='add'>+	u16 status;</div><div class='add'>+</div><div class='add'>+	status = hellcreek_ptp_read(hellcreek, ts_reg);</div><div class='add'>+</div><div class='add'>+	if (status &amp; PR_TS_STATUS_TS_LOST)</div><div class='add'>+		dev_err(hellcreek-&gt;dev,</div><div class='add'>+			"Tx time stamp lost! This should never happen!\n");</div><div class='add'>+</div><div class='add'>+	/* If hwtstamp is not available, this means the previous hwtstamp was</div><div class='add'>+	 * successfully read, and the one we need is not yet available</div><div class='add'>+	 */</div><div class='add'>+	return (status &amp; PR_TS_STATUS_TS_AVAIL) ? 1 : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Get nanoseconds timestamp from timestamping unit */</div><div class='add'>+static u64 hellcreek_ptp_hwtstamp_read(struct hellcreek *hellcreek,</div><div class='add'>+				       unsigned int ts_reg)</div><div class='add'>+{</div><div class='add'>+	u16 nsl, nsh;</div><div class='add'>+</div><div class='add'>+	nsh = hellcreek_ptp_read(hellcreek, ts_reg);</div><div class='add'>+	nsh = hellcreek_ptp_read(hellcreek, ts_reg);</div><div class='add'>+	nsh = hellcreek_ptp_read(hellcreek, ts_reg);</div><div class='add'>+	nsh = hellcreek_ptp_read(hellcreek, ts_reg);</div><div class='add'>+	nsl = hellcreek_ptp_read(hellcreek, ts_reg);</div><div class='add'>+</div><div class='add'>+	return (u64)nsl | ((u64)nsh &lt;&lt; 16);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hellcreek_txtstamp_work(struct hellcreek *hellcreek,</div><div class='add'>+				   struct hellcreek_port_hwtstamp *ps, int port)</div><div class='add'>+{</div><div class='add'>+	struct skb_shared_hwtstamps shhwtstamps;</div><div class='add'>+	unsigned int status_reg, data_reg;</div><div class='add'>+	struct sk_buff *tmp_skb;</div><div class='add'>+	int ts_status;</div><div class='add'>+	u64 ns = 0;</div><div class='add'>+</div><div class='add'>+	if (!ps-&gt;tx_skb)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	switch (port) {</div><div class='add'>+	case 2:</div><div class='add'>+		status_reg = PR_TS_TX_P1_STATUS_C;</div><div class='add'>+		data_reg   = PR_TS_TX_P1_DATA_C;</div><div class='add'>+		break;</div><div class='add'>+	case 3:</div><div class='add'>+		status_reg = PR_TS_TX_P2_STATUS_C;</div><div class='add'>+		data_reg   = PR_TS_TX_P2_DATA_C;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(hellcreek-&gt;dev, "Wrong port for timestamping!\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ts_status = hellcreek_ptp_hwtstamp_available(hellcreek, status_reg);</div><div class='add'>+</div><div class='add'>+	/* Not available yet? */</div><div class='add'>+	if (ts_status == 0) {</div><div class='add'>+		/* Check whether the operation of reading the tx timestamp has</div><div class='add'>+		 * exceeded its allowed period</div><div class='add'>+		 */</div><div class='add'>+		if (time_is_before_jiffies(ps-&gt;tx_tstamp_start +</div><div class='add'>+					   TX_TSTAMP_TIMEOUT)) {</div><div class='add'>+			dev_err(hellcreek-&gt;dev,</div><div class='add'>+				"Timeout while waiting for Tx timestamp!\n");</div><div class='add'>+			goto free_and_clear_skb;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* The timestamp should be available quickly, while getting it</div><div class='add'>+		 * in high priority. Restart the work</div><div class='add'>+		 */</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;hellcreek-&gt;ptp_lock);</div><div class='add'>+	ns  = hellcreek_ptp_hwtstamp_read(hellcreek, data_reg);</div><div class='add'>+	ns += hellcreek_ptp_gettime_seconds(hellcreek, ns);</div><div class='add'>+	mutex_unlock(&amp;hellcreek-&gt;ptp_lock);</div><div class='add'>+</div><div class='add'>+	/* Now we have the timestamp in nanoseconds, store it in the correct</div><div class='add'>+	 * structure in order to send it to the user</div><div class='add'>+	 */</div><div class='add'>+	memset(&amp;shhwtstamps, 0, sizeof(shhwtstamps));</div><div class='add'>+	shhwtstamps.hwtstamp = ns_to_ktime(ns);</div><div class='add'>+</div><div class='add'>+	tmp_skb = ps-&gt;tx_skb;</div><div class='add'>+	ps-&gt;tx_skb = NULL;</div><div class='add'>+</div><div class='add'>+	/* skb_complete_tx_timestamp() frees up the client to make another</div><div class='add'>+	 * timestampable transmit.  We have to be ready for it by clearing the</div><div class='add'>+	 * ps-&gt;tx_skb "flag" beforehand</div><div class='add'>+	 */</div><div class='add'>+	clear_bit_unlock(HELLCREEK_HWTSTAMP_TX_IN_PROGRESS, &amp;ps-&gt;state);</div><div class='add'>+</div><div class='add'>+	/* Deliver a clone of the original outgoing tx_skb with tx hwtstamp */</div><div class='add'>+	skb_complete_tx_timestamp(tmp_skb, &amp;shhwtstamps);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+free_and_clear_skb:</div><div class='add'>+	dev_kfree_skb_any(ps-&gt;tx_skb);</div><div class='add'>+	ps-&gt;tx_skb = NULL;</div><div class='add'>+	clear_bit_unlock(HELLCREEK_HWTSTAMP_TX_IN_PROGRESS, &amp;ps-&gt;state);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_get_rxts(struct hellcreek *hellcreek,</div><div class='add'>+			       struct hellcreek_port_hwtstamp *ps,</div><div class='add'>+			       struct sk_buff *skb, struct sk_buff_head *rxq,</div><div class='add'>+			       int port)</div><div class='add'>+{</div><div class='add'>+	struct skb_shared_hwtstamps *shwt;</div><div class='add'>+	struct sk_buff_head received;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	/* Construct Rx timestamps for all received PTP packets. */</div><div class='add'>+	__skb_queue_head_init(&amp;received);</div><div class='add'>+	spin_lock_irqsave(&amp;rxq-&gt;lock, flags);</div><div class='add'>+	skb_queue_splice_tail_init(rxq, &amp;received);</div><div class='add'>+	spin_unlock_irqrestore(&amp;rxq-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	for (; skb; skb = __skb_dequeue(&amp;received)) {</div><div class='add'>+		struct ptp_header *hdr;</div><div class='add'>+		unsigned int type;</div><div class='add'>+		u64 ns;</div><div class='add'>+</div><div class='add'>+		/* Get nanoseconds from ptp packet */</div><div class='add'>+		type = SKB_PTP_TYPE(skb);</div><div class='add'>+		hdr  = ptp_parse_header(skb, type);</div><div class='add'>+		ns   = hellcreek_get_reserved_field(hdr);</div><div class='add'>+		hellcreek_clear_reserved_field(hdr);</div><div class='add'>+</div><div class='add'>+		/* Add seconds part */</div><div class='add'>+		mutex_lock(&amp;hellcreek-&gt;ptp_lock);</div><div class='add'>+		ns += hellcreek_ptp_gettime_seconds(hellcreek, ns);</div><div class='add'>+		mutex_unlock(&amp;hellcreek-&gt;ptp_lock);</div><div class='add'>+</div><div class='add'>+		/* Save time stamp */</div><div class='add'>+		shwt = skb_hwtstamps(skb);</div><div class='add'>+		memset(shwt, 0, sizeof(*shwt));</div><div class='add'>+		shwt-&gt;hwtstamp = ns_to_ktime(ns);</div><div class='add'>+		netif_rx(skb);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_rxtstamp_work(struct hellcreek *hellcreek,</div><div class='add'>+				    struct hellcreek_port_hwtstamp *ps,</div><div class='add'>+				    int port)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	skb = skb_dequeue(&amp;ps-&gt;rx_queue);</div><div class='add'>+	if (skb)</div><div class='add'>+		hellcreek_get_rxts(hellcreek, ps, skb, &amp;ps-&gt;rx_queue, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+long hellcreek_hwtstamp_work(struct ptp_clock_info *ptp)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek *hellcreek = ptp_to_hellcreek(ptp);</div><div class='add'>+	struct dsa_switch *ds = hellcreek-&gt;ds;</div><div class='add'>+	int i, restart = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ds-&gt;num_ports; i++) {</div><div class='add'>+		struct hellcreek_port_hwtstamp *ps;</div><div class='add'>+</div><div class='add'>+		if (!dsa_is_user_port(ds, i))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		ps = &amp;hellcreek-&gt;ports[i].port_hwtstamp;</div><div class='add'>+</div><div class='add'>+		if (test_bit(HELLCREEK_HWTSTAMP_TX_IN_PROGRESS, &amp;ps-&gt;state))</div><div class='add'>+			restart |= hellcreek_txtstamp_work(hellcreek, ps, i);</div><div class='add'>+</div><div class='add'>+		hellcreek_rxtstamp_work(hellcreek, ps, i);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return restart ? 1 : -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hellcreek_port_txtstamp(struct dsa_switch *ds, int port,</div><div class='add'>+			     struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek *hellcreek = ds-&gt;priv;</div><div class='add'>+	struct hellcreek_port_hwtstamp *ps;</div><div class='add'>+	struct ptp_header *hdr;</div><div class='add'>+	struct sk_buff *clone;</div><div class='add'>+	unsigned int type;</div><div class='add'>+</div><div class='add'>+	ps = &amp;hellcreek-&gt;ports[port].port_hwtstamp;</div><div class='add'>+</div><div class='add'>+	type = ptp_classify_raw(skb);</div><div class='add'>+	if (type == PTP_CLASS_NONE)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Make sure the message is a PTP message that needs to be timestamped</div><div class='add'>+	 * and the interaction with the HW timestamping is enabled. If not, stop</div><div class='add'>+	 * here</div><div class='add'>+	 */</div><div class='add'>+	hdr = hellcreek_should_tstamp(hellcreek, port, skb, type);</div><div class='add'>+	if (!hdr)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	clone = skb_clone_sk(skb);</div><div class='add'>+	if (!clone)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (test_and_set_bit_lock(HELLCREEK_HWTSTAMP_TX_IN_PROGRESS,</div><div class='add'>+				  &amp;ps-&gt;state)) {</div><div class='add'>+		kfree_skb(clone);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ps-&gt;tx_skb = clone;</div><div class='add'>+</div><div class='add'>+	/* store the number of ticks occurred since system start-up till this</div><div class='add'>+	 * moment</div><div class='add'>+	 */</div><div class='add'>+	ps-&gt;tx_tstamp_start = jiffies;</div><div class='add'>+</div><div class='add'>+	ptp_schedule_worker(hellcreek-&gt;ptp_clock, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool hellcreek_port_rxtstamp(struct dsa_switch *ds, int port,</div><div class='add'>+			     struct sk_buff *skb, unsigned int type)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek *hellcreek = ds-&gt;priv;</div><div class='add'>+	struct hellcreek_port_hwtstamp *ps;</div><div class='add'>+	struct ptp_header *hdr;</div><div class='add'>+</div><div class='add'>+	ps = &amp;hellcreek-&gt;ports[port].port_hwtstamp;</div><div class='add'>+</div><div class='add'>+	/* This check only fails if the user did not initialize hardware</div><div class='add'>+	 * timestamping beforehand.</div><div class='add'>+	 */</div><div class='add'>+	if (ps-&gt;tstamp_config.rx_filter != HWTSTAMP_FILTER_PTP_V2_EVENT)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* Make sure the message is a PTP message that needs to be timestamped</div><div class='add'>+	 * and the interaction with the HW timestamping is enabled. If not, stop</div><div class='add'>+	 * here</div><div class='add'>+	 */</div><div class='add'>+	hdr = hellcreek_should_tstamp(hellcreek, port, skb, type);</div><div class='add'>+	if (!hdr)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	SKB_PTP_TYPE(skb) = type;</div><div class='add'>+</div><div class='add'>+	skb_queue_tail(&amp;ps-&gt;rx_queue, skb);</div><div class='add'>+</div><div class='add'>+	ptp_schedule_worker(hellcreek-&gt;ptp_clock, 0);</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_hwtstamp_port_setup(struct hellcreek *hellcreek, int port)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek_port_hwtstamp *ps =</div><div class='add'>+		&amp;hellcreek-&gt;ports[port].port_hwtstamp;</div><div class='add'>+</div><div class='add'>+	skb_queue_head_init(&amp;ps-&gt;rx_queue);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hellcreek_hwtstamp_setup(struct hellcreek *hellcreek)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds = hellcreek-&gt;ds;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Initialize timestamping ports. */</div><div class='add'>+	for (i = 0; i &lt; ds-&gt;num_ports; ++i) {</div><div class='add'>+		if (!dsa_is_user_port(ds, i))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		hellcreek_hwtstamp_port_setup(hellcreek, i);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Select the synchronized clock as the source timekeeper for the</div><div class='add'>+	 * timestamps and enable inline timestamping.</div><div class='add'>+	 */</div><div class='add'>+	hellcreek_ptp_write(hellcreek, PR_SETTINGS_C_TS_SRC_TK_MASK |</div><div class='add'>+			    PR_SETTINGS_C_RES3TS,</div><div class='add'>+			    PR_SETTINGS_C);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hellcreek_hwtstamp_free(struct hellcreek *hellcreek)</div><div class='add'>+{</div><div class='add'>+	/* Nothing todo */</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/dsa/hirschmann/hellcreek_hwtstamp.h b/drivers/net/dsa/hirschmann/hellcreek_hwtstamp.h<br/>new file mode 100644<br/>index 000000000000..388821c4aa10<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/hirschmann/hellcreek_hwtstamp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/hirschmann/hellcreek_hwtstamp.h</a></div><div class='hunk'>@@ -0,0 +1,59 @@</div><div class='add'>+/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */</div><div class='add'>+/*</div><div class='add'>+ * DSA driver for:</div><div class='add'>+ * Hirschmann Hellcreek TSN switch.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2019,2020 Hochschule Offenburg</div><div class='add'>+ * Copyright (C) 2019,2020 Linutronix GmbH</div><div class='add'>+ * Authors: Kurt Kanzenbach &lt;kurt@linutronix.de&gt;</div><div class='add'>+ *	    Kamil Alkhouri &lt;kamil.alkhouri@hs-offenburg.de&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _HELLCREEK_HWTSTAMP_H_</div><div class='add'>+#define _HELLCREEK_HWTSTAMP_H_</div><div class='add'>+</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+#include "hellcreek.h"</div><div class='add'>+</div><div class='add'>+/* Timestamp Register */</div><div class='add'>+#define PR_TS_RX_P1_STATUS_C	(0x1d * 2)</div><div class='add'>+#define PR_TS_RX_P1_DATA_C	(0x1e * 2)</div><div class='add'>+#define PR_TS_TX_P1_STATUS_C	(0x1f * 2)</div><div class='add'>+#define PR_TS_TX_P1_DATA_C	(0x20 * 2)</div><div class='add'>+#define PR_TS_RX_P2_STATUS_C	(0x25 * 2)</div><div class='add'>+#define PR_TS_RX_P2_DATA_C	(0x26 * 2)</div><div class='add'>+#define PR_TS_TX_P2_STATUS_C	(0x27 * 2)</div><div class='add'>+#define PR_TS_TX_P2_DATA_C	(0x28 * 2)</div><div class='add'>+</div><div class='add'>+#define PR_TS_STATUS_TS_AVAIL	BIT(2)</div><div class='add'>+#define PR_TS_STATUS_TS_LOST	BIT(3)</div><div class='add'>+</div><div class='add'>+#define SKB_PTP_TYPE(__skb) (*(unsigned int *)((__skb)-&gt;cb))</div><div class='add'>+</div><div class='add'>+/* TX_TSTAMP_TIMEOUT: This limits the time spent polling for a TX</div><div class='add'>+ * timestamp. When working properly, hardware will produce a timestamp</div><div class='add'>+ * within 1ms. Software may enounter delays, so the timeout is set</div><div class='add'>+ * accordingly.</div><div class='add'>+ */</div><div class='add'>+#define TX_TSTAMP_TIMEOUT	msecs_to_jiffies(40)</div><div class='add'>+</div><div class='add'>+int hellcreek_port_hwtstamp_set(struct dsa_switch *ds, int port,</div><div class='add'>+				struct kernel_hwtstamp_config *config,</div><div class='add'>+				struct netlink_ext_ack *extack);</div><div class='add'>+int hellcreek_port_hwtstamp_get(struct dsa_switch *ds, int port,</div><div class='add'>+				struct kernel_hwtstamp_config *config);</div><div class='add'>+</div><div class='add'>+bool hellcreek_port_rxtstamp(struct dsa_switch *ds, int port,</div><div class='add'>+			     struct sk_buff *clone, unsigned int type);</div><div class='add'>+void hellcreek_port_txtstamp(struct dsa_switch *ds, int port,</div><div class='add'>+			     struct sk_buff *skb);</div><div class='add'>+</div><div class='add'>+int hellcreek_get_ts_info(struct dsa_switch *ds, int port,</div><div class='add'>+			  struct kernel_ethtool_ts_info *info);</div><div class='add'>+</div><div class='add'>+long hellcreek_hwtstamp_work(struct ptp_clock_info *ptp);</div><div class='add'>+</div><div class='add'>+int hellcreek_hwtstamp_setup(struct hellcreek *chip);</div><div class='add'>+void hellcreek_hwtstamp_free(struct hellcreek *chip);</div><div class='add'>+</div><div class='add'>+#endif /* _HELLCREEK_HWTSTAMP_H_ */</div><div class='head'>diff --git a/drivers/net/dsa/hirschmann/hellcreek_ptp.c b/drivers/net/dsa/hirschmann/hellcreek_ptp.c<br/>new file mode 100644<br/>index 000000000000..cb23bea9c21b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/hirschmann/hellcreek_ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/hirschmann/hellcreek_ptp.c</a></div><div class='hunk'>@@ -0,0 +1,472 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * DSA driver for:</div><div class='add'>+ * Hirschmann Hellcreek TSN switch.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2019,2020 Hochschule Offenburg</div><div class='add'>+ * Copyright (C) 2019,2020 Linutronix GmbH</div><div class='add'>+ * Authors: Kamil Alkhouri &lt;kamil.alkhouri@hs-offenburg.de&gt;</div><div class='add'>+ *	    Kurt Kanzenbach &lt;kurt@linutronix.de&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/ptp_clock_kernel.h&gt;</div><div class='add'>+#include "hellcreek.h"</div><div class='add'>+#include "hellcreek_ptp.h"</div><div class='add'>+#include "hellcreek_hwtstamp.h"</div><div class='add'>+</div><div class='add'>+u16 hellcreek_ptp_read(struct hellcreek *hellcreek, unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	return readw(hellcreek-&gt;ptp_base + offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hellcreek_ptp_write(struct hellcreek *hellcreek, u16 data,</div><div class='add'>+			 unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	writew(data, hellcreek-&gt;ptp_base + offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Get nanoseconds from PTP clock */</div><div class='add'>+static u64 hellcreek_ptp_clock_read(struct hellcreek *hellcreek,</div><div class='add'>+				    struct ptp_system_timestamp *sts)</div><div class='add'>+{</div><div class='add'>+	u16 nsl, nsh;</div><div class='add'>+</div><div class='add'>+	/* Take a snapshot */</div><div class='add'>+	hellcreek_ptp_write(hellcreek, PR_COMMAND_C_SS, PR_COMMAND_C);</div><div class='add'>+</div><div class='add'>+	/* The time of the day is saved as 96 bits. However, due to hardware</div><div class='add'>+	 * limitations the seconds are not or only partly kept in the PTP</div><div class='add'>+	 * core. Currently only three bits for the seconds are available. That's</div><div class='add'>+	 * why only the nanoseconds are used and the seconds are tracked in</div><div class='add'>+	 * software. Anyway due to internal locking all five registers should be</div><div class='add'>+	 * read.</div><div class='add'>+	 */</div><div class='add'>+	nsh = hellcreek_ptp_read(hellcreek, PR_SS_SYNC_DATA_C);</div><div class='add'>+	nsh = hellcreek_ptp_read(hellcreek, PR_SS_SYNC_DATA_C);</div><div class='add'>+	nsh = hellcreek_ptp_read(hellcreek, PR_SS_SYNC_DATA_C);</div><div class='add'>+	nsh = hellcreek_ptp_read(hellcreek, PR_SS_SYNC_DATA_C);</div><div class='add'>+	ptp_read_system_prets(sts);</div><div class='add'>+	nsl = hellcreek_ptp_read(hellcreek, PR_SS_SYNC_DATA_C);</div><div class='add'>+	ptp_read_system_postts(sts);</div><div class='add'>+</div><div class='add'>+	return (u64)nsl | ((u64)nsh &lt;&lt; 16);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 __hellcreek_ptp_gettime(struct hellcreek *hellcreek,</div><div class='add'>+				   struct ptp_system_timestamp *sts)</div><div class='add'>+{</div><div class='add'>+	u64 ns;</div><div class='add'>+</div><div class='add'>+	ns = hellcreek_ptp_clock_read(hellcreek, sts);</div><div class='add'>+	if (ns &lt; hellcreek-&gt;last_ts)</div><div class='add'>+		hellcreek-&gt;seconds++;</div><div class='add'>+	hellcreek-&gt;last_ts = ns;</div><div class='add'>+	ns += hellcreek-&gt;seconds * NSEC_PER_SEC;</div><div class='add'>+</div><div class='add'>+	return ns;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Retrieve the seconds parts in nanoseconds for a packet timestamped with @ns.</div><div class='add'>+ * There has to be a check whether an overflow occurred between the packet</div><div class='add'>+ * arrival and now. If so use the correct seconds (-1) for calculating the</div><div class='add'>+ * packet arrival time.</div><div class='add'>+ */</div><div class='add'>+u64 hellcreek_ptp_gettime_seconds(struct hellcreek *hellcreek, u64 ns)</div><div class='add'>+{</div><div class='add'>+	u64 s;</div><div class='add'>+</div><div class='add'>+	__hellcreek_ptp_gettime(hellcreek, NULL);</div><div class='add'>+	if (hellcreek-&gt;last_ts &gt; ns)</div><div class='add'>+		s = hellcreek-&gt;seconds * NSEC_PER_SEC;</div><div class='add'>+	else</div><div class='add'>+		s = (hellcreek-&gt;seconds - 1) * NSEC_PER_SEC;</div><div class='add'>+</div><div class='add'>+	return s;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hellcreek_ptp_gettimex(struct ptp_clock_info *ptp,</div><div class='add'>+				  struct timespec64 *ts,</div><div class='add'>+				  struct ptp_system_timestamp *sts)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek *hellcreek = ptp_to_hellcreek(ptp);</div><div class='add'>+	u64 ns;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;hellcreek-&gt;ptp_lock);</div><div class='add'>+	ns = __hellcreek_ptp_gettime(hellcreek, sts);</div><div class='add'>+	mutex_unlock(&amp;hellcreek-&gt;ptp_lock);</div><div class='add'>+</div><div class='add'>+	*ts = ns_to_timespec64(ns);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hellcreek_ptp_settime(struct ptp_clock_info *ptp,</div><div class='add'>+				 const struct timespec64 *ts)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek *hellcreek = ptp_to_hellcreek(ptp);</div><div class='add'>+	u16 secl, nsh, nsl;</div><div class='add'>+</div><div class='add'>+	secl = ts-&gt;tv_sec &amp; 0xffff;</div><div class='add'>+	nsh  = ((u32)ts-&gt;tv_nsec &amp; 0xffff0000) &gt;&gt; 16;</div><div class='add'>+	nsl  = ts-&gt;tv_nsec &amp; 0xffff;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;hellcreek-&gt;ptp_lock);</div><div class='add'>+</div><div class='add'>+	/* Update overflow data structure */</div><div class='add'>+	hellcreek-&gt;seconds = ts-&gt;tv_sec;</div><div class='add'>+	hellcreek-&gt;last_ts = ts-&gt;tv_nsec;</div><div class='add'>+</div><div class='add'>+	/* Set time in clock */</div><div class='add'>+	hellcreek_ptp_write(hellcreek, 0x00, PR_CLOCK_WRITE_C);</div><div class='add'>+	hellcreek_ptp_write(hellcreek, 0x00, PR_CLOCK_WRITE_C);</div><div class='add'>+	hellcreek_ptp_write(hellcreek, secl, PR_CLOCK_WRITE_C);</div><div class='add'>+	hellcreek_ptp_write(hellcreek, nsh,  PR_CLOCK_WRITE_C);</div><div class='add'>+	hellcreek_ptp_write(hellcreek, nsl,  PR_CLOCK_WRITE_C);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;hellcreek-&gt;ptp_lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hellcreek_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek *hellcreek = ptp_to_hellcreek(ptp);</div><div class='add'>+	u16 negative = 0, addendh, addendl;</div><div class='add'>+	u32 addend;</div><div class='add'>+	u64 adj;</div><div class='add'>+</div><div class='add'>+	if (scaled_ppm &lt; 0) {</div><div class='add'>+		negative = 1;</div><div class='add'>+		scaled_ppm = -scaled_ppm;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* IP-Core adjusts the nominal frequency by adding or subtracting 1 ns</div><div class='add'>+	 * from the 8 ns (period of the oscillator) every time the accumulator</div><div class='add'>+	 * register overflows. The value stored in the addend register is added</div><div class='add'>+	 * to the accumulator register every 8 ns.</div><div class='add'>+	 *</div><div class='add'>+	 * addend value = (2^30 * accumulator_overflow_rate) /</div><div class='add'>+	 *                oscillator_frequency</div><div class='add'>+	 * where:</div><div class='add'>+	 *</div><div class='add'>+	 * oscillator_frequency = 125 MHz</div><div class='add'>+	 * accumulator_overflow_rate = 125 MHz * scaled_ppm * 2^-16 * 10^-6 * 8</div><div class='add'>+	 */</div><div class='add'>+	adj = scaled_ppm;</div><div class='add'>+	adj &lt;&lt;= 11;</div><div class='add'>+	addend = (u32)div_u64(adj, 15625);</div><div class='add'>+</div><div class='add'>+	addendh = (addend &amp; 0xffff0000) &gt;&gt; 16;</div><div class='add'>+	addendl = addend &amp; 0xffff;</div><div class='add'>+</div><div class='add'>+	negative = (negative &lt;&lt; 15) &amp; 0x8000;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;hellcreek-&gt;ptp_lock);</div><div class='add'>+</div><div class='add'>+	/* Set drift register */</div><div class='add'>+	hellcreek_ptp_write(hellcreek, negative, PR_CLOCK_DRIFT_C);</div><div class='add'>+	hellcreek_ptp_write(hellcreek, 0x00, PR_CLOCK_DRIFT_C);</div><div class='add'>+	hellcreek_ptp_write(hellcreek, 0x00, PR_CLOCK_DRIFT_C);</div><div class='add'>+	hellcreek_ptp_write(hellcreek, addendh,  PR_CLOCK_DRIFT_C);</div><div class='add'>+	hellcreek_ptp_write(hellcreek, addendl,  PR_CLOCK_DRIFT_C);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;hellcreek-&gt;ptp_lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hellcreek_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek *hellcreek = ptp_to_hellcreek(ptp);</div><div class='add'>+	u16 negative = 0, counth, countl;</div><div class='add'>+	u32 count_val;</div><div class='add'>+</div><div class='add'>+	/* If the offset is larger than IP-Core slow offset resources. Don't</div><div class='add'>+	 * consider slow adjustment. Rather, add the offset directly to the</div><div class='add'>+	 * current time</div><div class='add'>+	 */</div><div class='add'>+	if (abs(delta) &gt; MAX_SLOW_OFFSET_ADJ) {</div><div class='add'>+		struct timespec64 now, then = ns_to_timespec64(delta);</div><div class='add'>+</div><div class='add'>+		hellcreek_ptp_gettimex(ptp, &amp;now, NULL);</div><div class='add'>+		now = timespec64_add(now, then);</div><div class='add'>+		hellcreek_ptp_settime(ptp, &amp;now);</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (delta &lt; 0) {</div><div class='add'>+		negative = 1;</div><div class='add'>+		delta = -delta;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* 'count_val' does not exceed the maximum register size (2^30) */</div><div class='add'>+	count_val = div_s64(delta, MAX_NS_PER_STEP);</div><div class='add'>+</div><div class='add'>+	counth = (count_val &amp; 0xffff0000) &gt;&gt; 16;</div><div class='add'>+	countl = count_val &amp; 0xffff;</div><div class='add'>+</div><div class='add'>+	negative = (negative &lt;&lt; 15) &amp; 0x8000;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;hellcreek-&gt;ptp_lock);</div><div class='add'>+</div><div class='add'>+	/* Set offset write register */</div><div class='add'>+	hellcreek_ptp_write(hellcreek, negative, PR_CLOCK_OFFSET_C);</div><div class='add'>+	hellcreek_ptp_write(hellcreek, MAX_NS_PER_STEP, PR_CLOCK_OFFSET_C);</div><div class='add'>+	hellcreek_ptp_write(hellcreek, MIN_CLK_CYCLES_BETWEEN_STEPS,</div><div class='add'>+			    PR_CLOCK_OFFSET_C);</div><div class='add'>+	hellcreek_ptp_write(hellcreek, countl,  PR_CLOCK_OFFSET_C);</div><div class='add'>+	hellcreek_ptp_write(hellcreek, counth,  PR_CLOCK_OFFSET_C);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;hellcreek-&gt;ptp_lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hellcreek_ptp_enable(struct ptp_clock_info *ptp,</div><div class='add'>+				struct ptp_clock_request *rq, int on)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_ptp_overflow_check(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct delayed_work *dw = to_delayed_work(work);</div><div class='add'>+	struct hellcreek *hellcreek;</div><div class='add'>+</div><div class='add'>+	hellcreek = dw_overflow_to_hellcreek(dw);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;hellcreek-&gt;ptp_lock);</div><div class='add'>+	__hellcreek_ptp_gettime(hellcreek, NULL);</div><div class='add'>+	mutex_unlock(&amp;hellcreek-&gt;ptp_lock);</div><div class='add'>+</div><div class='add'>+	schedule_delayed_work(&amp;hellcreek-&gt;overflow_work,</div><div class='add'>+			      HELLCREEK_OVERFLOW_PERIOD);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum led_brightness hellcreek_get_brightness(struct hellcreek *hellcreek,</div><div class='add'>+						    int led)</div><div class='add'>+{</div><div class='add'>+	return (hellcreek-&gt;status_out &amp; led) ? 1 : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_set_brightness(struct hellcreek *hellcreek, int led,</div><div class='add'>+				     enum led_brightness b)</div><div class='add'>+{</div><div class='add'>+	mutex_lock(&amp;hellcreek-&gt;ptp_lock);</div><div class='add'>+</div><div class='add'>+	if (b)</div><div class='add'>+		hellcreek-&gt;status_out |= led;</div><div class='add'>+	else</div><div class='add'>+		hellcreek-&gt;status_out &amp;= ~led;</div><div class='add'>+</div><div class='add'>+	hellcreek_ptp_write(hellcreek, hellcreek-&gt;status_out, STATUS_OUT);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;hellcreek-&gt;ptp_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_led_sync_good_set(struct led_classdev *ldev,</div><div class='add'>+					enum led_brightness b)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek *hellcreek = led_to_hellcreek(ldev, led_sync_good);</div><div class='add'>+</div><div class='add'>+	hellcreek_set_brightness(hellcreek, STATUS_OUT_SYNC_GOOD, b);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum led_brightness hellcreek_led_sync_good_get(struct led_classdev *ldev)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek *hellcreek = led_to_hellcreek(ldev, led_sync_good);</div><div class='add'>+</div><div class='add'>+	return hellcreek_get_brightness(hellcreek, STATUS_OUT_SYNC_GOOD);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hellcreek_led_is_gm_set(struct led_classdev *ldev,</div><div class='add'>+				    enum led_brightness b)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek *hellcreek = led_to_hellcreek(ldev, led_is_gm);</div><div class='add'>+</div><div class='add'>+	hellcreek_set_brightness(hellcreek, STATUS_OUT_IS_GM, b);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum led_brightness hellcreek_led_is_gm_get(struct led_classdev *ldev)</div><div class='add'>+{</div><div class='add'>+	struct hellcreek *hellcreek = led_to_hellcreek(ldev, led_is_gm);</div><div class='add'>+</div><div class='add'>+	return hellcreek_get_brightness(hellcreek, STATUS_OUT_IS_GM);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* There two available LEDs internally called sync_good and is_gm. However, the</div><div class='add'>+ * user might want to use a different label and specify the default state. Take</div><div class='add'>+ * those properties from device tree.</div><div class='add'>+ */</div><div class='add'>+static int hellcreek_led_setup(struct hellcreek *hellcreek)</div><div class='add'>+{</div><div class='add'>+	struct device_node *leds, *led = NULL;</div><div class='add'>+	enum led_default_state state;</div><div class='add'>+	const char *label;</div><div class='add'>+	int ret = -EINVAL;</div><div class='add'>+</div><div class='add'>+	of_node_get(hellcreek-&gt;dev-&gt;of_node);</div><div class='add'>+	leds = of_find_node_by_name(hellcreek-&gt;dev-&gt;of_node, "leds");</div><div class='add'>+	if (!leds) {</div><div class='add'>+		dev_err(hellcreek-&gt;dev, "No LEDs specified in device tree!\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hellcreek-&gt;status_out = 0;</div><div class='add'>+</div><div class='add'>+	led = of_get_next_available_child(leds, led);</div><div class='add'>+	if (!led) {</div><div class='add'>+		dev_err(hellcreek-&gt;dev, "First LED not specified!\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = of_property_read_string(led, "label", &amp;label);</div><div class='add'>+	hellcreek-&gt;led_sync_good.name = ret ? "sync_good" : label;</div><div class='add'>+</div><div class='add'>+	state = led_init_default_state_get(of_fwnode_handle(led));</div><div class='add'>+	switch (state) {</div><div class='add'>+	case LEDS_DEFSTATE_ON:</div><div class='add'>+		hellcreek-&gt;led_sync_good.brightness = 1;</div><div class='add'>+		break;</div><div class='add'>+	case LEDS_DEFSTATE_KEEP:</div><div class='add'>+		hellcreek-&gt;led_sync_good.brightness =</div><div class='add'>+			hellcreek_get_brightness(hellcreek, STATUS_OUT_SYNC_GOOD);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		hellcreek-&gt;led_sync_good.brightness = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hellcreek-&gt;led_sync_good.max_brightness = 1;</div><div class='add'>+	hellcreek-&gt;led_sync_good.brightness_set = hellcreek_led_sync_good_set;</div><div class='add'>+	hellcreek-&gt;led_sync_good.brightness_get = hellcreek_led_sync_good_get;</div><div class='add'>+</div><div class='add'>+	led = of_get_next_available_child(leds, led);</div><div class='add'>+	if (!led) {</div><div class='add'>+		dev_err(hellcreek-&gt;dev, "Second LED not specified!\n");</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = of_property_read_string(led, "label", &amp;label);</div><div class='add'>+	hellcreek-&gt;led_is_gm.name = ret ? "is_gm" : label;</div><div class='add'>+</div><div class='add'>+	state = led_init_default_state_get(of_fwnode_handle(led));</div><div class='add'>+	switch (state) {</div><div class='add'>+	case LEDS_DEFSTATE_ON:</div><div class='add'>+		hellcreek-&gt;led_is_gm.brightness = 1;</div><div class='add'>+		break;</div><div class='add'>+	case LEDS_DEFSTATE_KEEP:</div><div class='add'>+		hellcreek-&gt;led_is_gm.brightness =</div><div class='add'>+			hellcreek_get_brightness(hellcreek, STATUS_OUT_IS_GM);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		hellcreek-&gt;led_is_gm.brightness = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hellcreek-&gt;led_is_gm.max_brightness = 1;</div><div class='add'>+	hellcreek-&gt;led_is_gm.brightness_set = hellcreek_led_is_gm_set;</div><div class='add'>+	hellcreek-&gt;led_is_gm.brightness_get = hellcreek_led_is_gm_get;</div><div class='add'>+</div><div class='add'>+	/* Set initial state */</div><div class='add'>+	if (hellcreek-&gt;led_sync_good.brightness == 1)</div><div class='add'>+		hellcreek_set_brightness(hellcreek, STATUS_OUT_SYNC_GOOD, 1);</div><div class='add'>+	if (hellcreek-&gt;led_is_gm.brightness == 1)</div><div class='add'>+		hellcreek_set_brightness(hellcreek, STATUS_OUT_IS_GM, 1);</div><div class='add'>+</div><div class='add'>+	/* Register both leds */</div><div class='add'>+	ret = led_classdev_register(hellcreek-&gt;dev, &amp;hellcreek-&gt;led_sync_good);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(hellcreek-&gt;dev, "Failed to register sync_good LED\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = led_classdev_register(hellcreek-&gt;dev, &amp;hellcreek-&gt;led_is_gm);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(hellcreek-&gt;dev, "Failed to register is_gm LED\n");</div><div class='add'>+		led_classdev_unregister(&amp;hellcreek-&gt;led_sync_good);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = 0;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	of_node_put(leds);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hellcreek_ptp_setup(struct hellcreek *hellcreek)</div><div class='add'>+{</div><div class='add'>+	u16 status;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Set up the overflow work */</div><div class='add'>+	INIT_DELAYED_WORK(&amp;hellcreek-&gt;overflow_work,</div><div class='add'>+			  hellcreek_ptp_overflow_check);</div><div class='add'>+</div><div class='add'>+	/* Setup PTP clock */</div><div class='add'>+	hellcreek-&gt;ptp_clock_info.owner = THIS_MODULE;</div><div class='add'>+	snprintf(hellcreek-&gt;ptp_clock_info.name,</div><div class='add'>+		 sizeof(hellcreek-&gt;ptp_clock_info.name),</div><div class='add'>+		 dev_name(hellcreek-&gt;dev));</div><div class='add'>+</div><div class='add'>+	/* IP-Core can add up to 0.5 ns per 8 ns cycle, which means</div><div class='add'>+	 * accumulator_overflow_rate shall not exceed 62.5 MHz (which adjusts</div><div class='add'>+	 * the nominal frequency by 6.25%)</div><div class='add'>+	 */</div><div class='add'>+	hellcreek-&gt;ptp_clock_info.max_adj     = 62500000;</div><div class='add'>+	hellcreek-&gt;ptp_clock_info.n_alarm     = 0;</div><div class='add'>+	hellcreek-&gt;ptp_clock_info.n_pins      = 0;</div><div class='add'>+	hellcreek-&gt;ptp_clock_info.n_ext_ts    = 0;</div><div class='add'>+	hellcreek-&gt;ptp_clock_info.n_per_out   = 0;</div><div class='add'>+	hellcreek-&gt;ptp_clock_info.pps	      = 0;</div><div class='add'>+	hellcreek-&gt;ptp_clock_info.adjfine     = hellcreek_ptp_adjfine;</div><div class='add'>+	hellcreek-&gt;ptp_clock_info.adjtime     = hellcreek_ptp_adjtime;</div><div class='add'>+	hellcreek-&gt;ptp_clock_info.gettimex64  = hellcreek_ptp_gettimex;</div><div class='add'>+	hellcreek-&gt;ptp_clock_info.settime64   = hellcreek_ptp_settime;</div><div class='add'>+	hellcreek-&gt;ptp_clock_info.enable      = hellcreek_ptp_enable;</div><div class='add'>+	hellcreek-&gt;ptp_clock_info.do_aux_work = hellcreek_hwtstamp_work;</div><div class='add'>+</div><div class='add'>+	hellcreek-&gt;ptp_clock = ptp_clock_register(&amp;hellcreek-&gt;ptp_clock_info,</div><div class='add'>+						  hellcreek-&gt;dev);</div><div class='add'>+	if (IS_ERR(hellcreek-&gt;ptp_clock))</div><div class='add'>+		return PTR_ERR(hellcreek-&gt;ptp_clock);</div><div class='add'>+</div><div class='add'>+	/* Enable the offset correction process, if no offset correction is</div><div class='add'>+	 * already taking place</div><div class='add'>+	 */</div><div class='add'>+	status = hellcreek_ptp_read(hellcreek, PR_CLOCK_STATUS_C);</div><div class='add'>+	if (!(status &amp; PR_CLOCK_STATUS_C_OFS_ACT))</div><div class='add'>+		hellcreek_ptp_write(hellcreek,</div><div class='add'>+				    status | PR_CLOCK_STATUS_C_ENA_OFS,</div><div class='add'>+				    PR_CLOCK_STATUS_C);</div><div class='add'>+</div><div class='add'>+	/* Enable the drift correction process */</div><div class='add'>+	hellcreek_ptp_write(hellcreek, status | PR_CLOCK_STATUS_C_ENA_DRIFT,</div><div class='add'>+			    PR_CLOCK_STATUS_C);</div><div class='add'>+</div><div class='add'>+	/* LED setup */</div><div class='add'>+	ret = hellcreek_led_setup(hellcreek);</div><div class='add'>+	if (ret) {</div><div class='add'>+		if (hellcreek-&gt;ptp_clock)</div><div class='add'>+			ptp_clock_unregister(hellcreek-&gt;ptp_clock);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	schedule_delayed_work(&amp;hellcreek-&gt;overflow_work,</div><div class='add'>+			      HELLCREEK_OVERFLOW_PERIOD);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hellcreek_ptp_free(struct hellcreek *hellcreek)</div><div class='add'>+{</div><div class='add'>+	led_classdev_unregister(&amp;hellcreek-&gt;led_is_gm);</div><div class='add'>+	led_classdev_unregister(&amp;hellcreek-&gt;led_sync_good);</div><div class='add'>+	cancel_delayed_work_sync(&amp;hellcreek-&gt;overflow_work);</div><div class='add'>+	if (hellcreek-&gt;ptp_clock)</div><div class='add'>+		ptp_clock_unregister(hellcreek-&gt;ptp_clock);</div><div class='add'>+	hellcreek-&gt;ptp_clock = NULL;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/dsa/hirschmann/hellcreek_ptp.h b/drivers/net/dsa/hirschmann/hellcreek_ptp.h<br/>new file mode 100644<br/>index 000000000000..0b51392c7e56<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/hirschmann/hellcreek_ptp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/hirschmann/hellcreek_ptp.h</a></div><div class='hunk'>@@ -0,0 +1,76 @@</div><div class='add'>+/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */</div><div class='add'>+/*</div><div class='add'>+ * DSA driver for:</div><div class='add'>+ * Hirschmann Hellcreek TSN switch.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2019,2020 Hochschule Offenburg</div><div class='add'>+ * Copyright (C) 2019,2020 Linutronix GmbH</div><div class='add'>+ * Authors: Kurt Kanzenbach &lt;kurt@linutronix.de&gt;</div><div class='add'>+ *	    Kamil Alkhouri &lt;kamil.alkhouri@hs-offenburg.de&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _HELLCREEK_PTP_H_</div><div class='add'>+#define _HELLCREEK_PTP_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitops.h&gt;</div><div class='add'>+#include &lt;linux/ptp_clock_kernel.h&gt;</div><div class='add'>+</div><div class='add'>+#include "hellcreek.h"</div><div class='add'>+</div><div class='add'>+/* Every jump in time is 7 ns */</div><div class='add'>+#define MAX_NS_PER_STEP			7L</div><div class='add'>+</div><div class='add'>+/* Correct offset at every clock cycle */</div><div class='add'>+#define MIN_CLK_CYCLES_BETWEEN_STEPS	0</div><div class='add'>+</div><div class='add'>+/* Maximum available slow offset resources */</div><div class='add'>+#define MAX_SLOW_OFFSET_ADJ					\</div><div class='add'>+	((unsigned long long)((1 &lt;&lt; 30) - 1) * MAX_NS_PER_STEP)</div><div class='add'>+</div><div class='add'>+/* four times a second overflow check */</div><div class='add'>+#define HELLCREEK_OVERFLOW_PERIOD	(HZ / 4)</div><div class='add'>+</div><div class='add'>+/* PTP Register */</div><div class='add'>+#define PR_SETTINGS_C			(0x09 * 2)</div><div class='add'>+#define PR_SETTINGS_C_RES3TS		BIT(4)</div><div class='add'>+#define PR_SETTINGS_C_TS_SRC_TK_SHIFT	8</div><div class='add'>+#define PR_SETTINGS_C_TS_SRC_TK_MASK	GENMASK(9, 8)</div><div class='add'>+#define PR_COMMAND_C			(0x0a * 2)</div><div class='add'>+#define PR_COMMAND_C_SS			BIT(0)</div><div class='add'>+</div><div class='add'>+#define PR_CLOCK_STATUS_C		(0x0c * 2)</div><div class='add'>+#define PR_CLOCK_STATUS_C_ENA_DRIFT	BIT(12)</div><div class='add'>+#define PR_CLOCK_STATUS_C_OFS_ACT	BIT(13)</div><div class='add'>+#define PR_CLOCK_STATUS_C_ENA_OFS	BIT(14)</div><div class='add'>+</div><div class='add'>+#define PR_CLOCK_READ_C			(0x0d * 2)</div><div class='add'>+#define PR_CLOCK_WRITE_C		(0x0e * 2)</div><div class='add'>+#define PR_CLOCK_OFFSET_C		(0x0f * 2)</div><div class='add'>+#define PR_CLOCK_DRIFT_C		(0x10 * 2)</div><div class='add'>+</div><div class='add'>+#define PR_SS_FREE_DATA_C		(0x12 * 2)</div><div class='add'>+#define PR_SS_SYNT_DATA_C		(0x14 * 2)</div><div class='add'>+#define PR_SS_SYNC_DATA_C		(0x16 * 2)</div><div class='add'>+#define PR_SS_DRAC_DATA_C		(0x18 * 2)</div><div class='add'>+</div><div class='add'>+#define STATUS_OUT			(0x60 * 2)</div><div class='add'>+#define STATUS_OUT_SYNC_GOOD		BIT(0)</div><div class='add'>+#define STATUS_OUT_IS_GM		BIT(1)</div><div class='add'>+</div><div class='add'>+int hellcreek_ptp_setup(struct hellcreek *hellcreek);</div><div class='add'>+void hellcreek_ptp_free(struct hellcreek *hellcreek);</div><div class='add'>+u16 hellcreek_ptp_read(struct hellcreek *hellcreek, unsigned int offset);</div><div class='add'>+void hellcreek_ptp_write(struct hellcreek *hellcreek, u16 data,</div><div class='add'>+			 unsigned int offset);</div><div class='add'>+u64 hellcreek_ptp_gettime_seconds(struct hellcreek *hellcreek, u64 ns);</div><div class='add'>+</div><div class='add'>+#define ptp_to_hellcreek(ptp)					\</div><div class='add'>+	container_of(ptp, struct hellcreek, ptp_clock_info)</div><div class='add'>+</div><div class='add'>+#define dw_overflow_to_hellcreek(dw)				\</div><div class='add'>+	container_of(dw, struct hellcreek, overflow_work)</div><div class='add'>+</div><div class='add'>+#define led_to_hellcreek(ldev, led)				\</div><div class='add'>+	container_of(ldev, struct hellcreek, led)</div><div class='add'>+</div><div class='add'>+#endif /* _HELLCREEK_PTP_H_ */</div><div class='head'>diff --git a/drivers/net/dsa/ks8995.c b/drivers/net/dsa/ks8995.c<br/>new file mode 100644<br/>index 000000000000..77d8b842693c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/ks8995.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/ks8995.c</a></div><div class='hunk'>@@ -0,0 +1,857 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * SPI driver for Micrel/Kendin KS8995M and KSZ8864RMN ethernet switches</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2008 Gabor Juhos &lt;juhosg at openwrt.org&gt;</div><div class='add'>+ * Copyright (C) 2025 Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='add'>+ *</div><div class='add'>+ * This file was based on: drivers/spi/at25.c</div><div class='add'>+ *     Copyright (C) 2006 David Brownell</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bits.h&gt;</div><div class='add'>+#include &lt;linux/if_bridge.h&gt;</div><div class='add'>+#include &lt;linux/if_vlan.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/gpio/consumer.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/spi/spi.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+</div><div class='add'>+#define DRV_VERSION		"0.1.1"</div><div class='add'>+#define DRV_DESC		"Micrel KS8995 Ethernet switch SPI driver"</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------ */</div><div class='add'>+</div><div class='add'>+#define KS8995_REG_ID0		0x00    /* Chip ID0 */</div><div class='add'>+#define KS8995_REG_ID1		0x01    /* Chip ID1 */</div><div class='add'>+</div><div class='add'>+#define KS8995_REG_GC0		0x02    /* Global Control 0 */</div><div class='add'>+</div><div class='add'>+#define KS8995_GC0_P5_PHY	BIT(3)	/* Port 5 PHY enabled */</div><div class='add'>+</div><div class='add'>+#define KS8995_REG_GC1		0x03    /* Global Control 1 */</div><div class='add'>+#define KS8995_REG_GC2		0x04    /* Global Control 2 */</div><div class='add'>+</div><div class='add'>+#define KS8995_GC2_HUGE		BIT(2)	/* Huge packet support */</div><div class='add'>+#define KS8995_GC2_LEGAL	BIT(1)	/* Legal size override */</div><div class='add'>+</div><div class='add'>+#define KS8995_REG_GC3		0x05    /* Global Control 3 */</div><div class='add'>+#define KS8995_REG_GC4		0x06    /* Global Control 4 */</div><div class='add'>+</div><div class='add'>+#define KS8995_GC4_10BT		BIT(4)	/* Force switch to 10Mbit */</div><div class='add'>+#define KS8995_GC4_MII_FLOW	BIT(5)	/* MII full-duplex flow control enable */</div><div class='add'>+#define KS8995_GC4_MII_HD	BIT(6)	/* MII half-duplex mode enable */</div><div class='add'>+</div><div class='add'>+#define KS8995_REG_GC5		0x07    /* Global Control 5 */</div><div class='add'>+#define KS8995_REG_GC6		0x08    /* Global Control 6 */</div><div class='add'>+#define KS8995_REG_GC7		0x09    /* Global Control 7 */</div><div class='add'>+#define KS8995_REG_GC8		0x0a    /* Global Control 8 */</div><div class='add'>+#define KS8995_REG_GC9		0x0b    /* Global Control 9 */</div><div class='add'>+</div><div class='add'>+#define KS8995_GC9_SPECIAL	BIT(0)	/* Special tagging mode (DSA) */</div><div class='add'>+</div><div class='add'>+/* In DSA the ports 1-4 are numbered 0-3 and the CPU port is port 4 */</div><div class='add'>+#define KS8995_REG_PC(p, r)	(0x10 + (0x10 * (p)) + (r)) /* Port Control */</div><div class='add'>+#define KS8995_REG_PS(p, r)	(0x1e + (0x10 * (p)) + (r)) /* Port Status */</div><div class='add'>+</div><div class='add'>+#define KS8995_REG_PC0		0x00    /* Port Control 0 */</div><div class='add'>+#define KS8995_REG_PC1		0x01    /* Port Control 1 */</div><div class='add'>+#define KS8995_REG_PC2		0x02    /* Port Control 2 */</div><div class='add'>+#define KS8995_REG_PC3		0x03    /* Port Control 3 */</div><div class='add'>+#define KS8995_REG_PC4		0x04    /* Port Control 4 */</div><div class='add'>+#define KS8995_REG_PC5		0x05    /* Port Control 5 */</div><div class='add'>+#define KS8995_REG_PC6		0x06    /* Port Control 6 */</div><div class='add'>+#define KS8995_REG_PC7		0x07    /* Port Control 7 */</div><div class='add'>+#define KS8995_REG_PC8		0x08    /* Port Control 8 */</div><div class='add'>+#define KS8995_REG_PC9		0x09    /* Port Control 9 */</div><div class='add'>+#define KS8995_REG_PC10		0x0a    /* Port Control 10 */</div><div class='add'>+#define KS8995_REG_PC11		0x0b    /* Port Control 11 */</div><div class='add'>+#define KS8995_REG_PC12		0x0c    /* Port Control 12 */</div><div class='add'>+#define KS8995_REG_PC13		0x0d    /* Port Control 13 */</div><div class='add'>+</div><div class='add'>+#define KS8995_PC0_TAG_INS	BIT(2)	/* Enable tag insertion on port */</div><div class='add'>+#define KS8995_PC0_TAG_REM	BIT(1)	/* Enable tag removal on port */</div><div class='add'>+#define KS8995_PC0_PRIO_EN	BIT(0)	/* Enable priority handling */</div><div class='add'>+</div><div class='add'>+#define KS8995_PC2_TXEN		BIT(2)	/* Enable TX on port */</div><div class='add'>+#define KS8995_PC2_RXEN		BIT(1)	/* Enable RX on port */</div><div class='add'>+#define KS8995_PC2_LEARN_DIS	BIT(0)	/* Disable learning on port */</div><div class='add'>+</div><div class='add'>+#define KS8995_PC13_TXDIS	BIT(6)	/* Disable transmitter */</div><div class='add'>+#define KS8995_PC13_PWDN	BIT(3)	/* Power down */</div><div class='add'>+</div><div class='add'>+#define KS8995_REG_TPC0		0x60    /* TOS Priority Control 0 */</div><div class='add'>+#define KS8995_REG_TPC1		0x61    /* TOS Priority Control 1 */</div><div class='add'>+#define KS8995_REG_TPC2		0x62    /* TOS Priority Control 2 */</div><div class='add'>+#define KS8995_REG_TPC3		0x63    /* TOS Priority Control 3 */</div><div class='add'>+#define KS8995_REG_TPC4		0x64    /* TOS Priority Control 4 */</div><div class='add'>+#define KS8995_REG_TPC5		0x65    /* TOS Priority Control 5 */</div><div class='add'>+#define KS8995_REG_TPC6		0x66    /* TOS Priority Control 6 */</div><div class='add'>+#define KS8995_REG_TPC7		0x67    /* TOS Priority Control 7 */</div><div class='add'>+</div><div class='add'>+#define KS8995_REG_MAC0		0x68    /* MAC address 0 */</div><div class='add'>+#define KS8995_REG_MAC1		0x69    /* MAC address 1 */</div><div class='add'>+#define KS8995_REG_MAC2		0x6a    /* MAC address 2 */</div><div class='add'>+#define KS8995_REG_MAC3		0x6b    /* MAC address 3 */</div><div class='add'>+#define KS8995_REG_MAC4		0x6c    /* MAC address 4 */</div><div class='add'>+#define KS8995_REG_MAC5		0x6d    /* MAC address 5 */</div><div class='add'>+</div><div class='add'>+#define KS8995_REG_IAC0		0x6e    /* Indirect Access Control 0 */</div><div class='add'>+#define KS8995_REG_IAC1		0x6f    /* Indirect Access Control 0 */</div><div class='add'>+#define KS8995_REG_IAD7		0x70    /* Indirect Access Data 7 */</div><div class='add'>+#define KS8995_REG_IAD6		0x71    /* Indirect Access Data 6 */</div><div class='add'>+#define KS8995_REG_IAD5		0x72    /* Indirect Access Data 5 */</div><div class='add'>+#define KS8995_REG_IAD4		0x73    /* Indirect Access Data 4 */</div><div class='add'>+#define KS8995_REG_IAD3		0x74    /* Indirect Access Data 3 */</div><div class='add'>+#define KS8995_REG_IAD2		0x75    /* Indirect Access Data 2 */</div><div class='add'>+#define KS8995_REG_IAD1		0x76    /* Indirect Access Data 1 */</div><div class='add'>+#define KS8995_REG_IAD0		0x77    /* Indirect Access Data 0 */</div><div class='add'>+</div><div class='add'>+#define KSZ8864_REG_ID1		0xfe	/* Chip ID in bit 7 */</div><div class='add'>+</div><div class='add'>+#define KS8995_REGS_SIZE	0x80</div><div class='add'>+#define KSZ8864_REGS_SIZE	0x100</div><div class='add'>+#define KSZ8795_REGS_SIZE	0x100</div><div class='add'>+</div><div class='add'>+#define ID1_CHIPID_M		0xf</div><div class='add'>+#define ID1_CHIPID_S		4</div><div class='add'>+#define ID1_REVISION_M		0x7</div><div class='add'>+#define ID1_REVISION_S		1</div><div class='add'>+#define ID1_START_SW		1	/* start the switch */</div><div class='add'>+</div><div class='add'>+#define FAMILY_KS8995		0x95</div><div class='add'>+#define FAMILY_KSZ8795		0x87</div><div class='add'>+#define CHIPID_M		0</div><div class='add'>+#define KS8995_CHIP_ID		0x00</div><div class='add'>+#define KSZ8864_CHIP_ID		0x01</div><div class='add'>+#define KSZ8795_CHIP_ID		0x09</div><div class='add'>+</div><div class='add'>+#define KS8995_CMD_WRITE	0x02U</div><div class='add'>+#define KS8995_CMD_READ		0x03U</div><div class='add'>+</div><div class='add'>+#define KS8995_CPU_PORT		4</div><div class='add'>+#define KS8995_NUM_PORTS	5 /* 5 ports including the CPU port */</div><div class='add'>+#define KS8995_RESET_DELAY	10 /* usec */</div><div class='add'>+</div><div class='add'>+enum ks8995_chip_variant {</div><div class='add'>+	ks8995,</div><div class='add'>+	ksz8864,</div><div class='add'>+	ksz8795,</div><div class='add'>+	max_variant</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ks8995_chip_params {</div><div class='add'>+	char *name;</div><div class='add'>+	int family_id;</div><div class='add'>+	int chip_id;</div><div class='add'>+	int regs_size;</div><div class='add'>+	int addr_width;</div><div class='add'>+	int addr_shift;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ks8995_chip_params ks8995_chip[] = {</div><div class='add'>+	[ks8995] = {</div><div class='add'>+		.name = "KS8995MA",</div><div class='add'>+		.family_id = FAMILY_KS8995,</div><div class='add'>+		.chip_id = KS8995_CHIP_ID,</div><div class='add'>+		.regs_size = KS8995_REGS_SIZE,</div><div class='add'>+		.addr_width = 8,</div><div class='add'>+		.addr_shift = 0,</div><div class='add'>+	},</div><div class='add'>+	[ksz8864] = {</div><div class='add'>+		.name = "KSZ8864RMN",</div><div class='add'>+		.family_id = FAMILY_KS8995,</div><div class='add'>+		.chip_id = KSZ8864_CHIP_ID,</div><div class='add'>+		.regs_size = KSZ8864_REGS_SIZE,</div><div class='add'>+		.addr_width = 8,</div><div class='add'>+		.addr_shift = 0,</div><div class='add'>+	},</div><div class='add'>+	[ksz8795] = {</div><div class='add'>+		.name = "KSZ8795CLX",</div><div class='add'>+		.family_id = FAMILY_KSZ8795,</div><div class='add'>+		.chip_id = KSZ8795_CHIP_ID,</div><div class='add'>+		.regs_size = KSZ8795_REGS_SIZE,</div><div class='add'>+		.addr_width = 12,</div><div class='add'>+		.addr_shift = 1,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ks8995_switch {</div><div class='add'>+	struct spi_device	*spi;</div><div class='add'>+	struct device		*dev;</div><div class='add'>+	struct dsa_switch	*ds;</div><div class='add'>+	struct mutex		lock;</div><div class='add'>+	struct gpio_desc	*reset_gpio;</div><div class='add'>+	struct bin_attribute	regs_attr;</div><div class='add'>+	const struct ks8995_chip_params	*chip;</div><div class='add'>+	int			revision_id;</div><div class='add'>+	unsigned int max_mtu[KS8995_NUM_PORTS];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct spi_device_id ks8995_id[] = {</div><div class='add'>+	{"ks8995", ks8995},</div><div class='add'>+	{"ksz8864", ksz8864},</div><div class='add'>+	{"ksz8795", ksz8795},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(spi, ks8995_id);</div><div class='add'>+</div><div class='add'>+static const struct of_device_id ks8995_spi_of_match[] = {</div><div class='add'>+	{ .compatible = "micrel,ks8995" },</div><div class='add'>+	{ .compatible = "micrel,ksz8864" },</div><div class='add'>+	{ .compatible = "micrel,ksz8795" },</div><div class='add'>+	{ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, ks8995_spi_of_match);</div><div class='add'>+</div><div class='add'>+static inline u8 get_chip_id(u8 val)</div><div class='add'>+{</div><div class='add'>+	return (val &gt;&gt; ID1_CHIPID_S) &amp; ID1_CHIPID_M;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u8 get_chip_rev(u8 val)</div><div class='add'>+{</div><div class='add'>+	return (val &gt;&gt; ID1_REVISION_S) &amp; ID1_REVISION_M;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* create_spi_cmd - create a chip specific SPI command header</div><div class='add'>+ * @ks: pointer to switch instance</div><div class='add'>+ * @cmd: SPI command for switch</div><div class='add'>+ * @address: register address for command</div><div class='add'>+ *</div><div class='add'>+ * Different chip families use different bit pattern to address the switches</div><div class='add'>+ * registers:</div><div class='add'>+ *</div><div class='add'>+ * KS8995: 8bit command + 8bit address</div><div class='add'>+ * KSZ8795: 3bit command + 12bit address + 1bit TR (?)</div><div class='add'>+ */</div><div class='add'>+static inline __be16 create_spi_cmd(struct ks8995_switch *ks, int cmd,</div><div class='add'>+				    unsigned address)</div><div class='add'>+{</div><div class='add'>+	u16 result = cmd;</div><div class='add'>+</div><div class='add'>+	/* make room for address (incl. address shift) */</div><div class='add'>+	result &lt;&lt;= ks-&gt;chip-&gt;addr_width + ks-&gt;chip-&gt;addr_shift;</div><div class='add'>+	/* add address */</div><div class='add'>+	result |= address &lt;&lt; ks-&gt;chip-&gt;addr_shift;</div><div class='add'>+	/* SPI protocol needs big endian */</div><div class='add'>+	return cpu_to_be16(result);</div><div class='add'>+}</div><div class='add'>+/* ------------------------------------------------------------------------ */</div><div class='add'>+static int ks8995_read(struct ks8995_switch *ks, char *buf,</div><div class='add'>+		 unsigned offset, size_t count)</div><div class='add'>+{</div><div class='add'>+	__be16 cmd;</div><div class='add'>+	struct spi_transfer t[2];</div><div class='add'>+	struct spi_message m;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	cmd = create_spi_cmd(ks, KS8995_CMD_READ, offset);</div><div class='add'>+	spi_message_init(&amp;m);</div><div class='add'>+</div><div class='add'>+	memset(&amp;t, 0, sizeof(t));</div><div class='add'>+</div><div class='add'>+	t[0].tx_buf = &amp;cmd;</div><div class='add'>+	t[0].len = sizeof(cmd);</div><div class='add'>+	spi_message_add_tail(&amp;t[0], &amp;m);</div><div class='add'>+</div><div class='add'>+	t[1].rx_buf = buf;</div><div class='add'>+	t[1].len = count;</div><div class='add'>+	spi_message_add_tail(&amp;t[1], &amp;m);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ks-&gt;lock);</div><div class='add'>+	err = spi_sync(ks-&gt;spi, &amp;m);</div><div class='add'>+	mutex_unlock(&amp;ks-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return err ? err : count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ks8995_write(struct ks8995_switch *ks, char *buf,</div><div class='add'>+		 unsigned offset, size_t count)</div><div class='add'>+{</div><div class='add'>+	__be16 cmd;</div><div class='add'>+	struct spi_transfer t[2];</div><div class='add'>+	struct spi_message m;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	cmd = create_spi_cmd(ks, KS8995_CMD_WRITE, offset);</div><div class='add'>+	spi_message_init(&amp;m);</div><div class='add'>+</div><div class='add'>+	memset(&amp;t, 0, sizeof(t));</div><div class='add'>+</div><div class='add'>+	t[0].tx_buf = &amp;cmd;</div><div class='add'>+	t[0].len = sizeof(cmd);</div><div class='add'>+	spi_message_add_tail(&amp;t[0], &amp;m);</div><div class='add'>+</div><div class='add'>+	t[1].tx_buf = buf;</div><div class='add'>+	t[1].len = count;</div><div class='add'>+	spi_message_add_tail(&amp;t[1], &amp;m);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ks-&gt;lock);</div><div class='add'>+	err = spi_sync(ks-&gt;spi, &amp;m);</div><div class='add'>+	mutex_unlock(&amp;ks-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return err ? err : count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ks8995_read_reg(struct ks8995_switch *ks, u8 addr, u8 *buf)</div><div class='add'>+{</div><div class='add'>+	return ks8995_read(ks, buf, addr, 1) != 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ks8995_write_reg(struct ks8995_switch *ks, u8 addr, u8 val)</div><div class='add'>+{</div><div class='add'>+	char buf = val;</div><div class='add'>+</div><div class='add'>+	return ks8995_write(ks, &amp;buf, addr, 1) != 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------ */</div><div class='add'>+</div><div class='add'>+static int ks8995_stop(struct ks8995_switch *ks)</div><div class='add'>+{</div><div class='add'>+	return ks8995_write_reg(ks, KS8995_REG_ID1, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ks8995_start(struct ks8995_switch *ks)</div><div class='add'>+{</div><div class='add'>+	return ks8995_write_reg(ks, KS8995_REG_ID1, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ks8995_reset(struct ks8995_switch *ks)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ks8995_stop(ks);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	udelay(KS8995_RESET_DELAY);</div><div class='add'>+</div><div class='add'>+	return ks8995_start(ks);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ks8995_get_revision - get chip revision</div><div class='add'>+ * @ks: pointer to switch instance</div><div class='add'>+ *</div><div class='add'>+ * Verify chip family and id and get chip revision.</div><div class='add'>+ */</div><div class='add'>+static int ks8995_get_revision(struct ks8995_switch *ks)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	u8 id0, id1, ksz8864_id;</div><div class='add'>+</div><div class='add'>+	/* read family id */</div><div class='add'>+	err = ks8995_read_reg(ks, KS8995_REG_ID0, &amp;id0);</div><div class='add'>+	if (err) {</div><div class='add'>+		err = -EIO;</div><div class='add'>+		goto err_out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* verify family id */</div><div class='add'>+	if (id0 != ks-&gt;chip-&gt;family_id) {</div><div class='add'>+		dev_err(&amp;ks-&gt;spi-&gt;dev, "chip family id mismatch: expected 0x%02x but 0x%02x read\n",</div><div class='add'>+			ks-&gt;chip-&gt;family_id, id0);</div><div class='add'>+		err = -ENODEV;</div><div class='add'>+		goto err_out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (ks-&gt;chip-&gt;family_id) {</div><div class='add'>+	case FAMILY_KS8995:</div><div class='add'>+		/* try reading chip id at CHIP ID1 */</div><div class='add'>+		err = ks8995_read_reg(ks, KS8995_REG_ID1, &amp;id1);</div><div class='add'>+		if (err) {</div><div class='add'>+			err = -EIO;</div><div class='add'>+			goto err_out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* verify chip id */</div><div class='add'>+		if ((get_chip_id(id1) == CHIPID_M) &amp;&amp;</div><div class='add'>+		    (get_chip_id(id1) == ks-&gt;chip-&gt;chip_id)) {</div><div class='add'>+			/* KS8995MA */</div><div class='add'>+			ks-&gt;revision_id = get_chip_rev(id1);</div><div class='add'>+		} else if (get_chip_id(id1) != CHIPID_M) {</div><div class='add'>+			/* KSZ8864RMN */</div><div class='add'>+			err = ks8995_read_reg(ks, KS8995_REG_ID1, &amp;ksz8864_id);</div><div class='add'>+			if (err) {</div><div class='add'>+				err = -EIO;</div><div class='add'>+				goto err_out;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if ((ksz8864_id &amp; 0x80) &amp;&amp;</div><div class='add'>+			    (ks-&gt;chip-&gt;chip_id == KSZ8864_CHIP_ID)) {</div><div class='add'>+				ks-&gt;revision_id = get_chip_rev(id1);</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+		} else {</div><div class='add'>+			dev_err(&amp;ks-&gt;spi-&gt;dev, "unsupported chip id for KS8995 family: 0x%02x\n",</div><div class='add'>+				id1);</div><div class='add'>+			err = -ENODEV;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case FAMILY_KSZ8795:</div><div class='add'>+		/* try reading chip id at CHIP ID1 */</div><div class='add'>+		err = ks8995_read_reg(ks, KS8995_REG_ID1, &amp;id1);</div><div class='add'>+		if (err) {</div><div class='add'>+			err = -EIO;</div><div class='add'>+			goto err_out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (get_chip_id(id1) == ks-&gt;chip-&gt;chip_id) {</div><div class='add'>+			ks-&gt;revision_id = get_chip_rev(id1);</div><div class='add'>+		} else {</div><div class='add'>+			dev_err(&amp;ks-&gt;spi-&gt;dev, "unsupported chip id for KSZ8795 family: 0x%02x\n",</div><div class='add'>+				id1);</div><div class='add'>+			err = -ENODEV;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(&amp;ks-&gt;spi-&gt;dev, "unsupported family id: 0x%02x\n", id0);</div><div class='add'>+		err = -ENODEV;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+err_out:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ks8995_check_config(struct ks8995_switch *ks)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u8 val;</div><div class='add'>+</div><div class='add'>+	ret = ks8995_read_reg(ks, KS8995_REG_GC0, &amp;val);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(ks-&gt;dev, "failed to read KS8995_REG_GC0\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(ks-&gt;dev, "port 5 PHY %senabled\n",</div><div class='add'>+		(val &amp; KS8995_GC0_P5_PHY) ? "" : "not ");</div><div class='add'>+</div><div class='add'>+	val |= KS8995_GC0_P5_PHY;</div><div class='add'>+	ret = ks8995_write_reg(ks, KS8995_REG_GC0, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(ks-&gt;dev, "failed to set KS8995_REG_GC0\n");</div><div class='add'>+</div><div class='add'>+	dev_dbg(ks-&gt;dev, "set KS8995_REG_GC0 to 0x%02x\n", val);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ks8995_mac_config(struct phylink_config *config, unsigned int mode,</div><div class='add'>+		  const struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ks8995_mac_link_up(struct phylink_config *config, struct phy_device *phydev,</div><div class='add'>+		   unsigned int mode, phy_interface_t interface,</div><div class='add'>+		   int speed, int duplex, bool tx_pause, bool rx_pause)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct ks8995_switch *ks = dp-&gt;ds-&gt;priv;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+	int ret;</div><div class='add'>+	u8 val;</div><div class='add'>+</div><div class='add'>+	/* Allow forcing the mode on the fixed CPU port, no autonegotiation.</div><div class='add'>+	 * We assume autonegotiation works on the PHY-facing ports.</div><div class='add'>+	 */</div><div class='add'>+	if (port != KS8995_CPU_PORT)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dev_dbg(ks-&gt;dev, "MAC link up on CPU port (%d)\n", port);</div><div class='add'>+</div><div class='add'>+	ret = ks8995_read_reg(ks, KS8995_REG_GC4, &amp;val);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(ks-&gt;dev, "failed to read KS8995_REG_GC4\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Conjure port config */</div><div class='add'>+	switch (speed) {</div><div class='add'>+	case SPEED_10:</div><div class='add'>+		dev_dbg(ks-&gt;dev, "set switch MII to 100Mbit mode\n");</div><div class='add'>+		val |= KS8995_GC4_10BT;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_100:</div><div class='add'>+	default:</div><div class='add'>+		dev_dbg(ks-&gt;dev, "set switch MII to 100Mbit mode\n");</div><div class='add'>+		val &amp;= ~KS8995_GC4_10BT;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (duplex == DUPLEX_HALF) {</div><div class='add'>+		dev_dbg(ks-&gt;dev, "set switch MII to half duplex\n");</div><div class='add'>+		val |= KS8995_GC4_MII_HD;</div><div class='add'>+	} else {</div><div class='add'>+		dev_dbg(ks-&gt;dev, "set switch MII to full duplex\n");</div><div class='add'>+		val &amp;= ~KS8995_GC4_MII_HD;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(ks-&gt;dev, "set KS8995_REG_GC4 to %02x\n", val);</div><div class='add'>+</div><div class='add'>+	/* Enable the CPU port */</div><div class='add'>+	ret = ks8995_write_reg(ks, KS8995_REG_GC4, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(ks-&gt;dev, "failed to set KS8995_REG_GC4\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ks8995_mac_link_down(struct phylink_config *config, unsigned int mode,</div><div class='add'>+		     phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct ks8995_switch *ks = dp-&gt;ds-&gt;priv;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+</div><div class='add'>+	if (port != KS8995_CPU_PORT)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dev_dbg(ks-&gt;dev, "MAC link down on CPU port (%d)\n", port);</div><div class='add'>+</div><div class='add'>+	/* Disable the CPU port */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct phylink_mac_ops ks8995_phylink_mac_ops = {</div><div class='add'>+	.mac_config = ks8995_mac_config,</div><div class='add'>+	.mac_link_up = ks8995_mac_link_up,</div><div class='add'>+	.mac_link_down = ks8995_mac_link_down,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static enum</div><div class='add'>+dsa_tag_protocol ks8995_get_tag_protocol(struct dsa_switch *ds,</div><div class='add'>+					 int port,</div><div class='add'>+					 enum dsa_tag_protocol mp)</div><div class='add'>+{</div><div class='add'>+	/* This switch actually uses the 6 byte KS8995 protocol */</div><div class='add'>+	return DSA_TAG_PROTO_NONE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ks8995_setup(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ks8995_port_enable(struct dsa_switch *ds, int port,</div><div class='add'>+			      struct phy_device *phy)</div><div class='add'>+{</div><div class='add'>+	struct ks8995_switch *ks = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	dev_dbg(ks-&gt;dev, "enable port %d\n", port);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ks8995_port_disable(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct ks8995_switch *ks = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	dev_dbg(ks-&gt;dev, "disable port %d\n", port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ks8995_port_pre_bridge_flags(struct dsa_switch *ds, int port,</div><div class='add'>+					struct switchdev_brport_flags flags,</div><div class='add'>+					struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	/* We support enabling/disabling learning */</div><div class='add'>+	if (flags.mask &amp; ~(BR_LEARNING))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ks8995_port_bridge_flags(struct dsa_switch *ds, int port,</div><div class='add'>+				    struct switchdev_brport_flags flags,</div><div class='add'>+				    struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ks8995_switch *ks = ds-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+	u8 val;</div><div class='add'>+</div><div class='add'>+	if (flags.mask &amp; BR_LEARNING) {</div><div class='add'>+		ret = ks8995_read_reg(ks, KS8995_REG_PC(port, KS8995_REG_PC2), &amp;val);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(ks-&gt;dev, "failed to read KS8995_REG_PC2 on port %d\n", port);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (flags.val &amp; BR_LEARNING)</div><div class='add'>+			val &amp;= ~KS8995_PC2_LEARN_DIS;</div><div class='add'>+		else</div><div class='add'>+			val |= KS8995_PC2_LEARN_DIS;</div><div class='add'>+</div><div class='add'>+		ret = ks8995_write_reg(ks, KS8995_REG_PC(port, KS8995_REG_PC2), val);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(ks-&gt;dev, "failed to write KS8995_REG_PC2 on port %d\n", port);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ks8995_port_stp_state_set(struct dsa_switch *ds, int port, u8 state)</div><div class='add'>+{</div><div class='add'>+	struct ks8995_switch *ks = ds-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+	u8 val;</div><div class='add'>+</div><div class='add'>+	ret = ks8995_read_reg(ks, KS8995_REG_PC(port, KS8995_REG_PC2), &amp;val);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(ks-&gt;dev, "failed to read KS8995_REG_PC2 on port %d\n", port);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set the bits for the different STP states in accordance with</div><div class='add'>+	 * the datasheet, pages 36-37 "Spanning tree support".</div><div class='add'>+	 */</div><div class='add'>+	switch (state) {</div><div class='add'>+	case BR_STATE_DISABLED:</div><div class='add'>+	case BR_STATE_BLOCKING:</div><div class='add'>+	case BR_STATE_LISTENING:</div><div class='add'>+		val &amp;= ~KS8995_PC2_TXEN;</div><div class='add'>+		val &amp;= ~KS8995_PC2_RXEN;</div><div class='add'>+		val |= KS8995_PC2_LEARN_DIS;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_LEARNING:</div><div class='add'>+		val &amp;= ~KS8995_PC2_TXEN;</div><div class='add'>+		val &amp;= ~KS8995_PC2_RXEN;</div><div class='add'>+		val &amp;= ~KS8995_PC2_LEARN_DIS;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_FORWARDING:</div><div class='add'>+		val |= KS8995_PC2_TXEN;</div><div class='add'>+		val |= KS8995_PC2_RXEN;</div><div class='add'>+		val &amp;= ~KS8995_PC2_LEARN_DIS;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(ks-&gt;dev, "unknown bridge state requested\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ks8995_write_reg(ks, KS8995_REG_PC(port, KS8995_REG_PC2), val);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(ks-&gt;dev, "failed to write KS8995_REG_PC2 on port %d\n", port);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(ks-&gt;dev, "set KS8995_REG_PC2 for port %d to %02x\n", port, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ks8995_phylink_get_caps(struct dsa_switch *dsa, int port,</div><div class='add'>+				    struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	unsigned long *interfaces = config-&gt;supported_interfaces;</div><div class='add'>+</div><div class='add'>+	if (port == KS8995_CPU_PORT)</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_MII, interfaces);</div><div class='add'>+</div><div class='add'>+	if (port &lt;= 3) {</div><div class='add'>+		/* Internal PHYs */</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_INTERNAL, interfaces);</div><div class='add'>+		/* phylib default */</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_MII, interfaces);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	config-&gt;mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Huge packet support up to 1916 byte packages "inclusive"</div><div class='add'>+ * which means that tags are included. If the bit is not set</div><div class='add'>+ * it is 1536 bytes "inclusive". We present the length without</div><div class='add'>+ * tags or ethernet headers. The setting affects all ports.</div><div class='add'>+ */</div><div class='add'>+static int ks8995_change_mtu(struct dsa_switch *ds, int port, int new_mtu)</div><div class='add'>+{</div><div class='add'>+	struct ks8995_switch *ks = ds-&gt;priv;</div><div class='add'>+	unsigned int max_mtu;</div><div class='add'>+	int ret;</div><div class='add'>+	u8 val;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	ks-&gt;max_mtu[port] = new_mtu;</div><div class='add'>+</div><div class='add'>+	/* Roof out the MTU for the entire switch to the greatest</div><div class='add'>+	 * common denominator: the biggest set for any one port will</div><div class='add'>+	 * be the biggest MTU for the switch.</div><div class='add'>+	 */</div><div class='add'>+	max_mtu = ETH_DATA_LEN;</div><div class='add'>+	for (i = 0; i &lt; KS8995_NUM_PORTS; i++) {</div><div class='add'>+		if (ks-&gt;max_mtu[i] &gt; max_mtu)</div><div class='add'>+			max_mtu = ks-&gt;max_mtu[i];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Translate to layer 2 size.</div><div class='add'>+	 * Add ethernet and (possible) VLAN headers, and checksum to the size.</div><div class='add'>+	 * For ETH_DATA_LEN (1500 bytes) this will add up to 1522 bytes.</div><div class='add'>+	 */</div><div class='add'>+	max_mtu += VLAN_ETH_HLEN;</div><div class='add'>+	max_mtu += ETH_FCS_LEN;</div><div class='add'>+</div><div class='add'>+	ret = ks8995_read_reg(ks, KS8995_REG_GC2, &amp;val);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(ks-&gt;dev, "failed to read KS8995_REG_GC2\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (max_mtu &lt;= 1522) {</div><div class='add'>+		val &amp;= ~KS8995_GC2_HUGE;</div><div class='add'>+		val &amp;= ~KS8995_GC2_LEGAL;</div><div class='add'>+	} else if (max_mtu &gt; 1522 &amp;&amp; max_mtu &lt;= 1536) {</div><div class='add'>+		/* This accepts packets up to 1536 bytes */</div><div class='add'>+		val &amp;= ~KS8995_GC2_HUGE;</div><div class='add'>+		val |= KS8995_GC2_LEGAL;</div><div class='add'>+	} else {</div><div class='add'>+		/* This accepts packets up to 1916 bytes */</div><div class='add'>+		val |= KS8995_GC2_HUGE;</div><div class='add'>+		val |= KS8995_GC2_LEGAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(ks-&gt;dev, "new max MTU %d bytes (inclusive)\n", max_mtu);</div><div class='add'>+</div><div class='add'>+	ret = ks8995_write_reg(ks, KS8995_REG_GC2, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(ks-&gt;dev, "failed to set KS8995_REG_GC2\n");</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ks8995_get_max_mtu(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	return 1916 - ETH_HLEN - ETH_FCS_LEN;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct dsa_switch_ops ks8995_ds_ops = {</div><div class='add'>+	.get_tag_protocol = ks8995_get_tag_protocol,</div><div class='add'>+	.setup = ks8995_setup,</div><div class='add'>+	.port_pre_bridge_flags = ks8995_port_pre_bridge_flags,</div><div class='add'>+	.port_bridge_flags = ks8995_port_bridge_flags,</div><div class='add'>+	.port_enable = ks8995_port_enable,</div><div class='add'>+	.port_disable = ks8995_port_disable,</div><div class='add'>+	.port_stp_state_set = ks8995_port_stp_state_set,</div><div class='add'>+	.port_change_mtu = ks8995_change_mtu,</div><div class='add'>+	.port_max_mtu = ks8995_get_max_mtu,</div><div class='add'>+	.phylink_get_caps = ks8995_phylink_get_caps,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------ */</div><div class='add'>+static int ks8995_probe(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+	struct ks8995_switch *ks;</div><div class='add'>+	int err;</div><div class='add'>+	int variant = spi_get_device_id(spi)-&gt;driver_data;</div><div class='add'>+</div><div class='add'>+	if (variant &gt;= max_variant) {</div><div class='add'>+		dev_err(&amp;spi-&gt;dev, "bad chip variant %d\n", variant);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ks = devm_kzalloc(&amp;spi-&gt;dev, sizeof(*ks), GFP_KERNEL);</div><div class='add'>+	if (!ks)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;ks-&gt;lock);</div><div class='add'>+	ks-&gt;spi = spi;</div><div class='add'>+	ks-&gt;dev = &amp;spi-&gt;dev;</div><div class='add'>+	ks-&gt;chip = &amp;ks8995_chip[variant];</div><div class='add'>+</div><div class='add'>+	ks-&gt;reset_gpio = devm_gpiod_get_optional(&amp;spi-&gt;dev, "reset",</div><div class='add'>+						 GPIOD_OUT_HIGH);</div><div class='add'>+	err = PTR_ERR_OR_ZERO(ks-&gt;reset_gpio);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;spi-&gt;dev,</div><div class='add'>+			"failed to get reset gpio: %d\n", err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = gpiod_set_consumer_name(ks-&gt;reset_gpio, "switch-reset");</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (ks-&gt;reset_gpio) {</div><div class='add'>+		/*</div><div class='add'>+		 * If a reset line was obtained, wait for 100us after</div><div class='add'>+		 * de-asserting RESET before accessing any registers, see</div><div class='add'>+		 * the KS8995MA datasheet, page 44.</div><div class='add'>+		 */</div><div class='add'>+		gpiod_set_value_cansleep(ks-&gt;reset_gpio, 0);</div><div class='add'>+		udelay(100);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spi_set_drvdata(spi, ks);</div><div class='add'>+</div><div class='add'>+	spi-&gt;mode = SPI_MODE_0;</div><div class='add'>+	spi-&gt;bits_per_word = 8;</div><div class='add'>+	err = spi_setup(spi);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;spi-&gt;dev, "spi_setup failed, err=%d\n", err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = ks8995_get_revision(ks);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = ks8995_reset(ks);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	dev_info(&amp;spi-&gt;dev, "%s device found, Chip ID:%x, Revision:%x\n",</div><div class='add'>+		 ks-&gt;chip-&gt;name, ks-&gt;chip-&gt;chip_id, ks-&gt;revision_id);</div><div class='add'>+</div><div class='add'>+	err = ks8995_check_config(ks);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	ks-&gt;ds = devm_kzalloc(&amp;spi-&gt;dev, sizeof(*ks-&gt;ds), GFP_KERNEL);</div><div class='add'>+	if (!ks-&gt;ds)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ks-&gt;ds-&gt;dev = &amp;spi-&gt;dev;</div><div class='add'>+	ks-&gt;ds-&gt;num_ports = KS8995_NUM_PORTS;</div><div class='add'>+	ks-&gt;ds-&gt;ops = &amp;ks8995_ds_ops;</div><div class='add'>+	ks-&gt;ds-&gt;phylink_mac_ops = &amp;ks8995_phylink_mac_ops;</div><div class='add'>+	ks-&gt;ds-&gt;priv = ks;</div><div class='add'>+</div><div class='add'>+	err = dsa_register_switch(ks-&gt;ds);</div><div class='add'>+	if (err)</div><div class='add'>+		return dev_err_probe(&amp;spi-&gt;dev, err,</div><div class='add'>+				     "unable to register DSA switch\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ks8995_remove(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+	struct ks8995_switch *ks = spi_get_drvdata(spi);</div><div class='add'>+</div><div class='add'>+	dsa_unregister_switch(ks-&gt;ds);</div><div class='add'>+	/* assert reset */</div><div class='add'>+	gpiod_set_value_cansleep(ks-&gt;reset_gpio, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------ */</div><div class='add'>+static struct spi_driver ks8995_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name	    = "spi-ks8995",</div><div class='add'>+		.of_match_table = ks8995_spi_of_match,</div><div class='add'>+	},</div><div class='add'>+	.probe	  = ks8995_probe,</div><div class='add'>+	.remove	  = ks8995_remove,</div><div class='add'>+	.id_table = ks8995_id,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_spi_driver(ks8995_driver);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION(DRV_DESC);</div><div class='add'>+MODULE_VERSION(DRV_VERSION);</div><div class='add'>+MODULE_AUTHOR("Gabor Juhos &lt;juhosg at openwrt.org&gt;");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/net/dsa/lan9303-core.c b/drivers/net/dsa/lan9303-core.c<br/>new file mode 100644<br/>index 000000000000..d246f95d57ec<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/lan9303-core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/lan9303-core.c</a></div><div class='hunk'>@@ -0,0 +1,1515 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2017 Pengutronix, Juergen Borleis &lt;kernel@pengutronix.de&gt;</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/gpio/consumer.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;linux/iopoll.h&gt;</div><div class='add'>+#include &lt;linux/mutex.h&gt;</div><div class='add'>+#include &lt;linux/mii.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/if_bridge.h&gt;</div><div class='add'>+#include &lt;linux/if_vlan.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+</div><div class='add'>+#include "lan9303.h"</div><div class='add'>+</div><div class='add'>+/* For the LAN9303 and LAN9354, only port 0 is an XMII port. */</div><div class='add'>+#define IS_PORT_XMII(port)	((port) == 0)</div><div class='add'>+</div><div class='add'>+#define LAN9303_NUM_PORTS 3</div><div class='add'>+</div><div class='add'>+/* 13.2 System Control and Status Registers</div><div class='add'>+ * Multiply register number by 4 to get address offset.</div><div class='add'>+ */</div><div class='add'>+#define LAN9303_CHIP_REV 0x14</div><div class='add'>+# define LAN9303_CHIP_ID 0x9303</div><div class='add'>+# define LAN9352_CHIP_ID 0x9352</div><div class='add'>+# define LAN9353_CHIP_ID 0x9353</div><div class='add'>+# define LAN9354_CHIP_ID 0x9354</div><div class='add'>+# define LAN9355_CHIP_ID 0x9355</div><div class='add'>+#define LAN9303_IRQ_CFG 0x15</div><div class='add'>+# define LAN9303_IRQ_CFG_IRQ_ENABLE BIT(8)</div><div class='add'>+# define LAN9303_IRQ_CFG_IRQ_POL BIT(4)</div><div class='add'>+# define LAN9303_IRQ_CFG_IRQ_TYPE BIT(0)</div><div class='add'>+#define LAN9303_INT_STS 0x16</div><div class='add'>+# define LAN9303_INT_STS_PHY_INT2 BIT(27)</div><div class='add'>+# define LAN9303_INT_STS_PHY_INT1 BIT(26)</div><div class='add'>+#define LAN9303_INT_EN 0x17</div><div class='add'>+# define LAN9303_INT_EN_PHY_INT2_EN BIT(27)</div><div class='add'>+# define LAN9303_INT_EN_PHY_INT1_EN BIT(26)</div><div class='add'>+#define LAN9303_BYTE_ORDER 0x19</div><div class='add'>+#define LAN9303_HW_CFG 0x1D</div><div class='add'>+# define LAN9303_HW_CFG_READY BIT(27)</div><div class='add'>+# define LAN9303_HW_CFG_AMDX_EN_PORT2 BIT(26)</div><div class='add'>+# define LAN9303_HW_CFG_AMDX_EN_PORT1 BIT(25)</div><div class='add'>+#define LAN9303_PMI_DATA 0x29</div><div class='add'>+#define LAN9303_PMI_ACCESS 0x2A</div><div class='add'>+# define LAN9303_PMI_ACCESS_PHY_ADDR(x) (((x) &amp; 0x1f) &lt;&lt; 11)</div><div class='add'>+# define LAN9303_PMI_ACCESS_MIIRINDA(x) (((x) &amp; 0x1f) &lt;&lt; 6)</div><div class='add'>+# define LAN9303_PMI_ACCESS_MII_BUSY BIT(0)</div><div class='add'>+# define LAN9303_PMI_ACCESS_MII_WRITE BIT(1)</div><div class='add'>+#define LAN9303_MANUAL_FC_1 0x68</div><div class='add'>+#define LAN9303_MANUAL_FC_2 0x69</div><div class='add'>+#define LAN9303_MANUAL_FC_0 0x6a</div><div class='add'>+# define LAN9303_BP_EN BIT(6)</div><div class='add'>+# define LAN9303_RX_FC_EN BIT(2)</div><div class='add'>+# define LAN9303_TX_FC_EN BIT(1)</div><div class='add'>+#define LAN9303_SWITCH_CSR_DATA 0x6b</div><div class='add'>+#define LAN9303_SWITCH_CSR_CMD 0x6c</div><div class='add'>+#define LAN9303_SWITCH_CSR_CMD_BUSY BIT(31)</div><div class='add'>+#define LAN9303_SWITCH_CSR_CMD_RW BIT(30)</div><div class='add'>+#define LAN9303_SWITCH_CSR_CMD_LANES (BIT(19) | BIT(18) | BIT(17) | BIT(16))</div><div class='add'>+#define LAN9303_VIRT_PHY_BASE 0x70</div><div class='add'>+#define LAN9303_VIRT_SPECIAL_CTRL 0x77</div><div class='add'>+#define  LAN9303_VIRT_SPECIAL_TURBO BIT(10) /*Turbo MII Enable*/</div><div class='add'>+</div><div class='add'>+/*13.4 Switch Fabric Control and Status Registers</div><div class='add'>+ * Accessed indirectly via SWITCH_CSR_CMD, SWITCH_CSR_DATA.</div><div class='add'>+ */</div><div class='add'>+#define LAN9303_SW_DEV_ID 0x0000</div><div class='add'>+#define LAN9303_SW_RESET 0x0001</div><div class='add'>+#define LAN9303_SW_RESET_RESET BIT(0)</div><div class='add'>+#define LAN9303_SW_IMR 0x0004</div><div class='add'>+#define LAN9303_SW_IPR 0x0005</div><div class='add'>+#define LAN9303_MAC_VER_ID_0 0x0400</div><div class='add'>+#define LAN9303_MAC_RX_CFG_0 0x0401</div><div class='add'>+# define LAN9303_MAC_RX_CFG_X_REJECT_MAC_TYPES BIT(1)</div><div class='add'>+# define LAN9303_MAC_RX_CFG_X_RX_ENABLE BIT(0)</div><div class='add'>+#define LAN9303_MAC_RX_UNDSZE_CNT_0 0x0410</div><div class='add'>+#define LAN9303_MAC_RX_64_CNT_0 0x0411</div><div class='add'>+#define LAN9303_MAC_RX_127_CNT_0 0x0412</div><div class='add'>+#define LAN9303_MAC_RX_255_CNT_0 0x413</div><div class='add'>+#define LAN9303_MAC_RX_511_CNT_0 0x0414</div><div class='add'>+#define LAN9303_MAC_RX_1023_CNT_0 0x0415</div><div class='add'>+#define LAN9303_MAC_RX_MAX_CNT_0 0x0416</div><div class='add'>+#define LAN9303_MAC_RX_OVRSZE_CNT_0 0x0417</div><div class='add'>+#define LAN9303_MAC_RX_PKTOK_CNT_0 0x0418</div><div class='add'>+#define LAN9303_MAC_RX_CRCERR_CNT_0 0x0419</div><div class='add'>+#define LAN9303_MAC_RX_MULCST_CNT_0 0x041a</div><div class='add'>+#define LAN9303_MAC_RX_BRDCST_CNT_0 0x041b</div><div class='add'>+#define LAN9303_MAC_RX_PAUSE_CNT_0 0x041c</div><div class='add'>+#define LAN9303_MAC_RX_FRAG_CNT_0 0x041d</div><div class='add'>+#define LAN9303_MAC_RX_JABB_CNT_0 0x041e</div><div class='add'>+#define LAN9303_MAC_RX_ALIGN_CNT_0 0x041f</div><div class='add'>+#define LAN9303_MAC_RX_PKTLEN_CNT_0 0x0420</div><div class='add'>+#define LAN9303_MAC_RX_GOODPKTLEN_CNT_0 0x0421</div><div class='add'>+#define LAN9303_MAC_RX_SYMBL_CNT_0 0x0422</div><div class='add'>+#define LAN9303_MAC_RX_CTLFRM_CNT_0 0x0423</div><div class='add'>+</div><div class='add'>+#define LAN9303_MAC_TX_CFG_0 0x0440</div><div class='add'>+# define LAN9303_MAC_TX_CFG_X_TX_IFG_CONFIG_DEFAULT (21 &lt;&lt; 2)</div><div class='add'>+# define LAN9303_MAC_TX_CFG_X_TX_PAD_ENABLE BIT(1)</div><div class='add'>+# define LAN9303_MAC_TX_CFG_X_TX_ENABLE BIT(0)</div><div class='add'>+#define LAN9303_MAC_TX_DEFER_CNT_0 0x0451</div><div class='add'>+#define LAN9303_MAC_TX_PAUSE_CNT_0 0x0452</div><div class='add'>+#define LAN9303_MAC_TX_PKTOK_CNT_0 0x0453</div><div class='add'>+#define LAN9303_MAC_TX_64_CNT_0 0x0454</div><div class='add'>+#define LAN9303_MAC_TX_127_CNT_0 0x0455</div><div class='add'>+#define LAN9303_MAC_TX_255_CNT_0 0x0456</div><div class='add'>+#define LAN9303_MAC_TX_511_CNT_0 0x0457</div><div class='add'>+#define LAN9303_MAC_TX_1023_CNT_0 0x0458</div><div class='add'>+#define LAN9303_MAC_TX_MAX_CNT_0 0x0459</div><div class='add'>+#define LAN9303_MAC_TX_UNDSZE_CNT_0 0x045a</div><div class='add'>+#define LAN9303_MAC_TX_PKTLEN_CNT_0 0x045c</div><div class='add'>+#define LAN9303_MAC_TX_BRDCST_CNT_0 0x045d</div><div class='add'>+#define LAN9303_MAC_TX_MULCST_CNT_0 0x045e</div><div class='add'>+#define LAN9303_MAC_TX_LATECOL_0 0x045f</div><div class='add'>+#define LAN9303_MAC_TX_EXCOL_CNT_0 0x0460</div><div class='add'>+#define LAN9303_MAC_TX_SNGLECOL_CNT_0 0x0461</div><div class='add'>+#define LAN9303_MAC_TX_MULTICOL_CNT_0 0x0462</div><div class='add'>+#define LAN9303_MAC_TX_TOTALCOL_CNT_0 0x0463</div><div class='add'>+</div><div class='add'>+#define LAN9303_MAC_VER_ID_1 0x0800</div><div class='add'>+#define LAN9303_MAC_RX_CFG_1 0x0801</div><div class='add'>+#define LAN9303_MAC_TX_CFG_1 0x0840</div><div class='add'>+#define LAN9303_MAC_VER_ID_2 0x0c00</div><div class='add'>+#define LAN9303_MAC_RX_CFG_2 0x0c01</div><div class='add'>+#define LAN9303_MAC_TX_CFG_2 0x0c40</div><div class='add'>+#define LAN9303_SWE_ALR_CMD 0x1800</div><div class='add'>+# define LAN9303_ALR_CMD_MAKE_ENTRY    BIT(2)</div><div class='add'>+# define LAN9303_ALR_CMD_GET_FIRST     BIT(1)</div><div class='add'>+# define LAN9303_ALR_CMD_GET_NEXT      BIT(0)</div><div class='add'>+#define LAN9303_SWE_ALR_WR_DAT_0 0x1801</div><div class='add'>+#define LAN9303_SWE_ALR_WR_DAT_1 0x1802</div><div class='add'>+# define LAN9303_ALR_DAT1_VALID        BIT(26)</div><div class='add'>+# define LAN9303_ALR_DAT1_END_OF_TABL  BIT(25)</div><div class='add'>+# define LAN9303_ALR_DAT1_AGE_OVERRID  BIT(25)</div><div class='add'>+# define LAN9303_ALR_DAT1_STATIC       BIT(24)</div><div class='add'>+# define LAN9303_ALR_DAT1_PORT_BITOFFS  16</div><div class='add'>+# define LAN9303_ALR_DAT1_PORT_MASK    (7 &lt;&lt; LAN9303_ALR_DAT1_PORT_BITOFFS)</div><div class='add'>+#define LAN9303_SWE_ALR_RD_DAT_0 0x1805</div><div class='add'>+#define LAN9303_SWE_ALR_RD_DAT_1 0x1806</div><div class='add'>+#define LAN9303_SWE_ALR_CMD_STS 0x1808</div><div class='add'>+# define ALR_STS_MAKE_PEND     BIT(0)</div><div class='add'>+#define LAN9303_SWE_VLAN_CMD 0x180b</div><div class='add'>+# define LAN9303_SWE_VLAN_CMD_RNW BIT(5)</div><div class='add'>+# define LAN9303_SWE_VLAN_CMD_PVIDNVLAN BIT(4)</div><div class='add'>+#define LAN9303_SWE_VLAN_WR_DATA 0x180c</div><div class='add'>+#define LAN9303_SWE_VLAN_RD_DATA 0x180e</div><div class='add'>+# define LAN9303_SWE_VLAN_MEMBER_PORT2 BIT(17)</div><div class='add'>+# define LAN9303_SWE_VLAN_UNTAG_PORT2 BIT(16)</div><div class='add'>+# define LAN9303_SWE_VLAN_MEMBER_PORT1 BIT(15)</div><div class='add'>+# define LAN9303_SWE_VLAN_UNTAG_PORT1 BIT(14)</div><div class='add'>+# define LAN9303_SWE_VLAN_MEMBER_PORT0 BIT(13)</div><div class='add'>+# define LAN9303_SWE_VLAN_UNTAG_PORT0 BIT(12)</div><div class='add'>+#define LAN9303_SWE_VLAN_CMD_STS 0x1810</div><div class='add'>+#define LAN9303_SWE_GLB_INGRESS_CFG 0x1840</div><div class='add'>+# define LAN9303_SWE_GLB_INGR_IGMP_TRAP BIT(7)</div><div class='add'>+# define LAN9303_SWE_GLB_INGR_IGMP_PORT(p) BIT(10 + p)</div><div class='add'>+#define LAN9303_SWE_PORT_STATE 0x1843</div><div class='add'>+# define LAN9303_SWE_PORT_STATE_FORWARDING_PORT2 (0)</div><div class='add'>+# define LAN9303_SWE_PORT_STATE_LEARNING_PORT2 BIT(5)</div><div class='add'>+# define LAN9303_SWE_PORT_STATE_BLOCKING_PORT2 BIT(4)</div><div class='add'>+# define LAN9303_SWE_PORT_STATE_FORWARDING_PORT1 (0)</div><div class='add'>+# define LAN9303_SWE_PORT_STATE_LEARNING_PORT1 BIT(3)</div><div class='add'>+# define LAN9303_SWE_PORT_STATE_BLOCKING_PORT1 BIT(2)</div><div class='add'>+# define LAN9303_SWE_PORT_STATE_FORWARDING_PORT0 (0)</div><div class='add'>+# define LAN9303_SWE_PORT_STATE_LEARNING_PORT0 BIT(1)</div><div class='add'>+# define LAN9303_SWE_PORT_STATE_BLOCKING_PORT0 BIT(0)</div><div class='add'>+# define LAN9303_SWE_PORT_STATE_DISABLED_PORT0 (3)</div><div class='add'>+#define LAN9303_SWE_PORT_MIRROR 0x1846</div><div class='add'>+# define LAN9303_SWE_PORT_MIRROR_SNIFF_ALL BIT(8)</div><div class='add'>+# define LAN9303_SWE_PORT_MIRROR_SNIFFER_PORT2 BIT(7)</div><div class='add'>+# define LAN9303_SWE_PORT_MIRROR_SNIFFER_PORT1 BIT(6)</div><div class='add'>+# define LAN9303_SWE_PORT_MIRROR_SNIFFER_PORT0 BIT(5)</div><div class='add'>+# define LAN9303_SWE_PORT_MIRROR_MIRRORED_PORT2 BIT(4)</div><div class='add'>+# define LAN9303_SWE_PORT_MIRROR_MIRRORED_PORT1 BIT(3)</div><div class='add'>+# define LAN9303_SWE_PORT_MIRROR_MIRRORED_PORT0 BIT(2)</div><div class='add'>+# define LAN9303_SWE_PORT_MIRROR_ENABLE_RX_MIRRORING BIT(1)</div><div class='add'>+# define LAN9303_SWE_PORT_MIRROR_ENABLE_TX_MIRRORING BIT(0)</div><div class='add'>+# define LAN9303_SWE_PORT_MIRROR_DISABLED 0</div><div class='add'>+#define LAN9303_SWE_INGRESS_PORT_TYPE 0x1847</div><div class='add'>+#define  LAN9303_SWE_INGRESS_PORT_TYPE_VLAN 3</div><div class='add'>+#define LAN9303_BM_CFG 0x1c00</div><div class='add'>+#define LAN9303_BM_EGRSS_PORT_TYPE 0x1c0c</div><div class='add'>+# define LAN9303_BM_EGRSS_PORT_TYPE_SPECIAL_TAG_PORT2 (BIT(17) | BIT(16))</div><div class='add'>+# define LAN9303_BM_EGRSS_PORT_TYPE_SPECIAL_TAG_PORT1 (BIT(9) | BIT(8))</div><div class='add'>+# define LAN9303_BM_EGRSS_PORT_TYPE_SPECIAL_TAG_PORT0 (BIT(1) | BIT(0))</div><div class='add'>+</div><div class='add'>+#define LAN9303_SWITCH_PORT_REG(port, reg0) (0x400 * (port) + (reg0))</div><div class='add'>+</div><div class='add'>+/* the built-in PHYs are of type LAN911X */</div><div class='add'>+#define MII_LAN911X_SPECIAL_MODES 0x12</div><div class='add'>+#define MII_LAN911X_SPECIAL_CONTROL_STATUS 0x1f</div><div class='add'>+</div><div class='add'>+static const struct regmap_range lan9303_valid_regs[] = {</div><div class='add'>+	regmap_reg_range(0x14, 0x17), /* misc, interrupt */</div><div class='add'>+	regmap_reg_range(0x19, 0x19), /* endian test */</div><div class='add'>+	regmap_reg_range(0x1d, 0x1d), /* hardware config */</div><div class='add'>+	regmap_reg_range(0x23, 0x24), /* general purpose timer */</div><div class='add'>+	regmap_reg_range(0x27, 0x27), /* counter */</div><div class='add'>+	regmap_reg_range(0x29, 0x2a), /* PMI index regs */</div><div class='add'>+	regmap_reg_range(0x68, 0x6a), /* flow control */</div><div class='add'>+	regmap_reg_range(0x6b, 0x6c), /* switch fabric indirect regs */</div><div class='add'>+	regmap_reg_range(0x6d, 0x6f), /* misc */</div><div class='add'>+	regmap_reg_range(0x70, 0x77), /* virtual phy */</div><div class='add'>+	regmap_reg_range(0x78, 0x7a), /* GPIO */</div><div class='add'>+	regmap_reg_range(0x7c, 0x7e), /* MAC &amp; reset */</div><div class='add'>+	regmap_reg_range(0x80, 0xb7), /* switch fabric direct regs (wr only) */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_range lan9303_reserved_ranges[] = {</div><div class='add'>+	regmap_reg_range(0x00, 0x13),</div><div class='add'>+	regmap_reg_range(0x18, 0x18),</div><div class='add'>+	regmap_reg_range(0x1a, 0x1c),</div><div class='add'>+	regmap_reg_range(0x1e, 0x22),</div><div class='add'>+	regmap_reg_range(0x25, 0x26),</div><div class='add'>+	regmap_reg_range(0x28, 0x28),</div><div class='add'>+	regmap_reg_range(0x2b, 0x67),</div><div class='add'>+	regmap_reg_range(0x7b, 0x7b),</div><div class='add'>+	regmap_reg_range(0x7f, 0x7f),</div><div class='add'>+	regmap_reg_range(0xb8, 0xff),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct regmap_access_table lan9303_register_set = {</div><div class='add'>+	.yes_ranges = lan9303_valid_regs,</div><div class='add'>+	.n_yes_ranges = ARRAY_SIZE(lan9303_valid_regs),</div><div class='add'>+	.no_ranges = lan9303_reserved_ranges,</div><div class='add'>+	.n_no_ranges = ARRAY_SIZE(lan9303_reserved_ranges),</div><div class='add'>+};</div><div class='add'>+EXPORT_SYMBOL(lan9303_register_set);</div><div class='add'>+</div><div class='add'>+/* Flow Control registers indexed by port number */</div><div class='add'>+static unsigned int flow_ctl_reg[] = {</div><div class='add'>+	LAN9303_MANUAL_FC_0,</div><div class='add'>+	LAN9303_MANUAL_FC_1,</div><div class='add'>+	LAN9303_MANUAL_FC_2</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int lan9303_read(struct regmap *regmap, unsigned int offset, u32 *reg)</div><div class='add'>+{</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	/* we can lose arbitration for the I2C case, because the device</div><div class='add'>+	 * tries to detect and read an external EEPROM after reset and acts as</div><div class='add'>+	 * a master on the shared I2C bus itself. This conflicts with our</div><div class='add'>+	 * attempts to access the device as a slave at the same moment.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; 5; i++) {</div><div class='add'>+		ret = regmap_read(regmap, offset, reg);</div><div class='add'>+		if (!ret)</div><div class='add'>+			return 0;</div><div class='add'>+		if (ret != -EAGAIN)</div><div class='add'>+			break;</div><div class='add'>+		msleep(500);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EIO;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan9303_read_wait(struct lan9303 *chip, int offset, u32 mask)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 25; i++) {</div><div class='add'>+		u32 reg;</div><div class='add'>+		int ret;</div><div class='add'>+</div><div class='add'>+		ret = lan9303_read(chip-&gt;regmap, offset, &amp;reg);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(chip-&gt;dev, "%s failed to read offset %d: %d\n",</div><div class='add'>+				__func__, offset, ret);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+		if (!(reg &amp; mask))</div><div class='add'>+			return 0;</div><div class='add'>+		usleep_range(1000, 2000);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -ETIMEDOUT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan9303_virt_phy_reg_read(struct lan9303 *chip, int regnum)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	if (regnum &gt; MII_EXPANSION)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = lan9303_read(chip-&gt;regmap, LAN9303_VIRT_PHY_BASE + regnum, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return val &amp; 0xffff;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan9303_virt_phy_reg_write(struct lan9303 *chip, int regnum, u16 val)</div><div class='add'>+{</div><div class='add'>+	if (regnum &gt; MII_EXPANSION)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return regmap_write(chip-&gt;regmap, LAN9303_VIRT_PHY_BASE + regnum, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan9303_indirect_phy_wait_for_completion(struct lan9303 *chip)</div><div class='add'>+{</div><div class='add'>+	return lan9303_read_wait(chip, LAN9303_PMI_ACCESS,</div><div class='add'>+				 LAN9303_PMI_ACCESS_MII_BUSY);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan9303_indirect_phy_read(struct lan9303 *chip, int addr, int regnum)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = LAN9303_PMI_ACCESS_PHY_ADDR(addr);</div><div class='add'>+	val |= LAN9303_PMI_ACCESS_MIIRINDA(regnum);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;chip-&gt;indirect_mutex);</div><div class='add'>+</div><div class='add'>+	ret = lan9303_indirect_phy_wait_for_completion(chip);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto on_error;</div><div class='add'>+</div><div class='add'>+	/* start the MII read cycle */</div><div class='add'>+	ret = regmap_write(chip-&gt;regmap, LAN9303_PMI_ACCESS, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto on_error;</div><div class='add'>+</div><div class='add'>+	ret = lan9303_indirect_phy_wait_for_completion(chip);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto on_error;</div><div class='add'>+</div><div class='add'>+	/* read the result of this operation */</div><div class='add'>+	ret = lan9303_read(chip-&gt;regmap, LAN9303_PMI_DATA, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto on_error;</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;chip-&gt;indirect_mutex);</div><div class='add'>+</div><div class='add'>+	return val &amp; 0xffff;</div><div class='add'>+</div><div class='add'>+on_error:</div><div class='add'>+	mutex_unlock(&amp;chip-&gt;indirect_mutex);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan9303_indirect_phy_write(struct lan9303 *chip, int addr,</div><div class='add'>+				      int regnum, u16 val)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	reg = LAN9303_PMI_ACCESS_PHY_ADDR(addr);</div><div class='add'>+	reg |= LAN9303_PMI_ACCESS_MIIRINDA(regnum);</div><div class='add'>+	reg |= LAN9303_PMI_ACCESS_MII_WRITE;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;chip-&gt;indirect_mutex);</div><div class='add'>+</div><div class='add'>+	ret = lan9303_indirect_phy_wait_for_completion(chip);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto on_error;</div><div class='add'>+</div><div class='add'>+	/* write the data first... */</div><div class='add'>+	ret = regmap_write(chip-&gt;regmap, LAN9303_PMI_DATA, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto on_error;</div><div class='add'>+</div><div class='add'>+	/* ...then start the MII write cycle */</div><div class='add'>+	ret = regmap_write(chip-&gt;regmap, LAN9303_PMI_ACCESS, reg);</div><div class='add'>+</div><div class='add'>+on_error:</div><div class='add'>+	mutex_unlock(&amp;chip-&gt;indirect_mutex);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct lan9303_phy_ops lan9303_indirect_phy_ops = {</div><div class='add'>+	.phy_read = lan9303_indirect_phy_read,</div><div class='add'>+	.phy_write = lan9303_indirect_phy_write,</div><div class='add'>+};</div><div class='add'>+EXPORT_SYMBOL_GPL(lan9303_indirect_phy_ops);</div><div class='add'>+</div><div class='add'>+static int lan9303_switch_wait_for_completion(struct lan9303 *chip)</div><div class='add'>+{</div><div class='add'>+	return lan9303_read_wait(chip, LAN9303_SWITCH_CSR_CMD,</div><div class='add'>+				 LAN9303_SWITCH_CSR_CMD_BUSY);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan9303_write_switch_reg(struct lan9303 *chip, u16 regnum, u32 val)</div><div class='add'>+{</div><div class='add'>+	u32 reg;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	reg = regnum;</div><div class='add'>+	reg |= LAN9303_SWITCH_CSR_CMD_LANES;</div><div class='add'>+	reg |= LAN9303_SWITCH_CSR_CMD_BUSY;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;chip-&gt;indirect_mutex);</div><div class='add'>+</div><div class='add'>+	ret = lan9303_switch_wait_for_completion(chip);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto on_error;</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(chip-&gt;regmap, LAN9303_SWITCH_CSR_DATA, val);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(chip-&gt;dev, "Failed to write csr data reg: %d\n", ret);</div><div class='add'>+		goto on_error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* trigger write */</div><div class='add'>+	ret = regmap_write(chip-&gt;regmap, LAN9303_SWITCH_CSR_CMD, reg);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(chip-&gt;dev, "Failed to write csr command reg: %d\n",</div><div class='add'>+			ret);</div><div class='add'>+</div><div class='add'>+on_error:</div><div class='add'>+	mutex_unlock(&amp;chip-&gt;indirect_mutex);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan9303_read_switch_reg(struct lan9303 *chip, u16 regnum, u32 *val)</div><div class='add'>+{</div><div class='add'>+	u32 reg;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	reg = regnum;</div><div class='add'>+	reg |= LAN9303_SWITCH_CSR_CMD_LANES;</div><div class='add'>+	reg |= LAN9303_SWITCH_CSR_CMD_RW;</div><div class='add'>+	reg |= LAN9303_SWITCH_CSR_CMD_BUSY;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;chip-&gt;indirect_mutex);</div><div class='add'>+</div><div class='add'>+	ret = lan9303_switch_wait_for_completion(chip);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto on_error;</div><div class='add'>+</div><div class='add'>+	/* trigger read */</div><div class='add'>+	ret = regmap_write(chip-&gt;regmap, LAN9303_SWITCH_CSR_CMD, reg);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(chip-&gt;dev, "Failed to write csr command reg: %d\n",</div><div class='add'>+			ret);</div><div class='add'>+		goto on_error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = lan9303_switch_wait_for_completion(chip);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto on_error;</div><div class='add'>+</div><div class='add'>+	ret = lan9303_read(chip-&gt;regmap, LAN9303_SWITCH_CSR_DATA, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(chip-&gt;dev, "Failed to read csr data reg: %d\n", ret);</div><div class='add'>+on_error:</div><div class='add'>+	mutex_unlock(&amp;chip-&gt;indirect_mutex);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan9303_write_switch_reg_mask(struct lan9303 *chip, u16 regnum,</div><div class='add'>+					 u32 val, u32 mask)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	ret = lan9303_read_switch_reg(chip, regnum, &amp;reg);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	reg = (reg &amp; ~mask) | val;</div><div class='add'>+</div><div class='add'>+	return lan9303_write_switch_reg(chip, regnum, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan9303_write_switch_port(struct lan9303 *chip, int port,</div><div class='add'>+				     u16 regnum, u32 val)</div><div class='add'>+{</div><div class='add'>+	return lan9303_write_switch_reg(</div><div class='add'>+		chip, LAN9303_SWITCH_PORT_REG(port, regnum), val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan9303_read_switch_port(struct lan9303 *chip, int port,</div><div class='add'>+				    u16 regnum, u32 *val)</div><div class='add'>+{</div><div class='add'>+	return lan9303_read_switch_reg(</div><div class='add'>+		chip, LAN9303_SWITCH_PORT_REG(port, regnum), val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan9303_detect_phy_setup(struct lan9303 *chip)</div><div class='add'>+{</div><div class='add'>+	int reg;</div><div class='add'>+</div><div class='add'>+	/* Calculate chip-&gt;phy_addr_base:</div><div class='add'>+	 * Depending on the 'phy_addr_sel_strap' setting, the three phys are</div><div class='add'>+	 * using IDs 0-1-2 or IDs 1-2-3. We cannot read back the</div><div class='add'>+	 * 'phy_addr_sel_strap' setting directly, so we need a test, which</div><div class='add'>+	 * configuration is active:</div><div class='add'>+	 * Special reg 18 of phy 3 reads as 0x0000, if 'phy_addr_sel_strap' is 0</div><div class='add'>+	 * and the IDs are 0-1-2, else it contains something different from</div><div class='add'>+	 * 0x0000, which means 'phy_addr_sel_strap' is 1 and the IDs are 1-2-3.</div><div class='add'>+	 * 0xffff is returned on MDIO read with no response.</div><div class='add'>+	 */</div><div class='add'>+	reg = chip-&gt;ops-&gt;phy_read(chip, 3, MII_LAN911X_SPECIAL_MODES);</div><div class='add'>+	if (reg &lt; 0) {</div><div class='add'>+		dev_err(chip-&gt;dev, "Failed to detect phy config: %d\n", reg);</div><div class='add'>+		return reg;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	chip-&gt;phy_addr_base = reg != 0 &amp;&amp; reg != 0xffff;</div><div class='add'>+</div><div class='add'>+	dev_dbg(chip-&gt;dev, "Phy setup '%s' detected\n",</div><div class='add'>+		chip-&gt;phy_addr_base ? "1-2-3" : "0-1-2");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Map ALR-port bits to port bitmap, and back */</div><div class='add'>+static const int alrport_2_portmap[] = {1, 2, 4, 0, 3, 5, 6, 7 };</div><div class='add'>+static const int portmap_2_alrport[] = {3, 0, 1, 4, 2, 5, 6, 7 };</div><div class='add'>+</div><div class='add'>+/* Return pointer to first free ALR cache entry, return NULL if none */</div><div class='add'>+static struct lan9303_alr_cache_entry *</div><div class='add'>+lan9303_alr_cache_find_free(struct lan9303 *chip)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	struct lan9303_alr_cache_entry *entr = chip-&gt;alr_cache;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; LAN9303_NUM_ALR_RECORDS; i++, entr++)</div><div class='add'>+		if (entr-&gt;port_map == 0)</div><div class='add'>+			return entr;</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Return pointer to ALR cache entry matching MAC address */</div><div class='add'>+static struct lan9303_alr_cache_entry *</div><div class='add'>+lan9303_alr_cache_find_mac(struct lan9303 *chip, const u8 *mac_addr)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	struct lan9303_alr_cache_entry *entr = chip-&gt;alr_cache;</div><div class='add'>+</div><div class='add'>+	BUILD_BUG_ON_MSG(sizeof(struct lan9303_alr_cache_entry) &amp; 1,</div><div class='add'>+			 "ether_addr_equal require u16 alignment");</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; LAN9303_NUM_ALR_RECORDS; i++, entr++)</div><div class='add'>+		if (ether_addr_equal(entr-&gt;mac_addr, mac_addr))</div><div class='add'>+			return entr;</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan9303_csr_reg_wait(struct lan9303 *chip, int regno, u32 mask)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 25; i++) {</div><div class='add'>+		u32 reg;</div><div class='add'>+</div><div class='add'>+		lan9303_read_switch_reg(chip, regno, &amp;reg);</div><div class='add'>+		if (!(reg &amp; mask))</div><div class='add'>+			return 0;</div><div class='add'>+		usleep_range(1000, 2000);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -ETIMEDOUT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan9303_alr_make_entry_raw(struct lan9303 *chip, u32 dat0, u32 dat1)</div><div class='add'>+{</div><div class='add'>+	lan9303_write_switch_reg(chip, LAN9303_SWE_ALR_WR_DAT_0, dat0);</div><div class='add'>+	lan9303_write_switch_reg(chip, LAN9303_SWE_ALR_WR_DAT_1, dat1);</div><div class='add'>+	lan9303_write_switch_reg(chip, LAN9303_SWE_ALR_CMD,</div><div class='add'>+				 LAN9303_ALR_CMD_MAKE_ENTRY);</div><div class='add'>+	lan9303_csr_reg_wait(chip, LAN9303_SWE_ALR_CMD_STS, ALR_STS_MAKE_PEND);</div><div class='add'>+	lan9303_write_switch_reg(chip, LAN9303_SWE_ALR_CMD, 0);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+typedef int alr_loop_cb_t(struct lan9303 *chip, u32 dat0, u32 dat1,</div><div class='add'>+			  int portmap, void *ctx);</div><div class='add'>+</div><div class='add'>+static int lan9303_alr_loop(struct lan9303 *chip, alr_loop_cb_t *cb, void *ctx)</div><div class='add'>+{</div><div class='add'>+	int ret = 0, i;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;chip-&gt;alr_mutex);</div><div class='add'>+	lan9303_write_switch_reg(chip, LAN9303_SWE_ALR_CMD,</div><div class='add'>+				 LAN9303_ALR_CMD_GET_FIRST);</div><div class='add'>+	lan9303_write_switch_reg(chip, LAN9303_SWE_ALR_CMD, 0);</div><div class='add'>+</div><div class='add'>+	for (i = 1; i &lt; LAN9303_NUM_ALR_RECORDS; i++) {</div><div class='add'>+		u32 dat0, dat1;</div><div class='add'>+		int alrport, portmap;</div><div class='add'>+</div><div class='add'>+		lan9303_read_switch_reg(chip, LAN9303_SWE_ALR_RD_DAT_0, &amp;dat0);</div><div class='add'>+		lan9303_read_switch_reg(chip, LAN9303_SWE_ALR_RD_DAT_1, &amp;dat1);</div><div class='add'>+		if (dat1 &amp; LAN9303_ALR_DAT1_END_OF_TABL)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		alrport = (dat1 &amp; LAN9303_ALR_DAT1_PORT_MASK) &gt;&gt;</div><div class='add'>+						LAN9303_ALR_DAT1_PORT_BITOFFS;</div><div class='add'>+		portmap = alrport_2_portmap[alrport];</div><div class='add'>+</div><div class='add'>+		ret = cb(chip, dat0, dat1, portmap, ctx);</div><div class='add'>+		if (ret)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		lan9303_write_switch_reg(chip, LAN9303_SWE_ALR_CMD,</div><div class='add'>+					 LAN9303_ALR_CMD_GET_NEXT);</div><div class='add'>+		lan9303_write_switch_reg(chip, LAN9303_SWE_ALR_CMD, 0);</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;chip-&gt;alr_mutex);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void alr_reg_to_mac(u32 dat0, u32 dat1, u8 mac[6])</div><div class='add'>+{</div><div class='add'>+	mac[0] = (dat0 &gt;&gt;  0) &amp; 0xff;</div><div class='add'>+	mac[1] = (dat0 &gt;&gt;  8) &amp; 0xff;</div><div class='add'>+	mac[2] = (dat0 &gt;&gt; 16) &amp; 0xff;</div><div class='add'>+	mac[3] = (dat0 &gt;&gt; 24) &amp; 0xff;</div><div class='add'>+	mac[4] = (dat1 &gt;&gt;  0) &amp; 0xff;</div><div class='add'>+	mac[5] = (dat1 &gt;&gt;  8) &amp; 0xff;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct del_port_learned_ctx {</div><div class='add'>+	int port;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Clear learned (non-static) entry on given port */</div><div class='add'>+static int alr_loop_cb_del_port_learned(struct lan9303 *chip, u32 dat0,</div><div class='add'>+					u32 dat1, int portmap, void *ctx)</div><div class='add'>+{</div><div class='add'>+	struct del_port_learned_ctx *del_ctx = ctx;</div><div class='add'>+	int port = del_ctx-&gt;port;</div><div class='add'>+</div><div class='add'>+	if (((BIT(port) &amp; portmap) == 0) || (dat1 &amp; LAN9303_ALR_DAT1_STATIC))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* learned entries has only one port, we can just delete */</div><div class='add'>+	dat1 &amp;= ~LAN9303_ALR_DAT1_VALID; /* delete entry */</div><div class='add'>+	lan9303_alr_make_entry_raw(chip, dat0, dat1);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct port_fdb_dump_ctx {</div><div class='add'>+	int port;</div><div class='add'>+	void *data;</div><div class='add'>+	dsa_fdb_dump_cb_t *cb;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int alr_loop_cb_fdb_port_dump(struct lan9303 *chip, u32 dat0,</div><div class='add'>+				     u32 dat1, int portmap, void *ctx)</div><div class='add'>+{</div><div class='add'>+	struct port_fdb_dump_ctx *dump_ctx = ctx;</div><div class='add'>+	u8 mac[ETH_ALEN];</div><div class='add'>+	bool is_static;</div><div class='add'>+</div><div class='add'>+	if ((BIT(dump_ctx-&gt;port) &amp; portmap) == 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	alr_reg_to_mac(dat0, dat1, mac);</div><div class='add'>+	is_static = !!(dat1 &amp; LAN9303_ALR_DAT1_STATIC);</div><div class='add'>+	return dump_ctx-&gt;cb(mac, 0, is_static, dump_ctx-&gt;data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Set a static ALR entry. Delete entry if port_map is zero */</div><div class='add'>+static void lan9303_alr_set_entry(struct lan9303 *chip, const u8 *mac,</div><div class='add'>+				  u8 port_map, bool stp_override)</div><div class='add'>+{</div><div class='add'>+	u32 dat0, dat1, alr_port;</div><div class='add'>+</div><div class='add'>+	dev_dbg(chip-&gt;dev, "%s(%pM, %d)\n", __func__, mac, port_map);</div><div class='add'>+	dat1 = LAN9303_ALR_DAT1_STATIC;</div><div class='add'>+	if (port_map)</div><div class='add'>+		dat1 |= LAN9303_ALR_DAT1_VALID;</div><div class='add'>+	/* otherwise no ports: delete entry */</div><div class='add'>+	if (stp_override)</div><div class='add'>+		dat1 |= LAN9303_ALR_DAT1_AGE_OVERRID;</div><div class='add'>+</div><div class='add'>+	alr_port = portmap_2_alrport[port_map &amp; 7];</div><div class='add'>+	dat1 &amp;= ~LAN9303_ALR_DAT1_PORT_MASK;</div><div class='add'>+	dat1 |= alr_port &lt;&lt; LAN9303_ALR_DAT1_PORT_BITOFFS;</div><div class='add'>+</div><div class='add'>+	dat0 = 0;</div><div class='add'>+	dat0 |= (mac[0] &lt;&lt; 0);</div><div class='add'>+	dat0 |= (mac[1] &lt;&lt; 8);</div><div class='add'>+	dat0 |= (mac[2] &lt;&lt; 16);</div><div class='add'>+	dat0 |= (mac[3] &lt;&lt; 24);</div><div class='add'>+</div><div class='add'>+	dat1 |= (mac[4] &lt;&lt; 0);</div><div class='add'>+	dat1 |= (mac[5] &lt;&lt; 8);</div><div class='add'>+</div><div class='add'>+	lan9303_alr_make_entry_raw(chip, dat0, dat1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Add port to static ALR entry, create new static entry if needed */</div><div class='add'>+static int lan9303_alr_add_port(struct lan9303 *chip, const u8 *mac, int port,</div><div class='add'>+				bool stp_override)</div><div class='add'>+{</div><div class='add'>+	struct lan9303_alr_cache_entry *entr;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;chip-&gt;alr_mutex);</div><div class='add'>+	entr = lan9303_alr_cache_find_mac(chip, mac);</div><div class='add'>+	if (!entr) { /*New entry */</div><div class='add'>+		entr = lan9303_alr_cache_find_free(chip);</div><div class='add'>+		if (!entr) {</div><div class='add'>+			mutex_unlock(&amp;chip-&gt;alr_mutex);</div><div class='add'>+			return -ENOSPC;</div><div class='add'>+		}</div><div class='add'>+		ether_addr_copy(entr-&gt;mac_addr, mac);</div><div class='add'>+	}</div><div class='add'>+	entr-&gt;port_map |= BIT(port);</div><div class='add'>+	entr-&gt;stp_override = stp_override;</div><div class='add'>+	lan9303_alr_set_entry(chip, mac, entr-&gt;port_map, stp_override);</div><div class='add'>+	mutex_unlock(&amp;chip-&gt;alr_mutex);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Delete static port from ALR entry, delete entry if last port */</div><div class='add'>+static int lan9303_alr_del_port(struct lan9303 *chip, const u8 *mac, int port)</div><div class='add'>+{</div><div class='add'>+	struct lan9303_alr_cache_entry *entr;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;chip-&gt;alr_mutex);</div><div class='add'>+	entr = lan9303_alr_cache_find_mac(chip, mac);</div><div class='add'>+	if (!entr)</div><div class='add'>+		goto out;  /* no static entry found */</div><div class='add'>+</div><div class='add'>+	entr-&gt;port_map &amp;= ~BIT(port);</div><div class='add'>+	if (entr-&gt;port_map == 0) /* zero means its free again */</div><div class='add'>+		eth_zero_addr(entr-&gt;mac_addr);</div><div class='add'>+	lan9303_alr_set_entry(chip, mac, entr-&gt;port_map, entr-&gt;stp_override);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;chip-&gt;alr_mutex);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan9303_disable_processing_port(struct lan9303 *chip,</div><div class='add'>+					   unsigned int port)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* disable RX, but keep register reset default values else */</div><div class='add'>+	ret = lan9303_write_switch_port(chip, port, LAN9303_MAC_RX_CFG_0,</div><div class='add'>+					LAN9303_MAC_RX_CFG_X_REJECT_MAC_TYPES);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* disable TX, but keep register reset default values else */</div><div class='add'>+	return lan9303_write_switch_port(chip, port, LAN9303_MAC_TX_CFG_0,</div><div class='add'>+				LAN9303_MAC_TX_CFG_X_TX_IFG_CONFIG_DEFAULT |</div><div class='add'>+				LAN9303_MAC_TX_CFG_X_TX_PAD_ENABLE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan9303_enable_processing_port(struct lan9303 *chip,</div><div class='add'>+					  unsigned int port)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* enable RX and keep register reset default values else */</div><div class='add'>+	ret = lan9303_write_switch_port(chip, port, LAN9303_MAC_RX_CFG_0,</div><div class='add'>+					LAN9303_MAC_RX_CFG_X_REJECT_MAC_TYPES |</div><div class='add'>+					LAN9303_MAC_RX_CFG_X_RX_ENABLE);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* enable TX and keep register reset default values else */</div><div class='add'>+	return lan9303_write_switch_port(chip, port, LAN9303_MAC_TX_CFG_0,</div><div class='add'>+				LAN9303_MAC_TX_CFG_X_TX_IFG_CONFIG_DEFAULT |</div><div class='add'>+				LAN9303_MAC_TX_CFG_X_TX_PAD_ENABLE |</div><div class='add'>+				LAN9303_MAC_TX_CFG_X_TX_ENABLE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* forward special tagged packets from port 0 to port 1 *or* port 2 */</div><div class='add'>+static int lan9303_setup_tagging(struct lan9303 *chip)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u32 val;</div><div class='add'>+	/* enable defining the destination port via special VLAN tagging</div><div class='add'>+	 * for port 0</div><div class='add'>+	 */</div><div class='add'>+	ret = lan9303_write_switch_reg(chip, LAN9303_SWE_INGRESS_PORT_TYPE,</div><div class='add'>+				       LAN9303_SWE_INGRESS_PORT_TYPE_VLAN);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* tag incoming packets at port 1 and 2 on their way to port 0 to be</div><div class='add'>+	 * able to discover their source port</div><div class='add'>+	 */</div><div class='add'>+	val = LAN9303_BM_EGRSS_PORT_TYPE_SPECIAL_TAG_PORT0;</div><div class='add'>+	return lan9303_write_switch_reg(chip, LAN9303_BM_EGRSS_PORT_TYPE, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* We want a special working switch:</div><div class='add'>+ * - do not forward packets between port 1 and 2</div><div class='add'>+ * - forward everything from port 1 to port 0</div><div class='add'>+ * - forward everything from port 2 to port 0</div><div class='add'>+ */</div><div class='add'>+static int lan9303_separate_ports(struct lan9303 *chip)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	lan9303_alr_del_port(chip, eth_stp_addr, 0);</div><div class='add'>+	ret = lan9303_write_switch_reg(chip, LAN9303_SWE_PORT_MIRROR,</div><div class='add'>+				LAN9303_SWE_PORT_MIRROR_SNIFFER_PORT0 |</div><div class='add'>+				LAN9303_SWE_PORT_MIRROR_MIRRORED_PORT1 |</div><div class='add'>+				LAN9303_SWE_PORT_MIRROR_MIRRORED_PORT2 |</div><div class='add'>+				LAN9303_SWE_PORT_MIRROR_ENABLE_RX_MIRRORING |</div><div class='add'>+				LAN9303_SWE_PORT_MIRROR_SNIFF_ALL);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* prevent port 1 and 2 from forwarding packets by their own */</div><div class='add'>+	return lan9303_write_switch_reg(chip, LAN9303_SWE_PORT_STATE,</div><div class='add'>+				LAN9303_SWE_PORT_STATE_FORWARDING_PORT0 |</div><div class='add'>+				LAN9303_SWE_PORT_STATE_BLOCKING_PORT1 |</div><div class='add'>+				LAN9303_SWE_PORT_STATE_BLOCKING_PORT2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lan9303_bridge_ports(struct lan9303 *chip)</div><div class='add'>+{</div><div class='add'>+	/* ports bridged: remove mirroring */</div><div class='add'>+	lan9303_write_switch_reg(chip, LAN9303_SWE_PORT_MIRROR,</div><div class='add'>+				 LAN9303_SWE_PORT_MIRROR_DISABLED);</div><div class='add'>+</div><div class='add'>+	lan9303_write_switch_reg(chip, LAN9303_SWE_PORT_STATE,</div><div class='add'>+				 chip-&gt;swe_port_state);</div><div class='add'>+	lan9303_alr_add_port(chip, eth_stp_addr, 0, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lan9303_handle_reset(struct lan9303 *chip)</div><div class='add'>+{</div><div class='add'>+	if (!chip-&gt;reset_gpio)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	gpiod_set_value_cansleep(chip-&gt;reset_gpio, 1);</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;reset_duration != 0)</div><div class='add'>+		msleep(chip-&gt;reset_duration);</div><div class='add'>+</div><div class='add'>+	/* release (deassert) reset and activate the device */</div><div class='add'>+	gpiod_set_value_cansleep(chip-&gt;reset_gpio, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* stop processing packets for all ports */</div><div class='add'>+static int lan9303_disable_processing(struct lan9303 *chip)</div><div class='add'>+{</div><div class='add'>+	int p;</div><div class='add'>+</div><div class='add'>+	for (p = 1; p &lt; LAN9303_NUM_PORTS; p++) {</div><div class='add'>+		int ret = lan9303_disable_processing_port(chip, p);</div><div class='add'>+</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan9303_check_device(struct lan9303 *chip)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	int err;</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	/* In I2C-managed configurations this polling loop will clash with</div><div class='add'>+	 * switch's reading of EEPROM right after reset and this behaviour is</div><div class='add'>+	 * not configurable. While lan9303_read() already has quite long retry</div><div class='add'>+	 * timeout, seems not all cases are being detected as arbitration error.</div><div class='add'>+	 *</div><div class='add'>+	 * According to datasheet, EEPROM loader has 30ms timeout (in case of</div><div class='add'>+	 * missing EEPROM).</div><div class='add'>+	 *</div><div class='add'>+	 * Loading of the largest supported EEPROM is expected to take at least</div><div class='add'>+	 * 5.9s.</div><div class='add'>+	 */</div><div class='add'>+	err = read_poll_timeout(lan9303_read, ret,</div><div class='add'>+				!ret &amp;&amp; reg &amp; LAN9303_HW_CFG_READY,</div><div class='add'>+				20000, 6000000, false,</div><div class='add'>+				chip-&gt;regmap, LAN9303_HW_CFG, &amp;reg);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(chip-&gt;dev, "failed to read HW_CFG reg: %pe\n",</div><div class='add'>+			ERR_PTR(ret));</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(chip-&gt;dev, "HW_CFG not ready: 0x%08x\n", reg);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = lan9303_read(chip-&gt;regmap, LAN9303_CHIP_REV, &amp;reg);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(chip-&gt;dev, "failed to read chip revision register: %d\n",</div><div class='add'>+			ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (((reg &gt;&gt; 16) != LAN9303_CHIP_ID) &amp;&amp;</div><div class='add'>+	    ((reg &gt;&gt; 16) != LAN9354_CHIP_ID)) {</div><div class='add'>+		dev_err(chip-&gt;dev, "unexpected device found: LAN%4.4X\n",</div><div class='add'>+			reg &gt;&gt; 16);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* The default state of the LAN9303 device is to forward packets between</div><div class='add'>+	 * all ports (if not configured differently by an external EEPROM).</div><div class='add'>+	 * The initial state of a DSA device must be forwarding packets only</div><div class='add'>+	 * between the external and the internal ports and no forwarding</div><div class='add'>+	 * between the external ports. In preparation we stop packet handling</div><div class='add'>+	 * at all for now until the LAN9303 device is re-programmed accordingly.</div><div class='add'>+	 */</div><div class='add'>+	ret = lan9303_disable_processing(chip);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_warn(chip-&gt;dev, "failed to disable switching %d\n", ret);</div><div class='add'>+</div><div class='add'>+	dev_info(chip-&gt;dev, "Found LAN%4.4X rev. %u\n", (reg &gt;&gt; 16), reg &amp; 0xffff);</div><div class='add'>+</div><div class='add'>+	ret = lan9303_detect_phy_setup(chip);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(chip-&gt;dev,</div><div class='add'>+			"failed to discover phy bootstrap setup: %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ---------------------------- DSA -----------------------------------*/</div><div class='add'>+</div><div class='add'>+static enum dsa_tag_protocol lan9303_get_tag_protocol(struct dsa_switch *ds,</div><div class='add'>+						      int port,</div><div class='add'>+						      enum dsa_tag_protocol mp)</div><div class='add'>+{</div><div class='add'>+	return DSA_TAG_PROTO_LAN9303;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan9303_setup(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct lan9303 *chip = ds-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	/* Make sure that port 0 is the cpu port */</div><div class='add'>+	if (!dsa_is_cpu_port(ds, 0)) {</div><div class='add'>+		dev_err(chip-&gt;dev, "port 0 is not the CPU port\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Virtual Phy: Remove Turbo 200Mbit mode */</div><div class='add'>+	ret = lan9303_read(chip-&gt;regmap, LAN9303_VIRT_SPECIAL_CTRL, &amp;reg);</div><div class='add'>+	if (ret)</div><div class='add'>+		return (ret);</div><div class='add'>+</div><div class='add'>+	/* Clear the TURBO Mode bit if it was set. */</div><div class='add'>+	if (reg &amp; LAN9303_VIRT_SPECIAL_TURBO) {</div><div class='add'>+		reg &amp;= ~LAN9303_VIRT_SPECIAL_TURBO;</div><div class='add'>+		regmap_write(chip-&gt;regmap, LAN9303_VIRT_SPECIAL_CTRL, reg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = lan9303_setup_tagging(chip);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(chip-&gt;dev, "failed to setup port tagging %d\n", ret);</div><div class='add'>+</div><div class='add'>+	ret = lan9303_separate_ports(chip);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(chip-&gt;dev, "failed to separate ports %d\n", ret);</div><div class='add'>+</div><div class='add'>+	ret = lan9303_enable_processing_port(chip, 0);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(chip-&gt;dev, "failed to re-enable switching %d\n", ret);</div><div class='add'>+</div><div class='add'>+	/* Trap IGMP to port 0 */</div><div class='add'>+	ret = lan9303_write_switch_reg_mask(chip, LAN9303_SWE_GLB_INGRESS_CFG,</div><div class='add'>+					    LAN9303_SWE_GLB_INGR_IGMP_TRAP |</div><div class='add'>+					    LAN9303_SWE_GLB_INGR_IGMP_PORT(0),</div><div class='add'>+					    LAN9303_SWE_GLB_INGR_IGMP_PORT(1) |</div><div class='add'>+					    LAN9303_SWE_GLB_INGR_IGMP_PORT(2));</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(chip-&gt;dev, "failed to setup IGMP trap %d\n", ret);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct lan9303_mib_desc {</div><div class='add'>+	unsigned int offset; /* offset of first MAC */</div><div class='add'>+	const char *name;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct lan9303_mib_desc lan9303_mib[] = {</div><div class='add'>+	{ .offset = LAN9303_MAC_RX_BRDCST_CNT_0, .name = "RxBroad", },</div><div class='add'>+	{ .offset = LAN9303_MAC_RX_PAUSE_CNT_0, .name = "RxPause", },</div><div class='add'>+	{ .offset = LAN9303_MAC_RX_MULCST_CNT_0, .name = "RxMulti", },</div><div class='add'>+	{ .offset = LAN9303_MAC_RX_PKTOK_CNT_0, .name = "RxOk", },</div><div class='add'>+	{ .offset = LAN9303_MAC_RX_CRCERR_CNT_0, .name = "RxCrcErr", },</div><div class='add'>+	{ .offset = LAN9303_MAC_RX_ALIGN_CNT_0, .name = "RxAlignErr", },</div><div class='add'>+	{ .offset = LAN9303_MAC_RX_JABB_CNT_0, .name = "RxJabber", },</div><div class='add'>+	{ .offset = LAN9303_MAC_RX_FRAG_CNT_0, .name = "RxFragment", },</div><div class='add'>+	{ .offset = LAN9303_MAC_RX_64_CNT_0, .name = "Rx64Byte", },</div><div class='add'>+	{ .offset = LAN9303_MAC_RX_127_CNT_0, .name = "Rx128Byte", },</div><div class='add'>+	{ .offset = LAN9303_MAC_RX_255_CNT_0, .name = "Rx256Byte", },</div><div class='add'>+	{ .offset = LAN9303_MAC_RX_511_CNT_0, .name = "Rx512Byte", },</div><div class='add'>+	{ .offset = LAN9303_MAC_RX_1023_CNT_0, .name = "Rx1024Byte", },</div><div class='add'>+	{ .offset = LAN9303_MAC_RX_MAX_CNT_0, .name = "RxMaxByte", },</div><div class='add'>+	{ .offset = LAN9303_MAC_RX_PKTLEN_CNT_0, .name = "RxByteCnt", },</div><div class='add'>+	{ .offset = LAN9303_MAC_RX_SYMBL_CNT_0, .name = "RxSymbolCnt", },</div><div class='add'>+	{ .offset = LAN9303_MAC_RX_CTLFRM_CNT_0, .name = "RxCfs", },</div><div class='add'>+	{ .offset = LAN9303_MAC_RX_OVRSZE_CNT_0, .name = "RxOverFlow", },</div><div class='add'>+	{ .offset = LAN9303_MAC_TX_UNDSZE_CNT_0, .name = "TxShort", },</div><div class='add'>+	{ .offset = LAN9303_MAC_TX_BRDCST_CNT_0, .name = "TxBroad", },</div><div class='add'>+	{ .offset = LAN9303_MAC_TX_PAUSE_CNT_0, .name = "TxPause", },</div><div class='add'>+	{ .offset = LAN9303_MAC_TX_MULCST_CNT_0, .name = "TxMulti", },</div><div class='add'>+	{ .offset = LAN9303_MAC_RX_UNDSZE_CNT_0, .name = "RxShort", },</div><div class='add'>+	{ .offset = LAN9303_MAC_TX_64_CNT_0, .name = "Tx64Byte", },</div><div class='add'>+	{ .offset = LAN9303_MAC_TX_127_CNT_0, .name = "Tx128Byte", },</div><div class='add'>+	{ .offset = LAN9303_MAC_TX_255_CNT_0, .name = "Tx256Byte", },</div><div class='add'>+	{ .offset = LAN9303_MAC_TX_511_CNT_0, .name = "Tx512Byte", },</div><div class='add'>+	{ .offset = LAN9303_MAC_TX_1023_CNT_0, .name = "Tx1024Byte", },</div><div class='add'>+	{ .offset = LAN9303_MAC_TX_MAX_CNT_0, .name = "TxMaxByte", },</div><div class='add'>+	{ .offset = LAN9303_MAC_TX_PKTLEN_CNT_0, .name = "TxByteCnt", },</div><div class='add'>+	{ .offset = LAN9303_MAC_TX_PKTOK_CNT_0, .name = "TxOk", },</div><div class='add'>+	{ .offset = LAN9303_MAC_TX_TOTALCOL_CNT_0, .name = "TxCollision", },</div><div class='add'>+	{ .offset = LAN9303_MAC_TX_MULTICOL_CNT_0, .name = "TxMultiCol", },</div><div class='add'>+	{ .offset = LAN9303_MAC_TX_SNGLECOL_CNT_0, .name = "TxSingleCol", },</div><div class='add'>+	{ .offset = LAN9303_MAC_TX_EXCOL_CNT_0, .name = "TxExcCol", },</div><div class='add'>+	{ .offset = LAN9303_MAC_TX_DEFER_CNT_0, .name = "TxDefer", },</div><div class='add'>+	{ .offset = LAN9303_MAC_TX_LATECOL_0, .name = "TxLateCol", },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void lan9303_get_strings(struct dsa_switch *ds, int port,</div><div class='add'>+				u32 stringset, uint8_t *data)</div><div class='add'>+{</div><div class='add'>+	u8 *buf = data;</div><div class='add'>+	unsigned int u;</div><div class='add'>+</div><div class='add'>+	if (stringset != ETH_SS_STATS)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (u = 0; u &lt; ARRAY_SIZE(lan9303_mib); u++)</div><div class='add'>+		ethtool_puts(&amp;buf, lan9303_mib[u].name);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lan9303_get_ethtool_stats(struct dsa_switch *ds, int port,</div><div class='add'>+				      uint64_t *data)</div><div class='add'>+{</div><div class='add'>+	struct lan9303 *chip = ds-&gt;priv;</div><div class='add'>+	unsigned int u;</div><div class='add'>+</div><div class='add'>+	for (u = 0; u &lt; ARRAY_SIZE(lan9303_mib); u++) {</div><div class='add'>+		u32 reg;</div><div class='add'>+		int ret;</div><div class='add'>+</div><div class='add'>+		ret = lan9303_read_switch_port(</div><div class='add'>+			chip, port, lan9303_mib[u].offset, &amp;reg);</div><div class='add'>+</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_warn(chip-&gt;dev, "Reading status port %d reg %u failed\n",</div><div class='add'>+				 port, lan9303_mib[u].offset);</div><div class='add'>+			reg = 0;</div><div class='add'>+		}</div><div class='add'>+		data[u] = reg;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan9303_get_sset_count(struct dsa_switch *ds, int port, int sset)</div><div class='add'>+{</div><div class='add'>+	if (sset != ETH_SS_STATS)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return ARRAY_SIZE(lan9303_mib);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan9303_phy_read(struct dsa_switch *ds, int port, int regnum)</div><div class='add'>+{</div><div class='add'>+	struct lan9303 *chip = ds-&gt;priv;</div><div class='add'>+	int phy_base = chip-&gt;phy_addr_base;</div><div class='add'>+</div><div class='add'>+	if (port == 0)</div><div class='add'>+		return lan9303_virt_phy_reg_read(chip, regnum);</div><div class='add'>+	if (port &gt; 2)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	return chip-&gt;ops-&gt;phy_read(chip, phy_base + port, regnum);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan9303_phy_write(struct dsa_switch *ds, int port, int regnum,</div><div class='add'>+			     u16 val)</div><div class='add'>+{</div><div class='add'>+	struct lan9303 *chip = ds-&gt;priv;</div><div class='add'>+	int phy_base = chip-&gt;phy_addr_base;</div><div class='add'>+</div><div class='add'>+	if (port == 0)</div><div class='add'>+		return lan9303_virt_phy_reg_write(chip, regnum, val);</div><div class='add'>+	if (port &gt; 2)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	return chip-&gt;ops-&gt;phy_write(chip, phy_base + port, regnum, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan9303_port_enable(struct dsa_switch *ds, int port,</div><div class='add'>+			       struct phy_device *phy)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(ds, port);</div><div class='add'>+	struct lan9303 *chip = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (!dsa_port_is_user(dp))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	vlan_vid_add(dsa_port_to_conduit(dp), htons(ETH_P_8021Q), port);</div><div class='add'>+</div><div class='add'>+	return lan9303_enable_processing_port(chip, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lan9303_port_disable(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(ds, port);</div><div class='add'>+	struct lan9303 *chip = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (!dsa_port_is_user(dp))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vlan_vid_del(dsa_port_to_conduit(dp), htons(ETH_P_8021Q), port);</div><div class='add'>+</div><div class='add'>+	lan9303_disable_processing_port(chip, port);</div><div class='add'>+	lan9303_phy_write(ds, port, MII_BMCR, BMCR_PDOWN);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan9303_port_bridge_join(struct dsa_switch *ds, int port,</div><div class='add'>+				    struct dsa_bridge bridge,</div><div class='add'>+				    bool *tx_fwd_offload,</div><div class='add'>+				    struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct lan9303 *chip = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	dev_dbg(chip-&gt;dev, "%s(port %d)\n", __func__, port);</div><div class='add'>+	if (dsa_port_bridge_same(dsa_to_port(ds, 1), dsa_to_port(ds, 2))) {</div><div class='add'>+		lan9303_bridge_ports(chip);</div><div class='add'>+		chip-&gt;is_bridged = true;  /* unleash stp_state_set() */</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lan9303_port_bridge_leave(struct dsa_switch *ds, int port,</div><div class='add'>+				      struct dsa_bridge bridge)</div><div class='add'>+{</div><div class='add'>+	struct lan9303 *chip = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	dev_dbg(chip-&gt;dev, "%s(port %d)\n", __func__, port);</div><div class='add'>+	if (chip-&gt;is_bridged) {</div><div class='add'>+		lan9303_separate_ports(chip);</div><div class='add'>+		chip-&gt;is_bridged = false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lan9303_port_stp_state_set(struct dsa_switch *ds, int port,</div><div class='add'>+				       u8 state)</div><div class='add'>+{</div><div class='add'>+	int portmask, portstate;</div><div class='add'>+	struct lan9303 *chip = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	dev_dbg(chip-&gt;dev, "%s(port %d, state %d)\n",</div><div class='add'>+		__func__, port, state);</div><div class='add'>+</div><div class='add'>+	switch (state) {</div><div class='add'>+	case BR_STATE_DISABLED:</div><div class='add'>+		portstate = LAN9303_SWE_PORT_STATE_DISABLED_PORT0;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_BLOCKING:</div><div class='add'>+	case BR_STATE_LISTENING:</div><div class='add'>+		portstate = LAN9303_SWE_PORT_STATE_BLOCKING_PORT0;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_LEARNING:</div><div class='add'>+		portstate = LAN9303_SWE_PORT_STATE_LEARNING_PORT0;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_FORWARDING:</div><div class='add'>+		portstate = LAN9303_SWE_PORT_STATE_FORWARDING_PORT0;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		portstate = LAN9303_SWE_PORT_STATE_DISABLED_PORT0;</div><div class='add'>+		dev_err(chip-&gt;dev, "unknown stp state: port %d, state %d\n",</div><div class='add'>+			port, state);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	portmask = 0x3 &lt;&lt; (port * 2);</div><div class='add'>+	portstate &lt;&lt;= (port * 2);</div><div class='add'>+</div><div class='add'>+	chip-&gt;swe_port_state = (chip-&gt;swe_port_state &amp; ~portmask) | portstate;</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;is_bridged)</div><div class='add'>+		lan9303_write_switch_reg(chip, LAN9303_SWE_PORT_STATE,</div><div class='add'>+					 chip-&gt;swe_port_state);</div><div class='add'>+	/* else: touching SWE_PORT_STATE would break port separation */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lan9303_port_fast_age(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct lan9303 *chip = ds-&gt;priv;</div><div class='add'>+	struct del_port_learned_ctx del_ctx = {</div><div class='add'>+		.port = port,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dev_dbg(chip-&gt;dev, "%s(%d)\n", __func__, port);</div><div class='add'>+	lan9303_alr_loop(chip, alr_loop_cb_del_port_learned, &amp;del_ctx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan9303_port_fdb_add(struct dsa_switch *ds, int port,</div><div class='add'>+				const unsigned char *addr, u16 vid,</div><div class='add'>+				struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct lan9303 *chip = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	dev_dbg(chip-&gt;dev, "%s(%d, %pM, %d)\n", __func__, port, addr, vid);</div><div class='add'>+</div><div class='add'>+	return lan9303_alr_add_port(chip, addr, port, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan9303_port_fdb_del(struct dsa_switch *ds, int port,</div><div class='add'>+				const unsigned char *addr, u16 vid,</div><div class='add'>+				struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct lan9303 *chip = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	dev_dbg(chip-&gt;dev, "%s(%d, %pM, %d)\n", __func__, port, addr, vid);</div><div class='add'>+	lan9303_alr_del_port(chip, addr, port);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan9303_port_fdb_dump(struct dsa_switch *ds, int port,</div><div class='add'>+				 dsa_fdb_dump_cb_t *cb, void *data)</div><div class='add'>+{</div><div class='add'>+	struct lan9303 *chip = ds-&gt;priv;</div><div class='add'>+	struct port_fdb_dump_ctx dump_ctx = {</div><div class='add'>+		.port = port,</div><div class='add'>+		.data = data,</div><div class='add'>+		.cb   = cb,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	dev_dbg(chip-&gt;dev, "%s(%d)\n", __func__, port);</div><div class='add'>+	return lan9303_alr_loop(chip, alr_loop_cb_fdb_port_dump, &amp;dump_ctx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan9303_port_mdb_prepare(struct dsa_switch *ds, int port,</div><div class='add'>+				    const struct switchdev_obj_port_mdb *mdb)</div><div class='add'>+{</div><div class='add'>+	struct lan9303 *chip = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	dev_dbg(chip-&gt;dev, "%s(%d, %pM, %d)\n", __func__, port, mdb-&gt;addr,</div><div class='add'>+		mdb-&gt;vid);</div><div class='add'>+	if (mdb-&gt;vid)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	if (lan9303_alr_cache_find_mac(chip, mdb-&gt;addr))</div><div class='add'>+		return 0;</div><div class='add'>+	if (!lan9303_alr_cache_find_free(chip))</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan9303_port_mdb_add(struct dsa_switch *ds, int port,</div><div class='add'>+				const struct switchdev_obj_port_mdb *mdb,</div><div class='add'>+				struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct lan9303 *chip = ds-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = lan9303_port_mdb_prepare(ds, port, mdb);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	dev_dbg(chip-&gt;dev, "%s(%d, %pM, %d)\n", __func__, port, mdb-&gt;addr,</div><div class='add'>+		mdb-&gt;vid);</div><div class='add'>+	return lan9303_alr_add_port(chip, mdb-&gt;addr, port, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan9303_port_mdb_del(struct dsa_switch *ds, int port,</div><div class='add'>+				const struct switchdev_obj_port_mdb *mdb,</div><div class='add'>+				struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct lan9303 *chip = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	dev_dbg(chip-&gt;dev, "%s(%d, %pM, %d)\n", __func__, port, mdb-&gt;addr,</div><div class='add'>+		mdb-&gt;vid);</div><div class='add'>+	if (mdb-&gt;vid)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	lan9303_alr_del_port(chip, mdb-&gt;addr, port);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lan9303_phylink_get_caps(struct dsa_switch *ds, int port,</div><div class='add'>+				     struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	struct lan9303 *chip = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	dev_dbg(chip-&gt;dev, "%s(%d) entered.", __func__, port);</div><div class='add'>+</div><div class='add'>+	config-&gt;mac_capabilities = MAC_10 | MAC_100 | MAC_ASYM_PAUSE |</div><div class='add'>+				   MAC_SYM_PAUSE;</div><div class='add'>+</div><div class='add'>+	if (port == 0) {</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_RMII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_MII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+	} else {</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_INTERNAL,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		/* Compatibility for phylib's default interface type when the</div><div class='add'>+		 * phy-mode property is absent</div><div class='add'>+		 */</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_GMII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lan9303_phylink_mac_config(struct phylink_config *config,</div><div class='add'>+				       unsigned int mode,</div><div class='add'>+				       const struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lan9303_phylink_mac_link_down(struct phylink_config *config,</div><div class='add'>+					  unsigned int mode,</div><div class='add'>+					  phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lan9303_phylink_mac_link_up(struct phylink_config *config,</div><div class='add'>+					struct phy_device *phydev,</div><div class='add'>+					unsigned int mode,</div><div class='add'>+					phy_interface_t interface,</div><div class='add'>+					int speed, int duplex, bool tx_pause,</div><div class='add'>+					bool rx_pause)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct lan9303 *chip = dp-&gt;ds-&gt;priv;</div><div class='add'>+	struct dsa_switch *ds = dp-&gt;ds;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+	u32 ctl;</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	/* On this device, we are only interested in doing something here if</div><div class='add'>+	 * this is the xMII port. All other ports are 10/100 phys using MDIO</div><div class='add'>+	 * to control there link settings.</div><div class='add'>+	 */</div><div class='add'>+	if (!IS_PORT_XMII(port))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Disable auto-negotiation and force the speed/duplex settings. */</div><div class='add'>+	ctl = lan9303_phy_read(ds, port, MII_BMCR);</div><div class='add'>+	ctl &amp;= ~(BMCR_ANENABLE | BMCR_SPEED100 | BMCR_FULLDPLX);</div><div class='add'>+	if (speed == SPEED_100)</div><div class='add'>+		ctl |= BMCR_SPEED100;</div><div class='add'>+	if (duplex == DUPLEX_FULL)</div><div class='add'>+		ctl |= BMCR_FULLDPLX;</div><div class='add'>+	lan9303_phy_write(ds, port, MII_BMCR, ctl);</div><div class='add'>+</div><div class='add'>+	/* Force the flow control settings. */</div><div class='add'>+	lan9303_read(chip-&gt;regmap, flow_ctl_reg[port], &amp;reg);</div><div class='add'>+	reg &amp;= ~(LAN9303_BP_EN | LAN9303_RX_FC_EN | LAN9303_TX_FC_EN);</div><div class='add'>+	if (rx_pause)</div><div class='add'>+		reg |= (LAN9303_RX_FC_EN | LAN9303_BP_EN);</div><div class='add'>+	if (tx_pause)</div><div class='add'>+		reg |= LAN9303_TX_FC_EN;</div><div class='add'>+	regmap_write(chip-&gt;regmap, flow_ctl_reg[port], reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct phylink_mac_ops lan9303_phylink_mac_ops = {</div><div class='add'>+	.mac_config	= lan9303_phylink_mac_config,</div><div class='add'>+	.mac_link_down	= lan9303_phylink_mac_link_down,</div><div class='add'>+	.mac_link_up	= lan9303_phylink_mac_link_up,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct dsa_switch_ops lan9303_switch_ops = {</div><div class='add'>+	.get_tag_protocol	= lan9303_get_tag_protocol,</div><div class='add'>+	.setup			= lan9303_setup,</div><div class='add'>+	.get_strings		= lan9303_get_strings,</div><div class='add'>+	.phy_read		= lan9303_phy_read,</div><div class='add'>+	.phy_write		= lan9303_phy_write,</div><div class='add'>+	.phylink_get_caps	= lan9303_phylink_get_caps,</div><div class='add'>+	.get_ethtool_stats	= lan9303_get_ethtool_stats,</div><div class='add'>+	.get_sset_count		= lan9303_get_sset_count,</div><div class='add'>+	.port_enable		= lan9303_port_enable,</div><div class='add'>+	.port_disable		= lan9303_port_disable,</div><div class='add'>+	.port_bridge_join	= lan9303_port_bridge_join,</div><div class='add'>+	.port_bridge_leave	= lan9303_port_bridge_leave,</div><div class='add'>+	.port_stp_state_set	= lan9303_port_stp_state_set,</div><div class='add'>+	.port_fast_age		= lan9303_port_fast_age,</div><div class='add'>+	.port_fdb_add		= lan9303_port_fdb_add,</div><div class='add'>+	.port_fdb_del		= lan9303_port_fdb_del,</div><div class='add'>+	.port_fdb_dump		= lan9303_port_fdb_dump,</div><div class='add'>+	.port_mdb_add		= lan9303_port_mdb_add,</div><div class='add'>+	.port_mdb_del		= lan9303_port_mdb_del,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int lan9303_register_switch(struct lan9303 *chip)</div><div class='add'>+{</div><div class='add'>+	chip-&gt;ds = devm_kzalloc(chip-&gt;dev, sizeof(*chip-&gt;ds), GFP_KERNEL);</div><div class='add'>+	if (!chip-&gt;ds)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	chip-&gt;ds-&gt;dev = chip-&gt;dev;</div><div class='add'>+	chip-&gt;ds-&gt;num_ports = LAN9303_NUM_PORTS;</div><div class='add'>+	chip-&gt;ds-&gt;priv = chip;</div><div class='add'>+	chip-&gt;ds-&gt;ops = &amp;lan9303_switch_ops;</div><div class='add'>+	chip-&gt;ds-&gt;phylink_mac_ops = &amp;lan9303_phylink_mac_ops;</div><div class='add'>+	chip-&gt;ds-&gt;phys_mii_mask = GENMASK(LAN9303_NUM_PORTS - 1, 0);</div><div class='add'>+</div><div class='add'>+	return dsa_register_switch(chip-&gt;ds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan9303_probe_reset_gpio(struct lan9303 *chip,</div><div class='add'>+				     struct device_node *np)</div><div class='add'>+{</div><div class='add'>+	chip-&gt;reset_gpio = devm_gpiod_get_optional(chip-&gt;dev, "reset",</div><div class='add'>+						   GPIOD_OUT_HIGH);</div><div class='add'>+	if (IS_ERR(chip-&gt;reset_gpio))</div><div class='add'>+		return PTR_ERR(chip-&gt;reset_gpio);</div><div class='add'>+</div><div class='add'>+	if (!chip-&gt;reset_gpio) {</div><div class='add'>+		dev_dbg(chip-&gt;dev, "No reset GPIO defined\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	chip-&gt;reset_duration = 200;</div><div class='add'>+</div><div class='add'>+	if (np) {</div><div class='add'>+		of_property_read_u32(np, "reset-duration",</div><div class='add'>+				     &amp;chip-&gt;reset_duration);</div><div class='add'>+	} else {</div><div class='add'>+		dev_dbg(chip-&gt;dev, "reset duration defaults to 200 ms\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* A sane reset duration should not be longer than 1s */</div><div class='add'>+	if (chip-&gt;reset_duration &gt; 1000)</div><div class='add'>+		chip-&gt;reset_duration = 1000;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int lan9303_probe(struct lan9303 *chip, struct device_node *np)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;chip-&gt;indirect_mutex);</div><div class='add'>+	mutex_init(&amp;chip-&gt;alr_mutex);</div><div class='add'>+</div><div class='add'>+	ret = lan9303_probe_reset_gpio(chip, np);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	lan9303_handle_reset(chip);</div><div class='add'>+</div><div class='add'>+	/* First read to the device.  This is a Dummy read to ensure MDIO */</div><div class='add'>+	/* access is in 32-bit sync. */</div><div class='add'>+	ret = lan9303_read(chip-&gt;regmap, LAN9303_BYTE_ORDER, &amp;reg);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(chip-&gt;dev, "failed to access the device: %d\n",</div><div class='add'>+			ret);</div><div class='add'>+		if (!chip-&gt;reset_gpio) {</div><div class='add'>+			dev_dbg(chip-&gt;dev,</div><div class='add'>+				"hint: maybe failed due to missing reset GPIO\n");</div><div class='add'>+		}</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = lan9303_check_device(chip);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = lan9303_register_switch(chip);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_dbg(chip-&gt;dev, "Failed to register switch: %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(lan9303_probe);</div><div class='add'>+</div><div class='add'>+int lan9303_remove(struct lan9303 *chip)</div><div class='add'>+{</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = lan9303_disable_processing(chip);</div><div class='add'>+	if (rc != 0)</div><div class='add'>+		dev_warn(chip-&gt;dev, "shutting down failed\n");</div><div class='add'>+</div><div class='add'>+	dsa_unregister_switch(chip-&gt;ds);</div><div class='add'>+</div><div class='add'>+	/* assert reset to the whole device to prevent it from doing anything */</div><div class='add'>+	gpiod_set_value_cansleep(chip-&gt;reset_gpio, 1);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(lan9303_remove);</div><div class='add'>+</div><div class='add'>+void lan9303_shutdown(struct lan9303 *chip)</div><div class='add'>+{</div><div class='add'>+	dsa_switch_shutdown(chip-&gt;ds);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(lan9303_shutdown);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Juergen Borleis &lt;kernel@pengutronix.de&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Core driver for SMSC/Microchip LAN9303 three port ethernet switch");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/net/dsa/lan9303.h b/drivers/net/dsa/lan9303.h<br/>new file mode 100644<br/>index 000000000000..c7f73efa50f0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/lan9303.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/lan9303.h</a></div><div class='hunk'>@@ -0,0 +1,13 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/dsa/lan9303.h&gt;</div><div class='add'>+</div><div class='add'>+extern const struct regmap_access_table lan9303_register_set;</div><div class='add'>+extern const struct lan9303_phy_ops lan9303_indirect_phy_ops;</div><div class='add'>+</div><div class='add'>+int lan9303_probe(struct lan9303 *chip, struct device_node *np);</div><div class='add'>+int lan9303_remove(struct lan9303 *chip);</div><div class='add'>+void lan9303_shutdown(struct lan9303 *chip);</div><div class='head'>diff --git a/drivers/net/dsa/lan9303_i2c.c b/drivers/net/dsa/lan9303_i2c.c<br/>new file mode 100644<br/>index 000000000000..c62d27cdc117<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/lan9303_i2c.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/lan9303_i2c.c</a></div><div class='hunk'>@@ -0,0 +1,117 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2017 Pengutronix, Juergen Borleis &lt;kernel@pengutronix.de&gt;</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/i2c.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+</div><div class='add'>+#include "lan9303.h"</div><div class='add'>+</div><div class='add'>+struct lan9303_i2c {</div><div class='add'>+	struct i2c_client *device;</div><div class='add'>+	struct lan9303 chip;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_config lan9303_i2c_regmap_config = {</div><div class='add'>+	.reg_bits = 8,</div><div class='add'>+	.val_bits = 32,</div><div class='add'>+	.reg_stride = 1,</div><div class='add'>+	.can_multi_write = true,</div><div class='add'>+	.max_register = 0x0ff, /* address bits 0..1 are not used */</div><div class='add'>+	.reg_format_endian = REGMAP_ENDIAN_LITTLE,</div><div class='add'>+</div><div class='add'>+	.volatile_table = &amp;lan9303_register_set,</div><div class='add'>+	.wr_table = &amp;lan9303_register_set,</div><div class='add'>+	.rd_table = &amp;lan9303_register_set,</div><div class='add'>+</div><div class='add'>+	.cache_type = REGCACHE_NONE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int lan9303_i2c_probe(struct i2c_client *client)</div><div class='add'>+{</div><div class='add'>+	struct lan9303_i2c *sw_dev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	sw_dev = devm_kzalloc(&amp;client-&gt;dev, sizeof(struct lan9303_i2c),</div><div class='add'>+			      GFP_KERNEL);</div><div class='add'>+	if (!sw_dev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	sw_dev-&gt;chip.regmap = devm_regmap_init_i2c(client,</div><div class='add'>+						   &amp;lan9303_i2c_regmap_config);</div><div class='add'>+	if (IS_ERR(sw_dev-&gt;chip.regmap)) {</div><div class='add'>+		ret = PTR_ERR(sw_dev-&gt;chip.regmap);</div><div class='add'>+		dev_err(&amp;client-&gt;dev, "Failed to allocate register map: %d\n",</div><div class='add'>+			ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* link forward and backward */</div><div class='add'>+	sw_dev-&gt;device = client;</div><div class='add'>+	i2c_set_clientdata(client, sw_dev);</div><div class='add'>+	sw_dev-&gt;chip.dev = &amp;client-&gt;dev;</div><div class='add'>+</div><div class='add'>+	sw_dev-&gt;chip.ops = &amp;lan9303_indirect_phy_ops;</div><div class='add'>+</div><div class='add'>+	ret = lan9303_probe(&amp;sw_dev-&gt;chip, client-&gt;dev.of_node);</div><div class='add'>+	if (ret != 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	dev_info(&amp;client-&gt;dev, "LAN9303 I2C driver loaded successfully\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lan9303_i2c_remove(struct i2c_client *client)</div><div class='add'>+{</div><div class='add'>+	struct lan9303_i2c *sw_dev = i2c_get_clientdata(client);</div><div class='add'>+</div><div class='add'>+	if (!sw_dev)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	lan9303_remove(&amp;sw_dev-&gt;chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lan9303_i2c_shutdown(struct i2c_client *client)</div><div class='add'>+{</div><div class='add'>+	struct lan9303_i2c *sw_dev = i2c_get_clientdata(client);</div><div class='add'>+</div><div class='add'>+	if (!sw_dev)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	lan9303_shutdown(&amp;sw_dev-&gt;chip);</div><div class='add'>+</div><div class='add'>+	i2c_set_clientdata(client, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*-------------------------------------------------------------------------*/</div><div class='add'>+</div><div class='add'>+static const struct i2c_device_id lan9303_i2c_id[] = {</div><div class='add'>+	{ "lan9303" },</div><div class='add'>+	{ /* sentinel */ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(i2c, lan9303_i2c_id);</div><div class='add'>+</div><div class='add'>+static const struct of_device_id lan9303_i2c_of_match[] = {</div><div class='add'>+	{ .compatible = "smsc,lan9303-i2c", },</div><div class='add'>+	{ /* sentinel */ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, lan9303_i2c_of_match);</div><div class='add'>+</div><div class='add'>+static struct i2c_driver lan9303_i2c_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "LAN9303_I2C",</div><div class='add'>+		.of_match_table = lan9303_i2c_of_match,</div><div class='add'>+	},</div><div class='add'>+	.probe = lan9303_i2c_probe,</div><div class='add'>+	.remove = lan9303_i2c_remove,</div><div class='add'>+	.shutdown = lan9303_i2c_shutdown,</div><div class='add'>+	.id_table = lan9303_i2c_id,</div><div class='add'>+};</div><div class='add'>+module_i2c_driver(lan9303_i2c_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Juergen Borleis &lt;kernel@pengutronix.de&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Driver for SMSC/Microchip LAN9303 three port ethernet switch in I2C managed mode");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/net/dsa/lan9303_mdio.c b/drivers/net/dsa/lan9303_mdio.c<br/>new file mode 100644<br/>index 000000000000..0ac4857e5ee8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/lan9303_mdio.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/lan9303_mdio.c</a></div><div class='hunk'>@@ -0,0 +1,177 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2017 Pengutronix, Juergen Borleis &lt;kernel@pengutronix.de&gt;</div><div class='add'>+ *</div><div class='add'>+ * Partially based on a patch from</div><div class='add'>+ * Copyright (c) 2014 Stefan Roese &lt;sr@denx.de&gt;</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/mdio.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+</div><div class='add'>+#include "lan9303.h"</div><div class='add'>+</div><div class='add'>+/* Generate phy-addr and -reg from the input address */</div><div class='add'>+#define PHY_ADDR(x) ((((x) &gt;&gt; 6) + 0x10) &amp; 0x1f)</div><div class='add'>+#define PHY_REG(x) (((x) &gt;&gt; 1) &amp; 0x1f)</div><div class='add'>+</div><div class='add'>+struct lan9303_mdio {</div><div class='add'>+	struct mdio_device *device;</div><div class='add'>+	struct lan9303 chip;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void lan9303_mdio_real_write(struct mdio_device *mdio, int reg, u16 val)</div><div class='add'>+{</div><div class='add'>+	mdio-&gt;bus-&gt;write(mdio-&gt;bus, PHY_ADDR(reg), PHY_REG(reg), val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan9303_mdio_write(void *ctx, uint32_t reg, uint32_t val)</div><div class='add'>+{</div><div class='add'>+	struct lan9303_mdio *sw_dev = (struct lan9303_mdio *)ctx;</div><div class='add'>+</div><div class='add'>+	reg &lt;&lt;= 2; /* reg num to offset */</div><div class='add'>+	mutex_lock_nested(&amp;sw_dev-&gt;device-&gt;bus-&gt;mdio_lock, MDIO_MUTEX_NESTED);</div><div class='add'>+	lan9303_mdio_real_write(sw_dev-&gt;device, reg, val &amp; 0xffff);</div><div class='add'>+	lan9303_mdio_real_write(sw_dev-&gt;device, reg + 2, (val &gt;&gt; 16) &amp; 0xffff);</div><div class='add'>+	mutex_unlock(&amp;sw_dev-&gt;device-&gt;bus-&gt;mdio_lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 lan9303_mdio_real_read(struct mdio_device *mdio, int reg)</div><div class='add'>+{</div><div class='add'>+	return mdio-&gt;bus-&gt;read(mdio-&gt;bus, PHY_ADDR(reg), PHY_REG(reg));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan9303_mdio_read(void *ctx, uint32_t reg, uint32_t *val)</div><div class='add'>+{</div><div class='add'>+	struct lan9303_mdio *sw_dev = (struct lan9303_mdio *)ctx;</div><div class='add'>+</div><div class='add'>+	reg &lt;&lt;= 2; /* reg num to offset */</div><div class='add'>+	mutex_lock_nested(&amp;sw_dev-&gt;device-&gt;bus-&gt;mdio_lock, MDIO_MUTEX_NESTED);</div><div class='add'>+	*val = lan9303_mdio_real_read(sw_dev-&gt;device, reg);</div><div class='add'>+	*val |= (lan9303_mdio_real_read(sw_dev-&gt;device, reg + 2) &lt;&lt; 16);</div><div class='add'>+	mutex_unlock(&amp;sw_dev-&gt;device-&gt;bus-&gt;mdio_lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan9303_mdio_phy_write(struct lan9303 *chip, int addr, int reg,</div><div class='add'>+				  u16 val)</div><div class='add'>+{</div><div class='add'>+	struct lan9303_mdio *sw_dev = dev_get_drvdata(chip-&gt;dev);</div><div class='add'>+</div><div class='add'>+	return mdiobus_write_nested(sw_dev-&gt;device-&gt;bus, addr, reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan9303_mdio_phy_read(struct lan9303 *chip, int addr, int reg)</div><div class='add'>+{</div><div class='add'>+	struct lan9303_mdio *sw_dev = dev_get_drvdata(chip-&gt;dev);</div><div class='add'>+</div><div class='add'>+	return mdiobus_read_nested(sw_dev-&gt;device-&gt;bus, addr, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct lan9303_phy_ops lan9303_mdio_phy_ops = {</div><div class='add'>+	.phy_read = lan9303_mdio_phy_read,</div><div class='add'>+	.phy_write = lan9303_mdio_phy_write,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_config lan9303_mdio_regmap_config = {</div><div class='add'>+	.reg_bits = 8,</div><div class='add'>+	.val_bits = 32,</div><div class='add'>+	.reg_stride = 1,</div><div class='add'>+	.can_multi_write = true,</div><div class='add'>+	.max_register = 0x0ff, /* address bits 0..1 are not used */</div><div class='add'>+	.reg_format_endian = REGMAP_ENDIAN_LITTLE,</div><div class='add'>+</div><div class='add'>+	.volatile_table = &amp;lan9303_register_set,</div><div class='add'>+	.wr_table = &amp;lan9303_register_set,</div><div class='add'>+	.rd_table = &amp;lan9303_register_set,</div><div class='add'>+</div><div class='add'>+	.reg_read = lan9303_mdio_read,</div><div class='add'>+	.reg_write = lan9303_mdio_write,</div><div class='add'>+</div><div class='add'>+	.cache_type = REGCACHE_NONE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int lan9303_mdio_probe(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct lan9303_mdio *sw_dev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	sw_dev = devm_kzalloc(&amp;mdiodev-&gt;dev, sizeof(struct lan9303_mdio),</div><div class='add'>+			      GFP_KERNEL);</div><div class='add'>+	if (!sw_dev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	sw_dev-&gt;chip.regmap = devm_regmap_init(&amp;mdiodev-&gt;dev, NULL, sw_dev,</div><div class='add'>+					       &amp;lan9303_mdio_regmap_config);</div><div class='add'>+	if (IS_ERR(sw_dev-&gt;chip.regmap)) {</div><div class='add'>+		ret = PTR_ERR(sw_dev-&gt;chip.regmap);</div><div class='add'>+		dev_err(&amp;mdiodev-&gt;dev, "regmap init failed: %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* link forward and backward */</div><div class='add'>+	sw_dev-&gt;device = mdiodev;</div><div class='add'>+	dev_set_drvdata(&amp;mdiodev-&gt;dev, sw_dev);</div><div class='add'>+	sw_dev-&gt;chip.dev = &amp;mdiodev-&gt;dev;</div><div class='add'>+</div><div class='add'>+	sw_dev-&gt;chip.ops = &amp;lan9303_mdio_phy_ops;</div><div class='add'>+</div><div class='add'>+	ret = lan9303_probe(&amp;sw_dev-&gt;chip, mdiodev-&gt;dev.of_node);</div><div class='add'>+	if (ret != 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	dev_info(&amp;mdiodev-&gt;dev, "LAN9303 MDIO driver loaded successfully\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lan9303_mdio_remove(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct lan9303_mdio *sw_dev = dev_get_drvdata(&amp;mdiodev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	if (!sw_dev)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	lan9303_remove(&amp;sw_dev-&gt;chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lan9303_mdio_shutdown(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct lan9303_mdio *sw_dev = dev_get_drvdata(&amp;mdiodev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	if (!sw_dev)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	lan9303_shutdown(&amp;sw_dev-&gt;chip);</div><div class='add'>+</div><div class='add'>+	dev_set_drvdata(&amp;mdiodev-&gt;dev, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*-------------------------------------------------------------------------*/</div><div class='add'>+</div><div class='add'>+static const struct of_device_id lan9303_mdio_of_match[] = {</div><div class='add'>+	{ .compatible = "smsc,lan9303-mdio" },</div><div class='add'>+	{ .compatible = "microchip,lan9354-mdio" },</div><div class='add'>+	{ /* sentinel */ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, lan9303_mdio_of_match);</div><div class='add'>+</div><div class='add'>+static struct mdio_driver lan9303_mdio_driver = {</div><div class='add'>+	.mdiodrv.driver = {</div><div class='add'>+		.name = "LAN9303_MDIO",</div><div class='add'>+		.of_match_table = lan9303_mdio_of_match,</div><div class='add'>+	},</div><div class='add'>+	.probe  = lan9303_mdio_probe,</div><div class='add'>+	.remove = lan9303_mdio_remove,</div><div class='add'>+	.shutdown = lan9303_mdio_shutdown,</div><div class='add'>+};</div><div class='add'>+mdio_module_driver(lan9303_mdio_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Stefan Roese &lt;sr@denx.de&gt;, Juergen Borleis &lt;kernel@pengutronix.de&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Driver for SMSC/Microchip LAN9303 three port ethernet switch in MDIO managed mode");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/net/dsa/lantiq/Kconfig b/drivers/net/dsa/lantiq/Kconfig<br/>new file mode 100644<br/>index 000000000000..4a9771be5d58<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/lantiq/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/lantiq/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,24 @@</div><div class='add'>+config NET_DSA_LANTIQ_COMMON</div><div class='add'>+	tristate</div><div class='add'>+	select REGMAP</div><div class='add'>+</div><div class='add'>+config NET_DSA_LANTIQ_GSWIP</div><div class='add'>+	tristate "Lantiq / Intel GSWIP"</div><div class='add'>+	depends on HAS_IOMEM</div><div class='add'>+	select NET_DSA_TAG_GSWIP</div><div class='add'>+	select NET_DSA_LANTIQ_COMMON</div><div class='add'>+	help</div><div class='add'>+	  This enables support for the Lantiq / Intel GSWIP 2.1 found in</div><div class='add'>+	  the xrx200 / VR9 SoC.</div><div class='add'>+</div><div class='add'>+config NET_DSA_MXL_GSW1XX</div><div class='add'>+	tristate "MaxLinear GSW1xx Ethernet switch support"</div><div class='add'>+	select NET_DSA_TAG_MXL_GSW1XX</div><div class='add'>+	select NET_DSA_LANTIQ_COMMON</div><div class='add'>+	help</div><div class='add'>+	  This enables support for the MaxLinear GSW1xx family of 1GE switches</div><div class='add'>+	    GSW120 4 port, 2 PHYs, RGMII &amp; SGMII/2500Base-X</div><div class='add'>+	    GSW125 4 port, 2 PHYs, RGMII &amp; SGMII/2500Base-X, industrial temperature</div><div class='add'>+	    GSW140 6 port, 4 PHYs, RGMII &amp; SGMII/2500Base-X</div><div class='add'>+	    GSW141 6 port, 4 PHYs, RGMII &amp; SGMII</div><div class='add'>+	    GSW145 6 port, 4 PHYs, RGMII &amp; SGMII/2500Base-X, industrial temperature</div><div class='head'>diff --git a/drivers/net/dsa/lantiq/Makefile b/drivers/net/dsa/lantiq/Makefile<br/>new file mode 100644<br/>index 000000000000..85fce605310b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/lantiq/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/lantiq/Makefile</a></div><div class='hunk'>@@ -0,0 +1,3 @@</div><div class='add'>+obj-$(CONFIG_NET_DSA_LANTIQ_GSWIP) += lantiq_gswip.o</div><div class='add'>+obj-$(CONFIG_NET_DSA_LANTIQ_COMMON) += lantiq_gswip_common.o</div><div class='add'>+obj-$(CONFIG_NET_DSA_MXL_GSW1XX) += mxl-gsw1xx.o</div><div class='head'>diff --git a/drivers/net/dsa/lantiq/lantiq_gswip.c b/drivers/net/dsa/lantiq/lantiq_gswip.c<br/>new file mode 100644<br/>index 000000000000..57dd063c0740<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/lantiq/lantiq_gswip.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/lantiq/lantiq_gswip.c</a></div><div class='hunk'>@@ -0,0 +1,518 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Lantiq / Intel GSWIP switch driver for VRX200, xRX300 and xRX330 SoCs</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Daniel Golle &lt;daniel@makrotopia.org&gt;</div><div class='add'>+ * Copyright (C) 2017 - 2019 Hauke Mehrtens &lt;hauke@hauke-m.de&gt;</div><div class='add'>+ * Copyright (C) 2012 John Crispin &lt;john@phrozen.org&gt;</div><div class='add'>+ * Copyright (C) 2010 Lantiq Deutschland</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "lantiq_gswip.h"</div><div class='add'>+#include "lantiq_pce.h"</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/firmware.h&gt;</div><div class='add'>+#include &lt;linux/mfd/syscon.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;linux/reset.h&gt;</div><div class='add'>+#include &lt;dt-bindings/mips/lantiq_rcu_gphy.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+</div><div class='add'>+struct xway_gphy_match_data {</div><div class='add'>+	char *fe_firmware_name;</div><div class='add'>+	char *ge_firmware_name;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void gswip_xrx200_phylink_get_caps(struct dsa_switch *ds, int port,</div><div class='add'>+					  struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	switch (port) {</div><div class='add'>+	case 0:</div><div class='add'>+	case 1:</div><div class='add'>+		phy_interface_set_rgmii(config-&gt;supported_interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_MII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_REVMII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_RMII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case 2:</div><div class='add'>+	case 3:</div><div class='add'>+	case 4:</div><div class='add'>+	case 6:</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_INTERNAL,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case 5:</div><div class='add'>+		phy_interface_set_rgmii(config-&gt;supported_interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_INTERNAL,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	config-&gt;mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |</div><div class='add'>+		MAC_10 | MAC_100 | MAC_1000;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_xrx300_phylink_get_caps(struct dsa_switch *ds, int port,</div><div class='add'>+					  struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	switch (port) {</div><div class='add'>+	case 0:</div><div class='add'>+		phy_interface_set_rgmii(config-&gt;supported_interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_GMII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_RMII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case 1:</div><div class='add'>+	case 2:</div><div class='add'>+	case 3:</div><div class='add'>+	case 4:</div><div class='add'>+	case 6:</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_INTERNAL,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case 5:</div><div class='add'>+		phy_interface_set_rgmii(config-&gt;supported_interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_INTERNAL,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_RMII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	config-&gt;mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |</div><div class='add'>+		MAC_10 | MAC_100 | MAC_1000;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct xway_gphy_match_data xrx200a1x_gphy_data = {</div><div class='add'>+	.fe_firmware_name = "lantiq/xrx200_phy22f_a14.bin",</div><div class='add'>+	.ge_firmware_name = "lantiq/xrx200_phy11g_a14.bin",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct xway_gphy_match_data xrx200a2x_gphy_data = {</div><div class='add'>+	.fe_firmware_name = "lantiq/xrx200_phy22f_a22.bin",</div><div class='add'>+	.ge_firmware_name = "lantiq/xrx200_phy11g_a22.bin",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct xway_gphy_match_data xrx300_gphy_data = {</div><div class='add'>+	.fe_firmware_name = "lantiq/xrx300_phy22f_a21.bin",</div><div class='add'>+	.ge_firmware_name = "lantiq/xrx300_phy11g_a21.bin",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct of_device_id xway_gphy_match[] __maybe_unused = {</div><div class='add'>+	{ .compatible = "lantiq,xrx200-gphy-fw", .data = NULL },</div><div class='add'>+	{ .compatible = "lantiq,xrx200a1x-gphy-fw", .data = &amp;xrx200a1x_gphy_data },</div><div class='add'>+	{ .compatible = "lantiq,xrx200a2x-gphy-fw", .data = &amp;xrx200a2x_gphy_data },</div><div class='add'>+	{ .compatible = "lantiq,xrx300-gphy-fw", .data = &amp;xrx300_gphy_data },</div><div class='add'>+	{ .compatible = "lantiq,xrx330-gphy-fw", .data = &amp;xrx300_gphy_data },</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int gswip_gphy_fw_load(struct gswip_priv *priv, struct gswip_gphy_fw *gphy_fw)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = priv-&gt;dev;</div><div class='add'>+	const struct firmware *fw;</div><div class='add'>+	void *fw_addr;</div><div class='add'>+	dma_addr_t dma_addr;</div><div class='add'>+	dma_addr_t dev_addr;</div><div class='add'>+	size_t size;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = clk_prepare_enable(gphy_fw-&gt;clk_gate);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	reset_control_assert(gphy_fw-&gt;reset);</div><div class='add'>+</div><div class='add'>+	/* The vendor BSP uses a 200ms delay after asserting the reset line.</div><div class='add'>+	 * Without this some users are observing that the PHY is not coming up</div><div class='add'>+	 * on the MDIO bus.</div><div class='add'>+	 */</div><div class='add'>+	msleep(200);</div><div class='add'>+</div><div class='add'>+	ret = request_firmware(&amp;fw, gphy_fw-&gt;fw_name, dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return dev_err_probe(dev, ret, "failed to load firmware: %s\n",</div><div class='add'>+				     gphy_fw-&gt;fw_name);</div><div class='add'>+</div><div class='add'>+	/* GPHY cores need the firmware code in a persistent and contiguous</div><div class='add'>+	 * memory area with a 16 kB boundary aligned start address.</div><div class='add'>+	 */</div><div class='add'>+	size = fw-&gt;size + XRX200_GPHY_FW_ALIGN;</div><div class='add'>+</div><div class='add'>+	fw_addr = dmam_alloc_coherent(dev, size, &amp;dma_addr, GFP_KERNEL);</div><div class='add'>+	if (fw_addr) {</div><div class='add'>+		fw_addr = PTR_ALIGN(fw_addr, XRX200_GPHY_FW_ALIGN);</div><div class='add'>+		dev_addr = ALIGN(dma_addr, XRX200_GPHY_FW_ALIGN);</div><div class='add'>+		memcpy(fw_addr, fw-&gt;data, fw-&gt;size);</div><div class='add'>+	} else {</div><div class='add'>+		release_firmware(fw);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	release_firmware(fw);</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(priv-&gt;rcu_regmap, gphy_fw-&gt;fw_addr_offset, dev_addr);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	reset_control_deassert(gphy_fw-&gt;reset);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_gphy_fw_probe(struct gswip_priv *priv,</div><div class='add'>+			       struct gswip_gphy_fw *gphy_fw,</div><div class='add'>+			       struct device_node *gphy_fw_np, int i)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = priv-&gt;dev;</div><div class='add'>+	u32 gphy_mode;</div><div class='add'>+	int ret;</div><div class='add'>+	char gphyname[10];</div><div class='add'>+</div><div class='add'>+	snprintf(gphyname, sizeof(gphyname), "gphy%d", i);</div><div class='add'>+</div><div class='add'>+	gphy_fw-&gt;clk_gate = devm_clk_get(dev, gphyname);</div><div class='add'>+	if (IS_ERR(gphy_fw-&gt;clk_gate)) {</div><div class='add'>+		return dev_err_probe(dev, PTR_ERR(gphy_fw-&gt;clk_gate),</div><div class='add'>+				     "Failed to lookup gate clock\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = of_property_read_u32(gphy_fw_np, "reg", &amp;gphy_fw-&gt;fw_addr_offset);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = of_property_read_u32(gphy_fw_np, "lantiq,gphy-mode", &amp;gphy_mode);</div><div class='add'>+	/* Default to GE mode */</div><div class='add'>+	if (ret)</div><div class='add'>+		gphy_mode = GPHY_MODE_GE;</div><div class='add'>+</div><div class='add'>+	switch (gphy_mode) {</div><div class='add'>+	case GPHY_MODE_FE:</div><div class='add'>+		gphy_fw-&gt;fw_name = priv-&gt;gphy_fw_name_cfg-&gt;fe_firmware_name;</div><div class='add'>+		break;</div><div class='add'>+	case GPHY_MODE_GE:</div><div class='add'>+		gphy_fw-&gt;fw_name = priv-&gt;gphy_fw_name_cfg-&gt;ge_firmware_name;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return dev_err_probe(dev, -EINVAL, "Unknown GPHY mode %d\n",</div><div class='add'>+				     gphy_mode);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	gphy_fw-&gt;reset = of_reset_control_array_get_exclusive(gphy_fw_np);</div><div class='add'>+	if (IS_ERR(gphy_fw-&gt;reset))</div><div class='add'>+		return dev_err_probe(dev, PTR_ERR(gphy_fw-&gt;reset),</div><div class='add'>+				     "Failed to lookup gphy reset\n");</div><div class='add'>+</div><div class='add'>+	return gswip_gphy_fw_load(priv, gphy_fw);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_gphy_fw_remove(struct gswip_priv *priv,</div><div class='add'>+				 struct gswip_gphy_fw *gphy_fw)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* check if the device was fully probed */</div><div class='add'>+	if (!gphy_fw-&gt;fw_name)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(priv-&gt;rcu_regmap, gphy_fw-&gt;fw_addr_offset, 0);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(priv-&gt;dev, "can not reset GPHY FW pointer\n");</div><div class='add'>+</div><div class='add'>+	clk_disable_unprepare(gphy_fw-&gt;clk_gate);</div><div class='add'>+</div><div class='add'>+	reset_control_put(gphy_fw-&gt;reset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_gphy_fw_list(struct gswip_priv *priv,</div><div class='add'>+			      struct device_node *gphy_fw_list_np, u32 version)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = priv-&gt;dev;</div><div class='add'>+	struct device_node *gphy_fw_np;</div><div class='add'>+	const struct of_device_id *match;</div><div class='add'>+	int err;</div><div class='add'>+	int i = 0;</div><div class='add'>+</div><div class='add'>+	/* The VRX200 rev 1.1 uses the GSWIP 2.0 and needs the older</div><div class='add'>+	 * GPHY firmware. The VRX200 rev 1.2 uses the GSWIP 2.1 and also</div><div class='add'>+	 * needs a different GPHY firmware.</div><div class='add'>+	 */</div><div class='add'>+	if (of_device_is_compatible(gphy_fw_list_np, "lantiq,xrx200-gphy-fw")) {</div><div class='add'>+		switch (version) {</div><div class='add'>+		case GSWIP_VERSION_2_0:</div><div class='add'>+			priv-&gt;gphy_fw_name_cfg = &amp;xrx200a1x_gphy_data;</div><div class='add'>+			break;</div><div class='add'>+		case GSWIP_VERSION_2_1:</div><div class='add'>+			priv-&gt;gphy_fw_name_cfg = &amp;xrx200a2x_gphy_data;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			return dev_err_probe(dev, -ENOENT,</div><div class='add'>+					     "unknown GSWIP version: 0x%x\n",</div><div class='add'>+					     version);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	match = of_match_node(xway_gphy_match, gphy_fw_list_np);</div><div class='add'>+	if (match &amp;&amp; match-&gt;data)</div><div class='add'>+		priv-&gt;gphy_fw_name_cfg = match-&gt;data;</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;gphy_fw_name_cfg)</div><div class='add'>+		return dev_err_probe(dev, -ENOENT,</div><div class='add'>+				     "GPHY compatible type not supported\n");</div><div class='add'>+</div><div class='add'>+	priv-&gt;num_gphy_fw = of_get_available_child_count(gphy_fw_list_np);</div><div class='add'>+	if (!priv-&gt;num_gphy_fw)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	priv-&gt;rcu_regmap = syscon_regmap_lookup_by_phandle(gphy_fw_list_np,</div><div class='add'>+							   "lantiq,rcu");</div><div class='add'>+	if (IS_ERR(priv-&gt;rcu_regmap))</div><div class='add'>+		return PTR_ERR(priv-&gt;rcu_regmap);</div><div class='add'>+</div><div class='add'>+	priv-&gt;gphy_fw = devm_kmalloc_array(dev, priv-&gt;num_gphy_fw,</div><div class='add'>+					   sizeof(*priv-&gt;gphy_fw),</div><div class='add'>+					   GFP_KERNEL | __GFP_ZERO);</div><div class='add'>+	if (!priv-&gt;gphy_fw)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for_each_available_child_of_node(gphy_fw_list_np, gphy_fw_np) {</div><div class='add'>+		err = gswip_gphy_fw_probe(priv, &amp;priv-&gt;gphy_fw[i],</div><div class='add'>+					  gphy_fw_np, i);</div><div class='add'>+		if (err) {</div><div class='add'>+			of_node_put(gphy_fw_np);</div><div class='add'>+			goto remove_gphy;</div><div class='add'>+		}</div><div class='add'>+		i++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* The standalone PHY11G requires 300ms to be fully</div><div class='add'>+	 * initialized and ready for any MDIO communication after being</div><div class='add'>+	 * taken out of reset. For the SoC-internal GPHY variant there</div><div class='add'>+	 * is no (known) documentation for the minimum time after a</div><div class='add'>+	 * reset. Use the same value as for the standalone variant as</div><div class='add'>+	 * some users have reported internal PHYs not being detected</div><div class='add'>+	 * without any delay.</div><div class='add'>+	 */</div><div class='add'>+	msleep(300);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+remove_gphy:</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;num_gphy_fw; i++)</div><div class='add'>+		gswip_gphy_fw_remove(priv, &amp;priv-&gt;gphy_fw[i]);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct regmap_config sw_regmap_config = {</div><div class='add'>+	.name = "switch",</div><div class='add'>+	.reg_bits = 32,</div><div class='add'>+	.val_bits = 32,</div><div class='add'>+	.reg_shift = REGMAP_UPSHIFT(2),</div><div class='add'>+	.val_format_endian = REGMAP_ENDIAN_NATIVE,</div><div class='add'>+	.max_register = GSWIP_SDMA_PCTRLp(6),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_config mdio_regmap_config = {</div><div class='add'>+	.name = "mdio",</div><div class='add'>+	.reg_bits = 32,</div><div class='add'>+	.val_bits = 32,</div><div class='add'>+	.reg_shift = REGMAP_UPSHIFT(2),</div><div class='add'>+	.val_format_endian = REGMAP_ENDIAN_NATIVE,</div><div class='add'>+	.max_register = GSWIP_MDIO_PHYp(0),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_config mii_regmap_config = {</div><div class='add'>+	.name = "mii",</div><div class='add'>+	.reg_bits = 32,</div><div class='add'>+	.val_bits = 32,</div><div class='add'>+	.reg_shift = REGMAP_UPSHIFT(2),</div><div class='add'>+	.val_format_endian = REGMAP_ENDIAN_NATIVE,</div><div class='add'>+	.max_register = GSWIP_MII_CFGp(6),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int gswip_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct device_node *np, *gphy_fw_np;</div><div class='add'>+	__iomem void *gswip, *mdio, *mii;</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct gswip_priv *priv;</div><div class='add'>+	int err;</div><div class='add'>+	int i;</div><div class='add'>+	u32 version;</div><div class='add'>+</div><div class='add'>+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	gswip = devm_platform_ioremap_resource(pdev, 0);</div><div class='add'>+	if (IS_ERR(gswip))</div><div class='add'>+		return PTR_ERR(gswip);</div><div class='add'>+</div><div class='add'>+	mdio = devm_platform_ioremap_resource(pdev, 1);</div><div class='add'>+	if (IS_ERR(mdio))</div><div class='add'>+		return PTR_ERR(mdio);</div><div class='add'>+</div><div class='add'>+	mii = devm_platform_ioremap_resource(pdev, 2);</div><div class='add'>+	if (IS_ERR(mii))</div><div class='add'>+		return PTR_ERR(mii);</div><div class='add'>+</div><div class='add'>+	priv-&gt;gswip = devm_regmap_init_mmio(dev, gswip, &amp;sw_regmap_config);</div><div class='add'>+	if (IS_ERR(priv-&gt;gswip))</div><div class='add'>+		return PTR_ERR(priv-&gt;gswip);</div><div class='add'>+</div><div class='add'>+	priv-&gt;mdio = devm_regmap_init_mmio(dev, mdio, &amp;mdio_regmap_config);</div><div class='add'>+	if (IS_ERR(priv-&gt;mdio))</div><div class='add'>+		return PTR_ERR(priv-&gt;mdio);</div><div class='add'>+</div><div class='add'>+	priv-&gt;mii = devm_regmap_init_mmio(dev, mii, &amp;mii_regmap_config);</div><div class='add'>+	if (IS_ERR(priv-&gt;mii))</div><div class='add'>+		return PTR_ERR(priv-&gt;mii);</div><div class='add'>+</div><div class='add'>+	priv-&gt;hw_info = of_device_get_match_data(dev);</div><div class='add'>+	if (!priv-&gt;hw_info)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	priv-&gt;ds = devm_kzalloc(dev, sizeof(*priv-&gt;ds), GFP_KERNEL);</div><div class='add'>+	if (!priv-&gt;ds)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv-&gt;dev = dev;</div><div class='add'>+</div><div class='add'>+	regmap_read(priv-&gt;gswip, GSWIP_VERSION, &amp;version);</div><div class='add'>+</div><div class='add'>+	np = dev-&gt;of_node;</div><div class='add'>+	switch (version) {</div><div class='add'>+	case GSWIP_VERSION_2_0:</div><div class='add'>+	case GSWIP_VERSION_2_1:</div><div class='add'>+		if (!of_device_is_compatible(np, "lantiq,xrx200-gswip"))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	case GSWIP_VERSION_2_2:</div><div class='add'>+	case GSWIP_VERSION_2_2_ETC:</div><div class='add'>+		if (!of_device_is_compatible(np, "lantiq,xrx300-gswip") &amp;&amp;</div><div class='add'>+		    !of_device_is_compatible(np, "lantiq,xrx330-gswip"))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return dev_err_probe(dev, -ENOENT,</div><div class='add'>+				     "unknown GSWIP version: 0x%x\n", version);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* bring up the mdio bus */</div><div class='add'>+	gphy_fw_np = of_get_compatible_child(dev-&gt;of_node, "lantiq,gphy-fw");</div><div class='add'>+	if (gphy_fw_np) {</div><div class='add'>+		err = gswip_gphy_fw_list(priv, gphy_fw_np, version);</div><div class='add'>+		of_node_put(gphy_fw_np);</div><div class='add'>+		if (err)</div><div class='add'>+			return dev_err_probe(dev, err,</div><div class='add'>+					     "gphy fw probe failed\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = gswip_probe_common(priv, version);</div><div class='add'>+	if (err)</div><div class='add'>+		goto gphy_fw_remove;</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, priv);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+gphy_fw_remove:</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;num_gphy_fw; i++)</div><div class='add'>+		gswip_gphy_fw_remove(priv, &amp;priv-&gt;gphy_fw[i]);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = platform_get_drvdata(pdev);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* disable the switch */</div><div class='add'>+	gswip_disable_switch(priv);</div><div class='add'>+</div><div class='add'>+	dsa_unregister_switch(priv-&gt;ds);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;num_gphy_fw; i++)</div><div class='add'>+		gswip_gphy_fw_remove(priv, &amp;priv-&gt;gphy_fw[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_shutdown(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dsa_switch_shutdown(priv-&gt;ds);</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct gswip_hw_info gswip_xrx200 = {</div><div class='add'>+	.max_ports = 7,</div><div class='add'>+	.allowed_cpu_ports = BIT(6),</div><div class='add'>+	.mii_ports = BIT(0) | BIT(1) | BIT(5),</div><div class='add'>+	.mii_port_reg_offset = 0,</div><div class='add'>+	.phylink_get_caps = gswip_xrx200_phylink_get_caps,</div><div class='add'>+	.pce_microcode = &amp;gswip_pce_microcode,</div><div class='add'>+	.pce_microcode_size = ARRAY_SIZE(gswip_pce_microcode),</div><div class='add'>+	.tag_protocol = DSA_TAG_PROTO_GSWIP,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct gswip_hw_info gswip_xrx300 = {</div><div class='add'>+	.max_ports = 7,</div><div class='add'>+	.allowed_cpu_ports = BIT(6),</div><div class='add'>+	.mii_ports = BIT(0) | BIT(5),</div><div class='add'>+	.mii_port_reg_offset = 0,</div><div class='add'>+	.phylink_get_caps = gswip_xrx300_phylink_get_caps,</div><div class='add'>+	.pce_microcode = &amp;gswip_pce_microcode,</div><div class='add'>+	.pce_microcode_size = ARRAY_SIZE(gswip_pce_microcode),</div><div class='add'>+	.tag_protocol = DSA_TAG_PROTO_GSWIP,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct of_device_id gswip_of_match[] = {</div><div class='add'>+	{ .compatible = "lantiq,xrx200-gswip", .data = &amp;gswip_xrx200 },</div><div class='add'>+	{ .compatible = "lantiq,xrx300-gswip", .data = &amp;gswip_xrx300 },</div><div class='add'>+	{ .compatible = "lantiq,xrx330-gswip", .data = &amp;gswip_xrx300 },</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, gswip_of_match);</div><div class='add'>+</div><div class='add'>+static struct platform_driver gswip_driver = {</div><div class='add'>+	.probe = gswip_probe,</div><div class='add'>+	.remove = gswip_remove,</div><div class='add'>+	.shutdown = gswip_shutdown,</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "gswip",</div><div class='add'>+		.of_match_table = gswip_of_match,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_platform_driver(gswip_driver);</div><div class='add'>+</div><div class='add'>+MODULE_FIRMWARE("lantiq/xrx300_phy11g_a21.bin");</div><div class='add'>+MODULE_FIRMWARE("lantiq/xrx300_phy22f_a21.bin");</div><div class='add'>+MODULE_FIRMWARE("lantiq/xrx200_phy11g_a14.bin");</div><div class='add'>+MODULE_FIRMWARE("lantiq/xrx200_phy11g_a22.bin");</div><div class='add'>+MODULE_FIRMWARE("lantiq/xrx200_phy22f_a14.bin");</div><div class='add'>+MODULE_FIRMWARE("lantiq/xrx200_phy22f_a22.bin");</div><div class='add'>+MODULE_AUTHOR("Hauke Mehrtens &lt;hauke@hauke-m.de&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Lantiq / Intel GSWIP driver");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/net/dsa/lantiq/lantiq_gswip.h b/drivers/net/dsa/lantiq/lantiq_gswip.h<br/>new file mode 100644<br/>index 000000000000..9c38e51a75e8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/lantiq/lantiq_gswip.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/lantiq/lantiq_gswip.h</a></div><div class='hunk'>@@ -0,0 +1,301 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#ifndef __LANTIQ_GSWIP_H</div><div class='add'>+#define __LANTIQ_GSWIP_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/mutex.h&gt;</div><div class='add'>+#include &lt;linux/phylink.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;linux/reset.h&gt;</div><div class='add'>+#include &lt;linux/swab.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+</div><div class='add'>+/* GSWIP MDIO Registers */</div><div class='add'>+#define GSWIP_MDIO_GLOB			0x00</div><div class='add'>+#define  GSWIP_MDIO_GLOB_ENABLE		BIT(15)</div><div class='add'>+#define GSWIP_MDIO_CTRL			0x08</div><div class='add'>+#define  GSWIP_MDIO_CTRL_BUSY		BIT(12)</div><div class='add'>+#define  GSWIP_MDIO_CTRL_RD		BIT(11)</div><div class='add'>+#define  GSWIP_MDIO_CTRL_WR		BIT(10)</div><div class='add'>+#define  GSWIP_MDIO_CTRL_PHYAD_MASK	0x1f</div><div class='add'>+#define  GSWIP_MDIO_CTRL_PHYAD_SHIFT	5</div><div class='add'>+#define  GSWIP_MDIO_CTRL_REGAD_MASK	0x1f</div><div class='add'>+#define GSWIP_MDIO_READ			0x09</div><div class='add'>+#define GSWIP_MDIO_WRITE		0x0A</div><div class='add'>+#define GSWIP_MDIO_MDC_CFG0		0x0B</div><div class='add'>+#define GSWIP_MDIO_MDC_CFG1		0x0C</div><div class='add'>+#define GSWIP_MDIO_PHYp(p)		(0x15 - (p))</div><div class='add'>+#define  GSWIP_MDIO_PHY_LINK_MASK	0x6000</div><div class='add'>+#define  GSWIP_MDIO_PHY_LINK_AUTO	0x0000</div><div class='add'>+#define  GSWIP_MDIO_PHY_LINK_DOWN	0x4000</div><div class='add'>+#define  GSWIP_MDIO_PHY_LINK_UP		0x2000</div><div class='add'>+#define  GSWIP_MDIO_PHY_SPEED_MASK	0x1800</div><div class='add'>+#define  GSWIP_MDIO_PHY_SPEED_AUTO	0x1800</div><div class='add'>+#define  GSWIP_MDIO_PHY_SPEED_M10	0x0000</div><div class='add'>+#define  GSWIP_MDIO_PHY_SPEED_M100	0x0800</div><div class='add'>+#define  GSWIP_MDIO_PHY_SPEED_G1	0x1000</div><div class='add'>+#define  GSWIP_MDIO_PHY_FDUP_MASK	0x0600</div><div class='add'>+#define  GSWIP_MDIO_PHY_FDUP_AUTO	0x0000</div><div class='add'>+#define  GSWIP_MDIO_PHY_FDUP_EN		0x0200</div><div class='add'>+#define  GSWIP_MDIO_PHY_FDUP_DIS	0x0600</div><div class='add'>+#define  GSWIP_MDIO_PHY_FCONTX_MASK	0x0180</div><div class='add'>+#define  GSWIP_MDIO_PHY_FCONTX_AUTO	0x0000</div><div class='add'>+#define  GSWIP_MDIO_PHY_FCONTX_EN	0x0100</div><div class='add'>+#define  GSWIP_MDIO_PHY_FCONTX_DIS	0x0180</div><div class='add'>+#define  GSWIP_MDIO_PHY_FCONRX_MASK	0x0060</div><div class='add'>+#define  GSWIP_MDIO_PHY_FCONRX_AUTO	0x0000</div><div class='add'>+#define  GSWIP_MDIO_PHY_FCONRX_EN	0x0020</div><div class='add'>+#define  GSWIP_MDIO_PHY_FCONRX_DIS	0x0060</div><div class='add'>+#define  GSWIP_MDIO_PHY_ADDR_MASK	0x001f</div><div class='add'>+#define  GSWIP_MDIO_PHY_MASK		(GSWIP_MDIO_PHY_ADDR_MASK | \</div><div class='add'>+					 GSWIP_MDIO_PHY_FCONRX_MASK | \</div><div class='add'>+					 GSWIP_MDIO_PHY_FCONTX_MASK | \</div><div class='add'>+					 GSWIP_MDIO_PHY_LINK_MASK | \</div><div class='add'>+					 GSWIP_MDIO_PHY_SPEED_MASK | \</div><div class='add'>+					 GSWIP_MDIO_PHY_FDUP_MASK)</div><div class='add'>+</div><div class='add'>+/* GSWIP MII Registers */</div><div class='add'>+#define GSWIP_MII_CFGp(p)		(0x2 * (p))</div><div class='add'>+#define  GSWIP_MII_CFG_RESET		BIT(15)</div><div class='add'>+#define  GSWIP_MII_CFG_EN		BIT(14)</div><div class='add'>+#define  GSWIP_MII_CFG_ISOLATE		BIT(13)</div><div class='add'>+#define  GSWIP_MII_CFG_LDCLKDIS		BIT(12)</div><div class='add'>+#define  GSWIP_MII_CFG_RGMII_IBS	BIT(8)</div><div class='add'>+#define  GSWIP_MII_CFG_RMII_CLK		BIT(7)</div><div class='add'>+#define  GSWIP_MII_CFG_MODE_MIIP	0x0</div><div class='add'>+#define  GSWIP_MII_CFG_MODE_MIIM	0x1</div><div class='add'>+#define  GSWIP_MII_CFG_MODE_RMIIP	0x2</div><div class='add'>+#define  GSWIP_MII_CFG_MODE_RMIIM	0x3</div><div class='add'>+#define  GSWIP_MII_CFG_MODE_RGMII	0x4</div><div class='add'>+#define  GSWIP_MII_CFG_MODE_GMII	0x9</div><div class='add'>+#define  GSWIP_MII_CFG_MODE_MASK	0xf</div><div class='add'>+#define  GSWIP_MII_CFG_RATE_M2P5	0x00</div><div class='add'>+#define  GSWIP_MII_CFG_RATE_M25	0x10</div><div class='add'>+#define  GSWIP_MII_CFG_RATE_M125	0x20</div><div class='add'>+#define  GSWIP_MII_CFG_RATE_M50	0x30</div><div class='add'>+#define  GSWIP_MII_CFG_RATE_AUTO	0x40</div><div class='add'>+#define  GSWIP_MII_CFG_RATE_MASK	0x70</div><div class='add'>+#define GSWIP_MII_PCDU0			0x01</div><div class='add'>+#define GSWIP_MII_PCDU1			0x03</div><div class='add'>+#define GSWIP_MII_PCDU5			0x05</div><div class='add'>+#define  GSWIP_MII_PCDU_TXDLY_MASK	GENMASK(2, 0)</div><div class='add'>+#define  GSWIP_MII_PCDU_RXDLY_MASK	GENMASK(9, 7)</div><div class='add'>+#define  GSWIP_MII_PCDU_TXDLY(x)	u16_encode_bits(((x) / 500), GSWIP_MII_PCDU_TXDLY_MASK)</div><div class='add'>+#define  GSWIP_MII_PCDU_RXDLY(x)	u16_encode_bits(((x) / 500), GSWIP_MII_PCDU_RXDLY_MASK)</div><div class='add'>+#define GSWIP_MII_PCDU_RXDLY_DEFAULT	2000 /* picoseconds */</div><div class='add'>+#define GSWIP_MII_PCDU_TXDLY_DEFAULT	2000 /* picoseconds */</div><div class='add'>+</div><div class='add'>+/* GSWIP Core Registers */</div><div class='add'>+#define GSWIP_SWRES			0x000</div><div class='add'>+#define  GSWIP_SWRES_R1			BIT(1)	/* GSWIP Software reset */</div><div class='add'>+#define  GSWIP_SWRES_R0			BIT(0)	/* GSWIP Hardware reset */</div><div class='add'>+#define GSWIP_VERSION			0x013</div><div class='add'>+#define  GSWIP_VERSION_REV_MASK		GENMASK(7, 0)</div><div class='add'>+#define  GSWIP_VERSION_MOD_MASK		GENMASK(15, 8)</div><div class='add'>+#define  GSWIP_VERSION_REV(v)		FIELD_GET(GSWIP_VERSION_REV_MASK, v)</div><div class='add'>+#define  GSWIP_VERSION_MOD(v)		FIELD_GET(GSWIP_VERSION_MOD_MASK, v)</div><div class='add'>+#define   GSWIP_VERSION_2_0		0x100</div><div class='add'>+#define   GSWIP_VERSION_2_1		0x021</div><div class='add'>+#define   GSWIP_VERSION_2_2		0x122</div><div class='add'>+#define   GSWIP_VERSION_2_2_ETC		0x022</div><div class='add'>+/* The hardware has the 'major/minor' version bytes in the wrong order</div><div class='add'>+ * preventing numerical comparisons. Swap the bytes of the 16-bit value</div><div class='add'>+ * to end up with REV being the most significant byte and MOD being the</div><div class='add'>+ * least significant byte, which then allows comparing it with the</div><div class='add'>+ * value stored in struct gswip_priv.</div><div class='add'>+ */</div><div class='add'>+#define GSWIP_VERSION_GE(priv, ver)	((priv)-&gt;version &gt;= swab16(ver))</div><div class='add'>+</div><div class='add'>+#define GSWIP_BM_RAM_VAL(x)		(0x043 - (x))</div><div class='add'>+#define GSWIP_BM_RAM_ADDR		0x044</div><div class='add'>+#define GSWIP_BM_RAM_CTRL		0x045</div><div class='add'>+#define  GSWIP_BM_RAM_CTRL_BAS		BIT(15)</div><div class='add'>+#define  GSWIP_BM_RAM_CTRL_OPMOD	BIT(5)</div><div class='add'>+#define  GSWIP_BM_RAM_CTRL_ADDR_MASK	GENMASK(4, 0)</div><div class='add'>+#define GSWIP_BM_QUEUE_GCTRL		0x04A</div><div class='add'>+#define  GSWIP_BM_QUEUE_GCTRL_GL_MOD	BIT(10)</div><div class='add'>+/* buffer management Port Configuration Register */</div><div class='add'>+#define GSWIP_BM_PCFGp(p)		(0x080 + ((p) * 2))</div><div class='add'>+#define  GSWIP_BM_PCFG_CNTEN		BIT(0)	/* RMON Counter Enable */</div><div class='add'>+#define  GSWIP_BM_PCFG_IGCNT		BIT(1)	/* Ingres Special Tag RMON count */</div><div class='add'>+/* buffer management Port Control Register */</div><div class='add'>+#define GSWIP_BM_RMON_CTRLp(p)		(0x81 + ((p) * 2))</div><div class='add'>+#define  GSWIP_BM_CTRL_RMON_RAM1_RES	BIT(0)	/* Software Reset for RMON RAM 1 */</div><div class='add'>+#define  GSWIP_BM_CTRL_RMON_RAM2_RES	BIT(1)	/* Software Reset for RMON RAM 2 */</div><div class='add'>+</div><div class='add'>+/* PCE */</div><div class='add'>+#define GSWIP_PCE_TBL_KEY(x)		(0x447 - (x))</div><div class='add'>+#define GSWIP_PCE_TBL_MASK		0x448</div><div class='add'>+#define GSWIP_PCE_TBL_VAL(x)		(0x44D - (x))</div><div class='add'>+#define GSWIP_PCE_TBL_ADDR		0x44E</div><div class='add'>+#define GSWIP_PCE_TBL_CTRL		0x44F</div><div class='add'>+#define  GSWIP_PCE_TBL_CTRL_BAS		BIT(15)</div><div class='add'>+#define  GSWIP_PCE_TBL_CTRL_TYPE	BIT(13)</div><div class='add'>+#define  GSWIP_PCE_TBL_CTRL_VLD		BIT(12)</div><div class='add'>+#define  GSWIP_PCE_TBL_CTRL_KEYFORM	BIT(11)</div><div class='add'>+#define  GSWIP_PCE_TBL_CTRL_GMAP_MASK	GENMASK(10, 7)</div><div class='add'>+#define  GSWIP_PCE_TBL_CTRL_OPMOD_MASK	GENMASK(6, 5)</div><div class='add'>+#define  GSWIP_PCE_TBL_CTRL_OPMOD_ADRD	0x00</div><div class='add'>+#define  GSWIP_PCE_TBL_CTRL_OPMOD_ADWR	0x20</div><div class='add'>+#define  GSWIP_PCE_TBL_CTRL_OPMOD_KSRD	0x40</div><div class='add'>+#define  GSWIP_PCE_TBL_CTRL_OPMOD_KSWR	0x60</div><div class='add'>+#define  GSWIP_PCE_TBL_CTRL_ADDR_MASK	GENMASK(4, 0)</div><div class='add'>+#define GSWIP_PCE_PMAP1			0x453	/* Monitoring port map */</div><div class='add'>+#define GSWIP_PCE_PMAP2			0x454	/* Default Multicast port map */</div><div class='add'>+#define GSWIP_PCE_PMAP3			0x455	/* Default Unknown Unicast port map */</div><div class='add'>+#define GSWIP_PCE_GCTRL_0		0x456</div><div class='add'>+#define  GSWIP_PCE_GCTRL_0_MTFL		BIT(0)  /* MAC Table Flushing */</div><div class='add'>+#define  GSWIP_PCE_GCTRL_0_MC_VALID	BIT(3)</div><div class='add'>+#define  GSWIP_PCE_GCTRL_0_VLAN		BIT(14) /* VLAN aware Switching */</div><div class='add'>+#define GSWIP_PCE_GCTRL_1		0x457</div><div class='add'>+#define  GSWIP_PCE_GCTRL_1_MAC_GLOCK	BIT(2)	/* MAC Address table lock */</div><div class='add'>+#define  GSWIP_PCE_GCTRL_1_MAC_GLOCK_MOD	BIT(3) /* Mac address table lock forwarding mode */</div><div class='add'>+#define GSWIP_PCE_PCTRL_0p(p)		(0x480 + ((p) * 0xA))</div><div class='add'>+#define  GSWIP_PCE_PCTRL_0_TVM		BIT(5)	/* Transparent VLAN mode */</div><div class='add'>+#define  GSWIP_PCE_PCTRL_0_VREP		BIT(6)	/* VLAN Replace Mode */</div><div class='add'>+#define  GSWIP_PCE_PCTRL_0_INGRESS	BIT(11)	/* Accept special tag in ingress */</div><div class='add'>+#define  GSWIP_PCE_PCTRL_0_PSTATE_LISTEN	0x0</div><div class='add'>+#define  GSWIP_PCE_PCTRL_0_PSTATE_RX		0x1</div><div class='add'>+#define  GSWIP_PCE_PCTRL_0_PSTATE_TX		0x2</div><div class='add'>+#define  GSWIP_PCE_PCTRL_0_PSTATE_LEARNING	0x3</div><div class='add'>+#define  GSWIP_PCE_PCTRL_0_PSTATE_FORWARDING	0x7</div><div class='add'>+#define  GSWIP_PCE_PCTRL_0_PSTATE_MASK	GENMASK(2, 0)</div><div class='add'>+/* Ethernet Switch PCE Port Control Register 3 */</div><div class='add'>+#define GSWIP_PCE_PCTRL_3p(p)		(0x483 + ((p) * 0xA))</div><div class='add'>+#define  GSWIP_PCE_PCTRL_3_LNDIS	BIT(15)  /* Learning Disable */</div><div class='add'>+#define GSWIP_PCE_VCTRL(p)		(0x485 + ((p) * 0xA))</div><div class='add'>+#define  GSWIP_PCE_VCTRL_UVR		BIT(0)	/* Unknown VLAN Rule */</div><div class='add'>+#define  GSWIP_PCE_VCTRL_VINR		GENMASK(2, 1) /* VLAN Ingress Tag Rule */</div><div class='add'>+#define  GSWIP_PCE_VCTRL_VINR_ALL	0 /* Admit tagged and untagged packets */</div><div class='add'>+#define  GSWIP_PCE_VCTRL_VINR_TAGGED	1 /* Admit only tagged packets */</div><div class='add'>+#define  GSWIP_PCE_VCTRL_VINR_UNTAGGED	2 /* Admit only untagged packets */</div><div class='add'>+#define  GSWIP_PCE_VCTRL_VIMR		BIT(3)	/* VLAN Ingress Member violation rule */</div><div class='add'>+#define  GSWIP_PCE_VCTRL_VEMR		BIT(4)	/* VLAN Egress Member violation rule */</div><div class='add'>+#define  GSWIP_PCE_VCTRL_VSR		BIT(5)	/* VLAN Security */</div><div class='add'>+#define  GSWIP_PCE_VCTRL_VID0		BIT(6)	/* Priority Tagged Rule */</div><div class='add'>+#define GSWIP_PCE_DEFPVID(p)		(0x486 + ((p) * 0xA))</div><div class='add'>+</div><div class='add'>+#define GSWIP_MAC_FLEN			0x8C5</div><div class='add'>+#define GSWIP_MAC_CTRL_0p(p)		(0x903 + ((p) * 0xC))</div><div class='add'>+#define  GSWIP_MAC_CTRL_0_PADEN		BIT(8)</div><div class='add'>+#define  GSWIP_MAC_CTRL_0_FCS_EN	BIT(7)</div><div class='add'>+#define  GSWIP_MAC_CTRL_0_FCON_MASK	0x0070</div><div class='add'>+#define  GSWIP_MAC_CTRL_0_FCON_AUTO	0x0000</div><div class='add'>+#define  GSWIP_MAC_CTRL_0_FCON_RX	0x0010</div><div class='add'>+#define  GSWIP_MAC_CTRL_0_FCON_TX	0x0020</div><div class='add'>+#define  GSWIP_MAC_CTRL_0_FCON_RXTX	0x0030</div><div class='add'>+#define  GSWIP_MAC_CTRL_0_FCON_NONE	0x0040</div><div class='add'>+#define  GSWIP_MAC_CTRL_0_FDUP_MASK	0x000C</div><div class='add'>+#define  GSWIP_MAC_CTRL_0_FDUP_AUTO	0x0000</div><div class='add'>+#define  GSWIP_MAC_CTRL_0_FDUP_EN	0x0004</div><div class='add'>+#define  GSWIP_MAC_CTRL_0_FDUP_DIS	0x000C</div><div class='add'>+#define  GSWIP_MAC_CTRL_0_GMII_MASK	0x0003</div><div class='add'>+#define  GSWIP_MAC_CTRL_0_GMII_AUTO	0x0000</div><div class='add'>+#define  GSWIP_MAC_CTRL_0_GMII_MII	0x0001</div><div class='add'>+#define  GSWIP_MAC_CTRL_0_GMII_RGMII	0x0002</div><div class='add'>+#define GSWIP_MAC_CTRL_2p(p)		(0x905 + ((p) * 0xC))</div><div class='add'>+#define GSWIP_MAC_CTRL_2_LCHKL		BIT(2) /* Frame Length Check Long Enable */</div><div class='add'>+#define GSWIP_MAC_CTRL_2_MLEN		BIT(3) /* Maximum Untagged Frame Lnegth */</div><div class='add'>+#define GSWIP_MAC_CTRL_4p(p)		(0x907 + ((p) * 0xC))</div><div class='add'>+#define  GSWIP_MAC_CTRL_4_LPIEN		BIT(7) /* LPI Mode Enable */</div><div class='add'>+#define  GSWIP_MAC_CTRL_4_GWAIT_MASK	GENMASK(14, 8) /* LPI Wait Time 1G */</div><div class='add'>+#define  GSWIP_MAC_CTRL_4_GWAIT(t)	u16_encode_bits((t), GSWIP_MAC_CTRL_4_GWAIT_MASK)</div><div class='add'>+#define  GSWIP_MAC_CTRL_4_WAIT_MASK	GENMASK(6, 0) /* LPI Wait Time 100M */</div><div class='add'>+#define  GSWIP_MAC_CTRL_4_WAIT(t)	u16_encode_bits((t), GSWIP_MAC_CTRL_4_WAIT_MASK)</div><div class='add'>+</div><div class='add'>+/* Ethernet Switch Fetch DMA Port Control Register */</div><div class='add'>+#define GSWIP_FDMA_PCTRLp(p)		(0xA80 + ((p) * 0x6))</div><div class='add'>+#define  GSWIP_FDMA_PCTRL_EN		BIT(0)	/* FDMA Port Enable */</div><div class='add'>+#define  GSWIP_FDMA_PCTRL_STEN		BIT(1)	/* Special Tag Insertion Enable */</div><div class='add'>+#define  GSWIP_FDMA_PCTRL_VLANMOD_MASK	GENMASK(4, 3)	/* VLAN Modification Control */</div><div class='add'>+#define  GSWIP_FDMA_PCTRL_VLANMOD_SHIFT	3	/* VLAN Modification Control */</div><div class='add'>+#define  GSWIP_FDMA_PCTRL_VLANMOD_DIS	(0x0 &lt;&lt; GSWIP_FDMA_PCTRL_VLANMOD_SHIFT)</div><div class='add'>+#define  GSWIP_FDMA_PCTRL_VLANMOD_PRIO	(0x1 &lt;&lt; GSWIP_FDMA_PCTRL_VLANMOD_SHIFT)</div><div class='add'>+#define  GSWIP_FDMA_PCTRL_VLANMOD_ID	(0x2 &lt;&lt; GSWIP_FDMA_PCTRL_VLANMOD_SHIFT)</div><div class='add'>+#define  GSWIP_FDMA_PCTRL_VLANMOD_BOTH	(0x3 &lt;&lt; GSWIP_FDMA_PCTRL_VLANMOD_SHIFT)</div><div class='add'>+</div><div class='add'>+/* Ethernet Switch Store DMA Port Control Register */</div><div class='add'>+#define GSWIP_SDMA_PCTRLp(p)		(0xBC0 + ((p) * 0x6))</div><div class='add'>+#define  GSWIP_SDMA_PCTRL_EN		BIT(0)	/* SDMA Port Enable */</div><div class='add'>+#define  GSWIP_SDMA_PCTRL_FCEN		BIT(1)	/* Flow Control Enable */</div><div class='add'>+#define  GSWIP_SDMA_PCTRL_PAUFWD	BIT(3)	/* Pause Frame Forwarding */</div><div class='add'>+</div><div class='add'>+#define GSWIP_TABLE_ACTIVE_VLAN		0x01</div><div class='add'>+#define GSWIP_TABLE_VLAN_MAPPING	0x02</div><div class='add'>+#define GSWIP_TABLE_MAC_BRIDGE		0x0b</div><div class='add'>+#define  GSWIP_TABLE_MAC_BRIDGE_KEY3_FID	GENMASK(5, 0)	/* Filtering identifier */</div><div class='add'>+#define  GSWIP_TABLE_MAC_BRIDGE_VAL0_PORT	GENMASK(7, 4)	/* Port on learned entries */</div><div class='add'>+#define  GSWIP_TABLE_MAC_BRIDGE_VAL1_STATIC	BIT(0)		/* Static, non-aging entry */</div><div class='add'>+#define  GSWIP_TABLE_MAC_BRIDGE_VAL1_VALID	BIT(1)		/* Valid bit */</div><div class='add'>+</div><div class='add'>+#define XRX200_GPHY_FW_ALIGN	(16 * 1024)</div><div class='add'>+</div><div class='add'>+/* Maximum packet size supported by the switch. In theory this should be 10240,</div><div class='add'>+ * but long packets currently cause lock-ups with an MTU of over 2526. Medium</div><div class='add'>+ * packets are sometimes dropped (e.g. TCP over 2477, UDP over 2516-2519, ICMP</div><div class='add'>+ * over 2526), hence an MTU value of 2400 seems safe. This issue only affects</div><div class='add'>+ * packet reception. This is probably caused by the PPA engine, which is on the</div><div class='add'>+ * RX part of the device. Packet transmission works properly up to 10240.</div><div class='add'>+ */</div><div class='add'>+#define GSWIP_MAX_PACKET_LENGTH	2400</div><div class='add'>+</div><div class='add'>+#define GSWIP_VLAN_UNAWARE_PVID	0</div><div class='add'>+</div><div class='add'>+struct gswip_pce_microcode {</div><div class='add'>+	u16 val_3;</div><div class='add'>+	u16 val_2;</div><div class='add'>+	u16 val_1;</div><div class='add'>+	u16 val_0;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct gswip_hw_info {</div><div class='add'>+	int max_ports;</div><div class='add'>+	unsigned int allowed_cpu_ports;</div><div class='add'>+	unsigned int mii_ports;</div><div class='add'>+	int mii_port_reg_offset;</div><div class='add'>+	bool supports_2500m;</div><div class='add'>+	const struct gswip_pce_microcode (*pce_microcode)[];</div><div class='add'>+	size_t pce_microcode_size;</div><div class='add'>+	enum dsa_tag_protocol tag_protocol;</div><div class='add'>+	void (*phylink_get_caps)(struct dsa_switch *ds, int port,</div><div class='add'>+				 struct phylink_config *config);</div><div class='add'>+	struct phylink_pcs *(*mac_select_pcs)(struct phylink_config *config,</div><div class='add'>+					      phy_interface_t interface);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct gswip_gphy_fw {</div><div class='add'>+	struct clk *clk_gate;</div><div class='add'>+	struct reset_control *reset;</div><div class='add'>+	u32 fw_addr_offset;</div><div class='add'>+	char *fw_name;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct gswip_vlan {</div><div class='add'>+	struct net_device *bridge;</div><div class='add'>+	u16 vid;</div><div class='add'>+	u8 fid;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct gswip_priv {</div><div class='add'>+	struct regmap *gswip;</div><div class='add'>+	struct regmap *mdio;</div><div class='add'>+	struct regmap *mii;</div><div class='add'>+	const struct gswip_hw_info *hw_info;</div><div class='add'>+	const struct xway_gphy_match_data *gphy_fw_name_cfg;</div><div class='add'>+	struct dsa_switch *ds;</div><div class='add'>+	struct device *dev;</div><div class='add'>+	struct regmap *rcu_regmap;</div><div class='add'>+	struct gswip_vlan vlans[64];</div><div class='add'>+	int num_gphy_fw;</div><div class='add'>+	struct gswip_gphy_fw *gphy_fw;</div><div class='add'>+	struct mutex pce_table_lock;</div><div class='add'>+	u16 version;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void gswip_disable_switch(struct gswip_priv *priv);</div><div class='add'>+</div><div class='add'>+int gswip_probe_common(struct gswip_priv *priv, u32 version);</div><div class='add'>+</div><div class='add'>+#endif /* __LANTIQ_GSWIP_H */</div><div class='head'>diff --git a/drivers/net/dsa/lantiq/lantiq_gswip_common.c b/drivers/net/dsa/lantiq/lantiq_gswip_common.c<br/>new file mode 100644<br/>index 000000000000..9da39edf8f57<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/lantiq/lantiq_gswip_common.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/lantiq/lantiq_gswip_common.c</a></div><div class='hunk'>@@ -0,0 +1,1739 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Lantiq / Intel / MaxLinear GSWIP common function library</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Daniel Golle &lt;daniel@makrotopia.org&gt;</div><div class='add'>+ * Copyright (C) 2023 - 2024 MaxLinear Inc.</div><div class='add'>+ * Copyright (C) 2022 Snap One, LLC.  All rights reserved.</div><div class='add'>+ * Copyright (C) 2017 - 2019 Hauke Mehrtens &lt;hauke@hauke-m.de&gt;</div><div class='add'>+ * Copyright (C) 2012 John Crispin &lt;john@phrozen.org&gt;</div><div class='add'>+ * Copyright (C) 2010 Lantiq Deutschland</div><div class='add'>+ *</div><div class='add'>+ * The VLAN and bridge model the GSWIP hardware uses does not directly</div><div class='add'>+ * matches the model DSA uses.</div><div class='add'>+ *</div><div class='add'>+ * The hardware has 64 possible table entries for bridges with one VLAN</div><div class='add'>+ * ID, one flow id and a list of ports for each bridge. All entries which</div><div class='add'>+ * match the same flow ID are combined in the mac learning table, they</div><div class='add'>+ * act as one global bridge.</div><div class='add'>+ * The hardware does not support VLAN filter on the port, but on the</div><div class='add'>+ * bridge, this driver converts the DSA model to the hardware.</div><div class='add'>+ *</div><div class='add'>+ * The CPU gets all the exception frames which do not match any forwarding</div><div class='add'>+ * rule and the CPU port is also added to all bridges. This makes it possible</div><div class='add'>+ * to handle all the special cases easily in software.</div><div class='add'>+ * At the initialization the driver allocates one bridge table entry for</div><div class='add'>+ * each switch port which is used when the port is used without an</div><div class='add'>+ * explicit bridge. This prevents the frames from being forwarded</div><div class='add'>+ * between all LAN ports by default.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "lantiq_gswip.h"</div><div class='add'>+</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/if_bridge.h&gt;</div><div class='add'>+#include &lt;linux/if_vlan.h&gt;</div><div class='add'>+#include &lt;linux/iopoll.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of_mdio.h&gt;</div><div class='add'>+#include &lt;linux/of_net.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/phylink.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+</div><div class='add'>+struct gswip_pce_table_entry {</div><div class='add'>+	u16 index;      // PCE_TBL_ADDR.ADDR = pData-&gt;table_index</div><div class='add'>+	u16 table;      // PCE_TBL_CTRL.ADDR = pData-&gt;table</div><div class='add'>+	u16 key[8];</div><div class='add'>+	u16 val[5];</div><div class='add'>+	u16 mask;</div><div class='add'>+	u8 gmap;</div><div class='add'>+	bool type;</div><div class='add'>+	bool valid;</div><div class='add'>+	bool key_mode;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct gswip_rmon_cnt_desc {</div><div class='add'>+	unsigned int size;</div><div class='add'>+	unsigned int offset;</div><div class='add'>+	const char *name;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define MIB_DESC(_size, _offset, _name) {.size = _size, .offset = _offset, .name = _name}</div><div class='add'>+</div><div class='add'>+static const struct gswip_rmon_cnt_desc gswip_rmon_cnt[] = {</div><div class='add'>+	/** Receive Packet Count (only packets that are accepted and not discarded). */</div><div class='add'>+	MIB_DESC(1, 0x1F, "RxGoodPkts"),</div><div class='add'>+	MIB_DESC(1, 0x23, "RxUnicastPkts"),</div><div class='add'>+	MIB_DESC(1, 0x22, "RxMulticastPkts"),</div><div class='add'>+	MIB_DESC(1, 0x21, "RxFCSErrorPkts"),</div><div class='add'>+	MIB_DESC(1, 0x1D, "RxUnderSizeGoodPkts"),</div><div class='add'>+	MIB_DESC(1, 0x1E, "RxUnderSizeErrorPkts"),</div><div class='add'>+	MIB_DESC(1, 0x1B, "RxOversizeGoodPkts"),</div><div class='add'>+	MIB_DESC(1, 0x1C, "RxOversizeErrorPkts"),</div><div class='add'>+	MIB_DESC(1, 0x20, "RxGoodPausePkts"),</div><div class='add'>+	MIB_DESC(1, 0x1A, "RxAlignErrorPkts"),</div><div class='add'>+	MIB_DESC(1, 0x12, "Rx64BytePkts"),</div><div class='add'>+	MIB_DESC(1, 0x13, "Rx127BytePkts"),</div><div class='add'>+	MIB_DESC(1, 0x14, "Rx255BytePkts"),</div><div class='add'>+	MIB_DESC(1, 0x15, "Rx511BytePkts"),</div><div class='add'>+	MIB_DESC(1, 0x16, "Rx1023BytePkts"),</div><div class='add'>+	/** Receive Size 1024-1522 (or more, if configured) Packet Count. */</div><div class='add'>+	MIB_DESC(1, 0x17, "RxMaxBytePkts"),</div><div class='add'>+	MIB_DESC(1, 0x18, "RxDroppedPkts"),</div><div class='add'>+	MIB_DESC(1, 0x19, "RxFilteredPkts"),</div><div class='add'>+	MIB_DESC(2, 0x24, "RxGoodBytes"),</div><div class='add'>+	MIB_DESC(2, 0x26, "RxBadBytes"),</div><div class='add'>+	MIB_DESC(1, 0x11, "TxAcmDroppedPkts"),</div><div class='add'>+	MIB_DESC(1, 0x0C, "TxGoodPkts"),</div><div class='add'>+	MIB_DESC(1, 0x06, "TxUnicastPkts"),</div><div class='add'>+	MIB_DESC(1, 0x07, "TxMulticastPkts"),</div><div class='add'>+	MIB_DESC(1, 0x00, "Tx64BytePkts"),</div><div class='add'>+	MIB_DESC(1, 0x01, "Tx127BytePkts"),</div><div class='add'>+	MIB_DESC(1, 0x02, "Tx255BytePkts"),</div><div class='add'>+	MIB_DESC(1, 0x03, "Tx511BytePkts"),</div><div class='add'>+	MIB_DESC(1, 0x04, "Tx1023BytePkts"),</div><div class='add'>+	/** Transmit Size 1024-1522 (or more, if configured) Packet Count. */</div><div class='add'>+	MIB_DESC(1, 0x05, "TxMaxBytePkts"),</div><div class='add'>+	MIB_DESC(1, 0x08, "TxSingleCollCount"),</div><div class='add'>+	MIB_DESC(1, 0x09, "TxMultCollCount"),</div><div class='add'>+	MIB_DESC(1, 0x0A, "TxLateCollCount"),</div><div class='add'>+	MIB_DESC(1, 0x0B, "TxExcessCollCount"),</div><div class='add'>+	MIB_DESC(1, 0x0D, "TxPauseCount"),</div><div class='add'>+	MIB_DESC(1, 0x10, "TxDroppedPkts"),</div><div class='add'>+	MIB_DESC(2, 0x0E, "TxGoodBytes"),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static u32 gswip_switch_r_timeout(struct gswip_priv *priv, u32 offset,</div><div class='add'>+				  u32 cleared)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	return regmap_read_poll_timeout(priv-&gt;gswip, offset, val,</div><div class='add'>+					!(val &amp; cleared), 20, 50000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_mii_mask_cfg(struct gswip_priv *priv, u32 mask, u32 set,</div><div class='add'>+			       int port)</div><div class='add'>+{</div><div class='add'>+	int reg_port;</div><div class='add'>+</div><div class='add'>+	/* MII_CFG register only exists for MII ports */</div><div class='add'>+	if (!(priv-&gt;hw_info-&gt;mii_ports &amp; BIT(port)))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	reg_port = port + priv-&gt;hw_info-&gt;mii_port_reg_offset;</div><div class='add'>+</div><div class='add'>+	regmap_write_bits(priv-&gt;mii, GSWIP_MII_CFGp(reg_port), mask,</div><div class='add'>+			  set);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_mdio_poll(struct gswip_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 ctrl;</div><div class='add'>+</div><div class='add'>+	return regmap_read_poll_timeout(priv-&gt;mdio, GSWIP_MDIO_CTRL, ctrl,</div><div class='add'>+					!(ctrl &amp; GSWIP_MDIO_CTRL_BUSY), 40, 4000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_mdio_wr(struct mii_bus *bus, int addr, int reg, u16 val)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = bus-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = gswip_mdio_poll(priv);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;bus-&gt;dev, "waiting for MDIO bus busy timed out\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	regmap_write(priv-&gt;mdio, GSWIP_MDIO_WRITE, val);</div><div class='add'>+	regmap_write(priv-&gt;mdio, GSWIP_MDIO_CTRL,</div><div class='add'>+		     GSWIP_MDIO_CTRL_BUSY | GSWIP_MDIO_CTRL_WR |</div><div class='add'>+		     ((addr &amp; GSWIP_MDIO_CTRL_PHYAD_MASK) &lt;&lt; GSWIP_MDIO_CTRL_PHYAD_SHIFT) |</div><div class='add'>+		     (reg &amp; GSWIP_MDIO_CTRL_REGAD_MASK));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_mdio_rd(struct mii_bus *bus, int addr, int reg)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = bus-&gt;priv;</div><div class='add'>+	u32 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = gswip_mdio_poll(priv);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;bus-&gt;dev, "waiting for MDIO bus busy timed out\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	regmap_write(priv-&gt;mdio, GSWIP_MDIO_CTRL,</div><div class='add'>+		     GSWIP_MDIO_CTRL_BUSY | GSWIP_MDIO_CTRL_RD |</div><div class='add'>+		     ((addr &amp; GSWIP_MDIO_CTRL_PHYAD_MASK) &lt;&lt; GSWIP_MDIO_CTRL_PHYAD_SHIFT) |</div><div class='add'>+		     (reg &amp; GSWIP_MDIO_CTRL_REGAD_MASK));</div><div class='add'>+</div><div class='add'>+	err = gswip_mdio_poll(priv);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;bus-&gt;dev, "waiting for MDIO bus busy timed out\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = regmap_read(priv-&gt;mdio, GSWIP_MDIO_READ, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_mdio(struct gswip_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct device_node *mdio_np, *switch_np = priv-&gt;dev-&gt;of_node;</div><div class='add'>+	struct device *dev = priv-&gt;dev;</div><div class='add'>+	struct mii_bus *bus;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	mdio_np = of_get_compatible_child(switch_np, "lantiq,xrx200-mdio");</div><div class='add'>+	if (!mdio_np)</div><div class='add'>+		mdio_np = of_get_child_by_name(switch_np, "mdio");</div><div class='add'>+</div><div class='add'>+	if (!of_device_is_available(mdio_np))</div><div class='add'>+		goto out_put_node;</div><div class='add'>+</div><div class='add'>+	bus = devm_mdiobus_alloc(dev);</div><div class='add'>+	if (!bus) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto out_put_node;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bus-&gt;priv = priv;</div><div class='add'>+	bus-&gt;read = gswip_mdio_rd;</div><div class='add'>+	bus-&gt;write = gswip_mdio_wr;</div><div class='add'>+	bus-&gt;name = "lantiq,xrx200-mdio";</div><div class='add'>+	snprintf(bus-&gt;id, MII_BUS_ID_SIZE, "%s-mii", dev_name(priv-&gt;dev));</div><div class='add'>+	bus-&gt;parent = priv-&gt;dev;</div><div class='add'>+</div><div class='add'>+	err = devm_of_mdiobus_register(dev, bus, mdio_np);</div><div class='add'>+</div><div class='add'>+out_put_node:</div><div class='add'>+	of_node_put(mdio_np);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_pce_table_entry_read(struct gswip_priv *priv,</div><div class='add'>+				      struct gswip_pce_table_entry *tbl)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	int err;</div><div class='add'>+	u32 crtl;</div><div class='add'>+	u32 tmp;</div><div class='add'>+	u16 addr_mode = tbl-&gt;key_mode ? GSWIP_PCE_TBL_CTRL_OPMOD_KSRD :</div><div class='add'>+					GSWIP_PCE_TBL_CTRL_OPMOD_ADRD;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;pce_table_lock);</div><div class='add'>+</div><div class='add'>+	err = gswip_switch_r_timeout(priv, GSWIP_PCE_TBL_CTRL,</div><div class='add'>+				     GSWIP_PCE_TBL_CTRL_BAS);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+</div><div class='add'>+	regmap_write(priv-&gt;gswip, GSWIP_PCE_TBL_ADDR, tbl-&gt;index);</div><div class='add'>+	regmap_write_bits(priv-&gt;gswip, GSWIP_PCE_TBL_CTRL,</div><div class='add'>+			  GSWIP_PCE_TBL_CTRL_ADDR_MASK |</div><div class='add'>+			  GSWIP_PCE_TBL_CTRL_OPMOD_MASK |</div><div class='add'>+			  GSWIP_PCE_TBL_CTRL_BAS,</div><div class='add'>+			  tbl-&gt;table | addr_mode | GSWIP_PCE_TBL_CTRL_BAS);</div><div class='add'>+</div><div class='add'>+	err = gswip_switch_r_timeout(priv, GSWIP_PCE_TBL_CTRL,</div><div class='add'>+				     GSWIP_PCE_TBL_CTRL_BAS);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(tbl-&gt;key); i++) {</div><div class='add'>+		err = regmap_read(priv-&gt;gswip, GSWIP_PCE_TBL_KEY(i), &amp;tmp);</div><div class='add'>+		if (err)</div><div class='add'>+			goto out_unlock;</div><div class='add'>+		tbl-&gt;key[i] = tmp;</div><div class='add'>+	}</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(tbl-&gt;val); i++) {</div><div class='add'>+		err = regmap_read(priv-&gt;gswip, GSWIP_PCE_TBL_VAL(i), &amp;tmp);</div><div class='add'>+		if (err)</div><div class='add'>+			goto out_unlock;</div><div class='add'>+		tbl-&gt;val[i] = tmp;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = regmap_read(priv-&gt;gswip, GSWIP_PCE_TBL_MASK, &amp;tmp);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+</div><div class='add'>+	tbl-&gt;mask = tmp;</div><div class='add'>+	err = regmap_read(priv-&gt;gswip, GSWIP_PCE_TBL_CTRL, &amp;crtl);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+</div><div class='add'>+	tbl-&gt;type = !!(crtl &amp; GSWIP_PCE_TBL_CTRL_TYPE);</div><div class='add'>+	tbl-&gt;valid = !!(crtl &amp; GSWIP_PCE_TBL_CTRL_VLD);</div><div class='add'>+	tbl-&gt;gmap = (crtl &amp; GSWIP_PCE_TBL_CTRL_GMAP_MASK) &gt;&gt; 7;</div><div class='add'>+</div><div class='add'>+out_unlock:</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;pce_table_lock);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_pce_table_entry_write(struct gswip_priv *priv,</div><div class='add'>+				       struct gswip_pce_table_entry *tbl)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	int err;</div><div class='add'>+	u32 crtl;</div><div class='add'>+	u16 addr_mode = tbl-&gt;key_mode ? GSWIP_PCE_TBL_CTRL_OPMOD_KSWR :</div><div class='add'>+					GSWIP_PCE_TBL_CTRL_OPMOD_ADWR;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;pce_table_lock);</div><div class='add'>+</div><div class='add'>+	err = gswip_switch_r_timeout(priv, GSWIP_PCE_TBL_CTRL,</div><div class='add'>+				     GSWIP_PCE_TBL_CTRL_BAS);</div><div class='add'>+	if (err) {</div><div class='add'>+		mutex_unlock(&amp;priv-&gt;pce_table_lock);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	regmap_write(priv-&gt;gswip, GSWIP_PCE_TBL_ADDR, tbl-&gt;index);</div><div class='add'>+	regmap_write_bits(priv-&gt;gswip, GSWIP_PCE_TBL_CTRL,</div><div class='add'>+			  GSWIP_PCE_TBL_CTRL_ADDR_MASK |</div><div class='add'>+			  GSWIP_PCE_TBL_CTRL_OPMOD_MASK,</div><div class='add'>+			  tbl-&gt;table | addr_mode);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(tbl-&gt;key); i++)</div><div class='add'>+		regmap_write(priv-&gt;gswip, GSWIP_PCE_TBL_KEY(i), tbl-&gt;key[i]);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(tbl-&gt;val); i++)</div><div class='add'>+		regmap_write(priv-&gt;gswip, GSWIP_PCE_TBL_VAL(i), tbl-&gt;val[i]);</div><div class='add'>+</div><div class='add'>+	regmap_write_bits(priv-&gt;gswip, GSWIP_PCE_TBL_CTRL,</div><div class='add'>+			  GSWIP_PCE_TBL_CTRL_ADDR_MASK |</div><div class='add'>+			  GSWIP_PCE_TBL_CTRL_OPMOD_MASK,</div><div class='add'>+			  tbl-&gt;table | addr_mode);</div><div class='add'>+</div><div class='add'>+	regmap_write(priv-&gt;gswip, GSWIP_PCE_TBL_MASK, tbl-&gt;mask);</div><div class='add'>+</div><div class='add'>+	regmap_read(priv-&gt;gswip, GSWIP_PCE_TBL_CTRL, &amp;crtl);</div><div class='add'>+	crtl &amp;= ~(GSWIP_PCE_TBL_CTRL_TYPE | GSWIP_PCE_TBL_CTRL_VLD |</div><div class='add'>+		  GSWIP_PCE_TBL_CTRL_GMAP_MASK);</div><div class='add'>+	if (tbl-&gt;type)</div><div class='add'>+		crtl |= GSWIP_PCE_TBL_CTRL_TYPE;</div><div class='add'>+	if (tbl-&gt;valid)</div><div class='add'>+		crtl |= GSWIP_PCE_TBL_CTRL_VLD;</div><div class='add'>+	crtl |= (tbl-&gt;gmap &lt;&lt; 7) &amp; GSWIP_PCE_TBL_CTRL_GMAP_MASK;</div><div class='add'>+	crtl |= GSWIP_PCE_TBL_CTRL_BAS;</div><div class='add'>+	regmap_write(priv-&gt;gswip, GSWIP_PCE_TBL_CTRL, crtl);</div><div class='add'>+</div><div class='add'>+	err = gswip_switch_r_timeout(priv, GSWIP_PCE_TBL_CTRL,</div><div class='add'>+				     GSWIP_PCE_TBL_CTRL_BAS);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;pce_table_lock);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Add the LAN port into a bridge with the CPU port by</div><div class='add'>+ * default. This prevents automatic forwarding of</div><div class='add'>+ * packages between the LAN ports when no explicit</div><div class='add'>+ * bridge is configured.</div><div class='add'>+ */</div><div class='add'>+static int gswip_add_single_port_br(struct gswip_priv *priv, int port, bool add)</div><div class='add'>+{</div><div class='add'>+	struct gswip_pce_table_entry vlan_active = {0,};</div><div class='add'>+	struct gswip_pce_table_entry vlan_mapping = {0,};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	vlan_active.index = port + 1;</div><div class='add'>+	vlan_active.table = GSWIP_TABLE_ACTIVE_VLAN;</div><div class='add'>+	vlan_active.key[0] = GSWIP_VLAN_UNAWARE_PVID;</div><div class='add'>+	vlan_active.val[0] = port + 1 /* fid */;</div><div class='add'>+	vlan_active.valid = add;</div><div class='add'>+	err = gswip_pce_table_entry_write(priv, &amp;vlan_active);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(priv-&gt;dev, "failed to write active VLAN: %d\n", err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!add)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	vlan_mapping.index = port + 1;</div><div class='add'>+	vlan_mapping.table = GSWIP_TABLE_VLAN_MAPPING;</div><div class='add'>+	vlan_mapping.val[0] = GSWIP_VLAN_UNAWARE_PVID;</div><div class='add'>+	vlan_mapping.val[1] = BIT(port) | dsa_cpu_ports(priv-&gt;ds);</div><div class='add'>+	vlan_mapping.val[2] = 0;</div><div class='add'>+	err = gswip_pce_table_entry_write(priv, &amp;vlan_mapping);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(priv-&gt;dev, "failed to write VLAN mapping: %d\n", err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_port_set_learning(struct gswip_priv *priv, int port,</div><div class='add'>+				   bool enable)</div><div class='add'>+{</div><div class='add'>+	if (!GSWIP_VERSION_GE(priv, GSWIP_VERSION_2_2))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	/* learning disable bit */</div><div class='add'>+	return regmap_update_bits(priv-&gt;gswip, GSWIP_PCE_PCTRL_3p(port),</div><div class='add'>+				  GSWIP_PCE_PCTRL_3_LNDIS,</div><div class='add'>+				  enable ? 0 : GSWIP_PCE_PCTRL_3_LNDIS);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_port_pre_bridge_flags(struct dsa_switch *ds, int port,</div><div class='add'>+				       struct switchdev_brport_flags flags,</div><div class='add'>+				       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+	unsigned long supported = 0;</div><div class='add'>+</div><div class='add'>+	if (GSWIP_VERSION_GE(priv, GSWIP_VERSION_2_2))</div><div class='add'>+		supported |= BR_LEARNING;</div><div class='add'>+</div><div class='add'>+	if (flags.mask &amp; ~supported)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_port_bridge_flags(struct dsa_switch *ds, int port,</div><div class='add'>+				   struct switchdev_brport_flags flags,</div><div class='add'>+				   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (flags.mask &amp; BR_LEARNING)</div><div class='add'>+		return gswip_port_set_learning(priv, port,</div><div class='add'>+					       !!(flags.val &amp; BR_LEARNING));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_port_setup(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!dsa_is_cpu_port(ds, port)) {</div><div class='add'>+		err = gswip_add_single_port_br(priv, port, true);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_port_enable(struct dsa_switch *ds, int port,</div><div class='add'>+			     struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (!dsa_is_cpu_port(ds, port)) {</div><div class='add'>+		u32 mdio_phy = 0;</div><div class='add'>+</div><div class='add'>+		if (phydev)</div><div class='add'>+			mdio_phy = phydev-&gt;mdio.addr &amp; GSWIP_MDIO_PHY_ADDR_MASK;</div><div class='add'>+</div><div class='add'>+		regmap_write_bits(priv-&gt;mdio, GSWIP_MDIO_PHYp(port),</div><div class='add'>+				  GSWIP_MDIO_PHY_ADDR_MASK,</div><div class='add'>+				  mdio_phy);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* RMON Counter Enable for port */</div><div class='add'>+	regmap_write(priv-&gt;gswip, GSWIP_BM_PCFGp(port), GSWIP_BM_PCFG_CNTEN);</div><div class='add'>+</div><div class='add'>+	/* enable port fetch/store dma &amp; VLAN Modification */</div><div class='add'>+	regmap_set_bits(priv-&gt;gswip, GSWIP_FDMA_PCTRLp(port),</div><div class='add'>+			GSWIP_FDMA_PCTRL_EN | GSWIP_FDMA_PCTRL_VLANMOD_BOTH);</div><div class='add'>+	regmap_set_bits(priv-&gt;gswip, GSWIP_SDMA_PCTRLp(port),</div><div class='add'>+			GSWIP_SDMA_PCTRL_EN);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_port_disable(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	regmap_clear_bits(priv-&gt;gswip, GSWIP_FDMA_PCTRLp(port),</div><div class='add'>+			  GSWIP_FDMA_PCTRL_EN);</div><div class='add'>+	regmap_clear_bits(priv-&gt;gswip, GSWIP_SDMA_PCTRLp(port),</div><div class='add'>+			  GSWIP_SDMA_PCTRL_EN);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_pce_load_microcode(struct gswip_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	regmap_write_bits(priv-&gt;gswip, GSWIP_PCE_TBL_CTRL,</div><div class='add'>+			  GSWIP_PCE_TBL_CTRL_ADDR_MASK |</div><div class='add'>+			  GSWIP_PCE_TBL_CTRL_OPMOD_MASK |</div><div class='add'>+			  GSWIP_PCE_TBL_CTRL_OPMOD_ADWR,</div><div class='add'>+			  GSWIP_PCE_TBL_CTRL_OPMOD_ADWR);</div><div class='add'>+	regmap_write(priv-&gt;gswip, GSWIP_PCE_TBL_MASK, 0);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;hw_info-&gt;pce_microcode_size; i++) {</div><div class='add'>+		regmap_write(priv-&gt;gswip, GSWIP_PCE_TBL_ADDR, i);</div><div class='add'>+		regmap_write(priv-&gt;gswip, GSWIP_PCE_TBL_VAL(0),</div><div class='add'>+			     (*priv-&gt;hw_info-&gt;pce_microcode)[i].val_0);</div><div class='add'>+		regmap_write(priv-&gt;gswip, GSWIP_PCE_TBL_VAL(1),</div><div class='add'>+			     (*priv-&gt;hw_info-&gt;pce_microcode)[i].val_1);</div><div class='add'>+		regmap_write(priv-&gt;gswip, GSWIP_PCE_TBL_VAL(2),</div><div class='add'>+			     (*priv-&gt;hw_info-&gt;pce_microcode)[i].val_2);</div><div class='add'>+		regmap_write(priv-&gt;gswip, GSWIP_PCE_TBL_VAL(3),</div><div class='add'>+			     (*priv-&gt;hw_info-&gt;pce_microcode)[i].val_3);</div><div class='add'>+</div><div class='add'>+		/* start the table access: */</div><div class='add'>+		regmap_set_bits(priv-&gt;gswip, GSWIP_PCE_TBL_CTRL,</div><div class='add'>+				GSWIP_PCE_TBL_CTRL_BAS);</div><div class='add'>+		err = gswip_switch_r_timeout(priv, GSWIP_PCE_TBL_CTRL,</div><div class='add'>+					     GSWIP_PCE_TBL_CTRL_BAS);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* tell the switch that the microcode is loaded */</div><div class='add'>+	regmap_set_bits(priv-&gt;gswip, GSWIP_PCE_GCTRL_0,</div><div class='add'>+			GSWIP_PCE_GCTRL_0_MC_VALID);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_port_commit_pvid(struct gswip_priv *priv, int port)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(priv-&gt;ds, port);</div><div class='add'>+	struct net_device *br = dsa_port_bridge_dev_get(dp);</div><div class='add'>+	u32 vinr;</div><div class='add'>+	int idx;</div><div class='add'>+</div><div class='add'>+	if (!dsa_port_is_user(dp))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (br) {</div><div class='add'>+		u16 pvid = GSWIP_VLAN_UNAWARE_PVID;</div><div class='add'>+</div><div class='add'>+		if (br_vlan_enabled(br))</div><div class='add'>+			br_vlan_get_pvid(br, &amp;pvid);</div><div class='add'>+</div><div class='add'>+		/* VLAN-aware bridge ports with no PVID will use Active VLAN</div><div class='add'>+		 * index 0. The expectation is that this drops all untagged and</div><div class='add'>+		 * VID-0 tagged ingress traffic.</div><div class='add'>+		 */</div><div class='add'>+		idx = 0;</div><div class='add'>+		for (int i = priv-&gt;hw_info-&gt;max_ports;</div><div class='add'>+		     i &lt; ARRAY_SIZE(priv-&gt;vlans); i++) {</div><div class='add'>+			if (priv-&gt;vlans[i].bridge == br &amp;&amp;</div><div class='add'>+			    priv-&gt;vlans[i].vid == pvid) {</div><div class='add'>+				idx = i;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		/* The Active VLAN table index as configured by</div><div class='add'>+		 * gswip_add_single_port_br()</div><div class='add'>+		 */</div><div class='add'>+		idx = port + 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vinr = idx ? GSWIP_PCE_VCTRL_VINR_ALL : GSWIP_PCE_VCTRL_VINR_TAGGED;</div><div class='add'>+	regmap_write_bits(priv-&gt;gswip, GSWIP_PCE_VCTRL(port),</div><div class='add'>+			  GSWIP_PCE_VCTRL_VINR,</div><div class='add'>+			  FIELD_PREP(GSWIP_PCE_VCTRL_VINR, vinr));</div><div class='add'>+</div><div class='add'>+	/* Note that in GSWIP 2.2 VLAN mode the VID needs to be programmed</div><div class='add'>+	 * directly instead of referencing the index in the Active VLAN Tablet.</div><div class='add'>+	 * However, without the VLANMD bit (9) in PCE_GCTRL_1 (0x457) even</div><div class='add'>+	 * GSWIP 2.2 and newer hardware maintain the GSWIP 2.1 behavior.</div><div class='add'>+	 */</div><div class='add'>+	regmap_write(priv-&gt;gswip, GSWIP_PCE_DEFPVID(port), idx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_port_vlan_filtering(struct dsa_switch *ds, int port,</div><div class='add'>+				     bool vlan_filtering,</div><div class='add'>+				     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (vlan_filtering) {</div><div class='add'>+		/* Use tag based VLAN */</div><div class='add'>+		regmap_write_bits(priv-&gt;gswip, GSWIP_PCE_VCTRL(port),</div><div class='add'>+				  GSWIP_PCE_VCTRL_VSR |</div><div class='add'>+				  GSWIP_PCE_VCTRL_UVR |</div><div class='add'>+				  GSWIP_PCE_VCTRL_VIMR |</div><div class='add'>+				  GSWIP_PCE_VCTRL_VEMR |</div><div class='add'>+				  GSWIP_PCE_VCTRL_VID0,</div><div class='add'>+				  GSWIP_PCE_VCTRL_UVR |</div><div class='add'>+				  GSWIP_PCE_VCTRL_VIMR |</div><div class='add'>+				  GSWIP_PCE_VCTRL_VEMR |</div><div class='add'>+				  GSWIP_PCE_VCTRL_VID0);</div><div class='add'>+		regmap_clear_bits(priv-&gt;gswip, GSWIP_PCE_PCTRL_0p(port),</div><div class='add'>+				  GSWIP_PCE_PCTRL_0_TVM);</div><div class='add'>+	} else {</div><div class='add'>+		/* Use port based VLAN */</div><div class='add'>+		regmap_write_bits(priv-&gt;gswip, GSWIP_PCE_VCTRL(port),</div><div class='add'>+				  GSWIP_PCE_VCTRL_UVR |</div><div class='add'>+				  GSWIP_PCE_VCTRL_VIMR |</div><div class='add'>+				  GSWIP_PCE_VCTRL_VEMR |</div><div class='add'>+				  GSWIP_PCE_VCTRL_VID0 |</div><div class='add'>+				  GSWIP_PCE_VCTRL_VSR,</div><div class='add'>+				  GSWIP_PCE_VCTRL_VSR);</div><div class='add'>+		regmap_set_bits(priv-&gt;gswip, GSWIP_PCE_PCTRL_0p(port),</div><div class='add'>+				GSWIP_PCE_PCTRL_0_TVM);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	gswip_port_commit_pvid(priv, port);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_mii_delay_setup(struct gswip_priv *priv, struct dsa_port *dp,</div><div class='add'>+				  phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	u32 tx_delay = GSWIP_MII_PCDU_TXDLY_DEFAULT;</div><div class='add'>+	u32 rx_delay = GSWIP_MII_PCDU_RXDLY_DEFAULT;</div><div class='add'>+	struct device_node *port_dn = dp-&gt;dn;</div><div class='add'>+	u16 mii_pcdu_reg;</div><div class='add'>+</div><div class='add'>+	/* As MII_PCDU registers only exist for MII ports, silently return</div><div class='add'>+	 * unless the port is an MII port</div><div class='add'>+	 */</div><div class='add'>+	if (!(priv-&gt;hw_info-&gt;mii_ports &amp; BIT(dp-&gt;index)))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	switch (dp-&gt;index + priv-&gt;hw_info-&gt;mii_port_reg_offset) {</div><div class='add'>+	case 0:</div><div class='add'>+		mii_pcdu_reg = GSWIP_MII_PCDU0;</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		mii_pcdu_reg = GSWIP_MII_PCDU1;</div><div class='add'>+		break;</div><div class='add'>+	case 5:</div><div class='add'>+		mii_pcdu_reg = GSWIP_MII_PCDU5;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* legacy code to set default delays according to the interface mode */</div><div class='add'>+	switch (interface) {</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='add'>+		tx_delay = 0;</div><div class='add'>+		rx_delay = 0;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='add'>+		rx_delay = 0;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='add'>+		tx_delay = 0;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* allow settings delays using device tree properties */</div><div class='add'>+	of_property_read_u32(port_dn, "rx-internal-delay-ps", &amp;rx_delay);</div><div class='add'>+	of_property_read_u32(port_dn, "tx-internal-delay-ps", &amp;tx_delay);</div><div class='add'>+</div><div class='add'>+	regmap_write_bits(priv-&gt;mii, mii_pcdu_reg,</div><div class='add'>+			  GSWIP_MII_PCDU_TXDLY_MASK |</div><div class='add'>+			  GSWIP_MII_PCDU_RXDLY_MASK,</div><div class='add'>+			  GSWIP_MII_PCDU_TXDLY(tx_delay) |</div><div class='add'>+			  GSWIP_MII_PCDU_RXDLY(rx_delay));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_setup(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	unsigned int cpu_ports = dsa_cpu_ports(ds);</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+	struct dsa_port *cpu_dp;</div><div class='add'>+	int err, i;</div><div class='add'>+</div><div class='add'>+	regmap_write(priv-&gt;gswip, GSWIP_SWRES, GSWIP_SWRES_R0);</div><div class='add'>+	usleep_range(5000, 10000);</div><div class='add'>+	regmap_write(priv-&gt;gswip, GSWIP_SWRES, 0);</div><div class='add'>+</div><div class='add'>+	/* disable port fetch/store dma on all ports */</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;hw_info-&gt;max_ports; i++) {</div><div class='add'>+		gswip_port_disable(ds, i);</div><div class='add'>+		gswip_port_vlan_filtering(ds, i, false, NULL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* enable Switch */</div><div class='add'>+	regmap_set_bits(priv-&gt;mdio, GSWIP_MDIO_GLOB, GSWIP_MDIO_GLOB_ENABLE);</div><div class='add'>+</div><div class='add'>+	err = gswip_pce_load_microcode(priv);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(priv-&gt;dev, "writing PCE microcode failed, %i\n", err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Default unknown Broadcast/Multicast/Unicast port maps */</div><div class='add'>+	regmap_write(priv-&gt;gswip, GSWIP_PCE_PMAP1, cpu_ports);</div><div class='add'>+	regmap_write(priv-&gt;gswip, GSWIP_PCE_PMAP2, cpu_ports);</div><div class='add'>+	regmap_write(priv-&gt;gswip, GSWIP_PCE_PMAP3, cpu_ports);</div><div class='add'>+</div><div class='add'>+	/* Deactivate MDIO PHY auto polling. Some PHYs as the AR8030 have an</div><div class='add'>+	 * interoperability problem with this auto polling mechanism because</div><div class='add'>+	 * their status registers think that the link is in a different state</div><div class='add'>+	 * than it actually is. For the AR8030 it has the BMSR_ESTATEN bit set</div><div class='add'>+	 * as well as ESTATUS_1000_TFULL and ESTATUS_1000_XFULL. This makes the</div><div class='add'>+	 * auto polling state machine consider the link being negotiated with</div><div class='add'>+	 * 1Gbit/s. Since the PHY itself is a Fast Ethernet RMII PHY this leads</div><div class='add'>+	 * to the switch port being completely dead (RX and TX are both not</div><div class='add'>+	 * working).</div><div class='add'>+	 * Also with various other PHY / port combinations (PHY11G GPHY, PHY22F</div><div class='add'>+	 * GPHY, external RGMII PEF7071/7072) any traffic would stop. Sometimes</div><div class='add'>+	 * it would work fine for a few minutes to hours and then stop, on</div><div class='add'>+	 * other device it would no traffic could be sent or received at all.</div><div class='add'>+	 * Testing shows that when PHY auto polling is disabled these problems</div><div class='add'>+	 * go away.</div><div class='add'>+	 */</div><div class='add'>+	regmap_write(priv-&gt;mdio, GSWIP_MDIO_MDC_CFG0, 0x0);</div><div class='add'>+</div><div class='add'>+	/* Configure the MDIO Clock 2.5 MHz */</div><div class='add'>+	regmap_write_bits(priv-&gt;mdio, GSWIP_MDIO_MDC_CFG1, 0xff, 0x09);</div><div class='add'>+</div><div class='add'>+	/* bring up the mdio bus */</div><div class='add'>+	err = gswip_mdio(priv);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(priv-&gt;dev, "mdio bus setup failed\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Disable the xMII interface and clear it's isolation bit */</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;hw_info-&gt;max_ports; i++)</div><div class='add'>+		gswip_mii_mask_cfg(priv,</div><div class='add'>+				   GSWIP_MII_CFG_EN | GSWIP_MII_CFG_ISOLATE,</div><div class='add'>+				   0, i);</div><div class='add'>+</div><div class='add'>+	dsa_switch_for_each_cpu_port(cpu_dp, ds) {</div><div class='add'>+		/* enable special tag insertion on cpu port */</div><div class='add'>+		regmap_set_bits(priv-&gt;gswip, GSWIP_FDMA_PCTRLp(cpu_dp-&gt;index),</div><div class='add'>+				GSWIP_FDMA_PCTRL_STEN);</div><div class='add'>+</div><div class='add'>+		/* accept special tag in ingress direction */</div><div class='add'>+		regmap_set_bits(priv-&gt;gswip,</div><div class='add'>+				GSWIP_PCE_PCTRL_0p(cpu_dp-&gt;index),</div><div class='add'>+				GSWIP_PCE_PCTRL_0_INGRESS);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	regmap_set_bits(priv-&gt;gswip, GSWIP_BM_QUEUE_GCTRL,</div><div class='add'>+			GSWIP_BM_QUEUE_GCTRL_GL_MOD);</div><div class='add'>+</div><div class='add'>+	/* VLAN aware Switching */</div><div class='add'>+	regmap_set_bits(priv-&gt;gswip, GSWIP_PCE_GCTRL_0,</div><div class='add'>+			GSWIP_PCE_GCTRL_0_VLAN);</div><div class='add'>+</div><div class='add'>+	/* Flush MAC Table */</div><div class='add'>+	regmap_set_bits(priv-&gt;gswip, GSWIP_PCE_GCTRL_0,</div><div class='add'>+			GSWIP_PCE_GCTRL_0_MTFL);</div><div class='add'>+</div><div class='add'>+	err = gswip_switch_r_timeout(priv, GSWIP_PCE_GCTRL_0,</div><div class='add'>+				     GSWIP_PCE_GCTRL_0_MTFL);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(priv-&gt;dev, "MAC flushing didn't finish\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ds-&gt;mtu_enforcement_ingress = true;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum dsa_tag_protocol gswip_get_tag_protocol(struct dsa_switch *ds,</div><div class='add'>+						    int port,</div><div class='add'>+						    enum dsa_tag_protocol mp)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return priv-&gt;hw_info-&gt;tag_protocol;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_vlan_active_create(struct gswip_priv *priv,</div><div class='add'>+				    struct net_device *bridge,</div><div class='add'>+				    int fid, u16 vid)</div><div class='add'>+{</div><div class='add'>+	struct gswip_pce_table_entry vlan_active = {0,};</div><div class='add'>+	unsigned int max_ports = priv-&gt;hw_info-&gt;max_ports;</div><div class='add'>+	int idx = -1;</div><div class='add'>+	int err;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Look for a free slot */</div><div class='add'>+	for (i = max_ports; i &lt; ARRAY_SIZE(priv-&gt;vlans); i++) {</div><div class='add'>+		if (!priv-&gt;vlans[i].bridge) {</div><div class='add'>+			idx = i;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (idx == -1)</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+</div><div class='add'>+	if (fid == -1)</div><div class='add'>+		fid = idx;</div><div class='add'>+</div><div class='add'>+	vlan_active.index = idx;</div><div class='add'>+	vlan_active.table = GSWIP_TABLE_ACTIVE_VLAN;</div><div class='add'>+	vlan_active.key[0] = vid;</div><div class='add'>+	vlan_active.val[0] = fid;</div><div class='add'>+	vlan_active.valid = true;</div><div class='add'>+</div><div class='add'>+	err = gswip_pce_table_entry_write(priv, &amp;vlan_active);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(priv-&gt;dev, "failed to write active VLAN: %d\n",	err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;vlans[idx].bridge = bridge;</div><div class='add'>+	priv-&gt;vlans[idx].vid = vid;</div><div class='add'>+	priv-&gt;vlans[idx].fid = fid;</div><div class='add'>+</div><div class='add'>+	return idx;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_vlan_active_remove(struct gswip_priv *priv, int idx)</div><div class='add'>+{</div><div class='add'>+	struct gswip_pce_table_entry vlan_active = {0,};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	vlan_active.index = idx;</div><div class='add'>+	vlan_active.table = GSWIP_TABLE_ACTIVE_VLAN;</div><div class='add'>+	vlan_active.valid = false;</div><div class='add'>+	err = gswip_pce_table_entry_write(priv, &amp;vlan_active);</div><div class='add'>+	if (err)</div><div class='add'>+		dev_err(priv-&gt;dev, "failed to delete active VLAN: %d\n", err);</div><div class='add'>+	priv-&gt;vlans[idx].bridge = NULL;</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_vlan_add(struct gswip_priv *priv, struct net_device *bridge,</div><div class='add'>+			  int port, u16 vid, bool untagged, bool pvid,</div><div class='add'>+			  bool vlan_aware)</div><div class='add'>+{</div><div class='add'>+	struct gswip_pce_table_entry vlan_mapping = {0,};</div><div class='add'>+	unsigned int max_ports = priv-&gt;hw_info-&gt;max_ports;</div><div class='add'>+	unsigned int cpu_ports = dsa_cpu_ports(priv-&gt;ds);</div><div class='add'>+	bool active_vlan_created = false;</div><div class='add'>+	int fid = -1, idx = -1;</div><div class='add'>+	int i, err;</div><div class='add'>+</div><div class='add'>+	/* Check if there is already a page for this bridge */</div><div class='add'>+	for (i = max_ports; i &lt; ARRAY_SIZE(priv-&gt;vlans); i++) {</div><div class='add'>+		if (priv-&gt;vlans[i].bridge == bridge) {</div><div class='add'>+			if (vlan_aware) {</div><div class='add'>+				if (fid != -1 &amp;&amp; fid != priv-&gt;vlans[i].fid)</div><div class='add'>+					dev_err(priv-&gt;dev, "one bridge with multiple flow ids\n");</div><div class='add'>+				fid = priv-&gt;vlans[i].fid;</div><div class='add'>+			}</div><div class='add'>+			if (priv-&gt;vlans[i].vid == vid) {</div><div class='add'>+				idx = i;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* If this bridge is not programmed yet, add a Active VLAN table</div><div class='add'>+	 * entry in a free slot and prepare the VLAN mapping table entry.</div><div class='add'>+	 */</div><div class='add'>+	if (idx == -1) {</div><div class='add'>+		idx = gswip_vlan_active_create(priv, bridge, fid, vid);</div><div class='add'>+		if (idx &lt; 0)</div><div class='add'>+			return idx;</div><div class='add'>+		active_vlan_created = true;</div><div class='add'>+</div><div class='add'>+		vlan_mapping.index = idx;</div><div class='add'>+		vlan_mapping.table = GSWIP_TABLE_VLAN_MAPPING;</div><div class='add'>+	} else {</div><div class='add'>+		/* Read the existing VLAN mapping entry from the switch */</div><div class='add'>+		vlan_mapping.index = idx;</div><div class='add'>+		vlan_mapping.table = GSWIP_TABLE_VLAN_MAPPING;</div><div class='add'>+		err = gswip_pce_table_entry_read(priv, &amp;vlan_mapping);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(priv-&gt;dev, "failed to read VLAN mapping: %d\n",</div><div class='add'>+				err);</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* VLAN ID byte, maps to the VLAN ID of vlan active table */</div><div class='add'>+	vlan_mapping.val[0] = vid;</div><div class='add'>+	/* Update the VLAN mapping entry and write it to the switch */</div><div class='add'>+	vlan_mapping.val[1] |= cpu_ports;</div><div class='add'>+	vlan_mapping.val[1] |= BIT(port);</div><div class='add'>+	if (vlan_aware)</div><div class='add'>+		vlan_mapping.val[2] |= cpu_ports;</div><div class='add'>+	if (untagged)</div><div class='add'>+		vlan_mapping.val[2] &amp;= ~BIT(port);</div><div class='add'>+	else</div><div class='add'>+		vlan_mapping.val[2] |= BIT(port);</div><div class='add'>+	err = gswip_pce_table_entry_write(priv, &amp;vlan_mapping);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(priv-&gt;dev, "failed to write VLAN mapping: %d\n", err);</div><div class='add'>+		/* In case an Active VLAN was creaetd delete it again */</div><div class='add'>+		if (active_vlan_created)</div><div class='add'>+			gswip_vlan_active_remove(priv, idx);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	gswip_port_commit_pvid(priv, port);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_vlan_remove(struct gswip_priv *priv,</div><div class='add'>+			     struct net_device *bridge, int port,</div><div class='add'>+			     u16 vid)</div><div class='add'>+{</div><div class='add'>+	struct gswip_pce_table_entry vlan_mapping = {0,};</div><div class='add'>+	unsigned int max_ports = priv-&gt;hw_info-&gt;max_ports;</div><div class='add'>+	int idx = -1;</div><div class='add'>+	int i;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Check if there is already a page for this bridge */</div><div class='add'>+	for (i = max_ports; i &lt; ARRAY_SIZE(priv-&gt;vlans); i++) {</div><div class='add'>+		if (priv-&gt;vlans[i].bridge == bridge &amp;&amp;</div><div class='add'>+		    priv-&gt;vlans[i].vid == vid) {</div><div class='add'>+			idx = i;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (idx == -1) {</div><div class='add'>+		dev_err(priv-&gt;dev, "Port %d cannot find VID %u of bridge %s\n",</div><div class='add'>+			port, vid, bridge ? bridge-&gt;name : "(null)");</div><div class='add'>+		return -ENOENT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vlan_mapping.index = idx;</div><div class='add'>+	vlan_mapping.table = GSWIP_TABLE_VLAN_MAPPING;</div><div class='add'>+	err = gswip_pce_table_entry_read(priv, &amp;vlan_mapping);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(priv-&gt;dev, "failed to read VLAN mapping: %d\n",	err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vlan_mapping.val[1] &amp;= ~BIT(port);</div><div class='add'>+	vlan_mapping.val[2] &amp;= ~BIT(port);</div><div class='add'>+	err = gswip_pce_table_entry_write(priv, &amp;vlan_mapping);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(priv-&gt;dev, "failed to write VLAN mapping: %d\n", err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* In case all ports are removed from the bridge, remove the VLAN */</div><div class='add'>+	if (!(vlan_mapping.val[1] &amp; ~dsa_cpu_ports(priv-&gt;ds))) {</div><div class='add'>+		err = gswip_vlan_active_remove(priv, idx);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(priv-&gt;dev, "failed to write active VLAN: %d\n",</div><div class='add'>+				err);</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	gswip_port_commit_pvid(priv, port);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_port_bridge_join(struct dsa_switch *ds, int port,</div><div class='add'>+				  struct dsa_bridge bridge,</div><div class='add'>+				  bool *tx_fwd_offload,</div><div class='add'>+				  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct net_device *br = bridge.dev;</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Set up the VLAN for VLAN-unaware bridging for this port, and remove</div><div class='add'>+	 * it from the "single-port bridge" through which it was operating as</div><div class='add'>+	 * standalone.</div><div class='add'>+	 */</div><div class='add'>+	err = gswip_vlan_add(priv, br, port, GSWIP_VLAN_UNAWARE_PVID,</div><div class='add'>+			     true, true, false);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return gswip_add_single_port_br(priv, port, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_port_bridge_leave(struct dsa_switch *ds, int port,</div><div class='add'>+				    struct dsa_bridge bridge)</div><div class='add'>+{</div><div class='add'>+	struct net_device *br = bridge.dev;</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	/* Add the port back to the "single-port bridge", and remove it from</div><div class='add'>+	 * the VLAN-unaware PVID created for this bridge.</div><div class='add'>+	 */</div><div class='add'>+	gswip_add_single_port_br(priv, port, true);</div><div class='add'>+	gswip_vlan_remove(priv, br, port, GSWIP_VLAN_UNAWARE_PVID);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_port_vlan_prepare(struct dsa_switch *ds, int port,</div><div class='add'>+				   const struct switchdev_obj_port_vlan *vlan,</div><div class='add'>+				   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct net_device *bridge = dsa_port_bridge_dev_get(dsa_to_port(ds, port));</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+	unsigned int max_ports = priv-&gt;hw_info-&gt;max_ports;</div><div class='add'>+	int pos = max_ports;</div><div class='add'>+	int i, idx = -1;</div><div class='add'>+</div><div class='add'>+	/* We only support VLAN filtering on bridges */</div><div class='add'>+	if (!dsa_is_cpu_port(ds, port) &amp;&amp; !bridge)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	/* Check if there is already a page for this VLAN */</div><div class='add'>+	for (i = max_ports; i &lt; ARRAY_SIZE(priv-&gt;vlans); i++) {</div><div class='add'>+		if (priv-&gt;vlans[i].bridge == bridge &amp;&amp;</div><div class='add'>+		    priv-&gt;vlans[i].vid == vlan-&gt;vid) {</div><div class='add'>+			idx = i;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* If this VLAN is not programmed yet, we have to reserve</div><div class='add'>+	 * one entry in the VLAN table. Make sure we start at the</div><div class='add'>+	 * next position round.</div><div class='add'>+	 */</div><div class='add'>+	if (idx == -1) {</div><div class='add'>+		/* Look for a free slot */</div><div class='add'>+		for (; pos &lt; ARRAY_SIZE(priv-&gt;vlans); pos++) {</div><div class='add'>+			if (!priv-&gt;vlans[pos].bridge) {</div><div class='add'>+				idx = pos;</div><div class='add'>+				pos++;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (idx == -1) {</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack, "No slot in VLAN table");</div><div class='add'>+			return -ENOSPC;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_port_vlan_add(struct dsa_switch *ds, int port,</div><div class='add'>+			       const struct switchdev_obj_port_vlan *vlan,</div><div class='add'>+			       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct net_device *bridge = dsa_port_bridge_dev_get(dsa_to_port(ds, port));</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+	bool untagged = vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_UNTAGGED;</div><div class='add'>+	bool pvid = vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_PVID;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (vlan-&gt;vid == GSWIP_VLAN_UNAWARE_PVID)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	err = gswip_port_vlan_prepare(ds, port, vlan, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* We have to receive all packets on the CPU port and should not</div><div class='add'>+	 * do any VLAN filtering here. This is also called with bridge</div><div class='add'>+	 * NULL and then we do not know for which bridge to configure</div><div class='add'>+	 * this.</div><div class='add'>+	 */</div><div class='add'>+	if (dsa_is_cpu_port(ds, port))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return gswip_vlan_add(priv, bridge, port, vlan-&gt;vid, untagged, pvid,</div><div class='add'>+			      true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_port_vlan_del(struct dsa_switch *ds, int port,</div><div class='add'>+			       const struct switchdev_obj_port_vlan *vlan)</div><div class='add'>+{</div><div class='add'>+	struct net_device *bridge = dsa_port_bridge_dev_get(dsa_to_port(ds, port));</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (vlan-&gt;vid == GSWIP_VLAN_UNAWARE_PVID)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* We have to receive all packets on the CPU port and should not</div><div class='add'>+	 * do any VLAN filtering here. This is also called with bridge</div><div class='add'>+	 * NULL and then we do not know for which bridge to configure</div><div class='add'>+	 * this.</div><div class='add'>+	 */</div><div class='add'>+	if (dsa_is_cpu_port(ds, port))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return gswip_vlan_remove(priv, bridge, port, vlan-&gt;vid);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_port_fast_age(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+	struct gswip_pce_table_entry mac_bridge = {0,};</div><div class='add'>+	int i;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 2048; i++) {</div><div class='add'>+		mac_bridge.table = GSWIP_TABLE_MAC_BRIDGE;</div><div class='add'>+		mac_bridge.index = i;</div><div class='add'>+</div><div class='add'>+		err = gswip_pce_table_entry_read(priv, &amp;mac_bridge);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(priv-&gt;dev, "failed to read mac bridge: %d\n",</div><div class='add'>+				err);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!mac_bridge.valid)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (mac_bridge.val[1] &amp; GSWIP_TABLE_MAC_BRIDGE_VAL1_STATIC)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (port != FIELD_GET(GSWIP_TABLE_MAC_BRIDGE_VAL0_PORT,</div><div class='add'>+				      mac_bridge.val[0]))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		mac_bridge.valid = false;</div><div class='add'>+		err = gswip_pce_table_entry_write(priv, &amp;mac_bridge);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(priv-&gt;dev, "failed to write mac bridge: %d\n",</div><div class='add'>+				err);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_port_stp_state_set(struct dsa_switch *ds, int port, u8 state)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+	u32 stp_state;</div><div class='add'>+</div><div class='add'>+	switch (state) {</div><div class='add'>+	case BR_STATE_DISABLED:</div><div class='add'>+		regmap_clear_bits(priv-&gt;gswip, GSWIP_SDMA_PCTRLp(port),</div><div class='add'>+				  GSWIP_SDMA_PCTRL_EN);</div><div class='add'>+		return;</div><div class='add'>+	case BR_STATE_BLOCKING:</div><div class='add'>+	case BR_STATE_LISTENING:</div><div class='add'>+		stp_state = GSWIP_PCE_PCTRL_0_PSTATE_LISTEN;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_LEARNING:</div><div class='add'>+		stp_state = GSWIP_PCE_PCTRL_0_PSTATE_LEARNING;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_FORWARDING:</div><div class='add'>+		stp_state = GSWIP_PCE_PCTRL_0_PSTATE_FORWARDING;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(priv-&gt;dev, "invalid STP state: %d\n", state);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	regmap_set_bits(priv-&gt;gswip, GSWIP_SDMA_PCTRLp(port),</div><div class='add'>+			GSWIP_SDMA_PCTRL_EN);</div><div class='add'>+	regmap_write_bits(priv-&gt;gswip, GSWIP_PCE_PCTRL_0p(port),</div><div class='add'>+			  GSWIP_PCE_PCTRL_0_PSTATE_MASK,</div><div class='add'>+			  stp_state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_port_fdb(struct dsa_switch *ds, int port,</div><div class='add'>+			  struct net_device *bridge, const unsigned char *addr,</div><div class='add'>+			  u16 vid, bool add)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+	struct gswip_pce_table_entry mac_bridge = {0,};</div><div class='add'>+	unsigned int max_ports = priv-&gt;hw_info-&gt;max_ports;</div><div class='add'>+	int fid = -1;</div><div class='add'>+	int i;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	for (i = max_ports; i &lt; ARRAY_SIZE(priv-&gt;vlans); i++) {</div><div class='add'>+		if (priv-&gt;vlans[i].bridge == bridge) {</div><div class='add'>+			fid = priv-&gt;vlans[i].fid;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (fid == -1) {</div><div class='add'>+		dev_err(priv-&gt;dev, "no FID found for bridge %s\n",</div><div class='add'>+			bridge-&gt;name);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mac_bridge.table = GSWIP_TABLE_MAC_BRIDGE;</div><div class='add'>+	mac_bridge.key_mode = true;</div><div class='add'>+	mac_bridge.key[0] = addr[5] | (addr[4] &lt;&lt; 8);</div><div class='add'>+	mac_bridge.key[1] = addr[3] | (addr[2] &lt;&lt; 8);</div><div class='add'>+	mac_bridge.key[2] = addr[1] | (addr[0] &lt;&lt; 8);</div><div class='add'>+	mac_bridge.key[3] = FIELD_PREP(GSWIP_TABLE_MAC_BRIDGE_KEY3_FID, fid);</div><div class='add'>+	mac_bridge.val[0] = add ? BIT(port) : 0; /* port map */</div><div class='add'>+	if (GSWIP_VERSION_GE(priv, GSWIP_VERSION_2_2_ETC))</div><div class='add'>+		mac_bridge.val[1] = add ? (GSWIP_TABLE_MAC_BRIDGE_VAL1_STATIC |</div><div class='add'>+					   GSWIP_TABLE_MAC_BRIDGE_VAL1_VALID) : 0;</div><div class='add'>+	else</div><div class='add'>+		mac_bridge.val[1] = GSWIP_TABLE_MAC_BRIDGE_VAL1_STATIC;</div><div class='add'>+</div><div class='add'>+	mac_bridge.valid = add;</div><div class='add'>+</div><div class='add'>+	err = gswip_pce_table_entry_write(priv, &amp;mac_bridge);</div><div class='add'>+	if (err)</div><div class='add'>+		dev_err(priv-&gt;dev, "failed to write mac bridge: %d\n", err);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_port_fdb_add(struct dsa_switch *ds, int port,</div><div class='add'>+			      const unsigned char *addr, u16 vid,</div><div class='add'>+			      struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	if (db.type != DSA_DB_BRIDGE)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return gswip_port_fdb(ds, port, db.bridge.dev, addr, vid, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_port_fdb_del(struct dsa_switch *ds, int port,</div><div class='add'>+			      const unsigned char *addr, u16 vid,</div><div class='add'>+			      struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	if (db.type != DSA_DB_BRIDGE)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return gswip_port_fdb(ds, port, db.bridge.dev, addr, vid, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_port_fdb_dump(struct dsa_switch *ds, int port,</div><div class='add'>+			       dsa_fdb_dump_cb_t *cb, void *data)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+	struct gswip_pce_table_entry mac_bridge = {0,};</div><div class='add'>+	unsigned char addr[ETH_ALEN];</div><div class='add'>+	int i;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 2048; i++) {</div><div class='add'>+		mac_bridge.table = GSWIP_TABLE_MAC_BRIDGE;</div><div class='add'>+		mac_bridge.index = i;</div><div class='add'>+</div><div class='add'>+		err = gswip_pce_table_entry_read(priv, &amp;mac_bridge);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(priv-&gt;dev,</div><div class='add'>+				"failed to read mac bridge entry %d: %d\n",</div><div class='add'>+				i, err);</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!mac_bridge.valid)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		addr[5] = mac_bridge.key[0] &amp; 0xff;</div><div class='add'>+		addr[4] = (mac_bridge.key[0] &gt;&gt; 8) &amp; 0xff;</div><div class='add'>+		addr[3] = mac_bridge.key[1] &amp; 0xff;</div><div class='add'>+		addr[2] = (mac_bridge.key[1] &gt;&gt; 8) &amp; 0xff;</div><div class='add'>+		addr[1] = mac_bridge.key[2] &amp; 0xff;</div><div class='add'>+		addr[0] = (mac_bridge.key[2] &gt;&gt; 8) &amp; 0xff;</div><div class='add'>+		if (mac_bridge.val[1] &amp; GSWIP_TABLE_MAC_BRIDGE_VAL1_STATIC) {</div><div class='add'>+			if (mac_bridge.val[0] &amp; BIT(port)) {</div><div class='add'>+				err = cb(addr, 0, true, data);</div><div class='add'>+				if (err)</div><div class='add'>+					return err;</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			if (port == FIELD_GET(GSWIP_TABLE_MAC_BRIDGE_VAL0_PORT,</div><div class='add'>+					      mac_bridge.val[0])) {</div><div class='add'>+				err = cb(addr, 0, false, data);</div><div class='add'>+				if (err)</div><div class='add'>+					return err;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_port_max_mtu(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	/* Includes 8 bytes for special header. */</div><div class='add'>+	return GSWIP_MAX_PACKET_LENGTH - VLAN_ETH_HLEN - ETH_FCS_LEN;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	/* CPU port always has maximum mtu of user ports, so use it to set</div><div class='add'>+	 * switch frame size, including 8 byte special header.</div><div class='add'>+	 */</div><div class='add'>+	if (dsa_is_cpu_port(ds, port)) {</div><div class='add'>+		new_mtu += 8;</div><div class='add'>+		regmap_write(priv-&gt;gswip, GSWIP_MAC_FLEN,</div><div class='add'>+			     VLAN_ETH_HLEN + new_mtu + ETH_FCS_LEN);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Enable MLEN for ports with non-standard MTUs, including the special</div><div class='add'>+	 * header on the CPU port added above.</div><div class='add'>+	 */</div><div class='add'>+	if (new_mtu != ETH_DATA_LEN)</div><div class='add'>+		regmap_set_bits(priv-&gt;gswip, GSWIP_MAC_CTRL_2p(port),</div><div class='add'>+				GSWIP_MAC_CTRL_2_MLEN);</div><div class='add'>+	else</div><div class='add'>+		regmap_clear_bits(priv-&gt;gswip, GSWIP_MAC_CTRL_2p(port),</div><div class='add'>+				  GSWIP_MAC_CTRL_2_MLEN);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_phylink_get_caps(struct dsa_switch *ds, int port,</div><div class='add'>+				   struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	priv-&gt;hw_info-&gt;phylink_get_caps(ds, port, config);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_port_set_link(struct gswip_priv *priv, int port, bool link)</div><div class='add'>+{</div><div class='add'>+	u32 mdio_phy;</div><div class='add'>+</div><div class='add'>+	if (link)</div><div class='add'>+		mdio_phy = GSWIP_MDIO_PHY_LINK_UP;</div><div class='add'>+	else</div><div class='add'>+		mdio_phy = GSWIP_MDIO_PHY_LINK_DOWN;</div><div class='add'>+</div><div class='add'>+	regmap_write_bits(priv-&gt;mdio, GSWIP_MDIO_PHYp(port),</div><div class='add'>+			  GSWIP_MDIO_PHY_LINK_MASK, mdio_phy);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_port_set_speed(struct gswip_priv *priv, int port, int speed,</div><div class='add'>+				 phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	u32 mdio_phy = 0, mii_cfg = 0, mac_ctrl_0 = 0;</div><div class='add'>+</div><div class='add'>+	switch (speed) {</div><div class='add'>+	case SPEED_10:</div><div class='add'>+		mdio_phy = GSWIP_MDIO_PHY_SPEED_M10;</div><div class='add'>+</div><div class='add'>+		if (interface == PHY_INTERFACE_MODE_RMII)</div><div class='add'>+			mii_cfg = GSWIP_MII_CFG_RATE_M50;</div><div class='add'>+		else</div><div class='add'>+			mii_cfg = GSWIP_MII_CFG_RATE_M2P5;</div><div class='add'>+</div><div class='add'>+		mac_ctrl_0 = GSWIP_MAC_CTRL_0_GMII_MII;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SPEED_100:</div><div class='add'>+		mdio_phy = GSWIP_MDIO_PHY_SPEED_M100;</div><div class='add'>+</div><div class='add'>+		if (interface == PHY_INTERFACE_MODE_RMII)</div><div class='add'>+			mii_cfg = GSWIP_MII_CFG_RATE_M50;</div><div class='add'>+		else</div><div class='add'>+			mii_cfg = GSWIP_MII_CFG_RATE_M25;</div><div class='add'>+</div><div class='add'>+		mac_ctrl_0 = GSWIP_MAC_CTRL_0_GMII_MII;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SPEED_1000:</div><div class='add'>+		mdio_phy = GSWIP_MDIO_PHY_SPEED_G1;</div><div class='add'>+</div><div class='add'>+		mii_cfg = GSWIP_MII_CFG_RATE_M125;</div><div class='add'>+</div><div class='add'>+		mac_ctrl_0 = GSWIP_MAC_CTRL_0_GMII_RGMII;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	regmap_write_bits(priv-&gt;mdio, GSWIP_MDIO_PHYp(port),</div><div class='add'>+			  GSWIP_MDIO_PHY_SPEED_MASK, mdio_phy);</div><div class='add'>+	gswip_mii_mask_cfg(priv, GSWIP_MII_CFG_RATE_MASK, mii_cfg, port);</div><div class='add'>+	regmap_write_bits(priv-&gt;gswip, GSWIP_MAC_CTRL_0p(port),</div><div class='add'>+			  GSWIP_MAC_CTRL_0_GMII_MASK, mac_ctrl_0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_port_set_duplex(struct gswip_priv *priv, int port, int duplex)</div><div class='add'>+{</div><div class='add'>+	u32 mac_ctrl_0, mdio_phy;</div><div class='add'>+</div><div class='add'>+	if (duplex == DUPLEX_FULL) {</div><div class='add'>+		mac_ctrl_0 = GSWIP_MAC_CTRL_0_FDUP_EN;</div><div class='add'>+		mdio_phy = GSWIP_MDIO_PHY_FDUP_EN;</div><div class='add'>+	} else {</div><div class='add'>+		mac_ctrl_0 = GSWIP_MAC_CTRL_0_FDUP_DIS;</div><div class='add'>+		mdio_phy = GSWIP_MDIO_PHY_FDUP_DIS;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	regmap_write_bits(priv-&gt;gswip, GSWIP_MAC_CTRL_0p(port),</div><div class='add'>+			  GSWIP_MAC_CTRL_0_FDUP_MASK, mac_ctrl_0);</div><div class='add'>+	regmap_write_bits(priv-&gt;mdio, GSWIP_MDIO_PHYp(port),</div><div class='add'>+			  GSWIP_MDIO_PHY_FDUP_MASK, mdio_phy);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_port_set_pause(struct gswip_priv *priv, int port,</div><div class='add'>+				 bool tx_pause, bool rx_pause)</div><div class='add'>+{</div><div class='add'>+	u32 mac_ctrl_0, mdio_phy;</div><div class='add'>+</div><div class='add'>+	if (tx_pause &amp;&amp; rx_pause) {</div><div class='add'>+		mac_ctrl_0 = GSWIP_MAC_CTRL_0_FCON_RXTX;</div><div class='add'>+		mdio_phy = GSWIP_MDIO_PHY_FCONTX_EN |</div><div class='add'>+			   GSWIP_MDIO_PHY_FCONRX_EN;</div><div class='add'>+	} else if (tx_pause) {</div><div class='add'>+		mac_ctrl_0 = GSWIP_MAC_CTRL_0_FCON_TX;</div><div class='add'>+		mdio_phy = GSWIP_MDIO_PHY_FCONTX_EN |</div><div class='add'>+			   GSWIP_MDIO_PHY_FCONRX_DIS;</div><div class='add'>+	} else if (rx_pause) {</div><div class='add'>+		mac_ctrl_0 = GSWIP_MAC_CTRL_0_FCON_RX;</div><div class='add'>+		mdio_phy = GSWIP_MDIO_PHY_FCONTX_DIS |</div><div class='add'>+			   GSWIP_MDIO_PHY_FCONRX_EN;</div><div class='add'>+	} else {</div><div class='add'>+		mac_ctrl_0 = GSWIP_MAC_CTRL_0_FCON_NONE;</div><div class='add'>+		mdio_phy = GSWIP_MDIO_PHY_FCONTX_DIS |</div><div class='add'>+			   GSWIP_MDIO_PHY_FCONRX_DIS;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	regmap_write_bits(priv-&gt;gswip, GSWIP_MAC_CTRL_0p(port),</div><div class='add'>+			  GSWIP_MAC_CTRL_0_FCON_MASK, mac_ctrl_0);</div><div class='add'>+	regmap_write_bits(priv-&gt;mdio, GSWIP_MDIO_PHYp(port),</div><div class='add'>+			  GSWIP_MDIO_PHY_FCONTX_MASK | GSWIP_MDIO_PHY_FCONRX_MASK,</div><div class='add'>+			  mdio_phy);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_phylink_mac_config(struct phylink_config *config,</div><div class='add'>+				     unsigned int mode,</div><div class='add'>+				     const struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct gswip_priv *priv = dp-&gt;ds-&gt;priv;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+	u32 miicfg = 0;</div><div class='add'>+</div><div class='add'>+	miicfg |= GSWIP_MII_CFG_LDCLKDIS;</div><div class='add'>+</div><div class='add'>+	switch (state-&gt;interface) {</div><div class='add'>+	case PHY_INTERFACE_MODE_SGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_1000BASEX:</div><div class='add'>+	case PHY_INTERFACE_MODE_2500BASEX:</div><div class='add'>+		return;</div><div class='add'>+	case PHY_INTERFACE_MODE_MII:</div><div class='add'>+	case PHY_INTERFACE_MODE_INTERNAL:</div><div class='add'>+		miicfg |= GSWIP_MII_CFG_MODE_MIIM;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_REVMII:</div><div class='add'>+		miicfg |= GSWIP_MII_CFG_MODE_MIIP;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_RMII:</div><div class='add'>+		miicfg |= GSWIP_MII_CFG_MODE_RMIIM;</div><div class='add'>+		if (of_property_read_bool(dp-&gt;dn, "maxlinear,rmii-refclk-out"))</div><div class='add'>+			miicfg |= GSWIP_MII_CFG_RMII_CLK;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='add'>+		miicfg |= GSWIP_MII_CFG_MODE_RGMII;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_GMII:</div><div class='add'>+		miicfg |= GSWIP_MII_CFG_MODE_GMII;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(dp-&gt;ds-&gt;dev,</div><div class='add'>+			"Unsupported interface: %d\n", state-&gt;interface);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	gswip_mii_mask_cfg(priv,</div><div class='add'>+			   GSWIP_MII_CFG_MODE_MASK | GSWIP_MII_CFG_RMII_CLK |</div><div class='add'>+			   GSWIP_MII_CFG_RGMII_IBS | GSWIP_MII_CFG_LDCLKDIS,</div><div class='add'>+			   miicfg, port);</div><div class='add'>+</div><div class='add'>+	gswip_mii_delay_setup(priv, dp, state-&gt;interface);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_phylink_mac_link_down(struct phylink_config *config,</div><div class='add'>+					unsigned int mode,</div><div class='add'>+					phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct gswip_priv *priv = dp-&gt;ds-&gt;priv;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+</div><div class='add'>+	gswip_mii_mask_cfg(priv, GSWIP_MII_CFG_EN, 0, port);</div><div class='add'>+</div><div class='add'>+	if (!dsa_port_is_cpu(dp))</div><div class='add'>+		gswip_port_set_link(priv, port, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_phylink_mac_link_up(struct phylink_config *config,</div><div class='add'>+				      struct phy_device *phydev,</div><div class='add'>+				      unsigned int mode,</div><div class='add'>+				      phy_interface_t interface,</div><div class='add'>+				      int speed, int duplex,</div><div class='add'>+				      bool tx_pause, bool rx_pause)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct gswip_priv *priv = dp-&gt;ds-&gt;priv;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+</div><div class='add'>+	if (!dsa_port_is_cpu(dp) || interface != PHY_INTERFACE_MODE_INTERNAL) {</div><div class='add'>+		gswip_port_set_link(priv, port, true);</div><div class='add'>+		gswip_port_set_speed(priv, port, speed, interface);</div><div class='add'>+		gswip_port_set_duplex(priv, port, duplex);</div><div class='add'>+		gswip_port_set_pause(priv, port, tx_pause, rx_pause);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	gswip_mii_mask_cfg(priv, GSWIP_MII_CFG_EN, GSWIP_MII_CFG_EN, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_get_strings(struct dsa_switch *ds, int port, u32 stringset,</div><div class='add'>+			      uint8_t *data)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (stringset != ETH_SS_STATS)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(gswip_rmon_cnt); i++)</div><div class='add'>+		ethtool_puts(&amp;data, gswip_rmon_cnt[i].name);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 gswip_bcm_ram_entry_read(struct gswip_priv *priv, u32 table,</div><div class='add'>+				    u32 index)</div><div class='add'>+{</div><div class='add'>+	u32 result, val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	regmap_write(priv-&gt;gswip, GSWIP_BM_RAM_ADDR, index);</div><div class='add'>+	regmap_write_bits(priv-&gt;gswip, GSWIP_BM_RAM_CTRL,</div><div class='add'>+			  GSWIP_BM_RAM_CTRL_ADDR_MASK | GSWIP_BM_RAM_CTRL_OPMOD |</div><div class='add'>+			  GSWIP_BM_RAM_CTRL_BAS,</div><div class='add'>+			  table | GSWIP_BM_RAM_CTRL_BAS);</div><div class='add'>+</div><div class='add'>+	err = gswip_switch_r_timeout(priv, GSWIP_BM_RAM_CTRL,</div><div class='add'>+				     GSWIP_BM_RAM_CTRL_BAS);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(priv-&gt;dev, "timeout while reading table: %u, index: %u\n",</div><div class='add'>+			table, index);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	regmap_read(priv-&gt;gswip, GSWIP_BM_RAM_VAL(0), &amp;result);</div><div class='add'>+	regmap_read(priv-&gt;gswip, GSWIP_BM_RAM_VAL(1), &amp;val);</div><div class='add'>+	result |= val &lt;&lt; 16;</div><div class='add'>+</div><div class='add'>+	return result;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_get_ethtool_stats(struct dsa_switch *ds, int port,</div><div class='add'>+				    uint64_t *data)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+	const struct gswip_rmon_cnt_desc *rmon_cnt;</div><div class='add'>+	int i;</div><div class='add'>+	u64 high;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(gswip_rmon_cnt); i++) {</div><div class='add'>+		rmon_cnt = &amp;gswip_rmon_cnt[i];</div><div class='add'>+</div><div class='add'>+		data[i] = gswip_bcm_ram_entry_read(priv, port,</div><div class='add'>+						   rmon_cnt-&gt;offset);</div><div class='add'>+		if (rmon_cnt-&gt;size == 2) {</div><div class='add'>+			high = gswip_bcm_ram_entry_read(priv, port,</div><div class='add'>+							rmon_cnt-&gt;offset + 1);</div><div class='add'>+			data[i] |= high &lt;&lt; 32;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_get_sset_count(struct dsa_switch *ds, int port, int sset)</div><div class='add'>+{</div><div class='add'>+	if (sset != ETH_SS_STATS)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return ARRAY_SIZE(gswip_rmon_cnt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_set_mac_eee(struct dsa_switch *ds, int port,</div><div class='add'>+			     struct ethtool_keee *e)</div><div class='add'>+{</div><div class='add'>+	if (e-&gt;tx_lpi_timer &gt; 0x7f)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gswip_phylink_mac_disable_tx_lpi(struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct gswip_priv *priv = dp-&gt;ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	regmap_clear_bits(priv-&gt;gswip, GSWIP_MAC_CTRL_4p(dp-&gt;index),</div><div class='add'>+			  GSWIP_MAC_CTRL_4_LPIEN);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gswip_phylink_mac_enable_tx_lpi(struct phylink_config *config,</div><div class='add'>+					   u32 timer, bool tx_clock_stop)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct gswip_priv *priv = dp-&gt;ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return regmap_update_bits(priv-&gt;gswip, GSWIP_MAC_CTRL_4p(dp-&gt;index),</div><div class='add'>+				  GSWIP_MAC_CTRL_4_LPIEN |</div><div class='add'>+				  GSWIP_MAC_CTRL_4_GWAIT_MASK |</div><div class='add'>+				  GSWIP_MAC_CTRL_4_WAIT_MASK,</div><div class='add'>+				  GSWIP_MAC_CTRL_4_LPIEN |</div><div class='add'>+				  GSWIP_MAC_CTRL_4_GWAIT(timer) |</div><div class='add'>+				  GSWIP_MAC_CTRL_4_WAIT(timer));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool gswip_support_eee(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (GSWIP_VERSION_GE(priv, GSWIP_VERSION_2_2))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct phylink_pcs *gswip_phylink_mac_select_pcs(struct phylink_config *config,</div><div class='add'>+							phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct gswip_priv *priv = dp-&gt;ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;hw_info-&gt;mac_select_pcs)</div><div class='add'>+		return priv-&gt;hw_info-&gt;mac_select_pcs(config, interface);</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct phylink_mac_ops gswip_phylink_mac_ops = {</div><div class='add'>+	.mac_config		= gswip_phylink_mac_config,</div><div class='add'>+	.mac_link_down		= gswip_phylink_mac_link_down,</div><div class='add'>+	.mac_link_up		= gswip_phylink_mac_link_up,</div><div class='add'>+	.mac_disable_tx_lpi	= gswip_phylink_mac_disable_tx_lpi,</div><div class='add'>+	.mac_enable_tx_lpi	= gswip_phylink_mac_enable_tx_lpi,</div><div class='add'>+	.mac_select_pcs		= gswip_phylink_mac_select_pcs,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct dsa_switch_ops gswip_switch_ops = {</div><div class='add'>+	.get_tag_protocol	= gswip_get_tag_protocol,</div><div class='add'>+	.setup			= gswip_setup,</div><div class='add'>+	.port_setup		= gswip_port_setup,</div><div class='add'>+	.port_enable		= gswip_port_enable,</div><div class='add'>+	.port_disable		= gswip_port_disable,</div><div class='add'>+	.port_pre_bridge_flags	= gswip_port_pre_bridge_flags,</div><div class='add'>+	.port_bridge_flags	= gswip_port_bridge_flags,</div><div class='add'>+	.port_bridge_join	= gswip_port_bridge_join,</div><div class='add'>+	.port_bridge_leave	= gswip_port_bridge_leave,</div><div class='add'>+	.port_fast_age		= gswip_port_fast_age,</div><div class='add'>+	.port_vlan_filtering	= gswip_port_vlan_filtering,</div><div class='add'>+	.port_vlan_add		= gswip_port_vlan_add,</div><div class='add'>+	.port_vlan_del		= gswip_port_vlan_del,</div><div class='add'>+	.port_stp_state_set	= gswip_port_stp_state_set,</div><div class='add'>+	.port_fdb_add		= gswip_port_fdb_add,</div><div class='add'>+	.port_fdb_del		= gswip_port_fdb_del,</div><div class='add'>+	.port_fdb_dump		= gswip_port_fdb_dump,</div><div class='add'>+	.port_change_mtu	= gswip_port_change_mtu,</div><div class='add'>+	.port_max_mtu		= gswip_port_max_mtu,</div><div class='add'>+	.phylink_get_caps	= gswip_phylink_get_caps,</div><div class='add'>+	.get_strings		= gswip_get_strings,</div><div class='add'>+	.get_ethtool_stats	= gswip_get_ethtool_stats,</div><div class='add'>+	.get_sset_count		= gswip_get_sset_count,</div><div class='add'>+	.set_mac_eee		= gswip_set_mac_eee,</div><div class='add'>+	.support_eee		= gswip_support_eee,</div><div class='add'>+	.port_hsr_join		= dsa_port_simple_hsr_join,</div><div class='add'>+	.port_hsr_leave		= dsa_port_simple_hsr_leave,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void gswip_disable_switch(struct gswip_priv *priv)</div><div class='add'>+{</div><div class='add'>+	regmap_clear_bits(priv-&gt;mdio, GSWIP_MDIO_GLOB, GSWIP_MDIO_GLOB_ENABLE);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(gswip_disable_switch);</div><div class='add'>+</div><div class='add'>+static int gswip_validate_cpu_port(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+	struct dsa_port *cpu_dp;</div><div class='add'>+	int cpu_port = -1;</div><div class='add'>+</div><div class='add'>+	dsa_switch_for_each_cpu_port(cpu_dp, ds) {</div><div class='add'>+		if (cpu_port != -1)</div><div class='add'>+			return dev_err_probe(ds-&gt;dev, -EINVAL,</div><div class='add'>+					     "only a single CPU port is supported\n");</div><div class='add'>+</div><div class='add'>+		cpu_port = cpu_dp-&gt;index;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cpu_port == -1)</div><div class='add'>+		return dev_err_probe(ds-&gt;dev, -EINVAL, "no CPU port defined\n");</div><div class='add'>+</div><div class='add'>+	if (BIT(cpu_port) &amp; ~priv-&gt;hw_info-&gt;allowed_cpu_ports)</div><div class='add'>+		return dev_err_probe(ds-&gt;dev, -EINVAL,</div><div class='add'>+				     "unsupported CPU port defined\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int gswip_probe_common(struct gswip_priv *priv, u32 version)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;priv-&gt;pce_table_lock);</div><div class='add'>+</div><div class='add'>+	priv-&gt;ds = devm_kzalloc(priv-&gt;dev, sizeof(*priv-&gt;ds), GFP_KERNEL);</div><div class='add'>+	if (!priv-&gt;ds)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv-&gt;ds-&gt;dev = priv-&gt;dev;</div><div class='add'>+	priv-&gt;ds-&gt;num_ports = priv-&gt;hw_info-&gt;max_ports;</div><div class='add'>+	priv-&gt;ds-&gt;ops = &amp;gswip_switch_ops;</div><div class='add'>+	priv-&gt;ds-&gt;phylink_mac_ops = &amp;gswip_phylink_mac_ops;</div><div class='add'>+	priv-&gt;ds-&gt;priv = priv;</div><div class='add'>+</div><div class='add'>+	/* The hardware has the 'major/minor' version bytes in the wrong order</div><div class='add'>+	 * preventing numerical comparisons. Construct a 16-bit unsigned integer</div><div class='add'>+	 * having the REV field as most significant byte and the MOD field as</div><div class='add'>+	 * least significant byte. This is effectively swapping the two bytes of</div><div class='add'>+	 * the version variable, but other than using swab16 it doesn't affect</div><div class='add'>+	 * the source variable.</div><div class='add'>+	 */</div><div class='add'>+	priv-&gt;version = GSWIP_VERSION_REV(version) &lt;&lt; 8 |</div><div class='add'>+			GSWIP_VERSION_MOD(version);</div><div class='add'>+</div><div class='add'>+	err = dsa_register_switch(priv-&gt;ds);</div><div class='add'>+	if (err)</div><div class='add'>+		return dev_err_probe(priv-&gt;dev, err, "dsa switch registration failed\n");</div><div class='add'>+</div><div class='add'>+	err = gswip_validate_cpu_port(priv-&gt;ds);</div><div class='add'>+	if (err)</div><div class='add'>+		goto disable_switch;</div><div class='add'>+</div><div class='add'>+	dev_info(priv-&gt;dev, "probed GSWIP version %lx mod %lx\n",</div><div class='add'>+		 GSWIP_VERSION_REV(version), GSWIP_VERSION_MOD(version));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+disable_switch:</div><div class='add'>+	gswip_disable_switch(priv);</div><div class='add'>+	dsa_unregister_switch(priv-&gt;ds);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(gswip_probe_common);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Hauke Mehrtens &lt;hauke@hauke-m.de&gt;");</div><div class='add'>+MODULE_AUTHOR("Daniel Golle &lt;daniel@makrotopia.org&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Lantiq / Intel / MaxLinear GSWIP common functions");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/dsa/lantiq/lantiq_pce.h b/drivers/net/dsa/lantiq/lantiq_pce.h<br/>new file mode 100644<br/>index 000000000000..659f9a0638d9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/lantiq/lantiq_pce.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/lantiq/lantiq_pce.h</a></div><div class='hunk'>@@ -0,0 +1,148 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/*</div><div class='add'>+ * PCE microcode extracted from UGW 7.1.1 switch api</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2012, 2014, 2015 Lantiq Deutschland GmbH</div><div class='add'>+ * Copyright (C) 2012 John Crispin &lt;john@phrozen.org&gt;</div><div class='add'>+ * Copyright (C) 2017 - 2018 Hauke Mehrtens &lt;hauke@hauke-m.de&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "lantiq_gswip.h"</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	OUT_MAC0 = 0,</div><div class='add'>+	OUT_MAC1,</div><div class='add'>+	OUT_MAC2,</div><div class='add'>+	OUT_MAC3,</div><div class='add'>+	OUT_MAC4,</div><div class='add'>+	OUT_MAC5,</div><div class='add'>+	OUT_ETHTYP,</div><div class='add'>+	OUT_VTAG0,</div><div class='add'>+	OUT_VTAG1,</div><div class='add'>+	OUT_ITAG0,</div><div class='add'>+	OUT_ITAG1,	/*10 */</div><div class='add'>+	OUT_ITAG2,</div><div class='add'>+	OUT_ITAG3,</div><div class='add'>+	OUT_IP0,</div><div class='add'>+	OUT_IP1,</div><div class='add'>+	OUT_IP2,</div><div class='add'>+	OUT_IP3,</div><div class='add'>+	OUT_SIP0,</div><div class='add'>+	OUT_SIP1,</div><div class='add'>+	OUT_SIP2,</div><div class='add'>+	OUT_SIP3,	/*20*/</div><div class='add'>+	OUT_SIP4,</div><div class='add'>+	OUT_SIP5,</div><div class='add'>+	OUT_SIP6,</div><div class='add'>+	OUT_SIP7,</div><div class='add'>+	OUT_DIP0,</div><div class='add'>+	OUT_DIP1,</div><div class='add'>+	OUT_DIP2,</div><div class='add'>+	OUT_DIP3,</div><div class='add'>+	OUT_DIP4,</div><div class='add'>+	OUT_DIP5,	/*30*/</div><div class='add'>+	OUT_DIP6,</div><div class='add'>+	OUT_DIP7,</div><div class='add'>+	OUT_SESID,</div><div class='add'>+	OUT_PROT,</div><div class='add'>+	OUT_APP0,</div><div class='add'>+	OUT_APP1,</div><div class='add'>+	OUT_IGMP0,</div><div class='add'>+	OUT_IGMP1,</div><div class='add'>+	OUT_IPOFF,	/*39*/</div><div class='add'>+	OUT_NONE = 63,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* parser's microcode length type */</div><div class='add'>+#define INSTR		0</div><div class='add'>+#define IPV6		1</div><div class='add'>+#define LENACCU		2</div><div class='add'>+</div><div class='add'>+/* parser's microcode flag type */</div><div class='add'>+enum {</div><div class='add'>+	FLAG_ITAG = 0,</div><div class='add'>+	FLAG_VLAN,</div><div class='add'>+	FLAG_SNAP,</div><div class='add'>+	FLAG_PPPOE,</div><div class='add'>+	FLAG_IPV6,</div><div class='add'>+	FLAG_IPV6FL,</div><div class='add'>+	FLAG_IPV4,</div><div class='add'>+	FLAG_IGMP,</div><div class='add'>+	FLAG_TU,</div><div class='add'>+	FLAG_HOP,</div><div class='add'>+	FLAG_NN1,	/*10 */</div><div class='add'>+	FLAG_NN2,</div><div class='add'>+	FLAG_END,</div><div class='add'>+	FLAG_NO,	/*13*/</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define MC_ENTRY(val, msk, ns, out, len, type, flags, ipv4_len) \</div><div class='add'>+	{ val, msk, ((ns) &lt;&lt; 10 | (out) &lt;&lt; 4 | (len) &gt;&gt; 1),\</div><div class='add'>+		((len) &amp; 1) &lt;&lt; 15 | (type) &lt;&lt; 13 | (flags) &lt;&lt; 9 | (ipv4_len) &lt;&lt; 8 }</div><div class='add'>+static const struct gswip_pce_microcode gswip_pce_microcode[] = {</div><div class='add'>+	/*      value    mask    ns  fields      L  type     flags       ipv4_len */</div><div class='add'>+	MC_ENTRY(0x88c3, 0xFFFF,  1, OUT_ITAG0,  4, INSTR,   FLAG_ITAG,  0),</div><div class='add'>+	MC_ENTRY(0x8100, 0xFFFF,  2, OUT_VTAG0,  2, INSTR,   FLAG_VLAN,  0),</div><div class='add'>+	MC_ENTRY(0x88A8, 0xFFFF,  1, OUT_VTAG0,  2, INSTR,   FLAG_VLAN,  0),</div><div class='add'>+	MC_ENTRY(0x8100, 0xFFFF,  1, OUT_VTAG0,  2, INSTR,   FLAG_VLAN,  0),</div><div class='add'>+	MC_ENTRY(0x8864, 0xFFFF, 17, OUT_ETHTYP, 1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	MC_ENTRY(0x0800, 0xFFFF, 21, OUT_ETHTYP, 1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	MC_ENTRY(0x86DD, 0xFFFF, 22, OUT_ETHTYP, 1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	MC_ENTRY(0x8863, 0xFFFF, 16, OUT_ETHTYP, 1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	MC_ENTRY(0x0000, 0xF800, 10, OUT_NONE,   0, INSTR,   FLAG_NO,    0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 40, OUT_ETHTYP, 1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	MC_ENTRY(0x0600, 0x0600, 40, OUT_ETHTYP, 1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 12, OUT_NONE,   1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	MC_ENTRY(0xAAAA, 0xFFFF, 14, OUT_NONE,   1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 41, OUT_NONE,   0, INSTR,   FLAG_NO,    0),</div><div class='add'>+	MC_ENTRY(0x0300, 0xFF00, 41, OUT_NONE,   0, INSTR,   FLAG_SNAP,  0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 41, OUT_NONE,   0, INSTR,   FLAG_NO,    0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 41, OUT_DIP7,   3, INSTR,   FLAG_NO,    0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 18, OUT_DIP7,   3, INSTR,   FLAG_PPPOE, 0),</div><div class='add'>+	MC_ENTRY(0x0021, 0xFFFF, 21, OUT_NONE,   1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	MC_ENTRY(0x0057, 0xFFFF, 22, OUT_NONE,   1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 40, OUT_NONE,   0, INSTR,   FLAG_NO,    0),</div><div class='add'>+	MC_ENTRY(0x4000, 0xF000, 24, OUT_IP0,    4, INSTR,   FLAG_IPV4,  1),</div><div class='add'>+	MC_ENTRY(0x6000, 0xF000, 27, OUT_IP0,    3, INSTR,   FLAG_IPV6,  0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 41, OUT_NONE,   0, INSTR,   FLAG_NO,    0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 25, OUT_IP3,    2, INSTR,   FLAG_NO,    0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 26, OUT_SIP0,   4, INSTR,   FLAG_NO,    0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 40, OUT_NONE,   0, LENACCU, FLAG_NO,    0),</div><div class='add'>+	MC_ENTRY(0x1100, 0xFF00, 39, OUT_PROT,   1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	MC_ENTRY(0x0600, 0xFF00, 39, OUT_PROT,   1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	MC_ENTRY(0x0000, 0xFF00, 33, OUT_IP3,   17, INSTR,   FLAG_HOP,   0),</div><div class='add'>+	MC_ENTRY(0x2B00, 0xFF00, 33, OUT_IP3,   17, INSTR,   FLAG_NN1,   0),</div><div class='add'>+	MC_ENTRY(0x3C00, 0xFF00, 33, OUT_IP3,   17, INSTR,   FLAG_NN2,   0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 39, OUT_PROT,   1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x00E0, 35, OUT_NONE,   0, INSTR,   FLAG_NO,    0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 40, OUT_NONE,   0, INSTR,   FLAG_NO,    0),</div><div class='add'>+	MC_ENTRY(0x0000, 0xFF00, 33, OUT_NONE,   0, IPV6,    FLAG_HOP,   0),</div><div class='add'>+	MC_ENTRY(0x2B00, 0xFF00, 33, OUT_NONE,   0, IPV6,    FLAG_NN1,   0),</div><div class='add'>+	MC_ENTRY(0x3C00, 0xFF00, 33, OUT_NONE,   0, IPV6,    FLAG_NN2,   0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 40, OUT_PROT,   1, IPV6,    FLAG_NO,    0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 40, OUT_SIP0,  16, INSTR,   FLAG_NO,    0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 41, OUT_APP0,   4, INSTR,   FLAG_IGMP,  0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 41, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 41, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 41, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 41, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 41, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 41, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 41, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 41, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 41, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 41, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 41, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 41, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 41, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 41, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 41, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 41, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 41, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 41, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 41, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 41, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 41, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 41, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	MC_ENTRY(0x0000, 0x0000, 41, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/net/dsa/lantiq/mxl-gsw1xx.c b/drivers/net/dsa/lantiq/mxl-gsw1xx.c<br/>new file mode 100644<br/>index 000000000000..0816c61a47f1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/lantiq/mxl-gsw1xx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/lantiq/mxl-gsw1xx.c</a></div><div class='hunk'>@@ -0,0 +1,733 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/* DSA Driver for MaxLinear GSW1xx switch devices</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Daniel Golle &lt;daniel@makrotopia.org&gt;</div><div class='add'>+ * Copyright (C) 2023 - 2024 MaxLinear Inc.</div><div class='add'>+ * Copyright (C) 2022 Snap One, LLC.  All rights reserved.</div><div class='add'>+ * Copyright (C) 2017 - 2019 Hauke Mehrtens &lt;hauke@hauke-m.de&gt;</div><div class='add'>+ * Copyright (C) 2012 John Crispin &lt;john@phrozen.org&gt;</div><div class='add'>+ * Copyright (C) 2010 Lantiq Deutschland</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bits.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of_device.h&gt;</div><div class='add'>+#include &lt;linux/of_mdio.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+</div><div class='add'>+#include "lantiq_gswip.h"</div><div class='add'>+#include "mxl-gsw1xx.h"</div><div class='add'>+#include "mxl-gsw1xx_pce.h"</div><div class='add'>+</div><div class='add'>+struct gsw1xx_priv {</div><div class='add'>+	struct mdio_device	*mdio_dev;</div><div class='add'>+	int			smdio_badr;</div><div class='add'>+	struct			regmap *sgmii;</div><div class='add'>+	struct			regmap *gpio;</div><div class='add'>+	struct			regmap *clk;</div><div class='add'>+	struct			regmap *shell;</div><div class='add'>+	struct			phylink_pcs pcs;</div><div class='add'>+	phy_interface_t		tbi_interface;</div><div class='add'>+	struct gswip_priv	gswip;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int gsw1xx_config_smdio_badr(struct gsw1xx_priv *priv,</div><div class='add'>+				    unsigned int reg)</div><div class='add'>+{</div><div class='add'>+	struct mii_bus *bus = priv-&gt;mdio_dev-&gt;bus;</div><div class='add'>+	int sw_addr = priv-&gt;mdio_dev-&gt;addr;</div><div class='add'>+	int smdio_badr = priv-&gt;smdio_badr;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	if (smdio_badr == GSW1XX_SMDIO_BADR_UNKNOWN ||</div><div class='add'>+	    reg - smdio_badr &gt;= GSW1XX_SMDIO_BADR ||</div><div class='add'>+	    smdio_badr &gt; reg) {</div><div class='add'>+		/* Configure the Switch Base Address */</div><div class='add'>+		smdio_badr = reg &amp; ~GENMASK(3, 0);</div><div class='add'>+		res = __mdiobus_write(bus, sw_addr, GSW1XX_SMDIO_BADR, smdio_badr);</div><div class='add'>+		if (res &lt; 0) {</div><div class='add'>+			dev_err(&amp;priv-&gt;mdio_dev-&gt;dev,</div><div class='add'>+				"%s: Error %d, configuring switch base\n",</div><div class='add'>+				__func__, res);</div><div class='add'>+			return res;</div><div class='add'>+		}</div><div class='add'>+		priv-&gt;smdio_badr = smdio_badr;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return smdio_badr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gsw1xx_regmap_read(void *context, unsigned int reg,</div><div class='add'>+			      unsigned int *val)</div><div class='add'>+{</div><div class='add'>+	struct gsw1xx_priv *priv = context;</div><div class='add'>+	struct mii_bus *bus = priv-&gt;mdio_dev-&gt;bus;</div><div class='add'>+	int sw_addr = priv-&gt;mdio_dev-&gt;addr;</div><div class='add'>+	int smdio_badr;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	smdio_badr = gsw1xx_config_smdio_badr(priv, reg);</div><div class='add'>+	if (smdio_badr &lt; 0)</div><div class='add'>+		return smdio_badr;</div><div class='add'>+</div><div class='add'>+	res = __mdiobus_read(bus, sw_addr, reg - smdio_badr);</div><div class='add'>+	if (res &lt; 0) {</div><div class='add'>+		dev_err(&amp;priv-&gt;mdio_dev-&gt;dev, "%s: Error %d reading 0x%x\n",</div><div class='add'>+			__func__, res, reg);</div><div class='add'>+		return res;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*val = res;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gsw1xx_regmap_write(void *context, unsigned int reg,</div><div class='add'>+			       unsigned int val)</div><div class='add'>+{</div><div class='add'>+	struct gsw1xx_priv *priv = context;</div><div class='add'>+	struct mii_bus *bus = priv-&gt;mdio_dev-&gt;bus;</div><div class='add'>+	int sw_addr = priv-&gt;mdio_dev-&gt;addr;</div><div class='add'>+	int smdio_badr;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	smdio_badr = gsw1xx_config_smdio_badr(priv, reg);</div><div class='add'>+	if (smdio_badr &lt; 0)</div><div class='add'>+		return smdio_badr;</div><div class='add'>+</div><div class='add'>+	res = __mdiobus_write(bus, sw_addr, reg - smdio_badr, val);</div><div class='add'>+	if (res &lt; 0)</div><div class='add'>+		dev_err(&amp;priv-&gt;mdio_dev-&gt;dev,</div><div class='add'>+			"%s: Error %d, writing 0x%x:0x%x\n", __func__, res, reg,</div><div class='add'>+			val);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct regmap_bus gsw1xx_regmap_bus = {</div><div class='add'>+	.reg_write = gsw1xx_regmap_write,</div><div class='add'>+	.reg_read = gsw1xx_regmap_read,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void gsw1xx_mdio_regmap_lock(void *mdio_lock)</div><div class='add'>+{</div><div class='add'>+	mutex_lock_nested(mdio_lock, MDIO_MUTEX_NESTED);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gsw1xx_mdio_regmap_unlock(void *mdio_lock)</div><div class='add'>+{</div><div class='add'>+	mutex_unlock(mdio_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int gsw1xx_pcs_inband_caps(struct phylink_pcs *pcs,</div><div class='add'>+					   phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	return LINK_INBAND_DISABLE | LINK_INBAND_ENABLE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct gsw1xx_priv *pcs_to_gsw1xx(struct phylink_pcs *pcs)</div><div class='add'>+{</div><div class='add'>+	return container_of(pcs, struct gsw1xx_priv, pcs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gsw1xx_pcs_enable(struct phylink_pcs *pcs)</div><div class='add'>+{</div><div class='add'>+	struct gsw1xx_priv *priv = pcs_to_gsw1xx(pcs);</div><div class='add'>+</div><div class='add'>+	/* Deassert SGMII shell reset */</div><div class='add'>+	return regmap_clear_bits(priv-&gt;shell, GSW1XX_SHELL_RST_REQ,</div><div class='add'>+				 GSW1XX_RST_REQ_SGMII_SHELL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gsw1xx_pcs_disable(struct phylink_pcs *pcs)</div><div class='add'>+{</div><div class='add'>+	struct gsw1xx_priv *priv = pcs_to_gsw1xx(pcs);</div><div class='add'>+</div><div class='add'>+	/* Assert SGMII shell reset */</div><div class='add'>+	regmap_set_bits(priv-&gt;shell, GSW1XX_SHELL_RST_REQ,</div><div class='add'>+			GSW1XX_RST_REQ_SGMII_SHELL);</div><div class='add'>+</div><div class='add'>+	priv-&gt;tbi_interface = PHY_INTERFACE_MODE_NA;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gsw1xx_pcs_get_state(struct phylink_pcs *pcs,</div><div class='add'>+				 unsigned int neg_mode,</div><div class='add'>+				 struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+	struct gsw1xx_priv *priv = pcs_to_gsw1xx(pcs);</div><div class='add'>+	int ret;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	ret = regmap_read(priv-&gt;sgmii, GSW1XX_SGMII_TBI_TBISTAT, &amp;val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	state-&gt;link = !!(val &amp; GSW1XX_SGMII_TBI_TBISTAT_LINK);</div><div class='add'>+	state-&gt;an_complete = !!(val &amp; GSW1XX_SGMII_TBI_TBISTAT_AN_COMPLETE);</div><div class='add'>+</div><div class='add'>+	ret = regmap_read(priv-&gt;sgmii, GSW1XX_SGMII_TBI_LPSTAT, &amp;val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	state-&gt;duplex = (val &amp; GSW1XX_SGMII_TBI_LPSTAT_DUPLEX) ?</div><div class='add'>+			 DUPLEX_FULL : DUPLEX_HALF;</div><div class='add'>+	if (val &amp; GSW1XX_SGMII_TBI_LPSTAT_PAUSE_RX)</div><div class='add'>+		state-&gt;pause |= MLO_PAUSE_RX;</div><div class='add'>+</div><div class='add'>+	if (val &amp; GSW1XX_SGMII_TBI_LPSTAT_PAUSE_TX)</div><div class='add'>+		state-&gt;pause |= MLO_PAUSE_TX;</div><div class='add'>+</div><div class='add'>+	switch (FIELD_GET(GSW1XX_SGMII_TBI_LPSTAT_SPEED, val)) {</div><div class='add'>+	case GSW1XX_SGMII_TBI_LPSTAT_SPEED_10:</div><div class='add'>+		state-&gt;speed = SPEED_10;</div><div class='add'>+		break;</div><div class='add'>+	case GSW1XX_SGMII_TBI_LPSTAT_SPEED_100:</div><div class='add'>+		state-&gt;speed = SPEED_100;</div><div class='add'>+		break;</div><div class='add'>+	case GSW1XX_SGMII_TBI_LPSTAT_SPEED_1000:</div><div class='add'>+		state-&gt;speed = SPEED_1000;</div><div class='add'>+		break;</div><div class='add'>+	case GSW1XX_SGMII_TBI_LPSTAT_SPEED_NOSGMII:</div><div class='add'>+		if (state-&gt;interface == PHY_INTERFACE_MODE_1000BASEX)</div><div class='add'>+			state-&gt;speed = SPEED_1000;</div><div class='add'>+		else if (state-&gt;interface == PHY_INTERFACE_MODE_2500BASEX)</div><div class='add'>+			state-&gt;speed = SPEED_2500;</div><div class='add'>+		else</div><div class='add'>+			state-&gt;speed = SPEED_UNKNOWN;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gsw1xx_pcs_phy_xaui_write(struct gsw1xx_priv *priv, u16 addr,</div><div class='add'>+				     u16 data)</div><div class='add'>+{</div><div class='add'>+	int ret, val;</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(priv-&gt;sgmii, GSW1XX_SGMII_PHY_D, data);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(priv-&gt;sgmii, GSW1XX_SGMII_PHY_A, addr);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(priv-&gt;sgmii, GSW1XX_SGMII_PHY_C,</div><div class='add'>+			   GSW1XX_SGMII_PHY_WRITE |</div><div class='add'>+			   GSW1XX_SGMII_PHY_RESET_N);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return regmap_read_poll_timeout(priv-&gt;sgmii, GSW1XX_SGMII_PHY_C,</div><div class='add'>+					val, val &amp; GSW1XX_SGMII_PHY_STATUS,</div><div class='add'>+					1000, 100000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gsw1xx_pcs_reset(struct gsw1xx_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u16 val;</div><div class='add'>+</div><div class='add'>+	/* Assert and deassert SGMII shell reset */</div><div class='add'>+	ret = regmap_set_bits(priv-&gt;shell, GSW1XX_SHELL_RST_REQ,</div><div class='add'>+			      GSW1XX_RST_REQ_SGMII_SHELL);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_clear_bits(priv-&gt;shell, GSW1XX_SHELL_RST_REQ,</div><div class='add'>+				GSW1XX_RST_REQ_SGMII_SHELL);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Hardware Bringup FSM Enable  */</div><div class='add'>+	ret = regmap_write(priv-&gt;sgmii, GSW1XX_SGMII_PHY_HWBU_CTRL,</div><div class='add'>+			   GSW1XX_SGMII_PHY_HWBU_CTRL_EN_HWBU_FSM |</div><div class='add'>+			   GSW1XX_SGMII_PHY_HWBU_CTRL_HW_FSM_EN);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Configure SGMII PHY Receiver */</div><div class='add'>+	val = FIELD_PREP(GSW1XX_SGMII_PHY_RX0_CFG2_EQ,</div><div class='add'>+			 GSW1XX_SGMII_PHY_RX0_CFG2_EQ_DEF) |</div><div class='add'>+	      GSW1XX_SGMII_PHY_RX0_CFG2_LOS_EN |</div><div class='add'>+	      GSW1XX_SGMII_PHY_RX0_CFG2_TERM_EN |</div><div class='add'>+	      FIELD_PREP(GSW1XX_SGMII_PHY_RX0_CFG2_FILT_CNT,</div><div class='add'>+			 GSW1XX_SGMII_PHY_RX0_CFG2_FILT_CNT_DEF);</div><div class='add'>+</div><div class='add'>+	/* TODO: Take care of inverted RX pair once generic property is</div><div class='add'>+	 *       available</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(priv-&gt;sgmii, GSW1XX_SGMII_PHY_RX0_CFG2, val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	val = FIELD_PREP(GSW1XX_SGMII_PHY_TX0_CFG3_VBOOST_LEVEL,</div><div class='add'>+			 GSW1XX_SGMII_PHY_TX0_CFG3_VBOOST_LEVEL_DEF);</div><div class='add'>+</div><div class='add'>+	/* TODO: Take care of inverted TX pair once generic property is</div><div class='add'>+	 *       available</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(priv-&gt;sgmii, GSW1XX_SGMII_PHY_TX0_CFG3, val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Reset and Release TBI */</div><div class='add'>+	val = GSW1XX_SGMII_TBI_TBICTL_INITTBI | GSW1XX_SGMII_TBI_TBICTL_ENTBI |</div><div class='add'>+	      GSW1XX_SGMII_TBI_TBICTL_CRSTRR | GSW1XX_SGMII_TBI_TBICTL_CRSOFF;</div><div class='add'>+	ret = regmap_write(priv-&gt;sgmii, GSW1XX_SGMII_TBI_TBICTL, val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	val &amp;= ~GSW1XX_SGMII_TBI_TBICTL_INITTBI;</div><div class='add'>+	ret = regmap_write(priv-&gt;sgmii, GSW1XX_SGMII_TBI_TBICTL, val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Release Tx Data Buffers */</div><div class='add'>+	ret = regmap_set_bits(priv-&gt;sgmii, GSW1XX_SGMII_PCS_TXB_CTL,</div><div class='add'>+			      GSW1XX_SGMII_PCS_TXB_CTL_INIT_TX_TXB);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	ret = regmap_clear_bits(priv-&gt;sgmii, GSW1XX_SGMII_PCS_TXB_CTL,</div><div class='add'>+				GSW1XX_SGMII_PCS_TXB_CTL_INIT_TX_TXB);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Release Rx Data Buffers */</div><div class='add'>+	ret = regmap_set_bits(priv-&gt;sgmii, GSW1XX_SGMII_PCS_RXB_CTL,</div><div class='add'>+			      GSW1XX_SGMII_PCS_RXB_CTL_INIT_RX_RXB);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	return regmap_clear_bits(priv-&gt;sgmii, GSW1XX_SGMII_PCS_RXB_CTL,</div><div class='add'>+				 GSW1XX_SGMII_PCS_RXB_CTL_INIT_RX_RXB);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gsw1xx_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode,</div><div class='add'>+			     phy_interface_t interface,</div><div class='add'>+			     const unsigned long *advertising,</div><div class='add'>+			     bool permit_pause_to_mac)</div><div class='add'>+{</div><div class='add'>+	struct gsw1xx_priv *priv = pcs_to_gsw1xx(pcs);</div><div class='add'>+	u16 txaneg, anegctl, nco_ctrl;</div><div class='add'>+	bool reconf = false;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	/* do not unnecessarily disrupt link and skip resetting the hardware in</div><div class='add'>+	 * case the PCS has previously been successfully configured for this</div><div class='add'>+	 * interface mode</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;tbi_interface == interface)</div><div class='add'>+		reconf = true;</div><div class='add'>+</div><div class='add'>+	/* mark PCS configuration as incomplete */</div><div class='add'>+	priv-&gt;tbi_interface = PHY_INTERFACE_MODE_NA;</div><div class='add'>+</div><div class='add'>+	if (!reconf)</div><div class='add'>+		ret = gsw1xx_pcs_reset(priv);</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* override bootstrap pin settings</div><div class='add'>+	 * OVRANEG sets ANEG Mode, Enable ANEG and restart ANEG to be</div><div class='add'>+	 * taken from bits ANMODE, ANEGEN, RANEG of the ANEGCTL register.</div><div class='add'>+	 * OVERABL sets ability bits in tx_config_reg to be taken from</div><div class='add'>+	 * the TXANEGH and TXANEGL registers.</div><div class='add'>+	 */</div><div class='add'>+	anegctl = GSW1XX_SGMII_TBI_ANEGCTL_OVRANEG |</div><div class='add'>+		  GSW1XX_SGMII_TBI_ANEGCTL_OVRABL;</div><div class='add'>+</div><div class='add'>+	switch (phylink_get_link_timer_ns(interface)) {</div><div class='add'>+	case 10000:</div><div class='add'>+		anegctl |= FIELD_PREP(GSW1XX_SGMII_TBI_ANEGCTL_LT,</div><div class='add'>+				      GSW1XX_SGMII_TBI_ANEGCTL_LT_10US);</div><div class='add'>+		break;</div><div class='add'>+	case 1600000:</div><div class='add'>+		anegctl |= FIELD_PREP(GSW1XX_SGMII_TBI_ANEGCTL_LT,</div><div class='add'>+				      GSW1XX_SGMII_TBI_ANEGCTL_LT_1_6MS);</div><div class='add'>+		break;</div><div class='add'>+	case 5000000:</div><div class='add'>+		anegctl |= FIELD_PREP(GSW1XX_SGMII_TBI_ANEGCTL_LT,</div><div class='add'>+				      GSW1XX_SGMII_TBI_ANEGCTL_LT_5MS);</div><div class='add'>+		break;</div><div class='add'>+	case 10000000:</div><div class='add'>+		anegctl |= FIELD_PREP(GSW1XX_SGMII_TBI_ANEGCTL_LT,</div><div class='add'>+				      GSW1XX_SGMII_TBI_ANEGCTL_LT_10MS);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (neg_mode &amp; PHYLINK_PCS_NEG_INBAND)</div><div class='add'>+		anegctl |= GSW1XX_SGMII_TBI_ANEGCTL_ANEGEN;</div><div class='add'>+</div><div class='add'>+	txaneg = phylink_mii_c22_pcs_encode_advertisement(interface, advertising);</div><div class='add'>+</div><div class='add'>+	if (interface == PHY_INTERFACE_MODE_SGMII) {</div><div class='add'>+		/* lacking a defined reverse-SGMII interface mode this</div><div class='add'>+		 * driver only supports SGMII (MAC side) for now</div><div class='add'>+		 */</div><div class='add'>+		anegctl |= FIELD_PREP(GSW1XX_SGMII_TBI_ANEGCTL_ANMODE,</div><div class='add'>+				      GSW1XX_SGMII_TBI_ANEGCTL_ANMODE_SGMII_MAC);</div><div class='add'>+		txaneg |= ADVERTISE_LPACK;</div><div class='add'>+	} else if (interface == PHY_INTERFACE_MODE_1000BASEX ||</div><div class='add'>+		   interface == PHY_INTERFACE_MODE_2500BASEX) {</div><div class='add'>+		anegctl |= FIELD_PREP(GSW1XX_SGMII_TBI_ANEGCTL_ANMODE,</div><div class='add'>+				      GSW1XX_SGMII_TBI_ANEGCTL_ANMODE_1000BASEX);</div><div class='add'>+	} else {</div><div class='add'>+		dev_err(priv-&gt;gswip.dev, "%s: wrong interface mode %s\n",</div><div class='add'>+			__func__, phy_modes(interface));</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(priv-&gt;sgmii, GSW1XX_SGMII_TBI_TXANEGH,</div><div class='add'>+			   FIELD_GET(GENMASK(15, 8), txaneg));</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	ret = regmap_write(priv-&gt;sgmii, GSW1XX_SGMII_TBI_TXANEGL,</div><div class='add'>+			   FIELD_GET(GENMASK(7, 0), txaneg));</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	ret = regmap_write(priv-&gt;sgmii, GSW1XX_SGMII_TBI_ANEGCTL, anegctl);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (!reconf) {</div><div class='add'>+		/* setup SerDes clock speed */</div><div class='add'>+		if (interface == PHY_INTERFACE_MODE_2500BASEX)</div><div class='add'>+			nco_ctrl = GSW1XX_SGMII_2G5 | GSW1XX_SGMII_2G5_NCO2;</div><div class='add'>+		else</div><div class='add'>+			nco_ctrl = GSW1XX_SGMII_1G | GSW1XX_SGMII_1G_NCO1;</div><div class='add'>+</div><div class='add'>+		ret = regmap_update_bits(priv-&gt;clk, GSW1XX_CLK_NCO_CTRL,</div><div class='add'>+					 GSW1XX_SGMII_HSP_MASK |</div><div class='add'>+					 GSW1XX_SGMII_SEL,</div><div class='add'>+					 nco_ctrl);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		ret = gsw1xx_pcs_phy_xaui_write(priv, 0x30, 0x80);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* PCS configuration has now been completed, store mode to prevent</div><div class='add'>+	 * disrupting the link in case of future calls of this function for the</div><div class='add'>+	 * same interface mode.</div><div class='add'>+	 */</div><div class='add'>+	priv-&gt;tbi_interface = interface;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gsw1xx_pcs_an_restart(struct phylink_pcs *pcs)</div><div class='add'>+{</div><div class='add'>+	struct gsw1xx_priv *priv = pcs_to_gsw1xx(pcs);</div><div class='add'>+</div><div class='add'>+	regmap_set_bits(priv-&gt;sgmii, GSW1XX_SGMII_TBI_ANEGCTL,</div><div class='add'>+			GSW1XX_SGMII_TBI_ANEGCTL_RANEG);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gsw1xx_pcs_link_up(struct phylink_pcs *pcs,</div><div class='add'>+			       unsigned int neg_mode,</div><div class='add'>+			       phy_interface_t interface, int speed,</div><div class='add'>+			       int duplex)</div><div class='add'>+{</div><div class='add'>+	struct gsw1xx_priv *priv = pcs_to_gsw1xx(pcs);</div><div class='add'>+	u16 lpstat;</div><div class='add'>+</div><div class='add'>+	/* When in-band AN is enabled hardware will set lpstat */</div><div class='add'>+	if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Force speed and duplex settings */</div><div class='add'>+	if (interface == PHY_INTERFACE_MODE_SGMII) {</div><div class='add'>+		if (speed == SPEED_10)</div><div class='add'>+			lpstat = FIELD_PREP(GSW1XX_SGMII_TBI_LPSTAT_SPEED,</div><div class='add'>+					    GSW1XX_SGMII_TBI_LPSTAT_SPEED_10);</div><div class='add'>+		else if (speed == SPEED_100)</div><div class='add'>+			lpstat = FIELD_PREP(GSW1XX_SGMII_TBI_LPSTAT_SPEED,</div><div class='add'>+					    GSW1XX_SGMII_TBI_LPSTAT_SPEED_100);</div><div class='add'>+		else</div><div class='add'>+			lpstat = FIELD_PREP(GSW1XX_SGMII_TBI_LPSTAT_SPEED,</div><div class='add'>+					    GSW1XX_SGMII_TBI_LPSTAT_SPEED_1000);</div><div class='add'>+	} else {</div><div class='add'>+		lpstat = FIELD_PREP(GSW1XX_SGMII_TBI_LPSTAT_SPEED,</div><div class='add'>+				    GSW1XX_SGMII_TBI_LPSTAT_SPEED_NOSGMII);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (duplex == DUPLEX_FULL)</div><div class='add'>+		lpstat |= GSW1XX_SGMII_TBI_LPSTAT_DUPLEX;</div><div class='add'>+</div><div class='add'>+	regmap_write(priv-&gt;sgmii, GSW1XX_SGMII_TBI_LPSTAT, lpstat);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct phylink_pcs_ops gsw1xx_pcs_ops = {</div><div class='add'>+	.pcs_inband_caps = gsw1xx_pcs_inband_caps,</div><div class='add'>+	.pcs_enable = gsw1xx_pcs_enable,</div><div class='add'>+	.pcs_disable = gsw1xx_pcs_disable,</div><div class='add'>+	.pcs_get_state = gsw1xx_pcs_get_state,</div><div class='add'>+	.pcs_config = gsw1xx_pcs_config,</div><div class='add'>+	.pcs_an_restart = gsw1xx_pcs_an_restart,</div><div class='add'>+	.pcs_link_up = gsw1xx_pcs_link_up,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void gsw1xx_phylink_get_caps(struct dsa_switch *ds, int port,</div><div class='add'>+				    struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	config-&gt;mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |</div><div class='add'>+				   MAC_10 | MAC_100 | MAC_1000;</div><div class='add'>+</div><div class='add'>+	switch (port) {</div><div class='add'>+	case 0:</div><div class='add'>+	case 1:</div><div class='add'>+	case 2:</div><div class='add'>+	case 3:</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_INTERNAL,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		break;</div><div class='add'>+	case 4: /* port 4: SGMII */</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_SGMII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_1000BASEX,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		if (priv-&gt;hw_info-&gt;supports_2500m) {</div><div class='add'>+			__set_bit(PHY_INTERFACE_MODE_2500BASEX,</div><div class='add'>+				  config-&gt;supported_interfaces);</div><div class='add'>+			config-&gt;mac_capabilities |= MAC_2500FD;</div><div class='add'>+		}</div><div class='add'>+		return; /* no support for EEE on SGMII port */</div><div class='add'>+	case 5: /* port 5: RGMII or RMII */</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_RMII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		phy_interface_set_rgmii(config-&gt;supported_interfaces);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	config-&gt;lpi_capabilities = MAC_100FD | MAC_1000FD;</div><div class='add'>+	config-&gt;lpi_timer_default = 20;</div><div class='add'>+	memcpy(config-&gt;lpi_interfaces, config-&gt;supported_interfaces,</div><div class='add'>+	       sizeof(config-&gt;lpi_interfaces));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct phylink_pcs *gsw1xx_phylink_mac_select_pcs(struct phylink_config *config,</div><div class='add'>+							 phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct gswip_priv *gswip_priv = dp-&gt;ds-&gt;priv;</div><div class='add'>+	struct gsw1xx_priv *gsw1xx_priv = container_of(gswip_priv,</div><div class='add'>+						       struct gsw1xx_priv,</div><div class='add'>+						       gswip);</div><div class='add'>+</div><div class='add'>+	switch (dp-&gt;index) {</div><div class='add'>+	case GSW1XX_SGMII_PORT:</div><div class='add'>+		return &amp;gsw1xx_priv-&gt;pcs;</div><div class='add'>+	default:</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct regmap *gsw1xx_regmap_init(struct gsw1xx_priv *priv,</div><div class='add'>+					 const char *name,</div><div class='add'>+					 unsigned int reg_base,</div><div class='add'>+					 unsigned int max_register)</div><div class='add'>+{</div><div class='add'>+	const struct regmap_config config = {</div><div class='add'>+		.name = name,</div><div class='add'>+		.reg_bits = 16,</div><div class='add'>+		.val_bits = 16,</div><div class='add'>+		.reg_base = reg_base,</div><div class='add'>+		.max_register = max_register,</div><div class='add'>+		.lock = gsw1xx_mdio_regmap_lock,</div><div class='add'>+		.unlock = gsw1xx_mdio_regmap_unlock,</div><div class='add'>+		.lock_arg = &amp;priv-&gt;mdio_dev-&gt;bus-&gt;mdio_lock,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return devm_regmap_init(&amp;priv-&gt;mdio_dev-&gt;dev, &amp;gsw1xx_regmap_bus,</div><div class='add'>+				priv, &amp;config);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int gsw1xx_probe(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;mdiodev-&gt;dev;</div><div class='add'>+	struct gsw1xx_priv *priv;</div><div class='add'>+	u32 version;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv-&gt;mdio_dev = mdiodev;</div><div class='add'>+	priv-&gt;smdio_badr = GSW1XX_SMDIO_BADR_UNKNOWN;</div><div class='add'>+</div><div class='add'>+	priv-&gt;gswip.dev = dev;</div><div class='add'>+	priv-&gt;gswip.hw_info = of_device_get_match_data(dev);</div><div class='add'>+	if (!priv-&gt;gswip.hw_info)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	priv-&gt;gswip.gswip = gsw1xx_regmap_init(priv, "switch",</div><div class='add'>+					       GSW1XX_SWITCH_BASE, 0xfff);</div><div class='add'>+	if (IS_ERR(priv-&gt;gswip.gswip))</div><div class='add'>+		return PTR_ERR(priv-&gt;gswip.gswip);</div><div class='add'>+</div><div class='add'>+	priv-&gt;gswip.mdio = gsw1xx_regmap_init(priv, "mdio", GSW1XX_MMDIO_BASE,</div><div class='add'>+					      0xff);</div><div class='add'>+	if (IS_ERR(priv-&gt;gswip.mdio))</div><div class='add'>+		return PTR_ERR(priv-&gt;gswip.mdio);</div><div class='add'>+</div><div class='add'>+	priv-&gt;gswip.mii = gsw1xx_regmap_init(priv, "mii", GSW1XX_RGMII_BASE,</div><div class='add'>+					     0xff);</div><div class='add'>+	if (IS_ERR(priv-&gt;gswip.mii))</div><div class='add'>+		return PTR_ERR(priv-&gt;gswip.mii);</div><div class='add'>+</div><div class='add'>+	priv-&gt;sgmii = gsw1xx_regmap_init(priv, "sgmii", GSW1XX_SGMII_BASE,</div><div class='add'>+					 0xfff);</div><div class='add'>+	if (IS_ERR(priv-&gt;sgmii))</div><div class='add'>+		return PTR_ERR(priv-&gt;sgmii);</div><div class='add'>+</div><div class='add'>+	priv-&gt;gpio = gsw1xx_regmap_init(priv, "gpio", GSW1XX_GPIO_BASE, 0xff);</div><div class='add'>+	if (IS_ERR(priv-&gt;gpio))</div><div class='add'>+		return PTR_ERR(priv-&gt;gpio);</div><div class='add'>+</div><div class='add'>+	priv-&gt;clk = gsw1xx_regmap_init(priv, "clk", GSW1XX_CLK_BASE, 0xff);</div><div class='add'>+	if (IS_ERR(priv-&gt;clk))</div><div class='add'>+		return PTR_ERR(priv-&gt;clk);</div><div class='add'>+</div><div class='add'>+	priv-&gt;shell = gsw1xx_regmap_init(priv, "shell", GSW1XX_SHELL_BASE,</div><div class='add'>+					 0xff);</div><div class='add'>+	if (IS_ERR(priv-&gt;shell))</div><div class='add'>+		return PTR_ERR(priv-&gt;shell);</div><div class='add'>+</div><div class='add'>+	priv-&gt;pcs.ops = &amp;gsw1xx_pcs_ops;</div><div class='add'>+	priv-&gt;pcs.poll = true;</div><div class='add'>+	__set_bit(PHY_INTERFACE_MODE_SGMII,</div><div class='add'>+		  priv-&gt;pcs.supported_interfaces);</div><div class='add'>+	__set_bit(PHY_INTERFACE_MODE_1000BASEX,</div><div class='add'>+		  priv-&gt;pcs.supported_interfaces);</div><div class='add'>+	if (priv-&gt;gswip.hw_info-&gt;supports_2500m)</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_2500BASEX,</div><div class='add'>+			  priv-&gt;pcs.supported_interfaces);</div><div class='add'>+	priv-&gt;tbi_interface = PHY_INTERFACE_MODE_NA;</div><div class='add'>+</div><div class='add'>+	/* assert SGMII reset to power down SGMII unit */</div><div class='add'>+	ret = regmap_set_bits(priv-&gt;shell, GSW1XX_SHELL_RST_REQ,</div><div class='add'>+			      GSW1XX_RST_REQ_SGMII_SHELL);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* configure GPIO pin-mux for MMDIO in case of external PHY connected to</div><div class='add'>+	 * SGMII or RGMII as slave interface</div><div class='add'>+	 */</div><div class='add'>+	regmap_set_bits(priv-&gt;gpio, GPIO_ALTSEL0, 3);</div><div class='add'>+	regmap_set_bits(priv-&gt;gpio, GPIO_ALTSEL1, 3);</div><div class='add'>+</div><div class='add'>+	ret = regmap_read(priv-&gt;gswip.gswip, GSWIP_VERSION, &amp;version);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = gswip_probe_common(&amp;priv-&gt;gswip, version);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	dev_set_drvdata(dev, &amp;priv-&gt;gswip);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gsw1xx_remove(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = dev_get_drvdata(&amp;mdiodev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	gswip_disable_switch(priv);</div><div class='add'>+</div><div class='add'>+	dsa_unregister_switch(priv-&gt;ds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void gsw1xx_shutdown(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct gswip_priv *priv = dev_get_drvdata(&amp;mdiodev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dev_set_drvdata(&amp;mdiodev-&gt;dev, NULL);</div><div class='add'>+</div><div class='add'>+	gswip_disable_switch(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct gswip_hw_info gsw12x_data = {</div><div class='add'>+	.max_ports		= GSW1XX_PORTS,</div><div class='add'>+	.allowed_cpu_ports	= BIT(GSW1XX_MII_PORT) | BIT(GSW1XX_SGMII_PORT),</div><div class='add'>+	.mii_ports		= BIT(GSW1XX_MII_PORT),</div><div class='add'>+	.mii_port_reg_offset	= -GSW1XX_MII_PORT,</div><div class='add'>+	.mac_select_pcs		= gsw1xx_phylink_mac_select_pcs,</div><div class='add'>+	.phylink_get_caps	= &amp;gsw1xx_phylink_get_caps,</div><div class='add'>+	.supports_2500m		= true,</div><div class='add'>+	.pce_microcode		= &amp;gsw1xx_pce_microcode,</div><div class='add'>+	.pce_microcode_size	= ARRAY_SIZE(gsw1xx_pce_microcode),</div><div class='add'>+	.tag_protocol		= DSA_TAG_PROTO_MXL_GSW1XX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct gswip_hw_info gsw140_data = {</div><div class='add'>+	.max_ports		= GSW1XX_PORTS,</div><div class='add'>+	.allowed_cpu_ports	= BIT(GSW1XX_MII_PORT) | BIT(GSW1XX_SGMII_PORT),</div><div class='add'>+	.mii_ports		= BIT(GSW1XX_MII_PORT),</div><div class='add'>+	.mii_port_reg_offset	= -GSW1XX_MII_PORT,</div><div class='add'>+	.mac_select_pcs		= gsw1xx_phylink_mac_select_pcs,</div><div class='add'>+	.phylink_get_caps	= &amp;gsw1xx_phylink_get_caps,</div><div class='add'>+	.supports_2500m		= true,</div><div class='add'>+	.pce_microcode		= &amp;gsw1xx_pce_microcode,</div><div class='add'>+	.pce_microcode_size	= ARRAY_SIZE(gsw1xx_pce_microcode),</div><div class='add'>+	.tag_protocol		= DSA_TAG_PROTO_MXL_GSW1XX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct gswip_hw_info gsw141_data = {</div><div class='add'>+	.max_ports		= GSW1XX_PORTS,</div><div class='add'>+	.allowed_cpu_ports	= BIT(GSW1XX_MII_PORT) | BIT(GSW1XX_SGMII_PORT),</div><div class='add'>+	.mii_ports		= BIT(GSW1XX_MII_PORT),</div><div class='add'>+	.mii_port_reg_offset	= -GSW1XX_MII_PORT,</div><div class='add'>+	.mac_select_pcs		= gsw1xx_phylink_mac_select_pcs,</div><div class='add'>+	.phylink_get_caps	= gsw1xx_phylink_get_caps,</div><div class='add'>+	.pce_microcode		= &amp;gsw1xx_pce_microcode,</div><div class='add'>+	.pce_microcode_size	= ARRAY_SIZE(gsw1xx_pce_microcode),</div><div class='add'>+	.tag_protocol		= DSA_TAG_PROTO_MXL_GSW1XX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * GSW125 is the industrial temperature version of GSW120.</div><div class='add'>+ * GSW145 is the industrial temperature version of GSW140.</div><div class='add'>+ */</div><div class='add'>+static const struct of_device_id gsw1xx_of_match[] = {</div><div class='add'>+	{ .compatible = "maxlinear,gsw120", .data = &amp;gsw12x_data },</div><div class='add'>+	{ .compatible = "maxlinear,gsw125", .data = &amp;gsw12x_data },</div><div class='add'>+	{ .compatible = "maxlinear,gsw140", .data = &amp;gsw140_data },</div><div class='add'>+	{ .compatible = "maxlinear,gsw141", .data = &amp;gsw141_data },</div><div class='add'>+	{ .compatible = "maxlinear,gsw145", .data = &amp;gsw140_data },</div><div class='add'>+	{ /* sentinel */ },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+MODULE_DEVICE_TABLE(of, gsw1xx_of_match);</div><div class='add'>+</div><div class='add'>+static struct mdio_driver gsw1xx_driver = {</div><div class='add'>+	.probe		= gsw1xx_probe,</div><div class='add'>+	.remove		= gsw1xx_remove,</div><div class='add'>+	.shutdown	= gsw1xx_shutdown,</div><div class='add'>+	.mdiodrv.driver	= {</div><div class='add'>+		.name = "mxl-gsw1xx",</div><div class='add'>+		.of_match_table = gsw1xx_of_match,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+mdio_module_driver(gsw1xx_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Daniel Golle &lt;daniel@makrotopia.org&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Driver for MaxLinear GSW1xx ethernet switch");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/dsa/lantiq/mxl-gsw1xx.h b/drivers/net/dsa/lantiq/mxl-gsw1xx.h<br/>new file mode 100644<br/>index 000000000000..38e03c048a26<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/lantiq/mxl-gsw1xx.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/lantiq/mxl-gsw1xx.h</a></div><div class='hunk'>@@ -0,0 +1,126 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Register definitions for MaxLinear GSW1xx series switches</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2025 Daniel Golle &lt;daniel@makrotopia.org&gt;</div><div class='add'>+ * Copyright (C) 2023 - 2024 MaxLinear Inc.</div><div class='add'>+ */</div><div class='add'>+#ifndef __MXL_GSW1XX_H</div><div class='add'>+#define __MXL_GSW1XX_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+</div><div class='add'>+#define GSW1XX_PORTS				6</div><div class='add'>+/* Port used for RGMII or optional RMII */</div><div class='add'>+#define GSW1XX_MII_PORT				5</div><div class='add'>+/* Port used for SGMII */</div><div class='add'>+#define GSW1XX_SGMII_PORT			4</div><div class='add'>+</div><div class='add'>+#define GSW1XX_SYS_CLK_FREQ			340000000</div><div class='add'>+</div><div class='add'>+/* SMDIO switch register base address */</div><div class='add'>+#define GSW1XX_SMDIO_BADR			0x1f</div><div class='add'>+#define  GSW1XX_SMDIO_BADR_UNKNOWN		-1</div><div class='add'>+</div><div class='add'>+/* GSW1XX SGMII PCS */</div><div class='add'>+#define GSW1XX_SGMII_BASE			0xd000</div><div class='add'>+#define GSW1XX_SGMII_PHY_HWBU_CTRL		0x009</div><div class='add'>+#define  GSW1XX_SGMII_PHY_HWBU_CTRL_EN_HWBU_FSM	BIT(0)</div><div class='add'>+#define  GSW1XX_SGMII_PHY_HWBU_CTRL_HW_FSM_EN	BIT(3)</div><div class='add'>+#define GSW1XX_SGMII_TBI_TXANEGH		0x300</div><div class='add'>+#define GSW1XX_SGMII_TBI_TXANEGL		0x301</div><div class='add'>+#define GSW1XX_SGMII_TBI_ANEGCTL		0x304</div><div class='add'>+#define  GSW1XX_SGMII_TBI_ANEGCTL_LT		GENMASK(1, 0)</div><div class='add'>+#define   GSW1XX_SGMII_TBI_ANEGCTL_LT_10US	0</div><div class='add'>+#define   GSW1XX_SGMII_TBI_ANEGCTL_LT_1_6MS	1</div><div class='add'>+#define   GSW1XX_SGMII_TBI_ANEGCTL_LT_5MS	2</div><div class='add'>+#define   GSW1XX_SGMII_TBI_ANEGCTL_LT_10MS	3</div><div class='add'>+#define  GSW1XX_SGMII_TBI_ANEGCTL_ANEGEN	BIT(2)</div><div class='add'>+#define  GSW1XX_SGMII_TBI_ANEGCTL_RANEG		BIT(3)</div><div class='add'>+#define  GSW1XX_SGMII_TBI_ANEGCTL_OVRABL	BIT(4)</div><div class='add'>+#define  GSW1XX_SGMII_TBI_ANEGCTL_OVRANEG	BIT(5)</div><div class='add'>+#define  GSW1XX_SGMII_TBI_ANEGCTL_ANMODE	GENMASK(7, 6)</div><div class='add'>+#define   GSW1XX_SGMII_TBI_ANEGCTL_ANMODE_1000BASEX	1</div><div class='add'>+#define   GSW1XX_SGMII_TBI_ANEGCTL_ANMODE_SGMII_PHY	2</div><div class='add'>+#define   GSW1XX_SGMII_TBI_ANEGCTL_ANMODE_SGMII_MAC	3</div><div class='add'>+#define  GSW1XX_SGMII_TBI_ANEGCTL_BCOMP		BIT(15)</div><div class='add'>+</div><div class='add'>+#define GSW1XX_SGMII_TBI_TBICTL			0x305</div><div class='add'>+#define  GSW1XX_SGMII_TBI_TBICTL_INITTBI	BIT(0)</div><div class='add'>+#define  GSW1XX_SGMII_TBI_TBICTL_ENTBI		BIT(1)</div><div class='add'>+#define  GSW1XX_SGMII_TBI_TBICTL_CRSTRR		BIT(4)</div><div class='add'>+#define  GSW1XX_SGMII_TBI_TBICTL_CRSOFF		BIT(5)</div><div class='add'>+#define GSW1XX_SGMII_TBI_TBISTAT		0x309</div><div class='add'>+#define  GSW1XX_SGMII_TBI_TBISTAT_LINK		BIT(0)</div><div class='add'>+#define  GSW1XX_SGMII_TBI_TBISTAT_AN_COMPLETE	BIT(1)</div><div class='add'>+#define GSW1XX_SGMII_TBI_LPSTAT			0x30a</div><div class='add'>+#define  GSW1XX_SGMII_TBI_LPSTAT_DUPLEX		BIT(0)</div><div class='add'>+#define  GSW1XX_SGMII_TBI_LPSTAT_PAUSE_RX	BIT(1)</div><div class='add'>+#define  GSW1XX_SGMII_TBI_LPSTAT_PAUSE_TX	BIT(2)</div><div class='add'>+#define  GSW1XX_SGMII_TBI_LPSTAT_SPEED		GENMASK(6, 5)</div><div class='add'>+#define   GSW1XX_SGMII_TBI_LPSTAT_SPEED_10	0</div><div class='add'>+#define   GSW1XX_SGMII_TBI_LPSTAT_SPEED_100	1</div><div class='add'>+#define   GSW1XX_SGMII_TBI_LPSTAT_SPEED_1000	2</div><div class='add'>+#define   GSW1XX_SGMII_TBI_LPSTAT_SPEED_NOSGMII	3</div><div class='add'>+#define GSW1XX_SGMII_PHY_D			0x100</div><div class='add'>+#define GSW1XX_SGMII_PHY_A			0x101</div><div class='add'>+#define GSW1XX_SGMII_PHY_C			0x102</div><div class='add'>+#define  GSW1XX_SGMII_PHY_STATUS		BIT(0)</div><div class='add'>+#define  GSW1XX_SGMII_PHY_READ			BIT(4)</div><div class='add'>+#define  GSW1XX_SGMII_PHY_WRITE			BIT(8)</div><div class='add'>+#define  GSW1XX_SGMII_PHY_RESET_N		BIT(12)</div><div class='add'>+#define GSW1XX_SGMII_PCS_RXB_CTL		0x401</div><div class='add'>+#define  GSW1XX_SGMII_PCS_RXB_CTL_INIT_RX_RXB	BIT(1)</div><div class='add'>+#define GSW1XX_SGMII_PCS_TXB_CTL		0x404</div><div class='add'>+#define  GSW1XX_SGMII_PCS_TXB_CTL_INIT_TX_TXB	BIT(1)</div><div class='add'>+</div><div class='add'>+#define GSW1XX_SGMII_PHY_RX0_CFG2		0x004</div><div class='add'>+#define  GSW1XX_SGMII_PHY_RX0_CFG2_EQ		GENMASK(2, 0)</div><div class='add'>+#define   GSW1XX_SGMII_PHY_RX0_CFG2_EQ_DEF	2</div><div class='add'>+#define  GSW1XX_SGMII_PHY_RX0_CFG2_INVERT	BIT(3)</div><div class='add'>+#define  GSW1XX_SGMII_PHY_RX0_CFG2_LOS_EN	BIT(4)</div><div class='add'>+#define  GSW1XX_SGMII_PHY_RX0_CFG2_TERM_EN	BIT(5)</div><div class='add'>+#define  GSW1XX_SGMII_PHY_RX0_CFG2_FILT_CNT	GENMASK(12, 6)</div><div class='add'>+#define   GSW1XX_SGMII_PHY_RX0_CFG2_FILT_CNT_DEF	20</div><div class='add'>+</div><div class='add'>+#define GSW1XX_SGMII_PHY_TX0_CFG3		0x007</div><div class='add'>+#define  GSW1XX_SGMII_PHY_TX0_CFG3_VBOOST_EN	BIT(12)</div><div class='add'>+#define  GSW1XX_SGMII_PHY_TX0_CFG3_VBOOST_LEVEL	GENMASK(11, 9)</div><div class='add'>+#define   GSW1XX_SGMII_PHY_TX0_CFG3_VBOOST_LEVEL_DEF	4</div><div class='add'>+#define  GSW1XX_SGMII_PHY_TX0_CFG3_INVERT	BIT(8)</div><div class='add'>+</div><div class='add'>+/* GSW1XX PDI Registers */</div><div class='add'>+#define GSW1XX_SWITCH_BASE			0xe000</div><div class='add'>+</div><div class='add'>+/* GSW1XX MII Registers */</div><div class='add'>+#define GSW1XX_RGMII_BASE			0xf100</div><div class='add'>+</div><div class='add'>+/* GSW1XX GPIO Registers */</div><div class='add'>+#define GSW1XX_GPIO_BASE			0xf300</div><div class='add'>+#define GPIO_ALTSEL0				0x83</div><div class='add'>+#define GPIO_ALTSEL0_EXTPHY_MUX_VAL		0x03c3</div><div class='add'>+#define GPIO_ALTSEL1				0x84</div><div class='add'>+#define GPIO_ALTSEL1_EXTPHY_MUX_VAL		0x003f</div><div class='add'>+</div><div class='add'>+/* MDIO bus controller */</div><div class='add'>+#define GSW1XX_MMDIO_BASE			0xf400</div><div class='add'>+</div><div class='add'>+/* generic IC registers */</div><div class='add'>+#define GSW1XX_SHELL_BASE			0xfa00</div><div class='add'>+#define  GSW1XX_SHELL_RST_REQ			0x01</div><div class='add'>+#define   GSW1XX_RST_REQ_SGMII_SHELL		BIT(5)</div><div class='add'>+/* RGMII PAD Slew Control Register */</div><div class='add'>+#define  GSW1XX_SHELL_RGMII_SLEW_CFG		0x78</div><div class='add'>+#define   RGMII_SLEW_CFG_RX_2_5_V		BIT(4)</div><div class='add'>+#define   RGMII_SLEW_CFG_TX_2_5_V		BIT(5)</div><div class='add'>+</div><div class='add'>+/* SGMII clock related settings */</div><div class='add'>+#define GSW1XX_CLK_BASE				0xf900</div><div class='add'>+#define  GSW1XX_CLK_NCO_CTRL			0x68</div><div class='add'>+#define   GSW1XX_SGMII_HSP_MASK			GENMASK(3, 2)</div><div class='add'>+#define   GSW1XX_SGMII_SEL			BIT(1)</div><div class='add'>+#define   GSW1XX_SGMII_1G			0x0</div><div class='add'>+#define   GSW1XX_SGMII_2G5			0xc</div><div class='add'>+#define   GSW1XX_SGMII_1G_NCO1			0x0</div><div class='add'>+#define   GSW1XX_SGMII_2G5_NCO2			0x2</div><div class='add'>+</div><div class='add'>+#endif /* __MXL_GSW1XX_H */</div><div class='head'>diff --git a/drivers/net/dsa/lantiq/mxl-gsw1xx_pce.h b/drivers/net/dsa/lantiq/mxl-gsw1xx_pce.h<br/>new file mode 100644<br/>index 000000000000..eefcd411a340<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/lantiq/mxl-gsw1xx_pce.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/lantiq/mxl-gsw1xx_pce.h</a></div><div class='hunk'>@@ -0,0 +1,154 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/*</div><div class='add'>+ * PCE microcode code update for driver for MaxLinear GSW1xx switch chips</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2023 - 2024 MaxLinear Inc.</div><div class='add'>+ * Copyright (C) 2022 Snap One, LLC.  All rights reserved.</div><div class='add'>+ * Copyright (C) 2017 - 2019 Hauke Mehrtens &lt;hauke@hauke-m.de&gt;</div><div class='add'>+ * Copyright (C) 2012 John Crispin &lt;john@phrozen.org&gt;</div><div class='add'>+ * Copyright (C) 2010 Lantiq Deutschland</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "lantiq_gswip.h"</div><div class='add'>+</div><div class='add'>+#define INSTR 0</div><div class='add'>+#define IPV6 1</div><div class='add'>+#define LENACCU 2</div><div class='add'>+</div><div class='add'>+/* GSWIP_2.X */</div><div class='add'>+enum {</div><div class='add'>+	OUT_MAC0 = 0,</div><div class='add'>+	OUT_MAC1,</div><div class='add'>+	OUT_MAC2,</div><div class='add'>+	OUT_MAC3,</div><div class='add'>+	OUT_MAC4,</div><div class='add'>+	OUT_MAC5,</div><div class='add'>+	OUT_ETHTYP,</div><div class='add'>+	OUT_VTAG0,</div><div class='add'>+	OUT_VTAG1,</div><div class='add'>+	OUT_ITAG0,</div><div class='add'>+	OUT_ITAG1,	/* 10 */</div><div class='add'>+	OUT_ITAG2,</div><div class='add'>+	OUT_ITAG3,</div><div class='add'>+	OUT_IP0,</div><div class='add'>+	OUT_IP1,</div><div class='add'>+	OUT_IP2,</div><div class='add'>+	OUT_IP3,</div><div class='add'>+	OUT_SIP0,</div><div class='add'>+	OUT_SIP1,</div><div class='add'>+	OUT_SIP2,</div><div class='add'>+	OUT_SIP3,	/* 20 */</div><div class='add'>+	OUT_SIP4,</div><div class='add'>+	OUT_SIP5,</div><div class='add'>+	OUT_SIP6,</div><div class='add'>+	OUT_SIP7,</div><div class='add'>+	OUT_DIP0,</div><div class='add'>+	OUT_DIP1,</div><div class='add'>+	OUT_DIP2,</div><div class='add'>+	OUT_DIP3,</div><div class='add'>+	OUT_DIP4,</div><div class='add'>+	OUT_DIP5,	/* 30 */</div><div class='add'>+	OUT_DIP6,</div><div class='add'>+	OUT_DIP7,</div><div class='add'>+	OUT_SESID,</div><div class='add'>+	OUT_PROT,</div><div class='add'>+	OUT_APP0,</div><div class='add'>+	OUT_APP1,</div><div class='add'>+	OUT_IGMP0,</div><div class='add'>+	OUT_IGMP1,</div><div class='add'>+	OUT_STAG0 = 61,</div><div class='add'>+	OUT_STAG1 = 62,</div><div class='add'>+	OUT_NONE = 63,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* parser's microcode flag type */</div><div class='add'>+enum {</div><div class='add'>+	FLAG_ITAG = 0,</div><div class='add'>+	FLAG_VLAN,</div><div class='add'>+	FLAG_SNAP,</div><div class='add'>+	FLAG_PPPOE,</div><div class='add'>+	FLAG_IPV6,</div><div class='add'>+	FLAG_IPV6FL,</div><div class='add'>+	FLAG_IPV4,</div><div class='add'>+	FLAG_IGMP,</div><div class='add'>+	FLAG_TU,</div><div class='add'>+	FLAG_HOP,</div><div class='add'>+	FLAG_NN1,	/* 10 */</div><div class='add'>+	FLAG_NN2,</div><div class='add'>+	FLAG_END,</div><div class='add'>+	FLAG_NO,	/* 13 */</div><div class='add'>+	FLAG_SVLAN,	/* 14 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define PCE_MC_M(val, msk, ns, out, len, type, flags, ipv4_len) \</div><div class='add'>+	{ (val), (msk), ((ns) &lt;&lt; 10 | (out) &lt;&lt; 4 | (len) &gt;&gt; 1),\</div><div class='add'>+	 ((len) &amp; 1) &lt;&lt; 15 | (type) &lt;&lt; 13 | (flags) &lt;&lt; 9 | (ipv4_len) &lt;&lt; 8 }</div><div class='add'>+</div><div class='add'>+/* V22_2X (IPv6 issue fixed) */</div><div class='add'>+static const struct gswip_pce_microcode gsw1xx_pce_microcode[] = {</div><div class='add'>+	/*       value   mask    ns  fields      L  type     flags       ipv4_len */</div><div class='add'>+	PCE_MC_M(0x88c3, 0xFFFF, 1,  OUT_ITAG0,  4, INSTR,   FLAG_ITAG,  0),</div><div class='add'>+	PCE_MC_M(0x8100, 0xFFFF, 4,  OUT_STAG0,  2, INSTR,   FLAG_SVLAN, 0),</div><div class='add'>+	PCE_MC_M(0x88A8, 0xFFFF, 4,  OUT_STAG0,  2, INSTR,   FLAG_SVLAN, 0),</div><div class='add'>+	PCE_MC_M(0x9100, 0xFFFF, 4,  OUT_STAG0,  2, INSTR,   FLAG_SVLAN, 0),</div><div class='add'>+	PCE_MC_M(0x8100, 0xFFFF, 5,  OUT_VTAG0,  2, INSTR,   FLAG_VLAN,  0),</div><div class='add'>+	PCE_MC_M(0x88A8, 0xFFFF, 6,  OUT_VTAG0,  2, INSTR,   FLAG_VLAN,  0),</div><div class='add'>+	PCE_MC_M(0x9100, 0xFFFF, 4,  OUT_VTAG0,  2, INSTR,   FLAG_VLAN,  0),</div><div class='add'>+	PCE_MC_M(0x8864, 0xFFFF, 20, OUT_ETHTYP, 1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0800, 0xFFFF, 24, OUT_ETHTYP, 1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x86DD, 0xFFFF, 25, OUT_ETHTYP, 1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x8863, 0xFFFF, 19, OUT_ETHTYP, 1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0000, 0xF800, 13, OUT_NONE,   0, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 44, OUT_ETHTYP, 1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0600, 0x0600, 44, OUT_ETHTYP, 1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 15, OUT_NONE,   1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0xAAAA, 0xFFFF, 17, OUT_NONE,   1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0300, 0xFF00, 45, OUT_NONE,   0, INSTR,   FLAG_SNAP,  0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_DIP7,   3, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 21, OUT_DIP7,   3, INSTR,   FLAG_PPPOE, 0),</div><div class='add'>+	PCE_MC_M(0x0021, 0xFFFF, 24, OUT_NONE,   1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0057, 0xFFFF, 25, OUT_NONE,   1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 44, OUT_NONE,   0, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x4000, 0xF000, 27, OUT_IP0,    4, INSTR,   FLAG_IPV4,  1),</div><div class='add'>+	PCE_MC_M(0x6000, 0xF000, 30, OUT_IP0,    3, INSTR,   FLAG_IPV6,  0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 28, OUT_IP3,    2, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 29, OUT_SIP0,   4, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 44, OUT_NONE,   0, LENACCU, FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x1100, 0xFF00, 43, OUT_PROT,   1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0600, 0xFF00, 43, OUT_PROT,   1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0000, 0xFF00, 36, OUT_IP3,   17, INSTR,   FLAG_HOP,   0),</div><div class='add'>+	PCE_MC_M(0x2B00, 0xFF00, 36, OUT_IP3,   17, INSTR,   FLAG_NN1,   0),</div><div class='add'>+	PCE_MC_M(0x3C00, 0xFF00, 36, OUT_IP3,   17, INSTR,   FLAG_NN2,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 43, OUT_PROT,   1, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x00F0, 38, OUT_NONE,   0, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 44, OUT_NONE,   0, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0000, 0xFF00, 36, OUT_NONE,   0, IPV6,    FLAG_HOP,   0),</div><div class='add'>+	PCE_MC_M(0x2B00, 0xFF00, 36, OUT_NONE,   0, IPV6,    FLAG_NN1,   0),</div><div class='add'>+	PCE_MC_M(0x3C00, 0xFF00, 36, OUT_NONE,   0, IPV6,    FLAG_NN2,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x00FC, 44, OUT_PROT,   0, IPV6,    FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 44, OUT_NONE,   0, IPV6,    FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 44, OUT_SIP0,  16, INSTR,   FLAG_NO,    0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_APP0,   4, INSTR,   FLAG_IGMP,  0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+	PCE_MC_M(0x0000, 0x0000, 45, OUT_NONE,   0, INSTR,   FLAG_END,   0),</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/net/dsa/microchip/Kconfig b/drivers/net/dsa/microchip/Kconfig<br/>new file mode 100644<br/>index 000000000000..c71d3fd5dfeb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,47 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+menuconfig NET_DSA_MICROCHIP_KSZ_COMMON</div><div class='add'>+	tristate "Microchip KSZ8XXX/KSZ9XXX/LAN937X series switch support"</div><div class='add'>+	depends on NET_DSA</div><div class='add'>+	select NET_DSA_TAG_KSZ</div><div class='add'>+	select NET_DSA_TAG_NONE</div><div class='add'>+	select NET_IEEE8021Q_HELPERS</div><div class='add'>+	select DCB</div><div class='add'>+	select PCS_XPCS</div><div class='add'>+	help</div><div class='add'>+	  This driver adds support for Microchip KSZ8, KSZ9 and</div><div class='add'>+	  LAN937X series switch chips, being KSZ8863/8873,</div><div class='add'>+	  KSZ8895/8864, KSZ8794/8795/8765,</div><div class='add'>+	  KSZ9477/9897/9896/9567/8567, KSZ9893/9563/8563 and</div><div class='add'>+	  LAN9370/9371/9372/9373/9374.</div><div class='add'>+</div><div class='add'>+config NET_DSA_MICROCHIP_KSZ9477_I2C</div><div class='add'>+	tristate "KSZ series I2C connected switch driver"</div><div class='add'>+	depends on NET_DSA_MICROCHIP_KSZ_COMMON &amp;&amp; I2C</div><div class='add'>+	select REGMAP_I2C</div><div class='add'>+	help</div><div class='add'>+	  Select to enable support for registering switches configured through I2C.</div><div class='add'>+</div><div class='add'>+config NET_DSA_MICROCHIP_KSZ_SPI</div><div class='add'>+	tristate "KSZ series SPI connected switch driver"</div><div class='add'>+	depends on NET_DSA_MICROCHIP_KSZ_COMMON &amp;&amp; SPI</div><div class='add'>+	select REGMAP_SPI</div><div class='add'>+	help</div><div class='add'>+	  Select to enable support for registering switches configured through SPI.</div><div class='add'>+</div><div class='add'>+config NET_DSA_MICROCHIP_KSZ_PTP</div><div class='add'>+	bool "Support for the PTP clock on the KSZ9563/LAN937x Ethernet Switch"</div><div class='add'>+	depends on NET_DSA_MICROCHIP_KSZ_COMMON &amp;&amp; PTP_1588_CLOCK</div><div class='add'>+	depends on NET_DSA_MICROCHIP_KSZ_COMMON=m || PTP_1588_CLOCK=y</div><div class='add'>+	help</div><div class='add'>+	  Select to enable support for timestamping &amp; PTP clock manipulation in</div><div class='add'>+	  KSZ8563/KSZ9563/LAN937x series of switches. KSZ9563/KSZ8563 supports</div><div class='add'>+	  only one step timestamping. LAN937x switch supports both one step and</div><div class='add'>+	  two step timestamping.</div><div class='add'>+</div><div class='add'>+config NET_DSA_MICROCHIP_KSZ8863_SMI</div><div class='add'>+	tristate "KSZ series SMI connected switch driver"</div><div class='add'>+	depends on NET_DSA_MICROCHIP_KSZ_COMMON</div><div class='add'>+	select MDIO_BITBANG</div><div class='add'>+	help</div><div class='add'>+	  Select to enable support for registering switches configured through</div><div class='add'>+	  Microchip SMI. It supports the KSZ8863 and KSZ8873 switch.</div><div class='head'>diff --git a/drivers/net/dsa/microchip/Makefile b/drivers/net/dsa/microchip/Makefile<br/>new file mode 100644<br/>index 000000000000..9347cfb3d0b5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/Makefile</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+obj-$(CONFIG_NET_DSA_MICROCHIP_KSZ_COMMON)	+= ksz_switch.o</div><div class='add'>+ksz_switch-objs := ksz_common.o ksz_dcb.o</div><div class='add'>+ksz_switch-objs += ksz9477.o ksz9477_acl.o ksz9477_tc_flower.o</div><div class='add'>+ksz_switch-objs += ksz8.o</div><div class='add'>+ksz_switch-objs += lan937x_main.o</div><div class='add'>+</div><div class='add'>+ifdef CONFIG_NET_DSA_MICROCHIP_KSZ_PTP</div><div class='add'>+ksz_switch-objs += ksz_ptp.o</div><div class='add'>+endif</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_NET_DSA_MICROCHIP_KSZ9477_I2C)	+= ksz9477_i2c.o</div><div class='add'>+obj-$(CONFIG_NET_DSA_MICROCHIP_KSZ_SPI)		+= ksz_spi.o</div><div class='add'>+obj-$(CONFIG_NET_DSA_MICROCHIP_KSZ8863_SMI)	+= ksz8863_smi.o</div><div class='head'>diff --git a/drivers/net/dsa/microchip/ksz8.c b/drivers/net/dsa/microchip/ksz8.c<br/>new file mode 100644<br/>index 000000000000..c354abdafc1b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz8.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/ksz8.c</a></div><div class='hunk'>@@ -0,0 +1,2115 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Microchip KSZ8XXX series switch driver</div><div class='add'>+ *</div><div class='add'>+ * It supports the following switches:</div><div class='add'>+ * - KSZ8463</div><div class='add'>+ * - KSZ8863, KSZ8873 aka KSZ88X3</div><div class='add'>+ * - KSZ8895, KSZ8864 aka KSZ8895 family</div><div class='add'>+ * - KSZ8794, KSZ8795, KSZ8765 aka KSZ87XX</div><div class='add'>+ * Note that it does NOT support:</div><div class='add'>+ * - KSZ8563, KSZ8567 - see KSZ9477 driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2017 Microchip Technology Inc.</div><div class='add'>+ *	Tristram Ha &lt;Tristram.Ha@microchip.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/if_vlan.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/platform_data/microchip-ksz.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/if_bridge.h&gt;</div><div class='add'>+#include &lt;linux/micrel_phy.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+#include &lt;net/switchdev.h&gt;</div><div class='add'>+#include &lt;linux/phylink.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ksz_common.h"</div><div class='add'>+#include "ksz8_reg.h"</div><div class='add'>+#include "ksz8.h"</div><div class='add'>+</div><div class='add'>+static void ksz_cfg(struct ksz_device *dev, u32 addr, u8 bits, bool set)</div><div class='add'>+{</div><div class='add'>+	ksz_rmw8(dev, addr, bits, set ? bits : 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz_port_cfg(struct ksz_device *dev, int port, int offset, u8 bits,</div><div class='add'>+			 bool set)</div><div class='add'>+{</div><div class='add'>+	ksz_rmw8(dev, dev-&gt;dev_ops-&gt;get_port_addr(port, offset), bits,</div><div class='add'>+		 set ? bits : 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz8_ind_write8 - EEE/ACL/PME indirect register write</div><div class='add'>+ * @dev: The device structure.</div><div class='add'>+ * @table: Function &amp; table select, register 110.</div><div class='add'>+ * @addr: Indirect access control, register 111.</div><div class='add'>+ * @data: The data to be written.</div><div class='add'>+ *</div><div class='add'>+ * This function performs an indirect register write for EEE, ACL or</div><div class='add'>+ * PME switch functionalities. Both 8-bit registers 110 and 111 are</div><div class='add'>+ * written at once with ksz_write16, using the serial multiple write</div><div class='add'>+ * functionality.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or an error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int ksz8_ind_write8(struct ksz_device *dev, u8 table, u16 addr, u8 data)</div><div class='add'>+{</div><div class='add'>+	const u16 *regs;</div><div class='add'>+	u16 ctrl_addr;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	regs = dev-&gt;info-&gt;regs;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;alu_mutex);</div><div class='add'>+</div><div class='add'>+	ctrl_addr = IND_ACC_TABLE(table) | addr;</div><div class='add'>+	ret = ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);</div><div class='add'>+	if (!ret)</div><div class='add'>+		ret = ksz_write8(dev, regs[REG_IND_BYTE], data);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;alu_mutex);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz8_ind_read8 - EEE/ACL/PME indirect register read</div><div class='add'>+ * @dev: The device structure.</div><div class='add'>+ * @table: Function &amp; table select, register 110.</div><div class='add'>+ * @addr: Indirect access control, register 111.</div><div class='add'>+ * @val: The value read.</div><div class='add'>+ *</div><div class='add'>+ * This function performs an indirect register read for EEE, ACL or</div><div class='add'>+ * PME switch functionalities. Both 8-bit registers 110 and 111 are</div><div class='add'>+ * written at once with ksz_write16, using the serial multiple write</div><div class='add'>+ * functionality.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or an error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int ksz8_ind_read8(struct ksz_device *dev, u8 table, u16 addr, u8 *val)</div><div class='add'>+{</div><div class='add'>+	const u16 *regs;</div><div class='add'>+	u16 ctrl_addr;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	regs = dev-&gt;info-&gt;regs;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;alu_mutex);</div><div class='add'>+</div><div class='add'>+	ctrl_addr = IND_ACC_TABLE(table | TABLE_READ) | addr;</div><div class='add'>+	ret = ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);</div><div class='add'>+	if (!ret)</div><div class='add'>+		ret = ksz_read8(dev, regs[REG_IND_BYTE], val);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;alu_mutex);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz8_pme_write8(struct ksz_device *dev, u32 reg, u8 value)</div><div class='add'>+{</div><div class='add'>+	return ksz8_ind_write8(dev, (u8)(reg &gt;&gt; 8), (u8)(reg), value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz8_pme_pread8(struct ksz_device *dev, int port, int offset, u8 *data)</div><div class='add'>+{</div><div class='add'>+	u8 table = (u8)(offset &gt;&gt; 8 | (port + 1));</div><div class='add'>+</div><div class='add'>+	return ksz8_ind_read8(dev, table, (u8)(offset), data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz8_pme_pwrite8(struct ksz_device *dev, int port, int offset, u8 data)</div><div class='add'>+{</div><div class='add'>+	u8 table = (u8)(offset &gt;&gt; 8 | (port + 1));</div><div class='add'>+</div><div class='add'>+	return ksz8_ind_write8(dev, table, (u8)(offset), data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz8_reset_switch(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	if (ksz_is_ksz88x3(dev)) {</div><div class='add'>+		/* reset switch */</div><div class='add'>+		ksz_cfg(dev, KSZ8863_REG_SW_RESET,</div><div class='add'>+			KSZ8863_GLOBAL_SOFTWARE_RESET | KSZ8863_PCS_RESET, true);</div><div class='add'>+		ksz_cfg(dev, KSZ8863_REG_SW_RESET,</div><div class='add'>+			KSZ8863_GLOBAL_SOFTWARE_RESET | KSZ8863_PCS_RESET, false);</div><div class='add'>+	} else if (ksz_is_ksz8463(dev)) {</div><div class='add'>+		ksz_cfg(dev, KSZ8463_REG_SW_RESET,</div><div class='add'>+			KSZ8463_GLOBAL_SOFTWARE_RESET, true);</div><div class='add'>+		ksz_cfg(dev, KSZ8463_REG_SW_RESET,</div><div class='add'>+			KSZ8463_GLOBAL_SOFTWARE_RESET, false);</div><div class='add'>+	} else {</div><div class='add'>+		/* reset switch */</div><div class='add'>+		ksz_write8(dev, REG_POWER_MANAGEMENT_1,</div><div class='add'>+			   SW_SOFTWARE_POWER_DOWN &lt;&lt; SW_POWER_MANAGEMENT_MODE_S);</div><div class='add'>+		ksz_write8(dev, REG_POWER_MANAGEMENT_1, 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz8863_change_mtu(struct ksz_device *dev, int frame_size)</div><div class='add'>+{</div><div class='add'>+	u8 ctrl2 = 0;</div><div class='add'>+</div><div class='add'>+	if (frame_size &lt;= KSZ8_LEGAL_PACKET_SIZE)</div><div class='add'>+		ctrl2 |= KSZ8863_LEGAL_PACKET_ENABLE;</div><div class='add'>+	else if (frame_size &gt; KSZ8863_NORMAL_PACKET_SIZE)</div><div class='add'>+		ctrl2 |= KSZ8863_HUGE_PACKET_ENABLE;</div><div class='add'>+</div><div class='add'>+	return ksz_rmw8(dev, REG_SW_CTRL_2, KSZ8863_LEGAL_PACKET_ENABLE |</div><div class='add'>+			KSZ8863_HUGE_PACKET_ENABLE, ctrl2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz8795_change_mtu(struct ksz_device *dev, int frame_size)</div><div class='add'>+{</div><div class='add'>+	u8 ctrl1 = 0, ctrl2 = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (frame_size &gt; KSZ8_LEGAL_PACKET_SIZE)</div><div class='add'>+		ctrl2 |= SW_LEGAL_PACKET_DISABLE;</div><div class='add'>+	if (frame_size &gt; KSZ8863_NORMAL_PACKET_SIZE)</div><div class='add'>+		ctrl1 |= SW_HUGE_PACKET;</div><div class='add'>+</div><div class='add'>+	ret = ksz_rmw8(dev, REG_SW_CTRL_1, SW_HUGE_PACKET, ctrl1);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return ksz_rmw8(dev, REG_SW_CTRL_2, SW_LEGAL_PACKET_DISABLE, ctrl2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz8_change_mtu(struct ksz_device *dev, int port, int mtu)</div><div class='add'>+{</div><div class='add'>+	u16 frame_size;</div><div class='add'>+</div><div class='add'>+	if (!dsa_is_cpu_port(dev-&gt;ds, port))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	frame_size = mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;</div><div class='add'>+</div><div class='add'>+	switch (dev-&gt;chip_id) {</div><div class='add'>+	case KSZ8795_CHIP_ID:</div><div class='add'>+	case KSZ8794_CHIP_ID:</div><div class='add'>+	case KSZ8765_CHIP_ID:</div><div class='add'>+		return ksz8795_change_mtu(dev, frame_size);</div><div class='add'>+	case KSZ8463_CHIP_ID:</div><div class='add'>+	case KSZ88X3_CHIP_ID:</div><div class='add'>+	case KSZ8864_CHIP_ID:</div><div class='add'>+	case KSZ8895_CHIP_ID:</div><div class='add'>+		return ksz8863_change_mtu(dev, frame_size);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz8_port_queue_split(struct ksz_device *dev, int port, int queues)</div><div class='add'>+{</div><div class='add'>+	u8 mask_4q, mask_2q;</div><div class='add'>+	u8 reg_4q, reg_2q;</div><div class='add'>+	u8 data_4q = 0;</div><div class='add'>+	u8 data_2q = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (ksz_is_ksz88x3(dev)) {</div><div class='add'>+		mask_4q = KSZ8873_PORT_4QUEUE_SPLIT_EN;</div><div class='add'>+		mask_2q = KSZ8873_PORT_2QUEUE_SPLIT_EN;</div><div class='add'>+		reg_4q = REG_PORT_CTRL_0;</div><div class='add'>+		reg_2q = REG_PORT_CTRL_2;</div><div class='add'>+</div><div class='add'>+		/* KSZ8795 family switches have Weighted Fair Queueing (WFQ)</div><div class='add'>+		 * enabled by default. Enable it for KSZ8873 family switches</div><div class='add'>+		 * too. Default value for KSZ8873 family is strict priority,</div><div class='add'>+		 * which should be enabled by using TC_SETUP_QDISC_ETS, not</div><div class='add'>+		 * by default.</div><div class='add'>+		 */</div><div class='add'>+		ret = ksz_rmw8(dev, REG_SW_CTRL_3, WEIGHTED_FAIR_QUEUE_ENABLE,</div><div class='add'>+			       WEIGHTED_FAIR_QUEUE_ENABLE);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	} else if (ksz_is_ksz8463(dev)) {</div><div class='add'>+		mask_4q = KSZ8873_PORT_4QUEUE_SPLIT_EN;</div><div class='add'>+		mask_2q = KSZ8873_PORT_2QUEUE_SPLIT_EN;</div><div class='add'>+		reg_4q = P1CR1;</div><div class='add'>+		reg_2q = P1CR1 + 1;</div><div class='add'>+	} else {</div><div class='add'>+		mask_4q = KSZ8795_PORT_4QUEUE_SPLIT_EN;</div><div class='add'>+		mask_2q = KSZ8795_PORT_2QUEUE_SPLIT_EN;</div><div class='add'>+		reg_4q = REG_PORT_CTRL_13;</div><div class='add'>+		reg_2q = REG_PORT_CTRL_0;</div><div class='add'>+</div><div class='add'>+		/* TODO: this is legacy from initial KSZ8795 driver, should be</div><div class='add'>+		 * moved to appropriate place in the future.</div><div class='add'>+		 */</div><div class='add'>+		ret = ksz_rmw8(dev, REG_SW_CTRL_19,</div><div class='add'>+			       SW_OUT_RATE_LIMIT_QUEUE_BASED,</div><div class='add'>+			       SW_OUT_RATE_LIMIT_QUEUE_BASED);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (queues == 4)</div><div class='add'>+		data_4q = mask_4q;</div><div class='add'>+	else if (queues == 2)</div><div class='add'>+		data_2q = mask_2q;</div><div class='add'>+</div><div class='add'>+	ret = ksz_prmw8(dev, port, reg_4q, mask_4q, data_4q);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return ksz_prmw8(dev, port, reg_2q, mask_2q, data_2q);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz8_all_queues_split(struct ksz_device *dev, int queues)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds = dev-&gt;ds;</div><div class='add'>+	const struct dsa_port *dp;</div><div class='add'>+</div><div class='add'>+	dsa_switch_for_each_port(dp, ds) {</div><div class='add'>+		int ret = ksz8_port_queue_split(dev, dp-&gt;index, queues);</div><div class='add'>+</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ksz8_r_mib_cnt(struct ksz_device *dev, int port, u16 addr, u64 *cnt)</div><div class='add'>+{</div><div class='add'>+	const u32 *masks;</div><div class='add'>+	const u16 *regs;</div><div class='add'>+	u16 ctrl_addr;</div><div class='add'>+	u32 data;</div><div class='add'>+	u8 check;</div><div class='add'>+	int loop;</div><div class='add'>+</div><div class='add'>+	masks = dev-&gt;info-&gt;masks;</div><div class='add'>+	regs = dev-&gt;info-&gt;regs;</div><div class='add'>+</div><div class='add'>+	ctrl_addr = addr + dev-&gt;info-&gt;reg_mib_cnt * port;</div><div class='add'>+	ctrl_addr |= IND_ACC_TABLE(TABLE_MIB | TABLE_READ);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;alu_mutex);</div><div class='add'>+	ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);</div><div class='add'>+</div><div class='add'>+	/* It is almost guaranteed to always read the valid bit because of</div><div class='add'>+	 * slow SPI speed.</div><div class='add'>+	 */</div><div class='add'>+	for (loop = 2; loop &gt; 0; loop--) {</div><div class='add'>+		ksz_read8(dev, regs[REG_IND_MIB_CHECK], &amp;check);</div><div class='add'>+</div><div class='add'>+		if (check &amp; masks[MIB_COUNTER_VALID]) {</div><div class='add'>+			ksz_read32(dev, regs[REG_IND_DATA_LO], &amp;data);</div><div class='add'>+			if (check &amp; masks[MIB_COUNTER_OVERFLOW])</div><div class='add'>+				*cnt += MIB_COUNTER_VALUE + 1;</div><div class='add'>+			*cnt += data &amp; MIB_COUNTER_VALUE;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;alu_mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz8795_r_mib_pkt(struct ksz_device *dev, int port, u16 addr,</div><div class='add'>+			      u64 *dropped, u64 *cnt)</div><div class='add'>+{</div><div class='add'>+	const u32 *masks;</div><div class='add'>+	const u16 *regs;</div><div class='add'>+	u16 ctrl_addr;</div><div class='add'>+	u32 data;</div><div class='add'>+	u8 check;</div><div class='add'>+	int loop;</div><div class='add'>+</div><div class='add'>+	masks = dev-&gt;info-&gt;masks;</div><div class='add'>+	regs = dev-&gt;info-&gt;regs;</div><div class='add'>+</div><div class='add'>+	addr -= dev-&gt;info-&gt;reg_mib_cnt;</div><div class='add'>+	ctrl_addr = (KSZ8795_MIB_TOTAL_RX_1 - KSZ8795_MIB_TOTAL_RX_0) * port;</div><div class='add'>+	ctrl_addr += addr + KSZ8795_MIB_TOTAL_RX_0;</div><div class='add'>+	ctrl_addr |= IND_ACC_TABLE(TABLE_MIB | TABLE_READ);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;alu_mutex);</div><div class='add'>+	ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);</div><div class='add'>+</div><div class='add'>+	/* It is almost guaranteed to always read the valid bit because of</div><div class='add'>+	 * slow SPI speed.</div><div class='add'>+	 */</div><div class='add'>+	for (loop = 2; loop &gt; 0; loop--) {</div><div class='add'>+		ksz_read8(dev, regs[REG_IND_MIB_CHECK], &amp;check);</div><div class='add'>+</div><div class='add'>+		if (check &amp; masks[MIB_COUNTER_VALID]) {</div><div class='add'>+			ksz_read32(dev, regs[REG_IND_DATA_LO], &amp;data);</div><div class='add'>+			if (addr &lt; 2) {</div><div class='add'>+				u64 total;</div><div class='add'>+</div><div class='add'>+				total = check &amp; MIB_TOTAL_BYTES_H;</div><div class='add'>+				total &lt;&lt;= 32;</div><div class='add'>+				*cnt += total;</div><div class='add'>+				*cnt += data;</div><div class='add'>+				if (check &amp; masks[MIB_COUNTER_OVERFLOW]) {</div><div class='add'>+					total = MIB_TOTAL_BYTES_H + 1;</div><div class='add'>+					total &lt;&lt;= 32;</div><div class='add'>+					*cnt += total;</div><div class='add'>+				}</div><div class='add'>+			} else {</div><div class='add'>+				if (check &amp; masks[MIB_COUNTER_OVERFLOW])</div><div class='add'>+					*cnt += MIB_PACKET_DROPPED + 1;</div><div class='add'>+				*cnt += data &amp; MIB_PACKET_DROPPED;</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;alu_mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz8863_r_mib_pkt(struct ksz_device *dev, int port, u16 addr,</div><div class='add'>+			      u64 *dropped, u64 *cnt)</div><div class='add'>+{</div><div class='add'>+	u32 *last = (u32 *)dropped;</div><div class='add'>+	const u16 *regs;</div><div class='add'>+	u16 ctrl_addr;</div><div class='add'>+	u32 data;</div><div class='add'>+	u32 cur;</div><div class='add'>+</div><div class='add'>+	regs = dev-&gt;info-&gt;regs;</div><div class='add'>+</div><div class='add'>+	addr -= dev-&gt;info-&gt;reg_mib_cnt;</div><div class='add'>+	ctrl_addr = addr ? KSZ8863_MIB_PACKET_DROPPED_TX_0 :</div><div class='add'>+			   KSZ8863_MIB_PACKET_DROPPED_RX_0;</div><div class='add'>+	if (ksz_is_8895_family(dev) &amp;&amp;</div><div class='add'>+	    ctrl_addr == KSZ8863_MIB_PACKET_DROPPED_RX_0)</div><div class='add'>+		ctrl_addr = KSZ8895_MIB_PACKET_DROPPED_RX_0;</div><div class='add'>+	ctrl_addr += port;</div><div class='add'>+	ctrl_addr |= IND_ACC_TABLE(TABLE_MIB | TABLE_READ);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;alu_mutex);</div><div class='add'>+	ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);</div><div class='add'>+	ksz_read32(dev, regs[REG_IND_DATA_LO], &amp;data);</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;alu_mutex);</div><div class='add'>+</div><div class='add'>+	data &amp;= MIB_PACKET_DROPPED;</div><div class='add'>+	cur = last[addr];</div><div class='add'>+	if (data != cur) {</div><div class='add'>+		last[addr] = data;</div><div class='add'>+		if (data &lt; cur)</div><div class='add'>+			data += MIB_PACKET_DROPPED + 1;</div><div class='add'>+		data -= cur;</div><div class='add'>+		*cnt += data;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ksz8_r_mib_pkt(struct ksz_device *dev, int port, u16 addr,</div><div class='add'>+		    u64 *dropped, u64 *cnt)</div><div class='add'>+{</div><div class='add'>+	if (is_ksz88xx(dev))</div><div class='add'>+		ksz8863_r_mib_pkt(dev, port, addr, dropped, cnt);</div><div class='add'>+	else</div><div class='add'>+		ksz8795_r_mib_pkt(dev, port, addr, dropped, cnt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ksz8_freeze_mib(struct ksz_device *dev, int port, bool freeze)</div><div class='add'>+{</div><div class='add'>+	if (is_ksz88xx(dev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* enable the port for flush/freeze function */</div><div class='add'>+	if (freeze)</div><div class='add'>+		ksz_cfg(dev, REG_SW_CTRL_6, BIT(port), true);</div><div class='add'>+	ksz_cfg(dev, REG_SW_CTRL_6, SW_MIB_COUNTER_FREEZE, freeze);</div><div class='add'>+</div><div class='add'>+	/* disable the port after freeze is done */</div><div class='add'>+	if (!freeze)</div><div class='add'>+		ksz_cfg(dev, REG_SW_CTRL_6, BIT(port), false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ksz8_port_init_cnt(struct ksz_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	struct ksz_port_mib *mib = &amp;dev-&gt;ports[port].mib;</div><div class='add'>+	u64 *dropped;</div><div class='add'>+</div><div class='add'>+	/* For KSZ8795 family. */</div><div class='add'>+	if (ksz_is_ksz87xx(dev)) {</div><div class='add'>+		/* flush all enabled port MIB counters */</div><div class='add'>+		ksz_cfg(dev, REG_SW_CTRL_6, BIT(port), true);</div><div class='add'>+		ksz_cfg(dev, REG_SW_CTRL_6, SW_MIB_COUNTER_FLUSH, true);</div><div class='add'>+		ksz_cfg(dev, REG_SW_CTRL_6, BIT(port), false);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mib-&gt;cnt_ptr = 0;</div><div class='add'>+</div><div class='add'>+	/* Some ports may not have MIB counters before SWITCH_COUNTER_NUM. */</div><div class='add'>+	while (mib-&gt;cnt_ptr &lt; dev-&gt;info-&gt;reg_mib_cnt) {</div><div class='add'>+		dev-&gt;dev_ops-&gt;r_mib_cnt(dev, port, mib-&gt;cnt_ptr,</div><div class='add'>+					&amp;mib-&gt;counters[mib-&gt;cnt_ptr]);</div><div class='add'>+		++mib-&gt;cnt_ptr;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* last one in storage */</div><div class='add'>+	dropped = &amp;mib-&gt;counters[dev-&gt;info-&gt;mib_cnt];</div><div class='add'>+</div><div class='add'>+	/* Some ports may not have MIB counters after SWITCH_COUNTER_NUM. */</div><div class='add'>+	while (mib-&gt;cnt_ptr &lt; dev-&gt;info-&gt;mib_cnt) {</div><div class='add'>+		dev-&gt;dev_ops-&gt;r_mib_pkt(dev, port, mib-&gt;cnt_ptr,</div><div class='add'>+					dropped, &amp;mib-&gt;counters[mib-&gt;cnt_ptr]);</div><div class='add'>+		++mib-&gt;cnt_ptr;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz8_r_table(struct ksz_device *dev, int table, u16 addr, u64 *data)</div><div class='add'>+{</div><div class='add'>+	const u16 *regs;</div><div class='add'>+	u16 ctrl_addr;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	regs = dev-&gt;info-&gt;regs;</div><div class='add'>+</div><div class='add'>+	ctrl_addr = IND_ACC_TABLE(table | TABLE_READ) | addr;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;alu_mutex);</div><div class='add'>+	ret = ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unlock_alu;</div><div class='add'>+</div><div class='add'>+	ret = ksz_read64(dev, regs[REG_IND_DATA_HI], data);</div><div class='add'>+unlock_alu:</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;alu_mutex);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz8_w_table(struct ksz_device *dev, int table, u16 addr, u64 data)</div><div class='add'>+{</div><div class='add'>+	const u16 *regs;</div><div class='add'>+	u16 ctrl_addr;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	regs = dev-&gt;info-&gt;regs;</div><div class='add'>+</div><div class='add'>+	ctrl_addr = IND_ACC_TABLE(table) | addr;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;alu_mutex);</div><div class='add'>+	ret = ksz_write64(dev, regs[REG_IND_DATA_HI], data);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unlock_alu;</div><div class='add'>+</div><div class='add'>+	ret = ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);</div><div class='add'>+unlock_alu:</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;alu_mutex);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz8_valid_dyn_entry(struct ksz_device *dev, u8 *data)</div><div class='add'>+{</div><div class='add'>+	int timeout = 100;</div><div class='add'>+	const u32 *masks;</div><div class='add'>+	const u16 *regs;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	masks = dev-&gt;info-&gt;masks;</div><div class='add'>+	regs = dev-&gt;info-&gt;regs;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		ret = ksz_read8(dev, regs[REG_IND_DATA_CHECK], data);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		timeout--;</div><div class='add'>+	} while ((*data &amp; masks[DYNAMIC_MAC_TABLE_NOT_READY]) &amp;&amp; timeout);</div><div class='add'>+</div><div class='add'>+	/* Entry is not ready for accessing. */</div><div class='add'>+	if (*data &amp; masks[DYNAMIC_MAC_TABLE_NOT_READY])</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+	/* Entry is ready for accessing. */</div><div class='add'>+	return ksz_read8(dev, regs[REG_IND_DATA_8], data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz8_r_dyn_mac_table(struct ksz_device *dev, u16 addr, u8 *mac_addr,</div><div class='add'>+				u8 *fid, u8 *src_port, u16 *entries)</div><div class='add'>+{</div><div class='add'>+	u32 data_hi, data_lo;</div><div class='add'>+	const u8 *shifts;</div><div class='add'>+	const u32 *masks;</div><div class='add'>+	const u16 *regs;</div><div class='add'>+	u16 ctrl_addr;</div><div class='add'>+	u64 buf = 0;</div><div class='add'>+	u8 data;</div><div class='add'>+	int cnt;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	shifts = dev-&gt;info-&gt;shifts;</div><div class='add'>+	masks = dev-&gt;info-&gt;masks;</div><div class='add'>+	regs = dev-&gt;info-&gt;regs;</div><div class='add'>+</div><div class='add'>+	ctrl_addr = IND_ACC_TABLE(TABLE_DYNAMIC_MAC | TABLE_READ) | addr;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;alu_mutex);</div><div class='add'>+	ret = ksz_write16(dev, regs[REG_IND_CTRL_0], ctrl_addr);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unlock_alu;</div><div class='add'>+</div><div class='add'>+	ret = ksz8_valid_dyn_entry(dev, &amp;data);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unlock_alu;</div><div class='add'>+</div><div class='add'>+	if (data &amp; masks[DYNAMIC_MAC_TABLE_MAC_EMPTY]) {</div><div class='add'>+		*entries = 0;</div><div class='add'>+		goto unlock_alu;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ksz_read64(dev, regs[REG_IND_DATA_HI], &amp;buf);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unlock_alu;</div><div class='add'>+</div><div class='add'>+	data_hi = (u32)(buf &gt;&gt; 32);</div><div class='add'>+	data_lo = (u32)buf;</div><div class='add'>+</div><div class='add'>+	/* Check out how many valid entry in the table. */</div><div class='add'>+	cnt = data &amp; masks[DYNAMIC_MAC_TABLE_ENTRIES_H];</div><div class='add'>+	cnt &lt;&lt;= shifts[DYNAMIC_MAC_ENTRIES_H];</div><div class='add'>+	cnt |= (data_hi &amp; masks[DYNAMIC_MAC_TABLE_ENTRIES]) &gt;&gt;</div><div class='add'>+		shifts[DYNAMIC_MAC_ENTRIES];</div><div class='add'>+	*entries = cnt + 1;</div><div class='add'>+</div><div class='add'>+	*fid = (data_hi &amp; masks[DYNAMIC_MAC_TABLE_FID]) &gt;&gt;</div><div class='add'>+		shifts[DYNAMIC_MAC_FID];</div><div class='add'>+	*src_port = (data_hi &amp; masks[DYNAMIC_MAC_TABLE_SRC_PORT]) &gt;&gt;</div><div class='add'>+		shifts[DYNAMIC_MAC_SRC_PORT];</div><div class='add'>+</div><div class='add'>+	mac_addr[5] = (u8)data_lo;</div><div class='add'>+	mac_addr[4] = (u8)(data_lo &gt;&gt; 8);</div><div class='add'>+	mac_addr[3] = (u8)(data_lo &gt;&gt; 16);</div><div class='add'>+	mac_addr[2] = (u8)(data_lo &gt;&gt; 24);</div><div class='add'>+</div><div class='add'>+	mac_addr[1] = (u8)data_hi;</div><div class='add'>+	mac_addr[0] = (u8)(data_hi &gt;&gt; 8);</div><div class='add'>+</div><div class='add'>+unlock_alu:</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;alu_mutex);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz8_r_sta_mac_table(struct ksz_device *dev, u16 addr,</div><div class='add'>+				struct alu_struct *alu, bool *valid)</div><div class='add'>+{</div><div class='add'>+	u32 data_hi, data_lo;</div><div class='add'>+	const u8 *shifts;</div><div class='add'>+	const u32 *masks;</div><div class='add'>+	u64 data;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	shifts = dev-&gt;info-&gt;shifts;</div><div class='add'>+	masks = dev-&gt;info-&gt;masks;</div><div class='add'>+</div><div class='add'>+	ret = ksz8_r_table(dev, TABLE_STATIC_MAC, addr, &amp;data);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	data_hi = data &gt;&gt; 32;</div><div class='add'>+	data_lo = (u32)data;</div><div class='add'>+</div><div class='add'>+	if (!(data_hi &amp; (masks[STATIC_MAC_TABLE_VALID] |</div><div class='add'>+			 masks[STATIC_MAC_TABLE_OVERRIDE]))) {</div><div class='add'>+		*valid = false;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	alu-&gt;mac[5] = (u8)data_lo;</div><div class='add'>+	alu-&gt;mac[4] = (u8)(data_lo &gt;&gt; 8);</div><div class='add'>+	alu-&gt;mac[3] = (u8)(data_lo &gt;&gt; 16);</div><div class='add'>+	alu-&gt;mac[2] = (u8)(data_lo &gt;&gt; 24);</div><div class='add'>+	alu-&gt;mac[1] = (u8)data_hi;</div><div class='add'>+	alu-&gt;mac[0] = (u8)(data_hi &gt;&gt; 8);</div><div class='add'>+	alu-&gt;port_forward =</div><div class='add'>+		(data_hi &amp; masks[STATIC_MAC_TABLE_FWD_PORTS]) &gt;&gt;</div><div class='add'>+			shifts[STATIC_MAC_FWD_PORTS];</div><div class='add'>+	alu-&gt;is_override = (data_hi &amp; masks[STATIC_MAC_TABLE_OVERRIDE]) ? 1 : 0;</div><div class='add'>+</div><div class='add'>+	/* KSZ8795/KSZ8895 family switches have STATIC_MAC_TABLE_USE_FID and</div><div class='add'>+	 * STATIC_MAC_TABLE_FID definitions off by 1 when doing read on the</div><div class='add'>+	 * static MAC table compared to doing write.</div><div class='add'>+	 */</div><div class='add'>+	if (ksz_is_ksz87xx(dev) || ksz_is_8895_family(dev))</div><div class='add'>+		data_hi &gt;&gt;= 1;</div><div class='add'>+	alu-&gt;is_static = true;</div><div class='add'>+	alu-&gt;is_use_fid = (data_hi &amp; masks[STATIC_MAC_TABLE_USE_FID]) ? 1 : 0;</div><div class='add'>+	alu-&gt;fid = (data_hi &amp; masks[STATIC_MAC_TABLE_FID]) &gt;&gt;</div><div class='add'>+		shifts[STATIC_MAC_FID];</div><div class='add'>+</div><div class='add'>+	*valid = true;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz8_w_sta_mac_table(struct ksz_device *dev, u16 addr,</div><div class='add'>+				struct alu_struct *alu)</div><div class='add'>+{</div><div class='add'>+	u32 data_hi, data_lo;</div><div class='add'>+	const u8 *shifts;</div><div class='add'>+	const u32 *masks;</div><div class='add'>+	u64 data;</div><div class='add'>+</div><div class='add'>+	shifts = dev-&gt;info-&gt;shifts;</div><div class='add'>+	masks = dev-&gt;info-&gt;masks;</div><div class='add'>+</div><div class='add'>+	data_lo = ((u32)alu-&gt;mac[2] &lt;&lt; 24) |</div><div class='add'>+		((u32)alu-&gt;mac[3] &lt;&lt; 16) |</div><div class='add'>+		((u32)alu-&gt;mac[4] &lt;&lt; 8) | alu-&gt;mac[5];</div><div class='add'>+	data_hi = ((u32)alu-&gt;mac[0] &lt;&lt; 8) | alu-&gt;mac[1];</div><div class='add'>+	data_hi |= (u32)alu-&gt;port_forward &lt;&lt; shifts[STATIC_MAC_FWD_PORTS];</div><div class='add'>+</div><div class='add'>+	if (alu-&gt;is_override)</div><div class='add'>+		data_hi |= masks[STATIC_MAC_TABLE_OVERRIDE];</div><div class='add'>+	if (alu-&gt;is_use_fid) {</div><div class='add'>+		data_hi |= masks[STATIC_MAC_TABLE_USE_FID];</div><div class='add'>+		data_hi |= (u32)alu-&gt;fid &lt;&lt; shifts[STATIC_MAC_FID];</div><div class='add'>+	}</div><div class='add'>+	if (alu-&gt;is_static)</div><div class='add'>+		data_hi |= masks[STATIC_MAC_TABLE_VALID];</div><div class='add'>+	else</div><div class='add'>+		data_hi &amp;= ~masks[STATIC_MAC_TABLE_OVERRIDE];</div><div class='add'>+</div><div class='add'>+	data = (u64)data_hi &lt;&lt; 32 | data_lo;</div><div class='add'>+</div><div class='add'>+	return ksz8_w_table(dev, TABLE_STATIC_MAC, addr, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz8_from_vlan(struct ksz_device *dev, u32 vlan, u8 *fid,</div><div class='add'>+			   u8 *member, u8 *valid)</div><div class='add'>+{</div><div class='add'>+	const u8 *shifts;</div><div class='add'>+	const u32 *masks;</div><div class='add'>+</div><div class='add'>+	shifts = dev-&gt;info-&gt;shifts;</div><div class='add'>+	masks = dev-&gt;info-&gt;masks;</div><div class='add'>+</div><div class='add'>+	*fid = vlan &amp; masks[VLAN_TABLE_FID];</div><div class='add'>+	*member = (vlan &amp; masks[VLAN_TABLE_MEMBERSHIP]) &gt;&gt;</div><div class='add'>+			shifts[VLAN_TABLE_MEMBERSHIP_S];</div><div class='add'>+	*valid = !!(vlan &amp; masks[VLAN_TABLE_VALID]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz8_to_vlan(struct ksz_device *dev, u8 fid, u8 member, u8 valid,</div><div class='add'>+			 u16 *vlan)</div><div class='add'>+{</div><div class='add'>+	const u8 *shifts;</div><div class='add'>+	const u32 *masks;</div><div class='add'>+</div><div class='add'>+	shifts = dev-&gt;info-&gt;shifts;</div><div class='add'>+	masks = dev-&gt;info-&gt;masks;</div><div class='add'>+</div><div class='add'>+	*vlan = fid;</div><div class='add'>+	*vlan |= (u16)member &lt;&lt; shifts[VLAN_TABLE_MEMBERSHIP_S];</div><div class='add'>+	if (valid)</div><div class='add'>+		*vlan |= masks[VLAN_TABLE_VALID];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz8_r_vlan_entries(struct ksz_device *dev, u16 addr)</div><div class='add'>+{</div><div class='add'>+	const u8 *shifts;</div><div class='add'>+	u64 data;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	shifts = dev-&gt;info-&gt;shifts;</div><div class='add'>+</div><div class='add'>+	ksz8_r_table(dev, TABLE_VLAN, addr, &amp;data);</div><div class='add'>+	addr *= 4;</div><div class='add'>+	for (i = 0; i &lt; 4; i++) {</div><div class='add'>+		dev-&gt;vlan_cache[addr + i].table[0] = (u16)data;</div><div class='add'>+		data &gt;&gt;= shifts[VLAN_TABLE];</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz8_r_vlan_table(struct ksz_device *dev, u16 vid, u16 *vlan)</div><div class='add'>+{</div><div class='add'>+	int index;</div><div class='add'>+	u16 *data;</div><div class='add'>+	u16 addr;</div><div class='add'>+	u64 buf;</div><div class='add'>+</div><div class='add'>+	data = (u16 *)&amp;buf;</div><div class='add'>+	addr = vid / 4;</div><div class='add'>+	index = vid &amp; 3;</div><div class='add'>+	ksz8_r_table(dev, TABLE_VLAN, addr, &amp;buf);</div><div class='add'>+	*vlan = data[index];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz8_w_vlan_table(struct ksz_device *dev, u16 vid, u16 vlan)</div><div class='add'>+{</div><div class='add'>+	int index;</div><div class='add'>+	u16 *data;</div><div class='add'>+	u16 addr;</div><div class='add'>+	u64 buf;</div><div class='add'>+</div><div class='add'>+	data = (u16 *)&amp;buf;</div><div class='add'>+	addr = vid / 4;</div><div class='add'>+	index = vid &amp; 3;</div><div class='add'>+	ksz8_r_table(dev, TABLE_VLAN, addr, &amp;buf);</div><div class='add'>+	data[index] = vlan;</div><div class='add'>+	dev-&gt;vlan_cache[vid].table[0] = vlan;</div><div class='add'>+	ksz8_w_table(dev, TABLE_VLAN, addr, buf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz879x_get_loopback - KSZ879x specific function to get loopback</div><div class='add'>+ *                        configuration status for a specific port</div><div class='add'>+ * @dev: Pointer to the device structure</div><div class='add'>+ * @port: Port number to query</div><div class='add'>+ * @val: Pointer to store the result</div><div class='add'>+ *</div><div class='add'>+ * This function reads the SMI registers to determine whether loopback mode</div><div class='add'>+ * is enabled for a specific port.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int ksz879x_get_loopback(struct ksz_device *dev, u16 port,</div><div class='add'>+				u16 *val)</div><div class='add'>+{</div><div class='add'>+	u8 stat3;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = ksz_pread8(dev, port, REG_PORT_STATUS_3, &amp;stat3);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (stat3 &amp; PORT_PHY_LOOPBACK)</div><div class='add'>+		*val |= BMCR_LOOPBACK;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz879x_set_loopback - KSZ879x specific function  to set loopback mode for</div><div class='add'>+ *			  a specific port</div><div class='add'>+ * @dev: Pointer to the device structure.</div><div class='add'>+ * @port: Port number to modify.</div><div class='add'>+ * @val: Value indicating whether to enable or disable loopback mode.</div><div class='add'>+ *</div><div class='add'>+ * This function translates loopback bit of the BMCR register into the</div><div class='add'>+ * corresponding hardware register bit value and writes it to the SMI interface.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int ksz879x_set_loopback(struct ksz_device *dev, u16 port, u16 val)</div><div class='add'>+{</div><div class='add'>+	u8 stat3 = 0;</div><div class='add'>+</div><div class='add'>+	if (val &amp; BMCR_LOOPBACK)</div><div class='add'>+		stat3 |= PORT_PHY_LOOPBACK;</div><div class='add'>+</div><div class='add'>+	return ksz_prmw8(dev, port, REG_PORT_STATUS_3, PORT_PHY_LOOPBACK,</div><div class='add'>+			 stat3);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz8_r_phy_ctrl - Translates and reads from the SMI interface to a MIIM PHY</div><div class='add'>+ *		     Control register (Reg. 31).</div><div class='add'>+ * @dev: The KSZ device instance.</div><div class='add'>+ * @port: The port number to be read.</div><div class='add'>+ * @val: The value read from the SMI interface.</div><div class='add'>+ *</div><div class='add'>+ * This function reads the SMI interface and translates the hardware register</div><div class='add'>+ * bit values into their corresponding control settings for a MIIM PHY Control</div><div class='add'>+ * register.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int ksz8_r_phy_ctrl(struct ksz_device *dev, int port, u16 *val)</div><div class='add'>+{</div><div class='add'>+	const u16 *regs = dev-&gt;info-&gt;regs;</div><div class='add'>+	u8 reg_val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	*val = 0;</div><div class='add'>+</div><div class='add'>+	ret = ksz_pread8(dev, port, regs[P_LINK_STATUS], &amp;reg_val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (reg_val &amp; PORT_MDIX_STATUS)</div><div class='add'>+		*val |= KSZ886X_CTRL_MDIX_STAT;</div><div class='add'>+</div><div class='add'>+	ret = ksz_pread8(dev, port, REG_PORT_LINK_MD_CTRL, &amp;reg_val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (reg_val &amp; PORT_FORCE_LINK)</div><div class='add'>+		*val |= KSZ886X_CTRL_FORCE_LINK;</div><div class='add'>+</div><div class='add'>+	if (reg_val &amp; PORT_POWER_SAVING)</div><div class='add'>+		*val |= KSZ886X_CTRL_PWRSAVE;</div><div class='add'>+</div><div class='add'>+	if (reg_val &amp; PORT_PHY_REMOTE_LOOPBACK)</div><div class='add'>+		*val |= KSZ886X_CTRL_REMOTE_LOOPBACK;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz8_r_phy_bmcr - Translates and reads from the SMI interface to a MIIM PHY</div><div class='add'>+ *		     Basic mode control register (Reg. 0).</div><div class='add'>+ * @dev: The KSZ device instance.</div><div class='add'>+ * @port: The port number to be read.</div><div class='add'>+ * @val: The value read from the SMI interface.</div><div class='add'>+ *</div><div class='add'>+ * This function reads the SMI interface and translates the hardware register</div><div class='add'>+ * bit values into their corresponding control settings for a MIIM PHY Basic</div><div class='add'>+ * mode control register.</div><div class='add'>+ *</div><div class='add'>+ * MIIM Bit Mapping Comparison between KSZ8794 and KSZ8873</div><div class='add'>+ * -------------------------------------------------------------------</div><div class='add'>+ * MIIM Bit                    | KSZ8794 Reg/Bit             | KSZ8873 Reg/Bit</div><div class='add'>+ * ----------------------------+-----------------------------+----------------</div><div class='add'>+ * Bit 15 - Soft Reset         | 0xF/4                       | Not supported</div><div class='add'>+ * Bit 14 - Loopback           | 0xD/0 (MAC), 0xF/7 (PHY)    ~ 0xD/0 (PHY)</div><div class='add'>+ * Bit 13 - Force 100          | 0xC/6                       = 0xC/6</div><div class='add'>+ * Bit 12 - AN Enable          | 0xC/7 (reverse logic)       ~ 0xC/7</div><div class='add'>+ * Bit 11 - Power Down         | 0xD/3                       = 0xD/3</div><div class='add'>+ * Bit 10 - PHY Isolate        | 0xF/5                       | Not supported</div><div class='add'>+ * Bit 9 - Restart AN          | 0xD/5                       = 0xD/5</div><div class='add'>+ * Bit 8 - Force Full-Duplex   | 0xC/5                       = 0xC/5</div><div class='add'>+ * Bit 7 - Collision Test/Res. | Not supported               | Not supported</div><div class='add'>+ * Bit 6 - Reserved            | Not supported               | Not supported</div><div class='add'>+ * Bit 5 - Hp_mdix             | 0x9/7                       ~ 0xF/7</div><div class='add'>+ * Bit 4 - Force MDI           | 0xD/1                       = 0xD/1</div><div class='add'>+ * Bit 3 - Disable MDIX        | 0xD/2                       = 0xD/2</div><div class='add'>+ * Bit 2 - Disable Far-End F.  | ????                        | 0xD/4</div><div class='add'>+ * Bit 1 - Disable Transmit    | 0xD/6                       = 0xD/6</div><div class='add'>+ * Bit 0 - Disable LED         | 0xD/7                       = 0xD/7</div><div class='add'>+ * -------------------------------------------------------------------</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int ksz8_r_phy_bmcr(struct ksz_device *dev, u16 port, u16 *val)</div><div class='add'>+{</div><div class='add'>+	const u16 *regs = dev-&gt;info-&gt;regs;</div><div class='add'>+	u8 restart, speed, ctrl;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	*val = 0;</div><div class='add'>+</div><div class='add'>+	ret = ksz_pread8(dev, port, regs[P_NEG_RESTART_CTRL], &amp;restart);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ksz_pread8(dev, port, regs[P_SPEED_STATUS], &amp;speed);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ksz_pread8(dev, port, regs[P_FORCE_CTRL], &amp;ctrl);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (ctrl &amp; PORT_FORCE_100_MBIT)</div><div class='add'>+		*val |= BMCR_SPEED100;</div><div class='add'>+</div><div class='add'>+	if (ksz_is_ksz88x3(dev)) {</div><div class='add'>+		if (restart &amp; KSZ8873_PORT_PHY_LOOPBACK)</div><div class='add'>+			*val |= BMCR_LOOPBACK;</div><div class='add'>+</div><div class='add'>+		if ((ctrl &amp; PORT_AUTO_NEG_ENABLE))</div><div class='add'>+			*val |= BMCR_ANENABLE;</div><div class='add'>+	} else {</div><div class='add'>+		ret = ksz879x_get_loopback(dev, port, val);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		if (!(ctrl &amp; PORT_AUTO_NEG_DISABLE))</div><div class='add'>+			*val |= BMCR_ANENABLE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (restart &amp; PORT_POWER_DOWN)</div><div class='add'>+		*val |= BMCR_PDOWN;</div><div class='add'>+</div><div class='add'>+	if (restart &amp; PORT_AUTO_NEG_RESTART)</div><div class='add'>+		*val |= BMCR_ANRESTART;</div><div class='add'>+</div><div class='add'>+	if (ctrl &amp; PORT_FORCE_FULL_DUPLEX)</div><div class='add'>+		*val |= BMCR_FULLDPLX;</div><div class='add'>+</div><div class='add'>+	if (speed &amp; PORT_HP_MDIX)</div><div class='add'>+		*val |= KSZ886X_BMCR_HP_MDIX;</div><div class='add'>+</div><div class='add'>+	if (restart &amp; PORT_FORCE_MDIX)</div><div class='add'>+		*val |= KSZ886X_BMCR_FORCE_MDI;</div><div class='add'>+</div><div class='add'>+	if (restart &amp; PORT_AUTO_MDIX_DISABLE)</div><div class='add'>+		*val |= KSZ886X_BMCR_DISABLE_AUTO_MDIX;</div><div class='add'>+</div><div class='add'>+	if (restart &amp; PORT_TX_DISABLE)</div><div class='add'>+		*val |= KSZ886X_BMCR_DISABLE_TRANSMIT;</div><div class='add'>+</div><div class='add'>+	if (restart &amp; PORT_LED_OFF)</div><div class='add'>+		*val |= KSZ886X_BMCR_DISABLE_LED;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz8_r_phy(struct ksz_device *dev, u16 phy, u16 reg, u16 *val)</div><div class='add'>+{</div><div class='add'>+	u8 ctrl, link, val1, val2;</div><div class='add'>+	int processed = true;</div><div class='add'>+	const u16 *regs;</div><div class='add'>+	u16 data = 0;</div><div class='add'>+	u16 p = phy;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	regs = dev-&gt;info-&gt;regs;</div><div class='add'>+</div><div class='add'>+	switch (reg) {</div><div class='add'>+	case MII_BMCR:</div><div class='add'>+		ret = ksz8_r_phy_bmcr(dev, p, &amp;data);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+		break;</div><div class='add'>+	case MII_BMSR:</div><div class='add'>+		ret = ksz_pread8(dev, p, regs[P_LINK_STATUS], &amp;link);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		data = BMSR_100FULL |</div><div class='add'>+		       BMSR_100HALF |</div><div class='add'>+		       BMSR_10FULL |</div><div class='add'>+		       BMSR_10HALF |</div><div class='add'>+		       BMSR_ANEGCAPABLE;</div><div class='add'>+		if (link &amp; PORT_AUTO_NEG_COMPLETE)</div><div class='add'>+			data |= BMSR_ANEGCOMPLETE;</div><div class='add'>+		if (link &amp; PORT_STAT_LINK_GOOD)</div><div class='add'>+			data |= BMSR_LSTATUS;</div><div class='add'>+		break;</div><div class='add'>+	case MII_PHYSID1:</div><div class='add'>+		data = KSZ8795_ID_HI;</div><div class='add'>+		break;</div><div class='add'>+	case MII_PHYSID2:</div><div class='add'>+		if (ksz_is_ksz88x3(dev))</div><div class='add'>+			data = KSZ8863_ID_LO;</div><div class='add'>+		else</div><div class='add'>+			data = KSZ8795_ID_LO;</div><div class='add'>+		break;</div><div class='add'>+	case MII_ADVERTISE:</div><div class='add'>+		ret = ksz_pread8(dev, p, regs[P_LOCAL_CTRL], &amp;ctrl);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		data = ADVERTISE_CSMA;</div><div class='add'>+		if (ctrl &amp; PORT_AUTO_NEG_SYM_PAUSE)</div><div class='add'>+			data |= ADVERTISE_PAUSE_CAP;</div><div class='add'>+		if (ctrl &amp; PORT_AUTO_NEG_100BTX_FD)</div><div class='add'>+			data |= ADVERTISE_100FULL;</div><div class='add'>+		if (ctrl &amp; PORT_AUTO_NEG_100BTX)</div><div class='add'>+			data |= ADVERTISE_100HALF;</div><div class='add'>+		if (ctrl &amp; PORT_AUTO_NEG_10BT_FD)</div><div class='add'>+			data |= ADVERTISE_10FULL;</div><div class='add'>+		if (ctrl &amp; PORT_AUTO_NEG_10BT)</div><div class='add'>+			data |= ADVERTISE_10HALF;</div><div class='add'>+		break;</div><div class='add'>+	case MII_LPA:</div><div class='add'>+		ret = ksz_pread8(dev, p, regs[P_REMOTE_STATUS], &amp;link);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		data = LPA_SLCT;</div><div class='add'>+		if (link &amp; PORT_REMOTE_SYM_PAUSE)</div><div class='add'>+			data |= LPA_PAUSE_CAP;</div><div class='add'>+		if (link &amp; PORT_REMOTE_100BTX_FD)</div><div class='add'>+			data |= LPA_100FULL;</div><div class='add'>+		if (link &amp; PORT_REMOTE_100BTX)</div><div class='add'>+			data |= LPA_100HALF;</div><div class='add'>+		if (link &amp; PORT_REMOTE_10BT_FD)</div><div class='add'>+			data |= LPA_10FULL;</div><div class='add'>+		if (link &amp; PORT_REMOTE_10BT)</div><div class='add'>+			data |= LPA_10HALF;</div><div class='add'>+		if (data &amp; ~LPA_SLCT)</div><div class='add'>+			data |= LPA_LPACK;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_REG_LINK_MD:</div><div class='add'>+		ret = ksz_pread8(dev, p, REG_PORT_LINK_MD_CTRL, &amp;val1);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		ret = ksz_pread8(dev, p, REG_PORT_LINK_MD_RESULT, &amp;val2);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		if (val1 &amp; PORT_START_CABLE_DIAG)</div><div class='add'>+			data |= PHY_START_CABLE_DIAG;</div><div class='add'>+</div><div class='add'>+		if (val1 &amp; PORT_CABLE_10M_SHORT)</div><div class='add'>+			data |= PHY_CABLE_10M_SHORT;</div><div class='add'>+</div><div class='add'>+		data |= FIELD_PREP(PHY_CABLE_DIAG_RESULT_M,</div><div class='add'>+				FIELD_GET(PORT_CABLE_DIAG_RESULT_M, val1));</div><div class='add'>+</div><div class='add'>+		data |= FIELD_PREP(PHY_CABLE_FAULT_COUNTER_M,</div><div class='add'>+				(FIELD_GET(PORT_CABLE_FAULT_COUNTER_H, val1) &lt;&lt; 8) |</div><div class='add'>+				FIELD_GET(PORT_CABLE_FAULT_COUNTER_L, val2));</div><div class='add'>+		break;</div><div class='add'>+	case PHY_REG_PHY_CTRL:</div><div class='add'>+		ret = ksz8_r_phy_ctrl(dev, p, &amp;data);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		processed = false;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	if (processed)</div><div class='add'>+		*val = data;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz8_w_phy_ctrl - Translates and writes to the SMI interface from a MIIM PHY</div><div class='add'>+ *		     Control register (Reg. 31).</div><div class='add'>+ * @dev: The KSZ device instance.</div><div class='add'>+ * @port: The port number to be configured.</div><div class='add'>+ * @val: The register value to be written.</div><div class='add'>+ *</div><div class='add'>+ * This function translates control settings from a MIIM PHY Control register</div><div class='add'>+ * into their corresponding hardware register bit values for the SMI</div><div class='add'>+ * interface.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int ksz8_w_phy_ctrl(struct ksz_device *dev, int port, u16 val)</div><div class='add'>+{</div><div class='add'>+	u8 reg_val = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (val &amp; KSZ886X_CTRL_FORCE_LINK)</div><div class='add'>+		reg_val |= PORT_FORCE_LINK;</div><div class='add'>+</div><div class='add'>+	if (val &amp; KSZ886X_CTRL_PWRSAVE)</div><div class='add'>+		reg_val |= PORT_POWER_SAVING;</div><div class='add'>+</div><div class='add'>+	if (val &amp; KSZ886X_CTRL_REMOTE_LOOPBACK)</div><div class='add'>+		reg_val |= PORT_PHY_REMOTE_LOOPBACK;</div><div class='add'>+</div><div class='add'>+	ret = ksz_prmw8(dev, port, REG_PORT_LINK_MD_CTRL, PORT_FORCE_LINK |</div><div class='add'>+			PORT_POWER_SAVING | PORT_PHY_REMOTE_LOOPBACK, reg_val);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz8_w_phy_bmcr - Translates and writes to the SMI interface from a MIIM PHY</div><div class='add'>+ *		     Basic mode control register (Reg. 0).</div><div class='add'>+ * @dev: The KSZ device instance.</div><div class='add'>+ * @port: The port number to be configured.</div><div class='add'>+ * @val: The register value to be written.</div><div class='add'>+ *</div><div class='add'>+ * This function translates control settings from a MIIM PHY Basic mode control</div><div class='add'>+ * register into their corresponding hardware register bit values for the SMI</div><div class='add'>+ * interface.</div><div class='add'>+ *</div><div class='add'>+ * MIIM Bit Mapping Comparison between KSZ8794 and KSZ8873</div><div class='add'>+ * -------------------------------------------------------------------</div><div class='add'>+ * MIIM Bit                    | KSZ8794 Reg/Bit             | KSZ8873 Reg/Bit</div><div class='add'>+ * ----------------------------+-----------------------------+----------------</div><div class='add'>+ * Bit 15 - Soft Reset         | 0xF/4                       | Not supported</div><div class='add'>+ * Bit 14 - Loopback           | 0xD/0 (MAC), 0xF/7 (PHY)    ~ 0xD/0 (PHY)</div><div class='add'>+ * Bit 13 - Force 100          | 0xC/6                       = 0xC/6</div><div class='add'>+ * Bit 12 - AN Enable          | 0xC/7 (reverse logic)       ~ 0xC/7</div><div class='add'>+ * Bit 11 - Power Down         | 0xD/3                       = 0xD/3</div><div class='add'>+ * Bit 10 - PHY Isolate        | 0xF/5                       | Not supported</div><div class='add'>+ * Bit 9 - Restart AN          | 0xD/5                       = 0xD/5</div><div class='add'>+ * Bit 8 - Force Full-Duplex   | 0xC/5                       = 0xC/5</div><div class='add'>+ * Bit 7 - Collision Test/Res. | Not supported               | Not supported</div><div class='add'>+ * Bit 6 - Reserved            | Not supported               | Not supported</div><div class='add'>+ * Bit 5 - Hp_mdix             | 0x9/7                       ~ 0xF/7</div><div class='add'>+ * Bit 4 - Force MDI           | 0xD/1                       = 0xD/1</div><div class='add'>+ * Bit 3 - Disable MDIX        | 0xD/2                       = 0xD/2</div><div class='add'>+ * Bit 2 - Disable Far-End F.  | ????                        | 0xD/4</div><div class='add'>+ * Bit 1 - Disable Transmit    | 0xD/6                       = 0xD/6</div><div class='add'>+ * Bit 0 - Disable LED         | 0xD/7                       = 0xD/7</div><div class='add'>+ * -------------------------------------------------------------------</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int ksz8_w_phy_bmcr(struct ksz_device *dev, u16 port, u16 val)</div><div class='add'>+{</div><div class='add'>+	u8 restart, speed, ctrl, restart_mask;</div><div class='add'>+	const u16 *regs = dev-&gt;info-&gt;regs;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Do not support PHY reset function. */</div><div class='add'>+	if (val &amp; BMCR_RESET)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	speed = 0;</div><div class='add'>+	if (val &amp; KSZ886X_BMCR_HP_MDIX)</div><div class='add'>+		speed |= PORT_HP_MDIX;</div><div class='add'>+</div><div class='add'>+	ret = ksz_prmw8(dev, port, regs[P_SPEED_STATUS], PORT_HP_MDIX, speed);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ctrl = 0;</div><div class='add'>+	if (ksz_is_ksz88x3(dev)) {</div><div class='add'>+		if ((val &amp; BMCR_ANENABLE))</div><div class='add'>+			ctrl |= PORT_AUTO_NEG_ENABLE;</div><div class='add'>+	} else {</div><div class='add'>+		if (!(val &amp; BMCR_ANENABLE))</div><div class='add'>+			ctrl |= PORT_AUTO_NEG_DISABLE;</div><div class='add'>+</div><div class='add'>+		/* Fiber port does not support auto-negotiation. */</div><div class='add'>+		if (dev-&gt;ports[port].fiber)</div><div class='add'>+			ctrl |= PORT_AUTO_NEG_DISABLE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (val &amp; BMCR_SPEED100)</div><div class='add'>+		ctrl |= PORT_FORCE_100_MBIT;</div><div class='add'>+</div><div class='add'>+	if (val &amp; BMCR_FULLDPLX)</div><div class='add'>+		ctrl |= PORT_FORCE_FULL_DUPLEX;</div><div class='add'>+</div><div class='add'>+	ret = ksz_prmw8(dev, port, regs[P_FORCE_CTRL], PORT_FORCE_100_MBIT |</div><div class='add'>+		 /* PORT_AUTO_NEG_ENABLE and PORT_AUTO_NEG_DISABLE are the same</div><div class='add'>+		  * bits</div><div class='add'>+		  */</div><div class='add'>+		 PORT_FORCE_FULL_DUPLEX | PORT_AUTO_NEG_ENABLE, ctrl);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	restart = 0;</div><div class='add'>+	restart_mask = PORT_LED_OFF | PORT_TX_DISABLE | PORT_AUTO_NEG_RESTART |</div><div class='add'>+		PORT_POWER_DOWN | PORT_AUTO_MDIX_DISABLE | PORT_FORCE_MDIX;</div><div class='add'>+</div><div class='add'>+	if (val &amp; KSZ886X_BMCR_DISABLE_LED)</div><div class='add'>+		restart |= PORT_LED_OFF;</div><div class='add'>+</div><div class='add'>+	if (val &amp; KSZ886X_BMCR_DISABLE_TRANSMIT)</div><div class='add'>+		restart |= PORT_TX_DISABLE;</div><div class='add'>+</div><div class='add'>+	if (val &amp; BMCR_ANRESTART)</div><div class='add'>+		restart |= PORT_AUTO_NEG_RESTART;</div><div class='add'>+</div><div class='add'>+	if (val &amp; BMCR_PDOWN)</div><div class='add'>+		restart |= PORT_POWER_DOWN;</div><div class='add'>+</div><div class='add'>+	if (val &amp; KSZ886X_BMCR_DISABLE_AUTO_MDIX)</div><div class='add'>+		restart |= PORT_AUTO_MDIX_DISABLE;</div><div class='add'>+</div><div class='add'>+	if (val &amp; KSZ886X_BMCR_FORCE_MDI)</div><div class='add'>+		restart |= PORT_FORCE_MDIX;</div><div class='add'>+</div><div class='add'>+	if (ksz_is_ksz88x3(dev)) {</div><div class='add'>+		restart_mask |= KSZ8873_PORT_PHY_LOOPBACK;</div><div class='add'>+</div><div class='add'>+		if (val &amp; BMCR_LOOPBACK)</div><div class='add'>+			restart |= KSZ8873_PORT_PHY_LOOPBACK;</div><div class='add'>+	} else {</div><div class='add'>+		ret = ksz879x_set_loopback(dev, port, val);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ksz_prmw8(dev, port, regs[P_NEG_RESTART_CTRL], restart_mask,</div><div class='add'>+			 restart);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz8_w_phy(struct ksz_device *dev, u16 phy, u16 reg, u16 val)</div><div class='add'>+{</div><div class='add'>+	const u16 *regs;</div><div class='add'>+	u8 ctrl, data;</div><div class='add'>+	u16 p = phy;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	regs = dev-&gt;info-&gt;regs;</div><div class='add'>+</div><div class='add'>+	switch (reg) {</div><div class='add'>+	case MII_BMCR:</div><div class='add'>+		ret = ksz8_w_phy_bmcr(dev, p, val);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+		break;</div><div class='add'>+	case MII_ADVERTISE:</div><div class='add'>+		ret = ksz_pread8(dev, p, regs[P_LOCAL_CTRL], &amp;ctrl);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		data = ctrl;</div><div class='add'>+		data &amp;= ~(PORT_AUTO_NEG_SYM_PAUSE |</div><div class='add'>+			  PORT_AUTO_NEG_100BTX_FD |</div><div class='add'>+			  PORT_AUTO_NEG_100BTX |</div><div class='add'>+			  PORT_AUTO_NEG_10BT_FD |</div><div class='add'>+			  PORT_AUTO_NEG_10BT);</div><div class='add'>+		if (val &amp; ADVERTISE_PAUSE_CAP)</div><div class='add'>+			data |= PORT_AUTO_NEG_SYM_PAUSE;</div><div class='add'>+		if (val &amp; ADVERTISE_100FULL)</div><div class='add'>+			data |= PORT_AUTO_NEG_100BTX_FD;</div><div class='add'>+		if (val &amp; ADVERTISE_100HALF)</div><div class='add'>+			data |= PORT_AUTO_NEG_100BTX;</div><div class='add'>+		if (val &amp; ADVERTISE_10FULL)</div><div class='add'>+			data |= PORT_AUTO_NEG_10BT_FD;</div><div class='add'>+		if (val &amp; ADVERTISE_10HALF)</div><div class='add'>+			data |= PORT_AUTO_NEG_10BT;</div><div class='add'>+</div><div class='add'>+		if (data != ctrl) {</div><div class='add'>+			ret = ksz_pwrite8(dev, p, regs[P_LOCAL_CTRL], data);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case PHY_REG_LINK_MD:</div><div class='add'>+		if (val &amp; PHY_START_CABLE_DIAG)</div><div class='add'>+			ksz_port_cfg(dev, p, REG_PORT_LINK_MD_CTRL, PORT_START_CABLE_DIAG, true);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case PHY_REG_PHY_CTRL:</div><div class='add'>+		ret = ksz8_w_phy_ctrl(dev, p, val);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ksz8_cfg_port_member(struct ksz_device *dev, int port, u8 member)</div><div class='add'>+{</div><div class='add'>+	int offset = P_MIRROR_CTRL;</div><div class='add'>+	u8 data;</div><div class='add'>+</div><div class='add'>+	if (ksz_is_ksz8463(dev))</div><div class='add'>+		offset = P1CR2;</div><div class='add'>+	ksz_pread8(dev, port, offset, &amp;data);</div><div class='add'>+	data &amp;= ~dev-&gt;port_mask;</div><div class='add'>+	data |= (member &amp; dev-&gt;port_mask);</div><div class='add'>+	ksz_pwrite8(dev, port, offset, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ksz8_flush_dyn_mac_table(struct ksz_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	u8 learn[DSA_MAX_PORTS];</div><div class='add'>+	int first, index, cnt;</div><div class='add'>+	const u16 *regs;</div><div class='add'>+	int reg = S_FLUSH_TABLE_CTRL;</div><div class='add'>+	int mask = SW_FLUSH_DYN_MAC_TABLE;</div><div class='add'>+</div><div class='add'>+	regs = dev-&gt;info-&gt;regs;</div><div class='add'>+</div><div class='add'>+	if ((uint)port &lt; dev-&gt;info-&gt;port_cnt) {</div><div class='add'>+		first = port;</div><div class='add'>+		cnt = port + 1;</div><div class='add'>+	} else {</div><div class='add'>+		/* Flush all ports. */</div><div class='add'>+		first = 0;</div><div class='add'>+		cnt = dev-&gt;info-&gt;port_cnt;</div><div class='add'>+	}</div><div class='add'>+	for (index = first; index &lt; cnt; index++) {</div><div class='add'>+		ksz_pread8(dev, index, regs[P_STP_CTRL], &amp;learn[index]);</div><div class='add'>+		if (!(learn[index] &amp; PORT_LEARN_DISABLE))</div><div class='add'>+			ksz_pwrite8(dev, index, regs[P_STP_CTRL],</div><div class='add'>+				    learn[index] | PORT_LEARN_DISABLE);</div><div class='add'>+	}</div><div class='add'>+	if (ksz_is_ksz8463(dev)) {</div><div class='add'>+		reg = KSZ8463_FLUSH_TABLE_CTRL;</div><div class='add'>+		mask = KSZ8463_FLUSH_DYN_MAC_TABLE;</div><div class='add'>+	}</div><div class='add'>+	ksz_cfg(dev, reg, mask, true);</div><div class='add'>+	for (index = first; index &lt; cnt; index++) {</div><div class='add'>+		if (!(learn[index] &amp; PORT_LEARN_DISABLE))</div><div class='add'>+			ksz_pwrite8(dev, index, regs[P_STP_CTRL], learn[index]);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz8_fdb_dump(struct ksz_device *dev, int port,</div><div class='add'>+		  dsa_fdb_dump_cb_t *cb, void *data)</div><div class='add'>+{</div><div class='add'>+	u8 mac[ETH_ALEN];</div><div class='add'>+	u8 src_port, fid;</div><div class='add'>+	u16 entries = 0;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; KSZ8_DYN_MAC_ENTRIES; i++) {</div><div class='add'>+		ret = ksz8_r_dyn_mac_table(dev, i, mac, &amp;fid, &amp;src_port,</div><div class='add'>+					   &amp;entries);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		if (i &gt;= entries)</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		if (port == src_port) {</div><div class='add'>+			ret = cb(mac, fid, false, data);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz8_add_sta_mac(struct ksz_device *dev, int port,</div><div class='add'>+			    const unsigned char *addr, u16 vid)</div><div class='add'>+{</div><div class='add'>+	struct alu_struct alu;</div><div class='add'>+	int index, ret;</div><div class='add'>+	int empty = 0;</div><div class='add'>+</div><div class='add'>+	alu.port_forward = 0;</div><div class='add'>+	for (index = 0; index &lt; dev-&gt;info-&gt;num_statics; index++) {</div><div class='add'>+		bool valid;</div><div class='add'>+</div><div class='add'>+		ret = ksz8_r_sta_mac_table(dev, index, &amp;alu, &amp;valid);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+		if (!valid) {</div><div class='add'>+			/* Remember the first empty entry. */</div><div class='add'>+			if (!empty)</div><div class='add'>+				empty = index + 1;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!memcmp(alu.mac, addr, ETH_ALEN) &amp;&amp; alu.fid == vid)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* no available entry */</div><div class='add'>+	if (index == dev-&gt;info-&gt;num_statics &amp;&amp; !empty)</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+</div><div class='add'>+	/* add entry */</div><div class='add'>+	if (index == dev-&gt;info-&gt;num_statics) {</div><div class='add'>+		index = empty - 1;</div><div class='add'>+		memset(&amp;alu, 0, sizeof(alu));</div><div class='add'>+		memcpy(alu.mac, addr, ETH_ALEN);</div><div class='add'>+		alu.is_static = true;</div><div class='add'>+	}</div><div class='add'>+	alu.port_forward |= BIT(port);</div><div class='add'>+	if (vid) {</div><div class='add'>+		alu.is_use_fid = true;</div><div class='add'>+</div><div class='add'>+		/* Need a way to map VID to FID. */</div><div class='add'>+		alu.fid = vid;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ksz8_w_sta_mac_table(dev, index, &amp;alu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz8_del_sta_mac(struct ksz_device *dev, int port,</div><div class='add'>+			    const unsigned char *addr, u16 vid)</div><div class='add'>+{</div><div class='add'>+	struct alu_struct alu;</div><div class='add'>+	int index, ret;</div><div class='add'>+</div><div class='add'>+	for (index = 0; index &lt; dev-&gt;info-&gt;num_statics; index++) {</div><div class='add'>+		bool valid;</div><div class='add'>+</div><div class='add'>+		ret = ksz8_r_sta_mac_table(dev, index, &amp;alu, &amp;valid);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+		if (!valid)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (!memcmp(alu.mac, addr, ETH_ALEN) &amp;&amp; alu.fid == vid)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* no available entry */</div><div class='add'>+	if (index == dev-&gt;info-&gt;num_statics)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* clear port */</div><div class='add'>+	alu.port_forward &amp;= ~BIT(port);</div><div class='add'>+	if (!alu.port_forward)</div><div class='add'>+		alu.is_static = false;</div><div class='add'>+</div><div class='add'>+	return ksz8_w_sta_mac_table(dev, index, &amp;alu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz8_mdb_add(struct ksz_device *dev, int port,</div><div class='add'>+		 const struct switchdev_obj_port_mdb *mdb, struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	return ksz8_add_sta_mac(dev, port, mdb-&gt;addr, mdb-&gt;vid);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz8_mdb_del(struct ksz_device *dev, int port,</div><div class='add'>+		 const struct switchdev_obj_port_mdb *mdb, struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	return ksz8_del_sta_mac(dev, port, mdb-&gt;addr, mdb-&gt;vid);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz8_fdb_add(struct ksz_device *dev, int port, const unsigned char *addr,</div><div class='add'>+		 u16 vid, struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	return ksz8_add_sta_mac(dev, port, addr, vid);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz8_fdb_del(struct ksz_device *dev, int port, const unsigned char *addr,</div><div class='add'>+		 u16 vid, struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	return ksz8_del_sta_mac(dev, port, addr, vid);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz8_port_vlan_filtering(struct ksz_device *dev, int port, bool flag,</div><div class='add'>+			     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	if (ksz_is_ksz88x3(dev) || ksz_is_ksz8463(dev))</div><div class='add'>+		return -ENOTSUPP;</div><div class='add'>+</div><div class='add'>+	/* Discard packets with VID not enabled on the switch */</div><div class='add'>+	ksz_cfg(dev, S_MIRROR_CTRL, SW_VLAN_ENABLE, flag);</div><div class='add'>+</div><div class='add'>+	/* Discard packets with VID not enabled on the ingress port */</div><div class='add'>+	for (port = 0; port &lt; dev-&gt;phy_port_cnt; ++port)</div><div class='add'>+		ksz_port_cfg(dev, port, REG_PORT_CTRL_2, PORT_INGRESS_FILTER,</div><div class='add'>+			     flag);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz8_port_enable_pvid(struct ksz_device *dev, int port, bool state)</div><div class='add'>+{</div><div class='add'>+	if (ksz_is_ksz88x3(dev) || ksz_is_ksz8463(dev)) {</div><div class='add'>+		int reg = REG_SW_INSERT_SRC_PVID;</div><div class='add'>+</div><div class='add'>+		if (ksz_is_ksz8463(dev))</div><div class='add'>+			reg = KSZ8463_REG_SW_CTRL_9;</div><div class='add'>+		ksz_cfg(dev, reg, 0x03 &lt;&lt; (4 - 2 * port), state);</div><div class='add'>+	} else {</div><div class='add'>+		ksz_pwrite8(dev, port, REG_PORT_CTRL_12, state ? 0x0f : 0x00);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz8_port_vlan_add(struct ksz_device *dev, int port,</div><div class='add'>+		       const struct switchdev_obj_port_vlan *vlan,</div><div class='add'>+		       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	bool untagged = vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_UNTAGGED;</div><div class='add'>+	struct ksz_port *p = &amp;dev-&gt;ports[port];</div><div class='add'>+	u16 data, new_pvid = 0;</div><div class='add'>+	u8 fid, member, valid;</div><div class='add'>+</div><div class='add'>+	if (ksz_is_ksz88x3(dev) || ksz_is_ksz8463(dev))</div><div class='add'>+		return -ENOTSUPP;</div><div class='add'>+</div><div class='add'>+	/* If a VLAN is added with untagged flag different from the</div><div class='add'>+	 * port's Remove Tag flag, we need to change the latter.</div><div class='add'>+	 * Ignore VID 0, which is always untagged.</div><div class='add'>+	 * Ignore CPU port, which will always be tagged.</div><div class='add'>+	 */</div><div class='add'>+	if (untagged != p-&gt;remove_tag &amp;&amp; vlan-&gt;vid != 0 &amp;&amp;</div><div class='add'>+	    port != dev-&gt;cpu_port) {</div><div class='add'>+		unsigned int vid;</div><div class='add'>+</div><div class='add'>+		/* Reject attempts to add a VLAN that requires the</div><div class='add'>+		 * Remove Tag flag to be changed, unless there are no</div><div class='add'>+		 * other VLANs currently configured.</div><div class='add'>+		 */</div><div class='add'>+		for (vid = 1; vid &lt; dev-&gt;info-&gt;num_vlans; ++vid) {</div><div class='add'>+			/* Skip the VID we are going to add or reconfigure */</div><div class='add'>+			if (vid == vlan-&gt;vid)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			ksz8_from_vlan(dev, dev-&gt;vlan_cache[vid].table[0],</div><div class='add'>+				       &amp;fid, &amp;member, &amp;valid);</div><div class='add'>+			if (valid &amp;&amp; (member &amp; BIT(port)))</div><div class='add'>+				return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ksz_port_cfg(dev, port, P_TAG_CTRL, PORT_REMOVE_TAG, untagged);</div><div class='add'>+		p-&gt;remove_tag = untagged;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ksz8_r_vlan_table(dev, vlan-&gt;vid, &amp;data);</div><div class='add'>+	ksz8_from_vlan(dev, data, &amp;fid, &amp;member, &amp;valid);</div><div class='add'>+</div><div class='add'>+	/* First time to setup the VLAN entry. */</div><div class='add'>+	if (!valid) {</div><div class='add'>+		/* Need to find a way to map VID to FID. */</div><div class='add'>+		fid = 1;</div><div class='add'>+		valid = 1;</div><div class='add'>+	}</div><div class='add'>+	member |= BIT(port);</div><div class='add'>+</div><div class='add'>+	ksz8_to_vlan(dev, fid, member, valid, &amp;data);</div><div class='add'>+	ksz8_w_vlan_table(dev, vlan-&gt;vid, data);</div><div class='add'>+</div><div class='add'>+	/* change PVID */</div><div class='add'>+	if (vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_PVID)</div><div class='add'>+		new_pvid = vlan-&gt;vid;</div><div class='add'>+</div><div class='add'>+	if (new_pvid) {</div><div class='add'>+		u16 vid;</div><div class='add'>+</div><div class='add'>+		ksz_pread16(dev, port, REG_PORT_CTRL_VID, &amp;vid);</div><div class='add'>+		vid &amp;= ~VLAN_VID_MASK;</div><div class='add'>+		vid |= new_pvid;</div><div class='add'>+		ksz_pwrite16(dev, port, REG_PORT_CTRL_VID, vid);</div><div class='add'>+</div><div class='add'>+		ksz8_port_enable_pvid(dev, port, true);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz8_port_vlan_del(struct ksz_device *dev, int port,</div><div class='add'>+		       const struct switchdev_obj_port_vlan *vlan)</div><div class='add'>+{</div><div class='add'>+	u16 data, pvid;</div><div class='add'>+	u8 fid, member, valid;</div><div class='add'>+</div><div class='add'>+	if (ksz_is_ksz88x3(dev) || ksz_is_ksz8463(dev))</div><div class='add'>+		return -ENOTSUPP;</div><div class='add'>+</div><div class='add'>+	ksz_pread16(dev, port, REG_PORT_CTRL_VID, &amp;pvid);</div><div class='add'>+	pvid = pvid &amp; 0xFFF;</div><div class='add'>+</div><div class='add'>+	ksz8_r_vlan_table(dev, vlan-&gt;vid, &amp;data);</div><div class='add'>+	ksz8_from_vlan(dev, data, &amp;fid, &amp;member, &amp;valid);</div><div class='add'>+</div><div class='add'>+	member &amp;= ~BIT(port);</div><div class='add'>+</div><div class='add'>+	/* Invalidate the entry if no more member. */</div><div class='add'>+	if (!member) {</div><div class='add'>+		fid = 0;</div><div class='add'>+		valid = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ksz8_to_vlan(dev, fid, member, valid, &amp;data);</div><div class='add'>+	ksz8_w_vlan_table(dev, vlan-&gt;vid, data);</div><div class='add'>+</div><div class='add'>+	if (pvid == vlan-&gt;vid)</div><div class='add'>+		ksz8_port_enable_pvid(dev, port, false);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz8_port_mirror_add(struct ksz_device *dev, int port,</div><div class='add'>+			 struct dsa_mall_mirror_tc_entry *mirror,</div><div class='add'>+			 bool ingress, struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	int offset = P_MIRROR_CTRL;</div><div class='add'>+</div><div class='add'>+	if (ksz_is_ksz8463(dev))</div><div class='add'>+		offset = P1CR2;</div><div class='add'>+	if (ingress) {</div><div class='add'>+		ksz_port_cfg(dev, port, offset, PORT_MIRROR_RX, true);</div><div class='add'>+		dev-&gt;mirror_rx |= BIT(port);</div><div class='add'>+	} else {</div><div class='add'>+		ksz_port_cfg(dev, port, offset, PORT_MIRROR_TX, true);</div><div class='add'>+		dev-&gt;mirror_tx |= BIT(port);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ksz_port_cfg(dev, port, offset, PORT_MIRROR_SNIFFER, false);</div><div class='add'>+</div><div class='add'>+	/* configure mirror port */</div><div class='add'>+	if (dev-&gt;mirror_rx || dev-&gt;mirror_tx)</div><div class='add'>+		ksz_port_cfg(dev, mirror-&gt;to_local_port, offset,</div><div class='add'>+			     PORT_MIRROR_SNIFFER, true);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ksz8_port_mirror_del(struct ksz_device *dev, int port,</div><div class='add'>+			  struct dsa_mall_mirror_tc_entry *mirror)</div><div class='add'>+{</div><div class='add'>+	int offset = P_MIRROR_CTRL;</div><div class='add'>+	u8 data;</div><div class='add'>+</div><div class='add'>+	if (ksz_is_ksz8463(dev))</div><div class='add'>+		offset = P1CR2;</div><div class='add'>+	if (mirror-&gt;ingress) {</div><div class='add'>+		ksz_port_cfg(dev, port, offset, PORT_MIRROR_RX, false);</div><div class='add'>+		dev-&gt;mirror_rx &amp;= ~BIT(port);</div><div class='add'>+	} else {</div><div class='add'>+		ksz_port_cfg(dev, port, offset, PORT_MIRROR_TX, false);</div><div class='add'>+		dev-&gt;mirror_tx &amp;= ~BIT(port);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ksz_pread8(dev, port, offset, &amp;data);</div><div class='add'>+</div><div class='add'>+	if (!dev-&gt;mirror_rx &amp;&amp; !dev-&gt;mirror_tx)</div><div class='add'>+		ksz_port_cfg(dev, mirror-&gt;to_local_port, offset,</div><div class='add'>+			     PORT_MIRROR_SNIFFER, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz8795_cpu_interface_select(struct ksz_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	struct ksz_port *p = &amp;dev-&gt;ports[port];</div><div class='add'>+</div><div class='add'>+	if (!ksz_is_ksz87xx(dev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!p-&gt;interface &amp;&amp; dev-&gt;compat_interface) {</div><div class='add'>+		dev_warn(dev-&gt;dev,</div><div class='add'>+			 "Using legacy switch \"phy-mode\" property, because it is missing on port %d node. "</div><div class='add'>+			 "Please update your device tree.\n",</div><div class='add'>+			 port);</div><div class='add'>+		p-&gt;interface = dev-&gt;compat_interface;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ksz8_port_setup(struct ksz_device *dev, int port, bool cpu_port)</div><div class='add'>+{</div><div class='add'>+	const u16 *regs = dev-&gt;info-&gt;regs;</div><div class='add'>+	struct dsa_switch *ds = dev-&gt;ds;</div><div class='add'>+	const u32 *masks;</div><div class='add'>+	int offset;</div><div class='add'>+	u8 member;</div><div class='add'>+</div><div class='add'>+	masks = dev-&gt;info-&gt;masks;</div><div class='add'>+</div><div class='add'>+	/* enable broadcast storm limit */</div><div class='add'>+	offset = P_BCAST_STORM_CTRL;</div><div class='add'>+	if (ksz_is_ksz8463(dev))</div><div class='add'>+		offset = P1CR1;</div><div class='add'>+	ksz_port_cfg(dev, port, offset, PORT_BROADCAST_STORM, true);</div><div class='add'>+</div><div class='add'>+	ksz8_port_queue_split(dev, port, dev-&gt;info-&gt;num_tx_queues);</div><div class='add'>+</div><div class='add'>+	/* replace priority */</div><div class='add'>+	offset = P_802_1P_CTRL;</div><div class='add'>+	if (ksz_is_ksz8463(dev))</div><div class='add'>+		offset = P1CR2;</div><div class='add'>+	ksz_port_cfg(dev, port, offset,</div><div class='add'>+		     masks[PORT_802_1P_REMAPPING], false);</div><div class='add'>+</div><div class='add'>+	if (cpu_port)</div><div class='add'>+		member = dsa_user_ports(ds);</div><div class='add'>+	else</div><div class='add'>+		member = BIT(dsa_upstream_port(ds, port));</div><div class='add'>+</div><div class='add'>+	ksz8_cfg_port_member(dev, port, member);</div><div class='add'>+</div><div class='add'>+	/* Disable all WoL options by default. Otherwise</div><div class='add'>+	 * ksz_switch_macaddr_get/put logic will not work properly.</div><div class='add'>+	 * CPU port 4 has no WoL functionality.</div><div class='add'>+	 */</div><div class='add'>+	if (ksz_is_ksz87xx(dev) &amp;&amp; !cpu_port)</div><div class='add'>+		ksz8_pme_pwrite8(dev, port, regs[REG_PORT_PME_CTRL], 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz88x3_config_rmii_clk(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *cpu_dp = dsa_to_port(dev-&gt;ds, dev-&gt;cpu_port);</div><div class='add'>+	bool rmii_clk_internal;</div><div class='add'>+</div><div class='add'>+	if (!ksz_is_ksz88x3(dev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	rmii_clk_internal = of_property_read_bool(cpu_dp-&gt;dn,</div><div class='add'>+						  "microchip,rmii-clk-internal");</div><div class='add'>+</div><div class='add'>+	ksz_cfg(dev, KSZ88X3_REG_FVID_AND_HOST_MODE,</div><div class='add'>+		KSZ88X3_PORT3_RMII_CLK_INTERNAL, rmii_clk_internal);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ksz8_config_cpu_port(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	struct ksz_port *p;</div><div class='add'>+	const u32 *masks;</div><div class='add'>+	const u16 *regs;</div><div class='add'>+	u8 remote;</div><div class='add'>+	u8 fiber_ports = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	masks = dev-&gt;info-&gt;masks;</div><div class='add'>+	regs = dev-&gt;info-&gt;regs;</div><div class='add'>+</div><div class='add'>+	ksz_cfg(dev, regs[S_TAIL_TAG_CTRL], masks[SW_TAIL_TAG_ENABLE], true);</div><div class='add'>+</div><div class='add'>+	ksz8_port_setup(dev, dev-&gt;cpu_port, true);</div><div class='add'>+</div><div class='add'>+	ksz8795_cpu_interface_select(dev, dev-&gt;cpu_port);</div><div class='add'>+	ksz88x3_config_rmii_clk(dev);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; dev-&gt;phy_port_cnt; i++) {</div><div class='add'>+		ksz_port_stp_state_set(ds, i, BR_STATE_DISABLED);</div><div class='add'>+	}</div><div class='add'>+	for (i = 0; i &lt; dev-&gt;phy_port_cnt; i++) {</div><div class='add'>+		p = &amp;dev-&gt;ports[i];</div><div class='add'>+</div><div class='add'>+		/* For KSZ8795 family. */</div><div class='add'>+		if (ksz_is_ksz87xx(dev)) {</div><div class='add'>+			ksz_pread8(dev, i, regs[P_REMOTE_STATUS], &amp;remote);</div><div class='add'>+			if (remote &amp; KSZ8_PORT_FIBER_MODE)</div><div class='add'>+				p-&gt;fiber = 1;</div><div class='add'>+		}</div><div class='add'>+		if (p-&gt;fiber)</div><div class='add'>+			ksz_port_cfg(dev, i, regs[P_STP_CTRL],</div><div class='add'>+				     PORT_FORCE_FLOW_CTRL, true);</div><div class='add'>+		else</div><div class='add'>+			ksz_port_cfg(dev, i, regs[P_STP_CTRL],</div><div class='add'>+				     PORT_FORCE_FLOW_CTRL, false);</div><div class='add'>+		if (p-&gt;fiber)</div><div class='add'>+			fiber_ports |= (1 &lt;&lt; i);</div><div class='add'>+	}</div><div class='add'>+	if (ksz_is_ksz8463(dev)) {</div><div class='add'>+		/* Setup fiber ports. */</div><div class='add'>+		if (fiber_ports) {</div><div class='add'>+			fiber_ports &amp;= 3;</div><div class='add'>+			regmap_update_bits(ksz_regmap_16(dev),</div><div class='add'>+					   KSZ8463_REG_CFG_CTRL,</div><div class='add'>+					   fiber_ports &lt;&lt; PORT_COPPER_MODE_S,</div><div class='add'>+					   0);</div><div class='add'>+			regmap_update_bits(ksz_regmap_16(dev),</div><div class='add'>+					   KSZ8463_REG_DSP_CTRL_6,</div><div class='add'>+					   COPPER_RECEIVE_ADJUSTMENT, 0);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Turn off PTP function as the switch's proprietary way of</div><div class='add'>+		 * handling timestamp is not supported in current Linux PTP</div><div class='add'>+		 * stack implementation.</div><div class='add'>+		 */</div><div class='add'>+		regmap_update_bits(ksz_regmap_16(dev),</div><div class='add'>+				   KSZ8463_PTP_MSG_CONF1,</div><div class='add'>+				   PTP_ENABLE, 0);</div><div class='add'>+		regmap_update_bits(ksz_regmap_16(dev),</div><div class='add'>+				   KSZ8463_PTP_CLK_CTRL,</div><div class='add'>+				   PTP_CLK_ENABLE, 0);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz8_phy_port_link_up - Configures ports with integrated PHYs</div><div class='add'>+ * @dev: The KSZ device instance.</div><div class='add'>+ * @port: The port number to configure.</div><div class='add'>+ * @duplex: The desired duplex mode.</div><div class='add'>+ * @tx_pause: If true, enables transmit pause.</div><div class='add'>+ * @rx_pause: If true, enables receive pause.</div><div class='add'>+ *</div><div class='add'>+ * Description:</div><div class='add'>+ * The function configures flow control settings for a given port based on the</div><div class='add'>+ * desired settings and current duplex mode.</div><div class='add'>+ *</div><div class='add'>+ * According to the KSZ8873 datasheet, the PORT_FORCE_FLOW_CTRL bit in the</div><div class='add'>+ * Port Control 2 register (0x1A for Port 1, 0x22 for Port 2, 0x32 for Port 3)</div><div class='add'>+ * determines how flow control is handled on the port:</div><div class='add'>+ *    "1 = will always enable full-duplex flow control on the port, regardless</div><div class='add'>+ *         of AN result.</div><div class='add'>+ *     0 = full-duplex flow control is enabled based on AN result."</div><div class='add'>+ *</div><div class='add'>+ * This means that the flow control behavior depends on the state of this bit:</div><div class='add'>+ * - If PORT_FORCE_FLOW_CTRL is set to 1, the switch will ignore AN results and</div><div class='add'>+ *   force flow control on the port.</div><div class='add'>+ * - If PORT_FORCE_FLOW_CTRL is set to 0, the switch will enable or disable</div><div class='add'>+ *   flow control based on the AN results.</div><div class='add'>+ *</div><div class='add'>+ * However, there is a potential limitation in this configuration. It is</div><div class='add'>+ * currently not possible to force disable flow control on a port if we still</div><div class='add'>+ * advertise pause support. While such a configuration is not currently</div><div class='add'>+ * supported by Linux, and may not make practical sense, it's important to be</div><div class='add'>+ * aware of this limitation when working with the KSZ8873 and similar devices.</div><div class='add'>+ */</div><div class='add'>+static void ksz8_phy_port_link_up(struct ksz_device *dev, int port, int duplex,</div><div class='add'>+				  bool tx_pause, bool rx_pause)</div><div class='add'>+{</div><div class='add'>+	const u16 *regs = dev-&gt;info-&gt;regs;</div><div class='add'>+	u8 sctrl = 0;</div><div class='add'>+</div><div class='add'>+	/* The KSZ8795 switch differs from the KSZ8873 by supporting</div><div class='add'>+	 * asymmetric pause control. However, since a single bit is used to</div><div class='add'>+	 * control both RX and TX pause, we can't enforce asymmetric pause</div><div class='add'>+	 * control - both TX and RX pause will be either enabled or disabled</div><div class='add'>+	 * together.</div><div class='add'>+	 *</div><div class='add'>+	 * If auto-negotiation is enabled, we usually allow the flow control to</div><div class='add'>+	 * be determined by the auto-negotiation process based on the</div><div class='add'>+	 * capabilities of both link partners. However, for KSZ8873, the</div><div class='add'>+	 * PORT_FORCE_FLOW_CTRL bit may be set by the hardware bootstrap,</div><div class='add'>+	 * ignoring the auto-negotiation result. Thus, even in auto-negotiation</div><div class='add'>+	 * mode, we need to ensure that the PORT_FORCE_FLOW_CTRL bit is</div><div class='add'>+	 * properly cleared.</div><div class='add'>+	 *</div><div class='add'>+	 * In the absence of pause auto-negotiation, we will enforce symmetric</div><div class='add'>+	 * pause control for both variants of switches - KSZ8873 and KSZ8795.</div><div class='add'>+	 *</div><div class='add'>+	 * Autoneg Pause Autoneg      rx,tx	PORT_FORCE_FLOW_CTRL</div><div class='add'>+	 * 1		1		x	0</div><div class='add'>+	 * 0		1		x	0 (flow control probably disabled)</div><div class='add'>+	 * x		0		1	1 (flow control force enabled)</div><div class='add'>+	 * 1		0		0	0 (flow control still depends on</div><div class='add'>+	 *					   aneg result due to hardware)</div><div class='add'>+	 * 0		0		0	0 (flow control probably disabled)</div><div class='add'>+	 */</div><div class='add'>+	if (dev-&gt;ports[port].manual_flow &amp;&amp; tx_pause)</div><div class='add'>+		sctrl |= PORT_FORCE_FLOW_CTRL;</div><div class='add'>+</div><div class='add'>+	ksz_prmw8(dev, port, regs[P_STP_CTRL], PORT_FORCE_FLOW_CTRL, sctrl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz8_cpu_port_link_up - Configures the CPU port of the switch.</div><div class='add'>+ * @dev: The KSZ device instance.</div><div class='add'>+ * @speed: The desired link speed.</div><div class='add'>+ * @duplex: The desired duplex mode.</div><div class='add'>+ * @tx_pause: If true, enables transmit pause.</div><div class='add'>+ * @rx_pause: If true, enables receive pause.</div><div class='add'>+ *</div><div class='add'>+ * Description:</div><div class='add'>+ * The function configures flow control and speed settings for the CPU</div><div class='add'>+ * port of the switch based on the desired settings, current duplex mode, and</div><div class='add'>+ * speed.</div><div class='add'>+ */</div><div class='add'>+static void ksz8_cpu_port_link_up(struct ksz_device *dev, int speed, int duplex,</div><div class='add'>+				  bool tx_pause, bool rx_pause)</div><div class='add'>+{</div><div class='add'>+	const u16 *regs = dev-&gt;info-&gt;regs;</div><div class='add'>+	u8 ctrl = 0;</div><div class='add'>+</div><div class='add'>+	/* SW_FLOW_CTRL, SW_HALF_DUPLEX, and SW_10_MBIT bits are bootstrappable</div><div class='add'>+	 * at least on KSZ8873. They can have different values depending on your</div><div class='add'>+	 * board setup.</div><div class='add'>+	 */</div><div class='add'>+	if (tx_pause || rx_pause)</div><div class='add'>+		ctrl |= SW_FLOW_CTRL;</div><div class='add'>+</div><div class='add'>+	if (duplex == DUPLEX_HALF)</div><div class='add'>+		ctrl |= SW_HALF_DUPLEX;</div><div class='add'>+</div><div class='add'>+	/* This hardware only supports SPEED_10 and SPEED_100. For SPEED_10</div><div class='add'>+	 * we need to set the SW_10_MBIT bit. Otherwise, we can leave it 0.</div><div class='add'>+	 */</div><div class='add'>+	if (speed == SPEED_10)</div><div class='add'>+		ctrl |= SW_10_MBIT;</div><div class='add'>+</div><div class='add'>+	ksz_rmw8(dev, regs[S_BROADCAST_CTRL], SW_HALF_DUPLEX | SW_FLOW_CTRL |</div><div class='add'>+		 SW_10_MBIT, ctrl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ksz8_phylink_mac_link_up(struct phylink_config *config,</div><div class='add'>+			      struct phy_device *phydev, unsigned int mode,</div><div class='add'>+			      phy_interface_t interface, int speed, int duplex,</div><div class='add'>+			      bool tx_pause, bool rx_pause)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct ksz_device *dev = dp-&gt;ds-&gt;priv;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+</div><div class='add'>+	/* If the port is the CPU port, apply special handling. Only the CPU</div><div class='add'>+	 * port is configured via global registers.</div><div class='add'>+	 */</div><div class='add'>+	if (dev-&gt;cpu_port == port)</div><div class='add'>+		ksz8_cpu_port_link_up(dev, speed, duplex, tx_pause, rx_pause);</div><div class='add'>+	else if (dev-&gt;info-&gt;internal_phy[port])</div><div class='add'>+		ksz8_phy_port_link_up(dev, port, duplex, tx_pause, rx_pause);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz8_handle_global_errata(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	/* KSZ87xx Errata DS80000687C.</div><div class='add'>+	 * Module 2: Link drops with some EEE link partners.</div><div class='add'>+	 *   An issue with the EEE next page exchange between the</div><div class='add'>+	 *   KSZ879x/KSZ877x/KSZ876x and some EEE link partners may result in</div><div class='add'>+	 *   the link dropping.</div><div class='add'>+	 */</div><div class='add'>+	if (dev-&gt;info-&gt;ksz87xx_eee_link_erratum)</div><div class='add'>+		ret = ksz8_ind_write8(dev, TABLE_EEE, REG_IND_EEE_GLOB2_HI, 0);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz8_enable_stp_addr(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct alu_struct alu;</div><div class='add'>+</div><div class='add'>+	/* Setup STP address for STP operation. */</div><div class='add'>+	memset(&amp;alu, 0, sizeof(alu));</div><div class='add'>+	ether_addr_copy(alu.mac, eth_stp_addr);</div><div class='add'>+	alu.is_static = true;</div><div class='add'>+	alu.is_override = true;</div><div class='add'>+	alu.port_forward = dev-&gt;info-&gt;cpu_ports;</div><div class='add'>+</div><div class='add'>+	return ksz8_w_sta_mac_table(dev, 0, &amp;alu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz8_setup(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	const u16 *regs = dev-&gt;info-&gt;regs;</div><div class='add'>+	int i, ret = 0;</div><div class='add'>+</div><div class='add'>+	ds-&gt;mtu_enforcement_ingress = true;</div><div class='add'>+</div><div class='add'>+	/* We rely on software untagging on the CPU port, so that we</div><div class='add'>+	 * can support both tagged and untagged VLANs</div><div class='add'>+	 */</div><div class='add'>+	ds-&gt;untag_bridge_pvid = true;</div><div class='add'>+</div><div class='add'>+	/* VLAN filtering is partly controlled by the global VLAN</div><div class='add'>+	 * Enable flag</div><div class='add'>+	 */</div><div class='add'>+	ds-&gt;vlan_filtering_is_global = true;</div><div class='add'>+</div><div class='add'>+	/* Enable automatic fast aging when link changed detected. */</div><div class='add'>+	ksz_cfg(dev, S_LINK_AGING_CTRL, SW_LINK_AUTO_AGING, true);</div><div class='add'>+</div><div class='add'>+	/* Enable aggressive back off algorithm in half duplex mode. */</div><div class='add'>+	ret = ksz_rmw8(dev, REG_SW_CTRL_1, SW_AGGR_BACKOFF, SW_AGGR_BACKOFF);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/*</div><div class='add'>+	 * Make sure unicast VLAN boundary is set as default and</div><div class='add'>+	 * enable no excessive collision drop.</div><div class='add'>+	 */</div><div class='add'>+	ret = ksz_rmw8(dev, REG_SW_CTRL_2,</div><div class='add'>+		       UNICAST_VLAN_BOUNDARY | NO_EXC_COLLISION_DROP,</div><div class='add'>+		       UNICAST_VLAN_BOUNDARY | NO_EXC_COLLISION_DROP);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ksz_cfg(dev, S_REPLACE_VID_CTRL, SW_REPLACE_VID, false);</div><div class='add'>+</div><div class='add'>+	ksz_cfg(dev, S_MIRROR_CTRL, SW_MIRROR_RX_TX, false);</div><div class='add'>+</div><div class='add'>+	if (!ksz_is_ksz88x3(dev) &amp;&amp; !ksz_is_ksz8463(dev))</div><div class='add'>+		ksz_cfg(dev, REG_SW_CTRL_19, SW_INS_TAG_ENABLE, true);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; (dev-&gt;info-&gt;num_vlans / 4); i++)</div><div class='add'>+		ksz8_r_vlan_entries(dev, i);</div><div class='add'>+</div><div class='add'>+	/* Make sure PME (WoL) is not enabled. If requested, it will</div><div class='add'>+	 * be enabled by ksz_wol_pre_shutdown(). Otherwise, some PMICs</div><div class='add'>+	 * do not like PME events changes before shutdown. PME only</div><div class='add'>+	 * available on KSZ87xx family.</div><div class='add'>+	 */</div><div class='add'>+	if (ksz_is_ksz87xx(dev)) {</div><div class='add'>+		ret = ksz8_pme_write8(dev, regs[REG_SW_PME_CTRL], 0);</div><div class='add'>+		if (!ret)</div><div class='add'>+			ret = ksz_rmw8(dev, REG_INT_ENABLE, INT_PME, 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!ret)</div><div class='add'>+		return ksz8_handle_global_errata(ds);</div><div class='add'>+	else</div><div class='add'>+		return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ksz8_get_caps(struct ksz_device *dev, int port,</div><div class='add'>+		   struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	config-&gt;mac_capabilities = MAC_10 | MAC_100;</div><div class='add'>+</div><div class='add'>+	/* Silicon Errata Sheet (DS80000830A):</div><div class='add'>+	 * "Port 1 does not respond to received flow control PAUSE frames"</div><div class='add'>+	 * So, disable Pause support on "Port 1" (port == 0) for all ksz88x3</div><div class='add'>+	 * switches.</div><div class='add'>+	 */</div><div class='add'>+	if (!ksz_is_ksz88x3(dev) || port)</div><div class='add'>+		config-&gt;mac_capabilities |= MAC_SYM_PAUSE;</div><div class='add'>+</div><div class='add'>+	/* Asym pause is not supported on KSZ8863 and KSZ8873 */</div><div class='add'>+	if (!ksz_is_ksz88x3(dev))</div><div class='add'>+		config-&gt;mac_capabilities |= MAC_ASYM_PAUSE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 ksz8_get_port_addr(int port, int offset)</div><div class='add'>+{</div><div class='add'>+	return PORT_CTRL_ADDR(port, offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 ksz8463_get_port_addr(int port, int offset)</div><div class='add'>+{</div><div class='add'>+	return offset + 0x18 * port;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 ksz8463_get_phy_addr(u16 phy, u16 reg, u16 offset)</div><div class='add'>+{</div><div class='add'>+	return offset + reg * 2 + phy * (P2MBCR - P1MBCR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz8463_r_phy(struct ksz_device *dev, u16 phy, u16 reg, u16 *val)</div><div class='add'>+{</div><div class='add'>+	u16 sw_reg = 0;</div><div class='add'>+	u16 data = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (phy &gt; 1)</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+	switch (reg) {</div><div class='add'>+	case MII_PHYSID1:</div><div class='add'>+		sw_reg = ksz8463_get_phy_addr(phy, 0, PHY1IHR);</div><div class='add'>+		break;</div><div class='add'>+	case MII_PHYSID2:</div><div class='add'>+		sw_reg = ksz8463_get_phy_addr(phy, 0, PHY1ILR);</div><div class='add'>+		break;</div><div class='add'>+	case MII_BMCR:</div><div class='add'>+	case MII_BMSR:</div><div class='add'>+	case MII_ADVERTISE:</div><div class='add'>+	case MII_LPA:</div><div class='add'>+		sw_reg = ksz8463_get_phy_addr(phy, reg, P1MBCR);</div><div class='add'>+		break;</div><div class='add'>+	case MII_TPISTATUS:</div><div class='add'>+		/* This register holds the PHY interrupt status for simulated</div><div class='add'>+		 * Micrel KSZ PHY.</div><div class='add'>+		 */</div><div class='add'>+		data = 0x0505;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	if (sw_reg) {</div><div class='add'>+		ret = ksz_read16(dev, sw_reg, &amp;data);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+	*val = data;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz8463_w_phy(struct ksz_device *dev, u16 phy, u16 reg, u16 val)</div><div class='add'>+{</div><div class='add'>+	u16 sw_reg = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (phy &gt; 1)</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+</div><div class='add'>+	/* No write to fiber port. */</div><div class='add'>+	if (dev-&gt;ports[phy].fiber)</div><div class='add'>+		return 0;</div><div class='add'>+	switch (reg) {</div><div class='add'>+	case MII_BMCR:</div><div class='add'>+	case MII_ADVERTISE:</div><div class='add'>+		sw_reg = ksz8463_get_phy_addr(phy, reg, P1MBCR);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	if (sw_reg) {</div><div class='add'>+		ret = ksz_write16(dev, sw_reg, val);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz8_switch_init(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	dev-&gt;cpu_port = fls(dev-&gt;info-&gt;cpu_ports) - 1;</div><div class='add'>+	dev-&gt;phy_port_cnt = dev-&gt;info-&gt;port_cnt - 1;</div><div class='add'>+	dev-&gt;port_mask = (BIT(dev-&gt;phy_port_cnt) - 1) | dev-&gt;info-&gt;cpu_ports;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ksz8_switch_exit(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	ksz8_reset_switch(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Tristram Ha &lt;Tristram.Ha@microchip.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Microchip KSZ8795 Series Switch DSA Driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/dsa/microchip/ksz8.h b/drivers/net/dsa/microchip/ksz8.h<br/>new file mode 100644<br/>index 000000000000..0f2cd1474b44<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz8.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/ksz8.h</a></div><div class='hunk'>@@ -0,0 +1,70 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/*</div><div class='add'>+ * Microchip KSZ8XXX series register access</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2020 Pengutronix, Michael Grzeschik &lt;kernel@pengutronix.de&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __KSZ8XXX_H</div><div class='add'>+#define __KSZ8XXX_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+#include "ksz_common.h"</div><div class='add'>+</div><div class='add'>+int ksz8_setup(struct dsa_switch *ds);</div><div class='add'>+u32 ksz8_get_port_addr(int port, int offset);</div><div class='add'>+void ksz8_cfg_port_member(struct ksz_device *dev, int port, u8 member);</div><div class='add'>+void ksz8_flush_dyn_mac_table(struct ksz_device *dev, int port);</div><div class='add'>+void ksz8_port_setup(struct ksz_device *dev, int port, bool cpu_port);</div><div class='add'>+int ksz8_r_phy(struct ksz_device *dev, u16 phy, u16 reg, u16 *val);</div><div class='add'>+int ksz8_w_phy(struct ksz_device *dev, u16 phy, u16 reg, u16 val);</div><div class='add'>+void ksz8_r_mib_cnt(struct ksz_device *dev, int port, u16 addr, u64 *cnt);</div><div class='add'>+void ksz8_r_mib_pkt(struct ksz_device *dev, int port, u16 addr,</div><div class='add'>+		    u64 *dropped, u64 *cnt);</div><div class='add'>+void ksz8_freeze_mib(struct ksz_device *dev, int port, bool freeze);</div><div class='add'>+void ksz8_port_init_cnt(struct ksz_device *dev, int port);</div><div class='add'>+int ksz8_fdb_dump(struct ksz_device *dev, int port,</div><div class='add'>+		  dsa_fdb_dump_cb_t *cb, void *data);</div><div class='add'>+int ksz8_fdb_add(struct ksz_device *dev, int port, const unsigned char *addr,</div><div class='add'>+		 u16 vid, struct dsa_db db);</div><div class='add'>+int ksz8_fdb_del(struct ksz_device *dev, int port, const unsigned char *addr,</div><div class='add'>+		 u16 vid, struct dsa_db db);</div><div class='add'>+int ksz8_mdb_add(struct ksz_device *dev, int port,</div><div class='add'>+		 const struct switchdev_obj_port_mdb *mdb, struct dsa_db db);</div><div class='add'>+int ksz8_mdb_del(struct ksz_device *dev, int port,</div><div class='add'>+		 const struct switchdev_obj_port_mdb *mdb, struct dsa_db db);</div><div class='add'>+int ksz8_port_vlan_filtering(struct ksz_device *dev, int port, bool flag,</div><div class='add'>+			     struct netlink_ext_ack *extack);</div><div class='add'>+int ksz8_port_vlan_add(struct ksz_device *dev, int port,</div><div class='add'>+		       const struct switchdev_obj_port_vlan *vlan,</div><div class='add'>+		       struct netlink_ext_ack *extack);</div><div class='add'>+int ksz8_port_vlan_del(struct ksz_device *dev, int port,</div><div class='add'>+		       const struct switchdev_obj_port_vlan *vlan);</div><div class='add'>+int ksz8_port_mirror_add(struct ksz_device *dev, int port,</div><div class='add'>+			 struct dsa_mall_mirror_tc_entry *mirror,</div><div class='add'>+			 bool ingress, struct netlink_ext_ack *extack);</div><div class='add'>+void ksz8_port_mirror_del(struct ksz_device *dev, int port,</div><div class='add'>+			  struct dsa_mall_mirror_tc_entry *mirror);</div><div class='add'>+void ksz8_get_caps(struct ksz_device *dev, int port,</div><div class='add'>+		   struct phylink_config *config);</div><div class='add'>+void ksz8_config_cpu_port(struct dsa_switch *ds);</div><div class='add'>+int ksz8_enable_stp_addr(struct ksz_device *dev);</div><div class='add'>+int ksz8_reset_switch(struct ksz_device *dev);</div><div class='add'>+int ksz8_switch_init(struct ksz_device *dev);</div><div class='add'>+void ksz8_switch_exit(struct ksz_device *dev);</div><div class='add'>+int ksz8_change_mtu(struct ksz_device *dev, int port, int mtu);</div><div class='add'>+int ksz8_pme_write8(struct ksz_device *dev, u32 reg, u8 value);</div><div class='add'>+int ksz8_pme_pread8(struct ksz_device *dev, int port, int offset, u8 *data);</div><div class='add'>+int ksz8_pme_pwrite8(struct ksz_device *dev, int port, int offset, u8 data);</div><div class='add'>+void ksz8_phylink_mac_link_up(struct phylink_config *config,</div><div class='add'>+			      struct phy_device *phydev, unsigned int mode,</div><div class='add'>+			      phy_interface_t interface, int speed, int duplex,</div><div class='add'>+			      bool tx_pause, bool rx_pause);</div><div class='add'>+int ksz8_all_queues_split(struct ksz_device *dev, int queues);</div><div class='add'>+</div><div class='add'>+u32 ksz8463_get_port_addr(int port, int offset);</div><div class='add'>+int ksz8463_r_phy(struct ksz_device *dev, u16 phy, u16 reg, u16 *val);</div><div class='add'>+int ksz8463_w_phy(struct ksz_device *dev, u16 phy, u16 reg, u16 val);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/dsa/microchip/ksz8863_smi.c b/drivers/net/dsa/microchip/ksz8863_smi.c<br/>new file mode 100644<br/>index 000000000000..a8bfcd917bf7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz8863_smi.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/ksz8863_smi.c</a></div><div class='hunk'>@@ -0,0 +1,226 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Microchip KSZ8863 series register access through SMI</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2019 Pengutronix, Michael Grzeschik &lt;kernel@pengutronix.de&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/mod_devicetable.h&gt;</div><div class='add'>+#include &lt;linux/property.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ksz8.h"</div><div class='add'>+#include "ksz_common.h"</div><div class='add'>+</div><div class='add'>+/* Serial Management Interface (SMI) uses the following frame format:</div><div class='add'>+ *</div><div class='add'>+ *       preamble|start|Read/Write|  PHY   |  REG  |TA|   Data bits      | Idle</div><div class='add'>+ *               |frame| OP code  |address |address|  |                  |</div><div class='add'>+ * read | 32x1´s | 01  |    00    | 1xRRR  | RRRRR |Z0| 00000000DDDDDDDD |  Z</div><div class='add'>+ * write| 32x1´s | 01  |    00    | 0xRRR  | RRRRR |10| xxxxxxxxDDDDDDDD |  Z</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define SMI_KSZ88XX_READ_PHY	BIT(4)</div><div class='add'>+</div><div class='add'>+static int ksz8863_mdio_read(void *ctx, const void *reg_buf, size_t reg_len,</div><div class='add'>+			     void *val_buf, size_t val_len)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ctx;</div><div class='add'>+	struct mdio_device *mdev;</div><div class='add'>+	u8 reg = *(u8 *)reg_buf;</div><div class='add'>+	u8 *val = val_buf;</div><div class='add'>+	int i, ret = 0;</div><div class='add'>+</div><div class='add'>+	mdev = dev-&gt;priv;</div><div class='add'>+</div><div class='add'>+	mutex_lock_nested(&amp;mdev-&gt;bus-&gt;mdio_lock, MDIO_MUTEX_NESTED);</div><div class='add'>+	for (i = 0; i &lt; val_len; i++) {</div><div class='add'>+		int tmp = reg + i;</div><div class='add'>+</div><div class='add'>+		ret = __mdiobus_read(mdev-&gt;bus, ((tmp &amp; 0xE0) &gt;&gt; 5) |</div><div class='add'>+				     SMI_KSZ88XX_READ_PHY, tmp);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		val[i] = ret;</div><div class='add'>+	}</div><div class='add'>+	ret = 0;</div><div class='add'>+</div><div class='add'>+ out:</div><div class='add'>+	mutex_unlock(&amp;mdev-&gt;bus-&gt;mdio_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz8863_mdio_write(void *ctx, const void *data, size_t count)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ctx;</div><div class='add'>+	struct mdio_device *mdev;</div><div class='add'>+	int i, ret = 0;</div><div class='add'>+	u32 reg;</div><div class='add'>+	u8 *val;</div><div class='add'>+</div><div class='add'>+	mdev = dev-&gt;priv;</div><div class='add'>+</div><div class='add'>+	val = (u8 *)(data + 4);</div><div class='add'>+	reg = *(u32 *)data;</div><div class='add'>+</div><div class='add'>+	mutex_lock_nested(&amp;mdev-&gt;bus-&gt;mdio_lock, MDIO_MUTEX_NESTED);</div><div class='add'>+	for (i = 0; i &lt; (count - 4); i++) {</div><div class='add'>+		int tmp = reg + i;</div><div class='add'>+</div><div class='add'>+		ret = __mdiobus_write(mdev-&gt;bus, ((tmp &amp; 0xE0) &gt;&gt; 5),</div><div class='add'>+				      tmp, val[i]);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+ out:</div><div class='add'>+	mutex_unlock(&amp;mdev-&gt;bus-&gt;mdio_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct regmap_bus regmap_smi[] = {</div><div class='add'>+	{</div><div class='add'>+		.read = ksz8863_mdio_read,</div><div class='add'>+		.write = ksz8863_mdio_write,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.read = ksz8863_mdio_read,</div><div class='add'>+		.write = ksz8863_mdio_write,</div><div class='add'>+		.val_format_endian_default = REGMAP_ENDIAN_BIG,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.read = ksz8863_mdio_read,</div><div class='add'>+		.write = ksz8863_mdio_write,</div><div class='add'>+		.val_format_endian_default = REGMAP_ENDIAN_BIG,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_config ksz8863_regmap_config[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "#8",</div><div class='add'>+		.reg_bits = 8,</div><div class='add'>+		.pad_bits = 24,</div><div class='add'>+		.val_bits = 8,</div><div class='add'>+		.cache_type = REGCACHE_NONE,</div><div class='add'>+		.lock = ksz_regmap_lock,</div><div class='add'>+		.unlock = ksz_regmap_unlock,</div><div class='add'>+		.max_register = U8_MAX,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "#16",</div><div class='add'>+		.reg_bits = 8,</div><div class='add'>+		.pad_bits = 24,</div><div class='add'>+		.val_bits = 16,</div><div class='add'>+		.cache_type = REGCACHE_NONE,</div><div class='add'>+		.lock = ksz_regmap_lock,</div><div class='add'>+		.unlock = ksz_regmap_unlock,</div><div class='add'>+		.max_register = U8_MAX,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "#32",</div><div class='add'>+		.reg_bits = 8,</div><div class='add'>+		.pad_bits = 24,</div><div class='add'>+		.val_bits = 32,</div><div class='add'>+		.cache_type = REGCACHE_NONE,</div><div class='add'>+		.lock = ksz_regmap_lock,</div><div class='add'>+		.unlock = ksz_regmap_unlock,</div><div class='add'>+		.max_register = U8_MAX,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int ksz8863_smi_probe(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct device *ddev = &amp;mdiodev-&gt;dev;</div><div class='add'>+	const struct ksz_chip_data *chip;</div><div class='add'>+	struct regmap_config rc;</div><div class='add'>+	struct ksz_device *dev;</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	dev = ksz_switch_alloc(&amp;mdiodev-&gt;dev, mdiodev);</div><div class='add'>+	if (!dev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	chip = device_get_match_data(ddev);</div><div class='add'>+	if (!chip)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; __KSZ_NUM_REGMAPS; i++) {</div><div class='add'>+		rc = ksz8863_regmap_config[i];</div><div class='add'>+		rc.lock_arg = &amp;dev-&gt;regmap_mutex;</div><div class='add'>+		rc.wr_table = chip-&gt;wr_table;</div><div class='add'>+		rc.rd_table = chip-&gt;rd_table;</div><div class='add'>+		dev-&gt;regmap[i] = devm_regmap_init(&amp;mdiodev-&gt;dev,</div><div class='add'>+						  &amp;regmap_smi[i], dev,</div><div class='add'>+						  &amp;rc);</div><div class='add'>+		if (IS_ERR(dev-&gt;regmap[i])) {</div><div class='add'>+			return dev_err_probe(&amp;mdiodev-&gt;dev,</div><div class='add'>+					     PTR_ERR(dev-&gt;regmap[i]),</div><div class='add'>+					     "Failed to initialize regmap%i\n",</div><div class='add'>+					     ksz8863_regmap_config[i].val_bits);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (mdiodev-&gt;dev.platform_data)</div><div class='add'>+		dev-&gt;pdata = mdiodev-&gt;dev.platform_data;</div><div class='add'>+</div><div class='add'>+	ret = ksz_switch_register(dev);</div><div class='add'>+</div><div class='add'>+	/* Main DSA driver may not be started yet. */</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	dev_set_drvdata(&amp;mdiodev-&gt;dev, dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz8863_smi_remove(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = dev_get_drvdata(&amp;mdiodev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	if (dev)</div><div class='add'>+		ksz_switch_remove(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz8863_smi_shutdown(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = dev_get_drvdata(&amp;mdiodev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	if (dev)</div><div class='add'>+		dsa_switch_shutdown(dev-&gt;ds);</div><div class='add'>+</div><div class='add'>+	dev_set_drvdata(&amp;mdiodev-&gt;dev, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id ksz8863_dt_ids[] = {</div><div class='add'>+	{</div><div class='add'>+		.compatible = "microchip,ksz8863",</div><div class='add'>+		.data = &amp;ksz_switch_chips[KSZ88X3]</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "microchip,ksz8873",</div><div class='add'>+		.data = &amp;ksz_switch_chips[KSZ88X3]</div><div class='add'>+	},</div><div class='add'>+	{ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, ksz8863_dt_ids);</div><div class='add'>+</div><div class='add'>+static struct mdio_driver ksz8863_driver = {</div><div class='add'>+	.probe	= ksz8863_smi_probe,</div><div class='add'>+	.remove	= ksz8863_smi_remove,</div><div class='add'>+	.shutdown = ksz8863_smi_shutdown,</div><div class='add'>+	.mdiodrv.driver = {</div><div class='add'>+		.name	= "ksz8863-switch",</div><div class='add'>+		.of_match_table = ksz8863_dt_ids,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+mdio_module_driver(ksz8863_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Michael Grzeschik &lt;m.grzeschik@pengutronix.de&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Microchip KSZ8863 SMI Switch driver");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/net/dsa/microchip/ksz8_reg.h b/drivers/net/dsa/microchip/ksz8_reg.h<br/>new file mode 100644<br/>index 000000000000..332408567b47<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz8_reg.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/ksz8_reg.h</a></div><div class='hunk'>@@ -0,0 +1,850 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+/*</div><div class='add'>+ * Microchip KSZ8XXX series register definitions</div><div class='add'>+ *</div><div class='add'>+ * The base for these definitions is KSZ8795 but unless indicated</div><div class='add'>+ * differently by their prefix, they apply to all KSZ8 series</div><div class='add'>+ * devices. Registers and masks that do change are defined in</div><div class='add'>+ * dedicated structures in ksz_common.c.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2017 Microchip Technology Inc.</div><div class='add'>+ *	Tristram Ha &lt;Tristram.Ha@microchip.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __KSZ8_REG_H</div><div class='add'>+#define __KSZ8_REG_H</div><div class='add'>+</div><div class='add'>+#define KS_PORT_M			0x1F</div><div class='add'>+</div><div class='add'>+#define KS_PRIO_M			0x3</div><div class='add'>+#define KS_PRIO_S			2</div><div class='add'>+</div><div class='add'>+#define SW_REVISION_M			0x0E</div><div class='add'>+#define SW_REVISION_S			1</div><div class='add'>+</div><div class='add'>+#define KSZ8863_REG_SW_RESET		0x43</div><div class='add'>+</div><div class='add'>+#define KSZ8863_GLOBAL_SOFTWARE_RESET	BIT(4)</div><div class='add'>+#define KSZ8863_PCS_RESET		BIT(0)</div><div class='add'>+</div><div class='add'>+#define KSZ88X3_REG_FVID_AND_HOST_MODE  0xC6</div><div class='add'>+#define KSZ88X3_PORT3_RMII_CLK_INTERNAL BIT(3)</div><div class='add'>+</div><div class='add'>+#define REG_SW_CTRL_0			0x02</div><div class='add'>+</div><div class='add'>+#define SW_NEW_BACKOFF			BIT(7)</div><div class='add'>+#define SW_GLOBAL_RESET			BIT(6)</div><div class='add'>+#define SW_FLUSH_DYN_MAC_TABLE		BIT(5)</div><div class='add'>+#define SW_FLUSH_STA_MAC_TABLE		BIT(4)</div><div class='add'>+#define SW_LINK_AUTO_AGING		BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_SW_CTRL_1			0x03</div><div class='add'>+</div><div class='add'>+#define SW_HUGE_PACKET			BIT(6)</div><div class='add'>+#define SW_TX_FLOW_CTRL_DISABLE		BIT(5)</div><div class='add'>+#define SW_RX_FLOW_CTRL_DISABLE		BIT(4)</div><div class='add'>+#define SW_CHECK_LENGTH			BIT(3)</div><div class='add'>+#define SW_AGING_ENABLE			BIT(2)</div><div class='add'>+#define SW_FAST_AGING			BIT(1)</div><div class='add'>+#define SW_AGGR_BACKOFF			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_SW_CTRL_2			0x04</div><div class='add'>+</div><div class='add'>+#define UNICAST_VLAN_BOUNDARY		BIT(7)</div><div class='add'>+#define SW_BACK_PRESSURE		BIT(5)</div><div class='add'>+#define FAIR_FLOW_CTRL			BIT(4)</div><div class='add'>+#define NO_EXC_COLLISION_DROP		BIT(3)</div><div class='add'>+#define SW_LEGAL_PACKET_DISABLE		BIT(1)</div><div class='add'>+</div><div class='add'>+#define KSZ8863_HUGE_PACKET_ENABLE	BIT(2)</div><div class='add'>+#define KSZ8863_LEGAL_PACKET_ENABLE	BIT(1)</div><div class='add'>+</div><div class='add'>+#define REG_SW_CTRL_3			0x05</div><div class='add'>+ #define WEIGHTED_FAIR_QUEUE_ENABLE	BIT(3)</div><div class='add'>+</div><div class='add'>+#define SW_VLAN_ENABLE			BIT(7)</div><div class='add'>+#define SW_IGMP_SNOOP			BIT(6)</div><div class='add'>+#define SW_MIRROR_RX_TX			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_SW_CTRL_4			0x06</div><div class='add'>+</div><div class='add'>+#define SW_HALF_DUPLEX_FLOW_CTRL	BIT(7)</div><div class='add'>+#define SW_HALF_DUPLEX			BIT(6)</div><div class='add'>+#define SW_FLOW_CTRL			BIT(5)</div><div class='add'>+#define SW_10_MBIT			BIT(4)</div><div class='add'>+#define SW_REPLACE_VID			BIT(3)</div><div class='add'>+</div><div class='add'>+#define REG_SW_CTRL_5			0x07</div><div class='add'>+</div><div class='add'>+#define REG_SW_CTRL_6			0x08</div><div class='add'>+</div><div class='add'>+#define SW_MIB_COUNTER_FLUSH		BIT(7)</div><div class='add'>+#define SW_MIB_COUNTER_FREEZE		BIT(6)</div><div class='add'>+#define SW_MIB_COUNTER_CTRL_ENABLE	KS_PORT_M</div><div class='add'>+</div><div class='add'>+#define REG_SW_CTRL_9			0x0B</div><div class='add'>+</div><div class='add'>+#define SPI_CLK_125_MHZ			0x80</div><div class='add'>+#define SPI_CLK_62_5_MHZ		0x40</div><div class='add'>+#define SPI_CLK_31_25_MHZ		0x00</div><div class='add'>+</div><div class='add'>+#define SW_LED_MODE_M			0x3</div><div class='add'>+#define SW_LED_MODE_S			4</div><div class='add'>+#define SW_LED_LINK_ACT_SPEED		0</div><div class='add'>+#define SW_LED_LINK_ACT			1</div><div class='add'>+#define SW_LED_LINK_ACT_DUPLEX		2</div><div class='add'>+#define SW_LED_LINK_DUPLEX		3</div><div class='add'>+</div><div class='add'>+#define REG_SW_CTRL_10			0x0C</div><div class='add'>+</div><div class='add'>+#define SW_PASS_PAUSE			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_SW_CTRL_11			0x0D</div><div class='add'>+</div><div class='add'>+#define REG_POWER_MANAGEMENT_1		0x0E</div><div class='add'>+</div><div class='add'>+#define SW_PLL_POWER_DOWN		BIT(5)</div><div class='add'>+#define SW_POWER_MANAGEMENT_MODE_M	0x3</div><div class='add'>+#define SW_POWER_MANAGEMENT_MODE_S	3</div><div class='add'>+#define SW_POWER_NORMAL			0</div><div class='add'>+#define SW_ENERGY_DETECTION		1</div><div class='add'>+#define SW_SOFTWARE_POWER_DOWN		2</div><div class='add'>+</div><div class='add'>+#define REG_POWER_MANAGEMENT_2		0x0F</div><div class='add'>+</div><div class='add'>+#define REG_PORT_1_CTRL_0		0x10</div><div class='add'>+#define REG_PORT_2_CTRL_0		0x20</div><div class='add'>+#define REG_PORT_3_CTRL_0		0x30</div><div class='add'>+#define REG_PORT_4_CTRL_0		0x40</div><div class='add'>+#define REG_PORT_5_CTRL_0		0x50</div><div class='add'>+</div><div class='add'>+#define PORT_BROADCAST_STORM		BIT(7)</div><div class='add'>+#define PORT_DIFFSERV_ENABLE		BIT(6)</div><div class='add'>+#define PORT_802_1P_ENABLE		BIT(5)</div><div class='add'>+#define PORT_BASED_PRIO_S		3</div><div class='add'>+#define PORT_BASED_PRIO_M		KS_PRIO_M</div><div class='add'>+#define PORT_BASED_PRIO_0		0</div><div class='add'>+#define PORT_BASED_PRIO_1		1</div><div class='add'>+#define PORT_BASED_PRIO_2		2</div><div class='add'>+#define PORT_BASED_PRIO_3		3</div><div class='add'>+#define PORT_INSERT_TAG			BIT(2)</div><div class='add'>+#define PORT_REMOVE_TAG			BIT(1)</div><div class='add'>+#define KSZ8795_PORT_2QUEUE_SPLIT_EN	BIT(0)</div><div class='add'>+#define KSZ8873_PORT_4QUEUE_SPLIT_EN	BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_1_CTRL_1		0x11</div><div class='add'>+#define REG_PORT_2_CTRL_1		0x21</div><div class='add'>+#define REG_PORT_3_CTRL_1		0x31</div><div class='add'>+#define REG_PORT_4_CTRL_1		0x41</div><div class='add'>+#define REG_PORT_5_CTRL_1		0x51</div><div class='add'>+</div><div class='add'>+#define PORT_MIRROR_SNIFFER		BIT(7)</div><div class='add'>+#define PORT_MIRROR_RX			BIT(6)</div><div class='add'>+#define PORT_MIRROR_TX			BIT(5)</div><div class='add'>+#define PORT_VLAN_MEMBERSHIP		KS_PORT_M</div><div class='add'>+</div><div class='add'>+#define REG_PORT_1_CTRL_2		0x12</div><div class='add'>+#define REG_PORT_2_CTRL_2		0x22</div><div class='add'>+#define REG_PORT_3_CTRL_2		0x32</div><div class='add'>+#define REG_PORT_4_CTRL_2		0x42</div><div class='add'>+#define REG_PORT_5_CTRL_2		0x52</div><div class='add'>+</div><div class='add'>+#define KSZ8873_PORT_2QUEUE_SPLIT_EN	BIT(7)</div><div class='add'>+#define PORT_INGRESS_FILTER		BIT(6)</div><div class='add'>+#define PORT_DISCARD_NON_VID		BIT(5)</div><div class='add'>+#define PORT_FORCE_FLOW_CTRL		BIT(4)</div><div class='add'>+#define PORT_BACK_PRESSURE		BIT(3)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_1_CTRL_3		0x13</div><div class='add'>+#define REG_PORT_2_CTRL_3		0x23</div><div class='add'>+#define REG_PORT_3_CTRL_3		0x33</div><div class='add'>+#define REG_PORT_4_CTRL_3		0x43</div><div class='add'>+#define REG_PORT_5_CTRL_3		0x53</div><div class='add'>+#define REG_PORT_1_CTRL_4		0x14</div><div class='add'>+#define REG_PORT_2_CTRL_4		0x24</div><div class='add'>+#define REG_PORT_3_CTRL_4		0x34</div><div class='add'>+#define REG_PORT_4_CTRL_4		0x44</div><div class='add'>+#define REG_PORT_5_CTRL_4		0x54</div><div class='add'>+</div><div class='add'>+#define PORT_DEFAULT_VID		0x0001</div><div class='add'>+</div><div class='add'>+#define REG_PORT_1_CTRL_5		0x15</div><div class='add'>+#define REG_PORT_2_CTRL_5		0x25</div><div class='add'>+#define REG_PORT_3_CTRL_5		0x35</div><div class='add'>+#define REG_PORT_4_CTRL_5		0x45</div><div class='add'>+#define REG_PORT_5_CTRL_5		0x55</div><div class='add'>+</div><div class='add'>+#define PORT_ACL_ENABLE			BIT(2)</div><div class='add'>+#define PORT_AUTHEN_MODE		0x3</div><div class='add'>+#define PORT_AUTHEN_PASS		0</div><div class='add'>+#define PORT_AUTHEN_BLOCK		1</div><div class='add'>+#define PORT_AUTHEN_TRAP		2</div><div class='add'>+</div><div class='add'>+#define REG_PORT_5_CTRL_6		0x56</div><div class='add'>+</div><div class='add'>+#define PORT_MII_INTERNAL_CLOCK		BIT(7)</div><div class='add'>+#define PORT_GMII_MAC_MODE		BIT(2)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_1_CTRL_7		0x17</div><div class='add'>+#define REG_PORT_2_CTRL_7		0x27</div><div class='add'>+#define REG_PORT_3_CTRL_7		0x37</div><div class='add'>+#define REG_PORT_4_CTRL_7		0x47</div><div class='add'>+</div><div class='add'>+#define PORT_AUTO_NEG_ASYM_PAUSE	BIT(5)</div><div class='add'>+#define PORT_AUTO_NEG_SYM_PAUSE		BIT(4)</div><div class='add'>+#define PORT_AUTO_NEG_100BTX_FD		BIT(3)</div><div class='add'>+#define PORT_AUTO_NEG_100BTX		BIT(2)</div><div class='add'>+#define PORT_AUTO_NEG_10BT_FD		BIT(1)</div><div class='add'>+#define PORT_AUTO_NEG_10BT		BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_1_STATUS_0		0x18</div><div class='add'>+#define REG_PORT_2_STATUS_0		0x28</div><div class='add'>+#define REG_PORT_3_STATUS_0		0x38</div><div class='add'>+#define REG_PORT_4_STATUS_0		0x48</div><div class='add'>+</div><div class='add'>+/* For KSZ8765. */</div><div class='add'>+#define PORT_REMOTE_ASYM_PAUSE		BIT(5)</div><div class='add'>+#define PORT_REMOTE_SYM_PAUSE		BIT(4)</div><div class='add'>+#define PORT_REMOTE_100BTX_FD		BIT(3)</div><div class='add'>+#define PORT_REMOTE_100BTX		BIT(2)</div><div class='add'>+#define PORT_REMOTE_10BT_FD		BIT(1)</div><div class='add'>+#define PORT_REMOTE_10BT		BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_1_STATUS_1		0x19</div><div class='add'>+#define REG_PORT_2_STATUS_1		0x29</div><div class='add'>+#define REG_PORT_3_STATUS_1		0x39</div><div class='add'>+#define REG_PORT_4_STATUS_1		0x49</div><div class='add'>+</div><div class='add'>+#define PORT_HP_MDIX			BIT(7)</div><div class='add'>+#define PORT_REVERSED_POLARITY		BIT(5)</div><div class='add'>+#define PORT_TX_FLOW_CTRL		BIT(4)</div><div class='add'>+#define PORT_RX_FLOW_CTRL		BIT(3)</div><div class='add'>+#define PORT_STAT_SPEED_100MBIT		BIT(2)</div><div class='add'>+#define PORT_STAT_FULL_DUPLEX		BIT(1)</div><div class='add'>+</div><div class='add'>+#define PORT_REMOTE_FAULT		BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_1_LINK_MD_CTRL		0x1A</div><div class='add'>+#define REG_PORT_2_LINK_MD_CTRL		0x2A</div><div class='add'>+#define REG_PORT_3_LINK_MD_CTRL		0x3A</div><div class='add'>+#define REG_PORT_4_LINK_MD_CTRL		0x4A</div><div class='add'>+</div><div class='add'>+#define PORT_CABLE_10M_SHORT		BIT(7)</div><div class='add'>+#define PORT_CABLE_DIAG_RESULT_M	GENMASK(6, 5)</div><div class='add'>+#define PORT_CABLE_DIAG_RESULT_S	5</div><div class='add'>+#define PORT_CABLE_STAT_NORMAL		0</div><div class='add'>+#define PORT_CABLE_STAT_OPEN		1</div><div class='add'>+#define PORT_CABLE_STAT_SHORT		2</div><div class='add'>+#define PORT_CABLE_STAT_FAILED		3</div><div class='add'>+#define PORT_START_CABLE_DIAG		BIT(4)</div><div class='add'>+#define PORT_FORCE_LINK			BIT(3)</div><div class='add'>+#define PORT_POWER_SAVING		BIT(2)</div><div class='add'>+#define PORT_PHY_REMOTE_LOOPBACK	BIT(1)</div><div class='add'>+#define PORT_CABLE_FAULT_COUNTER_H	0x01</div><div class='add'>+</div><div class='add'>+#define REG_PORT_1_LINK_MD_RESULT	0x1B</div><div class='add'>+#define REG_PORT_2_LINK_MD_RESULT	0x2B</div><div class='add'>+#define REG_PORT_3_LINK_MD_RESULT	0x3B</div><div class='add'>+#define REG_PORT_4_LINK_MD_RESULT	0x4B</div><div class='add'>+</div><div class='add'>+#define PORT_CABLE_FAULT_COUNTER_L	0xFF</div><div class='add'>+#define PORT_CABLE_FAULT_COUNTER	0x1FF</div><div class='add'>+</div><div class='add'>+#define REG_PORT_1_CTRL_9		0x1C</div><div class='add'>+#define REG_PORT_2_CTRL_9		0x2C</div><div class='add'>+#define REG_PORT_3_CTRL_9		0x3C</div><div class='add'>+#define REG_PORT_4_CTRL_9		0x4C</div><div class='add'>+</div><div class='add'>+#define PORT_AUTO_NEG_ENABLE		BIT(7)</div><div class='add'>+#define PORT_AUTO_NEG_DISABLE		BIT(7)</div><div class='add'>+#define PORT_FORCE_100_MBIT		BIT(6)</div><div class='add'>+#define PORT_FORCE_FULL_DUPLEX		BIT(5)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_1_CTRL_10		0x1D</div><div class='add'>+#define REG_PORT_2_CTRL_10		0x2D</div><div class='add'>+#define REG_PORT_3_CTRL_10		0x3D</div><div class='add'>+#define REG_PORT_4_CTRL_10		0x4D</div><div class='add'>+</div><div class='add'>+#define PORT_LED_OFF			BIT(7)</div><div class='add'>+#define PORT_TX_DISABLE			BIT(6)</div><div class='add'>+#define PORT_AUTO_NEG_RESTART		BIT(5)</div><div class='add'>+#define PORT_POWER_DOWN			BIT(3)</div><div class='add'>+#define PORT_AUTO_MDIX_DISABLE		BIT(2)</div><div class='add'>+#define PORT_FORCE_MDIX			BIT(1)</div><div class='add'>+#define PORT_MAC_LOOPBACK		BIT(0)</div><div class='add'>+#define KSZ8873_PORT_PHY_LOOPBACK	BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_1_STATUS_2		0x1E</div><div class='add'>+#define REG_PORT_2_STATUS_2		0x2E</div><div class='add'>+#define REG_PORT_3_STATUS_2		0x3E</div><div class='add'>+#define REG_PORT_4_STATUS_2		0x4E</div><div class='add'>+</div><div class='add'>+#define PORT_MDIX_STATUS		BIT(7)</div><div class='add'>+#define PORT_AUTO_NEG_COMPLETE		BIT(6)</div><div class='add'>+#define PORT_STAT_LINK_GOOD		BIT(5)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_1_STATUS_3		0x1F</div><div class='add'>+#define REG_PORT_2_STATUS_3		0x2F</div><div class='add'>+#define REG_PORT_3_STATUS_3		0x3F</div><div class='add'>+#define REG_PORT_4_STATUS_3		0x4F</div><div class='add'>+</div><div class='add'>+#define PORT_PHY_LOOPBACK		BIT(7)</div><div class='add'>+#define PORT_PHY_ISOLATE		BIT(5)</div><div class='add'>+#define PORT_PHY_SOFT_RESET		BIT(4)</div><div class='add'>+#define PORT_PHY_FORCE_LINK		BIT(3)</div><div class='add'>+#define PORT_PHY_MODE_M			0x7</div><div class='add'>+#define PHY_MODE_IN_AUTO_NEG		1</div><div class='add'>+#define PHY_MODE_10BT_HALF		2</div><div class='add'>+#define PHY_MODE_100BT_HALF		3</div><div class='add'>+#define PHY_MODE_10BT_FULL		5</div><div class='add'>+#define PHY_MODE_100BT_FULL		6</div><div class='add'>+#define PHY_MODE_ISOLDATE		7</div><div class='add'>+</div><div class='add'>+#define REG_PORT_CTRL_0			0x00</div><div class='add'>+#define REG_PORT_CTRL_1			0x01</div><div class='add'>+#define REG_PORT_CTRL_2			0x02</div><div class='add'>+#define REG_PORT_CTRL_VID		0x03</div><div class='add'>+</div><div class='add'>+#define REG_PORT_CTRL_5			0x05</div><div class='add'>+</div><div class='add'>+#define REG_PORT_STATUS_1		0x09</div><div class='add'>+#define REG_PORT_LINK_MD_CTRL		0x0A</div><div class='add'>+#define REG_PORT_LINK_MD_RESULT		0x0B</div><div class='add'>+#define REG_PORT_CTRL_9			0x0C</div><div class='add'>+#define REG_PORT_CTRL_10		0x0D</div><div class='add'>+#define REG_PORT_STATUS_3		0x0F</div><div class='add'>+</div><div class='add'>+#define REG_PORT_CTRL_12		0xA0</div><div class='add'>+#define REG_PORT_CTRL_13		0xA1</div><div class='add'>+#define REG_PORT_RATE_CTRL_3		0xA2</div><div class='add'>+#define REG_PORT_RATE_CTRL_2		0xA3</div><div class='add'>+#define REG_PORT_RATE_CTRL_1		0xA4</div><div class='add'>+#define REG_PORT_RATE_CTRL_0		0xA5</div><div class='add'>+#define REG_PORT_RATE_LIMIT		0xA6</div><div class='add'>+#define REG_PORT_IN_RATE_0		0xA7</div><div class='add'>+#define REG_PORT_IN_RATE_1		0xA8</div><div class='add'>+#define REG_PORT_IN_RATE_2		0xA9</div><div class='add'>+#define REG_PORT_IN_RATE_3		0xAA</div><div class='add'>+#define REG_PORT_OUT_RATE_0		0xAB</div><div class='add'>+#define REG_PORT_OUT_RATE_1		0xAC</div><div class='add'>+#define REG_PORT_OUT_RATE_2		0xAD</div><div class='add'>+#define REG_PORT_OUT_RATE_3		0xAE</div><div class='add'>+</div><div class='add'>+#define PORT_CTRL_ADDR(port, addr)		\</div><div class='add'>+	((addr) + REG_PORT_1_CTRL_0 + (port) *	\</div><div class='add'>+		(REG_PORT_2_CTRL_0 - REG_PORT_1_CTRL_0))</div><div class='add'>+</div><div class='add'>+#define TABLE_EXT_SELECT_S		5</div><div class='add'>+#define TABLE_EEE_V			1</div><div class='add'>+#define TABLE_ACL_V			2</div><div class='add'>+#define TABLE_PME_V			4</div><div class='add'>+#define TABLE_LINK_MD_V			5</div><div class='add'>+#define TABLE_EEE			(TABLE_EEE_V &lt;&lt; TABLE_EXT_SELECT_S)</div><div class='add'>+#define TABLE_ACL			(TABLE_ACL_V &lt;&lt; TABLE_EXT_SELECT_S)</div><div class='add'>+#define TABLE_PME			(TABLE_PME_V &lt;&lt; TABLE_EXT_SELECT_S)</div><div class='add'>+#define TABLE_LINK_MD			(TABLE_LINK_MD &lt;&lt; TABLE_EXT_SELECT_S)</div><div class='add'>+#define TABLE_READ			BIT(4)</div><div class='add'>+#define TABLE_SELECT_S			2</div><div class='add'>+#define TABLE_STATIC_MAC_V		0</div><div class='add'>+#define TABLE_VLAN_V			1</div><div class='add'>+#define TABLE_DYNAMIC_MAC_V		2</div><div class='add'>+#define TABLE_MIB_V			3</div><div class='add'>+#define TABLE_STATIC_MAC		(TABLE_STATIC_MAC_V &lt;&lt; TABLE_SELECT_S)</div><div class='add'>+#define TABLE_VLAN			(TABLE_VLAN_V &lt;&lt; TABLE_SELECT_S)</div><div class='add'>+#define TABLE_DYNAMIC_MAC		(TABLE_DYNAMIC_MAC_V &lt;&lt; TABLE_SELECT_S)</div><div class='add'>+#define TABLE_MIB			(TABLE_MIB_V &lt;&lt; TABLE_SELECT_S)</div><div class='add'>+</div><div class='add'>+#define REG_IND_CTRL_1			0x6F</div><div class='add'>+</div><div class='add'>+#define TABLE_ENTRY_MASK		0x03FF</div><div class='add'>+#define TABLE_EXT_ENTRY_MASK		0x0FFF</div><div class='add'>+</div><div class='add'>+#define REG_IND_DATA_5			0x73</div><div class='add'>+#define REG_IND_DATA_2			0x76</div><div class='add'>+#define REG_IND_DATA_1			0x77</div><div class='add'>+#define REG_IND_DATA_0			0x78</div><div class='add'>+</div><div class='add'>+#define REG_INT_STATUS			0x7C</div><div class='add'>+#define REG_INT_ENABLE			0x7D</div><div class='add'>+</div><div class='add'>+#define INT_PME				BIT(4)</div><div class='add'>+</div><div class='add'>+#define REG_ACL_INT_STATUS		0x7E</div><div class='add'>+#define REG_ACL_INT_ENABLE		0x7F</div><div class='add'>+</div><div class='add'>+#define INT_PORT_5			BIT(4)</div><div class='add'>+#define INT_PORT_4			BIT(3)</div><div class='add'>+#define INT_PORT_3			BIT(2)</div><div class='add'>+#define INT_PORT_2			BIT(1)</div><div class='add'>+#define INT_PORT_1			BIT(0)</div><div class='add'>+</div><div class='add'>+#define INT_PORT_ALL			\</div><div class='add'>+	(INT_PORT_5 | INT_PORT_4 | INT_PORT_3 | INT_PORT_2 | INT_PORT_1)</div><div class='add'>+</div><div class='add'>+#define REG_SW_CTRL_12			0x80</div><div class='add'>+#define REG_SW_CTRL_13			0x81</div><div class='add'>+</div><div class='add'>+#define SWITCH_802_1P_MASK		3</div><div class='add'>+#define SWITCH_802_1P_BASE		3</div><div class='add'>+#define SWITCH_802_1P_SHIFT		2</div><div class='add'>+</div><div class='add'>+#define SW_802_1P_MAP_M			KS_PRIO_M</div><div class='add'>+#define SW_802_1P_MAP_S			KS_PRIO_S</div><div class='add'>+</div><div class='add'>+#define REG_SWITCH_CTRL_14		0x82</div><div class='add'>+</div><div class='add'>+#define SW_PRIO_MAPPING_M		KS_PRIO_M</div><div class='add'>+#define SW_PRIO_MAPPING_S		6</div><div class='add'>+#define SW_PRIO_MAP_3_HI		0</div><div class='add'>+#define SW_PRIO_MAP_2_HI		2</div><div class='add'>+#define SW_PRIO_MAP_0_LO		3</div><div class='add'>+</div><div class='add'>+#define REG_SW_CTRL_15			0x83</div><div class='add'>+#define REG_SW_CTRL_16			0x84</div><div class='add'>+#define REG_SW_CTRL_17			0x85</div><div class='add'>+#define REG_SW_CTRL_18			0x86</div><div class='add'>+</div><div class='add'>+#define SW_SELF_ADDR_FILTER_ENABLE	BIT(6)</div><div class='add'>+</div><div class='add'>+#define REG_SW_UNK_UCAST_CTRL		0x83</div><div class='add'>+#define REG_SW_UNK_MCAST_CTRL		0x84</div><div class='add'>+#define REG_SW_UNK_VID_CTRL		0x85</div><div class='add'>+#define REG_SW_UNK_IP_MCAST_CTRL	0x86</div><div class='add'>+</div><div class='add'>+#define SW_UNK_FWD_ENABLE		BIT(5)</div><div class='add'>+#define SW_UNK_FWD_MAP			KS_PORT_M</div><div class='add'>+</div><div class='add'>+#define REG_SW_CTRL_19			0x87</div><div class='add'>+</div><div class='add'>+#define SW_IN_RATE_LIMIT_PERIOD_M	0x3</div><div class='add'>+#define SW_IN_RATE_LIMIT_PERIOD_S	4</div><div class='add'>+#define SW_IN_RATE_LIMIT_16_MS		0</div><div class='add'>+#define SW_IN_RATE_LIMIT_64_MS		1</div><div class='add'>+#define SW_IN_RATE_LIMIT_256_MS		2</div><div class='add'>+#define SW_OUT_RATE_LIMIT_QUEUE_BASED	BIT(3)</div><div class='add'>+#define SW_INS_TAG_ENABLE		BIT(2)</div><div class='add'>+</div><div class='add'>+#define REG_TOS_PRIO_CTRL_0		0x90</div><div class='add'>+#define REG_TOS_PRIO_CTRL_1		0x91</div><div class='add'>+#define REG_TOS_PRIO_CTRL_2		0x92</div><div class='add'>+#define REG_TOS_PRIO_CTRL_3		0x93</div><div class='add'>+#define REG_TOS_PRIO_CTRL_4		0x94</div><div class='add'>+#define REG_TOS_PRIO_CTRL_5		0x95</div><div class='add'>+#define REG_TOS_PRIO_CTRL_6		0x96</div><div class='add'>+#define REG_TOS_PRIO_CTRL_7		0x97</div><div class='add'>+#define REG_TOS_PRIO_CTRL_8		0x98</div><div class='add'>+#define REG_TOS_PRIO_CTRL_9		0x99</div><div class='add'>+#define REG_TOS_PRIO_CTRL_10		0x9A</div><div class='add'>+#define REG_TOS_PRIO_CTRL_11		0x9B</div><div class='add'>+#define REG_TOS_PRIO_CTRL_12		0x9C</div><div class='add'>+#define REG_TOS_PRIO_CTRL_13		0x9D</div><div class='add'>+#define REG_TOS_PRIO_CTRL_14		0x9E</div><div class='add'>+#define REG_TOS_PRIO_CTRL_15		0x9F</div><div class='add'>+</div><div class='add'>+#define TOS_PRIO_M			KS_PRIO_M</div><div class='add'>+#define TOS_PRIO_S			KS_PRIO_S</div><div class='add'>+</div><div class='add'>+#define REG_SW_CTRL_21			0xA4</div><div class='add'>+</div><div class='add'>+#define SW_IPV6_MLD_OPTION		BIT(3)</div><div class='add'>+#define SW_IPV6_MLD_SNOOP		BIT(2)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_1_CTRL_12		0xB0</div><div class='add'>+#define REG_PORT_2_CTRL_12		0xC0</div><div class='add'>+#define REG_PORT_3_CTRL_12		0xD0</div><div class='add'>+#define REG_PORT_4_CTRL_12		0xE0</div><div class='add'>+#define REG_PORT_5_CTRL_12		0xF0</div><div class='add'>+</div><div class='add'>+#define PORT_PASS_ALL			BIT(6)</div><div class='add'>+#define PORT_INS_TAG_FOR_PORT_5_S	3</div><div class='add'>+#define PORT_INS_TAG_FOR_PORT_5		BIT(3)</div><div class='add'>+#define PORT_INS_TAG_FOR_PORT_4		BIT(2)</div><div class='add'>+#define PORT_INS_TAG_FOR_PORT_3		BIT(1)</div><div class='add'>+#define PORT_INS_TAG_FOR_PORT_2		BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_1_CTRL_13		0xB1</div><div class='add'>+#define REG_PORT_2_CTRL_13		0xC1</div><div class='add'>+#define REG_PORT_3_CTRL_13		0xD1</div><div class='add'>+#define REG_PORT_4_CTRL_13		0xE1</div><div class='add'>+#define REG_PORT_5_CTRL_13		0xF1</div><div class='add'>+</div><div class='add'>+#define KSZ8795_PORT_4QUEUE_SPLIT_EN	BIT(1)</div><div class='add'>+#define PORT_DROP_TAG			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_1_CTRL_14		0xB2</div><div class='add'>+#define REG_PORT_2_CTRL_14		0xC2</div><div class='add'>+#define REG_PORT_3_CTRL_14		0xD2</div><div class='add'>+#define REG_PORT_4_CTRL_14		0xE2</div><div class='add'>+#define REG_PORT_5_CTRL_14		0xF2</div><div class='add'>+#define REG_PORT_1_CTRL_15		0xB3</div><div class='add'>+#define REG_PORT_2_CTRL_15		0xC3</div><div class='add'>+#define REG_PORT_3_CTRL_15		0xD3</div><div class='add'>+#define REG_PORT_4_CTRL_15		0xE3</div><div class='add'>+#define REG_PORT_5_CTRL_15		0xF3</div><div class='add'>+#define REG_PORT_1_CTRL_16		0xB4</div><div class='add'>+#define REG_PORT_2_CTRL_16		0xC4</div><div class='add'>+#define REG_PORT_3_CTRL_16		0xD4</div><div class='add'>+#define REG_PORT_4_CTRL_16		0xE4</div><div class='add'>+#define REG_PORT_5_CTRL_16		0xF4</div><div class='add'>+#define REG_PORT_1_CTRL_17		0xB5</div><div class='add'>+#define REG_PORT_2_CTRL_17		0xC5</div><div class='add'>+#define REG_PORT_3_CTRL_17		0xD5</div><div class='add'>+#define REG_PORT_4_CTRL_17		0xE5</div><div class='add'>+#define REG_PORT_5_CTRL_17		0xF5</div><div class='add'>+</div><div class='add'>+#define REG_PORT_1_RATE_CTRL_3		0xB2</div><div class='add'>+#define REG_PORT_1_RATE_CTRL_2		0xB3</div><div class='add'>+#define REG_PORT_1_RATE_CTRL_1		0xB4</div><div class='add'>+#define REG_PORT_1_RATE_CTRL_0		0xB5</div><div class='add'>+#define REG_PORT_2_RATE_CTRL_3		0xC2</div><div class='add'>+#define REG_PORT_2_RATE_CTRL_2		0xC3</div><div class='add'>+#define REG_PORT_2_RATE_CTRL_1		0xC4</div><div class='add'>+#define REG_PORT_2_RATE_CTRL_0		0xC5</div><div class='add'>+#define REG_PORT_3_RATE_CTRL_3		0xD2</div><div class='add'>+#define REG_PORT_3_RATE_CTRL_2		0xD3</div><div class='add'>+#define REG_PORT_3_RATE_CTRL_1		0xD4</div><div class='add'>+#define REG_PORT_3_RATE_CTRL_0		0xD5</div><div class='add'>+#define REG_PORT_4_RATE_CTRL_3		0xE2</div><div class='add'>+#define REG_PORT_4_RATE_CTRL_2		0xE3</div><div class='add'>+#define REG_PORT_4_RATE_CTRL_1		0xE4</div><div class='add'>+#define REG_PORT_4_RATE_CTRL_0		0xE5</div><div class='add'>+#define REG_PORT_5_RATE_CTRL_3		0xF2</div><div class='add'>+#define REG_PORT_5_RATE_CTRL_2		0xF3</div><div class='add'>+#define REG_PORT_5_RATE_CTRL_1		0xF4</div><div class='add'>+#define REG_PORT_5_RATE_CTRL_0		0xF5</div><div class='add'>+</div><div class='add'>+#define RATE_CTRL_ENABLE		BIT(7)</div><div class='add'>+#define RATE_RATIO_M			(BIT(7) - 1)</div><div class='add'>+</div><div class='add'>+#define PORT_OUT_RATE_ENABLE		BIT(7)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_1_RATE_LIMIT		0xB6</div><div class='add'>+#define REG_PORT_2_RATE_LIMIT		0xC6</div><div class='add'>+#define REG_PORT_3_RATE_LIMIT		0xD6</div><div class='add'>+#define REG_PORT_4_RATE_LIMIT		0xE6</div><div class='add'>+#define REG_PORT_5_RATE_LIMIT		0xF6</div><div class='add'>+</div><div class='add'>+#define PORT_IN_PORT_BASED_S		6</div><div class='add'>+#define PORT_RATE_PACKET_BASED_S	5</div><div class='add'>+#define PORT_IN_FLOW_CTRL_S		4</div><div class='add'>+#define PORT_IN_LIMIT_MODE_M		0x3</div><div class='add'>+#define PORT_IN_LIMIT_MODE_S		2</div><div class='add'>+#define PORT_COUNT_IFG_S		1</div><div class='add'>+#define PORT_COUNT_PREAMBLE_S		0</div><div class='add'>+#define PORT_IN_PORT_BASED		BIT(PORT_IN_PORT_BASED_S)</div><div class='add'>+#define PORT_RATE_PACKET_BASED		BIT(PORT_RATE_PACKET_BASED_S)</div><div class='add'>+#define PORT_IN_FLOW_CTRL		BIT(PORT_IN_FLOW_CTRL_S)</div><div class='add'>+#define PORT_IN_ALL			0</div><div class='add'>+#define PORT_IN_UNICAST			1</div><div class='add'>+#define PORT_IN_MULTICAST		2</div><div class='add'>+#define PORT_IN_BROADCAST		3</div><div class='add'>+#define PORT_COUNT_IFG			BIT(PORT_COUNT_IFG_S)</div><div class='add'>+#define PORT_COUNT_PREAMBLE		BIT(PORT_COUNT_PREAMBLE_S)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_1_IN_RATE_0		0xB7</div><div class='add'>+#define REG_PORT_2_IN_RATE_0		0xC7</div><div class='add'>+#define REG_PORT_3_IN_RATE_0		0xD7</div><div class='add'>+#define REG_PORT_4_IN_RATE_0		0xE7</div><div class='add'>+#define REG_PORT_5_IN_RATE_0		0xF7</div><div class='add'>+#define REG_PORT_1_IN_RATE_1		0xB8</div><div class='add'>+#define REG_PORT_2_IN_RATE_1		0xC8</div><div class='add'>+#define REG_PORT_3_IN_RATE_1		0xD8</div><div class='add'>+#define REG_PORT_4_IN_RATE_1		0xE8</div><div class='add'>+#define REG_PORT_5_IN_RATE_1		0xF8</div><div class='add'>+#define REG_PORT_1_IN_RATE_2		0xB9</div><div class='add'>+#define REG_PORT_2_IN_RATE_2		0xC9</div><div class='add'>+#define REG_PORT_3_IN_RATE_2		0xD9</div><div class='add'>+#define REG_PORT_4_IN_RATE_2		0xE9</div><div class='add'>+#define REG_PORT_5_IN_RATE_2		0xF9</div><div class='add'>+#define REG_PORT_1_IN_RATE_3		0xBA</div><div class='add'>+#define REG_PORT_2_IN_RATE_3		0xCA</div><div class='add'>+#define REG_PORT_3_IN_RATE_3		0xDA</div><div class='add'>+#define REG_PORT_4_IN_RATE_3		0xEA</div><div class='add'>+#define REG_PORT_5_IN_RATE_3		0xFA</div><div class='add'>+</div><div class='add'>+#define PORT_IN_RATE_ENABLE		BIT(7)</div><div class='add'>+#define PORT_RATE_LIMIT_M		(BIT(7) - 1)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_1_OUT_RATE_0		0xBB</div><div class='add'>+#define REG_PORT_2_OUT_RATE_0		0xCB</div><div class='add'>+#define REG_PORT_3_OUT_RATE_0		0xDB</div><div class='add'>+#define REG_PORT_4_OUT_RATE_0		0xEB</div><div class='add'>+#define REG_PORT_5_OUT_RATE_0		0xFB</div><div class='add'>+#define REG_PORT_1_OUT_RATE_1		0xBC</div><div class='add'>+#define REG_PORT_2_OUT_RATE_1		0xCC</div><div class='add'>+#define REG_PORT_3_OUT_RATE_1		0xDC</div><div class='add'>+#define REG_PORT_4_OUT_RATE_1		0xEC</div><div class='add'>+#define REG_PORT_5_OUT_RATE_1		0xFC</div><div class='add'>+#define REG_PORT_1_OUT_RATE_2		0xBD</div><div class='add'>+#define REG_PORT_2_OUT_RATE_2		0xCD</div><div class='add'>+#define REG_PORT_3_OUT_RATE_2		0xDD</div><div class='add'>+#define REG_PORT_4_OUT_RATE_2		0xED</div><div class='add'>+#define REG_PORT_5_OUT_RATE_2		0xFD</div><div class='add'>+#define REG_PORT_1_OUT_RATE_3		0xBE</div><div class='add'>+#define REG_PORT_2_OUT_RATE_3		0xCE</div><div class='add'>+#define REG_PORT_3_OUT_RATE_3		0xDE</div><div class='add'>+#define REG_PORT_4_OUT_RATE_3		0xEE</div><div class='add'>+#define REG_PORT_5_OUT_RATE_3		0xFE</div><div class='add'>+</div><div class='add'>+/* 88x3 specific */</div><div class='add'>+</div><div class='add'>+#define REG_SW_INSERT_SRC_PVID		0xC2</div><div class='add'>+</div><div class='add'>+/* PME */</div><div class='add'>+</div><div class='add'>+#define SW_PME_OUTPUT_ENABLE		BIT(1)</div><div class='add'>+#define SW_PME_ACTIVE_HIGH		BIT(0)</div><div class='add'>+</div><div class='add'>+#define PORT_MAGIC_PACKET_DETECT	BIT(2)</div><div class='add'>+#define PORT_LINK_UP_DETECT		BIT(1)</div><div class='add'>+#define PORT_ENERGY_DETECT		BIT(0)</div><div class='add'>+</div><div class='add'>+/* ACL */</div><div class='add'>+</div><div class='add'>+#define ACL_FIRST_RULE_M		0xF</div><div class='add'>+</div><div class='add'>+#define ACL_MODE_M			0x3</div><div class='add'>+#define ACL_MODE_S			4</div><div class='add'>+#define ACL_MODE_DISABLE		0</div><div class='add'>+#define ACL_MODE_LAYER_2		1</div><div class='add'>+#define ACL_MODE_LAYER_3		2</div><div class='add'>+#define ACL_MODE_LAYER_4		3</div><div class='add'>+#define ACL_ENABLE_M			0x3</div><div class='add'>+#define ACL_ENABLE_S			2</div><div class='add'>+#define ACL_ENABLE_2_COUNT		0</div><div class='add'>+#define ACL_ENABLE_2_TYPE		1</div><div class='add'>+#define ACL_ENABLE_2_MAC		2</div><div class='add'>+#define ACL_ENABLE_2_BOTH		3</div><div class='add'>+#define ACL_ENABLE_3_IP			1</div><div class='add'>+#define ACL_ENABLE_3_SRC_DST_COMP	2</div><div class='add'>+#define ACL_ENABLE_4_PROTOCOL		0</div><div class='add'>+#define ACL_ENABLE_4_TCP_PORT_COMP	1</div><div class='add'>+#define ACL_ENABLE_4_UDP_PORT_COMP	2</div><div class='add'>+#define ACL_ENABLE_4_TCP_SEQN_COMP	3</div><div class='add'>+#define ACL_SRC				BIT(1)</div><div class='add'>+#define ACL_EQUAL			BIT(0)</div><div class='add'>+</div><div class='add'>+#define ACL_MAX_PORT			0xFFFF</div><div class='add'>+</div><div class='add'>+#define ACL_MIN_PORT			0xFFFF</div><div class='add'>+#define ACL_IP_ADDR			0xFFFFFFFF</div><div class='add'>+#define ACL_TCP_SEQNUM			0xFFFFFFFF</div><div class='add'>+</div><div class='add'>+#define ACL_RESERVED			0xF8</div><div class='add'>+#define ACL_PORT_MODE_M			0x3</div><div class='add'>+#define ACL_PORT_MODE_S			1</div><div class='add'>+#define ACL_PORT_MODE_DISABLE		0</div><div class='add'>+#define ACL_PORT_MODE_EITHER		1</div><div class='add'>+#define ACL_PORT_MODE_IN_RANGE		2</div><div class='add'>+#define ACL_PORT_MODE_OUT_OF_RANGE	3</div><div class='add'>+</div><div class='add'>+#define ACL_TCP_FLAG_ENABLE		BIT(0)</div><div class='add'>+</div><div class='add'>+#define ACL_TCP_FLAG_M			0xFF</div><div class='add'>+</div><div class='add'>+#define ACL_TCP_FLAG			0xFF</div><div class='add'>+#define ACL_ETH_TYPE			0xFFFF</div><div class='add'>+#define ACL_IP_M			0xFFFFFFFF</div><div class='add'>+</div><div class='add'>+#define ACL_PRIO_MODE_M			0x3</div><div class='add'>+#define ACL_PRIO_MODE_S			6</div><div class='add'>+#define ACL_PRIO_MODE_DISABLE		0</div><div class='add'>+#define ACL_PRIO_MODE_HIGHER		1</div><div class='add'>+#define ACL_PRIO_MODE_LOWER		2</div><div class='add'>+#define ACL_PRIO_MODE_REPLACE		3</div><div class='add'>+#define ACL_PRIO_M			0x7</div><div class='add'>+#define ACL_PRIO_S			3</div><div class='add'>+#define ACL_VLAN_PRIO_REPLACE		BIT(2)</div><div class='add'>+#define ACL_VLAN_PRIO_M			0x7</div><div class='add'>+#define ACL_VLAN_PRIO_HI_M		0x3</div><div class='add'>+</div><div class='add'>+#define ACL_VLAN_PRIO_LO_M		0x8</div><div class='add'>+#define ACL_VLAN_PRIO_S			7</div><div class='add'>+#define ACL_MAP_MODE_M			0x3</div><div class='add'>+#define ACL_MAP_MODE_S			5</div><div class='add'>+#define ACL_MAP_MODE_DISABLE		0</div><div class='add'>+#define ACL_MAP_MODE_OR			1</div><div class='add'>+#define ACL_MAP_MODE_AND		2</div><div class='add'>+#define ACL_MAP_MODE_REPLACE		3</div><div class='add'>+#define ACL_MAP_PORT_M			0x1F</div><div class='add'>+</div><div class='add'>+#define ACL_CNT_M			(BIT(11) - 1)</div><div class='add'>+#define ACL_CNT_S			5</div><div class='add'>+#define ACL_MSEC_UNIT			BIT(4)</div><div class='add'>+#define ACL_INTR_MODE			BIT(3)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_ACL_BYTE_EN_MSB	0x10</div><div class='add'>+</div><div class='add'>+#define ACL_BYTE_EN_MSB_M		0x3F</div><div class='add'>+</div><div class='add'>+#define REG_PORT_ACL_BYTE_EN_LSB	0x11</div><div class='add'>+</div><div class='add'>+#define ACL_ACTION_START		0xA</div><div class='add'>+#define ACL_ACTION_LEN			2</div><div class='add'>+#define ACL_INTR_CNT_START		0xB</div><div class='add'>+#define ACL_RULESET_START		0xC</div><div class='add'>+#define ACL_RULESET_LEN			2</div><div class='add'>+#define ACL_TABLE_LEN			14</div><div class='add'>+</div><div class='add'>+#define ACL_ACTION_ENABLE		0x000C</div><div class='add'>+#define ACL_MATCH_ENABLE		0x1FF0</div><div class='add'>+#define ACL_RULESET_ENABLE		0x2003</div><div class='add'>+#define ACL_BYTE_ENABLE			((ACL_BYTE_EN_MSB_M &lt;&lt; 8) | 0xFF)</div><div class='add'>+#define ACL_MODE_ENABLE			(0x10 &lt;&lt; 8)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_ACL_CTRL_0		0x12</div><div class='add'>+</div><div class='add'>+#define PORT_ACL_WRITE_DONE		BIT(6)</div><div class='add'>+#define PORT_ACL_READ_DONE		BIT(5)</div><div class='add'>+#define PORT_ACL_WRITE			BIT(4)</div><div class='add'>+#define PORT_ACL_INDEX_M		0xF</div><div class='add'>+</div><div class='add'>+#define REG_PORT_ACL_CTRL_1		0x13</div><div class='add'>+</div><div class='add'>+#define PORT_ACL_FORCE_DLR_MISS		BIT(0)</div><div class='add'>+</div><div class='add'>+#define KSZ8795_ID_HI			0x0022</div><div class='add'>+#define KSZ8795_ID_LO			0x1550</div><div class='add'>+#define KSZ8863_ID_LO			0x1430</div><div class='add'>+</div><div class='add'>+#define PHY_REG_LINK_MD			0x1D</div><div class='add'>+</div><div class='add'>+#define PHY_START_CABLE_DIAG		BIT(15)</div><div class='add'>+#define PHY_CABLE_DIAG_RESULT_M		GENMASK(14, 13)</div><div class='add'>+#define PHY_CABLE_DIAG_RESULT		0x6000</div><div class='add'>+#define PHY_CABLE_STAT_NORMAL		0x0000</div><div class='add'>+#define PHY_CABLE_STAT_OPEN		0x2000</div><div class='add'>+#define PHY_CABLE_STAT_SHORT		0x4000</div><div class='add'>+#define PHY_CABLE_STAT_FAILED		0x6000</div><div class='add'>+#define PHY_CABLE_10M_SHORT		BIT(12)</div><div class='add'>+#define PHY_CABLE_FAULT_COUNTER_M	GENMASK(8, 0)</div><div class='add'>+</div><div class='add'>+#define PHY_REG_PHY_CTRL		0x1F</div><div class='add'>+</div><div class='add'>+#define PHY_MODE_M			0x7</div><div class='add'>+#define PHY_MODE_S			8</div><div class='add'>+#define PHY_STAT_REVERSED_POLARITY	BIT(5)</div><div class='add'>+#define PHY_STAT_MDIX			BIT(4)</div><div class='add'>+#define PHY_FORCE_LINK			BIT(3)</div><div class='add'>+#define PHY_POWER_SAVING_ENABLE		BIT(2)</div><div class='add'>+#define PHY_REMOTE_LOOPBACK		BIT(1)</div><div class='add'>+</div><div class='add'>+/* KSZ8463 specific registers. */</div><div class='add'>+#define P1MBCR				0x4C</div><div class='add'>+#define P1MBSR				0x4E</div><div class='add'>+#define PHY1ILR				0x50</div><div class='add'>+#define PHY1IHR				0x52</div><div class='add'>+#define P1ANAR				0x54</div><div class='add'>+#define P1ANLPR				0x56</div><div class='add'>+#define P2MBCR				0x58</div><div class='add'>+#define P2MBSR				0x5A</div><div class='add'>+#define PHY2ILR				0x5C</div><div class='add'>+#define PHY2IHR				0x5E</div><div class='add'>+#define P2ANAR				0x60</div><div class='add'>+#define P2ANLPR				0x62</div><div class='add'>+</div><div class='add'>+#define P1CR1				0x6C</div><div class='add'>+#define P1CR2				0x6E</div><div class='add'>+#define P1CR3				0x72</div><div class='add'>+#define P1CR4				0x7E</div><div class='add'>+#define P1SR				0x80</div><div class='add'>+</div><div class='add'>+#define KSZ8463_FLUSH_TABLE_CTRL	0xAD</div><div class='add'>+</div><div class='add'>+#define KSZ8463_FLUSH_DYN_MAC_TABLE	BIT(2)</div><div class='add'>+#define KSZ8463_FLUSH_STA_MAC_TABLE	BIT(1)</div><div class='add'>+</div><div class='add'>+#define KSZ8463_REG_SW_CTRL_9		0xAE</div><div class='add'>+</div><div class='add'>+#define KSZ8463_REG_CFG_CTRL		0xD8</div><div class='add'>+</div><div class='add'>+#define PORT_2_COPPER_MODE		BIT(7)</div><div class='add'>+#define PORT_1_COPPER_MODE		BIT(6)</div><div class='add'>+#define PORT_COPPER_MODE_S		6</div><div class='add'>+</div><div class='add'>+#define KSZ8463_REG_SW_RESET		0x126</div><div class='add'>+</div><div class='add'>+#define KSZ8463_GLOBAL_SOFTWARE_RESET	BIT(0)</div><div class='add'>+</div><div class='add'>+#define KSZ8463_PTP_CLK_CTRL		0x600</div><div class='add'>+</div><div class='add'>+#define PTP_CLK_ENABLE			BIT(1)</div><div class='add'>+</div><div class='add'>+#define KSZ8463_PTP_MSG_CONF1		0x620</div><div class='add'>+</div><div class='add'>+#define PTP_ENABLE			BIT(6)</div><div class='add'>+</div><div class='add'>+#define KSZ8463_REG_DSP_CTRL_6		0x734</div><div class='add'>+</div><div class='add'>+#define COPPER_RECEIVE_ADJUSTMENT	BIT(13)</div><div class='add'>+</div><div class='add'>+/* Chip resource */</div><div class='add'>+</div><div class='add'>+#define PRIO_QUEUES			4</div><div class='add'>+</div><div class='add'>+#define KS_PRIO_IN_REG			4</div><div class='add'>+</div><div class='add'>+#define MIB_COUNTER_NUM		0x20</div><div class='add'>+</div><div class='add'>+/* Common names used by other drivers */</div><div class='add'>+</div><div class='add'>+#define P_BCAST_STORM_CTRL		REG_PORT_CTRL_0</div><div class='add'>+#define P_PRIO_CTRL			REG_PORT_CTRL_0</div><div class='add'>+#define P_TAG_CTRL			REG_PORT_CTRL_0</div><div class='add'>+#define P_MIRROR_CTRL			REG_PORT_CTRL_1</div><div class='add'>+#define P_802_1P_CTRL			REG_PORT_CTRL_2</div><div class='add'>+#define P_PASS_ALL_CTRL			REG_PORT_CTRL_12</div><div class='add'>+#define P_INS_SRC_PVID_CTRL		REG_PORT_CTRL_12</div><div class='add'>+#define P_DROP_TAG_CTRL			REG_PORT_CTRL_13</div><div class='add'>+#define P_RATE_LIMIT_CTRL		REG_PORT_RATE_LIMIT</div><div class='add'>+</div><div class='add'>+#define S_UNKNOWN_DA_CTRL		REG_SWITCH_CTRL_12</div><div class='add'>+#define S_FORWARD_INVALID_VID_CTRL	REG_FORWARD_INVALID_VID</div><div class='add'>+</div><div class='add'>+#define S_FLUSH_TABLE_CTRL		REG_SW_CTRL_0</div><div class='add'>+#define S_LINK_AGING_CTRL		REG_SW_CTRL_0</div><div class='add'>+#define S_HUGE_PACKET_CTRL		REG_SW_CTRL_1</div><div class='add'>+#define S_MIRROR_CTRL			REG_SW_CTRL_3</div><div class='add'>+#define S_REPLACE_VID_CTRL		REG_SW_CTRL_4</div><div class='add'>+#define S_PASS_PAUSE_CTRL		REG_SW_CTRL_10</div><div class='add'>+#define S_802_1P_PRIO_CTRL		REG_SW_CTRL_12</div><div class='add'>+#define S_TOS_PRIO_CTRL			REG_TOS_PRIO_CTRL_0</div><div class='add'>+#define S_IPV6_MLD_CTRL			REG_SW_CTRL_21</div><div class='add'>+</div><div class='add'>+#define IND_ACC_TABLE(table)		((table) &lt;&lt; 8)</div><div class='add'>+</div><div class='add'>+/* */</div><div class='add'>+#define REG_IND_EEE_GLOB2_LO		0x34</div><div class='add'>+#define REG_IND_EEE_GLOB2_HI		0x35</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * MIB_COUNTER_VALUE			00-00000000-3FFFFFFF</div><div class='add'>+ * MIB_TOTAL_BYTES			00-0000000F-FFFFFFFF</div><div class='add'>+ * MIB_PACKET_DROPPED			00-00000000-0000FFFF</div><div class='add'>+ * MIB_COUNTER_VALID			00-00000020-00000000</div><div class='add'>+ * MIB_COUNTER_OVERFLOW			00-00000040-00000000</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define MIB_COUNTER_VALUE		0x3FFFFFFF</div><div class='add'>+</div><div class='add'>+#define KSZ8795_MIB_TOTAL_RX_0		0x100</div><div class='add'>+#define KSZ8795_MIB_TOTAL_TX_0		0x101</div><div class='add'>+#define KSZ8795_MIB_TOTAL_RX_1		0x104</div><div class='add'>+#define KSZ8795_MIB_TOTAL_TX_1		0x105</div><div class='add'>+</div><div class='add'>+#define KSZ8863_MIB_PACKET_DROPPED_TX_0 0x100</div><div class='add'>+#define KSZ8863_MIB_PACKET_DROPPED_RX_0 0x103</div><div class='add'>+</div><div class='add'>+#define KSZ8895_MIB_PACKET_DROPPED_RX_0 0x105</div><div class='add'>+</div><div class='add'>+#define MIB_PACKET_DROPPED		0x0000FFFF</div><div class='add'>+</div><div class='add'>+#define MIB_TOTAL_BYTES_H		0x0000000F</div><div class='add'>+</div><div class='add'>+#define TAIL_TAG_OVERRIDE		BIT(6)</div><div class='add'>+#define TAIL_TAG_LOOKUP			BIT(7)</div><div class='add'>+</div><div class='add'>+#define FID_ENTRIES			128</div><div class='add'>+#define KSZ8_DYN_MAC_ENTRIES		1024</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/dsa/microchip/ksz9477.c b/drivers/net/dsa/microchip/ksz9477.c<br/>new file mode 100644<br/>index 000000000000..5facffbb9c9a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz9477.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/ksz9477.c</a></div><div class='hunk'>@@ -0,0 +1,1618 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Microchip KSZ9477 switch driver main logic</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2017-2025 Microchip Technology Inc.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/iopoll.h&gt;</div><div class='add'>+#include &lt;linux/platform_data/microchip-ksz.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/if_bridge.h&gt;</div><div class='add'>+#include &lt;linux/if_vlan.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+#include &lt;net/switchdev.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ksz9477_reg.h"</div><div class='add'>+#include "ksz_common.h"</div><div class='add'>+#include "ksz9477.h"</div><div class='add'>+</div><div class='add'>+static void ksz_cfg(struct ksz_device *dev, u32 addr, u8 bits, bool set)</div><div class='add'>+{</div><div class='add'>+	regmap_update_bits(ksz_regmap_8(dev), addr, bits, set ? bits : 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz_port_cfg(struct ksz_device *dev, int port, int offset, u8 bits,</div><div class='add'>+			 bool set)</div><div class='add'>+{</div><div class='add'>+	regmap_update_bits(ksz_regmap_8(dev), PORT_CTRL_ADDR(port, offset),</div><div class='add'>+			   bits, set ? bits : 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz9477_cfg32(struct ksz_device *dev, u32 addr, u32 bits, bool set)</div><div class='add'>+{</div><div class='add'>+	regmap_update_bits(ksz_regmap_32(dev), addr, bits, set ? bits : 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz9477_port_cfg32(struct ksz_device *dev, int port, int offset,</div><div class='add'>+			       u32 bits, bool set)</div><div class='add'>+{</div><div class='add'>+	regmap_update_bits(ksz_regmap_32(dev), PORT_CTRL_ADDR(port, offset),</div><div class='add'>+			   bits, set ? bits : 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz9477_change_mtu(struct ksz_device *dev, int port, int mtu)</div><div class='add'>+{</div><div class='add'>+	u16 frame_size;</div><div class='add'>+</div><div class='add'>+	if (!dsa_is_cpu_port(dev-&gt;ds, port))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	frame_size = mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;</div><div class='add'>+</div><div class='add'>+	return regmap_update_bits(ksz_regmap_16(dev), REG_SW_MTU__2,</div><div class='add'>+				  REG_SW_MTU_MASK, frame_size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz9477_wait_vlan_ctrl_ready(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	unsigned int val;</div><div class='add'>+</div><div class='add'>+	return regmap_read_poll_timeout(ksz_regmap_8(dev), REG_SW_VLAN_CTRL,</div><div class='add'>+					val, !(val &amp; VLAN_START), 10, 1000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz9477_get_vlan_table(struct ksz_device *dev, u16 vid,</div><div class='add'>+				  u32 *vlan_table)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;vlan_mutex);</div><div class='add'>+</div><div class='add'>+	ksz_write16(dev, REG_SW_VLAN_ENTRY_INDEX__2, vid &amp; VLAN_INDEX_M);</div><div class='add'>+	ksz_write8(dev, REG_SW_VLAN_CTRL, VLAN_READ | VLAN_START);</div><div class='add'>+</div><div class='add'>+	/* wait to be cleared */</div><div class='add'>+	ret = ksz9477_wait_vlan_ctrl_ready(dev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_dbg(dev-&gt;dev, "Failed to read vlan table\n");</div><div class='add'>+		goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ksz_read32(dev, REG_SW_VLAN_ENTRY__4, &amp;vlan_table[0]);</div><div class='add'>+	ksz_read32(dev, REG_SW_VLAN_ENTRY_UNTAG__4, &amp;vlan_table[1]);</div><div class='add'>+	ksz_read32(dev, REG_SW_VLAN_ENTRY_PORTS__4, &amp;vlan_table[2]);</div><div class='add'>+</div><div class='add'>+	ksz_write8(dev, REG_SW_VLAN_CTRL, 0);</div><div class='add'>+</div><div class='add'>+exit:</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;vlan_mutex);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz9477_set_vlan_table(struct ksz_device *dev, u16 vid,</div><div class='add'>+				  u32 *vlan_table)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;vlan_mutex);</div><div class='add'>+</div><div class='add'>+	ksz_write32(dev, REG_SW_VLAN_ENTRY__4, vlan_table[0]);</div><div class='add'>+	ksz_write32(dev, REG_SW_VLAN_ENTRY_UNTAG__4, vlan_table[1]);</div><div class='add'>+	ksz_write32(dev, REG_SW_VLAN_ENTRY_PORTS__4, vlan_table[2]);</div><div class='add'>+</div><div class='add'>+	ksz_write16(dev, REG_SW_VLAN_ENTRY_INDEX__2, vid &amp; VLAN_INDEX_M);</div><div class='add'>+	ksz_write8(dev, REG_SW_VLAN_CTRL, VLAN_START | VLAN_WRITE);</div><div class='add'>+</div><div class='add'>+	/* wait to be cleared */</div><div class='add'>+	ret = ksz9477_wait_vlan_ctrl_ready(dev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_dbg(dev-&gt;dev, "Failed to write vlan table\n");</div><div class='add'>+		goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ksz_write8(dev, REG_SW_VLAN_CTRL, 0);</div><div class='add'>+</div><div class='add'>+	/* update vlan cache table */</div><div class='add'>+	dev-&gt;vlan_cache[vid].table[0] = vlan_table[0];</div><div class='add'>+	dev-&gt;vlan_cache[vid].table[1] = vlan_table[1];</div><div class='add'>+	dev-&gt;vlan_cache[vid].table[2] = vlan_table[2];</div><div class='add'>+</div><div class='add'>+exit:</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;vlan_mutex);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz9477_read_table(struct ksz_device *dev, u32 *table)</div><div class='add'>+{</div><div class='add'>+	ksz_read32(dev, REG_SW_ALU_VAL_A, &amp;table[0]);</div><div class='add'>+	ksz_read32(dev, REG_SW_ALU_VAL_B, &amp;table[1]);</div><div class='add'>+	ksz_read32(dev, REG_SW_ALU_VAL_C, &amp;table[2]);</div><div class='add'>+	ksz_read32(dev, REG_SW_ALU_VAL_D, &amp;table[3]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz9477_write_table(struct ksz_device *dev, u32 *table)</div><div class='add'>+{</div><div class='add'>+	ksz_write32(dev, REG_SW_ALU_VAL_A, table[0]);</div><div class='add'>+	ksz_write32(dev, REG_SW_ALU_VAL_B, table[1]);</div><div class='add'>+	ksz_write32(dev, REG_SW_ALU_VAL_C, table[2]);</div><div class='add'>+	ksz_write32(dev, REG_SW_ALU_VAL_D, table[3]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz9477_wait_alu_ready(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	unsigned int val;</div><div class='add'>+</div><div class='add'>+	return regmap_read_poll_timeout(ksz_regmap_32(dev), REG_SW_ALU_CTRL__4,</div><div class='add'>+					val, !(val &amp; ALU_START), 10, 1000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz9477_wait_alu_sta_ready(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	unsigned int val;</div><div class='add'>+</div><div class='add'>+	return regmap_read_poll_timeout(ksz_regmap_32(dev),</div><div class='add'>+					REG_SW_ALU_STAT_CTRL__4,</div><div class='add'>+					val, !(val &amp; ALU_STAT_START),</div><div class='add'>+					10, 1000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void port_sgmii_s(struct ksz_device *dev, uint port, u16 devid, u16 reg)</div><div class='add'>+{</div><div class='add'>+	u32 data;</div><div class='add'>+</div><div class='add'>+	data = (devid &amp; MII_MMD_CTRL_DEVAD_MASK) &lt;&lt; 16;</div><div class='add'>+	data |= reg;</div><div class='add'>+	ksz_pwrite32(dev, port, REG_PORT_SGMII_ADDR__4, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void port_sgmii_r(struct ksz_device *dev, uint port, u16 devid, u16 reg,</div><div class='add'>+			 u16 *buf)</div><div class='add'>+{</div><div class='add'>+	port_sgmii_s(dev, port, devid, reg);</div><div class='add'>+	ksz_pread16(dev, port, REG_PORT_SGMII_DATA__4 + 2, buf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void port_sgmii_w(struct ksz_device *dev, uint port, u16 devid, u16 reg,</div><div class='add'>+			 u16 buf)</div><div class='add'>+{</div><div class='add'>+	port_sgmii_s(dev, port, devid, reg);</div><div class='add'>+	ksz_pwrite32(dev, port, REG_PORT_SGMII_DATA__4, buf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz9477_pcs_read(struct mii_bus *bus, int phy, int mmd, int reg)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = bus-&gt;priv;</div><div class='add'>+	int port = ksz_get_sgmii_port(dev);</div><div class='add'>+	u16 val;</div><div class='add'>+</div><div class='add'>+	port_sgmii_r(dev, port, mmd, reg, &amp;val);</div><div class='add'>+</div><div class='add'>+	/* Simulate a value to activate special code in the XPCS driver if</div><div class='add'>+	 * supported.</div><div class='add'>+	 */</div><div class='add'>+	if (mmd == MDIO_MMD_PMAPMD) {</div><div class='add'>+		if (reg == MDIO_DEVID1)</div><div class='add'>+			val = 0x9477;</div><div class='add'>+		else if (reg == MDIO_DEVID2)</div><div class='add'>+			val = 0x22 &lt;&lt; 10;</div><div class='add'>+	} else if (mmd == MDIO_MMD_VEND2) {</div><div class='add'>+		struct ksz_port *p = &amp;dev-&gt;ports[port];</div><div class='add'>+</div><div class='add'>+		/* Need to update MII_BMCR register with the exact speed and</div><div class='add'>+		 * duplex mode when running in SGMII mode and this register is</div><div class='add'>+		 * used to detect connected speed in that mode.</div><div class='add'>+		 */</div><div class='add'>+		if (reg == MMD_SR_MII_AUTO_NEG_STATUS) {</div><div class='add'>+			int duplex, speed;</div><div class='add'>+</div><div class='add'>+			if (val &amp; SR_MII_STAT_LINK_UP) {</div><div class='add'>+				speed = (val &gt;&gt; SR_MII_STAT_S) &amp; SR_MII_STAT_M;</div><div class='add'>+				if (speed == SR_MII_STAT_1000_MBPS)</div><div class='add'>+					speed = SPEED_1000;</div><div class='add'>+				else if (speed == SR_MII_STAT_100_MBPS)</div><div class='add'>+					speed = SPEED_100;</div><div class='add'>+				else</div><div class='add'>+					speed = SPEED_10;</div><div class='add'>+</div><div class='add'>+				if (val &amp; SR_MII_STAT_FULL_DUPLEX)</div><div class='add'>+					duplex = DUPLEX_FULL;</div><div class='add'>+				else</div><div class='add'>+					duplex = DUPLEX_HALF;</div><div class='add'>+</div><div class='add'>+				if (!p-&gt;phydev.link ||</div><div class='add'>+				    p-&gt;phydev.speed != speed ||</div><div class='add'>+				    p-&gt;phydev.duplex != duplex) {</div><div class='add'>+					u16 ctrl;</div><div class='add'>+</div><div class='add'>+					p-&gt;phydev.link = 1;</div><div class='add'>+					p-&gt;phydev.speed = speed;</div><div class='add'>+					p-&gt;phydev.duplex = duplex;</div><div class='add'>+					port_sgmii_r(dev, port, mmd, MII_BMCR,</div><div class='add'>+						     &amp;ctrl);</div><div class='add'>+					ctrl &amp;= BMCR_ANENABLE;</div><div class='add'>+					ctrl |= mii_bmcr_encode_fixed(speed,</div><div class='add'>+								      duplex);</div><div class='add'>+					port_sgmii_w(dev, port, mmd, MII_BMCR,</div><div class='add'>+						     ctrl);</div><div class='add'>+				}</div><div class='add'>+			} else {</div><div class='add'>+				p-&gt;phydev.link = 0;</div><div class='add'>+			}</div><div class='add'>+		} else if (reg == MII_BMSR) {</div><div class='add'>+			p-&gt;phydev.link = !!(val &amp; BMSR_LSTATUS);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz9477_pcs_write(struct mii_bus *bus, int phy, int mmd, int reg,</div><div class='add'>+			     u16 val)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = bus-&gt;priv;</div><div class='add'>+	int port = ksz_get_sgmii_port(dev);</div><div class='add'>+</div><div class='add'>+	if (mmd == MDIO_MMD_VEND2) {</div><div class='add'>+		struct ksz_port *p = &amp;dev-&gt;ports[port];</div><div class='add'>+</div><div class='add'>+		if (reg == MMD_SR_MII_AUTO_NEG_CTRL) {</div><div class='add'>+			u16 sgmii_mode = SR_MII_PCS_SGMII &lt;&lt; SR_MII_PCS_MODE_S;</div><div class='add'>+</div><div class='add'>+			/* Need these bits for 1000BASE-X mode to work with</div><div class='add'>+			 * AN on.</div><div class='add'>+			 */</div><div class='add'>+			if (!(val &amp; sgmii_mode))</div><div class='add'>+				val |= SR_MII_SGMII_LINK_UP |</div><div class='add'>+				       SR_MII_TX_CFG_PHY_MASTER;</div><div class='add'>+</div><div class='add'>+			/* SGMII interrupt in the port cannot be masked, so</div><div class='add'>+			 * make sure interrupt is not enabled as it is not</div><div class='add'>+			 * handled.</div><div class='add'>+			 */</div><div class='add'>+			val &amp;= ~SR_MII_AUTO_NEG_COMPLETE_INTR;</div><div class='add'>+		} else if (reg == MII_BMCR) {</div><div class='add'>+			/* The MII_ADVERTISE register needs to write once</div><div class='add'>+			 * before doing auto-negotiation for the correct</div><div class='add'>+			 * config_word to be sent out after reset.</div><div class='add'>+			 */</div><div class='add'>+			if ((val &amp; BMCR_ANENABLE) &amp;&amp; !p-&gt;sgmii_adv_write) {</div><div class='add'>+				u16 adv;</div><div class='add'>+</div><div class='add'>+				/* The SGMII port cannot disable flow control</div><div class='add'>+				 * so it is better to just advertise symmetric</div><div class='add'>+				 * pause.</div><div class='add'>+				 */</div><div class='add'>+				port_sgmii_r(dev, port, mmd, MII_ADVERTISE,</div><div class='add'>+					     &amp;adv);</div><div class='add'>+				adv |= ADVERTISE_1000XPAUSE;</div><div class='add'>+				adv &amp;= ~ADVERTISE_1000XPSE_ASYM;</div><div class='add'>+				port_sgmii_w(dev, port, mmd, MII_ADVERTISE,</div><div class='add'>+					     adv);</div><div class='add'>+				p-&gt;sgmii_adv_write = 1;</div><div class='add'>+			} else if (val &amp; BMCR_RESET) {</div><div class='add'>+				p-&gt;sgmii_adv_write = 0;</div><div class='add'>+			}</div><div class='add'>+		} else if (reg == MII_ADVERTISE) {</div><div class='add'>+			/* XPCS driver writes to this register so there is no</div><div class='add'>+			 * need to update it for the errata.</div><div class='add'>+			 */</div><div class='add'>+			p-&gt;sgmii_adv_write = 1;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	port_sgmii_w(dev, port, mmd, reg, val);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz9477_pcs_create(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	/* This chip has a SGMII port. */</div><div class='add'>+	if (ksz_has_sgmii_port(dev)) {</div><div class='add'>+		int port = ksz_get_sgmii_port(dev);</div><div class='add'>+		struct ksz_port *p = &amp;dev-&gt;ports[port];</div><div class='add'>+		struct phylink_pcs *pcs;</div><div class='add'>+		struct mii_bus *bus;</div><div class='add'>+		int ret;</div><div class='add'>+</div><div class='add'>+		bus = devm_mdiobus_alloc(dev-&gt;dev);</div><div class='add'>+		if (!bus)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		bus-&gt;name = "ksz_pcs_mdio_bus";</div><div class='add'>+		snprintf(bus-&gt;id, MII_BUS_ID_SIZE, "%s-pcs",</div><div class='add'>+			 dev_name(dev-&gt;dev));</div><div class='add'>+		bus-&gt;read_c45 = &amp;ksz9477_pcs_read;</div><div class='add'>+		bus-&gt;write_c45 = &amp;ksz9477_pcs_write;</div><div class='add'>+		bus-&gt;parent = dev-&gt;dev;</div><div class='add'>+		bus-&gt;phy_mask = ~0;</div><div class='add'>+		bus-&gt;priv = dev;</div><div class='add'>+</div><div class='add'>+		ret = devm_mdiobus_register(dev-&gt;dev, bus);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		pcs = xpcs_create_pcs_mdiodev(bus, 0);</div><div class='add'>+		if (IS_ERR(pcs))</div><div class='add'>+			return PTR_ERR(pcs);</div><div class='add'>+		p-&gt;pcs = pcs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz9477_reset_switch(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	u8 data8;</div><div class='add'>+	u32 data32;</div><div class='add'>+</div><div class='add'>+	/* reset switch */</div><div class='add'>+	ksz_cfg(dev, REG_SW_OPERATION, SW_RESET, true);</div><div class='add'>+</div><div class='add'>+	/* turn off SPI DO Edge select */</div><div class='add'>+	regmap_update_bits(ksz_regmap_8(dev), REG_SW_GLOBAL_SERIAL_CTRL_0,</div><div class='add'>+			   SPI_AUTO_EDGE_DETECTION, 0);</div><div class='add'>+</div><div class='add'>+	/* default configuration */</div><div class='add'>+	ksz_write8(dev, REG_SW_LUE_CTRL_1,</div><div class='add'>+		   SW_AGING_ENABLE | SW_LINK_AUTO_AGING | SW_SRC_ADDR_FILTER);</div><div class='add'>+</div><div class='add'>+	/* disable interrupts */</div><div class='add'>+	ksz_write32(dev, REG_SW_INT_MASK__4, SWITCH_INT_MASK);</div><div class='add'>+	ksz_write32(dev, REG_SW_PORT_INT_MASK__4, 0x7F);</div><div class='add'>+	ksz_read32(dev, REG_SW_PORT_INT_STATUS__4, &amp;data32);</div><div class='add'>+</div><div class='add'>+	/* KSZ9893 compatible chips do not support refclk configuration */</div><div class='add'>+	if (dev-&gt;chip_id == KSZ9893_CHIP_ID ||</div><div class='add'>+	    dev-&gt;chip_id == KSZ8563_CHIP_ID ||</div><div class='add'>+	    dev-&gt;chip_id == KSZ9563_CHIP_ID)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	data8 = SW_ENABLE_REFCLKO;</div><div class='add'>+	if (dev-&gt;synclko_disable)</div><div class='add'>+		data8 = 0;</div><div class='add'>+	else if (dev-&gt;synclko_125)</div><div class='add'>+		data8 = SW_ENABLE_REFCLKO | SW_REFCLKO_IS_125MHZ;</div><div class='add'>+	ksz_write8(dev, REG_SW_GLOBAL_OUTPUT_CTRL__1, data8);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ksz9477_r_mib_cnt(struct ksz_device *dev, int port, u16 addr, u64 *cnt)</div><div class='add'>+{</div><div class='add'>+	struct ksz_port *p = &amp;dev-&gt;ports[port];</div><div class='add'>+	unsigned int val;</div><div class='add'>+	u32 data;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* retain the flush/freeze bit */</div><div class='add'>+	data = p-&gt;freeze ? MIB_COUNTER_FLUSH_FREEZE : 0;</div><div class='add'>+	data |= MIB_COUNTER_READ;</div><div class='add'>+	data |= (addr &lt;&lt; MIB_COUNTER_INDEX_S);</div><div class='add'>+	ksz_pwrite32(dev, port, REG_PORT_MIB_CTRL_STAT__4, data);</div><div class='add'>+</div><div class='add'>+	ret = regmap_read_poll_timeout(ksz_regmap_32(dev),</div><div class='add'>+			PORT_CTRL_ADDR(port, REG_PORT_MIB_CTRL_STAT__4),</div><div class='add'>+			val, !(val &amp; MIB_COUNTER_READ), 10, 1000);</div><div class='add'>+	/* failed to read MIB. get out of loop */</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_dbg(dev-&gt;dev, "Failed to get MIB\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* count resets upon read */</div><div class='add'>+	ksz_pread32(dev, port, REG_PORT_MIB_DATA, &amp;data);</div><div class='add'>+	*cnt += data;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ksz9477_r_mib_pkt(struct ksz_device *dev, int port, u16 addr,</div><div class='add'>+		       u64 *dropped, u64 *cnt)</div><div class='add'>+{</div><div class='add'>+	addr = dev-&gt;info-&gt;mib_names[addr].index;</div><div class='add'>+	ksz9477_r_mib_cnt(dev, port, addr, cnt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ksz9477_freeze_mib(struct ksz_device *dev, int port, bool freeze)</div><div class='add'>+{</div><div class='add'>+	u32 val = freeze ? MIB_COUNTER_FLUSH_FREEZE : 0;</div><div class='add'>+	struct ksz_port *p = &amp;dev-&gt;ports[port];</div><div class='add'>+</div><div class='add'>+	/* enable/disable the port for flush/freeze function */</div><div class='add'>+	mutex_lock(&amp;p-&gt;mib.cnt_mutex);</div><div class='add'>+	ksz_pwrite32(dev, port, REG_PORT_MIB_CTRL_STAT__4, val);</div><div class='add'>+</div><div class='add'>+	/* used by MIB counter reading code to know freeze is enabled */</div><div class='add'>+	p-&gt;freeze = freeze;</div><div class='add'>+	mutex_unlock(&amp;p-&gt;mib.cnt_mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz9477_half_duplex_monitor(struct ksz_device *dev, int port,</div><div class='add'>+				       u64 tx_late_col)</div><div class='add'>+{</div><div class='add'>+	u8 lue_ctrl;</div><div class='add'>+	u32 pmavbc;</div><div class='add'>+	u16 pqm;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Errata DS80000754 recommends monitoring potential faults in</div><div class='add'>+	 * half-duplex mode. The switch might not be able to communicate anymore</div><div class='add'>+	 * in these states. If you see this message, please read the</div><div class='add'>+	 * errata-sheet for more information:</div><div class='add'>+	 * https://ww1.microchip.com/downloads/aemDocuments/documents/UNG/ProductDocuments/Errata/KSZ9477S-Errata-DS80000754.pdf</div><div class='add'>+	 * To workaround this issue, half-duplex mode should be avoided.</div><div class='add'>+	 * A software reset could be implemented to recover from this state.</div><div class='add'>+	 */</div><div class='add'>+	dev_warn_once(dev-&gt;dev,</div><div class='add'>+		      "Half-duplex detected on port %d, transmission halt may occur\n",</div><div class='add'>+		      port);</div><div class='add'>+	if (tx_late_col != 0) {</div><div class='add'>+		/* Transmission halt with late collisions */</div><div class='add'>+		dev_crit_once(dev-&gt;dev,</div><div class='add'>+			      "TX late collisions detected, transmission may be halted on port %d\n",</div><div class='add'>+			      port);</div><div class='add'>+	}</div><div class='add'>+	ret = ksz_read8(dev, REG_SW_LUE_CTRL_0, &amp;lue_ctrl);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+	if (lue_ctrl &amp; SW_VLAN_ENABLE) {</div><div class='add'>+		ret = ksz_pread16(dev, port, REG_PORT_QM_TX_CNT_0__4, &amp;pqm);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		ret = ksz_read32(dev, REG_PMAVBC, &amp;pmavbc);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		if ((FIELD_GET(PMAVBC_MASK, pmavbc) &lt;= PMAVBC_MIN) ||</div><div class='add'>+		    (FIELD_GET(PORT_QM_TX_CNT_M, pqm) &gt;= PORT_QM_TX_CNT_MAX)) {</div><div class='add'>+			/* Transmission halt with Half-Duplex and VLAN */</div><div class='add'>+			dev_crit_once(dev-&gt;dev,</div><div class='add'>+				      "resources out of limits, transmission may be halted\n");</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz9477_errata_monitor(struct ksz_device *dev, int port,</div><div class='add'>+			   u64 tx_late_col)</div><div class='add'>+{</div><div class='add'>+	u8 status;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = ksz_pread8(dev, port, REG_PORT_STATUS_0, &amp;status);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (!(FIELD_GET(PORT_INTF_SPEED_MASK, status)</div><div class='add'>+	      == PORT_INTF_SPEED_NONE) &amp;&amp;</div><div class='add'>+	    !(status &amp; PORT_INTF_FULL_DUPLEX)) {</div><div class='add'>+		ret = ksz9477_half_duplex_monitor(dev, port, tx_late_col);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ksz9477_port_init_cnt(struct ksz_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	struct ksz_port_mib *mib = &amp;dev-&gt;ports[port].mib;</div><div class='add'>+</div><div class='add'>+	/* flush all enabled port MIB counters */</div><div class='add'>+	mutex_lock(&amp;mib-&gt;cnt_mutex);</div><div class='add'>+	ksz_pwrite32(dev, port, REG_PORT_MIB_CTRL_STAT__4,</div><div class='add'>+		     MIB_COUNTER_FLUSH_FREEZE);</div><div class='add'>+	ksz_write8(dev, REG_SW_MAC_CTRL_6, SW_MIB_COUNTER_FLUSH);</div><div class='add'>+	ksz_pwrite32(dev, port, REG_PORT_MIB_CTRL_STAT__4, 0);</div><div class='add'>+	mutex_unlock(&amp;mib-&gt;cnt_mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz9477_r_phy_quirks(struct ksz_device *dev, u16 addr, u16 reg,</div><div class='add'>+				 u16 *data)</div><div class='add'>+{</div><div class='add'>+	/* KSZ8563R do not have extended registers but BMSR_ESTATEN and</div><div class='add'>+	 * BMSR_ERCAP bits are set.</div><div class='add'>+	 */</div><div class='add'>+	if (dev-&gt;chip_id == KSZ8563_CHIP_ID &amp;&amp; reg == MII_BMSR)</div><div class='add'>+		*data &amp;= ~(BMSR_ESTATEN | BMSR_ERCAP);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz9477_r_phy(struct ksz_device *dev, u16 addr, u16 reg, u16 *data)</div><div class='add'>+{</div><div class='add'>+	u16 val = 0xffff;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* No real PHY after this. Simulate the PHY.</div><div class='add'>+	 * A fixed PHY can be setup in the device tree, but this function is</div><div class='add'>+	 * still called for that port during initialization.</div><div class='add'>+	 * For RGMII PHY there is no way to access it so the fixed PHY should</div><div class='add'>+	 * be used.  For SGMII PHY the supporting code will be added later.</div><div class='add'>+	 */</div><div class='add'>+	if (!dev-&gt;info-&gt;internal_phy[addr]) {</div><div class='add'>+		struct ksz_port *p = &amp;dev-&gt;ports[addr];</div><div class='add'>+</div><div class='add'>+		switch (reg) {</div><div class='add'>+		case MII_BMCR:</div><div class='add'>+			val = 0x1140;</div><div class='add'>+			break;</div><div class='add'>+		case MII_BMSR:</div><div class='add'>+			val = 0x796d;</div><div class='add'>+			break;</div><div class='add'>+		case MII_PHYSID1:</div><div class='add'>+			val = 0x0022;</div><div class='add'>+			break;</div><div class='add'>+		case MII_PHYSID2:</div><div class='add'>+			val = 0x1631;</div><div class='add'>+			break;</div><div class='add'>+		case MII_ADVERTISE:</div><div class='add'>+			val = 0x05e1;</div><div class='add'>+			break;</div><div class='add'>+		case MII_LPA:</div><div class='add'>+			val = 0xc5e1;</div><div class='add'>+			break;</div><div class='add'>+		case MII_CTRL1000:</div><div class='add'>+			val = 0x0700;</div><div class='add'>+			break;</div><div class='add'>+		case MII_STAT1000:</div><div class='add'>+			if (p-&gt;phydev.speed == SPEED_1000)</div><div class='add'>+				val = 0x3800;</div><div class='add'>+			else</div><div class='add'>+				val = 0;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		ret = ksz_pread16(dev, addr, 0x100 + (reg &lt;&lt; 1), &amp;val);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		ksz9477_r_phy_quirks(dev, addr, reg, &amp;val);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*data = val;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz9477_w_phy(struct ksz_device *dev, u16 addr, u16 reg, u16 val)</div><div class='add'>+{</div><div class='add'>+	u32 mask, val32;</div><div class='add'>+</div><div class='add'>+	/* No real PHY after this. */</div><div class='add'>+	if (!dev-&gt;info-&gt;internal_phy[addr])</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (reg &lt; 0x10)</div><div class='add'>+		return ksz_pwrite16(dev, addr, 0x100 + (reg &lt;&lt; 1), val);</div><div class='add'>+</div><div class='add'>+	/* Errata: When using SPI, I2C, or in-band register access,</div><div class='add'>+	 * writes to certain PHY registers should be performed as</div><div class='add'>+	 * 32-bit writes instead of 16-bit writes.</div><div class='add'>+	 */</div><div class='add'>+	val32 = val;</div><div class='add'>+	mask = 0xffff;</div><div class='add'>+	if ((reg &amp; 1) == 0) {</div><div class='add'>+		val32 &lt;&lt;= 16;</div><div class='add'>+		mask &lt;&lt;= 16;</div><div class='add'>+	}</div><div class='add'>+	reg &amp;= ~1;</div><div class='add'>+	return ksz_prmw32(dev, addr, 0x100 + (reg &lt;&lt; 1), mask, val32);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ksz9477_cfg_port_member(struct ksz_device *dev, int port, u8 member)</div><div class='add'>+{</div><div class='add'>+	ksz_pwrite32(dev, port, REG_PORT_VLAN_MEMBERSHIP__4, member);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ksz9477_flush_dyn_mac_table(struct ksz_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	const u16 *regs = dev-&gt;info-&gt;regs;</div><div class='add'>+	u8 data;</div><div class='add'>+</div><div class='add'>+	regmap_update_bits(ksz_regmap_8(dev), REG_SW_LUE_CTRL_2,</div><div class='add'>+			   SW_FLUSH_OPTION_M &lt;&lt; SW_FLUSH_OPTION_S,</div><div class='add'>+			   SW_FLUSH_OPTION_DYN_MAC &lt;&lt; SW_FLUSH_OPTION_S);</div><div class='add'>+</div><div class='add'>+	if (port &lt; dev-&gt;info-&gt;port_cnt) {</div><div class='add'>+		/* flush individual port */</div><div class='add'>+		ksz_pread8(dev, port, regs[P_STP_CTRL], &amp;data);</div><div class='add'>+		if (!(data &amp; PORT_LEARN_DISABLE))</div><div class='add'>+			ksz_pwrite8(dev, port, regs[P_STP_CTRL],</div><div class='add'>+				    data | PORT_LEARN_DISABLE);</div><div class='add'>+		ksz_cfg(dev, S_FLUSH_TABLE_CTRL, SW_FLUSH_DYN_MAC_TABLE, true);</div><div class='add'>+		ksz_pwrite8(dev, port, regs[P_STP_CTRL], data);</div><div class='add'>+	} else {</div><div class='add'>+		/* flush all */</div><div class='add'>+		ksz_cfg(dev, S_FLUSH_TABLE_CTRL, SW_FLUSH_STP_TABLE, true);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz9477_port_vlan_filtering(struct ksz_device *dev, int port,</div><div class='add'>+				bool flag, struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	if (flag) {</div><div class='add'>+		ksz_port_cfg(dev, port, REG_PORT_LUE_CTRL,</div><div class='add'>+			     PORT_VLAN_LOOKUP_VID_0, true);</div><div class='add'>+		ksz_cfg(dev, REG_SW_LUE_CTRL_0, SW_VLAN_ENABLE, true);</div><div class='add'>+	} else {</div><div class='add'>+		ksz_cfg(dev, REG_SW_LUE_CTRL_0, SW_VLAN_ENABLE, false);</div><div class='add'>+		ksz_port_cfg(dev, port, REG_PORT_LUE_CTRL,</div><div class='add'>+			     PORT_VLAN_LOOKUP_VID_0, false);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz9477_port_vlan_add(struct ksz_device *dev, int port,</div><div class='add'>+			  const struct switchdev_obj_port_vlan *vlan,</div><div class='add'>+			  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	u32 vlan_table[3];</div><div class='add'>+	bool untagged = vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_UNTAGGED;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ksz9477_get_vlan_table(dev, vlan-&gt;vid, vlan_table);</div><div class='add'>+	if (err) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Failed to get vlan table");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vlan_table[0] = VLAN_VALID | (vlan-&gt;vid &amp; VLAN_FID_M);</div><div class='add'>+	if (untagged)</div><div class='add'>+		vlan_table[1] |= BIT(port);</div><div class='add'>+	else</div><div class='add'>+		vlan_table[1] &amp;= ~BIT(port);</div><div class='add'>+	vlan_table[1] &amp;= ~(BIT(dev-&gt;cpu_port));</div><div class='add'>+</div><div class='add'>+	vlan_table[2] |= BIT(port) | BIT(dev-&gt;cpu_port);</div><div class='add'>+</div><div class='add'>+	err = ksz9477_set_vlan_table(dev, vlan-&gt;vid, vlan_table);</div><div class='add'>+	if (err) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Failed to set vlan table");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* change PVID */</div><div class='add'>+	if (vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_PVID)</div><div class='add'>+		ksz_pwrite16(dev, port, REG_PORT_DEFAULT_VID, vlan-&gt;vid);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz9477_port_vlan_del(struct ksz_device *dev, int port,</div><div class='add'>+			  const struct switchdev_obj_port_vlan *vlan)</div><div class='add'>+{</div><div class='add'>+	bool untagged = vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_UNTAGGED;</div><div class='add'>+	u32 vlan_table[3];</div><div class='add'>+	u16 pvid;</div><div class='add'>+</div><div class='add'>+	ksz_pread16(dev, port, REG_PORT_DEFAULT_VID, &amp;pvid);</div><div class='add'>+	pvid = pvid &amp; 0xFFF;</div><div class='add'>+</div><div class='add'>+	if (ksz9477_get_vlan_table(dev, vlan-&gt;vid, vlan_table)) {</div><div class='add'>+		dev_dbg(dev-&gt;dev, "Failed to get vlan table\n");</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vlan_table[2] &amp;= ~BIT(port);</div><div class='add'>+</div><div class='add'>+	if (pvid == vlan-&gt;vid)</div><div class='add'>+		pvid = 1;</div><div class='add'>+</div><div class='add'>+	if (untagged)</div><div class='add'>+		vlan_table[1] &amp;= ~BIT(port);</div><div class='add'>+</div><div class='add'>+	if (ksz9477_set_vlan_table(dev, vlan-&gt;vid, vlan_table)) {</div><div class='add'>+		dev_dbg(dev-&gt;dev, "Failed to set vlan table\n");</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ksz_pwrite16(dev, port, REG_PORT_DEFAULT_VID, pvid);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz9477_fdb_add(struct ksz_device *dev, int port,</div><div class='add'>+		    const unsigned char *addr, u16 vid, struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	u32 alu_table[4];</div><div class='add'>+	u32 data;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;alu_mutex);</div><div class='add'>+</div><div class='add'>+	/* find any entry with mac &amp; vid */</div><div class='add'>+	data = vid &lt;&lt; ALU_FID_INDEX_S;</div><div class='add'>+	data |= ((addr[0] &lt;&lt; 8) | addr[1]);</div><div class='add'>+	ksz_write32(dev, REG_SW_ALU_INDEX_0, data);</div><div class='add'>+</div><div class='add'>+	data = ((addr[2] &lt;&lt; 24) | (addr[3] &lt;&lt; 16));</div><div class='add'>+	data |= ((addr[4] &lt;&lt; 8) | addr[5]);</div><div class='add'>+	ksz_write32(dev, REG_SW_ALU_INDEX_1, data);</div><div class='add'>+</div><div class='add'>+	/* start read operation */</div><div class='add'>+	ksz_write32(dev, REG_SW_ALU_CTRL__4, ALU_READ | ALU_START);</div><div class='add'>+</div><div class='add'>+	/* wait to be finished */</div><div class='add'>+	ret = ksz9477_wait_alu_ready(dev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_dbg(dev-&gt;dev, "Failed to read ALU\n");</div><div class='add'>+		goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* read ALU entry */</div><div class='add'>+	ksz9477_read_table(dev, alu_table);</div><div class='add'>+</div><div class='add'>+	/* update ALU entry */</div><div class='add'>+	alu_table[0] = ALU_V_STATIC_VALID;</div><div class='add'>+	alu_table[1] |= BIT(port);</div><div class='add'>+	if (vid)</div><div class='add'>+		alu_table[1] |= ALU_V_USE_FID;</div><div class='add'>+	alu_table[2] = (vid &lt;&lt; ALU_V_FID_S);</div><div class='add'>+	alu_table[2] |= ((addr[0] &lt;&lt; 8) | addr[1]);</div><div class='add'>+	alu_table[3] = ((addr[2] &lt;&lt; 24) | (addr[3] &lt;&lt; 16));</div><div class='add'>+	alu_table[3] |= ((addr[4] &lt;&lt; 8) | addr[5]);</div><div class='add'>+</div><div class='add'>+	ksz9477_write_table(dev, alu_table);</div><div class='add'>+</div><div class='add'>+	ksz_write32(dev, REG_SW_ALU_CTRL__4, ALU_WRITE | ALU_START);</div><div class='add'>+</div><div class='add'>+	/* wait to be finished */</div><div class='add'>+	ret = ksz9477_wait_alu_ready(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_dbg(dev-&gt;dev, "Failed to write ALU\n");</div><div class='add'>+</div><div class='add'>+exit:</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;alu_mutex);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz9477_fdb_del(struct ksz_device *dev, int port,</div><div class='add'>+		    const unsigned char *addr, u16 vid, struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	u32 alu_table[4];</div><div class='add'>+	u32 data;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;alu_mutex);</div><div class='add'>+</div><div class='add'>+	/* read any entry with mac &amp; vid */</div><div class='add'>+	data = vid &lt;&lt; ALU_FID_INDEX_S;</div><div class='add'>+	data |= ((addr[0] &lt;&lt; 8) | addr[1]);</div><div class='add'>+	ksz_write32(dev, REG_SW_ALU_INDEX_0, data);</div><div class='add'>+</div><div class='add'>+	data = ((addr[2] &lt;&lt; 24) | (addr[3] &lt;&lt; 16));</div><div class='add'>+	data |= ((addr[4] &lt;&lt; 8) | addr[5]);</div><div class='add'>+	ksz_write32(dev, REG_SW_ALU_INDEX_1, data);</div><div class='add'>+</div><div class='add'>+	/* start read operation */</div><div class='add'>+	ksz_write32(dev, REG_SW_ALU_CTRL__4, ALU_READ | ALU_START);</div><div class='add'>+</div><div class='add'>+	/* wait to be finished */</div><div class='add'>+	ret = ksz9477_wait_alu_ready(dev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_dbg(dev-&gt;dev, "Failed to read ALU\n");</div><div class='add'>+		goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ksz_read32(dev, REG_SW_ALU_VAL_A, &amp;alu_table[0]);</div><div class='add'>+	if (alu_table[0] &amp; ALU_V_STATIC_VALID) {</div><div class='add'>+		ksz_read32(dev, REG_SW_ALU_VAL_B, &amp;alu_table[1]);</div><div class='add'>+		ksz_read32(dev, REG_SW_ALU_VAL_C, &amp;alu_table[2]);</div><div class='add'>+		ksz_read32(dev, REG_SW_ALU_VAL_D, &amp;alu_table[3]);</div><div class='add'>+</div><div class='add'>+		/* clear forwarding port */</div><div class='add'>+		alu_table[1] &amp;= ~BIT(port);</div><div class='add'>+</div><div class='add'>+		/* if there is no port to forward, clear table */</div><div class='add'>+		if ((alu_table[1] &amp; ALU_V_PORT_MAP) == 0) {</div><div class='add'>+			alu_table[0] = 0;</div><div class='add'>+			alu_table[1] = 0;</div><div class='add'>+			alu_table[2] = 0;</div><div class='add'>+			alu_table[3] = 0;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		alu_table[0] = 0;</div><div class='add'>+		alu_table[1] = 0;</div><div class='add'>+		alu_table[2] = 0;</div><div class='add'>+		alu_table[3] = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ksz9477_write_table(dev, alu_table);</div><div class='add'>+</div><div class='add'>+	ksz_write32(dev, REG_SW_ALU_CTRL__4, ALU_WRITE | ALU_START);</div><div class='add'>+</div><div class='add'>+	/* wait to be finished */</div><div class='add'>+	ret = ksz9477_wait_alu_ready(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_dbg(dev-&gt;dev, "Failed to write ALU\n");</div><div class='add'>+</div><div class='add'>+exit:</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;alu_mutex);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz9477_convert_alu(struct alu_struct *alu, u32 *alu_table)</div><div class='add'>+{</div><div class='add'>+	alu-&gt;is_static = !!(alu_table[0] &amp; ALU_V_STATIC_VALID);</div><div class='add'>+	alu-&gt;is_src_filter = !!(alu_table[0] &amp; ALU_V_SRC_FILTER);</div><div class='add'>+	alu-&gt;is_dst_filter = !!(alu_table[0] &amp; ALU_V_DST_FILTER);</div><div class='add'>+	alu-&gt;prio_age = (alu_table[0] &gt;&gt; ALU_V_PRIO_AGE_CNT_S) &amp;</div><div class='add'>+			ALU_V_PRIO_AGE_CNT_M;</div><div class='add'>+	alu-&gt;mstp = alu_table[0] &amp; ALU_V_MSTP_M;</div><div class='add'>+</div><div class='add'>+	alu-&gt;is_override = !!(alu_table[1] &amp; ALU_V_OVERRIDE);</div><div class='add'>+	alu-&gt;is_use_fid = !!(alu_table[1] &amp; ALU_V_USE_FID);</div><div class='add'>+	alu-&gt;port_forward = alu_table[1] &amp; ALU_V_PORT_MAP;</div><div class='add'>+</div><div class='add'>+	alu-&gt;fid = (alu_table[2] &gt;&gt; ALU_V_FID_S) &amp; ALU_V_FID_M;</div><div class='add'>+</div><div class='add'>+	alu-&gt;mac[0] = (alu_table[2] &gt;&gt; 8) &amp; 0xFF;</div><div class='add'>+	alu-&gt;mac[1] = alu_table[2] &amp; 0xFF;</div><div class='add'>+	alu-&gt;mac[2] = (alu_table[3] &gt;&gt; 24) &amp; 0xFF;</div><div class='add'>+	alu-&gt;mac[3] = (alu_table[3] &gt;&gt; 16) &amp; 0xFF;</div><div class='add'>+	alu-&gt;mac[4] = (alu_table[3] &gt;&gt; 8) &amp; 0xFF;</div><div class='add'>+	alu-&gt;mac[5] = alu_table[3] &amp; 0xFF;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz9477_fdb_dump(struct ksz_device *dev, int port,</div><div class='add'>+		     dsa_fdb_dump_cb_t *cb, void *data)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+	u32 ksz_data;</div><div class='add'>+	u32 alu_table[4];</div><div class='add'>+	struct alu_struct alu;</div><div class='add'>+	int timeout;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;alu_mutex);</div><div class='add'>+</div><div class='add'>+	/* start ALU search */</div><div class='add'>+	ksz_write32(dev, REG_SW_ALU_CTRL__4, ALU_START | ALU_SEARCH);</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		timeout = 1000;</div><div class='add'>+		do {</div><div class='add'>+			ksz_read32(dev, REG_SW_ALU_CTRL__4, &amp;ksz_data);</div><div class='add'>+			if ((ksz_data &amp; ALU_VALID) || !(ksz_data &amp; ALU_START))</div><div class='add'>+				break;</div><div class='add'>+			usleep_range(1, 10);</div><div class='add'>+		} while (timeout-- &gt; 0);</div><div class='add'>+</div><div class='add'>+		if (!timeout) {</div><div class='add'>+			dev_dbg(dev-&gt;dev, "Failed to search ALU\n");</div><div class='add'>+			ret = -ETIMEDOUT;</div><div class='add'>+			goto exit;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!(ksz_data &amp; ALU_VALID))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* read ALU table */</div><div class='add'>+		ksz9477_read_table(dev, alu_table);</div><div class='add'>+</div><div class='add'>+		ksz9477_convert_alu(&amp;alu, alu_table);</div><div class='add'>+</div><div class='add'>+		if (alu.port_forward &amp; BIT(port)) {</div><div class='add'>+			ret = cb(alu.mac, alu.fid, alu.is_static, data);</div><div class='add'>+			if (ret)</div><div class='add'>+				goto exit;</div><div class='add'>+		}</div><div class='add'>+	} while (ksz_data &amp; ALU_START);</div><div class='add'>+</div><div class='add'>+exit:</div><div class='add'>+</div><div class='add'>+	/* stop ALU search */</div><div class='add'>+	ksz_write32(dev, REG_SW_ALU_CTRL__4, 0);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;alu_mutex);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz9477_mdb_add(struct ksz_device *dev, int port,</div><div class='add'>+		    const struct switchdev_obj_port_mdb *mdb, struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	u32 static_table[4];</div><div class='add'>+	const u8 *shifts;</div><div class='add'>+	const u32 *masks;</div><div class='add'>+	u32 data;</div><div class='add'>+	int index;</div><div class='add'>+	u32 mac_hi, mac_lo;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	shifts = dev-&gt;info-&gt;shifts;</div><div class='add'>+	masks = dev-&gt;info-&gt;masks;</div><div class='add'>+</div><div class='add'>+	mac_hi = ((mdb-&gt;addr[0] &lt;&lt; 8) | mdb-&gt;addr[1]);</div><div class='add'>+	mac_lo = ((mdb-&gt;addr[2] &lt;&lt; 24) | (mdb-&gt;addr[3] &lt;&lt; 16));</div><div class='add'>+	mac_lo |= ((mdb-&gt;addr[4] &lt;&lt; 8) | mdb-&gt;addr[5]);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;alu_mutex);</div><div class='add'>+</div><div class='add'>+	for (index = 0; index &lt; dev-&gt;info-&gt;num_statics; index++) {</div><div class='add'>+		/* find empty slot first */</div><div class='add'>+		data = (index &lt;&lt; shifts[ALU_STAT_INDEX]) |</div><div class='add'>+			masks[ALU_STAT_READ] | ALU_STAT_START;</div><div class='add'>+		ksz_write32(dev, REG_SW_ALU_STAT_CTRL__4, data);</div><div class='add'>+</div><div class='add'>+		/* wait to be finished */</div><div class='add'>+		err = ksz9477_wait_alu_sta_ready(dev);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_dbg(dev-&gt;dev, "Failed to read ALU STATIC\n");</div><div class='add'>+			goto exit;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* read ALU static table */</div><div class='add'>+		ksz9477_read_table(dev, static_table);</div><div class='add'>+</div><div class='add'>+		if (static_table[0] &amp; ALU_V_STATIC_VALID) {</div><div class='add'>+			/* check this has same vid &amp; mac address */</div><div class='add'>+			if (((static_table[2] &gt;&gt; ALU_V_FID_S) == mdb-&gt;vid) &amp;&amp;</div><div class='add'>+			    ((static_table[2] &amp; ALU_V_MAC_ADDR_HI) == mac_hi) &amp;&amp;</div><div class='add'>+			    static_table[3] == mac_lo) {</div><div class='add'>+				/* found matching one */</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			/* found empty one */</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* no available entry */</div><div class='add'>+	if (index == dev-&gt;info-&gt;num_statics) {</div><div class='add'>+		err = -ENOSPC;</div><div class='add'>+		goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* add entry */</div><div class='add'>+	static_table[0] = ALU_V_STATIC_VALID;</div><div class='add'>+	static_table[1] |= BIT(port);</div><div class='add'>+	if (mdb-&gt;vid)</div><div class='add'>+		static_table[1] |= ALU_V_USE_FID;</div><div class='add'>+	static_table[2] = (mdb-&gt;vid &lt;&lt; ALU_V_FID_S);</div><div class='add'>+	static_table[2] |= mac_hi;</div><div class='add'>+	static_table[3] = mac_lo;</div><div class='add'>+</div><div class='add'>+	ksz9477_write_table(dev, static_table);</div><div class='add'>+</div><div class='add'>+	data = (index &lt;&lt; shifts[ALU_STAT_INDEX]) | ALU_STAT_START;</div><div class='add'>+	ksz_write32(dev, REG_SW_ALU_STAT_CTRL__4, data);</div><div class='add'>+</div><div class='add'>+	/* wait to be finished */</div><div class='add'>+	if (ksz9477_wait_alu_sta_ready(dev))</div><div class='add'>+		dev_dbg(dev-&gt;dev, "Failed to read ALU STATIC\n");</div><div class='add'>+</div><div class='add'>+exit:</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;alu_mutex);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz9477_mdb_del(struct ksz_device *dev, int port,</div><div class='add'>+		    const struct switchdev_obj_port_mdb *mdb, struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	u32 static_table[4];</div><div class='add'>+	const u8 *shifts;</div><div class='add'>+	const u32 *masks;</div><div class='add'>+	u32 data;</div><div class='add'>+	int index;</div><div class='add'>+	int ret = 0;</div><div class='add'>+	u32 mac_hi, mac_lo;</div><div class='add'>+</div><div class='add'>+	shifts = dev-&gt;info-&gt;shifts;</div><div class='add'>+	masks = dev-&gt;info-&gt;masks;</div><div class='add'>+</div><div class='add'>+	mac_hi = ((mdb-&gt;addr[0] &lt;&lt; 8) | mdb-&gt;addr[1]);</div><div class='add'>+	mac_lo = ((mdb-&gt;addr[2] &lt;&lt; 24) | (mdb-&gt;addr[3] &lt;&lt; 16));</div><div class='add'>+	mac_lo |= ((mdb-&gt;addr[4] &lt;&lt; 8) | mdb-&gt;addr[5]);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;dev-&gt;alu_mutex);</div><div class='add'>+</div><div class='add'>+	for (index = 0; index &lt; dev-&gt;info-&gt;num_statics; index++) {</div><div class='add'>+		/* find empty slot first */</div><div class='add'>+		data = (index &lt;&lt; shifts[ALU_STAT_INDEX]) |</div><div class='add'>+			masks[ALU_STAT_READ] | ALU_STAT_START;</div><div class='add'>+		ksz_write32(dev, REG_SW_ALU_STAT_CTRL__4, data);</div><div class='add'>+</div><div class='add'>+		/* wait to be finished */</div><div class='add'>+		ret = ksz9477_wait_alu_sta_ready(dev);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_dbg(dev-&gt;dev, "Failed to read ALU STATIC\n");</div><div class='add'>+			goto exit;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* read ALU static table */</div><div class='add'>+		ksz9477_read_table(dev, static_table);</div><div class='add'>+</div><div class='add'>+		if (static_table[0] &amp; ALU_V_STATIC_VALID) {</div><div class='add'>+			/* check this has same vid &amp; mac address */</div><div class='add'>+</div><div class='add'>+			if (((static_table[2] &gt;&gt; ALU_V_FID_S) == mdb-&gt;vid) &amp;&amp;</div><div class='add'>+			    ((static_table[2] &amp; ALU_V_MAC_ADDR_HI) == mac_hi) &amp;&amp;</div><div class='add'>+			    static_table[3] == mac_lo) {</div><div class='add'>+				/* found matching one */</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* no available entry */</div><div class='add'>+	if (index == dev-&gt;info-&gt;num_statics)</div><div class='add'>+		goto exit;</div><div class='add'>+</div><div class='add'>+	/* clear port */</div><div class='add'>+	static_table[1] &amp;= ~BIT(port);</div><div class='add'>+</div><div class='add'>+	if ((static_table[1] &amp; ALU_V_PORT_MAP) == 0) {</div><div class='add'>+		/* delete entry */</div><div class='add'>+		static_table[0] = 0;</div><div class='add'>+		static_table[1] = 0;</div><div class='add'>+		static_table[2] = 0;</div><div class='add'>+		static_table[3] = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ksz9477_write_table(dev, static_table);</div><div class='add'>+</div><div class='add'>+	data = (index &lt;&lt; shifts[ALU_STAT_INDEX]) | ALU_STAT_START;</div><div class='add'>+	ksz_write32(dev, REG_SW_ALU_STAT_CTRL__4, data);</div><div class='add'>+</div><div class='add'>+	/* wait to be finished */</div><div class='add'>+	ret = ksz9477_wait_alu_sta_ready(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_dbg(dev-&gt;dev, "Failed to read ALU STATIC\n");</div><div class='add'>+</div><div class='add'>+exit:</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;alu_mutex);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz9477_port_mirror_add(struct ksz_device *dev, int port,</div><div class='add'>+			    struct dsa_mall_mirror_tc_entry *mirror,</div><div class='add'>+			    bool ingress, struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	u8 data;</div><div class='add'>+	int p;</div><div class='add'>+</div><div class='add'>+	/* Limit to one sniffer port</div><div class='add'>+	 * Check if any of the port is already set for sniffing</div><div class='add'>+	 * If yes, instruct the user to remove the previous entry &amp; exit</div><div class='add'>+	 */</div><div class='add'>+	for (p = 0; p &lt; dev-&gt;info-&gt;port_cnt; p++) {</div><div class='add'>+		/* Skip the current sniffing port */</div><div class='add'>+		if (p == mirror-&gt;to_local_port)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		ksz_pread8(dev, p, P_MIRROR_CTRL, &amp;data);</div><div class='add'>+</div><div class='add'>+		if (data &amp; PORT_MIRROR_SNIFFER) {</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+					   "Sniffer port is already configured, delete existing rules &amp; retry");</div><div class='add'>+			return -EBUSY;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ingress)</div><div class='add'>+		ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_RX, true);</div><div class='add'>+	else</div><div class='add'>+		ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_TX, true);</div><div class='add'>+</div><div class='add'>+	/* configure mirror port */</div><div class='add'>+	ksz_port_cfg(dev, mirror-&gt;to_local_port, P_MIRROR_CTRL,</div><div class='add'>+		     PORT_MIRROR_SNIFFER, true);</div><div class='add'>+</div><div class='add'>+	ksz_cfg(dev, S_MIRROR_CTRL, SW_MIRROR_RX_TX, false);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ksz9477_port_mirror_del(struct ksz_device *dev, int port,</div><div class='add'>+			     struct dsa_mall_mirror_tc_entry *mirror)</div><div class='add'>+{</div><div class='add'>+	bool in_use = false;</div><div class='add'>+	u8 data;</div><div class='add'>+	int p;</div><div class='add'>+</div><div class='add'>+	if (mirror-&gt;ingress)</div><div class='add'>+		ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_RX, false);</div><div class='add'>+	else</div><div class='add'>+		ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_TX, false);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	/* Check if any of the port is still referring to sniffer port */</div><div class='add'>+	for (p = 0; p &lt; dev-&gt;info-&gt;port_cnt; p++) {</div><div class='add'>+		ksz_pread8(dev, p, P_MIRROR_CTRL, &amp;data);</div><div class='add'>+</div><div class='add'>+		if ((data &amp; (PORT_MIRROR_RX | PORT_MIRROR_TX))) {</div><div class='add'>+			in_use = true;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* delete sniffing if there are no other mirroring rules */</div><div class='add'>+	if (!in_use)</div><div class='add'>+		ksz_port_cfg(dev, mirror-&gt;to_local_port, P_MIRROR_CTRL,</div><div class='add'>+			     PORT_MIRROR_SNIFFER, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static phy_interface_t ksz9477_get_interface(struct ksz_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	phy_interface_t interface;</div><div class='add'>+	bool gbit;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;info-&gt;internal_phy[port])</div><div class='add'>+		return PHY_INTERFACE_MODE_NA;</div><div class='add'>+</div><div class='add'>+	gbit = ksz_get_gbit(dev, port);</div><div class='add'>+</div><div class='add'>+	interface = ksz_get_xmii(dev, port, gbit);</div><div class='add'>+</div><div class='add'>+	return interface;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ksz9477_get_caps(struct ksz_device *dev, int port,</div><div class='add'>+		      struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	config-&gt;mac_capabilities = MAC_10 | MAC_100 | MAC_ASYM_PAUSE |</div><div class='add'>+				   MAC_SYM_PAUSE;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;info-&gt;gbit_capable[port])</div><div class='add'>+		config-&gt;mac_capabilities |= MAC_1000FD;</div><div class='add'>+</div><div class='add'>+	if (ksz_is_sgmii_port(dev, port)) {</div><div class='add'>+		struct ksz_port *p = &amp;dev-&gt;ports[port];</div><div class='add'>+</div><div class='add'>+		phy_interface_or(config-&gt;supported_interfaces,</div><div class='add'>+				 config-&gt;supported_interfaces,</div><div class='add'>+				 p-&gt;pcs-&gt;supported_interfaces);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz9477_set_ageing_time(struct ksz_device *dev, unsigned int msecs)</div><div class='add'>+{</div><div class='add'>+	u32 secs = msecs / 1000;</div><div class='add'>+	u8 data, mult, value;</div><div class='add'>+	u32 max_val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+#define MAX_TIMER_VAL	((1 &lt;&lt; 8) - 1)</div><div class='add'>+</div><div class='add'>+	/* The aging timer comprises a 3-bit multiplier and an 8-bit second</div><div class='add'>+	 * value.  Either of them cannot be zero.  The maximum timer is then</div><div class='add'>+	 * 7 * 255 = 1785 seconds.</div><div class='add'>+	 */</div><div class='add'>+	if (!secs)</div><div class='add'>+		secs = 1;</div><div class='add'>+</div><div class='add'>+	/* Return error if too large. */</div><div class='add'>+	else if (secs &gt; 7 * MAX_TIMER_VAL)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = ksz_read8(dev, REG_SW_LUE_CTRL_0, &amp;value);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Check whether there is need to update the multiplier. */</div><div class='add'>+	mult = FIELD_GET(SW_AGE_CNT_M, value);</div><div class='add'>+	max_val = MAX_TIMER_VAL;</div><div class='add'>+	if (mult &gt; 0) {</div><div class='add'>+		/* Try to use the same multiplier already in the register as</div><div class='add'>+		 * the hardware default uses multiplier 4 and 75 seconds for</div><div class='add'>+		 * 300 seconds.</div><div class='add'>+		 */</div><div class='add'>+		max_val = DIV_ROUND_UP(secs, mult);</div><div class='add'>+		if (max_val &gt; MAX_TIMER_VAL || max_val * mult != secs)</div><div class='add'>+			max_val = MAX_TIMER_VAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	data = DIV_ROUND_UP(secs, max_val);</div><div class='add'>+	if (mult != data) {</div><div class='add'>+		value &amp;= ~SW_AGE_CNT_M;</div><div class='add'>+		value |= FIELD_PREP(SW_AGE_CNT_M, data);</div><div class='add'>+		ret = ksz_write8(dev, REG_SW_LUE_CTRL_0, value);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	value = DIV_ROUND_UP(secs, data);</div><div class='add'>+	return ksz_write8(dev, REG_SW_LUE_CTRL_3, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ksz9477_port_queue_split(struct ksz_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	u8 data;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;info-&gt;num_tx_queues == 8)</div><div class='add'>+		data = PORT_EIGHT_QUEUE;</div><div class='add'>+	else if (dev-&gt;info-&gt;num_tx_queues == 4)</div><div class='add'>+		data = PORT_FOUR_QUEUE;</div><div class='add'>+	else if (dev-&gt;info-&gt;num_tx_queues == 2)</div><div class='add'>+		data = PORT_TWO_QUEUE;</div><div class='add'>+	else</div><div class='add'>+		data = PORT_SINGLE_QUEUE;</div><div class='add'>+</div><div class='add'>+	ksz_prmw8(dev, port, REG_PORT_CTRL_0, PORT_QUEUE_SPLIT_MASK, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ksz9477_port_setup(struct ksz_device *dev, int port, bool cpu_port)</div><div class='add'>+{</div><div class='add'>+	const u16 *regs = dev-&gt;info-&gt;regs;</div><div class='add'>+	struct dsa_switch *ds = dev-&gt;ds;</div><div class='add'>+	u16 data16;</div><div class='add'>+	u8 member;</div><div class='add'>+</div><div class='add'>+	/* enable tag tail for host port */</div><div class='add'>+	if (cpu_port)</div><div class='add'>+		ksz_port_cfg(dev, port, REG_PORT_CTRL_0, PORT_TAIL_TAG_ENABLE,</div><div class='add'>+			     true);</div><div class='add'>+</div><div class='add'>+	ksz9477_port_queue_split(dev, port);</div><div class='add'>+</div><div class='add'>+	ksz_port_cfg(dev, port, REG_PORT_CTRL_0, PORT_MAC_LOOPBACK, false);</div><div class='add'>+</div><div class='add'>+	/* set back pressure */</div><div class='add'>+	ksz_port_cfg(dev, port, REG_PORT_MAC_CTRL_1, PORT_BACK_PRESSURE, true);</div><div class='add'>+</div><div class='add'>+	/* enable broadcast storm limit */</div><div class='add'>+	ksz_port_cfg(dev, port, P_BCAST_STORM_CTRL, PORT_BROADCAST_STORM, true);</div><div class='add'>+</div><div class='add'>+	/* replace priority */</div><div class='add'>+	ksz_port_cfg(dev, port, REG_PORT_MRI_MAC_CTRL, PORT_USER_PRIO_CEILING,</div><div class='add'>+		     false);</div><div class='add'>+	ksz9477_port_cfg32(dev, port, REG_PORT_MTI_QUEUE_CTRL_0__4,</div><div class='add'>+			   MTI_PVID_REPLACE, false);</div><div class='add'>+</div><div class='add'>+	/* force flow control for non-PHY ports only */</div><div class='add'>+	ksz_port_cfg(dev, port, REG_PORT_CTRL_0,</div><div class='add'>+		     PORT_FORCE_TX_FLOW_CTRL | PORT_FORCE_RX_FLOW_CTRL,</div><div class='add'>+		     !dev-&gt;info-&gt;internal_phy[port]);</div><div class='add'>+</div><div class='add'>+	if (cpu_port)</div><div class='add'>+		member = dsa_user_ports(ds);</div><div class='add'>+	else</div><div class='add'>+		member = BIT(dsa_upstream_port(ds, port));</div><div class='add'>+</div><div class='add'>+	ksz9477_cfg_port_member(dev, port, member);</div><div class='add'>+</div><div class='add'>+	/* clear pending interrupts */</div><div class='add'>+	if (dev-&gt;info-&gt;internal_phy[port])</div><div class='add'>+		ksz_pread16(dev, port, REG_PORT_PHY_INT_ENABLE, &amp;data16);</div><div class='add'>+</div><div class='add'>+	ksz9477_port_acl_init(dev, port);</div><div class='add'>+</div><div class='add'>+	/* clear pending wake flags */</div><div class='add'>+	ksz_handle_wake_reason(dev, port);</div><div class='add'>+</div><div class='add'>+	/* Disable all WoL options by default. Otherwise</div><div class='add'>+	 * ksz_switch_macaddr_get/put logic will not work properly.</div><div class='add'>+	 */</div><div class='add'>+	ksz_pwrite8(dev, port, regs[REG_PORT_PME_CTRL], 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ksz9477_config_cpu_port(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	struct ksz_port *p;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; dev-&gt;info-&gt;port_cnt; i++) {</div><div class='add'>+		if (dsa_is_cpu_port(ds, i) &amp;&amp;</div><div class='add'>+		    (dev-&gt;info-&gt;cpu_ports &amp; (1 &lt;&lt; i))) {</div><div class='add'>+			phy_interface_t interface;</div><div class='add'>+			const char *prev_msg;</div><div class='add'>+			const char *prev_mode;</div><div class='add'>+</div><div class='add'>+			dev-&gt;cpu_port = i;</div><div class='add'>+			p = &amp;dev-&gt;ports[i];</div><div class='add'>+</div><div class='add'>+			/* Read from XMII register to determine host port</div><div class='add'>+			 * interface.  If set specifically in device tree</div><div class='add'>+			 * note the difference to help debugging.</div><div class='add'>+			 */</div><div class='add'>+			interface = ksz9477_get_interface(dev, i);</div><div class='add'>+			if (!p-&gt;interface) {</div><div class='add'>+				if (dev-&gt;compat_interface) {</div><div class='add'>+					dev_warn(dev-&gt;dev,</div><div class='add'>+						 "Using legacy switch \"phy-mode\" property, because it is missing on port %d node. "</div><div class='add'>+						 "Please update your device tree.\n",</div><div class='add'>+						 i);</div><div class='add'>+					p-&gt;interface = dev-&gt;compat_interface;</div><div class='add'>+				} else {</div><div class='add'>+					p-&gt;interface = interface;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+			if (interface &amp;&amp; interface != p-&gt;interface) {</div><div class='add'>+				prev_msg = " instead of ";</div><div class='add'>+				prev_mode = phy_modes(interface);</div><div class='add'>+			} else {</div><div class='add'>+				prev_msg = "";</div><div class='add'>+				prev_mode = "";</div><div class='add'>+			}</div><div class='add'>+			dev_info(dev-&gt;dev,</div><div class='add'>+				 "Port%d: using phy mode %s%s%s\n",</div><div class='add'>+				 i,</div><div class='add'>+				 phy_modes(p-&gt;interface),</div><div class='add'>+				 prev_msg,</div><div class='add'>+				 prev_mode);</div><div class='add'>+</div><div class='add'>+			/* enable cpu port */</div><div class='add'>+			ksz9477_port_setup(dev, i, true);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; dev-&gt;info-&gt;port_cnt; i++) {</div><div class='add'>+		if (i == dev-&gt;cpu_port)</div><div class='add'>+			continue;</div><div class='add'>+		ksz_port_stp_state_set(ds, i, BR_STATE_DISABLED);</div><div class='add'>+</div><div class='add'>+		/* Power down the internal PHY if port is unused. */</div><div class='add'>+		if (dsa_is_unused_port(ds, i) &amp;&amp; dev-&gt;info-&gt;internal_phy[i])</div><div class='add'>+			ksz_pwrite16(dev, i, 0x100, BMCR_PDOWN);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define RESV_MCAST_CNT	8</div><div class='add'>+</div><div class='add'>+static u8 reserved_mcast_map[RESV_MCAST_CNT] = { 0, 1, 3, 16, 32, 33, 2, 17 };</div><div class='add'>+</div><div class='add'>+int ksz9477_enable_stp_addr(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	u8 i, ports, update;</div><div class='add'>+	const u32 *masks;</div><div class='add'>+	bool override;</div><div class='add'>+	u32 data;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	masks = dev-&gt;info-&gt;masks;</div><div class='add'>+</div><div class='add'>+	/* Enable Reserved multicast table */</div><div class='add'>+	ksz_cfg(dev, REG_SW_LUE_CTRL_0, SW_RESV_MCAST_ENABLE, true);</div><div class='add'>+</div><div class='add'>+	/* The reserved multicast address table has 8 entries.  Each entry has</div><div class='add'>+	 * a default value of which port to forward.  It is assumed the host</div><div class='add'>+	 * port is the last port in most of the switches, but that is not the</div><div class='add'>+	 * case for KSZ9477 or maybe KSZ9897.  For LAN937X family the default</div><div class='add'>+	 * port is port 5, the first RGMII port.  It is okay for LAN9370, a</div><div class='add'>+	 * 5-port switch, but may not be correct for the other 8-port</div><div class='add'>+	 * versions.  It is necessary to update the whole table to forward to</div><div class='add'>+	 * the right ports.</div><div class='add'>+	 * Furthermore PTP messages can use a reserved multicast address and</div><div class='add'>+	 * the host will not receive them if this table is not correct.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; RESV_MCAST_CNT; i++) {</div><div class='add'>+		data = reserved_mcast_map[i] &lt;&lt;</div><div class='add'>+			dev-&gt;info-&gt;shifts[ALU_STAT_INDEX];</div><div class='add'>+		data |= ALU_STAT_START |</div><div class='add'>+			masks[ALU_STAT_DIRECT] |</div><div class='add'>+			masks[ALU_RESV_MCAST_ADDR] |</div><div class='add'>+			masks[ALU_STAT_READ];</div><div class='add'>+		ret = ksz_write32(dev, REG_SW_ALU_STAT_CTRL__4, data);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		/* wait to be finished */</div><div class='add'>+		ret = ksz9477_wait_alu_sta_ready(dev);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		ret = ksz_read32(dev, REG_SW_ALU_VAL_B, &amp;data);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		override = false;</div><div class='add'>+		ports = data &amp; dev-&gt;port_mask;</div><div class='add'>+		switch (i) {</div><div class='add'>+		case 0:</div><div class='add'>+		case 6:</div><div class='add'>+			/* Change the host port. */</div><div class='add'>+			update = BIT(dev-&gt;cpu_port);</div><div class='add'>+			override = true;</div><div class='add'>+			break;</div><div class='add'>+		case 2:</div><div class='add'>+			/* Change the host port. */</div><div class='add'>+			update = BIT(dev-&gt;cpu_port);</div><div class='add'>+			break;</div><div class='add'>+		case 4:</div><div class='add'>+		case 5:</div><div class='add'>+		case 7:</div><div class='add'>+			/* Skip the host port. */</div><div class='add'>+			update = dev-&gt;port_mask &amp; ~BIT(dev-&gt;cpu_port);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			update = ports;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		if (update != ports || override) {</div><div class='add'>+			data &amp;= ~dev-&gt;port_mask;</div><div class='add'>+			data |= update;</div><div class='add'>+			/* Set Override bit to receive frame even when port is</div><div class='add'>+			 * closed.</div><div class='add'>+			 */</div><div class='add'>+			if (override)</div><div class='add'>+				data |= ALU_V_OVERRIDE;</div><div class='add'>+			ret = ksz_write32(dev, REG_SW_ALU_VAL_B, data);</div><div class='add'>+			if (ret &lt; 0)</div><div class='add'>+				return ret;</div><div class='add'>+</div><div class='add'>+			data = reserved_mcast_map[i] &lt;&lt;</div><div class='add'>+			       dev-&gt;info-&gt;shifts[ALU_STAT_INDEX];</div><div class='add'>+			data |= ALU_STAT_START |</div><div class='add'>+				masks[ALU_STAT_DIRECT] |</div><div class='add'>+				masks[ALU_RESV_MCAST_ADDR] |</div><div class='add'>+				masks[ALU_STAT_WRITE];</div><div class='add'>+			ret = ksz_write32(dev, REG_SW_ALU_STAT_CTRL__4, data);</div><div class='add'>+			if (ret &lt; 0)</div><div class='add'>+				return ret;</div><div class='add'>+</div><div class='add'>+			/* wait to be finished */</div><div class='add'>+			ret = ksz9477_wait_alu_sta_ready(dev);</div><div class='add'>+			if (ret &lt; 0)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz9477_setup(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	const u16 *regs = dev-&gt;info-&gt;regs;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	ds-&gt;mtu_enforcement_ingress = true;</div><div class='add'>+</div><div class='add'>+	/* Required for port partitioning. */</div><div class='add'>+	ksz9477_cfg32(dev, REG_SW_QM_CTRL__4, UNICAST_VLAN_BOUNDARY,</div><div class='add'>+		      true);</div><div class='add'>+</div><div class='add'>+	/* Do not work correctly with tail tagging. */</div><div class='add'>+	ksz_cfg(dev, REG_SW_MAC_CTRL_0, SW_CHECK_LENGTH, false);</div><div class='add'>+</div><div class='add'>+	/* Enable REG_SW_MTU__2 reg by setting SW_JUMBO_PACKET */</div><div class='add'>+	ksz_cfg(dev, REG_SW_MAC_CTRL_1, SW_JUMBO_PACKET, true);</div><div class='add'>+</div><div class='add'>+	/* Use collision based back pressure mode. */</div><div class='add'>+	ksz_cfg(dev, REG_SW_MAC_CTRL_1, SW_BACK_PRESSURE,</div><div class='add'>+		SW_BACK_PRESSURE_COLLISION);</div><div class='add'>+</div><div class='add'>+	/* Now we can configure default MTU value */</div><div class='add'>+	ret = regmap_update_bits(ksz_regmap_16(dev), REG_SW_MTU__2, REG_SW_MTU_MASK,</div><div class='add'>+				 VLAN_ETH_FRAME_LEN + ETH_FCS_LEN);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* queue based egress rate limit */</div><div class='add'>+	ksz_cfg(dev, REG_SW_MAC_CTRL_5, SW_OUT_RATE_LIMIT_QUEUE_BASED, true);</div><div class='add'>+</div><div class='add'>+	/* enable global MIB counter freeze function */</div><div class='add'>+	ksz_cfg(dev, REG_SW_MAC_CTRL_6, SW_MIB_COUNTER_FREEZE, true);</div><div class='add'>+</div><div class='add'>+	/* Make sure PME (WoL) is not enabled. If requested, it will</div><div class='add'>+	 * be enabled by ksz_wol_pre_shutdown(). Otherwise, some PMICs</div><div class='add'>+	 * do not like PME events changes before shutdown.</div><div class='add'>+	 */</div><div class='add'>+	return ksz_write8(dev, regs[REG_SW_PME_CTRL], 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 ksz9477_get_port_addr(int port, int offset)</div><div class='add'>+{</div><div class='add'>+	return PORT_CTRL_ADDR(port, offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz9477_tc_cbs_set_cinc(struct ksz_device *dev, int port, u32 val)</div><div class='add'>+{</div><div class='add'>+	val = val &gt;&gt; 8;</div><div class='add'>+</div><div class='add'>+	return ksz_pwrite16(dev, port, REG_PORT_MTI_CREDIT_INCREMENT, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The KSZ9477 provides following HW features to accelerate</div><div class='add'>+ * HSR frames handling:</div><div class='add'>+ *</div><div class='add'>+ * 1. TX PACKET DUPLICATION FROM HOST TO SWITCH</div><div class='add'>+ * 2. RX PACKET DUPLICATION DISCARDING</div><div class='add'>+ * 3. PREVENTING PACKET LOOP IN THE RING BY SELF-ADDRESS FILTERING</div><div class='add'>+ *</div><div class='add'>+ * Only one from point 1. has the NETIF_F* flag available.</div><div class='add'>+ *</div><div class='add'>+ * Ones from point 2 and 3 are "best effort" - i.e. those will</div><div class='add'>+ * work correctly most of the time, but it may happen that some</div><div class='add'>+ * frames will not be caught - to be more specific; there is a race</div><div class='add'>+ * condition in hardware such that, when duplicate packets are received</div><div class='add'>+ * on member ports very close in time to each other, the hardware fails</div><div class='add'>+ * to detect that they are duplicates.</div><div class='add'>+ *</div><div class='add'>+ * Hence, the SW needs to handle those special cases. However, the speed</div><div class='add'>+ * up gain is considerable when above features are used.</div><div class='add'>+ *</div><div class='add'>+ * Moreover, the NETIF_F_HW_HSR_FWD feature is also enabled, as HSR frames</div><div class='add'>+ * can be forwarded in the switch fabric between HSR ports.</div><div class='add'>+ */</div><div class='add'>+#define KSZ9477_SUPPORTED_HSR_FEATURES (NETIF_F_HW_HSR_DUP | NETIF_F_HW_HSR_FWD)</div><div class='add'>+</div><div class='add'>+void ksz9477_hsr_join(struct dsa_switch *ds, int port, struct net_device *hsr)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	struct net_device *user;</div><div class='add'>+	struct dsa_port *hsr_dp;</div><div class='add'>+	u8 data, hsr_ports = 0;</div><div class='add'>+</div><div class='add'>+	/* Program which port(s) shall support HSR */</div><div class='add'>+	ksz_rmw32(dev, REG_HSR_PORT_MAP__4, BIT(port), BIT(port));</div><div class='add'>+</div><div class='add'>+	/* Forward frames between HSR ports (i.e. bridge together HSR ports) */</div><div class='add'>+	if (dev-&gt;hsr_ports) {</div><div class='add'>+		dsa_hsr_foreach_port(hsr_dp, ds, hsr)</div><div class='add'>+			hsr_ports |= BIT(hsr_dp-&gt;index);</div><div class='add'>+</div><div class='add'>+		hsr_ports |= BIT(dsa_upstream_port(ds, port));</div><div class='add'>+		dsa_hsr_foreach_port(hsr_dp, ds, hsr)</div><div class='add'>+			ksz9477_cfg_port_member(dev, hsr_dp-&gt;index, hsr_ports);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!dev-&gt;hsr_ports) {</div><div class='add'>+		/* Enable discarding of received HSR frames */</div><div class='add'>+		ksz_read8(dev, REG_HSR_ALU_CTRL_0__1, &amp;data);</div><div class='add'>+		data |= HSR_DUPLICATE_DISCARD;</div><div class='add'>+		data &amp;= ~HSR_NODE_UNICAST;</div><div class='add'>+		ksz_write8(dev, REG_HSR_ALU_CTRL_0__1, data);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Enable per port self-address filtering.</div><div class='add'>+	 * The global self-address filtering has already been enabled in the</div><div class='add'>+	 * ksz9477_reset_switch() function.</div><div class='add'>+	 */</div><div class='add'>+	ksz_port_cfg(dev, port, REG_PORT_LUE_CTRL, PORT_SRC_ADDR_FILTER, true);</div><div class='add'>+</div><div class='add'>+	/* Setup HW supported features for lan HSR ports */</div><div class='add'>+	user = dsa_to_port(ds, port)-&gt;user;</div><div class='add'>+	user-&gt;features |= KSZ9477_SUPPORTED_HSR_FEATURES;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ksz9477_hsr_leave(struct dsa_switch *ds, int port, struct net_device *hsr)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	/* Clear port HSR support */</div><div class='add'>+	ksz_rmw32(dev, REG_HSR_PORT_MAP__4, BIT(port), 0);</div><div class='add'>+</div><div class='add'>+	/* Disable forwarding frames between HSR ports */</div><div class='add'>+	ksz9477_cfg_port_member(dev, port, BIT(dsa_upstream_port(ds, port)));</div><div class='add'>+</div><div class='add'>+	/* Disable per port self-address filtering */</div><div class='add'>+	ksz_port_cfg(dev, port, REG_PORT_LUE_CTRL, PORT_SRC_ADDR_FILTER, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz9477_switch_init(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	u8 data8;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	dev-&gt;port_mask = (1 &lt;&lt; dev-&gt;info-&gt;port_cnt) - 1;</div><div class='add'>+</div><div class='add'>+	/* turn off SPI DO Edge select */</div><div class='add'>+	ret = ksz_read8(dev, REG_SW_GLOBAL_SERIAL_CTRL_0, &amp;data8);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	data8 &amp;= ~SPI_AUTO_EDGE_DETECTION;</div><div class='add'>+	ret = ksz_write8(dev, REG_SW_GLOBAL_SERIAL_CTRL_0, data8);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ksz9477_switch_exit(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	ksz9477_reset_switch(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Woojung Huh &lt;Woojung.Huh@microchip.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Microchip KSZ9477 Series Switch DSA Driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/dsa/microchip/ksz9477.h b/drivers/net/dsa/microchip/ksz9477.h<br/>new file mode 100644<br/>index 000000000000..0d1a6dfda23e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz9477.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/ksz9477.h</a></div><div class='hunk'>@@ -0,0 +1,102 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/*</div><div class='add'>+ * Microchip KSZ9477 series Header file</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2017-2025 Microchip Technology Inc.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __KSZ9477_H</div><div class='add'>+#define __KSZ9477_H</div><div class='add'>+</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+#include "ksz_common.h"</div><div class='add'>+</div><div class='add'>+int ksz9477_setup(struct dsa_switch *ds);</div><div class='add'>+u32 ksz9477_get_port_addr(int port, int offset);</div><div class='add'>+void ksz9477_cfg_port_member(struct ksz_device *dev, int port, u8 member);</div><div class='add'>+void ksz9477_flush_dyn_mac_table(struct ksz_device *dev, int port);</div><div class='add'>+void ksz9477_port_setup(struct ksz_device *dev, int port, bool cpu_port);</div><div class='add'>+int ksz9477_set_ageing_time(struct ksz_device *dev, unsigned int msecs);</div><div class='add'>+int ksz9477_r_phy(struct ksz_device *dev, u16 addr, u16 reg, u16 *data);</div><div class='add'>+int ksz9477_w_phy(struct ksz_device *dev, u16 addr, u16 reg, u16 val);</div><div class='add'>+void ksz9477_r_mib_cnt(struct ksz_device *dev, int port, u16 addr, u64 *cnt);</div><div class='add'>+void ksz9477_r_mib_pkt(struct ksz_device *dev, int port, u16 addr,</div><div class='add'>+		       u64 *dropped, u64 *cnt);</div><div class='add'>+void ksz9477_freeze_mib(struct ksz_device *dev, int port, bool freeze);</div><div class='add'>+void ksz9477_port_init_cnt(struct ksz_device *dev, int port);</div><div class='add'>+int ksz9477_port_vlan_filtering(struct ksz_device *dev, int port,</div><div class='add'>+				bool flag, struct netlink_ext_ack *extack);</div><div class='add'>+int ksz9477_port_vlan_add(struct ksz_device *dev, int port,</div><div class='add'>+			  const struct switchdev_obj_port_vlan *vlan,</div><div class='add'>+			  struct netlink_ext_ack *extack);</div><div class='add'>+int ksz9477_port_vlan_del(struct ksz_device *dev, int port,</div><div class='add'>+			  const struct switchdev_obj_port_vlan *vlan);</div><div class='add'>+int ksz9477_port_mirror_add(struct ksz_device *dev, int port,</div><div class='add'>+			    struct dsa_mall_mirror_tc_entry *mirror,</div><div class='add'>+			    bool ingress, struct netlink_ext_ack *extack);</div><div class='add'>+void ksz9477_port_mirror_del(struct ksz_device *dev, int port,</div><div class='add'>+			     struct dsa_mall_mirror_tc_entry *mirror);</div><div class='add'>+int ksz9477_errata_monitor(struct ksz_device *dev, int port,</div><div class='add'>+			   u64 tx_late_col);</div><div class='add'>+void ksz9477_get_caps(struct ksz_device *dev, int port,</div><div class='add'>+		      struct phylink_config *config);</div><div class='add'>+int ksz9477_fdb_dump(struct ksz_device *dev, int port,</div><div class='add'>+		     dsa_fdb_dump_cb_t *cb, void *data);</div><div class='add'>+int ksz9477_fdb_add(struct ksz_device *dev, int port,</div><div class='add'>+		    const unsigned char *addr, u16 vid, struct dsa_db db);</div><div class='add'>+int ksz9477_fdb_del(struct ksz_device *dev, int port,</div><div class='add'>+		    const unsigned char *addr, u16 vid, struct dsa_db db);</div><div class='add'>+int ksz9477_mdb_add(struct ksz_device *dev, int port,</div><div class='add'>+		    const struct switchdev_obj_port_mdb *mdb, struct dsa_db db);</div><div class='add'>+int ksz9477_mdb_del(struct ksz_device *dev, int port,</div><div class='add'>+		    const struct switchdev_obj_port_mdb *mdb, struct dsa_db db);</div><div class='add'>+int ksz9477_change_mtu(struct ksz_device *dev, int port, int mtu);</div><div class='add'>+void ksz9477_config_cpu_port(struct dsa_switch *ds);</div><div class='add'>+int ksz9477_tc_cbs_set_cinc(struct ksz_device *dev, int port, u32 val);</div><div class='add'>+int ksz9477_enable_stp_addr(struct ksz_device *dev);</div><div class='add'>+int ksz9477_reset_switch(struct ksz_device *dev);</div><div class='add'>+int ksz9477_switch_init(struct ksz_device *dev);</div><div class='add'>+void ksz9477_switch_exit(struct ksz_device *dev);</div><div class='add'>+void ksz9477_port_queue_split(struct ksz_device *dev, int port);</div><div class='add'>+void ksz9477_hsr_join(struct dsa_switch *ds, int port, struct net_device *hsr);</div><div class='add'>+void ksz9477_hsr_leave(struct dsa_switch *ds, int port, struct net_device *hsr);</div><div class='add'>+</div><div class='add'>+int ksz9477_port_acl_init(struct ksz_device *dev, int port);</div><div class='add'>+void ksz9477_port_acl_free(struct ksz_device *dev, int port);</div><div class='add'>+int ksz9477_cls_flower_add(struct dsa_switch *ds, int port,</div><div class='add'>+			   struct flow_cls_offload *cls, bool ingress);</div><div class='add'>+int ksz9477_cls_flower_del(struct dsa_switch *ds, int port,</div><div class='add'>+			   struct flow_cls_offload *cls, bool ingress);</div><div class='add'>+</div><div class='add'>+#define KSZ9477_ACL_ENTRY_SIZE		18</div><div class='add'>+#define KSZ9477_ACL_MAX_ENTRIES		16</div><div class='add'>+</div><div class='add'>+struct ksz9477_acl_entry {</div><div class='add'>+	u8 entry[KSZ9477_ACL_ENTRY_SIZE];</div><div class='add'>+	unsigned long cookie;</div><div class='add'>+	u32 prio;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ksz9477_acl_entries {</div><div class='add'>+	struct ksz9477_acl_entry entries[KSZ9477_ACL_MAX_ENTRIES];</div><div class='add'>+	int entries_count;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ksz9477_acl_priv {</div><div class='add'>+	struct ksz9477_acl_entries acles;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void ksz9477_acl_remove_entries(struct ksz_device *dev, int port,</div><div class='add'>+				struct ksz9477_acl_entries *acles,</div><div class='add'>+				unsigned long cookie);</div><div class='add'>+int ksz9477_acl_write_list(struct ksz_device *dev, int port);</div><div class='add'>+int ksz9477_sort_acl_entries(struct ksz_device *dev, int port);</div><div class='add'>+void ksz9477_acl_action_rule_cfg(u8 *entry, bool force_prio, u8 prio_val);</div><div class='add'>+void ksz9477_acl_processing_rule_set_action(u8 *entry, u8 action_idx);</div><div class='add'>+void ksz9477_acl_match_process_l2(struct ksz_device *dev, int port,</div><div class='add'>+				  u16 ethtype, u8 *src_mac, u8 *dst_mac,</div><div class='add'>+				  unsigned long cookie, u32 prio);</div><div class='add'>+</div><div class='add'>+int ksz9477_pcs_create(struct ksz_device *dev);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/dsa/microchip/ksz9477_acl.c b/drivers/net/dsa/microchip/ksz9477_acl.c<br/>new file mode 100644<br/>index 000000000000..7ba778df63ac<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz9477_acl.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/ksz9477_acl.c</a></div><div class='hunk'>@@ -0,0 +1,1436 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+// Copyright (c) 2023 Pengutronix, Oleksij Rempel &lt;kernel@pengutronix.de&gt;</div><div class='add'>+</div><div class='add'>+/* Access Control List (ACL) structure:</div><div class='add'>+ *</div><div class='add'>+ * There are multiple groups of registers involved in ACL configuration:</div><div class='add'>+ *</div><div class='add'>+ * - Matching Rules: These registers define the criteria for matching incoming</div><div class='add'>+ *   packets based on their header information (Layer 2 MAC, Layer 3 IP, or</div><div class='add'>+ *   Layer 4 TCP/UDP). Different register settings are used depending on the</div><div class='add'>+ *   matching rule mode (MD) and the Enable (ENB) settings.</div><div class='add'>+ *</div><div class='add'>+ * - Action Rules: These registers define how the ACL should modify the packet's</div><div class='add'>+ *   priority, VLAN tag priority, and forwarding map once a matching rule has</div><div class='add'>+ *   been triggered. The settings vary depending on whether the matching rule is</div><div class='add'>+ *   in Count Mode (MD = 01 and ENB = 00) or not.</div><div class='add'>+ *</div><div class='add'>+ * - Processing Rules: These registers control the overall behavior of the ACL,</div><div class='add'>+ *   such as selecting which matching rule to apply first, enabling/disabling</div><div class='add'>+ *   specific rules, or specifying actions for matched packets.</div><div class='add'>+ *</div><div class='add'>+ * ACL Structure:</div><div class='add'>+ *                             +----------------------+</div><div class='add'>+ * +----------------------+    |    (optional)        |</div><div class='add'>+ * |    Matching Rules    |    |    Matching Rules    |</div><div class='add'>+ * |    (Layer 2, 3, 4)   |    |    (Layer 2, 3, 4)   |</div><div class='add'>+ * +----------------------+    +----------------------+</div><div class='add'>+ *             |                            |</div><div class='add'>+ *             \___________________________/</div><div class='add'>+ *                          v</div><div class='add'>+ *               +----------------------+</div><div class='add'>+ *               |   Processing Rules   |</div><div class='add'>+ *               | (action idx,         |</div><div class='add'>+ *               | matching rule set)   |</div><div class='add'>+ *               +----------------------+</div><div class='add'>+ *                          |</div><div class='add'>+ *                          v</div><div class='add'>+ *               +----------------------+</div><div class='add'>+ *               |    Action Rules      |</div><div class='add'>+ *               | (Modify Priority,    |</div><div class='add'>+ *               |  Forwarding Map,     |</div><div class='add'>+ *               |  VLAN tag, etc)      |</div><div class='add'>+ *               +----------------------+</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitops.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ksz9477.h"</div><div class='add'>+#include "ksz9477_reg.h"</div><div class='add'>+#include "ksz_common.h"</div><div class='add'>+</div><div class='add'>+#define KSZ9477_PORT_ACL_0		0x600</div><div class='add'>+</div><div class='add'>+enum ksz9477_acl_port_access {</div><div class='add'>+	KSZ9477_ACL_PORT_ACCESS_0  = 0x00,</div><div class='add'>+	KSZ9477_ACL_PORT_ACCESS_1  = 0x01,</div><div class='add'>+	KSZ9477_ACL_PORT_ACCESS_2  = 0x02,</div><div class='add'>+	KSZ9477_ACL_PORT_ACCESS_3  = 0x03,</div><div class='add'>+	KSZ9477_ACL_PORT_ACCESS_4  = 0x04,</div><div class='add'>+	KSZ9477_ACL_PORT_ACCESS_5  = 0x05,</div><div class='add'>+	KSZ9477_ACL_PORT_ACCESS_6  = 0x06,</div><div class='add'>+	KSZ9477_ACL_PORT_ACCESS_7  = 0x07,</div><div class='add'>+	KSZ9477_ACL_PORT_ACCESS_8  = 0x08,</div><div class='add'>+	KSZ9477_ACL_PORT_ACCESS_9  = 0x09,</div><div class='add'>+	KSZ9477_ACL_PORT_ACCESS_A  = 0x0A,</div><div class='add'>+	KSZ9477_ACL_PORT_ACCESS_B  = 0x0B,</div><div class='add'>+	KSZ9477_ACL_PORT_ACCESS_C  = 0x0C,</div><div class='add'>+	KSZ9477_ACL_PORT_ACCESS_D  = 0x0D,</div><div class='add'>+	KSZ9477_ACL_PORT_ACCESS_E  = 0x0E,</div><div class='add'>+	KSZ9477_ACL_PORT_ACCESS_F  = 0x0F,</div><div class='add'>+	KSZ9477_ACL_PORT_ACCESS_10 = 0x10,</div><div class='add'>+	KSZ9477_ACL_PORT_ACCESS_11 = 0x11</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define KSZ9477_ACL_MD_MASK			GENMASK(5, 4)</div><div class='add'>+#define KSZ9477_ACL_MD_DISABLE			0</div><div class='add'>+#define KSZ9477_ACL_MD_L2_MAC			1</div><div class='add'>+#define KSZ9477_ACL_MD_L3_IP			2</div><div class='add'>+#define KSZ9477_ACL_MD_L4_TCP_UDP		3</div><div class='add'>+</div><div class='add'>+#define KSZ9477_ACL_ENB_MASK			GENMASK(3, 2)</div><div class='add'>+#define KSZ9477_ACL_ENB_L2_COUNTER		0</div><div class='add'>+#define KSZ9477_ACL_ENB_L2_TYPE			1</div><div class='add'>+#define KSZ9477_ACL_ENB_L2_MAC			2</div><div class='add'>+#define KSZ9477_ACL_ENB_L2_MAC_TYPE		3</div><div class='add'>+</div><div class='add'>+/* only IPv4 src or dst can be used with mask */</div><div class='add'>+#define KSZ9477_ACL_ENB_L3_IPV4_ADDR_MASK	1</div><div class='add'>+/* only IPv4 src and dst can be used without mask */</div><div class='add'>+#define KSZ9477_ACL_ENB_L3_IPV4_ADDR_SRC_DST	2</div><div class='add'>+</div><div class='add'>+#define KSZ9477_ACL_ENB_L4_IP_PROTO	        0</div><div class='add'>+#define KSZ9477_ACL_ENB_L4_TCP_SRC_DST_PORT	1</div><div class='add'>+#define KSZ9477_ACL_ENB_L4_UDP_SRC_DST_PORT	2</div><div class='add'>+#define KSZ9477_ACL_ENB_L4_TCP_SEQ_NUMBER	3</div><div class='add'>+</div><div class='add'>+#define KSZ9477_ACL_SD_SRC			BIT(1)</div><div class='add'>+#define KSZ9477_ACL_SD_DST			0</div><div class='add'>+#define KSZ9477_ACL_EQ_EQUAL			BIT(0)</div><div class='add'>+#define KSZ9477_ACL_EQ_NOT_EQUAL		0</div><div class='add'>+</div><div class='add'>+#define KSZ9477_ACL_PM_M			GENMASK(7, 6)</div><div class='add'>+#define KSZ9477_ACL_PM_DISABLE			0</div><div class='add'>+#define KSZ9477_ACL_PM_HIGHER			1</div><div class='add'>+#define KSZ9477_ACL_PM_LOWER			2</div><div class='add'>+#define KSZ9477_ACL_PM_REPLACE			3</div><div class='add'>+#define KSZ9477_ACL_P_M				GENMASK(5, 3)</div><div class='add'>+</div><div class='add'>+#define KSZ9477_PORT_ACL_CTRL_0			0x0612</div><div class='add'>+</div><div class='add'>+#define KSZ9477_ACL_WRITE_DONE			BIT(6)</div><div class='add'>+#define KSZ9477_ACL_READ_DONE			BIT(5)</div><div class='add'>+#define KSZ9477_ACL_WRITE			BIT(4)</div><div class='add'>+#define KSZ9477_ACL_INDEX_M			GENMASK(3, 0)</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz9477_dump_acl_index - Print the ACL entry at the specified index</div><div class='add'>+ *</div><div class='add'>+ * @dev: Pointer to the ksz9477 device structure.</div><div class='add'>+ * @acle: Pointer to the ACL entry array.</div><div class='add'>+ * @index: The index of the ACL entry to print.</div><div class='add'>+ *</div><div class='add'>+ * This function prints the details of an ACL entry, located at a particular</div><div class='add'>+ * index within the ksz9477 device's ACL table. It omits printing entries that</div><div class='add'>+ * are empty.</div><div class='add'>+ *</div><div class='add'>+ * Return: 1 if the entry is non-empty and printed, 0 otherwise.</div><div class='add'>+ */</div><div class='add'>+static int ksz9477_dump_acl_index(struct ksz_device *dev,</div><div class='add'>+				  struct ksz9477_acl_entry *acle, int index)</div><div class='add'>+{</div><div class='add'>+	bool empty = true;</div><div class='add'>+	char buf[64];</div><div class='add'>+	u8 *entry;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	entry = &amp;acle[index].entry[0];</div><div class='add'>+	for (i = 0; i &lt;= KSZ9477_ACL_PORT_ACCESS_11; i++) {</div><div class='add'>+		if (entry[i])</div><div class='add'>+			empty = false;</div><div class='add'>+</div><div class='add'>+		sprintf(buf + (i * 3), "%02x ", entry[i]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* no need to print empty entries */</div><div class='add'>+	if (empty)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	dev_err(dev-&gt;dev, " Entry %02d, prio: %02d : %s", index,</div><div class='add'>+		acle[index].prio, buf);</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz9477_dump_acl - Print ACL entries</div><div class='add'>+ *</div><div class='add'>+ * @dev: Pointer to the device structure.</div><div class='add'>+ * @acle: Pointer to the ACL entry array.</div><div class='add'>+ */</div><div class='add'>+static void ksz9477_dump_acl(struct ksz_device *dev,</div><div class='add'>+			     struct ksz9477_acl_entry *acle)</div><div class='add'>+{</div><div class='add'>+	int count = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; KSZ9477_ACL_MAX_ENTRIES; i++)</div><div class='add'>+		count += ksz9477_dump_acl_index(dev, acle, i);</div><div class='add'>+</div><div class='add'>+	if (count != KSZ9477_ACL_MAX_ENTRIES - 1)</div><div class='add'>+		dev_err(dev-&gt;dev, " Empty ACL entries were skipped\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz9477_acl_is_valid_matching_rule - Check if an ACL entry contains a valid</div><div class='add'>+ *					matching rule.</div><div class='add'>+ *</div><div class='add'>+ * @entry: Pointer to ACL entry buffer</div><div class='add'>+ *</div><div class='add'>+ * This function checks if the given ACL entry buffer contains a valid</div><div class='add'>+ * matching rule by inspecting the Mode (MD) and Enable (ENB) fields.</div><div class='add'>+ *</div><div class='add'>+ * Returns: True if it's a valid matching rule, false otherwise.</div><div class='add'>+ */</div><div class='add'>+static bool ksz9477_acl_is_valid_matching_rule(u8 *entry)</div><div class='add'>+{</div><div class='add'>+	u8 val1, md, enb;</div><div class='add'>+</div><div class='add'>+	val1 = entry[KSZ9477_ACL_PORT_ACCESS_1];</div><div class='add'>+</div><div class='add'>+	md = FIELD_GET(KSZ9477_ACL_MD_MASK, val1);</div><div class='add'>+	if (md == KSZ9477_ACL_MD_DISABLE)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (md == KSZ9477_ACL_MD_L2_MAC) {</div><div class='add'>+		/* L2 counter is not support, so it is not valid rule for now */</div><div class='add'>+		enb = FIELD_GET(KSZ9477_ACL_ENB_MASK, val1);</div><div class='add'>+		if (enb == KSZ9477_ACL_ENB_L2_COUNTER)</div><div class='add'>+			return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz9477_acl_get_cont_entr - Get count of contiguous ACL entries and validate</div><div class='add'>+ *                             the matching rules.</div><div class='add'>+ * @dev: Pointer to the KSZ9477 device structure.</div><div class='add'>+ * @port: Port number.</div><div class='add'>+ * @index: Index of the starting ACL entry.</div><div class='add'>+ *</div><div class='add'>+ * Based on the KSZ9477 switch's Access Control List (ACL) system, the RuleSet</div><div class='add'>+ * in an ACL entry indicates which entries contain Matching rules linked to it.</div><div class='add'>+ * This RuleSet is represented by two registers: KSZ9477_ACL_PORT_ACCESS_E and</div><div class='add'>+ * KSZ9477_ACL_PORT_ACCESS_F. Each bit set in these registers corresponds to</div><div class='add'>+ * an entry containing a Matching rule for this RuleSet.</div><div class='add'>+ *</div><div class='add'>+ * For a single Matching rule linked, only one bit is set. However, when an</div><div class='add'>+ * entry links multiple Matching rules, forming what's termed a 'complex rule',</div><div class='add'>+ * multiple bits are set in these registers.</div><div class='add'>+ *</div><div class='add'>+ * This function checks that, for complex rules, the entries containing the</div><div class='add'>+ * linked Matching rules are contiguous in terms of their indices. It calculates</div><div class='add'>+ * and returns the number of these contiguous entries.</div><div class='add'>+ *</div><div class='add'>+ * Returns:</div><div class='add'>+ *    - 0 if the entry is empty and can be safely overwritten</div><div class='add'>+ *    - 1 if the entry represents a simple rule</div><div class='add'>+ *    - The number of contiguous entries if it is the root entry of a complex</div><div class='add'>+ *      rule</div><div class='add'>+ *    - -ENOTEMPTY if the entry is part of a complex rule but not the root</div><div class='add'>+ *      entry</div><div class='add'>+ *    - -EINVAL if the validation fails</div><div class='add'>+ */</div><div class='add'>+static int ksz9477_acl_get_cont_entr(struct ksz_device *dev, int port,</div><div class='add'>+				     int index)</div><div class='add'>+{</div><div class='add'>+	struct ksz9477_acl_priv *acl = dev-&gt;ports[port].acl_priv;</div><div class='add'>+	struct ksz9477_acl_entries *acles = &amp;acl-&gt;acles;</div><div class='add'>+	int start_idx, end_idx, contiguous_count;</div><div class='add'>+	unsigned long val;</div><div class='add'>+	u8 vale, valf;</div><div class='add'>+	u8 *entry;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	entry = &amp;acles-&gt;entries[index].entry[0];</div><div class='add'>+	vale = entry[KSZ9477_ACL_PORT_ACCESS_E];</div><div class='add'>+	valf = entry[KSZ9477_ACL_PORT_ACCESS_F];</div><div class='add'>+</div><div class='add'>+	val = (vale &lt;&lt; 8) | valf;</div><div class='add'>+</div><div class='add'>+	/* If no bits are set, return an appropriate value or error */</div><div class='add'>+	if (!val) {</div><div class='add'>+		if (ksz9477_acl_is_valid_matching_rule(entry)) {</div><div class='add'>+			/* Looks like we are about to corrupt some complex rule.</div><div class='add'>+			 * Do not print an error here, as this is a normal case</div><div class='add'>+			 * when we are trying to find a free or starting entry.</div><div class='add'>+			 */</div><div class='add'>+			dev_dbg(dev-&gt;dev, "ACL: entry %d starting with a valid matching rule, but no bits set in RuleSet\n",</div><div class='add'>+				index);</div><div class='add'>+			return -ENOTEMPTY;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* This entry does not contain a valid matching rule */</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	start_idx = find_first_bit((unsigned long *)&amp;val, 16);</div><div class='add'>+	end_idx = find_last_bit((unsigned long *)&amp;val, 16);</div><div class='add'>+</div><div class='add'>+	/* Calculate the contiguous count */</div><div class='add'>+	contiguous_count = end_idx - start_idx + 1;</div><div class='add'>+</div><div class='add'>+	/* Check if the number of bits set in val matches our calculated count */</div><div class='add'>+	if (contiguous_count != hweight16(val)) {</div><div class='add'>+		/* Probably we have a fragmented complex rule, which is not</div><div class='add'>+		 * supported by this driver.</div><div class='add'>+		 */</div><div class='add'>+		dev_err(dev-&gt;dev, "ACL: number of bits set in RuleSet does not match calculated count\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* loop over the contiguous entries and check for valid matching rules */</div><div class='add'>+	for (i = start_idx; i &lt;= end_idx; i++) {</div><div class='add'>+		u8 *current_entry = &amp;acles-&gt;entries[i].entry[0];</div><div class='add'>+</div><div class='add'>+		if (!ksz9477_acl_is_valid_matching_rule(current_entry)) {</div><div class='add'>+			/* we have something linked without a valid matching</div><div class='add'>+			 * rule. ACL table?</div><div class='add'>+			 */</div><div class='add'>+			dev_err(dev-&gt;dev, "ACL: entry %d does not contain a valid matching rule\n",</div><div class='add'>+				i);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (i &gt; start_idx) {</div><div class='add'>+			vale = current_entry[KSZ9477_ACL_PORT_ACCESS_E];</div><div class='add'>+			valf = current_entry[KSZ9477_ACL_PORT_ACCESS_F];</div><div class='add'>+			/* Following entry should have empty linkage list */</div><div class='add'>+			if (vale || valf) {</div><div class='add'>+				dev_err(dev-&gt;dev, "ACL: entry %d has non-empty RuleSet linkage\n",</div><div class='add'>+					i);</div><div class='add'>+				return -EINVAL;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return contiguous_count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz9477_acl_update_linkage - Update the RuleSet linkage for an ACL entry</div><div class='add'>+ *                              after a move operation.</div><div class='add'>+ *</div><div class='add'>+ * @dev: Pointer to the ksz_device.</div><div class='add'>+ * @entry:   Pointer to the ACL entry array.</div><div class='add'>+ * @old_idx: The original index of the ACL entry before moving.</div><div class='add'>+ * @new_idx: The new index of the ACL entry after moving.</div><div class='add'>+ *</div><div class='add'>+ * This function updates the RuleSet linkage bits for an ACL entry when</div><div class='add'>+ * it's moved from one position to another in the ACL table. The RuleSet</div><div class='add'>+ * linkage is represented by two 8-bit registers, which are combined</div><div class='add'>+ * into a 16-bit value for easier manipulation. The linkage bits are shifted</div><div class='add'>+ * based on the difference between the old and new index. If any bits are lost</div><div class='add'>+ * during the shift operation, an error is returned.</div><div class='add'>+ *</div><div class='add'>+ * Note: Fragmentation within a RuleSet is not supported. Hence, entries must</div><div class='add'>+ * be moved as complete blocks, maintaining the integrity of the RuleSet.</div><div class='add'>+ *</div><div class='add'>+ * Returns: 0 on success, or -EINVAL if any RuleSet linkage bits are lost</div><div class='add'>+ * during the move.</div><div class='add'>+ */</div><div class='add'>+static int ksz9477_acl_update_linkage(struct ksz_device *dev, u8 *entry,</div><div class='add'>+				      u16 old_idx, u16 new_idx)</div><div class='add'>+{</div><div class='add'>+	unsigned int original_bit_count;</div><div class='add'>+	unsigned long rule_linkage;</div><div class='add'>+	u8 vale, valf, val0;</div><div class='add'>+	int shift;</div><div class='add'>+</div><div class='add'>+	val0 = entry[KSZ9477_ACL_PORT_ACCESS_0];</div><div class='add'>+	vale = entry[KSZ9477_ACL_PORT_ACCESS_E];</div><div class='add'>+	valf = entry[KSZ9477_ACL_PORT_ACCESS_F];</div><div class='add'>+</div><div class='add'>+	/* Combine the two u8 values into one u16 for easier manipulation */</div><div class='add'>+	rule_linkage = (vale &lt;&lt; 8) | valf;</div><div class='add'>+	original_bit_count = hweight16(rule_linkage);</div><div class='add'>+</div><div class='add'>+	/* Even if HW is able to handle fragmented RuleSet, we don't support it.</div><div class='add'>+	 * RuleSet is filled only for the first entry of the set.</div><div class='add'>+	 */</div><div class='add'>+	if (!rule_linkage)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (val0 != old_idx) {</div><div class='add'>+		dev_err(dev-&gt;dev, "ACL: entry %d has unexpected ActionRule linkage: %d\n",</div><div class='add'>+			old_idx, val0);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	val0 = new_idx;</div><div class='add'>+</div><div class='add'>+	/* Calculate the number of positions to shift */</div><div class='add'>+	shift = new_idx - old_idx;</div><div class='add'>+</div><div class='add'>+	/* Shift the RuleSet */</div><div class='add'>+	if (shift &gt; 0)</div><div class='add'>+		rule_linkage &lt;&lt;= shift;</div><div class='add'>+	else</div><div class='add'>+		rule_linkage &gt;&gt;= -shift;</div><div class='add'>+</div><div class='add'>+	/* Check that no bits were lost in the process */</div><div class='add'>+	if (original_bit_count != hweight16(rule_linkage)) {</div><div class='add'>+		dev_err(dev-&gt;dev, "ACL RuleSet linkage bits lost during move\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	entry[KSZ9477_ACL_PORT_ACCESS_0] = val0;</div><div class='add'>+</div><div class='add'>+	/* Update the RuleSet bitfields in the entry */</div><div class='add'>+	entry[KSZ9477_ACL_PORT_ACCESS_E] = (rule_linkage &gt;&gt; 8) &amp; 0xFF;</div><div class='add'>+	entry[KSZ9477_ACL_PORT_ACCESS_F] = rule_linkage &amp; 0xFF;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz9477_validate_and_get_src_count - Validate source and destination indices</div><div class='add'>+ *					and determine the source entry count.</div><div class='add'>+ * @dev: Pointer to the KSZ device structure.</div><div class='add'>+ * @port: Port number on the KSZ device where the ACL entries reside.</div><div class='add'>+ * @src_idx: Index of the starting ACL entry that needs to be validated.</div><div class='add'>+ * @dst_idx: Index of the destination where the source entries are intended to</div><div class='add'>+ *	     be moved.</div><div class='add'>+ * @src_count: Pointer to the variable that will hold the number of contiguous</div><div class='add'>+ *	     source entries if the validation passes.</div><div class='add'>+ * @dst_count: Pointer to the variable that will hold the number of contiguous</div><div class='add'>+ *	     destination entries if the validation passes.</div><div class='add'>+ *</div><div class='add'>+ * This function performs validation on the source and destination indices</div><div class='add'>+ * provided for ACL entries. It checks if the indices are within the valid</div><div class='add'>+ * range, and if the source entries are contiguous. Additionally, the function</div><div class='add'>+ * ensures that there's adequate space at the destination for the source entries</div><div class='add'>+ * and that the destination index isn't in the middle of a RuleSet. If all</div><div class='add'>+ * validations pass, the function returns the number of contiguous source and</div><div class='add'>+ * destination entries.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, otherwise returns a negative error code if any</div><div class='add'>+ * validation check fails.</div><div class='add'>+ */</div><div class='add'>+static int ksz9477_validate_and_get_src_count(struct ksz_device *dev, int port,</div><div class='add'>+					      int src_idx, int dst_idx,</div><div class='add'>+					      int *src_count, int *dst_count)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (src_idx &gt;= KSZ9477_ACL_MAX_ENTRIES ||</div><div class='add'>+	    dst_idx &gt;= KSZ9477_ACL_MAX_ENTRIES) {</div><div class='add'>+		dev_err(dev-&gt;dev, "ACL: invalid entry index\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Validate if the source entries are contiguous */</div><div class='add'>+	ret = ksz9477_acl_get_cont_entr(dev, port, src_idx);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	*src_count = ret;</div><div class='add'>+</div><div class='add'>+	if (!*src_count) {</div><div class='add'>+		dev_err(dev-&gt;dev, "ACL: source entry is empty\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (dst_idx + *src_count &gt;= KSZ9477_ACL_MAX_ENTRIES) {</div><div class='add'>+		dev_err(dev-&gt;dev, "ACL: Not enough space at the destination. Move operation will fail.\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Validate if the destination entry is empty or not in the middle of</div><div class='add'>+	 * a RuleSet.</div><div class='add'>+	 */</div><div class='add'>+	ret = ksz9477_acl_get_cont_entr(dev, port, dst_idx);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	*dst_count = ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz9477_move_entries_downwards - Move a range of ACL entries downwards in</div><div class='add'>+ *				    the list.</div><div class='add'>+ * @dev: Pointer to the KSZ device structure.</div><div class='add'>+ * @acles: Pointer to the structure encapsulating all the ACL entries.</div><div class='add'>+ * @start_idx: Starting index of the entries to be relocated.</div><div class='add'>+ * @num_entries_to_move: Number of consecutive entries to be relocated.</div><div class='add'>+ * @end_idx: Destination index where the first entry should be situated post</div><div class='add'>+ *           relocation.</div><div class='add'>+ *</div><div class='add'>+ * This function is responsible for rearranging a specific block of ACL entries</div><div class='add'>+ * by shifting them downwards in the list based on the supplied source and</div><div class='add'>+ * destination indices. It ensures that the linkage between the ACL entries is</div><div class='add'>+ * maintained accurately after the relocation.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on successful relocation of entries, otherwise returns a negative</div><div class='add'>+ * error code.</div><div class='add'>+ */</div><div class='add'>+static int ksz9477_move_entries_downwards(struct ksz_device *dev,</div><div class='add'>+					  struct ksz9477_acl_entries *acles,</div><div class='add'>+					  u16 start_idx,</div><div class='add'>+					  u16 num_entries_to_move,</div><div class='add'>+					  u16 end_idx)</div><div class='add'>+{</div><div class='add'>+	struct ksz9477_acl_entry *e;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	for (i = start_idx; i &lt; end_idx; i++) {</div><div class='add'>+		e = &amp;acles-&gt;entries[i];</div><div class='add'>+		*e = acles-&gt;entries[i + num_entries_to_move];</div><div class='add'>+</div><div class='add'>+		ret = ksz9477_acl_update_linkage(dev, &amp;e-&gt;entry[0],</div><div class='add'>+						 i + num_entries_to_move, i);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz9477_move_entries_upwards - Move a range of ACL entries upwards in the</div><div class='add'>+ *				  list.</div><div class='add'>+ * @dev: Pointer to the KSZ device structure.</div><div class='add'>+ * @acles: Pointer to the structure holding all the ACL entries.</div><div class='add'>+ * @start_idx: The starting index of the entries to be moved.</div><div class='add'>+ * @num_entries_to_move: Number of contiguous entries to be moved.</div><div class='add'>+ * @target_idx: The destination index where the first entry should be placed</div><div class='add'>+ *		after moving.</div><div class='add'>+ *</div><div class='add'>+ * This function rearranges a chunk of ACL entries by moving them upwards</div><div class='add'>+ * in the list based on the given source and destination indices. The reordering</div><div class='add'>+ * process preserves the linkage between entries by updating it accordingly.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 if the entries were successfully moved, otherwise a negative error</div><div class='add'>+ * code.</div><div class='add'>+ */</div><div class='add'>+static int ksz9477_move_entries_upwards(struct ksz_device *dev,</div><div class='add'>+					struct ksz9477_acl_entries *acles,</div><div class='add'>+					u16 start_idx, u16 num_entries_to_move,</div><div class='add'>+					u16 target_idx)</div><div class='add'>+{</div><div class='add'>+	struct ksz9477_acl_entry *e;</div><div class='add'>+	int ret, i, b;</div><div class='add'>+</div><div class='add'>+	for (i = start_idx; i &gt; target_idx; i--) {</div><div class='add'>+		b = i + num_entries_to_move - 1;</div><div class='add'>+</div><div class='add'>+		e = &amp;acles-&gt;entries[b];</div><div class='add'>+		*e = acles-&gt;entries[i - 1];</div><div class='add'>+</div><div class='add'>+		ret = ksz9477_acl_update_linkage(dev, &amp;e-&gt;entry[0], i - 1, b);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz9477_acl_move_entries - Move a block of contiguous ACL entries from a</div><div class='add'>+ *			      source to a destination index.</div><div class='add'>+ * @dev: Pointer to the KSZ9477 device structure.</div><div class='add'>+ * @port: Port number.</div><div class='add'>+ * @src_idx: Index of the starting source ACL entry.</div><div class='add'>+ * @dst_idx: Index of the starting destination ACL entry.</div><div class='add'>+ *</div><div class='add'>+ * This function aims to move a block of contiguous ACL entries from the source</div><div class='add'>+ * index to the destination index while ensuring the integrity and validity of</div><div class='add'>+ * the ACL table.</div><div class='add'>+ *</div><div class='add'>+ * In case of any errors during the adjustments or copying, the function will</div><div class='add'>+ * restore the ACL entries to their original state from the backup.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 if the move operation is successful. Returns -EINVAL for validation</div><div class='add'>+ * errors or other error codes based on specific failure conditions.</div><div class='add'>+ */</div><div class='add'>+static int ksz9477_acl_move_entries(struct ksz_device *dev, int port,</div><div class='add'>+				    u16 src_idx, u16 dst_idx)</div><div class='add'>+{</div><div class='add'>+	struct ksz9477_acl_entry buffer[KSZ9477_ACL_MAX_ENTRIES];</div><div class='add'>+	struct ksz9477_acl_priv *acl = dev-&gt;ports[port].acl_priv;</div><div class='add'>+	struct ksz9477_acl_entries *acles = &amp;acl-&gt;acles;</div><div class='add'>+	int src_count, ret, dst_count;</div><div class='add'>+</div><div class='add'>+	/* Nothing to do */</div><div class='add'>+	if (src_idx == dst_idx)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ret = ksz9477_validate_and_get_src_count(dev, port, src_idx, dst_idx,</div><div class='add'>+						 &amp;src_count, &amp;dst_count);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* In case dst_index is greater than src_index, we need to adjust the</div><div class='add'>+	 * destination index to account for the entries that will be moved</div><div class='add'>+	 * downwards and the size of the entry located at dst_idx.</div><div class='add'>+	 */</div><div class='add'>+	if (dst_idx &gt; src_idx)</div><div class='add'>+		dst_idx = dst_idx + dst_count - src_count;</div><div class='add'>+</div><div class='add'>+	/* Copy source block to buffer and update its linkage */</div><div class='add'>+	for (int i = 0; i &lt; src_count; i++) {</div><div class='add'>+		buffer[i] = acles-&gt;entries[src_idx + i];</div><div class='add'>+		ret = ksz9477_acl_update_linkage(dev, &amp;buffer[i].entry[0],</div><div class='add'>+						 src_idx + i, dst_idx + i);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Adjust other entries and their linkage based on destination */</div><div class='add'>+	if (dst_idx &gt; src_idx) {</div><div class='add'>+		ret = ksz9477_move_entries_downwards(dev, acles, src_idx,</div><div class='add'>+						     src_count, dst_idx);</div><div class='add'>+	} else {</div><div class='add'>+		ret = ksz9477_move_entries_upwards(dev, acles, src_idx,</div><div class='add'>+						   src_count, dst_idx);</div><div class='add'>+	}</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Copy buffer to destination block */</div><div class='add'>+	for (int i = 0; i &lt; src_count; i++)</div><div class='add'>+		acles-&gt;entries[dst_idx + i] = buffer[i];</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz9477_get_next_block_start - Identify the starting index of the next ACL</div><div class='add'>+ *				  block.</div><div class='add'>+ * @dev: Pointer to the device structure.</div><div class='add'>+ * @port: The port number on which the ACL entries are being checked.</div><div class='add'>+ * @start: The starting index from which the search begins.</div><div class='add'>+ *</div><div class='add'>+ * This function looks for the next valid ACL block starting from the provided</div><div class='add'>+ * 'start' index and returns the beginning index of that block. If the block is</div><div class='add'>+ * invalid or if it reaches the end of the ACL entries without finding another</div><div class='add'>+ * block, it returns the maximum ACL entries count.</div><div class='add'>+ *</div><div class='add'>+ * Returns:</div><div class='add'>+ *  - The starting index of the next valid ACL block.</div><div class='add'>+ *  - KSZ9477_ACL_MAX_ENTRIES if no other valid blocks are found after 'start'.</div><div class='add'>+ *  - A negative error code if an error occurs while checking.</div><div class='add'>+ */</div><div class='add'>+static int ksz9477_get_next_block_start(struct ksz_device *dev, int port,</div><div class='add'>+					int start)</div><div class='add'>+{</div><div class='add'>+	int block_size;</div><div class='add'>+</div><div class='add'>+	for (int i = start; i &lt; KSZ9477_ACL_MAX_ENTRIES;) {</div><div class='add'>+		block_size = ksz9477_acl_get_cont_entr(dev, port, i);</div><div class='add'>+		if (block_size &lt; 0 &amp;&amp; block_size != -ENOTEMPTY)</div><div class='add'>+			return block_size;</div><div class='add'>+</div><div class='add'>+		if (block_size &gt; 0)</div><div class='add'>+			return i;</div><div class='add'>+</div><div class='add'>+		i++;</div><div class='add'>+	}</div><div class='add'>+	return KSZ9477_ACL_MAX_ENTRIES;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz9477_swap_acl_blocks - Swap two ACL blocks</div><div class='add'>+ * @dev: Pointer to the device structure.</div><div class='add'>+ * @port: The port number on which the ACL blocks are to be swapped.</div><div class='add'>+ * @i: The starting index of the first ACL block.</div><div class='add'>+ * @j: The starting index of the second ACL block.</div><div class='add'>+ *</div><div class='add'>+ * This function is used to swap two ACL blocks present at given indices. The</div><div class='add'>+ * main purpose is to aid in the sorting and reordering of ACL blocks based on</div><div class='add'>+ * certain criteria, e.g., priority. It checks the validity of the block at</div><div class='add'>+ * index 'i', ensuring it's not an empty block, and then proceeds to swap it</div><div class='add'>+ * with the block at index 'j'.</div><div class='add'>+ *</div><div class='add'>+ * Returns:</div><div class='add'>+ *  - 0 on successful swapping of blocks.</div><div class='add'>+ *  - -EINVAL if the block at index 'i' is empty.</div><div class='add'>+ *  - A negative error code if any other error occurs during the swap.</div><div class='add'>+ */</div><div class='add'>+static int ksz9477_swap_acl_blocks(struct ksz_device *dev, int port, int i,</div><div class='add'>+				   int j)</div><div class='add'>+{</div><div class='add'>+	int ret, current_block_size;</div><div class='add'>+</div><div class='add'>+	current_block_size = ksz9477_acl_get_cont_entr(dev, port, i);</div><div class='add'>+	if (current_block_size &lt; 0)</div><div class='add'>+		return current_block_size;</div><div class='add'>+</div><div class='add'>+	if (!current_block_size) {</div><div class='add'>+		dev_err(dev-&gt;dev, "ACL: swapping empty entry %d\n", i);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ksz9477_acl_move_entries(dev, port, i, j);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ksz9477_acl_move_entries(dev, port, j - current_block_size, i);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz9477_sort_acl_entr_no_back - Sort ACL entries for a given port based on</div><div class='add'>+ *			           priority without backing up entries.</div><div class='add'>+ * @dev: Pointer to the device structure.</div><div class='add'>+ * @port: The port number whose ACL entries need to be sorted.</div><div class='add'>+ *</div><div class='add'>+ * This function sorts ACL entries of the specified port using a variant of the</div><div class='add'>+ * bubble sort algorithm. It operates on blocks of ACL entries rather than</div><div class='add'>+ * individual entries. Each block's starting point is identified and then</div><div class='add'>+ * compared with subsequent blocks based on their priority. If the current</div><div class='add'>+ * block has a lower priority than the subsequent block, the two blocks are</div><div class='add'>+ * swapped.</div><div class='add'>+ *</div><div class='add'>+ * This is done in order to maintain an organized order of ACL entries based on</div><div class='add'>+ * priority, ensuring efficient and predictable ACL rule application.</div><div class='add'>+ *</div><div class='add'>+ * Returns:</div><div class='add'>+ *  - 0 on successful sorting of entries.</div><div class='add'>+ *  - A negative error code if any issue arises during sorting, e.g.,</div><div class='add'>+ *    if the function is unable to get the next block start.</div><div class='add'>+ */</div><div class='add'>+static int ksz9477_sort_acl_entr_no_back(struct ksz_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	struct ksz9477_acl_priv *acl = dev-&gt;ports[port].acl_priv;</div><div class='add'>+	struct ksz9477_acl_entries *acles = &amp;acl-&gt;acles;</div><div class='add'>+	struct ksz9477_acl_entry *curr, *next;</div><div class='add'>+	int i, j, ret;</div><div class='add'>+</div><div class='add'>+	/* Bubble sort */</div><div class='add'>+	for (i = 0; i &lt; KSZ9477_ACL_MAX_ENTRIES;) {</div><div class='add'>+		curr = &amp;acles-&gt;entries[i];</div><div class='add'>+</div><div class='add'>+		j = ksz9477_get_next_block_start(dev, port, i + 1);</div><div class='add'>+		if (j &lt; 0)</div><div class='add'>+			return j;</div><div class='add'>+</div><div class='add'>+		while (j &lt; KSZ9477_ACL_MAX_ENTRIES) {</div><div class='add'>+			next = &amp;acles-&gt;entries[j];</div><div class='add'>+</div><div class='add'>+			if (curr-&gt;prio &gt; next-&gt;prio) {</div><div class='add'>+				ret = ksz9477_swap_acl_blocks(dev, port, i, j);</div><div class='add'>+				if (ret)</div><div class='add'>+					return ret;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			j = ksz9477_get_next_block_start(dev, port, j + 1);</div><div class='add'>+			if (j &lt; 0)</div><div class='add'>+				return j;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		i = ksz9477_get_next_block_start(dev, port, i + 1);</div><div class='add'>+		if (i &lt; 0)</div><div class='add'>+			return i;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz9477_sort_acl_entries - Sort the ACL entries for a given port.</div><div class='add'>+ * @dev: Pointer to the KSZ device.</div><div class='add'>+ * @port: Port number.</div><div class='add'>+ *</div><div class='add'>+ * This function sorts the Access Control List (ACL) entries for a specified</div><div class='add'>+ * port. Before sorting, a backup of the original entries is created. If the</div><div class='add'>+ * sorting process fails, the function will log error messages displaying both</div><div class='add'>+ * the original and attempted sorted entries, and then restore the original</div><div class='add'>+ * entries from the backup.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 if the sorting succeeds, otherwise a negative error code.</div><div class='add'>+ */</div><div class='add'>+int ksz9477_sort_acl_entries(struct ksz_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	struct ksz9477_acl_entry backup[KSZ9477_ACL_MAX_ENTRIES];</div><div class='add'>+	struct ksz9477_acl_priv *acl = dev-&gt;ports[port].acl_priv;</div><div class='add'>+	struct ksz9477_acl_entries *acles = &amp;acl-&gt;acles;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* create a backup of the ACL entries, if something goes wrong</div><div class='add'>+	 * we can restore the ACL entries.</div><div class='add'>+	 */</div><div class='add'>+	memcpy(backup, acles-&gt;entries, sizeof(backup));</div><div class='add'>+</div><div class='add'>+	ret = ksz9477_sort_acl_entr_no_back(dev, port);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev-&gt;dev, "ACL: failed to sort entries for port %d\n",</div><div class='add'>+			port);</div><div class='add'>+		dev_err(dev-&gt;dev, "ACL dump before sorting:\n");</div><div class='add'>+		ksz9477_dump_acl(dev, backup);</div><div class='add'>+		dev_err(dev-&gt;dev, "ACL dump after sorting:\n");</div><div class='add'>+		ksz9477_dump_acl(dev, acles-&gt;entries);</div><div class='add'>+		/* Restore the original entries */</div><div class='add'>+		memcpy(acles-&gt;entries, backup, sizeof(backup));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz9477_acl_wait_ready - Waits for the ACL operation to complete on a given</div><div class='add'>+ *			    port.</div><div class='add'>+ * @dev: The ksz_device instance.</div><div class='add'>+ * @port: The port number to wait for.</div><div class='add'>+ *</div><div class='add'>+ * This function checks if the ACL write or read operation is completed by</div><div class='add'>+ * polling the specified register.</div><div class='add'>+ *</div><div class='add'>+ * Returns: 0 if the operation is successful, or a negative error code if an</div><div class='add'>+ * error occurs.</div><div class='add'>+ */</div><div class='add'>+static int ksz9477_acl_wait_ready(struct ksz_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	unsigned int wr_mask = KSZ9477_ACL_WRITE_DONE | KSZ9477_ACL_READ_DONE;</div><div class='add'>+	unsigned int val, reg;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	reg = dev-&gt;dev_ops-&gt;get_port_addr(port, KSZ9477_PORT_ACL_CTRL_0);</div><div class='add'>+</div><div class='add'>+	ret = regmap_read_poll_timeout(dev-&gt;regmap[0], reg, val,</div><div class='add'>+				       (val &amp; wr_mask) == wr_mask, 1000, 10000);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(dev-&gt;dev, "Failed to read/write ACL table\n");</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz9477_acl_entry_write - Writes an ACL entry to a given port at the</div><div class='add'>+ *			     specified index.</div><div class='add'>+ * @dev: The ksz_device instance.</div><div class='add'>+ * @port: The port number to write the ACL entry to.</div><div class='add'>+ * @entry: A pointer to the ACL entry data.</div><div class='add'>+ * @idx: The index at which to write the ACL entry.</div><div class='add'>+ *</div><div class='add'>+ * This function writes the provided ACL entry to the specified port at the</div><div class='add'>+ * given index.</div><div class='add'>+ *</div><div class='add'>+ * Returns: 0 if the operation is successful, or a negative error code if an</div><div class='add'>+ * error occurs.</div><div class='add'>+ */</div><div class='add'>+static int ksz9477_acl_entry_write(struct ksz_device *dev, int port, u8 *entry,</div><div class='add'>+				   int idx)</div><div class='add'>+{</div><div class='add'>+	int ret, i;</div><div class='add'>+	u8 val;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; KSZ9477_ACL_ENTRY_SIZE; i++) {</div><div class='add'>+		ret = ksz_pwrite8(dev, port, KSZ9477_PORT_ACL_0 + i, entry[i]);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(dev-&gt;dev, "Failed to write ACL entry %d\n", i);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* write everything down */</div><div class='add'>+	val = FIELD_PREP(KSZ9477_ACL_INDEX_M, idx) | KSZ9477_ACL_WRITE;</div><div class='add'>+	ret = ksz_pwrite8(dev, port, KSZ9477_PORT_ACL_CTRL_0, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* wait until everything is written  */</div><div class='add'>+	return ksz9477_acl_wait_ready(dev, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz9477_acl_port_enable - Enables ACL functionality on a given port.</div><div class='add'>+ * @dev: The ksz_device instance.</div><div class='add'>+ * @port: The port number on which to enable ACL functionality.</div><div class='add'>+ *</div><div class='add'>+ * This function enables ACL functionality on the specified port by configuring</div><div class='add'>+ * the appropriate control registers. It returns 0 if the operation is</div><div class='add'>+ * successful, or a negative error code if an error occurs.</div><div class='add'>+ *</div><div class='add'>+ * 0xn801 - KSZ9477S 5.2.8.2 Port Priority Control Register</div><div class='add'>+ *        Bit 7 - Highest Priority</div><div class='add'>+ *        Bit 6 - OR'ed Priority</div><div class='add'>+ *        Bit 4 - MAC Address Priority Classification</div><div class='add'>+ *        Bit 3 - VLAN Priority Classification</div><div class='add'>+ *        Bit 2 - 802.1p Priority Classification</div><div class='add'>+ *        Bit 1 - Diffserv Priority Classification</div><div class='add'>+ *        Bit 0 - ACL Priority Classification</div><div class='add'>+ *</div><div class='add'>+ * Current driver implementation sets 802.1p priority classification by default.</div><div class='add'>+ * In this function we add ACL priority classification with OR'ed priority.</div><div class='add'>+ * According to testing, priority set by ACL will supersede the 802.1p priority.</div><div class='add'>+ *</div><div class='add'>+ * 0xn803 - KSZ9477S 5.2.8.4 Port Authentication Control Register</div><div class='add'>+ *        Bit 2 - Access Control List (ACL) Enable</div><div class='add'>+ *        Bits 1:0 - Authentication Mode</div><div class='add'>+ *                00 = Reserved</div><div class='add'>+ *                01 = Block Mode. Authentication is enabled. When ACL is</div><div class='add'>+ *                     enabled, all traffic that misses the ACL rules is</div><div class='add'>+ *                     blocked; otherwise ACL actions apply.</div><div class='add'>+ *                10 = Pass Mode. Authentication is disabled. When ACL is</div><div class='add'>+ *                     enabled, all traffic that misses the ACL rules is</div><div class='add'>+ *                     forwarded; otherwise ACL actions apply.</div><div class='add'>+ *                11 = Trap Mode. Authentication is enabled. All traffic is</div><div class='add'>+ *                     forwarded to the host port. When ACL is enabled, all</div><div class='add'>+ *                     traffic that misses the ACL rules is blocked; otherwise</div><div class='add'>+ *                     ACL actions apply.</div><div class='add'>+ *</div><div class='add'>+ * We are using Pass Mode int this function.</div><div class='add'>+ *</div><div class='add'>+ * Returns: 0 if the operation is successful, or a negative error code if an</div><div class='add'>+ * error occurs.</div><div class='add'>+ */</div><div class='add'>+static int ksz9477_acl_port_enable(struct ksz_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = ksz_prmw8(dev, port, P_PRIO_CTRL, 0, PORT_ACL_PRIO_ENABLE |</div><div class='add'>+			PORT_OR_PRIO);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return ksz_pwrite8(dev, port, REG_PORT_MRI_AUTHEN_CTRL,</div><div class='add'>+			   PORT_ACL_ENABLE |</div><div class='add'>+			   FIELD_PREP(PORT_AUTHEN_MODE, PORT_AUTHEN_PASS));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz9477_acl_port_disable - Disables ACL functionality on a given port.</div><div class='add'>+ * @dev: The ksz_device instance.</div><div class='add'>+ * @port: The port number on which to disable ACL functionality.</div><div class='add'>+ *</div><div class='add'>+ * This function disables ACL functionality on the specified port by writing a</div><div class='add'>+ * value of 0 to the REG_PORT_MRI_AUTHEN_CTRL control register and remove</div><div class='add'>+ * PORT_ACL_PRIO_ENABLE bit from P_PRIO_CTRL register.</div><div class='add'>+ *</div><div class='add'>+ * Returns: 0 if the operation is successful, or a negative error code if an</div><div class='add'>+ * error occurs.</div><div class='add'>+ */</div><div class='add'>+static int ksz9477_acl_port_disable(struct ksz_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = ksz_prmw8(dev, port, P_PRIO_CTRL, PORT_ACL_PRIO_ENABLE, 0);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return ksz_pwrite8(dev, port, REG_PORT_MRI_AUTHEN_CTRL, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz9477_acl_write_list - Write a list of ACL entries to a given port.</div><div class='add'>+ * @dev: The ksz_device instance.</div><div class='add'>+ * @port: The port number on which to write ACL entries.</div><div class='add'>+ *</div><div class='add'>+ * This function enables ACL functionality on the specified port, writes a list</div><div class='add'>+ * of ACL entries to the port, and disables ACL functionality if there are no</div><div class='add'>+ * entries.</div><div class='add'>+ *</div><div class='add'>+ * Returns: 0 if the operation is successful, or a negative error code if an</div><div class='add'>+ * error occurs.</div><div class='add'>+ */</div><div class='add'>+int ksz9477_acl_write_list(struct ksz_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	struct ksz9477_acl_priv *acl = dev-&gt;ports[port].acl_priv;</div><div class='add'>+	struct ksz9477_acl_entries *acles = &amp;acl-&gt;acles;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	/* ACL should be enabled before writing entries */</div><div class='add'>+	ret = ksz9477_acl_port_enable(dev, port);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* write all entries */</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(acles-&gt;entries); i++) {</div><div class='add'>+		u8 *entry = acles-&gt;entries[i].entry;</div><div class='add'>+</div><div class='add'>+		/* Check if entry was removed and should be zeroed.</div><div class='add'>+		 * If last fields of the entry are not zero, it means</div><div class='add'>+		 * it is removed locally but currently not synced with the HW.</div><div class='add'>+		 * So, we will write it down to the HW to remove it.</div><div class='add'>+		 */</div><div class='add'>+		if (i &gt;= acles-&gt;entries_count &amp;&amp;</div><div class='add'>+		    entry[KSZ9477_ACL_PORT_ACCESS_10] == 0 &amp;&amp;</div><div class='add'>+		    entry[KSZ9477_ACL_PORT_ACCESS_11] == 0)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		ret = ksz9477_acl_entry_write(dev, port, entry, i);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		/* now removed entry is clean on HW side, so it can</div><div class='add'>+		 * in the cache too</div><div class='add'>+		 */</div><div class='add'>+		if (i &gt;= acles-&gt;entries_count &amp;&amp;</div><div class='add'>+		    entry[KSZ9477_ACL_PORT_ACCESS_10] != 0 &amp;&amp;</div><div class='add'>+		    entry[KSZ9477_ACL_PORT_ACCESS_11] != 0) {</div><div class='add'>+			entry[KSZ9477_ACL_PORT_ACCESS_10] = 0;</div><div class='add'>+			entry[KSZ9477_ACL_PORT_ACCESS_11] = 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!acles-&gt;entries_count)</div><div class='add'>+		return ksz9477_acl_port_disable(dev, port);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz9477_acl_remove_entries - Remove ACL entries with a given cookie from a</div><div class='add'>+ *                              specified ksz9477_acl_entries structure.</div><div class='add'>+ * @dev: The ksz_device instance.</div><div class='add'>+ * @port: The port number on which to remove ACL entries.</div><div class='add'>+ * @acles: The ksz9477_acl_entries instance.</div><div class='add'>+ * @cookie: The cookie value to match for entry removal.</div><div class='add'>+ *</div><div class='add'>+ * This function iterates through the entries array, removing any entries with</div><div class='add'>+ * a matching cookie value. The remaining entries are then shifted down to fill</div><div class='add'>+ * the gap.</div><div class='add'>+ */</div><div class='add'>+void ksz9477_acl_remove_entries(struct ksz_device *dev, int port,</div><div class='add'>+				struct ksz9477_acl_entries *acles,</div><div class='add'>+				unsigned long cookie)</div><div class='add'>+{</div><div class='add'>+	int entries_count = acles-&gt;entries_count;</div><div class='add'>+	int ret, i, src_count;</div><div class='add'>+	int src_idx = -1;</div><div class='add'>+</div><div class='add'>+	if (!entries_count)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Search for the first position with the cookie */</div><div class='add'>+	for (i = 0; i &lt; entries_count; i++) {</div><div class='add'>+		if (acles-&gt;entries[i].cookie == cookie) {</div><div class='add'>+			src_idx = i;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* No entries with the matching cookie found */</div><div class='add'>+	if (src_idx == -1)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Get the size of the cookie entry. We may have complex entries. */</div><div class='add'>+	src_count = ksz9477_acl_get_cont_entr(dev, port, src_idx);</div><div class='add'>+	if (src_count &lt;= 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Move all entries down to overwrite removed entry with the cookie */</div><div class='add'>+	ret = ksz9477_move_entries_downwards(dev, acles, src_idx,</div><div class='add'>+					     src_count,</div><div class='add'>+					     entries_count - src_count);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev-&gt;dev, "Failed to move ACL entries down\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Overwrite new empty places at the end of the list with zeros to make</div><div class='add'>+	 * sure not unexpected things will happen or no unexplored quirks will</div><div class='add'>+	 * come out.</div><div class='add'>+	 */</div><div class='add'>+	for (i = entries_count - src_count; i &lt; entries_count; i++) {</div><div class='add'>+		struct ksz9477_acl_entry *entry = &amp;acles-&gt;entries[i];</div><div class='add'>+</div><div class='add'>+		memset(entry, 0, sizeof(*entry));</div><div class='add'>+</div><div class='add'>+		/* Set all access bits to be able to write zeroed entry to HW */</div><div class='add'>+		entry-&gt;entry[KSZ9477_ACL_PORT_ACCESS_10] = 0xff;</div><div class='add'>+		entry-&gt;entry[KSZ9477_ACL_PORT_ACCESS_11] = 0xff;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Adjust the total entries count */</div><div class='add'>+	acles-&gt;entries_count -= src_count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz9477_port_acl_init - Initialize the ACL for a specified port on a ksz</div><div class='add'>+ *			   device.</div><div class='add'>+ * @dev: The ksz_device instance.</div><div class='add'>+ * @port: The port number to initialize the ACL for.</div><div class='add'>+ *</div><div class='add'>+ * This function allocates memory for an acl structure, associates it with the</div><div class='add'>+ * specified port, and initializes the ACL entries to a default state. The</div><div class='add'>+ * entries are then written using the ksz9477_acl_write_list function, ensuring</div><div class='add'>+ * the ACL has a predictable initial hardware state.</div><div class='add'>+ *</div><div class='add'>+ * Returns: 0 on success, or an error code on failure.</div><div class='add'>+ */</div><div class='add'>+int ksz9477_port_acl_init(struct ksz_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	struct ksz9477_acl_entries *acles;</div><div class='add'>+	struct ksz9477_acl_priv *acl;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	acl = kzalloc(sizeof(*acl), GFP_KERNEL);</div><div class='add'>+	if (!acl)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	dev-&gt;ports[port].acl_priv = acl;</div><div class='add'>+</div><div class='add'>+	acles = &amp;acl-&gt;acles;</div><div class='add'>+	/* write all entries */</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(acles-&gt;entries); i++) {</div><div class='add'>+		u8 *entry = acles-&gt;entries[i].entry;</div><div class='add'>+</div><div class='add'>+		/* Set all access bits to be able to write zeroed</div><div class='add'>+		 * entry</div><div class='add'>+		 */</div><div class='add'>+		entry[KSZ9477_ACL_PORT_ACCESS_10] = 0xff;</div><div class='add'>+		entry[KSZ9477_ACL_PORT_ACCESS_11] = 0xff;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ksz9477_acl_write_list(dev, port);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto free_acl;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+free_acl:</div><div class='add'>+	kfree(dev-&gt;ports[port].acl_priv);</div><div class='add'>+	dev-&gt;ports[port].acl_priv = NULL;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz9477_port_acl_free - Free the ACL resources for a specified port on a ksz</div><div class='add'>+ *			   device.</div><div class='add'>+ * @dev: The ksz_device instance.</div><div class='add'>+ * @port: The port number to initialize the ACL for.</div><div class='add'>+ *</div><div class='add'>+ * This disables the ACL for the specified port and frees the associated memory,</div><div class='add'>+ */</div><div class='add'>+void ksz9477_port_acl_free(struct ksz_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	if (!dev-&gt;ports[port].acl_priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ksz9477_acl_port_disable(dev, port);</div><div class='add'>+</div><div class='add'>+	kfree(dev-&gt;ports[port].acl_priv);</div><div class='add'>+	dev-&gt;ports[port].acl_priv = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz9477_acl_set_reg - Set entry[16] and entry[17] depending on the updated</div><div class='add'>+ *			   entry[]</div><div class='add'>+ * @entry: An array containing the entries</div><div class='add'>+ * @reg: The register of the entry that needs to be updated</div><div class='add'>+ * @value: The value to be assigned to the updated entry</div><div class='add'>+ *</div><div class='add'>+ * This function updates the entry[] array based on the provided register and</div><div class='add'>+ * value. It also sets entry[0x10] and entry[0x11] according to the ACL byte</div><div class='add'>+ * enable rules.</div><div class='add'>+ *</div><div class='add'>+ * 0x10 - Byte Enable [15:8]</div><div class='add'>+ *</div><div class='add'>+ * Each bit enables accessing one of the ACL bytes when a read or write is</div><div class='add'>+ * initiated by writing to the Port ACL Byte Enable LSB Register.</div><div class='add'>+ * Bit 0 applies to the Port ACL Access 7 Register</div><div class='add'>+ * Bit 1 applies to the Port ACL Access 6 Register, etc.</div><div class='add'>+ * Bit 7 applies to the Port ACL Access 0 Register</div><div class='add'>+ * 1 = Byte is selected for read/write</div><div class='add'>+ * 0 = Byte is not selected</div><div class='add'>+ *</div><div class='add'>+ * 0x11 - Byte Enable [7:0]</div><div class='add'>+ *</div><div class='add'>+ * Each bit enables accessing one of the ACL bytes when a read or write is</div><div class='add'>+ * initiated by writing to the Port ACL Byte Enable LSB Register.</div><div class='add'>+ * Bit 0 applies to the Port ACL Access F Register</div><div class='add'>+ * Bit 1 applies to the Port ACL Access E Register, etc.</div><div class='add'>+ * Bit 7 applies to the Port ACL Access 8 Register</div><div class='add'>+ * 1 = Byte is selected for read/write</div><div class='add'>+ * 0 = Byte is not selected</div><div class='add'>+ */</div><div class='add'>+static void ksz9477_acl_set_reg(u8 *entry, enum ksz9477_acl_port_access reg,</div><div class='add'>+				u8 value)</div><div class='add'>+{</div><div class='add'>+	if (reg &gt;= KSZ9477_ACL_PORT_ACCESS_0 &amp;&amp;</div><div class='add'>+	    reg &lt;= KSZ9477_ACL_PORT_ACCESS_7) {</div><div class='add'>+		entry[KSZ9477_ACL_PORT_ACCESS_10] |=</div><div class='add'>+				BIT(KSZ9477_ACL_PORT_ACCESS_7 - reg);</div><div class='add'>+	} else if (reg &gt;= KSZ9477_ACL_PORT_ACCESS_8 &amp;&amp;</div><div class='add'>+		   reg &lt;= KSZ9477_ACL_PORT_ACCESS_F) {</div><div class='add'>+		entry[KSZ9477_ACL_PORT_ACCESS_11] |=</div><div class='add'>+			BIT(KSZ9477_ACL_PORT_ACCESS_F - reg);</div><div class='add'>+	} else {</div><div class='add'>+		WARN_ON(1);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	entry[reg] = value;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz9477_acl_matching_rule_cfg_l2 - Configure an ACL filtering entry to match</div><div class='add'>+ *				      L2 types of Ethernet frames</div><div class='add'>+ * @entry: Pointer to ACL entry buffer</div><div class='add'>+ * @ethertype: Ethertype value</div><div class='add'>+ * @eth_addr: Pointer to Ethernet address</div><div class='add'>+ * @is_src: If true, match the source MAC address; if false, match the</div><div class='add'>+ *	    destination MAC address</div><div class='add'>+ *</div><div class='add'>+ * This function configures an Access Control List (ACL) filtering</div><div class='add'>+ * entry to match Layer 2 types of Ethernet frames based on the provided</div><div class='add'>+ * ethertype and Ethernet address. Additionally, it can match either the source</div><div class='add'>+ * or destination MAC address depending on the value of the is_src parameter.</div><div class='add'>+ *</div><div class='add'>+ * Register Descriptions for MD = 01 and ENB != 00 (Layer 2 MAC header</div><div class='add'>+ * filtering)</div><div class='add'>+ *</div><div class='add'>+ * 0x01 - Mode and Enable</div><div class='add'>+ *        Bits 5:4 - MD (Mode)</div><div class='add'>+ *                01 = Layer 2 MAC header or counter filtering</div><div class='add'>+ *        Bits 3:2 - ENB (Enable)</div><div class='add'>+ *                01 = Comparison is performed only on the TYPE value</div><div class='add'>+ *                10 = Comparison is performed only on the MAC Address value</div><div class='add'>+ *                11 = Both the MAC Address and TYPE are tested</div><div class='add'>+ *        Bit  1   - S/D (Source / Destination)</div><div class='add'>+ *                0 = Destination address</div><div class='add'>+ *                1 = Source address</div><div class='add'>+ *        Bit  0   - EQ (Equal / Not Equal)</div><div class='add'>+ *                0 = Not Equal produces true result</div><div class='add'>+ *                1 = Equal produces true result</div><div class='add'>+ *</div><div class='add'>+ * 0x02-0x07 - MAC Address</div><div class='add'>+ *        0x02 - MAC Address [47:40]</div><div class='add'>+ *        0x03 - MAC Address [39:32]</div><div class='add'>+ *        0x04 - MAC Address [31:24]</div><div class='add'>+ *        0x05 - MAC Address [23:16]</div><div class='add'>+ *        0x06 - MAC Address [15:8]</div><div class='add'>+ *        0x07 - MAC Address [7:0]</div><div class='add'>+ *</div><div class='add'>+ * 0x08-0x09 - EtherType</div><div class='add'>+ *        0x08 - EtherType [15:8]</div><div class='add'>+ *        0x09 - EtherType [7:0]</div><div class='add'>+ */</div><div class='add'>+static void ksz9477_acl_matching_rule_cfg_l2(u8 *entry, u16 ethertype,</div><div class='add'>+					     u8 *eth_addr, bool is_src)</div><div class='add'>+{</div><div class='add'>+	u8 enb = 0;</div><div class='add'>+	u8 val;</div><div class='add'>+</div><div class='add'>+	if (ethertype)</div><div class='add'>+		enb |= KSZ9477_ACL_ENB_L2_TYPE;</div><div class='add'>+	if (eth_addr)</div><div class='add'>+		enb |= KSZ9477_ACL_ENB_L2_MAC;</div><div class='add'>+</div><div class='add'>+	val = FIELD_PREP(KSZ9477_ACL_MD_MASK, KSZ9477_ACL_MD_L2_MAC) |</div><div class='add'>+	      FIELD_PREP(KSZ9477_ACL_ENB_MASK, enb) |</div><div class='add'>+	      FIELD_PREP(KSZ9477_ACL_SD_SRC, is_src) | KSZ9477_ACL_EQ_EQUAL;</div><div class='add'>+	ksz9477_acl_set_reg(entry, KSZ9477_ACL_PORT_ACCESS_1, val);</div><div class='add'>+</div><div class='add'>+	if (eth_addr) {</div><div class='add'>+		int i;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; ETH_ALEN; i++) {</div><div class='add'>+			ksz9477_acl_set_reg(entry,</div><div class='add'>+					    KSZ9477_ACL_PORT_ACCESS_2 + i,</div><div class='add'>+					    eth_addr[i]);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ksz9477_acl_set_reg(entry, KSZ9477_ACL_PORT_ACCESS_8, ethertype &gt;&gt; 8);</div><div class='add'>+	ksz9477_acl_set_reg(entry, KSZ9477_ACL_PORT_ACCESS_9, ethertype &amp; 0xff);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz9477_acl_action_rule_cfg - Set action for an ACL entry</div><div class='add'>+ * @entry: Pointer to the ACL entry</div><div class='add'>+ * @force_prio: If true, force the priority value</div><div class='add'>+ * @prio_val: Priority value</div><div class='add'>+ *</div><div class='add'>+ * This function sets the action for the specified ACL entry. It prepares</div><div class='add'>+ * the priority mode and traffic class values and updates the entry's</div><div class='add'>+ * action registers accordingly. Currently, there is no port or VLAN PCP</div><div class='add'>+ * remapping.</div><div class='add'>+ *</div><div class='add'>+ * ACL Action Rule Parameters for Non-Count Modes (MD ≠ 01 or ENB ≠ 00)</div><div class='add'>+ *</div><div class='add'>+ * 0x0A - PM, P, RPE, RP[2:1]</div><div class='add'>+ *        Bits 7:6 - PM[1:0] - Priority Mode</div><div class='add'>+ *		00 = ACL does not specify the packet priority. Priority is</div><div class='add'>+ *		     determined by standard QoS functions.</div><div class='add'>+ *		01 = Change packet priority to P[2:0] if it is greater than QoS</div><div class='add'>+ *		     result.</div><div class='add'>+ *		10 = Change packet priority to P[2:0] if it is smaller than the</div><div class='add'>+ *		     QoS result.</div><div class='add'>+ *		11 = Always change packet priority to P[2:0].</div><div class='add'>+ *        Bits 5:3 - P[2:0] - Priority value</div><div class='add'>+ *        Bit  2   - RPE - Remark Priority Enable</div><div class='add'>+ *        Bits 1:0 - RP[2:1] - Remarked Priority value (bits 2:1)</div><div class='add'>+ *		0 = Disable priority remarking</div><div class='add'>+ *		1 = Enable priority remarking. VLAN tag priority (PCP) bits are</div><div class='add'>+ *		    replaced by RP[2:0].</div><div class='add'>+ *</div><div class='add'>+ * 0x0B - RP[0], MM</div><div class='add'>+ *        Bit  7   - RP[0] - Remarked Priority value (bit 0)</div><div class='add'>+ *        Bits 6:5 - MM[1:0] - Map Mode</div><div class='add'>+ *		00 = No forwarding remapping</div><div class='add'>+ *		01 = The forwarding map in FORWARD is OR'ed with the forwarding</div><div class='add'>+ *		     map from the Address Lookup Table.</div><div class='add'>+ *		10 = The forwarding map in FORWARD is AND'ed with the forwarding</div><div class='add'>+ *		     map from the Address Lookup Table.</div><div class='add'>+ *		11 = The forwarding map in FORWARD replaces the forwarding map</div><div class='add'>+ *		     from the Address Lookup Table.</div><div class='add'>+ * 0x0D - FORWARD[n:0]</div><div class='add'>+ *       Bits 7:0 - FORWARD[n:0] - Forwarding map. Bit 0 = port 1,</div><div class='add'>+ *		    bit 1 = port 2, etc.</div><div class='add'>+ *		1 = enable forwarding to this port</div><div class='add'>+ *		0 = do not forward to this port</div><div class='add'>+ */</div><div class='add'>+void ksz9477_acl_action_rule_cfg(u8 *entry, bool force_prio, u8 prio_val)</div><div class='add'>+{</div><div class='add'>+	u8 prio_mode, val;</div><div class='add'>+</div><div class='add'>+	if (force_prio)</div><div class='add'>+		prio_mode = KSZ9477_ACL_PM_REPLACE;</div><div class='add'>+	else</div><div class='add'>+		prio_mode = KSZ9477_ACL_PM_DISABLE;</div><div class='add'>+</div><div class='add'>+	val = FIELD_PREP(KSZ9477_ACL_PM_M, prio_mode) |</div><div class='add'>+	      FIELD_PREP(KSZ9477_ACL_P_M, prio_val);</div><div class='add'>+	ksz9477_acl_set_reg(entry, KSZ9477_ACL_PORT_ACCESS_A, val);</div><div class='add'>+</div><div class='add'>+	/* no port or VLAN PCP remapping for now */</div><div class='add'>+	ksz9477_acl_set_reg(entry, KSZ9477_ACL_PORT_ACCESS_B, 0);</div><div class='add'>+	ksz9477_acl_set_reg(entry, KSZ9477_ACL_PORT_ACCESS_D, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz9477_acl_processing_rule_set_action - Set the action for the processing</div><div class='add'>+ *					    rule set.</div><div class='add'>+ * @entry: Pointer to the ACL entry</div><div class='add'>+ * @action_idx: Index of the action to be applied</div><div class='add'>+ *</div><div class='add'>+ * This function sets the action for the processing rule set by updating the</div><div class='add'>+ * appropriate register in the entry. There can be only one action per</div><div class='add'>+ * processing rule.</div><div class='add'>+ *</div><div class='add'>+ * Access Control List (ACL) Processing Rule Registers:</div><div class='add'>+ *</div><div class='add'>+ * 0x00 - First Rule Number (FRN)</div><div class='add'>+ *        Bits 3:0 - First Rule Number. Pointer to an Action rule entry.</div><div class='add'>+ */</div><div class='add'>+void ksz9477_acl_processing_rule_set_action(u8 *entry, u8 action_idx)</div><div class='add'>+{</div><div class='add'>+	ksz9477_acl_set_reg(entry, KSZ9477_ACL_PORT_ACCESS_0, action_idx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz9477_acl_processing_rule_add_match - Add a matching rule to the rule set</div><div class='add'>+ * @entry: Pointer to the ACL entry</div><div class='add'>+ * @match_idx: Index of the matching rule to be added</div><div class='add'>+ *</div><div class='add'>+ * This function adds a matching rule to the rule set by updating the</div><div class='add'>+ * appropriate bits in the entry's rule set registers.</div><div class='add'>+ *</div><div class='add'>+ * Access Control List (ACL) Processing Rule Registers:</div><div class='add'>+ *</div><div class='add'>+ * 0x0E - RuleSet [15:8]</div><div class='add'>+ *        Bits 7:0 - RuleSet [15:8] Specifies a set of one or more Matching rule</div><div class='add'>+ *        entries. RuleSet has one bit for each of the 16 Matching rule entries.</div><div class='add'>+ *        If multiple Matching rules are selected, then all conditions will be</div><div class='add'>+ *	  AND'ed to produce a final match result.</div><div class='add'>+ *		0 = Matching rule not selected</div><div class='add'>+ *		1 = Matching rule selected</div><div class='add'>+ *</div><div class='add'>+ * 0x0F - RuleSet [7:0]</div><div class='add'>+ *        Bits 7:0 - RuleSet [7:0]</div><div class='add'>+ */</div><div class='add'>+static void ksz9477_acl_processing_rule_add_match(u8 *entry, u8 match_idx)</div><div class='add'>+{</div><div class='add'>+	u8 vale = entry[KSZ9477_ACL_PORT_ACCESS_E];</div><div class='add'>+	u8 valf = entry[KSZ9477_ACL_PORT_ACCESS_F];</div><div class='add'>+</div><div class='add'>+	if (match_idx &lt; 8)</div><div class='add'>+		valf |= BIT(match_idx);</div><div class='add'>+	else</div><div class='add'>+		vale |= BIT(match_idx - 8);</div><div class='add'>+</div><div class='add'>+	ksz9477_acl_set_reg(entry, KSZ9477_ACL_PORT_ACCESS_E, vale);</div><div class='add'>+	ksz9477_acl_set_reg(entry, KSZ9477_ACL_PORT_ACCESS_F, valf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz9477_acl_get_init_entry - Get a new uninitialized entry for a specified</div><div class='add'>+ *				port on a ksz_device.</div><div class='add'>+ * @dev: The ksz_device instance.</div><div class='add'>+ * @port: The port number to get the uninitialized entry for.</div><div class='add'>+ * @cookie: The cookie to associate with the entry.</div><div class='add'>+ * @prio: The priority to associate with the entry.</div><div class='add'>+ *</div><div class='add'>+ * This function retrieves the next available ACL entry for the specified port,</div><div class='add'>+ * clears all access flags, and associates it with the current cookie.</div><div class='add'>+ *</div><div class='add'>+ * Returns: A pointer to the new uninitialized ACL entry.</div><div class='add'>+ */</div><div class='add'>+static struct ksz9477_acl_entry *</div><div class='add'>+ksz9477_acl_get_init_entry(struct ksz_device *dev, int port,</div><div class='add'>+			   unsigned long cookie, u32 prio)</div><div class='add'>+{</div><div class='add'>+	struct ksz9477_acl_priv *acl = dev-&gt;ports[port].acl_priv;</div><div class='add'>+	struct ksz9477_acl_entries *acles = &amp;acl-&gt;acles;</div><div class='add'>+	struct ksz9477_acl_entry *entry;</div><div class='add'>+</div><div class='add'>+	entry = &amp;acles-&gt;entries[acles-&gt;entries_count];</div><div class='add'>+	entry-&gt;cookie = cookie;</div><div class='add'>+	entry-&gt;prio = prio;</div><div class='add'>+</div><div class='add'>+	/* clear all access flags */</div><div class='add'>+	entry-&gt;entry[KSZ9477_ACL_PORT_ACCESS_10] = 0;</div><div class='add'>+	entry-&gt;entry[KSZ9477_ACL_PORT_ACCESS_11] = 0;</div><div class='add'>+</div><div class='add'>+	return entry;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz9477_acl_match_process_l2 - Configure Layer 2 ACL matching rules and</div><div class='add'>+ *                                processing rules.</div><div class='add'>+ * @dev: Pointer to the ksz_device.</div><div class='add'>+ * @port: Port number.</div><div class='add'>+ * @ethtype: Ethernet type.</div><div class='add'>+ * @src_mac: Source MAC address.</div><div class='add'>+ * @dst_mac: Destination MAC address.</div><div class='add'>+ * @cookie: The cookie to associate with the entry.</div><div class='add'>+ * @prio: The priority of the entry.</div><div class='add'>+ *</div><div class='add'>+ * This function sets up matching and processing rules for Layer 2 ACLs.</div><div class='add'>+ * It takes into account that only one MAC per entry is supported.</div><div class='add'>+ */</div><div class='add'>+void ksz9477_acl_match_process_l2(struct ksz_device *dev, int port,</div><div class='add'>+				  u16 ethtype, u8 *src_mac, u8 *dst_mac,</div><div class='add'>+				  unsigned long cookie, u32 prio)</div><div class='add'>+{</div><div class='add'>+	struct ksz9477_acl_priv *acl = dev-&gt;ports[port].acl_priv;</div><div class='add'>+	struct ksz9477_acl_entries *acles = &amp;acl-&gt;acles;</div><div class='add'>+	struct ksz9477_acl_entry *entry;</div><div class='add'>+</div><div class='add'>+	entry = ksz9477_acl_get_init_entry(dev, port, cookie, prio);</div><div class='add'>+</div><div class='add'>+	/* ACL supports only one MAC per entry */</div><div class='add'>+	if (src_mac &amp;&amp; dst_mac) {</div><div class='add'>+		ksz9477_acl_matching_rule_cfg_l2(entry-&gt;entry, ethtype, src_mac,</div><div class='add'>+						 true);</div><div class='add'>+</div><div class='add'>+		/* Add both match entries to first processing rule */</div><div class='add'>+		ksz9477_acl_processing_rule_add_match(entry-&gt;entry,</div><div class='add'>+						      acles-&gt;entries_count);</div><div class='add'>+		acles-&gt;entries_count++;</div><div class='add'>+		ksz9477_acl_processing_rule_add_match(entry-&gt;entry,</div><div class='add'>+						      acles-&gt;entries_count);</div><div class='add'>+</div><div class='add'>+		entry = ksz9477_acl_get_init_entry(dev, port, cookie, prio);</div><div class='add'>+		ksz9477_acl_matching_rule_cfg_l2(entry-&gt;entry, 0, dst_mac,</div><div class='add'>+						 false);</div><div class='add'>+		acles-&gt;entries_count++;</div><div class='add'>+	} else {</div><div class='add'>+		u8 *mac = src_mac ? src_mac : dst_mac;</div><div class='add'>+		bool is_src = src_mac ? true : false;</div><div class='add'>+</div><div class='add'>+		ksz9477_acl_matching_rule_cfg_l2(entry-&gt;entry, ethtype, mac,</div><div class='add'>+						 is_src);</div><div class='add'>+		ksz9477_acl_processing_rule_add_match(entry-&gt;entry,</div><div class='add'>+						      acles-&gt;entries_count);</div><div class='add'>+		acles-&gt;entries_count++;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/dsa/microchip/ksz9477_i2c.c b/drivers/net/dsa/microchip/ksz9477_i2c.c<br/>new file mode 100644<br/>index 000000000000..a2beb27459f1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz9477_i2c.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/ksz9477_i2c.c</a></div><div class='hunk'>@@ -0,0 +1,149 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Microchip KSZ9477 series register access through I2C</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2018-2024 Microchip Technology Inc.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/i2c.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ksz_common.h"</div><div class='add'>+</div><div class='add'>+KSZ_REGMAP_TABLE(ksz9477, not_used, 16, 0, 0);</div><div class='add'>+</div><div class='add'>+static int ksz9477_i2c_probe(struct i2c_client *i2c)</div><div class='add'>+{</div><div class='add'>+	const struct ksz_chip_data *chip;</div><div class='add'>+	struct device *ddev = &amp;i2c-&gt;dev;</div><div class='add'>+	struct regmap_config rc;</div><div class='add'>+	struct ksz_device *dev;</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	dev = ksz_switch_alloc(&amp;i2c-&gt;dev, i2c);</div><div class='add'>+	if (!dev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	chip = device_get_match_data(ddev);</div><div class='add'>+	if (!chip)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Save chip id to do special initialization when probing. */</div><div class='add'>+	dev-&gt;chip_id = chip-&gt;chip_id;</div><div class='add'>+	for (i = 0; i &lt; __KSZ_NUM_REGMAPS; i++) {</div><div class='add'>+		rc = ksz9477_regmap_config[i];</div><div class='add'>+		rc.lock_arg = &amp;dev-&gt;regmap_mutex;</div><div class='add'>+		dev-&gt;regmap[i] = devm_regmap_init_i2c(i2c, &amp;rc);</div><div class='add'>+		if (IS_ERR(dev-&gt;regmap[i])) {</div><div class='add'>+			return dev_err_probe(&amp;i2c-&gt;dev, PTR_ERR(dev-&gt;regmap[i]),</div><div class='add'>+					     "Failed to initialize regmap%i\n",</div><div class='add'>+					     ksz9477_regmap_config[i].val_bits);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (i2c-&gt;dev.platform_data)</div><div class='add'>+		dev-&gt;pdata = i2c-&gt;dev.platform_data;</div><div class='add'>+</div><div class='add'>+	dev-&gt;irq = i2c-&gt;irq;</div><div class='add'>+</div><div class='add'>+	ret = ksz_switch_register(dev);</div><div class='add'>+</div><div class='add'>+	/* Main DSA driver may not be started yet. */</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	i2c_set_clientdata(i2c, dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz9477_i2c_remove(struct i2c_client *i2c)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = i2c_get_clientdata(i2c);</div><div class='add'>+</div><div class='add'>+	if (dev)</div><div class='add'>+		ksz_switch_remove(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz9477_i2c_shutdown(struct i2c_client *i2c)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = i2c_get_clientdata(i2c);</div><div class='add'>+</div><div class='add'>+	if (!dev)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ksz_switch_shutdown(dev);</div><div class='add'>+</div><div class='add'>+	i2c_set_clientdata(i2c, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct i2c_device_id ksz9477_i2c_id[] = {</div><div class='add'>+	{ "ksz9477-switch" },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+MODULE_DEVICE_TABLE(i2c, ksz9477_i2c_id);</div><div class='add'>+</div><div class='add'>+static const struct of_device_id ksz9477_dt_ids[] = {</div><div class='add'>+	{</div><div class='add'>+		.compatible = "microchip,ksz9477",</div><div class='add'>+		.data = &amp;ksz_switch_chips[KSZ9477]</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "microchip,ksz9896",</div><div class='add'>+		.data = &amp;ksz_switch_chips[KSZ9896]</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "microchip,ksz9897",</div><div class='add'>+		.data = &amp;ksz_switch_chips[KSZ9897]</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "microchip,ksz9893",</div><div class='add'>+		.data = &amp;ksz_switch_chips[KSZ9893]</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "microchip,ksz9563",</div><div class='add'>+		.data = &amp;ksz_switch_chips[KSZ9563]</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "microchip,ksz8563",</div><div class='add'>+		.data = &amp;ksz_switch_chips[KSZ8563]</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "microchip,ksz8567",</div><div class='add'>+		.data = &amp;ksz_switch_chips[KSZ8567]</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "microchip,ksz9567",</div><div class='add'>+		.data = &amp;ksz_switch_chips[KSZ9567]</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "microchip,lan9646",</div><div class='add'>+		.data = &amp;ksz_switch_chips[LAN9646]</div><div class='add'>+	},</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, ksz9477_dt_ids);</div><div class='add'>+</div><div class='add'>+static DEFINE_SIMPLE_DEV_PM_OPS(ksz_i2c_pm_ops,</div><div class='add'>+				ksz_switch_suspend, ksz_switch_resume);</div><div class='add'>+</div><div class='add'>+static struct i2c_driver ksz9477_i2c_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name	= "ksz9477-switch",</div><div class='add'>+		.of_match_table = ksz9477_dt_ids,</div><div class='add'>+		.pm = &amp;ksz_i2c_pm_ops,</div><div class='add'>+	},</div><div class='add'>+	.probe = ksz9477_i2c_probe,</div><div class='add'>+	.remove	= ksz9477_i2c_remove,</div><div class='add'>+	.shutdown = ksz9477_i2c_shutdown,</div><div class='add'>+	.id_table = ksz9477_i2c_id,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_i2c_driver(ksz9477_i2c_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Tristram Ha &lt;Tristram.Ha@microchip.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Microchip KSZ9477 Series Switch I2C access Driver");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/net/dsa/microchip/ksz9477_reg.h b/drivers/net/dsa/microchip/ksz9477_reg.h<br/>new file mode 100644<br/>index 000000000000..61ea11e3338e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz9477_reg.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/ksz9477_reg.h</a></div><div class='hunk'>@@ -0,0 +1,1571 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/*</div><div class='add'>+ * Microchip KSZ9477 register definitions</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2017-2025 Microchip Technology Inc.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __KSZ9477_REGS_H</div><div class='add'>+#define __KSZ9477_REGS_H</div><div class='add'>+</div><div class='add'>+#define KS_PRIO_M			0x7</div><div class='add'>+#define KS_PRIO_S			4</div><div class='add'>+</div><div class='add'>+/* 0 - Operation */</div><div class='add'>+#define REG_CHIP_ID0__1			0x0000</div><div class='add'>+</div><div class='add'>+#define REG_CHIP_ID1__1			0x0001</div><div class='add'>+</div><div class='add'>+#define FAMILY_ID			0x95</div><div class='add'>+#define FAMILY_ID_94			0x94</div><div class='add'>+#define FAMILY_ID_95			0x95</div><div class='add'>+#define FAMILY_ID_85			0x85</div><div class='add'>+#define FAMILY_ID_98			0x98</div><div class='add'>+#define FAMILY_ID_88			0x88</div><div class='add'>+</div><div class='add'>+#define REG_CHIP_ID2__1			0x0002</div><div class='add'>+</div><div class='add'>+#define CHIP_ID_66			0x66</div><div class='add'>+#define CHIP_ID_67			0x67</div><div class='add'>+#define CHIP_ID_77			0x77</div><div class='add'>+#define CHIP_ID_93			0x93</div><div class='add'>+#define CHIP_ID_96			0x96</div><div class='add'>+#define CHIP_ID_97			0x97</div><div class='add'>+</div><div class='add'>+#define REG_CHIP_ID3__1			0x0003</div><div class='add'>+</div><div class='add'>+#define SWITCH_REVISION_M		0x0F</div><div class='add'>+#define SWITCH_REVISION_S		4</div><div class='add'>+#define SWITCH_RESET			0x01</div><div class='add'>+</div><div class='add'>+#define REG_GLOBAL_OPTIONS		0x000F</div><div class='add'>+</div><div class='add'>+#define SW_GIGABIT_ABLE			BIT(6)</div><div class='add'>+#define SW_REDUNDANCY_ABLE		BIT(5)</div><div class='add'>+#define SW_AVB_ABLE			BIT(4)</div><div class='add'>+#define SW_9567_RL_5_2			0xC</div><div class='add'>+#define SW_9477_SL_5_2			0xD</div><div class='add'>+</div><div class='add'>+#define SW_9896_GL_5_1			0xB</div><div class='add'>+#define SW_9896_RL_5_1			0x8</div><div class='add'>+#define SW_9896_SL_5_1			0x9</div><div class='add'>+</div><div class='add'>+#define SW_9895_GL_4_1			0x7</div><div class='add'>+#define SW_9895_RL_4_1			0x4</div><div class='add'>+#define SW_9895_SL_4_1			0x5</div><div class='add'>+</div><div class='add'>+#define SW_9896_RL_4_2			0x6</div><div class='add'>+</div><div class='add'>+#define SW_9893_RL_2_1			0x0</div><div class='add'>+#define SW_9893_SL_2_1			0x1</div><div class='add'>+#define SW_9893_GL_2_1			0x3</div><div class='add'>+</div><div class='add'>+#define SW_QW_ABLE			BIT(5)</div><div class='add'>+#define SW_9893_RN_2_1			0xC</div><div class='add'>+</div><div class='add'>+#define REG_SW_INT_STATUS__4		0x0010</div><div class='add'>+#define REG_SW_INT_MASK__4		0x0014</div><div class='add'>+</div><div class='add'>+#define LUE_INT				BIT(31)</div><div class='add'>+#define TRIG_TS_INT			BIT(30)</div><div class='add'>+#define APB_TIMEOUT_INT			BIT(29)</div><div class='add'>+</div><div class='add'>+#define SWITCH_INT_MASK			(TRIG_TS_INT | APB_TIMEOUT_INT)</div><div class='add'>+</div><div class='add'>+#define REG_SW_PORT_INT_STATUS__4	0x0018</div><div class='add'>+#define REG_SW_PORT_INT_MASK__4		0x001C</div><div class='add'>+#define REG_SW_PHY_INT_STATUS		0x0020</div><div class='add'>+#define REG_SW_PHY_INT_ENABLE		0x0024</div><div class='add'>+</div><div class='add'>+/* 1 - Global */</div><div class='add'>+#define REG_SW_GLOBAL_SERIAL_CTRL_0	0x0100</div><div class='add'>+#define SW_SPARE_REG_2			BIT(7)</div><div class='add'>+#define SW_SPARE_REG_1			BIT(6)</div><div class='add'>+#define SW_SPARE_REG_0			BIT(5)</div><div class='add'>+#define SW_BIG_ENDIAN			BIT(4)</div><div class='add'>+#define SPI_AUTO_EDGE_DETECTION		BIT(1)</div><div class='add'>+#define SPI_CLOCK_OUT_RISING_EDGE	BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_SW_GLOBAL_OUTPUT_CTRL__1	0x0103</div><div class='add'>+#define SW_ENABLE_REFCLKO		BIT(1)</div><div class='add'>+#define SW_REFCLKO_IS_125MHZ		BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_SW_IBA__4			0x0104</div><div class='add'>+</div><div class='add'>+#define SW_IBA_ENABLE			BIT(31)</div><div class='add'>+#define SW_IBA_DA_MATCH			BIT(30)</div><div class='add'>+#define SW_IBA_INIT			BIT(29)</div><div class='add'>+#define SW_IBA_QID_M			0xF</div><div class='add'>+#define SW_IBA_QID_S			22</div><div class='add'>+#define SW_IBA_PORT_M			0x2F</div><div class='add'>+#define SW_IBA_PORT_S			16</div><div class='add'>+#define SW_IBA_FRAME_TPID_M		0xFFFF</div><div class='add'>+</div><div class='add'>+#define REG_SW_APB_TIMEOUT_ADDR__4	0x0108</div><div class='add'>+</div><div class='add'>+#define APB_TIMEOUT_ACKNOWLEDGE		BIT(31)</div><div class='add'>+</div><div class='add'>+#define REG_SW_IBA_SYNC__1		0x010C</div><div class='add'>+</div><div class='add'>+#define REG_SW_IBA_STATUS__4		0x0110</div><div class='add'>+</div><div class='add'>+#define SW_IBA_REQ			BIT(31)</div><div class='add'>+#define SW_IBA_RESP			BIT(30)</div><div class='add'>+#define SW_IBA_DA_MISMATCH		BIT(14)</div><div class='add'>+#define SW_IBA_FMT_MISMATCH		BIT(13)</div><div class='add'>+#define SW_IBA_CODE_ERROR		BIT(12)</div><div class='add'>+#define SW_IBA_CMD_ERROR		BIT(11)</div><div class='add'>+#define SW_IBA_CMD_LOC_M		(BIT(6) - 1)</div><div class='add'>+</div><div class='add'>+#define REG_SW_IBA_STATES__4		0x0114</div><div class='add'>+</div><div class='add'>+#define SW_IBA_BUF_STATE_S		30</div><div class='add'>+#define SW_IBA_CMD_STATE_S		28</div><div class='add'>+#define SW_IBA_RESP_STATE_S		26</div><div class='add'>+#define SW_IBA_STATE_M			0x3</div><div class='add'>+#define SW_IBA_PACKET_SIZE_M		0x7F</div><div class='add'>+#define SW_IBA_PACKET_SIZE_S		16</div><div class='add'>+#define SW_IBA_FMT_ID_M			0xFFFF</div><div class='add'>+</div><div class='add'>+#define REG_SW_IBA_RESULT__4		0x0118</div><div class='add'>+</div><div class='add'>+#define SW_IBA_SIZE_S			24</div><div class='add'>+</div><div class='add'>+#define SW_IBA_RETRY_CNT_M		(BIT(5) - 1)</div><div class='add'>+</div><div class='add'>+/* 2 - PHY */</div><div class='add'>+#define REG_SW_POWER_MANAGEMENT_CTRL	0x0201</div><div class='add'>+</div><div class='add'>+#define SW_PLL_POWER_DOWN		BIT(5)</div><div class='add'>+#define SW_POWER_DOWN_MODE		0x3</div><div class='add'>+#define SW_ENERGY_DETECTION		1</div><div class='add'>+#define SW_SOFT_POWER_DOWN		2</div><div class='add'>+#define SW_POWER_SAVING			3</div><div class='add'>+</div><div class='add'>+/* 3 - Operation Control */</div><div class='add'>+#define REG_SW_OPERATION		0x0300</div><div class='add'>+</div><div class='add'>+#define SW_DOUBLE_TAG			BIT(7)</div><div class='add'>+#define SW_RESET			BIT(1)</div><div class='add'>+</div><div class='add'>+#define REG_SW_MTU__2			0x0308</div><div class='add'>+#define REG_SW_MTU_MASK			GENMASK(13, 0)</div><div class='add'>+</div><div class='add'>+#define REG_SW_ISP_TPID__2		0x030A</div><div class='add'>+</div><div class='add'>+#define REG_SW_HSR_TPID__2		0x030C</div><div class='add'>+</div><div class='add'>+#define REG_AVB_STRATEGY__2		0x030E</div><div class='add'>+</div><div class='add'>+#define SW_SHAPING_CREDIT_ACCT		BIT(1)</div><div class='add'>+#define SW_POLICING_CREDIT_ACCT		BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_SW_LUE_CTRL_0		0x0310</div><div class='add'>+</div><div class='add'>+#define SW_VLAN_ENABLE			BIT(7)</div><div class='add'>+#define SW_DROP_INVALID_VID		BIT(6)</div><div class='add'>+#define SW_AGE_CNT_M			GENMASK(5, 3)</div><div class='add'>+#define SW_RESV_MCAST_ENABLE		BIT(2)</div><div class='add'>+#define SW_HASH_OPTION_M		0x03</div><div class='add'>+#define SW_HASH_OPTION_CRC		1</div><div class='add'>+#define SW_HASH_OPTION_XOR		2</div><div class='add'>+#define SW_HASH_OPTION_DIRECT		3</div><div class='add'>+</div><div class='add'>+#define REG_SW_LUE_CTRL_1		0x0311</div><div class='add'>+</div><div class='add'>+#define UNICAST_LEARN_DISABLE		BIT(7)</div><div class='add'>+#define SW_SRC_ADDR_FILTER		BIT(6)</div><div class='add'>+#define SW_FLUSH_STP_TABLE		BIT(5)</div><div class='add'>+#define SW_FLUSH_MSTP_TABLE		BIT(4)</div><div class='add'>+#define SW_FWD_MCAST_SRC_ADDR		BIT(3)</div><div class='add'>+#define SW_AGING_ENABLE			BIT(2)</div><div class='add'>+#define SW_FAST_AGING			BIT(1)</div><div class='add'>+#define SW_LINK_AUTO_AGING		BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_SW_LUE_CTRL_2		0x0312</div><div class='add'>+</div><div class='add'>+#define SW_TRAP_DOUBLE_TAG		BIT(6)</div><div class='add'>+#define SW_EGRESS_VLAN_FILTER_DYN	BIT(5)</div><div class='add'>+#define SW_EGRESS_VLAN_FILTER_STA	BIT(4)</div><div class='add'>+#define SW_FLUSH_OPTION_M		0x3</div><div class='add'>+#define SW_FLUSH_OPTION_S		2</div><div class='add'>+#define SW_FLUSH_OPTION_DYN_MAC		1</div><div class='add'>+#define SW_FLUSH_OPTION_STA_MAC		2</div><div class='add'>+#define SW_FLUSH_OPTION_BOTH		3</div><div class='add'>+#define SW_PRIO_M			0x3</div><div class='add'>+#define SW_PRIO_DA			0</div><div class='add'>+#define SW_PRIO_SA			1</div><div class='add'>+#define SW_PRIO_HIGHEST_DA_SA		2</div><div class='add'>+#define SW_PRIO_LOWEST_DA_SA		3</div><div class='add'>+</div><div class='add'>+#define REG_SW_LUE_CTRL_3		0x0313</div><div class='add'>+#define SW_AGE_PERIOD_7_0_M		GENMASK(7, 0)</div><div class='add'>+</div><div class='add'>+#define REG_SW_LUE_INT_STATUS		0x0314</div><div class='add'>+#define REG_SW_LUE_INT_ENABLE		0x0315</div><div class='add'>+</div><div class='add'>+#define LEARN_FAIL_INT			BIT(2)</div><div class='add'>+#define ALMOST_FULL_INT			BIT(1)</div><div class='add'>+#define WRITE_FAIL_INT			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_SW_LUE_INDEX_0__2		0x0316</div><div class='add'>+</div><div class='add'>+#define ENTRY_INDEX_M			0x0FFF</div><div class='add'>+</div><div class='add'>+#define REG_SW_LUE_INDEX_1__2		0x0318</div><div class='add'>+</div><div class='add'>+#define FAIL_INDEX_M			0x03FF</div><div class='add'>+</div><div class='add'>+#define REG_SW_LUE_INDEX_2__2		0x031A</div><div class='add'>+</div><div class='add'>+#define REG_SW_LUE_UNK_UCAST_CTRL__4	0x0320</div><div class='add'>+</div><div class='add'>+#define SW_UNK_UCAST_ENABLE		BIT(31)</div><div class='add'>+</div><div class='add'>+#define REG_SW_LUE_UNK_MCAST_CTRL__4	0x0324</div><div class='add'>+</div><div class='add'>+#define SW_UNK_MCAST_ENABLE		BIT(31)</div><div class='add'>+</div><div class='add'>+#define REG_SW_LUE_UNK_VID_CTRL__4	0x0328</div><div class='add'>+</div><div class='add'>+#define SW_UNK_VID_ENABLE		BIT(31)</div><div class='add'>+</div><div class='add'>+#define REG_SW_MAC_CTRL_0		0x0330</div><div class='add'>+</div><div class='add'>+#define SW_NEW_BACKOFF			BIT(7)</div><div class='add'>+#define SW_CHECK_LENGTH			BIT(3)</div><div class='add'>+#define SW_PAUSE_UNH_MODE		BIT(1)</div><div class='add'>+#define SW_AGGR_BACKOFF			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_SW_MAC_CTRL_1		0x0331</div><div class='add'>+</div><div class='add'>+#define SW_BACK_PRESSURE		BIT(5)</div><div class='add'>+#define SW_BACK_PRESSURE_COLLISION	0</div><div class='add'>+#define FAIR_FLOW_CTRL			BIT(4)</div><div class='add'>+#define NO_EXC_COLLISION_DROP		BIT(3)</div><div class='add'>+#define SW_JUMBO_PACKET			BIT(2)</div><div class='add'>+#define SW_LEGAL_PACKET_DISABLE		BIT(1)</div><div class='add'>+#define SW_PASS_SHORT_FRAME		BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_SW_MAC_CTRL_2		0x0332</div><div class='add'>+</div><div class='add'>+#define SW_REPLACE_VID			BIT(3)</div><div class='add'>+</div><div class='add'>+#define REG_SW_MAC_CTRL_3		0x0333</div><div class='add'>+</div><div class='add'>+#define REG_SW_MAC_CTRL_4		0x0334</div><div class='add'>+</div><div class='add'>+#define SW_PASS_PAUSE			BIT(3)</div><div class='add'>+</div><div class='add'>+#define REG_SW_MAC_CTRL_5		0x0335</div><div class='add'>+</div><div class='add'>+#define SW_OUT_RATE_LIMIT_QUEUE_BASED	BIT(3)</div><div class='add'>+</div><div class='add'>+#define REG_SW_MAC_CTRL_6		0x0336</div><div class='add'>+</div><div class='add'>+#define SW_MIB_COUNTER_FLUSH		BIT(7)</div><div class='add'>+#define SW_MIB_COUNTER_FREEZE		BIT(6)</div><div class='add'>+</div><div class='add'>+#define REG_SW_MAC_802_1P_MAP_0		0x0338</div><div class='add'>+#define REG_SW_MAC_802_1P_MAP_1		0x0339</div><div class='add'>+#define REG_SW_MAC_802_1P_MAP_2		0x033A</div><div class='add'>+#define REG_SW_MAC_802_1P_MAP_3		0x033B</div><div class='add'>+</div><div class='add'>+#define SW_802_1P_MAP_M			KS_PRIO_M</div><div class='add'>+#define SW_802_1P_MAP_S			KS_PRIO_S</div><div class='add'>+</div><div class='add'>+#define REG_SW_MAC_ISP_CTRL		0x033C</div><div class='add'>+</div><div class='add'>+#define REG_SW_MAC_TOS_CTRL		0x033E</div><div class='add'>+</div><div class='add'>+#define SW_TOS_DSCP_REMARK		BIT(1)</div><div class='add'>+#define SW_TOS_DSCP_REMAP		BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_SW_MAC_TOS_PRIO_0		0x0340</div><div class='add'>+#define REG_SW_MAC_TOS_PRIO_1		0x0341</div><div class='add'>+#define REG_SW_MAC_TOS_PRIO_2		0x0342</div><div class='add'>+#define REG_SW_MAC_TOS_PRIO_3		0x0343</div><div class='add'>+#define REG_SW_MAC_TOS_PRIO_4		0x0344</div><div class='add'>+#define REG_SW_MAC_TOS_PRIO_5		0x0345</div><div class='add'>+#define REG_SW_MAC_TOS_PRIO_6		0x0346</div><div class='add'>+#define REG_SW_MAC_TOS_PRIO_7		0x0347</div><div class='add'>+#define REG_SW_MAC_TOS_PRIO_8		0x0348</div><div class='add'>+#define REG_SW_MAC_TOS_PRIO_9		0x0349</div><div class='add'>+#define REG_SW_MAC_TOS_PRIO_10		0x034A</div><div class='add'>+#define REG_SW_MAC_TOS_PRIO_11		0x034B</div><div class='add'>+#define REG_SW_MAC_TOS_PRIO_12		0x034C</div><div class='add'>+#define REG_SW_MAC_TOS_PRIO_13		0x034D</div><div class='add'>+#define REG_SW_MAC_TOS_PRIO_14		0x034E</div><div class='add'>+#define REG_SW_MAC_TOS_PRIO_15		0x034F</div><div class='add'>+#define REG_SW_MAC_TOS_PRIO_16		0x0350</div><div class='add'>+#define REG_SW_MAC_TOS_PRIO_17		0x0351</div><div class='add'>+#define REG_SW_MAC_TOS_PRIO_18		0x0352</div><div class='add'>+#define REG_SW_MAC_TOS_PRIO_19		0x0353</div><div class='add'>+#define REG_SW_MAC_TOS_PRIO_20		0x0354</div><div class='add'>+#define REG_SW_MAC_TOS_PRIO_21		0x0355</div><div class='add'>+#define REG_SW_MAC_TOS_PRIO_22		0x0356</div><div class='add'>+#define REG_SW_MAC_TOS_PRIO_23		0x0357</div><div class='add'>+#define REG_SW_MAC_TOS_PRIO_24		0x0358</div><div class='add'>+#define REG_SW_MAC_TOS_PRIO_25		0x0359</div><div class='add'>+#define REG_SW_MAC_TOS_PRIO_26		0x035A</div><div class='add'>+#define REG_SW_MAC_TOS_PRIO_27		0x035B</div><div class='add'>+#define REG_SW_MAC_TOS_PRIO_28		0x035C</div><div class='add'>+#define REG_SW_MAC_TOS_PRIO_29		0x035D</div><div class='add'>+#define REG_SW_MAC_TOS_PRIO_30		0x035E</div><div class='add'>+#define REG_SW_MAC_TOS_PRIO_31		0x035F</div><div class='add'>+</div><div class='add'>+#define REG_SW_MRI_CTRL_0		0x0370</div><div class='add'>+</div><div class='add'>+#define SW_IGMP_SNOOP			BIT(6)</div><div class='add'>+#define SW_IPV6_MLD_OPTION		BIT(3)</div><div class='add'>+#define SW_IPV6_MLD_SNOOP		BIT(2)</div><div class='add'>+#define SW_MIRROR_RX_TX			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_SW_CLASS_D_IP_CTRL__4	0x0374</div><div class='add'>+</div><div class='add'>+#define SW_CLASS_D_IP_ENABLE		BIT(31)</div><div class='add'>+</div><div class='add'>+#define REG_SW_MRI_CTRL_8		0x0378</div><div class='add'>+</div><div class='add'>+#define SW_NO_COLOR_S			6</div><div class='add'>+#define SW_RED_COLOR_S			4</div><div class='add'>+#define SW_YELLOW_COLOR_S		2</div><div class='add'>+#define SW_GREEN_COLOR_S		0</div><div class='add'>+#define SW_COLOR_M			0x3</div><div class='add'>+</div><div class='add'>+#define REG_SW_QM_CTRL__4		0x0390</div><div class='add'>+</div><div class='add'>+#define PRIO_SCHEME_SELECT_M		KS_PRIO_M</div><div class='add'>+#define PRIO_SCHEME_SELECT_S		6</div><div class='add'>+#define PRIO_MAP_3_HI			0</div><div class='add'>+#define PRIO_MAP_2_HI			2</div><div class='add'>+#define PRIO_MAP_0_LO			3</div><div class='add'>+#define UNICAST_VLAN_BOUNDARY		BIT(1)</div><div class='add'>+</div><div class='add'>+#define REG_SW_EEE_QM_CTRL__2		0x03C0</div><div class='add'>+</div><div class='add'>+#define REG_SW_EEE_TXQ_WAIT_TIME__2	0x03C2</div><div class='add'>+</div><div class='add'>+/* 4 - */</div><div class='add'>+#define REG_SW_VLAN_ENTRY__4		0x0400</div><div class='add'>+</div><div class='add'>+#define VLAN_VALID			BIT(31)</div><div class='add'>+#define VLAN_FORWARD_OPTION		BIT(27)</div><div class='add'>+#define VLAN_PRIO_M			KS_PRIO_M</div><div class='add'>+#define VLAN_PRIO_S			24</div><div class='add'>+#define VLAN_MSTP_M			0x7</div><div class='add'>+#define VLAN_MSTP_S			12</div><div class='add'>+#define VLAN_FID_M			0x7F</div><div class='add'>+</div><div class='add'>+#define REG_SW_VLAN_ENTRY_UNTAG__4	0x0404</div><div class='add'>+#define REG_SW_VLAN_ENTRY_PORTS__4	0x0408</div><div class='add'>+</div><div class='add'>+#define REG_SW_VLAN_ENTRY_INDEX__2	0x040C</div><div class='add'>+</div><div class='add'>+#define VLAN_INDEX_M			0x0FFF</div><div class='add'>+</div><div class='add'>+#define REG_SW_VLAN_CTRL		0x040E</div><div class='add'>+</div><div class='add'>+#define VLAN_START			BIT(7)</div><div class='add'>+#define VLAN_ACTION			0x3</div><div class='add'>+#define VLAN_WRITE			1</div><div class='add'>+#define VLAN_READ			2</div><div class='add'>+#define VLAN_CLEAR			3</div><div class='add'>+</div><div class='add'>+#define REG_SW_ALU_INDEX_0		0x0410</div><div class='add'>+</div><div class='add'>+#define ALU_FID_INDEX_S			16</div><div class='add'>+#define ALU_MAC_ADDR_HI			0xFFFF</div><div class='add'>+</div><div class='add'>+#define REG_SW_ALU_INDEX_1		0x0414</div><div class='add'>+</div><div class='add'>+#define ALU_DIRECT_INDEX_M		(BIT(12) - 1)</div><div class='add'>+</div><div class='add'>+#define REG_SW_ALU_CTRL__4		0x0418</div><div class='add'>+</div><div class='add'>+#define ALU_VALID_CNT_M			(BIT(14) - 1)</div><div class='add'>+#define ALU_VALID_CNT_S			16</div><div class='add'>+#define ALU_START			BIT(7)</div><div class='add'>+#define ALU_VALID			BIT(6)</div><div class='add'>+#define ALU_DIRECT			BIT(2)</div><div class='add'>+#define ALU_ACTION			0x3</div><div class='add'>+#define ALU_WRITE			1</div><div class='add'>+#define ALU_READ			2</div><div class='add'>+#define ALU_SEARCH			3</div><div class='add'>+</div><div class='add'>+#define REG_SW_ALU_STAT_CTRL__4		0x041C</div><div class='add'>+</div><div class='add'>+#define ALU_RESV_MCAST_INDEX_M		(BIT(6) - 1)</div><div class='add'>+#define ALU_STAT_START			BIT(7)</div><div class='add'>+</div><div class='add'>+#define REG_SW_ALU_VAL_A		0x0420</div><div class='add'>+</div><div class='add'>+#define ALU_V_STATIC_VALID		BIT(31)</div><div class='add'>+#define ALU_V_SRC_FILTER		BIT(30)</div><div class='add'>+#define ALU_V_DST_FILTER		BIT(29)</div><div class='add'>+#define ALU_V_PRIO_AGE_CNT_M		(BIT(3) - 1)</div><div class='add'>+#define ALU_V_PRIO_AGE_CNT_S		26</div><div class='add'>+#define ALU_V_MSTP_M			0x7</div><div class='add'>+</div><div class='add'>+#define REG_SW_ALU_VAL_B		0x0424</div><div class='add'>+</div><div class='add'>+#define ALU_V_OVERRIDE			BIT(31)</div><div class='add'>+#define ALU_V_USE_FID			BIT(30)</div><div class='add'>+#define ALU_V_PORT_MAP			(BIT(24) - 1)</div><div class='add'>+</div><div class='add'>+#define REG_SW_ALU_VAL_C		0x0428</div><div class='add'>+</div><div class='add'>+#define ALU_V_FID_M			(BIT(16) - 1)</div><div class='add'>+#define ALU_V_FID_S			16</div><div class='add'>+#define ALU_V_MAC_ADDR_HI		0xFFFF</div><div class='add'>+</div><div class='add'>+#define REG_SW_ALU_VAL_D		0x042C</div><div class='add'>+</div><div class='add'>+#define REG_HSR_ALU_INDEX_0		0x0440</div><div class='add'>+</div><div class='add'>+#define REG_HSR_ALU_INDEX_1		0x0444</div><div class='add'>+</div><div class='add'>+#define HSR_DST_MAC_INDEX_LO_S		16</div><div class='add'>+#define HSR_SRC_MAC_INDEX_HI		0xFFFF</div><div class='add'>+</div><div class='add'>+#define REG_HSR_ALU_INDEX_2		0x0448</div><div class='add'>+</div><div class='add'>+#define HSR_INDEX_MAX			BIT(9)</div><div class='add'>+#define HSR_DIRECT_INDEX_M		(HSR_INDEX_MAX - 1)</div><div class='add'>+</div><div class='add'>+#define REG_HSR_ALU_INDEX_3		0x044C</div><div class='add'>+</div><div class='add'>+#define HSR_PATH_INDEX_M		(BIT(4) - 1)</div><div class='add'>+</div><div class='add'>+#define REG_HSR_ALU_CTRL__4		0x0450</div><div class='add'>+</div><div class='add'>+#define HSR_VALID_CNT_M			(BIT(14) - 1)</div><div class='add'>+#define HSR_VALID_CNT_S			16</div><div class='add'>+#define HSR_START			BIT(7)</div><div class='add'>+#define HSR_VALID			BIT(6)</div><div class='add'>+#define HSR_SEARCH_END			BIT(5)</div><div class='add'>+#define HSR_DIRECT			BIT(2)</div><div class='add'>+#define HSR_ACTION			0x3</div><div class='add'>+#define HSR_WRITE			1</div><div class='add'>+#define HSR_READ			2</div><div class='add'>+#define HSR_SEARCH			3</div><div class='add'>+</div><div class='add'>+#define REG_HSR_ALU_VAL_A		0x0454</div><div class='add'>+</div><div class='add'>+#define HSR_V_STATIC_VALID		BIT(31)</div><div class='add'>+#define HSR_V_AGE_CNT_M			(BIT(3) - 1)</div><div class='add'>+#define HSR_V_AGE_CNT_S			26</div><div class='add'>+#define HSR_V_PATH_ID_M			(BIT(4) - 1)</div><div class='add'>+</div><div class='add'>+#define REG_HSR_ALU_VAL_B		0x0458</div><div class='add'>+</div><div class='add'>+#define REG_HSR_ALU_VAL_C		0x045C</div><div class='add'>+</div><div class='add'>+#define HSR_V_DST_MAC_ADDR_LO_S		16</div><div class='add'>+#define HSR_V_SRC_MAC_ADDR_HI		0xFFFF</div><div class='add'>+</div><div class='add'>+#define REG_HSR_ALU_VAL_D		0x0460</div><div class='add'>+</div><div class='add'>+#define REG_HSR_ALU_VAL_E		0x0464</div><div class='add'>+</div><div class='add'>+#define HSR_V_START_SEQ_1_S		16</div><div class='add'>+#define HSR_V_START_SEQ_2_S		0</div><div class='add'>+</div><div class='add'>+#define REG_HSR_ALU_VAL_F		0x0468</div><div class='add'>+</div><div class='add'>+#define HSR_V_EXP_SEQ_1_S		16</div><div class='add'>+#define HSR_V_EXP_SEQ_2_S		0</div><div class='add'>+</div><div class='add'>+#define REG_HSR_ALU_VAL_G		0x046C</div><div class='add'>+</div><div class='add'>+#define HSR_V_SEQ_CNT_1_S		16</div><div class='add'>+#define HSR_V_SEQ_CNT_2_S		0</div><div class='add'>+</div><div class='add'>+#define HSR_V_SEQ_M			(BIT(16) - 1)</div><div class='add'>+</div><div class='add'>+/* 5 - PTP Clock */</div><div class='add'>+#define REG_PTP_CLK_CTRL		0x0500</div><div class='add'>+</div><div class='add'>+#define PTP_STEP_ADJ			BIT(6)</div><div class='add'>+#define PTP_STEP_DIR			BIT(5)</div><div class='add'>+#define PTP_READ_TIME			BIT(4)</div><div class='add'>+#define PTP_LOAD_TIME			BIT(3)</div><div class='add'>+#define PTP_CLK_ADJ_ENABLE		BIT(2)</div><div class='add'>+#define PTP_CLK_ENABLE			BIT(1)</div><div class='add'>+#define PTP_CLK_RESET			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_PTP_RTC_SUB_NANOSEC__2	0x0502</div><div class='add'>+</div><div class='add'>+#define PTP_RTC_SUB_NANOSEC_M		0x0007</div><div class='add'>+</div><div class='add'>+#define REG_PTP_RTC_NANOSEC		0x0504</div><div class='add'>+#define REG_PTP_RTC_NANOSEC_H		0x0504</div><div class='add'>+#define REG_PTP_RTC_NANOSEC_L		0x0506</div><div class='add'>+</div><div class='add'>+#define REG_PTP_RTC_SEC			0x0508</div><div class='add'>+#define REG_PTP_RTC_SEC_H		0x0508</div><div class='add'>+#define REG_PTP_RTC_SEC_L		0x050A</div><div class='add'>+</div><div class='add'>+#define REG_PTP_SUBNANOSEC_RATE		0x050C</div><div class='add'>+#define REG_PTP_SUBNANOSEC_RATE_H	0x050C</div><div class='add'>+</div><div class='add'>+#define PTP_RATE_DIR			BIT(31)</div><div class='add'>+#define PTP_TMP_RATE_ENABLE		BIT(30)</div><div class='add'>+</div><div class='add'>+#define REG_PTP_SUBNANOSEC_RATE_L	0x050E</div><div class='add'>+</div><div class='add'>+#define REG_PTP_RATE_DURATION		0x0510</div><div class='add'>+#define REG_PTP_RATE_DURATION_H		0x0510</div><div class='add'>+#define REG_PTP_RATE_DURATION_L		0x0512</div><div class='add'>+</div><div class='add'>+#define REG_PTP_MSG_CONF1		0x0514</div><div class='add'>+</div><div class='add'>+#define PTP_802_1AS			BIT(7)</div><div class='add'>+#define PTP_ENABLE			BIT(6)</div><div class='add'>+#define PTP_ETH_ENABLE			BIT(5)</div><div class='add'>+#define PTP_IPV4_UDP_ENABLE		BIT(4)</div><div class='add'>+#define PTP_IPV6_UDP_ENABLE		BIT(3)</div><div class='add'>+#define PTP_TC_P2P			BIT(2)</div><div class='add'>+#define PTP_MASTER			BIT(1)</div><div class='add'>+#define PTP_1STEP			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_PTP_MSG_CONF2		0x0516</div><div class='add'>+</div><div class='add'>+#define PTP_UNICAST_ENABLE		BIT(12)</div><div class='add'>+#define PTP_ALTERNATE_MASTER		BIT(11)</div><div class='add'>+#define PTP_ALL_HIGH_PRIO		BIT(10)</div><div class='add'>+#define PTP_SYNC_CHECK			BIT(9)</div><div class='add'>+#define PTP_DELAY_CHECK			BIT(8)</div><div class='add'>+#define PTP_PDELAY_CHECK		BIT(7)</div><div class='add'>+#define PTP_DROP_SYNC_DELAY_REQ		BIT(5)</div><div class='add'>+#define PTP_DOMAIN_CHECK		BIT(4)</div><div class='add'>+#define PTP_UDP_CHECKSUM		BIT(2)</div><div class='add'>+</div><div class='add'>+#define REG_PTP_DOMAIN_VERSION		0x0518</div><div class='add'>+#define PTP_VERSION_M			0xFF00</div><div class='add'>+#define PTP_DOMAIN_M			0x00FF</div><div class='add'>+</div><div class='add'>+#define REG_PTP_UNIT_INDEX__4		0x0520</div><div class='add'>+</div><div class='add'>+#define PTP_UNIT_M			0xF</div><div class='add'>+</div><div class='add'>+#define PTP_GPIO_INDEX_S		16</div><div class='add'>+#define PTP_TSI_INDEX_S			8</div><div class='add'>+#define PTP_TOU_INDEX_S			0</div><div class='add'>+</div><div class='add'>+#define REG_PTP_TRIG_STATUS__4		0x0524</div><div class='add'>+</div><div class='add'>+#define TRIG_ERROR_S			16</div><div class='add'>+#define TRIG_DONE_S			0</div><div class='add'>+</div><div class='add'>+#define REG_PTP_INT_STATUS__4		0x0528</div><div class='add'>+</div><div class='add'>+#define TRIG_INT_S			16</div><div class='add'>+#define TS_INT_S			0</div><div class='add'>+</div><div class='add'>+#define TRIG_UNIT_M			0x7</div><div class='add'>+#define TS_UNIT_M			0x3</div><div class='add'>+</div><div class='add'>+#define REG_PTP_CTRL_STAT__4		0x052C</div><div class='add'>+</div><div class='add'>+#define GPIO_IN				BIT(7)</div><div class='add'>+#define GPIO_OUT			BIT(6)</div><div class='add'>+#define TS_INT_ENABLE			BIT(5)</div><div class='add'>+#define TRIG_ACTIVE			BIT(4)</div><div class='add'>+#define TRIG_ENABLE			BIT(3)</div><div class='add'>+#define TRIG_RESET			BIT(2)</div><div class='add'>+#define TS_ENABLE			BIT(1)</div><div class='add'>+#define TS_RESET			BIT(0)</div><div class='add'>+</div><div class='add'>+#define GPIO_CTRL_M			(GPIO_IN | GPIO_OUT)</div><div class='add'>+</div><div class='add'>+#define TRIG_CTRL_M			\</div><div class='add'>+	(TRIG_ACTIVE | TRIG_ENABLE | TRIG_RESET)</div><div class='add'>+</div><div class='add'>+#define TS_CTRL_M			\</div><div class='add'>+	(TS_INT_ENABLE | TS_ENABLE | TS_RESET)</div><div class='add'>+</div><div class='add'>+#define REG_TRIG_TARGET_NANOSEC		0x0530</div><div class='add'>+#define REG_TRIG_TARGET_SEC		0x0534</div><div class='add'>+</div><div class='add'>+#define REG_TRIG_CTRL__4		0x0538</div><div class='add'>+</div><div class='add'>+#define TRIG_CASCADE_ENABLE		BIT(31)</div><div class='add'>+#define TRIG_CASCADE_TAIL		BIT(30)</div><div class='add'>+#define TRIG_CASCADE_UPS_M		0xF</div><div class='add'>+#define TRIG_CASCADE_UPS_S		26</div><div class='add'>+#define TRIG_NOW			BIT(25)</div><div class='add'>+#define TRIG_NOTIFY			BIT(24)</div><div class='add'>+#define TRIG_EDGE			BIT(23)</div><div class='add'>+#define TRIG_PATTERN_S			20</div><div class='add'>+#define TRIG_PATTERN_M			0x7</div><div class='add'>+#define TRIG_NEG_EDGE			0</div><div class='add'>+#define TRIG_POS_EDGE			1</div><div class='add'>+#define TRIG_NEG_PULSE			2</div><div class='add'>+#define TRIG_POS_PULSE			3</div><div class='add'>+#define TRIG_NEG_PERIOD			4</div><div class='add'>+#define TRIG_POS_PERIOD			5</div><div class='add'>+#define TRIG_REG_OUTPUT			6</div><div class='add'>+#define TRIG_GPO_S			16</div><div class='add'>+#define TRIG_GPO_M			0xF</div><div class='add'>+#define TRIG_CASCADE_ITERATE_CNT_M	0xFFFF</div><div class='add'>+</div><div class='add'>+#define REG_TRIG_CYCLE_WIDTH		0x053C</div><div class='add'>+</div><div class='add'>+#define REG_TRIG_CYCLE_CNT		0x0540</div><div class='add'>+</div><div class='add'>+#define TRIG_CYCLE_CNT_M		0xFFFF</div><div class='add'>+#define TRIG_CYCLE_CNT_S		16</div><div class='add'>+#define TRIG_BIT_PATTERN_M		0xFFFF</div><div class='add'>+</div><div class='add'>+#define REG_TRIG_ITERATE_TIME		0x0544</div><div class='add'>+</div><div class='add'>+#define REG_TRIG_PULSE_WIDTH__4		0x0548</div><div class='add'>+</div><div class='add'>+#define TRIG_PULSE_WIDTH_M		0x00FFFFFF</div><div class='add'>+</div><div class='add'>+#define REG_TS_CTRL_STAT__4		0x0550</div><div class='add'>+</div><div class='add'>+#define TS_EVENT_DETECT_M		0xF</div><div class='add'>+#define TS_EVENT_DETECT_S		17</div><div class='add'>+#define TS_EVENT_OVERFLOW		BIT(16)</div><div class='add'>+#define TS_GPI_M			0xF</div><div class='add'>+#define TS_GPI_S			8</div><div class='add'>+#define TS_DETECT_RISE			BIT(7)</div><div class='add'>+#define TS_DETECT_FALL			BIT(6)</div><div class='add'>+#define TS_DETECT_S			6</div><div class='add'>+#define TS_CASCADE_TAIL			BIT(5)</div><div class='add'>+#define TS_CASCADE_UPS_M		0xF</div><div class='add'>+#define TS_CASCADE_UPS_S		1</div><div class='add'>+#define TS_CASCADE_ENABLE		BIT(0)</div><div class='add'>+</div><div class='add'>+#define DETECT_RISE			(TS_DETECT_RISE &gt;&gt; TS_DETECT_S)</div><div class='add'>+#define DETECT_FALL			(TS_DETECT_FALL &gt;&gt; TS_DETECT_S)</div><div class='add'>+</div><div class='add'>+#define REG_TS_EVENT_0_NANOSEC		0x0554</div><div class='add'>+#define REG_TS_EVENT_0_SEC		0x0558</div><div class='add'>+#define REG_TS_EVENT_0_SUB_NANOSEC	0x055C</div><div class='add'>+</div><div class='add'>+#define REG_TS_EVENT_1_NANOSEC		0x0560</div><div class='add'>+#define REG_TS_EVENT_1_SEC		0x0564</div><div class='add'>+#define REG_TS_EVENT_1_SUB_NANOSEC	0x0568</div><div class='add'>+</div><div class='add'>+#define REG_TS_EVENT_2_NANOSEC		0x056C</div><div class='add'>+#define REG_TS_EVENT_2_SEC		0x0570</div><div class='add'>+#define REG_TS_EVENT_2_SUB_NANOSEC	0x0574</div><div class='add'>+</div><div class='add'>+#define REG_TS_EVENT_3_NANOSEC		0x0578</div><div class='add'>+#define REG_TS_EVENT_3_SEC		0x057C</div><div class='add'>+#define REG_TS_EVENT_3_SUB_NANOSEC	0x0580</div><div class='add'>+</div><div class='add'>+#define REG_TS_EVENT_4_NANOSEC		0x0584</div><div class='add'>+#define REG_TS_EVENT_4_SEC		0x0588</div><div class='add'>+#define REG_TS_EVENT_4_SUB_NANOSEC	0x058C</div><div class='add'>+</div><div class='add'>+#define REG_TS_EVENT_5_NANOSEC		0x0590</div><div class='add'>+#define REG_TS_EVENT_5_SEC		0x0594</div><div class='add'>+#define REG_TS_EVENT_5_SUB_NANOSEC	0x0598</div><div class='add'>+</div><div class='add'>+#define REG_TS_EVENT_6_NANOSEC		0x059C</div><div class='add'>+#define REG_TS_EVENT_6_SEC		0x05A0</div><div class='add'>+#define REG_TS_EVENT_6_SUB_NANOSEC	0x05A4</div><div class='add'>+</div><div class='add'>+#define REG_TS_EVENT_7_NANOSEC		0x05A8</div><div class='add'>+#define REG_TS_EVENT_7_SEC		0x05AC</div><div class='add'>+#define REG_TS_EVENT_7_SUB_NANOSEC	0x05B0</div><div class='add'>+</div><div class='add'>+#define TS_EVENT_EDGE_M			0x1</div><div class='add'>+#define TS_EVENT_EDGE_S			30</div><div class='add'>+#define TS_EVENT_NANOSEC_M		(BIT(30) - 1)</div><div class='add'>+</div><div class='add'>+#define TS_EVENT_SUB_NANOSEC_M		0x7</div><div class='add'>+</div><div class='add'>+#define TS_EVENT_SAMPLE			\</div><div class='add'>+	(REG_TS_EVENT_1_NANOSEC - REG_TS_EVENT_0_NANOSEC)</div><div class='add'>+</div><div class='add'>+#define PORT_CTRL_ADDR(port, addr)	((addr) | (((port) + 1) &lt;&lt; 12))</div><div class='add'>+</div><div class='add'>+#define REG_GLOBAL_RR_INDEX__1		0x0600</div><div class='add'>+</div><div class='add'>+/* DLR */</div><div class='add'>+#define REG_DLR_SRC_PORT__4		0x0604</div><div class='add'>+</div><div class='add'>+#define DLR_SRC_PORT_UNICAST		BIT(31)</div><div class='add'>+#define DLR_SRC_PORT_M			0x3</div><div class='add'>+#define DLR_SRC_PORT_BOTH		0</div><div class='add'>+#define DLR_SRC_PORT_EACH		1</div><div class='add'>+</div><div class='add'>+#define REG_DLR_IP_ADDR__4		0x0608</div><div class='add'>+</div><div class='add'>+#define REG_DLR_CTRL__1			0x0610</div><div class='add'>+</div><div class='add'>+#define DLR_RESET_SEQ_ID		BIT(3)</div><div class='add'>+#define DLR_BACKUP_AUTO_ON		BIT(2)</div><div class='add'>+#define DLR_BEACON_TX_ENABLE		BIT(1)</div><div class='add'>+#define DLR_ASSIST_ENABLE		BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_DLR_STATE__1		0x0611</div><div class='add'>+</div><div class='add'>+#define DLR_NODE_STATE_M		0x3</div><div class='add'>+#define DLR_NODE_STATE_S		1</div><div class='add'>+#define DLR_NODE_STATE_IDLE		0</div><div class='add'>+#define DLR_NODE_STATE_FAULT		1</div><div class='add'>+#define DLR_NODE_STATE_NORMAL		2</div><div class='add'>+#define DLR_RING_STATE_FAULT		0</div><div class='add'>+#define DLR_RING_STATE_NORMAL		1</div><div class='add'>+</div><div class='add'>+#define REG_DLR_PRECEDENCE__1		0x0612</div><div class='add'>+</div><div class='add'>+#define REG_DLR_BEACON_INTERVAL__4	0x0614</div><div class='add'>+</div><div class='add'>+#define REG_DLR_BEACON_TIMEOUT__4	0x0618</div><div class='add'>+</div><div class='add'>+#define REG_DLR_TIMEOUT_WINDOW__4	0x061C</div><div class='add'>+</div><div class='add'>+#define DLR_TIMEOUT_WINDOW_M		(BIT(22) - 1)</div><div class='add'>+</div><div class='add'>+#define REG_DLR_VLAN_ID__2		0x0620</div><div class='add'>+</div><div class='add'>+#define DLR_VLAN_ID_M			(BIT(12) - 1)</div><div class='add'>+</div><div class='add'>+#define REG_DLR_DEST_ADDR_0		0x0622</div><div class='add'>+#define REG_DLR_DEST_ADDR_1		0x0623</div><div class='add'>+#define REG_DLR_DEST_ADDR_2		0x0624</div><div class='add'>+#define REG_DLR_DEST_ADDR_3		0x0625</div><div class='add'>+#define REG_DLR_DEST_ADDR_4		0x0626</div><div class='add'>+#define REG_DLR_DEST_ADDR_5		0x0627</div><div class='add'>+</div><div class='add'>+#define REG_DLR_PORT_MAP__4		0x0628</div><div class='add'>+</div><div class='add'>+#define REG_DLR_CLASS__1		0x062C</div><div class='add'>+</div><div class='add'>+#define DLR_FRAME_QID_M			0x3</div><div class='add'>+</div><div class='add'>+/* HSR */</div><div class='add'>+#define REG_HSR_PORT_MAP__4		0x0640</div><div class='add'>+</div><div class='add'>+#define REG_HSR_ALU_CTRL_0__1		0x0644</div><div class='add'>+</div><div class='add'>+#define HSR_DUPLICATE_DISCARD		BIT(7)</div><div class='add'>+#define HSR_NODE_UNICAST		BIT(6)</div><div class='add'>+#define HSR_AGE_CNT_DEFAULT_M		0x7</div><div class='add'>+#define HSR_AGE_CNT_DEFAULT_S		3</div><div class='add'>+#define HSR_LEARN_MCAST_DISABLE		BIT(2)</div><div class='add'>+#define HSR_HASH_OPTION_M		0x3</div><div class='add'>+#define HSR_HASH_DISABLE		0</div><div class='add'>+#define HSR_HASH_UPPER_BITS		1</div><div class='add'>+#define HSR_HASH_LOWER_BITS		2</div><div class='add'>+#define HSR_HASH_XOR_BOTH_BITS		3</div><div class='add'>+</div><div class='add'>+#define REG_HSR_ALU_CTRL_1__1		0x0645</div><div class='add'>+</div><div class='add'>+#define HSR_LEARN_UCAST_DISABLE		BIT(7)</div><div class='add'>+#define HSR_FLUSH_TABLE			BIT(5)</div><div class='add'>+#define HSR_PROC_MCAST_SRC		BIT(3)</div><div class='add'>+#define HSR_AGING_ENABLE		BIT(2)</div><div class='add'>+</div><div class='add'>+#define REG_HSR_ALU_CTRL_2__2		0x0646</div><div class='add'>+</div><div class='add'>+#define REG_HSR_ALU_AGE_PERIOD__4	0x0648</div><div class='add'>+</div><div class='add'>+#define REG_HSR_ALU_INT_STATUS__1	0x064C</div><div class='add'>+#define REG_HSR_ALU_INT_MASK__1		0x064D</div><div class='add'>+</div><div class='add'>+#define HSR_WINDOW_OVERFLOW_INT		BIT(3)</div><div class='add'>+#define HSR_LEARN_FAIL_INT		BIT(2)</div><div class='add'>+#define HSR_ALMOST_FULL_INT		BIT(1)</div><div class='add'>+#define HSR_WRITE_FAIL_INT		BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_HSR_ALU_ENTRY_0__2		0x0650</div><div class='add'>+</div><div class='add'>+#define HSR_ENTRY_INDEX_M		(BIT(10) - 1)</div><div class='add'>+#define HSR_FAIL_INDEX_M		(BIT(8) - 1)</div><div class='add'>+</div><div class='add'>+#define REG_HSR_ALU_ENTRY_1__2		0x0652</div><div class='add'>+</div><div class='add'>+#define HSR_FAIL_LEARN_INDEX_M		(BIT(8) - 1)</div><div class='add'>+</div><div class='add'>+#define REG_HSR_ALU_ENTRY_3__2		0x0654</div><div class='add'>+</div><div class='add'>+#define HSR_CPU_ACCESS_ENTRY_INDEX_M	(BIT(8) - 1)</div><div class='add'>+</div><div class='add'>+/* 0 - Operation */</div><div class='add'>+#define REG_PORT_DEFAULT_VID		0x0000</div><div class='add'>+</div><div class='add'>+#define REG_PORT_CUSTOM_VID		0x0002</div><div class='add'>+#define REG_PORT_AVB_SR_1_VID		0x0004</div><div class='add'>+#define REG_PORT_AVB_SR_2_VID		0x0006</div><div class='add'>+</div><div class='add'>+#define REG_PORT_AVB_SR_1_TYPE		0x0008</div><div class='add'>+#define REG_PORT_AVB_SR_2_TYPE		0x000A</div><div class='add'>+</div><div class='add'>+#define REG_PORT_INT_STATUS		0x001B</div><div class='add'>+#define REG_PORT_INT_MASK		0x001F</div><div class='add'>+</div><div class='add'>+#define PORT_SGMII_INT			BIT(3)</div><div class='add'>+#define PORT_PTP_INT			BIT(2)</div><div class='add'>+#define PORT_PHY_INT			BIT(1)</div><div class='add'>+#define PORT_ACL_INT			BIT(0)</div><div class='add'>+</div><div class='add'>+#define PORT_INT_MASK			\</div><div class='add'>+	(PORT_SGMII_INT | PORT_PTP_INT | PORT_PHY_INT | PORT_ACL_INT)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_CTRL_0			0x0020</div><div class='add'>+</div><div class='add'>+#define PORT_MAC_LOOPBACK		BIT(7)</div><div class='add'>+#define PORT_FORCE_TX_FLOW_CTRL		BIT(4)</div><div class='add'>+#define PORT_FORCE_RX_FLOW_CTRL		BIT(3)</div><div class='add'>+#define PORT_TAIL_TAG_ENABLE		BIT(2)</div><div class='add'>+#define PORT_QUEUE_SPLIT_MASK		GENMASK(1, 0)</div><div class='add'>+#define PORT_EIGHT_QUEUE		0x3</div><div class='add'>+#define PORT_FOUR_QUEUE			0x2</div><div class='add'>+#define PORT_TWO_QUEUE			0x1</div><div class='add'>+#define PORT_SINGLE_QUEUE		0x0</div><div class='add'>+</div><div class='add'>+#define REG_PORT_CTRL_1			0x0021</div><div class='add'>+</div><div class='add'>+#define PORT_SRP_ENABLE			0x3</div><div class='add'>+</div><div class='add'>+#define REG_PORT_STATUS_0		0x0030</div><div class='add'>+</div><div class='add'>+#define PORT_INTF_SPEED_MASK		GENMASK(4, 3)</div><div class='add'>+#define PORT_INTF_SPEED_NONE		GENMASK(1, 0)</div><div class='add'>+#define PORT_INTF_FULL_DUPLEX		BIT(2)</div><div class='add'>+#define PORT_TX_FLOW_CTRL		BIT(1)</div><div class='add'>+#define PORT_RX_FLOW_CTRL		BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_STATUS_1		0x0034</div><div class='add'>+</div><div class='add'>+/* 1 - PHY */</div><div class='add'>+#define REG_PORT_PHY_CTRL		0x0100</div><div class='add'>+</div><div class='add'>+#define PORT_PHY_RESET			BIT(15)</div><div class='add'>+#define PORT_PHY_LOOPBACK		BIT(14)</div><div class='add'>+#define PORT_SPEED_100MBIT		BIT(13)</div><div class='add'>+#define PORT_AUTO_NEG_ENABLE		BIT(12)</div><div class='add'>+#define PORT_POWER_DOWN			BIT(11)</div><div class='add'>+#define PORT_ISOLATE			BIT(10)</div><div class='add'>+#define PORT_AUTO_NEG_RESTART		BIT(9)</div><div class='add'>+#define PORT_FULL_DUPLEX		BIT(8)</div><div class='add'>+#define PORT_COLLISION_TEST		BIT(7)</div><div class='add'>+#define PORT_SPEED_1000MBIT		BIT(6)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_PHY_STATUS		0x0102</div><div class='add'>+</div><div class='add'>+#define PORT_100BT4_CAPABLE		BIT(15)</div><div class='add'>+#define PORT_100BTX_FD_CAPABLE		BIT(14)</div><div class='add'>+#define PORT_100BTX_CAPABLE		BIT(13)</div><div class='add'>+#define PORT_10BT_FD_CAPABLE		BIT(12)</div><div class='add'>+#define PORT_10BT_CAPABLE		BIT(11)</div><div class='add'>+#define PORT_EXTENDED_STATUS		BIT(8)</div><div class='add'>+#define PORT_MII_SUPPRESS_CAPABLE	BIT(6)</div><div class='add'>+#define PORT_AUTO_NEG_ACKNOWLEDGE	BIT(5)</div><div class='add'>+#define PORT_REMOTE_FAULT		BIT(4)</div><div class='add'>+#define PORT_AUTO_NEG_CAPABLE		BIT(3)</div><div class='add'>+#define PORT_LINK_STATUS		BIT(2)</div><div class='add'>+#define PORT_JABBER_DETECT		BIT(1)</div><div class='add'>+#define PORT_EXTENDED_CAPABILITY	BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_PHY_ID_HI		0x0104</div><div class='add'>+#define REG_PORT_PHY_ID_LO		0x0106</div><div class='add'>+</div><div class='add'>+#define KSZ9477_ID_HI			0x0022</div><div class='add'>+#define KSZ9477_ID_LO			0x1622</div><div class='add'>+</div><div class='add'>+#define REG_PORT_PHY_AUTO_NEGOTIATION	0x0108</div><div class='add'>+</div><div class='add'>+#define PORT_AUTO_NEG_NEXT_PAGE		BIT(15)</div><div class='add'>+#define PORT_AUTO_NEG_REMOTE_FAULT	BIT(13)</div><div class='add'>+#define PORT_AUTO_NEG_ASYM_PAUSE	BIT(11)</div><div class='add'>+#define PORT_AUTO_NEG_SYM_PAUSE		BIT(10)</div><div class='add'>+#define PORT_AUTO_NEG_100BT4		BIT(9)</div><div class='add'>+#define PORT_AUTO_NEG_100BTX_FD		BIT(8)</div><div class='add'>+#define PORT_AUTO_NEG_100BTX		BIT(7)</div><div class='add'>+#define PORT_AUTO_NEG_10BT_FD		BIT(6)</div><div class='add'>+#define PORT_AUTO_NEG_10BT		BIT(5)</div><div class='add'>+#define PORT_AUTO_NEG_SELECTOR		0x001F</div><div class='add'>+#define PORT_AUTO_NEG_802_3		0x0001</div><div class='add'>+</div><div class='add'>+#define PORT_AUTO_NEG_PAUSE		\</div><div class='add'>+	(PORT_AUTO_NEG_ASYM_PAUSE | PORT_AUTO_NEG_SYM_PAUSE)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_PHY_REMOTE_CAPABILITY	0x010A</div><div class='add'>+</div><div class='add'>+#define PORT_REMOTE_NEXT_PAGE		BIT(15)</div><div class='add'>+#define PORT_REMOTE_ACKNOWLEDGE		BIT(14)</div><div class='add'>+#define PORT_REMOTE_REMOTE_FAULT	BIT(13)</div><div class='add'>+#define PORT_REMOTE_ASYM_PAUSE		BIT(11)</div><div class='add'>+#define PORT_REMOTE_SYM_PAUSE		BIT(10)</div><div class='add'>+#define PORT_REMOTE_100BTX_FD		BIT(8)</div><div class='add'>+#define PORT_REMOTE_100BTX		BIT(7)</div><div class='add'>+#define PORT_REMOTE_10BT_FD		BIT(6)</div><div class='add'>+#define PORT_REMOTE_10BT		BIT(5)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_PHY_1000_CTRL		0x0112</div><div class='add'>+</div><div class='add'>+#define PORT_AUTO_NEG_MANUAL		BIT(12)</div><div class='add'>+#define PORT_AUTO_NEG_MASTER		BIT(11)</div><div class='add'>+#define PORT_AUTO_NEG_MASTER_PREFERRED	BIT(10)</div><div class='add'>+#define PORT_AUTO_NEG_1000BT_FD		BIT(9)</div><div class='add'>+#define PORT_AUTO_NEG_1000BT		BIT(8)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_PHY_1000_STATUS	0x0114</div><div class='add'>+</div><div class='add'>+#define PORT_MASTER_FAULT		BIT(15)</div><div class='add'>+#define PORT_LOCAL_MASTER		BIT(14)</div><div class='add'>+#define PORT_LOCAL_RX_OK		BIT(13)</div><div class='add'>+#define PORT_REMOTE_RX_OK		BIT(12)</div><div class='add'>+#define PORT_REMOTE_1000BT_FD		BIT(11)</div><div class='add'>+#define PORT_REMOTE_1000BT		BIT(10)</div><div class='add'>+#define PORT_REMOTE_IDLE_CNT_M		0x0F</div><div class='add'>+</div><div class='add'>+#define PORT_PHY_1000_STATIC_STATUS	\</div><div class='add'>+	(PORT_LOCAL_RX_OK |		\</div><div class='add'>+	PORT_REMOTE_RX_OK |		\</div><div class='add'>+	PORT_REMOTE_1000BT_FD |		\</div><div class='add'>+	PORT_REMOTE_1000BT)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_PHY_MMD_SETUP		0x011A</div><div class='add'>+</div><div class='add'>+#define PORT_MMD_OP_MODE_M		0x3</div><div class='add'>+#define PORT_MMD_OP_MODE_S		14</div><div class='add'>+#define PORT_MMD_OP_INDEX		0</div><div class='add'>+#define PORT_MMD_OP_DATA_NO_INCR	1</div><div class='add'>+#define PORT_MMD_OP_DATA_INCR_RW	2</div><div class='add'>+#define PORT_MMD_OP_DATA_INCR_W		3</div><div class='add'>+#define PORT_MMD_DEVICE_ID_M		0x1F</div><div class='add'>+</div><div class='add'>+#define MMD_SETUP(mode, dev)		\</div><div class='add'>+	(((u16)(mode) &lt;&lt; PORT_MMD_OP_MODE_S) | (dev))</div><div class='add'>+</div><div class='add'>+#define REG_PORT_PHY_MMD_INDEX_DATA	0x011C</div><div class='add'>+</div><div class='add'>+#define MMD_DEVICE_ID_DSP		1</div><div class='add'>+</div><div class='add'>+#define MMD_DSP_SQI_CHAN_A		0xAC</div><div class='add'>+#define MMD_DSP_SQI_CHAN_B		0xAD</div><div class='add'>+#define MMD_DSP_SQI_CHAN_C		0xAE</div><div class='add'>+#define MMD_DSP_SQI_CHAN_D		0xAF</div><div class='add'>+</div><div class='add'>+#define DSP_SQI_ERR_DETECTED		BIT(15)</div><div class='add'>+#define DSP_SQI_AVG_ERR			0x7FFF</div><div class='add'>+</div><div class='add'>+#define MMD_DEVICE_ID_COMMON		2</div><div class='add'>+</div><div class='add'>+#define MMD_DEVICE_ID_EEE_ADV		7</div><div class='add'>+</div><div class='add'>+#define MMD_EEE_ADV			0x3C</div><div class='add'>+#define EEE_ADV_100MBIT			BIT(1)</div><div class='add'>+#define EEE_ADV_1GBIT			BIT(2)</div><div class='add'>+</div><div class='add'>+#define MMD_EEE_LP_ADV			0x3D</div><div class='add'>+#define MMD_EEE_MSG_CODE		0x3F</div><div class='add'>+</div><div class='add'>+#define MMD_DEVICE_ID_AFED		0x1C</div><div class='add'>+</div><div class='add'>+#define REG_PORT_PHY_EXTENDED_STATUS	0x011E</div><div class='add'>+</div><div class='add'>+#define PORT_100BTX_FD_ABLE		BIT(15)</div><div class='add'>+#define PORT_100BTX_ABLE		BIT(14)</div><div class='add'>+#define PORT_10BT_FD_ABLE		BIT(13)</div><div class='add'>+#define PORT_10BT_ABLE			BIT(12)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_SGMII_ADDR__4		0x0200</div><div class='add'>+#define PORT_SGMII_AUTO_INCR		BIT(23)</div><div class='add'>+#define PORT_SGMII_DEVICE_ID_M		0x1F</div><div class='add'>+#define PORT_SGMII_DEVICE_ID_S		16</div><div class='add'>+#define PORT_SGMII_ADDR_M		(BIT(21) - 1)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_SGMII_DATA__4		0x0204</div><div class='add'>+#define PORT_SGMII_DATA_M		(BIT(16) - 1)</div><div class='add'>+</div><div class='add'>+#define MMD_DEVICE_ID_PMA		0x01</div><div class='add'>+#define MMD_DEVICE_ID_PCS		0x03</div><div class='add'>+#define MMD_DEVICE_ID_PHY_XS		0x04</div><div class='add'>+#define MMD_DEVICE_ID_DTE_XS		0x05</div><div class='add'>+#define MMD_DEVICE_ID_AN		0x07</div><div class='add'>+#define MMD_DEVICE_ID_VENDOR_CTRL	0x1E</div><div class='add'>+#define MMD_DEVICE_ID_VENDOR_MII	0x1F</div><div class='add'>+</div><div class='add'>+#define SR_MII				MMD_DEVICE_ID_VENDOR_MII</div><div class='add'>+</div><div class='add'>+#define MMD_SR_MII_CTRL			0x0000</div><div class='add'>+</div><div class='add'>+#define SR_MII_RESET			BIT(15)</div><div class='add'>+#define SR_MII_LOOPBACK			BIT(14)</div><div class='add'>+#define SR_MII_SPEED_100MBIT		BIT(13)</div><div class='add'>+#define SR_MII_AUTO_NEG_ENABLE		BIT(12)</div><div class='add'>+#define SR_MII_POWER_DOWN		BIT(11)</div><div class='add'>+#define SR_MII_AUTO_NEG_RESTART		BIT(9)</div><div class='add'>+#define SR_MII_FULL_DUPLEX		BIT(8)</div><div class='add'>+#define SR_MII_SPEED_1000MBIT		BIT(6)</div><div class='add'>+</div><div class='add'>+#define MMD_SR_MII_STATUS		0x0001</div><div class='add'>+#define MMD_SR_MII_ID_1			0x0002</div><div class='add'>+#define MMD_SR_MII_ID_2			0x0003</div><div class='add'>+#define MMD_SR_MII_AUTO_NEGOTIATION	0x0004</div><div class='add'>+</div><div class='add'>+#define SR_MII_AUTO_NEG_NEXT_PAGE	BIT(15)</div><div class='add'>+#define SR_MII_AUTO_NEG_REMOTE_FAULT_M	0x3</div><div class='add'>+#define SR_MII_AUTO_NEG_REMOTE_FAULT_S	12</div><div class='add'>+#define SR_MII_AUTO_NEG_NO_ERROR	0</div><div class='add'>+#define SR_MII_AUTO_NEG_OFFLINE		1</div><div class='add'>+#define SR_MII_AUTO_NEG_LINK_FAILURE	2</div><div class='add'>+#define SR_MII_AUTO_NEG_ERROR		3</div><div class='add'>+#define SR_MII_AUTO_NEG_PAUSE_M		0x3</div><div class='add'>+#define SR_MII_AUTO_NEG_PAUSE_S		7</div><div class='add'>+#define SR_MII_AUTO_NEG_NO_PAUSE	0</div><div class='add'>+#define SR_MII_AUTO_NEG_ASYM_PAUSE_TX	1</div><div class='add'>+#define SR_MII_AUTO_NEG_SYM_PAUSE	2</div><div class='add'>+#define SR_MII_AUTO_NEG_ASYM_PAUSE_RX	3</div><div class='add'>+#define SR_MII_AUTO_NEG_HALF_DUPLEX	BIT(6)</div><div class='add'>+#define SR_MII_AUTO_NEG_FULL_DUPLEX	BIT(5)</div><div class='add'>+</div><div class='add'>+#define MMD_SR_MII_REMOTE_CAPABILITY	0x0005</div><div class='add'>+#define MMD_SR_MII_AUTO_NEG_EXP		0x0006</div><div class='add'>+#define MMD_SR_MII_AUTO_NEG_EXT		0x000F</div><div class='add'>+</div><div class='add'>+#define MMD_SR_MII_DIGITAL_CTRL_1	0x8000</div><div class='add'>+</div><div class='add'>+#define MMD_SR_MII_AUTO_NEG_CTRL	0x8001</div><div class='add'>+</div><div class='add'>+#define SR_MII_8_BIT			BIT(8)</div><div class='add'>+#define SR_MII_SGMII_LINK_UP		BIT(4)</div><div class='add'>+#define SR_MII_TX_CFG_PHY_MASTER	BIT(3)</div><div class='add'>+#define SR_MII_PCS_MODE_M		0x3</div><div class='add'>+#define SR_MII_PCS_MODE_S		1</div><div class='add'>+#define SR_MII_PCS_SGMII		2</div><div class='add'>+#define SR_MII_AUTO_NEG_COMPLETE_INTR	BIT(0)</div><div class='add'>+</div><div class='add'>+#define MMD_SR_MII_AUTO_NEG_STATUS	0x8002</div><div class='add'>+</div><div class='add'>+#define SR_MII_STAT_LINK_UP		BIT(4)</div><div class='add'>+#define SR_MII_STAT_M			0x3</div><div class='add'>+#define SR_MII_STAT_S			2</div><div class='add'>+#define SR_MII_STAT_10_MBPS		0</div><div class='add'>+#define SR_MII_STAT_100_MBPS		1</div><div class='add'>+#define SR_MII_STAT_1000_MBPS		2</div><div class='add'>+#define SR_MII_STAT_FULL_DUPLEX		BIT(1)</div><div class='add'>+</div><div class='add'>+#define MMD_SR_MII_PHY_CTRL		0x80A0</div><div class='add'>+</div><div class='add'>+#define SR_MII_PHY_LANE_SEL_M		0xF</div><div class='add'>+#define SR_MII_PHY_LANE_SEL_S		8</div><div class='add'>+#define SR_MII_PHY_WRITE		BIT(1)</div><div class='add'>+#define SR_MII_PHY_START_BUSY		BIT(0)</div><div class='add'>+</div><div class='add'>+#define MMD_SR_MII_PHY_ADDR		0x80A1</div><div class='add'>+</div><div class='add'>+#define SR_MII_PHY_ADDR_M		(BIT(16) - 1)</div><div class='add'>+</div><div class='add'>+#define MMD_SR_MII_PHY_DATA		0x80A2</div><div class='add'>+</div><div class='add'>+#define SR_MII_PHY_DATA_M		(BIT(16) - 1)</div><div class='add'>+</div><div class='add'>+#define SR_MII_PHY_JTAG_CHIP_ID_HI	0x000C</div><div class='add'>+#define SR_MII_PHY_JTAG_CHIP_ID_LO	0x000D</div><div class='add'>+</div><div class='add'>+#define REG_PORT_PHY_REMOTE_LB_LED	0x0122</div><div class='add'>+</div><div class='add'>+#define PORT_REMOTE_LOOPBACK		BIT(8)</div><div class='add'>+#define PORT_LED_SELECT			(3 &lt;&lt; 6)</div><div class='add'>+#define PORT_LED_CTRL			(3 &lt;&lt; 4)</div><div class='add'>+#define PORT_LED_CTRL_TEST		BIT(3)</div><div class='add'>+#define PORT_10BT_PREAMBLE		BIT(2)</div><div class='add'>+#define PORT_LINK_MD_10BT_ENABLE	BIT(1)</div><div class='add'>+#define PORT_LINK_MD_PASS		BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_PHY_LINK_MD		0x0124</div><div class='add'>+</div><div class='add'>+#define PORT_START_CABLE_DIAG		BIT(15)</div><div class='add'>+#define PORT_TX_DISABLE			BIT(14)</div><div class='add'>+#define PORT_CABLE_DIAG_PAIR_M		0x3</div><div class='add'>+#define PORT_CABLE_DIAG_PAIR_S		12</div><div class='add'>+#define PORT_CABLE_DIAG_SELECT_M	0x3</div><div class='add'>+#define PORT_CABLE_DIAG_SELECT_S	10</div><div class='add'>+#define PORT_CABLE_DIAG_RESULT_M	0x3</div><div class='add'>+#define PORT_CABLE_DIAG_RESULT_S	8</div><div class='add'>+#define PORT_CABLE_STAT_NORMAL		0</div><div class='add'>+#define PORT_CABLE_STAT_OPEN		1</div><div class='add'>+#define PORT_CABLE_STAT_SHORT		2</div><div class='add'>+#define PORT_CABLE_STAT_FAILED		3</div><div class='add'>+#define PORT_CABLE_FAULT_COUNTER	0x00FF</div><div class='add'>+</div><div class='add'>+#define REG_PORT_PHY_PMA_STATUS		0x0126</div><div class='add'>+</div><div class='add'>+#define PORT_1000_LINK_GOOD		BIT(1)</div><div class='add'>+#define PORT_100_LINK_GOOD		BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_PHY_DIGITAL_STATUS	0x0128</div><div class='add'>+</div><div class='add'>+#define PORT_LINK_DETECT		BIT(14)</div><div class='add'>+#define PORT_SIGNAL_DETECT		BIT(13)</div><div class='add'>+#define PORT_PHY_STAT_MDI		BIT(12)</div><div class='add'>+#define PORT_PHY_STAT_MASTER		BIT(11)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_PHY_RXER_COUNTER	0x012A</div><div class='add'>+</div><div class='add'>+#define REG_PORT_PHY_INT_ENABLE		0x0136</div><div class='add'>+#define REG_PORT_PHY_INT_STATUS		0x0137</div><div class='add'>+</div><div class='add'>+#define JABBER_INT			BIT(7)</div><div class='add'>+#define RX_ERR_INT			BIT(6)</div><div class='add'>+#define PAGE_RX_INT			BIT(5)</div><div class='add'>+#define PARALLEL_DETECT_FAULT_INT	BIT(4)</div><div class='add'>+#define LINK_PARTNER_ACK_INT		BIT(3)</div><div class='add'>+#define LINK_DOWN_INT			BIT(2)</div><div class='add'>+#define REMOTE_FAULT_INT		BIT(1)</div><div class='add'>+#define LINK_UP_INT			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_PHY_DIGITAL_DEBUG_1	0x0138</div><div class='add'>+</div><div class='add'>+#define PORT_REG_CLK_SPEED_25_MHZ	BIT(14)</div><div class='add'>+#define PORT_PHY_FORCE_MDI		BIT(7)</div><div class='add'>+#define PORT_PHY_AUTO_MDIX_DISABLE	BIT(6)</div><div class='add'>+</div><div class='add'>+/* Same as PORT_PHY_LOOPBACK */</div><div class='add'>+#define PORT_PHY_PCS_LOOPBACK		BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_PHY_DIGITAL_DEBUG_2	0x013A</div><div class='add'>+</div><div class='add'>+#define REG_PORT_PHY_DIGITAL_DEBUG_3	0x013C</div><div class='add'>+</div><div class='add'>+#define PORT_100BT_FIXED_LATENCY	BIT(15)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_PHY_PHY_CTRL		0x013E</div><div class='add'>+</div><div class='add'>+#define PORT_INT_PIN_HIGH		BIT(14)</div><div class='add'>+#define PORT_ENABLE_JABBER		BIT(9)</div><div class='add'>+#define PORT_STAT_SPEED_1000MBIT	BIT(6)</div><div class='add'>+#define PORT_STAT_SPEED_100MBIT		BIT(5)</div><div class='add'>+#define PORT_STAT_SPEED_10MBIT		BIT(4)</div><div class='add'>+#define PORT_STAT_FULL_DUPLEX		BIT(3)</div><div class='add'>+</div><div class='add'>+/* Same as PORT_PHY_STAT_MASTER */</div><div class='add'>+#define PORT_STAT_MASTER		BIT(2)</div><div class='add'>+#define PORT_RESET			BIT(1)</div><div class='add'>+#define PORT_LINK_STATUS_FAIL		BIT(0)</div><div class='add'>+</div><div class='add'>+/* 3 - xMII */</div><div class='add'>+#define PORT_SGMII_SEL			BIT(7)</div><div class='add'>+#define PORT_GRXC_ENABLE		BIT(0)</div><div class='add'>+</div><div class='add'>+#define PORT_RMII_CLK_SEL		BIT(7)</div><div class='add'>+#define PORT_MII_SEL_EDGE		BIT(5)</div><div class='add'>+</div><div class='add'>+#define REG_PMAVBC			0x03AC</div><div class='add'>+</div><div class='add'>+#define PMAVBC_MASK			GENMASK(26, 16)</div><div class='add'>+#define PMAVBC_MIN			0x580</div><div class='add'>+</div><div class='add'>+/* 4 - MAC */</div><div class='add'>+#define REG_PORT_MAC_CTRL_0		0x0400</div><div class='add'>+</div><div class='add'>+#define PORT_BROADCAST_STORM		BIT(1)</div><div class='add'>+#define PORT_JUMBO_FRAME		BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_MAC_CTRL_1		0x0401</div><div class='add'>+</div><div class='add'>+#define PORT_BACK_PRESSURE		BIT(3)</div><div class='add'>+#define PORT_PASS_ALL			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_MAC_CTRL_2		0x0402</div><div class='add'>+</div><div class='add'>+#define PORT_100BT_EEE_DISABLE		BIT(7)</div><div class='add'>+#define PORT_1000BT_EEE_DISABLE		BIT(6)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_MAC_IN_RATE_LIMIT	0x0403</div><div class='add'>+</div><div class='add'>+#define PORT_IN_PORT_BASED_S		6</div><div class='add'>+#define PORT_RATE_PACKET_BASED_S	5</div><div class='add'>+#define PORT_IN_FLOW_CTRL_S		4</div><div class='add'>+#define PORT_COUNT_IFG_S		1</div><div class='add'>+#define PORT_COUNT_PREAMBLE_S		0</div><div class='add'>+#define PORT_IN_PORT_BASED		BIT(6)</div><div class='add'>+#define PORT_IN_PACKET_BASED		BIT(5)</div><div class='add'>+#define PORT_IN_FLOW_CTRL		BIT(4)</div><div class='add'>+#define PORT_IN_LIMIT_MODE_M		0x3</div><div class='add'>+#define PORT_IN_LIMIT_MODE_S		2</div><div class='add'>+#define PORT_IN_ALL			0</div><div class='add'>+#define PORT_IN_UNICAST			1</div><div class='add'>+#define PORT_IN_MULTICAST		2</div><div class='add'>+#define PORT_IN_BROADCAST		3</div><div class='add'>+#define PORT_COUNT_IFG			BIT(1)</div><div class='add'>+#define PORT_COUNT_PREAMBLE		BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_IN_RATE_0		0x0410</div><div class='add'>+#define REG_PORT_IN_RATE_1		0x0411</div><div class='add'>+#define REG_PORT_IN_RATE_2		0x0412</div><div class='add'>+#define REG_PORT_IN_RATE_3		0x0413</div><div class='add'>+#define REG_PORT_IN_RATE_4		0x0414</div><div class='add'>+#define REG_PORT_IN_RATE_5		0x0415</div><div class='add'>+#define REG_PORT_IN_RATE_6		0x0416</div><div class='add'>+#define REG_PORT_IN_RATE_7		0x0417</div><div class='add'>+</div><div class='add'>+#define REG_PORT_OUT_RATE_0		0x0420</div><div class='add'>+#define REG_PORT_OUT_RATE_1		0x0421</div><div class='add'>+#define REG_PORT_OUT_RATE_2		0x0422</div><div class='add'>+#define REG_PORT_OUT_RATE_3		0x0423</div><div class='add'>+</div><div class='add'>+#define PORT_RATE_LIMIT_M		(BIT(7) - 1)</div><div class='add'>+</div><div class='add'>+/* 5 - MIB Counters */</div><div class='add'>+#define REG_PORT_MIB_CTRL_STAT__4	0x0500</div><div class='add'>+</div><div class='add'>+#define MIB_COUNTER_READ		BIT(25)</div><div class='add'>+#define MIB_COUNTER_FLUSH_FREEZE	BIT(24)</div><div class='add'>+#define MIB_COUNTER_INDEX_M		(BIT(8) - 1)</div><div class='add'>+#define MIB_COUNTER_INDEX_S		16</div><div class='add'>+#define MIB_COUNTER_DATA_HI_M		0xF</div><div class='add'>+</div><div class='add'>+#define REG_PORT_MIB_DATA		0x0504</div><div class='add'>+</div><div class='add'>+/* 6 - ACL */</div><div class='add'>+#define REG_PORT_ACL_0			0x0600</div><div class='add'>+</div><div class='add'>+#define ACL_FIRST_RULE_M		0xF</div><div class='add'>+</div><div class='add'>+#define REG_PORT_ACL_1			0x0601</div><div class='add'>+</div><div class='add'>+#define ACL_MODE_M			0x3</div><div class='add'>+#define ACL_MODE_S			4</div><div class='add'>+#define ACL_MODE_DISABLE		0</div><div class='add'>+#define ACL_MODE_LAYER_2		1</div><div class='add'>+#define ACL_MODE_LAYER_3		2</div><div class='add'>+#define ACL_MODE_LAYER_4		3</div><div class='add'>+#define ACL_ENABLE_M			0x3</div><div class='add'>+#define ACL_ENABLE_S			2</div><div class='add'>+#define ACL_ENABLE_2_COUNT		0</div><div class='add'>+#define ACL_ENABLE_2_TYPE		1</div><div class='add'>+#define ACL_ENABLE_2_MAC		2</div><div class='add'>+#define ACL_ENABLE_2_BOTH		3</div><div class='add'>+#define ACL_ENABLE_3_IP			1</div><div class='add'>+#define ACL_ENABLE_3_SRC_DST_COMP	2</div><div class='add'>+#define ACL_ENABLE_4_PROTOCOL		0</div><div class='add'>+#define ACL_ENABLE_4_TCP_PORT_COMP	1</div><div class='add'>+#define ACL_ENABLE_4_UDP_PORT_COMP	2</div><div class='add'>+#define ACL_ENABLE_4_TCP_SEQN_COMP	3</div><div class='add'>+#define ACL_SRC				BIT(1)</div><div class='add'>+#define ACL_EQUAL			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_ACL_2			0x0602</div><div class='add'>+#define REG_PORT_ACL_3			0x0603</div><div class='add'>+</div><div class='add'>+#define ACL_MAX_PORT			0xFFFF</div><div class='add'>+</div><div class='add'>+#define REG_PORT_ACL_4			0x0604</div><div class='add'>+#define REG_PORT_ACL_5			0x0605</div><div class='add'>+</div><div class='add'>+#define ACL_MIN_PORT			0xFFFF</div><div class='add'>+#define ACL_IP_ADDR			0xFFFFFFFF</div><div class='add'>+#define ACL_TCP_SEQNUM			0xFFFFFFFF</div><div class='add'>+</div><div class='add'>+#define REG_PORT_ACL_6			0x0606</div><div class='add'>+</div><div class='add'>+#define ACL_RESERVED			0xF8</div><div class='add'>+#define ACL_PORT_MODE_M			0x3</div><div class='add'>+#define ACL_PORT_MODE_S			1</div><div class='add'>+#define ACL_PORT_MODE_DISABLE		0</div><div class='add'>+#define ACL_PORT_MODE_EITHER		1</div><div class='add'>+#define ACL_PORT_MODE_IN_RANGE		2</div><div class='add'>+#define ACL_PORT_MODE_OUT_OF_RANGE	3</div><div class='add'>+</div><div class='add'>+#define REG_PORT_ACL_7			0x0607</div><div class='add'>+</div><div class='add'>+#define ACL_TCP_FLAG_ENABLE		BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_ACL_8			0x0608</div><div class='add'>+</div><div class='add'>+#define ACL_TCP_FLAG_M			0xFF</div><div class='add'>+</div><div class='add'>+#define REG_PORT_ACL_9			0x0609</div><div class='add'>+</div><div class='add'>+#define ACL_TCP_FLAG			0xFF</div><div class='add'>+#define ACL_ETH_TYPE			0xFFFF</div><div class='add'>+#define ACL_IP_M			0xFFFFFFFF</div><div class='add'>+</div><div class='add'>+#define REG_PORT_ACL_A			0x060A</div><div class='add'>+</div><div class='add'>+#define ACL_PRIO_MODE_M			0x3</div><div class='add'>+#define ACL_PRIO_MODE_S			6</div><div class='add'>+#define ACL_PRIO_MODE_DISABLE		0</div><div class='add'>+#define ACL_PRIO_MODE_HIGHER		1</div><div class='add'>+#define ACL_PRIO_MODE_LOWER		2</div><div class='add'>+#define ACL_PRIO_MODE_REPLACE		3</div><div class='add'>+#define ACL_PRIO_M			KS_PRIO_M</div><div class='add'>+#define ACL_PRIO_S			3</div><div class='add'>+#define ACL_VLAN_PRIO_REPLACE		BIT(2)</div><div class='add'>+#define ACL_VLAN_PRIO_M			KS_PRIO_M</div><div class='add'>+#define ACL_VLAN_PRIO_HI_M		0x3</div><div class='add'>+</div><div class='add'>+#define REG_PORT_ACL_B			0x060B</div><div class='add'>+</div><div class='add'>+#define ACL_VLAN_PRIO_LO_M		0x8</div><div class='add'>+#define ACL_VLAN_PRIO_S			7</div><div class='add'>+#define ACL_MAP_MODE_M			0x3</div><div class='add'>+#define ACL_MAP_MODE_S			5</div><div class='add'>+#define ACL_MAP_MODE_DISABLE		0</div><div class='add'>+#define ACL_MAP_MODE_OR			1</div><div class='add'>+#define ACL_MAP_MODE_AND		2</div><div class='add'>+#define ACL_MAP_MODE_REPLACE		3</div><div class='add'>+</div><div class='add'>+#define ACL_CNT_M			(BIT(11) - 1)</div><div class='add'>+#define ACL_CNT_S			5</div><div class='add'>+</div><div class='add'>+#define REG_PORT_ACL_C			0x060C</div><div class='add'>+</div><div class='add'>+#define REG_PORT_ACL_D			0x060D</div><div class='add'>+#define ACL_MSEC_UNIT			BIT(6)</div><div class='add'>+#define ACL_INTR_MODE			BIT(5)</div><div class='add'>+#define ACL_PORT_MAP			0x7F</div><div class='add'>+</div><div class='add'>+#define REG_PORT_ACL_E			0x060E</div><div class='add'>+#define REG_PORT_ACL_F			0x060F</div><div class='add'>+</div><div class='add'>+#define REG_PORT_ACL_BYTE_EN_MSB	0x0610</div><div class='add'>+#define REG_PORT_ACL_BYTE_EN_LSB	0x0611</div><div class='add'>+</div><div class='add'>+#define ACL_ACTION_START		0xA</div><div class='add'>+#define ACL_ACTION_LEN			4</div><div class='add'>+#define ACL_INTR_CNT_START		0xD</div><div class='add'>+#define ACL_RULESET_START		0xE</div><div class='add'>+#define ACL_RULESET_LEN			2</div><div class='add'>+#define ACL_TABLE_LEN			16</div><div class='add'>+</div><div class='add'>+#define ACL_ACTION_ENABLE		0x003C</div><div class='add'>+#define ACL_MATCH_ENABLE		0x7FC3</div><div class='add'>+#define ACL_RULESET_ENABLE		0x8003</div><div class='add'>+#define ACL_BYTE_ENABLE			0xFFFF</div><div class='add'>+</div><div class='add'>+#define REG_PORT_ACL_CTRL_0		0x0612</div><div class='add'>+</div><div class='add'>+#define PORT_ACL_WRITE_DONE		BIT(6)</div><div class='add'>+#define PORT_ACL_READ_DONE		BIT(5)</div><div class='add'>+#define PORT_ACL_WRITE			BIT(4)</div><div class='add'>+#define PORT_ACL_INDEX_M		0xF</div><div class='add'>+</div><div class='add'>+#define REG_PORT_ACL_CTRL_1		0x0613</div><div class='add'>+</div><div class='add'>+/* 8 - Classification and Policing */</div><div class='add'>+#define REG_PORT_MRI_MIRROR_CTRL	0x0800</div><div class='add'>+</div><div class='add'>+#define PORT_MIRROR_RX			BIT(6)</div><div class='add'>+#define PORT_MIRROR_TX			BIT(5)</div><div class='add'>+#define PORT_MIRROR_SNIFFER		BIT(1)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_MRI_PRIO_CTRL		0x0801</div><div class='add'>+</div><div class='add'>+#define PORT_HIGHEST_PRIO		BIT(7)</div><div class='add'>+#define PORT_OR_PRIO			BIT(6)</div><div class='add'>+#define PORT_MAC_PRIO_ENABLE		BIT(4)</div><div class='add'>+#define PORT_VLAN_PRIO_ENABLE		BIT(3)</div><div class='add'>+#define PORT_802_1P_PRIO_ENABLE		BIT(2)</div><div class='add'>+#define PORT_DIFFSERV_PRIO_ENABLE	BIT(1)</div><div class='add'>+#define PORT_ACL_PRIO_ENABLE		BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_MRI_MAC_CTRL		0x0802</div><div class='add'>+</div><div class='add'>+#define PORT_USER_PRIO_CEILING		BIT(7)</div><div class='add'>+#define PORT_DROP_NON_VLAN		BIT(4)</div><div class='add'>+#define PORT_DROP_TAG			BIT(3)</div><div class='add'>+#define PORT_BASED_PRIO_M		KS_PRIO_M</div><div class='add'>+#define PORT_BASED_PRIO_S		0</div><div class='add'>+</div><div class='add'>+#define REG_PORT_MRI_AUTHEN_CTRL	0x0803</div><div class='add'>+</div><div class='add'>+#define PORT_ACL_ENABLE			BIT(2)</div><div class='add'>+#define PORT_AUTHEN_MODE		0x3</div><div class='add'>+#define PORT_AUTHEN_PASS		0</div><div class='add'>+#define PORT_AUTHEN_BLOCK		1</div><div class='add'>+#define PORT_AUTHEN_TRAP		2</div><div class='add'>+</div><div class='add'>+#define REG_PORT_MRI_INDEX__4		0x0804</div><div class='add'>+</div><div class='add'>+#define MRI_INDEX_P_M			0x7</div><div class='add'>+#define MRI_INDEX_P_S			16</div><div class='add'>+#define MRI_INDEX_Q_M			0x3</div><div class='add'>+#define MRI_INDEX_Q_S			0</div><div class='add'>+</div><div class='add'>+#define REG_PORT_MRI_TC_MAP__4		0x0808</div><div class='add'>+</div><div class='add'>+#define PORT_TC_MAP_M			0xf</div><div class='add'>+#define PORT_TC_MAP_S			4</div><div class='add'>+</div><div class='add'>+#define REG_PORT_MRI_POLICE_CTRL__4	0x080C</div><div class='add'>+</div><div class='add'>+#define POLICE_DROP_ALL			BIT(10)</div><div class='add'>+#define POLICE_PACKET_TYPE_M		0x3</div><div class='add'>+#define POLICE_PACKET_TYPE_S		8</div><div class='add'>+#define POLICE_PACKET_DROPPED		0</div><div class='add'>+#define POLICE_PACKET_GREEN		1</div><div class='add'>+#define POLICE_PACKET_YELLOW		2</div><div class='add'>+#define POLICE_PACKET_RED		3</div><div class='add'>+#define PORT_BASED_POLICING		BIT(7)</div><div class='add'>+#define NON_DSCP_COLOR_M		0x3</div><div class='add'>+#define NON_DSCP_COLOR_S		5</div><div class='add'>+#define COLOR_MARK_ENABLE		BIT(4)</div><div class='add'>+#define COLOR_REMAP_ENABLE		BIT(3)</div><div class='add'>+#define POLICE_DROP_SRP			BIT(2)</div><div class='add'>+#define POLICE_COLOR_NOT_AWARE		BIT(1)</div><div class='add'>+#define POLICE_ENABLE			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_POLICE_COLOR_0__4	0x0810</div><div class='add'>+#define REG_PORT_POLICE_COLOR_1__4	0x0814</div><div class='add'>+#define REG_PORT_POLICE_COLOR_2__4	0x0818</div><div class='add'>+#define REG_PORT_POLICE_COLOR_3__4	0x081C</div><div class='add'>+</div><div class='add'>+#define POLICE_COLOR_MAP_S		2</div><div class='add'>+#define POLICE_COLOR_MAP_M		(BIT(POLICE_COLOR_MAP_S) - 1)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_POLICE_RATE__4		0x0820</div><div class='add'>+</div><div class='add'>+#define POLICE_CIR_S			16</div><div class='add'>+#define POLICE_PIR_S			0</div><div class='add'>+</div><div class='add'>+#define REG_PORT_POLICE_BURST_SIZE__4	0x0824</div><div class='add'>+</div><div class='add'>+#define POLICE_BURST_SIZE_M		0x3FFF</div><div class='add'>+#define POLICE_CBS_S			16</div><div class='add'>+#define POLICE_PBS_S			0</div><div class='add'>+</div><div class='add'>+#define REG_PORT_WRED_PM_CTRL_0__4	0x0830</div><div class='add'>+</div><div class='add'>+#define WRED_PM_CTRL_M			(BIT(11) - 1)</div><div class='add'>+</div><div class='add'>+#define WRED_PM_MAX_THRESHOLD_S		16</div><div class='add'>+#define WRED_PM_MIN_THRESHOLD_S		0</div><div class='add'>+</div><div class='add'>+#define REG_PORT_WRED_PM_CTRL_1__4	0x0834</div><div class='add'>+</div><div class='add'>+#define WRED_PM_MULTIPLIER_S		16</div><div class='add'>+#define WRED_PM_AVG_QUEUE_SIZE_S	0</div><div class='add'>+</div><div class='add'>+#define REG_PORT_WRED_QUEUE_CTRL_0__4	0x0840</div><div class='add'>+#define REG_PORT_WRED_QUEUE_CTRL_1__4	0x0844</div><div class='add'>+</div><div class='add'>+#define REG_PORT_WRED_QUEUE_PMON__4	0x0848</div><div class='add'>+</div><div class='add'>+#define WRED_RANDOM_DROP_ENABLE		BIT(31)</div><div class='add'>+#define WRED_PMON_FLUSH			BIT(30)</div><div class='add'>+#define WRED_DROP_GYR_DISABLE		BIT(29)</div><div class='add'>+#define WRED_DROP_YR_DISABLE		BIT(28)</div><div class='add'>+#define WRED_DROP_R_DISABLE		BIT(27)</div><div class='add'>+#define WRED_DROP_ALL			BIT(26)</div><div class='add'>+#define WRED_PMON_M			(BIT(24) - 1)</div><div class='add'>+</div><div class='add'>+/* 9 - Shaping */</div><div class='add'>+</div><div class='add'>+#define REG_PORT_MTI_QUEUE_CTRL_0__4   0x0904</div><div class='add'>+</div><div class='add'>+#define MTI_PVID_REPLACE               BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_MTI_CREDIT_INCREMENT	0x091A</div><div class='add'>+</div><div class='add'>+/* A - QM */</div><div class='add'>+</div><div class='add'>+#define REG_PORT_QM_CTRL__4		0x0A00</div><div class='add'>+</div><div class='add'>+#define PORT_QM_DROP_PRIO_M		0x3</div><div class='add'>+</div><div class='add'>+#define REG_PORT_VLAN_MEMBERSHIP__4	0x0A04</div><div class='add'>+</div><div class='add'>+#define REG_PORT_QM_QUEUE_INDEX__4	0x0A08</div><div class='add'>+</div><div class='add'>+#define PORT_QM_QUEUE_INDEX_S		24</div><div class='add'>+#define PORT_QM_BURST_SIZE_S		16</div><div class='add'>+#define PORT_QM_MIN_RESV_SPACE_M	(BIT(11) - 1)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_QM_WATER_MARK__4	0x0A0C</div><div class='add'>+</div><div class='add'>+#define PORT_QM_HI_WATER_MARK_S		16</div><div class='add'>+#define PORT_QM_LO_WATER_MARK_S		0</div><div class='add'>+#define PORT_QM_WATER_MARK_M		(BIT(11) - 1)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_QM_TX_CNT_0__4		0x0A10</div><div class='add'>+</div><div class='add'>+#define PORT_QM_TX_CNT_USED_S		0</div><div class='add'>+#define PORT_QM_TX_CNT_M		(BIT(11) - 1)</div><div class='add'>+#define PORT_QM_TX_CNT_MAX		0x200</div><div class='add'>+</div><div class='add'>+#define REG_PORT_QM_TX_CNT_1__4		0x0A14</div><div class='add'>+</div><div class='add'>+#define PORT_QM_TX_CNT_CALCULATED_S	16</div><div class='add'>+#define PORT_QM_TX_CNT_AVAIL_S		0</div><div class='add'>+</div><div class='add'>+/* B - LUE */</div><div class='add'>+#define REG_PORT_LUE_CTRL		0x0B00</div><div class='add'>+</div><div class='add'>+#define PORT_VLAN_LOOKUP_VID_0		BIT(7)</div><div class='add'>+#define PORT_INGRESS_FILTER		BIT(6)</div><div class='add'>+#define PORT_DISCARD_NON_VID		BIT(5)</div><div class='add'>+#define PORT_MAC_BASED_802_1X		BIT(4)</div><div class='add'>+#define PORT_SRC_ADDR_FILTER		BIT(3)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_LUE_MSTP_INDEX		0x0B01</div><div class='add'>+</div><div class='add'>+#define REG_PORT_LUE_MSTP_STATE		0x0B04</div><div class='add'>+</div><div class='add'>+/* C - PTP */</div><div class='add'>+</div><div class='add'>+#define REG_PTP_PORT_RX_DELAY__2	0x0C00</div><div class='add'>+#define REG_PTP_PORT_TX_DELAY__2	0x0C02</div><div class='add'>+#define REG_PTP_PORT_ASYM_DELAY__2	0x0C04</div><div class='add'>+</div><div class='add'>+#define REG_PTP_PORT_XDELAY_TS		0x0C08</div><div class='add'>+#define REG_PTP_PORT_XDELAY_TS_H	0x0C08</div><div class='add'>+#define REG_PTP_PORT_XDELAY_TS_L	0x0C0A</div><div class='add'>+</div><div class='add'>+#define REG_PTP_PORT_SYNC_TS		0x0C0C</div><div class='add'>+#define REG_PTP_PORT_SYNC_TS_H		0x0C0C</div><div class='add'>+#define REG_PTP_PORT_SYNC_TS_L		0x0C0E</div><div class='add'>+</div><div class='add'>+#define REG_PTP_PORT_PDRESP_TS		0x0C10</div><div class='add'>+#define REG_PTP_PORT_PDRESP_TS_H	0x0C10</div><div class='add'>+#define REG_PTP_PORT_PDRESP_TS_L	0x0C12</div><div class='add'>+</div><div class='add'>+#define REG_PTP_PORT_TX_INT_STATUS__2	0x0C14</div><div class='add'>+#define REG_PTP_PORT_TX_INT_ENABLE__2	0x0C16</div><div class='add'>+</div><div class='add'>+#define PTP_PORT_SYNC_INT		BIT(15)</div><div class='add'>+#define PTP_PORT_XDELAY_REQ_INT		BIT(14)</div><div class='add'>+#define PTP_PORT_PDELAY_RESP_INT	BIT(13)</div><div class='add'>+</div><div class='add'>+#define REG_PTP_PORT_LINK_DELAY__4	0x0C18</div><div class='add'>+</div><div class='add'>+#define PRIO_QUEUES			4</div><div class='add'>+#define RX_PRIO_QUEUES			8</div><div class='add'>+</div><div class='add'>+#define KS_PRIO_IN_REG			2</div><div class='add'>+</div><div class='add'>+#define TOTAL_PORT_NUM			7</div><div class='add'>+</div><div class='add'>+#define KSZ9477_COUNTER_NUM		0x20</div><div class='add'>+#define TOTAL_KSZ9477_COUNTER_NUM	(KSZ9477_COUNTER_NUM + 2 + 2)</div><div class='add'>+</div><div class='add'>+#define SWITCH_COUNTER_NUM		KSZ9477_COUNTER_NUM</div><div class='add'>+#define TOTAL_SWITCH_COUNTER_NUM	TOTAL_KSZ9477_COUNTER_NUM</div><div class='add'>+</div><div class='add'>+#define P_BCAST_STORM_CTRL		REG_PORT_MAC_CTRL_0</div><div class='add'>+#define P_PRIO_CTRL			REG_PORT_MRI_PRIO_CTRL</div><div class='add'>+#define P_MIRROR_CTRL			REG_PORT_MRI_MIRROR_CTRL</div><div class='add'>+#define P_PHY_CTRL			REG_PORT_PHY_CTRL</div><div class='add'>+#define P_RATE_LIMIT_CTRL		REG_PORT_MAC_IN_RATE_LIMIT</div><div class='add'>+</div><div class='add'>+#define S_LINK_AGING_CTRL		REG_SW_LUE_CTRL_1</div><div class='add'>+#define S_MIRROR_CTRL			REG_SW_MRI_CTRL_0</div><div class='add'>+#define S_REPLACE_VID_CTRL		REG_SW_MAC_CTRL_2</div><div class='add'>+#define S_802_1P_PRIO_CTRL		REG_SW_MAC_802_1P_MAP_0</div><div class='add'>+#define S_TOS_PRIO_CTRL			REG_SW_MAC_TOS_PRIO_0</div><div class='add'>+#define S_FLUSH_TABLE_CTRL		REG_SW_LUE_CTRL_1</div><div class='add'>+</div><div class='add'>+#define SW_FLUSH_DYN_MAC_TABLE		SW_FLUSH_MSTP_TABLE</div><div class='add'>+</div><div class='add'>+#define MAX_TIMESTAMP_UNIT		2</div><div class='add'>+#define MAX_TRIG_UNIT			3</div><div class='add'>+#define MAX_TIMESTAMP_EVENT_UNIT	8</div><div class='add'>+#define MAX_GPIO			4</div><div class='add'>+</div><div class='add'>+#define PTP_TRIG_UNIT_M			(BIT(MAX_TRIG_UNIT) - 1)</div><div class='add'>+#define PTP_TS_UNIT_M			(BIT(MAX_TIMESTAMP_UNIT) - 1)</div><div class='add'>+</div><div class='add'>+#endif /* KSZ9477_REGS_H */</div><div class='head'>diff --git a/drivers/net/dsa/microchip/ksz9477_tc_flower.c b/drivers/net/dsa/microchip/ksz9477_tc_flower.c<br/>new file mode 100644<br/>index 000000000000..ca7830ab168a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz9477_tc_flower.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/ksz9477_tc_flower.c</a></div><div class='hunk'>@@ -0,0 +1,284 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+// Copyright (c) 2023 Pengutronix, Oleksij Rempel &lt;kernel@pengutronix.de&gt;</div><div class='add'>+</div><div class='add'>+#include "ksz9477.h"</div><div class='add'>+#include "ksz9477_reg.h"</div><div class='add'>+#include "ksz_common.h"</div><div class='add'>+</div><div class='add'>+#define ETHER_TYPE_FULL_MASK		cpu_to_be16(~0)</div><div class='add'>+#define KSZ9477_MAX_TC			7</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz9477_flower_parse_key_l2 - Parse Layer 2 key from flow rule and configure</div><div class='add'>+ *                               ACL entries accordingly.</div><div class='add'>+ * @dev: Pointer to the ksz_device.</div><div class='add'>+ * @port: Port number.</div><div class='add'>+ * @extack: Pointer to the netlink_ext_ack.</div><div class='add'>+ * @rule: Pointer to the flow_rule.</div><div class='add'>+ * @cookie: The cookie to associate with the entry.</div><div class='add'>+ * @prio: The priority of the entry.</div><div class='add'>+ *</div><div class='add'>+ * This function parses the Layer 2 key from the flow rule and configures</div><div class='add'>+ * the corresponding ACL entries. It checks for unsupported offloads and</div><div class='add'>+ * available entries before proceeding with the configuration.</div><div class='add'>+ *</div><div class='add'>+ * Returns: 0 on success or a negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int ksz9477_flower_parse_key_l2(struct ksz_device *dev, int port,</div><div class='add'>+				       struct netlink_ext_ack *extack,</div><div class='add'>+				       struct flow_rule *rule,</div><div class='add'>+				       unsigned long cookie, u32 prio)</div><div class='add'>+{</div><div class='add'>+	struct ksz9477_acl_priv *acl = dev-&gt;ports[port].acl_priv;</div><div class='add'>+	struct flow_match_eth_addrs ematch;</div><div class='add'>+	struct ksz9477_acl_entries *acles;</div><div class='add'>+	int required_entries;</div><div class='add'>+	u8 *src_mac = NULL;</div><div class='add'>+	u8 *dst_mac = NULL;</div><div class='add'>+	u16 ethtype = 0;</div><div class='add'>+</div><div class='add'>+	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC)) {</div><div class='add'>+		struct flow_match_basic match;</div><div class='add'>+</div><div class='add'>+		flow_rule_match_basic(rule, &amp;match);</div><div class='add'>+</div><div class='add'>+		if (match.key-&gt;n_proto) {</div><div class='add'>+			if (match.mask-&gt;n_proto != ETHER_TYPE_FULL_MASK) {</div><div class='add'>+				NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+						   "ethernet type mask must be a full mask");</div><div class='add'>+				return -EINVAL;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			ethtype = be16_to_cpu(match.key-&gt;n_proto);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {</div><div class='add'>+		flow_rule_match_eth_addrs(rule, &amp;ematch);</div><div class='add'>+</div><div class='add'>+		if (!is_zero_ether_addr(ematch.key-&gt;src)) {</div><div class='add'>+			if (!is_broadcast_ether_addr(ematch.mask-&gt;src))</div><div class='add'>+				goto not_full_mask_err;</div><div class='add'>+</div><div class='add'>+			src_mac = ematch.key-&gt;src;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!is_zero_ether_addr(ematch.key-&gt;dst)) {</div><div class='add'>+			if (!is_broadcast_ether_addr(ematch.mask-&gt;dst))</div><div class='add'>+				goto not_full_mask_err;</div><div class='add'>+</div><div class='add'>+			dst_mac = ematch.key-&gt;dst;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	acles = &amp;acl-&gt;acles;</div><div class='add'>+	/* ACL supports only one MAC per entry */</div><div class='add'>+	required_entries = src_mac &amp;&amp; dst_mac ? 2 : 1;</div><div class='add'>+</div><div class='add'>+	/* Check if there are enough available entries */</div><div class='add'>+	if (acles-&gt;entries_count + required_entries &gt; KSZ9477_ACL_MAX_ENTRIES) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "ACL entry limit reached");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ksz9477_acl_match_process_l2(dev, port, ethtype, src_mac, dst_mac,</div><div class='add'>+				     cookie, prio);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+not_full_mask_err:</div><div class='add'>+	NL_SET_ERR_MSG_MOD(extack, "MAC address mask must be a full mask");</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz9477_flower_parse_key - Parse flow rule keys for a specified port on a</div><div class='add'>+ *			      ksz_device.</div><div class='add'>+ * @dev: The ksz_device instance.</div><div class='add'>+ * @port: The port number to parse the flow rule keys for.</div><div class='add'>+ * @extack: The netlink extended ACK for reporting errors.</div><div class='add'>+ * @rule: The flow_rule to parse.</div><div class='add'>+ * @cookie: The cookie to associate with the entry.</div><div class='add'>+ * @prio: The priority of the entry.</div><div class='add'>+ *</div><div class='add'>+ * This function checks if the used keys in the flow rule are supported by</div><div class='add'>+ * the device and parses the L2 keys if they match. If unsupported keys are</div><div class='add'>+ * used, an error message is set in the extended ACK.</div><div class='add'>+ *</div><div class='add'>+ * Returns: 0 on success or a negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int ksz9477_flower_parse_key(struct ksz_device *dev, int port,</div><div class='add'>+				    struct netlink_ext_ack *extack,</div><div class='add'>+				    struct flow_rule *rule,</div><div class='add'>+				    unsigned long cookie, u32 prio)</div><div class='add'>+{</div><div class='add'>+	struct flow_dissector *dissector = rule-&gt;match.dissector;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (dissector-&gt;used_keys &amp;</div><div class='add'>+	    ~(BIT_ULL(FLOW_DISSECTOR_KEY_BASIC) |</div><div class='add'>+	      BIT_ULL(FLOW_DISSECTOR_KEY_ETH_ADDRS) |</div><div class='add'>+	      BIT_ULL(FLOW_DISSECTOR_KEY_CONTROL))) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Unsupported keys used");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flow_rule_match_has_control_flags(rule, extack))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC) ||</div><div class='add'>+	    flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {</div><div class='add'>+		ret = ksz9477_flower_parse_key_l2(dev, port, extack, rule,</div><div class='add'>+						  cookie, prio);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz9477_flower_parse_action - Parse flow rule actions for a specified port</div><div class='add'>+ *				 on a ksz_device.</div><div class='add'>+ * @dev: The ksz_device instance.</div><div class='add'>+ * @port: The port number to parse the flow rule actions for.</div><div class='add'>+ * @extack: The netlink extended ACK for reporting errors.</div><div class='add'>+ * @cls: The flow_cls_offload instance containing the flow rule.</div><div class='add'>+ * @entry_idx: The index of the ACL entry to store the action.</div><div class='add'>+ *</div><div class='add'>+ * This function checks if the actions in the flow rule are supported by</div><div class='add'>+ * the device. Currently, only actions that change priorities are supported.</div><div class='add'>+ * If unsupported actions are encountered, an error message is set in the</div><div class='add'>+ * extended ACK.</div><div class='add'>+ *</div><div class='add'>+ * Returns: 0 on success or a negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int ksz9477_flower_parse_action(struct ksz_device *dev, int port,</div><div class='add'>+				       struct netlink_ext_ack *extack,</div><div class='add'>+				       struct flow_cls_offload *cls,</div><div class='add'>+				       int entry_idx)</div><div class='add'>+{</div><div class='add'>+	struct flow_rule *rule = flow_cls_offload_flow_rule(cls);</div><div class='add'>+	struct ksz9477_acl_priv *acl = dev-&gt;ports[port].acl_priv;</div><div class='add'>+	const struct flow_action_entry *act;</div><div class='add'>+	struct ksz9477_acl_entry *entry;</div><div class='add'>+	bool prio_force = false;</div><div class='add'>+	u8 prio_val = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (TC_H_MIN(cls-&gt;classid)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "hw_tc is not supported. Use: action skbedit prio");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	flow_action_for_each(i, act, &amp;rule-&gt;action) {</div><div class='add'>+		switch (act-&gt;id) {</div><div class='add'>+		case FLOW_ACTION_PRIORITY:</div><div class='add'>+			if (act-&gt;priority &gt; KSZ9477_MAX_TC) {</div><div class='add'>+				NL_SET_ERR_MSG_MOD(extack, "Priority value is too high");</div><div class='add'>+				return -EOPNOTSUPP;</div><div class='add'>+			}</div><div class='add'>+			prio_force = true;</div><div class='add'>+			prio_val = act-&gt;priority;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack, "action not supported");</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* pick entry to store action */</div><div class='add'>+	entry = &amp;acl-&gt;acles.entries[entry_idx];</div><div class='add'>+</div><div class='add'>+	ksz9477_acl_action_rule_cfg(entry-&gt;entry, prio_force, prio_val);</div><div class='add'>+	ksz9477_acl_processing_rule_set_action(entry-&gt;entry, entry_idx);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz9477_cls_flower_add - Add a flow classification rule for a specified port</div><div class='add'>+ *			    on a ksz_device.</div><div class='add'>+ * @ds: The DSA switch instance.</div><div class='add'>+ * @port: The port number to add the flow classification rule to.</div><div class='add'>+ * @cls: The flow_cls_offload instance containing the flow rule.</div><div class='add'>+ * @ingress: A flag indicating if the rule is applied on the ingress path.</div><div class='add'>+ *</div><div class='add'>+ * This function adds a flow classification rule for a specified port on a</div><div class='add'>+ * ksz_device. It checks if the ACL offloading is supported and parses the flow</div><div class='add'>+ * keys and actions. If the ACL is not supported, it returns an error. If there</div><div class='add'>+ * are unprocessed entries, it parses the action for the rule.</div><div class='add'>+ *</div><div class='add'>+ * Returns: 0 on success or a negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+int ksz9477_cls_flower_add(struct dsa_switch *ds, int port,</div><div class='add'>+			   struct flow_cls_offload *cls, bool ingress)</div><div class='add'>+{</div><div class='add'>+	struct flow_rule *rule = flow_cls_offload_flow_rule(cls);</div><div class='add'>+	struct netlink_ext_ack *extack = cls-&gt;common.extack;</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	struct ksz9477_acl_priv *acl;</div><div class='add'>+	int action_entry_idx;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	acl = dev-&gt;ports[port].acl_priv;</div><div class='add'>+</div><div class='add'>+	if (!acl) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "ACL offloading is not supported");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* A complex rule set can take multiple entries. Use first entry</div><div class='add'>+	 * to store the action.</div><div class='add'>+	 */</div><div class='add'>+	action_entry_idx = acl-&gt;acles.entries_count;</div><div class='add'>+</div><div class='add'>+	ret = ksz9477_flower_parse_key(dev, port, extack, rule, cls-&gt;cookie,</div><div class='add'>+				       cls-&gt;common.prio);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ksz9477_flower_parse_action(dev, port, extack, cls,</div><div class='add'>+					  action_entry_idx);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ksz9477_sort_acl_entries(dev, port);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return ksz9477_acl_write_list(dev, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz9477_cls_flower_del - Remove a flow classification rule for a specified</div><div class='add'>+ *			    port on a ksz_device.</div><div class='add'>+ * @ds: The DSA switch instance.</div><div class='add'>+ * @port: The port number to remove the flow classification rule from.</div><div class='add'>+ * @cls: The flow_cls_offload instance containing the flow rule.</div><div class='add'>+ * @ingress: A flag indicating if the rule is applied on the ingress path.</div><div class='add'>+ *</div><div class='add'>+ * This function removes a flow classification rule for a specified port on a</div><div class='add'>+ * ksz_device. It checks if the ACL is initialized, and if not, returns an</div><div class='add'>+ * error. If the ACL is initialized, it removes entries with the specified</div><div class='add'>+ * cookie and rewrites the ACL list.</div><div class='add'>+ *</div><div class='add'>+ * Returns: 0 on success or a negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+int ksz9477_cls_flower_del(struct dsa_switch *ds, int port,</div><div class='add'>+			   struct flow_cls_offload *cls, bool ingress)</div><div class='add'>+{</div><div class='add'>+	unsigned long cookie = cls-&gt;cookie;</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	struct ksz9477_acl_priv *acl;</div><div class='add'>+</div><div class='add'>+	acl = dev-&gt;ports[port].acl_priv;</div><div class='add'>+</div><div class='add'>+	if (!acl)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	ksz9477_acl_remove_entries(dev, port, &amp;acl-&gt;acles, cookie);</div><div class='add'>+</div><div class='add'>+	return ksz9477_acl_write_list(dev, port);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/microchip/ksz_common.c<br/>new file mode 100644<br/>index 000000000000..0c10351fe5eb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz_common.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/ksz_common.c</a></div><div class='hunk'>@@ -0,0 +1,5571 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Microchip switch driver main logic</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2017-2025 Microchip Technology Inc.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/dsa/ksz_common.h&gt;</div><div class='add'>+#include &lt;linux/export.h&gt;</div><div class='add'>+#include &lt;linux/gpio/consumer.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/platform_data/microchip-ksz.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/if_bridge.h&gt;</div><div class='add'>+#include &lt;linux/if_vlan.h&gt;</div><div class='add'>+#include &lt;linux/if_hsr.h&gt;</div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/irqdomain.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_mdio.h&gt;</div><div class='add'>+#include &lt;linux/of_net.h&gt;</div><div class='add'>+#include &lt;linux/micrel_phy.h&gt;</div><div class='add'>+#include &lt;linux/pinctrl/consumer.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+#include &lt;net/ieee8021q.h&gt;</div><div class='add'>+#include &lt;net/pkt_cls.h&gt;</div><div class='add'>+#include &lt;net/switchdev.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ksz_common.h"</div><div class='add'>+#include "ksz_dcb.h"</div><div class='add'>+#include "ksz_ptp.h"</div><div class='add'>+#include "ksz8.h"</div><div class='add'>+#include "ksz9477.h"</div><div class='add'>+#include "lan937x.h"</div><div class='add'>+</div><div class='add'>+#define MIB_COUNTER_NUM 0x20</div><div class='add'>+</div><div class='add'>+struct ksz_stats_raw {</div><div class='add'>+	u64 rx_hi;</div><div class='add'>+	u64 rx_undersize;</div><div class='add'>+	u64 rx_fragments;</div><div class='add'>+	u64 rx_oversize;</div><div class='add'>+	u64 rx_jabbers;</div><div class='add'>+	u64 rx_symbol_err;</div><div class='add'>+	u64 rx_crc_err;</div><div class='add'>+	u64 rx_align_err;</div><div class='add'>+	u64 rx_mac_ctrl;</div><div class='add'>+	u64 rx_pause;</div><div class='add'>+	u64 rx_bcast;</div><div class='add'>+	u64 rx_mcast;</div><div class='add'>+	u64 rx_ucast;</div><div class='add'>+	u64 rx_64_or_less;</div><div class='add'>+	u64 rx_65_127;</div><div class='add'>+	u64 rx_128_255;</div><div class='add'>+	u64 rx_256_511;</div><div class='add'>+	u64 rx_512_1023;</div><div class='add'>+	u64 rx_1024_1522;</div><div class='add'>+	u64 rx_1523_2000;</div><div class='add'>+	u64 rx_2001;</div><div class='add'>+	u64 tx_hi;</div><div class='add'>+	u64 tx_late_col;</div><div class='add'>+	u64 tx_pause;</div><div class='add'>+	u64 tx_bcast;</div><div class='add'>+	u64 tx_mcast;</div><div class='add'>+	u64 tx_ucast;</div><div class='add'>+	u64 tx_deferred;</div><div class='add'>+	u64 tx_total_col;</div><div class='add'>+	u64 tx_exc_col;</div><div class='add'>+	u64 tx_single_col;</div><div class='add'>+	u64 tx_mult_col;</div><div class='add'>+	u64 rx_total;</div><div class='add'>+	u64 tx_total;</div><div class='add'>+	u64 rx_discards;</div><div class='add'>+	u64 tx_discards;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ksz88xx_stats_raw {</div><div class='add'>+	u64 rx;</div><div class='add'>+	u64 rx_hi;</div><div class='add'>+	u64 rx_undersize;</div><div class='add'>+	u64 rx_fragments;</div><div class='add'>+	u64 rx_oversize;</div><div class='add'>+	u64 rx_jabbers;</div><div class='add'>+	u64 rx_symbol_err;</div><div class='add'>+	u64 rx_crc_err;</div><div class='add'>+	u64 rx_align_err;</div><div class='add'>+	u64 rx_mac_ctrl;</div><div class='add'>+	u64 rx_pause;</div><div class='add'>+	u64 rx_bcast;</div><div class='add'>+	u64 rx_mcast;</div><div class='add'>+	u64 rx_ucast;</div><div class='add'>+	u64 rx_64_or_less;</div><div class='add'>+	u64 rx_65_127;</div><div class='add'>+	u64 rx_128_255;</div><div class='add'>+	u64 rx_256_511;</div><div class='add'>+	u64 rx_512_1023;</div><div class='add'>+	u64 rx_1024_1522;</div><div class='add'>+	u64 tx;</div><div class='add'>+	u64 tx_hi;</div><div class='add'>+	u64 tx_late_col;</div><div class='add'>+	u64 tx_pause;</div><div class='add'>+	u64 tx_bcast;</div><div class='add'>+	u64 tx_mcast;</div><div class='add'>+	u64 tx_ucast;</div><div class='add'>+	u64 tx_deferred;</div><div class='add'>+	u64 tx_total_col;</div><div class='add'>+	u64 tx_exc_col;</div><div class='add'>+	u64 tx_single_col;</div><div class='add'>+	u64 tx_mult_col;</div><div class='add'>+	u64 rx_discards;</div><div class='add'>+	u64 tx_discards;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ksz_mib_names ksz88xx_mib_names[] = {</div><div class='add'>+	{ 0x00, "rx" },</div><div class='add'>+	{ 0x01, "rx_hi" },</div><div class='add'>+	{ 0x02, "rx_undersize" },</div><div class='add'>+	{ 0x03, "rx_fragments" },</div><div class='add'>+	{ 0x04, "rx_oversize" },</div><div class='add'>+	{ 0x05, "rx_jabbers" },</div><div class='add'>+	{ 0x06, "rx_symbol_err" },</div><div class='add'>+	{ 0x07, "rx_crc_err" },</div><div class='add'>+	{ 0x08, "rx_align_err" },</div><div class='add'>+	{ 0x09, "rx_mac_ctrl" },</div><div class='add'>+	{ 0x0a, "rx_pause" },</div><div class='add'>+	{ 0x0b, "rx_bcast" },</div><div class='add'>+	{ 0x0c, "rx_mcast" },</div><div class='add'>+	{ 0x0d, "rx_ucast" },</div><div class='add'>+	{ 0x0e, "rx_64_or_less" },</div><div class='add'>+	{ 0x0f, "rx_65_127" },</div><div class='add'>+	{ 0x10, "rx_128_255" },</div><div class='add'>+	{ 0x11, "rx_256_511" },</div><div class='add'>+	{ 0x12, "rx_512_1023" },</div><div class='add'>+	{ 0x13, "rx_1024_1522" },</div><div class='add'>+	{ 0x14, "tx" },</div><div class='add'>+	{ 0x15, "tx_hi" },</div><div class='add'>+	{ 0x16, "tx_late_col" },</div><div class='add'>+	{ 0x17, "tx_pause" },</div><div class='add'>+	{ 0x18, "tx_bcast" },</div><div class='add'>+	{ 0x19, "tx_mcast" },</div><div class='add'>+	{ 0x1a, "tx_ucast" },</div><div class='add'>+	{ 0x1b, "tx_deferred" },</div><div class='add'>+	{ 0x1c, "tx_total_col" },</div><div class='add'>+	{ 0x1d, "tx_exc_col" },</div><div class='add'>+	{ 0x1e, "tx_single_col" },</div><div class='add'>+	{ 0x1f, "tx_mult_col" },</div><div class='add'>+	{ 0x100, "rx_discards" },</div><div class='add'>+	{ 0x101, "tx_discards" },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ksz_mib_names ksz9477_mib_names[] = {</div><div class='add'>+	{ 0x00, "rx_hi" },</div><div class='add'>+	{ 0x01, "rx_undersize" },</div><div class='add'>+	{ 0x02, "rx_fragments" },</div><div class='add'>+	{ 0x03, "rx_oversize" },</div><div class='add'>+	{ 0x04, "rx_jabbers" },</div><div class='add'>+	{ 0x05, "rx_symbol_err" },</div><div class='add'>+	{ 0x06, "rx_crc_err" },</div><div class='add'>+	{ 0x07, "rx_align_err" },</div><div class='add'>+	{ 0x08, "rx_mac_ctrl" },</div><div class='add'>+	{ 0x09, "rx_pause" },</div><div class='add'>+	{ 0x0A, "rx_bcast" },</div><div class='add'>+	{ 0x0B, "rx_mcast" },</div><div class='add'>+	{ 0x0C, "rx_ucast" },</div><div class='add'>+	{ 0x0D, "rx_64_or_less" },</div><div class='add'>+	{ 0x0E, "rx_65_127" },</div><div class='add'>+	{ 0x0F, "rx_128_255" },</div><div class='add'>+	{ 0x10, "rx_256_511" },</div><div class='add'>+	{ 0x11, "rx_512_1023" },</div><div class='add'>+	{ 0x12, "rx_1024_1522" },</div><div class='add'>+	{ 0x13, "rx_1523_2000" },</div><div class='add'>+	{ 0x14, "rx_2001" },</div><div class='add'>+	{ 0x15, "tx_hi" },</div><div class='add'>+	{ 0x16, "tx_late_col" },</div><div class='add'>+	{ 0x17, "tx_pause" },</div><div class='add'>+	{ 0x18, "tx_bcast" },</div><div class='add'>+	{ 0x19, "tx_mcast" },</div><div class='add'>+	{ 0x1A, "tx_ucast" },</div><div class='add'>+	{ 0x1B, "tx_deferred" },</div><div class='add'>+	{ 0x1C, "tx_total_col" },</div><div class='add'>+	{ 0x1D, "tx_exc_col" },</div><div class='add'>+	{ 0x1E, "tx_single_col" },</div><div class='add'>+	{ 0x1F, "tx_mult_col" },</div><div class='add'>+	{ 0x80, "rx_total" },</div><div class='add'>+	{ 0x81, "tx_total" },</div><div class='add'>+	{ 0x82, "rx_discards" },</div><div class='add'>+	{ 0x83, "tx_discards" },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ksz_driver_strength_prop {</div><div class='add'>+	const char *name;</div><div class='add'>+	int offset;</div><div class='add'>+	int value;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum ksz_driver_strength_type {</div><div class='add'>+	KSZ_DRIVER_STRENGTH_HI,</div><div class='add'>+	KSZ_DRIVER_STRENGTH_LO,</div><div class='add'>+	KSZ_DRIVER_STRENGTH_IO,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct ksz_drive_strength - drive strength mapping</div><div class='add'>+ * @reg_val:	register value</div><div class='add'>+ * @microamp:	microamp value</div><div class='add'>+ */</div><div class='add'>+struct ksz_drive_strength {</div><div class='add'>+	u32 reg_val;</div><div class='add'>+	u32 microamp;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* ksz9477_drive_strengths - Drive strength mapping for KSZ9477 variants</div><div class='add'>+ *</div><div class='add'>+ * This values are not documented in KSZ9477 variants but confirmed by</div><div class='add'>+ * Microchip that KSZ9477, KSZ9567, KSZ8567, KSZ9897, KSZ9896, KSZ9563, KSZ9893</div><div class='add'>+ * and KSZ8563 are using same register (drive strength) settings like KSZ8795.</div><div class='add'>+ *</div><div class='add'>+ * Documentation in KSZ8795CLX provides more information with some</div><div class='add'>+ * recommendations:</div><div class='add'>+ * - for high speed signals</div><div class='add'>+ *   1. 4 mA or 8 mA is often used for MII, RMII, and SPI interface with using</div><div class='add'>+ *      2.5V or 3.3V VDDIO.</div><div class='add'>+ *   2. 12 mA or 16 mA is often used for MII, RMII, and SPI interface with</div><div class='add'>+ *      using 1.8V VDDIO.</div><div class='add'>+ *   3. 20 mA or 24 mA is often used for GMII/RGMII interface with using 2.5V</div><div class='add'>+ *      or 3.3V VDDIO.</div><div class='add'>+ *   4. 28 mA is often used for GMII/RGMII interface with using 1.8V VDDIO.</div><div class='add'>+ *   5. In same interface, the heavy loading should use higher one of the</div><div class='add'>+ *      drive current strength.</div><div class='add'>+ * - for low speed signals</div><div class='add'>+ *   1. 3.3V VDDIO, use either 4 mA or 8 mA.</div><div class='add'>+ *   2. 2.5V VDDIO, use either 8 mA or 12 mA.</div><div class='add'>+ *   3. 1.8V VDDIO, use either 12 mA or 16 mA.</div><div class='add'>+ *   4. If it is heavy loading, can use higher drive current strength.</div><div class='add'>+ */</div><div class='add'>+static const struct ksz_drive_strength ksz9477_drive_strengths[] = {</div><div class='add'>+	{ SW_DRIVE_STRENGTH_2MA,  2000 },</div><div class='add'>+	{ SW_DRIVE_STRENGTH_4MA,  4000 },</div><div class='add'>+	{ SW_DRIVE_STRENGTH_8MA,  8000 },</div><div class='add'>+	{ SW_DRIVE_STRENGTH_12MA, 12000 },</div><div class='add'>+	{ SW_DRIVE_STRENGTH_16MA, 16000 },</div><div class='add'>+	{ SW_DRIVE_STRENGTH_20MA, 20000 },</div><div class='add'>+	{ SW_DRIVE_STRENGTH_24MA, 24000 },</div><div class='add'>+	{ SW_DRIVE_STRENGTH_28MA, 28000 },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* ksz88x3_drive_strengths - Drive strength mapping for KSZ8863, KSZ8873, ..</div><div class='add'>+ *			     variants.</div><div class='add'>+ * This values are documented in KSZ8873 and KSZ8863 datasheets.</div><div class='add'>+ */</div><div class='add'>+static const struct ksz_drive_strength ksz88x3_drive_strengths[] = {</div><div class='add'>+	{ 0,  8000 },</div><div class='add'>+	{ KSZ8873_DRIVE_STRENGTH_16MA, 16000 },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void ksz88x3_phylink_mac_config(struct phylink_config *config,</div><div class='add'>+				       unsigned int mode,</div><div class='add'>+				       const struct phylink_link_state *state);</div><div class='add'>+static void ksz_phylink_mac_config(struct phylink_config *config,</div><div class='add'>+				   unsigned int mode,</div><div class='add'>+				   const struct phylink_link_state *state);</div><div class='add'>+static void ksz_phylink_mac_link_down(struct phylink_config *config,</div><div class='add'>+				      unsigned int mode,</div><div class='add'>+				      phy_interface_t interface);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_phylink_mac_disable_tx_lpi() - Callback to signal LPI support (Dummy)</div><div class='add'>+ * @config: phylink config structure</div><div class='add'>+ *</div><div class='add'>+ * This function is a dummy handler. See ksz_phylink_mac_enable_tx_lpi() for</div><div class='add'>+ * a detailed explanation of EEE/LPI handling in KSZ switches.</div><div class='add'>+ */</div><div class='add'>+static void ksz_phylink_mac_disable_tx_lpi(struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_phylink_mac_enable_tx_lpi() - Callback to signal LPI support (Dummy)</div><div class='add'>+ * @config: phylink config structure</div><div class='add'>+ * @timer: timer value before entering LPI (unused)</div><div class='add'>+ * @tx_clock_stop: whether to stop the TX clock in LPI mode (unused)</div><div class='add'>+ *</div><div class='add'>+ * This function signals to phylink that the driver architecture supports</div><div class='add'>+ * LPI management, enabling phylink to control EEE advertisement during</div><div class='add'>+ * negotiation according to IEEE Std 802.3 (Clause 78).</div><div class='add'>+ *</div><div class='add'>+ * Hardware Management of EEE/LPI State:</div><div class='add'>+ * For KSZ switch ports with integrated PHYs (e.g., KSZ9893R ports 1-2),</div><div class='add'>+ * observation and testing suggest that the actual EEE / Low Power Idle (LPI)</div><div class='add'>+ * state transitions are managed autonomously by the hardware based on</div><div class='add'>+ * the auto-negotiation results. (Note: While the datasheet describes EEE</div><div class='add'>+ * operation based on negotiation, it doesn't explicitly detail the internal</div><div class='add'>+ * MAC/PHY interaction, so autonomous hardware management of the MAC state</div><div class='add'>+ * for LPI is inferred from observed behavior).</div><div class='add'>+ * This hardware control, consistent with the switch's ability to operate</div><div class='add'>+ * autonomously via strapping, means MAC-level software intervention is not</div><div class='add'>+ * required or exposed for managing the LPI state once EEE is negotiated.</div><div class='add'>+ * (Ref: KSZ9893R Data Sheet DS00002420D, primarily Section 4.7.5 explaining</div><div class='add'>+ * EEE, also Sections 4.1.7 on Auto-Negotiation and 3.2.1 on Configuration</div><div class='add'>+ * Straps).</div><div class='add'>+ *</div><div class='add'>+ * Additionally, ports configured as MAC interfaces (e.g., KSZ9893R port 3)</div><div class='add'>+ * lack documented MAC-level LPI control.</div><div class='add'>+ *</div><div class='add'>+ * Therefore, this callback performs no action and serves primarily to inform</div><div class='add'>+ * phylink of LPI awareness and to document the inferred hardware behavior.</div><div class='add'>+ *</div><div class='add'>+ * Returns: 0 (Always success)</div><div class='add'>+ */</div><div class='add'>+static int ksz_phylink_mac_enable_tx_lpi(struct phylink_config *config,</div><div class='add'>+					 u32 timer, bool tx_clock_stop)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct phylink_mac_ops ksz88x3_phylink_mac_ops = {</div><div class='add'>+	.mac_config	= ksz88x3_phylink_mac_config,</div><div class='add'>+	.mac_link_down	= ksz_phylink_mac_link_down,</div><div class='add'>+	.mac_link_up	= ksz8_phylink_mac_link_up,</div><div class='add'>+	.mac_disable_tx_lpi = ksz_phylink_mac_disable_tx_lpi,</div><div class='add'>+	.mac_enable_tx_lpi = ksz_phylink_mac_enable_tx_lpi,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct phylink_mac_ops ksz8_phylink_mac_ops = {</div><div class='add'>+	.mac_config	= ksz_phylink_mac_config,</div><div class='add'>+	.mac_link_down	= ksz_phylink_mac_link_down,</div><div class='add'>+	.mac_link_up	= ksz8_phylink_mac_link_up,</div><div class='add'>+	.mac_disable_tx_lpi = ksz_phylink_mac_disable_tx_lpi,</div><div class='add'>+	.mac_enable_tx_lpi = ksz_phylink_mac_enable_tx_lpi,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ksz_dev_ops ksz8463_dev_ops = {</div><div class='add'>+	.setup = ksz8_setup,</div><div class='add'>+	.get_port_addr = ksz8463_get_port_addr,</div><div class='add'>+	.cfg_port_member = ksz8_cfg_port_member,</div><div class='add'>+	.flush_dyn_mac_table = ksz8_flush_dyn_mac_table,</div><div class='add'>+	.port_setup = ksz8_port_setup,</div><div class='add'>+	.r_phy = ksz8463_r_phy,</div><div class='add'>+	.w_phy = ksz8463_w_phy,</div><div class='add'>+	.r_mib_cnt = ksz8_r_mib_cnt,</div><div class='add'>+	.r_mib_pkt = ksz8_r_mib_pkt,</div><div class='add'>+	.r_mib_stat64 = ksz88xx_r_mib_stats64,</div><div class='add'>+	.freeze_mib = ksz8_freeze_mib,</div><div class='add'>+	.port_init_cnt = ksz8_port_init_cnt,</div><div class='add'>+	.fdb_dump = ksz8_fdb_dump,</div><div class='add'>+	.fdb_add = ksz8_fdb_add,</div><div class='add'>+	.fdb_del = ksz8_fdb_del,</div><div class='add'>+	.mdb_add = ksz8_mdb_add,</div><div class='add'>+	.mdb_del = ksz8_mdb_del,</div><div class='add'>+	.vlan_filtering = ksz8_port_vlan_filtering,</div><div class='add'>+	.vlan_add = ksz8_port_vlan_add,</div><div class='add'>+	.vlan_del = ksz8_port_vlan_del,</div><div class='add'>+	.mirror_add = ksz8_port_mirror_add,</div><div class='add'>+	.mirror_del = ksz8_port_mirror_del,</div><div class='add'>+	.get_caps = ksz8_get_caps,</div><div class='add'>+	.config_cpu_port = ksz8_config_cpu_port,</div><div class='add'>+	.enable_stp_addr = ksz8_enable_stp_addr,</div><div class='add'>+	.reset = ksz8_reset_switch,</div><div class='add'>+	.init = ksz8_switch_init,</div><div class='add'>+	.exit = ksz8_switch_exit,</div><div class='add'>+	.change_mtu = ksz8_change_mtu,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ksz_dev_ops ksz88xx_dev_ops = {</div><div class='add'>+	.setup = ksz8_setup,</div><div class='add'>+	.get_port_addr = ksz8_get_port_addr,</div><div class='add'>+	.cfg_port_member = ksz8_cfg_port_member,</div><div class='add'>+	.flush_dyn_mac_table = ksz8_flush_dyn_mac_table,</div><div class='add'>+	.port_setup = ksz8_port_setup,</div><div class='add'>+	.r_phy = ksz8_r_phy,</div><div class='add'>+	.w_phy = ksz8_w_phy,</div><div class='add'>+	.r_mib_cnt = ksz8_r_mib_cnt,</div><div class='add'>+	.r_mib_pkt = ksz8_r_mib_pkt,</div><div class='add'>+	.r_mib_stat64 = ksz88xx_r_mib_stats64,</div><div class='add'>+	.freeze_mib = ksz8_freeze_mib,</div><div class='add'>+	.port_init_cnt = ksz8_port_init_cnt,</div><div class='add'>+	.fdb_dump = ksz8_fdb_dump,</div><div class='add'>+	.fdb_add = ksz8_fdb_add,</div><div class='add'>+	.fdb_del = ksz8_fdb_del,</div><div class='add'>+	.mdb_add = ksz8_mdb_add,</div><div class='add'>+	.mdb_del = ksz8_mdb_del,</div><div class='add'>+	.vlan_filtering = ksz8_port_vlan_filtering,</div><div class='add'>+	.vlan_add = ksz8_port_vlan_add,</div><div class='add'>+	.vlan_del = ksz8_port_vlan_del,</div><div class='add'>+	.mirror_add = ksz8_port_mirror_add,</div><div class='add'>+	.mirror_del = ksz8_port_mirror_del,</div><div class='add'>+	.get_caps = ksz8_get_caps,</div><div class='add'>+	.config_cpu_port = ksz8_config_cpu_port,</div><div class='add'>+	.enable_stp_addr = ksz8_enable_stp_addr,</div><div class='add'>+	.reset = ksz8_reset_switch,</div><div class='add'>+	.init = ksz8_switch_init,</div><div class='add'>+	.exit = ksz8_switch_exit,</div><div class='add'>+	.change_mtu = ksz8_change_mtu,</div><div class='add'>+	.pme_write8 = ksz8_pme_write8,</div><div class='add'>+	.pme_pread8 = ksz8_pme_pread8,</div><div class='add'>+	.pme_pwrite8 = ksz8_pme_pwrite8,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ksz_dev_ops ksz87xx_dev_ops = {</div><div class='add'>+	.setup = ksz8_setup,</div><div class='add'>+	.get_port_addr = ksz8_get_port_addr,</div><div class='add'>+	.cfg_port_member = ksz8_cfg_port_member,</div><div class='add'>+	.flush_dyn_mac_table = ksz8_flush_dyn_mac_table,</div><div class='add'>+	.port_setup = ksz8_port_setup,</div><div class='add'>+	.r_phy = ksz8_r_phy,</div><div class='add'>+	.w_phy = ksz8_w_phy,</div><div class='add'>+	.r_mib_cnt = ksz8_r_mib_cnt,</div><div class='add'>+	.r_mib_pkt = ksz8_r_mib_pkt,</div><div class='add'>+	.r_mib_stat64 = ksz_r_mib_stats64,</div><div class='add'>+	.freeze_mib = ksz8_freeze_mib,</div><div class='add'>+	.port_init_cnt = ksz8_port_init_cnt,</div><div class='add'>+	.fdb_dump = ksz8_fdb_dump,</div><div class='add'>+	.fdb_add = ksz8_fdb_add,</div><div class='add'>+	.fdb_del = ksz8_fdb_del,</div><div class='add'>+	.mdb_add = ksz8_mdb_add,</div><div class='add'>+	.mdb_del = ksz8_mdb_del,</div><div class='add'>+	.vlan_filtering = ksz8_port_vlan_filtering,</div><div class='add'>+	.vlan_add = ksz8_port_vlan_add,</div><div class='add'>+	.vlan_del = ksz8_port_vlan_del,</div><div class='add'>+	.mirror_add = ksz8_port_mirror_add,</div><div class='add'>+	.mirror_del = ksz8_port_mirror_del,</div><div class='add'>+	.get_caps = ksz8_get_caps,</div><div class='add'>+	.config_cpu_port = ksz8_config_cpu_port,</div><div class='add'>+	.enable_stp_addr = ksz8_enable_stp_addr,</div><div class='add'>+	.reset = ksz8_reset_switch,</div><div class='add'>+	.init = ksz8_switch_init,</div><div class='add'>+	.exit = ksz8_switch_exit,</div><div class='add'>+	.change_mtu = ksz8_change_mtu,</div><div class='add'>+	.pme_write8 = ksz8_pme_write8,</div><div class='add'>+	.pme_pread8 = ksz8_pme_pread8,</div><div class='add'>+	.pme_pwrite8 = ksz8_pme_pwrite8,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void ksz9477_phylink_mac_link_up(struct phylink_config *config,</div><div class='add'>+					struct phy_device *phydev,</div><div class='add'>+					unsigned int mode,</div><div class='add'>+					phy_interface_t interface,</div><div class='add'>+					int speed, int duplex, bool tx_pause,</div><div class='add'>+					bool rx_pause);</div><div class='add'>+</div><div class='add'>+static struct phylink_pcs *</div><div class='add'>+ksz_phylink_mac_select_pcs(struct phylink_config *config,</div><div class='add'>+			   phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct ksz_device *dev = dp-&gt;ds-&gt;priv;</div><div class='add'>+	struct ksz_port *p = &amp;dev-&gt;ports[dp-&gt;index];</div><div class='add'>+</div><div class='add'>+	if (ksz_is_sgmii_port(dev, dp-&gt;index) &amp;&amp;</div><div class='add'>+	    (interface == PHY_INTERFACE_MODE_SGMII ||</div><div class='add'>+	    interface == PHY_INTERFACE_MODE_1000BASEX))</div><div class='add'>+		return p-&gt;pcs;</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct phylink_mac_ops ksz9477_phylink_mac_ops = {</div><div class='add'>+	.mac_config	= ksz_phylink_mac_config,</div><div class='add'>+	.mac_link_down	= ksz_phylink_mac_link_down,</div><div class='add'>+	.mac_link_up	= ksz9477_phylink_mac_link_up,</div><div class='add'>+	.mac_disable_tx_lpi = ksz_phylink_mac_disable_tx_lpi,</div><div class='add'>+	.mac_enable_tx_lpi = ksz_phylink_mac_enable_tx_lpi,</div><div class='add'>+	.mac_select_pcs	= ksz_phylink_mac_select_pcs,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ksz_dev_ops ksz9477_dev_ops = {</div><div class='add'>+	.setup = ksz9477_setup,</div><div class='add'>+	.get_port_addr = ksz9477_get_port_addr,</div><div class='add'>+	.cfg_port_member = ksz9477_cfg_port_member,</div><div class='add'>+	.flush_dyn_mac_table = ksz9477_flush_dyn_mac_table,</div><div class='add'>+	.port_setup = ksz9477_port_setup,</div><div class='add'>+	.set_ageing_time = ksz9477_set_ageing_time,</div><div class='add'>+	.r_phy = ksz9477_r_phy,</div><div class='add'>+	.w_phy = ksz9477_w_phy,</div><div class='add'>+	.r_mib_cnt = ksz9477_r_mib_cnt,</div><div class='add'>+	.r_mib_pkt = ksz9477_r_mib_pkt,</div><div class='add'>+	.r_mib_stat64 = ksz_r_mib_stats64,</div><div class='add'>+	.freeze_mib = ksz9477_freeze_mib,</div><div class='add'>+	.port_init_cnt = ksz9477_port_init_cnt,</div><div class='add'>+	.vlan_filtering = ksz9477_port_vlan_filtering,</div><div class='add'>+	.vlan_add = ksz9477_port_vlan_add,</div><div class='add'>+	.vlan_del = ksz9477_port_vlan_del,</div><div class='add'>+	.mirror_add = ksz9477_port_mirror_add,</div><div class='add'>+	.mirror_del = ksz9477_port_mirror_del,</div><div class='add'>+	.get_caps = ksz9477_get_caps,</div><div class='add'>+	.fdb_dump = ksz9477_fdb_dump,</div><div class='add'>+	.fdb_add = ksz9477_fdb_add,</div><div class='add'>+	.fdb_del = ksz9477_fdb_del,</div><div class='add'>+	.mdb_add = ksz9477_mdb_add,</div><div class='add'>+	.mdb_del = ksz9477_mdb_del,</div><div class='add'>+	.change_mtu = ksz9477_change_mtu,</div><div class='add'>+	.pme_write8 = ksz_write8,</div><div class='add'>+	.pme_pread8 = ksz_pread8,</div><div class='add'>+	.pme_pwrite8 = ksz_pwrite8,</div><div class='add'>+	.config_cpu_port = ksz9477_config_cpu_port,</div><div class='add'>+	.tc_cbs_set_cinc = ksz9477_tc_cbs_set_cinc,</div><div class='add'>+	.enable_stp_addr = ksz9477_enable_stp_addr,</div><div class='add'>+	.reset = ksz9477_reset_switch,</div><div class='add'>+	.init = ksz9477_switch_init,</div><div class='add'>+	.exit = ksz9477_switch_exit,</div><div class='add'>+	.pcs_create = ksz9477_pcs_create,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct phylink_mac_ops lan937x_phylink_mac_ops = {</div><div class='add'>+	.mac_config	= ksz_phylink_mac_config,</div><div class='add'>+	.mac_link_down	= ksz_phylink_mac_link_down,</div><div class='add'>+	.mac_link_up	= ksz9477_phylink_mac_link_up,</div><div class='add'>+	.mac_disable_tx_lpi = ksz_phylink_mac_disable_tx_lpi,</div><div class='add'>+	.mac_enable_tx_lpi = ksz_phylink_mac_enable_tx_lpi,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ksz_dev_ops lan937x_dev_ops = {</div><div class='add'>+	.setup = lan937x_setup,</div><div class='add'>+	.teardown = lan937x_teardown,</div><div class='add'>+	.get_port_addr = ksz9477_get_port_addr,</div><div class='add'>+	.cfg_port_member = ksz9477_cfg_port_member,</div><div class='add'>+	.flush_dyn_mac_table = ksz9477_flush_dyn_mac_table,</div><div class='add'>+	.port_setup = lan937x_port_setup,</div><div class='add'>+	.set_ageing_time = lan937x_set_ageing_time,</div><div class='add'>+	.mdio_bus_preinit = lan937x_mdio_bus_preinit,</div><div class='add'>+	.create_phy_addr_map = lan937x_create_phy_addr_map,</div><div class='add'>+	.r_phy = lan937x_r_phy,</div><div class='add'>+	.w_phy = lan937x_w_phy,</div><div class='add'>+	.r_mib_cnt = ksz9477_r_mib_cnt,</div><div class='add'>+	.r_mib_pkt = ksz9477_r_mib_pkt,</div><div class='add'>+	.r_mib_stat64 = ksz_r_mib_stats64,</div><div class='add'>+	.freeze_mib = ksz9477_freeze_mib,</div><div class='add'>+	.port_init_cnt = ksz9477_port_init_cnt,</div><div class='add'>+	.vlan_filtering = ksz9477_port_vlan_filtering,</div><div class='add'>+	.vlan_add = ksz9477_port_vlan_add,</div><div class='add'>+	.vlan_del = ksz9477_port_vlan_del,</div><div class='add'>+	.mirror_add = ksz9477_port_mirror_add,</div><div class='add'>+	.mirror_del = ksz9477_port_mirror_del,</div><div class='add'>+	.get_caps = lan937x_phylink_get_caps,</div><div class='add'>+	.setup_rgmii_delay = lan937x_setup_rgmii_delay,</div><div class='add'>+	.fdb_dump = ksz9477_fdb_dump,</div><div class='add'>+	.fdb_add = ksz9477_fdb_add,</div><div class='add'>+	.fdb_del = ksz9477_fdb_del,</div><div class='add'>+	.mdb_add = ksz9477_mdb_add,</div><div class='add'>+	.mdb_del = ksz9477_mdb_del,</div><div class='add'>+	.change_mtu = lan937x_change_mtu,</div><div class='add'>+	.config_cpu_port = lan937x_config_cpu_port,</div><div class='add'>+	.tc_cbs_set_cinc = lan937x_tc_cbs_set_cinc,</div><div class='add'>+	.enable_stp_addr = ksz9477_enable_stp_addr,</div><div class='add'>+	.reset = lan937x_reset_switch,</div><div class='add'>+	.init = lan937x_switch_init,</div><div class='add'>+	.exit = lan937x_switch_exit,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u16 ksz8463_regs[] = {</div><div class='add'>+	[REG_SW_MAC_ADDR]		= 0x10,</div><div class='add'>+	[REG_IND_CTRL_0]		= 0x30,</div><div class='add'>+	[REG_IND_DATA_8]		= 0x26,</div><div class='add'>+	[REG_IND_DATA_CHECK]		= 0x26,</div><div class='add'>+	[REG_IND_DATA_HI]		= 0x28,</div><div class='add'>+	[REG_IND_DATA_LO]		= 0x2C,</div><div class='add'>+	[REG_IND_MIB_CHECK]		= 0x2F,</div><div class='add'>+	[P_FORCE_CTRL]			= 0x0C,</div><div class='add'>+	[P_LINK_STATUS]			= 0x0E,</div><div class='add'>+	[P_LOCAL_CTRL]			= 0x0C,</div><div class='add'>+	[P_NEG_RESTART_CTRL]		= 0x0D,</div><div class='add'>+	[P_REMOTE_STATUS]		= 0x0E,</div><div class='add'>+	[P_SPEED_STATUS]		= 0x0F,</div><div class='add'>+	[S_TAIL_TAG_CTRL]		= 0xAD,</div><div class='add'>+	[P_STP_CTRL]			= 0x6F,</div><div class='add'>+	[S_START_CTRL]			= 0x01,</div><div class='add'>+	[S_BROADCAST_CTRL]		= 0x06,</div><div class='add'>+	[S_MULTICAST_CTRL]		= 0x04,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 ksz8463_masks[] = {</div><div class='add'>+	[PORT_802_1P_REMAPPING]		= BIT(3),</div><div class='add'>+	[SW_TAIL_TAG_ENABLE]		= BIT(0),</div><div class='add'>+	[MIB_COUNTER_OVERFLOW]		= BIT(7),</div><div class='add'>+	[MIB_COUNTER_VALID]		= BIT(6),</div><div class='add'>+	[VLAN_TABLE_FID]		= GENMASK(15, 12),</div><div class='add'>+	[VLAN_TABLE_MEMBERSHIP]		= GENMASK(18, 16),</div><div class='add'>+	[VLAN_TABLE_VALID]		= BIT(19),</div><div class='add'>+	[STATIC_MAC_TABLE_VALID]	= BIT(19),</div><div class='add'>+	[STATIC_MAC_TABLE_USE_FID]	= BIT(21),</div><div class='add'>+	[STATIC_MAC_TABLE_FID]		= GENMASK(25, 22),</div><div class='add'>+	[STATIC_MAC_TABLE_OVERRIDE]	= BIT(20),</div><div class='add'>+	[STATIC_MAC_TABLE_FWD_PORTS]	= GENMASK(18, 16),</div><div class='add'>+	[DYNAMIC_MAC_TABLE_ENTRIES_H]	= GENMASK(1, 0),</div><div class='add'>+	[DYNAMIC_MAC_TABLE_MAC_EMPTY]	= BIT(2),</div><div class='add'>+	[DYNAMIC_MAC_TABLE_NOT_READY]	= BIT(7),</div><div class='add'>+	[DYNAMIC_MAC_TABLE_ENTRIES]	= GENMASK(31, 24),</div><div class='add'>+	[DYNAMIC_MAC_TABLE_FID]		= GENMASK(19, 16),</div><div class='add'>+	[DYNAMIC_MAC_TABLE_SRC_PORT]	= GENMASK(21, 20),</div><div class='add'>+	[DYNAMIC_MAC_TABLE_TIMESTAMP]	= GENMASK(23, 22),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static u8 ksz8463_shifts[] = {</div><div class='add'>+	[VLAN_TABLE_MEMBERSHIP_S]	= 16,</div><div class='add'>+	[STATIC_MAC_FWD_PORTS]		= 16,</div><div class='add'>+	[STATIC_MAC_FID]		= 22,</div><div class='add'>+	[DYNAMIC_MAC_ENTRIES_H]		= 8,</div><div class='add'>+	[DYNAMIC_MAC_ENTRIES]		= 24,</div><div class='add'>+	[DYNAMIC_MAC_FID]		= 16,</div><div class='add'>+	[DYNAMIC_MAC_TIMESTAMP]		= 22,</div><div class='add'>+	[DYNAMIC_MAC_SRC_PORT]		= 20,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u16 ksz8795_regs[] = {</div><div class='add'>+	[REG_SW_MAC_ADDR]		= 0x68,</div><div class='add'>+	[REG_IND_CTRL_0]		= 0x6E,</div><div class='add'>+	[REG_IND_DATA_8]		= 0x70,</div><div class='add'>+	[REG_IND_DATA_CHECK]		= 0x72,</div><div class='add'>+	[REG_IND_DATA_HI]		= 0x71,</div><div class='add'>+	[REG_IND_DATA_LO]		= 0x75,</div><div class='add'>+	[REG_IND_MIB_CHECK]		= 0x74,</div><div class='add'>+	[REG_IND_BYTE]			= 0xA0,</div><div class='add'>+	[P_FORCE_CTRL]			= 0x0C,</div><div class='add'>+	[P_LINK_STATUS]			= 0x0E,</div><div class='add'>+	[P_LOCAL_CTRL]			= 0x07,</div><div class='add'>+	[P_NEG_RESTART_CTRL]		= 0x0D,</div><div class='add'>+	[P_REMOTE_STATUS]		= 0x08,</div><div class='add'>+	[P_SPEED_STATUS]		= 0x09,</div><div class='add'>+	[S_TAIL_TAG_CTRL]		= 0x0C,</div><div class='add'>+	[P_STP_CTRL]			= 0x02,</div><div class='add'>+	[S_START_CTRL]			= 0x01,</div><div class='add'>+	[S_BROADCAST_CTRL]		= 0x06,</div><div class='add'>+	[S_MULTICAST_CTRL]		= 0x04,</div><div class='add'>+	[P_XMII_CTRL_0]			= 0x06,</div><div class='add'>+	[P_XMII_CTRL_1]			= 0x06,</div><div class='add'>+	[REG_SW_PME_CTRL]		= 0x8003,</div><div class='add'>+	[REG_PORT_PME_STATUS]		= 0x8003,</div><div class='add'>+	[REG_PORT_PME_CTRL]		= 0x8007,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 ksz8795_masks[] = {</div><div class='add'>+	[PORT_802_1P_REMAPPING]		= BIT(7),</div><div class='add'>+	[SW_TAIL_TAG_ENABLE]		= BIT(1),</div><div class='add'>+	[MIB_COUNTER_OVERFLOW]		= BIT(6),</div><div class='add'>+	[MIB_COUNTER_VALID]		= BIT(5),</div><div class='add'>+	[VLAN_TABLE_FID]		= GENMASK(6, 0),</div><div class='add'>+	[VLAN_TABLE_MEMBERSHIP]		= GENMASK(11, 7),</div><div class='add'>+	[VLAN_TABLE_VALID]		= BIT(12),</div><div class='add'>+	[STATIC_MAC_TABLE_VALID]	= BIT(21),</div><div class='add'>+	[STATIC_MAC_TABLE_USE_FID]	= BIT(23),</div><div class='add'>+	[STATIC_MAC_TABLE_FID]		= GENMASK(30, 24),</div><div class='add'>+	[STATIC_MAC_TABLE_OVERRIDE]	= BIT(22),</div><div class='add'>+	[STATIC_MAC_TABLE_FWD_PORTS]	= GENMASK(20, 16),</div><div class='add'>+	[DYNAMIC_MAC_TABLE_ENTRIES_H]	= GENMASK(6, 0),</div><div class='add'>+	[DYNAMIC_MAC_TABLE_MAC_EMPTY]	= BIT(7),</div><div class='add'>+	[DYNAMIC_MAC_TABLE_NOT_READY]	= BIT(7),</div><div class='add'>+	[DYNAMIC_MAC_TABLE_ENTRIES]	= GENMASK(31, 29),</div><div class='add'>+	[DYNAMIC_MAC_TABLE_FID]		= GENMASK(22, 16),</div><div class='add'>+	[DYNAMIC_MAC_TABLE_SRC_PORT]	= GENMASK(26, 24),</div><div class='add'>+	[DYNAMIC_MAC_TABLE_TIMESTAMP]	= GENMASK(28, 27),</div><div class='add'>+	[P_MII_TX_FLOW_CTRL]		= BIT(5),</div><div class='add'>+	[P_MII_RX_FLOW_CTRL]		= BIT(5),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u8 ksz8795_xmii_ctrl0[] = {</div><div class='add'>+	[P_MII_100MBIT]			= 0,</div><div class='add'>+	[P_MII_10MBIT]			= 1,</div><div class='add'>+	[P_MII_FULL_DUPLEX]		= 0,</div><div class='add'>+	[P_MII_HALF_DUPLEX]		= 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u8 ksz8795_xmii_ctrl1[] = {</div><div class='add'>+	[P_RGMII_SEL]			= 3,</div><div class='add'>+	[P_GMII_SEL]			= 2,</div><div class='add'>+	[P_RMII_SEL]			= 1,</div><div class='add'>+	[P_MII_SEL]			= 0,</div><div class='add'>+	[P_GMII_1GBIT]			= 1,</div><div class='add'>+	[P_GMII_NOT_1GBIT]		= 0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u8 ksz8795_shifts[] = {</div><div class='add'>+	[VLAN_TABLE_MEMBERSHIP_S]	= 7,</div><div class='add'>+	[VLAN_TABLE]			= 16,</div><div class='add'>+	[STATIC_MAC_FWD_PORTS]		= 16,</div><div class='add'>+	[STATIC_MAC_FID]		= 24,</div><div class='add'>+	[DYNAMIC_MAC_ENTRIES_H]		= 3,</div><div class='add'>+	[DYNAMIC_MAC_ENTRIES]		= 29,</div><div class='add'>+	[DYNAMIC_MAC_FID]		= 16,</div><div class='add'>+	[DYNAMIC_MAC_TIMESTAMP]		= 27,</div><div class='add'>+	[DYNAMIC_MAC_SRC_PORT]		= 24,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u16 ksz8863_regs[] = {</div><div class='add'>+	[REG_SW_MAC_ADDR]		= 0x70,</div><div class='add'>+	[REG_IND_CTRL_0]		= 0x79,</div><div class='add'>+	[REG_IND_DATA_8]		= 0x7B,</div><div class='add'>+	[REG_IND_DATA_CHECK]		= 0x7B,</div><div class='add'>+	[REG_IND_DATA_HI]		= 0x7C,</div><div class='add'>+	[REG_IND_DATA_LO]		= 0x80,</div><div class='add'>+	[REG_IND_MIB_CHECK]		= 0x80,</div><div class='add'>+	[P_FORCE_CTRL]			= 0x0C,</div><div class='add'>+	[P_LINK_STATUS]			= 0x0E,</div><div class='add'>+	[P_LOCAL_CTRL]			= 0x0C,</div><div class='add'>+	[P_NEG_RESTART_CTRL]		= 0x0D,</div><div class='add'>+	[P_REMOTE_STATUS]		= 0x0E,</div><div class='add'>+	[P_SPEED_STATUS]		= 0x0F,</div><div class='add'>+	[S_TAIL_TAG_CTRL]		= 0x03,</div><div class='add'>+	[P_STP_CTRL]			= 0x02,</div><div class='add'>+	[S_START_CTRL]			= 0x01,</div><div class='add'>+	[S_BROADCAST_CTRL]		= 0x06,</div><div class='add'>+	[S_MULTICAST_CTRL]		= 0x04,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 ksz8863_masks[] = {</div><div class='add'>+	[PORT_802_1P_REMAPPING]		= BIT(3),</div><div class='add'>+	[SW_TAIL_TAG_ENABLE]		= BIT(6),</div><div class='add'>+	[MIB_COUNTER_OVERFLOW]		= BIT(7),</div><div class='add'>+	[MIB_COUNTER_VALID]		= BIT(6),</div><div class='add'>+	[VLAN_TABLE_FID]		= GENMASK(15, 12),</div><div class='add'>+	[VLAN_TABLE_MEMBERSHIP]		= GENMASK(18, 16),</div><div class='add'>+	[VLAN_TABLE_VALID]		= BIT(19),</div><div class='add'>+	[STATIC_MAC_TABLE_VALID]	= BIT(19),</div><div class='add'>+	[STATIC_MAC_TABLE_USE_FID]	= BIT(21),</div><div class='add'>+	[STATIC_MAC_TABLE_FID]		= GENMASK(25, 22),</div><div class='add'>+	[STATIC_MAC_TABLE_OVERRIDE]	= BIT(20),</div><div class='add'>+	[STATIC_MAC_TABLE_FWD_PORTS]	= GENMASK(18, 16),</div><div class='add'>+	[DYNAMIC_MAC_TABLE_ENTRIES_H]	= GENMASK(1, 0),</div><div class='add'>+	[DYNAMIC_MAC_TABLE_MAC_EMPTY]	= BIT(2),</div><div class='add'>+	[DYNAMIC_MAC_TABLE_NOT_READY]	= BIT(7),</div><div class='add'>+	[DYNAMIC_MAC_TABLE_ENTRIES]	= GENMASK(31, 24),</div><div class='add'>+	[DYNAMIC_MAC_TABLE_FID]		= GENMASK(19, 16),</div><div class='add'>+	[DYNAMIC_MAC_TABLE_SRC_PORT]	= GENMASK(21, 20),</div><div class='add'>+	[DYNAMIC_MAC_TABLE_TIMESTAMP]	= GENMASK(23, 22),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static u8 ksz8863_shifts[] = {</div><div class='add'>+	[VLAN_TABLE_MEMBERSHIP_S]	= 16,</div><div class='add'>+	[STATIC_MAC_FWD_PORTS]		= 16,</div><div class='add'>+	[STATIC_MAC_FID]		= 22,</div><div class='add'>+	[DYNAMIC_MAC_ENTRIES_H]		= 8,</div><div class='add'>+	[DYNAMIC_MAC_ENTRIES]		= 24,</div><div class='add'>+	[DYNAMIC_MAC_FID]		= 16,</div><div class='add'>+	[DYNAMIC_MAC_TIMESTAMP]		= 22,</div><div class='add'>+	[DYNAMIC_MAC_SRC_PORT]		= 20,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u16 ksz8895_regs[] = {</div><div class='add'>+	[REG_SW_MAC_ADDR]		= 0x68,</div><div class='add'>+	[REG_IND_CTRL_0]		= 0x6E,</div><div class='add'>+	[REG_IND_DATA_8]		= 0x70,</div><div class='add'>+	[REG_IND_DATA_CHECK]		= 0x72,</div><div class='add'>+	[REG_IND_DATA_HI]		= 0x71,</div><div class='add'>+	[REG_IND_DATA_LO]		= 0x75,</div><div class='add'>+	[REG_IND_MIB_CHECK]		= 0x75,</div><div class='add'>+	[P_FORCE_CTRL]			= 0x0C,</div><div class='add'>+	[P_LINK_STATUS]			= 0x0E,</div><div class='add'>+	[P_LOCAL_CTRL]			= 0x0C,</div><div class='add'>+	[P_NEG_RESTART_CTRL]		= 0x0D,</div><div class='add'>+	[P_REMOTE_STATUS]		= 0x0E,</div><div class='add'>+	[P_SPEED_STATUS]		= 0x09,</div><div class='add'>+	[S_TAIL_TAG_CTRL]		= 0x0C,</div><div class='add'>+	[P_STP_CTRL]			= 0x02,</div><div class='add'>+	[S_START_CTRL]			= 0x01,</div><div class='add'>+	[S_BROADCAST_CTRL]		= 0x06,</div><div class='add'>+	[S_MULTICAST_CTRL]		= 0x04,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 ksz8895_masks[] = {</div><div class='add'>+	[PORT_802_1P_REMAPPING]		= BIT(7),</div><div class='add'>+	[SW_TAIL_TAG_ENABLE]		= BIT(1),</div><div class='add'>+	[MIB_COUNTER_OVERFLOW]		= BIT(7),</div><div class='add'>+	[MIB_COUNTER_VALID]		= BIT(6),</div><div class='add'>+	[VLAN_TABLE_FID]		= GENMASK(6, 0),</div><div class='add'>+	[VLAN_TABLE_MEMBERSHIP]		= GENMASK(11, 7),</div><div class='add'>+	[VLAN_TABLE_VALID]		= BIT(12),</div><div class='add'>+	[STATIC_MAC_TABLE_VALID]	= BIT(21),</div><div class='add'>+	[STATIC_MAC_TABLE_USE_FID]	= BIT(23),</div><div class='add'>+	[STATIC_MAC_TABLE_FID]		= GENMASK(30, 24),</div><div class='add'>+	[STATIC_MAC_TABLE_OVERRIDE]	= BIT(22),</div><div class='add'>+	[STATIC_MAC_TABLE_FWD_PORTS]	= GENMASK(20, 16),</div><div class='add'>+	[DYNAMIC_MAC_TABLE_ENTRIES_H]	= GENMASK(6, 0),</div><div class='add'>+	[DYNAMIC_MAC_TABLE_MAC_EMPTY]	= BIT(7),</div><div class='add'>+	[DYNAMIC_MAC_TABLE_NOT_READY]	= BIT(7),</div><div class='add'>+	[DYNAMIC_MAC_TABLE_ENTRIES]	= GENMASK(31, 29),</div><div class='add'>+	[DYNAMIC_MAC_TABLE_FID]		= GENMASK(22, 16),</div><div class='add'>+	[DYNAMIC_MAC_TABLE_SRC_PORT]	= GENMASK(26, 24),</div><div class='add'>+	[DYNAMIC_MAC_TABLE_TIMESTAMP]	= GENMASK(28, 27),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u8 ksz8895_shifts[] = {</div><div class='add'>+	[VLAN_TABLE_MEMBERSHIP_S]	= 7,</div><div class='add'>+	[VLAN_TABLE]			= 13,</div><div class='add'>+	[STATIC_MAC_FWD_PORTS]		= 16,</div><div class='add'>+	[STATIC_MAC_FID]		= 24,</div><div class='add'>+	[DYNAMIC_MAC_ENTRIES_H]		= 3,</div><div class='add'>+	[DYNAMIC_MAC_ENTRIES]		= 29,</div><div class='add'>+	[DYNAMIC_MAC_FID]		= 16,</div><div class='add'>+	[DYNAMIC_MAC_TIMESTAMP]		= 27,</div><div class='add'>+	[DYNAMIC_MAC_SRC_PORT]		= 24,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u16 ksz9477_regs[] = {</div><div class='add'>+	[REG_SW_MAC_ADDR]		= 0x0302,</div><div class='add'>+	[P_STP_CTRL]			= 0x0B04,</div><div class='add'>+	[S_START_CTRL]			= 0x0300,</div><div class='add'>+	[S_BROADCAST_CTRL]		= 0x0332,</div><div class='add'>+	[S_MULTICAST_CTRL]		= 0x0331,</div><div class='add'>+	[P_XMII_CTRL_0]			= 0x0300,</div><div class='add'>+	[P_XMII_CTRL_1]			= 0x0301,</div><div class='add'>+	[REG_SW_PME_CTRL]		= 0x0006,</div><div class='add'>+	[REG_PORT_PME_STATUS]		= 0x0013,</div><div class='add'>+	[REG_PORT_PME_CTRL]		= 0x0017,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 ksz9477_masks[] = {</div><div class='add'>+	[ALU_STAT_WRITE]		= 0,</div><div class='add'>+	[ALU_STAT_READ]			= 1,</div><div class='add'>+	[ALU_STAT_DIRECT]		= 0,</div><div class='add'>+	[ALU_RESV_MCAST_ADDR]		= BIT(1),</div><div class='add'>+	[P_MII_TX_FLOW_CTRL]		= BIT(5),</div><div class='add'>+	[P_MII_RX_FLOW_CTRL]		= BIT(3),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u8 ksz9477_shifts[] = {</div><div class='add'>+	[ALU_STAT_INDEX]		= 16,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u8 ksz9477_xmii_ctrl0[] = {</div><div class='add'>+	[P_MII_100MBIT]			= 1,</div><div class='add'>+	[P_MII_10MBIT]			= 0,</div><div class='add'>+	[P_MII_FULL_DUPLEX]		= 1,</div><div class='add'>+	[P_MII_HALF_DUPLEX]		= 0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u8 ksz9477_xmii_ctrl1[] = {</div><div class='add'>+	[P_RGMII_SEL]			= 0,</div><div class='add'>+	[P_RMII_SEL]			= 1,</div><div class='add'>+	[P_GMII_SEL]			= 2,</div><div class='add'>+	[P_MII_SEL]			= 3,</div><div class='add'>+	[P_GMII_1GBIT]			= 0,</div><div class='add'>+	[P_GMII_NOT_1GBIT]		= 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 lan937x_masks[] = {</div><div class='add'>+	[ALU_STAT_WRITE]		= 1,</div><div class='add'>+	[ALU_STAT_READ]			= 2,</div><div class='add'>+	[ALU_STAT_DIRECT]		= BIT(3),</div><div class='add'>+	[ALU_RESV_MCAST_ADDR]		= BIT(2),</div><div class='add'>+	[P_MII_TX_FLOW_CTRL]		= BIT(5),</div><div class='add'>+	[P_MII_RX_FLOW_CTRL]		= BIT(3),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u8 lan937x_shifts[] = {</div><div class='add'>+	[ALU_STAT_INDEX]		= 8,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_range ksz8563_valid_regs[] = {</div><div class='add'>+	regmap_reg_range(0x0000, 0x0003),</div><div class='add'>+	regmap_reg_range(0x0006, 0x0006),</div><div class='add'>+	regmap_reg_range(0x000f, 0x001f),</div><div class='add'>+	regmap_reg_range(0x0100, 0x0100),</div><div class='add'>+	regmap_reg_range(0x0104, 0x0107),</div><div class='add'>+	regmap_reg_range(0x010d, 0x010d),</div><div class='add'>+	regmap_reg_range(0x0110, 0x0113),</div><div class='add'>+	regmap_reg_range(0x0120, 0x012b),</div><div class='add'>+	regmap_reg_range(0x0201, 0x0201),</div><div class='add'>+	regmap_reg_range(0x0210, 0x0213),</div><div class='add'>+	regmap_reg_range(0x0300, 0x0300),</div><div class='add'>+	regmap_reg_range(0x0302, 0x031b),</div><div class='add'>+	regmap_reg_range(0x0320, 0x032b),</div><div class='add'>+	regmap_reg_range(0x0330, 0x0336),</div><div class='add'>+	regmap_reg_range(0x0338, 0x033e),</div><div class='add'>+	regmap_reg_range(0x0340, 0x035f),</div><div class='add'>+	regmap_reg_range(0x0370, 0x0370),</div><div class='add'>+	regmap_reg_range(0x0378, 0x0378),</div><div class='add'>+	regmap_reg_range(0x037c, 0x037d),</div><div class='add'>+	regmap_reg_range(0x0390, 0x0393),</div><div class='add'>+	regmap_reg_range(0x0400, 0x040e),</div><div class='add'>+	regmap_reg_range(0x0410, 0x042f),</div><div class='add'>+	regmap_reg_range(0x0500, 0x0519),</div><div class='add'>+	regmap_reg_range(0x0520, 0x054b),</div><div class='add'>+	regmap_reg_range(0x0550, 0x05b3),</div><div class='add'>+</div><div class='add'>+	/* port 1 */</div><div class='add'>+	regmap_reg_range(0x1000, 0x1001),</div><div class='add'>+	regmap_reg_range(0x1004, 0x100b),</div><div class='add'>+	regmap_reg_range(0x1013, 0x1013),</div><div class='add'>+	regmap_reg_range(0x1017, 0x1017),</div><div class='add'>+	regmap_reg_range(0x101b, 0x101b),</div><div class='add'>+	regmap_reg_range(0x101f, 0x1021),</div><div class='add'>+	regmap_reg_range(0x1030, 0x1030),</div><div class='add'>+	regmap_reg_range(0x1100, 0x1111),</div><div class='add'>+	regmap_reg_range(0x111a, 0x111d),</div><div class='add'>+	regmap_reg_range(0x1122, 0x1127),</div><div class='add'>+	regmap_reg_range(0x112a, 0x112b),</div><div class='add'>+	regmap_reg_range(0x1136, 0x1139),</div><div class='add'>+	regmap_reg_range(0x113e, 0x113f),</div><div class='add'>+	regmap_reg_range(0x1400, 0x1401),</div><div class='add'>+	regmap_reg_range(0x1403, 0x1403),</div><div class='add'>+	regmap_reg_range(0x1410, 0x1417),</div><div class='add'>+	regmap_reg_range(0x1420, 0x1423),</div><div class='add'>+	regmap_reg_range(0x1500, 0x1507),</div><div class='add'>+	regmap_reg_range(0x1600, 0x1612),</div><div class='add'>+	regmap_reg_range(0x1800, 0x180f),</div><div class='add'>+	regmap_reg_range(0x1900, 0x1907),</div><div class='add'>+	regmap_reg_range(0x1914, 0x191b),</div><div class='add'>+	regmap_reg_range(0x1a00, 0x1a03),</div><div class='add'>+	regmap_reg_range(0x1a04, 0x1a08),</div><div class='add'>+	regmap_reg_range(0x1b00, 0x1b01),</div><div class='add'>+	regmap_reg_range(0x1b04, 0x1b04),</div><div class='add'>+	regmap_reg_range(0x1c00, 0x1c05),</div><div class='add'>+	regmap_reg_range(0x1c08, 0x1c1b),</div><div class='add'>+</div><div class='add'>+	/* port 2 */</div><div class='add'>+	regmap_reg_range(0x2000, 0x2001),</div><div class='add'>+	regmap_reg_range(0x2004, 0x200b),</div><div class='add'>+	regmap_reg_range(0x2013, 0x2013),</div><div class='add'>+	regmap_reg_range(0x2017, 0x2017),</div><div class='add'>+	regmap_reg_range(0x201b, 0x201b),</div><div class='add'>+	regmap_reg_range(0x201f, 0x2021),</div><div class='add'>+	regmap_reg_range(0x2030, 0x2030),</div><div class='add'>+	regmap_reg_range(0x2100, 0x2111),</div><div class='add'>+	regmap_reg_range(0x211a, 0x211d),</div><div class='add'>+	regmap_reg_range(0x2122, 0x2127),</div><div class='add'>+	regmap_reg_range(0x212a, 0x212b),</div><div class='add'>+	regmap_reg_range(0x2136, 0x2139),</div><div class='add'>+	regmap_reg_range(0x213e, 0x213f),</div><div class='add'>+	regmap_reg_range(0x2400, 0x2401),</div><div class='add'>+	regmap_reg_range(0x2403, 0x2403),</div><div class='add'>+	regmap_reg_range(0x2410, 0x2417),</div><div class='add'>+	regmap_reg_range(0x2420, 0x2423),</div><div class='add'>+	regmap_reg_range(0x2500, 0x2507),</div><div class='add'>+	regmap_reg_range(0x2600, 0x2612),</div><div class='add'>+	regmap_reg_range(0x2800, 0x280f),</div><div class='add'>+	regmap_reg_range(0x2900, 0x2907),</div><div class='add'>+	regmap_reg_range(0x2914, 0x291b),</div><div class='add'>+	regmap_reg_range(0x2a00, 0x2a03),</div><div class='add'>+	regmap_reg_range(0x2a04, 0x2a08),</div><div class='add'>+	regmap_reg_range(0x2b00, 0x2b01),</div><div class='add'>+	regmap_reg_range(0x2b04, 0x2b04),</div><div class='add'>+	regmap_reg_range(0x2c00, 0x2c05),</div><div class='add'>+	regmap_reg_range(0x2c08, 0x2c1b),</div><div class='add'>+</div><div class='add'>+	/* port 3 */</div><div class='add'>+	regmap_reg_range(0x3000, 0x3001),</div><div class='add'>+	regmap_reg_range(0x3004, 0x300b),</div><div class='add'>+	regmap_reg_range(0x3013, 0x3013),</div><div class='add'>+	regmap_reg_range(0x3017, 0x3017),</div><div class='add'>+	regmap_reg_range(0x301b, 0x301b),</div><div class='add'>+	regmap_reg_range(0x301f, 0x3021),</div><div class='add'>+	regmap_reg_range(0x3030, 0x3030),</div><div class='add'>+	regmap_reg_range(0x3300, 0x3301),</div><div class='add'>+	regmap_reg_range(0x3303, 0x3303),</div><div class='add'>+	regmap_reg_range(0x3400, 0x3401),</div><div class='add'>+	regmap_reg_range(0x3403, 0x3403),</div><div class='add'>+	regmap_reg_range(0x3410, 0x3417),</div><div class='add'>+	regmap_reg_range(0x3420, 0x3423),</div><div class='add'>+	regmap_reg_range(0x3500, 0x3507),</div><div class='add'>+	regmap_reg_range(0x3600, 0x3612),</div><div class='add'>+	regmap_reg_range(0x3800, 0x380f),</div><div class='add'>+	regmap_reg_range(0x3900, 0x3907),</div><div class='add'>+	regmap_reg_range(0x3914, 0x391b),</div><div class='add'>+	regmap_reg_range(0x3a00, 0x3a03),</div><div class='add'>+	regmap_reg_range(0x3a04, 0x3a08),</div><div class='add'>+	regmap_reg_range(0x3b00, 0x3b01),</div><div class='add'>+	regmap_reg_range(0x3b04, 0x3b04),</div><div class='add'>+	regmap_reg_range(0x3c00, 0x3c05),</div><div class='add'>+	regmap_reg_range(0x3c08, 0x3c1b),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_access_table ksz8563_register_set = {</div><div class='add'>+	.yes_ranges = ksz8563_valid_regs,</div><div class='add'>+	.n_yes_ranges = ARRAY_SIZE(ksz8563_valid_regs),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_range ksz9477_valid_regs[] = {</div><div class='add'>+	regmap_reg_range(0x0000, 0x0003),</div><div class='add'>+	regmap_reg_range(0x0006, 0x0006),</div><div class='add'>+	regmap_reg_range(0x0010, 0x001f),</div><div class='add'>+	regmap_reg_range(0x0100, 0x0100),</div><div class='add'>+	regmap_reg_range(0x0103, 0x0107),</div><div class='add'>+	regmap_reg_range(0x010d, 0x010d),</div><div class='add'>+	regmap_reg_range(0x0110, 0x0113),</div><div class='add'>+	regmap_reg_range(0x0120, 0x012b),</div><div class='add'>+	regmap_reg_range(0x0201, 0x0201),</div><div class='add'>+	regmap_reg_range(0x0210, 0x0213),</div><div class='add'>+	regmap_reg_range(0x0300, 0x0300),</div><div class='add'>+	regmap_reg_range(0x0302, 0x031b),</div><div class='add'>+	regmap_reg_range(0x0320, 0x032b),</div><div class='add'>+	regmap_reg_range(0x0330, 0x0336),</div><div class='add'>+	regmap_reg_range(0x0338, 0x033b),</div><div class='add'>+	regmap_reg_range(0x033e, 0x033e),</div><div class='add'>+	regmap_reg_range(0x0340, 0x035f),</div><div class='add'>+	regmap_reg_range(0x0370, 0x0370),</div><div class='add'>+	regmap_reg_range(0x0378, 0x0378),</div><div class='add'>+	regmap_reg_range(0x037c, 0x037d),</div><div class='add'>+	regmap_reg_range(0x0390, 0x0393),</div><div class='add'>+	regmap_reg_range(0x0400, 0x040e),</div><div class='add'>+	regmap_reg_range(0x0410, 0x042f),</div><div class='add'>+	regmap_reg_range(0x0444, 0x044b),</div><div class='add'>+	regmap_reg_range(0x0450, 0x046f),</div><div class='add'>+	regmap_reg_range(0x0500, 0x0519),</div><div class='add'>+	regmap_reg_range(0x0520, 0x054b),</div><div class='add'>+	regmap_reg_range(0x0550, 0x05b3),</div><div class='add'>+	regmap_reg_range(0x0604, 0x060b),</div><div class='add'>+	regmap_reg_range(0x0610, 0x0612),</div><div class='add'>+	regmap_reg_range(0x0614, 0x062c),</div><div class='add'>+	regmap_reg_range(0x0640, 0x0645),</div><div class='add'>+	regmap_reg_range(0x0648, 0x064d),</div><div class='add'>+</div><div class='add'>+	/* port 1 */</div><div class='add'>+	regmap_reg_range(0x1000, 0x1001),</div><div class='add'>+	regmap_reg_range(0x1013, 0x1013),</div><div class='add'>+	regmap_reg_range(0x1017, 0x1017),</div><div class='add'>+	regmap_reg_range(0x101b, 0x101b),</div><div class='add'>+	regmap_reg_range(0x101f, 0x1020),</div><div class='add'>+	regmap_reg_range(0x1030, 0x1030),</div><div class='add'>+	regmap_reg_range(0x1100, 0x1115),</div><div class='add'>+	regmap_reg_range(0x111a, 0x111f),</div><div class='add'>+	regmap_reg_range(0x1120, 0x112b),</div><div class='add'>+	regmap_reg_range(0x1134, 0x113b),</div><div class='add'>+	regmap_reg_range(0x113c, 0x113f),</div><div class='add'>+	regmap_reg_range(0x1400, 0x1401),</div><div class='add'>+	regmap_reg_range(0x1403, 0x1403),</div><div class='add'>+	regmap_reg_range(0x1410, 0x1417),</div><div class='add'>+	regmap_reg_range(0x1420, 0x1423),</div><div class='add'>+	regmap_reg_range(0x1500, 0x1507),</div><div class='add'>+	regmap_reg_range(0x1600, 0x1613),</div><div class='add'>+	regmap_reg_range(0x1800, 0x180f),</div><div class='add'>+	regmap_reg_range(0x1820, 0x1827),</div><div class='add'>+	regmap_reg_range(0x1830, 0x1837),</div><div class='add'>+	regmap_reg_range(0x1840, 0x184b),</div><div class='add'>+	regmap_reg_range(0x1900, 0x1907),</div><div class='add'>+	regmap_reg_range(0x1914, 0x191b),</div><div class='add'>+	regmap_reg_range(0x1920, 0x1920),</div><div class='add'>+	regmap_reg_range(0x1923, 0x1927),</div><div class='add'>+	regmap_reg_range(0x1a00, 0x1a03),</div><div class='add'>+	regmap_reg_range(0x1a04, 0x1a07),</div><div class='add'>+	regmap_reg_range(0x1b00, 0x1b01),</div><div class='add'>+	regmap_reg_range(0x1b04, 0x1b04),</div><div class='add'>+	regmap_reg_range(0x1c00, 0x1c05),</div><div class='add'>+	regmap_reg_range(0x1c08, 0x1c1b),</div><div class='add'>+</div><div class='add'>+	/* port 2 */</div><div class='add'>+	regmap_reg_range(0x2000, 0x2001),</div><div class='add'>+	regmap_reg_range(0x2013, 0x2013),</div><div class='add'>+	regmap_reg_range(0x2017, 0x2017),</div><div class='add'>+	regmap_reg_range(0x201b, 0x201b),</div><div class='add'>+	regmap_reg_range(0x201f, 0x2020),</div><div class='add'>+	regmap_reg_range(0x2030, 0x2030),</div><div class='add'>+	regmap_reg_range(0x2100, 0x2115),</div><div class='add'>+	regmap_reg_range(0x211a, 0x211f),</div><div class='add'>+	regmap_reg_range(0x2120, 0x212b),</div><div class='add'>+	regmap_reg_range(0x2134, 0x213b),</div><div class='add'>+	regmap_reg_range(0x213c, 0x213f),</div><div class='add'>+	regmap_reg_range(0x2400, 0x2401),</div><div class='add'>+	regmap_reg_range(0x2403, 0x2403),</div><div class='add'>+	regmap_reg_range(0x2410, 0x2417),</div><div class='add'>+	regmap_reg_range(0x2420, 0x2423),</div><div class='add'>+	regmap_reg_range(0x2500, 0x2507),</div><div class='add'>+	regmap_reg_range(0x2600, 0x2613),</div><div class='add'>+	regmap_reg_range(0x2800, 0x280f),</div><div class='add'>+	regmap_reg_range(0x2820, 0x2827),</div><div class='add'>+	regmap_reg_range(0x2830, 0x2837),</div><div class='add'>+	regmap_reg_range(0x2840, 0x284b),</div><div class='add'>+	regmap_reg_range(0x2900, 0x2907),</div><div class='add'>+	regmap_reg_range(0x2914, 0x291b),</div><div class='add'>+	regmap_reg_range(0x2920, 0x2920),</div><div class='add'>+	regmap_reg_range(0x2923, 0x2927),</div><div class='add'>+	regmap_reg_range(0x2a00, 0x2a03),</div><div class='add'>+	regmap_reg_range(0x2a04, 0x2a07),</div><div class='add'>+	regmap_reg_range(0x2b00, 0x2b01),</div><div class='add'>+	regmap_reg_range(0x2b04, 0x2b04),</div><div class='add'>+	regmap_reg_range(0x2c00, 0x2c05),</div><div class='add'>+	regmap_reg_range(0x2c08, 0x2c1b),</div><div class='add'>+</div><div class='add'>+	/* port 3 */</div><div class='add'>+	regmap_reg_range(0x3000, 0x3001),</div><div class='add'>+	regmap_reg_range(0x3013, 0x3013),</div><div class='add'>+	regmap_reg_range(0x3017, 0x3017),</div><div class='add'>+	regmap_reg_range(0x301b, 0x301b),</div><div class='add'>+	regmap_reg_range(0x301f, 0x3020),</div><div class='add'>+	regmap_reg_range(0x3030, 0x3030),</div><div class='add'>+	regmap_reg_range(0x3100, 0x3115),</div><div class='add'>+	regmap_reg_range(0x311a, 0x311f),</div><div class='add'>+	regmap_reg_range(0x3120, 0x312b),</div><div class='add'>+	regmap_reg_range(0x3134, 0x313b),</div><div class='add'>+	regmap_reg_range(0x313c, 0x313f),</div><div class='add'>+	regmap_reg_range(0x3400, 0x3401),</div><div class='add'>+	regmap_reg_range(0x3403, 0x3403),</div><div class='add'>+	regmap_reg_range(0x3410, 0x3417),</div><div class='add'>+	regmap_reg_range(0x3420, 0x3423),</div><div class='add'>+	regmap_reg_range(0x3500, 0x3507),</div><div class='add'>+	regmap_reg_range(0x3600, 0x3613),</div><div class='add'>+	regmap_reg_range(0x3800, 0x380f),</div><div class='add'>+	regmap_reg_range(0x3820, 0x3827),</div><div class='add'>+	regmap_reg_range(0x3830, 0x3837),</div><div class='add'>+	regmap_reg_range(0x3840, 0x384b),</div><div class='add'>+	regmap_reg_range(0x3900, 0x3907),</div><div class='add'>+	regmap_reg_range(0x3914, 0x391b),</div><div class='add'>+	regmap_reg_range(0x3920, 0x3920),</div><div class='add'>+	regmap_reg_range(0x3923, 0x3927),</div><div class='add'>+	regmap_reg_range(0x3a00, 0x3a03),</div><div class='add'>+	regmap_reg_range(0x3a04, 0x3a07),</div><div class='add'>+	regmap_reg_range(0x3b00, 0x3b01),</div><div class='add'>+	regmap_reg_range(0x3b04, 0x3b04),</div><div class='add'>+	regmap_reg_range(0x3c00, 0x3c05),</div><div class='add'>+	regmap_reg_range(0x3c08, 0x3c1b),</div><div class='add'>+</div><div class='add'>+	/* port 4 */</div><div class='add'>+	regmap_reg_range(0x4000, 0x4001),</div><div class='add'>+	regmap_reg_range(0x4013, 0x4013),</div><div class='add'>+	regmap_reg_range(0x4017, 0x4017),</div><div class='add'>+	regmap_reg_range(0x401b, 0x401b),</div><div class='add'>+	regmap_reg_range(0x401f, 0x4020),</div><div class='add'>+	regmap_reg_range(0x4030, 0x4030),</div><div class='add'>+	regmap_reg_range(0x4100, 0x4115),</div><div class='add'>+	regmap_reg_range(0x411a, 0x411f),</div><div class='add'>+	regmap_reg_range(0x4120, 0x412b),</div><div class='add'>+	regmap_reg_range(0x4134, 0x413b),</div><div class='add'>+	regmap_reg_range(0x413c, 0x413f),</div><div class='add'>+	regmap_reg_range(0x4400, 0x4401),</div><div class='add'>+	regmap_reg_range(0x4403, 0x4403),</div><div class='add'>+	regmap_reg_range(0x4410, 0x4417),</div><div class='add'>+	regmap_reg_range(0x4420, 0x4423),</div><div class='add'>+	regmap_reg_range(0x4500, 0x4507),</div><div class='add'>+	regmap_reg_range(0x4600, 0x4613),</div><div class='add'>+	regmap_reg_range(0x4800, 0x480f),</div><div class='add'>+	regmap_reg_range(0x4820, 0x4827),</div><div class='add'>+	regmap_reg_range(0x4830, 0x4837),</div><div class='add'>+	regmap_reg_range(0x4840, 0x484b),</div><div class='add'>+	regmap_reg_range(0x4900, 0x4907),</div><div class='add'>+	regmap_reg_range(0x4914, 0x491b),</div><div class='add'>+	regmap_reg_range(0x4920, 0x4920),</div><div class='add'>+	regmap_reg_range(0x4923, 0x4927),</div><div class='add'>+	regmap_reg_range(0x4a00, 0x4a03),</div><div class='add'>+	regmap_reg_range(0x4a04, 0x4a07),</div><div class='add'>+	regmap_reg_range(0x4b00, 0x4b01),</div><div class='add'>+	regmap_reg_range(0x4b04, 0x4b04),</div><div class='add'>+	regmap_reg_range(0x4c00, 0x4c05),</div><div class='add'>+	regmap_reg_range(0x4c08, 0x4c1b),</div><div class='add'>+</div><div class='add'>+	/* port 5 */</div><div class='add'>+	regmap_reg_range(0x5000, 0x5001),</div><div class='add'>+	regmap_reg_range(0x5013, 0x5013),</div><div class='add'>+	regmap_reg_range(0x5017, 0x5017),</div><div class='add'>+	regmap_reg_range(0x501b, 0x501b),</div><div class='add'>+	regmap_reg_range(0x501f, 0x5020),</div><div class='add'>+	regmap_reg_range(0x5030, 0x5030),</div><div class='add'>+	regmap_reg_range(0x5100, 0x5115),</div><div class='add'>+	regmap_reg_range(0x511a, 0x511f),</div><div class='add'>+	regmap_reg_range(0x5120, 0x512b),</div><div class='add'>+	regmap_reg_range(0x5134, 0x513b),</div><div class='add'>+	regmap_reg_range(0x513c, 0x513f),</div><div class='add'>+	regmap_reg_range(0x5400, 0x5401),</div><div class='add'>+	regmap_reg_range(0x5403, 0x5403),</div><div class='add'>+	regmap_reg_range(0x5410, 0x5417),</div><div class='add'>+	regmap_reg_range(0x5420, 0x5423),</div><div class='add'>+	regmap_reg_range(0x5500, 0x5507),</div><div class='add'>+	regmap_reg_range(0x5600, 0x5613),</div><div class='add'>+	regmap_reg_range(0x5800, 0x580f),</div><div class='add'>+	regmap_reg_range(0x5820, 0x5827),</div><div class='add'>+	regmap_reg_range(0x5830, 0x5837),</div><div class='add'>+	regmap_reg_range(0x5840, 0x584b),</div><div class='add'>+	regmap_reg_range(0x5900, 0x5907),</div><div class='add'>+	regmap_reg_range(0x5914, 0x591b),</div><div class='add'>+	regmap_reg_range(0x5920, 0x5920),</div><div class='add'>+	regmap_reg_range(0x5923, 0x5927),</div><div class='add'>+	regmap_reg_range(0x5a00, 0x5a03),</div><div class='add'>+	regmap_reg_range(0x5a04, 0x5a07),</div><div class='add'>+	regmap_reg_range(0x5b00, 0x5b01),</div><div class='add'>+	regmap_reg_range(0x5b04, 0x5b04),</div><div class='add'>+	regmap_reg_range(0x5c00, 0x5c05),</div><div class='add'>+	regmap_reg_range(0x5c08, 0x5c1b),</div><div class='add'>+</div><div class='add'>+	/* port 6 */</div><div class='add'>+	regmap_reg_range(0x6000, 0x6001),</div><div class='add'>+	regmap_reg_range(0x6013, 0x6013),</div><div class='add'>+	regmap_reg_range(0x6017, 0x6017),</div><div class='add'>+	regmap_reg_range(0x601b, 0x601b),</div><div class='add'>+	regmap_reg_range(0x601f, 0x6020),</div><div class='add'>+	regmap_reg_range(0x6030, 0x6030),</div><div class='add'>+	regmap_reg_range(0x6300, 0x6301),</div><div class='add'>+	regmap_reg_range(0x6400, 0x6401),</div><div class='add'>+	regmap_reg_range(0x6403, 0x6403),</div><div class='add'>+	regmap_reg_range(0x6410, 0x6417),</div><div class='add'>+	regmap_reg_range(0x6420, 0x6423),</div><div class='add'>+	regmap_reg_range(0x6500, 0x6507),</div><div class='add'>+	regmap_reg_range(0x6600, 0x6613),</div><div class='add'>+	regmap_reg_range(0x6800, 0x680f),</div><div class='add'>+	regmap_reg_range(0x6820, 0x6827),</div><div class='add'>+	regmap_reg_range(0x6830, 0x6837),</div><div class='add'>+	regmap_reg_range(0x6840, 0x684b),</div><div class='add'>+	regmap_reg_range(0x6900, 0x6907),</div><div class='add'>+	regmap_reg_range(0x6914, 0x691b),</div><div class='add'>+	regmap_reg_range(0x6920, 0x6920),</div><div class='add'>+	regmap_reg_range(0x6923, 0x6927),</div><div class='add'>+	regmap_reg_range(0x6a00, 0x6a03),</div><div class='add'>+	regmap_reg_range(0x6a04, 0x6a07),</div><div class='add'>+	regmap_reg_range(0x6b00, 0x6b01),</div><div class='add'>+	regmap_reg_range(0x6b04, 0x6b04),</div><div class='add'>+	regmap_reg_range(0x6c00, 0x6c05),</div><div class='add'>+	regmap_reg_range(0x6c08, 0x6c1b),</div><div class='add'>+</div><div class='add'>+	/* port 7 */</div><div class='add'>+	regmap_reg_range(0x7000, 0x7001),</div><div class='add'>+	regmap_reg_range(0x7013, 0x7013),</div><div class='add'>+	regmap_reg_range(0x7017, 0x7017),</div><div class='add'>+	regmap_reg_range(0x701b, 0x701b),</div><div class='add'>+	regmap_reg_range(0x701f, 0x7020),</div><div class='add'>+	regmap_reg_range(0x7030, 0x7030),</div><div class='add'>+	regmap_reg_range(0x7200, 0x7207),</div><div class='add'>+	regmap_reg_range(0x7300, 0x7301),</div><div class='add'>+	regmap_reg_range(0x7400, 0x7401),</div><div class='add'>+	regmap_reg_range(0x7403, 0x7403),</div><div class='add'>+	regmap_reg_range(0x7410, 0x7417),</div><div class='add'>+	regmap_reg_range(0x7420, 0x7423),</div><div class='add'>+	regmap_reg_range(0x7500, 0x7507),</div><div class='add'>+	regmap_reg_range(0x7600, 0x7613),</div><div class='add'>+	regmap_reg_range(0x7800, 0x780f),</div><div class='add'>+	regmap_reg_range(0x7820, 0x7827),</div><div class='add'>+	regmap_reg_range(0x7830, 0x7837),</div><div class='add'>+	regmap_reg_range(0x7840, 0x784b),</div><div class='add'>+	regmap_reg_range(0x7900, 0x7907),</div><div class='add'>+	regmap_reg_range(0x7914, 0x791b),</div><div class='add'>+	regmap_reg_range(0x7920, 0x7920),</div><div class='add'>+	regmap_reg_range(0x7923, 0x7927),</div><div class='add'>+	regmap_reg_range(0x7a00, 0x7a03),</div><div class='add'>+	regmap_reg_range(0x7a04, 0x7a07),</div><div class='add'>+	regmap_reg_range(0x7b00, 0x7b01),</div><div class='add'>+	regmap_reg_range(0x7b04, 0x7b04),</div><div class='add'>+	regmap_reg_range(0x7c00, 0x7c05),</div><div class='add'>+	regmap_reg_range(0x7c08, 0x7c1b),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_access_table ksz9477_register_set = {</div><div class='add'>+	.yes_ranges = ksz9477_valid_regs,</div><div class='add'>+	.n_yes_ranges = ARRAY_SIZE(ksz9477_valid_regs),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_range ksz9896_valid_regs[] = {</div><div class='add'>+	regmap_reg_range(0x0000, 0x0003),</div><div class='add'>+	regmap_reg_range(0x0006, 0x0006),</div><div class='add'>+	regmap_reg_range(0x0010, 0x001f),</div><div class='add'>+	regmap_reg_range(0x0100, 0x0100),</div><div class='add'>+	regmap_reg_range(0x0103, 0x0107),</div><div class='add'>+	regmap_reg_range(0x010d, 0x010d),</div><div class='add'>+	regmap_reg_range(0x0110, 0x0113),</div><div class='add'>+	regmap_reg_range(0x0120, 0x0127),</div><div class='add'>+	regmap_reg_range(0x0201, 0x0201),</div><div class='add'>+	regmap_reg_range(0x0210, 0x0213),</div><div class='add'>+	regmap_reg_range(0x0300, 0x0300),</div><div class='add'>+	regmap_reg_range(0x0302, 0x030b),</div><div class='add'>+	regmap_reg_range(0x0310, 0x031b),</div><div class='add'>+	regmap_reg_range(0x0320, 0x032b),</div><div class='add'>+	regmap_reg_range(0x0330, 0x0336),</div><div class='add'>+	regmap_reg_range(0x0338, 0x033b),</div><div class='add'>+	regmap_reg_range(0x033e, 0x033e),</div><div class='add'>+	regmap_reg_range(0x0340, 0x035f),</div><div class='add'>+	regmap_reg_range(0x0370, 0x0370),</div><div class='add'>+	regmap_reg_range(0x0378, 0x0378),</div><div class='add'>+	regmap_reg_range(0x037c, 0x037d),</div><div class='add'>+	regmap_reg_range(0x0390, 0x0393),</div><div class='add'>+	regmap_reg_range(0x0400, 0x040e),</div><div class='add'>+	regmap_reg_range(0x0410, 0x042f),</div><div class='add'>+</div><div class='add'>+	/* port 1 */</div><div class='add'>+	regmap_reg_range(0x1000, 0x1001),</div><div class='add'>+	regmap_reg_range(0x1013, 0x1013),</div><div class='add'>+	regmap_reg_range(0x1017, 0x1017),</div><div class='add'>+	regmap_reg_range(0x101b, 0x101b),</div><div class='add'>+	regmap_reg_range(0x101f, 0x1020),</div><div class='add'>+	regmap_reg_range(0x1030, 0x1030),</div><div class='add'>+	regmap_reg_range(0x1100, 0x1115),</div><div class='add'>+	regmap_reg_range(0x111a, 0x111f),</div><div class='add'>+	regmap_reg_range(0x1120, 0x112b),</div><div class='add'>+	regmap_reg_range(0x1134, 0x113b),</div><div class='add'>+	regmap_reg_range(0x113c, 0x113f),</div><div class='add'>+	regmap_reg_range(0x1400, 0x1401),</div><div class='add'>+	regmap_reg_range(0x1403, 0x1403),</div><div class='add'>+	regmap_reg_range(0x1410, 0x1417),</div><div class='add'>+	regmap_reg_range(0x1420, 0x1423),</div><div class='add'>+	regmap_reg_range(0x1500, 0x1507),</div><div class='add'>+	regmap_reg_range(0x1600, 0x1612),</div><div class='add'>+	regmap_reg_range(0x1800, 0x180f),</div><div class='add'>+	regmap_reg_range(0x1820, 0x1827),</div><div class='add'>+	regmap_reg_range(0x1830, 0x1837),</div><div class='add'>+	regmap_reg_range(0x1840, 0x184b),</div><div class='add'>+	regmap_reg_range(0x1900, 0x1907),</div><div class='add'>+	regmap_reg_range(0x1914, 0x1915),</div><div class='add'>+	regmap_reg_range(0x1a00, 0x1a03),</div><div class='add'>+	regmap_reg_range(0x1a04, 0x1a07),</div><div class='add'>+	regmap_reg_range(0x1b00, 0x1b01),</div><div class='add'>+	regmap_reg_range(0x1b04, 0x1b04),</div><div class='add'>+</div><div class='add'>+	/* port 2 */</div><div class='add'>+	regmap_reg_range(0x2000, 0x2001),</div><div class='add'>+	regmap_reg_range(0x2013, 0x2013),</div><div class='add'>+	regmap_reg_range(0x2017, 0x2017),</div><div class='add'>+	regmap_reg_range(0x201b, 0x201b),</div><div class='add'>+	regmap_reg_range(0x201f, 0x2020),</div><div class='add'>+	regmap_reg_range(0x2030, 0x2030),</div><div class='add'>+	regmap_reg_range(0x2100, 0x2115),</div><div class='add'>+	regmap_reg_range(0x211a, 0x211f),</div><div class='add'>+	regmap_reg_range(0x2120, 0x212b),</div><div class='add'>+	regmap_reg_range(0x2134, 0x213b),</div><div class='add'>+	regmap_reg_range(0x213c, 0x213f),</div><div class='add'>+	regmap_reg_range(0x2400, 0x2401),</div><div class='add'>+	regmap_reg_range(0x2403, 0x2403),</div><div class='add'>+	regmap_reg_range(0x2410, 0x2417),</div><div class='add'>+	regmap_reg_range(0x2420, 0x2423),</div><div class='add'>+	regmap_reg_range(0x2500, 0x2507),</div><div class='add'>+	regmap_reg_range(0x2600, 0x2612),</div><div class='add'>+	regmap_reg_range(0x2800, 0x280f),</div><div class='add'>+	regmap_reg_range(0x2820, 0x2827),</div><div class='add'>+	regmap_reg_range(0x2830, 0x2837),</div><div class='add'>+	regmap_reg_range(0x2840, 0x284b),</div><div class='add'>+	regmap_reg_range(0x2900, 0x2907),</div><div class='add'>+	regmap_reg_range(0x2914, 0x2915),</div><div class='add'>+	regmap_reg_range(0x2a00, 0x2a03),</div><div class='add'>+	regmap_reg_range(0x2a04, 0x2a07),</div><div class='add'>+	regmap_reg_range(0x2b00, 0x2b01),</div><div class='add'>+	regmap_reg_range(0x2b04, 0x2b04),</div><div class='add'>+</div><div class='add'>+	/* port 3 */</div><div class='add'>+	regmap_reg_range(0x3000, 0x3001),</div><div class='add'>+	regmap_reg_range(0x3013, 0x3013),</div><div class='add'>+	regmap_reg_range(0x3017, 0x3017),</div><div class='add'>+	regmap_reg_range(0x301b, 0x301b),</div><div class='add'>+	regmap_reg_range(0x301f, 0x3020),</div><div class='add'>+	regmap_reg_range(0x3030, 0x3030),</div><div class='add'>+	regmap_reg_range(0x3100, 0x3115),</div><div class='add'>+	regmap_reg_range(0x311a, 0x311f),</div><div class='add'>+	regmap_reg_range(0x3120, 0x312b),</div><div class='add'>+	regmap_reg_range(0x3134, 0x313b),</div><div class='add'>+	regmap_reg_range(0x313c, 0x313f),</div><div class='add'>+	regmap_reg_range(0x3400, 0x3401),</div><div class='add'>+	regmap_reg_range(0x3403, 0x3403),</div><div class='add'>+	regmap_reg_range(0x3410, 0x3417),</div><div class='add'>+	regmap_reg_range(0x3420, 0x3423),</div><div class='add'>+	regmap_reg_range(0x3500, 0x3507),</div><div class='add'>+	regmap_reg_range(0x3600, 0x3612),</div><div class='add'>+	regmap_reg_range(0x3800, 0x380f),</div><div class='add'>+	regmap_reg_range(0x3820, 0x3827),</div><div class='add'>+	regmap_reg_range(0x3830, 0x3837),</div><div class='add'>+	regmap_reg_range(0x3840, 0x384b),</div><div class='add'>+	regmap_reg_range(0x3900, 0x3907),</div><div class='add'>+	regmap_reg_range(0x3914, 0x3915),</div><div class='add'>+	regmap_reg_range(0x3a00, 0x3a03),</div><div class='add'>+	regmap_reg_range(0x3a04, 0x3a07),</div><div class='add'>+	regmap_reg_range(0x3b00, 0x3b01),</div><div class='add'>+	regmap_reg_range(0x3b04, 0x3b04),</div><div class='add'>+</div><div class='add'>+	/* port 4 */</div><div class='add'>+	regmap_reg_range(0x4000, 0x4001),</div><div class='add'>+	regmap_reg_range(0x4013, 0x4013),</div><div class='add'>+	regmap_reg_range(0x4017, 0x4017),</div><div class='add'>+	regmap_reg_range(0x401b, 0x401b),</div><div class='add'>+	regmap_reg_range(0x401f, 0x4020),</div><div class='add'>+	regmap_reg_range(0x4030, 0x4030),</div><div class='add'>+	regmap_reg_range(0x4100, 0x4115),</div><div class='add'>+	regmap_reg_range(0x411a, 0x411f),</div><div class='add'>+	regmap_reg_range(0x4120, 0x412b),</div><div class='add'>+	regmap_reg_range(0x4134, 0x413b),</div><div class='add'>+	regmap_reg_range(0x413c, 0x413f),</div><div class='add'>+	regmap_reg_range(0x4400, 0x4401),</div><div class='add'>+	regmap_reg_range(0x4403, 0x4403),</div><div class='add'>+	regmap_reg_range(0x4410, 0x4417),</div><div class='add'>+	regmap_reg_range(0x4420, 0x4423),</div><div class='add'>+	regmap_reg_range(0x4500, 0x4507),</div><div class='add'>+	regmap_reg_range(0x4600, 0x4612),</div><div class='add'>+	regmap_reg_range(0x4800, 0x480f),</div><div class='add'>+	regmap_reg_range(0x4820, 0x4827),</div><div class='add'>+	regmap_reg_range(0x4830, 0x4837),</div><div class='add'>+	regmap_reg_range(0x4840, 0x484b),</div><div class='add'>+	regmap_reg_range(0x4900, 0x4907),</div><div class='add'>+	regmap_reg_range(0x4914, 0x4915),</div><div class='add'>+	regmap_reg_range(0x4a00, 0x4a03),</div><div class='add'>+	regmap_reg_range(0x4a04, 0x4a07),</div><div class='add'>+	regmap_reg_range(0x4b00, 0x4b01),</div><div class='add'>+	regmap_reg_range(0x4b04, 0x4b04),</div><div class='add'>+</div><div class='add'>+	/* port 5 */</div><div class='add'>+	regmap_reg_range(0x5000, 0x5001),</div><div class='add'>+	regmap_reg_range(0x5013, 0x5013),</div><div class='add'>+	regmap_reg_range(0x5017, 0x5017),</div><div class='add'>+	regmap_reg_range(0x501b, 0x501b),</div><div class='add'>+	regmap_reg_range(0x501f, 0x5020),</div><div class='add'>+	regmap_reg_range(0x5030, 0x5030),</div><div class='add'>+	regmap_reg_range(0x5100, 0x5115),</div><div class='add'>+	regmap_reg_range(0x511a, 0x511f),</div><div class='add'>+	regmap_reg_range(0x5120, 0x512b),</div><div class='add'>+	regmap_reg_range(0x5134, 0x513b),</div><div class='add'>+	regmap_reg_range(0x513c, 0x513f),</div><div class='add'>+	regmap_reg_range(0x5400, 0x5401),</div><div class='add'>+	regmap_reg_range(0x5403, 0x5403),</div><div class='add'>+	regmap_reg_range(0x5410, 0x5417),</div><div class='add'>+	regmap_reg_range(0x5420, 0x5423),</div><div class='add'>+	regmap_reg_range(0x5500, 0x5507),</div><div class='add'>+	regmap_reg_range(0x5600, 0x5612),</div><div class='add'>+	regmap_reg_range(0x5800, 0x580f),</div><div class='add'>+	regmap_reg_range(0x5820, 0x5827),</div><div class='add'>+	regmap_reg_range(0x5830, 0x5837),</div><div class='add'>+	regmap_reg_range(0x5840, 0x584b),</div><div class='add'>+	regmap_reg_range(0x5900, 0x5907),</div><div class='add'>+	regmap_reg_range(0x5914, 0x5915),</div><div class='add'>+	regmap_reg_range(0x5a00, 0x5a03),</div><div class='add'>+	regmap_reg_range(0x5a04, 0x5a07),</div><div class='add'>+	regmap_reg_range(0x5b00, 0x5b01),</div><div class='add'>+	regmap_reg_range(0x5b04, 0x5b04),</div><div class='add'>+</div><div class='add'>+	/* port 6 */</div><div class='add'>+	regmap_reg_range(0x6000, 0x6001),</div><div class='add'>+	regmap_reg_range(0x6013, 0x6013),</div><div class='add'>+	regmap_reg_range(0x6017, 0x6017),</div><div class='add'>+	regmap_reg_range(0x601b, 0x601b),</div><div class='add'>+	regmap_reg_range(0x601f, 0x6020),</div><div class='add'>+	regmap_reg_range(0x6030, 0x6030),</div><div class='add'>+	regmap_reg_range(0x6100, 0x6115),</div><div class='add'>+	regmap_reg_range(0x611a, 0x611f),</div><div class='add'>+	regmap_reg_range(0x6120, 0x612b),</div><div class='add'>+	regmap_reg_range(0x6134, 0x613b),</div><div class='add'>+	regmap_reg_range(0x613c, 0x613f),</div><div class='add'>+	regmap_reg_range(0x6300, 0x6301),</div><div class='add'>+	regmap_reg_range(0x6400, 0x6401),</div><div class='add'>+	regmap_reg_range(0x6403, 0x6403),</div><div class='add'>+	regmap_reg_range(0x6410, 0x6417),</div><div class='add'>+	regmap_reg_range(0x6420, 0x6423),</div><div class='add'>+	regmap_reg_range(0x6500, 0x6507),</div><div class='add'>+	regmap_reg_range(0x6600, 0x6612),</div><div class='add'>+	regmap_reg_range(0x6800, 0x680f),</div><div class='add'>+	regmap_reg_range(0x6820, 0x6827),</div><div class='add'>+	regmap_reg_range(0x6830, 0x6837),</div><div class='add'>+	regmap_reg_range(0x6840, 0x684b),</div><div class='add'>+	regmap_reg_range(0x6900, 0x6907),</div><div class='add'>+	regmap_reg_range(0x6914, 0x6915),</div><div class='add'>+	regmap_reg_range(0x6a00, 0x6a03),</div><div class='add'>+	regmap_reg_range(0x6a04, 0x6a07),</div><div class='add'>+	regmap_reg_range(0x6b00, 0x6b01),</div><div class='add'>+	regmap_reg_range(0x6b04, 0x6b04),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_access_table ksz9896_register_set = {</div><div class='add'>+	.yes_ranges = ksz9896_valid_regs,</div><div class='add'>+	.n_yes_ranges = ARRAY_SIZE(ksz9896_valid_regs),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_range ksz8873_valid_regs[] = {</div><div class='add'>+	regmap_reg_range(0x00, 0x01),</div><div class='add'>+	/* global control register */</div><div class='add'>+	regmap_reg_range(0x02, 0x0f),</div><div class='add'>+</div><div class='add'>+	/* port registers */</div><div class='add'>+	regmap_reg_range(0x10, 0x1d),</div><div class='add'>+	regmap_reg_range(0x1e, 0x1f),</div><div class='add'>+	regmap_reg_range(0x20, 0x2d),</div><div class='add'>+	regmap_reg_range(0x2e, 0x2f),</div><div class='add'>+	regmap_reg_range(0x30, 0x39),</div><div class='add'>+	regmap_reg_range(0x3f, 0x3f),</div><div class='add'>+</div><div class='add'>+	/* advanced control registers */</div><div class='add'>+	regmap_reg_range(0x43, 0x43),</div><div class='add'>+	regmap_reg_range(0x60, 0x6f),</div><div class='add'>+	regmap_reg_range(0x70, 0x75),</div><div class='add'>+	regmap_reg_range(0x76, 0x78),</div><div class='add'>+	regmap_reg_range(0x79, 0x7a),</div><div class='add'>+	regmap_reg_range(0x7b, 0x83),</div><div class='add'>+	regmap_reg_range(0x8e, 0x99),</div><div class='add'>+	regmap_reg_range(0x9a, 0xa5),</div><div class='add'>+	regmap_reg_range(0xa6, 0xa6),</div><div class='add'>+	regmap_reg_range(0xa7, 0xaa),</div><div class='add'>+	regmap_reg_range(0xab, 0xae),</div><div class='add'>+	regmap_reg_range(0xaf, 0xba),</div><div class='add'>+	regmap_reg_range(0xbb, 0xbc),</div><div class='add'>+	regmap_reg_range(0xbd, 0xbd),</div><div class='add'>+	regmap_reg_range(0xc0, 0xc0),</div><div class='add'>+	regmap_reg_range(0xc2, 0xc2),</div><div class='add'>+	regmap_reg_range(0xc3, 0xc3),</div><div class='add'>+	regmap_reg_range(0xc4, 0xc4),</div><div class='add'>+	regmap_reg_range(0xc6, 0xc6),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_access_table ksz8873_register_set = {</div><div class='add'>+	.yes_ranges = ksz8873_valid_regs,</div><div class='add'>+	.n_yes_ranges = ARRAY_SIZE(ksz8873_valid_regs),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct ksz_chip_data ksz_switch_chips[] = {</div><div class='add'>+	[KSZ8463] = {</div><div class='add'>+		.chip_id = KSZ8463_CHIP_ID,</div><div class='add'>+		.dev_name = "KSZ8463",</div><div class='add'>+		.num_vlans = 16,</div><div class='add'>+		.num_alus = 0,</div><div class='add'>+		.num_statics = 8,</div><div class='add'>+		.cpu_ports = 0x4,	/* can be configured as cpu port */</div><div class='add'>+		.port_cnt = 3,</div><div class='add'>+		.num_tx_queues = 4,</div><div class='add'>+		.num_ipms = 4,</div><div class='add'>+		.ops = &amp;ksz8463_dev_ops,</div><div class='add'>+		.phylink_mac_ops = &amp;ksz88x3_phylink_mac_ops,</div><div class='add'>+		.mib_names = ksz88xx_mib_names,</div><div class='add'>+		.mib_cnt = ARRAY_SIZE(ksz88xx_mib_names),</div><div class='add'>+		.reg_mib_cnt = MIB_COUNTER_NUM,</div><div class='add'>+		.regs = ksz8463_regs,</div><div class='add'>+		.masks = ksz8463_masks,</div><div class='add'>+		.shifts = ksz8463_shifts,</div><div class='add'>+		.supports_mii = {false, false, true},</div><div class='add'>+		.supports_rmii = {false, false, true},</div><div class='add'>+		.internal_phy = {true, true, false},</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[KSZ8563] = {</div><div class='add'>+		.chip_id = KSZ8563_CHIP_ID,</div><div class='add'>+		.dev_name = "KSZ8563",</div><div class='add'>+		.num_vlans = 4096,</div><div class='add'>+		.num_alus = 4096,</div><div class='add'>+		.num_statics = 16,</div><div class='add'>+		.cpu_ports = 0x07,	/* can be configured as cpu port */</div><div class='add'>+		.port_cnt = 3,		/* total port count */</div><div class='add'>+		.port_nirqs = 3,</div><div class='add'>+		.num_tx_queues = 4,</div><div class='add'>+		.num_ipms = 8,</div><div class='add'>+		.tc_cbs_supported = true,</div><div class='add'>+		.ops = &amp;ksz9477_dev_ops,</div><div class='add'>+		.phylink_mac_ops = &amp;ksz9477_phylink_mac_ops,</div><div class='add'>+		.mib_names = ksz9477_mib_names,</div><div class='add'>+		.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),</div><div class='add'>+		.reg_mib_cnt = MIB_COUNTER_NUM,</div><div class='add'>+		.regs = ksz9477_regs,</div><div class='add'>+		.masks = ksz9477_masks,</div><div class='add'>+		.shifts = ksz9477_shifts,</div><div class='add'>+		.xmii_ctrl0 = ksz9477_xmii_ctrl0,</div><div class='add'>+		.xmii_ctrl1 = ksz8795_xmii_ctrl1, /* Same as ksz8795 */</div><div class='add'>+		.supports_mii = {false, false, true},</div><div class='add'>+		.supports_rmii = {false, false, true},</div><div class='add'>+		.supports_rgmii = {false, false, true},</div><div class='add'>+		.internal_phy = {true, true, false},</div><div class='add'>+		.gbit_capable = {false, false, true},</div><div class='add'>+		.ptp_capable = true,</div><div class='add'>+		.wr_table = &amp;ksz8563_register_set,</div><div class='add'>+		.rd_table = &amp;ksz8563_register_set,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[KSZ8795] = {</div><div class='add'>+		.chip_id = KSZ8795_CHIP_ID,</div><div class='add'>+		.dev_name = "KSZ8795",</div><div class='add'>+		.num_vlans = 4096,</div><div class='add'>+		.num_alus = 0,</div><div class='add'>+		.num_statics = 32,</div><div class='add'>+		.cpu_ports = 0x10,	/* can be configured as cpu port */</div><div class='add'>+		.port_cnt = 5,		/* total cpu and user ports */</div><div class='add'>+		.num_tx_queues = 4,</div><div class='add'>+		.num_ipms = 4,</div><div class='add'>+		.ops = &amp;ksz87xx_dev_ops,</div><div class='add'>+		.phylink_mac_ops = &amp;ksz8_phylink_mac_ops,</div><div class='add'>+		.ksz87xx_eee_link_erratum = true,</div><div class='add'>+		.mib_names = ksz9477_mib_names,</div><div class='add'>+		.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),</div><div class='add'>+		.reg_mib_cnt = MIB_COUNTER_NUM,</div><div class='add'>+		.regs = ksz8795_regs,</div><div class='add'>+		.masks = ksz8795_masks,</div><div class='add'>+		.shifts = ksz8795_shifts,</div><div class='add'>+		.xmii_ctrl0 = ksz8795_xmii_ctrl0,</div><div class='add'>+		.xmii_ctrl1 = ksz8795_xmii_ctrl1,</div><div class='add'>+		.supports_mii = {false, false, false, false, true},</div><div class='add'>+		.supports_rmii = {false, false, false, false, true},</div><div class='add'>+		.supports_rgmii = {false, false, false, false, true},</div><div class='add'>+		.internal_phy = {true, true, true, true, false},</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[KSZ8794] = {</div><div class='add'>+		/* WARNING</div><div class='add'>+		 * =======</div><div class='add'>+		 * KSZ8794 is similar to KSZ8795, except the port map</div><div class='add'>+		 * contains a gap between external and CPU ports, the</div><div class='add'>+		 * port map is NOT continuous. The per-port register</div><div class='add'>+		 * map is shifted accordingly too, i.e. registers at</div><div class='add'>+		 * offset 0x40 are NOT used on KSZ8794 and they ARE</div><div class='add'>+		 * used on KSZ8795 for external port 3.</div><div class='add'>+		 *           external  cpu</div><div class='add'>+		 * KSZ8794   0,1,2      4</div><div class='add'>+		 * KSZ8795   0,1,2,3    4</div><div class='add'>+		 * KSZ8765   0,1,2,3    4</div><div class='add'>+		 * port_cnt is configured as 5, even though it is 4</div><div class='add'>+		 */</div><div class='add'>+		.chip_id = KSZ8794_CHIP_ID,</div><div class='add'>+		.dev_name = "KSZ8794",</div><div class='add'>+		.num_vlans = 4096,</div><div class='add'>+		.num_alus = 0,</div><div class='add'>+		.num_statics = 32,</div><div class='add'>+		.cpu_ports = 0x10,	/* can be configured as cpu port */</div><div class='add'>+		.port_cnt = 5,		/* total cpu and user ports */</div><div class='add'>+		.num_tx_queues = 4,</div><div class='add'>+		.num_ipms = 4,</div><div class='add'>+		.ops = &amp;ksz87xx_dev_ops,</div><div class='add'>+		.phylink_mac_ops = &amp;ksz8_phylink_mac_ops,</div><div class='add'>+		.ksz87xx_eee_link_erratum = true,</div><div class='add'>+		.mib_names = ksz9477_mib_names,</div><div class='add'>+		.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),</div><div class='add'>+		.reg_mib_cnt = MIB_COUNTER_NUM,</div><div class='add'>+		.regs = ksz8795_regs,</div><div class='add'>+		.masks = ksz8795_masks,</div><div class='add'>+		.shifts = ksz8795_shifts,</div><div class='add'>+		.xmii_ctrl0 = ksz8795_xmii_ctrl0,</div><div class='add'>+		.xmii_ctrl1 = ksz8795_xmii_ctrl1,</div><div class='add'>+		.supports_mii = {false, false, false, false, true},</div><div class='add'>+		.supports_rmii = {false, false, false, false, true},</div><div class='add'>+		.supports_rgmii = {false, false, false, false, true},</div><div class='add'>+		.internal_phy = {true, true, true, false, false},</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[KSZ8765] = {</div><div class='add'>+		.chip_id = KSZ8765_CHIP_ID,</div><div class='add'>+		.dev_name = "KSZ8765",</div><div class='add'>+		.num_vlans = 4096,</div><div class='add'>+		.num_alus = 0,</div><div class='add'>+		.num_statics = 32,</div><div class='add'>+		.cpu_ports = 0x10,	/* can be configured as cpu port */</div><div class='add'>+		.port_cnt = 5,		/* total cpu and user ports */</div><div class='add'>+		.num_tx_queues = 4,</div><div class='add'>+		.num_ipms = 4,</div><div class='add'>+		.ops = &amp;ksz87xx_dev_ops,</div><div class='add'>+		.phylink_mac_ops = &amp;ksz8_phylink_mac_ops,</div><div class='add'>+		.ksz87xx_eee_link_erratum = true,</div><div class='add'>+		.mib_names = ksz9477_mib_names,</div><div class='add'>+		.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),</div><div class='add'>+		.reg_mib_cnt = MIB_COUNTER_NUM,</div><div class='add'>+		.regs = ksz8795_regs,</div><div class='add'>+		.masks = ksz8795_masks,</div><div class='add'>+		.shifts = ksz8795_shifts,</div><div class='add'>+		.xmii_ctrl0 = ksz8795_xmii_ctrl0,</div><div class='add'>+		.xmii_ctrl1 = ksz8795_xmii_ctrl1,</div><div class='add'>+		.supports_mii = {false, false, false, false, true},</div><div class='add'>+		.supports_rmii = {false, false, false, false, true},</div><div class='add'>+		.supports_rgmii = {false, false, false, false, true},</div><div class='add'>+		.internal_phy = {true, true, true, true, false},</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[KSZ88X3] = {</div><div class='add'>+		.chip_id = KSZ88X3_CHIP_ID,</div><div class='add'>+		.dev_name = "KSZ8863/KSZ8873",</div><div class='add'>+		.num_vlans = 16,</div><div class='add'>+		.num_alus = 0,</div><div class='add'>+		.num_statics = 8,</div><div class='add'>+		.cpu_ports = 0x4,	/* can be configured as cpu port */</div><div class='add'>+		.port_cnt = 3,</div><div class='add'>+		.num_tx_queues = 4,</div><div class='add'>+		.num_ipms = 4,</div><div class='add'>+		.ops = &amp;ksz88xx_dev_ops,</div><div class='add'>+		.phylink_mac_ops = &amp;ksz88x3_phylink_mac_ops,</div><div class='add'>+		.mib_names = ksz88xx_mib_names,</div><div class='add'>+		.mib_cnt = ARRAY_SIZE(ksz88xx_mib_names),</div><div class='add'>+		.reg_mib_cnt = MIB_COUNTER_NUM,</div><div class='add'>+		.regs = ksz8863_regs,</div><div class='add'>+		.masks = ksz8863_masks,</div><div class='add'>+		.shifts = ksz8863_shifts,</div><div class='add'>+		.supports_mii = {false, false, true},</div><div class='add'>+		.supports_rmii = {false, false, true},</div><div class='add'>+		.internal_phy = {true, true, false},</div><div class='add'>+		.wr_table = &amp;ksz8873_register_set,</div><div class='add'>+		.rd_table = &amp;ksz8873_register_set,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[KSZ8864] = {</div><div class='add'>+		/* WARNING</div><div class='add'>+		 * =======</div><div class='add'>+		 * KSZ8864 is similar to KSZ8895, except the first port</div><div class='add'>+		 * does not exist.</div><div class='add'>+		 *           external  cpu</div><div class='add'>+		 * KSZ8864   1,2,3      4</div><div class='add'>+		 * KSZ8895   0,1,2,3    4</div><div class='add'>+		 * port_cnt is configured as 5, even though it is 4</div><div class='add'>+		 */</div><div class='add'>+		.chip_id = KSZ8864_CHIP_ID,</div><div class='add'>+		.dev_name = "KSZ8864",</div><div class='add'>+		.num_vlans = 4096,</div><div class='add'>+		.num_alus = 0,</div><div class='add'>+		.num_statics = 32,</div><div class='add'>+		.cpu_ports = 0x10,	/* can be configured as cpu port */</div><div class='add'>+		.port_cnt = 5,		/* total cpu and user ports */</div><div class='add'>+		.num_tx_queues = 4,</div><div class='add'>+		.num_ipms = 4,</div><div class='add'>+		.ops = &amp;ksz88xx_dev_ops,</div><div class='add'>+		.phylink_mac_ops = &amp;ksz88x3_phylink_mac_ops,</div><div class='add'>+		.mib_names = ksz88xx_mib_names,</div><div class='add'>+		.mib_cnt = ARRAY_SIZE(ksz88xx_mib_names),</div><div class='add'>+		.reg_mib_cnt = MIB_COUNTER_NUM,</div><div class='add'>+		.regs = ksz8895_regs,</div><div class='add'>+		.masks = ksz8895_masks,</div><div class='add'>+		.shifts = ksz8895_shifts,</div><div class='add'>+		.supports_mii = {false, false, false, false, true},</div><div class='add'>+		.supports_rmii = {false, false, false, false, true},</div><div class='add'>+		.internal_phy = {false, true, true, true, false},</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[KSZ8895] = {</div><div class='add'>+		.chip_id = KSZ8895_CHIP_ID,</div><div class='add'>+		.dev_name = "KSZ8895",</div><div class='add'>+		.num_vlans = 4096,</div><div class='add'>+		.num_alus = 0,</div><div class='add'>+		.num_statics = 32,</div><div class='add'>+		.cpu_ports = 0x10,	/* can be configured as cpu port */</div><div class='add'>+		.port_cnt = 5,		/* total cpu and user ports */</div><div class='add'>+		.num_tx_queues = 4,</div><div class='add'>+		.num_ipms = 4,</div><div class='add'>+		.ops = &amp;ksz88xx_dev_ops,</div><div class='add'>+		.phylink_mac_ops = &amp;ksz88x3_phylink_mac_ops,</div><div class='add'>+		.mib_names = ksz88xx_mib_names,</div><div class='add'>+		.mib_cnt = ARRAY_SIZE(ksz88xx_mib_names),</div><div class='add'>+		.reg_mib_cnt = MIB_COUNTER_NUM,</div><div class='add'>+		.regs = ksz8895_regs,</div><div class='add'>+		.masks = ksz8895_masks,</div><div class='add'>+		.shifts = ksz8895_shifts,</div><div class='add'>+		.supports_mii = {false, false, false, false, true},</div><div class='add'>+		.supports_rmii = {false, false, false, false, true},</div><div class='add'>+		.internal_phy = {true, true, true, true, false},</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[KSZ9477] = {</div><div class='add'>+		.chip_id = KSZ9477_CHIP_ID,</div><div class='add'>+		.dev_name = "KSZ9477",</div><div class='add'>+		.num_vlans = 4096,</div><div class='add'>+		.num_alus = 4096,</div><div class='add'>+		.num_statics = 16,</div><div class='add'>+		.cpu_ports = 0x7F,	/* can be configured as cpu port */</div><div class='add'>+		.port_cnt = 7,		/* total physical port count */</div><div class='add'>+		.port_nirqs = 4,</div><div class='add'>+		.num_tx_queues = 4,</div><div class='add'>+		.num_ipms = 8,</div><div class='add'>+		.tc_cbs_supported = true,</div><div class='add'>+		.ops = &amp;ksz9477_dev_ops,</div><div class='add'>+		.phylink_mac_ops = &amp;ksz9477_phylink_mac_ops,</div><div class='add'>+		.phy_errata_9477 = true,</div><div class='add'>+		.mib_names = ksz9477_mib_names,</div><div class='add'>+		.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),</div><div class='add'>+		.reg_mib_cnt = MIB_COUNTER_NUM,</div><div class='add'>+		.regs = ksz9477_regs,</div><div class='add'>+		.masks = ksz9477_masks,</div><div class='add'>+		.shifts = ksz9477_shifts,</div><div class='add'>+		.xmii_ctrl0 = ksz9477_xmii_ctrl0,</div><div class='add'>+		.xmii_ctrl1 = ksz9477_xmii_ctrl1,</div><div class='add'>+		.supports_mii	= {false, false, false, false,</div><div class='add'>+				   false, true, false},</div><div class='add'>+		.supports_rmii	= {false, false, false, false,</div><div class='add'>+				   false, true, false},</div><div class='add'>+		.supports_rgmii = {false, false, false, false,</div><div class='add'>+				   false, true, false},</div><div class='add'>+		.internal_phy	= {true, true, true, true,</div><div class='add'>+				   true, false, false},</div><div class='add'>+		.gbit_capable	= {true, true, true, true, true, true, true},</div><div class='add'>+		.ptp_capable = true,</div><div class='add'>+		.sgmii_port = 7,</div><div class='add'>+		.wr_table = &amp;ksz9477_register_set,</div><div class='add'>+		.rd_table = &amp;ksz9477_register_set,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[KSZ9896] = {</div><div class='add'>+		.chip_id = KSZ9896_CHIP_ID,</div><div class='add'>+		.dev_name = "KSZ9896",</div><div class='add'>+		.num_vlans = 4096,</div><div class='add'>+		.num_alus = 4096,</div><div class='add'>+		.num_statics = 16,</div><div class='add'>+		.cpu_ports = 0x3F,	/* can be configured as cpu port */</div><div class='add'>+		.port_cnt = 6,		/* total physical port count */</div><div class='add'>+		.port_nirqs = 2,</div><div class='add'>+		.num_tx_queues = 4,</div><div class='add'>+		.num_ipms = 8,</div><div class='add'>+		.ops = &amp;ksz9477_dev_ops,</div><div class='add'>+		.phylink_mac_ops = &amp;ksz9477_phylink_mac_ops,</div><div class='add'>+		.phy_errata_9477 = true,</div><div class='add'>+		.mib_names = ksz9477_mib_names,</div><div class='add'>+		.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),</div><div class='add'>+		.reg_mib_cnt = MIB_COUNTER_NUM,</div><div class='add'>+		.regs = ksz9477_regs,</div><div class='add'>+		.masks = ksz9477_masks,</div><div class='add'>+		.shifts = ksz9477_shifts,</div><div class='add'>+		.xmii_ctrl0 = ksz9477_xmii_ctrl0,</div><div class='add'>+		.xmii_ctrl1 = ksz9477_xmii_ctrl1,</div><div class='add'>+		.supports_mii	= {false, false, false, false,</div><div class='add'>+				   false, true},</div><div class='add'>+		.supports_rmii	= {false, false, false, false,</div><div class='add'>+				   false, true},</div><div class='add'>+		.supports_rgmii = {false, false, false, false,</div><div class='add'>+				   false, true},</div><div class='add'>+		.internal_phy	= {true, true, true, true,</div><div class='add'>+				   true, false},</div><div class='add'>+		.gbit_capable	= {true, true, true, true, true, true},</div><div class='add'>+		.wr_table = &amp;ksz9896_register_set,</div><div class='add'>+		.rd_table = &amp;ksz9896_register_set,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[KSZ9897] = {</div><div class='add'>+		.chip_id = KSZ9897_CHIP_ID,</div><div class='add'>+		.dev_name = "KSZ9897",</div><div class='add'>+		.num_vlans = 4096,</div><div class='add'>+		.num_alus = 4096,</div><div class='add'>+		.num_statics = 16,</div><div class='add'>+		.cpu_ports = 0x7F,	/* can be configured as cpu port */</div><div class='add'>+		.port_cnt = 7,		/* total physical port count */</div><div class='add'>+		.port_nirqs = 2,</div><div class='add'>+		.num_tx_queues = 4,</div><div class='add'>+		.num_ipms = 8,</div><div class='add'>+		.ops = &amp;ksz9477_dev_ops,</div><div class='add'>+		.phylink_mac_ops = &amp;ksz9477_phylink_mac_ops,</div><div class='add'>+		.phy_errata_9477 = true,</div><div class='add'>+		.mib_names = ksz9477_mib_names,</div><div class='add'>+		.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),</div><div class='add'>+		.reg_mib_cnt = MIB_COUNTER_NUM,</div><div class='add'>+		.regs = ksz9477_regs,</div><div class='add'>+		.masks = ksz9477_masks,</div><div class='add'>+		.shifts = ksz9477_shifts,</div><div class='add'>+		.xmii_ctrl0 = ksz9477_xmii_ctrl0,</div><div class='add'>+		.xmii_ctrl1 = ksz9477_xmii_ctrl1,</div><div class='add'>+		.supports_mii	= {false, false, false, false,</div><div class='add'>+				   false, true, true},</div><div class='add'>+		.supports_rmii	= {false, false, false, false,</div><div class='add'>+				   false, true, true},</div><div class='add'>+		.supports_rgmii = {false, false, false, false,</div><div class='add'>+				   false, true, true},</div><div class='add'>+		.internal_phy	= {true, true, true, true,</div><div class='add'>+				   true, false, false},</div><div class='add'>+		.gbit_capable	= {true, true, true, true, true, true, true},</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[KSZ9893] = {</div><div class='add'>+		.chip_id = KSZ9893_CHIP_ID,</div><div class='add'>+		.dev_name = "KSZ9893",</div><div class='add'>+		.num_vlans = 4096,</div><div class='add'>+		.num_alus = 4096,</div><div class='add'>+		.num_statics = 16,</div><div class='add'>+		.cpu_ports = 0x07,	/* can be configured as cpu port */</div><div class='add'>+		.port_cnt = 3,		/* total port count */</div><div class='add'>+		.port_nirqs = 2,</div><div class='add'>+		.num_tx_queues = 4,</div><div class='add'>+		.num_ipms = 8,</div><div class='add'>+		.ops = &amp;ksz9477_dev_ops,</div><div class='add'>+		.phylink_mac_ops = &amp;ksz9477_phylink_mac_ops,</div><div class='add'>+		.mib_names = ksz9477_mib_names,</div><div class='add'>+		.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),</div><div class='add'>+		.reg_mib_cnt = MIB_COUNTER_NUM,</div><div class='add'>+		.regs = ksz9477_regs,</div><div class='add'>+		.masks = ksz9477_masks,</div><div class='add'>+		.shifts = ksz9477_shifts,</div><div class='add'>+		.xmii_ctrl0 = ksz9477_xmii_ctrl0,</div><div class='add'>+		.xmii_ctrl1 = ksz8795_xmii_ctrl1, /* Same as ksz8795 */</div><div class='add'>+		.supports_mii = {false, false, true},</div><div class='add'>+		.supports_rmii = {false, false, true},</div><div class='add'>+		.supports_rgmii = {false, false, true},</div><div class='add'>+		.internal_phy = {true, true, false},</div><div class='add'>+		.gbit_capable = {true, true, true},</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[KSZ9563] = {</div><div class='add'>+		.chip_id = KSZ9563_CHIP_ID,</div><div class='add'>+		.dev_name = "KSZ9563",</div><div class='add'>+		.num_vlans = 4096,</div><div class='add'>+		.num_alus = 4096,</div><div class='add'>+		.num_statics = 16,</div><div class='add'>+		.cpu_ports = 0x07,	/* can be configured as cpu port */</div><div class='add'>+		.port_cnt = 3,		/* total port count */</div><div class='add'>+		.port_nirqs = 3,</div><div class='add'>+		.num_tx_queues = 4,</div><div class='add'>+		.num_ipms = 8,</div><div class='add'>+		.tc_cbs_supported = true,</div><div class='add'>+		.ops = &amp;ksz9477_dev_ops,</div><div class='add'>+		.phylink_mac_ops = &amp;ksz9477_phylink_mac_ops,</div><div class='add'>+		.mib_names = ksz9477_mib_names,</div><div class='add'>+		.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),</div><div class='add'>+		.reg_mib_cnt = MIB_COUNTER_NUM,</div><div class='add'>+		.regs = ksz9477_regs,</div><div class='add'>+		.masks = ksz9477_masks,</div><div class='add'>+		.shifts = ksz9477_shifts,</div><div class='add'>+		.xmii_ctrl0 = ksz9477_xmii_ctrl0,</div><div class='add'>+		.xmii_ctrl1 = ksz8795_xmii_ctrl1, /* Same as ksz8795 */</div><div class='add'>+		.supports_mii = {false, false, true},</div><div class='add'>+		.supports_rmii = {false, false, true},</div><div class='add'>+		.supports_rgmii = {false, false, true},</div><div class='add'>+		.internal_phy = {true, true, false},</div><div class='add'>+		.gbit_capable = {true, true, true},</div><div class='add'>+		.ptp_capable = true,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[KSZ8567] = {</div><div class='add'>+		.chip_id = KSZ8567_CHIP_ID,</div><div class='add'>+		.dev_name = "KSZ8567",</div><div class='add'>+		.num_vlans = 4096,</div><div class='add'>+		.num_alus = 4096,</div><div class='add'>+		.num_statics = 16,</div><div class='add'>+		.cpu_ports = 0x7F,	/* can be configured as cpu port */</div><div class='add'>+		.port_cnt = 7,		/* total port count */</div><div class='add'>+		.port_nirqs = 3,</div><div class='add'>+		.num_tx_queues = 4,</div><div class='add'>+		.num_ipms = 8,</div><div class='add'>+		.tc_cbs_supported = true,</div><div class='add'>+		.ops = &amp;ksz9477_dev_ops,</div><div class='add'>+		.phylink_mac_ops = &amp;ksz9477_phylink_mac_ops,</div><div class='add'>+		.phy_errata_9477 = true,</div><div class='add'>+		.mib_names = ksz9477_mib_names,</div><div class='add'>+		.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),</div><div class='add'>+		.reg_mib_cnt = MIB_COUNTER_NUM,</div><div class='add'>+		.regs = ksz9477_regs,</div><div class='add'>+		.masks = ksz9477_masks,</div><div class='add'>+		.shifts = ksz9477_shifts,</div><div class='add'>+		.xmii_ctrl0 = ksz9477_xmii_ctrl0,</div><div class='add'>+		.xmii_ctrl1 = ksz9477_xmii_ctrl1,</div><div class='add'>+		.supports_mii	= {false, false, false, false,</div><div class='add'>+				   false, true, true},</div><div class='add'>+		.supports_rmii	= {false, false, false, false,</div><div class='add'>+				   false, true, true},</div><div class='add'>+		.supports_rgmii = {false, false, false, false,</div><div class='add'>+				   false, true, true},</div><div class='add'>+		.internal_phy	= {true, true, true, true,</div><div class='add'>+				   true, false, false},</div><div class='add'>+		.gbit_capable	= {false, false, false, false, false,</div><div class='add'>+				   true, true},</div><div class='add'>+		.ptp_capable = true,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[KSZ9567] = {</div><div class='add'>+		.chip_id = KSZ9567_CHIP_ID,</div><div class='add'>+		.dev_name = "KSZ9567",</div><div class='add'>+		.num_vlans = 4096,</div><div class='add'>+		.num_alus = 4096,</div><div class='add'>+		.num_statics = 16,</div><div class='add'>+		.cpu_ports = 0x7F,	/* can be configured as cpu port */</div><div class='add'>+		.port_cnt = 7,		/* total physical port count */</div><div class='add'>+		.port_nirqs = 3,</div><div class='add'>+		.num_tx_queues = 4,</div><div class='add'>+		.num_ipms = 8,</div><div class='add'>+		.tc_cbs_supported = true,</div><div class='add'>+		.ops = &amp;ksz9477_dev_ops,</div><div class='add'>+		.mib_names = ksz9477_mib_names,</div><div class='add'>+		.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),</div><div class='add'>+		.reg_mib_cnt = MIB_COUNTER_NUM,</div><div class='add'>+		.regs = ksz9477_regs,</div><div class='add'>+		.masks = ksz9477_masks,</div><div class='add'>+		.shifts = ksz9477_shifts,</div><div class='add'>+		.xmii_ctrl0 = ksz9477_xmii_ctrl0,</div><div class='add'>+		.xmii_ctrl1 = ksz9477_xmii_ctrl1,</div><div class='add'>+		.supports_mii	= {false, false, false, false,</div><div class='add'>+				   false, true, true},</div><div class='add'>+		.supports_rmii	= {false, false, false, false,</div><div class='add'>+				   false, true, true},</div><div class='add'>+		.supports_rgmii = {false, false, false, false,</div><div class='add'>+				   false, true, true},</div><div class='add'>+		.internal_phy	= {true, true, true, true,</div><div class='add'>+				   true, false, false},</div><div class='add'>+		.gbit_capable	= {true, true, true, true, true, true, true},</div><div class='add'>+		.ptp_capable = true,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[LAN9370] = {</div><div class='add'>+		.chip_id = LAN9370_CHIP_ID,</div><div class='add'>+		.dev_name = "LAN9370",</div><div class='add'>+		.num_vlans = 4096,</div><div class='add'>+		.num_alus = 1024,</div><div class='add'>+		.num_statics = 256,</div><div class='add'>+		.cpu_ports = 0x10,	/* can be configured as cpu port */</div><div class='add'>+		.port_cnt = 5,		/* total physical port count */</div><div class='add'>+		.port_nirqs = 6,</div><div class='add'>+		.num_tx_queues = 8,</div><div class='add'>+		.num_ipms = 8,</div><div class='add'>+		.tc_cbs_supported = true,</div><div class='add'>+		.phy_side_mdio_supported = true,</div><div class='add'>+		.ops = &amp;lan937x_dev_ops,</div><div class='add'>+		.phylink_mac_ops = &amp;lan937x_phylink_mac_ops,</div><div class='add'>+		.mib_names = ksz9477_mib_names,</div><div class='add'>+		.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),</div><div class='add'>+		.reg_mib_cnt = MIB_COUNTER_NUM,</div><div class='add'>+		.regs = ksz9477_regs,</div><div class='add'>+		.masks = lan937x_masks,</div><div class='add'>+		.shifts = lan937x_shifts,</div><div class='add'>+		.xmii_ctrl0 = ksz9477_xmii_ctrl0,</div><div class='add'>+		.xmii_ctrl1 = ksz9477_xmii_ctrl1,</div><div class='add'>+		.supports_mii = {false, false, false, false, true},</div><div class='add'>+		.supports_rmii = {false, false, false, false, true},</div><div class='add'>+		.supports_rgmii = {false, false, false, false, true},</div><div class='add'>+		.internal_phy = {true, true, true, true, false},</div><div class='add'>+		.ptp_capable = true,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[LAN9371] = {</div><div class='add'>+		.chip_id = LAN9371_CHIP_ID,</div><div class='add'>+		.dev_name = "LAN9371",</div><div class='add'>+		.num_vlans = 4096,</div><div class='add'>+		.num_alus = 1024,</div><div class='add'>+		.num_statics = 256,</div><div class='add'>+		.cpu_ports = 0x30,	/* can be configured as cpu port */</div><div class='add'>+		.port_cnt = 6,		/* total physical port count */</div><div class='add'>+		.port_nirqs = 6,</div><div class='add'>+		.num_tx_queues = 8,</div><div class='add'>+		.num_ipms = 8,</div><div class='add'>+		.tc_cbs_supported = true,</div><div class='add'>+		.phy_side_mdio_supported = true,</div><div class='add'>+		.ops = &amp;lan937x_dev_ops,</div><div class='add'>+		.phylink_mac_ops = &amp;lan937x_phylink_mac_ops,</div><div class='add'>+		.mib_names = ksz9477_mib_names,</div><div class='add'>+		.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),</div><div class='add'>+		.reg_mib_cnt = MIB_COUNTER_NUM,</div><div class='add'>+		.regs = ksz9477_regs,</div><div class='add'>+		.masks = lan937x_masks,</div><div class='add'>+		.shifts = lan937x_shifts,</div><div class='add'>+		.xmii_ctrl0 = ksz9477_xmii_ctrl0,</div><div class='add'>+		.xmii_ctrl1 = ksz9477_xmii_ctrl1,</div><div class='add'>+		.supports_mii = {false, false, false, false, true, true},</div><div class='add'>+		.supports_rmii = {false, false, false, false, true, true},</div><div class='add'>+		.supports_rgmii = {false, false, false, false, true, true},</div><div class='add'>+		.internal_phy = {true, true, true, true, false, false},</div><div class='add'>+		.ptp_capable = true,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[LAN9372] = {</div><div class='add'>+		.chip_id = LAN9372_CHIP_ID,</div><div class='add'>+		.dev_name = "LAN9372",</div><div class='add'>+		.num_vlans = 4096,</div><div class='add'>+		.num_alus = 1024,</div><div class='add'>+		.num_statics = 256,</div><div class='add'>+		.cpu_ports = 0x30,	/* can be configured as cpu port */</div><div class='add'>+		.port_cnt = 8,		/* total physical port count */</div><div class='add'>+		.port_nirqs = 6,</div><div class='add'>+		.num_tx_queues = 8,</div><div class='add'>+		.num_ipms = 8,</div><div class='add'>+		.tc_cbs_supported = true,</div><div class='add'>+		.phy_side_mdio_supported = true,</div><div class='add'>+		.ops = &amp;lan937x_dev_ops,</div><div class='add'>+		.phylink_mac_ops = &amp;lan937x_phylink_mac_ops,</div><div class='add'>+		.mib_names = ksz9477_mib_names,</div><div class='add'>+		.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),</div><div class='add'>+		.reg_mib_cnt = MIB_COUNTER_NUM,</div><div class='add'>+		.regs = ksz9477_regs,</div><div class='add'>+		.masks = lan937x_masks,</div><div class='add'>+		.shifts = lan937x_shifts,</div><div class='add'>+		.xmii_ctrl0 = ksz9477_xmii_ctrl0,</div><div class='add'>+		.xmii_ctrl1 = ksz9477_xmii_ctrl1,</div><div class='add'>+		.supports_mii	= {false, false, false, false,</div><div class='add'>+				   true, true, false, false},</div><div class='add'>+		.supports_rmii	= {false, false, false, false,</div><div class='add'>+				   true, true, false, false},</div><div class='add'>+		.supports_rgmii = {false, false, false, false,</div><div class='add'>+				   true, true, false, false},</div><div class='add'>+		.internal_phy	= {true, true, true, true,</div><div class='add'>+				   false, false, true, true},</div><div class='add'>+		.ptp_capable = true,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[LAN9373] = {</div><div class='add'>+		.chip_id = LAN9373_CHIP_ID,</div><div class='add'>+		.dev_name = "LAN9373",</div><div class='add'>+		.num_vlans = 4096,</div><div class='add'>+		.num_alus = 1024,</div><div class='add'>+		.num_statics = 256,</div><div class='add'>+		.cpu_ports = 0x38,	/* can be configured as cpu port */</div><div class='add'>+		.port_cnt = 5,		/* total physical port count */</div><div class='add'>+		.port_nirqs = 6,</div><div class='add'>+		.num_tx_queues = 8,</div><div class='add'>+		.num_ipms = 8,</div><div class='add'>+		.tc_cbs_supported = true,</div><div class='add'>+		.phy_side_mdio_supported = true,</div><div class='add'>+		.ops = &amp;lan937x_dev_ops,</div><div class='add'>+		.phylink_mac_ops = &amp;lan937x_phylink_mac_ops,</div><div class='add'>+		.mib_names = ksz9477_mib_names,</div><div class='add'>+		.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),</div><div class='add'>+		.reg_mib_cnt = MIB_COUNTER_NUM,</div><div class='add'>+		.regs = ksz9477_regs,</div><div class='add'>+		.masks = lan937x_masks,</div><div class='add'>+		.shifts = lan937x_shifts,</div><div class='add'>+		.xmii_ctrl0 = ksz9477_xmii_ctrl0,</div><div class='add'>+		.xmii_ctrl1 = ksz9477_xmii_ctrl1,</div><div class='add'>+		.supports_mii	= {false, false, false, false,</div><div class='add'>+				   true, true, false, false},</div><div class='add'>+		.supports_rmii	= {false, false, false, false,</div><div class='add'>+				   true, true, false, false},</div><div class='add'>+		.supports_rgmii = {false, false, false, false,</div><div class='add'>+				   true, true, false, false},</div><div class='add'>+		.internal_phy	= {true, true, true, false,</div><div class='add'>+				   false, false, true, true},</div><div class='add'>+		.ptp_capable = true,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[LAN9374] = {</div><div class='add'>+		.chip_id = LAN9374_CHIP_ID,</div><div class='add'>+		.dev_name = "LAN9374",</div><div class='add'>+		.num_vlans = 4096,</div><div class='add'>+		.num_alus = 1024,</div><div class='add'>+		.num_statics = 256,</div><div class='add'>+		.cpu_ports = 0x30,	/* can be configured as cpu port */</div><div class='add'>+		.port_cnt = 8,		/* total physical port count */</div><div class='add'>+		.port_nirqs = 6,</div><div class='add'>+		.num_tx_queues = 8,</div><div class='add'>+		.num_ipms = 8,</div><div class='add'>+		.tc_cbs_supported = true,</div><div class='add'>+		.phy_side_mdio_supported = true,</div><div class='add'>+		.ops = &amp;lan937x_dev_ops,</div><div class='add'>+		.phylink_mac_ops = &amp;lan937x_phylink_mac_ops,</div><div class='add'>+		.mib_names = ksz9477_mib_names,</div><div class='add'>+		.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),</div><div class='add'>+		.reg_mib_cnt = MIB_COUNTER_NUM,</div><div class='add'>+		.regs = ksz9477_regs,</div><div class='add'>+		.masks = lan937x_masks,</div><div class='add'>+		.shifts = lan937x_shifts,</div><div class='add'>+		.xmii_ctrl0 = ksz9477_xmii_ctrl0,</div><div class='add'>+		.xmii_ctrl1 = ksz9477_xmii_ctrl1,</div><div class='add'>+		.supports_mii	= {false, false, false, false,</div><div class='add'>+				   true, true, false, false},</div><div class='add'>+		.supports_rmii	= {false, false, false, false,</div><div class='add'>+				   true, true, false, false},</div><div class='add'>+		.supports_rgmii = {false, false, false, false,</div><div class='add'>+				   true, true, false, false},</div><div class='add'>+		.internal_phy	= {true, true, true, true,</div><div class='add'>+				   false, false, true, true},</div><div class='add'>+		.ptp_capable = true,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[LAN9646] = {</div><div class='add'>+		.chip_id = LAN9646_CHIP_ID,</div><div class='add'>+		.dev_name = "LAN9646",</div><div class='add'>+		.num_vlans = 4096,</div><div class='add'>+		.num_alus = 4096,</div><div class='add'>+		.num_statics = 16,</div><div class='add'>+		.cpu_ports = 0x7F,	/* can be configured as cpu port */</div><div class='add'>+		.port_cnt = 7,		/* total physical port count */</div><div class='add'>+		.port_nirqs = 4,</div><div class='add'>+		.num_tx_queues = 4,</div><div class='add'>+		.num_ipms = 8,</div><div class='add'>+		.ops = &amp;ksz9477_dev_ops,</div><div class='add'>+		.phylink_mac_ops = &amp;ksz9477_phylink_mac_ops,</div><div class='add'>+		.phy_errata_9477 = true,</div><div class='add'>+		.mib_names = ksz9477_mib_names,</div><div class='add'>+		.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),</div><div class='add'>+		.reg_mib_cnt = MIB_COUNTER_NUM,</div><div class='add'>+		.regs = ksz9477_regs,</div><div class='add'>+		.masks = ksz9477_masks,</div><div class='add'>+		.shifts = ksz9477_shifts,</div><div class='add'>+		.xmii_ctrl0 = ksz9477_xmii_ctrl0,</div><div class='add'>+		.xmii_ctrl1 = ksz9477_xmii_ctrl1,</div><div class='add'>+		.supports_mii	= {false, false, false, false,</div><div class='add'>+				   false, true, true},</div><div class='add'>+		.supports_rmii	= {false, false, false, false,</div><div class='add'>+				   false, true, true},</div><div class='add'>+		.supports_rgmii = {false, false, false, false,</div><div class='add'>+				   false, true, true},</div><div class='add'>+		.internal_phy	= {true, true, true, true,</div><div class='add'>+				   true, false, false},</div><div class='add'>+		.gbit_capable	= {true, true, true, true, true, true, true},</div><div class='add'>+		.sgmii_port = 7,</div><div class='add'>+		.wr_table = &amp;ksz9477_register_set,</div><div class='add'>+		.rd_table = &amp;ksz9477_register_set,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+EXPORT_SYMBOL_GPL(ksz_switch_chips);</div><div class='add'>+</div><div class='add'>+static const struct ksz_chip_data *ksz_lookup_info(unsigned int prod_num)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(ksz_switch_chips); i++) {</div><div class='add'>+		const struct ksz_chip_data *chip = &amp;ksz_switch_chips[i];</div><div class='add'>+</div><div class='add'>+		if (chip-&gt;chip_id == prod_num)</div><div class='add'>+			return chip;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_check_device_id(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	const struct ksz_chip_data *expected_chip_data;</div><div class='add'>+	u32 expected_chip_id;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;pdata) {</div><div class='add'>+		expected_chip_id = dev-&gt;pdata-&gt;chip_id;</div><div class='add'>+		expected_chip_data = ksz_lookup_info(expected_chip_id);</div><div class='add'>+		if (WARN_ON(!expected_chip_data))</div><div class='add'>+			return -ENODEV;</div><div class='add'>+	} else {</div><div class='add'>+		expected_chip_data = of_device_get_match_data(dev-&gt;dev);</div><div class='add'>+		expected_chip_id = expected_chip_data-&gt;chip_id;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (expected_chip_id != dev-&gt;chip_id) {</div><div class='add'>+		dev_err(dev-&gt;dev,</div><div class='add'>+			"Device tree specifies chip %s but found %s, please fix it!\n",</div><div class='add'>+			expected_chip_data-&gt;dev_name, dev-&gt;info-&gt;dev_name);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz_phylink_get_caps(struct dsa_switch *ds, int port,</div><div class='add'>+				 struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;info-&gt;supports_mii[port])</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_MII, config-&gt;supported_interfaces);</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;info-&gt;supports_rmii[port])</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_RMII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;info-&gt;supports_rgmii[port])</div><div class='add'>+		phy_interface_set_rgmii(config-&gt;supported_interfaces);</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;info-&gt;internal_phy[port]) {</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_INTERNAL,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		/* Compatibility for phylib's default interface type when the</div><div class='add'>+		 * phy-mode property is absent</div><div class='add'>+		 */</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_GMII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;dev_ops-&gt;get_caps)</div><div class='add'>+		dev-&gt;dev_ops-&gt;get_caps(dev, port, config);</div><div class='add'>+</div><div class='add'>+	if (ds-&gt;ops-&gt;support_eee &amp;&amp; ds-&gt;ops-&gt;support_eee(ds, port)) {</div><div class='add'>+		memcpy(config-&gt;lpi_interfaces, config-&gt;supported_interfaces,</div><div class='add'>+		       sizeof(config-&gt;lpi_interfaces));</div><div class='add'>+</div><div class='add'>+		config-&gt;lpi_capabilities = MAC_100FD;</div><div class='add'>+		if (dev-&gt;info-&gt;gbit_capable[port])</div><div class='add'>+			config-&gt;lpi_capabilities |= MAC_1000FD;</div><div class='add'>+</div><div class='add'>+		/* EEE is fully operational */</div><div class='add'>+		config-&gt;eee_enabled_default = true;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ksz_r_mib_stats64(struct ksz_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	struct ethtool_pause_stats *pstats;</div><div class='add'>+	struct rtnl_link_stats64 *stats;</div><div class='add'>+	struct ksz_stats_raw *raw;</div><div class='add'>+	struct ksz_port_mib *mib;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mib = &amp;dev-&gt;ports[port].mib;</div><div class='add'>+	stats = &amp;mib-&gt;stats64;</div><div class='add'>+	pstats = &amp;mib-&gt;pause_stats;</div><div class='add'>+	raw = (struct ksz_stats_raw *)mib-&gt;counters;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;mib-&gt;stats64_lock);</div><div class='add'>+</div><div class='add'>+	stats-&gt;rx_packets = raw-&gt;rx_bcast + raw-&gt;rx_mcast + raw-&gt;rx_ucast +</div><div class='add'>+		raw-&gt;rx_pause;</div><div class='add'>+	stats-&gt;tx_packets = raw-&gt;tx_bcast + raw-&gt;tx_mcast + raw-&gt;tx_ucast +</div><div class='add'>+		raw-&gt;tx_pause;</div><div class='add'>+</div><div class='add'>+	/* HW counters are counting bytes + FCS which is not acceptable</div><div class='add'>+	 * for rtnl_link_stats64 interface</div><div class='add'>+	 */</div><div class='add'>+	stats-&gt;rx_bytes = raw-&gt;rx_total - stats-&gt;rx_packets * ETH_FCS_LEN;</div><div class='add'>+	stats-&gt;tx_bytes = raw-&gt;tx_total - stats-&gt;tx_packets * ETH_FCS_LEN;</div><div class='add'>+</div><div class='add'>+	stats-&gt;rx_length_errors = raw-&gt;rx_undersize + raw-&gt;rx_fragments +</div><div class='add'>+		raw-&gt;rx_oversize;</div><div class='add'>+</div><div class='add'>+	stats-&gt;rx_crc_errors = raw-&gt;rx_crc_err;</div><div class='add'>+	stats-&gt;rx_frame_errors = raw-&gt;rx_align_err;</div><div class='add'>+	stats-&gt;rx_dropped = raw-&gt;rx_discards;</div><div class='add'>+	stats-&gt;rx_errors = stats-&gt;rx_length_errors + stats-&gt;rx_crc_errors +</div><div class='add'>+		stats-&gt;rx_frame_errors  + stats-&gt;rx_dropped;</div><div class='add'>+</div><div class='add'>+	stats-&gt;tx_window_errors = raw-&gt;tx_late_col;</div><div class='add'>+	stats-&gt;tx_fifo_errors = raw-&gt;tx_discards;</div><div class='add'>+	stats-&gt;tx_aborted_errors = raw-&gt;tx_exc_col;</div><div class='add'>+	stats-&gt;tx_errors = stats-&gt;tx_window_errors + stats-&gt;tx_fifo_errors +</div><div class='add'>+		stats-&gt;tx_aborted_errors;</div><div class='add'>+</div><div class='add'>+	stats-&gt;multicast = raw-&gt;rx_mcast;</div><div class='add'>+	stats-&gt;collisions = raw-&gt;tx_total_col;</div><div class='add'>+</div><div class='add'>+	pstats-&gt;tx_pause_frames = raw-&gt;tx_pause;</div><div class='add'>+	pstats-&gt;rx_pause_frames = raw-&gt;rx_pause;</div><div class='add'>+</div><div class='add'>+	spin_unlock(&amp;mib-&gt;stats64_lock);</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;info-&gt;phy_errata_9477 &amp;&amp; !ksz_is_sgmii_port(dev, port)) {</div><div class='add'>+		ret = ksz9477_errata_monitor(dev, port, raw-&gt;tx_late_col);</div><div class='add'>+		if (ret)</div><div class='add'>+			dev_err(dev-&gt;dev, "Failed to monitor transmission halt\n");</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ksz88xx_r_mib_stats64(struct ksz_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	struct ethtool_pause_stats *pstats;</div><div class='add'>+	struct rtnl_link_stats64 *stats;</div><div class='add'>+	struct ksz88xx_stats_raw *raw;</div><div class='add'>+	struct ksz_port_mib *mib;</div><div class='add'>+</div><div class='add'>+	mib = &amp;dev-&gt;ports[port].mib;</div><div class='add'>+	stats = &amp;mib-&gt;stats64;</div><div class='add'>+	pstats = &amp;mib-&gt;pause_stats;</div><div class='add'>+	raw = (struct ksz88xx_stats_raw *)mib-&gt;counters;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;mib-&gt;stats64_lock);</div><div class='add'>+</div><div class='add'>+	stats-&gt;rx_packets = raw-&gt;rx_bcast + raw-&gt;rx_mcast + raw-&gt;rx_ucast +</div><div class='add'>+		raw-&gt;rx_pause;</div><div class='add'>+	stats-&gt;tx_packets = raw-&gt;tx_bcast + raw-&gt;tx_mcast + raw-&gt;tx_ucast +</div><div class='add'>+		raw-&gt;tx_pause;</div><div class='add'>+</div><div class='add'>+	/* HW counters are counting bytes + FCS which is not acceptable</div><div class='add'>+	 * for rtnl_link_stats64 interface</div><div class='add'>+	 */</div><div class='add'>+	stats-&gt;rx_bytes = raw-&gt;rx + raw-&gt;rx_hi - stats-&gt;rx_packets * ETH_FCS_LEN;</div><div class='add'>+	stats-&gt;tx_bytes = raw-&gt;tx + raw-&gt;tx_hi - stats-&gt;tx_packets * ETH_FCS_LEN;</div><div class='add'>+</div><div class='add'>+	stats-&gt;rx_length_errors = raw-&gt;rx_undersize + raw-&gt;rx_fragments +</div><div class='add'>+		raw-&gt;rx_oversize;</div><div class='add'>+</div><div class='add'>+	stats-&gt;rx_crc_errors = raw-&gt;rx_crc_err;</div><div class='add'>+	stats-&gt;rx_frame_errors = raw-&gt;rx_align_err;</div><div class='add'>+	stats-&gt;rx_dropped = raw-&gt;rx_discards;</div><div class='add'>+	stats-&gt;rx_errors = stats-&gt;rx_length_errors + stats-&gt;rx_crc_errors +</div><div class='add'>+		stats-&gt;rx_frame_errors  + stats-&gt;rx_dropped;</div><div class='add'>+</div><div class='add'>+	stats-&gt;tx_window_errors = raw-&gt;tx_late_col;</div><div class='add'>+	stats-&gt;tx_fifo_errors = raw-&gt;tx_discards;</div><div class='add'>+	stats-&gt;tx_aborted_errors = raw-&gt;tx_exc_col;</div><div class='add'>+	stats-&gt;tx_errors = stats-&gt;tx_window_errors + stats-&gt;tx_fifo_errors +</div><div class='add'>+		stats-&gt;tx_aborted_errors;</div><div class='add'>+</div><div class='add'>+	stats-&gt;multicast = raw-&gt;rx_mcast;</div><div class='add'>+	stats-&gt;collisions = raw-&gt;tx_total_col;</div><div class='add'>+</div><div class='add'>+	pstats-&gt;tx_pause_frames = raw-&gt;tx_pause;</div><div class='add'>+	pstats-&gt;rx_pause_frames = raw-&gt;rx_pause;</div><div class='add'>+</div><div class='add'>+	spin_unlock(&amp;mib-&gt;stats64_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz_get_stats64(struct dsa_switch *ds, int port,</div><div class='add'>+			    struct rtnl_link_stats64 *s)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	struct ksz_port_mib *mib;</div><div class='add'>+</div><div class='add'>+	mib = &amp;dev-&gt;ports[port].mib;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;mib-&gt;stats64_lock);</div><div class='add'>+	memcpy(s, &amp;mib-&gt;stats64, sizeof(*s));</div><div class='add'>+	spin_unlock(&amp;mib-&gt;stats64_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz_get_pause_stats(struct dsa_switch *ds, int port,</div><div class='add'>+				struct ethtool_pause_stats *pause_stats)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	struct ksz_port_mib *mib;</div><div class='add'>+</div><div class='add'>+	mib = &amp;dev-&gt;ports[port].mib;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;mib-&gt;stats64_lock);</div><div class='add'>+	memcpy(pause_stats, &amp;mib-&gt;pause_stats, sizeof(*pause_stats));</div><div class='add'>+	spin_unlock(&amp;mib-&gt;stats64_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz_get_strings(struct dsa_switch *ds, int port,</div><div class='add'>+			    u32 stringset, uint8_t *buf)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (stringset != ETH_SS_STATS)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; dev-&gt;info-&gt;mib_cnt; i++)</div><div class='add'>+		ethtool_puts(&amp;buf, dev-&gt;info-&gt;mib_names[i].string);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_update_port_member - Adjust port forwarding rules based on STP state and</div><div class='add'>+ *			    isolation settings.</div><div class='add'>+ * @dev: A pointer to the struct ksz_device representing the device.</div><div class='add'>+ * @port: The port number to adjust.</div><div class='add'>+ *</div><div class='add'>+ * This function dynamically adjusts the port membership configuration for a</div><div class='add'>+ * specified port and other device ports, based on Spanning Tree Protocol (STP)</div><div class='add'>+ * states and port isolation settings. Each port, including the CPU port, has a</div><div class='add'>+ * membership register, represented as a bitfield, where each bit corresponds</div><div class='add'>+ * to a port number. A set bit indicates permission to forward frames to that</div><div class='add'>+ * port. This function iterates over all ports, updating the membership register</div><div class='add'>+ * to reflect current forwarding permissions:</div><div class='add'>+ *</div><div class='add'>+ * 1. Forwards frames only to ports that are part of the same bridge group and</div><div class='add'>+ *    in the BR_STATE_FORWARDING state.</div><div class='add'>+ * 2. Takes into account the isolation status of ports; ports in the</div><div class='add'>+ *    BR_STATE_FORWARDING state with BR_ISOLATED configuration will not forward</div><div class='add'>+ *    frames to each other, even if they are in the same bridge group.</div><div class='add'>+ * 3. Ensures that the CPU port is included in the membership based on its</div><div class='add'>+ *    upstream port configuration, allowing for management and control traffic</div><div class='add'>+ *    to flow as required.</div><div class='add'>+ */</div><div class='add'>+static void ksz_update_port_member(struct ksz_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	struct ksz_port *p = &amp;dev-&gt;ports[port];</div><div class='add'>+	struct dsa_switch *ds = dev-&gt;ds;</div><div class='add'>+	u8 port_member = 0, cpu_port;</div><div class='add'>+	const struct dsa_port *dp;</div><div class='add'>+	int i, j;</div><div class='add'>+</div><div class='add'>+	if (!dsa_is_user_port(ds, port))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dp = dsa_to_port(ds, port);</div><div class='add'>+	cpu_port = BIT(dsa_upstream_port(ds, port));</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ds-&gt;num_ports; i++) {</div><div class='add'>+		const struct dsa_port *other_dp = dsa_to_port(ds, i);</div><div class='add'>+		struct ksz_port *other_p = &amp;dev-&gt;ports[i];</div><div class='add'>+		u8 val = 0;</div><div class='add'>+</div><div class='add'>+		if (!dsa_is_user_port(ds, i))</div><div class='add'>+			continue;</div><div class='add'>+		if (port == i)</div><div class='add'>+			continue;</div><div class='add'>+		if (!dsa_port_bridge_same(dp, other_dp))</div><div class='add'>+			continue;</div><div class='add'>+		if (other_p-&gt;stp_state != BR_STATE_FORWARDING)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* At this point we know that "port" and "other" port [i] are in</div><div class='add'>+		 * the same bridge group and that "other" port [i] is in</div><div class='add'>+		 * forwarding stp state. If "port" is also in forwarding stp</div><div class='add'>+		 * state, we can allow forwarding from port [port] to port [i].</div><div class='add'>+		 * Except if both ports are isolated.</div><div class='add'>+		 */</div><div class='add'>+		if (p-&gt;stp_state == BR_STATE_FORWARDING &amp;&amp;</div><div class='add'>+		    !(p-&gt;isolated &amp;&amp; other_p-&gt;isolated)) {</div><div class='add'>+			val |= BIT(port);</div><div class='add'>+			port_member |= BIT(i);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Retain port [i]'s relationship to other ports than [port] */</div><div class='add'>+		for (j = 0; j &lt; ds-&gt;num_ports; j++) {</div><div class='add'>+			const struct dsa_port *third_dp;</div><div class='add'>+			struct ksz_port *third_p;</div><div class='add'>+</div><div class='add'>+			if (j == i)</div><div class='add'>+				continue;</div><div class='add'>+			if (j == port)</div><div class='add'>+				continue;</div><div class='add'>+			if (!dsa_is_user_port(ds, j))</div><div class='add'>+				continue;</div><div class='add'>+			third_p = &amp;dev-&gt;ports[j];</div><div class='add'>+			if (third_p-&gt;stp_state != BR_STATE_FORWARDING)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			third_dp = dsa_to_port(ds, j);</div><div class='add'>+</div><div class='add'>+			/* Now we updating relation of the "other" port [i] to</div><div class='add'>+			 * the "third" port [j]. We already know that "other"</div><div class='add'>+			 * port [i] is in forwarding stp state and that "third"</div><div class='add'>+			 * port [j] is in forwarding stp state too.</div><div class='add'>+			 * We need to check if "other" port [i] and "third" port</div><div class='add'>+			 * [j] are in the same bridge group and not isolated</div><div class='add'>+			 * before allowing forwarding from port [i] to port [j].</div><div class='add'>+			 */</div><div class='add'>+			if (dsa_port_bridge_same(other_dp, third_dp) &amp;&amp;</div><div class='add'>+			    !(other_p-&gt;isolated &amp;&amp; third_p-&gt;isolated))</div><div class='add'>+				val |= BIT(j);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		dev-&gt;dev_ops-&gt;cfg_port_member(dev, i, val | cpu_port);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* HSR ports are setup once so need to use the assigned membership</div><div class='add'>+	 * when the port is enabled.</div><div class='add'>+	 */</div><div class='add'>+	if (!port_member &amp;&amp; p-&gt;stp_state == BR_STATE_FORWARDING &amp;&amp;</div><div class='add'>+	    (dev-&gt;hsr_ports &amp; BIT(port)))</div><div class='add'>+		port_member = dev-&gt;hsr_ports;</div><div class='add'>+	dev-&gt;dev_ops-&gt;cfg_port_member(dev, port, port_member | cpu_port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_sw_mdio_read(struct mii_bus *bus, int addr, int regnum)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = bus-&gt;priv;</div><div class='add'>+	u16 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = dev-&gt;dev_ops-&gt;r_phy(dev, addr, regnum, &amp;val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_sw_mdio_write(struct mii_bus *bus, int addr, int regnum,</div><div class='add'>+			     u16 val)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = bus-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return dev-&gt;dev_ops-&gt;w_phy(dev, addr, regnum, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_parent_mdio_read - Read data from a PHY register on the parent MDIO bus.</div><div class='add'>+ * @bus: MDIO bus structure.</div><div class='add'>+ * @addr: PHY address on the parent MDIO bus.</div><div class='add'>+ * @regnum: Register number to read.</div><div class='add'>+ *</div><div class='add'>+ * This function provides a direct read operation on the parent MDIO bus for</div><div class='add'>+ * accessing PHY registers. By bypassing SPI or I2C, it uses the parent MDIO bus</div><div class='add'>+ * to retrieve data from the PHY registers at the specified address and register</div><div class='add'>+ * number.</div><div class='add'>+ *</div><div class='add'>+ * Return: Value of the PHY register, or a negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int ksz_parent_mdio_read(struct mii_bus *bus, int addr, int regnum)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = bus-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return mdiobus_read_nested(dev-&gt;parent_mdio_bus, addr, regnum);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_parent_mdio_write - Write data to a PHY register on the parent MDIO bus.</div><div class='add'>+ * @bus: MDIO bus structure.</div><div class='add'>+ * @addr: PHY address on the parent MDIO bus.</div><div class='add'>+ * @regnum: Register number to write to.</div><div class='add'>+ * @val: Value to write to the PHY register.</div><div class='add'>+ *</div><div class='add'>+ * This function provides a direct write operation on the parent MDIO bus for</div><div class='add'>+ * accessing PHY registers. Bypassing SPI or I2C, it uses the parent MDIO bus</div><div class='add'>+ * to modify the PHY register values at the specified address.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or a negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int ksz_parent_mdio_write(struct mii_bus *bus, int addr, int regnum,</div><div class='add'>+				 u16 val)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = bus-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return mdiobus_write_nested(dev-&gt;parent_mdio_bus, addr, regnum, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_phy_addr_to_port - Map a PHY address to the corresponding switch port.</div><div class='add'>+ * @dev: Pointer to device structure.</div><div class='add'>+ * @addr: PHY address to map to a port.</div><div class='add'>+ *</div><div class='add'>+ * This function finds the corresponding switch port for a given PHY address by</div><div class='add'>+ * iterating over all user ports on the device. It checks if a port's PHY</div><div class='add'>+ * address in `phy_addr_map` matches the specified address and if the port</div><div class='add'>+ * contains an internal PHY. If a match is found, the index of the port is</div><div class='add'>+ * returned.</div><div class='add'>+ *</div><div class='add'>+ * Return: Port index on success, or -EINVAL if no matching port is found.</div><div class='add'>+ */</div><div class='add'>+static int ksz_phy_addr_to_port(struct ksz_device *dev, int addr)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds = dev-&gt;ds;</div><div class='add'>+	struct dsa_port *dp;</div><div class='add'>+</div><div class='add'>+	dsa_switch_for_each_user_port(dp, ds) {</div><div class='add'>+		if (dev-&gt;info-&gt;internal_phy[dp-&gt;index] &amp;&amp;</div><div class='add'>+		    dev-&gt;phy_addr_map[dp-&gt;index] == addr)</div><div class='add'>+			return dp-&gt;index;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_irq_phy_setup - Configure IRQs for PHYs in the KSZ device.</div><div class='add'>+ * @dev: Pointer to the KSZ device structure.</div><div class='add'>+ *</div><div class='add'>+ * Sets up IRQs for each active PHY connected to the KSZ switch by mapping the</div><div class='add'>+ * appropriate IRQs for each PHY and assigning them to the `user_mii_bus` in</div><div class='add'>+ * the DSA switch structure. Each IRQ is mapped based on the port's IRQ domain.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or a negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int ksz_irq_phy_setup(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds = dev-&gt;ds;</div><div class='add'>+	int phy, port;</div><div class='add'>+	int irq;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	for (phy = 0; phy &lt; PHY_MAX_ADDR; phy++) {</div><div class='add'>+		if (BIT(phy) &amp; ds-&gt;phys_mii_mask) {</div><div class='add'>+			port = ksz_phy_addr_to_port(dev, phy);</div><div class='add'>+			if (port &lt; 0) {</div><div class='add'>+				ret = port;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			irq = irq_find_mapping(dev-&gt;ports[port].pirq.domain,</div><div class='add'>+					       PORT_SRC_PHY_INT);</div><div class='add'>+			if (!irq) {</div><div class='add'>+				ret = -EINVAL;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+			ds-&gt;user_mii_bus-&gt;irq[phy] = irq;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+out:</div><div class='add'>+	while (phy--)</div><div class='add'>+		if (BIT(phy) &amp; ds-&gt;phys_mii_mask)</div><div class='add'>+			irq_dispose_mapping(ds-&gt;user_mii_bus-&gt;irq[phy]);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_irq_phy_free - Release IRQ mappings for PHYs in the KSZ device.</div><div class='add'>+ * @dev: Pointer to the KSZ device structure.</div><div class='add'>+ *</div><div class='add'>+ * Releases any IRQ mappings previously assigned to active PHYs in the KSZ</div><div class='add'>+ * switch by disposing of each mapped IRQ in the `user_mii_bus` structure.</div><div class='add'>+ */</div><div class='add'>+static void ksz_irq_phy_free(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds = dev-&gt;ds;</div><div class='add'>+	int phy;</div><div class='add'>+</div><div class='add'>+	for (phy = 0; phy &lt; PHY_MAX_ADDR; phy++)</div><div class='add'>+		if (BIT(phy) &amp; ds-&gt;phys_mii_mask)</div><div class='add'>+			irq_dispose_mapping(ds-&gt;user_mii_bus-&gt;irq[phy]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_parse_dt_phy_config - Parse and validate PHY configuration from DT</div><div class='add'>+ * @dev: pointer to the KSZ device structure</div><div class='add'>+ * @bus: pointer to the MII bus structure</div><div class='add'>+ * @mdio_np: pointer to the MDIO node in the device tree</div><div class='add'>+ *</div><div class='add'>+ * This function parses and validates PHY configurations for each user port</div><div class='add'>+ * defined in the device tree for a KSZ switch device. It verifies that the</div><div class='add'>+ * `phy-handle` properties are correctly set and that the internal PHYs match</div><div class='add'>+ * expected addresses and parent nodes. Sets up the PHY mask in the MII bus if</div><div class='add'>+ * all validations pass. Logs error messages for any mismatches or missing data.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or a negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int ksz_parse_dt_phy_config(struct ksz_device *dev, struct mii_bus *bus,</div><div class='add'>+				   struct device_node *mdio_np)</div><div class='add'>+{</div><div class='add'>+	struct device_node *phy_node, *phy_parent_node;</div><div class='add'>+	bool phys_are_valid = true;</div><div class='add'>+	struct dsa_port *dp;</div><div class='add'>+	u32 phy_addr;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	dsa_switch_for_each_user_port(dp, dev-&gt;ds) {</div><div class='add'>+		if (!dev-&gt;info-&gt;internal_phy[dp-&gt;index])</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		phy_node = of_parse_phandle(dp-&gt;dn, "phy-handle", 0);</div><div class='add'>+		if (!phy_node) {</div><div class='add'>+			dev_err(dev-&gt;dev, "failed to parse phy-handle for port %d.\n",</div><div class='add'>+				dp-&gt;index);</div><div class='add'>+			phys_are_valid = false;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		phy_parent_node = of_get_parent(phy_node);</div><div class='add'>+		if (!phy_parent_node) {</div><div class='add'>+			dev_err(dev-&gt;dev, "failed to get PHY-parent node for port %d\n",</div><div class='add'>+				dp-&gt;index);</div><div class='add'>+			phys_are_valid = false;</div><div class='add'>+		} else if (phy_parent_node != mdio_np) {</div><div class='add'>+			dev_err(dev-&gt;dev, "PHY-parent node mismatch for port %d, expected %pOF, got %pOF\n",</div><div class='add'>+				dp-&gt;index, mdio_np, phy_parent_node);</div><div class='add'>+			phys_are_valid = false;</div><div class='add'>+		} else {</div><div class='add'>+			ret = of_property_read_u32(phy_node, "reg", &amp;phy_addr);</div><div class='add'>+			if (ret &lt; 0) {</div><div class='add'>+				dev_err(dev-&gt;dev, "failed to read PHY address for port %d. Error %d\n",</div><div class='add'>+					dp-&gt;index, ret);</div><div class='add'>+				phys_are_valid = false;</div><div class='add'>+			} else if (phy_addr != dev-&gt;phy_addr_map[dp-&gt;index]) {</div><div class='add'>+				dev_err(dev-&gt;dev, "PHY address mismatch for port %d, expected 0x%x, got 0x%x\n",</div><div class='add'>+					dp-&gt;index, dev-&gt;phy_addr_map[dp-&gt;index],</div><div class='add'>+					phy_addr);</div><div class='add'>+				phys_are_valid = false;</div><div class='add'>+			} else {</div><div class='add'>+				bus-&gt;phy_mask |= BIT(phy_addr);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		of_node_put(phy_node);</div><div class='add'>+		of_node_put(phy_parent_node);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!phys_are_valid)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_mdio_register - Register and configure the MDIO bus for the KSZ device.</div><div class='add'>+ * @dev: Pointer to the KSZ device structure.</div><div class='add'>+ *</div><div class='add'>+ * This function sets up and registers an MDIO bus for the KSZ switch device,</div><div class='add'>+ * allowing access to its internal PHYs. If the device supports side MDIO,</div><div class='add'>+ * the function will configure the external MDIO controller specified by the</div><div class='add'>+ * "mdio-parent-bus" device tree property to directly manage internal PHYs.</div><div class='add'>+ * Otherwise, SPI or I2C access is set up for PHY access.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or a negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int ksz_mdio_register(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct device_node *parent_bus_node;</div><div class='add'>+	struct mii_bus *parent_bus = NULL;</div><div class='add'>+	struct dsa_switch *ds = dev-&gt;ds;</div><div class='add'>+	struct device_node *mdio_np;</div><div class='add'>+	struct mii_bus *bus;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	mdio_np = of_get_child_by_name(dev-&gt;dev-&gt;of_node, "mdio");</div><div class='add'>+	if (!mdio_np)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	parent_bus_node = of_parse_phandle(mdio_np, "mdio-parent-bus", 0);</div><div class='add'>+	if (parent_bus_node &amp;&amp; !dev-&gt;info-&gt;phy_side_mdio_supported) {</div><div class='add'>+		dev_err(dev-&gt;dev, "Side MDIO bus is not supported for this HW, ignoring 'mdio-parent-bus' property.\n");</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+</div><div class='add'>+		goto put_mdio_node;</div><div class='add'>+	} else if (parent_bus_node) {</div><div class='add'>+		parent_bus = of_mdio_find_bus(parent_bus_node);</div><div class='add'>+		if (!parent_bus) {</div><div class='add'>+			ret = -EPROBE_DEFER;</div><div class='add'>+</div><div class='add'>+			goto put_mdio_node;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		dev-&gt;parent_mdio_bus = parent_bus;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bus = devm_mdiobus_alloc(ds-&gt;dev);</div><div class='add'>+	if (!bus) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto put_mdio_node;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;dev_ops-&gt;mdio_bus_preinit) {</div><div class='add'>+		ret = dev-&gt;dev_ops-&gt;mdio_bus_preinit(dev, !!parent_bus);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto put_mdio_node;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;dev_ops-&gt;create_phy_addr_map) {</div><div class='add'>+		ret = dev-&gt;dev_ops-&gt;create_phy_addr_map(dev, !!parent_bus);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto put_mdio_node;</div><div class='add'>+	} else {</div><div class='add'>+		for (i = 0; i &lt; dev-&gt;info-&gt;port_cnt; i++)</div><div class='add'>+			dev-&gt;phy_addr_map[i] = i;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bus-&gt;priv = dev;</div><div class='add'>+	if (parent_bus) {</div><div class='add'>+		bus-&gt;read = ksz_parent_mdio_read;</div><div class='add'>+		bus-&gt;write = ksz_parent_mdio_write;</div><div class='add'>+		bus-&gt;name = "KSZ side MDIO";</div><div class='add'>+		snprintf(bus-&gt;id, MII_BUS_ID_SIZE, "ksz-side-mdio-%d",</div><div class='add'>+			 ds-&gt;index);</div><div class='add'>+	} else {</div><div class='add'>+		bus-&gt;read = ksz_sw_mdio_read;</div><div class='add'>+		bus-&gt;write = ksz_sw_mdio_write;</div><div class='add'>+		bus-&gt;name = "ksz user smi";</div><div class='add'>+		if (ds-&gt;dst-&gt;index != 0) {</div><div class='add'>+			snprintf(bus-&gt;id, MII_BUS_ID_SIZE, "SMI-%d-%d", ds-&gt;dst-&gt;index, ds-&gt;index);</div><div class='add'>+		} else {</div><div class='add'>+			snprintf(bus-&gt;id, MII_BUS_ID_SIZE, "SMI-%d", ds-&gt;index);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ksz_parse_dt_phy_config(dev, bus, mdio_np);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto put_mdio_node;</div><div class='add'>+</div><div class='add'>+	ds-&gt;phys_mii_mask = bus-&gt;phy_mask;</div><div class='add'>+	bus-&gt;parent = ds-&gt;dev;</div><div class='add'>+</div><div class='add'>+	ds-&gt;user_mii_bus = bus;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;irq &gt; 0) {</div><div class='add'>+		ret = ksz_irq_phy_setup(dev);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto put_mdio_node;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = devm_of_mdiobus_register(ds-&gt;dev, bus, mdio_np);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(ds-&gt;dev, "unable to register MDIO bus %s\n",</div><div class='add'>+			bus-&gt;id);</div><div class='add'>+		if (dev-&gt;irq &gt; 0)</div><div class='add'>+			ksz_irq_phy_free(dev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+put_mdio_node:</div><div class='add'>+	of_node_put(mdio_np);</div><div class='add'>+	of_node_put(parent_bus_node);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz_irq_mask(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct ksz_irq *kirq = irq_data_get_irq_chip_data(d);</div><div class='add'>+</div><div class='add'>+	kirq-&gt;masked |= BIT(d-&gt;hwirq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz_irq_unmask(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct ksz_irq *kirq = irq_data_get_irq_chip_data(d);</div><div class='add'>+</div><div class='add'>+	kirq-&gt;masked &amp;= ~BIT(d-&gt;hwirq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz_irq_bus_lock(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct ksz_irq *kirq  = irq_data_get_irq_chip_data(d);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;kirq-&gt;dev-&gt;lock_irq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz_irq_bus_sync_unlock(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct ksz_irq *kirq  = irq_data_get_irq_chip_data(d);</div><div class='add'>+	struct ksz_device *dev = kirq-&gt;dev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = ksz_write8(dev, kirq-&gt;reg_mask, kirq-&gt;masked);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(dev-&gt;dev, "failed to change IRQ mask\n");</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;lock_irq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct irq_chip ksz_irq_chip = {</div><div class='add'>+	.name			= "ksz-irq",</div><div class='add'>+	.irq_mask		= ksz_irq_mask,</div><div class='add'>+	.irq_unmask		= ksz_irq_unmask,</div><div class='add'>+	.irq_bus_lock		= ksz_irq_bus_lock,</div><div class='add'>+	.irq_bus_sync_unlock	= ksz_irq_bus_sync_unlock,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int ksz_irq_domain_map(struct irq_domain *d,</div><div class='add'>+			      unsigned int irq, irq_hw_number_t hwirq)</div><div class='add'>+{</div><div class='add'>+	irq_set_chip_data(irq, d-&gt;host_data);</div><div class='add'>+	irq_set_chip_and_handler(irq, &amp;ksz_irq_chip, handle_level_irq);</div><div class='add'>+	irq_set_noprobe(irq);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct irq_domain_ops ksz_irq_domain_ops = {</div><div class='add'>+	.map	= ksz_irq_domain_map,</div><div class='add'>+	.xlate	= irq_domain_xlate_twocell,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void ksz_irq_free(struct ksz_irq *kirq)</div><div class='add'>+{</div><div class='add'>+	int irq, virq;</div><div class='add'>+</div><div class='add'>+	free_irq(kirq-&gt;irq_num, kirq);</div><div class='add'>+</div><div class='add'>+	for (irq = 0; irq &lt; kirq-&gt;nirqs; irq++) {</div><div class='add'>+		virq = irq_find_mapping(kirq-&gt;domain, irq);</div><div class='add'>+		irq_dispose_mapping(virq);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	irq_domain_remove(kirq-&gt;domain);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t ksz_irq_thread_fn(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct ksz_irq *kirq = dev_id;</div><div class='add'>+	unsigned int nhandled = 0;</div><div class='add'>+	struct ksz_device *dev;</div><div class='add'>+	unsigned int sub_irq;</div><div class='add'>+	u8 data;</div><div class='add'>+	int ret;</div><div class='add'>+	u8 n;</div><div class='add'>+</div><div class='add'>+	dev = kirq-&gt;dev;</div><div class='add'>+</div><div class='add'>+	/* Read interrupt status register */</div><div class='add'>+	ret = ksz_read8(dev, kirq-&gt;reg_status, &amp;data);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	for (n = 0; n &lt; kirq-&gt;nirqs; ++n) {</div><div class='add'>+		if (data &amp; BIT(n)) {</div><div class='add'>+			sub_irq = irq_find_mapping(kirq-&gt;domain, n);</div><div class='add'>+			handle_nested_irq(sub_irq);</div><div class='add'>+			++nhandled;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+out:</div><div class='add'>+	return (nhandled &gt; 0 ? IRQ_HANDLED : IRQ_NONE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_irq_common_setup(struct ksz_device *dev, struct ksz_irq *kirq)</div><div class='add'>+{</div><div class='add'>+	int ret, n;</div><div class='add'>+</div><div class='add'>+	kirq-&gt;dev = dev;</div><div class='add'>+	kirq-&gt;masked = ~0;</div><div class='add'>+</div><div class='add'>+	kirq-&gt;domain = irq_domain_create_simple(dev_fwnode(dev-&gt;dev), kirq-&gt;nirqs, 0,</div><div class='add'>+						&amp;ksz_irq_domain_ops, kirq);</div><div class='add'>+	if (!kirq-&gt;domain)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (n = 0; n &lt; kirq-&gt;nirqs; n++)</div><div class='add'>+		irq_create_mapping(kirq-&gt;domain, n);</div><div class='add'>+</div><div class='add'>+	ret = request_threaded_irq(kirq-&gt;irq_num, NULL, ksz_irq_thread_fn,</div><div class='add'>+				   IRQF_ONESHOT, kirq-&gt;name, kirq);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	ksz_irq_free(kirq);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_girq_setup(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ksz_irq *girq = &amp;dev-&gt;girq;</div><div class='add'>+</div><div class='add'>+	girq-&gt;nirqs = dev-&gt;info-&gt;port_cnt;</div><div class='add'>+	girq-&gt;reg_mask = REG_SW_PORT_INT_MASK__1;</div><div class='add'>+	girq-&gt;reg_status = REG_SW_PORT_INT_STATUS__1;</div><div class='add'>+	snprintf(girq-&gt;name, sizeof(girq-&gt;name), "global_port_irq");</div><div class='add'>+</div><div class='add'>+	girq-&gt;irq_num = dev-&gt;irq;</div><div class='add'>+</div><div class='add'>+	return ksz_irq_common_setup(dev, girq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_pirq_setup(struct ksz_device *dev, u8 p)</div><div class='add'>+{</div><div class='add'>+	struct ksz_irq *pirq = &amp;dev-&gt;ports[p].pirq;</div><div class='add'>+</div><div class='add'>+	pirq-&gt;nirqs = dev-&gt;info-&gt;port_nirqs;</div><div class='add'>+	pirq-&gt;reg_mask = dev-&gt;dev_ops-&gt;get_port_addr(p, REG_PORT_INT_MASK);</div><div class='add'>+	pirq-&gt;reg_status = dev-&gt;dev_ops-&gt;get_port_addr(p, REG_PORT_INT_STATUS);</div><div class='add'>+	snprintf(pirq-&gt;name, sizeof(pirq-&gt;name), "port_irq-%d", p);</div><div class='add'>+</div><div class='add'>+	pirq-&gt;irq_num = irq_find_mapping(dev-&gt;girq.domain, p);</div><div class='add'>+	if (!pirq-&gt;irq_num)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return ksz_irq_common_setup(dev, pirq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_parse_drive_strength(struct ksz_device *dev);</div><div class='add'>+</div><div class='add'>+static int ksz_setup(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	u16 storm_mask, storm_rate;</div><div class='add'>+	struct dsa_port *dp;</div><div class='add'>+	struct ksz_port *p;</div><div class='add'>+	const u16 *regs;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	regs = dev-&gt;info-&gt;regs;</div><div class='add'>+</div><div class='add'>+	dev-&gt;vlan_cache = devm_kcalloc(dev-&gt;dev, sizeof(struct vlan_table),</div><div class='add'>+				       dev-&gt;info-&gt;num_vlans, GFP_KERNEL);</div><div class='add'>+	if (!dev-&gt;vlan_cache)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ret = dev-&gt;dev_ops-&gt;reset(dev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(ds-&gt;dev, "failed to reset switch\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ksz_parse_drive_strength(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (ksz_has_sgmii_port(dev) &amp;&amp; dev-&gt;dev_ops-&gt;pcs_create) {</div><div class='add'>+		ret = dev-&gt;dev_ops-&gt;pcs_create(dev);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* set broadcast storm protection 10% rate */</div><div class='add'>+	storm_mask = BROADCAST_STORM_RATE;</div><div class='add'>+	storm_rate = (BROADCAST_STORM_VALUE * BROADCAST_STORM_PROT_RATE) / 100;</div><div class='add'>+	if (ksz_is_ksz8463(dev)) {</div><div class='add'>+		storm_mask = swab16(storm_mask);</div><div class='add'>+		storm_rate = swab16(storm_rate);</div><div class='add'>+	}</div><div class='add'>+	regmap_update_bits(ksz_regmap_16(dev), regs[S_BROADCAST_CTRL],</div><div class='add'>+			   storm_mask, storm_rate);</div><div class='add'>+</div><div class='add'>+	dev-&gt;dev_ops-&gt;config_cpu_port(ds);</div><div class='add'>+</div><div class='add'>+	dev-&gt;dev_ops-&gt;enable_stp_addr(dev);</div><div class='add'>+</div><div class='add'>+	ds-&gt;num_tx_queues = dev-&gt;info-&gt;num_tx_queues;</div><div class='add'>+</div><div class='add'>+	regmap_update_bits(ksz_regmap_8(dev), regs[S_MULTICAST_CTRL],</div><div class='add'>+			   MULTICAST_STORM_DISABLE, MULTICAST_STORM_DISABLE);</div><div class='add'>+</div><div class='add'>+	ksz_init_mib_timer(dev);</div><div class='add'>+</div><div class='add'>+	ds-&gt;configure_vlan_while_not_filtering = false;</div><div class='add'>+	ds-&gt;dscp_prio_mapping_is_global = true;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;dev_ops-&gt;setup) {</div><div class='add'>+		ret = dev-&gt;dev_ops-&gt;setup(ds);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Start with learning disabled on standalone user ports, and enabled</div><div class='add'>+	 * on the CPU port. In lack of other finer mechanisms, learning on the</div><div class='add'>+	 * CPU port will avoid flooding bridge local addresses on the network</div><div class='add'>+	 * in some cases.</div><div class='add'>+	 */</div><div class='add'>+	p = &amp;dev-&gt;ports[dev-&gt;cpu_port];</div><div class='add'>+	p-&gt;learning = true;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;irq &gt; 0) {</div><div class='add'>+		ret = ksz_girq_setup(dev);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		dsa_switch_for_each_user_port(dp, dev-&gt;ds) {</div><div class='add'>+			ret = ksz_pirq_setup(dev, dp-&gt;index);</div><div class='add'>+			if (ret)</div><div class='add'>+				goto port_release;</div><div class='add'>+</div><div class='add'>+			if (dev-&gt;info-&gt;ptp_capable) {</div><div class='add'>+				ret = ksz_ptp_irq_setup(ds, dp-&gt;index);</div><div class='add'>+				if (ret)</div><div class='add'>+					goto pirq_release;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;info-&gt;ptp_capable) {</div><div class='add'>+		ret = ksz_ptp_clock_register(ds);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(dev-&gt;dev, "Failed to register PTP clock: %d\n",</div><div class='add'>+				ret);</div><div class='add'>+			goto port_release;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ksz_mdio_register(dev);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(dev-&gt;dev, "failed to register the mdio");</div><div class='add'>+		goto out_ptp_clock_unregister;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ksz_dcb_init(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_ptp_clock_unregister;</div><div class='add'>+</div><div class='add'>+	/* start switch */</div><div class='add'>+	regmap_update_bits(ksz_regmap_8(dev), regs[S_START_CTRL],</div><div class='add'>+			   SW_START, SW_START);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_ptp_clock_unregister:</div><div class='add'>+	if (dev-&gt;info-&gt;ptp_capable)</div><div class='add'>+		ksz_ptp_clock_unregister(ds);</div><div class='add'>+port_release:</div><div class='add'>+	if (dev-&gt;irq &gt; 0) {</div><div class='add'>+		dsa_switch_for_each_user_port_continue_reverse(dp, dev-&gt;ds) {</div><div class='add'>+			if (dev-&gt;info-&gt;ptp_capable)</div><div class='add'>+				ksz_ptp_irq_free(ds, dp-&gt;index);</div><div class='add'>+pirq_release:</div><div class='add'>+			ksz_irq_free(&amp;dev-&gt;ports[dp-&gt;index].pirq);</div><div class='add'>+		}</div><div class='add'>+		ksz_irq_free(&amp;dev-&gt;girq);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz_teardown(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	struct dsa_port *dp;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;info-&gt;ptp_capable)</div><div class='add'>+		ksz_ptp_clock_unregister(ds);</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;irq &gt; 0) {</div><div class='add'>+		dsa_switch_for_each_user_port(dp, dev-&gt;ds) {</div><div class='add'>+			if (dev-&gt;info-&gt;ptp_capable)</div><div class='add'>+				ksz_ptp_irq_free(ds, dp-&gt;index);</div><div class='add'>+</div><div class='add'>+			ksz_irq_free(&amp;dev-&gt;ports[dp-&gt;index].pirq);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ksz_irq_free(&amp;dev-&gt;girq);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;dev_ops-&gt;teardown)</div><div class='add'>+		dev-&gt;dev_ops-&gt;teardown(ds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void port_r_cnt(struct ksz_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	struct ksz_port_mib *mib = &amp;dev-&gt;ports[port].mib;</div><div class='add'>+	u64 *dropped;</div><div class='add'>+</div><div class='add'>+	/* Some ports may not have MIB counters before SWITCH_COUNTER_NUM. */</div><div class='add'>+	while (mib-&gt;cnt_ptr &lt; dev-&gt;info-&gt;reg_mib_cnt) {</div><div class='add'>+		dev-&gt;dev_ops-&gt;r_mib_cnt(dev, port, mib-&gt;cnt_ptr,</div><div class='add'>+					&amp;mib-&gt;counters[mib-&gt;cnt_ptr]);</div><div class='add'>+		++mib-&gt;cnt_ptr;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* last one in storage */</div><div class='add'>+	dropped = &amp;mib-&gt;counters[dev-&gt;info-&gt;mib_cnt];</div><div class='add'>+</div><div class='add'>+	/* Some ports may not have MIB counters after SWITCH_COUNTER_NUM. */</div><div class='add'>+	while (mib-&gt;cnt_ptr &lt; dev-&gt;info-&gt;mib_cnt) {</div><div class='add'>+		dev-&gt;dev_ops-&gt;r_mib_pkt(dev, port, mib-&gt;cnt_ptr,</div><div class='add'>+					dropped, &amp;mib-&gt;counters[mib-&gt;cnt_ptr]);</div><div class='add'>+		++mib-&gt;cnt_ptr;</div><div class='add'>+	}</div><div class='add'>+	mib-&gt;cnt_ptr = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz_mib_read_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = container_of(work, struct ksz_device,</div><div class='add'>+					      mib_read.work);</div><div class='add'>+	struct ksz_port_mib *mib;</div><div class='add'>+	struct ksz_port *p;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; dev-&gt;info-&gt;port_cnt; i++) {</div><div class='add'>+		if (dsa_is_unused_port(dev-&gt;ds, i))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		p = &amp;dev-&gt;ports[i];</div><div class='add'>+		mib = &amp;p-&gt;mib;</div><div class='add'>+		mutex_lock(&amp;mib-&gt;cnt_mutex);</div><div class='add'>+</div><div class='add'>+		/* Only read MIB counters when the port is told to do.</div><div class='add'>+		 * If not, read only dropped counters when link is not up.</div><div class='add'>+		 */</div><div class='add'>+		if (!p-&gt;read) {</div><div class='add'>+			const struct dsa_port *dp = dsa_to_port(dev-&gt;ds, i);</div><div class='add'>+</div><div class='add'>+			if (!netif_carrier_ok(dp-&gt;user))</div><div class='add'>+				mib-&gt;cnt_ptr = dev-&gt;info-&gt;reg_mib_cnt;</div><div class='add'>+		}</div><div class='add'>+		port_r_cnt(dev, i);</div><div class='add'>+		p-&gt;read = false;</div><div class='add'>+</div><div class='add'>+		if (dev-&gt;dev_ops-&gt;r_mib_stat64)</div><div class='add'>+			dev-&gt;dev_ops-&gt;r_mib_stat64(dev, i);</div><div class='add'>+</div><div class='add'>+		mutex_unlock(&amp;mib-&gt;cnt_mutex);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	schedule_delayed_work(&amp;dev-&gt;mib_read, dev-&gt;mib_read_interval);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ksz_init_mib_timer(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	INIT_DELAYED_WORK(&amp;dev-&gt;mib_read, ksz_mib_read_work);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; dev-&gt;info-&gt;port_cnt; i++) {</div><div class='add'>+		struct ksz_port_mib *mib = &amp;dev-&gt;ports[i].mib;</div><div class='add'>+</div><div class='add'>+		dev-&gt;dev_ops-&gt;port_init_cnt(dev, i);</div><div class='add'>+</div><div class='add'>+		mib-&gt;cnt_ptr = 0;</div><div class='add'>+		memset(mib-&gt;counters, 0, dev-&gt;info-&gt;mib_cnt * sizeof(u64));</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_phy_read16(struct dsa_switch *ds, int addr, int reg)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	u16 val = 0xffff;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = dev-&gt;dev_ops-&gt;r_phy(dev, addr, reg, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_phy_write16(struct dsa_switch *ds, int addr, int reg, u16 val)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = dev-&gt;dev_ops-&gt;w_phy(dev, addr, reg, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 ksz_get_phy_flags(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	switch (dev-&gt;chip_id) {</div><div class='add'>+	case KSZ88X3_CHIP_ID:</div><div class='add'>+		/* Silicon Errata Sheet (DS80000830A):</div><div class='add'>+		 * Port 1 does not work with LinkMD Cable-Testing.</div><div class='add'>+		 * Port 1 does not respond to received PAUSE control frames.</div><div class='add'>+		 */</div><div class='add'>+		if (!port)</div><div class='add'>+			return MICREL_KSZ8_P1_ERRATA;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz_phylink_mac_link_down(struct phylink_config *config,</div><div class='add'>+				      unsigned int mode,</div><div class='add'>+				      phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct ksz_device *dev = dp-&gt;ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	/* Read all MIB counters when the link is going down. */</div><div class='add'>+	dev-&gt;ports[dp-&gt;index].read = true;</div><div class='add'>+	/* timer started */</div><div class='add'>+	if (dev-&gt;mib_read_interval)</div><div class='add'>+		schedule_delayed_work(&amp;dev-&gt;mib_read, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_sset_count(struct dsa_switch *ds, int port, int sset)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (sset != ETH_SS_STATS)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return dev-&gt;info-&gt;mib_cnt;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz_get_ethtool_stats(struct dsa_switch *ds, int port,</div><div class='add'>+				  uint64_t *buf)</div><div class='add'>+{</div><div class='add'>+	const struct dsa_port *dp = dsa_to_port(ds, port);</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	struct ksz_port_mib *mib;</div><div class='add'>+</div><div class='add'>+	mib = &amp;dev-&gt;ports[port].mib;</div><div class='add'>+	mutex_lock(&amp;mib-&gt;cnt_mutex);</div><div class='add'>+</div><div class='add'>+	/* Only read dropped counters if no link. */</div><div class='add'>+	if (!netif_carrier_ok(dp-&gt;user))</div><div class='add'>+		mib-&gt;cnt_ptr = dev-&gt;info-&gt;reg_mib_cnt;</div><div class='add'>+	port_r_cnt(dev, port);</div><div class='add'>+	memcpy(buf, mib-&gt;counters, dev-&gt;info-&gt;mib_cnt * sizeof(u64));</div><div class='add'>+	mutex_unlock(&amp;mib-&gt;cnt_mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_port_bridge_join(struct dsa_switch *ds, int port,</div><div class='add'>+				struct dsa_bridge bridge,</div><div class='add'>+				bool *tx_fwd_offload,</div><div class='add'>+				struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	/* port_stp_state_set() will be called after to put the port in</div><div class='add'>+	 * appropriate state so there is no need to do anything.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz_port_bridge_leave(struct dsa_switch *ds, int port,</div><div class='add'>+				  struct dsa_bridge bridge)</div><div class='add'>+{</div><div class='add'>+	/* port_stp_state_set() will be called after to put the port in</div><div class='add'>+	 * forwarding state so there is no need to do anything.</div><div class='add'>+	 */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz_port_fast_age(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	dev-&gt;dev_ops-&gt;flush_dyn_mac_table(dev, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_set_ageing_time(struct dsa_switch *ds, unsigned int msecs)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (!dev-&gt;dev_ops-&gt;set_ageing_time)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return dev-&gt;dev_ops-&gt;set_ageing_time(dev, msecs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_port_fdb_add(struct dsa_switch *ds, int port,</div><div class='add'>+			    const unsigned char *addr, u16 vid,</div><div class='add'>+			    struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (!dev-&gt;dev_ops-&gt;fdb_add)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return dev-&gt;dev_ops-&gt;fdb_add(dev, port, addr, vid, db);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_port_fdb_del(struct dsa_switch *ds, int port,</div><div class='add'>+			    const unsigned char *addr,</div><div class='add'>+			    u16 vid, struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (!dev-&gt;dev_ops-&gt;fdb_del)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return dev-&gt;dev_ops-&gt;fdb_del(dev, port, addr, vid, db);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_port_fdb_dump(struct dsa_switch *ds, int port,</div><div class='add'>+			     dsa_fdb_dump_cb_t *cb, void *data)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (!dev-&gt;dev_ops-&gt;fdb_dump)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return dev-&gt;dev_ops-&gt;fdb_dump(dev, port, cb, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_port_mdb_add(struct dsa_switch *ds, int port,</div><div class='add'>+			    const struct switchdev_obj_port_mdb *mdb,</div><div class='add'>+			    struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (!dev-&gt;dev_ops-&gt;mdb_add)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return dev-&gt;dev_ops-&gt;mdb_add(dev, port, mdb, db);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_port_mdb_del(struct dsa_switch *ds, int port,</div><div class='add'>+			    const struct switchdev_obj_port_mdb *mdb,</div><div class='add'>+			    struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (!dev-&gt;dev_ops-&gt;mdb_del)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return dev-&gt;dev_ops-&gt;mdb_del(dev, port, mdb, db);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz9477_set_default_prio_queue_mapping(struct ksz_device *dev,</div><div class='add'>+						  int port)</div><div class='add'>+{</div><div class='add'>+	u32 queue_map = 0;</div><div class='add'>+	int ipm;</div><div class='add'>+</div><div class='add'>+	for (ipm = 0; ipm &lt; dev-&gt;info-&gt;num_ipms; ipm++) {</div><div class='add'>+		int queue;</div><div class='add'>+</div><div class='add'>+		/* Traffic Type (TT) is corresponding to the Internal Priority</div><div class='add'>+		 * Map (IPM) in the switch. Traffic Class (TC) is</div><div class='add'>+		 * corresponding to the queue in the switch.</div><div class='add'>+		 */</div><div class='add'>+		queue = ieee8021q_tt_to_tc(ipm, dev-&gt;info-&gt;num_tx_queues);</div><div class='add'>+		if (queue &lt; 0)</div><div class='add'>+			return queue;</div><div class='add'>+</div><div class='add'>+		queue_map |= queue &lt;&lt; (ipm * KSZ9477_PORT_TC_MAP_S);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ksz_pwrite32(dev, port, KSZ9477_PORT_MRI_TC_MAP__4, queue_map);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_port_setup(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!dsa_is_user_port(ds, port))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* setup user port */</div><div class='add'>+	dev-&gt;dev_ops-&gt;port_setup(dev, port, false);</div><div class='add'>+</div><div class='add'>+	if (!is_ksz8(dev)) {</div><div class='add'>+		ret = ksz9477_set_default_prio_queue_mapping(dev, port);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* port_stp_state_set() will be called after to enable the port so</div><div class='add'>+	 * there is no need to do anything.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	return ksz_dcb_init_port(dev, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ksz_port_stp_state_set(struct dsa_switch *ds, int port, u8 state)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	struct ksz_port *p;</div><div class='add'>+	const u16 *regs;</div><div class='add'>+	u8 data;</div><div class='add'>+</div><div class='add'>+	regs = dev-&gt;info-&gt;regs;</div><div class='add'>+</div><div class='add'>+	ksz_pread8(dev, port, regs[P_STP_CTRL], &amp;data);</div><div class='add'>+	data &amp;= ~(PORT_TX_ENABLE | PORT_RX_ENABLE | PORT_LEARN_DISABLE);</div><div class='add'>+</div><div class='add'>+	p = &amp;dev-&gt;ports[port];</div><div class='add'>+</div><div class='add'>+	switch (state) {</div><div class='add'>+	case BR_STATE_DISABLED:</div><div class='add'>+		data |= PORT_LEARN_DISABLE;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_LISTENING:</div><div class='add'>+		data |= (PORT_RX_ENABLE | PORT_LEARN_DISABLE);</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_LEARNING:</div><div class='add'>+		data |= PORT_RX_ENABLE;</div><div class='add'>+		if (!p-&gt;learning)</div><div class='add'>+			data |= PORT_LEARN_DISABLE;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_FORWARDING:</div><div class='add'>+		data |= (PORT_TX_ENABLE | PORT_RX_ENABLE);</div><div class='add'>+		if (!p-&gt;learning)</div><div class='add'>+			data |= PORT_LEARN_DISABLE;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_BLOCKING:</div><div class='add'>+		data |= PORT_LEARN_DISABLE;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(ds-&gt;dev, "invalid STP state: %d\n", state);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ksz_pwrite8(dev, port, regs[P_STP_CTRL], data);</div><div class='add'>+</div><div class='add'>+	p-&gt;stp_state = state;</div><div class='add'>+</div><div class='add'>+	ksz_update_port_member(dev, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz_port_teardown(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	switch (dev-&gt;chip_id) {</div><div class='add'>+	case KSZ8563_CHIP_ID:</div><div class='add'>+	case KSZ8567_CHIP_ID:</div><div class='add'>+	case KSZ9477_CHIP_ID:</div><div class='add'>+	case KSZ9563_CHIP_ID:</div><div class='add'>+	case KSZ9567_CHIP_ID:</div><div class='add'>+	case KSZ9893_CHIP_ID:</div><div class='add'>+	case KSZ9896_CHIP_ID:</div><div class='add'>+	case KSZ9897_CHIP_ID:</div><div class='add'>+	case LAN9646_CHIP_ID:</div><div class='add'>+		if (dsa_is_user_port(ds, port))</div><div class='add'>+			ksz9477_port_acl_free(dev, port);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_port_pre_bridge_flags(struct dsa_switch *ds, int port,</div><div class='add'>+				     struct switchdev_brport_flags flags,</div><div class='add'>+				     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	if (flags.mask &amp; ~(BR_LEARNING | BR_ISOLATED))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_port_bridge_flags(struct dsa_switch *ds, int port,</div><div class='add'>+				 struct switchdev_brport_flags flags,</div><div class='add'>+				 struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	struct ksz_port *p = &amp;dev-&gt;ports[port];</div><div class='add'>+</div><div class='add'>+	if (flags.mask &amp; (BR_LEARNING | BR_ISOLATED)) {</div><div class='add'>+		if (flags.mask &amp; BR_LEARNING)</div><div class='add'>+			p-&gt;learning = !!(flags.val &amp; BR_LEARNING);</div><div class='add'>+</div><div class='add'>+		if (flags.mask &amp; BR_ISOLATED)</div><div class='add'>+			p-&gt;isolated = !!(flags.val &amp; BR_ISOLATED);</div><div class='add'>+</div><div class='add'>+		/* Make the change take effect immediately */</div><div class='add'>+		ksz_port_stp_state_set(ds, port, p-&gt;stp_state);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum dsa_tag_protocol ksz_get_tag_protocol(struct dsa_switch *ds,</div><div class='add'>+						  int port,</div><div class='add'>+						  enum dsa_tag_protocol mp)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	enum dsa_tag_protocol proto = DSA_TAG_PROTO_NONE;</div><div class='add'>+</div><div class='add'>+	if (ksz_is_ksz87xx(dev) || ksz_is_8895_family(dev))</div><div class='add'>+		proto = DSA_TAG_PROTO_KSZ8795;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;chip_id == KSZ88X3_CHIP_ID ||</div><div class='add'>+	    dev-&gt;chip_id == KSZ8463_CHIP_ID ||</div><div class='add'>+	    dev-&gt;chip_id == KSZ8563_CHIP_ID ||</div><div class='add'>+	    dev-&gt;chip_id == KSZ9893_CHIP_ID ||</div><div class='add'>+	    dev-&gt;chip_id == KSZ9563_CHIP_ID)</div><div class='add'>+		proto = DSA_TAG_PROTO_KSZ9893;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;chip_id == KSZ8567_CHIP_ID ||</div><div class='add'>+	    dev-&gt;chip_id == KSZ9477_CHIP_ID ||</div><div class='add'>+	    dev-&gt;chip_id == KSZ9896_CHIP_ID ||</div><div class='add'>+	    dev-&gt;chip_id == KSZ9897_CHIP_ID ||</div><div class='add'>+	    dev-&gt;chip_id == KSZ9567_CHIP_ID ||</div><div class='add'>+	    dev-&gt;chip_id == LAN9646_CHIP_ID)</div><div class='add'>+		proto = DSA_TAG_PROTO_KSZ9477;</div><div class='add'>+</div><div class='add'>+	if (is_lan937x(dev))</div><div class='add'>+		proto = DSA_TAG_PROTO_LAN937X;</div><div class='add'>+</div><div class='add'>+	return proto;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_connect_tag_protocol(struct dsa_switch *ds,</div><div class='add'>+				    enum dsa_tag_protocol proto)</div><div class='add'>+{</div><div class='add'>+	struct ksz_tagger_data *tagger_data;</div><div class='add'>+</div><div class='add'>+	switch (proto) {</div><div class='add'>+	case DSA_TAG_PROTO_KSZ8795:</div><div class='add'>+		return 0;</div><div class='add'>+	case DSA_TAG_PROTO_KSZ9893:</div><div class='add'>+	case DSA_TAG_PROTO_KSZ9477:</div><div class='add'>+	case DSA_TAG_PROTO_LAN937X:</div><div class='add'>+		tagger_data = ksz_tagger_data(ds);</div><div class='add'>+		tagger_data-&gt;xmit_work_fn = ksz_port_deferred_xmit;</div><div class='add'>+		return 0;</div><div class='add'>+	default:</div><div class='add'>+		return -EPROTONOSUPPORT;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_port_vlan_filtering(struct dsa_switch *ds, int port,</div><div class='add'>+				   bool flag, struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (!dev-&gt;dev_ops-&gt;vlan_filtering)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return dev-&gt;dev_ops-&gt;vlan_filtering(dev, port, flag, extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_port_vlan_add(struct dsa_switch *ds, int port,</div><div class='add'>+			     const struct switchdev_obj_port_vlan *vlan,</div><div class='add'>+			     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (!dev-&gt;dev_ops-&gt;vlan_add)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return dev-&gt;dev_ops-&gt;vlan_add(dev, port, vlan, extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_port_vlan_del(struct dsa_switch *ds, int port,</div><div class='add'>+			     const struct switchdev_obj_port_vlan *vlan)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (!dev-&gt;dev_ops-&gt;vlan_del)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return dev-&gt;dev_ops-&gt;vlan_del(dev, port, vlan);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_port_mirror_add(struct dsa_switch *ds, int port,</div><div class='add'>+			       struct dsa_mall_mirror_tc_entry *mirror,</div><div class='add'>+			       bool ingress, struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (!dev-&gt;dev_ops-&gt;mirror_add)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return dev-&gt;dev_ops-&gt;mirror_add(dev, port, mirror, ingress, extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz_port_mirror_del(struct dsa_switch *ds, int port,</div><div class='add'>+				struct dsa_mall_mirror_tc_entry *mirror)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;dev_ops-&gt;mirror_del)</div><div class='add'>+		dev-&gt;dev_ops-&gt;mirror_del(dev, port, mirror);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_change_mtu(struct dsa_switch *ds, int port, int mtu)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (!dev-&gt;dev_ops-&gt;change_mtu)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return dev-&gt;dev_ops-&gt;change_mtu(dev, port, mtu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_max_mtu(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	switch (dev-&gt;chip_id) {</div><div class='add'>+	case KSZ8795_CHIP_ID:</div><div class='add'>+	case KSZ8794_CHIP_ID:</div><div class='add'>+	case KSZ8765_CHIP_ID:</div><div class='add'>+		return KSZ8795_HUGE_PACKET_SIZE - VLAN_ETH_HLEN - ETH_FCS_LEN;</div><div class='add'>+	case KSZ8463_CHIP_ID:</div><div class='add'>+	case KSZ88X3_CHIP_ID:</div><div class='add'>+	case KSZ8864_CHIP_ID:</div><div class='add'>+	case KSZ8895_CHIP_ID:</div><div class='add'>+		return KSZ8863_HUGE_PACKET_SIZE - VLAN_ETH_HLEN - ETH_FCS_LEN;</div><div class='add'>+	case KSZ8563_CHIP_ID:</div><div class='add'>+	case KSZ8567_CHIP_ID:</div><div class='add'>+	case KSZ9477_CHIP_ID:</div><div class='add'>+	case KSZ9563_CHIP_ID:</div><div class='add'>+	case KSZ9567_CHIP_ID:</div><div class='add'>+	case KSZ9893_CHIP_ID:</div><div class='add'>+	case KSZ9896_CHIP_ID:</div><div class='add'>+	case KSZ9897_CHIP_ID:</div><div class='add'>+	case LAN9370_CHIP_ID:</div><div class='add'>+	case LAN9371_CHIP_ID:</div><div class='add'>+	case LAN9372_CHIP_ID:</div><div class='add'>+	case LAN9373_CHIP_ID:</div><div class='add'>+	case LAN9374_CHIP_ID:</div><div class='add'>+	case LAN9646_CHIP_ID:</div><div class='add'>+		return KSZ9477_MAX_FRAME_SIZE - VLAN_ETH_HLEN - ETH_FCS_LEN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_support_eee - Determine Energy Efficient Ethernet (EEE) support for a</div><div class='add'>+ *                   port</div><div class='add'>+ * @ds: Pointer to the DSA switch structure</div><div class='add'>+ * @port: Port number to check</div><div class='add'>+ *</div><div class='add'>+ * This function also documents devices where EEE was initially advertised but</div><div class='add'>+ * later withdrawn due to reliability issues, as described in official errata</div><div class='add'>+ * documents. These devices are explicitly listed to record known limitations,</div><div class='add'>+ * even if there is no technical necessity for runtime checks.</div><div class='add'>+ *</div><div class='add'>+ * Returns: true if the internal PHY on the given port supports fully</div><div class='add'>+ * operational EEE, false otherwise.</div><div class='add'>+ */</div><div class='add'>+static bool ksz_support_eee(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (!dev-&gt;info-&gt;internal_phy[port])</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	switch (dev-&gt;chip_id) {</div><div class='add'>+	case KSZ8563_CHIP_ID:</div><div class='add'>+	case KSZ9563_CHIP_ID:</div><div class='add'>+	case KSZ9893_CHIP_ID:</div><div class='add'>+		return true;</div><div class='add'>+	case KSZ8567_CHIP_ID:</div><div class='add'>+		/* KSZ8567R Errata DS80000752C Module 4 */</div><div class='add'>+	case KSZ8765_CHIP_ID:</div><div class='add'>+	case KSZ8794_CHIP_ID:</div><div class='add'>+	case KSZ8795_CHIP_ID:</div><div class='add'>+		/* KSZ879x/KSZ877x/KSZ876x Errata DS80000687C Module 2 */</div><div class='add'>+	case KSZ9477_CHIP_ID:</div><div class='add'>+		/* KSZ9477S Errata DS80000754A Module 4 */</div><div class='add'>+	case KSZ9567_CHIP_ID:</div><div class='add'>+		/* KSZ9567S Errata DS80000756A Module 4 */</div><div class='add'>+	case KSZ9896_CHIP_ID:</div><div class='add'>+		/* KSZ9896C Errata DS80000757A Module 3 */</div><div class='add'>+	case KSZ9897_CHIP_ID:</div><div class='add'>+	case LAN9646_CHIP_ID:</div><div class='add'>+		/* KSZ9897R Errata DS80000758C Module 4 */</div><div class='add'>+		/* Energy Efficient Ethernet (EEE) feature select must be</div><div class='add'>+		 * manually disabled</div><div class='add'>+		 *   The EEE feature is enabled by default, but it is not fully</div><div class='add'>+		 *   operational. It must be manually disabled through register</div><div class='add'>+		 *   controls. If not disabled, the PHY ports can auto-negotiate</div><div class='add'>+		 *   to enable EEE, and this feature can cause link drops when</div><div class='add'>+		 *   linked to another device supporting EEE.</div><div class='add'>+		 *</div><div class='add'>+		 * The same item appears in the errata for all switches above.</div><div class='add'>+		 */</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_set_mac_eee(struct dsa_switch *ds, int port,</div><div class='add'>+			   struct ethtool_keee *e)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (!e-&gt;tx_lpi_enabled) {</div><div class='add'>+		dev_err(dev-&gt;dev, "Disabling EEE Tx LPI is not supported\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (e-&gt;tx_lpi_timer) {</div><div class='add'>+		dev_err(dev-&gt;dev, "Setting EEE Tx LPI timer is not supported\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz_set_xmii(struct ksz_device *dev, int port,</div><div class='add'>+			 phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	const u8 *bitval = dev-&gt;info-&gt;xmii_ctrl1;</div><div class='add'>+	struct ksz_port *p = &amp;dev-&gt;ports[port];</div><div class='add'>+	const u16 *regs = dev-&gt;info-&gt;regs;</div><div class='add'>+	u8 data8;</div><div class='add'>+</div><div class='add'>+	ksz_pread8(dev, port, regs[P_XMII_CTRL_1], &amp;data8);</div><div class='add'>+</div><div class='add'>+	data8 &amp;= ~(P_MII_SEL_M | P_RGMII_ID_IG_ENABLE |</div><div class='add'>+		   P_RGMII_ID_EG_ENABLE);</div><div class='add'>+</div><div class='add'>+	switch (interface) {</div><div class='add'>+	case PHY_INTERFACE_MODE_MII:</div><div class='add'>+		data8 |= bitval[P_MII_SEL];</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_RMII:</div><div class='add'>+		data8 |= bitval[P_RMII_SEL];</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_GMII:</div><div class='add'>+		data8 |= bitval[P_GMII_SEL];</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='add'>+		data8 |= bitval[P_RGMII_SEL];</div><div class='add'>+		/* On KSZ9893, disable RGMII in-band status support */</div><div class='add'>+		if (dev-&gt;chip_id == KSZ9893_CHIP_ID ||</div><div class='add'>+		    dev-&gt;chip_id == KSZ8563_CHIP_ID ||</div><div class='add'>+		    dev-&gt;chip_id == KSZ9563_CHIP_ID ||</div><div class='add'>+		    is_lan937x(dev))</div><div class='add'>+			data8 &amp;= ~P_MII_MAC_MODE;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(dev-&gt;dev, "Unsupported interface '%s' for port %d\n",</div><div class='add'>+			phy_modes(interface), port);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (p-&gt;rgmii_tx_val)</div><div class='add'>+		data8 |= P_RGMII_ID_EG_ENABLE;</div><div class='add'>+</div><div class='add'>+	if (p-&gt;rgmii_rx_val)</div><div class='add'>+		data8 |= P_RGMII_ID_IG_ENABLE;</div><div class='add'>+</div><div class='add'>+	/* Write the updated value */</div><div class='add'>+	ksz_pwrite8(dev, port, regs[P_XMII_CTRL_1], data8);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+phy_interface_t ksz_get_xmii(struct ksz_device *dev, int port, bool gbit)</div><div class='add'>+{</div><div class='add'>+	const u8 *bitval = dev-&gt;info-&gt;xmii_ctrl1;</div><div class='add'>+	const u16 *regs = dev-&gt;info-&gt;regs;</div><div class='add'>+	phy_interface_t interface;</div><div class='add'>+	u8 data8;</div><div class='add'>+	u8 val;</div><div class='add'>+</div><div class='add'>+	ksz_pread8(dev, port, regs[P_XMII_CTRL_1], &amp;data8);</div><div class='add'>+</div><div class='add'>+	val = FIELD_GET(P_MII_SEL_M, data8);</div><div class='add'>+</div><div class='add'>+	if (val == bitval[P_MII_SEL]) {</div><div class='add'>+		if (gbit)</div><div class='add'>+			interface = PHY_INTERFACE_MODE_GMII;</div><div class='add'>+		else</div><div class='add'>+			interface = PHY_INTERFACE_MODE_MII;</div><div class='add'>+	} else if (val == bitval[P_RMII_SEL]) {</div><div class='add'>+		interface = PHY_INTERFACE_MODE_RMII;</div><div class='add'>+	} else {</div><div class='add'>+		interface = PHY_INTERFACE_MODE_RGMII;</div><div class='add'>+		if (data8 &amp; P_RGMII_ID_EG_ENABLE)</div><div class='add'>+			interface = PHY_INTERFACE_MODE_RGMII_TXID;</div><div class='add'>+		if (data8 &amp; P_RGMII_ID_IG_ENABLE) {</div><div class='add'>+			interface = PHY_INTERFACE_MODE_RGMII_RXID;</div><div class='add'>+			if (data8 &amp; P_RGMII_ID_EG_ENABLE)</div><div class='add'>+				interface = PHY_INTERFACE_MODE_RGMII_ID;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return interface;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz88x3_phylink_mac_config(struct phylink_config *config,</div><div class='add'>+				       unsigned int mode,</div><div class='add'>+				       const struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct ksz_device *dev = dp-&gt;ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	dev-&gt;ports[dp-&gt;index].manual_flow = !(state-&gt;pause &amp; MLO_PAUSE_AN);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz_phylink_mac_config(struct phylink_config *config,</div><div class='add'>+				   unsigned int mode,</div><div class='add'>+				   const struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct ksz_device *dev = dp-&gt;ds-&gt;priv;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+</div><div class='add'>+	/* Internal PHYs */</div><div class='add'>+	if (dev-&gt;info-&gt;internal_phy[port])</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* No need to configure XMII control register when using SGMII. */</div><div class='add'>+	if (ksz_is_sgmii_port(dev, port))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (phylink_autoneg_inband(mode)) {</div><div class='add'>+		dev_err(dev-&gt;dev, "In-band AN not supported!\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ksz_set_xmii(dev, port, state-&gt;interface);</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;dev_ops-&gt;setup_rgmii_delay)</div><div class='add'>+		dev-&gt;dev_ops-&gt;setup_rgmii_delay(dev, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool ksz_get_gbit(struct ksz_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	const u8 *bitval = dev-&gt;info-&gt;xmii_ctrl1;</div><div class='add'>+	const u16 *regs = dev-&gt;info-&gt;regs;</div><div class='add'>+	bool gbit = false;</div><div class='add'>+	u8 data8;</div><div class='add'>+	bool val;</div><div class='add'>+</div><div class='add'>+	ksz_pread8(dev, port, regs[P_XMII_CTRL_1], &amp;data8);</div><div class='add'>+</div><div class='add'>+	val = FIELD_GET(P_GMII_1GBIT_M, data8);</div><div class='add'>+</div><div class='add'>+	if (val == bitval[P_GMII_1GBIT])</div><div class='add'>+		gbit = true;</div><div class='add'>+</div><div class='add'>+	return gbit;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz_set_gbit(struct ksz_device *dev, int port, bool gbit)</div><div class='add'>+{</div><div class='add'>+	const u8 *bitval = dev-&gt;info-&gt;xmii_ctrl1;</div><div class='add'>+	const u16 *regs = dev-&gt;info-&gt;regs;</div><div class='add'>+	u8 data8;</div><div class='add'>+</div><div class='add'>+	ksz_pread8(dev, port, regs[P_XMII_CTRL_1], &amp;data8);</div><div class='add'>+</div><div class='add'>+	data8 &amp;= ~P_GMII_1GBIT_M;</div><div class='add'>+</div><div class='add'>+	if (gbit)</div><div class='add'>+		data8 |= FIELD_PREP(P_GMII_1GBIT_M, bitval[P_GMII_1GBIT]);</div><div class='add'>+	else</div><div class='add'>+		data8 |= FIELD_PREP(P_GMII_1GBIT_M, bitval[P_GMII_NOT_1GBIT]);</div><div class='add'>+</div><div class='add'>+	/* Write the updated value */</div><div class='add'>+	ksz_pwrite8(dev, port, regs[P_XMII_CTRL_1], data8);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz_set_100_10mbit(struct ksz_device *dev, int port, int speed)</div><div class='add'>+{</div><div class='add'>+	const u8 *bitval = dev-&gt;info-&gt;xmii_ctrl0;</div><div class='add'>+	const u16 *regs = dev-&gt;info-&gt;regs;</div><div class='add'>+	u8 data8;</div><div class='add'>+</div><div class='add'>+	ksz_pread8(dev, port, regs[P_XMII_CTRL_0], &amp;data8);</div><div class='add'>+</div><div class='add'>+	data8 &amp;= ~P_MII_100MBIT_M;</div><div class='add'>+</div><div class='add'>+	if (speed == SPEED_100)</div><div class='add'>+		data8 |= FIELD_PREP(P_MII_100MBIT_M, bitval[P_MII_100MBIT]);</div><div class='add'>+	else</div><div class='add'>+		data8 |= FIELD_PREP(P_MII_100MBIT_M, bitval[P_MII_10MBIT]);</div><div class='add'>+</div><div class='add'>+	/* Write the updated value */</div><div class='add'>+	ksz_pwrite8(dev, port, regs[P_XMII_CTRL_0], data8);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz_port_set_xmii_speed(struct ksz_device *dev, int port, int speed)</div><div class='add'>+{</div><div class='add'>+	if (speed == SPEED_1000)</div><div class='add'>+		ksz_set_gbit(dev, port, true);</div><div class='add'>+	else</div><div class='add'>+		ksz_set_gbit(dev, port, false);</div><div class='add'>+</div><div class='add'>+	if (speed == SPEED_100 || speed == SPEED_10)</div><div class='add'>+		ksz_set_100_10mbit(dev, port, speed);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz_duplex_flowctrl(struct ksz_device *dev, int port, int duplex,</div><div class='add'>+				bool tx_pause, bool rx_pause)</div><div class='add'>+{</div><div class='add'>+	const u8 *bitval = dev-&gt;info-&gt;xmii_ctrl0;</div><div class='add'>+	const u32 *masks = dev-&gt;info-&gt;masks;</div><div class='add'>+	const u16 *regs = dev-&gt;info-&gt;regs;</div><div class='add'>+	u8 mask;</div><div class='add'>+	u8 val;</div><div class='add'>+</div><div class='add'>+	mask = P_MII_DUPLEX_M | masks[P_MII_TX_FLOW_CTRL] |</div><div class='add'>+	       masks[P_MII_RX_FLOW_CTRL];</div><div class='add'>+</div><div class='add'>+	if (duplex == DUPLEX_FULL)</div><div class='add'>+		val = FIELD_PREP(P_MII_DUPLEX_M, bitval[P_MII_FULL_DUPLEX]);</div><div class='add'>+	else</div><div class='add'>+		val = FIELD_PREP(P_MII_DUPLEX_M, bitval[P_MII_HALF_DUPLEX]);</div><div class='add'>+</div><div class='add'>+	if (tx_pause)</div><div class='add'>+		val |= masks[P_MII_TX_FLOW_CTRL];</div><div class='add'>+</div><div class='add'>+	if (rx_pause)</div><div class='add'>+		val |= masks[P_MII_RX_FLOW_CTRL];</div><div class='add'>+</div><div class='add'>+	ksz_prmw8(dev, port, regs[P_XMII_CTRL_0], mask, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz9477_phylink_mac_link_up(struct phylink_config *config,</div><div class='add'>+					struct phy_device *phydev,</div><div class='add'>+					unsigned int mode,</div><div class='add'>+					phy_interface_t interface,</div><div class='add'>+					int speed, int duplex, bool tx_pause,</div><div class='add'>+					bool rx_pause)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct ksz_device *dev = dp-&gt;ds-&gt;priv;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+	struct ksz_port *p;</div><div class='add'>+</div><div class='add'>+	p = &amp;dev-&gt;ports[port];</div><div class='add'>+</div><div class='add'>+	/* Internal PHYs */</div><div class='add'>+	if (dev-&gt;info-&gt;internal_phy[port])</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	p-&gt;phydev.speed = speed;</div><div class='add'>+</div><div class='add'>+	ksz_port_set_xmii_speed(dev, port, speed);</div><div class='add'>+</div><div class='add'>+	ksz_duplex_flowctrl(dev, port, duplex, tx_pause, rx_pause);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_switch_detect(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	u8 id1, id2, id4;</div><div class='add'>+	u16 id16;</div><div class='add'>+	u32 id32;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* read chip id */</div><div class='add'>+	ret = ksz_read16(dev, REG_CHIP_ID0, &amp;id16);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	id1 = FIELD_GET(SW_FAMILY_ID_M, id16);</div><div class='add'>+	id2 = FIELD_GET(SW_CHIP_ID_M, id16);</div><div class='add'>+</div><div class='add'>+	switch (id1) {</div><div class='add'>+	case KSZ84_FAMILY_ID:</div><div class='add'>+		dev-&gt;chip_id = KSZ8463_CHIP_ID;</div><div class='add'>+		break;</div><div class='add'>+	case KSZ87_FAMILY_ID:</div><div class='add'>+		if (id2 == KSZ87_CHIP_ID_95) {</div><div class='add'>+			u8 val;</div><div class='add'>+</div><div class='add'>+			dev-&gt;chip_id = KSZ8795_CHIP_ID;</div><div class='add'>+</div><div class='add'>+			ksz_read8(dev, KSZ8_PORT_STATUS_0, &amp;val);</div><div class='add'>+			if (val &amp; KSZ8_PORT_FIBER_MODE)</div><div class='add'>+				dev-&gt;chip_id = KSZ8765_CHIP_ID;</div><div class='add'>+		} else if (id2 == KSZ87_CHIP_ID_94) {</div><div class='add'>+			dev-&gt;chip_id = KSZ8794_CHIP_ID;</div><div class='add'>+		} else {</div><div class='add'>+			return -ENODEV;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case KSZ88_FAMILY_ID:</div><div class='add'>+		if (id2 == KSZ88_CHIP_ID_63)</div><div class='add'>+			dev-&gt;chip_id = KSZ88X3_CHIP_ID;</div><div class='add'>+		else</div><div class='add'>+			return -ENODEV;</div><div class='add'>+		break;</div><div class='add'>+	case KSZ8895_FAMILY_ID:</div><div class='add'>+		if (id2 == KSZ8895_CHIP_ID_95 ||</div><div class='add'>+		    id2 == KSZ8895_CHIP_ID_95R)</div><div class='add'>+			dev-&gt;chip_id = KSZ8895_CHIP_ID;</div><div class='add'>+		else</div><div class='add'>+			return -ENODEV;</div><div class='add'>+		ret = ksz_read8(dev, REG_KSZ8864_CHIP_ID, &amp;id4);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+		if (id4 &amp; SW_KSZ8864)</div><div class='add'>+			dev-&gt;chip_id = KSZ8864_CHIP_ID;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = ksz_read32(dev, REG_CHIP_ID0, &amp;id32);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		dev-&gt;chip_rev = FIELD_GET(SW_REV_ID_M, id32);</div><div class='add'>+		id32 &amp;= ~0xFF;</div><div class='add'>+</div><div class='add'>+		switch (id32) {</div><div class='add'>+		case KSZ9477_CHIP_ID:</div><div class='add'>+		case KSZ9896_CHIP_ID:</div><div class='add'>+		case KSZ9897_CHIP_ID:</div><div class='add'>+		case KSZ9567_CHIP_ID:</div><div class='add'>+		case KSZ8567_CHIP_ID:</div><div class='add'>+		case LAN9370_CHIP_ID:</div><div class='add'>+		case LAN9371_CHIP_ID:</div><div class='add'>+		case LAN9372_CHIP_ID:</div><div class='add'>+		case LAN9373_CHIP_ID:</div><div class='add'>+		case LAN9374_CHIP_ID:</div><div class='add'>+</div><div class='add'>+			/* LAN9646 does not have its own chip id. */</div><div class='add'>+			if (dev-&gt;chip_id != LAN9646_CHIP_ID)</div><div class='add'>+				dev-&gt;chip_id = id32;</div><div class='add'>+			break;</div><div class='add'>+		case KSZ9893_CHIP_ID:</div><div class='add'>+			ret = ksz_read8(dev, REG_CHIP_ID4,</div><div class='add'>+					&amp;id4);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+</div><div class='add'>+			if (id4 == SKU_ID_KSZ8563)</div><div class='add'>+				dev-&gt;chip_id = KSZ8563_CHIP_ID;</div><div class='add'>+			else if (id4 == SKU_ID_KSZ9563)</div><div class='add'>+				dev-&gt;chip_id = KSZ9563_CHIP_ID;</div><div class='add'>+			else</div><div class='add'>+				dev-&gt;chip_id = KSZ9893_CHIP_ID;</div><div class='add'>+</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			dev_err(dev-&gt;dev,</div><div class='add'>+				"unsupported switch detected %x)\n", id32);</div><div class='add'>+			return -ENODEV;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_cls_flower_add(struct dsa_switch *ds, int port,</div><div class='add'>+			      struct flow_cls_offload *cls, bool ingress)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	switch (dev-&gt;chip_id) {</div><div class='add'>+	case KSZ8563_CHIP_ID:</div><div class='add'>+	case KSZ8567_CHIP_ID:</div><div class='add'>+	case KSZ9477_CHIP_ID:</div><div class='add'>+	case KSZ9563_CHIP_ID:</div><div class='add'>+	case KSZ9567_CHIP_ID:</div><div class='add'>+	case KSZ9893_CHIP_ID:</div><div class='add'>+	case KSZ9896_CHIP_ID:</div><div class='add'>+	case KSZ9897_CHIP_ID:</div><div class='add'>+	case LAN9646_CHIP_ID:</div><div class='add'>+		return ksz9477_cls_flower_add(ds, port, cls, ingress);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_cls_flower_del(struct dsa_switch *ds, int port,</div><div class='add'>+			      struct flow_cls_offload *cls, bool ingress)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	switch (dev-&gt;chip_id) {</div><div class='add'>+	case KSZ8563_CHIP_ID:</div><div class='add'>+	case KSZ8567_CHIP_ID:</div><div class='add'>+	case KSZ9477_CHIP_ID:</div><div class='add'>+	case KSZ9563_CHIP_ID:</div><div class='add'>+	case KSZ9567_CHIP_ID:</div><div class='add'>+	case KSZ9893_CHIP_ID:</div><div class='add'>+	case KSZ9896_CHIP_ID:</div><div class='add'>+	case KSZ9897_CHIP_ID:</div><div class='add'>+	case LAN9646_CHIP_ID:</div><div class='add'>+		return ksz9477_cls_flower_del(ds, port, cls, ingress);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Bandwidth is calculated by idle slope/transmission speed. Then the Bandwidth</div><div class='add'>+ * is converted to Hex-decimal using the successive multiplication method. On</div><div class='add'>+ * every step, integer part is taken and decimal part is carry forwarded.</div><div class='add'>+ */</div><div class='add'>+static int cinc_cal(s32 idle_slope, s32 send_slope, u32 *bw)</div><div class='add'>+{</div><div class='add'>+	u32 cinc = 0;</div><div class='add'>+	u32 txrate;</div><div class='add'>+	u32 rate;</div><div class='add'>+	u8 temp;</div><div class='add'>+	u8 i;</div><div class='add'>+</div><div class='add'>+	txrate = idle_slope - send_slope;</div><div class='add'>+</div><div class='add'>+	if (!txrate)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	rate = idle_slope;</div><div class='add'>+</div><div class='add'>+	/* 24 bit register */</div><div class='add'>+	for (i = 0; i &lt; 6; i++) {</div><div class='add'>+		rate = rate * 16;</div><div class='add'>+</div><div class='add'>+		temp = rate / txrate;</div><div class='add'>+</div><div class='add'>+		rate %= txrate;</div><div class='add'>+</div><div class='add'>+		cinc = ((cinc &lt;&lt; 4) | temp);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*bw = cinc;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_setup_tc_mode(struct ksz_device *dev, int port, u8 scheduler,</div><div class='add'>+			     u8 shaper)</div><div class='add'>+{</div><div class='add'>+	return ksz_pwrite8(dev, port, REG_PORT_MTI_QUEUE_CTRL_0,</div><div class='add'>+			   FIELD_PREP(MTI_SCHEDULE_MODE_M, scheduler) |</div><div class='add'>+			   FIELD_PREP(MTI_SHAPING_M, shaper));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_setup_tc_cbs(struct dsa_switch *ds, int port,</div><div class='add'>+			    struct tc_cbs_qopt_offload *qopt)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+	u32 bw;</div><div class='add'>+</div><div class='add'>+	if (!dev-&gt;info-&gt;tc_cbs_supported)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (qopt-&gt;queue &gt; dev-&gt;info-&gt;num_tx_queues)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Queue Selection */</div><div class='add'>+	ret = ksz_pwrite32(dev, port, REG_PORT_MTI_QUEUE_INDEX__4, qopt-&gt;queue);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (!qopt-&gt;enable)</div><div class='add'>+		return ksz_setup_tc_mode(dev, port, MTI_SCHEDULE_WRR,</div><div class='add'>+					 MTI_SHAPING_OFF);</div><div class='add'>+</div><div class='add'>+	/* High Credit */</div><div class='add'>+	ret = ksz_pwrite16(dev, port, REG_PORT_MTI_HI_WATER_MARK,</div><div class='add'>+			   qopt-&gt;hicredit);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Low Credit */</div><div class='add'>+	ret = ksz_pwrite16(dev, port, REG_PORT_MTI_LO_WATER_MARK,</div><div class='add'>+			   qopt-&gt;locredit);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Credit Increment Register */</div><div class='add'>+	ret = cinc_cal(qopt-&gt;idleslope, qopt-&gt;sendslope, &amp;bw);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;dev_ops-&gt;tc_cbs_set_cinc) {</div><div class='add'>+		ret = dev-&gt;dev_ops-&gt;tc_cbs_set_cinc(dev, port, bw);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ksz_setup_tc_mode(dev, port, MTI_SCHEDULE_STRICT_PRIO,</div><div class='add'>+				 MTI_SHAPING_SRP);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_disable_egress_rate_limit(struct ksz_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	int queue, ret;</div><div class='add'>+</div><div class='add'>+	/* Configuration will not take effect until the last Port Queue X</div><div class='add'>+	 * Egress Limit Control Register is written.</div><div class='add'>+	 */</div><div class='add'>+	for (queue = 0; queue &lt; dev-&gt;info-&gt;num_tx_queues; queue++) {</div><div class='add'>+		ret = ksz_pwrite8(dev, port, KSZ9477_REG_PORT_OUT_RATE_0 + queue,</div><div class='add'>+				  KSZ9477_OUT_RATE_NO_LIMIT);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_ets_band_to_queue(struct tc_ets_qopt_offload_replace_params *p,</div><div class='add'>+				 int band)</div><div class='add'>+{</div><div class='add'>+	/* Compared to queues, bands prioritize packets differently. In strict</div><div class='add'>+	 * priority mode, the lowest priority is assigned to Queue 0 while the</div><div class='add'>+	 * highest priority is given to Band 0.</div><div class='add'>+	 */</div><div class='add'>+	return p-&gt;bands - 1 - band;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 ksz8463_tc_ctrl(int port, int queue)</div><div class='add'>+{</div><div class='add'>+	u8 reg;</div><div class='add'>+</div><div class='add'>+	reg = 0xC8 + port * 4;</div><div class='add'>+	reg += ((3 - queue) / 2) * 2;</div><div class='add'>+	reg++;</div><div class='add'>+	reg -= (queue &amp; 1);</div><div class='add'>+	return reg;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz88x3_tc_ets_add - Configure ETS (Enhanced Transmission Selection)</div><div class='add'>+ *                      for a port on KSZ88x3 switch</div><div class='add'>+ * @dev: Pointer to the KSZ switch device structure</div><div class='add'>+ * @port: Port number to configure</div><div class='add'>+ * @p: Pointer to offload replace parameters describing ETS bands and mapping</div><div class='add'>+ *</div><div class='add'>+ * The KSZ88x3 supports two scheduling modes: Strict Priority and</div><div class='add'>+ * Weighted Fair Queuing (WFQ). Both modes have fixed behavior:</div><div class='add'>+ *   - No configurable queue-to-priority mapping</div><div class='add'>+ *   - No weight adjustment in WFQ mode</div><div class='add'>+ *</div><div class='add'>+ * This function configures the switch to use strict priority mode by</div><div class='add'>+ * clearing the WFQ enable bit for all queues associated with ETS bands.</div><div class='add'>+ * If strict priority is not explicitly requested, the switch will default</div><div class='add'>+ * to WFQ mode.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or a negative error code on failure</div><div class='add'>+ */</div><div class='add'>+static int ksz88x3_tc_ets_add(struct ksz_device *dev, int port,</div><div class='add'>+			      struct tc_ets_qopt_offload_replace_params *p)</div><div class='add'>+{</div><div class='add'>+	int ret, band;</div><div class='add'>+</div><div class='add'>+	/* Only strict priority mode is supported for now.</div><div class='add'>+	 * WFQ is implicitly enabled when strict mode is disabled.</div><div class='add'>+	 */</div><div class='add'>+	for (band = 0; band &lt; p-&gt;bands; band++) {</div><div class='add'>+		int queue = ksz_ets_band_to_queue(p, band);</div><div class='add'>+		u8 reg;</div><div class='add'>+</div><div class='add'>+		/* Calculate TXQ Split Control register address for this</div><div class='add'>+		 * port/queue</div><div class='add'>+		 */</div><div class='add'>+		reg = KSZ8873_TXQ_SPLIT_CTRL_REG(port, queue);</div><div class='add'>+		if (ksz_is_ksz8463(dev))</div><div class='add'>+			reg = ksz8463_tc_ctrl(port, queue);</div><div class='add'>+</div><div class='add'>+		/* Clear WFQ enable bit to select strict priority scheduling */</div><div class='add'>+		ret = ksz_rmw8(dev, reg, KSZ8873_TXQ_WFQ_ENABLE, 0);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz88x3_tc_ets_del - Reset ETS (Enhanced Transmission Selection) config</div><div class='add'>+ *                      for a port on KSZ88x3 switch</div><div class='add'>+ * @dev: Pointer to the KSZ switch device structure</div><div class='add'>+ * @port: Port number to reset</div><div class='add'>+ *</div><div class='add'>+ * The KSZ88x3 supports only fixed scheduling modes: Strict Priority or</div><div class='add'>+ * Weighted Fair Queuing (WFQ), with no reconfiguration of weights or</div><div class='add'>+ * queue mapping. This function resets the port’s scheduling mode to</div><div class='add'>+ * the default, which is WFQ, by enabling the WFQ bit for all queues.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or a negative error code on failure</div><div class='add'>+ */</div><div class='add'>+static int ksz88x3_tc_ets_del(struct ksz_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	int ret, queue;</div><div class='add'>+</div><div class='add'>+	/* Iterate over all transmit queues for this port */</div><div class='add'>+	for (queue = 0; queue &lt; dev-&gt;info-&gt;num_tx_queues; queue++) {</div><div class='add'>+		u8 reg;</div><div class='add'>+</div><div class='add'>+		/* Calculate TXQ Split Control register address for this</div><div class='add'>+		 * port/queue</div><div class='add'>+		 */</div><div class='add'>+		reg = KSZ8873_TXQ_SPLIT_CTRL_REG(port, queue);</div><div class='add'>+		if (ksz_is_ksz8463(dev))</div><div class='add'>+			reg = ksz8463_tc_ctrl(port, queue);</div><div class='add'>+</div><div class='add'>+		/* Set WFQ enable bit to revert back to default scheduling</div><div class='add'>+		 * mode</div><div class='add'>+		 */</div><div class='add'>+		ret = ksz_rmw8(dev, reg, KSZ8873_TXQ_WFQ_ENABLE,</div><div class='add'>+			       KSZ8873_TXQ_WFQ_ENABLE);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_queue_set_strict(struct ksz_device *dev, int port, int queue)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = ksz_pwrite32(dev, port, REG_PORT_MTI_QUEUE_INDEX__4, queue);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return ksz_setup_tc_mode(dev, port, MTI_SCHEDULE_STRICT_PRIO,</div><div class='add'>+				 MTI_SHAPING_OFF);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_queue_set_wrr(struct ksz_device *dev, int port, int queue,</div><div class='add'>+			     int weight)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = ksz_pwrite32(dev, port, REG_PORT_MTI_QUEUE_INDEX__4, queue);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ksz_setup_tc_mode(dev, port, MTI_SCHEDULE_WRR,</div><div class='add'>+				MTI_SHAPING_OFF);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return ksz_pwrite8(dev, port, KSZ9477_PORT_MTI_QUEUE_CTRL_1, weight);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_tc_ets_add(struct ksz_device *dev, int port,</div><div class='add'>+			  struct tc_ets_qopt_offload_replace_params *p)</div><div class='add'>+{</div><div class='add'>+	int ret, band, tc_prio;</div><div class='add'>+	u32 queue_map = 0;</div><div class='add'>+</div><div class='add'>+	/* In order to ensure proper prioritization, it is necessary to set the</div><div class='add'>+	 * rate limit for the related queue to zero. Otherwise strict priority</div><div class='add'>+	 * or WRR mode will not work. This is a hardware limitation.</div><div class='add'>+	 */</div><div class='add'>+	ret = ksz_disable_egress_rate_limit(dev, port);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Configure queue scheduling mode for all bands. Currently only strict</div><div class='add'>+	 * prio mode is supported.</div><div class='add'>+	 */</div><div class='add'>+	for (band = 0; band &lt; p-&gt;bands; band++) {</div><div class='add'>+		int queue = ksz_ets_band_to_queue(p, band);</div><div class='add'>+</div><div class='add'>+		ret = ksz_queue_set_strict(dev, port, queue);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Configure the mapping between traffic classes and queues. Note:</div><div class='add'>+	 * priomap variable support 16 traffic classes, but the chip can handle</div><div class='add'>+	 * only 8 classes.</div><div class='add'>+	 */</div><div class='add'>+	for (tc_prio = 0; tc_prio &lt; ARRAY_SIZE(p-&gt;priomap); tc_prio++) {</div><div class='add'>+		int queue;</div><div class='add'>+</div><div class='add'>+		if (tc_prio &gt;= dev-&gt;info-&gt;num_ipms)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		queue = ksz_ets_band_to_queue(p, p-&gt;priomap[tc_prio]);</div><div class='add'>+		queue_map |= queue &lt;&lt; (tc_prio * KSZ9477_PORT_TC_MAP_S);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ksz_pwrite32(dev, port, KSZ9477_PORT_MRI_TC_MAP__4, queue_map);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_tc_ets_del(struct ksz_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	int ret, queue;</div><div class='add'>+</div><div class='add'>+	/* To restore the default chip configuration, set all queues to use the</div><div class='add'>+	 * WRR scheduler with a weight of 1.</div><div class='add'>+	 */</div><div class='add'>+	for (queue = 0; queue &lt; dev-&gt;info-&gt;num_tx_queues; queue++) {</div><div class='add'>+		ret = ksz_queue_set_wrr(dev, port, queue,</div><div class='add'>+					KSZ9477_DEFAULT_WRR_WEIGHT);</div><div class='add'>+</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Revert the queue mapping for TC-priority to its default setting on</div><div class='add'>+	 * the chip.</div><div class='add'>+	 */</div><div class='add'>+	return ksz9477_set_default_prio_queue_mapping(dev, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_tc_ets_validate(struct ksz_device *dev, int port,</div><div class='add'>+			       struct tc_ets_qopt_offload_replace_params *p)</div><div class='add'>+{</div><div class='add'>+	int band;</div><div class='add'>+</div><div class='add'>+	/* Since it is not feasible to share one port among multiple qdisc,</div><div class='add'>+	 * the user must configure all available queues appropriately.</div><div class='add'>+	 */</div><div class='add'>+	if (p-&gt;bands != dev-&gt;info-&gt;num_tx_queues) {</div><div class='add'>+		dev_err(dev-&gt;dev, "Not supported amount of bands. It should be %d\n",</div><div class='add'>+			dev-&gt;info-&gt;num_tx_queues);</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (band = 0; band &lt; p-&gt;bands; ++band) {</div><div class='add'>+		/* The KSZ switches utilize a weighted round robin configuration</div><div class='add'>+		 * where a certain number of packets can be transmitted from a</div><div class='add'>+		 * queue before the next queue is serviced. For more information</div><div class='add'>+		 * on this, refer to section 5.2.8.4 of the KSZ8565R</div><div class='add'>+		 * documentation on the Port Transmit Queue Control 1 Register.</div><div class='add'>+		 * However, the current ETS Qdisc implementation (as of February</div><div class='add'>+		 * 2023) assigns a weight to each queue based on the number of</div><div class='add'>+		 * bytes or extrapolated bandwidth in percentages. Since this</div><div class='add'>+		 * differs from the KSZ switches' method and we don't want to</div><div class='add'>+		 * fake support by converting bytes to packets, it is better to</div><div class='add'>+		 * return an error instead.</div><div class='add'>+		 */</div><div class='add'>+		if (p-&gt;quanta[band]) {</div><div class='add'>+			dev_err(dev-&gt;dev, "Quanta/weights configuration is not supported.\n");</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_tc_setup_qdisc_ets(struct dsa_switch *ds, int port,</div><div class='add'>+				  struct tc_ets_qopt_offload *qopt)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (is_ksz8(dev) &amp;&amp; !(ksz_is_ksz88x3(dev) || ksz_is_ksz8463(dev)))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (qopt-&gt;parent != TC_H_ROOT) {</div><div class='add'>+		dev_err(dev-&gt;dev, "Parent should be \"root\"\n");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (qopt-&gt;command) {</div><div class='add'>+	case TC_ETS_REPLACE:</div><div class='add'>+		ret = ksz_tc_ets_validate(dev, port, &amp;qopt-&gt;replace_params);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		if (ksz_is_ksz88x3(dev) || ksz_is_ksz8463(dev))</div><div class='add'>+			return ksz88x3_tc_ets_add(dev, port,</div><div class='add'>+						  &amp;qopt-&gt;replace_params);</div><div class='add'>+		else</div><div class='add'>+			return ksz_tc_ets_add(dev, port, &amp;qopt-&gt;replace_params);</div><div class='add'>+	case TC_ETS_DESTROY:</div><div class='add'>+		if (ksz_is_ksz88x3(dev) || ksz_is_ksz8463(dev))</div><div class='add'>+			return ksz88x3_tc_ets_del(dev, port);</div><div class='add'>+		else</div><div class='add'>+			return ksz_tc_ets_del(dev, port);</div><div class='add'>+	case TC_ETS_STATS:</div><div class='add'>+	case TC_ETS_GRAFT:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_setup_tc(struct dsa_switch *ds, int port,</div><div class='add'>+			enum tc_setup_type type, void *type_data)</div><div class='add'>+{</div><div class='add'>+	switch (type) {</div><div class='add'>+	case TC_SETUP_QDISC_CBS:</div><div class='add'>+		return ksz_setup_tc_cbs(ds, port, type_data);</div><div class='add'>+	case TC_SETUP_QDISC_ETS:</div><div class='add'>+		return ksz_tc_setup_qdisc_ets(ds, port, type_data);</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_handle_wake_reason - Handle wake reason on a specified port.</div><div class='add'>+ * @dev: The device structure.</div><div class='add'>+ * @port: The port number.</div><div class='add'>+ *</div><div class='add'>+ * This function reads the PME (Power Management Event) status register of a</div><div class='add'>+ * specified port to determine the wake reason. If there is no wake event, it</div><div class='add'>+ * returns early. Otherwise, it logs the wake reason which could be due to a</div><div class='add'>+ * "Magic Packet", "Link Up", or "Energy Detect" event. The PME status register</div><div class='add'>+ * is then cleared to acknowledge the handling of the wake event.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or an error code on failure.</div><div class='add'>+ */</div><div class='add'>+int ksz_handle_wake_reason(struct ksz_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	const struct ksz_dev_ops *ops = dev-&gt;dev_ops;</div><div class='add'>+	const u16 *regs = dev-&gt;info-&gt;regs;</div><div class='add'>+	u8 pme_status;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = ops-&gt;pme_pread8(dev, port, regs[REG_PORT_PME_STATUS],</div><div class='add'>+			      &amp;pme_status);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (!pme_status)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	dev_dbg(dev-&gt;dev, "Wake event on port %d due to:%s%s%s\n", port,</div><div class='add'>+		pme_status &amp; PME_WOL_MAGICPKT ? " \"Magic Packet\"" : "",</div><div class='add'>+		pme_status &amp; PME_WOL_LINKUP ? " \"Link Up\"" : "",</div><div class='add'>+		pme_status &amp; PME_WOL_ENERGY ? " \"Energy detect\"" : "");</div><div class='add'>+</div><div class='add'>+	return ops-&gt;pme_pwrite8(dev, port, regs[REG_PORT_PME_STATUS],</div><div class='add'>+				pme_status);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_get_wol - Get Wake-on-LAN settings for a specified port.</div><div class='add'>+ * @ds: The dsa_switch structure.</div><div class='add'>+ * @port: The port number.</div><div class='add'>+ * @wol: Pointer to ethtool Wake-on-LAN settings structure.</div><div class='add'>+ *</div><div class='add'>+ * This function checks the device PME wakeup_source flag and chip_id.</div><div class='add'>+ * If enabled and supported, it sets the supported and active WoL</div><div class='add'>+ * flags.</div><div class='add'>+ */</div><div class='add'>+static void ksz_get_wol(struct dsa_switch *ds, int port,</div><div class='add'>+			struct ethtool_wolinfo *wol)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	const u16 *regs = dev-&gt;info-&gt;regs;</div><div class='add'>+	u8 pme_ctrl;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!is_ksz9477(dev) &amp;&amp; !ksz_is_ksz87xx(dev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!dev-&gt;wakeup_source)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	wol-&gt;supported = WAKE_PHY;</div><div class='add'>+</div><div class='add'>+	/* Check if the current MAC address on this port can be set</div><div class='add'>+	 * as global for WAKE_MAGIC support. The result may vary</div><div class='add'>+	 * dynamically based on other ports configurations.</div><div class='add'>+	 */</div><div class='add'>+	if (ksz_is_port_mac_global_usable(dev-&gt;ds, port))</div><div class='add'>+		wol-&gt;supported |= WAKE_MAGIC;</div><div class='add'>+</div><div class='add'>+	ret = dev-&gt;dev_ops-&gt;pme_pread8(dev, port, regs[REG_PORT_PME_CTRL],</div><div class='add'>+				       &amp;pme_ctrl);</div><div class='add'>+	if (ret)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (pme_ctrl &amp; PME_WOL_MAGICPKT)</div><div class='add'>+		wol-&gt;wolopts |= WAKE_MAGIC;</div><div class='add'>+	if (pme_ctrl &amp; (PME_WOL_LINKUP | PME_WOL_ENERGY))</div><div class='add'>+		wol-&gt;wolopts |= WAKE_PHY;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_set_wol - Set Wake-on-LAN settings for a specified port.</div><div class='add'>+ * @ds: The dsa_switch structure.</div><div class='add'>+ * @port: The port number.</div><div class='add'>+ * @wol: Pointer to ethtool Wake-on-LAN settings structure.</div><div class='add'>+ *</div><div class='add'>+ * This function configures Wake-on-LAN (WoL) settings for a specified</div><div class='add'>+ * port. It validates the provided WoL options, checks if PME is</div><div class='add'>+ * enabled and supported, clears any previous wake reasons, and sets</div><div class='add'>+ * the Magic Packet flag in the port's PME control register if</div><div class='add'>+ * specified.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or other error codes on failure.</div><div class='add'>+ */</div><div class='add'>+static int ksz_set_wol(struct dsa_switch *ds, int port,</div><div class='add'>+		       struct ethtool_wolinfo *wol)</div><div class='add'>+{</div><div class='add'>+	u8 pme_ctrl = 0, pme_ctrl_old = 0;</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	const u16 *regs = dev-&gt;info-&gt;regs;</div><div class='add'>+	bool magic_switched_off;</div><div class='add'>+	bool magic_switched_on;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (wol-&gt;wolopts &amp; ~(WAKE_PHY | WAKE_MAGIC))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!is_ksz9477(dev) &amp;&amp; !ksz_is_ksz87xx(dev))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (!dev-&gt;wakeup_source)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	ret = ksz_handle_wake_reason(dev, port);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (wol-&gt;wolopts &amp; WAKE_MAGIC)</div><div class='add'>+		pme_ctrl |= PME_WOL_MAGICPKT;</div><div class='add'>+	if (wol-&gt;wolopts &amp; WAKE_PHY)</div><div class='add'>+		pme_ctrl |= PME_WOL_LINKUP | PME_WOL_ENERGY;</div><div class='add'>+</div><div class='add'>+	ret = dev-&gt;dev_ops-&gt;pme_pread8(dev, port, regs[REG_PORT_PME_CTRL],</div><div class='add'>+				       &amp;pme_ctrl_old);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (pme_ctrl_old == pme_ctrl)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	magic_switched_off = (pme_ctrl_old &amp; PME_WOL_MAGICPKT) &amp;&amp;</div><div class='add'>+			    !(pme_ctrl &amp; PME_WOL_MAGICPKT);</div><div class='add'>+	magic_switched_on = !(pme_ctrl_old &amp; PME_WOL_MAGICPKT) &amp;&amp;</div><div class='add'>+			    (pme_ctrl &amp; PME_WOL_MAGICPKT);</div><div class='add'>+</div><div class='add'>+	/* To keep reference count of MAC address, we should do this</div><div class='add'>+	 * operation only on change of WOL settings.</div><div class='add'>+	 */</div><div class='add'>+	if (magic_switched_on) {</div><div class='add'>+		ret = ksz_switch_macaddr_get(dev-&gt;ds, port, NULL);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	} else if (magic_switched_off) {</div><div class='add'>+		ksz_switch_macaddr_put(dev-&gt;ds);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = dev-&gt;dev_ops-&gt;pme_pwrite8(dev, port, regs[REG_PORT_PME_CTRL],</div><div class='add'>+					pme_ctrl);</div><div class='add'>+	if (ret) {</div><div class='add'>+		if (magic_switched_on)</div><div class='add'>+			ksz_switch_macaddr_put(dev-&gt;ds);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_wol_pre_shutdown - Prepares the switch device for shutdown while</div><div class='add'>+ *                        considering Wake-on-LAN (WoL) settings.</div><div class='add'>+ * @dev: The switch device structure.</div><div class='add'>+ * @wol_enabled: Pointer to a boolean which will be set to true if WoL is</div><div class='add'>+ *               enabled on any port.</div><div class='add'>+ *</div><div class='add'>+ * This function prepares the switch device for a safe shutdown while taking</div><div class='add'>+ * into account the Wake-on-LAN (WoL) settings on the user ports. It updates</div><div class='add'>+ * the wol_enabled flag accordingly to reflect whether WoL is active on any</div><div class='add'>+ * port.</div><div class='add'>+ */</div><div class='add'>+static void ksz_wol_pre_shutdown(struct ksz_device *dev, bool *wol_enabled)</div><div class='add'>+{</div><div class='add'>+	const struct ksz_dev_ops *ops = dev-&gt;dev_ops;</div><div class='add'>+	const u16 *regs = dev-&gt;info-&gt;regs;</div><div class='add'>+	u8 pme_pin_en = PME_ENABLE;</div><div class='add'>+	struct dsa_port *dp;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	*wol_enabled = false;</div><div class='add'>+</div><div class='add'>+	if (!is_ksz9477(dev) &amp;&amp; !ksz_is_ksz87xx(dev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!dev-&gt;wakeup_source)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dsa_switch_for_each_user_port(dp, dev-&gt;ds) {</div><div class='add'>+		u8 pme_ctrl = 0;</div><div class='add'>+</div><div class='add'>+		ret = ops-&gt;pme_pread8(dev, dp-&gt;index,</div><div class='add'>+				      regs[REG_PORT_PME_CTRL], &amp;pme_ctrl);</div><div class='add'>+		if (!ret &amp;&amp; pme_ctrl)</div><div class='add'>+			*wol_enabled = true;</div><div class='add'>+</div><div class='add'>+		/* make sure there are no pending wake events which would</div><div class='add'>+		 * prevent the device from going to sleep/shutdown.</div><div class='add'>+		 */</div><div class='add'>+		ksz_handle_wake_reason(dev, dp-&gt;index);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Now we are save to enable PME pin. */</div><div class='add'>+	if (*wol_enabled) {</div><div class='add'>+		if (dev-&gt;pme_active_high)</div><div class='add'>+			pme_pin_en |= PME_POLARITY;</div><div class='add'>+		ops-&gt;pme_write8(dev, regs[REG_SW_PME_CTRL], pme_pin_en);</div><div class='add'>+		if (ksz_is_ksz87xx(dev))</div><div class='add'>+			ksz_write8(dev, KSZ87XX_REG_INT_EN, KSZ87XX_INT_PME_MASK);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_port_set_mac_address(struct dsa_switch *ds, int port,</div><div class='add'>+				    const unsigned char *addr)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(ds, port);</div><div class='add'>+	struct ethtool_wolinfo wol;</div><div class='add'>+</div><div class='add'>+	if (dp-&gt;hsr_dev) {</div><div class='add'>+		dev_err(ds-&gt;dev,</div><div class='add'>+			"Cannot change MAC address on port %d with active HSR offload\n",</div><div class='add'>+			port);</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Need to initialize variable as the code to fill in settings may</div><div class='add'>+	 * not be executed.</div><div class='add'>+	 */</div><div class='add'>+	wol.wolopts = 0;</div><div class='add'>+</div><div class='add'>+	ksz_get_wol(ds, dp-&gt;index, &amp;wol);</div><div class='add'>+	if (wol.wolopts &amp; WAKE_MAGIC) {</div><div class='add'>+		dev_err(ds-&gt;dev,</div><div class='add'>+			"Cannot change MAC address on port %d with active Wake on Magic Packet\n",</div><div class='add'>+			port);</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_is_port_mac_global_usable - Check if the MAC address on a given port</div><div class='add'>+ *                                 can be used as a global address.</div><div class='add'>+ * @ds: Pointer to the DSA switch structure.</div><div class='add'>+ * @port: The port number on which the MAC address is to be checked.</div><div class='add'>+ *</div><div class='add'>+ * This function examines the MAC address set on the specified port and</div><div class='add'>+ * determines if it can be used as a global address for the switch.</div><div class='add'>+ *</div><div class='add'>+ * Return: true if the port's MAC address can be used as a global address, false</div><div class='add'>+ * otherwise.</div><div class='add'>+ */</div><div class='add'>+bool ksz_is_port_mac_global_usable(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct net_device *user = dsa_to_port(ds, port)-&gt;user;</div><div class='add'>+	const unsigned char *addr = user-&gt;dev_addr;</div><div class='add'>+	struct ksz_switch_macaddr *switch_macaddr;</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	ASSERT_RTNL();</div><div class='add'>+</div><div class='add'>+	switch_macaddr = dev-&gt;switch_macaddr;</div><div class='add'>+	if (switch_macaddr &amp;&amp; !ether_addr_equal(switch_macaddr-&gt;addr, addr))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_switch_macaddr_get - Program the switch's MAC address register.</div><div class='add'>+ * @ds: DSA switch instance.</div><div class='add'>+ * @port: Port number.</div><div class='add'>+ * @extack: Netlink extended acknowledgment.</div><div class='add'>+ *</div><div class='add'>+ * This function programs the switch's MAC address register with the MAC address</div><div class='add'>+ * of the requesting user port. This single address is used by the switch for</div><div class='add'>+ * multiple features like HSR self-address filtering and WoL. Other user ports</div><div class='add'>+ * can share ownership of this address as long as their MAC address is the same.</div><div class='add'>+ * The MAC addresses of user ports must not change while they have ownership of</div><div class='add'>+ * the switch MAC address.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or other error codes on failure.</div><div class='add'>+ */</div><div class='add'>+int ksz_switch_macaddr_get(struct dsa_switch *ds, int port,</div><div class='add'>+			   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct net_device *user = dsa_to_port(ds, port)-&gt;user;</div><div class='add'>+	const unsigned char *addr = user-&gt;dev_addr;</div><div class='add'>+	struct ksz_switch_macaddr *switch_macaddr;</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	const u16 *regs = dev-&gt;info-&gt;regs;</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	/* Make sure concurrent MAC address changes are blocked */</div><div class='add'>+	ASSERT_RTNL();</div><div class='add'>+</div><div class='add'>+	switch_macaddr = dev-&gt;switch_macaddr;</div><div class='add'>+	if (switch_macaddr) {</div><div class='add'>+		if (!ether_addr_equal(switch_macaddr-&gt;addr, addr)) {</div><div class='add'>+			NL_SET_ERR_MSG_FMT_MOD(extack,</div><div class='add'>+					       "Switch already configured for MAC address %pM",</div><div class='add'>+					       switch_macaddr-&gt;addr);</div><div class='add'>+			return -EBUSY;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		refcount_inc(&amp;switch_macaddr-&gt;refcount);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch_macaddr = kzalloc(sizeof(*switch_macaddr), GFP_KERNEL);</div><div class='add'>+	if (!switch_macaddr)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ether_addr_copy(switch_macaddr-&gt;addr, addr);</div><div class='add'>+	refcount_set(&amp;switch_macaddr-&gt;refcount, 1);</div><div class='add'>+	dev-&gt;switch_macaddr = switch_macaddr;</div><div class='add'>+</div><div class='add'>+	/* Program the switch MAC address to hardware */</div><div class='add'>+	for (i = 0; i &lt; ETH_ALEN; i++) {</div><div class='add'>+		if (ksz_is_ksz8463(dev)) {</div><div class='add'>+			u16 addr16 = ((u16)addr[i] &lt;&lt; 8) | addr[i + 1];</div><div class='add'>+</div><div class='add'>+			ret = ksz_write16(dev, regs[REG_SW_MAC_ADDR] + i,</div><div class='add'>+					  addr16);</div><div class='add'>+			i++;</div><div class='add'>+		} else {</div><div class='add'>+			ret = ksz_write8(dev, regs[REG_SW_MAC_ADDR] + i,</div><div class='add'>+					 addr[i]);</div><div class='add'>+		}</div><div class='add'>+		if (ret)</div><div class='add'>+			goto macaddr_drop;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+macaddr_drop:</div><div class='add'>+	dev-&gt;switch_macaddr = NULL;</div><div class='add'>+	refcount_set(&amp;switch_macaddr-&gt;refcount, 0);</div><div class='add'>+	kfree(switch_macaddr);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ksz_switch_macaddr_put(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct ksz_switch_macaddr *switch_macaddr;</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	const u16 *regs = dev-&gt;info-&gt;regs;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Make sure concurrent MAC address changes are blocked */</div><div class='add'>+	ASSERT_RTNL();</div><div class='add'>+</div><div class='add'>+	switch_macaddr = dev-&gt;switch_macaddr;</div><div class='add'>+	if (!refcount_dec_and_test(&amp;switch_macaddr-&gt;refcount))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ETH_ALEN; i++)</div><div class='add'>+		ksz_write8(dev, regs[REG_SW_MAC_ADDR] + i, 0);</div><div class='add'>+</div><div class='add'>+	dev-&gt;switch_macaddr = NULL;</div><div class='add'>+	kfree(switch_macaddr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_hsr_join(struct dsa_switch *ds, int port, struct net_device *hsr,</div><div class='add'>+			struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	enum hsr_version ver;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = hsr_get_version(hsr, &amp;ver);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;chip_id != KSZ9477_CHIP_ID) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Chip does not support HSR offload");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* KSZ9477 can support HW offloading of only 1 HSR device */</div><div class='add'>+	if (dev-&gt;hsr_dev &amp;&amp; hsr != dev-&gt;hsr_dev) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Offload supported for a single HSR");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* KSZ9477 only supports HSR v0 and v1 */</div><div class='add'>+	if (!(ver == HSR_V0 || ver == HSR_V1)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Only HSR v0 and v1 supported");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* KSZ9477 can only perform HSR offloading for up to two ports */</div><div class='add'>+	if (hweight8(dev-&gt;hsr_ports) &gt;= 2) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Cannot offload more than two ports - using software HSR");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Self MAC address filtering, to avoid frames traversing</div><div class='add'>+	 * the HSR ring more than once.</div><div class='add'>+	 */</div><div class='add'>+	ret = ksz_switch_macaddr_get(ds, port, extack);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ksz9477_hsr_join(ds, port, hsr);</div><div class='add'>+	dev-&gt;hsr_dev = hsr;</div><div class='add'>+	dev-&gt;hsr_ports |= BIT(port);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_hsr_leave(struct dsa_switch *ds, int port,</div><div class='add'>+			 struct net_device *hsr)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	WARN_ON(dev-&gt;chip_id != KSZ9477_CHIP_ID);</div><div class='add'>+</div><div class='add'>+	ksz9477_hsr_leave(ds, port, hsr);</div><div class='add'>+	dev-&gt;hsr_ports &amp;= ~BIT(port);</div><div class='add'>+	if (!dev-&gt;hsr_ports)</div><div class='add'>+		dev-&gt;hsr_dev = NULL;</div><div class='add'>+</div><div class='add'>+	ksz_switch_macaddr_put(ds);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_suspend(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	cancel_delayed_work_sync(&amp;dev-&gt;mib_read);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_resume(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;mib_read_interval)</div><div class='add'>+		schedule_delayed_work(&amp;dev-&gt;mib_read, dev-&gt;mib_read_interval);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct dsa_switch_ops ksz_switch_ops = {</div><div class='add'>+	.get_tag_protocol	= ksz_get_tag_protocol,</div><div class='add'>+	.connect_tag_protocol   = ksz_connect_tag_protocol,</div><div class='add'>+	.get_phy_flags		= ksz_get_phy_flags,</div><div class='add'>+	.setup			= ksz_setup,</div><div class='add'>+	.teardown		= ksz_teardown,</div><div class='add'>+	.phy_read		= ksz_phy_read16,</div><div class='add'>+	.phy_write		= ksz_phy_write16,</div><div class='add'>+	.phylink_get_caps	= ksz_phylink_get_caps,</div><div class='add'>+	.port_setup		= ksz_port_setup,</div><div class='add'>+	.set_ageing_time	= ksz_set_ageing_time,</div><div class='add'>+	.get_strings		= ksz_get_strings,</div><div class='add'>+	.get_ethtool_stats	= ksz_get_ethtool_stats,</div><div class='add'>+	.get_sset_count		= ksz_sset_count,</div><div class='add'>+	.port_bridge_join	= ksz_port_bridge_join,</div><div class='add'>+	.port_bridge_leave	= ksz_port_bridge_leave,</div><div class='add'>+	.port_hsr_join		= ksz_hsr_join,</div><div class='add'>+	.port_hsr_leave		= ksz_hsr_leave,</div><div class='add'>+	.port_set_mac_address	= ksz_port_set_mac_address,</div><div class='add'>+	.port_stp_state_set	= ksz_port_stp_state_set,</div><div class='add'>+	.port_teardown		= ksz_port_teardown,</div><div class='add'>+	.port_pre_bridge_flags	= ksz_port_pre_bridge_flags,</div><div class='add'>+	.port_bridge_flags	= ksz_port_bridge_flags,</div><div class='add'>+	.port_fast_age		= ksz_port_fast_age,</div><div class='add'>+	.port_vlan_filtering	= ksz_port_vlan_filtering,</div><div class='add'>+	.port_vlan_add		= ksz_port_vlan_add,</div><div class='add'>+	.port_vlan_del		= ksz_port_vlan_del,</div><div class='add'>+	.port_fdb_dump		= ksz_port_fdb_dump,</div><div class='add'>+	.port_fdb_add		= ksz_port_fdb_add,</div><div class='add'>+	.port_fdb_del		= ksz_port_fdb_del,</div><div class='add'>+	.port_mdb_add           = ksz_port_mdb_add,</div><div class='add'>+	.port_mdb_del           = ksz_port_mdb_del,</div><div class='add'>+	.port_mirror_add	= ksz_port_mirror_add,</div><div class='add'>+	.port_mirror_del	= ksz_port_mirror_del,</div><div class='add'>+	.get_stats64		= ksz_get_stats64,</div><div class='add'>+	.get_pause_stats	= ksz_get_pause_stats,</div><div class='add'>+	.port_change_mtu	= ksz_change_mtu,</div><div class='add'>+	.port_max_mtu		= ksz_max_mtu,</div><div class='add'>+	.get_wol		= ksz_get_wol,</div><div class='add'>+	.set_wol		= ksz_set_wol,</div><div class='add'>+	.suspend		= ksz_suspend,</div><div class='add'>+	.resume			= ksz_resume,</div><div class='add'>+	.get_ts_info		= ksz_get_ts_info,</div><div class='add'>+	.port_hwtstamp_get	= ksz_hwtstamp_get,</div><div class='add'>+	.port_hwtstamp_set	= ksz_hwtstamp_set,</div><div class='add'>+	.port_txtstamp		= ksz_port_txtstamp,</div><div class='add'>+	.port_rxtstamp		= ksz_port_rxtstamp,</div><div class='add'>+	.cls_flower_add		= ksz_cls_flower_add,</div><div class='add'>+	.cls_flower_del		= ksz_cls_flower_del,</div><div class='add'>+	.port_setup_tc		= ksz_setup_tc,</div><div class='add'>+	.support_eee		= ksz_support_eee,</div><div class='add'>+	.set_mac_eee		= ksz_set_mac_eee,</div><div class='add'>+	.port_get_default_prio	= ksz_port_get_default_prio,</div><div class='add'>+	.port_set_default_prio	= ksz_port_set_default_prio,</div><div class='add'>+	.port_get_dscp_prio	= ksz_port_get_dscp_prio,</div><div class='add'>+	.port_add_dscp_prio	= ksz_port_add_dscp_prio,</div><div class='add'>+	.port_del_dscp_prio	= ksz_port_del_dscp_prio,</div><div class='add'>+	.port_get_apptrust	= ksz_port_get_apptrust,</div><div class='add'>+	.port_set_apptrust	= ksz_port_set_apptrust,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ksz_device *ksz_switch_alloc(struct device *base, void *priv)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds;</div><div class='add'>+	struct ksz_device *swdev;</div><div class='add'>+</div><div class='add'>+	ds = devm_kzalloc(base, sizeof(*ds), GFP_KERNEL);</div><div class='add'>+	if (!ds)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	ds-&gt;dev = base;</div><div class='add'>+	ds-&gt;num_ports = DSA_MAX_PORTS;</div><div class='add'>+	ds-&gt;ops = &amp;ksz_switch_ops;</div><div class='add'>+</div><div class='add'>+	swdev = devm_kzalloc(base, sizeof(*swdev), GFP_KERNEL);</div><div class='add'>+	if (!swdev)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	ds-&gt;priv = swdev;</div><div class='add'>+	swdev-&gt;dev = base;</div><div class='add'>+</div><div class='add'>+	swdev-&gt;ds = ds;</div><div class='add'>+	swdev-&gt;priv = priv;</div><div class='add'>+</div><div class='add'>+	return swdev;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(ksz_switch_alloc);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_switch_shutdown - Shutdown routine for the switch device.</div><div class='add'>+ * @dev: The switch device structure.</div><div class='add'>+ *</div><div class='add'>+ * This function is responsible for initiating a shutdown sequence for the</div><div class='add'>+ * switch device. It invokes the reset operation defined in the device</div><div class='add'>+ * operations, if available, to reset the switch. Subsequently, it calls the</div><div class='add'>+ * DSA framework's shutdown function to ensure a proper shutdown of the DSA</div><div class='add'>+ * switch.</div><div class='add'>+ */</div><div class='add'>+void ksz_switch_shutdown(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	bool wol_enabled = false;</div><div class='add'>+</div><div class='add'>+	ksz_wol_pre_shutdown(dev, &amp;wol_enabled);</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;dev_ops-&gt;reset &amp;&amp; !wol_enabled)</div><div class='add'>+		dev-&gt;dev_ops-&gt;reset(dev);</div><div class='add'>+</div><div class='add'>+	dsa_switch_shutdown(dev-&gt;ds);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(ksz_switch_shutdown);</div><div class='add'>+</div><div class='add'>+static void ksz_parse_rgmii_delay(struct ksz_device *dev, int port_num,</div><div class='add'>+				  struct device_node *port_dn)</div><div class='add'>+{</div><div class='add'>+	phy_interface_t phy_mode = dev-&gt;ports[port_num].interface;</div><div class='add'>+	int rx_delay = -1, tx_delay = -1;</div><div class='add'>+</div><div class='add'>+	if (!phy_interface_mode_is_rgmii(phy_mode))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	of_property_read_u32(port_dn, "rx-internal-delay-ps", &amp;rx_delay);</div><div class='add'>+	of_property_read_u32(port_dn, "tx-internal-delay-ps", &amp;tx_delay);</div><div class='add'>+</div><div class='add'>+	if (rx_delay == -1 &amp;&amp; tx_delay == -1) {</div><div class='add'>+		dev_warn(dev-&gt;dev,</div><div class='add'>+			 "Port %d interpreting RGMII delay settings based on \"phy-mode\" property, "</div><div class='add'>+			 "please update device tree to specify \"rx-internal-delay-ps\" and "</div><div class='add'>+			 "\"tx-internal-delay-ps\"",</div><div class='add'>+			 port_num);</div><div class='add'>+</div><div class='add'>+		if (phy_mode == PHY_INTERFACE_MODE_RGMII_RXID ||</div><div class='add'>+		    phy_mode == PHY_INTERFACE_MODE_RGMII_ID)</div><div class='add'>+			rx_delay = 2000;</div><div class='add'>+</div><div class='add'>+		if (phy_mode == PHY_INTERFACE_MODE_RGMII_TXID ||</div><div class='add'>+		    phy_mode == PHY_INTERFACE_MODE_RGMII_ID)</div><div class='add'>+			tx_delay = 2000;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rx_delay &lt; 0)</div><div class='add'>+		rx_delay = 0;</div><div class='add'>+	if (tx_delay &lt; 0)</div><div class='add'>+		tx_delay = 0;</div><div class='add'>+</div><div class='add'>+	dev-&gt;ports[port_num].rgmii_rx_val = rx_delay;</div><div class='add'>+	dev-&gt;ports[port_num].rgmii_tx_val = tx_delay;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_drive_strength_to_reg() - Convert drive strength value to corresponding</div><div class='add'>+ *				 register value.</div><div class='add'>+ * @array:	The array of drive strength values to search.</div><div class='add'>+ * @array_size:	The size of the array.</div><div class='add'>+ * @microamp:	The drive strength value in microamp to be converted.</div><div class='add'>+ *</div><div class='add'>+ * This function searches the array of drive strength values for the given</div><div class='add'>+ * microamp value and returns the corresponding register value for that drive.</div><div class='add'>+ *</div><div class='add'>+ * Returns: If found, the corresponding register value for that drive strength</div><div class='add'>+ * is returned. Otherwise, -EINVAL is returned indicating an invalid value.</div><div class='add'>+ */</div><div class='add'>+static int ksz_drive_strength_to_reg(const struct ksz_drive_strength *array,</div><div class='add'>+				     size_t array_size, int microamp)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; array_size; i++) {</div><div class='add'>+		if (array[i].microamp == microamp)</div><div class='add'>+			return array[i].reg_val;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_drive_strength_error() - Report invalid drive strength value</div><div class='add'>+ * @dev:	ksz device</div><div class='add'>+ * @array:	The array of drive strength values to search.</div><div class='add'>+ * @array_size:	The size of the array.</div><div class='add'>+ * @microamp:	Invalid drive strength value in microamp</div><div class='add'>+ *</div><div class='add'>+ * This function logs an error message when an unsupported drive strength value</div><div class='add'>+ * is detected. It lists out all the supported drive strength values for</div><div class='add'>+ * reference in the error message.</div><div class='add'>+ */</div><div class='add'>+static void ksz_drive_strength_error(struct ksz_device *dev,</div><div class='add'>+				     const struct ksz_drive_strength *array,</div><div class='add'>+				     size_t array_size, int microamp)</div><div class='add'>+{</div><div class='add'>+	char supported_values[100];</div><div class='add'>+	size_t remaining_size;</div><div class='add'>+	int added_len;</div><div class='add'>+	char *ptr;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	remaining_size = sizeof(supported_values);</div><div class='add'>+	ptr = supported_values;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; array_size; i++) {</div><div class='add'>+		added_len = snprintf(ptr, remaining_size,</div><div class='add'>+				     i == 0 ? "%d" : ", %d", array[i].microamp);</div><div class='add'>+</div><div class='add'>+		if (added_len &gt;= remaining_size)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		ptr += added_len;</div><div class='add'>+		remaining_size -= added_len;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_err(dev-&gt;dev, "Invalid drive strength %d, supported values are %s\n",</div><div class='add'>+		microamp, supported_values);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz9477_drive_strength_write() - Set the drive strength for specific KSZ9477</div><div class='add'>+ *				    chip variants.</div><div class='add'>+ * @dev:       ksz device</div><div class='add'>+ * @props:     Array of drive strength properties to be applied</div><div class='add'>+ * @num_props: Number of properties in the array</div><div class='add'>+ *</div><div class='add'>+ * This function configures the drive strength for various KSZ9477 chip variants</div><div class='add'>+ * based on the provided properties. It handles chip-specific nuances and</div><div class='add'>+ * ensures only valid drive strengths are written to the respective chip.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on successful configuration, a negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int ksz9477_drive_strength_write(struct ksz_device *dev,</div><div class='add'>+					struct ksz_driver_strength_prop *props,</div><div class='add'>+					int num_props)</div><div class='add'>+{</div><div class='add'>+	size_t array_size = ARRAY_SIZE(ksz9477_drive_strengths);</div><div class='add'>+	int i, ret, reg;</div><div class='add'>+	u8 mask = 0;</div><div class='add'>+	u8 val = 0;</div><div class='add'>+</div><div class='add'>+	if (props[KSZ_DRIVER_STRENGTH_IO].value != -1)</div><div class='add'>+		dev_warn(dev-&gt;dev, "%s is not supported by this chip variant\n",</div><div class='add'>+			 props[KSZ_DRIVER_STRENGTH_IO].name);</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;chip_id == KSZ8795_CHIP_ID ||</div><div class='add'>+	    dev-&gt;chip_id == KSZ8794_CHIP_ID ||</div><div class='add'>+	    dev-&gt;chip_id == KSZ8765_CHIP_ID)</div><div class='add'>+		reg = KSZ8795_REG_SW_CTRL_20;</div><div class='add'>+	else</div><div class='add'>+		reg = KSZ9477_REG_SW_IO_STRENGTH;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_props; i++) {</div><div class='add'>+		if (props[i].value == -1)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		ret = ksz_drive_strength_to_reg(ksz9477_drive_strengths,</div><div class='add'>+						array_size, props[i].value);</div><div class='add'>+		if (ret &lt; 0) {</div><div class='add'>+			ksz_drive_strength_error(dev, ksz9477_drive_strengths,</div><div class='add'>+						 array_size, props[i].value);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		mask |= SW_DRIVE_STRENGTH_M &lt;&lt; props[i].offset;</div><div class='add'>+		val |= ret &lt;&lt; props[i].offset;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ksz_rmw8(dev, reg, mask, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz88x3_drive_strength_write() - Set the drive strength configuration for</div><div class='add'>+ *				    KSZ8863 compatible chip variants.</div><div class='add'>+ * @dev:       ksz device</div><div class='add'>+ * @props:     Array of drive strength properties to be set</div><div class='add'>+ * @num_props: Number of properties in the array</div><div class='add'>+ *</div><div class='add'>+ * This function applies the specified drive strength settings to KSZ88X3 chip</div><div class='add'>+ * variants (KSZ8873, KSZ8863).</div><div class='add'>+ * It ensures the configurations align with what the chip variant supports and</div><div class='add'>+ * warns or errors out on unsupported settings.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, error code otherwise</div><div class='add'>+ */</div><div class='add'>+static int ksz88x3_drive_strength_write(struct ksz_device *dev,</div><div class='add'>+					struct ksz_driver_strength_prop *props,</div><div class='add'>+					int num_props)</div><div class='add'>+{</div><div class='add'>+	size_t array_size = ARRAY_SIZE(ksz88x3_drive_strengths);</div><div class='add'>+	int microamp;</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_props; i++) {</div><div class='add'>+		if (props[i].value == -1 || i == KSZ_DRIVER_STRENGTH_IO)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		dev_warn(dev-&gt;dev, "%s is not supported by this chip variant\n",</div><div class='add'>+			 props[i].name);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	microamp = props[KSZ_DRIVER_STRENGTH_IO].value;</div><div class='add'>+	ret = ksz_drive_strength_to_reg(ksz88x3_drive_strengths, array_size,</div><div class='add'>+					microamp);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		ksz_drive_strength_error(dev, ksz88x3_drive_strengths,</div><div class='add'>+					 array_size, microamp);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ksz_rmw8(dev, KSZ8873_REG_GLOBAL_CTRL_12,</div><div class='add'>+			KSZ8873_DRIVE_STRENGTH_16MA, ret);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_parse_drive_strength() - Extract and apply drive strength configurations</div><div class='add'>+ *				from device tree properties.</div><div class='add'>+ * @dev:	ksz device</div><div class='add'>+ *</div><div class='add'>+ * This function reads the specified drive strength properties from the</div><div class='add'>+ * device tree, validates against the supported chip variants, and sets</div><div class='add'>+ * them accordingly. An error should be critical here, as the drive strength</div><div class='add'>+ * settings are crucial for EMI compliance.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, error code otherwise</div><div class='add'>+ */</div><div class='add'>+static int ksz_parse_drive_strength(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ksz_driver_strength_prop of_props[] = {</div><div class='add'>+		[KSZ_DRIVER_STRENGTH_HI] = {</div><div class='add'>+			.name = "microchip,hi-drive-strength-microamp",</div><div class='add'>+			.offset = SW_HI_SPEED_DRIVE_STRENGTH_S,</div><div class='add'>+			.value = -1,</div><div class='add'>+		},</div><div class='add'>+		[KSZ_DRIVER_STRENGTH_LO] = {</div><div class='add'>+			.name = "microchip,lo-drive-strength-microamp",</div><div class='add'>+			.offset = SW_LO_SPEED_DRIVE_STRENGTH_S,</div><div class='add'>+			.value = -1,</div><div class='add'>+		},</div><div class='add'>+		[KSZ_DRIVER_STRENGTH_IO] = {</div><div class='add'>+			.name = "microchip,io-drive-strength-microamp",</div><div class='add'>+			.offset = 0, /* don't care */</div><div class='add'>+			.value = -1,</div><div class='add'>+		},</div><div class='add'>+	};</div><div class='add'>+	struct device_node *np = dev-&gt;dev-&gt;of_node;</div><div class='add'>+	bool have_any_prop = false;</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(of_props); i++) {</div><div class='add'>+		ret = of_property_read_u32(np, of_props[i].name,</div><div class='add'>+					   &amp;of_props[i].value);</div><div class='add'>+		if (ret &amp;&amp; ret != -EINVAL)</div><div class='add'>+			dev_warn(dev-&gt;dev, "Failed to read %s\n",</div><div class='add'>+				 of_props[i].name);</div><div class='add'>+		if (ret)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		have_any_prop = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!have_any_prop)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	switch (dev-&gt;chip_id) {</div><div class='add'>+	case KSZ88X3_CHIP_ID:</div><div class='add'>+		return ksz88x3_drive_strength_write(dev, of_props,</div><div class='add'>+						    ARRAY_SIZE(of_props));</div><div class='add'>+	case KSZ8795_CHIP_ID:</div><div class='add'>+	case KSZ8794_CHIP_ID:</div><div class='add'>+	case KSZ8765_CHIP_ID:</div><div class='add'>+	case KSZ8563_CHIP_ID:</div><div class='add'>+	case KSZ8567_CHIP_ID:</div><div class='add'>+	case KSZ9477_CHIP_ID:</div><div class='add'>+	case KSZ9563_CHIP_ID:</div><div class='add'>+	case KSZ9567_CHIP_ID:</div><div class='add'>+	case KSZ9893_CHIP_ID:</div><div class='add'>+	case KSZ9896_CHIP_ID:</div><div class='add'>+	case KSZ9897_CHIP_ID:</div><div class='add'>+	case LAN9646_CHIP_ID:</div><div class='add'>+		return ksz9477_drive_strength_write(dev, of_props,</div><div class='add'>+						    ARRAY_SIZE(of_props));</div><div class='add'>+	default:</div><div class='add'>+		for (i = 0; i &lt; ARRAY_SIZE(of_props); i++) {</div><div class='add'>+			if (of_props[i].value == -1)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			dev_warn(dev-&gt;dev, "%s is not supported by this chip variant\n",</div><div class='add'>+				 of_props[i].name);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz8463_configure_straps_spi(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct pinctrl *pinctrl;</div><div class='add'>+	struct gpio_desc *rxd0;</div><div class='add'>+	struct gpio_desc *rxd1;</div><div class='add'>+</div><div class='add'>+	rxd0 = devm_gpiod_get_index_optional(dev-&gt;dev, "straps-rxd", 0, GPIOD_OUT_LOW);</div><div class='add'>+	if (IS_ERR(rxd0))</div><div class='add'>+		return PTR_ERR(rxd0);</div><div class='add'>+</div><div class='add'>+	rxd1 = devm_gpiod_get_index_optional(dev-&gt;dev, "straps-rxd", 1, GPIOD_OUT_HIGH);</div><div class='add'>+	if (IS_ERR(rxd1))</div><div class='add'>+		return PTR_ERR(rxd1);</div><div class='add'>+</div><div class='add'>+	if (!rxd0 &amp;&amp; !rxd1)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if ((rxd0 &amp;&amp; !rxd1) || (rxd1 &amp;&amp; !rxd0))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	pinctrl = devm_pinctrl_get_select(dev-&gt;dev, "reset");</div><div class='add'>+	if (IS_ERR(pinctrl))</div><div class='add'>+		return PTR_ERR(pinctrl);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz8463_release_straps_spi(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	return pinctrl_select_default_state(dev-&gt;dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz_switch_register(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	const struct ksz_chip_data *info;</div><div class='add'>+	struct device_node *ports;</div><div class='add'>+	phy_interface_t interface;</div><div class='add'>+	unsigned int port_num;</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	dev-&gt;reset_gpio = devm_gpiod_get_optional(dev-&gt;dev, "reset",</div><div class='add'>+						  GPIOD_OUT_LOW);</div><div class='add'>+	if (IS_ERR(dev-&gt;reset_gpio))</div><div class='add'>+		return PTR_ERR(dev-&gt;reset_gpio);</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;reset_gpio) {</div><div class='add'>+		if (of_device_is_compatible(dev-&gt;dev-&gt;of_node, "microchip,ksz8463")) {</div><div class='add'>+			ret = ksz8463_configure_straps_spi(dev);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		gpiod_set_value_cansleep(dev-&gt;reset_gpio, 1);</div><div class='add'>+		usleep_range(10000, 12000);</div><div class='add'>+		gpiod_set_value_cansleep(dev-&gt;reset_gpio, 0);</div><div class='add'>+		msleep(100);</div><div class='add'>+</div><div class='add'>+		if (of_device_is_compatible(dev-&gt;dev-&gt;of_node, "microchip,ksz8463")) {</div><div class='add'>+			ret = ksz8463_release_straps_spi(dev);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;dev-&gt;dev_mutex);</div><div class='add'>+	mutex_init(&amp;dev-&gt;regmap_mutex);</div><div class='add'>+	mutex_init(&amp;dev-&gt;alu_mutex);</div><div class='add'>+	mutex_init(&amp;dev-&gt;vlan_mutex);</div><div class='add'>+</div><div class='add'>+	ret = ksz_switch_detect(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	info = ksz_lookup_info(dev-&gt;chip_id);</div><div class='add'>+	if (!info)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	/* Update the compatible info with the probed one */</div><div class='add'>+	dev-&gt;info = info;</div><div class='add'>+</div><div class='add'>+	dev_info(dev-&gt;dev, "found switch: %s, rev %i\n",</div><div class='add'>+		 dev-&gt;info-&gt;dev_name, dev-&gt;chip_rev);</div><div class='add'>+</div><div class='add'>+	ret = ksz_check_device_id(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	dev-&gt;dev_ops = dev-&gt;info-&gt;ops;</div><div class='add'>+</div><div class='add'>+	ret = dev-&gt;dev_ops-&gt;init(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	dev-&gt;ports = devm_kzalloc(dev-&gt;dev,</div><div class='add'>+				  dev-&gt;info-&gt;port_cnt * sizeof(struct ksz_port),</div><div class='add'>+				  GFP_KERNEL);</div><div class='add'>+	if (!dev-&gt;ports)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; dev-&gt;info-&gt;port_cnt; i++) {</div><div class='add'>+		spin_lock_init(&amp;dev-&gt;ports[i].mib.stats64_lock);</div><div class='add'>+		mutex_init(&amp;dev-&gt;ports[i].mib.cnt_mutex);</div><div class='add'>+		dev-&gt;ports[i].mib.counters =</div><div class='add'>+			devm_kzalloc(dev-&gt;dev,</div><div class='add'>+				     sizeof(u64) * (dev-&gt;info-&gt;mib_cnt + 1),</div><div class='add'>+				     GFP_KERNEL);</div><div class='add'>+		if (!dev-&gt;ports[i].mib.counters)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		dev-&gt;ports[i].ksz_dev = dev;</div><div class='add'>+		dev-&gt;ports[i].num = i;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* set the real number of ports */</div><div class='add'>+	dev-&gt;ds-&gt;num_ports = dev-&gt;info-&gt;port_cnt;</div><div class='add'>+</div><div class='add'>+	/* set the phylink ops */</div><div class='add'>+	dev-&gt;ds-&gt;phylink_mac_ops = dev-&gt;info-&gt;phylink_mac_ops;</div><div class='add'>+</div><div class='add'>+	/* Host port interface will be self detected, or specifically set in</div><div class='add'>+	 * device tree.</div><div class='add'>+	 */</div><div class='add'>+	for (port_num = 0; port_num &lt; dev-&gt;info-&gt;port_cnt; ++port_num)</div><div class='add'>+		dev-&gt;ports[port_num].interface = PHY_INTERFACE_MODE_NA;</div><div class='add'>+	if (dev-&gt;dev-&gt;of_node) {</div><div class='add'>+		ret = of_get_phy_mode(dev-&gt;dev-&gt;of_node, &amp;interface);</div><div class='add'>+		if (ret == 0)</div><div class='add'>+			dev-&gt;compat_interface = interface;</div><div class='add'>+		ports = of_get_child_by_name(dev-&gt;dev-&gt;of_node, "ethernet-ports");</div><div class='add'>+		if (!ports)</div><div class='add'>+			ports = of_get_child_by_name(dev-&gt;dev-&gt;of_node, "ports");</div><div class='add'>+		if (ports) {</div><div class='add'>+			for_each_available_child_of_node_scoped(ports, port) {</div><div class='add'>+				if (of_property_read_u32(port, "reg",</div><div class='add'>+							 &amp;port_num))</div><div class='add'>+					continue;</div><div class='add'>+				if (!(dev-&gt;port_mask &amp; BIT(port_num))) {</div><div class='add'>+					of_node_put(ports);</div><div class='add'>+					return -EINVAL;</div><div class='add'>+				}</div><div class='add'>+				of_get_phy_mode(port,</div><div class='add'>+						&amp;dev-&gt;ports[port_num].interface);</div><div class='add'>+</div><div class='add'>+				ksz_parse_rgmii_delay(dev, port_num, port);</div><div class='add'>+				dev-&gt;ports[port_num].fiber =</div><div class='add'>+					of_property_read_bool(port,</div><div class='add'>+							      "micrel,fiber-mode");</div><div class='add'>+			}</div><div class='add'>+			of_node_put(ports);</div><div class='add'>+		}</div><div class='add'>+		dev-&gt;synclko_125 = of_property_read_bool(dev-&gt;dev-&gt;of_node,</div><div class='add'>+							 "microchip,synclko-125");</div><div class='add'>+		dev-&gt;synclko_disable = of_property_read_bool(dev-&gt;dev-&gt;of_node,</div><div class='add'>+							     "microchip,synclko-disable");</div><div class='add'>+		if (dev-&gt;synclko_125 &amp;&amp; dev-&gt;synclko_disable) {</div><div class='add'>+			dev_err(dev-&gt;dev, "inconsistent synclko settings\n");</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		dev-&gt;wakeup_source = of_property_read_bool(dev-&gt;dev-&gt;of_node,</div><div class='add'>+							   "wakeup-source");</div><div class='add'>+		dev-&gt;pme_active_high = of_property_read_bool(dev-&gt;dev-&gt;of_node,</div><div class='add'>+							     "microchip,pme-active-high");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = dsa_register_switch(dev-&gt;ds);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev-&gt;dev_ops-&gt;exit(dev);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Read MIB counters every 30 seconds to avoid overflow. */</div><div class='add'>+	dev-&gt;mib_read_interval = msecs_to_jiffies(5000);</div><div class='add'>+</div><div class='add'>+	/* Start the MIB timer. */</div><div class='add'>+	schedule_delayed_work(&amp;dev-&gt;mib_read, 0);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(ksz_switch_register);</div><div class='add'>+</div><div class='add'>+void ksz_switch_remove(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	/* timer started */</div><div class='add'>+	if (dev-&gt;mib_read_interval) {</div><div class='add'>+		dev-&gt;mib_read_interval = 0;</div><div class='add'>+		cancel_delayed_work_sync(&amp;dev-&gt;mib_read);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev-&gt;dev_ops-&gt;exit(dev);</div><div class='add'>+	dsa_unregister_switch(dev-&gt;ds);</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;reset_gpio)</div><div class='add'>+		gpiod_set_value_cansleep(dev-&gt;reset_gpio, 1);</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(ksz_switch_remove);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PM_SLEEP</div><div class='add'>+int ksz_switch_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *priv = dev_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	return dsa_switch_suspend(priv-&gt;ds);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(ksz_switch_suspend);</div><div class='add'>+</div><div class='add'>+int ksz_switch_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *priv = dev_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	return dsa_switch_resume(priv-&gt;ds);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(ksz_switch_resume);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Woojung Huh &lt;Woojung.Huh@microchip.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Microchip KSZ Series Switch DSA Driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/microchip/ksz_common.h<br/>new file mode 100644<br/>index 000000000000..c65188cd3c0a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz_common.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/ksz_common.h</a></div><div class='hunk'>@@ -0,0 +1,977 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Microchip switch driver common header</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2017-2025 Microchip Technology Inc.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __KSZ_COMMON_H</div><div class='add'>+#define __KSZ_COMMON_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/mutex.h&gt;</div><div class='add'>+#include &lt;linux/pcs/pcs-xpcs.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/platform_data/microchip-ksz.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ksz_ptp.h"</div><div class='add'>+</div><div class='add'>+#define KSZ_MAX_NUM_PORTS 8</div><div class='add'>+/* all KSZ switches count ports from 1 */</div><div class='add'>+#define KSZ_PORT_1 0</div><div class='add'>+#define KSZ_PORT_2 1</div><div class='add'>+#define KSZ_PORT_4 3</div><div class='add'>+</div><div class='add'>+struct ksz_device;</div><div class='add'>+struct ksz_port;</div><div class='add'>+struct phylink_mac_ops;</div><div class='add'>+</div><div class='add'>+enum ksz_regmap_width {</div><div class='add'>+	KSZ_REGMAP_8,</div><div class='add'>+	KSZ_REGMAP_16,</div><div class='add'>+	KSZ_REGMAP_32,</div><div class='add'>+	__KSZ_NUM_REGMAPS,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct vlan_table {</div><div class='add'>+	u32 table[3];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ksz_port_mib {</div><div class='add'>+	struct mutex cnt_mutex;		/* structure access */</div><div class='add'>+	u8 cnt_ptr;</div><div class='add'>+	u64 *counters;</div><div class='add'>+	struct rtnl_link_stats64 stats64;</div><div class='add'>+	struct ethtool_pause_stats pause_stats;</div><div class='add'>+	struct spinlock stats64_lock;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ksz_mib_names {</div><div class='add'>+	int index;</div><div class='add'>+	char string[ETH_GSTRING_LEN];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ksz_chip_data {</div><div class='add'>+	u32 chip_id;</div><div class='add'>+	const char *dev_name;</div><div class='add'>+	int num_vlans;</div><div class='add'>+	int num_alus;</div><div class='add'>+	int num_statics;</div><div class='add'>+	int cpu_ports;</div><div class='add'>+	int port_cnt;</div><div class='add'>+	u8 port_nirqs;</div><div class='add'>+	u8 num_tx_queues;</div><div class='add'>+	u8 num_ipms; /* number of Internal Priority Maps */</div><div class='add'>+	bool tc_cbs_supported;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @phy_side_mdio_supported: Indicates if the chip supports an additional</div><div class='add'>+	 * side MDIO channel for accessing integrated PHYs.</div><div class='add'>+	 */</div><div class='add'>+	bool phy_side_mdio_supported;</div><div class='add'>+	const struct ksz_dev_ops *ops;</div><div class='add'>+	const struct phylink_mac_ops *phylink_mac_ops;</div><div class='add'>+	bool phy_errata_9477;</div><div class='add'>+	bool ksz87xx_eee_link_erratum;</div><div class='add'>+	const struct ksz_mib_names *mib_names;</div><div class='add'>+	int mib_cnt;</div><div class='add'>+	u8 reg_mib_cnt;</div><div class='add'>+	const u16 *regs;</div><div class='add'>+	const u32 *masks;</div><div class='add'>+	const u8 *shifts;</div><div class='add'>+	const u8 *xmii_ctrl0;</div><div class='add'>+	const u8 *xmii_ctrl1;</div><div class='add'>+	int stp_ctrl_reg;</div><div class='add'>+	int broadcast_ctrl_reg;</div><div class='add'>+	int multicast_ctrl_reg;</div><div class='add'>+	int start_ctrl_reg;</div><div class='add'>+	bool supports_mii[KSZ_MAX_NUM_PORTS];</div><div class='add'>+	bool supports_rmii[KSZ_MAX_NUM_PORTS];</div><div class='add'>+	bool supports_rgmii[KSZ_MAX_NUM_PORTS];</div><div class='add'>+	bool internal_phy[KSZ_MAX_NUM_PORTS];</div><div class='add'>+	bool gbit_capable[KSZ_MAX_NUM_PORTS];</div><div class='add'>+	bool ptp_capable;</div><div class='add'>+	u8 sgmii_port;</div><div class='add'>+	const struct regmap_access_table *wr_table;</div><div class='add'>+	const struct regmap_access_table *rd_table;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ksz_irq {</div><div class='add'>+	u16 masked;</div><div class='add'>+	u16 reg_mask;</div><div class='add'>+	u16 reg_status;</div><div class='add'>+	struct irq_domain *domain;</div><div class='add'>+	int nirqs;</div><div class='add'>+	int irq_num;</div><div class='add'>+	char name[16];</div><div class='add'>+	struct ksz_device *dev;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ksz_ptp_irq {</div><div class='add'>+	struct ksz_port *port;</div><div class='add'>+	u16 ts_reg;</div><div class='add'>+	bool ts_en;</div><div class='add'>+	char name[16];</div><div class='add'>+	int num;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ksz_switch_macaddr {</div><div class='add'>+	unsigned char addr[ETH_ALEN];</div><div class='add'>+	refcount_t refcount;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ksz_port {</div><div class='add'>+	bool remove_tag;		/* Remove Tag flag set, for ksz8795 only */</div><div class='add'>+	bool learning;</div><div class='add'>+	bool isolated;</div><div class='add'>+	int stp_state;</div><div class='add'>+	struct phy_device phydev;</div><div class='add'>+</div><div class='add'>+	u32 fiber:1;			/* port is fiber */</div><div class='add'>+	u32 force:1;</div><div class='add'>+	u32 read:1;			/* read MIB counters in background */</div><div class='add'>+	u32 freeze:1;			/* MIB counter freeze is enabled */</div><div class='add'>+	u32 sgmii_adv_write:1;</div><div class='add'>+</div><div class='add'>+	struct ksz_port_mib mib;</div><div class='add'>+	phy_interface_t interface;</div><div class='add'>+	u32 rgmii_tx_val;</div><div class='add'>+	u32 rgmii_rx_val;</div><div class='add'>+	struct ksz_device *ksz_dev;</div><div class='add'>+	void *acl_priv;</div><div class='add'>+	struct ksz_irq pirq;</div><div class='add'>+	u8 num;</div><div class='add'>+	struct phylink_pcs *pcs;</div><div class='add'>+#if IS_ENABLED(CONFIG_NET_DSA_MICROCHIP_KSZ_PTP)</div><div class='add'>+	struct kernel_hwtstamp_config tstamp_config;</div><div class='add'>+	bool hwts_tx_en;</div><div class='add'>+	bool hwts_rx_en;</div><div class='add'>+	struct ksz_irq ptpirq;</div><div class='add'>+	struct ksz_ptp_irq ptpmsg_irq[3];</div><div class='add'>+	ktime_t tstamp_msg;</div><div class='add'>+	struct completion tstamp_msg_comp;</div><div class='add'>+#endif</div><div class='add'>+	bool manual_flow;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ksz_device {</div><div class='add'>+	struct dsa_switch *ds;</div><div class='add'>+	struct ksz_platform_data *pdata;</div><div class='add'>+	const struct ksz_chip_data *info;</div><div class='add'>+</div><div class='add'>+	struct mutex dev_mutex;		/* device access */</div><div class='add'>+	struct mutex regmap_mutex;	/* regmap access */</div><div class='add'>+	struct mutex alu_mutex;		/* ALU access */</div><div class='add'>+	struct mutex vlan_mutex;	/* vlan access */</div><div class='add'>+	const struct ksz_dev_ops *dev_ops;</div><div class='add'>+</div><div class='add'>+	struct device *dev;</div><div class='add'>+	struct regmap *regmap[__KSZ_NUM_REGMAPS];</div><div class='add'>+</div><div class='add'>+	void *priv;</div><div class='add'>+	int irq;</div><div class='add'>+</div><div class='add'>+	struct gpio_desc *reset_gpio;	/* Optional reset GPIO */</div><div class='add'>+</div><div class='add'>+	/* chip specific data */</div><div class='add'>+	u32 chip_id;</div><div class='add'>+	u8 chip_rev;</div><div class='add'>+	int cpu_port;			/* port connected to CPU */</div><div class='add'>+	int phy_port_cnt;</div><div class='add'>+	phy_interface_t compat_interface;</div><div class='add'>+	bool synclko_125;</div><div class='add'>+	bool synclko_disable;</div><div class='add'>+	bool wakeup_source;</div><div class='add'>+	bool pme_active_high;</div><div class='add'>+</div><div class='add'>+	struct vlan_table *vlan_cache;</div><div class='add'>+</div><div class='add'>+	struct ksz_port *ports;</div><div class='add'>+	struct delayed_work mib_read;</div><div class='add'>+	unsigned long mib_read_interval;</div><div class='add'>+	u16 mirror_rx;</div><div class='add'>+	u16 mirror_tx;</div><div class='add'>+	u16 port_mask;</div><div class='add'>+	struct mutex lock_irq;		/* IRQ Access */</div><div class='add'>+	struct ksz_irq girq;</div><div class='add'>+	struct ksz_ptp_data ptp_data;</div><div class='add'>+</div><div class='add'>+	struct ksz_switch_macaddr *switch_macaddr;</div><div class='add'>+	struct net_device *hsr_dev;     /* HSR */</div><div class='add'>+	u8 hsr_ports;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @phy_addr_map: Array mapping switch ports to their corresponding PHY</div><div class='add'>+	 * addresses.</div><div class='add'>+	 */</div><div class='add'>+	u8 phy_addr_map[KSZ_MAX_NUM_PORTS];</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @parent_mdio_bus: Pointer to the external MDIO bus controller.</div><div class='add'>+	 *</div><div class='add'>+	 * This points to an external MDIO bus controller that is used to access</div><div class='add'>+	 * the  PHYs integrated within the switch. Unlike an integrated MDIO</div><div class='add'>+	 * bus, this external controller provides a direct path for managing</div><div class='add'>+	 * the switch’s internal PHYs, bypassing the main SPI interface.</div><div class='add'>+	 */</div><div class='add'>+	struct mii_bus *parent_mdio_bus;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* List of supported models */</div><div class='add'>+enum ksz_model {</div><div class='add'>+	KSZ8463,</div><div class='add'>+	KSZ8563,</div><div class='add'>+	KSZ8567,</div><div class='add'>+	KSZ8795,</div><div class='add'>+	KSZ8794,</div><div class='add'>+	KSZ8765,</div><div class='add'>+	KSZ88X3,</div><div class='add'>+	KSZ8864,</div><div class='add'>+	KSZ8895,</div><div class='add'>+	KSZ9477,</div><div class='add'>+	KSZ9896,</div><div class='add'>+	KSZ9897,</div><div class='add'>+	KSZ9893,</div><div class='add'>+	KSZ9563,</div><div class='add'>+	KSZ9567,</div><div class='add'>+	LAN9370,</div><div class='add'>+	LAN9371,</div><div class='add'>+	LAN9372,</div><div class='add'>+	LAN9373,</div><div class='add'>+	LAN9374,</div><div class='add'>+	LAN9646,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum ksz_regs {</div><div class='add'>+	REG_SW_MAC_ADDR,</div><div class='add'>+	REG_IND_CTRL_0,</div><div class='add'>+	REG_IND_DATA_8,</div><div class='add'>+	REG_IND_DATA_CHECK,</div><div class='add'>+	REG_IND_DATA_HI,</div><div class='add'>+	REG_IND_DATA_LO,</div><div class='add'>+	REG_IND_MIB_CHECK,</div><div class='add'>+	REG_IND_BYTE,</div><div class='add'>+	P_FORCE_CTRL,</div><div class='add'>+	P_LINK_STATUS,</div><div class='add'>+	P_LOCAL_CTRL,</div><div class='add'>+	P_NEG_RESTART_CTRL,</div><div class='add'>+	P_REMOTE_STATUS,</div><div class='add'>+	P_SPEED_STATUS,</div><div class='add'>+	S_TAIL_TAG_CTRL,</div><div class='add'>+	P_STP_CTRL,</div><div class='add'>+	S_START_CTRL,</div><div class='add'>+	S_BROADCAST_CTRL,</div><div class='add'>+	S_MULTICAST_CTRL,</div><div class='add'>+	P_XMII_CTRL_0,</div><div class='add'>+	P_XMII_CTRL_1,</div><div class='add'>+	REG_SW_PME_CTRL,</div><div class='add'>+	REG_PORT_PME_STATUS,</div><div class='add'>+	REG_PORT_PME_CTRL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum ksz_masks {</div><div class='add'>+	PORT_802_1P_REMAPPING,</div><div class='add'>+	SW_TAIL_TAG_ENABLE,</div><div class='add'>+	MIB_COUNTER_OVERFLOW,</div><div class='add'>+	MIB_COUNTER_VALID,</div><div class='add'>+	VLAN_TABLE_FID,</div><div class='add'>+	VLAN_TABLE_MEMBERSHIP,</div><div class='add'>+	VLAN_TABLE_VALID,</div><div class='add'>+	STATIC_MAC_TABLE_VALID,</div><div class='add'>+	STATIC_MAC_TABLE_USE_FID,</div><div class='add'>+	STATIC_MAC_TABLE_FID,</div><div class='add'>+	STATIC_MAC_TABLE_OVERRIDE,</div><div class='add'>+	STATIC_MAC_TABLE_FWD_PORTS,</div><div class='add'>+	DYNAMIC_MAC_TABLE_ENTRIES_H,</div><div class='add'>+	DYNAMIC_MAC_TABLE_MAC_EMPTY,</div><div class='add'>+	DYNAMIC_MAC_TABLE_NOT_READY,</div><div class='add'>+	DYNAMIC_MAC_TABLE_ENTRIES,</div><div class='add'>+	DYNAMIC_MAC_TABLE_FID,</div><div class='add'>+	DYNAMIC_MAC_TABLE_SRC_PORT,</div><div class='add'>+	DYNAMIC_MAC_TABLE_TIMESTAMP,</div><div class='add'>+	ALU_STAT_WRITE,</div><div class='add'>+	ALU_STAT_READ,</div><div class='add'>+	ALU_STAT_DIRECT,</div><div class='add'>+	ALU_RESV_MCAST_ADDR,</div><div class='add'>+	P_MII_TX_FLOW_CTRL,</div><div class='add'>+	P_MII_RX_FLOW_CTRL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum ksz_shifts {</div><div class='add'>+	VLAN_TABLE_MEMBERSHIP_S,</div><div class='add'>+	VLAN_TABLE,</div><div class='add'>+	STATIC_MAC_FWD_PORTS,</div><div class='add'>+	STATIC_MAC_FID,</div><div class='add'>+	DYNAMIC_MAC_ENTRIES_H,</div><div class='add'>+	DYNAMIC_MAC_ENTRIES,</div><div class='add'>+	DYNAMIC_MAC_FID,</div><div class='add'>+	DYNAMIC_MAC_TIMESTAMP,</div><div class='add'>+	DYNAMIC_MAC_SRC_PORT,</div><div class='add'>+	ALU_STAT_INDEX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum ksz_xmii_ctrl0 {</div><div class='add'>+	P_MII_100MBIT,</div><div class='add'>+	P_MII_10MBIT,</div><div class='add'>+	P_MII_FULL_DUPLEX,</div><div class='add'>+	P_MII_HALF_DUPLEX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum ksz_xmii_ctrl1 {</div><div class='add'>+	P_RGMII_SEL,</div><div class='add'>+	P_RMII_SEL,</div><div class='add'>+	P_GMII_SEL,</div><div class='add'>+	P_MII_SEL,</div><div class='add'>+	P_GMII_1GBIT,</div><div class='add'>+	P_GMII_NOT_1GBIT,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct alu_struct {</div><div class='add'>+	/* entry 1 */</div><div class='add'>+	u8	is_static:1;</div><div class='add'>+	u8	is_src_filter:1;</div><div class='add'>+	u8	is_dst_filter:1;</div><div class='add'>+	u8	prio_age:3;</div><div class='add'>+	u32	_reserv_0_1:23;</div><div class='add'>+	u8	mstp:3;</div><div class='add'>+	/* entry 2 */</div><div class='add'>+	u8	is_override:1;</div><div class='add'>+	u8	is_use_fid:1;</div><div class='add'>+	u32	_reserv_1_1:23;</div><div class='add'>+	u8	port_forward:7;</div><div class='add'>+	/* entry 3 &amp; 4*/</div><div class='add'>+	u32	_reserv_2_1:9;</div><div class='add'>+	u8	fid:7;</div><div class='add'>+	u8	mac[ETH_ALEN];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ksz_dev_ops {</div><div class='add'>+	int (*setup)(struct dsa_switch *ds);</div><div class='add'>+	void (*teardown)(struct dsa_switch *ds);</div><div class='add'>+	u32 (*get_port_addr)(int port, int offset);</div><div class='add'>+	void (*cfg_port_member)(struct ksz_device *dev, int port, u8 member);</div><div class='add'>+	void (*flush_dyn_mac_table)(struct ksz_device *dev, int port);</div><div class='add'>+	void (*port_cleanup)(struct ksz_device *dev, int port);</div><div class='add'>+	void (*port_setup)(struct ksz_device *dev, int port, bool cpu_port);</div><div class='add'>+	int (*set_ageing_time)(struct ksz_device *dev, unsigned int msecs);</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @mdio_bus_preinit: Function pointer to pre-initialize the MDIO bus</div><div class='add'>+	 *                    for accessing PHYs.</div><div class='add'>+	 * @dev: Pointer to device structure.</div><div class='add'>+	 * @side_mdio: Boolean indicating if the PHYs are accessed over a side</div><div class='add'>+	 *             MDIO bus.</div><div class='add'>+	 *</div><div class='add'>+	 * This function pointer is used to configure the MDIO bus for PHY</div><div class='add'>+	 * access before initiating regular PHY operations. It enables either</div><div class='add'>+	 * SPI/I2C or side MDIO access modes by unlocking necessary registers</div><div class='add'>+	 * and setting up access permissions for the selected mode.</div><div class='add'>+	 *</div><div class='add'>+	 * Return:</div><div class='add'>+	 *  - 0 on success.</div><div class='add'>+	 *  - Negative error code on failure.</div><div class='add'>+	 */</div><div class='add'>+	int (*mdio_bus_preinit)(struct ksz_device *dev, bool side_mdio);</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @create_phy_addr_map: Function pointer to create a port-to-PHY</div><div class='add'>+	 *                       address map.</div><div class='add'>+	 * @dev: Pointer to device structure.</div><div class='add'>+	 * @side_mdio: Boolean indicating if the PHYs are accessed over a side</div><div class='add'>+	 *             MDIO bus.</div><div class='add'>+	 *</div><div class='add'>+	 * This function pointer is responsible for mapping switch ports to PHY</div><div class='add'>+	 * addresses according to the configured access mode (SPI or side MDIO)</div><div class='add'>+	 * and the device’s strap configuration. The mapping setup may vary</div><div class='add'>+	 * depending on the chip variant and configuration. Ensures the correct</div><div class='add'>+	 * address mapping for PHY communication.</div><div class='add'>+	 *</div><div class='add'>+	 * Return:</div><div class='add'>+	 *  - 0 on success.</div><div class='add'>+	 *  - Negative error code on failure (e.g., invalid configuration).</div><div class='add'>+	 */</div><div class='add'>+	int (*create_phy_addr_map)(struct ksz_device *dev, bool side_mdio);</div><div class='add'>+	int (*r_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 *val);</div><div class='add'>+	int (*w_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 val);</div><div class='add'>+	void (*r_mib_cnt)(struct ksz_device *dev, int port, u16 addr,</div><div class='add'>+			  u64 *cnt);</div><div class='add'>+	void (*r_mib_pkt)(struct ksz_device *dev, int port, u16 addr,</div><div class='add'>+			  u64 *dropped, u64 *cnt);</div><div class='add'>+	void (*r_mib_stat64)(struct ksz_device *dev, int port);</div><div class='add'>+	int  (*vlan_filtering)(struct ksz_device *dev, int port,</div><div class='add'>+			       bool flag, struct netlink_ext_ack *extack);</div><div class='add'>+	int  (*vlan_add)(struct ksz_device *dev, int port,</div><div class='add'>+			 const struct switchdev_obj_port_vlan *vlan,</div><div class='add'>+			 struct netlink_ext_ack *extack);</div><div class='add'>+	int  (*vlan_del)(struct ksz_device *dev, int port,</div><div class='add'>+			 const struct switchdev_obj_port_vlan *vlan);</div><div class='add'>+	int (*mirror_add)(struct ksz_device *dev, int port,</div><div class='add'>+			  struct dsa_mall_mirror_tc_entry *mirror,</div><div class='add'>+			  bool ingress, struct netlink_ext_ack *extack);</div><div class='add'>+	void (*mirror_del)(struct ksz_device *dev, int port,</div><div class='add'>+			   struct dsa_mall_mirror_tc_entry *mirror);</div><div class='add'>+	int (*fdb_add)(struct ksz_device *dev, int port,</div><div class='add'>+		       const unsigned char *addr, u16 vid, struct dsa_db db);</div><div class='add'>+	int (*fdb_del)(struct ksz_device *dev, int port,</div><div class='add'>+		       const unsigned char *addr, u16 vid, struct dsa_db db);</div><div class='add'>+	int (*fdb_dump)(struct ksz_device *dev, int port,</div><div class='add'>+			dsa_fdb_dump_cb_t *cb, void *data);</div><div class='add'>+	int (*mdb_add)(struct ksz_device *dev, int port,</div><div class='add'>+		       const struct switchdev_obj_port_mdb *mdb,</div><div class='add'>+		       struct dsa_db db);</div><div class='add'>+	int (*mdb_del)(struct ksz_device *dev, int port,</div><div class='add'>+		       const struct switchdev_obj_port_mdb *mdb,</div><div class='add'>+		       struct dsa_db db);</div><div class='add'>+	void (*get_caps)(struct ksz_device *dev, int port,</div><div class='add'>+			 struct phylink_config *config);</div><div class='add'>+	int (*change_mtu)(struct ksz_device *dev, int port, int mtu);</div><div class='add'>+	int (*pme_write8)(struct ksz_device *dev, u32 reg, u8 value);</div><div class='add'>+	int (*pme_pread8)(struct ksz_device *dev, int port, int offset,</div><div class='add'>+			  u8 *data);</div><div class='add'>+	int (*pme_pwrite8)(struct ksz_device *dev, int port, int offset,</div><div class='add'>+			   u8 data);</div><div class='add'>+	void (*freeze_mib)(struct ksz_device *dev, int port, bool freeze);</div><div class='add'>+	void (*port_init_cnt)(struct ksz_device *dev, int port);</div><div class='add'>+	void (*phylink_mac_link_up)(struct ksz_device *dev, int port,</div><div class='add'>+				    unsigned int mode,</div><div class='add'>+				    phy_interface_t interface,</div><div class='add'>+				    struct phy_device *phydev, int speed,</div><div class='add'>+				    int duplex, bool tx_pause, bool rx_pause);</div><div class='add'>+	void (*setup_rgmii_delay)(struct ksz_device *dev, int port);</div><div class='add'>+	int (*tc_cbs_set_cinc)(struct ksz_device *dev, int port, u32 val);</div><div class='add'>+	void (*config_cpu_port)(struct dsa_switch *ds);</div><div class='add'>+	int (*enable_stp_addr)(struct ksz_device *dev);</div><div class='add'>+	int (*reset)(struct ksz_device *dev);</div><div class='add'>+	int (*init)(struct ksz_device *dev);</div><div class='add'>+	void (*exit)(struct ksz_device *dev);</div><div class='add'>+</div><div class='add'>+	int (*pcs_create)(struct ksz_device *dev);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ksz_device *ksz_switch_alloc(struct device *base, void *priv);</div><div class='add'>+int ksz_switch_register(struct ksz_device *dev);</div><div class='add'>+void ksz_switch_remove(struct ksz_device *dev);</div><div class='add'>+int ksz_switch_suspend(struct device *dev);</div><div class='add'>+int ksz_switch_resume(struct device *dev);</div><div class='add'>+</div><div class='add'>+void ksz_init_mib_timer(struct ksz_device *dev);</div><div class='add'>+bool ksz_is_port_mac_global_usable(struct dsa_switch *ds, int port);</div><div class='add'>+void ksz_r_mib_stats64(struct ksz_device *dev, int port);</div><div class='add'>+void ksz88xx_r_mib_stats64(struct ksz_device *dev, int port);</div><div class='add'>+void ksz_port_stp_state_set(struct dsa_switch *ds, int port, u8 state);</div><div class='add'>+bool ksz_get_gbit(struct ksz_device *dev, int port);</div><div class='add'>+phy_interface_t ksz_get_xmii(struct ksz_device *dev, int port, bool gbit);</div><div class='add'>+extern const struct ksz_chip_data ksz_switch_chips[];</div><div class='add'>+int ksz_switch_macaddr_get(struct dsa_switch *ds, int port,</div><div class='add'>+			   struct netlink_ext_ack *extack);</div><div class='add'>+void ksz_switch_macaddr_put(struct dsa_switch *ds);</div><div class='add'>+void ksz_switch_shutdown(struct ksz_device *dev);</div><div class='add'>+int ksz_handle_wake_reason(struct ksz_device *dev, int port);</div><div class='add'>+</div><div class='add'>+/* Common register access functions */</div><div class='add'>+static inline struct regmap *ksz_regmap_8(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	return dev-&gt;regmap[KSZ_REGMAP_8];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct regmap *ksz_regmap_16(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	return dev-&gt;regmap[KSZ_REGMAP_16];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct regmap *ksz_regmap_32(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	return dev-&gt;regmap[KSZ_REGMAP_32];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool ksz_is_ksz8463(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	return dev-&gt;chip_id == KSZ8463_CHIP_ID;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ksz_read8(struct ksz_device *dev, u32 reg, u8 *val)</div><div class='add'>+{</div><div class='add'>+	unsigned int value;</div><div class='add'>+	int ret = regmap_read(ksz_regmap_8(dev), reg, &amp;value);</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(dev-&gt;dev, "can't read 8bit reg: 0x%x %pe\n", reg,</div><div class='add'>+			ERR_PTR(ret));</div><div class='add'>+</div><div class='add'>+	*val = value;</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ksz_read16(struct ksz_device *dev, u32 reg, u16 *val)</div><div class='add'>+{</div><div class='add'>+	unsigned int value;</div><div class='add'>+	int ret = regmap_read(ksz_regmap_16(dev), reg, &amp;value);</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(dev-&gt;dev, "can't read 16bit reg: 0x%x %pe\n", reg,</div><div class='add'>+			ERR_PTR(ret));</div><div class='add'>+</div><div class='add'>+	*val = value;</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ksz_read32(struct ksz_device *dev, u32 reg, u32 *val)</div><div class='add'>+{</div><div class='add'>+	unsigned int value;</div><div class='add'>+	int ret = regmap_read(ksz_regmap_32(dev), reg, &amp;value);</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(dev-&gt;dev, "can't read 32bit reg: 0x%x %pe\n", reg,</div><div class='add'>+			ERR_PTR(ret));</div><div class='add'>+</div><div class='add'>+	*val = value;</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ksz_read64(struct ksz_device *dev, u32 reg, u64 *val)</div><div class='add'>+{</div><div class='add'>+	u32 value[2];</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_bulk_read(ksz_regmap_32(dev), reg, value, 2);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(dev-&gt;dev, "can't read 64bit reg: 0x%x %pe\n", reg,</div><div class='add'>+			ERR_PTR(ret));</div><div class='add'>+	else</div><div class='add'>+		*val = (u64)value[0] &lt;&lt; 32 | value[1];</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ksz_write8(struct ksz_device *dev, u32 reg, u8 value)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(ksz_regmap_8(dev), reg, value);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(dev-&gt;dev, "can't write 8bit reg: 0x%x %pe\n", reg,</div><div class='add'>+			ERR_PTR(ret));</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ksz_write16(struct ksz_device *dev, u32 reg, u16 value)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(ksz_regmap_16(dev), reg, value);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(dev-&gt;dev, "can't write 16bit reg: 0x%x %pe\n", reg,</div><div class='add'>+			ERR_PTR(ret));</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ksz_write32(struct ksz_device *dev, u32 reg, u32 value)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(ksz_regmap_32(dev), reg, value);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(dev-&gt;dev, "can't write 32bit reg: 0x%x %pe\n", reg,</div><div class='add'>+			ERR_PTR(ret));</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ksz_rmw16(struct ksz_device *dev, u32 reg, u16 mask,</div><div class='add'>+			    u16 value)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_update_bits(ksz_regmap_16(dev), reg, mask, value);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(dev-&gt;dev, "can't rmw 16bit reg 0x%x: %pe\n", reg,</div><div class='add'>+			ERR_PTR(ret));</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ksz_rmw32(struct ksz_device *dev, u32 reg, u32 mask,</div><div class='add'>+			    u32 value)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_update_bits(ksz_regmap_32(dev), reg, mask, value);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(dev-&gt;dev, "can't rmw 32bit reg 0x%x: %pe\n", reg,</div><div class='add'>+			ERR_PTR(ret));</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ksz_write64(struct ksz_device *dev, u32 reg, u64 value)</div><div class='add'>+{</div><div class='add'>+	u32 val[2];</div><div class='add'>+</div><div class='add'>+	/* Ick! ToDo: Add 64bit R/W to regmap on 32bit systems */</div><div class='add'>+	value = swab64(value);</div><div class='add'>+	val[0] = swab32(value &amp; 0xffffffffULL);</div><div class='add'>+	val[1] = swab32(value &gt;&gt; 32ULL);</div><div class='add'>+</div><div class='add'>+	return regmap_bulk_write(ksz_regmap_32(dev), reg, val, 2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ksz_rmw8(struct ksz_device *dev, int offset, u8 mask, u8 val)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_update_bits(ksz_regmap_8(dev), offset, mask, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(dev-&gt;dev, "can't rmw 8bit reg 0x%x: %pe\n", offset,</div><div class='add'>+			ERR_PTR(ret));</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ksz_pread8(struct ksz_device *dev, int port, int offset,</div><div class='add'>+			     u8 *data)</div><div class='add'>+{</div><div class='add'>+	return ksz_read8(dev, dev-&gt;dev_ops-&gt;get_port_addr(port, offset), data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ksz_pread16(struct ksz_device *dev, int port, int offset,</div><div class='add'>+			      u16 *data)</div><div class='add'>+{</div><div class='add'>+	return ksz_read16(dev, dev-&gt;dev_ops-&gt;get_port_addr(port, offset), data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ksz_pread32(struct ksz_device *dev, int port, int offset,</div><div class='add'>+			      u32 *data)</div><div class='add'>+{</div><div class='add'>+	return ksz_read32(dev, dev-&gt;dev_ops-&gt;get_port_addr(port, offset), data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ksz_pwrite8(struct ksz_device *dev, int port, int offset,</div><div class='add'>+			      u8 data)</div><div class='add'>+{</div><div class='add'>+	return ksz_write8(dev, dev-&gt;dev_ops-&gt;get_port_addr(port, offset), data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ksz_pwrite16(struct ksz_device *dev, int port, int offset,</div><div class='add'>+			       u16 data)</div><div class='add'>+{</div><div class='add'>+	return ksz_write16(dev, dev-&gt;dev_ops-&gt;get_port_addr(port, offset),</div><div class='add'>+			   data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ksz_pwrite32(struct ksz_device *dev, int port, int offset,</div><div class='add'>+			       u32 data)</div><div class='add'>+{</div><div class='add'>+	return ksz_write32(dev, dev-&gt;dev_ops-&gt;get_port_addr(port, offset),</div><div class='add'>+			   data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ksz_prmw8(struct ksz_device *dev, int port, int offset,</div><div class='add'>+			    u8 mask, u8 val)</div><div class='add'>+{</div><div class='add'>+	return ksz_rmw8(dev, dev-&gt;dev_ops-&gt;get_port_addr(port, offset),</div><div class='add'>+			mask, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ksz_prmw32(struct ksz_device *dev, int port, int offset,</div><div class='add'>+			     u32 mask, u32 val)</div><div class='add'>+{</div><div class='add'>+	return ksz_rmw32(dev, dev-&gt;dev_ops-&gt;get_port_addr(port, offset),</div><div class='add'>+			 mask, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ksz_regmap_lock(void *__mtx)</div><div class='add'>+{</div><div class='add'>+	struct mutex *mtx = __mtx;</div><div class='add'>+	mutex_lock(mtx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ksz_regmap_unlock(void *__mtx)</div><div class='add'>+{</div><div class='add'>+	struct mutex *mtx = __mtx;</div><div class='add'>+	mutex_unlock(mtx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool ksz_is_ksz87xx(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	return dev-&gt;chip_id == KSZ8795_CHIP_ID ||</div><div class='add'>+	       dev-&gt;chip_id == KSZ8794_CHIP_ID ||</div><div class='add'>+	       dev-&gt;chip_id == KSZ8765_CHIP_ID;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool ksz_is_ksz88x3(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	return dev-&gt;chip_id == KSZ88X3_CHIP_ID;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool ksz_is_8895_family(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	return dev-&gt;chip_id == KSZ8895_CHIP_ID ||</div><div class='add'>+	       dev-&gt;chip_id == KSZ8864_CHIP_ID;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool is_ksz8(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	return ksz_is_ksz87xx(dev) || ksz_is_ksz88x3(dev) ||</div><div class='add'>+	       ksz_is_8895_family(dev) || ksz_is_ksz8463(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool is_ksz88xx(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	return ksz_is_ksz88x3(dev) || ksz_is_8895_family(dev) ||</div><div class='add'>+	       ksz_is_ksz8463(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool is_ksz9477(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	return dev-&gt;chip_id == KSZ9477_CHIP_ID;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int is_lan937x(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	return dev-&gt;chip_id == LAN9370_CHIP_ID ||</div><div class='add'>+		dev-&gt;chip_id == LAN9371_CHIP_ID ||</div><div class='add'>+		dev-&gt;chip_id == LAN9372_CHIP_ID ||</div><div class='add'>+		dev-&gt;chip_id == LAN9373_CHIP_ID ||</div><div class='add'>+		dev-&gt;chip_id == LAN9374_CHIP_ID;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool is_lan937x_tx_phy(struct ksz_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	return (dev-&gt;chip_id == LAN9371_CHIP_ID ||</div><div class='add'>+		dev-&gt;chip_id == LAN9372_CHIP_ID) &amp;&amp; port == KSZ_PORT_4;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ksz_get_sgmii_port(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	return dev-&gt;info-&gt;sgmii_port - 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool ksz_has_sgmii_port(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	return dev-&gt;info-&gt;sgmii_port &gt; 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool ksz_is_sgmii_port(struct ksz_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	return dev-&gt;info-&gt;sgmii_port == port + 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* STP State Defines */</div><div class='add'>+#define PORT_TX_ENABLE			BIT(2)</div><div class='add'>+#define PORT_RX_ENABLE			BIT(1)</div><div class='add'>+#define PORT_LEARN_DISABLE		BIT(0)</div><div class='add'>+</div><div class='add'>+/* Switch ID Defines */</div><div class='add'>+#define REG_CHIP_ID0			0x00</div><div class='add'>+</div><div class='add'>+#define SW_FAMILY_ID_M			GENMASK(15, 8)</div><div class='add'>+#define KSZ84_FAMILY_ID			0x84</div><div class='add'>+#define KSZ87_FAMILY_ID			0x87</div><div class='add'>+#define KSZ88_FAMILY_ID			0x88</div><div class='add'>+#define KSZ8895_FAMILY_ID		0x95</div><div class='add'>+</div><div class='add'>+#define KSZ8_PORT_STATUS_0		0x08</div><div class='add'>+#define KSZ8_PORT_FIBER_MODE		BIT(7)</div><div class='add'>+</div><div class='add'>+#define SW_CHIP_ID_M			GENMASK(7, 4)</div><div class='add'>+#define KSZ87_CHIP_ID_94		0x6</div><div class='add'>+#define KSZ87_CHIP_ID_95		0x9</div><div class='add'>+#define KSZ88_CHIP_ID_63		0x3</div><div class='add'>+#define KSZ8895_CHIP_ID_95		0x4</div><div class='add'>+#define KSZ8895_CHIP_ID_95R		0x6</div><div class='add'>+</div><div class='add'>+/* KSZ8895 specific register */</div><div class='add'>+#define REG_KSZ8864_CHIP_ID		0xFE</div><div class='add'>+#define SW_KSZ8864			BIT(7)</div><div class='add'>+</div><div class='add'>+#define SW_REV_ID_M			GENMASK(7, 4)</div><div class='add'>+</div><div class='add'>+/* KSZ9893, KSZ9563, KSZ8563 specific register  */</div><div class='add'>+#define REG_CHIP_ID4			0x0f</div><div class='add'>+#define SKU_ID_KSZ8563			0x3c</div><div class='add'>+#define SKU_ID_KSZ9563			0x1c</div><div class='add'>+</div><div class='add'>+/* Driver set switch broadcast storm protection at 10% rate. */</div><div class='add'>+#define BROADCAST_STORM_PROT_RATE	10</div><div class='add'>+</div><div class='add'>+/* 148,800 frames * 67 ms / 100 */</div><div class='add'>+#define BROADCAST_STORM_VALUE		9969</div><div class='add'>+</div><div class='add'>+#define BROADCAST_STORM_RATE_HI		0x07</div><div class='add'>+#define BROADCAST_STORM_RATE_LO		0xFF</div><div class='add'>+#define BROADCAST_STORM_RATE		0x07FF</div><div class='add'>+</div><div class='add'>+#define MULTICAST_STORM_DISABLE		BIT(6)</div><div class='add'>+</div><div class='add'>+#define SW_START			0x01</div><div class='add'>+</div><div class='add'>+/* xMII configuration */</div><div class='add'>+#define P_MII_DUPLEX_M			BIT(6)</div><div class='add'>+#define P_MII_100MBIT_M			BIT(4)</div><div class='add'>+</div><div class='add'>+#define P_GMII_1GBIT_M			BIT(6)</div><div class='add'>+#define P_RGMII_ID_IG_ENABLE		BIT(4)</div><div class='add'>+#define P_RGMII_ID_EG_ENABLE		BIT(3)</div><div class='add'>+#define P_MII_MAC_MODE			BIT(2)</div><div class='add'>+#define P_MII_SEL_M			0x3</div><div class='add'>+</div><div class='add'>+/* KSZ9477, KSZ87xx Wake-on-LAN (WoL) masks */</div><div class='add'>+#define PME_WOL_MAGICPKT		BIT(2)</div><div class='add'>+#define PME_WOL_LINKUP			BIT(1)</div><div class='add'>+#define PME_WOL_ENERGY			BIT(0)</div><div class='add'>+</div><div class='add'>+#define PME_ENABLE			BIT(1)</div><div class='add'>+#define PME_POLARITY			BIT(0)</div><div class='add'>+</div><div class='add'>+#define KSZ87XX_REG_INT_EN		0x7D</div><div class='add'>+#define KSZ87XX_INT_PME_MASK		BIT(4)</div><div class='add'>+</div><div class='add'>+/* Interrupt */</div><div class='add'>+#define REG_SW_PORT_INT_STATUS__1	0x001B</div><div class='add'>+#define REG_SW_PORT_INT_MASK__1		0x001F</div><div class='add'>+</div><div class='add'>+#define REG_PORT_INT_STATUS		0x001B</div><div class='add'>+#define REG_PORT_INT_MASK		0x001F</div><div class='add'>+</div><div class='add'>+#define PORT_SRC_PHY_INT		1</div><div class='add'>+#define PORT_SRC_PTP_INT		2</div><div class='add'>+</div><div class='add'>+#define KSZ8795_HUGE_PACKET_SIZE	2000</div><div class='add'>+#define KSZ8863_HUGE_PACKET_SIZE	1916</div><div class='add'>+#define KSZ8863_NORMAL_PACKET_SIZE	1536</div><div class='add'>+#define KSZ8_LEGAL_PACKET_SIZE		1518</div><div class='add'>+#define KSZ9477_MAX_FRAME_SIZE		9000</div><div class='add'>+</div><div class='add'>+#define KSZ8873_REG_GLOBAL_CTRL_12	0x0e</div><div class='add'>+/* Drive Strength of I/O Pad</div><div class='add'>+ * 0: 8mA, 1: 16mA</div><div class='add'>+ */</div><div class='add'>+#define KSZ8873_DRIVE_STRENGTH_16MA	BIT(6)</div><div class='add'>+</div><div class='add'>+#define KSZ8795_REG_SW_CTRL_20		0xa3</div><div class='add'>+#define KSZ9477_REG_SW_IO_STRENGTH	0x010d</div><div class='add'>+#define SW_DRIVE_STRENGTH_M		0x7</div><div class='add'>+#define SW_DRIVE_STRENGTH_2MA		0</div><div class='add'>+#define SW_DRIVE_STRENGTH_4MA		1</div><div class='add'>+#define SW_DRIVE_STRENGTH_8MA		2</div><div class='add'>+#define SW_DRIVE_STRENGTH_12MA		3</div><div class='add'>+#define SW_DRIVE_STRENGTH_16MA		4</div><div class='add'>+#define SW_DRIVE_STRENGTH_20MA		5</div><div class='add'>+#define SW_DRIVE_STRENGTH_24MA		6</div><div class='add'>+#define SW_DRIVE_STRENGTH_28MA		7</div><div class='add'>+#define SW_HI_SPEED_DRIVE_STRENGTH_S	4</div><div class='add'>+#define SW_LO_SPEED_DRIVE_STRENGTH_S	0</div><div class='add'>+</div><div class='add'>+/* TXQ Split Control Register for per-port, per-queue configuration.</div><div class='add'>+ * Register 0xAF is TXQ Split for Q3 on Port 1.</div><div class='add'>+ * Register offset formula: 0xAF + (port * 4) + (3 - queue)</div><div class='add'>+ *   where: port = 0..2, queue = 0..3</div><div class='add'>+ */</div><div class='add'>+#define KSZ8873_TXQ_SPLIT_CTRL_REG(port, queue) \</div><div class='add'>+	(0xAF + ((port) * 4) + (3 - (queue)))</div><div class='add'>+</div><div class='add'>+/* Bit 7 selects between:</div><div class='add'>+ *   0 = Strict priority mode (highest-priority queue first)</div><div class='add'>+ *   1 = Weighted Fair Queuing (WFQ) mode:</div><div class='add'>+ *       Queue weights: Q3:Q2:Q1:Q0 = 8:4:2:1</div><div class='add'>+ *       If any queues are empty, weight is redistributed.</div><div class='add'>+ *</div><div class='add'>+ * Note: This is referred to as "Weighted Fair Queuing" (WFQ) in KSZ8863/8873</div><div class='add'>+ * documentation, and as "Weighted Round Robin" (WRR) in KSZ9477 family docs.</div><div class='add'>+ */</div><div class='add'>+#define KSZ8873_TXQ_WFQ_ENABLE		BIT(7)</div><div class='add'>+</div><div class='add'>+#define KSZ9477_REG_PORT_OUT_RATE_0	0x0420</div><div class='add'>+#define KSZ9477_OUT_RATE_NO_LIMIT	0</div><div class='add'>+</div><div class='add'>+#define KSZ9477_PORT_MRI_TC_MAP__4	0x0808</div><div class='add'>+</div><div class='add'>+#define KSZ9477_PORT_TC_MAP_S		4</div><div class='add'>+</div><div class='add'>+/* CBS related registers */</div><div class='add'>+#define REG_PORT_MTI_QUEUE_INDEX__4	0x0900</div><div class='add'>+</div><div class='add'>+#define REG_PORT_MTI_QUEUE_CTRL_0	0x0914</div><div class='add'>+</div><div class='add'>+#define MTI_SCHEDULE_MODE_M		GENMASK(7, 6)</div><div class='add'>+#define MTI_SCHEDULE_STRICT_PRIO	0</div><div class='add'>+#define MTI_SCHEDULE_WRR		2</div><div class='add'>+#define MTI_SHAPING_M			GENMASK(5, 4)</div><div class='add'>+#define MTI_SHAPING_OFF			0</div><div class='add'>+#define MTI_SHAPING_SRP			1</div><div class='add'>+#define MTI_SHAPING_TIME_AWARE		2</div><div class='add'>+</div><div class='add'>+#define KSZ9477_PORT_MTI_QUEUE_CTRL_1	0x0915</div><div class='add'>+#define KSZ9477_DEFAULT_WRR_WEIGHT	1</div><div class='add'>+</div><div class='add'>+#define REG_PORT_MTI_HI_WATER_MARK	0x0916</div><div class='add'>+#define REG_PORT_MTI_LO_WATER_MARK	0x0918</div><div class='add'>+</div><div class='add'>+/* Regmap tables generation */</div><div class='add'>+#define KSZ_SPI_OP_RD		3</div><div class='add'>+#define KSZ_SPI_OP_WR		2</div><div class='add'>+</div><div class='add'>+#define swabnot_used(x)		0</div><div class='add'>+</div><div class='add'>+#define KSZ_SPI_OP_FLAG_MASK(opcode, swp, regbits, regpad)		\</div><div class='add'>+	swab##swp((opcode) &lt;&lt; ((regbits) + (regpad)))</div><div class='add'>+</div><div class='add'>+#define KSZ_REGMAP_ENTRY(width, swp, regbits, regpad, regalign)		\</div><div class='add'>+	{								\</div><div class='add'>+		.name = #width,						\</div><div class='add'>+		.val_bits = (width),					\</div><div class='add'>+		.reg_stride = 1,					\</div><div class='add'>+		.reg_bits = (regbits) + (regalign),			\</div><div class='add'>+		.pad_bits = (regpad),					\</div><div class='add'>+		.max_register = BIT(regbits) - 1,			\</div><div class='add'>+		.cache_type = REGCACHE_NONE,				\</div><div class='add'>+		.read_flag_mask =					\</div><div class='add'>+			KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_RD, swp,	\</div><div class='add'>+					     regbits, regpad),		\</div><div class='add'>+		.write_flag_mask =					\</div><div class='add'>+			KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_WR, swp,	\</div><div class='add'>+					     regbits, regpad),		\</div><div class='add'>+		.lock = ksz_regmap_lock,				\</div><div class='add'>+		.unlock = ksz_regmap_unlock,				\</div><div class='add'>+		.reg_format_endian = REGMAP_ENDIAN_BIG,			\</div><div class='add'>+		.val_format_endian = REGMAP_ENDIAN_BIG			\</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+#define KSZ_REGMAP_TABLE(ksz, swp, regbits, regpad, regalign)		\</div><div class='add'>+	static const struct regmap_config ksz##_regmap_config[] = {	\</div><div class='add'>+		[KSZ_REGMAP_8] = KSZ_REGMAP_ENTRY(8, swp, (regbits), (regpad), (regalign)), \</div><div class='add'>+		[KSZ_REGMAP_16] = KSZ_REGMAP_ENTRY(16, swp, (regbits), (regpad), (regalign)), \</div><div class='add'>+		[KSZ_REGMAP_32] = KSZ_REGMAP_ENTRY(32, swp, (regbits), (regpad), (regalign)), \</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+#define KSZ8463_REGMAP_ENTRY(width, regbits, regpad, regalign)		\</div><div class='add'>+	{								\</div><div class='add'>+		.name = #width,						\</div><div class='add'>+		.val_bits = (width),					\</div><div class='add'>+		.reg_stride = (width / 8),				\</div><div class='add'>+		.reg_bits = (regbits) + (regalign),			\</div><div class='add'>+		.pad_bits = (regpad),					\</div><div class='add'>+		.read = ksz8463_spi_read,				\</div><div class='add'>+		.write = ksz8463_spi_write,				\</div><div class='add'>+		.max_register = BIT(regbits) - 1,			\</div><div class='add'>+		.cache_type = REGCACHE_NONE,				\</div><div class='add'>+		.zero_flag_mask = 1,					\</div><div class='add'>+		.use_single_read = 1,					\</div><div class='add'>+		.use_single_write = 1,					\</div><div class='add'>+		.lock = ksz_regmap_lock,				\</div><div class='add'>+		.unlock = ksz_regmap_unlock,				\</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+#define KSZ8463_REGMAP_TABLE(ksz, regbits, regpad, regalign)		\</div><div class='add'>+	static const struct regmap_config ksz##_regmap_config[] = {	\</div><div class='add'>+		[KSZ_REGMAP_8] = KSZ8463_REGMAP_ENTRY(8, (regbits), (regpad), (regalign)), \</div><div class='add'>+		[KSZ_REGMAP_16] = KSZ8463_REGMAP_ENTRY(16, (regbits), (regpad), (regalign)), \</div><div class='add'>+		[KSZ_REGMAP_32] = KSZ8463_REGMAP_ENTRY(32, (regbits), (regpad), (regalign)), \</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/dsa/microchip/ksz_dcb.c b/drivers/net/dsa/microchip/ksz_dcb.c<br/>new file mode 100644<br/>index 000000000000..7131c5caac54<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz_dcb.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/ksz_dcb.c</a></div><div class='hunk'>@@ -0,0 +1,612 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+// Copyright (c) 2024 Pengutronix, Oleksij Rempel &lt;kernel@pengutronix.de&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/dsa/ksz_common.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+#include &lt;net/dscp.h&gt;</div><div class='add'>+#include &lt;net/ieee8021q.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ksz_common.h"</div><div class='add'>+#include "ksz_dcb.h"</div><div class='add'>+#include "ksz8.h"</div><div class='add'>+</div><div class='add'>+/* Port X Control 0 register.</div><div class='add'>+ * The datasheet specifies: Port 1 - 0x10, Port 2 - 0x20, Port 3 - 0x30.</div><div class='add'>+ * However, the driver uses get_port_addr(), which maps Port 1 to offset 0.</div><div class='add'>+ * Therefore, we define the base offset as 0x00 here to align with that logic.</div><div class='add'>+ */</div><div class='add'>+#define KSZ8_REG_PORT_1_CTRL_0			0x00</div><div class='add'>+#define KSZ8463_REG_PORT_1_CTRL_0		0x6C</div><div class='add'>+#define KSZ8_PORT_DIFFSERV_ENABLE		BIT(6)</div><div class='add'>+#define KSZ8_PORT_802_1P_ENABLE			BIT(5)</div><div class='add'>+#define KSZ8_PORT_BASED_PRIO_M			GENMASK(4, 3)</div><div class='add'>+</div><div class='add'>+#define KSZ8463_REG_TOS_DSCP_CTRL		0x16</div><div class='add'>+#define KSZ88X3_REG_TOS_DSCP_CTRL		0x60</div><div class='add'>+#define KSZ8765_REG_TOS_DSCP_CTRL		0x90</div><div class='add'>+</div><div class='add'>+#define KSZ9477_REG_SW_MAC_TOS_CTRL		0x033e</div><div class='add'>+#define KSZ9477_SW_TOS_DSCP_REMAP		BIT(0)</div><div class='add'>+#define KSZ9477_SW_TOS_DSCP_DEFAULT_PRIO_M	GENMASK(5, 3)</div><div class='add'>+</div><div class='add'>+#define KSZ9477_REG_DIFFSERV_PRIO_MAP		0x0340</div><div class='add'>+</div><div class='add'>+#define KSZ9477_REG_PORT_MRI_PRIO_CTRL		0x0801</div><div class='add'>+#define KSZ9477_PORT_HIGHEST_PRIO		BIT(7)</div><div class='add'>+#define KSZ9477_PORT_OR_PRIO			BIT(6)</div><div class='add'>+#define KSZ9477_PORT_MAC_PRIO_ENABLE		BIT(4)</div><div class='add'>+#define KSZ9477_PORT_VLAN_PRIO_ENABLE		BIT(3)</div><div class='add'>+#define KSZ9477_PORT_802_1P_PRIO_ENABLE		BIT(2)</div><div class='add'>+#define KSZ9477_PORT_DIFFSERV_PRIO_ENABLE	BIT(1)</div><div class='add'>+#define KSZ9477_PORT_ACL_PRIO_ENABLE		BIT(0)</div><div class='add'>+</div><div class='add'>+#define KSZ9477_REG_PORT_MRI_MAC_CTRL		0x0802</div><div class='add'>+#define KSZ9477_PORT_BASED_PRIO_M		GENMASK(2, 0)</div><div class='add'>+</div><div class='add'>+struct ksz_apptrust_map {</div><div class='add'>+	u8 apptrust;</div><div class='add'>+	u8 bit;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ksz_apptrust_map ksz8_apptrust_map_to_bit[] = {</div><div class='add'>+	{ DCB_APP_SEL_PCP, KSZ8_PORT_802_1P_ENABLE },</div><div class='add'>+	{ IEEE_8021QAZ_APP_SEL_DSCP, KSZ8_PORT_DIFFSERV_ENABLE },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ksz_apptrust_map ksz9477_apptrust_map_to_bit[] = {</div><div class='add'>+	{ DCB_APP_SEL_PCP, KSZ9477_PORT_802_1P_PRIO_ENABLE },</div><div class='add'>+	{ IEEE_8021QAZ_APP_SEL_DSCP, KSZ9477_PORT_DIFFSERV_PRIO_ENABLE },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* ksz_supported_apptrust[] - Supported apptrust selectors and Priority Order</div><div class='add'>+ *			      of Internal Priority Map (IPM) sources.</div><div class='add'>+ *</div><div class='add'>+ * This array defines the apptrust selectors supported by the hardware, where</div><div class='add'>+ * the index within the array indicates the priority of the selector - lower</div><div class='add'>+ * indices correspond to higher priority. This fixed priority scheme is due to</div><div class='add'>+ * the hardware's design, which does not support configurable priority among</div><div class='add'>+ * different priority sources.</div><div class='add'>+ *</div><div class='add'>+ * The priority sources, including Tail Tag, ACL, VLAN PCP and DSCP are ordered</div><div class='add'>+ * by the hardware's fixed logic, as detailed below. The order reflects a</div><div class='add'>+ * non-configurable precedence where certain types of priority information</div><div class='add'>+ * override others:</div><div class='add'>+ *</div><div class='add'>+ * 1. Tail Tag - Highest priority, overrides ACL, VLAN PCP, and DSCP priorities.</div><div class='add'>+ * 2. ACL - Overrides VLAN PCP and DSCP priorities.</div><div class='add'>+ * 3. VLAN PCP - Overrides DSCP priority.</div><div class='add'>+ * 4. DSCP - Lowest priority, does not override any other priority source.</div><div class='add'>+ *</div><div class='add'>+ * In this context, the array's lower index (higher priority) for</div><div class='add'>+ * 'DCB_APP_SEL_PCP' suggests its relative priority over</div><div class='add'>+ * 'IEEE_8021QAZ_APP_SEL_DSCP' within the system's fixed priority scheme.</div><div class='add'>+ *</div><div class='add'>+ * DCB_APP_SEL_PCP - Priority Code Point selector</div><div class='add'>+ * IEEE_8021QAZ_APP_SEL_DSCP - Differentiated Services Code Point selector</div><div class='add'>+ */</div><div class='add'>+static const u8 ksz_supported_apptrust[] = {</div><div class='add'>+	DCB_APP_SEL_PCP,</div><div class='add'>+	IEEE_8021QAZ_APP_SEL_DSCP,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char * const ksz_supported_apptrust_variants[] = {</div><div class='add'>+	"empty", "dscp", "pcp", "dscp pcp"</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void ksz_get_default_port_prio_reg(struct ksz_device *dev, int *reg,</div><div class='add'>+					  u8 *mask, int *shift)</div><div class='add'>+{</div><div class='add'>+	if (is_ksz8(dev)) {</div><div class='add'>+		*reg = KSZ8_REG_PORT_1_CTRL_0;</div><div class='add'>+		*mask = KSZ8_PORT_BASED_PRIO_M;</div><div class='add'>+		*shift = __bf_shf(KSZ8_PORT_BASED_PRIO_M);</div><div class='add'>+		if (ksz_is_ksz8463(dev))</div><div class='add'>+			*reg = KSZ8463_REG_PORT_1_CTRL_0;</div><div class='add'>+	} else {</div><div class='add'>+		*reg = KSZ9477_REG_PORT_MRI_MAC_CTRL;</div><div class='add'>+		*mask = KSZ9477_PORT_BASED_PRIO_M;</div><div class='add'>+		*shift = __bf_shf(KSZ9477_PORT_BASED_PRIO_M);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_get_dscp_prio_reg - Retrieves the DSCP-to-priority-mapping register</div><div class='add'>+ * @dev: Pointer to the KSZ switch device structure</div><div class='add'>+ * @reg: Pointer to the register address to be set</div><div class='add'>+ * @per_reg: Pointer to the number of DSCP values per register</div><div class='add'>+ * @mask: Pointer to the mask to be set</div><div class='add'>+ *</div><div class='add'>+ * This function retrieves the DSCP to priority mapping register, the number of</div><div class='add'>+ * DSCP values per register, and the mask to be set.</div><div class='add'>+ */</div><div class='add'>+static void ksz_get_dscp_prio_reg(struct ksz_device *dev, int *reg,</div><div class='add'>+				  int *per_reg, u8 *mask)</div><div class='add'>+{</div><div class='add'>+	if (ksz_is_ksz87xx(dev) || ksz_is_8895_family(dev)) {</div><div class='add'>+		*reg = KSZ8765_REG_TOS_DSCP_CTRL;</div><div class='add'>+		*per_reg = 4;</div><div class='add'>+		*mask = GENMASK(1, 0);</div><div class='add'>+	} else if (ksz_is_ksz88x3(dev) || ksz_is_ksz8463(dev)) {</div><div class='add'>+		*reg = KSZ88X3_REG_TOS_DSCP_CTRL;</div><div class='add'>+		*per_reg = 4;</div><div class='add'>+		*mask = GENMASK(1, 0);</div><div class='add'>+		if (ksz_is_ksz8463(dev))</div><div class='add'>+			*reg = KSZ8463_REG_TOS_DSCP_CTRL;</div><div class='add'>+	} else {</div><div class='add'>+		*reg = KSZ9477_REG_DIFFSERV_PRIO_MAP;</div><div class='add'>+		*per_reg = 2;</div><div class='add'>+		*mask = GENMASK(2, 0);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_get_apptrust_map_and_reg - Retrieves the apptrust map and register</div><div class='add'>+ * @dev: Pointer to the KSZ switch device structure</div><div class='add'>+ * @map: Pointer to the apptrust map to be set</div><div class='add'>+ * @reg: Pointer to the register address to be set</div><div class='add'>+ * @mask: Pointer to the mask to be set</div><div class='add'>+ *</div><div class='add'>+ * This function retrieves the apptrust map and register address for the</div><div class='add'>+ * apptrust configuration.</div><div class='add'>+ */</div><div class='add'>+static void ksz_get_apptrust_map_and_reg(struct ksz_device *dev,</div><div class='add'>+					 const struct ksz_apptrust_map **map,</div><div class='add'>+					 int *reg, u8 *mask)</div><div class='add'>+{</div><div class='add'>+	if (is_ksz8(dev)) {</div><div class='add'>+		*map = ksz8_apptrust_map_to_bit;</div><div class='add'>+		*reg = KSZ8_REG_PORT_1_CTRL_0;</div><div class='add'>+		*mask = KSZ8_PORT_DIFFSERV_ENABLE | KSZ8_PORT_802_1P_ENABLE;</div><div class='add'>+		if (ksz_is_ksz8463(dev))</div><div class='add'>+			*reg = KSZ8463_REG_PORT_1_CTRL_0;</div><div class='add'>+	} else {</div><div class='add'>+		*map = ksz9477_apptrust_map_to_bit;</div><div class='add'>+		*reg = KSZ9477_REG_PORT_MRI_PRIO_CTRL;</div><div class='add'>+		*mask = KSZ9477_PORT_802_1P_PRIO_ENABLE |</div><div class='add'>+			KSZ9477_PORT_DIFFSERV_PRIO_ENABLE;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_port_get_default_prio - Retrieves the default priority for a port on a</div><div class='add'>+ *			       KSZ switch</div><div class='add'>+ * @ds: Pointer to the DSA switch structure</div><div class='add'>+ * @port: Port number from which to get the default priority</div><div class='add'>+ *</div><div class='add'>+ * This function fetches the default priority for the specified port on a KSZ</div><div class='add'>+ * switch.</div><div class='add'>+ *</div><div class='add'>+ * Return: The default priority of the port on success, or a negative error</div><div class='add'>+ * code on failure.</div><div class='add'>+ */</div><div class='add'>+int ksz_port_get_default_prio(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	int ret, reg, shift;</div><div class='add'>+	u8 data, mask;</div><div class='add'>+</div><div class='add'>+	ksz_get_default_port_prio_reg(dev, &amp;reg, &amp;mask, &amp;shift);</div><div class='add'>+</div><div class='add'>+	ret = ksz_pread8(dev, port, reg, &amp;data);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return (data &amp; mask) &gt;&gt; shift;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_port_set_default_prio - Sets the default priority for a port on a KSZ</div><div class='add'>+ *			       switch</div><div class='add'>+ * @ds: Pointer to the DSA switch structure</div><div class='add'>+ * @port: Port number for which to set the default priority</div><div class='add'>+ * @prio: Priority value to set</div><div class='add'>+ *</div><div class='add'>+ * This function sets the default priority for the specified port on a KSZ</div><div class='add'>+ * switch.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or a negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+int ksz_port_set_default_prio(struct dsa_switch *ds, int port, u8 prio)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	int reg, shift;</div><div class='add'>+	u8 mask;</div><div class='add'>+</div><div class='add'>+	if (prio &gt;= dev-&gt;info-&gt;num_ipms)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ksz_get_default_port_prio_reg(dev, &amp;reg, &amp;mask, &amp;shift);</div><div class='add'>+</div><div class='add'>+	return ksz_prmw8(dev, port, reg, mask, (prio &lt;&lt; shift) &amp; mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_port_get_dscp_prio - Retrieves the priority for a DSCP value on a KSZ</div><div class='add'>+ *			    switch</div><div class='add'>+ * @ds: Pointer to the DSA switch structure</div><div class='add'>+ * @port: Port number for which to get the priority</div><div class='add'>+ * @dscp: DSCP value for which to get the priority</div><div class='add'>+ *</div><div class='add'>+ * This function fetches the priority value from switch global DSCP-to-priorty</div><div class='add'>+ * mapping table for the specified DSCP value.</div><div class='add'>+ *</div><div class='add'>+ * Return: The priority value for the DSCP on success, or a negative error</div><div class='add'>+ * code on failure.</div><div class='add'>+ */</div><div class='add'>+int ksz_port_get_dscp_prio(struct dsa_switch *ds, int port, u8 dscp)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	int reg, per_reg, ret, shift;</div><div class='add'>+	u8 data, mask;</div><div class='add'>+</div><div class='add'>+	ksz_get_dscp_prio_reg(dev, &amp;reg, &amp;per_reg, &amp;mask);</div><div class='add'>+</div><div class='add'>+	/* If DSCP remapping is disabled, DSCP bits 3-5 are used as Internal</div><div class='add'>+	 * Priority Map (IPM)</div><div class='add'>+	 */</div><div class='add'>+	if (!is_ksz8(dev)) {</div><div class='add'>+		ret = ksz_read8(dev, KSZ9477_REG_SW_MAC_TOS_CTRL, &amp;data);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		/* If DSCP remapping is disabled, DSCP bits 3-5 are used as</div><div class='add'>+		 * Internal Priority Map (IPM)</div><div class='add'>+		 */</div><div class='add'>+		if (!(data &amp; KSZ9477_SW_TOS_DSCP_REMAP))</div><div class='add'>+			return FIELD_GET(KSZ9477_SW_TOS_DSCP_DEFAULT_PRIO_M,</div><div class='add'>+					 dscp);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* In case DSCP remapping is enabled, we need to write the DSCP to</div><div class='add'>+	 * priority mapping table.</div><div class='add'>+	 */</div><div class='add'>+	reg += dscp / per_reg;</div><div class='add'>+	ret = ksz_read8(dev, reg, &amp;data);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	shift = (dscp % per_reg) * (8 / per_reg);</div><div class='add'>+</div><div class='add'>+	return (data &gt;&gt; shift) &amp; mask;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_set_global_dscp_entry - Sets the global DSCP-to-priority mapping entry</div><div class='add'>+ * @dev: Pointer to the KSZ switch device structure</div><div class='add'>+ * @dscp: DSCP value for which to set the priority</div><div class='add'>+ * @ipm: Priority value to set</div><div class='add'>+ *</div><div class='add'>+ * This function sets the global DSCP-to-priority mapping entry for the</div><div class='add'>+ * specified DSCP value.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or a negative error code on failure.</div><div class='add'>+ */</div><div class='add'>+static int ksz_set_global_dscp_entry(struct ksz_device *dev, u8 dscp, u8 ipm)</div><div class='add'>+{</div><div class='add'>+	int reg, per_reg, shift;</div><div class='add'>+	u8 mask;</div><div class='add'>+</div><div class='add'>+	ksz_get_dscp_prio_reg(dev, &amp;reg, &amp;per_reg, &amp;mask);</div><div class='add'>+</div><div class='add'>+	shift = (dscp % per_reg) * (8 / per_reg);</div><div class='add'>+</div><div class='add'>+	return ksz_rmw8(dev, reg + (dscp / per_reg), mask &lt;&lt; shift,</div><div class='add'>+			ipm &lt;&lt; shift);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_init_global_dscp_map - Initializes the global DSCP-to-priority mapping</div><div class='add'>+ * @dev: Pointer to the KSZ switch device structure</div><div class='add'>+ *</div><div class='add'>+ * This function initializes the global DSCP-to-priority mapping table for the</div><div class='add'>+ * switch.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or a negative error code on failure</div><div class='add'>+ */</div><div class='add'>+static int ksz_init_global_dscp_map(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	int ret, dscp;</div><div class='add'>+</div><div class='add'>+	/* On KSZ9xxx variants, DSCP remapping is disabled by default.</div><div class='add'>+	 * Enable to have, predictable and reproducible behavior across</div><div class='add'>+	 * different devices.</div><div class='add'>+	 */</div><div class='add'>+	if (!is_ksz8(dev)) {</div><div class='add'>+		ret = ksz_rmw8(dev, KSZ9477_REG_SW_MAC_TOS_CTRL,</div><div class='add'>+			       KSZ9477_SW_TOS_DSCP_REMAP,</div><div class='add'>+			       KSZ9477_SW_TOS_DSCP_REMAP);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (dscp = 0; dscp &lt; DSCP_MAX; dscp++) {</div><div class='add'>+		int ipm, tt;</div><div class='add'>+</div><div class='add'>+		/* Map DSCP to Traffic Type, which is corresponding to the</div><div class='add'>+		 * Internal Priority Map (IPM) in the switch.</div><div class='add'>+		 */</div><div class='add'>+		if (!is_ksz8(dev)) {</div><div class='add'>+			ipm = ietf_dscp_to_ieee8021q_tt(dscp);</div><div class='add'>+		} else {</div><div class='add'>+			/* On KSZ8xxx variants we do not have IPM to queue</div><div class='add'>+			 * remapping table. We need to convert DSCP to Traffic</div><div class='add'>+			 * Type and then to queue.</div><div class='add'>+			 */</div><div class='add'>+			tt = ietf_dscp_to_ieee8021q_tt(dscp);</div><div class='add'>+			if (tt &lt; 0)</div><div class='add'>+				return tt;</div><div class='add'>+</div><div class='add'>+			ipm = ieee8021q_tt_to_tc(tt, dev-&gt;info-&gt;num_tx_queues);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (ipm &lt; 0)</div><div class='add'>+			return ipm;</div><div class='add'>+</div><div class='add'>+		ret = ksz_set_global_dscp_entry(dev, dscp, ipm);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_port_add_dscp_prio - Adds a DSCP-to-priority mapping entry for a port on</div><div class='add'>+ *			    a KSZ switch.</div><div class='add'>+ * @ds: Pointer to the DSA switch structure</div><div class='add'>+ * @port: Port number for which to add the DSCP-to-priority mapping entry</div><div class='add'>+ * @dscp: DSCP value for which to add the priority</div><div class='add'>+ * @prio: Priority value to set</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or a negative error code on failure</div><div class='add'>+ */</div><div class='add'>+int ksz_port_add_dscp_prio(struct dsa_switch *ds, int port, u8 dscp, u8 prio)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (prio &gt;= dev-&gt;info-&gt;num_ipms)</div><div class='add'>+		return -ERANGE;</div><div class='add'>+</div><div class='add'>+	return ksz_set_global_dscp_entry(dev, dscp, prio);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_port_del_dscp_prio - Deletes a DSCP-to-priority mapping entry for a port</div><div class='add'>+ *			    on a KSZ switch.</div><div class='add'>+ * @ds: Pointer to the DSA switch structure</div><div class='add'>+ * @port: Port number for which to delete the DSCP-to-priority mapping entry</div><div class='add'>+ * @dscp: DSCP value for which to delete the priority</div><div class='add'>+ * @prio: Priority value to delete</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or a negative error code on failure</div><div class='add'>+ */</div><div class='add'>+int ksz_port_del_dscp_prio(struct dsa_switch *ds, int port, u8 dscp, u8 prio)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	int ipm;</div><div class='add'>+</div><div class='add'>+	if (ksz_port_get_dscp_prio(ds, port, dscp) != prio)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (is_ksz8(dev)) {</div><div class='add'>+		ipm = ieee8021q_tt_to_tc(IEEE8021Q_TT_BE,</div><div class='add'>+					 dev-&gt;info-&gt;num_tx_queues);</div><div class='add'>+		if (ipm &lt; 0)</div><div class='add'>+			return ipm;</div><div class='add'>+	} else {</div><div class='add'>+		ipm = IEEE8021Q_TT_BE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ksz_set_global_dscp_entry(dev, dscp, ipm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_apptrust_error - Prints an error message for an invalid apptrust selector</div><div class='add'>+ * @dev: Pointer to the KSZ switch device structure</div><div class='add'>+ *</div><div class='add'>+ * This function prints an error message when an invalid apptrust selector is</div><div class='add'>+ * provided.</div><div class='add'>+ */</div><div class='add'>+static void ksz_apptrust_error(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	char supported_apptrust_variants[64];</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	supported_apptrust_variants[0] = '\0';</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(ksz_supported_apptrust_variants); i++) {</div><div class='add'>+		if (i &gt; 0)</div><div class='add'>+			strlcat(supported_apptrust_variants, ", ",</div><div class='add'>+				sizeof(supported_apptrust_variants));</div><div class='add'>+		strlcat(supported_apptrust_variants,</div><div class='add'>+			ksz_supported_apptrust_variants[i],</div><div class='add'>+			sizeof(supported_apptrust_variants));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_err(dev-&gt;dev, "Invalid apptrust selector or priority order. Supported: %s\n",</div><div class='add'>+		supported_apptrust_variants);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_port_set_apptrust_validate - Validates the apptrust selectors</div><div class='add'>+ * @dev: Pointer to the KSZ switch device structure</div><div class='add'>+ * @port: Port number for which to set the apptrust selectors</div><div class='add'>+ * @sel: Array of apptrust selectors to validate</div><div class='add'>+ * @nsel: Number of apptrust selectors in the array</div><div class='add'>+ *</div><div class='add'>+ * This function validates the apptrust selectors provided and ensures that</div><div class='add'>+ * they are in the correct order.</div><div class='add'>+ *</div><div class='add'>+ * This family of switches supports two apptrust selectors: DCB_APP_SEL_PCP and</div><div class='add'>+ * IEEE_8021QAZ_APP_SEL_DSCP. The priority order of the selectors is fixed and</div><div class='add'>+ * cannot be changed. The order is as follows:</div><div class='add'>+ * 1. DCB_APP_SEL_PCP - Priority Code Point selector (highest priority)</div><div class='add'>+ * 2. IEEE_8021QAZ_APP_SEL_DSCP - Differentiated Services Code Point selector</div><div class='add'>+ *   (lowest priority)</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or a negative error code on failure</div><div class='add'>+ */</div><div class='add'>+static int ksz_port_set_apptrust_validate(struct ksz_device *dev, int port,</div><div class='add'>+					  const u8 *sel, int nsel)</div><div class='add'>+{</div><div class='add'>+	int i, j, found;</div><div class='add'>+	int j_prev = 0;</div><div class='add'>+</div><div class='add'>+	/* Iterate through the requested selectors */</div><div class='add'>+	for (i = 0; i &lt; nsel; i++) {</div><div class='add'>+		found = 0;</div><div class='add'>+</div><div class='add'>+		/* Check if the current selector is supported by the hardware */</div><div class='add'>+		for (j = 0; j &lt; sizeof(ksz_supported_apptrust); j++) {</div><div class='add'>+			if (sel[i] != ksz_supported_apptrust[j])</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			found = 1;</div><div class='add'>+</div><div class='add'>+			/* Ensure that no higher priority selector (lower index)</div><div class='add'>+			 * precedes a lower priority one</div><div class='add'>+			 */</div><div class='add'>+			if (i &gt; 0 &amp;&amp; j &lt;= j_prev)</div><div class='add'>+				goto err_sel_not_vaild;</div><div class='add'>+</div><div class='add'>+			j_prev = j;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!found)</div><div class='add'>+			goto err_sel_not_vaild;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_sel_not_vaild:</div><div class='add'>+	ksz_apptrust_error(dev);</div><div class='add'>+</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_port_set_apptrust - Sets the apptrust selectors for a port on a KSZ</div><div class='add'>+ *			   switch</div><div class='add'>+ * @ds: Pointer to the DSA switch structure</div><div class='add'>+ * @port: Port number for which to set the apptrust selectors</div><div class='add'>+ * @sel: Array of apptrust selectors to set</div><div class='add'>+ * @nsel: Number of apptrust selectors in the array</div><div class='add'>+ *</div><div class='add'>+ * This function sets the apptrust selectors for the specified port on a KSZ</div><div class='add'>+ * switch.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or a negative error code on failure</div><div class='add'>+ */</div><div class='add'>+int ksz_port_set_apptrust(struct dsa_switch *ds, int port,</div><div class='add'>+			  const u8 *sel, int nsel)</div><div class='add'>+{</div><div class='add'>+	const struct ksz_apptrust_map *map;</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	int reg, i, ret;</div><div class='add'>+	u8 data = 0;</div><div class='add'>+	u8 mask;</div><div class='add'>+</div><div class='add'>+	ret = ksz_port_set_apptrust_validate(dev, port, sel, nsel);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ksz_get_apptrust_map_and_reg(dev, &amp;map, &amp;reg, &amp;mask);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; nsel; i++) {</div><div class='add'>+		int j;</div><div class='add'>+</div><div class='add'>+		for (j = 0; j &lt; ARRAY_SIZE(ksz_supported_apptrust); j++) {</div><div class='add'>+			if (sel[i] != ksz_supported_apptrust[j])</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			data |= map[j].bit;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ksz_prmw8(dev, port, reg, mask, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_port_get_apptrust - Retrieves the apptrust selectors for a port on a KSZ</div><div class='add'>+ *			   switch</div><div class='add'>+ * @ds: Pointer to the DSA switch structure</div><div class='add'>+ * @port: Port number for which to get the apptrust selectors</div><div class='add'>+ * @sel: Array to store the apptrust selectors</div><div class='add'>+ * @nsel: Number of apptrust selectors in the array</div><div class='add'>+ *</div><div class='add'>+ * This function fetches the apptrust selectors for the specified port on a KSZ</div><div class='add'>+ * switch.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or a negative error code on failure</div><div class='add'>+ */</div><div class='add'>+int ksz_port_get_apptrust(struct dsa_switch *ds, int port, u8 *sel, int *nsel)</div><div class='add'>+{</div><div class='add'>+	const struct ksz_apptrust_map *map;</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	int reg, i, ret;</div><div class='add'>+	u8 data;</div><div class='add'>+	u8 mask;</div><div class='add'>+</div><div class='add'>+	ksz_get_apptrust_map_and_reg(dev, &amp;map, &amp;reg, &amp;mask);</div><div class='add'>+</div><div class='add'>+	ret = ksz_pread8(dev, port, reg, &amp;data);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	*nsel = 0;</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(ksz_supported_apptrust); i++) {</div><div class='add'>+		if (data &amp; map[i].bit)</div><div class='add'>+			sel[(*nsel)++] = ksz_supported_apptrust[i];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_dcb_init_port - Initializes the DCB configuration for a port on a KSZ</div><div class='add'>+ * @dev: Pointer to the KSZ switch device structure</div><div class='add'>+ * @port: Port number for which to initialize the DCB configuration</div><div class='add'>+ *</div><div class='add'>+ * This function initializes the DCB configuration for the specified port on a</div><div class='add'>+ * KSZ switch. Particular DCB configuration is set for the port, including the</div><div class='add'>+ * default priority and apptrust selectors.</div><div class='add'>+ * The default priority is set to Best Effort, and the apptrust selectors are</div><div class='add'>+ * set to all supported selectors.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or a negative error code on failure</div><div class='add'>+ */</div><div class='add'>+int ksz_dcb_init_port(struct ksz_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	const u8 ksz_default_apptrust[] = { DCB_APP_SEL_PCP };</div><div class='add'>+	int ret, ipm;</div><div class='add'>+</div><div class='add'>+	if (is_ksz8(dev)) {</div><div class='add'>+		ipm = ieee8021q_tt_to_tc(IEEE8021Q_TT_BE,</div><div class='add'>+					 dev-&gt;info-&gt;num_tx_queues);</div><div class='add'>+		if (ipm &lt; 0)</div><div class='add'>+			return ipm;</div><div class='add'>+	} else {</div><div class='add'>+		ipm = IEEE8021Q_TT_BE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set the default priority for the port to Best Effort */</div><div class='add'>+	ret = ksz_port_set_default_prio(dev-&gt;ds, port, ipm);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return ksz_port_set_apptrust(dev-&gt;ds, port, ksz_default_apptrust,</div><div class='add'>+				     ARRAY_SIZE(ksz_default_apptrust));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * ksz_dcb_init - Initializes the DCB configuration for a KSZ switch</div><div class='add'>+ * @dev: Pointer to the KSZ switch device structure</div><div class='add'>+ *</div><div class='add'>+ * This function initializes the DCB configuration for a KSZ switch. The global</div><div class='add'>+ * DSCP-to-priority mapping table is initialized.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or a negative error code on failure</div><div class='add'>+ */</div><div class='add'>+int ksz_dcb_init(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	return ksz_init_global_dscp_map(dev);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/dsa/microchip/ksz_dcb.h b/drivers/net/dsa/microchip/ksz_dcb.h<br/>new file mode 100644<br/>index 000000000000..e2065223ba90<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz_dcb.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/ksz_dcb.h</a></div><div class='hunk'>@@ -0,0 +1,23 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) 2024 Pengutronix, Oleksij Rempel &lt;kernel@pengutronix.de&gt; */</div><div class='add'>+</div><div class='add'>+#ifndef __KSZ_DCB_H</div><div class='add'>+#define __KSZ_DCB_H</div><div class='add'>+</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ksz_common.h"</div><div class='add'>+</div><div class='add'>+int ksz_port_get_default_prio(struct dsa_switch *ds, int port);</div><div class='add'>+int ksz_port_set_default_prio(struct dsa_switch *ds, int port, u8 prio);</div><div class='add'>+int ksz_port_get_dscp_prio(struct dsa_switch *ds, int port, u8 dscp);</div><div class='add'>+int ksz_port_add_dscp_prio(struct dsa_switch *ds, int port, u8 dscp, u8 prio);</div><div class='add'>+int ksz_port_del_dscp_prio(struct dsa_switch *ds, int port, u8 dscp, u8 prio);</div><div class='add'>+int ksz_port_set_apptrust(struct dsa_switch *ds, int port,</div><div class='add'>+			  const unsigned char *sel,</div><div class='add'>+			  int nsel);</div><div class='add'>+int ksz_port_get_apptrust(struct dsa_switch *ds, int port, u8 *sel, int *nsel);</div><div class='add'>+int ksz_dcb_init_port(struct ksz_device *dev, int port);</div><div class='add'>+int ksz_dcb_init(struct ksz_device *dev);</div><div class='add'>+</div><div class='add'>+#endif /* __KSZ_DCB_H */</div><div class='head'>diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchip/ksz_ptp.c<br/>new file mode 100644<br/>index 000000000000..997e4a76d0a6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz_ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/ksz_ptp.c</a></div><div class='hunk'>@@ -0,0 +1,1188 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Microchip KSZ PTP Implementation</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2020 ARRI Lighting</div><div class='add'>+ * Copyright (C) 2022 Microchip Technology Inc.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/dsa/ksz_common.h&gt;</div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/irqdomain.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/ptp_classify.h&gt;</div><div class='add'>+#include &lt;linux/ptp_clock_kernel.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ksz_common.h"</div><div class='add'>+#include "ksz_ptp.h"</div><div class='add'>+#include "ksz_ptp_reg.h"</div><div class='add'>+</div><div class='add'>+#define ptp_caps_to_data(d) container_of((d), struct ksz_ptp_data, caps)</div><div class='add'>+#define ptp_data_to_ksz_dev(d) container_of((d), struct ksz_device, ptp_data)</div><div class='add'>+#define work_to_xmit_work(w) \</div><div class='add'>+		container_of((w), struct ksz_deferred_xmit_work, work)</div><div class='add'>+</div><div class='add'>+/* Sub-nanoseconds-adj,max * sub-nanoseconds / 40ns * 1ns</div><div class='add'>+ * = (2^30-1) * (2 ^ 32) / 40 ns * 1 ns = 6249999</div><div class='add'>+ */</div><div class='add'>+#define KSZ_MAX_DRIFT_CORR 6249999</div><div class='add'>+#define KSZ_MAX_PULSE_WIDTH 125000000LL</div><div class='add'>+</div><div class='add'>+#define KSZ_PTP_INC_NS 40ULL  /* HW clock is incremented every 40 ns (by 40) */</div><div class='add'>+#define KSZ_PTP_SUBNS_BITS 32</div><div class='add'>+</div><div class='add'>+#define KSZ_PTP_INT_START 13</div><div class='add'>+</div><div class='add'>+static int ksz_ptp_tou_gpio(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!is_lan937x(dev))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ret = ksz_rmw32(dev, REG_PTP_CTRL_STAT__4, GPIO_OUT,</div><div class='add'>+			GPIO_OUT);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ksz_rmw32(dev, REG_SW_GLOBAL_LED_OVR__4, LED_OVR_1 | LED_OVR_2,</div><div class='add'>+			LED_OVR_1 | LED_OVR_2);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return ksz_rmw32(dev, REG_SW_GLOBAL_LED_SRC__4,</div><div class='add'>+			 LED_SRC_PTP_GPIO_1 | LED_SRC_PTP_GPIO_2,</div><div class='add'>+			 LED_SRC_PTP_GPIO_1 | LED_SRC_PTP_GPIO_2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_ptp_tou_reset(struct ksz_device *dev, u8 unit)</div><div class='add'>+{</div><div class='add'>+	u32 data;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Reset trigger unit (clears TRIGGER_EN, but not GPIOSTATx) */</div><div class='add'>+	ret = ksz_rmw32(dev, REG_PTP_CTRL_STAT__4, TRIG_RESET, TRIG_RESET);</div><div class='add'>+</div><div class='add'>+	data = FIELD_PREP(TRIG_DONE_M, BIT(unit));</div><div class='add'>+	ret = ksz_write32(dev, REG_PTP_TRIG_STATUS__4, data);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	data = FIELD_PREP(TRIG_INT_M, BIT(unit));</div><div class='add'>+	ret = ksz_write32(dev, REG_PTP_INT_STATUS__4, data);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Clear reset and set GPIO direction */</div><div class='add'>+	return ksz_rmw32(dev, REG_PTP_CTRL_STAT__4, (TRIG_RESET | TRIG_ENABLE),</div><div class='add'>+			 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_ptp_tou_pulse_verify(u64 pulse_ns)</div><div class='add'>+{</div><div class='add'>+	u32 data;</div><div class='add'>+</div><div class='add'>+	if (pulse_ns &amp; 0x3)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	data = (pulse_ns / 8);</div><div class='add'>+	if (!FIELD_FIT(TRIG_PULSE_WIDTH_M, data))</div><div class='add'>+		return -ERANGE;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_ptp_tou_target_time_set(struct ksz_device *dev,</div><div class='add'>+				       struct timespec64 const *ts)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Hardware has only 32 bit */</div><div class='add'>+	if ((ts-&gt;tv_sec &amp; 0xffffffff) != ts-&gt;tv_sec)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = ksz_write32(dev, REG_TRIG_TARGET_NANOSEC, ts-&gt;tv_nsec);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ksz_write32(dev, REG_TRIG_TARGET_SEC, ts-&gt;tv_sec);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_ptp_tou_start(struct ksz_device *dev, u8 unit)</div><div class='add'>+{</div><div class='add'>+	u32 data;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = ksz_rmw32(dev, REG_PTP_CTRL_STAT__4, TRIG_ENABLE, TRIG_ENABLE);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Check error flag:</div><div class='add'>+	 * - the ACTIVE flag is NOT cleared an error!</div><div class='add'>+	 */</div><div class='add'>+	ret = ksz_read32(dev, REG_PTP_TRIG_STATUS__4, &amp;data);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (FIELD_GET(TRIG_ERROR_M, data) &amp; (1 &lt;&lt; unit)) {</div><div class='add'>+		dev_err(dev-&gt;dev, "%s: Trigger unit%d error!\n", __func__,</div><div class='add'>+			unit);</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		/* Unit will be reset on next access */</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_ptp_configure_perout(struct ksz_device *dev,</div><div class='add'>+				    u32 cycle_width_ns, u32 pulse_width_ns,</div><div class='add'>+				    struct timespec64 const *target_time,</div><div class='add'>+				    u8 index)</div><div class='add'>+{</div><div class='add'>+	u32 data;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	data = FIELD_PREP(TRIG_NOTIFY, 1) |</div><div class='add'>+		FIELD_PREP(TRIG_GPO_M, index) |</div><div class='add'>+		FIELD_PREP(TRIG_PATTERN_M, TRIG_POS_PERIOD);</div><div class='add'>+	ret = ksz_write32(dev, REG_TRIG_CTRL__4, data);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ksz_write32(dev, REG_TRIG_CYCLE_WIDTH, cycle_width_ns);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Set cycle count 0 - Infinite */</div><div class='add'>+	ret = ksz_rmw32(dev, REG_TRIG_CYCLE_CNT, TRIG_CYCLE_CNT_M, 0);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	data = (pulse_width_ns / 8);</div><div class='add'>+	ret = ksz_write32(dev, REG_TRIG_PULSE_WIDTH__4, data);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ksz_ptp_tou_target_time_set(dev, target_time);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_ptp_enable_perout(struct ksz_device *dev,</div><div class='add'>+				 struct ptp_perout_request const *request,</div><div class='add'>+				 int on)</div><div class='add'>+{</div><div class='add'>+	struct ksz_ptp_data *ptp_data = &amp;dev-&gt;ptp_data;</div><div class='add'>+	u64 req_pulse_width_ns;</div><div class='add'>+	u64 cycle_width_ns;</div><div class='add'>+	u64 pulse_width_ns;</div><div class='add'>+	int pin = 0;</div><div class='add'>+	u32 data32;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (request-&gt;flags &amp; ~PTP_PEROUT_DUTY_CYCLE)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (ptp_data-&gt;tou_mode != KSZ_PTP_TOU_PEROUT &amp;&amp;</div><div class='add'>+	    ptp_data-&gt;tou_mode != KSZ_PTP_TOU_IDLE)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	pin = ptp_find_pin(ptp_data-&gt;clock, PTP_PF_PEROUT, request-&gt;index);</div><div class='add'>+	if (pin &lt; 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	data32 = FIELD_PREP(PTP_GPIO_INDEX, pin) |</div><div class='add'>+		 FIELD_PREP(PTP_TOU_INDEX, request-&gt;index);</div><div class='add'>+	ret = ksz_rmw32(dev, REG_PTP_UNIT_INDEX__4,</div><div class='add'>+			PTP_GPIO_INDEX | PTP_TOU_INDEX, data32);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ksz_ptp_tou_reset(dev, request-&gt;index);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (!on) {</div><div class='add'>+		ptp_data-&gt;tou_mode = KSZ_PTP_TOU_IDLE;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ptp_data-&gt;perout_target_time_first.tv_sec  = request-&gt;start.sec;</div><div class='add'>+	ptp_data-&gt;perout_target_time_first.tv_nsec = request-&gt;start.nsec;</div><div class='add'>+</div><div class='add'>+	ptp_data-&gt;perout_period.tv_sec = request-&gt;period.sec;</div><div class='add'>+	ptp_data-&gt;perout_period.tv_nsec = request-&gt;period.nsec;</div><div class='add'>+</div><div class='add'>+	cycle_width_ns = timespec64_to_ns(&amp;ptp_data-&gt;perout_period);</div><div class='add'>+	if ((cycle_width_ns &amp; TRIG_CYCLE_WIDTH_M) != cycle_width_ns)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (request-&gt;flags &amp; PTP_PEROUT_DUTY_CYCLE) {</div><div class='add'>+		pulse_width_ns = request-&gt;on.sec * NSEC_PER_SEC +</div><div class='add'>+			request-&gt;on.nsec;</div><div class='add'>+	} else {</div><div class='add'>+		/* Use a duty cycle of 50%. Maximum pulse width supported by the</div><div class='add'>+		 * hardware is a little bit more than 125 ms.</div><div class='add'>+		 */</div><div class='add'>+		req_pulse_width_ns = (request-&gt;period.sec * NSEC_PER_SEC +</div><div class='add'>+				      request-&gt;period.nsec) / 2;</div><div class='add'>+		pulse_width_ns = min_t(u64, req_pulse_width_ns,</div><div class='add'>+				       KSZ_MAX_PULSE_WIDTH);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ksz_ptp_tou_pulse_verify(pulse_width_ns);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ksz_ptp_configure_perout(dev, cycle_width_ns, pulse_width_ns,</div><div class='add'>+				       &amp;ptp_data-&gt;perout_target_time_first,</div><div class='add'>+				       pin);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ksz_ptp_tou_gpio(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ksz_ptp_tou_start(dev, request-&gt;index);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ptp_data-&gt;tou_mode = KSZ_PTP_TOU_PEROUT;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_ptp_enable_mode(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ksz_tagger_data *tagger_data = ksz_tagger_data(dev-&gt;ds);</div><div class='add'>+	struct ksz_ptp_data *ptp_data = &amp;dev-&gt;ptp_data;</div><div class='add'>+	struct ksz_port *prt;</div><div class='add'>+	struct dsa_port *dp;</div><div class='add'>+	bool tag_en = false;</div><div class='add'>+</div><div class='add'>+	dsa_switch_for_each_user_port(dp, dev-&gt;ds) {</div><div class='add'>+		prt = &amp;dev-&gt;ports[dp-&gt;index];</div><div class='add'>+		if (prt-&gt;hwts_tx_en || prt-&gt;hwts_rx_en) {</div><div class='add'>+			tag_en = true;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (tag_en) {</div><div class='add'>+		ptp_schedule_worker(ptp_data-&gt;clock, 0);</div><div class='add'>+	} else {</div><div class='add'>+		ptp_cancel_worker_sync(ptp_data-&gt;clock);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tagger_data-&gt;hwtstamp_set_state(dev-&gt;ds, tag_en);</div><div class='add'>+</div><div class='add'>+	return ksz_rmw16(dev, REG_PTP_MSG_CONF1, PTP_ENABLE,</div><div class='add'>+			 tag_en ? PTP_ENABLE : 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The function is return back the capability of timestamping feature when</div><div class='add'>+ * requested through ethtool -T &lt;interface&gt; utility</div><div class='add'>+ */</div><div class='add'>+int ksz_get_ts_info(struct dsa_switch *ds, int port, struct kernel_ethtool_ts_info *ts)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	struct ksz_ptp_data *ptp_data;</div><div class='add'>+</div><div class='add'>+	ptp_data = &amp;dev-&gt;ptp_data;</div><div class='add'>+</div><div class='add'>+	if (!ptp_data-&gt;clock)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	ts-&gt;so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE |</div><div class='add'>+			      SOF_TIMESTAMPING_RX_HARDWARE |</div><div class='add'>+			      SOF_TIMESTAMPING_RAW_HARDWARE;</div><div class='add'>+</div><div class='add'>+	ts-&gt;tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ONESTEP_P2P);</div><div class='add'>+</div><div class='add'>+	if (is_lan937x(dev))</div><div class='add'>+		ts-&gt;tx_types |= BIT(HWTSTAMP_TX_ON);</div><div class='add'>+</div><div class='add'>+	ts-&gt;rx_filters = BIT(HWTSTAMP_FILTER_NONE) |</div><div class='add'>+			 BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |</div><div class='add'>+			 BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |</div><div class='add'>+			 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT);</div><div class='add'>+</div><div class='add'>+	ts-&gt;phc_index = ptp_clock_index(ptp_data-&gt;clock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz_hwtstamp_get(struct dsa_switch *ds, int port,</div><div class='add'>+		     struct kernel_hwtstamp_config *config)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	struct ksz_port *prt;</div><div class='add'>+</div><div class='add'>+	prt = &amp;dev-&gt;ports[port];</div><div class='add'>+	*config = prt-&gt;tstamp_config;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_set_hwtstamp_config(struct ksz_device *dev,</div><div class='add'>+				   struct ksz_port *prt,</div><div class='add'>+				   struct kernel_hwtstamp_config *config)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (config-&gt;flags)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	switch (config-&gt;tx_type) {</div><div class='add'>+	case HWTSTAMP_TX_OFF:</div><div class='add'>+		prt-&gt;ptpmsg_irq[KSZ_SYNC_MSG].ts_en  = false;</div><div class='add'>+		prt-&gt;ptpmsg_irq[KSZ_XDREQ_MSG].ts_en = false;</div><div class='add'>+		prt-&gt;ptpmsg_irq[KSZ_PDRES_MSG].ts_en = false;</div><div class='add'>+		prt-&gt;hwts_tx_en = false;</div><div class='add'>+		break;</div><div class='add'>+	case HWTSTAMP_TX_ONESTEP_P2P:</div><div class='add'>+		prt-&gt;ptpmsg_irq[KSZ_SYNC_MSG].ts_en  = false;</div><div class='add'>+		prt-&gt;ptpmsg_irq[KSZ_XDREQ_MSG].ts_en = true;</div><div class='add'>+		prt-&gt;ptpmsg_irq[KSZ_PDRES_MSG].ts_en = false;</div><div class='add'>+		prt-&gt;hwts_tx_en = true;</div><div class='add'>+</div><div class='add'>+		ret = ksz_rmw16(dev, REG_PTP_MSG_CONF1, PTP_1STEP, PTP_1STEP);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+	case HWTSTAMP_TX_ON:</div><div class='add'>+		if (!is_lan937x(dev))</div><div class='add'>+			return -ERANGE;</div><div class='add'>+</div><div class='add'>+		prt-&gt;ptpmsg_irq[KSZ_SYNC_MSG].ts_en  = true;</div><div class='add'>+		prt-&gt;ptpmsg_irq[KSZ_XDREQ_MSG].ts_en = true;</div><div class='add'>+		prt-&gt;ptpmsg_irq[KSZ_PDRES_MSG].ts_en = true;</div><div class='add'>+		prt-&gt;hwts_tx_en = true;</div><div class='add'>+</div><div class='add'>+		ret = ksz_rmw16(dev, REG_PTP_MSG_CONF1, PTP_1STEP, 0);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (config-&gt;rx_filter) {</div><div class='add'>+	case HWTSTAMP_FILTER_NONE:</div><div class='add'>+		prt-&gt;hwts_rx_en = false;</div><div class='add'>+		break;</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:</div><div class='add'>+		config-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_EVENT;</div><div class='add'>+		prt-&gt;hwts_rx_en = true;</div><div class='add'>+		break;</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:</div><div class='add'>+		config-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT;</div><div class='add'>+		prt-&gt;hwts_rx_en = true;</div><div class='add'>+		break;</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_EVENT:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_SYNC:</div><div class='add'>+		config-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;</div><div class='add'>+		prt-&gt;hwts_rx_en = true;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		config-&gt;rx_filter = HWTSTAMP_FILTER_NONE;</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ksz_ptp_enable_mode(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz_hwtstamp_set(struct dsa_switch *ds, int port,</div><div class='add'>+		     struct kernel_hwtstamp_config *config,</div><div class='add'>+		     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	struct ksz_port *prt;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	prt = &amp;dev-&gt;ports[port];</div><div class='add'>+</div><div class='add'>+	ret = ksz_set_hwtstamp_config(dev, prt, config);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	prt-&gt;tstamp_config = *config;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ktime_t ksz_tstamp_reconstruct(struct ksz_device *dev, ktime_t tstamp)</div><div class='add'>+{</div><div class='add'>+	struct timespec64 ptp_clock_time;</div><div class='add'>+	struct ksz_ptp_data *ptp_data;</div><div class='add'>+	struct timespec64 diff;</div><div class='add'>+	struct timespec64 ts;</div><div class='add'>+</div><div class='add'>+	ptp_data = &amp;dev-&gt;ptp_data;</div><div class='add'>+	ts = ktime_to_timespec64(tstamp);</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;ptp_data-&gt;clock_lock);</div><div class='add'>+	ptp_clock_time = ptp_data-&gt;clock_time;</div><div class='add'>+	spin_unlock_bh(&amp;ptp_data-&gt;clock_lock);</div><div class='add'>+</div><div class='add'>+	/* calculate full time from partial time stamp */</div><div class='add'>+	ts.tv_sec = (ptp_clock_time.tv_sec &amp; ~3) | ts.tv_sec;</div><div class='add'>+</div><div class='add'>+	/* find nearest possible point in time */</div><div class='add'>+	diff = timespec64_sub(ts, ptp_clock_time);</div><div class='add'>+	if (diff.tv_sec &gt; 2)</div><div class='add'>+		ts.tv_sec -= 4;</div><div class='add'>+	else if (diff.tv_sec &lt; -2)</div><div class='add'>+		ts.tv_sec += 4;</div><div class='add'>+</div><div class='add'>+	return timespec64_to_ktime(ts);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool ksz_port_rxtstamp(struct dsa_switch *ds, int port, struct sk_buff *skb,</div><div class='add'>+		       unsigned int type)</div><div class='add'>+{</div><div class='add'>+	struct skb_shared_hwtstamps *hwtstamps = skb_hwtstamps(skb);</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	struct ptp_header *ptp_hdr;</div><div class='add'>+	struct ksz_port *prt;</div><div class='add'>+	u8 ptp_msg_type;</div><div class='add'>+	ktime_t tstamp;</div><div class='add'>+	s64 correction;</div><div class='add'>+</div><div class='add'>+	prt = &amp;dev-&gt;ports[port];</div><div class='add'>+</div><div class='add'>+	tstamp = KSZ_SKB_CB(skb)-&gt;tstamp;</div><div class='add'>+	memset(hwtstamps, 0, sizeof(*hwtstamps));</div><div class='add'>+	hwtstamps-&gt;hwtstamp = ksz_tstamp_reconstruct(dev, tstamp);</div><div class='add'>+</div><div class='add'>+	if (prt-&gt;tstamp_config.tx_type != HWTSTAMP_TX_ONESTEP_P2P)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ptp_hdr = ptp_parse_header(skb, type);</div><div class='add'>+	if (!ptp_hdr)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ptp_msg_type = ptp_get_msgtype(ptp_hdr, type);</div><div class='add'>+	if (ptp_msg_type != PTP_MSGTYPE_PDELAY_REQ)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* Only subtract the partial time stamp from the correction field.  When</div><div class='add'>+	 * the hardware adds the egress time stamp to the correction field of</div><div class='add'>+	 * the PDelay_Resp message on tx, also only the partial time stamp will</div><div class='add'>+	 * be added.</div><div class='add'>+	 */</div><div class='add'>+	correction = (s64)get_unaligned_be64(&amp;ptp_hdr-&gt;correction);</div><div class='add'>+	correction -= ktime_to_ns(tstamp) &lt;&lt; 16;</div><div class='add'>+</div><div class='add'>+	ptp_header_update_correction(skb, type, ptp_hdr, correction);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ksz_port_txtstamp(struct dsa_switch *ds, int port, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	struct ptp_header *hdr;</div><div class='add'>+	struct sk_buff *clone;</div><div class='add'>+	struct ksz_port *prt;</div><div class='add'>+	unsigned int type;</div><div class='add'>+	u8 ptp_msg_type;</div><div class='add'>+</div><div class='add'>+	prt = &amp;dev-&gt;ports[port];</div><div class='add'>+</div><div class='add'>+	if (!prt-&gt;hwts_tx_en)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	type = ptp_classify_raw(skb);</div><div class='add'>+	if (type == PTP_CLASS_NONE)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	hdr = ptp_parse_header(skb, type);</div><div class='add'>+	if (!hdr)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ptp_msg_type = ptp_get_msgtype(hdr, type);</div><div class='add'>+</div><div class='add'>+	switch (ptp_msg_type) {</div><div class='add'>+	case PTP_MSGTYPE_SYNC:</div><div class='add'>+		if (prt-&gt;tstamp_config.tx_type == HWTSTAMP_TX_ONESTEP_P2P)</div><div class='add'>+			return;</div><div class='add'>+		break;</div><div class='add'>+	case PTP_MSGTYPE_PDELAY_REQ:</div><div class='add'>+		break;</div><div class='add'>+	case PTP_MSGTYPE_PDELAY_RESP:</div><div class='add'>+		if (prt-&gt;tstamp_config.tx_type == HWTSTAMP_TX_ONESTEP_P2P) {</div><div class='add'>+			KSZ_SKB_CB(skb)-&gt;ptp_type = type;</div><div class='add'>+			KSZ_SKB_CB(skb)-&gt;update_correction = true;</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	clone = skb_clone_sk(skb);</div><div class='add'>+	if (!clone)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* caching the value to be used in tag_ksz.c */</div><div class='add'>+	KSZ_SKB_CB(skb)-&gt;clone = clone;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz_ptp_txtstamp_skb(struct ksz_device *dev,</div><div class='add'>+				 struct ksz_port *prt, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct skb_shared_hwtstamps hwtstamps = {};</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* timeout must include DSA conduit to transmit data, tstamp latency,</div><div class='add'>+	 * IRQ latency and time for reading the time stamp.</div><div class='add'>+	 */</div><div class='add'>+	ret = wait_for_completion_timeout(&amp;prt-&gt;tstamp_msg_comp,</div><div class='add'>+					  msecs_to_jiffies(100));</div><div class='add'>+	if (!ret)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	hwtstamps.hwtstamp = prt-&gt;tstamp_msg;</div><div class='add'>+	skb_complete_tx_timestamp(skb, &amp;hwtstamps);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ksz_port_deferred_xmit(struct kthread_work *work)</div><div class='add'>+{</div><div class='add'>+	struct ksz_deferred_xmit_work *xmit_work = work_to_xmit_work(work);</div><div class='add'>+	struct sk_buff *clone, *skb = xmit_work-&gt;skb;</div><div class='add'>+	struct dsa_switch *ds = xmit_work-&gt;dp-&gt;ds;</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	struct ksz_port *prt;</div><div class='add'>+</div><div class='add'>+	prt = &amp;dev-&gt;ports[xmit_work-&gt;dp-&gt;index];</div><div class='add'>+</div><div class='add'>+	clone = KSZ_SKB_CB(skb)-&gt;clone;</div><div class='add'>+</div><div class='add'>+	skb_shinfo(clone)-&gt;tx_flags |= SKBTX_IN_PROGRESS;</div><div class='add'>+</div><div class='add'>+	reinit_completion(&amp;prt-&gt;tstamp_msg_comp);</div><div class='add'>+</div><div class='add'>+	dsa_enqueue_skb(skb, skb-&gt;dev);</div><div class='add'>+</div><div class='add'>+	ksz_ptp_txtstamp_skb(dev, prt, clone);</div><div class='add'>+</div><div class='add'>+	kfree(xmit_work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int _ksz_ptp_gettime(struct ksz_device *dev, struct timespec64 *ts)</div><div class='add'>+{</div><div class='add'>+	u32 nanoseconds;</div><div class='add'>+	u32 seconds;</div><div class='add'>+	u8 phase;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Copy current PTP clock into shadow registers and read */</div><div class='add'>+	ret = ksz_rmw16(dev, REG_PTP_CLK_CTRL, PTP_READ_TIME, PTP_READ_TIME);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ksz_read8(dev, REG_PTP_RTC_SUB_NANOSEC__2, &amp;phase);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ksz_read32(dev, REG_PTP_RTC_NANOSEC, &amp;nanoseconds);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ksz_read32(dev, REG_PTP_RTC_SEC, &amp;seconds);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ts-&gt;tv_sec = seconds;</div><div class='add'>+	ts-&gt;tv_nsec = nanoseconds + phase * 8;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_ptp_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)</div><div class='add'>+{</div><div class='add'>+	struct ksz_ptp_data *ptp_data = ptp_caps_to_data(ptp);</div><div class='add'>+	struct ksz_device *dev = ptp_data_to_ksz_dev(ptp_data);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ptp_data-&gt;lock);</div><div class='add'>+	ret = _ksz_ptp_gettime(dev, ts);</div><div class='add'>+	mutex_unlock(&amp;ptp_data-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_ptp_restart_perout(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ksz_ptp_data *ptp_data = &amp;dev-&gt;ptp_data;</div><div class='add'>+	s64 now_ns, first_ns, period_ns, next_ns;</div><div class='add'>+	struct ptp_perout_request request;</div><div class='add'>+	struct timespec64 next;</div><div class='add'>+	struct timespec64 now;</div><div class='add'>+	unsigned int count;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	dev_info(dev-&gt;dev, "Restarting periodic output signal\n");</div><div class='add'>+</div><div class='add'>+	ret = _ksz_ptp_gettime(dev, &amp;now);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	now_ns = timespec64_to_ns(&amp;now);</div><div class='add'>+	first_ns = timespec64_to_ns(&amp;ptp_data-&gt;perout_target_time_first);</div><div class='add'>+</div><div class='add'>+	/* Calculate next perout event based on start time and period */</div><div class='add'>+	period_ns = timespec64_to_ns(&amp;ptp_data-&gt;perout_period);</div><div class='add'>+</div><div class='add'>+	if (first_ns &lt; now_ns) {</div><div class='add'>+		count = div_u64(now_ns - first_ns, period_ns);</div><div class='add'>+		next_ns = first_ns + count * period_ns;</div><div class='add'>+	} else {</div><div class='add'>+		next_ns = first_ns;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Ensure 100 ms guard time prior next event */</div><div class='add'>+	while (next_ns &lt; now_ns + 100000000)</div><div class='add'>+		next_ns += period_ns;</div><div class='add'>+</div><div class='add'>+	/* Restart periodic output signal */</div><div class='add'>+	next = ns_to_timespec64(next_ns);</div><div class='add'>+	request.start.sec  = next.tv_sec;</div><div class='add'>+	request.start.nsec = next.tv_nsec;</div><div class='add'>+	request.period.sec  = ptp_data-&gt;perout_period.tv_sec;</div><div class='add'>+	request.period.nsec = ptp_data-&gt;perout_period.tv_nsec;</div><div class='add'>+	request.index = 0;</div><div class='add'>+	request.flags = 0;</div><div class='add'>+</div><div class='add'>+	return ksz_ptp_enable_perout(dev, &amp;request, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_ptp_settime(struct ptp_clock_info *ptp,</div><div class='add'>+			   const struct timespec64 *ts)</div><div class='add'>+{</div><div class='add'>+	struct ksz_ptp_data *ptp_data = ptp_caps_to_data(ptp);</div><div class='add'>+	struct ksz_device *dev = ptp_data_to_ksz_dev(ptp_data);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ptp_data-&gt;lock);</div><div class='add'>+</div><div class='add'>+	/* Write to shadow registers and Load PTP clock */</div><div class='add'>+	ret = ksz_write16(dev, REG_PTP_RTC_SUB_NANOSEC__2, PTP_RTC_0NS);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	ret = ksz_write32(dev, REG_PTP_RTC_NANOSEC, ts-&gt;tv_nsec);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	ret = ksz_write32(dev, REG_PTP_RTC_SEC, ts-&gt;tv_sec);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	ret = ksz_rmw16(dev, REG_PTP_CLK_CTRL, PTP_LOAD_TIME, PTP_LOAD_TIME);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	switch (ptp_data-&gt;tou_mode) {</div><div class='add'>+	case KSZ_PTP_TOU_IDLE:</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case KSZ_PTP_TOU_PEROUT:</div><div class='add'>+		ret = ksz_ptp_restart_perout(dev);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto unlock;</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;ptp_data-&gt;clock_lock);</div><div class='add'>+	ptp_data-&gt;clock_time = *ts;</div><div class='add'>+	spin_unlock_bh(&amp;ptp_data-&gt;clock_lock);</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	mutex_unlock(&amp;ptp_data-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)</div><div class='add'>+{</div><div class='add'>+	struct ksz_ptp_data *ptp_data = ptp_caps_to_data(ptp);</div><div class='add'>+	struct ksz_device *dev = ptp_data_to_ksz_dev(ptp_data);</div><div class='add'>+	u64 base, adj;</div><div class='add'>+	bool negative;</div><div class='add'>+	u32 data32;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ptp_data-&gt;lock);</div><div class='add'>+</div><div class='add'>+	if (scaled_ppm) {</div><div class='add'>+		base = KSZ_PTP_INC_NS &lt;&lt; KSZ_PTP_SUBNS_BITS;</div><div class='add'>+		negative = diff_by_scaled_ppm(base, scaled_ppm, &amp;adj);</div><div class='add'>+</div><div class='add'>+		data32 = (u32)adj;</div><div class='add'>+		data32 &amp;= PTP_SUBNANOSEC_M;</div><div class='add'>+		if (!negative)</div><div class='add'>+			data32 |= PTP_RATE_DIR;</div><div class='add'>+</div><div class='add'>+		ret = ksz_write32(dev, REG_PTP_SUBNANOSEC_RATE, data32);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto unlock;</div><div class='add'>+</div><div class='add'>+		ret = ksz_rmw16(dev, REG_PTP_CLK_CTRL, PTP_CLK_ADJ_ENABLE,</div><div class='add'>+				PTP_CLK_ADJ_ENABLE);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto unlock;</div><div class='add'>+	} else {</div><div class='add'>+		ret = ksz_rmw16(dev, REG_PTP_CLK_CTRL, PTP_CLK_ADJ_ENABLE, 0);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	mutex_unlock(&amp;ptp_data-&gt;lock);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)</div><div class='add'>+{</div><div class='add'>+	struct ksz_ptp_data *ptp_data = ptp_caps_to_data(ptp);</div><div class='add'>+	struct ksz_device *dev = ptp_data_to_ksz_dev(ptp_data);</div><div class='add'>+	struct timespec64 delta64 = ns_to_timespec64(delta);</div><div class='add'>+	s32 sec, nsec;</div><div class='add'>+	u16 data16;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ptp_data-&gt;lock);</div><div class='add'>+</div><div class='add'>+	/* do not use ns_to_timespec64(),</div><div class='add'>+	 * both sec and nsec are subtracted by hw</div><div class='add'>+	 */</div><div class='add'>+	sec = div_s64_rem(delta, NSEC_PER_SEC, &amp;nsec);</div><div class='add'>+</div><div class='add'>+	ret = ksz_write32(dev, REG_PTP_RTC_NANOSEC, abs(nsec));</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	ret = ksz_write32(dev, REG_PTP_RTC_SEC, abs(sec));</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	ret = ksz_read16(dev, REG_PTP_CLK_CTRL, &amp;data16);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	data16 |= PTP_STEP_ADJ;</div><div class='add'>+</div><div class='add'>+	/* PTP_STEP_DIR -- 0: subtract, 1: add */</div><div class='add'>+	if (delta &lt; 0)</div><div class='add'>+		data16 &amp;= ~PTP_STEP_DIR;</div><div class='add'>+	else</div><div class='add'>+		data16 |= PTP_STEP_DIR;</div><div class='add'>+</div><div class='add'>+	ret = ksz_write16(dev, REG_PTP_CLK_CTRL, data16);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	switch (ptp_data-&gt;tou_mode) {</div><div class='add'>+	case KSZ_PTP_TOU_IDLE:</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case KSZ_PTP_TOU_PEROUT:</div><div class='add'>+		ret = ksz_ptp_restart_perout(dev);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto unlock;</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;ptp_data-&gt;clock_lock);</div><div class='add'>+	ptp_data-&gt;clock_time = timespec64_add(ptp_data-&gt;clock_time, delta64);</div><div class='add'>+	spin_unlock_bh(&amp;ptp_data-&gt;clock_lock);</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	mutex_unlock(&amp;ptp_data-&gt;lock);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_ptp_enable(struct ptp_clock_info *ptp,</div><div class='add'>+			  struct ptp_clock_request *req, int on)</div><div class='add'>+{</div><div class='add'>+	struct ksz_ptp_data *ptp_data = ptp_caps_to_data(ptp);</div><div class='add'>+	struct ksz_device *dev = ptp_data_to_ksz_dev(ptp_data);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	switch (req-&gt;type) {</div><div class='add'>+	case PTP_CLK_REQ_PEROUT:</div><div class='add'>+		mutex_lock(&amp;ptp_data-&gt;lock);</div><div class='add'>+		ret = ksz_ptp_enable_perout(dev, &amp;req-&gt;perout, on);</div><div class='add'>+		mutex_unlock(&amp;ptp_data-&gt;lock);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_ptp_verify_pin(struct ptp_clock_info *ptp, unsigned int pin,</div><div class='add'>+			      enum ptp_pin_function func, unsigned int chan)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	switch (func) {</div><div class='add'>+	case PTP_PF_NONE:</div><div class='add'>+	case PTP_PF_PEROUT:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -1;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*  Function is pointer to the do_aux_work in the ptp_clock capability */</div><div class='add'>+static long ksz_ptp_do_aux_work(struct ptp_clock_info *ptp)</div><div class='add'>+{</div><div class='add'>+	struct ksz_ptp_data *ptp_data = ptp_caps_to_data(ptp);</div><div class='add'>+	struct ksz_device *dev = ptp_data_to_ksz_dev(ptp_data);</div><div class='add'>+	struct timespec64 ts;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ptp_data-&gt;lock);</div><div class='add'>+	ret = _ksz_ptp_gettime(dev, &amp;ts);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;ptp_data-&gt;clock_lock);</div><div class='add'>+	ptp_data-&gt;clock_time = ts;</div><div class='add'>+	spin_unlock_bh(&amp;ptp_data-&gt;clock_lock);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;ptp_data-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return HZ;  /* reschedule in 1 second */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_ptp_start_clock(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ksz_ptp_data *ptp_data = &amp;dev-&gt;ptp_data;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = ksz_rmw16(dev, REG_PTP_CLK_CTRL, PTP_CLK_ENABLE, PTP_CLK_ENABLE);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ptp_data-&gt;clock_time.tv_sec = 0;</div><div class='add'>+	ptp_data-&gt;clock_time.tv_nsec = 0;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz_ptp_clock_register(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	struct ksz_ptp_data *ptp_data;</div><div class='add'>+	int ret;</div><div class='add'>+	u8 i;</div><div class='add'>+</div><div class='add'>+	ptp_data = &amp;dev-&gt;ptp_data;</div><div class='add'>+	mutex_init(&amp;ptp_data-&gt;lock);</div><div class='add'>+	spin_lock_init(&amp;ptp_data-&gt;clock_lock);</div><div class='add'>+</div><div class='add'>+	ptp_data-&gt;caps.owner		= THIS_MODULE;</div><div class='add'>+	snprintf(ptp_data-&gt;caps.name, 16, "Microchip Clock");</div><div class='add'>+	ptp_data-&gt;caps.max_adj		= KSZ_MAX_DRIFT_CORR;</div><div class='add'>+	ptp_data-&gt;caps.gettime64	= ksz_ptp_gettime;</div><div class='add'>+	ptp_data-&gt;caps.settime64	= ksz_ptp_settime;</div><div class='add'>+	ptp_data-&gt;caps.adjfine		= ksz_ptp_adjfine;</div><div class='add'>+	ptp_data-&gt;caps.adjtime		= ksz_ptp_adjtime;</div><div class='add'>+	ptp_data-&gt;caps.do_aux_work	= ksz_ptp_do_aux_work;</div><div class='add'>+	ptp_data-&gt;caps.enable		= ksz_ptp_enable;</div><div class='add'>+	ptp_data-&gt;caps.verify		= ksz_ptp_verify_pin;</div><div class='add'>+	ptp_data-&gt;caps.n_pins		= KSZ_PTP_N_GPIO;</div><div class='add'>+	ptp_data-&gt;caps.n_per_out	= 3;</div><div class='add'>+</div><div class='add'>+	ret = ksz_ptp_start_clock(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; KSZ_PTP_N_GPIO; i++) {</div><div class='add'>+		struct ptp_pin_desc *ptp_pin = &amp;ptp_data-&gt;pin_config[i];</div><div class='add'>+</div><div class='add'>+		snprintf(ptp_pin-&gt;name,</div><div class='add'>+			 sizeof(ptp_pin-&gt;name), "ksz_ptp_pin_%02d", i);</div><div class='add'>+		ptp_pin-&gt;index = i;</div><div class='add'>+		ptp_pin-&gt;func = PTP_PF_NONE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ptp_data-&gt;caps.pin_config = ptp_data-&gt;pin_config;</div><div class='add'>+</div><div class='add'>+	/* Currently only P2P mode is supported. When 802_1AS bit is set, it</div><div class='add'>+	 * forwards all PTP packets to host port and none to other ports.</div><div class='add'>+	 */</div><div class='add'>+	ret = ksz_rmw16(dev, REG_PTP_MSG_CONF1, PTP_TC_P2P | PTP_802_1AS,</div><div class='add'>+			PTP_TC_P2P | PTP_802_1AS);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ptp_data-&gt;clock = ptp_clock_register(&amp;ptp_data-&gt;caps, dev-&gt;dev);</div><div class='add'>+	if (IS_ERR_OR_NULL(ptp_data-&gt;clock))</div><div class='add'>+		return PTR_ERR(ptp_data-&gt;clock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ksz_ptp_clock_unregister(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	struct ksz_ptp_data *ptp_data;</div><div class='add'>+</div><div class='add'>+	ptp_data = &amp;dev-&gt;ptp_data;</div><div class='add'>+</div><div class='add'>+	if (ptp_data-&gt;clock)</div><div class='add'>+		ptp_clock_unregister(ptp_data-&gt;clock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t ksz_ptp_msg_thread_fn(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct ksz_ptp_irq *ptpmsg_irq = dev_id;</div><div class='add'>+	struct ksz_device *dev;</div><div class='add'>+	struct ksz_port *port;</div><div class='add'>+	u32 tstamp_raw;</div><div class='add'>+	ktime_t tstamp;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	port = ptpmsg_irq-&gt;port;</div><div class='add'>+	dev = port-&gt;ksz_dev;</div><div class='add'>+</div><div class='add'>+	if (ptpmsg_irq-&gt;ts_en) {</div><div class='add'>+		ret = ksz_read32(dev, ptpmsg_irq-&gt;ts_reg, &amp;tstamp_raw);</div><div class='add'>+		if (ret)</div><div class='add'>+			return IRQ_NONE;</div><div class='add'>+</div><div class='add'>+		tstamp = ksz_decode_tstamp(tstamp_raw);</div><div class='add'>+</div><div class='add'>+		port-&gt;tstamp_msg = ksz_tstamp_reconstruct(dev, tstamp);</div><div class='add'>+</div><div class='add'>+		complete(&amp;port-&gt;tstamp_msg_comp);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t ksz_ptp_irq_thread_fn(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct ksz_irq *ptpirq = dev_id;</div><div class='add'>+	unsigned int nhandled = 0;</div><div class='add'>+	struct ksz_device *dev;</div><div class='add'>+	unsigned int sub_irq;</div><div class='add'>+	u16 data;</div><div class='add'>+	int ret;</div><div class='add'>+	u8 n;</div><div class='add'>+</div><div class='add'>+	dev = ptpirq-&gt;dev;</div><div class='add'>+</div><div class='add'>+	ret = ksz_read16(dev, ptpirq-&gt;reg_status, &amp;data);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* Clear the interrupts W1C */</div><div class='add'>+	ret = ksz_write16(dev, ptpirq-&gt;reg_status, data);</div><div class='add'>+	if (ret)</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+</div><div class='add'>+	for (n = 0; n &lt; ptpirq-&gt;nirqs; ++n) {</div><div class='add'>+		if (data &amp; BIT(n + KSZ_PTP_INT_START)) {</div><div class='add'>+			sub_irq = irq_find_mapping(ptpirq-&gt;domain, n);</div><div class='add'>+			handle_nested_irq(sub_irq);</div><div class='add'>+			++nhandled;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return (nhandled &gt; 0 ? IRQ_HANDLED : IRQ_NONE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz_ptp_irq_mask(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct ksz_irq *kirq = irq_data_get_irq_chip_data(d);</div><div class='add'>+</div><div class='add'>+	kirq-&gt;masked &amp;= ~BIT(d-&gt;hwirq + KSZ_PTP_INT_START);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz_ptp_irq_unmask(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct ksz_irq *kirq = irq_data_get_irq_chip_data(d);</div><div class='add'>+</div><div class='add'>+	kirq-&gt;masked |= BIT(d-&gt;hwirq + KSZ_PTP_INT_START);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz_ptp_irq_bus_lock(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct ksz_irq *kirq  = irq_data_get_irq_chip_data(d);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;kirq-&gt;dev-&gt;lock_irq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz_ptp_irq_bus_sync_unlock(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct ksz_irq *kirq  = irq_data_get_irq_chip_data(d);</div><div class='add'>+	struct ksz_device *dev = kirq-&gt;dev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = ksz_write16(dev, kirq-&gt;reg_mask, kirq-&gt;masked);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(dev-&gt;dev, "failed to change IRQ mask\n");</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;dev-&gt;lock_irq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct irq_chip ksz_ptp_irq_chip = {</div><div class='add'>+	.name			= "ksz-irq",</div><div class='add'>+	.irq_mask		= ksz_ptp_irq_mask,</div><div class='add'>+	.irq_unmask		= ksz_ptp_irq_unmask,</div><div class='add'>+	.irq_bus_lock		= ksz_ptp_irq_bus_lock,</div><div class='add'>+	.irq_bus_sync_unlock	= ksz_ptp_irq_bus_sync_unlock,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int ksz_ptp_irq_domain_map(struct irq_domain *d,</div><div class='add'>+				  unsigned int irq, irq_hw_number_t hwirq)</div><div class='add'>+{</div><div class='add'>+	irq_set_chip_data(irq, d-&gt;host_data);</div><div class='add'>+	irq_set_chip_and_handler(irq, &amp;ksz_ptp_irq_chip, handle_level_irq);</div><div class='add'>+	irq_set_noprobe(irq);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct irq_domain_ops ksz_ptp_irq_domain_ops = {</div><div class='add'>+	.map	= ksz_ptp_irq_domain_map,</div><div class='add'>+	.xlate	= irq_domain_xlate_twocell,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void ksz_ptp_msg_irq_free(struct ksz_port *port, u8 n)</div><div class='add'>+{</div><div class='add'>+	struct ksz_ptp_irq *ptpmsg_irq;</div><div class='add'>+</div><div class='add'>+	ptpmsg_irq = &amp;port-&gt;ptpmsg_irq[n];</div><div class='add'>+</div><div class='add'>+	free_irq(ptpmsg_irq-&gt;num, ptpmsg_irq);</div><div class='add'>+	irq_dispose_mapping(ptpmsg_irq-&gt;num);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz_ptp_msg_irq_setup(struct ksz_port *port, u8 n)</div><div class='add'>+{</div><div class='add'>+	u16 ts_reg[] = {REG_PTP_PORT_PDRESP_TS, REG_PTP_PORT_XDELAY_TS,</div><div class='add'>+			REG_PTP_PORT_SYNC_TS};</div><div class='add'>+	static const char * const name[] = {"pdresp-msg", "xdreq-msg",</div><div class='add'>+					    "sync-msg"};</div><div class='add'>+	const struct ksz_dev_ops *ops = port-&gt;ksz_dev-&gt;dev_ops;</div><div class='add'>+	struct ksz_irq *ptpirq = &amp;port-&gt;ptpirq;</div><div class='add'>+	struct ksz_ptp_irq *ptpmsg_irq;</div><div class='add'>+</div><div class='add'>+	ptpmsg_irq = &amp;port-&gt;ptpmsg_irq[n];</div><div class='add'>+	ptpmsg_irq-&gt;num = irq_create_mapping(ptpirq-&gt;domain, n);</div><div class='add'>+	if (!ptpmsg_irq-&gt;num)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ptpmsg_irq-&gt;port = port;</div><div class='add'>+	ptpmsg_irq-&gt;ts_reg = ops-&gt;get_port_addr(port-&gt;num, ts_reg[n]);</div><div class='add'>+</div><div class='add'>+	strscpy(ptpmsg_irq-&gt;name, name[n]);</div><div class='add'>+</div><div class='add'>+	return request_threaded_irq(ptpmsg_irq-&gt;num, NULL,</div><div class='add'>+				    ksz_ptp_msg_thread_fn, IRQF_ONESHOT,</div><div class='add'>+				    ptpmsg_irq-&gt;name, ptpmsg_irq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ksz_ptp_irq_setup(struct dsa_switch *ds, u8 p)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	const struct ksz_dev_ops *ops = dev-&gt;dev_ops;</div><div class='add'>+	struct ksz_port *port = &amp;dev-&gt;ports[p];</div><div class='add'>+	struct ksz_irq *ptpirq = &amp;port-&gt;ptpirq;</div><div class='add'>+	int irq;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ptpirq-&gt;dev = dev;</div><div class='add'>+	ptpirq-&gt;masked = 0;</div><div class='add'>+	ptpirq-&gt;nirqs = 3;</div><div class='add'>+	ptpirq-&gt;reg_mask = ops-&gt;get_port_addr(p, REG_PTP_PORT_TX_INT_ENABLE__2);</div><div class='add'>+	ptpirq-&gt;reg_status = ops-&gt;get_port_addr(p,</div><div class='add'>+						REG_PTP_PORT_TX_INT_STATUS__2);</div><div class='add'>+	snprintf(ptpirq-&gt;name, sizeof(ptpirq-&gt;name), "ptp-irq-%d", p);</div><div class='add'>+</div><div class='add'>+	init_completion(&amp;port-&gt;tstamp_msg_comp);</div><div class='add'>+</div><div class='add'>+	ptpirq-&gt;domain = irq_domain_create_linear(dev_fwnode(dev-&gt;dev), ptpirq-&gt;nirqs,</div><div class='add'>+						  &amp;ksz_ptp_irq_domain_ops, ptpirq);</div><div class='add'>+	if (!ptpirq-&gt;domain)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ptpirq-&gt;irq_num = irq_find_mapping(port-&gt;pirq.domain, PORT_SRC_PTP_INT);</div><div class='add'>+	if (!ptpirq-&gt;irq_num) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = request_threaded_irq(ptpirq-&gt;irq_num, NULL, ksz_ptp_irq_thread_fn,</div><div class='add'>+				   IRQF_ONESHOT, ptpirq-&gt;name, ptpirq);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	for (irq = 0; irq &lt; ptpirq-&gt;nirqs; irq++) {</div><div class='add'>+		ret = ksz_ptp_msg_irq_setup(port, irq);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out_ptp_msg;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_ptp_msg:</div><div class='add'>+	free_irq(ptpirq-&gt;irq_num, ptpirq);</div><div class='add'>+	while (irq--) {</div><div class='add'>+		free_irq(port-&gt;ptpmsg_irq[irq].num, &amp;port-&gt;ptpmsg_irq[irq]);</div><div class='add'>+		irq_dispose_mapping(port-&gt;ptpmsg_irq[irq].num);</div><div class='add'>+	}</div><div class='add'>+out:</div><div class='add'>+	irq_domain_remove(ptpirq-&gt;domain);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ksz_ptp_irq_free(struct dsa_switch *ds, u8 p)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	struct ksz_port *port = &amp;dev-&gt;ports[p];</div><div class='add'>+	struct ksz_irq *ptpirq = &amp;port-&gt;ptpirq;</div><div class='add'>+	u8 n;</div><div class='add'>+</div><div class='add'>+	for (n = 0; n &lt; ptpirq-&gt;nirqs; n++)</div><div class='add'>+		ksz_ptp_msg_irq_free(port, n);</div><div class='add'>+</div><div class='add'>+	free_irq(ptpirq-&gt;irq_num, ptpirq);</div><div class='add'>+	irq_dispose_mapping(ptpirq-&gt;irq_num);</div><div class='add'>+</div><div class='add'>+	irq_domain_remove(ptpirq-&gt;domain);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Christian Eggers &lt;ceggers@arri.de&gt;");</div><div class='add'>+MODULE_AUTHOR("Arun Ramadoss &lt;arun.ramadoss@microchip.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("PTP support for KSZ switch");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/dsa/microchip/ksz_ptp.h b/drivers/net/dsa/microchip/ksz_ptp.h<br/>new file mode 100644<br/>index 000000000000..3086e519b1b6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz_ptp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/ksz_ptp.h</a></div><div class='hunk'>@@ -0,0 +1,89 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Microchip KSZ PTP Implementation</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2020 ARRI Lighting</div><div class='add'>+ * Copyright (C) 2022 Microchip Technology Inc.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _NET_DSA_DRIVERS_KSZ_PTP_H</div><div class='add'>+#define _NET_DSA_DRIVERS_KSZ_PTP_H</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_NET_DSA_MICROCHIP_KSZ_PTP)</div><div class='add'>+</div><div class='add'>+#include &lt;linux/ptp_clock_kernel.h&gt;</div><div class='add'>+</div><div class='add'>+#define KSZ_PTP_N_GPIO		2</div><div class='add'>+</div><div class='add'>+enum ksz_ptp_tou_mode {</div><div class='add'>+	KSZ_PTP_TOU_IDLE,</div><div class='add'>+	KSZ_PTP_TOU_PEROUT,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ksz_ptp_data {</div><div class='add'>+	struct ptp_clock_info caps;</div><div class='add'>+	struct ptp_clock *clock;</div><div class='add'>+	struct ptp_pin_desc pin_config[KSZ_PTP_N_GPIO];</div><div class='add'>+	/* Serializes all operations on the PTP hardware clock */</div><div class='add'>+	struct mutex lock;</div><div class='add'>+	/* lock for accessing the clock_time */</div><div class='add'>+	spinlock_t clock_lock;</div><div class='add'>+	struct timespec64 clock_time;</div><div class='add'>+	enum ksz_ptp_tou_mode tou_mode;</div><div class='add'>+	struct timespec64 perout_target_time_first;  /* start of first pulse */</div><div class='add'>+	struct timespec64 perout_period;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int ksz_ptp_clock_register(struct dsa_switch *ds);</div><div class='add'>+</div><div class='add'>+void ksz_ptp_clock_unregister(struct dsa_switch *ds);</div><div class='add'>+</div><div class='add'>+int ksz_get_ts_info(struct dsa_switch *ds, int port,</div><div class='add'>+		    struct kernel_ethtool_ts_info *ts);</div><div class='add'>+int ksz_hwtstamp_get(struct dsa_switch *ds, int port,</div><div class='add'>+		     struct kernel_hwtstamp_config *config);</div><div class='add'>+int ksz_hwtstamp_set(struct dsa_switch *ds, int port,</div><div class='add'>+		     struct kernel_hwtstamp_config *config,</div><div class='add'>+		     struct netlink_ext_ack *extack);</div><div class='add'>+void ksz_port_txtstamp(struct dsa_switch *ds, int port, struct sk_buff *skb);</div><div class='add'>+void ksz_port_deferred_xmit(struct kthread_work *work);</div><div class='add'>+bool ksz_port_rxtstamp(struct dsa_switch *ds, int port, struct sk_buff *skb,</div><div class='add'>+		       unsigned int type);</div><div class='add'>+int ksz_ptp_irq_setup(struct dsa_switch *ds, u8 p);</div><div class='add'>+void ksz_ptp_irq_free(struct dsa_switch *ds, u8 p);</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+</div><div class='add'>+struct ksz_ptp_data {</div><div class='add'>+	/* Serializes all operations on the PTP hardware clock */</div><div class='add'>+	struct mutex lock;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline int ksz_ptp_clock_register(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ksz_ptp_clock_unregister(struct dsa_switch *ds) { }</div><div class='add'>+</div><div class='add'>+static inline int ksz_ptp_irq_setup(struct dsa_switch *ds, u8 p)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ksz_ptp_irq_free(struct dsa_switch *ds, u8 p) {}</div><div class='add'>+</div><div class='add'>+#define ksz_get_ts_info NULL</div><div class='add'>+</div><div class='add'>+#define ksz_hwtstamp_get NULL</div><div class='add'>+</div><div class='add'>+#define ksz_hwtstamp_set NULL</div><div class='add'>+</div><div class='add'>+#define ksz_port_rxtstamp NULL</div><div class='add'>+</div><div class='add'>+#define ksz_port_txtstamp NULL</div><div class='add'>+</div><div class='add'>+#define ksz_port_deferred_xmit NULL</div><div class='add'>+</div><div class='add'>+#endif	/* End of CONFIG_NET_DSA_MICROCHIP_KSZ_PTP */</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/dsa/microchip/ksz_ptp_reg.h b/drivers/net/dsa/microchip/ksz_ptp_reg.h<br/>new file mode 100644<br/>index 000000000000..d71e85510cda<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz_ptp_reg.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/ksz_ptp_reg.h</a></div><div class='hunk'>@@ -0,0 +1,142 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Microchip KSZ PTP register definitions</div><div class='add'>+ * Copyright (C) 2022 Microchip Technology Inc.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __KSZ_PTP_REGS_H</div><div class='add'>+#define __KSZ_PTP_REGS_H</div><div class='add'>+</div><div class='add'>+#define REG_SW_GLOBAL_LED_OVR__4	0x0120</div><div class='add'>+#define LED_OVR_2			BIT(1)</div><div class='add'>+#define LED_OVR_1			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_SW_GLOBAL_LED_SRC__4	0x0128</div><div class='add'>+#define LED_SRC_PTP_GPIO_1		BIT(3)</div><div class='add'>+#define LED_SRC_PTP_GPIO_2		BIT(2)</div><div class='add'>+</div><div class='add'>+/* 5 - PTP Clock */</div><div class='add'>+#define REG_PTP_CLK_CTRL		0x0500</div><div class='add'>+</div><div class='add'>+#define PTP_STEP_ADJ			BIT(6)</div><div class='add'>+#define PTP_STEP_DIR			BIT(5)</div><div class='add'>+#define PTP_READ_TIME			BIT(4)</div><div class='add'>+#define PTP_LOAD_TIME			BIT(3)</div><div class='add'>+#define PTP_CLK_ADJ_ENABLE		BIT(2)</div><div class='add'>+#define PTP_CLK_ENABLE			BIT(1)</div><div class='add'>+#define PTP_CLK_RESET			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_PTP_RTC_SUB_NANOSEC__2	0x0502</div><div class='add'>+</div><div class='add'>+#define PTP_RTC_SUB_NANOSEC_M		0x0007</div><div class='add'>+#define PTP_RTC_0NS			0x00</div><div class='add'>+</div><div class='add'>+#define REG_PTP_RTC_NANOSEC		0x0504</div><div class='add'>+</div><div class='add'>+#define REG_PTP_RTC_SEC			0x0508</div><div class='add'>+</div><div class='add'>+#define REG_PTP_SUBNANOSEC_RATE		0x050C</div><div class='add'>+</div><div class='add'>+#define PTP_SUBNANOSEC_M		0x3FFFFFFF</div><div class='add'>+#define PTP_RATE_DIR			BIT(31)</div><div class='add'>+#define PTP_TMP_RATE_ENABLE		BIT(30)</div><div class='add'>+</div><div class='add'>+#define REG_PTP_SUBNANOSEC_RATE_L	0x050E</div><div class='add'>+</div><div class='add'>+#define REG_PTP_RATE_DURATION		0x0510</div><div class='add'>+#define REG_PTP_RATE_DURATION_H		0x0510</div><div class='add'>+#define REG_PTP_RATE_DURATION_L		0x0512</div><div class='add'>+</div><div class='add'>+#define REG_PTP_MSG_CONF1		0x0514</div><div class='add'>+</div><div class='add'>+#define PTP_802_1AS			BIT(7)</div><div class='add'>+#define PTP_ENABLE			BIT(6)</div><div class='add'>+#define PTP_ETH_ENABLE			BIT(5)</div><div class='add'>+#define PTP_IPV4_UDP_ENABLE		BIT(4)</div><div class='add'>+#define PTP_IPV6_UDP_ENABLE		BIT(3)</div><div class='add'>+#define PTP_TC_P2P			BIT(2)</div><div class='add'>+#define PTP_MASTER			BIT(1)</div><div class='add'>+#define PTP_1STEP			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_PTP_UNIT_INDEX__4		0x0520</div><div class='add'>+</div><div class='add'>+#define PTP_GPIO_INDEX			GENMASK(19, 16)</div><div class='add'>+#define PTP_TSI_INDEX			BIT(8)</div><div class='add'>+#define PTP_TOU_INDEX			GENMASK(1, 0)</div><div class='add'>+</div><div class='add'>+#define REG_PTP_TRIG_STATUS__4		0x0524</div><div class='add'>+</div><div class='add'>+#define TRIG_ERROR_M			GENMASK(18, 16)</div><div class='add'>+#define TRIG_DONE_M			GENMASK(2, 0)</div><div class='add'>+</div><div class='add'>+#define REG_PTP_INT_STATUS__4		0x0528</div><div class='add'>+</div><div class='add'>+#define TRIG_INT_M			GENMASK(18, 16)</div><div class='add'>+#define TS_INT_M			GENMASK(1, 0)</div><div class='add'>+</div><div class='add'>+#define REG_PTP_CTRL_STAT__4		0x052C</div><div class='add'>+</div><div class='add'>+#define GPIO_IN			BIT(7)</div><div class='add'>+#define GPIO_OUT			BIT(6)</div><div class='add'>+#define TS_INT_ENABLE			BIT(5)</div><div class='add'>+#define TRIG_ACTIVE			BIT(4)</div><div class='add'>+#define TRIG_ENABLE			BIT(3)</div><div class='add'>+#define TRIG_RESET			BIT(2)</div><div class='add'>+#define TS_ENABLE			BIT(1)</div><div class='add'>+#define TS_RESET			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_TRIG_TARGET_NANOSEC	0x0530</div><div class='add'>+#define REG_TRIG_TARGET_SEC		0x0534</div><div class='add'>+</div><div class='add'>+#define REG_TRIG_CTRL__4		0x0538</div><div class='add'>+</div><div class='add'>+#define TRIG_CASCADE_ENABLE		BIT(31)</div><div class='add'>+#define TRIG_CASCADE_TAIL		BIT(30)</div><div class='add'>+#define TRIG_CASCADE_UPS_M		GENMASK(29, 26)</div><div class='add'>+#define TRIG_NOW			BIT(25)</div><div class='add'>+#define TRIG_NOTIFY			BIT(24)</div><div class='add'>+#define TRIG_EDGE			BIT(23)</div><div class='add'>+#define TRIG_PATTERN_M			GENMASK(22, 20)</div><div class='add'>+#define TRIG_NEG_EDGE			0</div><div class='add'>+#define TRIG_POS_EDGE			1</div><div class='add'>+#define TRIG_NEG_PULSE			2</div><div class='add'>+#define TRIG_POS_PULSE			3</div><div class='add'>+#define TRIG_NEG_PERIOD		4</div><div class='add'>+#define TRIG_POS_PERIOD		5</div><div class='add'>+#define TRIG_REG_OUTPUT		6</div><div class='add'>+#define TRIG_GPO_M			GENMASK(19, 16)</div><div class='add'>+#define TRIG_CASCADE_ITERATE_CNT_M	GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define REG_TRIG_CYCLE_WIDTH		0x053C</div><div class='add'>+#define TRIG_CYCLE_WIDTH_M		GENMASK(31, 0)</div><div class='add'>+</div><div class='add'>+#define REG_TRIG_CYCLE_CNT		0x0540</div><div class='add'>+</div><div class='add'>+#define TRIG_CYCLE_CNT_M		GENMASK(31, 16)</div><div class='add'>+#define TRIG_BIT_PATTERN_M		GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define REG_TRIG_ITERATE_TIME		0x0544</div><div class='add'>+</div><div class='add'>+#define REG_TRIG_PULSE_WIDTH__4	0x0548</div><div class='add'>+</div><div class='add'>+#define TRIG_PULSE_WIDTH_M		GENMASK(23, 0)</div><div class='add'>+</div><div class='add'>+/* Port PTP Register */</div><div class='add'>+#define REG_PTP_PORT_RX_DELAY__2	0x0C00</div><div class='add'>+#define REG_PTP_PORT_TX_DELAY__2	0x0C02</div><div class='add'>+#define REG_PTP_PORT_ASYM_DELAY__2	0x0C04</div><div class='add'>+</div><div class='add'>+#define REG_PTP_PORT_XDELAY_TS		0x0C08</div><div class='add'>+#define REG_PTP_PORT_SYNC_TS		0x0C0C</div><div class='add'>+#define REG_PTP_PORT_PDRESP_TS		0x0C10</div><div class='add'>+</div><div class='add'>+#define REG_PTP_PORT_TX_INT_STATUS__2	0x0C14</div><div class='add'>+#define REG_PTP_PORT_TX_INT_ENABLE__2	0x0C16</div><div class='add'>+</div><div class='add'>+#define PTP_PORT_SYNC_INT		BIT(15)</div><div class='add'>+#define PTP_PORT_XDELAY_REQ_INT		BIT(14)</div><div class='add'>+#define PTP_PORT_PDELAY_RESP_INT	BIT(13)</div><div class='add'>+#define KSZ_SYNC_MSG			2</div><div class='add'>+#define KSZ_XDREQ_MSG			1</div><div class='add'>+#define KSZ_PDRES_MSG			0</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/dsa/microchip/ksz_spi.c b/drivers/net/dsa/microchip/ksz_spi.c<br/>new file mode 100644<br/>index 000000000000..d8001734b057<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/ksz_spi.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/ksz_spi.c</a></div><div class='hunk'>@@ -0,0 +1,366 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Microchip ksz series register access through SPI</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2017-2024 Microchip Technology Inc.</div><div class='add'>+ *	Tristram Ha &lt;Tristram.Ha@microchip.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/unaligned.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;linux/spi/spi.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ksz_common.h"</div><div class='add'>+</div><div class='add'>+#define KSZ8463_SPI_ADDR_SHIFT			13</div><div class='add'>+#define KSZ8463_SPI_ADDR_ALIGN			3</div><div class='add'>+#define KSZ8463_SPI_TURNAROUND_SHIFT		2</div><div class='add'>+</div><div class='add'>+#define KSZ8795_SPI_ADDR_SHIFT			12</div><div class='add'>+#define KSZ8795_SPI_ADDR_ALIGN			3</div><div class='add'>+#define KSZ8795_SPI_TURNAROUND_SHIFT		1</div><div class='add'>+</div><div class='add'>+#define KSZ8863_SPI_ADDR_SHIFT			8</div><div class='add'>+#define KSZ8863_SPI_ADDR_ALIGN			8</div><div class='add'>+#define KSZ8863_SPI_TURNAROUND_SHIFT		0</div><div class='add'>+</div><div class='add'>+#define KSZ9477_SPI_ADDR_SHIFT			24</div><div class='add'>+#define KSZ9477_SPI_ADDR_ALIGN			3</div><div class='add'>+#define KSZ9477_SPI_TURNAROUND_SHIFT		5</div><div class='add'>+</div><div class='add'>+KSZ_REGMAP_TABLE(ksz8795, 16, KSZ8795_SPI_ADDR_SHIFT,</div><div class='add'>+		 KSZ8795_SPI_TURNAROUND_SHIFT, KSZ8795_SPI_ADDR_ALIGN);</div><div class='add'>+</div><div class='add'>+KSZ_REGMAP_TABLE(ksz8863, 16, KSZ8863_SPI_ADDR_SHIFT,</div><div class='add'>+		 KSZ8863_SPI_TURNAROUND_SHIFT, KSZ8863_SPI_ADDR_ALIGN);</div><div class='add'>+</div><div class='add'>+KSZ_REGMAP_TABLE(ksz9477, 32, KSZ9477_SPI_ADDR_SHIFT,</div><div class='add'>+		 KSZ9477_SPI_TURNAROUND_SHIFT, KSZ9477_SPI_ADDR_ALIGN);</div><div class='add'>+</div><div class='add'>+static u16 ksz8463_reg(u16 reg, size_t size)</div><div class='add'>+{</div><div class='add'>+	switch (size) {</div><div class='add'>+	case 1:</div><div class='add'>+		reg = ((reg &gt;&gt; 2) &lt;&lt; 4) | (1 &lt;&lt; (reg &amp; 3));</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		reg = ((reg &gt;&gt; 2) &lt;&lt; 4) | (reg &amp; 2 ? 0x0c : 0x03);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		reg = ((reg &gt;&gt; 2) &lt;&lt; 4) | 0xf;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	reg &lt;&lt;= KSZ8463_SPI_TURNAROUND_SHIFT;</div><div class='add'>+	return reg;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz8463_spi_read(void *context,</div><div class='add'>+			    const void *reg, size_t reg_size,</div><div class='add'>+			    void *val, size_t val_size)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = context;</div><div class='add'>+	struct spi_device *spi = to_spi_device(dev);</div><div class='add'>+	u8 bytes[2];</div><div class='add'>+	u16 cmd;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (reg_size &gt; 2 || val_size &gt; 4)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	memcpy(&amp;cmd, reg, sizeof(u16));</div><div class='add'>+	cmd = ksz8463_reg(cmd, val_size);</div><div class='add'>+	/* SPI command uses big-endian format. */</div><div class='add'>+	put_unaligned_be16(cmd, bytes);</div><div class='add'>+	rc = spi_write_then_read(spi, bytes, reg_size, val, val_size);</div><div class='add'>+#if defined(__BIG_ENDIAN)</div><div class='add'>+	/* Register value uses little-endian format so need to convert when</div><div class='add'>+	 * running in big-endian system.</div><div class='add'>+	 */</div><div class='add'>+	if (!rc &amp;&amp; val_size &gt; 1) {</div><div class='add'>+		if (val_size == 2) {</div><div class='add'>+			u16 v = get_unaligned_le16(val);</div><div class='add'>+</div><div class='add'>+			memcpy(val, &amp;v, sizeof(v));</div><div class='add'>+		} else if (val_size == 4) {</div><div class='add'>+			u32 v = get_unaligned_le32(val);</div><div class='add'>+</div><div class='add'>+			memcpy(val, &amp;v, sizeof(v));</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ksz8463_spi_write(void *context, const void *data, size_t count)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = context;</div><div class='add'>+	struct spi_device *spi = to_spi_device(dev);</div><div class='add'>+	size_t val_size = count - 2;</div><div class='add'>+	u8 bytes[6];</div><div class='add'>+	u16 cmd;</div><div class='add'>+</div><div class='add'>+	if (count &lt;= 2 || count &gt; 6)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	memcpy(bytes, data, count);</div><div class='add'>+	memcpy(&amp;cmd, data, sizeof(u16));</div><div class='add'>+	cmd = ksz8463_reg(cmd, val_size);</div><div class='add'>+	cmd |= (1 &lt;&lt; (KSZ8463_SPI_ADDR_SHIFT + KSZ8463_SPI_TURNAROUND_SHIFT));</div><div class='add'>+	/* SPI command uses big-endian format. */</div><div class='add'>+	put_unaligned_be16(cmd, bytes);</div><div class='add'>+#if defined(__BIG_ENDIAN)</div><div class='add'>+	/* Register value uses little-endian format so need to convert when</div><div class='add'>+	 * running in big-endian system.</div><div class='add'>+	 */</div><div class='add'>+	if (val_size == 2) {</div><div class='add'>+		u8 *val = &amp;bytes[2];</div><div class='add'>+		u16 v;</div><div class='add'>+</div><div class='add'>+		memcpy(&amp;v, val, sizeof(v));</div><div class='add'>+		put_unaligned_le16(v, val);</div><div class='add'>+	} else if (val_size == 4) {</div><div class='add'>+		u8 *val = &amp;bytes[2];</div><div class='add'>+		u32 v;</div><div class='add'>+</div><div class='add'>+		memcpy(&amp;v, val, sizeof(v));</div><div class='add'>+		put_unaligned_le32(v, val);</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+	return spi_write(spi, bytes, count);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+KSZ8463_REGMAP_TABLE(ksz8463, KSZ8463_SPI_ADDR_SHIFT, 0,</div><div class='add'>+		     KSZ8463_SPI_ADDR_ALIGN);</div><div class='add'>+</div><div class='add'>+static int ksz_spi_probe(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+	const struct regmap_config *regmap_config;</div><div class='add'>+	const struct ksz_chip_data *chip;</div><div class='add'>+	struct device *ddev = &amp;spi-&gt;dev;</div><div class='add'>+	struct regmap_config rc;</div><div class='add'>+	struct ksz_device *dev;</div><div class='add'>+	int i, ret = 0;</div><div class='add'>+</div><div class='add'>+	dev = ksz_switch_alloc(&amp;spi-&gt;dev, spi);</div><div class='add'>+	if (!dev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	chip = device_get_match_data(ddev);</div><div class='add'>+	if (!chip)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Save chip id to do special initialization when probing. */</div><div class='add'>+	dev-&gt;chip_id = chip-&gt;chip_id;</div><div class='add'>+	if (chip-&gt;chip_id == KSZ88X3_CHIP_ID)</div><div class='add'>+		regmap_config = ksz8863_regmap_config;</div><div class='add'>+	else if (chip-&gt;chip_id == KSZ8463_CHIP_ID)</div><div class='add'>+		regmap_config = ksz8463_regmap_config;</div><div class='add'>+	else if (chip-&gt;chip_id == KSZ8795_CHIP_ID ||</div><div class='add'>+		 chip-&gt;chip_id == KSZ8794_CHIP_ID ||</div><div class='add'>+		 chip-&gt;chip_id == KSZ8765_CHIP_ID)</div><div class='add'>+		regmap_config = ksz8795_regmap_config;</div><div class='add'>+	else if (chip-&gt;chip_id == KSZ8895_CHIP_ID ||</div><div class='add'>+		 chip-&gt;chip_id == KSZ8864_CHIP_ID)</div><div class='add'>+		regmap_config = ksz8863_regmap_config;</div><div class='add'>+	else</div><div class='add'>+		regmap_config = ksz9477_regmap_config;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; __KSZ_NUM_REGMAPS; i++) {</div><div class='add'>+		rc = regmap_config[i];</div><div class='add'>+		rc.lock_arg = &amp;dev-&gt;regmap_mutex;</div><div class='add'>+		rc.wr_table = chip-&gt;wr_table;</div><div class='add'>+		rc.rd_table = chip-&gt;rd_table;</div><div class='add'>+		dev-&gt;regmap[i] = devm_regmap_init_spi(spi, &amp;rc);</div><div class='add'>+</div><div class='add'>+		if (IS_ERR(dev-&gt;regmap[i])) {</div><div class='add'>+			return dev_err_probe(&amp;spi-&gt;dev, PTR_ERR(dev-&gt;regmap[i]),</div><div class='add'>+					     "Failed to initialize regmap%i\n",</div><div class='add'>+					     regmap_config[i].val_bits);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (spi-&gt;dev.platform_data)</div><div class='add'>+		dev-&gt;pdata = spi-&gt;dev.platform_data;</div><div class='add'>+</div><div class='add'>+	/* setup spi */</div><div class='add'>+	spi-&gt;mode = SPI_MODE_3;</div><div class='add'>+	ret = spi_setup(spi);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	dev-&gt;irq = spi-&gt;irq;</div><div class='add'>+</div><div class='add'>+	ret = ksz_switch_register(dev);</div><div class='add'>+</div><div class='add'>+	/* Main DSA driver may not be started yet. */</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	spi_set_drvdata(spi, dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz_spi_remove(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = spi_get_drvdata(spi);</div><div class='add'>+</div><div class='add'>+	if (dev)</div><div class='add'>+		ksz_switch_remove(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ksz_spi_shutdown(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = spi_get_drvdata(spi);</div><div class='add'>+</div><div class='add'>+	if (!dev)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ksz_switch_shutdown(dev);</div><div class='add'>+</div><div class='add'>+	spi_set_drvdata(spi, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id ksz_dt_ids[] = {</div><div class='add'>+	{</div><div class='add'>+		.compatible = "microchip,ksz8463",</div><div class='add'>+		.data = &amp;ksz_switch_chips[KSZ8463]</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "microchip,ksz8765",</div><div class='add'>+		.data = &amp;ksz_switch_chips[KSZ8765]</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "microchip,ksz8794",</div><div class='add'>+		.data = &amp;ksz_switch_chips[KSZ8794]</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "microchip,ksz8795",</div><div class='add'>+		.data = &amp;ksz_switch_chips[KSZ8795]</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "microchip,ksz8863",</div><div class='add'>+		.data = &amp;ksz_switch_chips[KSZ88X3]</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "microchip,ksz8864",</div><div class='add'>+		.data = &amp;ksz_switch_chips[KSZ8864]</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "microchip,ksz8873",</div><div class='add'>+		.data = &amp;ksz_switch_chips[KSZ88X3]</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "microchip,ksz8895",</div><div class='add'>+		.data = &amp;ksz_switch_chips[KSZ8895]</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "microchip,ksz9477",</div><div class='add'>+		.data = &amp;ksz_switch_chips[KSZ9477]</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "microchip,ksz9896",</div><div class='add'>+		.data = &amp;ksz_switch_chips[KSZ9896]</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "microchip,ksz9897",</div><div class='add'>+		.data = &amp;ksz_switch_chips[KSZ9897]</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "microchip,ksz9893",</div><div class='add'>+		.data = &amp;ksz_switch_chips[KSZ9893]</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "microchip,ksz9563",</div><div class='add'>+		.data = &amp;ksz_switch_chips[KSZ9563]</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "microchip,ksz8563",</div><div class='add'>+		.data = &amp;ksz_switch_chips[KSZ8563]</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "microchip,ksz8567",</div><div class='add'>+		.data = &amp;ksz_switch_chips[KSZ8567]</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "microchip,ksz9567",</div><div class='add'>+		.data = &amp;ksz_switch_chips[KSZ9567]</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "microchip,lan9370",</div><div class='add'>+		.data = &amp;ksz_switch_chips[LAN9370]</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "microchip,lan9371",</div><div class='add'>+		.data = &amp;ksz_switch_chips[LAN9371]</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "microchip,lan9372",</div><div class='add'>+		.data = &amp;ksz_switch_chips[LAN9372]</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "microchip,lan9373",</div><div class='add'>+		.data = &amp;ksz_switch_chips[LAN9373]</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "microchip,lan9374",</div><div class='add'>+		.data = &amp;ksz_switch_chips[LAN9374]</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "microchip,lan9646",</div><div class='add'>+		.data = &amp;ksz_switch_chips[LAN9646]</div><div class='add'>+	},</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, ksz_dt_ids);</div><div class='add'>+</div><div class='add'>+static const struct spi_device_id ksz_spi_ids[] = {</div><div class='add'>+	{ "ksz8463" },</div><div class='add'>+	{ "ksz8765" },</div><div class='add'>+	{ "ksz8794" },</div><div class='add'>+	{ "ksz8795" },</div><div class='add'>+	{ "ksz8863" },</div><div class='add'>+	{ "ksz8864" },</div><div class='add'>+	{ "ksz8873" },</div><div class='add'>+	{ "ksz8895" },</div><div class='add'>+	{ "ksz9477" },</div><div class='add'>+	{ "ksz9896" },</div><div class='add'>+	{ "ksz9897" },</div><div class='add'>+	{ "ksz9893" },</div><div class='add'>+	{ "ksz9563" },</div><div class='add'>+	{ "ksz8563" },</div><div class='add'>+	{ "ksz8567" },</div><div class='add'>+	{ "ksz9567" },</div><div class='add'>+	{ "lan9370" },</div><div class='add'>+	{ "lan9371" },</div><div class='add'>+	{ "lan9372" },</div><div class='add'>+	{ "lan9373" },</div><div class='add'>+	{ "lan9374" },</div><div class='add'>+	{ "lan9646" },</div><div class='add'>+	{ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(spi, ksz_spi_ids);</div><div class='add'>+</div><div class='add'>+static DEFINE_SIMPLE_DEV_PM_OPS(ksz_spi_pm_ops,</div><div class='add'>+				ksz_switch_suspend, ksz_switch_resume);</div><div class='add'>+</div><div class='add'>+static struct spi_driver ksz_spi_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name	= "ksz-switch",</div><div class='add'>+		.of_match_table = ksz_dt_ids,</div><div class='add'>+		.pm = &amp;ksz_spi_pm_ops,</div><div class='add'>+	},</div><div class='add'>+	.id_table = ksz_spi_ids,</div><div class='add'>+	.probe	= ksz_spi_probe,</div><div class='add'>+	.remove	= ksz_spi_remove,</div><div class='add'>+	.shutdown = ksz_spi_shutdown,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_spi_driver(ksz_spi_driver);</div><div class='add'>+</div><div class='add'>+MODULE_ALIAS("spi:lan937x");</div><div class='add'>+MODULE_AUTHOR("Tristram Ha &lt;Tristram.Ha@microchip.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Microchip ksz Series Switch SPI Driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/dsa/microchip/lan937x.h b/drivers/net/dsa/microchip/lan937x.h<br/>new file mode 100644<br/>index 000000000000..df13ebbd356f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/lan937x.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/lan937x.h</a></div><div class='hunk'>@@ -0,0 +1,26 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Microchip lan937x dev ops headers</div><div class='add'>+ * Copyright (C) 2019-2022 Microchip Technology Inc.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __LAN937X_CFG_H</div><div class='add'>+#define __LAN937X_CFG_H</div><div class='add'>+</div><div class='add'>+int lan937x_reset_switch(struct ksz_device *dev);</div><div class='add'>+int lan937x_setup(struct dsa_switch *ds);</div><div class='add'>+void lan937x_teardown(struct dsa_switch *ds);</div><div class='add'>+void lan937x_port_setup(struct ksz_device *dev, int port, bool cpu_port);</div><div class='add'>+void lan937x_config_cpu_port(struct dsa_switch *ds);</div><div class='add'>+int lan937x_switch_init(struct ksz_device *dev);</div><div class='add'>+void lan937x_switch_exit(struct ksz_device *dev);</div><div class='add'>+int lan937x_mdio_bus_preinit(struct ksz_device *dev, bool side_mdio);</div><div class='add'>+int lan937x_create_phy_addr_map(struct ksz_device *dev, bool side_mdio);</div><div class='add'>+int lan937x_r_phy(struct ksz_device *dev, u16 addr, u16 reg, u16 *data);</div><div class='add'>+int lan937x_w_phy(struct ksz_device *dev, u16 addr, u16 reg, u16 val);</div><div class='add'>+int lan937x_change_mtu(struct ksz_device *dev, int port, int new_mtu);</div><div class='add'>+void lan937x_phylink_get_caps(struct ksz_device *dev, int port,</div><div class='add'>+			      struct phylink_config *config);</div><div class='add'>+void lan937x_setup_rgmii_delay(struct ksz_device *dev, int port);</div><div class='add'>+int lan937x_set_ageing_time(struct ksz_device *dev, unsigned int msecs);</div><div class='add'>+int lan937x_tc_cbs_set_cinc(struct ksz_device *dev, int port, u32 val);</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/dsa/microchip/lan937x_main.c b/drivers/net/dsa/microchip/lan937x_main.c<br/>new file mode 100644<br/>index 000000000000..5a1496fff445<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/lan937x_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/lan937x_main.c</a></div><div class='hunk'>@@ -0,0 +1,671 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Microchip LAN937X switch driver main logic</div><div class='add'>+ * Copyright (C) 2019-2024 Microchip Technology Inc.</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/iopoll.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/of_net.h&gt;</div><div class='add'>+#include &lt;linux/if_bridge.h&gt;</div><div class='add'>+#include &lt;linux/if_vlan.h&gt;</div><div class='add'>+#include &lt;linux/math.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+#include &lt;net/switchdev.h&gt;</div><div class='add'>+</div><div class='add'>+#include "lan937x_reg.h"</div><div class='add'>+#include "ksz_common.h"</div><div class='add'>+#include "ksz9477.h"</div><div class='add'>+#include "lan937x.h"</div><div class='add'>+</div><div class='add'>+/* marker for ports without built-in PHY */</div><div class='add'>+#define LAN937X_NO_PHY U8_MAX</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * lan9370_phy_addr - Mapping of LAN9370 switch ports to PHY addresses.</div><div class='add'>+ *</div><div class='add'>+ * Each entry corresponds to a specific port on the LAN9370 switch,</div><div class='add'>+ * where ports 1-4 are connected to integrated 100BASE-T1 PHYs, and</div><div class='add'>+ * Port 5 is connected to an RGMII interface without a PHY. The values</div><div class='add'>+ * are based on the documentation (DS00003108E, section 3.3).</div><div class='add'>+ */</div><div class='add'>+static const u8 lan9370_phy_addr[] = {</div><div class='add'>+	[0] = 2, /* Port 1, T1 AFE0 */</div><div class='add'>+	[1] = 3, /* Port 2, T1 AFE1 */</div><div class='add'>+	[2] = 5, /* Port 3, T1 AFE3 */</div><div class='add'>+	[3] = 6, /* Port 4, T1 AFE4 */</div><div class='add'>+	[4] = LAN937X_NO_PHY, /* Port 5, RGMII 2 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * lan9371_phy_addr - Mapping of LAN9371 switch ports to PHY addresses.</div><div class='add'>+ *</div><div class='add'>+ * The values are based on the documentation (DS00003109E, section 3.3).</div><div class='add'>+ */</div><div class='add'>+static const u8 lan9371_phy_addr[] = {</div><div class='add'>+	[0] = 2, /* Port 1, T1 AFE0 */</div><div class='add'>+	[1] = 3, /* Port 2, T1 AFE1 */</div><div class='add'>+	[2] = 5, /* Port 3, T1 AFE3 */</div><div class='add'>+	[3] = 8, /* Port 4, TX PHY */</div><div class='add'>+	[4] = LAN937X_NO_PHY, /* Port 5, RGMII 2 */</div><div class='add'>+	[5] = LAN937X_NO_PHY, /* Port 6, RGMII 1 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * lan9372_phy_addr - Mapping of LAN9372 switch ports to PHY addresses.</div><div class='add'>+ *</div><div class='add'>+ * The values are based on the documentation (DS00003110F, section 3.3).</div><div class='add'>+ */</div><div class='add'>+static const u8 lan9372_phy_addr[] = {</div><div class='add'>+	[0] = 2, /* Port 1, T1 AFE0 */</div><div class='add'>+	[1] = 3, /* Port 2, T1 AFE1 */</div><div class='add'>+	[2] = 5, /* Port 3, T1 AFE3 */</div><div class='add'>+	[3] = 8, /* Port 4, TX PHY */</div><div class='add'>+	[4] = LAN937X_NO_PHY, /* Port 5, RGMII 2 */</div><div class='add'>+	[5] = LAN937X_NO_PHY, /* Port 6, RGMII 1 */</div><div class='add'>+	[6] = 6, /* Port 7, T1 AFE4 */</div><div class='add'>+	[7] = 4, /* Port 8, T1 AFE2 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * lan9373_phy_addr - Mapping of LAN9373 switch ports to PHY addresses.</div><div class='add'>+ *</div><div class='add'>+ * The values are based on the documentation (DS00003110F, section 3.3).</div><div class='add'>+ */</div><div class='add'>+static const u8 lan9373_phy_addr[] = {</div><div class='add'>+	[0] = 2, /* Port 1, T1 AFE0 */</div><div class='add'>+	[1] = 3, /* Port 2, T1 AFE1 */</div><div class='add'>+	[2] = 5, /* Port 3, T1 AFE3 */</div><div class='add'>+	[3] = LAN937X_NO_PHY, /* Port 4, SGMII */</div><div class='add'>+	[4] = LAN937X_NO_PHY, /* Port 5, RGMII 2 */</div><div class='add'>+	[5] = LAN937X_NO_PHY, /* Port 6, RGMII 1 */</div><div class='add'>+	[6] = 6, /* Port 7, T1 AFE4 */</div><div class='add'>+	[7] = 4, /* Port 8, T1 AFE2 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * lan9374_phy_addr - Mapping of LAN9374 switch ports to PHY addresses.</div><div class='add'>+ *</div><div class='add'>+ * The values are based on the documentation (DS00003110F, section 3.3).</div><div class='add'>+ */</div><div class='add'>+static const u8 lan9374_phy_addr[] = {</div><div class='add'>+	[0] = 2, /* Port 1, T1 AFE0 */</div><div class='add'>+	[1] = 3, /* Port 2, T1 AFE1 */</div><div class='add'>+	[2] = 5, /* Port 3, T1 AFE3 */</div><div class='add'>+	[3] = 7, /* Port 4, T1 AFE5 */</div><div class='add'>+	[4] = LAN937X_NO_PHY, /* Port 5, RGMII 2 */</div><div class='add'>+	[5] = LAN937X_NO_PHY, /* Port 6, RGMII 1 */</div><div class='add'>+	[6] = 6, /* Port 7, T1 AFE4 */</div><div class='add'>+	[7] = 4, /* Port 8, T1 AFE2 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int lan937x_cfg(struct ksz_device *dev, u32 addr, u8 bits, bool set)</div><div class='add'>+{</div><div class='add'>+	return regmap_update_bits(ksz_regmap_8(dev), addr, bits, set ? bits : 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan937x_port_cfg(struct ksz_device *dev, int port, int offset,</div><div class='add'>+			    u8 bits, bool set)</div><div class='add'>+{</div><div class='add'>+	return regmap_update_bits(ksz_regmap_8(dev), PORT_CTRL_ADDR(port, offset),</div><div class='add'>+				  bits, set ? bits : 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * lan937x_create_phy_addr_map - Create port-to-PHY address map for MDIO bus.</div><div class='add'>+ * @dev: Pointer to device structure.</div><div class='add'>+ * @side_mdio: Boolean indicating if the PHYs are accessed over a side MDIO bus.</div><div class='add'>+ *</div><div class='add'>+ * This function sets up the PHY address mapping for the LAN937x switches,</div><div class='add'>+ * which support two access modes for internal PHYs:</div><div class='add'>+ * 1. **SPI Access**: A straightforward one-to-one port-to-PHY address</div><div class='add'>+ *    mapping is applied.</div><div class='add'>+ * 2. **MDIO Access**: The PHY address mapping varies based on chip variant</div><div class='add'>+ *    and strap configuration. An offset is calculated based on strap settings</div><div class='add'>+ *    to ensure correct PHY addresses are assigned. The offset calculation logic</div><div class='add'>+ *    is based on Microchip's Article Number 000015828, available at:</div><div class='add'>+ *    https://microchip.my.site.com/s/article/LAN9374-Virtual-PHY-PHY-Address-Mapping</div><div class='add'>+ *</div><div class='add'>+ * The function first checks if side MDIO access is disabled, in which case a</div><div class='add'>+ * simple direct mapping (port number = PHY address) is applied. If side MDIO</div><div class='add'>+ * access is enabled, it reads the strap configuration to determine the correct</div><div class='add'>+ * offset for PHY addresses.</div><div class='add'>+ *</div><div class='add'>+ * The appropriate mapping table is selected based on the chip ID, and the</div><div class='add'>+ * `phy_addr_map` is populated with the correct addresses for each port. Any</div><div class='add'>+ * port with no PHY is assigned a `LAN937X_NO_PHY` marker.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, error code on failure.</div><div class='add'>+ */</div><div class='add'>+int lan937x_create_phy_addr_map(struct ksz_device *dev, bool side_mdio)</div><div class='add'>+{</div><div class='add'>+	static const u8 *phy_addr_map;</div><div class='add'>+	u32 strap_val;</div><div class='add'>+	u8 offset = 0;</div><div class='add'>+	size_t size;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	if (!side_mdio) {</div><div class='add'>+		/* simple direct mapping */</div><div class='add'>+		for (i = 0; i &lt; dev-&gt;info-&gt;port_cnt; i++)</div><div class='add'>+			dev-&gt;phy_addr_map[i] = i;</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ksz_read32(dev, REG_SW_CFG_STRAP_VAL, &amp;strap_val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (!(strap_val &amp; SW_CASCADE_ID_CFG) &amp;&amp; !(strap_val &amp; SW_VPHY_ADD_CFG))</div><div class='add'>+		offset = 0;</div><div class='add'>+	else if (!(strap_val &amp; SW_CASCADE_ID_CFG) &amp;&amp; (strap_val &amp; SW_VPHY_ADD_CFG))</div><div class='add'>+		offset = 7;</div><div class='add'>+	else if ((strap_val &amp; SW_CASCADE_ID_CFG) &amp;&amp; !(strap_val &amp; SW_VPHY_ADD_CFG))</div><div class='add'>+		offset = 15;</div><div class='add'>+	else</div><div class='add'>+		offset = 22;</div><div class='add'>+</div><div class='add'>+	switch (dev-&gt;info-&gt;chip_id) {</div><div class='add'>+	case LAN9370_CHIP_ID:</div><div class='add'>+		phy_addr_map = lan9370_phy_addr;</div><div class='add'>+		size = ARRAY_SIZE(lan9370_phy_addr);</div><div class='add'>+		break;</div><div class='add'>+	case LAN9371_CHIP_ID:</div><div class='add'>+		phy_addr_map = lan9371_phy_addr;</div><div class='add'>+		size = ARRAY_SIZE(lan9371_phy_addr);</div><div class='add'>+		break;</div><div class='add'>+	case LAN9372_CHIP_ID:</div><div class='add'>+		phy_addr_map = lan9372_phy_addr;</div><div class='add'>+		size = ARRAY_SIZE(lan9372_phy_addr);</div><div class='add'>+		break;</div><div class='add'>+	case LAN9373_CHIP_ID:</div><div class='add'>+		phy_addr_map = lan9373_phy_addr;</div><div class='add'>+		size = ARRAY_SIZE(lan9373_phy_addr);</div><div class='add'>+		break;</div><div class='add'>+	case LAN9374_CHIP_ID:</div><div class='add'>+		phy_addr_map = lan9374_phy_addr;</div><div class='add'>+		size = ARRAY_SIZE(lan9374_phy_addr);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (size &lt; dev-&gt;info-&gt;port_cnt)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; dev-&gt;info-&gt;port_cnt; i++) {</div><div class='add'>+		if (phy_addr_map[i] == LAN937X_NO_PHY)</div><div class='add'>+			dev-&gt;phy_addr_map[i] = phy_addr_map[i];</div><div class='add'>+		else</div><div class='add'>+			dev-&gt;phy_addr_map[i] = phy_addr_map[i] + offset;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * lan937x_mdio_bus_preinit - Pre-initialize MDIO bus for accessing PHYs.</div><div class='add'>+ * @dev: Pointer to device structure.</div><div class='add'>+ * @side_mdio: Boolean indicating if the PHYs are accessed over a side MDIO bus.</div><div class='add'>+ *</div><div class='add'>+ * This function configures the LAN937x switch for PHY access either through</div><div class='add'>+ * SPI or the side MDIO bus, unlocking the necessary registers for each access</div><div class='add'>+ * mode.</div><div class='add'>+ *</div><div class='add'>+ * Operation Modes:</div><div class='add'>+ * 1. **SPI Access**: Enables SPI indirect access to address clock domain</div><div class='add'>+ *    crossing issues when SPI is used for PHY access.</div><div class='add'>+ * 2. **MDIO Access**: Grants access to internal PHYs over the side MDIO bus,</div><div class='add'>+ *    required when using the MDIO bus for PHY management.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, error code on failure.</div><div class='add'>+ */</div><div class='add'>+int lan937x_mdio_bus_preinit(struct ksz_device *dev, bool side_mdio)</div><div class='add'>+{</div><div class='add'>+	u16 data16;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Unlock access to the PHYs, needed for SPI and side MDIO access */</div><div class='add'>+	ret = lan937x_cfg(dev, REG_GLOBAL_CTRL_0, SW_PHY_REG_BLOCK, false);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto print_error;</div><div class='add'>+</div><div class='add'>+	if (side_mdio)</div><div class='add'>+		/* Allow access to internal PHYs over MDIO bus */</div><div class='add'>+		data16 = VPHY_MDIO_INTERNAL_ENABLE;</div><div class='add'>+	else</div><div class='add'>+		/* Enable SPI indirect access to address clock domain crossing</div><div class='add'>+		 * issue</div><div class='add'>+		 */</div><div class='add'>+		data16 = VPHY_SPI_INDIRECT_ENABLE;</div><div class='add'>+</div><div class='add'>+	ret = ksz_rmw16(dev, REG_VPHY_SPECIAL_CTRL__2,</div><div class='add'>+			VPHY_SPI_INDIRECT_ENABLE | VPHY_MDIO_INTERNAL_ENABLE,</div><div class='add'>+			data16);</div><div class='add'>+</div><div class='add'>+print_error:</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		dev_err(dev-&gt;dev, "failed to preinit the MDIO bus\n");</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan937x_vphy_ind_addr_wr(struct ksz_device *dev, int addr, int reg)</div><div class='add'>+{</div><div class='add'>+	u16 addr_base = REG_PORT_T1_PHY_CTRL_BASE;</div><div class='add'>+	u16 temp;</div><div class='add'>+</div><div class='add'>+	if (is_lan937x_tx_phy(dev, addr))</div><div class='add'>+		addr_base = REG_PORT_TX_PHY_CTRL_BASE;</div><div class='add'>+</div><div class='add'>+	/* get register address based on the logical port */</div><div class='add'>+	temp = PORT_CTRL_ADDR(addr, (addr_base + (reg &lt;&lt; 2)));</div><div class='add'>+</div><div class='add'>+	return ksz_write16(dev, REG_VPHY_IND_ADDR__2, temp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan937x_internal_phy_write(struct ksz_device *dev, int addr, int reg,</div><div class='add'>+				      u16 val)</div><div class='add'>+{</div><div class='add'>+	unsigned int value;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Check for internal phy port */</div><div class='add'>+	if (!dev-&gt;info-&gt;internal_phy[addr])</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	ret = lan937x_vphy_ind_addr_wr(dev, addr, reg);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Write the data to be written to the VPHY reg */</div><div class='add'>+	ret = ksz_write16(dev, REG_VPHY_IND_DATA__2, val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Write the Write En and Busy bit */</div><div class='add'>+	ret = ksz_write16(dev, REG_VPHY_IND_CTRL__2,</div><div class='add'>+			  (VPHY_IND_WRITE | VPHY_IND_BUSY));</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_read_poll_timeout(ksz_regmap_16(dev), REG_VPHY_IND_CTRL__2,</div><div class='add'>+				       value, !(value &amp; VPHY_IND_BUSY), 10,</div><div class='add'>+				       1000);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(dev-&gt;dev, "Failed to write phy register\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int lan937x_internal_phy_read(struct ksz_device *dev, int addr, int reg,</div><div class='add'>+				     u16 *val)</div><div class='add'>+{</div><div class='add'>+	unsigned int value;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Check for internal phy port, return 0xffff for non-existent phy */</div><div class='add'>+	if (!dev-&gt;info-&gt;internal_phy[addr])</div><div class='add'>+		return 0xffff;</div><div class='add'>+</div><div class='add'>+	ret = lan937x_vphy_ind_addr_wr(dev, addr, reg);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Write Read and Busy bit to start the transaction */</div><div class='add'>+	ret = ksz_write16(dev, REG_VPHY_IND_CTRL__2, VPHY_IND_BUSY);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_read_poll_timeout(ksz_regmap_16(dev), REG_VPHY_IND_CTRL__2,</div><div class='add'>+				       value, !(value &amp; VPHY_IND_BUSY), 10,</div><div class='add'>+				       1000);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(dev-&gt;dev, "Failed to read phy register\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Read the VPHY register which has the PHY data */</div><div class='add'>+	return ksz_read16(dev, REG_VPHY_IND_DATA__2, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int lan937x_r_phy(struct ksz_device *dev, u16 addr, u16 reg, u16 *data)</div><div class='add'>+{</div><div class='add'>+	return lan937x_internal_phy_read(dev, addr, reg, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int lan937x_w_phy(struct ksz_device *dev, u16 addr, u16 reg, u16 val)</div><div class='add'>+{</div><div class='add'>+	return lan937x_internal_phy_write(dev, addr, reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int lan937x_reset_switch(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	u32 data32;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* reset switch */</div><div class='add'>+	ret = lan937x_cfg(dev, REG_SW_OPERATION, SW_RESET, true);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Enable Auto Aging */</div><div class='add'>+	ret = lan937x_cfg(dev, REG_SW_LUE_CTRL_1, SW_LINK_AUTO_AGING, true);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* disable interrupts */</div><div class='add'>+	ret = ksz_write32(dev, REG_SW_INT_MASK__4, SWITCH_INT_MASK);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ksz_write32(dev, REG_SW_INT_STATUS__4, POR_READY_INT);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ksz_write32(dev, REG_SW_PORT_INT_MASK__4, 0xFF);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return ksz_read32(dev, REG_SW_PORT_INT_STATUS__4, &amp;data32);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void lan937x_port_setup(struct ksz_device *dev, int port, bool cpu_port)</div><div class='add'>+{</div><div class='add'>+	const u32 *masks = dev-&gt;info-&gt;masks;</div><div class='add'>+	const u16 *regs = dev-&gt;info-&gt;regs;</div><div class='add'>+	struct dsa_switch *ds = dev-&gt;ds;</div><div class='add'>+	u8 member;</div><div class='add'>+</div><div class='add'>+	/* enable tag tail for host port */</div><div class='add'>+	if (cpu_port)</div><div class='add'>+		lan937x_port_cfg(dev, port, REG_PORT_CTRL_0,</div><div class='add'>+				 PORT_TAIL_TAG_ENABLE, true);</div><div class='add'>+</div><div class='add'>+	/* Enable the Port Queue split */</div><div class='add'>+	ksz9477_port_queue_split(dev, port);</div><div class='add'>+</div><div class='add'>+	/* set back pressure for half duplex */</div><div class='add'>+	lan937x_port_cfg(dev, port, REG_PORT_MAC_CTRL_1, PORT_BACK_PRESSURE,</div><div class='add'>+			 true);</div><div class='add'>+</div><div class='add'>+	/* enable 802.1p priority */</div><div class='add'>+	lan937x_port_cfg(dev, port, P_PRIO_CTRL, PORT_802_1P_PRIO_ENABLE, true);</div><div class='add'>+</div><div class='add'>+	if (!dev-&gt;info-&gt;internal_phy[port])</div><div class='add'>+		lan937x_port_cfg(dev, port, regs[P_XMII_CTRL_0],</div><div class='add'>+				 masks[P_MII_TX_FLOW_CTRL] |</div><div class='add'>+				 masks[P_MII_RX_FLOW_CTRL],</div><div class='add'>+				 true);</div><div class='add'>+</div><div class='add'>+	if (cpu_port)</div><div class='add'>+		member = dsa_user_ports(ds);</div><div class='add'>+	else</div><div class='add'>+		member = BIT(dsa_upstream_port(ds, port));</div><div class='add'>+</div><div class='add'>+	dev-&gt;dev_ops-&gt;cfg_port_member(dev, port, member);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void lan937x_config_cpu_port(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	struct dsa_port *dp;</div><div class='add'>+</div><div class='add'>+	dsa_switch_for_each_cpu_port(dp, ds) {</div><div class='add'>+		if (dev-&gt;info-&gt;cpu_ports &amp; (1 &lt;&lt; dp-&gt;index)) {</div><div class='add'>+			dev-&gt;cpu_port = dp-&gt;index;</div><div class='add'>+</div><div class='add'>+			/* enable cpu port */</div><div class='add'>+			lan937x_port_setup(dev, dp-&gt;index, true);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dsa_switch_for_each_user_port(dp, ds) {</div><div class='add'>+		ksz_port_stp_state_set(ds, dp-&gt;index, BR_STATE_DISABLED);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int lan937x_change_mtu(struct ksz_device *dev, int port, int new_mtu)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds = dev-&gt;ds;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	new_mtu += VLAN_ETH_HLEN + ETH_FCS_LEN;</div><div class='add'>+</div><div class='add'>+	if (dsa_is_cpu_port(ds, port))</div><div class='add'>+		new_mtu += LAN937X_TAG_LEN;</div><div class='add'>+</div><div class='add'>+	if (new_mtu &gt;= FR_MIN_SIZE)</div><div class='add'>+		ret = lan937x_port_cfg(dev, port, REG_PORT_MAC_CTRL_0,</div><div class='add'>+				       PORT_JUMBO_PACKET, true);</div><div class='add'>+	else</div><div class='add'>+		ret = lan937x_port_cfg(dev, port, REG_PORT_MAC_CTRL_0,</div><div class='add'>+				       PORT_JUMBO_PACKET, false);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(ds-&gt;dev, "failed to enable jumbo\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Write the frame size in PORT_MAX_FR_SIZE register */</div><div class='add'>+	ret = ksz_pwrite16(dev, port, PORT_MAX_FR_SIZE, new_mtu);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(ds-&gt;dev, "failed to update mtu for port %d\n", port);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int lan937x_set_ageing_time(struct ksz_device *dev, unsigned int msecs)</div><div class='add'>+{</div><div class='add'>+	u8 data, mult, value8;</div><div class='add'>+	bool in_msec = false;</div><div class='add'>+	u32 max_val, value;</div><div class='add'>+	u32 secs = msecs;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+#define MAX_TIMER_VAL	((1 &lt;&lt; 20) - 1)</div><div class='add'>+</div><div class='add'>+	/* The aging timer comprises a 3-bit multiplier and a 20-bit second</div><div class='add'>+	 * value.  Either of them cannot be zero.  The maximum timer is then</div><div class='add'>+	 * 7 * 1048575 = 7340025 seconds.  As this value is too large for</div><div class='add'>+	 * practical use it can be interpreted as microseconds, making the</div><div class='add'>+	 * maximum timer 7340 seconds with finer control.  This allows for</div><div class='add'>+	 * maximum 122 minutes compared to 29 minutes in KSZ9477 switch.</div><div class='add'>+	 */</div><div class='add'>+	if (msecs % 1000)</div><div class='add'>+		in_msec = true;</div><div class='add'>+	else</div><div class='add'>+		secs /= 1000;</div><div class='add'>+	if (!secs)</div><div class='add'>+		secs = 1;</div><div class='add'>+</div><div class='add'>+	/* Return error if too large. */</div><div class='add'>+	else if (secs &gt; 7 * MAX_TIMER_VAL)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Configure how to interpret the number value. */</div><div class='add'>+	ret = ksz_rmw8(dev, REG_SW_LUE_CTRL_2, SW_AGE_CNT_IN_MICROSEC,</div><div class='add'>+		       in_msec ? SW_AGE_CNT_IN_MICROSEC : 0);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = ksz_read8(dev, REG_SW_LUE_CTRL_0, &amp;value8);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Check whether there is need to update the multiplier. */</div><div class='add'>+	mult = FIELD_GET(SW_AGE_CNT_M, value8);</div><div class='add'>+	max_val = MAX_TIMER_VAL;</div><div class='add'>+	if (mult &gt; 0) {</div><div class='add'>+		/* Try to use the same multiplier already in the register as</div><div class='add'>+		 * the hardware default uses multiplier 4 and 75 seconds for</div><div class='add'>+		 * 300 seconds.</div><div class='add'>+		 */</div><div class='add'>+		max_val = DIV_ROUND_UP(secs, mult);</div><div class='add'>+		if (max_val &gt; MAX_TIMER_VAL || max_val * mult != secs)</div><div class='add'>+			max_val = MAX_TIMER_VAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	data = DIV_ROUND_UP(secs, max_val);</div><div class='add'>+	if (mult != data) {</div><div class='add'>+		value8 &amp;= ~SW_AGE_CNT_M;</div><div class='add'>+		value8 |= FIELD_PREP(SW_AGE_CNT_M, data);</div><div class='add'>+		ret = ksz_write8(dev, REG_SW_LUE_CTRL_0, value8);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	secs = DIV_ROUND_UP(secs, data);</div><div class='add'>+</div><div class='add'>+	value = FIELD_GET(SW_AGE_PERIOD_7_0_M, secs);</div><div class='add'>+</div><div class='add'>+	ret = ksz_write8(dev, REG_SW_AGE_PERIOD__1, value);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	value = FIELD_GET(SW_AGE_PERIOD_19_8_M, secs);</div><div class='add'>+</div><div class='add'>+	return ksz_write16(dev, REG_SW_AGE_PERIOD__2, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lan937x_set_tune_adj(struct ksz_device *dev, int port,</div><div class='add'>+				 u16 reg, u8 val)</div><div class='add'>+{</div><div class='add'>+	u16 data16;</div><div class='add'>+</div><div class='add'>+	ksz_pread16(dev, port, reg, &amp;data16);</div><div class='add'>+</div><div class='add'>+	/* Update tune Adjust */</div><div class='add'>+	data16 &amp;= ~PORT_TUNE_ADJ;</div><div class='add'>+	data16 |= FIELD_PREP(PORT_TUNE_ADJ, val);</div><div class='add'>+	ksz_pwrite16(dev, port, reg, data16);</div><div class='add'>+</div><div class='add'>+	/* write DLL reset to take effect */</div><div class='add'>+	data16 |= PORT_DLL_RESET;</div><div class='add'>+	ksz_pwrite16(dev, port, reg, data16);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lan937x_set_rgmii_tx_delay(struct ksz_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	u8 val;</div><div class='add'>+</div><div class='add'>+	/* Apply different codes based on the ports as per characterization</div><div class='add'>+	 * results</div><div class='add'>+	 */</div><div class='add'>+	val = (port == LAN937X_RGMII_1_PORT) ? RGMII_1_TX_DELAY_2NS :</div><div class='add'>+		RGMII_2_TX_DELAY_2NS;</div><div class='add'>+</div><div class='add'>+	lan937x_set_tune_adj(dev, port, REG_PORT_XMII_CTRL_5, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void lan937x_set_rgmii_rx_delay(struct ksz_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	u8 val;</div><div class='add'>+</div><div class='add'>+	val = (port == LAN937X_RGMII_1_PORT) ? RGMII_1_RX_DELAY_2NS :</div><div class='add'>+		RGMII_2_RX_DELAY_2NS;</div><div class='add'>+</div><div class='add'>+	lan937x_set_tune_adj(dev, port, REG_PORT_XMII_CTRL_4, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void lan937x_phylink_get_caps(struct ksz_device *dev, int port,</div><div class='add'>+			      struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	config-&gt;mac_capabilities = MAC_100FD;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;info-&gt;supports_rgmii[port]) {</div><div class='add'>+		/* MII/RMII/RGMII ports */</div><div class='add'>+		config-&gt;mac_capabilities |= MAC_ASYM_PAUSE | MAC_SYM_PAUSE |</div><div class='add'>+					    MAC_100HD | MAC_10 | MAC_1000FD;</div><div class='add'>+	} else if (is_lan937x_tx_phy(dev, port)) {</div><div class='add'>+		config-&gt;mac_capabilities |= MAC_ASYM_PAUSE | MAC_SYM_PAUSE |</div><div class='add'>+					    MAC_100HD | MAC_10;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void lan937x_setup_rgmii_delay(struct ksz_device *dev, int port)</div><div class='add'>+{</div><div class='add'>+	struct ksz_port *p = &amp;dev-&gt;ports[port];</div><div class='add'>+</div><div class='add'>+	if (p-&gt;rgmii_tx_val) {</div><div class='add'>+		lan937x_set_rgmii_tx_delay(dev, port);</div><div class='add'>+		dev_info(dev-&gt;dev, "Applied rgmii tx delay for the port %d\n",</div><div class='add'>+			 port);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (p-&gt;rgmii_rx_val) {</div><div class='add'>+		lan937x_set_rgmii_rx_delay(dev, port);</div><div class='add'>+		dev_info(dev-&gt;dev, "Applied rgmii rx delay for the port %d\n",</div><div class='add'>+			 port);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int lan937x_tc_cbs_set_cinc(struct ksz_device *dev, int port, u32 val)</div><div class='add'>+{</div><div class='add'>+	return ksz_pwrite32(dev, port, REG_PORT_MTI_CREDIT_INCREMENT, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int lan937x_switch_init(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	dev-&gt;port_mask = (1 &lt;&lt; dev-&gt;info-&gt;port_cnt) - 1;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int lan937x_setup(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct ksz_device *dev = ds-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* The VLAN aware is a global setting. Mixed vlan</div><div class='add'>+	 * filterings are not supported.</div><div class='add'>+	 */</div><div class='add'>+	ds-&gt;vlan_filtering_is_global = true;</div><div class='add'>+</div><div class='add'>+	/* Enable aggressive back off for half duplex &amp; UNH mode */</div><div class='add'>+	ret = lan937x_cfg(dev, REG_SW_MAC_CTRL_0, (SW_PAUSE_UNH_MODE |</div><div class='add'>+						   SW_NEW_BACKOFF |</div><div class='add'>+						   SW_AGGR_BACKOFF), true);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* If NO_EXC_COLLISION_DROP bit is set, the switch will not drop</div><div class='add'>+	 * packets when 16 or more collisions occur</div><div class='add'>+	 */</div><div class='add'>+	ret = lan937x_cfg(dev, REG_SW_MAC_CTRL_1, NO_EXC_COLLISION_DROP, true);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* enable global MIB counter freeze function */</div><div class='add'>+	ret = lan937x_cfg(dev, REG_SW_MAC_CTRL_6, SW_MIB_COUNTER_FREEZE, true);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* disable CLK125 &amp; CLK25, 1: disable, 0: enable */</div><div class='add'>+	ret = lan937x_cfg(dev, REG_SW_GLOBAL_OUTPUT_CTRL__1,</div><div class='add'>+			  (SW_CLK125_ENB | SW_CLK25_ENB), true);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Disable global VPHY support. Related to CPU interface only? */</div><div class='add'>+	return ksz_rmw32(dev, REG_SW_CFG_STRAP_OVR, SW_VPHY_DISABLE,</div><div class='add'>+			 SW_VPHY_DISABLE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void lan937x_teardown(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void lan937x_switch_exit(struct ksz_device *dev)</div><div class='add'>+{</div><div class='add'>+	lan937x_reset_switch(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Arun Ramadoss &lt;arun.ramadoss@microchip.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Microchip LAN937x Series Switch DSA Driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/dsa/microchip/lan937x_reg.h b/drivers/net/dsa/microchip/lan937x_reg.h<br/>new file mode 100644<br/>index 000000000000..72042fd64e5b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/microchip/lan937x_reg.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/microchip/lan937x_reg.h</a></div><div class='hunk'>@@ -0,0 +1,217 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Microchip LAN937X switch register definitions</div><div class='add'>+ * Copyright (C) 2019-2024 Microchip Technology Inc.</div><div class='add'>+ */</div><div class='add'>+#ifndef __LAN937X_REG_H</div><div class='add'>+#define __LAN937X_REG_H</div><div class='add'>+</div><div class='add'>+#define PORT_CTRL_ADDR(port, addr)	((addr) | (((port) + 1)  &lt;&lt; 12))</div><div class='add'>+</div><div class='add'>+/* 0 - Operation */</div><div class='add'>+#define REG_GLOBAL_CTRL_0		0x0007</div><div class='add'>+</div><div class='add'>+#define SW_PHY_REG_BLOCK		BIT(7)</div><div class='add'>+#define SW_FAST_MODE			BIT(3)</div><div class='add'>+#define SW_FAST_MODE_OVERRIDE		BIT(2)</div><div class='add'>+</div><div class='add'>+#define REG_SW_INT_STATUS__4		0x0010</div><div class='add'>+#define REG_SW_INT_MASK__4		0x0014</div><div class='add'>+</div><div class='add'>+#define LUE_INT				BIT(31)</div><div class='add'>+#define TRIG_TS_INT			BIT(30)</div><div class='add'>+#define APB_TIMEOUT_INT			BIT(29)</div><div class='add'>+#define OVER_TEMP_INT			BIT(28)</div><div class='add'>+#define HSR_INT				BIT(27)</div><div class='add'>+#define PIO_INT				BIT(26)</div><div class='add'>+#define POR_READY_INT			BIT(25)</div><div class='add'>+</div><div class='add'>+#define SWITCH_INT_MASK			\</div><div class='add'>+	(LUE_INT | TRIG_TS_INT | APB_TIMEOUT_INT | OVER_TEMP_INT | HSR_INT | \</div><div class='add'>+	 PIO_INT | POR_READY_INT)</div><div class='add'>+</div><div class='add'>+#define REG_SW_PORT_INT_STATUS__4	0x0018</div><div class='add'>+#define REG_SW_PORT_INT_MASK__4		0x001C</div><div class='add'>+</div><div class='add'>+/* 1 - Global */</div><div class='add'>+#define REG_SW_GLOBAL_OUTPUT_CTRL__1	0x0103</div><div class='add'>+#define SW_CLK125_ENB			BIT(1)</div><div class='add'>+#define SW_CLK25_ENB			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_SW_CFG_STRAP_VAL		0x0200</div><div class='add'>+#define SW_CASCADE_ID_CFG		BIT(15)</div><div class='add'>+#define SW_VPHY_ADD_CFG			BIT(0)</div><div class='add'>+</div><div class='add'>+/* 2 - PHY Control */</div><div class='add'>+#define REG_SW_CFG_STRAP_OVR		0x0214</div><div class='add'>+#define SW_VPHY_DISABLE			BIT(31)</div><div class='add'>+</div><div class='add'>+/* 3 - Operation Control */</div><div class='add'>+#define REG_SW_OPERATION		0x0300</div><div class='add'>+</div><div class='add'>+#define SW_DOUBLE_TAG			BIT(7)</div><div class='add'>+#define SW_OVER_TEMP_ENABLE		BIT(2)</div><div class='add'>+#define SW_RESET			BIT(1)</div><div class='add'>+</div><div class='add'>+#define REG_SW_LUE_CTRL_0		0x0310</div><div class='add'>+</div><div class='add'>+#define SW_VLAN_ENABLE			BIT(7)</div><div class='add'>+#define SW_DROP_INVALID_VID		BIT(6)</div><div class='add'>+#define SW_AGE_CNT_M			GENMASK(5, 3)</div><div class='add'>+#define SW_RESV_MCAST_ENABLE		BIT(2)</div><div class='add'>+</div><div class='add'>+#define REG_SW_LUE_CTRL_1		0x0311</div><div class='add'>+</div><div class='add'>+#define UNICAST_LEARN_DISABLE		BIT(7)</div><div class='add'>+#define SW_FLUSH_STP_TABLE		BIT(5)</div><div class='add'>+#define SW_FLUSH_MSTP_TABLE		BIT(4)</div><div class='add'>+#define SW_SRC_ADDR_FILTER		BIT(3)</div><div class='add'>+#define SW_AGING_ENABLE			BIT(2)</div><div class='add'>+#define SW_FAST_AGING			BIT(1)</div><div class='add'>+#define SW_LINK_AUTO_AGING		BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_SW_LUE_CTRL_2		0x0312</div><div class='add'>+</div><div class='add'>+#define SW_AGE_CNT_IN_MICROSEC		BIT(7)</div><div class='add'>+</div><div class='add'>+#define REG_SW_AGE_PERIOD__1		0x0313</div><div class='add'>+#define SW_AGE_PERIOD_7_0_M		GENMASK(7, 0)</div><div class='add'>+</div><div class='add'>+#define REG_SW_AGE_PERIOD__2		0x0320</div><div class='add'>+#define SW_AGE_PERIOD_19_8_M		GENMASK(19, 8)</div><div class='add'>+</div><div class='add'>+#define REG_SW_MAC_CTRL_0		0x0330</div><div class='add'>+#define SW_NEW_BACKOFF			BIT(7)</div><div class='add'>+#define SW_PAUSE_UNH_MODE		BIT(1)</div><div class='add'>+#define SW_AGGR_BACKOFF			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_SW_MAC_CTRL_1		0x0331</div><div class='add'>+#define SW_SHORT_IFG			BIT(7)</div><div class='add'>+#define MULTICAST_STORM_DISABLE		BIT(6)</div><div class='add'>+#define SW_BACK_PRESSURE		BIT(5)</div><div class='add'>+#define FAIR_FLOW_CTRL			BIT(4)</div><div class='add'>+#define NO_EXC_COLLISION_DROP		BIT(3)</div><div class='add'>+#define SW_LEGAL_PACKET_DISABLE		BIT(1)</div><div class='add'>+#define SW_PASS_SHORT_FRAME		BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_SW_MAC_CTRL_6		0x0336</div><div class='add'>+#define SW_MIB_COUNTER_FLUSH		BIT(7)</div><div class='add'>+#define SW_MIB_COUNTER_FREEZE		BIT(6)</div><div class='add'>+</div><div class='add'>+/* 4 - LUE */</div><div class='add'>+#define REG_SW_ALU_STAT_CTRL__4		0x041C</div><div class='add'>+</div><div class='add'>+#define REG_SW_ALU_VAL_B		0x0424</div><div class='add'>+#define ALU_V_OVERRIDE			BIT(31)</div><div class='add'>+#define ALU_V_USE_FID			BIT(30)</div><div class='add'>+#define ALU_V_PORT_MAP			0xFF</div><div class='add'>+</div><div class='add'>+/* 7 - VPhy */</div><div class='add'>+#define REG_VPHY_IND_ADDR__2		0x075C</div><div class='add'>+#define REG_VPHY_IND_DATA__2		0x0760</div><div class='add'>+</div><div class='add'>+#define REG_VPHY_IND_CTRL__2		0x0768</div><div class='add'>+</div><div class='add'>+#define VPHY_IND_WRITE			BIT(1)</div><div class='add'>+#define VPHY_IND_BUSY			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_VPHY_SPECIAL_CTRL__2	0x077C</div><div class='add'>+#define VPHY_SMI_INDIRECT_ENABLE	BIT(15)</div><div class='add'>+#define VPHY_SW_LOOPBACK		BIT(14)</div><div class='add'>+#define VPHY_MDIO_INTERNAL_ENABLE	BIT(13)</div><div class='add'>+#define VPHY_SPI_INDIRECT_ENABLE	BIT(12)</div><div class='add'>+#define VPHY_PORT_MODE_M		0x3</div><div class='add'>+#define VPHY_PORT_MODE_S		8</div><div class='add'>+#define VPHY_MODE_RGMII			0</div><div class='add'>+#define VPHY_MODE_MII_PHY		1</div><div class='add'>+#define VPHY_MODE_SGMII			2</div><div class='add'>+#define VPHY_MODE_RMII_PHY		3</div><div class='add'>+#define VPHY_SW_COLLISION_TEST		BIT(7)</div><div class='add'>+#define VPHY_SPEED_DUPLEX_STAT_M	0x7</div><div class='add'>+#define VPHY_SPEED_DUPLEX_STAT_S	2</div><div class='add'>+#define VPHY_SPEED_1000			BIT(4)</div><div class='add'>+#define VPHY_SPEED_100			BIT(3)</div><div class='add'>+#define VPHY_FULL_DUPLEX		BIT(2)</div><div class='add'>+</div><div class='add'>+/* Port Registers */</div><div class='add'>+</div><div class='add'>+/* 0 - Operation */</div><div class='add'>+#define REG_PORT_INT_STATUS		0x001B</div><div class='add'>+#define REG_PORT_INT_MASK		0x001F</div><div class='add'>+</div><div class='add'>+#define PORT_TAS_INT			BIT(5)</div><div class='add'>+#define PORT_QCI_INT			BIT(4)</div><div class='add'>+#define PORT_SGMII_INT			BIT(3)</div><div class='add'>+#define PORT_PTP_INT			BIT(2)</div><div class='add'>+#define PORT_PHY_INT			BIT(1)</div><div class='add'>+#define PORT_ACL_INT			BIT(0)</div><div class='add'>+</div><div class='add'>+#define PORT_SRC_PHY_INT		1</div><div class='add'>+</div><div class='add'>+#define REG_PORT_CTRL_0			0x0020</div><div class='add'>+</div><div class='add'>+#define PORT_MAC_LOOPBACK		BIT(7)</div><div class='add'>+#define PORT_MAC_REMOTE_LOOPBACK	BIT(6)</div><div class='add'>+#define PORT_K2L_INSERT_ENABLE		BIT(5)</div><div class='add'>+#define PORT_K2L_DEBUG_ENABLE		BIT(4)</div><div class='add'>+#define PORT_TAIL_TAG_ENABLE		BIT(2)</div><div class='add'>+#define PORT_QUEUE_SPLIT_ENABLE		0x3</div><div class='add'>+</div><div class='add'>+/* 1 - Phy */</div><div class='add'>+#define REG_PORT_T1_PHY_CTRL_BASE	0x0100</div><div class='add'>+#define REG_PORT_TX_PHY_CTRL_BASE	0x0280</div><div class='add'>+</div><div class='add'>+/* 3 - xMII */</div><div class='add'>+#define PORT_SGMII_SEL			BIT(7)</div><div class='add'>+#define PORT_GRXC_ENABLE		BIT(0)</div><div class='add'>+</div><div class='add'>+#define PORT_MII_SEL_EDGE		BIT(5)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_XMII_CTRL_4		0x0304</div><div class='add'>+#define REG_PORT_XMII_CTRL_5		0x0306</div><div class='add'>+</div><div class='add'>+#define PORT_DLL_RESET			BIT(15)</div><div class='add'>+#define PORT_TUNE_ADJ			GENMASK(13, 7)</div><div class='add'>+</div><div class='add'>+/* 4 - MAC */</div><div class='add'>+#define REG_PORT_MAC_CTRL_0		0x0400</div><div class='add'>+#define PORT_CHECK_LENGTH		BIT(2)</div><div class='add'>+#define PORT_BROADCAST_STORM		BIT(1)</div><div class='add'>+#define PORT_JUMBO_PACKET		BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_PORT_MAC_CTRL_1		0x0401</div><div class='add'>+#define PORT_BACK_PRESSURE		BIT(3)</div><div class='add'>+#define PORT_PASS_ALL			BIT(0)</div><div class='add'>+</div><div class='add'>+#define PORT_MAX_FR_SIZE		0x404</div><div class='add'>+#define FR_MIN_SIZE		1522</div><div class='add'>+</div><div class='add'>+/* 8 - Classification and Policing */</div><div class='add'>+#define REG_PORT_MRI_PRIO_CTRL		0x0801</div><div class='add'>+#define PORT_HIGHEST_PRIO		BIT(7)</div><div class='add'>+#define PORT_OR_PRIO			BIT(6)</div><div class='add'>+#define PORT_MAC_PRIO_ENABLE		BIT(4)</div><div class='add'>+#define PORT_VLAN_PRIO_ENABLE		BIT(3)</div><div class='add'>+#define PORT_802_1P_PRIO_ENABLE		BIT(2)</div><div class='add'>+#define PORT_DIFFSERV_PRIO_ENABLE	BIT(1)</div><div class='add'>+#define PORT_ACL_PRIO_ENABLE		BIT(0)</div><div class='add'>+</div><div class='add'>+#define P_PRIO_CTRL			REG_PORT_MRI_PRIO_CTRL</div><div class='add'>+</div><div class='add'>+/* 9 - Shaping */</div><div class='add'>+#define REG_PORT_MTI_CREDIT_INCREMENT	0x091C</div><div class='add'>+</div><div class='add'>+/* The port number as per the datasheet */</div><div class='add'>+#define RGMII_2_PORT_NUM		5</div><div class='add'>+#define RGMII_1_PORT_NUM		6</div><div class='add'>+</div><div class='add'>+#define LAN937X_RGMII_2_PORT		(RGMII_2_PORT_NUM - 1)</div><div class='add'>+#define LAN937X_RGMII_1_PORT		(RGMII_1_PORT_NUM - 1)</div><div class='add'>+</div><div class='add'>+#define RGMII_1_TX_DELAY_2NS		2</div><div class='add'>+#define RGMII_2_TX_DELAY_2NS		0</div><div class='add'>+#define RGMII_1_RX_DELAY_2NS		0x1B</div><div class='add'>+#define RGMII_2_RX_DELAY_2NS		0x14</div><div class='add'>+</div><div class='add'>+#define LAN937X_TAG_LEN			2</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/dsa/mt7530-mdio.c b/drivers/net/dsa/mt7530-mdio.c<br/>new file mode 100644<br/>index 000000000000..0286a6cecb6f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mt7530-mdio.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mt7530-mdio.c</a></div><div class='hunk'>@@ -0,0 +1,265 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+#include &lt;linux/gpio/consumer.h&gt;</div><div class='add'>+#include &lt;linux/mdio.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/pcs/pcs-mtk-lynxi.h&gt;</div><div class='add'>+#include &lt;linux/of_irq.h&gt;</div><div class='add'>+#include &lt;linux/of_mdio.h&gt;</div><div class='add'>+#include &lt;linux/of_net.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;linux/reset.h&gt;</div><div class='add'>+#include &lt;linux/regulator/consumer.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+</div><div class='add'>+#include "mt7530.h"</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7530_regmap_write(void *context, unsigned int reg, unsigned int val)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = context;</div><div class='add'>+	struct mii_bus *bus = priv-&gt;bus;</div><div class='add'>+	u16 page, r, lo, hi;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	page = (reg &gt;&gt; 6) &amp; 0x3ff;</div><div class='add'>+	r  = (reg &gt;&gt; 2) &amp; 0xf;</div><div class='add'>+	lo = val &amp; 0xffff;</div><div class='add'>+	hi = val &gt;&gt; 16;</div><div class='add'>+</div><div class='add'>+	ret = bus-&gt;write(bus, priv-&gt;mdiodev-&gt;addr, 0x1f, page);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = bus-&gt;write(bus, priv-&gt;mdiodev-&gt;addr, r, lo);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = bus-&gt;write(bus, priv-&gt;mdiodev-&gt;addr, 0x10, hi);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7530_regmap_read(void *context, unsigned int reg, unsigned int *val)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = context;</div><div class='add'>+	struct mii_bus *bus = priv-&gt;bus;</div><div class='add'>+	u16 page, r, lo, hi;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	page = (reg &gt;&gt; 6) &amp; 0x3ff;</div><div class='add'>+	r = (reg &gt;&gt; 2) &amp; 0xf;</div><div class='add'>+</div><div class='add'>+	ret = bus-&gt;write(bus, priv-&gt;mdiodev-&gt;addr, 0x1f, page);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	lo = bus-&gt;read(bus, priv-&gt;mdiodev-&gt;addr, r);</div><div class='add'>+	hi = bus-&gt;read(bus, priv-&gt;mdiodev-&gt;addr, 0x10);</div><div class='add'>+</div><div class='add'>+	*val = (hi &lt;&lt; 16) | (lo &amp; 0xffff);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mt7530_mdio_regmap_lock(void *mdio_lock)</div><div class='add'>+{</div><div class='add'>+	mutex_lock_nested(mdio_lock, MDIO_MUTEX_NESTED);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mt7530_mdio_regmap_unlock(void *mdio_lock)</div><div class='add'>+{</div><div class='add'>+	mutex_unlock(mdio_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct regmap_bus mt7530_regmap_bus = {</div><div class='add'>+	.reg_write = mt7530_regmap_write,</div><div class='add'>+	.reg_read = mt7530_regmap_read,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7531_create_sgmii(struct mt7530_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct regmap_config *mt7531_pcs_config[2] = {};</div><div class='add'>+	struct phylink_pcs *pcs;</div><div class='add'>+	struct regmap *regmap;</div><div class='add'>+	int i, ret = 0;</div><div class='add'>+</div><div class='add'>+	for (i = priv-&gt;p5_sgmii ? 0 : 1; i &lt; 2; i++) {</div><div class='add'>+		mt7531_pcs_config[i] = devm_kzalloc(priv-&gt;dev,</div><div class='add'>+						    sizeof(struct regmap_config),</div><div class='add'>+						    GFP_KERNEL);</div><div class='add'>+		if (!mt7531_pcs_config[i]) {</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		mt7531_pcs_config[i]-&gt;name = i ? "port6" : "port5";</div><div class='add'>+		mt7531_pcs_config[i]-&gt;reg_bits = 16;</div><div class='add'>+		mt7531_pcs_config[i]-&gt;val_bits = 32;</div><div class='add'>+		mt7531_pcs_config[i]-&gt;reg_stride = 4;</div><div class='add'>+		mt7531_pcs_config[i]-&gt;reg_base = MT7531_SGMII_REG_BASE(5 + i);</div><div class='add'>+		mt7531_pcs_config[i]-&gt;max_register = 0x17c;</div><div class='add'>+		mt7531_pcs_config[i]-&gt;lock = mt7530_mdio_regmap_lock;</div><div class='add'>+		mt7531_pcs_config[i]-&gt;unlock = mt7530_mdio_regmap_unlock;</div><div class='add'>+		mt7531_pcs_config[i]-&gt;lock_arg = &amp;priv-&gt;bus-&gt;mdio_lock;</div><div class='add'>+</div><div class='add'>+		regmap = devm_regmap_init(priv-&gt;dev, &amp;mt7530_regmap_bus, priv,</div><div class='add'>+					  mt7531_pcs_config[i]);</div><div class='add'>+		if (IS_ERR(regmap)) {</div><div class='add'>+			ret = PTR_ERR(regmap);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		pcs = mtk_pcs_lynxi_create(priv-&gt;dev, regmap,</div><div class='add'>+					   MT7531_PHYA_CTRL_SIGNAL3, 0);</div><div class='add'>+		if (!pcs) {</div><div class='add'>+			ret = -ENXIO;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		priv-&gt;ports[5 + i].sgmii_pcs = pcs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ret &amp;&amp; i)</div><div class='add'>+		mtk_pcs_lynxi_destroy(priv-&gt;ports[5].sgmii_pcs);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id mt7530_of_match[] = {</div><div class='add'>+	{ .compatible = "mediatek,mt7621", .data = &amp;mt753x_table[ID_MT7621], },</div><div class='add'>+	{ .compatible = "mediatek,mt7530", .data = &amp;mt753x_table[ID_MT7530], },</div><div class='add'>+	{ .compatible = "mediatek,mt7531", .data = &amp;mt753x_table[ID_MT7531], },</div><div class='add'>+	{ /* sentinel */ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, mt7530_of_match);</div><div class='add'>+</div><div class='add'>+static const struct regmap_config regmap_config = {</div><div class='add'>+	.reg_bits = 16,</div><div class='add'>+	.val_bits = 32,</div><div class='add'>+	.reg_stride = 4,</div><div class='add'>+	.max_register = MT7530_CREV,</div><div class='add'>+	.disable_locking = true,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7530_probe(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv;</div><div class='add'>+	struct device_node *dn;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	dn = mdiodev-&gt;dev.of_node;</div><div class='add'>+</div><div class='add'>+	priv = devm_kzalloc(&amp;mdiodev-&gt;dev, sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv-&gt;bus = mdiodev-&gt;bus;</div><div class='add'>+	priv-&gt;dev = &amp;mdiodev-&gt;dev;</div><div class='add'>+	priv-&gt;mdiodev = mdiodev;</div><div class='add'>+</div><div class='add'>+	ret = mt7530_probe_common(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Use medatek,mcm property to distinguish hardware type that would</div><div class='add'>+	 * cause a little bit differences on power-on sequence.</div><div class='add'>+	 * Not MCM that indicates switch works as the remote standalone</div><div class='add'>+	 * integrated circuit so the GPIO pin would be used to complete</div><div class='add'>+	 * the reset, otherwise memory-mapped register accessing used</div><div class='add'>+	 * through syscon provides in the case of MCM.</div><div class='add'>+	 */</div><div class='add'>+	priv-&gt;mcm = of_property_read_bool(dn, "mediatek,mcm");</div><div class='add'>+	if (priv-&gt;mcm) {</div><div class='add'>+		dev_info(&amp;mdiodev-&gt;dev, "MT7530 adapts as multi-chip module\n");</div><div class='add'>+</div><div class='add'>+		priv-&gt;rstc = devm_reset_control_get(&amp;mdiodev-&gt;dev, "mcm");</div><div class='add'>+		if (IS_ERR(priv-&gt;rstc)) {</div><div class='add'>+			dev_err(&amp;mdiodev-&gt;dev, "Couldn't get our reset line\n");</div><div class='add'>+			return PTR_ERR(priv-&gt;rstc);</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		priv-&gt;reset = devm_gpiod_get_optional(&amp;mdiodev-&gt;dev, "reset",</div><div class='add'>+						      GPIOD_OUT_LOW);</div><div class='add'>+		if (IS_ERR(priv-&gt;reset)) {</div><div class='add'>+			dev_err(&amp;mdiodev-&gt;dev, "Couldn't get our reset line\n");</div><div class='add'>+			return PTR_ERR(priv-&gt;reset);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;id == ID_MT7530) {</div><div class='add'>+		priv-&gt;core_pwr = devm_regulator_get(&amp;mdiodev-&gt;dev, "core");</div><div class='add'>+		if (IS_ERR(priv-&gt;core_pwr))</div><div class='add'>+			return PTR_ERR(priv-&gt;core_pwr);</div><div class='add'>+</div><div class='add'>+		priv-&gt;io_pwr = devm_regulator_get(&amp;mdiodev-&gt;dev, "io");</div><div class='add'>+		if (IS_ERR(priv-&gt;io_pwr))</div><div class='add'>+			return PTR_ERR(priv-&gt;io_pwr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;regmap = devm_regmap_init(priv-&gt;dev, &amp;mt7530_regmap_bus, priv,</div><div class='add'>+					&amp;regmap_config);</div><div class='add'>+	if (IS_ERR(priv-&gt;regmap))</div><div class='add'>+		return PTR_ERR(priv-&gt;regmap);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;id == ID_MT7531)</div><div class='add'>+		priv-&gt;create_sgmii = mt7531_create_sgmii;</div><div class='add'>+</div><div class='add'>+	return dsa_register_switch(priv-&gt;ds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mt7530_remove(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = dev_get_drvdata(&amp;mdiodev-&gt;dev);</div><div class='add'>+	int ret = 0, i;</div><div class='add'>+</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ret = regulator_disable(priv-&gt;core_pwr);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		dev_err(priv-&gt;dev,</div><div class='add'>+			"Failed to disable core power: %d\n", ret);</div><div class='add'>+</div><div class='add'>+	ret = regulator_disable(priv-&gt;io_pwr);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		dev_err(priv-&gt;dev, "Failed to disable io pwr: %d\n",</div><div class='add'>+			ret);</div><div class='add'>+</div><div class='add'>+	mt7530_remove_common(priv);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 2; ++i)</div><div class='add'>+		mtk_pcs_lynxi_destroy(priv-&gt;ports[5 + i].sgmii_pcs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mt7530_shutdown(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = dev_get_drvdata(&amp;mdiodev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dsa_switch_shutdown(priv-&gt;ds);</div><div class='add'>+</div><div class='add'>+	dev_set_drvdata(&amp;mdiodev-&gt;dev, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mdio_driver mt7530_mdio_driver = {</div><div class='add'>+	.probe  = mt7530_probe,</div><div class='add'>+	.remove = mt7530_remove,</div><div class='add'>+	.shutdown = mt7530_shutdown,</div><div class='add'>+	.mdiodrv.driver = {</div><div class='add'>+		.name = "mt7530-mdio",</div><div class='add'>+		.of_match_table = mt7530_of_match,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+mdio_module_driver(mt7530_mdio_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Sean Wang &lt;sean.wang@mediatek.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Driver for Mediatek MT7530 Switch (MDIO)");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/dsa/mt7530-mmio.c b/drivers/net/dsa/mt7530-mmio.c<br/>new file mode 100644<br/>index 000000000000..1dc8b93fb51a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mt7530-mmio.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mt7530-mmio.c</a></div><div class='hunk'>@@ -0,0 +1,100 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+#include &lt;linux/mod_devicetable.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;linux/regulator/consumer.h&gt;</div><div class='add'>+#include &lt;linux/reset.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+</div><div class='add'>+#include "mt7530.h"</div><div class='add'>+</div><div class='add'>+static const struct of_device_id mt7988_of_match[] = {</div><div class='add'>+	{ .compatible = "airoha,an7583-switch", .data = &amp;mt753x_table[ID_AN7583], },</div><div class='add'>+	{ .compatible = "airoha,en7581-switch", .data = &amp;mt753x_table[ID_EN7581], },</div><div class='add'>+	{ .compatible = "mediatek,mt7988-switch", .data = &amp;mt753x_table[ID_MT7988], },</div><div class='add'>+	{ /* sentinel */ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, mt7988_of_match);</div><div class='add'>+</div><div class='add'>+static const struct regmap_config sw_regmap_config = {</div><div class='add'>+	.name = "switch",</div><div class='add'>+	.reg_bits = 16,</div><div class='add'>+	.val_bits = 32,</div><div class='add'>+	.reg_stride = 4,</div><div class='add'>+	.max_register = MT7530_CREV,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7988_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv;</div><div class='add'>+	void __iomem *base_addr;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	priv = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv-&gt;bus = NULL;</div><div class='add'>+	priv-&gt;dev = &amp;pdev-&gt;dev;</div><div class='add'>+</div><div class='add'>+	ret = mt7530_probe_common(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	priv-&gt;rstc = devm_reset_control_get(&amp;pdev-&gt;dev, NULL);</div><div class='add'>+	if (IS_ERR(priv-&gt;rstc)) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Couldn't get our reset line\n");</div><div class='add'>+		return PTR_ERR(priv-&gt;rstc);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	base_addr = devm_platform_ioremap_resource(pdev, 0);</div><div class='add'>+	if (IS_ERR(base_addr)) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "cannot request I/O memory space\n");</div><div class='add'>+		return -ENXIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;regmap = devm_regmap_init_mmio(&amp;pdev-&gt;dev, base_addr,</div><div class='add'>+					     &amp;sw_regmap_config);</div><div class='add'>+	if (IS_ERR(priv-&gt;regmap))</div><div class='add'>+		return PTR_ERR(priv-&gt;regmap);</div><div class='add'>+</div><div class='add'>+	return dsa_register_switch(priv-&gt;ds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mt7988_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	if (priv)</div><div class='add'>+		mt7530_remove_common(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mt7988_shutdown(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dsa_switch_shutdown(priv-&gt;ds);</div><div class='add'>+</div><div class='add'>+	dev_set_drvdata(&amp;pdev-&gt;dev, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver mt7988_platform_driver = {</div><div class='add'>+	.probe  = mt7988_probe,</div><div class='add'>+	.remove = mt7988_remove,</div><div class='add'>+	.shutdown = mt7988_shutdown,</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "mt7530-mmio",</div><div class='add'>+		.of_match_table = mt7988_of_match,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+module_platform_driver(mt7988_platform_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Daniel Golle &lt;daniel@makrotopia.org&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Driver for Mediatek MT7530 Switch (MMIO)");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c<br/>new file mode 100644<br/>index 000000000000..b9423389c2ef<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mt7530.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mt7530.c</a></div><div class='hunk'>@@ -0,0 +1,3418 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Mediatek MT7530 DSA Switch driver</div><div class='add'>+ * Copyright (C) 2017 Sean Wang &lt;sean.wang@mediatek.com&gt;</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/if_bridge.h&gt;</div><div class='add'>+#include &lt;linux/iopoll.h&gt;</div><div class='add'>+#include &lt;linux/mdio.h&gt;</div><div class='add'>+#include &lt;linux/mfd/syscon.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/of_irq.h&gt;</div><div class='add'>+#include &lt;linux/of_mdio.h&gt;</div><div class='add'>+#include &lt;linux/of_net.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/phylink.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;linux/regulator/consumer.h&gt;</div><div class='add'>+#include &lt;linux/reset.h&gt;</div><div class='add'>+#include &lt;linux/gpio/consumer.h&gt;</div><div class='add'>+#include &lt;linux/gpio/driver.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+#include &lt;net/pkt_cls.h&gt;</div><div class='add'>+</div><div class='add'>+#include "mt7530.h"</div><div class='add'>+</div><div class='add'>+static struct mt753x_pcs *pcs_to_mt753x_pcs(struct phylink_pcs *pcs)</div><div class='add'>+{</div><div class='add'>+	return container_of(pcs, struct mt753x_pcs, pcs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* String, offset, and register size in bytes if different from 4 bytes */</div><div class='add'>+static const struct mt7530_mib_desc mt7530_mib[] = {</div><div class='add'>+	MIB_DESC(1, MT7530_PORT_MIB_TX_DROP, "TxDrop"),</div><div class='add'>+	MIB_DESC(1, MT7530_PORT_MIB_TX_CRC_ERR, "TxCrcErr"),</div><div class='add'>+	MIB_DESC(1, MT7530_PORT_MIB_TX_COLLISION, "TxCollision"),</div><div class='add'>+	MIB_DESC(1, MT7530_PORT_MIB_RX_DROP, "RxDrop"),</div><div class='add'>+	MIB_DESC(1, MT7530_PORT_MIB_RX_FILTERING, "RxFiltering"),</div><div class='add'>+	MIB_DESC(1, MT7530_PORT_MIB_RX_CRC_ERR, "RxCrcErr"),</div><div class='add'>+	MIB_DESC(1, MT7530_PORT_MIB_RX_CTRL_DROP, "RxCtrlDrop"),</div><div class='add'>+	MIB_DESC(1, MT7530_PORT_MIB_RX_INGRESS_DROP, "RxIngressDrop"),</div><div class='add'>+	MIB_DESC(1, MT7530_PORT_MIB_RX_ARL_DROP, "RxArlDrop"),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mt7530_mutex_lock(struct mt7530_priv *priv)</div><div class='add'>+{</div><div class='add'>+	if (priv-&gt;bus)</div><div class='add'>+		mutex_lock_nested(&amp;priv-&gt;bus-&gt;mdio_lock, MDIO_MUTEX_NESTED);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mt7530_mutex_unlock(struct mt7530_priv *priv)</div><div class='add'>+{</div><div class='add'>+	if (priv-&gt;bus)</div><div class='add'>+		mutex_unlock(&amp;priv-&gt;bus-&gt;mdio_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+core_write(struct mt7530_priv *priv, u32 reg, u32 val)</div><div class='add'>+{</div><div class='add'>+	struct mii_bus *bus = priv-&gt;bus;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mt7530_mutex_lock(priv);</div><div class='add'>+</div><div class='add'>+	/* Write the desired MMD Devad */</div><div class='add'>+	ret = bus-&gt;write(bus, MT753X_CTRL_PHY_ADDR(priv-&gt;mdiodev-&gt;addr),</div><div class='add'>+			 MII_MMD_CTRL, MDIO_MMD_VEND2);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	/* Write the desired MMD register address */</div><div class='add'>+	ret = bus-&gt;write(bus, MT753X_CTRL_PHY_ADDR(priv-&gt;mdiodev-&gt;addr),</div><div class='add'>+			 MII_MMD_DATA, reg);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	/* Select the Function : DATA with no post increment */</div><div class='add'>+	ret = bus-&gt;write(bus, MT753X_CTRL_PHY_ADDR(priv-&gt;mdiodev-&gt;addr),</div><div class='add'>+			 MII_MMD_CTRL, MDIO_MMD_VEND2 | MII_MMD_CTRL_NOINCR);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	/* Write the data into MMD's selected register */</div><div class='add'>+	ret = bus-&gt;write(bus, MT753X_CTRL_PHY_ADDR(priv-&gt;mdiodev-&gt;addr),</div><div class='add'>+			 MII_MMD_DATA, val);</div><div class='add'>+err:</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		dev_err(&amp;bus-&gt;dev, "failed to write mmd register\n");</div><div class='add'>+</div><div class='add'>+	mt7530_mutex_unlock(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+core_rmw(struct mt7530_priv *priv, u32 reg, u32 mask, u32 set)</div><div class='add'>+{</div><div class='add'>+	struct mii_bus *bus = priv-&gt;bus;</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mt7530_mutex_lock(priv);</div><div class='add'>+</div><div class='add'>+	/* Write the desired MMD Devad */</div><div class='add'>+	ret = bus-&gt;write(bus, MT753X_CTRL_PHY_ADDR(priv-&gt;mdiodev-&gt;addr),</div><div class='add'>+			 MII_MMD_CTRL, MDIO_MMD_VEND2);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	/* Write the desired MMD register address */</div><div class='add'>+	ret = bus-&gt;write(bus, MT753X_CTRL_PHY_ADDR(priv-&gt;mdiodev-&gt;addr),</div><div class='add'>+			 MII_MMD_DATA, reg);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	/* Select the Function : DATA with no post increment */</div><div class='add'>+	ret = bus-&gt;write(bus, MT753X_CTRL_PHY_ADDR(priv-&gt;mdiodev-&gt;addr),</div><div class='add'>+			 MII_MMD_CTRL, MDIO_MMD_VEND2 | MII_MMD_CTRL_NOINCR);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	/* Read the content of the MMD's selected register */</div><div class='add'>+	val = bus-&gt;read(bus, MT753X_CTRL_PHY_ADDR(priv-&gt;mdiodev-&gt;addr),</div><div class='add'>+			MII_MMD_DATA);</div><div class='add'>+	val &amp;= ~mask;</div><div class='add'>+	val |= set;</div><div class='add'>+	/* Write the data into MMD's selected register */</div><div class='add'>+	ret = bus-&gt;write(bus, MT753X_CTRL_PHY_ADDR(priv-&gt;mdiodev-&gt;addr),</div><div class='add'>+			 MII_MMD_DATA, val);</div><div class='add'>+err:</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		dev_err(&amp;bus-&gt;dev, "failed to write mmd register\n");</div><div class='add'>+</div><div class='add'>+	mt7530_mutex_unlock(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+core_set(struct mt7530_priv *priv, u32 reg, u32 val)</div><div class='add'>+{</div><div class='add'>+	core_rmw(priv, reg, 0, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+core_clear(struct mt7530_priv *priv, u32 reg, u32 val)</div><div class='add'>+{</div><div class='add'>+	core_rmw(priv, reg, val, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7530_mii_write(struct mt7530_priv *priv, u32 reg, u32 val)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(priv-&gt;regmap, reg, val);</div><div class='add'>+</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		dev_err(priv-&gt;dev,</div><div class='add'>+			"failed to write mt7530 register\n");</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32</div><div class='add'>+mt7530_mii_read(struct mt7530_priv *priv, u32 reg)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	ret = regmap_read(priv-&gt;regmap, reg, &amp;val);</div><div class='add'>+	if (ret) {</div><div class='add'>+		WARN_ON_ONCE(1);</div><div class='add'>+		dev_err(priv-&gt;dev,</div><div class='add'>+			"failed to read mt7530 register\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mt7530_write(struct mt7530_priv *priv, u32 reg, u32 val)</div><div class='add'>+{</div><div class='add'>+	mt7530_mutex_lock(priv);</div><div class='add'>+</div><div class='add'>+	mt7530_mii_write(priv, reg, val);</div><div class='add'>+</div><div class='add'>+	mt7530_mutex_unlock(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32</div><div class='add'>+_mt7530_unlocked_read(struct mt7530_dummy_poll *p)</div><div class='add'>+{</div><div class='add'>+	return mt7530_mii_read(p-&gt;priv, p-&gt;reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32</div><div class='add'>+_mt7530_read(struct mt7530_dummy_poll *p)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	mt7530_mutex_lock(p-&gt;priv);</div><div class='add'>+</div><div class='add'>+	val = mt7530_mii_read(p-&gt;priv, p-&gt;reg);</div><div class='add'>+</div><div class='add'>+	mt7530_mutex_unlock(p-&gt;priv);</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32</div><div class='add'>+mt7530_read(struct mt7530_priv *priv, u32 reg)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_dummy_poll p;</div><div class='add'>+</div><div class='add'>+	INIT_MT7530_DUMMY_POLL(&amp;p, priv, reg);</div><div class='add'>+	return _mt7530_read(&amp;p);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mt7530_rmw(struct mt7530_priv *priv, u32 reg,</div><div class='add'>+	   u32 mask, u32 set)</div><div class='add'>+{</div><div class='add'>+	mt7530_mutex_lock(priv);</div><div class='add'>+</div><div class='add'>+	regmap_update_bits(priv-&gt;regmap, reg, mask, set);</div><div class='add'>+</div><div class='add'>+	mt7530_mutex_unlock(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mt7530_set(struct mt7530_priv *priv, u32 reg, u32 val)</div><div class='add'>+{</div><div class='add'>+	mt7530_rmw(priv, reg, val, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mt7530_clear(struct mt7530_priv *priv, u32 reg, u32 val)</div><div class='add'>+{</div><div class='add'>+	mt7530_rmw(priv, reg, val, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7530_fdb_cmd(struct mt7530_priv *priv, enum mt7530_fdb_cmd cmd, u32 *rsp)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+	struct mt7530_dummy_poll p;</div><div class='add'>+</div><div class='add'>+	/* Set the command operating upon the MAC address entries */</div><div class='add'>+	val = ATC_BUSY | ATC_MAT(0) | cmd;</div><div class='add'>+	mt7530_write(priv, MT7530_ATC, val);</div><div class='add'>+</div><div class='add'>+	INIT_MT7530_DUMMY_POLL(&amp;p, priv, MT7530_ATC);</div><div class='add'>+	ret = readx_poll_timeout(_mt7530_read, &amp;p, val,</div><div class='add'>+				 !(val &amp; ATC_BUSY), 20, 20000);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(priv-&gt;dev, "reset timeout\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Additional sanity for read command if the specified</div><div class='add'>+	 * entry is invalid</div><div class='add'>+	 */</div><div class='add'>+	val = mt7530_read(priv, MT7530_ATC);</div><div class='add'>+	if ((cmd == MT7530_FDB_READ) &amp;&amp; (val &amp; ATC_INVALID))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (rsp)</div><div class='add'>+		*rsp = val;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mt7530_fdb_read(struct mt7530_priv *priv, struct mt7530_fdb *fdb)</div><div class='add'>+{</div><div class='add'>+	u32 reg[3];</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Read from ARL table into an array */</div><div class='add'>+	for (i = 0; i &lt; 3; i++) {</div><div class='add'>+		reg[i] = mt7530_read(priv, MT7530_TSRA1 + (i * 4));</div><div class='add'>+</div><div class='add'>+		dev_dbg(priv-&gt;dev, "%s(%d) reg[%d]=0x%x\n",</div><div class='add'>+			__func__, __LINE__, i, reg[i]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fdb-&gt;vid = (reg[1] &gt;&gt; CVID) &amp; CVID_MASK;</div><div class='add'>+	fdb-&gt;aging = (reg[2] &gt;&gt; AGE_TIMER) &amp; AGE_TIMER_MASK;</div><div class='add'>+	fdb-&gt;port_mask = (reg[2] &gt;&gt; PORT_MAP) &amp; PORT_MAP_MASK;</div><div class='add'>+	fdb-&gt;mac[0] = (reg[0] &gt;&gt; MAC_BYTE_0) &amp; MAC_BYTE_MASK;</div><div class='add'>+	fdb-&gt;mac[1] = (reg[0] &gt;&gt; MAC_BYTE_1) &amp; MAC_BYTE_MASK;</div><div class='add'>+	fdb-&gt;mac[2] = (reg[0] &gt;&gt; MAC_BYTE_2) &amp; MAC_BYTE_MASK;</div><div class='add'>+	fdb-&gt;mac[3] = (reg[0] &gt;&gt; MAC_BYTE_3) &amp; MAC_BYTE_MASK;</div><div class='add'>+	fdb-&gt;mac[4] = (reg[1] &gt;&gt; MAC_BYTE_4) &amp; MAC_BYTE_MASK;</div><div class='add'>+	fdb-&gt;mac[5] = (reg[1] &gt;&gt; MAC_BYTE_5) &amp; MAC_BYTE_MASK;</div><div class='add'>+	fdb-&gt;noarp = ((reg[2] &gt;&gt; ENT_STATUS) &amp; ENT_STATUS_MASK) == STATIC_ENT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mt7530_fdb_write(struct mt7530_priv *priv, u16 vid,</div><div class='add'>+		 u8 port_mask, const u8 *mac,</div><div class='add'>+		 u8 aging, u8 type)</div><div class='add'>+{</div><div class='add'>+	u32 reg[3] = { 0 };</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	reg[1] |= vid &amp; CVID_MASK;</div><div class='add'>+	reg[1] |= ATA2_IVL;</div><div class='add'>+	reg[1] |= ATA2_FID(FID_BRIDGED);</div><div class='add'>+	reg[2] |= (aging &amp; AGE_TIMER_MASK) &lt;&lt; AGE_TIMER;</div><div class='add'>+	reg[2] |= (port_mask &amp; PORT_MAP_MASK) &lt;&lt; PORT_MAP;</div><div class='add'>+	/* STATIC_ENT indicate that entry is static wouldn't</div><div class='add'>+	 * be aged out and STATIC_EMP specified as erasing an</div><div class='add'>+	 * entry</div><div class='add'>+	 */</div><div class='add'>+	reg[2] |= (type &amp; ENT_STATUS_MASK) &lt;&lt; ENT_STATUS;</div><div class='add'>+	reg[1] |= mac[5] &lt;&lt; MAC_BYTE_5;</div><div class='add'>+	reg[1] |= mac[4] &lt;&lt; MAC_BYTE_4;</div><div class='add'>+	reg[0] |= mac[3] &lt;&lt; MAC_BYTE_3;</div><div class='add'>+	reg[0] |= mac[2] &lt;&lt; MAC_BYTE_2;</div><div class='add'>+	reg[0] |= mac[1] &lt;&lt; MAC_BYTE_1;</div><div class='add'>+	reg[0] |= mac[0] &lt;&lt; MAC_BYTE_0;</div><div class='add'>+</div><div class='add'>+	/* Write array into the ARL table */</div><div class='add'>+	for (i = 0; i &lt; 3; i++)</div><div class='add'>+		mt7530_write(priv, MT7530_ATA1 + (i * 4), reg[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Set up switch core clock for MT7530 */</div><div class='add'>+static void mt7530_pll_setup(struct mt7530_priv *priv)</div><div class='add'>+{</div><div class='add'>+	/* Disable core clock */</div><div class='add'>+	core_clear(priv, CORE_TRGMII_GSW_CLK_CG, REG_GSWCK_EN);</div><div class='add'>+</div><div class='add'>+	/* Disable PLL */</div><div class='add'>+	core_write(priv, CORE_GSWPLL_GRP1, 0);</div><div class='add'>+</div><div class='add'>+	/* Set core clock into 500Mhz */</div><div class='add'>+	core_write(priv, CORE_GSWPLL_GRP2,</div><div class='add'>+		   RG_GSWPLL_POSDIV_500M(1) |</div><div class='add'>+		   RG_GSWPLL_FBKDIV_500M(25));</div><div class='add'>+</div><div class='add'>+	/* Enable PLL */</div><div class='add'>+	core_write(priv, CORE_GSWPLL_GRP1,</div><div class='add'>+		   RG_GSWPLL_EN_PRE |</div><div class='add'>+		   RG_GSWPLL_POSDIV_200M(2) |</div><div class='add'>+		   RG_GSWPLL_FBKDIV_200M(32));</div><div class='add'>+</div><div class='add'>+	udelay(20);</div><div class='add'>+</div><div class='add'>+	/* Enable core clock */</div><div class='add'>+	core_set(priv, CORE_TRGMII_GSW_CLK_CG, REG_GSWCK_EN);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* If port 6 is available as a CPU port, always prefer that as the default,</div><div class='add'>+ * otherwise don't care.</div><div class='add'>+ */</div><div class='add'>+static struct dsa_port *</div><div class='add'>+mt753x_preferred_default_local_cpu_port(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *cpu_dp = dsa_to_port(ds, 6);</div><div class='add'>+</div><div class='add'>+	if (dsa_port_is_cpu(cpu_dp))</div><div class='add'>+		return cpu_dp;</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Setup port 6 interface mode and TRGMII TX circuit */</div><div class='add'>+static void</div><div class='add'>+mt7530_setup_port6(struct dsa_switch *ds, phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+	u32 ncpo1, ssc_delta, xtal;</div><div class='add'>+</div><div class='add'>+	/* Disable the MT7530 TRGMII clocks */</div><div class='add'>+	core_clear(priv, CORE_TRGMII_GSW_CLK_CG, REG_TRGMIICK_EN);</div><div class='add'>+</div><div class='add'>+	if (interface == PHY_INTERFACE_MODE_RGMII) {</div><div class='add'>+		mt7530_rmw(priv, MT7530_P6ECR, P6_INTF_MODE_MASK,</div><div class='add'>+			   P6_INTF_MODE(0));</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mt7530_rmw(priv, MT7530_P6ECR, P6_INTF_MODE_MASK, P6_INTF_MODE(1));</div><div class='add'>+</div><div class='add'>+	xtal = mt7530_read(priv, MT753X_MTRAP) &amp; MT7530_XTAL_MASK;</div><div class='add'>+</div><div class='add'>+	if (xtal == MT7530_XTAL_25MHZ)</div><div class='add'>+		ssc_delta = 0x57;</div><div class='add'>+	else</div><div class='add'>+		ssc_delta = 0x87;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;id == ID_MT7621) {</div><div class='add'>+		/* PLL frequency: 125MHz: 1.0GBit */</div><div class='add'>+		if (xtal == MT7530_XTAL_40MHZ)</div><div class='add'>+			ncpo1 = 0x0640;</div><div class='add'>+		if (xtal == MT7530_XTAL_25MHZ)</div><div class='add'>+			ncpo1 = 0x0a00;</div><div class='add'>+	} else { /* PLL frequency: 250MHz: 2.0Gbit */</div><div class='add'>+		if (xtal == MT7530_XTAL_40MHZ)</div><div class='add'>+			ncpo1 = 0x0c80;</div><div class='add'>+		if (xtal == MT7530_XTAL_25MHZ)</div><div class='add'>+			ncpo1 = 0x1400;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Setup the MT7530 TRGMII Tx Clock */</div><div class='add'>+	core_write(priv, CORE_PLL_GROUP5, RG_LCDDS_PCW_NCPO1(ncpo1));</div><div class='add'>+	core_write(priv, CORE_PLL_GROUP6, RG_LCDDS_PCW_NCPO0(0));</div><div class='add'>+	core_write(priv, CORE_PLL_GROUP10, RG_LCDDS_SSC_DELTA(ssc_delta));</div><div class='add'>+	core_write(priv, CORE_PLL_GROUP11, RG_LCDDS_SSC_DELTA1(ssc_delta));</div><div class='add'>+	core_write(priv, CORE_PLL_GROUP4, RG_SYSPLL_DDSFBK_EN |</div><div class='add'>+		   RG_SYSPLL_BIAS_EN | RG_SYSPLL_BIAS_LPF_EN);</div><div class='add'>+	core_write(priv, CORE_PLL_GROUP2, RG_SYSPLL_EN_NORMAL |</div><div class='add'>+		   RG_SYSPLL_VODEN | RG_SYSPLL_POSDIV(1));</div><div class='add'>+	core_write(priv, CORE_PLL_GROUP7, RG_LCDDS_PCW_NCPO_CHG |</div><div class='add'>+		   RG_LCCDS_C(3) | RG_LCDDS_PWDB | RG_LCDDS_ISO_EN);</div><div class='add'>+</div><div class='add'>+	/* Enable the MT7530 TRGMII clocks */</div><div class='add'>+	core_set(priv, CORE_TRGMII_GSW_CLK_CG, REG_TRGMIICK_EN);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mt7531_pll_setup(struct mt7530_priv *priv)</div><div class='add'>+{</div><div class='add'>+	enum mt7531_xtal_fsel xtal;</div><div class='add'>+	u32 top_sig;</div><div class='add'>+	u32 hwstrap;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = mt7530_read(priv, MT7531_CREV);</div><div class='add'>+	top_sig = mt7530_read(priv, MT7531_TOP_SIG_SR);</div><div class='add'>+	hwstrap = mt7530_read(priv, MT753X_TRAP);</div><div class='add'>+	if ((val &amp; CHIP_REV_M) &gt; 0)</div><div class='add'>+		xtal = (top_sig &amp; PAD_MCM_SMI_EN) ? MT7531_XTAL_FSEL_40MHZ :</div><div class='add'>+						    MT7531_XTAL_FSEL_25MHZ;</div><div class='add'>+	else</div><div class='add'>+		xtal = (hwstrap &amp; MT7531_XTAL25) ? MT7531_XTAL_FSEL_25MHZ :</div><div class='add'>+						   MT7531_XTAL_FSEL_40MHZ;</div><div class='add'>+</div><div class='add'>+	/* Step 1 : Disable MT7531 COREPLL */</div><div class='add'>+	val = mt7530_read(priv, MT7531_PLLGP_EN);</div><div class='add'>+	val &amp;= ~EN_COREPLL;</div><div class='add'>+	mt7530_write(priv, MT7531_PLLGP_EN, val);</div><div class='add'>+</div><div class='add'>+	/* Step 2: switch to XTAL output */</div><div class='add'>+	val = mt7530_read(priv, MT7531_PLLGP_EN);</div><div class='add'>+	val |= SW_CLKSW;</div><div class='add'>+	mt7530_write(priv, MT7531_PLLGP_EN, val);</div><div class='add'>+</div><div class='add'>+	val = mt7530_read(priv, MT7531_PLLGP_CR0);</div><div class='add'>+	val &amp;= ~RG_COREPLL_EN;</div><div class='add'>+	mt7530_write(priv, MT7531_PLLGP_CR0, val);</div><div class='add'>+</div><div class='add'>+	/* Step 3: disable PLLGP and enable program PLLGP */</div><div class='add'>+	val = mt7530_read(priv, MT7531_PLLGP_EN);</div><div class='add'>+	val |= SW_PLLGP;</div><div class='add'>+	mt7530_write(priv, MT7531_PLLGP_EN, val);</div><div class='add'>+</div><div class='add'>+	/* Step 4: program COREPLL output frequency to 500MHz */</div><div class='add'>+	val = mt7530_read(priv, MT7531_PLLGP_CR0);</div><div class='add'>+	val &amp;= ~RG_COREPLL_POSDIV_M;</div><div class='add'>+	val |= 2 &lt;&lt; RG_COREPLL_POSDIV_S;</div><div class='add'>+	mt7530_write(priv, MT7531_PLLGP_CR0, val);</div><div class='add'>+	usleep_range(25, 35);</div><div class='add'>+</div><div class='add'>+	switch (xtal) {</div><div class='add'>+	case MT7531_XTAL_FSEL_25MHZ:</div><div class='add'>+		val = mt7530_read(priv, MT7531_PLLGP_CR0);</div><div class='add'>+		val &amp;= ~RG_COREPLL_SDM_PCW_M;</div><div class='add'>+		val |= 0x140000 &lt;&lt; RG_COREPLL_SDM_PCW_S;</div><div class='add'>+		mt7530_write(priv, MT7531_PLLGP_CR0, val);</div><div class='add'>+		break;</div><div class='add'>+	case MT7531_XTAL_FSEL_40MHZ:</div><div class='add'>+		val = mt7530_read(priv, MT7531_PLLGP_CR0);</div><div class='add'>+		val &amp;= ~RG_COREPLL_SDM_PCW_M;</div><div class='add'>+		val |= 0x190000 &lt;&lt; RG_COREPLL_SDM_PCW_S;</div><div class='add'>+		mt7530_write(priv, MT7531_PLLGP_CR0, val);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set feedback divide ratio update signal to high */</div><div class='add'>+	val = mt7530_read(priv, MT7531_PLLGP_CR0);</div><div class='add'>+	val |= RG_COREPLL_SDM_PCW_CHG;</div><div class='add'>+	mt7530_write(priv, MT7531_PLLGP_CR0, val);</div><div class='add'>+	/* Wait for at least 16 XTAL clocks */</div><div class='add'>+	usleep_range(10, 20);</div><div class='add'>+</div><div class='add'>+	/* Step 5: set feedback divide ratio update signal to low */</div><div class='add'>+	val = mt7530_read(priv, MT7531_PLLGP_CR0);</div><div class='add'>+	val &amp;= ~RG_COREPLL_SDM_PCW_CHG;</div><div class='add'>+	mt7530_write(priv, MT7531_PLLGP_CR0, val);</div><div class='add'>+</div><div class='add'>+	/* Enable 325M clock for SGMII */</div><div class='add'>+	mt7530_write(priv, MT7531_ANA_PLLGP_CR5, 0xad0000);</div><div class='add'>+</div><div class='add'>+	/* Enable 250SSC clock for RGMII */</div><div class='add'>+	mt7530_write(priv, MT7531_ANA_PLLGP_CR2, 0x4f40000);</div><div class='add'>+</div><div class='add'>+	/* Step 6: Enable MT7531 PLL */</div><div class='add'>+	val = mt7530_read(priv, MT7531_PLLGP_CR0);</div><div class='add'>+	val |= RG_COREPLL_EN;</div><div class='add'>+	mt7530_write(priv, MT7531_PLLGP_CR0, val);</div><div class='add'>+</div><div class='add'>+	val = mt7530_read(priv, MT7531_PLLGP_EN);</div><div class='add'>+	val |= EN_COREPLL;</div><div class='add'>+	mt7530_write(priv, MT7531_PLLGP_EN, val);</div><div class='add'>+	usleep_range(25, 35);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mt7530_mib_reset(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	mt7530_write(priv, MT7530_MIB_CCR, CCR_MIB_FLUSH);</div><div class='add'>+	mt7530_write(priv, MT7530_MIB_CCR, CCR_MIB_ACTIVATE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mt7530_phy_read_c22(struct mt7530_priv *priv, int port, int regnum)</div><div class='add'>+{</div><div class='add'>+	return mdiobus_read_nested(priv-&gt;bus, port, regnum);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mt7530_phy_write_c22(struct mt7530_priv *priv, int port, int regnum,</div><div class='add'>+				u16 val)</div><div class='add'>+{</div><div class='add'>+	return mdiobus_write_nested(priv-&gt;bus, port, regnum, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mt7530_phy_read_c45(struct mt7530_priv *priv, int port,</div><div class='add'>+			       int devad, int regnum)</div><div class='add'>+{</div><div class='add'>+	return mdiobus_c45_read_nested(priv-&gt;bus, port, devad, regnum);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mt7530_phy_write_c45(struct mt7530_priv *priv, int port, int devad,</div><div class='add'>+				int regnum, u16 val)</div><div class='add'>+{</div><div class='add'>+	return mdiobus_c45_write_nested(priv-&gt;bus, port, devad, regnum, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7531_ind_c45_phy_read(struct mt7530_priv *priv, int port, int devad,</div><div class='add'>+			int regnum)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_dummy_poll p;</div><div class='add'>+	u32 reg, val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	INIT_MT7530_DUMMY_POLL(&amp;p, priv, MT7531_PHY_IAC);</div><div class='add'>+</div><div class='add'>+	mt7530_mutex_lock(priv);</div><div class='add'>+</div><div class='add'>+	ret = readx_poll_timeout(_mt7530_unlocked_read, &amp;p, val,</div><div class='add'>+				 !(val &amp; MT7531_PHY_ACS_ST), 20, 100000);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(priv-&gt;dev, "poll timeout\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	reg = MT7531_MDIO_CL45_ADDR | MT7531_MDIO_PHY_ADDR(port) |</div><div class='add'>+	      MT7531_MDIO_DEV_ADDR(devad) | regnum;</div><div class='add'>+	mt7530_mii_write(priv, MT7531_PHY_IAC, reg | MT7531_PHY_ACS_ST);</div><div class='add'>+</div><div class='add'>+	ret = readx_poll_timeout(_mt7530_unlocked_read, &amp;p, val,</div><div class='add'>+				 !(val &amp; MT7531_PHY_ACS_ST), 20, 100000);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(priv-&gt;dev, "poll timeout\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	reg = MT7531_MDIO_CL45_READ | MT7531_MDIO_PHY_ADDR(port) |</div><div class='add'>+	      MT7531_MDIO_DEV_ADDR(devad);</div><div class='add'>+	mt7530_mii_write(priv, MT7531_PHY_IAC, reg | MT7531_PHY_ACS_ST);</div><div class='add'>+</div><div class='add'>+	ret = readx_poll_timeout(_mt7530_unlocked_read, &amp;p, val,</div><div class='add'>+				 !(val &amp; MT7531_PHY_ACS_ST), 20, 100000);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(priv-&gt;dev, "poll timeout\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = val &amp; MT7531_MDIO_RW_DATA_MASK;</div><div class='add'>+out:</div><div class='add'>+	mt7530_mutex_unlock(priv);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7531_ind_c45_phy_write(struct mt7530_priv *priv, int port, int devad,</div><div class='add'>+			 int regnum, u16 data)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_dummy_poll p;</div><div class='add'>+	u32 val, reg;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	INIT_MT7530_DUMMY_POLL(&amp;p, priv, MT7531_PHY_IAC);</div><div class='add'>+</div><div class='add'>+	mt7530_mutex_lock(priv);</div><div class='add'>+</div><div class='add'>+	ret = readx_poll_timeout(_mt7530_unlocked_read, &amp;p, val,</div><div class='add'>+				 !(val &amp; MT7531_PHY_ACS_ST), 20, 100000);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(priv-&gt;dev, "poll timeout\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	reg = MT7531_MDIO_CL45_ADDR | MT7531_MDIO_PHY_ADDR(port) |</div><div class='add'>+	      MT7531_MDIO_DEV_ADDR(devad) | regnum;</div><div class='add'>+	mt7530_mii_write(priv, MT7531_PHY_IAC, reg | MT7531_PHY_ACS_ST);</div><div class='add'>+</div><div class='add'>+	ret = readx_poll_timeout(_mt7530_unlocked_read, &amp;p, val,</div><div class='add'>+				 !(val &amp; MT7531_PHY_ACS_ST), 20, 100000);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(priv-&gt;dev, "poll timeout\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	reg = MT7531_MDIO_CL45_WRITE | MT7531_MDIO_PHY_ADDR(port) |</div><div class='add'>+	      MT7531_MDIO_DEV_ADDR(devad) | data;</div><div class='add'>+	mt7530_mii_write(priv, MT7531_PHY_IAC, reg | MT7531_PHY_ACS_ST);</div><div class='add'>+</div><div class='add'>+	ret = readx_poll_timeout(_mt7530_unlocked_read, &amp;p, val,</div><div class='add'>+				 !(val &amp; MT7531_PHY_ACS_ST), 20, 100000);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(priv-&gt;dev, "poll timeout\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mt7530_mutex_unlock(priv);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7531_ind_c22_phy_read(struct mt7530_priv *priv, int port, int regnum)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_dummy_poll p;</div><div class='add'>+	int ret;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	INIT_MT7530_DUMMY_POLL(&amp;p, priv, MT7531_PHY_IAC);</div><div class='add'>+</div><div class='add'>+	mt7530_mutex_lock(priv);</div><div class='add'>+</div><div class='add'>+	ret = readx_poll_timeout(_mt7530_unlocked_read, &amp;p, val,</div><div class='add'>+				 !(val &amp; MT7531_PHY_ACS_ST), 20, 100000);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(priv-&gt;dev, "poll timeout\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	val = MT7531_MDIO_CL22_READ | MT7531_MDIO_PHY_ADDR(port) |</div><div class='add'>+	      MT7531_MDIO_REG_ADDR(regnum);</div><div class='add'>+</div><div class='add'>+	mt7530_mii_write(priv, MT7531_PHY_IAC, val | MT7531_PHY_ACS_ST);</div><div class='add'>+</div><div class='add'>+	ret = readx_poll_timeout(_mt7530_unlocked_read, &amp;p, val,</div><div class='add'>+				 !(val &amp; MT7531_PHY_ACS_ST), 20, 100000);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(priv-&gt;dev, "poll timeout\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = val &amp; MT7531_MDIO_RW_DATA_MASK;</div><div class='add'>+out:</div><div class='add'>+	mt7530_mutex_unlock(priv);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7531_ind_c22_phy_write(struct mt7530_priv *priv, int port, int regnum,</div><div class='add'>+			 u16 data)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_dummy_poll p;</div><div class='add'>+	int ret;</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	INIT_MT7530_DUMMY_POLL(&amp;p, priv, MT7531_PHY_IAC);</div><div class='add'>+</div><div class='add'>+	mt7530_mutex_lock(priv);</div><div class='add'>+</div><div class='add'>+	ret = readx_poll_timeout(_mt7530_unlocked_read, &amp;p, reg,</div><div class='add'>+				 !(reg &amp; MT7531_PHY_ACS_ST), 20, 100000);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(priv-&gt;dev, "poll timeout\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	reg = MT7531_MDIO_CL22_WRITE | MT7531_MDIO_PHY_ADDR(port) |</div><div class='add'>+	      MT7531_MDIO_REG_ADDR(regnum) | data;</div><div class='add'>+</div><div class='add'>+	mt7530_mii_write(priv, MT7531_PHY_IAC, reg | MT7531_PHY_ACS_ST);</div><div class='add'>+</div><div class='add'>+	ret = readx_poll_timeout(_mt7530_unlocked_read, &amp;p, reg,</div><div class='add'>+				 !(reg &amp; MT7531_PHY_ACS_ST), 20, 100000);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(priv-&gt;dev, "poll timeout\n");</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mt7530_mutex_unlock(priv);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt753x_phy_read_c22(struct mii_bus *bus, int port, int regnum)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = bus-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return priv-&gt;info-&gt;phy_read_c22(priv, port, regnum);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt753x_phy_read_c45(struct mii_bus *bus, int port, int devad, int regnum)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = bus-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return priv-&gt;info-&gt;phy_read_c45(priv, port, devad, regnum);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt753x_phy_write_c22(struct mii_bus *bus, int port, int regnum, u16 val)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = bus-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return priv-&gt;info-&gt;phy_write_c22(priv, port, regnum, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt753x_phy_write_c45(struct mii_bus *bus, int port, int devad, int regnum,</div><div class='add'>+		     u16 val)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = bus-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return priv-&gt;info-&gt;phy_write_c45(priv, port, devad, regnum, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mt7530_get_strings(struct dsa_switch *ds, int port, u32 stringset,</div><div class='add'>+		   uint8_t *data)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (stringset != ETH_SS_STATS)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(mt7530_mib); i++)</div><div class='add'>+		ethtool_puts(&amp;data, mt7530_mib[i].name);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mt7530_read_port_stats(struct mt7530_priv *priv, int port,</div><div class='add'>+		       u32 offset, u8 size, uint64_t *data)</div><div class='add'>+{</div><div class='add'>+	u32 val, reg = MT7530_PORT_MIB_COUNTER(port) + offset;</div><div class='add'>+</div><div class='add'>+	val = mt7530_read(priv, reg);</div><div class='add'>+	*data = val;</div><div class='add'>+</div><div class='add'>+	if (size == 2) {</div><div class='add'>+		val = mt7530_read(priv, reg + 4);</div><div class='add'>+		*data |= (u64)val &lt;&lt; 32;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mt7530_get_ethtool_stats(struct dsa_switch *ds, int port,</div><div class='add'>+			 uint64_t *data)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+	const struct mt7530_mib_desc *mib;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(mt7530_mib); i++) {</div><div class='add'>+		mib = &amp;mt7530_mib[i];</div><div class='add'>+</div><div class='add'>+		mt7530_read_port_stats(priv, port, mib-&gt;offset, mib-&gt;size,</div><div class='add'>+				       data + i);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7530_get_sset_count(struct dsa_switch *ds, int port, int sset)</div><div class='add'>+{</div><div class='add'>+	if (sset != ETH_SS_STATS)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return ARRAY_SIZE(mt7530_mib);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mt7530_get_eth_mac_stats(struct dsa_switch *ds, int port,</div><div class='add'>+				     struct ethtool_eth_mac_stats *mac_stats)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	/* MIB counter doesn't provide a FramesTransmittedOK but instead</div><div class='add'>+	 * provide stats for Unicast, Broadcast and Multicast frames separately.</div><div class='add'>+	 * To simulate a global frame counter, read Unicast and addition Multicast</div><div class='add'>+	 * and Broadcast later</div><div class='add'>+	 */</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_UNICAST, 1,</div><div class='add'>+			       &amp;mac_stats-&gt;FramesTransmittedOK);</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_SINGLE_COLLISION, 1,</div><div class='add'>+			       &amp;mac_stats-&gt;SingleCollisionFrames);</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_MULTIPLE_COLLISION, 1,</div><div class='add'>+			       &amp;mac_stats-&gt;MultipleCollisionFrames);</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_UNICAST, 1,</div><div class='add'>+			       &amp;mac_stats-&gt;FramesReceivedOK);</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_BYTES, 2,</div><div class='add'>+			       &amp;mac_stats-&gt;OctetsTransmittedOK);</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_ALIGN_ERR, 1,</div><div class='add'>+			       &amp;mac_stats-&gt;AlignmentErrors);</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_DEFERRED, 1,</div><div class='add'>+			       &amp;mac_stats-&gt;FramesWithDeferredXmissions);</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_LATE_COLLISION, 1,</div><div class='add'>+			       &amp;mac_stats-&gt;LateCollisions);</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_EXCESSIVE_COLLISION, 1,</div><div class='add'>+			       &amp;mac_stats-&gt;FramesAbortedDueToXSColls);</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_BYTES, 2,</div><div class='add'>+			       &amp;mac_stats-&gt;OctetsReceivedOK);</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_MULTICAST, 1,</div><div class='add'>+			       &amp;mac_stats-&gt;MulticastFramesXmittedOK);</div><div class='add'>+	mac_stats-&gt;FramesTransmittedOK += mac_stats-&gt;MulticastFramesXmittedOK;</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_BROADCAST, 1,</div><div class='add'>+			       &amp;mac_stats-&gt;BroadcastFramesXmittedOK);</div><div class='add'>+	mac_stats-&gt;FramesTransmittedOK += mac_stats-&gt;BroadcastFramesXmittedOK;</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_MULTICAST, 1,</div><div class='add'>+			       &amp;mac_stats-&gt;MulticastFramesReceivedOK);</div><div class='add'>+	mac_stats-&gt;FramesReceivedOK += mac_stats-&gt;MulticastFramesReceivedOK;</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_BROADCAST, 1,</div><div class='add'>+			       &amp;mac_stats-&gt;BroadcastFramesReceivedOK);</div><div class='add'>+	mac_stats-&gt;FramesReceivedOK += mac_stats-&gt;BroadcastFramesReceivedOK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ethtool_rmon_hist_range mt7530_rmon_ranges[] = {</div><div class='add'>+	{ 0, 64 },</div><div class='add'>+	{ 65, 127 },</div><div class='add'>+	{ 128, 255 },</div><div class='add'>+	{ 256, 511 },</div><div class='add'>+	{ 512, 1023 },</div><div class='add'>+	{ 1024, MT7530_MAX_MTU },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void mt7530_get_rmon_stats(struct dsa_switch *ds, int port,</div><div class='add'>+				  struct ethtool_rmon_stats *rmon_stats,</div><div class='add'>+				  const struct ethtool_rmon_hist_range **ranges)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_UNDER_SIZE_ERR, 1,</div><div class='add'>+			       &amp;rmon_stats-&gt;undersize_pkts);</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_OVER_SZ_ERR, 1,</div><div class='add'>+			       &amp;rmon_stats-&gt;oversize_pkts);</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_FRAG_ERR, 1,</div><div class='add'>+			       &amp;rmon_stats-&gt;fragments);</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_JABBER_ERR, 1,</div><div class='add'>+			       &amp;rmon_stats-&gt;jabbers);</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_PKT_SZ_64, 1,</div><div class='add'>+			       &amp;rmon_stats-&gt;hist[0]);</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_PKT_SZ_65_TO_127, 1,</div><div class='add'>+			       &amp;rmon_stats-&gt;hist[1]);</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_PKT_SZ_128_TO_255, 1,</div><div class='add'>+			       &amp;rmon_stats-&gt;hist[2]);</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_PKT_SZ_256_TO_511, 1,</div><div class='add'>+			       &amp;rmon_stats-&gt;hist[3]);</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_PKT_SZ_512_TO_1023, 1,</div><div class='add'>+			       &amp;rmon_stats-&gt;hist[4]);</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_PKT_SZ_1024_TO_MAX, 1,</div><div class='add'>+			       &amp;rmon_stats-&gt;hist[5]);</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_PKT_SZ_64, 1,</div><div class='add'>+			       &amp;rmon_stats-&gt;hist_tx[0]);</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_PKT_SZ_65_TO_127, 1,</div><div class='add'>+			       &amp;rmon_stats-&gt;hist_tx[1]);</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_PKT_SZ_128_TO_255, 1,</div><div class='add'>+			       &amp;rmon_stats-&gt;hist_tx[2]);</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_PKT_SZ_256_TO_511, 1,</div><div class='add'>+			       &amp;rmon_stats-&gt;hist_tx[3]);</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_PKT_SZ_512_TO_1023, 1,</div><div class='add'>+			       &amp;rmon_stats-&gt;hist_tx[4]);</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_PKT_SZ_1024_TO_MAX, 1,</div><div class='add'>+			       &amp;rmon_stats-&gt;hist_tx[5]);</div><div class='add'>+</div><div class='add'>+	*ranges = mt7530_rmon_ranges;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mt7530_get_stats64(struct dsa_switch *ds, int port,</div><div class='add'>+			       struct rtnl_link_stats64 *storage)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+	uint64_t data;</div><div class='add'>+</div><div class='add'>+	/* MIB counter doesn't provide a FramesTransmittedOK but instead</div><div class='add'>+	 * provide stats for Unicast, Broadcast and Multicast frames separately.</div><div class='add'>+	 * To simulate a global frame counter, read Unicast and addition Multicast</div><div class='add'>+	 * and Broadcast later</div><div class='add'>+	 */</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_UNICAST, 1,</div><div class='add'>+			       &amp;storage-&gt;rx_packets);</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_MULTICAST, 1,</div><div class='add'>+			       &amp;storage-&gt;multicast);</div><div class='add'>+	storage-&gt;rx_packets += storage-&gt;multicast;</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_BROADCAST, 1,</div><div class='add'>+			       &amp;data);</div><div class='add'>+	storage-&gt;rx_packets += data;</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_UNICAST, 1,</div><div class='add'>+			       &amp;storage-&gt;tx_packets);</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_MULTICAST, 1,</div><div class='add'>+			       &amp;data);</div><div class='add'>+	storage-&gt;tx_packets += data;</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_BROADCAST, 1,</div><div class='add'>+			       &amp;data);</div><div class='add'>+	storage-&gt;tx_packets += data;</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_BYTES, 2,</div><div class='add'>+			       &amp;storage-&gt;rx_bytes);</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_BYTES, 2,</div><div class='add'>+			       &amp;storage-&gt;tx_bytes);</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_DROP, 1,</div><div class='add'>+			       &amp;storage-&gt;rx_dropped);</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_DROP, 1,</div><div class='add'>+			       &amp;storage-&gt;tx_dropped);</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_CRC_ERR, 1,</div><div class='add'>+			       &amp;storage-&gt;rx_crc_errors);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mt7530_get_eth_ctrl_stats(struct dsa_switch *ds, int port,</div><div class='add'>+				      struct ethtool_eth_ctrl_stats *ctrl_stats)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_PAUSE, 1,</div><div class='add'>+			       &amp;ctrl_stats-&gt;MACControlFramesTransmitted);</div><div class='add'>+</div><div class='add'>+	mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_PAUSE, 1,</div><div class='add'>+			       &amp;ctrl_stats-&gt;MACControlFramesReceived);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7530_set_ageing_time(struct dsa_switch *ds, unsigned int msecs)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+	unsigned int secs = msecs / 1000;</div><div class='add'>+	unsigned int tmp_age_count;</div><div class='add'>+	unsigned int error = -1;</div><div class='add'>+	unsigned int age_count;</div><div class='add'>+	unsigned int age_unit;</div><div class='add'>+</div><div class='add'>+	/* Applied timer is (AGE_CNT + 1) * (AGE_UNIT + 1) seconds */</div><div class='add'>+	if (secs &lt; 1 || secs &gt; (AGE_CNT_MAX + 1) * (AGE_UNIT_MAX + 1))</div><div class='add'>+		return -ERANGE;</div><div class='add'>+</div><div class='add'>+	/* iterate through all possible age_count to find the closest pair */</div><div class='add'>+	for (tmp_age_count = 0; tmp_age_count &lt;= AGE_CNT_MAX; ++tmp_age_count) {</div><div class='add'>+		unsigned int tmp_age_unit = secs / (tmp_age_count + 1) - 1;</div><div class='add'>+</div><div class='add'>+		if (tmp_age_unit &lt;= AGE_UNIT_MAX) {</div><div class='add'>+			unsigned int tmp_error = secs -</div><div class='add'>+				(tmp_age_count + 1) * (tmp_age_unit + 1);</div><div class='add'>+</div><div class='add'>+			/* found a closer pair */</div><div class='add'>+			if (error &gt; tmp_error) {</div><div class='add'>+				error = tmp_error;</div><div class='add'>+				age_count = tmp_age_count;</div><div class='add'>+				age_unit = tmp_age_unit;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			/* found the exact match, so break the loop */</div><div class='add'>+			if (!error)</div><div class='add'>+				break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mt7530_write(priv, MT7530_AAC, AGE_CNT(age_count) | AGE_UNIT(age_unit));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char *mt7530_p5_mode_str(unsigned int mode)</div><div class='add'>+{</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case MUX_PHY_P0:</div><div class='add'>+		return "MUX PHY P0";</div><div class='add'>+	case MUX_PHY_P4:</div><div class='add'>+		return "MUX PHY P4";</div><div class='add'>+	default:</div><div class='add'>+		return "GMAC5";</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mt7530_setup_port5(struct dsa_switch *ds, phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+	u8 tx_delay = 0;</div><div class='add'>+	int val;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+</div><div class='add'>+	val = mt7530_read(priv, MT753X_MTRAP);</div><div class='add'>+</div><div class='add'>+	val &amp;= ~MT7530_P5_PHY0_SEL &amp; ~MT7530_P5_MAC_SEL &amp; ~MT7530_P5_RGMII_MODE;</div><div class='add'>+</div><div class='add'>+	switch (priv-&gt;p5_mode) {</div><div class='add'>+	/* MUX_PHY_P0: P0 -&gt; P5 -&gt; SoC MAC */</div><div class='add'>+	case MUX_PHY_P0:</div><div class='add'>+		val |= MT7530_P5_PHY0_SEL;</div><div class='add'>+		fallthrough;</div><div class='add'>+</div><div class='add'>+	/* MUX_PHY_P4: P4 -&gt; P5 -&gt; SoC MAC */</div><div class='add'>+	case MUX_PHY_P4:</div><div class='add'>+		/* Setup the MAC by default for the cpu port */</div><div class='add'>+		mt7530_write(priv, MT753X_PMCR_P(5), 0x56300);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	/* GMAC5: P5 -&gt; SoC MAC or external PHY */</div><div class='add'>+	default:</div><div class='add'>+		val |= MT7530_P5_MAC_SEL;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Setup RGMII settings */</div><div class='add'>+	if (phy_interface_mode_is_rgmii(interface)) {</div><div class='add'>+		val |= MT7530_P5_RGMII_MODE;</div><div class='add'>+</div><div class='add'>+		/* P5 RGMII RX Clock Control: delay setting for 1000M */</div><div class='add'>+		mt7530_write(priv, MT7530_P5RGMIIRXCR, CSR_RGMII_EDGE_ALIGN);</div><div class='add'>+</div><div class='add'>+		/* Don't set delay in DSA mode */</div><div class='add'>+		if (!dsa_is_dsa_port(priv-&gt;ds, 5) &amp;&amp;</div><div class='add'>+		    (interface == PHY_INTERFACE_MODE_RGMII_TXID ||</div><div class='add'>+		     interface == PHY_INTERFACE_MODE_RGMII_ID))</div><div class='add'>+			tx_delay = 4; /* n * 0.5 ns */</div><div class='add'>+</div><div class='add'>+		/* P5 RGMII TX Clock Control: delay x */</div><div class='add'>+		mt7530_write(priv, MT7530_P5RGMIITXCR,</div><div class='add'>+			     CSR_RGMII_TXC_CFG(0x10 + tx_delay));</div><div class='add'>+</div><div class='add'>+		/* reduce P5 RGMII Tx driving, 8mA */</div><div class='add'>+		mt7530_write(priv, MT7530_IO_DRV_CR,</div><div class='add'>+			     P5_IO_CLK_DRV(1) | P5_IO_DATA_DRV(1));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mt7530_write(priv, MT753X_MTRAP, val);</div><div class='add'>+</div><div class='add'>+	dev_dbg(ds-&gt;dev, "Setup P5, HWTRAP=0x%x, mode=%s, phy-mode=%s\n", val,</div><div class='add'>+		mt7530_p5_mode_str(priv-&gt;p5_mode), phy_modes(interface));</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* In Clause 5 of IEEE Std 802-2014, two sublayers of the data link layer (DLL)</div><div class='add'>+ * of the Open Systems Interconnection basic reference model (OSI/RM) are</div><div class='add'>+ * described; the medium access control (MAC) and logical link control (LLC)</div><div class='add'>+ * sublayers. The MAC sublayer is the one facing the physical layer.</div><div class='add'>+ *</div><div class='add'>+ * In 8.2 of IEEE Std 802.1Q-2022, the Bridge architecture is described. A</div><div class='add'>+ * Bridge component comprises a MAC Relay Entity for interconnecting the Ports</div><div class='add'>+ * of the Bridge, at least two Ports, and higher layer entities with at least a</div><div class='add'>+ * Spanning Tree Protocol Entity included.</div><div class='add'>+ *</div><div class='add'>+ * Each Bridge Port also functions as an end station and shall provide the MAC</div><div class='add'>+ * Service to an LLC Entity. Each instance of the MAC Service is provided to a</div><div class='add'>+ * distinct LLC Entity that supports protocol identification, multiplexing, and</div><div class='add'>+ * demultiplexing, for protocol data unit (PDU) transmission and reception by</div><div class='add'>+ * one or more higher layer entities.</div><div class='add'>+ *</div><div class='add'>+ * It is described in 8.13.9 of IEEE Std 802.1Q-2022 that in a Bridge, the LLC</div><div class='add'>+ * Entity associated with each Bridge Port is modeled as being directly</div><div class='add'>+ * connected to the attached Local Area Network (LAN).</div><div class='add'>+ *</div><div class='add'>+ * On the switch with CPU port architecture, CPU port functions as Management</div><div class='add'>+ * Port, and the Management Port functionality is provided by software which</div><div class='add'>+ * functions as an end station. Software is connected to an IEEE 802 LAN that is</div><div class='add'>+ * wholly contained within the system that incorporates the Bridge. Software</div><div class='add'>+ * provides access to the LLC Entity associated with each Bridge Port by the</div><div class='add'>+ * value of the source port field on the special tag on the frame received by</div><div class='add'>+ * software.</div><div class='add'>+ *</div><div class='add'>+ * We call frames that carry control information to determine the active</div><div class='add'>+ * topology and current extent of each Virtual Local Area Network (VLAN), i.e.,</div><div class='add'>+ * spanning tree or Shortest Path Bridging (SPB) and Multiple VLAN Registration</div><div class='add'>+ * Protocol Data Units (MVRPDUs), and frames from other link constrained</div><div class='add'>+ * protocols, such as Extensible Authentication Protocol over LAN (EAPOL) and</div><div class='add'>+ * Link Layer Discovery Protocol (LLDP), link-local frames. They are not</div><div class='add'>+ * forwarded by a Bridge. Permanently configured entries in the filtering</div><div class='add'>+ * database (FDB) ensure that such frames are discarded by the Forwarding</div><div class='add'>+ * Process. In 8.6.3 of IEEE Std 802.1Q-2022, this is described in detail:</div><div class='add'>+ *</div><div class='add'>+ * Each of the reserved MAC addresses specified in Table 8-1</div><div class='add'>+ * (01-80-C2-00-00-[00,01,02,03,04,05,06,07,08,09,0A,0B,0C,0D,0E,0F]) shall be</div><div class='add'>+ * permanently configured in the FDB in C-VLAN components and ERs.</div><div class='add'>+ *</div><div class='add'>+ * Each of the reserved MAC addresses specified in Table 8-2</div><div class='add'>+ * (01-80-C2-00-00-[01,02,03,04,05,06,07,08,09,0A,0E]) shall be permanently</div><div class='add'>+ * configured in the FDB in S-VLAN components.</div><div class='add'>+ *</div><div class='add'>+ * Each of the reserved MAC addresses specified in Table 8-3</div><div class='add'>+ * (01-80-C2-00-00-[01,02,04,0E]) shall be permanently configured in the FDB in</div><div class='add'>+ * TPMR components.</div><div class='add'>+ *</div><div class='add'>+ * The FDB entries for reserved MAC addresses shall specify filtering for all</div><div class='add'>+ * Bridge Ports and all VIDs. Management shall not provide the capability to</div><div class='add'>+ * modify or remove entries for reserved MAC addresses.</div><div class='add'>+ *</div><div class='add'>+ * The addresses in Table 8-1, Table 8-2, and Table 8-3 determine the scope of</div><div class='add'>+ * propagation of PDUs within a Bridged Network, as follows:</div><div class='add'>+ *</div><div class='add'>+ *   The Nearest Bridge group address (01-80-C2-00-00-0E) is an address that no</div><div class='add'>+ *   conformant Two-Port MAC Relay (TPMR) component, Service VLAN (S-VLAN)</div><div class='add'>+ *   component, Customer VLAN (C-VLAN) component, or MAC Bridge can forward.</div><div class='add'>+ *   PDUs transmitted using this destination address, or any other addresses</div><div class='add'>+ *   that appear in Table 8-1, Table 8-2, and Table 8-3</div><div class='add'>+ *   (01-80-C2-00-00-[00,01,02,03,04,05,06,07,08,09,0A,0B,0C,0D,0E,0F]), can</div><div class='add'>+ *   therefore travel no further than those stations that can be reached via a</div><div class='add'>+ *   single individual LAN from the originating station.</div><div class='add'>+ *</div><div class='add'>+ *   The Nearest non-TPMR Bridge group address (01-80-C2-00-00-03), is an</div><div class='add'>+ *   address that no conformant S-VLAN component, C-VLAN component, or MAC</div><div class='add'>+ *   Bridge can forward; however, this address is relayed by a TPMR component.</div><div class='add'>+ *   PDUs using this destination address, or any of the other addresses that</div><div class='add'>+ *   appear in both Table 8-1 and Table 8-2 but not in Table 8-3</div><div class='add'>+ *   (01-80-C2-00-00-[00,03,05,06,07,08,09,0A,0B,0C,0D,0F]), will be relayed by</div><div class='add'>+ *   any TPMRs but will propagate no further than the nearest S-VLAN component,</div><div class='add'>+ *   C-VLAN component, or MAC Bridge.</div><div class='add'>+ *</div><div class='add'>+ *   The Nearest Customer Bridge group address (01-80-C2-00-00-00) is an address</div><div class='add'>+ *   that no conformant C-VLAN component, MAC Bridge can forward; however, it is</div><div class='add'>+ *   relayed by TPMR components and S-VLAN components. PDUs using this</div><div class='add'>+ *   destination address, or any of the other addresses that appear in Table 8-1</div><div class='add'>+ *   but not in either Table 8-2 or Table 8-3 (01-80-C2-00-00-[00,0B,0C,0D,0F]),</div><div class='add'>+ *   will be relayed by TPMR components and S-VLAN components but will propagate</div><div class='add'>+ *   no further than the nearest C-VLAN component or MAC Bridge.</div><div class='add'>+ *</div><div class='add'>+ * Because the LLC Entity associated with each Bridge Port is provided via CPU</div><div class='add'>+ * port, we must not filter these frames but forward them to CPU port.</div><div class='add'>+ *</div><div class='add'>+ * In a Bridge, the transmission Port is majorly decided by ingress and egress</div><div class='add'>+ * rules, FDB, and spanning tree Port State functions of the Forwarding Process.</div><div class='add'>+ * For link-local frames, only CPU port should be designated as destination port</div><div class='add'>+ * in the FDB, and the other functions of the Forwarding Process must not</div><div class='add'>+ * interfere with the decision of the transmission Port. We call this process</div><div class='add'>+ * trapping frames to CPU port.</div><div class='add'>+ *</div><div class='add'>+ * Therefore, on the switch with CPU port architecture, link-local frames must</div><div class='add'>+ * be trapped to CPU port, and certain link-local frames received by a Port of a</div><div class='add'>+ * Bridge comprising a TPMR component or an S-VLAN component must be excluded</div><div class='add'>+ * from it.</div><div class='add'>+ *</div><div class='add'>+ * A Bridge of the switch with CPU port architecture cannot comprise a Two-Port</div><div class='add'>+ * MAC Relay (TPMR) component as a TPMR component supports only a subset of the</div><div class='add'>+ * functionality of a MAC Bridge. A Bridge comprising two Ports (Management Port</div><div class='add'>+ * doesn't count) of this architecture will either function as a standard MAC</div><div class='add'>+ * Bridge or a standard VLAN Bridge.</div><div class='add'>+ *</div><div class='add'>+ * Therefore, a Bridge of this architecture can only comprise S-VLAN components,</div><div class='add'>+ * C-VLAN components, or MAC Bridge components. Since there's no TPMR component,</div><div class='add'>+ * we don't need to relay PDUs using the destination addresses specified on the</div><div class='add'>+ * Nearest non-TPMR section, and the proportion of the Nearest Customer Bridge</div><div class='add'>+ * section where they must be relayed by TPMR components.</div><div class='add'>+ *</div><div class='add'>+ * One option to trap link-local frames to CPU port is to add static FDB entries</div><div class='add'>+ * with CPU port designated as destination port. However, because that</div><div class='add'>+ * Independent VLAN Learning (IVL) is being used on every VID, each entry only</div><div class='add'>+ * applies to a single VLAN Identifier (VID). For a Bridge comprising a MAC</div><div class='add'>+ * Bridge component or a C-VLAN component, there would have to be 16 times 4096</div><div class='add'>+ * entries. This switch intellectual property can only hold a maximum of 2048</div><div class='add'>+ * entries. Using this option, there also isn't a mechanism to prevent</div><div class='add'>+ * link-local frames from being discarded when the spanning tree Port State of</div><div class='add'>+ * the reception Port is discarding.</div><div class='add'>+ *</div><div class='add'>+ * The remaining option is to utilise the BPC, RGAC1, RGAC2, RGAC3, and RGAC4</div><div class='add'>+ * registers. Whilst this applies to every VID, it doesn't contain all of the</div><div class='add'>+ * reserved MAC addresses without affecting the remaining Standard Group MAC</div><div class='add'>+ * Addresses. The REV_UN frame tag utilised using the RGAC4 register covers the</div><div class='add'>+ * remaining 01-80-C2-00-00-[04,05,06,07,08,09,0A,0B,0C,0D,0F] destination</div><div class='add'>+ * addresses. It also includes the 01-80-C2-00-00-22 to 01-80-C2-00-00-FF</div><div class='add'>+ * destination addresses which may be relayed by MAC Bridges or VLAN Bridges.</div><div class='add'>+ * The latter option provides better but not complete conformance.</div><div class='add'>+ *</div><div class='add'>+ * This switch intellectual property also does not provide a mechanism to trap</div><div class='add'>+ * link-local frames with specific destination addresses to CPU port by Bridge,</div><div class='add'>+ * to conform to the filtering rules for the distinct Bridge components.</div><div class='add'>+ *</div><div class='add'>+ * Therefore, regardless of the type of the Bridge component, link-local frames</div><div class='add'>+ * with these destination addresses will be trapped to CPU port:</div><div class='add'>+ *</div><div class='add'>+ * 01-80-C2-00-00-[00,01,02,03,0E]</div><div class='add'>+ *</div><div class='add'>+ * In a Bridge comprising a MAC Bridge component or a C-VLAN component:</div><div class='add'>+ *</div><div class='add'>+ *   Link-local frames with these destination addresses won't be trapped to CPU</div><div class='add'>+ *   port which won't conform to IEEE Std 802.1Q-2022:</div><div class='add'>+ *</div><div class='add'>+ *   01-80-C2-00-00-[04,05,06,07,08,09,0A,0B,0C,0D,0F]</div><div class='add'>+ *</div><div class='add'>+ * In a Bridge comprising an S-VLAN component:</div><div class='add'>+ *</div><div class='add'>+ *   Link-local frames with these destination addresses will be trapped to CPU</div><div class='add'>+ *   port which won't conform to IEEE Std 802.1Q-2022:</div><div class='add'>+ *</div><div class='add'>+ *   01-80-C2-00-00-00</div><div class='add'>+ *</div><div class='add'>+ *   Link-local frames with these destination addresses won't be trapped to CPU</div><div class='add'>+ *   port which won't conform to IEEE Std 802.1Q-2022:</div><div class='add'>+ *</div><div class='add'>+ *   01-80-C2-00-00-[04,05,06,07,08,09,0A]</div><div class='add'>+ *</div><div class='add'>+ * To trap link-local frames to CPU port as conformant as this switch</div><div class='add'>+ * intellectual property can allow, link-local frames are made to be regarded as</div><div class='add'>+ * Bridge Protocol Data Units (BPDUs). This is because this switch intellectual</div><div class='add'>+ * property only lets the frames regarded as BPDUs bypass the spanning tree Port</div><div class='add'>+ * State function of the Forwarding Process.</div><div class='add'>+ *</div><div class='add'>+ * The only remaining interference is the ingress rules. When the reception Port</div><div class='add'>+ * has no PVID assigned on software, VLAN-untagged frames won't be allowed in.</div><div class='add'>+ * There doesn't seem to be a mechanism on the switch intellectual property to</div><div class='add'>+ * have link-local frames bypass this function of the Forwarding Process.</div><div class='add'>+ */</div><div class='add'>+static void</div><div class='add'>+mt753x_trap_frames(struct mt7530_priv *priv)</div><div class='add'>+{</div><div class='add'>+	/* Trap 802.1X PAE frames and BPDUs to the CPU port(s) and egress them</div><div class='add'>+	 * VLAN-untagged.</div><div class='add'>+	 */</div><div class='add'>+	mt7530_rmw(priv, MT753X_BPC,</div><div class='add'>+		   PAE_BPDU_FR | PAE_EG_TAG_MASK | PAE_PORT_FW_MASK |</div><div class='add'>+			   BPDU_EG_TAG_MASK | BPDU_PORT_FW_MASK,</div><div class='add'>+		   PAE_BPDU_FR | PAE_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |</div><div class='add'>+			   PAE_PORT_FW(TO_CPU_FW_CPU_ONLY) |</div><div class='add'>+			   BPDU_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |</div><div class='add'>+			   TO_CPU_FW_CPU_ONLY);</div><div class='add'>+</div><div class='add'>+	/* Trap frames with :01 and :02 MAC DAs to the CPU port(s) and egress</div><div class='add'>+	 * them VLAN-untagged.</div><div class='add'>+	 */</div><div class='add'>+	mt7530_rmw(priv, MT753X_RGAC1,</div><div class='add'>+		   R02_BPDU_FR | R02_EG_TAG_MASK | R02_PORT_FW_MASK |</div><div class='add'>+			   R01_BPDU_FR | R01_EG_TAG_MASK | R01_PORT_FW_MASK,</div><div class='add'>+		   R02_BPDU_FR | R02_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |</div><div class='add'>+			   R02_PORT_FW(TO_CPU_FW_CPU_ONLY) | R01_BPDU_FR |</div><div class='add'>+			   R01_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |</div><div class='add'>+			   TO_CPU_FW_CPU_ONLY);</div><div class='add'>+</div><div class='add'>+	/* Trap frames with :03 and :0E MAC DAs to the CPU port(s) and egress</div><div class='add'>+	 * them VLAN-untagged.</div><div class='add'>+	 */</div><div class='add'>+	mt7530_rmw(priv, MT753X_RGAC2,</div><div class='add'>+		   R0E_BPDU_FR | R0E_EG_TAG_MASK | R0E_PORT_FW_MASK |</div><div class='add'>+			   R03_BPDU_FR | R03_EG_TAG_MASK | R03_PORT_FW_MASK,</div><div class='add'>+		   R0E_BPDU_FR | R0E_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |</div><div class='add'>+			   R0E_PORT_FW(TO_CPU_FW_CPU_ONLY) | R03_BPDU_FR |</div><div class='add'>+			   R03_EG_TAG(MT7530_VLAN_EG_UNTAGGED) |</div><div class='add'>+			   TO_CPU_FW_CPU_ONLY);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mt753x_cpu_port_enable(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	/* Enable Mediatek header mode on the cpu port */</div><div class='add'>+	mt7530_write(priv, MT7530_PVC_P(port),</div><div class='add'>+		     PORT_SPEC_TAG);</div><div class='add'>+</div><div class='add'>+	/* Enable flooding on the CPU port */</div><div class='add'>+	mt7530_set(priv, MT753X_MFC, BC_FFP(BIT(port)) | UNM_FFP(BIT(port)) |</div><div class='add'>+		   UNU_FFP(BIT(port)));</div><div class='add'>+</div><div class='add'>+	/* Add the CPU port to the CPU port bitmap for MT7531 and the switch on</div><div class='add'>+	 * the MT7988 SoC. Trapped frames will be forwarded to the CPU port that</div><div class='add'>+	 * is affine to the inbound user port.</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;id == ID_MT7531 || priv-&gt;id == ID_MT7988 ||</div><div class='add'>+	    priv-&gt;id == ID_EN7581 || priv-&gt;id == ID_AN7583)</div><div class='add'>+		mt7530_set(priv, MT7531_CFC, MT7531_CPU_PMAP(BIT(port)));</div><div class='add'>+</div><div class='add'>+	/* CPU port gets connected to all user ports of</div><div class='add'>+	 * the switch.</div><div class='add'>+	 */</div><div class='add'>+	mt7530_write(priv, MT7530_PCR_P(port),</div><div class='add'>+		     PCR_MATRIX(dsa_user_ports(priv-&gt;ds)));</div><div class='add'>+</div><div class='add'>+	/* Set to fallback mode for independent VLAN learning */</div><div class='add'>+	mt7530_rmw(priv, MT7530_PCR_P(port), PCR_PORT_VLAN_MASK,</div><div class='add'>+		   MT7530_PORT_FALLBACK_MODE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7530_port_enable(struct dsa_switch *ds, int port,</div><div class='add'>+		   struct phy_device *phy)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(ds, port);</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+</div><div class='add'>+	/* Allow the user port gets connected to the cpu port and also</div><div class='add'>+	 * restore the port matrix if the port is the member of a certain</div><div class='add'>+	 * bridge.</div><div class='add'>+	 */</div><div class='add'>+	if (dsa_port_is_user(dp)) {</div><div class='add'>+		struct dsa_port *cpu_dp = dp-&gt;cpu_dp;</div><div class='add'>+</div><div class='add'>+		priv-&gt;ports[port].pm |= PCR_MATRIX(BIT(cpu_dp-&gt;index));</div><div class='add'>+	}</div><div class='add'>+	priv-&gt;ports[port].enable = true;</div><div class='add'>+	mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK,</div><div class='add'>+		   priv-&gt;ports[port].pm);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;id != ID_MT7530 &amp;&amp; priv-&gt;id != ID_MT7621)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (port == 5)</div><div class='add'>+		mt7530_clear(priv, MT753X_MTRAP, MT7530_P5_DIS);</div><div class='add'>+	else if (port == 6)</div><div class='add'>+		mt7530_clear(priv, MT753X_MTRAP, MT7530_P6_DIS);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mt7530_port_disable(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+</div><div class='add'>+	/* Clear up all port matrix which could be restored in the next</div><div class='add'>+	 * enablement for the port.</div><div class='add'>+	 */</div><div class='add'>+	priv-&gt;ports[port].enable = false;</div><div class='add'>+	mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK,</div><div class='add'>+		   PCR_MATRIX_CLR);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;id != ID_MT7530 &amp;&amp; priv-&gt;id != ID_MT7621)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Do not set MT7530_P5_DIS when port 5 is being used for PHY muxing. */</div><div class='add'>+	if (port == 5 &amp;&amp; priv-&gt;p5_mode == GMAC5)</div><div class='add'>+		mt7530_set(priv, MT753X_MTRAP, MT7530_P5_DIS);</div><div class='add'>+	else if (port == 6)</div><div class='add'>+		mt7530_set(priv, MT753X_MTRAP, MT7530_P6_DIS);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7530_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+	int length;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	/* When a new MTU is set, DSA always set the CPU port's MTU to the</div><div class='add'>+	 * largest MTU of the user ports. Because the switch only has a global</div><div class='add'>+	 * RX length register, only allowing CPU port here is enough.</div><div class='add'>+	 */</div><div class='add'>+	if (!dsa_is_cpu_port(ds, port))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	mt7530_mutex_lock(priv);</div><div class='add'>+</div><div class='add'>+	val = mt7530_mii_read(priv, MT7530_GMACCR);</div><div class='add'>+	val &amp;= ~MAX_RX_PKT_LEN_MASK;</div><div class='add'>+</div><div class='add'>+	/* RX length also includes Ethernet header, MTK tag, and FCS length */</div><div class='add'>+	length = new_mtu + ETH_HLEN + MTK_HDR_LEN + ETH_FCS_LEN;</div><div class='add'>+	if (length &lt;= 1522) {</div><div class='add'>+		val |= MAX_RX_PKT_LEN_1522;</div><div class='add'>+	} else if (length &lt;= 1536) {</div><div class='add'>+		val |= MAX_RX_PKT_LEN_1536;</div><div class='add'>+	} else if (length &lt;= 1552) {</div><div class='add'>+		val |= MAX_RX_PKT_LEN_1552;</div><div class='add'>+	} else {</div><div class='add'>+		val &amp;= ~MAX_RX_JUMBO_MASK;</div><div class='add'>+		val |= MAX_RX_JUMBO(DIV_ROUND_UP(length, 1024));</div><div class='add'>+		val |= MAX_RX_PKT_LEN_JUMBO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mt7530_mii_write(priv, MT7530_GMACCR, val);</div><div class='add'>+</div><div class='add'>+	mt7530_mutex_unlock(priv);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7530_port_max_mtu(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	return MT7530_MAX_MTU;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mt7530_stp_state_set(struct dsa_switch *ds, int port, u8 state)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+	u32 stp_state;</div><div class='add'>+</div><div class='add'>+	switch (state) {</div><div class='add'>+	case BR_STATE_DISABLED:</div><div class='add'>+		stp_state = MT7530_STP_DISABLED;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_BLOCKING:</div><div class='add'>+		stp_state = MT7530_STP_BLOCKING;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_LISTENING:</div><div class='add'>+		stp_state = MT7530_STP_LISTENING;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_LEARNING:</div><div class='add'>+		stp_state = MT7530_STP_LEARNING;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_FORWARDING:</div><div class='add'>+	default:</div><div class='add'>+		stp_state = MT7530_STP_FORWARDING;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mt7530_rmw(priv, MT7530_SSP_P(port), FID_PST_MASK(FID_BRIDGED),</div><div class='add'>+		   FID_PST(FID_BRIDGED, stp_state));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mt7530_update_port_member(struct mt7530_priv *priv, int port,</div><div class='add'>+				      const struct net_device *bridge_dev,</div><div class='add'>+				      bool join) __must_hold(&amp;priv-&gt;reg_mutex)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(priv-&gt;ds, port), *other_dp;</div><div class='add'>+	struct mt7530_port *p = &amp;priv-&gt;ports[port], *other_p;</div><div class='add'>+	struct dsa_port *cpu_dp = dp-&gt;cpu_dp;</div><div class='add'>+	u32 port_bitmap = BIT(cpu_dp-&gt;index);</div><div class='add'>+	int other_port;</div><div class='add'>+	bool isolated;</div><div class='add'>+</div><div class='add'>+	dsa_switch_for_each_user_port(other_dp, priv-&gt;ds) {</div><div class='add'>+		other_port = other_dp-&gt;index;</div><div class='add'>+		other_p = &amp;priv-&gt;ports[other_port];</div><div class='add'>+</div><div class='add'>+		if (dp == other_dp)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* Add/remove this port to/from the port matrix of the other</div><div class='add'>+		 * ports in the same bridge. If the port is disabled, port</div><div class='add'>+		 * matrix is kept and not being setup until the port becomes</div><div class='add'>+		 * enabled.</div><div class='add'>+		 */</div><div class='add'>+		if (!dsa_port_offloads_bridge_dev(other_dp, bridge_dev))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		isolated = p-&gt;isolated &amp;&amp; other_p-&gt;isolated;</div><div class='add'>+</div><div class='add'>+		if (join &amp;&amp; !isolated) {</div><div class='add'>+			other_p-&gt;pm |= PCR_MATRIX(BIT(port));</div><div class='add'>+			port_bitmap |= BIT(other_port);</div><div class='add'>+		} else {</div><div class='add'>+			other_p-&gt;pm &amp;= ~PCR_MATRIX(BIT(port));</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (other_p-&gt;enable)</div><div class='add'>+			mt7530_rmw(priv, MT7530_PCR_P(other_port),</div><div class='add'>+				   PCR_MATRIX_MASK, other_p-&gt;pm);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Add/remove the all other ports to this port matrix. For !join</div><div class='add'>+	 * (leaving the bridge), only the CPU port will remain in the port matrix</div><div class='add'>+	 * of this port.</div><div class='add'>+	 */</div><div class='add'>+	p-&gt;pm = PCR_MATRIX(port_bitmap);</div><div class='add'>+	if (priv-&gt;ports[port].enable)</div><div class='add'>+		mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK, p-&gt;pm);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7530_port_pre_bridge_flags(struct dsa_switch *ds, int port,</div><div class='add'>+			     struct switchdev_brport_flags flags,</div><div class='add'>+			     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	if (flags.mask &amp; ~(BR_LEARNING | BR_FLOOD | BR_MCAST_FLOOD |</div><div class='add'>+			   BR_BCAST_FLOOD | BR_ISOLATED))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7530_port_bridge_flags(struct dsa_switch *ds, int port,</div><div class='add'>+			 struct switchdev_brport_flags flags,</div><div class='add'>+			 struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (flags.mask &amp; BR_LEARNING)</div><div class='add'>+		mt7530_rmw(priv, MT7530_PSC_P(port), SA_DIS,</div><div class='add'>+			   flags.val &amp; BR_LEARNING ? 0 : SA_DIS);</div><div class='add'>+</div><div class='add'>+	if (flags.mask &amp; BR_FLOOD)</div><div class='add'>+		mt7530_rmw(priv, MT753X_MFC, UNU_FFP(BIT(port)),</div><div class='add'>+			   flags.val &amp; BR_FLOOD ? UNU_FFP(BIT(port)) : 0);</div><div class='add'>+</div><div class='add'>+	if (flags.mask &amp; BR_MCAST_FLOOD)</div><div class='add'>+		mt7530_rmw(priv, MT753X_MFC, UNM_FFP(BIT(port)),</div><div class='add'>+			   flags.val &amp; BR_MCAST_FLOOD ? UNM_FFP(BIT(port)) : 0);</div><div class='add'>+</div><div class='add'>+	if (flags.mask &amp; BR_BCAST_FLOOD)</div><div class='add'>+		mt7530_rmw(priv, MT753X_MFC, BC_FFP(BIT(port)),</div><div class='add'>+			   flags.val &amp; BR_BCAST_FLOOD ? BC_FFP(BIT(port)) : 0);</div><div class='add'>+</div><div class='add'>+	if (flags.mask &amp; BR_ISOLATED) {</div><div class='add'>+		struct dsa_port *dp = dsa_to_port(ds, port);</div><div class='add'>+		struct net_device *bridge_dev = dsa_port_bridge_dev_get(dp);</div><div class='add'>+</div><div class='add'>+		priv-&gt;ports[port].isolated = !!(flags.val &amp; BR_ISOLATED);</div><div class='add'>+</div><div class='add'>+		mutex_lock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+		mt7530_update_port_member(priv, port, bridge_dev, true);</div><div class='add'>+		mutex_unlock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7530_port_bridge_join(struct dsa_switch *ds, int port,</div><div class='add'>+			struct dsa_bridge bridge, bool *tx_fwd_offload,</div><div class='add'>+			struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+</div><div class='add'>+	mt7530_update_port_member(priv, port, bridge.dev, true);</div><div class='add'>+</div><div class='add'>+	/* Set to fallback mode for independent VLAN learning */</div><div class='add'>+	mt7530_rmw(priv, MT7530_PCR_P(port), PCR_PORT_VLAN_MASK,</div><div class='add'>+		   MT7530_PORT_FALLBACK_MODE);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mt7530_port_set_vlan_unaware(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+	bool all_user_ports_removed = true;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* This is called after .port_bridge_leave when leaving a VLAN-aware</div><div class='add'>+	 * bridge. Don't set standalone ports to fallback mode.</div><div class='add'>+	 */</div><div class='add'>+	if (dsa_port_bridge_dev_get(dsa_to_port(ds, port)))</div><div class='add'>+		mt7530_rmw(priv, MT7530_PCR_P(port), PCR_PORT_VLAN_MASK,</div><div class='add'>+			   MT7530_PORT_FALLBACK_MODE);</div><div class='add'>+</div><div class='add'>+	mt7530_rmw(priv, MT7530_PVC_P(port),</div><div class='add'>+		   VLAN_ATTR_MASK | PVC_EG_TAG_MASK | ACC_FRM_MASK,</div><div class='add'>+		   VLAN_ATTR(MT7530_VLAN_TRANSPARENT) |</div><div class='add'>+		   PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT) |</div><div class='add'>+		   MT7530_VLAN_ACC_ALL);</div><div class='add'>+</div><div class='add'>+	/* Set PVID to 0 */</div><div class='add'>+	mt7530_rmw(priv, MT7530_PPBV1_P(port), G0_PORT_VID_MASK,</div><div class='add'>+		   G0_PORT_VID_DEF);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;ds-&gt;num_ports; i++) {</div><div class='add'>+		if (dsa_is_user_port(ds, i) &amp;&amp;</div><div class='add'>+		    dsa_port_is_vlan_filtering(dsa_to_port(ds, i))) {</div><div class='add'>+			all_user_ports_removed = false;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* CPU port also does the same thing until all user ports belonging to</div><div class='add'>+	 * the CPU port get out of VLAN filtering mode.</div><div class='add'>+	 */</div><div class='add'>+	if (all_user_ports_removed) {</div><div class='add'>+		struct dsa_port *dp = dsa_to_port(ds, port);</div><div class='add'>+		struct dsa_port *cpu_dp = dp-&gt;cpu_dp;</div><div class='add'>+</div><div class='add'>+		mt7530_write(priv, MT7530_PCR_P(cpu_dp-&gt;index),</div><div class='add'>+			     PCR_MATRIX(dsa_user_ports(priv-&gt;ds)));</div><div class='add'>+		mt7530_write(priv, MT7530_PVC_P(cpu_dp-&gt;index), PORT_SPEC_TAG</div><div class='add'>+			     | PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT));</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mt7530_port_set_vlan_aware(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	/* Trapped into security mode allows packet forwarding through VLAN</div><div class='add'>+	 * table lookup.</div><div class='add'>+	 */</div><div class='add'>+	if (dsa_is_user_port(ds, port)) {</div><div class='add'>+		mt7530_rmw(priv, MT7530_PCR_P(port), PCR_PORT_VLAN_MASK,</div><div class='add'>+			   MT7530_PORT_SECURITY_MODE);</div><div class='add'>+		mt7530_rmw(priv, MT7530_PPBV1_P(port), G0_PORT_VID_MASK,</div><div class='add'>+			   G0_PORT_VID(priv-&gt;ports[port].pvid));</div><div class='add'>+</div><div class='add'>+		/* Only accept tagged frames if PVID is not set */</div><div class='add'>+		if (!priv-&gt;ports[port].pvid)</div><div class='add'>+			mt7530_rmw(priv, MT7530_PVC_P(port), ACC_FRM_MASK,</div><div class='add'>+				   MT7530_VLAN_ACC_TAGGED);</div><div class='add'>+</div><div class='add'>+		/* Set the port as a user port which is to be able to recognize</div><div class='add'>+		 * VID from incoming packets before fetching entry within the</div><div class='add'>+		 * VLAN table.</div><div class='add'>+		 */</div><div class='add'>+		mt7530_rmw(priv, MT7530_PVC_P(port),</div><div class='add'>+			   VLAN_ATTR_MASK | PVC_EG_TAG_MASK,</div><div class='add'>+			   VLAN_ATTR(MT7530_VLAN_USER) |</div><div class='add'>+			   PVC_EG_TAG(MT7530_VLAN_EG_DISABLED));</div><div class='add'>+	} else {</div><div class='add'>+		/* Also set CPU ports to the "user" VLAN port attribute, to</div><div class='add'>+		 * allow VLAN classification, but keep the EG_TAG attribute as</div><div class='add'>+		 * "consistent" (i.o.w. don't change its value) for packets</div><div class='add'>+		 * received by the switch from the CPU, so that tagged packets</div><div class='add'>+		 * are forwarded to user ports as tagged, and untagged as</div><div class='add'>+		 * untagged.</div><div class='add'>+		 */</div><div class='add'>+		mt7530_rmw(priv, MT7530_PVC_P(port), VLAN_ATTR_MASK,</div><div class='add'>+			   VLAN_ATTR(MT7530_VLAN_USER));</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mt7530_port_bridge_leave(struct dsa_switch *ds, int port,</div><div class='add'>+			 struct dsa_bridge bridge)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+</div><div class='add'>+	mt7530_update_port_member(priv, port, bridge.dev, false);</div><div class='add'>+</div><div class='add'>+	/* When a port is removed from the bridge, the port would be set up</div><div class='add'>+	 * back to the default as is at initial boot which is a VLAN-unaware</div><div class='add'>+	 * port.</div><div class='add'>+	 */</div><div class='add'>+	mt7530_rmw(priv, MT7530_PCR_P(port), PCR_PORT_VLAN_MASK,</div><div class='add'>+		   MT7530_PORT_MATRIX_MODE);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7530_port_fdb_add(struct dsa_switch *ds, int port,</div><div class='add'>+		    const unsigned char *addr, u16 vid,</div><div class='add'>+		    struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+	u8 port_mask = BIT(port);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+	mt7530_fdb_write(priv, vid, port_mask, addr, -1, STATIC_ENT);</div><div class='add'>+	ret = mt7530_fdb_cmd(priv, MT7530_FDB_WRITE, NULL);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7530_port_fdb_del(struct dsa_switch *ds, int port,</div><div class='add'>+		    const unsigned char *addr, u16 vid,</div><div class='add'>+		    struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+	u8 port_mask = BIT(port);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+	mt7530_fdb_write(priv, vid, port_mask, addr, -1, STATIC_EMP);</div><div class='add'>+	ret = mt7530_fdb_cmd(priv, MT7530_FDB_WRITE, NULL);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7530_port_fdb_dump(struct dsa_switch *ds, int port,</div><div class='add'>+		     dsa_fdb_dump_cb_t *cb, void *data)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+	struct mt7530_fdb _fdb = { 0 };</div><div class='add'>+	int cnt = MT7530_NUM_FDB_RECORDS;</div><div class='add'>+	int ret = 0;</div><div class='add'>+	u32 rsp = 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+</div><div class='add'>+	ret = mt7530_fdb_cmd(priv, MT7530_FDB_START, &amp;rsp);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		if (rsp &amp; ATC_SRCH_HIT) {</div><div class='add'>+			mt7530_fdb_read(priv, &amp;_fdb);</div><div class='add'>+			if (_fdb.port_mask &amp; BIT(port)) {</div><div class='add'>+				ret = cb(_fdb.mac, _fdb.vid, _fdb.noarp,</div><div class='add'>+					 data);</div><div class='add'>+				if (ret &lt; 0)</div><div class='add'>+					break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	} while (--cnt &amp;&amp;</div><div class='add'>+		 !(rsp &amp; ATC_SRCH_END) &amp;&amp;</div><div class='add'>+		 !mt7530_fdb_cmd(priv, MT7530_FDB_NEXT, &amp;rsp));</div><div class='add'>+err:</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7530_port_mdb_add(struct dsa_switch *ds, int port,</div><div class='add'>+		    const struct switchdev_obj_port_mdb *mdb,</div><div class='add'>+		    struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+	const u8 *addr = mdb-&gt;addr;</div><div class='add'>+	u16 vid = mdb-&gt;vid;</div><div class='add'>+	u8 port_mask = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+</div><div class='add'>+	mt7530_fdb_write(priv, vid, 0, addr, 0, STATIC_EMP);</div><div class='add'>+	if (!mt7530_fdb_cmd(priv, MT7530_FDB_READ, NULL))</div><div class='add'>+		port_mask = (mt7530_read(priv, MT7530_ATRD) &gt;&gt; PORT_MAP)</div><div class='add'>+			    &amp; PORT_MAP_MASK;</div><div class='add'>+</div><div class='add'>+	port_mask |= BIT(port);</div><div class='add'>+	mt7530_fdb_write(priv, vid, port_mask, addr, -1, STATIC_ENT);</div><div class='add'>+	ret = mt7530_fdb_cmd(priv, MT7530_FDB_WRITE, NULL);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7530_port_mdb_del(struct dsa_switch *ds, int port,</div><div class='add'>+		    const struct switchdev_obj_port_mdb *mdb,</div><div class='add'>+		    struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+	const u8 *addr = mdb-&gt;addr;</div><div class='add'>+	u16 vid = mdb-&gt;vid;</div><div class='add'>+	u8 port_mask = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+</div><div class='add'>+	mt7530_fdb_write(priv, vid, 0, addr, 0, STATIC_EMP);</div><div class='add'>+	if (!mt7530_fdb_cmd(priv, MT7530_FDB_READ, NULL))</div><div class='add'>+		port_mask = (mt7530_read(priv, MT7530_ATRD) &gt;&gt; PORT_MAP)</div><div class='add'>+			    &amp; PORT_MAP_MASK;</div><div class='add'>+</div><div class='add'>+	port_mask &amp;= ~BIT(port);</div><div class='add'>+	mt7530_fdb_write(priv, vid, port_mask, addr, -1,</div><div class='add'>+			 port_mask ? STATIC_ENT : STATIC_EMP);</div><div class='add'>+	ret = mt7530_fdb_cmd(priv, MT7530_FDB_WRITE, NULL);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7530_vlan_cmd(struct mt7530_priv *priv, enum mt7530_vlan_cmd cmd, u16 vid)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_dummy_poll p;</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	val = VTCR_BUSY | VTCR_FUNC(cmd) | vid;</div><div class='add'>+	mt7530_write(priv, MT7530_VTCR, val);</div><div class='add'>+</div><div class='add'>+	INIT_MT7530_DUMMY_POLL(&amp;p, priv, MT7530_VTCR);</div><div class='add'>+	ret = readx_poll_timeout(_mt7530_read, &amp;p, val,</div><div class='add'>+				 !(val &amp; VTCR_BUSY), 20, 20000);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(priv-&gt;dev, "poll timeout\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	val = mt7530_read(priv, MT7530_VTCR);</div><div class='add'>+	if (val &amp; VTCR_INVALID) {</div><div class='add'>+		dev_err(priv-&gt;dev, "read VTCR invalid\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7530_port_vlan_filtering(struct dsa_switch *ds, int port, bool vlan_filtering,</div><div class='add'>+			   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(ds, port);</div><div class='add'>+	struct dsa_port *cpu_dp = dp-&gt;cpu_dp;</div><div class='add'>+</div><div class='add'>+	if (vlan_filtering) {</div><div class='add'>+		/* The port is being kept as VLAN-unaware port when bridge is</div><div class='add'>+		 * set up with vlan_filtering not being set, Otherwise, the</div><div class='add'>+		 * port and the corresponding CPU port is required the setup</div><div class='add'>+		 * for becoming a VLAN-aware port.</div><div class='add'>+		 */</div><div class='add'>+		mt7530_port_set_vlan_aware(ds, port);</div><div class='add'>+		mt7530_port_set_vlan_aware(ds, cpu_dp-&gt;index);</div><div class='add'>+	} else {</div><div class='add'>+		mt7530_port_set_vlan_unaware(ds, port);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mt7530_hw_vlan_add(struct mt7530_priv *priv,</div><div class='add'>+		   struct mt7530_hw_vlan_entry *entry)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(priv-&gt;ds, entry-&gt;port);</div><div class='add'>+	u8 new_members;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	new_members = entry-&gt;old_members | BIT(entry-&gt;port);</div><div class='add'>+</div><div class='add'>+	/* Validate the entry with independent learning, create egress tag per</div><div class='add'>+	 * VLAN and joining the port as one of the port members.</div><div class='add'>+	 */</div><div class='add'>+	val = IVL_MAC | VTAG_EN | PORT_MEM(new_members) | FID(FID_BRIDGED) |</div><div class='add'>+	      VLAN_VALID;</div><div class='add'>+	mt7530_write(priv, MT7530_VAWD1, val);</div><div class='add'>+</div><div class='add'>+	/* Decide whether adding tag or not for those outgoing packets from the</div><div class='add'>+	 * port inside the VLAN.</div><div class='add'>+	 * CPU port is always taken as a tagged port for serving more than one</div><div class='add'>+	 * VLANs across and also being applied with egress type stack mode for</div><div class='add'>+	 * that VLAN tags would be appended after hardware special tag used as</div><div class='add'>+	 * DSA tag.</div><div class='add'>+	 */</div><div class='add'>+	if (dsa_port_is_cpu(dp))</div><div class='add'>+		val = MT7530_VLAN_EGRESS_STACK;</div><div class='add'>+	else if (entry-&gt;untagged)</div><div class='add'>+		val = MT7530_VLAN_EGRESS_UNTAG;</div><div class='add'>+	else</div><div class='add'>+		val = MT7530_VLAN_EGRESS_TAG;</div><div class='add'>+	mt7530_rmw(priv, MT7530_VAWD2,</div><div class='add'>+		   ETAG_CTRL_P_MASK(entry-&gt;port),</div><div class='add'>+		   ETAG_CTRL_P(entry-&gt;port, val));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mt7530_hw_vlan_del(struct mt7530_priv *priv,</div><div class='add'>+		   struct mt7530_hw_vlan_entry *entry)</div><div class='add'>+{</div><div class='add'>+	u8 new_members;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	new_members = entry-&gt;old_members &amp; ~BIT(entry-&gt;port);</div><div class='add'>+</div><div class='add'>+	val = mt7530_read(priv, MT7530_VAWD1);</div><div class='add'>+	if (!(val &amp; VLAN_VALID)) {</div><div class='add'>+		dev_err(priv-&gt;dev,</div><div class='add'>+			"Cannot be deleted due to invalid entry\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (new_members) {</div><div class='add'>+		val = IVL_MAC | VTAG_EN | PORT_MEM(new_members) |</div><div class='add'>+		      VLAN_VALID;</div><div class='add'>+		mt7530_write(priv, MT7530_VAWD1, val);</div><div class='add'>+	} else {</div><div class='add'>+		mt7530_write(priv, MT7530_VAWD1, 0);</div><div class='add'>+		mt7530_write(priv, MT7530_VAWD2, 0);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mt7530_hw_vlan_update(struct mt7530_priv *priv, u16 vid,</div><div class='add'>+		      struct mt7530_hw_vlan_entry *entry,</div><div class='add'>+		      mt7530_vlan_op vlan_op)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	/* Fetch entry */</div><div class='add'>+	mt7530_vlan_cmd(priv, MT7530_VTCR_RD_VID, vid);</div><div class='add'>+</div><div class='add'>+	val = mt7530_read(priv, MT7530_VAWD1);</div><div class='add'>+</div><div class='add'>+	entry-&gt;old_members = (val &gt;&gt; PORT_MEM_SHFT) &amp; PORT_MEM_MASK;</div><div class='add'>+</div><div class='add'>+	/* Manipulate entry */</div><div class='add'>+	vlan_op(priv, entry);</div><div class='add'>+</div><div class='add'>+	/* Flush result to hardware */</div><div class='add'>+	mt7530_vlan_cmd(priv, MT7530_VTCR_WR_VID, vid);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7530_setup_vlan0(struct mt7530_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	/* Validate the entry with independent learning, keep the original</div><div class='add'>+	 * ingress tag attribute.</div><div class='add'>+	 */</div><div class='add'>+	val = IVL_MAC | EG_CON | PORT_MEM(MT7530_ALL_MEMBERS) | FID(FID_BRIDGED) |</div><div class='add'>+	      VLAN_VALID;</div><div class='add'>+	mt7530_write(priv, MT7530_VAWD1, val);</div><div class='add'>+</div><div class='add'>+	return mt7530_vlan_cmd(priv, MT7530_VTCR_WR_VID, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7530_port_vlan_add(struct dsa_switch *ds, int port,</div><div class='add'>+		     const struct switchdev_obj_port_vlan *vlan,</div><div class='add'>+		     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	bool untagged = vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_UNTAGGED;</div><div class='add'>+	bool pvid = vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_PVID;</div><div class='add'>+	struct mt7530_hw_vlan_entry new_entry;</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+</div><div class='add'>+	mt7530_hw_vlan_entry_init(&amp;new_entry, port, untagged);</div><div class='add'>+	mt7530_hw_vlan_update(priv, vlan-&gt;vid, &amp;new_entry, mt7530_hw_vlan_add);</div><div class='add'>+</div><div class='add'>+	if (pvid) {</div><div class='add'>+		priv-&gt;ports[port].pvid = vlan-&gt;vid;</div><div class='add'>+</div><div class='add'>+		/* Accept all frames if PVID is set */</div><div class='add'>+		mt7530_rmw(priv, MT7530_PVC_P(port), ACC_FRM_MASK,</div><div class='add'>+			   MT7530_VLAN_ACC_ALL);</div><div class='add'>+</div><div class='add'>+		/* Only configure PVID if VLAN filtering is enabled */</div><div class='add'>+		if (dsa_port_is_vlan_filtering(dsa_to_port(ds, port)))</div><div class='add'>+			mt7530_rmw(priv, MT7530_PPBV1_P(port),</div><div class='add'>+				   G0_PORT_VID_MASK,</div><div class='add'>+				   G0_PORT_VID(vlan-&gt;vid));</div><div class='add'>+	} else if (vlan-&gt;vid &amp;&amp; priv-&gt;ports[port].pvid == vlan-&gt;vid) {</div><div class='add'>+		/* This VLAN is overwritten without PVID, so unset it */</div><div class='add'>+		priv-&gt;ports[port].pvid = G0_PORT_VID_DEF;</div><div class='add'>+</div><div class='add'>+		/* Only accept tagged frames if the port is VLAN-aware */</div><div class='add'>+		if (dsa_port_is_vlan_filtering(dsa_to_port(ds, port)))</div><div class='add'>+			mt7530_rmw(priv, MT7530_PVC_P(port), ACC_FRM_MASK,</div><div class='add'>+				   MT7530_VLAN_ACC_TAGGED);</div><div class='add'>+</div><div class='add'>+		mt7530_rmw(priv, MT7530_PPBV1_P(port), G0_PORT_VID_MASK,</div><div class='add'>+			   G0_PORT_VID_DEF);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7530_port_vlan_del(struct dsa_switch *ds, int port,</div><div class='add'>+		     const struct switchdev_obj_port_vlan *vlan)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_hw_vlan_entry target_entry;</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+</div><div class='add'>+	mt7530_hw_vlan_entry_init(&amp;target_entry, port, 0);</div><div class='add'>+	mt7530_hw_vlan_update(priv, vlan-&gt;vid, &amp;target_entry,</div><div class='add'>+			      mt7530_hw_vlan_del);</div><div class='add'>+</div><div class='add'>+	/* PVID is being restored to the default whenever the PVID port</div><div class='add'>+	 * is being removed from the VLAN.</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;ports[port].pvid == vlan-&gt;vid) {</div><div class='add'>+		priv-&gt;ports[port].pvid = G0_PORT_VID_DEF;</div><div class='add'>+</div><div class='add'>+		/* Only accept tagged frames if the port is VLAN-aware */</div><div class='add'>+		if (dsa_port_is_vlan_filtering(dsa_to_port(ds, port)))</div><div class='add'>+			mt7530_rmw(priv, MT7530_PVC_P(port), ACC_FRM_MASK,</div><div class='add'>+				   MT7530_VLAN_ACC_TAGGED);</div><div class='add'>+</div><div class='add'>+		mt7530_rmw(priv, MT7530_PPBV1_P(port), G0_PORT_VID_MASK,</div><div class='add'>+			   G0_PORT_VID_DEF);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mt753x_port_mirror_add(struct dsa_switch *ds, int port,</div><div class='add'>+				  struct dsa_mall_mirror_tc_entry *mirror,</div><div class='add'>+				  bool ingress, struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+	int monitor_port;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	/* Check for existent entry */</div><div class='add'>+	if ((ingress ? priv-&gt;mirror_rx : priv-&gt;mirror_tx) &amp; BIT(port))</div><div class='add'>+		return -EEXIST;</div><div class='add'>+</div><div class='add'>+	val = mt7530_read(priv, MT753X_MIRROR_REG(priv-&gt;id));</div><div class='add'>+</div><div class='add'>+	/* MT7530 only supports one monitor port */</div><div class='add'>+	monitor_port = MT753X_MIRROR_PORT_GET(priv-&gt;id, val);</div><div class='add'>+	if (val &amp; MT753X_MIRROR_EN(priv-&gt;id) &amp;&amp;</div><div class='add'>+	    monitor_port != mirror-&gt;to_local_port)</div><div class='add'>+		return -EEXIST;</div><div class='add'>+</div><div class='add'>+	val |= MT753X_MIRROR_EN(priv-&gt;id);</div><div class='add'>+	val &amp;= ~MT753X_MIRROR_PORT_MASK(priv-&gt;id);</div><div class='add'>+	val |= MT753X_MIRROR_PORT_SET(priv-&gt;id, mirror-&gt;to_local_port);</div><div class='add'>+	mt7530_write(priv, MT753X_MIRROR_REG(priv-&gt;id), val);</div><div class='add'>+</div><div class='add'>+	val = mt7530_read(priv, MT7530_PCR_P(port));</div><div class='add'>+	if (ingress) {</div><div class='add'>+		val |= PORT_RX_MIR;</div><div class='add'>+		priv-&gt;mirror_rx |= BIT(port);</div><div class='add'>+	} else {</div><div class='add'>+		val |= PORT_TX_MIR;</div><div class='add'>+		priv-&gt;mirror_tx |= BIT(port);</div><div class='add'>+	}</div><div class='add'>+	mt7530_write(priv, MT7530_PCR_P(port), val);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mt753x_port_mirror_del(struct dsa_switch *ds, int port,</div><div class='add'>+				   struct dsa_mall_mirror_tc_entry *mirror)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = mt7530_read(priv, MT7530_PCR_P(port));</div><div class='add'>+	if (mirror-&gt;ingress) {</div><div class='add'>+		val &amp;= ~PORT_RX_MIR;</div><div class='add'>+		priv-&gt;mirror_rx &amp;= ~BIT(port);</div><div class='add'>+	} else {</div><div class='add'>+		val &amp;= ~PORT_TX_MIR;</div><div class='add'>+		priv-&gt;mirror_tx &amp;= ~BIT(port);</div><div class='add'>+	}</div><div class='add'>+	mt7530_write(priv, MT7530_PCR_P(port), val);</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;mirror_rx &amp;&amp; !priv-&gt;mirror_tx) {</div><div class='add'>+		val = mt7530_read(priv, MT753X_MIRROR_REG(priv-&gt;id));</div><div class='add'>+		val &amp;= ~MT753X_MIRROR_EN(priv-&gt;id);</div><div class='add'>+		mt7530_write(priv, MT753X_MIRROR_REG(priv-&gt;id), val);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum dsa_tag_protocol</div><div class='add'>+mtk_get_tag_protocol(struct dsa_switch *ds, int port,</div><div class='add'>+		     enum dsa_tag_protocol mp)</div><div class='add'>+{</div><div class='add'>+	return DSA_TAG_PROTO_MTK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_GPIOLIB</div><div class='add'>+static inline u32</div><div class='add'>+mt7530_gpio_to_bit(unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	/* Map GPIO offset to register bit</div><div class='add'>+	 * [ 2: 0]  port 0 LED 0..2 as GPIO 0..2</div><div class='add'>+	 * [ 6: 4]  port 1 LED 0..2 as GPIO 3..5</div><div class='add'>+	 * [10: 8]  port 2 LED 0..2 as GPIO 6..8</div><div class='add'>+	 * [14:12]  port 3 LED 0..2 as GPIO 9..11</div><div class='add'>+	 * [18:16]  port 4 LED 0..2 as GPIO 12..14</div><div class='add'>+	 */</div><div class='add'>+	return BIT(offset + offset / 3);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7530_gpio_get(struct gpio_chip *gc, unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = gpiochip_get_data(gc);</div><div class='add'>+	u32 bit = mt7530_gpio_to_bit(offset);</div><div class='add'>+</div><div class='add'>+	return !!(mt7530_read(priv, MT7530_LED_GPIO_DATA) &amp; bit);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7530_gpio_set(struct gpio_chip *gc, unsigned int offset, int value)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = gpiochip_get_data(gc);</div><div class='add'>+	u32 bit = mt7530_gpio_to_bit(offset);</div><div class='add'>+</div><div class='add'>+	if (value)</div><div class='add'>+		mt7530_set(priv, MT7530_LED_GPIO_DATA, bit);</div><div class='add'>+	else</div><div class='add'>+		mt7530_clear(priv, MT7530_LED_GPIO_DATA, bit);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7530_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = gpiochip_get_data(gc);</div><div class='add'>+	u32 bit = mt7530_gpio_to_bit(offset);</div><div class='add'>+</div><div class='add'>+	return (mt7530_read(priv, MT7530_LED_GPIO_DIR) &amp; bit) ?</div><div class='add'>+		GPIO_LINE_DIRECTION_OUT : GPIO_LINE_DIRECTION_IN;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7530_gpio_direction_input(struct gpio_chip *gc, unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = gpiochip_get_data(gc);</div><div class='add'>+	u32 bit = mt7530_gpio_to_bit(offset);</div><div class='add'>+</div><div class='add'>+	mt7530_clear(priv, MT7530_LED_GPIO_OE, bit);</div><div class='add'>+	mt7530_clear(priv, MT7530_LED_GPIO_DIR, bit);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7530_gpio_direction_output(struct gpio_chip *gc, unsigned int offset, int value)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = gpiochip_get_data(gc);</div><div class='add'>+	u32 bit = mt7530_gpio_to_bit(offset);</div><div class='add'>+</div><div class='add'>+	mt7530_set(priv, MT7530_LED_GPIO_DIR, bit);</div><div class='add'>+</div><div class='add'>+	if (value)</div><div class='add'>+		mt7530_set(priv, MT7530_LED_GPIO_DATA, bit);</div><div class='add'>+	else</div><div class='add'>+		mt7530_clear(priv, MT7530_LED_GPIO_DATA, bit);</div><div class='add'>+</div><div class='add'>+	mt7530_set(priv, MT7530_LED_GPIO_OE, bit);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7530_setup_gpio(struct mt7530_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = priv-&gt;dev;</div><div class='add'>+	struct gpio_chip *gc;</div><div class='add'>+</div><div class='add'>+	gc = devm_kzalloc(dev, sizeof(*gc), GFP_KERNEL);</div><div class='add'>+	if (!gc)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mt7530_write(priv, MT7530_LED_GPIO_OE, 0);</div><div class='add'>+	mt7530_write(priv, MT7530_LED_GPIO_DIR, 0);</div><div class='add'>+	mt7530_write(priv, MT7530_LED_IO_MODE, 0);</div><div class='add'>+</div><div class='add'>+	gc-&gt;label = "mt7530";</div><div class='add'>+	gc-&gt;parent = dev;</div><div class='add'>+	gc-&gt;owner = THIS_MODULE;</div><div class='add'>+	gc-&gt;get_direction = mt7530_gpio_get_direction;</div><div class='add'>+	gc-&gt;direction_input = mt7530_gpio_direction_input;</div><div class='add'>+	gc-&gt;direction_output = mt7530_gpio_direction_output;</div><div class='add'>+	gc-&gt;get = mt7530_gpio_get;</div><div class='add'>+	gc-&gt;set = mt7530_gpio_set;</div><div class='add'>+	gc-&gt;base = -1;</div><div class='add'>+	gc-&gt;ngpio = 15;</div><div class='add'>+	gc-&gt;can_sleep = true;</div><div class='add'>+</div><div class='add'>+	return devm_gpiochip_add_data(dev, gc, priv);</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_GPIOLIB */</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mt7530_setup_mdio_irq(struct mt7530_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds = priv-&gt;ds;</div><div class='add'>+	int p;</div><div class='add'>+</div><div class='add'>+	for (p = 0; p &lt; MT7530_NUM_PHYS; p++) {</div><div class='add'>+		if (BIT(p) &amp; ds-&gt;phys_mii_mask) {</div><div class='add'>+			unsigned int irq;</div><div class='add'>+</div><div class='add'>+			irq = irq_create_mapping(priv-&gt;irq_domain, p);</div><div class='add'>+			ds-&gt;user_mii_bus-&gt;irq[p] = irq;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct regmap_irq mt7530_irqs[] = {</div><div class='add'>+	REGMAP_IRQ_REG_LINE(0, 32),  /* PHY0_LC */</div><div class='add'>+	REGMAP_IRQ_REG_LINE(1, 32),  /* PHY1_LC */</div><div class='add'>+	REGMAP_IRQ_REG_LINE(2, 32),  /* PHY2_LC */</div><div class='add'>+	REGMAP_IRQ_REG_LINE(3, 32),  /* PHY3_LC */</div><div class='add'>+	REGMAP_IRQ_REG_LINE(4, 32),  /* PHY4_LC */</div><div class='add'>+	REGMAP_IRQ_REG_LINE(5, 32),  /* PHY5_LC */</div><div class='add'>+	REGMAP_IRQ_REG_LINE(6, 32),  /* PHY6_LC */</div><div class='add'>+	REGMAP_IRQ_REG_LINE(16, 32), /* MAC_PC */</div><div class='add'>+	REGMAP_IRQ_REG_LINE(17, 32), /* BMU */</div><div class='add'>+	REGMAP_IRQ_REG_LINE(18, 32), /* MIB */</div><div class='add'>+	REGMAP_IRQ_REG_LINE(22, 32), /* ARL_COL_FULL_COL */</div><div class='add'>+	REGMAP_IRQ_REG_LINE(23, 32), /* ARL_COL_FULL */</div><div class='add'>+	REGMAP_IRQ_REG_LINE(24, 32), /* ARL_TBL_ERR */</div><div class='add'>+	REGMAP_IRQ_REG_LINE(25, 32), /* ARL_PKT_QERR */</div><div class='add'>+	REGMAP_IRQ_REG_LINE(26, 32), /* ARL_EQ_ERR */</div><div class='add'>+	REGMAP_IRQ_REG_LINE(27, 32), /* ARL_PKT_BC */</div><div class='add'>+	REGMAP_IRQ_REG_LINE(28, 32), /* ARL_SEC_IG1X */</div><div class='add'>+	REGMAP_IRQ_REG_LINE(29, 32), /* ARL_SEC_VLAN */</div><div class='add'>+	REGMAP_IRQ_REG_LINE(30, 32), /* ARL_SEC_TAG */</div><div class='add'>+	REGMAP_IRQ_REG_LINE(31, 32), /* ACL */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_irq_chip mt7530_regmap_irq_chip = {</div><div class='add'>+	.name = KBUILD_MODNAME,</div><div class='add'>+	.status_base = MT7530_SYS_INT_STS,</div><div class='add'>+	.unmask_base = MT7530_SYS_INT_EN,</div><div class='add'>+	.ack_base = MT7530_SYS_INT_STS,</div><div class='add'>+	.init_ack_masked = true,</div><div class='add'>+	.irqs = mt7530_irqs,</div><div class='add'>+	.num_irqs = ARRAY_SIZE(mt7530_irqs),</div><div class='add'>+	.num_regs = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7530_setup_irq(struct mt7530_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct regmap_irq_chip_data *irq_data;</div><div class='add'>+	struct device *dev = priv-&gt;dev;</div><div class='add'>+	struct device_node *np = dev-&gt;of_node;</div><div class='add'>+	int irq, ret;</div><div class='add'>+</div><div class='add'>+	if (!of_property_read_bool(np, "interrupt-controller")) {</div><div class='add'>+		dev_info(dev, "no interrupt support\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	irq = of_irq_get(np, 0);</div><div class='add'>+	if (irq &lt;= 0) {</div><div class='add'>+		dev_err(dev, "failed to get parent IRQ: %d\n", irq);</div><div class='add'>+		return irq ? : -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* This register must be set for MT7530 to properly fire interrupts */</div><div class='add'>+	if (priv-&gt;id == ID_MT7530 || priv-&gt;id == ID_MT7621)</div><div class='add'>+		mt7530_set(priv, MT7530_TOP_SIG_CTRL, TOP_SIG_CTRL_NORMAL);</div><div class='add'>+</div><div class='add'>+	ret = devm_regmap_add_irq_chip_fwnode(dev, dev_fwnode(dev),</div><div class='add'>+					      priv-&gt;regmap, irq,</div><div class='add'>+					      IRQF_ONESHOT,</div><div class='add'>+					      0, &amp;mt7530_regmap_irq_chip,</div><div class='add'>+					      &amp;irq_data);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	priv-&gt;irq_domain = regmap_irq_get_domain(irq_data);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mt7530_free_mdio_irq(struct mt7530_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int p;</div><div class='add'>+</div><div class='add'>+	for (p = 0; p &lt; MT7530_NUM_PHYS; p++) {</div><div class='add'>+		if (BIT(p) &amp; priv-&gt;ds-&gt;phys_mii_mask) {</div><div class='add'>+			unsigned int irq;</div><div class='add'>+</div><div class='add'>+			irq = irq_find_mapping(priv-&gt;irq_domain, p);</div><div class='add'>+			irq_dispose_mapping(irq);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7530_setup_mdio(struct mt7530_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct device_node *mnp, *np = priv-&gt;dev-&gt;of_node;</div><div class='add'>+	struct dsa_switch *ds = priv-&gt;ds;</div><div class='add'>+	struct device *dev = priv-&gt;dev;</div><div class='add'>+	struct mii_bus *bus;</div><div class='add'>+	static int idx;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	mnp = of_get_child_by_name(np, "mdio");</div><div class='add'>+</div><div class='add'>+	if (mnp &amp;&amp; !of_device_is_available(mnp))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	bus = devm_mdiobus_alloc(dev);</div><div class='add'>+	if (!bus) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!mnp)</div><div class='add'>+		ds-&gt;user_mii_bus = bus;</div><div class='add'>+</div><div class='add'>+	bus-&gt;priv = priv;</div><div class='add'>+	bus-&gt;name = KBUILD_MODNAME "-mii";</div><div class='add'>+	snprintf(bus-&gt;id, MII_BUS_ID_SIZE, KBUILD_MODNAME "-%d", idx++);</div><div class='add'>+	bus-&gt;read = mt753x_phy_read_c22;</div><div class='add'>+	bus-&gt;write = mt753x_phy_write_c22;</div><div class='add'>+	bus-&gt;read_c45 = mt753x_phy_read_c45;</div><div class='add'>+	bus-&gt;write_c45 = mt753x_phy_write_c45;</div><div class='add'>+	bus-&gt;parent = dev;</div><div class='add'>+	bus-&gt;phy_mask = ~ds-&gt;phys_mii_mask;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;irq_domain &amp;&amp; !mnp)</div><div class='add'>+		mt7530_setup_mdio_irq(priv);</div><div class='add'>+</div><div class='add'>+	ret = devm_of_mdiobus_register(dev, bus, mnp);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "failed to register MDIO bus: %d\n", ret);</div><div class='add'>+		if (priv-&gt;irq_domain &amp;&amp; !mnp)</div><div class='add'>+			mt7530_free_mdio_irq(priv);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	of_node_put(mnp);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7530_setup(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+	struct device_node *dn = NULL;</div><div class='add'>+	struct device_node *phy_node;</div><div class='add'>+	struct device_node *mac_np;</div><div class='add'>+	struct mt7530_dummy_poll p;</div><div class='add'>+	phy_interface_t interface;</div><div class='add'>+	struct dsa_port *cpu_dp;</div><div class='add'>+	u32 id, val;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	/* The parent node of conduit netdev which holds the common system</div><div class='add'>+	 * controller also is the container for two GMACs nodes representing</div><div class='add'>+	 * as two netdev instances.</div><div class='add'>+	 */</div><div class='add'>+	dsa_switch_for_each_cpu_port(cpu_dp, ds) {</div><div class='add'>+		dn = cpu_dp-&gt;conduit-&gt;dev.of_node-&gt;parent;</div><div class='add'>+		/* It doesn't matter which CPU port is found first,</div><div class='add'>+		 * their conduits should share the same parent OF node</div><div class='add'>+		 */</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!dn) {</div><div class='add'>+		dev_err(ds-&gt;dev, "parent OF node of DSA conduit not found");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ds-&gt;assisted_learning_on_cpu_port = true;</div><div class='add'>+	ds-&gt;mtu_enforcement_ingress = true;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;id == ID_MT7530) {</div><div class='add'>+		regulator_set_voltage(priv-&gt;core_pwr, 1000000, 1000000);</div><div class='add'>+		ret = regulator_enable(priv-&gt;core_pwr);</div><div class='add'>+		if (ret &lt; 0) {</div><div class='add'>+			dev_err(priv-&gt;dev,</div><div class='add'>+				"Failed to enable core power: %d\n", ret);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		regulator_set_voltage(priv-&gt;io_pwr, 3300000, 3300000);</div><div class='add'>+		ret = regulator_enable(priv-&gt;io_pwr);</div><div class='add'>+		if (ret &lt; 0) {</div><div class='add'>+			dev_err(priv-&gt;dev, "Failed to enable io pwr: %d\n",</div><div class='add'>+				ret);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Reset whole chip through gpio pin or memory-mapped registers for</div><div class='add'>+	 * different type of hardware</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;mcm) {</div><div class='add'>+		reset_control_assert(priv-&gt;rstc);</div><div class='add'>+		usleep_range(5000, 5100);</div><div class='add'>+		reset_control_deassert(priv-&gt;rstc);</div><div class='add'>+	} else {</div><div class='add'>+		gpiod_set_value_cansleep(priv-&gt;reset, 0);</div><div class='add'>+		usleep_range(5000, 5100);</div><div class='add'>+		gpiod_set_value_cansleep(priv-&gt;reset, 1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Waiting for MT7530 got to stable */</div><div class='add'>+	INIT_MT7530_DUMMY_POLL(&amp;p, priv, MT753X_TRAP);</div><div class='add'>+	ret = readx_poll_timeout(_mt7530_read, &amp;p, val, val != 0,</div><div class='add'>+				 20, 1000000);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(priv-&gt;dev, "reset timeout\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	id = mt7530_read(priv, MT7530_CREV);</div><div class='add'>+	id &gt;&gt;= CHIP_NAME_SHIFT;</div><div class='add'>+	if (id != MT7530_ID) {</div><div class='add'>+		dev_err(priv-&gt;dev, "chip %x can't be supported\n", id);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((val &amp; MT7530_XTAL_MASK) == MT7530_XTAL_20MHZ) {</div><div class='add'>+		dev_err(priv-&gt;dev,</div><div class='add'>+			"MT7530 with a 20MHz XTAL is not supported!\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Reset the switch through internal reset */</div><div class='add'>+	mt7530_write(priv, MT7530_SYS_CTRL,</div><div class='add'>+		     SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST |</div><div class='add'>+		     SYS_CTRL_REG_RST);</div><div class='add'>+</div><div class='add'>+	/* Lower Tx driving for TRGMII path */</div><div class='add'>+	for (i = 0; i &lt; NUM_TRGMII_CTRL; i++)</div><div class='add'>+		mt7530_write(priv, MT7530_TRGMII_TD_ODT(i),</div><div class='add'>+			     TD_DM_DRVP(8) | TD_DM_DRVN(8));</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; NUM_TRGMII_CTRL; i++)</div><div class='add'>+		mt7530_rmw(priv, MT7530_TRGMII_RD(i),</div><div class='add'>+			   RD_TAP_MASK, RD_TAP(16));</div><div class='add'>+</div><div class='add'>+	/* Allow modifying the trap and directly access PHY registers via the</div><div class='add'>+	 * MDIO bus the switch is on.</div><div class='add'>+	 */</div><div class='add'>+	mt7530_rmw(priv, MT753X_MTRAP, MT7530_CHG_TRAP |</div><div class='add'>+		   MT7530_PHY_INDIRECT_ACCESS, MT7530_CHG_TRAP);</div><div class='add'>+</div><div class='add'>+	if ((val &amp; MT7530_XTAL_MASK) == MT7530_XTAL_40MHZ)</div><div class='add'>+		mt7530_pll_setup(priv);</div><div class='add'>+</div><div class='add'>+	mt753x_trap_frames(priv);</div><div class='add'>+</div><div class='add'>+	/* Enable and reset MIB counters */</div><div class='add'>+	mt7530_mib_reset(ds);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;ds-&gt;num_ports; i++) {</div><div class='add'>+		/* Clear link settings and enable force mode to force link down</div><div class='add'>+		 * on all ports until they're enabled later.</div><div class='add'>+		 */</div><div class='add'>+		mt7530_rmw(priv, MT753X_PMCR_P(i),</div><div class='add'>+			   PMCR_LINK_SETTINGS_MASK |</div><div class='add'>+			   MT753X_FORCE_MODE(priv-&gt;id),</div><div class='add'>+			   MT753X_FORCE_MODE(priv-&gt;id));</div><div class='add'>+</div><div class='add'>+		/* Disable forwarding by default on all ports */</div><div class='add'>+		mt7530_rmw(priv, MT7530_PCR_P(i), PCR_MATRIX_MASK,</div><div class='add'>+			   PCR_MATRIX_CLR);</div><div class='add'>+</div><div class='add'>+		/* Disable learning by default on all ports */</div><div class='add'>+		mt7530_set(priv, MT7530_PSC_P(i), SA_DIS);</div><div class='add'>+</div><div class='add'>+		if (dsa_is_cpu_port(ds, i)) {</div><div class='add'>+			mt753x_cpu_port_enable(ds, i);</div><div class='add'>+		} else {</div><div class='add'>+			mt7530_port_disable(ds, i);</div><div class='add'>+</div><div class='add'>+			/* Set default PVID to 0 on all user ports */</div><div class='add'>+			mt7530_rmw(priv, MT7530_PPBV1_P(i), G0_PORT_VID_MASK,</div><div class='add'>+				   G0_PORT_VID_DEF);</div><div class='add'>+		}</div><div class='add'>+		/* Enable consistent egress tag */</div><div class='add'>+		mt7530_rmw(priv, MT7530_PVC_P(i), PVC_EG_TAG_MASK,</div><div class='add'>+			   PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Allow mirroring frames received on the local port (monitor port). */</div><div class='add'>+	mt7530_set(priv, MT753X_AGC, LOCAL_EN);</div><div class='add'>+</div><div class='add'>+	/* Setup VLAN ID 0 for VLAN-unaware bridges */</div><div class='add'>+	ret = mt7530_setup_vlan0(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Check for PHY muxing on port 5 */</div><div class='add'>+	if (dsa_is_unused_port(ds, 5)) {</div><div class='add'>+		/* Scan the ethernet nodes. Look for GMAC1, lookup the used PHY.</div><div class='add'>+		 * Set priv-&gt;p5_mode to the appropriate value if PHY muxing is</div><div class='add'>+		 * detected.</div><div class='add'>+		 */</div><div class='add'>+		for_each_child_of_node(dn, mac_np) {</div><div class='add'>+			if (!of_device_is_compatible(mac_np,</div><div class='add'>+						     "mediatek,eth-mac"))</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			ret = of_property_read_u32(mac_np, "reg", &amp;id);</div><div class='add'>+			if (ret &lt; 0 || id != 1)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			phy_node = of_parse_phandle(mac_np, "phy-handle", 0);</div><div class='add'>+			if (!phy_node)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			if (phy_node-&gt;parent == priv-&gt;dev-&gt;of_node-&gt;parent ||</div><div class='add'>+			    phy_node-&gt;parent-&gt;parent == priv-&gt;dev-&gt;of_node) {</div><div class='add'>+				ret = of_get_phy_mode(mac_np, &amp;interface);</div><div class='add'>+				if (ret &amp;&amp; ret != -ENODEV) {</div><div class='add'>+					of_node_put(mac_np);</div><div class='add'>+					of_node_put(phy_node);</div><div class='add'>+					return ret;</div><div class='add'>+				}</div><div class='add'>+				id = of_mdio_parse_addr(ds-&gt;dev, phy_node);</div><div class='add'>+				if (id == 0)</div><div class='add'>+					priv-&gt;p5_mode = MUX_PHY_P0;</div><div class='add'>+				if (id == 4)</div><div class='add'>+					priv-&gt;p5_mode = MUX_PHY_P4;</div><div class='add'>+			}</div><div class='add'>+			of_node_put(mac_np);</div><div class='add'>+			of_node_put(phy_node);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (priv-&gt;p5_mode == MUX_PHY_P0 ||</div><div class='add'>+		    priv-&gt;p5_mode == MUX_PHY_P4) {</div><div class='add'>+			mt7530_clear(priv, MT753X_MTRAP, MT7530_P5_DIS);</div><div class='add'>+			mt7530_setup_port5(ds, interface);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_GPIOLIB</div><div class='add'>+	if (of_property_read_bool(priv-&gt;dev-&gt;of_node, "gpio-controller")) {</div><div class='add'>+		ret = mt7530_setup_gpio(priv);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+#endif /* CONFIG_GPIOLIB */</div><div class='add'>+</div><div class='add'>+	/* Flush the FDB table */</div><div class='add'>+	ret = mt7530_fdb_cmd(priv, MT7530_FDB_FLUSH, NULL);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7531_setup_common(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	ds-&gt;assisted_learning_on_cpu_port = true;</div><div class='add'>+	ds-&gt;mtu_enforcement_ingress = true;</div><div class='add'>+</div><div class='add'>+	mt753x_trap_frames(priv);</div><div class='add'>+</div><div class='add'>+	/* Enable and reset MIB counters */</div><div class='add'>+	mt7530_mib_reset(ds);</div><div class='add'>+</div><div class='add'>+	/* Disable flooding on all ports */</div><div class='add'>+	mt7530_clear(priv, MT753X_MFC, BC_FFP_MASK | UNM_FFP_MASK |</div><div class='add'>+		     UNU_FFP_MASK);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;ds-&gt;num_ports; i++) {</div><div class='add'>+		/* Clear link settings and enable force mode to force link down</div><div class='add'>+		 * on all ports until they're enabled later.</div><div class='add'>+		 */</div><div class='add'>+		mt7530_rmw(priv, MT753X_PMCR_P(i),</div><div class='add'>+			   PMCR_LINK_SETTINGS_MASK |</div><div class='add'>+			   MT753X_FORCE_MODE(priv-&gt;id),</div><div class='add'>+			   MT753X_FORCE_MODE(priv-&gt;id));</div><div class='add'>+</div><div class='add'>+		/* Disable forwarding by default on all ports */</div><div class='add'>+		mt7530_rmw(priv, MT7530_PCR_P(i), PCR_MATRIX_MASK,</div><div class='add'>+			   PCR_MATRIX_CLR);</div><div class='add'>+</div><div class='add'>+		/* Disable learning by default on all ports */</div><div class='add'>+		mt7530_set(priv, MT7530_PSC_P(i), SA_DIS);</div><div class='add'>+</div><div class='add'>+		mt7530_set(priv, MT7531_DBG_CNT(i), MT7531_DIS_CLR);</div><div class='add'>+</div><div class='add'>+		if (dsa_is_cpu_port(ds, i)) {</div><div class='add'>+			mt753x_cpu_port_enable(ds, i);</div><div class='add'>+		} else {</div><div class='add'>+			mt7530_port_disable(ds, i);</div><div class='add'>+</div><div class='add'>+			/* Set default PVID to 0 on all user ports */</div><div class='add'>+			mt7530_rmw(priv, MT7530_PPBV1_P(i), G0_PORT_VID_MASK,</div><div class='add'>+				   G0_PORT_VID_DEF);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Enable consistent egress tag */</div><div class='add'>+		mt7530_rmw(priv, MT7530_PVC_P(i), PVC_EG_TAG_MASK,</div><div class='add'>+			   PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Allow mirroring frames received on the local port (monitor port). */</div><div class='add'>+	mt7530_set(priv, MT753X_AGC, LOCAL_EN);</div><div class='add'>+</div><div class='add'>+	/* Enable Special Tag for rx frames */</div><div class='add'>+	if (priv-&gt;id == ID_EN7581 || priv-&gt;id == ID_AN7583)</div><div class='add'>+		mt7530_write(priv, MT753X_CPORT_SPTAG_CFG,</div><div class='add'>+			     CPORT_SW2FE_STAG_EN | CPORT_FE2SW_STAG_EN);</div><div class='add'>+</div><div class='add'>+	/* Flush the FDB table */</div><div class='add'>+	ret = mt7530_fdb_cmd(priv, MT7530_FDB_FLUSH, NULL);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Setup VLAN ID 0 for VLAN-unaware bridges */</div><div class='add'>+	return mt7530_setup_vlan0(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt7531_setup(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+	struct mt7530_dummy_poll p;</div><div class='add'>+	u32 val, id;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	/* Reset whole chip through gpio pin or memory-mapped registers for</div><div class='add'>+	 * different type of hardware</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;mcm) {</div><div class='add'>+		reset_control_assert(priv-&gt;rstc);</div><div class='add'>+		usleep_range(5000, 5100);</div><div class='add'>+		reset_control_deassert(priv-&gt;rstc);</div><div class='add'>+	} else {</div><div class='add'>+		gpiod_set_value_cansleep(priv-&gt;reset, 0);</div><div class='add'>+		usleep_range(5000, 5100);</div><div class='add'>+		gpiod_set_value_cansleep(priv-&gt;reset, 1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Waiting for MT7530 got to stable */</div><div class='add'>+	INIT_MT7530_DUMMY_POLL(&amp;p, priv, MT753X_TRAP);</div><div class='add'>+	ret = readx_poll_timeout(_mt7530_read, &amp;p, val, val != 0,</div><div class='add'>+				 20, 1000000);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(priv-&gt;dev, "reset timeout\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	id = mt7530_read(priv, MT7531_CREV);</div><div class='add'>+	id &gt;&gt;= CHIP_NAME_SHIFT;</div><div class='add'>+</div><div class='add'>+	if (id != MT7531_ID) {</div><div class='add'>+		dev_err(priv-&gt;dev, "chip %x can't be supported\n", id);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* MT7531AE has got two SGMII units. One for port 5, one for port 6.</div><div class='add'>+	 * MT7531BE has got only one SGMII unit which is for port 6.</div><div class='add'>+	 */</div><div class='add'>+	val = mt7530_read(priv, MT7531_TOP_SIG_SR);</div><div class='add'>+	priv-&gt;p5_sgmii = !!(val &amp; PAD_DUAL_SGMII_EN);</div><div class='add'>+</div><div class='add'>+	/* Force link down on all ports before internal reset */</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;ds-&gt;num_ports; i++)</div><div class='add'>+		mt7530_write(priv, MT753X_PMCR_P(i), MT7531_FORCE_MODE_LNK);</div><div class='add'>+</div><div class='add'>+	/* Reset the switch through internal reset */</div><div class='add'>+	mt7530_write(priv, MT7530_SYS_CTRL, SYS_CTRL_SW_RST | SYS_CTRL_REG_RST);</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;p5_sgmii) {</div><div class='add'>+		mt7531_pll_setup(priv);</div><div class='add'>+	} else {</div><div class='add'>+		/* Unlike MT7531BE, the GPIO 6-12 pins are not used for RGMII on</div><div class='add'>+		 * MT7531AE. Set the GPIO 11-12 pins to function as MDC and MDIO</div><div class='add'>+		 * to expose the MDIO bus of the switch.</div><div class='add'>+		 */</div><div class='add'>+		mt7530_rmw(priv, MT7531_GPIO_MODE1, MT7531_GPIO11_RG_RXD2_MASK,</div><div class='add'>+			   MT7531_EXT_P_MDC_11);</div><div class='add'>+		mt7530_rmw(priv, MT7531_GPIO_MODE1, MT7531_GPIO12_RG_RXD3_MASK,</div><div class='add'>+			   MT7531_EXT_P_MDIO_12);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mt7530_rmw(priv, MT7531_GPIO_MODE0, MT7531_GPIO0_MASK,</div><div class='add'>+		   MT7531_GPIO0_INTERRUPT);</div><div class='add'>+</div><div class='add'>+	/* Enable Energy-Efficient Ethernet (EEE) and PHY core PLL, since</div><div class='add'>+	 * phy_device has not yet been created provided for</div><div class='add'>+	 * phy_[read,write]_mmd_indirect is called, we provide our own</div><div class='add'>+	 * mt7531_ind_mmd_phy_[read,write] to complete this function.</div><div class='add'>+	 */</div><div class='add'>+	val = mt7531_ind_c45_phy_read(priv,</div><div class='add'>+				      MT753X_CTRL_PHY_ADDR(priv-&gt;mdiodev-&gt;addr),</div><div class='add'>+				      MDIO_MMD_VEND2, CORE_PLL_GROUP4);</div><div class='add'>+	val |= MT7531_RG_SYSPLL_DMY2 | MT7531_PHY_PLL_BYPASS_MODE;</div><div class='add'>+	val &amp;= ~MT7531_PHY_PLL_OFF;</div><div class='add'>+	mt7531_ind_c45_phy_write(priv,</div><div class='add'>+				 MT753X_CTRL_PHY_ADDR(priv-&gt;mdiodev-&gt;addr),</div><div class='add'>+				 MDIO_MMD_VEND2, CORE_PLL_GROUP4, val);</div><div class='add'>+</div><div class='add'>+	/* Disable EEE advertisement on the switch PHYs. */</div><div class='add'>+	for (i = MT753X_CTRL_PHY_ADDR(priv-&gt;mdiodev-&gt;addr);</div><div class='add'>+	     i &lt; MT753X_CTRL_PHY_ADDR(priv-&gt;mdiodev-&gt;addr) + MT7530_NUM_PHYS;</div><div class='add'>+	     i++) {</div><div class='add'>+		mt7531_ind_c45_phy_write(priv, i, MDIO_MMD_AN, MDIO_AN_EEE_ADV,</div><div class='add'>+					 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = mt7531_setup_common(ds);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mt7530_mac_port_get_caps(struct dsa_switch *ds, int port,</div><div class='add'>+				     struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	config-&gt;mac_capabilities |= MAC_10 | MAC_100 | MAC_1000FD;</div><div class='add'>+</div><div class='add'>+	switch (port) {</div><div class='add'>+	/* Ports which are connected to switch PHYs. There is no MII pinout. */</div><div class='add'>+	case 0 ... 4:</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_GMII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	/* Port 5 supports rgmii with delays, mii, and gmii. */</div><div class='add'>+	case 5:</div><div class='add'>+		phy_interface_set_rgmii(config-&gt;supported_interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_MII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_GMII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	/* Port 6 supports rgmii and trgmii. */</div><div class='add'>+	case 6:</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_RGMII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_TRGMII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mt7531_mac_port_get_caps(struct dsa_switch *ds, int port,</div><div class='add'>+				     struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	config-&gt;mac_capabilities |= MAC_10 | MAC_100 | MAC_1000FD;</div><div class='add'>+</div><div class='add'>+	switch (port) {</div><div class='add'>+	/* Ports which are connected to switch PHYs. There is no MII pinout. */</div><div class='add'>+	case 0 ... 4:</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_GMII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	/* Port 5 supports rgmii with delays on MT7531BE, sgmii/802.3z on</div><div class='add'>+	 * MT7531AE.</div><div class='add'>+	 */</div><div class='add'>+	case 5:</div><div class='add'>+		if (!priv-&gt;p5_sgmii) {</div><div class='add'>+			phy_interface_set_rgmii(config-&gt;supported_interfaces);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		fallthrough;</div><div class='add'>+</div><div class='add'>+	/* Port 6 supports sgmii/802.3z. */</div><div class='add'>+	case 6:</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_SGMII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_1000BASEX,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_2500BASEX,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+</div><div class='add'>+		config-&gt;mac_capabilities |= MAC_2500FD;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mt7988_mac_port_get_caps(struct dsa_switch *ds, int port,</div><div class='add'>+				     struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	switch (port) {</div><div class='add'>+	/* Ports which are connected to switch PHYs. There is no MII pinout. */</div><div class='add'>+	case 0 ... 3:</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_INTERNAL,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+</div><div class='add'>+		config-&gt;mac_capabilities |= MAC_10 | MAC_100 | MAC_1000FD;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	/* Port 6 is connected to SoC's XGMII MAC. There is no MII pinout. */</div><div class='add'>+	case 6:</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_INTERNAL,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+</div><div class='add'>+		config-&gt;mac_capabilities |= MAC_10000FD;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void en7581_mac_port_get_caps(struct dsa_switch *ds, int port,</div><div class='add'>+				     struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	switch (port) {</div><div class='add'>+	/* Ports which are connected to switch PHYs. There is no MII pinout. */</div><div class='add'>+	case 0 ... 4:</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_INTERNAL,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+</div><div class='add'>+		config-&gt;mac_capabilities |= MAC_10 | MAC_100 | MAC_1000FD;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	/* Port 6 is connected to SoC's XGMII MAC. There is no MII pinout. */</div><div class='add'>+	case 6:</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_INTERNAL,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+</div><div class='add'>+		config-&gt;mac_capabilities |= MAC_10000FD;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mt7530_mac_config(struct dsa_switch *ds, int port, unsigned int mode,</div><div class='add'>+		  phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (port == 5)</div><div class='add'>+		mt7530_setup_port5(priv-&gt;ds, interface);</div><div class='add'>+	else if (port == 6)</div><div class='add'>+		mt7530_setup_port6(priv-&gt;ds, interface);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mt7531_rgmii_setup(struct mt7530_priv *priv,</div><div class='add'>+			       phy_interface_t interface,</div><div class='add'>+			       struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = mt7530_read(priv, MT7531_CLKGEN_CTRL);</div><div class='add'>+	val |= GP_CLK_EN;</div><div class='add'>+	val &amp;= ~GP_MODE_MASK;</div><div class='add'>+	val |= GP_MODE(MT7531_GP_MODE_RGMII);</div><div class='add'>+	val &amp;= ~CLK_SKEW_IN_MASK;</div><div class='add'>+	val |= CLK_SKEW_IN(MT7531_CLK_SKEW_NO_CHG);</div><div class='add'>+	val &amp;= ~CLK_SKEW_OUT_MASK;</div><div class='add'>+	val |= CLK_SKEW_OUT(MT7531_CLK_SKEW_NO_CHG);</div><div class='add'>+	val |= TXCLK_NO_REVERSE | RXCLK_NO_DELAY;</div><div class='add'>+</div><div class='add'>+	/* Do not adjust rgmii delay when vendor phy driver presents. */</div><div class='add'>+	if (!phydev || phy_driver_is_genphy(phydev)) {</div><div class='add'>+		val &amp;= ~(TXCLK_NO_REVERSE | RXCLK_NO_DELAY);</div><div class='add'>+		switch (interface) {</div><div class='add'>+		case PHY_INTERFACE_MODE_RGMII:</div><div class='add'>+			val |= TXCLK_NO_REVERSE;</div><div class='add'>+			val |= RXCLK_NO_DELAY;</div><div class='add'>+			break;</div><div class='add'>+		case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='add'>+			val |= TXCLK_NO_REVERSE;</div><div class='add'>+			break;</div><div class='add'>+		case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='add'>+			val |= RXCLK_NO_DELAY;</div><div class='add'>+			break;</div><div class='add'>+		case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mt7530_write(priv, MT7531_CLKGEN_CTRL, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mt7531_mac_config(struct dsa_switch *ds, int port, unsigned int mode,</div><div class='add'>+		  phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+	struct phy_device *phydev;</div><div class='add'>+	struct dsa_port *dp;</div><div class='add'>+</div><div class='add'>+	if (phy_interface_mode_is_rgmii(interface)) {</div><div class='add'>+		dp = dsa_to_port(ds, port);</div><div class='add'>+		phydev = dp-&gt;user-&gt;phydev;</div><div class='add'>+		mt7531_rgmii_setup(priv, interface, phydev);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct phylink_pcs *</div><div class='add'>+mt753x_phylink_mac_select_pcs(struct phylink_config *config,</div><div class='add'>+			      phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct mt7530_priv *priv = dp-&gt;ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	switch (interface) {</div><div class='add'>+	case PHY_INTERFACE_MODE_TRGMII:</div><div class='add'>+		return &amp;priv-&gt;pcs[dp-&gt;index].pcs;</div><div class='add'>+	case PHY_INTERFACE_MODE_SGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_1000BASEX:</div><div class='add'>+	case PHY_INTERFACE_MODE_2500BASEX:</div><div class='add'>+		return priv-&gt;ports[dp-&gt;index].sgmii_pcs;</div><div class='add'>+	default:</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mt753x_phylink_mac_config(struct phylink_config *config, unsigned int mode,</div><div class='add'>+			  const struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct dsa_switch *ds = dp-&gt;ds;</div><div class='add'>+	struct mt7530_priv *priv;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+</div><div class='add'>+	priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if ((port == 5 || port == 6) &amp;&amp; priv-&gt;info-&gt;mac_port_config)</div><div class='add'>+		priv-&gt;info-&gt;mac_port_config(ds, port, mode, state-&gt;interface);</div><div class='add'>+</div><div class='add'>+	/* Are we connected to external phy */</div><div class='add'>+	if (port == 5 &amp;&amp; dsa_is_user_port(ds, 5))</div><div class='add'>+		mt7530_set(priv, MT753X_PMCR_P(port), PMCR_EXT_PHY);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mt753x_phylink_mac_link_down(struct phylink_config *config,</div><div class='add'>+					 unsigned int mode,</div><div class='add'>+					 phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct mt7530_priv *priv = dp-&gt;ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	mt7530_clear(priv, MT753X_PMCR_P(dp-&gt;index), PMCR_LINK_SETTINGS_MASK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mt753x_phylink_mac_link_up(struct phylink_config *config,</div><div class='add'>+				       struct phy_device *phydev,</div><div class='add'>+				       unsigned int mode,</div><div class='add'>+				       phy_interface_t interface,</div><div class='add'>+				       int speed, int duplex,</div><div class='add'>+				       bool tx_pause, bool rx_pause)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct mt7530_priv *priv = dp-&gt;ds-&gt;priv;</div><div class='add'>+	u32 mcr;</div><div class='add'>+</div><div class='add'>+	mcr = PMCR_MAC_RX_EN | PMCR_MAC_TX_EN | PMCR_FORCE_LNK;</div><div class='add'>+</div><div class='add'>+	switch (speed) {</div><div class='add'>+	case SPEED_1000:</div><div class='add'>+	case SPEED_2500:</div><div class='add'>+	case SPEED_10000:</div><div class='add'>+		mcr |= PMCR_FORCE_SPEED_1000;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_100:</div><div class='add'>+		mcr |= PMCR_FORCE_SPEED_100;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	if (duplex == DUPLEX_FULL) {</div><div class='add'>+		mcr |= PMCR_FORCE_FDX;</div><div class='add'>+		if (tx_pause)</div><div class='add'>+			mcr |= PMCR_FORCE_TX_FC_EN;</div><div class='add'>+		if (rx_pause)</div><div class='add'>+			mcr |= PMCR_FORCE_RX_FC_EN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mt7530_set(priv, MT753X_PMCR_P(dp-&gt;index), mcr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mt753x_phylink_mac_disable_tx_lpi(struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct mt7530_priv *priv = dp-&gt;ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	mt7530_clear(priv, MT753X_PMCR_P(dp-&gt;index),</div><div class='add'>+		     PMCR_FORCE_EEE1G | PMCR_FORCE_EEE100);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mt753x_phylink_mac_enable_tx_lpi(struct phylink_config *config,</div><div class='add'>+					    u32 timer, bool tx_clock_stop)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct mt7530_priv *priv = dp-&gt;ds-&gt;priv;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	/* If the timer is zero, then set LPI_MODE_EN, which allows the</div><div class='add'>+	 * system to enter LPI mode immediately rather than waiting for</div><div class='add'>+	 * the LPI threshold.</div><div class='add'>+	 */</div><div class='add'>+	if (!timer)</div><div class='add'>+		val = LPI_MODE_EN;</div><div class='add'>+	else if (FIELD_FIT(LPI_THRESH_MASK, timer))</div><div class='add'>+		val = FIELD_PREP(LPI_THRESH_MASK, timer);</div><div class='add'>+	else</div><div class='add'>+		val = LPI_THRESH_MASK;</div><div class='add'>+</div><div class='add'>+	mt7530_rmw(priv, MT753X_PMEEECR_P(dp-&gt;index),</div><div class='add'>+		   LPI_THRESH_MASK | LPI_MODE_EN, val);</div><div class='add'>+</div><div class='add'>+	mt7530_set(priv, MT753X_PMCR_P(dp-&gt;index),</div><div class='add'>+		   PMCR_FORCE_EEE1G | PMCR_FORCE_EEE100);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mt753x_phylink_get_caps(struct dsa_switch *ds, int port,</div><div class='add'>+				    struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+	u32 eeecr;</div><div class='add'>+</div><div class='add'>+	config-&gt;mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE;</div><div class='add'>+</div><div class='add'>+	config-&gt;lpi_capabilities = MAC_100FD | MAC_1000FD | MAC_2500FD;</div><div class='add'>+</div><div class='add'>+	eeecr = mt7530_read(priv, MT753X_PMEEECR_P(port));</div><div class='add'>+	/* tx_lpi_timer should be in microseconds. The time units for</div><div class='add'>+	 * LPI threshold are unspecified.</div><div class='add'>+	 */</div><div class='add'>+	config-&gt;lpi_timer_default = FIELD_GET(LPI_THRESH_MASK, eeecr);</div><div class='add'>+</div><div class='add'>+	priv-&gt;info-&gt;mac_port_get_caps(ds, port, config);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mt753x_pcs_validate(struct phylink_pcs *pcs,</div><div class='add'>+			       unsigned long *supported,</div><div class='add'>+			       const struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+	/* Autonegotiation is not supported in TRGMII nor 802.3z modes */</div><div class='add'>+	if (state-&gt;interface == PHY_INTERFACE_MODE_TRGMII ||</div><div class='add'>+	    phy_interface_mode_is_8023z(state-&gt;interface))</div><div class='add'>+		phylink_clear(supported, Autoneg);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mt7530_pcs_get_state(struct phylink_pcs *pcs, unsigned int neg_mode,</div><div class='add'>+				 struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = pcs_to_mt753x_pcs(pcs)-&gt;priv;</div><div class='add'>+	int port = pcs_to_mt753x_pcs(pcs)-&gt;port;</div><div class='add'>+	u32 pmsr;</div><div class='add'>+</div><div class='add'>+	pmsr = mt7530_read(priv, MT7530_PMSR_P(port));</div><div class='add'>+</div><div class='add'>+	state-&gt;link = (pmsr &amp; PMSR_LINK);</div><div class='add'>+	state-&gt;an_complete = state-&gt;link;</div><div class='add'>+	state-&gt;duplex = !!(pmsr &amp; PMSR_DPX);</div><div class='add'>+</div><div class='add'>+	switch (pmsr &amp; PMSR_SPEED_MASK) {</div><div class='add'>+	case PMSR_SPEED_10:</div><div class='add'>+		state-&gt;speed = SPEED_10;</div><div class='add'>+		break;</div><div class='add'>+	case PMSR_SPEED_100:</div><div class='add'>+		state-&gt;speed = SPEED_100;</div><div class='add'>+		break;</div><div class='add'>+	case PMSR_SPEED_1000:</div><div class='add'>+		state-&gt;speed = SPEED_1000;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		state-&gt;speed = SPEED_UNKNOWN;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	state-&gt;pause &amp;= ~(MLO_PAUSE_RX | MLO_PAUSE_TX);</div><div class='add'>+	if (pmsr &amp; PMSR_RX_FC)</div><div class='add'>+		state-&gt;pause |= MLO_PAUSE_RX;</div><div class='add'>+	if (pmsr &amp; PMSR_TX_FC)</div><div class='add'>+		state-&gt;pause |= MLO_PAUSE_TX;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mt753x_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode,</div><div class='add'>+			     phy_interface_t interface,</div><div class='add'>+			     const unsigned long *advertising,</div><div class='add'>+			     bool permit_pause_to_mac)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mt7530_pcs_an_restart(struct phylink_pcs *pcs)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct phylink_pcs_ops mt7530_pcs_ops = {</div><div class='add'>+	.pcs_validate = mt753x_pcs_validate,</div><div class='add'>+	.pcs_get_state = mt7530_pcs_get_state,</div><div class='add'>+	.pcs_config = mt753x_pcs_config,</div><div class='add'>+	.pcs_an_restart = mt7530_pcs_an_restart,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mt753x_setup(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+	int ret = priv-&gt;info-&gt;sw_setup(ds);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = mt7530_setup_irq(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = mt7530_setup_mdio(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Initialise the PCS devices */</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;ds-&gt;num_ports; i++) {</div><div class='add'>+		priv-&gt;pcs[i].pcs.ops = priv-&gt;info-&gt;pcs_ops;</div><div class='add'>+		priv-&gt;pcs[i].priv = priv;</div><div class='add'>+		priv-&gt;pcs[i].port = i;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;create_sgmii)</div><div class='add'>+		ret = priv-&gt;create_sgmii(priv);</div><div class='add'>+</div><div class='add'>+	if (ret &amp;&amp; priv-&gt;irq_domain)</div><div class='add'>+		mt7530_free_mdio_irq(priv);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mt753x_set_mac_eee(struct dsa_switch *ds, int port,</div><div class='add'>+			      struct ethtool_keee *e)</div><div class='add'>+{</div><div class='add'>+	if (e-&gt;tx_lpi_timer &gt; 0xFFF)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mt753x_conduit_state_change(struct dsa_switch *ds,</div><div class='add'>+			    const struct net_device *conduit,</div><div class='add'>+			    bool operational)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *cpu_dp = conduit-&gt;dsa_ptr;</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+	int val = 0;</div><div class='add'>+	u8 mask;</div><div class='add'>+</div><div class='add'>+	/* Set the CPU port to trap frames to for MT7530. Trapped frames will be</div><div class='add'>+	 * forwarded to the numerically smallest CPU port whose conduit</div><div class='add'>+	 * interface is up.</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;id != ID_MT7530 &amp;&amp; priv-&gt;id != ID_MT7621)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mask = BIT(cpu_dp-&gt;index);</div><div class='add'>+</div><div class='add'>+	if (operational)</div><div class='add'>+		priv-&gt;active_cpu_ports |= mask;</div><div class='add'>+	else</div><div class='add'>+		priv-&gt;active_cpu_ports &amp;= ~mask;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;active_cpu_ports) {</div><div class='add'>+		val = MT7530_CPU_EN |</div><div class='add'>+		      MT7530_CPU_PORT(__ffs(priv-&gt;active_cpu_ports));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mt7530_rmw(priv, MT753X_MFC, MT7530_CPU_EN | MT7530_CPU_PORT_MASK, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mt753x_tc_setup_qdisc_tbf(struct dsa_switch *ds, int port,</div><div class='add'>+				     struct tc_tbf_qopt_offload *qopt)</div><div class='add'>+{</div><div class='add'>+	struct tc_tbf_qopt_offload_replace_params *p = &amp;qopt-&gt;replace_params;</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+	u32 rate = 0;</div><div class='add'>+</div><div class='add'>+	switch (qopt-&gt;command) {</div><div class='add'>+	case TC_TBF_REPLACE:</div><div class='add'>+		rate = div_u64(p-&gt;rate.rate_bytes_ps, 1000) &lt;&lt; 3; /* kbps */</div><div class='add'>+		fallthrough;</div><div class='add'>+	case TC_TBF_DESTROY: {</div><div class='add'>+		u32 val, tick;</div><div class='add'>+</div><div class='add'>+		mt7530_rmw(priv, MT753X_GERLCR, EGR_BC_MASK,</div><div class='add'>+			   EGR_BC_CRC_IPG_PREAMBLE);</div><div class='add'>+</div><div class='add'>+		/* if rate is greater than 10Mbps tick is 1/32 ms,</div><div class='add'>+		 * 1ms otherwise</div><div class='add'>+		 */</div><div class='add'>+		tick = rate &gt; 10000 ? 2 : 7;</div><div class='add'>+		val = FIELD_PREP(ERLCR_CIR_MASK, (rate &gt;&gt; 5)) |</div><div class='add'>+		      FIELD_PREP(ERLCR_EN_MASK, !!rate) |</div><div class='add'>+		      FIELD_PREP(ERLCR_EXP_MASK, tick) |</div><div class='add'>+		      ERLCR_TBF_MODE_MASK |</div><div class='add'>+		      FIELD_PREP(ERLCR_MANT_MASK, 0xf);</div><div class='add'>+		mt7530_write(priv, MT753X_ERLCR_P(port), val);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mt753x_setup_tc(struct dsa_switch *ds, int port,</div><div class='add'>+			   enum tc_setup_type type, void *type_data)</div><div class='add'>+{</div><div class='add'>+	switch (type) {</div><div class='add'>+	case TC_SETUP_QDISC_TBF:</div><div class='add'>+		return mt753x_tc_setup_qdisc_tbf(ds, port, type_data);</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mt7988_setup(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct mt7530_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	/* Reset the switch */</div><div class='add'>+	reset_control_assert(priv-&gt;rstc);</div><div class='add'>+	usleep_range(20, 50);</div><div class='add'>+	reset_control_deassert(priv-&gt;rstc);</div><div class='add'>+	usleep_range(20, 50);</div><div class='add'>+</div><div class='add'>+	/* AN7583 require additional tweak to CONN_CFG */</div><div class='add'>+	if (priv-&gt;id == ID_AN7583)</div><div class='add'>+		mt7530_rmw(priv, AN7583_GEPHY_CONN_CFG,</div><div class='add'>+			   AN7583_CSR_DPHY_CKIN_SEL |</div><div class='add'>+			   AN7583_CSR_PHY_CORE_REG_CLK_SEL |</div><div class='add'>+			   AN7583_CSR_ETHER_AFE_PWD,</div><div class='add'>+			   AN7583_CSR_DPHY_CKIN_SEL |</div><div class='add'>+			   AN7583_CSR_PHY_CORE_REG_CLK_SEL |</div><div class='add'>+			   FIELD_PREP(AN7583_CSR_ETHER_AFE_PWD, 0));</div><div class='add'>+</div><div class='add'>+	/* Reset the switch PHYs */</div><div class='add'>+	mt7530_write(priv, MT7530_SYS_CTRL, SYS_CTRL_PHY_RST);</div><div class='add'>+</div><div class='add'>+	return mt7531_setup_common(ds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct dsa_switch_ops mt7530_switch_ops = {</div><div class='add'>+	.get_tag_protocol	= mtk_get_tag_protocol,</div><div class='add'>+	.setup			= mt753x_setup,</div><div class='add'>+	.preferred_default_local_cpu_port = mt753x_preferred_default_local_cpu_port,</div><div class='add'>+	.get_strings		= mt7530_get_strings,</div><div class='add'>+	.get_ethtool_stats	= mt7530_get_ethtool_stats,</div><div class='add'>+	.get_sset_count		= mt7530_get_sset_count,</div><div class='add'>+	.get_eth_mac_stats	= mt7530_get_eth_mac_stats,</div><div class='add'>+	.get_rmon_stats		= mt7530_get_rmon_stats,</div><div class='add'>+	.get_eth_ctrl_stats	= mt7530_get_eth_ctrl_stats,</div><div class='add'>+	.get_stats64		= mt7530_get_stats64,</div><div class='add'>+	.set_ageing_time	= mt7530_set_ageing_time,</div><div class='add'>+	.port_enable		= mt7530_port_enable,</div><div class='add'>+	.port_disable		= mt7530_port_disable,</div><div class='add'>+	.port_change_mtu	= mt7530_port_change_mtu,</div><div class='add'>+	.port_max_mtu		= mt7530_port_max_mtu,</div><div class='add'>+	.port_stp_state_set	= mt7530_stp_state_set,</div><div class='add'>+	.port_pre_bridge_flags	= mt7530_port_pre_bridge_flags,</div><div class='add'>+	.port_bridge_flags	= mt7530_port_bridge_flags,</div><div class='add'>+	.port_bridge_join	= mt7530_port_bridge_join,</div><div class='add'>+	.port_bridge_leave	= mt7530_port_bridge_leave,</div><div class='add'>+	.port_fdb_add		= mt7530_port_fdb_add,</div><div class='add'>+	.port_fdb_del		= mt7530_port_fdb_del,</div><div class='add'>+	.port_fdb_dump		= mt7530_port_fdb_dump,</div><div class='add'>+	.port_mdb_add		= mt7530_port_mdb_add,</div><div class='add'>+	.port_mdb_del		= mt7530_port_mdb_del,</div><div class='add'>+	.port_vlan_filtering	= mt7530_port_vlan_filtering,</div><div class='add'>+	.port_vlan_add		= mt7530_port_vlan_add,</div><div class='add'>+	.port_vlan_del		= mt7530_port_vlan_del,</div><div class='add'>+	.port_mirror_add	= mt753x_port_mirror_add,</div><div class='add'>+	.port_mirror_del	= mt753x_port_mirror_del,</div><div class='add'>+	.phylink_get_caps	= mt753x_phylink_get_caps,</div><div class='add'>+	.support_eee		= dsa_supports_eee,</div><div class='add'>+	.set_mac_eee		= mt753x_set_mac_eee,</div><div class='add'>+	.conduit_state_change	= mt753x_conduit_state_change,</div><div class='add'>+	.port_setup_tc		= mt753x_setup_tc,</div><div class='add'>+	.port_hsr_join		= dsa_port_simple_hsr_join,</div><div class='add'>+	.port_hsr_leave		= dsa_port_simple_hsr_leave,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct phylink_mac_ops mt753x_phylink_mac_ops = {</div><div class='add'>+	.mac_select_pcs	= mt753x_phylink_mac_select_pcs,</div><div class='add'>+	.mac_config	= mt753x_phylink_mac_config,</div><div class='add'>+	.mac_link_down	= mt753x_phylink_mac_link_down,</div><div class='add'>+	.mac_link_up	= mt753x_phylink_mac_link_up,</div><div class='add'>+	.mac_disable_tx_lpi = mt753x_phylink_mac_disable_tx_lpi,</div><div class='add'>+	.mac_enable_tx_lpi = mt753x_phylink_mac_enable_tx_lpi,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct mt753x_info mt753x_table[] = {</div><div class='add'>+	[ID_MT7621] = {</div><div class='add'>+		.id = ID_MT7621,</div><div class='add'>+		.pcs_ops = &amp;mt7530_pcs_ops,</div><div class='add'>+		.sw_setup = mt7530_setup,</div><div class='add'>+		.phy_read_c22 = mt7530_phy_read_c22,</div><div class='add'>+		.phy_write_c22 = mt7530_phy_write_c22,</div><div class='add'>+		.phy_read_c45 = mt7530_phy_read_c45,</div><div class='add'>+		.phy_write_c45 = mt7530_phy_write_c45,</div><div class='add'>+		.mac_port_get_caps = mt7530_mac_port_get_caps,</div><div class='add'>+		.mac_port_config = mt7530_mac_config,</div><div class='add'>+	},</div><div class='add'>+	[ID_MT7530] = {</div><div class='add'>+		.id = ID_MT7530,</div><div class='add'>+		.pcs_ops = &amp;mt7530_pcs_ops,</div><div class='add'>+		.sw_setup = mt7530_setup,</div><div class='add'>+		.phy_read_c22 = mt7530_phy_read_c22,</div><div class='add'>+		.phy_write_c22 = mt7530_phy_write_c22,</div><div class='add'>+		.phy_read_c45 = mt7530_phy_read_c45,</div><div class='add'>+		.phy_write_c45 = mt7530_phy_write_c45,</div><div class='add'>+		.mac_port_get_caps = mt7530_mac_port_get_caps,</div><div class='add'>+		.mac_port_config = mt7530_mac_config,</div><div class='add'>+	},</div><div class='add'>+	[ID_MT7531] = {</div><div class='add'>+		.id = ID_MT7531,</div><div class='add'>+		.pcs_ops = &amp;mt7530_pcs_ops,</div><div class='add'>+		.sw_setup = mt7531_setup,</div><div class='add'>+		.phy_read_c22 = mt7531_ind_c22_phy_read,</div><div class='add'>+		.phy_write_c22 = mt7531_ind_c22_phy_write,</div><div class='add'>+		.phy_read_c45 = mt7531_ind_c45_phy_read,</div><div class='add'>+		.phy_write_c45 = mt7531_ind_c45_phy_write,</div><div class='add'>+		.mac_port_get_caps = mt7531_mac_port_get_caps,</div><div class='add'>+		.mac_port_config = mt7531_mac_config,</div><div class='add'>+	},</div><div class='add'>+	[ID_MT7988] = {</div><div class='add'>+		.id = ID_MT7988,</div><div class='add'>+		.pcs_ops = &amp;mt7530_pcs_ops,</div><div class='add'>+		.sw_setup = mt7988_setup,</div><div class='add'>+		.phy_read_c22 = mt7531_ind_c22_phy_read,</div><div class='add'>+		.phy_write_c22 = mt7531_ind_c22_phy_write,</div><div class='add'>+		.phy_read_c45 = mt7531_ind_c45_phy_read,</div><div class='add'>+		.phy_write_c45 = mt7531_ind_c45_phy_write,</div><div class='add'>+		.mac_port_get_caps = mt7988_mac_port_get_caps,</div><div class='add'>+	},</div><div class='add'>+	[ID_EN7581] = {</div><div class='add'>+		.id = ID_EN7581,</div><div class='add'>+		.pcs_ops = &amp;mt7530_pcs_ops,</div><div class='add'>+		.sw_setup = mt7988_setup,</div><div class='add'>+		.phy_read_c22 = mt7531_ind_c22_phy_read,</div><div class='add'>+		.phy_write_c22 = mt7531_ind_c22_phy_write,</div><div class='add'>+		.phy_read_c45 = mt7531_ind_c45_phy_read,</div><div class='add'>+		.phy_write_c45 = mt7531_ind_c45_phy_write,</div><div class='add'>+		.mac_port_get_caps = en7581_mac_port_get_caps,</div><div class='add'>+	},</div><div class='add'>+	[ID_AN7583] = {</div><div class='add'>+		.id = ID_AN7583,</div><div class='add'>+		.pcs_ops = &amp;mt7530_pcs_ops,</div><div class='add'>+		.sw_setup = mt7988_setup,</div><div class='add'>+		.phy_read_c22 = mt7531_ind_c22_phy_read,</div><div class='add'>+		.phy_write_c22 = mt7531_ind_c22_phy_write,</div><div class='add'>+		.phy_read_c45 = mt7531_ind_c45_phy_read,</div><div class='add'>+		.phy_write_c45 = mt7531_ind_c45_phy_write,</div><div class='add'>+		.mac_port_get_caps = en7581_mac_port_get_caps,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+EXPORT_SYMBOL_GPL(mt753x_table);</div><div class='add'>+</div><div class='add'>+int</div><div class='add'>+mt7530_probe_common(struct mt7530_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = priv-&gt;dev;</div><div class='add'>+</div><div class='add'>+	priv-&gt;ds = devm_kzalloc(dev, sizeof(*priv-&gt;ds), GFP_KERNEL);</div><div class='add'>+	if (!priv-&gt;ds)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv-&gt;ds-&gt;dev = dev;</div><div class='add'>+	priv-&gt;ds-&gt;num_ports = MT7530_NUM_PORTS;</div><div class='add'>+</div><div class='add'>+	/* Get the hardware identifier from the devicetree node.</div><div class='add'>+	 * We will need it for some of the clock and regulator setup.</div><div class='add'>+	 */</div><div class='add'>+	priv-&gt;info = of_device_get_match_data(dev);</div><div class='add'>+	if (!priv-&gt;info)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	priv-&gt;id = priv-&gt;info-&gt;id;</div><div class='add'>+	priv-&gt;dev = dev;</div><div class='add'>+	priv-&gt;ds-&gt;priv = priv;</div><div class='add'>+	priv-&gt;ds-&gt;ops = &amp;mt7530_switch_ops;</div><div class='add'>+	priv-&gt;ds-&gt;phylink_mac_ops = &amp;mt753x_phylink_mac_ops;</div><div class='add'>+	mutex_init(&amp;priv-&gt;reg_mutex);</div><div class='add'>+	dev_set_drvdata(dev, priv);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(mt7530_probe_common);</div><div class='add'>+</div><div class='add'>+void</div><div class='add'>+mt7530_remove_common(struct mt7530_priv *priv)</div><div class='add'>+{</div><div class='add'>+	if (priv-&gt;irq_domain)</div><div class='add'>+		mt7530_free_mdio_irq(priv);</div><div class='add'>+</div><div class='add'>+	dsa_unregister_switch(priv-&gt;ds);</div><div class='add'>+</div><div class='add'>+	mutex_destroy(&amp;priv-&gt;reg_mutex);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(mt7530_remove_common);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Sean Wang &lt;sean.wang@mediatek.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Driver for Mediatek MT7530 Switch");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/dsa/mt7530.h b/drivers/net/dsa/mt7530.h<br/>new file mode 100644<br/>index 000000000000..3e0090bed298<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mt7530.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mt7530.h</a></div><div class='hunk'>@@ -0,0 +1,944 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2017 Sean Wang &lt;sean.wang@mediatek.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __MT7530_H</div><div class='add'>+#define __MT7530_H</div><div class='add'>+</div><div class='add'>+#define MT7530_NUM_PORTS		7</div><div class='add'>+#define MT7530_NUM_PHYS			5</div><div class='add'>+#define MT7530_NUM_FDB_RECORDS		2048</div><div class='add'>+#define MT7530_ALL_MEMBERS		0xff</div><div class='add'>+</div><div class='add'>+#define MTK_HDR_LEN	4</div><div class='add'>+#define MT7530_MAX_MTU	(15 * 1024 - ETH_HLEN - ETH_FCS_LEN - MTK_HDR_LEN)</div><div class='add'>+</div><div class='add'>+enum mt753x_id {</div><div class='add'>+	ID_MT7530 = 0,</div><div class='add'>+	ID_MT7621 = 1,</div><div class='add'>+	ID_MT7531 = 2,</div><div class='add'>+	ID_MT7988 = 3,</div><div class='add'>+	ID_EN7581 = 4,</div><div class='add'>+	ID_AN7583 = 5,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define	NUM_TRGMII_CTRL			5</div><div class='add'>+</div><div class='add'>+#define TRGMII_BASE(x)			(0x10000 + (x))</div><div class='add'>+</div><div class='add'>+/* Registers to ethsys access */</div><div class='add'>+#define ETHSYS_CLKCFG0			0x2c</div><div class='add'>+#define  ETHSYS_TRGMII_CLK_SEL362_5	BIT(11)</div><div class='add'>+</div><div class='add'>+#define SYSC_REG_RSTCTRL		0x34</div><div class='add'>+#define  RESET_MCM			BIT(2)</div><div class='add'>+</div><div class='add'>+/* Register for ARL global control */</div><div class='add'>+#define MT753X_AGC			0xc</div><div class='add'>+#define  LOCAL_EN			BIT(7)</div><div class='add'>+</div><div class='add'>+/* Register for MAC forward control */</div><div class='add'>+#define MT753X_MFC			0x10</div><div class='add'>+#define  BC_FFP_MASK			GENMASK(31, 24)</div><div class='add'>+#define  BC_FFP(x)			FIELD_PREP(BC_FFP_MASK, x)</div><div class='add'>+#define  UNM_FFP_MASK			GENMASK(23, 16)</div><div class='add'>+#define  UNM_FFP(x)			FIELD_PREP(UNM_FFP_MASK, x)</div><div class='add'>+#define  UNU_FFP_MASK			GENMASK(15, 8)</div><div class='add'>+#define  UNU_FFP(x)			FIELD_PREP(UNU_FFP_MASK, x)</div><div class='add'>+#define  MT7530_CPU_EN			BIT(7)</div><div class='add'>+#define  MT7530_CPU_PORT_MASK		GENMASK(6, 4)</div><div class='add'>+#define  MT7530_CPU_PORT(x)		FIELD_PREP(MT7530_CPU_PORT_MASK, x)</div><div class='add'>+#define  MT7530_MIRROR_EN		BIT(3)</div><div class='add'>+#define  MT7530_MIRROR_PORT_MASK	GENMASK(2, 0)</div><div class='add'>+#define  MT7530_MIRROR_PORT_GET(x)	FIELD_GET(MT7530_MIRROR_PORT_MASK, x)</div><div class='add'>+#define  MT7530_MIRROR_PORT_SET(x)	FIELD_PREP(MT7530_MIRROR_PORT_MASK, x)</div><div class='add'>+#define  MT7531_QRY_FFP_MASK		GENMASK(7, 0)</div><div class='add'>+#define  MT7531_QRY_FFP(x)		FIELD_PREP(MT7531_QRY_FFP_MASK, x)</div><div class='add'>+</div><div class='add'>+/* Register for CPU forward control */</div><div class='add'>+#define MT7531_CFC			0x4</div><div class='add'>+#define  MT7531_MIRROR_EN		BIT(19)</div><div class='add'>+#define  MT7531_MIRROR_PORT_MASK	GENMASK(18, 16)</div><div class='add'>+#define  MT7531_MIRROR_PORT_GET(x)	FIELD_GET(MT7531_MIRROR_PORT_MASK, x)</div><div class='add'>+#define  MT7531_MIRROR_PORT_SET(x)	FIELD_PREP(MT7531_MIRROR_PORT_MASK, x)</div><div class='add'>+#define  MT7531_CPU_PMAP_MASK		GENMASK(7, 0)</div><div class='add'>+#define  MT7531_CPU_PMAP(x)		FIELD_PREP(MT7531_CPU_PMAP_MASK, x)</div><div class='add'>+</div><div class='add'>+#define MT753X_MIRROR_REG(id)		((id == ID_MT7531 || \</div><div class='add'>+					  id == ID_MT7988 || \</div><div class='add'>+					  id == ID_EN7581 || \</div><div class='add'>+					  id == ID_AN7583) ? \</div><div class='add'>+					 MT7531_CFC : MT753X_MFC)</div><div class='add'>+</div><div class='add'>+#define MT753X_MIRROR_EN(id)		((id == ID_MT7531 || \</div><div class='add'>+					  id == ID_MT7988 || \</div><div class='add'>+					  id == ID_EN7581) ? \</div><div class='add'>+					 MT7531_MIRROR_EN : MT7530_MIRROR_EN)</div><div class='add'>+</div><div class='add'>+#define MT753X_MIRROR_PORT_MASK(id)	((id == ID_MT7531 || \</div><div class='add'>+					  id == ID_MT7988 || \</div><div class='add'>+					  id == ID_EN7581 || \</div><div class='add'>+					  id == ID_AN7583) ? \</div><div class='add'>+					 MT7531_MIRROR_PORT_MASK : \</div><div class='add'>+					 MT7530_MIRROR_PORT_MASK)</div><div class='add'>+</div><div class='add'>+#define MT753X_MIRROR_PORT_GET(id, val)	((id == ID_MT7531 || \</div><div class='add'>+					  id == ID_MT7988 || \</div><div class='add'>+					  id == ID_EN7581 || \</div><div class='add'>+					  id == ID_AN7583) ? \</div><div class='add'>+					 MT7531_MIRROR_PORT_GET(val) : \</div><div class='add'>+					 MT7530_MIRROR_PORT_GET(val))</div><div class='add'>+</div><div class='add'>+#define MT753X_MIRROR_PORT_SET(id, val)	((id == ID_MT7531 || \</div><div class='add'>+					  id == ID_MT7988 || \</div><div class='add'>+					  id == ID_EN7581 || \</div><div class='add'>+					  id == ID_AN7583) ? \</div><div class='add'>+					 MT7531_MIRROR_PORT_SET(val) : \</div><div class='add'>+					 MT7530_MIRROR_PORT_SET(val))</div><div class='add'>+</div><div class='add'>+/* Register for BPDU and PAE frame control */</div><div class='add'>+#define MT753X_BPC			0x24</div><div class='add'>+#define  PAE_BPDU_FR			BIT(25)</div><div class='add'>+#define  PAE_EG_TAG_MASK		GENMASK(24, 22)</div><div class='add'>+#define  PAE_EG_TAG(x)			FIELD_PREP(PAE_EG_TAG_MASK, x)</div><div class='add'>+#define  PAE_PORT_FW_MASK		GENMASK(18, 16)</div><div class='add'>+#define  PAE_PORT_FW(x)			FIELD_PREP(PAE_PORT_FW_MASK, x)</div><div class='add'>+#define  BPDU_EG_TAG_MASK		GENMASK(8, 6)</div><div class='add'>+#define  BPDU_EG_TAG(x)			FIELD_PREP(BPDU_EG_TAG_MASK, x)</div><div class='add'>+#define  BPDU_PORT_FW_MASK		GENMASK(2, 0)</div><div class='add'>+</div><div class='add'>+/* Register for 01-80-C2-00-00-[01,02] MAC DA frame control */</div><div class='add'>+#define MT753X_RGAC1			0x28</div><div class='add'>+#define  R02_BPDU_FR			BIT(25)</div><div class='add'>+#define  R02_EG_TAG_MASK		GENMASK(24, 22)</div><div class='add'>+#define  R02_EG_TAG(x)			FIELD_PREP(R02_EG_TAG_MASK, x)</div><div class='add'>+#define  R02_PORT_FW_MASK		GENMASK(18, 16)</div><div class='add'>+#define  R02_PORT_FW(x)			FIELD_PREP(R02_PORT_FW_MASK, x)</div><div class='add'>+#define  R01_BPDU_FR			BIT(9)</div><div class='add'>+#define  R01_EG_TAG_MASK		GENMASK(8, 6)</div><div class='add'>+#define  R01_EG_TAG(x)			FIELD_PREP(R01_EG_TAG_MASK, x)</div><div class='add'>+#define  R01_PORT_FW_MASK		GENMASK(2, 0)</div><div class='add'>+</div><div class='add'>+/* Register for 01-80-C2-00-00-[03,0E] MAC DA frame control */</div><div class='add'>+#define MT753X_RGAC2			0x2c</div><div class='add'>+#define  R0E_BPDU_FR			BIT(25)</div><div class='add'>+#define  R0E_EG_TAG_MASK		GENMASK(24, 22)</div><div class='add'>+#define  R0E_EG_TAG(x)			FIELD_PREP(R0E_EG_TAG_MASK, x)</div><div class='add'>+#define  R0E_PORT_FW_MASK		GENMASK(18, 16)</div><div class='add'>+#define  R0E_PORT_FW(x)			FIELD_PREP(R0E_PORT_FW_MASK, x)</div><div class='add'>+#define  R03_BPDU_FR			BIT(9)</div><div class='add'>+#define  R03_EG_TAG_MASK		GENMASK(8, 6)</div><div class='add'>+#define  R03_EG_TAG(x)			FIELD_PREP(R03_EG_TAG_MASK, x)</div><div class='add'>+#define  R03_PORT_FW_MASK		GENMASK(2, 0)</div><div class='add'>+</div><div class='add'>+enum mt753x_to_cpu_fw {</div><div class='add'>+	TO_CPU_FW_SYSTEM_DEFAULT,</div><div class='add'>+	TO_CPU_FW_CPU_EXCLUDE = 4,</div><div class='add'>+	TO_CPU_FW_CPU_INCLUDE = 5,</div><div class='add'>+	TO_CPU_FW_CPU_ONLY = 6,</div><div class='add'>+	TO_CPU_FW_DROP = 7,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Registers for address table access */</div><div class='add'>+#define MT7530_ATA1			0x74</div><div class='add'>+#define  STATIC_EMP			0</div><div class='add'>+#define  STATIC_ENT			3</div><div class='add'>+#define MT7530_ATA2			0x78</div><div class='add'>+#define  ATA2_IVL			BIT(15)</div><div class='add'>+#define  ATA2_FID(x)			(((x) &amp; 0x7) &lt;&lt; 12)</div><div class='add'>+</div><div class='add'>+/* Register for address table write data */</div><div class='add'>+#define MT7530_ATWD			0x7c</div><div class='add'>+</div><div class='add'>+/* Register for address table control */</div><div class='add'>+#define MT7530_ATC			0x80</div><div class='add'>+#define  ATC_HASH			(((x) &amp; 0xfff) &lt;&lt; 16)</div><div class='add'>+#define  ATC_BUSY			BIT(15)</div><div class='add'>+#define  ATC_SRCH_END			BIT(14)</div><div class='add'>+#define  ATC_SRCH_HIT			BIT(13)</div><div class='add'>+#define  ATC_INVALID			BIT(12)</div><div class='add'>+#define  ATC_MAT(x)			(((x) &amp; 0xf) &lt;&lt; 8)</div><div class='add'>+#define  ATC_MAT_MACTAB			ATC_MAT(0)</div><div class='add'>+</div><div class='add'>+enum mt7530_fdb_cmd {</div><div class='add'>+	MT7530_FDB_READ	= 0,</div><div class='add'>+	MT7530_FDB_WRITE = 1,</div><div class='add'>+	MT7530_FDB_FLUSH = 2,</div><div class='add'>+	MT7530_FDB_START = 4,</div><div class='add'>+	MT7530_FDB_NEXT = 5,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Registers for table search read address */</div><div class='add'>+#define MT7530_TSRA1			0x84</div><div class='add'>+#define  MAC_BYTE_0			24</div><div class='add'>+#define  MAC_BYTE_1			16</div><div class='add'>+#define  MAC_BYTE_2			8</div><div class='add'>+#define  MAC_BYTE_3			0</div><div class='add'>+#define  MAC_BYTE_MASK			0xff</div><div class='add'>+</div><div class='add'>+#define MT7530_TSRA2			0x88</div><div class='add'>+#define  MAC_BYTE_4			24</div><div class='add'>+#define  MAC_BYTE_5			16</div><div class='add'>+#define  CVID				0</div><div class='add'>+#define  CVID_MASK			0xfff</div><div class='add'>+</div><div class='add'>+#define MT7530_ATRD			0x8C</div><div class='add'>+#define	 AGE_TIMER			24</div><div class='add'>+#define  AGE_TIMER_MASK			0xff</div><div class='add'>+#define  PORT_MAP			4</div><div class='add'>+#define  PORT_MAP_MASK			0xff</div><div class='add'>+#define  ENT_STATUS			2</div><div class='add'>+#define  ENT_STATUS_MASK		0x3</div><div class='add'>+</div><div class='add'>+/* Register for vlan table control */</div><div class='add'>+#define MT7530_VTCR			0x90</div><div class='add'>+#define  VTCR_BUSY			BIT(31)</div><div class='add'>+#define  VTCR_INVALID			BIT(16)</div><div class='add'>+#define  VTCR_FUNC(x)			(((x) &amp; 0xf) &lt;&lt; 12)</div><div class='add'>+#define  VTCR_VID			((x) &amp; 0xfff)</div><div class='add'>+</div><div class='add'>+enum mt7530_vlan_cmd {</div><div class='add'>+	/* Read/Write the specified VID entry from VAWD register based</div><div class='add'>+	 * on VID.</div><div class='add'>+	 */</div><div class='add'>+	MT7530_VTCR_RD_VID = 0,</div><div class='add'>+	MT7530_VTCR_WR_VID = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Register for setup vlan and acl write data */</div><div class='add'>+#define MT7530_VAWD1			0x94</div><div class='add'>+#define  PORT_STAG			BIT(31)</div><div class='add'>+/* Independent VLAN Learning */</div><div class='add'>+#define  IVL_MAC			BIT(30)</div><div class='add'>+/* Egress Tag Consistent */</div><div class='add'>+#define  EG_CON				BIT(29)</div><div class='add'>+/* Per VLAN Egress Tag Control */</div><div class='add'>+#define  VTAG_EN			BIT(28)</div><div class='add'>+/* VLAN Member Control */</div><div class='add'>+#define  PORT_MEM(x)			(((x) &amp; 0xff) &lt;&lt; 16)</div><div class='add'>+/* Filter ID */</div><div class='add'>+#define  FID(x)				(((x) &amp; 0x7) &lt;&lt; 1)</div><div class='add'>+/* VLAN Entry Valid */</div><div class='add'>+#define  VLAN_VALID			BIT(0)</div><div class='add'>+#define  PORT_MEM_SHFT			16</div><div class='add'>+#define  PORT_MEM_MASK			0xff</div><div class='add'>+</div><div class='add'>+enum mt7530_fid {</div><div class='add'>+	FID_STANDALONE = 0,</div><div class='add'>+	FID_BRIDGED = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define MT7530_VAWD2			0x98</div><div class='add'>+/* Egress Tag Control */</div><div class='add'>+#define  ETAG_CTRL_P(p, x)		(((x) &amp; 0x3) &lt;&lt; ((p) &lt;&lt; 1))</div><div class='add'>+#define  ETAG_CTRL_P_MASK(p)		ETAG_CTRL_P(p, 3)</div><div class='add'>+</div><div class='add'>+enum mt7530_vlan_egress_attr {</div><div class='add'>+	MT7530_VLAN_EGRESS_UNTAG = 0,</div><div class='add'>+	MT7530_VLAN_EGRESS_TAG = 2,</div><div class='add'>+	MT7530_VLAN_EGRESS_STACK = 3,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Register for address age control */</div><div class='add'>+#define MT7530_AAC			0xa0</div><div class='add'>+/* Disable ageing */</div><div class='add'>+#define  AGE_DIS			BIT(20)</div><div class='add'>+/* Age count */</div><div class='add'>+#define  AGE_CNT_MASK			GENMASK(19, 12)</div><div class='add'>+#define  AGE_CNT_MAX			0xff</div><div class='add'>+#define  AGE_CNT(x)			(AGE_CNT_MASK &amp; ((x) &lt;&lt; 12))</div><div class='add'>+/* Age unit */</div><div class='add'>+#define  AGE_UNIT_MASK			GENMASK(11, 0)</div><div class='add'>+#define  AGE_UNIT_MAX			0xfff</div><div class='add'>+#define  AGE_UNIT(x)			(AGE_UNIT_MASK &amp; (x))</div><div class='add'>+</div><div class='add'>+#define MT753X_ERLCR_P(x)		(0x1040 + ((x) * 0x100))</div><div class='add'>+#define  ERLCR_CIR_MASK			GENMASK(31, 16)</div><div class='add'>+#define  ERLCR_EN_MASK			BIT(15)</div><div class='add'>+#define  ERLCR_EXP_MASK			GENMASK(11, 8)</div><div class='add'>+#define  ERLCR_TBF_MODE_MASK		BIT(7)</div><div class='add'>+#define  ERLCR_MANT_MASK		GENMASK(6, 0)</div><div class='add'>+</div><div class='add'>+#define MT753X_GERLCR			0x10e0</div><div class='add'>+#define  EGR_BC_MASK			GENMASK(7, 0)</div><div class='add'>+#define  EGR_BC_CRC			0x4	/* crc */</div><div class='add'>+#define  EGR_BC_CRC_IPG_PREAMBLE	0x18	/* crc + ipg + preamble */</div><div class='add'>+</div><div class='add'>+/* Register for port STP state control */</div><div class='add'>+#define MT7530_SSP_P(x)			(0x2000 + ((x) * 0x100))</div><div class='add'>+#define  FID_PST(fid, state)		(((state) &amp; 0x3) &lt;&lt; ((fid) * 2))</div><div class='add'>+#define  FID_PST_MASK(fid)		FID_PST(fid, 0x3)</div><div class='add'>+</div><div class='add'>+enum mt7530_stp_state {</div><div class='add'>+	MT7530_STP_DISABLED = 0,</div><div class='add'>+	MT7530_STP_BLOCKING = 1,</div><div class='add'>+	MT7530_STP_LISTENING = 1,</div><div class='add'>+	MT7530_STP_LEARNING = 2,</div><div class='add'>+	MT7530_STP_FORWARDING  = 3</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Register for port control */</div><div class='add'>+#define MT7530_PCR_P(x)			(0x2004 + ((x) * 0x100))</div><div class='add'>+#define  PORT_TX_MIR			BIT(9)</div><div class='add'>+#define  PORT_RX_MIR			BIT(8)</div><div class='add'>+#define  PORT_VLAN(x)			((x) &amp; 0x3)</div><div class='add'>+</div><div class='add'>+enum mt7530_port_mode {</div><div class='add'>+	/* Port Matrix Mode: Frames are forwarded by the PCR_MATRIX members. */</div><div class='add'>+	MT7530_PORT_MATRIX_MODE = PORT_VLAN(0),</div><div class='add'>+</div><div class='add'>+	/* Fallback Mode: Forward received frames with ingress ports that do</div><div class='add'>+	 * not belong to the VLAN member. Frames whose VID is not listed on</div><div class='add'>+	 * the VLAN table are forwarded by the PCR_MATRIX members.</div><div class='add'>+	 */</div><div class='add'>+	MT7530_PORT_FALLBACK_MODE = PORT_VLAN(1),</div><div class='add'>+</div><div class='add'>+	/* Security Mode: Discard any frame due to ingress membership</div><div class='add'>+	 * violation or VID missed on the VLAN table.</div><div class='add'>+	 */</div><div class='add'>+	MT7530_PORT_SECURITY_MODE = PORT_VLAN(3),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define  PCR_MATRIX(x)			(((x) &amp; 0xff) &lt;&lt; 16)</div><div class='add'>+#define  PORT_PRI(x)			(((x) &amp; 0x7) &lt;&lt; 24)</div><div class='add'>+#define  EG_TAG(x)			(((x) &amp; 0x3) &lt;&lt; 28)</div><div class='add'>+#define  PCR_MATRIX_MASK		PCR_MATRIX(0xff)</div><div class='add'>+#define  PCR_MATRIX_CLR			PCR_MATRIX(0)</div><div class='add'>+#define  PCR_PORT_VLAN_MASK		PORT_VLAN(3)</div><div class='add'>+</div><div class='add'>+/* Register for port security control */</div><div class='add'>+#define MT7530_PSC_P(x)			(0x200c + ((x) * 0x100))</div><div class='add'>+#define  SA_DIS				BIT(4)</div><div class='add'>+</div><div class='add'>+/* Register for port vlan control */</div><div class='add'>+#define MT7530_PVC_P(x)			(0x2010 + ((x) * 0x100))</div><div class='add'>+#define  PORT_SPEC_TAG			BIT(5)</div><div class='add'>+#define  PVC_EG_TAG(x)			(((x) &amp; 0x7) &lt;&lt; 8)</div><div class='add'>+#define  PVC_EG_TAG_MASK		PVC_EG_TAG(7)</div><div class='add'>+#define  VLAN_ATTR(x)			(((x) &amp; 0x3) &lt;&lt; 6)</div><div class='add'>+#define  VLAN_ATTR_MASK			VLAN_ATTR(3)</div><div class='add'>+#define  ACC_FRM_MASK			GENMASK(1, 0)</div><div class='add'>+</div><div class='add'>+enum mt7530_vlan_port_eg_tag {</div><div class='add'>+	MT7530_VLAN_EG_DISABLED = 0,</div><div class='add'>+	MT7530_VLAN_EG_CONSISTENT = 1,</div><div class='add'>+	MT7530_VLAN_EG_UNTAGGED = 4,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum mt7530_vlan_port_attr {</div><div class='add'>+	MT7530_VLAN_USER = 0,</div><div class='add'>+	MT7530_VLAN_TRANSPARENT = 3,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum mt7530_vlan_port_acc_frm {</div><div class='add'>+	MT7530_VLAN_ACC_ALL = 0,</div><div class='add'>+	MT7530_VLAN_ACC_TAGGED = 1,</div><div class='add'>+	MT7530_VLAN_ACC_UNTAGGED = 2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define  STAG_VPID			(((x) &amp; 0xffff) &lt;&lt; 16)</div><div class='add'>+</div><div class='add'>+/* Register for port port-and-protocol based vlan 1 control */</div><div class='add'>+#define MT7530_PPBV1_P(x)		(0x2014 + ((x) * 0x100))</div><div class='add'>+#define  G0_PORT_VID(x)			(((x) &amp; 0xfff) &lt;&lt; 0)</div><div class='add'>+#define  G0_PORT_VID_MASK		G0_PORT_VID(0xfff)</div><div class='add'>+#define  G0_PORT_VID_DEF		G0_PORT_VID(0)</div><div class='add'>+</div><div class='add'>+/* Register for port MAC control register */</div><div class='add'>+#define MT753X_PMCR_P(x)		(0x3000 + ((x) * 0x100))</div><div class='add'>+#define  PMCR_IFG_XMIT_MASK		GENMASK(19, 18)</div><div class='add'>+#define  PMCR_IFG_XMIT(x)		FIELD_PREP(PMCR_IFG_XMIT_MASK, x)</div><div class='add'>+#define  PMCR_EXT_PHY			BIT(17)</div><div class='add'>+#define  PMCR_MAC_MODE			BIT(16)</div><div class='add'>+#define  MT7530_FORCE_MODE		BIT(15)</div><div class='add'>+#define  PMCR_MAC_TX_EN			BIT(14)</div><div class='add'>+#define  PMCR_MAC_RX_EN			BIT(13)</div><div class='add'>+#define  PMCR_BACKOFF_EN		BIT(9)</div><div class='add'>+#define  PMCR_BACKPR_EN			BIT(8)</div><div class='add'>+#define  PMCR_FORCE_EEE1G		BIT(7)</div><div class='add'>+#define  PMCR_FORCE_EEE100		BIT(6)</div><div class='add'>+#define  PMCR_FORCE_RX_FC_EN		BIT(5)</div><div class='add'>+#define  PMCR_FORCE_TX_FC_EN		BIT(4)</div><div class='add'>+#define  PMCR_FORCE_SPEED_1000		BIT(3)</div><div class='add'>+#define  PMCR_FORCE_SPEED_100		BIT(2)</div><div class='add'>+#define  PMCR_FORCE_FDX			BIT(1)</div><div class='add'>+#define  PMCR_FORCE_LNK			BIT(0)</div><div class='add'>+#define  MT7531_FORCE_MODE_LNK		BIT(31)</div><div class='add'>+#define  MT7531_FORCE_MODE_SPD		BIT(30)</div><div class='add'>+#define  MT7531_FORCE_MODE_DPX		BIT(29)</div><div class='add'>+#define  MT7531_FORCE_MODE_RX_FC	BIT(28)</div><div class='add'>+#define  MT7531_FORCE_MODE_TX_FC	BIT(27)</div><div class='add'>+#define  MT7531_FORCE_MODE_EEE100	BIT(26)</div><div class='add'>+#define  MT7531_FORCE_MODE_EEE1G	BIT(25)</div><div class='add'>+#define  MT7531_FORCE_MODE_MASK		(MT7531_FORCE_MODE_LNK | \</div><div class='add'>+					 MT7531_FORCE_MODE_SPD | \</div><div class='add'>+					 MT7531_FORCE_MODE_DPX | \</div><div class='add'>+					 MT7531_FORCE_MODE_RX_FC | \</div><div class='add'>+					 MT7531_FORCE_MODE_TX_FC | \</div><div class='add'>+					 MT7531_FORCE_MODE_EEE100 | \</div><div class='add'>+					 MT7531_FORCE_MODE_EEE1G)</div><div class='add'>+#define  MT753X_FORCE_MODE(id)		((id == ID_MT7531 || \</div><div class='add'>+					  id == ID_MT7988) ? \</div><div class='add'>+					 MT7531_FORCE_MODE_MASK : \</div><div class='add'>+					 MT7530_FORCE_MODE)</div><div class='add'>+#define  PMCR_LINK_SETTINGS_MASK	(PMCR_MAC_TX_EN | PMCR_MAC_RX_EN | \</div><div class='add'>+					 PMCR_FORCE_EEE1G | \</div><div class='add'>+					 PMCR_FORCE_EEE100 | \</div><div class='add'>+					 PMCR_FORCE_RX_FC_EN | \</div><div class='add'>+					 PMCR_FORCE_TX_FC_EN | \</div><div class='add'>+					 PMCR_FORCE_SPEED_1000 | \</div><div class='add'>+					 PMCR_FORCE_SPEED_100 | \</div><div class='add'>+					 PMCR_FORCE_FDX | PMCR_FORCE_LNK)</div><div class='add'>+</div><div class='add'>+#define MT753X_PMEEECR_P(x)		(0x3004 + (x) * 0x100)</div><div class='add'>+#define  WAKEUP_TIME_1000_MASK		GENMASK(31, 24)</div><div class='add'>+#define  WAKEUP_TIME_1000(x)		FIELD_PREP(WAKEUP_TIME_1000_MASK, x)</div><div class='add'>+#define  WAKEUP_TIME_100_MASK		GENMASK(23, 16)</div><div class='add'>+#define  WAKEUP_TIME_100(x)		FIELD_PREP(WAKEUP_TIME_100_MASK, x)</div><div class='add'>+#define  LPI_THRESH_MASK		GENMASK(15, 4)</div><div class='add'>+#define  LPI_THRESH_GET(x)		FIELD_GET(LPI_THRESH_MASK, x)</div><div class='add'>+#define  LPI_THRESH_SET(x)		FIELD_PREP(LPI_THRESH_MASK, x)</div><div class='add'>+#define  LPI_MODE_EN			BIT(0)</div><div class='add'>+</div><div class='add'>+#define MT7530_PMSR_P(x)		(0x3008 + (x) * 0x100)</div><div class='add'>+#define  PMSR_EEE1G			BIT(7)</div><div class='add'>+#define  PMSR_EEE100M			BIT(6)</div><div class='add'>+#define  PMSR_RX_FC			BIT(5)</div><div class='add'>+#define  PMSR_TX_FC			BIT(4)</div><div class='add'>+#define  PMSR_SPEED_1000		BIT(3)</div><div class='add'>+#define  PMSR_SPEED_100			BIT(2)</div><div class='add'>+#define  PMSR_SPEED_10			0x00</div><div class='add'>+#define  PMSR_SPEED_MASK		(PMSR_SPEED_100 | PMSR_SPEED_1000)</div><div class='add'>+#define  PMSR_DPX			BIT(1)</div><div class='add'>+#define  PMSR_LINK			BIT(0)</div><div class='add'>+</div><div class='add'>+/* Register for port debug count */</div><div class='add'>+#define MT7531_DBG_CNT(x)		(0x3018 + (x) * 0x100)</div><div class='add'>+#define  MT7531_DIS_CLR			BIT(31)</div><div class='add'>+</div><div class='add'>+#define MT7530_GMACCR			0x30e0</div><div class='add'>+#define  MAX_RX_JUMBO(x)		((x) &lt;&lt; 2)</div><div class='add'>+#define  MAX_RX_JUMBO_MASK		GENMASK(5, 2)</div><div class='add'>+#define  MAX_RX_PKT_LEN_MASK		GENMASK(1, 0)</div><div class='add'>+#define  MAX_RX_PKT_LEN_1522		0x0</div><div class='add'>+#define  MAX_RX_PKT_LEN_1536		0x1</div><div class='add'>+#define  MAX_RX_PKT_LEN_1552		0x2</div><div class='add'>+#define  MAX_RX_PKT_LEN_JUMBO		0x3</div><div class='add'>+</div><div class='add'>+/* Register for MIB */</div><div class='add'>+#define MT7530_PORT_MIB_COUNTER(x)	(0x4000 + (x) * 0x100)</div><div class='add'>+/* Each define is an offset of MT7530_PORT_MIB_COUNTER */</div><div class='add'>+#define   MT7530_PORT_MIB_TX_DROP	0x00</div><div class='add'>+#define   MT7530_PORT_MIB_TX_CRC_ERR	0x04</div><div class='add'>+#define   MT7530_PORT_MIB_TX_UNICAST	0x08</div><div class='add'>+#define   MT7530_PORT_MIB_TX_MULTICAST	0x0c</div><div class='add'>+#define   MT7530_PORT_MIB_TX_BROADCAST	0x10</div><div class='add'>+#define   MT7530_PORT_MIB_TX_COLLISION	0x14</div><div class='add'>+#define   MT7530_PORT_MIB_TX_SINGLE_COLLISION 0x18</div><div class='add'>+#define   MT7530_PORT_MIB_TX_MULTIPLE_COLLISION 0x1c</div><div class='add'>+#define   MT7530_PORT_MIB_TX_DEFERRED	0x20</div><div class='add'>+#define   MT7530_PORT_MIB_TX_LATE_COLLISION 0x24</div><div class='add'>+#define   MT7530_PORT_MIB_TX_EXCESSIVE_COLLISION 0x28</div><div class='add'>+#define   MT7530_PORT_MIB_TX_PAUSE	0x2c</div><div class='add'>+#define   MT7530_PORT_MIB_TX_PKT_SZ_64	0x30</div><div class='add'>+#define   MT7530_PORT_MIB_TX_PKT_SZ_65_TO_127 0x34</div><div class='add'>+#define   MT7530_PORT_MIB_TX_PKT_SZ_128_TO_255 0x38</div><div class='add'>+#define   MT7530_PORT_MIB_TX_PKT_SZ_256_TO_511 0x3c</div><div class='add'>+#define   MT7530_PORT_MIB_TX_PKT_SZ_512_TO_1023 0x40</div><div class='add'>+#define   MT7530_PORT_MIB_TX_PKT_SZ_1024_TO_MAX 0x44</div><div class='add'>+#define   MT7530_PORT_MIB_TX_BYTES	0x48 /* 64 bytes */</div><div class='add'>+#define   MT7530_PORT_MIB_RX_DROP	0x60</div><div class='add'>+#define   MT7530_PORT_MIB_RX_FILTERING	0x64</div><div class='add'>+#define   MT7530_PORT_MIB_RX_UNICAST	0x68</div><div class='add'>+#define   MT7530_PORT_MIB_RX_MULTICAST	0x6c</div><div class='add'>+#define   MT7530_PORT_MIB_RX_BROADCAST	0x70</div><div class='add'>+#define   MT7530_PORT_MIB_RX_ALIGN_ERR	0x74</div><div class='add'>+#define   MT7530_PORT_MIB_RX_CRC_ERR	0x78</div><div class='add'>+#define   MT7530_PORT_MIB_RX_UNDER_SIZE_ERR 0x7c</div><div class='add'>+#define   MT7530_PORT_MIB_RX_FRAG_ERR	0x80</div><div class='add'>+#define   MT7530_PORT_MIB_RX_OVER_SZ_ERR 0x84</div><div class='add'>+#define   MT7530_PORT_MIB_RX_JABBER_ERR	0x88</div><div class='add'>+#define   MT7530_PORT_MIB_RX_PAUSE	0x8c</div><div class='add'>+#define   MT7530_PORT_MIB_RX_PKT_SZ_64	0x90</div><div class='add'>+#define   MT7530_PORT_MIB_RX_PKT_SZ_65_TO_127 0x94</div><div class='add'>+#define   MT7530_PORT_MIB_RX_PKT_SZ_128_TO_255 0x98</div><div class='add'>+#define   MT7530_PORT_MIB_RX_PKT_SZ_256_TO_511 0x9c</div><div class='add'>+#define   MT7530_PORT_MIB_RX_PKT_SZ_512_TO_1023 0xa0</div><div class='add'>+#define   MT7530_PORT_MIB_RX_PKT_SZ_1024_TO_MAX 0xa4</div><div class='add'>+#define   MT7530_PORT_MIB_RX_BYTES	0xa8 /* 64 bytes */</div><div class='add'>+#define   MT7530_PORT_MIB_RX_CTRL_DROP	0xb0</div><div class='add'>+#define   MT7530_PORT_MIB_RX_INGRESS_DROP 0xb4</div><div class='add'>+#define   MT7530_PORT_MIB_RX_ARL_DROP	0xb8</div><div class='add'>+#define MT7530_MIB_CCR			0x4fe0</div><div class='add'>+#define  CCR_MIB_ENABLE			BIT(31)</div><div class='add'>+#define  CCR_RX_OCT_CNT_GOOD		BIT(7)</div><div class='add'>+#define  CCR_RX_OCT_CNT_BAD		BIT(6)</div><div class='add'>+#define  CCR_TX_OCT_CNT_GOOD		BIT(5)</div><div class='add'>+#define  CCR_TX_OCT_CNT_BAD		BIT(4)</div><div class='add'>+#define  CCR_MIB_FLUSH			(CCR_RX_OCT_CNT_GOOD | \</div><div class='add'>+					 CCR_RX_OCT_CNT_BAD | \</div><div class='add'>+					 CCR_TX_OCT_CNT_GOOD | \</div><div class='add'>+					 CCR_TX_OCT_CNT_BAD)</div><div class='add'>+#define  CCR_MIB_ACTIVATE		(CCR_MIB_ENABLE | \</div><div class='add'>+					 CCR_RX_OCT_CNT_GOOD | \</div><div class='add'>+					 CCR_RX_OCT_CNT_BAD | \</div><div class='add'>+					 CCR_TX_OCT_CNT_GOOD | \</div><div class='add'>+					 CCR_TX_OCT_CNT_BAD)</div><div class='add'>+</div><div class='add'>+/* MT7531 SGMII register group */</div><div class='add'>+#define MT7531_SGMII_REG_BASE(p)	(0x5000 + ((p) - 5) * 0x1000)</div><div class='add'>+#define MT7531_PHYA_CTRL_SIGNAL3	0x128</div><div class='add'>+</div><div class='add'>+/* Register for system reset */</div><div class='add'>+#define MT7530_SYS_CTRL			0x7000</div><div class='add'>+#define  SYS_CTRL_PHY_RST		BIT(2)</div><div class='add'>+#define  SYS_CTRL_SW_RST		BIT(1)</div><div class='add'>+#define  SYS_CTRL_REG_RST		BIT(0)</div><div class='add'>+</div><div class='add'>+/* Register for system interrupt */</div><div class='add'>+#define MT7530_SYS_INT_EN		0x7008</div><div class='add'>+</div><div class='add'>+/* Register for system interrupt status */</div><div class='add'>+#define MT7530_SYS_INT_STS		0x700c</div><div class='add'>+</div><div class='add'>+/* Register for PHY Indirect Access Control */</div><div class='add'>+#define MT7531_PHY_IAC			0x701C</div><div class='add'>+#define  MT7531_PHY_ACS_ST		BIT(31)</div><div class='add'>+#define  MT7531_MDIO_REG_ADDR_MASK	(0x1f &lt;&lt; 25)</div><div class='add'>+#define  MT7531_MDIO_PHY_ADDR_MASK	(0x1f &lt;&lt; 20)</div><div class='add'>+#define  MT7531_MDIO_CMD_MASK		(0x3 &lt;&lt; 18)</div><div class='add'>+#define  MT7531_MDIO_ST_MASK		(0x3 &lt;&lt; 16)</div><div class='add'>+#define  MT7531_MDIO_RW_DATA_MASK	(0xffff)</div><div class='add'>+#define  MT7531_MDIO_REG_ADDR(x)	(((x) &amp; 0x1f) &lt;&lt; 25)</div><div class='add'>+#define  MT7531_MDIO_DEV_ADDR(x)	(((x) &amp; 0x1f) &lt;&lt; 25)</div><div class='add'>+#define  MT7531_MDIO_PHY_ADDR(x)	(((x) &amp; 0x1f) &lt;&lt; 20)</div><div class='add'>+#define  MT7531_MDIO_CMD(x)		(((x) &amp; 0x3) &lt;&lt; 18)</div><div class='add'>+#define  MT7531_MDIO_ST(x)		(((x) &amp; 0x3) &lt;&lt; 16)</div><div class='add'>+</div><div class='add'>+enum mt7531_phy_iac_cmd {</div><div class='add'>+	MT7531_MDIO_ADDR = 0,</div><div class='add'>+	MT7531_MDIO_WRITE = 1,</div><div class='add'>+	MT7531_MDIO_READ = 2,</div><div class='add'>+	MT7531_MDIO_READ_CL45 = 3,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* MDIO_ST: MDIO start field */</div><div class='add'>+enum mt7531_mdio_st {</div><div class='add'>+	MT7531_MDIO_ST_CL45 = 0,</div><div class='add'>+	MT7531_MDIO_ST_CL22 = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define  MT7531_MDIO_CL22_READ		(MT7531_MDIO_ST(MT7531_MDIO_ST_CL22) | \</div><div class='add'>+					 MT7531_MDIO_CMD(MT7531_MDIO_READ))</div><div class='add'>+#define  MT7531_MDIO_CL22_WRITE		(MT7531_MDIO_ST(MT7531_MDIO_ST_CL22) | \</div><div class='add'>+					 MT7531_MDIO_CMD(MT7531_MDIO_WRITE))</div><div class='add'>+#define  MT7531_MDIO_CL45_ADDR		(MT7531_MDIO_ST(MT7531_MDIO_ST_CL45) | \</div><div class='add'>+					 MT7531_MDIO_CMD(MT7531_MDIO_ADDR))</div><div class='add'>+#define  MT7531_MDIO_CL45_READ		(MT7531_MDIO_ST(MT7531_MDIO_ST_CL45) | \</div><div class='add'>+					 MT7531_MDIO_CMD(MT7531_MDIO_READ))</div><div class='add'>+#define  MT7531_MDIO_CL45_WRITE		(MT7531_MDIO_ST(MT7531_MDIO_ST_CL45) | \</div><div class='add'>+					 MT7531_MDIO_CMD(MT7531_MDIO_WRITE))</div><div class='add'>+</div><div class='add'>+/* Register for RGMII clock phase */</div><div class='add'>+#define MT7531_CLKGEN_CTRL		0x7500</div><div class='add'>+#define  CLK_SKEW_OUT(x)		(((x) &amp; 0x3) &lt;&lt; 8)</div><div class='add'>+#define  CLK_SKEW_OUT_MASK		GENMASK(9, 8)</div><div class='add'>+#define  CLK_SKEW_IN(x)			(((x) &amp; 0x3) &lt;&lt; 6)</div><div class='add'>+#define  CLK_SKEW_IN_MASK		GENMASK(7, 6)</div><div class='add'>+#define  RXCLK_NO_DELAY			BIT(5)</div><div class='add'>+#define  TXCLK_NO_REVERSE		BIT(4)</div><div class='add'>+#define  GP_MODE(x)			(((x) &amp; 0x3) &lt;&lt; 1)</div><div class='add'>+#define  GP_MODE_MASK			GENMASK(2, 1)</div><div class='add'>+#define  GP_CLK_EN			BIT(0)</div><div class='add'>+</div><div class='add'>+enum mt7531_gp_mode {</div><div class='add'>+	MT7531_GP_MODE_RGMII = 0,</div><div class='add'>+	MT7531_GP_MODE_MII = 1,</div><div class='add'>+	MT7531_GP_MODE_REV_MII = 2</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum mt7531_clk_skew {</div><div class='add'>+	MT7531_CLK_SKEW_NO_CHG = 0,</div><div class='add'>+	MT7531_CLK_SKEW_DLY_100PPS = 1,</div><div class='add'>+	MT7531_CLK_SKEW_DLY_200PPS = 2,</div><div class='add'>+	MT7531_CLK_SKEW_REVERSE = 3,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Register for trap status */</div><div class='add'>+#define MT753X_TRAP			0x7800</div><div class='add'>+#define  MT7530_XTAL_MASK		(BIT(10) | BIT(9))</div><div class='add'>+#define  MT7530_XTAL_25MHZ		(BIT(10) | BIT(9))</div><div class='add'>+#define  MT7530_XTAL_40MHZ		BIT(10)</div><div class='add'>+#define  MT7530_XTAL_20MHZ		BIT(9)</div><div class='add'>+#define  MT7531_XTAL25			BIT(7)</div><div class='add'>+</div><div class='add'>+/* Register for trap modification */</div><div class='add'>+#define MT753X_MTRAP			0x7804</div><div class='add'>+#define  MT7530_P5_PHY0_SEL		BIT(20)</div><div class='add'>+#define  MT7530_CHG_TRAP		BIT(16)</div><div class='add'>+#define  MT7530_P5_MAC_SEL		BIT(13)</div><div class='add'>+#define  MT7530_P6_DIS			BIT(8)</div><div class='add'>+#define  MT7530_P5_RGMII_MODE		BIT(7)</div><div class='add'>+#define  MT7530_P5_DIS			BIT(6)</div><div class='add'>+#define  MT7530_PHY_INDIRECT_ACCESS	BIT(5)</div><div class='add'>+#define  MT7531_CHG_STRAP		BIT(8)</div><div class='add'>+#define  MT7531_PHY_EN			BIT(6)</div><div class='add'>+</div><div class='add'>+enum mt7531_xtal_fsel {</div><div class='add'>+	MT7531_XTAL_FSEL_25MHZ,</div><div class='add'>+	MT7531_XTAL_FSEL_40MHZ,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Register for TOP signal control */</div><div class='add'>+#define MT7530_TOP_SIG_CTRL		0x7808</div><div class='add'>+#define  TOP_SIG_CTRL_NORMAL		(BIT(17) | BIT(16))</div><div class='add'>+</div><div class='add'>+#define MT7531_TOP_SIG_SR		0x780c</div><div class='add'>+#define  PAD_DUAL_SGMII_EN		BIT(1)</div><div class='add'>+#define  PAD_MCM_SMI_EN			BIT(0)</div><div class='add'>+</div><div class='add'>+#define MT7530_IO_DRV_CR		0x7810</div><div class='add'>+#define  P5_IO_CLK_DRV(x)		((x) &amp; 0x3)</div><div class='add'>+#define  P5_IO_DATA_DRV(x)		(((x) &amp; 0x3) &lt;&lt; 4)</div><div class='add'>+</div><div class='add'>+#define MT7531_CHIP_REV			0x781C</div><div class='add'>+</div><div class='add'>+#define MT7531_PLLGP_EN			0x7820</div><div class='add'>+#define  EN_COREPLL			BIT(2)</div><div class='add'>+#define  SW_CLKSW			BIT(1)</div><div class='add'>+#define  SW_PLLGP			BIT(0)</div><div class='add'>+</div><div class='add'>+#define MT7530_P6ECR			0x7830</div><div class='add'>+#define  P6_INTF_MODE_MASK		0x3</div><div class='add'>+#define  P6_INTF_MODE(x)		((x) &amp; 0x3)</div><div class='add'>+</div><div class='add'>+#define MT7531_PLLGP_CR0		0x78a8</div><div class='add'>+#define  RG_COREPLL_EN			BIT(22)</div><div class='add'>+#define  RG_COREPLL_POSDIV_S		23</div><div class='add'>+#define  RG_COREPLL_POSDIV_M		0x3800000</div><div class='add'>+#define  RG_COREPLL_SDM_PCW_S		1</div><div class='add'>+#define  RG_COREPLL_SDM_PCW_M		0x3ffffe</div><div class='add'>+#define  RG_COREPLL_SDM_PCW_CHG		BIT(0)</div><div class='add'>+</div><div class='add'>+/* Registers for RGMII and SGMII PLL clock */</div><div class='add'>+#define MT7531_ANA_PLLGP_CR2		0x78b0</div><div class='add'>+#define MT7531_ANA_PLLGP_CR5		0x78bc</div><div class='add'>+</div><div class='add'>+/* Registers for TRGMII on the both side */</div><div class='add'>+#define MT7530_TRGMII_RCK_CTRL		0x7a00</div><div class='add'>+#define  RX_RST				BIT(31)</div><div class='add'>+#define  RXC_DQSISEL			BIT(30)</div><div class='add'>+#define  DQSI1_TAP_MASK			(0x7f &lt;&lt; 8)</div><div class='add'>+#define  DQSI0_TAP_MASK			0x7f</div><div class='add'>+#define  DQSI1_TAP(x)			(((x) &amp; 0x7f) &lt;&lt; 8)</div><div class='add'>+#define  DQSI0_TAP(x)			((x) &amp; 0x7f)</div><div class='add'>+</div><div class='add'>+#define MT7530_TRGMII_RCK_RTT		0x7a04</div><div class='add'>+#define  DQS1_GATE			BIT(31)</div><div class='add'>+#define  DQS0_GATE			BIT(30)</div><div class='add'>+</div><div class='add'>+#define MT7530_TRGMII_RD(x)		(0x7a10 + (x) * 8)</div><div class='add'>+#define  BSLIP_EN			BIT(31)</div><div class='add'>+#define  EDGE_CHK			BIT(30)</div><div class='add'>+#define  RD_TAP_MASK			0x7f</div><div class='add'>+#define  RD_TAP(x)			((x) &amp; 0x7f)</div><div class='add'>+</div><div class='add'>+#define MT7530_TRGMII_TXCTRL		0x7a40</div><div class='add'>+#define  TRAIN_TXEN			BIT(31)</div><div class='add'>+#define  TXC_INV			BIT(30)</div><div class='add'>+#define  TX_RST				BIT(28)</div><div class='add'>+</div><div class='add'>+#define MT7530_TRGMII_TD_ODT(i)		(0x7a54 + 8 * (i))</div><div class='add'>+#define  TD_DM_DRVP(x)			((x) &amp; 0xf)</div><div class='add'>+#define  TD_DM_DRVN(x)			(((x) &amp; 0xf) &lt;&lt; 4)</div><div class='add'>+</div><div class='add'>+#define MT7530_TRGMII_TCK_CTRL		0x7a78</div><div class='add'>+#define  TCK_TAP(x)			(((x) &amp; 0xf) &lt;&lt; 8)</div><div class='add'>+</div><div class='add'>+#define MT7530_P5RGMIIRXCR		0x7b00</div><div class='add'>+#define  CSR_RGMII_EDGE_ALIGN		BIT(8)</div><div class='add'>+#define  CSR_RGMII_RXC_0DEG_CFG(x)	((x) &amp; 0xf)</div><div class='add'>+</div><div class='add'>+#define MT7530_P5RGMIITXCR		0x7b04</div><div class='add'>+#define  CSR_RGMII_TXC_CFG(x)		((x) &amp; 0x1f)</div><div class='add'>+</div><div class='add'>+/* Registers for GPIO mode */</div><div class='add'>+#define MT7531_GPIO_MODE0		0x7c0c</div><div class='add'>+#define  MT7531_GPIO0_MASK		GENMASK(3, 0)</div><div class='add'>+#define  MT7531_GPIO0_INTERRUPT		1</div><div class='add'>+</div><div class='add'>+#define MT7531_GPIO_MODE1		0x7c10</div><div class='add'>+#define  MT7531_GPIO11_RG_RXD2_MASK	GENMASK(15, 12)</div><div class='add'>+#define  MT7531_EXT_P_MDC_11		(2 &lt;&lt; 12)</div><div class='add'>+#define  MT7531_GPIO12_RG_RXD3_MASK	GENMASK(19, 16)</div><div class='add'>+#define  MT7531_EXT_P_MDIO_12		(2 &lt;&lt; 16)</div><div class='add'>+</div><div class='add'>+#define MT753X_CPORT_SPTAG_CFG		0x7c10</div><div class='add'>+#define  CPORT_SW2FE_STAG_EN		BIT(1)</div><div class='add'>+#define  CPORT_FE2SW_STAG_EN		BIT(0)</div><div class='add'>+</div><div class='add'>+#define AN7583_GEPHY_CONN_CFG		0x7c14</div><div class='add'>+#define  AN7583_CSR_DPHY_CKIN_SEL	BIT(31)</div><div class='add'>+#define  AN7583_CSR_PHY_CORE_REG_CLK_SEL BIT(30)</div><div class='add'>+#define  AN7583_CSR_ETHER_AFE_PWD	GENMASK(28, 24)</div><div class='add'>+</div><div class='add'>+/* Registers for LED GPIO control (MT7530 only)</div><div class='add'>+ * All registers follow this pattern:</div><div class='add'>+ * [ 2: 0]  port 0</div><div class='add'>+ * [ 6: 4]  port 1</div><div class='add'>+ * [10: 8]  port 2</div><div class='add'>+ * [14:12]  port 3</div><div class='add'>+ * [18:16]  port 4</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* LED enable, 0: Disable, 1: Enable (Default) */</div><div class='add'>+#define MT7530_LED_EN			0x7d00</div><div class='add'>+/* LED mode, 0: GPIO mode, 1: PHY mode (Default) */</div><div class='add'>+#define MT7530_LED_IO_MODE		0x7d04</div><div class='add'>+/* GPIO direction, 0: Input, 1: Output */</div><div class='add'>+#define MT7530_LED_GPIO_DIR		0x7d10</div><div class='add'>+/* GPIO output enable, 0: Disable, 1: Enable */</div><div class='add'>+#define MT7530_LED_GPIO_OE		0x7d14</div><div class='add'>+/* GPIO value, 0: Low, 1: High */</div><div class='add'>+#define MT7530_LED_GPIO_DATA		0x7d18</div><div class='add'>+</div><div class='add'>+#define MT7530_CREV			0x7ffc</div><div class='add'>+#define  CHIP_NAME_SHIFT		16</div><div class='add'>+#define  MT7530_ID			0x7530</div><div class='add'>+</div><div class='add'>+#define MT7531_CREV			0x781C</div><div class='add'>+#define  CHIP_REV_M			0x0f</div><div class='add'>+#define  MT7531_ID			0x7531</div><div class='add'>+</div><div class='add'>+/* Registers for core PLL access through mmd indirect */</div><div class='add'>+#define CORE_PLL_GROUP2			0x401</div><div class='add'>+#define  RG_SYSPLL_EN_NORMAL		BIT(15)</div><div class='add'>+#define  RG_SYSPLL_VODEN		BIT(14)</div><div class='add'>+#define  RG_SYSPLL_LF			BIT(13)</div><div class='add'>+#define  RG_SYSPLL_RST_DLY(x)		(((x) &amp; 0x3) &lt;&lt; 12)</div><div class='add'>+#define  RG_SYSPLL_LVROD_EN		BIT(10)</div><div class='add'>+#define  RG_SYSPLL_PREDIV(x)		(((x) &amp; 0x3) &lt;&lt; 8)</div><div class='add'>+#define  RG_SYSPLL_POSDIV(x)		(((x) &amp; 0x3) &lt;&lt; 5)</div><div class='add'>+#define  RG_SYSPLL_FBKSEL		BIT(4)</div><div class='add'>+#define  RT_SYSPLL_EN_AFE_OLT		BIT(0)</div><div class='add'>+</div><div class='add'>+#define CORE_PLL_GROUP4			0x403</div><div class='add'>+#define  RG_SYSPLL_DDSFBK_EN		BIT(12)</div><div class='add'>+#define  RG_SYSPLL_BIAS_EN		BIT(11)</div><div class='add'>+#define  RG_SYSPLL_BIAS_LPF_EN		BIT(10)</div><div class='add'>+#define  MT7531_RG_SYSPLL_DMY2		BIT(6)</div><div class='add'>+#define  MT7531_PHY_PLL_OFF		BIT(5)</div><div class='add'>+#define  MT7531_PHY_PLL_BYPASS_MODE	BIT(4)</div><div class='add'>+</div><div class='add'>+#define MT753X_CTRL_PHY_ADDR(addr)	((addr + 1) &amp; 0x1f)</div><div class='add'>+</div><div class='add'>+#define CORE_PLL_GROUP5			0x404</div><div class='add'>+#define  RG_LCDDS_PCW_NCPO1(x)		((x) &amp; 0xffff)</div><div class='add'>+</div><div class='add'>+#define CORE_PLL_GROUP6			0x405</div><div class='add'>+#define  RG_LCDDS_PCW_NCPO0(x)		((x) &amp; 0xffff)</div><div class='add'>+</div><div class='add'>+#define CORE_PLL_GROUP7			0x406</div><div class='add'>+#define  RG_LCDDS_PWDB			BIT(15)</div><div class='add'>+#define  RG_LCDDS_ISO_EN		BIT(13)</div><div class='add'>+#define  RG_LCCDS_C(x)			(((x) &amp; 0x7) &lt;&lt; 4)</div><div class='add'>+#define  RG_LCDDS_PCW_NCPO_CHG		BIT(3)</div><div class='add'>+</div><div class='add'>+#define CORE_PLL_GROUP10		0x409</div><div class='add'>+#define  RG_LCDDS_SSC_DELTA(x)		((x) &amp; 0xfff)</div><div class='add'>+</div><div class='add'>+#define CORE_PLL_GROUP11		0x40a</div><div class='add'>+#define  RG_LCDDS_SSC_DELTA1(x)		((x) &amp; 0xfff)</div><div class='add'>+</div><div class='add'>+#define CORE_GSWPLL_GRP1		0x40d</div><div class='add'>+#define  RG_GSWPLL_PREDIV(x)		(((x) &amp; 0x3) &lt;&lt; 14)</div><div class='add'>+#define  RG_GSWPLL_POSDIV_200M(x)	(((x) &amp; 0x3) &lt;&lt; 12)</div><div class='add'>+#define  RG_GSWPLL_EN_PRE		BIT(11)</div><div class='add'>+#define  RG_GSWPLL_FBKSEL		BIT(10)</div><div class='add'>+#define  RG_GSWPLL_BP			BIT(9)</div><div class='add'>+#define  RG_GSWPLL_BR			BIT(8)</div><div class='add'>+#define  RG_GSWPLL_FBKDIV_200M(x)	((x) &amp; 0xff)</div><div class='add'>+</div><div class='add'>+#define CORE_GSWPLL_GRP2		0x40e</div><div class='add'>+#define  RG_GSWPLL_POSDIV_500M(x)	(((x) &amp; 0x3) &lt;&lt; 8)</div><div class='add'>+#define  RG_GSWPLL_FBKDIV_500M(x)	((x) &amp; 0xff)</div><div class='add'>+</div><div class='add'>+#define CORE_TRGMII_GSW_CLK_CG		0x410</div><div class='add'>+#define  REG_GSWCK_EN			BIT(0)</div><div class='add'>+#define  REG_TRGMIICK_EN		BIT(1)</div><div class='add'>+</div><div class='add'>+#define MIB_DESC(_s, _o, _n)	\</div><div class='add'>+	{			\</div><div class='add'>+		.size = (_s),	\</div><div class='add'>+		.offset = (_o),	\</div><div class='add'>+		.name = (_n),	\</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+struct mt7530_mib_desc {</div><div class='add'>+	unsigned int size;</div><div class='add'>+	unsigned int offset;</div><div class='add'>+	const char *name;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mt7530_fdb {</div><div class='add'>+	u16 vid;</div><div class='add'>+	u8 port_mask;</div><div class='add'>+	u8 aging;</div><div class='add'>+	u8 mac[6];</div><div class='add'>+	bool noarp;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* struct mt7530_port -	This is the main data structure for holding the state</div><div class='add'>+ *			of the port.</div><div class='add'>+ * @enable:	The status used for show port is enabled or not.</div><div class='add'>+ * @pm:		The matrix used to show all connections with the port.</div><div class='add'>+ * @pvid:	The VLAN specified is to be considered a PVID at ingress.  Any</div><div class='add'>+ *		untagged frames will be assigned to the related VLAN.</div><div class='add'>+ * @sgmii_pcs:	Pointer to PCS instance for SerDes ports</div><div class='add'>+ */</div><div class='add'>+struct mt7530_port {</div><div class='add'>+	bool enable;</div><div class='add'>+	bool isolated;</div><div class='add'>+	u32 pm;</div><div class='add'>+	u16 pvid;</div><div class='add'>+	struct phylink_pcs *sgmii_pcs;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Port 5 mode definitions of the MT7530 switch */</div><div class='add'>+enum mt7530_p5_mode {</div><div class='add'>+	GMAC5,</div><div class='add'>+	MUX_PHY_P0,</div><div class='add'>+	MUX_PHY_P4,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mt7530_priv;</div><div class='add'>+</div><div class='add'>+struct mt753x_pcs {</div><div class='add'>+	struct phylink_pcs pcs;</div><div class='add'>+	struct mt7530_priv *priv;</div><div class='add'>+	int port;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* struct mt753x_info -	This is the main data structure for holding the specific</div><div class='add'>+ *			part for each supported device</div><div class='add'>+ * @id:			Holding the identifier to a switch model</div><div class='add'>+ * @pcs_ops:		Holding the pointer to the MAC PCS operations structure</div><div class='add'>+ * @sw_setup:		Holding the handler to a device initialization</div><div class='add'>+ * @phy_read_c22:	Holding the way reading PHY port using C22</div><div class='add'>+ * @phy_write_c22:	Holding the way writing PHY port using C22</div><div class='add'>+ * @phy_read_c45:	Holding the way reading PHY port using C45</div><div class='add'>+ * @phy_write_c45:	Holding the way writing PHY port using C45</div><div class='add'>+ * @mac_port_get_caps:	Holding the handler that provides MAC capabilities</div><div class='add'>+ * @mac_port_config:	Holding the way setting up the PHY attribute to a</div><div class='add'>+ *			certain MAC port</div><div class='add'>+ */</div><div class='add'>+struct mt753x_info {</div><div class='add'>+	enum mt753x_id id;</div><div class='add'>+</div><div class='add'>+	const struct phylink_pcs_ops *pcs_ops;</div><div class='add'>+</div><div class='add'>+	int (*sw_setup)(struct dsa_switch *ds);</div><div class='add'>+	int (*phy_read_c22)(struct mt7530_priv *priv, int port, int regnum);</div><div class='add'>+	int (*phy_write_c22)(struct mt7530_priv *priv, int port, int regnum,</div><div class='add'>+			     u16 val);</div><div class='add'>+	int (*phy_read_c45)(struct mt7530_priv *priv, int port, int devad,</div><div class='add'>+			    int regnum);</div><div class='add'>+	int (*phy_write_c45)(struct mt7530_priv *priv, int port, int devad,</div><div class='add'>+			     int regnum, u16 val);</div><div class='add'>+	void (*mac_port_get_caps)(struct dsa_switch *ds, int port,</div><div class='add'>+				  struct phylink_config *config);</div><div class='add'>+	void (*mac_port_config)(struct dsa_switch *ds, int port,</div><div class='add'>+				unsigned int mode,</div><div class='add'>+				phy_interface_t interface);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* struct mt7530_priv -	This is the main data structure for holding the state</div><div class='add'>+ *			of the driver</div><div class='add'>+ * @dev:		The device pointer</div><div class='add'>+ * @ds:			The pointer to the dsa core structure</div><div class='add'>+ * @bus:		The bus used for the device and built-in PHY</div><div class='add'>+ * @regmap:		The regmap instance representing all switch registers</div><div class='add'>+ * @rstc:		The pointer to reset control used by MCM</div><div class='add'>+ * @core_pwr:		The power supplied into the core</div><div class='add'>+ * @io_pwr:		The power supplied into the I/O</div><div class='add'>+ * @reset:		The descriptor for GPIO line tied to its reset pin</div><div class='add'>+ * @mcm:		Flag for distinguishing if standalone IC or module</div><div class='add'>+ *			coupling</div><div class='add'>+ * @ports:		Holding the state among ports</div><div class='add'>+ * @reg_mutex:		The lock for protecting among process accessing</div><div class='add'>+ *			registers</div><div class='add'>+ * @p5_mode:		Holding the current mode of port 5 of the MT7530 switch</div><div class='add'>+ * @p5_sgmii:		Flag for distinguishing if port 5 of the MT7531 switch</div><div class='add'>+ *			has got SGMII</div><div class='add'>+ * @irq_domain:		IRQ domain of the switch irq_chip</div><div class='add'>+ * @create_sgmii:	Pointer to function creating SGMII PCS instance(s)</div><div class='add'>+ * @active_cpu_ports:	Holding the active CPU ports</div><div class='add'>+ * @mdiodev:		The pointer to the MDIO device structure</div><div class='add'>+ */</div><div class='add'>+struct mt7530_priv {</div><div class='add'>+	struct device		*dev;</div><div class='add'>+	struct dsa_switch	*ds;</div><div class='add'>+	struct mii_bus		*bus;</div><div class='add'>+	struct regmap		*regmap;</div><div class='add'>+	struct reset_control	*rstc;</div><div class='add'>+	struct regulator	*core_pwr;</div><div class='add'>+	struct regulator	*io_pwr;</div><div class='add'>+	struct gpio_desc	*reset;</div><div class='add'>+	const struct mt753x_info *info;</div><div class='add'>+	unsigned int		id;</div><div class='add'>+	bool			mcm;</div><div class='add'>+	enum mt7530_p5_mode	p5_mode;</div><div class='add'>+	bool			p5_sgmii;</div><div class='add'>+	u8			mirror_rx;</div><div class='add'>+	u8			mirror_tx;</div><div class='add'>+	struct mt7530_port	ports[MT7530_NUM_PORTS];</div><div class='add'>+	struct mt753x_pcs	pcs[MT7530_NUM_PORTS];</div><div class='add'>+	/* protect among processes for registers access*/</div><div class='add'>+	struct mutex reg_mutex;</div><div class='add'>+	struct irq_domain *irq_domain;</div><div class='add'>+	int (*create_sgmii)(struct mt7530_priv *priv);</div><div class='add'>+	u8 active_cpu_ports;</div><div class='add'>+	struct mdio_device *mdiodev;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mt7530_hw_vlan_entry {</div><div class='add'>+	int port;</div><div class='add'>+	u8  old_members;</div><div class='add'>+	bool untagged;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline void mt7530_hw_vlan_entry_init(struct mt7530_hw_vlan_entry *e,</div><div class='add'>+					     int port, bool untagged)</div><div class='add'>+{</div><div class='add'>+	e-&gt;port = port;</div><div class='add'>+	e-&gt;untagged = untagged;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+typedef void (*mt7530_vlan_op)(struct mt7530_priv *,</div><div class='add'>+			       struct mt7530_hw_vlan_entry *);</div><div class='add'>+</div><div class='add'>+struct mt7530_hw_stats {</div><div class='add'>+	const char	*string;</div><div class='add'>+	u16		reg;</div><div class='add'>+	u8		sizeof_stat;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mt7530_dummy_poll {</div><div class='add'>+	struct mt7530_priv *priv;</div><div class='add'>+	u32 reg;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline void INIT_MT7530_DUMMY_POLL(struct mt7530_dummy_poll *p,</div><div class='add'>+					  struct mt7530_priv *priv, u32 reg)</div><div class='add'>+{</div><div class='add'>+	p-&gt;priv = priv;</div><div class='add'>+	p-&gt;reg = reg;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mt7530_probe_common(struct mt7530_priv *priv);</div><div class='add'>+void mt7530_remove_common(struct mt7530_priv *priv);</div><div class='add'>+</div><div class='add'>+extern const struct mt753x_info mt753x_table[];</div><div class='add'>+</div><div class='add'>+#endif /* __MT7530_H */</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6060.c b/drivers/net/dsa/mv88e6060.c<br/>index c29aebe1e62b..9c8ac14cd4f5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6060.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6060.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6060.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6060.c</a></div><div class='hunk'>@@ -1,108 +1,89 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='ctx'> /*</div><div class='ctx'>  * net/dsa/mv88e6060.c - Driver for Marvell 88e6060 switch chips</div><div class='ctx'>  * Copyright (c) 2008-2009 Marvell Semiconductor</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='ctx'> #include &lt;linux/jiffies.h&gt;</div><div class='ctx'> #include &lt;linux/list.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='ctx'> #include &lt;net/dsa.h&gt;</div><div class='add'>+#include "mv88e6060.h"</div><div class='ctx'> </div><div class='del'>-#define REG_PORT(p)		(8 + (p))</div><div class='del'>-#define REG_GLOBAL		0x0f</div><div class='del'>-</div><div class='del'>-static int reg_read(struct dsa_switch *ds, int addr, int reg)</div><div class='add'>+static int reg_read(struct mv88e6060_priv *priv, int addr, int reg)</div><div class='ctx'> {</div><div class='del'>-	struct mii_bus *bus = dsa_host_dev_to_mii_bus(ds-&gt;master_dev);</div><div class='del'>-</div><div class='del'>-	if (bus == NULL)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	return mdiobus_read(bus, ds-&gt;pd-&gt;sw_addr + addr, reg);</div><div class='add'>+	return mdiobus_read_nested(priv-&gt;bus, priv-&gt;sw_addr + addr, reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define REG_READ(addr, reg)					\</div><div class='del'>-	({							\</div><div class='del'>-		int __ret;					\</div><div class='del'>-								\</div><div class='del'>-		__ret = reg_read(ds, addr, reg);		\</div><div class='del'>-		if (__ret &lt; 0)					\</div><div class='del'>-			return __ret;				\</div><div class='del'>-		__ret;						\</div><div class='del'>-	})</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int reg_write(struct dsa_switch *ds, int addr, int reg, u16 val)</div><div class='add'>+static int reg_write(struct mv88e6060_priv *priv, int addr, int reg, u16 val)</div><div class='ctx'> {</div><div class='del'>-	struct mii_bus *bus = dsa_host_dev_to_mii_bus(ds-&gt;master_dev);</div><div class='del'>-</div><div class='del'>-	if (bus == NULL)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	return mdiobus_write(bus, ds-&gt;pd-&gt;sw_addr + addr, reg, val);</div><div class='add'>+	return mdiobus_write_nested(priv-&gt;bus, priv-&gt;sw_addr + addr, reg, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define REG_WRITE(addr, reg, val)				\</div><div class='del'>-	({							\</div><div class='del'>-		int __ret;					\</div><div class='del'>-								\</div><div class='del'>-		__ret = reg_write(ds, addr, reg, val);		\</div><div class='del'>-		if (__ret &lt; 0)					\</div><div class='del'>-			return __ret;				\</div><div class='del'>-	})</div><div class='del'>-</div><div class='del'>-static char *mv88e6060_probe(struct device *host_dev, int sw_addr)</div><div class='add'>+static const char *mv88e6060_get_name(struct mii_bus *bus, int sw_addr)</div><div class='ctx'> {</div><div class='del'>-	struct mii_bus *bus = dsa_host_dev_to_mii_bus(host_dev);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	if (bus == NULL)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	ret = mdiobus_read(bus, sw_addr + REG_PORT(0), 0x03);</div><div class='add'>+	ret = mdiobus_read(bus, sw_addr + REG_PORT(0), PORT_SWITCH_ID);</div><div class='ctx'> 	if (ret &gt;= 0) {</div><div class='del'>-		if (ret == 0x0600)</div><div class='add'>+		if (ret == PORT_SWITCH_ID_6060)</div><div class='ctx'> 			return "Marvell 88E6060 (A0)";</div><div class='del'>-		if (ret == 0x0601 || ret == 0x0602)</div><div class='add'>+		if (ret == PORT_SWITCH_ID_6060_R1 ||</div><div class='add'>+		    ret == PORT_SWITCH_ID_6060_R2)</div><div class='ctx'> 			return "Marvell 88E6060 (B0)";</div><div class='del'>-		if ((ret &amp; 0xfff0) == 0x0600)</div><div class='add'>+		if ((ret &amp; PORT_SWITCH_ID_6060_MASK) == PORT_SWITCH_ID_6060)</div><div class='ctx'> 			return "Marvell 88E6060";</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mv88e6060_switch_reset(struct dsa_switch *ds)</div><div class='add'>+static enum dsa_tag_protocol mv88e6060_get_tag_protocol(struct dsa_switch *ds,</div><div class='add'>+							int port,</div><div class='add'>+							enum dsa_tag_protocol m)</div><div class='add'>+{</div><div class='add'>+	return DSA_TAG_PROTO_TRAILER;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6060_switch_reset(struct mv88e6060_priv *priv)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> 	int ret;</div><div class='ctx'> 	unsigned long timeout;</div><div class='ctx'> </div><div class='ctx'> 	/* Set all ports to the disabled state. */</div><div class='del'>-	for (i = 0; i &lt; 6; i++) {</div><div class='del'>-		ret = REG_READ(REG_PORT(i), 0x04);</div><div class='del'>-		REG_WRITE(REG_PORT(i), 0x04, ret &amp; 0xfffc);</div><div class='add'>+	for (i = 0; i &lt; MV88E6060_PORTS; i++) {</div><div class='add'>+		ret = reg_read(priv, REG_PORT(i), PORT_CONTROL);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+		ret = reg_write(priv, REG_PORT(i), PORT_CONTROL,</div><div class='add'>+				ret &amp; ~PORT_CONTROL_STATE_MASK);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Wait for transmit queues to drain. */</div><div class='ctx'> 	usleep_range(2000, 4000);</div><div class='ctx'> </div><div class='ctx'> 	/* Reset the switch. */</div><div class='del'>-	REG_WRITE(REG_GLOBAL, 0x0a, 0xa130);</div><div class='add'>+	ret = reg_write(priv, REG_GLOBAL, GLOBAL_ATU_CONTROL,</div><div class='add'>+			GLOBAL_ATU_CONTROL_SWRESET |</div><div class='add'>+			GLOBAL_ATU_CONTROL_LEARNDIS);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Wait up to one second for reset to complete. */</div><div class='ctx'> 	timeout = jiffies + 1 * HZ;</div><div class='ctx'> 	while (time_before(jiffies, timeout)) {</div><div class='del'>-		ret = REG_READ(REG_GLOBAL, 0x00);</div><div class='del'>-		if ((ret &amp; 0x8000) == 0x0000)</div><div class='add'>+		ret = reg_read(priv, REG_GLOBAL, GLOBAL_STATUS);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		if (ret &amp; GLOBAL_STATUS_INIT_READY)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		usleep_range(1000, 2000);</div><div class='hunk'>@@ -113,72 +94,120 @@ static int mv88e6060_switch_reset(struct dsa_switch *ds)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mv88e6060_setup_global(struct dsa_switch *ds)</div><div class='add'>+static int mv88e6060_setup_global(struct mv88e6060_priv *priv)</div><div class='ctx'> {</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='ctx'> 	/* Disable discarding of frames with excessive collisions,</div><div class='ctx'> 	 * set the maximum frame size to 1536 bytes, and mask all</div><div class='ctx'> 	 * interrupt sources.</div><div class='ctx'> 	 */</div><div class='del'>-	REG_WRITE(REG_GLOBAL, 0x04, 0x0800);</div><div class='add'>+	ret = reg_write(priv, REG_GLOBAL, GLOBAL_CONTROL,</div><div class='add'>+			GLOBAL_CONTROL_MAX_FRAME_1536);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-	/* Enable automatic address learning, set the address</div><div class='del'>-	 * database size to 1024 entries, and set the default aging</div><div class='del'>-	 * time to 5 minutes.</div><div class='add'>+	/* Disable automatic address learning.</div><div class='ctx'> 	 */</div><div class='del'>-	REG_WRITE(REG_GLOBAL, 0x0a, 0x2130);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	return reg_write(priv, REG_GLOBAL, GLOBAL_ATU_CONTROL,</div><div class='add'>+			 GLOBAL_ATU_CONTROL_LEARNDIS);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mv88e6060_setup_port(struct dsa_switch *ds, int p)</div><div class='add'>+static int mv88e6060_setup_port(struct mv88e6060_priv *priv, int p)</div><div class='ctx'> {</div><div class='ctx'> 	int addr = REG_PORT(p);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (dsa_is_unused_port(priv-&gt;ds, p))</div><div class='add'>+		return 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Do not force flow control, disable Ingress and Egress</div><div class='ctx'> 	 * Header tagging, disable VLAN tunneling, and set the port</div><div class='ctx'> 	 * state to Forwarding.  Additionally, if this is the CPU</div><div class='ctx'> 	 * port, enable Ingress and Egress Trailer tagging mode.</div><div class='ctx'> 	 */</div><div class='del'>-	REG_WRITE(addr, 0x04, dsa_is_cpu_port(ds, p) ?  0x4103 : 0x0003);</div><div class='add'>+	ret = reg_write(priv, addr, PORT_CONTROL,</div><div class='add'>+			dsa_is_cpu_port(priv-&gt;ds, p) ?</div><div class='add'>+			PORT_CONTROL_TRAILER |</div><div class='add'>+			PORT_CONTROL_INGRESS_MODE |</div><div class='add'>+			PORT_CONTROL_STATE_FORWARDING :</div><div class='add'>+			PORT_CONTROL_STATE_FORWARDING);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Port based VLAN map: give each port its own address</div><div class='ctx'> 	 * database, allow the CPU port to talk to each of the 'real'</div><div class='ctx'> 	 * ports, and allow each of the 'real' ports to only talk to</div><div class='ctx'> 	 * the CPU port.</div><div class='ctx'> 	 */</div><div class='del'>-	REG_WRITE(addr, 0x06,</div><div class='del'>-			((p &amp; 0xf) &lt;&lt; 12) |</div><div class='del'>-			 (dsa_is_cpu_port(ds, p) ?</div><div class='del'>-				ds-&gt;phys_port_mask :</div><div class='del'>-				(1 &lt;&lt; ds-&gt;dst-&gt;cpu_port)));</div><div class='add'>+	ret = reg_write(priv, addr, PORT_VLAN_MAP,</div><div class='add'>+			((p &amp; 0xf) &lt;&lt; PORT_VLAN_MAP_DBNUM_SHIFT) |</div><div class='add'>+			(dsa_is_cpu_port(priv-&gt;ds, p) ?</div><div class='add'>+			 dsa_user_ports(priv-&gt;ds) :</div><div class='add'>+			 BIT(dsa_to_port(priv-&gt;ds, p)-&gt;cpu_dp-&gt;index)));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Port Association Vector: when learning source addresses</div><div class='ctx'> 	 * of packets, add the address to the address database using</div><div class='ctx'> 	 * a port bitmap that has only the bit for this port set and</div><div class='ctx'> 	 * the other bits clear.</div><div class='ctx'> 	 */</div><div class='del'>-	REG_WRITE(addr, 0x0b, 1 &lt;&lt; p);</div><div class='add'>+	return reg_write(priv, addr, PORT_ASSOC_VECTOR, BIT(p));</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+static int mv88e6060_setup_addr(struct mv88e6060_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u8 addr[ETH_ALEN];</div><div class='add'>+	int ret;</div><div class='add'>+	u16 val;</div><div class='add'>+</div><div class='add'>+	eth_random_addr(addr);</div><div class='add'>+</div><div class='add'>+	val = addr[0] &lt;&lt; 8 | addr[1];</div><div class='add'>+</div><div class='add'>+	/* The multicast bit is always transmitted as a zero, so the switch uses</div><div class='add'>+	 * bit 8 for "DiffAddr", where 0 means all ports transmit the same SA.</div><div class='add'>+	 */</div><div class='add'>+	val &amp;= 0xfeff;</div><div class='add'>+</div><div class='add'>+	ret = reg_write(priv, REG_GLOBAL, GLOBAL_MAC_01, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = reg_write(priv, REG_GLOBAL, GLOBAL_MAC_23,</div><div class='add'>+			(addr[2] &lt;&lt; 8) | addr[3]);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return reg_write(priv, REG_GLOBAL, GLOBAL_MAC_45,</div><div class='add'>+			 (addr[4] &lt;&lt; 8) | addr[5]);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mv88e6060_setup(struct dsa_switch *ds)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='add'>+	struct mv88e6060_priv *priv = ds-&gt;priv;</div><div class='ctx'> 	int ret;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	priv-&gt;ds = ds;</div><div class='ctx'> </div><div class='del'>-	ret = mv88e6060_switch_reset(ds);</div><div class='add'>+	ret = mv88e6060_switch_reset(priv);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/* @@@ initialise atu */</div><div class='ctx'> </div><div class='del'>-	ret = mv88e6060_setup_global(ds);</div><div class='add'>+	ret = mv88e6060_setup_global(priv);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = mv88e6060_setup_addr(priv);</div><div class='ctx'> 	if (ret &lt; 0)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; 6; i++) {</div><div class='del'>-		ret = mv88e6060_setup_port(ds, i);</div><div class='add'>+	for (i = 0; i &lt; MV88E6060_PORTS; i++) {</div><div class='add'>+		ret = mv88e6060_setup_port(priv, i);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -186,115 +215,167 @@ static int mv88e6060_setup(struct dsa_switch *ds)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mv88e6060_set_addr(struct dsa_switch *ds, u8 *addr)</div><div class='del'>-{</div><div class='del'>-	REG_WRITE(REG_GLOBAL, 0x01, (addr[0] &lt;&lt; 8) | addr[1]);</div><div class='del'>-	REG_WRITE(REG_GLOBAL, 0x02, (addr[2] &lt;&lt; 8) | addr[3]);</div><div class='del'>-	REG_WRITE(REG_GLOBAL, 0x03, (addr[4] &lt;&lt; 8) | addr[5]);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int mv88e6060_port_to_phy_addr(int port)</div><div class='ctx'> {</div><div class='del'>-	if (port &gt;= 0 &amp;&amp; port &lt;= 5)</div><div class='add'>+	if (port &gt;= 0 &amp;&amp; port &lt; MV88E6060_PORTS)</div><div class='ctx'> 		return port;</div><div class='ctx'> 	return -1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int mv88e6060_phy_read(struct dsa_switch *ds, int port, int regnum)</div><div class='ctx'> {</div><div class='add'>+	struct mv88e6060_priv *priv = ds-&gt;priv;</div><div class='ctx'> 	int addr;</div><div class='ctx'> </div><div class='ctx'> 	addr = mv88e6060_port_to_phy_addr(port);</div><div class='ctx'> 	if (addr == -1)</div><div class='ctx'> 		return 0xffff;</div><div class='ctx'> </div><div class='del'>-	return reg_read(ds, addr, regnum);</div><div class='add'>+	return reg_read(priv, addr, regnum);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='ctx'> mv88e6060_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val)</div><div class='ctx'> {</div><div class='add'>+	struct mv88e6060_priv *priv = ds-&gt;priv;</div><div class='ctx'> 	int addr;</div><div class='ctx'> </div><div class='ctx'> 	addr = mv88e6060_port_to_phy_addr(port);</div><div class='ctx'> 	if (addr == -1)</div><div class='ctx'> 		return 0xffff;</div><div class='ctx'> </div><div class='del'>-	return reg_write(ds, addr, regnum, val);</div><div class='add'>+	return reg_write(priv, addr, regnum, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mv88e6060_poll_link(struct dsa_switch *ds)</div><div class='add'>+static void mv88e6060_phylink_get_caps(struct dsa_switch *ds, int port,</div><div class='add'>+				       struct phylink_config *config)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='add'>+	unsigned long *interfaces = config-&gt;supported_interfaces;</div><div class='add'>+	struct mv88e6060_priv *priv = ds-&gt;priv;</div><div class='add'>+	int addr = REG_PORT(port);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = reg_read(priv, addr, PORT_STATUS);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(ds-&gt;dev,</div><div class='add'>+			"port %d: unable to read status register: %pe\n",</div><div class='add'>+			port, ERR_PTR(ret));</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* If the port is configured in SNI mode (acts as a 10Mbps PHY),</div><div class='add'>+	 * it should have phy-mode = "sni", but that doesn't yet exist, so</div><div class='add'>+	 * forcibly fail validation until the need arises to introduce it.</div><div class='add'>+	 */</div><div class='add'>+	if (!(ret &amp; PORT_STATUS_PORTMODE)) {</div><div class='add'>+		dev_warn(ds-&gt;dev, "port %d: SNI mode not supported\n", port);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	config-&gt;mac_capabilities = MAC_100 | MAC_10 | MAC_SYM_PAUSE;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; DSA_MAX_PORTS; i++) {</div><div class='del'>-		struct net_device *dev;</div><div class='del'>-		int uninitialized_var(port_status);</div><div class='del'>-		int link;</div><div class='del'>-		int speed;</div><div class='del'>-		int duplex;</div><div class='del'>-		int fc;</div><div class='del'>-</div><div class='del'>-		dev = ds-&gt;ports[i];</div><div class='del'>-		if (dev == NULL)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		link = 0;</div><div class='del'>-		if (dev-&gt;flags &amp; IFF_UP) {</div><div class='del'>-			port_status = reg_read(ds, REG_PORT(i), 0x00);</div><div class='del'>-			if (port_status &lt; 0)</div><div class='del'>-				continue;</div><div class='del'>-</div><div class='del'>-			link = !!(port_status &amp; 0x1000);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (!link) {</div><div class='del'>-			if (netif_carrier_ok(dev)) {</div><div class='del'>-				netdev_info(dev, "link down\n");</div><div class='del'>-				netif_carrier_off(dev);</div><div class='del'>-			}</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		speed = (port_status &amp; 0x0100) ? 100 : 10;</div><div class='del'>-		duplex = (port_status &amp; 0x0200) ? 1 : 0;</div><div class='del'>-		fc = ((port_status &amp; 0xc000) == 0xc000) ? 1 : 0;</div><div class='del'>-</div><div class='del'>-		if (!netif_carrier_ok(dev)) {</div><div class='del'>-			netdev_info(dev,</div><div class='del'>-				    "link up, %d Mb/s, %s duplex, flow control %sabled\n",</div><div class='del'>-				    speed,</div><div class='del'>-				    duplex ? "full" : "half",</div><div class='del'>-				    fc ? "en" : "dis");</div><div class='del'>-			netif_carrier_on(dev);</div><div class='del'>-		}</div><div class='add'>+	if (port &gt;= 4) {</div><div class='add'>+		/* Ports 4 and 5 can support MII, REVMII and REVRMII modes */</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_MII, interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_REVMII, interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_REVRMII, interfaces);</div><div class='add'>+	}</div><div class='add'>+	if (port &lt;= 4) {</div><div class='add'>+		/* Ports 0 to 3 have internal PHYs, and port 4 can optionally</div><div class='add'>+		 * use an internal PHY.</div><div class='add'>+		 */</div><div class='add'>+		/* Internal PHY */</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_INTERNAL, interfaces);</div><div class='add'>+		/* Default phylib interface mode */</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_GMII, interfaces);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct dsa_switch_driver mv88e6060_switch_driver = {</div><div class='del'>-	.tag_protocol	= DSA_TAG_PROTO_TRAILER,</div><div class='del'>-	.probe		= mv88e6060_probe,</div><div class='add'>+static const struct dsa_switch_ops mv88e6060_switch_ops = {</div><div class='add'>+	.get_tag_protocol = mv88e6060_get_tag_protocol,</div><div class='ctx'> 	.setup		= mv88e6060_setup,</div><div class='del'>-	.set_addr	= mv88e6060_set_addr,</div><div class='ctx'> 	.phy_read	= mv88e6060_phy_read,</div><div class='ctx'> 	.phy_write	= mv88e6060_phy_write,</div><div class='del'>-	.poll_link	= mv88e6060_poll_link,</div><div class='add'>+	.phylink_get_caps = mv88e6060_phylink_get_caps,</div><div class='add'>+	.port_hsr_join	= dsa_port_simple_hsr_join,</div><div class='add'>+	.port_hsr_leave	= dsa_port_simple_hsr_leave,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init mv88e6060_init(void)</div><div class='add'>+static int mv88e6060_probe(struct mdio_device *mdiodev)</div><div class='ctx'> {</div><div class='del'>-	register_switch_driver(&amp;mv88e6060_switch_driver);</div><div class='del'>-	return 0;</div><div class='add'>+	struct device *dev = &amp;mdiodev-&gt;dev;</div><div class='add'>+	struct mv88e6060_priv *priv;</div><div class='add'>+	struct dsa_switch *ds;</div><div class='add'>+	const char *name;</div><div class='add'>+</div><div class='add'>+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv-&gt;bus = mdiodev-&gt;bus;</div><div class='add'>+	priv-&gt;sw_addr = mdiodev-&gt;addr;</div><div class='add'>+</div><div class='add'>+	name = mv88e6060_get_name(priv-&gt;bus, priv-&gt;sw_addr);</div><div class='add'>+	if (!name)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	dev_info(dev, "switch %s detected\n", name);</div><div class='add'>+</div><div class='add'>+	ds = devm_kzalloc(dev, sizeof(*ds), GFP_KERNEL);</div><div class='add'>+	if (!ds)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ds-&gt;dev = dev;</div><div class='add'>+	ds-&gt;num_ports = MV88E6060_PORTS;</div><div class='add'>+	ds-&gt;priv = priv;</div><div class='add'>+	ds-&gt;dev = dev;</div><div class='add'>+	ds-&gt;ops = &amp;mv88e6060_switch_ops;</div><div class='add'>+</div><div class='add'>+	dev_set_drvdata(dev, ds);</div><div class='add'>+</div><div class='add'>+	return dsa_register_switch(ds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6060_remove(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds = dev_get_drvdata(&amp;mdiodev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	if (!ds)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dsa_unregister_switch(ds);</div><div class='ctx'> }</div><div class='del'>-module_init(mv88e6060_init);</div><div class='ctx'> </div><div class='del'>-static void __exit mv88e6060_cleanup(void)</div><div class='add'>+static void mv88e6060_shutdown(struct mdio_device *mdiodev)</div><div class='ctx'> {</div><div class='del'>-	unregister_switch_driver(&amp;mv88e6060_switch_driver);</div><div class='add'>+	struct dsa_switch *ds = dev_get_drvdata(&amp;mdiodev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	if (!ds)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dsa_switch_shutdown(ds);</div><div class='add'>+</div><div class='add'>+	dev_set_drvdata(&amp;mdiodev-&gt;dev, NULL);</div><div class='ctx'> }</div><div class='del'>-module_exit(mv88e6060_cleanup);</div><div class='add'>+</div><div class='add'>+static const struct of_device_id mv88e6060_of_match[] = {</div><div class='add'>+	{</div><div class='add'>+		.compatible = "marvell,mv88e6060",</div><div class='add'>+	},</div><div class='add'>+	{ /* sentinel */ },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct mdio_driver mv88e6060_driver = {</div><div class='add'>+	.probe	= mv88e6060_probe,</div><div class='add'>+	.remove = mv88e6060_remove,</div><div class='add'>+	.shutdown = mv88e6060_shutdown,</div><div class='add'>+	.mdiodrv.driver = {</div><div class='add'>+		.name = "mv88e6060",</div><div class='add'>+		.of_match_table = mv88e6060_of_match,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+mdio_module_driver(mv88e6060_driver);</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("Lennert Buytenhek &lt;buytenh@wantstofly.org&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("Driver for Marvell 88E6060 ethernet switch chip");</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6060.h b/drivers/net/dsa/mv88e6060.h<br/>new file mode 100644<br/>index 000000000000..6c13c2421b64<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6060.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6060.h</a></div><div class='hunk'>@@ -0,0 +1,119 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+/*</div><div class='add'>+ * drivers/net/dsa/mv88e6060.h - Marvell 88e6060 switch chip support</div><div class='add'>+ * Copyright (c) 2015 Neil Armstrong</div><div class='add'>+ *</div><div class='add'>+ * Based on mv88e6xxx.h</div><div class='add'>+ * Copyright (c) 2008 Marvell Semiconductor</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __MV88E6060_H</div><div class='add'>+#define __MV88E6060_H</div><div class='add'>+</div><div class='add'>+#define MV88E6060_PORTS	6</div><div class='add'>+</div><div class='add'>+#define REG_PORT(p)		(0x8 + (p))</div><div class='add'>+#define PORT_STATUS		0x00</div><div class='add'>+#define PORT_STATUS_PAUSE_EN	BIT(15)</div><div class='add'>+#define PORT_STATUS_MY_PAUSE	BIT(14)</div><div class='add'>+#define PORT_STATUS_FC		(PORT_STATUS_MY_PAUSE | PORT_STATUS_PAUSE_EN)</div><div class='add'>+#define PORT_STATUS_RESOLVED	BIT(13)</div><div class='add'>+#define PORT_STATUS_LINK	BIT(12)</div><div class='add'>+#define PORT_STATUS_PORTMODE	BIT(11)</div><div class='add'>+#define PORT_STATUS_PHYMODE	BIT(10)</div><div class='add'>+#define PORT_STATUS_DUPLEX	BIT(9)</div><div class='add'>+#define PORT_STATUS_SPEED	BIT(8)</div><div class='add'>+#define PORT_SWITCH_ID		0x03</div><div class='add'>+#define PORT_SWITCH_ID_6060	0x0600</div><div class='add'>+#define PORT_SWITCH_ID_6060_MASK	0xfff0</div><div class='add'>+#define PORT_SWITCH_ID_6060_R1	0x0601</div><div class='add'>+#define PORT_SWITCH_ID_6060_R2	0x0602</div><div class='add'>+#define PORT_CONTROL		0x04</div><div class='add'>+#define PORT_CONTROL_FORCE_FLOW_CTRL	BIT(15)</div><div class='add'>+#define PORT_CONTROL_TRAILER	BIT(14)</div><div class='add'>+#define PORT_CONTROL_HEADER	BIT(11)</div><div class='add'>+#define PORT_CONTROL_INGRESS_MODE	BIT(8)</div><div class='add'>+#define PORT_CONTROL_VLAN_TUNNEL	BIT(7)</div><div class='add'>+#define PORT_CONTROL_STATE_MASK	0x03</div><div class='add'>+#define PORT_CONTROL_STATE_DISABLED	0x00</div><div class='add'>+#define PORT_CONTROL_STATE_BLOCKING	0x01</div><div class='add'>+#define PORT_CONTROL_STATE_LEARNING	0x02</div><div class='add'>+#define PORT_CONTROL_STATE_FORWARDING	0x03</div><div class='add'>+#define PORT_VLAN_MAP		0x06</div><div class='add'>+#define PORT_VLAN_MAP_DBNUM_SHIFT	12</div><div class='add'>+#define PORT_VLAN_MAP_TABLE_MASK	0x1f</div><div class='add'>+#define PORT_ASSOC_VECTOR	0x0b</div><div class='add'>+#define PORT_ASSOC_VECTOR_MONITOR	BIT(15)</div><div class='add'>+#define PORT_ASSOC_VECTOR_PAV_MASK	0x1f</div><div class='add'>+#define PORT_RX_CNTR		0x10</div><div class='add'>+#define PORT_TX_CNTR		0x11</div><div class='add'>+</div><div class='add'>+#define REG_GLOBAL		0x0f</div><div class='add'>+#define GLOBAL_STATUS		0x00</div><div class='add'>+#define GLOBAL_STATUS_SW_MODE_MASK	(0x3 &lt;&lt; 12)</div><div class='add'>+#define GLOBAL_STATUS_SW_MODE_0	(0x0 &lt;&lt; 12)</div><div class='add'>+#define GLOBAL_STATUS_SW_MODE_1	(0x1 &lt;&lt; 12)</div><div class='add'>+#define GLOBAL_STATUS_SW_MODE_2	(0x2 &lt;&lt; 12)</div><div class='add'>+#define GLOBAL_STATUS_SW_MODE_3	(0x3 &lt;&lt; 12)</div><div class='add'>+#define GLOBAL_STATUS_INIT_READY	BIT(11)</div><div class='add'>+#define GLOBAL_STATUS_ATU_FULL		BIT(3)</div><div class='add'>+#define GLOBAL_STATUS_ATU_DONE		BIT(2)</div><div class='add'>+#define GLOBAL_STATUS_PHY_INT	BIT(1)</div><div class='add'>+#define GLOBAL_STATUS_EEINT	BIT(0)</div><div class='add'>+#define GLOBAL_MAC_01		0x01</div><div class='add'>+#define GLOBAL_MAC_01_DIFF_ADDR	BIT(8)</div><div class='add'>+#define GLOBAL_MAC_23		0x02</div><div class='add'>+#define GLOBAL_MAC_45		0x03</div><div class='add'>+#define GLOBAL_CONTROL		0x04</div><div class='add'>+#define GLOBAL_CONTROL_DISCARD_EXCESS	BIT(13)</div><div class='add'>+#define GLOBAL_CONTROL_MAX_FRAME_1536	BIT(10)</div><div class='add'>+#define GLOBAL_CONTROL_RELOAD_EEPROM	BIT(9)</div><div class='add'>+#define GLOBAL_CONTROL_CTRMODE		BIT(8)</div><div class='add'>+#define GLOBAL_CONTROL_ATU_FULL_EN	BIT(3)</div><div class='add'>+#define GLOBAL_CONTROL_ATU_DONE_EN	BIT(2)</div><div class='add'>+#define GLOBAL_CONTROL_PHYINT_EN	BIT(1)</div><div class='add'>+#define GLOBAL_CONTROL_EEPROM_DONE_EN	BIT(0)</div><div class='add'>+#define GLOBAL_ATU_CONTROL	0x0a</div><div class='add'>+#define GLOBAL_ATU_CONTROL_SWRESET	BIT(15)</div><div class='add'>+#define GLOBAL_ATU_CONTROL_LEARNDIS	BIT(14)</div><div class='add'>+#define GLOBAL_ATU_CONTROL_ATUSIZE_256	(0x0 &lt;&lt; 12)</div><div class='add'>+#define GLOBAL_ATU_CONTROL_ATUSIZE_512	(0x1 &lt;&lt; 12)</div><div class='add'>+#define GLOBAL_ATU_CONTROL_ATUSIZE_1024	(0x2 &lt;&lt; 12)</div><div class='add'>+#define GLOBAL_ATU_CONTROL_ATE_AGE_SHIFT	4</div><div class='add'>+#define GLOBAL_ATU_CONTROL_ATE_AGE_MASK	(0xff &lt;&lt; 4)</div><div class='add'>+#define GLOBAL_ATU_CONTROL_ATE_AGE_5MIN	(0x13 &lt;&lt; 4)</div><div class='add'>+#define GLOBAL_ATU_OP		0x0b</div><div class='add'>+#define GLOBAL_ATU_OP_BUSY	BIT(15)</div><div class='add'>+#define GLOBAL_ATU_OP_NOP		(0 &lt;&lt; 12)</div><div class='add'>+#define GLOBAL_ATU_OP_FLUSH_ALL	((1 &lt;&lt; 12) | GLOBAL_ATU_OP_BUSY)</div><div class='add'>+#define GLOBAL_ATU_OP_FLUSH_UNLOCKED	((2 &lt;&lt; 12) | GLOBAL_ATU_OP_BUSY)</div><div class='add'>+#define GLOBAL_ATU_OP_LOAD_DB		((3 &lt;&lt; 12) | GLOBAL_ATU_OP_BUSY)</div><div class='add'>+#define GLOBAL_ATU_OP_GET_NEXT_DB	((4 &lt;&lt; 12) | GLOBAL_ATU_OP_BUSY)</div><div class='add'>+#define GLOBAL_ATU_OP_FLUSH_DB		((5 &lt;&lt; 12) | GLOBAL_ATU_OP_BUSY)</div><div class='add'>+#define GLOBAL_ATU_OP_FLUSH_UNLOCKED_DB ((6 &lt;&lt; 12) | GLOBAL_ATU_OP_BUSY)</div><div class='add'>+#define GLOBAL_ATU_DATA		0x0c</div><div class='add'>+#define GLOBAL_ATU_DATA_PORT_VECTOR_MASK	0x3f0</div><div class='add'>+#define GLOBAL_ATU_DATA_PORT_VECTOR_SHIFT	4</div><div class='add'>+#define GLOBAL_ATU_DATA_STATE_MASK		0x0f</div><div class='add'>+#define GLOBAL_ATU_DATA_STATE_UNUSED		0x00</div><div class='add'>+#define GLOBAL_ATU_DATA_STATE_UC_STATIC		0x0e</div><div class='add'>+#define GLOBAL_ATU_DATA_STATE_UC_LOCKED		0x0f</div><div class='add'>+#define GLOBAL_ATU_DATA_STATE_MC_STATIC		0x07</div><div class='add'>+#define GLOBAL_ATU_DATA_STATE_MC_LOCKED		0x0e</div><div class='add'>+#define GLOBAL_ATU_MAC_01	0x0d</div><div class='add'>+#define GLOBAL_ATU_MAC_23	0x0e</div><div class='add'>+#define GLOBAL_ATU_MAC_45	0x0f</div><div class='add'>+</div><div class='add'>+struct mv88e6060_priv {</div><div class='add'>+	/* MDIO bus and address on bus to use. When in single chip</div><div class='add'>+	 * mode, address is 0, and the switch uses multiple addresses</div><div class='add'>+	 * on the bus.  When in multi-chip mode, the switch uses a</div><div class='add'>+	 * single address which contains two registers used for</div><div class='add'>+	 * indirect access to more registers.</div><div class='add'>+	 */</div><div class='add'>+	struct mii_bus *bus;</div><div class='add'>+	int sw_addr;</div><div class='add'>+	struct dsa_switch *ds;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6123_61_65.c b/drivers/net/dsa/mv88e6123_61_65.c<br/>deleted file mode 100644<br/>index 71a29a7ce538..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6123_61_65.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6123_61_65.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,141 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * net/dsa/mv88e6123_61_65.c - Marvell 88e6123/6161/6165 switch chip support</div><div class='del'>- * Copyright (c) 2008-2009 Marvell Semiconductor</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/jiffies.h&gt;</div><div class='del'>-#include &lt;linux/list.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/phy.h&gt;</div><div class='del'>-#include &lt;net/dsa.h&gt;</div><div class='del'>-#include "mv88e6xxx.h"</div><div class='del'>-</div><div class='del'>-static char *mv88e6123_61_65_probe(struct device *host_dev, int sw_addr)</div><div class='del'>-{</div><div class='del'>-	struct mii_bus *bus = dsa_host_dev_to_mii_bus(host_dev);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (bus == NULL)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	ret = __mv88e6xxx_reg_read(bus, sw_addr, REG_PORT(0), PORT_SWITCH_ID);</div><div class='del'>-	if (ret &gt;= 0) {</div><div class='del'>-		if (ret == PORT_SWITCH_ID_6123_A1)</div><div class='del'>-			return "Marvell 88E6123 (A1)";</div><div class='del'>-		if (ret == PORT_SWITCH_ID_6123_A2)</div><div class='del'>-			return "Marvell 88E6123 (A2)";</div><div class='del'>-		if ((ret &amp; 0xfff0) == PORT_SWITCH_ID_6123)</div><div class='del'>-			return "Marvell 88E6123";</div><div class='del'>-</div><div class='del'>-		if (ret == PORT_SWITCH_ID_6161_A1)</div><div class='del'>-			return "Marvell 88E6161 (A1)";</div><div class='del'>-		if (ret == PORT_SWITCH_ID_6161_A2)</div><div class='del'>-			return "Marvell 88E6161 (A2)";</div><div class='del'>-		if ((ret &amp; 0xfff0) == PORT_SWITCH_ID_6161)</div><div class='del'>-			return "Marvell 88E6161";</div><div class='del'>-</div><div class='del'>-		if (ret == PORT_SWITCH_ID_6165_A1)</div><div class='del'>-			return "Marvell 88E6165 (A1)";</div><div class='del'>-		if (ret == PORT_SWITCH_ID_6165_A2)</div><div class='del'>-			return "Marvell 88e6165 (A2)";</div><div class='del'>-		if ((ret &amp; 0xfff0) == PORT_SWITCH_ID_6165)</div><div class='del'>-			return "Marvell 88E6165";</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mv88e6123_61_65_setup_global(struct dsa_switch *ds)</div><div class='del'>-{</div><div class='del'>-	u32 upstream_port = dsa_upstream_port(ds);</div><div class='del'>-	int ret;</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	ret = mv88e6xxx_setup_global(ds);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	/* Disable the PHY polling unit (since there won't be any</div><div class='del'>-	 * external PHYs to poll), don't discard packets with</div><div class='del'>-	 * excessive collisions, and mask all interrupt sources.</div><div class='del'>-	 */</div><div class='del'>-	REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL, 0x0000);</div><div class='del'>-</div><div class='del'>-	/* Configure the upstream port, and configure the upstream</div><div class='del'>-	 * port as the port to which ingress and egress monitor frames</div><div class='del'>-	 * are to be sent.</div><div class='del'>-	 */</div><div class='del'>-	reg = upstream_port &lt;&lt; GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT |</div><div class='del'>-		upstream_port &lt;&lt; GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT |</div><div class='del'>-		upstream_port &lt;&lt; GLOBAL_MONITOR_CONTROL_ARP_SHIFT;</div><div class='del'>-	REG_WRITE(REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg);</div><div class='del'>-</div><div class='del'>-	/* Disable remote management for now, and set the switch's</div><div class='del'>-	 * DSA device number.</div><div class='del'>-	 */</div><div class='del'>-	REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL_2, ds-&gt;index &amp; 0x1f);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mv88e6123_61_65_setup(struct dsa_switch *ds)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = mv88e6xxx_setup_common(ds);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	switch (ps-&gt;id) {</div><div class='del'>-	case PORT_SWITCH_ID_6123:</div><div class='del'>-		ps-&gt;num_ports = 3;</div><div class='del'>-		break;</div><div class='del'>-	case PORT_SWITCH_ID_6161:</div><div class='del'>-	case PORT_SWITCH_ID_6165:</div><div class='del'>-		ps-&gt;num_ports = 6;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = mv88e6xxx_switch_reset(ds, false);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret = mv88e6123_61_65_setup_global(ds);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	return mv88e6xxx_setup_ports(ds);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct dsa_switch_driver mv88e6123_61_65_switch_driver = {</div><div class='del'>-	.tag_protocol		= DSA_TAG_PROTO_EDSA,</div><div class='del'>-	.priv_size		= sizeof(struct mv88e6xxx_priv_state),</div><div class='del'>-	.probe			= mv88e6123_61_65_probe,</div><div class='del'>-	.setup			= mv88e6123_61_65_setup,</div><div class='del'>-	.set_addr		= mv88e6xxx_set_addr_indirect,</div><div class='del'>-	.phy_read		= mv88e6xxx_phy_read,</div><div class='del'>-	.phy_write		= mv88e6xxx_phy_write,</div><div class='del'>-	.poll_link		= mv88e6xxx_poll_link,</div><div class='del'>-	.get_strings		= mv88e6xxx_get_strings,</div><div class='del'>-	.get_ethtool_stats	= mv88e6xxx_get_ethtool_stats,</div><div class='del'>-	.get_sset_count		= mv88e6xxx_get_sset_count,</div><div class='del'>-#ifdef CONFIG_NET_DSA_HWMON</div><div class='del'>-	.get_temp		= mv88e6xxx_get_temp,</div><div class='del'>-#endif</div><div class='del'>-	.get_regs_len		= mv88e6xxx_get_regs_len,</div><div class='del'>-	.get_regs		= mv88e6xxx_get_regs,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-MODULE_ALIAS("platform:mv88e6123");</div><div class='del'>-MODULE_ALIAS("platform:mv88e6161");</div><div class='del'>-MODULE_ALIAS("platform:mv88e6165");</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6131.c b/drivers/net/dsa/mv88e6131.c<br/>deleted file mode 100644<br/>index 32f4a08e9bc9..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6131.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6131.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,190 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * net/dsa/mv88e6131.c - Marvell 88e6095/6095f/6131 switch chip support</div><div class='del'>- * Copyright (c) 2008-2009 Marvell Semiconductor</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/jiffies.h&gt;</div><div class='del'>-#include &lt;linux/list.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/phy.h&gt;</div><div class='del'>-#include &lt;net/dsa.h&gt;</div><div class='del'>-#include "mv88e6xxx.h"</div><div class='del'>-</div><div class='del'>-static char *mv88e6131_probe(struct device *host_dev, int sw_addr)</div><div class='del'>-{</div><div class='del'>-	struct mii_bus *bus = dsa_host_dev_to_mii_bus(host_dev);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (bus == NULL)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	ret = __mv88e6xxx_reg_read(bus, sw_addr, REG_PORT(0), PORT_SWITCH_ID);</div><div class='del'>-	if (ret &gt;= 0) {</div><div class='del'>-		int ret_masked = ret &amp; 0xfff0;</div><div class='del'>-</div><div class='del'>-		if (ret_masked == PORT_SWITCH_ID_6085)</div><div class='del'>-			return "Marvell 88E6085";</div><div class='del'>-		if (ret_masked == PORT_SWITCH_ID_6095)</div><div class='del'>-			return "Marvell 88E6095/88E6095F";</div><div class='del'>-		if (ret == PORT_SWITCH_ID_6131_B2)</div><div class='del'>-			return "Marvell 88E6131 (B2)";</div><div class='del'>-		if (ret_masked == PORT_SWITCH_ID_6131)</div><div class='del'>-			return "Marvell 88E6131";</div><div class='del'>-		if (ret_masked == PORT_SWITCH_ID_6185)</div><div class='del'>-			return "Marvell 88E6185";</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mv88e6131_setup_global(struct dsa_switch *ds)</div><div class='del'>-{</div><div class='del'>-	u32 upstream_port = dsa_upstream_port(ds);</div><div class='del'>-	int ret;</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	ret = mv88e6xxx_setup_global(ds);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	/* Enable the PHY polling unit, don't discard packets with</div><div class='del'>-	 * excessive collisions, use a weighted fair queueing scheme</div><div class='del'>-	 * to arbitrate between packet queues, set the maximum frame</div><div class='del'>-	 * size to 1632, and mask all interrupt sources.</div><div class='del'>-	 */</div><div class='del'>-	REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL,</div><div class='del'>-		  GLOBAL_CONTROL_PPU_ENABLE | GLOBAL_CONTROL_MAX_FRAME_1632);</div><div class='del'>-</div><div class='del'>-	/* Set the VLAN ethertype to 0x8100. */</div><div class='del'>-	REG_WRITE(REG_GLOBAL, GLOBAL_CORE_TAG_TYPE, 0x8100);</div><div class='del'>-</div><div class='del'>-	/* Disable ARP mirroring, and configure the upstream port as</div><div class='del'>-	 * the port to which ingress and egress monitor frames are to</div><div class='del'>-	 * be sent.</div><div class='del'>-	 */</div><div class='del'>-	reg = upstream_port &lt;&lt; GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT |</div><div class='del'>-		upstream_port &lt;&lt; GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT |</div><div class='del'>-		GLOBAL_MONITOR_CONTROL_ARP_DISABLED;</div><div class='del'>-	REG_WRITE(REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg);</div><div class='del'>-</div><div class='del'>-	/* Disable cascade port functionality unless this device</div><div class='del'>-	 * is used in a cascade configuration, and set the switch's</div><div class='del'>-	 * DSA device number.</div><div class='del'>-	 */</div><div class='del'>-	if (ds-&gt;dst-&gt;pd-&gt;nr_chips &gt; 1)</div><div class='del'>-		REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL_2,</div><div class='del'>-			  GLOBAL_CONTROL_2_MULTIPLE_CASCADE |</div><div class='del'>-			  (ds-&gt;index &amp; 0x1f));</div><div class='del'>-	else</div><div class='del'>-		REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL_2,</div><div class='del'>-			  GLOBAL_CONTROL_2_NO_CASCADE |</div><div class='del'>-			  (ds-&gt;index &amp; 0x1f));</div><div class='del'>-</div><div class='del'>-	/* Force the priority of IGMP/MLD snoop frames and ARP frames</div><div class='del'>-	 * to the highest setting.</div><div class='del'>-	 */</div><div class='del'>-	REG_WRITE(REG_GLOBAL2, GLOBAL2_PRIO_OVERRIDE,</div><div class='del'>-		  GLOBAL2_PRIO_OVERRIDE_FORCE_SNOOP |</div><div class='del'>-		  7 &lt;&lt; GLOBAL2_PRIO_OVERRIDE_SNOOP_SHIFT |</div><div class='del'>-		  GLOBAL2_PRIO_OVERRIDE_FORCE_ARP |</div><div class='del'>-		  7 &lt;&lt; GLOBAL2_PRIO_OVERRIDE_ARP_SHIFT);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mv88e6131_setup(struct dsa_switch *ds)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = mv88e6xxx_setup_common(ds);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	mv88e6xxx_ppu_state_init(ds);</div><div class='del'>-</div><div class='del'>-	switch (ps-&gt;id) {</div><div class='del'>-	case PORT_SWITCH_ID_6085:</div><div class='del'>-	case PORT_SWITCH_ID_6185:</div><div class='del'>-		ps-&gt;num_ports = 10;</div><div class='del'>-		break;</div><div class='del'>-	case PORT_SWITCH_ID_6095:</div><div class='del'>-		ps-&gt;num_ports = 11;</div><div class='del'>-		break;</div><div class='del'>-	case PORT_SWITCH_ID_6131:</div><div class='del'>-	case PORT_SWITCH_ID_6131_B2:</div><div class='del'>-		ps-&gt;num_ports = 8;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ret = mv88e6xxx_switch_reset(ds, false);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret = mv88e6131_setup_global(ds);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	return mv88e6xxx_setup_ports(ds);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mv88e6131_port_to_phy_addr(struct dsa_switch *ds, int port)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-</div><div class='del'>-	if (port &gt;= 0 &amp;&amp; port &lt; ps-&gt;num_ports)</div><div class='del'>-		return port;</div><div class='del'>-</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-mv88e6131_phy_read(struct dsa_switch *ds, int port, int regnum)</div><div class='del'>-{</div><div class='del'>-	int addr = mv88e6131_port_to_phy_addr(ds, port);</div><div class='del'>-</div><div class='del'>-	if (addr &lt; 0)</div><div class='del'>-		return addr;</div><div class='del'>-</div><div class='del'>-	return mv88e6xxx_phy_read_ppu(ds, addr, regnum);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-mv88e6131_phy_write(struct dsa_switch *ds,</div><div class='del'>-			      int port, int regnum, u16 val)</div><div class='del'>-{</div><div class='del'>-	int addr = mv88e6131_port_to_phy_addr(ds, port);</div><div class='del'>-</div><div class='del'>-	if (addr &lt; 0)</div><div class='del'>-		return addr;</div><div class='del'>-</div><div class='del'>-	return mv88e6xxx_phy_write_ppu(ds, addr, regnum, val);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct dsa_switch_driver mv88e6131_switch_driver = {</div><div class='del'>-	.tag_protocol		= DSA_TAG_PROTO_DSA,</div><div class='del'>-	.priv_size		= sizeof(struct mv88e6xxx_priv_state),</div><div class='del'>-	.probe			= mv88e6131_probe,</div><div class='del'>-	.setup			= mv88e6131_setup,</div><div class='del'>-	.set_addr		= mv88e6xxx_set_addr_direct,</div><div class='del'>-	.phy_read		= mv88e6131_phy_read,</div><div class='del'>-	.phy_write		= mv88e6131_phy_write,</div><div class='del'>-	.poll_link		= mv88e6xxx_poll_link,</div><div class='del'>-	.get_strings		= mv88e6xxx_get_strings,</div><div class='del'>-	.get_ethtool_stats	= mv88e6xxx_get_ethtool_stats,</div><div class='del'>-	.get_sset_count		= mv88e6xxx_get_sset_count,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-MODULE_ALIAS("platform:mv88e6085");</div><div class='del'>-MODULE_ALIAS("platform:mv88e6095");</div><div class='del'>-MODULE_ALIAS("platform:mv88e6095f");</div><div class='del'>-MODULE_ALIAS("platform:mv88e6131");</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6171.c b/drivers/net/dsa/mv88e6171.c<br/>deleted file mode 100644<br/>index 1c7808495a9d..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6171.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6171.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,127 +0,0 @@</div><div class='del'>-/* net/dsa/mv88e6171.c - Marvell 88e6171 switch chip support</div><div class='del'>- * Copyright (c) 2008-2009 Marvell Semiconductor</div><div class='del'>- * Copyright (c) 2014 Claudio Leite &lt;leitec@staticky.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/jiffies.h&gt;</div><div class='del'>-#include &lt;linux/list.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/phy.h&gt;</div><div class='del'>-#include &lt;net/dsa.h&gt;</div><div class='del'>-#include "mv88e6xxx.h"</div><div class='del'>-</div><div class='del'>-static char *mv88e6171_probe(struct device *host_dev, int sw_addr)</div><div class='del'>-{</div><div class='del'>-	struct mii_bus *bus = dsa_host_dev_to_mii_bus(host_dev);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (bus == NULL)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	ret = __mv88e6xxx_reg_read(bus, sw_addr, REG_PORT(0), PORT_SWITCH_ID);</div><div class='del'>-	if (ret &gt;= 0) {</div><div class='del'>-		if ((ret &amp; 0xfff0) == PORT_SWITCH_ID_6171)</div><div class='del'>-			return "Marvell 88E6171";</div><div class='del'>-		if ((ret &amp; 0xfff0) == PORT_SWITCH_ID_6175)</div><div class='del'>-			return "Marvell 88E6175";</div><div class='del'>-		if ((ret &amp; 0xfff0) == PORT_SWITCH_ID_6350)</div><div class='del'>-			return "Marvell 88E6350";</div><div class='del'>-		if ((ret &amp; 0xfff0) == PORT_SWITCH_ID_6351)</div><div class='del'>-			return "Marvell 88E6351";</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mv88e6171_setup_global(struct dsa_switch *ds)</div><div class='del'>-{</div><div class='del'>-	u32 upstream_port = dsa_upstream_port(ds);</div><div class='del'>-	int ret;</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	ret = mv88e6xxx_setup_global(ds);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	/* Discard packets with excessive collisions, mask all</div><div class='del'>-	 * interrupt sources, enable PPU.</div><div class='del'>-	 */</div><div class='del'>-	REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL,</div><div class='del'>-		  GLOBAL_CONTROL_PPU_ENABLE | GLOBAL_CONTROL_DISCARD_EXCESS);</div><div class='del'>-</div><div class='del'>-	/* Configure the upstream port, and configure the upstream</div><div class='del'>-	 * port as the port to which ingress and egress monitor frames</div><div class='del'>-	 * are to be sent.</div><div class='del'>-	 */</div><div class='del'>-	reg = upstream_port &lt;&lt; GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT |</div><div class='del'>-		upstream_port &lt;&lt; GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT |</div><div class='del'>-		upstream_port &lt;&lt; GLOBAL_MONITOR_CONTROL_ARP_SHIFT |</div><div class='del'>-		upstream_port &lt;&lt; GLOBAL_MONITOR_CONTROL_MIRROR_SHIFT;</div><div class='del'>-	REG_WRITE(REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg);</div><div class='del'>-</div><div class='del'>-	/* Disable remote management for now, and set the switch's</div><div class='del'>-	 * DSA device number.</div><div class='del'>-	 */</div><div class='del'>-	REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL_2, ds-&gt;index &amp; 0x1f);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mv88e6171_setup(struct dsa_switch *ds)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = mv88e6xxx_setup_common(ds);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ps-&gt;num_ports = 7;</div><div class='del'>-</div><div class='del'>-	ret = mv88e6xxx_switch_reset(ds, true);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret = mv88e6171_setup_global(ds);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	return mv88e6xxx_setup_ports(ds);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct dsa_switch_driver mv88e6171_switch_driver = {</div><div class='del'>-	.tag_protocol		= DSA_TAG_PROTO_EDSA,</div><div class='del'>-	.priv_size		= sizeof(struct mv88e6xxx_priv_state),</div><div class='del'>-	.probe			= mv88e6171_probe,</div><div class='del'>-	.setup			= mv88e6171_setup,</div><div class='del'>-	.set_addr		= mv88e6xxx_set_addr_indirect,</div><div class='del'>-	.phy_read		= mv88e6xxx_phy_read_indirect,</div><div class='del'>-	.phy_write		= mv88e6xxx_phy_write_indirect,</div><div class='del'>-	.poll_link		= mv88e6xxx_poll_link,</div><div class='del'>-	.get_strings		= mv88e6xxx_get_strings,</div><div class='del'>-	.get_ethtool_stats	= mv88e6xxx_get_ethtool_stats,</div><div class='del'>-	.get_sset_count		= mv88e6xxx_get_sset_count,</div><div class='del'>-#ifdef CONFIG_NET_DSA_HWMON</div><div class='del'>-	.get_temp               = mv88e6xxx_get_temp,</div><div class='del'>-#endif</div><div class='del'>-	.get_regs_len		= mv88e6xxx_get_regs_len,</div><div class='del'>-	.get_regs		= mv88e6xxx_get_regs,</div><div class='del'>-	.port_join_bridge       = mv88e6xxx_join_bridge,</div><div class='del'>-	.port_leave_bridge      = mv88e6xxx_leave_bridge,</div><div class='del'>-	.port_stp_update        = mv88e6xxx_port_stp_update,</div><div class='del'>-	.fdb_add		= mv88e6xxx_port_fdb_add,</div><div class='del'>-	.fdb_del		= mv88e6xxx_port_fdb_del,</div><div class='del'>-	.fdb_getnext		= mv88e6xxx_port_fdb_getnext,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-MODULE_ALIAS("platform:mv88e6171");</div><div class='del'>-MODULE_ALIAS("platform:mv88e6175");</div><div class='del'>-MODULE_ALIAS("platform:mv88e6350");</div><div class='del'>-MODULE_ALIAS("platform:mv88e6351");</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6352.c b/drivers/net/dsa/mv88e6352.c<br/>deleted file mode 100644<br/>index 632815c10a40..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6352.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6352.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,398 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * net/dsa/mv88e6352.c - Marvell 88e6352 switch chip support</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014 Guenter Roeck</div><div class='del'>- *</div><div class='del'>- * Derived from mv88e6123_61_65.c</div><div class='del'>- * Copyright (c) 2008-2009 Marvell Semiconductor</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/jiffies.h&gt;</div><div class='del'>-#include &lt;linux/list.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/phy.h&gt;</div><div class='del'>-#include &lt;net/dsa.h&gt;</div><div class='del'>-#include "mv88e6xxx.h"</div><div class='del'>-</div><div class='del'>-static char *mv88e6352_probe(struct device *host_dev, int sw_addr)</div><div class='del'>-{</div><div class='del'>-	struct mii_bus *bus = dsa_host_dev_to_mii_bus(host_dev);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (bus == NULL)</div><div class='del'>-		return NULL;</div><div class='del'>-</div><div class='del'>-	ret = __mv88e6xxx_reg_read(bus, sw_addr, REG_PORT(0), PORT_SWITCH_ID);</div><div class='del'>-	if (ret &gt;= 0) {</div><div class='del'>-		if ((ret &amp; 0xfff0) == PORT_SWITCH_ID_6172)</div><div class='del'>-			return "Marvell 88E6172";</div><div class='del'>-		if ((ret &amp; 0xfff0) == PORT_SWITCH_ID_6176)</div><div class='del'>-			return "Marvell 88E6176";</div><div class='del'>-		if (ret == PORT_SWITCH_ID_6352_A0)</div><div class='del'>-			return "Marvell 88E6352 (A0)";</div><div class='del'>-		if (ret == PORT_SWITCH_ID_6352_A1)</div><div class='del'>-			return "Marvell 88E6352 (A1)";</div><div class='del'>-		if ((ret &amp; 0xfff0) == PORT_SWITCH_ID_6352)</div><div class='del'>-			return "Marvell 88E6352";</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mv88e6352_setup_global(struct dsa_switch *ds)</div><div class='del'>-{</div><div class='del'>-	u32 upstream_port = dsa_upstream_port(ds);</div><div class='del'>-	int ret;</div><div class='del'>-	u32 reg;</div><div class='del'>-</div><div class='del'>-	ret = mv88e6xxx_setup_global(ds);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	/* Discard packets with excessive collisions,</div><div class='del'>-	 * mask all interrupt sources, enable PPU (bit 14, undocumented).</div><div class='del'>-	 */</div><div class='del'>-	REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL,</div><div class='del'>-		  GLOBAL_CONTROL_PPU_ENABLE | GLOBAL_CONTROL_DISCARD_EXCESS);</div><div class='del'>-</div><div class='del'>-	/* Configure the upstream port, and configure the upstream</div><div class='del'>-	 * port as the port to which ingress and egress monitor frames</div><div class='del'>-	 * are to be sent.</div><div class='del'>-	 */</div><div class='del'>-	reg = upstream_port &lt;&lt; GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT |</div><div class='del'>-		upstream_port &lt;&lt; GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT |</div><div class='del'>-		upstream_port &lt;&lt; GLOBAL_MONITOR_CONTROL_ARP_SHIFT;</div><div class='del'>-	REG_WRITE(REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg);</div><div class='del'>-</div><div class='del'>-	/* Disable remote management for now, and set the switch's</div><div class='del'>-	 * DSA device number.</div><div class='del'>-	 */</div><div class='del'>-	REG_WRITE(REG_GLOBAL, 0x1c, ds-&gt;index &amp; 0x1f);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_NET_DSA_HWMON</div><div class='del'>-</div><div class='del'>-static int mv88e6352_get_temp(struct dsa_switch *ds, int *temp)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	*temp = 0;</div><div class='del'>-</div><div class='del'>-	ret = mv88e6xxx_phy_page_read(ds, 0, 6, 27);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	*temp = (ret &amp; 0xff) - 25;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mv88e6352_get_temp_limit(struct dsa_switch *ds, int *temp)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	*temp = 0;</div><div class='del'>-</div><div class='del'>-	ret = mv88e6xxx_phy_page_read(ds, 0, 6, 26);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	*temp = (((ret &gt;&gt; 8) &amp; 0x1f) * 5) - 25;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mv88e6352_set_temp_limit(struct dsa_switch *ds, int temp)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = mv88e6xxx_phy_page_read(ds, 0, 6, 26);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-	temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);</div><div class='del'>-	return mv88e6xxx_phy_page_write(ds, 0, 6, 26,</div><div class='del'>-					(ret &amp; 0xe0ff) | (temp &lt;&lt; 8));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mv88e6352_get_temp_alarm(struct dsa_switch *ds, bool *alarm)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	*alarm = false;</div><div class='del'>-</div><div class='del'>-	ret = mv88e6xxx_phy_page_read(ds, 0, 6, 26);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	*alarm = !!(ret &amp; 0x40);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-#endif /* CONFIG_NET_DSA_HWMON */</div><div class='del'>-</div><div class='del'>-static int mv88e6352_setup(struct dsa_switch *ds)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = mv88e6xxx_setup_common(ds);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ps-&gt;num_ports = 7;</div><div class='del'>-</div><div class='del'>-	mutex_init(&amp;ps-&gt;eeprom_mutex);</div><div class='del'>-</div><div class='del'>-	ret = mv88e6xxx_switch_reset(ds, true);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret = mv88e6352_setup_global(ds);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	return mv88e6xxx_setup_ports(ds);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mv88e6352_read_eeprom_word(struct dsa_switch *ds, int addr)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;ps-&gt;eeprom_mutex);</div><div class='del'>-</div><div class='del'>-	ret = mv88e6xxx_reg_write(ds, REG_GLOBAL2, 0x14,</div><div class='del'>-				  0xc000 | (addr &amp; 0xff));</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto error;</div><div class='del'>-</div><div class='del'>-	ret = mv88e6xxx_eeprom_busy_wait(ds);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto error;</div><div class='del'>-</div><div class='del'>-	ret = mv88e6xxx_reg_read(ds, REG_GLOBAL2, 0x15);</div><div class='del'>-error:</div><div class='del'>-	mutex_unlock(&amp;ps-&gt;eeprom_mutex);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mv88e6352_get_eeprom(struct dsa_switch *ds,</div><div class='del'>-				struct ethtool_eeprom *eeprom, u8 *data)</div><div class='del'>-{</div><div class='del'>-	int offset;</div><div class='del'>-	int len;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	offset = eeprom-&gt;offset;</div><div class='del'>-	len = eeprom-&gt;len;</div><div class='del'>-	eeprom-&gt;len = 0;</div><div class='del'>-</div><div class='del'>-	eeprom-&gt;magic = 0xc3ec4951;</div><div class='del'>-</div><div class='del'>-	ret = mv88e6xxx_eeprom_load_wait(ds);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	if (offset &amp; 1) {</div><div class='del'>-		int word;</div><div class='del'>-</div><div class='del'>-		word = mv88e6352_read_eeprom_word(ds, offset &gt;&gt; 1);</div><div class='del'>-		if (word &lt; 0)</div><div class='del'>-			return word;</div><div class='del'>-</div><div class='del'>-		*data++ = (word &gt;&gt; 8) &amp; 0xff;</div><div class='del'>-</div><div class='del'>-		offset++;</div><div class='del'>-		len--;</div><div class='del'>-		eeprom-&gt;len++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (len &gt;= 2) {</div><div class='del'>-		int word;</div><div class='del'>-</div><div class='del'>-		word = mv88e6352_read_eeprom_word(ds, offset &gt;&gt; 1);</div><div class='del'>-		if (word &lt; 0)</div><div class='del'>-			return word;</div><div class='del'>-</div><div class='del'>-		*data++ = word &amp; 0xff;</div><div class='del'>-		*data++ = (word &gt;&gt; 8) &amp; 0xff;</div><div class='del'>-</div><div class='del'>-		offset += 2;</div><div class='del'>-		len -= 2;</div><div class='del'>-		eeprom-&gt;len += 2;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (len) {</div><div class='del'>-		int word;</div><div class='del'>-</div><div class='del'>-		word = mv88e6352_read_eeprom_word(ds, offset &gt;&gt; 1);</div><div class='del'>-		if (word &lt; 0)</div><div class='del'>-			return word;</div><div class='del'>-</div><div class='del'>-		*data++ = word &amp; 0xff;</div><div class='del'>-</div><div class='del'>-		offset++;</div><div class='del'>-		len--;</div><div class='del'>-		eeprom-&gt;len++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mv88e6352_eeprom_is_readonly(struct dsa_switch *ds)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = mv88e6xxx_reg_read(ds, REG_GLOBAL2, 0x14);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	if (!(ret &amp; 0x0400))</div><div class='del'>-		return -EROFS;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mv88e6352_write_eeprom_word(struct dsa_switch *ds, int addr,</div><div class='del'>-				       u16 data)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;ps-&gt;eeprom_mutex);</div><div class='del'>-</div><div class='del'>-	ret = mv88e6xxx_reg_write(ds, REG_GLOBAL2, 0x15, data);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto error;</div><div class='del'>-</div><div class='del'>-	ret = mv88e6xxx_reg_write(ds, REG_GLOBAL2, 0x14,</div><div class='del'>-				  0xb000 | (addr &amp; 0xff));</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto error;</div><div class='del'>-</div><div class='del'>-	ret = mv88e6xxx_eeprom_busy_wait(ds);</div><div class='del'>-error:</div><div class='del'>-	mutex_unlock(&amp;ps-&gt;eeprom_mutex);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mv88e6352_set_eeprom(struct dsa_switch *ds,</div><div class='del'>-				struct ethtool_eeprom *eeprom, u8 *data)</div><div class='del'>-{</div><div class='del'>-	int offset;</div><div class='del'>-	int ret;</div><div class='del'>-	int len;</div><div class='del'>-</div><div class='del'>-	if (eeprom-&gt;magic != 0xc3ec4951)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	ret = mv88e6352_eeprom_is_readonly(ds);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	offset = eeprom-&gt;offset;</div><div class='del'>-	len = eeprom-&gt;len;</div><div class='del'>-	eeprom-&gt;len = 0;</div><div class='del'>-</div><div class='del'>-	ret = mv88e6xxx_eeprom_load_wait(ds);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	if (offset &amp; 1) {</div><div class='del'>-		int word;</div><div class='del'>-</div><div class='del'>-		word = mv88e6352_read_eeprom_word(ds, offset &gt;&gt; 1);</div><div class='del'>-		if (word &lt; 0)</div><div class='del'>-			return word;</div><div class='del'>-</div><div class='del'>-		word = (*data++ &lt;&lt; 8) | (word &amp; 0xff);</div><div class='del'>-</div><div class='del'>-		ret = mv88e6352_write_eeprom_word(ds, offset &gt;&gt; 1, word);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		offset++;</div><div class='del'>-		len--;</div><div class='del'>-		eeprom-&gt;len++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	while (len &gt;= 2) {</div><div class='del'>-		int word;</div><div class='del'>-</div><div class='del'>-		word = *data++;</div><div class='del'>-		word |= *data++ &lt;&lt; 8;</div><div class='del'>-</div><div class='del'>-		ret = mv88e6352_write_eeprom_word(ds, offset &gt;&gt; 1, word);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		offset += 2;</div><div class='del'>-		len -= 2;</div><div class='del'>-		eeprom-&gt;len += 2;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (len) {</div><div class='del'>-		int word;</div><div class='del'>-</div><div class='del'>-		word = mv88e6352_read_eeprom_word(ds, offset &gt;&gt; 1);</div><div class='del'>-		if (word &lt; 0)</div><div class='del'>-			return word;</div><div class='del'>-</div><div class='del'>-		word = (word &amp; 0xff00) | *data++;</div><div class='del'>-</div><div class='del'>-		ret = mv88e6352_write_eeprom_word(ds, offset &gt;&gt; 1, word);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		offset++;</div><div class='del'>-		len--;</div><div class='del'>-		eeprom-&gt;len++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-struct dsa_switch_driver mv88e6352_switch_driver = {</div><div class='del'>-	.tag_protocol		= DSA_TAG_PROTO_EDSA,</div><div class='del'>-	.priv_size		= sizeof(struct mv88e6xxx_priv_state),</div><div class='del'>-	.probe			= mv88e6352_probe,</div><div class='del'>-	.setup			= mv88e6352_setup,</div><div class='del'>-	.set_addr		= mv88e6xxx_set_addr_indirect,</div><div class='del'>-	.phy_read		= mv88e6xxx_phy_read_indirect,</div><div class='del'>-	.phy_write		= mv88e6xxx_phy_write_indirect,</div><div class='del'>-	.poll_link		= mv88e6xxx_poll_link,</div><div class='del'>-	.get_strings		= mv88e6xxx_get_strings,</div><div class='del'>-	.get_ethtool_stats	= mv88e6xxx_get_ethtool_stats,</div><div class='del'>-	.get_sset_count		= mv88e6xxx_get_sset_count,</div><div class='del'>-	.set_eee		= mv88e6xxx_set_eee,</div><div class='del'>-	.get_eee		= mv88e6xxx_get_eee,</div><div class='del'>-#ifdef CONFIG_NET_DSA_HWMON</div><div class='del'>-	.get_temp		= mv88e6352_get_temp,</div><div class='del'>-	.get_temp_limit		= mv88e6352_get_temp_limit,</div><div class='del'>-	.set_temp_limit		= mv88e6352_set_temp_limit,</div><div class='del'>-	.get_temp_alarm		= mv88e6352_get_temp_alarm,</div><div class='del'>-#endif</div><div class='del'>-	.get_eeprom		= mv88e6352_get_eeprom,</div><div class='del'>-	.set_eeprom		= mv88e6352_set_eeprom,</div><div class='del'>-	.get_regs_len		= mv88e6xxx_get_regs_len,</div><div class='del'>-	.get_regs		= mv88e6xxx_get_regs,</div><div class='del'>-	.port_join_bridge	= mv88e6xxx_join_bridge,</div><div class='del'>-	.port_leave_bridge	= mv88e6xxx_leave_bridge,</div><div class='del'>-	.port_stp_update	= mv88e6xxx_port_stp_update,</div><div class='del'>-	.fdb_add		= mv88e6xxx_port_fdb_add,</div><div class='del'>-	.fdb_del		= mv88e6xxx_port_fdb_del,</div><div class='del'>-	.fdb_getnext		= mv88e6xxx_port_fdb_getnext,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-MODULE_ALIAS("platform:mv88e6352");</div><div class='del'>-MODULE_ALIAS("platform:mv88e6172");</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx.c b/drivers/net/dsa/mv88e6xxx.c<br/>deleted file mode 100644<br/>index 561342466076..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,2202 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * net/dsa/mv88e6xxx.c - Marvell 88e6xxx switch chip support</div><div class='del'>- * Copyright (c) 2008 Marvell Semiconductor</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/debugfs.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/etherdevice.h&gt;</div><div class='del'>-#include &lt;linux/if_bridge.h&gt;</div><div class='del'>-#include &lt;linux/jiffies.h&gt;</div><div class='del'>-#include &lt;linux/list.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/phy.h&gt;</div><div class='del'>-#include &lt;linux/seq_file.h&gt;</div><div class='del'>-#include &lt;net/dsa.h&gt;</div><div class='del'>-#include "mv88e6xxx.h"</div><div class='del'>-</div><div class='del'>-/* MDIO bus access can be nested in the case of PHYs connected to the</div><div class='del'>- * internal MDIO bus of the switch, which is accessed via MDIO bus of</div><div class='del'>- * the Ethernet interface. Avoid lockdep false positives by using</div><div class='del'>- * mutex_lock_nested().</div><div class='del'>- */</div><div class='del'>-static int mv88e6xxx_mdiobus_read(struct mii_bus *bus, int addr, u32 regnum)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	mutex_lock_nested(&amp;bus-&gt;mdio_lock, SINGLE_DEPTH_NESTING);</div><div class='del'>-	ret = bus-&gt;read(bus, addr, regnum);</div><div class='del'>-	mutex_unlock(&amp;bus-&gt;mdio_lock);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mv88e6xxx_mdiobus_write(struct mii_bus *bus, int addr, u32 regnum,</div><div class='del'>-				   u16 val)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	mutex_lock_nested(&amp;bus-&gt;mdio_lock, SINGLE_DEPTH_NESTING);</div><div class='del'>-	ret = bus-&gt;write(bus, addr, regnum, val);</div><div class='del'>-	mutex_unlock(&amp;bus-&gt;mdio_lock);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* If the switch's ADDR[4:0] strap pins are strapped to zero, it will</div><div class='del'>- * use all 32 SMI bus addresses on its SMI bus, and all switch registers</div><div class='del'>- * will be directly accessible on some {device address,register address}</div><div class='del'>- * pair.  If the ADDR[4:0] pins are not strapped to zero, the switch</div><div class='del'>- * will only respond to SMI transactions to that specific address, and</div><div class='del'>- * an indirect addressing mechanism needs to be used to access its</div><div class='del'>- * registers.</div><div class='del'>- */</div><div class='del'>-static int mv88e6xxx_reg_wait_ready(struct mii_bus *bus, int sw_addr)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; 16; i++) {</div><div class='del'>-		ret = mv88e6xxx_mdiobus_read(bus, sw_addr, SMI_CMD);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		if ((ret &amp; SMI_CMD_BUSY) == 0)</div><div class='del'>-			return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return -ETIMEDOUT;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int __mv88e6xxx_reg_read(struct mii_bus *bus, int sw_addr, int addr, int reg)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (sw_addr == 0)</div><div class='del'>-		return mv88e6xxx_mdiobus_read(bus, addr, reg);</div><div class='del'>-</div><div class='del'>-	/* Wait for the bus to become free. */</div><div class='del'>-	ret = mv88e6xxx_reg_wait_ready(bus, sw_addr);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	/* Transmit the read command. */</div><div class='del'>-	ret = mv88e6xxx_mdiobus_write(bus, sw_addr, SMI_CMD,</div><div class='del'>-				      SMI_CMD_OP_22_READ | (addr &lt;&lt; 5) | reg);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	/* Wait for the read command to complete. */</div><div class='del'>-	ret = mv88e6xxx_reg_wait_ready(bus, sw_addr);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	/* Read the data. */</div><div class='del'>-	ret = mv88e6xxx_mdiobus_read(bus, sw_addr, SMI_DATA);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	return ret &amp; 0xffff;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Must be called with SMI mutex held */</div><div class='del'>-static int _mv88e6xxx_reg_read(struct dsa_switch *ds, int addr, int reg)</div><div class='del'>-{</div><div class='del'>-	struct mii_bus *bus = dsa_host_dev_to_mii_bus(ds-&gt;master_dev);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (bus == NULL)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	ret = __mv88e6xxx_reg_read(bus, ds-&gt;pd-&gt;sw_addr, addr, reg);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	dev_dbg(ds-&gt;master_dev, "&lt;- addr: 0x%.2x reg: 0x%.2x val: 0x%.4x\n",</div><div class='del'>-		addr, reg, ret);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int mv88e6xxx_reg_read(struct dsa_switch *ds, int addr, int reg)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-	ret = _mv88e6xxx_reg_read(ds, addr, reg);</div><div class='del'>-	mutex_unlock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int __mv88e6xxx_reg_write(struct mii_bus *bus, int sw_addr, int addr,</div><div class='del'>-			  int reg, u16 val)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (sw_addr == 0)</div><div class='del'>-		return mv88e6xxx_mdiobus_write(bus, addr, reg, val);</div><div class='del'>-</div><div class='del'>-	/* Wait for the bus to become free. */</div><div class='del'>-	ret = mv88e6xxx_reg_wait_ready(bus, sw_addr);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	/* Transmit the data to write. */</div><div class='del'>-	ret = mv88e6xxx_mdiobus_write(bus, sw_addr, SMI_DATA, val);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	/* Transmit the write command. */</div><div class='del'>-	ret = mv88e6xxx_mdiobus_write(bus, sw_addr, SMI_CMD,</div><div class='del'>-				      SMI_CMD_OP_22_WRITE | (addr &lt;&lt; 5) | reg);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	/* Wait for the write command to complete. */</div><div class='del'>-	ret = mv88e6xxx_reg_wait_ready(bus, sw_addr);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Must be called with SMI mutex held */</div><div class='del'>-static int _mv88e6xxx_reg_write(struct dsa_switch *ds, int addr, int reg,</div><div class='del'>-				u16 val)</div><div class='del'>-{</div><div class='del'>-	struct mii_bus *bus = dsa_host_dev_to_mii_bus(ds-&gt;master_dev);</div><div class='del'>-</div><div class='del'>-	if (bus == NULL)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	dev_dbg(ds-&gt;master_dev, "-&gt; addr: 0x%.2x reg: 0x%.2x val: 0x%.4x\n",</div><div class='del'>-		addr, reg, val);</div><div class='del'>-</div><div class='del'>-	return __mv88e6xxx_reg_write(bus, ds-&gt;pd-&gt;sw_addr, addr, reg, val);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int mv88e6xxx_reg_write(struct dsa_switch *ds, int addr, int reg, u16 val)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-	ret = _mv88e6xxx_reg_write(ds, addr, reg, val);</div><div class='del'>-	mutex_unlock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int mv88e6xxx_set_addr_direct(struct dsa_switch *ds, u8 *addr)</div><div class='del'>-{</div><div class='del'>-	REG_WRITE(REG_GLOBAL, GLOBAL_MAC_01, (addr[0] &lt;&lt; 8) | addr[1]);</div><div class='del'>-	REG_WRITE(REG_GLOBAL, GLOBAL_MAC_23, (addr[2] &lt;&lt; 8) | addr[3]);</div><div class='del'>-	REG_WRITE(REG_GLOBAL, GLOBAL_MAC_45, (addr[4] &lt;&lt; 8) | addr[5]);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int mv88e6xxx_set_addr_indirect(struct dsa_switch *ds, u8 *addr)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; 6; i++) {</div><div class='del'>-		int j;</div><div class='del'>-</div><div class='del'>-		/* Write the MAC address byte. */</div><div class='del'>-		REG_WRITE(REG_GLOBAL2, GLOBAL2_SWITCH_MAC,</div><div class='del'>-			  GLOBAL2_SWITCH_MAC_BUSY | (i &lt;&lt; 8) | addr[i]);</div><div class='del'>-</div><div class='del'>-		/* Wait for the write to complete. */</div><div class='del'>-		for (j = 0; j &lt; 16; j++) {</div><div class='del'>-			ret = REG_READ(REG_GLOBAL2, GLOBAL2_SWITCH_MAC);</div><div class='del'>-			if ((ret &amp; GLOBAL2_SWITCH_MAC_BUSY) == 0)</div><div class='del'>-				break;</div><div class='del'>-		}</div><div class='del'>-		if (j == 16)</div><div class='del'>-			return -ETIMEDOUT;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Must be called with SMI mutex held */</div><div class='del'>-static int _mv88e6xxx_phy_read(struct dsa_switch *ds, int addr, int regnum)</div><div class='del'>-{</div><div class='del'>-	if (addr &gt;= 0)</div><div class='del'>-		return _mv88e6xxx_reg_read(ds, addr, regnum);</div><div class='del'>-	return 0xffff;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Must be called with SMI mutex held */</div><div class='del'>-static int _mv88e6xxx_phy_write(struct dsa_switch *ds, int addr, int regnum,</div><div class='del'>-				u16 val)</div><div class='del'>-{</div><div class='del'>-	if (addr &gt;= 0)</div><div class='del'>-		return _mv88e6xxx_reg_write(ds, addr, regnum, val);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_NET_DSA_MV88E6XXX_NEED_PPU</div><div class='del'>-static int mv88e6xxx_ppu_disable(struct dsa_switch *ds)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-	unsigned long timeout;</div><div class='del'>-</div><div class='del'>-	ret = REG_READ(REG_GLOBAL, GLOBAL_CONTROL);</div><div class='del'>-	REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL,</div><div class='del'>-		  ret &amp; ~GLOBAL_CONTROL_PPU_ENABLE);</div><div class='del'>-</div><div class='del'>-	timeout = jiffies + 1 * HZ;</div><div class='del'>-	while (time_before(jiffies, timeout)) {</div><div class='del'>-		ret = REG_READ(REG_GLOBAL, GLOBAL_STATUS);</div><div class='del'>-		usleep_range(1000, 2000);</div><div class='del'>-		if ((ret &amp; GLOBAL_STATUS_PPU_MASK) !=</div><div class='del'>-		    GLOBAL_STATUS_PPU_POLLING)</div><div class='del'>-			return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return -ETIMEDOUT;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mv88e6xxx_ppu_enable(struct dsa_switch *ds)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-	unsigned long timeout;</div><div class='del'>-</div><div class='del'>-	ret = REG_READ(REG_GLOBAL, GLOBAL_CONTROL);</div><div class='del'>-	REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL, ret | GLOBAL_CONTROL_PPU_ENABLE);</div><div class='del'>-</div><div class='del'>-	timeout = jiffies + 1 * HZ;</div><div class='del'>-	while (time_before(jiffies, timeout)) {</div><div class='del'>-		ret = REG_READ(REG_GLOBAL, GLOBAL_STATUS);</div><div class='del'>-		usleep_range(1000, 2000);</div><div class='del'>-		if ((ret &amp; GLOBAL_STATUS_PPU_MASK) ==</div><div class='del'>-		    GLOBAL_STATUS_PPU_POLLING)</div><div class='del'>-			return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return -ETIMEDOUT;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void mv88e6xxx_ppu_reenable_work(struct work_struct *ugly)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps;</div><div class='del'>-</div><div class='del'>-	ps = container_of(ugly, struct mv88e6xxx_priv_state, ppu_work);</div><div class='del'>-	if (mutex_trylock(&amp;ps-&gt;ppu_mutex)) {</div><div class='del'>-		struct dsa_switch *ds = ((struct dsa_switch *)ps) - 1;</div><div class='del'>-</div><div class='del'>-		if (mv88e6xxx_ppu_enable(ds) == 0)</div><div class='del'>-			ps-&gt;ppu_disabled = 0;</div><div class='del'>-		mutex_unlock(&amp;ps-&gt;ppu_mutex);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void mv88e6xxx_ppu_reenable_timer(unsigned long _ps)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = (void *)_ps;</div><div class='del'>-</div><div class='del'>-	schedule_work(&amp;ps-&gt;ppu_work);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mv88e6xxx_ppu_access_get(struct dsa_switch *ds)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;ps-&gt;ppu_mutex);</div><div class='del'>-</div><div class='del'>-	/* If the PHY polling unit is enabled, disable it so that</div><div class='del'>-	 * we can access the PHY registers.  If it was already</div><div class='del'>-	 * disabled, cancel the timer that is going to re-enable</div><div class='del'>-	 * it.</div><div class='del'>-	 */</div><div class='del'>-	if (!ps-&gt;ppu_disabled) {</div><div class='del'>-		ret = mv88e6xxx_ppu_disable(ds);</div><div class='del'>-		if (ret &lt; 0) {</div><div class='del'>-			mutex_unlock(&amp;ps-&gt;ppu_mutex);</div><div class='del'>-			return ret;</div><div class='del'>-		}</div><div class='del'>-		ps-&gt;ppu_disabled = 1;</div><div class='del'>-	} else {</div><div class='del'>-		del_timer(&amp;ps-&gt;ppu_timer);</div><div class='del'>-		ret = 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void mv88e6xxx_ppu_access_put(struct dsa_switch *ds)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-</div><div class='del'>-	/* Schedule a timer to re-enable the PHY polling unit. */</div><div class='del'>-	mod_timer(&amp;ps-&gt;ppu_timer, jiffies + msecs_to_jiffies(10));</div><div class='del'>-	mutex_unlock(&amp;ps-&gt;ppu_mutex);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void mv88e6xxx_ppu_state_init(struct dsa_switch *ds)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-</div><div class='del'>-	mutex_init(&amp;ps-&gt;ppu_mutex);</div><div class='del'>-	INIT_WORK(&amp;ps-&gt;ppu_work, mv88e6xxx_ppu_reenable_work);</div><div class='del'>-	init_timer(&amp;ps-&gt;ppu_timer);</div><div class='del'>-	ps-&gt;ppu_timer.data = (unsigned long)ps;</div><div class='del'>-	ps-&gt;ppu_timer.function = mv88e6xxx_ppu_reenable_timer;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int mv88e6xxx_phy_read_ppu(struct dsa_switch *ds, int addr, int regnum)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = mv88e6xxx_ppu_access_get(ds);</div><div class='del'>-	if (ret &gt;= 0) {</div><div class='del'>-		ret = mv88e6xxx_reg_read(ds, addr, regnum);</div><div class='del'>-		mv88e6xxx_ppu_access_put(ds);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int mv88e6xxx_phy_write_ppu(struct dsa_switch *ds, int addr,</div><div class='del'>-			    int regnum, u16 val)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = mv88e6xxx_ppu_access_get(ds);</div><div class='del'>-	if (ret &gt;= 0) {</div><div class='del'>-		ret = mv88e6xxx_reg_write(ds, addr, regnum, val);</div><div class='del'>-		mv88e6xxx_ppu_access_put(ds);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-void mv88e6xxx_poll_link(struct dsa_switch *ds)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; DSA_MAX_PORTS; i++) {</div><div class='del'>-		struct net_device *dev;</div><div class='del'>-		int uninitialized_var(port_status);</div><div class='del'>-		int link;</div><div class='del'>-		int speed;</div><div class='del'>-		int duplex;</div><div class='del'>-		int fc;</div><div class='del'>-</div><div class='del'>-		dev = ds-&gt;ports[i];</div><div class='del'>-		if (dev == NULL)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		link = 0;</div><div class='del'>-		if (dev-&gt;flags &amp; IFF_UP) {</div><div class='del'>-			port_status = mv88e6xxx_reg_read(ds, REG_PORT(i),</div><div class='del'>-							 PORT_STATUS);</div><div class='del'>-			if (port_status &lt; 0)</div><div class='del'>-				continue;</div><div class='del'>-</div><div class='del'>-			link = !!(port_status &amp; PORT_STATUS_LINK);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (!link) {</div><div class='del'>-			if (netif_carrier_ok(dev)) {</div><div class='del'>-				netdev_info(dev, "link down\n");</div><div class='del'>-				netif_carrier_off(dev);</div><div class='del'>-			}</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		switch (port_status &amp; PORT_STATUS_SPEED_MASK) {</div><div class='del'>-		case PORT_STATUS_SPEED_10:</div><div class='del'>-			speed = 10;</div><div class='del'>-			break;</div><div class='del'>-		case PORT_STATUS_SPEED_100:</div><div class='del'>-			speed = 100;</div><div class='del'>-			break;</div><div class='del'>-		case PORT_STATUS_SPEED_1000:</div><div class='del'>-			speed = 1000;</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			speed = -1;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-		duplex = (port_status &amp; PORT_STATUS_DUPLEX) ? 1 : 0;</div><div class='del'>-		fc = (port_status &amp; PORT_STATUS_PAUSE_EN) ? 1 : 0;</div><div class='del'>-</div><div class='del'>-		if (!netif_carrier_ok(dev)) {</div><div class='del'>-			netdev_info(dev,</div><div class='del'>-				    "link up, %d Mb/s, %s duplex, flow control %sabled\n",</div><div class='del'>-				    speed,</div><div class='del'>-				    duplex ? "full" : "half",</div><div class='del'>-				    fc ? "en" : "dis");</div><div class='del'>-			netif_carrier_on(dev);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool mv88e6xxx_6065_family(struct dsa_switch *ds)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-</div><div class='del'>-	switch (ps-&gt;id) {</div><div class='del'>-	case PORT_SWITCH_ID_6031:</div><div class='del'>-	case PORT_SWITCH_ID_6061:</div><div class='del'>-	case PORT_SWITCH_ID_6035:</div><div class='del'>-	case PORT_SWITCH_ID_6065:</div><div class='del'>-		return true;</div><div class='del'>-	}</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool mv88e6xxx_6095_family(struct dsa_switch *ds)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-</div><div class='del'>-	switch (ps-&gt;id) {</div><div class='del'>-	case PORT_SWITCH_ID_6092:</div><div class='del'>-	case PORT_SWITCH_ID_6095:</div><div class='del'>-		return true;</div><div class='del'>-	}</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool mv88e6xxx_6097_family(struct dsa_switch *ds)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-</div><div class='del'>-	switch (ps-&gt;id) {</div><div class='del'>-	case PORT_SWITCH_ID_6046:</div><div class='del'>-	case PORT_SWITCH_ID_6085:</div><div class='del'>-	case PORT_SWITCH_ID_6096:</div><div class='del'>-	case PORT_SWITCH_ID_6097:</div><div class='del'>-		return true;</div><div class='del'>-	}</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool mv88e6xxx_6165_family(struct dsa_switch *ds)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-</div><div class='del'>-	switch (ps-&gt;id) {</div><div class='del'>-	case PORT_SWITCH_ID_6123:</div><div class='del'>-	case PORT_SWITCH_ID_6161:</div><div class='del'>-	case PORT_SWITCH_ID_6165:</div><div class='del'>-		return true;</div><div class='del'>-	}</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool mv88e6xxx_6185_family(struct dsa_switch *ds)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-</div><div class='del'>-	switch (ps-&gt;id) {</div><div class='del'>-	case PORT_SWITCH_ID_6121:</div><div class='del'>-	case PORT_SWITCH_ID_6122:</div><div class='del'>-	case PORT_SWITCH_ID_6152:</div><div class='del'>-	case PORT_SWITCH_ID_6155:</div><div class='del'>-	case PORT_SWITCH_ID_6182:</div><div class='del'>-	case PORT_SWITCH_ID_6185:</div><div class='del'>-	case PORT_SWITCH_ID_6108:</div><div class='del'>-	case PORT_SWITCH_ID_6131:</div><div class='del'>-		return true;</div><div class='del'>-	}</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool mv88e6xxx_6351_family(struct dsa_switch *ds)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-</div><div class='del'>-	switch (ps-&gt;id) {</div><div class='del'>-	case PORT_SWITCH_ID_6171:</div><div class='del'>-	case PORT_SWITCH_ID_6175:</div><div class='del'>-	case PORT_SWITCH_ID_6350:</div><div class='del'>-	case PORT_SWITCH_ID_6351:</div><div class='del'>-		return true;</div><div class='del'>-	}</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static bool mv88e6xxx_6352_family(struct dsa_switch *ds)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-</div><div class='del'>-	switch (ps-&gt;id) {</div><div class='del'>-	case PORT_SWITCH_ID_6172:</div><div class='del'>-	case PORT_SWITCH_ID_6176:</div><div class='del'>-	case PORT_SWITCH_ID_6240:</div><div class='del'>-	case PORT_SWITCH_ID_6352:</div><div class='del'>-		return true;</div><div class='del'>-	}</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Must be called with SMI mutex held */</div><div class='del'>-static int _mv88e6xxx_stats_wait(struct dsa_switch *ds)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; 10; i++) {</div><div class='del'>-		ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_STATS_OP);</div><div class='del'>-		if ((ret &amp; GLOBAL_STATS_OP_BUSY) == 0)</div><div class='del'>-			return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return -ETIMEDOUT;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Must be called with SMI mutex held */</div><div class='del'>-static int _mv88e6xxx_stats_snapshot(struct dsa_switch *ds, int port)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (mv88e6xxx_6352_family(ds))</div><div class='del'>-		port = (port + 1) &lt;&lt; 5;</div><div class='del'>-</div><div class='del'>-	/* Snapshot the hardware statistics counters for this port. */</div><div class='del'>-	ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_STATS_OP,</div><div class='del'>-				   GLOBAL_STATS_OP_CAPTURE_PORT |</div><div class='del'>-				   GLOBAL_STATS_OP_HIST_RX_TX | port);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	/* Wait for the snapshotting to complete. */</div><div class='del'>-	ret = _mv88e6xxx_stats_wait(ds);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Must be called with SMI mutex held */</div><div class='del'>-static void _mv88e6xxx_stats_read(struct dsa_switch *ds, int stat, u32 *val)</div><div class='del'>-{</div><div class='del'>-	u32 _val;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	*val = 0;</div><div class='del'>-</div><div class='del'>-	ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_STATS_OP,</div><div class='del'>-				   GLOBAL_STATS_OP_READ_CAPTURED |</div><div class='del'>-				   GLOBAL_STATS_OP_HIST_RX_TX | stat);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	ret = _mv88e6xxx_stats_wait(ds);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_STATS_COUNTER_32);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	_val = ret &lt;&lt; 16;</div><div class='del'>-</div><div class='del'>-	ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_STATS_COUNTER_01);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	*val = _val | ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct mv88e6xxx_hw_stat mv88e6xxx_hw_stats[] = {</div><div class='del'>-	{ "in_good_octets", 8, 0x00, },</div><div class='del'>-	{ "in_bad_octets", 4, 0x02, },</div><div class='del'>-	{ "in_unicast", 4, 0x04, },</div><div class='del'>-	{ "in_broadcasts", 4, 0x06, },</div><div class='del'>-	{ "in_multicasts", 4, 0x07, },</div><div class='del'>-	{ "in_pause", 4, 0x16, },</div><div class='del'>-	{ "in_undersize", 4, 0x18, },</div><div class='del'>-	{ "in_fragments", 4, 0x19, },</div><div class='del'>-	{ "in_oversize", 4, 0x1a, },</div><div class='del'>-	{ "in_jabber", 4, 0x1b, },</div><div class='del'>-	{ "in_rx_error", 4, 0x1c, },</div><div class='del'>-	{ "in_fcs_error", 4, 0x1d, },</div><div class='del'>-	{ "out_octets", 8, 0x0e, },</div><div class='del'>-	{ "out_unicast", 4, 0x10, },</div><div class='del'>-	{ "out_broadcasts", 4, 0x13, },</div><div class='del'>-	{ "out_multicasts", 4, 0x12, },</div><div class='del'>-	{ "out_pause", 4, 0x15, },</div><div class='del'>-	{ "excessive", 4, 0x11, },</div><div class='del'>-	{ "collisions", 4, 0x1e, },</div><div class='del'>-	{ "deferred", 4, 0x05, },</div><div class='del'>-	{ "single", 4, 0x14, },</div><div class='del'>-	{ "multiple", 4, 0x17, },</div><div class='del'>-	{ "out_fcs_error", 4, 0x03, },</div><div class='del'>-	{ "late", 4, 0x1f, },</div><div class='del'>-	{ "hist_64bytes", 4, 0x08, },</div><div class='del'>-	{ "hist_65_127bytes", 4, 0x09, },</div><div class='del'>-	{ "hist_128_255bytes", 4, 0x0a, },</div><div class='del'>-	{ "hist_256_511bytes", 4, 0x0b, },</div><div class='del'>-	{ "hist_512_1023bytes", 4, 0x0c, },</div><div class='del'>-	{ "hist_1024_max_bytes", 4, 0x0d, },</div><div class='del'>-	/* Not all devices have the following counters */</div><div class='del'>-	{ "sw_in_discards", 4, 0x110, },</div><div class='del'>-	{ "sw_in_filtered", 2, 0x112, },</div><div class='del'>-	{ "sw_out_filtered", 2, 0x113, },</div><div class='del'>-</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static bool have_sw_in_discards(struct dsa_switch *ds)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-</div><div class='del'>-	switch (ps-&gt;id) {</div><div class='del'>-	case PORT_SWITCH_ID_6095: case PORT_SWITCH_ID_6161:</div><div class='del'>-	case PORT_SWITCH_ID_6165: case PORT_SWITCH_ID_6171:</div><div class='del'>-	case PORT_SWITCH_ID_6172: case PORT_SWITCH_ID_6176:</div><div class='del'>-	case PORT_SWITCH_ID_6182: case PORT_SWITCH_ID_6185:</div><div class='del'>-	case PORT_SWITCH_ID_6352:</div><div class='del'>-		return true;</div><div class='del'>-	default:</div><div class='del'>-		return false;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void _mv88e6xxx_get_strings(struct dsa_switch *ds,</div><div class='del'>-				   int nr_stats,</div><div class='del'>-				   struct mv88e6xxx_hw_stat *stats,</div><div class='del'>-				   int port, uint8_t *data)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; nr_stats; i++) {</div><div class='del'>-		memcpy(data + i * ETH_GSTRING_LEN,</div><div class='del'>-		       stats[i].string, ETH_GSTRING_LEN);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static uint64_t _mv88e6xxx_get_ethtool_stat(struct dsa_switch *ds,</div><div class='del'>-					    int stat,</div><div class='del'>-					    struct mv88e6xxx_hw_stat *stats,</div><div class='del'>-					    int port)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_hw_stat *s = stats + stat;</div><div class='del'>-	u32 low;</div><div class='del'>-	u32 high = 0;</div><div class='del'>-	int ret;</div><div class='del'>-	u64 value;</div><div class='del'>-</div><div class='del'>-	if (s-&gt;reg &gt;= 0x100) {</div><div class='del'>-		ret = _mv88e6xxx_reg_read(ds, REG_PORT(port),</div><div class='del'>-					  s-&gt;reg - 0x100);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			return UINT64_MAX;</div><div class='del'>-</div><div class='del'>-		low = ret;</div><div class='del'>-		if (s-&gt;sizeof_stat == 4) {</div><div class='del'>-			ret = _mv88e6xxx_reg_read(ds, REG_PORT(port),</div><div class='del'>-						  s-&gt;reg - 0x100 + 1);</div><div class='del'>-			if (ret &lt; 0)</div><div class='del'>-				return UINT64_MAX;</div><div class='del'>-			high = ret;</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		_mv88e6xxx_stats_read(ds, s-&gt;reg, &amp;low);</div><div class='del'>-		if (s-&gt;sizeof_stat == 8)</div><div class='del'>-			_mv88e6xxx_stats_read(ds, s-&gt;reg + 1, &amp;high);</div><div class='del'>-	}</div><div class='del'>-	value = (((u64)high) &lt;&lt; 16) | low;</div><div class='del'>-	return value;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void _mv88e6xxx_get_ethtool_stats(struct dsa_switch *ds,</div><div class='del'>-					 int nr_stats,</div><div class='del'>-					 struct mv88e6xxx_hw_stat *stats,</div><div class='del'>-					 int port, uint64_t *data)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	int ret;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-</div><div class='del'>-	ret = _mv88e6xxx_stats_snapshot(ds, port);</div><div class='del'>-	if (ret &lt; 0) {</div><div class='del'>-		mutex_unlock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-		return;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Read each of the counters. */</div><div class='del'>-	for (i = 0; i &lt; nr_stats; i++)</div><div class='del'>-		data[i] = _mv88e6xxx_get_ethtool_stat(ds, i, stats, port);</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* All the statistics in the table */</div><div class='del'>-void</div><div class='del'>-mv88e6xxx_get_strings(struct dsa_switch *ds, int port, uint8_t *data)</div><div class='del'>-{</div><div class='del'>-	if (have_sw_in_discards(ds))</div><div class='del'>-		_mv88e6xxx_get_strings(ds, ARRAY_SIZE(mv88e6xxx_hw_stats),</div><div class='del'>-				       mv88e6xxx_hw_stats, port, data);</div><div class='del'>-	else</div><div class='del'>-		_mv88e6xxx_get_strings(ds, ARRAY_SIZE(mv88e6xxx_hw_stats) - 3,</div><div class='del'>-				       mv88e6xxx_hw_stats, port, data);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int mv88e6xxx_get_sset_count(struct dsa_switch *ds)</div><div class='del'>-{</div><div class='del'>-	if (have_sw_in_discards(ds))</div><div class='del'>-		return ARRAY_SIZE(mv88e6xxx_hw_stats);</div><div class='del'>-	return ARRAY_SIZE(mv88e6xxx_hw_stats) - 3;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void</div><div class='del'>-mv88e6xxx_get_ethtool_stats(struct dsa_switch *ds,</div><div class='del'>-			    int port, uint64_t *data)</div><div class='del'>-{</div><div class='del'>-	if (have_sw_in_discards(ds))</div><div class='del'>-		_mv88e6xxx_get_ethtool_stats(</div><div class='del'>-			ds, ARRAY_SIZE(mv88e6xxx_hw_stats),</div><div class='del'>-			mv88e6xxx_hw_stats, port, data);</div><div class='del'>-	else</div><div class='del'>-		_mv88e6xxx_get_ethtool_stats(</div><div class='del'>-			ds, ARRAY_SIZE(mv88e6xxx_hw_stats) - 3,</div><div class='del'>-			mv88e6xxx_hw_stats, port, data);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int mv88e6xxx_get_regs_len(struct dsa_switch *ds, int port)</div><div class='del'>-{</div><div class='del'>-	return 32 * sizeof(u16);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void mv88e6xxx_get_regs(struct dsa_switch *ds, int port,</div><div class='del'>-			struct ethtool_regs *regs, void *_p)</div><div class='del'>-{</div><div class='del'>-	u16 *p = _p;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	regs-&gt;version = 0;</div><div class='del'>-</div><div class='del'>-	memset(p, 0xff, 32 * sizeof(u16));</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; 32; i++) {</div><div class='del'>-		int ret;</div><div class='del'>-</div><div class='del'>-		ret = mv88e6xxx_reg_read(ds, REG_PORT(port), i);</div><div class='del'>-		if (ret &gt;= 0)</div><div class='del'>-			p[i] = ret;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_NET_DSA_HWMON</div><div class='del'>-</div><div class='del'>-int  mv88e6xxx_get_temp(struct dsa_switch *ds, int *temp)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	int ret;</div><div class='del'>-	int val;</div><div class='del'>-</div><div class='del'>-	*temp = 0;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-</div><div class='del'>-	ret = _mv88e6xxx_phy_write(ds, 0x0, 0x16, 0x6);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto error;</div><div class='del'>-</div><div class='del'>-	/* Enable temperature sensor */</div><div class='del'>-	ret = _mv88e6xxx_phy_read(ds, 0x0, 0x1a);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto error;</div><div class='del'>-</div><div class='del'>-	ret = _mv88e6xxx_phy_write(ds, 0x0, 0x1a, ret | (1 &lt;&lt; 5));</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto error;</div><div class='del'>-</div><div class='del'>-	/* Wait for temperature to stabilize */</div><div class='del'>-	usleep_range(10000, 12000);</div><div class='del'>-</div><div class='del'>-	val = _mv88e6xxx_phy_read(ds, 0x0, 0x1a);</div><div class='del'>-	if (val &lt; 0) {</div><div class='del'>-		ret = val;</div><div class='del'>-		goto error;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Disable temperature sensor */</div><div class='del'>-	ret = _mv88e6xxx_phy_write(ds, 0x0, 0x1a, ret &amp; ~(1 &lt;&lt; 5));</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto error;</div><div class='del'>-</div><div class='del'>-	*temp = ((val &amp; 0x1f) - 5) * 5;</div><div class='del'>-</div><div class='del'>-error:</div><div class='del'>-	_mv88e6xxx_phy_write(ds, 0x0, 0x16, 0x0);</div><div class='del'>-	mutex_unlock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-#endif /* CONFIG_NET_DSA_HWMON */</div><div class='del'>-</div><div class='del'>-/* Must be called with SMI lock held */</div><div class='del'>-static int _mv88e6xxx_wait(struct dsa_switch *ds, int reg, int offset,</div><div class='del'>-			   u16 mask)</div><div class='del'>-{</div><div class='del'>-	unsigned long timeout = jiffies + HZ / 10;</div><div class='del'>-</div><div class='del'>-	while (time_before(jiffies, timeout)) {</div><div class='del'>-		int ret;</div><div class='del'>-</div><div class='del'>-		ret = _mv88e6xxx_reg_read(ds, reg, offset);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			return ret;</div><div class='del'>-		if (!(ret &amp; mask))</div><div class='del'>-			return 0;</div><div class='del'>-</div><div class='del'>-		usleep_range(1000, 2000);</div><div class='del'>-	}</div><div class='del'>-	return -ETIMEDOUT;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mv88e6xxx_wait(struct dsa_switch *ds, int reg, int offset, u16 mask)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-	ret = _mv88e6xxx_wait(ds, reg, offset, mask);</div><div class='del'>-	mutex_unlock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int _mv88e6xxx_phy_wait(struct dsa_switch *ds)</div><div class='del'>-{</div><div class='del'>-	return _mv88e6xxx_wait(ds, REG_GLOBAL2, GLOBAL2_SMI_OP,</div><div class='del'>-			       GLOBAL2_SMI_OP_BUSY);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int mv88e6xxx_eeprom_load_wait(struct dsa_switch *ds)</div><div class='del'>-{</div><div class='del'>-	return mv88e6xxx_wait(ds, REG_GLOBAL2, GLOBAL2_EEPROM_OP,</div><div class='del'>-			      GLOBAL2_EEPROM_OP_LOAD);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int mv88e6xxx_eeprom_busy_wait(struct dsa_switch *ds)</div><div class='del'>-{</div><div class='del'>-	return mv88e6xxx_wait(ds, REG_GLOBAL2, GLOBAL2_EEPROM_OP,</div><div class='del'>-			      GLOBAL2_EEPROM_OP_BUSY);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Must be called with SMI lock held */</div><div class='del'>-static int _mv88e6xxx_atu_wait(struct dsa_switch *ds)</div><div class='del'>-{</div><div class='del'>-	return _mv88e6xxx_wait(ds, REG_GLOBAL, GLOBAL_ATU_OP,</div><div class='del'>-			       GLOBAL_ATU_OP_BUSY);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Must be called with SMI lock held */</div><div class='del'>-static int _mv88e6xxx_scratch_wait(struct dsa_switch *ds)</div><div class='del'>-{</div><div class='del'>-	return _mv88e6xxx_wait(ds, REG_GLOBAL2, GLOBAL2_SCRATCH_MISC,</div><div class='del'>-			       GLOBAL2_SCRATCH_BUSY);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Must be called with SMI mutex held */</div><div class='del'>-static int _mv88e6xxx_phy_read_indirect(struct dsa_switch *ds, int addr,</div><div class='del'>-					int regnum)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_SMI_OP,</div><div class='del'>-				   GLOBAL2_SMI_OP_22_READ | (addr &lt;&lt; 5) |</div><div class='del'>-				   regnum);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret = _mv88e6xxx_phy_wait(ds);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	return _mv88e6xxx_reg_read(ds, REG_GLOBAL2, GLOBAL2_SMI_DATA);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Must be called with SMI mutex held */</div><div class='del'>-static int _mv88e6xxx_phy_write_indirect(struct dsa_switch *ds, int addr,</div><div class='del'>-					 int regnum, u16 val)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_SMI_DATA, val);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL2, GLOBAL2_SMI_OP,</div><div class='del'>-				   GLOBAL2_SMI_OP_22_WRITE | (addr &lt;&lt; 5) |</div><div class='del'>-				   regnum);</div><div class='del'>-</div><div class='del'>-	return _mv88e6xxx_phy_wait(ds);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int mv88e6xxx_get_eee(struct dsa_switch *ds, int port, struct ethtool_eee *e)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	int reg;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-</div><div class='del'>-	reg = _mv88e6xxx_phy_read_indirect(ds, port, 16);</div><div class='del'>-	if (reg &lt; 0)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	e-&gt;eee_enabled = !!(reg &amp; 0x0200);</div><div class='del'>-	e-&gt;tx_lpi_enabled = !!(reg &amp; 0x0100);</div><div class='del'>-</div><div class='del'>-	reg = _mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_STATUS);</div><div class='del'>-	if (reg &lt; 0)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	e-&gt;eee_active = !!(reg &amp; PORT_STATUS_EEE);</div><div class='del'>-	reg = 0;</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	mutex_unlock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-	return reg;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int mv88e6xxx_set_eee(struct dsa_switch *ds, int port,</div><div class='del'>-		      struct phy_device *phydev, struct ethtool_eee *e)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	int reg;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-</div><div class='del'>-	ret = _mv88e6xxx_phy_read_indirect(ds, port, 16);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	reg = ret &amp; ~0x0300;</div><div class='del'>-	if (e-&gt;eee_enabled)</div><div class='del'>-		reg |= 0x0200;</div><div class='del'>-	if (e-&gt;tx_lpi_enabled)</div><div class='del'>-		reg |= 0x0100;</div><div class='del'>-</div><div class='del'>-	ret = _mv88e6xxx_phy_write_indirect(ds, port, 16, reg);</div><div class='del'>-out:</div><div class='del'>-	mutex_unlock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int _mv88e6xxx_atu_cmd(struct dsa_switch *ds, int fid, u16 cmd)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, 0x01, fid);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_ATU_OP, cmd);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	return _mv88e6xxx_atu_wait(ds);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int _mv88e6xxx_flush_fid(struct dsa_switch *ds, int fid)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = _mv88e6xxx_atu_wait(ds);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	return _mv88e6xxx_atu_cmd(ds, fid, GLOBAL_ATU_OP_FLUSH_NON_STATIC_DB);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mv88e6xxx_set_port_state(struct dsa_switch *ds, int port, u8 state)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	int reg, ret = 0;</div><div class='del'>-	u8 oldstate;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-</div><div class='del'>-	reg = _mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_CONTROL);</div><div class='del'>-	if (reg &lt; 0) {</div><div class='del'>-		ret = reg;</div><div class='del'>-		goto abort;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	oldstate = reg &amp; PORT_CONTROL_STATE_MASK;</div><div class='del'>-	if (oldstate != state) {</div><div class='del'>-		/* Flush forwarding database if we're moving a port</div><div class='del'>-		 * from Learning or Forwarding state to Disabled or</div><div class='del'>-		 * Blocking or Listening state.</div><div class='del'>-		 */</div><div class='del'>-		if (oldstate &gt;= PORT_CONTROL_STATE_LEARNING &amp;&amp;</div><div class='del'>-		    state &lt;= PORT_CONTROL_STATE_BLOCKING) {</div><div class='del'>-			ret = _mv88e6xxx_flush_fid(ds, ps-&gt;fid[port]);</div><div class='del'>-			if (ret)</div><div class='del'>-				goto abort;</div><div class='del'>-		}</div><div class='del'>-		reg = (reg &amp; ~PORT_CONTROL_STATE_MASK) | state;</div><div class='del'>-		ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), PORT_CONTROL,</div><div class='del'>-					   reg);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-abort:</div><div class='del'>-	mutex_unlock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Must be called with smi lock held */</div><div class='del'>-static int _mv88e6xxx_update_port_config(struct dsa_switch *ds, int port)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	u8 fid = ps-&gt;fid[port];</div><div class='del'>-	u16 reg = fid &lt;&lt; 12;</div><div class='del'>-</div><div class='del'>-	if (dsa_is_cpu_port(ds, port))</div><div class='del'>-		reg |= ds-&gt;phys_port_mask;</div><div class='del'>-	else</div><div class='del'>-		reg |= (ps-&gt;bridge_mask[fid] |</div><div class='del'>-		       (1 &lt;&lt; dsa_upstream_port(ds))) &amp; ~(1 &lt;&lt; port);</div><div class='del'>-</div><div class='del'>-	return _mv88e6xxx_reg_write(ds, REG_PORT(port), PORT_BASE_VLAN, reg);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Must be called with smi lock held */</div><div class='del'>-static int _mv88e6xxx_update_bridge_config(struct dsa_switch *ds, int fid)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	int port;</div><div class='del'>-	u32 mask;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	mask = ds-&gt;phys_port_mask;</div><div class='del'>-	while (mask) {</div><div class='del'>-		port = __ffs(mask);</div><div class='del'>-		mask &amp;= ~(1 &lt;&lt; port);</div><div class='del'>-		if (ps-&gt;fid[port] != fid)</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		ret = _mv88e6xxx_update_port_config(ds, port);</div><div class='del'>-		if (ret)</div><div class='del'>-			return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return _mv88e6xxx_flush_fid(ds, fid);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Bridge handling functions */</div><div class='del'>-</div><div class='del'>-int mv88e6xxx_join_bridge(struct dsa_switch *ds, int port, u32 br_port_mask)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	int ret = 0;</div><div class='del'>-	u32 nmask;</div><div class='del'>-	int fid;</div><div class='del'>-</div><div class='del'>-	/* If the bridge group is not empty, join that group.</div><div class='del'>-	 * Otherwise create a new group.</div><div class='del'>-	 */</div><div class='del'>-	fid = ps-&gt;fid[port];</div><div class='del'>-	nmask = br_port_mask &amp; ~(1 &lt;&lt; port);</div><div class='del'>-	if (nmask)</div><div class='del'>-		fid = ps-&gt;fid[__ffs(nmask)];</div><div class='del'>-</div><div class='del'>-	nmask = ps-&gt;bridge_mask[fid] | (1 &lt;&lt; port);</div><div class='del'>-	if (nmask != br_port_mask) {</div><div class='del'>-		netdev_err(ds-&gt;ports[port],</div><div class='del'>-			   "join: Bridge port mask mismatch fid=%d mask=0x%x expected 0x%x\n",</div><div class='del'>-			   fid, br_port_mask, nmask);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-</div><div class='del'>-	ps-&gt;bridge_mask[fid] = br_port_mask;</div><div class='del'>-</div><div class='del'>-	if (fid != ps-&gt;fid[port]) {</div><div class='del'>-		ps-&gt;fid_mask |= 1 &lt;&lt; ps-&gt;fid[port];</div><div class='del'>-		ps-&gt;fid[port] = fid;</div><div class='del'>-		ret = _mv88e6xxx_update_bridge_config(ds, fid);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int mv88e6xxx_leave_bridge(struct dsa_switch *ds, int port, u32 br_port_mask)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	u8 fid, newfid;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	fid = ps-&gt;fid[port];</div><div class='del'>-</div><div class='del'>-	if (ps-&gt;bridge_mask[fid] != br_port_mask) {</div><div class='del'>-		netdev_err(ds-&gt;ports[port],</div><div class='del'>-			   "leave: Bridge port mask mismatch fid=%d mask=0x%x expected 0x%x\n",</div><div class='del'>-			   fid, br_port_mask, ps-&gt;bridge_mask[fid]);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* If the port was the last port of a bridge, we are done.</div><div class='del'>-	 * Otherwise assign a new fid to the port, and fix up</div><div class='del'>-	 * the bridge configuration.</div><div class='del'>-	 */</div><div class='del'>-	if (br_port_mask == (1 &lt;&lt; port))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-</div><div class='del'>-	newfid = __ffs(ps-&gt;fid_mask);</div><div class='del'>-	ps-&gt;fid[port] = newfid;</div><div class='del'>-	ps-&gt;fid_mask &amp;= ~(1 &lt;&lt; newfid);</div><div class='del'>-	ps-&gt;bridge_mask[fid] &amp;= ~(1 &lt;&lt; port);</div><div class='del'>-	ps-&gt;bridge_mask[newfid] = 1 &lt;&lt; port;</div><div class='del'>-</div><div class='del'>-	ret = _mv88e6xxx_update_bridge_config(ds, fid);</div><div class='del'>-	if (!ret)</div><div class='del'>-		ret = _mv88e6xxx_update_bridge_config(ds, newfid);</div><div class='del'>-</div><div class='del'>-	mutex_unlock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int mv88e6xxx_port_stp_update(struct dsa_switch *ds, int port, u8 state)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	int stp_state;</div><div class='del'>-</div><div class='del'>-	switch (state) {</div><div class='del'>-	case BR_STATE_DISABLED:</div><div class='del'>-		stp_state = PORT_CONTROL_STATE_DISABLED;</div><div class='del'>-		break;</div><div class='del'>-	case BR_STATE_BLOCKING:</div><div class='del'>-	case BR_STATE_LISTENING:</div><div class='del'>-		stp_state = PORT_CONTROL_STATE_BLOCKING;</div><div class='del'>-		break;</div><div class='del'>-	case BR_STATE_LEARNING:</div><div class='del'>-		stp_state = PORT_CONTROL_STATE_LEARNING;</div><div class='del'>-		break;</div><div class='del'>-	case BR_STATE_FORWARDING:</div><div class='del'>-	default:</div><div class='del'>-		stp_state = PORT_CONTROL_STATE_FORWARDING;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	netdev_dbg(ds-&gt;ports[port], "port state %d [%d]\n", state, stp_state);</div><div class='del'>-</div><div class='del'>-	/* mv88e6xxx_port_stp_update may be called with softirqs disabled,</div><div class='del'>-	 * so we can not update the port state directly but need to schedule it.</div><div class='del'>-	 */</div><div class='del'>-	ps-&gt;port_state[port] = stp_state;</div><div class='del'>-	set_bit(port, &amp;ps-&gt;port_state_update_mask);</div><div class='del'>-	schedule_work(&amp;ps-&gt;bridge_work);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __mv88e6xxx_write_addr(struct dsa_switch *ds,</div><div class='del'>-				  const unsigned char *addr)</div><div class='del'>-{</div><div class='del'>-	int i, ret;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; 3; i++) {</div><div class='del'>-		ret = _mv88e6xxx_reg_write(</div><div class='del'>-			ds, REG_GLOBAL, GLOBAL_ATU_MAC_01 + i,</div><div class='del'>-			(addr[i * 2] &lt;&lt; 8) | addr[i * 2 + 1]);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			return ret;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __mv88e6xxx_read_addr(struct dsa_switch *ds, unsigned char *addr)</div><div class='del'>-{</div><div class='del'>-	int i, ret;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; 3; i++) {</div><div class='del'>-		ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL,</div><div class='del'>-					  GLOBAL_ATU_MAC_01 + i);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			return ret;</div><div class='del'>-		addr[i * 2] = ret &gt;&gt; 8;</div><div class='del'>-		addr[i * 2 + 1] = ret &amp; 0xff;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __mv88e6xxx_port_fdb_cmd(struct dsa_switch *ds, int port,</div><div class='del'>-				    const unsigned char *addr, int state)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	u8 fid = ps-&gt;fid[port];</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = _mv88e6xxx_atu_wait(ds);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret = __mv88e6xxx_write_addr(ds, addr);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret = _mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_ATU_DATA,</div><div class='del'>-				   (0x10 &lt;&lt; port) | state);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret = _mv88e6xxx_atu_cmd(ds, fid, GLOBAL_ATU_OP_LOAD_DB);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int mv88e6xxx_port_fdb_add(struct dsa_switch *ds, int port,</div><div class='del'>-			   const unsigned char *addr, u16 vid)</div><div class='del'>-{</div><div class='del'>-	int state = is_multicast_ether_addr(addr) ?</div><div class='del'>-		GLOBAL_ATU_DATA_STATE_MC_STATIC :</div><div class='del'>-		GLOBAL_ATU_DATA_STATE_UC_STATIC;</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-	ret = __mv88e6xxx_port_fdb_cmd(ds, port, addr, state);</div><div class='del'>-	mutex_unlock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int mv88e6xxx_port_fdb_del(struct dsa_switch *ds, int port,</div><div class='del'>-			   const unsigned char *addr, u16 vid)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-	ret = __mv88e6xxx_port_fdb_cmd(ds, port, addr,</div><div class='del'>-				       GLOBAL_ATU_DATA_STATE_UNUSED);</div><div class='del'>-	mutex_unlock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __mv88e6xxx_port_getnext(struct dsa_switch *ds, int port,</div><div class='del'>-				    unsigned char *addr, bool *is_static)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	u8 fid = ps-&gt;fid[port];</div><div class='del'>-	int ret, state;</div><div class='del'>-</div><div class='del'>-	ret = _mv88e6xxx_atu_wait(ds);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	ret = __mv88e6xxx_write_addr(ds, addr);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	do {</div><div class='del'>-		ret = _mv88e6xxx_atu_cmd(ds, fid,  GLOBAL_ATU_OP_GET_NEXT_DB);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			return ret;</div><div class='del'>-</div><div class='del'>-		ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_ATU_DATA);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			return ret;</div><div class='del'>-		state = ret &amp; GLOBAL_ATU_DATA_STATE_MASK;</div><div class='del'>-		if (state == GLOBAL_ATU_DATA_STATE_UNUSED)</div><div class='del'>-			return -ENOENT;</div><div class='del'>-	} while (!(((ret &gt;&gt; 4) &amp; 0xff) &amp; (1 &lt;&lt; port)));</div><div class='del'>-</div><div class='del'>-	ret = __mv88e6xxx_read_addr(ds, addr);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	*is_static = state == (is_multicast_ether_addr(addr) ?</div><div class='del'>-			       GLOBAL_ATU_DATA_STATE_MC_STATIC :</div><div class='del'>-			       GLOBAL_ATU_DATA_STATE_UC_STATIC);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* get next entry for port */</div><div class='del'>-int mv88e6xxx_port_fdb_getnext(struct dsa_switch *ds, int port,</div><div class='del'>-			       unsigned char *addr, bool *is_static)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-	ret = __mv88e6xxx_port_getnext(ds, port, addr, is_static);</div><div class='del'>-	mutex_unlock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void mv88e6xxx_bridge_work(struct work_struct *work)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps;</div><div class='del'>-	struct dsa_switch *ds;</div><div class='del'>-	int port;</div><div class='del'>-</div><div class='del'>-	ps = container_of(work, struct mv88e6xxx_priv_state, bridge_work);</div><div class='del'>-	ds = ((struct dsa_switch *)ps) - 1;</div><div class='del'>-</div><div class='del'>-	while (ps-&gt;port_state_update_mask) {</div><div class='del'>-		port = __ffs(ps-&gt;port_state_update_mask);</div><div class='del'>-		clear_bit(port, &amp;ps-&gt;port_state_update_mask);</div><div class='del'>-		mv88e6xxx_set_port_state(ds, port, ps-&gt;port_state[port]);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mv88e6xxx_setup_port(struct dsa_switch *ds, int port)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	int ret, fid;</div><div class='del'>-	u16 reg;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-</div><div class='del'>-	if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) ||</div><div class='del'>-	    mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) ||</div><div class='del'>-	    mv88e6xxx_6185_family(ds) || mv88e6xxx_6095_family(ds) ||</div><div class='del'>-	    mv88e6xxx_6065_family(ds)) {</div><div class='del'>-		/* MAC Forcing register: don't force link, speed,</div><div class='del'>-		 * duplex or flow control state to any particular</div><div class='del'>-		 * values on physical ports, but force the CPU port</div><div class='del'>-		 * and all DSA ports to their maximum bandwidth and</div><div class='del'>-		 * full duplex.</div><div class='del'>-		 */</div><div class='del'>-		reg = _mv88e6xxx_reg_read(ds, REG_PORT(port), PORT_PCS_CTRL);</div><div class='del'>-		if (dsa_is_cpu_port(ds, port) ||</div><div class='del'>-		    ds-&gt;dsa_port_mask &amp; (1 &lt;&lt; port)) {</div><div class='del'>-			reg |= PORT_PCS_CTRL_FORCE_LINK |</div><div class='del'>-				PORT_PCS_CTRL_LINK_UP |</div><div class='del'>-				PORT_PCS_CTRL_DUPLEX_FULL |</div><div class='del'>-				PORT_PCS_CTRL_FORCE_DUPLEX;</div><div class='del'>-			if (mv88e6xxx_6065_family(ds))</div><div class='del'>-				reg |= PORT_PCS_CTRL_100;</div><div class='del'>-			else</div><div class='del'>-				reg |= PORT_PCS_CTRL_1000;</div><div class='del'>-		} else {</div><div class='del'>-			reg |= PORT_PCS_CTRL_UNFORCED;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		ret = _mv88e6xxx_reg_write(ds, REG_PORT(port),</div><div class='del'>-					   PORT_PCS_CTRL, reg);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto abort;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Port Control: disable Drop-on-Unlock, disable Drop-on-Lock,</div><div class='del'>-	 * disable Header mode, enable IGMP/MLD snooping, disable VLAN</div><div class='del'>-	 * tunneling, determine priority by looking at 802.1p and IP</div><div class='del'>-	 * priority fields (IP prio has precedence), and set STP state</div><div class='del'>-	 * to Forwarding.</div><div class='del'>-	 *</div><div class='del'>-	 * If this is the CPU link, use DSA or EDSA tagging depending</div><div class='del'>-	 * on which tagging mode was configured.</div><div class='del'>-	 *</div><div class='del'>-	 * If this is a link to another switch, use DSA tagging mode.</div><div class='del'>-	 *</div><div class='del'>-	 * If this is the upstream port for this switch, enable</div><div class='del'>-	 * forwarding of unknown unicasts and multicasts.</div><div class='del'>-	 */</div><div class='del'>-	reg = 0;</div><div class='del'>-	if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) ||</div><div class='del'>-	    mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) ||</div><div class='del'>-	    mv88e6xxx_6095_family(ds) || mv88e6xxx_6065_family(ds) ||</div><div class='del'>-	    mv88e6xxx_6185_family(ds))</div><div class='del'>-		reg = PORT_CONTROL_IGMP_MLD_SNOOP |</div><div class='del'>-		PORT_CONTROL_USE_TAG | PORT_CONTROL_USE_IP |</div><div class='del'>-		PORT_CONTROL_STATE_FORWARDING;</div><div class='del'>-	if (dsa_is_cpu_port(ds, port)) {</div><div class='del'>-		if (mv88e6xxx_6095_family(ds) || mv88e6xxx_6185_family(ds))</div><div class='del'>-			reg |= PORT_CONTROL_DSA_TAG;</div><div class='del'>-		if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) ||</div><div class='del'>-		    mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds)) {</div><div class='del'>-			if (ds-&gt;dst-&gt;tag_protocol == DSA_TAG_PROTO_EDSA)</div><div class='del'>-				reg |= PORT_CONTROL_FRAME_ETHER_TYPE_DSA;</div><div class='del'>-			else</div><div class='del'>-				reg |= PORT_CONTROL_FRAME_MODE_DSA;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) ||</div><div class='del'>-		    mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) ||</div><div class='del'>-		    mv88e6xxx_6095_family(ds) || mv88e6xxx_6065_family(ds) ||</div><div class='del'>-		    mv88e6xxx_6185_family(ds)) {</div><div class='del'>-			if (ds-&gt;dst-&gt;tag_protocol == DSA_TAG_PROTO_EDSA)</div><div class='del'>-				reg |= PORT_CONTROL_EGRESS_ADD_TAG;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) ||</div><div class='del'>-	    mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) ||</div><div class='del'>-	    mv88e6xxx_6095_family(ds) || mv88e6xxx_6065_family(ds)) {</div><div class='del'>-		if (ds-&gt;dsa_port_mask &amp; (1 &lt;&lt; port))</div><div class='del'>-			reg |= PORT_CONTROL_FRAME_MODE_DSA;</div><div class='del'>-		if (port == dsa_upstream_port(ds))</div><div class='del'>-			reg |= PORT_CONTROL_FORWARD_UNKNOWN |</div><div class='del'>-				PORT_CONTROL_FORWARD_UNKNOWN_MC;</div><div class='del'>-	}</div><div class='del'>-	if (reg) {</div><div class='del'>-		ret = _mv88e6xxx_reg_write(ds, REG_PORT(port),</div><div class='del'>-					   PORT_CONTROL, reg);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto abort;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Port Control 2: don't force a good FCS, set the maximum</div><div class='del'>-	 * frame size to 10240 bytes, don't let the switch add or</div><div class='del'>-	 * strip 802.1q tags, don't discard tagged or untagged frames</div><div class='del'>-	 * on this port, do a destination address lookup on all</div><div class='del'>-	 * received packets as usual, disable ARP mirroring and don't</div><div class='del'>-	 * send a copy of all transmitted/received frames on this port</div><div class='del'>-	 * to the CPU.</div><div class='del'>-	 */</div><div class='del'>-	reg = 0;</div><div class='del'>-	if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) ||</div><div class='del'>-	    mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) ||</div><div class='del'>-	    mv88e6xxx_6095_family(ds))</div><div class='del'>-		reg = PORT_CONTROL_2_MAP_DA;</div><div class='del'>-</div><div class='del'>-	if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) ||</div><div class='del'>-	    mv88e6xxx_6165_family(ds))</div><div class='del'>-		reg |= PORT_CONTROL_2_JUMBO_10240;</div><div class='del'>-</div><div class='del'>-	if (mv88e6xxx_6095_family(ds) || mv88e6xxx_6185_family(ds)) {</div><div class='del'>-		/* Set the upstream port this port should use */</div><div class='del'>-		reg |= dsa_upstream_port(ds);</div><div class='del'>-		/* enable forwarding of unknown multicast addresses to</div><div class='del'>-		 * the upstream port</div><div class='del'>-		 */</div><div class='del'>-		if (port == dsa_upstream_port(ds))</div><div class='del'>-			reg |= PORT_CONTROL_2_FORWARD_UNKNOWN;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (reg) {</div><div class='del'>-		ret = _mv88e6xxx_reg_write(ds, REG_PORT(port),</div><div class='del'>-					   PORT_CONTROL_2, reg);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto abort;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Port Association Vector: when learning source addresses</div><div class='del'>-	 * of packets, add the address to the address database using</div><div class='del'>-	 * a port bitmap that has only the bit for this port set and</div><div class='del'>-	 * the other bits clear.</div><div class='del'>-	 */</div><div class='del'>-	ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), PORT_ASSOC_VECTOR,</div><div class='del'>-				   1 &lt;&lt; port);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto abort;</div><div class='del'>-</div><div class='del'>-	/* Egress rate control 2: disable egress rate control. */</div><div class='del'>-	ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), PORT_RATE_CONTROL_2,</div><div class='del'>-				   0x0000);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto abort;</div><div class='del'>-</div><div class='del'>-	if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) ||</div><div class='del'>-	    mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds)) {</div><div class='del'>-		/* Do not limit the period of time that this port can</div><div class='del'>-		 * be paused for by the remote end or the period of</div><div class='del'>-		 * time that this port can pause the remote end.</div><div class='del'>-		 */</div><div class='del'>-		ret = _mv88e6xxx_reg_write(ds, REG_PORT(port),</div><div class='del'>-					   PORT_PAUSE_CTRL, 0x0000);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto abort;</div><div class='del'>-</div><div class='del'>-		/* Port ATU control: disable limiting the number of</div><div class='del'>-		 * address database entries that this port is allowed</div><div class='del'>-		 * to use.</div><div class='del'>-		 */</div><div class='del'>-		ret = _mv88e6xxx_reg_write(ds, REG_PORT(port),</div><div class='del'>-					   PORT_ATU_CONTROL, 0x0000);</div><div class='del'>-		/* Priority Override: disable DA, SA and VTU priority</div><div class='del'>-		 * override.</div><div class='del'>-		 */</div><div class='del'>-		ret = _mv88e6xxx_reg_write(ds, REG_PORT(port),</div><div class='del'>-					   PORT_PRI_OVERRIDE, 0x0000);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto abort;</div><div class='del'>-</div><div class='del'>-		/* Port Ethertype: use the Ethertype DSA Ethertype</div><div class='del'>-		 * value.</div><div class='del'>-		 */</div><div class='del'>-		ret = _mv88e6xxx_reg_write(ds, REG_PORT(port),</div><div class='del'>-					   PORT_ETH_TYPE, ETH_P_EDSA);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto abort;</div><div class='del'>-		/* Tag Remap: use an identity 802.1p prio -&gt; switch</div><div class='del'>-		 * prio mapping.</div><div class='del'>-		 */</div><div class='del'>-		ret = _mv88e6xxx_reg_write(ds, REG_PORT(port),</div><div class='del'>-					   PORT_TAG_REGMAP_0123, 0x3210);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto abort;</div><div class='del'>-</div><div class='del'>-		/* Tag Remap 2: use an identity 802.1p prio -&gt; switch</div><div class='del'>-		 * prio mapping.</div><div class='del'>-		 */</div><div class='del'>-		ret = _mv88e6xxx_reg_write(ds, REG_PORT(port),</div><div class='del'>-					   PORT_TAG_REGMAP_4567, 0x7654);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto abort;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) ||</div><div class='del'>-	    mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) ||</div><div class='del'>-	    mv88e6xxx_6185_family(ds) || mv88e6xxx_6095_family(ds)) {</div><div class='del'>-		/* Rate Control: disable ingress rate limiting. */</div><div class='del'>-		ret = _mv88e6xxx_reg_write(ds, REG_PORT(port),</div><div class='del'>-					   PORT_RATE_CONTROL, 0x0001);</div><div class='del'>-		if (ret)</div><div class='del'>-			goto abort;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Port Control 1: disable trunking, disable sending</div><div class='del'>-	 * learning messages to this port.</div><div class='del'>-	 */</div><div class='del'>-	ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), PORT_CONTROL_1, 0x0000);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto abort;</div><div class='del'>-</div><div class='del'>-	/* Port based VLAN map: give each port its own address</div><div class='del'>-	 * database, allow the CPU port to talk to each of the 'real'</div><div class='del'>-	 * ports, and allow each of the 'real' ports to only talk to</div><div class='del'>-	 * the upstream port.</div><div class='del'>-	 */</div><div class='del'>-	fid = __ffs(ps-&gt;fid_mask);</div><div class='del'>-	ps-&gt;fid[port] = fid;</div><div class='del'>-	ps-&gt;fid_mask &amp;= ~(1 &lt;&lt; fid);</div><div class='del'>-</div><div class='del'>-	if (!dsa_is_cpu_port(ds, port))</div><div class='del'>-		ps-&gt;bridge_mask[fid] = 1 &lt;&lt; port;</div><div class='del'>-</div><div class='del'>-	ret = _mv88e6xxx_update_port_config(ds, port);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto abort;</div><div class='del'>-</div><div class='del'>-	/* Default VLAN ID and priority: don't set a default VLAN</div><div class='del'>-	 * ID, and set the default packet priority to zero.</div><div class='del'>-	 */</div><div class='del'>-	ret = _mv88e6xxx_reg_write(ds, REG_PORT(port), PORT_DEFAULT_VLAN,</div><div class='del'>-				   0x0000);</div><div class='del'>-abort:</div><div class='del'>-	mutex_unlock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int mv88e6xxx_setup_ports(struct dsa_switch *ds)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	int ret;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; ps-&gt;num_ports; i++) {</div><div class='del'>-		ret = mv88e6xxx_setup_port(ds, i);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			return ret;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mv88e6xxx_regs_show(struct seq_file *s, void *p)</div><div class='del'>-{</div><div class='del'>-	struct dsa_switch *ds = s-&gt;private;</div><div class='del'>-</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	int reg, port;</div><div class='del'>-</div><div class='del'>-	seq_puts(s, "    GLOBAL GLOBAL2 ");</div><div class='del'>-	for (port = 0 ; port &lt; ps-&gt;num_ports; port++)</div><div class='del'>-		seq_printf(s, " %2d  ", port);</div><div class='del'>-	seq_puts(s, "\n");</div><div class='del'>-</div><div class='del'>-	for (reg = 0; reg &lt; 32; reg++) {</div><div class='del'>-		seq_printf(s, "%2x: ", reg);</div><div class='del'>-		seq_printf(s, " %4x    %4x  ",</div><div class='del'>-			   mv88e6xxx_reg_read(ds, REG_GLOBAL, reg),</div><div class='del'>-			   mv88e6xxx_reg_read(ds, REG_GLOBAL2, reg));</div><div class='del'>-</div><div class='del'>-		for (port = 0 ; port &lt; ps-&gt;num_ports; port++)</div><div class='del'>-			seq_printf(s, "%4x ",</div><div class='del'>-				   mv88e6xxx_reg_read(ds, REG_PORT(port), reg));</div><div class='del'>-		seq_puts(s, "\n");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mv88e6xxx_regs_open(struct inode *inode, struct file *file)</div><div class='del'>-{</div><div class='del'>-	return single_open(file, mv88e6xxx_regs_show, inode-&gt;i_private);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct file_operations mv88e6xxx_regs_fops = {</div><div class='del'>-	.open   = mv88e6xxx_regs_open,</div><div class='del'>-	.read   = seq_read,</div><div class='del'>-	.llseek = no_llseek,</div><div class='del'>-	.release = single_release,</div><div class='del'>-	.owner  = THIS_MODULE,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void mv88e6xxx_atu_show_header(struct seq_file *s)</div><div class='del'>-{</div><div class='del'>-	seq_puts(s, "DB   T/P  Vec State Addr\n");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void mv88e6xxx_atu_show_entry(struct seq_file *s, int dbnum,</div><div class='del'>-				     unsigned char *addr, int data)</div><div class='del'>-{</div><div class='del'>-	bool trunk = !!(data &amp; GLOBAL_ATU_DATA_TRUNK);</div><div class='del'>-	int portvec = ((data &amp; GLOBAL_ATU_DATA_PORT_VECTOR_MASK) &gt;&gt;</div><div class='del'>-		       GLOBAL_ATU_DATA_PORT_VECTOR_SHIFT);</div><div class='del'>-	int state = data &amp; GLOBAL_ATU_DATA_STATE_MASK;</div><div class='del'>-</div><div class='del'>-	seq_printf(s, "%03x %5s %10pb   %x   %pM\n",</div><div class='del'>-		   dbnum, (trunk ? "Trunk" : "Port"), &amp;portvec, state, addr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mv88e6xxx_atu_show_db(struct seq_file *s, struct dsa_switch *ds,</div><div class='del'>-				 int dbnum)</div><div class='del'>-{</div><div class='del'>-	unsigned char bcast[] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff};</div><div class='del'>-	unsigned char addr[6];</div><div class='del'>-	int ret, data, state;</div><div class='del'>-</div><div class='del'>-	ret = __mv88e6xxx_write_addr(ds, bcast);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	do {</div><div class='del'>-		ret = _mv88e6xxx_atu_cmd(ds, dbnum, GLOBAL_ATU_OP_GET_NEXT_DB);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			return ret;</div><div class='del'>-		data = _mv88e6xxx_reg_read(ds, REG_GLOBAL, GLOBAL_ATU_DATA);</div><div class='del'>-		if (data &lt; 0)</div><div class='del'>-			return data;</div><div class='del'>-</div><div class='del'>-		state = data &amp; GLOBAL_ATU_DATA_STATE_MASK;</div><div class='del'>-		if (state == GLOBAL_ATU_DATA_STATE_UNUSED)</div><div class='del'>-			break;</div><div class='del'>-		ret = __mv88e6xxx_read_addr(ds, addr);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			return ret;</div><div class='del'>-		mv88e6xxx_atu_show_entry(s, dbnum, addr, data);</div><div class='del'>-	} while (state != GLOBAL_ATU_DATA_STATE_UNUSED);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mv88e6xxx_atu_show(struct seq_file *s, void *p)</div><div class='del'>-{</div><div class='del'>-	struct dsa_switch *ds = s-&gt;private;</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	int dbnum;</div><div class='del'>-</div><div class='del'>-	mv88e6xxx_atu_show_header(s);</div><div class='del'>-</div><div class='del'>-	for (dbnum = 0; dbnum &lt; 255; dbnum++) {</div><div class='del'>-		mutex_lock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-		mv88e6xxx_atu_show_db(s, ds, dbnum);</div><div class='del'>-		mutex_unlock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mv88e6xxx_atu_open(struct inode *inode, struct file *file)</div><div class='del'>-{</div><div class='del'>-	return single_open(file, mv88e6xxx_atu_show, inode-&gt;i_private);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct file_operations mv88e6xxx_atu_fops = {</div><div class='del'>-	.open   = mv88e6xxx_atu_open,</div><div class='del'>-	.read   = seq_read,</div><div class='del'>-	.llseek = no_llseek,</div><div class='del'>-	.release = single_release,</div><div class='del'>-	.owner  = THIS_MODULE,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static void mv88e6xxx_stats_show_header(struct seq_file *s,</div><div class='del'>-					struct mv88e6xxx_priv_state *ps)</div><div class='del'>-{</div><div class='del'>-	int port;</div><div class='del'>-</div><div class='del'>-	seq_puts(s, "      Statistic       ");</div><div class='del'>-	for (port = 0 ; port &lt; ps-&gt;num_ports; port++)</div><div class='del'>-		seq_printf(s, "Port %2d  ", port);</div><div class='del'>-	seq_puts(s, "\n");</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mv88e6xxx_stats_show(struct seq_file *s, void *p)</div><div class='del'>-{</div><div class='del'>-	struct dsa_switch *ds = s-&gt;private;</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	struct mv88e6xxx_hw_stat *stats = mv88e6xxx_hw_stats;</div><div class='del'>-	int port, stat, max_stats;</div><div class='del'>-	uint64_t value;</div><div class='del'>-</div><div class='del'>-	if (have_sw_in_discards(ds))</div><div class='del'>-		max_stats = ARRAY_SIZE(mv88e6xxx_hw_stats);</div><div class='del'>-	else</div><div class='del'>-		max_stats = ARRAY_SIZE(mv88e6xxx_hw_stats) - 3;</div><div class='del'>-</div><div class='del'>-	mv88e6xxx_stats_show_header(s, ps);</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-</div><div class='del'>-	for (stat = 0; stat &lt; max_stats; stat++) {</div><div class='del'>-		seq_printf(s, "%19s: ", stats[stat].string);</div><div class='del'>-		for (port = 0 ; port &lt; ps-&gt;num_ports; port++) {</div><div class='del'>-			_mv88e6xxx_stats_snapshot(ds, port);</div><div class='del'>-			value = _mv88e6xxx_get_ethtool_stat(ds, stat, stats,</div><div class='del'>-							    port);</div><div class='del'>-			seq_printf(s, "%8llu ", value);</div><div class='del'>-		}</div><div class='del'>-		seq_puts(s, "\n");</div><div class='del'>-	}</div><div class='del'>-	mutex_unlock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mv88e6xxx_stats_open(struct inode *inode, struct file *file)</div><div class='del'>-{</div><div class='del'>-	return single_open(file, mv88e6xxx_stats_show, inode-&gt;i_private);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct file_operations mv88e6xxx_stats_fops = {</div><div class='del'>-	.open   = mv88e6xxx_stats_open,</div><div class='del'>-	.read   = seq_read,</div><div class='del'>-	.llseek = no_llseek,</div><div class='del'>-	.release = single_release,</div><div class='del'>-	.owner  = THIS_MODULE,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int mv88e6xxx_device_map_show(struct seq_file *s, void *p)</div><div class='del'>-{</div><div class='del'>-	struct dsa_switch *ds = s-&gt;private;</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	int target, ret;</div><div class='del'>-</div><div class='del'>-	seq_puts(s, "Target Port\n");</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-	for (target = 0; target &lt; 32; target++) {</div><div class='del'>-		ret = _mv88e6xxx_reg_write(</div><div class='del'>-			ds, REG_GLOBAL2, GLOBAL2_DEVICE_MAPPING,</div><div class='del'>-			target &lt;&lt; GLOBAL2_DEVICE_MAPPING_TARGET_SHIFT);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			goto out;</div><div class='del'>-		ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL2,</div><div class='del'>-					  GLOBAL2_DEVICE_MAPPING);</div><div class='del'>-		seq_printf(s, "  %2d   %2d\n", target,</div><div class='del'>-			   ret &amp; GLOBAL2_DEVICE_MAPPING_PORT_MASK);</div><div class='del'>-	}</div><div class='del'>-out:</div><div class='del'>-	mutex_unlock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mv88e6xxx_device_map_open(struct inode *inode, struct file *file)</div><div class='del'>-{</div><div class='del'>-	return single_open(file, mv88e6xxx_device_map_show, inode-&gt;i_private);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct file_operations mv88e6xxx_device_map_fops = {</div><div class='del'>-	.open   = mv88e6xxx_device_map_open,</div><div class='del'>-	.read   = seq_read,</div><div class='del'>-	.llseek = no_llseek,</div><div class='del'>-	.release = single_release,</div><div class='del'>-	.owner  = THIS_MODULE,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int mv88e6xxx_scratch_show(struct seq_file *s, void *p)</div><div class='del'>-{</div><div class='del'>-	struct dsa_switch *ds = s-&gt;private;</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	int reg, ret;</div><div class='del'>-</div><div class='del'>-	seq_puts(s, "Register Value\n");</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-	for (reg = 0; reg &lt; 0x80; reg++) {</div><div class='del'>-		ret = _mv88e6xxx_reg_write(</div><div class='del'>-			ds, REG_GLOBAL2, GLOBAL2_SCRATCH_MISC,</div><div class='del'>-			reg &lt;&lt; GLOBAL2_SCRATCH_REGISTER_SHIFT);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			goto out;</div><div class='del'>-</div><div class='del'>-		ret = _mv88e6xxx_scratch_wait(ds);</div><div class='del'>-		if (ret &lt; 0)</div><div class='del'>-			goto out;</div><div class='del'>-</div><div class='del'>-		ret = _mv88e6xxx_reg_read(ds, REG_GLOBAL2,</div><div class='del'>-					  GLOBAL2_SCRATCH_MISC);</div><div class='del'>-		seq_printf(s, "  %2x   %2x\n", reg,</div><div class='del'>-			   ret &amp; GLOBAL2_SCRATCH_VALUE_MASK);</div><div class='del'>-	}</div><div class='del'>-out:</div><div class='del'>-	mutex_unlock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mv88e6xxx_scratch_open(struct inode *inode, struct file *file)</div><div class='del'>-{</div><div class='del'>-	return single_open(file, mv88e6xxx_scratch_show, inode-&gt;i_private);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct file_operations mv88e6xxx_scratch_fops = {</div><div class='del'>-	.open   = mv88e6xxx_scratch_open,</div><div class='del'>-	.read   = seq_read,</div><div class='del'>-	.llseek = no_llseek,</div><div class='del'>-	.release = single_release,</div><div class='del'>-	.owner  = THIS_MODULE,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-int mv88e6xxx_setup_common(struct dsa_switch *ds)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	char *name;</div><div class='del'>-</div><div class='del'>-	mutex_init(&amp;ps-&gt;smi_mutex);</div><div class='del'>-</div><div class='del'>-	ps-&gt;id = REG_READ(REG_PORT(0), PORT_SWITCH_ID) &amp; 0xfff0;</div><div class='del'>-</div><div class='del'>-	ps-&gt;fid_mask = (1 &lt;&lt; DSA_MAX_PORTS) - 1;</div><div class='del'>-</div><div class='del'>-	INIT_WORK(&amp;ps-&gt;bridge_work, mv88e6xxx_bridge_work);</div><div class='del'>-</div><div class='del'>-	name = kasprintf(GFP_KERNEL, "dsa%d", ds-&gt;index);</div><div class='del'>-	ps-&gt;dbgfs = debugfs_create_dir(name, NULL);</div><div class='del'>-	kfree(name);</div><div class='del'>-</div><div class='del'>-	debugfs_create_file("regs", S_IRUGO, ps-&gt;dbgfs, ds,</div><div class='del'>-			    &amp;mv88e6xxx_regs_fops);</div><div class='del'>-</div><div class='del'>-	debugfs_create_file("atu", S_IRUGO, ps-&gt;dbgfs, ds,</div><div class='del'>-			    &amp;mv88e6xxx_atu_fops);</div><div class='del'>-</div><div class='del'>-	debugfs_create_file("stats", S_IRUGO, ps-&gt;dbgfs, ds,</div><div class='del'>-			    &amp;mv88e6xxx_stats_fops);</div><div class='del'>-</div><div class='del'>-	debugfs_create_file("device_map", S_IRUGO, ps-&gt;dbgfs, ds,</div><div class='del'>-			    &amp;mv88e6xxx_device_map_fops);</div><div class='del'>-</div><div class='del'>-	debugfs_create_file("scratch", S_IRUGO, ps-&gt;dbgfs, ds,</div><div class='del'>-			    &amp;mv88e6xxx_scratch_fops);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int mv88e6xxx_setup_global(struct dsa_switch *ds)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* Set the default address aging time to 5 minutes, and</div><div class='del'>-	 * enable address learn messages to be sent to all message</div><div class='del'>-	 * ports.</div><div class='del'>-	 */</div><div class='del'>-	REG_WRITE(REG_GLOBAL, GLOBAL_ATU_CONTROL,</div><div class='del'>-		  0x0140 | GLOBAL_ATU_CONTROL_LEARN2ALL);</div><div class='del'>-</div><div class='del'>-	/* Configure the IP ToS mapping registers. */</div><div class='del'>-	REG_WRITE(REG_GLOBAL, GLOBAL_IP_PRI_0, 0x0000);</div><div class='del'>-	REG_WRITE(REG_GLOBAL, GLOBAL_IP_PRI_1, 0x0000);</div><div class='del'>-	REG_WRITE(REG_GLOBAL, GLOBAL_IP_PRI_2, 0x5555);</div><div class='del'>-	REG_WRITE(REG_GLOBAL, GLOBAL_IP_PRI_3, 0x5555);</div><div class='del'>-	REG_WRITE(REG_GLOBAL, GLOBAL_IP_PRI_4, 0xaaaa);</div><div class='del'>-	REG_WRITE(REG_GLOBAL, GLOBAL_IP_PRI_5, 0xaaaa);</div><div class='del'>-	REG_WRITE(REG_GLOBAL, GLOBAL_IP_PRI_6, 0xffff);</div><div class='del'>-	REG_WRITE(REG_GLOBAL, GLOBAL_IP_PRI_7, 0xffff);</div><div class='del'>-</div><div class='del'>-	/* Configure the IEEE 802.1p priority mapping register. */</div><div class='del'>-	REG_WRITE(REG_GLOBAL, GLOBAL_IEEE_PRI, 0xfa41);</div><div class='del'>-</div><div class='del'>-	/* Send all frames with destination addresses matching</div><div class='del'>-	 * 01:80:c2:00:00:0x to the CPU port.</div><div class='del'>-	 */</div><div class='del'>-	REG_WRITE(REG_GLOBAL2, GLOBAL2_MGMT_EN_0X, 0xffff);</div><div class='del'>-</div><div class='del'>-	/* Ignore removed tag data on doubly tagged packets, disable</div><div class='del'>-	 * flow control messages, force flow control priority to the</div><div class='del'>-	 * highest, and send all special multicast frames to the CPU</div><div class='del'>-	 * port at the highest priority.</div><div class='del'>-	 */</div><div class='del'>-	REG_WRITE(REG_GLOBAL2, GLOBAL2_SWITCH_MGMT,</div><div class='del'>-		  0x7 | GLOBAL2_SWITCH_MGMT_RSVD2CPU | 0x70 |</div><div class='del'>-		  GLOBAL2_SWITCH_MGMT_FORCE_FLOW_CTRL_PRI);</div><div class='del'>-</div><div class='del'>-	/* Program the DSA routing table. */</div><div class='del'>-	for (i = 0; i &lt; 32; i++) {</div><div class='del'>-		int nexthop = 0x1f;</div><div class='del'>-</div><div class='del'>-		if (ds-&gt;pd-&gt;rtable &amp;&amp;</div><div class='del'>-		    i != ds-&gt;index &amp;&amp; i &lt; ds-&gt;dst-&gt;pd-&gt;nr_chips)</div><div class='del'>-			nexthop = ds-&gt;pd-&gt;rtable[i] &amp; 0x1f;</div><div class='del'>-</div><div class='del'>-		REG_WRITE(REG_GLOBAL2, GLOBAL2_DEVICE_MAPPING,</div><div class='del'>-			  GLOBAL2_DEVICE_MAPPING_UPDATE |</div><div class='del'>-			  (i &lt;&lt; GLOBAL2_DEVICE_MAPPING_TARGET_SHIFT) |</div><div class='del'>-			  nexthop);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Clear all trunk masks. */</div><div class='del'>-	for (i = 0; i &lt; 8; i++)</div><div class='del'>-		REG_WRITE(REG_GLOBAL2, GLOBAL2_TRUNK_MASK,</div><div class='del'>-			  0x8000 | (i &lt;&lt; GLOBAL2_TRUNK_MASK_NUM_SHIFT) |</div><div class='del'>-			  ((1 &lt;&lt; ps-&gt;num_ports) - 1));</div><div class='del'>-</div><div class='del'>-	/* Clear all trunk mappings. */</div><div class='del'>-	for (i = 0; i &lt; 16; i++)</div><div class='del'>-		REG_WRITE(REG_GLOBAL2, GLOBAL2_TRUNK_MAPPING,</div><div class='del'>-			  GLOBAL2_TRUNK_MAPPING_UPDATE |</div><div class='del'>-			  (i &lt;&lt; GLOBAL2_TRUNK_MAPPING_ID_SHIFT));</div><div class='del'>-</div><div class='del'>-	if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) ||</div><div class='del'>-	    mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds)) {</div><div class='del'>-		/* Send all frames with destination addresses matching</div><div class='del'>-		 * 01:80:c2:00:00:2x to the CPU port.</div><div class='del'>-		 */</div><div class='del'>-		REG_WRITE(REG_GLOBAL2, GLOBAL2_MGMT_EN_2X, 0xffff);</div><div class='del'>-</div><div class='del'>-		/* Initialise cross-chip port VLAN table to reset</div><div class='del'>-		 * defaults.</div><div class='del'>-		 */</div><div class='del'>-		REG_WRITE(REG_GLOBAL2, GLOBAL2_PVT_ADDR, 0x9000);</div><div class='del'>-</div><div class='del'>-		/* Clear the priority override table. */</div><div class='del'>-		for (i = 0; i &lt; 16; i++)</div><div class='del'>-			REG_WRITE(REG_GLOBAL2, GLOBAL2_PRIO_OVERRIDE,</div><div class='del'>-				  0x8000 | (i &lt;&lt; 8));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (mv88e6xxx_6352_family(ds) || mv88e6xxx_6351_family(ds) ||</div><div class='del'>-	    mv88e6xxx_6165_family(ds) || mv88e6xxx_6097_family(ds) ||</div><div class='del'>-	    mv88e6xxx_6185_family(ds) || mv88e6xxx_6095_family(ds)) {</div><div class='del'>-		/* Disable ingress rate limiting by resetting all</div><div class='del'>-		 * ingress rate limit registers to their initial</div><div class='del'>-		 * state.</div><div class='del'>-		 */</div><div class='del'>-		for (i = 0; i &lt; ps-&gt;num_ports; i++)</div><div class='del'>-			REG_WRITE(REG_GLOBAL2, GLOBAL2_INGRESS_OP,</div><div class='del'>-				  0x9000 | (i &lt;&lt; 8));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Clear the statistics counters for all ports */</div><div class='del'>-	REG_WRITE(REG_GLOBAL, GLOBAL_STATS_OP, GLOBAL_STATS_OP_FLUSH_ALL);</div><div class='del'>-</div><div class='del'>-	/* Wait for the flush to complete. */</div><div class='del'>-	_mv88e6xxx_stats_wait(ds);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int mv88e6xxx_switch_reset(struct dsa_switch *ds, bool ppu_active)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	u16 is_reset = (ppu_active ? 0x8800 : 0xc800);</div><div class='del'>-	unsigned long timeout;</div><div class='del'>-	int ret;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/* Set all ports to the disabled state. */</div><div class='del'>-	for (i = 0; i &lt; ps-&gt;num_ports; i++) {</div><div class='del'>-		ret = REG_READ(REG_PORT(i), PORT_CONTROL);</div><div class='del'>-		REG_WRITE(REG_PORT(i), PORT_CONTROL, ret &amp; 0xfffc);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Wait for transmit queues to drain. */</div><div class='del'>-	usleep_range(2000, 4000);</div><div class='del'>-</div><div class='del'>-	/* Reset the switch. Keep the PPU active if requested. The PPU</div><div class='del'>-	 * needs to be active to support indirect phy register access</div><div class='del'>-	 * through global registers 0x18 and 0x19.</div><div class='del'>-	 */</div><div class='del'>-	if (ppu_active)</div><div class='del'>-		REG_WRITE(REG_GLOBAL, 0x04, 0xc000);</div><div class='del'>-	else</div><div class='del'>-		REG_WRITE(REG_GLOBAL, 0x04, 0xc400);</div><div class='del'>-</div><div class='del'>-	/* Wait up to one second for reset to complete. */</div><div class='del'>-	timeout = jiffies + 1 * HZ;</div><div class='del'>-	while (time_before(jiffies, timeout)) {</div><div class='del'>-		ret = REG_READ(REG_GLOBAL, 0x00);</div><div class='del'>-		if ((ret &amp; is_reset) == is_reset)</div><div class='del'>-			break;</div><div class='del'>-		usleep_range(1000, 2000);</div><div class='del'>-	}</div><div class='del'>-	if (time_after(jiffies, timeout))</div><div class='del'>-		return -ETIMEDOUT;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int mv88e6xxx_phy_page_read(struct dsa_switch *ds, int port, int page, int reg)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-	ret = _mv88e6xxx_phy_write_indirect(ds, port, 0x16, page);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto error;</div><div class='del'>-	ret = _mv88e6xxx_phy_read_indirect(ds, port, reg);</div><div class='del'>-error:</div><div class='del'>-	_mv88e6xxx_phy_write_indirect(ds, port, 0x16, 0x0);</div><div class='del'>-	mutex_unlock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int mv88e6xxx_phy_page_write(struct dsa_switch *ds, int port, int page,</div><div class='del'>-			     int reg, int val)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-	ret = _mv88e6xxx_phy_write_indirect(ds, port, 0x16, page);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto error;</div><div class='del'>-</div><div class='del'>-	ret = _mv88e6xxx_phy_write_indirect(ds, port, reg, val);</div><div class='del'>-error:</div><div class='del'>-	_mv88e6xxx_phy_write_indirect(ds, port, 0x16, 0x0);</div><div class='del'>-	mutex_unlock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int mv88e6xxx_port_to_phy_addr(struct dsa_switch *ds, int port)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-</div><div class='del'>-	if (port &gt;= 0 &amp;&amp; port &lt; ps-&gt;num_ports)</div><div class='del'>-		return port;</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int</div><div class='del'>-mv88e6xxx_phy_read(struct dsa_switch *ds, int port, int regnum)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	int addr = mv88e6xxx_port_to_phy_addr(ds, port);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (addr &lt; 0)</div><div class='del'>-		return addr;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-	ret = _mv88e6xxx_phy_read(ds, addr, regnum);</div><div class='del'>-	mutex_unlock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int</div><div class='del'>-mv88e6xxx_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	int addr = mv88e6xxx_port_to_phy_addr(ds, port);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (addr &lt; 0)</div><div class='del'>-		return addr;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-	ret = _mv88e6xxx_phy_write(ds, addr, regnum, val);</div><div class='del'>-	mutex_unlock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int</div><div class='del'>-mv88e6xxx_phy_read_indirect(struct dsa_switch *ds, int port, int regnum)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	int addr = mv88e6xxx_port_to_phy_addr(ds, port);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (addr &lt; 0)</div><div class='del'>-		return addr;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-	ret = _mv88e6xxx_phy_read_indirect(ds, addr, regnum);</div><div class='del'>-	mutex_unlock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-int</div><div class='del'>-mv88e6xxx_phy_write_indirect(struct dsa_switch *ds, int port, int regnum,</div><div class='del'>-			     u16 val)</div><div class='del'>-{</div><div class='del'>-	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);</div><div class='del'>-	int addr = mv88e6xxx_port_to_phy_addr(ds, port);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	if (addr &lt; 0)</div><div class='del'>-		return addr;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-	ret = _mv88e6xxx_phy_write_indirect(ds, addr, regnum, val);</div><div class='del'>-	mutex_unlock(&amp;ps-&gt;smi_mutex);</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int __init mv88e6xxx_init(void)</div><div class='del'>-{</div><div class='del'>-#if IS_ENABLED(CONFIG_NET_DSA_MV88E6131)</div><div class='del'>-	register_switch_driver(&amp;mv88e6131_switch_driver);</div><div class='del'>-#endif</div><div class='del'>-#if IS_ENABLED(CONFIG_NET_DSA_MV88E6123_61_65)</div><div class='del'>-	register_switch_driver(&amp;mv88e6123_61_65_switch_driver);</div><div class='del'>-#endif</div><div class='del'>-#if IS_ENABLED(CONFIG_NET_DSA_MV88E6352)</div><div class='del'>-	register_switch_driver(&amp;mv88e6352_switch_driver);</div><div class='del'>-#endif</div><div class='del'>-#if IS_ENABLED(CONFIG_NET_DSA_MV88E6171)</div><div class='del'>-	register_switch_driver(&amp;mv88e6171_switch_driver);</div><div class='del'>-#endif</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-module_init(mv88e6xxx_init);</div><div class='del'>-</div><div class='del'>-static void __exit mv88e6xxx_cleanup(void)</div><div class='del'>-{</div><div class='del'>-#if IS_ENABLED(CONFIG_NET_DSA_MV88E6171)</div><div class='del'>-	unregister_switch_driver(&amp;mv88e6171_switch_driver);</div><div class='del'>-#endif</div><div class='del'>-#if IS_ENABLED(CONFIG_NET_DSA_MV88E6352)</div><div class='del'>-	unregister_switch_driver(&amp;mv88e6352_switch_driver);</div><div class='del'>-#endif</div><div class='del'>-#if IS_ENABLED(CONFIG_NET_DSA_MV88E6123_61_65)</div><div class='del'>-	unregister_switch_driver(&amp;mv88e6123_61_65_switch_driver);</div><div class='del'>-#endif</div><div class='del'>-#if IS_ENABLED(CONFIG_NET_DSA_MV88E6131)</div><div class='del'>-	unregister_switch_driver(&amp;mv88e6131_switch_driver);</div><div class='del'>-#endif</div><div class='del'>-}</div><div class='del'>-module_exit(mv88e6xxx_cleanup);</div><div class='del'>-</div><div class='del'>-MODULE_AUTHOR("Lennert Buytenhek &lt;buytenh@wantstofly.org&gt;");</div><div class='del'>-MODULE_DESCRIPTION("Driver for Marvell 88E6XXX ethernet switch chips");</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx.h b/drivers/net/dsa/mv88e6xxx.h<br/>deleted file mode 100644<br/>index a650b2656de9..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dsa/mv88e6xxx.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,439 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * net/dsa/mv88e6xxx.h - Marvell 88e6xxx switch chip support</div><div class='del'>- * Copyright (c) 2008 Marvell Semiconductor</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef __MV88E6XXX_H</div><div class='del'>-#define __MV88E6XXX_H</div><div class='del'>-</div><div class='del'>-#ifndef UINT64_MAX</div><div class='del'>-#define UINT64_MAX		(u64)(~((u64)0))</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#define SMI_CMD			0x00</div><div class='del'>-#define SMI_CMD_BUSY		BIT(15)</div><div class='del'>-#define SMI_CMD_CLAUSE_22	BIT(12)</div><div class='del'>-#define SMI_CMD_OP_22_WRITE	((1 &lt;&lt; 10) | SMI_CMD_BUSY | SMI_CMD_CLAUSE_22)</div><div class='del'>-#define SMI_CMD_OP_22_READ	((2 &lt;&lt; 10) | SMI_CMD_BUSY | SMI_CMD_CLAUSE_22)</div><div class='del'>-#define SMI_CMD_OP_45_WRITE_ADDR	((0 &lt;&lt; 10) | SMI_CMD_BUSY)</div><div class='del'>-#define SMI_CMD_OP_45_WRITE_DATA	((1 &lt;&lt; 10) | SMI_CMD_BUSY)</div><div class='del'>-#define SMI_CMD_OP_45_READ_DATA		((2 &lt;&lt; 10) | SMI_CMD_BUSY)</div><div class='del'>-#define SMI_CMD_OP_45_READ_DATA_INC	((3 &lt;&lt; 10) | SMI_CMD_BUSY)</div><div class='del'>-#define SMI_DATA		0x01</div><div class='del'>-</div><div class='del'>-#define REG_PORT(p)		(0x10 + (p))</div><div class='del'>-#define PORT_STATUS		0x00</div><div class='del'>-#define PORT_STATUS_PAUSE_EN	BIT(15)</div><div class='del'>-#define PORT_STATUS_MY_PAUSE	BIT(14)</div><div class='del'>-#define PORT_STATUS_HD_FLOW	BIT(13)</div><div class='del'>-#define PORT_STATUS_PHY_DETECT	BIT(12)</div><div class='del'>-#define PORT_STATUS_LINK	BIT(11)</div><div class='del'>-#define PORT_STATUS_DUPLEX	BIT(10)</div><div class='del'>-#define PORT_STATUS_SPEED_MASK	0x0300</div><div class='del'>-#define PORT_STATUS_SPEED_10	0x0000</div><div class='del'>-#define PORT_STATUS_SPEED_100	0x0100</div><div class='del'>-#define PORT_STATUS_SPEED_1000	0x0200</div><div class='del'>-#define PORT_STATUS_EEE		BIT(6) /* 6352 */</div><div class='del'>-#define PORT_STATUS_AM_DIS	BIT(6) /* 6165 */</div><div class='del'>-#define PORT_STATUS_MGMII	BIT(6) /* 6185 */</div><div class='del'>-#define PORT_STATUS_TX_PAUSED	BIT(5)</div><div class='del'>-#define PORT_STATUS_FLOW_CTRL	BIT(4)</div><div class='del'>-#define PORT_PCS_CTRL		0x01</div><div class='del'>-#define PORT_PCS_CTRL_FC		BIT(7)</div><div class='del'>-#define PORT_PCS_CTRL_FORCE_FC		BIT(6)</div><div class='del'>-#define PORT_PCS_CTRL_LINK_UP		BIT(5)</div><div class='del'>-#define PORT_PCS_CTRL_FORCE_LINK	BIT(4)</div><div class='del'>-#define PORT_PCS_CTRL_DUPLEX_FULL	BIT(3)</div><div class='del'>-#define PORT_PCS_CTRL_FORCE_DUPLEX	BIT(2)</div><div class='del'>-#define PORT_PCS_CTRL_10		0x00</div><div class='del'>-#define PORT_PCS_CTRL_100		0x01</div><div class='del'>-#define PORT_PCS_CTRL_1000		0x02</div><div class='del'>-#define PORT_PCS_CTRL_UNFORCED		0x03</div><div class='del'>-#define PORT_PAUSE_CTRL		0x02</div><div class='del'>-#define PORT_SWITCH_ID		0x03</div><div class='del'>-#define PORT_SWITCH_ID_6031	0x0310</div><div class='del'>-#define PORT_SWITCH_ID_6035	0x0350</div><div class='del'>-#define PORT_SWITCH_ID_6046	0x0480</div><div class='del'>-#define PORT_SWITCH_ID_6061	0x0610</div><div class='del'>-#define PORT_SWITCH_ID_6065	0x0650</div><div class='del'>-#define PORT_SWITCH_ID_6085	0x04a0</div><div class='del'>-#define PORT_SWITCH_ID_6092	0x0970</div><div class='del'>-#define PORT_SWITCH_ID_6095	0x0950</div><div class='del'>-#define PORT_SWITCH_ID_6096	0x0980</div><div class='del'>-#define PORT_SWITCH_ID_6097	0x0990</div><div class='del'>-#define PORT_SWITCH_ID_6108	0x1070</div><div class='del'>-#define PORT_SWITCH_ID_6121	0x1040</div><div class='del'>-#define PORT_SWITCH_ID_6122	0x1050</div><div class='del'>-#define PORT_SWITCH_ID_6123	0x1210</div><div class='del'>-#define PORT_SWITCH_ID_6123_A1	0x1212</div><div class='del'>-#define PORT_SWITCH_ID_6123_A2	0x1213</div><div class='del'>-#define PORT_SWITCH_ID_6131	0x1060</div><div class='del'>-#define PORT_SWITCH_ID_6131_B2	0x1066</div><div class='del'>-#define PORT_SWITCH_ID_6152	0x1a40</div><div class='del'>-#define PORT_SWITCH_ID_6155	0x1a50</div><div class='del'>-#define PORT_SWITCH_ID_6161	0x1610</div><div class='del'>-#define PORT_SWITCH_ID_6161_A1	0x1612</div><div class='del'>-#define PORT_SWITCH_ID_6161_A2	0x1613</div><div class='del'>-#define PORT_SWITCH_ID_6165	0x1650</div><div class='del'>-#define PORT_SWITCH_ID_6165_A1	0x1652</div><div class='del'>-#define PORT_SWITCH_ID_6165_A2	0x1653</div><div class='del'>-#define PORT_SWITCH_ID_6171	0x1710</div><div class='del'>-#define PORT_SWITCH_ID_6172	0x1720</div><div class='del'>-#define PORT_SWITCH_ID_6175	0x1750</div><div class='del'>-#define PORT_SWITCH_ID_6176	0x1760</div><div class='del'>-#define PORT_SWITCH_ID_6182	0x1a60</div><div class='del'>-#define PORT_SWITCH_ID_6185	0x1a70</div><div class='del'>-#define PORT_SWITCH_ID_6240	0x2400</div><div class='del'>-#define PORT_SWITCH_ID_6320	0x1250</div><div class='del'>-#define PORT_SWITCH_ID_6350	0x3710</div><div class='del'>-#define PORT_SWITCH_ID_6351	0x3750</div><div class='del'>-#define PORT_SWITCH_ID_6352	0x3520</div><div class='del'>-#define PORT_SWITCH_ID_6352_A0	0x3521</div><div class='del'>-#define PORT_SWITCH_ID_6352_A1	0x3522</div><div class='del'>-#define PORT_CONTROL		0x04</div><div class='del'>-#define PORT_CONTROL_USE_CORE_TAG	BIT(15)</div><div class='del'>-#define PORT_CONTROL_DROP_ON_LOCK	BIT(14)</div><div class='del'>-#define PORT_CONTROL_EGRESS_UNMODIFIED	(0x0 &lt;&lt; 12)</div><div class='del'>-#define PORT_CONTROL_EGRESS_UNTAGGED	(0x1 &lt;&lt; 12)</div><div class='del'>-#define PORT_CONTROL_EGRESS_TAGGED	(0x2 &lt;&lt; 12)</div><div class='del'>-#define PORT_CONTROL_EGRESS_ADD_TAG	(0x3 &lt;&lt; 12)</div><div class='del'>-#define PORT_CONTROL_HEADER		BIT(11)</div><div class='del'>-#define PORT_CONTROL_IGMP_MLD_SNOOP	BIT(10)</div><div class='del'>-#define PORT_CONTROL_DOUBLE_TAG		BIT(9)</div><div class='del'>-#define PORT_CONTROL_FRAME_MODE_NORMAL		(0x0 &lt;&lt; 8)</div><div class='del'>-#define PORT_CONTROL_FRAME_MODE_DSA		(0x1 &lt;&lt; 8)</div><div class='del'>-#define PORT_CONTROL_FRAME_MODE_PROVIDER	(0x2 &lt;&lt; 8)</div><div class='del'>-#define PORT_CONTROL_FRAME_ETHER_TYPE_DSA	(0x3 &lt;&lt; 8)</div><div class='del'>-#define PORT_CONTROL_DSA_TAG		BIT(8)</div><div class='del'>-#define PORT_CONTROL_VLAN_TUNNEL	BIT(7)</div><div class='del'>-#define PORT_CONTROL_TAG_IF_BOTH	BIT(6)</div><div class='del'>-#define PORT_CONTROL_USE_IP		BIT(5)</div><div class='del'>-#define PORT_CONTROL_USE_TAG		BIT(4)</div><div class='del'>-#define PORT_CONTROL_FORWARD_UNKNOWN_MC	BIT(3)</div><div class='del'>-#define PORT_CONTROL_FORWARD_UNKNOWN	BIT(2)</div><div class='del'>-#define PORT_CONTROL_STATE_MASK		0x03</div><div class='del'>-#define PORT_CONTROL_STATE_DISABLED	0x00</div><div class='del'>-#define PORT_CONTROL_STATE_BLOCKING	0x01</div><div class='del'>-#define PORT_CONTROL_STATE_LEARNING	0x02</div><div class='del'>-#define PORT_CONTROL_STATE_FORWARDING	0x03</div><div class='del'>-#define PORT_CONTROL_1		0x05</div><div class='del'>-#define PORT_BASE_VLAN		0x06</div><div class='del'>-#define PORT_DEFAULT_VLAN	0x07</div><div class='del'>-#define PORT_CONTROL_2		0x08</div><div class='del'>-#define PORT_CONTROL_2_IGNORE_FCS	BIT(15)</div><div class='del'>-#define PORT_CONTROL_2_VTU_PRI_OVERRIDE	BIT(14)</div><div class='del'>-#define PORT_CONTROL_2_SA_PRIO_OVERRIDE	BIT(13)</div><div class='del'>-#define PORT_CONTROL_2_DA_PRIO_OVERRIDE	BIT(12)</div><div class='del'>-#define PORT_CONTROL_2_JUMBO_1522	(0x00 &lt;&lt; 12)</div><div class='del'>-#define PORT_CONTROL_2_JUMBO_2048	(0x01 &lt;&lt; 12)</div><div class='del'>-#define PORT_CONTROL_2_JUMBO_10240	(0x02 &lt;&lt; 12)</div><div class='del'>-#define PORT_CONTROL_2_DISCARD_TAGGED	BIT(9)</div><div class='del'>-#define PORT_CONTROL_2_DISCARD_UNTAGGED	BIT(8)</div><div class='del'>-#define PORT_CONTROL_2_MAP_DA		BIT(7)</div><div class='del'>-#define PORT_CONTROL_2_DEFAULT_FORWARD	BIT(6)</div><div class='del'>-#define PORT_CONTROL_2_FORWARD_UNKNOWN	BIT(6)</div><div class='del'>-#define PORT_CONTROL_2_EGRESS_MONITOR	BIT(5)</div><div class='del'>-#define PORT_CONTROL_2_INGRESS_MONITOR	BIT(4)</div><div class='del'>-#define PORT_RATE_CONTROL	0x09</div><div class='del'>-#define PORT_RATE_CONTROL_2	0x0a</div><div class='del'>-#define PORT_ASSOC_VECTOR	0x0b</div><div class='del'>-#define PORT_ATU_CONTROL	0x0c</div><div class='del'>-#define PORT_PRI_OVERRIDE	0x0d</div><div class='del'>-#define PORT_ETH_TYPE		0x0f</div><div class='del'>-#define PORT_IN_DISCARD_LO	0x10</div><div class='del'>-#define PORT_IN_DISCARD_HI	0x11</div><div class='del'>-#define PORT_IN_FILTERED	0x12</div><div class='del'>-#define PORT_OUT_FILTERED	0x13</div><div class='del'>-#define PORT_TAG_REGMAP_0123	0x18</div><div class='del'>-#define PORT_TAG_REGMAP_4567	0x19</div><div class='del'>-</div><div class='del'>-#define REG_GLOBAL		0x1b</div><div class='del'>-#define GLOBAL_STATUS		0x00</div><div class='del'>-#define GLOBAL_STATUS_PPU_STATE BIT(15) /* 6351 and 6171 */</div><div class='del'>-/* Two bits for 6165, 6185 etc */</div><div class='del'>-#define GLOBAL_STATUS_PPU_MASK		(0x3 &lt;&lt; 14)</div><div class='del'>-#define GLOBAL_STATUS_PPU_DISABLED_RST	(0x0 &lt;&lt; 14)</div><div class='del'>-#define GLOBAL_STATUS_PPU_INITIALIZING	(0x1 &lt;&lt; 14)</div><div class='del'>-#define GLOBAL_STATUS_PPU_DISABLED	(0x2 &lt;&lt; 14)</div><div class='del'>-#define GLOBAL_STATUS_PPU_POLLING	(0x3 &lt;&lt; 14)</div><div class='del'>-#define GLOBAL_MAC_01		0x01</div><div class='del'>-#define GLOBAL_MAC_23		0x02</div><div class='del'>-#define GLOBAL_MAC_45		0x03</div><div class='del'>-#define GLOBAL_CONTROL		0x04</div><div class='del'>-#define GLOBAL_CONTROL_SW_RESET		BIT(15)</div><div class='del'>-#define GLOBAL_CONTROL_PPU_ENABLE	BIT(14)</div><div class='del'>-#define GLOBAL_CONTROL_DISCARD_EXCESS	BIT(13) /* 6352 */</div><div class='del'>-#define GLOBAL_CONTROL_SCHED_PRIO	BIT(11) /* 6152 */</div><div class='del'>-#define GLOBAL_CONTROL_MAX_FRAME_1632	BIT(10) /* 6152 */</div><div class='del'>-#define GLOBAL_CONTROL_RELOAD_EEPROM	BIT(9)	/* 6152 */</div><div class='del'>-#define GLOBAL_CONTROL_DEVICE_EN	BIT(7)</div><div class='del'>-#define GLOBAL_CONTROL_STATS_DONE_EN	BIT(6)</div><div class='del'>-#define GLOBAL_CONTROL_VTU_PROBLEM_EN	BIT(5)</div><div class='del'>-#define GLOBAL_CONTROL_VTU_DONE_EN	BIT(4)</div><div class='del'>-#define GLOBAL_CONTROL_ATU_PROBLEM_EN	BIT(3)</div><div class='del'>-#define GLOBAL_CONTROL_ATU_DONE_EN	BIT(2)</div><div class='del'>-#define GLOBAL_CONTROL_TCAM_EN		BIT(1)</div><div class='del'>-#define GLOBAL_CONTROL_EEPROM_DONE_EN	BIT(0)</div><div class='del'>-#define GLOBAL_VTU_OP		0x05</div><div class='del'>-#define GLOBAL_VTU_VID		0x06</div><div class='del'>-#define GLOBAL_VTU_DATA_0_3	0x07</div><div class='del'>-#define GLOBAL_VTU_DATA_4_7	0x08</div><div class='del'>-#define GLOBAL_VTU_DATA_8_11	0x09</div><div class='del'>-#define GLOBAL_ATU_CONTROL	0x0a</div><div class='del'>-#define GLOBAL_ATU_CONTROL_LEARN2ALL	BIT(3)</div><div class='del'>-#define GLOBAL_ATU_OP		0x0b</div><div class='del'>-#define GLOBAL_ATU_OP_BUSY	BIT(15)</div><div class='del'>-#define GLOBAL_ATU_OP_NOP		(0 &lt;&lt; 12)</div><div class='del'>-#define GLOBAL_ATU_OP_FLUSH_ALL		((1 &lt;&lt; 12) | GLOBAL_ATU_OP_BUSY)</div><div class='del'>-#define GLOBAL_ATU_OP_FLUSH_NON_STATIC	((2 &lt;&lt; 12) | GLOBAL_ATU_OP_BUSY)</div><div class='del'>-#define GLOBAL_ATU_OP_LOAD_DB		((3 &lt;&lt; 12) | GLOBAL_ATU_OP_BUSY)</div><div class='del'>-#define GLOBAL_ATU_OP_GET_NEXT_DB	((4 &lt;&lt; 12) | GLOBAL_ATU_OP_BUSY)</div><div class='del'>-#define GLOBAL_ATU_OP_FLUSH_DB		((5 &lt;&lt; 12) | GLOBAL_ATU_OP_BUSY)</div><div class='del'>-#define GLOBAL_ATU_OP_FLUSH_NON_STATIC_DB ((6 &lt;&lt; 12) | GLOBAL_ATU_OP_BUSY)</div><div class='del'>-#define GLOBAL_ATU_OP_GET_CLR_VIOLATION	  ((7 &lt;&lt; 12) | GLOBAL_ATU_OP_BUSY)</div><div class='del'>-#define GLOBAL_ATU_DATA		0x0c</div><div class='del'>-#define GLOBAL_ATU_DATA_TRUNK			BIT(15)</div><div class='del'>-#define GLOBAL_ATU_DATA_PORT_VECTOR_MASK	0x3ff0</div><div class='del'>-#define GLOBAL_ATU_DATA_PORT_VECTOR_SHIFT	4</div><div class='del'>-#define GLOBAL_ATU_DATA_STATE_MASK		0x0f</div><div class='del'>-#define GLOBAL_ATU_DATA_STATE_UNUSED		0x00</div><div class='del'>-#define GLOBAL_ATU_DATA_STATE_UC_MGMT		0x0d</div><div class='del'>-#define GLOBAL_ATU_DATA_STATE_UC_STATIC		0x0e</div><div class='del'>-#define GLOBAL_ATU_DATA_STATE_UC_PRIO_OVER	0x0f</div><div class='del'>-#define GLOBAL_ATU_DATA_STATE_MC_NONE_RATE	0x05</div><div class='del'>-#define GLOBAL_ATU_DATA_STATE_MC_STATIC		0x07</div><div class='del'>-#define GLOBAL_ATU_DATA_STATE_MC_MGMT		0x0e</div><div class='del'>-#define GLOBAL_ATU_DATA_STATE_MC_PRIO_OVER	0x0f</div><div class='del'>-#define GLOBAL_ATU_MAC_01	0x0d</div><div class='del'>-#define GLOBAL_ATU_MAC_23	0x0e</div><div class='del'>-#define GLOBAL_ATU_MAC_45	0x0f</div><div class='del'>-#define GLOBAL_IP_PRI_0		0x10</div><div class='del'>-#define GLOBAL_IP_PRI_1		0x11</div><div class='del'>-#define GLOBAL_IP_PRI_2		0x12</div><div class='del'>-#define GLOBAL_IP_PRI_3		0x13</div><div class='del'>-#define GLOBAL_IP_PRI_4		0x14</div><div class='del'>-#define GLOBAL_IP_PRI_5		0x15</div><div class='del'>-#define GLOBAL_IP_PRI_6		0x16</div><div class='del'>-#define GLOBAL_IP_PRI_7		0x17</div><div class='del'>-#define GLOBAL_IEEE_PRI		0x18</div><div class='del'>-#define GLOBAL_CORE_TAG_TYPE	0x19</div><div class='del'>-#define GLOBAL_MONITOR_CONTROL	0x1a</div><div class='del'>-#define GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT	12</div><div class='del'>-#define GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT	8</div><div class='del'>-#define GLOBAL_MONITOR_CONTROL_ARP_SHIFT	4</div><div class='del'>-#define GLOBAL_MONITOR_CONTROL_MIRROR_SHIFT	0</div><div class='del'>-#define GLOBAL_MONITOR_CONTROL_ARP_DISABLED	(0xf0)</div><div class='del'>-#define GLOBAL_CONTROL_2	0x1c</div><div class='del'>-#define GLOBAL_CONTROL_2_NO_CASCADE		0xe000</div><div class='del'>-#define GLOBAL_CONTROL_2_MULTIPLE_CASCADE	0xf000</div><div class='del'>-</div><div class='del'>-#define GLOBAL_STATS_OP		0x1d</div><div class='del'>-#define GLOBAL_STATS_OP_BUSY	BIT(15)</div><div class='del'>-#define GLOBAL_STATS_OP_NOP		(0 &lt;&lt; 12)</div><div class='del'>-#define GLOBAL_STATS_OP_FLUSH_ALL	((1 &lt;&lt; 12) | GLOBAL_STATS_OP_BUSY)</div><div class='del'>-#define GLOBAL_STATS_OP_FLUSH_PORT	((2 &lt;&lt; 12) | GLOBAL_STATS_OP_BUSY)</div><div class='del'>-#define GLOBAL_STATS_OP_READ_CAPTURED	((4 &lt;&lt; 12) | GLOBAL_STATS_OP_BUSY)</div><div class='del'>-#define GLOBAL_STATS_OP_CAPTURE_PORT	((5 &lt;&lt; 12) | GLOBAL_STATS_OP_BUSY)</div><div class='del'>-#define GLOBAL_STATS_OP_HIST_RX		((1 &lt;&lt; 10) | GLOBAL_STATS_OP_BUSY)</div><div class='del'>-#define GLOBAL_STATS_OP_HIST_TX		((2 &lt;&lt; 10) | GLOBAL_STATS_OP_BUSY)</div><div class='del'>-#define GLOBAL_STATS_OP_HIST_RX_TX	((3 &lt;&lt; 10) | GLOBAL_STATS_OP_BUSY)</div><div class='del'>-#define GLOBAL_STATS_COUNTER_32	0x1e</div><div class='del'>-#define GLOBAL_STATS_COUNTER_01	0x1f</div><div class='del'>-</div><div class='del'>-#define REG_GLOBAL2		0x1c</div><div class='del'>-#define GLOBAL2_INT_SOURCE	0x00</div><div class='del'>-#define GLOBAL2_INT_MASK	0x01</div><div class='del'>-#define GLOBAL2_MGMT_EN_2X	0x02</div><div class='del'>-#define GLOBAL2_MGMT_EN_0X	0x03</div><div class='del'>-#define GLOBAL2_FLOW_CONTROL	0x04</div><div class='del'>-#define GLOBAL2_SWITCH_MGMT	0x05</div><div class='del'>-#define GLOBAL2_SWITCH_MGMT_USE_DOUBLE_TAG_DATA	BIT(15)</div><div class='del'>-#define GLOBAL2_SWITCH_MGMT_PREVENT_LOOPS	BIT(14)</div><div class='del'>-#define GLOBAL2_SWITCH_MGMT_FLOW_CONTROL_MSG	BIT(13)</div><div class='del'>-#define GLOBAL2_SWITCH_MGMT_FORCE_FLOW_CTRL_PRI	BIT(7)</div><div class='del'>-#define GLOBAL2_SWITCH_MGMT_RSVD2CPU		BIT(3)</div><div class='del'>-#define GLOBAL2_DEVICE_MAPPING	0x06</div><div class='del'>-#define GLOBAL2_DEVICE_MAPPING_UPDATE		BIT(15)</div><div class='del'>-#define GLOBAL2_DEVICE_MAPPING_TARGET_SHIFT	8</div><div class='del'>-#define GLOBAL2_DEVICE_MAPPING_PORT_MASK	0x0f</div><div class='del'>-#define GLOBAL2_TRUNK_MASK	0x07</div><div class='del'>-#define GLOBAL2_TRUNK_MASK_UPDATE		BIT(15)</div><div class='del'>-#define GLOBAL2_TRUNK_MASK_NUM_SHIFT		12</div><div class='del'>-#define GLOBAL2_TRUNK_MAPPING	0x08</div><div class='del'>-#define GLOBAL2_TRUNK_MAPPING_UPDATE		BIT(15)</div><div class='del'>-#define GLOBAL2_TRUNK_MAPPING_ID_SHIFT		11</div><div class='del'>-#define GLOBAL2_INGRESS_OP	0x09</div><div class='del'>-#define GLOBAL2_INGRESS_DATA	0x0a</div><div class='del'>-#define GLOBAL2_PVT_ADDR	0x0b</div><div class='del'>-#define GLOBAL2_PVT_DATA	0x0c</div><div class='del'>-#define GLOBAL2_SWITCH_MAC	0x0d</div><div class='del'>-#define GLOBAL2_SWITCH_MAC_BUSY BIT(15)</div><div class='del'>-#define GLOBAL2_ATU_STATS	0x0e</div><div class='del'>-#define GLOBAL2_PRIO_OVERRIDE	0x0f</div><div class='del'>-#define GLOBAL2_PRIO_OVERRIDE_FORCE_SNOOP	BIT(7)</div><div class='del'>-#define GLOBAL2_PRIO_OVERRIDE_SNOOP_SHIFT	4</div><div class='del'>-#define GLOBAL2_PRIO_OVERRIDE_FORCE_ARP		BIT(3)</div><div class='del'>-#define GLOBAL2_PRIO_OVERRIDE_ARP_SHIFT		0</div><div class='del'>-#define GLOBAL2_EEPROM_OP	0x14</div><div class='del'>-#define GLOBAL2_EEPROM_OP_BUSY	BIT(15)</div><div class='del'>-#define GLOBAL2_EEPROM_OP_LOAD	BIT(11)</div><div class='del'>-#define GLOBAL2_EEPROM_DATA	0x15</div><div class='del'>-#define GLOBAL2_PTP_AVB_OP	0x16</div><div class='del'>-#define GLOBAL2_PTP_AVB_DATA	0x17</div><div class='del'>-#define GLOBAL2_SMI_OP		0x18</div><div class='del'>-#define GLOBAL2_SMI_OP_BUSY		BIT(15)</div><div class='del'>-#define GLOBAL2_SMI_OP_CLAUSE_22	BIT(12)</div><div class='del'>-#define GLOBAL2_SMI_OP_22_WRITE		((1 &lt;&lt; 10) | GLOBAL2_SMI_OP_BUSY | \</div><div class='del'>-					 GLOBAL2_SMI_OP_CLAUSE_22)</div><div class='del'>-#define GLOBAL2_SMI_OP_22_READ		((2 &lt;&lt; 10) | GLOBAL2_SMI_OP_BUSY | \</div><div class='del'>-					 GLOBAL2_SMI_OP_CLAUSE_22)</div><div class='del'>-#define GLOBAL2_SMI_OP_45_WRITE_ADDR	((0 &lt;&lt; 10) | GLOBAL2_SMI_OP_BUSY)</div><div class='del'>-#define GLOBAL2_SMI_OP_45_WRITE_DATA	((1 &lt;&lt; 10) | GLOBAL2_SMI_OP_BUSY)</div><div class='del'>-#define GLOBAL2_SMI_OP_45_READ_DATA	((2 &lt;&lt; 10) | GLOBAL2_SMI_OP_BUSY)</div><div class='del'>-#define GLOBAL2_SMI_DATA	0x19</div><div class='del'>-#define GLOBAL2_SCRATCH_MISC	0x1a</div><div class='del'>-#define GLOBAL2_SCRATCH_BUSY		BIT(15)</div><div class='del'>-#define GLOBAL2_SCRATCH_REGISTER_SHIFT	8</div><div class='del'>-#define GLOBAL2_SCRATCH_VALUE_MASK	0xff</div><div class='del'>-#define GLOBAL2_WDOG_CONTROL	0x1b</div><div class='del'>-#define GLOBAL2_QOS_WEIGHT	0x1c</div><div class='del'>-#define GLOBAL2_MISC		0x1d</div><div class='del'>-</div><div class='del'>-struct mv88e6xxx_priv_state {</div><div class='del'>-	/* When using multi-chip addressing, this mutex protects</div><div class='del'>-	 * access to the indirect access registers.  (In single-chip</div><div class='del'>-	 * mode, this mutex is effectively useless.)</div><div class='del'>-	 */</div><div class='del'>-	struct mutex	smi_mutex;</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_NET_DSA_MV88E6XXX_NEED_PPU</div><div class='del'>-	/* Handles automatic disabling and re-enabling of the PHY</div><div class='del'>-	 * polling unit.</div><div class='del'>-	 */</div><div class='del'>-	struct mutex		ppu_mutex;</div><div class='del'>-	int			ppu_disabled;</div><div class='del'>-	struct work_struct	ppu_work;</div><div class='del'>-	struct timer_list	ppu_timer;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	/* This mutex serialises access to the statistics unit.</div><div class='del'>-	 * Hold this mutex over snapshot + dump sequences.</div><div class='del'>-	 */</div><div class='del'>-	struct mutex	stats_mutex;</div><div class='del'>-</div><div class='del'>-	/* This mutex serializes phy access for chips with</div><div class='del'>-	 * indirect phy addressing. It is unused for chips</div><div class='del'>-	 * with direct phy access.</div><div class='del'>-	 */</div><div class='del'>-	struct mutex	phy_mutex;</div><div class='del'>-</div><div class='del'>-	/* This mutex serializes eeprom access for chips with</div><div class='del'>-	 * eeprom support.</div><div class='del'>-	 */</div><div class='del'>-	struct mutex eeprom_mutex;</div><div class='del'>-</div><div class='del'>-	int		id; /* switch product id */</div><div class='del'>-	int		num_ports;	/* number of switch ports */</div><div class='del'>-</div><div class='del'>-	/* hw bridging */</div><div class='del'>-</div><div class='del'>-	u32 fid_mask;</div><div class='del'>-	u8 fid[DSA_MAX_PORTS];</div><div class='del'>-	u16 bridge_mask[DSA_MAX_PORTS];</div><div class='del'>-</div><div class='del'>-	unsigned long port_state_update_mask;</div><div class='del'>-	u8 port_state[DSA_MAX_PORTS];</div><div class='del'>-</div><div class='del'>-	struct work_struct bridge_work;</div><div class='del'>-</div><div class='del'>-	struct dentry *dbgfs;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct mv88e6xxx_hw_stat {</div><div class='del'>-	char string[ETH_GSTRING_LEN];</div><div class='del'>-	int sizeof_stat;</div><div class='del'>-	int reg;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-int mv88e6xxx_switch_reset(struct dsa_switch *ds, bool ppu_active);</div><div class='del'>-int mv88e6xxx_setup_ports(struct dsa_switch *ds);</div><div class='del'>-int mv88e6xxx_setup_common(struct dsa_switch *ds);</div><div class='del'>-int mv88e6xxx_setup_global(struct dsa_switch *ds);</div><div class='del'>-int __mv88e6xxx_reg_read(struct mii_bus *bus, int sw_addr, int addr, int reg);</div><div class='del'>-int mv88e6xxx_reg_read(struct dsa_switch *ds, int addr, int reg);</div><div class='del'>-int __mv88e6xxx_reg_write(struct mii_bus *bus, int sw_addr, int addr,</div><div class='del'>-			  int reg, u16 val);</div><div class='del'>-int mv88e6xxx_reg_write(struct dsa_switch *ds, int addr, int reg, u16 val);</div><div class='del'>-int mv88e6xxx_set_addr_direct(struct dsa_switch *ds, u8 *addr);</div><div class='del'>-int mv88e6xxx_set_addr_indirect(struct dsa_switch *ds, u8 *addr);</div><div class='del'>-int mv88e6xxx_phy_read(struct dsa_switch *ds, int port, int regnum);</div><div class='del'>-int mv88e6xxx_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val);</div><div class='del'>-int mv88e6xxx_phy_read_indirect(struct dsa_switch *ds, int port, int regnum);</div><div class='del'>-int mv88e6xxx_phy_write_indirect(struct dsa_switch *ds, int port, int regnum,</div><div class='del'>-				 u16 val);</div><div class='del'>-void mv88e6xxx_ppu_state_init(struct dsa_switch *ds);</div><div class='del'>-int mv88e6xxx_phy_read_ppu(struct dsa_switch *ds, int addr, int regnum);</div><div class='del'>-int mv88e6xxx_phy_write_ppu(struct dsa_switch *ds, int addr,</div><div class='del'>-			    int regnum, u16 val);</div><div class='del'>-void mv88e6xxx_poll_link(struct dsa_switch *ds);</div><div class='del'>-void mv88e6xxx_get_strings(struct dsa_switch *ds, int port, uint8_t *data);</div><div class='del'>-void mv88e6xxx_get_ethtool_stats(struct dsa_switch *ds, int port,</div><div class='del'>-				 uint64_t *data);</div><div class='del'>-int mv88e6xxx_get_sset_count(struct dsa_switch *ds);</div><div class='del'>-int mv88e6xxx_get_sset_count_basic(struct dsa_switch *ds);</div><div class='del'>-int mv88e6xxx_get_regs_len(struct dsa_switch *ds, int port);</div><div class='del'>-void mv88e6xxx_get_regs(struct dsa_switch *ds, int port,</div><div class='del'>-			struct ethtool_regs *regs, void *_p);</div><div class='del'>-int  mv88e6xxx_get_temp(struct dsa_switch *ds, int *temp);</div><div class='del'>-int mv88e6xxx_eeprom_load_wait(struct dsa_switch *ds);</div><div class='del'>-int mv88e6xxx_eeprom_busy_wait(struct dsa_switch *ds);</div><div class='del'>-int mv88e6xxx_phy_read_indirect(struct dsa_switch *ds, int addr, int regnum);</div><div class='del'>-int mv88e6xxx_phy_write_indirect(struct dsa_switch *ds, int addr, int regnum,</div><div class='del'>-				 u16 val);</div><div class='del'>-int mv88e6xxx_get_eee(struct dsa_switch *ds, int port, struct ethtool_eee *e);</div><div class='del'>-int mv88e6xxx_set_eee(struct dsa_switch *ds, int port,</div><div class='del'>-		      struct phy_device *phydev, struct ethtool_eee *e);</div><div class='del'>-int mv88e6xxx_join_bridge(struct dsa_switch *ds, int port, u32 br_port_mask);</div><div class='del'>-int mv88e6xxx_leave_bridge(struct dsa_switch *ds, int port, u32 br_port_mask);</div><div class='del'>-int mv88e6xxx_port_stp_update(struct dsa_switch *ds, int port, u8 state);</div><div class='del'>-int mv88e6xxx_port_fdb_add(struct dsa_switch *ds, int port,</div><div class='del'>-			   const unsigned char *addr, u16 vid);</div><div class='del'>-int mv88e6xxx_port_fdb_del(struct dsa_switch *ds, int port,</div><div class='del'>-			   const unsigned char *addr, u16 vid);</div><div class='del'>-int mv88e6xxx_port_fdb_getnext(struct dsa_switch *ds, int port,</div><div class='del'>-			       unsigned char *addr, bool *is_static);</div><div class='del'>-int mv88e6xxx_phy_page_read(struct dsa_switch *ds, int port, int page, int reg);</div><div class='del'>-int mv88e6xxx_phy_page_write(struct dsa_switch *ds, int port, int page,</div><div class='del'>-			     int reg, int val);</div><div class='del'>-extern struct dsa_switch_driver mv88e6131_switch_driver;</div><div class='del'>-extern struct dsa_switch_driver mv88e6123_61_65_switch_driver;</div><div class='del'>-extern struct dsa_switch_driver mv88e6352_switch_driver;</div><div class='del'>-extern struct dsa_switch_driver mv88e6171_switch_driver;</div><div class='del'>-</div><div class='del'>-#define REG_READ(addr, reg)						\</div><div class='del'>-	({								\</div><div class='del'>-		int __ret;						\</div><div class='del'>-									\</div><div class='del'>-		__ret = mv88e6xxx_reg_read(ds, addr, reg);		\</div><div class='del'>-		if (__ret &lt; 0)						\</div><div class='del'>-			return __ret;					\</div><div class='del'>-		__ret;							\</div><div class='del'>-	})</div><div class='del'>-</div><div class='del'>-#define REG_WRITE(addr, reg, val)					\</div><div class='del'>-	({								\</div><div class='del'>-		int __ret;						\</div><div class='del'>-									\</div><div class='del'>-		__ret = mv88e6xxx_reg_write(ds, addr, reg, val);	\</div><div class='del'>-		if (__ret &lt; 0)						\</div><div class='del'>-			return __ret;					\</div><div class='del'>-	})</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/Kconfig b/drivers/net/dsa/mv88e6xxx/Kconfig<br/>new file mode 100644<br/>index 000000000000..64ae3882d17c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,29 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+config NET_DSA_MV88E6XXX</div><div class='add'>+	tristate "Marvell 88E6xxx Ethernet switch fabric support"</div><div class='add'>+	depends on NET_DSA</div><div class='add'>+	select IRQ_DOMAIN</div><div class='add'>+	select NET_DSA_TAG_EDSA</div><div class='add'>+	select NET_DSA_TAG_DSA</div><div class='add'>+	help</div><div class='add'>+	  This driver adds support for most of the Marvell 88E6xxx models of</div><div class='add'>+	  Ethernet switch chips, except 88E6060.</div><div class='add'>+</div><div class='add'>+config NET_DSA_MV88E6XXX_PTP</div><div class='add'>+	bool "PTP support for Marvell 88E6xxx"</div><div class='add'>+	default n</div><div class='add'>+	depends on (NET_DSA_MV88E6XXX = y &amp;&amp; PTP_1588_CLOCK = y) || \</div><div class='add'>+	           (NET_DSA_MV88E6XXX = m &amp;&amp; PTP_1588_CLOCK)</div><div class='add'>+	help</div><div class='add'>+	  Say Y to enable PTP hardware timestamping on Marvell 88E6xxx switch</div><div class='add'>+	  chips that support it.</div><div class='add'>+</div><div class='add'>+config NET_DSA_MV88E6XXX_LEDS</div><div class='add'>+	bool "LED support for Marvell 88E6xxx"</div><div class='add'>+	default y</div><div class='add'>+	depends on NET_DSA_MV88E6XXX</div><div class='add'>+	depends on LEDS_CLASS=y || LEDS_CLASS=NET_DSA_MV88E6XXX</div><div class='add'>+	depends on LEDS_TRIGGERS</div><div class='add'>+	help</div><div class='add'>+	  This enabled support for controlling the LEDs attached to the</div><div class='add'>+	  Marvell 88E6xxx switch chips.</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/Makefile b/drivers/net/dsa/mv88e6xxx/Makefile<br/>new file mode 100644<br/>index 000000000000..dd961081d631<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/Makefile</a></div><div class='hunk'>@@ -0,0 +1,26 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+obj-$(CONFIG_NET_DSA_MV88E6XXX) += mv88e6xxx.o</div><div class='add'>+mv88e6xxx-objs := chip.o</div><div class='add'>+mv88e6xxx-objs += devlink.o</div><div class='add'>+mv88e6xxx-objs += global1.o</div><div class='add'>+mv88e6xxx-objs += global1_atu.o</div><div class='add'>+mv88e6xxx-objs += global1_vtu.o</div><div class='add'>+mv88e6xxx-objs += global2.o</div><div class='add'>+mv88e6xxx-objs += global2_avb.o</div><div class='add'>+mv88e6xxx-objs += global2_scratch.o</div><div class='add'>+mv88e6xxx-$(CONFIG_NET_DSA_MV88E6XXX_PTP) += hwtstamp.o</div><div class='add'>+mv88e6xxx-$(CONFIG_NET_DSA_MV88E6XXX_LEDS) += leds.o</div><div class='add'>+mv88e6xxx-objs += pcs-6185.o</div><div class='add'>+mv88e6xxx-objs += pcs-6352.o</div><div class='add'>+mv88e6xxx-objs += pcs-639x.o</div><div class='add'>+mv88e6xxx-objs += phy.o</div><div class='add'>+mv88e6xxx-objs += port.o</div><div class='add'>+mv88e6xxx-objs += port_hidden.o</div><div class='add'>+mv88e6xxx-$(CONFIG_NET_DSA_MV88E6XXX_PTP) += ptp.o</div><div class='add'>+mv88e6xxx-objs += serdes.o</div><div class='add'>+mv88e6xxx-objs += smi.o</div><div class='add'>+mv88e6xxx-objs += switchdev.o</div><div class='add'>+mv88e6xxx-objs += trace.o</div><div class='add'>+</div><div class='add'>+# for tracing framework to find trace.h</div><div class='add'>+CFLAGS_trace.o := -I$(src)</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c<br/>new file mode 100644<br/>index 000000000000..b4d48997bf46<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/chip.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/chip.c</a></div><div class='hunk'>@@ -0,0 +1,7507 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Marvell 88e6xxx Ethernet switch single-chip support</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2008 Marvell Semiconductor</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2016 Andrew Lunn &lt;andrew@lunn.ch&gt;</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2016-2017 Savoir-faire Linux Inc.</div><div class='add'>+ *	Vivien Didelot &lt;vivien.didelot@savoirfairelinux.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/dsa/mv88e6xxx.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/if_bridge.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/irqdomain.h&gt;</div><div class='add'>+#include &lt;linux/jiffies.h&gt;</div><div class='add'>+#include &lt;linux/list.h&gt;</div><div class='add'>+#include &lt;linux/mdio.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_irq.h&gt;</div><div class='add'>+#include &lt;linux/of_mdio.h&gt;</div><div class='add'>+#include &lt;linux/platform_data/mv88e6xxx.h&gt;</div><div class='add'>+#include &lt;linux/property.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/gpio/consumer.h&gt;</div><div class='add'>+#include &lt;linux/phylink.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+</div><div class='add'>+#include "chip.h"</div><div class='add'>+#include "devlink.h"</div><div class='add'>+#include "global1.h"</div><div class='add'>+#include "global2.h"</div><div class='add'>+#include "hwtstamp.h"</div><div class='add'>+#include "phy.h"</div><div class='add'>+#include "port.h"</div><div class='add'>+#include "ptp.h"</div><div class='add'>+#include "serdes.h"</div><div class='add'>+#include "smi.h"</div><div class='add'>+</div><div class='add'>+static void assert_reg_lock(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	if (unlikely(!mutex_is_locked(&amp;chip-&gt;reg_lock))) {</div><div class='add'>+		dev_err(chip-&gt;dev, "Switch registers lock not held!\n");</div><div class='add'>+		dump_stack();</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_read(struct mv88e6xxx_chip *chip, int addr, int reg, u16 *val)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	assert_reg_lock(chip);</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_smi_read(chip, addr, reg, val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	dev_dbg(chip-&gt;dev, "&lt;- addr: 0x%.2x reg: 0x%.2x val: 0x%.4x\n",</div><div class='add'>+		addr, reg, *val);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_write(struct mv88e6xxx_chip *chip, int addr, int reg, u16 val)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	assert_reg_lock(chip);</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_smi_write(chip, addr, reg, val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	dev_dbg(chip-&gt;dev, "-&gt; addr: 0x%.2x reg: 0x%.2x val: 0x%.4x\n",</div><div class='add'>+		addr, reg, val);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_wait_mask(struct mv88e6xxx_chip *chip, int addr, int reg,</div><div class='add'>+			u16 mask, u16 val)</div><div class='add'>+{</div><div class='add'>+	const unsigned long timeout = jiffies + msecs_to_jiffies(50);</div><div class='add'>+	u16 data;</div><div class='add'>+	int err;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* There's no bus specific operation to wait for a mask. Even</div><div class='add'>+	 * if the initial poll takes longer than 50ms, always do at</div><div class='add'>+	 * least one more attempt.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; time_before(jiffies, timeout) || (i &lt; 2); i++) {</div><div class='add'>+		err = mv88e6xxx_read(chip, addr, reg, &amp;data);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		if ((data &amp; mask) == val)</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		if (i &lt; 2)</div><div class='add'>+			cpu_relax();</div><div class='add'>+		else</div><div class='add'>+			usleep_range(1000, 2000);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_read(chip, addr, reg, &amp;data);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if ((data &amp; mask) == val)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	dev_err(chip-&gt;dev, "Timeout while waiting for switch\n");</div><div class='add'>+	return -ETIMEDOUT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_wait_bit(struct mv88e6xxx_chip *chip, int addr, int reg,</div><div class='add'>+		       int bit, int val)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_wait_mask(chip, addr, reg, BIT(bit),</div><div class='add'>+				   val ? BIT(bit) : 0x0000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct mii_bus *mv88e6xxx_default_mdio_bus(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_mdio_bus *mdio_bus;</div><div class='add'>+</div><div class='add'>+	mdio_bus = list_first_entry_or_null(&amp;chip-&gt;mdios,</div><div class='add'>+					    struct mv88e6xxx_mdio_bus, list);</div><div class='add'>+	if (!mdio_bus)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	return mdio_bus-&gt;bus;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_g1_irq_mask(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = irq_data_get_irq_chip_data(d);</div><div class='add'>+	unsigned int n = d-&gt;hwirq;</div><div class='add'>+</div><div class='add'>+	chip-&gt;g1_irq.masked |= (1 &lt;&lt; n);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_g1_irq_unmask(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = irq_data_get_irq_chip_data(d);</div><div class='add'>+	unsigned int n = d-&gt;hwirq;</div><div class='add'>+</div><div class='add'>+	chip-&gt;g1_irq.masked &amp;= ~(1 &lt;&lt; n);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t mv88e6xxx_g1_irq_thread_work(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	unsigned int nhandled = 0;</div><div class='add'>+	unsigned int sub_irq;</div><div class='add'>+	unsigned int n;</div><div class='add'>+	u16 reg;</div><div class='add'>+	u16 ctl1;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_STS, &amp;reg);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		for (n = 0; n &lt; chip-&gt;g1_irq.nirqs; ++n) {</div><div class='add'>+			if (reg &amp; (1 &lt;&lt; n)) {</div><div class='add'>+				sub_irq = irq_find_mapping(chip-&gt;g1_irq.domain,</div><div class='add'>+							   n);</div><div class='add'>+				handle_nested_irq(sub_irq);</div><div class='add'>+				++nhandled;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		mv88e6xxx_reg_lock(chip);</div><div class='add'>+		err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_CTL1, &amp;ctl1);</div><div class='add'>+		if (err)</div><div class='add'>+			goto unlock;</div><div class='add'>+		err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_STS, &amp;reg);</div><div class='add'>+unlock:</div><div class='add'>+		mv88e6xxx_reg_unlock(chip);</div><div class='add'>+		if (err)</div><div class='add'>+			goto out;</div><div class='add'>+		ctl1 &amp;= GENMASK(chip-&gt;g1_irq.nirqs, 0);</div><div class='add'>+	} while (reg &amp; ctl1);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return (nhandled &gt; 0 ? IRQ_HANDLED : IRQ_NONE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t mv88e6xxx_g1_irq_thread_fn(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = dev_id;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_irq_thread_work(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_g1_irq_bus_lock(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = irq_data_get_irq_chip_data(d);</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_g1_irq_bus_sync_unlock(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = irq_data_get_irq_chip_data(d);</div><div class='add'>+	u16 mask = GENMASK(chip-&gt;g1_irq.nirqs, 0);</div><div class='add'>+	u16 reg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_CTL1, &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	reg &amp;= ~mask;</div><div class='add'>+	reg |= (~chip-&gt;g1_irq.masked &amp; mask);</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL1, reg);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct irq_chip mv88e6xxx_g1_irq_chip = {</div><div class='add'>+	.name			= "mv88e6xxx-g1",</div><div class='add'>+	.irq_mask		= mv88e6xxx_g1_irq_mask,</div><div class='add'>+	.irq_unmask		= mv88e6xxx_g1_irq_unmask,</div><div class='add'>+	.irq_bus_lock		= mv88e6xxx_g1_irq_bus_lock,</div><div class='add'>+	.irq_bus_sync_unlock	= mv88e6xxx_g1_irq_bus_sync_unlock,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g1_irq_domain_map(struct irq_domain *d,</div><div class='add'>+				       unsigned int irq,</div><div class='add'>+				       irq_hw_number_t hwirq)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = d-&gt;host_data;</div><div class='add'>+</div><div class='add'>+	irq_set_chip_data(irq, d-&gt;host_data);</div><div class='add'>+	irq_set_chip_and_handler(irq, &amp;chip-&gt;g1_irq.chip, handle_level_irq);</div><div class='add'>+	irq_set_noprobe(irq);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct irq_domain_ops mv88e6xxx_g1_irq_domain_ops = {</div><div class='add'>+	.map	= mv88e6xxx_g1_irq_domain_map,</div><div class='add'>+	.xlate	= irq_domain_xlate_twocell,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* To be called with reg_lock held */</div><div class='add'>+static void mv88e6xxx_g1_irq_free_common(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int irq, virq;</div><div class='add'>+	u16 mask;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_g1_read(chip, MV88E6XXX_G1_CTL1, &amp;mask);</div><div class='add'>+	mask &amp;= ~GENMASK(chip-&gt;g1_irq.nirqs, 0);</div><div class='add'>+	mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL1, mask);</div><div class='add'>+</div><div class='add'>+	for (irq = 0; irq &lt; chip-&gt;g1_irq.nirqs; irq++) {</div><div class='add'>+		virq = irq_find_mapping(chip-&gt;g1_irq.domain, irq);</div><div class='add'>+		irq_dispose_mapping(virq);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	irq_domain_remove(chip-&gt;g1_irq.domain);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_g1_irq_free(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	/*</div><div class='add'>+	 * free_irq must be called without reg_lock taken because the irq</div><div class='add'>+	 * handler takes this lock, too.</div><div class='add'>+	 */</div><div class='add'>+	free_irq(chip-&gt;irq, chip);</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	mv88e6xxx_g1_irq_free_common(chip);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g1_irq_setup_common(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int err, irq, virq;</div><div class='add'>+	u16 reg, mask;</div><div class='add'>+</div><div class='add'>+	chip-&gt;g1_irq.nirqs = chip-&gt;info-&gt;g1_irqs;</div><div class='add'>+	chip-&gt;g1_irq.domain = irq_domain_create_simple(</div><div class='add'>+		NULL, chip-&gt;g1_irq.nirqs, 0,</div><div class='add'>+		&amp;mv88e6xxx_g1_irq_domain_ops, chip);</div><div class='add'>+	if (!chip-&gt;g1_irq.domain)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (irq = 0; irq &lt; chip-&gt;g1_irq.nirqs; irq++)</div><div class='add'>+		irq_create_mapping(chip-&gt;g1_irq.domain, irq);</div><div class='add'>+</div><div class='add'>+	chip-&gt;g1_irq.chip = mv88e6xxx_g1_irq_chip;</div><div class='add'>+	chip-&gt;g1_irq.masked = ~0;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_CTL1, &amp;mask);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_mapping;</div><div class='add'>+</div><div class='add'>+	mask &amp;= ~GENMASK(chip-&gt;g1_irq.nirqs, 0);</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL1, mask);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_disable;</div><div class='add'>+</div><div class='add'>+	/* Reading the interrupt status clears (most of) them */</div><div class='add'>+	err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_STS, &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_disable;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_disable:</div><div class='add'>+	mask &amp;= ~GENMASK(chip-&gt;g1_irq.nirqs, 0);</div><div class='add'>+	mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL1, mask);</div><div class='add'>+</div><div class='add'>+out_mapping:</div><div class='add'>+	for (irq = 0; irq &lt; 16; irq++) {</div><div class='add'>+		virq = irq_find_mapping(chip-&gt;g1_irq.domain, irq);</div><div class='add'>+		irq_dispose_mapping(virq);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	irq_domain_remove(chip-&gt;g1_irq.domain);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g1_irq_setup(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	static struct lock_class_key lock_key;</div><div class='add'>+	static struct lock_class_key request_key;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_irq_setup_common(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* These lock classes tells lockdep that global 1 irqs are in</div><div class='add'>+	 * a different category than their parent GPIO, so it won't</div><div class='add'>+	 * report false recursion.</div><div class='add'>+	 */</div><div class='add'>+	irq_set_lockdep_class(chip-&gt;irq, &amp;lock_key, &amp;request_key);</div><div class='add'>+</div><div class='add'>+	snprintf(chip-&gt;irq_name, sizeof(chip-&gt;irq_name),</div><div class='add'>+		 "mv88e6xxx-%s", dev_name(chip-&gt;dev));</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+	err = request_threaded_irq(chip-&gt;irq, NULL,</div><div class='add'>+				   mv88e6xxx_g1_irq_thread_fn,</div><div class='add'>+				   IRQF_ONESHOT | IRQF_SHARED,</div><div class='add'>+				   chip-&gt;irq_name, chip);</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		mv88e6xxx_g1_irq_free_common(chip);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_irq_poll(struct kthread_work *work)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = container_of(work,</div><div class='add'>+						   struct mv88e6xxx_chip,</div><div class='add'>+						   irq_poll_work.work);</div><div class='add'>+	mv88e6xxx_g1_irq_thread_work(chip);</div><div class='add'>+</div><div class='add'>+	kthread_queue_delayed_work(chip-&gt;kworker, &amp;chip-&gt;irq_poll_work,</div><div class='add'>+				   msecs_to_jiffies(100));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_irq_poll_setup(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_irq_setup_common(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	kthread_init_delayed_work(&amp;chip-&gt;irq_poll_work,</div><div class='add'>+				  mv88e6xxx_irq_poll);</div><div class='add'>+</div><div class='add'>+	chip-&gt;kworker = kthread_run_worker(0, "%s", dev_name(chip-&gt;dev));</div><div class='add'>+	if (IS_ERR(chip-&gt;kworker))</div><div class='add'>+		return PTR_ERR(chip-&gt;kworker);</div><div class='add'>+</div><div class='add'>+	kthread_queue_delayed_work(chip-&gt;kworker, &amp;chip-&gt;irq_poll_work,</div><div class='add'>+				   msecs_to_jiffies(100));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_irq_poll_free(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	kthread_cancel_delayed_work_sync(&amp;chip-&gt;irq_poll_work);</div><div class='add'>+	kthread_destroy_worker(chip-&gt;kworker);</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	mv88e6xxx_g1_irq_free_common(chip);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_config_interface(struct mv88e6xxx_chip *chip,</div><div class='add'>+					   int port, phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;port_set_rgmii_delay) {</div><div class='add'>+		err = chip-&gt;info-&gt;ops-&gt;port_set_rgmii_delay(chip, port,</div><div class='add'>+							    interface);</div><div class='add'>+		if (err &amp;&amp; err != -EOPNOTSUPP)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;port_set_cmode) {</div><div class='add'>+		err = chip-&gt;info-&gt;ops-&gt;port_set_cmode(chip, port,</div><div class='add'>+						      interface);</div><div class='add'>+		if (err &amp;&amp; err != -EOPNOTSUPP)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_setup_mac(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				    int link, int speed, int duplex, int pause,</div><div class='add'>+				    phy_interface_t mode)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!chip-&gt;info-&gt;ops-&gt;port_set_link)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Port's MAC control must not be changed unless the link is down */</div><div class='add'>+	err = chip-&gt;info-&gt;ops-&gt;port_set_link(chip, port, LINK_FORCED_DOWN);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;port_set_speed_duplex) {</div><div class='add'>+		err = chip-&gt;info-&gt;ops-&gt;port_set_speed_duplex(chip, port,</div><div class='add'>+							     speed, duplex);</div><div class='add'>+		if (err &amp;&amp; err != -EOPNOTSUPP)</div><div class='add'>+			goto restore_link;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;port_set_pause) {</div><div class='add'>+		err = chip-&gt;info-&gt;ops-&gt;port_set_pause(chip, port, pause);</div><div class='add'>+		if (err)</div><div class='add'>+			goto restore_link;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_config_interface(chip, port, mode);</div><div class='add'>+restore_link:</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;port_set_link(chip, port, link))</div><div class='add'>+		dev_err(chip-&gt;dev, "p%d: failed to restore MAC's link\n", port);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_phy_is_internal(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	return port &gt;= chip-&gt;info-&gt;internal_phys_offset &amp;&amp;</div><div class='add'>+		port &lt; chip-&gt;info-&gt;num_internal_phys +</div><div class='add'>+			chip-&gt;info-&gt;internal_phys_offset;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_ppu_updates(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	u16 reg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* The 88e6250 family does not have the PHY detect bit. Instead,</div><div class='add'>+	 * report whether the port is internal.</div><div class='add'>+	 */</div><div class='add'>+	if (chip-&gt;info-&gt;family == MV88E6XXX_FAMILY_6250)</div><div class='add'>+		return mv88e6xxx_phy_is_internal(chip, port);</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_STS, &amp;reg);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(chip-&gt;dev,</div><div class='add'>+			"p%d: %s: failed to read port status\n",</div><div class='add'>+			port, __func__);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return !!(reg &amp; MV88E6XXX_PORT_STS_PHY_DETECT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const u8 mv88e6185_phy_interface_modes[] = {</div><div class='add'>+	[MV88E6185_PORT_STS_CMODE_GMII_FD]	 = PHY_INTERFACE_MODE_GMII,</div><div class='add'>+	[MV88E6185_PORT_STS_CMODE_MII_100_FD_PS] = PHY_INTERFACE_MODE_MII,</div><div class='add'>+	[MV88E6185_PORT_STS_CMODE_MII_100]	 = PHY_INTERFACE_MODE_MII,</div><div class='add'>+	[MV88E6185_PORT_STS_CMODE_MII_10]	 = PHY_INTERFACE_MODE_MII,</div><div class='add'>+	[MV88E6185_PORT_STS_CMODE_SERDES]	 = PHY_INTERFACE_MODE_1000BASEX,</div><div class='add'>+	[MV88E6185_PORT_STS_CMODE_1000BASE_X]	 = PHY_INTERFACE_MODE_1000BASEX,</div><div class='add'>+	[MV88E6185_PORT_STS_CMODE_PHY]		 = PHY_INTERFACE_MODE_SGMII,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void mv88e6095_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				       struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	u8 cmode = chip-&gt;ports[port].cmode;</div><div class='add'>+</div><div class='add'>+	config-&gt;mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100;</div><div class='add'>+</div><div class='add'>+	if (mv88e6xxx_phy_is_internal(chip, port)) {</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_MII, config-&gt;supported_interfaces);</div><div class='add'>+	} else {</div><div class='add'>+		if (cmode &lt; ARRAY_SIZE(mv88e6185_phy_interface_modes) &amp;&amp;</div><div class='add'>+		    mv88e6185_phy_interface_modes[cmode])</div><div class='add'>+			__set_bit(mv88e6185_phy_interface_modes[cmode],</div><div class='add'>+				  config-&gt;supported_interfaces);</div><div class='add'>+</div><div class='add'>+		config-&gt;mac_capabilities |= MAC_1000FD;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6185_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				       struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	u8 cmode = chip-&gt;ports[port].cmode;</div><div class='add'>+</div><div class='add'>+	if (cmode &lt; ARRAY_SIZE(mv88e6185_phy_interface_modes) &amp;&amp;</div><div class='add'>+	    mv88e6185_phy_interface_modes[cmode])</div><div class='add'>+		__set_bit(mv88e6185_phy_interface_modes[cmode],</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+</div><div class='add'>+	config-&gt;mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100 |</div><div class='add'>+				   MAC_1000FD;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const u8 mv88e6xxx_phy_interface_modes[] = {</div><div class='add'>+	[MV88E6XXX_PORT_STS_CMODE_MII_PHY]	= PHY_INTERFACE_MODE_REVMII,</div><div class='add'>+	[MV88E6XXX_PORT_STS_CMODE_MII]		= PHY_INTERFACE_MODE_MII,</div><div class='add'>+	[MV88E6XXX_PORT_STS_CMODE_GMII]		= PHY_INTERFACE_MODE_GMII,</div><div class='add'>+	[MV88E6XXX_PORT_STS_CMODE_RMII_PHY]	= PHY_INTERFACE_MODE_REVRMII,</div><div class='add'>+	[MV88E6XXX_PORT_STS_CMODE_RMII]		= PHY_INTERFACE_MODE_RMII,</div><div class='add'>+	[MV88E6XXX_PORT_STS_CMODE_100BASEX]	= PHY_INTERFACE_MODE_100BASEX,</div><div class='add'>+	[MV88E6XXX_PORT_STS_CMODE_1000BASEX]	= PHY_INTERFACE_MODE_1000BASEX,</div><div class='add'>+	[MV88E6XXX_PORT_STS_CMODE_SGMII]	= PHY_INTERFACE_MODE_SGMII,</div><div class='add'>+	/* higher interface modes are not needed here, since ports supporting</div><div class='add'>+	 * them are writable, and so the supported interfaces are filled in the</div><div class='add'>+	 * corresponding .phylink_set_interfaces() implementation below</div><div class='add'>+	 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_translate_cmode(u8 cmode, unsigned long *supported)</div><div class='add'>+{</div><div class='add'>+	if (cmode &lt; ARRAY_SIZE(mv88e6xxx_phy_interface_modes) &amp;&amp;</div><div class='add'>+	    mv88e6xxx_phy_interface_modes[cmode])</div><div class='add'>+		__set_bit(mv88e6xxx_phy_interface_modes[cmode], supported);</div><div class='add'>+	else if (cmode == MV88E6XXX_PORT_STS_CMODE_RGMII)</div><div class='add'>+		phy_interface_set_rgmii(supported);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+mv88e6250_setup_supported_interfaces(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				     struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	unsigned long *supported = config-&gt;supported_interfaces;</div><div class='add'>+	int err;</div><div class='add'>+	u16 reg;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_STS, &amp;reg);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(chip-&gt;dev, "p%d: failed to read port status\n", port);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (reg &amp; MV88E6250_PORT_STS_PORTMODE_MASK) {</div><div class='add'>+	case MV88E6250_PORT_STS_PORTMODE_MII_10_HALF_PHY:</div><div class='add'>+	case MV88E6250_PORT_STS_PORTMODE_MII_100_HALF_PHY:</div><div class='add'>+	case MV88E6250_PORT_STS_PORTMODE_MII_10_FULL_PHY:</div><div class='add'>+	case MV88E6250_PORT_STS_PORTMODE_MII_100_FULL_PHY:</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_REVMII, supported);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case MV88E6250_PORT_STS_PORTMODE_MII_HALF:</div><div class='add'>+	case MV88E6250_PORT_STS_PORTMODE_MII_FULL:</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_MII, supported);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case MV88E6250_PORT_STS_PORTMODE_MII_DUAL_100_RMII_FULL_PHY:</div><div class='add'>+	case MV88E6250_PORT_STS_PORTMODE_MII_200_RMII_FULL_PHY:</div><div class='add'>+	case MV88E6250_PORT_STS_PORTMODE_MII_10_100_RMII_HALF_PHY:</div><div class='add'>+	case MV88E6250_PORT_STS_PORTMODE_MII_10_100_RMII_FULL_PHY:</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_REVRMII, supported);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case MV88E6250_PORT_STS_PORTMODE_MII_DUAL_100_RMII_FULL:</div><div class='add'>+	case MV88E6250_PORT_STS_PORTMODE_MII_10_100_RMII_FULL:</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_RMII, supported);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case MV88E6250_PORT_STS_PORTMODE_MII_100_RGMII:</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_RGMII, supported);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		dev_err(chip-&gt;dev,</div><div class='add'>+			"p%d: invalid port mode in status register: %04x\n",</div><div class='add'>+			port, reg);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6250_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				       struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	if (!mv88e6xxx_phy_is_internal(chip, port))</div><div class='add'>+		mv88e6250_setup_supported_interfaces(chip, port, config);</div><div class='add'>+</div><div class='add'>+	config-&gt;mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6351_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				       struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	unsigned long *supported = config-&gt;supported_interfaces;</div><div class='add'>+</div><div class='add'>+	/* Translate the default cmode */</div><div class='add'>+	mv88e6xxx_translate_cmode(chip-&gt;ports[port].cmode, supported);</div><div class='add'>+</div><div class='add'>+	config-&gt;mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100 |</div><div class='add'>+				   MAC_1000FD;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e63xx_get_port_serdes_cmode(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	u16 reg, val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_STS, &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* If PHY_DETECT is zero, then we are not in auto-media mode */</div><div class='add'>+	if (!(reg &amp; MV88E6XXX_PORT_STS_PHY_DETECT))</div><div class='add'>+		return 0xf;</div><div class='add'>+</div><div class='add'>+	val = reg &amp; ~MV88E6XXX_PORT_STS_PHY_DETECT;</div><div class='add'>+	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_STS, val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_STS, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Restore PHY_DETECT value */</div><div class='add'>+	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_STS, reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return val &amp; MV88E6XXX_PORT_STS_CMODE_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6352_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				       struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	unsigned long *supported = config-&gt;supported_interfaces;</div><div class='add'>+	int err, cmode;</div><div class='add'>+</div><div class='add'>+	/* Translate the default cmode */</div><div class='add'>+	mv88e6xxx_translate_cmode(chip-&gt;ports[port].cmode, supported);</div><div class='add'>+</div><div class='add'>+	config-&gt;mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100 |</div><div class='add'>+				   MAC_1000FD;</div><div class='add'>+</div><div class='add'>+	/* Port 4 supports automedia if the serdes is associated with it. */</div><div class='add'>+	if (port == 4) {</div><div class='add'>+		err = mv88e6352_g2_scratch_port_has_serdes(chip, port);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			dev_err(chip-&gt;dev, "p%d: failed to read scratch\n",</div><div class='add'>+				port);</div><div class='add'>+		if (err &lt;= 0)</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		cmode = mv88e63xx_get_port_serdes_cmode(chip, port);</div><div class='add'>+		if (cmode &lt; 0)</div><div class='add'>+			dev_err(chip-&gt;dev, "p%d: failed to read serdes cmode\n",</div><div class='add'>+				port);</div><div class='add'>+		else</div><div class='add'>+			mv88e6xxx_translate_cmode(cmode, supported);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e632x_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				       struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	unsigned long *supported = config-&gt;supported_interfaces;</div><div class='add'>+	int cmode;</div><div class='add'>+</div><div class='add'>+	/* Translate the default cmode */</div><div class='add'>+	mv88e6xxx_translate_cmode(chip-&gt;ports[port].cmode, supported);</div><div class='add'>+</div><div class='add'>+	config-&gt;mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100 |</div><div class='add'>+				   MAC_1000FD;</div><div class='add'>+</div><div class='add'>+	/* Port 0/1 are serdes only ports */</div><div class='add'>+	if (port == 0 || port == 1) {</div><div class='add'>+		cmode = mv88e63xx_get_port_serdes_cmode(chip, port);</div><div class='add'>+		if (cmode &lt; 0)</div><div class='add'>+			dev_err(chip-&gt;dev, "p%d: failed to read serdes cmode\n",</div><div class='add'>+				port);</div><div class='add'>+		else</div><div class='add'>+			mv88e6xxx_translate_cmode(cmode, supported);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6341_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				       struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	unsigned long *supported = config-&gt;supported_interfaces;</div><div class='add'>+</div><div class='add'>+	/* Translate the default cmode */</div><div class='add'>+	mv88e6xxx_translate_cmode(chip-&gt;ports[port].cmode, supported);</div><div class='add'>+</div><div class='add'>+	/* No ethtool bits for 200Mbps */</div><div class='add'>+	config-&gt;mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100 |</div><div class='add'>+				   MAC_1000FD;</div><div class='add'>+</div><div class='add'>+	/* The C_Mode field is programmable on port 5 */</div><div class='add'>+	if (port == 5) {</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_SGMII, supported);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_1000BASEX, supported);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_2500BASEX, supported);</div><div class='add'>+</div><div class='add'>+		config-&gt;mac_capabilities |= MAC_2500FD;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6390_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				       struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	unsigned long *supported = config-&gt;supported_interfaces;</div><div class='add'>+</div><div class='add'>+	/* Translate the default cmode */</div><div class='add'>+	mv88e6xxx_translate_cmode(chip-&gt;ports[port].cmode, supported);</div><div class='add'>+</div><div class='add'>+	/* No ethtool bits for 200Mbps */</div><div class='add'>+	config-&gt;mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100 |</div><div class='add'>+				   MAC_1000FD;</div><div class='add'>+</div><div class='add'>+	/* The C_Mode field is programmable on ports 9 and 10 */</div><div class='add'>+	if (port == 9 || port == 10) {</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_SGMII, supported);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_1000BASEX, supported);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_2500BASEX, supported);</div><div class='add'>+</div><div class='add'>+		config-&gt;mac_capabilities |= MAC_2500FD;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6390x_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+					struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	unsigned long *supported = config-&gt;supported_interfaces;</div><div class='add'>+</div><div class='add'>+	mv88e6390_phylink_get_caps(chip, port, config);</div><div class='add'>+</div><div class='add'>+	/* For the 6x90X, ports 2-7 can be in automedia mode.</div><div class='add'>+	 * (Note that 6x90 doesn't support RXAUI nor XAUI).</div><div class='add'>+	 *</div><div class='add'>+	 * Port 2 can also support 1000BASE-X in automedia mode if port 9 is</div><div class='add'>+	 * configured for 1000BASE-X, SGMII or 2500BASE-X.</div><div class='add'>+	 * Port 3-4 can also support 1000BASE-X in automedia mode if port 9 is</div><div class='add'>+	 * configured for RXAUI, 1000BASE-X, SGMII or 2500BASE-X.</div><div class='add'>+	 *</div><div class='add'>+	 * Port 5 can also support 1000BASE-X in automedia mode if port 10 is</div><div class='add'>+	 * configured for 1000BASE-X, SGMII or 2500BASE-X.</div><div class='add'>+	 * Port 6-7 can also support 1000BASE-X in automedia mode if port 10 is</div><div class='add'>+	 * configured for RXAUI, 1000BASE-X, SGMII or 2500BASE-X.</div><div class='add'>+	 *</div><div class='add'>+	 * For now, be permissive (as the old code was) and allow 1000BASE-X</div><div class='add'>+	 * on ports 2..7.</div><div class='add'>+	 */</div><div class='add'>+	if (port &gt;= 2 &amp;&amp; port &lt;= 7)</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_1000BASEX, supported);</div><div class='add'>+</div><div class='add'>+	/* The C_Mode field can also be programmed for 10G speeds */</div><div class='add'>+	if (port == 9 || port == 10) {</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_XAUI, supported);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_RXAUI, supported);</div><div class='add'>+</div><div class='add'>+		config-&gt;mac_capabilities |= MAC_10000FD;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6393x_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+					struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	unsigned long *supported = config-&gt;supported_interfaces;</div><div class='add'>+	bool is_6191x =</div><div class='add'>+		chip-&gt;info-&gt;prod_num == MV88E6XXX_PORT_SWITCH_ID_PROD_6191X;</div><div class='add'>+	bool is_6361 =</div><div class='add'>+		chip-&gt;info-&gt;prod_num == MV88E6XXX_PORT_SWITCH_ID_PROD_6361;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_translate_cmode(chip-&gt;ports[port].cmode, supported);</div><div class='add'>+</div><div class='add'>+	config-&gt;mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100 |</div><div class='add'>+				   MAC_1000FD;</div><div class='add'>+</div><div class='add'>+	/* The C_Mode field can be programmed for ports 0, 9 and 10 */</div><div class='add'>+	if (port == 0 || port == 9 || port == 10) {</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_SGMII, supported);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_1000BASEX, supported);</div><div class='add'>+</div><div class='add'>+		/* 6191X supports &gt;1G modes only on port 10 */</div><div class='add'>+		if (!is_6191x || port == 10) {</div><div class='add'>+			__set_bit(PHY_INTERFACE_MODE_2500BASEX, supported);</div><div class='add'>+			config-&gt;mac_capabilities |= MAC_2500FD;</div><div class='add'>+</div><div class='add'>+			/* 6361 only supports up to 2500BaseX */</div><div class='add'>+			if (!is_6361) {</div><div class='add'>+				__set_bit(PHY_INTERFACE_MODE_5GBASER, supported);</div><div class='add'>+				__set_bit(PHY_INTERFACE_MODE_10GBASER, supported);</div><div class='add'>+				__set_bit(PHY_INTERFACE_MODE_USXGMII, supported);</div><div class='add'>+				config-&gt;mac_capabilities |= MAC_5000FD |</div><div class='add'>+					MAC_10000FD;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (port == 0) {</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_RMII, supported);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_RGMII, supported);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_RGMII_ID, supported);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_RGMII_RXID, supported);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_RGMII_TXID, supported);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_get_caps(struct dsa_switch *ds, int port,</div><div class='add'>+			       struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	chip-&gt;info-&gt;ops-&gt;phylink_get_caps(chip, port, config);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	if (mv88e6xxx_phy_is_internal(chip, port)) {</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_INTERNAL,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		/* Internal ports with no phy-mode need GMII for PHYLIB */</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_GMII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct phylink_pcs *</div><div class='add'>+mv88e6xxx_mac_select_pcs(struct phylink_config *config,</div><div class='add'>+			 phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct mv88e6xxx_chip *chip = dp-&gt;ds-&gt;priv;</div><div class='add'>+	struct phylink_pcs *pcs = NULL;</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;pcs_ops)</div><div class='add'>+		pcs = chip-&gt;info-&gt;ops-&gt;pcs_ops-&gt;pcs_select(chip, dp-&gt;index,</div><div class='add'>+							   interface);</div><div class='add'>+</div><div class='add'>+	return pcs;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_mac_prepare(struct phylink_config *config,</div><div class='add'>+				 unsigned int mode, phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct mv88e6xxx_chip *chip = dp-&gt;ds-&gt;priv;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	/* In inband mode, the link may come up at any time while the link</div><div class='add'>+	 * is not forced down. Force the link down while we reconfigure the</div><div class='add'>+	 * interface mode.</div><div class='add'>+	 */</div><div class='add'>+	if (mode == MLO_AN_INBAND &amp;&amp;</div><div class='add'>+	    chip-&gt;ports[port].interface != interface &amp;&amp;</div><div class='add'>+	    chip-&gt;info-&gt;ops-&gt;port_set_link) {</div><div class='add'>+		mv88e6xxx_reg_lock(chip);</div><div class='add'>+		err = chip-&gt;info-&gt;ops-&gt;port_set_link(chip, port,</div><div class='add'>+						     LINK_FORCED_DOWN);</div><div class='add'>+		mv88e6xxx_reg_unlock(chip);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_mac_config(struct phylink_config *config,</div><div class='add'>+				 unsigned int mode,</div><div class='add'>+				 const struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct mv88e6xxx_chip *chip = dp-&gt;ds-&gt;priv;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+</div><div class='add'>+	if (mode != MLO_AN_PHY || !mv88e6xxx_phy_is_internal(chip, port)) {</div><div class='add'>+		err = mv88e6xxx_port_config_interface(chip, port,</div><div class='add'>+						      state-&gt;interface);</div><div class='add'>+		if (err &amp;&amp; err != -EOPNOTSUPP)</div><div class='add'>+			goto err_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+err_unlock:</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	if (err &amp;&amp; err != -EOPNOTSUPP)</div><div class='add'>+		dev_err(chip-&gt;dev, "p%d: failed to configure MAC/PCS\n", port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_mac_finish(struct phylink_config *config,</div><div class='add'>+				unsigned int mode, phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct mv88e6xxx_chip *chip = dp-&gt;ds-&gt;priv;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	/* Undo the forced down state above after completing configuration</div><div class='add'>+	 * irrespective of its state on entry, which allows the link to come</div><div class='add'>+	 * up in the in-band case where there is no separate SERDES. Also</div><div class='add'>+	 * ensure that the link can come up if the PPU is in use and we are</div><div class='add'>+	 * in PHY mode (we treat the PPU as an effective in-band mechanism.)</div><div class='add'>+	 */</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;port_set_link &amp;&amp;</div><div class='add'>+	    ((mode == MLO_AN_INBAND &amp;&amp;</div><div class='add'>+	      chip-&gt;ports[port].interface != interface) ||</div><div class='add'>+	     (mode == MLO_AN_PHY &amp;&amp; mv88e6xxx_port_ppu_updates(chip, port))))</div><div class='add'>+		err = chip-&gt;info-&gt;ops-&gt;port_set_link(chip, port, LINK_UNFORCED);</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	chip-&gt;ports[port].interface = interface;</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_mac_link_down(struct phylink_config *config,</div><div class='add'>+				    unsigned int mode,</div><div class='add'>+				    phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct mv88e6xxx_chip *chip = dp-&gt;ds-&gt;priv;</div><div class='add'>+	const struct mv88e6xxx_ops *ops;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	ops = chip-&gt;info-&gt;ops;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	/* Force the link down if we know the port may not be automatically</div><div class='add'>+	 * updated by the switch or if we are using fixed-link mode.</div><div class='add'>+	 */</div><div class='add'>+	if ((!mv88e6xxx_port_ppu_updates(chip, port) ||</div><div class='add'>+	     mode == MLO_AN_FIXED) &amp;&amp; ops-&gt;port_sync_link)</div><div class='add'>+		err = ops-&gt;port_sync_link(chip, port, mode, false);</div><div class='add'>+</div><div class='add'>+	if (!err &amp;&amp; ops-&gt;port_set_speed_duplex)</div><div class='add'>+		err = ops-&gt;port_set_speed_duplex(chip, port, SPEED_UNFORCED,</div><div class='add'>+						 DUPLEX_UNFORCED);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		dev_err(chip-&gt;dev,</div><div class='add'>+			"p%d: failed to force MAC link down\n", port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_mac_link_up(struct phylink_config *config,</div><div class='add'>+				  struct phy_device *phydev,</div><div class='add'>+				  unsigned int mode, phy_interface_t interface,</div><div class='add'>+				  int speed, int duplex,</div><div class='add'>+				  bool tx_pause, bool rx_pause)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct mv88e6xxx_chip *chip = dp-&gt;ds-&gt;priv;</div><div class='add'>+	const struct mv88e6xxx_ops *ops;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	ops = chip-&gt;info-&gt;ops;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	/* Configure and force the link up if we know that the port may not</div><div class='add'>+	 * automatically updated by the switch or if we are using fixed-link</div><div class='add'>+	 * mode.</div><div class='add'>+	 */</div><div class='add'>+	if (!mv88e6xxx_port_ppu_updates(chip, port) ||</div><div class='add'>+	    mode == MLO_AN_FIXED) {</div><div class='add'>+		if (ops-&gt;port_set_speed_duplex) {</div><div class='add'>+			err = ops-&gt;port_set_speed_duplex(chip, port,</div><div class='add'>+							 speed, duplex);</div><div class='add'>+			if (err &amp;&amp; err != -EOPNOTSUPP)</div><div class='add'>+				goto error;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (ops-&gt;port_sync_link)</div><div class='add'>+			err = ops-&gt;port_sync_link(chip, port, mode, true);</div><div class='add'>+	}</div><div class='add'>+error:</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	if (err &amp;&amp; err != -EOPNOTSUPP)</div><div class='add'>+		dev_err(chip-&gt;dev,</div><div class='add'>+			"p%d: failed to configure MAC link up\n", port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_stats_snapshot(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!chip-&gt;info-&gt;ops-&gt;stats_snapshot)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	err = chip-&gt;info-&gt;ops-&gt;stats_snapshot(chip, port);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define MV88E6XXX_HW_STAT_MAPPER(_fn)				    \</div><div class='add'>+	_fn(in_good_octets,		8, 0x00, STATS_TYPE_BANK0), \</div><div class='add'>+	_fn(in_bad_octets,		4, 0x02, STATS_TYPE_BANK0), \</div><div class='add'>+	_fn(in_unicast,			4, 0x04, STATS_TYPE_BANK0), \</div><div class='add'>+	_fn(in_broadcasts,		4, 0x06, STATS_TYPE_BANK0), \</div><div class='add'>+	_fn(in_multicasts,		4, 0x07, STATS_TYPE_BANK0), \</div><div class='add'>+	_fn(in_pause,			4, 0x16, STATS_TYPE_BANK0), \</div><div class='add'>+	_fn(in_undersize,		4, 0x18, STATS_TYPE_BANK0), \</div><div class='add'>+	_fn(in_fragments,		4, 0x19, STATS_TYPE_BANK0), \</div><div class='add'>+	_fn(in_oversize,		4, 0x1a, STATS_TYPE_BANK0), \</div><div class='add'>+	_fn(in_jabber,			4, 0x1b, STATS_TYPE_BANK0), \</div><div class='add'>+	_fn(in_rx_error,		4, 0x1c, STATS_TYPE_BANK0), \</div><div class='add'>+	_fn(in_fcs_error,		4, 0x1d, STATS_TYPE_BANK0), \</div><div class='add'>+	_fn(out_octets,			8, 0x0e, STATS_TYPE_BANK0), \</div><div class='add'>+	_fn(out_unicast,		4, 0x10, STATS_TYPE_BANK0), \</div><div class='add'>+	_fn(out_broadcasts,		4, 0x13, STATS_TYPE_BANK0), \</div><div class='add'>+	_fn(out_multicasts,		4, 0x12, STATS_TYPE_BANK0), \</div><div class='add'>+	_fn(out_pause,			4, 0x15, STATS_TYPE_BANK0), \</div><div class='add'>+	_fn(excessive,			4, 0x11, STATS_TYPE_BANK0), \</div><div class='add'>+	_fn(collisions,			4, 0x1e, STATS_TYPE_BANK0), \</div><div class='add'>+	_fn(deferred,			4, 0x05, STATS_TYPE_BANK0), \</div><div class='add'>+	_fn(single,			4, 0x14, STATS_TYPE_BANK0), \</div><div class='add'>+	_fn(multiple,			4, 0x17, STATS_TYPE_BANK0), \</div><div class='add'>+	_fn(out_fcs_error,		4, 0x03, STATS_TYPE_BANK0), \</div><div class='add'>+	_fn(late,			4, 0x1f, STATS_TYPE_BANK0), \</div><div class='add'>+	_fn(hist_64bytes,		4, 0x08, STATS_TYPE_BANK0), \</div><div class='add'>+	_fn(hist_65_127bytes,		4, 0x09, STATS_TYPE_BANK0), \</div><div class='add'>+	_fn(hist_128_255bytes,		4, 0x0a, STATS_TYPE_BANK0), \</div><div class='add'>+	_fn(hist_256_511bytes,		4, 0x0b, STATS_TYPE_BANK0), \</div><div class='add'>+	_fn(hist_512_1023bytes,		4, 0x0c, STATS_TYPE_BANK0), \</div><div class='add'>+	_fn(hist_1024_max_bytes,	4, 0x0d, STATS_TYPE_BANK0), \</div><div class='add'>+	_fn(sw_in_discards,		4, 0x10, STATS_TYPE_PORT), \</div><div class='add'>+	_fn(sw_in_filtered,		2, 0x12, STATS_TYPE_PORT), \</div><div class='add'>+	_fn(sw_out_filtered,		2, 0x13, STATS_TYPE_PORT), \</div><div class='add'>+	_fn(in_discards,		4, 0x00, STATS_TYPE_BANK1), \</div><div class='add'>+	_fn(in_filtered,		4, 0x01, STATS_TYPE_BANK1), \</div><div class='add'>+	_fn(in_accepted,		4, 0x02, STATS_TYPE_BANK1), \</div><div class='add'>+	_fn(in_bad_accepted,		4, 0x03, STATS_TYPE_BANK1), \</div><div class='add'>+	_fn(in_good_avb_class_a,	4, 0x04, STATS_TYPE_BANK1), \</div><div class='add'>+	_fn(in_good_avb_class_b,	4, 0x05, STATS_TYPE_BANK1), \</div><div class='add'>+	_fn(in_bad_avb_class_a,		4, 0x06, STATS_TYPE_BANK1), \</div><div class='add'>+	_fn(in_bad_avb_class_b,		4, 0x07, STATS_TYPE_BANK1), \</div><div class='add'>+	_fn(tcam_counter_0,		4, 0x08, STATS_TYPE_BANK1), \</div><div class='add'>+	_fn(tcam_counter_1,		4, 0x09, STATS_TYPE_BANK1), \</div><div class='add'>+	_fn(tcam_counter_2,		4, 0x0a, STATS_TYPE_BANK1), \</div><div class='add'>+	_fn(tcam_counter_3,		4, 0x0b, STATS_TYPE_BANK1), \</div><div class='add'>+	_fn(in_da_unknown,		4, 0x0e, STATS_TYPE_BANK1), \</div><div class='add'>+	_fn(in_management,		4, 0x0f, STATS_TYPE_BANK1), \</div><div class='add'>+	_fn(out_queue_0,		4, 0x10, STATS_TYPE_BANK1), \</div><div class='add'>+	_fn(out_queue_1,		4, 0x11, STATS_TYPE_BANK1), \</div><div class='add'>+	_fn(out_queue_2,		4, 0x12, STATS_TYPE_BANK1), \</div><div class='add'>+	_fn(out_queue_3,		4, 0x13, STATS_TYPE_BANK1), \</div><div class='add'>+	_fn(out_queue_4,		4, 0x14, STATS_TYPE_BANK1), \</div><div class='add'>+	_fn(out_queue_5,		4, 0x15, STATS_TYPE_BANK1), \</div><div class='add'>+	_fn(out_queue_6,		4, 0x16, STATS_TYPE_BANK1), \</div><div class='add'>+	_fn(out_queue_7,		4, 0x17, STATS_TYPE_BANK1), \</div><div class='add'>+	_fn(out_cut_through,		4, 0x18, STATS_TYPE_BANK1), \</div><div class='add'>+	_fn(out_octets_a,		4, 0x1a, STATS_TYPE_BANK1), \</div><div class='add'>+	_fn(out_octets_b,		4, 0x1b, STATS_TYPE_BANK1), \</div><div class='add'>+	_fn(out_management,		4, 0x1f, STATS_TYPE_BANK1), \</div><div class='add'>+	/*  */</div><div class='add'>+</div><div class='add'>+#define MV88E6XXX_HW_STAT_ENTRY(_string, _size, _reg, _type) \</div><div class='add'>+	{ #_string, _size, _reg, _type }</div><div class='add'>+static const struct mv88e6xxx_hw_stat mv88e6xxx_hw_stats[] = {</div><div class='add'>+	MV88E6XXX_HW_STAT_MAPPER(MV88E6XXX_HW_STAT_ENTRY)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define MV88E6XXX_HW_STAT_ENUM(_string, _size, _reg, _type) \</div><div class='add'>+	MV88E6XXX_HW_STAT_ID_ ## _string</div><div class='add'>+enum mv88e6xxx_hw_stat_id {</div><div class='add'>+	MV88E6XXX_HW_STAT_MAPPER(MV88E6XXX_HW_STAT_ENUM)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static uint64_t _mv88e6xxx_get_ethtool_stat(struct mv88e6xxx_chip *chip,</div><div class='add'>+					    const struct mv88e6xxx_hw_stat *s,</div><div class='add'>+					    int port, u16 bank1_select,</div><div class='add'>+					    u16 histogram)</div><div class='add'>+{</div><div class='add'>+	u32 low;</div><div class='add'>+	u32 high = 0;</div><div class='add'>+	u16 reg = 0;</div><div class='add'>+	int err;</div><div class='add'>+	u64 value;</div><div class='add'>+</div><div class='add'>+	switch (s-&gt;type) {</div><div class='add'>+	case STATS_TYPE_PORT:</div><div class='add'>+		err = mv88e6xxx_port_read(chip, port, s-&gt;reg, &amp;reg);</div><div class='add'>+		if (err)</div><div class='add'>+			return U64_MAX;</div><div class='add'>+</div><div class='add'>+		low = reg;</div><div class='add'>+		if (s-&gt;size == 4) {</div><div class='add'>+			err = mv88e6xxx_port_read(chip, port, s-&gt;reg + 1, &amp;reg);</div><div class='add'>+			if (err)</div><div class='add'>+				return U64_MAX;</div><div class='add'>+			low |= ((u32)reg) &lt;&lt; 16;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case STATS_TYPE_BANK1:</div><div class='add'>+		reg = bank1_select;</div><div class='add'>+		fallthrough;</div><div class='add'>+	case STATS_TYPE_BANK0:</div><div class='add'>+		reg |= s-&gt;reg | histogram;</div><div class='add'>+		mv88e6xxx_g1_stats_read(chip, reg, &amp;low);</div><div class='add'>+		if (s-&gt;size == 8)</div><div class='add'>+			mv88e6xxx_g1_stats_read(chip, reg + 1, &amp;high);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return U64_MAX;</div><div class='add'>+	}</div><div class='add'>+	value = (((u64)high) &lt;&lt; 32) | low;</div><div class='add'>+	return value;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_stats_get_strings(struct mv88e6xxx_chip *chip,</div><div class='add'>+					uint8_t **data, int types)</div><div class='add'>+{</div><div class='add'>+	const struct mv88e6xxx_hw_stat *stat;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(mv88e6xxx_hw_stats); i++) {</div><div class='add'>+		stat = &amp;mv88e6xxx_hw_stats[i];</div><div class='add'>+		if (stat-&gt;type &amp; types)</div><div class='add'>+			ethtool_puts(data, stat-&gt;string);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6095_stats_get_strings(struct mv88e6xxx_chip *chip,</div><div class='add'>+					uint8_t **data)</div><div class='add'>+{</div><div class='add'>+	mv88e6xxx_stats_get_strings(chip, data,</div><div class='add'>+				    STATS_TYPE_BANK0 | STATS_TYPE_PORT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6250_stats_get_strings(struct mv88e6xxx_chip *chip,</div><div class='add'>+					uint8_t **data)</div><div class='add'>+{</div><div class='add'>+	mv88e6xxx_stats_get_strings(chip, data, STATS_TYPE_BANK0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6320_stats_get_strings(struct mv88e6xxx_chip *chip,</div><div class='add'>+					uint8_t **data)</div><div class='add'>+{</div><div class='add'>+	mv88e6xxx_stats_get_strings(chip, data,</div><div class='add'>+				    STATS_TYPE_BANK0 | STATS_TYPE_BANK1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const uint8_t *mv88e6xxx_atu_vtu_stats_strings[] = {</div><div class='add'>+	"atu_member_violation",</div><div class='add'>+	"atu_miss_violation",</div><div class='add'>+	"atu_full_violation",</div><div class='add'>+	"vtu_member_violation",</div><div class='add'>+	"vtu_miss_violation",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_atu_vtu_get_strings(uint8_t **data)</div><div class='add'>+{</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(mv88e6xxx_atu_vtu_stats_strings); i++)</div><div class='add'>+		ethtool_puts(data, mv88e6xxx_atu_vtu_stats_strings[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_get_strings(struct dsa_switch *ds, int port,</div><div class='add'>+				  u32 stringset, uint8_t *data)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (stringset != ETH_SS_STATS)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;stats_get_strings)</div><div class='add'>+		chip-&gt;info-&gt;ops-&gt;stats_get_strings(chip, &amp;data);</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;serdes_get_strings)</div><div class='add'>+		chip-&gt;info-&gt;ops-&gt;serdes_get_strings(chip, port, &amp;data);</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_atu_vtu_get_strings(&amp;data);</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_stats_get_sset_count(struct mv88e6xxx_chip *chip,</div><div class='add'>+					  int types)</div><div class='add'>+{</div><div class='add'>+	const struct mv88e6xxx_hw_stat *stat;</div><div class='add'>+	int i, j;</div><div class='add'>+</div><div class='add'>+	for (i = 0, j = 0; i &lt; ARRAY_SIZE(mv88e6xxx_hw_stats); i++) {</div><div class='add'>+		stat = &amp;mv88e6xxx_hw_stats[i];</div><div class='add'>+		if (stat-&gt;type &amp; types)</div><div class='add'>+			j++;</div><div class='add'>+	}</div><div class='add'>+	return j;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6095_stats_get_sset_count(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_stats_get_sset_count(chip, STATS_TYPE_BANK0 |</div><div class='add'>+					      STATS_TYPE_PORT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6250_stats_get_sset_count(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_stats_get_sset_count(chip, STATS_TYPE_BANK0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6320_stats_get_sset_count(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_stats_get_sset_count(chip, STATS_TYPE_BANK0 |</div><div class='add'>+					      STATS_TYPE_BANK1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_get_sset_count(struct dsa_switch *ds, int port, int sset)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	int serdes_count = 0;</div><div class='add'>+	int count = 0;</div><div class='add'>+</div><div class='add'>+	if (sset != ETH_SS_STATS)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;stats_get_sset_count)</div><div class='add'>+		count = chip-&gt;info-&gt;ops-&gt;stats_get_sset_count(chip);</div><div class='add'>+	if (count &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;serdes_get_sset_count)</div><div class='add'>+		serdes_count = chip-&gt;info-&gt;ops-&gt;serdes_get_sset_count(chip,</div><div class='add'>+								      port);</div><div class='add'>+	if (serdes_count &lt; 0) {</div><div class='add'>+		count = serdes_count;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	count += serdes_count;</div><div class='add'>+	count += ARRAY_SIZE(mv88e6xxx_atu_vtu_stats_strings);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t mv88e6095_stats_get_stat(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				       const struct mv88e6xxx_hw_stat *stat,</div><div class='add'>+				       uint64_t *data)</div><div class='add'>+{</div><div class='add'>+	*data = _mv88e6xxx_get_ethtool_stat(chip, stat, port, 0,</div><div class='add'>+					    MV88E6XXX_G1_STATS_OP_HIST_RX);</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t mv88e6250_stats_get_stat(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				       const struct mv88e6xxx_hw_stat *stat,</div><div class='add'>+				       uint64_t *data)</div><div class='add'>+{</div><div class='add'>+	*data = _mv88e6xxx_get_ethtool_stat(chip, stat, port, 0,</div><div class='add'>+					    MV88E6XXX_G1_STATS_OP_HIST_RX);</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t mv88e6320_stats_get_stat(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				       const struct mv88e6xxx_hw_stat *stat,</div><div class='add'>+				       uint64_t *data)</div><div class='add'>+{</div><div class='add'>+	*data = _mv88e6xxx_get_ethtool_stat(chip, stat, port,</div><div class='add'>+					    MV88E6XXX_G1_STATS_OP_BANK_1_BIT_9,</div><div class='add'>+					    MV88E6XXX_G1_STATS_OP_HIST_RX);</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t mv88e6390_stats_get_stat(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				       const struct mv88e6xxx_hw_stat *stat,</div><div class='add'>+				       uint64_t *data)</div><div class='add'>+{</div><div class='add'>+	*data = _mv88e6xxx_get_ethtool_stat(chip, stat, port,</div><div class='add'>+					    MV88E6XXX_G1_STATS_OP_BANK_1_BIT_10,</div><div class='add'>+					    0);</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t mv88e6xxx_stats_get_stat(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				       const struct mv88e6xxx_hw_stat *stat,</div><div class='add'>+				       uint64_t *data)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (!(stat-&gt;type &amp; chip-&gt;info-&gt;stats_type))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;stats_get_stat) {</div><div class='add'>+		mv88e6xxx_reg_lock(chip);</div><div class='add'>+		ret = chip-&gt;info-&gt;ops-&gt;stats_get_stat(chip, port, stat, data);</div><div class='add'>+		mv88e6xxx_reg_unlock(chip);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t mv88e6xxx_stats_get_stats(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+					uint64_t *data)</div><div class='add'>+{</div><div class='add'>+	const struct mv88e6xxx_hw_stat *stat;</div><div class='add'>+	size_t i, j;</div><div class='add'>+</div><div class='add'>+	for (i = 0, j = 0; i &lt; ARRAY_SIZE(mv88e6xxx_hw_stats); i++) {</div><div class='add'>+		stat = &amp;mv88e6xxx_hw_stats[i];</div><div class='add'>+		j += mv88e6xxx_stats_get_stat(chip, port, stat, &amp;data[j]);</div><div class='add'>+	}</div><div class='add'>+	return j;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_atu_vtu_get_stats(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+					uint64_t *data)</div><div class='add'>+{</div><div class='add'>+	*data++ = chip-&gt;ports[port].atu_member_violation;</div><div class='add'>+	*data++ = chip-&gt;ports[port].atu_miss_violation;</div><div class='add'>+	*data++ = chip-&gt;ports[port].atu_full_violation;</div><div class='add'>+	*data++ = chip-&gt;ports[port].vtu_member_violation;</div><div class='add'>+	*data++ = chip-&gt;ports[port].vtu_miss_violation;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_get_stats(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				uint64_t *data)</div><div class='add'>+{</div><div class='add'>+	size_t count;</div><div class='add'>+</div><div class='add'>+	count = mv88e6xxx_stats_get_stats(chip, port, data);</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;serdes_get_stats) {</div><div class='add'>+		data += count;</div><div class='add'>+		count = chip-&gt;info-&gt;ops-&gt;serdes_get_stats(chip, port, data);</div><div class='add'>+	}</div><div class='add'>+	data += count;</div><div class='add'>+	mv88e6xxx_atu_vtu_get_stats(chip, port, data);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_get_ethtool_stats(struct dsa_switch *ds, int port,</div><div class='add'>+					uint64_t *data)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = mv88e6xxx_stats_snapshot(chip, port);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_get_stats(chip, port, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_get_eth_mac_stats(struct dsa_switch *ds, int port,</div><div class='add'>+					struct ethtool_eth_mac_stats *mac_stats)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = mv88e6xxx_stats_snapshot(chip, port);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+#define MV88E6XXX_ETH_MAC_STAT_MAP(_id, _member)			\</div><div class='add'>+	mv88e6xxx_stats_get_stat(chip, port,				\</div><div class='add'>+				 &amp;mv88e6xxx_hw_stats[MV88E6XXX_HW_STAT_ID_ ## _id], \</div><div class='add'>+				 &amp;mac_stats-&gt;stats._member)</div><div class='add'>+</div><div class='add'>+	MV88E6XXX_ETH_MAC_STAT_MAP(out_unicast, FramesTransmittedOK);</div><div class='add'>+	MV88E6XXX_ETH_MAC_STAT_MAP(single, SingleCollisionFrames);</div><div class='add'>+	MV88E6XXX_ETH_MAC_STAT_MAP(multiple, MultipleCollisionFrames);</div><div class='add'>+	MV88E6XXX_ETH_MAC_STAT_MAP(in_unicast, FramesReceivedOK);</div><div class='add'>+	MV88E6XXX_ETH_MAC_STAT_MAP(in_fcs_error, FrameCheckSequenceErrors);</div><div class='add'>+	MV88E6XXX_ETH_MAC_STAT_MAP(out_octets, OctetsTransmittedOK);</div><div class='add'>+	MV88E6XXX_ETH_MAC_STAT_MAP(deferred, FramesWithDeferredXmissions);</div><div class='add'>+	MV88E6XXX_ETH_MAC_STAT_MAP(late, LateCollisions);</div><div class='add'>+	MV88E6XXX_ETH_MAC_STAT_MAP(in_good_octets, OctetsReceivedOK);</div><div class='add'>+	MV88E6XXX_ETH_MAC_STAT_MAP(out_multicasts, MulticastFramesXmittedOK);</div><div class='add'>+	MV88E6XXX_ETH_MAC_STAT_MAP(out_broadcasts, BroadcastFramesXmittedOK);</div><div class='add'>+	MV88E6XXX_ETH_MAC_STAT_MAP(excessive, FramesWithExcessiveDeferral);</div><div class='add'>+	MV88E6XXX_ETH_MAC_STAT_MAP(in_multicasts, MulticastFramesReceivedOK);</div><div class='add'>+	MV88E6XXX_ETH_MAC_STAT_MAP(in_broadcasts, BroadcastFramesReceivedOK);</div><div class='add'>+</div><div class='add'>+#undef MV88E6XXX_ETH_MAC_STAT_MAP</div><div class='add'>+</div><div class='add'>+	mac_stats-&gt;stats.FramesTransmittedOK += mac_stats-&gt;stats.MulticastFramesXmittedOK;</div><div class='add'>+	mac_stats-&gt;stats.FramesTransmittedOK += mac_stats-&gt;stats.BroadcastFramesXmittedOK;</div><div class='add'>+	mac_stats-&gt;stats.FramesReceivedOK += mac_stats-&gt;stats.MulticastFramesReceivedOK;</div><div class='add'>+	mac_stats-&gt;stats.FramesReceivedOK += mac_stats-&gt;stats.BroadcastFramesReceivedOK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_get_rmon_stats(struct dsa_switch *ds, int port,</div><div class='add'>+				     struct ethtool_rmon_stats *rmon_stats,</div><div class='add'>+				     const struct ethtool_rmon_hist_range **ranges)</div><div class='add'>+{</div><div class='add'>+	static const struct ethtool_rmon_hist_range rmon_ranges[] = {</div><div class='add'>+		{   64,    64 },</div><div class='add'>+		{   65,   127 },</div><div class='add'>+		{  128,   255 },</div><div class='add'>+		{  256,   511 },</div><div class='add'>+		{  512,  1023 },</div><div class='add'>+		{ 1024, 65535 },</div><div class='add'>+		{}</div><div class='add'>+	};</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = mv88e6xxx_stats_snapshot(chip, port);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+#define MV88E6XXX_RMON_STAT_MAP(_id, _member)				\</div><div class='add'>+	mv88e6xxx_stats_get_stat(chip, port,				\</div><div class='add'>+				 &amp;mv88e6xxx_hw_stats[MV88E6XXX_HW_STAT_ID_ ## _id], \</div><div class='add'>+				 &amp;rmon_stats-&gt;stats._member)</div><div class='add'>+</div><div class='add'>+	MV88E6XXX_RMON_STAT_MAP(in_undersize, undersize_pkts);</div><div class='add'>+	MV88E6XXX_RMON_STAT_MAP(in_oversize, oversize_pkts);</div><div class='add'>+	MV88E6XXX_RMON_STAT_MAP(in_fragments, fragments);</div><div class='add'>+	MV88E6XXX_RMON_STAT_MAP(in_jabber, jabbers);</div><div class='add'>+	MV88E6XXX_RMON_STAT_MAP(hist_64bytes, hist[0]);</div><div class='add'>+	MV88E6XXX_RMON_STAT_MAP(hist_65_127bytes, hist[1]);</div><div class='add'>+	MV88E6XXX_RMON_STAT_MAP(hist_128_255bytes, hist[2]);</div><div class='add'>+	MV88E6XXX_RMON_STAT_MAP(hist_256_511bytes, hist[3]);</div><div class='add'>+	MV88E6XXX_RMON_STAT_MAP(hist_512_1023bytes, hist[4]);</div><div class='add'>+	MV88E6XXX_RMON_STAT_MAP(hist_1024_max_bytes, hist[5]);</div><div class='add'>+</div><div class='add'>+#undef MV88E6XXX_RMON_STAT_MAP</div><div class='add'>+</div><div class='add'>+	*ranges = rmon_ranges;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_get_regs_len(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	int len;</div><div class='add'>+</div><div class='add'>+	len = 32 * sizeof(u16);</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;serdes_get_regs_len)</div><div class='add'>+		len += chip-&gt;info-&gt;ops-&gt;serdes_get_regs_len(chip, port);</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_get_regs(struct dsa_switch *ds, int port,</div><div class='add'>+			       struct ethtool_regs *regs, void *_p)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+	u16 reg;</div><div class='add'>+	u16 *p = _p;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	regs-&gt;version = chip-&gt;info-&gt;prod_num;</div><div class='add'>+</div><div class='add'>+	memset(p, 0xff, 32 * sizeof(u16));</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 32; i++) {</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_port_read(chip, port, i, &amp;reg);</div><div class='add'>+		if (!err)</div><div class='add'>+			p[i] = reg;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;serdes_get_regs)</div><div class='add'>+		chip-&gt;info-&gt;ops-&gt;serdes_get_regs(chip, port, &amp;p[i]);</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_set_mac_eee(struct dsa_switch *ds, int port,</div><div class='add'>+				 struct ethtool_keee *e)</div><div class='add'>+{</div><div class='add'>+	/* Nothing to do on the port's MAC */</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Mask of the local ports allowed to receive frames from a given fabric port */</div><div class='add'>+static u16 mv88e6xxx_port_vlan(struct mv88e6xxx_chip *chip, int dev, int port)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds = chip-&gt;ds;</div><div class='add'>+	struct dsa_switch_tree *dst = ds-&gt;dst;</div><div class='add'>+	struct dsa_port *dp, *other_dp;</div><div class='add'>+	bool found = false;</div><div class='add'>+	u16 pvlan;</div><div class='add'>+</div><div class='add'>+	/* dev is a physical switch */</div><div class='add'>+	if (dev &lt;= dst-&gt;last_switch) {</div><div class='add'>+		list_for_each_entry(dp, &amp;dst-&gt;ports, list) {</div><div class='add'>+			if (dp-&gt;ds-&gt;index == dev &amp;&amp; dp-&gt;index == port) {</div><div class='add'>+				/* dp might be a DSA link or a user port, so it</div><div class='add'>+				 * might or might not have a bridge.</div><div class='add'>+				 * Use the "found" variable for both cases.</div><div class='add'>+				 */</div><div class='add'>+				found = true;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	/* dev is a virtual bridge */</div><div class='add'>+	} else {</div><div class='add'>+		list_for_each_entry(dp, &amp;dst-&gt;ports, list) {</div><div class='add'>+			unsigned int bridge_num = dsa_port_bridge_num_get(dp);</div><div class='add'>+</div><div class='add'>+			if (!bridge_num)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			if (bridge_num + dst-&gt;last_switch != dev)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			found = true;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Prevent frames from unknown switch or virtual bridge */</div><div class='add'>+	if (!found)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Frames from DSA links and CPU ports can egress any local port */</div><div class='add'>+	if (dp-&gt;type == DSA_PORT_TYPE_CPU || dp-&gt;type == DSA_PORT_TYPE_DSA)</div><div class='add'>+		return mv88e6xxx_port_mask(chip);</div><div class='add'>+</div><div class='add'>+	pvlan = 0;</div><div class='add'>+</div><div class='add'>+	/* Frames from standalone user ports can only egress on the</div><div class='add'>+	 * upstream port.</div><div class='add'>+	 */</div><div class='add'>+	if (!dsa_port_bridge_dev_get(dp))</div><div class='add'>+		return BIT(dsa_switch_upstream_port(ds));</div><div class='add'>+</div><div class='add'>+	/* Frames from bridged user ports can egress any local DSA</div><div class='add'>+	 * links and CPU ports, as well as any local member of their</div><div class='add'>+	 * bridge group.</div><div class='add'>+	 */</div><div class='add'>+	dsa_switch_for_each_port(other_dp, ds)</div><div class='add'>+		if (other_dp-&gt;type == DSA_PORT_TYPE_CPU ||</div><div class='add'>+		    other_dp-&gt;type == DSA_PORT_TYPE_DSA ||</div><div class='add'>+		    dsa_port_bridge_same(dp, other_dp))</div><div class='add'>+			pvlan |= BIT(other_dp-&gt;index);</div><div class='add'>+</div><div class='add'>+	return pvlan;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_vlan_map(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	u16 output_ports = mv88e6xxx_port_vlan(chip, chip-&gt;ds-&gt;index, port);</div><div class='add'>+</div><div class='add'>+	/* prevent frames from going back out of the port they came in on */</div><div class='add'>+	output_ports &amp;= ~BIT(port);</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_set_vlan_map(chip, port, output_ports);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_port_stp_state_set(struct dsa_switch *ds, int port,</div><div class='add'>+					 u8 state)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	err = mv88e6xxx_port_set_state(chip, port, state);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		dev_err(ds-&gt;dev, "p%d: failed to update state\n", port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_pri_setup(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;ieee_pri_map) {</div><div class='add'>+		err = chip-&gt;info-&gt;ops-&gt;ieee_pri_map(chip);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;ip_pri_map) {</div><div class='add'>+		err = chip-&gt;info-&gt;ops-&gt;ip_pri_map(chip);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_devmap_setup(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds = chip-&gt;ds;</div><div class='add'>+	int target, port;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!chip-&gt;info-&gt;global2_addr)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Initialize the routing port to the 32 possible target devices */</div><div class='add'>+	for (target = 0; target &lt; 32; target++) {</div><div class='add'>+		port = dsa_routing_port(ds, target);</div><div class='add'>+		if (port == ds-&gt;num_ports)</div><div class='add'>+			port = 0x1f;</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_g2_device_mapping_write(chip, target, port);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;set_cascade_port) {</div><div class='add'>+		port = MV88E6XXX_CASCADE_PORT_MULTIPLE;</div><div class='add'>+		err = chip-&gt;info-&gt;ops-&gt;set_cascade_port(chip, port);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_set_device_number(chip, chip-&gt;ds-&gt;index);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_trunk_setup(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	/* Clear all trunk masks and mapping */</div><div class='add'>+	if (chip-&gt;info-&gt;global2_addr)</div><div class='add'>+		return mv88e6xxx_g2_trunk_clear(chip);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_rmu_setup(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;rmu_disable)</div><div class='add'>+		return chip-&gt;info-&gt;ops-&gt;rmu_disable(chip);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_pot_setup(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;pot_clear)</div><div class='add'>+		return chip-&gt;info-&gt;ops-&gt;pot_clear(chip);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_rsvd2cpu_setup(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;mgmt_rsvd2cpu)</div><div class='add'>+		return chip-&gt;info-&gt;ops-&gt;mgmt_rsvd2cpu(chip);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_atu_setup(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_atu_flush(chip, 0, true);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* The chips that have a "learn2all" bit in Global1, ATU</div><div class='add'>+	 * Control are precisely those whose port registers have a</div><div class='add'>+	 * Message Port bit in Port Control 1 and hence implement</div><div class='add'>+	 * -&gt;port_setup_message_port.</div><div class='add'>+	 */</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;port_setup_message_port) {</div><div class='add'>+		err = mv88e6xxx_g1_atu_set_learn2all(chip, true);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_atu_set_age_time(chip, 300000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_irl_setup(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int port;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!chip-&gt;info-&gt;ops-&gt;irl_init_all)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	for (port = 0; port &lt; mv88e6xxx_num_ports(chip); port++) {</div><div class='add'>+		/* Disable ingress rate limiting by resetting all per port</div><div class='add'>+		 * ingress rate limit resources to their initial state.</div><div class='add'>+		 */</div><div class='add'>+		err = chip-&gt;info-&gt;ops-&gt;irl_init_all(chip, port);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_mac_setup(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;set_switch_mac) {</div><div class='add'>+		u8 addr[ETH_ALEN];</div><div class='add'>+</div><div class='add'>+		eth_random_addr(addr);</div><div class='add'>+</div><div class='add'>+		return chip-&gt;info-&gt;ops-&gt;set_switch_mac(chip, addr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_pvt_map(struct mv88e6xxx_chip *chip, int dev, int port)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch_tree *dst = chip-&gt;ds-&gt;dst;</div><div class='add'>+	struct dsa_switch *ds;</div><div class='add'>+	struct dsa_port *dp;</div><div class='add'>+	u16 pvlan = 0;</div><div class='add'>+</div><div class='add'>+	if (!mv88e6xxx_has_pvt(chip))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Skip the local source device, which uses in-chip port VLAN */</div><div class='add'>+	if (dev != chip-&gt;ds-&gt;index) {</div><div class='add'>+		pvlan = mv88e6xxx_port_vlan(chip, dev, port);</div><div class='add'>+</div><div class='add'>+		ds = dsa_switch_find(dst-&gt;index, dev);</div><div class='add'>+		dp = ds ? dsa_to_port(ds, port) : NULL;</div><div class='add'>+		if (dp &amp;&amp; dp-&gt;lag) {</div><div class='add'>+			/* As the PVT is used to limit flooding of</div><div class='add'>+			 * FORWARD frames, which use the LAG ID as the</div><div class='add'>+			 * source port, we must translate dev/port to</div><div class='add'>+			 * the special "LAG device" in the PVT, using</div><div class='add'>+			 * the LAG ID (one-based) as the port number</div><div class='add'>+			 * (zero-based).</div><div class='add'>+			 */</div><div class='add'>+			dev = MV88E6XXX_G2_PVT_ADDR_DEV_TRUNK;</div><div class='add'>+			port = dsa_port_lag_id_get(dp) - 1;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_pvt_write(chip, dev, port, pvlan);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_pvt_setup(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int dev, port;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!mv88e6xxx_has_pvt(chip))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Clear 5 Bit Port for usage with Marvell Link Street devices:</div><div class='add'>+	 * use 4 bits for the Src_Port/Src_Trunk and 5 bits for the Src_Dev.</div><div class='add'>+	 */</div><div class='add'>+	err = mv88e6xxx_g2_misc_4_bit_port(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	for (dev = 0; dev &lt; MV88E6XXX_MAX_PVT_SWITCHES; ++dev) {</div><div class='add'>+		for (port = 0; port &lt; MV88E6XXX_MAX_PVT_PORTS; ++port) {</div><div class='add'>+			err = mv88e6xxx_pvt_map(chip, dev, port);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_fast_age_fid(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				       u16 fid)</div><div class='add'>+{</div><div class='add'>+	if (dsa_to_port(chip-&gt;ds, port)-&gt;lag)</div><div class='add'>+		/* Hardware is incapable of fast-aging a LAG through a</div><div class='add'>+		 * regular ATU move operation. Until we have something</div><div class='add'>+		 * more fancy in place this is a no-op.</div><div class='add'>+		 */</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_atu_remove(chip, fid, port, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_port_fast_age(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	err = mv88e6xxx_port_fast_age_fid(chip, port, 0);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		dev_err(chip-&gt;ds-&gt;dev, "p%d: failed to flush ATU: %d\n",</div><div class='add'>+			port, err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_vtu_setup(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	if (!mv88e6xxx_max_vid(chip))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_vtu_flush(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_vtu_get(struct mv88e6xxx_chip *chip, u16 vid,</div><div class='add'>+			     struct mv88e6xxx_vtu_entry *entry)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!chip-&gt;info-&gt;ops-&gt;vtu_getnext)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	memset(entry, 0, sizeof(*entry));</div><div class='add'>+</div><div class='add'>+	entry-&gt;vid = vid ? vid - 1 : mv88e6xxx_max_vid(chip);</div><div class='add'>+	entry-&gt;valid = false;</div><div class='add'>+</div><div class='add'>+	err = chip-&gt;info-&gt;ops-&gt;vtu_getnext(chip, entry);</div><div class='add'>+</div><div class='add'>+	if (entry-&gt;vid != vid)</div><div class='add'>+		entry-&gt;valid = false;</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_vtu_walk(struct mv88e6xxx_chip *chip,</div><div class='add'>+		       int (*cb)(struct mv88e6xxx_chip *chip,</div><div class='add'>+				 const struct mv88e6xxx_vtu_entry *entry,</div><div class='add'>+				 void *priv),</div><div class='add'>+		       void *priv)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_vtu_entry entry = {</div><div class='add'>+		.vid = mv88e6xxx_max_vid(chip),</div><div class='add'>+		.valid = false,</div><div class='add'>+	};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!chip-&gt;info-&gt;ops-&gt;vtu_getnext)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		err = chip-&gt;info-&gt;ops-&gt;vtu_getnext(chip, &amp;entry);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		if (!entry.valid)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		err = cb(chip, &amp;entry, priv);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	} while (entry.vid &lt; mv88e6xxx_max_vid(chip));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_vtu_loadpurge(struct mv88e6xxx_chip *chip,</div><div class='add'>+				   struct mv88e6xxx_vtu_entry *entry)</div><div class='add'>+{</div><div class='add'>+	if (!chip-&gt;info-&gt;ops-&gt;vtu_loadpurge)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return chip-&gt;info-&gt;ops-&gt;vtu_loadpurge(chip, entry);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_atu_new(struct mv88e6xxx_chip *chip, u16 *fid)</div><div class='add'>+{</div><div class='add'>+	*fid = find_first_zero_bit(chip-&gt;fid_bitmap, MV88E6XXX_N_FID);</div><div class='add'>+	if (unlikely(*fid &gt;= mv88e6xxx_num_databases(chip)))</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+</div><div class='add'>+	/* Clear the database */</div><div class='add'>+	return mv88e6xxx_g1_atu_flush(chip, *fid, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_stu_loadpurge(struct mv88e6xxx_chip *chip,</div><div class='add'>+				   struct mv88e6xxx_stu_entry *entry)</div><div class='add'>+{</div><div class='add'>+	if (!chip-&gt;info-&gt;ops-&gt;stu_loadpurge)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return chip-&gt;info-&gt;ops-&gt;stu_loadpurge(chip, entry);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_stu_setup(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_stu_entry stu = {</div><div class='add'>+		.valid = true,</div><div class='add'>+		.sid = 0</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	if (!mv88e6xxx_has_stu(chip))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Make sure that SID 0 is always valid. This is used by VTU</div><div class='add'>+	 * entries that do not make use of the STU, e.g. when creating</div><div class='add'>+	 * a VLAN upper on a port that is also part of a VLAN</div><div class='add'>+	 * filtering bridge.</div><div class='add'>+	 */</div><div class='add'>+	return mv88e6xxx_stu_loadpurge(chip, &amp;stu);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_sid_get(struct mv88e6xxx_chip *chip, u8 *sid)</div><div class='add'>+{</div><div class='add'>+	DECLARE_BITMAP(busy, MV88E6XXX_N_SID) = { 0 };</div><div class='add'>+	struct mv88e6xxx_mst *mst;</div><div class='add'>+</div><div class='add'>+	__set_bit(0, busy);</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(mst, &amp;chip-&gt;msts, node)</div><div class='add'>+		__set_bit(mst-&gt;stu.sid, busy);</div><div class='add'>+</div><div class='add'>+	*sid = find_first_zero_bit(busy, MV88E6XXX_N_SID);</div><div class='add'>+</div><div class='add'>+	return (*sid &gt;= mv88e6xxx_max_sid(chip)) ? -ENOSPC : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_mst_put(struct mv88e6xxx_chip *chip, u8 sid)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_mst *mst, *tmp;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* If the SID is zero, it is for a VLAN mapped to the default MSTI,</div><div class='add'>+	 * and mv88e6xxx_stu_setup() made sure it is always present, and thus,</div><div class='add'>+	 * should not be removed here.</div><div class='add'>+	 *</div><div class='add'>+	 * If the chip lacks STU support, numerically the "sid" variable will</div><div class='add'>+	 * happen to also be zero, but we don't want to rely on that fact, so</div><div class='add'>+	 * we explicitly test that first. In that case, there is also nothing</div><div class='add'>+	 * to do here.</div><div class='add'>+	 */</div><div class='add'>+	if (!mv88e6xxx_has_stu(chip) || !sid)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_safe(mst, tmp, &amp;chip-&gt;msts, node) {</div><div class='add'>+		if (mst-&gt;stu.sid != sid)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (!refcount_dec_and_test(&amp;mst-&gt;refcnt))</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		mst-&gt;stu.valid = false;</div><div class='add'>+		err = mv88e6xxx_stu_loadpurge(chip, &amp;mst-&gt;stu);</div><div class='add'>+		if (err) {</div><div class='add'>+			refcount_set(&amp;mst-&gt;refcnt, 1);</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		list_del(&amp;mst-&gt;node);</div><div class='add'>+		kfree(mst);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -ENOENT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_mst_get(struct mv88e6xxx_chip *chip, struct net_device *br,</div><div class='add'>+			     u16 msti, u8 *sid)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_mst *mst;</div><div class='add'>+	int err, i;</div><div class='add'>+</div><div class='add'>+	if (!mv88e6xxx_has_stu(chip)) {</div><div class='add'>+		err = -EOPNOTSUPP;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!msti) {</div><div class='add'>+		*sid = 0;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(mst, &amp;chip-&gt;msts, node) {</div><div class='add'>+		if (mst-&gt;br == br &amp;&amp; mst-&gt;msti == msti) {</div><div class='add'>+			refcount_inc(&amp;mst-&gt;refcnt);</div><div class='add'>+			*sid = mst-&gt;stu.sid;</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_sid_get(chip, sid);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	mst = kzalloc(sizeof(*mst), GFP_KERNEL);</div><div class='add'>+	if (!mst) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	INIT_LIST_HEAD(&amp;mst-&gt;node);</div><div class='add'>+	refcount_set(&amp;mst-&gt;refcnt, 1);</div><div class='add'>+	mst-&gt;br = br;</div><div class='add'>+	mst-&gt;msti = msti;</div><div class='add'>+	mst-&gt;stu.valid = true;</div><div class='add'>+	mst-&gt;stu.sid = *sid;</div><div class='add'>+</div><div class='add'>+	/* The bridge starts out all ports in the disabled state. But</div><div class='add'>+	 * a STU state of disabled means to go by the port-global</div><div class='add'>+	 * state. So we set all user port's initial state to blocking,</div><div class='add'>+	 * to match the bridge's behavior.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; mv88e6xxx_num_ports(chip); i++)</div><div class='add'>+		mst-&gt;stu.state[i] = dsa_is_user_port(chip-&gt;ds, i) ?</div><div class='add'>+			MV88E6XXX_PORT_CTL0_STATE_BLOCKING :</div><div class='add'>+			MV88E6XXX_PORT_CTL0_STATE_DISABLED;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_stu_loadpurge(chip, &amp;mst-&gt;stu);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free;</div><div class='add'>+</div><div class='add'>+	list_add_tail(&amp;mst-&gt;node, &amp;chip-&gt;msts);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free:</div><div class='add'>+	kfree(mst);</div><div class='add'>+err:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_mst_state_set(struct dsa_switch *ds, int port,</div><div class='add'>+					const struct switchdev_mst_state *st)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(ds, port);</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	struct mv88e6xxx_mst *mst;</div><div class='add'>+	u8 state;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!mv88e6xxx_has_stu(chip))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	switch (st-&gt;state) {</div><div class='add'>+	case BR_STATE_DISABLED:</div><div class='add'>+	case BR_STATE_BLOCKING:</div><div class='add'>+	case BR_STATE_LISTENING:</div><div class='add'>+		state = MV88E6XXX_PORT_CTL0_STATE_BLOCKING;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_LEARNING:</div><div class='add'>+		state = MV88E6XXX_PORT_CTL0_STATE_LEARNING;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_FORWARDING:</div><div class='add'>+		state = MV88E6XXX_PORT_CTL0_STATE_FORWARDING;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(mst, &amp;chip-&gt;msts, node) {</div><div class='add'>+		if (mst-&gt;br == dsa_port_bridge_dev_get(dp) &amp;&amp;</div><div class='add'>+		    mst-&gt;msti == st-&gt;msti) {</div><div class='add'>+			if (mst-&gt;stu.state[port] == state)</div><div class='add'>+				return 0;</div><div class='add'>+</div><div class='add'>+			mst-&gt;stu.state[port] = state;</div><div class='add'>+			mv88e6xxx_reg_lock(chip);</div><div class='add'>+			err = mv88e6xxx_stu_loadpurge(chip, &amp;mst-&gt;stu);</div><div class='add'>+			mv88e6xxx_reg_unlock(chip);</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -ENOENT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_check_hw_vlan(struct dsa_switch *ds, int port,</div><div class='add'>+					u16 vid)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(ds, port), *other_dp;</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	struct mv88e6xxx_vtu_entry vlan;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* DSA and CPU ports have to be members of multiple vlans */</div><div class='add'>+	if (dsa_port_is_dsa(dp) || dsa_port_is_cpu(dp))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_vtu_get(chip, vid, &amp;vlan);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (!vlan.valid)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	dsa_switch_for_each_user_port(other_dp, ds) {</div><div class='add'>+		struct net_device *other_br;</div><div class='add'>+</div><div class='add'>+		if (vlan.member[other_dp-&gt;index] ==</div><div class='add'>+		    MV88E6XXX_G1_VTU_DATA_MEMBER_TAG_NON_MEMBER)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (dsa_port_bridge_same(dp, other_dp))</div><div class='add'>+			break; /* same bridge, check next VLAN */</div><div class='add'>+</div><div class='add'>+		other_br = dsa_port_bridge_dev_get(other_dp);</div><div class='add'>+		if (!other_br)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		dev_err(ds-&gt;dev, "p%d: hw VLAN %d already used by port %d in %s\n",</div><div class='add'>+			port, vlan.vid, other_dp-&gt;index, netdev_name(other_br));</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_commit_pvid(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(chip-&gt;ds, port);</div><div class='add'>+	struct net_device *br = dsa_port_bridge_dev_get(dp);</div><div class='add'>+	struct mv88e6xxx_port *p = &amp;chip-&gt;ports[port];</div><div class='add'>+	u16 pvid = MV88E6XXX_VID_STANDALONE;</div><div class='add'>+	bool drop_untagged = false;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (br) {</div><div class='add'>+		if (br_vlan_enabled(br)) {</div><div class='add'>+			pvid = p-&gt;bridge_pvid.vid;</div><div class='add'>+			drop_untagged = !p-&gt;bridge_pvid.valid;</div><div class='add'>+		} else {</div><div class='add'>+			pvid = MV88E6XXX_VID_BRIDGED;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_set_pvid(chip, port, pvid);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_drop_untagged(chip, port, drop_untagged);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_vlan_filtering(struct dsa_switch *ds, int port,</div><div class='add'>+					 bool vlan_filtering,</div><div class='add'>+					 struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	u16 mode = vlan_filtering ? MV88E6XXX_PORT_CTL2_8021Q_MODE_SECURE :</div><div class='add'>+		MV88E6XXX_PORT_CTL2_8021Q_MODE_DISABLED;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!mv88e6xxx_max_vid(chip))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_set_8021q_mode(chip, port, mode);</div><div class='add'>+	if (err)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_commit_pvid(chip, port);</div><div class='add'>+	if (err)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mv88e6xxx_port_vlan_prepare(struct dsa_switch *ds, int port,</div><div class='add'>+			    const struct switchdev_obj_port_vlan *vlan)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!mv88e6xxx_max_vid(chip))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	/* If the requested port doesn't belong to the same bridge as the VLAN</div><div class='add'>+	 * members, do not support it (yet) and fallback to software VLAN.</div><div class='add'>+	 */</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	err = mv88e6xxx_port_check_hw_vlan(ds, port, vlan-&gt;vid);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_db_get(struct mv88e6xxx_chip *chip,</div><div class='add'>+				 const unsigned char *addr, u16 vid,</div><div class='add'>+				 u16 *fid, struct mv88e6xxx_atu_entry *entry)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_vtu_entry vlan;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Ports have two private address databases: one for when the port is</div><div class='add'>+	 * standalone and one for when the port is under a bridge and the</div><div class='add'>+	 * 802.1Q mode is disabled. When the port is standalone, DSA wants its</div><div class='add'>+	 * address database to remain 100% empty, so we never load an ATU entry</div><div class='add'>+	 * into a standalone port's database. Therefore, translate the null</div><div class='add'>+	 * VLAN ID into the port's database used for VLAN-unaware bridging.</div><div class='add'>+	 */</div><div class='add'>+	if (vid == 0) {</div><div class='add'>+		*fid = MV88E6XXX_FID_BRIDGED;</div><div class='add'>+	} else {</div><div class='add'>+		err = mv88e6xxx_vtu_get(chip, vid, &amp;vlan);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		/* switchdev expects -EOPNOTSUPP to honor software VLANs */</div><div class='add'>+		if (!vlan.valid)</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+		*fid = vlan.fid;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	entry-&gt;state = 0;</div><div class='add'>+	ether_addr_copy(entry-&gt;mac, addr);</div><div class='add'>+	eth_addr_dec(entry-&gt;mac);</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_atu_getnext(chip, *fid, entry);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool mv88e6xxx_port_db_find(struct mv88e6xxx_chip *chip,</div><div class='add'>+				   const unsigned char *addr, u16 vid)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_atu_entry entry;</div><div class='add'>+	u16 fid;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_db_get(chip, addr, vid, &amp;fid, &amp;entry);</div><div class='add'>+	if (err)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return entry.state &amp;&amp; ether_addr_equal(entry.mac, addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_db_load_purge(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+					const unsigned char *addr, u16 vid,</div><div class='add'>+					u8 state)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_atu_entry entry;</div><div class='add'>+	u16 fid;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_db_get(chip, addr, vid, &amp;fid, &amp;entry);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Initialize a fresh ATU entry if it isn't found */</div><div class='add'>+	if (!entry.state || !ether_addr_equal(entry.mac, addr)) {</div><div class='add'>+		memset(&amp;entry, 0, sizeof(entry));</div><div class='add'>+		ether_addr_copy(entry.mac, addr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Purge the ATU entry only if no port is using it anymore */</div><div class='add'>+	if (!state) {</div><div class='add'>+		entry.portvec &amp;= ~BIT(port);</div><div class='add'>+		if (!entry.portvec)</div><div class='add'>+			entry.state = 0;</div><div class='add'>+	} else {</div><div class='add'>+		if (state == MV88E6XXX_G1_ATU_DATA_STATE_UC_STATIC)</div><div class='add'>+			entry.portvec = BIT(port);</div><div class='add'>+		else</div><div class='add'>+			entry.portvec |= BIT(port);</div><div class='add'>+</div><div class='add'>+		entry.state = state;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_atu_loadpurge(chip, fid, &amp;entry);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_policy_apply(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				  const struct mv88e6xxx_policy *policy)</div><div class='add'>+{</div><div class='add'>+	enum mv88e6xxx_policy_mapping mapping = policy-&gt;mapping;</div><div class='add'>+	enum mv88e6xxx_policy_action action = policy-&gt;action;</div><div class='add'>+	const u8 *addr = policy-&gt;addr;</div><div class='add'>+	u16 vid = policy-&gt;vid;</div><div class='add'>+	u8 state;</div><div class='add'>+	int err;</div><div class='add'>+	int id;</div><div class='add'>+</div><div class='add'>+	if (!chip-&gt;info-&gt;ops-&gt;port_set_policy)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	switch (mapping) {</div><div class='add'>+	case MV88E6XXX_POLICY_MAPPING_DA:</div><div class='add'>+	case MV88E6XXX_POLICY_MAPPING_SA:</div><div class='add'>+		if (action == MV88E6XXX_POLICY_ACTION_NORMAL)</div><div class='add'>+			state = 0; /* Dissociate the port and address */</div><div class='add'>+		else if (action == MV88E6XXX_POLICY_ACTION_DISCARD &amp;&amp;</div><div class='add'>+			 is_multicast_ether_addr(addr))</div><div class='add'>+			state = MV88E6XXX_G1_ATU_DATA_STATE_MC_STATIC_POLICY;</div><div class='add'>+		else if (action == MV88E6XXX_POLICY_ACTION_DISCARD &amp;&amp;</div><div class='add'>+			 is_unicast_ether_addr(addr))</div><div class='add'>+			state = MV88E6XXX_G1_ATU_DATA_STATE_UC_STATIC_POLICY;</div><div class='add'>+		else</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_port_db_load_purge(chip, port, addr, vid,</div><div class='add'>+						   state);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Skip the port's policy clearing if the mapping is still in use */</div><div class='add'>+	if (action == MV88E6XXX_POLICY_ACTION_NORMAL)</div><div class='add'>+		idr_for_each_entry(&amp;chip-&gt;policies, policy, id)</div><div class='add'>+			if (policy-&gt;port == port &amp;&amp;</div><div class='add'>+			    policy-&gt;mapping == mapping &amp;&amp;</div><div class='add'>+			    policy-&gt;action != action)</div><div class='add'>+				return 0;</div><div class='add'>+</div><div class='add'>+	return chip-&gt;info-&gt;ops-&gt;port_set_policy(chip, port, mapping, action);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_policy_insert(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				   struct ethtool_rx_flow_spec *fs)</div><div class='add'>+{</div><div class='add'>+	struct ethhdr *mac_entry = &amp;fs-&gt;h_u.ether_spec;</div><div class='add'>+	struct ethhdr *mac_mask = &amp;fs-&gt;m_u.ether_spec;</div><div class='add'>+	enum mv88e6xxx_policy_mapping mapping;</div><div class='add'>+	enum mv88e6xxx_policy_action action;</div><div class='add'>+	struct mv88e6xxx_policy *policy;</div><div class='add'>+	u16 vid = 0;</div><div class='add'>+	u8 *addr;</div><div class='add'>+	int err;</div><div class='add'>+	int id;</div><div class='add'>+</div><div class='add'>+	if (fs-&gt;location != RX_CLS_LOC_ANY)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (fs-&gt;ring_cookie == RX_CLS_FLOW_DISC)</div><div class='add'>+		action = MV88E6XXX_POLICY_ACTION_DISCARD;</div><div class='add'>+	else</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	switch (fs-&gt;flow_type &amp; ~FLOW_EXT) {</div><div class='add'>+	case ETHER_FLOW:</div><div class='add'>+		if (!is_zero_ether_addr(mac_mask-&gt;h_dest) &amp;&amp;</div><div class='add'>+		    is_zero_ether_addr(mac_mask-&gt;h_source)) {</div><div class='add'>+			mapping = MV88E6XXX_POLICY_MAPPING_DA;</div><div class='add'>+			addr = mac_entry-&gt;h_dest;</div><div class='add'>+		} else if (is_zero_ether_addr(mac_mask-&gt;h_dest) &amp;&amp;</div><div class='add'>+		    !is_zero_ether_addr(mac_mask-&gt;h_source)) {</div><div class='add'>+			mapping = MV88E6XXX_POLICY_MAPPING_SA;</div><div class='add'>+			addr = mac_entry-&gt;h_source;</div><div class='add'>+		} else {</div><div class='add'>+			/* Cannot support DA and SA mapping in the same rule */</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((fs-&gt;flow_type &amp; FLOW_EXT) &amp;&amp; fs-&gt;m_ext.vlan_tci) {</div><div class='add'>+		if (fs-&gt;m_ext.vlan_tci != htons(0xffff))</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		vid = be16_to_cpu(fs-&gt;h_ext.vlan_tci) &amp; VLAN_VID_MASK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	idr_for_each_entry(&amp;chip-&gt;policies, policy, id) {</div><div class='add'>+		if (policy-&gt;port == port &amp;&amp; policy-&gt;mapping == mapping &amp;&amp;</div><div class='add'>+		    policy-&gt;action == action &amp;&amp; policy-&gt;vid == vid &amp;&amp;</div><div class='add'>+		    ether_addr_equal(policy-&gt;addr, addr))</div><div class='add'>+			return -EEXIST;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	policy = devm_kzalloc(chip-&gt;dev, sizeof(*policy), GFP_KERNEL);</div><div class='add'>+	if (!policy)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	fs-&gt;location = 0;</div><div class='add'>+	err = idr_alloc_u32(&amp;chip-&gt;policies, policy, &amp;fs-&gt;location, 0xffffffff,</div><div class='add'>+			    GFP_KERNEL);</div><div class='add'>+	if (err) {</div><div class='add'>+		devm_kfree(chip-&gt;dev, policy);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;policy-&gt;fs, fs, sizeof(*fs));</div><div class='add'>+	ether_addr_copy(policy-&gt;addr, addr);</div><div class='add'>+	policy-&gt;mapping = mapping;</div><div class='add'>+	policy-&gt;action = action;</div><div class='add'>+	policy-&gt;port = port;</div><div class='add'>+	policy-&gt;vid = vid;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_policy_apply(chip, port, policy);</div><div class='add'>+	if (err) {</div><div class='add'>+		idr_remove(&amp;chip-&gt;policies, fs-&gt;location);</div><div class='add'>+		devm_kfree(chip-&gt;dev, policy);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_get_rxnfc(struct dsa_switch *ds, int port,</div><div class='add'>+			       struct ethtool_rxnfc *rxnfc, u32 *rule_locs)</div><div class='add'>+{</div><div class='add'>+	struct ethtool_rx_flow_spec *fs = &amp;rxnfc-&gt;fs;</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	struct mv88e6xxx_policy *policy;</div><div class='add'>+	int err;</div><div class='add'>+	int id;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+</div><div class='add'>+	switch (rxnfc-&gt;cmd) {</div><div class='add'>+	case ETHTOOL_GRXCLSRLCNT:</div><div class='add'>+		rxnfc-&gt;data = 0;</div><div class='add'>+		rxnfc-&gt;data |= RX_CLS_LOC_SPECIAL;</div><div class='add'>+		rxnfc-&gt;rule_cnt = 0;</div><div class='add'>+		idr_for_each_entry(&amp;chip-&gt;policies, policy, id)</div><div class='add'>+			if (policy-&gt;port == port)</div><div class='add'>+				rxnfc-&gt;rule_cnt++;</div><div class='add'>+		err = 0;</div><div class='add'>+		break;</div><div class='add'>+	case ETHTOOL_GRXCLSRULE:</div><div class='add'>+		err = -ENOENT;</div><div class='add'>+		policy = idr_find(&amp;chip-&gt;policies, fs-&gt;location);</div><div class='add'>+		if (policy) {</div><div class='add'>+			memcpy(fs, &amp;policy-&gt;fs, sizeof(*fs));</div><div class='add'>+			err = 0;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case ETHTOOL_GRXCLSRLALL:</div><div class='add'>+		rxnfc-&gt;data = 0;</div><div class='add'>+		rxnfc-&gt;rule_cnt = 0;</div><div class='add'>+		idr_for_each_entry(&amp;chip-&gt;policies, policy, id)</div><div class='add'>+			if (policy-&gt;port == port)</div><div class='add'>+				rule_locs[rxnfc-&gt;rule_cnt++] = id;</div><div class='add'>+		err = 0;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		err = -EOPNOTSUPP;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_set_rxnfc(struct dsa_switch *ds, int port,</div><div class='add'>+			       struct ethtool_rxnfc *rxnfc)</div><div class='add'>+{</div><div class='add'>+	struct ethtool_rx_flow_spec *fs = &amp;rxnfc-&gt;fs;</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	struct mv88e6xxx_policy *policy;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+</div><div class='add'>+	switch (rxnfc-&gt;cmd) {</div><div class='add'>+	case ETHTOOL_SRXCLSRLINS:</div><div class='add'>+		err = mv88e6xxx_policy_insert(chip, port, fs);</div><div class='add'>+		break;</div><div class='add'>+	case ETHTOOL_SRXCLSRLDEL:</div><div class='add'>+		err = -ENOENT;</div><div class='add'>+		policy = idr_remove(&amp;chip-&gt;policies, fs-&gt;location);</div><div class='add'>+		if (policy) {</div><div class='add'>+			policy-&gt;action = MV88E6XXX_POLICY_ACTION_NORMAL;</div><div class='add'>+			err = mv88e6xxx_policy_apply(chip, port, policy);</div><div class='add'>+			devm_kfree(chip-&gt;dev, policy);</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		err = -EOPNOTSUPP;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_add_broadcast(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+					u16 vid)</div><div class='add'>+{</div><div class='add'>+	u8 state = MV88E6XXX_G1_ATU_DATA_STATE_MC_STATIC;</div><div class='add'>+	u8 broadcast[ETH_ALEN];</div><div class='add'>+</div><div class='add'>+	eth_broadcast_addr(broadcast);</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_db_load_purge(chip, port, broadcast, vid, state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_broadcast_setup(struct mv88e6xxx_chip *chip, u16 vid)</div><div class='add'>+{</div><div class='add'>+	int port;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	for (port = 0; port &lt; mv88e6xxx_num_ports(chip); port++) {</div><div class='add'>+		struct dsa_port *dp = dsa_to_port(chip-&gt;ds, port);</div><div class='add'>+		struct net_device *brport;</div><div class='add'>+</div><div class='add'>+		if (dsa_is_unused_port(chip-&gt;ds, port))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		brport = dsa_port_to_bridge_port(dp);</div><div class='add'>+		if (brport &amp;&amp; !br_port_flag_is_set(brport, BR_BCAST_FLOOD))</div><div class='add'>+			/* Skip bridged user ports where broadcast</div><div class='add'>+			 * flooding is disabled.</div><div class='add'>+			 */</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_port_add_broadcast(chip, port, vid);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct mv88e6xxx_port_broadcast_sync_ctx {</div><div class='add'>+	int port;</div><div class='add'>+	bool flood;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mv88e6xxx_port_broadcast_sync_vlan(struct mv88e6xxx_chip *chip,</div><div class='add'>+				   const struct mv88e6xxx_vtu_entry *vlan,</div><div class='add'>+				   void *_ctx)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_port_broadcast_sync_ctx *ctx = _ctx;</div><div class='add'>+	u8 broadcast[ETH_ALEN];</div><div class='add'>+	u8 state;</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;flood)</div><div class='add'>+		state = MV88E6XXX_G1_ATU_DATA_STATE_MC_STATIC;</div><div class='add'>+	else</div><div class='add'>+		state = MV88E6XXX_G1_ATU_DATA_STATE_MC_UNUSED;</div><div class='add'>+</div><div class='add'>+	eth_broadcast_addr(broadcast);</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_db_load_purge(chip, ctx-&gt;port, broadcast,</div><div class='add'>+					    vlan-&gt;vid, state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_broadcast_sync(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+					 bool flood)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_port_broadcast_sync_ctx ctx = {</div><div class='add'>+		.port = port,</div><div class='add'>+		.flood = flood,</div><div class='add'>+	};</div><div class='add'>+	struct mv88e6xxx_vtu_entry vid0 = {</div><div class='add'>+		.vid = 0,</div><div class='add'>+	};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Update the port's private database... */</div><div class='add'>+	err = mv88e6xxx_port_broadcast_sync_vlan(chip, &amp;vid0, &amp;ctx);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* ...and the database for all VLANs. */</div><div class='add'>+	return mv88e6xxx_vtu_walk(chip, mv88e6xxx_port_broadcast_sync_vlan,</div><div class='add'>+				  &amp;ctx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_vlan_join(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				    u16 vid, u8 member, bool warn)</div><div class='add'>+{</div><div class='add'>+	const u8 non_member = MV88E6XXX_G1_VTU_DATA_MEMBER_TAG_NON_MEMBER;</div><div class='add'>+	struct mv88e6xxx_vtu_entry vlan;</div><div class='add'>+	int i, err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_vtu_get(chip, vid, &amp;vlan);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (!vlan.valid) {</div><div class='add'>+		memset(&amp;vlan, 0, sizeof(vlan));</div><div class='add'>+</div><div class='add'>+		if (vid == MV88E6XXX_VID_STANDALONE)</div><div class='add'>+			vlan.policy = true;</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_atu_new(chip, &amp;vlan.fid);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; mv88e6xxx_num_ports(chip); ++i)</div><div class='add'>+			if (i == port)</div><div class='add'>+				vlan.member[i] = member;</div><div class='add'>+			else</div><div class='add'>+				vlan.member[i] = non_member;</div><div class='add'>+</div><div class='add'>+		vlan.vid = vid;</div><div class='add'>+		vlan.valid = true;</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_vtu_loadpurge(chip, &amp;vlan);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_broadcast_setup(chip, vlan.vid);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	} else if (vlan.member[port] != member) {</div><div class='add'>+		vlan.member[port] = member;</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_vtu_loadpurge(chip, &amp;vlan);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	} else if (warn) {</div><div class='add'>+		dev_info(chip-&gt;dev, "p%d: already a member of VLAN %d\n",</div><div class='add'>+			 port, vid);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Record FID used in SW FID map */</div><div class='add'>+	bitmap_set(chip-&gt;fid_bitmap, vlan.fid, 1);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_vlan_add(struct dsa_switch *ds, int port,</div><div class='add'>+				   const struct switchdev_obj_port_vlan *vlan,</div><div class='add'>+				   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	bool untagged = vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_UNTAGGED;</div><div class='add'>+	bool pvid = vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_PVID;</div><div class='add'>+	struct mv88e6xxx_port *p = &amp;chip-&gt;ports[port];</div><div class='add'>+	bool warn;</div><div class='add'>+	u8 member;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!vlan-&gt;vid)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_vlan_prepare(ds, port, vlan);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (dsa_is_dsa_port(ds, port) || dsa_is_cpu_port(ds, port))</div><div class='add'>+		member = MV88E6XXX_G1_VTU_DATA_MEMBER_TAG_UNMODIFIED;</div><div class='add'>+	else if (untagged)</div><div class='add'>+		member = MV88E6XXX_G1_VTU_DATA_MEMBER_TAG_UNTAGGED;</div><div class='add'>+	else</div><div class='add'>+		member = MV88E6XXX_G1_VTU_DATA_MEMBER_TAG_TAGGED;</div><div class='add'>+</div><div class='add'>+	/* net/dsa/user.c will call dsa_port_vlan_add() for the affected port</div><div class='add'>+	 * and then the CPU port. Do not warn for duplicates for the CPU port.</div><div class='add'>+	 */</div><div class='add'>+	warn = !dsa_is_cpu_port(ds, port) &amp;&amp; !dsa_is_dsa_port(ds, port);</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_vlan_join(chip, port, vlan-&gt;vid, member, warn);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(ds-&gt;dev, "p%d: failed to add VLAN %d%c\n", port,</div><div class='add'>+			vlan-&gt;vid, untagged ? 'u' : 't');</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pvid) {</div><div class='add'>+		p-&gt;bridge_pvid.vid = vlan-&gt;vid;</div><div class='add'>+		p-&gt;bridge_pvid.valid = true;</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_port_commit_pvid(chip, port);</div><div class='add'>+		if (err)</div><div class='add'>+			goto out;</div><div class='add'>+	} else if (vlan-&gt;vid &amp;&amp; p-&gt;bridge_pvid.vid == vlan-&gt;vid) {</div><div class='add'>+		/* The old pvid was reinstalled as a non-pvid VLAN */</div><div class='add'>+		p-&gt;bridge_pvid.valid = false;</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_port_commit_pvid(chip, port);</div><div class='add'>+		if (err)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_vlan_leave(struct mv88e6xxx_chip *chip,</div><div class='add'>+				     int port, u16 vid)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_vtu_entry vlan;</div><div class='add'>+	int i, err;</div><div class='add'>+</div><div class='add'>+	if (!vid)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_vtu_get(chip, vid, &amp;vlan);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* If the VLAN doesn't exist in hardware or the port isn't a member,</div><div class='add'>+	 * tell switchdev that this VLAN is likely handled in software.</div><div class='add'>+	 */</div><div class='add'>+	if (!vlan.valid ||</div><div class='add'>+	    vlan.member[port] == MV88E6XXX_G1_VTU_DATA_MEMBER_TAG_NON_MEMBER)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	vlan.member[port] = MV88E6XXX_G1_VTU_DATA_MEMBER_TAG_NON_MEMBER;</div><div class='add'>+</div><div class='add'>+	/* keep the VLAN unless all ports are excluded */</div><div class='add'>+	vlan.valid = false;</div><div class='add'>+	for (i = 0; i &lt; mv88e6xxx_num_ports(chip); ++i) {</div><div class='add'>+		if (vlan.member[i] !=</div><div class='add'>+		    MV88E6XXX_G1_VTU_DATA_MEMBER_TAG_NON_MEMBER) {</div><div class='add'>+			vlan.valid = true;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_vtu_loadpurge(chip, &amp;vlan);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (!vlan.valid) {</div><div class='add'>+		err = mv88e6xxx_mst_put(chip, vlan.sid);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		/* Record FID freed in SW FID map */</div><div class='add'>+		bitmap_clear(chip-&gt;fid_bitmap, vlan.fid, 1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_atu_remove(chip, vlan.fid, port, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_vlan_del(struct dsa_switch *ds, int port,</div><div class='add'>+				   const struct switchdev_obj_port_vlan *vlan)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	struct mv88e6xxx_port *p = &amp;chip-&gt;ports[port];</div><div class='add'>+	int err = 0;</div><div class='add'>+	u16 pvid;</div><div class='add'>+</div><div class='add'>+	if (!mv88e6xxx_max_vid(chip))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	/* The ATU removal procedure needs the FID to be mapped in the VTU,</div><div class='add'>+	 * but FDB deletion runs concurrently with VLAN deletion. Flush the DSA</div><div class='add'>+	 * switchdev workqueue to ensure that all FDB entries are deleted</div><div class='add'>+	 * before we remove the VLAN.</div><div class='add'>+	 */</div><div class='add'>+	dsa_flush_workqueue();</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_get_pvid(chip, port, &amp;pvid);</div><div class='add'>+	if (err)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_vlan_leave(chip, port, vlan-&gt;vid);</div><div class='add'>+	if (err)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	if (vlan-&gt;vid == pvid) {</div><div class='add'>+		p-&gt;bridge_pvid.valid = false;</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_port_commit_pvid(chip, port);</div><div class='add'>+		if (err)</div><div class='add'>+			goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_vlan_fast_age(struct dsa_switch *ds, int port, u16 vid)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	struct mv88e6xxx_vtu_entry vlan;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_vtu_get(chip, vid, &amp;vlan);</div><div class='add'>+	if (err)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_fast_age_fid(chip, port, vlan.fid);</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_vlan_msti_set(struct dsa_switch *ds,</div><div class='add'>+				   struct dsa_bridge bridge,</div><div class='add'>+				   const struct switchdev_vlan_msti *msti)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	struct mv88e6xxx_vtu_entry vlan;</div><div class='add'>+	u8 old_sid, new_sid;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!mv88e6xxx_has_stu(chip))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_vtu_get(chip, msti-&gt;vid, &amp;vlan);</div><div class='add'>+	if (err)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	if (!vlan.valid) {</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	old_sid = vlan.sid;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_mst_get(chip, bridge.dev, msti-&gt;msti, &amp;new_sid);</div><div class='add'>+	if (err)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	if (new_sid != old_sid) {</div><div class='add'>+		vlan.sid = new_sid;</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_vtu_loadpurge(chip, &amp;vlan);</div><div class='add'>+		if (err) {</div><div class='add'>+			mv88e6xxx_mst_put(chip, new_sid);</div><div class='add'>+			goto unlock;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_mst_put(chip, old_sid);</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_fdb_add(struct dsa_switch *ds, int port,</div><div class='add'>+				  const unsigned char *addr, u16 vid,</div><div class='add'>+				  struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	err = mv88e6xxx_port_db_load_purge(chip, port, addr, vid,</div><div class='add'>+					   MV88E6XXX_G1_ATU_DATA_STATE_UC_STATIC);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (!mv88e6xxx_port_db_find(chip, addr, vid))</div><div class='add'>+		err = -ENOSPC;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_fdb_del(struct dsa_switch *ds, int port,</div><div class='add'>+				  const unsigned char *addr, u16 vid,</div><div class='add'>+				  struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	err = mv88e6xxx_port_db_load_purge(chip, port, addr, vid, 0);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_db_dump_fid(struct mv88e6xxx_chip *chip,</div><div class='add'>+				      u16 fid, u16 vid, int port,</div><div class='add'>+				      dsa_fdb_dump_cb_t *cb, void *data)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_atu_entry addr;</div><div class='add'>+	bool is_static;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	addr.state = 0;</div><div class='add'>+	eth_broadcast_addr(addr.mac);</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		err = mv88e6xxx_g1_atu_getnext(chip, fid, &amp;addr);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		if (!addr.state)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if (addr.trunk || (addr.portvec &amp; BIT(port)) == 0)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (!is_unicast_ether_addr(addr.mac))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		is_static = (addr.state ==</div><div class='add'>+			     MV88E6XXX_G1_ATU_DATA_STATE_UC_STATIC);</div><div class='add'>+		err = cb(addr.mac, vid, is_static, data);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	} while (!is_broadcast_ether_addr(addr.mac));</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct mv88e6xxx_port_db_dump_vlan_ctx {</div><div class='add'>+	int port;</div><div class='add'>+	dsa_fdb_dump_cb_t *cb;</div><div class='add'>+	void *data;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_db_dump_vlan(struct mv88e6xxx_chip *chip,</div><div class='add'>+				       const struct mv88e6xxx_vtu_entry *entry,</div><div class='add'>+				       void *_data)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_port_db_dump_vlan_ctx *ctx = _data;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_db_dump_fid(chip, entry-&gt;fid, entry-&gt;vid,</div><div class='add'>+					  ctx-&gt;port, ctx-&gt;cb, ctx-&gt;data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_db_dump(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				  dsa_fdb_dump_cb_t *cb, void *data)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_port_db_dump_vlan_ctx ctx = {</div><div class='add'>+		.port = port,</div><div class='add'>+		.cb = cb,</div><div class='add'>+		.data = data,</div><div class='add'>+	};</div><div class='add'>+	u16 fid;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Dump port's default Filtering Information Database (VLAN ID 0) */</div><div class='add'>+	err = mv88e6xxx_port_get_fid(chip, port, &amp;fid);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_db_dump_fid(chip, fid, 0, port, cb, data);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_vtu_walk(chip, mv88e6xxx_port_db_dump_vlan, &amp;ctx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_fdb_dump(struct dsa_switch *ds, int port,</div><div class='add'>+				   dsa_fdb_dump_cb_t *cb, void *data)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	err = mv88e6xxx_port_db_dump(chip, port, cb, data);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_bridge_map(struct mv88e6xxx_chip *chip,</div><div class='add'>+				struct dsa_bridge bridge)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds = chip-&gt;ds;</div><div class='add'>+	struct dsa_switch_tree *dst = ds-&gt;dst;</div><div class='add'>+	struct dsa_port *dp;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(dp, &amp;dst-&gt;ports, list) {</div><div class='add'>+		if (dsa_port_offloads_bridge(dp, &amp;bridge)) {</div><div class='add'>+			if (dp-&gt;ds == ds) {</div><div class='add'>+				/* This is a local bridge group member,</div><div class='add'>+				 * remap its Port VLAN Map.</div><div class='add'>+				 */</div><div class='add'>+				err = mv88e6xxx_port_vlan_map(chip, dp-&gt;index);</div><div class='add'>+				if (err)</div><div class='add'>+					return err;</div><div class='add'>+			} else {</div><div class='add'>+				/* This is an external bridge group member,</div><div class='add'>+				 * remap its cross-chip Port VLAN Table entry.</div><div class='add'>+				 */</div><div class='add'>+				err = mv88e6xxx_pvt_map(chip, dp-&gt;ds-&gt;index,</div><div class='add'>+							dp-&gt;index);</div><div class='add'>+				if (err)</div><div class='add'>+					return err;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Treat the software bridge as a virtual single-port switch behind the</div><div class='add'>+ * CPU and map in the PVT. First dst-&gt;last_switch elements are taken by</div><div class='add'>+ * physical switches, so start from beyond that range.</div><div class='add'>+ */</div><div class='add'>+static int mv88e6xxx_map_virtual_bridge_to_pvt(struct dsa_switch *ds,</div><div class='add'>+					       unsigned int bridge_num)</div><div class='add'>+{</div><div class='add'>+	u8 dev = bridge_num + ds-&gt;dst-&gt;last_switch;</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_pvt_map(chip, dev, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_bridge_join(struct dsa_switch *ds, int port,</div><div class='add'>+				      struct dsa_bridge bridge,</div><div class='add'>+				      bool *tx_fwd_offload,</div><div class='add'>+				      struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_bridge_map(chip, bridge);</div><div class='add'>+	if (err)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_set_map_da(chip, port, true);</div><div class='add'>+	if (err)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_commit_pvid(chip, port);</div><div class='add'>+	if (err)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	if (mv88e6xxx_has_pvt(chip)) {</div><div class='add'>+		err = mv88e6xxx_map_virtual_bridge_to_pvt(ds, bridge.num);</div><div class='add'>+		if (err)</div><div class='add'>+			goto unlock;</div><div class='add'>+</div><div class='add'>+		*tx_fwd_offload = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_port_bridge_leave(struct dsa_switch *ds, int port,</div><div class='add'>+					struct dsa_bridge bridge)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+</div><div class='add'>+	if (bridge.tx_fwd_offload &amp;&amp;</div><div class='add'>+	    mv88e6xxx_map_virtual_bridge_to_pvt(ds, bridge.num))</div><div class='add'>+		dev_err(ds-&gt;dev, "failed to remap cross-chip Port VLAN\n");</div><div class='add'>+</div><div class='add'>+	if (mv88e6xxx_bridge_map(chip, bridge) ||</div><div class='add'>+	    mv88e6xxx_port_vlan_map(chip, port))</div><div class='add'>+		dev_err(ds-&gt;dev, "failed to remap in-chip Port VLAN\n");</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_set_map_da(chip, port, false);</div><div class='add'>+	if (err)</div><div class='add'>+		dev_err(ds-&gt;dev,</div><div class='add'>+			"port %d failed to restore map-DA: %pe\n",</div><div class='add'>+			port, ERR_PTR(err));</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_commit_pvid(chip, port);</div><div class='add'>+	if (err)</div><div class='add'>+		dev_err(ds-&gt;dev,</div><div class='add'>+			"port %d failed to restore standalone pvid: %pe\n",</div><div class='add'>+			port, ERR_PTR(err));</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_crosschip_bridge_join(struct dsa_switch *ds,</div><div class='add'>+					   int tree_index, int sw_index,</div><div class='add'>+					   int port, struct dsa_bridge bridge,</div><div class='add'>+					   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (tree_index != ds-&gt;dst-&gt;index)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	err = mv88e6xxx_pvt_map(chip, sw_index, port);</div><div class='add'>+	err = err ? : mv88e6xxx_map_virtual_bridge_to_pvt(ds, bridge.num);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_crosschip_bridge_leave(struct dsa_switch *ds,</div><div class='add'>+					     int tree_index, int sw_index,</div><div class='add'>+					     int port, struct dsa_bridge bridge)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (tree_index != ds-&gt;dst-&gt;index)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	if (mv88e6xxx_pvt_map(chip, sw_index, port) ||</div><div class='add'>+	    mv88e6xxx_map_virtual_bridge_to_pvt(ds, bridge.num))</div><div class='add'>+		dev_err(ds-&gt;dev, "failed to remap cross-chip Port VLAN\n");</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_software_reset(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;reset)</div><div class='add'>+		return chip-&gt;info-&gt;ops-&gt;reset(chip);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_hardware_reset(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	struct gpio_desc *gpiod = chip-&gt;reset;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* If there is a GPIO connected to the reset pin, toggle it */</div><div class='add'>+	if (gpiod) {</div><div class='add'>+		/* If the switch has just been reset and not yet completed</div><div class='add'>+		 * loading EEPROM, the reset may interrupt the I2C transaction</div><div class='add'>+		 * mid-byte, causing the first EEPROM read after the reset</div><div class='add'>+		 * from the wrong location resulting in the switch booting</div><div class='add'>+		 * to wrong mode and inoperable.</div><div class='add'>+		 * For this reason, switch families with EEPROM support</div><div class='add'>+		 * generally wait for EEPROM loads to complete as their pre-</div><div class='add'>+		 * and post-reset handlers.</div><div class='add'>+		 */</div><div class='add'>+		if (chip-&gt;info-&gt;ops-&gt;hardware_reset_pre) {</div><div class='add'>+			err = chip-&gt;info-&gt;ops-&gt;hardware_reset_pre(chip);</div><div class='add'>+			if (err)</div><div class='add'>+				dev_err(chip-&gt;dev, "pre-reset error: %d\n", err);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		gpiod_set_value_cansleep(gpiod, 1);</div><div class='add'>+		usleep_range(10000, 20000);</div><div class='add'>+		gpiod_set_value_cansleep(gpiod, 0);</div><div class='add'>+		usleep_range(10000, 20000);</div><div class='add'>+</div><div class='add'>+		if (chip-&gt;info-&gt;ops-&gt;hardware_reset_post) {</div><div class='add'>+			err = chip-&gt;info-&gt;ops-&gt;hardware_reset_post(chip);</div><div class='add'>+			if (err)</div><div class='add'>+				dev_err(chip-&gt;dev, "post-reset error: %d\n", err);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_disable_ports(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int i, err;</div><div class='add'>+</div><div class='add'>+	/* Set all ports to the Disabled state */</div><div class='add'>+	for (i = 0; i &lt; mv88e6xxx_num_ports(chip); i++) {</div><div class='add'>+		err = mv88e6xxx_port_set_state(chip, i, BR_STATE_DISABLED);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Wait for transmit queues to drain,</div><div class='add'>+	 * i.e. 2ms for a maximum frame to be transmitted at 10 Mbps.</div><div class='add'>+	 */</div><div class='add'>+	usleep_range(2000, 4000);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_switch_reset(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_disable_ports(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_hardware_reset(chip);</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_software_reset(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_set_port_mode(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				   enum mv88e6xxx_frame_mode frame,</div><div class='add'>+				   enum mv88e6xxx_egress_mode egress, u16 etype)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!chip-&gt;info-&gt;ops-&gt;port_set_frame_mode)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_set_egress_mode(chip, port, egress);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = chip-&gt;info-&gt;ops-&gt;port_set_frame_mode(chip, port, frame);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;port_set_ether_type)</div><div class='add'>+		return chip-&gt;info-&gt;ops-&gt;port_set_ether_type(chip, port, etype);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_set_port_mode_normal(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_set_port_mode(chip, port, MV88E6XXX_FRAME_MODE_NORMAL,</div><div class='add'>+				       MV88E6XXX_EGRESS_MODE_UNMODIFIED,</div><div class='add'>+				       MV88E6XXX_PORT_ETH_TYPE_DEFAULT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_set_port_mode_dsa(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_set_port_mode(chip, port, MV88E6XXX_FRAME_MODE_DSA,</div><div class='add'>+				       MV88E6XXX_EGRESS_MODE_UNMODIFIED,</div><div class='add'>+				       MV88E6XXX_PORT_ETH_TYPE_DEFAULT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_set_port_mode_edsa(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_set_port_mode(chip, port,</div><div class='add'>+				       MV88E6XXX_FRAME_MODE_ETHERTYPE,</div><div class='add'>+				       MV88E6XXX_EGRESS_MODE_ETHERTYPE,</div><div class='add'>+				       ETH_P_EDSA);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_setup_port_mode(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	if (dsa_is_dsa_port(chip-&gt;ds, port))</div><div class='add'>+		return mv88e6xxx_set_port_mode_dsa(chip, port);</div><div class='add'>+</div><div class='add'>+	if (dsa_is_user_port(chip-&gt;ds, port))</div><div class='add'>+		return mv88e6xxx_set_port_mode_normal(chip, port);</div><div class='add'>+</div><div class='add'>+	/* Setup CPU port mode depending on its supported tag format */</div><div class='add'>+	if (chip-&gt;tag_protocol == DSA_TAG_PROTO_DSA)</div><div class='add'>+		return mv88e6xxx_set_port_mode_dsa(chip, port);</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;tag_protocol == DSA_TAG_PROTO_EDSA)</div><div class='add'>+		return mv88e6xxx_set_port_mode_edsa(chip, port);</div><div class='add'>+</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_setup_message_port(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	bool message = dsa_is_dsa_port(chip-&gt;ds, port);</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_set_message_port(chip, port, message);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_setup_egress_floods(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;port_set_ucast_flood) {</div><div class='add'>+		err = chip-&gt;info-&gt;ops-&gt;port_set_ucast_flood(chip, port, true);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;port_set_mcast_flood) {</div><div class='add'>+		err = chip-&gt;info-&gt;ops-&gt;port_set_mcast_flood(chip, port, true);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_set_egress_port(struct mv88e6xxx_chip *chip,</div><div class='add'>+				     enum mv88e6xxx_egress_direction direction,</div><div class='add'>+				     int port)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!chip-&gt;info-&gt;ops-&gt;set_egress_port)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	err = chip-&gt;info-&gt;ops-&gt;set_egress_port(chip, direction, port);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (direction == MV88E6XXX_EGRESS_DIR_INGRESS)</div><div class='add'>+		chip-&gt;ingress_dest_port = port;</div><div class='add'>+	else</div><div class='add'>+		chip-&gt;egress_dest_port = port;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_setup_upstream_port(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds = chip-&gt;ds;</div><div class='add'>+	int upstream_port;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	upstream_port = dsa_upstream_port(ds, port);</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;port_set_upstream_port) {</div><div class='add'>+		err = chip-&gt;info-&gt;ops-&gt;port_set_upstream_port(chip, port,</div><div class='add'>+							      upstream_port);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (port == upstream_port) {</div><div class='add'>+		if (chip-&gt;info-&gt;ops-&gt;set_cpu_port) {</div><div class='add'>+			err = chip-&gt;info-&gt;ops-&gt;set_cpu_port(chip,</div><div class='add'>+							    upstream_port);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_set_egress_port(chip,</div><div class='add'>+						MV88E6XXX_EGRESS_DIR_INGRESS,</div><div class='add'>+						upstream_port);</div><div class='add'>+		if (err &amp;&amp; err != -EOPNOTSUPP)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_set_egress_port(chip,</div><div class='add'>+						MV88E6XXX_EGRESS_DIR_EGRESS,</div><div class='add'>+						upstream_port);</div><div class='add'>+		if (err &amp;&amp; err != -EOPNOTSUPP)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_setup_port(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	struct device_node *phy_handle = NULL;</div><div class='add'>+	struct fwnode_handle *ports_fwnode;</div><div class='add'>+	struct fwnode_handle *port_fwnode;</div><div class='add'>+	struct dsa_switch *ds = chip-&gt;ds;</div><div class='add'>+	struct mv88e6xxx_port *p;</div><div class='add'>+	struct dsa_port *dp;</div><div class='add'>+	int tx_amp;</div><div class='add'>+	int err;</div><div class='add'>+	u16 reg;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	p = &amp;chip-&gt;ports[port];</div><div class='add'>+	p-&gt;chip = chip;</div><div class='add'>+	p-&gt;port = port;</div><div class='add'>+</div><div class='add'>+	/* Look up corresponding fwnode if any */</div><div class='add'>+	ports_fwnode = device_get_named_child_node(chip-&gt;dev, "ethernet-ports");</div><div class='add'>+	if (!ports_fwnode)</div><div class='add'>+		ports_fwnode = device_get_named_child_node(chip-&gt;dev, "ports");</div><div class='add'>+	if (ports_fwnode) {</div><div class='add'>+		fwnode_for_each_child_node(ports_fwnode, port_fwnode) {</div><div class='add'>+			if (fwnode_property_read_u32(port_fwnode, "reg", &amp;val))</div><div class='add'>+				continue;</div><div class='add'>+			if (val == port) {</div><div class='add'>+				p-&gt;fwnode = port_fwnode;</div><div class='add'>+				p-&gt;fiber = fwnode_property_present(port_fwnode, "sfp");</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		fwnode_handle_put(ports_fwnode);</div><div class='add'>+	} else {</div><div class='add'>+		dev_dbg(chip-&gt;dev, "no ethernet ports node defined for the device\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;port_setup_leds) {</div><div class='add'>+		err = chip-&gt;info-&gt;ops-&gt;port_setup_leds(chip, port);</div><div class='add'>+		if (err &amp;&amp; err != -EOPNOTSUPP)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_setup_mac(chip, port, LINK_UNFORCED,</div><div class='add'>+				       SPEED_UNFORCED, DUPLEX_UNFORCED,</div><div class='add'>+				       PAUSE_ON, PHY_INTERFACE_MODE_NA);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Port Control: disable Drop-on-Unlock, disable Drop-on-Lock,</div><div class='add'>+	 * disable Header mode, enable IGMP/MLD snooping, disable VLAN</div><div class='add'>+	 * tunneling, determine priority by looking at 802.1p and IP</div><div class='add'>+	 * priority fields (IP prio has precedence), and set STP state</div><div class='add'>+	 * to Forwarding.</div><div class='add'>+	 *</div><div class='add'>+	 * If this is the CPU link, use DSA or EDSA tagging depending</div><div class='add'>+	 * on which tagging mode was configured.</div><div class='add'>+	 *</div><div class='add'>+	 * If this is a link to another switch, use DSA tagging mode.</div><div class='add'>+	 *</div><div class='add'>+	 * If this is the upstream port for this switch, enable</div><div class='add'>+	 * forwarding of unknown unicasts and multicasts.</div><div class='add'>+	 */</div><div class='add'>+	reg = MV88E6185_PORT_CTL0_USE_TAG | MV88E6185_PORT_CTL0_USE_IP |</div><div class='add'>+		MV88E6XXX_PORT_CTL0_STATE_FORWARDING;</div><div class='add'>+	/* Forward any IPv4 IGMP or IPv6 MLD frames received</div><div class='add'>+	 * by a USER port to the CPU port to allow snooping.</div><div class='add'>+	 */</div><div class='add'>+	if (dsa_is_user_port(ds, port))</div><div class='add'>+		reg |= MV88E6XXX_PORT_CTL0_IGMP_MLD_SNOOP;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL0, reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_setup_port_mode(chip, port);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_setup_egress_floods(chip, port);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Port Control 2: don't force a good FCS, set the MTU size to</div><div class='add'>+	 * 10222 bytes, disable 802.1q tags checking, don't discard</div><div class='add'>+	 * tagged or untagged frames on this port, skip destination</div><div class='add'>+	 * address lookup on user ports, disable ARP mirroring and don't</div><div class='add'>+	 * send a copy of all transmitted/received frames on this port</div><div class='add'>+	 * to the CPU.</div><div class='add'>+	 */</div><div class='add'>+	err = mv88e6xxx_port_set_map_da(chip, port, !dsa_is_user_port(ds, port));</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_setup_upstream_port(chip, port);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* On chips that support it, set all downstream DSA ports'</div><div class='add'>+	 * VLAN policy to TRAP. In combination with loading</div><div class='add'>+	 * MV88E6XXX_VID_STANDALONE as a policy entry in the VTU, this</div><div class='add'>+	 * provides a better isolation barrier between standalone</div><div class='add'>+	 * ports, as the ATU is bypassed on any intermediate switches</div><div class='add'>+	 * between the incoming port and the CPU.</div><div class='add'>+	 */</div><div class='add'>+	if (dsa_is_downstream_port(ds, port) &amp;&amp;</div><div class='add'>+	    chip-&gt;info-&gt;ops-&gt;port_set_policy) {</div><div class='add'>+		err = chip-&gt;info-&gt;ops-&gt;port_set_policy(chip, port,</div><div class='add'>+						MV88E6XXX_POLICY_MAPPING_VTU,</div><div class='add'>+						MV88E6XXX_POLICY_ACTION_TRAP);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* User ports start out in standalone mode and 802.1Q is</div><div class='add'>+	 * therefore disabled. On DSA ports, all valid VIDs are always</div><div class='add'>+	 * loaded in the VTU - therefore, enable 802.1Q in order to take</div><div class='add'>+	 * advantage of VLAN policy on chips that supports it.</div><div class='add'>+	 */</div><div class='add'>+	err = mv88e6xxx_port_set_8021q_mode(chip, port,</div><div class='add'>+				dsa_is_user_port(ds, port) ?</div><div class='add'>+				MV88E6XXX_PORT_CTL2_8021Q_MODE_DISABLED :</div><div class='add'>+				MV88E6XXX_PORT_CTL2_8021Q_MODE_SECURE);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Bind MV88E6XXX_VID_STANDALONE to MV88E6XXX_FID_STANDALONE by</div><div class='add'>+	 * virtue of the fact that mv88e6xxx_atu_new() will pick it as</div><div class='add'>+	 * the first free FID. This will be used as the private PVID for</div><div class='add'>+	 * unbridged ports. Shared (DSA and CPU) ports must also be</div><div class='add'>+	 * members of this VID, in order to trap all frames assigned to</div><div class='add'>+	 * it to the CPU.</div><div class='add'>+	 */</div><div class='add'>+	err = mv88e6xxx_port_vlan_join(chip, port, MV88E6XXX_VID_STANDALONE,</div><div class='add'>+				       MV88E6XXX_G1_VTU_DATA_MEMBER_TAG_UNMODIFIED,</div><div class='add'>+				       false);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Associate MV88E6XXX_VID_BRIDGED with MV88E6XXX_FID_BRIDGED in the</div><div class='add'>+	 * ATU by virtue of the fact that mv88e6xxx_atu_new() will pick it as</div><div class='add'>+	 * the first free FID after MV88E6XXX_FID_STANDALONE. This will be used</div><div class='add'>+	 * as the private PVID on ports under a VLAN-unaware bridge.</div><div class='add'>+	 * Shared (DSA and CPU) ports must also be members of it, to translate</div><div class='add'>+	 * the VID from the DSA tag into MV88E6XXX_FID_BRIDGED, instead of</div><div class='add'>+	 * relying on their port default FID.</div><div class='add'>+	 */</div><div class='add'>+	err = mv88e6xxx_port_vlan_join(chip, port, MV88E6XXX_VID_BRIDGED,</div><div class='add'>+				       MV88E6XXX_G1_VTU_DATA_MEMBER_TAG_UNMODIFIED,</div><div class='add'>+				       false);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;port_set_jumbo_size) {</div><div class='add'>+		err = chip-&gt;info-&gt;ops-&gt;port_set_jumbo_size(chip, port, 10218);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Port Association Vector: disable automatic address learning</div><div class='add'>+	 * on all user ports since they start out in standalone</div><div class='add'>+	 * mode. When joining a bridge, learning will be configured to</div><div class='add'>+	 * match the bridge port settings. Enable learning on all</div><div class='add'>+	 * DSA/CPU ports. NOTE: FROM_CPU frames always bypass the</div><div class='add'>+	 * learning process.</div><div class='add'>+	 *</div><div class='add'>+	 * Disable HoldAt1, IntOnAgeOut, LockedPort, IgnoreWrongData,</div><div class='add'>+	 * and RefreshLocked. I.e. setup standard automatic learning.</div><div class='add'>+	 */</div><div class='add'>+	if (dsa_is_user_port(ds, port))</div><div class='add'>+		reg = 0;</div><div class='add'>+	else</div><div class='add'>+		reg = 1 &lt;&lt; port;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_ASSOC_VECTOR,</div><div class='add'>+				   reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Egress rate control 2: disable egress rate control. */</div><div class='add'>+	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_EGRESS_RATE_CTL2,</div><div class='add'>+				   0x0000);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;port_pause_limit) {</div><div class='add'>+		err = chip-&gt;info-&gt;ops-&gt;port_pause_limit(chip, port, 0, 0);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;port_disable_learn_limit) {</div><div class='add'>+		err = chip-&gt;info-&gt;ops-&gt;port_disable_learn_limit(chip, port);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;port_disable_pri_override) {</div><div class='add'>+		err = chip-&gt;info-&gt;ops-&gt;port_disable_pri_override(chip, port);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;port_tag_remap) {</div><div class='add'>+		err = chip-&gt;info-&gt;ops-&gt;port_tag_remap(chip, port);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;port_egress_rate_limiting) {</div><div class='add'>+		err = chip-&gt;info-&gt;ops-&gt;port_egress_rate_limiting(chip, port);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;port_setup_message_port) {</div><div class='add'>+		err = chip-&gt;info-&gt;ops-&gt;port_setup_message_port(chip, port);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;serdes_set_tx_amplitude) {</div><div class='add'>+		dp = dsa_to_port(ds, port);</div><div class='add'>+		if (dp)</div><div class='add'>+			phy_handle = of_parse_phandle(dp-&gt;dn, "phy-handle", 0);</div><div class='add'>+</div><div class='add'>+		if (phy_handle &amp;&amp; !of_property_read_u32(phy_handle,</div><div class='add'>+							"tx-p2p-microvolt",</div><div class='add'>+							&amp;tx_amp))</div><div class='add'>+			err = chip-&gt;info-&gt;ops-&gt;serdes_set_tx_amplitude(chip,</div><div class='add'>+								port, tx_amp);</div><div class='add'>+		if (phy_handle) {</div><div class='add'>+			of_node_put(phy_handle);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Port based VLAN map: give each port the same default address</div><div class='add'>+	 * database, and allow bidirectional communication between the</div><div class='add'>+	 * CPU and DSA port(s), and the other ports.</div><div class='add'>+	 */</div><div class='add'>+	err = mv88e6xxx_port_set_fid(chip, port, MV88E6XXX_FID_STANDALONE);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_vlan_map(chip, port);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Default VLAN ID and priority: don't set a default VLAN</div><div class='add'>+	 * ID, and set the default packet priority to zero.</div><div class='add'>+	 */</div><div class='add'>+	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_DEFAULT_VLAN, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_get_max_mtu(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;port_set_jumbo_size)</div><div class='add'>+		return 10240 - VLAN_ETH_HLEN - EDSA_HLEN - ETH_FCS_LEN;</div><div class='add'>+	else if (chip-&gt;info-&gt;ops-&gt;set_max_frame_size)</div><div class='add'>+		return 1632 - VLAN_ETH_HLEN - EDSA_HLEN - ETH_FCS_LEN;</div><div class='add'>+	return ETH_DATA_LEN;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_change_mtu(struct dsa_switch *ds, int port, int new_mtu)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	/* For families where we don't know how to alter the MTU,</div><div class='add'>+	 * just accept any value up to ETH_DATA_LEN</div><div class='add'>+	 */</div><div class='add'>+	if (!chip-&gt;info-&gt;ops-&gt;port_set_jumbo_size &amp;&amp;</div><div class='add'>+	    !chip-&gt;info-&gt;ops-&gt;set_max_frame_size) {</div><div class='add'>+		if (new_mtu &gt; ETH_DATA_LEN)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (dsa_is_dsa_port(ds, port) || dsa_is_cpu_port(ds, port))</div><div class='add'>+		new_mtu += EDSA_HLEN;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;port_set_jumbo_size)</div><div class='add'>+		ret = chip-&gt;info-&gt;ops-&gt;port_set_jumbo_size(chip, port, new_mtu);</div><div class='add'>+	else if (chip-&gt;info-&gt;ops-&gt;set_max_frame_size &amp;&amp;</div><div class='add'>+		 dsa_is_cpu_port(ds, port))</div><div class='add'>+		ret = chip-&gt;info-&gt;ops-&gt;set_max_frame_size(chip, new_mtu);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_set_ageing_time(struct dsa_switch *ds,</div><div class='add'>+				     unsigned int ageing_time)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	err = mv88e6xxx_g1_atu_set_age_time(chip, ageing_time);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_stats_setup(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Initialize the statistics unit */</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;stats_set_histogram) {</div><div class='add'>+		err = chip-&gt;info-&gt;ops-&gt;stats_set_histogram(chip);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_stats_clear(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6320_setup_errata(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	u16 dummy;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Workaround for erratum</div><div class='add'>+	 *   3.3 RGMII timing may be out of spec when transmit delay is enabled</div><div class='add'>+	 */</div><div class='add'>+	err = mv88e6xxx_port_hidden_write(chip, 0, 0xf, 0x7, 0xe000);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_hidden_read(chip, 0, 0xf, 0x7, &amp;dummy);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Check if the errata has already been applied. */</div><div class='add'>+static bool mv88e6390_setup_errata_applied(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int port;</div><div class='add'>+	int err;</div><div class='add'>+	u16 val;</div><div class='add'>+</div><div class='add'>+	for (port = 0; port &lt; mv88e6xxx_num_ports(chip); port++) {</div><div class='add'>+		err = mv88e6xxx_port_hidden_read(chip, 0xf, port, 0, &amp;val);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(chip-&gt;dev,</div><div class='add'>+				"Error reading hidden register: %d\n", err);</div><div class='add'>+			return false;</div><div class='add'>+		}</div><div class='add'>+		if (val != 0x01c0)</div><div class='add'>+			return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The 6390 copper ports have an errata which require poking magic</div><div class='add'>+ * values into undocumented hidden registers and then performing a</div><div class='add'>+ * software reset.</div><div class='add'>+ */</div><div class='add'>+static int mv88e6390_setup_errata(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int port;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (mv88e6390_setup_errata_applied(chip))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Set the ports into blocking mode */</div><div class='add'>+	for (port = 0; port &lt; mv88e6xxx_num_ports(chip); port++) {</div><div class='add'>+		err = mv88e6xxx_port_set_state(chip, port, BR_STATE_DISABLED);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (port = 0; port &lt; mv88e6xxx_num_ports(chip); port++) {</div><div class='add'>+		err = mv88e6xxx_port_hidden_write(chip, 0xf, port, 0, 0x01c0);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_software_reset(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* prod_id for switch families which do not have a PHY model number */</div><div class='add'>+static const u16 family_prod_id_table[] = {</div><div class='add'>+	[MV88E6XXX_FAMILY_6341] = MV88E6XXX_PORT_SWITCH_ID_PROD_6341,</div><div class='add'>+	[MV88E6XXX_FAMILY_6390] = MV88E6XXX_PORT_SWITCH_ID_PROD_6390,</div><div class='add'>+	[MV88E6XXX_FAMILY_6393] = MV88E6XXX_PORT_SWITCH_ID_PROD_6393X,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_mdio_read(struct mii_bus *bus, int phy, int reg)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_mdio_bus *mdio_bus = bus-&gt;priv;</div><div class='add'>+	struct mv88e6xxx_chip *chip = mdio_bus-&gt;chip;</div><div class='add'>+	u16 prod_id;</div><div class='add'>+	u16 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!chip-&gt;info-&gt;ops-&gt;phy_read)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	err = chip-&gt;info-&gt;ops-&gt;phy_read(chip, bus, phy, reg, &amp;val);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	/* Some internal PHYs don't have a model number. */</div><div class='add'>+	if (reg == MII_PHYSID2 &amp;&amp; !(val &amp; 0x3f0) &amp;&amp;</div><div class='add'>+	    chip-&gt;info-&gt;family &lt; ARRAY_SIZE(family_prod_id_table)) {</div><div class='add'>+		prod_id = family_prod_id_table[chip-&gt;info-&gt;family];</div><div class='add'>+		if (prod_id)</div><div class='add'>+			val |= prod_id &gt;&gt; 4;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err ? err : val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_mdio_read_c45(struct mii_bus *bus, int phy, int devad,</div><div class='add'>+				   int reg)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_mdio_bus *mdio_bus = bus-&gt;priv;</div><div class='add'>+	struct mv88e6xxx_chip *chip = mdio_bus-&gt;chip;</div><div class='add'>+	u16 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!chip-&gt;info-&gt;ops-&gt;phy_read_c45)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	err = chip-&gt;info-&gt;ops-&gt;phy_read_c45(chip, bus, phy, devad, reg, &amp;val);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return err ? err : val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_mdio_write(struct mii_bus *bus, int phy, int reg, u16 val)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_mdio_bus *mdio_bus = bus-&gt;priv;</div><div class='add'>+	struct mv88e6xxx_chip *chip = mdio_bus-&gt;chip;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!chip-&gt;info-&gt;ops-&gt;phy_write)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	err = chip-&gt;info-&gt;ops-&gt;phy_write(chip, bus, phy, reg, val);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_mdio_write_c45(struct mii_bus *bus, int phy, int devad,</div><div class='add'>+				    int reg, u16 val)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_mdio_bus *mdio_bus = bus-&gt;priv;</div><div class='add'>+	struct mv88e6xxx_chip *chip = mdio_bus-&gt;chip;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!chip-&gt;info-&gt;ops-&gt;phy_write_c45)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	err = chip-&gt;info-&gt;ops-&gt;phy_write_c45(chip, bus, phy, devad, reg, val);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_mdio_register(struct mv88e6xxx_chip *chip,</div><div class='add'>+				   struct device_node *np,</div><div class='add'>+				   bool external)</div><div class='add'>+{</div><div class='add'>+	static int index;</div><div class='add'>+	struct mv88e6xxx_mdio_bus *mdio_bus;</div><div class='add'>+	struct mii_bus *bus;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (external) {</div><div class='add'>+		mv88e6xxx_reg_lock(chip);</div><div class='add'>+		if (chip-&gt;info-&gt;family == MV88E6XXX_FAMILY_6393)</div><div class='add'>+			err = mv88e6393x_g2_scratch_gpio_set_smi(chip, true);</div><div class='add'>+		else</div><div class='add'>+			err = mv88e6390_g2_scratch_gpio_set_smi(chip, true);</div><div class='add'>+		mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bus = mdiobus_alloc_size(sizeof(*mdio_bus));</div><div class='add'>+	if (!bus)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mdio_bus = bus-&gt;priv;</div><div class='add'>+	mdio_bus-&gt;bus = bus;</div><div class='add'>+	mdio_bus-&gt;chip = chip;</div><div class='add'>+	INIT_LIST_HEAD(&amp;mdio_bus-&gt;list);</div><div class='add'>+	mdio_bus-&gt;external = external;</div><div class='add'>+</div><div class='add'>+	if (np) {</div><div class='add'>+		bus-&gt;name = np-&gt;full_name;</div><div class='add'>+		snprintf(bus-&gt;id, MII_BUS_ID_SIZE, "%pOF", np);</div><div class='add'>+	} else {</div><div class='add'>+		bus-&gt;name = "mv88e6xxx SMI";</div><div class='add'>+		snprintf(bus-&gt;id, MII_BUS_ID_SIZE, "mv88e6xxx-%d", index++);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bus-&gt;read = mv88e6xxx_mdio_read;</div><div class='add'>+	bus-&gt;write = mv88e6xxx_mdio_write;</div><div class='add'>+	bus-&gt;read_c45 = mv88e6xxx_mdio_read_c45;</div><div class='add'>+	bus-&gt;write_c45 = mv88e6xxx_mdio_write_c45;</div><div class='add'>+	bus-&gt;parent = chip-&gt;dev;</div><div class='add'>+	bus-&gt;phy_mask = ~GENMASK(chip-&gt;info-&gt;phy_base_addr +</div><div class='add'>+				 mv88e6xxx_num_ports(chip) - 1,</div><div class='add'>+				 chip-&gt;info-&gt;phy_base_addr);</div><div class='add'>+</div><div class='add'>+	if (!external) {</div><div class='add'>+		err = mv88e6xxx_g2_irq_mdio_setup(chip, bus);</div><div class='add'>+		if (err)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = of_mdiobus_register(bus, np);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(chip-&gt;dev, "Cannot register MDIO bus (%d)\n", err);</div><div class='add'>+		mv88e6xxx_g2_irq_mdio_free(chip, bus);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (external)</div><div class='add'>+		list_add_tail(&amp;mdio_bus-&gt;list, &amp;chip-&gt;mdios);</div><div class='add'>+	else</div><div class='add'>+		list_add(&amp;mdio_bus-&gt;list, &amp;chip-&gt;mdios);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mdiobus_free(bus);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_mdios_unregister(struct mv88e6xxx_chip *chip)</div><div class='add'>+</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_mdio_bus *mdio_bus, *p;</div><div class='add'>+	struct mii_bus *bus;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_safe(mdio_bus, p, &amp;chip-&gt;mdios, list) {</div><div class='add'>+		bus = mdio_bus-&gt;bus;</div><div class='add'>+</div><div class='add'>+		if (!mdio_bus-&gt;external)</div><div class='add'>+			mv88e6xxx_g2_irq_mdio_free(chip, bus);</div><div class='add'>+</div><div class='add'>+		mdiobus_unregister(bus);</div><div class='add'>+		mdiobus_free(bus);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_mdios_register(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	struct device_node *np = chip-&gt;dev-&gt;of_node;</div><div class='add'>+	struct device_node *child;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Always register one mdio bus for the internal/default mdio</div><div class='add'>+	 * bus. This maybe represented in the device tree, but is</div><div class='add'>+	 * optional.</div><div class='add'>+	 */</div><div class='add'>+	child = of_get_child_by_name(np, "mdio");</div><div class='add'>+	err = mv88e6xxx_mdio_register(chip, child, false);</div><div class='add'>+	of_node_put(child);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Walk the device tree, and see if there are any other nodes</div><div class='add'>+	 * which say they are compatible with the external mdio</div><div class='add'>+	 * bus.</div><div class='add'>+	 */</div><div class='add'>+	for_each_available_child_of_node(np, child) {</div><div class='add'>+		if (of_device_is_compatible(</div><div class='add'>+			    child, "marvell,mv88e6xxx-mdio-external")) {</div><div class='add'>+			err = mv88e6xxx_mdio_register(chip, child, true);</div><div class='add'>+			if (err) {</div><div class='add'>+				mv88e6xxx_mdios_unregister(chip);</div><div class='add'>+				of_node_put(child);</div><div class='add'>+				return err;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_teardown(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_teardown_devlink_params(ds);</div><div class='add'>+	dsa_devlink_resources_unregister(ds);</div><div class='add'>+	mv88e6xxx_teardown_devlink_regions_global(ds);</div><div class='add'>+	mv88e6xxx_hwtstamp_free(chip);</div><div class='add'>+	mv88e6xxx_ptp_free(chip);</div><div class='add'>+	mv88e6xxx_mdios_unregister(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_setup(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	u8 cmode;</div><div class='add'>+	int err;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_mdios_register(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	chip-&gt;ds = ds;</div><div class='add'>+	ds-&gt;user_mii_bus = mv88e6xxx_default_mdio_bus(chip);</div><div class='add'>+</div><div class='add'>+	/* Since virtual bridges are mapped in the PVT, the number we support</div><div class='add'>+	 * depends on the physical switch topology. We need to let DSA figure</div><div class='add'>+	 * that out and therefore we cannot set this at dsa_register_switch()</div><div class='add'>+	 * time.</div><div class='add'>+	 */</div><div class='add'>+	if (mv88e6xxx_has_pvt(chip))</div><div class='add'>+		ds-&gt;max_num_bridges = MV88E6XXX_MAX_PVT_SWITCHES -</div><div class='add'>+				      ds-&gt;dst-&gt;last_switch - 1;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;setup_errata) {</div><div class='add'>+		err = chip-&gt;info-&gt;ops-&gt;setup_errata(chip);</div><div class='add'>+		if (err)</div><div class='add'>+			goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Cache the cmode of each port. */</div><div class='add'>+	for (i = 0; i &lt; mv88e6xxx_num_ports(chip); i++) {</div><div class='add'>+		if (chip-&gt;info-&gt;ops-&gt;port_get_cmode) {</div><div class='add'>+			err = chip-&gt;info-&gt;ops-&gt;port_get_cmode(chip, i, &amp;cmode);</div><div class='add'>+			if (err)</div><div class='add'>+				goto unlock;</div><div class='add'>+</div><div class='add'>+			chip-&gt;ports[i].cmode = cmode;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_vtu_setup(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	/* Must be called after mv88e6xxx_vtu_setup (which flushes the</div><div class='add'>+	 * VTU, thereby also flushing the STU).</div><div class='add'>+	 */</div><div class='add'>+	err = mv88e6xxx_stu_setup(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	/* Setup Switch Port Registers */</div><div class='add'>+	for (i = 0; i &lt; mv88e6xxx_num_ports(chip); i++) {</div><div class='add'>+		if (dsa_is_unused_port(ds, i))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* Prevent the use of an invalid port. */</div><div class='add'>+		if (mv88e6xxx_is_invalid_port(chip, i)) {</div><div class='add'>+			dev_err(chip-&gt;dev, "port %d is invalid\n", i);</div><div class='add'>+			err = -EINVAL;</div><div class='add'>+			goto unlock;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_setup_port(chip, i);</div><div class='add'>+		if (err)</div><div class='add'>+			goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_irl_setup(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_mac_setup(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_phy_setup(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_pvt_setup(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_atu_setup(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_broadcast_setup(chip, 0);</div><div class='add'>+	if (err)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_pot_setup(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_rmu_setup(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_rsvd2cpu_setup(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_trunk_setup(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_devmap_setup(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_pri_setup(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	/* Setup PTP Hardware Clock and timestamping */</div><div class='add'>+	if (chip-&gt;info-&gt;ptp_support) {</div><div class='add'>+		err = mv88e6xxx_ptp_setup(chip);</div><div class='add'>+		if (err)</div><div class='add'>+			goto unlock;</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_hwtstamp_setup(chip);</div><div class='add'>+		if (err)</div><div class='add'>+			goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_stats_setup(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_hwtstamp;</div><div class='add'>+</div><div class='add'>+	/* Have to be called without holding the register lock, since</div><div class='add'>+	 * they take the devlink lock, and we later take the locks in</div><div class='add'>+	 * the reverse order when getting/setting parameters or</div><div class='add'>+	 * resource occupancy.</div><div class='add'>+	 */</div><div class='add'>+	err = mv88e6xxx_setup_devlink_resources(ds);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_hwtstamp;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_setup_devlink_params(ds);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_resources;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_setup_devlink_regions_global(ds);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_params;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_params:</div><div class='add'>+	mv88e6xxx_teardown_devlink_params(ds);</div><div class='add'>+out_resources:</div><div class='add'>+	dsa_devlink_resources_unregister(ds);</div><div class='add'>+out_hwtstamp:</div><div class='add'>+	mv88e6xxx_hwtstamp_free(chip);</div><div class='add'>+	mv88e6xxx_ptp_free(chip);</div><div class='add'>+	mv88e6xxx_mdios_unregister(chip);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_setup(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;pcs_ops &amp;&amp;</div><div class='add'>+	    chip-&gt;info-&gt;ops-&gt;pcs_ops-&gt;pcs_init) {</div><div class='add'>+		err = chip-&gt;info-&gt;ops-&gt;pcs_ops-&gt;pcs_init(chip, port);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_setup_devlink_regions_port(ds, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_port_teardown(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_teardown_devlink_regions_port(ds, port);</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;pcs_ops &amp;&amp;</div><div class='add'>+	    chip-&gt;info-&gt;ops-&gt;pcs_ops-&gt;pcs_teardown)</div><div class='add'>+		chip-&gt;info-&gt;ops-&gt;pcs_ops-&gt;pcs_teardown(chip, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_get_eeprom_len(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return chip-&gt;eeprom_len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_get_eeprom(struct dsa_switch *ds,</div><div class='add'>+				struct ethtool_eeprom *eeprom, u8 *data)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!chip-&gt;info-&gt;ops-&gt;get_eeprom)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	err = chip-&gt;info-&gt;ops-&gt;get_eeprom(chip, eeprom, data);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	eeprom-&gt;magic = 0xc3ec4951;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_set_eeprom(struct dsa_switch *ds,</div><div class='add'>+				struct ethtool_eeprom *eeprom, u8 *data)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!chip-&gt;info-&gt;ops-&gt;set_eeprom)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (eeprom-&gt;magic != 0xc3ec4951)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	err = chip-&gt;info-&gt;ops-&gt;set_eeprom(chip, eeprom, data);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct mv88e6xxx_ops mv88e6085_ops = {</div><div class='add'>+	/* MV88E6XXX_FAMILY_6097 */</div><div class='add'>+	.ieee_pri_map = mv88e6085_g1_ieee_pri_map,</div><div class='add'>+	.ip_pri_map = mv88e6085_g1_ip_pri_map,</div><div class='add'>+	.irl_init_all = mv88e6352_g2_irl_init_all,</div><div class='add'>+	.set_switch_mac = mv88e6xxx_g1_set_switch_mac,</div><div class='add'>+	.phy_read = mv88e6185_phy_ppu_read,</div><div class='add'>+	.phy_write = mv88e6185_phy_ppu_write,</div><div class='add'>+	.port_set_link = mv88e6xxx_port_set_link,</div><div class='add'>+	.port_sync_link = mv88e6xxx_port_sync_link,</div><div class='add'>+	.port_set_speed_duplex = mv88e6185_port_set_speed_duplex,</div><div class='add'>+	.port_tag_remap = mv88e6095_port_tag_remap,</div><div class='add'>+	.port_set_policy = mv88e6352_port_set_policy,</div><div class='add'>+	.port_set_frame_mode = mv88e6351_port_set_frame_mode,</div><div class='add'>+	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,</div><div class='add'>+	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,</div><div class='add'>+	.port_set_ether_type = mv88e6351_port_set_ether_type,</div><div class='add'>+	.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,</div><div class='add'>+	.port_pause_limit = mv88e6097_port_pause_limit,</div><div class='add'>+	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,</div><div class='add'>+	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,</div><div class='add'>+	.port_get_cmode = mv88e6185_port_get_cmode,</div><div class='add'>+	.port_setup_message_port = mv88e6xxx_setup_message_port,</div><div class='add'>+	.stats_snapshot = mv88e6xxx_g1_stats_snapshot,</div><div class='add'>+	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,</div><div class='add'>+	.stats_get_sset_count = mv88e6095_stats_get_sset_count,</div><div class='add'>+	.stats_get_strings = mv88e6095_stats_get_strings,</div><div class='add'>+	.stats_get_stat = mv88e6095_stats_get_stat,</div><div class='add'>+	.set_cpu_port = mv88e6095_g1_set_cpu_port,</div><div class='add'>+	.set_egress_port = mv88e6095_g1_set_egress_port,</div><div class='add'>+	.watchdog_ops = &amp;mv88e6097_watchdog_ops,</div><div class='add'>+	.mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu,</div><div class='add'>+	.pot_clear = mv88e6xxx_g2_pot_clear,</div><div class='add'>+	.ppu_enable = mv88e6185_g1_ppu_enable,</div><div class='add'>+	.ppu_disable = mv88e6185_g1_ppu_disable,</div><div class='add'>+	.reset = mv88e6185_g1_reset,</div><div class='add'>+	.rmu_disable = mv88e6085_g1_rmu_disable,</div><div class='add'>+	.vtu_getnext = mv88e6352_g1_vtu_getnext,</div><div class='add'>+	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,</div><div class='add'>+	.stu_getnext = mv88e6352_g1_stu_getnext,</div><div class='add'>+	.stu_loadpurge = mv88e6352_g1_stu_loadpurge,</div><div class='add'>+	.phylink_get_caps = mv88e6185_phylink_get_caps,</div><div class='add'>+	.set_max_frame_size = mv88e6185_g1_set_max_frame_size,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct mv88e6xxx_ops mv88e6095_ops = {</div><div class='add'>+	/* MV88E6XXX_FAMILY_6095 */</div><div class='add'>+	.ieee_pri_map = mv88e6085_g1_ieee_pri_map,</div><div class='add'>+	.ip_pri_map = mv88e6085_g1_ip_pri_map,</div><div class='add'>+	.set_switch_mac = mv88e6xxx_g1_set_switch_mac,</div><div class='add'>+	.phy_read = mv88e6185_phy_ppu_read,</div><div class='add'>+	.phy_write = mv88e6185_phy_ppu_write,</div><div class='add'>+	.port_set_link = mv88e6xxx_port_set_link,</div><div class='add'>+	.port_sync_link = mv88e6185_port_sync_link,</div><div class='add'>+	.port_set_speed_duplex = mv88e6185_port_set_speed_duplex,</div><div class='add'>+	.port_set_frame_mode = mv88e6085_port_set_frame_mode,</div><div class='add'>+	.port_set_ucast_flood = mv88e6185_port_set_forward_unknown,</div><div class='add'>+	.port_set_mcast_flood = mv88e6185_port_set_default_forward,</div><div class='add'>+	.port_set_upstream_port = mv88e6095_port_set_upstream_port,</div><div class='add'>+	.port_get_cmode = mv88e6185_port_get_cmode,</div><div class='add'>+	.port_setup_message_port = mv88e6xxx_setup_message_port,</div><div class='add'>+	.stats_snapshot = mv88e6xxx_g1_stats_snapshot,</div><div class='add'>+	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,</div><div class='add'>+	.stats_get_sset_count = mv88e6095_stats_get_sset_count,</div><div class='add'>+	.stats_get_strings = mv88e6095_stats_get_strings,</div><div class='add'>+	.stats_get_stat = mv88e6095_stats_get_stat,</div><div class='add'>+	.mgmt_rsvd2cpu = mv88e6185_g2_mgmt_rsvd2cpu,</div><div class='add'>+	.ppu_enable = mv88e6185_g1_ppu_enable,</div><div class='add'>+	.ppu_disable = mv88e6185_g1_ppu_disable,</div><div class='add'>+	.reset = mv88e6185_g1_reset,</div><div class='add'>+	.vtu_getnext = mv88e6185_g1_vtu_getnext,</div><div class='add'>+	.vtu_loadpurge = mv88e6185_g1_vtu_loadpurge,</div><div class='add'>+	.phylink_get_caps = mv88e6095_phylink_get_caps,</div><div class='add'>+	.pcs_ops = &amp;mv88e6185_pcs_ops,</div><div class='add'>+	.set_max_frame_size = mv88e6185_g1_set_max_frame_size,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct mv88e6xxx_ops mv88e6097_ops = {</div><div class='add'>+	/* MV88E6XXX_FAMILY_6097 */</div><div class='add'>+	.ieee_pri_map = mv88e6085_g1_ieee_pri_map,</div><div class='add'>+	.ip_pri_map = mv88e6085_g1_ip_pri_map,</div><div class='add'>+	.irl_init_all = mv88e6352_g2_irl_init_all,</div><div class='add'>+	.set_switch_mac = mv88e6xxx_g2_set_switch_mac,</div><div class='add'>+	.phy_read = mv88e6xxx_g2_smi_phy_read_c22,</div><div class='add'>+	.phy_write = mv88e6xxx_g2_smi_phy_write_c22,</div><div class='add'>+	.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,</div><div class='add'>+	.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,</div><div class='add'>+	.port_set_link = mv88e6xxx_port_set_link,</div><div class='add'>+	.port_sync_link = mv88e6185_port_sync_link,</div><div class='add'>+	.port_set_speed_duplex = mv88e6185_port_set_speed_duplex,</div><div class='add'>+	.port_tag_remap = mv88e6095_port_tag_remap,</div><div class='add'>+	.port_set_policy = mv88e6352_port_set_policy,</div><div class='add'>+	.port_set_frame_mode = mv88e6351_port_set_frame_mode,</div><div class='add'>+	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,</div><div class='add'>+	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,</div><div class='add'>+	.port_set_ether_type = mv88e6351_port_set_ether_type,</div><div class='add'>+	.port_egress_rate_limiting = mv88e6095_port_egress_rate_limiting,</div><div class='add'>+	.port_pause_limit = mv88e6097_port_pause_limit,</div><div class='add'>+	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,</div><div class='add'>+	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,</div><div class='add'>+	.port_get_cmode = mv88e6185_port_get_cmode,</div><div class='add'>+	.port_setup_message_port = mv88e6xxx_setup_message_port,</div><div class='add'>+	.stats_snapshot = mv88e6xxx_g1_stats_snapshot,</div><div class='add'>+	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,</div><div class='add'>+	.stats_get_sset_count = mv88e6095_stats_get_sset_count,</div><div class='add'>+	.stats_get_strings = mv88e6095_stats_get_strings,</div><div class='add'>+	.stats_get_stat = mv88e6095_stats_get_stat,</div><div class='add'>+	.set_cpu_port = mv88e6095_g1_set_cpu_port,</div><div class='add'>+	.set_egress_port = mv88e6095_g1_set_egress_port,</div><div class='add'>+	.watchdog_ops = &amp;mv88e6097_watchdog_ops,</div><div class='add'>+	.mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu,</div><div class='add'>+	.serdes_irq_mapping = mv88e6390_serdes_irq_mapping,</div><div class='add'>+	.pot_clear = mv88e6xxx_g2_pot_clear,</div><div class='add'>+	.reset = mv88e6352_g1_reset,</div><div class='add'>+	.rmu_disable = mv88e6085_g1_rmu_disable,</div><div class='add'>+	.vtu_getnext = mv88e6352_g1_vtu_getnext,</div><div class='add'>+	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,</div><div class='add'>+	.phylink_get_caps = mv88e6095_phylink_get_caps,</div><div class='add'>+	.pcs_ops = &amp;mv88e6185_pcs_ops,</div><div class='add'>+	.stu_getnext = mv88e6352_g1_stu_getnext,</div><div class='add'>+	.stu_loadpurge = mv88e6352_g1_stu_loadpurge,</div><div class='add'>+	.set_max_frame_size = mv88e6185_g1_set_max_frame_size,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct mv88e6xxx_ops mv88e6123_ops = {</div><div class='add'>+	/* MV88E6XXX_FAMILY_6165 */</div><div class='add'>+	.ieee_pri_map = mv88e6085_g1_ieee_pri_map,</div><div class='add'>+	.ip_pri_map = mv88e6085_g1_ip_pri_map,</div><div class='add'>+	.irl_init_all = mv88e6352_g2_irl_init_all,</div><div class='add'>+	.set_switch_mac = mv88e6xxx_g2_set_switch_mac,</div><div class='add'>+	.phy_read = mv88e6xxx_g2_smi_phy_read_c22,</div><div class='add'>+	.phy_write = mv88e6xxx_g2_smi_phy_write_c22,</div><div class='add'>+	.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,</div><div class='add'>+	.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,</div><div class='add'>+	.port_set_link = mv88e6xxx_port_set_link,</div><div class='add'>+	.port_sync_link = mv88e6xxx_port_sync_link,</div><div class='add'>+	.port_set_speed_duplex = mv88e6185_port_set_speed_duplex,</div><div class='add'>+	.port_set_frame_mode = mv88e6085_port_set_frame_mode,</div><div class='add'>+	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,</div><div class='add'>+	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,</div><div class='add'>+	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,</div><div class='add'>+	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,</div><div class='add'>+	.port_get_cmode = mv88e6185_port_get_cmode,</div><div class='add'>+	.port_setup_message_port = mv88e6xxx_setup_message_port,</div><div class='add'>+	.stats_snapshot = mv88e6320_g1_stats_snapshot,</div><div class='add'>+	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,</div><div class='add'>+	.stats_get_sset_count = mv88e6095_stats_get_sset_count,</div><div class='add'>+	.stats_get_strings = mv88e6095_stats_get_strings,</div><div class='add'>+	.stats_get_stat = mv88e6095_stats_get_stat,</div><div class='add'>+	.set_cpu_port = mv88e6095_g1_set_cpu_port,</div><div class='add'>+	.set_egress_port = mv88e6095_g1_set_egress_port,</div><div class='add'>+	.watchdog_ops = &amp;mv88e6097_watchdog_ops,</div><div class='add'>+	.mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu,</div><div class='add'>+	.pot_clear = mv88e6xxx_g2_pot_clear,</div><div class='add'>+	.reset = mv88e6352_g1_reset,</div><div class='add'>+	.atu_get_hash = mv88e6165_g1_atu_get_hash,</div><div class='add'>+	.atu_set_hash = mv88e6165_g1_atu_set_hash,</div><div class='add'>+	.vtu_getnext = mv88e6352_g1_vtu_getnext,</div><div class='add'>+	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,</div><div class='add'>+	.stu_getnext = mv88e6352_g1_stu_getnext,</div><div class='add'>+	.stu_loadpurge = mv88e6352_g1_stu_loadpurge,</div><div class='add'>+	.phylink_get_caps = mv88e6185_phylink_get_caps,</div><div class='add'>+	.set_max_frame_size = mv88e6185_g1_set_max_frame_size,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct mv88e6xxx_ops mv88e6131_ops = {</div><div class='add'>+	/* MV88E6XXX_FAMILY_6185 */</div><div class='add'>+	.ieee_pri_map = mv88e6085_g1_ieee_pri_map,</div><div class='add'>+	.ip_pri_map = mv88e6085_g1_ip_pri_map,</div><div class='add'>+	.set_switch_mac = mv88e6xxx_g1_set_switch_mac,</div><div class='add'>+	.phy_read = mv88e6185_phy_ppu_read,</div><div class='add'>+	.phy_write = mv88e6185_phy_ppu_write,</div><div class='add'>+	.port_set_link = mv88e6xxx_port_set_link,</div><div class='add'>+	.port_sync_link = mv88e6xxx_port_sync_link,</div><div class='add'>+	.port_set_speed_duplex = mv88e6185_port_set_speed_duplex,</div><div class='add'>+	.port_tag_remap = mv88e6095_port_tag_remap,</div><div class='add'>+	.port_set_frame_mode = mv88e6351_port_set_frame_mode,</div><div class='add'>+	.port_set_ucast_flood = mv88e6185_port_set_forward_unknown,</div><div class='add'>+	.port_set_mcast_flood = mv88e6185_port_set_default_forward,</div><div class='add'>+	.port_set_ether_type = mv88e6351_port_set_ether_type,</div><div class='add'>+	.port_set_upstream_port = mv88e6095_port_set_upstream_port,</div><div class='add'>+	.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,</div><div class='add'>+	.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,</div><div class='add'>+	.port_pause_limit = mv88e6097_port_pause_limit,</div><div class='add'>+	.port_set_pause = mv88e6185_port_set_pause,</div><div class='add'>+	.port_get_cmode = mv88e6185_port_get_cmode,</div><div class='add'>+	.port_setup_message_port = mv88e6xxx_setup_message_port,</div><div class='add'>+	.stats_snapshot = mv88e6xxx_g1_stats_snapshot,</div><div class='add'>+	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,</div><div class='add'>+	.stats_get_sset_count = mv88e6095_stats_get_sset_count,</div><div class='add'>+	.stats_get_strings = mv88e6095_stats_get_strings,</div><div class='add'>+	.stats_get_stat = mv88e6095_stats_get_stat,</div><div class='add'>+	.set_cpu_port = mv88e6095_g1_set_cpu_port,</div><div class='add'>+	.set_egress_port = mv88e6095_g1_set_egress_port,</div><div class='add'>+	.watchdog_ops = &amp;mv88e6097_watchdog_ops,</div><div class='add'>+	.mgmt_rsvd2cpu = mv88e6185_g2_mgmt_rsvd2cpu,</div><div class='add'>+	.ppu_enable = mv88e6185_g1_ppu_enable,</div><div class='add'>+	.set_cascade_port = mv88e6185_g1_set_cascade_port,</div><div class='add'>+	.ppu_disable = mv88e6185_g1_ppu_disable,</div><div class='add'>+	.reset = mv88e6185_g1_reset,</div><div class='add'>+	.vtu_getnext = mv88e6185_g1_vtu_getnext,</div><div class='add'>+	.vtu_loadpurge = mv88e6185_g1_vtu_loadpurge,</div><div class='add'>+	.phylink_get_caps = mv88e6185_phylink_get_caps,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct mv88e6xxx_ops mv88e6141_ops = {</div><div class='add'>+	/* MV88E6XXX_FAMILY_6341 */</div><div class='add'>+	.ieee_pri_map = mv88e6085_g1_ieee_pri_map,</div><div class='add'>+	.ip_pri_map = mv88e6085_g1_ip_pri_map,</div><div class='add'>+	.irl_init_all = mv88e6352_g2_irl_init_all,</div><div class='add'>+	.get_eeprom = mv88e6xxx_g2_get_eeprom8,</div><div class='add'>+	.set_eeprom = mv88e6xxx_g2_set_eeprom8,</div><div class='add'>+	.set_switch_mac = mv88e6xxx_g2_set_switch_mac,</div><div class='add'>+	.phy_read = mv88e6xxx_g2_smi_phy_read_c22,</div><div class='add'>+	.phy_write = mv88e6xxx_g2_smi_phy_write_c22,</div><div class='add'>+	.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,</div><div class='add'>+	.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,</div><div class='add'>+	.port_set_link = mv88e6xxx_port_set_link,</div><div class='add'>+	.port_sync_link = mv88e6xxx_port_sync_link,</div><div class='add'>+	.port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay,</div><div class='add'>+	.port_set_speed_duplex = mv88e6341_port_set_speed_duplex,</div><div class='add'>+	.port_max_speed_mode = mv88e6341_port_max_speed_mode,</div><div class='add'>+	.port_tag_remap = mv88e6095_port_tag_remap,</div><div class='add'>+	.port_set_policy = mv88e6352_port_set_policy,</div><div class='add'>+	.port_set_frame_mode = mv88e6351_port_set_frame_mode,</div><div class='add'>+	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,</div><div class='add'>+	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,</div><div class='add'>+	.port_set_ether_type = mv88e6351_port_set_ether_type,</div><div class='add'>+	.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,</div><div class='add'>+	.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,</div><div class='add'>+	.port_pause_limit = mv88e6097_port_pause_limit,</div><div class='add'>+	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,</div><div class='add'>+	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,</div><div class='add'>+	.port_get_cmode = mv88e6352_port_get_cmode,</div><div class='add'>+	.port_set_cmode = mv88e6341_port_set_cmode,</div><div class='add'>+	.port_setup_message_port = mv88e6xxx_setup_message_port,</div><div class='add'>+	.stats_snapshot = mv88e6390_g1_stats_snapshot,</div><div class='add'>+	.stats_set_histogram = mv88e6390_g1_stats_set_histogram,</div><div class='add'>+	.stats_get_sset_count = mv88e6320_stats_get_sset_count,</div><div class='add'>+	.stats_get_strings = mv88e6320_stats_get_strings,</div><div class='add'>+	.stats_get_stat = mv88e6390_stats_get_stat,</div><div class='add'>+	.set_cpu_port = mv88e6390_g1_set_cpu_port,</div><div class='add'>+	.set_egress_port = mv88e6390_g1_set_egress_port,</div><div class='add'>+	.watchdog_ops = &amp;mv88e6390_watchdog_ops,</div><div class='add'>+	.mgmt_rsvd2cpu =  mv88e6390_g1_mgmt_rsvd2cpu,</div><div class='add'>+	.pot_clear = mv88e6xxx_g2_pot_clear,</div><div class='add'>+	.hardware_reset_pre = mv88e6xxx_g2_eeprom_wait,</div><div class='add'>+	.hardware_reset_post = mv88e6xxx_g2_eeprom_wait,</div><div class='add'>+	.reset = mv88e6352_g1_reset,</div><div class='add'>+	.rmu_disable = mv88e6390_g1_rmu_disable,</div><div class='add'>+	.atu_get_hash = mv88e6165_g1_atu_get_hash,</div><div class='add'>+	.atu_set_hash = mv88e6165_g1_atu_set_hash,</div><div class='add'>+	.vtu_getnext = mv88e6352_g1_vtu_getnext,</div><div class='add'>+	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,</div><div class='add'>+	.stu_getnext = mv88e6352_g1_stu_getnext,</div><div class='add'>+	.stu_loadpurge = mv88e6352_g1_stu_loadpurge,</div><div class='add'>+	.serdes_get_lane = mv88e6341_serdes_get_lane,</div><div class='add'>+	.serdes_irq_mapping = mv88e6390_serdes_irq_mapping,</div><div class='add'>+	.gpio_ops = &amp;mv88e6352_gpio_ops,</div><div class='add'>+	.serdes_get_sset_count = mv88e6390_serdes_get_sset_count,</div><div class='add'>+	.serdes_get_strings = mv88e6390_serdes_get_strings,</div><div class='add'>+	.serdes_get_stats = mv88e6390_serdes_get_stats,</div><div class='add'>+	.serdes_get_regs_len = mv88e6390_serdes_get_regs_len,</div><div class='add'>+	.serdes_get_regs = mv88e6390_serdes_get_regs,</div><div class='add'>+	.phylink_get_caps = mv88e6341_phylink_get_caps,</div><div class='add'>+	.pcs_ops = &amp;mv88e6390_pcs_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct mv88e6xxx_ops mv88e6161_ops = {</div><div class='add'>+	/* MV88E6XXX_FAMILY_6165 */</div><div class='add'>+	.ieee_pri_map = mv88e6085_g1_ieee_pri_map,</div><div class='add'>+	.ip_pri_map = mv88e6085_g1_ip_pri_map,</div><div class='add'>+	.irl_init_all = mv88e6352_g2_irl_init_all,</div><div class='add'>+	.set_switch_mac = mv88e6xxx_g2_set_switch_mac,</div><div class='add'>+	.phy_read = mv88e6xxx_g2_smi_phy_read_c22,</div><div class='add'>+	.phy_write = mv88e6xxx_g2_smi_phy_write_c22,</div><div class='add'>+	.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,</div><div class='add'>+	.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,</div><div class='add'>+	.port_set_link = mv88e6xxx_port_set_link,</div><div class='add'>+	.port_sync_link = mv88e6xxx_port_sync_link,</div><div class='add'>+	.port_set_speed_duplex = mv88e6185_port_set_speed_duplex,</div><div class='add'>+	.port_tag_remap = mv88e6095_port_tag_remap,</div><div class='add'>+	.port_set_policy = mv88e6352_port_set_policy,</div><div class='add'>+	.port_set_frame_mode = mv88e6351_port_set_frame_mode,</div><div class='add'>+	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,</div><div class='add'>+	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,</div><div class='add'>+	.port_set_ether_type = mv88e6351_port_set_ether_type,</div><div class='add'>+	.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,</div><div class='add'>+	.port_pause_limit = mv88e6097_port_pause_limit,</div><div class='add'>+	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,</div><div class='add'>+	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,</div><div class='add'>+	.port_get_cmode = mv88e6185_port_get_cmode,</div><div class='add'>+	.port_setup_message_port = mv88e6xxx_setup_message_port,</div><div class='add'>+	.stats_snapshot = mv88e6xxx_g1_stats_snapshot,</div><div class='add'>+	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,</div><div class='add'>+	.stats_get_sset_count = mv88e6095_stats_get_sset_count,</div><div class='add'>+	.stats_get_strings = mv88e6095_stats_get_strings,</div><div class='add'>+	.stats_get_stat = mv88e6095_stats_get_stat,</div><div class='add'>+	.set_cpu_port = mv88e6095_g1_set_cpu_port,</div><div class='add'>+	.set_egress_port = mv88e6095_g1_set_egress_port,</div><div class='add'>+	.watchdog_ops = &amp;mv88e6097_watchdog_ops,</div><div class='add'>+	.mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu,</div><div class='add'>+	.pot_clear = mv88e6xxx_g2_pot_clear,</div><div class='add'>+	.reset = mv88e6352_g1_reset,</div><div class='add'>+	.atu_get_hash = mv88e6165_g1_atu_get_hash,</div><div class='add'>+	.atu_set_hash = mv88e6165_g1_atu_set_hash,</div><div class='add'>+	.vtu_getnext = mv88e6352_g1_vtu_getnext,</div><div class='add'>+	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,</div><div class='add'>+	.stu_getnext = mv88e6352_g1_stu_getnext,</div><div class='add'>+	.stu_loadpurge = mv88e6352_g1_stu_loadpurge,</div><div class='add'>+	.avb_ops = &amp;mv88e6165_avb_ops,</div><div class='add'>+	.ptp_ops = &amp;mv88e6165_ptp_ops,</div><div class='add'>+	.phylink_get_caps = mv88e6185_phylink_get_caps,</div><div class='add'>+	.set_max_frame_size = mv88e6185_g1_set_max_frame_size,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct mv88e6xxx_ops mv88e6165_ops = {</div><div class='add'>+	/* MV88E6XXX_FAMILY_6165 */</div><div class='add'>+	.ieee_pri_map = mv88e6085_g1_ieee_pri_map,</div><div class='add'>+	.ip_pri_map = mv88e6085_g1_ip_pri_map,</div><div class='add'>+	.irl_init_all = mv88e6352_g2_irl_init_all,</div><div class='add'>+	.set_switch_mac = mv88e6xxx_g2_set_switch_mac,</div><div class='add'>+	.phy_read = mv88e6165_phy_read,</div><div class='add'>+	.phy_write = mv88e6165_phy_write,</div><div class='add'>+	.port_set_link = mv88e6xxx_port_set_link,</div><div class='add'>+	.port_sync_link = mv88e6xxx_port_sync_link,</div><div class='add'>+	.port_set_speed_duplex = mv88e6185_port_set_speed_duplex,</div><div class='add'>+	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,</div><div class='add'>+	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,</div><div class='add'>+	.port_get_cmode = mv88e6185_port_get_cmode,</div><div class='add'>+	.port_setup_message_port = mv88e6xxx_setup_message_port,</div><div class='add'>+	.stats_snapshot = mv88e6xxx_g1_stats_snapshot,</div><div class='add'>+	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,</div><div class='add'>+	.stats_get_sset_count = mv88e6095_stats_get_sset_count,</div><div class='add'>+	.stats_get_strings = mv88e6095_stats_get_strings,</div><div class='add'>+	.stats_get_stat = mv88e6095_stats_get_stat,</div><div class='add'>+	.set_cpu_port = mv88e6095_g1_set_cpu_port,</div><div class='add'>+	.set_egress_port = mv88e6095_g1_set_egress_port,</div><div class='add'>+	.watchdog_ops = &amp;mv88e6097_watchdog_ops,</div><div class='add'>+	.mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu,</div><div class='add'>+	.pot_clear = mv88e6xxx_g2_pot_clear,</div><div class='add'>+	.reset = mv88e6352_g1_reset,</div><div class='add'>+	.atu_get_hash = mv88e6165_g1_atu_get_hash,</div><div class='add'>+	.atu_set_hash = mv88e6165_g1_atu_set_hash,</div><div class='add'>+	.vtu_getnext = mv88e6352_g1_vtu_getnext,</div><div class='add'>+	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,</div><div class='add'>+	.stu_getnext = mv88e6352_g1_stu_getnext,</div><div class='add'>+	.stu_loadpurge = mv88e6352_g1_stu_loadpurge,</div><div class='add'>+	.avb_ops = &amp;mv88e6165_avb_ops,</div><div class='add'>+	.ptp_ops = &amp;mv88e6165_ptp_ops,</div><div class='add'>+	.phylink_get_caps = mv88e6185_phylink_get_caps,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct mv88e6xxx_ops mv88e6171_ops = {</div><div class='add'>+	/* MV88E6XXX_FAMILY_6351 */</div><div class='add'>+	.ieee_pri_map = mv88e6085_g1_ieee_pri_map,</div><div class='add'>+	.ip_pri_map = mv88e6085_g1_ip_pri_map,</div><div class='add'>+	.irl_init_all = mv88e6352_g2_irl_init_all,</div><div class='add'>+	.set_switch_mac = mv88e6xxx_g2_set_switch_mac,</div><div class='add'>+	.phy_read = mv88e6xxx_g2_smi_phy_read_c22,</div><div class='add'>+	.phy_write = mv88e6xxx_g2_smi_phy_write_c22,</div><div class='add'>+	.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,</div><div class='add'>+	.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,</div><div class='add'>+	.port_set_link = mv88e6xxx_port_set_link,</div><div class='add'>+	.port_sync_link = mv88e6xxx_port_sync_link,</div><div class='add'>+	.port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay,</div><div class='add'>+	.port_set_speed_duplex = mv88e6185_port_set_speed_duplex,</div><div class='add'>+	.port_tag_remap = mv88e6095_port_tag_remap,</div><div class='add'>+	.port_set_frame_mode = mv88e6351_port_set_frame_mode,</div><div class='add'>+	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,</div><div class='add'>+	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,</div><div class='add'>+	.port_set_ether_type = mv88e6351_port_set_ether_type,</div><div class='add'>+	.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,</div><div class='add'>+	.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,</div><div class='add'>+	.port_pause_limit = mv88e6097_port_pause_limit,</div><div class='add'>+	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,</div><div class='add'>+	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,</div><div class='add'>+	.port_get_cmode = mv88e6352_port_get_cmode,</div><div class='add'>+	.port_setup_message_port = mv88e6xxx_setup_message_port,</div><div class='add'>+	.stats_snapshot = mv88e6320_g1_stats_snapshot,</div><div class='add'>+	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,</div><div class='add'>+	.stats_get_sset_count = mv88e6095_stats_get_sset_count,</div><div class='add'>+	.stats_get_strings = mv88e6095_stats_get_strings,</div><div class='add'>+	.stats_get_stat = mv88e6095_stats_get_stat,</div><div class='add'>+	.set_cpu_port = mv88e6095_g1_set_cpu_port,</div><div class='add'>+	.set_egress_port = mv88e6095_g1_set_egress_port,</div><div class='add'>+	.watchdog_ops = &amp;mv88e6097_watchdog_ops,</div><div class='add'>+	.mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu,</div><div class='add'>+	.pot_clear = mv88e6xxx_g2_pot_clear,</div><div class='add'>+	.reset = mv88e6352_g1_reset,</div><div class='add'>+	.atu_get_hash = mv88e6165_g1_atu_get_hash,</div><div class='add'>+	.atu_set_hash = mv88e6165_g1_atu_set_hash,</div><div class='add'>+	.vtu_getnext = mv88e6352_g1_vtu_getnext,</div><div class='add'>+	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,</div><div class='add'>+	.stu_getnext = mv88e6352_g1_stu_getnext,</div><div class='add'>+	.stu_loadpurge = mv88e6352_g1_stu_loadpurge,</div><div class='add'>+	.phylink_get_caps = mv88e6351_phylink_get_caps,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct mv88e6xxx_ops mv88e6172_ops = {</div><div class='add'>+	/* MV88E6XXX_FAMILY_6352 */</div><div class='add'>+	.ieee_pri_map = mv88e6085_g1_ieee_pri_map,</div><div class='add'>+	.ip_pri_map = mv88e6085_g1_ip_pri_map,</div><div class='add'>+	.irl_init_all = mv88e6352_g2_irl_init_all,</div><div class='add'>+	.get_eeprom = mv88e6xxx_g2_get_eeprom16,</div><div class='add'>+	.set_eeprom = mv88e6xxx_g2_set_eeprom16,</div><div class='add'>+	.set_switch_mac = mv88e6xxx_g2_set_switch_mac,</div><div class='add'>+	.phy_read = mv88e6xxx_g2_smi_phy_read_c22,</div><div class='add'>+	.phy_write = mv88e6xxx_g2_smi_phy_write_c22,</div><div class='add'>+	.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,</div><div class='add'>+	.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,</div><div class='add'>+	.port_set_link = mv88e6xxx_port_set_link,</div><div class='add'>+	.port_sync_link = mv88e6xxx_port_sync_link,</div><div class='add'>+	.port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay,</div><div class='add'>+	.port_set_speed_duplex = mv88e6352_port_set_speed_duplex,</div><div class='add'>+	.port_tag_remap = mv88e6095_port_tag_remap,</div><div class='add'>+	.port_set_policy = mv88e6352_port_set_policy,</div><div class='add'>+	.port_set_frame_mode = mv88e6351_port_set_frame_mode,</div><div class='add'>+	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,</div><div class='add'>+	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,</div><div class='add'>+	.port_set_ether_type = mv88e6351_port_set_ether_type,</div><div class='add'>+	.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,</div><div class='add'>+	.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,</div><div class='add'>+	.port_pause_limit = mv88e6097_port_pause_limit,</div><div class='add'>+	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,</div><div class='add'>+	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,</div><div class='add'>+	.port_get_cmode = mv88e6352_port_get_cmode,</div><div class='add'>+	.port_setup_leds = mv88e6xxx_port_setup_leds,</div><div class='add'>+	.port_setup_message_port = mv88e6xxx_setup_message_port,</div><div class='add'>+	.stats_snapshot = mv88e6320_g1_stats_snapshot,</div><div class='add'>+	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,</div><div class='add'>+	.stats_get_sset_count = mv88e6095_stats_get_sset_count,</div><div class='add'>+	.stats_get_strings = mv88e6095_stats_get_strings,</div><div class='add'>+	.stats_get_stat = mv88e6095_stats_get_stat,</div><div class='add'>+	.set_cpu_port = mv88e6095_g1_set_cpu_port,</div><div class='add'>+	.set_egress_port = mv88e6095_g1_set_egress_port,</div><div class='add'>+	.watchdog_ops = &amp;mv88e6097_watchdog_ops,</div><div class='add'>+	.mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu,</div><div class='add'>+	.pot_clear = mv88e6xxx_g2_pot_clear,</div><div class='add'>+	.hardware_reset_pre = mv88e6xxx_g2_eeprom_wait,</div><div class='add'>+	.hardware_reset_post = mv88e6xxx_g2_eeprom_wait,</div><div class='add'>+	.reset = mv88e6352_g1_reset,</div><div class='add'>+	.rmu_disable = mv88e6352_g1_rmu_disable,</div><div class='add'>+	.atu_get_hash = mv88e6165_g1_atu_get_hash,</div><div class='add'>+	.atu_set_hash = mv88e6165_g1_atu_set_hash,</div><div class='add'>+	.vtu_getnext = mv88e6352_g1_vtu_getnext,</div><div class='add'>+	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,</div><div class='add'>+	.stu_getnext = mv88e6352_g1_stu_getnext,</div><div class='add'>+	.stu_loadpurge = mv88e6352_g1_stu_loadpurge,</div><div class='add'>+	.serdes_get_regs_len = mv88e6352_serdes_get_regs_len,</div><div class='add'>+	.serdes_get_regs = mv88e6352_serdes_get_regs,</div><div class='add'>+	.gpio_ops = &amp;mv88e6352_gpio_ops,</div><div class='add'>+	.phylink_get_caps = mv88e6352_phylink_get_caps,</div><div class='add'>+	.pcs_ops = &amp;mv88e6352_pcs_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct mv88e6xxx_ops mv88e6175_ops = {</div><div class='add'>+	/* MV88E6XXX_FAMILY_6351 */</div><div class='add'>+	.ieee_pri_map = mv88e6085_g1_ieee_pri_map,</div><div class='add'>+	.ip_pri_map = mv88e6085_g1_ip_pri_map,</div><div class='add'>+	.irl_init_all = mv88e6352_g2_irl_init_all,</div><div class='add'>+	.set_switch_mac = mv88e6xxx_g2_set_switch_mac,</div><div class='add'>+	.phy_read = mv88e6xxx_g2_smi_phy_read_c22,</div><div class='add'>+	.phy_write = mv88e6xxx_g2_smi_phy_write_c22,</div><div class='add'>+	.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,</div><div class='add'>+	.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,</div><div class='add'>+	.port_set_link = mv88e6xxx_port_set_link,</div><div class='add'>+	.port_sync_link = mv88e6xxx_port_sync_link,</div><div class='add'>+	.port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay,</div><div class='add'>+	.port_set_speed_duplex = mv88e6185_port_set_speed_duplex,</div><div class='add'>+	.port_tag_remap = mv88e6095_port_tag_remap,</div><div class='add'>+	.port_set_frame_mode = mv88e6351_port_set_frame_mode,</div><div class='add'>+	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,</div><div class='add'>+	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,</div><div class='add'>+	.port_set_ether_type = mv88e6351_port_set_ether_type,</div><div class='add'>+	.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,</div><div class='add'>+	.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,</div><div class='add'>+	.port_pause_limit = mv88e6097_port_pause_limit,</div><div class='add'>+	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,</div><div class='add'>+	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,</div><div class='add'>+	.port_get_cmode = mv88e6352_port_get_cmode,</div><div class='add'>+	.port_setup_message_port = mv88e6xxx_setup_message_port,</div><div class='add'>+	.stats_snapshot = mv88e6320_g1_stats_snapshot,</div><div class='add'>+	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,</div><div class='add'>+	.stats_get_sset_count = mv88e6095_stats_get_sset_count,</div><div class='add'>+	.stats_get_strings = mv88e6095_stats_get_strings,</div><div class='add'>+	.stats_get_stat = mv88e6095_stats_get_stat,</div><div class='add'>+	.set_cpu_port = mv88e6095_g1_set_cpu_port,</div><div class='add'>+	.set_egress_port = mv88e6095_g1_set_egress_port,</div><div class='add'>+	.watchdog_ops = &amp;mv88e6097_watchdog_ops,</div><div class='add'>+	.mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu,</div><div class='add'>+	.pot_clear = mv88e6xxx_g2_pot_clear,</div><div class='add'>+	.reset = mv88e6352_g1_reset,</div><div class='add'>+	.atu_get_hash = mv88e6165_g1_atu_get_hash,</div><div class='add'>+	.atu_set_hash = mv88e6165_g1_atu_set_hash,</div><div class='add'>+	.vtu_getnext = mv88e6352_g1_vtu_getnext,</div><div class='add'>+	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,</div><div class='add'>+	.stu_getnext = mv88e6352_g1_stu_getnext,</div><div class='add'>+	.stu_loadpurge = mv88e6352_g1_stu_loadpurge,</div><div class='add'>+	.phylink_get_caps = mv88e6351_phylink_get_caps,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct mv88e6xxx_ops mv88e6176_ops = {</div><div class='add'>+	/* MV88E6XXX_FAMILY_6352 */</div><div class='add'>+	.ieee_pri_map = mv88e6085_g1_ieee_pri_map,</div><div class='add'>+	.ip_pri_map = mv88e6085_g1_ip_pri_map,</div><div class='add'>+	.irl_init_all = mv88e6352_g2_irl_init_all,</div><div class='add'>+	.get_eeprom = mv88e6xxx_g2_get_eeprom16,</div><div class='add'>+	.set_eeprom = mv88e6xxx_g2_set_eeprom16,</div><div class='add'>+	.set_switch_mac = mv88e6xxx_g2_set_switch_mac,</div><div class='add'>+	.phy_read = mv88e6xxx_g2_smi_phy_read_c22,</div><div class='add'>+	.phy_write = mv88e6xxx_g2_smi_phy_write_c22,</div><div class='add'>+	.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,</div><div class='add'>+	.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,</div><div class='add'>+	.port_set_link = mv88e6xxx_port_set_link,</div><div class='add'>+	.port_sync_link = mv88e6xxx_port_sync_link,</div><div class='add'>+	.port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay,</div><div class='add'>+	.port_set_speed_duplex = mv88e6352_port_set_speed_duplex,</div><div class='add'>+	.port_tag_remap = mv88e6095_port_tag_remap,</div><div class='add'>+	.port_set_policy = mv88e6352_port_set_policy,</div><div class='add'>+	.port_set_frame_mode = mv88e6351_port_set_frame_mode,</div><div class='add'>+	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,</div><div class='add'>+	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,</div><div class='add'>+	.port_set_ether_type = mv88e6351_port_set_ether_type,</div><div class='add'>+	.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,</div><div class='add'>+	.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,</div><div class='add'>+	.port_pause_limit = mv88e6097_port_pause_limit,</div><div class='add'>+	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,</div><div class='add'>+	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,</div><div class='add'>+	.port_get_cmode = mv88e6352_port_get_cmode,</div><div class='add'>+	.port_setup_leds = mv88e6xxx_port_setup_leds,</div><div class='add'>+	.port_setup_message_port = mv88e6xxx_setup_message_port,</div><div class='add'>+	.stats_snapshot = mv88e6320_g1_stats_snapshot,</div><div class='add'>+	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,</div><div class='add'>+	.stats_get_sset_count = mv88e6095_stats_get_sset_count,</div><div class='add'>+	.stats_get_strings = mv88e6095_stats_get_strings,</div><div class='add'>+	.stats_get_stat = mv88e6095_stats_get_stat,</div><div class='add'>+	.set_cpu_port = mv88e6095_g1_set_cpu_port,</div><div class='add'>+	.set_egress_port = mv88e6095_g1_set_egress_port,</div><div class='add'>+	.watchdog_ops = &amp;mv88e6097_watchdog_ops,</div><div class='add'>+	.mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu,</div><div class='add'>+	.pot_clear = mv88e6xxx_g2_pot_clear,</div><div class='add'>+	.hardware_reset_pre = mv88e6xxx_g2_eeprom_wait,</div><div class='add'>+	.hardware_reset_post = mv88e6xxx_g2_eeprom_wait,</div><div class='add'>+	.reset = mv88e6352_g1_reset,</div><div class='add'>+	.rmu_disable = mv88e6352_g1_rmu_disable,</div><div class='add'>+	.atu_get_hash = mv88e6165_g1_atu_get_hash,</div><div class='add'>+	.atu_set_hash = mv88e6165_g1_atu_set_hash,</div><div class='add'>+	.vtu_getnext = mv88e6352_g1_vtu_getnext,</div><div class='add'>+	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,</div><div class='add'>+	.stu_getnext = mv88e6352_g1_stu_getnext,</div><div class='add'>+	.stu_loadpurge = mv88e6352_g1_stu_loadpurge,</div><div class='add'>+	.serdes_irq_mapping = mv88e6352_serdes_irq_mapping,</div><div class='add'>+	.serdes_get_regs_len = mv88e6352_serdes_get_regs_len,</div><div class='add'>+	.serdes_get_regs = mv88e6352_serdes_get_regs,</div><div class='add'>+	.serdes_set_tx_amplitude = mv88e6352_serdes_set_tx_amplitude,</div><div class='add'>+	.gpio_ops = &amp;mv88e6352_gpio_ops,</div><div class='add'>+	.phylink_get_caps = mv88e6352_phylink_get_caps,</div><div class='add'>+	.pcs_ops = &amp;mv88e6352_pcs_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct mv88e6xxx_ops mv88e6185_ops = {</div><div class='add'>+	/* MV88E6XXX_FAMILY_6185 */</div><div class='add'>+	.ieee_pri_map = mv88e6085_g1_ieee_pri_map,</div><div class='add'>+	.ip_pri_map = mv88e6085_g1_ip_pri_map,</div><div class='add'>+	.set_switch_mac = mv88e6xxx_g1_set_switch_mac,</div><div class='add'>+	.phy_read = mv88e6185_phy_ppu_read,</div><div class='add'>+	.phy_write = mv88e6185_phy_ppu_write,</div><div class='add'>+	.port_set_link = mv88e6xxx_port_set_link,</div><div class='add'>+	.port_sync_link = mv88e6185_port_sync_link,</div><div class='add'>+	.port_set_speed_duplex = mv88e6185_port_set_speed_duplex,</div><div class='add'>+	.port_set_frame_mode = mv88e6085_port_set_frame_mode,</div><div class='add'>+	.port_set_ucast_flood = mv88e6185_port_set_forward_unknown,</div><div class='add'>+	.port_set_mcast_flood = mv88e6185_port_set_default_forward,</div><div class='add'>+	.port_egress_rate_limiting = mv88e6095_port_egress_rate_limiting,</div><div class='add'>+	.port_set_upstream_port = mv88e6095_port_set_upstream_port,</div><div class='add'>+	.port_set_pause = mv88e6185_port_set_pause,</div><div class='add'>+	.port_get_cmode = mv88e6185_port_get_cmode,</div><div class='add'>+	.port_setup_message_port = mv88e6xxx_setup_message_port,</div><div class='add'>+	.stats_snapshot = mv88e6xxx_g1_stats_snapshot,</div><div class='add'>+	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,</div><div class='add'>+	.stats_get_sset_count = mv88e6095_stats_get_sset_count,</div><div class='add'>+	.stats_get_strings = mv88e6095_stats_get_strings,</div><div class='add'>+	.stats_get_stat = mv88e6095_stats_get_stat,</div><div class='add'>+	.set_cpu_port = mv88e6095_g1_set_cpu_port,</div><div class='add'>+	.set_egress_port = mv88e6095_g1_set_egress_port,</div><div class='add'>+	.watchdog_ops = &amp;mv88e6097_watchdog_ops,</div><div class='add'>+	.mgmt_rsvd2cpu = mv88e6185_g2_mgmt_rsvd2cpu,</div><div class='add'>+	.set_cascade_port = mv88e6185_g1_set_cascade_port,</div><div class='add'>+	.ppu_enable = mv88e6185_g1_ppu_enable,</div><div class='add'>+	.ppu_disable = mv88e6185_g1_ppu_disable,</div><div class='add'>+	.reset = mv88e6185_g1_reset,</div><div class='add'>+	.vtu_getnext = mv88e6185_g1_vtu_getnext,</div><div class='add'>+	.vtu_loadpurge = mv88e6185_g1_vtu_loadpurge,</div><div class='add'>+	.phylink_get_caps = mv88e6185_phylink_get_caps,</div><div class='add'>+	.pcs_ops = &amp;mv88e6185_pcs_ops,</div><div class='add'>+	.set_max_frame_size = mv88e6185_g1_set_max_frame_size,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct mv88e6xxx_ops mv88e6190_ops = {</div><div class='add'>+	/* MV88E6XXX_FAMILY_6390 */</div><div class='add'>+	.setup_errata = mv88e6390_setup_errata,</div><div class='add'>+	.irl_init_all = mv88e6390_g2_irl_init_all,</div><div class='add'>+	.get_eeprom = mv88e6xxx_g2_get_eeprom8,</div><div class='add'>+	.set_eeprom = mv88e6xxx_g2_set_eeprom8,</div><div class='add'>+	.set_switch_mac = mv88e6xxx_g2_set_switch_mac,</div><div class='add'>+	.phy_read = mv88e6xxx_g2_smi_phy_read_c22,</div><div class='add'>+	.phy_write = mv88e6xxx_g2_smi_phy_write_c22,</div><div class='add'>+	.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,</div><div class='add'>+	.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,</div><div class='add'>+	.port_set_link = mv88e6xxx_port_set_link,</div><div class='add'>+	.port_sync_link = mv88e6xxx_port_sync_link,</div><div class='add'>+	.port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay,</div><div class='add'>+	.port_set_speed_duplex = mv88e6390_port_set_speed_duplex,</div><div class='add'>+	.port_max_speed_mode = mv88e6390_port_max_speed_mode,</div><div class='add'>+	.port_tag_remap = mv88e6390_port_tag_remap,</div><div class='add'>+	.port_set_policy = mv88e6352_port_set_policy,</div><div class='add'>+	.port_set_frame_mode = mv88e6351_port_set_frame_mode,</div><div class='add'>+	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,</div><div class='add'>+	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,</div><div class='add'>+	.port_set_ether_type = mv88e6351_port_set_ether_type,</div><div class='add'>+	.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,</div><div class='add'>+	.port_pause_limit = mv88e6390_port_pause_limit,</div><div class='add'>+	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,</div><div class='add'>+	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,</div><div class='add'>+	.port_get_cmode = mv88e6352_port_get_cmode,</div><div class='add'>+	.port_set_cmode = mv88e6390_port_set_cmode,</div><div class='add'>+	.port_setup_message_port = mv88e6xxx_setup_message_port,</div><div class='add'>+	.stats_snapshot = mv88e6390_g1_stats_snapshot,</div><div class='add'>+	.stats_set_histogram = mv88e6390_g1_stats_set_histogram,</div><div class='add'>+	.stats_get_sset_count = mv88e6320_stats_get_sset_count,</div><div class='add'>+	.stats_get_strings = mv88e6320_stats_get_strings,</div><div class='add'>+	.stats_get_stat = mv88e6390_stats_get_stat,</div><div class='add'>+	.set_cpu_port = mv88e6390_g1_set_cpu_port,</div><div class='add'>+	.set_egress_port = mv88e6390_g1_set_egress_port,</div><div class='add'>+	.watchdog_ops = &amp;mv88e6390_watchdog_ops,</div><div class='add'>+	.mgmt_rsvd2cpu = mv88e6390_g1_mgmt_rsvd2cpu,</div><div class='add'>+	.pot_clear = mv88e6xxx_g2_pot_clear,</div><div class='add'>+	.hardware_reset_pre = mv88e6xxx_g2_eeprom_wait,</div><div class='add'>+	.hardware_reset_post = mv88e6xxx_g2_eeprom_wait,</div><div class='add'>+	.reset = mv88e6352_g1_reset,</div><div class='add'>+	.rmu_disable = mv88e6390_g1_rmu_disable,</div><div class='add'>+	.atu_get_hash = mv88e6165_g1_atu_get_hash,</div><div class='add'>+	.atu_set_hash = mv88e6165_g1_atu_set_hash,</div><div class='add'>+	.vtu_getnext = mv88e6390_g1_vtu_getnext,</div><div class='add'>+	.vtu_loadpurge = mv88e6390_g1_vtu_loadpurge,</div><div class='add'>+	.stu_getnext = mv88e6390_g1_stu_getnext,</div><div class='add'>+	.stu_loadpurge = mv88e6390_g1_stu_loadpurge,</div><div class='add'>+	.serdes_get_lane = mv88e6390_serdes_get_lane,</div><div class='add'>+	.serdes_irq_mapping = mv88e6390_serdes_irq_mapping,</div><div class='add'>+	.serdes_get_strings = mv88e6390_serdes_get_strings,</div><div class='add'>+	.serdes_get_stats = mv88e6390_serdes_get_stats,</div><div class='add'>+	.serdes_get_regs_len = mv88e6390_serdes_get_regs_len,</div><div class='add'>+	.serdes_get_regs = mv88e6390_serdes_get_regs,</div><div class='add'>+	.gpio_ops = &amp;mv88e6352_gpio_ops,</div><div class='add'>+	.phylink_get_caps = mv88e6390_phylink_get_caps,</div><div class='add'>+	.pcs_ops = &amp;mv88e6390_pcs_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct mv88e6xxx_ops mv88e6190x_ops = {</div><div class='add'>+	/* MV88E6XXX_FAMILY_6390 */</div><div class='add'>+	.setup_errata = mv88e6390_setup_errata,</div><div class='add'>+	.irl_init_all = mv88e6390_g2_irl_init_all,</div><div class='add'>+	.get_eeprom = mv88e6xxx_g2_get_eeprom8,</div><div class='add'>+	.set_eeprom = mv88e6xxx_g2_set_eeprom8,</div><div class='add'>+	.set_switch_mac = mv88e6xxx_g2_set_switch_mac,</div><div class='add'>+	.phy_read = mv88e6xxx_g2_smi_phy_read_c22,</div><div class='add'>+	.phy_write = mv88e6xxx_g2_smi_phy_write_c22,</div><div class='add'>+	.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,</div><div class='add'>+	.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,</div><div class='add'>+	.port_set_link = mv88e6xxx_port_set_link,</div><div class='add'>+	.port_sync_link = mv88e6xxx_port_sync_link,</div><div class='add'>+	.port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay,</div><div class='add'>+	.port_set_speed_duplex = mv88e6390x_port_set_speed_duplex,</div><div class='add'>+	.port_max_speed_mode = mv88e6390x_port_max_speed_mode,</div><div class='add'>+	.port_tag_remap = mv88e6390_port_tag_remap,</div><div class='add'>+	.port_set_policy = mv88e6352_port_set_policy,</div><div class='add'>+	.port_set_frame_mode = mv88e6351_port_set_frame_mode,</div><div class='add'>+	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,</div><div class='add'>+	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,</div><div class='add'>+	.port_set_ether_type = mv88e6351_port_set_ether_type,</div><div class='add'>+	.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,</div><div class='add'>+	.port_pause_limit = mv88e6390_port_pause_limit,</div><div class='add'>+	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,</div><div class='add'>+	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,</div><div class='add'>+	.port_get_cmode = mv88e6352_port_get_cmode,</div><div class='add'>+	.port_set_cmode = mv88e6390x_port_set_cmode,</div><div class='add'>+	.port_setup_message_port = mv88e6xxx_setup_message_port,</div><div class='add'>+	.stats_snapshot = mv88e6390_g1_stats_snapshot,</div><div class='add'>+	.stats_set_histogram = mv88e6390_g1_stats_set_histogram,</div><div class='add'>+	.stats_get_sset_count = mv88e6320_stats_get_sset_count,</div><div class='add'>+	.stats_get_strings = mv88e6320_stats_get_strings,</div><div class='add'>+	.stats_get_stat = mv88e6390_stats_get_stat,</div><div class='add'>+	.set_cpu_port = mv88e6390_g1_set_cpu_port,</div><div class='add'>+	.set_egress_port = mv88e6390_g1_set_egress_port,</div><div class='add'>+	.watchdog_ops = &amp;mv88e6390_watchdog_ops,</div><div class='add'>+	.mgmt_rsvd2cpu = mv88e6390_g1_mgmt_rsvd2cpu,</div><div class='add'>+	.pot_clear = mv88e6xxx_g2_pot_clear,</div><div class='add'>+	.hardware_reset_pre = mv88e6xxx_g2_eeprom_wait,</div><div class='add'>+	.hardware_reset_post = mv88e6xxx_g2_eeprom_wait,</div><div class='add'>+	.reset = mv88e6352_g1_reset,</div><div class='add'>+	.rmu_disable = mv88e6390_g1_rmu_disable,</div><div class='add'>+	.atu_get_hash = mv88e6165_g1_atu_get_hash,</div><div class='add'>+	.atu_set_hash = mv88e6165_g1_atu_set_hash,</div><div class='add'>+	.vtu_getnext = mv88e6390_g1_vtu_getnext,</div><div class='add'>+	.vtu_loadpurge = mv88e6390_g1_vtu_loadpurge,</div><div class='add'>+	.stu_getnext = mv88e6390_g1_stu_getnext,</div><div class='add'>+	.stu_loadpurge = mv88e6390_g1_stu_loadpurge,</div><div class='add'>+	.serdes_get_lane = mv88e6390x_serdes_get_lane,</div><div class='add'>+	.serdes_irq_mapping = mv88e6390_serdes_irq_mapping,</div><div class='add'>+	.serdes_get_strings = mv88e6390_serdes_get_strings,</div><div class='add'>+	.serdes_get_stats = mv88e6390_serdes_get_stats,</div><div class='add'>+	.serdes_get_regs_len = mv88e6390_serdes_get_regs_len,</div><div class='add'>+	.serdes_get_regs = mv88e6390_serdes_get_regs,</div><div class='add'>+	.gpio_ops = &amp;mv88e6352_gpio_ops,</div><div class='add'>+	.phylink_get_caps = mv88e6390x_phylink_get_caps,</div><div class='add'>+	.pcs_ops = &amp;mv88e6390_pcs_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct mv88e6xxx_ops mv88e6191_ops = {</div><div class='add'>+	/* MV88E6XXX_FAMILY_6390 */</div><div class='add'>+	.setup_errata = mv88e6390_setup_errata,</div><div class='add'>+	.irl_init_all = mv88e6390_g2_irl_init_all,</div><div class='add'>+	.get_eeprom = mv88e6xxx_g2_get_eeprom8,</div><div class='add'>+	.set_eeprom = mv88e6xxx_g2_set_eeprom8,</div><div class='add'>+	.set_switch_mac = mv88e6xxx_g2_set_switch_mac,</div><div class='add'>+	.phy_read = mv88e6xxx_g2_smi_phy_read_c22,</div><div class='add'>+	.phy_write = mv88e6xxx_g2_smi_phy_write_c22,</div><div class='add'>+	.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,</div><div class='add'>+	.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,</div><div class='add'>+	.port_set_link = mv88e6xxx_port_set_link,</div><div class='add'>+	.port_sync_link = mv88e6xxx_port_sync_link,</div><div class='add'>+	.port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay,</div><div class='add'>+	.port_set_speed_duplex = mv88e6390_port_set_speed_duplex,</div><div class='add'>+	.port_max_speed_mode = mv88e6390_port_max_speed_mode,</div><div class='add'>+	.port_tag_remap = mv88e6390_port_tag_remap,</div><div class='add'>+	.port_set_frame_mode = mv88e6351_port_set_frame_mode,</div><div class='add'>+	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,</div><div class='add'>+	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,</div><div class='add'>+	.port_set_ether_type = mv88e6351_port_set_ether_type,</div><div class='add'>+	.port_pause_limit = mv88e6390_port_pause_limit,</div><div class='add'>+	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,</div><div class='add'>+	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,</div><div class='add'>+	.port_get_cmode = mv88e6352_port_get_cmode,</div><div class='add'>+	.port_set_cmode = mv88e6390_port_set_cmode,</div><div class='add'>+	.port_setup_message_port = mv88e6xxx_setup_message_port,</div><div class='add'>+	.stats_snapshot = mv88e6390_g1_stats_snapshot,</div><div class='add'>+	.stats_set_histogram = mv88e6390_g1_stats_set_histogram,</div><div class='add'>+	.stats_get_sset_count = mv88e6320_stats_get_sset_count,</div><div class='add'>+	.stats_get_strings = mv88e6320_stats_get_strings,</div><div class='add'>+	.stats_get_stat = mv88e6390_stats_get_stat,</div><div class='add'>+	.set_cpu_port = mv88e6390_g1_set_cpu_port,</div><div class='add'>+	.set_egress_port = mv88e6390_g1_set_egress_port,</div><div class='add'>+	.watchdog_ops = &amp;mv88e6390_watchdog_ops,</div><div class='add'>+	.mgmt_rsvd2cpu = mv88e6390_g1_mgmt_rsvd2cpu,</div><div class='add'>+	.pot_clear = mv88e6xxx_g2_pot_clear,</div><div class='add'>+	.hardware_reset_pre = mv88e6xxx_g2_eeprom_wait,</div><div class='add'>+	.hardware_reset_post = mv88e6xxx_g2_eeprom_wait,</div><div class='add'>+	.reset = mv88e6352_g1_reset,</div><div class='add'>+	.rmu_disable = mv88e6390_g1_rmu_disable,</div><div class='add'>+	.atu_get_hash = mv88e6165_g1_atu_get_hash,</div><div class='add'>+	.atu_set_hash = mv88e6165_g1_atu_set_hash,</div><div class='add'>+	.vtu_getnext = mv88e6390_g1_vtu_getnext,</div><div class='add'>+	.vtu_loadpurge = mv88e6390_g1_vtu_loadpurge,</div><div class='add'>+	.stu_getnext = mv88e6390_g1_stu_getnext,</div><div class='add'>+	.stu_loadpurge = mv88e6390_g1_stu_loadpurge,</div><div class='add'>+	.serdes_get_lane = mv88e6390_serdes_get_lane,</div><div class='add'>+	.serdes_irq_mapping = mv88e6390_serdes_irq_mapping,</div><div class='add'>+	.serdes_get_strings = mv88e6390_serdes_get_strings,</div><div class='add'>+	.serdes_get_stats = mv88e6390_serdes_get_stats,</div><div class='add'>+	.serdes_get_regs_len = mv88e6390_serdes_get_regs_len,</div><div class='add'>+	.serdes_get_regs = mv88e6390_serdes_get_regs,</div><div class='add'>+	.avb_ops = &amp;mv88e6390_avb_ops,</div><div class='add'>+	.ptp_ops = &amp;mv88e6352_ptp_ops,</div><div class='add'>+	.phylink_get_caps = mv88e6390_phylink_get_caps,</div><div class='add'>+	.pcs_ops = &amp;mv88e6390_pcs_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct mv88e6xxx_ops mv88e6240_ops = {</div><div class='add'>+	/* MV88E6XXX_FAMILY_6352 */</div><div class='add'>+	.ieee_pri_map = mv88e6085_g1_ieee_pri_map,</div><div class='add'>+	.ip_pri_map = mv88e6085_g1_ip_pri_map,</div><div class='add'>+	.irl_init_all = mv88e6352_g2_irl_init_all,</div><div class='add'>+	.get_eeprom = mv88e6xxx_g2_get_eeprom16,</div><div class='add'>+	.set_eeprom = mv88e6xxx_g2_set_eeprom16,</div><div class='add'>+	.set_switch_mac = mv88e6xxx_g2_set_switch_mac,</div><div class='add'>+	.phy_read = mv88e6xxx_g2_smi_phy_read_c22,</div><div class='add'>+	.phy_write = mv88e6xxx_g2_smi_phy_write_c22,</div><div class='add'>+	.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,</div><div class='add'>+	.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,</div><div class='add'>+	.port_set_link = mv88e6xxx_port_set_link,</div><div class='add'>+	.port_sync_link = mv88e6xxx_port_sync_link,</div><div class='add'>+	.port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay,</div><div class='add'>+	.port_set_speed_duplex = mv88e6352_port_set_speed_duplex,</div><div class='add'>+	.port_tag_remap = mv88e6095_port_tag_remap,</div><div class='add'>+	.port_set_policy = mv88e6352_port_set_policy,</div><div class='add'>+	.port_set_frame_mode = mv88e6351_port_set_frame_mode,</div><div class='add'>+	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,</div><div class='add'>+	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,</div><div class='add'>+	.port_set_ether_type = mv88e6351_port_set_ether_type,</div><div class='add'>+	.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,</div><div class='add'>+	.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,</div><div class='add'>+	.port_pause_limit = mv88e6097_port_pause_limit,</div><div class='add'>+	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,</div><div class='add'>+	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,</div><div class='add'>+	.port_get_cmode = mv88e6352_port_get_cmode,</div><div class='add'>+	.port_setup_leds = mv88e6xxx_port_setup_leds,</div><div class='add'>+	.port_setup_message_port = mv88e6xxx_setup_message_port,</div><div class='add'>+	.stats_snapshot = mv88e6320_g1_stats_snapshot,</div><div class='add'>+	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,</div><div class='add'>+	.stats_get_sset_count = mv88e6095_stats_get_sset_count,</div><div class='add'>+	.stats_get_strings = mv88e6095_stats_get_strings,</div><div class='add'>+	.stats_get_stat = mv88e6095_stats_get_stat,</div><div class='add'>+	.set_cpu_port = mv88e6095_g1_set_cpu_port,</div><div class='add'>+	.set_egress_port = mv88e6095_g1_set_egress_port,</div><div class='add'>+	.watchdog_ops = &amp;mv88e6097_watchdog_ops,</div><div class='add'>+	.mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu,</div><div class='add'>+	.pot_clear = mv88e6xxx_g2_pot_clear,</div><div class='add'>+	.hardware_reset_pre = mv88e6xxx_g2_eeprom_wait,</div><div class='add'>+	.hardware_reset_post = mv88e6xxx_g2_eeprom_wait,</div><div class='add'>+	.reset = mv88e6352_g1_reset,</div><div class='add'>+	.rmu_disable = mv88e6352_g1_rmu_disable,</div><div class='add'>+	.atu_get_hash = mv88e6165_g1_atu_get_hash,</div><div class='add'>+	.atu_set_hash = mv88e6165_g1_atu_set_hash,</div><div class='add'>+	.vtu_getnext = mv88e6352_g1_vtu_getnext,</div><div class='add'>+	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,</div><div class='add'>+	.stu_getnext = mv88e6352_g1_stu_getnext,</div><div class='add'>+	.stu_loadpurge = mv88e6352_g1_stu_loadpurge,</div><div class='add'>+	.serdes_irq_mapping = mv88e6352_serdes_irq_mapping,</div><div class='add'>+	.serdes_get_regs_len = mv88e6352_serdes_get_regs_len,</div><div class='add'>+	.serdes_get_regs = mv88e6352_serdes_get_regs,</div><div class='add'>+	.serdes_set_tx_amplitude = mv88e6352_serdes_set_tx_amplitude,</div><div class='add'>+	.gpio_ops = &amp;mv88e6352_gpio_ops,</div><div class='add'>+	.avb_ops = &amp;mv88e6352_avb_ops,</div><div class='add'>+	.ptp_ops = &amp;mv88e6352_ptp_ops,</div><div class='add'>+	.phylink_get_caps = mv88e6352_phylink_get_caps,</div><div class='add'>+	.pcs_ops = &amp;mv88e6352_pcs_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct mv88e6xxx_ops mv88e6250_ops = {</div><div class='add'>+	/* MV88E6XXX_FAMILY_6250 */</div><div class='add'>+	.ieee_pri_map = mv88e6250_g1_ieee_pri_map,</div><div class='add'>+	.ip_pri_map = mv88e6085_g1_ip_pri_map,</div><div class='add'>+	.irl_init_all = mv88e6352_g2_irl_init_all,</div><div class='add'>+	.get_eeprom = mv88e6xxx_g2_get_eeprom16,</div><div class='add'>+	.set_eeprom = mv88e6xxx_g2_set_eeprom16,</div><div class='add'>+	.set_switch_mac = mv88e6xxx_g2_set_switch_mac,</div><div class='add'>+	.phy_read = mv88e6xxx_g2_smi_phy_read_c22,</div><div class='add'>+	.phy_write = mv88e6xxx_g2_smi_phy_write_c22,</div><div class='add'>+	.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,</div><div class='add'>+	.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,</div><div class='add'>+	.port_set_link = mv88e6xxx_port_set_link,</div><div class='add'>+	.port_sync_link = mv88e6xxx_port_sync_link,</div><div class='add'>+	.port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay,</div><div class='add'>+	.port_set_speed_duplex = mv88e6250_port_set_speed_duplex,</div><div class='add'>+	.port_tag_remap = mv88e6095_port_tag_remap,</div><div class='add'>+	.port_set_frame_mode = mv88e6351_port_set_frame_mode,</div><div class='add'>+	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,</div><div class='add'>+	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,</div><div class='add'>+	.port_set_ether_type = mv88e6351_port_set_ether_type,</div><div class='add'>+	.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,</div><div class='add'>+	.port_pause_limit = mv88e6097_port_pause_limit,</div><div class='add'>+	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,</div><div class='add'>+	.stats_snapshot = mv88e6320_g1_stats_snapshot,</div><div class='add'>+	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,</div><div class='add'>+	.stats_get_sset_count = mv88e6250_stats_get_sset_count,</div><div class='add'>+	.stats_get_strings = mv88e6250_stats_get_strings,</div><div class='add'>+	.stats_get_stat = mv88e6250_stats_get_stat,</div><div class='add'>+	.set_cpu_port = mv88e6095_g1_set_cpu_port,</div><div class='add'>+	.set_egress_port = mv88e6095_g1_set_egress_port,</div><div class='add'>+	.watchdog_ops = &amp;mv88e6250_watchdog_ops,</div><div class='add'>+	.mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu,</div><div class='add'>+	.pot_clear = mv88e6xxx_g2_pot_clear,</div><div class='add'>+	.hardware_reset_pre = mv88e6250_g1_wait_eeprom_done_prereset,</div><div class='add'>+	.hardware_reset_post = mv88e6xxx_g1_wait_eeprom_done,</div><div class='add'>+	.reset = mv88e6250_g1_reset,</div><div class='add'>+	.vtu_getnext = mv88e6185_g1_vtu_getnext,</div><div class='add'>+	.vtu_loadpurge = mv88e6185_g1_vtu_loadpurge,</div><div class='add'>+	.avb_ops = &amp;mv88e6352_avb_ops,</div><div class='add'>+	.ptp_ops = &amp;mv88e6352_ptp_ops,</div><div class='add'>+	.phylink_get_caps = mv88e6250_phylink_get_caps,</div><div class='add'>+	.set_max_frame_size = mv88e6185_g1_set_max_frame_size,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct mv88e6xxx_ops mv88e6290_ops = {</div><div class='add'>+	/* MV88E6XXX_FAMILY_6390 */</div><div class='add'>+	.setup_errata = mv88e6390_setup_errata,</div><div class='add'>+	.irl_init_all = mv88e6390_g2_irl_init_all,</div><div class='add'>+	.get_eeprom = mv88e6xxx_g2_get_eeprom8,</div><div class='add'>+	.set_eeprom = mv88e6xxx_g2_set_eeprom8,</div><div class='add'>+	.set_switch_mac = mv88e6xxx_g2_set_switch_mac,</div><div class='add'>+	.phy_read = mv88e6xxx_g2_smi_phy_read_c22,</div><div class='add'>+	.phy_write = mv88e6xxx_g2_smi_phy_write_c22,</div><div class='add'>+	.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,</div><div class='add'>+	.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,</div><div class='add'>+	.port_set_link = mv88e6xxx_port_set_link,</div><div class='add'>+	.port_sync_link = mv88e6xxx_port_sync_link,</div><div class='add'>+	.port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay,</div><div class='add'>+	.port_set_speed_duplex = mv88e6390_port_set_speed_duplex,</div><div class='add'>+	.port_max_speed_mode = mv88e6390_port_max_speed_mode,</div><div class='add'>+	.port_tag_remap = mv88e6390_port_tag_remap,</div><div class='add'>+	.port_set_policy = mv88e6352_port_set_policy,</div><div class='add'>+	.port_set_frame_mode = mv88e6351_port_set_frame_mode,</div><div class='add'>+	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,</div><div class='add'>+	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,</div><div class='add'>+	.port_set_ether_type = mv88e6351_port_set_ether_type,</div><div class='add'>+	.port_pause_limit = mv88e6390_port_pause_limit,</div><div class='add'>+	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,</div><div class='add'>+	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,</div><div class='add'>+	.port_get_cmode = mv88e6352_port_get_cmode,</div><div class='add'>+	.port_set_cmode = mv88e6390_port_set_cmode,</div><div class='add'>+	.port_setup_message_port = mv88e6xxx_setup_message_port,</div><div class='add'>+	.stats_snapshot = mv88e6390_g1_stats_snapshot,</div><div class='add'>+	.stats_set_histogram = mv88e6390_g1_stats_set_histogram,</div><div class='add'>+	.stats_get_sset_count = mv88e6320_stats_get_sset_count,</div><div class='add'>+	.stats_get_strings = mv88e6320_stats_get_strings,</div><div class='add'>+	.stats_get_stat = mv88e6390_stats_get_stat,</div><div class='add'>+	.set_cpu_port = mv88e6390_g1_set_cpu_port,</div><div class='add'>+	.set_egress_port = mv88e6390_g1_set_egress_port,</div><div class='add'>+	.watchdog_ops = &amp;mv88e6390_watchdog_ops,</div><div class='add'>+	.mgmt_rsvd2cpu = mv88e6390_g1_mgmt_rsvd2cpu,</div><div class='add'>+	.pot_clear = mv88e6xxx_g2_pot_clear,</div><div class='add'>+	.hardware_reset_pre = mv88e6xxx_g2_eeprom_wait,</div><div class='add'>+	.hardware_reset_post = mv88e6xxx_g2_eeprom_wait,</div><div class='add'>+	.reset = mv88e6352_g1_reset,</div><div class='add'>+	.rmu_disable = mv88e6390_g1_rmu_disable,</div><div class='add'>+	.atu_get_hash = mv88e6165_g1_atu_get_hash,</div><div class='add'>+	.atu_set_hash = mv88e6165_g1_atu_set_hash,</div><div class='add'>+	.vtu_getnext = mv88e6390_g1_vtu_getnext,</div><div class='add'>+	.vtu_loadpurge = mv88e6390_g1_vtu_loadpurge,</div><div class='add'>+	.stu_getnext = mv88e6390_g1_stu_getnext,</div><div class='add'>+	.stu_loadpurge = mv88e6390_g1_stu_loadpurge,</div><div class='add'>+	.serdes_get_lane = mv88e6390_serdes_get_lane,</div><div class='add'>+	.serdes_irq_mapping = mv88e6390_serdes_irq_mapping,</div><div class='add'>+	.serdes_get_strings = mv88e6390_serdes_get_strings,</div><div class='add'>+	.serdes_get_stats = mv88e6390_serdes_get_stats,</div><div class='add'>+	.serdes_get_regs_len = mv88e6390_serdes_get_regs_len,</div><div class='add'>+	.serdes_get_regs = mv88e6390_serdes_get_regs,</div><div class='add'>+	.gpio_ops = &amp;mv88e6352_gpio_ops,</div><div class='add'>+	.avb_ops = &amp;mv88e6390_avb_ops,</div><div class='add'>+	.ptp_ops = &amp;mv88e6390_ptp_ops,</div><div class='add'>+	.phylink_get_caps = mv88e6390_phylink_get_caps,</div><div class='add'>+	.pcs_ops = &amp;mv88e6390_pcs_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct mv88e6xxx_ops mv88e6320_ops = {</div><div class='add'>+	/* MV88E6XXX_FAMILY_6320 */</div><div class='add'>+	.setup_errata = mv88e6320_setup_errata,</div><div class='add'>+	.ieee_pri_map = mv88e6085_g1_ieee_pri_map,</div><div class='add'>+	.ip_pri_map = mv88e6085_g1_ip_pri_map,</div><div class='add'>+	.irl_init_all = mv88e6352_g2_irl_init_all,</div><div class='add'>+	.get_eeprom = mv88e6xxx_g2_get_eeprom16,</div><div class='add'>+	.set_eeprom = mv88e6xxx_g2_set_eeprom16,</div><div class='add'>+	.set_switch_mac = mv88e6xxx_g2_set_switch_mac,</div><div class='add'>+	.phy_read = mv88e6xxx_g2_smi_phy_read_c22,</div><div class='add'>+	.phy_write = mv88e6xxx_g2_smi_phy_write_c22,</div><div class='add'>+	.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,</div><div class='add'>+	.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,</div><div class='add'>+	.port_set_link = mv88e6xxx_port_set_link,</div><div class='add'>+	.port_sync_link = mv88e6xxx_port_sync_link,</div><div class='add'>+	.port_set_rgmii_delay = mv88e6320_port_set_rgmii_delay,</div><div class='add'>+	.port_set_speed_duplex = mv88e6185_port_set_speed_duplex,</div><div class='add'>+	.port_tag_remap = mv88e6095_port_tag_remap,</div><div class='add'>+	.port_set_policy = mv88e6352_port_set_policy,</div><div class='add'>+	.port_set_frame_mode = mv88e6351_port_set_frame_mode,</div><div class='add'>+	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,</div><div class='add'>+	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,</div><div class='add'>+	.port_set_ether_type = mv88e6351_port_set_ether_type,</div><div class='add'>+	.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,</div><div class='add'>+	.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,</div><div class='add'>+	.port_pause_limit = mv88e6097_port_pause_limit,</div><div class='add'>+	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,</div><div class='add'>+	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,</div><div class='add'>+	.port_get_cmode = mv88e6352_port_get_cmode,</div><div class='add'>+	.port_setup_message_port = mv88e6xxx_setup_message_port,</div><div class='add'>+	.stats_snapshot = mv88e6320_g1_stats_snapshot,</div><div class='add'>+	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,</div><div class='add'>+	.stats_get_sset_count = mv88e6320_stats_get_sset_count,</div><div class='add'>+	.stats_get_strings = mv88e6320_stats_get_strings,</div><div class='add'>+	.stats_get_stat = mv88e6320_stats_get_stat,</div><div class='add'>+	.set_cpu_port = mv88e6095_g1_set_cpu_port,</div><div class='add'>+	.set_egress_port = mv88e6095_g1_set_egress_port,</div><div class='add'>+	.watchdog_ops = &amp;mv88e6390_watchdog_ops,</div><div class='add'>+	.mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu,</div><div class='add'>+	.pot_clear = mv88e6xxx_g2_pot_clear,</div><div class='add'>+	.hardware_reset_pre = mv88e6xxx_g2_eeprom_wait,</div><div class='add'>+	.hardware_reset_post = mv88e6xxx_g2_eeprom_wait,</div><div class='add'>+	.reset = mv88e6352_g1_reset,</div><div class='add'>+	.vtu_getnext = mv88e6352_g1_vtu_getnext,</div><div class='add'>+	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,</div><div class='add'>+	.stu_getnext = mv88e6352_g1_stu_getnext,</div><div class='add'>+	.stu_loadpurge = mv88e6352_g1_stu_loadpurge,</div><div class='add'>+	.gpio_ops = &amp;mv88e6352_gpio_ops,</div><div class='add'>+	.avb_ops = &amp;mv88e6352_avb_ops,</div><div class='add'>+	.ptp_ops = &amp;mv88e6352_ptp_ops,</div><div class='add'>+	.phylink_get_caps = mv88e632x_phylink_get_caps,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct mv88e6xxx_ops mv88e6321_ops = {</div><div class='add'>+	/* MV88E6XXX_FAMILY_6320 */</div><div class='add'>+	.setup_errata = mv88e6320_setup_errata,</div><div class='add'>+	.ieee_pri_map = mv88e6085_g1_ieee_pri_map,</div><div class='add'>+	.ip_pri_map = mv88e6085_g1_ip_pri_map,</div><div class='add'>+	.irl_init_all = mv88e6352_g2_irl_init_all,</div><div class='add'>+	.get_eeprom = mv88e6xxx_g2_get_eeprom16,</div><div class='add'>+	.set_eeprom = mv88e6xxx_g2_set_eeprom16,</div><div class='add'>+	.set_switch_mac = mv88e6xxx_g2_set_switch_mac,</div><div class='add'>+	.phy_read = mv88e6xxx_g2_smi_phy_read_c22,</div><div class='add'>+	.phy_write = mv88e6xxx_g2_smi_phy_write_c22,</div><div class='add'>+	.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,</div><div class='add'>+	.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,</div><div class='add'>+	.port_set_link = mv88e6xxx_port_set_link,</div><div class='add'>+	.port_sync_link = mv88e6xxx_port_sync_link,</div><div class='add'>+	.port_set_rgmii_delay = mv88e6320_port_set_rgmii_delay,</div><div class='add'>+	.port_set_speed_duplex = mv88e6185_port_set_speed_duplex,</div><div class='add'>+	.port_tag_remap = mv88e6095_port_tag_remap,</div><div class='add'>+	.port_set_policy = mv88e6352_port_set_policy,</div><div class='add'>+	.port_set_frame_mode = mv88e6351_port_set_frame_mode,</div><div class='add'>+	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,</div><div class='add'>+	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,</div><div class='add'>+	.port_set_ether_type = mv88e6351_port_set_ether_type,</div><div class='add'>+	.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,</div><div class='add'>+	.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,</div><div class='add'>+	.port_pause_limit = mv88e6097_port_pause_limit,</div><div class='add'>+	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,</div><div class='add'>+	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,</div><div class='add'>+	.port_get_cmode = mv88e6352_port_get_cmode,</div><div class='add'>+	.port_setup_message_port = mv88e6xxx_setup_message_port,</div><div class='add'>+	.stats_snapshot = mv88e6320_g1_stats_snapshot,</div><div class='add'>+	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,</div><div class='add'>+	.stats_get_sset_count = mv88e6320_stats_get_sset_count,</div><div class='add'>+	.stats_get_strings = mv88e6320_stats_get_strings,</div><div class='add'>+	.stats_get_stat = mv88e6320_stats_get_stat,</div><div class='add'>+	.set_cpu_port = mv88e6095_g1_set_cpu_port,</div><div class='add'>+	.set_egress_port = mv88e6095_g1_set_egress_port,</div><div class='add'>+	.watchdog_ops = &amp;mv88e6390_watchdog_ops,</div><div class='add'>+	.mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu,</div><div class='add'>+	.hardware_reset_pre = mv88e6xxx_g2_eeprom_wait,</div><div class='add'>+	.hardware_reset_post = mv88e6xxx_g2_eeprom_wait,</div><div class='add'>+	.reset = mv88e6352_g1_reset,</div><div class='add'>+	.vtu_getnext = mv88e6352_g1_vtu_getnext,</div><div class='add'>+	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,</div><div class='add'>+	.stu_getnext = mv88e6352_g1_stu_getnext,</div><div class='add'>+	.stu_loadpurge = mv88e6352_g1_stu_loadpurge,</div><div class='add'>+	.gpio_ops = &amp;mv88e6352_gpio_ops,</div><div class='add'>+	.avb_ops = &amp;mv88e6352_avb_ops,</div><div class='add'>+	.ptp_ops = &amp;mv88e6352_ptp_ops,</div><div class='add'>+	.phylink_get_caps = mv88e632x_phylink_get_caps,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct mv88e6xxx_ops mv88e6341_ops = {</div><div class='add'>+	/* MV88E6XXX_FAMILY_6341 */</div><div class='add'>+	.ieee_pri_map = mv88e6085_g1_ieee_pri_map,</div><div class='add'>+	.ip_pri_map = mv88e6085_g1_ip_pri_map,</div><div class='add'>+	.irl_init_all = mv88e6352_g2_irl_init_all,</div><div class='add'>+	.get_eeprom = mv88e6xxx_g2_get_eeprom8,</div><div class='add'>+	.set_eeprom = mv88e6xxx_g2_set_eeprom8,</div><div class='add'>+	.set_switch_mac = mv88e6xxx_g2_set_switch_mac,</div><div class='add'>+	.phy_read = mv88e6xxx_g2_smi_phy_read_c22,</div><div class='add'>+	.phy_write = mv88e6xxx_g2_smi_phy_write_c22,</div><div class='add'>+	.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,</div><div class='add'>+	.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,</div><div class='add'>+	.port_set_link = mv88e6xxx_port_set_link,</div><div class='add'>+	.port_sync_link = mv88e6xxx_port_sync_link,</div><div class='add'>+	.port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay,</div><div class='add'>+	.port_set_speed_duplex = mv88e6341_port_set_speed_duplex,</div><div class='add'>+	.port_max_speed_mode = mv88e6341_port_max_speed_mode,</div><div class='add'>+	.port_tag_remap = mv88e6095_port_tag_remap,</div><div class='add'>+	.port_set_policy = mv88e6352_port_set_policy,</div><div class='add'>+	.port_set_frame_mode = mv88e6351_port_set_frame_mode,</div><div class='add'>+	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,</div><div class='add'>+	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,</div><div class='add'>+	.port_set_ether_type = mv88e6351_port_set_ether_type,</div><div class='add'>+	.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,</div><div class='add'>+	.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,</div><div class='add'>+	.port_pause_limit = mv88e6097_port_pause_limit,</div><div class='add'>+	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,</div><div class='add'>+	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,</div><div class='add'>+	.port_get_cmode = mv88e6352_port_get_cmode,</div><div class='add'>+	.port_set_cmode = mv88e6341_port_set_cmode,</div><div class='add'>+	.port_setup_message_port = mv88e6xxx_setup_message_port,</div><div class='add'>+	.stats_snapshot = mv88e6390_g1_stats_snapshot,</div><div class='add'>+	.stats_set_histogram = mv88e6390_g1_stats_set_histogram,</div><div class='add'>+	.stats_get_sset_count = mv88e6320_stats_get_sset_count,</div><div class='add'>+	.stats_get_strings = mv88e6320_stats_get_strings,</div><div class='add'>+	.stats_get_stat = mv88e6390_stats_get_stat,</div><div class='add'>+	.set_cpu_port = mv88e6390_g1_set_cpu_port,</div><div class='add'>+	.set_egress_port = mv88e6390_g1_set_egress_port,</div><div class='add'>+	.watchdog_ops = &amp;mv88e6390_watchdog_ops,</div><div class='add'>+	.mgmt_rsvd2cpu =  mv88e6390_g1_mgmt_rsvd2cpu,</div><div class='add'>+	.pot_clear = mv88e6xxx_g2_pot_clear,</div><div class='add'>+	.hardware_reset_pre = mv88e6xxx_g2_eeprom_wait,</div><div class='add'>+	.hardware_reset_post = mv88e6xxx_g2_eeprom_wait,</div><div class='add'>+	.reset = mv88e6352_g1_reset,</div><div class='add'>+	.rmu_disable = mv88e6390_g1_rmu_disable,</div><div class='add'>+	.atu_get_hash = mv88e6165_g1_atu_get_hash,</div><div class='add'>+	.atu_set_hash = mv88e6165_g1_atu_set_hash,</div><div class='add'>+	.vtu_getnext = mv88e6352_g1_vtu_getnext,</div><div class='add'>+	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,</div><div class='add'>+	.stu_getnext = mv88e6352_g1_stu_getnext,</div><div class='add'>+	.stu_loadpurge = mv88e6352_g1_stu_loadpurge,</div><div class='add'>+	.serdes_get_lane = mv88e6341_serdes_get_lane,</div><div class='add'>+	.serdes_irq_mapping = mv88e6390_serdes_irq_mapping,</div><div class='add'>+	.gpio_ops = &amp;mv88e6352_gpio_ops,</div><div class='add'>+	.avb_ops = &amp;mv88e6390_avb_ops,</div><div class='add'>+	.ptp_ops = &amp;mv88e6352_ptp_ops,</div><div class='add'>+	.serdes_get_sset_count = mv88e6390_serdes_get_sset_count,</div><div class='add'>+	.serdes_get_strings = mv88e6390_serdes_get_strings,</div><div class='add'>+	.serdes_get_stats = mv88e6390_serdes_get_stats,</div><div class='add'>+	.serdes_get_regs_len = mv88e6390_serdes_get_regs_len,</div><div class='add'>+	.serdes_get_regs = mv88e6390_serdes_get_regs,</div><div class='add'>+	.phylink_get_caps = mv88e6341_phylink_get_caps,</div><div class='add'>+	.pcs_ops = &amp;mv88e6390_pcs_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct mv88e6xxx_ops mv88e6350_ops = {</div><div class='add'>+	/* MV88E6XXX_FAMILY_6351 */</div><div class='add'>+	.ieee_pri_map = mv88e6085_g1_ieee_pri_map,</div><div class='add'>+	.ip_pri_map = mv88e6085_g1_ip_pri_map,</div><div class='add'>+	.irl_init_all = mv88e6352_g2_irl_init_all,</div><div class='add'>+	.set_switch_mac = mv88e6xxx_g2_set_switch_mac,</div><div class='add'>+	.phy_read = mv88e6xxx_g2_smi_phy_read_c22,</div><div class='add'>+	.phy_write = mv88e6xxx_g2_smi_phy_write_c22,</div><div class='add'>+	.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,</div><div class='add'>+	.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,</div><div class='add'>+	.port_set_link = mv88e6xxx_port_set_link,</div><div class='add'>+	.port_sync_link = mv88e6xxx_port_sync_link,</div><div class='add'>+	.port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay,</div><div class='add'>+	.port_set_speed_duplex = mv88e6185_port_set_speed_duplex,</div><div class='add'>+	.port_tag_remap = mv88e6095_port_tag_remap,</div><div class='add'>+	.port_set_frame_mode = mv88e6351_port_set_frame_mode,</div><div class='add'>+	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,</div><div class='add'>+	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,</div><div class='add'>+	.port_set_ether_type = mv88e6351_port_set_ether_type,</div><div class='add'>+	.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,</div><div class='add'>+	.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,</div><div class='add'>+	.port_pause_limit = mv88e6097_port_pause_limit,</div><div class='add'>+	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,</div><div class='add'>+	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,</div><div class='add'>+	.port_get_cmode = mv88e6352_port_get_cmode,</div><div class='add'>+	.port_setup_message_port = mv88e6xxx_setup_message_port,</div><div class='add'>+	.stats_snapshot = mv88e6320_g1_stats_snapshot,</div><div class='add'>+	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,</div><div class='add'>+	.stats_get_sset_count = mv88e6095_stats_get_sset_count,</div><div class='add'>+	.stats_get_strings = mv88e6095_stats_get_strings,</div><div class='add'>+	.stats_get_stat = mv88e6095_stats_get_stat,</div><div class='add'>+	.set_cpu_port = mv88e6095_g1_set_cpu_port,</div><div class='add'>+	.set_egress_port = mv88e6095_g1_set_egress_port,</div><div class='add'>+	.watchdog_ops = &amp;mv88e6097_watchdog_ops,</div><div class='add'>+	.mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu,</div><div class='add'>+	.pot_clear = mv88e6xxx_g2_pot_clear,</div><div class='add'>+	.reset = mv88e6352_g1_reset,</div><div class='add'>+	.atu_get_hash = mv88e6165_g1_atu_get_hash,</div><div class='add'>+	.atu_set_hash = mv88e6165_g1_atu_set_hash,</div><div class='add'>+	.vtu_getnext = mv88e6352_g1_vtu_getnext,</div><div class='add'>+	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,</div><div class='add'>+	.stu_getnext = mv88e6352_g1_stu_getnext,</div><div class='add'>+	.stu_loadpurge = mv88e6352_g1_stu_loadpurge,</div><div class='add'>+	.phylink_get_caps = mv88e6351_phylink_get_caps,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct mv88e6xxx_ops mv88e6351_ops = {</div><div class='add'>+	/* MV88E6XXX_FAMILY_6351 */</div><div class='add'>+	.ieee_pri_map = mv88e6085_g1_ieee_pri_map,</div><div class='add'>+	.ip_pri_map = mv88e6085_g1_ip_pri_map,</div><div class='add'>+	.irl_init_all = mv88e6352_g2_irl_init_all,</div><div class='add'>+	.set_switch_mac = mv88e6xxx_g2_set_switch_mac,</div><div class='add'>+	.phy_read = mv88e6xxx_g2_smi_phy_read_c22,</div><div class='add'>+	.phy_write = mv88e6xxx_g2_smi_phy_write_c22,</div><div class='add'>+	.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,</div><div class='add'>+	.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,</div><div class='add'>+	.port_set_link = mv88e6xxx_port_set_link,</div><div class='add'>+	.port_sync_link = mv88e6xxx_port_sync_link,</div><div class='add'>+	.port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay,</div><div class='add'>+	.port_set_speed_duplex = mv88e6185_port_set_speed_duplex,</div><div class='add'>+	.port_tag_remap = mv88e6095_port_tag_remap,</div><div class='add'>+	.port_set_frame_mode = mv88e6351_port_set_frame_mode,</div><div class='add'>+	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,</div><div class='add'>+	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,</div><div class='add'>+	.port_set_ether_type = mv88e6351_port_set_ether_type,</div><div class='add'>+	.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,</div><div class='add'>+	.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,</div><div class='add'>+	.port_pause_limit = mv88e6097_port_pause_limit,</div><div class='add'>+	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,</div><div class='add'>+	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,</div><div class='add'>+	.port_get_cmode = mv88e6352_port_get_cmode,</div><div class='add'>+	.port_setup_message_port = mv88e6xxx_setup_message_port,</div><div class='add'>+	.stats_snapshot = mv88e6320_g1_stats_snapshot,</div><div class='add'>+	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,</div><div class='add'>+	.stats_get_sset_count = mv88e6095_stats_get_sset_count,</div><div class='add'>+	.stats_get_strings = mv88e6095_stats_get_strings,</div><div class='add'>+	.stats_get_stat = mv88e6095_stats_get_stat,</div><div class='add'>+	.set_cpu_port = mv88e6095_g1_set_cpu_port,</div><div class='add'>+	.set_egress_port = mv88e6095_g1_set_egress_port,</div><div class='add'>+	.watchdog_ops = &amp;mv88e6097_watchdog_ops,</div><div class='add'>+	.mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu,</div><div class='add'>+	.pot_clear = mv88e6xxx_g2_pot_clear,</div><div class='add'>+	.reset = mv88e6352_g1_reset,</div><div class='add'>+	.atu_get_hash = mv88e6165_g1_atu_get_hash,</div><div class='add'>+	.atu_set_hash = mv88e6165_g1_atu_set_hash,</div><div class='add'>+	.vtu_getnext = mv88e6352_g1_vtu_getnext,</div><div class='add'>+	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,</div><div class='add'>+	.stu_getnext = mv88e6352_g1_stu_getnext,</div><div class='add'>+	.stu_loadpurge = mv88e6352_g1_stu_loadpurge,</div><div class='add'>+	.avb_ops = &amp;mv88e6352_avb_ops,</div><div class='add'>+	.ptp_ops = &amp;mv88e6352_ptp_ops,</div><div class='add'>+	.phylink_get_caps = mv88e6351_phylink_get_caps,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct mv88e6xxx_ops mv88e6352_ops = {</div><div class='add'>+	/* MV88E6XXX_FAMILY_6352 */</div><div class='add'>+	.ieee_pri_map = mv88e6085_g1_ieee_pri_map,</div><div class='add'>+	.ip_pri_map = mv88e6085_g1_ip_pri_map,</div><div class='add'>+	.irl_init_all = mv88e6352_g2_irl_init_all,</div><div class='add'>+	.get_eeprom = mv88e6xxx_g2_get_eeprom16,</div><div class='add'>+	.set_eeprom = mv88e6xxx_g2_set_eeprom16,</div><div class='add'>+	.set_switch_mac = mv88e6xxx_g2_set_switch_mac,</div><div class='add'>+	.phy_read = mv88e6xxx_g2_smi_phy_read_c22,</div><div class='add'>+	.phy_write = mv88e6xxx_g2_smi_phy_write_c22,</div><div class='add'>+	.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,</div><div class='add'>+	.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,</div><div class='add'>+	.port_set_link = mv88e6xxx_port_set_link,</div><div class='add'>+	.port_sync_link = mv88e6xxx_port_sync_link,</div><div class='add'>+	.port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay,</div><div class='add'>+	.port_set_speed_duplex = mv88e6352_port_set_speed_duplex,</div><div class='add'>+	.port_tag_remap = mv88e6095_port_tag_remap,</div><div class='add'>+	.port_set_policy = mv88e6352_port_set_policy,</div><div class='add'>+	.port_set_frame_mode = mv88e6351_port_set_frame_mode,</div><div class='add'>+	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,</div><div class='add'>+	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,</div><div class='add'>+	.port_set_ether_type = mv88e6351_port_set_ether_type,</div><div class='add'>+	.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,</div><div class='add'>+	.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,</div><div class='add'>+	.port_pause_limit = mv88e6097_port_pause_limit,</div><div class='add'>+	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,</div><div class='add'>+	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,</div><div class='add'>+	.port_get_cmode = mv88e6352_port_get_cmode,</div><div class='add'>+	.port_setup_leds = mv88e6xxx_port_setup_leds,</div><div class='add'>+	.port_setup_message_port = mv88e6xxx_setup_message_port,</div><div class='add'>+	.stats_snapshot = mv88e6320_g1_stats_snapshot,</div><div class='add'>+	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,</div><div class='add'>+	.stats_get_sset_count = mv88e6095_stats_get_sset_count,</div><div class='add'>+	.stats_get_strings = mv88e6095_stats_get_strings,</div><div class='add'>+	.stats_get_stat = mv88e6095_stats_get_stat,</div><div class='add'>+	.set_cpu_port = mv88e6095_g1_set_cpu_port,</div><div class='add'>+	.set_egress_port = mv88e6095_g1_set_egress_port,</div><div class='add'>+	.watchdog_ops = &amp;mv88e6097_watchdog_ops,</div><div class='add'>+	.mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu,</div><div class='add'>+	.pot_clear = mv88e6xxx_g2_pot_clear,</div><div class='add'>+	.hardware_reset_pre = mv88e6xxx_g2_eeprom_wait,</div><div class='add'>+	.hardware_reset_post = mv88e6xxx_g2_eeprom_wait,</div><div class='add'>+	.reset = mv88e6352_g1_reset,</div><div class='add'>+	.rmu_disable = mv88e6352_g1_rmu_disable,</div><div class='add'>+	.atu_get_hash = mv88e6165_g1_atu_get_hash,</div><div class='add'>+	.atu_set_hash = mv88e6165_g1_atu_set_hash,</div><div class='add'>+	.vtu_getnext = mv88e6352_g1_vtu_getnext,</div><div class='add'>+	.vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,</div><div class='add'>+	.stu_getnext = mv88e6352_g1_stu_getnext,</div><div class='add'>+	.stu_loadpurge = mv88e6352_g1_stu_loadpurge,</div><div class='add'>+	.serdes_irq_mapping = mv88e6352_serdes_irq_mapping,</div><div class='add'>+	.gpio_ops = &amp;mv88e6352_gpio_ops,</div><div class='add'>+	.avb_ops = &amp;mv88e6352_avb_ops,</div><div class='add'>+	.ptp_ops = &amp;mv88e6352_ptp_ops,</div><div class='add'>+	.serdes_get_sset_count = mv88e6352_serdes_get_sset_count,</div><div class='add'>+	.serdes_get_strings = mv88e6352_serdes_get_strings,</div><div class='add'>+	.serdes_get_stats = mv88e6352_serdes_get_stats,</div><div class='add'>+	.serdes_get_regs_len = mv88e6352_serdes_get_regs_len,</div><div class='add'>+	.serdes_get_regs = mv88e6352_serdes_get_regs,</div><div class='add'>+	.serdes_set_tx_amplitude = mv88e6352_serdes_set_tx_amplitude,</div><div class='add'>+	.phylink_get_caps = mv88e6352_phylink_get_caps,</div><div class='add'>+	.pcs_ops = &amp;mv88e6352_pcs_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct mv88e6xxx_ops mv88e6390_ops = {</div><div class='add'>+	/* MV88E6XXX_FAMILY_6390 */</div><div class='add'>+	.setup_errata = mv88e6390_setup_errata,</div><div class='add'>+	.irl_init_all = mv88e6390_g2_irl_init_all,</div><div class='add'>+	.get_eeprom = mv88e6xxx_g2_get_eeprom8,</div><div class='add'>+	.set_eeprom = mv88e6xxx_g2_set_eeprom8,</div><div class='add'>+	.set_switch_mac = mv88e6xxx_g2_set_switch_mac,</div><div class='add'>+	.phy_read = mv88e6xxx_g2_smi_phy_read_c22,</div><div class='add'>+	.phy_write = mv88e6xxx_g2_smi_phy_write_c22,</div><div class='add'>+	.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,</div><div class='add'>+	.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,</div><div class='add'>+	.port_set_link = mv88e6xxx_port_set_link,</div><div class='add'>+	.port_sync_link = mv88e6xxx_port_sync_link,</div><div class='add'>+	.port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay,</div><div class='add'>+	.port_set_speed_duplex = mv88e6390_port_set_speed_duplex,</div><div class='add'>+	.port_max_speed_mode = mv88e6390_port_max_speed_mode,</div><div class='add'>+	.port_tag_remap = mv88e6390_port_tag_remap,</div><div class='add'>+	.port_set_policy = mv88e6352_port_set_policy,</div><div class='add'>+	.port_set_frame_mode = mv88e6351_port_set_frame_mode,</div><div class='add'>+	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,</div><div class='add'>+	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,</div><div class='add'>+	.port_set_ether_type = mv88e6351_port_set_ether_type,</div><div class='add'>+	.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,</div><div class='add'>+	.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,</div><div class='add'>+	.port_pause_limit = mv88e6390_port_pause_limit,</div><div class='add'>+	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,</div><div class='add'>+	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,</div><div class='add'>+	.port_get_cmode = mv88e6352_port_get_cmode,</div><div class='add'>+	.port_set_cmode = mv88e6390_port_set_cmode,</div><div class='add'>+	.port_setup_message_port = mv88e6xxx_setup_message_port,</div><div class='add'>+	.stats_snapshot = mv88e6390_g1_stats_snapshot,</div><div class='add'>+	.stats_set_histogram = mv88e6390_g1_stats_set_histogram,</div><div class='add'>+	.stats_get_sset_count = mv88e6320_stats_get_sset_count,</div><div class='add'>+	.stats_get_strings = mv88e6320_stats_get_strings,</div><div class='add'>+	.stats_get_stat = mv88e6390_stats_get_stat,</div><div class='add'>+	.set_cpu_port = mv88e6390_g1_set_cpu_port,</div><div class='add'>+	.set_egress_port = mv88e6390_g1_set_egress_port,</div><div class='add'>+	.watchdog_ops = &amp;mv88e6390_watchdog_ops,</div><div class='add'>+	.mgmt_rsvd2cpu = mv88e6390_g1_mgmt_rsvd2cpu,</div><div class='add'>+	.pot_clear = mv88e6xxx_g2_pot_clear,</div><div class='add'>+	.hardware_reset_pre = mv88e6xxx_g2_eeprom_wait,</div><div class='add'>+	.hardware_reset_post = mv88e6xxx_g2_eeprom_wait,</div><div class='add'>+	.reset = mv88e6352_g1_reset,</div><div class='add'>+	.rmu_disable = mv88e6390_g1_rmu_disable,</div><div class='add'>+	.atu_get_hash = mv88e6165_g1_atu_get_hash,</div><div class='add'>+	.atu_set_hash = mv88e6165_g1_atu_set_hash,</div><div class='add'>+	.vtu_getnext = mv88e6390_g1_vtu_getnext,</div><div class='add'>+	.vtu_loadpurge = mv88e6390_g1_vtu_loadpurge,</div><div class='add'>+	.stu_getnext = mv88e6390_g1_stu_getnext,</div><div class='add'>+	.stu_loadpurge = mv88e6390_g1_stu_loadpurge,</div><div class='add'>+	.serdes_get_lane = mv88e6390_serdes_get_lane,</div><div class='add'>+	.serdes_irq_mapping = mv88e6390_serdes_irq_mapping,</div><div class='add'>+	.gpio_ops = &amp;mv88e6352_gpio_ops,</div><div class='add'>+	.avb_ops = &amp;mv88e6390_avb_ops,</div><div class='add'>+	.ptp_ops = &amp;mv88e6390_ptp_ops,</div><div class='add'>+	.serdes_get_sset_count = mv88e6390_serdes_get_sset_count,</div><div class='add'>+	.serdes_get_strings = mv88e6390_serdes_get_strings,</div><div class='add'>+	.serdes_get_stats = mv88e6390_serdes_get_stats,</div><div class='add'>+	.serdes_get_regs_len = mv88e6390_serdes_get_regs_len,</div><div class='add'>+	.serdes_get_regs = mv88e6390_serdes_get_regs,</div><div class='add'>+	.phylink_get_caps = mv88e6390_phylink_get_caps,</div><div class='add'>+	.pcs_ops = &amp;mv88e6390_pcs_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct mv88e6xxx_ops mv88e6390x_ops = {</div><div class='add'>+	/* MV88E6XXX_FAMILY_6390 */</div><div class='add'>+	.setup_errata = mv88e6390_setup_errata,</div><div class='add'>+	.irl_init_all = mv88e6390_g2_irl_init_all,</div><div class='add'>+	.get_eeprom = mv88e6xxx_g2_get_eeprom8,</div><div class='add'>+	.set_eeprom = mv88e6xxx_g2_set_eeprom8,</div><div class='add'>+	.set_switch_mac = mv88e6xxx_g2_set_switch_mac,</div><div class='add'>+	.phy_read = mv88e6xxx_g2_smi_phy_read_c22,</div><div class='add'>+	.phy_write = mv88e6xxx_g2_smi_phy_write_c22,</div><div class='add'>+	.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,</div><div class='add'>+	.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,</div><div class='add'>+	.port_set_link = mv88e6xxx_port_set_link,</div><div class='add'>+	.port_sync_link = mv88e6xxx_port_sync_link,</div><div class='add'>+	.port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay,</div><div class='add'>+	.port_set_speed_duplex = mv88e6390x_port_set_speed_duplex,</div><div class='add'>+	.port_max_speed_mode = mv88e6390x_port_max_speed_mode,</div><div class='add'>+	.port_tag_remap = mv88e6390_port_tag_remap,</div><div class='add'>+	.port_set_policy = mv88e6352_port_set_policy,</div><div class='add'>+	.port_set_frame_mode = mv88e6351_port_set_frame_mode,</div><div class='add'>+	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,</div><div class='add'>+	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,</div><div class='add'>+	.port_set_ether_type = mv88e6351_port_set_ether_type,</div><div class='add'>+	.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,</div><div class='add'>+	.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,</div><div class='add'>+	.port_pause_limit = mv88e6390_port_pause_limit,</div><div class='add'>+	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,</div><div class='add'>+	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,</div><div class='add'>+	.port_get_cmode = mv88e6352_port_get_cmode,</div><div class='add'>+	.port_set_cmode = mv88e6390x_port_set_cmode,</div><div class='add'>+	.port_setup_message_port = mv88e6xxx_setup_message_port,</div><div class='add'>+	.stats_snapshot = mv88e6390_g1_stats_snapshot,</div><div class='add'>+	.stats_set_histogram = mv88e6390_g1_stats_set_histogram,</div><div class='add'>+	.stats_get_sset_count = mv88e6320_stats_get_sset_count,</div><div class='add'>+	.stats_get_strings = mv88e6320_stats_get_strings,</div><div class='add'>+	.stats_get_stat = mv88e6390_stats_get_stat,</div><div class='add'>+	.set_cpu_port = mv88e6390_g1_set_cpu_port,</div><div class='add'>+	.set_egress_port = mv88e6390_g1_set_egress_port,</div><div class='add'>+	.watchdog_ops = &amp;mv88e6390_watchdog_ops,</div><div class='add'>+	.mgmt_rsvd2cpu = mv88e6390_g1_mgmt_rsvd2cpu,</div><div class='add'>+	.pot_clear = mv88e6xxx_g2_pot_clear,</div><div class='add'>+	.hardware_reset_pre = mv88e6xxx_g2_eeprom_wait,</div><div class='add'>+	.hardware_reset_post = mv88e6xxx_g2_eeprom_wait,</div><div class='add'>+	.reset = mv88e6352_g1_reset,</div><div class='add'>+	.rmu_disable = mv88e6390_g1_rmu_disable,</div><div class='add'>+	.atu_get_hash = mv88e6165_g1_atu_get_hash,</div><div class='add'>+	.atu_set_hash = mv88e6165_g1_atu_set_hash,</div><div class='add'>+	.vtu_getnext = mv88e6390_g1_vtu_getnext,</div><div class='add'>+	.vtu_loadpurge = mv88e6390_g1_vtu_loadpurge,</div><div class='add'>+	.stu_getnext = mv88e6390_g1_stu_getnext,</div><div class='add'>+	.stu_loadpurge = mv88e6390_g1_stu_loadpurge,</div><div class='add'>+	.serdes_get_lane = mv88e6390x_serdes_get_lane,</div><div class='add'>+	.serdes_irq_mapping = mv88e6390_serdes_irq_mapping,</div><div class='add'>+	.serdes_get_sset_count = mv88e6390_serdes_get_sset_count,</div><div class='add'>+	.serdes_get_strings = mv88e6390_serdes_get_strings,</div><div class='add'>+	.serdes_get_stats = mv88e6390_serdes_get_stats,</div><div class='add'>+	.serdes_get_regs_len = mv88e6390_serdes_get_regs_len,</div><div class='add'>+	.serdes_get_regs = mv88e6390_serdes_get_regs,</div><div class='add'>+	.gpio_ops = &amp;mv88e6352_gpio_ops,</div><div class='add'>+	.avb_ops = &amp;mv88e6390_avb_ops,</div><div class='add'>+	.ptp_ops = &amp;mv88e6390_ptp_ops,</div><div class='add'>+	.phylink_get_caps = mv88e6390x_phylink_get_caps,</div><div class='add'>+	.pcs_ops = &amp;mv88e6390_pcs_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct mv88e6xxx_ops mv88e6393x_ops = {</div><div class='add'>+	/* MV88E6XXX_FAMILY_6393 */</div><div class='add'>+	.irl_init_all = mv88e6390_g2_irl_init_all,</div><div class='add'>+	.get_eeprom = mv88e6xxx_g2_get_eeprom8,</div><div class='add'>+	.set_eeprom = mv88e6xxx_g2_set_eeprom8,</div><div class='add'>+	.set_switch_mac = mv88e6xxx_g2_set_switch_mac,</div><div class='add'>+	.phy_read = mv88e6xxx_g2_smi_phy_read_c22,</div><div class='add'>+	.phy_write = mv88e6xxx_g2_smi_phy_write_c22,</div><div class='add'>+	.phy_read_c45 = mv88e6xxx_g2_smi_phy_read_c45,</div><div class='add'>+	.phy_write_c45 = mv88e6xxx_g2_smi_phy_write_c45,</div><div class='add'>+	.port_set_link = mv88e6xxx_port_set_link,</div><div class='add'>+	.port_sync_link = mv88e6xxx_port_sync_link,</div><div class='add'>+	.port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay,</div><div class='add'>+	.port_set_speed_duplex = mv88e6393x_port_set_speed_duplex,</div><div class='add'>+	.port_max_speed_mode = mv88e6393x_port_max_speed_mode,</div><div class='add'>+	.port_tag_remap = mv88e6390_port_tag_remap,</div><div class='add'>+	.port_set_policy = mv88e6393x_port_set_policy,</div><div class='add'>+	.port_set_frame_mode = mv88e6351_port_set_frame_mode,</div><div class='add'>+	.port_set_ucast_flood = mv88e6352_port_set_ucast_flood,</div><div class='add'>+	.port_set_mcast_flood = mv88e6352_port_set_mcast_flood,</div><div class='add'>+	.port_set_ether_type = mv88e6393x_port_set_ether_type,</div><div class='add'>+	.port_set_jumbo_size = mv88e6165_port_set_jumbo_size,</div><div class='add'>+	.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,</div><div class='add'>+	.port_pause_limit = mv88e6390_port_pause_limit,</div><div class='add'>+	.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,</div><div class='add'>+	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,</div><div class='add'>+	.port_get_cmode = mv88e6352_port_get_cmode,</div><div class='add'>+	.port_set_cmode = mv88e6393x_port_set_cmode,</div><div class='add'>+	.port_setup_message_port = mv88e6xxx_setup_message_port,</div><div class='add'>+	.port_set_upstream_port = mv88e6393x_port_set_upstream_port,</div><div class='add'>+	.stats_snapshot = mv88e6390_g1_stats_snapshot,</div><div class='add'>+	.stats_set_histogram = mv88e6390_g1_stats_set_histogram,</div><div class='add'>+	.stats_get_sset_count = mv88e6320_stats_get_sset_count,</div><div class='add'>+	.stats_get_strings = mv88e6320_stats_get_strings,</div><div class='add'>+	.stats_get_stat = mv88e6390_stats_get_stat,</div><div class='add'>+	/* .set_cpu_port is missing because this family does not support a global</div><div class='add'>+	 * CPU port, only per port CPU port which is set via</div><div class='add'>+	 * .port_set_upstream_port method.</div><div class='add'>+	 */</div><div class='add'>+	.set_egress_port = mv88e6393x_set_egress_port,</div><div class='add'>+	.watchdog_ops = &amp;mv88e6393x_watchdog_ops,</div><div class='add'>+	.mgmt_rsvd2cpu = mv88e6393x_port_mgmt_rsvd2cpu,</div><div class='add'>+	.pot_clear = mv88e6xxx_g2_pot_clear,</div><div class='add'>+	.hardware_reset_pre = mv88e6xxx_g2_eeprom_wait,</div><div class='add'>+	.hardware_reset_post = mv88e6xxx_g2_eeprom_wait,</div><div class='add'>+	.reset = mv88e6352_g1_reset,</div><div class='add'>+	.rmu_disable = mv88e6390_g1_rmu_disable,</div><div class='add'>+	.atu_get_hash = mv88e6165_g1_atu_get_hash,</div><div class='add'>+	.atu_set_hash = mv88e6165_g1_atu_set_hash,</div><div class='add'>+	.vtu_getnext = mv88e6390_g1_vtu_getnext,</div><div class='add'>+	.vtu_loadpurge = mv88e6390_g1_vtu_loadpurge,</div><div class='add'>+	.stu_getnext = mv88e6390_g1_stu_getnext,</div><div class='add'>+	.stu_loadpurge = mv88e6390_g1_stu_loadpurge,</div><div class='add'>+	.serdes_get_lane = mv88e6393x_serdes_get_lane,</div><div class='add'>+	.serdes_irq_mapping = mv88e6390_serdes_irq_mapping,</div><div class='add'>+	/* TODO: serdes stats */</div><div class='add'>+	.gpio_ops = &amp;mv88e6352_gpio_ops,</div><div class='add'>+	.avb_ops = &amp;mv88e6390_avb_ops,</div><div class='add'>+	.ptp_ops = &amp;mv88e6352_ptp_ops,</div><div class='add'>+	.phylink_get_caps = mv88e6393x_phylink_get_caps,</div><div class='add'>+	.pcs_ops = &amp;mv88e6393x_pcs_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct mv88e6xxx_info mv88e6xxx_table[] = {</div><div class='add'>+	[MV88E6020] = {</div><div class='add'>+		.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6020,</div><div class='add'>+		.family = MV88E6XXX_FAMILY_6250,</div><div class='add'>+		.name = "Marvell 88E6020",</div><div class='add'>+		.num_databases = 64,</div><div class='add'>+		/* Ports 2-4 are not routed to pins</div><div class='add'>+		 * =&gt; usable ports 0, 1, 5, 6</div><div class='add'>+		 */</div><div class='add'>+		.num_ports = 7,</div><div class='add'>+		.num_internal_phys = 2,</div><div class='add'>+		.invalid_port_mask = BIT(2) | BIT(3) | BIT(4),</div><div class='add'>+		.max_vid = 4095,</div><div class='add'>+		.port_base_addr = 0x8,</div><div class='add'>+		.phy_base_addr = 0x0,</div><div class='add'>+		.global1_addr = 0xf,</div><div class='add'>+		.global2_addr = 0x7,</div><div class='add'>+		.age_time_coeff = 15000,</div><div class='add'>+		.g1_irqs = 9,</div><div class='add'>+		.g2_irqs = 5,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0,</div><div class='add'>+		.atu_move_port_mask = 0xf,</div><div class='add'>+		.dual_chip = true,</div><div class='add'>+		.ops = &amp;mv88e6250_ops,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[MV88E6071] = {</div><div class='add'>+		.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6071,</div><div class='add'>+		.family = MV88E6XXX_FAMILY_6250,</div><div class='add'>+		.name = "Marvell 88E6071",</div><div class='add'>+		.num_databases = 64,</div><div class='add'>+		.num_ports = 7,</div><div class='add'>+		.num_internal_phys = 5,</div><div class='add'>+		.max_vid = 4095,</div><div class='add'>+		.port_base_addr = 0x08,</div><div class='add'>+		.phy_base_addr = 0x00,</div><div class='add'>+		.global1_addr = 0x0f,</div><div class='add'>+		.global2_addr = 0x07,</div><div class='add'>+		.age_time_coeff = 15000,</div><div class='add'>+		.g1_irqs = 9,</div><div class='add'>+		.g2_irqs = 5,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0,</div><div class='add'>+		.atu_move_port_mask = 0xf,</div><div class='add'>+		.dual_chip = true,</div><div class='add'>+		.ops = &amp;mv88e6250_ops,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[MV88E6085] = {</div><div class='add'>+		.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6085,</div><div class='add'>+		.family = MV88E6XXX_FAMILY_6097,</div><div class='add'>+		.name = "Marvell 88E6085",</div><div class='add'>+		.num_databases = 4096,</div><div class='add'>+		.num_macs = 8192,</div><div class='add'>+		.num_ports = 10,</div><div class='add'>+		.num_internal_phys = 5,</div><div class='add'>+		.max_vid = 4095,</div><div class='add'>+		.max_sid = 63,</div><div class='add'>+		.port_base_addr = 0x10,</div><div class='add'>+		.phy_base_addr = 0x0,</div><div class='add'>+		.global1_addr = 0x1b,</div><div class='add'>+		.global2_addr = 0x1c,</div><div class='add'>+		.age_time_coeff = 15000,</div><div class='add'>+		.g1_irqs = 8,</div><div class='add'>+		.g2_irqs = 10,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_PORT,</div><div class='add'>+		.atu_move_port_mask = 0xf,</div><div class='add'>+		.pvt = true,</div><div class='add'>+		.multi_chip = true,</div><div class='add'>+		.ops = &amp;mv88e6085_ops,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[MV88E6095] = {</div><div class='add'>+		.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6095,</div><div class='add'>+		.family = MV88E6XXX_FAMILY_6095,</div><div class='add'>+		.name = "Marvell 88E6095/88E6095F",</div><div class='add'>+		.num_databases = 256,</div><div class='add'>+		.num_macs = 8192,</div><div class='add'>+		.num_ports = 11,</div><div class='add'>+		.num_internal_phys = 0,</div><div class='add'>+		.max_vid = 4095,</div><div class='add'>+		.port_base_addr = 0x10,</div><div class='add'>+		.phy_base_addr = 0x0,</div><div class='add'>+		.global1_addr = 0x1b,</div><div class='add'>+		.global2_addr = 0x1c,</div><div class='add'>+		.age_time_coeff = 15000,</div><div class='add'>+		.g1_irqs = 8,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_PORT,</div><div class='add'>+		.atu_move_port_mask = 0xf,</div><div class='add'>+		.multi_chip = true,</div><div class='add'>+		.ops = &amp;mv88e6095_ops,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[MV88E6097] = {</div><div class='add'>+		.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6097,</div><div class='add'>+		.family = MV88E6XXX_FAMILY_6097,</div><div class='add'>+		.name = "Marvell 88E6097/88E6097F",</div><div class='add'>+		.num_databases = 4096,</div><div class='add'>+		.num_macs = 8192,</div><div class='add'>+		.num_ports = 11,</div><div class='add'>+		.num_internal_phys = 8,</div><div class='add'>+		.max_vid = 4095,</div><div class='add'>+		.max_sid = 63,</div><div class='add'>+		.port_base_addr = 0x10,</div><div class='add'>+		.phy_base_addr = 0x0,</div><div class='add'>+		.global1_addr = 0x1b,</div><div class='add'>+		.global2_addr = 0x1c,</div><div class='add'>+		.age_time_coeff = 15000,</div><div class='add'>+		.g1_irqs = 8,</div><div class='add'>+		.g2_irqs = 10,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_PORT,</div><div class='add'>+		.atu_move_port_mask = 0xf,</div><div class='add'>+		.pvt = true,</div><div class='add'>+		.multi_chip = true,</div><div class='add'>+		.edsa_support = MV88E6XXX_EDSA_SUPPORTED,</div><div class='add'>+		.ops = &amp;mv88e6097_ops,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[MV88E6123] = {</div><div class='add'>+		.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6123,</div><div class='add'>+		.family = MV88E6XXX_FAMILY_6165,</div><div class='add'>+		.name = "Marvell 88E6123",</div><div class='add'>+		.num_databases = 4096,</div><div class='add'>+		.num_macs = 1024,</div><div class='add'>+		.num_ports = 3,</div><div class='add'>+		.num_internal_phys = 5,</div><div class='add'>+		.max_vid = 4095,</div><div class='add'>+		.max_sid = 63,</div><div class='add'>+		.port_base_addr = 0x10,</div><div class='add'>+		.phy_base_addr = 0x0,</div><div class='add'>+		.global1_addr = 0x1b,</div><div class='add'>+		.global2_addr = 0x1c,</div><div class='add'>+		.age_time_coeff = 15000,</div><div class='add'>+		.g1_irqs = 9,</div><div class='add'>+		.g2_irqs = 10,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_PORT,</div><div class='add'>+		.atu_move_port_mask = 0xf,</div><div class='add'>+		.pvt = true,</div><div class='add'>+		.multi_chip = true,</div><div class='add'>+		.edsa_support = MV88E6XXX_EDSA_SUPPORTED,</div><div class='add'>+		.ops = &amp;mv88e6123_ops,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[MV88E6131] = {</div><div class='add'>+		.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6131,</div><div class='add'>+		.family = MV88E6XXX_FAMILY_6185,</div><div class='add'>+		.name = "Marvell 88E6131",</div><div class='add'>+		.num_databases = 256,</div><div class='add'>+		.num_macs = 8192,</div><div class='add'>+		.num_ports = 8,</div><div class='add'>+		.num_internal_phys = 0,</div><div class='add'>+		.max_vid = 4095,</div><div class='add'>+		.port_base_addr = 0x10,</div><div class='add'>+		.phy_base_addr = 0x0,</div><div class='add'>+		.global1_addr = 0x1b,</div><div class='add'>+		.global2_addr = 0x1c,</div><div class='add'>+		.age_time_coeff = 15000,</div><div class='add'>+		.g1_irqs = 9,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_PORT,</div><div class='add'>+		.atu_move_port_mask = 0xf,</div><div class='add'>+		.multi_chip = true,</div><div class='add'>+		.ops = &amp;mv88e6131_ops,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[MV88E6141] = {</div><div class='add'>+		.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6141,</div><div class='add'>+		.family = MV88E6XXX_FAMILY_6341,</div><div class='add'>+		.name = "Marvell 88E6141",</div><div class='add'>+		.num_databases = 256,</div><div class='add'>+		.num_macs = 2048,</div><div class='add'>+		.num_ports = 6,</div><div class='add'>+		.num_internal_phys = 5,</div><div class='add'>+		.num_gpio = 11,</div><div class='add'>+		.max_vid = 4095,</div><div class='add'>+		.max_sid = 63,</div><div class='add'>+		.port_base_addr = 0x10,</div><div class='add'>+		.phy_base_addr = 0x10,</div><div class='add'>+		.global1_addr = 0x1b,</div><div class='add'>+		.global2_addr = 0x1c,</div><div class='add'>+		.age_time_coeff = 3750,</div><div class='add'>+		.atu_move_port_mask = 0xf,</div><div class='add'>+		.g1_irqs = 9,</div><div class='add'>+		.g2_irqs = 10,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_BANK1,</div><div class='add'>+		.pvt = true,</div><div class='add'>+		.multi_chip = true,</div><div class='add'>+		.edsa_support = MV88E6XXX_EDSA_SUPPORTED,</div><div class='add'>+		.ops = &amp;mv88e6141_ops,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[MV88E6161] = {</div><div class='add'>+		.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6161,</div><div class='add'>+		.family = MV88E6XXX_FAMILY_6165,</div><div class='add'>+		.name = "Marvell 88E6161",</div><div class='add'>+		.num_databases = 4096,</div><div class='add'>+		.num_macs = 1024,</div><div class='add'>+		.num_ports = 6,</div><div class='add'>+		.num_internal_phys = 5,</div><div class='add'>+		.max_vid = 4095,</div><div class='add'>+		.max_sid = 63,</div><div class='add'>+		.port_base_addr = 0x10,</div><div class='add'>+		.phy_base_addr = 0x0,</div><div class='add'>+		.global1_addr = 0x1b,</div><div class='add'>+		.global2_addr = 0x1c,</div><div class='add'>+		.age_time_coeff = 15000,</div><div class='add'>+		.g1_irqs = 9,</div><div class='add'>+		.g2_irqs = 10,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_PORT,</div><div class='add'>+		.atu_move_port_mask = 0xf,</div><div class='add'>+		.pvt = true,</div><div class='add'>+		.multi_chip = true,</div><div class='add'>+		.edsa_support = MV88E6XXX_EDSA_SUPPORTED,</div><div class='add'>+		.ptp_support = true,</div><div class='add'>+		.ops = &amp;mv88e6161_ops,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[MV88E6165] = {</div><div class='add'>+		.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6165,</div><div class='add'>+		.family = MV88E6XXX_FAMILY_6165,</div><div class='add'>+		.name = "Marvell 88E6165",</div><div class='add'>+		.num_databases = 4096,</div><div class='add'>+		.num_macs = 8192,</div><div class='add'>+		.num_ports = 6,</div><div class='add'>+		.num_internal_phys = 0,</div><div class='add'>+		.max_vid = 4095,</div><div class='add'>+		.max_sid = 63,</div><div class='add'>+		.port_base_addr = 0x10,</div><div class='add'>+		.phy_base_addr = 0x0,</div><div class='add'>+		.global1_addr = 0x1b,</div><div class='add'>+		.global2_addr = 0x1c,</div><div class='add'>+		.age_time_coeff = 15000,</div><div class='add'>+		.g1_irqs = 9,</div><div class='add'>+		.g2_irqs = 10,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_PORT,</div><div class='add'>+		.atu_move_port_mask = 0xf,</div><div class='add'>+		.pvt = true,</div><div class='add'>+		.multi_chip = true,</div><div class='add'>+		.ptp_support = true,</div><div class='add'>+		.ops = &amp;mv88e6165_ops,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[MV88E6171] = {</div><div class='add'>+		.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6171,</div><div class='add'>+		.family = MV88E6XXX_FAMILY_6351,</div><div class='add'>+		.name = "Marvell 88E6171",</div><div class='add'>+		.num_databases = 4096,</div><div class='add'>+		.num_macs = 8192,</div><div class='add'>+		.num_ports = 7,</div><div class='add'>+		.num_internal_phys = 5,</div><div class='add'>+		.max_vid = 4095,</div><div class='add'>+		.max_sid = 63,</div><div class='add'>+		.port_base_addr = 0x10,</div><div class='add'>+		.phy_base_addr = 0x0,</div><div class='add'>+		.global1_addr = 0x1b,</div><div class='add'>+		.global2_addr = 0x1c,</div><div class='add'>+		.age_time_coeff = 15000,</div><div class='add'>+		.g1_irqs = 9,</div><div class='add'>+		.g2_irqs = 10,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_BANK1,</div><div class='add'>+		.atu_move_port_mask = 0xf,</div><div class='add'>+		.pvt = true,</div><div class='add'>+		.multi_chip = true,</div><div class='add'>+		.edsa_support = MV88E6XXX_EDSA_SUPPORTED,</div><div class='add'>+		.ops = &amp;mv88e6171_ops,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[MV88E6172] = {</div><div class='add'>+		.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6172,</div><div class='add'>+		.family = MV88E6XXX_FAMILY_6352,</div><div class='add'>+		.name = "Marvell 88E6172",</div><div class='add'>+		.num_databases = 4096,</div><div class='add'>+		.num_macs = 8192,</div><div class='add'>+		.num_ports = 7,</div><div class='add'>+		.num_internal_phys = 5,</div><div class='add'>+		.num_gpio = 15,</div><div class='add'>+		.max_vid = 4095,</div><div class='add'>+		.max_sid = 63,</div><div class='add'>+		.port_base_addr = 0x10,</div><div class='add'>+		.phy_base_addr = 0x0,</div><div class='add'>+		.global1_addr = 0x1b,</div><div class='add'>+		.global2_addr = 0x1c,</div><div class='add'>+		.age_time_coeff = 15000,</div><div class='add'>+		.g1_irqs = 9,</div><div class='add'>+		.g2_irqs = 10,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_PORT,</div><div class='add'>+		.atu_move_port_mask = 0xf,</div><div class='add'>+		.pvt = true,</div><div class='add'>+		.multi_chip = true,</div><div class='add'>+		.edsa_support = MV88E6XXX_EDSA_SUPPORTED,</div><div class='add'>+		.ops = &amp;mv88e6172_ops,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[MV88E6175] = {</div><div class='add'>+		.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6175,</div><div class='add'>+		.family = MV88E6XXX_FAMILY_6351,</div><div class='add'>+		.name = "Marvell 88E6175",</div><div class='add'>+		.num_databases = 4096,</div><div class='add'>+		.num_macs = 8192,</div><div class='add'>+		.num_ports = 7,</div><div class='add'>+		.num_internal_phys = 5,</div><div class='add'>+		.max_vid = 4095,</div><div class='add'>+		.max_sid = 63,</div><div class='add'>+		.port_base_addr = 0x10,</div><div class='add'>+		.phy_base_addr = 0x0,</div><div class='add'>+		.global1_addr = 0x1b,</div><div class='add'>+		.global2_addr = 0x1c,</div><div class='add'>+		.age_time_coeff = 15000,</div><div class='add'>+		.g1_irqs = 9,</div><div class='add'>+		.g2_irqs = 10,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_PORT,</div><div class='add'>+		.atu_move_port_mask = 0xf,</div><div class='add'>+		.pvt = true,</div><div class='add'>+		.multi_chip = true,</div><div class='add'>+		.edsa_support = MV88E6XXX_EDSA_SUPPORTED,</div><div class='add'>+		.ops = &amp;mv88e6175_ops,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[MV88E6176] = {</div><div class='add'>+		.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6176,</div><div class='add'>+		.family = MV88E6XXX_FAMILY_6352,</div><div class='add'>+		.name = "Marvell 88E6176",</div><div class='add'>+		.num_databases = 4096,</div><div class='add'>+		.num_macs = 8192,</div><div class='add'>+		.num_ports = 7,</div><div class='add'>+		.num_internal_phys = 5,</div><div class='add'>+		.num_gpio = 15,</div><div class='add'>+		.max_vid = 4095,</div><div class='add'>+		.max_sid = 63,</div><div class='add'>+		.port_base_addr = 0x10,</div><div class='add'>+		.phy_base_addr = 0x0,</div><div class='add'>+		.global1_addr = 0x1b,</div><div class='add'>+		.global2_addr = 0x1c,</div><div class='add'>+		.age_time_coeff = 15000,</div><div class='add'>+		.g1_irqs = 9,</div><div class='add'>+		.g2_irqs = 10,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_PORT,</div><div class='add'>+		.atu_move_port_mask = 0xf,</div><div class='add'>+		.pvt = true,</div><div class='add'>+		.multi_chip = true,</div><div class='add'>+		.edsa_support = MV88E6XXX_EDSA_SUPPORTED,</div><div class='add'>+		.ops = &amp;mv88e6176_ops,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[MV88E6185] = {</div><div class='add'>+		.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6185,</div><div class='add'>+		.family = MV88E6XXX_FAMILY_6185,</div><div class='add'>+		.name = "Marvell 88E6185",</div><div class='add'>+		.num_databases = 256,</div><div class='add'>+		.num_macs = 8192,</div><div class='add'>+		.num_ports = 10,</div><div class='add'>+		.num_internal_phys = 0,</div><div class='add'>+		.max_vid = 4095,</div><div class='add'>+		.port_base_addr = 0x10,</div><div class='add'>+		.phy_base_addr = 0x0,</div><div class='add'>+		.global1_addr = 0x1b,</div><div class='add'>+		.global2_addr = 0x1c,</div><div class='add'>+		.age_time_coeff = 15000,</div><div class='add'>+		.g1_irqs = 8,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_PORT,</div><div class='add'>+		.atu_move_port_mask = 0xf,</div><div class='add'>+		.multi_chip = true,</div><div class='add'>+		.edsa_support = MV88E6XXX_EDSA_SUPPORTED,</div><div class='add'>+		.ops = &amp;mv88e6185_ops,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[MV88E6190] = {</div><div class='add'>+		.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6190,</div><div class='add'>+		.family = MV88E6XXX_FAMILY_6390,</div><div class='add'>+		.name = "Marvell 88E6190",</div><div class='add'>+		.num_databases = 4096,</div><div class='add'>+		.num_macs = 16384,</div><div class='add'>+		.num_ports = 11,	/* 10 + Z80 */</div><div class='add'>+		.num_internal_phys = 9,</div><div class='add'>+		.num_gpio = 16,</div><div class='add'>+		.max_vid = 8191,</div><div class='add'>+		.max_sid = 63,</div><div class='add'>+		.port_base_addr = 0x0,</div><div class='add'>+		.phy_base_addr = 0x0,</div><div class='add'>+		.global1_addr = 0x1b,</div><div class='add'>+		.global2_addr = 0x1c,</div><div class='add'>+		.age_time_coeff = 3750,</div><div class='add'>+		.g1_irqs = 9,</div><div class='add'>+		.g2_irqs = 14,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_BANK1,</div><div class='add'>+		.pvt = true,</div><div class='add'>+		.multi_chip = true,</div><div class='add'>+		.atu_move_port_mask = 0x1f,</div><div class='add'>+		.ops = &amp;mv88e6190_ops,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[MV88E6190X] = {</div><div class='add'>+		.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6190X,</div><div class='add'>+		.family = MV88E6XXX_FAMILY_6390,</div><div class='add'>+		.name = "Marvell 88E6190X",</div><div class='add'>+		.num_databases = 4096,</div><div class='add'>+		.num_macs = 16384,</div><div class='add'>+		.num_ports = 11,	/* 10 + Z80 */</div><div class='add'>+		.num_internal_phys = 9,</div><div class='add'>+		.num_gpio = 16,</div><div class='add'>+		.max_vid = 8191,</div><div class='add'>+		.max_sid = 63,</div><div class='add'>+		.port_base_addr = 0x0,</div><div class='add'>+		.phy_base_addr = 0x0,</div><div class='add'>+		.global1_addr = 0x1b,</div><div class='add'>+		.global2_addr = 0x1c,</div><div class='add'>+		.age_time_coeff = 3750,</div><div class='add'>+		.g1_irqs = 9,</div><div class='add'>+		.g2_irqs = 14,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_BANK1,</div><div class='add'>+		.atu_move_port_mask = 0x1f,</div><div class='add'>+		.pvt = true,</div><div class='add'>+		.multi_chip = true,</div><div class='add'>+		.ops = &amp;mv88e6190x_ops,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[MV88E6191] = {</div><div class='add'>+		.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6191,</div><div class='add'>+		.family = MV88E6XXX_FAMILY_6390,</div><div class='add'>+		.name = "Marvell 88E6191",</div><div class='add'>+		.num_databases = 4096,</div><div class='add'>+		.num_macs = 16384,</div><div class='add'>+		.num_ports = 11,	/* 10 + Z80 */</div><div class='add'>+		.num_internal_phys = 9,</div><div class='add'>+		.max_vid = 8191,</div><div class='add'>+		.max_sid = 63,</div><div class='add'>+		.port_base_addr = 0x0,</div><div class='add'>+		.phy_base_addr = 0x0,</div><div class='add'>+		.global1_addr = 0x1b,</div><div class='add'>+		.global2_addr = 0x1c,</div><div class='add'>+		.age_time_coeff = 3750,</div><div class='add'>+		.g1_irqs = 9,</div><div class='add'>+		.g2_irqs = 14,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_BANK1,</div><div class='add'>+		.atu_move_port_mask = 0x1f,</div><div class='add'>+		.pvt = true,</div><div class='add'>+		.multi_chip = true,</div><div class='add'>+		.ptp_support = true,</div><div class='add'>+		.ops = &amp;mv88e6191_ops,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[MV88E6191X] = {</div><div class='add'>+		.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6191X,</div><div class='add'>+		.family = MV88E6XXX_FAMILY_6393,</div><div class='add'>+		.name = "Marvell 88E6191X",</div><div class='add'>+		.num_databases = 4096,</div><div class='add'>+		.num_ports = 11,	/* 10 + Z80 */</div><div class='add'>+		.num_internal_phys = 8,</div><div class='add'>+		.internal_phys_offset = 1,</div><div class='add'>+		.max_vid = 8191,</div><div class='add'>+		.max_sid = 63,</div><div class='add'>+		.port_base_addr = 0x0,</div><div class='add'>+		.phy_base_addr = 0x0,</div><div class='add'>+		.global1_addr = 0x1b,</div><div class='add'>+		.global2_addr = 0x1c,</div><div class='add'>+		.age_time_coeff = 3750,</div><div class='add'>+		.g1_irqs = 10,</div><div class='add'>+		.g2_irqs = 14,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_BANK1,</div><div class='add'>+		.atu_move_port_mask = 0x1f,</div><div class='add'>+		.pvt = true,</div><div class='add'>+		.multi_chip = true,</div><div class='add'>+		.ptp_support = true,</div><div class='add'>+		.ops = &amp;mv88e6393x_ops,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[MV88E6193X] = {</div><div class='add'>+		.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6193X,</div><div class='add'>+		.family = MV88E6XXX_FAMILY_6393,</div><div class='add'>+		.name = "Marvell 88E6193X",</div><div class='add'>+		.num_databases = 4096,</div><div class='add'>+		.num_ports = 11,	/* 10 + Z80 */</div><div class='add'>+		.num_internal_phys = 8,</div><div class='add'>+		.internal_phys_offset = 1,</div><div class='add'>+		.max_vid = 8191,</div><div class='add'>+		.max_sid = 63,</div><div class='add'>+		.port_base_addr = 0x0,</div><div class='add'>+		.phy_base_addr = 0x0,</div><div class='add'>+		.global1_addr = 0x1b,</div><div class='add'>+		.global2_addr = 0x1c,</div><div class='add'>+		.age_time_coeff = 3750,</div><div class='add'>+		.g1_irqs = 10,</div><div class='add'>+		.g2_irqs = 14,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_BANK1,</div><div class='add'>+		.atu_move_port_mask = 0x1f,</div><div class='add'>+		.pvt = true,</div><div class='add'>+		.multi_chip = true,</div><div class='add'>+		.ptp_support = true,</div><div class='add'>+		.ops = &amp;mv88e6393x_ops,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[MV88E6220] = {</div><div class='add'>+		.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6220,</div><div class='add'>+		.family = MV88E6XXX_FAMILY_6250,</div><div class='add'>+		.name = "Marvell 88E6220",</div><div class='add'>+		.num_databases = 64,</div><div class='add'>+</div><div class='add'>+		/* Ports 2-4 are not routed to pins</div><div class='add'>+		 * =&gt; usable ports 0, 1, 5, 6</div><div class='add'>+		 */</div><div class='add'>+		.num_ports = 7,</div><div class='add'>+		.num_internal_phys = 2,</div><div class='add'>+		.invalid_port_mask = BIT(2) | BIT(3) | BIT(4),</div><div class='add'>+		.max_vid = 4095,</div><div class='add'>+		.port_base_addr = 0x08,</div><div class='add'>+		.phy_base_addr = 0x00,</div><div class='add'>+		.global1_addr = 0x0f,</div><div class='add'>+		.global2_addr = 0x07,</div><div class='add'>+		.age_time_coeff = 15000,</div><div class='add'>+		.g1_irqs = 9,</div><div class='add'>+		.g2_irqs = 10,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0,</div><div class='add'>+		.atu_move_port_mask = 0xf,</div><div class='add'>+		.dual_chip = true,</div><div class='add'>+		.ptp_support = true,</div><div class='add'>+		.ops = &amp;mv88e6250_ops,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[MV88E6240] = {</div><div class='add'>+		.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6240,</div><div class='add'>+		.family = MV88E6XXX_FAMILY_6352,</div><div class='add'>+		.name = "Marvell 88E6240",</div><div class='add'>+		.num_databases = 4096,</div><div class='add'>+		.num_macs = 8192,</div><div class='add'>+		.num_ports = 7,</div><div class='add'>+		.num_internal_phys = 5,</div><div class='add'>+		.num_gpio = 15,</div><div class='add'>+		.max_vid = 4095,</div><div class='add'>+		.max_sid = 63,</div><div class='add'>+		.port_base_addr = 0x10,</div><div class='add'>+		.phy_base_addr = 0x0,</div><div class='add'>+		.global1_addr = 0x1b,</div><div class='add'>+		.global2_addr = 0x1c,</div><div class='add'>+		.age_time_coeff = 15000,</div><div class='add'>+		.g1_irqs = 9,</div><div class='add'>+		.g2_irqs = 10,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_PORT,</div><div class='add'>+		.atu_move_port_mask = 0xf,</div><div class='add'>+		.pvt = true,</div><div class='add'>+		.multi_chip = true,</div><div class='add'>+		.edsa_support = MV88E6XXX_EDSA_SUPPORTED,</div><div class='add'>+		.ptp_support = true,</div><div class='add'>+		.ops = &amp;mv88e6240_ops,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[MV88E6250] = {</div><div class='add'>+		.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6250,</div><div class='add'>+		.family = MV88E6XXX_FAMILY_6250,</div><div class='add'>+		.name = "Marvell 88E6250",</div><div class='add'>+		.num_databases = 64,</div><div class='add'>+		.num_ports = 7,</div><div class='add'>+		.num_internal_phys = 5,</div><div class='add'>+		.max_vid = 4095,</div><div class='add'>+		.port_base_addr = 0x08,</div><div class='add'>+		.phy_base_addr = 0x00,</div><div class='add'>+		.global1_addr = 0x0f,</div><div class='add'>+		.global2_addr = 0x07,</div><div class='add'>+		.age_time_coeff = 15000,</div><div class='add'>+		.g1_irqs = 9,</div><div class='add'>+		.g2_irqs = 10,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0,</div><div class='add'>+		.atu_move_port_mask = 0xf,</div><div class='add'>+		.dual_chip = true,</div><div class='add'>+		.ptp_support = true,</div><div class='add'>+		.ops = &amp;mv88e6250_ops,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[MV88E6290] = {</div><div class='add'>+		.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6290,</div><div class='add'>+		.family = MV88E6XXX_FAMILY_6390,</div><div class='add'>+		.name = "Marvell 88E6290",</div><div class='add'>+		.num_databases = 4096,</div><div class='add'>+		.num_ports = 11,	/* 10 + Z80 */</div><div class='add'>+		.num_internal_phys = 9,</div><div class='add'>+		.num_gpio = 16,</div><div class='add'>+		.max_vid = 8191,</div><div class='add'>+		.max_sid = 63,</div><div class='add'>+		.port_base_addr = 0x0,</div><div class='add'>+		.phy_base_addr = 0x0,</div><div class='add'>+		.global1_addr = 0x1b,</div><div class='add'>+		.global2_addr = 0x1c,</div><div class='add'>+		.age_time_coeff = 3750,</div><div class='add'>+		.g1_irqs = 9,</div><div class='add'>+		.g2_irqs = 14,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_BANK1,</div><div class='add'>+		.atu_move_port_mask = 0x1f,</div><div class='add'>+		.pvt = true,</div><div class='add'>+		.multi_chip = true,</div><div class='add'>+		.ptp_support = true,</div><div class='add'>+		.ops = &amp;mv88e6290_ops,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[MV88E6320] = {</div><div class='add'>+		.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6320,</div><div class='add'>+		.family = MV88E6XXX_FAMILY_6320,</div><div class='add'>+		.name = "Marvell 88E6320",</div><div class='add'>+		.num_databases = 4096,</div><div class='add'>+		.num_macs = 8192,</div><div class='add'>+		.num_ports = 7,</div><div class='add'>+		.num_internal_phys = 2,</div><div class='add'>+		.internal_phys_offset = 3,</div><div class='add'>+		.num_gpio = 15,</div><div class='add'>+		.max_vid = 4095,</div><div class='add'>+		.max_sid = 63,</div><div class='add'>+		.port_base_addr = 0x10,</div><div class='add'>+		.phy_base_addr = 0x0,</div><div class='add'>+		.global1_addr = 0x1b,</div><div class='add'>+		.global2_addr = 0x1c,</div><div class='add'>+		.age_time_coeff = 15000,</div><div class='add'>+		.g1_irqs = 8,</div><div class='add'>+		.g2_irqs = 10,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_BANK1,</div><div class='add'>+		.atu_move_port_mask = 0xf,</div><div class='add'>+		.pvt = true,</div><div class='add'>+		.multi_chip = true,</div><div class='add'>+		.edsa_support = MV88E6XXX_EDSA_SUPPORTED,</div><div class='add'>+		.ptp_support = true,</div><div class='add'>+		.ops = &amp;mv88e6320_ops,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[MV88E6321] = {</div><div class='add'>+		.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6321,</div><div class='add'>+		.family = MV88E6XXX_FAMILY_6320,</div><div class='add'>+		.name = "Marvell 88E6321",</div><div class='add'>+		.num_databases = 4096,</div><div class='add'>+		.num_macs = 8192,</div><div class='add'>+		.num_ports = 7,</div><div class='add'>+		.num_internal_phys = 2,</div><div class='add'>+		.internal_phys_offset = 3,</div><div class='add'>+		.num_gpio = 15,</div><div class='add'>+		.max_vid = 4095,</div><div class='add'>+		.max_sid = 63,</div><div class='add'>+		.port_base_addr = 0x10,</div><div class='add'>+		.phy_base_addr = 0x0,</div><div class='add'>+		.global1_addr = 0x1b,</div><div class='add'>+		.global2_addr = 0x1c,</div><div class='add'>+		.age_time_coeff = 15000,</div><div class='add'>+		.g1_irqs = 8,</div><div class='add'>+		.g2_irqs = 10,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_BANK1,</div><div class='add'>+		.atu_move_port_mask = 0xf,</div><div class='add'>+		.pvt = true,</div><div class='add'>+		.multi_chip = true,</div><div class='add'>+		.edsa_support = MV88E6XXX_EDSA_SUPPORTED,</div><div class='add'>+		.ptp_support = true,</div><div class='add'>+		.ops = &amp;mv88e6321_ops,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[MV88E6341] = {</div><div class='add'>+		.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6341,</div><div class='add'>+		.family = MV88E6XXX_FAMILY_6341,</div><div class='add'>+		.name = "Marvell 88E6341",</div><div class='add'>+		.num_databases = 256,</div><div class='add'>+		.num_macs = 2048,</div><div class='add'>+		.num_internal_phys = 5,</div><div class='add'>+		.num_ports = 6,</div><div class='add'>+		.num_gpio = 11,</div><div class='add'>+		.max_vid = 4095,</div><div class='add'>+		.max_sid = 63,</div><div class='add'>+		.port_base_addr = 0x10,</div><div class='add'>+		.phy_base_addr = 0x10,</div><div class='add'>+		.global1_addr = 0x1b,</div><div class='add'>+		.global2_addr = 0x1c,</div><div class='add'>+		.age_time_coeff = 3750,</div><div class='add'>+		.atu_move_port_mask = 0xf,</div><div class='add'>+		.g1_irqs = 9,</div><div class='add'>+		.g2_irqs = 10,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_BANK1,</div><div class='add'>+		.pvt = true,</div><div class='add'>+		.multi_chip = true,</div><div class='add'>+		.edsa_support = MV88E6XXX_EDSA_SUPPORTED,</div><div class='add'>+		.ptp_support = true,</div><div class='add'>+		.ops = &amp;mv88e6341_ops,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[MV88E6350] = {</div><div class='add'>+		.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6350,</div><div class='add'>+		.family = MV88E6XXX_FAMILY_6351,</div><div class='add'>+		.name = "Marvell 88E6350",</div><div class='add'>+		.num_databases = 4096,</div><div class='add'>+		.num_macs = 8192,</div><div class='add'>+		.num_ports = 7,</div><div class='add'>+		.num_internal_phys = 5,</div><div class='add'>+		.max_vid = 4095,</div><div class='add'>+		.max_sid = 63,</div><div class='add'>+		.port_base_addr = 0x10,</div><div class='add'>+		.phy_base_addr = 0x0,</div><div class='add'>+		.global1_addr = 0x1b,</div><div class='add'>+		.global2_addr = 0x1c,</div><div class='add'>+		.age_time_coeff = 15000,</div><div class='add'>+		.g1_irqs = 9,</div><div class='add'>+		.g2_irqs = 10,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_PORT,</div><div class='add'>+		.atu_move_port_mask = 0xf,</div><div class='add'>+		.pvt = true,</div><div class='add'>+		.multi_chip = true,</div><div class='add'>+		.edsa_support = MV88E6XXX_EDSA_SUPPORTED,</div><div class='add'>+		.ops = &amp;mv88e6350_ops,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[MV88E6351] = {</div><div class='add'>+		.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6351,</div><div class='add'>+		.family = MV88E6XXX_FAMILY_6351,</div><div class='add'>+		.name = "Marvell 88E6351",</div><div class='add'>+		.num_databases = 4096,</div><div class='add'>+		.num_macs = 8192,</div><div class='add'>+		.num_ports = 7,</div><div class='add'>+		.num_internal_phys = 5,</div><div class='add'>+		.max_vid = 4095,</div><div class='add'>+		.max_sid = 63,</div><div class='add'>+		.port_base_addr = 0x10,</div><div class='add'>+		.phy_base_addr = 0x0,</div><div class='add'>+		.global1_addr = 0x1b,</div><div class='add'>+		.global2_addr = 0x1c,</div><div class='add'>+		.age_time_coeff = 15000,</div><div class='add'>+		.g1_irqs = 9,</div><div class='add'>+		.g2_irqs = 10,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_PORT,</div><div class='add'>+		.atu_move_port_mask = 0xf,</div><div class='add'>+		.pvt = true,</div><div class='add'>+		.multi_chip = true,</div><div class='add'>+		.edsa_support = MV88E6XXX_EDSA_SUPPORTED,</div><div class='add'>+		.ops = &amp;mv88e6351_ops,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[MV88E6352] = {</div><div class='add'>+		.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6352,</div><div class='add'>+		.family = MV88E6XXX_FAMILY_6352,</div><div class='add'>+		.name = "Marvell 88E6352",</div><div class='add'>+		.num_databases = 4096,</div><div class='add'>+		.num_macs = 8192,</div><div class='add'>+		.num_ports = 7,</div><div class='add'>+		.num_internal_phys = 5,</div><div class='add'>+		.num_gpio = 15,</div><div class='add'>+		.max_vid = 4095,</div><div class='add'>+		.max_sid = 63,</div><div class='add'>+		.port_base_addr = 0x10,</div><div class='add'>+		.phy_base_addr = 0x0,</div><div class='add'>+		.global1_addr = 0x1b,</div><div class='add'>+		.global2_addr = 0x1c,</div><div class='add'>+		.age_time_coeff = 15000,</div><div class='add'>+		.g1_irqs = 9,</div><div class='add'>+		.g2_irqs = 10,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_PORT,</div><div class='add'>+		.atu_move_port_mask = 0xf,</div><div class='add'>+		.pvt = true,</div><div class='add'>+		.multi_chip = true,</div><div class='add'>+		.edsa_support = MV88E6XXX_EDSA_SUPPORTED,</div><div class='add'>+		.ptp_support = true,</div><div class='add'>+		.ops = &amp;mv88e6352_ops,</div><div class='add'>+	},</div><div class='add'>+	[MV88E6361] = {</div><div class='add'>+		.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6361,</div><div class='add'>+		.family = MV88E6XXX_FAMILY_6393,</div><div class='add'>+		.name = "Marvell 88E6361",</div><div class='add'>+		.num_databases = 4096,</div><div class='add'>+		.num_macs = 16384,</div><div class='add'>+		.num_ports = 11,</div><div class='add'>+		/* Ports 1, 2 and 8 are not routed */</div><div class='add'>+		.invalid_port_mask = BIT(1) | BIT(2) | BIT(8),</div><div class='add'>+		.num_internal_phys = 5,</div><div class='add'>+		.internal_phys_offset = 3,</div><div class='add'>+		.max_vid = 8191,</div><div class='add'>+		.max_sid = 63,</div><div class='add'>+		.port_base_addr = 0x0,</div><div class='add'>+		.phy_base_addr = 0x0,</div><div class='add'>+		.global1_addr = 0x1b,</div><div class='add'>+		.global2_addr = 0x1c,</div><div class='add'>+		.age_time_coeff = 3750,</div><div class='add'>+		.g1_irqs = 10,</div><div class='add'>+		.g2_irqs = 14,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_BANK1,</div><div class='add'>+		.atu_move_port_mask = 0x1f,</div><div class='add'>+		.pvt = true,</div><div class='add'>+		.multi_chip = true,</div><div class='add'>+		.ptp_support = true,</div><div class='add'>+		.ops = &amp;mv88e6393x_ops,</div><div class='add'>+	},</div><div class='add'>+	[MV88E6390] = {</div><div class='add'>+		.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6390,</div><div class='add'>+		.family = MV88E6XXX_FAMILY_6390,</div><div class='add'>+		.name = "Marvell 88E6390",</div><div class='add'>+		.num_databases = 4096,</div><div class='add'>+		.num_macs = 16384,</div><div class='add'>+		.num_ports = 11,	/* 10 + Z80 */</div><div class='add'>+		.num_internal_phys = 9,</div><div class='add'>+		.num_gpio = 16,</div><div class='add'>+		.max_vid = 8191,</div><div class='add'>+		.max_sid = 63,</div><div class='add'>+		.port_base_addr = 0x0,</div><div class='add'>+		.phy_base_addr = 0x0,</div><div class='add'>+		.global1_addr = 0x1b,</div><div class='add'>+		.global2_addr = 0x1c,</div><div class='add'>+		.age_time_coeff = 3750,</div><div class='add'>+		.g1_irqs = 9,</div><div class='add'>+		.g2_irqs = 14,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_BANK1,</div><div class='add'>+		.atu_move_port_mask = 0x1f,</div><div class='add'>+		.pvt = true,</div><div class='add'>+		.multi_chip = true,</div><div class='add'>+		.edsa_support = MV88E6XXX_EDSA_UNDOCUMENTED,</div><div class='add'>+		.ptp_support = true,</div><div class='add'>+		.ops = &amp;mv88e6390_ops,</div><div class='add'>+	},</div><div class='add'>+	[MV88E6390X] = {</div><div class='add'>+		.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6390X,</div><div class='add'>+		.family = MV88E6XXX_FAMILY_6390,</div><div class='add'>+		.name = "Marvell 88E6390X",</div><div class='add'>+		.num_databases = 4096,</div><div class='add'>+		.num_macs = 16384,</div><div class='add'>+		.num_ports = 11,	/* 10 + Z80 */</div><div class='add'>+		.num_internal_phys = 9,</div><div class='add'>+		.num_gpio = 16,</div><div class='add'>+		.max_vid = 8191,</div><div class='add'>+		.max_sid = 63,</div><div class='add'>+		.port_base_addr = 0x0,</div><div class='add'>+		.phy_base_addr = 0x0,</div><div class='add'>+		.global1_addr = 0x1b,</div><div class='add'>+		.global2_addr = 0x1c,</div><div class='add'>+		.age_time_coeff = 3750,</div><div class='add'>+		.g1_irqs = 9,</div><div class='add'>+		.g2_irqs = 14,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_BANK1,</div><div class='add'>+		.atu_move_port_mask = 0x1f,</div><div class='add'>+		.pvt = true,</div><div class='add'>+		.multi_chip = true,</div><div class='add'>+		.edsa_support = MV88E6XXX_EDSA_UNDOCUMENTED,</div><div class='add'>+		.ptp_support = true,</div><div class='add'>+		.ops = &amp;mv88e6390x_ops,</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	[MV88E6393X] = {</div><div class='add'>+		.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6393X,</div><div class='add'>+		.family = MV88E6XXX_FAMILY_6393,</div><div class='add'>+		.name = "Marvell 88E6393X",</div><div class='add'>+		.num_databases = 4096,</div><div class='add'>+		.num_ports = 11,	/* 10 + Z80 */</div><div class='add'>+		.num_internal_phys = 8,</div><div class='add'>+		.internal_phys_offset = 1,</div><div class='add'>+		.max_vid = 8191,</div><div class='add'>+		.max_sid = 63,</div><div class='add'>+		.port_base_addr = 0x0,</div><div class='add'>+		.phy_base_addr = 0x0,</div><div class='add'>+		.global1_addr = 0x1b,</div><div class='add'>+		.global2_addr = 0x1c,</div><div class='add'>+		.age_time_coeff = 3750,</div><div class='add'>+		.g1_irqs = 10,</div><div class='add'>+		.g2_irqs = 14,</div><div class='add'>+		.stats_type = STATS_TYPE_BANK0 | STATS_TYPE_BANK1,</div><div class='add'>+		.atu_move_port_mask = 0x1f,</div><div class='add'>+		.pvt = true,</div><div class='add'>+		.multi_chip = true,</div><div class='add'>+		.ptp_support = true,</div><div class='add'>+		.ops = &amp;mv88e6393x_ops,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct mv88e6xxx_info *mv88e6xxx_lookup_info(unsigned int prod_num)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(mv88e6xxx_table); ++i)</div><div class='add'>+		if (mv88e6xxx_table[i].prod_num == prod_num)</div><div class='add'>+			return &amp;mv88e6xxx_table[i];</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_detect(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	const struct mv88e6xxx_info *info;</div><div class='add'>+	unsigned int prod_num, rev;</div><div class='add'>+	u16 id;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	err = mv88e6xxx_port_read(chip, 0, MV88E6XXX_PORT_SWITCH_ID, &amp;id);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	prod_num = id &amp; MV88E6XXX_PORT_SWITCH_ID_PROD_MASK;</div><div class='add'>+	rev = id &amp; MV88E6XXX_PORT_SWITCH_ID_REV_MASK;</div><div class='add'>+</div><div class='add'>+	info = mv88e6xxx_lookup_info(prod_num);</div><div class='add'>+	if (!info)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	/* Update the compatible info with the probed one */</div><div class='add'>+	chip-&gt;info = info;</div><div class='add'>+</div><div class='add'>+	dev_info(chip-&gt;dev, "switch 0x%x detected: %s, revision %u\n",</div><div class='add'>+		 chip-&gt;info-&gt;prod_num, chip-&gt;info-&gt;name, rev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_single_chip_detect(struct mv88e6xxx_chip *chip,</div><div class='add'>+					struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* dual_chip takes precedence over single/multi-chip modes */</div><div class='add'>+	if (chip-&gt;info-&gt;dual_chip)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* If the mdio addr is 16 indicating the first port address of a switch</div><div class='add'>+	 * (e.g. mv88e6*41) in single chip addressing mode the device may be</div><div class='add'>+	 * configured in single chip addressing mode. Setup the smi access as</div><div class='add'>+	 * single chip addressing mode and attempt to detect the model of the</div><div class='add'>+	 * switch, if this fails the device is not configured in single chip</div><div class='add'>+	 * addressing mode.</div><div class='add'>+	 */</div><div class='add'>+	if (mdiodev-&gt;addr != 16)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_smi_init(chip, mdiodev-&gt;bus, 0);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_detect(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mv88e6xxx_chip *mv88e6xxx_alloc_chip(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip;</div><div class='add'>+</div><div class='add'>+	chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);</div><div class='add'>+	if (!chip)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	chip-&gt;dev = dev;</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;chip-&gt;reg_lock);</div><div class='add'>+	INIT_LIST_HEAD(&amp;chip-&gt;mdios);</div><div class='add'>+	idr_init(&amp;chip-&gt;policies);</div><div class='add'>+	INIT_LIST_HEAD(&amp;chip-&gt;msts);</div><div class='add'>+</div><div class='add'>+	return chip;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum dsa_tag_protocol mv88e6xxx_get_tag_protocol(struct dsa_switch *ds,</div><div class='add'>+							int port,</div><div class='add'>+							enum dsa_tag_protocol m)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return chip-&gt;tag_protocol;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_change_tag_protocol(struct dsa_switch *ds,</div><div class='add'>+					 enum dsa_tag_protocol proto)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	enum dsa_tag_protocol old_protocol;</div><div class='add'>+	struct dsa_port *cpu_dp;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	switch (proto) {</div><div class='add'>+	case DSA_TAG_PROTO_EDSA:</div><div class='add'>+		switch (chip-&gt;info-&gt;edsa_support) {</div><div class='add'>+		case MV88E6XXX_EDSA_UNSUPPORTED:</div><div class='add'>+			return -EPROTONOSUPPORT;</div><div class='add'>+		case MV88E6XXX_EDSA_UNDOCUMENTED:</div><div class='add'>+			dev_warn(chip-&gt;dev, "Relying on undocumented EDSA tagging behavior\n");</div><div class='add'>+			fallthrough;</div><div class='add'>+		case MV88E6XXX_EDSA_SUPPORTED:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case DSA_TAG_PROTO_DSA:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EPROTONOSUPPORT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	old_protocol = chip-&gt;tag_protocol;</div><div class='add'>+	chip-&gt;tag_protocol = proto;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	dsa_switch_for_each_cpu_port(cpu_dp, ds) {</div><div class='add'>+		err = mv88e6xxx_setup_port_mode(chip, cpu_dp-&gt;index);</div><div class='add'>+		if (err) {</div><div class='add'>+			mv88e6xxx_reg_unlock(chip);</div><div class='add'>+			goto unwind;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+unwind:</div><div class='add'>+	chip-&gt;tag_protocol = old_protocol;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	dsa_switch_for_each_cpu_port_continue_reverse(cpu_dp, ds)</div><div class='add'>+		mv88e6xxx_setup_port_mode(chip, cpu_dp-&gt;index);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_mdb_add(struct dsa_switch *ds, int port,</div><div class='add'>+				  const struct switchdev_obj_port_mdb *mdb,</div><div class='add'>+				  struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	err = mv88e6xxx_port_db_load_purge(chip, port, mdb-&gt;addr, mdb-&gt;vid,</div><div class='add'>+					   MV88E6XXX_G1_ATU_DATA_STATE_MC_STATIC);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (!mv88e6xxx_port_db_find(chip, mdb-&gt;addr, mdb-&gt;vid))</div><div class='add'>+		err = -ENOSPC;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_mdb_del(struct dsa_switch *ds, int port,</div><div class='add'>+				  const struct switchdev_obj_port_mdb *mdb,</div><div class='add'>+				  struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	err = mv88e6xxx_port_db_load_purge(chip, port, mdb-&gt;addr, mdb-&gt;vid, 0);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_mirror_add(struct dsa_switch *ds, int port,</div><div class='add'>+				     struct dsa_mall_mirror_tc_entry *mirror,</div><div class='add'>+				     bool ingress,</div><div class='add'>+				     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	enum mv88e6xxx_egress_direction direction = ingress ?</div><div class='add'>+						MV88E6XXX_EGRESS_DIR_INGRESS :</div><div class='add'>+						MV88E6XXX_EGRESS_DIR_EGRESS;</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	bool other_mirrors = false;</div><div class='add'>+	int i;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;chip-&gt;reg_lock);</div><div class='add'>+	if ((ingress ? chip-&gt;ingress_dest_port : chip-&gt;egress_dest_port) !=</div><div class='add'>+	    mirror-&gt;to_local_port) {</div><div class='add'>+		for (i = 0; i &lt; mv88e6xxx_num_ports(chip); i++)</div><div class='add'>+			other_mirrors |= ingress ?</div><div class='add'>+					 chip-&gt;ports[i].mirror_ingress :</div><div class='add'>+					 chip-&gt;ports[i].mirror_egress;</div><div class='add'>+</div><div class='add'>+		/* Can't change egress port when other mirror is active */</div><div class='add'>+		if (other_mirrors) {</div><div class='add'>+			err = -EBUSY;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_set_egress_port(chip, direction,</div><div class='add'>+						mirror-&gt;to_local_port);</div><div class='add'>+		if (err)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_set_mirror(chip, port, direction, true);</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;chip-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_port_mirror_del(struct dsa_switch *ds, int port,</div><div class='add'>+				      struct dsa_mall_mirror_tc_entry *mirror)</div><div class='add'>+{</div><div class='add'>+	enum mv88e6xxx_egress_direction direction = mirror-&gt;ingress ?</div><div class='add'>+						MV88E6XXX_EGRESS_DIR_INGRESS :</div><div class='add'>+						MV88E6XXX_EGRESS_DIR_EGRESS;</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	bool other_mirrors = false;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;chip-&gt;reg_lock);</div><div class='add'>+	if (mv88e6xxx_port_set_mirror(chip, port, direction, false))</div><div class='add'>+		dev_err(ds-&gt;dev, "p%d: failed to disable mirroring\n", port);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; mv88e6xxx_num_ports(chip); i++)</div><div class='add'>+		other_mirrors |= mirror-&gt;ingress ?</div><div class='add'>+				 chip-&gt;ports[i].mirror_ingress :</div><div class='add'>+				 chip-&gt;ports[i].mirror_egress;</div><div class='add'>+</div><div class='add'>+	/* Reset egress port when no other mirror is active */</div><div class='add'>+	if (!other_mirrors) {</div><div class='add'>+		if (mv88e6xxx_set_egress_port(chip, direction,</div><div class='add'>+					      dsa_upstream_port(ds, port)))</div><div class='add'>+			dev_err(ds-&gt;dev, "failed to set egress port\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;chip-&gt;reg_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_pre_bridge_flags(struct dsa_switch *ds, int port,</div><div class='add'>+					   struct switchdev_brport_flags flags,</div><div class='add'>+					   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	const struct mv88e6xxx_ops *ops;</div><div class='add'>+</div><div class='add'>+	if (flags.mask &amp; ~(BR_LEARNING | BR_FLOOD | BR_MCAST_FLOOD |</div><div class='add'>+			   BR_BCAST_FLOOD | BR_PORT_LOCKED | BR_PORT_MAB))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ops = chip-&gt;info-&gt;ops;</div><div class='add'>+</div><div class='add'>+	if ((flags.mask &amp; BR_FLOOD) &amp;&amp; !ops-&gt;port_set_ucast_flood)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if ((flags.mask &amp; BR_MCAST_FLOOD) &amp;&amp; !ops-&gt;port_set_mcast_flood)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_bridge_flags(struct dsa_switch *ds, int port,</div><div class='add'>+				       struct switchdev_brport_flags flags,</div><div class='add'>+				       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+</div><div class='add'>+	if (flags.mask &amp; BR_LEARNING) {</div><div class='add'>+		bool learning = !!(flags.val &amp; BR_LEARNING);</div><div class='add'>+		u16 pav = learning ? (1 &lt;&lt; port) : 0;</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_port_set_assoc_vector(chip, port, pav);</div><div class='add'>+		if (err)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flags.mask &amp; BR_FLOOD) {</div><div class='add'>+		bool unicast = !!(flags.val &amp; BR_FLOOD);</div><div class='add'>+</div><div class='add'>+		err = chip-&gt;info-&gt;ops-&gt;port_set_ucast_flood(chip, port,</div><div class='add'>+							    unicast);</div><div class='add'>+		if (err)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flags.mask &amp; BR_MCAST_FLOOD) {</div><div class='add'>+		bool multicast = !!(flags.val &amp; BR_MCAST_FLOOD);</div><div class='add'>+</div><div class='add'>+		err = chip-&gt;info-&gt;ops-&gt;port_set_mcast_flood(chip, port,</div><div class='add'>+							    multicast);</div><div class='add'>+		if (err)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flags.mask &amp; BR_BCAST_FLOOD) {</div><div class='add'>+		bool broadcast = !!(flags.val &amp; BR_BCAST_FLOOD);</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_port_broadcast_sync(chip, port, broadcast);</div><div class='add'>+		if (err)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flags.mask &amp; BR_PORT_MAB) {</div><div class='add'>+		bool mab = !!(flags.val &amp; BR_PORT_MAB);</div><div class='add'>+</div><div class='add'>+		mv88e6xxx_port_set_mab(chip, port, mab);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flags.mask &amp; BR_PORT_LOCKED) {</div><div class='add'>+		bool locked = !!(flags.val &amp; BR_PORT_LOCKED);</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_port_set_lock(chip, port, locked);</div><div class='add'>+		if (err)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+out:</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool mv88e6xxx_lag_can_offload(struct dsa_switch *ds,</div><div class='add'>+				      struct dsa_lag lag,</div><div class='add'>+				      struct netdev_lag_upper_info *info,</div><div class='add'>+				      struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	struct dsa_port *dp;</div><div class='add'>+	int members = 0;</div><div class='add'>+</div><div class='add'>+	if (!mv88e6xxx_has_lag(chip)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Chip does not support LAG offload");</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!lag.id)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	dsa_lag_foreach_port(dp, ds-&gt;dst, &amp;lag)</div><div class='add'>+		/* Includes the port joining the LAG */</div><div class='add'>+		members++;</div><div class='add'>+</div><div class='add'>+	if (members &gt; 8) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Cannot offload more than 8 LAG ports");</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* We could potentially relax this to include active</div><div class='add'>+	 * backup in the future.</div><div class='add'>+	 */</div><div class='add'>+	if (info-&gt;tx_type != NETDEV_LAG_TX_TYPE_HASH) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Can only offload LAG using hash TX type");</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Ideally we would also validate that the hash type matches</div><div class='add'>+	 * the hardware. Alas, this is always set to unknown on team</div><div class='add'>+	 * interfaces.</div><div class='add'>+	 */</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_lag_sync_map(struct dsa_switch *ds, struct dsa_lag lag)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	struct dsa_port *dp;</div><div class='add'>+	u16 map = 0;</div><div class='add'>+	int id;</div><div class='add'>+</div><div class='add'>+	/* DSA LAG IDs are one-based, hardware is zero-based */</div><div class='add'>+	id = lag.id - 1;</div><div class='add'>+</div><div class='add'>+	/* Build the map of all ports to distribute flows destined for</div><div class='add'>+	 * this LAG. This can be either a local user port, or a DSA</div><div class='add'>+	 * port if the LAG port is on a remote chip.</div><div class='add'>+	 */</div><div class='add'>+	dsa_lag_foreach_port(dp, ds-&gt;dst, &amp;lag)</div><div class='add'>+		map |= BIT(dsa_towards_port(ds, dp-&gt;ds-&gt;index, dp-&gt;index));</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_trunk_mapping_write(chip, id, map);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const u8 mv88e6xxx_lag_mask_table[8][8] = {</div><div class='add'>+	/* Row number corresponds to the number of active members in a</div><div class='add'>+	 * LAG. Each column states which of the eight hash buckets are</div><div class='add'>+	 * mapped to the column:th port in the LAG.</div><div class='add'>+	 *</div><div class='add'>+	 * Example: In a LAG with three active ports, the second port</div><div class='add'>+	 * ([2][1]) would be selected for traffic mapped to buckets</div><div class='add'>+	 * 3,4,5 (0x38).</div><div class='add'>+	 */</div><div class='add'>+	{ 0xff,    0,    0,    0,    0,    0,    0,    0 },</div><div class='add'>+	{ 0x0f, 0xf0,    0,    0,    0,    0,    0,    0 },</div><div class='add'>+	{ 0x07, 0x38, 0xc0,    0,    0,    0,    0,    0 },</div><div class='add'>+	{ 0x03, 0x0c, 0x30, 0xc0,    0,    0,    0,    0 },</div><div class='add'>+	{ 0x03, 0x0c, 0x30, 0x40, 0x80,    0,    0,    0 },</div><div class='add'>+	{ 0x03, 0x0c, 0x10, 0x20, 0x40, 0x80,    0,    0 },</div><div class='add'>+	{ 0x03, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80,    0 },</div><div class='add'>+	{ 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80 },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_lag_set_port_mask(u16 *mask, int port,</div><div class='add'>+					int num_tx, int nth)</div><div class='add'>+{</div><div class='add'>+	u8 active = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	num_tx = num_tx &lt;= 8 ? num_tx : 8;</div><div class='add'>+	if (nth &lt; num_tx)</div><div class='add'>+		active = mv88e6xxx_lag_mask_table[num_tx - 1][nth];</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 8; i++) {</div><div class='add'>+		if (BIT(i) &amp; active)</div><div class='add'>+			mask[i] |= BIT(port);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_lag_sync_masks(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	unsigned int id, num_tx;</div><div class='add'>+	struct dsa_port *dp;</div><div class='add'>+	struct dsa_lag *lag;</div><div class='add'>+	int i, err, nth;</div><div class='add'>+	u16 mask[8];</div><div class='add'>+	u16 ivec;</div><div class='add'>+</div><div class='add'>+	/* Assume no port is a member of any LAG. */</div><div class='add'>+	ivec = BIT(mv88e6xxx_num_ports(chip)) - 1;</div><div class='add'>+</div><div class='add'>+	/* Disable all masks for ports that _are_ members of a LAG. */</div><div class='add'>+	dsa_switch_for_each_port(dp, ds) {</div><div class='add'>+		if (!dp-&gt;lag)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		ivec &amp;= ~BIT(dp-&gt;index);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 8; i++)</div><div class='add'>+		mask[i] = ivec;</div><div class='add'>+</div><div class='add'>+	/* Enable the correct subset of masks for all LAG ports that</div><div class='add'>+	 * are in the Tx set.</div><div class='add'>+	 */</div><div class='add'>+	dsa_lags_foreach_id(id, ds-&gt;dst) {</div><div class='add'>+		lag = dsa_lag_by_id(ds-&gt;dst, id);</div><div class='add'>+		if (!lag)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		num_tx = 0;</div><div class='add'>+		dsa_lag_foreach_port(dp, ds-&gt;dst, lag) {</div><div class='add'>+			if (dp-&gt;lag_tx_enabled)</div><div class='add'>+				num_tx++;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!num_tx)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		nth = 0;</div><div class='add'>+		dsa_lag_foreach_port(dp, ds-&gt;dst, lag) {</div><div class='add'>+			if (!dp-&gt;lag_tx_enabled)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			if (dp-&gt;ds == ds)</div><div class='add'>+				mv88e6xxx_lag_set_port_mask(mask, dp-&gt;index,</div><div class='add'>+							    num_tx, nth);</div><div class='add'>+</div><div class='add'>+			nth++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 8; i++) {</div><div class='add'>+		err = mv88e6xxx_g2_trunk_mask_write(chip, i, true, mask[i]);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_lag_sync_masks_map(struct dsa_switch *ds,</div><div class='add'>+					struct dsa_lag lag)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_lag_sync_masks(ds);</div><div class='add'>+</div><div class='add'>+	if (!err)</div><div class='add'>+		err = mv88e6xxx_lag_sync_map(ds, lag);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_lag_change(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	err = mv88e6xxx_lag_sync_masks(ds);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_lag_join(struct dsa_switch *ds, int port,</div><div class='add'>+				   struct dsa_lag lag,</div><div class='add'>+				   struct netdev_lag_upper_info *info,</div><div class='add'>+				   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	int err, id;</div><div class='add'>+</div><div class='add'>+	if (!mv88e6xxx_lag_can_offload(ds, lag, info, extack))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	/* DSA LAG IDs are one-based */</div><div class='add'>+	id = lag.id - 1;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_set_trunk(chip, port, true, id);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_unlock;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_lag_sync_masks_map(ds, lag);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_clear_trunk;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_clear_trunk:</div><div class='add'>+	mv88e6xxx_port_set_trunk(chip, port, false, 0);</div><div class='add'>+err_unlock:</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_lag_leave(struct dsa_switch *ds, int port,</div><div class='add'>+				    struct dsa_lag lag)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	int err_sync, err_trunk;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	err_sync = mv88e6xxx_lag_sync_masks_map(ds, lag);</div><div class='add'>+	err_trunk = mv88e6xxx_port_set_trunk(chip, port, false, 0);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+	return err_sync ? : err_trunk;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_crosschip_lag_change(struct dsa_switch *ds, int sw_index,</div><div class='add'>+					  int port)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	err = mv88e6xxx_lag_sync_masks(ds);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_crosschip_lag_join(struct dsa_switch *ds, int sw_index,</div><div class='add'>+					int port, struct dsa_lag lag,</div><div class='add'>+					struct netdev_lag_upper_info *info,</div><div class='add'>+					struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!mv88e6xxx_lag_can_offload(ds, lag, info, extack))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_lag_sync_masks_map(ds, lag);</div><div class='add'>+	if (err)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_pvt_map(chip, sw_index, port);</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_crosschip_lag_leave(struct dsa_switch *ds, int sw_index,</div><div class='add'>+					 int port, struct dsa_lag lag)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	int err_sync, err_pvt;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	err_sync = mv88e6xxx_lag_sync_masks_map(ds, lag);</div><div class='add'>+	err_pvt = mv88e6xxx_pvt_map(chip, sw_index, port);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+	return err_sync ? : err_pvt;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct phylink_mac_ops mv88e6xxx_phylink_mac_ops = {</div><div class='add'>+	.mac_select_pcs		= mv88e6xxx_mac_select_pcs,</div><div class='add'>+	.mac_prepare		= mv88e6xxx_mac_prepare,</div><div class='add'>+	.mac_config		= mv88e6xxx_mac_config,</div><div class='add'>+	.mac_finish		= mv88e6xxx_mac_finish,</div><div class='add'>+	.mac_link_down		= mv88e6xxx_mac_link_down,</div><div class='add'>+	.mac_link_up		= mv88e6xxx_mac_link_up,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct dsa_switch_ops mv88e6xxx_switch_ops = {</div><div class='add'>+	.get_tag_protocol	= mv88e6xxx_get_tag_protocol,</div><div class='add'>+	.change_tag_protocol	= mv88e6xxx_change_tag_protocol,</div><div class='add'>+	.setup			= mv88e6xxx_setup,</div><div class='add'>+	.teardown		= mv88e6xxx_teardown,</div><div class='add'>+	.port_setup		= mv88e6xxx_port_setup,</div><div class='add'>+	.port_teardown		= mv88e6xxx_port_teardown,</div><div class='add'>+	.phylink_get_caps	= mv88e6xxx_get_caps,</div><div class='add'>+	.get_strings		= mv88e6xxx_get_strings,</div><div class='add'>+	.get_ethtool_stats	= mv88e6xxx_get_ethtool_stats,</div><div class='add'>+	.get_eth_mac_stats	= mv88e6xxx_get_eth_mac_stats,</div><div class='add'>+	.get_rmon_stats		= mv88e6xxx_get_rmon_stats,</div><div class='add'>+	.get_sset_count		= mv88e6xxx_get_sset_count,</div><div class='add'>+	.port_max_mtu		= mv88e6xxx_get_max_mtu,</div><div class='add'>+	.port_change_mtu	= mv88e6xxx_change_mtu,</div><div class='add'>+	.support_eee		= dsa_supports_eee,</div><div class='add'>+	.set_mac_eee		= mv88e6xxx_set_mac_eee,</div><div class='add'>+	.get_eeprom_len		= mv88e6xxx_get_eeprom_len,</div><div class='add'>+	.get_eeprom		= mv88e6xxx_get_eeprom,</div><div class='add'>+	.set_eeprom		= mv88e6xxx_set_eeprom,</div><div class='add'>+	.get_regs_len		= mv88e6xxx_get_regs_len,</div><div class='add'>+	.get_regs		= mv88e6xxx_get_regs,</div><div class='add'>+	.get_rxnfc		= mv88e6xxx_get_rxnfc,</div><div class='add'>+	.set_rxnfc		= mv88e6xxx_set_rxnfc,</div><div class='add'>+	.set_ageing_time	= mv88e6xxx_set_ageing_time,</div><div class='add'>+	.port_bridge_join	= mv88e6xxx_port_bridge_join,</div><div class='add'>+	.port_bridge_leave	= mv88e6xxx_port_bridge_leave,</div><div class='add'>+	.port_pre_bridge_flags	= mv88e6xxx_port_pre_bridge_flags,</div><div class='add'>+	.port_bridge_flags	= mv88e6xxx_port_bridge_flags,</div><div class='add'>+	.port_stp_state_set	= mv88e6xxx_port_stp_state_set,</div><div class='add'>+	.port_mst_state_set	= mv88e6xxx_port_mst_state_set,</div><div class='add'>+	.port_fast_age		= mv88e6xxx_port_fast_age,</div><div class='add'>+	.port_vlan_fast_age	= mv88e6xxx_port_vlan_fast_age,</div><div class='add'>+	.port_vlan_filtering	= mv88e6xxx_port_vlan_filtering,</div><div class='add'>+	.port_vlan_add		= mv88e6xxx_port_vlan_add,</div><div class='add'>+	.port_vlan_del		= mv88e6xxx_port_vlan_del,</div><div class='add'>+	.vlan_msti_set		= mv88e6xxx_vlan_msti_set,</div><div class='add'>+	.port_fdb_add		= mv88e6xxx_port_fdb_add,</div><div class='add'>+	.port_fdb_del		= mv88e6xxx_port_fdb_del,</div><div class='add'>+	.port_fdb_dump		= mv88e6xxx_port_fdb_dump,</div><div class='add'>+	.port_mdb_add		= mv88e6xxx_port_mdb_add,</div><div class='add'>+	.port_mdb_del		= mv88e6xxx_port_mdb_del,</div><div class='add'>+	.port_mirror_add	= mv88e6xxx_port_mirror_add,</div><div class='add'>+	.port_mirror_del	= mv88e6xxx_port_mirror_del,</div><div class='add'>+	.crosschip_bridge_join	= mv88e6xxx_crosschip_bridge_join,</div><div class='add'>+	.crosschip_bridge_leave	= mv88e6xxx_crosschip_bridge_leave,</div><div class='add'>+	.port_hwtstamp_set	= mv88e6xxx_port_hwtstamp_set,</div><div class='add'>+	.port_hwtstamp_get	= mv88e6xxx_port_hwtstamp_get,</div><div class='add'>+	.port_txtstamp		= mv88e6xxx_port_txtstamp,</div><div class='add'>+	.port_rxtstamp		= mv88e6xxx_port_rxtstamp,</div><div class='add'>+	.get_ts_info		= mv88e6xxx_get_ts_info,</div><div class='add'>+	.devlink_param_get	= mv88e6xxx_devlink_param_get,</div><div class='add'>+	.devlink_param_set	= mv88e6xxx_devlink_param_set,</div><div class='add'>+	.devlink_info_get	= mv88e6xxx_devlink_info_get,</div><div class='add'>+	.port_lag_change	= mv88e6xxx_port_lag_change,</div><div class='add'>+	.port_lag_join		= mv88e6xxx_port_lag_join,</div><div class='add'>+	.port_lag_leave		= mv88e6xxx_port_lag_leave,</div><div class='add'>+	.crosschip_lag_change	= mv88e6xxx_crosschip_lag_change,</div><div class='add'>+	.crosschip_lag_join	= mv88e6xxx_crosschip_lag_join,</div><div class='add'>+	.crosschip_lag_leave	= mv88e6xxx_crosschip_lag_leave,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_register_switch(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = chip-&gt;dev;</div><div class='add'>+	struct dsa_switch *ds;</div><div class='add'>+</div><div class='add'>+	ds = devm_kzalloc(dev, sizeof(*ds), GFP_KERNEL);</div><div class='add'>+	if (!ds)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ds-&gt;dev = dev;</div><div class='add'>+	ds-&gt;num_ports = mv88e6xxx_num_ports(chip);</div><div class='add'>+	ds-&gt;priv = chip;</div><div class='add'>+	ds-&gt;dev = dev;</div><div class='add'>+	ds-&gt;ops = &amp;mv88e6xxx_switch_ops;</div><div class='add'>+	ds-&gt;phylink_mac_ops = &amp;mv88e6xxx_phylink_mac_ops;</div><div class='add'>+	ds-&gt;ageing_time_min = chip-&gt;info-&gt;age_time_coeff;</div><div class='add'>+	ds-&gt;ageing_time_max = chip-&gt;info-&gt;age_time_coeff * U8_MAX;</div><div class='add'>+</div><div class='add'>+	/* Some chips support up to 32, but that requires enabling the</div><div class='add'>+	 * 5-bit port mode, which we do not support. 640k^W16 ought to</div><div class='add'>+	 * be enough for anyone.</div><div class='add'>+	 */</div><div class='add'>+	ds-&gt;num_lag_ids = mv88e6xxx_has_lag(chip) ? 16 : 0;</div><div class='add'>+</div><div class='add'>+	dev_set_drvdata(dev, ds);</div><div class='add'>+</div><div class='add'>+	return dsa_register_switch(ds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_unregister_switch(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	dsa_unregister_switch(chip-&gt;ds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const void *pdata_device_get_match_data(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	const struct of_device_id *matches = dev-&gt;driver-&gt;of_match_table;</div><div class='add'>+	const struct dsa_mv88e6xxx_pdata *pdata = dev-&gt;platform_data;</div><div class='add'>+</div><div class='add'>+	for (; matches-&gt;name[0] || matches-&gt;type[0] || matches-&gt;compatible[0];</div><div class='add'>+	     matches++) {</div><div class='add'>+		if (!strcmp(pdata-&gt;compatible, matches-&gt;compatible))</div><div class='add'>+			return matches-&gt;data;</div><div class='add'>+	}</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* There is no suspend to RAM support at DSA level yet, the switch configuration</div><div class='add'>+ * would be lost after a power cycle so prevent it to be suspended.</div><div class='add'>+ */</div><div class='add'>+static int __maybe_unused mv88e6xxx_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __maybe_unused mv88e6xxx_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static SIMPLE_DEV_PM_OPS(mv88e6xxx_pm_ops, mv88e6xxx_suspend, mv88e6xxx_resume);</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_probe(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct dsa_mv88e6xxx_pdata *pdata = mdiodev-&gt;dev.platform_data;</div><div class='add'>+	const struct mv88e6xxx_info *compat_info = NULL;</div><div class='add'>+	struct device *dev = &amp;mdiodev-&gt;dev;</div><div class='add'>+	struct device_node *np = dev-&gt;of_node;</div><div class='add'>+	struct mv88e6xxx_chip *chip;</div><div class='add'>+	int port;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!np &amp;&amp; !pdata)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (np)</div><div class='add'>+		compat_info = of_device_get_match_data(dev);</div><div class='add'>+</div><div class='add'>+	if (pdata) {</div><div class='add'>+		compat_info = pdata_device_get_match_data(dev);</div><div class='add'>+</div><div class='add'>+		if (!pdata-&gt;netdev)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		for (port = 0; port &lt; DSA_MAX_PORTS; port++) {</div><div class='add'>+			if (!(pdata-&gt;enabled_ports &amp; (1 &lt;&lt; port)))</div><div class='add'>+				continue;</div><div class='add'>+			if (strcmp(pdata-&gt;cd.port_names[port], "cpu"))</div><div class='add'>+				continue;</div><div class='add'>+			pdata-&gt;cd.netdev[port] = &amp;pdata-&gt;netdev-&gt;dev;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!compat_info)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	chip = mv88e6xxx_alloc_chip(dev);</div><div class='add'>+	if (!chip) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	chip-&gt;info = compat_info;</div><div class='add'>+</div><div class='add'>+	chip-&gt;reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);</div><div class='add'>+	if (IS_ERR(chip-&gt;reset)) {</div><div class='add'>+		err = PTR_ERR(chip-&gt;reset);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	if (chip-&gt;reset)</div><div class='add'>+		usleep_range(10000, 20000);</div><div class='add'>+</div><div class='add'>+	/* Detect if the device is configured in single chip addressing mode,</div><div class='add'>+	 * otherwise continue with address specific smi init/detection.</div><div class='add'>+	 */</div><div class='add'>+	err = mv88e6xxx_single_chip_detect(chip, mdiodev);</div><div class='add'>+	if (err) {</div><div class='add'>+		err = mv88e6xxx_smi_init(chip, mdiodev-&gt;bus, mdiodev-&gt;addr);</div><div class='add'>+		if (err)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_detect(chip);</div><div class='add'>+		if (err)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;info-&gt;edsa_support == MV88E6XXX_EDSA_SUPPORTED)</div><div class='add'>+		chip-&gt;tag_protocol = DSA_TAG_PROTO_EDSA;</div><div class='add'>+	else</div><div class='add'>+		chip-&gt;tag_protocol = DSA_TAG_PROTO_DSA;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_phy_init(chip);</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;get_eeprom) {</div><div class='add'>+		if (np)</div><div class='add'>+			of_property_read_u32(np, "eeprom-length",</div><div class='add'>+					     &amp;chip-&gt;eeprom_len);</div><div class='add'>+		else</div><div class='add'>+			chip-&gt;eeprom_len = pdata-&gt;eeprom_len;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	err = mv88e6xxx_switch_reset(chip);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_phy;</div><div class='add'>+</div><div class='add'>+	if (np) {</div><div class='add'>+		chip-&gt;irq = of_irq_get(np, 0);</div><div class='add'>+		if (chip-&gt;irq == -EPROBE_DEFER) {</div><div class='add'>+			err = chip-&gt;irq;</div><div class='add'>+			goto out_phy;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pdata)</div><div class='add'>+		chip-&gt;irq = pdata-&gt;irq;</div><div class='add'>+</div><div class='add'>+	/* Has to be performed before the MDIO bus is created, because</div><div class='add'>+	 * the PHYs will link their interrupts to these interrupt</div><div class='add'>+	 * controllers</div><div class='add'>+	 */</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	if (chip-&gt;irq &gt; 0)</div><div class='add'>+		err = mv88e6xxx_g1_irq_setup(chip);</div><div class='add'>+	else</div><div class='add'>+		err = mv88e6xxx_irq_poll_setup(chip);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_phy;</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;info-&gt;g2_irqs &gt; 0) {</div><div class='add'>+		err = mv88e6xxx_g2_irq_setup(chip);</div><div class='add'>+		if (err)</div><div class='add'>+			goto out_g1_irq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_atu_prob_irq_setup(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_g2_irq;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_vtu_prob_irq_setup(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_g1_atu_prob_irq;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_register_switch(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_g1_vtu_prob_irq;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_g1_vtu_prob_irq:</div><div class='add'>+	mv88e6xxx_g1_vtu_prob_irq_free(chip);</div><div class='add'>+out_g1_atu_prob_irq:</div><div class='add'>+	mv88e6xxx_g1_atu_prob_irq_free(chip);</div><div class='add'>+out_g2_irq:</div><div class='add'>+	if (chip-&gt;info-&gt;g2_irqs &gt; 0)</div><div class='add'>+		mv88e6xxx_g2_irq_free(chip);</div><div class='add'>+out_g1_irq:</div><div class='add'>+	if (chip-&gt;irq &gt; 0)</div><div class='add'>+		mv88e6xxx_g1_irq_free(chip);</div><div class='add'>+	else</div><div class='add'>+		mv88e6xxx_irq_poll_free(chip);</div><div class='add'>+out_phy:</div><div class='add'>+	mv88e6xxx_phy_destroy(chip);</div><div class='add'>+out:</div><div class='add'>+	if (pdata)</div><div class='add'>+		dev_put(pdata-&gt;netdev);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_remove(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds = dev_get_drvdata(&amp;mdiodev-&gt;dev);</div><div class='add'>+	struct mv88e6xxx_chip *chip;</div><div class='add'>+</div><div class='add'>+	if (!ds)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	chip = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_unregister_switch(chip);</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_g1_vtu_prob_irq_free(chip);</div><div class='add'>+	mv88e6xxx_g1_atu_prob_irq_free(chip);</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;info-&gt;g2_irqs &gt; 0)</div><div class='add'>+		mv88e6xxx_g2_irq_free(chip);</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;irq &gt; 0)</div><div class='add'>+		mv88e6xxx_g1_irq_free(chip);</div><div class='add'>+	else</div><div class='add'>+		mv88e6xxx_irq_poll_free(chip);</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_phy_destroy(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_shutdown(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds = dev_get_drvdata(&amp;mdiodev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	if (!ds)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dsa_switch_shutdown(ds);</div><div class='add'>+</div><div class='add'>+	dev_set_drvdata(&amp;mdiodev-&gt;dev, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id mv88e6xxx_of_match[] = {</div><div class='add'>+	{</div><div class='add'>+		.compatible = "marvell,mv88e6085",</div><div class='add'>+		.data = &amp;mv88e6xxx_table[MV88E6085],</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "marvell,mv88e6190",</div><div class='add'>+		.data = &amp;mv88e6xxx_table[MV88E6190],</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "marvell,mv88e6250",</div><div class='add'>+		.data = &amp;mv88e6xxx_table[MV88E6250],</div><div class='add'>+	},</div><div class='add'>+	{ /* sentinel */ },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+MODULE_DEVICE_TABLE(of, mv88e6xxx_of_match);</div><div class='add'>+</div><div class='add'>+static struct mdio_driver mv88e6xxx_driver = {</div><div class='add'>+	.probe	= mv88e6xxx_probe,</div><div class='add'>+	.remove = mv88e6xxx_remove,</div><div class='add'>+	.shutdown = mv88e6xxx_shutdown,</div><div class='add'>+	.mdiodrv.driver = {</div><div class='add'>+		.name = "mv88e6085",</div><div class='add'>+		.of_match_table = mv88e6xxx_of_match,</div><div class='add'>+		.pm = &amp;mv88e6xxx_pm_ops,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+mdio_module_driver(mv88e6xxx_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Lennert Buytenhek &lt;buytenh@wantstofly.org&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Driver for Marvell 88E6XXX ethernet switch chips");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/chip.h b/drivers/net/dsa/mv88e6xxx/chip.h<br/>new file mode 100644<br/>index 000000000000..2f211e55cb47<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/chip.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/chip.h</a></div><div class='hunk'>@@ -0,0 +1,846 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+/*</div><div class='add'>+ * Marvell 88E6xxx Ethernet switch single-chip definition</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2008 Marvell Semiconductor</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _MV88E6XXX_CHIP_H</div><div class='add'>+#define _MV88E6XXX_CHIP_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/idr.h&gt;</div><div class='add'>+#include &lt;linux/if_vlan.h&gt;</div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/gpio/consumer.h&gt;</div><div class='add'>+#include &lt;linux/kthread.h&gt;</div><div class='add'>+#include &lt;linux/leds.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/property.h&gt;</div><div class='add'>+#include &lt;linux/ptp_clock_kernel.h&gt;</div><div class='add'>+#include &lt;linux/timecounter.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+</div><div class='add'>+#define EDSA_HLEN		8</div><div class='add'>+#define MV88E6XXX_N_FID		4096</div><div class='add'>+#define MV88E6XXX_N_SID		64</div><div class='add'>+</div><div class='add'>+#define MV88E6XXX_FID_STANDALONE	0</div><div class='add'>+#define MV88E6XXX_FID_BRIDGED		1</div><div class='add'>+</div><div class='add'>+/* PVT limits for 4-bit port and 5-bit switch */</div><div class='add'>+#define MV88E6XXX_MAX_PVT_SWITCHES	32</div><div class='add'>+#define MV88E6XXX_MAX_PVT_PORTS		16</div><div class='add'>+#define MV88E6XXX_MAX_PVT_ENTRIES	\</div><div class='add'>+	(MV88E6XXX_MAX_PVT_SWITCHES * MV88E6XXX_MAX_PVT_PORTS)</div><div class='add'>+</div><div class='add'>+#define MV88E6XXX_MAX_GPIO	16</div><div class='add'>+</div><div class='add'>+enum mv88e6xxx_egress_mode {</div><div class='add'>+	MV88E6XXX_EGRESS_MODE_UNMODIFIED,</div><div class='add'>+	MV88E6XXX_EGRESS_MODE_UNTAGGED,</div><div class='add'>+	MV88E6XXX_EGRESS_MODE_TAGGED,</div><div class='add'>+	MV88E6XXX_EGRESS_MODE_ETHERTYPE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum mv88e6xxx_egress_direction {</div><div class='add'>+        MV88E6XXX_EGRESS_DIR_INGRESS,</div><div class='add'>+        MV88E6XXX_EGRESS_DIR_EGRESS,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum mv88e6xxx_frame_mode {</div><div class='add'>+	MV88E6XXX_FRAME_MODE_NORMAL,</div><div class='add'>+	MV88E6XXX_FRAME_MODE_DSA,</div><div class='add'>+	MV88E6XXX_FRAME_MODE_PROVIDER,</div><div class='add'>+	MV88E6XXX_FRAME_MODE_ETHERTYPE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* List of supported models */</div><div class='add'>+enum mv88e6xxx_model {</div><div class='add'>+	MV88E6020,</div><div class='add'>+	MV88E6071,</div><div class='add'>+	MV88E6085,</div><div class='add'>+	MV88E6095,</div><div class='add'>+	MV88E6097,</div><div class='add'>+	MV88E6123,</div><div class='add'>+	MV88E6131,</div><div class='add'>+	MV88E6141,</div><div class='add'>+	MV88E6161,</div><div class='add'>+	MV88E6165,</div><div class='add'>+	MV88E6171,</div><div class='add'>+	MV88E6172,</div><div class='add'>+	MV88E6175,</div><div class='add'>+	MV88E6176,</div><div class='add'>+	MV88E6185,</div><div class='add'>+	MV88E6190,</div><div class='add'>+	MV88E6190X,</div><div class='add'>+	MV88E6191,</div><div class='add'>+	MV88E6191X,</div><div class='add'>+	MV88E6193X,</div><div class='add'>+	MV88E6220,</div><div class='add'>+	MV88E6240,</div><div class='add'>+	MV88E6250,</div><div class='add'>+	MV88E6290,</div><div class='add'>+	MV88E6320,</div><div class='add'>+	MV88E6321,</div><div class='add'>+	MV88E6341,</div><div class='add'>+	MV88E6350,</div><div class='add'>+	MV88E6351,</div><div class='add'>+	MV88E6352,</div><div class='add'>+	MV88E6361,</div><div class='add'>+	MV88E6390,</div><div class='add'>+	MV88E6390X,</div><div class='add'>+	MV88E6393X,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum mv88e6xxx_family {</div><div class='add'>+	MV88E6XXX_FAMILY_NONE,</div><div class='add'>+	MV88E6XXX_FAMILY_6065,	/* 6031 6035 6061 6065 */</div><div class='add'>+	MV88E6XXX_FAMILY_6095,	/* 6092 6095 */</div><div class='add'>+	MV88E6XXX_FAMILY_6097,	/* 6046 6085 6096 6097 */</div><div class='add'>+	MV88E6XXX_FAMILY_6165,	/* 6123 6161 6165 */</div><div class='add'>+	MV88E6XXX_FAMILY_6185,	/* 6108 6121 6122 6131 6152 6155 6182 6185 */</div><div class='add'>+	MV88E6XXX_FAMILY_6250,	/* 6220 6250 6020 6071 */</div><div class='add'>+	MV88E6XXX_FAMILY_6320,	/* 6320 6321 */</div><div class='add'>+	MV88E6XXX_FAMILY_6341,	/* 6141 6341 */</div><div class='add'>+	MV88E6XXX_FAMILY_6351,	/* 6171 6175 6350 6351 */</div><div class='add'>+	MV88E6XXX_FAMILY_6352,	/* 6172 6176 6240 6352 */</div><div class='add'>+	MV88E6XXX_FAMILY_6390,  /* 6190 6190X 6191 6290 6390 6390X */</div><div class='add'>+	MV88E6XXX_FAMILY_6393,	/* 6191X 6193X 6361 6393X */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * enum mv88e6xxx_edsa_support - Ethertype DSA tag support level</div><div class='add'>+ * @MV88E6XXX_EDSA_UNSUPPORTED:  Device has no support for EDSA tags</div><div class='add'>+ * @MV88E6XXX_EDSA_UNDOCUMENTED: Documentation indicates that</div><div class='add'>+ *                               egressing FORWARD frames with an EDSA</div><div class='add'>+ *                               tag is reserved for future use, but</div><div class='add'>+ *                               empirical data shows that this mode</div><div class='add'>+ *                               is supported.</div><div class='add'>+ * @MV88E6XXX_EDSA_SUPPORTED:    EDSA tags are fully supported.</div><div class='add'>+ */</div><div class='add'>+enum mv88e6xxx_edsa_support {</div><div class='add'>+	MV88E6XXX_EDSA_UNSUPPORTED = 0,</div><div class='add'>+	MV88E6XXX_EDSA_UNDOCUMENTED,</div><div class='add'>+	MV88E6XXX_EDSA_SUPPORTED,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mv88e6xxx_ops;</div><div class='add'>+</div><div class='add'>+struct mv88e6xxx_info {</div><div class='add'>+	enum mv88e6xxx_family family;</div><div class='add'>+	u16 prod_num;</div><div class='add'>+	const char *name;</div><div class='add'>+	unsigned int num_databases;</div><div class='add'>+	unsigned int num_macs;</div><div class='add'>+	unsigned int num_ports;</div><div class='add'>+	unsigned int num_internal_phys;</div><div class='add'>+	unsigned int num_gpio;</div><div class='add'>+	unsigned int max_vid;</div><div class='add'>+	unsigned int max_sid;</div><div class='add'>+	unsigned int port_base_addr;</div><div class='add'>+	unsigned int phy_base_addr;</div><div class='add'>+	unsigned int global1_addr;</div><div class='add'>+	unsigned int global2_addr;</div><div class='add'>+	unsigned int age_time_coeff;</div><div class='add'>+	unsigned int g1_irqs;</div><div class='add'>+	unsigned int g2_irqs;</div><div class='add'>+	int stats_type;</div><div class='add'>+	bool pvt;</div><div class='add'>+</div><div class='add'>+	/* Mark certain ports as invalid. This is required for example for the</div><div class='add'>+	 * MV88E6220 (which is in general a MV88E6250 with 7 ports) but the</div><div class='add'>+	 * ports 2-4 are not routet to pins.</div><div class='add'>+	 */</div><div class='add'>+	unsigned int invalid_port_mask;</div><div class='add'>+	/* Multi-chip Addressing Mode.</div><div class='add'>+	 * Some chips respond to only 2 registers of its own SMI device address</div><div class='add'>+	 * when it is non-zero, and use indirect access to internal registers.</div><div class='add'>+	 */</div><div class='add'>+	bool multi_chip;</div><div class='add'>+	/* Dual-chip Addressing Mode</div><div class='add'>+	 * Some chips respond to only half of the 32 SMI addresses,</div><div class='add'>+	 * allowing two to coexist on the same SMI interface.</div><div class='add'>+	 */</div><div class='add'>+	bool dual_chip;</div><div class='add'>+</div><div class='add'>+	enum mv88e6xxx_edsa_support edsa_support;</div><div class='add'>+</div><div class='add'>+	/* Mask for FromPort and ToPort value of PortVec used in ATU Move</div><div class='add'>+	 * operation. 0 means that the ATU Move operation is not supported.</div><div class='add'>+	 */</div><div class='add'>+	u8 atu_move_port_mask;</div><div class='add'>+	const struct mv88e6xxx_ops *ops;</div><div class='add'>+</div><div class='add'>+	/* Supports PTP */</div><div class='add'>+	bool ptp_support;</div><div class='add'>+</div><div class='add'>+	/* Internal PHY start index. 0 means that internal PHYs range starts at</div><div class='add'>+	 * port 0, 1 means internal PHYs range starts at port 1, etc</div><div class='add'>+	 */</div><div class='add'>+	unsigned int internal_phys_offset;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mv88e6xxx_atu_entry {</div><div class='add'>+	u8	state;</div><div class='add'>+	bool	trunk;</div><div class='add'>+	u16	portvec;</div><div class='add'>+	u8	mac[ETH_ALEN];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mv88e6xxx_vtu_entry {</div><div class='add'>+	u16	vid;</div><div class='add'>+	u16	fid;</div><div class='add'>+	u8	sid;</div><div class='add'>+	bool	valid;</div><div class='add'>+	bool	policy;</div><div class='add'>+	u8	member[DSA_MAX_PORTS];</div><div class='add'>+	u8	state[DSA_MAX_PORTS];	/* Older silicon has no STU */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mv88e6xxx_stu_entry {</div><div class='add'>+	u8	sid;</div><div class='add'>+	bool	valid;</div><div class='add'>+	u8	state[DSA_MAX_PORTS];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mv88e6xxx_bus_ops;</div><div class='add'>+struct mv88e6xxx_irq_ops;</div><div class='add'>+struct mv88e6xxx_gpio_ops;</div><div class='add'>+struct mv88e6xxx_avb_ops;</div><div class='add'>+struct mv88e6xxx_ptp_ops;</div><div class='add'>+struct mv88e6xxx_pcs_ops;</div><div class='add'>+struct mv88e6xxx_cc_coeffs;</div><div class='add'>+</div><div class='add'>+struct mv88e6xxx_irq {</div><div class='add'>+	u16 masked;</div><div class='add'>+	struct irq_chip chip;</div><div class='add'>+	struct irq_domain *domain;</div><div class='add'>+	int nirqs;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* state flags for mv88e6xxx_port_hwtstamp::state */</div><div class='add'>+enum {</div><div class='add'>+	MV88E6XXX_HWTSTAMP_ENABLED,</div><div class='add'>+	MV88E6XXX_HWTSTAMP_TX_IN_PROGRESS,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mv88e6xxx_port_hwtstamp {</div><div class='add'>+	/* Port index */</div><div class='add'>+	int port_id;</div><div class='add'>+</div><div class='add'>+	/* Timestamping state */</div><div class='add'>+	unsigned long state;</div><div class='add'>+</div><div class='add'>+	/* Resources for receive timestamping */</div><div class='add'>+	struct sk_buff_head rx_queue;</div><div class='add'>+	struct sk_buff_head rx_queue2;</div><div class='add'>+</div><div class='add'>+	/* Resources for transmit timestamping */</div><div class='add'>+	unsigned long tx_tstamp_start;</div><div class='add'>+	struct sk_buff *tx_skb;</div><div class='add'>+	u16 tx_seq_id;</div><div class='add'>+</div><div class='add'>+	/* Current timestamp configuration */</div><div class='add'>+	struct kernel_hwtstamp_config tstamp_config;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum mv88e6xxx_policy_mapping {</div><div class='add'>+	MV88E6XXX_POLICY_MAPPING_DA,</div><div class='add'>+	MV88E6XXX_POLICY_MAPPING_SA,</div><div class='add'>+	MV88E6XXX_POLICY_MAPPING_VTU,</div><div class='add'>+	MV88E6XXX_POLICY_MAPPING_ETYPE,</div><div class='add'>+	MV88E6XXX_POLICY_MAPPING_PPPOE,</div><div class='add'>+	MV88E6XXX_POLICY_MAPPING_VBAS,</div><div class='add'>+	MV88E6XXX_POLICY_MAPPING_OPT82,</div><div class='add'>+	MV88E6XXX_POLICY_MAPPING_UDP,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum mv88e6xxx_policy_action {</div><div class='add'>+	MV88E6XXX_POLICY_ACTION_NORMAL,</div><div class='add'>+	MV88E6XXX_POLICY_ACTION_MIRROR,</div><div class='add'>+	MV88E6XXX_POLICY_ACTION_TRAP,</div><div class='add'>+	MV88E6XXX_POLICY_ACTION_DISCARD,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mv88e6xxx_policy {</div><div class='add'>+	enum mv88e6xxx_policy_mapping mapping;</div><div class='add'>+	enum mv88e6xxx_policy_action action;</div><div class='add'>+	struct ethtool_rx_flow_spec fs;</div><div class='add'>+	u8 addr[ETH_ALEN];</div><div class='add'>+	int port;</div><div class='add'>+	u16 vid;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mv88e6xxx_vlan {</div><div class='add'>+	u16	vid;</div><div class='add'>+	bool	valid;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mv88e6xxx_port {</div><div class='add'>+	struct mv88e6xxx_chip *chip;</div><div class='add'>+	int port;</div><div class='add'>+	struct fwnode_handle *fwnode;</div><div class='add'>+	struct mv88e6xxx_vlan bridge_pvid;</div><div class='add'>+	u64 serdes_stats[2];</div><div class='add'>+	u64 atu_member_violation;</div><div class='add'>+	u64 atu_miss_violation;</div><div class='add'>+	u64 atu_full_violation;</div><div class='add'>+	u64 vtu_member_violation;</div><div class='add'>+	u64 vtu_miss_violation;</div><div class='add'>+	phy_interface_t interface;</div><div class='add'>+	u8 cmode;</div><div class='add'>+	bool mirror_ingress;</div><div class='add'>+	bool mirror_egress;</div><div class='add'>+	struct devlink_region *region;</div><div class='add'>+	void *pcs_private;</div><div class='add'>+</div><div class='add'>+	/* LED related information */</div><div class='add'>+	bool fiber;</div><div class='add'>+	struct led_classdev led0;</div><div class='add'>+	struct led_classdev led1;</div><div class='add'>+</div><div class='add'>+	/* MacAuth Bypass control flag */</div><div class='add'>+	bool mab;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum mv88e6xxx_region_id {</div><div class='add'>+	MV88E6XXX_REGION_GLOBAL1 = 0,</div><div class='add'>+	MV88E6XXX_REGION_GLOBAL2,</div><div class='add'>+	MV88E6XXX_REGION_ATU,</div><div class='add'>+	MV88E6XXX_REGION_VTU,</div><div class='add'>+	MV88E6XXX_REGION_STU,</div><div class='add'>+	MV88E6XXX_REGION_PVT,</div><div class='add'>+</div><div class='add'>+	_MV88E6XXX_REGION_MAX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mv88e6xxx_region_priv {</div><div class='add'>+	enum mv88e6xxx_region_id id;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mv88e6xxx_mst {</div><div class='add'>+	struct list_head node;</div><div class='add'>+</div><div class='add'>+	refcount_t refcnt;</div><div class='add'>+	struct net_device *br;</div><div class='add'>+	u16 msti;</div><div class='add'>+</div><div class='add'>+	struct mv88e6xxx_stu_entry stu;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define STATS_TYPE_PORT		BIT(0)</div><div class='add'>+#define STATS_TYPE_BANK0	BIT(1)</div><div class='add'>+#define STATS_TYPE_BANK1	BIT(2)</div><div class='add'>+</div><div class='add'>+struct mv88e6xxx_hw_stat {</div><div class='add'>+	char string[ETH_GSTRING_LEN];</div><div class='add'>+	size_t size;</div><div class='add'>+	int reg;</div><div class='add'>+	int type;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mv88e6xxx_chip {</div><div class='add'>+	const struct mv88e6xxx_info *info;</div><div class='add'>+</div><div class='add'>+	/* Currently configured tagging protocol */</div><div class='add'>+	enum dsa_tag_protocol tag_protocol;</div><div class='add'>+</div><div class='add'>+	/* The dsa_switch this private structure is related to */</div><div class='add'>+	struct dsa_switch *ds;</div><div class='add'>+</div><div class='add'>+	/* The device this structure is associated to */</div><div class='add'>+	struct device *dev;</div><div class='add'>+</div><div class='add'>+	/* This mutex protects the access to the switch registers */</div><div class='add'>+	struct mutex reg_lock;</div><div class='add'>+</div><div class='add'>+	/* The MII bus and the address on the bus that is used to</div><div class='add'>+	 * communication with the switch</div><div class='add'>+	 */</div><div class='add'>+	const struct mv88e6xxx_bus_ops *smi_ops;</div><div class='add'>+	struct mii_bus *bus;</div><div class='add'>+	int sw_addr;</div><div class='add'>+</div><div class='add'>+	/* Handles automatic disabling and re-enabling of the PHY</div><div class='add'>+	 * polling unit.</div><div class='add'>+	 */</div><div class='add'>+	const struct mv88e6xxx_bus_ops *phy_ops;</div><div class='add'>+	struct mutex		ppu_mutex;</div><div class='add'>+	int			ppu_disabled;</div><div class='add'>+	struct work_struct	ppu_work;</div><div class='add'>+	struct timer_list	ppu_timer;</div><div class='add'>+</div><div class='add'>+	/* This mutex serialises access to the statistics unit.</div><div class='add'>+	 * Hold this mutex over snapshot + dump sequences.</div><div class='add'>+	 */</div><div class='add'>+	struct mutex	stats_mutex;</div><div class='add'>+</div><div class='add'>+	/* A switch may have a GPIO line tied to its reset pin. Parse</div><div class='add'>+	 * this from the device tree, and use it before performing</div><div class='add'>+	 * switch soft reset.</div><div class='add'>+	 */</div><div class='add'>+	struct gpio_desc *reset;</div><div class='add'>+</div><div class='add'>+	/* set to size of eeprom if supported by the switch */</div><div class='add'>+	u32 eeprom_len;</div><div class='add'>+</div><div class='add'>+	/* List of mdio busses */</div><div class='add'>+	struct list_head mdios;</div><div class='add'>+</div><div class='add'>+	/* Policy Control List IDs and rules */</div><div class='add'>+	struct idr policies;</div><div class='add'>+</div><div class='add'>+	/* There can be two interrupt controllers, which are chained</div><div class='add'>+	 * off a GPIO as interrupt source</div><div class='add'>+	 */</div><div class='add'>+	struct mv88e6xxx_irq g1_irq;</div><div class='add'>+	struct mv88e6xxx_irq g2_irq;</div><div class='add'>+	int irq;</div><div class='add'>+	char irq_name[64];</div><div class='add'>+	int device_irq;</div><div class='add'>+	char device_irq_name[64];</div><div class='add'>+	int watchdog_irq;</div><div class='add'>+	char watchdog_irq_name[64];</div><div class='add'>+</div><div class='add'>+	int atu_prob_irq;</div><div class='add'>+	char atu_prob_irq_name[64];</div><div class='add'>+	int vtu_prob_irq;</div><div class='add'>+	char vtu_prob_irq_name[64];</div><div class='add'>+	struct kthread_worker *kworker;</div><div class='add'>+	struct kthread_delayed_work irq_poll_work;</div><div class='add'>+</div><div class='add'>+	/* GPIO resources */</div><div class='add'>+	u8 gpio_data[2];</div><div class='add'>+</div><div class='add'>+	/* This cyclecounter abstracts the switch PTP time.</div><div class='add'>+	 * reg_lock must be held for any operation that read()s.</div><div class='add'>+	 */</div><div class='add'>+	struct cyclecounter	tstamp_cc;</div><div class='add'>+	struct timecounter	tstamp_tc;</div><div class='add'>+	struct delayed_work	overflow_work;</div><div class='add'>+	const struct mv88e6xxx_cc_coeffs *cc_coeffs;</div><div class='add'>+</div><div class='add'>+	struct ptp_clock	*ptp_clock;</div><div class='add'>+	struct ptp_clock_info	ptp_clock_info;</div><div class='add'>+	struct delayed_work	tai_event_work;</div><div class='add'>+	struct ptp_pin_desc	pin_config[MV88E6XXX_MAX_GPIO];</div><div class='add'>+	u16 enable_count;</div><div class='add'>+</div><div class='add'>+	/* Current ingress and egress monitor ports */</div><div class='add'>+	int egress_dest_port;</div><div class='add'>+	int ingress_dest_port;</div><div class='add'>+</div><div class='add'>+	/* Per-port timestamping resources. */</div><div class='add'>+	struct mv88e6xxx_port_hwtstamp port_hwtstamp[DSA_MAX_PORTS];</div><div class='add'>+</div><div class='add'>+	/* Array of port structures. */</div><div class='add'>+	struct mv88e6xxx_port ports[DSA_MAX_PORTS];</div><div class='add'>+</div><div class='add'>+	/* devlink regions */</div><div class='add'>+	struct devlink_region *regions[_MV88E6XXX_REGION_MAX];</div><div class='add'>+</div><div class='add'>+	/* Bridge MST to SID mappings */</div><div class='add'>+	struct list_head msts;</div><div class='add'>+</div><div class='add'>+	/* FID map */</div><div class='add'>+	DECLARE_BITMAP(fid_bitmap, MV88E6XXX_N_FID);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mv88e6xxx_bus_ops {</div><div class='add'>+	int (*read)(struct mv88e6xxx_chip *chip, int addr, int reg, u16 *val);</div><div class='add'>+	int (*write)(struct mv88e6xxx_chip *chip, int addr, int reg, u16 val);</div><div class='add'>+	int (*init)(struct mv88e6xxx_chip *chip);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mv88e6xxx_mdio_bus {</div><div class='add'>+	struct mii_bus *bus;</div><div class='add'>+	struct mv88e6xxx_chip *chip;</div><div class='add'>+	struct list_head list;</div><div class='add'>+	bool external;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mv88e6xxx_ops {</div><div class='add'>+	/* Switch Setup Errata, called early in the switch setup to</div><div class='add'>+	 * allow any errata actions to be performed</div><div class='add'>+	 */</div><div class='add'>+	int (*setup_errata)(struct mv88e6xxx_chip *chip);</div><div class='add'>+</div><div class='add'>+	int (*ieee_pri_map)(struct mv88e6xxx_chip *chip);</div><div class='add'>+	int (*ip_pri_map)(struct mv88e6xxx_chip *chip);</div><div class='add'>+</div><div class='add'>+	/* Ingress Rate Limit unit (IRL) operations */</div><div class='add'>+	int (*irl_init_all)(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+</div><div class='add'>+	int (*get_eeprom)(struct mv88e6xxx_chip *chip,</div><div class='add'>+			  struct ethtool_eeprom *eeprom, u8 *data);</div><div class='add'>+	int (*set_eeprom)(struct mv88e6xxx_chip *chip,</div><div class='add'>+			  struct ethtool_eeprom *eeprom, u8 *data);</div><div class='add'>+</div><div class='add'>+	int (*set_switch_mac)(struct mv88e6xxx_chip *chip, u8 *addr);</div><div class='add'>+</div><div class='add'>+	int (*phy_read)(struct mv88e6xxx_chip *chip,</div><div class='add'>+			struct mii_bus *bus,</div><div class='add'>+			int addr, int reg, u16 *val);</div><div class='add'>+	int (*phy_write)(struct mv88e6xxx_chip *chip,</div><div class='add'>+			 struct mii_bus *bus,</div><div class='add'>+			 int addr, int reg, u16 val);</div><div class='add'>+</div><div class='add'>+	int (*phy_read_c45)(struct mv88e6xxx_chip *chip,</div><div class='add'>+			    struct mii_bus *bus,</div><div class='add'>+			    int addr, int devad, int reg, u16 *val);</div><div class='add'>+	int (*phy_write_c45)(struct mv88e6xxx_chip *chip,</div><div class='add'>+			     struct mii_bus *bus,</div><div class='add'>+			     int addr, int devad, int reg, u16 val);</div><div class='add'>+</div><div class='add'>+	/* Priority Override Table operations */</div><div class='add'>+	int (*pot_clear)(struct mv88e6xxx_chip *chip);</div><div class='add'>+</div><div class='add'>+	/* PHY Polling Unit (PPU) operations */</div><div class='add'>+	int (*ppu_enable)(struct mv88e6xxx_chip *chip);</div><div class='add'>+	int (*ppu_disable)(struct mv88e6xxx_chip *chip);</div><div class='add'>+</div><div class='add'>+	/* Additional handlers to run before and after hard reset, to make sure</div><div class='add'>+	 * that the switch and EEPROM are in a good state.</div><div class='add'>+	 */</div><div class='add'>+	int (*hardware_reset_pre)(struct mv88e6xxx_chip *chip);</div><div class='add'>+	int (*hardware_reset_post)(struct mv88e6xxx_chip *chip);</div><div class='add'>+</div><div class='add'>+	/* Switch Software Reset */</div><div class='add'>+	int (*reset)(struct mv88e6xxx_chip *chip);</div><div class='add'>+</div><div class='add'>+	/* RGMII Receive/Transmit Timing Control</div><div class='add'>+	 * Add delay on PHY_INTERFACE_MODE_RGMII_*ID, no delay otherwise.</div><div class='add'>+	 */</div><div class='add'>+	int (*port_set_rgmii_delay)(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				    phy_interface_t mode);</div><div class='add'>+</div><div class='add'>+#define LINK_FORCED_DOWN	0</div><div class='add'>+#define LINK_FORCED_UP		1</div><div class='add'>+#define LINK_UNFORCED		-2</div><div class='add'>+</div><div class='add'>+	/* Port's MAC link state</div><div class='add'>+	 * Use LINK_FORCED_UP or LINK_FORCED_DOWN to force link up or down,</div><div class='add'>+	 * or LINK_UNFORCED for normal link detection.</div><div class='add'>+	 */</div><div class='add'>+	int (*port_set_link)(struct mv88e6xxx_chip *chip, int port, int link);</div><div class='add'>+</div><div class='add'>+	/* Synchronise the port link state with that of the SERDES</div><div class='add'>+	 */</div><div class='add'>+	int (*port_sync_link)(struct mv88e6xxx_chip *chip, int port, unsigned int mode, bool isup);</div><div class='add'>+</div><div class='add'>+#define PAUSE_ON		1</div><div class='add'>+#define PAUSE_OFF		0</div><div class='add'>+</div><div class='add'>+	/* Enable/disable sending Pause */</div><div class='add'>+	int (*port_set_pause)(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+			      int pause);</div><div class='add'>+</div><div class='add'>+#define SPEED_UNFORCED		-2</div><div class='add'>+#define DUPLEX_UNFORCED		-2</div><div class='add'>+</div><div class='add'>+	/* Port's MAC speed (in Mbps) and MAC duplex mode</div><div class='add'>+	 *</div><div class='add'>+	 * Depending on the chip, 10, 100, 200, 1000, 2500, 10000 are valid.</div><div class='add'>+	 * Use SPEED_UNFORCED for normal detection.</div><div class='add'>+	 *</div><div class='add'>+	 * Use DUPLEX_HALF or DUPLEX_FULL to force half or full duplex,</div><div class='add'>+	 * or DUPLEX_UNFORCED for normal duplex detection.</div><div class='add'>+	 */</div><div class='add'>+	int (*port_set_speed_duplex)(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				     int speed, int duplex);</div><div class='add'>+</div><div class='add'>+	/* What interface mode should be used for maximum speed? */</div><div class='add'>+	phy_interface_t (*port_max_speed_mode)(struct mv88e6xxx_chip *chip,</div><div class='add'>+					       int port);</div><div class='add'>+</div><div class='add'>+	int (*port_tag_remap)(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+</div><div class='add'>+	int (*port_set_policy)(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+			       enum mv88e6xxx_policy_mapping mapping,</div><div class='add'>+			       enum mv88e6xxx_policy_action action);</div><div class='add'>+</div><div class='add'>+	int (*port_set_frame_mode)(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				   enum mv88e6xxx_frame_mode mode);</div><div class='add'>+	int (*port_set_ucast_flood)(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				    bool unicast);</div><div class='add'>+	int (*port_set_mcast_flood)(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				    bool multicast);</div><div class='add'>+	int (*port_set_ether_type)(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				   u16 etype);</div><div class='add'>+	int (*port_set_jumbo_size)(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				   size_t size);</div><div class='add'>+</div><div class='add'>+	int (*port_egress_rate_limiting)(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+	int (*port_pause_limit)(struct mv88e6xxx_chip *chip, int port, u8 in,</div><div class='add'>+				u8 out);</div><div class='add'>+	int (*port_disable_learn_limit)(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+	int (*port_disable_pri_override)(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+	int (*port_setup_message_port)(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+</div><div class='add'>+	/* CMODE control what PHY mode the MAC will use, eg. SGMII, RGMII, etc.</div><div class='add'>+	 * Some chips allow this to be configured on specific ports.</div><div class='add'>+	 */</div><div class='add'>+	int (*port_set_cmode)(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+			      phy_interface_t mode);</div><div class='add'>+	int (*port_get_cmode)(struct mv88e6xxx_chip *chip, int port, u8 *cmode);</div><div class='add'>+</div><div class='add'>+	/* LED control */</div><div class='add'>+	int (*port_setup_leds)(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+</div><div class='add'>+	/* Some devices have a per port register indicating what is</div><div class='add'>+	 * the upstream port this port should forward to.</div><div class='add'>+	 */</div><div class='add'>+	int (*port_set_upstream_port)(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				      int upstream_port);</div><div class='add'>+</div><div class='add'>+	/* Snapshot the statistics for a port. The statistics can then</div><div class='add'>+	 * be read back a leisure but still with a consistent view.</div><div class='add'>+	 */</div><div class='add'>+	int (*stats_snapshot)(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+</div><div class='add'>+	/* Set the histogram mode for statistics, when the control registers</div><div class='add'>+	 * are separated out of the STATS_OP register.</div><div class='add'>+	 */</div><div class='add'>+	int (*stats_set_histogram)(struct mv88e6xxx_chip *chip);</div><div class='add'>+</div><div class='add'>+	/* Return the number of strings describing statistics */</div><div class='add'>+	int (*stats_get_sset_count)(struct mv88e6xxx_chip *chip);</div><div class='add'>+	void (*stats_get_strings)(struct mv88e6xxx_chip *chip, uint8_t **data);</div><div class='add'>+	size_t (*stats_get_stat)(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				 const struct mv88e6xxx_hw_stat *stat,</div><div class='add'>+				 uint64_t *data);</div><div class='add'>+	int (*set_cpu_port)(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+	int (*set_egress_port)(struct mv88e6xxx_chip *chip,</div><div class='add'>+			       enum mv88e6xxx_egress_direction direction,</div><div class='add'>+			       int port);</div><div class='add'>+</div><div class='add'>+#define MV88E6XXX_CASCADE_PORT_NONE		0xe</div><div class='add'>+#define MV88E6XXX_CASCADE_PORT_MULTIPLE		0xf</div><div class='add'>+</div><div class='add'>+	int (*set_cascade_port)(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+</div><div class='add'>+	const struct mv88e6xxx_irq_ops *watchdog_ops;</div><div class='add'>+</div><div class='add'>+	int (*mgmt_rsvd2cpu)(struct mv88e6xxx_chip *chip);</div><div class='add'>+</div><div class='add'>+	/* SERDES lane mapping */</div><div class='add'>+	int (*serdes_get_lane)(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+</div><div class='add'>+	/* SERDES interrupt handling */</div><div class='add'>+	unsigned int (*serdes_irq_mapping)(struct mv88e6xxx_chip *chip,</div><div class='add'>+					   int port);</div><div class='add'>+</div><div class='add'>+	/* Statistics from the SERDES interface */</div><div class='add'>+	int (*serdes_get_sset_count)(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+	int (*serdes_get_strings)(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				  uint8_t **data);</div><div class='add'>+	size_t (*serdes_get_stats)(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				   uint64_t *data);</div><div class='add'>+</div><div class='add'>+	/* SERDES registers for ethtool */</div><div class='add'>+	int (*serdes_get_regs_len)(struct mv88e6xxx_chip *chip,  int port);</div><div class='add'>+	void (*serdes_get_regs)(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				void *_p);</div><div class='add'>+</div><div class='add'>+	/* SERDES SGMII/Fiber Output Amplitude */</div><div class='add'>+	int (*serdes_set_tx_amplitude)(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				       int val);</div><div class='add'>+</div><div class='add'>+	/* Address Translation Unit operations */</div><div class='add'>+	int (*atu_get_hash)(struct mv88e6xxx_chip *chip, u8 *hash);</div><div class='add'>+	int (*atu_set_hash)(struct mv88e6xxx_chip *chip, u8 hash);</div><div class='add'>+</div><div class='add'>+	/* VLAN Translation Unit operations */</div><div class='add'>+	int (*vtu_getnext)(struct mv88e6xxx_chip *chip,</div><div class='add'>+			   struct mv88e6xxx_vtu_entry *entry);</div><div class='add'>+	int (*vtu_loadpurge)(struct mv88e6xxx_chip *chip,</div><div class='add'>+			     struct mv88e6xxx_vtu_entry *entry);</div><div class='add'>+</div><div class='add'>+	/* Spanning Tree Unit operations */</div><div class='add'>+	int (*stu_getnext)(struct mv88e6xxx_chip *chip,</div><div class='add'>+			   struct mv88e6xxx_stu_entry *entry);</div><div class='add'>+	int (*stu_loadpurge)(struct mv88e6xxx_chip *chip,</div><div class='add'>+			     struct mv88e6xxx_stu_entry *entry);</div><div class='add'>+</div><div class='add'>+	/* GPIO operations */</div><div class='add'>+	const struct mv88e6xxx_gpio_ops *gpio_ops;</div><div class='add'>+</div><div class='add'>+	/* Interface to the AVB/PTP registers */</div><div class='add'>+	const struct mv88e6xxx_avb_ops *avb_ops;</div><div class='add'>+</div><div class='add'>+	/* Remote Management Unit operations */</div><div class='add'>+	int (*rmu_disable)(struct mv88e6xxx_chip *chip);</div><div class='add'>+</div><div class='add'>+	/* Precision Time Protocol operations */</div><div class='add'>+	const struct mv88e6xxx_ptp_ops *ptp_ops;</div><div class='add'>+</div><div class='add'>+	/* Phylink */</div><div class='add'>+	void (*phylink_get_caps)(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				 struct phylink_config *config);</div><div class='add'>+</div><div class='add'>+	const struct mv88e6xxx_pcs_ops *pcs_ops;</div><div class='add'>+</div><div class='add'>+	/* Max Frame Size */</div><div class='add'>+	int (*set_max_frame_size)(struct mv88e6xxx_chip *chip, int mtu);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mv88e6xxx_irq_ops {</div><div class='add'>+	/* Action to be performed when the interrupt happens */</div><div class='add'>+	int (*irq_action)(struct mv88e6xxx_chip *chip, int irq);</div><div class='add'>+	/* Setup the hardware to generate the interrupt */</div><div class='add'>+	int (*irq_setup)(struct mv88e6xxx_chip *chip);</div><div class='add'>+	/* Reset the hardware to stop generating the interrupt */</div><div class='add'>+	void (*irq_free)(struct mv88e6xxx_chip *chip);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mv88e6xxx_gpio_ops {</div><div class='add'>+	/* Get/set data on GPIO pin */</div><div class='add'>+	int (*get_data)(struct mv88e6xxx_chip *chip, unsigned int pin);</div><div class='add'>+	int (*set_data)(struct mv88e6xxx_chip *chip, unsigned int pin,</div><div class='add'>+			int value);</div><div class='add'>+</div><div class='add'>+	/* get/set GPIO direction */</div><div class='add'>+	int (*get_dir)(struct mv88e6xxx_chip *chip, unsigned int pin);</div><div class='add'>+	int (*set_dir)(struct mv88e6xxx_chip *chip, unsigned int pin,</div><div class='add'>+		       bool input);</div><div class='add'>+</div><div class='add'>+	/* get/set GPIO pin control */</div><div class='add'>+	int (*get_pctl)(struct mv88e6xxx_chip *chip, unsigned int pin,</div><div class='add'>+			int *func);</div><div class='add'>+	int (*set_pctl)(struct mv88e6xxx_chip *chip, unsigned int pin,</div><div class='add'>+			int func);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mv88e6xxx_avb_ops {</div><div class='add'>+	/* Access port-scoped Precision Time Protocol registers */</div><div class='add'>+	int (*port_ptp_read)(struct mv88e6xxx_chip *chip, int port, int addr,</div><div class='add'>+			     u16 *data, int len);</div><div class='add'>+	int (*port_ptp_write)(struct mv88e6xxx_chip *chip, int port, int addr,</div><div class='add'>+			      u16 data);</div><div class='add'>+</div><div class='add'>+	/* Access global Precision Time Protocol registers */</div><div class='add'>+	int (*ptp_read)(struct mv88e6xxx_chip *chip, int addr, u16 *data,</div><div class='add'>+			int len);</div><div class='add'>+	int (*ptp_write)(struct mv88e6xxx_chip *chip, int addr, u16 data);</div><div class='add'>+</div><div class='add'>+	/* Access global Time Application Interface registers */</div><div class='add'>+	int (*tai_read)(struct mv88e6xxx_chip *chip, int addr, u16 *data,</div><div class='add'>+			int len);</div><div class='add'>+	int (*tai_write)(struct mv88e6xxx_chip *chip, int addr, u16 data);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mv88e6xxx_ptp_ops {</div><div class='add'>+	u64 (*clock_read)(struct cyclecounter *cc);</div><div class='add'>+	int (*ptp_enable)(struct ptp_clock_info *ptp,</div><div class='add'>+			  struct ptp_clock_request *rq, int on);</div><div class='add'>+	int (*ptp_verify)(struct ptp_clock_info *ptp, unsigned int pin,</div><div class='add'>+			  enum ptp_pin_function func, unsigned int chan);</div><div class='add'>+	void (*event_work)(struct work_struct *ugly);</div><div class='add'>+	int (*port_enable)(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+	int (*port_disable)(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+	int (*global_enable)(struct mv88e6xxx_chip *chip);</div><div class='add'>+	int (*global_disable)(struct mv88e6xxx_chip *chip);</div><div class='add'>+	int (*set_ptp_cpu_port)(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+	int n_ext_ts;</div><div class='add'>+	int arr0_sts_reg;</div><div class='add'>+	int arr1_sts_reg;</div><div class='add'>+	int dep_sts_reg;</div><div class='add'>+	u32 rx_filters;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mv88e6xxx_pcs_ops {</div><div class='add'>+	int (*pcs_init)(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+	void (*pcs_teardown)(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+	struct phylink_pcs *(*pcs_select)(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+					  phy_interface_t mode);</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline bool mv88e6xxx_has_stu(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	return chip-&gt;info-&gt;max_sid &gt; 0 &amp;&amp;</div><div class='add'>+		chip-&gt;info-&gt;ops-&gt;stu_loadpurge &amp;&amp;</div><div class='add'>+		chip-&gt;info-&gt;ops-&gt;stu_getnext;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool mv88e6xxx_has_pvt(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	return chip-&gt;info-&gt;pvt;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool mv88e6xxx_has_lag(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	return !!chip-&gt;info-&gt;global2_addr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int mv88e6xxx_num_databases(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	return chip-&gt;info-&gt;num_databases;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int mv88e6xxx_num_macs(struct  mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	return chip-&gt;info-&gt;num_macs;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int mv88e6xxx_num_ports(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	return chip-&gt;info-&gt;num_ports;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int mv88e6xxx_max_vid(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	return chip-&gt;info-&gt;max_vid;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int mv88e6xxx_max_sid(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	return chip-&gt;info-&gt;max_sid;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u16 mv88e6xxx_port_mask(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	return GENMASK((s32)mv88e6xxx_num_ports(chip) - 1, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int mv88e6xxx_num_gpio(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	return chip-&gt;info-&gt;num_gpio;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool mv88e6xxx_is_invalid_port(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	return (chip-&gt;info-&gt;invalid_port_mask &amp; BIT(port)) != 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void mv88e6xxx_port_set_mab(struct mv88e6xxx_chip *chip,</div><div class='add'>+					  int port, bool mab)</div><div class='add'>+{</div><div class='add'>+	chip-&gt;ports[port].mab = mab;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_read(struct mv88e6xxx_chip *chip, int addr, int reg, u16 *val);</div><div class='add'>+int mv88e6xxx_write(struct mv88e6xxx_chip *chip, int addr, int reg, u16 val);</div><div class='add'>+int mv88e6xxx_wait_mask(struct mv88e6xxx_chip *chip, int addr, int reg,</div><div class='add'>+			u16 mask, u16 val);</div><div class='add'>+int mv88e6xxx_wait_bit(struct mv88e6xxx_chip *chip, int addr, int reg,</div><div class='add'>+		       int bit, int val);</div><div class='add'>+struct mii_bus *mv88e6xxx_default_mdio_bus(struct mv88e6xxx_chip *chip);</div><div class='add'>+</div><div class='add'>+static inline void mv88e6xxx_reg_lock(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	mutex_lock(&amp;chip-&gt;reg_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void mv88e6xxx_reg_unlock(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	mutex_unlock(&amp;chip-&gt;reg_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_vtu_walk(struct mv88e6xxx_chip *chip,</div><div class='add'>+		       int (*cb)(struct mv88e6xxx_chip *chip,</div><div class='add'>+				 const struct mv88e6xxx_vtu_entry *entry,</div><div class='add'>+				 void *priv),</div><div class='add'>+		       void *priv);</div><div class='add'>+</div><div class='add'>+#endif /* _MV88E6XXX_CHIP_H */</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/devlink.c b/drivers/net/dsa/mv88e6xxx/devlink.c<br/>new file mode 100644<br/>index 000000000000..da69e0b85879<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/devlink.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/devlink.c</a></div><div class='hunk'>@@ -0,0 +1,817 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+</div><div class='add'>+#include "chip.h"</div><div class='add'>+#include "devlink.h"</div><div class='add'>+#include "global1.h"</div><div class='add'>+#include "global2.h"</div><div class='add'>+#include "port.h"</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_atu_get_hash(struct mv88e6xxx_chip *chip, u8 *hash)</div><div class='add'>+{</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;atu_get_hash)</div><div class='add'>+		return chip-&gt;info-&gt;ops-&gt;atu_get_hash(chip, hash);</div><div class='add'>+</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_atu_set_hash(struct mv88e6xxx_chip *chip, u8 hash)</div><div class='add'>+{</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;atu_set_hash)</div><div class='add'>+		return chip-&gt;info-&gt;ops-&gt;atu_set_hash(chip, hash);</div><div class='add'>+</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+enum mv88e6xxx_devlink_param_id {</div><div class='add'>+	MV88E6XXX_DEVLINK_PARAM_ID_BASE = DEVLINK_PARAM_GENERIC_ID_MAX,</div><div class='add'>+	MV88E6XXX_DEVLINK_PARAM_ID_ATU_HASH,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_devlink_param_get(struct dsa_switch *ds, u32 id,</div><div class='add'>+				struct devlink_param_gset_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+</div><div class='add'>+	switch (id) {</div><div class='add'>+	case MV88E6XXX_DEVLINK_PARAM_ID_ATU_HASH:</div><div class='add'>+		err = mv88e6xxx_atu_get_hash(chip, &amp;ctx-&gt;val.vu8);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		err = -EOPNOTSUPP;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_devlink_param_set(struct dsa_switch *ds, u32 id,</div><div class='add'>+				struct devlink_param_gset_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+</div><div class='add'>+	switch (id) {</div><div class='add'>+	case MV88E6XXX_DEVLINK_PARAM_ID_ATU_HASH:</div><div class='add'>+		err = mv88e6xxx_atu_set_hash(chip, ctx-&gt;val.vu8);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		err = -EOPNOTSUPP;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct devlink_param mv88e6xxx_devlink_params[] = {</div><div class='add'>+	DSA_DEVLINK_PARAM_DRIVER(MV88E6XXX_DEVLINK_PARAM_ID_ATU_HASH,</div><div class='add'>+				 "ATU_hash", DEVLINK_PARAM_TYPE_U8,</div><div class='add'>+				 BIT(DEVLINK_PARAM_CMODE_RUNTIME)),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_setup_devlink_params(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	return dsa_devlink_params_register(ds, mv88e6xxx_devlink_params,</div><div class='add'>+					   ARRAY_SIZE(mv88e6xxx_devlink_params));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mv88e6xxx_teardown_devlink_params(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	dsa_devlink_params_unregister(ds, mv88e6xxx_devlink_params,</div><div class='add'>+				      ARRAY_SIZE(mv88e6xxx_devlink_params));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+enum mv88e6xxx_devlink_resource_id {</div><div class='add'>+	MV88E6XXX_RESOURCE_ID_ATU,</div><div class='add'>+	MV88E6XXX_RESOURCE_ID_ATU_BIN_0,</div><div class='add'>+	MV88E6XXX_RESOURCE_ID_ATU_BIN_1,</div><div class='add'>+	MV88E6XXX_RESOURCE_ID_ATU_BIN_2,</div><div class='add'>+	MV88E6XXX_RESOURCE_ID_ATU_BIN_3,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static u64 mv88e6xxx_devlink_atu_bin_get(struct mv88e6xxx_chip *chip,</div><div class='add'>+					 u16 bin)</div><div class='add'>+{</div><div class='add'>+	u16 occupancy = 0;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_atu_stats_set(chip, MV88E6XXX_G2_ATU_STATS_MODE_ALL,</div><div class='add'>+					 bin);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(chip-&gt;dev, "failed to set ATU stats kind/bin\n");</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_atu_get_next(chip, 0);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(chip-&gt;dev, "failed to perform ATU get next\n");</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_atu_stats_get(chip, &amp;occupancy);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(chip-&gt;dev, "failed to get ATU stats\n");</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	occupancy &amp;= MV88E6XXX_G2_ATU_STATS_MASK;</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return occupancy;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 mv88e6xxx_devlink_atu_bin_0_get(void *priv)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = priv;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_devlink_atu_bin_get(chip,</div><div class='add'>+					     MV88E6XXX_G2_ATU_STATS_BIN_0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 mv88e6xxx_devlink_atu_bin_1_get(void *priv)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = priv;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_devlink_atu_bin_get(chip,</div><div class='add'>+					     MV88E6XXX_G2_ATU_STATS_BIN_1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 mv88e6xxx_devlink_atu_bin_2_get(void *priv)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = priv;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_devlink_atu_bin_get(chip,</div><div class='add'>+					     MV88E6XXX_G2_ATU_STATS_BIN_2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 mv88e6xxx_devlink_atu_bin_3_get(void *priv)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = priv;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_devlink_atu_bin_get(chip,</div><div class='add'>+					     MV88E6XXX_G2_ATU_STATS_BIN_3);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 mv88e6xxx_devlink_atu_get(void *priv)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_devlink_atu_bin_0_get(priv) +</div><div class='add'>+		mv88e6xxx_devlink_atu_bin_1_get(priv) +</div><div class='add'>+		mv88e6xxx_devlink_atu_bin_2_get(priv) +</div><div class='add'>+		mv88e6xxx_devlink_atu_bin_3_get(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_setup_devlink_resources(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct devlink_resource_size_params size_params;</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	devlink_resource_size_params_init(&amp;size_params,</div><div class='add'>+					  mv88e6xxx_num_macs(chip),</div><div class='add'>+					  mv88e6xxx_num_macs(chip),</div><div class='add'>+					  1, DEVLINK_RESOURCE_UNIT_ENTRY);</div><div class='add'>+</div><div class='add'>+	err = dsa_devlink_resource_register(ds, "ATU",</div><div class='add'>+					    mv88e6xxx_num_macs(chip),</div><div class='add'>+					    MV88E6XXX_RESOURCE_ID_ATU,</div><div class='add'>+					    DEVLINK_RESOURCE_ID_PARENT_TOP,</div><div class='add'>+					    &amp;size_params);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	devlink_resource_size_params_init(&amp;size_params,</div><div class='add'>+					  mv88e6xxx_num_macs(chip) / 4,</div><div class='add'>+					  mv88e6xxx_num_macs(chip) / 4,</div><div class='add'>+					  1, DEVLINK_RESOURCE_UNIT_ENTRY);</div><div class='add'>+</div><div class='add'>+	err = dsa_devlink_resource_register(ds, "ATU_bin_0",</div><div class='add'>+					    mv88e6xxx_num_macs(chip) / 4,</div><div class='add'>+					    MV88E6XXX_RESOURCE_ID_ATU_BIN_0,</div><div class='add'>+					    MV88E6XXX_RESOURCE_ID_ATU,</div><div class='add'>+					    &amp;size_params);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	err = dsa_devlink_resource_register(ds, "ATU_bin_1",</div><div class='add'>+					    mv88e6xxx_num_macs(chip) / 4,</div><div class='add'>+					    MV88E6XXX_RESOURCE_ID_ATU_BIN_1,</div><div class='add'>+					    MV88E6XXX_RESOURCE_ID_ATU,</div><div class='add'>+					    &amp;size_params);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	err = dsa_devlink_resource_register(ds, "ATU_bin_2",</div><div class='add'>+					    mv88e6xxx_num_macs(chip) / 4,</div><div class='add'>+					    MV88E6XXX_RESOURCE_ID_ATU_BIN_2,</div><div class='add'>+					    MV88E6XXX_RESOURCE_ID_ATU,</div><div class='add'>+					    &amp;size_params);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	err = dsa_devlink_resource_register(ds, "ATU_bin_3",</div><div class='add'>+					    mv88e6xxx_num_macs(chip) / 4,</div><div class='add'>+					    MV88E6XXX_RESOURCE_ID_ATU_BIN_3,</div><div class='add'>+					    MV88E6XXX_RESOURCE_ID_ATU,</div><div class='add'>+					    &amp;size_params);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	dsa_devlink_resource_occ_get_register(ds,</div><div class='add'>+					      MV88E6XXX_RESOURCE_ID_ATU,</div><div class='add'>+					      mv88e6xxx_devlink_atu_get,</div><div class='add'>+					      chip);</div><div class='add'>+</div><div class='add'>+	dsa_devlink_resource_occ_get_register(ds,</div><div class='add'>+					      MV88E6XXX_RESOURCE_ID_ATU_BIN_0,</div><div class='add'>+					      mv88e6xxx_devlink_atu_bin_0_get,</div><div class='add'>+					      chip);</div><div class='add'>+</div><div class='add'>+	dsa_devlink_resource_occ_get_register(ds,</div><div class='add'>+					      MV88E6XXX_RESOURCE_ID_ATU_BIN_1,</div><div class='add'>+					      mv88e6xxx_devlink_atu_bin_1_get,</div><div class='add'>+					      chip);</div><div class='add'>+</div><div class='add'>+	dsa_devlink_resource_occ_get_register(ds,</div><div class='add'>+					      MV88E6XXX_RESOURCE_ID_ATU_BIN_2,</div><div class='add'>+					      mv88e6xxx_devlink_atu_bin_2_get,</div><div class='add'>+					      chip);</div><div class='add'>+</div><div class='add'>+	dsa_devlink_resource_occ_get_register(ds,</div><div class='add'>+					      MV88E6XXX_RESOURCE_ID_ATU_BIN_3,</div><div class='add'>+					      mv88e6xxx_devlink_atu_bin_3_get,</div><div class='add'>+					      chip);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	dsa_devlink_resources_unregister(ds);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_region_global_snapshot(struct devlink *dl,</div><div class='add'>+					    const struct devlink_region_ops *ops,</div><div class='add'>+					    struct netlink_ext_ack *extack,</div><div class='add'>+					    u8 **data)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_region_priv *region_priv = ops-&gt;priv;</div><div class='add'>+	struct dsa_switch *ds = dsa_devlink_to_ds(dl);</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	u16 *registers;</div><div class='add'>+	int i, err;</div><div class='add'>+</div><div class='add'>+	registers = kmalloc_array(32, sizeof(u16), GFP_KERNEL);</div><div class='add'>+	if (!registers)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	for (i = 0; i &lt; 32; i++) {</div><div class='add'>+		switch (region_priv-&gt;id) {</div><div class='add'>+		case MV88E6XXX_REGION_GLOBAL1:</div><div class='add'>+			err = mv88e6xxx_g1_read(chip, i, &amp;registers[i]);</div><div class='add'>+			break;</div><div class='add'>+		case MV88E6XXX_REGION_GLOBAL2:</div><div class='add'>+			err = mv88e6xxx_g2_read(chip, i, &amp;registers[i]);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			err = -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (err) {</div><div class='add'>+			kfree(registers);</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	*data = (u8 *)registers;</div><div class='add'>+out:</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The ATU entry varies between mv88e6xxx chipset generations. Define</div><div class='add'>+ * a generic format which covers all the current and hopefully future</div><div class='add'>+ * mv88e6xxx generations</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+struct mv88e6xxx_devlink_atu_entry {</div><div class='add'>+	/* The FID is scattered over multiple registers. */</div><div class='add'>+	u16 fid;</div><div class='add'>+	u16 atu_op;</div><div class='add'>+	u16 atu_data;</div><div class='add'>+	u16 atu_01;</div><div class='add'>+	u16 atu_23;</div><div class='add'>+	u16 atu_45;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_region_atu_snapshot_fid(struct mv88e6xxx_chip *chip,</div><div class='add'>+					     int fid,</div><div class='add'>+					     struct mv88e6xxx_devlink_atu_entry *table,</div><div class='add'>+					     int *count)</div><div class='add'>+{</div><div class='add'>+	u16 atu_op, atu_data, atu_01, atu_23, atu_45;</div><div class='add'>+	struct mv88e6xxx_atu_entry addr;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	addr.state = 0;</div><div class='add'>+	eth_broadcast_addr(addr.mac);</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		err = mv88e6xxx_g1_atu_getnext(chip, fid, &amp;addr);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		if (!addr.state)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_OP, &amp;atu_op);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_DATA, &amp;atu_data);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_MAC01, &amp;atu_01);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_MAC23, &amp;atu_23);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_MAC45, &amp;atu_45);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		table[*count].fid = fid;</div><div class='add'>+		table[*count].atu_op = atu_op;</div><div class='add'>+		table[*count].atu_data = atu_data;</div><div class='add'>+		table[*count].atu_01 = atu_01;</div><div class='add'>+		table[*count].atu_23 = atu_23;</div><div class='add'>+		table[*count].atu_45 = atu_45;</div><div class='add'>+		(*count)++;</div><div class='add'>+	} while (!is_broadcast_ether_addr(addr.mac));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_region_atu_snapshot(struct devlink *dl,</div><div class='add'>+					 const struct devlink_region_ops *ops,</div><div class='add'>+					 struct netlink_ext_ack *extack,</div><div class='add'>+					 u8 **data)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds = dsa_devlink_to_ds(dl);</div><div class='add'>+	struct mv88e6xxx_devlink_atu_entry *table;</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	int fid = -1, err = 0, count = 0;</div><div class='add'>+</div><div class='add'>+	table = kcalloc(mv88e6xxx_num_databases(chip),</div><div class='add'>+			sizeof(struct mv88e6xxx_devlink_atu_entry),</div><div class='add'>+			GFP_KERNEL);</div><div class='add'>+	if (!table)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+</div><div class='add'>+	while (1) {</div><div class='add'>+		fid = find_next_bit(chip-&gt;fid_bitmap, MV88E6XXX_N_FID, fid + 1);</div><div class='add'>+		if (fid == MV88E6XXX_N_FID)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		err =  mv88e6xxx_region_atu_snapshot_fid(chip, fid, table,</div><div class='add'>+							 &amp;count);</div><div class='add'>+		if (err) {</div><div class='add'>+			kfree(table);</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	*data = (u8 *)table;</div><div class='add'>+out:</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct mv88e6xxx_devlink_vtu_entry - Devlink VTU entry</div><div class='add'>+ * @fid:   Global1/2:   FID and VLAN policy.</div><div class='add'>+ * @sid:   Global1/3:   SID, unknown filters and learning.</div><div class='add'>+ * @op:    Global1/5:   FID (old chipsets).</div><div class='add'>+ * @vid:   Global1/6:   VID, valid, and page.</div><div class='add'>+ * @data:  Global1/7-9: Membership data and priority override.</div><div class='add'>+ * @resvd: Reserved. Also happens to align the size to 16B.</div><div class='add'>+ *</div><div class='add'>+ * The VTU entry format varies between chipset generations, the</div><div class='add'>+ * descriptions above represent the superset of all possible</div><div class='add'>+ * information, not all fields are valid on all devices. Since this is</div><div class='add'>+ * a low-level debug interface, copy all data verbatim and defer</div><div class='add'>+ * parsing to the consumer.</div><div class='add'>+ */</div><div class='add'>+struct mv88e6xxx_devlink_vtu_entry {</div><div class='add'>+	u16 fid;</div><div class='add'>+	u16 sid;</div><div class='add'>+	u16 op;</div><div class='add'>+	u16 vid;</div><div class='add'>+	u16 data[3];</div><div class='add'>+	u16 resvd;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_region_vtu_snapshot(struct devlink *dl,</div><div class='add'>+					 const struct devlink_region_ops *ops,</div><div class='add'>+					 struct netlink_ext_ack *extack,</div><div class='add'>+					 u8 **data)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_devlink_vtu_entry *table, *entry;</div><div class='add'>+	struct dsa_switch *ds = dsa_devlink_to_ds(dl);</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	struct mv88e6xxx_vtu_entry vlan;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	table = kcalloc(mv88e6xxx_max_vid(chip) + 1,</div><div class='add'>+			sizeof(struct mv88e6xxx_devlink_vtu_entry),</div><div class='add'>+			GFP_KERNEL);</div><div class='add'>+	if (!table)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	entry = table;</div><div class='add'>+	vlan.vid = mv88e6xxx_max_vid(chip);</div><div class='add'>+	vlan.valid = false;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		err = mv88e6xxx_g1_vtu_getnext(chip, &amp;vlan);</div><div class='add'>+		if (err)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if (!vlan.valid)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		err = err ? : mv88e6xxx_g1_read(chip, MV88E6352_G1_VTU_FID,</div><div class='add'>+						&amp;entry-&gt;fid);</div><div class='add'>+		err = err ? : mv88e6xxx_g1_read(chip, MV88E6352_G1_VTU_SID,</div><div class='add'>+						&amp;entry-&gt;sid);</div><div class='add'>+		err = err ? : mv88e6xxx_g1_read(chip, MV88E6XXX_G1_VTU_OP,</div><div class='add'>+						&amp;entry-&gt;op);</div><div class='add'>+		err = err ? : mv88e6xxx_g1_read(chip, MV88E6XXX_G1_VTU_VID,</div><div class='add'>+						&amp;entry-&gt;vid);</div><div class='add'>+		err = err ? : mv88e6xxx_g1_read(chip, MV88E6XXX_G1_VTU_DATA1,</div><div class='add'>+						&amp;entry-&gt;data[0]);</div><div class='add'>+		err = err ? : mv88e6xxx_g1_read(chip, MV88E6XXX_G1_VTU_DATA2,</div><div class='add'>+						&amp;entry-&gt;data[1]);</div><div class='add'>+		err = err ? : mv88e6xxx_g1_read(chip, MV88E6XXX_G1_VTU_DATA3,</div><div class='add'>+						&amp;entry-&gt;data[2]);</div><div class='add'>+		if (err)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		entry++;</div><div class='add'>+	} while (vlan.vid &lt; mv88e6xxx_max_vid(chip));</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	if (err) {</div><div class='add'>+		kfree(table);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*data = (u8 *)table;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct mv88e6xxx_devlink_stu_entry - Devlink STU entry</div><div class='add'>+ * @sid:   Global1/3:   SID, unknown filters and learning.</div><div class='add'>+ * @vid:   Global1/6:   Valid bit.</div><div class='add'>+ * @data:  Global1/7-9: Membership data and priority override.</div><div class='add'>+ * @resvd: Reserved. In case we forgot something.</div><div class='add'>+ *</div><div class='add'>+ * The STU entry format varies between chipset generations. Peridot</div><div class='add'>+ * and Amethyst packs the STU data into Global1/7-8. Older silicon</div><div class='add'>+ * spreads the information across all three VTU data registers -</div><div class='add'>+ * inheriting the layout of even older hardware that had no STU at</div><div class='add'>+ * all. Since this is a low-level debug interface, copy all data</div><div class='add'>+ * verbatim and defer parsing to the consumer.</div><div class='add'>+ */</div><div class='add'>+struct mv88e6xxx_devlink_stu_entry {</div><div class='add'>+	u16 sid;</div><div class='add'>+	u16 vid;</div><div class='add'>+	u16 data[3];</div><div class='add'>+	u16 resvd;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_region_stu_snapshot(struct devlink *dl,</div><div class='add'>+					 const struct devlink_region_ops *ops,</div><div class='add'>+					 struct netlink_ext_ack *extack,</div><div class='add'>+					 u8 **data)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_devlink_stu_entry *table, *entry;</div><div class='add'>+	struct dsa_switch *ds = dsa_devlink_to_ds(dl);</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	struct mv88e6xxx_stu_entry stu;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	table = kcalloc(mv88e6xxx_max_sid(chip) + 1,</div><div class='add'>+			sizeof(struct mv88e6xxx_devlink_stu_entry),</div><div class='add'>+			GFP_KERNEL);</div><div class='add'>+	if (!table)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	entry = table;</div><div class='add'>+	stu.sid = mv88e6xxx_max_sid(chip);</div><div class='add'>+	stu.valid = false;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		err = mv88e6xxx_g1_stu_getnext(chip, &amp;stu);</div><div class='add'>+		if (err)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if (!stu.valid)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		err = err ? : mv88e6xxx_g1_read(chip, MV88E6352_G1_VTU_SID,</div><div class='add'>+						&amp;entry-&gt;sid);</div><div class='add'>+		err = err ? : mv88e6xxx_g1_read(chip, MV88E6XXX_G1_VTU_VID,</div><div class='add'>+						&amp;entry-&gt;vid);</div><div class='add'>+		err = err ? : mv88e6xxx_g1_read(chip, MV88E6XXX_G1_VTU_DATA1,</div><div class='add'>+						&amp;entry-&gt;data[0]);</div><div class='add'>+		err = err ? : mv88e6xxx_g1_read(chip, MV88E6XXX_G1_VTU_DATA2,</div><div class='add'>+						&amp;entry-&gt;data[1]);</div><div class='add'>+		err = err ? : mv88e6xxx_g1_read(chip, MV88E6XXX_G1_VTU_DATA3,</div><div class='add'>+						&amp;entry-&gt;data[2]);</div><div class='add'>+		if (err)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		entry++;</div><div class='add'>+	} while (stu.sid &lt; mv88e6xxx_max_sid(chip));</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	if (err) {</div><div class='add'>+		kfree(table);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*data = (u8 *)table;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_region_pvt_snapshot(struct devlink *dl,</div><div class='add'>+					 const struct devlink_region_ops *ops,</div><div class='add'>+					 struct netlink_ext_ack *extack,</div><div class='add'>+					 u8 **data)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds = dsa_devlink_to_ds(dl);</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	int dev, port, err;</div><div class='add'>+	u16 *pvt, *cur;</div><div class='add'>+</div><div class='add'>+	pvt = kcalloc(MV88E6XXX_MAX_PVT_ENTRIES, sizeof(*pvt), GFP_KERNEL);</div><div class='add'>+	if (!pvt)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+</div><div class='add'>+	cur = pvt;</div><div class='add'>+	for (dev = 0; dev &lt; MV88E6XXX_MAX_PVT_SWITCHES; dev++) {</div><div class='add'>+		for (port = 0; port &lt; MV88E6XXX_MAX_PVT_PORTS; port++) {</div><div class='add'>+			err = mv88e6xxx_g2_pvt_read(chip, dev, port, cur);</div><div class='add'>+			if (err)</div><div class='add'>+				break;</div><div class='add'>+</div><div class='add'>+			cur++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	if (err) {</div><div class='add'>+		kfree(pvt);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*data = (u8 *)pvt;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_region_port_snapshot(struct devlink_port *devlink_port,</div><div class='add'>+					  const struct devlink_port_region_ops *ops,</div><div class='add'>+					  struct netlink_ext_ack *extack,</div><div class='add'>+					  u8 **data)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds = dsa_devlink_port_to_ds(devlink_port);</div><div class='add'>+	int port = dsa_devlink_port_to_port(devlink_port);</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	u16 *registers;</div><div class='add'>+	int i, err;</div><div class='add'>+</div><div class='add'>+	registers = kmalloc_array(32, sizeof(u16), GFP_KERNEL);</div><div class='add'>+	if (!registers)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	for (i = 0; i &lt; 32; i++) {</div><div class='add'>+		err = mv88e6xxx_port_read(chip, port, i, &amp;registers[i]);</div><div class='add'>+		if (err) {</div><div class='add'>+			kfree(registers);</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	*data = (u8 *)registers;</div><div class='add'>+out:</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mv88e6xxx_region_priv mv88e6xxx_region_global1_priv = {</div><div class='add'>+	.id = MV88E6XXX_REGION_GLOBAL1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct devlink_region_ops mv88e6xxx_region_global1_ops = {</div><div class='add'>+	.name = "global1",</div><div class='add'>+	.snapshot = mv88e6xxx_region_global_snapshot,</div><div class='add'>+	.destructor = kfree,</div><div class='add'>+	.priv = &amp;mv88e6xxx_region_global1_priv,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct mv88e6xxx_region_priv mv88e6xxx_region_global2_priv = {</div><div class='add'>+	.id = MV88E6XXX_REGION_GLOBAL2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct devlink_region_ops mv88e6xxx_region_global2_ops = {</div><div class='add'>+	.name = "global2",</div><div class='add'>+	.snapshot = mv88e6xxx_region_global_snapshot,</div><div class='add'>+	.destructor = kfree,</div><div class='add'>+	.priv = &amp;mv88e6xxx_region_global2_priv,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct devlink_region_ops mv88e6xxx_region_atu_ops = {</div><div class='add'>+	.name = "atu",</div><div class='add'>+	.snapshot = mv88e6xxx_region_atu_snapshot,</div><div class='add'>+	.destructor = kfree,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct devlink_region_ops mv88e6xxx_region_vtu_ops = {</div><div class='add'>+	.name = "vtu",</div><div class='add'>+	.snapshot = mv88e6xxx_region_vtu_snapshot,</div><div class='add'>+	.destructor = kfree,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct devlink_region_ops mv88e6xxx_region_stu_ops = {</div><div class='add'>+	.name = "stu",</div><div class='add'>+	.snapshot = mv88e6xxx_region_stu_snapshot,</div><div class='add'>+	.destructor = kfree,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct devlink_region_ops mv88e6xxx_region_pvt_ops = {</div><div class='add'>+	.name = "pvt",</div><div class='add'>+	.snapshot = mv88e6xxx_region_pvt_snapshot,</div><div class='add'>+	.destructor = kfree,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct devlink_port_region_ops mv88e6xxx_region_port_ops = {</div><div class='add'>+	.name = "port",</div><div class='add'>+	.snapshot = mv88e6xxx_region_port_snapshot,</div><div class='add'>+	.destructor = kfree,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mv88e6xxx_region {</div><div class='add'>+	const struct devlink_region_ops *ops;</div><div class='add'>+	u64 size;</div><div class='add'>+</div><div class='add'>+	bool (*cond)(struct mv88e6xxx_chip *chip);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct mv88e6xxx_region mv88e6xxx_regions[] = {</div><div class='add'>+	[MV88E6XXX_REGION_GLOBAL1] = {</div><div class='add'>+		.ops = &amp;mv88e6xxx_region_global1_ops,</div><div class='add'>+		.size = 32 * sizeof(u16)</div><div class='add'>+	},</div><div class='add'>+	[MV88E6XXX_REGION_GLOBAL2] = {</div><div class='add'>+		.ops = &amp;mv88e6xxx_region_global2_ops,</div><div class='add'>+		.size = 32 * sizeof(u16) },</div><div class='add'>+	[MV88E6XXX_REGION_ATU] = {</div><div class='add'>+		.ops = &amp;mv88e6xxx_region_atu_ops</div><div class='add'>+	  /* calculated at runtime */</div><div class='add'>+	},</div><div class='add'>+	[MV88E6XXX_REGION_VTU] = {</div><div class='add'>+		.ops = &amp;mv88e6xxx_region_vtu_ops</div><div class='add'>+	  /* calculated at runtime */</div><div class='add'>+	},</div><div class='add'>+	[MV88E6XXX_REGION_STU] = {</div><div class='add'>+		.ops = &amp;mv88e6xxx_region_stu_ops,</div><div class='add'>+		.cond = mv88e6xxx_has_stu,</div><div class='add'>+	  /* calculated at runtime */</div><div class='add'>+	},</div><div class='add'>+	[MV88E6XXX_REGION_PVT] = {</div><div class='add'>+		.ops = &amp;mv88e6xxx_region_pvt_ops,</div><div class='add'>+		.size = MV88E6XXX_MAX_PVT_ENTRIES * sizeof(u16),</div><div class='add'>+		.cond = mv88e6xxx_has_pvt,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void mv88e6xxx_teardown_devlink_regions_global(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(mv88e6xxx_regions); i++)</div><div class='add'>+		if (chip-&gt;regions[i])</div><div class='add'>+			dsa_devlink_region_destroy(chip-&gt;regions[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mv88e6xxx_teardown_devlink_regions_port(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	dsa_devlink_region_destroy(chip-&gt;ports[port].region);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_setup_devlink_regions_port(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	struct devlink_region *region;</div><div class='add'>+</div><div class='add'>+	region = dsa_devlink_port_region_create(ds,</div><div class='add'>+						port,</div><div class='add'>+						&amp;mv88e6xxx_region_port_ops, 1,</div><div class='add'>+						32 * sizeof(u16));</div><div class='add'>+	if (IS_ERR(region))</div><div class='add'>+		return PTR_ERR(region);</div><div class='add'>+</div><div class='add'>+	chip-&gt;ports[port].region = region;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_setup_devlink_regions_global(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	bool (*cond)(struct mv88e6xxx_chip *chip);</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	const struct devlink_region_ops *ops;</div><div class='add'>+	struct devlink_region *region;</div><div class='add'>+	u64 size;</div><div class='add'>+	int i, j;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(mv88e6xxx_regions); i++) {</div><div class='add'>+		ops = mv88e6xxx_regions[i].ops;</div><div class='add'>+		size = mv88e6xxx_regions[i].size;</div><div class='add'>+		cond = mv88e6xxx_regions[i].cond;</div><div class='add'>+</div><div class='add'>+		if (cond &amp;&amp; !cond(chip))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		switch (i) {</div><div class='add'>+		case MV88E6XXX_REGION_ATU:</div><div class='add'>+			size = mv88e6xxx_num_databases(chip) *</div><div class='add'>+				sizeof(struct mv88e6xxx_devlink_atu_entry);</div><div class='add'>+			break;</div><div class='add'>+		case MV88E6XXX_REGION_VTU:</div><div class='add'>+			size = (mv88e6xxx_max_vid(chip) + 1) *</div><div class='add'>+				sizeof(struct mv88e6xxx_devlink_vtu_entry);</div><div class='add'>+			break;</div><div class='add'>+		case MV88E6XXX_REGION_STU:</div><div class='add'>+			size = (mv88e6xxx_max_sid(chip) + 1) *</div><div class='add'>+				sizeof(struct mv88e6xxx_devlink_stu_entry);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		region = dsa_devlink_region_create(ds, ops, 1, size);</div><div class='add'>+		if (IS_ERR(region))</div><div class='add'>+			goto out;</div><div class='add'>+		chip-&gt;regions[i] = region;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	for (j = 0; j &lt; i; j++)</div><div class='add'>+		dsa_devlink_region_destroy(chip-&gt;regions[j]);</div><div class='add'>+</div><div class='add'>+	return PTR_ERR(region);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_devlink_info_get(struct dsa_switch *ds,</div><div class='add'>+			       struct devlink_info_req *req,</div><div class='add'>+			       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return devlink_info_version_fixed_put(req,</div><div class='add'>+					      DEVLINK_INFO_VERSION_GENERIC_ASIC_ID,</div><div class='add'>+					      chip-&gt;info-&gt;name);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/devlink.h b/drivers/net/dsa/mv88e6xxx/devlink.h<br/>new file mode 100644<br/>index 000000000000..65ce6a6858b9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/devlink.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/devlink.h</a></div><div class='hunk'>@@ -0,0 +1,23 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+</div><div class='add'>+/* Marvell 88E6xxx Switch devlink support. */</div><div class='add'>+</div><div class='add'>+#ifndef _MV88E6XXX_DEVLINK_H</div><div class='add'>+#define _MV88E6XXX_DEVLINK_H</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_setup_devlink_params(struct dsa_switch *ds);</div><div class='add'>+void mv88e6xxx_teardown_devlink_params(struct dsa_switch *ds);</div><div class='add'>+int mv88e6xxx_setup_devlink_resources(struct dsa_switch *ds);</div><div class='add'>+int mv88e6xxx_devlink_param_get(struct dsa_switch *ds, u32 id,</div><div class='add'>+				struct devlink_param_gset_ctx *ctx);</div><div class='add'>+int mv88e6xxx_devlink_param_set(struct dsa_switch *ds, u32 id,</div><div class='add'>+				struct devlink_param_gset_ctx *ctx);</div><div class='add'>+int mv88e6xxx_setup_devlink_regions_global(struct dsa_switch *ds);</div><div class='add'>+void mv88e6xxx_teardown_devlink_regions_global(struct dsa_switch *ds);</div><div class='add'>+int mv88e6xxx_setup_devlink_regions_port(struct dsa_switch *ds, int port);</div><div class='add'>+void mv88e6xxx_teardown_devlink_regions_port(struct dsa_switch *ds, int port);</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_devlink_info_get(struct dsa_switch *ds,</div><div class='add'>+			       struct devlink_info_req *req,</div><div class='add'>+			       struct netlink_ext_ack *extack);</div><div class='add'>+#endif /* _MV88E6XXX_DEVLINK_H */</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/global1.c b/drivers/net/dsa/mv88e6xxx/global1.c<br/>new file mode 100644<br/>index 000000000000..9820cd596757<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/global1.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/global1.c</a></div><div class='hunk'>@@ -0,0 +1,679 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Marvell 88E6xxx Switch Global (1) Registers support</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2008 Marvell Semiconductor</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2016-2017 Savoir-faire Linux Inc.</div><div class='add'>+ *	Vivien Didelot &lt;vivien.didelot@savoirfairelinux.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+</div><div class='add'>+#include "chip.h"</div><div class='add'>+#include "global1.h"</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g1_read(struct mv88e6xxx_chip *chip, int reg, u16 *val)</div><div class='add'>+{</div><div class='add'>+	int addr = chip-&gt;info-&gt;global1_addr;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_read(chip, addr, reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g1_write(struct mv88e6xxx_chip *chip, int reg, u16 val)</div><div class='add'>+{</div><div class='add'>+	int addr = chip-&gt;info-&gt;global1_addr;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_write(chip, addr, reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g1_wait_bit(struct mv88e6xxx_chip *chip, int reg, int</div><div class='add'>+			  bit, int val)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_wait_bit(chip, chip-&gt;info-&gt;global1_addr, reg,</div><div class='add'>+				  bit, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g1_wait_mask(struct mv88e6xxx_chip *chip, int reg,</div><div class='add'>+			   u16 mask, u16 val)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_wait_mask(chip, chip-&gt;info-&gt;global1_addr, reg,</div><div class='add'>+				   mask, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x00: Switch Global Status Register */</div><div class='add'>+</div><div class='add'>+static int mv88e6185_g1_wait_ppu_disabled(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_g1_wait_mask(chip, MV88E6XXX_G1_STS,</div><div class='add'>+				      MV88E6185_G1_STS_PPU_STATE_MASK,</div><div class='add'>+				      MV88E6185_G1_STS_PPU_STATE_DISABLED);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6185_g1_wait_ppu_polling(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_g1_wait_mask(chip, MV88E6XXX_G1_STS,</div><div class='add'>+				      MV88E6185_G1_STS_PPU_STATE_MASK,</div><div class='add'>+				      MV88E6185_G1_STS_PPU_STATE_POLLING);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6352_g1_wait_ppu_polling(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int bit = __bf_shf(MV88E6352_G1_STS_PPU_STATE);</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_wait_bit(chip, MV88E6XXX_G1_STS, bit, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g1_wait_init_ready(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int bit = __bf_shf(MV88E6XXX_G1_STS_INIT_READY);</div><div class='add'>+</div><div class='add'>+	/* Wait up to 1 second for the switch to be ready. The InitReady bit 11</div><div class='add'>+	 * is set to a one when all units inside the device (ATU, VTU, etc.)</div><div class='add'>+	 * have finished their initialization and are ready to accept frames.</div><div class='add'>+	 */</div><div class='add'>+	return mv88e6xxx_g1_wait_bit(chip, MV88E6XXX_G1_STS, bit, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6250_g1_eeprom_reload(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	/* MV88E6185_G1_CTL1_RELOAD_EEPROM is also valid for 88E6250 */</div><div class='add'>+	int bit = __bf_shf(MV88E6185_G1_CTL1_RELOAD_EEPROM);</div><div class='add'>+	u16 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_CTL1, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	val |= MV88E6185_G1_CTL1_RELOAD_EEPROM;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL1, val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_wait_bit(chip, MV88E6XXX_G1_CTL1, bit, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Returns 0 when done, -EBUSY when waiting, other negative codes on error */</div><div class='add'>+static int mv88e6xxx_g1_is_eeprom_done(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	u16 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_STS, &amp;val);</div><div class='add'>+	if (err &lt; 0) {</div><div class='add'>+		dev_err(chip-&gt;dev, "Error reading status");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* If the switch is still resetting, it may not</div><div class='add'>+	 * respond on the bus, and so MDIO read returns</div><div class='add'>+	 * 0xffff. Differentiate between that, and waiting for</div><div class='add'>+	 * the EEPROM to be done by bit 0 being set.</div><div class='add'>+	 */</div><div class='add'>+	if (val == 0xffff || !(val &amp; BIT(MV88E6XXX_G1_STS_IRQ_EEPROM_DONE)))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* As the EEInt (EEPROM done) flag clears on read if the status register, this</div><div class='add'>+ * function must be called directly after a hard reset or EEPROM ReLoad request,</div><div class='add'>+ * or the done condition may have been missed</div><div class='add'>+ */</div><div class='add'>+int mv88e6xxx_g1_wait_eeprom_done(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	const unsigned long timeout = jiffies + 1 * HZ;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Wait up to 1 second for the switch to finish reading the</div><div class='add'>+	 * EEPROM.</div><div class='add'>+	 */</div><div class='add'>+	while (time_before(jiffies, timeout)) {</div><div class='add'>+		ret = mv88e6xxx_g1_is_eeprom_done(chip);</div><div class='add'>+		if (ret != -EBUSY)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_err(chip-&gt;dev, "Timeout waiting for EEPROM done");</div><div class='add'>+	return -ETIMEDOUT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6250_g1_wait_eeprom_done_prereset(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = mv88e6xxx_g1_is_eeprom_done(chip);</div><div class='add'>+	if (ret != -EBUSY)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Pre-reset, we don't know the state of the switch - when</div><div class='add'>+	 * mv88e6xxx_g1_is_eeprom_done() returns -EBUSY, that may be because</div><div class='add'>+	 * the switch is actually busy reading the EEPROM, or because</div><div class='add'>+	 * MV88E6XXX_G1_STS_IRQ_EEPROM_DONE has been cleared by an unrelated</div><div class='add'>+	 * status register read already.</div><div class='add'>+	 *</div><div class='add'>+	 * To account for the latter case, trigger another EEPROM reload for</div><div class='add'>+	 * another chance at seeing the done flag.</div><div class='add'>+	 */</div><div class='add'>+	ret = mv88e6250_g1_eeprom_reload(chip);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_wait_eeprom_done(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x01: Switch MAC Address Register Bytes 0 &amp; 1</div><div class='add'>+ * Offset 0x02: Switch MAC Address Register Bytes 2 &amp; 3</div><div class='add'>+ * Offset 0x03: Switch MAC Address Register Bytes 4 &amp; 5</div><div class='add'>+ */</div><div class='add'>+int mv88e6xxx_g1_set_switch_mac(struct mv88e6xxx_chip *chip, u8 *addr)</div><div class='add'>+{</div><div class='add'>+	u16 reg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	reg = (addr[0] &lt;&lt; 8) | addr[1];</div><div class='add'>+	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_MAC_01, reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	reg = (addr[2] &lt;&lt; 8) | addr[3];</div><div class='add'>+	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_MAC_23, reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	reg = (addr[4] &lt;&lt; 8) | addr[5];</div><div class='add'>+	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_MAC_45, reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x04: Switch Global Control Register */</div><div class='add'>+</div><div class='add'>+int mv88e6185_g1_reset(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	u16 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Set the SWReset bit 15 along with the PPUEn bit 14, to also restart</div><div class='add'>+	 * the PPU, including re-doing PHY detection and initialization</div><div class='add'>+	 */</div><div class='add'>+	err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_CTL1, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	val |= MV88E6XXX_G1_CTL1_SW_RESET;</div><div class='add'>+	val |= MV88E6XXX_G1_CTL1_PPU_ENABLE;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL1, val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_wait_init_ready(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6185_g1_wait_ppu_polling(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6250_g1_reset(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	u16 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Set the SWReset bit 15 */</div><div class='add'>+	err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_CTL1, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	val |= MV88E6XXX_G1_CTL1_SW_RESET;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL1, val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_wait_init_ready(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6352_g1_reset(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6250_g1_reset(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6352_g1_wait_ppu_polling(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6185_g1_ppu_enable(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	u16 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_CTL1, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	val |= MV88E6XXX_G1_CTL1_PPU_ENABLE;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL1, val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6185_g1_wait_ppu_polling(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6185_g1_ppu_disable(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	u16 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_CTL1, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	val &amp;= ~MV88E6XXX_G1_CTL1_PPU_ENABLE;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL1, val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6185_g1_wait_ppu_disabled(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6185_g1_set_max_frame_size(struct mv88e6xxx_chip *chip, int mtu)</div><div class='add'>+{</div><div class='add'>+	u16 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mtu += ETH_HLEN + ETH_FCS_LEN;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_CTL1, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	val &amp;= ~MV88E6185_G1_CTL1_MAX_FRAME_1632;</div><div class='add'>+</div><div class='add'>+	if (mtu &gt; 1518)</div><div class='add'>+		val |= MV88E6185_G1_CTL1_MAX_FRAME_1632;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL1, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x10: IP-PRI Mapping Register 0</div><div class='add'>+ * Offset 0x11: IP-PRI Mapping Register 1</div><div class='add'>+ * Offset 0x12: IP-PRI Mapping Register 2</div><div class='add'>+ * Offset 0x13: IP-PRI Mapping Register 3</div><div class='add'>+ * Offset 0x14: IP-PRI Mapping Register 4</div><div class='add'>+ * Offset 0x15: IP-PRI Mapping Register 5</div><div class='add'>+ * Offset 0x16: IP-PRI Mapping Register 6</div><div class='add'>+ * Offset 0x17: IP-PRI Mapping Register 7</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+int mv88e6085_g1_ip_pri_map(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Reset the IP TOS/DiffServ/Traffic priorities to defaults */</div><div class='add'>+	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_0, 0x0000);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_1, 0x0000);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_2, 0x5555);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_3, 0x5555);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_4, 0xaaaa);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_5, 0xaaaa);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_6, 0xffff);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_7, 0xffff);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x18: IEEE-PRI Register */</div><div class='add'>+</div><div class='add'>+int mv88e6085_g1_ieee_pri_map(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	/* Reset the IEEE Tag priorities to defaults */</div><div class='add'>+	return mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IEEE_PRI, 0xfa41);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6250_g1_ieee_pri_map(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	/* Reset the IEEE Tag priorities to defaults */</div><div class='add'>+	return mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IEEE_PRI, 0xfa50);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x1a: Monitor Control */</div><div class='add'>+/* Offset 0x1a: Monitor &amp; MGMT Control on some devices */</div><div class='add'>+</div><div class='add'>+int mv88e6095_g1_set_egress_port(struct mv88e6xxx_chip *chip,</div><div class='add'>+				 enum mv88e6xxx_egress_direction direction,</div><div class='add'>+				 int port)</div><div class='add'>+{</div><div class='add'>+	u16 reg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_read(chip, MV88E6185_G1_MONITOR_CTL, &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	switch (direction) {</div><div class='add'>+	case MV88E6XXX_EGRESS_DIR_INGRESS:</div><div class='add'>+		reg &amp;= ~MV88E6185_G1_MONITOR_CTL_INGRESS_DEST_MASK;</div><div class='add'>+		reg |= port &lt;&lt;</div><div class='add'>+		       __bf_shf(MV88E6185_G1_MONITOR_CTL_INGRESS_DEST_MASK);</div><div class='add'>+		break;</div><div class='add'>+	case MV88E6XXX_EGRESS_DIR_EGRESS:</div><div class='add'>+		reg &amp;= ~MV88E6185_G1_MONITOR_CTL_EGRESS_DEST_MASK;</div><div class='add'>+		reg |= port &lt;&lt;</div><div class='add'>+		       __bf_shf(MV88E6185_G1_MONITOR_CTL_EGRESS_DEST_MASK);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_write(chip, MV88E6185_G1_MONITOR_CTL, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Older generations also call this the ARP destination. It has been</div><div class='add'>+ * generalized in more modern devices such that more than ARP can</div><div class='add'>+ * egress it</div><div class='add'>+ */</div><div class='add'>+int mv88e6095_g1_set_cpu_port(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	u16 reg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_read(chip, MV88E6185_G1_MONITOR_CTL, &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	reg &amp;= ~MV88E6185_G1_MONITOR_CTL_ARP_DEST_MASK;</div><div class='add'>+	reg |= port &lt;&lt; __bf_shf(MV88E6185_G1_MONITOR_CTL_ARP_DEST_MASK);</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_write(chip, MV88E6185_G1_MONITOR_CTL, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6390_g1_monitor_write(struct mv88e6xxx_chip *chip,</div><div class='add'>+				      u16 pointer, u8 data)</div><div class='add'>+{</div><div class='add'>+	u16 reg;</div><div class='add'>+</div><div class='add'>+	reg = MV88E6390_G1_MONITOR_MGMT_CTL_UPDATE | pointer | data;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_write(chip, MV88E6390_G1_MONITOR_MGMT_CTL, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6390_g1_set_egress_port(struct mv88e6xxx_chip *chip,</div><div class='add'>+				 enum mv88e6xxx_egress_direction direction,</div><div class='add'>+				 int port)</div><div class='add'>+{</div><div class='add'>+	u16 ptr;</div><div class='add'>+</div><div class='add'>+	switch (direction) {</div><div class='add'>+	case MV88E6XXX_EGRESS_DIR_INGRESS:</div><div class='add'>+		ptr = MV88E6390_G1_MONITOR_MGMT_CTL_PTR_INGRESS_DEST;</div><div class='add'>+		break;</div><div class='add'>+	case MV88E6XXX_EGRESS_DIR_EGRESS:</div><div class='add'>+		ptr = MV88E6390_G1_MONITOR_MGMT_CTL_PTR_EGRESS_DEST;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return mv88e6390_g1_monitor_write(chip, ptr, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6390_g1_set_cpu_port(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	u16 ptr = MV88E6390_G1_MONITOR_MGMT_CTL_PTR_CPU_DEST;</div><div class='add'>+</div><div class='add'>+	/* Use the default high priority for management frames sent to</div><div class='add'>+	 * the CPU.</div><div class='add'>+	 */</div><div class='add'>+	port |= MV88E6390_G1_MONITOR_MGMT_CTL_PTR_CPU_DEST_MGMTPRI;</div><div class='add'>+</div><div class='add'>+	return mv88e6390_g1_monitor_write(chip, ptr, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6390_g1_set_ptp_cpu_port(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	u16 ptr = MV88E6390_G1_MONITOR_MGMT_CTL_PTR_PTP_CPU_DEST;</div><div class='add'>+</div><div class='add'>+	/* Use the default high priority for PTP frames sent to</div><div class='add'>+	 * the CPU.</div><div class='add'>+	 */</div><div class='add'>+	port |= MV88E6390_G1_MONITOR_MGMT_CTL_PTR_CPU_DEST_MGMTPRI;</div><div class='add'>+</div><div class='add'>+	return mv88e6390_g1_monitor_write(chip, ptr, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6390_g1_mgmt_rsvd2cpu(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	u16 ptr;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* 01:80:c2:00:00:00-01:80:c2:00:00:07 are Management */</div><div class='add'>+	ptr = MV88E6390_G1_MONITOR_MGMT_CTL_PTR_0180C200000XLO;</div><div class='add'>+	err = mv88e6390_g1_monitor_write(chip, ptr, 0xff);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* 01:80:c2:00:00:08-01:80:c2:00:00:0f are Management */</div><div class='add'>+	ptr = MV88E6390_G1_MONITOR_MGMT_CTL_PTR_0180C200000XHI;</div><div class='add'>+	err = mv88e6390_g1_monitor_write(chip, ptr, 0xff);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* 01:80:c2:00:00:20-01:80:c2:00:00:27 are Management */</div><div class='add'>+	ptr = MV88E6390_G1_MONITOR_MGMT_CTL_PTR_0180C200002XLO;</div><div class='add'>+	err = mv88e6390_g1_monitor_write(chip, ptr, 0xff);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* 01:80:c2:00:00:28-01:80:c2:00:00:2f are Management */</div><div class='add'>+	ptr = MV88E6390_G1_MONITOR_MGMT_CTL_PTR_0180C200002XHI;</div><div class='add'>+	err = mv88e6390_g1_monitor_write(chip, ptr, 0xff);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x1c: Global Control 2 */</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g1_ctl2_mask(struct mv88e6xxx_chip *chip, u16 mask,</div><div class='add'>+				  u16 val)</div><div class='add'>+{</div><div class='add'>+	u16 reg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_CTL2, &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	reg &amp;= ~mask;</div><div class='add'>+	reg |= val &amp; mask;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_write(chip, MV88E6XXX_G1_CTL2, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6185_g1_set_cascade_port(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	const u16 mask = MV88E6185_G1_CTL2_CASCADE_PORT_MASK;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_ctl2_mask(chip, mask, port &lt;&lt; __bf_shf(mask));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6085_g1_rmu_disable(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_g1_ctl2_mask(chip, MV88E6085_G1_CTL2_P10RM |</div><div class='add'>+				      MV88E6085_G1_CTL2_RM_ENABLE, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6352_g1_rmu_disable(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_g1_ctl2_mask(chip, MV88E6352_G1_CTL2_RMU_MODE_MASK,</div><div class='add'>+				      MV88E6352_G1_CTL2_RMU_MODE_DISABLED);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6390_g1_rmu_disable(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_g1_ctl2_mask(chip, MV88E6390_G1_CTL2_RMU_MODE_MASK,</div><div class='add'>+				      MV88E6390_G1_CTL2_RMU_MODE_DISABLED);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6390_g1_stats_set_histogram(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_g1_ctl2_mask(chip, MV88E6390_G1_CTL2_HIST_MODE_MASK,</div><div class='add'>+				      MV88E6390_G1_CTL2_HIST_MODE_RX);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g1_set_device_number(struct mv88e6xxx_chip *chip, int index)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_g1_ctl2_mask(chip,</div><div class='add'>+				      MV88E6XXX_G1_CTL2_DEVICE_NUMBER_MASK,</div><div class='add'>+				      index);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x1d: Statistics Operation 2 */</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g1_stats_wait(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int bit = __bf_shf(MV88E6XXX_G1_STATS_OP_BUSY);</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_wait_bit(chip, MV88E6XXX_G1_STATS_OP, bit, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6095_g1_stats_set_histogram(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	u16 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_STATS_OP, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	val |= MV88E6XXX_G1_STATS_OP_HIST_RX;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_STATS_OP, val);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g1_stats_snapshot(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Snapshot the hardware statistics counters for this port. */</div><div class='add'>+	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_STATS_OP,</div><div class='add'>+				 MV88E6XXX_G1_STATS_OP_BUSY |</div><div class='add'>+				 MV88E6XXX_G1_STATS_OP_CAPTURE_PORT |</div><div class='add'>+				 MV88E6XXX_G1_STATS_OP_HIST_RX | port);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Wait for the snapshotting to complete. */</div><div class='add'>+	return mv88e6xxx_g1_stats_wait(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6320_g1_stats_snapshot(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	port = (port + 1) &lt;&lt; 5;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_stats_snapshot(chip, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6390_g1_stats_snapshot(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	port = (port + 1) &lt;&lt; 5;</div><div class='add'>+</div><div class='add'>+	/* Snapshot the hardware statistics counters for this port. */</div><div class='add'>+	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_STATS_OP,</div><div class='add'>+				 MV88E6XXX_G1_STATS_OP_BUSY |</div><div class='add'>+				 MV88E6XXX_G1_STATS_OP_CAPTURE_PORT | port);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Wait for the snapshotting to complete. */</div><div class='add'>+	return mv88e6xxx_g1_stats_wait(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mv88e6xxx_g1_stats_read(struct mv88e6xxx_chip *chip, int stat, u32 *val)</div><div class='add'>+{</div><div class='add'>+	u32 value;</div><div class='add'>+	u16 reg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	*val = 0;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_STATS_OP,</div><div class='add'>+				 MV88E6XXX_G1_STATS_OP_BUSY |</div><div class='add'>+				 MV88E6XXX_G1_STATS_OP_READ_CAPTURED | stat);</div><div class='add'>+	if (err)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_stats_wait(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_STATS_COUNTER_32, &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	value = reg &lt;&lt; 16;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_STATS_COUNTER_01, &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	*val = value | reg;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g1_stats_clear(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	u16 val;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_STATS_OP, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Keep the histogram mode bits */</div><div class='add'>+	val &amp;= MV88E6XXX_G1_STATS_OP_HIST_RX_TX;</div><div class='add'>+	val |= MV88E6XXX_G1_STATS_OP_BUSY | MV88E6XXX_G1_STATS_OP_FLUSH_ALL;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_STATS_OP, val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Wait for the flush to complete. */</div><div class='add'>+	return mv88e6xxx_g1_stats_wait(chip);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/global1.h b/drivers/net/dsa/mv88e6xxx/global1.h<br/>new file mode 100644<br/>index 000000000000..3dbb7a1b8fe1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/global1.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/global1.h</a></div><div class='hunk'>@@ -0,0 +1,368 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+/*</div><div class='add'>+ * Marvell 88E6xxx Switch Global (1) Registers support</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2008 Marvell Semiconductor</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2016-2017 Savoir-faire Linux Inc.</div><div class='add'>+ *	Vivien Didelot &lt;vivien.didelot@savoirfairelinux.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _MV88E6XXX_GLOBAL1_H</div><div class='add'>+#define _MV88E6XXX_GLOBAL1_H</div><div class='add'>+</div><div class='add'>+#include "chip.h"</div><div class='add'>+</div><div class='add'>+/* Offset 0x00: Switch Global Status Register */</div><div class='add'>+#define MV88E6XXX_G1_STS				0x00</div><div class='add'>+#define MV88E6352_G1_STS_PPU_STATE			0x8000</div><div class='add'>+#define MV88E6185_G1_STS_PPU_STATE_MASK			0xc000</div><div class='add'>+#define MV88E6185_G1_STS_PPU_STATE_DISABLED_RST		0x0000</div><div class='add'>+#define MV88E6185_G1_STS_PPU_STATE_INITIALIZING		0x4000</div><div class='add'>+#define MV88E6185_G1_STS_PPU_STATE_DISABLED		0x8000</div><div class='add'>+#define MV88E6185_G1_STS_PPU_STATE_POLLING		0xc000</div><div class='add'>+#define MV88E6XXX_G1_STS_INIT_READY			0x0800</div><div class='add'>+#define MV88E6393X_G1_STS_IRQ_DEVICE_2			9</div><div class='add'>+#define MV88E6XXX_G1_STS_IRQ_AVB			8</div><div class='add'>+#define MV88E6XXX_G1_STS_IRQ_DEVICE			7</div><div class='add'>+#define MV88E6XXX_G1_STS_IRQ_STATS			6</div><div class='add'>+#define MV88E6XXX_G1_STS_IRQ_VTU_PROB			5</div><div class='add'>+#define MV88E6XXX_G1_STS_IRQ_VTU_DONE			4</div><div class='add'>+#define MV88E6XXX_G1_STS_IRQ_ATU_PROB			3</div><div class='add'>+#define MV88E6XXX_G1_STS_IRQ_ATU_DONE			2</div><div class='add'>+#define MV88E6XXX_G1_STS_IRQ_TCAM_DONE			1</div><div class='add'>+#define MV88E6XXX_G1_STS_IRQ_EEPROM_DONE		0</div><div class='add'>+</div><div class='add'>+/* Offset 0x01: Switch MAC Address Register Bytes 0 &amp; 1</div><div class='add'>+ * Offset 0x02: Switch MAC Address Register Bytes 2 &amp; 3</div><div class='add'>+ * Offset 0x03: Switch MAC Address Register Bytes 4 &amp; 5</div><div class='add'>+ */</div><div class='add'>+#define MV88E6XXX_G1_MAC_01		0x01</div><div class='add'>+#define MV88E6XXX_G1_MAC_23		0x02</div><div class='add'>+#define MV88E6XXX_G1_MAC_45		0x03</div><div class='add'>+</div><div class='add'>+/* Offset 0x01: ATU FID Register */</div><div class='add'>+#define MV88E6352_G1_ATU_FID		0x01</div><div class='add'>+</div><div class='add'>+/* Offset 0x02: VTU FID Register */</div><div class='add'>+#define MV88E6352_G1_VTU_FID		0x02</div><div class='add'>+#define MV88E6352_G1_VTU_FID_VID_POLICY	0x1000</div><div class='add'>+#define MV88E6352_G1_VTU_FID_MASK	0x0fff</div><div class='add'>+</div><div class='add'>+/* Offset 0x03: VTU SID Register */</div><div class='add'>+#define MV88E6352_G1_VTU_SID		0x03</div><div class='add'>+#define MV88E6352_G1_VTU_SID_MASK	0x3f</div><div class='add'>+</div><div class='add'>+/* Offset 0x04: Switch Global Control Register */</div><div class='add'>+#define MV88E6XXX_G1_CTL1			0x04</div><div class='add'>+#define MV88E6XXX_G1_CTL1_SW_RESET		0x8000</div><div class='add'>+#define MV88E6XXX_G1_CTL1_PPU_ENABLE		0x4000</div><div class='add'>+#define MV88E6352_G1_CTL1_DISCARD_EXCESS	0x2000</div><div class='add'>+#define MV88E6185_G1_CTL1_SCHED_PRIO		0x0800</div><div class='add'>+#define MV88E6185_G1_CTL1_MAX_FRAME_1632	0x0400</div><div class='add'>+#define MV88E6185_G1_CTL1_RELOAD_EEPROM		0x0200</div><div class='add'>+#define MV88E6393X_G1_CTL1_DEVICE2_EN		0x0200</div><div class='add'>+#define MV88E6XXX_G1_CTL1_DEVICE_EN		0x0080</div><div class='add'>+#define MV88E6XXX_G1_CTL1_STATS_DONE_EN		0x0040</div><div class='add'>+#define MV88E6XXX_G1_CTL1_VTU_PROBLEM_EN	0x0020</div><div class='add'>+#define MV88E6XXX_G1_CTL1_VTU_DONE_EN		0x0010</div><div class='add'>+#define MV88E6XXX_G1_CTL1_ATU_PROBLEM_EN	0x0008</div><div class='add'>+#define MV88E6XXX_G1_CTL1_ATU_DONE_EN		0x0004</div><div class='add'>+#define MV88E6XXX_G1_CTL1_TCAM_EN		0x0002</div><div class='add'>+#define MV88E6XXX_G1_CTL1_EEPROM_DONE_EN	0x0001</div><div class='add'>+</div><div class='add'>+/* Offset 0x05: VTU Operation Register */</div><div class='add'>+#define MV88E6XXX_G1_VTU_OP			0x05</div><div class='add'>+#define MV88E6XXX_G1_VTU_OP_BUSY		0x8000</div><div class='add'>+#define MV88E6XXX_G1_VTU_OP_MASK		0x7000</div><div class='add'>+#define MV88E6XXX_G1_VTU_OP_FLUSH_ALL		0x1000</div><div class='add'>+#define MV88E6XXX_G1_VTU_OP_NOOP		0x2000</div><div class='add'>+#define MV88E6XXX_G1_VTU_OP_VTU_LOAD_PURGE	0x3000</div><div class='add'>+#define MV88E6XXX_G1_VTU_OP_VTU_GET_NEXT	0x4000</div><div class='add'>+#define MV88E6XXX_G1_VTU_OP_STU_LOAD_PURGE	0x5000</div><div class='add'>+#define MV88E6XXX_G1_VTU_OP_STU_GET_NEXT	0x6000</div><div class='add'>+#define MV88E6XXX_G1_VTU_OP_GET_CLR_VIOLATION	0x7000</div><div class='add'>+#define MV88E6XXX_G1_VTU_OP_MEMBER_VIOLATION	BIT(6)</div><div class='add'>+#define MV88E6XXX_G1_VTU_OP_MISS_VIOLATION	BIT(5)</div><div class='add'>+#define MV88E6XXX_G1_VTU_OP_SPID_MASK		0xf</div><div class='add'>+</div><div class='add'>+/* Offset 0x06: VTU VID Register */</div><div class='add'>+#define MV88E6XXX_G1_VTU_VID		0x06</div><div class='add'>+#define MV88E6XXX_G1_VTU_VID_MASK	0x0fff</div><div class='add'>+#define MV88E6390_G1_VTU_VID_PAGE	0x2000</div><div class='add'>+#define MV88E6XXX_G1_VTU_VID_VALID	0x1000</div><div class='add'>+</div><div class='add'>+/* Offset 0x07: VTU/STU Data Register 1</div><div class='add'>+ * Offset 0x08: VTU/STU Data Register 2</div><div class='add'>+ * Offset 0x09: VTU/STU Data Register 3</div><div class='add'>+ */</div><div class='add'>+#define MV88E6XXX_G1_VTU_DATA1				0x07</div><div class='add'>+#define MV88E6XXX_G1_VTU_DATA2				0x08</div><div class='add'>+#define MV88E6XXX_G1_VTU_DATA3				0x09</div><div class='add'>+#define MV88E6XXX_G1_VTU_STU_DATA_MASK			0x0003</div><div class='add'>+#define MV88E6XXX_G1_VTU_DATA_MEMBER_TAG_UNMODIFIED	0x0000</div><div class='add'>+#define MV88E6XXX_G1_VTU_DATA_MEMBER_TAG_UNTAGGED	0x0001</div><div class='add'>+#define MV88E6XXX_G1_VTU_DATA_MEMBER_TAG_TAGGED		0x0002</div><div class='add'>+#define MV88E6XXX_G1_VTU_DATA_MEMBER_TAG_NON_MEMBER	0x0003</div><div class='add'>+#define MV88E6XXX_G1_STU_DATA_PORT_STATE_DISABLED	0x0000</div><div class='add'>+#define MV88E6XXX_G1_STU_DATA_PORT_STATE_BLOCKING	0x0001</div><div class='add'>+#define MV88E6XXX_G1_STU_DATA_PORT_STATE_LEARNING	0x0002</div><div class='add'>+#define MV88E6XXX_G1_STU_DATA_PORT_STATE_FORWARDING	0x0003</div><div class='add'>+</div><div class='add'>+/* Offset 0x0A: ATU Control Register */</div><div class='add'>+#define MV88E6XXX_G1_ATU_CTL		0x0a</div><div class='add'>+#define MV88E6XXX_G1_ATU_CTL_LEARN2ALL	0x0008</div><div class='add'>+#define MV88E6161_G1_ATU_CTL_HASH_MASK	0x0003</div><div class='add'>+</div><div class='add'>+/* Offset 0x0B: ATU Operation Register */</div><div class='add'>+#define MV88E6XXX_G1_ATU_OP				0x0b</div><div class='add'>+#define MV88E6XXX_G1_ATU_OP_BUSY			0x8000</div><div class='add'>+#define MV88E6XXX_G1_ATU_OP_MASK			0x7000</div><div class='add'>+#define MV88E6XXX_G1_ATU_OP_NOOP			0x0000</div><div class='add'>+#define MV88E6XXX_G1_ATU_OP_FLUSH_MOVE_ALL		0x1000</div><div class='add'>+#define MV88E6XXX_G1_ATU_OP_FLUSH_MOVE_NON_STATIC	0x2000</div><div class='add'>+#define MV88E6XXX_G1_ATU_OP_LOAD_DB			0x3000</div><div class='add'>+#define MV88E6XXX_G1_ATU_OP_GET_NEXT_DB			0x4000</div><div class='add'>+#define MV88E6XXX_G1_ATU_OP_FLUSH_MOVE_ALL_DB		0x5000</div><div class='add'>+#define MV88E6XXX_G1_ATU_OP_FLUSH_MOVE_NON_STATIC_DB	0x6000</div><div class='add'>+#define MV88E6XXX_G1_ATU_OP_GET_CLR_VIOLATION		0x7000</div><div class='add'>+#define MV88E6XXX_G1_ATU_OP_AGE_OUT_VIOLATION		BIT(7)</div><div class='add'>+#define MV88E6XXX_G1_ATU_OP_MEMBER_VIOLATION		BIT(6)</div><div class='add'>+#define MV88E6XXX_G1_ATU_OP_MISS_VIOLATION		BIT(5)</div><div class='add'>+#define MV88E6XXX_G1_ATU_OP_FULL_VIOLATION		BIT(4)</div><div class='add'>+</div><div class='add'>+/* Offset 0x0C: ATU Data Register */</div><div class='add'>+#define MV88E6XXX_G1_ATU_DATA					0x0c</div><div class='add'>+#define MV88E6XXX_G1_ATU_DATA_TRUNK				0x8000</div><div class='add'>+#define MV88E6XXX_G1_ATU_DATA_TRUNK_ID_MASK			0x00f0</div><div class='add'>+#define MV88E6XXX_G1_ATU_DATA_PORT_VECTOR_MASK			0x3ff0</div><div class='add'>+#define MV88E6XXX_G1_ATU_DATA_STATE_MASK			0x000f</div><div class='add'>+#define MV88E6XXX_G1_ATU_DATA_STATE_UC_UNUSED			0x0000</div><div class='add'>+#define MV88E6XXX_G1_ATU_DATA_STATE_UC_AGE_1_OLDEST		0x0001</div><div class='add'>+#define MV88E6XXX_G1_ATU_DATA_STATE_UC_AGE_2			0x0002</div><div class='add'>+#define MV88E6XXX_G1_ATU_DATA_STATE_UC_AGE_3			0x0003</div><div class='add'>+#define MV88E6XXX_G1_ATU_DATA_STATE_UC_AGE_4			0x0004</div><div class='add'>+#define MV88E6XXX_G1_ATU_DATA_STATE_UC_AGE_5			0x0005</div><div class='add'>+#define MV88E6XXX_G1_ATU_DATA_STATE_UC_AGE_6			0x0006</div><div class='add'>+#define MV88E6XXX_G1_ATU_DATA_STATE_UC_AGE_7_NEWEST		0x0007</div><div class='add'>+#define MV88E6XXX_G1_ATU_DATA_STATE_UC_STATIC_POLICY		0x0008</div><div class='add'>+#define MV88E6XXX_G1_ATU_DATA_STATE_UC_STATIC_POLICY_PO		0x0009</div><div class='add'>+#define MV88E6XXX_G1_ATU_DATA_STATE_UC_STATIC_AVB_NRL		0x000a</div><div class='add'>+#define MV88E6XXX_G1_ATU_DATA_STATE_UC_STATIC_AVB_NRL_PO	0x000b</div><div class='add'>+#define MV88E6XXX_G1_ATU_DATA_STATE_UC_STATIC_DA_MGMT		0x000c</div><div class='add'>+#define MV88E6XXX_G1_ATU_DATA_STATE_UC_STATIC_DA_MGMT_PO	0x000d</div><div class='add'>+#define MV88E6XXX_G1_ATU_DATA_STATE_UC_STATIC			0x000e</div><div class='add'>+#define MV88E6XXX_G1_ATU_DATA_STATE_UC_STATIC_PO		0x000f</div><div class='add'>+#define MV88E6XXX_G1_ATU_DATA_STATE_MC_UNUSED			0x0000</div><div class='add'>+#define MV88E6XXX_G1_ATU_DATA_STATE_MC_STATIC_POLICY		0x0004</div><div class='add'>+#define MV88E6XXX_G1_ATU_DATA_STATE_MC_STATIC_AVB_NRL		0x0005</div><div class='add'>+#define MV88E6XXX_G1_ATU_DATA_STATE_MC_STATIC_DA_MGMT		0x0006</div><div class='add'>+#define MV88E6XXX_G1_ATU_DATA_STATE_MC_STATIC			0x0007</div><div class='add'>+#define MV88E6XXX_G1_ATU_DATA_STATE_MC_STATIC_POLICY_PO		0x000c</div><div class='add'>+#define MV88E6XXX_G1_ATU_DATA_STATE_MC_STATIC_AVB_NRL_PO	0x000d</div><div class='add'>+#define MV88E6XXX_G1_ATU_DATA_STATE_MC_STATIC_DA_MGMT_PO	0x000e</div><div class='add'>+#define MV88E6XXX_G1_ATU_DATA_STATE_MC_STATIC_PO		0x000f</div><div class='add'>+</div><div class='add'>+/* Offset 0x0D: ATU MAC Address Register Bytes 0 &amp; 1</div><div class='add'>+ * Offset 0x0E: ATU MAC Address Register Bytes 2 &amp; 3</div><div class='add'>+ * Offset 0x0F: ATU MAC Address Register Bytes 4 &amp; 5</div><div class='add'>+ */</div><div class='add'>+#define MV88E6XXX_G1_ATU_MAC01		0x0d</div><div class='add'>+#define MV88E6XXX_G1_ATU_MAC23		0x0e</div><div class='add'>+#define MV88E6XXX_G1_ATU_MAC45		0x0f</div><div class='add'>+</div><div class='add'>+/* Offset 0x10: IP-PRI Mapping Register 0</div><div class='add'>+ * Offset 0x11: IP-PRI Mapping Register 1</div><div class='add'>+ * Offset 0x12: IP-PRI Mapping Register 2</div><div class='add'>+ * Offset 0x13: IP-PRI Mapping Register 3</div><div class='add'>+ * Offset 0x14: IP-PRI Mapping Register 4</div><div class='add'>+ * Offset 0x15: IP-PRI Mapping Register 5</div><div class='add'>+ * Offset 0x16: IP-PRI Mapping Register 6</div><div class='add'>+ * Offset 0x17: IP-PRI Mapping Register 7</div><div class='add'>+ */</div><div class='add'>+#define MV88E6XXX_G1_IP_PRI_0	0x10</div><div class='add'>+#define MV88E6XXX_G1_IP_PRI_1	0x11</div><div class='add'>+#define MV88E6XXX_G1_IP_PRI_2	0x12</div><div class='add'>+#define MV88E6XXX_G1_IP_PRI_3	0x13</div><div class='add'>+#define MV88E6XXX_G1_IP_PRI_4	0x14</div><div class='add'>+#define MV88E6XXX_G1_IP_PRI_5	0x15</div><div class='add'>+#define MV88E6XXX_G1_IP_PRI_6	0x16</div><div class='add'>+#define MV88E6XXX_G1_IP_PRI_7	0x17</div><div class='add'>+</div><div class='add'>+/* Offset 0x18: IEEE-PRI Register */</div><div class='add'>+#define MV88E6XXX_G1_IEEE_PRI	0x18</div><div class='add'>+</div><div class='add'>+/* Offset 0x19: Core Tag Type */</div><div class='add'>+#define MV88E6185_G1_CORE_TAG_TYPE	0x19</div><div class='add'>+</div><div class='add'>+/* Offset 0x1A: Monitor Control */</div><div class='add'>+#define MV88E6185_G1_MONITOR_CTL			0x1a</div><div class='add'>+#define MV88E6185_G1_MONITOR_CTL_INGRESS_DEST_MASK	0xf000</div><div class='add'>+#define MV88E6185_G1_MONITOR_CTL_EGRESS_DEST_MASK	0x0f00</div><div class='add'>+#define MV88E6185_G1_MONITOR_CTL_ARP_DEST_MASK	        0x00f0</div><div class='add'>+#define MV88E6352_G1_MONITOR_CTL_CPU_DEST_MASK	        0x00f0</div><div class='add'>+#define MV88E6352_G1_MONITOR_CTL_MIRROR_DEST_MASK	0x000f</div><div class='add'>+</div><div class='add'>+/* Offset 0x1A: Monitor &amp; MGMT Control Register */</div><div class='add'>+#define MV88E6390_G1_MONITOR_MGMT_CTL				0x1a</div><div class='add'>+#define MV88E6390_G1_MONITOR_MGMT_CTL_UPDATE			0x8000</div><div class='add'>+#define MV88E6390_G1_MONITOR_MGMT_CTL_PTR_MASK			0x3f00</div><div class='add'>+#define MV88E6390_G1_MONITOR_MGMT_CTL_PTR_0180C200000XLO	0x0000</div><div class='add'>+#define MV88E6390_G1_MONITOR_MGMT_CTL_PTR_0180C200000XHI	0x0100</div><div class='add'>+#define MV88E6390_G1_MONITOR_MGMT_CTL_PTR_0180C200002XLO	0x0200</div><div class='add'>+#define MV88E6390_G1_MONITOR_MGMT_CTL_PTR_0180C200002XHI	0x0300</div><div class='add'>+#define MV88E6390_G1_MONITOR_MGMT_CTL_PTR_INGRESS_DEST		0x2000</div><div class='add'>+#define MV88E6390_G1_MONITOR_MGMT_CTL_PTR_EGRESS_DEST		0x2100</div><div class='add'>+#define MV88E6390_G1_MONITOR_MGMT_CTL_PTR_CPU_DEST		0x3000</div><div class='add'>+#define MV88E6390_G1_MONITOR_MGMT_CTL_PTR_PTP_CPU_DEST		0x3200</div><div class='add'>+#define MV88E6390_G1_MONITOR_MGMT_CTL_PTR_CPU_DEST_MGMTPRI	0x00e0</div><div class='add'>+#define MV88E6390_G1_MONITOR_MGMT_CTL_DATA_MASK			0x00ff</div><div class='add'>+</div><div class='add'>+/* Offset 0x1C: Global Control 2 */</div><div class='add'>+#define MV88E6XXX_G1_CTL2			0x1c</div><div class='add'>+#define MV88E6185_G1_CTL2_CASCADE_PORT_MASK	0xf000</div><div class='add'>+#define MV88E6185_G1_CTL2_CASCADE_PORT_NONE	0xe000</div><div class='add'>+#define MV88E6185_G1_CTL2_CASCADE_PORT_MULTI	0xf000</div><div class='add'>+#define MV88E6352_G1_CTL2_HEADER_TYPE_MASK	0xc000</div><div class='add'>+#define MV88E6352_G1_CTL2_HEADER_TYPE_ORIG	0x0000</div><div class='add'>+#define MV88E6352_G1_CTL2_HEADER_TYPE_MGMT	0x4000</div><div class='add'>+#define MV88E6390_G1_CTL2_HEADER_TYPE_LAG	0x8000</div><div class='add'>+#define MV88E6352_G1_CTL2_RMU_MODE_MASK		0x3000</div><div class='add'>+#define MV88E6352_G1_CTL2_RMU_MODE_DISABLED	0x0000</div><div class='add'>+#define MV88E6352_G1_CTL2_RMU_MODE_PORT_4	0x1000</div><div class='add'>+#define MV88E6352_G1_CTL2_RMU_MODE_PORT_5	0x2000</div><div class='add'>+#define MV88E6352_G1_CTL2_RMU_MODE_PORT_6	0x3000</div><div class='add'>+#define MV88E6085_G1_CTL2_DA_CHECK		0x4000</div><div class='add'>+#define MV88E6085_G1_CTL2_P10RM			0x2000</div><div class='add'>+#define MV88E6085_G1_CTL2_RM_ENABLE		0x1000</div><div class='add'>+#define MV88E6352_G1_CTL2_DA_CHECK		0x0800</div><div class='add'>+#define MV88E6390_G1_CTL2_RMU_MODE_MASK		0x0700</div><div class='add'>+#define MV88E6390_G1_CTL2_RMU_MODE_PORT_0	0x0000</div><div class='add'>+#define MV88E6390_G1_CTL2_RMU_MODE_PORT_1	0x0100</div><div class='add'>+#define MV88E6390_G1_CTL2_RMU_MODE_PORT_9	0x0200</div><div class='add'>+#define MV88E6390_G1_CTL2_RMU_MODE_PORT_10	0x0300</div><div class='add'>+#define MV88E6390_G1_CTL2_RMU_MODE_ALL_DSA	0x0600</div><div class='add'>+#define MV88E6390_G1_CTL2_RMU_MODE_DISABLED	0x0700</div><div class='add'>+#define MV88E6390_G1_CTL2_HIST_MODE_MASK	0x00c0</div><div class='add'>+#define MV88E6390_G1_CTL2_HIST_MODE_RX		0x0040</div><div class='add'>+#define MV88E6390_G1_CTL2_HIST_MODE_TX		0x0080</div><div class='add'>+#define MV88E6352_G1_CTL2_CTR_MODE_MASK		0x0060</div><div class='add'>+#define MV88E6390_G1_CTL2_CTR_MODE		0x0020</div><div class='add'>+#define MV88E6XXX_G1_CTL2_DEVICE_NUMBER_MASK	0x001f</div><div class='add'>+</div><div class='add'>+/* Offset 0x1D: Stats Operation Register */</div><div class='add'>+#define MV88E6XXX_G1_STATS_OP			0x1d</div><div class='add'>+#define MV88E6XXX_G1_STATS_OP_BUSY		0x8000</div><div class='add'>+#define MV88E6XXX_G1_STATS_OP_NOP		0x0000</div><div class='add'>+#define MV88E6XXX_G1_STATS_OP_FLUSH_ALL		0x1000</div><div class='add'>+#define MV88E6XXX_G1_STATS_OP_FLUSH_PORT	0x2000</div><div class='add'>+#define MV88E6XXX_G1_STATS_OP_READ_CAPTURED	0x4000</div><div class='add'>+#define MV88E6XXX_G1_STATS_OP_CAPTURE_PORT	0x5000</div><div class='add'>+#define MV88E6XXX_G1_STATS_OP_HIST_RX		0x0400</div><div class='add'>+#define MV88E6XXX_G1_STATS_OP_HIST_TX		0x0800</div><div class='add'>+#define MV88E6XXX_G1_STATS_OP_HIST_RX_TX	0x0c00</div><div class='add'>+#define MV88E6XXX_G1_STATS_OP_BANK_1_BIT_9	0x0200</div><div class='add'>+#define MV88E6XXX_G1_STATS_OP_BANK_1_BIT_10	0x0400</div><div class='add'>+</div><div class='add'>+/* Offset 0x1E: Stats Counter Register Bytes 3 &amp; 2</div><div class='add'>+ * Offset 0x1F: Stats Counter Register Bytes 1 &amp; 0</div><div class='add'>+ */</div><div class='add'>+#define MV88E6XXX_G1_STATS_COUNTER_32	0x1e</div><div class='add'>+#define MV88E6XXX_G1_STATS_COUNTER_01	0x1f</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g1_read(struct mv88e6xxx_chip *chip, int reg, u16 *val);</div><div class='add'>+int mv88e6xxx_g1_write(struct mv88e6xxx_chip *chip, int reg, u16 val);</div><div class='add'>+int mv88e6xxx_g1_wait_bit(struct mv88e6xxx_chip *chip, int reg, int</div><div class='add'>+			  bit, int val);</div><div class='add'>+int mv88e6xxx_g1_wait_mask(struct mv88e6xxx_chip *chip, int reg,</div><div class='add'>+			   u16 mask, u16 val);</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g1_set_switch_mac(struct mv88e6xxx_chip *chip, u8 *addr);</div><div class='add'>+</div><div class='add'>+int mv88e6185_g1_reset(struct mv88e6xxx_chip *chip);</div><div class='add'>+int mv88e6352_g1_reset(struct mv88e6xxx_chip *chip);</div><div class='add'>+int mv88e6250_g1_reset(struct mv88e6xxx_chip *chip);</div><div class='add'>+int mv88e6xxx_g1_wait_eeprom_done(struct mv88e6xxx_chip *chip);</div><div class='add'>+int mv88e6250_g1_wait_eeprom_done_prereset(struct mv88e6xxx_chip *chip);</div><div class='add'>+</div><div class='add'>+int mv88e6185_g1_ppu_enable(struct mv88e6xxx_chip *chip);</div><div class='add'>+int mv88e6185_g1_ppu_disable(struct mv88e6xxx_chip *chip);</div><div class='add'>+</div><div class='add'>+int mv88e6185_g1_set_max_frame_size(struct mv88e6xxx_chip *chip, int mtu);</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g1_stats_snapshot(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+int mv88e6320_g1_stats_snapshot(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+int mv88e6390_g1_stats_snapshot(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+int mv88e6095_g1_stats_set_histogram(struct mv88e6xxx_chip *chip);</div><div class='add'>+int mv88e6390_g1_stats_set_histogram(struct mv88e6xxx_chip *chip);</div><div class='add'>+void mv88e6xxx_g1_stats_read(struct mv88e6xxx_chip *chip, int stat, u32 *val);</div><div class='add'>+int mv88e6xxx_g1_stats_clear(struct mv88e6xxx_chip *chip);</div><div class='add'>+int mv88e6095_g1_set_egress_port(struct mv88e6xxx_chip *chip,</div><div class='add'>+				 enum mv88e6xxx_egress_direction direction,</div><div class='add'>+				 int port);</div><div class='add'>+int mv88e6390_g1_set_egress_port(struct mv88e6xxx_chip *chip,</div><div class='add'>+				 enum mv88e6xxx_egress_direction direction,</div><div class='add'>+				 int port);</div><div class='add'>+int mv88e6095_g1_set_cpu_port(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+int mv88e6390_g1_set_cpu_port(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+int mv88e6390_g1_set_ptp_cpu_port(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+int mv88e6390_g1_mgmt_rsvd2cpu(struct mv88e6xxx_chip *chip);</div><div class='add'>+</div><div class='add'>+int mv88e6085_g1_ip_pri_map(struct mv88e6xxx_chip *chip);</div><div class='add'>+</div><div class='add'>+int mv88e6085_g1_ieee_pri_map(struct mv88e6xxx_chip *chip);</div><div class='add'>+int mv88e6250_g1_ieee_pri_map(struct mv88e6xxx_chip *chip);</div><div class='add'>+</div><div class='add'>+int mv88e6185_g1_set_cascade_port(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+</div><div class='add'>+int mv88e6085_g1_rmu_disable(struct mv88e6xxx_chip *chip);</div><div class='add'>+int mv88e6352_g1_rmu_disable(struct mv88e6xxx_chip *chip);</div><div class='add'>+int mv88e6390_g1_rmu_disable(struct mv88e6xxx_chip *chip);</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g1_set_device_number(struct mv88e6xxx_chip *chip, int index);</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g1_atu_set_learn2all(struct mv88e6xxx_chip *chip, bool learn2all);</div><div class='add'>+int mv88e6xxx_g1_atu_set_age_time(struct mv88e6xxx_chip *chip,</div><div class='add'>+				  unsigned int msecs);</div><div class='add'>+int mv88e6xxx_g1_atu_getnext(struct mv88e6xxx_chip *chip, u16 fid,</div><div class='add'>+			     struct mv88e6xxx_atu_entry *entry);</div><div class='add'>+int mv88e6xxx_g1_atu_loadpurge(struct mv88e6xxx_chip *chip, u16 fid,</div><div class='add'>+			       struct mv88e6xxx_atu_entry *entry);</div><div class='add'>+int mv88e6xxx_g1_atu_flush(struct mv88e6xxx_chip *chip, u16 fid, bool all);</div><div class='add'>+int mv88e6xxx_g1_atu_remove(struct mv88e6xxx_chip *chip, u16 fid, int port,</div><div class='add'>+			    bool all);</div><div class='add'>+int mv88e6xxx_g1_atu_prob_irq_setup(struct mv88e6xxx_chip *chip);</div><div class='add'>+void mv88e6xxx_g1_atu_prob_irq_free(struct mv88e6xxx_chip *chip);</div><div class='add'>+int mv88e6165_g1_atu_get_hash(struct mv88e6xxx_chip *chip, u8 *hash);</div><div class='add'>+int mv88e6165_g1_atu_set_hash(struct mv88e6xxx_chip *chip, u8 hash);</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g1_vtu_getnext(struct mv88e6xxx_chip *chip,</div><div class='add'>+			     struct mv88e6xxx_vtu_entry *entry);</div><div class='add'>+int mv88e6185_g1_vtu_getnext(struct mv88e6xxx_chip *chip,</div><div class='add'>+			     struct mv88e6xxx_vtu_entry *entry);</div><div class='add'>+int mv88e6185_g1_vtu_loadpurge(struct mv88e6xxx_chip *chip,</div><div class='add'>+			       struct mv88e6xxx_vtu_entry *entry);</div><div class='add'>+int mv88e6352_g1_vtu_getnext(struct mv88e6xxx_chip *chip,</div><div class='add'>+			     struct mv88e6xxx_vtu_entry *entry);</div><div class='add'>+int mv88e6352_g1_vtu_loadpurge(struct mv88e6xxx_chip *chip,</div><div class='add'>+			       struct mv88e6xxx_vtu_entry *entry);</div><div class='add'>+int mv88e6390_g1_vtu_getnext(struct mv88e6xxx_chip *chip,</div><div class='add'>+			     struct mv88e6xxx_vtu_entry *entry);</div><div class='add'>+int mv88e6390_g1_vtu_loadpurge(struct mv88e6xxx_chip *chip,</div><div class='add'>+			       struct mv88e6xxx_vtu_entry *entry);</div><div class='add'>+int mv88e6xxx_g1_vtu_flush(struct mv88e6xxx_chip *chip);</div><div class='add'>+int mv88e6xxx_g1_stu_getnext(struct mv88e6xxx_chip *chip,</div><div class='add'>+			     struct mv88e6xxx_stu_entry *entry);</div><div class='add'>+int mv88e6352_g1_stu_getnext(struct mv88e6xxx_chip *chip,</div><div class='add'>+			     struct mv88e6xxx_stu_entry *entry);</div><div class='add'>+int mv88e6352_g1_stu_loadpurge(struct mv88e6xxx_chip *chip,</div><div class='add'>+			       struct mv88e6xxx_stu_entry *entry);</div><div class='add'>+int mv88e6390_g1_stu_getnext(struct mv88e6xxx_chip *chip,</div><div class='add'>+			     struct mv88e6xxx_stu_entry *entry);</div><div class='add'>+int mv88e6390_g1_stu_loadpurge(struct mv88e6xxx_chip *chip,</div><div class='add'>+			       struct mv88e6xxx_stu_entry *entry);</div><div class='add'>+int mv88e6xxx_g1_vtu_prob_irq_setup(struct mv88e6xxx_chip *chip);</div><div class='add'>+void mv88e6xxx_g1_vtu_prob_irq_free(struct mv88e6xxx_chip *chip);</div><div class='add'>+int mv88e6xxx_g1_atu_get_next(struct mv88e6xxx_chip *chip, u16 fid);</div><div class='add'>+</div><div class='add'>+#endif /* _MV88E6XXX_GLOBAL1_H */</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/global1_atu.c b/drivers/net/dsa/mv88e6xxx/global1_atu.c<br/>new file mode 100644<br/>index 000000000000..c47f068f56b3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/global1_atu.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/global1_atu.c</a></div><div class='hunk'>@@ -0,0 +1,501 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Marvell 88E6xxx Address Translation Unit (ATU) support</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2008 Marvell Semiconductor</div><div class='add'>+ * Copyright (c) 2017 Savoir-faire Linux, Inc.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/irqdomain.h&gt;</div><div class='add'>+</div><div class='add'>+#include "chip.h"</div><div class='add'>+#include "global1.h"</div><div class='add'>+#include "switchdev.h"</div><div class='add'>+#include "trace.h"</div><div class='add'>+</div><div class='add'>+/* Offset 0x01: ATU FID Register */</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g1_atu_fid_write(struct mv88e6xxx_chip *chip, u16 fid)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_g1_write(chip, MV88E6352_G1_ATU_FID, fid &amp; 0xfff);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x0A: ATU Control Register */</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g1_atu_set_learn2all(struct mv88e6xxx_chip *chip, bool learn2all)</div><div class='add'>+{</div><div class='add'>+	u16 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_CTL, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (learn2all)</div><div class='add'>+		val |= MV88E6XXX_G1_ATU_CTL_LEARN2ALL;</div><div class='add'>+	else</div><div class='add'>+		val &amp;= ~MV88E6XXX_G1_ATU_CTL_LEARN2ALL;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_write(chip, MV88E6XXX_G1_ATU_CTL, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g1_atu_set_age_time(struct mv88e6xxx_chip *chip,</div><div class='add'>+				  unsigned int msecs)</div><div class='add'>+{</div><div class='add'>+	const unsigned int coeff = chip-&gt;info-&gt;age_time_coeff;</div><div class='add'>+	const unsigned int min = 0x01 * coeff;</div><div class='add'>+	const unsigned int max = 0xff * coeff;</div><div class='add'>+	u8 age_time;</div><div class='add'>+	u16 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (msecs &lt; min || msecs &gt; max)</div><div class='add'>+		return -ERANGE;</div><div class='add'>+</div><div class='add'>+	/* Round to nearest multiple of coeff */</div><div class='add'>+	age_time = (msecs + coeff / 2) / coeff;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_CTL, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* AgeTime is 11:4 bits */</div><div class='add'>+	val &amp;= ~0xff0;</div><div class='add'>+	val |= age_time &lt;&lt; 4;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_ATU_CTL, val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	dev_dbg(chip-&gt;dev, "AgeTime set to 0x%02x (%d ms)\n", age_time,</div><div class='add'>+		age_time * coeff);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6165_g1_atu_get_hash(struct mv88e6xxx_chip *chip, u8 *hash)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	u16 val;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_CTL, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	*hash = val &amp; MV88E6161_G1_ATU_CTL_HASH_MASK;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6165_g1_atu_set_hash(struct mv88e6xxx_chip *chip, u8 hash)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	u16 val;</div><div class='add'>+</div><div class='add'>+	if (hash &amp; ~MV88E6161_G1_ATU_CTL_HASH_MASK)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_CTL, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	val &amp;= ~MV88E6161_G1_ATU_CTL_HASH_MASK;</div><div class='add'>+	val |= hash;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_write(chip, MV88E6XXX_G1_ATU_CTL, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x0B: ATU Operation Register */</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g1_atu_op_wait(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int bit = __bf_shf(MV88E6XXX_G1_ATU_OP_BUSY);</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_wait_bit(chip, MV88E6XXX_G1_ATU_OP, bit, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g1_read_atu_violation(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_ATU_OP,</div><div class='add'>+				 MV88E6XXX_G1_ATU_OP_BUSY |</div><div class='add'>+				 MV88E6XXX_G1_ATU_OP_GET_CLR_VIOLATION);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_atu_op_wait(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g1_atu_op(struct mv88e6xxx_chip *chip, u16 fid, u16 op)</div><div class='add'>+{</div><div class='add'>+	u16 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* FID bits are dispatched all around gradually as more are supported */</div><div class='add'>+	if (mv88e6xxx_num_databases(chip) &gt; 256) {</div><div class='add'>+		err = mv88e6xxx_g1_atu_fid_write(chip, fid);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	} else {</div><div class='add'>+		if (mv88e6xxx_num_databases(chip) &gt; 64) {</div><div class='add'>+			/* ATU DBNum[7:4] are located in ATU Control 15:12 */</div><div class='add'>+			err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_CTL,</div><div class='add'>+						&amp;val);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+</div><div class='add'>+			val = (val &amp; 0x0fff) | ((fid &lt;&lt; 8) &amp; 0xf000);</div><div class='add'>+			err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_ATU_CTL,</div><div class='add'>+						 val);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+		} else if (mv88e6xxx_num_databases(chip) &gt; 16) {</div><div class='add'>+			/* ATU DBNum[5:4] are located in ATU Operation 9:8 */</div><div class='add'>+			op |= (fid &amp; 0x30) &lt;&lt; 4;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* ATU DBNum[3:0] are located in ATU Operation 3:0 */</div><div class='add'>+		op |= fid &amp; 0xf;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_ATU_OP,</div><div class='add'>+				 MV88E6XXX_G1_ATU_OP_BUSY | op);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_atu_op_wait(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g1_atu_get_next(struct mv88e6xxx_chip *chip, u16 fid)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_g1_atu_op(chip, fid, MV88E6XXX_G1_ATU_OP_GET_NEXT_DB);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g1_atu_fid_read(struct mv88e6xxx_chip *chip, u16 *fid)</div><div class='add'>+{</div><div class='add'>+	u16 val = 0, upper = 0, op = 0;</div><div class='add'>+	int err = -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (mv88e6xxx_num_databases(chip) &gt; 256) {</div><div class='add'>+		err = mv88e6xxx_g1_read(chip, MV88E6352_G1_ATU_FID, &amp;val);</div><div class='add'>+		val &amp;= 0xfff;</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	} else {</div><div class='add'>+		err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_OP, &amp;op);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+		if (mv88e6xxx_num_databases(chip) &gt; 64) {</div><div class='add'>+			/* ATU DBNum[7:4] are located in ATU Control 15:12 */</div><div class='add'>+			err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_CTL,</div><div class='add'>+						&amp;upper);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+</div><div class='add'>+			upper = (upper &gt;&gt; 8) &amp; 0x00f0;</div><div class='add'>+		} else if (mv88e6xxx_num_databases(chip) &gt; 16) {</div><div class='add'>+			/* ATU DBNum[5:4] are located in ATU Operation 9:8 */</div><div class='add'>+			upper = (op &gt;&gt; 4) &amp; 0x30;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* ATU DBNum[3:0] are located in ATU Operation 3:0 */</div><div class='add'>+		val = (op &amp; 0xf) | upper;</div><div class='add'>+	}</div><div class='add'>+	*fid = val;</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x0C: ATU Data Register */</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g1_atu_data_read(struct mv88e6xxx_chip *chip,</div><div class='add'>+				      struct mv88e6xxx_atu_entry *entry)</div><div class='add'>+{</div><div class='add'>+	u16 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_DATA, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	entry-&gt;state = val &amp; 0xf;</div><div class='add'>+	if (entry-&gt;state) {</div><div class='add'>+		entry-&gt;trunk = !!(val &amp; MV88E6XXX_G1_ATU_DATA_TRUNK);</div><div class='add'>+		entry-&gt;portvec = (val &gt;&gt; 4) &amp; mv88e6xxx_port_mask(chip);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g1_atu_data_write(struct mv88e6xxx_chip *chip,</div><div class='add'>+				       struct mv88e6xxx_atu_entry *entry)</div><div class='add'>+{</div><div class='add'>+	u16 data = entry-&gt;state &amp; 0xf;</div><div class='add'>+</div><div class='add'>+	if (entry-&gt;state) {</div><div class='add'>+		if (entry-&gt;trunk)</div><div class='add'>+			data |= MV88E6XXX_G1_ATU_DATA_TRUNK;</div><div class='add'>+</div><div class='add'>+		data |= (entry-&gt;portvec &amp; mv88e6xxx_port_mask(chip)) &lt;&lt; 4;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_write(chip, MV88E6XXX_G1_ATU_DATA, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x0D: ATU MAC Address Register Bytes 0 &amp; 1</div><div class='add'>+ * Offset 0x0E: ATU MAC Address Register Bytes 2 &amp; 3</div><div class='add'>+ * Offset 0x0F: ATU MAC Address Register Bytes 4 &amp; 5</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g1_atu_mac_read(struct mv88e6xxx_chip *chip,</div><div class='add'>+				     struct mv88e6xxx_atu_entry *entry)</div><div class='add'>+{</div><div class='add'>+	u16 val;</div><div class='add'>+	int i, err;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 3; i++) {</div><div class='add'>+		err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_MAC01 + i, &amp;val);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		entry-&gt;mac[i * 2] = val &gt;&gt; 8;</div><div class='add'>+		entry-&gt;mac[i * 2 + 1] = val &amp; 0xff;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g1_atu_mac_write(struct mv88e6xxx_chip *chip,</div><div class='add'>+				      struct mv88e6xxx_atu_entry *entry)</div><div class='add'>+{</div><div class='add'>+	u16 val;</div><div class='add'>+	int i, err;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 3; i++) {</div><div class='add'>+		val = (entry-&gt;mac[i * 2] &lt;&lt; 8) | entry-&gt;mac[i * 2 + 1];</div><div class='add'>+		err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_ATU_MAC01 + i, val);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Address Translation Unit operations */</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g1_atu_getnext(struct mv88e6xxx_chip *chip, u16 fid,</div><div class='add'>+			     struct mv88e6xxx_atu_entry *entry)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_atu_op_wait(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Write the MAC address to iterate from only once */</div><div class='add'>+	if (!entry-&gt;state) {</div><div class='add'>+		err = mv88e6xxx_g1_atu_mac_write(chip, entry);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_atu_op(chip, fid, MV88E6XXX_G1_ATU_OP_GET_NEXT_DB);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_atu_data_read(chip, entry);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_atu_mac_read(chip, entry);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g1_atu_loadpurge(struct mv88e6xxx_chip *chip, u16 fid,</div><div class='add'>+			       struct mv88e6xxx_atu_entry *entry)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_atu_op_wait(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_atu_mac_write(chip, entry);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_atu_data_write(chip, entry);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_atu_op(chip, fid, MV88E6XXX_G1_ATU_OP_LOAD_DB);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g1_atu_flushmove(struct mv88e6xxx_chip *chip, u16 fid,</div><div class='add'>+				      struct mv88e6xxx_atu_entry *entry,</div><div class='add'>+				      bool all)</div><div class='add'>+{</div><div class='add'>+	u16 op;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_atu_op_wait(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_atu_data_write(chip, entry);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Flush/Move all or non-static entries from all or a given database */</div><div class='add'>+	if (all &amp;&amp; fid)</div><div class='add'>+		op = MV88E6XXX_G1_ATU_OP_FLUSH_MOVE_ALL_DB;</div><div class='add'>+	else if (fid)</div><div class='add'>+		op = MV88E6XXX_G1_ATU_OP_FLUSH_MOVE_NON_STATIC_DB;</div><div class='add'>+	else if (all)</div><div class='add'>+		op = MV88E6XXX_G1_ATU_OP_FLUSH_MOVE_ALL;</div><div class='add'>+	else</div><div class='add'>+		op = MV88E6XXX_G1_ATU_OP_FLUSH_MOVE_NON_STATIC;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_atu_op(chip, fid, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g1_atu_flush(struct mv88e6xxx_chip *chip, u16 fid, bool all)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_atu_entry entry = {</div><div class='add'>+		.state = 0, /* Null EntryState means Flush */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_atu_flushmove(chip, fid, &amp;entry, all);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g1_atu_move(struct mv88e6xxx_chip *chip, u16 fid,</div><div class='add'>+				 int from_port, int to_port, bool all)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_atu_entry entry = { 0 };</div><div class='add'>+	unsigned long mask;</div><div class='add'>+	int shift;</div><div class='add'>+</div><div class='add'>+	if (!chip-&gt;info-&gt;atu_move_port_mask)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	mask = chip-&gt;info-&gt;atu_move_port_mask;</div><div class='add'>+	shift = bitmap_weight(&amp;mask, 16);</div><div class='add'>+</div><div class='add'>+	entry.state = 0xf; /* Full EntryState means Move */</div><div class='add'>+	entry.portvec = from_port &amp; mask;</div><div class='add'>+	entry.portvec |= (to_port &amp; mask) &lt;&lt; shift;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_atu_flushmove(chip, fid, &amp;entry, all);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g1_atu_remove(struct mv88e6xxx_chip *chip, u16 fid, int port,</div><div class='add'>+			    bool all)</div><div class='add'>+{</div><div class='add'>+	int from_port = port;</div><div class='add'>+	int to_port = chip-&gt;info-&gt;atu_move_port_mask;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_atu_move(chip, fid, from_port, to_port, all);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t mv88e6xxx_g1_atu_prob_irq_thread_fn(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = dev_id;</div><div class='add'>+	struct mv88e6xxx_atu_entry entry;</div><div class='add'>+	int err, spid;</div><div class='add'>+	u16 val, fid;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_read_atu_violation(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_OP, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_atu_fid_read(chip, &amp;fid);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_atu_data_read(chip, &amp;entry);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_atu_mac_read(chip, &amp;entry);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	spid = entry.state;</div><div class='add'>+</div><div class='add'>+	if (val &amp; MV88E6XXX_G1_ATU_OP_MEMBER_VIOLATION) {</div><div class='add'>+		trace_mv88e6xxx_atu_member_violation(chip-&gt;dev, spid,</div><div class='add'>+						     entry.portvec, entry.mac,</div><div class='add'>+						     fid);</div><div class='add'>+		chip-&gt;ports[spid].atu_member_violation++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (val &amp; MV88E6XXX_G1_ATU_OP_MISS_VIOLATION) {</div><div class='add'>+		trace_mv88e6xxx_atu_miss_violation(chip-&gt;dev, spid,</div><div class='add'>+						   entry.portvec, entry.mac,</div><div class='add'>+						   fid);</div><div class='add'>+		chip-&gt;ports[spid].atu_miss_violation++;</div><div class='add'>+</div><div class='add'>+		if (fid != MV88E6XXX_FID_STANDALONE &amp;&amp; chip-&gt;ports[spid].mab) {</div><div class='add'>+			err = mv88e6xxx_handle_miss_violation(chip, spid,</div><div class='add'>+							      &amp;entry, fid);</div><div class='add'>+			if (err)</div><div class='add'>+				goto out;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (val &amp; MV88E6XXX_G1_ATU_OP_FULL_VIOLATION) {</div><div class='add'>+		trace_mv88e6xxx_atu_full_violation(chip-&gt;dev, spid,</div><div class='add'>+						   entry.portvec, entry.mac,</div><div class='add'>+						   fid);</div><div class='add'>+		if (spid &lt; ARRAY_SIZE(chip-&gt;ports))</div><div class='add'>+			chip-&gt;ports[spid].atu_full_violation++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+</div><div class='add'>+out_unlock:</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	dev_err(chip-&gt;dev, "ATU problem: error %d while handling interrupt\n",</div><div class='add'>+		err);</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g1_atu_prob_irq_setup(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	chip-&gt;atu_prob_irq = irq_find_mapping(chip-&gt;g1_irq.domain,</div><div class='add'>+					      MV88E6XXX_G1_STS_IRQ_ATU_PROB);</div><div class='add'>+	if (chip-&gt;atu_prob_irq &lt; 0)</div><div class='add'>+		return chip-&gt;atu_prob_irq;</div><div class='add'>+</div><div class='add'>+	snprintf(chip-&gt;atu_prob_irq_name, sizeof(chip-&gt;atu_prob_irq_name),</div><div class='add'>+		 "mv88e6xxx-%s-g1-atu-prob", dev_name(chip-&gt;dev));</div><div class='add'>+</div><div class='add'>+	err = request_threaded_irq(chip-&gt;atu_prob_irq, NULL,</div><div class='add'>+				   mv88e6xxx_g1_atu_prob_irq_thread_fn,</div><div class='add'>+				   IRQF_ONESHOT, chip-&gt;atu_prob_irq_name,</div><div class='add'>+				   chip);</div><div class='add'>+	if (err)</div><div class='add'>+		irq_dispose_mapping(chip-&gt;atu_prob_irq);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mv88e6xxx_g1_atu_prob_irq_free(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	free_irq(chip-&gt;atu_prob_irq, chip);</div><div class='add'>+	irq_dispose_mapping(chip-&gt;atu_prob_irq);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/global1_vtu.c b/drivers/net/dsa/mv88e6xxx/global1_vtu.c<br/>new file mode 100644<br/>index 000000000000..b524f27a2f0d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/global1_vtu.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/global1_vtu.c</a></div><div class='hunk'>@@ -0,0 +1,683 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Marvell 88E6xxx VLAN [Spanning Tree] Translation Unit (VTU [STU]) support</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2008 Marvell Semiconductor</div><div class='add'>+ * Copyright (c) 2015 CMC Electronics, Inc.</div><div class='add'>+ * Copyright (c) 2017 Savoir-faire Linux, Inc.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/irqdomain.h&gt;</div><div class='add'>+</div><div class='add'>+#include "chip.h"</div><div class='add'>+#include "global1.h"</div><div class='add'>+#include "trace.h"</div><div class='add'>+</div><div class='add'>+/* Offset 0x02: VTU FID Register */</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g1_vtu_fid_read(struct mv88e6xxx_chip *chip,</div><div class='add'>+				     struct mv88e6xxx_vtu_entry *entry)</div><div class='add'>+{</div><div class='add'>+	u16 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_read(chip, MV88E6352_G1_VTU_FID, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	entry-&gt;fid = val &amp; MV88E6352_G1_VTU_FID_MASK;</div><div class='add'>+	entry-&gt;policy = !!(val &amp; MV88E6352_G1_VTU_FID_VID_POLICY);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g1_vtu_fid_write(struct mv88e6xxx_chip *chip,</div><div class='add'>+				      struct mv88e6xxx_vtu_entry *entry)</div><div class='add'>+{</div><div class='add'>+	u16 val = entry-&gt;fid &amp; MV88E6352_G1_VTU_FID_MASK;</div><div class='add'>+</div><div class='add'>+	if (entry-&gt;policy)</div><div class='add'>+		val |= MV88E6352_G1_VTU_FID_VID_POLICY;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_write(chip, MV88E6352_G1_VTU_FID, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x03: VTU SID Register */</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g1_vtu_sid_read(struct mv88e6xxx_chip *chip, u8 *sid)</div><div class='add'>+{</div><div class='add'>+	u16 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_read(chip, MV88E6352_G1_VTU_SID, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	*sid = val &amp; MV88E6352_G1_VTU_SID_MASK;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g1_vtu_sid_write(struct mv88e6xxx_chip *chip, u8 sid)</div><div class='add'>+{</div><div class='add'>+	u16 val = sid &amp; MV88E6352_G1_VTU_SID_MASK;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_write(chip, MV88E6352_G1_VTU_SID, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x05: VTU Operation Register */</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g1_vtu_op_wait(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int bit = __bf_shf(MV88E6XXX_G1_VTU_OP_BUSY);</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_wait_bit(chip, MV88E6XXX_G1_VTU_OP, bit, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g1_vtu_op(struct mv88e6xxx_chip *chip, u16 op)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_VTU_OP,</div><div class='add'>+				 MV88E6XXX_G1_VTU_OP_BUSY | op);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_vtu_op_wait(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x06: VTU VID Register */</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g1_vtu_vid_read(struct mv88e6xxx_chip *chip,</div><div class='add'>+				     bool *valid, u16 *vid)</div><div class='add'>+{</div><div class='add'>+	u16 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_VTU_VID, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (vid) {</div><div class='add'>+		*vid = val &amp; 0xfff;</div><div class='add'>+</div><div class='add'>+		if (val &amp; MV88E6390_G1_VTU_VID_PAGE)</div><div class='add'>+			*vid |= 0x1000;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (valid)</div><div class='add'>+		*valid = !!(val &amp; MV88E6XXX_G1_VTU_VID_VALID);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g1_vtu_vid_write(struct mv88e6xxx_chip *chip,</div><div class='add'>+				      bool valid, u16 vid)</div><div class='add'>+{</div><div class='add'>+	u16 val = vid &amp; 0xfff;</div><div class='add'>+</div><div class='add'>+	if (vid &amp; 0x1000)</div><div class='add'>+		val |= MV88E6390_G1_VTU_VID_PAGE;</div><div class='add'>+</div><div class='add'>+	if (valid)</div><div class='add'>+		val |= MV88E6XXX_G1_VTU_VID_VALID;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_write(chip, MV88E6XXX_G1_VTU_VID, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x07: VTU/STU Data Register 1</div><div class='add'>+ * Offset 0x08: VTU/STU Data Register 2</div><div class='add'>+ * Offset 0x09: VTU/STU Data Register 3</div><div class='add'>+ */</div><div class='add'>+static int mv88e6185_g1_vtu_stu_data_read(struct mv88e6xxx_chip *chip,</div><div class='add'>+					  u16 *regs)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Read all 3 VTU/STU Data registers */</div><div class='add'>+	for (i = 0; i &lt; 3; ++i) {</div><div class='add'>+		u16 *reg = &amp;regs[i];</div><div class='add'>+		int err;</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_VTU_DATA1 + i, reg);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6185_g1_vtu_data_read(struct mv88e6xxx_chip *chip,</div><div class='add'>+				      u8 *member, u8 *state)</div><div class='add'>+{</div><div class='add'>+	u16 regs[3];</div><div class='add'>+	int err;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	err = mv88e6185_g1_vtu_stu_data_read(chip, regs);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Extract MemberTag data */</div><div class='add'>+	for (i = 0; i &lt; mv88e6xxx_num_ports(chip); ++i) {</div><div class='add'>+		unsigned int member_offset = (i % 4) * 4;</div><div class='add'>+		unsigned int state_offset = member_offset + 2;</div><div class='add'>+</div><div class='add'>+		if (member)</div><div class='add'>+			member[i] = (regs[i / 4] &gt;&gt; member_offset) &amp; 0x3;</div><div class='add'>+</div><div class='add'>+		if (state)</div><div class='add'>+			state[i] = (regs[i / 4] &gt;&gt; state_offset) &amp; 0x3;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6185_g1_vtu_data_write(struct mv88e6xxx_chip *chip,</div><div class='add'>+				       u8 *member, u8 *state)</div><div class='add'>+{</div><div class='add'>+	u16 regs[3] = { 0 };</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Insert MemberTag and PortState data */</div><div class='add'>+	for (i = 0; i &lt; mv88e6xxx_num_ports(chip); ++i) {</div><div class='add'>+		unsigned int member_offset = (i % 4) * 4;</div><div class='add'>+		unsigned int state_offset = member_offset + 2;</div><div class='add'>+</div><div class='add'>+		if (member)</div><div class='add'>+			regs[i / 4] |= (member[i] &amp; 0x3) &lt;&lt; member_offset;</div><div class='add'>+</div><div class='add'>+		if (state)</div><div class='add'>+			regs[i / 4] |= (state[i] &amp; 0x3) &lt;&lt; state_offset;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Write all 3 VTU/STU Data registers */</div><div class='add'>+	for (i = 0; i &lt; 3; ++i) {</div><div class='add'>+		u16 reg = regs[i];</div><div class='add'>+		int err;</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_VTU_DATA1 + i, reg);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6390_g1_vtu_data_read(struct mv88e6xxx_chip *chip, u8 *data)</div><div class='add'>+{</div><div class='add'>+	u16 regs[2];</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Read the 2 VTU/STU Data registers */</div><div class='add'>+	for (i = 0; i &lt; 2; ++i) {</div><div class='add'>+		u16 *reg = &amp;regs[i];</div><div class='add'>+		int err;</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_VTU_DATA1 + i, reg);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Extract data */</div><div class='add'>+	for (i = 0; i &lt; mv88e6xxx_num_ports(chip); ++i) {</div><div class='add'>+		unsigned int offset = (i % 8) * 2;</div><div class='add'>+</div><div class='add'>+		data[i] = (regs[i / 8] &gt;&gt; offset) &amp; 0x3;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6390_g1_vtu_data_write(struct mv88e6xxx_chip *chip, u8 *data)</div><div class='add'>+{</div><div class='add'>+	u16 regs[2] = { 0 };</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Insert data */</div><div class='add'>+	for (i = 0; i &lt; mv88e6xxx_num_ports(chip); ++i) {</div><div class='add'>+		unsigned int offset = (i % 8) * 2;</div><div class='add'>+</div><div class='add'>+		regs[i / 8] |= (data[i] &amp; 0x3) &lt;&lt; offset;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Write the 2 VTU/STU Data registers */</div><div class='add'>+	for (i = 0; i &lt; 2; ++i) {</div><div class='add'>+		u16 reg = regs[i];</div><div class='add'>+		int err;</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_VTU_DATA1 + i, reg);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* VLAN Translation Unit Operations */</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g1_vtu_getnext(struct mv88e6xxx_chip *chip,</div><div class='add'>+			     struct mv88e6xxx_vtu_entry *entry)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_vtu_op_wait(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* To get the next higher active VID, the VTU GetNext operation can be</div><div class='add'>+	 * started again without setting the VID registers since it already</div><div class='add'>+	 * contains the last VID.</div><div class='add'>+	 *</div><div class='add'>+	 * To save a few hardware accesses and abstract this to the caller,</div><div class='add'>+	 * write the VID only once, when the entry is given as invalid.</div><div class='add'>+	 */</div><div class='add'>+	if (!entry-&gt;valid) {</div><div class='add'>+		err = mv88e6xxx_g1_vtu_vid_write(chip, false, entry-&gt;vid);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_vtu_op(chip, MV88E6XXX_G1_VTU_OP_VTU_GET_NEXT);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_vtu_vid_read(chip, &amp;entry-&gt;valid, &amp;entry-&gt;vid);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6185_g1_vtu_getnext(struct mv88e6xxx_chip *chip,</div><div class='add'>+			     struct mv88e6xxx_vtu_entry *entry)</div><div class='add'>+{</div><div class='add'>+	u16 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_vtu_getnext(chip, entry);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (entry-&gt;valid) {</div><div class='add'>+		err = mv88e6185_g1_vtu_data_read(chip, entry-&gt;member, entry-&gt;state);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		/* VTU DBNum[3:0] are located in VTU Operation 3:0</div><div class='add'>+		 * VTU DBNum[7:4] ([5:4] for 6250) are located in VTU Operation 11:8 (9:8)</div><div class='add'>+		 */</div><div class='add'>+		err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_VTU_OP, &amp;val);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		entry-&gt;fid = val &amp; 0x000f;</div><div class='add'>+		entry-&gt;fid |= (val &amp; 0x0f00) &gt;&gt; 4;</div><div class='add'>+		entry-&gt;fid &amp;= mv88e6xxx_num_databases(chip) - 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6352_g1_vtu_getnext(struct mv88e6xxx_chip *chip,</div><div class='add'>+			     struct mv88e6xxx_vtu_entry *entry)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Fetch VLAN MemberTag data from the VTU */</div><div class='add'>+	err = mv88e6xxx_g1_vtu_getnext(chip, entry);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (entry-&gt;valid) {</div><div class='add'>+		err = mv88e6185_g1_vtu_data_read(chip, entry-&gt;member, NULL);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_g1_vtu_fid_read(chip, entry);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_g1_vtu_sid_read(chip, &amp;entry-&gt;sid);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6390_g1_vtu_getnext(struct mv88e6xxx_chip *chip,</div><div class='add'>+			     struct mv88e6xxx_vtu_entry *entry)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Fetch VLAN MemberTag data from the VTU */</div><div class='add'>+	err = mv88e6xxx_g1_vtu_getnext(chip, entry);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (entry-&gt;valid) {</div><div class='add'>+		err = mv88e6390_g1_vtu_data_read(chip, entry-&gt;member);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_g1_vtu_fid_read(chip, entry);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_g1_vtu_sid_read(chip, &amp;entry-&gt;sid);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6185_g1_vtu_loadpurge(struct mv88e6xxx_chip *chip,</div><div class='add'>+			       struct mv88e6xxx_vtu_entry *entry)</div><div class='add'>+{</div><div class='add'>+	u16 op = MV88E6XXX_G1_VTU_OP_VTU_LOAD_PURGE;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_vtu_op_wait(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_vtu_vid_write(chip, entry-&gt;valid, entry-&gt;vid);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (entry-&gt;valid) {</div><div class='add'>+		err = mv88e6185_g1_vtu_data_write(chip, entry-&gt;member, entry-&gt;state);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		/* VTU DBNum[3:0] are located in VTU Operation 3:0</div><div class='add'>+		 * VTU DBNum[7:4] are located in VTU Operation 11:8</div><div class='add'>+		 *</div><div class='add'>+		 * For the 6250/6220, the latter are really [5:4] and</div><div class='add'>+		 * 9:8, but in those cases bits 7:6 of entry-&gt;fid are</div><div class='add'>+		 * 0 since they have num_databases = 64.</div><div class='add'>+		 */</div><div class='add'>+		op |= entry-&gt;fid &amp; 0x000f;</div><div class='add'>+		op |= (entry-&gt;fid &amp; 0x00f0) &lt;&lt; 4;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_vtu_op(chip, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6352_g1_vtu_loadpurge(struct mv88e6xxx_chip *chip,</div><div class='add'>+			       struct mv88e6xxx_vtu_entry *entry)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_vtu_op_wait(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_vtu_vid_write(chip, entry-&gt;valid, entry-&gt;vid);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (entry-&gt;valid) {</div><div class='add'>+		/* Write MemberTag data */</div><div class='add'>+		err = mv88e6185_g1_vtu_data_write(chip, entry-&gt;member, NULL);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_g1_vtu_fid_write(chip, entry);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_g1_vtu_sid_write(chip, entry-&gt;sid);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Load/Purge VTU entry */</div><div class='add'>+	return mv88e6xxx_g1_vtu_op(chip, MV88E6XXX_G1_VTU_OP_VTU_LOAD_PURGE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6390_g1_vtu_loadpurge(struct mv88e6xxx_chip *chip,</div><div class='add'>+			       struct mv88e6xxx_vtu_entry *entry)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_vtu_op_wait(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_vtu_vid_write(chip, entry-&gt;valid, entry-&gt;vid);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (entry-&gt;valid) {</div><div class='add'>+		/* Write MemberTag data */</div><div class='add'>+		err = mv88e6390_g1_vtu_data_write(chip, entry-&gt;member);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_g1_vtu_fid_write(chip, entry);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_g1_vtu_sid_write(chip, entry-&gt;sid);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Load/Purge VTU entry */</div><div class='add'>+	return mv88e6xxx_g1_vtu_op(chip, MV88E6XXX_G1_VTU_OP_VTU_LOAD_PURGE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g1_vtu_flush(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* As part of the VTU flush, refresh FID map */</div><div class='add'>+	bitmap_zero(chip-&gt;fid_bitmap, MV88E6XXX_N_FID);</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_vtu_op_wait(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g1_vtu_op(chip, MV88E6XXX_G1_VTU_OP_FLUSH_ALL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Spanning Tree Unit Operations */</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g1_stu_getnext(struct mv88e6xxx_chip *chip,</div><div class='add'>+			     struct mv88e6xxx_stu_entry *entry)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_vtu_op_wait(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* To get the next higher active SID, the STU GetNext operation can be</div><div class='add'>+	 * started again without setting the SID registers since it already</div><div class='add'>+	 * contains the last SID.</div><div class='add'>+	 *</div><div class='add'>+	 * To save a few hardware accesses and abstract this to the caller,</div><div class='add'>+	 * write the SID only once, when the entry is given as invalid.</div><div class='add'>+	 */</div><div class='add'>+	if (!entry-&gt;valid) {</div><div class='add'>+		err = mv88e6xxx_g1_vtu_sid_write(chip, entry-&gt;sid);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_vtu_op(chip, MV88E6XXX_G1_VTU_OP_STU_GET_NEXT);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_vtu_vid_read(chip, &amp;entry-&gt;valid, NULL);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (entry-&gt;valid) {</div><div class='add'>+		err = mv88e6xxx_g1_vtu_sid_read(chip, &amp;entry-&gt;sid);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6352_g1_stu_getnext(struct mv88e6xxx_chip *chip,</div><div class='add'>+			     struct mv88e6xxx_stu_entry *entry)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_stu_getnext(chip, entry);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (!entry-&gt;valid)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return mv88e6185_g1_vtu_data_read(chip, NULL, entry-&gt;state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6390_g1_stu_getnext(struct mv88e6xxx_chip *chip,</div><div class='add'>+			     struct mv88e6xxx_stu_entry *entry)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_stu_getnext(chip, entry);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (!entry-&gt;valid)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return mv88e6390_g1_vtu_data_read(chip, entry-&gt;state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6352_g1_stu_loadpurge(struct mv88e6xxx_chip *chip,</div><div class='add'>+			       struct mv88e6xxx_stu_entry *entry)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_vtu_op_wait(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_vtu_vid_write(chip, entry-&gt;valid, 0);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_vtu_sid_write(chip, entry-&gt;sid);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (entry-&gt;valid) {</div><div class='add'>+		err = mv88e6185_g1_vtu_data_write(chip, NULL, entry-&gt;state);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Load/Purge STU entry */</div><div class='add'>+	return mv88e6xxx_g1_vtu_op(chip, MV88E6XXX_G1_VTU_OP_STU_LOAD_PURGE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6390_g1_stu_loadpurge(struct mv88e6xxx_chip *chip,</div><div class='add'>+			       struct mv88e6xxx_stu_entry *entry)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_vtu_op_wait(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_vtu_vid_write(chip, entry-&gt;valid, 0);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_vtu_sid_write(chip, entry-&gt;sid);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (entry-&gt;valid) {</div><div class='add'>+		err = mv88e6390_g1_vtu_data_write(chip, entry-&gt;state);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Load/Purge STU entry */</div><div class='add'>+	return mv88e6xxx_g1_vtu_op(chip, MV88E6XXX_G1_VTU_OP_STU_LOAD_PURGE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* VTU Violation Management */</div><div class='add'>+</div><div class='add'>+static irqreturn_t mv88e6xxx_g1_vtu_prob_irq_thread_fn(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = dev_id;</div><div class='add'>+	u16 val, vid;</div><div class='add'>+	int spid;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_vtu_op(chip, MV88E6XXX_G1_VTU_OP_GET_CLR_VIOLATION);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_VTU_OP, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g1_vtu_vid_read(chip, NULL, &amp;vid);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	spid = val &amp; MV88E6XXX_G1_VTU_OP_SPID_MASK;</div><div class='add'>+</div><div class='add'>+	if (val &amp; MV88E6XXX_G1_VTU_OP_MEMBER_VIOLATION) {</div><div class='add'>+		trace_mv88e6xxx_vtu_member_violation(chip-&gt;dev, spid, vid);</div><div class='add'>+		chip-&gt;ports[spid].vtu_member_violation++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (val &amp; MV88E6XXX_G1_VTU_OP_MISS_VIOLATION) {</div><div class='add'>+		trace_mv88e6xxx_vtu_miss_violation(chip-&gt;dev, spid, vid);</div><div class='add'>+		chip-&gt;ports[spid].vtu_miss_violation++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	dev_err(chip-&gt;dev, "VTU problem: error %d while handling interrupt\n",</div><div class='add'>+		err);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g1_vtu_prob_irq_setup(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	chip-&gt;vtu_prob_irq = irq_find_mapping(chip-&gt;g1_irq.domain,</div><div class='add'>+					      MV88E6XXX_G1_STS_IRQ_VTU_PROB);</div><div class='add'>+	if (chip-&gt;vtu_prob_irq &lt; 0)</div><div class='add'>+		return chip-&gt;vtu_prob_irq;</div><div class='add'>+</div><div class='add'>+	snprintf(chip-&gt;vtu_prob_irq_name, sizeof(chip-&gt;vtu_prob_irq_name),</div><div class='add'>+		 "mv88e6xxx-%s-g1-vtu-prob", dev_name(chip-&gt;dev));</div><div class='add'>+</div><div class='add'>+	err = request_threaded_irq(chip-&gt;vtu_prob_irq, NULL,</div><div class='add'>+				   mv88e6xxx_g1_vtu_prob_irq_thread_fn,</div><div class='add'>+				   IRQF_ONESHOT, chip-&gt;vtu_prob_irq_name,</div><div class='add'>+				   chip);</div><div class='add'>+	if (err)</div><div class='add'>+		irq_dispose_mapping(chip-&gt;vtu_prob_irq);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mv88e6xxx_g1_vtu_prob_irq_free(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	free_irq(chip-&gt;vtu_prob_irq, chip);</div><div class='add'>+	irq_dispose_mapping(chip-&gt;vtu_prob_irq);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/global2.c b/drivers/net/dsa/mv88e6xxx/global2.c<br/>new file mode 100644<br/>index 000000000000..30a6ffa7817b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/global2.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/global2.c</a></div><div class='hunk'>@@ -0,0 +1,1217 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Marvell 88E6xxx Switch Global 2 Registers support</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2008 Marvell Semiconductor</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2016-2017 Savoir-faire Linux Inc.</div><div class='add'>+ *	Vivien Didelot &lt;vivien.didelot@savoirfairelinux.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/irqdomain.h&gt;</div><div class='add'>+</div><div class='add'>+#include "chip.h"</div><div class='add'>+#include "global1.h" /* for MV88E6XXX_G1_STS_IRQ_DEVICE */</div><div class='add'>+#include "global2.h"</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g2_read(struct mv88e6xxx_chip *chip, int reg, u16 *val)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_read(chip, chip-&gt;info-&gt;global2_addr, reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g2_write(struct mv88e6xxx_chip *chip, int reg, u16 val)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_write(chip, chip-&gt;info-&gt;global2_addr, reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g2_wait_bit(struct mv88e6xxx_chip *chip, int reg, int</div><div class='add'>+			  bit, int val)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_wait_bit(chip, chip-&gt;info-&gt;global2_addr, reg,</div><div class='add'>+				  bit, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x00: Interrupt Source Register */</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g2_int_source(struct mv88e6xxx_chip *chip, u16 *src)</div><div class='add'>+{</div><div class='add'>+	/* Read (and clear most of) the Interrupt Source bits */</div><div class='add'>+	return mv88e6xxx_g2_read(chip, MV88E6XXX_G2_INT_SRC, src);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x01: Interrupt Mask Register */</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g2_int_mask(struct mv88e6xxx_chip *chip, u16 mask)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_g2_write(chip, MV88E6XXX_G2_INT_MASK, mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x02: Management Enable 2x */</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g2_mgmt_enable_2x(struct mv88e6xxx_chip *chip, u16 en2x)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_g2_write(chip, MV88E6XXX_G2_MGMT_EN_2X, en2x);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x03: Management Enable 0x */</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g2_mgmt_enable_0x(struct mv88e6xxx_chip *chip, u16 en0x)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_g2_write(chip, MV88E6XXX_G2_MGMT_EN_0X, en0x);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x05: Switch Management Register */</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g2_switch_mgmt_rsvd2cpu(struct mv88e6xxx_chip *chip,</div><div class='add'>+					     bool enable)</div><div class='add'>+{</div><div class='add'>+	u16 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_read(chip, MV88E6XXX_G2_SWITCH_MGMT, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (enable)</div><div class='add'>+		val |= MV88E6XXX_G2_SWITCH_MGMT_RSVD2CPU;</div><div class='add'>+	else</div><div class='add'>+		val &amp;= ~MV88E6XXX_G2_SWITCH_MGMT_RSVD2CPU;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_write(chip, MV88E6XXX_G2_SWITCH_MGMT, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6185_g2_mgmt_rsvd2cpu(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Consider the frames with reserved multicast destination</div><div class='add'>+	 * addresses matching 01:80:c2:00:00:0x as MGMT.</div><div class='add'>+	 */</div><div class='add'>+	err = mv88e6xxx_g2_mgmt_enable_0x(chip, 0xffff);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_switch_mgmt_rsvd2cpu(chip, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6352_g2_mgmt_rsvd2cpu(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Consider the frames with reserved multicast destination</div><div class='add'>+	 * addresses matching 01:80:c2:00:00:2x as MGMT.</div><div class='add'>+	 */</div><div class='add'>+	err = mv88e6xxx_g2_mgmt_enable_2x(chip, 0xffff);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6185_g2_mgmt_rsvd2cpu(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x06: Device Mapping Table register */</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g2_device_mapping_write(struct mv88e6xxx_chip *chip, int target,</div><div class='add'>+				      int port)</div><div class='add'>+{</div><div class='add'>+	u16 val = (target &lt;&lt; 8) | (port &amp; 0x1f);</div><div class='add'>+	/* Modern chips use 5 bits to define a device mapping port,</div><div class='add'>+	 * but bit 4 is reserved on older chips, so it is safe to use.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_write(chip, MV88E6XXX_G2_DEVICE_MAPPING,</div><div class='add'>+				  MV88E6XXX_G2_DEVICE_MAPPING_UPDATE | val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x07: Trunk Mask Table register */</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g2_trunk_mask_write(struct mv88e6xxx_chip *chip, int num,</div><div class='add'>+				  bool hash, u16 mask)</div><div class='add'>+{</div><div class='add'>+	u16 val = (num &lt;&lt; 12) | (mask &amp; mv88e6xxx_port_mask(chip));</div><div class='add'>+</div><div class='add'>+	if (hash)</div><div class='add'>+		val |= MV88E6XXX_G2_TRUNK_MASK_HASH;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_write(chip, MV88E6XXX_G2_TRUNK_MASK,</div><div class='add'>+				  MV88E6XXX_G2_TRUNK_MASK_UPDATE | val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x08: Trunk Mapping Table register */</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g2_trunk_mapping_write(struct mv88e6xxx_chip *chip, int id,</div><div class='add'>+				     u16 map)</div><div class='add'>+{</div><div class='add'>+	const u16 port_mask = BIT(mv88e6xxx_num_ports(chip)) - 1;</div><div class='add'>+	u16 val = (id &lt;&lt; 11) | (map &amp; port_mask);</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_write(chip, MV88E6XXX_G2_TRUNK_MAPPING,</div><div class='add'>+				  MV88E6XXX_G2_TRUNK_MAPPING_UPDATE | val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g2_trunk_clear(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	const u16 port_mask = BIT(mv88e6xxx_num_ports(chip)) - 1;</div><div class='add'>+	int i, err;</div><div class='add'>+</div><div class='add'>+	/* Clear all eight possible Trunk Mask vectors */</div><div class='add'>+	for (i = 0; i &lt; 8; ++i) {</div><div class='add'>+		err = mv88e6xxx_g2_trunk_mask_write(chip, i, false, port_mask);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Clear all sixteen possible Trunk ID routing vectors */</div><div class='add'>+	for (i = 0; i &lt; 16; ++i) {</div><div class='add'>+		err = mv88e6xxx_g2_trunk_mapping_write(chip, i, 0);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x09: Ingress Rate Command register</div><div class='add'>+ * Offset 0x0A: Ingress Rate Data register</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g2_irl_wait(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int bit = __bf_shf(MV88E6XXX_G2_IRL_CMD_BUSY);</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_wait_bit(chip, MV88E6XXX_G2_IRL_CMD, bit, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g2_irl_op(struct mv88e6xxx_chip *chip, u16 op, int port,</div><div class='add'>+			       int res, int reg)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_write(chip, MV88E6XXX_G2_IRL_CMD,</div><div class='add'>+				 MV88E6XXX_G2_IRL_CMD_BUSY | op | (port &lt;&lt; 8) |</div><div class='add'>+				 (res &lt;&lt; 5) | reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_irl_wait(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6352_g2_irl_init_all(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_g2_irl_op(chip, MV88E6352_G2_IRL_CMD_OP_INIT_ALL, port,</div><div class='add'>+				   0, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6390_g2_irl_init_all(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_g2_irl_op(chip, MV88E6390_G2_IRL_CMD_OP_INIT_ALL, port,</div><div class='add'>+				   0, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x0B: Cross-chip Port VLAN (Addr) Register</div><div class='add'>+ * Offset 0x0C: Cross-chip Port VLAN Data Register</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g2_pvt_op_wait(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int bit = __bf_shf(MV88E6XXX_G2_PVT_ADDR_BUSY);</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_wait_bit(chip, MV88E6XXX_G2_PVT_ADDR, bit, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g2_pvt_op(struct mv88e6xxx_chip *chip, int src_dev,</div><div class='add'>+			       int src_port, u16 op)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* 9-bit Cross-chip PVT pointer: with MV88E6XXX_G2_MISC_5_BIT_PORT</div><div class='add'>+	 * cleared, source device is 5-bit, source port is 4-bit.</div><div class='add'>+	 */</div><div class='add'>+	op |= MV88E6XXX_G2_PVT_ADDR_BUSY;</div><div class='add'>+	op |= (src_dev &amp; 0x1f) &lt;&lt; 4;</div><div class='add'>+	op |= (src_port &amp; 0xf);</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_write(chip, MV88E6XXX_G2_PVT_ADDR, op);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_pvt_op_wait(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g2_pvt_read(struct mv88e6xxx_chip *chip, int src_dev,</div><div class='add'>+			  int src_port, u16 *data)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_pvt_op_wait(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_pvt_op(chip, src_dev, src_port,</div><div class='add'>+				  MV88E6XXX_G2_PVT_ADDR_OP_READ);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_read(chip, MV88E6XXX_G2_PVT_DATA, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g2_pvt_write(struct mv88e6xxx_chip *chip, int src_dev,</div><div class='add'>+			   int src_port, u16 data)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_pvt_op_wait(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_write(chip, MV88E6XXX_G2_PVT_DATA, data);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_pvt_op(chip, src_dev, src_port,</div><div class='add'>+				   MV88E6XXX_G2_PVT_ADDR_OP_WRITE_PVLAN);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x0D: Switch MAC/WoL/WoF register */</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g2_switch_mac_write(struct mv88e6xxx_chip *chip,</div><div class='add'>+					 unsigned int pointer, u8 data)</div><div class='add'>+{</div><div class='add'>+	u16 val = (pointer &lt;&lt; 8) | data;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_write(chip, MV88E6XXX_G2_SWITCH_MAC,</div><div class='add'>+				  MV88E6XXX_G2_SWITCH_MAC_UPDATE | val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g2_set_switch_mac(struct mv88e6xxx_chip *chip, u8 *addr)</div><div class='add'>+{</div><div class='add'>+	int i, err;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 6; i++) {</div><div class='add'>+		err = mv88e6xxx_g2_switch_mac_write(chip, i, addr[i]);</div><div class='add'>+		if (err)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x0E: ATU Statistics */</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g2_atu_stats_set(struct mv88e6xxx_chip *chip, u16 kind, u16 bin)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_g2_write(chip, MV88E6XXX_G2_ATU_STATS,</div><div class='add'>+				  kind | bin);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g2_atu_stats_get(struct mv88e6xxx_chip *chip, u16 *stats)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_g2_read(chip, MV88E6XXX_G2_ATU_STATS, stats);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x0F: Priority Override Table */</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g2_pot_write(struct mv88e6xxx_chip *chip, int pointer,</div><div class='add'>+				  u8 data)</div><div class='add'>+{</div><div class='add'>+	u16 val = (pointer &lt;&lt; 8) | (data &amp; 0x7);</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_write(chip, MV88E6XXX_G2_PRIO_OVERRIDE,</div><div class='add'>+				  MV88E6XXX_G2_PRIO_OVERRIDE_UPDATE | val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g2_pot_clear(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int i, err;</div><div class='add'>+</div><div class='add'>+	/* Clear all sixteen possible Priority Override entries */</div><div class='add'>+	for (i = 0; i &lt; 16; i++) {</div><div class='add'>+		err = mv88e6xxx_g2_pot_write(chip, i, 0);</div><div class='add'>+		if (err)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x14: EEPROM Command</div><div class='add'>+ * Offset 0x15: EEPROM Data (for 16-bit data access)</div><div class='add'>+ * Offset 0x15: EEPROM Addr (for 8-bit data access)</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g2_eeprom_wait(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int bit = __bf_shf(MV88E6XXX_G2_EEPROM_CMD_BUSY);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_wait_bit(chip, MV88E6XXX_G2_EEPROM_CMD, bit, 0);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	bit = __bf_shf(MV88E6XXX_G2_EEPROM_CMD_RUNNING);</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_wait_bit(chip, MV88E6XXX_G2_EEPROM_CMD, bit, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g2_eeprom_cmd(struct mv88e6xxx_chip *chip, u16 cmd)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_write(chip, MV88E6XXX_G2_EEPROM_CMD,</div><div class='add'>+				 MV88E6XXX_G2_EEPROM_CMD_BUSY | cmd);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_eeprom_wait(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g2_eeprom_read8(struct mv88e6xxx_chip *chip,</div><div class='add'>+				     u16 addr, u8 *data)</div><div class='add'>+{</div><div class='add'>+	u16 cmd = MV88E6XXX_G2_EEPROM_CMD_OP_READ;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_eeprom_wait(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_write(chip, MV88E6390_G2_EEPROM_ADDR, addr);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_eeprom_cmd(chip, cmd);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_read(chip, MV88E6XXX_G2_EEPROM_CMD, &amp;cmd);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	*data = cmd &amp; 0xff;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g2_eeprom_write8(struct mv88e6xxx_chip *chip,</div><div class='add'>+				      u16 addr, u8 data)</div><div class='add'>+{</div><div class='add'>+	u16 cmd = MV88E6XXX_G2_EEPROM_CMD_OP_WRITE |</div><div class='add'>+		MV88E6XXX_G2_EEPROM_CMD_WRITE_EN;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_eeprom_wait(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_write(chip, MV88E6390_G2_EEPROM_ADDR, addr);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_eeprom_cmd(chip, cmd | data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g2_eeprom_read16(struct mv88e6xxx_chip *chip,</div><div class='add'>+				      u8 addr, u16 *data)</div><div class='add'>+{</div><div class='add'>+	u16 cmd = MV88E6XXX_G2_EEPROM_CMD_OP_READ | addr;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_eeprom_wait(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_eeprom_cmd(chip, cmd);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_read(chip, MV88E6352_G2_EEPROM_DATA, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g2_eeprom_write16(struct mv88e6xxx_chip *chip,</div><div class='add'>+				       u8 addr, u16 data)</div><div class='add'>+{</div><div class='add'>+	u16 cmd = MV88E6XXX_G2_EEPROM_CMD_OP_WRITE | addr;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_eeprom_wait(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_write(chip, MV88E6352_G2_EEPROM_DATA, data);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_eeprom_cmd(chip, cmd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g2_get_eeprom8(struct mv88e6xxx_chip *chip,</div><div class='add'>+			     struct ethtool_eeprom *eeprom, u8 *data)</div><div class='add'>+{</div><div class='add'>+	unsigned int offset = eeprom-&gt;offset;</div><div class='add'>+	unsigned int len = eeprom-&gt;len;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	eeprom-&gt;len = 0;</div><div class='add'>+</div><div class='add'>+	while (len) {</div><div class='add'>+		err = mv88e6xxx_g2_eeprom_read8(chip, offset, data);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		eeprom-&gt;len++;</div><div class='add'>+		offset++;</div><div class='add'>+		data++;</div><div class='add'>+		len--;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g2_set_eeprom8(struct mv88e6xxx_chip *chip,</div><div class='add'>+			     struct ethtool_eeprom *eeprom, u8 *data)</div><div class='add'>+{</div><div class='add'>+	unsigned int offset = eeprom-&gt;offset;</div><div class='add'>+	unsigned int len = eeprom-&gt;len;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	eeprom-&gt;len = 0;</div><div class='add'>+</div><div class='add'>+	while (len) {</div><div class='add'>+		err = mv88e6xxx_g2_eeprom_write8(chip, offset, *data);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		eeprom-&gt;len++;</div><div class='add'>+		offset++;</div><div class='add'>+		data++;</div><div class='add'>+		len--;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g2_get_eeprom16(struct mv88e6xxx_chip *chip,</div><div class='add'>+			      struct ethtool_eeprom *eeprom, u8 *data)</div><div class='add'>+{</div><div class='add'>+	unsigned int offset = eeprom-&gt;offset;</div><div class='add'>+	unsigned int len = eeprom-&gt;len;</div><div class='add'>+	u16 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	eeprom-&gt;len = 0;</div><div class='add'>+</div><div class='add'>+	if (offset &amp; 1) {</div><div class='add'>+		err = mv88e6xxx_g2_eeprom_read16(chip, offset &gt;&gt; 1, &amp;val);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		*data++ = (val &gt;&gt; 8) &amp; 0xff;</div><div class='add'>+</div><div class='add'>+		offset++;</div><div class='add'>+		len--;</div><div class='add'>+		eeprom-&gt;len++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	while (len &gt;= 2) {</div><div class='add'>+		err = mv88e6xxx_g2_eeprom_read16(chip, offset &gt;&gt; 1, &amp;val);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		*data++ = val &amp; 0xff;</div><div class='add'>+		*data++ = (val &gt;&gt; 8) &amp; 0xff;</div><div class='add'>+</div><div class='add'>+		offset += 2;</div><div class='add'>+		len -= 2;</div><div class='add'>+		eeprom-&gt;len += 2;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (len) {</div><div class='add'>+		err = mv88e6xxx_g2_eeprom_read16(chip, offset &gt;&gt; 1, &amp;val);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		*data++ = val &amp; 0xff;</div><div class='add'>+</div><div class='add'>+		offset++;</div><div class='add'>+		len--;</div><div class='add'>+		eeprom-&gt;len++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g2_set_eeprom16(struct mv88e6xxx_chip *chip,</div><div class='add'>+			      struct ethtool_eeprom *eeprom, u8 *data)</div><div class='add'>+{</div><div class='add'>+	unsigned int offset = eeprom-&gt;offset;</div><div class='add'>+	unsigned int len = eeprom-&gt;len;</div><div class='add'>+	u16 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Ensure the RO WriteEn bit is set */</div><div class='add'>+	err = mv88e6xxx_g2_read(chip, MV88E6XXX_G2_EEPROM_CMD, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (!(val &amp; MV88E6XXX_G2_EEPROM_CMD_WRITE_EN))</div><div class='add'>+		return -EROFS;</div><div class='add'>+</div><div class='add'>+	eeprom-&gt;len = 0;</div><div class='add'>+</div><div class='add'>+	if (offset &amp; 1) {</div><div class='add'>+		err = mv88e6xxx_g2_eeprom_read16(chip, offset &gt;&gt; 1, &amp;val);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		val = (*data++ &lt;&lt; 8) | (val &amp; 0xff);</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_g2_eeprom_write16(chip, offset &gt;&gt; 1, val);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		offset++;</div><div class='add'>+		len--;</div><div class='add'>+		eeprom-&gt;len++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	while (len &gt;= 2) {</div><div class='add'>+		val = *data++;</div><div class='add'>+		val |= *data++ &lt;&lt; 8;</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_g2_eeprom_write16(chip, offset &gt;&gt; 1, val);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		offset += 2;</div><div class='add'>+		len -= 2;</div><div class='add'>+		eeprom-&gt;len += 2;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (len) {</div><div class='add'>+		err = mv88e6xxx_g2_eeprom_read16(chip, offset &gt;&gt; 1, &amp;val);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		val = (val &amp; 0xff00) | *data++;</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_g2_eeprom_write16(chip, offset &gt;&gt; 1, val);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		offset++;</div><div class='add'>+		len--;</div><div class='add'>+		eeprom-&gt;len++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x18: SMI PHY Command Register</div><div class='add'>+ * Offset 0x19: SMI PHY Data Register</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g2_smi_phy_wait(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int bit = __bf_shf(MV88E6XXX_G2_SMI_PHY_CMD_BUSY);</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_wait_bit(chip, MV88E6XXX_G2_SMI_PHY_CMD, bit, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g2_smi_phy_cmd(struct mv88e6xxx_chip *chip, u16 cmd)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_write(chip, MV88E6XXX_G2_SMI_PHY_CMD,</div><div class='add'>+				 MV88E6XXX_G2_SMI_PHY_CMD_BUSY | cmd);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_smi_phy_wait(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g2_smi_phy_access(struct mv88e6xxx_chip *chip,</div><div class='add'>+				       bool external, bool c45, u16 op, int dev,</div><div class='add'>+				       int reg)</div><div class='add'>+{</div><div class='add'>+	u16 cmd = op;</div><div class='add'>+</div><div class='add'>+	if (external)</div><div class='add'>+		cmd |= MV88E6390_G2_SMI_PHY_CMD_FUNC_EXTERNAL;</div><div class='add'>+	else</div><div class='add'>+		cmd |= MV88E6390_G2_SMI_PHY_CMD_FUNC_INTERNAL; /* empty mask */</div><div class='add'>+</div><div class='add'>+	if (c45)</div><div class='add'>+		cmd |= MV88E6XXX_G2_SMI_PHY_CMD_MODE_45; /* empty mask */</div><div class='add'>+	else</div><div class='add'>+		cmd |= MV88E6XXX_G2_SMI_PHY_CMD_MODE_22;</div><div class='add'>+</div><div class='add'>+	dev &lt;&lt;= __bf_shf(MV88E6XXX_G2_SMI_PHY_CMD_DEV_ADDR_MASK);</div><div class='add'>+	cmd |= dev &amp; MV88E6XXX_G2_SMI_PHY_CMD_DEV_ADDR_MASK;</div><div class='add'>+	cmd |= reg &amp; MV88E6XXX_G2_SMI_PHY_CMD_REG_ADDR_MASK;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_smi_phy_cmd(chip, cmd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g2_smi_phy_access_c22(struct mv88e6xxx_chip *chip,</div><div class='add'>+					   bool external, u16 op, int dev,</div><div class='add'>+					   int reg)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_g2_smi_phy_access(chip, external, false, op, dev, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* IEEE 802.3 Clause 22 Read Data Register */</div><div class='add'>+static int mv88e6xxx_g2_smi_phy_read_data_c22(struct mv88e6xxx_chip *chip,</div><div class='add'>+					      bool external, int dev, int reg,</div><div class='add'>+					      u16 *data)</div><div class='add'>+{</div><div class='add'>+	u16 op = MV88E6XXX_G2_SMI_PHY_CMD_OP_22_READ_DATA;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_smi_phy_wait(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_smi_phy_access_c22(chip, external, op, dev, reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_read(chip, MV88E6XXX_G2_SMI_PHY_DATA, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* IEEE 802.3 Clause 22 Write Data Register */</div><div class='add'>+static int mv88e6xxx_g2_smi_phy_write_data_c22(struct mv88e6xxx_chip *chip,</div><div class='add'>+					       bool external, int dev, int reg,</div><div class='add'>+					       u16 data)</div><div class='add'>+{</div><div class='add'>+	u16 op = MV88E6XXX_G2_SMI_PHY_CMD_OP_22_WRITE_DATA;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_smi_phy_wait(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_write(chip, MV88E6XXX_G2_SMI_PHY_DATA, data);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_smi_phy_access_c22(chip, external, op, dev, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g2_smi_phy_access_c45(struct mv88e6xxx_chip *chip,</div><div class='add'>+					   bool external, u16 op, int port,</div><div class='add'>+					   int dev)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_g2_smi_phy_access(chip, external, true, op, port, dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* IEEE 802.3 Clause 45 Write Address Register */</div><div class='add'>+static int mv88e6xxx_g2_smi_phy_write_addr_c45(struct mv88e6xxx_chip *chip,</div><div class='add'>+					       bool external, int port, int dev,</div><div class='add'>+					       int addr)</div><div class='add'>+{</div><div class='add'>+	u16 op = MV88E6XXX_G2_SMI_PHY_CMD_OP_45_WRITE_ADDR;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_smi_phy_wait(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_write(chip, MV88E6XXX_G2_SMI_PHY_DATA, addr);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_smi_phy_access_c45(chip, external, op, port, dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* IEEE 802.3 Clause 45 Read Data Register */</div><div class='add'>+static int mv88e6xxx_g2_smi_phy_read_data_c45(struct mv88e6xxx_chip *chip,</div><div class='add'>+					      bool external, int port, int dev,</div><div class='add'>+					      u16 *data)</div><div class='add'>+{</div><div class='add'>+	u16 op = MV88E6XXX_G2_SMI_PHY_CMD_OP_45_READ_DATA;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_smi_phy_access_c45(chip, external, op, port, dev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_read(chip, MV88E6XXX_G2_SMI_PHY_DATA, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int _mv88e6xxx_g2_smi_phy_read_c45(struct mv88e6xxx_chip *chip,</div><div class='add'>+					  bool external, int port, int devad,</div><div class='add'>+					  int reg, u16 *data)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_smi_phy_write_addr_c45(chip, external, port, devad,</div><div class='add'>+						  reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_smi_phy_read_data_c45(chip, external, port, devad,</div><div class='add'>+						  data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* IEEE 802.3 Clause 45 Write Data Register */</div><div class='add'>+static int mv88e6xxx_g2_smi_phy_write_data_c45(struct mv88e6xxx_chip *chip,</div><div class='add'>+					       bool external, int port, int dev,</div><div class='add'>+					       u16 data)</div><div class='add'>+{</div><div class='add'>+	u16 op = MV88E6XXX_G2_SMI_PHY_CMD_OP_45_WRITE_DATA;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_write(chip, MV88E6XXX_G2_SMI_PHY_DATA, data);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_smi_phy_access_c45(chip, external, op, port, dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int _mv88e6xxx_g2_smi_phy_write_c45(struct mv88e6xxx_chip *chip,</div><div class='add'>+					   bool external, int port, int devad,</div><div class='add'>+					   int reg, u16 data)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_smi_phy_write_addr_c45(chip, external, port, devad,</div><div class='add'>+						  reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_smi_phy_write_data_c45(chip, external, port, devad,</div><div class='add'>+						   data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g2_smi_phy_read_c22(struct mv88e6xxx_chip *chip,</div><div class='add'>+				  struct mii_bus *bus,</div><div class='add'>+				  int addr, int reg, u16 *val)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_mdio_bus *mdio_bus = bus-&gt;priv;</div><div class='add'>+	bool external = mdio_bus-&gt;external;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_smi_phy_read_data_c22(chip, external, addr, reg,</div><div class='add'>+						  val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g2_smi_phy_read_c45(struct mv88e6xxx_chip *chip,</div><div class='add'>+				  struct mii_bus *bus, int addr, int devad,</div><div class='add'>+				  int reg, u16 *val)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_mdio_bus *mdio_bus = bus-&gt;priv;</div><div class='add'>+	bool external = mdio_bus-&gt;external;</div><div class='add'>+</div><div class='add'>+	return _mv88e6xxx_g2_smi_phy_read_c45(chip, external, addr, devad, reg,</div><div class='add'>+					      val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g2_smi_phy_write_c22(struct mv88e6xxx_chip *chip,</div><div class='add'>+				   struct mii_bus *bus, int addr, int reg,</div><div class='add'>+				   u16 val)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_mdio_bus *mdio_bus = bus-&gt;priv;</div><div class='add'>+	bool external = mdio_bus-&gt;external;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_smi_phy_write_data_c22(chip, external, addr, reg,</div><div class='add'>+						   val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g2_smi_phy_write_c45(struct mv88e6xxx_chip *chip,</div><div class='add'>+				   struct mii_bus *bus, int addr, int devad,</div><div class='add'>+				   int reg, u16 val)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_mdio_bus *mdio_bus = bus-&gt;priv;</div><div class='add'>+	bool external = mdio_bus-&gt;external;</div><div class='add'>+</div><div class='add'>+	return _mv88e6xxx_g2_smi_phy_write_c45(chip, external, addr, devad, reg,</div><div class='add'>+					       val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x1B: Watchdog Control */</div><div class='add'>+static int mv88e6097_watchdog_action(struct mv88e6xxx_chip *chip, int irq)</div><div class='add'>+{</div><div class='add'>+	u16 reg;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_g2_read(chip, MV88E6352_G2_WDOG_CTL, &amp;reg);</div><div class='add'>+</div><div class='add'>+	dev_info(chip-&gt;dev, "Watchdog event: 0x%04x", reg);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6097_watchdog_free(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	u16 reg;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_g2_read(chip, MV88E6352_G2_WDOG_CTL, &amp;reg);</div><div class='add'>+</div><div class='add'>+	reg &amp;= ~(MV88E6352_G2_WDOG_CTL_EGRESS_ENABLE |</div><div class='add'>+		 MV88E6352_G2_WDOG_CTL_QC_ENABLE);</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_g2_write(chip, MV88E6352_G2_WDOG_CTL, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6097_watchdog_setup(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_g2_write(chip, MV88E6352_G2_WDOG_CTL,</div><div class='add'>+				  MV88E6352_G2_WDOG_CTL_EGRESS_ENABLE |</div><div class='add'>+				  MV88E6352_G2_WDOG_CTL_QC_ENABLE |</div><div class='add'>+				  MV88E6352_G2_WDOG_CTL_SWRESET);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct mv88e6xxx_irq_ops mv88e6097_watchdog_ops = {</div><div class='add'>+	.irq_action = mv88e6097_watchdog_action,</div><div class='add'>+	.irq_setup = mv88e6097_watchdog_setup,</div><div class='add'>+	.irq_free = mv88e6097_watchdog_free,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void mv88e6250_watchdog_free(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	u16 reg;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_g2_read(chip, MV88E6250_G2_WDOG_CTL, &amp;reg);</div><div class='add'>+</div><div class='add'>+	reg &amp;= ~(MV88E6250_G2_WDOG_CTL_EGRESS_ENABLE |</div><div class='add'>+		 MV88E6250_G2_WDOG_CTL_QC_ENABLE);</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_g2_write(chip, MV88E6250_G2_WDOG_CTL, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6250_watchdog_setup(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_g2_write(chip, MV88E6250_G2_WDOG_CTL,</div><div class='add'>+				  MV88E6250_G2_WDOG_CTL_EGRESS_ENABLE |</div><div class='add'>+				  MV88E6250_G2_WDOG_CTL_QC_ENABLE |</div><div class='add'>+				  MV88E6250_G2_WDOG_CTL_SWRESET);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct mv88e6xxx_irq_ops mv88e6250_watchdog_ops = {</div><div class='add'>+	.irq_action = mv88e6097_watchdog_action,</div><div class='add'>+	.irq_setup = mv88e6250_watchdog_setup,</div><div class='add'>+	.irq_free = mv88e6250_watchdog_free,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int mv88e6390_watchdog_setup(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_g2_write(chip, MV88E6390_G2_WDOG_CTL,</div><div class='add'>+				  MV88E6390_G2_WDOG_CTL_UPDATE |</div><div class='add'>+				  MV88E6390_G2_WDOG_CTL_PTR_INT_ENABLE |</div><div class='add'>+				  MV88E6390_G2_WDOG_CTL_CUT_THROUGH |</div><div class='add'>+				  MV88E6390_G2_WDOG_CTL_QUEUE_CONTROLLER |</div><div class='add'>+				  MV88E6390_G2_WDOG_CTL_EGRESS |</div><div class='add'>+				  MV88E6390_G2_WDOG_CTL_FORCE_IRQ);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6390_watchdog_action(struct mv88e6xxx_chip *chip, int irq)</div><div class='add'>+{</div><div class='add'>+	u16 reg;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_g2_write(chip, MV88E6390_G2_WDOG_CTL,</div><div class='add'>+			   MV88E6390_G2_WDOG_CTL_PTR_EVENT);</div><div class='add'>+	mv88e6xxx_g2_read(chip, MV88E6390_G2_WDOG_CTL, &amp;reg);</div><div class='add'>+</div><div class='add'>+	dev_info(chip-&gt;dev, "Watchdog event: 0x%04x",</div><div class='add'>+		 reg &amp; MV88E6390_G2_WDOG_CTL_DATA_MASK);</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_g2_write(chip, MV88E6390_G2_WDOG_CTL,</div><div class='add'>+			   MV88E6390_G2_WDOG_CTL_PTR_HISTORY);</div><div class='add'>+	mv88e6xxx_g2_read(chip, MV88E6390_G2_WDOG_CTL, &amp;reg);</div><div class='add'>+</div><div class='add'>+	dev_info(chip-&gt;dev, "Watchdog history: 0x%04x",</div><div class='add'>+		 reg &amp; MV88E6390_G2_WDOG_CTL_DATA_MASK);</div><div class='add'>+</div><div class='add'>+	/* Trigger a software reset to try to recover the switch */</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;reset)</div><div class='add'>+		chip-&gt;info-&gt;ops-&gt;reset(chip);</div><div class='add'>+</div><div class='add'>+	mv88e6390_watchdog_setup(chip);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6390_watchdog_free(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	mv88e6xxx_g2_write(chip, MV88E6390_G2_WDOG_CTL,</div><div class='add'>+			   MV88E6390_G2_WDOG_CTL_UPDATE |</div><div class='add'>+			   MV88E6390_G2_WDOG_CTL_PTR_INT_ENABLE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct mv88e6xxx_irq_ops mv88e6390_watchdog_ops = {</div><div class='add'>+	.irq_action = mv88e6390_watchdog_action,</div><div class='add'>+	.irq_setup = mv88e6390_watchdog_setup,</div><div class='add'>+	.irq_free = mv88e6390_watchdog_free,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int mv88e6393x_watchdog_action(struct mv88e6xxx_chip *chip, int irq)</div><div class='add'>+{</div><div class='add'>+	mv88e6390_watchdog_action(chip, irq);</div><div class='add'>+</div><div class='add'>+	/* Fix for clearing the force WD event bit.</div><div class='add'>+	 * Unreleased erratum on mv88e6393x.</div><div class='add'>+	 */</div><div class='add'>+	mv88e6xxx_g2_write(chip, MV88E6390_G2_WDOG_CTL,</div><div class='add'>+			   MV88E6390_G2_WDOG_CTL_UPDATE |</div><div class='add'>+			   MV88E6390_G2_WDOG_CTL_PTR_EVENT);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct mv88e6xxx_irq_ops mv88e6393x_watchdog_ops = {</div><div class='add'>+	.irq_action = mv88e6393x_watchdog_action,</div><div class='add'>+	.irq_setup = mv88e6390_watchdog_setup,</div><div class='add'>+	.irq_free = mv88e6390_watchdog_free,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static irqreturn_t mv88e6xxx_g2_watchdog_thread_fn(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = dev_id;</div><div class='add'>+	irqreturn_t ret = IRQ_NONE;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;watchdog_ops-&gt;irq_action)</div><div class='add'>+		ret = chip-&gt;info-&gt;ops-&gt;watchdog_ops-&gt;irq_action(chip, irq);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_g2_watchdog_free(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;watchdog_ops-&gt;irq_free)</div><div class='add'>+		chip-&gt;info-&gt;ops-&gt;watchdog_ops-&gt;irq_free(chip);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	free_irq(chip-&gt;watchdog_irq, chip);</div><div class='add'>+	irq_dispose_mapping(chip-&gt;watchdog_irq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g2_watchdog_setup(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	chip-&gt;watchdog_irq = irq_find_mapping(chip-&gt;g2_irq.domain,</div><div class='add'>+					      MV88E6XXX_G2_INT_SOURCE_WATCHDOG);</div><div class='add'>+	if (chip-&gt;watchdog_irq &lt; 0)</div><div class='add'>+		return chip-&gt;watchdog_irq;</div><div class='add'>+</div><div class='add'>+	snprintf(chip-&gt;watchdog_irq_name, sizeof(chip-&gt;watchdog_irq_name),</div><div class='add'>+		 "mv88e6xxx-%s-watchdog", dev_name(chip-&gt;dev));</div><div class='add'>+</div><div class='add'>+	err = request_threaded_irq(chip-&gt;watchdog_irq, NULL,</div><div class='add'>+				   mv88e6xxx_g2_watchdog_thread_fn,</div><div class='add'>+				   IRQF_ONESHOT | IRQF_TRIGGER_FALLING,</div><div class='add'>+				   chip-&gt;watchdog_irq_name, chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;watchdog_ops-&gt;irq_setup)</div><div class='add'>+		err = chip-&gt;info-&gt;ops-&gt;watchdog_ops-&gt;irq_setup(chip);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x1D: Misc Register */</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g2_misc_5_bit_port(struct mv88e6xxx_chip *chip,</div><div class='add'>+					bool port_5_bit)</div><div class='add'>+{</div><div class='add'>+	u16 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_read(chip, MV88E6XXX_G2_MISC, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (port_5_bit)</div><div class='add'>+		val |= MV88E6XXX_G2_MISC_5_BIT_PORT;</div><div class='add'>+	else</div><div class='add'>+		val &amp;= ~MV88E6XXX_G2_MISC_5_BIT_PORT;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_write(chip, MV88E6XXX_G2_MISC, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g2_misc_4_bit_port(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_g2_misc_5_bit_port(chip, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_g2_irq_mask(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = irq_data_get_irq_chip_data(d);</div><div class='add'>+	unsigned int n = d-&gt;hwirq;</div><div class='add'>+</div><div class='add'>+	chip-&gt;g2_irq.masked |= (1 &lt;&lt; n);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_g2_irq_unmask(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = irq_data_get_irq_chip_data(d);</div><div class='add'>+	unsigned int n = d-&gt;hwirq;</div><div class='add'>+</div><div class='add'>+	chip-&gt;g2_irq.masked &amp;= ~(1 &lt;&lt; n);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t mv88e6xxx_g2_irq_thread_fn(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = dev_id;</div><div class='add'>+	unsigned int nhandled = 0;</div><div class='add'>+	unsigned int sub_irq;</div><div class='add'>+	unsigned int n;</div><div class='add'>+	int err;</div><div class='add'>+	u16 reg;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	err = mv88e6xxx_g2_int_source(chip, &amp;reg);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	for (n = 0; n &lt; 16; ++n) {</div><div class='add'>+		if (reg &amp; (1 &lt;&lt; n)) {</div><div class='add'>+			sub_irq = irq_find_mapping(chip-&gt;g2_irq.domain, n);</div><div class='add'>+			handle_nested_irq(sub_irq);</div><div class='add'>+			++nhandled;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+out:</div><div class='add'>+	return (nhandled &gt; 0 ? IRQ_HANDLED : IRQ_NONE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_g2_irq_bus_lock(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = irq_data_get_irq_chip_data(d);</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_g2_irq_bus_sync_unlock(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = irq_data_get_irq_chip_data(d);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_int_mask(chip, ~chip-&gt;g2_irq.masked);</div><div class='add'>+	if (err)</div><div class='add'>+		dev_err(chip-&gt;dev, "failed to mask interrupts\n");</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct irq_chip mv88e6xxx_g2_irq_chip = {</div><div class='add'>+	.name			= "mv88e6xxx-g2",</div><div class='add'>+	.irq_mask		= mv88e6xxx_g2_irq_mask,</div><div class='add'>+	.irq_unmask		= mv88e6xxx_g2_irq_unmask,</div><div class='add'>+	.irq_bus_lock		= mv88e6xxx_g2_irq_bus_lock,</div><div class='add'>+	.irq_bus_sync_unlock	= mv88e6xxx_g2_irq_bus_sync_unlock,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g2_irq_domain_map(struct irq_domain *d,</div><div class='add'>+				       unsigned int irq,</div><div class='add'>+				       irq_hw_number_t hwirq)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = d-&gt;host_data;</div><div class='add'>+</div><div class='add'>+	irq_set_chip_data(irq, d-&gt;host_data);</div><div class='add'>+	irq_set_chip_and_handler(irq, &amp;chip-&gt;g2_irq.chip, handle_level_irq);</div><div class='add'>+	irq_set_noprobe(irq);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct irq_domain_ops mv88e6xxx_g2_irq_domain_ops = {</div><div class='add'>+	.map	= mv88e6xxx_g2_irq_domain_map,</div><div class='add'>+	.xlate	= irq_domain_xlate_twocell,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void mv88e6xxx_g2_irq_free(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int irq, virq;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_g2_watchdog_free(chip);</div><div class='add'>+</div><div class='add'>+	free_irq(chip-&gt;device_irq, chip);</div><div class='add'>+	irq_dispose_mapping(chip-&gt;device_irq);</div><div class='add'>+</div><div class='add'>+	for (irq = 0; irq &lt; 16; irq++) {</div><div class='add'>+		virq = irq_find_mapping(chip-&gt;g2_irq.domain, irq);</div><div class='add'>+		irq_dispose_mapping(virq);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	irq_domain_remove(chip-&gt;g2_irq.domain);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g2_irq_setup(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int err, irq, virq;</div><div class='add'>+</div><div class='add'>+	chip-&gt;g2_irq.masked = ~0;</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	err = mv88e6xxx_g2_int_mask(chip, ~chip-&gt;g2_irq.masked);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	chip-&gt;g2_irq.domain = irq_domain_create_simple(dev_fwnode(chip-&gt;dev), 16, 0,</div><div class='add'>+						       &amp;mv88e6xxx_g2_irq_domain_ops, chip);</div><div class='add'>+	if (!chip-&gt;g2_irq.domain)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (irq = 0; irq &lt; 16; irq++)</div><div class='add'>+		irq_create_mapping(chip-&gt;g2_irq.domain, irq);</div><div class='add'>+</div><div class='add'>+	chip-&gt;g2_irq.chip = mv88e6xxx_g2_irq_chip;</div><div class='add'>+</div><div class='add'>+	chip-&gt;device_irq = irq_find_mapping(chip-&gt;g1_irq.domain,</div><div class='add'>+					    MV88E6XXX_G1_STS_IRQ_DEVICE);</div><div class='add'>+	if (chip-&gt;device_irq &lt; 0) {</div><div class='add'>+		err = chip-&gt;device_irq;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	snprintf(chip-&gt;device_irq_name, sizeof(chip-&gt;device_irq_name),</div><div class='add'>+		 "mv88e6xxx-%s-g2", dev_name(chip-&gt;dev));</div><div class='add'>+</div><div class='add'>+	err = request_threaded_irq(chip-&gt;device_irq, NULL,</div><div class='add'>+				   mv88e6xxx_g2_irq_thread_fn,</div><div class='add'>+				   IRQF_ONESHOT, chip-&gt;device_irq_name, chip);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_watchdog_setup(chip);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	for (irq = 0; irq &lt; 16; irq++) {</div><div class='add'>+		virq = irq_find_mapping(chip-&gt;g2_irq.domain, irq);</div><div class='add'>+		irq_dispose_mapping(virq);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	irq_domain_remove(chip-&gt;g2_irq.domain);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g2_irq_mdio_setup(struct mv88e6xxx_chip *chip,</div><div class='add'>+				struct mii_bus *bus)</div><div class='add'>+{</div><div class='add'>+	int phy_start = chip-&gt;info-&gt;internal_phys_offset;</div><div class='add'>+	int phy_end = chip-&gt;info-&gt;internal_phys_offset +</div><div class='add'>+		      chip-&gt;info-&gt;num_internal_phys;</div><div class='add'>+	int phy, irq;</div><div class='add'>+</div><div class='add'>+	for (phy = phy_start; phy &lt; phy_end; phy++) {</div><div class='add'>+		irq = irq_find_mapping(chip-&gt;g2_irq.domain, phy);</div><div class='add'>+		if (irq &lt; 0)</div><div class='add'>+			return irq;</div><div class='add'>+</div><div class='add'>+		bus-&gt;irq[chip-&gt;info-&gt;phy_base_addr + phy] = irq;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mv88e6xxx_g2_irq_mdio_free(struct mv88e6xxx_chip *chip,</div><div class='add'>+				struct mii_bus *bus)</div><div class='add'>+{</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/global2.h b/drivers/net/dsa/mv88e6xxx/global2.h<br/>new file mode 100644<br/>index 000000000000..82f9b410de0b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/global2.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/global2.h</a></div><div class='hunk'>@@ -0,0 +1,389 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+/*</div><div class='add'>+ * Marvell 88E6xxx Switch Global 2 Registers support</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2008 Marvell Semiconductor</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2016-2017 Savoir-faire Linux Inc.</div><div class='add'>+ *	Vivien Didelot &lt;vivien.didelot@savoirfairelinux.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _MV88E6XXX_GLOBAL2_H</div><div class='add'>+#define _MV88E6XXX_GLOBAL2_H</div><div class='add'>+</div><div class='add'>+#include "chip.h"</div><div class='add'>+</div><div class='add'>+/* Offset 0x00: Interrupt Source Register */</div><div class='add'>+#define MV88E6XXX_G2_INT_SRC			0x00</div><div class='add'>+#define MV88E6XXX_G2_INT_SRC_WDOG		0x8000</div><div class='add'>+#define MV88E6XXX_G2_INT_SRC_JAM_LIMIT		0x4000</div><div class='add'>+#define MV88E6XXX_G2_INT_SRC_DUPLEX_MISMATCH	0x2000</div><div class='add'>+#define MV88E6XXX_G2_INT_SRC_WAKE_EVENT		0x1000</div><div class='add'>+#define MV88E6352_G2_INT_SRC_SERDES		0x0800</div><div class='add'>+#define MV88E6352_G2_INT_SRC_PHY		0x001f</div><div class='add'>+#define MV88E6390_G2_INT_SRC_PHY		0x07fe</div><div class='add'>+</div><div class='add'>+#define MV88E6XXX_G2_INT_SOURCE_WATCHDOG	15</div><div class='add'>+</div><div class='add'>+/* Offset 0x01: Interrupt Mask Register */</div><div class='add'>+#define MV88E6XXX_G2_INT_MASK			0x01</div><div class='add'>+#define MV88E6XXX_G2_INT_MASK_WDOG		0x8000</div><div class='add'>+#define MV88E6XXX_G2_INT_MASK_JAM_LIMIT		0x4000</div><div class='add'>+#define MV88E6XXX_G2_INT_MASK_DUPLEX_MISMATCH	0x2000</div><div class='add'>+#define MV88E6XXX_G2_INT_MASK_WAKE_EVENT	0x1000</div><div class='add'>+#define MV88E6352_G2_INT_MASK_SERDES		0x0800</div><div class='add'>+#define MV88E6352_G2_INT_MASK_PHY		0x001f</div><div class='add'>+#define MV88E6390_G2_INT_MASK_PHY		0x07fe</div><div class='add'>+</div><div class='add'>+/* Offset 0x02: MGMT Enable Register 2x */</div><div class='add'>+#define MV88E6XXX_G2_MGMT_EN_2X		0x02</div><div class='add'>+</div><div class='add'>+/* Offset 0x02: MAC LINK change IRQ Register for MV88E6393X */</div><div class='add'>+#define MV88E6393X_G2_MACLINK_INT_SRC		0x02</div><div class='add'>+</div><div class='add'>+/* Offset 0x03: MGMT Enable Register 0x */</div><div class='add'>+#define MV88E6XXX_G2_MGMT_EN_0X		0x03</div><div class='add'>+</div><div class='add'>+/* Offset 0x03: MAC LINK change IRQ Mask Register for MV88E6393X */</div><div class='add'>+#define MV88E6393X_G2_MACLINK_INT_MASK		0x03</div><div class='add'>+</div><div class='add'>+/* Offset 0x04: Flow Control Delay Register */</div><div class='add'>+#define MV88E6XXX_G2_FLOW_CTL	0x04</div><div class='add'>+</div><div class='add'>+/* Offset 0x05: Switch Management Register */</div><div class='add'>+#define MV88E6XXX_G2_SWITCH_MGMT			0x05</div><div class='add'>+#define MV88E6XXX_G2_SWITCH_MGMT_USE_DOUBLE_TAG_DATA	0x8000</div><div class='add'>+#define MV88E6XXX_G2_SWITCH_MGMT_PREVENT_LOOPS		0x4000</div><div class='add'>+#define MV88E6XXX_G2_SWITCH_MGMT_FLOW_CTL_MSG		0x2000</div><div class='add'>+#define MV88E6XXX_G2_SWITCH_MGMT_FORCE_FLOW_CTL_PRI	0x0080</div><div class='add'>+#define MV88E6XXX_G2_SWITCH_MGMT_RSVD2CPU		0x0008</div><div class='add'>+</div><div class='add'>+#define MV88E6393X_G2_EGRESS_MONITOR_DEST		0x05</div><div class='add'>+</div><div class='add'>+/* Offset 0x06: Device Mapping Table Register */</div><div class='add'>+#define MV88E6XXX_G2_DEVICE_MAPPING		0x06</div><div class='add'>+#define MV88E6XXX_G2_DEVICE_MAPPING_UPDATE	0x8000</div><div class='add'>+#define MV88E6XXX_G2_DEVICE_MAPPING_DEV_MASK	0x1f00</div><div class='add'>+#define MV88E6352_G2_DEVICE_MAPPING_PORT_MASK	0x000f</div><div class='add'>+#define MV88E6390_G2_DEVICE_MAPPING_PORT_MASK	0x001f</div><div class='add'>+</div><div class='add'>+/* Offset 0x07: Trunk Mask Table Register */</div><div class='add'>+#define MV88E6XXX_G2_TRUNK_MASK			0x07</div><div class='add'>+#define MV88E6XXX_G2_TRUNK_MASK_UPDATE		0x8000</div><div class='add'>+#define MV88E6XXX_G2_TRUNK_MASK_NUM_MASK	0x7000</div><div class='add'>+#define MV88E6XXX_G2_TRUNK_MASK_HASH		0x0800</div><div class='add'>+</div><div class='add'>+/* Offset 0x08: Trunk Mapping Table Register */</div><div class='add'>+#define MV88E6XXX_G2_TRUNK_MAPPING		0x08</div><div class='add'>+#define MV88E6XXX_G2_TRUNK_MAPPING_UPDATE	0x8000</div><div class='add'>+#define MV88E6XXX_G2_TRUNK_MAPPING_ID_MASK	0x7800</div><div class='add'>+</div><div class='add'>+/* Offset 0x09: Ingress Rate Command Register */</div><div class='add'>+#define MV88E6XXX_G2_IRL_CMD			0x09</div><div class='add'>+#define MV88E6XXX_G2_IRL_CMD_BUSY		0x8000</div><div class='add'>+#define MV88E6352_G2_IRL_CMD_OP_MASK		0x7000</div><div class='add'>+#define MV88E6352_G2_IRL_CMD_OP_NOOP		0x0000</div><div class='add'>+#define MV88E6352_G2_IRL_CMD_OP_INIT_ALL	0x1000</div><div class='add'>+#define MV88E6352_G2_IRL_CMD_OP_INIT_RES	0x2000</div><div class='add'>+#define MV88E6352_G2_IRL_CMD_OP_WRITE_REG	0x3000</div><div class='add'>+#define MV88E6352_G2_IRL_CMD_OP_READ_REG	0x4000</div><div class='add'>+#define MV88E6390_G2_IRL_CMD_OP_MASK		0x6000</div><div class='add'>+#define MV88E6390_G2_IRL_CMD_OP_READ_REG	0x0000</div><div class='add'>+#define MV88E6390_G2_IRL_CMD_OP_INIT_ALL	0x2000</div><div class='add'>+#define MV88E6390_G2_IRL_CMD_OP_INIT_RES	0x4000</div><div class='add'>+#define MV88E6390_G2_IRL_CMD_OP_WRITE_REG	0x6000</div><div class='add'>+#define MV88E6352_G2_IRL_CMD_PORT_MASK		0x0f00</div><div class='add'>+#define MV88E6390_G2_IRL_CMD_PORT_MASK		0x1f00</div><div class='add'>+#define MV88E6XXX_G2_IRL_CMD_RES_MASK		0x00e0</div><div class='add'>+#define MV88E6XXX_G2_IRL_CMD_REG_MASK		0x000f</div><div class='add'>+</div><div class='add'>+/* Offset 0x0A: Ingress Rate Data Register */</div><div class='add'>+#define MV88E6XXX_G2_IRL_DATA		0x0a</div><div class='add'>+#define MV88E6XXX_G2_IRL_DATA_MASK	0xffff</div><div class='add'>+</div><div class='add'>+/* Offset 0x0B: Cross-chip Port VLAN Register */</div><div class='add'>+#define MV88E6XXX_G2_PVT_ADDR			0x0b</div><div class='add'>+#define MV88E6XXX_G2_PVT_ADDR_BUSY		0x8000</div><div class='add'>+#define MV88E6XXX_G2_PVT_ADDR_OP_MASK		0x7000</div><div class='add'>+#define MV88E6XXX_G2_PVT_ADDR_OP_INIT_ONES	0x1000</div><div class='add'>+#define MV88E6XXX_G2_PVT_ADDR_OP_WRITE_PVLAN	0x3000</div><div class='add'>+#define MV88E6XXX_G2_PVT_ADDR_OP_READ		0x4000</div><div class='add'>+#define MV88E6XXX_G2_PVT_ADDR_PTR_MASK		0x01ff</div><div class='add'>+#define MV88E6XXX_G2_PVT_ADDR_DEV_TRUNK		0x1f</div><div class='add'>+</div><div class='add'>+/* Offset 0x0C: Cross-chip Port VLAN Data Register */</div><div class='add'>+#define MV88E6XXX_G2_PVT_DATA		0x0c</div><div class='add'>+#define MV88E6XXX_G2_PVT_DATA_MASK	0x7f</div><div class='add'>+</div><div class='add'>+/* Offset 0x0D: Switch MAC/WoL/WoF Register */</div><div class='add'>+#define MV88E6XXX_G2_SWITCH_MAC			0x0d</div><div class='add'>+#define MV88E6XXX_G2_SWITCH_MAC_UPDATE		0x8000</div><div class='add'>+#define MV88E6XXX_G2_SWITCH_MAC_PTR_MASK	0x1f00</div><div class='add'>+#define MV88E6XXX_G2_SWITCH_MAC_DATA_MASK	0x00ff</div><div class='add'>+</div><div class='add'>+/* Offset 0x0E: ATU Stats Register */</div><div class='add'>+#define MV88E6XXX_G2_ATU_STATS				0x0e</div><div class='add'>+#define MV88E6XXX_G2_ATU_STATS_BIN_0			(0x0 &lt;&lt; 14)</div><div class='add'>+#define MV88E6XXX_G2_ATU_STATS_BIN_1			(0x1 &lt;&lt; 14)</div><div class='add'>+#define MV88E6XXX_G2_ATU_STATS_BIN_2			(0x2 &lt;&lt; 14)</div><div class='add'>+#define MV88E6XXX_G2_ATU_STATS_BIN_3			(0x3 &lt;&lt; 14)</div><div class='add'>+#define MV88E6XXX_G2_ATU_STATS_MODE_ALL			(0x0 &lt;&lt; 12)</div><div class='add'>+#define MV88E6XXX_G2_ATU_STATS_MODE_ALL_DYNAMIC		(0x1 &lt;&lt; 12)</div><div class='add'>+#define MV88E6XXX_G2_ATU_STATS_MODE_FID_ALL		(0x2 &lt;&lt; 12)</div><div class='add'>+#define MV88E6XXX_G2_ATU_STATS_MODE_FID_ALL_DYNAMIC	(0x3 &lt;&lt; 12)</div><div class='add'>+#define MV88E6XXX_G2_ATU_STATS_MASK			0x0fff</div><div class='add'>+</div><div class='add'>+/* Offset 0x0F: Priority Override Table */</div><div class='add'>+#define MV88E6XXX_G2_PRIO_OVERRIDE		0x0f</div><div class='add'>+#define MV88E6XXX_G2_PRIO_OVERRIDE_UPDATE	0x8000</div><div class='add'>+#define MV88E6XXX_G2_PRIO_OVERRIDE_FPRISET	0x1000</div><div class='add'>+#define MV88E6XXX_G2_PRIO_OVERRIDE_PTR_MASK	0x0f00</div><div class='add'>+#define MV88E6352_G2_PRIO_OVERRIDE_QPRIAVBEN	0x0080</div><div class='add'>+#define MV88E6352_G2_PRIO_OVERRIDE_DATAAVB_MASK	0x0030</div><div class='add'>+#define MV88E6XXX_G2_PRIO_OVERRIDE_QFPRIEN	0x0008</div><div class='add'>+#define MV88E6XXX_G2_PRIO_OVERRIDE_DATA_MASK	0x0007</div><div class='add'>+</div><div class='add'>+/* Offset 0x14: EEPROM Command */</div><div class='add'>+#define MV88E6XXX_G2_EEPROM_CMD			0x14</div><div class='add'>+#define MV88E6XXX_G2_EEPROM_CMD_BUSY		0x8000</div><div class='add'>+#define MV88E6XXX_G2_EEPROM_CMD_OP_MASK		0x7000</div><div class='add'>+#define MV88E6XXX_G2_EEPROM_CMD_OP_WRITE	0x3000</div><div class='add'>+#define MV88E6XXX_G2_EEPROM_CMD_OP_READ		0x4000</div><div class='add'>+#define MV88E6XXX_G2_EEPROM_CMD_OP_LOAD		0x6000</div><div class='add'>+#define MV88E6XXX_G2_EEPROM_CMD_RUNNING		0x0800</div><div class='add'>+#define MV88E6XXX_G2_EEPROM_CMD_WRITE_EN	0x0400</div><div class='add'>+#define MV88E6352_G2_EEPROM_CMD_ADDR_MASK	0x00ff</div><div class='add'>+#define MV88E6390_G2_EEPROM_CMD_DATA_MASK	0x00ff</div><div class='add'>+</div><div class='add'>+/* Offset 0x15: EEPROM Data */</div><div class='add'>+#define MV88E6352_G2_EEPROM_DATA	0x15</div><div class='add'>+#define MV88E6352_G2_EEPROM_DATA_MASK	0xffff</div><div class='add'>+</div><div class='add'>+/* Offset 0x15: EEPROM Addr */</div><div class='add'>+#define MV88E6390_G2_EEPROM_ADDR	0x15</div><div class='add'>+#define MV88E6390_G2_EEPROM_ADDR_MASK	0xffff</div><div class='add'>+</div><div class='add'>+/* Offset 0x16: AVB Command Register */</div><div class='add'>+#define MV88E6352_G2_AVB_CMD			0x16</div><div class='add'>+#define MV88E6352_G2_AVB_CMD_BUSY		0x8000</div><div class='add'>+#define MV88E6352_G2_AVB_CMD_OP_READ		0x4000</div><div class='add'>+#define MV88E6352_G2_AVB_CMD_OP_READ_INCR	0x6000</div><div class='add'>+#define MV88E6352_G2_AVB_CMD_OP_WRITE		0x3000</div><div class='add'>+#define MV88E6390_G2_AVB_CMD_OP_READ		0x0000</div><div class='add'>+#define MV88E6390_G2_AVB_CMD_OP_READ_INCR	0x4000</div><div class='add'>+#define MV88E6390_G2_AVB_CMD_OP_WRITE		0x6000</div><div class='add'>+#define MV88E6352_G2_AVB_CMD_PORT_MASK		0x0f00</div><div class='add'>+#define MV88E6352_G2_AVB_CMD_PORT_TAIGLOBAL	0xe</div><div class='add'>+#define MV88E6165_G2_AVB_CMD_PORT_PTPGLOBAL	0xf</div><div class='add'>+#define MV88E6352_G2_AVB_CMD_PORT_PTPGLOBAL	0xf</div><div class='add'>+#define MV88E6390_G2_AVB_CMD_PORT_MASK		0x1f00</div><div class='add'>+#define MV88E6390_G2_AVB_CMD_PORT_TAIGLOBAL	0x1e</div><div class='add'>+#define MV88E6390_G2_AVB_CMD_PORT_PTPGLOBAL	0x1f</div><div class='add'>+#define MV88E6352_G2_AVB_CMD_BLOCK_PTP		0</div><div class='add'>+#define MV88E6352_G2_AVB_CMD_BLOCK_AVB		1</div><div class='add'>+#define MV88E6352_G2_AVB_CMD_BLOCK_QAV		2</div><div class='add'>+#define MV88E6352_G2_AVB_CMD_BLOCK_QVB		3</div><div class='add'>+#define MV88E6352_G2_AVB_CMD_BLOCK_MASK		0x00e0</div><div class='add'>+#define MV88E6352_G2_AVB_CMD_ADDR_MASK		0x001f</div><div class='add'>+</div><div class='add'>+/* Offset 0x17: AVB Data Register */</div><div class='add'>+#define MV88E6352_G2_AVB_DATA		0x17</div><div class='add'>+</div><div class='add'>+/* Offset 0x18: SMI PHY Command Register */</div><div class='add'>+#define MV88E6XXX_G2_SMI_PHY_CMD			0x18</div><div class='add'>+#define MV88E6XXX_G2_SMI_PHY_CMD_BUSY			0x8000</div><div class='add'>+#define MV88E6390_G2_SMI_PHY_CMD_FUNC_MASK		0x6000</div><div class='add'>+#define MV88E6390_G2_SMI_PHY_CMD_FUNC_INTERNAL		0x0000</div><div class='add'>+#define MV88E6390_G2_SMI_PHY_CMD_FUNC_EXTERNAL		0x2000</div><div class='add'>+#define MV88E6390_G2_SMI_PHY_CMD_FUNC_SETUP		0x4000</div><div class='add'>+#define MV88E6XXX_G2_SMI_PHY_CMD_MODE_MASK		0x1000</div><div class='add'>+#define MV88E6XXX_G2_SMI_PHY_CMD_MODE_45		0x0000</div><div class='add'>+#define MV88E6XXX_G2_SMI_PHY_CMD_MODE_22		0x1000</div><div class='add'>+#define MV88E6XXX_G2_SMI_PHY_CMD_OP_MASK		0x0c00</div><div class='add'>+#define MV88E6XXX_G2_SMI_PHY_CMD_OP_22_WRITE_DATA	0x0400</div><div class='add'>+#define MV88E6XXX_G2_SMI_PHY_CMD_OP_22_READ_DATA	0x0800</div><div class='add'>+#define MV88E6XXX_G2_SMI_PHY_CMD_OP_45_WRITE_ADDR	0x0000</div><div class='add'>+#define MV88E6XXX_G2_SMI_PHY_CMD_OP_45_WRITE_DATA	0x0400</div><div class='add'>+#define MV88E6XXX_G2_SMI_PHY_CMD_OP_45_READ_DATA_INC	0x0800</div><div class='add'>+#define MV88E6XXX_G2_SMI_PHY_CMD_OP_45_READ_DATA	0x0c00</div><div class='add'>+#define MV88E6XXX_G2_SMI_PHY_CMD_DEV_ADDR_MASK		0x03e0</div><div class='add'>+#define MV88E6XXX_G2_SMI_PHY_CMD_REG_ADDR_MASK		0x001f</div><div class='add'>+#define MV88E6XXX_G2_SMI_PHY_CMD_SETUP_PTR_MASK		0x03ff</div><div class='add'>+</div><div class='add'>+/* Offset 0x19: SMI PHY Data Register */</div><div class='add'>+#define MV88E6XXX_G2_SMI_PHY_DATA	0x19</div><div class='add'>+</div><div class='add'>+/* Offset 0x1A: Scratch and Misc. Register */</div><div class='add'>+#define MV88E6XXX_G2_SCRATCH_MISC_MISC		0x1a</div><div class='add'>+#define MV88E6XXX_G2_SCRATCH_MISC_UPDATE	0x8000</div><div class='add'>+#define MV88E6XXX_G2_SCRATCH_MISC_PTR_MASK	0x7f00</div><div class='add'>+#define MV88E6XXX_G2_SCRATCH_MISC_DATA_MASK	0x00ff</div><div class='add'>+</div><div class='add'>+/* Offset 0x1B: Watch Dog Control Register */</div><div class='add'>+#define MV88E6250_G2_WDOG_CTL			0x1b</div><div class='add'>+#define MV88E6250_G2_WDOG_CTL_QC_HISTORY	0x0100</div><div class='add'>+#define MV88E6250_G2_WDOG_CTL_QC_EVENT		0x0080</div><div class='add'>+#define MV88E6250_G2_WDOG_CTL_QC_ENABLE		0x0040</div><div class='add'>+#define MV88E6250_G2_WDOG_CTL_EGRESS_HISTORY	0x0020</div><div class='add'>+#define MV88E6250_G2_WDOG_CTL_EGRESS_EVENT	0x0010</div><div class='add'>+#define MV88E6250_G2_WDOG_CTL_EGRESS_ENABLE	0x0008</div><div class='add'>+#define MV88E6250_G2_WDOG_CTL_FORCE_IRQ		0x0004</div><div class='add'>+#define MV88E6250_G2_WDOG_CTL_HISTORY		0x0002</div><div class='add'>+#define MV88E6250_G2_WDOG_CTL_SWRESET		0x0001</div><div class='add'>+</div><div class='add'>+/* Offset 0x1B: Watch Dog Control Register */</div><div class='add'>+#define MV88E6352_G2_WDOG_CTL			0x1b</div><div class='add'>+#define MV88E6352_G2_WDOG_CTL_EGRESS_EVENT	0x0080</div><div class='add'>+#define MV88E6352_G2_WDOG_CTL_RMU_TIMEOUT	0x0040</div><div class='add'>+#define MV88E6352_G2_WDOG_CTL_QC_ENABLE		0x0020</div><div class='add'>+#define MV88E6352_G2_WDOG_CTL_EGRESS_HISTORY	0x0010</div><div class='add'>+#define MV88E6352_G2_WDOG_CTL_EGRESS_ENABLE	0x0008</div><div class='add'>+#define MV88E6352_G2_WDOG_CTL_FORCE_IRQ		0x0004</div><div class='add'>+#define MV88E6352_G2_WDOG_CTL_HISTORY		0x0002</div><div class='add'>+#define MV88E6352_G2_WDOG_CTL_SWRESET		0x0001</div><div class='add'>+</div><div class='add'>+/* Offset 0x1B: Watch Dog Control Register */</div><div class='add'>+#define MV88E6390_G2_WDOG_CTL				0x1b</div><div class='add'>+#define MV88E6390_G2_WDOG_CTL_UPDATE			0x8000</div><div class='add'>+#define MV88E6390_G2_WDOG_CTL_PTR_MASK			0x7f00</div><div class='add'>+#define MV88E6390_G2_WDOG_CTL_PTR_INT_SOURCE		0x0000</div><div class='add'>+#define MV88E6390_G2_WDOG_CTL_PTR_INT_STS		0x1000</div><div class='add'>+#define MV88E6390_G2_WDOG_CTL_PTR_INT_ENABLE		0x1100</div><div class='add'>+#define MV88E6390_G2_WDOG_CTL_PTR_EVENT			0x1200</div><div class='add'>+#define MV88E6390_G2_WDOG_CTL_PTR_HISTORY		0x1300</div><div class='add'>+#define MV88E6390_G2_WDOG_CTL_DATA_MASK			0x00ff</div><div class='add'>+#define MV88E6390_G2_WDOG_CTL_CUT_THROUGH		0x0008</div><div class='add'>+#define MV88E6390_G2_WDOG_CTL_QUEUE_CONTROLLER		0x0004</div><div class='add'>+#define MV88E6390_G2_WDOG_CTL_EGRESS			0x0002</div><div class='add'>+#define MV88E6390_G2_WDOG_CTL_FORCE_IRQ			0x0001</div><div class='add'>+</div><div class='add'>+/* Offset 0x1C: QoS Weights Register */</div><div class='add'>+#define MV88E6XXX_G2_QOS_WEIGHTS		0x1c</div><div class='add'>+#define MV88E6XXX_G2_QOS_WEIGHTS_UPDATE		0x8000</div><div class='add'>+#define MV88E6352_G2_QOS_WEIGHTS_PTR_MASK	0x3f00</div><div class='add'>+#define MV88E6390_G2_QOS_WEIGHTS_PTR_MASK	0x7f00</div><div class='add'>+#define MV88E6XXX_G2_QOS_WEIGHTS_DATA_MASK	0x00ff</div><div class='add'>+</div><div class='add'>+/* Offset 0x1D: Misc Register */</div><div class='add'>+#define MV88E6XXX_G2_MISC		0x1d</div><div class='add'>+#define MV88E6XXX_G2_MISC_5_BIT_PORT	0x4000</div><div class='add'>+#define MV88E6352_G2_NOEGR_POLICY	0x2000</div><div class='add'>+#define MV88E6390_G2_LAG_ID_4		0x2000</div><div class='add'>+</div><div class='add'>+/* Scratch/Misc registers accessed through MV88E6XXX_G2_SCRATCH_MISC */</div><div class='add'>+/* Offset 0x02: Misc Configuration */</div><div class='add'>+#define MV88E6352_G2_SCRATCH_MISC_CFG		0x02</div><div class='add'>+#define MV88E6352_G2_SCRATCH_MISC_CFG_NORMALSMI	0x80</div><div class='add'>+/* Offset 0x60-0x61: GPIO Configuration */</div><div class='add'>+#define MV88E6352_G2_SCRATCH_GPIO_CFG0		0x60</div><div class='add'>+#define MV88E6352_G2_SCRATCH_GPIO_CFG1		0x61</div><div class='add'>+/* Offset 0x62-0x63: GPIO Direction */</div><div class='add'>+#define MV88E6352_G2_SCRATCH_GPIO_DIR0		0x62</div><div class='add'>+#define MV88E6352_G2_SCRATCH_GPIO_DIR1		0x63</div><div class='add'>+#define MV88E6352_G2_SCRATCH_GPIO_DIR_OUT	0</div><div class='add'>+#define MV88E6352_G2_SCRATCH_GPIO_DIR_IN	1</div><div class='add'>+/* Offset 0x64-0x65: GPIO Data */</div><div class='add'>+#define MV88E6352_G2_SCRATCH_GPIO_DATA0		0x64</div><div class='add'>+#define MV88E6352_G2_SCRATCH_GPIO_DATA1		0x65</div><div class='add'>+/* Offset 0x68-0x6F: GPIO Pin Control */</div><div class='add'>+#define MV88E6352_G2_SCRATCH_GPIO_PCTL0		0x68</div><div class='add'>+#define MV88E6352_G2_SCRATCH_GPIO_PCTL1		0x69</div><div class='add'>+#define MV88E6352_G2_SCRATCH_GPIO_PCTL2		0x6A</div><div class='add'>+#define MV88E6352_G2_SCRATCH_GPIO_PCTL3		0x6B</div><div class='add'>+#define MV88E6352_G2_SCRATCH_GPIO_PCTL4		0x6C</div><div class='add'>+#define MV88E6352_G2_SCRATCH_GPIO_PCTL5		0x6D</div><div class='add'>+#define MV88E6352_G2_SCRATCH_GPIO_PCTL6		0x6E</div><div class='add'>+#define MV88E6352_G2_SCRATCH_GPIO_PCTL7		0x6F</div><div class='add'>+#define MV88E6352_G2_SCRATCH_CONFIG_DATA0	0x70</div><div class='add'>+#define MV88E6352_G2_SCRATCH_CONFIG_DATA1	0x71</div><div class='add'>+#define MV88E6352_G2_SCRATCH_CONFIG_DATA1_NO_CPU	BIT(2)</div><div class='add'>+#define MV88E6352_G2_SCRATCH_CONFIG_DATA2	0x72</div><div class='add'>+#define MV88E6352_G2_SCRATCH_CONFIG_DATA2_P0_MODE_MASK	0xf</div><div class='add'>+#define MV88E6352_G2_SCRATCH_CONFIG_DATA3	0x73</div><div class='add'>+#define MV88E6352_G2_SCRATCH_CONFIG_DATA3_S_SEL		BIT(1)</div><div class='add'>+</div><div class='add'>+#define MV88E6352_G2_SCRATCH_GPIO_PCTL_GPIO	0</div><div class='add'>+#define MV88E6352_G2_SCRATCH_GPIO_PCTL_TRIG	1</div><div class='add'>+#define MV88E6352_G2_SCRATCH_GPIO_PCTL_EVREQ	2</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g2_read(struct mv88e6xxx_chip *chip, int reg, u16 *val);</div><div class='add'>+int mv88e6xxx_g2_write(struct mv88e6xxx_chip *chip, int reg, u16 val);</div><div class='add'>+int mv88e6xxx_g2_wait_bit(struct mv88e6xxx_chip *chip, int reg,</div><div class='add'>+			  int bit, int val);</div><div class='add'>+</div><div class='add'>+int mv88e6352_g2_irl_init_all(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+int mv88e6390_g2_irl_init_all(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g2_smi_phy_read_c22(struct mv88e6xxx_chip *chip,</div><div class='add'>+				  struct mii_bus *bus,</div><div class='add'>+				  int addr, int reg, u16 *val);</div><div class='add'>+int mv88e6xxx_g2_smi_phy_write_c22(struct mv88e6xxx_chip *chip,</div><div class='add'>+				   struct mii_bus *bus,</div><div class='add'>+				   int addr, int reg, u16 val);</div><div class='add'>+int mv88e6xxx_g2_smi_phy_read_c45(struct mv88e6xxx_chip *chip,</div><div class='add'>+				  struct mii_bus *bus,</div><div class='add'>+				  int addr, int devad, int reg, u16 *val);</div><div class='add'>+int mv88e6xxx_g2_smi_phy_write_c45(struct mv88e6xxx_chip *chip,</div><div class='add'>+				   struct mii_bus *bus,</div><div class='add'>+				   int addr, int devad, int reg, u16 val);</div><div class='add'>+int mv88e6xxx_g2_set_switch_mac(struct mv88e6xxx_chip *chip, u8 *addr);</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g2_get_eeprom8(struct mv88e6xxx_chip *chip,</div><div class='add'>+			     struct ethtool_eeprom *eeprom, u8 *data);</div><div class='add'>+int mv88e6xxx_g2_set_eeprom8(struct mv88e6xxx_chip *chip,</div><div class='add'>+			     struct ethtool_eeprom *eeprom, u8 *data);</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g2_get_eeprom16(struct mv88e6xxx_chip *chip,</div><div class='add'>+			      struct ethtool_eeprom *eeprom, u8 *data);</div><div class='add'>+int mv88e6xxx_g2_set_eeprom16(struct mv88e6xxx_chip *chip,</div><div class='add'>+			      struct ethtool_eeprom *eeprom, u8 *data);</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g2_pvt_read(struct mv88e6xxx_chip *chip, int src_dev,</div><div class='add'>+			  int src_port, u16 *data);</div><div class='add'>+int mv88e6xxx_g2_pvt_write(struct mv88e6xxx_chip *chip, int src_dev,</div><div class='add'>+			   int src_port, u16 data);</div><div class='add'>+int mv88e6xxx_g2_misc_4_bit_port(struct mv88e6xxx_chip *chip);</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g2_irq_setup(struct mv88e6xxx_chip *chip);</div><div class='add'>+void mv88e6xxx_g2_irq_free(struct mv88e6xxx_chip *chip);</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g2_irq_mdio_setup(struct mv88e6xxx_chip *chip,</div><div class='add'>+				struct mii_bus *bus);</div><div class='add'>+void mv88e6xxx_g2_irq_mdio_free(struct mv88e6xxx_chip *chip,</div><div class='add'>+				struct mii_bus *bus);</div><div class='add'>+</div><div class='add'>+int mv88e6185_g2_mgmt_rsvd2cpu(struct mv88e6xxx_chip *chip);</div><div class='add'>+int mv88e6352_g2_mgmt_rsvd2cpu(struct mv88e6xxx_chip *chip);</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g2_pot_clear(struct mv88e6xxx_chip *chip);</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g2_trunk_mask_write(struct mv88e6xxx_chip *chip, int num,</div><div class='add'>+				  bool hash, u16 mask);</div><div class='add'>+int mv88e6xxx_g2_trunk_mapping_write(struct mv88e6xxx_chip *chip, int id,</div><div class='add'>+				     u16 map);</div><div class='add'>+int mv88e6xxx_g2_trunk_clear(struct mv88e6xxx_chip *chip);</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_g2_device_mapping_write(struct mv88e6xxx_chip *chip, int target,</div><div class='add'>+				      int port);</div><div class='add'>+int mv88e6xxx_g2_eeprom_wait(struct mv88e6xxx_chip *chip);</div><div class='add'>+</div><div class='add'>+extern const struct mv88e6xxx_irq_ops mv88e6097_watchdog_ops;</div><div class='add'>+extern const struct mv88e6xxx_irq_ops mv88e6250_watchdog_ops;</div><div class='add'>+extern const struct mv88e6xxx_irq_ops mv88e6390_watchdog_ops;</div><div class='add'>+extern const struct mv88e6xxx_irq_ops mv88e6393x_watchdog_ops;</div><div class='add'>+</div><div class='add'>+extern const struct mv88e6xxx_avb_ops mv88e6165_avb_ops;</div><div class='add'>+extern const struct mv88e6xxx_avb_ops mv88e6352_avb_ops;</div><div class='add'>+extern const struct mv88e6xxx_avb_ops mv88e6390_avb_ops;</div><div class='add'>+</div><div class='add'>+extern const struct mv88e6xxx_gpio_ops mv88e6352_gpio_ops;</div><div class='add'>+</div><div class='add'>+int mv88e6390_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip,</div><div class='add'>+				      bool external);</div><div class='add'>+int mv88e6393x_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip,</div><div class='add'>+				       bool external);</div><div class='add'>+int mv88e6352_g2_scratch_port_has_serdes(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+int mv88e6xxx_g2_atu_stats_set(struct mv88e6xxx_chip *chip, u16 kind, u16 bin);</div><div class='add'>+int mv88e6xxx_g2_atu_stats_get(struct mv88e6xxx_chip *chip, u16 *stats);</div><div class='add'>+</div><div class='add'>+#endif /* _MV88E6XXX_GLOBAL2_H */</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/global2_avb.c b/drivers/net/dsa/mv88e6xxx/global2_avb.c<br/>new file mode 100644<br/>index 000000000000..657783e043ff<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/global2_avb.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/global2_avb.c</a></div><div class='hunk'>@@ -0,0 +1,239 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Marvell 88E6xxx Switch Global 2 Registers support</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2008 Marvell Semiconductor</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2016-2017 Savoir-faire Linux Inc.</div><div class='add'>+ *	Vivien Didelot &lt;vivien.didelot@savoirfairelinux.com&gt;</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2017 National Instruments</div><div class='add'>+ *	Brandon Streiff &lt;brandon.streiff@ni.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+</div><div class='add'>+#include "global2.h"</div><div class='add'>+</div><div class='add'>+/* Offset 0x16: AVB Command Register</div><div class='add'>+ * Offset 0x17: AVB Data Register</div><div class='add'>+ *</div><div class='add'>+ * There are two different versions of this register interface:</div><div class='add'>+ *    "6352": 3-bit "op" field, 4-bit "port" field.</div><div class='add'>+ *    "6390": 2-bit "op" field, 5-bit "port" field.</div><div class='add'>+ *</div><div class='add'>+ * The "op" codes are different between the two, as well as the special</div><div class='add'>+ * port fields for global PTP and TAI configuration.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* mv88e6xxx_g2_avb_read -- Read one or multiple 16-bit words.</div><div class='add'>+ * The hardware supports snapshotting up to four contiguous registers.</div><div class='add'>+ */</div><div class='add'>+static int mv88e6xxx_g2_avb_wait(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int bit = __bf_shf(MV88E6352_G2_AVB_CMD_BUSY);</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_wait_bit(chip, MV88E6352_G2_AVB_CMD, bit, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g2_avb_read(struct mv88e6xxx_chip *chip, u16 readop,</div><div class='add'>+				 u16 *data, int len)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_avb_wait(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Hardware can only snapshot four words. */</div><div class='add'>+	if (len &gt; 4)</div><div class='add'>+		return -E2BIG;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_write(chip, MV88E6352_G2_AVB_CMD,</div><div class='add'>+				 MV88E6352_G2_AVB_CMD_BUSY | readop);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_avb_wait(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; len; ++i) {</div><div class='add'>+		err = mv88e6xxx_g2_read(chip, MV88E6352_G2_AVB_DATA,</div><div class='add'>+					&amp;data[i]);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* mv88e6xxx_g2_avb_write -- Write one 16-bit word. */</div><div class='add'>+static int mv88e6xxx_g2_avb_write(struct mv88e6xxx_chip *chip, u16 writeop,</div><div class='add'>+				  u16 data)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_avb_wait(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_write(chip, MV88E6352_G2_AVB_DATA, data);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_write(chip, MV88E6352_G2_AVB_CMD,</div><div class='add'>+				 MV88E6352_G2_AVB_CMD_BUSY | writeop);</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_avb_wait(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6352_g2_avb_port_ptp_read(struct mv88e6xxx_chip *chip,</div><div class='add'>+					  int port, int addr, u16 *data,</div><div class='add'>+					  int len)</div><div class='add'>+{</div><div class='add'>+	u16 readop = (len == 1 ? MV88E6352_G2_AVB_CMD_OP_READ :</div><div class='add'>+				 MV88E6352_G2_AVB_CMD_OP_READ_INCR) |</div><div class='add'>+		     (port &lt;&lt; 8) | (MV88E6352_G2_AVB_CMD_BLOCK_PTP &lt;&lt; 5) |</div><div class='add'>+		     addr;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_avb_read(chip, readop, data, len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6352_g2_avb_port_ptp_write(struct mv88e6xxx_chip *chip,</div><div class='add'>+					   int port, int addr, u16 data)</div><div class='add'>+{</div><div class='add'>+	u16 writeop = MV88E6352_G2_AVB_CMD_OP_WRITE | (port &lt;&lt; 8) |</div><div class='add'>+		      (MV88E6352_G2_AVB_CMD_BLOCK_PTP &lt;&lt; 5) | addr;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_avb_write(chip, writeop, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6352_g2_avb_ptp_read(struct mv88e6xxx_chip *chip, int addr,</div><div class='add'>+				     u16 *data, int len)</div><div class='add'>+{</div><div class='add'>+	return mv88e6352_g2_avb_port_ptp_read(chip,</div><div class='add'>+					MV88E6352_G2_AVB_CMD_PORT_PTPGLOBAL,</div><div class='add'>+					addr, data, len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6352_g2_avb_ptp_write(struct mv88e6xxx_chip *chip, int addr,</div><div class='add'>+				      u16 data)</div><div class='add'>+{</div><div class='add'>+	return mv88e6352_g2_avb_port_ptp_write(chip,</div><div class='add'>+					MV88E6352_G2_AVB_CMD_PORT_PTPGLOBAL,</div><div class='add'>+					addr, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6352_g2_avb_tai_read(struct mv88e6xxx_chip *chip, int addr,</div><div class='add'>+				     u16 *data, int len)</div><div class='add'>+{</div><div class='add'>+	return mv88e6352_g2_avb_port_ptp_read(chip,</div><div class='add'>+					MV88E6352_G2_AVB_CMD_PORT_TAIGLOBAL,</div><div class='add'>+					addr, data, len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6352_g2_avb_tai_write(struct mv88e6xxx_chip *chip, int addr,</div><div class='add'>+				      u16 data)</div><div class='add'>+{</div><div class='add'>+	return mv88e6352_g2_avb_port_ptp_write(chip,</div><div class='add'>+					MV88E6352_G2_AVB_CMD_PORT_TAIGLOBAL,</div><div class='add'>+					addr, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct mv88e6xxx_avb_ops mv88e6352_avb_ops = {</div><div class='add'>+	.port_ptp_read		= mv88e6352_g2_avb_port_ptp_read,</div><div class='add'>+	.port_ptp_write		= mv88e6352_g2_avb_port_ptp_write,</div><div class='add'>+	.ptp_read		= mv88e6352_g2_avb_ptp_read,</div><div class='add'>+	.ptp_write		= mv88e6352_g2_avb_ptp_write,</div><div class='add'>+	.tai_read		= mv88e6352_g2_avb_tai_read,</div><div class='add'>+	.tai_write		= mv88e6352_g2_avb_tai_write,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int mv88e6165_g2_avb_tai_read(struct mv88e6xxx_chip *chip, int addr,</div><div class='add'>+				     u16 *data, int len)</div><div class='add'>+{</div><div class='add'>+	return mv88e6352_g2_avb_port_ptp_read(chip,</div><div class='add'>+					MV88E6165_G2_AVB_CMD_PORT_PTPGLOBAL,</div><div class='add'>+					addr, data, len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6165_g2_avb_tai_write(struct mv88e6xxx_chip *chip, int addr,</div><div class='add'>+				      u16 data)</div><div class='add'>+{</div><div class='add'>+	return mv88e6352_g2_avb_port_ptp_write(chip,</div><div class='add'>+					MV88E6165_G2_AVB_CMD_PORT_PTPGLOBAL,</div><div class='add'>+					addr, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct mv88e6xxx_avb_ops mv88e6165_avb_ops = {</div><div class='add'>+	.port_ptp_read		= mv88e6352_g2_avb_port_ptp_read,</div><div class='add'>+	.port_ptp_write		= mv88e6352_g2_avb_port_ptp_write,</div><div class='add'>+	.ptp_read		= mv88e6352_g2_avb_ptp_read,</div><div class='add'>+	.ptp_write		= mv88e6352_g2_avb_ptp_write,</div><div class='add'>+	.tai_read		= mv88e6165_g2_avb_tai_read,</div><div class='add'>+	.tai_write		= mv88e6165_g2_avb_tai_write,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int mv88e6390_g2_avb_port_ptp_read(struct mv88e6xxx_chip *chip,</div><div class='add'>+					  int port, int addr, u16 *data,</div><div class='add'>+					  int len)</div><div class='add'>+{</div><div class='add'>+	u16 readop = (len == 1 ? MV88E6390_G2_AVB_CMD_OP_READ :</div><div class='add'>+				 MV88E6390_G2_AVB_CMD_OP_READ_INCR) |</div><div class='add'>+		     (port &lt;&lt; 8) | (MV88E6352_G2_AVB_CMD_BLOCK_PTP &lt;&lt; 5) |</div><div class='add'>+		     addr;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_avb_read(chip, readop, data, len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6390_g2_avb_port_ptp_write(struct mv88e6xxx_chip *chip,</div><div class='add'>+					   int port, int addr, u16 data)</div><div class='add'>+{</div><div class='add'>+	u16 writeop = MV88E6390_G2_AVB_CMD_OP_WRITE | (port &lt;&lt; 8) |</div><div class='add'>+		      (MV88E6352_G2_AVB_CMD_BLOCK_PTP &lt;&lt; 5) | addr;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_avb_write(chip, writeop, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6390_g2_avb_ptp_read(struct mv88e6xxx_chip *chip, int addr,</div><div class='add'>+				     u16 *data, int len)</div><div class='add'>+{</div><div class='add'>+	return mv88e6390_g2_avb_port_ptp_read(chip,</div><div class='add'>+					MV88E6390_G2_AVB_CMD_PORT_PTPGLOBAL,</div><div class='add'>+					addr, data, len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6390_g2_avb_ptp_write(struct mv88e6xxx_chip *chip, int addr,</div><div class='add'>+				      u16 data)</div><div class='add'>+{</div><div class='add'>+	return mv88e6390_g2_avb_port_ptp_write(chip,</div><div class='add'>+					MV88E6390_G2_AVB_CMD_PORT_PTPGLOBAL,</div><div class='add'>+					addr, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6390_g2_avb_tai_read(struct mv88e6xxx_chip *chip, int addr,</div><div class='add'>+				     u16 *data, int len)</div><div class='add'>+{</div><div class='add'>+	return mv88e6390_g2_avb_port_ptp_read(chip,</div><div class='add'>+					MV88E6390_G2_AVB_CMD_PORT_TAIGLOBAL,</div><div class='add'>+					addr, data, len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6390_g2_avb_tai_write(struct mv88e6xxx_chip *chip, int addr,</div><div class='add'>+				      u16 data)</div><div class='add'>+{</div><div class='add'>+	return mv88e6390_g2_avb_port_ptp_write(chip,</div><div class='add'>+					MV88E6390_G2_AVB_CMD_PORT_TAIGLOBAL,</div><div class='add'>+					addr, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct mv88e6xxx_avb_ops mv88e6390_avb_ops = {</div><div class='add'>+	.port_ptp_read		= mv88e6390_g2_avb_port_ptp_read,</div><div class='add'>+	.port_ptp_write		= mv88e6390_g2_avb_port_ptp_write,</div><div class='add'>+	.ptp_read		= mv88e6390_g2_avb_ptp_read,</div><div class='add'>+	.ptp_write		= mv88e6390_g2_avb_ptp_write,</div><div class='add'>+	.tai_read		= mv88e6390_g2_avb_tai_read,</div><div class='add'>+	.tai_write		= mv88e6390_g2_avb_tai_write,</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/global2_scratch.c b/drivers/net/dsa/mv88e6xxx/global2_scratch.c<br/>new file mode 100644<br/>index 000000000000..53a6d3ed63b3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/global2_scratch.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/global2_scratch.c</a></div><div class='hunk'>@@ -0,0 +1,350 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Marvell 88E6xxx Switch Global 2 Scratch &amp; Misc Registers support</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2008 Marvell Semiconductor</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2017 National Instruments</div><div class='add'>+ *      Brandon Streiff &lt;brandon.streiff@ni.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "chip.h"</div><div class='add'>+#include "global2.h"</div><div class='add'>+</div><div class='add'>+/* Offset 0x1A: Scratch and Misc. Register */</div><div class='add'>+static int mv88e6xxx_g2_scratch_read(struct mv88e6xxx_chip *chip, int reg,</div><div class='add'>+				     u8 *data)</div><div class='add'>+{</div><div class='add'>+	u16 value;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_write(chip, MV88E6XXX_G2_SCRATCH_MISC_MISC,</div><div class='add'>+				 reg &lt;&lt; 8);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_read(chip, MV88E6XXX_G2_SCRATCH_MISC_MISC, &amp;value);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	*data = (value &amp; MV88E6XXX_G2_SCRATCH_MISC_DATA_MASK);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_g2_scratch_write(struct mv88e6xxx_chip *chip, int reg,</div><div class='add'>+				      u8 data)</div><div class='add'>+{</div><div class='add'>+	u16 value = (reg &lt;&lt; 8) | data;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_write(chip, MV88E6XXX_G2_SCRATCH_MISC_MISC,</div><div class='add'>+				  MV88E6XXX_G2_SCRATCH_MISC_UPDATE | value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mv88e6xxx_g2_scratch_get_bit - get a bit</div><div class='add'>+ * @chip: chip private data</div><div class='add'>+ * @base_reg: base of scratch bits</div><div class='add'>+ * @offset: index of bit within the register</div><div class='add'>+ * @set: is bit set?</div><div class='add'>+ */</div><div class='add'>+static int mv88e6xxx_g2_scratch_get_bit(struct mv88e6xxx_chip *chip,</div><div class='add'>+					int base_reg, unsigned int offset,</div><div class='add'>+					int *set)</div><div class='add'>+{</div><div class='add'>+	int reg = base_reg + (offset / 8);</div><div class='add'>+	u8 mask = (1 &lt;&lt; (offset &amp; 0x7));</div><div class='add'>+	u8 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_scratch_read(chip, reg, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	*set = !!(mask &amp; val);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mv88e6xxx_g2_scratch_set_bit - set (or clear) a bit</div><div class='add'>+ * @chip: chip private data</div><div class='add'>+ * @base_reg: base of scratch bits</div><div class='add'>+ * @offset: index of bit within the register</div><div class='add'>+ * @set: should this bit be set?</div><div class='add'>+ *</div><div class='add'>+ * Helper function for dealing with the direction and data registers.</div><div class='add'>+ */</div><div class='add'>+static int mv88e6xxx_g2_scratch_set_bit(struct mv88e6xxx_chip *chip,</div><div class='add'>+					int base_reg, unsigned int offset,</div><div class='add'>+					int set)</div><div class='add'>+{</div><div class='add'>+	int reg = base_reg + (offset / 8);</div><div class='add'>+	u8 mask = (1 &lt;&lt; (offset &amp; 0x7));</div><div class='add'>+	u8 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_scratch_read(chip, reg, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (set)</div><div class='add'>+		val |= mask;</div><div class='add'>+	else</div><div class='add'>+		val &amp;= ~mask;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_scratch_write(chip, reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mv88e6352_g2_scratch_gpio_get_data - get data on gpio pin</div><div class='add'>+ * @chip: chip private data</div><div class='add'>+ * @pin: gpio index</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 for low, 1 for high, negative error</div><div class='add'>+ */</div><div class='add'>+static int mv88e6352_g2_scratch_gpio_get_data(struct mv88e6xxx_chip *chip,</div><div class='add'>+					      unsigned int pin)</div><div class='add'>+{</div><div class='add'>+	int val = 0;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_scratch_get_bit(chip,</div><div class='add'>+					   MV88E6352_G2_SCRATCH_GPIO_DATA0,</div><div class='add'>+					   pin, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mv88e6352_g2_scratch_gpio_set_data - set data on gpio pin</div><div class='add'>+ * @chip: chip private data</div><div class='add'>+ * @pin: gpio index</div><div class='add'>+ * @value: value to set</div><div class='add'>+ */</div><div class='add'>+static int mv88e6352_g2_scratch_gpio_set_data(struct mv88e6xxx_chip *chip,</div><div class='add'>+					      unsigned int pin, int value)</div><div class='add'>+{</div><div class='add'>+	u8 mask = (1 &lt;&lt; (pin &amp; 0x7));</div><div class='add'>+	int offset = (pin / 8);</div><div class='add'>+	int reg;</div><div class='add'>+</div><div class='add'>+	reg = MV88E6352_G2_SCRATCH_GPIO_DATA0 + offset;</div><div class='add'>+</div><div class='add'>+	if (value)</div><div class='add'>+		chip-&gt;gpio_data[offset] |= mask;</div><div class='add'>+	else</div><div class='add'>+		chip-&gt;gpio_data[offset] &amp;= ~mask;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_scratch_write(chip, reg, chip-&gt;gpio_data[offset]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mv88e6352_g2_scratch_gpio_get_dir - get direction of gpio pin</div><div class='add'>+ * @chip: chip private data</div><div class='add'>+ * @pin: gpio index</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 for output, 1 for input.</div><div class='add'>+ */</div><div class='add'>+static int mv88e6352_g2_scratch_gpio_get_dir(struct mv88e6xxx_chip *chip,</div><div class='add'>+					     unsigned int pin)</div><div class='add'>+{</div><div class='add'>+	int val = 0;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_scratch_get_bit(chip,</div><div class='add'>+					   MV88E6352_G2_SCRATCH_GPIO_DIR0,</div><div class='add'>+					   pin, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mv88e6352_g2_scratch_gpio_set_dir - set direction of gpio pin</div><div class='add'>+ * @chip: chip private data</div><div class='add'>+ * @pin: gpio index</div><div class='add'>+ * @input: should the gpio be an input, or an output?</div><div class='add'>+ */</div><div class='add'>+static int mv88e6352_g2_scratch_gpio_set_dir(struct mv88e6xxx_chip *chip,</div><div class='add'>+					     unsigned int pin, bool input)</div><div class='add'>+{</div><div class='add'>+	int value = (input ? MV88E6352_G2_SCRATCH_GPIO_DIR_IN :</div><div class='add'>+			     MV88E6352_G2_SCRATCH_GPIO_DIR_OUT);</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_scratch_set_bit(chip,</div><div class='add'>+					    MV88E6352_G2_SCRATCH_GPIO_DIR0,</div><div class='add'>+					    pin, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mv88e6352_g2_scratch_gpio_get_pctl - get pin control setting</div><div class='add'>+ * @chip: chip private data</div><div class='add'>+ * @pin: gpio index</div><div class='add'>+ * @func: function number</div><div class='add'>+ *</div><div class='add'>+ * Note that the function numbers themselves may vary by chipset.</div><div class='add'>+ */</div><div class='add'>+static int mv88e6352_g2_scratch_gpio_get_pctl(struct mv88e6xxx_chip *chip,</div><div class='add'>+					      unsigned int pin, int *func)</div><div class='add'>+{</div><div class='add'>+	int reg = MV88E6352_G2_SCRATCH_GPIO_PCTL0 + (pin / 2);</div><div class='add'>+	int offset = (pin &amp; 0x1) ? 4 : 0;</div><div class='add'>+	u8 mask = (0x7 &lt;&lt; offset);</div><div class='add'>+	int err;</div><div class='add'>+	u8 val;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_scratch_read(chip, reg, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	*func = (val &amp; mask) &gt;&gt; offset;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mv88e6352_g2_scratch_gpio_set_pctl - set pin control setting</div><div class='add'>+ * @chip: chip private data</div><div class='add'>+ * @pin: gpio index</div><div class='add'>+ * @func: function number</div><div class='add'>+ */</div><div class='add'>+static int mv88e6352_g2_scratch_gpio_set_pctl(struct mv88e6xxx_chip *chip,</div><div class='add'>+					      unsigned int pin, int func)</div><div class='add'>+{</div><div class='add'>+	int reg = MV88E6352_G2_SCRATCH_GPIO_PCTL0 + (pin / 2);</div><div class='add'>+	int offset = (pin &amp; 0x1) ? 4 : 0;</div><div class='add'>+	u8 mask = (0x7 &lt;&lt; offset);</div><div class='add'>+	int err;</div><div class='add'>+	u8 val;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_scratch_read(chip, reg, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	val = (val &amp; ~mask) | ((func &amp; mask) &lt;&lt; offset);</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_scratch_write(chip, reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct mv88e6xxx_gpio_ops mv88e6352_gpio_ops = {</div><div class='add'>+	.get_data = mv88e6352_g2_scratch_gpio_get_data,</div><div class='add'>+	.set_data = mv88e6352_g2_scratch_gpio_set_data,</div><div class='add'>+	.get_dir = mv88e6352_g2_scratch_gpio_get_dir,</div><div class='add'>+	.set_dir = mv88e6352_g2_scratch_gpio_set_dir,</div><div class='add'>+	.get_pctl = mv88e6352_g2_scratch_gpio_get_pctl,</div><div class='add'>+	.set_pctl = mv88e6352_g2_scratch_gpio_set_pctl,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mv88e6390_g2_scratch_gpio_set_smi - set gpio muxing for external smi</div><div class='add'>+ * @chip: chip private data</div><div class='add'>+ * @external: set mux for external smi, or free for gpio usage</div><div class='add'>+ *</div><div class='add'>+ * Some mv88e6xxx models have GPIO pins that may be configured as</div><div class='add'>+ * an external SMI interface, or they may be made free for other</div><div class='add'>+ * GPIO uses.</div><div class='add'>+ */</div><div class='add'>+int mv88e6390_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip,</div><div class='add'>+				      bool external)</div><div class='add'>+{</div><div class='add'>+	int misc_cfg = MV88E6352_G2_SCRATCH_MISC_CFG;</div><div class='add'>+	int config_data1 = MV88E6352_G2_SCRATCH_CONFIG_DATA1;</div><div class='add'>+	int config_data2 = MV88E6352_G2_SCRATCH_CONFIG_DATA2;</div><div class='add'>+	bool no_cpu;</div><div class='add'>+	u8 p0_mode;</div><div class='add'>+	int err;</div><div class='add'>+	u8 val;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_scratch_read(chip, config_data2, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	p0_mode = val &amp; MV88E6352_G2_SCRATCH_CONFIG_DATA2_P0_MODE_MASK;</div><div class='add'>+</div><div class='add'>+	if (p0_mode == 0x01 || p0_mode == 0x02)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_scratch_read(chip, config_data1, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	no_cpu = !!(val &amp; MV88E6352_G2_SCRATCH_CONFIG_DATA1_NO_CPU);</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_scratch_read(chip, misc_cfg, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* NO_CPU being 0 inverts the meaning of the bit */</div><div class='add'>+	if (!no_cpu)</div><div class='add'>+		external = !external;</div><div class='add'>+</div><div class='add'>+	if (external)</div><div class='add'>+		val |= MV88E6352_G2_SCRATCH_MISC_CFG_NORMALSMI;</div><div class='add'>+	else</div><div class='add'>+		val &amp;= ~MV88E6352_G2_SCRATCH_MISC_CFG_NORMALSMI;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_scratch_write(chip, misc_cfg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mv88e6393x_g2_scratch_gpio_set_smi - set gpio muxing for external smi</div><div class='add'>+ * @chip: chip private data</div><div class='add'>+ * @external: set mux for external smi, or free for gpio usage</div><div class='add'>+ *</div><div class='add'>+ * MV88E6191X/6193X/6393X GPIO pins 9 and 10 can be configured as an</div><div class='add'>+ * external SMI interface or as regular GPIO-s.</div><div class='add'>+ *</div><div class='add'>+ * They however have a different register layout then the existing</div><div class='add'>+ * function.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+int mv88e6393x_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip,</div><div class='add'>+				       bool external)</div><div class='add'>+{</div><div class='add'>+	int misc_cfg = MV88E6352_G2_SCRATCH_MISC_CFG;</div><div class='add'>+	int err;</div><div class='add'>+	u8 val;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_scratch_read(chip, misc_cfg, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (external)</div><div class='add'>+		val &amp;= ~MV88E6352_G2_SCRATCH_MISC_CFG_NORMALSMI;</div><div class='add'>+	else</div><div class='add'>+		val |= MV88E6352_G2_SCRATCH_MISC_CFG_NORMALSMI;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_g2_scratch_write(chip, misc_cfg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * mv88e6352_g2_scratch_port_has_serdes - indicate if a port can have a serdes</div><div class='add'>+ * @chip: chip private data</div><div class='add'>+ * @port: port number to check for serdes</div><div class='add'>+ *</div><div class='add'>+ * Indicates whether the port may have a serdes attached according to the</div><div class='add'>+ * pin strapping. Returns negative error number, 0 if the port is not</div><div class='add'>+ * configured to have a serdes, and 1 if the port is configured to have a</div><div class='add'>+ * serdes attached.</div><div class='add'>+ */</div><div class='add'>+int mv88e6352_g2_scratch_port_has_serdes(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	u8 config3, p;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_g2_scratch_read(chip, MV88E6352_G2_SCRATCH_CONFIG_DATA3,</div><div class='add'>+					&amp;config3);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (config3 &amp; MV88E6352_G2_SCRATCH_CONFIG_DATA3_S_SEL)</div><div class='add'>+		p = 5;</div><div class='add'>+	else</div><div class='add'>+		p = 4;</div><div class='add'>+</div><div class='add'>+	return port == p;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/hwtstamp.c b/drivers/net/dsa/mv88e6xxx/hwtstamp.c<br/>new file mode 100644<br/>index 000000000000..6e6472a3b75a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/hwtstamp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/hwtstamp.c</a></div><div class='hunk'>@@ -0,0 +1,611 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Marvell 88E6xxx Switch hardware timestamping support</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2008 Marvell Semiconductor</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2017 National Instruments</div><div class='add'>+ *      Erik Hons &lt;erik.hons@ni.com&gt;</div><div class='add'>+ *      Brandon Streiff &lt;brandon.streiff@ni.com&gt;</div><div class='add'>+ *      Dane Wagner &lt;dane.wagner@ni.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "chip.h"</div><div class='add'>+#include "global2.h"</div><div class='add'>+#include "hwtstamp.h"</div><div class='add'>+#include "ptp.h"</div><div class='add'>+#include &lt;linux/ptp_classify.h&gt;</div><div class='add'>+</div><div class='add'>+#define SKB_PTP_TYPE(__skb) (*(unsigned int *)((__skb)-&gt;cb))</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_ptp_read(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				   int addr, u16 *data, int len)</div><div class='add'>+{</div><div class='add'>+	if (!chip-&gt;info-&gt;ops-&gt;avb_ops-&gt;port_ptp_read)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return chip-&gt;info-&gt;ops-&gt;avb_ops-&gt;port_ptp_read(chip, port, addr,</div><div class='add'>+						       data, len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_ptp_write(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				    int addr, u16 data)</div><div class='add'>+{</div><div class='add'>+	if (!chip-&gt;info-&gt;ops-&gt;avb_ops-&gt;port_ptp_write)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return chip-&gt;info-&gt;ops-&gt;avb_ops-&gt;port_ptp_write(chip, port, addr,</div><div class='add'>+							data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_ptp_write(struct mv88e6xxx_chip *chip, int addr,</div><div class='add'>+			       u16 data)</div><div class='add'>+{</div><div class='add'>+	if (!chip-&gt;info-&gt;ops-&gt;avb_ops-&gt;ptp_write)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return chip-&gt;info-&gt;ops-&gt;avb_ops-&gt;ptp_write(chip, addr, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_ptp_read(struct mv88e6xxx_chip *chip, int addr,</div><div class='add'>+			      u16 *data)</div><div class='add'>+{</div><div class='add'>+	if (!chip-&gt;info-&gt;ops-&gt;avb_ops-&gt;ptp_read)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return chip-&gt;info-&gt;ops-&gt;avb_ops-&gt;ptp_read(chip, addr, data, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* TX_TSTAMP_TIMEOUT: This limits the time spent polling for a TX</div><div class='add'>+ * timestamp. When working properly, hardware will produce a timestamp</div><div class='add'>+ * within 1ms. Software may enounter delays due to MDIO contention, so</div><div class='add'>+ * the timeout is set accordingly.</div><div class='add'>+ */</div><div class='add'>+#define TX_TSTAMP_TIMEOUT	msecs_to_jiffies(40)</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_get_ts_info(struct dsa_switch *ds, int port,</div><div class='add'>+			  struct kernel_ethtool_ts_info *info)</div><div class='add'>+{</div><div class='add'>+	const struct mv88e6xxx_ptp_ops *ptp_ops;</div><div class='add'>+	struct mv88e6xxx_chip *chip;</div><div class='add'>+</div><div class='add'>+	chip = ds-&gt;priv;</div><div class='add'>+	ptp_ops = chip-&gt;info-&gt;ops-&gt;ptp_ops;</div><div class='add'>+</div><div class='add'>+	if (!chip-&gt;info-&gt;ptp_support)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	info-&gt;so_timestamping =</div><div class='add'>+		SOF_TIMESTAMPING_TX_HARDWARE |</div><div class='add'>+		SOF_TIMESTAMPING_RX_HARDWARE |</div><div class='add'>+		SOF_TIMESTAMPING_RAW_HARDWARE;</div><div class='add'>+	info-&gt;phc_index = ptp_clock_index(chip-&gt;ptp_clock);</div><div class='add'>+	info-&gt;tx_types =</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_TX_OFF) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_TX_ON);</div><div class='add'>+	info-&gt;rx_filters = ptp_ops-&gt;rx_filters;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_set_hwtstamp_config(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+					 struct kernel_hwtstamp_config *config)</div><div class='add'>+{</div><div class='add'>+	const struct mv88e6xxx_ptp_ops *ptp_ops = chip-&gt;info-&gt;ops-&gt;ptp_ops;</div><div class='add'>+	struct mv88e6xxx_port_hwtstamp *ps = &amp;chip-&gt;port_hwtstamp[port];</div><div class='add'>+	bool tstamp_enable = false;</div><div class='add'>+</div><div class='add'>+	/* Prevent the TX/RX paths from trying to interact with the</div><div class='add'>+	 * timestamp hardware while we reconfigure it.</div><div class='add'>+	 */</div><div class='add'>+	clear_bit_unlock(MV88E6XXX_HWTSTAMP_ENABLED, &amp;ps-&gt;state);</div><div class='add'>+</div><div class='add'>+	switch (config-&gt;tx_type) {</div><div class='add'>+	case HWTSTAMP_TX_OFF:</div><div class='add'>+		tstamp_enable = false;</div><div class='add'>+		break;</div><div class='add'>+	case HWTSTAMP_TX_ON:</div><div class='add'>+		tstamp_enable = true;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* The switch supports timestamping both L2 and L4; one cannot be</div><div class='add'>+	 * disabled independently of the other.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	if (!(BIT(config-&gt;rx_filter) &amp; ptp_ops-&gt;rx_filters)) {</div><div class='add'>+		config-&gt;rx_filter = HWTSTAMP_FILTER_NONE;</div><div class='add'>+		dev_dbg(chip-&gt;dev, "Unsupported rx_filter %d\n",</div><div class='add'>+			config-&gt;rx_filter);</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (config-&gt;rx_filter) {</div><div class='add'>+	case HWTSTAMP_FILTER_NONE:</div><div class='add'>+		tstamp_enable = false;</div><div class='add'>+		break;</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_EVENT:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_SYNC:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:</div><div class='add'>+		config-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;</div><div class='add'>+		break;</div><div class='add'>+	case HWTSTAMP_FILTER_ALL:</div><div class='add'>+	default:</div><div class='add'>+		config-&gt;rx_filter = HWTSTAMP_FILTER_NONE;</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	if (tstamp_enable) {</div><div class='add'>+		chip-&gt;enable_count += 1;</div><div class='add'>+		if (chip-&gt;enable_count == 1 &amp;&amp; ptp_ops-&gt;global_enable)</div><div class='add'>+			ptp_ops-&gt;global_enable(chip);</div><div class='add'>+		if (ptp_ops-&gt;port_enable)</div><div class='add'>+			ptp_ops-&gt;port_enable(chip, port);</div><div class='add'>+	} else {</div><div class='add'>+		if (ptp_ops-&gt;port_disable)</div><div class='add'>+			ptp_ops-&gt;port_disable(chip, port);</div><div class='add'>+		chip-&gt;enable_count -= 1;</div><div class='add'>+		if (chip-&gt;enable_count == 0 &amp;&amp; ptp_ops-&gt;global_disable)</div><div class='add'>+			ptp_ops-&gt;global_disable(chip);</div><div class='add'>+	}</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	/* Once hardware has been configured, enable timestamp checks</div><div class='add'>+	 * in the RX/TX paths.</div><div class='add'>+	 */</div><div class='add'>+	if (tstamp_enable)</div><div class='add'>+		set_bit(MV88E6XXX_HWTSTAMP_ENABLED, &amp;ps-&gt;state);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_hwtstamp_set(struct dsa_switch *ds, int port,</div><div class='add'>+				struct kernel_hwtstamp_config *config,</div><div class='add'>+				struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	struct mv88e6xxx_port_hwtstamp *ps = &amp;chip-&gt;port_hwtstamp[port];</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!chip-&gt;info-&gt;ptp_support)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_set_hwtstamp_config(chip, port, config);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Save the chosen configuration to be returned later. */</div><div class='add'>+	ps-&gt;tstamp_config = *config;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_hwtstamp_get(struct dsa_switch *ds, int port,</div><div class='add'>+				struct kernel_hwtstamp_config *config)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	struct mv88e6xxx_port_hwtstamp *ps = &amp;chip-&gt;port_hwtstamp[port];</div><div class='add'>+</div><div class='add'>+	if (!chip-&gt;info-&gt;ptp_support)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	*config = ps-&gt;tstamp_config;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Returns a pointer to the PTP header if the caller should time stamp,</div><div class='add'>+ * or NULL if the caller should not.</div><div class='add'>+ */</div><div class='add'>+static struct ptp_header *mv88e6xxx_should_tstamp(struct mv88e6xxx_chip *chip,</div><div class='add'>+						  int port, struct sk_buff *skb,</div><div class='add'>+						  unsigned int type)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_port_hwtstamp *ps = &amp;chip-&gt;port_hwtstamp[port];</div><div class='add'>+	struct ptp_header *hdr;</div><div class='add'>+</div><div class='add'>+	if (!chip-&gt;info-&gt;ptp_support)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	hdr = ptp_parse_header(skb, type);</div><div class='add'>+	if (!hdr)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(MV88E6XXX_HWTSTAMP_ENABLED, &amp;ps-&gt;state))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	return hdr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_ts_valid(u16 status)</div><div class='add'>+{</div><div class='add'>+	if (!(status &amp; MV88E6XXX_PTP_TS_VALID))</div><div class='add'>+		return 0;</div><div class='add'>+	if (status &amp; MV88E6XXX_PTP_TS_STATUS_MASK)</div><div class='add'>+		return 0;</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int seq_match(struct sk_buff *skb, u16 ts_seqid)</div><div class='add'>+{</div><div class='add'>+	unsigned int type = SKB_PTP_TYPE(skb);</div><div class='add'>+	struct ptp_header *hdr;</div><div class='add'>+</div><div class='add'>+	hdr = ptp_parse_header(skb, type);</div><div class='add'>+</div><div class='add'>+	return ts_seqid == ntohs(hdr-&gt;sequence_id);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_get_rxts(struct mv88e6xxx_chip *chip,</div><div class='add'>+			       struct mv88e6xxx_port_hwtstamp *ps,</div><div class='add'>+			       struct sk_buff *skb, u16 reg,</div><div class='add'>+			       struct sk_buff_head *rxq)</div><div class='add'>+{</div><div class='add'>+	u16 buf[4] = { 0 }, status, seq_id;</div><div class='add'>+	struct skb_shared_hwtstamps *shwt;</div><div class='add'>+	struct sk_buff_head received;</div><div class='add'>+	u64 ns, timelo, timehi;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* The latched timestamp belongs to one of the received frames. */</div><div class='add'>+	__skb_queue_head_init(&amp;received);</div><div class='add'>+	spin_lock_irqsave(&amp;rxq-&gt;lock, flags);</div><div class='add'>+	skb_queue_splice_tail_init(rxq, &amp;received);</div><div class='add'>+	spin_unlock_irqrestore(&amp;rxq-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	err = mv88e6xxx_port_ptp_read(chip, ps-&gt;port_id,</div><div class='add'>+				      reg, buf, ARRAY_SIZE(buf));</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		pr_err("failed to get the receive time stamp\n");</div><div class='add'>+</div><div class='add'>+	status = buf[0];</div><div class='add'>+	timelo = buf[1];</div><div class='add'>+	timehi = buf[2];</div><div class='add'>+	seq_id = buf[3];</div><div class='add'>+</div><div class='add'>+	if (status &amp; MV88E6XXX_PTP_TS_VALID) {</div><div class='add'>+		mv88e6xxx_reg_lock(chip);</div><div class='add'>+		err = mv88e6xxx_port_ptp_write(chip, ps-&gt;port_id, reg, 0);</div><div class='add'>+		mv88e6xxx_reg_unlock(chip);</div><div class='add'>+		if (err)</div><div class='add'>+			pr_err("failed to clear the receive status\n");</div><div class='add'>+	}</div><div class='add'>+	/* Since the device can only handle one time stamp at a time,</div><div class='add'>+	 * we purge any extra frames from the queue.</div><div class='add'>+	 */</div><div class='add'>+	for ( ; skb; skb = __skb_dequeue(&amp;received)) {</div><div class='add'>+		if (mv88e6xxx_ts_valid(status) &amp;&amp; seq_match(skb, seq_id)) {</div><div class='add'>+			ns = timehi &lt;&lt; 16 | timelo;</div><div class='add'>+</div><div class='add'>+			mv88e6xxx_reg_lock(chip);</div><div class='add'>+			ns = timecounter_cyc2time(&amp;chip-&gt;tstamp_tc, ns);</div><div class='add'>+			mv88e6xxx_reg_unlock(chip);</div><div class='add'>+			shwt = skb_hwtstamps(skb);</div><div class='add'>+			memset(shwt, 0, sizeof(*shwt));</div><div class='add'>+			shwt-&gt;hwtstamp = ns_to_ktime(ns);</div><div class='add'>+			status &amp;= ~MV88E6XXX_PTP_TS_VALID;</div><div class='add'>+		}</div><div class='add'>+		netif_rx(skb);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_rxtstamp_work(struct mv88e6xxx_chip *chip,</div><div class='add'>+				    struct mv88e6xxx_port_hwtstamp *ps)</div><div class='add'>+{</div><div class='add'>+	const struct mv88e6xxx_ptp_ops *ptp_ops = chip-&gt;info-&gt;ops-&gt;ptp_ops;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	skb = skb_dequeue(&amp;ps-&gt;rx_queue);</div><div class='add'>+</div><div class='add'>+	if (skb)</div><div class='add'>+		mv88e6xxx_get_rxts(chip, ps, skb, ptp_ops-&gt;arr0_sts_reg,</div><div class='add'>+				   &amp;ps-&gt;rx_queue);</div><div class='add'>+</div><div class='add'>+	skb = skb_dequeue(&amp;ps-&gt;rx_queue2);</div><div class='add'>+	if (skb)</div><div class='add'>+		mv88e6xxx_get_rxts(chip, ps, skb, ptp_ops-&gt;arr1_sts_reg,</div><div class='add'>+				   &amp;ps-&gt;rx_queue2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int is_pdelay_resp(const struct ptp_header *hdr)</div><div class='add'>+{</div><div class='add'>+	return (hdr-&gt;tsmt &amp; 0xf) == 3;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool mv88e6xxx_port_rxtstamp(struct dsa_switch *ds, int port,</div><div class='add'>+			     struct sk_buff *skb, unsigned int type)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_port_hwtstamp *ps;</div><div class='add'>+	struct mv88e6xxx_chip *chip;</div><div class='add'>+	struct ptp_header *hdr;</div><div class='add'>+</div><div class='add'>+	chip = ds-&gt;priv;</div><div class='add'>+	ps = &amp;chip-&gt;port_hwtstamp[port];</div><div class='add'>+</div><div class='add'>+	if (ps-&gt;tstamp_config.rx_filter != HWTSTAMP_FILTER_PTP_V2_EVENT)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	hdr = mv88e6xxx_should_tstamp(chip, port, skb, type);</div><div class='add'>+	if (!hdr)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	SKB_PTP_TYPE(skb) = type;</div><div class='add'>+</div><div class='add'>+	if (is_pdelay_resp(hdr))</div><div class='add'>+		skb_queue_tail(&amp;ps-&gt;rx_queue2, skb);</div><div class='add'>+	else</div><div class='add'>+		skb_queue_tail(&amp;ps-&gt;rx_queue, skb);</div><div class='add'>+</div><div class='add'>+	ptp_schedule_worker(chip-&gt;ptp_clock, 0);</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_txtstamp_work(struct mv88e6xxx_chip *chip,</div><div class='add'>+				   struct mv88e6xxx_port_hwtstamp *ps)</div><div class='add'>+{</div><div class='add'>+	const struct mv88e6xxx_ptp_ops *ptp_ops = chip-&gt;info-&gt;ops-&gt;ptp_ops;</div><div class='add'>+	struct skb_shared_hwtstamps shhwtstamps;</div><div class='add'>+	u16 departure_block[4], status;</div><div class='add'>+	struct sk_buff *tmp_skb;</div><div class='add'>+	u32 time_raw;</div><div class='add'>+	int err;</div><div class='add'>+	u64 ns;</div><div class='add'>+</div><div class='add'>+	if (!ps-&gt;tx_skb)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	err = mv88e6xxx_port_ptp_read(chip, ps-&gt;port_id,</div><div class='add'>+				      ptp_ops-&gt;dep_sts_reg,</div><div class='add'>+				      departure_block,</div><div class='add'>+				      ARRAY_SIZE(departure_block));</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_and_clear_skb;</div><div class='add'>+</div><div class='add'>+	if (!(departure_block[0] &amp; MV88E6XXX_PTP_TS_VALID)) {</div><div class='add'>+		if (time_is_before_jiffies(ps-&gt;tx_tstamp_start +</div><div class='add'>+					   TX_TSTAMP_TIMEOUT)) {</div><div class='add'>+			dev_warn(chip-&gt;dev, "p%d: clearing tx timestamp hang\n",</div><div class='add'>+				 ps-&gt;port_id);</div><div class='add'>+			goto free_and_clear_skb;</div><div class='add'>+		}</div><div class='add'>+		/* The timestamp should be available quickly, while getting it</div><div class='add'>+		 * is high priority and time bounded to only 10ms. A poll is</div><div class='add'>+		 * warranted so restart the work.</div><div class='add'>+		 */</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* We have the timestamp; go ahead and clear valid now */</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	mv88e6xxx_port_ptp_write(chip, ps-&gt;port_id, ptp_ops-&gt;dep_sts_reg, 0);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	status = departure_block[0] &amp; MV88E6XXX_PTP_TS_STATUS_MASK;</div><div class='add'>+	if (status != MV88E6XXX_PTP_TS_STATUS_NORMAL) {</div><div class='add'>+		dev_warn(chip-&gt;dev, "p%d: tx timestamp overrun\n", ps-&gt;port_id);</div><div class='add'>+		goto free_and_clear_skb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (departure_block[3] != ps-&gt;tx_seq_id) {</div><div class='add'>+		dev_warn(chip-&gt;dev, "p%d: unexpected seq. id\n", ps-&gt;port_id);</div><div class='add'>+		goto free_and_clear_skb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memset(&amp;shhwtstamps, 0, sizeof(shhwtstamps));</div><div class='add'>+	time_raw = ((u32)departure_block[2] &lt;&lt; 16) | departure_block[1];</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	ns = timecounter_cyc2time(&amp;chip-&gt;tstamp_tc, time_raw);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+	shhwtstamps.hwtstamp = ns_to_ktime(ns);</div><div class='add'>+</div><div class='add'>+	dev_dbg(chip-&gt;dev,</div><div class='add'>+		"p%d: txtstamp %llx status 0x%04x skb ID 0x%04x hw ID 0x%04x\n",</div><div class='add'>+		ps-&gt;port_id, ktime_to_ns(shhwtstamps.hwtstamp),</div><div class='add'>+		departure_block[0], ps-&gt;tx_seq_id, departure_block[3]);</div><div class='add'>+</div><div class='add'>+	/* skb_complete_tx_timestamp() will free up the client to make</div><div class='add'>+	 * another timestamp-able transmit. We have to be ready for it</div><div class='add'>+	 * -- by clearing the ps-&gt;tx_skb "flag" -- beforehand.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	tmp_skb = ps-&gt;tx_skb;</div><div class='add'>+	ps-&gt;tx_skb = NULL;</div><div class='add'>+	clear_bit_unlock(MV88E6XXX_HWTSTAMP_TX_IN_PROGRESS, &amp;ps-&gt;state);</div><div class='add'>+	skb_complete_tx_timestamp(tmp_skb, &amp;shhwtstamps);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+free_and_clear_skb:</div><div class='add'>+	dev_kfree_skb_any(ps-&gt;tx_skb);</div><div class='add'>+	ps-&gt;tx_skb = NULL;</div><div class='add'>+	clear_bit_unlock(MV88E6XXX_HWTSTAMP_TX_IN_PROGRESS, &amp;ps-&gt;state);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+long mv88e6xxx_hwtstamp_work(struct ptp_clock_info *ptp)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ptp_to_chip(ptp);</div><div class='add'>+	struct dsa_switch *ds = chip-&gt;ds;</div><div class='add'>+	struct mv88e6xxx_port_hwtstamp *ps;</div><div class='add'>+	int i, restart = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ds-&gt;num_ports; i++) {</div><div class='add'>+		if (!dsa_is_user_port(ds, i))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		ps = &amp;chip-&gt;port_hwtstamp[i];</div><div class='add'>+		if (test_bit(MV88E6XXX_HWTSTAMP_TX_IN_PROGRESS, &amp;ps-&gt;state))</div><div class='add'>+			restart |= mv88e6xxx_txtstamp_work(chip, ps);</div><div class='add'>+</div><div class='add'>+		mv88e6xxx_rxtstamp_work(chip, ps);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return restart ? 1 : -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mv88e6xxx_port_txtstamp(struct dsa_switch *ds, int port,</div><div class='add'>+			     struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ds-&gt;priv;</div><div class='add'>+	struct mv88e6xxx_port_hwtstamp *ps = &amp;chip-&gt;port_hwtstamp[port];</div><div class='add'>+	struct ptp_header *hdr;</div><div class='add'>+	struct sk_buff *clone;</div><div class='add'>+	unsigned int type;</div><div class='add'>+</div><div class='add'>+	type = ptp_classify_raw(skb);</div><div class='add'>+	if (type == PTP_CLASS_NONE)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	hdr = mv88e6xxx_should_tstamp(chip, port, skb, type);</div><div class='add'>+	if (!hdr)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	clone = skb_clone_sk(skb);</div><div class='add'>+	if (!clone)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (test_and_set_bit_lock(MV88E6XXX_HWTSTAMP_TX_IN_PROGRESS,</div><div class='add'>+				  &amp;ps-&gt;state)) {</div><div class='add'>+		kfree_skb(clone);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ps-&gt;tx_skb = clone;</div><div class='add'>+	ps-&gt;tx_tstamp_start = jiffies;</div><div class='add'>+	ps-&gt;tx_seq_id = be16_to_cpu(hdr-&gt;sequence_id);</div><div class='add'>+</div><div class='add'>+	ptp_schedule_worker(chip-&gt;ptp_clock, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6165_global_disable(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	u16 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_ptp_read(chip, MV88E6165_PTP_CFG, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+	val |= MV88E6165_PTP_CFG_DISABLE_PTP;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_ptp_write(chip, MV88E6165_PTP_CFG, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6165_global_enable(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	u16 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_ptp_read(chip, MV88E6165_PTP_CFG, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	val &amp;= ~(MV88E6165_PTP_CFG_DISABLE_PTP | MV88E6165_PTP_CFG_TSPEC_MASK);</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_ptp_write(chip, MV88E6165_PTP_CFG, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6352_hwtstamp_port_disable(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_port_ptp_write(chip, port, MV88E6XXX_PORT_PTP_CFG0,</div><div class='add'>+					MV88E6XXX_PORT_PTP_CFG0_DISABLE_PTP);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6352_hwtstamp_port_enable(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_port_ptp_write(chip, port, MV88E6XXX_PORT_PTP_CFG0,</div><div class='add'>+					MV88E6XXX_PORT_PTP_CFG0_DISABLE_TSPEC_MATCH);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_hwtstamp_port_setup(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	const struct mv88e6xxx_ptp_ops *ptp_ops = chip-&gt;info-&gt;ops-&gt;ptp_ops;</div><div class='add'>+	struct mv88e6xxx_port_hwtstamp *ps = &amp;chip-&gt;port_hwtstamp[port];</div><div class='add'>+</div><div class='add'>+	ps-&gt;port_id = port;</div><div class='add'>+</div><div class='add'>+	skb_queue_head_init(&amp;ps-&gt;rx_queue);</div><div class='add'>+	skb_queue_head_init(&amp;ps-&gt;rx_queue2);</div><div class='add'>+</div><div class='add'>+	if (ptp_ops-&gt;port_disable)</div><div class='add'>+		return ptp_ops-&gt;port_disable(chip, port);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_hwtstamp_setup(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	const struct mv88e6xxx_ptp_ops *ptp_ops = chip-&gt;info-&gt;ops-&gt;ptp_ops;</div><div class='add'>+	int err;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Disable timestamping on all ports. */</div><div class='add'>+	for (i = 0; i &lt; mv88e6xxx_num_ports(chip); ++i) {</div><div class='add'>+		err = mv88e6xxx_hwtstamp_port_setup(chip, i);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Disable PTP globally */</div><div class='add'>+	if (ptp_ops-&gt;global_disable) {</div><div class='add'>+		err = ptp_ops-&gt;global_disable(chip);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set the ethertype of L2 PTP messages */</div><div class='add'>+	err = mv88e6xxx_ptp_write(chip, MV88E6XXX_PTP_ETHERTYPE, ETH_P_1588);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* MV88E6XXX_PTP_MSG_TYPE is a mask of PTP message types to</div><div class='add'>+	 * timestamp. This affects all ports that have timestamping enabled,</div><div class='add'>+	 * but the timestamp config is per-port; thus we configure all events</div><div class='add'>+	 * here and only support the HWTSTAMP_FILTER_*_EVENT filter types.</div><div class='add'>+	 */</div><div class='add'>+	err = mv88e6xxx_ptp_write(chip, MV88E6XXX_PTP_MSGTYPE,</div><div class='add'>+				  MV88E6XXX_PTP_MSGTYPE_ALL_EVENT);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Use ARRIVAL1 for peer delay response messages. */</div><div class='add'>+	err = mv88e6xxx_ptp_write(chip, MV88E6XXX_PTP_TS_ARRIVAL_PTR,</div><div class='add'>+				  MV88E6XXX_PTP_MSGTYPE_PDLAY_RES);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* 88E6341 devices default to timestamping at the PHY, but this has</div><div class='add'>+	 * a hardware issue that results in unreliable timestamps. Force</div><div class='add'>+	 * these devices to timestamp at the MAC.</div><div class='add'>+	 */</div><div class='add'>+	if (chip-&gt;info-&gt;family == MV88E6XXX_FAMILY_6341) {</div><div class='add'>+		u16 val = MV88E6341_PTP_CFG_UPDATE |</div><div class='add'>+			  MV88E6341_PTP_CFG_MODE_IDX |</div><div class='add'>+			  MV88E6341_PTP_CFG_MODE_TS_AT_MAC;</div><div class='add'>+		err = mv88e6xxx_ptp_write(chip, MV88E6341_PTP_CFG, val);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mv88e6xxx_hwtstamp_free(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/hwtstamp.h b/drivers/net/dsa/mv88e6xxx/hwtstamp.h<br/>new file mode 100644<br/>index 000000000000..c359821d5a6e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/hwtstamp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/hwtstamp.h</a></div><div class='hunk'>@@ -0,0 +1,181 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+/*</div><div class='add'>+ * Marvell 88E6xxx Switch hardware timestamping support</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2008 Marvell Semiconductor</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2017 National Instruments</div><div class='add'>+ *      Erik Hons &lt;erik.hons@ni.com&gt;</div><div class='add'>+ *      Brandon Streiff &lt;brandon.streiff@ni.com&gt;</div><div class='add'>+ *      Dane Wagner &lt;dane.wagner@ni.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _MV88E6XXX_HWTSTAMP_H</div><div class='add'>+#define _MV88E6XXX_HWTSTAMP_H</div><div class='add'>+</div><div class='add'>+#include "chip.h"</div><div class='add'>+</div><div class='add'>+/* Global 6352 PTP registers */</div><div class='add'>+/* Offset 0x00: PTP EtherType */</div><div class='add'>+#define MV88E6XXX_PTP_ETHERTYPE	0x00</div><div class='add'>+</div><div class='add'>+/* Offset 0x01: Message Type Timestamp Enables */</div><div class='add'>+#define MV88E6XXX_PTP_MSGTYPE			0x01</div><div class='add'>+#define MV88E6XXX_PTP_MSGTYPE_SYNC		0x0001</div><div class='add'>+#define MV88E6XXX_PTP_MSGTYPE_DELAY_REQ		0x0002</div><div class='add'>+#define MV88E6XXX_PTP_MSGTYPE_PDLAY_REQ		0x0004</div><div class='add'>+#define MV88E6XXX_PTP_MSGTYPE_PDLAY_RES		0x0008</div><div class='add'>+#define MV88E6XXX_PTP_MSGTYPE_ALL_EVENT		0x000f</div><div class='add'>+</div><div class='add'>+/* Offset 0x02: Timestamp Arrival Capture Pointers */</div><div class='add'>+#define MV88E6XXX_PTP_TS_ARRIVAL_PTR	0x02</div><div class='add'>+</div><div class='add'>+/* Offset 0x05: PTP Global Configuration */</div><div class='add'>+#define MV88E6165_PTP_CFG			0x05</div><div class='add'>+#define MV88E6165_PTP_CFG_TSPEC_MASK		0xf000</div><div class='add'>+#define MV88E6165_PTP_CFG_DISABLE_TS_OVERWRITE	BIT(1)</div><div class='add'>+#define MV88E6165_PTP_CFG_DISABLE_PTP		BIT(0)</div><div class='add'>+</div><div class='add'>+/* Offset 0x07: PTP Global Configuration */</div><div class='add'>+#define MV88E6341_PTP_CFG			0x07</div><div class='add'>+#define MV88E6341_PTP_CFG_UPDATE		0x8000</div><div class='add'>+#define MV88E6341_PTP_CFG_IDX_MASK		0x7f00</div><div class='add'>+#define MV88E6341_PTP_CFG_DATA_MASK		0x00ff</div><div class='add'>+#define MV88E6341_PTP_CFG_MODE_IDX		0x0</div><div class='add'>+#define MV88E6341_PTP_CFG_MODE_TS_AT_PHY	0x00</div><div class='add'>+#define MV88E6341_PTP_CFG_MODE_TS_AT_MAC	0x80</div><div class='add'>+</div><div class='add'>+/* Offset 0x08: PTP Interrupt Status */</div><div class='add'>+#define MV88E6XXX_PTP_IRQ_STATUS	0x08</div><div class='add'>+</div><div class='add'>+/* Per-Port 6352 PTP Registers */</div><div class='add'>+/* Offset 0x00: PTP Configuration 0 */</div><div class='add'>+#define MV88E6XXX_PORT_PTP_CFG0				0x00</div><div class='add'>+#define MV88E6XXX_PORT_PTP_CFG0_TSPEC_SHIFT		12</div><div class='add'>+#define MV88E6XXX_PORT_PTP_CFG0_TSPEC_MASK		0xf000</div><div class='add'>+#define MV88E6XXX_PORT_PTP_CFG0_TSPEC_1588		0x0000</div><div class='add'>+#define MV88E6XXX_PORT_PTP_CFG0_TSPEC_8021AS		0x1000</div><div class='add'>+#define MV88E6XXX_PORT_PTP_CFG0_DISABLE_TSPEC_MATCH	0x0800</div><div class='add'>+#define MV88E6XXX_PORT_PTP_CFG0_DISABLE_OVERWRITE	0x0002</div><div class='add'>+#define MV88E6XXX_PORT_PTP_CFG0_DISABLE_PTP		0x0001</div><div class='add'>+</div><div class='add'>+/* Offset 0x01: PTP Configuration 1 */</div><div class='add'>+#define MV88E6XXX_PORT_PTP_CFG1	0x01</div><div class='add'>+</div><div class='add'>+/* Offset 0x02: PTP Configuration 2 */</div><div class='add'>+#define MV88E6XXX_PORT_PTP_CFG2				0x02</div><div class='add'>+#define MV88E6XXX_PORT_PTP_CFG2_EMBED_ARRIVAL		0x1000</div><div class='add'>+#define MV88E6XXX_PORT_PTP_CFG2_DEP_IRQ_EN		0x0002</div><div class='add'>+#define MV88E6XXX_PORT_PTP_CFG2_ARR_IRQ_EN		0x0001</div><div class='add'>+</div><div class='add'>+/* Offset 0x03: PTP LED Configuration */</div><div class='add'>+#define MV88E6XXX_PORT_PTP_LED_CFG	0x03</div><div class='add'>+</div><div class='add'>+/* Offset 0x08: PTP Arrival 0 Status */</div><div class='add'>+#define MV88E6XXX_PORT_PTP_ARR0_STS	0x08</div><div class='add'>+</div><div class='add'>+/* Offset 0x09/0x0A: PTP Arrival 0 Time */</div><div class='add'>+#define MV88E6XXX_PORT_PTP_ARR0_TIME_LO	0x09</div><div class='add'>+#define MV88E6XXX_PORT_PTP_ARR0_TIME_HI	0x0a</div><div class='add'>+</div><div class='add'>+/* Offset 0x0B: PTP Arrival 0 Sequence ID */</div><div class='add'>+#define MV88E6XXX_PORT_PTP_ARR0_SEQID	0x0b</div><div class='add'>+</div><div class='add'>+/* Offset 0x0C: PTP Arrival 1 Status */</div><div class='add'>+#define MV88E6XXX_PORT_PTP_ARR1_STS	0x0c</div><div class='add'>+</div><div class='add'>+/* Offset 0x0D/0x0E: PTP Arrival 1 Time */</div><div class='add'>+#define MV88E6XXX_PORT_PTP_ARR1_TIME_LO	0x0d</div><div class='add'>+#define MV88E6XXX_PORT_PTP_ARR1_TIME_HI	0x0e</div><div class='add'>+</div><div class='add'>+/* Offset 0x0F: PTP Arrival 1 Sequence ID */</div><div class='add'>+#define MV88E6XXX_PORT_PTP_ARR1_SEQID	0x0f</div><div class='add'>+</div><div class='add'>+/* Offset 0x10: PTP Departure Status */</div><div class='add'>+#define MV88E6XXX_PORT_PTP_DEP_STS	0x10</div><div class='add'>+</div><div class='add'>+/* Offset 0x11/0x12: PTP Deperture Time */</div><div class='add'>+#define MV88E6XXX_PORT_PTP_DEP_TIME_LO	0x11</div><div class='add'>+#define MV88E6XXX_PORT_PTP_DEP_TIME_HI	0x12</div><div class='add'>+</div><div class='add'>+/* Offset 0x13: PTP Departure Sequence ID */</div><div class='add'>+#define MV88E6XXX_PORT_PTP_DEP_SEQID	0x13</div><div class='add'>+</div><div class='add'>+/* Status fields for arrival and depature timestamp status registers */</div><div class='add'>+#define MV88E6XXX_PTP_TS_STATUS_MASK		0x0006</div><div class='add'>+#define MV88E6XXX_PTP_TS_STATUS_NORMAL		0x0000</div><div class='add'>+#define MV88E6XXX_PTP_TS_STATUS_OVERWITTEN	0x0002</div><div class='add'>+#define MV88E6XXX_PTP_TS_STATUS_DISCARDED	0x0004</div><div class='add'>+#define MV88E6XXX_PTP_TS_VALID			0x0001</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_NET_DSA_MV88E6XXX_PTP</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_hwtstamp_set(struct dsa_switch *ds, int port,</div><div class='add'>+				struct kernel_hwtstamp_config *cfg,</div><div class='add'>+				struct netlink_ext_ack *extack);</div><div class='add'>+int mv88e6xxx_port_hwtstamp_get(struct dsa_switch *ds, int port,</div><div class='add'>+				struct kernel_hwtstamp_config *cfg);</div><div class='add'>+</div><div class='add'>+bool mv88e6xxx_port_rxtstamp(struct dsa_switch *ds, int port,</div><div class='add'>+			     struct sk_buff *clone, unsigned int type);</div><div class='add'>+void mv88e6xxx_port_txtstamp(struct dsa_switch *ds, int port,</div><div class='add'>+			     struct sk_buff *skb);</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_get_ts_info(struct dsa_switch *ds, int port,</div><div class='add'>+			  struct kernel_ethtool_ts_info *info);</div><div class='add'>+</div><div class='add'>+long mv88e6xxx_hwtstamp_work(struct ptp_clock_info *ptp);</div><div class='add'>+int mv88e6xxx_hwtstamp_setup(struct mv88e6xxx_chip *chip);</div><div class='add'>+void mv88e6xxx_hwtstamp_free(struct mv88e6xxx_chip *chip);</div><div class='add'>+int mv88e6352_hwtstamp_port_enable(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+int mv88e6352_hwtstamp_port_disable(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+int mv88e6165_global_enable(struct mv88e6xxx_chip *chip);</div><div class='add'>+int mv88e6165_global_disable(struct mv88e6xxx_chip *chip);</div><div class='add'>+</div><div class='add'>+#else /* !CONFIG_NET_DSA_MV88E6XXX_PTP */</div><div class='add'>+</div><div class='add'>+static inline int</div><div class='add'>+mv88e6xxx_port_hwtstamp_set(struct dsa_switch *ds, int port,</div><div class='add'>+			    struct kernel_hwtstamp_config *config,</div><div class='add'>+			    struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int</div><div class='add'>+mv88e6xxx_port_hwtstamp_get(struct dsa_switch *ds, int port,</div><div class='add'>+			    struct kernel_hwtstamp_config *config)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool mv88e6xxx_port_rxtstamp(struct dsa_switch *ds, int port,</div><div class='add'>+					   struct sk_buff *clone,</div><div class='add'>+					   unsigned int type)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void mv88e6xxx_port_txtstamp(struct dsa_switch *ds, int port,</div><div class='add'>+					   struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int mv88e6xxx_get_ts_info(struct dsa_switch *ds, int port,</div><div class='add'>+					struct kernel_ethtool_ts_info *info)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int mv88e6xxx_hwtstamp_setup(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void mv88e6xxx_hwtstamp_free(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_NET_DSA_MV88E6XXX_PTP */</div><div class='add'>+</div><div class='add'>+#endif /* _MV88E6XXX_HWTSTAMP_H */</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/leds.c b/drivers/net/dsa/mv88e6xxx/leds.c<br/>new file mode 100644<br/>index 000000000000..ab3bc645da56<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/leds.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/leds.c</a></div><div class='hunk'>@@ -0,0 +1,848 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/leds.h&gt;</div><div class='add'>+#include &lt;linux/property.h&gt;</div><div class='add'>+</div><div class='add'>+#include "chip.h"</div><div class='add'>+#include "global2.h"</div><div class='add'>+#include "port.h"</div><div class='add'>+</div><div class='add'>+/* Offset 0x16: LED control */</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_led_write(struct mv88e6xxx_chip *chip, int port, u16 reg)</div><div class='add'>+{</div><div class='add'>+	reg |= MV88E6XXX_PORT_LED_CONTROL_UPDATE;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_LED_CONTROL, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_led_read(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				   u16 ptr, u16 *val)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_LED_CONTROL, ptr);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_LED_CONTROL, val);</div><div class='add'>+	*val &amp;= 0x3ff;</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_led_brightness_set(struct mv88e6xxx_port *p, int led,</div><div class='add'>+					int brightness)</div><div class='add'>+{</div><div class='add'>+	u16 reg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_led_read(p-&gt;chip, p-&gt;port,</div><div class='add'>+				      MV88E6XXX_PORT_LED_CONTROL_POINTER_LED01_CTRL,</div><div class='add'>+				      &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (led == 1)</div><div class='add'>+		reg &amp;= ~MV88E6XXX_PORT_LED_CONTROL_LED1_SEL_MASK;</div><div class='add'>+	else</div><div class='add'>+		reg &amp;= ~MV88E6XXX_PORT_LED_CONTROL_LED0_SEL_MASK;</div><div class='add'>+</div><div class='add'>+	if (brightness) {</div><div class='add'>+		/* Selector 0x0f == Force LED ON */</div><div class='add'>+		if (led == 1)</div><div class='add'>+			reg |= MV88E6XXX_PORT_LED_CONTROL_LED1_SELF;</div><div class='add'>+		else</div><div class='add'>+			reg |= MV88E6XXX_PORT_LED_CONTROL_LED0_SELF;</div><div class='add'>+	} else {</div><div class='add'>+		/* Selector 0x0e == Force LED OFF */</div><div class='add'>+		if (led == 1)</div><div class='add'>+			reg |= MV88E6XXX_PORT_LED_CONTROL_LED1_SELE;</div><div class='add'>+		else</div><div class='add'>+			reg |= MV88E6XXX_PORT_LED_CONTROL_LED0_SELE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	reg |= MV88E6XXX_PORT_LED_CONTROL_POINTER_LED01_CTRL;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_led_write(p-&gt;chip, p-&gt;port, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_led0_brightness_set_blocking(struct led_classdev *ldev,</div><div class='add'>+						  enum led_brightness brightness)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_port *p = container_of(ldev, struct mv88e6xxx_port, led0);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(p-&gt;chip);</div><div class='add'>+	err = mv88e6xxx_led_brightness_set(p, 0, brightness);</div><div class='add'>+	mv88e6xxx_reg_unlock(p-&gt;chip);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_led1_brightness_set_blocking(struct led_classdev *ldev,</div><div class='add'>+						  enum led_brightness brightness)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_port *p = container_of(ldev, struct mv88e6xxx_port, led1);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(p-&gt;chip);</div><div class='add'>+	err = mv88e6xxx_led_brightness_set(p, 1, brightness);</div><div class='add'>+	mv88e6xxx_reg_unlock(p-&gt;chip);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct mv88e6xxx_led_hwconfig {</div><div class='add'>+	int led;</div><div class='add'>+	u8 portmask;</div><div class='add'>+	unsigned long rules;</div><div class='add'>+	bool fiber;</div><div class='add'>+	bool blink_activity;</div><div class='add'>+	u16 selector;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* The following is a lookup table to check what rules we can support on a</div><div class='add'>+ * certain LED given restrictions such as that some rules only work with fiber</div><div class='add'>+ * (SFP) connections and some blink on activity by default.</div><div class='add'>+ */</div><div class='add'>+#define MV88E6XXX_PORTS_0_3 (BIT(0) | BIT(1) | BIT(2) | BIT(3))</div><div class='add'>+#define MV88E6XXX_PORTS_4_5 (BIT(4) | BIT(5))</div><div class='add'>+#define MV88E6XXX_PORT_4 BIT(4)</div><div class='add'>+#define MV88E6XXX_PORT_5 BIT(5)</div><div class='add'>+</div><div class='add'>+/* Entries are listed in selector order.</div><div class='add'>+ *</div><div class='add'>+ * These configurations vary across different switch families, list</div><div class='add'>+ * different tables per-family here.</div><div class='add'>+ */</div><div class='add'>+static const struct mv88e6xxx_led_hwconfig mv88e6352_led_hwconfigs[] = {</div><div class='add'>+	{</div><div class='add'>+		.led = 0,</div><div class='add'>+		.portmask = MV88E6XXX_PORT_4,</div><div class='add'>+		.rules = BIT(TRIGGER_NETDEV_LINK),</div><div class='add'>+		.blink_activity = true,</div><div class='add'>+		.selector = MV88E6XXX_PORT_LED_CONTROL_LED0_SEL0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.led = 1,</div><div class='add'>+		.portmask = MV88E6XXX_PORT_5,</div><div class='add'>+		.rules = BIT(TRIGGER_NETDEV_LINK_1000),</div><div class='add'>+		.blink_activity = true,</div><div class='add'>+		.selector = MV88E6XXX_PORT_LED_CONTROL_LED1_SEL0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.led = 0,</div><div class='add'>+		.portmask = MV88E6XXX_PORTS_0_3,</div><div class='add'>+		.rules = BIT(TRIGGER_NETDEV_LINK_100) | BIT(TRIGGER_NETDEV_LINK_1000),</div><div class='add'>+		.blink_activity = true,</div><div class='add'>+		.selector = MV88E6XXX_PORT_LED_CONTROL_LED0_SEL1,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.led = 1,</div><div class='add'>+		.portmask = MV88E6XXX_PORTS_0_3,</div><div class='add'>+		.rules = BIT(TRIGGER_NETDEV_LINK_10) | BIT(TRIGGER_NETDEV_LINK_100),</div><div class='add'>+		.blink_activity = true,</div><div class='add'>+		.selector = MV88E6XXX_PORT_LED_CONTROL_LED1_SEL1,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.led = 0,</div><div class='add'>+		.portmask = MV88E6XXX_PORTS_4_5,</div><div class='add'>+		.rules = BIT(TRIGGER_NETDEV_LINK_100),</div><div class='add'>+		.blink_activity = true,</div><div class='add'>+		.fiber = true,</div><div class='add'>+		.selector = MV88E6XXX_PORT_LED_CONTROL_LED0_SEL1,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.led = 1,</div><div class='add'>+		.portmask = MV88E6XXX_PORTS_4_5,</div><div class='add'>+		.rules = BIT(TRIGGER_NETDEV_LINK_1000),</div><div class='add'>+		.blink_activity = true,</div><div class='add'>+		.fiber = true,</div><div class='add'>+		.selector = MV88E6XXX_PORT_LED_CONTROL_LED1_SEL1,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.led = 0,</div><div class='add'>+		.portmask = MV88E6XXX_PORTS_0_3,</div><div class='add'>+		.rules = BIT(TRIGGER_NETDEV_LINK_1000),</div><div class='add'>+		.blink_activity = true,</div><div class='add'>+		.selector = MV88E6XXX_PORT_LED_CONTROL_LED0_SEL2,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.led = 1,</div><div class='add'>+		.portmask = MV88E6XXX_PORTS_0_3,</div><div class='add'>+		.rules = BIT(TRIGGER_NETDEV_LINK_10) | BIT(TRIGGER_NETDEV_LINK_100),</div><div class='add'>+		.blink_activity = true,</div><div class='add'>+		.selector = MV88E6XXX_PORT_LED_CONTROL_LED1_SEL2,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.led = 0,</div><div class='add'>+		.portmask = MV88E6XXX_PORTS_4_5,</div><div class='add'>+		.rules = BIT(TRIGGER_NETDEV_LINK_1000),</div><div class='add'>+		.blink_activity = true,</div><div class='add'>+		.fiber = true,</div><div class='add'>+		.selector = MV88E6XXX_PORT_LED_CONTROL_LED0_SEL2,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.led = 1,</div><div class='add'>+		.portmask = MV88E6XXX_PORTS_4_5,</div><div class='add'>+		.rules = BIT(TRIGGER_NETDEV_LINK_100),</div><div class='add'>+		.blink_activity = true,</div><div class='add'>+		.fiber = true,</div><div class='add'>+		.selector = MV88E6XXX_PORT_LED_CONTROL_LED1_SEL2,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.led = 0,</div><div class='add'>+		.portmask = MV88E6XXX_PORTS_0_3,</div><div class='add'>+		.rules = BIT(TRIGGER_NETDEV_LINK),</div><div class='add'>+		.blink_activity = true,</div><div class='add'>+		.selector = MV88E6XXX_PORT_LED_CONTROL_LED0_SEL3,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.led = 1,</div><div class='add'>+		.portmask = MV88E6XXX_PORTS_0_3,</div><div class='add'>+		.rules = BIT(TRIGGER_NETDEV_LINK_1000),</div><div class='add'>+		.selector = MV88E6XXX_PORT_LED_CONTROL_LED1_SEL3,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.led = 1,</div><div class='add'>+		.portmask = MV88E6XXX_PORTS_4_5,</div><div class='add'>+		.rules = BIT(TRIGGER_NETDEV_LINK),</div><div class='add'>+		.fiber = true,</div><div class='add'>+		.selector = MV88E6XXX_PORT_LED_CONTROL_LED1_SEL3,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.led = 1,</div><div class='add'>+		.portmask = MV88E6XXX_PORT_4,</div><div class='add'>+		.rules = BIT(TRIGGER_NETDEV_LINK),</div><div class='add'>+		.blink_activity = true,</div><div class='add'>+		.selector = MV88E6XXX_PORT_LED_CONTROL_LED1_SEL4,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.led = 1,</div><div class='add'>+		.portmask = MV88E6XXX_PORT_5,</div><div class='add'>+		.rules = BIT(TRIGGER_NETDEV_LINK),</div><div class='add'>+		.selector = MV88E6XXX_PORT_LED_CONTROL_LED1_SEL5,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.led = 0,</div><div class='add'>+		.portmask = MV88E6XXX_PORTS_0_3,</div><div class='add'>+		.rules = BIT(TRIGGER_NETDEV_FULL_DUPLEX),</div><div class='add'>+		.blink_activity = true,</div><div class='add'>+		.selector = MV88E6XXX_PORT_LED_CONTROL_LED0_SEL6,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.led = 1,</div><div class='add'>+		.portmask = MV88E6XXX_PORTS_0_3,</div><div class='add'>+		.rules = BIT(TRIGGER_NETDEV_LINK_10) | BIT(TRIGGER_NETDEV_LINK_1000),</div><div class='add'>+		.blink_activity = true,</div><div class='add'>+		.selector = MV88E6XXX_PORT_LED_CONTROL_LED1_SEL6,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.led = 0,</div><div class='add'>+		.portmask = MV88E6XXX_PORT_4,</div><div class='add'>+		.rules = BIT(TRIGGER_NETDEV_FULL_DUPLEX),</div><div class='add'>+		.blink_activity = true,</div><div class='add'>+		.selector = MV88E6XXX_PORT_LED_CONTROL_LED0_SEL6,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.led = 1,</div><div class='add'>+		.portmask = MV88E6XXX_PORT_5,</div><div class='add'>+		.rules = BIT(TRIGGER_NETDEV_FULL_DUPLEX),</div><div class='add'>+		.blink_activity = true,</div><div class='add'>+		.selector = MV88E6XXX_PORT_LED_CONTROL_LED1_SEL6,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.led = 0,</div><div class='add'>+		.portmask = MV88E6XXX_PORTS_0_3,</div><div class='add'>+		.rules = BIT(TRIGGER_NETDEV_LINK_10) | BIT(TRIGGER_NETDEV_LINK_1000),</div><div class='add'>+		.blink_activity = true,</div><div class='add'>+		.selector = MV88E6XXX_PORT_LED_CONTROL_LED0_SEL7,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.led = 1,</div><div class='add'>+		.portmask = MV88E6XXX_PORTS_0_3,</div><div class='add'>+		.rules = BIT(TRIGGER_NETDEV_LINK_10) | BIT(TRIGGER_NETDEV_LINK_1000),</div><div class='add'>+		.selector = MV88E6XXX_PORT_LED_CONTROL_LED1_SEL7,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.led = 0,</div><div class='add'>+		.portmask = MV88E6XXX_PORTS_0_3,</div><div class='add'>+		.rules = BIT(TRIGGER_NETDEV_LINK),</div><div class='add'>+		.selector = MV88E6XXX_PORT_LED_CONTROL_LED0_SEL8,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.led = 1,</div><div class='add'>+		.portmask = MV88E6XXX_PORTS_0_3,</div><div class='add'>+		.rules = BIT(TRIGGER_NETDEV_LINK),</div><div class='add'>+		.blink_activity = true,</div><div class='add'>+		.selector = MV88E6XXX_PORT_LED_CONTROL_LED1_SEL8,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.led = 0,</div><div class='add'>+		.portmask = MV88E6XXX_PORT_5,</div><div class='add'>+		.rules = BIT(TRIGGER_NETDEV_LINK),</div><div class='add'>+		.blink_activity = true,</div><div class='add'>+		.selector = MV88E6XXX_PORT_LED_CONTROL_LED0_SEL8,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.led = 0,</div><div class='add'>+		.portmask = MV88E6XXX_PORTS_0_3,</div><div class='add'>+		.rules = BIT(TRIGGER_NETDEV_LINK_10),</div><div class='add'>+		.selector = MV88E6XXX_PORT_LED_CONTROL_LED0_SEL9,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.led = 1,</div><div class='add'>+		.portmask = MV88E6XXX_PORTS_0_3,</div><div class='add'>+		.rules = BIT(TRIGGER_NETDEV_LINK_100),</div><div class='add'>+		.selector = MV88E6XXX_PORT_LED_CONTROL_LED1_SEL9,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.led = 0,</div><div class='add'>+		.portmask = MV88E6XXX_PORTS_0_3,</div><div class='add'>+		.rules = BIT(TRIGGER_NETDEV_LINK_10),</div><div class='add'>+		.blink_activity = true,</div><div class='add'>+		.selector = MV88E6XXX_PORT_LED_CONTROL_LED0_SELA,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.led = 1,</div><div class='add'>+		.portmask = MV88E6XXX_PORTS_0_3,</div><div class='add'>+		.rules = BIT(TRIGGER_NETDEV_LINK_100),</div><div class='add'>+		.blink_activity = true,</div><div class='add'>+		.selector = MV88E6XXX_PORT_LED_CONTROL_LED1_SELA,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.led = 0,</div><div class='add'>+		.portmask = MV88E6XXX_PORTS_0_3,</div><div class='add'>+		.rules = BIT(TRIGGER_NETDEV_LINK_100) | BIT(TRIGGER_NETDEV_LINK_1000),</div><div class='add'>+		.selector = MV88E6XXX_PORT_LED_CONTROL_LED0_SELB,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.led = 1,</div><div class='add'>+		.portmask = MV88E6XXX_PORTS_0_3,</div><div class='add'>+		.rules = BIT(TRIGGER_NETDEV_LINK_100) | BIT(TRIGGER_NETDEV_LINK_1000),</div><div class='add'>+		.blink_activity = true,</div><div class='add'>+		.selector = MV88E6XXX_PORT_LED_CONTROL_LED1_SELB,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* mv88e6xxx_led_match_selector() - look up the appropriate LED mode selector</div><div class='add'>+ * @p: port state container</div><div class='add'>+ * @led: LED number, 0 or 1</div><div class='add'>+ * @blink_activity: blink the LED (usually blink on indicated activity)</div><div class='add'>+ * @fiber: the link is connected to fiber such as SFP</div><div class='add'>+ * @rules: LED status flags from the LED classdev core</div><div class='add'>+ * @selector: fill in the selector in this parameter with an OR operation</div><div class='add'>+ */</div><div class='add'>+static int mv88e6xxx_led_match_selector(struct mv88e6xxx_port *p, int led, bool blink_activity,</div><div class='add'>+					bool fiber, unsigned long rules, u16 *selector)</div><div class='add'>+{</div><div class='add'>+	const struct mv88e6xxx_led_hwconfig *conf;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* No rules means we turn the LED off */</div><div class='add'>+	if (!rules) {</div><div class='add'>+		if (led == 1)</div><div class='add'>+			*selector |= MV88E6XXX_PORT_LED_CONTROL_LED1_SELE;</div><div class='add'>+		else</div><div class='add'>+			*selector |= MV88E6XXX_PORT_LED_CONTROL_LED0_SELE;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* TODO: these rules are for MV88E6352, when adding other families,</div><div class='add'>+	 * think about making sure you select the table that match the</div><div class='add'>+	 * specific switch family.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(mv88e6352_led_hwconfigs); i++) {</div><div class='add'>+		conf = &amp;mv88e6352_led_hwconfigs[i];</div><div class='add'>+</div><div class='add'>+		if (conf-&gt;led != led)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (!(conf-&gt;portmask &amp; BIT(p-&gt;port)))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (conf-&gt;blink_activity != blink_activity)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (conf-&gt;fiber != fiber)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (conf-&gt;rules == rules) {</div><div class='add'>+			dev_dbg(p-&gt;chip-&gt;dev, "port%d LED %d set selector %04x for rules %08lx\n",</div><div class='add'>+				p-&gt;port, led, conf-&gt;selector, rules);</div><div class='add'>+			*selector |= conf-&gt;selector;</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* mv88e6xxx_led_match_selector() - find Linux netdev rules from a selector value</div><div class='add'>+ * @p: port state container</div><div class='add'>+ * @selector: the selector value from the LED actity register</div><div class='add'>+ * @led: LED number, 0 or 1</div><div class='add'>+ * @rules: Linux netdev activity rules found from selector</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+mv88e6xxx_led_match_rule(struct mv88e6xxx_port *p, u16 selector, int led, unsigned long *rules)</div><div class='add'>+{</div><div class='add'>+	const struct mv88e6xxx_led_hwconfig *conf;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Find the selector in the table, we just look for the right selector</div><div class='add'>+	 * and ignore if the activity has special properties such as blinking</div><div class='add'>+	 * or is fiber-only.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(mv88e6352_led_hwconfigs); i++) {</div><div class='add'>+		conf = &amp;mv88e6352_led_hwconfigs[i];</div><div class='add'>+</div><div class='add'>+		if (conf-&gt;led != led)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (!(conf-&gt;portmask &amp; BIT(p-&gt;port)))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (conf-&gt;selector == selector) {</div><div class='add'>+			dev_dbg(p-&gt;chip-&gt;dev, "port%d LED %d has selector %04x, rules %08lx\n",</div><div class='add'>+				p-&gt;port, led, selector, conf-&gt;rules);</div><div class='add'>+			*rules = conf-&gt;rules;</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* mv88e6xxx_led_get_selector() - get the appropriate LED mode selector</div><div class='add'>+ * @p: port state container</div><div class='add'>+ * @led: LED number, 0 or 1</div><div class='add'>+ * @fiber: the link is connected to fiber such as SFP</div><div class='add'>+ * @rules: LED status flags from the LED classdev core</div><div class='add'>+ * @selector: fill in the selector in this parameter with an OR operation</div><div class='add'>+ */</div><div class='add'>+static int mv88e6xxx_led_get_selector(struct mv88e6xxx_port *p, int led,</div><div class='add'>+				      bool fiber, unsigned long rules, u16 *selector)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* What happens here is that we first try to locate a trigger with solid</div><div class='add'>+	 * indicator (such as LED is on for a 1000 link) else we try a second</div><div class='add'>+	 * sweep to find something suitable with a trigger that will blink on</div><div class='add'>+	 * activity.</div><div class='add'>+	 */</div><div class='add'>+	err = mv88e6xxx_led_match_selector(p, led, false, fiber, rules, selector);</div><div class='add'>+	if (err)</div><div class='add'>+		return mv88e6xxx_led_match_selector(p, led, true, fiber, rules, selector);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Sets up the hardware blinking period */</div><div class='add'>+static int mv88e6xxx_led_set_blinking_period(struct mv88e6xxx_port *p, int led,</div><div class='add'>+					     unsigned long delay_on, unsigned long delay_off)</div><div class='add'>+{</div><div class='add'>+	unsigned long period;</div><div class='add'>+	u16 reg;</div><div class='add'>+</div><div class='add'>+	period = delay_on + delay_off;</div><div class='add'>+</div><div class='add'>+	reg = 0;</div><div class='add'>+</div><div class='add'>+	switch (period) {</div><div class='add'>+	case 21:</div><div class='add'>+		reg |= MV88E6XXX_PORT_LED_CONTROL_0x06_BLINK_RATE_21MS;</div><div class='add'>+		break;</div><div class='add'>+	case 42:</div><div class='add'>+		reg |= MV88E6XXX_PORT_LED_CONTROL_0x06_BLINK_RATE_42MS;</div><div class='add'>+		break;</div><div class='add'>+	case 84:</div><div class='add'>+		reg |= MV88E6XXX_PORT_LED_CONTROL_0x06_BLINK_RATE_84MS;</div><div class='add'>+		break;</div><div class='add'>+	case 168:</div><div class='add'>+		reg |= MV88E6XXX_PORT_LED_CONTROL_0x06_BLINK_RATE_168MS;</div><div class='add'>+		break;</div><div class='add'>+	case 336:</div><div class='add'>+		reg |= MV88E6XXX_PORT_LED_CONTROL_0x06_BLINK_RATE_336MS;</div><div class='add'>+		break;</div><div class='add'>+	case 672:</div><div class='add'>+		reg |= MV88E6XXX_PORT_LED_CONTROL_0x06_BLINK_RATE_672MS;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		/* Fall back to software blinking */</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* This is essentially PWM duty cycle: how long time of the period</div><div class='add'>+	 * will the LED be on. Zero isn't great in most cases.</div><div class='add'>+	 */</div><div class='add'>+	switch (delay_on) {</div><div class='add'>+	case 0:</div><div class='add'>+		/* This is usually pretty useless and will make the LED look OFF */</div><div class='add'>+		reg |= MV88E6XXX_PORT_LED_CONTROL_0x06_PULSE_STRETCH_NONE;</div><div class='add'>+		break;</div><div class='add'>+	case 21:</div><div class='add'>+		reg |= MV88E6XXX_PORT_LED_CONTROL_0x06_PULSE_STRETCH_21MS;</div><div class='add'>+		break;</div><div class='add'>+	case 42:</div><div class='add'>+		reg |= MV88E6XXX_PORT_LED_CONTROL_0x06_PULSE_STRETCH_42MS;</div><div class='add'>+		break;</div><div class='add'>+	case 84:</div><div class='add'>+		reg |= MV88E6XXX_PORT_LED_CONTROL_0x06_PULSE_STRETCH_84MS;</div><div class='add'>+		break;</div><div class='add'>+	case 168:</div><div class='add'>+		reg |= MV88E6XXX_PORT_LED_CONTROL_0x06_PULSE_STRETCH_168MS;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		/* Just use something non-zero */</div><div class='add'>+		reg |= MV88E6XXX_PORT_LED_CONTROL_0x06_PULSE_STRETCH_21MS;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set up blink rate */</div><div class='add'>+	reg |= MV88E6XXX_PORT_LED_CONTROL_POINTER_STRETCH_BLINK;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_led_write(p-&gt;chip, p-&gt;port, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_led_blink_set(struct mv88e6xxx_port *p, int led,</div><div class='add'>+				   unsigned long *delay_on, unsigned long *delay_off)</div><div class='add'>+{</div><div class='add'>+	u16 reg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Choose a sensible default 336 ms (~3 Hz) */</div><div class='add'>+	if ((*delay_on == 0) &amp;&amp; (*delay_off == 0)) {</div><div class='add'>+		*delay_on = 168;</div><div class='add'>+		*delay_off = 168;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* No off delay is just on */</div><div class='add'>+	if (*delay_off == 0)</div><div class='add'>+		return mv88e6xxx_led_brightness_set(p, led, 1);</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_led_set_blinking_period(p, led, *delay_on, *delay_off);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_led_read(p-&gt;chip, p-&gt;port,</div><div class='add'>+				      MV88E6XXX_PORT_LED_CONTROL_POINTER_LED01_CTRL,</div><div class='add'>+				      &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (led == 1)</div><div class='add'>+		reg &amp;= ~MV88E6XXX_PORT_LED_CONTROL_LED1_SEL_MASK;</div><div class='add'>+	else</div><div class='add'>+		reg &amp;= ~MV88E6XXX_PORT_LED_CONTROL_LED0_SEL_MASK;</div><div class='add'>+</div><div class='add'>+	/* This will select the forced blinking status */</div><div class='add'>+	if (led == 1)</div><div class='add'>+		reg |= MV88E6XXX_PORT_LED_CONTROL_LED1_SELD;</div><div class='add'>+	else</div><div class='add'>+		reg |= MV88E6XXX_PORT_LED_CONTROL_LED0_SELD;</div><div class='add'>+</div><div class='add'>+	reg |= MV88E6XXX_PORT_LED_CONTROL_POINTER_LED01_CTRL;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_led_write(p-&gt;chip, p-&gt;port, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_led0_blink_set(struct led_classdev *ldev,</div><div class='add'>+				    unsigned long *delay_on,</div><div class='add'>+				    unsigned long *delay_off)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_port *p = container_of(ldev, struct mv88e6xxx_port, led0);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(p-&gt;chip);</div><div class='add'>+	err = mv88e6xxx_led_blink_set(p, 0, delay_on, delay_off);</div><div class='add'>+	mv88e6xxx_reg_unlock(p-&gt;chip);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_led1_blink_set(struct led_classdev *ldev,</div><div class='add'>+				    unsigned long *delay_on,</div><div class='add'>+				    unsigned long *delay_off)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_port *p = container_of(ldev, struct mv88e6xxx_port, led1);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(p-&gt;chip);</div><div class='add'>+	err = mv88e6xxx_led_blink_set(p, 1, delay_on, delay_off);</div><div class='add'>+	mv88e6xxx_reg_unlock(p-&gt;chip);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mv88e6xxx_led0_hw_control_is_supported(struct led_classdev *ldev, unsigned long rules)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_port *p = container_of(ldev, struct mv88e6xxx_port, led0);</div><div class='add'>+	u16 selector = 0;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_led_get_selector(p, 0, p-&gt;fiber, rules, &amp;selector);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mv88e6xxx_led1_hw_control_is_supported(struct led_classdev *ldev, unsigned long rules)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_port *p = container_of(ldev, struct mv88e6xxx_port, led1);</div><div class='add'>+	u16 selector = 0;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_led_get_selector(p, 1, p-&gt;fiber, rules, &amp;selector);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_led_hw_control_set(struct mv88e6xxx_port *p,</div><div class='add'>+					int led, unsigned long rules)</div><div class='add'>+{</div><div class='add'>+	u16 reg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_led_read(p-&gt;chip, p-&gt;port,</div><div class='add'>+				      MV88E6XXX_PORT_LED_CONTROL_POINTER_LED01_CTRL,</div><div class='add'>+				      &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (led == 1)</div><div class='add'>+		reg &amp;= ~MV88E6XXX_PORT_LED_CONTROL_LED1_SEL_MASK;</div><div class='add'>+	else</div><div class='add'>+		reg &amp;= ~MV88E6XXX_PORT_LED_CONTROL_LED0_SEL_MASK;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_led_get_selector(p, led, p-&gt;fiber, rules, &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	reg |= MV88E6XXX_PORT_LED_CONTROL_POINTER_LED01_CTRL;</div><div class='add'>+</div><div class='add'>+	if (led == 0)</div><div class='add'>+		dev_dbg(p-&gt;chip-&gt;dev, "LED 0 hw control on port %d trigger selector 0x%02x\n",</div><div class='add'>+			p-&gt;port,</div><div class='add'>+			(unsigned int)(reg &amp; MV88E6XXX_PORT_LED_CONTROL_LED0_SEL_MASK));</div><div class='add'>+	else</div><div class='add'>+		dev_dbg(p-&gt;chip-&gt;dev, "LED 1 hw control on port %d trigger selector 0x%02x\n",</div><div class='add'>+			p-&gt;port,</div><div class='add'>+			(unsigned int)(reg &amp; MV88E6XXX_PORT_LED_CONTROL_LED1_SEL_MASK) &gt;&gt; 4);</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_led_write(p-&gt;chip, p-&gt;port, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mv88e6xxx_led_hw_control_get(struct mv88e6xxx_port *p, int led, unsigned long *rules)</div><div class='add'>+{</div><div class='add'>+	u16 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(p-&gt;chip);</div><div class='add'>+	err = mv88e6xxx_port_led_read(p-&gt;chip, p-&gt;port,</div><div class='add'>+				      MV88E6XXX_PORT_LED_CONTROL_POINTER_LED01_CTRL, &amp;val);</div><div class='add'>+	mv88e6xxx_reg_unlock(p-&gt;chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Mask out the selector bits for this port */</div><div class='add'>+	if (led == 1) {</div><div class='add'>+		val &amp;= MV88E6XXX_PORT_LED_CONTROL_LED1_SEL_MASK;</div><div class='add'>+		/* It's forced blinking/OFF/ON */</div><div class='add'>+		if (val == MV88E6XXX_PORT_LED_CONTROL_LED1_SELD ||</div><div class='add'>+		    val == MV88E6XXX_PORT_LED_CONTROL_LED1_SELE ||</div><div class='add'>+		    val == MV88E6XXX_PORT_LED_CONTROL_LED1_SELF) {</div><div class='add'>+			*rules = 0;</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		val &amp;= MV88E6XXX_PORT_LED_CONTROL_LED0_SEL_MASK;</div><div class='add'>+		/* It's forced blinking/OFF/ON */</div><div class='add'>+		if (val == MV88E6XXX_PORT_LED_CONTROL_LED0_SELD ||</div><div class='add'>+		    val == MV88E6XXX_PORT_LED_CONTROL_LED0_SELE ||</div><div class='add'>+		    val == MV88E6XXX_PORT_LED_CONTROL_LED0_SELF) {</div><div class='add'>+			*rules = 0;</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_led_match_rule(p, val, led, rules);</div><div class='add'>+	if (!err)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	dev_dbg(p-&gt;chip-&gt;dev, "couldn't find matching selector for %04x\n", val);</div><div class='add'>+	*rules = 0;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mv88e6xxx_led0_hw_control_set(struct led_classdev *ldev, unsigned long rules)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_port *p = container_of(ldev, struct mv88e6xxx_port, led0);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(p-&gt;chip);</div><div class='add'>+	err = mv88e6xxx_led_hw_control_set(p, 0, rules);</div><div class='add'>+	mv88e6xxx_reg_unlock(p-&gt;chip);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mv88e6xxx_led1_hw_control_set(struct led_classdev *ldev, unsigned long rules)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_port *p = container_of(ldev, struct mv88e6xxx_port, led1);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(p-&gt;chip);</div><div class='add'>+	err = mv88e6xxx_led_hw_control_set(p, 1, rules);</div><div class='add'>+	mv88e6xxx_reg_unlock(p-&gt;chip);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mv88e6xxx_led0_hw_control_get(struct led_classdev *ldev, unsigned long *rules)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_port *p = container_of(ldev, struct mv88e6xxx_port, led0);</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_led_hw_control_get(p, 0, rules);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mv88e6xxx_led1_hw_control_get(struct led_classdev *ldev, unsigned long *rules)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_port *p = container_of(ldev, struct mv88e6xxx_port, led1);</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_led_hw_control_get(p, 1, rules);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct device *mv88e6xxx_led_hw_control_get_device(struct mv88e6xxx_port *p)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp;</div><div class='add'>+</div><div class='add'>+	dp = dsa_to_port(p-&gt;chip-&gt;ds, p-&gt;port);</div><div class='add'>+	if (!dp)</div><div class='add'>+		return NULL;</div><div class='add'>+	if (dp-&gt;user)</div><div class='add'>+		return &amp;dp-&gt;user-&gt;dev;</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct device *</div><div class='add'>+mv88e6xxx_led0_hw_control_get_device(struct led_classdev *ldev)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_port *p = container_of(ldev, struct mv88e6xxx_port, led0);</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_led_hw_control_get_device(p);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct device *</div><div class='add'>+mv88e6xxx_led1_hw_control_get_device(struct led_classdev *ldev)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_port *p = container_of(ldev, struct mv88e6xxx_port, led1);</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_led_hw_control_get_device(p);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_setup_leds(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	struct fwnode_handle *led = NULL, *leds = NULL;</div><div class='add'>+	struct led_init_data init_data = { };</div><div class='add'>+	enum led_default_state state;</div><div class='add'>+	struct mv88e6xxx_port *p;</div><div class='add'>+	struct led_classdev *l;</div><div class='add'>+	struct device *dev;</div><div class='add'>+	u32 led_num;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* LEDs are on ports 1,2,3,4, 5 and 6 (index 0..5), no more */</div><div class='add'>+	if (port &gt; 5)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	p = &amp;chip-&gt;ports[port];</div><div class='add'>+	if (!p-&gt;fwnode)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	dev = chip-&gt;dev;</div><div class='add'>+</div><div class='add'>+	leds = fwnode_get_named_child_node(p-&gt;fwnode, "leds");</div><div class='add'>+	if (!leds) {</div><div class='add'>+		dev_dbg(dev, "No Leds node specified in device tree for port %d!\n",</div><div class='add'>+			port);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fwnode_for_each_child_node(leds, led) {</div><div class='add'>+		/* Reg represent the led number of the port, max 2</div><div class='add'>+		 * LEDs can be connected to each port, in some designs</div><div class='add'>+		 * only one LED is connected.</div><div class='add'>+		 */</div><div class='add'>+		if (fwnode_property_read_u32(led, "reg", &amp;led_num))</div><div class='add'>+			continue;</div><div class='add'>+		if (led_num &gt; 1) {</div><div class='add'>+			dev_err(dev, "invalid LED specified port %d\n", port);</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+			goto err_put_led;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (led_num == 0)</div><div class='add'>+			l = &amp;p-&gt;led0;</div><div class='add'>+		else</div><div class='add'>+			l = &amp;p-&gt;led1;</div><div class='add'>+</div><div class='add'>+		state = led_init_default_state_get(led);</div><div class='add'>+		switch (state) {</div><div class='add'>+		case LEDS_DEFSTATE_ON:</div><div class='add'>+			l-&gt;brightness = 1;</div><div class='add'>+			mv88e6xxx_led_brightness_set(p, led_num, 1);</div><div class='add'>+			break;</div><div class='add'>+		case LEDS_DEFSTATE_KEEP:</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			l-&gt;brightness = 0;</div><div class='add'>+			mv88e6xxx_led_brightness_set(p, led_num, 0);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		l-&gt;max_brightness = 1;</div><div class='add'>+		if (led_num == 0) {</div><div class='add'>+			l-&gt;brightness_set_blocking = mv88e6xxx_led0_brightness_set_blocking;</div><div class='add'>+			l-&gt;blink_set = mv88e6xxx_led0_blink_set;</div><div class='add'>+			l-&gt;hw_control_is_supported = mv88e6xxx_led0_hw_control_is_supported;</div><div class='add'>+			l-&gt;hw_control_set = mv88e6xxx_led0_hw_control_set;</div><div class='add'>+			l-&gt;hw_control_get = mv88e6xxx_led0_hw_control_get;</div><div class='add'>+			l-&gt;hw_control_get_device = mv88e6xxx_led0_hw_control_get_device;</div><div class='add'>+		} else {</div><div class='add'>+			l-&gt;brightness_set_blocking = mv88e6xxx_led1_brightness_set_blocking;</div><div class='add'>+			l-&gt;blink_set = mv88e6xxx_led1_blink_set;</div><div class='add'>+			l-&gt;hw_control_is_supported = mv88e6xxx_led1_hw_control_is_supported;</div><div class='add'>+			l-&gt;hw_control_set = mv88e6xxx_led1_hw_control_set;</div><div class='add'>+			l-&gt;hw_control_get = mv88e6xxx_led1_hw_control_get;</div><div class='add'>+			l-&gt;hw_control_get_device = mv88e6xxx_led1_hw_control_get_device;</div><div class='add'>+		}</div><div class='add'>+		l-&gt;hw_control_trigger = "netdev";</div><div class='add'>+</div><div class='add'>+		init_data.default_label = ":port";</div><div class='add'>+		init_data.fwnode = led;</div><div class='add'>+		init_data.devname_mandatory = true;</div><div class='add'>+		init_data.devicename = kasprintf(GFP_KERNEL, "%s:0%d:0%d", chip-&gt;info-&gt;name,</div><div class='add'>+						 port, led_num);</div><div class='add'>+		if (!init_data.devicename) {</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto err_put_led;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = devm_led_classdev_register_ext(dev, l, &amp;init_data);</div><div class='add'>+		kfree(init_data.devicename);</div><div class='add'>+</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(dev, "Failed to init LED %d for port %d", led_num, port);</div><div class='add'>+			goto err_put_led;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fwnode_handle_put(leds);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_put_led:</div><div class='add'>+	fwnode_handle_put(led);</div><div class='add'>+	fwnode_handle_put(leds);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/pcs-6185.c b/drivers/net/dsa/mv88e6xxx/pcs-6185.c<br/>new file mode 100644<br/>index 000000000000..af7e06d265f7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/pcs-6185.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/pcs-6185.c</a></div><div class='hunk'>@@ -0,0 +1,191 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Marvell 88E6185 family SERDES PCS support</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2008 Marvell Semiconductor</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2017 Andrew Lunn &lt;andrew@lunn.ch&gt;</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/phylink.h&gt;</div><div class='add'>+</div><div class='add'>+#include "global2.h"</div><div class='add'>+#include "port.h"</div><div class='add'>+#include "serdes.h"</div><div class='add'>+</div><div class='add'>+struct mv88e6185_pcs {</div><div class='add'>+	struct phylink_pcs phylink_pcs;</div><div class='add'>+	unsigned int irq;</div><div class='add'>+	char name[64];</div><div class='add'>+</div><div class='add'>+	struct mv88e6xxx_chip *chip;</div><div class='add'>+	int port;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct mv88e6185_pcs *pcs_to_mv88e6185_pcs(struct phylink_pcs *pcs)</div><div class='add'>+{</div><div class='add'>+	return container_of(pcs, struct mv88e6185_pcs, phylink_pcs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t mv88e6185_pcs_handle_irq(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6185_pcs *mpcs = dev_id;</div><div class='add'>+	struct mv88e6xxx_chip *chip;</div><div class='add'>+	irqreturn_t ret = IRQ_NONE;</div><div class='add'>+	bool link_up;</div><div class='add'>+	u16 status;</div><div class='add'>+	int port;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	chip = mpcs-&gt;chip;</div><div class='add'>+	port = mpcs-&gt;port;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_STS, &amp;status);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	if (!err) {</div><div class='add'>+		link_up = !!(status &amp; MV88E6XXX_PORT_STS_LINK);</div><div class='add'>+</div><div class='add'>+		phylink_pcs_change(&amp;mpcs-&gt;phylink_pcs, link_up);</div><div class='add'>+</div><div class='add'>+		ret = IRQ_HANDLED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6185_pcs_get_state(struct phylink_pcs *pcs,</div><div class='add'>+				    unsigned int neg_mode,</div><div class='add'>+				    struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6185_pcs *mpcs = pcs_to_mv88e6185_pcs(pcs);</div><div class='add'>+	struct mv88e6xxx_chip *chip = mpcs-&gt;chip;</div><div class='add'>+	int port = mpcs-&gt;port;</div><div class='add'>+	u16 status;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_STS, &amp;status);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		status = 0;</div><div class='add'>+</div><div class='add'>+	state-&gt;link = !!(status &amp; MV88E6XXX_PORT_STS_LINK);</div><div class='add'>+	if (state-&gt;link) {</div><div class='add'>+		state-&gt;duplex = status &amp; MV88E6XXX_PORT_STS_DUPLEX ?</div><div class='add'>+			DUPLEX_FULL : DUPLEX_HALF;</div><div class='add'>+</div><div class='add'>+		switch (status &amp; MV88E6XXX_PORT_STS_SPEED_MASK) {</div><div class='add'>+		case MV88E6XXX_PORT_STS_SPEED_1000:</div><div class='add'>+			state-&gt;speed = SPEED_1000;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case MV88E6XXX_PORT_STS_SPEED_100:</div><div class='add'>+			state-&gt;speed = SPEED_100;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case MV88E6XXX_PORT_STS_SPEED_10:</div><div class='add'>+			state-&gt;speed = SPEED_10;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		default:</div><div class='add'>+			state-&gt;link = false;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6185_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode,</div><div class='add'>+				phy_interface_t interface,</div><div class='add'>+				const unsigned long *advertising,</div><div class='add'>+				bool permit_pause_to_mac)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6185_pcs_an_restart(struct phylink_pcs *pcs)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct phylink_pcs_ops mv88e6185_phylink_pcs_ops = {</div><div class='add'>+	.pcs_get_state = mv88e6185_pcs_get_state,</div><div class='add'>+	.pcs_config = mv88e6185_pcs_config,</div><div class='add'>+	.pcs_an_restart = mv88e6185_pcs_an_restart,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int mv88e6185_pcs_init(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6185_pcs *mpcs;</div><div class='add'>+	struct device *dev;</div><div class='add'>+	unsigned int irq;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* There are no configurable serdes lanes on this switch chip, so</div><div class='add'>+	 * we use the static cmode configuration to determine whether we</div><div class='add'>+	 * have a PCS or not.</div><div class='add'>+	 */</div><div class='add'>+	if (chip-&gt;ports[port].cmode != MV88E6185_PORT_STS_CMODE_SERDES &amp;&amp;</div><div class='add'>+	    chip-&gt;ports[port].cmode != MV88E6185_PORT_STS_CMODE_1000BASE_X)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	dev = chip-&gt;dev;</div><div class='add'>+</div><div class='add'>+	mpcs = kzalloc(sizeof(*mpcs), GFP_KERNEL);</div><div class='add'>+	if (!mpcs)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mpcs-&gt;chip = chip;</div><div class='add'>+	mpcs-&gt;port = port;</div><div class='add'>+	mpcs-&gt;phylink_pcs.ops = &amp;mv88e6185_phylink_pcs_ops;</div><div class='add'>+</div><div class='add'>+	irq = mv88e6xxx_serdes_irq_mapping(chip, port);</div><div class='add'>+	if (irq) {</div><div class='add'>+		snprintf(mpcs-&gt;name, sizeof(mpcs-&gt;name),</div><div class='add'>+			 "mv88e6xxx-%s-serdes-%d", dev_name(dev), port);</div><div class='add'>+</div><div class='add'>+		err = request_threaded_irq(irq, NULL, mv88e6185_pcs_handle_irq,</div><div class='add'>+					   IRQF_ONESHOT, mpcs-&gt;name, mpcs);</div><div class='add'>+		if (err) {</div><div class='add'>+			kfree(mpcs);</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		mpcs-&gt;irq = irq;</div><div class='add'>+	} else {</div><div class='add'>+		mpcs-&gt;phylink_pcs.poll = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	chip-&gt;ports[port].pcs_private = &amp;mpcs-&gt;phylink_pcs;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6185_pcs_teardown(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6185_pcs *mpcs;</div><div class='add'>+</div><div class='add'>+	mpcs = chip-&gt;ports[port].pcs_private;</div><div class='add'>+	if (!mpcs)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (mpcs-&gt;irq)</div><div class='add'>+		free_irq(mpcs-&gt;irq, mpcs);</div><div class='add'>+</div><div class='add'>+	kfree(mpcs);</div><div class='add'>+</div><div class='add'>+	chip-&gt;ports[port].pcs_private = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct phylink_pcs *mv88e6185_pcs_select(struct mv88e6xxx_chip *chip,</div><div class='add'>+						int port,</div><div class='add'>+						phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	return chip-&gt;ports[port].pcs_private;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct mv88e6xxx_pcs_ops mv88e6185_pcs_ops = {</div><div class='add'>+	.pcs_init = mv88e6185_pcs_init,</div><div class='add'>+	.pcs_teardown = mv88e6185_pcs_teardown,</div><div class='add'>+	.pcs_select = mv88e6185_pcs_select,</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/pcs-6352.c b/drivers/net/dsa/mv88e6xxx/pcs-6352.c<br/>new file mode 100644<br/>index 000000000000..36993400837e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/pcs-6352.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/pcs-6352.c</a></div><div class='hunk'>@@ -0,0 +1,390 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Marvell 88E6352 family SERDES PCS support</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2008 Marvell Semiconductor</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2017 Andrew Lunn &lt;andrew@lunn.ch&gt;</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/phylink.h&gt;</div><div class='add'>+</div><div class='add'>+#include "global2.h"</div><div class='add'>+#include "port.h"</div><div class='add'>+#include "serdes.h"</div><div class='add'>+</div><div class='add'>+/* Definitions from drivers/net/phy/marvell.c, which would be good to reuse. */</div><div class='add'>+#define MII_M1011_PHY_STATUS		17</div><div class='add'>+#define MII_M1011_IMASK			18</div><div class='add'>+#define MII_M1011_IMASK_LINK_CHANGE	BIT(10)</div><div class='add'>+#define MII_M1011_IEVENT		19</div><div class='add'>+#define MII_M1011_IEVENT_LINK_CHANGE	BIT(10)</div><div class='add'>+#define MII_MARVELL_PHY_PAGE		22</div><div class='add'>+#define MII_MARVELL_FIBER_PAGE		1</div><div class='add'>+</div><div class='add'>+struct marvell_c22_pcs {</div><div class='add'>+	struct mdio_device mdio;</div><div class='add'>+	struct phylink_pcs phylink_pcs;</div><div class='add'>+	unsigned int irq;</div><div class='add'>+	char name[64];</div><div class='add'>+	bool (*link_check)(struct marvell_c22_pcs *mpcs);</div><div class='add'>+	struct mv88e6xxx_port *port;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct marvell_c22_pcs *pcs_to_marvell_c22_pcs(struct phylink_pcs *pcs)</div><div class='add'>+{</div><div class='add'>+	return container_of(pcs, struct marvell_c22_pcs, phylink_pcs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int marvell_c22_pcs_set_fiber_page(struct marvell_c22_pcs *mpcs)</div><div class='add'>+{</div><div class='add'>+	u16 page;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;mpcs-&gt;mdio.bus-&gt;mdio_lock);</div><div class='add'>+</div><div class='add'>+	err = __mdiodev_read(&amp;mpcs-&gt;mdio, MII_MARVELL_PHY_PAGE);</div><div class='add'>+	if (err &lt; 0) {</div><div class='add'>+		dev_err(mpcs-&gt;mdio.dev.parent,</div><div class='add'>+			"%s: can't read Serdes page register: %pe\n",</div><div class='add'>+			mpcs-&gt;name, ERR_PTR(err));</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	page = err;</div><div class='add'>+</div><div class='add'>+	err = __mdiodev_write(&amp;mpcs-&gt;mdio, MII_MARVELL_PHY_PAGE,</div><div class='add'>+			      MII_MARVELL_FIBER_PAGE);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(mpcs-&gt;mdio.dev.parent,</div><div class='add'>+			"%s: can't set Serdes page register: %pe\n",</div><div class='add'>+			mpcs-&gt;name, ERR_PTR(err));</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return page;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int marvell_c22_pcs_restore_page(struct marvell_c22_pcs *mpcs,</div><div class='add'>+					int oldpage, int ret)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (oldpage &gt;= 0) {</div><div class='add'>+		err = __mdiodev_write(&amp;mpcs-&gt;mdio, MII_MARVELL_PHY_PAGE,</div><div class='add'>+				      oldpage);</div><div class='add'>+		if (err)</div><div class='add'>+			dev_err(mpcs-&gt;mdio.dev.parent,</div><div class='add'>+				"%s: can't restore Serdes page register: %pe\n",</div><div class='add'>+				mpcs-&gt;name, ERR_PTR(err));</div><div class='add'>+		if (!err || ret &lt; 0)</div><div class='add'>+			err = ret;</div><div class='add'>+	} else {</div><div class='add'>+		err = oldpage;</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;mpcs-&gt;mdio.bus-&gt;mdio_lock);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t marvell_c22_pcs_handle_irq(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct marvell_c22_pcs *mpcs = dev_id;</div><div class='add'>+	irqreturn_t status = IRQ_NONE;</div><div class='add'>+	int err, oldpage;</div><div class='add'>+</div><div class='add'>+	oldpage = marvell_c22_pcs_set_fiber_page(mpcs);</div><div class='add'>+	if (oldpage &lt; 0)</div><div class='add'>+		goto fail;</div><div class='add'>+</div><div class='add'>+	err = __mdiodev_read(&amp;mpcs-&gt;mdio, MII_M1011_IEVENT);</div><div class='add'>+	if (err &gt;= 0 &amp;&amp; err &amp; MII_M1011_IEVENT_LINK_CHANGE) {</div><div class='add'>+		phylink_pcs_change(&amp;mpcs-&gt;phylink_pcs, true);</div><div class='add'>+		status = IRQ_HANDLED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+fail:</div><div class='add'>+	marvell_c22_pcs_restore_page(mpcs, oldpage, 0);</div><div class='add'>+</div><div class='add'>+	return status;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int marvell_c22_pcs_modify(struct marvell_c22_pcs *mpcs, u8 reg,</div><div class='add'>+				  u16 mask, u16 val)</div><div class='add'>+{</div><div class='add'>+	int oldpage, err = 0;</div><div class='add'>+</div><div class='add'>+	oldpage = marvell_c22_pcs_set_fiber_page(mpcs);</div><div class='add'>+	if (oldpage &gt;= 0)</div><div class='add'>+		err = __mdiodev_modify(&amp;mpcs-&gt;mdio, reg, mask, val);</div><div class='add'>+</div><div class='add'>+	return marvell_c22_pcs_restore_page(mpcs, oldpage, err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int marvell_c22_pcs_power(struct marvell_c22_pcs *mpcs,</div><div class='add'>+				 bool on)</div><div class='add'>+{</div><div class='add'>+	u16 val = on ? 0 : BMCR_PDOWN;</div><div class='add'>+</div><div class='add'>+	return marvell_c22_pcs_modify(mpcs, MII_BMCR, BMCR_PDOWN, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int marvell_c22_pcs_control_irq(struct marvell_c22_pcs *mpcs,</div><div class='add'>+				       bool enable)</div><div class='add'>+{</div><div class='add'>+	u16 val = enable ? MII_M1011_IMASK_LINK_CHANGE : 0;</div><div class='add'>+</div><div class='add'>+	return marvell_c22_pcs_modify(mpcs, MII_M1011_IMASK,</div><div class='add'>+				      MII_M1011_IMASK_LINK_CHANGE, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int marvell_c22_pcs_enable(struct phylink_pcs *pcs)</div><div class='add'>+{</div><div class='add'>+	struct marvell_c22_pcs *mpcs = pcs_to_marvell_c22_pcs(pcs);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = marvell_c22_pcs_power(mpcs, true);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return marvell_c22_pcs_control_irq(mpcs, !!mpcs-&gt;irq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void marvell_c22_pcs_disable(struct phylink_pcs *pcs)</div><div class='add'>+{</div><div class='add'>+	struct marvell_c22_pcs *mpcs = pcs_to_marvell_c22_pcs(pcs);</div><div class='add'>+</div><div class='add'>+	marvell_c22_pcs_control_irq(mpcs, false);</div><div class='add'>+	marvell_c22_pcs_power(mpcs, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void marvell_c22_pcs_get_state(struct phylink_pcs *pcs,</div><div class='add'>+				      unsigned int neg_mode,</div><div class='add'>+				      struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+	struct marvell_c22_pcs *mpcs = pcs_to_marvell_c22_pcs(pcs);</div><div class='add'>+	int oldpage, bmsr, lpa, status;</div><div class='add'>+</div><div class='add'>+	state-&gt;link = false;</div><div class='add'>+</div><div class='add'>+	if (mpcs-&gt;link_check &amp;&amp; !mpcs-&gt;link_check(mpcs))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	oldpage = marvell_c22_pcs_set_fiber_page(mpcs);</div><div class='add'>+	if (oldpage &gt;= 0) {</div><div class='add'>+		bmsr = __mdiodev_read(&amp;mpcs-&gt;mdio, MII_BMSR);</div><div class='add'>+		lpa = __mdiodev_read(&amp;mpcs-&gt;mdio, MII_LPA);</div><div class='add'>+		status = __mdiodev_read(&amp;mpcs-&gt;mdio, MII_M1011_PHY_STATUS);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (marvell_c22_pcs_restore_page(mpcs, oldpage, 0) &gt;= 0 &amp;&amp;</div><div class='add'>+	    bmsr &gt;= 0 &amp;&amp; lpa &gt;= 0 &amp;&amp; status &gt;= 0)</div><div class='add'>+		mv88e6xxx_pcs_decode_state(mpcs-&gt;mdio.dev.parent, bmsr, lpa,</div><div class='add'>+					   status, state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int marvell_c22_pcs_config(struct phylink_pcs *pcs,</div><div class='add'>+				  unsigned int neg_mode,</div><div class='add'>+				  phy_interface_t interface,</div><div class='add'>+				  const unsigned long *advertising,</div><div class='add'>+				  bool permit_pause_to_mac)</div><div class='add'>+{</div><div class='add'>+	struct marvell_c22_pcs *mpcs = pcs_to_marvell_c22_pcs(pcs);</div><div class='add'>+	int oldpage, adv, err, ret = 0;</div><div class='add'>+	u16 bmcr;</div><div class='add'>+</div><div class='add'>+	adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising);</div><div class='add'>+	if (adv &lt; 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	bmcr = neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED ? BMCR_ANENABLE : 0;</div><div class='add'>+</div><div class='add'>+	oldpage = marvell_c22_pcs_set_fiber_page(mpcs);</div><div class='add'>+	if (oldpage &lt; 0)</div><div class='add'>+		goto restore;</div><div class='add'>+</div><div class='add'>+	err = __mdiodev_modify_changed(&amp;mpcs-&gt;mdio, MII_ADVERTISE, 0xffff, adv);</div><div class='add'>+	ret = err;</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto restore;</div><div class='add'>+</div><div class='add'>+	err = __mdiodev_modify_changed(&amp;mpcs-&gt;mdio, MII_BMCR, BMCR_ANENABLE,</div><div class='add'>+				       bmcr);</div><div class='add'>+	if (err &lt; 0) {</div><div class='add'>+		ret = err;</div><div class='add'>+		goto restore;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* If the ANENABLE bit was changed, the PHY will restart negotiation,</div><div class='add'>+	 * so we don't need to flag a change to trigger its own restart.</div><div class='add'>+	 */</div><div class='add'>+	if (err)</div><div class='add'>+		ret = 0;</div><div class='add'>+</div><div class='add'>+restore:</div><div class='add'>+	return marvell_c22_pcs_restore_page(mpcs, oldpage, ret);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void marvell_c22_pcs_an_restart(struct phylink_pcs *pcs)</div><div class='add'>+{</div><div class='add'>+	struct marvell_c22_pcs *mpcs = pcs_to_marvell_c22_pcs(pcs);</div><div class='add'>+</div><div class='add'>+	marvell_c22_pcs_modify(mpcs, MII_BMCR, BMCR_ANRESTART, BMCR_ANRESTART);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void marvell_c22_pcs_link_up(struct phylink_pcs *pcs, unsigned int mode,</div><div class='add'>+				    phy_interface_t interface, int speed,</div><div class='add'>+				    int duplex)</div><div class='add'>+{</div><div class='add'>+	struct marvell_c22_pcs *mpcs = pcs_to_marvell_c22_pcs(pcs);</div><div class='add'>+	u16 bmcr;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (phylink_autoneg_inband(mode))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	bmcr = mii_bmcr_encode_fixed(speed, duplex);</div><div class='add'>+</div><div class='add'>+	err = marvell_c22_pcs_modify(mpcs, MII_BMCR, BMCR_SPEED100 |</div><div class='add'>+				     BMCR_FULLDPLX | BMCR_SPEED1000, bmcr);</div><div class='add'>+	if (err)</div><div class='add'>+		dev_err(mpcs-&gt;mdio.dev.parent,</div><div class='add'>+			"%s: failed to configure mpcs: %pe\n", mpcs-&gt;name,</div><div class='add'>+			ERR_PTR(err));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct phylink_pcs_ops marvell_c22_pcs_ops = {</div><div class='add'>+	.pcs_enable = marvell_c22_pcs_enable,</div><div class='add'>+	.pcs_disable = marvell_c22_pcs_disable,</div><div class='add'>+	.pcs_get_state = marvell_c22_pcs_get_state,</div><div class='add'>+	.pcs_config = marvell_c22_pcs_config,</div><div class='add'>+	.pcs_an_restart = marvell_c22_pcs_an_restart,</div><div class='add'>+	.pcs_link_up = marvell_c22_pcs_link_up,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct marvell_c22_pcs *marvell_c22_pcs_alloc(struct device *dev,</div><div class='add'>+						     struct mii_bus *bus,</div><div class='add'>+						     unsigned int addr)</div><div class='add'>+{</div><div class='add'>+	struct marvell_c22_pcs *mpcs;</div><div class='add'>+</div><div class='add'>+	mpcs = kzalloc(sizeof(*mpcs), GFP_KERNEL);</div><div class='add'>+	if (!mpcs)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	mpcs-&gt;mdio.dev.parent = dev;</div><div class='add'>+	mpcs-&gt;mdio.bus = bus;</div><div class='add'>+	mpcs-&gt;mdio.addr = addr;</div><div class='add'>+	mpcs-&gt;phylink_pcs.ops = &amp;marvell_c22_pcs_ops;</div><div class='add'>+</div><div class='add'>+	return mpcs;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int marvell_c22_pcs_setup_irq(struct marvell_c22_pcs *mpcs,</div><div class='add'>+				     unsigned int irq)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mpcs-&gt;phylink_pcs.poll = !irq;</div><div class='add'>+	mpcs-&gt;irq = irq;</div><div class='add'>+</div><div class='add'>+	if (irq) {</div><div class='add'>+		err = request_threaded_irq(irq, NULL,</div><div class='add'>+					   marvell_c22_pcs_handle_irq,</div><div class='add'>+					   IRQF_ONESHOT, mpcs-&gt;name, mpcs);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* mv88e6352 specifics */</div><div class='add'>+</div><div class='add'>+static bool mv88e6352_pcs_link_check(struct marvell_c22_pcs *mpcs)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_port *port = mpcs-&gt;port;</div><div class='add'>+	struct mv88e6xxx_chip *chip = port-&gt;chip;</div><div class='add'>+	u8 cmode;</div><div class='add'>+</div><div class='add'>+	/* Port 4 can be in auto-media mode. Check that the port is</div><div class='add'>+	 * associated with the mpcs.</div><div class='add'>+	 */</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	chip-&gt;info-&gt;ops-&gt;port_get_cmode(chip, port-&gt;port, &amp;cmode);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return cmode == MV88E6XXX_PORT_STS_CMODE_100BASEX ||</div><div class='add'>+	       cmode == MV88E6XXX_PORT_STS_CMODE_1000BASEX ||</div><div class='add'>+	       cmode == MV88E6XXX_PORT_STS_CMODE_SGMII;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6352_pcs_init(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	struct marvell_c22_pcs *mpcs;</div><div class='add'>+	struct mii_bus *bus;</div><div class='add'>+	struct device *dev;</div><div class='add'>+	unsigned int irq;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	err = mv88e6352_g2_scratch_port_has_serdes(chip, port);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+	if (err &lt;= 0)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	irq = mv88e6xxx_serdes_irq_mapping(chip, port);</div><div class='add'>+	bus = mv88e6xxx_default_mdio_bus(chip);</div><div class='add'>+	dev = chip-&gt;dev;</div><div class='add'>+</div><div class='add'>+	mpcs = marvell_c22_pcs_alloc(dev, bus, MV88E6352_ADDR_SERDES);</div><div class='add'>+	if (!mpcs)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	snprintf(mpcs-&gt;name, sizeof(mpcs-&gt;name),</div><div class='add'>+		 "mv88e6xxx-%s-serdes-%d", dev_name(dev), port);</div><div class='add'>+</div><div class='add'>+	mpcs-&gt;link_check = mv88e6352_pcs_link_check;</div><div class='add'>+	mpcs-&gt;port = &amp;chip-&gt;ports[port];</div><div class='add'>+</div><div class='add'>+	err = marvell_c22_pcs_setup_irq(mpcs, irq);</div><div class='add'>+	if (err) {</div><div class='add'>+		kfree(mpcs);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	chip-&gt;ports[port].pcs_private = &amp;mpcs-&gt;phylink_pcs;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6352_pcs_teardown(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	struct marvell_c22_pcs *mpcs;</div><div class='add'>+	struct phylink_pcs *pcs;</div><div class='add'>+</div><div class='add'>+	pcs = chip-&gt;ports[port].pcs_private;</div><div class='add'>+	if (!pcs)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mpcs = pcs_to_marvell_c22_pcs(pcs);</div><div class='add'>+</div><div class='add'>+	if (mpcs-&gt;irq)</div><div class='add'>+		free_irq(mpcs-&gt;irq, mpcs);</div><div class='add'>+</div><div class='add'>+	kfree(mpcs);</div><div class='add'>+</div><div class='add'>+	chip-&gt;ports[port].pcs_private = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct phylink_pcs *mv88e6352_pcs_select(struct mv88e6xxx_chip *chip,</div><div class='add'>+						int port,</div><div class='add'>+						phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	return chip-&gt;ports[port].pcs_private;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct mv88e6xxx_pcs_ops mv88e6352_pcs_ops = {</div><div class='add'>+	.pcs_init = mv88e6352_pcs_init,</div><div class='add'>+	.pcs_teardown = mv88e6352_pcs_teardown,</div><div class='add'>+	.pcs_select = mv88e6352_pcs_select,</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/pcs-639x.c b/drivers/net/dsa/mv88e6xxx/pcs-639x.c<br/>new file mode 100644<br/>index 000000000000..5db17c0b77f5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/pcs-639x.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/pcs-639x.c</a></div><div class='hunk'>@@ -0,0 +1,970 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Marvell 88E6352 family SERDES PCS support</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2008 Marvell Semiconductor</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2017 Andrew Lunn &lt;andrew@lunn.ch&gt;</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/irqdomain.h&gt;</div><div class='add'>+#include &lt;linux/mii.h&gt;</div><div class='add'>+#include &lt;linux/string_choices.h&gt;</div><div class='add'>+</div><div class='add'>+#include "chip.h"</div><div class='add'>+#include "global2.h"</div><div class='add'>+#include "phy.h"</div><div class='add'>+#include "port.h"</div><div class='add'>+#include "serdes.h"</div><div class='add'>+</div><div class='add'>+struct mv88e639x_pcs {</div><div class='add'>+	struct mdio_device mdio;</div><div class='add'>+	struct phylink_pcs sgmii_pcs;</div><div class='add'>+	struct phylink_pcs xg_pcs;</div><div class='add'>+	bool erratum_3_14;</div><div class='add'>+	bool supports_5g;</div><div class='add'>+	phy_interface_t interface;</div><div class='add'>+	unsigned int irq;</div><div class='add'>+	char name[64];</div><div class='add'>+	irqreturn_t (*handle_irq)(struct mv88e639x_pcs *mpcs);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int mv88e639x_read(struct mv88e639x_pcs *mpcs, u16 regnum, u16 *val)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mdiodev_c45_read(&amp;mpcs-&gt;mdio, MDIO_MMD_PHYXS, regnum);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	*val = err;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e639x_write(struct mv88e639x_pcs *mpcs, u16 regnum, u16 val)</div><div class='add'>+{</div><div class='add'>+	return mdiodev_c45_write(&amp;mpcs-&gt;mdio, MDIO_MMD_PHYXS, regnum, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e639x_modify(struct mv88e639x_pcs *mpcs, u16 regnum, u16 mask,</div><div class='add'>+			    u16 val)</div><div class='add'>+{</div><div class='add'>+	return mdiodev_c45_modify(&amp;mpcs-&gt;mdio, MDIO_MMD_PHYXS, regnum, mask,</div><div class='add'>+				  val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e639x_modify_changed(struct mv88e639x_pcs *mpcs, u16 regnum,</div><div class='add'>+				    u16 mask, u16 set)</div><div class='add'>+{</div><div class='add'>+	return mdiodev_c45_modify_changed(&amp;mpcs-&gt;mdio, MDIO_MMD_PHYXS, regnum,</div><div class='add'>+					  mask, set);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mv88e639x_pcs *</div><div class='add'>+mv88e639x_pcs_alloc(struct device *dev, struct mii_bus *bus, unsigned int addr,</div><div class='add'>+		    int port)</div><div class='add'>+{</div><div class='add'>+	struct mv88e639x_pcs *mpcs;</div><div class='add'>+</div><div class='add'>+	mpcs = kzalloc(sizeof(*mpcs), GFP_KERNEL);</div><div class='add'>+	if (!mpcs)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	mpcs-&gt;mdio.dev.parent = dev;</div><div class='add'>+	mpcs-&gt;mdio.bus = bus;</div><div class='add'>+	mpcs-&gt;mdio.addr = addr;</div><div class='add'>+</div><div class='add'>+	snprintf(mpcs-&gt;name, sizeof(mpcs-&gt;name),</div><div class='add'>+		 "mv88e6xxx-%s-serdes-%d", dev_name(dev), port);</div><div class='add'>+</div><div class='add'>+	return mpcs;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t mv88e639x_pcs_handle_irq(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct mv88e639x_pcs *mpcs = dev_id;</div><div class='add'>+	irqreturn_t (*handler)(struct mv88e639x_pcs *);</div><div class='add'>+</div><div class='add'>+	handler = READ_ONCE(mpcs-&gt;handle_irq);</div><div class='add'>+	if (!handler)</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+</div><div class='add'>+	return handler(mpcs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e639x_pcs_setup_irq(struct mv88e639x_pcs *mpcs,</div><div class='add'>+				   struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	unsigned int irq;</div><div class='add'>+</div><div class='add'>+	irq = mv88e6xxx_serdes_irq_mapping(chip, port);</div><div class='add'>+	if (!irq) {</div><div class='add'>+		/* Use polling mode */</div><div class='add'>+		mpcs-&gt;sgmii_pcs.poll = true;</div><div class='add'>+		mpcs-&gt;xg_pcs.poll = true;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mpcs-&gt;irq = irq;</div><div class='add'>+</div><div class='add'>+	return request_threaded_irq(irq, NULL, mv88e639x_pcs_handle_irq,</div><div class='add'>+				    IRQF_ONESHOT, mpcs-&gt;name, mpcs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e639x_pcs_teardown(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	struct mv88e639x_pcs *mpcs = chip-&gt;ports[port].pcs_private;</div><div class='add'>+</div><div class='add'>+	if (!mpcs)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (mpcs-&gt;irq)</div><div class='add'>+		free_irq(mpcs-&gt;irq, mpcs);</div><div class='add'>+</div><div class='add'>+	kfree(mpcs);</div><div class='add'>+</div><div class='add'>+	chip-&gt;ports[port].pcs_private = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct mv88e639x_pcs *sgmii_pcs_to_mv88e639x_pcs(struct phylink_pcs *pcs)</div><div class='add'>+{</div><div class='add'>+	return container_of(pcs, struct mv88e639x_pcs, sgmii_pcs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t mv88e639x_sgmii_handle_irq(struct mv88e639x_pcs *mpcs)</div><div class='add'>+{</div><div class='add'>+	u16 int_status;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e639x_read(mpcs, MV88E6390_SGMII_INT_STATUS, &amp;int_status);</div><div class='add'>+	if (err)</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+</div><div class='add'>+	if (int_status &amp; (MV88E6390_SGMII_INT_LINK_DOWN |</div><div class='add'>+			  MV88E6390_SGMII_INT_LINK_UP)) {</div><div class='add'>+		phylink_pcs_change(&amp;mpcs-&gt;sgmii_pcs,</div><div class='add'>+				   int_status &amp; MV88E6390_SGMII_INT_LINK_UP);</div><div class='add'>+</div><div class='add'>+		return IRQ_HANDLED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return IRQ_NONE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e639x_sgmii_pcs_control_irq(struct mv88e639x_pcs *mpcs,</div><div class='add'>+					   bool enable)</div><div class='add'>+{</div><div class='add'>+	u16 val = 0;</div><div class='add'>+</div><div class='add'>+	if (enable)</div><div class='add'>+		val |= MV88E6390_SGMII_INT_LINK_DOWN |</div><div class='add'>+		       MV88E6390_SGMII_INT_LINK_UP;</div><div class='add'>+</div><div class='add'>+	return mv88e639x_modify(mpcs, MV88E6390_SGMII_INT_ENABLE,</div><div class='add'>+				MV88E6390_SGMII_INT_LINK_DOWN |</div><div class='add'>+				MV88E6390_SGMII_INT_LINK_UP, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e639x_sgmii_pcs_control_pwr(struct mv88e639x_pcs *mpcs,</div><div class='add'>+					   bool enable)</div><div class='add'>+{</div><div class='add'>+	u16 mask, val;</div><div class='add'>+</div><div class='add'>+	if (enable) {</div><div class='add'>+		mask = BMCR_RESET | BMCR_LOOPBACK | BMCR_PDOWN;</div><div class='add'>+		val = 0;</div><div class='add'>+	} else {</div><div class='add'>+		mask = val = BMCR_PDOWN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return mv88e639x_modify(mpcs, MV88E6390_SGMII_BMCR, mask, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e639x_sgmii_pcs_enable(struct phylink_pcs *pcs)</div><div class='add'>+{</div><div class='add'>+	struct mv88e639x_pcs *mpcs = sgmii_pcs_to_mv88e639x_pcs(pcs);</div><div class='add'>+</div><div class='add'>+	/* power enable done in post_config */</div><div class='add'>+	mpcs-&gt;handle_irq = mv88e639x_sgmii_handle_irq;</div><div class='add'>+</div><div class='add'>+	return mv88e639x_sgmii_pcs_control_irq(mpcs, !!mpcs-&gt;irq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e639x_sgmii_pcs_disable(struct phylink_pcs *pcs)</div><div class='add'>+{</div><div class='add'>+	struct mv88e639x_pcs *mpcs = sgmii_pcs_to_mv88e639x_pcs(pcs);</div><div class='add'>+</div><div class='add'>+	mv88e639x_sgmii_pcs_control_irq(mpcs, false);</div><div class='add'>+	mv88e639x_sgmii_pcs_control_pwr(mpcs, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e639x_sgmii_pcs_pre_config(struct phylink_pcs *pcs,</div><div class='add'>+					   phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct mv88e639x_pcs *mpcs = sgmii_pcs_to_mv88e639x_pcs(pcs);</div><div class='add'>+</div><div class='add'>+	mv88e639x_sgmii_pcs_control_pwr(mpcs, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6390_erratum_3_14(struct mv88e639x_pcs *mpcs)</div><div class='add'>+{</div><div class='add'>+	static const int lanes[] = { MV88E6390_PORT9_LANE0, MV88E6390_PORT9_LANE1,</div><div class='add'>+		MV88E6390_PORT9_LANE2, MV88E6390_PORT9_LANE3,</div><div class='add'>+		MV88E6390_PORT10_LANE0, MV88E6390_PORT10_LANE1,</div><div class='add'>+		MV88E6390_PORT10_LANE2, MV88E6390_PORT10_LANE3 };</div><div class='add'>+	int err, i;</div><div class='add'>+</div><div class='add'>+	/* 88e6190x and 88e6390x errata 3.14:</div><div class='add'>+	 * After chip reset, SERDES reconfiguration or SERDES core</div><div class='add'>+	 * Software Reset, the SERDES lanes may not be properly aligned</div><div class='add'>+	 * resulting in CRC errors</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(lanes); i++) {</div><div class='add'>+		err = mdiobus_c45_write(mpcs-&gt;mdio.bus, lanes[i],</div><div class='add'>+					MDIO_MMD_PHYXS,</div><div class='add'>+					0xf054, 0x400C);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		err = mdiobus_c45_write(mpcs-&gt;mdio.bus, lanes[i],</div><div class='add'>+					MDIO_MMD_PHYXS,</div><div class='add'>+					0xf054, 0x4000);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e639x_sgmii_pcs_post_config(struct phylink_pcs *pcs,</div><div class='add'>+					   phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct mv88e639x_pcs *mpcs = sgmii_pcs_to_mv88e639x_pcs(pcs);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mv88e639x_sgmii_pcs_control_pwr(mpcs, true);</div><div class='add'>+</div><div class='add'>+	if (mpcs-&gt;erratum_3_14) {</div><div class='add'>+		err = mv88e6390_erratum_3_14(mpcs);</div><div class='add'>+		if (err)</div><div class='add'>+			dev_err(mpcs-&gt;mdio.dev.parent,</div><div class='add'>+				"failed to apply erratum 3.14: %pe\n",</div><div class='add'>+				ERR_PTR(err));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e639x_sgmii_pcs_get_state(struct phylink_pcs *pcs,</div><div class='add'>+					  unsigned int neg_mode,</div><div class='add'>+					  struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+	struct mv88e639x_pcs *mpcs = sgmii_pcs_to_mv88e639x_pcs(pcs);</div><div class='add'>+	u16 bmsr, lpa, status;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e639x_read(mpcs, MV88E6390_SGMII_BMSR, &amp;bmsr);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(mpcs-&gt;mdio.dev.parent,</div><div class='add'>+			"can't read Serdes PHY %s: %pe\n",</div><div class='add'>+			"BMSR", ERR_PTR(err));</div><div class='add'>+		state-&gt;link = false;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mv88e639x_read(mpcs, MV88E6390_SGMII_LPA, &amp;lpa);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(mpcs-&gt;mdio.dev.parent,</div><div class='add'>+			"can't read Serdes PHY %s: %pe\n",</div><div class='add'>+			"LPA", ERR_PTR(err));</div><div class='add'>+		state-&gt;link = false;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mv88e639x_read(mpcs, MV88E6390_SGMII_PHY_STATUS, &amp;status);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(mpcs-&gt;mdio.dev.parent,</div><div class='add'>+			"can't read Serdes PHY %s: %pe\n",</div><div class='add'>+			"status", ERR_PTR(err));</div><div class='add'>+		state-&gt;link = false;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_pcs_decode_state(mpcs-&gt;mdio.dev.parent, bmsr, lpa, status,</div><div class='add'>+				   state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e639x_sgmii_pcs_config(struct phylink_pcs *pcs,</div><div class='add'>+				      unsigned int neg_mode,</div><div class='add'>+				      phy_interface_t interface,</div><div class='add'>+				      const unsigned long *advertising,</div><div class='add'>+				      bool permit_pause_to_mac)</div><div class='add'>+{</div><div class='add'>+	struct mv88e639x_pcs *mpcs = sgmii_pcs_to_mv88e639x_pcs(pcs);</div><div class='add'>+	u16 val, bmcr;</div><div class='add'>+	bool changed;</div><div class='add'>+	int adv, err;</div><div class='add'>+</div><div class='add'>+	adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising);</div><div class='add'>+	if (adv &lt; 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	mpcs-&gt;interface = interface;</div><div class='add'>+</div><div class='add'>+	err = mv88e639x_modify_changed(mpcs, MV88E6390_SGMII_ADVERTISE,</div><div class='add'>+				       0xffff, adv);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	changed = err &gt; 0;</div><div class='add'>+</div><div class='add'>+	err = mv88e639x_read(mpcs, MV88E6390_SGMII_BMCR, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)</div><div class='add'>+		bmcr = val | BMCR_ANENABLE;</div><div class='add'>+	else</div><div class='add'>+		bmcr = val &amp; ~BMCR_ANENABLE;</div><div class='add'>+</div><div class='add'>+	/* setting ANENABLE triggers a restart of negotiation */</div><div class='add'>+	if (bmcr == val)</div><div class='add'>+		return changed;</div><div class='add'>+</div><div class='add'>+	return mv88e639x_write(mpcs, MV88E6390_SGMII_BMCR, bmcr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e639x_sgmii_pcs_an_restart(struct phylink_pcs *pcs)</div><div class='add'>+{</div><div class='add'>+	struct mv88e639x_pcs *mpcs = sgmii_pcs_to_mv88e639x_pcs(pcs);</div><div class='add'>+</div><div class='add'>+	mv88e639x_modify(mpcs, MV88E6390_SGMII_BMCR,</div><div class='add'>+			 BMCR_ANRESTART, BMCR_ANRESTART);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e639x_sgmii_pcs_link_up(struct phylink_pcs *pcs,</div><div class='add'>+					unsigned int mode,</div><div class='add'>+					phy_interface_t interface,</div><div class='add'>+					int speed, int duplex)</div><div class='add'>+{</div><div class='add'>+	struct mv88e639x_pcs *mpcs = sgmii_pcs_to_mv88e639x_pcs(pcs);</div><div class='add'>+	u16 bmcr;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (phylink_autoneg_inband(mode))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	bmcr = mii_bmcr_encode_fixed(speed, duplex);</div><div class='add'>+</div><div class='add'>+	err = mv88e639x_modify(mpcs, MV88E6390_SGMII_BMCR,</div><div class='add'>+			       BMCR_SPEED1000 | BMCR_SPEED100 | BMCR_FULLDPLX,</div><div class='add'>+			       bmcr);</div><div class='add'>+	if (err)</div><div class='add'>+		dev_err(mpcs-&gt;mdio.dev.parent,</div><div class='add'>+			"can't access Serdes PHY %s: %pe\n",</div><div class='add'>+			"BMCR", ERR_PTR(err));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct phylink_pcs_ops mv88e639x_sgmii_pcs_ops = {</div><div class='add'>+	.pcs_enable = mv88e639x_sgmii_pcs_enable,</div><div class='add'>+	.pcs_disable = mv88e639x_sgmii_pcs_disable,</div><div class='add'>+	.pcs_pre_config = mv88e639x_sgmii_pcs_pre_config,</div><div class='add'>+	.pcs_post_config = mv88e639x_sgmii_pcs_post_config,</div><div class='add'>+	.pcs_get_state = mv88e639x_sgmii_pcs_get_state,</div><div class='add'>+	.pcs_an_restart = mv88e639x_sgmii_pcs_an_restart,</div><div class='add'>+	.pcs_config = mv88e639x_sgmii_pcs_config,</div><div class='add'>+	.pcs_link_up = mv88e639x_sgmii_pcs_link_up,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct mv88e639x_pcs *xg_pcs_to_mv88e639x_pcs(struct phylink_pcs *pcs)</div><div class='add'>+{</div><div class='add'>+	return container_of(pcs, struct mv88e639x_pcs, xg_pcs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e639x_xg_pcs_enable(struct mv88e639x_pcs *mpcs)</div><div class='add'>+{</div><div class='add'>+	return mv88e639x_modify(mpcs, MV88E6390_10G_CTRL1,</div><div class='add'>+				MDIO_CTRL1_RESET | MDIO_PCS_CTRL1_LOOPBACK |</div><div class='add'>+				MDIO_CTRL1_LPOWER, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e639x_xg_pcs_disable(struct mv88e639x_pcs *mpcs)</div><div class='add'>+{</div><div class='add'>+	mv88e639x_modify(mpcs, MV88E6390_10G_CTRL1, MDIO_CTRL1_LPOWER,</div><div class='add'>+			 MDIO_CTRL1_LPOWER);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e639x_xg_pcs_get_state(struct phylink_pcs *pcs,</div><div class='add'>+				       unsigned int neg_mode,</div><div class='add'>+				       struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+	struct mv88e639x_pcs *mpcs = xg_pcs_to_mv88e639x_pcs(pcs);</div><div class='add'>+	u16 status;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	state-&gt;link = false;</div><div class='add'>+</div><div class='add'>+	err = mv88e639x_read(mpcs, MV88E6390_10G_STAT1, &amp;status);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(mpcs-&gt;mdio.dev.parent,</div><div class='add'>+			"can't read Serdes PHY %s: %pe\n",</div><div class='add'>+			"STAT1", ERR_PTR(err));</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	state-&gt;link = !!(status &amp; MDIO_STAT1_LSTATUS);</div><div class='add'>+	if (state-&gt;link) {</div><div class='add'>+		switch (state-&gt;interface) {</div><div class='add'>+		case PHY_INTERFACE_MODE_5GBASER:</div><div class='add'>+			state-&gt;speed = SPEED_5000;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case PHY_INTERFACE_MODE_10GBASER:</div><div class='add'>+		case PHY_INTERFACE_MODE_RXAUI:</div><div class='add'>+		case PHY_INTERFACE_MODE_XAUI:</div><div class='add'>+			state-&gt;speed = SPEED_10000;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		default:</div><div class='add'>+			state-&gt;link = false;</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		state-&gt;duplex = DUPLEX_FULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e639x_xg_pcs_config(struct phylink_pcs *pcs,</div><div class='add'>+				   unsigned int neg_mode,</div><div class='add'>+				   phy_interface_t interface,</div><div class='add'>+				   const unsigned long *advertising,</div><div class='add'>+				   bool permit_pause_to_mac)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct phylink_pcs *</div><div class='add'>+mv88e639x_pcs_select(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+		     phy_interface_t mode)</div><div class='add'>+{</div><div class='add'>+	struct mv88e639x_pcs *mpcs;</div><div class='add'>+</div><div class='add'>+	mpcs = chip-&gt;ports[port].pcs_private;</div><div class='add'>+	if (!mpcs)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case PHY_INTERFACE_MODE_SGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_1000BASEX:</div><div class='add'>+	case PHY_INTERFACE_MODE_2500BASEX:</div><div class='add'>+		return &amp;mpcs-&gt;sgmii_pcs;</div><div class='add'>+</div><div class='add'>+	case PHY_INTERFACE_MODE_5GBASER:</div><div class='add'>+		if (!mpcs-&gt;supports_5g)</div><div class='add'>+			return NULL;</div><div class='add'>+		fallthrough;</div><div class='add'>+	case PHY_INTERFACE_MODE_10GBASER:</div><div class='add'>+	case PHY_INTERFACE_MODE_XAUI:</div><div class='add'>+	case PHY_INTERFACE_MODE_RXAUI:</div><div class='add'>+	case PHY_INTERFACE_MODE_USXGMII:</div><div class='add'>+		return &amp;mpcs-&gt;xg_pcs;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Marvell 88E6390 Specific support */</div><div class='add'>+</div><div class='add'>+static irqreturn_t mv88e6390_xg_handle_irq(struct mv88e639x_pcs *mpcs)</div><div class='add'>+{</div><div class='add'>+	u16 int_status;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e639x_read(mpcs, MV88E6390_10G_INT_STATUS, &amp;int_status);</div><div class='add'>+	if (err)</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+</div><div class='add'>+	if (int_status &amp; (MV88E6390_10G_INT_LINK_DOWN |</div><div class='add'>+			  MV88E6390_10G_INT_LINK_UP)) {</div><div class='add'>+		phylink_pcs_change(&amp;mpcs-&gt;xg_pcs,</div><div class='add'>+				   int_status &amp; MV88E6390_10G_INT_LINK_UP);</div><div class='add'>+</div><div class='add'>+		return IRQ_HANDLED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return IRQ_NONE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6390_xg_control_irq(struct mv88e639x_pcs *mpcs, bool enable)</div><div class='add'>+{</div><div class='add'>+	u16 val = 0;</div><div class='add'>+</div><div class='add'>+	if (enable)</div><div class='add'>+		val = MV88E6390_10G_INT_LINK_DOWN | MV88E6390_10G_INT_LINK_UP;</div><div class='add'>+</div><div class='add'>+	return mv88e639x_modify(mpcs, MV88E6390_10G_INT_ENABLE,</div><div class='add'>+				MV88E6390_10G_INT_LINK_DOWN |</div><div class='add'>+				MV88E6390_10G_INT_LINK_UP, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6390_xg_pcs_enable(struct phylink_pcs *pcs)</div><div class='add'>+{</div><div class='add'>+	struct mv88e639x_pcs *mpcs = xg_pcs_to_mv88e639x_pcs(pcs);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e639x_xg_pcs_enable(mpcs);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	mpcs-&gt;handle_irq = mv88e6390_xg_handle_irq;</div><div class='add'>+</div><div class='add'>+	return mv88e6390_xg_control_irq(mpcs, !!mpcs-&gt;irq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6390_xg_pcs_disable(struct phylink_pcs *pcs)</div><div class='add'>+{</div><div class='add'>+	struct mv88e639x_pcs *mpcs = xg_pcs_to_mv88e639x_pcs(pcs);</div><div class='add'>+</div><div class='add'>+	mv88e6390_xg_control_irq(mpcs, false);</div><div class='add'>+	mv88e639x_xg_pcs_disable(mpcs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct phylink_pcs_ops mv88e6390_xg_pcs_ops = {</div><div class='add'>+	.pcs_enable = mv88e6390_xg_pcs_enable,</div><div class='add'>+	.pcs_disable = mv88e6390_xg_pcs_disable,</div><div class='add'>+	.pcs_get_state = mv88e639x_xg_pcs_get_state,</div><div class='add'>+	.pcs_config = mv88e639x_xg_pcs_config,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int mv88e6390_pcs_enable_checker(struct mv88e639x_pcs *mpcs)</div><div class='add'>+{</div><div class='add'>+	return mv88e639x_modify(mpcs, MV88E6390_PG_CONTROL,</div><div class='add'>+				MV88E6390_PG_CONTROL_ENABLE_PC,</div><div class='add'>+				MV88E6390_PG_CONTROL_ENABLE_PC);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6390_pcs_init(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	struct mv88e639x_pcs *mpcs;</div><div class='add'>+	struct mii_bus *bus;</div><div class='add'>+	struct device *dev;</div><div class='add'>+	int lane, err;</div><div class='add'>+</div><div class='add'>+	lane = mv88e6xxx_serdes_get_lane(chip, port);</div><div class='add'>+	if (lane &lt; 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	bus = mv88e6xxx_default_mdio_bus(chip);</div><div class='add'>+	dev = chip-&gt;dev;</div><div class='add'>+</div><div class='add'>+	mpcs = mv88e639x_pcs_alloc(dev, bus, lane, port);</div><div class='add'>+	if (!mpcs)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mpcs-&gt;sgmii_pcs.ops = &amp;mv88e639x_sgmii_pcs_ops;</div><div class='add'>+	mpcs-&gt;xg_pcs.ops = &amp;mv88e6390_xg_pcs_ops;</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;info-&gt;prod_num == MV88E6XXX_PORT_SWITCH_ID_PROD_6190X ||</div><div class='add'>+	    chip-&gt;info-&gt;prod_num == MV88E6XXX_PORT_SWITCH_ID_PROD_6390X)</div><div class='add'>+		mpcs-&gt;erratum_3_14 = true;</div><div class='add'>+</div><div class='add'>+	err = mv88e639x_pcs_setup_irq(mpcs, chip, port);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free;</div><div class='add'>+</div><div class='add'>+	/* 6390 and 6390x has the checker, 6393x doesn't appear to? */</div><div class='add'>+	/* This is to enable gathering the statistics. Maybe this</div><div class='add'>+	 * should call out to a helper? Or we could do this at init time.</div><div class='add'>+	 */</div><div class='add'>+	err = mv88e6390_pcs_enable_checker(mpcs);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free;</div><div class='add'>+</div><div class='add'>+	chip-&gt;ports[port].pcs_private = mpcs;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free:</div><div class='add'>+	kfree(mpcs);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct mv88e6xxx_pcs_ops mv88e6390_pcs_ops = {</div><div class='add'>+	.pcs_init = mv88e6390_pcs_init,</div><div class='add'>+	.pcs_teardown = mv88e639x_pcs_teardown,</div><div class='add'>+	.pcs_select = mv88e639x_pcs_select,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Marvell 88E6393X Specific support */</div><div class='add'>+</div><div class='add'>+static int mv88e6393x_power_lane(struct mv88e639x_pcs *mpcs, bool enable)</div><div class='add'>+{</div><div class='add'>+	u16 val = MV88E6393X_SERDES_CTRL1_TX_PDOWN |</div><div class='add'>+		  MV88E6393X_SERDES_CTRL1_RX_PDOWN;</div><div class='add'>+</div><div class='add'>+	return mv88e639x_modify(mpcs, MV88E6393X_SERDES_CTRL1, val,</div><div class='add'>+				enable ? 0 : val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* mv88e6393x family errata 4.6:</div><div class='add'>+ * Cannot clear PwrDn bit on SERDES if device is configured CPU_MGD mode or</div><div class='add'>+ * P0_mode is configured for [x]MII.</div><div class='add'>+ * Workaround: Set SERDES register 4.F002 bit 5=0 and bit 15=1.</div><div class='add'>+ *</div><div class='add'>+ * It seems that after this workaround the SERDES is automatically powered up</div><div class='add'>+ * (the bit is cleared), so power it down.</div><div class='add'>+ */</div><div class='add'>+static int mv88e6393x_erratum_4_6(struct mv88e639x_pcs *mpcs)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e639x_modify(mpcs, MV88E6393X_SERDES_POC,</div><div class='add'>+			       MV88E6393X_SERDES_POC_PDOWN |</div><div class='add'>+			       MV88E6393X_SERDES_POC_RESET,</div><div class='add'>+			       MV88E6393X_SERDES_POC_RESET);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e639x_modify(mpcs, MV88E6390_SGMII_BMCR,</div><div class='add'>+			       BMCR_PDOWN, BMCR_PDOWN);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e639x_sgmii_pcs_control_pwr(mpcs, false);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6393x_power_lane(mpcs, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* mv88e6393x family errata 4.8:</div><div class='add'>+ * When a SERDES port is operating in 1000BASE-X or SGMII mode link may not</div><div class='add'>+ * come up after hardware reset or software reset of SERDES core. Workaround</div><div class='add'>+ * is to write SERDES register 4.F074.14=1 for only those modes and 0 in all</div><div class='add'>+ * other modes.</div><div class='add'>+ */</div><div class='add'>+static int mv88e6393x_erratum_4_8(struct mv88e639x_pcs *mpcs)</div><div class='add'>+{</div><div class='add'>+	u16 reg, poc;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e639x_read(mpcs, MV88E6393X_SERDES_POC, &amp;poc);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	poc &amp;= MV88E6393X_SERDES_POC_PCS_MASK;</div><div class='add'>+	if (poc == MV88E6393X_SERDES_POC_PCS_1000BASEX ||</div><div class='add'>+	    poc == MV88E6393X_SERDES_POC_PCS_SGMII_PHY ||</div><div class='add'>+	    poc == MV88E6393X_SERDES_POC_PCS_SGMII_MAC)</div><div class='add'>+		reg = MV88E6393X_ERRATA_4_8_BIT;</div><div class='add'>+	else</div><div class='add'>+		reg = 0;</div><div class='add'>+</div><div class='add'>+	return mv88e639x_modify(mpcs, MV88E6393X_ERRATA_4_8_REG,</div><div class='add'>+				MV88E6393X_ERRATA_4_8_BIT, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* mv88e6393x family errata 5.2:</div><div class='add'>+ * For optimal signal integrity the following sequence should be applied to</div><div class='add'>+ * SERDES operating in 10G mode. These registers only apply to 10G operation</div><div class='add'>+ * and have no effect on other speeds.</div><div class='add'>+ */</div><div class='add'>+static int mv88e6393x_erratum_5_2(struct mv88e639x_pcs *mpcs)</div><div class='add'>+{</div><div class='add'>+	static const struct {</div><div class='add'>+		u16 dev, reg, val, mask;</div><div class='add'>+	} fixes[] = {</div><div class='add'>+		{ MDIO_MMD_VEND1, 0x8093, 0xcb5a, 0xffff },</div><div class='add'>+		{ MDIO_MMD_VEND1, 0x8171, 0x7088, 0xffff },</div><div class='add'>+		{ MDIO_MMD_VEND1, 0x80c9, 0x311a, 0xffff },</div><div class='add'>+		{ MDIO_MMD_VEND1, 0x80a2, 0x8000, 0xff7f },</div><div class='add'>+		{ MDIO_MMD_VEND1, 0x80a9, 0x0000, 0xfff0 },</div><div class='add'>+		{ MDIO_MMD_VEND1, 0x80a3, 0x0000, 0xf8ff },</div><div class='add'>+		{ MDIO_MMD_PHYXS, MV88E6393X_SERDES_POC,</div><div class='add'>+		  MV88E6393X_SERDES_POC_RESET, MV88E6393X_SERDES_POC_RESET },</div><div class='add'>+	};</div><div class='add'>+	int err, i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(fixes); ++i) {</div><div class='add'>+		err = mdiodev_c45_modify(&amp;mpcs-&gt;mdio, fixes[i].dev,</div><div class='add'>+					 fixes[i].reg, fixes[i].mask,</div><div class='add'>+					 fixes[i].val);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Inband AN is broken on Amethyst in 2500base-x mode when set by standard</div><div class='add'>+ * mechanism (via cmode).</div><div class='add'>+ * We can get around this by configuring the PCS mode to 1000base-x and then</div><div class='add'>+ * writing value 0x58 to register 1e.8000. (This must be done while SerDes</div><div class='add'>+ * receiver and transmitter are disabled, which is, when this function is</div><div class='add'>+ * called.)</div><div class='add'>+ * It seem that when we do this configuration to 2500base-x mode (by changing</div><div class='add'>+ * PCS mode to 1000base-x and frequency to 3.125 GHz from 1.25 GHz) and then</div><div class='add'>+ * configure to sgmii or 1000base-x, the device thinks that it already has</div><div class='add'>+ * SerDes at 1.25 GHz and does not change the 1e.8000 register, leaving SerDes</div><div class='add'>+ * at 3.125 GHz.</div><div class='add'>+ * To avoid this, change PCS mode back to 2500base-x when disabling SerDes from</div><div class='add'>+ * 2500base-x mode.</div><div class='add'>+ */</div><div class='add'>+static int mv88e6393x_fix_2500basex_an(struct mv88e639x_pcs *mpcs, bool on)</div><div class='add'>+{</div><div class='add'>+	u16 reg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (on)</div><div class='add'>+		reg = MV88E6393X_SERDES_POC_PCS_1000BASEX |</div><div class='add'>+		      MV88E6393X_SERDES_POC_AN;</div><div class='add'>+	else</div><div class='add'>+		reg = MV88E6393X_SERDES_POC_PCS_2500BASEX;</div><div class='add'>+</div><div class='add'>+	reg |= MV88E6393X_SERDES_POC_RESET;</div><div class='add'>+</div><div class='add'>+	err = mv88e639x_modify(mpcs, MV88E6393X_SERDES_POC,</div><div class='add'>+			       MV88E6393X_SERDES_POC_PCS_MASK |</div><div class='add'>+			       MV88E6393X_SERDES_POC_AN |</div><div class='add'>+			       MV88E6393X_SERDES_POC_RESET, reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mdiodev_c45_write(&amp;mpcs-&gt;mdio, MDIO_MMD_VEND1, 0x8000, 0x58);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6393x_sgmii_apply_2500basex_an(struct mv88e639x_pcs *mpcs,</div><div class='add'>+					       phy_interface_t interface,</div><div class='add'>+					       bool enable)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (interface != PHY_INTERFACE_MODE_2500BASEX)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	err = mv88e6393x_fix_2500basex_an(mpcs, enable);</div><div class='add'>+	if (err)</div><div class='add'>+		dev_err(mpcs-&gt;mdio.dev.parent,</div><div class='add'>+			"failed to %s 2500basex fix: %pe\n",</div><div class='add'>+			str_enable_disable(enable), ERR_PTR(err));</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6393x_sgmii_pcs_disable(struct phylink_pcs *pcs)</div><div class='add'>+{</div><div class='add'>+	struct mv88e639x_pcs *mpcs = sgmii_pcs_to_mv88e639x_pcs(pcs);</div><div class='add'>+</div><div class='add'>+	mv88e639x_sgmii_pcs_disable(pcs);</div><div class='add'>+	mv88e6393x_power_lane(mpcs, false);</div><div class='add'>+	mv88e6393x_sgmii_apply_2500basex_an(mpcs, mpcs-&gt;interface, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6393x_sgmii_pcs_pre_config(struct phylink_pcs *pcs,</div><div class='add'>+					    phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct mv88e639x_pcs *mpcs = sgmii_pcs_to_mv88e639x_pcs(pcs);</div><div class='add'>+</div><div class='add'>+	mv88e639x_sgmii_pcs_pre_config(pcs, interface);</div><div class='add'>+	mv88e6393x_power_lane(mpcs, false);</div><div class='add'>+	mv88e6393x_sgmii_apply_2500basex_an(mpcs, mpcs-&gt;interface, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6393x_sgmii_pcs_post_config(struct phylink_pcs *pcs,</div><div class='add'>+					    phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct mv88e639x_pcs *mpcs = sgmii_pcs_to_mv88e639x_pcs(pcs);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6393x_erratum_4_8(mpcs);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6393x_sgmii_apply_2500basex_an(mpcs, interface, true);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6393x_power_lane(mpcs, true);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e639x_sgmii_pcs_post_config(pcs, interface);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct phylink_pcs_ops mv88e6393x_sgmii_pcs_ops = {</div><div class='add'>+	.pcs_enable = mv88e639x_sgmii_pcs_enable,</div><div class='add'>+	.pcs_disable = mv88e6393x_sgmii_pcs_disable,</div><div class='add'>+	.pcs_pre_config = mv88e6393x_sgmii_pcs_pre_config,</div><div class='add'>+	.pcs_post_config = mv88e6393x_sgmii_pcs_post_config,</div><div class='add'>+	.pcs_get_state = mv88e639x_sgmii_pcs_get_state,</div><div class='add'>+	.pcs_an_restart = mv88e639x_sgmii_pcs_an_restart,</div><div class='add'>+	.pcs_config = mv88e639x_sgmii_pcs_config,</div><div class='add'>+	.pcs_link_up = mv88e639x_sgmii_pcs_link_up,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static irqreturn_t mv88e6393x_xg_handle_irq(struct mv88e639x_pcs *mpcs)</div><div class='add'>+{</div><div class='add'>+	u16 int_status, stat1;</div><div class='add'>+	bool link_down;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e639x_read(mpcs, MV88E6393X_10G_INT_STATUS, &amp;int_status);</div><div class='add'>+	if (err)</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+</div><div class='add'>+	if (int_status &amp; MV88E6393X_10G_INT_LINK_CHANGE) {</div><div class='add'>+		err = mv88e639x_read(mpcs, MV88E6390_10G_STAT1, &amp;stat1);</div><div class='add'>+		if (err)</div><div class='add'>+			return IRQ_NONE;</div><div class='add'>+</div><div class='add'>+		link_down = !(stat1 &amp; MDIO_STAT1_LSTATUS);</div><div class='add'>+</div><div class='add'>+		phylink_pcs_change(&amp;mpcs-&gt;xg_pcs, !link_down);</div><div class='add'>+</div><div class='add'>+		return IRQ_HANDLED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return IRQ_NONE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6393x_xg_control_irq(struct mv88e639x_pcs *mpcs, bool enable)</div><div class='add'>+{</div><div class='add'>+	u16 val = 0;</div><div class='add'>+</div><div class='add'>+	if (enable)</div><div class='add'>+		val = MV88E6393X_10G_INT_LINK_CHANGE;</div><div class='add'>+</div><div class='add'>+	return mv88e639x_modify(mpcs, MV88E6393X_10G_INT_ENABLE,</div><div class='add'>+				MV88E6393X_10G_INT_LINK_CHANGE, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6393x_xg_pcs_enable(struct phylink_pcs *pcs)</div><div class='add'>+{</div><div class='add'>+	struct mv88e639x_pcs *mpcs = xg_pcs_to_mv88e639x_pcs(pcs);</div><div class='add'>+</div><div class='add'>+	mpcs-&gt;handle_irq = mv88e6393x_xg_handle_irq;</div><div class='add'>+</div><div class='add'>+	return mv88e6393x_xg_control_irq(mpcs, !!mpcs-&gt;irq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6393x_xg_pcs_disable(struct phylink_pcs *pcs)</div><div class='add'>+{</div><div class='add'>+	struct mv88e639x_pcs *mpcs = xg_pcs_to_mv88e639x_pcs(pcs);</div><div class='add'>+</div><div class='add'>+	mv88e6393x_xg_control_irq(mpcs, false);</div><div class='add'>+	mv88e639x_xg_pcs_disable(mpcs);</div><div class='add'>+	mv88e6393x_power_lane(mpcs, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The PCS has to be powered down while CMODE is changed */</div><div class='add'>+static void mv88e6393x_xg_pcs_pre_config(struct phylink_pcs *pcs,</div><div class='add'>+					 phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct mv88e639x_pcs *mpcs = xg_pcs_to_mv88e639x_pcs(pcs);</div><div class='add'>+</div><div class='add'>+	mv88e639x_xg_pcs_disable(mpcs);</div><div class='add'>+	mv88e6393x_power_lane(mpcs, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6393x_xg_pcs_post_config(struct phylink_pcs *pcs,</div><div class='add'>+					 phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct mv88e639x_pcs *mpcs = xg_pcs_to_mv88e639x_pcs(pcs);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (interface == PHY_INTERFACE_MODE_10GBASER ||</div><div class='add'>+	    interface == PHY_INTERFACE_MODE_USXGMII) {</div><div class='add'>+		err = mv88e6393x_erratum_5_2(mpcs);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mv88e6393x_power_lane(mpcs, true);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e639x_xg_pcs_enable(mpcs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6393x_xg_pcs_get_state(struct phylink_pcs *pcs,</div><div class='add'>+					unsigned int neg_mode,</div><div class='add'>+					struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+	struct mv88e639x_pcs *mpcs = xg_pcs_to_mv88e639x_pcs(pcs);</div><div class='add'>+	u16 status, lp_status;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (state-&gt;interface != PHY_INTERFACE_MODE_USXGMII)</div><div class='add'>+		return mv88e639x_xg_pcs_get_state(pcs, neg_mode, state);</div><div class='add'>+</div><div class='add'>+	state-&gt;link = false;</div><div class='add'>+</div><div class='add'>+	err = mv88e639x_read(mpcs, MV88E6390_USXGMII_PHY_STATUS, &amp;status);</div><div class='add'>+	err = err ? : mv88e639x_read(mpcs, MV88E6390_USXGMII_LP_STATUS, &amp;lp_status);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(mpcs-&gt;mdio.dev.parent,</div><div class='add'>+			"can't read USXGMII status: %pe\n", ERR_PTR(err));</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	state-&gt;link = !!(status &amp; MDIO_USXGMII_LINK);</div><div class='add'>+	state-&gt;an_complete = state-&gt;link;</div><div class='add'>+	phylink_decode_usxgmii_word(state, lp_status);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct phylink_pcs_ops mv88e6393x_xg_pcs_ops = {</div><div class='add'>+	.pcs_enable = mv88e6393x_xg_pcs_enable,</div><div class='add'>+	.pcs_disable = mv88e6393x_xg_pcs_disable,</div><div class='add'>+	.pcs_pre_config = mv88e6393x_xg_pcs_pre_config,</div><div class='add'>+	.pcs_post_config = mv88e6393x_xg_pcs_post_config,</div><div class='add'>+	.pcs_get_state = mv88e6393x_xg_pcs_get_state,</div><div class='add'>+	.pcs_config = mv88e639x_xg_pcs_config,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int mv88e6393x_pcs_init(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	struct mv88e639x_pcs *mpcs;</div><div class='add'>+	struct mii_bus *bus;</div><div class='add'>+	struct device *dev;</div><div class='add'>+	int lane, err;</div><div class='add'>+</div><div class='add'>+	lane = mv88e6xxx_serdes_get_lane(chip, port);</div><div class='add'>+	if (lane &lt; 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	bus = mv88e6xxx_default_mdio_bus(chip);</div><div class='add'>+	dev = chip-&gt;dev;</div><div class='add'>+</div><div class='add'>+	mpcs = mv88e639x_pcs_alloc(dev, bus, lane, port);</div><div class='add'>+	if (!mpcs)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mpcs-&gt;sgmii_pcs.ops = &amp;mv88e6393x_sgmii_pcs_ops;</div><div class='add'>+	mpcs-&gt;xg_pcs.ops = &amp;mv88e6393x_xg_pcs_ops;</div><div class='add'>+	mpcs-&gt;supports_5g = true;</div><div class='add'>+</div><div class='add'>+	err = mv88e6393x_erratum_4_6(mpcs);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free;</div><div class='add'>+</div><div class='add'>+	err = mv88e639x_pcs_setup_irq(mpcs, chip, port);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_free;</div><div class='add'>+</div><div class='add'>+	chip-&gt;ports[port].pcs_private = mpcs;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free:</div><div class='add'>+	kfree(mpcs);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct mv88e6xxx_pcs_ops mv88e6393x_pcs_ops = {</div><div class='add'>+	.pcs_init = mv88e6393x_pcs_init,</div><div class='add'>+	.pcs_teardown = mv88e639x_pcs_teardown,</div><div class='add'>+	.pcs_select = mv88e639x_pcs_select,</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/phy.c b/drivers/net/dsa/mv88e6xxx/phy.c<br/>new file mode 100644<br/>index 000000000000..4e7827ee684a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/phy.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/phy.c</a></div><div class='hunk'>@@ -0,0 +1,281 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Marvell 88e6xxx Ethernet switch PHY and PPU support</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2008 Marvell Semiconductor</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2017 Andrew Lunn &lt;andrew@lunn.ch&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/mdio.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+</div><div class='add'>+#include "chip.h"</div><div class='add'>+#include "phy.h"</div><div class='add'>+</div><div class='add'>+int mv88e6165_phy_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus,</div><div class='add'>+		       int addr, int reg, u16 *val)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_read(chip, addr, reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6165_phy_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus,</div><div class='add'>+			int addr, int reg, u16 val)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_write(chip, addr, reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_phy_read(struct mv88e6xxx_chip *chip, int phy, int reg, u16 *val)</div><div class='add'>+{</div><div class='add'>+	int addr = phy; /* PHY devices addresses start at 0x0 */</div><div class='add'>+	struct mii_bus *bus;</div><div class='add'>+</div><div class='add'>+	bus = mv88e6xxx_default_mdio_bus(chip);</div><div class='add'>+	if (!bus)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (!chip-&gt;info-&gt;ops-&gt;phy_read)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return chip-&gt;info-&gt;ops-&gt;phy_read(chip, bus, addr, reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_phy_write(struct mv88e6xxx_chip *chip, int phy, int reg, u16 val)</div><div class='add'>+{</div><div class='add'>+	int addr = phy; /* PHY devices addresses start at 0x0 */</div><div class='add'>+	struct mii_bus *bus;</div><div class='add'>+</div><div class='add'>+	bus = mv88e6xxx_default_mdio_bus(chip);</div><div class='add'>+	if (!bus)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (!chip-&gt;info-&gt;ops-&gt;phy_write)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return chip-&gt;info-&gt;ops-&gt;phy_write(chip, bus, addr, reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_phy_read_c45(struct mv88e6xxx_chip *chip, int phy, int devad,</div><div class='add'>+			   int reg, u16 *val)</div><div class='add'>+{</div><div class='add'>+	int addr = phy; /* PHY devices addresses start at 0x0 */</div><div class='add'>+	struct mii_bus *bus;</div><div class='add'>+</div><div class='add'>+	bus = mv88e6xxx_default_mdio_bus(chip);</div><div class='add'>+	if (!bus)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (!chip-&gt;info-&gt;ops-&gt;phy_read_c45)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return chip-&gt;info-&gt;ops-&gt;phy_read_c45(chip, bus, addr, devad, reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_phy_write_c45(struct mv88e6xxx_chip *chip, int phy, int devad,</div><div class='add'>+			    int reg, u16 val)</div><div class='add'>+{</div><div class='add'>+	int addr = phy; /* PHY devices addresses start at 0x0 */</div><div class='add'>+	struct mii_bus *bus;</div><div class='add'>+</div><div class='add'>+	bus = mv88e6xxx_default_mdio_bus(chip);</div><div class='add'>+	if (!bus)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (!chip-&gt;info-&gt;ops-&gt;phy_write_c45)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return chip-&gt;info-&gt;ops-&gt;phy_write_c45(chip, bus, addr, devad, reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_phy_page_get(struct mv88e6xxx_chip *chip, int phy, u8 page)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_phy_write(chip, phy, MV88E6XXX_PHY_PAGE, page);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_phy_page_put(struct mv88e6xxx_chip *chip, int phy)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Restore PHY page Copper 0x0 for access via the registered</div><div class='add'>+	 * MDIO bus</div><div class='add'>+	 */</div><div class='add'>+	err = mv88e6xxx_phy_write(chip, phy, MV88E6XXX_PHY_PAGE,</div><div class='add'>+				  MV88E6XXX_PHY_PAGE_COPPER);</div><div class='add'>+	if (unlikely(err)) {</div><div class='add'>+		dev_err(chip-&gt;dev,</div><div class='add'>+			"failed to restore PHY %d page Copper (%d)\n",</div><div class='add'>+			phy, err);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_phy_page_read(struct mv88e6xxx_chip *chip, int phy,</div><div class='add'>+			    u8 page, int reg, u16 *val)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* There is no paging for registers 22 */</div><div class='add'>+	if (reg == MV88E6XXX_PHY_PAGE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_phy_page_get(chip, phy, page);</div><div class='add'>+	if (!err) {</div><div class='add'>+		err = mv88e6xxx_phy_read(chip, phy, reg, val);</div><div class='add'>+		mv88e6xxx_phy_page_put(chip, phy);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_phy_page_write(struct mv88e6xxx_chip *chip, int phy,</div><div class='add'>+			     u8 page, int reg, u16 val)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* There is no paging for registers 22 */</div><div class='add'>+	if (reg == MV88E6XXX_PHY_PAGE)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_phy_page_get(chip, phy, page);</div><div class='add'>+	if (!err) {</div><div class='add'>+		err = mv88e6xxx_phy_write(chip, phy, MV88E6XXX_PHY_PAGE, page);</div><div class='add'>+		if (!err)</div><div class='add'>+			err = mv88e6xxx_phy_write(chip, phy, reg, val);</div><div class='add'>+</div><div class='add'>+		mv88e6xxx_phy_page_put(chip, phy);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_phy_ppu_disable(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	if (!chip-&gt;info-&gt;ops-&gt;ppu_disable)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return chip-&gt;info-&gt;ops-&gt;ppu_disable(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_phy_ppu_enable(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	if (!chip-&gt;info-&gt;ops-&gt;ppu_enable)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return chip-&gt;info-&gt;ops-&gt;ppu_enable(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_phy_ppu_reenable_work(struct work_struct *ugly)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip;</div><div class='add'>+</div><div class='add'>+	chip = container_of(ugly, struct mv88e6xxx_chip, ppu_work);</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+</div><div class='add'>+	if (mutex_trylock(&amp;chip-&gt;ppu_mutex)) {</div><div class='add'>+		if (mv88e6xxx_phy_ppu_enable(chip) == 0)</div><div class='add'>+			chip-&gt;ppu_disabled = 0;</div><div class='add'>+		mutex_unlock(&amp;chip-&gt;ppu_mutex);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_phy_ppu_reenable_timer(struct timer_list *t)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = timer_container_of(chip, t, ppu_timer);</div><div class='add'>+</div><div class='add'>+	schedule_work(&amp;chip-&gt;ppu_work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_phy_ppu_access_get(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;chip-&gt;ppu_mutex);</div><div class='add'>+</div><div class='add'>+	/* If the PHY polling unit is enabled, disable it so that</div><div class='add'>+	 * we can access the PHY registers.  If it was already</div><div class='add'>+	 * disabled, cancel the timer that is going to re-enable</div><div class='add'>+	 * it.</div><div class='add'>+	 */</div><div class='add'>+	if (!chip-&gt;ppu_disabled) {</div><div class='add'>+		ret = mv88e6xxx_phy_ppu_disable(chip);</div><div class='add'>+		if (ret &lt; 0) {</div><div class='add'>+			mutex_unlock(&amp;chip-&gt;ppu_mutex);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+		chip-&gt;ppu_disabled = 1;</div><div class='add'>+	} else {</div><div class='add'>+		timer_delete(&amp;chip-&gt;ppu_timer);</div><div class='add'>+		ret = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_phy_ppu_access_put(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	/* Schedule a timer to re-enable the PHY polling unit. */</div><div class='add'>+	mod_timer(&amp;chip-&gt;ppu_timer, jiffies + msecs_to_jiffies(10));</div><div class='add'>+	mutex_unlock(&amp;chip-&gt;ppu_mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_phy_ppu_state_init(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	mutex_init(&amp;chip-&gt;ppu_mutex);</div><div class='add'>+	INIT_WORK(&amp;chip-&gt;ppu_work, mv88e6xxx_phy_ppu_reenable_work);</div><div class='add'>+	timer_setup(&amp;chip-&gt;ppu_timer, mv88e6xxx_phy_ppu_reenable_timer, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6xxx_phy_ppu_state_destroy(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	mutex_lock(&amp;chip-&gt;ppu_mutex);</div><div class='add'>+	timer_delete_sync(&amp;chip-&gt;ppu_timer);</div><div class='add'>+	cancel_work_sync(&amp;chip-&gt;ppu_work);</div><div class='add'>+	mutex_unlock(&amp;chip-&gt;ppu_mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6185_phy_ppu_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus,</div><div class='add'>+			   int addr, int reg, u16 *val)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_phy_ppu_access_get(chip);</div><div class='add'>+	if (!err) {</div><div class='add'>+		err = mv88e6xxx_read(chip, addr, reg, val);</div><div class='add'>+		mv88e6xxx_phy_ppu_access_put(chip);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6185_phy_ppu_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus,</div><div class='add'>+			    int addr, int reg, u16 val)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_phy_ppu_access_get(chip);</div><div class='add'>+	if (!err) {</div><div class='add'>+		err = mv88e6xxx_write(chip, addr, reg, val);</div><div class='add'>+		mv88e6xxx_phy_ppu_access_put(chip);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mv88e6xxx_phy_init(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;ppu_enable &amp;&amp; chip-&gt;info-&gt;ops-&gt;ppu_disable)</div><div class='add'>+		mv88e6xxx_phy_ppu_state_init(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mv88e6xxx_phy_destroy(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;ppu_enable &amp;&amp; chip-&gt;info-&gt;ops-&gt;ppu_disable)</div><div class='add'>+		mv88e6xxx_phy_ppu_state_destroy(chip);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_phy_setup(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_phy_ppu_enable(chip);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/phy.h b/drivers/net/dsa/mv88e6xxx/phy.h<br/>new file mode 100644<br/>index 000000000000..5f47722364cc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/phy.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/phy.h</a></div><div class='hunk'>@@ -0,0 +1,43 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+/*</div><div class='add'>+ * Marvell 88E6xxx PHY access</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2008 Marvell Semiconductor</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2017 Andrew Lunn &lt;andrew@lunn.ch&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _MV88E6XXX_PHY_H</div><div class='add'>+#define _MV88E6XXX_PHY_H</div><div class='add'>+</div><div class='add'>+#define MV88E6XXX_PHY_PAGE		0x16</div><div class='add'>+#define MV88E6XXX_PHY_PAGE_COPPER	0x00</div><div class='add'>+</div><div class='add'>+/* PHY Registers accesses implementations */</div><div class='add'>+int mv88e6165_phy_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus,</div><div class='add'>+		       int addr, int reg, u16 *val);</div><div class='add'>+int mv88e6165_phy_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus,</div><div class='add'>+			int addr, int reg, u16 val);</div><div class='add'>+int mv88e6185_phy_ppu_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus,</div><div class='add'>+			   int addr, int reg, u16 *val);</div><div class='add'>+int mv88e6185_phy_ppu_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus,</div><div class='add'>+			    int addr, int reg, u16 val);</div><div class='add'>+</div><div class='add'>+/* Generic PHY operations */</div><div class='add'>+int mv88e6xxx_phy_read(struct mv88e6xxx_chip *chip, int phy,</div><div class='add'>+		       int reg, u16 *val);</div><div class='add'>+int mv88e6xxx_phy_write(struct mv88e6xxx_chip *chip, int phy,</div><div class='add'>+			int reg, u16 val);</div><div class='add'>+int mv88e6xxx_phy_read_c45(struct mv88e6xxx_chip *chip, int phy, int devad,</div><div class='add'>+			   int reg, u16 *val);</div><div class='add'>+int mv88e6xxx_phy_write_c45(struct mv88e6xxx_chip *chip, int phy, int devad,</div><div class='add'>+			    int reg, u16 val);</div><div class='add'>+int mv88e6xxx_phy_page_read(struct mv88e6xxx_chip *chip, int phy,</div><div class='add'>+			    u8 page, int reg, u16 *val);</div><div class='add'>+int mv88e6xxx_phy_page_write(struct mv88e6xxx_chip *chip, int phy,</div><div class='add'>+			     u8 page, int reg, u16 val);</div><div class='add'>+void mv88e6xxx_phy_init(struct mv88e6xxx_chip *chip);</div><div class='add'>+void mv88e6xxx_phy_destroy(struct mv88e6xxx_chip *chip);</div><div class='add'>+int mv88e6xxx_phy_setup(struct mv88e6xxx_chip *chip);</div><div class='add'>+</div><div class='add'>+#endif /*_MV88E6XXX_PHY_H */</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/port.c b/drivers/net/dsa/mv88e6xxx/port.c<br/>new file mode 100644<br/>index 000000000000..66b1b7277281<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/port.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/port.c</a></div><div class='hunk'>@@ -0,0 +1,1728 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Marvell 88E6xxx Switch Port Registers support</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2008 Marvell Semiconductor</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2016-2017 Savoir-faire Linux Inc.</div><div class='add'>+ *	Vivien Didelot &lt;vivien.didelot@savoirfairelinux.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/if_bridge.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/phylink.h&gt;</div><div class='add'>+#include &lt;linux/property.h&gt;</div><div class='add'>+#include &lt;linux/string_choices.h&gt;</div><div class='add'>+</div><div class='add'>+#include "chip.h"</div><div class='add'>+#include "global2.h"</div><div class='add'>+#include "port.h"</div><div class='add'>+#include "serdes.h"</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_read(struct mv88e6xxx_chip *chip, int port, int reg,</div><div class='add'>+			u16 *val)</div><div class='add'>+{</div><div class='add'>+	int addr = chip-&gt;info-&gt;port_base_addr + port;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_read(chip, addr, reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_wait_bit(struct mv88e6xxx_chip *chip, int port, int reg,</div><div class='add'>+			    int bit, int val)</div><div class='add'>+{</div><div class='add'>+	int addr = chip-&gt;info-&gt;port_base_addr + port;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_wait_bit(chip, addr, reg, bit, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_write(struct mv88e6xxx_chip *chip, int port, int reg,</div><div class='add'>+			 u16 val)</div><div class='add'>+{</div><div class='add'>+	int addr = chip-&gt;info-&gt;port_base_addr + port;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_write(chip, addr, reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x00: MAC (or PCS or Physical) Status Register</div><div class='add'>+ *</div><div class='add'>+ * For most devices, this is read only. However the 6185 has the MyPause</div><div class='add'>+ * bit read/write.</div><div class='add'>+ */</div><div class='add'>+int mv88e6185_port_set_pause(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+			     int pause)</div><div class='add'>+{</div><div class='add'>+	u16 reg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_STS, &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (pause)</div><div class='add'>+		reg |= MV88E6XXX_PORT_STS_MY_PAUSE;</div><div class='add'>+	else</div><div class='add'>+		reg &amp;= ~MV88E6XXX_PORT_STS_MY_PAUSE;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_STS, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x01: MAC (or PCS or Physical) Control Register</div><div class='add'>+ *</div><div class='add'>+ * Link, Duplex and Flow Control have one force bit, one value bit.</div><div class='add'>+ *</div><div class='add'>+ * For port's MAC speed, ForceSpd (or SpdValue) bits 1:0 program the value.</div><div class='add'>+ * Alternative values require the 200BASE (or AltSpeed) bit 12 set.</div><div class='add'>+ * Newer chips need a ForcedSpd bit 13 set to consider the value.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_set_rgmii_delay(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+					  phy_interface_t mode)</div><div class='add'>+{</div><div class='add'>+	u16 reg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_MAC_CTL, &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	reg &amp;= ~(MV88E6XXX_PORT_MAC_CTL_RGMII_DELAY_RXCLK |</div><div class='add'>+		 MV88E6XXX_PORT_MAC_CTL_RGMII_DELAY_TXCLK);</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='add'>+		reg |= MV88E6XXX_PORT_MAC_CTL_RGMII_DELAY_RXCLK;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='add'>+		reg |= MV88E6XXX_PORT_MAC_CTL_RGMII_DELAY_TXCLK;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='add'>+		reg |= MV88E6XXX_PORT_MAC_CTL_RGMII_DELAY_RXCLK |</div><div class='add'>+			MV88E6XXX_PORT_MAC_CTL_RGMII_DELAY_TXCLK;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_MAC_CTL, reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	dev_dbg(chip-&gt;dev, "p%d: delay RXCLK %s, TXCLK %s\n", port,</div><div class='add'>+		reg &amp; MV88E6XXX_PORT_MAC_CTL_RGMII_DELAY_RXCLK ? "yes" : "no",</div><div class='add'>+		reg &amp; MV88E6XXX_PORT_MAC_CTL_RGMII_DELAY_TXCLK ? "yes" : "no");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6352_port_set_rgmii_delay(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				   phy_interface_t mode)</div><div class='add'>+{</div><div class='add'>+	if (port &lt; 5)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_set_rgmii_delay(chip, port, mode);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6390_port_set_rgmii_delay(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				   phy_interface_t mode)</div><div class='add'>+{</div><div class='add'>+	if (port != 0)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_set_rgmii_delay(chip, port, mode);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6320_port_set_rgmii_delay(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				   phy_interface_t mode)</div><div class='add'>+{</div><div class='add'>+	if (port != 2 &amp;&amp; port != 5 &amp;&amp; port != 6)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_set_rgmii_delay(chip, port, mode);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_set_link(struct mv88e6xxx_chip *chip, int port, int link)</div><div class='add'>+{</div><div class='add'>+	u16 reg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_MAC_CTL, &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	reg &amp;= ~(MV88E6XXX_PORT_MAC_CTL_FORCE_LINK |</div><div class='add'>+		 MV88E6XXX_PORT_MAC_CTL_LINK_UP);</div><div class='add'>+</div><div class='add'>+	switch (link) {</div><div class='add'>+	case LINK_FORCED_DOWN:</div><div class='add'>+		reg |= MV88E6XXX_PORT_MAC_CTL_FORCE_LINK;</div><div class='add'>+		break;</div><div class='add'>+	case LINK_FORCED_UP:</div><div class='add'>+		reg |= MV88E6XXX_PORT_MAC_CTL_FORCE_LINK |</div><div class='add'>+			MV88E6XXX_PORT_MAC_CTL_LINK_UP;</div><div class='add'>+		break;</div><div class='add'>+	case LINK_UNFORCED:</div><div class='add'>+		/* normal link detection */</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_MAC_CTL, reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	dev_dbg(chip-&gt;dev, "p%d: %s link %s\n", port,</div><div class='add'>+		reg &amp; MV88E6XXX_PORT_MAC_CTL_FORCE_LINK ? "Force" : "Unforce",</div><div class='add'>+		str_up_down(reg &amp; MV88E6XXX_PORT_MAC_CTL_LINK_UP));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_sync_link(struct mv88e6xxx_chip *chip, int port, unsigned int mode, bool isup)</div><div class='add'>+{</div><div class='add'>+	const struct mv88e6xxx_ops *ops = chip-&gt;info-&gt;ops;</div><div class='add'>+	int err = 0;</div><div class='add'>+	int link;</div><div class='add'>+</div><div class='add'>+	if (isup)</div><div class='add'>+		link = LINK_FORCED_UP;</div><div class='add'>+	else</div><div class='add'>+		link = LINK_FORCED_DOWN;</div><div class='add'>+</div><div class='add'>+	if (ops-&gt;port_set_link)</div><div class='add'>+		err = ops-&gt;port_set_link(chip, port, link);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6185_port_sync_link(struct mv88e6xxx_chip *chip, int port, unsigned int mode, bool isup)</div><div class='add'>+{</div><div class='add'>+	const struct mv88e6xxx_ops *ops = chip-&gt;info-&gt;ops;</div><div class='add'>+	int err = 0;</div><div class='add'>+	int link;</div><div class='add'>+</div><div class='add'>+	if (mode == MLO_AN_INBAND)</div><div class='add'>+		link = LINK_UNFORCED;</div><div class='add'>+	else if (isup)</div><div class='add'>+		link = LINK_FORCED_UP;</div><div class='add'>+	else</div><div class='add'>+		link = LINK_FORCED_DOWN;</div><div class='add'>+</div><div class='add'>+	if (ops-&gt;port_set_link)</div><div class='add'>+		err = ops-&gt;port_set_link(chip, port, link);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_set_speed_duplex(struct mv88e6xxx_chip *chip,</div><div class='add'>+					   int port, int speed, bool alt_bit,</div><div class='add'>+					   bool force_bit, int duplex)</div><div class='add'>+{</div><div class='add'>+	u16 reg, ctrl;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	switch (speed) {</div><div class='add'>+	case 10:</div><div class='add'>+		ctrl = MV88E6XXX_PORT_MAC_CTL_SPEED_10;</div><div class='add'>+		break;</div><div class='add'>+	case 100:</div><div class='add'>+		ctrl = MV88E6XXX_PORT_MAC_CTL_SPEED_100;</div><div class='add'>+		break;</div><div class='add'>+	case 200:</div><div class='add'>+		if (alt_bit)</div><div class='add'>+			ctrl = MV88E6XXX_PORT_MAC_CTL_SPEED_100 |</div><div class='add'>+				MV88E6390_PORT_MAC_CTL_ALTSPEED;</div><div class='add'>+		else</div><div class='add'>+			ctrl = MV88E6065_PORT_MAC_CTL_SPEED_200;</div><div class='add'>+		break;</div><div class='add'>+	case 1000:</div><div class='add'>+		ctrl = MV88E6XXX_PORT_MAC_CTL_SPEED_1000;</div><div class='add'>+		break;</div><div class='add'>+	case 2500:</div><div class='add'>+		if (alt_bit)</div><div class='add'>+			ctrl = MV88E6390_PORT_MAC_CTL_SPEED_10000 |</div><div class='add'>+				MV88E6390_PORT_MAC_CTL_ALTSPEED;</div><div class='add'>+		else</div><div class='add'>+			ctrl = MV88E6390_PORT_MAC_CTL_SPEED_10000;</div><div class='add'>+		break;</div><div class='add'>+	case 10000:</div><div class='add'>+		/* all bits set, fall through... */</div><div class='add'>+	case SPEED_UNFORCED:</div><div class='add'>+		ctrl = MV88E6XXX_PORT_MAC_CTL_SPEED_UNFORCED;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (duplex) {</div><div class='add'>+	case DUPLEX_HALF:</div><div class='add'>+		ctrl |= MV88E6XXX_PORT_MAC_CTL_FORCE_DUPLEX;</div><div class='add'>+		break;</div><div class='add'>+	case DUPLEX_FULL:</div><div class='add'>+		ctrl |= MV88E6XXX_PORT_MAC_CTL_FORCE_DUPLEX |</div><div class='add'>+			MV88E6XXX_PORT_MAC_CTL_DUPLEX_FULL;</div><div class='add'>+		break;</div><div class='add'>+	case DUPLEX_UNFORCED:</div><div class='add'>+		/* normal duplex detection */</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_MAC_CTL, &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	reg &amp;= ~(MV88E6XXX_PORT_MAC_CTL_SPEED_MASK |</div><div class='add'>+		 MV88E6XXX_PORT_MAC_CTL_FORCE_DUPLEX |</div><div class='add'>+		 MV88E6XXX_PORT_MAC_CTL_DUPLEX_FULL);</div><div class='add'>+</div><div class='add'>+	if (alt_bit)</div><div class='add'>+		reg &amp;= ~MV88E6390_PORT_MAC_CTL_ALTSPEED;</div><div class='add'>+	if (force_bit) {</div><div class='add'>+		reg &amp;= ~MV88E6390_PORT_MAC_CTL_FORCE_SPEED;</div><div class='add'>+		if (speed != SPEED_UNFORCED)</div><div class='add'>+			ctrl |= MV88E6390_PORT_MAC_CTL_FORCE_SPEED;</div><div class='add'>+	}</div><div class='add'>+	reg |= ctrl;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_MAC_CTL, reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (speed != SPEED_UNFORCED)</div><div class='add'>+		dev_dbg(chip-&gt;dev, "p%d: Speed set to %d Mbps\n", port, speed);</div><div class='add'>+	else</div><div class='add'>+		dev_dbg(chip-&gt;dev, "p%d: Speed unforced\n", port);</div><div class='add'>+	dev_dbg(chip-&gt;dev, "p%d: %s %s duplex\n", port,</div><div class='add'>+		reg &amp; MV88E6XXX_PORT_MAC_CTL_FORCE_DUPLEX ? "Force" : "Unforce",</div><div class='add'>+		reg &amp; MV88E6XXX_PORT_MAC_CTL_DUPLEX_FULL ? "full" : "half");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Support 10, 100, 1000 Mbps (e.g. 88E6185 family) */</div><div class='add'>+int mv88e6185_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				    int speed, int duplex)</div><div class='add'>+{</div><div class='add'>+	if (speed == 200 || speed &gt; 1000)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_set_speed_duplex(chip, port, speed, false, false,</div><div class='add'>+					       duplex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Support 10, 100 Mbps (e.g. 88E6250 family) */</div><div class='add'>+int mv88e6250_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				    int speed, int duplex)</div><div class='add'>+{</div><div class='add'>+	if (speed &gt; 100)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_set_speed_duplex(chip, port, speed, false, false,</div><div class='add'>+					       duplex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Support 10, 100, 200, 1000, 2500 Mbps (e.g. 88E6341) */</div><div class='add'>+int mv88e6341_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				    int speed, int duplex)</div><div class='add'>+{</div><div class='add'>+	if (speed &gt; 2500)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (speed == 200 &amp;&amp; port != 0)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (speed == 2500 &amp;&amp; port &lt; 5)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_set_speed_duplex(chip, port, speed, !port, true,</div><div class='add'>+					       duplex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+phy_interface_t mv88e6341_port_max_speed_mode(struct mv88e6xxx_chip *chip,</div><div class='add'>+					      int port)</div><div class='add'>+{</div><div class='add'>+	if (port == 5)</div><div class='add'>+		return PHY_INTERFACE_MODE_2500BASEX;</div><div class='add'>+</div><div class='add'>+	return PHY_INTERFACE_MODE_NA;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Support 10, 100, 200, 1000 Mbps (e.g. 88E6352 family) */</div><div class='add'>+int mv88e6352_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				    int speed, int duplex)</div><div class='add'>+{</div><div class='add'>+	if (speed &gt; 1000)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (speed == 200 &amp;&amp; port &lt; 5)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_set_speed_duplex(chip, port, speed, true, false,</div><div class='add'>+					       duplex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Support 10, 100, 200, 1000, 2500 Mbps (e.g. 88E6390) */</div><div class='add'>+int mv88e6390_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				    int speed, int duplex)</div><div class='add'>+{</div><div class='add'>+	if (speed &gt; 2500)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (speed == 200 &amp;&amp; port != 0)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (speed == 2500 &amp;&amp; port &lt; 9)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_set_speed_duplex(chip, port, speed, true, true,</div><div class='add'>+					       duplex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+phy_interface_t mv88e6390_port_max_speed_mode(struct mv88e6xxx_chip *chip,</div><div class='add'>+					      int port)</div><div class='add'>+{</div><div class='add'>+	if (port == 9 || port == 10)</div><div class='add'>+		return PHY_INTERFACE_MODE_2500BASEX;</div><div class='add'>+</div><div class='add'>+	return PHY_INTERFACE_MODE_NA;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Support 10, 100, 200, 1000, 2500, 10000 Mbps (e.g. 88E6190X) */</div><div class='add'>+int mv88e6390x_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				     int speed, int duplex)</div><div class='add'>+{</div><div class='add'>+	if (speed == 200 &amp;&amp; port != 0)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (speed &gt;= 2500 &amp;&amp; port &lt; 9)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_set_speed_duplex(chip, port, speed, true, true,</div><div class='add'>+					       duplex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+phy_interface_t mv88e6390x_port_max_speed_mode(struct mv88e6xxx_chip *chip,</div><div class='add'>+					       int port)</div><div class='add'>+{</div><div class='add'>+	if (port == 9 || port == 10)</div><div class='add'>+		return PHY_INTERFACE_MODE_XAUI;</div><div class='add'>+</div><div class='add'>+	return PHY_INTERFACE_MODE_NA;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Support 10, 100, 200, 1000, 2500, 5000, 10000 Mbps (e.g. 88E6393X)</div><div class='add'>+ * Function mv88e6xxx_port_set_speed_duplex() can't be used as the register</div><div class='add'>+ * values for speeds 2500 &amp; 5000 conflict.</div><div class='add'>+ */</div><div class='add'>+int mv88e6393x_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				     int speed, int duplex)</div><div class='add'>+{</div><div class='add'>+	u16 reg, ctrl;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;info-&gt;prod_num == MV88E6XXX_PORT_SWITCH_ID_PROD_6361 &amp;&amp;</div><div class='add'>+	    speed &gt; 2500)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (speed == 200 &amp;&amp; port != 0)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (speed &gt;= 2500 &amp;&amp; port &gt; 0 &amp;&amp; port &lt; 9)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	switch (speed) {</div><div class='add'>+	case 10:</div><div class='add'>+		ctrl = MV88E6XXX_PORT_MAC_CTL_SPEED_10;</div><div class='add'>+		break;</div><div class='add'>+	case 100:</div><div class='add'>+		ctrl = MV88E6XXX_PORT_MAC_CTL_SPEED_100;</div><div class='add'>+		break;</div><div class='add'>+	case 200:</div><div class='add'>+		ctrl = MV88E6XXX_PORT_MAC_CTL_SPEED_100 |</div><div class='add'>+			MV88E6390_PORT_MAC_CTL_ALTSPEED;</div><div class='add'>+		break;</div><div class='add'>+	case 1000:</div><div class='add'>+		ctrl = MV88E6XXX_PORT_MAC_CTL_SPEED_1000;</div><div class='add'>+		break;</div><div class='add'>+	case 2500:</div><div class='add'>+		ctrl = MV88E6XXX_PORT_MAC_CTL_SPEED_1000 |</div><div class='add'>+			MV88E6390_PORT_MAC_CTL_ALTSPEED;</div><div class='add'>+		break;</div><div class='add'>+	case 5000:</div><div class='add'>+		ctrl = MV88E6390_PORT_MAC_CTL_SPEED_10000 |</div><div class='add'>+			MV88E6390_PORT_MAC_CTL_ALTSPEED;</div><div class='add'>+		break;</div><div class='add'>+	case 10000:</div><div class='add'>+	case SPEED_UNFORCED:</div><div class='add'>+		ctrl = MV88E6XXX_PORT_MAC_CTL_SPEED_UNFORCED;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (duplex) {</div><div class='add'>+	case DUPLEX_HALF:</div><div class='add'>+		ctrl |= MV88E6XXX_PORT_MAC_CTL_FORCE_DUPLEX;</div><div class='add'>+		break;</div><div class='add'>+	case DUPLEX_FULL:</div><div class='add'>+		ctrl |= MV88E6XXX_PORT_MAC_CTL_FORCE_DUPLEX |</div><div class='add'>+			MV88E6XXX_PORT_MAC_CTL_DUPLEX_FULL;</div><div class='add'>+		break;</div><div class='add'>+	case DUPLEX_UNFORCED:</div><div class='add'>+		/* normal duplex detection */</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_MAC_CTL, &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	reg &amp;= ~(MV88E6XXX_PORT_MAC_CTL_SPEED_MASK |</div><div class='add'>+		 MV88E6390_PORT_MAC_CTL_ALTSPEED |</div><div class='add'>+		 MV88E6390_PORT_MAC_CTL_FORCE_SPEED);</div><div class='add'>+</div><div class='add'>+	if (speed != SPEED_UNFORCED)</div><div class='add'>+		reg |= MV88E6390_PORT_MAC_CTL_FORCE_SPEED;</div><div class='add'>+</div><div class='add'>+	reg |= ctrl;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_MAC_CTL, reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (speed != SPEED_UNFORCED)</div><div class='add'>+		dev_dbg(chip-&gt;dev, "p%d: Speed set to %d Mbps\n", port, speed);</div><div class='add'>+	else</div><div class='add'>+		dev_dbg(chip-&gt;dev, "p%d: Speed unforced\n", port);</div><div class='add'>+	dev_dbg(chip-&gt;dev, "p%d: %s %s duplex\n", port,</div><div class='add'>+		reg &amp; MV88E6XXX_PORT_MAC_CTL_FORCE_DUPLEX ? "Force" : "Unforce",</div><div class='add'>+		reg &amp; MV88E6XXX_PORT_MAC_CTL_DUPLEX_FULL ? "full" : "half");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+phy_interface_t mv88e6393x_port_max_speed_mode(struct mv88e6xxx_chip *chip,</div><div class='add'>+					       int port)</div><div class='add'>+{</div><div class='add'>+</div><div class='add'>+	if (port != 0 &amp;&amp; port != 9 &amp;&amp; port != 10)</div><div class='add'>+		return PHY_INTERFACE_MODE_NA;</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;info-&gt;prod_num == MV88E6XXX_PORT_SWITCH_ID_PROD_6361)</div><div class='add'>+		return PHY_INTERFACE_MODE_2500BASEX;</div><div class='add'>+</div><div class='add'>+	return PHY_INTERFACE_MODE_10GBASER;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_set_cmode(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				    phy_interface_t mode, bool force)</div><div class='add'>+{</div><div class='add'>+	u16 cmode;</div><div class='add'>+	u16 reg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Default to a slow mode, so freeing up SERDES interfaces for</div><div class='add'>+	 * other ports which might use them for SFPs.</div><div class='add'>+	 */</div><div class='add'>+	if (mode == PHY_INTERFACE_MODE_NA)</div><div class='add'>+		mode = PHY_INTERFACE_MODE_1000BASEX;</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case PHY_INTERFACE_MODE_RMII:</div><div class='add'>+		cmode = MV88E6XXX_PORT_STS_CMODE_RMII;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='add'>+		cmode = MV88E6XXX_PORT_STS_CMODE_RGMII;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_1000BASEX:</div><div class='add'>+		cmode = MV88E6XXX_PORT_STS_CMODE_1000BASEX;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_SGMII:</div><div class='add'>+		cmode = MV88E6XXX_PORT_STS_CMODE_SGMII;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_2500BASEX:</div><div class='add'>+		cmode = MV88E6XXX_PORT_STS_CMODE_2500BASEX;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_5GBASER:</div><div class='add'>+		cmode = MV88E6393X_PORT_STS_CMODE_5GBASER;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_XGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_XAUI:</div><div class='add'>+		cmode = MV88E6XXX_PORT_STS_CMODE_XAUI;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_RXAUI:</div><div class='add'>+		cmode = MV88E6XXX_PORT_STS_CMODE_RXAUI;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_10GBASER:</div><div class='add'>+		cmode = MV88E6393X_PORT_STS_CMODE_10GBASER;</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_USXGMII:</div><div class='add'>+		cmode = MV88E6393X_PORT_STS_CMODE_USXGMII;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		cmode = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* cmode doesn't change, nothing to do for us unless forced */</div><div class='add'>+	if (cmode == chip-&gt;ports[port].cmode &amp;&amp; !force)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	chip-&gt;ports[port].cmode = 0;</div><div class='add'>+</div><div class='add'>+	if (cmode) {</div><div class='add'>+		err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_STS, &amp;reg);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		reg &amp;= ~MV88E6XXX_PORT_STS_CMODE_MASK;</div><div class='add'>+		reg |= cmode;</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_STS, reg);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		chip-&gt;ports[port].cmode = cmode;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6390x_port_set_cmode(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+			      phy_interface_t mode)</div><div class='add'>+{</div><div class='add'>+	if (port != 9 &amp;&amp; port != 10)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_set_cmode(chip, port, mode, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6390_port_set_cmode(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+			     phy_interface_t mode)</div><div class='add'>+{</div><div class='add'>+	if (port != 9 &amp;&amp; port != 10)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case PHY_INTERFACE_MODE_NA:</div><div class='add'>+		return 0;</div><div class='add'>+	case PHY_INTERFACE_MODE_XGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_XAUI:</div><div class='add'>+	case PHY_INTERFACE_MODE_RXAUI:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_set_cmode(chip, port, mode, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6393x_port_set_cmode(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+			      phy_interface_t mode)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	u16 reg;</div><div class='add'>+</div><div class='add'>+	if (port != 0 &amp;&amp; port != 9 &amp;&amp; port != 10)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (port == 9 || port == 10) {</div><div class='add'>+		switch (mode) {</div><div class='add'>+		case PHY_INTERFACE_MODE_RMII:</div><div class='add'>+		case PHY_INTERFACE_MODE_RGMII:</div><div class='add'>+		case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='add'>+		case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='add'>+		case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* mv88e6393x errata 4.5: EEE should be disabled on SERDES ports */</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_MAC_CTL, &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	reg &amp;= ~MV88E6XXX_PORT_MAC_CTL_EEE;</div><div class='add'>+	reg |= MV88E6XXX_PORT_MAC_CTL_FORCE_EEE;</div><div class='add'>+	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_MAC_CTL, reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_set_cmode(chip, port, mode, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6341_port_set_cmode_writable(struct mv88e6xxx_chip *chip,</div><div class='add'>+					     int port)</div><div class='add'>+{</div><div class='add'>+	int err, addr;</div><div class='add'>+	u16 reg, bits;</div><div class='add'>+</div><div class='add'>+	if (port != 5)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	addr = chip-&gt;info-&gt;port_base_addr + port;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_hidden_read(chip, 0x7, addr, 0, &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	bits = MV88E6341_PORT_RESERVED_1A_FORCE_CMODE |</div><div class='add'>+	       MV88E6341_PORT_RESERVED_1A_SGMII_AN;</div><div class='add'>+</div><div class='add'>+	if ((reg &amp; bits) == bits)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	reg |= bits;</div><div class='add'>+	return mv88e6xxx_port_hidden_write(chip, 0x7, addr, 0, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6341_port_set_cmode(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+			     phy_interface_t mode)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (port != 5)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case PHY_INTERFACE_MODE_NA:</div><div class='add'>+		return 0;</div><div class='add'>+	case PHY_INTERFACE_MODE_XGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_XAUI:</div><div class='add'>+	case PHY_INTERFACE_MODE_RXAUI:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = mv88e6341_port_set_cmode_writable(chip, port);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_set_cmode(chip, port, mode, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6185_port_get_cmode(struct mv88e6xxx_chip *chip, int port, u8 *cmode)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	u16 reg;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_STS, &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	*cmode = reg &amp; MV88E6185_PORT_STS_CMODE_MASK;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6352_port_get_cmode(struct mv88e6xxx_chip *chip, int port, u8 *cmode)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	u16 reg;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_STS, &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	*cmode = reg &amp; MV88E6XXX_PORT_STS_CMODE_MASK;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x02: Jamming Control</div><div class='add'>+ *</div><div class='add'>+ * Do not limit the period of time that this port can be paused for by</div><div class='add'>+ * the remote end or the period of time that this port can pause the</div><div class='add'>+ * remote end.</div><div class='add'>+ */</div><div class='add'>+int mv88e6097_port_pause_limit(struct mv88e6xxx_chip *chip, int port, u8 in,</div><div class='add'>+			       u8 out)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_port_write(chip, port, MV88E6097_PORT_JAM_CTL,</div><div class='add'>+				    out &lt;&lt; 8 | in);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6390_port_pause_limit(struct mv88e6xxx_chip *chip, int port, u8 in,</div><div class='add'>+			       u8 out)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_write(chip, port, MV88E6390_PORT_FLOW_CTL,</div><div class='add'>+				   MV88E6390_PORT_FLOW_CTL_UPDATE |</div><div class='add'>+				   MV88E6390_PORT_FLOW_CTL_LIMIT_IN | in);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_write(chip, port, MV88E6390_PORT_FLOW_CTL,</div><div class='add'>+				    MV88E6390_PORT_FLOW_CTL_UPDATE |</div><div class='add'>+				    MV88E6390_PORT_FLOW_CTL_LIMIT_OUT | out);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x04: Port Control Register */</div><div class='add'>+</div><div class='add'>+static const char * const mv88e6xxx_port_state_names[] = {</div><div class='add'>+	[MV88E6XXX_PORT_CTL0_STATE_DISABLED] = "Disabled",</div><div class='add'>+	[MV88E6XXX_PORT_CTL0_STATE_BLOCKING] = "Blocking/Listening",</div><div class='add'>+	[MV88E6XXX_PORT_CTL0_STATE_LEARNING] = "Learning",</div><div class='add'>+	[MV88E6XXX_PORT_CTL0_STATE_FORWARDING] = "Forwarding",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_set_state(struct mv88e6xxx_chip *chip, int port, u8 state)</div><div class='add'>+{</div><div class='add'>+	u16 reg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_CTL0, &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	reg &amp;= ~MV88E6XXX_PORT_CTL0_STATE_MASK;</div><div class='add'>+</div><div class='add'>+	switch (state) {</div><div class='add'>+	case BR_STATE_DISABLED:</div><div class='add'>+		state = MV88E6XXX_PORT_CTL0_STATE_DISABLED;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_BLOCKING:</div><div class='add'>+	case BR_STATE_LISTENING:</div><div class='add'>+		state = MV88E6XXX_PORT_CTL0_STATE_BLOCKING;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_LEARNING:</div><div class='add'>+		state = MV88E6XXX_PORT_CTL0_STATE_LEARNING;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_FORWARDING:</div><div class='add'>+		state = MV88E6XXX_PORT_CTL0_STATE_FORWARDING;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	reg |= state;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL0, reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	dev_dbg(chip-&gt;dev, "p%d: PortState set to %s\n", port,</div><div class='add'>+		mv88e6xxx_port_state_names[state]);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_set_egress_mode(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				   enum mv88e6xxx_egress_mode mode)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	u16 reg;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_CTL0, &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	reg &amp;= ~MV88E6XXX_PORT_CTL0_EGRESS_MODE_MASK;</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case MV88E6XXX_EGRESS_MODE_UNMODIFIED:</div><div class='add'>+		reg |= MV88E6XXX_PORT_CTL0_EGRESS_MODE_UNMODIFIED;</div><div class='add'>+		break;</div><div class='add'>+	case MV88E6XXX_EGRESS_MODE_UNTAGGED:</div><div class='add'>+		reg |= MV88E6XXX_PORT_CTL0_EGRESS_MODE_UNTAGGED;</div><div class='add'>+		break;</div><div class='add'>+	case MV88E6XXX_EGRESS_MODE_TAGGED:</div><div class='add'>+		reg |= MV88E6XXX_PORT_CTL0_EGRESS_MODE_TAGGED;</div><div class='add'>+		break;</div><div class='add'>+	case MV88E6XXX_EGRESS_MODE_ETHERTYPE:</div><div class='add'>+		reg |= MV88E6XXX_PORT_CTL0_EGRESS_MODE_ETHER_TYPE_DSA;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL0, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6085_port_set_frame_mode(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				  enum mv88e6xxx_frame_mode mode)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	u16 reg;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_CTL0, &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	reg &amp;= ~MV88E6XXX_PORT_CTL0_FRAME_MODE_MASK;</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case MV88E6XXX_FRAME_MODE_NORMAL:</div><div class='add'>+		reg |= MV88E6XXX_PORT_CTL0_FRAME_MODE_NORMAL;</div><div class='add'>+		break;</div><div class='add'>+	case MV88E6XXX_FRAME_MODE_DSA:</div><div class='add'>+		reg |= MV88E6XXX_PORT_CTL0_FRAME_MODE_DSA;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL0, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6351_port_set_frame_mode(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				  enum mv88e6xxx_frame_mode mode)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	u16 reg;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_CTL0, &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	reg &amp;= ~MV88E6XXX_PORT_CTL0_FRAME_MODE_MASK;</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case MV88E6XXX_FRAME_MODE_NORMAL:</div><div class='add'>+		reg |= MV88E6XXX_PORT_CTL0_FRAME_MODE_NORMAL;</div><div class='add'>+		break;</div><div class='add'>+	case MV88E6XXX_FRAME_MODE_DSA:</div><div class='add'>+		reg |= MV88E6XXX_PORT_CTL0_FRAME_MODE_DSA;</div><div class='add'>+		break;</div><div class='add'>+	case MV88E6XXX_FRAME_MODE_PROVIDER:</div><div class='add'>+		reg |= MV88E6XXX_PORT_CTL0_FRAME_MODE_PROVIDER;</div><div class='add'>+		break;</div><div class='add'>+	case MV88E6XXX_FRAME_MODE_ETHERTYPE:</div><div class='add'>+		reg |= MV88E6XXX_PORT_CTL0_FRAME_MODE_ETHER_TYPE_DSA;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL0, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6185_port_set_forward_unknown(struct mv88e6xxx_chip *chip,</div><div class='add'>+				       int port, bool unicast)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	u16 reg;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_CTL0, &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (unicast)</div><div class='add'>+		reg |= MV88E6185_PORT_CTL0_FORWARD_UNKNOWN;</div><div class='add'>+	else</div><div class='add'>+		reg &amp;= ~MV88E6185_PORT_CTL0_FORWARD_UNKNOWN;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL0, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6352_port_set_ucast_flood(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				   bool unicast)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	u16 reg;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_CTL0, &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (unicast)</div><div class='add'>+		reg |= MV88E6352_PORT_CTL0_EGRESS_FLOODS_UC;</div><div class='add'>+	else</div><div class='add'>+		reg &amp;= ~MV88E6352_PORT_CTL0_EGRESS_FLOODS_UC;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL0, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6352_port_set_mcast_flood(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				   bool multicast)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	u16 reg;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_CTL0, &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (multicast)</div><div class='add'>+		reg |= MV88E6352_PORT_CTL0_EGRESS_FLOODS_MC;</div><div class='add'>+	else</div><div class='add'>+		reg &amp;= ~MV88E6352_PORT_CTL0_EGRESS_FLOODS_MC;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL0, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x05: Port Control 1 */</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_set_message_port(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				    bool message_port)</div><div class='add'>+{</div><div class='add'>+	u16 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_CTL1, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (message_port)</div><div class='add'>+		val |= MV88E6XXX_PORT_CTL1_MESSAGE_PORT;</div><div class='add'>+	else</div><div class='add'>+		val &amp;= ~MV88E6XXX_PORT_CTL1_MESSAGE_PORT;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL1, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_set_trunk(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+			     bool trunk, u8 id)</div><div class='add'>+{</div><div class='add'>+	u16 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_CTL1, &amp;val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	val &amp;= ~MV88E6XXX_PORT_CTL1_TRUNK_ID_MASK;</div><div class='add'>+</div><div class='add'>+	if (trunk)</div><div class='add'>+		val |= MV88E6XXX_PORT_CTL1_TRUNK_PORT |</div><div class='add'>+			(id &lt;&lt; MV88E6XXX_PORT_CTL1_TRUNK_ID_SHIFT);</div><div class='add'>+	else</div><div class='add'>+		val &amp;= ~MV88E6XXX_PORT_CTL1_TRUNK_PORT;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL1, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x06: Port Based VLAN Map */</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_set_vlan_map(struct mv88e6xxx_chip *chip, int port, u16 map)</div><div class='add'>+{</div><div class='add'>+	const u16 mask = mv88e6xxx_port_mask(chip);</div><div class='add'>+	u16 reg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_BASE_VLAN, &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	reg &amp;= ~mask;</div><div class='add'>+	reg |= map &amp; mask;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_BASE_VLAN, reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	dev_dbg(chip-&gt;dev, "p%d: VLANTable set to %.3x\n", port, map);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_get_fid(struct mv88e6xxx_chip *chip, int port, u16 *fid)</div><div class='add'>+{</div><div class='add'>+	const u16 upper_mask = (mv88e6xxx_num_databases(chip) - 1) &gt;&gt; 4;</div><div class='add'>+	u16 reg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Port's default FID lower 4 bits are located in reg 0x06, offset 12 */</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_BASE_VLAN, &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	*fid = (reg &amp; 0xf000) &gt;&gt; 12;</div><div class='add'>+</div><div class='add'>+	/* Port's default FID upper bits are located in reg 0x05, offset 0 */</div><div class='add'>+	if (upper_mask) {</div><div class='add'>+		err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_CTL1,</div><div class='add'>+					  &amp;reg);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		*fid |= (reg &amp; upper_mask) &lt;&lt; 4;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_set_fid(struct mv88e6xxx_chip *chip, int port, u16 fid)</div><div class='add'>+{</div><div class='add'>+	const u16 upper_mask = (mv88e6xxx_num_databases(chip) - 1) &gt;&gt; 4;</div><div class='add'>+	u16 reg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (fid &gt;= mv88e6xxx_num_databases(chip))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Port's default FID lower 4 bits are located in reg 0x06, offset 12 */</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_BASE_VLAN, &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	reg &amp;= 0x0fff;</div><div class='add'>+	reg |= (fid &amp; 0x000f) &lt;&lt; 12;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_BASE_VLAN, reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Port's default FID upper bits are located in reg 0x05, offset 0 */</div><div class='add'>+	if (upper_mask) {</div><div class='add'>+		err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_CTL1,</div><div class='add'>+					  &amp;reg);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		reg &amp;= ~upper_mask;</div><div class='add'>+		reg |= (fid &gt;&gt; 4) &amp; upper_mask;</div><div class='add'>+</div><div class='add'>+		err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL1,</div><div class='add'>+					   reg);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(chip-&gt;dev, "p%d: FID set to %u\n", port, fid);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x07: Default Port VLAN ID &amp; Priority */</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_get_pvid(struct mv88e6xxx_chip *chip, int port, u16 *pvid)</div><div class='add'>+{</div><div class='add'>+	u16 reg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_DEFAULT_VLAN,</div><div class='add'>+				  &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	*pvid = reg &amp; MV88E6XXX_PORT_DEFAULT_VLAN_MASK;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_set_pvid(struct mv88e6xxx_chip *chip, int port, u16 pvid)</div><div class='add'>+{</div><div class='add'>+	u16 reg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_DEFAULT_VLAN,</div><div class='add'>+				  &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	reg &amp;= ~MV88E6XXX_PORT_DEFAULT_VLAN_MASK;</div><div class='add'>+	reg |= pvid &amp; MV88E6XXX_PORT_DEFAULT_VLAN_MASK;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_DEFAULT_VLAN,</div><div class='add'>+				   reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	dev_dbg(chip-&gt;dev, "p%d: DefaultVID set to %u\n", port, pvid);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x08: Port Control 2 Register */</div><div class='add'>+</div><div class='add'>+static const char * const mv88e6xxx_port_8021q_mode_names[] = {</div><div class='add'>+	[MV88E6XXX_PORT_CTL2_8021Q_MODE_DISABLED] = "Disabled",</div><div class='add'>+	[MV88E6XXX_PORT_CTL2_8021Q_MODE_FALLBACK] = "Fallback",</div><div class='add'>+	[MV88E6XXX_PORT_CTL2_8021Q_MODE_CHECK] = "Check",</div><div class='add'>+	[MV88E6XXX_PORT_CTL2_8021Q_MODE_SECURE] = "Secure",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int mv88e6185_port_set_default_forward(struct mv88e6xxx_chip *chip,</div><div class='add'>+				       int port, bool multicast)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	u16 reg;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_CTL2, &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (multicast)</div><div class='add'>+		reg |= MV88E6XXX_PORT_CTL2_DEFAULT_FORWARD;</div><div class='add'>+	else</div><div class='add'>+		reg &amp;= ~MV88E6XXX_PORT_CTL2_DEFAULT_FORWARD;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL2, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6095_port_set_upstream_port(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				     int upstream_port)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	u16 reg;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_CTL2, &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	reg &amp;= ~MV88E6095_PORT_CTL2_CPU_PORT_MASK;</div><div class='add'>+	reg |= upstream_port;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL2, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_set_mirror(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+			      enum mv88e6xxx_egress_direction direction,</div><div class='add'>+			      bool mirror)</div><div class='add'>+{</div><div class='add'>+	bool *mirror_port;</div><div class='add'>+	u16 reg;</div><div class='add'>+	u16 bit;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_CTL2, &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	switch (direction) {</div><div class='add'>+	case MV88E6XXX_EGRESS_DIR_INGRESS:</div><div class='add'>+		bit = MV88E6XXX_PORT_CTL2_INGRESS_MONITOR;</div><div class='add'>+		mirror_port = &amp;chip-&gt;ports[port].mirror_ingress;</div><div class='add'>+		break;</div><div class='add'>+	case MV88E6XXX_EGRESS_DIR_EGRESS:</div><div class='add'>+		bit = MV88E6XXX_PORT_CTL2_EGRESS_MONITOR;</div><div class='add'>+		mirror_port = &amp;chip-&gt;ports[port].mirror_egress;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	reg &amp;= ~bit;</div><div class='add'>+	if (mirror)</div><div class='add'>+		reg |= bit;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL2, reg);</div><div class='add'>+	if (!err)</div><div class='add'>+		*mirror_port = mirror;</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_set_lock(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+			    bool locked)</div><div class='add'>+{</div><div class='add'>+	u16 reg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_CTL0, &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	reg &amp;= ~MV88E6XXX_PORT_CTL0_SA_FILT_MASK;</div><div class='add'>+	if (locked)</div><div class='add'>+		reg |= MV88E6XXX_PORT_CTL0_SA_FILT_DROP_ON_LOCK;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL0, reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_ASSOC_VECTOR, &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	reg &amp;= ~MV88E6XXX_PORT_ASSOC_VECTOR_LOCKED_PORT;</div><div class='add'>+	if (locked)</div><div class='add'>+		reg |= MV88E6XXX_PORT_ASSOC_VECTOR_LOCKED_PORT;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_ASSOC_VECTOR, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_set_8021q_mode(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				  u16 mode)</div><div class='add'>+{</div><div class='add'>+	u16 reg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_CTL2, &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	reg &amp;= ~MV88E6XXX_PORT_CTL2_8021Q_MODE_MASK;</div><div class='add'>+	reg |= mode &amp; MV88E6XXX_PORT_CTL2_8021Q_MODE_MASK;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL2, reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	dev_dbg(chip-&gt;dev, "p%d: 802.1QMode set to %s\n", port,</div><div class='add'>+		mv88e6xxx_port_8021q_mode_names[mode]);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_drop_untagged(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				 bool drop_untagged)</div><div class='add'>+{</div><div class='add'>+	u16 old, new;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_CTL2, &amp;old);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (drop_untagged)</div><div class='add'>+		new = old | MV88E6XXX_PORT_CTL2_DISCARD_UNTAGGED;</div><div class='add'>+	else</div><div class='add'>+		new = old &amp; ~MV88E6XXX_PORT_CTL2_DISCARD_UNTAGGED;</div><div class='add'>+</div><div class='add'>+	if (new == old)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL2, new);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_set_map_da(struct mv88e6xxx_chip *chip, int port, bool map)</div><div class='add'>+{</div><div class='add'>+	u16 reg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_CTL2, &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (map)</div><div class='add'>+		reg |= MV88E6XXX_PORT_CTL2_MAP_DA;</div><div class='add'>+	else</div><div class='add'>+		reg &amp;= ~MV88E6XXX_PORT_CTL2_MAP_DA;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL2, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6165_port_set_jumbo_size(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				  size_t size)</div><div class='add'>+{</div><div class='add'>+	u16 reg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	size += VLAN_ETH_HLEN + ETH_FCS_LEN;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_CTL2, &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	reg &amp;= ~MV88E6XXX_PORT_CTL2_JUMBO_MODE_MASK;</div><div class='add'>+</div><div class='add'>+	if (size &lt;= 1522)</div><div class='add'>+		reg |= MV88E6XXX_PORT_CTL2_JUMBO_MODE_1522;</div><div class='add'>+	else if (size &lt;= 2048)</div><div class='add'>+		reg |= MV88E6XXX_PORT_CTL2_JUMBO_MODE_2048;</div><div class='add'>+	else if (size &lt;= 10240)</div><div class='add'>+		reg |= MV88E6XXX_PORT_CTL2_JUMBO_MODE_10240;</div><div class='add'>+	else</div><div class='add'>+		return -ERANGE;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL2, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x09: Port Rate Control */</div><div class='add'>+</div><div class='add'>+int mv88e6095_port_egress_rate_limiting(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_EGRESS_RATE_CTL1,</div><div class='add'>+				    0x0000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6097_port_egress_rate_limiting(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_EGRESS_RATE_CTL1,</div><div class='add'>+				    0x0001);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x0B: Port Association Vector */</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_set_assoc_vector(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				    u16 pav)</div><div class='add'>+{</div><div class='add'>+	u16 reg, mask;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_ASSOC_VECTOR,</div><div class='add'>+				  &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	mask = mv88e6xxx_port_mask(chip);</div><div class='add'>+	reg &amp;= ~mask;</div><div class='add'>+	reg |= pav &amp; mask;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_ASSOC_VECTOR,</div><div class='add'>+				    reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x0C: Port ATU Control */</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_disable_learn_limit(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_ATU_CTL, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x0D: (Priority) Override Register */</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_disable_pri_override(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_PRI_OVERRIDE, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x0E: Policy &amp; MGMT Control Register for FAMILY 6191X 6193X 6393X */</div><div class='add'>+</div><div class='add'>+static int mv88e6393x_port_policy_read(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				       u16 pointer, u8 *data)</div><div class='add'>+{</div><div class='add'>+	u16 reg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_write(chip, port, MV88E6393X_PORT_POLICY_MGMT_CTL,</div><div class='add'>+				   pointer);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6393X_PORT_POLICY_MGMT_CTL,</div><div class='add'>+				  &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	*data = reg;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6393x_port_policy_write(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+					u16 pointer, u8 data)</div><div class='add'>+{</div><div class='add'>+	u16 reg;</div><div class='add'>+</div><div class='add'>+	reg = MV88E6393X_PORT_POLICY_MGMT_CTL_UPDATE | pointer | data;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_write(chip, port, MV88E6393X_PORT_POLICY_MGMT_CTL,</div><div class='add'>+				    reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6393x_port_policy_write_all(struct mv88e6xxx_chip *chip,</div><div class='add'>+					    u16 pointer, u8 data)</div><div class='add'>+{</div><div class='add'>+	int err, port;</div><div class='add'>+</div><div class='add'>+	for (port = 0; port &lt; mv88e6xxx_num_ports(chip); port++) {</div><div class='add'>+		if (dsa_is_unused_port(chip-&gt;ds, port))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		err = mv88e6393x_port_policy_write(chip, port, pointer, data);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6393x_set_egress_port(struct mv88e6xxx_chip *chip,</div><div class='add'>+			       enum mv88e6xxx_egress_direction direction,</div><div class='add'>+			       int port)</div><div class='add'>+{</div><div class='add'>+	u16 ptr;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	switch (direction) {</div><div class='add'>+	case MV88E6XXX_EGRESS_DIR_INGRESS:</div><div class='add'>+		ptr = MV88E6393X_PORT_POLICY_MGMT_CTL_PTR_INGRESS_DEST;</div><div class='add'>+		err = mv88e6393x_port_policy_write_all(chip, ptr, port);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+		break;</div><div class='add'>+	case MV88E6XXX_EGRESS_DIR_EGRESS:</div><div class='add'>+		ptr = MV88E6393X_G2_EGRESS_MONITOR_DEST;</div><div class='add'>+		err = mv88e6xxx_g2_write(chip, ptr, port);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6393x_port_set_upstream_port(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				      int upstream_port)</div><div class='add'>+{</div><div class='add'>+	u16 ptr = MV88E6393X_PORT_POLICY_MGMT_CTL_PTR_CPU_DEST;</div><div class='add'>+	u8 data = MV88E6393X_PORT_POLICY_MGMT_CTL_CPU_DEST_MGMTPRI |</div><div class='add'>+		  upstream_port;</div><div class='add'>+</div><div class='add'>+	return mv88e6393x_port_policy_write(chip, port, ptr, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6393x_port_mgmt_rsvd2cpu(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	u16 ptr;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Consider the frames with reserved multicast destination</div><div class='add'>+	 * addresses matching 01:80:c2:00:00:00 and</div><div class='add'>+	 * 01:80:c2:00:00:02 as MGMT.</div><div class='add'>+	 */</div><div class='add'>+	ptr = MV88E6393X_PORT_POLICY_MGMT_CTL_PTR_01C280000000XLO;</div><div class='add'>+	err = mv88e6393x_port_policy_write_all(chip, ptr, 0xff);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	ptr = MV88E6393X_PORT_POLICY_MGMT_CTL_PTR_01C280000000XHI;</div><div class='add'>+	err = mv88e6393x_port_policy_write_all(chip, ptr, 0xff);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	ptr = MV88E6393X_PORT_POLICY_MGMT_CTL_PTR_01C280000002XLO;</div><div class='add'>+	err = mv88e6393x_port_policy_write_all(chip, ptr, 0xff);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	ptr = MV88E6393X_PORT_POLICY_MGMT_CTL_PTR_01C280000002XHI;</div><div class='add'>+	err = mv88e6393x_port_policy_write_all(chip, ptr, 0xff);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x10 &amp; 0x11: EPC */</div><div class='add'>+</div><div class='add'>+static int mv88e6393x_port_epc_wait_ready(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	int bit = __bf_shf(MV88E6393X_PORT_EPC_CMD_BUSY);</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_wait_bit(chip, port, MV88E6393X_PORT_EPC_CMD, bit, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Port Ether type for 6393X family */</div><div class='add'>+</div><div class='add'>+int mv88e6393x_port_set_ether_type(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				   u16 etype)</div><div class='add'>+{</div><div class='add'>+	u16 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6393x_port_epc_wait_ready(chip, port);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_write(chip, port, MV88E6393X_PORT_EPC_DATA, etype);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	val = MV88E6393X_PORT_EPC_CMD_BUSY |</div><div class='add'>+	      MV88E6393X_PORT_EPC_CMD_WRITE |</div><div class='add'>+	      MV88E6393X_PORT_EPC_INDEX_PORT_ETYPE;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_write(chip, port, MV88E6393X_PORT_EPC_CMD, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x0f: Port Ether type */</div><div class='add'>+</div><div class='add'>+int mv88e6351_port_set_ether_type(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				  u16 etype)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_ETH_TYPE, etype);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x18: Port IEEE Priority Remapping Registers [0-3]</div><div class='add'>+ * Offset 0x19: Port IEEE Priority Remapping Registers [4-7]</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+int mv88e6095_port_tag_remap(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Use a direct priority mapping for all IEEE tagged frames */</div><div class='add'>+	err = mv88e6xxx_port_write(chip, port,</div><div class='add'>+				   MV88E6095_PORT_IEEE_PRIO_REMAP_0123,</div><div class='add'>+				   0x3210);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_write(chip, port,</div><div class='add'>+				    MV88E6095_PORT_IEEE_PRIO_REMAP_4567,</div><div class='add'>+				    0x7654);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_port_ieeepmt_write(struct mv88e6xxx_chip *chip,</div><div class='add'>+					int port, u16 table, u8 ptr, u16 data)</div><div class='add'>+{</div><div class='add'>+	u16 reg;</div><div class='add'>+</div><div class='add'>+	reg = MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_UPDATE | table |</div><div class='add'>+		(ptr &lt;&lt; __bf_shf(MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_PTR_MASK)) |</div><div class='add'>+		(data &amp; MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_DATA_MASK);</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_write(chip, port,</div><div class='add'>+				    MV88E6390_PORT_IEEE_PRIO_MAP_TABLE, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6390_port_tag_remap(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	int err, i;</div><div class='add'>+	u16 table;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt;= 7; i++) {</div><div class='add'>+		table = MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_INGRESS_PCP;</div><div class='add'>+		err = mv88e6xxx_port_ieeepmt_write(chip, port, table, i,</div><div class='add'>+						   (i | i &lt;&lt; 4));</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		table = MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_EGRESS_GREEN_PCP;</div><div class='add'>+		err = mv88e6xxx_port_ieeepmt_write(chip, port, table, i, i);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		table = MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_EGRESS_YELLOW_PCP;</div><div class='add'>+		err = mv88e6xxx_port_ieeepmt_write(chip, port, table, i, i);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		table = MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_EGRESS_AVB_PCP;</div><div class='add'>+		err = mv88e6xxx_port_ieeepmt_write(chip, port, table, i, i);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Offset 0x0E: Policy Control Register */</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+mv88e6xxx_port_policy_mapping_get_pos(enum mv88e6xxx_policy_mapping mapping,</div><div class='add'>+				      enum mv88e6xxx_policy_action action,</div><div class='add'>+				      u16 *mask, u16 *val, int *shift)</div><div class='add'>+{</div><div class='add'>+	switch (mapping) {</div><div class='add'>+	case MV88E6XXX_POLICY_MAPPING_DA:</div><div class='add'>+		*shift = __bf_shf(MV88E6XXX_PORT_POLICY_CTL_DA_MASK);</div><div class='add'>+		*mask = MV88E6XXX_PORT_POLICY_CTL_DA_MASK;</div><div class='add'>+		break;</div><div class='add'>+	case MV88E6XXX_POLICY_MAPPING_SA:</div><div class='add'>+		*shift = __bf_shf(MV88E6XXX_PORT_POLICY_CTL_SA_MASK);</div><div class='add'>+		*mask = MV88E6XXX_PORT_POLICY_CTL_SA_MASK;</div><div class='add'>+		break;</div><div class='add'>+	case MV88E6XXX_POLICY_MAPPING_VTU:</div><div class='add'>+		*shift = __bf_shf(MV88E6XXX_PORT_POLICY_CTL_VTU_MASK);</div><div class='add'>+		*mask = MV88E6XXX_PORT_POLICY_CTL_VTU_MASK;</div><div class='add'>+		break;</div><div class='add'>+	case MV88E6XXX_POLICY_MAPPING_ETYPE:</div><div class='add'>+		*shift = __bf_shf(MV88E6XXX_PORT_POLICY_CTL_ETYPE_MASK);</div><div class='add'>+		*mask = MV88E6XXX_PORT_POLICY_CTL_ETYPE_MASK;</div><div class='add'>+		break;</div><div class='add'>+	case MV88E6XXX_POLICY_MAPPING_PPPOE:</div><div class='add'>+		*shift = __bf_shf(MV88E6XXX_PORT_POLICY_CTL_PPPOE_MASK);</div><div class='add'>+		*mask = MV88E6XXX_PORT_POLICY_CTL_PPPOE_MASK;</div><div class='add'>+		break;</div><div class='add'>+	case MV88E6XXX_POLICY_MAPPING_VBAS:</div><div class='add'>+		*shift = __bf_shf(MV88E6XXX_PORT_POLICY_CTL_VBAS_MASK);</div><div class='add'>+		*mask = MV88E6XXX_PORT_POLICY_CTL_VBAS_MASK;</div><div class='add'>+		break;</div><div class='add'>+	case MV88E6XXX_POLICY_MAPPING_OPT82:</div><div class='add'>+		*shift = __bf_shf(MV88E6XXX_PORT_POLICY_CTL_OPT82_MASK);</div><div class='add'>+		*mask = MV88E6XXX_PORT_POLICY_CTL_OPT82_MASK;</div><div class='add'>+		break;</div><div class='add'>+	case MV88E6XXX_POLICY_MAPPING_UDP:</div><div class='add'>+		*shift = __bf_shf(MV88E6XXX_PORT_POLICY_CTL_UDP_MASK);</div><div class='add'>+		*mask = MV88E6XXX_PORT_POLICY_CTL_UDP_MASK;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (action) {</div><div class='add'>+	case MV88E6XXX_POLICY_ACTION_NORMAL:</div><div class='add'>+		*val = MV88E6XXX_PORT_POLICY_CTL_NORMAL;</div><div class='add'>+		break;</div><div class='add'>+	case MV88E6XXX_POLICY_ACTION_MIRROR:</div><div class='add'>+		*val = MV88E6XXX_PORT_POLICY_CTL_MIRROR;</div><div class='add'>+		break;</div><div class='add'>+	case MV88E6XXX_POLICY_ACTION_TRAP:</div><div class='add'>+		*val = MV88E6XXX_PORT_POLICY_CTL_TRAP;</div><div class='add'>+		break;</div><div class='add'>+	case MV88E6XXX_POLICY_ACTION_DISCARD:</div><div class='add'>+		*val = MV88E6XXX_PORT_POLICY_CTL_DISCARD;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6352_port_set_policy(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+			      enum mv88e6xxx_policy_mapping mapping,</div><div class='add'>+			      enum mv88e6xxx_policy_action action)</div><div class='add'>+{</div><div class='add'>+	u16 reg, mask, val;</div><div class='add'>+	int shift;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_policy_mapping_get_pos(mapping, action, &amp;mask,</div><div class='add'>+						    &amp;val, &amp;shift);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_POLICY_CTL, &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	reg &amp;= ~mask;</div><div class='add'>+	reg |= (val &lt;&lt; shift) &amp; mask;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_POLICY_CTL, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6393x_port_set_policy(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+			       enum mv88e6xxx_policy_mapping mapping,</div><div class='add'>+			       enum mv88e6xxx_policy_action action)</div><div class='add'>+{</div><div class='add'>+	u16 mask, val;</div><div class='add'>+	int shift;</div><div class='add'>+	int err;</div><div class='add'>+	u16 ptr;</div><div class='add'>+	u8 reg;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_policy_mapping_get_pos(mapping, action, &amp;mask,</div><div class='add'>+						    &amp;val, &amp;shift);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* The 16-bit Port Policy CTL register from older chips is on 6393x</div><div class='add'>+	 * changed to Port Policy MGMT CTL, which can access more data, but</div><div class='add'>+	 * indirectly. The original 16-bit value is divided into two 8-bit</div><div class='add'>+	 * registers.</div><div class='add'>+	 */</div><div class='add'>+	ptr = shift / 8;</div><div class='add'>+	shift %= 8;</div><div class='add'>+	mask &gt;&gt;= ptr * 8;</div><div class='add'>+	ptr &lt;&lt;= 8;</div><div class='add'>+</div><div class='add'>+	err = mv88e6393x_port_policy_read(chip, port, ptr, &amp;reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	reg &amp;= ~mask;</div><div class='add'>+	reg |= (val &lt;&lt; shift) &amp; mask;</div><div class='add'>+</div><div class='add'>+	return mv88e6393x_port_policy_write(chip, port, ptr, reg);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/port.h b/drivers/net/dsa/mv88e6xxx/port.h<br/>new file mode 100644<br/>index 000000000000..c1d2f99efb1c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/port.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/port.h</a></div><div class='hunk'>@@ -0,0 +1,611 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+/*</div><div class='add'>+ * Marvell 88E6xxx Switch Port Registers support</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2008 Marvell Semiconductor</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2016-2017 Savoir-faire Linux Inc.</div><div class='add'>+ *	Vivien Didelot &lt;vivien.didelot@savoirfairelinux.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _MV88E6XXX_PORT_H</div><div class='add'>+#define _MV88E6XXX_PORT_H</div><div class='add'>+</div><div class='add'>+#include "chip.h"</div><div class='add'>+</div><div class='add'>+/* Offset 0x00: Port Status Register */</div><div class='add'>+#define MV88E6XXX_PORT_STS			0x00</div><div class='add'>+#define MV88E6XXX_PORT_STS_PAUSE_EN		0x8000</div><div class='add'>+#define MV88E6XXX_PORT_STS_MY_PAUSE		0x4000</div><div class='add'>+#define MV88E6XXX_PORT_STS_HD_FLOW		0x2000</div><div class='add'>+#define MV88E6XXX_PORT_STS_PHY_DETECT		0x1000</div><div class='add'>+#define MV88E6250_PORT_STS_LINK				0x1000</div><div class='add'>+#define MV88E6250_PORT_STS_PORTMODE_MASK		0x0f00</div><div class='add'>+#define MV88E6250_PORT_STS_PORTMODE_PHY_10_HALF		0x0800</div><div class='add'>+#define MV88E6250_PORT_STS_PORTMODE_PHY_100_HALF	0x0900</div><div class='add'>+#define MV88E6250_PORT_STS_PORTMODE_PHY_10_FULL		0x0a00</div><div class='add'>+#define MV88E6250_PORT_STS_PORTMODE_PHY_100_FULL	0x0b00</div><div class='add'>+/* - Modes with PHY suffix use output instead of input clock</div><div class='add'>+ * - Modes without RMII or RGMII use MII</div><div class='add'>+ * - Modes without speed do not have a fixed speed specified in the manual</div><div class='add'>+ *   ("DC to x MHz" - variable clock support?)</div><div class='add'>+ */</div><div class='add'>+#define MV88E6250_PORT_STS_PORTMODE_MII_DISABLED		0x0000</div><div class='add'>+#define MV88E6250_PORT_STS_PORTMODE_MII_100_RGMII		0x0100</div><div class='add'>+#define MV88E6250_PORT_STS_PORTMODE_MII_DUAL_100_RMII_FULL_PHY	0x0200</div><div class='add'>+#define MV88E6250_PORT_STS_PORTMODE_MII_200_RMII_FULL_PHY	0x0400</div><div class='add'>+#define MV88E6250_PORT_STS_PORTMODE_MII_DUAL_100_RMII_FULL	0x0600</div><div class='add'>+#define MV88E6250_PORT_STS_PORTMODE_MII_10_100_RMII_FULL	0x0700</div><div class='add'>+#define MV88E6250_PORT_STS_PORTMODE_MII_HALF			0x0800</div><div class='add'>+#define MV88E6250_PORT_STS_PORTMODE_MII_10_100_RMII_HALF_PHY	0x0900</div><div class='add'>+#define MV88E6250_PORT_STS_PORTMODE_MII_FULL			0x0a00</div><div class='add'>+#define MV88E6250_PORT_STS_PORTMODE_MII_10_100_RMII_FULL_PHY	0x0b00</div><div class='add'>+#define MV88E6250_PORT_STS_PORTMODE_MII_10_HALF_PHY		0x0c00</div><div class='add'>+#define MV88E6250_PORT_STS_PORTMODE_MII_100_HALF_PHY		0x0d00</div><div class='add'>+#define MV88E6250_PORT_STS_PORTMODE_MII_10_FULL_PHY		0x0e00</div><div class='add'>+#define MV88E6250_PORT_STS_PORTMODE_MII_100_FULL_PHY		0x0f00</div><div class='add'>+#define MV88E6XXX_PORT_STS_LINK			0x0800</div><div class='add'>+#define MV88E6XXX_PORT_STS_DUPLEX		0x0400</div><div class='add'>+#define MV88E6XXX_PORT_STS_SPEED_MASK		0x0300</div><div class='add'>+#define MV88E6XXX_PORT_STS_SPEED_10		0x0000</div><div class='add'>+#define MV88E6XXX_PORT_STS_SPEED_100		0x0100</div><div class='add'>+#define MV88E6XXX_PORT_STS_SPEED_1000		0x0200</div><div class='add'>+#define MV88E6XXX_PORT_STS_SPEED_10000		0x0300</div><div class='add'>+#define MV88E6352_PORT_STS_EEE			0x0040</div><div class='add'>+#define MV88E6165_PORT_STS_AM_DIS		0x0040</div><div class='add'>+#define MV88E6185_PORT_STS_MGMII		0x0040</div><div class='add'>+#define MV88E6XXX_PORT_STS_TX_PAUSED		0x0020</div><div class='add'>+#define MV88E6XXX_PORT_STS_FLOW_CTL		0x0010</div><div class='add'>+#define MV88E6XXX_PORT_STS_CMODE_MASK		0x000f</div><div class='add'>+#define MV88E6XXX_PORT_STS_CMODE_MII_PHY	0x0001</div><div class='add'>+#define MV88E6XXX_PORT_STS_CMODE_MII		0x0002</div><div class='add'>+#define MV88E6XXX_PORT_STS_CMODE_GMII		0x0003</div><div class='add'>+#define MV88E6XXX_PORT_STS_CMODE_RMII_PHY	0x0004</div><div class='add'>+#define MV88E6XXX_PORT_STS_CMODE_RMII		0x0005</div><div class='add'>+#define MV88E6XXX_PORT_STS_CMODE_RGMII		0x0007</div><div class='add'>+#define MV88E6XXX_PORT_STS_CMODE_100BASEX	0x0008</div><div class='add'>+#define MV88E6XXX_PORT_STS_CMODE_1000BASEX	0x0009</div><div class='add'>+#define MV88E6XXX_PORT_STS_CMODE_SGMII		0x000a</div><div class='add'>+#define MV88E6XXX_PORT_STS_CMODE_2500BASEX	0x000b</div><div class='add'>+#define MV88E6XXX_PORT_STS_CMODE_XAUI		0x000c</div><div class='add'>+#define MV88E6XXX_PORT_STS_CMODE_RXAUI		0x000d</div><div class='add'>+#define MV88E6393X_PORT_STS_CMODE_5GBASER	0x000c</div><div class='add'>+#define MV88E6393X_PORT_STS_CMODE_10GBASER	0x000d</div><div class='add'>+#define MV88E6393X_PORT_STS_CMODE_USXGMII	0x000e</div><div class='add'>+#define MV88E6185_PORT_STS_CDUPLEX		0x0008</div><div class='add'>+#define MV88E6185_PORT_STS_CMODE_MASK		0x0007</div><div class='add'>+#define MV88E6185_PORT_STS_CMODE_GMII_FD	0x0000</div><div class='add'>+#define MV88E6185_PORT_STS_CMODE_MII_100_FD_PS	0x0001</div><div class='add'>+#define MV88E6185_PORT_STS_CMODE_MII_100	0x0002</div><div class='add'>+#define MV88E6185_PORT_STS_CMODE_MII_10		0x0003</div><div class='add'>+#define MV88E6185_PORT_STS_CMODE_SERDES		0x0004</div><div class='add'>+#define MV88E6185_PORT_STS_CMODE_1000BASE_X	0x0005</div><div class='add'>+#define MV88E6185_PORT_STS_CMODE_PHY		0x0006</div><div class='add'>+#define MV88E6185_PORT_STS_CMODE_DISABLED	0x0007</div><div class='add'>+</div><div class='add'>+/* Offset 0x01: MAC (or PCS or Physical) Control Register */</div><div class='add'>+#define MV88E6XXX_PORT_MAC_CTL				0x01</div><div class='add'>+#define MV88E6XXX_PORT_MAC_CTL_RGMII_DELAY_RXCLK	0x8000</div><div class='add'>+#define MV88E6XXX_PORT_MAC_CTL_RGMII_DELAY_TXCLK	0x4000</div><div class='add'>+#define MV88E6185_PORT_MAC_CTL_SYNC_OK			0x4000</div><div class='add'>+#define MV88E6390_PORT_MAC_CTL_FORCE_SPEED		0x2000</div><div class='add'>+#define MV88E6390_PORT_MAC_CTL_ALTSPEED			0x1000</div><div class='add'>+#define MV88E6352_PORT_MAC_CTL_200BASE			0x1000</div><div class='add'>+#define MV88E6XXX_PORT_MAC_CTL_EEE			0x0200</div><div class='add'>+#define MV88E6XXX_PORT_MAC_CTL_FORCE_EEE		0x0100</div><div class='add'>+#define MV88E6185_PORT_MAC_CTL_AN_EN			0x0400</div><div class='add'>+#define MV88E6185_PORT_MAC_CTL_AN_RESTART		0x0200</div><div class='add'>+#define MV88E6185_PORT_MAC_CTL_AN_DONE			0x0100</div><div class='add'>+#define MV88E6XXX_PORT_MAC_CTL_FC			0x0080</div><div class='add'>+#define MV88E6XXX_PORT_MAC_CTL_FORCE_FC			0x0040</div><div class='add'>+#define MV88E6XXX_PORT_MAC_CTL_LINK_UP			0x0020</div><div class='add'>+#define MV88E6XXX_PORT_MAC_CTL_FORCE_LINK		0x0010</div><div class='add'>+#define MV88E6XXX_PORT_MAC_CTL_DUPLEX_FULL		0x0008</div><div class='add'>+#define MV88E6XXX_PORT_MAC_CTL_FORCE_DUPLEX		0x0004</div><div class='add'>+#define MV88E6XXX_PORT_MAC_CTL_SPEED_MASK		0x0003</div><div class='add'>+#define MV88E6XXX_PORT_MAC_CTL_SPEED_10			0x0000</div><div class='add'>+#define MV88E6XXX_PORT_MAC_CTL_SPEED_100		0x0001</div><div class='add'>+#define MV88E6065_PORT_MAC_CTL_SPEED_200		0x0002</div><div class='add'>+#define MV88E6XXX_PORT_MAC_CTL_SPEED_1000		0x0002</div><div class='add'>+#define MV88E6390_PORT_MAC_CTL_SPEED_10000		0x0003</div><div class='add'>+#define MV88E6XXX_PORT_MAC_CTL_SPEED_UNFORCED		0x0003</div><div class='add'>+</div><div class='add'>+/* Offset 0x02: Jamming Control Register */</div><div class='add'>+#define MV88E6097_PORT_JAM_CTL			0x02</div><div class='add'>+#define MV88E6097_PORT_JAM_CTL_LIMIT_OUT_MASK	0xff00</div><div class='add'>+#define MV88E6097_PORT_JAM_CTL_LIMIT_IN_MASK	0x00ff</div><div class='add'>+</div><div class='add'>+/* Offset 0x02: Flow Control Register */</div><div class='add'>+#define MV88E6390_PORT_FLOW_CTL			0x02</div><div class='add'>+#define MV88E6390_PORT_FLOW_CTL_UPDATE		0x8000</div><div class='add'>+#define MV88E6390_PORT_FLOW_CTL_PTR_MASK	0x7f00</div><div class='add'>+#define MV88E6390_PORT_FLOW_CTL_LIMIT_IN	0x0000</div><div class='add'>+#define MV88E6390_PORT_FLOW_CTL_LIMIT_OUT	0x0100</div><div class='add'>+#define MV88E6390_PORT_FLOW_CTL_DATA_MASK	0x00ff</div><div class='add'>+</div><div class='add'>+/* Offset 0x03: Switch Identifier Register */</div><div class='add'>+#define MV88E6XXX_PORT_SWITCH_ID		0x03</div><div class='add'>+#define MV88E6XXX_PORT_SWITCH_ID_PROD_MASK	0xfff0</div><div class='add'>+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6020	0x0200</div><div class='add'>+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6071	0x0710</div><div class='add'>+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6085	0x04a0</div><div class='add'>+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6095	0x0950</div><div class='add'>+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6097	0x0990</div><div class='add'>+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6190X	0x0a00</div><div class='add'>+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6390X	0x0a10</div><div class='add'>+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6131	0x1060</div><div class='add'>+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6320	0x1150</div><div class='add'>+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6123	0x1210</div><div class='add'>+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6161	0x1610</div><div class='add'>+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6165	0x1650</div><div class='add'>+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6171	0x1710</div><div class='add'>+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6172	0x1720</div><div class='add'>+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6175	0x1750</div><div class='add'>+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6176	0x1760</div><div class='add'>+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6190	0x1900</div><div class='add'>+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6191	0x1910</div><div class='add'>+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6191X	0x1920</div><div class='add'>+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6193X	0x1930</div><div class='add'>+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6185	0x1a70</div><div class='add'>+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6220	0x2200</div><div class='add'>+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6240	0x2400</div><div class='add'>+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6250	0x2500</div><div class='add'>+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6361	0x2610</div><div class='add'>+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6290	0x2900</div><div class='add'>+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6321	0x3100</div><div class='add'>+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6141	0x3400</div><div class='add'>+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6341	0x3410</div><div class='add'>+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6352	0x3520</div><div class='add'>+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6350	0x3710</div><div class='add'>+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6351	0x3750</div><div class='add'>+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6390	0x3900</div><div class='add'>+#define MV88E6XXX_PORT_SWITCH_ID_PROD_6393X	0x3930</div><div class='add'>+#define MV88E6XXX_PORT_SWITCH_ID_REV_MASK	0x000f</div><div class='add'>+</div><div class='add'>+/* Offset 0x04: Port Control Register */</div><div class='add'>+#define MV88E6XXX_PORT_CTL0					0x04</div><div class='add'>+#define MV88E6XXX_PORT_CTL0_USE_CORE_TAG			0x8000</div><div class='add'>+#define MV88E6XXX_PORT_CTL0_SA_FILT_MASK			0xc000</div><div class='add'>+#define MV88E6XXX_PORT_CTL0_SA_FILT_DISABLED			0x0000</div><div class='add'>+#define MV88E6XXX_PORT_CTL0_SA_FILT_DROP_ON_LOCK		0x4000</div><div class='add'>+#define MV88E6XXX_PORT_CTL0_SA_FILT_DROP_ON_UNLOCK		0x8000</div><div class='add'>+#define MV88E6XXX_PORT_CTL0_SA_FILT_DROP_ON_CPU		0xc000</div><div class='add'>+#define MV88E6XXX_PORT_CTL0_EGRESS_MODE_MASK			0x3000</div><div class='add'>+#define MV88E6XXX_PORT_CTL0_EGRESS_MODE_UNMODIFIED		0x0000</div><div class='add'>+#define MV88E6XXX_PORT_CTL0_EGRESS_MODE_UNTAGGED		0x1000</div><div class='add'>+#define MV88E6XXX_PORT_CTL0_EGRESS_MODE_TAGGED			0x2000</div><div class='add'>+#define MV88E6XXX_PORT_CTL0_EGRESS_MODE_ETHER_TYPE_DSA		0x3000</div><div class='add'>+#define MV88E6XXX_PORT_CTL0_HEADER				0x0800</div><div class='add'>+#define MV88E6XXX_PORT_CTL0_IGMP_MLD_SNOOP			0x0400</div><div class='add'>+#define MV88E6XXX_PORT_CTL0_DOUBLE_TAG				0x0200</div><div class='add'>+#define MV88E6XXX_PORT_CTL0_FRAME_MODE_MASK			0x0300</div><div class='add'>+#define MV88E6XXX_PORT_CTL0_FRAME_MODE_NORMAL			0x0000</div><div class='add'>+#define MV88E6XXX_PORT_CTL0_FRAME_MODE_DSA			0x0100</div><div class='add'>+#define MV88E6XXX_PORT_CTL0_FRAME_MODE_PROVIDER			0x0200</div><div class='add'>+#define MV88E6XXX_PORT_CTL0_FRAME_MODE_ETHER_TYPE_DSA		0x0300</div><div class='add'>+#define MV88E6XXX_PORT_CTL0_DSA_TAG				0x0100</div><div class='add'>+#define MV88E6XXX_PORT_CTL0_VLAN_TUNNEL				0x0080</div><div class='add'>+#define MV88E6XXX_PORT_CTL0_TAG_IF_BOTH				0x0040</div><div class='add'>+#define MV88E6185_PORT_CTL0_USE_IP				0x0020</div><div class='add'>+#define MV88E6185_PORT_CTL0_USE_TAG				0x0010</div><div class='add'>+#define MV88E6185_PORT_CTL0_FORWARD_UNKNOWN			0x0004</div><div class='add'>+#define MV88E6352_PORT_CTL0_EGRESS_FLOODS_UC			0x0004</div><div class='add'>+#define MV88E6352_PORT_CTL0_EGRESS_FLOODS_MC			0x0008</div><div class='add'>+#define MV88E6XXX_PORT_CTL0_STATE_MASK				0x0003</div><div class='add'>+#define MV88E6XXX_PORT_CTL0_STATE_DISABLED			0x0000</div><div class='add'>+#define MV88E6XXX_PORT_CTL0_STATE_BLOCKING			0x0001</div><div class='add'>+#define MV88E6XXX_PORT_CTL0_STATE_LEARNING			0x0002</div><div class='add'>+#define MV88E6XXX_PORT_CTL0_STATE_FORWARDING			0x0003</div><div class='add'>+</div><div class='add'>+/* Offset 0x05: Port Control 1 */</div><div class='add'>+#define MV88E6XXX_PORT_CTL1			0x05</div><div class='add'>+#define MV88E6XXX_PORT_CTL1_MESSAGE_PORT	0x8000</div><div class='add'>+#define MV88E6XXX_PORT_CTL1_TRUNK_PORT		0x4000</div><div class='add'>+#define MV88E6XXX_PORT_CTL1_TRUNK_ID_MASK	0x0f00</div><div class='add'>+#define MV88E6XXX_PORT_CTL1_TRUNK_ID_SHIFT	8</div><div class='add'>+#define MV88E6XXX_PORT_CTL1_FID_11_4_MASK	0x00ff</div><div class='add'>+</div><div class='add'>+/* Offset 0x06: Port Based VLAN Map */</div><div class='add'>+#define MV88E6XXX_PORT_BASE_VLAN		0x06</div><div class='add'>+#define MV88E6XXX_PORT_BASE_VLAN_FID_3_0_MASK	0xf000</div><div class='add'>+</div><div class='add'>+/* Offset 0x07: Default Port VLAN ID &amp; Priority */</div><div class='add'>+#define MV88E6XXX_PORT_DEFAULT_VLAN		0x07</div><div class='add'>+#define MV88E6XXX_PORT_DEFAULT_VLAN_MASK	0x0fff</div><div class='add'>+</div><div class='add'>+/* Offset 0x08: Port Control 2 Register */</div><div class='add'>+#define MV88E6XXX_PORT_CTL2				0x08</div><div class='add'>+#define MV88E6XXX_PORT_CTL2_IGNORE_FCS			0x8000</div><div class='add'>+#define MV88E6XXX_PORT_CTL2_VTU_PRI_OVERRIDE		0x4000</div><div class='add'>+#define MV88E6XXX_PORT_CTL2_SA_PRIO_OVERRIDE		0x2000</div><div class='add'>+#define MV88E6XXX_PORT_CTL2_DA_PRIO_OVERRIDE		0x1000</div><div class='add'>+#define MV88E6XXX_PORT_CTL2_JUMBO_MODE_MASK		0x3000</div><div class='add'>+#define MV88E6XXX_PORT_CTL2_JUMBO_MODE_1522		0x0000</div><div class='add'>+#define MV88E6XXX_PORT_CTL2_JUMBO_MODE_2048		0x1000</div><div class='add'>+#define MV88E6XXX_PORT_CTL2_JUMBO_MODE_10240		0x2000</div><div class='add'>+#define MV88E6XXX_PORT_CTL2_8021Q_MODE_MASK		0x0c00</div><div class='add'>+#define MV88E6XXX_PORT_CTL2_8021Q_MODE_DISABLED		0x0000</div><div class='add'>+#define MV88E6XXX_PORT_CTL2_8021Q_MODE_FALLBACK		0x0400</div><div class='add'>+#define MV88E6XXX_PORT_CTL2_8021Q_MODE_CHECK		0x0800</div><div class='add'>+#define MV88E6XXX_PORT_CTL2_8021Q_MODE_SECURE		0x0c00</div><div class='add'>+#define MV88E6XXX_PORT_CTL2_DISCARD_TAGGED		0x0200</div><div class='add'>+#define MV88E6XXX_PORT_CTL2_DISCARD_UNTAGGED		0x0100</div><div class='add'>+#define MV88E6XXX_PORT_CTL2_MAP_DA			0x0080</div><div class='add'>+#define MV88E6XXX_PORT_CTL2_DEFAULT_FORWARD		0x0040</div><div class='add'>+#define MV88E6XXX_PORT_CTL2_EGRESS_MONITOR		0x0020</div><div class='add'>+#define MV88E6XXX_PORT_CTL2_INGRESS_MONITOR		0x0010</div><div class='add'>+#define MV88E6095_PORT_CTL2_CPU_PORT_MASK		0x000f</div><div class='add'>+</div><div class='add'>+/* Offset 0x09: Egress Rate Control */</div><div class='add'>+#define MV88E6XXX_PORT_EGRESS_RATE_CTL1		0x09</div><div class='add'>+</div><div class='add'>+/* Offset 0x0A: Egress Rate Control 2 */</div><div class='add'>+#define MV88E6XXX_PORT_EGRESS_RATE_CTL2		0x0a</div><div class='add'>+</div><div class='add'>+/* Offset 0x0B: Port Association Vector */</div><div class='add'>+#define MV88E6XXX_PORT_ASSOC_VECTOR			0x0b</div><div class='add'>+#define MV88E6XXX_PORT_ASSOC_VECTOR_HOLD_AT_1		0x8000</div><div class='add'>+#define MV88E6XXX_PORT_ASSOC_VECTOR_INT_AGE_OUT		0x4000</div><div class='add'>+#define MV88E6XXX_PORT_ASSOC_VECTOR_LOCKED_PORT		0x2000</div><div class='add'>+#define MV88E6XXX_PORT_ASSOC_VECTOR_IGNORE_WRONG	0x1000</div><div class='add'>+#define MV88E6XXX_PORT_ASSOC_VECTOR_REFRESH_LOCKED	0x0800</div><div class='add'>+</div><div class='add'>+/* Offset 0x0C: Port ATU Control */</div><div class='add'>+#define MV88E6XXX_PORT_ATU_CTL		0x0c</div><div class='add'>+</div><div class='add'>+/* Offset 0x0D: Priority Override Register */</div><div class='add'>+#define MV88E6XXX_PORT_PRI_OVERRIDE	0x0d</div><div class='add'>+</div><div class='add'>+/* Offset 0x0E: Policy Control Register */</div><div class='add'>+#define MV88E6XXX_PORT_POLICY_CTL		0x0e</div><div class='add'>+#define MV88E6XXX_PORT_POLICY_CTL_DA_MASK	0xc000</div><div class='add'>+#define MV88E6XXX_PORT_POLICY_CTL_SA_MASK	0x3000</div><div class='add'>+#define MV88E6XXX_PORT_POLICY_CTL_VTU_MASK	0x0c00</div><div class='add'>+#define MV88E6XXX_PORT_POLICY_CTL_ETYPE_MASK	0x0300</div><div class='add'>+#define MV88E6XXX_PORT_POLICY_CTL_PPPOE_MASK	0x00c0</div><div class='add'>+#define MV88E6XXX_PORT_POLICY_CTL_VBAS_MASK	0x0030</div><div class='add'>+#define MV88E6XXX_PORT_POLICY_CTL_OPT82_MASK	0x000c</div><div class='add'>+#define MV88E6XXX_PORT_POLICY_CTL_UDP_MASK	0x0003</div><div class='add'>+#define MV88E6XXX_PORT_POLICY_CTL_NORMAL	0x0000</div><div class='add'>+#define MV88E6XXX_PORT_POLICY_CTL_MIRROR	0x0001</div><div class='add'>+#define MV88E6XXX_PORT_POLICY_CTL_TRAP		0x0002</div><div class='add'>+#define MV88E6XXX_PORT_POLICY_CTL_DISCARD	0x0003</div><div class='add'>+</div><div class='add'>+/* Offset 0x0E: Policy &amp; MGMT Control Register (FAMILY_6393X) */</div><div class='add'>+#define MV88E6393X_PORT_POLICY_MGMT_CTL				0x0e</div><div class='add'>+#define MV88E6393X_PORT_POLICY_MGMT_CTL_UPDATE			0x8000</div><div class='add'>+#define MV88E6393X_PORT_POLICY_MGMT_CTL_PTR_MASK		0x3f00</div><div class='add'>+#define MV88E6393X_PORT_POLICY_MGMT_CTL_DATA_MASK		0x00ff</div><div class='add'>+#define MV88E6393X_PORT_POLICY_MGMT_CTL_PTR_01C280000000XLO	0x2000</div><div class='add'>+#define MV88E6393X_PORT_POLICY_MGMT_CTL_PTR_01C280000000XHI	0x2100</div><div class='add'>+#define MV88E6393X_PORT_POLICY_MGMT_CTL_PTR_01C280000002XLO	0x2400</div><div class='add'>+#define MV88E6393X_PORT_POLICY_MGMT_CTL_PTR_01C280000002XHI	0x2500</div><div class='add'>+#define MV88E6393X_PORT_POLICY_MGMT_CTL_PTR_INGRESS_DEST	0x3000</div><div class='add'>+#define MV88E6393X_PORT_POLICY_MGMT_CTL_PTR_CPU_DEST		0x3800</div><div class='add'>+#define MV88E6393X_PORT_POLICY_MGMT_CTL_CPU_DEST_MGMTPRI	0x00e0</div><div class='add'>+</div><div class='add'>+/* Offset 0x0F: Port Special Ether Type */</div><div class='add'>+#define MV88E6XXX_PORT_ETH_TYPE		0x0f</div><div class='add'>+#define MV88E6XXX_PORT_ETH_TYPE_DEFAULT	0x9100</div><div class='add'>+</div><div class='add'>+/* Offset 0x10: InDiscards Low Counter */</div><div class='add'>+#define MV88E6XXX_PORT_IN_DISCARD_LO	0x10</div><div class='add'>+</div><div class='add'>+/* Offset 0x10: Extended Port Control Command */</div><div class='add'>+#define MV88E6393X_PORT_EPC_CMD		0x10</div><div class='add'>+#define MV88E6393X_PORT_EPC_CMD_BUSY	0x8000</div><div class='add'>+#define MV88E6393X_PORT_EPC_CMD_WRITE	0x3000</div><div class='add'>+#define MV88E6393X_PORT_EPC_INDEX_PORT_ETYPE	0x02</div><div class='add'>+</div><div class='add'>+/* Offset 0x11: Extended Port Control Data */</div><div class='add'>+#define MV88E6393X_PORT_EPC_DATA	0x11</div><div class='add'>+</div><div class='add'>+/* Offset 0x11: InDiscards High Counter */</div><div class='add'>+#define MV88E6XXX_PORT_IN_DISCARD_HI	0x11</div><div class='add'>+</div><div class='add'>+/* Offset 0x12: InFiltered Counter */</div><div class='add'>+#define MV88E6XXX_PORT_IN_FILTERED	0x12</div><div class='add'>+</div><div class='add'>+/* Offset 0x13: OutFiltered Counter */</div><div class='add'>+#define MV88E6XXX_PORT_OUT_FILTERED	0x13</div><div class='add'>+</div><div class='add'>+/* Offset 0x16: LED Control */</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL				0x16</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_UPDATE			BIT(15)</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_POINTER_MASK			GENMASK(14, 12)</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_POINTER_LED01_CTRL		(0x00 &lt;&lt; 12) /* Control for LED 0 and 1 */</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_POINTER_STRETCH_BLINK	(0x06 &lt;&lt; 12) /* Stetch and Blink Rate */</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_POINTER_CNTL_SPECIAL		(0x07 &lt;&lt; 12) /* Control for the Port's Special LED */</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_DATA_MASK			GENMASK(10, 0)</div><div class='add'>+/* Selection masks valid for either port 1,2,3,4 or 5 */</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_LED0_SEL_MASK		GENMASK(3, 0)</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_LED1_SEL_MASK		GENMASK(7, 4)</div><div class='add'>+/* Selection control for LED 0 and 1, ports 5 and 6 only has LED 0</div><div class='add'>+ * Bits  Function</div><div class='add'>+ * 0..3  LED 0 control selector on ports 1-5</div><div class='add'>+ * 4..7  LED 1 control selector on ports 1-4 on port 5 this controls LED 0 of port 6</div><div class='add'>+ *</div><div class='add'>+ * Sel Port LED Function for the 6352 family:</div><div class='add'>+ * 0   1-4  0   Link/Act/Speed by Blink Rate (off=no link, on=link, blink=activity, blink speed=link speed)</div><div class='add'>+ *     1-4  1   Port 2's Special LED</div><div class='add'>+ *     5-6  0   Port 5 Link/Act (off=no link, on=link, blink=activity)</div><div class='add'>+ *     5-6  1   Port 6 Link/Act (off=no link, on=link 1000, blink=activity)</div><div class='add'>+ * 1   1-4  0   100/1000 Link/Act (off=no link, on=100 or 1000 link, blink=activity)</div><div class='add'>+ *     1-4  1   10/100 Link Act (off=no link, on=10 or 100 link, blink=activity)</div><div class='add'>+ *     5-6  0   Fiber 100 Link/Act (off=no link, on=link 100, blink=activity)</div><div class='add'>+ *     5-6  1   Fiber 1000 Link/Act (off=no link, on=link 1000, blink=activity)</div><div class='add'>+ * 2   1-4  0   1000 Link/Act (off=no link, on=link 1000, blink=activity)</div><div class='add'>+ *     1-4  1   10/100 Link/Act (off=no link, on=10 or 100 link, blink=activity)</div><div class='add'>+ *     5-6  0   Fiber 1000 Link/Act (off=no link, on=link 1000, blink=activity)</div><div class='add'>+ *     5-6  1   Fiber 100 Link/Act (off=no link, on=link 100, blink=activity)</div><div class='add'>+ * 3   1-4  0   Link/Act (off=no link, on=link, blink=activity)</div><div class='add'>+ *     1-4  1   1000 Link (off=no link, on=1000 link)</div><div class='add'>+ *     5-6  0   Port 0's Special LED</div><div class='add'>+ *     5-6  1   Fiber Link (off=no link, on=link)</div><div class='add'>+ * 4   1-4  0   Port 0's Special LED</div><div class='add'>+ *     1-4  1   Port 1's Special LED</div><div class='add'>+ *     5-6  0   Port 1's Special LED</div><div class='add'>+ *     5-6  1   Port 5 Link/Act (off=no link, on=link, blink=activity)</div><div class='add'>+ * 5   1-4  0   Reserved</div><div class='add'>+ *     1-4  1   Reserved</div><div class='add'>+ *     5-6  0   Port 2's Special LED</div><div class='add'>+ *     5-6  1   Port 6 Link (off=no link, on=link)</div><div class='add'>+ * 6   1-4  0   Duplex/Collision (off=half-duplex,on=full-duplex,blink=collision)</div><div class='add'>+ *     1-4  1   10/1000 Link/Act (off=no link, on=10 or 1000 link, blink=activity)</div><div class='add'>+ *     5-6  0   Port 5 Duplex/Collision (off=half-duplex, on=full-duplex, blink=col)</div><div class='add'>+ *     5-6  1   Port 6 Duplex/Collision (off=half-duplex, on=full-duplex, blink=col)</div><div class='add'>+ * 7   1-4  0   10/1000 Link/Act (off=no link, on=10 or 1000 link, blink=activity)</div><div class='add'>+ *     1-4  1   10/1000 Link (off=no link, on=10 or 1000 link)</div><div class='add'>+ *     5-6  0   Port 5 Link/Act/Speed by Blink rate (off=no link, on=link, blink=activity, blink speed=link speed)</div><div class='add'>+ *     5-6  1   Port 6 Link/Act/Speed by Blink rate (off=no link, on=link, blink=activity,  blink speed=link speed)</div><div class='add'>+ * 8   1-4  0   Link (off=no link, on=link)</div><div class='add'>+ *     1-4  1   Activity (off=no link, blink on=activity)</div><div class='add'>+ *     5-6  0   Port 6 Link/Act (off=no link, on=link, blink=activity)</div><div class='add'>+ *     5-6  1   Port 0's Special LED</div><div class='add'>+ * 9   1-4  0   10 Link (off=no link, on=10 link)</div><div class='add'>+ *     1-4  1   100 Link (off=no link, on=100 link)</div><div class='add'>+ *     5-6  0   Reserved</div><div class='add'>+ *     5-6  1   Port 1's Special LED</div><div class='add'>+ * a   1-4  0   10 Link/Act (off=no link, on=10 link, blink=activity)</div><div class='add'>+ *     1-4  1   100 Link/Act (off=no link, on=100 link, blink=activity)</div><div class='add'>+ *     5-6  0   Reserved</div><div class='add'>+ *     5-6  1   Port 2's Special LED</div><div class='add'>+ * b   1-4  0   100/1000 Link (off=no link, on=100 or 1000 link)</div><div class='add'>+ *     1-4  1   10/100 Link (off=no link, on=100 link, blink=activity)</div><div class='add'>+ *     5-6  0   Reserved</div><div class='add'>+ *     5-6  1   Reserved</div><div class='add'>+ * c     *  *   PTP Act (blink on=PTP activity)</div><div class='add'>+ * d     *  *   Force Blink</div><div class='add'>+ * e     *  *   Force Off</div><div class='add'>+ * f     *  *   Force On</div><div class='add'>+ */</div><div class='add'>+/* Select LED0 output */</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_LED0_SEL0			0x0</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_LED0_SEL1			0x1</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_LED0_SEL2			0x2</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_LED0_SEL3			0x3</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_LED0_SEL4			0x4</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_LED0_SEL5			0x5</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_LED0_SEL6			0x6</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_LED0_SEL7			0x7</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_LED0_SEL8			0x8</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_LED0_SEL9			0x9</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_LED0_SELA			0xa</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_LED0_SELB			0xb</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_LED0_SELC			0xc</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_LED0_SELD			0xd</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_LED0_SELE			0xe</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_LED0_SELF			0xf</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_LED1_SEL0			(0x0 &lt;&lt; 4)</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_LED1_SEL1			(0x1 &lt;&lt; 4)</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_LED1_SEL2			(0x2 &lt;&lt; 4)</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_LED1_SEL3			(0x3 &lt;&lt; 4)</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_LED1_SEL4			(0x4 &lt;&lt; 4)</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_LED1_SEL5			(0x5 &lt;&lt; 4)</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_LED1_SEL6			(0x6 &lt;&lt; 4)</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_LED1_SEL7			(0x7 &lt;&lt; 4)</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_LED1_SEL8			(0x8 &lt;&lt; 4)</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_LED1_SEL9			(0x9 &lt;&lt; 4)</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_LED1_SELA			(0xa &lt;&lt; 4)</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_LED1_SELB			(0xb &lt;&lt; 4)</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_LED1_SELC			(0xc &lt;&lt; 4)</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_LED1_SELD			(0xd &lt;&lt; 4)</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_LED1_SELE			(0xe &lt;&lt; 4)</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_LED1_SELF			(0xf &lt;&lt; 4)</div><div class='add'>+/* Stretch and Blink Rate Control (Index 0x06 of LED Control) */</div><div class='add'>+/* Pulse Stretch Selection for all LED's on this port */</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_0x06_PULSE_STRETCH_NONE	(0 &lt;&lt; 4)</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_0x06_PULSE_STRETCH_21MS	(1 &lt;&lt; 4)</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_0x06_PULSE_STRETCH_42MS	(2 &lt;&lt; 4)</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_0x06_PULSE_STRETCH_84MS	(3 &lt;&lt; 4)</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_0x06_PULSE_STRETCH_168MS	(4 &lt;&lt; 4)</div><div class='add'>+/* Blink Rate Selection for all LEDs on this port */</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_0x06_BLINK_RATE_21MS		0</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_0x06_BLINK_RATE_42MS		1</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_0x06_BLINK_RATE_84MS		2</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_0x06_BLINK_RATE_168MS	3</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_0x06_BLINK_RATE_336MS	4</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_0x06_BLINK_RATE_672MS	5</div><div class='add'>+ /* Control for Special LED (Index 0x7 of LED Control on Port0) */</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_0x07_P0_LAN_LINKACT_SHIFT	0 /* bits 6:0 LAN Link Activity LED */</div><div class='add'>+/* Control for Special LED (Index 0x7 of LED Control on Port 1) */</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_0x07_P1_WAN_LINKACT_SHIFT	0 /* bits 6:0 WAN Link Activity LED */</div><div class='add'>+/* Control for Special LED (Index 0x7 of LED Control on Port 2) */</div><div class='add'>+#define MV88E6XXX_PORT_LED_CONTROL_0x07_P2_PTP_ACT		0 /* bits 6:0 PTP Activity */</div><div class='add'>+</div><div class='add'>+/* Offset 0x18: IEEE Priority Mapping Table */</div><div class='add'>+#define MV88E6390_PORT_IEEE_PRIO_MAP_TABLE			0x18</div><div class='add'>+#define MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_UPDATE		0x8000</div><div class='add'>+#define MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_MASK			0x7000</div><div class='add'>+#define MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_INGRESS_PCP		0x0000</div><div class='add'>+#define MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_EGRESS_GREEN_PCP	0x1000</div><div class='add'>+#define MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_EGRESS_YELLOW_PCP	0x2000</div><div class='add'>+#define MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_EGRESS_AVB_PCP	0x3000</div><div class='add'>+#define MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_EGRESS_GREEN_DSCP	0x5000</div><div class='add'>+#define MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_EGRESS_YELLOW_DSCP	0x6000</div><div class='add'>+#define MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_EGRESS_AVB_DSCP	0x7000</div><div class='add'>+#define MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_PTR_MASK		0x0e00</div><div class='add'>+#define MV88E6390_PORT_IEEE_PRIO_MAP_TABLE_DATA_MASK		0x01ff</div><div class='add'>+</div><div class='add'>+/* Offset 0x18: Port IEEE Priority Remapping Registers (0-3) */</div><div class='add'>+#define MV88E6095_PORT_IEEE_PRIO_REMAP_0123	0x18</div><div class='add'>+</div><div class='add'>+/* Offset 0x19: Port IEEE Priority Remapping Registers (4-7) */</div><div class='add'>+#define MV88E6095_PORT_IEEE_PRIO_REMAP_4567	0x19</div><div class='add'>+</div><div class='add'>+/* Offset 0x1a: Magic undocumented errata register */</div><div class='add'>+#define MV88E6XXX_PORT_RESERVED_1A		0x1a</div><div class='add'>+#define MV88E6XXX_PORT_RESERVED_1A_BUSY		0x8000</div><div class='add'>+#define MV88E6XXX_PORT_RESERVED_1A_WRITE	0x4000</div><div class='add'>+#define MV88E6XXX_PORT_RESERVED_1A_READ		0x0000</div><div class='add'>+#define MV88E6XXX_PORT_RESERVED_1A_PORT_SHIFT	5</div><div class='add'>+#define MV88E6XXX_PORT_RESERVED_1A_BLOCK_SHIFT	10</div><div class='add'>+#define MV88E6XXX_PORT_RESERVED_1A_CTRL_PORT	0x04</div><div class='add'>+#define MV88E6XXX_PORT_RESERVED_1A_DATA_PORT	0x05</div><div class='add'>+#define MV88E6341_PORT_RESERVED_1A_FORCE_CMODE	0x8000</div><div class='add'>+#define MV88E6341_PORT_RESERVED_1A_SGMII_AN	0x2000</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_read(struct mv88e6xxx_chip *chip, int port, int reg,</div><div class='add'>+			u16 *val);</div><div class='add'>+int mv88e6xxx_port_write(struct mv88e6xxx_chip *chip, int port, int reg,</div><div class='add'>+			 u16 val);</div><div class='add'>+int mv88e6xxx_port_wait_bit(struct mv88e6xxx_chip *chip, int port, int reg,</div><div class='add'>+			    int bit, int val);</div><div class='add'>+</div><div class='add'>+int mv88e6185_port_set_pause(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+			     int pause);</div><div class='add'>+int mv88e6320_port_set_rgmii_delay(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				   phy_interface_t mode);</div><div class='add'>+int mv88e6352_port_set_rgmii_delay(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				   phy_interface_t mode);</div><div class='add'>+int mv88e6390_port_set_rgmii_delay(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				   phy_interface_t mode);</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_set_link(struct mv88e6xxx_chip *chip, int port, int link);</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_sync_link(struct mv88e6xxx_chip *chip, int port, unsigned int mode, bool isup);</div><div class='add'>+int mv88e6185_port_sync_link(struct mv88e6xxx_chip *chip, int port, unsigned int mode, bool isup);</div><div class='add'>+</div><div class='add'>+int mv88e6185_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				    int speed, int duplex);</div><div class='add'>+int mv88e6250_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				    int speed, int duplex);</div><div class='add'>+int mv88e6341_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				    int speed, int duplex);</div><div class='add'>+int mv88e6352_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				    int speed, int duplex);</div><div class='add'>+int mv88e6390_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				    int speed, int duplex);</div><div class='add'>+int mv88e6390x_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				     int speed, int duplex);</div><div class='add'>+int mv88e6393x_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				     int speed, int duplex);</div><div class='add'>+</div><div class='add'>+phy_interface_t mv88e6341_port_max_speed_mode(struct mv88e6xxx_chip *chip,</div><div class='add'>+					      int port);</div><div class='add'>+phy_interface_t mv88e6390_port_max_speed_mode(struct mv88e6xxx_chip *chip,</div><div class='add'>+					      int port);</div><div class='add'>+phy_interface_t mv88e6390x_port_max_speed_mode(struct mv88e6xxx_chip *chip,</div><div class='add'>+					       int port);</div><div class='add'>+phy_interface_t mv88e6393x_port_max_speed_mode(struct mv88e6xxx_chip *chip,</div><div class='add'>+					       int port);</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_set_state(struct mv88e6xxx_chip *chip, int port, u8 state);</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_set_vlan_map(struct mv88e6xxx_chip *chip, int port, u16 map);</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_get_fid(struct mv88e6xxx_chip *chip, int port, u16 *fid);</div><div class='add'>+int mv88e6xxx_port_set_fid(struct mv88e6xxx_chip *chip, int port, u16 fid);</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_get_pvid(struct mv88e6xxx_chip *chip, int port, u16 *pvid);</div><div class='add'>+int mv88e6xxx_port_set_pvid(struct mv88e6xxx_chip *chip, int port, u16 pvid);</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_set_lock(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+			    bool locked);</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_set_8021q_mode(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				  u16 mode);</div><div class='add'>+int mv88e6095_port_tag_remap(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+int mv88e6390_port_tag_remap(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+int mv88e6xxx_port_set_egress_mode(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				   enum mv88e6xxx_egress_mode mode);</div><div class='add'>+int mv88e6085_port_set_frame_mode(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				  enum mv88e6xxx_frame_mode mode);</div><div class='add'>+int mv88e6351_port_set_frame_mode(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				  enum mv88e6xxx_frame_mode mode);</div><div class='add'>+int mv88e6185_port_set_forward_unknown(struct mv88e6xxx_chip *chip,</div><div class='add'>+				       int port, bool unicast);</div><div class='add'>+int mv88e6185_port_set_default_forward(struct mv88e6xxx_chip *chip,</div><div class='add'>+				       int port, bool multicast);</div><div class='add'>+int mv88e6352_port_set_ucast_flood(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				   bool unicast);</div><div class='add'>+int mv88e6352_port_set_mcast_flood(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				   bool multicast);</div><div class='add'>+int mv88e6352_port_set_policy(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+			      enum mv88e6xxx_policy_mapping mapping,</div><div class='add'>+			      enum mv88e6xxx_policy_action action);</div><div class='add'>+int mv88e6393x_port_set_policy(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+			       enum mv88e6xxx_policy_mapping mapping,</div><div class='add'>+			       enum mv88e6xxx_policy_action action);</div><div class='add'>+int mv88e6351_port_set_ether_type(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				  u16 etype);</div><div class='add'>+int mv88e6393x_set_egress_port(struct mv88e6xxx_chip *chip,</div><div class='add'>+			       enum mv88e6xxx_egress_direction direction,</div><div class='add'>+			       int port);</div><div class='add'>+int mv88e6393x_port_set_upstream_port(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				      int upstream_port);</div><div class='add'>+int mv88e6393x_port_mgmt_rsvd2cpu(struct mv88e6xxx_chip *chip);</div><div class='add'>+int mv88e6393x_port_set_ether_type(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				   u16 etype);</div><div class='add'>+int mv88e6xxx_port_set_message_port(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				    bool message_port);</div><div class='add'>+int mv88e6xxx_port_set_trunk(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+			     bool trunk, u8 id);</div><div class='add'>+int mv88e6165_port_set_jumbo_size(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				  size_t size);</div><div class='add'>+int mv88e6095_port_egress_rate_limiting(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+int mv88e6097_port_egress_rate_limiting(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+int mv88e6xxx_port_set_assoc_vector(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				    u16 pav);</div><div class='add'>+int mv88e6097_port_pause_limit(struct mv88e6xxx_chip *chip, int port, u8 in,</div><div class='add'>+			       u8 out);</div><div class='add'>+int mv88e6390_port_pause_limit(struct mv88e6xxx_chip *chip, int port, u8 in,</div><div class='add'>+			       u8 out);</div><div class='add'>+int mv88e6341_port_set_cmode(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+			     phy_interface_t mode);</div><div class='add'>+int mv88e6390_port_set_cmode(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+			     phy_interface_t mode);</div><div class='add'>+int mv88e6390x_port_set_cmode(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+			      phy_interface_t mode);</div><div class='add'>+int mv88e6393x_port_set_cmode(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+			      phy_interface_t mode);</div><div class='add'>+int mv88e6185_port_get_cmode(struct mv88e6xxx_chip *chip, int port, u8 *cmode);</div><div class='add'>+int mv88e6352_port_get_cmode(struct mv88e6xxx_chip *chip, int port, u8 *cmode);</div><div class='add'>+#ifdef CONFIG_NET_DSA_MV88E6XXX_LEDS</div><div class='add'>+int mv88e6xxx_port_setup_leds(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+#else</div><div class='add'>+static inline int mv88e6xxx_port_setup_leds(struct mv88e6xxx_chip *chip,</div><div class='add'>+					    int port)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+int mv88e6xxx_port_drop_untagged(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				 bool drop_untagged);</div><div class='add'>+int mv88e6xxx_port_set_map_da(struct mv88e6xxx_chip *chip, int port, bool map);</div><div class='add'>+int mv88e6095_port_set_upstream_port(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				     int upstream_port);</div><div class='add'>+int mv88e6xxx_port_set_mirror(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+			      enum mv88e6xxx_egress_direction direction,</div><div class='add'>+			      bool mirror);</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_disable_learn_limit(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+int mv88e6xxx_port_disable_pri_override(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_hidden_write(struct mv88e6xxx_chip *chip, int block,</div><div class='add'>+				int port, int reg, u16 val);</div><div class='add'>+int mv88e6xxx_port_hidden_wait(struct mv88e6xxx_chip *chip);</div><div class='add'>+int mv88e6xxx_port_hidden_read(struct mv88e6xxx_chip *chip, int block, int port,</div><div class='add'>+			       int reg, u16 *val);</div><div class='add'>+</div><div class='add'>+#endif /* _MV88E6XXX_PORT_H */</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/port_hidden.c b/drivers/net/dsa/mv88e6xxx/port_hidden.c<br/>new file mode 100644<br/>index 000000000000..7a9f9ff6dedf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/port_hidden.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/port_hidden.c</a></div><div class='hunk'>@@ -0,0 +1,71 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Marvell 88E6xxx Switch Hidden Registers support</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2008 Marvell Semiconductor</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2019 Andrew Lunn &lt;andrew@lunn.ch&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+</div><div class='add'>+#include "chip.h"</div><div class='add'>+#include "port.h"</div><div class='add'>+</div><div class='add'>+/* The mv88e6390 and mv88e6341 have some hidden registers used for debug and</div><div class='add'>+ * development. The errata also makes use of them.</div><div class='add'>+ */</div><div class='add'>+int mv88e6xxx_port_hidden_write(struct mv88e6xxx_chip *chip, int block,</div><div class='add'>+				int port, int reg, u16 val)</div><div class='add'>+{</div><div class='add'>+	u16 ctrl;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_write(chip, MV88E6XXX_PORT_RESERVED_1A_DATA_PORT,</div><div class='add'>+				   MV88E6XXX_PORT_RESERVED_1A, val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	ctrl = MV88E6XXX_PORT_RESERVED_1A_BUSY |</div><div class='add'>+	       MV88E6XXX_PORT_RESERVED_1A_WRITE |</div><div class='add'>+	       block &lt;&lt; MV88E6XXX_PORT_RESERVED_1A_BLOCK_SHIFT |</div><div class='add'>+	       port &lt;&lt; MV88E6XXX_PORT_RESERVED_1A_PORT_SHIFT |</div><div class='add'>+	       reg;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_write(chip, MV88E6XXX_PORT_RESERVED_1A_CTRL_PORT,</div><div class='add'>+				    MV88E6XXX_PORT_RESERVED_1A, ctrl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_hidden_wait(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	int bit = __bf_shf(MV88E6XXX_PORT_RESERVED_1A_BUSY);</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_wait_bit(chip,</div><div class='add'>+				       MV88E6XXX_PORT_RESERVED_1A_CTRL_PORT,</div><div class='add'>+				       MV88E6XXX_PORT_RESERVED_1A, bit, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_port_hidden_read(struct mv88e6xxx_chip *chip, int block, int port,</div><div class='add'>+			       int reg, u16 *val)</div><div class='add'>+{</div><div class='add'>+	u16 ctrl;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	ctrl = MV88E6XXX_PORT_RESERVED_1A_BUSY |</div><div class='add'>+	       MV88E6XXX_PORT_RESERVED_1A_READ |</div><div class='add'>+	       block &lt;&lt; MV88E6XXX_PORT_RESERVED_1A_BLOCK_SHIFT |</div><div class='add'>+	       port &lt;&lt; MV88E6XXX_PORT_RESERVED_1A_PORT_SHIFT |</div><div class='add'>+	       reg;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_write(chip, MV88E6XXX_PORT_RESERVED_1A_CTRL_PORT,</div><div class='add'>+				   MV88E6XXX_PORT_RESERVED_1A, ctrl);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_port_hidden_wait(chip);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_port_read(chip, MV88E6XXX_PORT_RESERVED_1A_DATA_PORT,</div><div class='add'>+				   MV88E6XXX_PORT_RESERVED_1A, val);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/ptp.c b/drivers/net/dsa/mv88e6xxx/ptp.c<br/>new file mode 100644<br/>index 000000000000..f7603573d3a9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/ptp.c</a></div><div class='hunk'>@@ -0,0 +1,565 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Marvell 88E6xxx Switch PTP support</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2008 Marvell Semiconductor</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2017 National Instruments</div><div class='add'>+ *      Erik Hons &lt;erik.hons@ni.com&gt;</div><div class='add'>+ *      Brandon Streiff &lt;brandon.streiff@ni.com&gt;</div><div class='add'>+ *      Dane Wagner &lt;dane.wagner@ni.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "chip.h"</div><div class='add'>+#include "global1.h"</div><div class='add'>+#include "global2.h"</div><div class='add'>+#include "hwtstamp.h"</div><div class='add'>+#include "ptp.h"</div><div class='add'>+</div><div class='add'>+#define MV88E6XXX_MAX_ADJ_PPB	1000000</div><div class='add'>+</div><div class='add'>+struct mv88e6xxx_cc_coeffs {</div><div class='add'>+	u32 cc_shift;</div><div class='add'>+	u32 cc_mult;</div><div class='add'>+	u32 cc_mult_num;</div><div class='add'>+	u32 cc_mult_dem;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Family MV88E6250:</div><div class='add'>+ * Raw timestamps are in units of 10-ns clock periods.</div><div class='add'>+ *</div><div class='add'>+ * clkadj = scaled_ppm * 10*2^28 / (10^6 * 2^16)</div><div class='add'>+ * simplifies to</div><div class='add'>+ * clkadj = scaled_ppm * 2^7 / 5^5</div><div class='add'>+ */</div><div class='add'>+#define MV88E6XXX_CC_10NS_SHIFT 28</div><div class='add'>+static const struct mv88e6xxx_cc_coeffs mv88e6xxx_cc_10ns_coeffs = {</div><div class='add'>+	.cc_shift = MV88E6XXX_CC_10NS_SHIFT,</div><div class='add'>+	.cc_mult = 10 &lt;&lt; MV88E6XXX_CC_10NS_SHIFT,</div><div class='add'>+	.cc_mult_num = 1 &lt;&lt; 7,</div><div class='add'>+	.cc_mult_dem = 3125ULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Other families except MV88E6393X in internal clock mode:</div><div class='add'>+ * Raw timestamps are in units of 8-ns clock periods.</div><div class='add'>+ *</div><div class='add'>+ * clkadj = scaled_ppm * 8*2^28 / (10^6 * 2^16)</div><div class='add'>+ * simplifies to</div><div class='add'>+ * clkadj = scaled_ppm * 2^9 / 5^6</div><div class='add'>+ */</div><div class='add'>+#define MV88E6XXX_CC_8NS_SHIFT 28</div><div class='add'>+static const struct mv88e6xxx_cc_coeffs mv88e6xxx_cc_8ns_coeffs = {</div><div class='add'>+	.cc_shift = MV88E6XXX_CC_8NS_SHIFT,</div><div class='add'>+	.cc_mult = 8 &lt;&lt; MV88E6XXX_CC_8NS_SHIFT,</div><div class='add'>+	.cc_mult_num = 1 &lt;&lt; 9,</div><div class='add'>+	.cc_mult_dem = 15625ULL</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Family MV88E6393X using internal clock:</div><div class='add'>+ * Raw timestamps are in units of 4-ns clock periods.</div><div class='add'>+ *</div><div class='add'>+ * clkadj = scaled_ppm * 4*2^28 / (10^6 * 2^16)</div><div class='add'>+ * simplifies to</div><div class='add'>+ * clkadj = scaled_ppm * 2^8 / 5^6</div><div class='add'>+ */</div><div class='add'>+#define MV88E6XXX_CC_4NS_SHIFT 28</div><div class='add'>+static const struct mv88e6xxx_cc_coeffs mv88e6xxx_cc_4ns_coeffs = {</div><div class='add'>+	.cc_shift = MV88E6XXX_CC_4NS_SHIFT,</div><div class='add'>+	.cc_mult = 4 &lt;&lt; MV88E6XXX_CC_4NS_SHIFT,</div><div class='add'>+	.cc_mult_num = 1 &lt;&lt; 8,</div><div class='add'>+	.cc_mult_dem = 15625ULL</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define TAI_EVENT_WORK_INTERVAL msecs_to_jiffies(100)</div><div class='add'>+</div><div class='add'>+#define cc_to_chip(cc) container_of(cc, struct mv88e6xxx_chip, tstamp_cc)</div><div class='add'>+#define dw_overflow_to_chip(dw) container_of(dw, struct mv88e6xxx_chip, \</div><div class='add'>+					     overflow_work)</div><div class='add'>+#define dw_tai_event_to_chip(dw) container_of(dw, struct mv88e6xxx_chip, \</div><div class='add'>+					      tai_event_work)</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_tai_read(struct mv88e6xxx_chip *chip, int addr,</div><div class='add'>+			      u16 *data, int len)</div><div class='add'>+{</div><div class='add'>+	if (!chip-&gt;info-&gt;ops-&gt;avb_ops-&gt;tai_read)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return chip-&gt;info-&gt;ops-&gt;avb_ops-&gt;tai_read(chip, addr, data, len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_tai_write(struct mv88e6xxx_chip *chip, int addr, u16 data)</div><div class='add'>+{</div><div class='add'>+	if (!chip-&gt;info-&gt;ops-&gt;avb_ops-&gt;tai_write)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return chip-&gt;info-&gt;ops-&gt;avb_ops-&gt;tai_write(chip, addr, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* TODO: places where this are called should be using pinctrl */</div><div class='add'>+static int mv88e6352_set_gpio_func(struct mv88e6xxx_chip *chip, int pin,</div><div class='add'>+				   int func, int input)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!chip-&gt;info-&gt;ops-&gt;gpio_ops)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	err = chip-&gt;info-&gt;ops-&gt;gpio_ops-&gt;set_dir(chip, pin, input);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return chip-&gt;info-&gt;ops-&gt;gpio_ops-&gt;set_pctl(chip, pin, func);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct mv88e6xxx_cc_coeffs *</div><div class='add'>+mv88e6xxx_cc_coeff_get(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	u16 period_ps;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_tai_read(chip, MV88E6XXX_TAI_CLOCK_PERIOD, &amp;period_ps, 1);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(chip-&gt;dev, "failed to read cycle counter period: %d\n",</div><div class='add'>+			err);</div><div class='add'>+		return ERR_PTR(err);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (period_ps) {</div><div class='add'>+	case 4000:</div><div class='add'>+		return &amp;mv88e6xxx_cc_4ns_coeffs;</div><div class='add'>+	case 8000:</div><div class='add'>+		return &amp;mv88e6xxx_cc_8ns_coeffs;</div><div class='add'>+	case 10000:</div><div class='add'>+		return &amp;mv88e6xxx_cc_10ns_coeffs;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(chip-&gt;dev, "unexpected cycle counter period of %u ps\n",</div><div class='add'>+			period_ps);</div><div class='add'>+		return ERR_PTR(-ENODEV);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 mv88e6352_ptp_clock_read(struct cyclecounter *cc)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = cc_to_chip(cc);</div><div class='add'>+	u16 phc_time[2];</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_tai_read(chip, MV88E6352_TAI_TIME_LO, phc_time,</div><div class='add'>+				 ARRAY_SIZE(phc_time));</div><div class='add'>+	if (err)</div><div class='add'>+		return 0;</div><div class='add'>+	else</div><div class='add'>+		return ((u32)phc_time[1] &lt;&lt; 16) | phc_time[0];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 mv88e6165_ptp_clock_read(struct cyclecounter *cc)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = cc_to_chip(cc);</div><div class='add'>+	u16 phc_time[2];</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_tai_read(chip, MV88E6165_PTP_GC_TIME_LO, phc_time,</div><div class='add'>+				 ARRAY_SIZE(phc_time));</div><div class='add'>+	if (err)</div><div class='add'>+		return 0;</div><div class='add'>+	else</div><div class='add'>+		return ((u32)phc_time[1] &lt;&lt; 16) | phc_time[0];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* mv88e6352_config_eventcap - configure TAI event capture</div><div class='add'>+ * @rising: zero for falling-edge trigger, else rising-edge trigger</div><div class='add'>+ *</div><div class='add'>+ * This will also reset the capture sequence counter.</div><div class='add'>+ */</div><div class='add'>+static int mv88e6352_config_eventcap(struct mv88e6xxx_chip *chip, int rising)</div><div class='add'>+{</div><div class='add'>+	u16 evcap_config;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	evcap_config = MV88E6352_TAI_CFG_CAP_OVERWRITE |</div><div class='add'>+		       MV88E6352_TAI_CFG_CAP_CTR_START;</div><div class='add'>+	if (!rising)</div><div class='add'>+		evcap_config |= MV88E6352_TAI_CFG_EVREQ_FALLING;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_tai_write(chip, MV88E6352_TAI_CFG, evcap_config);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Write the capture config; this also clears the capture counter */</div><div class='add'>+	return mv88e6xxx_tai_write(chip, MV88E6352_TAI_EVENT_STATUS, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mv88e6352_tai_event_work(struct work_struct *ugly)</div><div class='add'>+{</div><div class='add'>+	struct delayed_work *dw = to_delayed_work(ugly);</div><div class='add'>+	struct mv88e6xxx_chip *chip = dw_tai_event_to_chip(dw);</div><div class='add'>+	struct ptp_clock_event ev;</div><div class='add'>+	u16 status[4];</div><div class='add'>+	u32 raw_ts;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	err = mv88e6xxx_tai_read(chip, MV88E6352_TAI_EVENT_STATUS,</div><div class='add'>+				 status, ARRAY_SIZE(status));</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(chip-&gt;dev, "failed to read TAI status register\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	if (status[0] &amp; MV88E6352_TAI_EVENT_STATUS_ERROR) {</div><div class='add'>+		dev_warn(chip-&gt;dev, "missed event capture\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	if (!(status[0] &amp; MV88E6352_TAI_EVENT_STATUS_VALID))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	raw_ts = ((u32)status[2] &lt;&lt; 16) | status[1];</div><div class='add'>+</div><div class='add'>+	/* Clear the valid bit so the next timestamp can come in */</div><div class='add'>+	status[0] &amp;= ~MV88E6352_TAI_EVENT_STATUS_VALID;</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	err = mv88e6xxx_tai_write(chip, MV88E6352_TAI_EVENT_STATUS, status[0]);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(chip-&gt;dev, "failed to write TAI status register\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* This is an external timestamp */</div><div class='add'>+	ev.type = PTP_CLOCK_EXTTS;</div><div class='add'>+</div><div class='add'>+	/* We only have one timestamping channel. */</div><div class='add'>+	ev.index = 0;</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	ev.timestamp = timecounter_cyc2time(&amp;chip-&gt;tstamp_tc, raw_ts);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	ptp_clock_event(chip-&gt;ptp_clock, &amp;ev);</div><div class='add'>+out:</div><div class='add'>+	schedule_delayed_work(&amp;chip-&gt;tai_event_work, TAI_EVENT_WORK_INTERVAL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ptp_to_chip(ptp);</div><div class='add'>+	int neg_adj = 0;</div><div class='add'>+	u32 diff, mult;</div><div class='add'>+	u64 adj;</div><div class='add'>+</div><div class='add'>+	if (scaled_ppm &lt; 0) {</div><div class='add'>+		neg_adj = 1;</div><div class='add'>+		scaled_ppm = -scaled_ppm;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mult = chip-&gt;cc_coeffs-&gt;cc_mult;</div><div class='add'>+	adj = chip-&gt;cc_coeffs-&gt;cc_mult_num;</div><div class='add'>+	adj *= scaled_ppm;</div><div class='add'>+	diff = div_u64(adj, chip-&gt;cc_coeffs-&gt;cc_mult_dem);</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+</div><div class='add'>+	timecounter_read(&amp;chip-&gt;tstamp_tc);</div><div class='add'>+	chip-&gt;tstamp_cc.mult = neg_adj ? mult - diff : mult + diff;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ptp_to_chip(ptp);</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	timecounter_adjtime(&amp;chip-&gt;tstamp_tc, delta);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_ptp_gettime(struct ptp_clock_info *ptp,</div><div class='add'>+				 struct timespec64 *ts)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ptp_to_chip(ptp);</div><div class='add'>+	u64 ns;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	ns = timecounter_read(&amp;chip-&gt;tstamp_tc);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	*ts = ns_to_timespec64(ns);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_ptp_settime(struct ptp_clock_info *ptp,</div><div class='add'>+				 const struct timespec64 *ts)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ptp_to_chip(ptp);</div><div class='add'>+	u64 ns;</div><div class='add'>+</div><div class='add'>+	ns = timespec64_to_ns(ts);</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	timecounter_init(&amp;chip-&gt;tstamp_tc, &amp;chip-&gt;tstamp_cc, ns);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6352_ptp_enable_extts(struct mv88e6xxx_chip *chip,</div><div class='add'>+				      struct ptp_clock_request *rq, int on)</div><div class='add'>+{</div><div class='add'>+	int rising = (rq-&gt;extts.flags &amp; PTP_RISING_EDGE);</div><div class='add'>+	int func;</div><div class='add'>+	int pin;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Reject requests to enable time stamping on both edges. */</div><div class='add'>+	if ((rq-&gt;extts.flags &amp; PTP_STRICT_FLAGS) &amp;&amp;</div><div class='add'>+	    (rq-&gt;extts.flags &amp; PTP_ENABLE_FEATURE) &amp;&amp;</div><div class='add'>+	    (rq-&gt;extts.flags &amp; PTP_EXTTS_EDGES) == PTP_EXTTS_EDGES)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	pin = ptp_find_pin(chip-&gt;ptp_clock, PTP_PF_EXTTS, rq-&gt;extts.index);</div><div class='add'>+</div><div class='add'>+	if (pin &lt; 0)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+</div><div class='add'>+	if (on) {</div><div class='add'>+		func = MV88E6352_G2_SCRATCH_GPIO_PCTL_EVREQ;</div><div class='add'>+</div><div class='add'>+		err = mv88e6352_set_gpio_func(chip, pin, func, true);</div><div class='add'>+		if (err)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		schedule_delayed_work(&amp;chip-&gt;tai_event_work,</div><div class='add'>+				      TAI_EVENT_WORK_INTERVAL);</div><div class='add'>+</div><div class='add'>+		err = mv88e6352_config_eventcap(chip, rising);</div><div class='add'>+	} else {</div><div class='add'>+		func = MV88E6352_G2_SCRATCH_GPIO_PCTL_GPIO;</div><div class='add'>+</div><div class='add'>+		err = mv88e6352_set_gpio_func(chip, pin, func, true);</div><div class='add'>+</div><div class='add'>+		cancel_delayed_work_sync(&amp;chip-&gt;tai_event_work);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6352_ptp_enable(struct ptp_clock_info *ptp,</div><div class='add'>+				struct ptp_clock_request *rq, int on)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = ptp_to_chip(ptp);</div><div class='add'>+</div><div class='add'>+	switch (rq-&gt;type) {</div><div class='add'>+	case PTP_CLK_REQ_EXTTS:</div><div class='add'>+		return mv88e6352_ptp_enable_extts(chip, rq, on);</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6352_ptp_verify(struct ptp_clock_info *ptp, unsigned int pin,</div><div class='add'>+				enum ptp_pin_function func, unsigned int chan)</div><div class='add'>+{</div><div class='add'>+	switch (func) {</div><div class='add'>+	case PTP_PF_NONE:</div><div class='add'>+	case PTP_PF_EXTTS:</div><div class='add'>+		break;</div><div class='add'>+	case PTP_PF_PEROUT:</div><div class='add'>+	case PTP_PF_PHYSYNC:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct mv88e6xxx_ptp_ops mv88e6165_ptp_ops = {</div><div class='add'>+	.clock_read = mv88e6165_ptp_clock_read,</div><div class='add'>+	.global_enable = mv88e6165_global_enable,</div><div class='add'>+	.global_disable = mv88e6165_global_disable,</div><div class='add'>+	.arr0_sts_reg = MV88E6165_PORT_PTP_ARR0_STS,</div><div class='add'>+	.arr1_sts_reg = MV88E6165_PORT_PTP_ARR1_STS,</div><div class='add'>+	.dep_sts_reg = MV88E6165_PORT_PTP_DEP_STS,</div><div class='add'>+	.rx_filters = (1 &lt;&lt; HWTSTAMP_FILTER_NONE) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_EVENT) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_SYNC) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_DELAY_REQ),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct mv88e6xxx_ptp_ops mv88e6352_ptp_ops = {</div><div class='add'>+	.clock_read = mv88e6352_ptp_clock_read,</div><div class='add'>+	.ptp_enable = mv88e6352_ptp_enable,</div><div class='add'>+	.ptp_verify = mv88e6352_ptp_verify,</div><div class='add'>+	.event_work = mv88e6352_tai_event_work,</div><div class='add'>+	.port_enable = mv88e6352_hwtstamp_port_enable,</div><div class='add'>+	.port_disable = mv88e6352_hwtstamp_port_disable,</div><div class='add'>+	.n_ext_ts = 1,</div><div class='add'>+	.arr0_sts_reg = MV88E6XXX_PORT_PTP_ARR0_STS,</div><div class='add'>+	.arr1_sts_reg = MV88E6XXX_PORT_PTP_ARR1_STS,</div><div class='add'>+	.dep_sts_reg = MV88E6XXX_PORT_PTP_DEP_STS,</div><div class='add'>+	.rx_filters = (1 &lt;&lt; HWTSTAMP_FILTER_NONE) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_EVENT) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_SYNC) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_DELAY_REQ),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct mv88e6xxx_ptp_ops mv88e6390_ptp_ops = {</div><div class='add'>+	.clock_read = mv88e6352_ptp_clock_read,</div><div class='add'>+	.ptp_enable = mv88e6352_ptp_enable,</div><div class='add'>+	.ptp_verify = mv88e6352_ptp_verify,</div><div class='add'>+	.event_work = mv88e6352_tai_event_work,</div><div class='add'>+	.port_enable = mv88e6352_hwtstamp_port_enable,</div><div class='add'>+	.port_disable = mv88e6352_hwtstamp_port_disable,</div><div class='add'>+	.set_ptp_cpu_port = mv88e6390_g1_set_ptp_cpu_port,</div><div class='add'>+	.n_ext_ts = 1,</div><div class='add'>+	.arr0_sts_reg = MV88E6XXX_PORT_PTP_ARR0_STS,</div><div class='add'>+	.arr1_sts_reg = MV88E6XXX_PORT_PTP_ARR1_STS,</div><div class='add'>+	.dep_sts_reg = MV88E6XXX_PORT_PTP_DEP_STS,</div><div class='add'>+	.rx_filters = (1 &lt;&lt; HWTSTAMP_FILTER_NONE) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_EVENT) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_SYNC) |</div><div class='add'>+		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_DELAY_REQ),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static u64 mv88e6xxx_ptp_clock_read(struct cyclecounter *cc)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_chip *chip = cc_to_chip(cc);</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;info-&gt;ops-&gt;ptp_ops-&gt;clock_read)</div><div class='add'>+		return chip-&gt;info-&gt;ops-&gt;ptp_ops-&gt;clock_read(cc);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* With a 250MHz input clock, the 32-bit timestamp counter overflows in ~17.2</div><div class='add'>+ * seconds; this task forces periodic reads so that we don't miss any.</div><div class='add'>+ */</div><div class='add'>+#define MV88E6XXX_TAI_OVERFLOW_PERIOD (HZ * 8)</div><div class='add'>+static void mv88e6xxx_ptp_overflow_check(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct delayed_work *dw = to_delayed_work(work);</div><div class='add'>+	struct mv88e6xxx_chip *chip = dw_overflow_to_chip(dw);</div><div class='add'>+	struct timespec64 ts;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_ptp_gettime(&amp;chip-&gt;ptp_clock_info, &amp;ts);</div><div class='add'>+</div><div class='add'>+	schedule_delayed_work(&amp;chip-&gt;overflow_work,</div><div class='add'>+			      MV88E6XXX_TAI_OVERFLOW_PERIOD);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_ptp_setup(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	const struct mv88e6xxx_ptp_ops *ptp_ops = chip-&gt;info-&gt;ops-&gt;ptp_ops;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Set up the cycle counter */</div><div class='add'>+	chip-&gt;cc_coeffs = mv88e6xxx_cc_coeff_get(chip);</div><div class='add'>+	if (IS_ERR(chip-&gt;cc_coeffs))</div><div class='add'>+		return PTR_ERR(chip-&gt;cc_coeffs);</div><div class='add'>+</div><div class='add'>+	memset(&amp;chip-&gt;tstamp_cc, 0, sizeof(chip-&gt;tstamp_cc));</div><div class='add'>+	chip-&gt;tstamp_cc.read	= mv88e6xxx_ptp_clock_read;</div><div class='add'>+	chip-&gt;tstamp_cc.mask	= CYCLECOUNTER_MASK(32);</div><div class='add'>+	chip-&gt;tstamp_cc.mult	= chip-&gt;cc_coeffs-&gt;cc_mult;</div><div class='add'>+	chip-&gt;tstamp_cc.shift	= chip-&gt;cc_coeffs-&gt;cc_shift;</div><div class='add'>+</div><div class='add'>+	timecounter_init(&amp;chip-&gt;tstamp_tc, &amp;chip-&gt;tstamp_cc,</div><div class='add'>+			 ktime_to_ns(ktime_get_real()));</div><div class='add'>+</div><div class='add'>+	INIT_DELAYED_WORK(&amp;chip-&gt;overflow_work, mv88e6xxx_ptp_overflow_check);</div><div class='add'>+	if (ptp_ops-&gt;event_work)</div><div class='add'>+		INIT_DELAYED_WORK(&amp;chip-&gt;tai_event_work, ptp_ops-&gt;event_work);</div><div class='add'>+</div><div class='add'>+	chip-&gt;ptp_clock_info.owner = THIS_MODULE;</div><div class='add'>+	snprintf(chip-&gt;ptp_clock_info.name, sizeof(chip-&gt;ptp_clock_info.name),</div><div class='add'>+		 "%s", dev_name(chip-&gt;dev));</div><div class='add'>+</div><div class='add'>+	chip-&gt;ptp_clock_info.n_ext_ts	= ptp_ops-&gt;n_ext_ts;</div><div class='add'>+	chip-&gt;ptp_clock_info.n_per_out	= 0;</div><div class='add'>+	chip-&gt;ptp_clock_info.n_pins	= mv88e6xxx_num_gpio(chip);</div><div class='add'>+	chip-&gt;ptp_clock_info.pps	= 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; chip-&gt;ptp_clock_info.n_pins; ++i) {</div><div class='add'>+		struct ptp_pin_desc *ppd = &amp;chip-&gt;pin_config[i];</div><div class='add'>+</div><div class='add'>+		snprintf(ppd-&gt;name, sizeof(ppd-&gt;name), "mv88e6xxx_gpio%d", i);</div><div class='add'>+		ppd-&gt;index = i;</div><div class='add'>+		ppd-&gt;func = PTP_PF_NONE;</div><div class='add'>+	}</div><div class='add'>+	chip-&gt;ptp_clock_info.pin_config = chip-&gt;pin_config;</div><div class='add'>+</div><div class='add'>+	chip-&gt;ptp_clock_info.max_adj    = MV88E6XXX_MAX_ADJ_PPB;</div><div class='add'>+	chip-&gt;ptp_clock_info.adjfine	= mv88e6xxx_ptp_adjfine;</div><div class='add'>+	chip-&gt;ptp_clock_info.adjtime	= mv88e6xxx_ptp_adjtime;</div><div class='add'>+	chip-&gt;ptp_clock_info.gettime64	= mv88e6xxx_ptp_gettime;</div><div class='add'>+	chip-&gt;ptp_clock_info.settime64	= mv88e6xxx_ptp_settime;</div><div class='add'>+	chip-&gt;ptp_clock_info.enable	= ptp_ops-&gt;ptp_enable;</div><div class='add'>+	chip-&gt;ptp_clock_info.verify	= ptp_ops-&gt;ptp_verify;</div><div class='add'>+	chip-&gt;ptp_clock_info.do_aux_work = mv88e6xxx_hwtstamp_work;</div><div class='add'>+</div><div class='add'>+	chip-&gt;ptp_clock_info.supported_extts_flags = PTP_RISING_EDGE |</div><div class='add'>+						     PTP_FALLING_EDGE |</div><div class='add'>+						     PTP_STRICT_FLAGS;</div><div class='add'>+</div><div class='add'>+	if (ptp_ops-&gt;set_ptp_cpu_port) {</div><div class='add'>+		struct dsa_port *dp;</div><div class='add'>+		int upstream = 0;</div><div class='add'>+		int err;</div><div class='add'>+</div><div class='add'>+		dsa_switch_for_each_user_port(dp, chip-&gt;ds) {</div><div class='add'>+			upstream = dsa_upstream_port(chip-&gt;ds, dp-&gt;index);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = ptp_ops-&gt;set_ptp_cpu_port(chip, upstream);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(chip-&gt;dev, "Failed to set PTP CPU destination port!\n");</div><div class='add'>+			return err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	chip-&gt;ptp_clock = ptp_clock_register(&amp;chip-&gt;ptp_clock_info, chip-&gt;dev);</div><div class='add'>+	if (IS_ERR(chip-&gt;ptp_clock))</div><div class='add'>+		return PTR_ERR(chip-&gt;ptp_clock);</div><div class='add'>+</div><div class='add'>+	schedule_delayed_work(&amp;chip-&gt;overflow_work,</div><div class='add'>+			      MV88E6XXX_TAI_OVERFLOW_PERIOD);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This must never be called holding the register lock */</div><div class='add'>+void mv88e6xxx_ptp_free(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	if (chip-&gt;ptp_clock) {</div><div class='add'>+		cancel_delayed_work_sync(&amp;chip-&gt;overflow_work);</div><div class='add'>+		if (chip-&gt;info-&gt;ops-&gt;ptp_ops-&gt;event_work)</div><div class='add'>+			cancel_delayed_work_sync(&amp;chip-&gt;tai_event_work);</div><div class='add'>+</div><div class='add'>+		ptp_clock_unregister(chip-&gt;ptp_clock);</div><div class='add'>+		chip-&gt;ptp_clock = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/ptp.h b/drivers/net/dsa/mv88e6xxx/ptp.h<br/>new file mode 100644<br/>index 000000000000..95bdddb0bf39<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/ptp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/ptp.h</a></div><div class='hunk'>@@ -0,0 +1,96 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+/*</div><div class='add'>+ * Marvell 88E6xxx Switch PTP support</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2008 Marvell Semiconductor</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2017 National Instruments</div><div class='add'>+ *      Erik Hons &lt;erik.hons@ni.com&gt;</div><div class='add'>+ *      Brandon Streiff &lt;brandon.streiff@ni.com&gt;</div><div class='add'>+ *      Dane Wagner &lt;dane.wagner@ni.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _MV88E6XXX_PTP_H</div><div class='add'>+#define _MV88E6XXX_PTP_H</div><div class='add'>+</div><div class='add'>+#include "chip.h"</div><div class='add'>+</div><div class='add'>+/* Offset 0x00: TAI Global Config */</div><div class='add'>+#define MV88E6352_TAI_CFG			0x00</div><div class='add'>+#define MV88E6352_TAI_CFG_CAP_OVERWRITE		0x8000</div><div class='add'>+#define MV88E6352_TAI_CFG_CAP_CTR_START		0x4000</div><div class='add'>+#define MV88E6352_TAI_CFG_EVREQ_FALLING		0x2000</div><div class='add'>+#define MV88E6352_TAI_CFG_TRIG_ACTIVE_LO	0x1000</div><div class='add'>+#define MV88E6352_TAI_CFG_IRL_ENABLE		0x0400</div><div class='add'>+#define MV88E6352_TAI_CFG_TRIG_IRQ_EN		0x0200</div><div class='add'>+#define MV88E6352_TAI_CFG_EVREQ_IRQ_EN		0x0100</div><div class='add'>+#define MV88E6352_TAI_CFG_TRIG_LOCK		0x0080</div><div class='add'>+#define MV88E6352_TAI_CFG_BLOCK_UPDATE		0x0008</div><div class='add'>+#define MV88E6352_TAI_CFG_MULTI_PTP		0x0004</div><div class='add'>+#define MV88E6352_TAI_CFG_TRIG_MODE_ONESHOT	0x0002</div><div class='add'>+#define MV88E6352_TAI_CFG_TRIG_ENABLE		0x0001</div><div class='add'>+</div><div class='add'>+/* Offset 0x01: Timestamp Clock Period (ps) */</div><div class='add'>+#define MV88E6XXX_TAI_CLOCK_PERIOD		0x01</div><div class='add'>+</div><div class='add'>+/* Offset 0x09: Event Status */</div><div class='add'>+#define MV88E6352_TAI_EVENT_STATUS		0x09</div><div class='add'>+#define MV88E6352_TAI_EVENT_STATUS_ERROR	0x0200</div><div class='add'>+#define MV88E6352_TAI_EVENT_STATUS_VALID	0x0100</div><div class='add'>+#define MV88E6352_TAI_EVENT_STATUS_CTR_MASK	0x00ff</div><div class='add'>+/* Offset 0x0A/0x0B: Event Time Lo/Hi. Always read with Event Status. */</div><div class='add'>+</div><div class='add'>+/* Offset 0x0E/0x0F: PTP Global Time */</div><div class='add'>+#define MV88E6352_TAI_TIME_LO			0x0e</div><div class='add'>+#define MV88E6352_TAI_TIME_HI			0x0f</div><div class='add'>+</div><div class='add'>+/* 6165 Global Control Registers */</div><div class='add'>+/* Offset 0x9/0xa: Global Time */</div><div class='add'>+#define MV88E6165_PTP_GC_TIME_LO		0x09</div><div class='add'>+#define MV88E6165_PTP_GC_TIME_HI		0x0A</div><div class='add'>+</div><div class='add'>+/* 6165 Per Port Registers. The arrival and departure registers are a</div><div class='add'>+ * common block consisting of status, two time registers and the sequence ID</div><div class='add'>+ */</div><div class='add'>+/* Offset 0: Arrival Time 0 Status */</div><div class='add'>+#define MV88E6165_PORT_PTP_ARR0_STS	0x00</div><div class='add'>+</div><div class='add'>+/* Offset 0x04: PTP Arrival 1 Status */</div><div class='add'>+#define MV88E6165_PORT_PTP_ARR1_STS	0x04</div><div class='add'>+</div><div class='add'>+/* Offset 0x08: PTP Departure Status */</div><div class='add'>+#define MV88E6165_PORT_PTP_DEP_STS	0x08</div><div class='add'>+</div><div class='add'>+/* Offset 0x0d: Port Status */</div><div class='add'>+#define MV88E6164_PORT_STATUS		0x0d</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_NET_DSA_MV88E6XXX_PTP</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_ptp_setup(struct mv88e6xxx_chip *chip);</div><div class='add'>+void mv88e6xxx_ptp_free(struct mv88e6xxx_chip *chip);</div><div class='add'>+</div><div class='add'>+#define ptp_to_chip(ptp) container_of(ptp, struct mv88e6xxx_chip,	\</div><div class='add'>+				      ptp_clock_info)</div><div class='add'>+</div><div class='add'>+extern const struct mv88e6xxx_ptp_ops mv88e6165_ptp_ops;</div><div class='add'>+extern const struct mv88e6xxx_ptp_ops mv88e6352_ptp_ops;</div><div class='add'>+extern const struct mv88e6xxx_ptp_ops mv88e6390_ptp_ops;</div><div class='add'>+</div><div class='add'>+#else /* !CONFIG_NET_DSA_MV88E6XXX_PTP */</div><div class='add'>+</div><div class='add'>+static inline int mv88e6xxx_ptp_setup(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void mv88e6xxx_ptp_free(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct mv88e6xxx_ptp_ops mv88e6165_ptp_ops = {};</div><div class='add'>+static const struct mv88e6xxx_ptp_ops mv88e6352_ptp_ops = {};</div><div class='add'>+static const struct mv88e6xxx_ptp_ops mv88e6390_ptp_ops = {};</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_NET_DSA_MV88E6XXX_PTP */</div><div class='add'>+</div><div class='add'>+#endif /* _MV88E6XXX_PTP_H */</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/serdes.c b/drivers/net/dsa/mv88e6xxx/serdes.c<br/>new file mode 100644<br/>index 000000000000..b3330211edbc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/serdes.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/serdes.c</a></div><div class='hunk'>@@ -0,0 +1,546 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Marvell 88E6xxx SERDES manipulation, via SMI bus</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2008 Marvell Semiconductor</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2017 Andrew Lunn &lt;andrew@lunn.ch&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/irqdomain.h&gt;</div><div class='add'>+#include &lt;linux/mii.h&gt;</div><div class='add'>+</div><div class='add'>+#include "chip.h"</div><div class='add'>+#include "global2.h"</div><div class='add'>+#include "phy.h"</div><div class='add'>+#include "port.h"</div><div class='add'>+#include "serdes.h"</div><div class='add'>+</div><div class='add'>+static int mv88e6352_serdes_read(struct mv88e6xxx_chip *chip, int reg,</div><div class='add'>+				 u16 *val)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_phy_page_read(chip, MV88E6352_ADDR_SERDES,</div><div class='add'>+				       MV88E6352_SERDES_PAGE_FIBER,</div><div class='add'>+				       reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6352_serdes_write(struct mv88e6xxx_chip *chip, int reg,</div><div class='add'>+				  u16 val)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_phy_page_write(chip, MV88E6352_ADDR_SERDES,</div><div class='add'>+					MV88E6352_SERDES_PAGE_FIBER,</div><div class='add'>+					reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6390_serdes_read(struct mv88e6xxx_chip *chip,</div><div class='add'>+				 int lane, int device, int reg, u16 *val)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_phy_read_c45(chip, lane, device, reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_pcs_decode_state(struct device *dev, u16 bmsr, u16 lpa,</div><div class='add'>+			       u16 status, struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+	state-&gt;link = false;</div><div class='add'>+</div><div class='add'>+	/* If the BMSR reports that the link had failed, report this to</div><div class='add'>+	 * phylink.</div><div class='add'>+	 */</div><div class='add'>+	if (!(bmsr &amp; BMSR_LSTATUS))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	state-&gt;link = !!(status &amp; MV88E6390_SGMII_PHY_STATUS_LINK);</div><div class='add'>+	state-&gt;an_complete = !!(bmsr &amp; BMSR_ANEGCOMPLETE);</div><div class='add'>+</div><div class='add'>+	if (status &amp; MV88E6390_SGMII_PHY_STATUS_SPD_DPL_VALID) {</div><div class='add'>+		/* The Spped and Duplex Resolved register is 1 if AN is enabled</div><div class='add'>+		 * and complete, or if AN is disabled. So with disabled AN we</div><div class='add'>+		 * still get here on link up.</div><div class='add'>+		 */</div><div class='add'>+		state-&gt;duplex = status &amp;</div><div class='add'>+				MV88E6390_SGMII_PHY_STATUS_DUPLEX_FULL ?</div><div class='add'>+			                         DUPLEX_FULL : DUPLEX_HALF;</div><div class='add'>+</div><div class='add'>+		if (status &amp; MV88E6390_SGMII_PHY_STATUS_TX_PAUSE)</div><div class='add'>+			state-&gt;pause |= MLO_PAUSE_TX;</div><div class='add'>+		if (status &amp; MV88E6390_SGMII_PHY_STATUS_RX_PAUSE)</div><div class='add'>+			state-&gt;pause |= MLO_PAUSE_RX;</div><div class='add'>+</div><div class='add'>+		switch (status &amp; MV88E6390_SGMII_PHY_STATUS_SPEED_MASK) {</div><div class='add'>+		case MV88E6390_SGMII_PHY_STATUS_SPEED_1000:</div><div class='add'>+			if (state-&gt;interface == PHY_INTERFACE_MODE_2500BASEX)</div><div class='add'>+				state-&gt;speed = SPEED_2500;</div><div class='add'>+			else</div><div class='add'>+				state-&gt;speed = SPEED_1000;</div><div class='add'>+			break;</div><div class='add'>+		case MV88E6390_SGMII_PHY_STATUS_SPEED_100:</div><div class='add'>+			state-&gt;speed = SPEED_100;</div><div class='add'>+			break;</div><div class='add'>+		case MV88E6390_SGMII_PHY_STATUS_SPEED_10:</div><div class='add'>+			state-&gt;speed = SPEED_10;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			dev_err(dev, "invalid PHY speed\n");</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	} else if (state-&gt;link &amp;&amp;</div><div class='add'>+		   state-&gt;interface != PHY_INTERFACE_MODE_SGMII) {</div><div class='add'>+		/* If Speed and Duplex Resolved register is 0 and link is up, it</div><div class='add'>+		 * means that AN was enabled, but link partner had it disabled</div><div class='add'>+		 * and the PHY invoked the Auto-Negotiation Bypass feature and</div><div class='add'>+		 * linked anyway.</div><div class='add'>+		 */</div><div class='add'>+		state-&gt;duplex = DUPLEX_FULL;</div><div class='add'>+		if (state-&gt;interface == PHY_INTERFACE_MODE_2500BASEX)</div><div class='add'>+			state-&gt;speed = SPEED_2500;</div><div class='add'>+		else</div><div class='add'>+			state-&gt;speed = SPEED_1000;</div><div class='add'>+	} else {</div><div class='add'>+		state-&gt;link = false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (state-&gt;interface == PHY_INTERFACE_MODE_2500BASEX)</div><div class='add'>+		mii_lpa_mod_linkmode_x(state-&gt;lp_advertising, lpa,</div><div class='add'>+				       ETHTOOL_LINK_MODE_2500baseX_Full_BIT);</div><div class='add'>+	else if (state-&gt;interface == PHY_INTERFACE_MODE_1000BASEX)</div><div class='add'>+		mii_lpa_mod_linkmode_x(state-&gt;lp_advertising, lpa,</div><div class='add'>+				       ETHTOOL_LINK_MODE_1000baseX_Full_BIT);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct mv88e6352_serdes_hw_stat {</div><div class='add'>+	char string[ETH_GSTRING_LEN];</div><div class='add'>+	int sizeof_stat;</div><div class='add'>+	int reg;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct mv88e6352_serdes_hw_stat mv88e6352_serdes_hw_stats[] = {</div><div class='add'>+	{ "serdes_fibre_rx_error", 16, 21 },</div><div class='add'>+	{ "serdes_PRBS_error", 32, 24 },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int mv88e6352_serdes_get_sset_count(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6352_g2_scratch_port_has_serdes(chip, port);</div><div class='add'>+	if (err &lt;= 0)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return ARRAY_SIZE(mv88e6352_serdes_hw_stats);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6352_serdes_get_strings(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				 uint8_t **data)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6352_serdes_hw_stat *stat;</div><div class='add'>+	int err, i;</div><div class='add'>+</div><div class='add'>+	err = mv88e6352_g2_scratch_port_has_serdes(chip, port);</div><div class='add'>+	if (err &lt;= 0)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(mv88e6352_serdes_hw_stats); i++) {</div><div class='add'>+		stat = &amp;mv88e6352_serdes_hw_stats[i];</div><div class='add'>+		ethtool_puts(data, stat-&gt;string);</div><div class='add'>+	}</div><div class='add'>+	return ARRAY_SIZE(mv88e6352_serdes_hw_stats);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static uint64_t mv88e6352_serdes_get_stat(struct mv88e6xxx_chip *chip,</div><div class='add'>+					  struct mv88e6352_serdes_hw_stat *stat)</div><div class='add'>+{</div><div class='add'>+	u64 val = 0;</div><div class='add'>+	u16 reg;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6352_serdes_read(chip, stat-&gt;reg, &amp;reg);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(chip-&gt;dev, "failed to read statistic\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	val = reg;</div><div class='add'>+</div><div class='add'>+	if (stat-&gt;sizeof_stat == 32) {</div><div class='add'>+		err = mv88e6352_serdes_read(chip, stat-&gt;reg + 1, &amp;reg);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(chip-&gt;dev, "failed to read statistic\n");</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+		val = val &lt;&lt; 16 | reg;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+size_t mv88e6352_serdes_get_stats(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				  uint64_t *data)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_port *mv88e6xxx_port = &amp;chip-&gt;ports[port];</div><div class='add'>+	struct mv88e6352_serdes_hw_stat *stat;</div><div class='add'>+	int i, err;</div><div class='add'>+	u64 value;</div><div class='add'>+</div><div class='add'>+	err = mv88e6352_g2_scratch_port_has_serdes(chip, port);</div><div class='add'>+	if (err &lt;= 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	BUILD_BUG_ON(ARRAY_SIZE(mv88e6352_serdes_hw_stats) &gt;</div><div class='add'>+		     ARRAY_SIZE(mv88e6xxx_port-&gt;serdes_stats));</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(mv88e6352_serdes_hw_stats); i++) {</div><div class='add'>+		stat = &amp;mv88e6352_serdes_hw_stats[i];</div><div class='add'>+		value = mv88e6352_serdes_get_stat(chip, stat);</div><div class='add'>+		mv88e6xxx_port-&gt;serdes_stats[i] += value;</div><div class='add'>+		data[i] = mv88e6xxx_port-&gt;serdes_stats[i];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ARRAY_SIZE(mv88e6352_serdes_hw_stats);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+unsigned int mv88e6352_serdes_irq_mapping(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	return irq_find_mapping(chip-&gt;g2_irq.domain, MV88E6352_SERDES_IRQ);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6352_serdes_get_regs_len(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	err = mv88e6352_g2_scratch_port_has_serdes(chip, port);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+	if (err &lt;= 0)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return 32 * sizeof(u16);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mv88e6352_serdes_get_regs(struct mv88e6xxx_chip *chip, int port, void *_p)</div><div class='add'>+{</div><div class='add'>+	u16 *p = _p;</div><div class='add'>+	u16 reg;</div><div class='add'>+	int err;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	err = mv88e6352_g2_scratch_port_has_serdes(chip, port);</div><div class='add'>+	if (err &lt;= 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0 ; i &lt; 32; i++) {</div><div class='add'>+		err = mv88e6352_serdes_read(chip, i, &amp;reg);</div><div class='add'>+		if (!err)</div><div class='add'>+			p[i] = reg;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6341_serdes_get_lane(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	u8 cmode = chip-&gt;ports[port].cmode;</div><div class='add'>+	int lane = -ENODEV;</div><div class='add'>+</div><div class='add'>+	switch (port) {</div><div class='add'>+	case 5:</div><div class='add'>+		if (cmode == MV88E6XXX_PORT_STS_CMODE_1000BASEX ||</div><div class='add'>+		    cmode == MV88E6XXX_PORT_STS_CMODE_SGMII ||</div><div class='add'>+		    cmode == MV88E6XXX_PORT_STS_CMODE_2500BASEX)</div><div class='add'>+			lane = MV88E6341_PORT5_LANE;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return lane;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6390_serdes_get_lane(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	u8 cmode = chip-&gt;ports[port].cmode;</div><div class='add'>+	int lane = -ENODEV;</div><div class='add'>+</div><div class='add'>+	switch (port) {</div><div class='add'>+	case 9:</div><div class='add'>+		if (cmode == MV88E6XXX_PORT_STS_CMODE_1000BASEX ||</div><div class='add'>+		    cmode == MV88E6XXX_PORT_STS_CMODE_SGMII ||</div><div class='add'>+		    cmode == MV88E6XXX_PORT_STS_CMODE_2500BASEX)</div><div class='add'>+			lane = MV88E6390_PORT9_LANE0;</div><div class='add'>+		break;</div><div class='add'>+	case 10:</div><div class='add'>+		if (cmode == MV88E6XXX_PORT_STS_CMODE_1000BASEX ||</div><div class='add'>+		    cmode == MV88E6XXX_PORT_STS_CMODE_SGMII ||</div><div class='add'>+		    cmode == MV88E6XXX_PORT_STS_CMODE_2500BASEX)</div><div class='add'>+			lane = MV88E6390_PORT10_LANE0;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return lane;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6390x_serdes_get_lane(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	u8 cmode_port = chip-&gt;ports[port].cmode;</div><div class='add'>+	u8 cmode_port10 = chip-&gt;ports[10].cmode;</div><div class='add'>+	u8 cmode_port9 = chip-&gt;ports[9].cmode;</div><div class='add'>+	int lane = -ENODEV;</div><div class='add'>+</div><div class='add'>+	switch (port) {</div><div class='add'>+	case 2:</div><div class='add'>+		if (cmode_port9 == MV88E6XXX_PORT_STS_CMODE_1000BASEX ||</div><div class='add'>+		    cmode_port9 == MV88E6XXX_PORT_STS_CMODE_SGMII ||</div><div class='add'>+		    cmode_port9 == MV88E6XXX_PORT_STS_CMODE_2500BASEX)</div><div class='add'>+			if (cmode_port == MV88E6XXX_PORT_STS_CMODE_1000BASEX)</div><div class='add'>+				lane = MV88E6390_PORT9_LANE1;</div><div class='add'>+		break;</div><div class='add'>+	case 3:</div><div class='add'>+		if (cmode_port9 == MV88E6XXX_PORT_STS_CMODE_1000BASEX ||</div><div class='add'>+		    cmode_port9 == MV88E6XXX_PORT_STS_CMODE_SGMII ||</div><div class='add'>+		    cmode_port9 == MV88E6XXX_PORT_STS_CMODE_2500BASEX ||</div><div class='add'>+		    cmode_port9 == MV88E6XXX_PORT_STS_CMODE_RXAUI)</div><div class='add'>+			if (cmode_port == MV88E6XXX_PORT_STS_CMODE_1000BASEX)</div><div class='add'>+				lane = MV88E6390_PORT9_LANE2;</div><div class='add'>+		break;</div><div class='add'>+	case 4:</div><div class='add'>+		if (cmode_port9 == MV88E6XXX_PORT_STS_CMODE_1000BASEX ||</div><div class='add'>+		    cmode_port9 == MV88E6XXX_PORT_STS_CMODE_SGMII ||</div><div class='add'>+		    cmode_port9 == MV88E6XXX_PORT_STS_CMODE_2500BASEX ||</div><div class='add'>+		    cmode_port9 == MV88E6XXX_PORT_STS_CMODE_RXAUI)</div><div class='add'>+			if (cmode_port == MV88E6XXX_PORT_STS_CMODE_1000BASEX)</div><div class='add'>+				lane = MV88E6390_PORT9_LANE3;</div><div class='add'>+		break;</div><div class='add'>+	case 5:</div><div class='add'>+		if (cmode_port10 == MV88E6XXX_PORT_STS_CMODE_1000BASEX ||</div><div class='add'>+		    cmode_port10 == MV88E6XXX_PORT_STS_CMODE_SGMII ||</div><div class='add'>+		    cmode_port10 == MV88E6XXX_PORT_STS_CMODE_2500BASEX)</div><div class='add'>+			if (cmode_port == MV88E6XXX_PORT_STS_CMODE_1000BASEX)</div><div class='add'>+				lane = MV88E6390_PORT10_LANE1;</div><div class='add'>+		break;</div><div class='add'>+	case 6:</div><div class='add'>+		if (cmode_port10 == MV88E6XXX_PORT_STS_CMODE_1000BASEX ||</div><div class='add'>+		    cmode_port10 == MV88E6XXX_PORT_STS_CMODE_SGMII ||</div><div class='add'>+		    cmode_port10 == MV88E6XXX_PORT_STS_CMODE_2500BASEX ||</div><div class='add'>+		    cmode_port10 == MV88E6XXX_PORT_STS_CMODE_RXAUI)</div><div class='add'>+			if (cmode_port == MV88E6XXX_PORT_STS_CMODE_1000BASEX)</div><div class='add'>+				lane = MV88E6390_PORT10_LANE2;</div><div class='add'>+		break;</div><div class='add'>+	case 7:</div><div class='add'>+		if (cmode_port10 == MV88E6XXX_PORT_STS_CMODE_1000BASEX ||</div><div class='add'>+		    cmode_port10 == MV88E6XXX_PORT_STS_CMODE_SGMII ||</div><div class='add'>+		    cmode_port10 == MV88E6XXX_PORT_STS_CMODE_2500BASEX ||</div><div class='add'>+		    cmode_port10 == MV88E6XXX_PORT_STS_CMODE_RXAUI)</div><div class='add'>+			if (cmode_port == MV88E6XXX_PORT_STS_CMODE_1000BASEX)</div><div class='add'>+				lane = MV88E6390_PORT10_LANE3;</div><div class='add'>+		break;</div><div class='add'>+	case 9:</div><div class='add'>+		if (cmode_port9 == MV88E6XXX_PORT_STS_CMODE_1000BASEX ||</div><div class='add'>+		    cmode_port9 == MV88E6XXX_PORT_STS_CMODE_SGMII ||</div><div class='add'>+		    cmode_port9 == MV88E6XXX_PORT_STS_CMODE_2500BASEX ||</div><div class='add'>+		    cmode_port9 == MV88E6XXX_PORT_STS_CMODE_XAUI ||</div><div class='add'>+		    cmode_port9 == MV88E6XXX_PORT_STS_CMODE_RXAUI)</div><div class='add'>+			lane = MV88E6390_PORT9_LANE0;</div><div class='add'>+		break;</div><div class='add'>+	case 10:</div><div class='add'>+		if (cmode_port10 == MV88E6XXX_PORT_STS_CMODE_1000BASEX ||</div><div class='add'>+		    cmode_port10 == MV88E6XXX_PORT_STS_CMODE_SGMII ||</div><div class='add'>+		    cmode_port10 == MV88E6XXX_PORT_STS_CMODE_2500BASEX ||</div><div class='add'>+		    cmode_port10 == MV88E6XXX_PORT_STS_CMODE_XAUI ||</div><div class='add'>+		    cmode_port10 == MV88E6XXX_PORT_STS_CMODE_RXAUI)</div><div class='add'>+			lane = MV88E6390_PORT10_LANE0;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return lane;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Only Ports 0, 9 and 10 have SERDES lanes. Return the SERDES lane address</div><div class='add'>+ * a port is using else Returns -ENODEV.</div><div class='add'>+ */</div><div class='add'>+int mv88e6393x_serdes_get_lane(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	u8 cmode = chip-&gt;ports[port].cmode;</div><div class='add'>+	int lane = -ENODEV;</div><div class='add'>+</div><div class='add'>+	if (port != 0 &amp;&amp; port != 9 &amp;&amp; port != 10)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (cmode == MV88E6XXX_PORT_STS_CMODE_1000BASEX ||</div><div class='add'>+	    cmode == MV88E6XXX_PORT_STS_CMODE_SGMII ||</div><div class='add'>+	    cmode == MV88E6XXX_PORT_STS_CMODE_2500BASEX ||</div><div class='add'>+	    cmode == MV88E6393X_PORT_STS_CMODE_5GBASER ||</div><div class='add'>+	    cmode == MV88E6393X_PORT_STS_CMODE_10GBASER ||</div><div class='add'>+	    cmode == MV88E6393X_PORT_STS_CMODE_USXGMII)</div><div class='add'>+		lane = port;</div><div class='add'>+</div><div class='add'>+	return lane;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct mv88e6390_serdes_hw_stat {</div><div class='add'>+	char string[ETH_GSTRING_LEN];</div><div class='add'>+	int reg;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct mv88e6390_serdes_hw_stat mv88e6390_serdes_hw_stats[] = {</div><div class='add'>+	{ "serdes_rx_pkts", 0xf021 },</div><div class='add'>+	{ "serdes_rx_bytes", 0xf024 },</div><div class='add'>+	{ "serdes_rx_pkts_error", 0xf027 },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int mv88e6390_serdes_get_sset_count(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	if (mv88e6xxx_serdes_get_lane(chip, port) &lt; 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return ARRAY_SIZE(mv88e6390_serdes_hw_stats);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6390_serdes_get_strings(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				 uint8_t **data)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6390_serdes_hw_stat *stat;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (mv88e6xxx_serdes_get_lane(chip, port) &lt; 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(mv88e6390_serdes_hw_stats); i++) {</div><div class='add'>+		stat = &amp;mv88e6390_serdes_hw_stats[i];</div><div class='add'>+		ethtool_puts(data, stat-&gt;string);</div><div class='add'>+	}</div><div class='add'>+	return ARRAY_SIZE(mv88e6390_serdes_hw_stats);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static uint64_t mv88e6390_serdes_get_stat(struct mv88e6xxx_chip *chip, int lane,</div><div class='add'>+					  struct mv88e6390_serdes_hw_stat *stat)</div><div class='add'>+{</div><div class='add'>+	u16 reg[3];</div><div class='add'>+	int err, i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 3; i++) {</div><div class='add'>+		err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS,</div><div class='add'>+					    stat-&gt;reg + i, &amp;reg[i]);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(chip-&gt;dev, "failed to read statistic\n");</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return reg[0] | ((u64)reg[1] &lt;&lt; 16) | ((u64)reg[2] &lt;&lt; 32);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+size_t mv88e6390_serdes_get_stats(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				  uint64_t *data)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6390_serdes_hw_stat *stat;</div><div class='add'>+	int lane;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	lane = mv88e6xxx_serdes_get_lane(chip, port);</div><div class='add'>+	if (lane &lt; 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(mv88e6390_serdes_hw_stats); i++) {</div><div class='add'>+		stat = &amp;mv88e6390_serdes_hw_stats[i];</div><div class='add'>+		data[i] = mv88e6390_serdes_get_stat(chip, lane, stat);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ARRAY_SIZE(mv88e6390_serdes_hw_stats);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+unsigned int mv88e6390_serdes_irq_mapping(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	return irq_find_mapping(chip-&gt;g2_irq.domain, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const u16 mv88e6390_serdes_regs[] = {</div><div class='add'>+	/* SERDES common registers */</div><div class='add'>+	0xf00a, 0xf00b, 0xf00c,</div><div class='add'>+	0xf010, 0xf011, 0xf012, 0xf013,</div><div class='add'>+	0xf016, 0xf017, 0xf018,</div><div class='add'>+	0xf01b, 0xf01c, 0xf01d, 0xf01e, 0xf01f,</div><div class='add'>+	0xf020, 0xf021, 0xf022, 0xf023, 0xf024, 0xf025, 0xf026, 0xf027,</div><div class='add'>+	0xf028, 0xf029,</div><div class='add'>+	0xf030, 0xf031, 0xf032, 0xf033, 0xf034, 0xf035, 0xf036, 0xf037,</div><div class='add'>+	0xf038, 0xf039,</div><div class='add'>+	/* SGMII */</div><div class='add'>+	0x2000, 0x2001, 0x2002, 0x2003, 0x2004, 0x2005, 0x2006, 0x2007,</div><div class='add'>+	0x2008,</div><div class='add'>+	0x200f,</div><div class='add'>+	0xa000, 0xa001, 0xa002, 0xa003,</div><div class='add'>+	/* 10Gbase-X */</div><div class='add'>+	0x1000, 0x1001, 0x1002, 0x1003, 0x1004, 0x1005, 0x1006, 0x1007,</div><div class='add'>+	0x1008,</div><div class='add'>+	0x100e, 0x100f,</div><div class='add'>+	0x1018, 0x1019,</div><div class='add'>+	0x9000, 0x9001, 0x9002, 0x9003, 0x9004,</div><div class='add'>+	0x9006,</div><div class='add'>+	0x9010, 0x9011, 0x9012, 0x9013, 0x9014, 0x9015, 0x9016,</div><div class='add'>+	/* 10Gbase-R */</div><div class='add'>+	0x1020, 0x1021, 0x1022, 0x1023, 0x1024, 0x1025, 0x1026, 0x1027,</div><div class='add'>+	0x1028, 0x1029, 0x102a, 0x102b,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int mv88e6390_serdes_get_regs_len(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	if (mv88e6xxx_serdes_get_lane(chip, port) &lt; 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return ARRAY_SIZE(mv88e6390_serdes_regs) * sizeof(u16);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void mv88e6390_serdes_get_regs(struct mv88e6xxx_chip *chip, int port, void *_p)</div><div class='add'>+{</div><div class='add'>+	u16 *p = _p;</div><div class='add'>+	int lane;</div><div class='add'>+	u16 reg;</div><div class='add'>+	int err;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	lane = mv88e6xxx_serdes_get_lane(chip, port);</div><div class='add'>+	if (lane &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0 ; i &lt; ARRAY_SIZE(mv88e6390_serdes_regs); i++) {</div><div class='add'>+		err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS,</div><div class='add'>+					    mv88e6390_serdes_regs[i], &amp;reg);</div><div class='add'>+		if (!err)</div><div class='add'>+			p[i] = reg;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const int mv88e6352_serdes_p2p_to_reg[] = {</div><div class='add'>+	/* Index of value in microvolts corresponds to the register value */</div><div class='add'>+	14000, 112000, 210000, 308000, 406000, 504000, 602000, 700000,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int mv88e6352_serdes_set_tx_amplitude(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				      int val)</div><div class='add'>+{</div><div class='add'>+	bool found = false;</div><div class='add'>+	u16 ctrl, reg;</div><div class='add'>+	int err;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	err = mv88e6352_g2_scratch_port_has_serdes(chip, port);</div><div class='add'>+	if (err &lt;= 0)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(mv88e6352_serdes_p2p_to_reg); ++i) {</div><div class='add'>+		if (mv88e6352_serdes_p2p_to_reg[i] == val) {</div><div class='add'>+			reg = i;</div><div class='add'>+			found = true;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!found)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	err = mv88e6352_serdes_read(chip, MV88E6352_SERDES_SPEC_CTRL2, &amp;ctrl);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	ctrl &amp;= ~MV88E6352_SERDES_OUT_AMP_MASK;</div><div class='add'>+	ctrl |= reg;</div><div class='add'>+</div><div class='add'>+	return mv88e6352_serdes_write(chip, MV88E6352_SERDES_SPEC_CTRL2, ctrl);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/serdes.h b/drivers/net/dsa/mv88e6xxx/serdes.h<br/>new file mode 100644<br/>index 000000000000..ad887d8601bc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/serdes.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/serdes.h</a></div><div class='hunk'>@@ -0,0 +1,170 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+/*</div><div class='add'>+ * Marvell 88E6xxx SERDES manipulation, via SMI bus</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2008 Marvell Semiconductor</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2016 Andrew Lunn &lt;andrew@lunn.ch&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _MV88E6XXX_SERDES_H</div><div class='add'>+#define _MV88E6XXX_SERDES_H</div><div class='add'>+</div><div class='add'>+#include "chip.h"</div><div class='add'>+</div><div class='add'>+struct phylink_link_state;</div><div class='add'>+</div><div class='add'>+#define MV88E6352_ADDR_SERDES		0x0f</div><div class='add'>+#define MV88E6352_SERDES_PAGE_FIBER	0x01</div><div class='add'>+#define MV88E6352_SERDES_IRQ		0x0b</div><div class='add'>+#define MV88E6352_SERDES_INT_ENABLE	0x12</div><div class='add'>+#define MV88E6352_SERDES_INT_SPEED_CHANGE	BIT(14)</div><div class='add'>+#define MV88E6352_SERDES_INT_DUPLEX_CHANGE	BIT(13)</div><div class='add'>+#define MV88E6352_SERDES_INT_PAGE_RX		BIT(12)</div><div class='add'>+#define MV88E6352_SERDES_INT_AN_COMPLETE	BIT(11)</div><div class='add'>+#define MV88E6352_SERDES_INT_LINK_CHANGE	BIT(10)</div><div class='add'>+#define MV88E6352_SERDES_INT_SYMBOL_ERROR	BIT(9)</div><div class='add'>+#define MV88E6352_SERDES_INT_FALSE_CARRIER	BIT(8)</div><div class='add'>+#define MV88E6352_SERDES_INT_FIFO_OVER_UNDER	BIT(7)</div><div class='add'>+#define MV88E6352_SERDES_INT_FIBRE_ENERGY	BIT(4)</div><div class='add'>+#define MV88E6352_SERDES_INT_STATUS	0x13</div><div class='add'>+</div><div class='add'>+#define MV88E6352_SERDES_SPEC_CTRL2	0x1a</div><div class='add'>+#define MV88E6352_SERDES_OUT_AMP_MASK		0x0007</div><div class='add'>+</div><div class='add'>+#define MV88E6341_PORT5_LANE		0x15</div><div class='add'>+</div><div class='add'>+#define MV88E6390_PORT9_LANE0		0x09</div><div class='add'>+#define MV88E6390_PORT9_LANE1		0x12</div><div class='add'>+#define MV88E6390_PORT9_LANE2		0x13</div><div class='add'>+#define MV88E6390_PORT9_LANE3		0x14</div><div class='add'>+#define MV88E6390_PORT10_LANE0		0x0a</div><div class='add'>+#define MV88E6390_PORT10_LANE1		0x15</div><div class='add'>+#define MV88E6390_PORT10_LANE2		0x16</div><div class='add'>+#define MV88E6390_PORT10_LANE3		0x17</div><div class='add'>+</div><div class='add'>+/* 10GBASE-R and 10GBASE-X4/X2 */</div><div class='add'>+#define MV88E6390_10G_CTRL1		(0x1000 + MDIO_CTRL1)</div><div class='add'>+#define MV88E6390_10G_STAT1		(0x1000 + MDIO_STAT1)</div><div class='add'>+#define MV88E6390_10G_INT_ENABLE	0x9001</div><div class='add'>+#define MV88E6390_10G_INT_LINK_DOWN	BIT(3)</div><div class='add'>+#define MV88E6390_10G_INT_LINK_UP	BIT(2)</div><div class='add'>+#define MV88E6390_10G_INT_STATUS	0x9003</div><div class='add'>+#define MV88E6393X_10G_INT_ENABLE	0x9000</div><div class='add'>+#define MV88E6393X_10G_INT_LINK_CHANGE	BIT(2)</div><div class='add'>+#define MV88E6393X_10G_INT_STATUS	0x9001</div><div class='add'>+</div><div class='add'>+/* USXGMII */</div><div class='add'>+#define MV88E6390_USXGMII_LP_STATUS       0xf0a2</div><div class='add'>+#define MV88E6390_USXGMII_PHY_STATUS      0xf0a6</div><div class='add'>+</div><div class='add'>+/* 1000BASE-X and SGMII */</div><div class='add'>+#define MV88E6390_SGMII_BMCR		(0x2000 + MII_BMCR)</div><div class='add'>+#define MV88E6390_SGMII_BMSR		(0x2000 + MII_BMSR)</div><div class='add'>+#define MV88E6390_SGMII_ADVERTISE	(0x2000 + MII_ADVERTISE)</div><div class='add'>+#define MV88E6390_SGMII_LPA		(0x2000 + MII_LPA)</div><div class='add'>+#define MV88E6390_SGMII_INT_ENABLE	0xa001</div><div class='add'>+#define MV88E6390_SGMII_INT_SPEED_CHANGE	BIT(14)</div><div class='add'>+#define MV88E6390_SGMII_INT_DUPLEX_CHANGE	BIT(13)</div><div class='add'>+#define MV88E6390_SGMII_INT_PAGE_RX		BIT(12)</div><div class='add'>+#define MV88E6390_SGMII_INT_AN_COMPLETE		BIT(11)</div><div class='add'>+#define MV88E6390_SGMII_INT_LINK_DOWN		BIT(10)</div><div class='add'>+#define MV88E6390_SGMII_INT_LINK_UP		BIT(9)</div><div class='add'>+#define MV88E6390_SGMII_INT_SYMBOL_ERROR	BIT(8)</div><div class='add'>+#define MV88E6390_SGMII_INT_FALSE_CARRIER	BIT(7)</div><div class='add'>+#define MV88E6390_SGMII_INT_STATUS	0xa002</div><div class='add'>+#define MV88E6390_SGMII_PHY_STATUS	0xa003</div><div class='add'>+#define MV88E6390_SGMII_PHY_STATUS_SPEED_MASK	GENMASK(15, 14)</div><div class='add'>+#define MV88E6390_SGMII_PHY_STATUS_SPEED_1000	0x8000</div><div class='add'>+#define MV88E6390_SGMII_PHY_STATUS_SPEED_100	0x4000</div><div class='add'>+#define MV88E6390_SGMII_PHY_STATUS_SPEED_10	0x0000</div><div class='add'>+#define MV88E6390_SGMII_PHY_STATUS_DUPLEX_FULL	BIT(13)</div><div class='add'>+#define MV88E6390_SGMII_PHY_STATUS_SPD_DPL_VALID BIT(11)</div><div class='add'>+#define MV88E6390_SGMII_PHY_STATUS_LINK		BIT(10)</div><div class='add'>+#define MV88E6390_SGMII_PHY_STATUS_TX_PAUSE	BIT(3)</div><div class='add'>+#define MV88E6390_SGMII_PHY_STATUS_RX_PAUSE	BIT(2)</div><div class='add'>+</div><div class='add'>+/* Packet generator pad packet checker */</div><div class='add'>+#define MV88E6390_PG_CONTROL		0xf010</div><div class='add'>+#define MV88E6390_PG_CONTROL_ENABLE_PC		BIT(0)</div><div class='add'>+</div><div class='add'>+#define MV88E6393X_PORT0_LANE			0x00</div><div class='add'>+#define MV88E6393X_PORT9_LANE			0x09</div><div class='add'>+#define MV88E6393X_PORT10_LANE			0x0a</div><div class='add'>+</div><div class='add'>+/* Port Operational Configuration */</div><div class='add'>+#define MV88E6393X_SERDES_POC			0xf002</div><div class='add'>+#define MV88E6393X_SERDES_POC_PCS_1000BASEX	0x0000</div><div class='add'>+#define MV88E6393X_SERDES_POC_PCS_2500BASEX	0x0001</div><div class='add'>+#define MV88E6393X_SERDES_POC_PCS_SGMII_PHY	0x0002</div><div class='add'>+#define MV88E6393X_SERDES_POC_PCS_SGMII_MAC	0x0003</div><div class='add'>+#define MV88E6393X_SERDES_POC_PCS_5GBASER	0x0004</div><div class='add'>+#define MV88E6393X_SERDES_POC_PCS_10GBASER	0x0005</div><div class='add'>+#define MV88E6393X_SERDES_POC_PCS_USXGMII_PHY	0x0006</div><div class='add'>+#define MV88E6393X_SERDES_POC_PCS_USXGMII_MAC	0x0007</div><div class='add'>+#define MV88E6393X_SERDES_POC_PCS_MASK		0x0007</div><div class='add'>+#define MV88E6393X_SERDES_POC_RESET		BIT(15)</div><div class='add'>+#define MV88E6393X_SERDES_POC_PDOWN		BIT(5)</div><div class='add'>+#define MV88E6393X_SERDES_POC_AN		BIT(3)</div><div class='add'>+#define MV88E6393X_SERDES_CTRL1			0xf003</div><div class='add'>+#define MV88E6393X_SERDES_CTRL1_TX_PDOWN	BIT(9)</div><div class='add'>+#define MV88E6393X_SERDES_CTRL1_RX_PDOWN	BIT(8)</div><div class='add'>+</div><div class='add'>+#define MV88E6393X_ERRATA_4_8_REG		0xF074</div><div class='add'>+#define MV88E6393X_ERRATA_4_8_BIT		BIT(14)</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_pcs_decode_state(struct device *dev, u16 bmsr, u16 lpa,</div><div class='add'>+			       u16 status, struct phylink_link_state *state);</div><div class='add'>+</div><div class='add'>+int mv88e6341_serdes_get_lane(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+int mv88e6390_serdes_get_lane(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+int mv88e6390x_serdes_get_lane(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+int mv88e6393x_serdes_get_lane(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+unsigned int mv88e6352_serdes_irq_mapping(struct mv88e6xxx_chip *chip,</div><div class='add'>+					  int port);</div><div class='add'>+unsigned int mv88e6390_serdes_irq_mapping(struct mv88e6xxx_chip *chip,</div><div class='add'>+					  int port);</div><div class='add'>+int mv88e6352_serdes_get_sset_count(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+int mv88e6352_serdes_get_strings(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				 uint8_t **data);</div><div class='add'>+size_t mv88e6352_serdes_get_stats(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				  uint64_t *data);</div><div class='add'>+int mv88e6390_serdes_get_sset_count(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+int mv88e6390_serdes_get_strings(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				 uint8_t **data);</div><div class='add'>+size_t mv88e6390_serdes_get_stats(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				  uint64_t *data);</div><div class='add'>+</div><div class='add'>+int mv88e6352_serdes_get_regs_len(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+void mv88e6352_serdes_get_regs(struct mv88e6xxx_chip *chip, int port, void *_p);</div><div class='add'>+int mv88e6390_serdes_get_regs_len(struct mv88e6xxx_chip *chip, int port);</div><div class='add'>+void mv88e6390_serdes_get_regs(struct mv88e6xxx_chip *chip, int port, void *_p);</div><div class='add'>+</div><div class='add'>+int mv88e6352_serdes_set_tx_amplitude(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				      int val);</div><div class='add'>+</div><div class='add'>+/* Return the (first) SERDES lane address a port is using, -errno otherwise. */</div><div class='add'>+static inline int mv88e6xxx_serdes_get_lane(struct mv88e6xxx_chip *chip,</div><div class='add'>+					    int port)</div><div class='add'>+{</div><div class='add'>+	if (!chip-&gt;info-&gt;ops-&gt;serdes_get_lane)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return chip-&gt;info-&gt;ops-&gt;serdes_get_lane(chip, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int</div><div class='add'>+mv88e6xxx_serdes_irq_mapping(struct mv88e6xxx_chip *chip, int port)</div><div class='add'>+{</div><div class='add'>+	if (!chip-&gt;info-&gt;ops-&gt;serdes_irq_mapping)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return chip-&gt;info-&gt;ops-&gt;serdes_irq_mapping(chip, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+extern const struct mv88e6xxx_pcs_ops mv88e6185_pcs_ops;</div><div class='add'>+extern const struct mv88e6xxx_pcs_ops mv88e6352_pcs_ops;</div><div class='add'>+extern const struct mv88e6xxx_pcs_ops mv88e6390_pcs_ops;</div><div class='add'>+extern const struct mv88e6xxx_pcs_ops mv88e6393x_pcs_ops;</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/smi.c b/drivers/net/dsa/mv88e6xxx/smi.c<br/>new file mode 100644<br/>index 000000000000..a990271b7482<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/smi.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/smi.c</a></div><div class='hunk'>@@ -0,0 +1,190 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Marvell 88E6xxx System Management Interface (SMI) support</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2008 Marvell Semiconductor</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2019 Vivien Didelot &lt;vivien.didelot@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "chip.h"</div><div class='add'>+#include "smi.h"</div><div class='add'>+</div><div class='add'>+/* The switch ADDR[4:1] configuration pins define the chip SMI device address</div><div class='add'>+ * (ADDR[0] is always zero, thus only even SMI addresses can be strapped).</div><div class='add'>+ *</div><div class='add'>+ * When ADDR is all zero, the chip uses Single-chip Addressing Mode, assuming it</div><div class='add'>+ * is the only device connected to the SMI master. In this mode it responds to</div><div class='add'>+ * all 32 possible SMI addresses, and thus maps directly the internal devices.</div><div class='add'>+ *</div><div class='add'>+ * When ADDR is non-zero, the chip uses Multi-chip Addressing Mode, allowing</div><div class='add'>+ * multiple devices to share the SMI interface. In this mode it responds to only</div><div class='add'>+ * 2 registers, used to indirectly access the internal SMI devices.</div><div class='add'>+ *</div><div class='add'>+ * Some chips use a different scheme: Only the ADDR4 pin is used for</div><div class='add'>+ * configuration, and the device responds to 16 of the 32 SMI</div><div class='add'>+ * addresses, allowing two to coexist on the same SMI interface.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_smi_direct_read(struct mv88e6xxx_chip *chip,</div><div class='add'>+				     int dev, int reg, u16 *data)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = mdiobus_read_nested(chip-&gt;bus, dev, reg);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	*data = ret &amp; 0xffff;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_smi_direct_write(struct mv88e6xxx_chip *chip,</div><div class='add'>+				      int dev, int reg, u16 data)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = mdiobus_write_nested(chip-&gt;bus, dev, reg, data);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_smi_direct_wait(struct mv88e6xxx_chip *chip,</div><div class='add'>+				     int dev, int reg, int bit, int val)</div><div class='add'>+{</div><div class='add'>+	const unsigned long timeout = jiffies + msecs_to_jiffies(50);</div><div class='add'>+	u16 data;</div><div class='add'>+	int err;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Even if the initial poll takes longer than 50ms, always do</div><div class='add'>+	 * at least one more attempt.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; time_before(jiffies, timeout) || (i &lt; 2); i++) {</div><div class='add'>+		err = mv88e6xxx_smi_direct_read(chip, dev, reg, &amp;data);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		if (!!(data &amp; BIT(bit)) == !!val)</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		if (i &lt; 2)</div><div class='add'>+			cpu_relax();</div><div class='add'>+		else</div><div class='add'>+			usleep_range(1000, 2000);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -ETIMEDOUT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct mv88e6xxx_bus_ops mv88e6xxx_smi_direct_ops = {</div><div class='add'>+	.read = mv88e6xxx_smi_direct_read,</div><div class='add'>+	.write = mv88e6xxx_smi_direct_write,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_smi_dual_direct_read(struct mv88e6xxx_chip *chip,</div><div class='add'>+					  int dev, int reg, u16 *data)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_smi_direct_read(chip, chip-&gt;sw_addr + dev, reg, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_smi_dual_direct_write(struct mv88e6xxx_chip *chip,</div><div class='add'>+					   int dev, int reg, u16 data)</div><div class='add'>+{</div><div class='add'>+	return mv88e6xxx_smi_direct_write(chip, chip-&gt;sw_addr + dev, reg, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct mv88e6xxx_bus_ops mv88e6xxx_smi_dual_direct_ops = {</div><div class='add'>+	.read = mv88e6xxx_smi_dual_direct_read,</div><div class='add'>+	.write = mv88e6xxx_smi_dual_direct_write,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Offset 0x00: SMI Command Register</div><div class='add'>+ * Offset 0x01: SMI Data Register</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_smi_indirect_read(struct mv88e6xxx_chip *chip,</div><div class='add'>+				       int dev, int reg, u16 *data)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_smi_direct_write(chip, chip-&gt;sw_addr,</div><div class='add'>+					 MV88E6XXX_SMI_CMD,</div><div class='add'>+					 MV88E6XXX_SMI_CMD_BUSY |</div><div class='add'>+					 MV88E6XXX_SMI_CMD_MODE_22 |</div><div class='add'>+					 MV88E6XXX_SMI_CMD_OP_22_READ |</div><div class='add'>+					 (dev &lt;&lt; 5) | reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_smi_direct_wait(chip, chip-&gt;sw_addr,</div><div class='add'>+					MV88E6XXX_SMI_CMD, 15, 0);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_smi_direct_read(chip, chip-&gt;sw_addr,</div><div class='add'>+					 MV88E6XXX_SMI_DATA, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_smi_indirect_write(struct mv88e6xxx_chip *chip,</div><div class='add'>+					int dev, int reg, u16 data)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_smi_direct_write(chip, chip-&gt;sw_addr,</div><div class='add'>+					 MV88E6XXX_SMI_DATA, data);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_smi_direct_write(chip, chip-&gt;sw_addr,</div><div class='add'>+					 MV88E6XXX_SMI_CMD,</div><div class='add'>+					 MV88E6XXX_SMI_CMD_BUSY |</div><div class='add'>+					 MV88E6XXX_SMI_CMD_MODE_22 |</div><div class='add'>+					 MV88E6XXX_SMI_CMD_OP_22_WRITE |</div><div class='add'>+					 (dev &lt;&lt; 5) | reg);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return mv88e6xxx_smi_direct_wait(chip, chip-&gt;sw_addr,</div><div class='add'>+					 MV88E6XXX_SMI_CMD, 15, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_smi_indirect_init(struct mv88e6xxx_chip *chip)</div><div class='add'>+{</div><div class='add'>+	/* Ensure that the chip starts out in the ready state. As both</div><div class='add'>+	 * reads and writes always ensure this on return, they can</div><div class='add'>+	 * safely depend on the chip not being busy on entry.</div><div class='add'>+	 */</div><div class='add'>+	return mv88e6xxx_smi_direct_wait(chip, chip-&gt;sw_addr,</div><div class='add'>+					 MV88E6XXX_SMI_CMD, 15, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct mv88e6xxx_bus_ops mv88e6xxx_smi_indirect_ops = {</div><div class='add'>+	.read = mv88e6xxx_smi_indirect_read,</div><div class='add'>+	.write = mv88e6xxx_smi_indirect_write,</div><div class='add'>+	.init = mv88e6xxx_smi_indirect_init,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_smi_init(struct mv88e6xxx_chip *chip,</div><div class='add'>+		       struct mii_bus *bus, int sw_addr)</div><div class='add'>+{</div><div class='add'>+	if (chip-&gt;info-&gt;dual_chip)</div><div class='add'>+		chip-&gt;smi_ops = &amp;mv88e6xxx_smi_dual_direct_ops;</div><div class='add'>+	else if (sw_addr == 0)</div><div class='add'>+		chip-&gt;smi_ops = &amp;mv88e6xxx_smi_direct_ops;</div><div class='add'>+	else if (chip-&gt;info-&gt;multi_chip)</div><div class='add'>+		chip-&gt;smi_ops = &amp;mv88e6xxx_smi_indirect_ops;</div><div class='add'>+	else</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	chip-&gt;bus = bus;</div><div class='add'>+	chip-&gt;sw_addr = sw_addr;</div><div class='add'>+</div><div class='add'>+	if (chip-&gt;smi_ops-&gt;init)</div><div class='add'>+		return chip-&gt;smi_ops-&gt;init(chip);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/smi.h b/drivers/net/dsa/mv88e6xxx/smi.h<br/>new file mode 100644<br/>index 000000000000..c6c71d5757f5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/smi.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/smi.h</a></div><div class='hunk'>@@ -0,0 +1,55 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+/*</div><div class='add'>+ * Marvell 88E6xxx System Management Interface (SMI) support</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2008 Marvell Semiconductor</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2019 Vivien Didelot &lt;vivien.didelot@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _MV88E6XXX_SMI_H</div><div class='add'>+#define _MV88E6XXX_SMI_H</div><div class='add'>+</div><div class='add'>+#include "chip.h"</div><div class='add'>+</div><div class='add'>+/* Offset 0x00: SMI Command Register */</div><div class='add'>+#define MV88E6XXX_SMI_CMD			0x00</div><div class='add'>+#define MV88E6XXX_SMI_CMD_BUSY			0x8000</div><div class='add'>+#define MV88E6XXX_SMI_CMD_MODE_MASK		0x1000</div><div class='add'>+#define MV88E6XXX_SMI_CMD_MODE_45		0x0000</div><div class='add'>+#define MV88E6XXX_SMI_CMD_MODE_22		0x1000</div><div class='add'>+#define MV88E6XXX_SMI_CMD_OP_MASK		0x0c00</div><div class='add'>+#define MV88E6XXX_SMI_CMD_OP_22_WRITE		0x0400</div><div class='add'>+#define MV88E6XXX_SMI_CMD_OP_22_READ		0x0800</div><div class='add'>+#define MV88E6XXX_SMI_CMD_OP_45_WRITE_ADDR	0x0000</div><div class='add'>+#define MV88E6XXX_SMI_CMD_OP_45_WRITE_DATA	0x0400</div><div class='add'>+#define MV88E6XXX_SMI_CMD_OP_45_READ_DATA	0x0800</div><div class='add'>+#define MV88E6XXX_SMI_CMD_OP_45_READ_DATA_INC	0x0c00</div><div class='add'>+#define MV88E6XXX_SMI_CMD_DEV_ADDR_MASK		0x003e</div><div class='add'>+#define MV88E6XXX_SMI_CMD_REG_ADDR_MASK		0x001f</div><div class='add'>+</div><div class='add'>+/* Offset 0x01: SMI Data Register */</div><div class='add'>+#define MV88E6XXX_SMI_DATA			0x01</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_smi_init(struct mv88e6xxx_chip *chip,</div><div class='add'>+		       struct mii_bus *bus, int sw_addr);</div><div class='add'>+</div><div class='add'>+static inline int mv88e6xxx_smi_read(struct mv88e6xxx_chip *chip,</div><div class='add'>+				     int dev, int reg, u16 *data)</div><div class='add'>+{</div><div class='add'>+	if (chip-&gt;smi_ops &amp;&amp; chip-&gt;smi_ops-&gt;read)</div><div class='add'>+		return chip-&gt;smi_ops-&gt;read(chip, dev, reg, data);</div><div class='add'>+</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int mv88e6xxx_smi_write(struct mv88e6xxx_chip *chip,</div><div class='add'>+				      int dev, int reg, u16 data)</div><div class='add'>+{</div><div class='add'>+	if (chip-&gt;smi_ops &amp;&amp; chip-&gt;smi_ops-&gt;write)</div><div class='add'>+		return chip-&gt;smi_ops-&gt;write(chip, dev, reg, data);</div><div class='add'>+</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* _MV88E6XXX_SMI_H */</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/switchdev.c b/drivers/net/dsa/mv88e6xxx/switchdev.c<br/>new file mode 100644<br/>index 000000000000..4c346a884fb2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/switchdev.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/switchdev.c</a></div><div class='hunk'>@@ -0,0 +1,83 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * switchdev.c</div><div class='add'>+ *</div><div class='add'>+ *	Authors:</div><div class='add'>+ *	Hans J. Schultz		&lt;netdev@kapio-technology.com&gt;</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;net/switchdev.h&gt;</div><div class='add'>+#include "chip.h"</div><div class='add'>+#include "global1.h"</div><div class='add'>+#include "switchdev.h"</div><div class='add'>+</div><div class='add'>+struct mv88e6xxx_fid_search_ctx {</div><div class='add'>+	u16 fid_search;</div><div class='add'>+	u16 vid_found;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __mv88e6xxx_find_vid(struct mv88e6xxx_chip *chip,</div><div class='add'>+				const struct mv88e6xxx_vtu_entry *entry,</div><div class='add'>+				void *priv)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_fid_search_ctx *ctx = priv;</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;fid_search == entry-&gt;fid) {</div><div class='add'>+		ctx-&gt;vid_found = entry-&gt;vid;</div><div class='add'>+		return 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int mv88e6xxx_find_vid(struct mv88e6xxx_chip *chip, u16 fid, u16 *vid)</div><div class='add'>+{</div><div class='add'>+	struct mv88e6xxx_fid_search_ctx ctx;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	ctx.fid_search = fid;</div><div class='add'>+	mv88e6xxx_reg_lock(chip);</div><div class='add'>+	err = mv88e6xxx_vtu_walk(chip, __mv88e6xxx_find_vid, &amp;ctx);</div><div class='add'>+	mv88e6xxx_reg_unlock(chip);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		return err;</div><div class='add'>+	if (err == 1)</div><div class='add'>+		*vid = ctx.vid_found;</div><div class='add'>+	else</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_handle_miss_violation(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				    struct mv88e6xxx_atu_entry *entry, u16 fid)</div><div class='add'>+{</div><div class='add'>+	struct switchdev_notifier_fdb_info info = {</div><div class='add'>+		.addr = entry-&gt;mac,</div><div class='add'>+		.locked = true,</div><div class='add'>+	};</div><div class='add'>+	struct net_device *brport;</div><div class='add'>+	struct dsa_port *dp;</div><div class='add'>+	u16 vid;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = mv88e6xxx_find_vid(chip, fid, &amp;vid);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	info.vid = vid;</div><div class='add'>+	dp = dsa_to_port(chip-&gt;ds, port);</div><div class='add'>+</div><div class='add'>+	rtnl_lock();</div><div class='add'>+	brport = dsa_port_to_bridge_port(dp);</div><div class='add'>+	if (!brport) {</div><div class='add'>+		rtnl_unlock();</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+	err = call_switchdev_notifiers(SWITCHDEV_FDB_ADD_TO_BRIDGE,</div><div class='add'>+				       brport, &amp;info.info, NULL);</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/switchdev.h b/drivers/net/dsa/mv88e6xxx/switchdev.h<br/>new file mode 100644<br/>index 000000000000..62214f9d62b0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/switchdev.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/switchdev.h</a></div><div class='hunk'>@@ -0,0 +1,19 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+ *</div><div class='add'>+ * switchdev.h</div><div class='add'>+ *</div><div class='add'>+ *	Authors:</div><div class='add'>+ *	Hans J. Schultz		&lt;netdev@kapio-technology.com&gt;</div><div class='add'>+ *</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _MV88E6XXX_SWITCHDEV_H_</div><div class='add'>+#define _MV88E6XXX_SWITCHDEV_H_</div><div class='add'>+</div><div class='add'>+#include "chip.h"</div><div class='add'>+</div><div class='add'>+int mv88e6xxx_handle_miss_violation(struct mv88e6xxx_chip *chip, int port,</div><div class='add'>+				    struct mv88e6xxx_atu_entry *entry,</div><div class='add'>+				    u16 fid);</div><div class='add'>+</div><div class='add'>+#endif /* _MV88E6XXX_SWITCHDEV_H_ */</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/trace.c b/drivers/net/dsa/mv88e6xxx/trace.c<br/>new file mode 100644<br/>index 000000000000..7833cb50ca5d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/trace.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/trace.c</a></div><div class='hunk'>@@ -0,0 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/* Copyright 2022 NXP</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define CREATE_TRACE_POINTS</div><div class='add'>+#include "trace.h"</div><div class='head'>diff --git a/drivers/net/dsa/mv88e6xxx/trace.h b/drivers/net/dsa/mv88e6xxx/trace.h<br/>new file mode 100644<br/>index 000000000000..5bd015b2b97a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/mv88e6xxx/trace.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/mv88e6xxx/trace.h</a></div><div class='hunk'>@@ -0,0 +1,96 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+/* Copyright 2022 NXP</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#undef TRACE_SYSTEM</div><div class='add'>+#define TRACE_SYSTEM	mv88e6xxx</div><div class='add'>+</div><div class='add'>+#if !defined(_MV88E6XXX_TRACE_H) || defined(TRACE_HEADER_MULTI_READ)</div><div class='add'>+#define _MV88E6XXX_TRACE_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/if_ether.h&gt;</div><div class='add'>+#include &lt;linux/tracepoint.h&gt;</div><div class='add'>+</div><div class='add'>+DECLARE_EVENT_CLASS(mv88e6xxx_atu_violation,</div><div class='add'>+</div><div class='add'>+	TP_PROTO(const struct device *dev, int spid, u16 portvec,</div><div class='add'>+		 const unsigned char *addr, u16 fid),</div><div class='add'>+</div><div class='add'>+	TP_ARGS(dev, spid, portvec, addr, fid),</div><div class='add'>+</div><div class='add'>+	TP_STRUCT__entry(</div><div class='add'>+		__string(name, dev_name(dev))</div><div class='add'>+		__field(int, spid)</div><div class='add'>+		__field(u16, portvec)</div><div class='add'>+		__array(unsigned char, addr, ETH_ALEN)</div><div class='add'>+		__field(u16, fid)</div><div class='add'>+	),</div><div class='add'>+</div><div class='add'>+	TP_fast_assign(</div><div class='add'>+		__assign_str(name);</div><div class='add'>+		__entry-&gt;spid = spid;</div><div class='add'>+		__entry-&gt;portvec = portvec;</div><div class='add'>+		memcpy(__entry-&gt;addr, addr, ETH_ALEN);</div><div class='add'>+		__entry-&gt;fid = fid;</div><div class='add'>+	),</div><div class='add'>+</div><div class='add'>+	TP_printk("dev %s spid %d portvec 0x%x addr %pM fid %u",</div><div class='add'>+		  __get_str(name), __entry-&gt;spid, __entry-&gt;portvec,</div><div class='add'>+		  __entry-&gt;addr, __entry-&gt;fid)</div><div class='add'>+);</div><div class='add'>+</div><div class='add'>+DEFINE_EVENT(mv88e6xxx_atu_violation, mv88e6xxx_atu_member_violation,</div><div class='add'>+	     TP_PROTO(const struct device *dev, int spid, u16 portvec,</div><div class='add'>+		      const unsigned char *addr, u16 fid),</div><div class='add'>+	     TP_ARGS(dev, spid, portvec, addr, fid));</div><div class='add'>+</div><div class='add'>+DEFINE_EVENT(mv88e6xxx_atu_violation, mv88e6xxx_atu_miss_violation,</div><div class='add'>+	     TP_PROTO(const struct device *dev, int spid, u16 portvec,</div><div class='add'>+		      const unsigned char *addr, u16 fid),</div><div class='add'>+	     TP_ARGS(dev, spid, portvec, addr, fid));</div><div class='add'>+</div><div class='add'>+DEFINE_EVENT(mv88e6xxx_atu_violation, mv88e6xxx_atu_full_violation,</div><div class='add'>+	     TP_PROTO(const struct device *dev, int spid, u16 portvec,</div><div class='add'>+		      const unsigned char *addr, u16 fid),</div><div class='add'>+	     TP_ARGS(dev, spid, portvec, addr, fid));</div><div class='add'>+</div><div class='add'>+DECLARE_EVENT_CLASS(mv88e6xxx_vtu_violation,</div><div class='add'>+</div><div class='add'>+	TP_PROTO(const struct device *dev, int spid, u16 vid),</div><div class='add'>+</div><div class='add'>+	TP_ARGS(dev, spid, vid),</div><div class='add'>+</div><div class='add'>+	TP_STRUCT__entry(</div><div class='add'>+		__string(name, dev_name(dev))</div><div class='add'>+		__field(int, spid)</div><div class='add'>+		__field(u16, vid)</div><div class='add'>+	),</div><div class='add'>+</div><div class='add'>+	TP_fast_assign(</div><div class='add'>+		__assign_str(name);</div><div class='add'>+		__entry-&gt;spid = spid;</div><div class='add'>+		__entry-&gt;vid = vid;</div><div class='add'>+	),</div><div class='add'>+</div><div class='add'>+	TP_printk("dev %s spid %d vid %u",</div><div class='add'>+		  __get_str(name), __entry-&gt;spid, __entry-&gt;vid)</div><div class='add'>+);</div><div class='add'>+</div><div class='add'>+DEFINE_EVENT(mv88e6xxx_vtu_violation, mv88e6xxx_vtu_member_violation,</div><div class='add'>+	     TP_PROTO(const struct device *dev, int spid, u16 vid),</div><div class='add'>+	     TP_ARGS(dev, spid, vid));</div><div class='add'>+</div><div class='add'>+DEFINE_EVENT(mv88e6xxx_vtu_violation, mv88e6xxx_vtu_miss_violation,</div><div class='add'>+	     TP_PROTO(const struct device *dev, int spid, u16 vid),</div><div class='add'>+	     TP_ARGS(dev, spid, vid));</div><div class='add'>+</div><div class='add'>+#endif /* _MV88E6XXX_TRACE_H */</div><div class='add'>+</div><div class='add'>+/* We don't want to use include/trace/events */</div><div class='add'>+#undef TRACE_INCLUDE_PATH</div><div class='add'>+#define TRACE_INCLUDE_PATH .</div><div class='add'>+#undef TRACE_INCLUDE_FILE</div><div class='add'>+#define TRACE_INCLUDE_FILE	trace</div><div class='add'>+/* This part must be outside protection */</div><div class='add'>+#include &lt;trace/define_trace.h&gt;</div><div class='head'>diff --git a/drivers/net/dsa/ocelot/Kconfig b/drivers/net/dsa/ocelot/Kconfig<br/>new file mode 100644<br/>index 000000000000..081e7a88ea02<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/ocelot/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/ocelot/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,64 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+config NET_DSA_MSCC_FELIX_DSA_LIB</div><div class='add'>+	tristate</div><div class='add'>+	help</div><div class='add'>+	  This is an umbrella module for all network switches that are</div><div class='add'>+	  register-compatible with Ocelot and that perform I/O to their host</div><div class='add'>+	  CPU through an NPI (Node Processor Interface) Ethernet port.</div><div class='add'>+	  Its name comes from the first hardware chip to make use of it</div><div class='add'>+	  (VSC9959), code named Felix.</div><div class='add'>+</div><div class='add'>+config NET_DSA_MSCC_OCELOT_EXT</div><div class='add'>+	tristate "Ocelot External Ethernet switch support"</div><div class='add'>+	depends on NET_DSA &amp;&amp; SPI</div><div class='add'>+	depends on NET_VENDOR_MICROSEMI</div><div class='add'>+	depends on PTP_1588_CLOCK_OPTIONAL</div><div class='add'>+	select MDIO_MSCC_MIIM</div><div class='add'>+	select MFD_OCELOT</div><div class='add'>+	select MSCC_OCELOT_SWITCH_LIB</div><div class='add'>+	select NET_DSA_MSCC_FELIX_DSA_LIB</div><div class='add'>+	select NET_DSA_TAG_OCELOT_8021Q</div><div class='add'>+	select NET_DSA_TAG_OCELOT</div><div class='add'>+	help</div><div class='add'>+	  This driver supports the VSC7511, VSC7512, VSC7513 and VSC7514 chips</div><div class='add'>+	  when controlled through SPI.</div><div class='add'>+</div><div class='add'>+	  The Ocelot switch family is a set of multi-port networking chips. All</div><div class='add'>+	  of these chips have the ability to be controlled externally through</div><div class='add'>+	  SPI or PCIe interfaces.</div><div class='add'>+</div><div class='add'>+	  Say "Y" here to enable external control to these chips.</div><div class='add'>+</div><div class='add'>+config NET_DSA_MSCC_FELIX</div><div class='add'>+	tristate "Ocelot / Felix Ethernet switch support"</div><div class='add'>+	depends on NET_DSA &amp;&amp; PCI</div><div class='add'>+	depends on NET_VENDOR_MICROSEMI</div><div class='add'>+	depends on NET_VENDOR_FREESCALE</div><div class='add'>+	depends on HAS_IOMEM</div><div class='add'>+	depends on PTP_1588_CLOCK_OPTIONAL</div><div class='add'>+	depends on NET_SCH_TAPRIO || NET_SCH_TAPRIO=n</div><div class='add'>+	select MSCC_OCELOT_SWITCH_LIB</div><div class='add'>+	select NET_DSA_MSCC_FELIX_DSA_LIB</div><div class='add'>+	select NET_DSA_TAG_OCELOT_8021Q</div><div class='add'>+	select NET_DSA_TAG_OCELOT</div><div class='add'>+	select FSL_ENETC_MDIO</div><div class='add'>+	select PCS_LYNX</div><div class='add'>+	help</div><div class='add'>+	  This driver supports the VSC9959 (Felix) switch, which is embedded as</div><div class='add'>+	  a PCIe function of the NXP LS1028A ENETC RCiEP.</div><div class='add'>+</div><div class='add'>+config NET_DSA_MSCC_SEVILLE</div><div class='add'>+	tristate "Ocelot / Seville Ethernet switch support"</div><div class='add'>+	depends on NET_DSA</div><div class='add'>+	depends on NET_VENDOR_MICROSEMI</div><div class='add'>+	depends on HAS_IOMEM</div><div class='add'>+	depends on PTP_1588_CLOCK_OPTIONAL</div><div class='add'>+	select MDIO_MSCC_MIIM</div><div class='add'>+	select MSCC_OCELOT_SWITCH_LIB</div><div class='add'>+	select NET_DSA_MSCC_FELIX_DSA_LIB</div><div class='add'>+	select NET_DSA_TAG_OCELOT_8021Q</div><div class='add'>+	select NET_DSA_TAG_OCELOT</div><div class='add'>+	select PCS_LYNX</div><div class='add'>+	help</div><div class='add'>+	  This driver supports the VSC9953 (Seville) switch, which is embedded</div><div class='add'>+	  as a platform device on the NXP T1040 SoC.</div><div class='head'>diff --git a/drivers/net/dsa/ocelot/Makefile b/drivers/net/dsa/ocelot/Makefile<br/>new file mode 100644<br/>index 000000000000..ead868a293e3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/ocelot/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/ocelot/Makefile</a></div><div class='hunk'>@@ -0,0 +1,10 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+obj-$(CONFIG_NET_DSA_MSCC_FELIX_DSA_LIB) += mscc_felix_dsa_lib.o</div><div class='add'>+obj-$(CONFIG_NET_DSA_MSCC_FELIX) += mscc_felix.o</div><div class='add'>+obj-$(CONFIG_NET_DSA_MSCC_OCELOT_EXT) += mscc_ocelot_ext.o</div><div class='add'>+obj-$(CONFIG_NET_DSA_MSCC_SEVILLE) += mscc_seville.o</div><div class='add'>+</div><div class='add'>+mscc_felix_dsa_lib-objs := felix.o</div><div class='add'>+mscc_felix-objs := felix_vsc9959.o</div><div class='add'>+mscc_ocelot_ext-objs := ocelot_ext.o</div><div class='add'>+mscc_seville-objs := seville_vsc9953.o</div><div class='head'>diff --git a/drivers/net/dsa/ocelot/felix.c b/drivers/net/dsa/ocelot/felix.c<br/>new file mode 100644<br/>index 000000000000..9e5ede932b42<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/ocelot/felix.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/ocelot/felix.c</a></div><div class='hunk'>@@ -0,0 +1,2463 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright 2019-2021 NXP</div><div class='add'>+ *</div><div class='add'>+ * This is an umbrella module for all network switches that are</div><div class='add'>+ * register-compatible with Ocelot and that perform I/O to their host CPU</div><div class='add'>+ * through an NPI (Node Processor Interface) Ethernet port.</div><div class='add'>+ */</div><div class='add'>+#include &lt;uapi/linux/if_bridge.h&gt;</div><div class='add'>+#include &lt;soc/mscc/ocelot_vcap.h&gt;</div><div class='add'>+#include &lt;soc/mscc/ocelot_qsys.h&gt;</div><div class='add'>+#include &lt;soc/mscc/ocelot_sys.h&gt;</div><div class='add'>+#include &lt;soc/mscc/ocelot_dev.h&gt;</div><div class='add'>+#include &lt;soc/mscc/ocelot_ana.h&gt;</div><div class='add'>+#include &lt;soc/mscc/ocelot_ptp.h&gt;</div><div class='add'>+#include &lt;soc/mscc/ocelot.h&gt;</div><div class='add'>+#include &lt;linux/dsa/8021q.h&gt;</div><div class='add'>+#include &lt;linux/dsa/ocelot.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/ptp_classify.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of_net.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;net/pkt_sched.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+#include "felix.h"</div><div class='add'>+</div><div class='add'>+/* Translate the DSA database API into the ocelot switch library API,</div><div class='add'>+ * which uses VID 0 for all ports that aren't part of a bridge,</div><div class='add'>+ * and expects the bridge_dev to be NULL in that case.</div><div class='add'>+ */</div><div class='add'>+static struct net_device *felix_classify_db(struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	switch (db.type) {</div><div class='add'>+	case DSA_DB_PORT:</div><div class='add'>+	case DSA_DB_LAG:</div><div class='add'>+		return NULL;</div><div class='add'>+	case DSA_DB_BRIDGE:</div><div class='add'>+		return db.bridge.dev;</div><div class='add'>+	default:</div><div class='add'>+		return ERR_PTR(-EOPNOTSUPP);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_cpu_port_for_conduit(struct dsa_switch *ds,</div><div class='add'>+				      struct net_device *conduit)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	struct dsa_port *cpu_dp;</div><div class='add'>+	int lag;</div><div class='add'>+</div><div class='add'>+	if (netif_is_lag_master(conduit)) {</div><div class='add'>+		mutex_lock(&amp;ocelot-&gt;fwd_domain_lock);</div><div class='add'>+		lag = ocelot_bond_get_id(ocelot, conduit);</div><div class='add'>+		mutex_unlock(&amp;ocelot-&gt;fwd_domain_lock);</div><div class='add'>+</div><div class='add'>+		return lag;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cpu_dp = conduit-&gt;dsa_ptr;</div><div class='add'>+	return cpu_dp-&gt;index;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * felix_update_tag_8021q_rx_rule - Update VCAP ES0 tag_8021q rule after</div><div class='add'>+ *				    vlan_filtering change</div><div class='add'>+ * @outer_tagging_rule: Pointer to VCAP filter on which the update is performed</div><div class='add'>+ * @vlan_filtering: Current bridge VLAN filtering setting</div><div class='add'>+ *</div><div class='add'>+ * Source port identification for tag_8021q is done using VCAP ES0 rules on the</div><div class='add'>+ * CPU port(s). The ES0 tag B (inner tag from the packet) can be configured as</div><div class='add'>+ * either:</div><div class='add'>+ * - push_inner_tag=0: the inner tag is never pushed into the frame</div><div class='add'>+ *		       (and we lose info about the classified VLAN). This is</div><div class='add'>+ *		       good when the classified VLAN is a discardable quantity</div><div class='add'>+ *		       for the software RX path: it is either set to</div><div class='add'>+ *		       OCELOT_STANDALONE_PVID, or to</div><div class='add'>+ *		       ocelot_vlan_unaware_pvid(bridge).</div><div class='add'>+ * - push_inner_tag=1: the inner tag is always pushed. This is good when the</div><div class='add'>+ *		       classified VLAN is not a discardable quantity (the port</div><div class='add'>+ *		       is under a VLAN-aware bridge, and software needs to</div><div class='add'>+ *		       continue processing the packet in the same VLAN as the</div><div class='add'>+ *		       hardware).</div><div class='add'>+ * The point is that what is good for a VLAN-unaware port is not good for a</div><div class='add'>+ * VLAN-aware port, and vice versa. Thus, the RX tagging rules must be kept in</div><div class='add'>+ * sync with the VLAN filtering state of the port.</div><div class='add'>+ */</div><div class='add'>+static void</div><div class='add'>+felix_update_tag_8021q_rx_rule(struct ocelot_vcap_filter *outer_tagging_rule,</div><div class='add'>+			       bool vlan_filtering)</div><div class='add'>+{</div><div class='add'>+	if (vlan_filtering)</div><div class='add'>+		outer_tagging_rule-&gt;action.push_inner_tag = OCELOT_ES0_TAG;</div><div class='add'>+	else</div><div class='add'>+		outer_tagging_rule-&gt;action.push_inner_tag = OCELOT_NO_ES0_TAG;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Set up VCAP ES0 rules for pushing a tag_8021q VLAN towards the CPU such that</div><div class='add'>+ * the tagger can perform RX source port identification.</div><div class='add'>+ */</div><div class='add'>+static int felix_tag_8021q_vlan_add_rx(struct dsa_switch *ds, int port,</div><div class='add'>+				       int upstream, u16 vid,</div><div class='add'>+				       bool vlan_filtering)</div><div class='add'>+{</div><div class='add'>+	struct ocelot_vcap_filter *outer_tagging_rule;</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	unsigned long cookie;</div><div class='add'>+	int key_length, err;</div><div class='add'>+</div><div class='add'>+	key_length = ocelot-&gt;vcap[VCAP_ES0].keys[VCAP_ES0_IGR_PORT].length;</div><div class='add'>+</div><div class='add'>+	outer_tagging_rule = kzalloc(sizeof(struct ocelot_vcap_filter),</div><div class='add'>+				     GFP_KERNEL);</div><div class='add'>+	if (!outer_tagging_rule)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	cookie = OCELOT_VCAP_ES0_TAG_8021Q_RXVLAN(ocelot, port, upstream);</div><div class='add'>+</div><div class='add'>+	outer_tagging_rule-&gt;key_type = OCELOT_VCAP_KEY_ANY;</div><div class='add'>+	outer_tagging_rule-&gt;prio = 1;</div><div class='add'>+	outer_tagging_rule-&gt;id.cookie = cookie;</div><div class='add'>+	outer_tagging_rule-&gt;id.tc_offload = false;</div><div class='add'>+	outer_tagging_rule-&gt;block_id = VCAP_ES0;</div><div class='add'>+	outer_tagging_rule-&gt;type = OCELOT_VCAP_FILTER_OFFLOAD;</div><div class='add'>+	outer_tagging_rule-&gt;lookup = 0;</div><div class='add'>+	outer_tagging_rule-&gt;ingress_port.value = port;</div><div class='add'>+	outer_tagging_rule-&gt;ingress_port.mask = GENMASK(key_length - 1, 0);</div><div class='add'>+	outer_tagging_rule-&gt;egress_port.value = upstream;</div><div class='add'>+	outer_tagging_rule-&gt;egress_port.mask = GENMASK(key_length - 1, 0);</div><div class='add'>+	outer_tagging_rule-&gt;action.push_outer_tag = OCELOT_ES0_TAG;</div><div class='add'>+	outer_tagging_rule-&gt;action.tag_a_tpid_sel = OCELOT_TAG_TPID_SEL_8021AD;</div><div class='add'>+	outer_tagging_rule-&gt;action.tag_a_vid_sel = 1;</div><div class='add'>+	outer_tagging_rule-&gt;action.vid_a_val = vid;</div><div class='add'>+	felix_update_tag_8021q_rx_rule(outer_tagging_rule, vlan_filtering);</div><div class='add'>+	outer_tagging_rule-&gt;action.tag_b_tpid_sel = OCELOT_TAG_TPID_SEL_8021Q;</div><div class='add'>+	/* Leave TAG_B_VID_SEL at 0 (Classified VID + VID_B_VAL). Since we also</div><div class='add'>+	 * leave VID_B_VAL at 0, this makes ES0 tag B (the inner tag) equal to</div><div class='add'>+	 * the classified VID, which we need to see in the DSA tagger's receive</div><div class='add'>+	 * path. Note: the inner tag is only visible in the packet when pushed</div><div class='add'>+	 * (push_inner_tag == OCELOT_ES0_TAG).</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	err = ocelot_vcap_filter_add(ocelot, outer_tagging_rule, NULL);</div><div class='add'>+	if (err)</div><div class='add'>+		kfree(outer_tagging_rule);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_tag_8021q_vlan_del_rx(struct dsa_switch *ds, int port,</div><div class='add'>+				       int upstream, u16 vid)</div><div class='add'>+{</div><div class='add'>+	struct ocelot_vcap_filter *outer_tagging_rule;</div><div class='add'>+	struct ocelot_vcap_block *block_vcap_es0;</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	unsigned long cookie;</div><div class='add'>+</div><div class='add'>+	block_vcap_es0 = &amp;ocelot-&gt;block[VCAP_ES0];</div><div class='add'>+	cookie = OCELOT_VCAP_ES0_TAG_8021Q_RXVLAN(ocelot, port, upstream);</div><div class='add'>+</div><div class='add'>+	outer_tagging_rule = ocelot_vcap_block_find_filter_by_id(block_vcap_es0,</div><div class='add'>+								 cookie, false);</div><div class='add'>+	if (!outer_tagging_rule)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	return ocelot_vcap_filter_del(ocelot, outer_tagging_rule);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Set up VCAP IS1 rules for stripping the tag_8021q VLAN on TX and VCAP IS2</div><div class='add'>+ * rules for steering those tagged packets towards the correct destination port</div><div class='add'>+ */</div><div class='add'>+static int felix_tag_8021q_vlan_add_tx(struct dsa_switch *ds, int port,</div><div class='add'>+				       u16 vid)</div><div class='add'>+{</div><div class='add'>+	struct ocelot_vcap_filter *untagging_rule, *redirect_rule;</div><div class='add'>+	unsigned long cpu_ports = dsa_cpu_ports(ds);</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	unsigned long cookie;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	untagging_rule = kzalloc(sizeof(struct ocelot_vcap_filter), GFP_KERNEL);</div><div class='add'>+	if (!untagging_rule)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	redirect_rule = kzalloc(sizeof(struct ocelot_vcap_filter), GFP_KERNEL);</div><div class='add'>+	if (!redirect_rule) {</div><div class='add'>+		kfree(untagging_rule);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cookie = OCELOT_VCAP_IS1_TAG_8021Q_TXVLAN(ocelot, port);</div><div class='add'>+</div><div class='add'>+	untagging_rule-&gt;key_type = OCELOT_VCAP_KEY_ANY;</div><div class='add'>+	untagging_rule-&gt;ingress_port_mask = cpu_ports;</div><div class='add'>+	untagging_rule-&gt;vlan.vid.value = vid;</div><div class='add'>+	untagging_rule-&gt;vlan.vid.mask = VLAN_VID_MASK;</div><div class='add'>+	untagging_rule-&gt;prio = 1;</div><div class='add'>+	untagging_rule-&gt;id.cookie = cookie;</div><div class='add'>+	untagging_rule-&gt;id.tc_offload = false;</div><div class='add'>+	untagging_rule-&gt;block_id = VCAP_IS1;</div><div class='add'>+	untagging_rule-&gt;type = OCELOT_VCAP_FILTER_OFFLOAD;</div><div class='add'>+	untagging_rule-&gt;lookup = 0;</div><div class='add'>+	untagging_rule-&gt;action.vlan_pop_cnt_ena = true;</div><div class='add'>+	untagging_rule-&gt;action.vlan_pop_cnt = 1;</div><div class='add'>+	untagging_rule-&gt;action.pag_override_mask = 0xff;</div><div class='add'>+	untagging_rule-&gt;action.pag_val = port;</div><div class='add'>+</div><div class='add'>+	err = ocelot_vcap_filter_add(ocelot, untagging_rule, NULL);</div><div class='add'>+	if (err) {</div><div class='add'>+		kfree(untagging_rule);</div><div class='add'>+		kfree(redirect_rule);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cookie = OCELOT_VCAP_IS2_TAG_8021Q_TXVLAN(ocelot, port);</div><div class='add'>+</div><div class='add'>+	redirect_rule-&gt;key_type = OCELOT_VCAP_KEY_ANY;</div><div class='add'>+	redirect_rule-&gt;ingress_port_mask = cpu_ports;</div><div class='add'>+	redirect_rule-&gt;pag = port;</div><div class='add'>+	redirect_rule-&gt;prio = 1;</div><div class='add'>+	redirect_rule-&gt;id.cookie = cookie;</div><div class='add'>+	redirect_rule-&gt;id.tc_offload = false;</div><div class='add'>+	redirect_rule-&gt;block_id = VCAP_IS2;</div><div class='add'>+	redirect_rule-&gt;type = OCELOT_VCAP_FILTER_OFFLOAD;</div><div class='add'>+	redirect_rule-&gt;lookup = 0;</div><div class='add'>+	redirect_rule-&gt;action.mask_mode = OCELOT_MASK_MODE_REDIRECT;</div><div class='add'>+	redirect_rule-&gt;action.port_mask = BIT(port);</div><div class='add'>+</div><div class='add'>+	err = ocelot_vcap_filter_add(ocelot, redirect_rule, NULL);</div><div class='add'>+	if (err) {</div><div class='add'>+		ocelot_vcap_filter_del(ocelot, untagging_rule);</div><div class='add'>+		kfree(redirect_rule);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_tag_8021q_vlan_del_tx(struct dsa_switch *ds, int port, u16 vid)</div><div class='add'>+{</div><div class='add'>+	struct ocelot_vcap_filter *untagging_rule, *redirect_rule;</div><div class='add'>+	struct ocelot_vcap_block *block_vcap_is1;</div><div class='add'>+	struct ocelot_vcap_block *block_vcap_is2;</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	unsigned long cookie;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	block_vcap_is1 = &amp;ocelot-&gt;block[VCAP_IS1];</div><div class='add'>+	block_vcap_is2 = &amp;ocelot-&gt;block[VCAP_IS2];</div><div class='add'>+</div><div class='add'>+	cookie = OCELOT_VCAP_IS1_TAG_8021Q_TXVLAN(ocelot, port);</div><div class='add'>+	untagging_rule = ocelot_vcap_block_find_filter_by_id(block_vcap_is1,</div><div class='add'>+							     cookie, false);</div><div class='add'>+	if (!untagging_rule)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	err = ocelot_vcap_filter_del(ocelot, untagging_rule);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	cookie = OCELOT_VCAP_IS2_TAG_8021Q_TXVLAN(ocelot, port);</div><div class='add'>+	redirect_rule = ocelot_vcap_block_find_filter_by_id(block_vcap_is2,</div><div class='add'>+							    cookie, false);</div><div class='add'>+	if (!redirect_rule)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	return ocelot_vcap_filter_del(ocelot, redirect_rule);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_tag_8021q_vlan_add(struct dsa_switch *ds, int port, u16 vid,</div><div class='add'>+				    u16 flags)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(ds, port);</div><div class='add'>+	struct dsa_port *cpu_dp;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* tag_8021q.c assumes we are implementing this via port VLAN</div><div class='add'>+	 * membership, which we aren't. So we don't need to add any VCAP filter</div><div class='add'>+	 * for the CPU port.</div><div class='add'>+	 */</div><div class='add'>+	if (!dsa_port_is_user(dp))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	dsa_switch_for_each_cpu_port(cpu_dp, ds) {</div><div class='add'>+		err = felix_tag_8021q_vlan_add_rx(ds, port, cpu_dp-&gt;index, vid,</div><div class='add'>+						  dsa_port_is_vlan_filtering(dp));</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = felix_tag_8021q_vlan_add_tx(ds, port, vid);</div><div class='add'>+	if (err)</div><div class='add'>+		goto add_tx_failed;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+add_tx_failed:</div><div class='add'>+	dsa_switch_for_each_cpu_port(cpu_dp, ds)</div><div class='add'>+		felix_tag_8021q_vlan_del_rx(ds, port, cpu_dp-&gt;index, vid);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_tag_8021q_vlan_del(struct dsa_switch *ds, int port, u16 vid)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(ds, port);</div><div class='add'>+	struct dsa_port *cpu_dp;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!dsa_port_is_user(dp))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	dsa_switch_for_each_cpu_port(cpu_dp, ds) {</div><div class='add'>+		err = felix_tag_8021q_vlan_del_rx(ds, port, cpu_dp-&gt;index, vid);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = felix_tag_8021q_vlan_del_tx(ds, port, vid);</div><div class='add'>+	if (err)</div><div class='add'>+		goto del_tx_failed;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+del_tx_failed:</div><div class='add'>+	dsa_switch_for_each_cpu_port(cpu_dp, ds)</div><div class='add'>+		felix_tag_8021q_vlan_add_rx(ds, port, cpu_dp-&gt;index, vid,</div><div class='add'>+					    dsa_port_is_vlan_filtering(dp));</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_update_tag_8021q_rx_rules(struct dsa_switch *ds, int port,</div><div class='add'>+					   bool vlan_filtering)</div><div class='add'>+{</div><div class='add'>+	struct ocelot_vcap_filter *outer_tagging_rule;</div><div class='add'>+	struct ocelot_vcap_block *block_vcap_es0;</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	struct dsa_port *cpu_dp;</div><div class='add'>+	unsigned long cookie;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	block_vcap_es0 = &amp;ocelot-&gt;block[VCAP_ES0];</div><div class='add'>+</div><div class='add'>+	dsa_switch_for_each_cpu_port(cpu_dp, ds) {</div><div class='add'>+		cookie = OCELOT_VCAP_ES0_TAG_8021Q_RXVLAN(ocelot, port,</div><div class='add'>+							  cpu_dp-&gt;index);</div><div class='add'>+</div><div class='add'>+		outer_tagging_rule = ocelot_vcap_block_find_filter_by_id(block_vcap_es0,</div><div class='add'>+									 cookie, false);</div><div class='add'>+</div><div class='add'>+		felix_update_tag_8021q_rx_rule(outer_tagging_rule, vlan_filtering);</div><div class='add'>+</div><div class='add'>+		err = ocelot_vcap_filter_replace(ocelot, outer_tagging_rule);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_trap_get_cpu_port(struct dsa_switch *ds,</div><div class='add'>+				   const struct ocelot_vcap_filter *trap)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp;</div><div class='add'>+	int first_port;</div><div class='add'>+</div><div class='add'>+	if (WARN_ON(!trap-&gt;ingress_port_mask))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	first_port = __ffs(trap-&gt;ingress_port_mask);</div><div class='add'>+	dp = dsa_to_port(ds, first_port);</div><div class='add'>+</div><div class='add'>+	return dp-&gt;cpu_dp-&gt;index;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* On switches with no extraction IRQ wired, trapped packets need to be</div><div class='add'>+ * replicated over Ethernet as well, otherwise we'd get no notification of</div><div class='add'>+ * their arrival when using the ocelot-8021q tagging protocol.</div><div class='add'>+ */</div><div class='add'>+static int felix_update_trapping_destinations(struct dsa_switch *ds,</div><div class='add'>+					      bool using_tag_8021q)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	struct felix *felix = ocelot_to_felix(ocelot);</div><div class='add'>+	struct ocelot_vcap_block *block_vcap_is2;</div><div class='add'>+	struct ocelot_vcap_filter *trap;</div><div class='add'>+	enum ocelot_mask_mode mask_mode;</div><div class='add'>+	unsigned long port_mask;</div><div class='add'>+	bool cpu_copy_ena;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!felix-&gt;info-&gt;quirk_no_xtr_irq)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* We are sure that "cpu" was found, otherwise</div><div class='add'>+	 * dsa_tree_setup_default_cpu() would have failed earlier.</div><div class='add'>+	 */</div><div class='add'>+	block_vcap_is2 = &amp;ocelot-&gt;block[VCAP_IS2];</div><div class='add'>+</div><div class='add'>+	/* Make sure all traps are set up for that destination */</div><div class='add'>+	list_for_each_entry(trap, &amp;block_vcap_is2-&gt;rules, list) {</div><div class='add'>+		if (!trap-&gt;is_trap)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* Figure out the current trapping destination */</div><div class='add'>+		if (using_tag_8021q) {</div><div class='add'>+			/* Redirect to the tag_8021q CPU port. If timestamps</div><div class='add'>+			 * are necessary, also copy trapped packets to the CPU</div><div class='add'>+			 * port module.</div><div class='add'>+			 */</div><div class='add'>+			mask_mode = OCELOT_MASK_MODE_REDIRECT;</div><div class='add'>+			port_mask = BIT(felix_trap_get_cpu_port(ds, trap));</div><div class='add'>+			cpu_copy_ena = !!trap-&gt;take_ts;</div><div class='add'>+		} else {</div><div class='add'>+			/* Trap packets only to the CPU port module, which is</div><div class='add'>+			 * redirected to the NPI port (the DSA CPU port)</div><div class='add'>+			 */</div><div class='add'>+			mask_mode = OCELOT_MASK_MODE_PERMIT_DENY;</div><div class='add'>+			port_mask = 0;</div><div class='add'>+			cpu_copy_ena = true;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (trap-&gt;action.mask_mode == mask_mode &amp;&amp;</div><div class='add'>+		    trap-&gt;action.port_mask == port_mask &amp;&amp;</div><div class='add'>+		    trap-&gt;action.cpu_copy_ena == cpu_copy_ena)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		trap-&gt;action.mask_mode = mask_mode;</div><div class='add'>+		trap-&gt;action.port_mask = port_mask;</div><div class='add'>+		trap-&gt;action.cpu_copy_ena = cpu_copy_ena;</div><div class='add'>+</div><div class='add'>+		err = ocelot_vcap_filter_replace(ocelot, trap);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The CPU port module is connected to the Node Processor Interface (NPI). This</div><div class='add'>+ * is the mode through which frames can be injected from and extracted to an</div><div class='add'>+ * external CPU, over Ethernet. In NXP SoCs, the "external CPU" is the ARM CPU</div><div class='add'>+ * running Linux, and this forms a DSA setup together with the enetc or fman</div><div class='add'>+ * DSA conduit.</div><div class='add'>+ */</div><div class='add'>+static void felix_npi_port_init(struct ocelot *ocelot, int port)</div><div class='add'>+{</div><div class='add'>+	ocelot-&gt;npi = port;</div><div class='add'>+</div><div class='add'>+	ocelot_write(ocelot, QSYS_EXT_CPU_CFG_EXT_CPUQ_MSK_M |</div><div class='add'>+		     QSYS_EXT_CPU_CFG_EXT_CPU_PORT(port),</div><div class='add'>+		     QSYS_EXT_CPU_CFG);</div><div class='add'>+</div><div class='add'>+	/* NPI port Injection/Extraction configuration */</div><div class='add'>+	ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_XTR_HDR,</div><div class='add'>+			    ocelot-&gt;npi_xtr_prefix);</div><div class='add'>+	ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_INJ_HDR,</div><div class='add'>+			    ocelot-&gt;npi_inj_prefix);</div><div class='add'>+</div><div class='add'>+	/* Disable transmission of pause frames */</div><div class='add'>+	ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void felix_npi_port_deinit(struct ocelot *ocelot, int port)</div><div class='add'>+{</div><div class='add'>+	/* Restore hardware defaults */</div><div class='add'>+	int unused_port = ocelot-&gt;num_phys_ports + 2;</div><div class='add'>+</div><div class='add'>+	ocelot-&gt;npi = -1;</div><div class='add'>+</div><div class='add'>+	ocelot_write(ocelot, QSYS_EXT_CPU_CFG_EXT_CPU_PORT(unused_port),</div><div class='add'>+		     QSYS_EXT_CPU_CFG);</div><div class='add'>+</div><div class='add'>+	ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_XTR_HDR,</div><div class='add'>+			    OCELOT_TAG_PREFIX_DISABLED);</div><div class='add'>+	ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_INJ_HDR,</div><div class='add'>+			    OCELOT_TAG_PREFIX_DISABLED);</div><div class='add'>+</div><div class='add'>+	/* Enable transmission of pause frames */</div><div class='add'>+	ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_tag_npi_setup(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp, *first_cpu_dp = NULL;</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	dsa_switch_for_each_user_port(dp, ds) {</div><div class='add'>+		if (first_cpu_dp &amp;&amp; dp-&gt;cpu_dp != first_cpu_dp) {</div><div class='add'>+			dev_err(ds-&gt;dev, "Multiple NPI ports not supported\n");</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		first_cpu_dp = dp-&gt;cpu_dp;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!first_cpu_dp)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	felix_npi_port_init(ocelot, first_cpu_dp-&gt;index);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void felix_tag_npi_teardown(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	felix_npi_port_deinit(ocelot, ocelot-&gt;npi);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned long felix_tag_npi_get_host_fwd_mask(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return BIT(ocelot-&gt;num_phys_ports);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_tag_npi_change_conduit(struct dsa_switch *ds, int port,</div><div class='add'>+					struct net_device *conduit,</div><div class='add'>+					struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(ds, port), *other_dp;</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (netif_is_lag_master(conduit)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "LAG DSA conduit only supported using ocelot-8021q");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Changing the NPI port breaks user ports still assigned to the old</div><div class='add'>+	 * one, so only allow it while they're down, and don't allow them to</div><div class='add'>+	 * come back up until they're all changed to the new one.</div><div class='add'>+	 */</div><div class='add'>+	dsa_switch_for_each_user_port(other_dp, ds) {</div><div class='add'>+		struct net_device *user = other_dp-&gt;user;</div><div class='add'>+</div><div class='add'>+		if (other_dp != dp &amp;&amp; (user-&gt;flags &amp; IFF_UP) &amp;&amp;</div><div class='add'>+		    dsa_port_to_conduit(other_dp) != conduit) {</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+					   "Cannot change while old conduit still has users");</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	felix_npi_port_deinit(ocelot, ocelot-&gt;npi);</div><div class='add'>+	felix_npi_port_init(ocelot, felix_cpu_port_for_conduit(ds, conduit));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Alternatively to using the NPI functionality, that same hardware MAC</div><div class='add'>+ * connected internally to the enetc or fman DSA conduit can be configured to</div><div class='add'>+ * use the software-defined tag_8021q frame format. As far as the hardware is</div><div class='add'>+ * concerned, it thinks it is a "dumb switch" - the queues of the CPU port</div><div class='add'>+ * module are now disconnected from it, but can still be accessed through</div><div class='add'>+ * register-based MMIO.</div><div class='add'>+ */</div><div class='add'>+static const struct felix_tag_proto_ops felix_tag_npi_proto_ops = {</div><div class='add'>+	.setup			= felix_tag_npi_setup,</div><div class='add'>+	.teardown		= felix_tag_npi_teardown,</div><div class='add'>+	.get_host_fwd_mask	= felix_tag_npi_get_host_fwd_mask,</div><div class='add'>+	.change_conduit		= felix_tag_npi_change_conduit,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int felix_tag_8021q_setup(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	struct dsa_port *dp;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = dsa_tag_8021q_register(ds, htons(ETH_P_8021AD));</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	dsa_switch_for_each_cpu_port(dp, ds)</div><div class='add'>+		ocelot_port_setup_dsa_8021q_cpu(ocelot, dp-&gt;index);</div><div class='add'>+</div><div class='add'>+	dsa_switch_for_each_user_port(dp, ds)</div><div class='add'>+		ocelot_port_assign_dsa_8021q_cpu(ocelot, dp-&gt;index,</div><div class='add'>+						 dp-&gt;cpu_dp-&gt;index);</div><div class='add'>+</div><div class='add'>+	dsa_switch_for_each_available_port(dp, ds)</div><div class='add'>+		/* This overwrites ocelot_init():</div><div class='add'>+		 * Do not forward BPDU frames to the CPU port module,</div><div class='add'>+		 * for 2 reasons:</div><div class='add'>+		 * - When these packets are injected from the tag_8021q</div><div class='add'>+		 *   CPU port, we want them to go out, not loop back</div><div class='add'>+		 *   into the system.</div><div class='add'>+		 * - STP traffic ingressing on a user port should go to</div><div class='add'>+		 *   the tag_8021q CPU port, not to the hardware CPU</div><div class='add'>+		 *   port module.</div><div class='add'>+		 */</div><div class='add'>+		ocelot_write_gix(ocelot,</div><div class='add'>+				 ANA_PORT_CPU_FWD_BPDU_CFG_BPDU_REDIR_ENA(0),</div><div class='add'>+				 ANA_PORT_CPU_FWD_BPDU_CFG, dp-&gt;index);</div><div class='add'>+</div><div class='add'>+	/* The ownership of the CPU port module's queues might have just been</div><div class='add'>+	 * transferred to the tag_8021q tagger from the NPI-based tagger.</div><div class='add'>+	 * So there might still be all sorts of crap in the queues. On the</div><div class='add'>+	 * other hand, the MMIO-based matching of PTP frames is very brittle,</div><div class='add'>+	 * so we need to be careful that there are no extra frames to be</div><div class='add'>+	 * dequeued over MMIO, since we would never know to discard them.</div><div class='add'>+	 */</div><div class='add'>+	ocelot_lock_xtr_grp_bh(ocelot, 0);</div><div class='add'>+	ocelot_drain_cpu_queue(ocelot, 0);</div><div class='add'>+	ocelot_unlock_xtr_grp_bh(ocelot, 0);</div><div class='add'>+</div><div class='add'>+	/* Problem: when using push_inner_tag=1 for ES0 tag B, we lose info</div><div class='add'>+	 * about whether the received packets were VLAN-tagged on the wire,</div><div class='add'>+	 * since they are always tagged on egress towards the CPU port.</div><div class='add'>+	 *</div><div class='add'>+	 * Since using push_inner_tag=1 is unavoidable for VLAN-aware bridges,</div><div class='add'>+	 * we must work around the fallout by untagging in software to make</div><div class='add'>+	 * untagged reception work more or less as expected.</div><div class='add'>+	 */</div><div class='add'>+	ds-&gt;untag_vlan_aware_bridge_pvid = true;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void felix_tag_8021q_teardown(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	struct dsa_port *dp;</div><div class='add'>+</div><div class='add'>+	dsa_switch_for_each_available_port(dp, ds)</div><div class='add'>+		/* Restore the logic from ocelot_init:</div><div class='add'>+		 * do not forward BPDU frames to the front ports.</div><div class='add'>+		 */</div><div class='add'>+		ocelot_write_gix(ocelot,</div><div class='add'>+				 ANA_PORT_CPU_FWD_BPDU_CFG_BPDU_REDIR_ENA(0xffff),</div><div class='add'>+				 ANA_PORT_CPU_FWD_BPDU_CFG,</div><div class='add'>+				 dp-&gt;index);</div><div class='add'>+</div><div class='add'>+	dsa_switch_for_each_user_port(dp, ds)</div><div class='add'>+		ocelot_port_unassign_dsa_8021q_cpu(ocelot, dp-&gt;index);</div><div class='add'>+</div><div class='add'>+	dsa_switch_for_each_cpu_port(dp, ds)</div><div class='add'>+		ocelot_port_teardown_dsa_8021q_cpu(ocelot, dp-&gt;index);</div><div class='add'>+</div><div class='add'>+	dsa_tag_8021q_unregister(ds);</div><div class='add'>+</div><div class='add'>+	ds-&gt;untag_vlan_aware_bridge_pvid = false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned long felix_tag_8021q_get_host_fwd_mask(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	return dsa_cpu_ports(ds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_tag_8021q_change_conduit(struct dsa_switch *ds, int port,</div><div class='add'>+					  struct net_device *conduit,</div><div class='add'>+					  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	int cpu = felix_cpu_port_for_conduit(ds, conduit);</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	ocelot_port_unassign_dsa_8021q_cpu(ocelot, port);</div><div class='add'>+	ocelot_port_assign_dsa_8021q_cpu(ocelot, port, cpu);</div><div class='add'>+</div><div class='add'>+	return felix_update_trapping_destinations(ds, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct felix_tag_proto_ops felix_tag_8021q_proto_ops = {</div><div class='add'>+	.setup			= felix_tag_8021q_setup,</div><div class='add'>+	.teardown		= felix_tag_8021q_teardown,</div><div class='add'>+	.get_host_fwd_mask	= felix_tag_8021q_get_host_fwd_mask,</div><div class='add'>+	.change_conduit		= felix_tag_8021q_change_conduit,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void felix_set_host_flood(struct dsa_switch *ds, unsigned long mask,</div><div class='add'>+				 bool uc, bool mc, bool bc)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	unsigned long val;</div><div class='add'>+</div><div class='add'>+	val = uc ? mask : 0;</div><div class='add'>+	ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_UC);</div><div class='add'>+</div><div class='add'>+	val = mc ? mask : 0;</div><div class='add'>+	ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_MC);</div><div class='add'>+	ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_MCIPV4);</div><div class='add'>+	ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_MCIPV6);</div><div class='add'>+</div><div class='add'>+	val = bc ? mask : 0;</div><div class='add'>+	ocelot_rmw_rix(ocelot, val, mask, ANA_PGID_PGID, PGID_BC);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+felix_migrate_host_flood(struct dsa_switch *ds,</div><div class='add'>+			 const struct felix_tag_proto_ops *proto_ops,</div><div class='add'>+			 const struct felix_tag_proto_ops *old_proto_ops)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	struct felix *felix = ocelot_to_felix(ocelot);</div><div class='add'>+	unsigned long mask;</div><div class='add'>+</div><div class='add'>+	if (old_proto_ops) {</div><div class='add'>+		mask = old_proto_ops-&gt;get_host_fwd_mask(ds);</div><div class='add'>+		felix_set_host_flood(ds, mask, false, false, false);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mask = proto_ops-&gt;get_host_fwd_mask(ds);</div><div class='add'>+	felix_set_host_flood(ds, mask, !!felix-&gt;host_flood_uc_mask,</div><div class='add'>+			     !!felix-&gt;host_flood_mc_mask, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_migrate_mdbs(struct dsa_switch *ds,</div><div class='add'>+			      const struct felix_tag_proto_ops *proto_ops,</div><div class='add'>+			      const struct felix_tag_proto_ops *old_proto_ops)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	unsigned long from, to;</div><div class='add'>+</div><div class='add'>+	if (!old_proto_ops)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	from = old_proto_ops-&gt;get_host_fwd_mask(ds);</div><div class='add'>+	to = proto_ops-&gt;get_host_fwd_mask(ds);</div><div class='add'>+</div><div class='add'>+	return ocelot_migrate_mdbs(ocelot, from, to);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Configure the shared hardware resources for a transition between</div><div class='add'>+ * @old_proto_ops and @proto_ops.</div><div class='add'>+ * Manual migration is needed because as far as DSA is concerned, no change of</div><div class='add'>+ * the CPU port is taking place here, just of the tagging protocol.</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+felix_tag_proto_setup_shared(struct dsa_switch *ds,</div><div class='add'>+			     const struct felix_tag_proto_ops *proto_ops,</div><div class='add'>+			     const struct felix_tag_proto_ops *old_proto_ops)</div><div class='add'>+{</div><div class='add'>+	bool using_tag_8021q = (proto_ops == &amp;felix_tag_8021q_proto_ops);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = felix_migrate_mdbs(ds, proto_ops, old_proto_ops);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	felix_update_trapping_destinations(ds, using_tag_8021q);</div><div class='add'>+</div><div class='add'>+	felix_migrate_host_flood(ds, proto_ops, old_proto_ops);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This always leaves the switch in a consistent state, because although the</div><div class='add'>+ * tag_8021q setup can fail, the NPI setup can't. So either the change is made,</div><div class='add'>+ * or the restoration is guaranteed to work.</div><div class='add'>+ */</div><div class='add'>+static int felix_change_tag_protocol(struct dsa_switch *ds,</div><div class='add'>+				     enum dsa_tag_protocol proto)</div><div class='add'>+{</div><div class='add'>+	const struct felix_tag_proto_ops *old_proto_ops, *proto_ops;</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	struct felix *felix = ocelot_to_felix(ocelot);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	switch (proto) {</div><div class='add'>+	case DSA_TAG_PROTO_SEVILLE:</div><div class='add'>+	case DSA_TAG_PROTO_OCELOT:</div><div class='add'>+		proto_ops = &amp;felix_tag_npi_proto_ops;</div><div class='add'>+		break;</div><div class='add'>+	case DSA_TAG_PROTO_OCELOT_8021Q:</div><div class='add'>+		proto_ops = &amp;felix_tag_8021q_proto_ops;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EPROTONOSUPPORT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	old_proto_ops = felix-&gt;tag_proto_ops;</div><div class='add'>+</div><div class='add'>+	if (proto_ops == old_proto_ops)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	err = proto_ops-&gt;setup(ds);</div><div class='add'>+	if (err)</div><div class='add'>+		goto setup_failed;</div><div class='add'>+</div><div class='add'>+	err = felix_tag_proto_setup_shared(ds, proto_ops, old_proto_ops);</div><div class='add'>+	if (err)</div><div class='add'>+		goto setup_shared_failed;</div><div class='add'>+</div><div class='add'>+	if (old_proto_ops)</div><div class='add'>+		old_proto_ops-&gt;teardown(ds);</div><div class='add'>+</div><div class='add'>+	felix-&gt;tag_proto_ops = proto_ops;</div><div class='add'>+	felix-&gt;tag_proto = proto;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+setup_shared_failed:</div><div class='add'>+	proto_ops-&gt;teardown(ds);</div><div class='add'>+setup_failed:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum dsa_tag_protocol felix_get_tag_protocol(struct dsa_switch *ds,</div><div class='add'>+						    int port,</div><div class='add'>+						    enum dsa_tag_protocol mp)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	struct felix *felix = ocelot_to_felix(ocelot);</div><div class='add'>+</div><div class='add'>+	return felix-&gt;tag_proto;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void felix_port_set_host_flood(struct dsa_switch *ds, int port,</div><div class='add'>+				      bool uc, bool mc)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	struct felix *felix = ocelot_to_felix(ocelot);</div><div class='add'>+	unsigned long mask;</div><div class='add'>+</div><div class='add'>+	if (uc)</div><div class='add'>+		felix-&gt;host_flood_uc_mask |= BIT(port);</div><div class='add'>+	else</div><div class='add'>+		felix-&gt;host_flood_uc_mask &amp;= ~BIT(port);</div><div class='add'>+</div><div class='add'>+	if (mc)</div><div class='add'>+		felix-&gt;host_flood_mc_mask |= BIT(port);</div><div class='add'>+	else</div><div class='add'>+		felix-&gt;host_flood_mc_mask &amp;= ~BIT(port);</div><div class='add'>+</div><div class='add'>+	mask = felix-&gt;tag_proto_ops-&gt;get_host_fwd_mask(ds);</div><div class='add'>+	felix_set_host_flood(ds, mask, !!felix-&gt;host_flood_uc_mask,</div><div class='add'>+			     !!felix-&gt;host_flood_mc_mask, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_port_change_conduit(struct dsa_switch *ds, int port,</div><div class='add'>+				     struct net_device *conduit,</div><div class='add'>+				     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	struct felix *felix = ocelot_to_felix(ocelot);</div><div class='add'>+</div><div class='add'>+	return felix-&gt;tag_proto_ops-&gt;change_conduit(ds, port, conduit, extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_set_ageing_time(struct dsa_switch *ds,</div><div class='add'>+				 unsigned int ageing_time)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	ocelot_set_ageing_time(ocelot, ageing_time);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void felix_port_fast_age(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ocelot_mact_flush(ocelot, port);</div><div class='add'>+	if (err)</div><div class='add'>+		dev_err(ds-&gt;dev, "Flushing MAC table on port %d returned %pe\n",</div><div class='add'>+			port, ERR_PTR(err));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_fdb_dump(struct dsa_switch *ds, int port,</div><div class='add'>+			  dsa_fdb_dump_cb_t *cb, void *data)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return ocelot_fdb_dump(ocelot, port, cb, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_fdb_add(struct dsa_switch *ds, int port,</div><div class='add'>+			 const unsigned char *addr, u16 vid,</div><div class='add'>+			 struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct net_device *bridge_dev = felix_classify_db(db);</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(ds, port);</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(bridge_dev))</div><div class='add'>+		return PTR_ERR(bridge_dev);</div><div class='add'>+</div><div class='add'>+	if (dsa_port_is_cpu(dp) &amp;&amp; !bridge_dev &amp;&amp;</div><div class='add'>+	    dsa_fdb_present_in_other_db(ds, port, addr, vid, db))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (dsa_port_is_cpu(dp))</div><div class='add'>+		port = PGID_CPU;</div><div class='add'>+</div><div class='add'>+	return ocelot_fdb_add(ocelot, port, addr, vid, bridge_dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_fdb_del(struct dsa_switch *ds, int port,</div><div class='add'>+			 const unsigned char *addr, u16 vid,</div><div class='add'>+			 struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct net_device *bridge_dev = felix_classify_db(db);</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(ds, port);</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(bridge_dev))</div><div class='add'>+		return PTR_ERR(bridge_dev);</div><div class='add'>+</div><div class='add'>+	if (dsa_port_is_cpu(dp) &amp;&amp; !bridge_dev &amp;&amp;</div><div class='add'>+	    dsa_fdb_present_in_other_db(ds, port, addr, vid, db))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (dsa_port_is_cpu(dp))</div><div class='add'>+		port = PGID_CPU;</div><div class='add'>+</div><div class='add'>+	return ocelot_fdb_del(ocelot, port, addr, vid, bridge_dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_lag_fdb_add(struct dsa_switch *ds, struct dsa_lag lag,</div><div class='add'>+			     const unsigned char *addr, u16 vid,</div><div class='add'>+			     struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct net_device *bridge_dev = felix_classify_db(db);</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(bridge_dev))</div><div class='add'>+		return PTR_ERR(bridge_dev);</div><div class='add'>+</div><div class='add'>+	return ocelot_lag_fdb_add(ocelot, lag.dev, addr, vid, bridge_dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_lag_fdb_del(struct dsa_switch *ds, struct dsa_lag lag,</div><div class='add'>+			     const unsigned char *addr, u16 vid,</div><div class='add'>+			     struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct net_device *bridge_dev = felix_classify_db(db);</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(bridge_dev))</div><div class='add'>+		return PTR_ERR(bridge_dev);</div><div class='add'>+</div><div class='add'>+	return ocelot_lag_fdb_del(ocelot, lag.dev, addr, vid, bridge_dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_mdb_add(struct dsa_switch *ds, int port,</div><div class='add'>+			 const struct switchdev_obj_port_mdb *mdb,</div><div class='add'>+			 struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct net_device *bridge_dev = felix_classify_db(db);</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(bridge_dev))</div><div class='add'>+		return PTR_ERR(bridge_dev);</div><div class='add'>+</div><div class='add'>+	if (dsa_is_cpu_port(ds, port) &amp;&amp; !bridge_dev &amp;&amp;</div><div class='add'>+	    dsa_mdb_present_in_other_db(ds, port, mdb, db))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (port == ocelot-&gt;npi)</div><div class='add'>+		port = ocelot-&gt;num_phys_ports;</div><div class='add'>+</div><div class='add'>+	return ocelot_port_mdb_add(ocelot, port, mdb, bridge_dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_mdb_del(struct dsa_switch *ds, int port,</div><div class='add'>+			 const struct switchdev_obj_port_mdb *mdb,</div><div class='add'>+			 struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct net_device *bridge_dev = felix_classify_db(db);</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(bridge_dev))</div><div class='add'>+		return PTR_ERR(bridge_dev);</div><div class='add'>+</div><div class='add'>+	if (dsa_is_cpu_port(ds, port) &amp;&amp; !bridge_dev &amp;&amp;</div><div class='add'>+	    dsa_mdb_present_in_other_db(ds, port, mdb, db))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (port == ocelot-&gt;npi)</div><div class='add'>+		port = ocelot-&gt;num_phys_ports;</div><div class='add'>+</div><div class='add'>+	return ocelot_port_mdb_del(ocelot, port, mdb, bridge_dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void felix_bridge_stp_state_set(struct dsa_switch *ds, int port,</div><div class='add'>+				       u8 state)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return ocelot_bridge_stp_state_set(ocelot, port, state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_pre_bridge_flags(struct dsa_switch *ds, int port,</div><div class='add'>+				  struct switchdev_brport_flags val,</div><div class='add'>+				  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return ocelot_port_pre_bridge_flags(ocelot, port, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_bridge_flags(struct dsa_switch *ds, int port,</div><div class='add'>+			      struct switchdev_brport_flags val,</div><div class='add'>+			      struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (port == ocelot-&gt;npi)</div><div class='add'>+		port = ocelot-&gt;num_phys_ports;</div><div class='add'>+</div><div class='add'>+	ocelot_port_bridge_flags(ocelot, port, val);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_bridge_join(struct dsa_switch *ds, int port,</div><div class='add'>+			     struct dsa_bridge bridge, bool *tx_fwd_offload,</div><div class='add'>+			     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return ocelot_port_bridge_join(ocelot, port, bridge.dev, bridge.num,</div><div class='add'>+				       extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void felix_bridge_leave(struct dsa_switch *ds, int port,</div><div class='add'>+			       struct dsa_bridge bridge)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	ocelot_port_bridge_leave(ocelot, port, bridge.dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_lag_join(struct dsa_switch *ds, int port,</div><div class='add'>+			  struct dsa_lag lag,</div><div class='add'>+			  struct netdev_lag_upper_info *info,</div><div class='add'>+			  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ocelot_port_lag_join(ocelot, port, lag.dev, info, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Update the logical LAG port that serves as tag_8021q CPU port */</div><div class='add'>+	if (!dsa_is_cpu_port(ds, port))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return felix_port_change_conduit(ds, port, lag.dev, extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_lag_leave(struct dsa_switch *ds, int port,</div><div class='add'>+			   struct dsa_lag lag)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	ocelot_port_lag_leave(ocelot, port, lag.dev);</div><div class='add'>+</div><div class='add'>+	/* Update the logical LAG port that serves as tag_8021q CPU port */</div><div class='add'>+	if (!dsa_is_cpu_port(ds, port))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return felix_port_change_conduit(ds, port, lag.dev, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_lag_change(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(ds, port);</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	ocelot_port_lag_change(ocelot, port, dp-&gt;lag_tx_enabled);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_vlan_prepare(struct dsa_switch *ds, int port,</div><div class='add'>+			      const struct switchdev_obj_port_vlan *vlan,</div><div class='add'>+			      struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	u16 flags = vlan-&gt;flags;</div><div class='add'>+</div><div class='add'>+	/* Ocelot switches copy frames as-is to the CPU, so the flags:</div><div class='add'>+	 * egress-untagged or not, pvid or not, make no difference. This</div><div class='add'>+	 * behavior is already better than what DSA just tries to approximate</div><div class='add'>+	 * when it installs the VLAN with the same flags on the CPU port.</div><div class='add'>+	 * Just accept any configuration, and don't let ocelot deny installing</div><div class='add'>+	 * multiple native VLANs on the NPI port, because the switch doesn't</div><div class='add'>+	 * look at the port tag settings towards the NPI interface anyway.</div><div class='add'>+	 */</div><div class='add'>+	if (port == ocelot-&gt;npi)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return ocelot_vlan_prepare(ocelot, port, vlan-&gt;vid,</div><div class='add'>+				   flags &amp; BRIDGE_VLAN_INFO_PVID,</div><div class='add'>+				   flags &amp; BRIDGE_VLAN_INFO_UNTAGGED,</div><div class='add'>+				   extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_vlan_filtering(struct dsa_switch *ds, int port, bool enabled,</div><div class='add'>+				struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	bool using_tag_8021q;</div><div class='add'>+	struct felix *felix;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ocelot_port_vlan_filtering(ocelot, port, enabled, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	felix = ocelot_to_felix(ocelot);</div><div class='add'>+	using_tag_8021q = felix-&gt;tag_proto == DSA_TAG_PROTO_OCELOT_8021Q;</div><div class='add'>+	if (using_tag_8021q) {</div><div class='add'>+		err = felix_update_tag_8021q_rx_rules(ds, port, enabled);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_vlan_add(struct dsa_switch *ds, int port,</div><div class='add'>+			  const struct switchdev_obj_port_vlan *vlan,</div><div class='add'>+			  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	u16 flags = vlan-&gt;flags;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = felix_vlan_prepare(ds, port, vlan, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return ocelot_vlan_add(ocelot, port, vlan-&gt;vid,</div><div class='add'>+			       flags &amp; BRIDGE_VLAN_INFO_PVID,</div><div class='add'>+			       flags &amp; BRIDGE_VLAN_INFO_UNTAGGED);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_vlan_del(struct dsa_switch *ds, int port,</div><div class='add'>+			  const struct switchdev_obj_port_vlan *vlan)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return ocelot_vlan_del(ocelot, port, vlan-&gt;vid);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void felix_phylink_get_caps(struct dsa_switch *ds, int port,</div><div class='add'>+				   struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	config-&gt;mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |</div><div class='add'>+				   MAC_10 | MAC_100 | MAC_1000FD |</div><div class='add'>+				   MAC_2500FD;</div><div class='add'>+</div><div class='add'>+	__set_bit(ocelot-&gt;ports[port]-&gt;phy_mode,</div><div class='add'>+		  config-&gt;supported_interfaces);</div><div class='add'>+	if (ocelot-&gt;ports[port]-&gt;phy_mode == PHY_INTERFACE_MODE_USXGMII)</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_10G_QXGMII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void felix_phylink_mac_config(struct phylink_config *config,</div><div class='add'>+				     unsigned int mode,</div><div class='add'>+				     const struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct ocelot *ocelot = dp-&gt;ds-&gt;priv;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+	struct felix *felix;</div><div class='add'>+</div><div class='add'>+	felix = ocelot_to_felix(ocelot);</div><div class='add'>+</div><div class='add'>+	if (felix-&gt;info-&gt;phylink_mac_config)</div><div class='add'>+		felix-&gt;info-&gt;phylink_mac_config(ocelot, port, mode, state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct phylink_pcs *</div><div class='add'>+felix_phylink_mac_select_pcs(struct phylink_config *config,</div><div class='add'>+			     phy_interface_t iface)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct ocelot *ocelot = dp-&gt;ds-&gt;priv;</div><div class='add'>+	struct phylink_pcs *pcs = NULL;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+	struct felix *felix;</div><div class='add'>+</div><div class='add'>+	felix = ocelot_to_felix(ocelot);</div><div class='add'>+</div><div class='add'>+	if (felix-&gt;pcs &amp;&amp; felix-&gt;pcs[port])</div><div class='add'>+		pcs = felix-&gt;pcs[port];</div><div class='add'>+</div><div class='add'>+	return pcs;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void felix_phylink_mac_link_down(struct phylink_config *config,</div><div class='add'>+					unsigned int link_an_mode,</div><div class='add'>+					phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct ocelot *ocelot = dp-&gt;ds-&gt;priv;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+	struct felix *felix;</div><div class='add'>+</div><div class='add'>+	felix = ocelot_to_felix(ocelot);</div><div class='add'>+</div><div class='add'>+	ocelot_phylink_mac_link_down(ocelot, port, link_an_mode, interface,</div><div class='add'>+				     felix-&gt;info-&gt;quirks);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void felix_phylink_mac_link_up(struct phylink_config *config,</div><div class='add'>+				      struct phy_device *phydev,</div><div class='add'>+				      unsigned int link_an_mode,</div><div class='add'>+				      phy_interface_t interface,</div><div class='add'>+				      int speed, int duplex,</div><div class='add'>+				      bool tx_pause, bool rx_pause)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct ocelot *ocelot = dp-&gt;ds-&gt;priv;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+	struct felix *felix;</div><div class='add'>+</div><div class='add'>+	felix = ocelot_to_felix(ocelot);</div><div class='add'>+</div><div class='add'>+	ocelot_phylink_mac_link_up(ocelot, port, phydev, link_an_mode,</div><div class='add'>+				   interface, speed, duplex, tx_pause, rx_pause,</div><div class='add'>+				   felix-&gt;info-&gt;quirks);</div><div class='add'>+</div><div class='add'>+	if (felix-&gt;info-&gt;port_sched_speed_set)</div><div class='add'>+		felix-&gt;info-&gt;port_sched_speed_set(ocelot, port, speed);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_port_enable(struct dsa_switch *ds, int port,</div><div class='add'>+			     struct phy_device *phydev)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(ds, port);</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	struct felix *felix = ocelot_to_felix(ocelot);</div><div class='add'>+</div><div class='add'>+	if (!dsa_port_is_user(dp))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (ocelot-&gt;npi &gt;= 0) {</div><div class='add'>+		struct net_device *conduit = dsa_port_to_conduit(dp);</div><div class='add'>+</div><div class='add'>+		if (felix_cpu_port_for_conduit(ds, conduit) != ocelot-&gt;npi) {</div><div class='add'>+			dev_err(ds-&gt;dev, "Multiple conduits are not allowed\n");</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!dp-&gt;hsr_dev || felix-&gt;tag_proto == DSA_TAG_PROTO_OCELOT_8021Q)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return dsa_port_simple_hsr_join(ds, port, dp-&gt;hsr_dev, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void felix_port_disable(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(ds, port);</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	struct felix *felix = ocelot_to_felix(ocelot);</div><div class='add'>+</div><div class='add'>+	if (!dsa_port_is_user(dp))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!dp-&gt;hsr_dev || felix-&gt;tag_proto == DSA_TAG_PROTO_OCELOT_8021Q)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dsa_port_simple_hsr_leave(ds, port, dp-&gt;hsr_dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void felix_port_qos_map_init(struct ocelot *ocelot, int port)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	ocelot_rmw_gix(ocelot,</div><div class='add'>+		       ANA_PORT_QOS_CFG_QOS_PCP_ENA,</div><div class='add'>+		       ANA_PORT_QOS_CFG_QOS_PCP_ENA,</div><div class='add'>+		       ANA_PORT_QOS_CFG,</div><div class='add'>+		       port);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; OCELOT_NUM_TC * 2; i++) {</div><div class='add'>+		ocelot_rmw_ix(ocelot,</div><div class='add'>+			      (ANA_PORT_PCP_DEI_MAP_DP_PCP_DEI_VAL &amp; i) |</div><div class='add'>+			      ANA_PORT_PCP_DEI_MAP_QOS_PCP_DEI_VAL(i),</div><div class='add'>+			      ANA_PORT_PCP_DEI_MAP_DP_PCP_DEI_VAL |</div><div class='add'>+			      ANA_PORT_PCP_DEI_MAP_QOS_PCP_DEI_VAL_M,</div><div class='add'>+			      ANA_PORT_PCP_DEI_MAP,</div><div class='add'>+			      port, i);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void felix_get_stats64(struct dsa_switch *ds, int port,</div><div class='add'>+			      struct rtnl_link_stats64 *stats)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	ocelot_port_get_stats64(ocelot, port, stats);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void felix_get_pause_stats(struct dsa_switch *ds, int port,</div><div class='add'>+				  struct ethtool_pause_stats *pause_stats)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	ocelot_port_get_pause_stats(ocelot, port, pause_stats);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void felix_get_rmon_stats(struct dsa_switch *ds, int port,</div><div class='add'>+				 struct ethtool_rmon_stats *rmon_stats,</div><div class='add'>+				 const struct ethtool_rmon_hist_range **ranges)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	ocelot_port_get_rmon_stats(ocelot, port, rmon_stats, ranges);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void felix_get_eth_ctrl_stats(struct dsa_switch *ds, int port,</div><div class='add'>+				     struct ethtool_eth_ctrl_stats *ctrl_stats)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	ocelot_port_get_eth_ctrl_stats(ocelot, port, ctrl_stats);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void felix_get_eth_mac_stats(struct dsa_switch *ds, int port,</div><div class='add'>+				    struct ethtool_eth_mac_stats *mac_stats)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	ocelot_port_get_eth_mac_stats(ocelot, port, mac_stats);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void felix_get_eth_phy_stats(struct dsa_switch *ds, int port,</div><div class='add'>+				    struct ethtool_eth_phy_stats *phy_stats)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	ocelot_port_get_eth_phy_stats(ocelot, port, phy_stats);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void felix_get_ts_stats(struct dsa_switch *ds, int port,</div><div class='add'>+			       struct ethtool_ts_stats *ts_stats)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	ocelot_port_get_ts_stats(ocelot, port, ts_stats);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void felix_get_strings(struct dsa_switch *ds, int port,</div><div class='add'>+			      u32 stringset, u8 *data)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return ocelot_get_strings(ocelot, port, stringset, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void felix_get_ethtool_stats(struct dsa_switch *ds, int port, u64 *data)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	ocelot_get_ethtool_stats(ocelot, port, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_get_sset_count(struct dsa_switch *ds, int port, int sset)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return ocelot_get_sset_count(ocelot, port, sset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_get_ts_info(struct dsa_switch *ds, int port,</div><div class='add'>+			     struct kernel_ethtool_ts_info *info)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return ocelot_get_ts_info(ocelot, port, info);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const u32 felix_phy_match_table[PHY_INTERFACE_MODE_MAX] = {</div><div class='add'>+	[PHY_INTERFACE_MODE_INTERNAL] = OCELOT_PORT_MODE_INTERNAL,</div><div class='add'>+	[PHY_INTERFACE_MODE_SGMII] = OCELOT_PORT_MODE_SGMII,</div><div class='add'>+	[PHY_INTERFACE_MODE_QSGMII] = OCELOT_PORT_MODE_QSGMII,</div><div class='add'>+	[PHY_INTERFACE_MODE_USXGMII] = OCELOT_PORT_MODE_USXGMII,</div><div class='add'>+	[PHY_INTERFACE_MODE_10G_QXGMII] = OCELOT_PORT_MODE_10G_QXGMII,</div><div class='add'>+	[PHY_INTERFACE_MODE_1000BASEX] = OCELOT_PORT_MODE_1000BASEX,</div><div class='add'>+	[PHY_INTERFACE_MODE_2500BASEX] = OCELOT_PORT_MODE_2500BASEX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int felix_validate_phy_mode(struct felix *felix, int port,</div><div class='add'>+				   phy_interface_t phy_mode)</div><div class='add'>+{</div><div class='add'>+	u32 modes = felix-&gt;info-&gt;port_modes[port];</div><div class='add'>+</div><div class='add'>+	if (felix_phy_match_table[phy_mode] &amp; modes)</div><div class='add'>+		return 0;</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_parse_ports_node(struct felix *felix,</div><div class='add'>+				  struct device_node *ports_node,</div><div class='add'>+				  phy_interface_t *port_phy_modes)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = felix-&gt;ocelot.dev;</div><div class='add'>+</div><div class='add'>+	for_each_available_child_of_node_scoped(ports_node, child) {</div><div class='add'>+		phy_interface_t phy_mode;</div><div class='add'>+		u32 port;</div><div class='add'>+		int err;</div><div class='add'>+</div><div class='add'>+		/* Get switch port number from DT */</div><div class='add'>+		if (of_property_read_u32(child, "reg", &amp;port) &lt; 0) {</div><div class='add'>+			dev_err(dev, "Port number not defined in device tree "</div><div class='add'>+				"(property \"reg\")\n");</div><div class='add'>+			return -ENODEV;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Get PHY mode from DT */</div><div class='add'>+		err = of_get_phy_mode(child, &amp;phy_mode);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(dev, "Failed to read phy-mode or "</div><div class='add'>+				"phy-interface-type property for port %d\n",</div><div class='add'>+				port);</div><div class='add'>+			return -ENODEV;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = felix_validate_phy_mode(felix, port, phy_mode);</div><div class='add'>+		if (err &lt; 0) {</div><div class='add'>+			dev_info(dev, "Unsupported PHY mode %s on port %d\n",</div><div class='add'>+				 phy_modes(phy_mode), port);</div><div class='add'>+</div><div class='add'>+			/* Leave port_phy_modes[port] = 0, which is also</div><div class='add'>+			 * PHY_INTERFACE_MODE_NA. This will perform a</div><div class='add'>+			 * best-effort to bring up as many ports as possible.</div><div class='add'>+			 */</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		port_phy_modes[port] = phy_mode;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_parse_dt(struct felix *felix, phy_interface_t *port_phy_modes)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = felix-&gt;ocelot.dev;</div><div class='add'>+	struct device_node *switch_node;</div><div class='add'>+	struct device_node *ports_node;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	switch_node = dev-&gt;of_node;</div><div class='add'>+</div><div class='add'>+	ports_node = of_get_child_by_name(switch_node, "ports");</div><div class='add'>+	if (!ports_node)</div><div class='add'>+		ports_node = of_get_child_by_name(switch_node, "ethernet-ports");</div><div class='add'>+	if (!ports_node) {</div><div class='add'>+		dev_err(dev, "Incorrect bindings: absent \"ports\" or \"ethernet-ports\" node\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = felix_parse_ports_node(felix, ports_node, port_phy_modes);</div><div class='add'>+	of_node_put(ports_node);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct regmap *felix_request_regmap_by_name(struct felix *felix,</div><div class='add'>+						   const char *resource_name)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = &amp;felix-&gt;ocelot;</div><div class='add'>+	struct resource res;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* In an MFD configuration, regmaps are registered directly to the</div><div class='add'>+	 * parent device before the child devices are probed, so there is no</div><div class='add'>+	 * need to initialize a new one.</div><div class='add'>+	 */</div><div class='add'>+	if (!felix-&gt;info-&gt;resources)</div><div class='add'>+		return dev_get_regmap(ocelot-&gt;dev-&gt;parent, resource_name);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; felix-&gt;info-&gt;num_resources; i++) {</div><div class='add'>+		if (strcmp(resource_name, felix-&gt;info-&gt;resources[i].name))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		memcpy(&amp;res, &amp;felix-&gt;info-&gt;resources[i], sizeof(res));</div><div class='add'>+		res.start += felix-&gt;switch_base;</div><div class='add'>+		res.end += felix-&gt;switch_base;</div><div class='add'>+</div><div class='add'>+		return ocelot_regmap_init(ocelot, &amp;res);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ERR_PTR(-ENOENT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct regmap *felix_request_regmap(struct felix *felix,</div><div class='add'>+					   enum ocelot_target target)</div><div class='add'>+{</div><div class='add'>+	const char *resource_name = felix-&gt;info-&gt;resource_names[target];</div><div class='add'>+</div><div class='add'>+	/* If the driver didn't provide a resource name for the target,</div><div class='add'>+	 * the resource is optional.</div><div class='add'>+	 */</div><div class='add'>+	if (!resource_name)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	return felix_request_regmap_by_name(felix, resource_name);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct regmap *felix_request_port_regmap(struct felix *felix, int port)</div><div class='add'>+{</div><div class='add'>+	char resource_name[32];</div><div class='add'>+</div><div class='add'>+	sprintf(resource_name, "port%d", port);</div><div class='add'>+</div><div class='add'>+	return felix_request_regmap_by_name(felix, resource_name);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_init_structs(struct felix *felix, int num_phys_ports)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = &amp;felix-&gt;ocelot;</div><div class='add'>+	phy_interface_t *port_phy_modes;</div><div class='add'>+	struct regmap *target;</div><div class='add'>+	int port, i, err;</div><div class='add'>+</div><div class='add'>+	ocelot-&gt;num_phys_ports = num_phys_ports;</div><div class='add'>+	ocelot-&gt;ports = devm_kcalloc(ocelot-&gt;dev, num_phys_ports,</div><div class='add'>+				     sizeof(struct ocelot_port *), GFP_KERNEL);</div><div class='add'>+	if (!ocelot-&gt;ports)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ocelot-&gt;map		= felix-&gt;info-&gt;map;</div><div class='add'>+	ocelot-&gt;num_mact_rows	= felix-&gt;info-&gt;num_mact_rows;</div><div class='add'>+	ocelot-&gt;vcap		= felix-&gt;info-&gt;vcap;</div><div class='add'>+	ocelot-&gt;vcap_pol.base	= felix-&gt;info-&gt;vcap_pol_base;</div><div class='add'>+	ocelot-&gt;vcap_pol.max	= felix-&gt;info-&gt;vcap_pol_max;</div><div class='add'>+	ocelot-&gt;vcap_pol.base2	= felix-&gt;info-&gt;vcap_pol_base2;</div><div class='add'>+	ocelot-&gt;vcap_pol.max2	= felix-&gt;info-&gt;vcap_pol_max2;</div><div class='add'>+	ocelot-&gt;ops		= felix-&gt;info-&gt;ops;</div><div class='add'>+	ocelot-&gt;npi_inj_prefix	= OCELOT_TAG_PREFIX_SHORT;</div><div class='add'>+	ocelot-&gt;npi_xtr_prefix	= OCELOT_TAG_PREFIX_SHORT;</div><div class='add'>+	ocelot-&gt;devlink		= felix-&gt;ds-&gt;devlink;</div><div class='add'>+</div><div class='add'>+	port_phy_modes = kcalloc(num_phys_ports, sizeof(phy_interface_t),</div><div class='add'>+				 GFP_KERNEL);</div><div class='add'>+	if (!port_phy_modes)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	err = felix_parse_dt(felix, port_phy_modes);</div><div class='add'>+	if (err) {</div><div class='add'>+		kfree(port_phy_modes);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; TARGET_MAX; i++) {</div><div class='add'>+		target = felix_request_regmap(felix, i);</div><div class='add'>+		if (IS_ERR(target)) {</div><div class='add'>+			dev_err(ocelot-&gt;dev,</div><div class='add'>+				"Failed to map device memory space: %pe\n",</div><div class='add'>+				target);</div><div class='add'>+			kfree(port_phy_modes);</div><div class='add'>+			return PTR_ERR(target);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ocelot-&gt;targets[i] = target;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = ocelot_regfields_init(ocelot, felix-&gt;info-&gt;regfields);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(ocelot-&gt;dev, "failed to init reg fields map\n");</div><div class='add'>+		kfree(port_phy_modes);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (port = 0; port &lt; num_phys_ports; port++) {</div><div class='add'>+		struct ocelot_port *ocelot_port;</div><div class='add'>+</div><div class='add'>+		ocelot_port = devm_kzalloc(ocelot-&gt;dev,</div><div class='add'>+					   sizeof(struct ocelot_port),</div><div class='add'>+					   GFP_KERNEL);</div><div class='add'>+		if (!ocelot_port) {</div><div class='add'>+			dev_err(ocelot-&gt;dev,</div><div class='add'>+				"failed to allocate port memory\n");</div><div class='add'>+			kfree(port_phy_modes);</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		target = felix_request_port_regmap(felix, port);</div><div class='add'>+		if (IS_ERR(target)) {</div><div class='add'>+			dev_err(ocelot-&gt;dev,</div><div class='add'>+				"Failed to map memory space for port %d: %pe\n",</div><div class='add'>+				port, target);</div><div class='add'>+			kfree(port_phy_modes);</div><div class='add'>+			return PTR_ERR(target);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ocelot_port-&gt;phy_mode = port_phy_modes[port];</div><div class='add'>+		ocelot_port-&gt;ocelot = ocelot;</div><div class='add'>+		ocelot_port-&gt;target = target;</div><div class='add'>+		ocelot_port-&gt;index = port;</div><div class='add'>+		ocelot-&gt;ports[port] = ocelot_port;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kfree(port_phy_modes);</div><div class='add'>+</div><div class='add'>+	if (felix-&gt;info-&gt;mdio_bus_alloc) {</div><div class='add'>+		err = felix-&gt;info-&gt;mdio_bus_alloc(ocelot);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocelot_port_purge_txtstamp_skb(struct ocelot *ocelot, int port,</div><div class='add'>+					   struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct ocelot_port *ocelot_port = ocelot-&gt;ports[port];</div><div class='add'>+	struct sk_buff *clone = OCELOT_SKB_CB(skb)-&gt;clone;</div><div class='add'>+	struct sk_buff *skb_match = NULL, *skb_tmp;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (!clone)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;ocelot_port-&gt;tx_skbs.lock, flags);</div><div class='add'>+</div><div class='add'>+	skb_queue_walk_safe(&amp;ocelot_port-&gt;tx_skbs, skb, skb_tmp) {</div><div class='add'>+		if (skb != clone)</div><div class='add'>+			continue;</div><div class='add'>+		__skb_unlink(skb, &amp;ocelot_port-&gt;tx_skbs);</div><div class='add'>+		skb_match = skb;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;ocelot_port-&gt;tx_skbs.lock, flags);</div><div class='add'>+</div><div class='add'>+	WARN_ONCE(!skb_match,</div><div class='add'>+		  "Could not find skb clone in TX timestamping list\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define work_to_xmit_work(w) \</div><div class='add'>+		container_of((w), struct felix_deferred_xmit_work, work)</div><div class='add'>+</div><div class='add'>+static void felix_port_deferred_xmit(struct kthread_work *work)</div><div class='add'>+{</div><div class='add'>+	struct felix_deferred_xmit_work *xmit_work = work_to_xmit_work(work);</div><div class='add'>+	struct dsa_switch *ds = xmit_work-&gt;dp-&gt;ds;</div><div class='add'>+	struct sk_buff *skb = xmit_work-&gt;skb;</div><div class='add'>+	u32 rew_op = ocelot_ptp_rew_op(skb);</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	int port = xmit_work-&gt;dp-&gt;index;</div><div class='add'>+	int retries = 10;</div><div class='add'>+</div><div class='add'>+	ocelot_lock_inj_grp(ocelot, 0);</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		if (ocelot_can_inject(ocelot, 0))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		cpu_relax();</div><div class='add'>+	} while (--retries);</div><div class='add'>+</div><div class='add'>+	if (!retries) {</div><div class='add'>+		ocelot_unlock_inj_grp(ocelot, 0);</div><div class='add'>+		dev_err(ocelot-&gt;dev, "port %d failed to inject skb\n",</div><div class='add'>+			port);</div><div class='add'>+		ocelot_port_purge_txtstamp_skb(ocelot, port, skb);</div><div class='add'>+		kfree_skb(skb);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ocelot_port_inject_frame(ocelot, port, 0, rew_op, skb);</div><div class='add'>+</div><div class='add'>+	ocelot_unlock_inj_grp(ocelot, 0);</div><div class='add'>+</div><div class='add'>+	consume_skb(skb);</div><div class='add'>+	kfree(xmit_work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_connect_tag_protocol(struct dsa_switch *ds,</div><div class='add'>+				      enum dsa_tag_protocol proto)</div><div class='add'>+{</div><div class='add'>+	struct ocelot_8021q_tagger_data *tagger_data;</div><div class='add'>+</div><div class='add'>+	switch (proto) {</div><div class='add'>+	case DSA_TAG_PROTO_OCELOT_8021Q:</div><div class='add'>+		tagger_data = ocelot_8021q_tagger_data(ds);</div><div class='add'>+		tagger_data-&gt;xmit_work_fn = felix_port_deferred_xmit;</div><div class='add'>+		return 0;</div><div class='add'>+	case DSA_TAG_PROTO_OCELOT:</div><div class='add'>+	case DSA_TAG_PROTO_SEVILLE:</div><div class='add'>+		return 0;</div><div class='add'>+	default:</div><div class='add'>+		return -EPROTONOSUPPORT;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_setup(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	struct felix *felix = ocelot_to_felix(ocelot);</div><div class='add'>+	struct dsa_port *dp;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = felix_init_structs(felix, ds-&gt;num_ports);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (ocelot-&gt;targets[HSIO])</div><div class='add'>+		ocelot_pll5_init(ocelot);</div><div class='add'>+</div><div class='add'>+	err = ocelot_init(ocelot);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_mdiobus_free;</div><div class='add'>+</div><div class='add'>+	if (ocelot-&gt;ptp) {</div><div class='add'>+		err = ocelot_init_timestamp(ocelot, felix-&gt;info-&gt;ptp_caps);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(ocelot-&gt;dev,</div><div class='add'>+				"Timestamp initialization failed\n");</div><div class='add'>+			ocelot-&gt;ptp = 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dsa_switch_for_each_available_port(dp, ds) {</div><div class='add'>+		ocelot_init_port(ocelot, dp-&gt;index);</div><div class='add'>+</div><div class='add'>+		if (felix-&gt;info-&gt;configure_serdes)</div><div class='add'>+			felix-&gt;info-&gt;configure_serdes(ocelot, dp-&gt;index,</div><div class='add'>+						      dp-&gt;dn);</div><div class='add'>+</div><div class='add'>+		/* Set the default QoS Classification based on PCP and DEI</div><div class='add'>+		 * bits of vlan tag.</div><div class='add'>+		 */</div><div class='add'>+		felix_port_qos_map_init(ocelot, dp-&gt;index);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (felix-&gt;info-&gt;request_irq) {</div><div class='add'>+		err = felix-&gt;info-&gt;request_irq(ocelot);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(ocelot-&gt;dev, "Failed to request IRQ: %pe\n",</div><div class='add'>+				ERR_PTR(err));</div><div class='add'>+			goto out_deinit_ports;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = ocelot_devlink_sb_register(ocelot);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_deinit_ports;</div><div class='add'>+</div><div class='add'>+	/* The initial tag protocol is NPI which won't fail during initial</div><div class='add'>+	 * setup, there's no real point in checking for errors.</div><div class='add'>+	 */</div><div class='add'>+	felix_change_tag_protocol(ds, felix-&gt;tag_proto);</div><div class='add'>+</div><div class='add'>+	ds-&gt;mtu_enforcement_ingress = true;</div><div class='add'>+	ds-&gt;assisted_learning_on_cpu_port = true;</div><div class='add'>+	ds-&gt;fdb_isolation = true;</div><div class='add'>+	ds-&gt;max_num_bridges = ds-&gt;num_ports;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_deinit_ports:</div><div class='add'>+	dsa_switch_for_each_available_port(dp, ds)</div><div class='add'>+		ocelot_deinit_port(ocelot, dp-&gt;index);</div><div class='add'>+</div><div class='add'>+	ocelot_deinit_timestamp(ocelot);</div><div class='add'>+	ocelot_deinit(ocelot);</div><div class='add'>+</div><div class='add'>+out_mdiobus_free:</div><div class='add'>+	if (felix-&gt;info-&gt;mdio_bus_free)</div><div class='add'>+		felix-&gt;info-&gt;mdio_bus_free(ocelot);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void felix_teardown(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	struct felix *felix = ocelot_to_felix(ocelot);</div><div class='add'>+	struct dsa_port *dp;</div><div class='add'>+</div><div class='add'>+	rtnl_lock();</div><div class='add'>+	if (felix-&gt;tag_proto_ops)</div><div class='add'>+		felix-&gt;tag_proto_ops-&gt;teardown(ds);</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+</div><div class='add'>+	dsa_switch_for_each_available_port(dp, ds)</div><div class='add'>+		ocelot_deinit_port(ocelot, dp-&gt;index);</div><div class='add'>+</div><div class='add'>+	ocelot_devlink_sb_unregister(ocelot);</div><div class='add'>+	ocelot_deinit_timestamp(ocelot);</div><div class='add'>+	ocelot_deinit(ocelot);</div><div class='add'>+</div><div class='add'>+	if (felix-&gt;info-&gt;mdio_bus_free)</div><div class='add'>+		felix-&gt;info-&gt;mdio_bus_free(ocelot);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_hwtstamp_get(struct dsa_switch *ds, int port,</div><div class='add'>+			      struct kernel_hwtstamp_config *config)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	ocelot_hwstamp_get(ocelot, port, config);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_hwtstamp_set(struct dsa_switch *ds, int port,</div><div class='add'>+			      struct kernel_hwtstamp_config *config,</div><div class='add'>+			      struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	struct felix *felix = ocelot_to_felix(ocelot);</div><div class='add'>+	bool using_tag_8021q;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ocelot_hwstamp_set(ocelot, port, config, extack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	using_tag_8021q = felix-&gt;tag_proto == DSA_TAG_PROTO_OCELOT_8021Q;</div><div class='add'>+</div><div class='add'>+	return felix_update_trapping_destinations(ds, using_tag_8021q);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool felix_check_xtr_pkt(struct ocelot *ocelot)</div><div class='add'>+{</div><div class='add'>+	struct felix *felix = ocelot_to_felix(ocelot);</div><div class='add'>+	int err = 0, grp = 0;</div><div class='add'>+</div><div class='add'>+	if (felix-&gt;tag_proto != DSA_TAG_PROTO_OCELOT_8021Q)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (!felix-&gt;info-&gt;quirk_no_xtr_irq)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	ocelot_lock_xtr_grp(ocelot, grp);</div><div class='add'>+</div><div class='add'>+	while (ocelot_read(ocelot, QS_XTR_DATA_PRESENT) &amp; BIT(grp)) {</div><div class='add'>+		struct sk_buff *skb;</div><div class='add'>+		unsigned int type;</div><div class='add'>+</div><div class='add'>+		err = ocelot_xtr_poll_frame(ocelot, grp, &amp;skb);</div><div class='add'>+		if (err)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		/* We trap to the CPU port module all PTP frames, but</div><div class='add'>+		 * felix_rxtstamp() only gets called for event frames.</div><div class='add'>+		 * So we need to avoid sending duplicate general</div><div class='add'>+		 * message frames by running a second BPF classifier</div><div class='add'>+		 * here and dropping those.</div><div class='add'>+		 */</div><div class='add'>+		__skb_push(skb, ETH_HLEN);</div><div class='add'>+</div><div class='add'>+		type = ptp_classify_raw(skb);</div><div class='add'>+</div><div class='add'>+		__skb_pull(skb, ETH_HLEN);</div><div class='add'>+</div><div class='add'>+		if (type == PTP_CLASS_NONE) {</div><div class='add'>+			kfree_skb(skb);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		netif_rx(skb);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	if (err &lt; 0) {</div><div class='add'>+		dev_err_ratelimited(ocelot-&gt;dev,</div><div class='add'>+				    "Error during packet extraction: %pe\n",</div><div class='add'>+				    ERR_PTR(err));</div><div class='add'>+		ocelot_drain_cpu_queue(ocelot, 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ocelot_unlock_xtr_grp(ocelot, grp);</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool felix_rxtstamp(struct dsa_switch *ds, int port,</div><div class='add'>+			   struct sk_buff *skb, unsigned int type)</div><div class='add'>+{</div><div class='add'>+	u32 tstamp_lo = OCELOT_SKB_CB(skb)-&gt;tstamp_lo;</div><div class='add'>+	struct skb_shared_hwtstamps *shhwtstamps;</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	struct timespec64 ts;</div><div class='add'>+	u32 tstamp_hi;</div><div class='add'>+	u64 tstamp;</div><div class='add'>+</div><div class='add'>+	switch (type &amp; PTP_CLASS_PMASK) {</div><div class='add'>+	case PTP_CLASS_L2:</div><div class='add'>+		if (!(ocelot-&gt;ports[port]-&gt;trap_proto &amp; OCELOT_PROTO_PTP_L2))</div><div class='add'>+			return false;</div><div class='add'>+		break;</div><div class='add'>+	case PTP_CLASS_IPV4:</div><div class='add'>+	case PTP_CLASS_IPV6:</div><div class='add'>+		if (!(ocelot-&gt;ports[port]-&gt;trap_proto &amp; OCELOT_PROTO_PTP_L4))</div><div class='add'>+			return false;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* If the "no XTR IRQ" workaround is in use, tell DSA to defer this skb</div><div class='add'>+	 * for RX timestamping. Then free it, and poll for its copy through</div><div class='add'>+	 * MMIO in the CPU port module, and inject that into the stack from</div><div class='add'>+	 * ocelot_xtr_poll().</div><div class='add'>+	 */</div><div class='add'>+	if (felix_check_xtr_pkt(ocelot)) {</div><div class='add'>+		kfree_skb(skb);</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ocelot_ptp_gettime64(&amp;ocelot-&gt;ptp_info, &amp;ts);</div><div class='add'>+	tstamp = ktime_set(ts.tv_sec, ts.tv_nsec);</div><div class='add'>+</div><div class='add'>+	tstamp_hi = tstamp &gt;&gt; 32;</div><div class='add'>+	if ((tstamp &amp; 0xffffffff) &lt; tstamp_lo)</div><div class='add'>+		tstamp_hi--;</div><div class='add'>+</div><div class='add'>+	tstamp = ((u64)tstamp_hi &lt;&lt; 32) | tstamp_lo;</div><div class='add'>+</div><div class='add'>+	shhwtstamps = skb_hwtstamps(skb);</div><div class='add'>+	memset(shhwtstamps, 0, sizeof(struct skb_shared_hwtstamps));</div><div class='add'>+	shhwtstamps-&gt;hwtstamp = tstamp;</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void felix_txtstamp(struct dsa_switch *ds, int port,</div><div class='add'>+			   struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	struct sk_buff *clone = NULL;</div><div class='add'>+</div><div class='add'>+	if (!ocelot-&gt;ptp)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (ocelot_port_txtstamp_request(ocelot, port, skb, &amp;clone)) {</div><div class='add'>+		dev_err_ratelimited(ds-&gt;dev,</div><div class='add'>+				    "port %d delivering skb without TX timestamp\n",</div><div class='add'>+				    port);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (clone)</div><div class='add'>+		OCELOT_SKB_CB(skb)-&gt;clone = clone;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_change_mtu(struct dsa_switch *ds, int port, int new_mtu)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	struct ocelot_port *ocelot_port = ocelot-&gt;ports[port];</div><div class='add'>+</div><div class='add'>+	ocelot_port_set_maxlen(ocelot, port, new_mtu);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ocelot-&gt;fwd_domain_lock);</div><div class='add'>+</div><div class='add'>+	if (ocelot_port-&gt;taprio &amp;&amp; ocelot-&gt;ops-&gt;tas_guard_bands_update)</div><div class='add'>+		ocelot-&gt;ops-&gt;tas_guard_bands_update(ocelot, port);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;ocelot-&gt;fwd_domain_lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_get_max_mtu(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return ocelot_get_max_mtu(ocelot, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_cls_flower_add(struct dsa_switch *ds, int port,</div><div class='add'>+				struct flow_cls_offload *cls, bool ingress)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	struct felix *felix = ocelot_to_felix(ocelot);</div><div class='add'>+	bool using_tag_8021q;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = ocelot_cls_flower_replace(ocelot, port, cls, ingress);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	using_tag_8021q = felix-&gt;tag_proto == DSA_TAG_PROTO_OCELOT_8021Q;</div><div class='add'>+</div><div class='add'>+	return felix_update_trapping_destinations(ds, using_tag_8021q);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_cls_flower_del(struct dsa_switch *ds, int port,</div><div class='add'>+				struct flow_cls_offload *cls, bool ingress)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return ocelot_cls_flower_destroy(ocelot, port, cls, ingress);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_cls_flower_stats(struct dsa_switch *ds, int port,</div><div class='add'>+				  struct flow_cls_offload *cls, bool ingress)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return ocelot_cls_flower_stats(ocelot, port, cls, ingress);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_port_policer_add(struct dsa_switch *ds, int port,</div><div class='add'>+				  struct dsa_mall_policer_tc_entry *policer)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	struct ocelot_policer pol = {</div><div class='add'>+		.rate = div_u64(policer-&gt;rate_bytes_per_sec, 1000) * 8,</div><div class='add'>+		.burst = policer-&gt;burst,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return ocelot_port_policer_add(ocelot, port, &amp;pol);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void felix_port_policer_del(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	ocelot_port_policer_del(ocelot, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_port_mirror_add(struct dsa_switch *ds, int port,</div><div class='add'>+				 struct dsa_mall_mirror_tc_entry *mirror,</div><div class='add'>+				 bool ingress, struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return ocelot_port_mirror_add(ocelot, port, mirror-&gt;to_local_port,</div><div class='add'>+				      ingress, extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void felix_port_mirror_del(struct dsa_switch *ds, int port,</div><div class='add'>+				  struct dsa_mall_mirror_tc_entry *mirror)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	ocelot_port_mirror_del(ocelot, port, mirror-&gt;ingress);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_port_setup_tc(struct dsa_switch *ds, int port,</div><div class='add'>+			       enum tc_setup_type type,</div><div class='add'>+			       void *type_data)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	struct felix *felix = ocelot_to_felix(ocelot);</div><div class='add'>+</div><div class='add'>+	if (felix-&gt;info-&gt;port_setup_tc)</div><div class='add'>+		return felix-&gt;info-&gt;port_setup_tc(ds, port, type, type_data);</div><div class='add'>+	else</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_sb_pool_get(struct dsa_switch *ds, unsigned int sb_index,</div><div class='add'>+			     u16 pool_index,</div><div class='add'>+			     struct devlink_sb_pool_info *pool_info)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return ocelot_sb_pool_get(ocelot, sb_index, pool_index, pool_info);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_sb_pool_set(struct dsa_switch *ds, unsigned int sb_index,</div><div class='add'>+			     u16 pool_index, u32 size,</div><div class='add'>+			     enum devlink_sb_threshold_type threshold_type,</div><div class='add'>+			     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return ocelot_sb_pool_set(ocelot, sb_index, pool_index, size,</div><div class='add'>+				  threshold_type, extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_sb_port_pool_get(struct dsa_switch *ds, int port,</div><div class='add'>+				  unsigned int sb_index, u16 pool_index,</div><div class='add'>+				  u32 *p_threshold)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return ocelot_sb_port_pool_get(ocelot, port, sb_index, pool_index,</div><div class='add'>+				       p_threshold);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_sb_port_pool_set(struct dsa_switch *ds, int port,</div><div class='add'>+				  unsigned int sb_index, u16 pool_index,</div><div class='add'>+				  u32 threshold, struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return ocelot_sb_port_pool_set(ocelot, port, sb_index, pool_index,</div><div class='add'>+				       threshold, extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_sb_tc_pool_bind_get(struct dsa_switch *ds, int port,</div><div class='add'>+				     unsigned int sb_index, u16 tc_index,</div><div class='add'>+				     enum devlink_sb_pool_type pool_type,</div><div class='add'>+				     u16 *p_pool_index, u32 *p_threshold)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return ocelot_sb_tc_pool_bind_get(ocelot, port, sb_index, tc_index,</div><div class='add'>+					  pool_type, p_pool_index,</div><div class='add'>+					  p_threshold);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_sb_tc_pool_bind_set(struct dsa_switch *ds, int port,</div><div class='add'>+				     unsigned int sb_index, u16 tc_index,</div><div class='add'>+				     enum devlink_sb_pool_type pool_type,</div><div class='add'>+				     u16 pool_index, u32 threshold,</div><div class='add'>+				     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return ocelot_sb_tc_pool_bind_set(ocelot, port, sb_index, tc_index,</div><div class='add'>+					  pool_type, pool_index, threshold,</div><div class='add'>+					  extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_sb_occ_snapshot(struct dsa_switch *ds,</div><div class='add'>+				 unsigned int sb_index)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return ocelot_sb_occ_snapshot(ocelot, sb_index);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_sb_occ_max_clear(struct dsa_switch *ds,</div><div class='add'>+				  unsigned int sb_index)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return ocelot_sb_occ_max_clear(ocelot, sb_index);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_sb_occ_port_pool_get(struct dsa_switch *ds, int port,</div><div class='add'>+				      unsigned int sb_index, u16 pool_index,</div><div class='add'>+				      u32 *p_cur, u32 *p_max)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return ocelot_sb_occ_port_pool_get(ocelot, port, sb_index, pool_index,</div><div class='add'>+					   p_cur, p_max);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_sb_occ_tc_port_bind_get(struct dsa_switch *ds, int port,</div><div class='add'>+					 unsigned int sb_index, u16 tc_index,</div><div class='add'>+					 enum devlink_sb_pool_type pool_type,</div><div class='add'>+					 u32 *p_cur, u32 *p_max)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return ocelot_sb_occ_tc_port_bind_get(ocelot, port, sb_index, tc_index,</div><div class='add'>+					      pool_type, p_cur, p_max);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_mrp_add(struct dsa_switch *ds, int port,</div><div class='add'>+			 const struct switchdev_obj_mrp *mrp)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return ocelot_mrp_add(ocelot, port, mrp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_mrp_del(struct dsa_switch *ds, int port,</div><div class='add'>+			 const struct switchdev_obj_mrp *mrp)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return ocelot_mrp_add(ocelot, port, mrp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+felix_mrp_add_ring_role(struct dsa_switch *ds, int port,</div><div class='add'>+			const struct switchdev_obj_ring_role_mrp *mrp)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return ocelot_mrp_add_ring_role(ocelot, port, mrp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+felix_mrp_del_ring_role(struct dsa_switch *ds, int port,</div><div class='add'>+			const struct switchdev_obj_ring_role_mrp *mrp)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return ocelot_mrp_del_ring_role(ocelot, port, mrp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_port_get_default_prio(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return ocelot_port_get_default_prio(ocelot, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_port_set_default_prio(struct dsa_switch *ds, int port,</div><div class='add'>+				       u8 prio)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return ocelot_port_set_default_prio(ocelot, port, prio);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_port_get_dscp_prio(struct dsa_switch *ds, int port, u8 dscp)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return ocelot_port_get_dscp_prio(ocelot, port, dscp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_port_add_dscp_prio(struct dsa_switch *ds, int port, u8 dscp,</div><div class='add'>+				    u8 prio)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return ocelot_port_add_dscp_prio(ocelot, port, dscp, prio);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_port_del_dscp_prio(struct dsa_switch *ds, int port, u8 dscp,</div><div class='add'>+				    u8 prio)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return ocelot_port_del_dscp_prio(ocelot, port, dscp, prio);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_get_mm(struct dsa_switch *ds, int port,</div><div class='add'>+			struct ethtool_mm_state *state)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return ocelot_port_get_mm(ocelot, port, state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_set_mm(struct dsa_switch *ds, int port,</div><div class='add'>+			struct ethtool_mm_cfg *cfg,</div><div class='add'>+			struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return ocelot_port_set_mm(ocelot, port, cfg, extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void felix_get_mm_stats(struct dsa_switch *ds, int port,</div><div class='add'>+			       struct ethtool_mm_stats *stats)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	ocelot_port_get_mm_stats(ocelot, port, stats);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Depending on port type, we may be able to support the offload later (with</div><div class='add'>+ * the "ocelot"/"seville" tagging protocols), or never.</div><div class='add'>+ * If we return 0, the dp-&gt;hsr_dev reference is kept for later; if we return</div><div class='add'>+ * -EOPNOTSUPP, it is cleared (which helps to not bother</div><div class='add'>+ * dsa_port_simple_hsr_leave() with an offload that didn't pass validation).</div><div class='add'>+ */</div><div class='add'>+static int felix_port_hsr_join(struct dsa_switch *ds, int port,</div><div class='add'>+			       struct net_device *hsr,</div><div class='add'>+			       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	struct felix *felix = ocelot_to_felix(ocelot);</div><div class='add'>+</div><div class='add'>+	if (felix-&gt;tag_proto == DSA_TAG_PROTO_OCELOT_8021Q) {</div><div class='add'>+		int err;</div><div class='add'>+</div><div class='add'>+		err = dsa_port_simple_hsr_validate(ds, port, hsr, extack);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Offloading not supported with \"ocelot-8021q\"");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!(dsa_to_port(ds, port)-&gt;user-&gt;flags &amp; IFF_UP))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return dsa_port_simple_hsr_join(ds, port, hsr, extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int felix_port_hsr_leave(struct dsa_switch *ds, int port,</div><div class='add'>+				struct net_device *hsr)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	struct felix *felix = ocelot_to_felix(ocelot);</div><div class='add'>+</div><div class='add'>+	if (felix-&gt;tag_proto == DSA_TAG_PROTO_OCELOT_8021Q)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (!(dsa_to_port(ds, port)-&gt;user-&gt;flags &amp; IFF_UP))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return dsa_port_simple_hsr_leave(ds, port, hsr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct phylink_mac_ops felix_phylink_mac_ops = {</div><div class='add'>+	.mac_select_pcs		= felix_phylink_mac_select_pcs,</div><div class='add'>+	.mac_config		= felix_phylink_mac_config,</div><div class='add'>+	.mac_link_down		= felix_phylink_mac_link_down,</div><div class='add'>+	.mac_link_up		= felix_phylink_mac_link_up,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct dsa_switch_ops felix_switch_ops = {</div><div class='add'>+	.get_tag_protocol		= felix_get_tag_protocol,</div><div class='add'>+	.change_tag_protocol		= felix_change_tag_protocol,</div><div class='add'>+	.connect_tag_protocol		= felix_connect_tag_protocol,</div><div class='add'>+	.setup				= felix_setup,</div><div class='add'>+	.teardown			= felix_teardown,</div><div class='add'>+	.set_ageing_time		= felix_set_ageing_time,</div><div class='add'>+	.get_mm				= felix_get_mm,</div><div class='add'>+	.set_mm				= felix_set_mm,</div><div class='add'>+	.get_mm_stats			= felix_get_mm_stats,</div><div class='add'>+	.get_stats64			= felix_get_stats64,</div><div class='add'>+	.get_pause_stats		= felix_get_pause_stats,</div><div class='add'>+	.get_rmon_stats			= felix_get_rmon_stats,</div><div class='add'>+	.get_ts_stats			= felix_get_ts_stats,</div><div class='add'>+	.get_eth_ctrl_stats		= felix_get_eth_ctrl_stats,</div><div class='add'>+	.get_eth_mac_stats		= felix_get_eth_mac_stats,</div><div class='add'>+	.get_eth_phy_stats		= felix_get_eth_phy_stats,</div><div class='add'>+	.get_strings			= felix_get_strings,</div><div class='add'>+	.get_ethtool_stats		= felix_get_ethtool_stats,</div><div class='add'>+	.get_sset_count			= felix_get_sset_count,</div><div class='add'>+	.get_ts_info			= felix_get_ts_info,</div><div class='add'>+	.phylink_get_caps		= felix_phylink_get_caps,</div><div class='add'>+	.port_enable			= felix_port_enable,</div><div class='add'>+	.port_disable			= felix_port_disable,</div><div class='add'>+	.port_fast_age			= felix_port_fast_age,</div><div class='add'>+	.port_fdb_dump			= felix_fdb_dump,</div><div class='add'>+	.port_fdb_add			= felix_fdb_add,</div><div class='add'>+	.port_fdb_del			= felix_fdb_del,</div><div class='add'>+	.lag_fdb_add			= felix_lag_fdb_add,</div><div class='add'>+	.lag_fdb_del			= felix_lag_fdb_del,</div><div class='add'>+	.port_mdb_add			= felix_mdb_add,</div><div class='add'>+	.port_mdb_del			= felix_mdb_del,</div><div class='add'>+	.port_pre_bridge_flags		= felix_pre_bridge_flags,</div><div class='add'>+	.port_bridge_flags		= felix_bridge_flags,</div><div class='add'>+	.port_bridge_join		= felix_bridge_join,</div><div class='add'>+	.port_bridge_leave		= felix_bridge_leave,</div><div class='add'>+	.port_lag_join			= felix_lag_join,</div><div class='add'>+	.port_lag_leave			= felix_lag_leave,</div><div class='add'>+	.port_lag_change		= felix_lag_change,</div><div class='add'>+	.port_stp_state_set		= felix_bridge_stp_state_set,</div><div class='add'>+	.port_vlan_filtering		= felix_vlan_filtering,</div><div class='add'>+	.port_vlan_add			= felix_vlan_add,</div><div class='add'>+	.port_vlan_del			= felix_vlan_del,</div><div class='add'>+	.port_hwtstamp_get		= felix_hwtstamp_get,</div><div class='add'>+	.port_hwtstamp_set		= felix_hwtstamp_set,</div><div class='add'>+	.port_rxtstamp			= felix_rxtstamp,</div><div class='add'>+	.port_txtstamp			= felix_txtstamp,</div><div class='add'>+	.port_change_mtu		= felix_change_mtu,</div><div class='add'>+	.port_max_mtu			= felix_get_max_mtu,</div><div class='add'>+	.port_policer_add		= felix_port_policer_add,</div><div class='add'>+	.port_policer_del		= felix_port_policer_del,</div><div class='add'>+	.port_mirror_add		= felix_port_mirror_add,</div><div class='add'>+	.port_mirror_del		= felix_port_mirror_del,</div><div class='add'>+	.cls_flower_add			= felix_cls_flower_add,</div><div class='add'>+	.cls_flower_del			= felix_cls_flower_del,</div><div class='add'>+	.cls_flower_stats		= felix_cls_flower_stats,</div><div class='add'>+	.port_setup_tc			= felix_port_setup_tc,</div><div class='add'>+	.devlink_sb_pool_get		= felix_sb_pool_get,</div><div class='add'>+	.devlink_sb_pool_set		= felix_sb_pool_set,</div><div class='add'>+	.devlink_sb_port_pool_get	= felix_sb_port_pool_get,</div><div class='add'>+	.devlink_sb_port_pool_set	= felix_sb_port_pool_set,</div><div class='add'>+	.devlink_sb_tc_pool_bind_get	= felix_sb_tc_pool_bind_get,</div><div class='add'>+	.devlink_sb_tc_pool_bind_set	= felix_sb_tc_pool_bind_set,</div><div class='add'>+	.devlink_sb_occ_snapshot	= felix_sb_occ_snapshot,</div><div class='add'>+	.devlink_sb_occ_max_clear	= felix_sb_occ_max_clear,</div><div class='add'>+	.devlink_sb_occ_port_pool_get	= felix_sb_occ_port_pool_get,</div><div class='add'>+	.devlink_sb_occ_tc_port_bind_get= felix_sb_occ_tc_port_bind_get,</div><div class='add'>+	.port_mrp_add			= felix_mrp_add,</div><div class='add'>+	.port_mrp_del			= felix_mrp_del,</div><div class='add'>+	.port_mrp_add_ring_role		= felix_mrp_add_ring_role,</div><div class='add'>+	.port_mrp_del_ring_role		= felix_mrp_del_ring_role,</div><div class='add'>+	.tag_8021q_vlan_add		= felix_tag_8021q_vlan_add,</div><div class='add'>+	.tag_8021q_vlan_del		= felix_tag_8021q_vlan_del,</div><div class='add'>+	.port_get_default_prio		= felix_port_get_default_prio,</div><div class='add'>+	.port_set_default_prio		= felix_port_set_default_prio,</div><div class='add'>+	.port_get_dscp_prio		= felix_port_get_dscp_prio,</div><div class='add'>+	.port_add_dscp_prio		= felix_port_add_dscp_prio,</div><div class='add'>+	.port_del_dscp_prio		= felix_port_del_dscp_prio,</div><div class='add'>+	.port_set_host_flood		= felix_port_set_host_flood,</div><div class='add'>+	.port_change_conduit		= felix_port_change_conduit,</div><div class='add'>+	.port_hsr_join			= felix_port_hsr_join,</div><div class='add'>+	.port_hsr_leave			= felix_port_hsr_leave,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int felix_register_switch(struct device *dev, resource_size_t switch_base,</div><div class='add'>+			  int num_flooding_pgids, bool ptp,</div><div class='add'>+			  bool mm_supported,</div><div class='add'>+			  enum dsa_tag_protocol init_tag_proto,</div><div class='add'>+			  const struct felix_info *info)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds;</div><div class='add'>+	struct ocelot *ocelot;</div><div class='add'>+	struct felix *felix;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	felix = devm_kzalloc(dev, sizeof(*felix), GFP_KERNEL);</div><div class='add'>+	if (!felix)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ds = devm_kzalloc(dev, sizeof(*ds), GFP_KERNEL);</div><div class='add'>+	if (!ds)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	dev_set_drvdata(dev, felix);</div><div class='add'>+</div><div class='add'>+	ocelot = &amp;felix-&gt;ocelot;</div><div class='add'>+	ocelot-&gt;dev = dev;</div><div class='add'>+	ocelot-&gt;num_flooding_pgids = num_flooding_pgids;</div><div class='add'>+	ocelot-&gt;ptp = ptp;</div><div class='add'>+	ocelot-&gt;mm_supported = mm_supported;</div><div class='add'>+</div><div class='add'>+	felix-&gt;info = info;</div><div class='add'>+	felix-&gt;switch_base = switch_base;</div><div class='add'>+	felix-&gt;ds = ds;</div><div class='add'>+	felix-&gt;tag_proto = init_tag_proto;</div><div class='add'>+</div><div class='add'>+	ds-&gt;dev = dev;</div><div class='add'>+	ds-&gt;num_ports = info-&gt;num_ports;</div><div class='add'>+	ds-&gt;num_tx_queues = OCELOT_NUM_TC;</div><div class='add'>+	ds-&gt;ops = &amp;felix_switch_ops;</div><div class='add'>+	ds-&gt;phylink_mac_ops = &amp;felix_phylink_mac_ops;</div><div class='add'>+	ds-&gt;priv = ocelot;</div><div class='add'>+</div><div class='add'>+	err = dsa_register_switch(ds);</div><div class='add'>+	if (err)</div><div class='add'>+		dev_err_probe(dev, err, "Failed to register DSA switch\n");</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(felix_register_switch);</div><div class='add'>+</div><div class='add'>+struct net_device *felix_port_to_netdev(struct ocelot *ocelot, int port)</div><div class='add'>+{</div><div class='add'>+	struct felix *felix = ocelot_to_felix(ocelot);</div><div class='add'>+	struct dsa_switch *ds = felix-&gt;ds;</div><div class='add'>+</div><div class='add'>+	if (!dsa_is_user_port(ds, port))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	return dsa_to_port(ds, port)-&gt;user;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(felix_port_to_netdev);</div><div class='add'>+</div><div class='add'>+int felix_netdev_to_port(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp;</div><div class='add'>+</div><div class='add'>+	dp = dsa_port_from_netdev(dev);</div><div class='add'>+	if (IS_ERR(dp))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return dp-&gt;index;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(felix_netdev_to_port);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("Felix DSA library");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/dsa/ocelot/felix.h b/drivers/net/dsa/ocelot/felix.h<br/>new file mode 100644<br/>index 000000000000..a657b190c5d7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/ocelot/felix.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/ocelot/felix.h</a></div><div class='hunk'>@@ -0,0 +1,109 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright 2019 NXP</div><div class='add'>+ */</div><div class='add'>+#ifndef _MSCC_FELIX_H</div><div class='add'>+#define _MSCC_FELIX_H</div><div class='add'>+</div><div class='add'>+#define ocelot_to_felix(o)		container_of((o), struct felix, ocelot)</div><div class='add'>+#define FELIX_MAC_QUIRKS		OCELOT_QUIRK_PCS_PERFORMS_RATE_ADAPTATION</div><div class='add'>+</div><div class='add'>+#define OCELOT_PORT_MODE_NONE		0</div><div class='add'>+#define OCELOT_PORT_MODE_INTERNAL	BIT(0)</div><div class='add'>+#define OCELOT_PORT_MODE_SGMII		BIT(1)</div><div class='add'>+#define OCELOT_PORT_MODE_QSGMII		BIT(2)</div><div class='add'>+#define OCELOT_PORT_MODE_2500BASEX	BIT(3)</div><div class='add'>+#define OCELOT_PORT_MODE_USXGMII	BIT(4) /* compatibility */</div><div class='add'>+#define OCELOT_PORT_MODE_1000BASEX	BIT(5)</div><div class='add'>+#define OCELOT_PORT_MODE_10G_QXGMII	BIT(6)</div><div class='add'>+</div><div class='add'>+struct device_node;</div><div class='add'>+</div><div class='add'>+/* Platform-specific information */</div><div class='add'>+struct felix_info {</div><div class='add'>+	/* Hardcoded resources provided by the hardware instantiation. */</div><div class='add'>+	const struct resource		*resources;</div><div class='add'>+	size_t				num_resources;</div><div class='add'>+	/* Names of the mandatory resources that will be requested during</div><div class='add'>+	 * probe. Must have TARGET_MAX elements, since it is indexed by target.</div><div class='add'>+	 */</div><div class='add'>+	const char *const		*resource_names;</div><div class='add'>+	const struct reg_field		*regfields;</div><div class='add'>+	const u32 *const		*map;</div><div class='add'>+	const struct ocelot_ops		*ops;</div><div class='add'>+	const u32			*port_modes;</div><div class='add'>+	int				num_mact_rows;</div><div class='add'>+	int				num_ports;</div><div class='add'>+	struct vcap_props		*vcap;</div><div class='add'>+	u16				vcap_pol_base;</div><div class='add'>+	u16				vcap_pol_max;</div><div class='add'>+	u16				vcap_pol_base2;</div><div class='add'>+	u16				vcap_pol_max2;</div><div class='add'>+	const struct ptp_clock_info	*ptp_caps;</div><div class='add'>+	unsigned long			quirks;</div><div class='add'>+</div><div class='add'>+	/* Some Ocelot switches are integrated into the SoC without the</div><div class='add'>+	 * extraction IRQ line connected to the ARM GIC. By enabling this</div><div class='add'>+	 * workaround, the few packets that are delivered to the CPU port</div><div class='add'>+	 * module (currently only PTP) are copied not only to the hardware CPU</div><div class='add'>+	 * port module, but also to the 802.1Q Ethernet CPU port, and polling</div><div class='add'>+	 * the extraction registers is triggered once the DSA tagger sees a PTP</div><div class='add'>+	 * frame. The Ethernet frame is only used as a notification: it is</div><div class='add'>+	 * dropped, and the original frame is extracted over MMIO and annotated</div><div class='add'>+	 * with the RX timestamp.</div><div class='add'>+	 */</div><div class='add'>+	bool				quirk_no_xtr_irq;</div><div class='add'>+</div><div class='add'>+	int	(*mdio_bus_alloc)(struct ocelot *ocelot);</div><div class='add'>+	void	(*mdio_bus_free)(struct ocelot *ocelot);</div><div class='add'>+	int	(*port_setup_tc)(struct dsa_switch *ds, int port,</div><div class='add'>+				 enum tc_setup_type type, void *type_data);</div><div class='add'>+	void	(*port_sched_speed_set)(struct ocelot *ocelot, int port,</div><div class='add'>+					u32 speed);</div><div class='add'>+	void	(*phylink_mac_config)(struct ocelot *ocelot, int port,</div><div class='add'>+				      unsigned int mode,</div><div class='add'>+				      const struct phylink_link_state *state);</div><div class='add'>+	int	(*configure_serdes)(struct ocelot *ocelot, int port,</div><div class='add'>+				    struct device_node *portnp);</div><div class='add'>+	int	(*request_irq)(struct ocelot *ocelot);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Methods for initializing the hardware resources specific to a tagging</div><div class='add'>+ * protocol (like the NPI port, for "ocelot" or "seville", or the VCAP TCAMs,</div><div class='add'>+ * for "ocelot-8021q").</div><div class='add'>+ * It is important that the resources configured here do not have side effects</div><div class='add'>+ * for the other tagging protocols. If that is the case, their configuration</div><div class='add'>+ * needs to go to felix_tag_proto_setup_shared().</div><div class='add'>+ */</div><div class='add'>+struct felix_tag_proto_ops {</div><div class='add'>+	int (*setup)(struct dsa_switch *ds);</div><div class='add'>+	void (*teardown)(struct dsa_switch *ds);</div><div class='add'>+	unsigned long (*get_host_fwd_mask)(struct dsa_switch *ds);</div><div class='add'>+	int (*change_conduit)(struct dsa_switch *ds, int port,</div><div class='add'>+			      struct net_device *conduit,</div><div class='add'>+			      struct netlink_ext_ack *extack);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* DSA glue / front-end for struct ocelot */</div><div class='add'>+struct felix {</div><div class='add'>+	struct dsa_switch		*ds;</div><div class='add'>+	const struct felix_info		*info;</div><div class='add'>+	struct ocelot			ocelot;</div><div class='add'>+	struct mii_bus			*imdio;</div><div class='add'>+	struct phylink_pcs		**pcs;</div><div class='add'>+	resource_size_t			switch_base;</div><div class='add'>+	enum dsa_tag_protocol		tag_proto;</div><div class='add'>+	const struct felix_tag_proto_ops *tag_proto_ops;</div><div class='add'>+	struct kthread_worker		*xmit_worker;</div><div class='add'>+	unsigned long			host_flood_uc_mask;</div><div class='add'>+	unsigned long			host_flood_mc_mask;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int felix_register_switch(struct device *dev, resource_size_t switch_base,</div><div class='add'>+			  int num_flooding_pgids, bool ptp,</div><div class='add'>+			  bool mm_supported,</div><div class='add'>+			  enum dsa_tag_protocol init_tag_proto,</div><div class='add'>+			  const struct felix_info *info);</div><div class='add'>+struct net_device *felix_port_to_netdev(struct ocelot *ocelot, int port);</div><div class='add'>+int felix_netdev_to_port(struct net_device *dev);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/dsa/ocelot/felix_vsc9959.c b/drivers/net/dsa/ocelot/felix_vsc9959.c<br/>new file mode 100644<br/>index 000000000000..8cf4c8986587<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/ocelot/felix_vsc9959.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/ocelot/felix_vsc9959.c</a></div><div class='hunk'>@@ -0,0 +1,2757 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/* Copyright 2017 Microsemi Corporation</div><div class='add'>+ * Copyright 2018-2019 NXP</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/fsl/enetc_mdio.h&gt;</div><div class='add'>+#include &lt;soc/mscc/ocelot_qsys.h&gt;</div><div class='add'>+#include &lt;soc/mscc/ocelot_vcap.h&gt;</div><div class='add'>+#include &lt;soc/mscc/ocelot_ana.h&gt;</div><div class='add'>+#include &lt;soc/mscc/ocelot_dev.h&gt;</div><div class='add'>+#include &lt;soc/mscc/ocelot_ptp.h&gt;</div><div class='add'>+#include &lt;soc/mscc/ocelot_sys.h&gt;</div><div class='add'>+#include &lt;net/tc_act/tc_gate.h&gt;</div><div class='add'>+#include &lt;soc/mscc/ocelot.h&gt;</div><div class='add'>+#include &lt;linux/dsa/ocelot.h&gt;</div><div class='add'>+#include &lt;linux/pcs-lynx.h&gt;</div><div class='add'>+#include &lt;net/pkt_sched.h&gt;</div><div class='add'>+#include &lt;linux/iopoll.h&gt;</div><div class='add'>+#include &lt;linux/mdio.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/time.h&gt;</div><div class='add'>+#include "felix.h"</div><div class='add'>+</div><div class='add'>+#define VSC9959_NUM_PORTS		6</div><div class='add'>+</div><div class='add'>+#define VSC9959_TAS_GCL_ENTRY_MAX	63</div><div class='add'>+#define VSC9959_TAS_MIN_GATE_LEN_NS	35</div><div class='add'>+#define VSC9959_VCAP_POLICER_BASE	63</div><div class='add'>+#define VSC9959_VCAP_POLICER_MAX	383</div><div class='add'>+#define VSC9959_SWITCH_PCI_BAR		4</div><div class='add'>+#define VSC9959_IMDIO_PCI_BAR		0</div><div class='add'>+</div><div class='add'>+#define VSC9959_PORT_MODE_SERDES	(OCELOT_PORT_MODE_SGMII | \</div><div class='add'>+					 OCELOT_PORT_MODE_QSGMII | \</div><div class='add'>+					 OCELOT_PORT_MODE_1000BASEX | \</div><div class='add'>+					 OCELOT_PORT_MODE_2500BASEX | \</div><div class='add'>+					 OCELOT_PORT_MODE_USXGMII | \</div><div class='add'>+					 OCELOT_PORT_MODE_10G_QXGMII)</div><div class='add'>+</div><div class='add'>+static const u32 vsc9959_port_modes[VSC9959_NUM_PORTS] = {</div><div class='add'>+	VSC9959_PORT_MODE_SERDES,</div><div class='add'>+	VSC9959_PORT_MODE_SERDES,</div><div class='add'>+	VSC9959_PORT_MODE_SERDES,</div><div class='add'>+	VSC9959_PORT_MODE_SERDES,</div><div class='add'>+	OCELOT_PORT_MODE_INTERNAL,</div><div class='add'>+	OCELOT_PORT_MODE_INTERNAL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 vsc9959_ana_regmap[] = {</div><div class='add'>+	REG(ANA_ADVLEARN,			0x0089a0),</div><div class='add'>+	REG(ANA_VLANMASK,			0x0089a4),</div><div class='add'>+	REG_RESERVED(ANA_PORT_B_DOMAIN),</div><div class='add'>+	REG(ANA_ANAGEFIL,			0x0089ac),</div><div class='add'>+	REG(ANA_ANEVENTS,			0x0089b0),</div><div class='add'>+	REG(ANA_STORMLIMIT_BURST,		0x0089b4),</div><div class='add'>+	REG(ANA_STORMLIMIT_CFG,			0x0089b8),</div><div class='add'>+	REG(ANA_ISOLATED_PORTS,			0x0089c8),</div><div class='add'>+	REG(ANA_COMMUNITY_PORTS,		0x0089cc),</div><div class='add'>+	REG(ANA_AUTOAGE,			0x0089d0),</div><div class='add'>+	REG(ANA_MACTOPTIONS,			0x0089d4),</div><div class='add'>+	REG(ANA_LEARNDISC,			0x0089d8),</div><div class='add'>+	REG(ANA_AGENCTRL,			0x0089dc),</div><div class='add'>+	REG(ANA_MIRRORPORTS,			0x0089e0),</div><div class='add'>+	REG(ANA_EMIRRORPORTS,			0x0089e4),</div><div class='add'>+	REG(ANA_FLOODING,			0x0089e8),</div><div class='add'>+	REG(ANA_FLOODING_IPMC,			0x008a08),</div><div class='add'>+	REG(ANA_SFLOW_CFG,			0x008a0c),</div><div class='add'>+	REG(ANA_PORT_MODE,			0x008a28),</div><div class='add'>+	REG(ANA_CUT_THRU_CFG,			0x008a48),</div><div class='add'>+	REG(ANA_PGID_PGID,			0x008400),</div><div class='add'>+	REG(ANA_TABLES_ANMOVED,			0x007f1c),</div><div class='add'>+	REG(ANA_TABLES_MACHDATA,		0x007f20),</div><div class='add'>+	REG(ANA_TABLES_MACLDATA,		0x007f24),</div><div class='add'>+	REG(ANA_TABLES_STREAMDATA,		0x007f28),</div><div class='add'>+	REG(ANA_TABLES_MACACCESS,		0x007f2c),</div><div class='add'>+	REG(ANA_TABLES_MACTINDX,		0x007f30),</div><div class='add'>+	REG(ANA_TABLES_VLANACCESS,		0x007f34),</div><div class='add'>+	REG(ANA_TABLES_VLANTIDX,		0x007f38),</div><div class='add'>+	REG(ANA_TABLES_ISDXACCESS,		0x007f3c),</div><div class='add'>+	REG(ANA_TABLES_ISDXTIDX,		0x007f40),</div><div class='add'>+	REG(ANA_TABLES_ENTRYLIM,		0x007f00),</div><div class='add'>+	REG(ANA_TABLES_PTP_ID_HIGH,		0x007f44),</div><div class='add'>+	REG(ANA_TABLES_PTP_ID_LOW,		0x007f48),</div><div class='add'>+	REG(ANA_TABLES_STREAMACCESS,		0x007f4c),</div><div class='add'>+	REG(ANA_TABLES_STREAMTIDX,		0x007f50),</div><div class='add'>+	REG(ANA_TABLES_SEQ_HISTORY,		0x007f54),</div><div class='add'>+	REG(ANA_TABLES_SEQ_MASK,		0x007f58),</div><div class='add'>+	REG(ANA_TABLES_SFID_MASK,		0x007f5c),</div><div class='add'>+	REG(ANA_TABLES_SFIDACCESS,		0x007f60),</div><div class='add'>+	REG(ANA_TABLES_SFIDTIDX,		0x007f64),</div><div class='add'>+	REG(ANA_MSTI_STATE,			0x008600),</div><div class='add'>+	REG(ANA_OAM_UPM_LM_CNT,			0x008000),</div><div class='add'>+	REG(ANA_SG_ACCESS_CTRL,			0x008a64),</div><div class='add'>+	REG(ANA_SG_CONFIG_REG_1,		0x007fb0),</div><div class='add'>+	REG(ANA_SG_CONFIG_REG_2,		0x007fb4),</div><div class='add'>+	REG(ANA_SG_CONFIG_REG_3,		0x007fb8),</div><div class='add'>+	REG(ANA_SG_CONFIG_REG_4,		0x007fbc),</div><div class='add'>+	REG(ANA_SG_CONFIG_REG_5,		0x007fc0),</div><div class='add'>+	REG(ANA_SG_GCL_GS_CONFIG,		0x007f80),</div><div class='add'>+	REG(ANA_SG_GCL_TI_CONFIG,		0x007f90),</div><div class='add'>+	REG(ANA_SG_STATUS_REG_1,		0x008980),</div><div class='add'>+	REG(ANA_SG_STATUS_REG_2,		0x008984),</div><div class='add'>+	REG(ANA_SG_STATUS_REG_3,		0x008988),</div><div class='add'>+	REG(ANA_PORT_VLAN_CFG,			0x007800),</div><div class='add'>+	REG(ANA_PORT_DROP_CFG,			0x007804),</div><div class='add'>+	REG(ANA_PORT_QOS_CFG,			0x007808),</div><div class='add'>+	REG(ANA_PORT_VCAP_CFG,			0x00780c),</div><div class='add'>+	REG(ANA_PORT_VCAP_S1_KEY_CFG,		0x007810),</div><div class='add'>+	REG(ANA_PORT_VCAP_S2_CFG,		0x00781c),</div><div class='add'>+	REG(ANA_PORT_PCP_DEI_MAP,		0x007820),</div><div class='add'>+	REG(ANA_PORT_CPU_FWD_CFG,		0x007860),</div><div class='add'>+	REG(ANA_PORT_CPU_FWD_BPDU_CFG,		0x007864),</div><div class='add'>+	REG(ANA_PORT_CPU_FWD_GARP_CFG,		0x007868),</div><div class='add'>+	REG(ANA_PORT_CPU_FWD_CCM_CFG,		0x00786c),</div><div class='add'>+	REG(ANA_PORT_PORT_CFG,			0x007870),</div><div class='add'>+	REG(ANA_PORT_POL_CFG,			0x007874),</div><div class='add'>+	REG(ANA_PORT_PTP_CFG,			0x007878),</div><div class='add'>+	REG(ANA_PORT_PTP_DLY1_CFG,		0x00787c),</div><div class='add'>+	REG(ANA_PORT_PTP_DLY2_CFG,		0x007880),</div><div class='add'>+	REG(ANA_PORT_SFID_CFG,			0x007884),</div><div class='add'>+	REG(ANA_PFC_PFC_CFG,			0x008800),</div><div class='add'>+	REG_RESERVED(ANA_PFC_PFC_TIMER),</div><div class='add'>+	REG_RESERVED(ANA_IPT_OAM_MEP_CFG),</div><div class='add'>+	REG_RESERVED(ANA_IPT_IPT),</div><div class='add'>+	REG_RESERVED(ANA_PPT_PPT),</div><div class='add'>+	REG_RESERVED(ANA_FID_MAP_FID_MAP),</div><div class='add'>+	REG(ANA_AGGR_CFG,			0x008a68),</div><div class='add'>+	REG(ANA_CPUQ_CFG,			0x008a6c),</div><div class='add'>+	REG_RESERVED(ANA_CPUQ_CFG2),</div><div class='add'>+	REG(ANA_CPUQ_8021_CFG,			0x008a74),</div><div class='add'>+	REG(ANA_DSCP_CFG,			0x008ab4),</div><div class='add'>+	REG(ANA_DSCP_REWR_CFG,			0x008bb4),</div><div class='add'>+	REG(ANA_VCAP_RNG_TYPE_CFG,		0x008bf4),</div><div class='add'>+	REG(ANA_VCAP_RNG_VAL_CFG,		0x008c14),</div><div class='add'>+	REG_RESERVED(ANA_VRAP_CFG),</div><div class='add'>+	REG_RESERVED(ANA_VRAP_HDR_DATA),</div><div class='add'>+	REG_RESERVED(ANA_VRAP_HDR_MASK),</div><div class='add'>+	REG(ANA_DISCARD_CFG,			0x008c40),</div><div class='add'>+	REG(ANA_FID_CFG,			0x008c44),</div><div class='add'>+	REG(ANA_POL_PIR_CFG,			0x004000),</div><div class='add'>+	REG(ANA_POL_CIR_CFG,			0x004004),</div><div class='add'>+	REG(ANA_POL_MODE_CFG,			0x004008),</div><div class='add'>+	REG(ANA_POL_PIR_STATE,			0x00400c),</div><div class='add'>+	REG(ANA_POL_CIR_STATE,			0x004010),</div><div class='add'>+	REG_RESERVED(ANA_POL_STATE),</div><div class='add'>+	REG(ANA_POL_FLOWC,			0x008c48),</div><div class='add'>+	REG(ANA_POL_HYST,			0x008cb4),</div><div class='add'>+	REG_RESERVED(ANA_POL_MISC_CFG),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 vsc9959_qs_regmap[] = {</div><div class='add'>+	REG(QS_XTR_GRP_CFG,			0x000000),</div><div class='add'>+	REG(QS_XTR_RD,				0x000008),</div><div class='add'>+	REG(QS_XTR_FRM_PRUNING,			0x000010),</div><div class='add'>+	REG(QS_XTR_FLUSH,			0x000018),</div><div class='add'>+	REG(QS_XTR_DATA_PRESENT,		0x00001c),</div><div class='add'>+	REG(QS_XTR_CFG,				0x000020),</div><div class='add'>+	REG(QS_INJ_GRP_CFG,			0x000024),</div><div class='add'>+	REG(QS_INJ_WR,				0x00002c),</div><div class='add'>+	REG(QS_INJ_CTRL,			0x000034),</div><div class='add'>+	REG(QS_INJ_STATUS,			0x00003c),</div><div class='add'>+	REG(QS_INJ_ERR,				0x000040),</div><div class='add'>+	REG_RESERVED(QS_INH_DBG),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 vsc9959_vcap_regmap[] = {</div><div class='add'>+	/* VCAP_CORE_CFG */</div><div class='add'>+	REG(VCAP_CORE_UPDATE_CTRL,		0x000000),</div><div class='add'>+	REG(VCAP_CORE_MV_CFG,			0x000004),</div><div class='add'>+	/* VCAP_CORE_CACHE */</div><div class='add'>+	REG(VCAP_CACHE_ENTRY_DAT,		0x000008),</div><div class='add'>+	REG(VCAP_CACHE_MASK_DAT,		0x000108),</div><div class='add'>+	REG(VCAP_CACHE_ACTION_DAT,		0x000208),</div><div class='add'>+	REG(VCAP_CACHE_CNT_DAT,			0x000308),</div><div class='add'>+	REG(VCAP_CACHE_TG_DAT,			0x000388),</div><div class='add'>+	/* VCAP_CONST */</div><div class='add'>+	REG(VCAP_CONST_VCAP_VER,		0x000398),</div><div class='add'>+	REG(VCAP_CONST_ENTRY_WIDTH,		0x00039c),</div><div class='add'>+	REG(VCAP_CONST_ENTRY_CNT,		0x0003a0),</div><div class='add'>+	REG(VCAP_CONST_ENTRY_SWCNT,		0x0003a4),</div><div class='add'>+	REG(VCAP_CONST_ENTRY_TG_WIDTH,		0x0003a8),</div><div class='add'>+	REG(VCAP_CONST_ACTION_DEF_CNT,		0x0003ac),</div><div class='add'>+	REG(VCAP_CONST_ACTION_WIDTH,		0x0003b0),</div><div class='add'>+	REG(VCAP_CONST_CNT_WIDTH,		0x0003b4),</div><div class='add'>+	REG(VCAP_CONST_CORE_CNT,		0x0003b8),</div><div class='add'>+	REG(VCAP_CONST_IF_CNT,			0x0003bc),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 vsc9959_qsys_regmap[] = {</div><div class='add'>+	REG(QSYS_PORT_MODE,			0x00f460),</div><div class='add'>+	REG(QSYS_SWITCH_PORT_MODE,		0x00f480),</div><div class='add'>+	REG(QSYS_STAT_CNT_CFG,			0x00f49c),</div><div class='add'>+	REG(QSYS_EEE_CFG,			0x00f4a0),</div><div class='add'>+	REG(QSYS_EEE_THRES,			0x00f4b8),</div><div class='add'>+	REG(QSYS_IGR_NO_SHARING,		0x00f4bc),</div><div class='add'>+	REG(QSYS_EGR_NO_SHARING,		0x00f4c0),</div><div class='add'>+	REG(QSYS_SW_STATUS,			0x00f4c4),</div><div class='add'>+	REG(QSYS_EXT_CPU_CFG,			0x00f4e0),</div><div class='add'>+	REG_RESERVED(QSYS_PAD_CFG),</div><div class='add'>+	REG(QSYS_CPU_GROUP_MAP,			0x00f4e8),</div><div class='add'>+	REG_RESERVED(QSYS_QMAP),</div><div class='add'>+	REG_RESERVED(QSYS_ISDX_SGRP),</div><div class='add'>+	REG_RESERVED(QSYS_TIMED_FRAME_ENTRY),</div><div class='add'>+	REG(QSYS_TFRM_MISC,			0x00f50c),</div><div class='add'>+	REG(QSYS_TFRM_PORT_DLY,			0x00f510),</div><div class='add'>+	REG(QSYS_TFRM_TIMER_CFG_1,		0x00f514),</div><div class='add'>+	REG(QSYS_TFRM_TIMER_CFG_2,		0x00f518),</div><div class='add'>+	REG(QSYS_TFRM_TIMER_CFG_3,		0x00f51c),</div><div class='add'>+	REG(QSYS_TFRM_TIMER_CFG_4,		0x00f520),</div><div class='add'>+	REG(QSYS_TFRM_TIMER_CFG_5,		0x00f524),</div><div class='add'>+	REG(QSYS_TFRM_TIMER_CFG_6,		0x00f528),</div><div class='add'>+	REG(QSYS_TFRM_TIMER_CFG_7,		0x00f52c),</div><div class='add'>+	REG(QSYS_TFRM_TIMER_CFG_8,		0x00f530),</div><div class='add'>+	REG(QSYS_RED_PROFILE,			0x00f534),</div><div class='add'>+	REG(QSYS_RES_QOS_MODE,			0x00f574),</div><div class='add'>+	REG(QSYS_RES_CFG,			0x00c000),</div><div class='add'>+	REG(QSYS_RES_STAT,			0x00c004),</div><div class='add'>+	REG(QSYS_EGR_DROP_MODE,			0x00f578),</div><div class='add'>+	REG(QSYS_EQ_CTRL,			0x00f57c),</div><div class='add'>+	REG_RESERVED(QSYS_EVENTS_CORE),</div><div class='add'>+	REG(QSYS_QMAXSDU_CFG_0,			0x00f584),</div><div class='add'>+	REG(QSYS_QMAXSDU_CFG_1,			0x00f5a0),</div><div class='add'>+	REG(QSYS_QMAXSDU_CFG_2,			0x00f5bc),</div><div class='add'>+	REG(QSYS_QMAXSDU_CFG_3,			0x00f5d8),</div><div class='add'>+	REG(QSYS_QMAXSDU_CFG_4,			0x00f5f4),</div><div class='add'>+	REG(QSYS_QMAXSDU_CFG_5,			0x00f610),</div><div class='add'>+	REG(QSYS_QMAXSDU_CFG_6,			0x00f62c),</div><div class='add'>+	REG(QSYS_QMAXSDU_CFG_7,			0x00f648),</div><div class='add'>+	REG(QSYS_PREEMPTION_CFG,		0x00f664),</div><div class='add'>+	REG(QSYS_CIR_CFG,			0x000000),</div><div class='add'>+	REG(QSYS_EIR_CFG,			0x000004),</div><div class='add'>+	REG(QSYS_SE_CFG,			0x000008),</div><div class='add'>+	REG(QSYS_SE_DWRR_CFG,			0x00000c),</div><div class='add'>+	REG_RESERVED(QSYS_SE_CONNECT),</div><div class='add'>+	REG(QSYS_SE_DLB_SENSE,			0x000040),</div><div class='add'>+	REG(QSYS_CIR_STATE,			0x000044),</div><div class='add'>+	REG(QSYS_EIR_STATE,			0x000048),</div><div class='add'>+	REG_RESERVED(QSYS_SE_STATE),</div><div class='add'>+	REG(QSYS_HSCH_MISC_CFG,			0x00f67c),</div><div class='add'>+	REG(QSYS_TAG_CONFIG,			0x00f680),</div><div class='add'>+	REG(QSYS_TAS_PARAM_CFG_CTRL,		0x00f698),</div><div class='add'>+	REG(QSYS_PORT_MAX_SDU,			0x00f69c),</div><div class='add'>+	REG(QSYS_PARAM_CFG_REG_1,		0x00f440),</div><div class='add'>+	REG(QSYS_PARAM_CFG_REG_2,		0x00f444),</div><div class='add'>+	REG(QSYS_PARAM_CFG_REG_3,		0x00f448),</div><div class='add'>+	REG(QSYS_PARAM_CFG_REG_4,		0x00f44c),</div><div class='add'>+	REG(QSYS_PARAM_CFG_REG_5,		0x00f450),</div><div class='add'>+	REG(QSYS_GCL_CFG_REG_1,			0x00f454),</div><div class='add'>+	REG(QSYS_GCL_CFG_REG_2,			0x00f458),</div><div class='add'>+	REG(QSYS_PARAM_STATUS_REG_1,		0x00f400),</div><div class='add'>+	REG(QSYS_PARAM_STATUS_REG_2,		0x00f404),</div><div class='add'>+	REG(QSYS_PARAM_STATUS_REG_3,		0x00f408),</div><div class='add'>+	REG(QSYS_PARAM_STATUS_REG_4,		0x00f40c),</div><div class='add'>+	REG(QSYS_PARAM_STATUS_REG_5,		0x00f410),</div><div class='add'>+	REG(QSYS_PARAM_STATUS_REG_6,		0x00f414),</div><div class='add'>+	REG(QSYS_PARAM_STATUS_REG_7,		0x00f418),</div><div class='add'>+	REG(QSYS_PARAM_STATUS_REG_8,		0x00f41c),</div><div class='add'>+	REG(QSYS_PARAM_STATUS_REG_9,		0x00f420),</div><div class='add'>+	REG(QSYS_GCL_STATUS_REG_1,		0x00f424),</div><div class='add'>+	REG(QSYS_GCL_STATUS_REG_2,		0x00f428),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 vsc9959_rew_regmap[] = {</div><div class='add'>+	REG(REW_PORT_VLAN_CFG,			0x000000),</div><div class='add'>+	REG(REW_TAG_CFG,			0x000004),</div><div class='add'>+	REG(REW_PORT_CFG,			0x000008),</div><div class='add'>+	REG(REW_DSCP_CFG,			0x00000c),</div><div class='add'>+	REG(REW_PCP_DEI_QOS_MAP_CFG,		0x000010),</div><div class='add'>+	REG(REW_PTP_CFG,			0x000050),</div><div class='add'>+	REG(REW_PTP_DLY1_CFG,			0x000054),</div><div class='add'>+	REG(REW_RED_TAG_CFG,			0x000058),</div><div class='add'>+	REG(REW_DSCP_REMAP_DP1_CFG,		0x000410),</div><div class='add'>+	REG(REW_DSCP_REMAP_CFG,			0x000510),</div><div class='add'>+	REG_RESERVED(REW_STAT_CFG),</div><div class='add'>+	REG_RESERVED(REW_REW_STICKY),</div><div class='add'>+	REG_RESERVED(REW_PPT),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 vsc9959_sys_regmap[] = {</div><div class='add'>+	REG(SYS_COUNT_RX_OCTETS,		0x000000),</div><div class='add'>+	REG(SYS_COUNT_RX_UNICAST,		0x000004),</div><div class='add'>+	REG(SYS_COUNT_RX_MULTICAST,		0x000008),</div><div class='add'>+	REG(SYS_COUNT_RX_BROADCAST,		0x00000c),</div><div class='add'>+	REG(SYS_COUNT_RX_SHORTS,		0x000010),</div><div class='add'>+	REG(SYS_COUNT_RX_FRAGMENTS,		0x000014),</div><div class='add'>+	REG(SYS_COUNT_RX_JABBERS,		0x000018),</div><div class='add'>+	REG(SYS_COUNT_RX_CRC_ALIGN_ERRS,	0x00001c),</div><div class='add'>+	REG(SYS_COUNT_RX_SYM_ERRS,		0x000020),</div><div class='add'>+	REG(SYS_COUNT_RX_64,			0x000024),</div><div class='add'>+	REG(SYS_COUNT_RX_65_127,		0x000028),</div><div class='add'>+	REG(SYS_COUNT_RX_128_255,		0x00002c),</div><div class='add'>+	REG(SYS_COUNT_RX_256_511,		0x000030),</div><div class='add'>+	REG(SYS_COUNT_RX_512_1023,		0x000034),</div><div class='add'>+	REG(SYS_COUNT_RX_1024_1526,		0x000038),</div><div class='add'>+	REG(SYS_COUNT_RX_1527_MAX,		0x00003c),</div><div class='add'>+	REG(SYS_COUNT_RX_PAUSE,			0x000040),</div><div class='add'>+	REG(SYS_COUNT_RX_CONTROL,		0x000044),</div><div class='add'>+	REG(SYS_COUNT_RX_LONGS,			0x000048),</div><div class='add'>+	REG(SYS_COUNT_RX_CLASSIFIED_DROPS,	0x00004c),</div><div class='add'>+	REG(SYS_COUNT_RX_RED_PRIO_0,		0x000050),</div><div class='add'>+	REG(SYS_COUNT_RX_RED_PRIO_1,		0x000054),</div><div class='add'>+	REG(SYS_COUNT_RX_RED_PRIO_2,		0x000058),</div><div class='add'>+	REG(SYS_COUNT_RX_RED_PRIO_3,		0x00005c),</div><div class='add'>+	REG(SYS_COUNT_RX_RED_PRIO_4,		0x000060),</div><div class='add'>+	REG(SYS_COUNT_RX_RED_PRIO_5,		0x000064),</div><div class='add'>+	REG(SYS_COUNT_RX_RED_PRIO_6,		0x000068),</div><div class='add'>+	REG(SYS_COUNT_RX_RED_PRIO_7,		0x00006c),</div><div class='add'>+	REG(SYS_COUNT_RX_YELLOW_PRIO_0,		0x000070),</div><div class='add'>+	REG(SYS_COUNT_RX_YELLOW_PRIO_1,		0x000074),</div><div class='add'>+	REG(SYS_COUNT_RX_YELLOW_PRIO_2,		0x000078),</div><div class='add'>+	REG(SYS_COUNT_RX_YELLOW_PRIO_3,		0x00007c),</div><div class='add'>+	REG(SYS_COUNT_RX_YELLOW_PRIO_4,		0x000080),</div><div class='add'>+	REG(SYS_COUNT_RX_YELLOW_PRIO_5,		0x000084),</div><div class='add'>+	REG(SYS_COUNT_RX_YELLOW_PRIO_6,		0x000088),</div><div class='add'>+	REG(SYS_COUNT_RX_YELLOW_PRIO_7,		0x00008c),</div><div class='add'>+	REG(SYS_COUNT_RX_GREEN_PRIO_0,		0x000090),</div><div class='add'>+	REG(SYS_COUNT_RX_GREEN_PRIO_1,		0x000094),</div><div class='add'>+	REG(SYS_COUNT_RX_GREEN_PRIO_2,		0x000098),</div><div class='add'>+	REG(SYS_COUNT_RX_GREEN_PRIO_3,		0x00009c),</div><div class='add'>+	REG(SYS_COUNT_RX_GREEN_PRIO_4,		0x0000a0),</div><div class='add'>+	REG(SYS_COUNT_RX_GREEN_PRIO_5,		0x0000a4),</div><div class='add'>+	REG(SYS_COUNT_RX_GREEN_PRIO_6,		0x0000a8),</div><div class='add'>+	REG(SYS_COUNT_RX_GREEN_PRIO_7,		0x0000ac),</div><div class='add'>+	REG(SYS_COUNT_RX_ASSEMBLY_ERRS,		0x0000b0),</div><div class='add'>+	REG(SYS_COUNT_RX_SMD_ERRS,		0x0000b4),</div><div class='add'>+	REG(SYS_COUNT_RX_ASSEMBLY_OK,		0x0000b8),</div><div class='add'>+	REG(SYS_COUNT_RX_MERGE_FRAGMENTS,	0x0000bc),</div><div class='add'>+	REG(SYS_COUNT_RX_PMAC_OCTETS,		0x0000c0),</div><div class='add'>+	REG(SYS_COUNT_RX_PMAC_UNICAST,		0x0000c4),</div><div class='add'>+	REG(SYS_COUNT_RX_PMAC_MULTICAST,	0x0000c8),</div><div class='add'>+	REG(SYS_COUNT_RX_PMAC_BROADCAST,	0x0000cc),</div><div class='add'>+	REG(SYS_COUNT_RX_PMAC_SHORTS,		0x0000d0),</div><div class='add'>+	REG(SYS_COUNT_RX_PMAC_FRAGMENTS,	0x0000d4),</div><div class='add'>+	REG(SYS_COUNT_RX_PMAC_JABBERS,		0x0000d8),</div><div class='add'>+	REG(SYS_COUNT_RX_PMAC_CRC_ALIGN_ERRS,	0x0000dc),</div><div class='add'>+	REG(SYS_COUNT_RX_PMAC_SYM_ERRS,		0x0000e0),</div><div class='add'>+	REG(SYS_COUNT_RX_PMAC_64,		0x0000e4),</div><div class='add'>+	REG(SYS_COUNT_RX_PMAC_65_127,		0x0000e8),</div><div class='add'>+	REG(SYS_COUNT_RX_PMAC_128_255,		0x0000ec),</div><div class='add'>+	REG(SYS_COUNT_RX_PMAC_256_511,		0x0000f0),</div><div class='add'>+	REG(SYS_COUNT_RX_PMAC_512_1023,		0x0000f4),</div><div class='add'>+	REG(SYS_COUNT_RX_PMAC_1024_1526,	0x0000f8),</div><div class='add'>+	REG(SYS_COUNT_RX_PMAC_1527_MAX,		0x0000fc),</div><div class='add'>+	REG(SYS_COUNT_RX_PMAC_PAUSE,		0x000100),</div><div class='add'>+	REG(SYS_COUNT_RX_PMAC_CONTROL,		0x000104),</div><div class='add'>+	REG(SYS_COUNT_RX_PMAC_LONGS,		0x000108),</div><div class='add'>+	REG(SYS_COUNT_TX_OCTETS,		0x000200),</div><div class='add'>+	REG(SYS_COUNT_TX_UNICAST,		0x000204),</div><div class='add'>+	REG(SYS_COUNT_TX_MULTICAST,		0x000208),</div><div class='add'>+	REG(SYS_COUNT_TX_BROADCAST,		0x00020c),</div><div class='add'>+	REG(SYS_COUNT_TX_COLLISION,		0x000210),</div><div class='add'>+	REG(SYS_COUNT_TX_DROPS,			0x000214),</div><div class='add'>+	REG(SYS_COUNT_TX_PAUSE,			0x000218),</div><div class='add'>+	REG(SYS_COUNT_TX_64,			0x00021c),</div><div class='add'>+	REG(SYS_COUNT_TX_65_127,		0x000220),</div><div class='add'>+	REG(SYS_COUNT_TX_128_255,		0x000224),</div><div class='add'>+	REG(SYS_COUNT_TX_256_511,		0x000228),</div><div class='add'>+	REG(SYS_COUNT_TX_512_1023,		0x00022c),</div><div class='add'>+	REG(SYS_COUNT_TX_1024_1526,		0x000230),</div><div class='add'>+	REG(SYS_COUNT_TX_1527_MAX,		0x000234),</div><div class='add'>+	REG(SYS_COUNT_TX_YELLOW_PRIO_0,		0x000238),</div><div class='add'>+	REG(SYS_COUNT_TX_YELLOW_PRIO_1,		0x00023c),</div><div class='add'>+	REG(SYS_COUNT_TX_YELLOW_PRIO_2,		0x000240),</div><div class='add'>+	REG(SYS_COUNT_TX_YELLOW_PRIO_3,		0x000244),</div><div class='add'>+	REG(SYS_COUNT_TX_YELLOW_PRIO_4,		0x000248),</div><div class='add'>+	REG(SYS_COUNT_TX_YELLOW_PRIO_5,		0x00024c),</div><div class='add'>+	REG(SYS_COUNT_TX_YELLOW_PRIO_6,		0x000250),</div><div class='add'>+	REG(SYS_COUNT_TX_YELLOW_PRIO_7,		0x000254),</div><div class='add'>+	REG(SYS_COUNT_TX_GREEN_PRIO_0,		0x000258),</div><div class='add'>+	REG(SYS_COUNT_TX_GREEN_PRIO_1,		0x00025c),</div><div class='add'>+	REG(SYS_COUNT_TX_GREEN_PRIO_2,		0x000260),</div><div class='add'>+	REG(SYS_COUNT_TX_GREEN_PRIO_3,		0x000264),</div><div class='add'>+	REG(SYS_COUNT_TX_GREEN_PRIO_4,		0x000268),</div><div class='add'>+	REG(SYS_COUNT_TX_GREEN_PRIO_5,		0x00026c),</div><div class='add'>+	REG(SYS_COUNT_TX_GREEN_PRIO_6,		0x000270),</div><div class='add'>+	REG(SYS_COUNT_TX_GREEN_PRIO_7,		0x000274),</div><div class='add'>+	REG(SYS_COUNT_TX_AGED,			0x000278),</div><div class='add'>+	REG(SYS_COUNT_TX_MM_HOLD,		0x00027c),</div><div class='add'>+	REG(SYS_COUNT_TX_MERGE_FRAGMENTS,	0x000280),</div><div class='add'>+	REG(SYS_COUNT_TX_PMAC_OCTETS,		0x000284),</div><div class='add'>+	REG(SYS_COUNT_TX_PMAC_UNICAST,		0x000288),</div><div class='add'>+	REG(SYS_COUNT_TX_PMAC_MULTICAST,	0x00028c),</div><div class='add'>+	REG(SYS_COUNT_TX_PMAC_BROADCAST,	0x000290),</div><div class='add'>+	REG(SYS_COUNT_TX_PMAC_PAUSE,		0x000294),</div><div class='add'>+	REG(SYS_COUNT_TX_PMAC_64,		0x000298),</div><div class='add'>+	REG(SYS_COUNT_TX_PMAC_65_127,		0x00029c),</div><div class='add'>+	REG(SYS_COUNT_TX_PMAC_128_255,		0x0002a0),</div><div class='add'>+	REG(SYS_COUNT_TX_PMAC_256_511,		0x0002a4),</div><div class='add'>+	REG(SYS_COUNT_TX_PMAC_512_1023,		0x0002a8),</div><div class='add'>+	REG(SYS_COUNT_TX_PMAC_1024_1526,	0x0002ac),</div><div class='add'>+	REG(SYS_COUNT_TX_PMAC_1527_MAX,		0x0002b0),</div><div class='add'>+	REG(SYS_COUNT_DROP_LOCAL,		0x000400),</div><div class='add'>+	REG(SYS_COUNT_DROP_TAIL,		0x000404),</div><div class='add'>+	REG(SYS_COUNT_DROP_YELLOW_PRIO_0,	0x000408),</div><div class='add'>+	REG(SYS_COUNT_DROP_YELLOW_PRIO_1,	0x00040c),</div><div class='add'>+	REG(SYS_COUNT_DROP_YELLOW_PRIO_2,	0x000410),</div><div class='add'>+	REG(SYS_COUNT_DROP_YELLOW_PRIO_3,	0x000414),</div><div class='add'>+	REG(SYS_COUNT_DROP_YELLOW_PRIO_4,	0x000418),</div><div class='add'>+	REG(SYS_COUNT_DROP_YELLOW_PRIO_5,	0x00041c),</div><div class='add'>+	REG(SYS_COUNT_DROP_YELLOW_PRIO_6,	0x000420),</div><div class='add'>+	REG(SYS_COUNT_DROP_YELLOW_PRIO_7,	0x000424),</div><div class='add'>+	REG(SYS_COUNT_DROP_GREEN_PRIO_0,	0x000428),</div><div class='add'>+	REG(SYS_COUNT_DROP_GREEN_PRIO_1,	0x00042c),</div><div class='add'>+	REG(SYS_COUNT_DROP_GREEN_PRIO_2,	0x000430),</div><div class='add'>+	REG(SYS_COUNT_DROP_GREEN_PRIO_3,	0x000434),</div><div class='add'>+	REG(SYS_COUNT_DROP_GREEN_PRIO_4,	0x000438),</div><div class='add'>+	REG(SYS_COUNT_DROP_GREEN_PRIO_5,	0x00043c),</div><div class='add'>+	REG(SYS_COUNT_DROP_GREEN_PRIO_6,	0x000440),</div><div class='add'>+	REG(SYS_COUNT_DROP_GREEN_PRIO_7,	0x000444),</div><div class='add'>+	REG(SYS_COUNT_SF_MATCHING_FRAMES,	0x000800),</div><div class='add'>+	REG(SYS_COUNT_SF_NOT_PASSING_FRAMES,	0x000804),</div><div class='add'>+	REG(SYS_COUNT_SF_NOT_PASSING_SDU,	0x000808),</div><div class='add'>+	REG(SYS_COUNT_SF_RED_FRAMES,		0x00080c),</div><div class='add'>+	REG(SYS_RESET_CFG,			0x000e00),</div><div class='add'>+	REG(SYS_SR_ETYPE_CFG,			0x000e04),</div><div class='add'>+	REG(SYS_VLAN_ETYPE_CFG,			0x000e08),</div><div class='add'>+	REG(SYS_PORT_MODE,			0x000e0c),</div><div class='add'>+	REG(SYS_FRONT_PORT_MODE,		0x000e2c),</div><div class='add'>+	REG(SYS_FRM_AGING,			0x000e44),</div><div class='add'>+	REG(SYS_STAT_CFG,			0x000e48),</div><div class='add'>+	REG(SYS_SW_STATUS,			0x000e4c),</div><div class='add'>+	REG_RESERVED(SYS_MISC_CFG),</div><div class='add'>+	REG(SYS_REW_MAC_HIGH_CFG,		0x000e6c),</div><div class='add'>+	REG(SYS_REW_MAC_LOW_CFG,		0x000e84),</div><div class='add'>+	REG(SYS_TIMESTAMP_OFFSET,		0x000e9c),</div><div class='add'>+	REG(SYS_PAUSE_CFG,			0x000ea0),</div><div class='add'>+	REG(SYS_PAUSE_TOT_CFG,			0x000ebc),</div><div class='add'>+	REG(SYS_ATOP,				0x000ec0),</div><div class='add'>+	REG(SYS_ATOP_TOT_CFG,			0x000edc),</div><div class='add'>+	REG(SYS_MAC_FC_CFG,			0x000ee0),</div><div class='add'>+	REG(SYS_MMGT,				0x000ef8),</div><div class='add'>+	REG_RESERVED(SYS_MMGT_FAST),</div><div class='add'>+	REG_RESERVED(SYS_EVENTS_DIF),</div><div class='add'>+	REG_RESERVED(SYS_EVENTS_CORE),</div><div class='add'>+	REG(SYS_PTP_STATUS,			0x000f14),</div><div class='add'>+	REG(SYS_PTP_TXSTAMP,			0x000f18),</div><div class='add'>+	REG(SYS_PTP_NXT,			0x000f1c),</div><div class='add'>+	REG(SYS_PTP_CFG,			0x000f20),</div><div class='add'>+	REG(SYS_RAM_INIT,			0x000f24),</div><div class='add'>+	REG_RESERVED(SYS_CM_ADDR),</div><div class='add'>+	REG_RESERVED(SYS_CM_DATA_WR),</div><div class='add'>+	REG_RESERVED(SYS_CM_DATA_RD),</div><div class='add'>+	REG_RESERVED(SYS_CM_OP),</div><div class='add'>+	REG_RESERVED(SYS_CM_DATA),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 vsc9959_ptp_regmap[] = {</div><div class='add'>+	REG(PTP_PIN_CFG,			0x000000),</div><div class='add'>+	REG(PTP_PIN_TOD_SEC_MSB,		0x000004),</div><div class='add'>+	REG(PTP_PIN_TOD_SEC_LSB,		0x000008),</div><div class='add'>+	REG(PTP_PIN_TOD_NSEC,			0x00000c),</div><div class='add'>+	REG(PTP_PIN_WF_HIGH_PERIOD,		0x000014),</div><div class='add'>+	REG(PTP_PIN_WF_LOW_PERIOD,		0x000018),</div><div class='add'>+	REG(PTP_CFG_MISC,			0x0000a0),</div><div class='add'>+	REG(PTP_CLK_CFG_ADJ_CFG,		0x0000a4),</div><div class='add'>+	REG(PTP_CLK_CFG_ADJ_FREQ,		0x0000a8),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 vsc9959_gcb_regmap[] = {</div><div class='add'>+	REG(GCB_SOFT_RST,			0x000004),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 vsc9959_dev_gmii_regmap[] = {</div><div class='add'>+	REG(DEV_CLOCK_CFG,			0x0),</div><div class='add'>+	REG(DEV_PORT_MISC,			0x4),</div><div class='add'>+	REG(DEV_EVENTS,				0x8),</div><div class='add'>+	REG(DEV_EEE_CFG,			0xc),</div><div class='add'>+	REG(DEV_RX_PATH_DELAY,			0x10),</div><div class='add'>+	REG(DEV_TX_PATH_DELAY,			0x14),</div><div class='add'>+	REG(DEV_PTP_PREDICT_CFG,		0x18),</div><div class='add'>+	REG(DEV_MAC_ENA_CFG,			0x1c),</div><div class='add'>+	REG(DEV_MAC_MODE_CFG,			0x20),</div><div class='add'>+	REG(DEV_MAC_MAXLEN_CFG,			0x24),</div><div class='add'>+	REG(DEV_MAC_TAGS_CFG,			0x28),</div><div class='add'>+	REG(DEV_MAC_ADV_CHK_CFG,		0x2c),</div><div class='add'>+	REG(DEV_MAC_IFG_CFG,			0x30),</div><div class='add'>+	REG(DEV_MAC_HDX_CFG,			0x34),</div><div class='add'>+	REG(DEV_MAC_DBG_CFG,			0x38),</div><div class='add'>+	REG(DEV_MAC_FC_MAC_LOW_CFG,		0x3c),</div><div class='add'>+	REG(DEV_MAC_FC_MAC_HIGH_CFG,		0x40),</div><div class='add'>+	REG(DEV_MAC_STICKY,			0x44),</div><div class='add'>+	REG(DEV_MM_ENABLE_CONFIG,		0x48),</div><div class='add'>+	REG(DEV_MM_VERIF_CONFIG,		0x4C),</div><div class='add'>+	REG(DEV_MM_STATUS,			0x50),</div><div class='add'>+	REG_RESERVED(PCS1G_CFG),</div><div class='add'>+	REG_RESERVED(PCS1G_MODE_CFG),</div><div class='add'>+	REG_RESERVED(PCS1G_SD_CFG),</div><div class='add'>+	REG_RESERVED(PCS1G_ANEG_CFG),</div><div class='add'>+	REG_RESERVED(PCS1G_ANEG_NP_CFG),</div><div class='add'>+	REG_RESERVED(PCS1G_LB_CFG),</div><div class='add'>+	REG_RESERVED(PCS1G_DBG_CFG),</div><div class='add'>+	REG_RESERVED(PCS1G_CDET_CFG),</div><div class='add'>+	REG_RESERVED(PCS1G_ANEG_STATUS),</div><div class='add'>+	REG_RESERVED(PCS1G_ANEG_NP_STATUS),</div><div class='add'>+	REG_RESERVED(PCS1G_LINK_STATUS),</div><div class='add'>+	REG_RESERVED(PCS1G_LINK_DOWN_CNT),</div><div class='add'>+	REG_RESERVED(PCS1G_STICKY),</div><div class='add'>+	REG_RESERVED(PCS1G_DEBUG_STATUS),</div><div class='add'>+	REG_RESERVED(PCS1G_LPI_CFG),</div><div class='add'>+	REG_RESERVED(PCS1G_LPI_WAKE_ERROR_CNT),</div><div class='add'>+	REG_RESERVED(PCS1G_LPI_STATUS),</div><div class='add'>+	REG_RESERVED(PCS1G_TSTPAT_MODE_CFG),</div><div class='add'>+	REG_RESERVED(PCS1G_TSTPAT_STATUS),</div><div class='add'>+	REG_RESERVED(DEV_PCS_FX100_CFG),</div><div class='add'>+	REG_RESERVED(DEV_PCS_FX100_STATUS),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 *vsc9959_regmap[TARGET_MAX] = {</div><div class='add'>+	[ANA]	= vsc9959_ana_regmap,</div><div class='add'>+	[QS]	= vsc9959_qs_regmap,</div><div class='add'>+	[QSYS]	= vsc9959_qsys_regmap,</div><div class='add'>+	[REW]	= vsc9959_rew_regmap,</div><div class='add'>+	[SYS]	= vsc9959_sys_regmap,</div><div class='add'>+	[S0]	= vsc9959_vcap_regmap,</div><div class='add'>+	[S1]	= vsc9959_vcap_regmap,</div><div class='add'>+	[S2]	= vsc9959_vcap_regmap,</div><div class='add'>+	[PTP]	= vsc9959_ptp_regmap,</div><div class='add'>+	[GCB]	= vsc9959_gcb_regmap,</div><div class='add'>+	[DEV_GMII] = vsc9959_dev_gmii_regmap,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Addresses are relative to the PCI device's base address */</div><div class='add'>+static const struct resource vsc9959_resources[] = {</div><div class='add'>+	DEFINE_RES_MEM_NAMED(0x0010000, 0x0010000, "sys"),</div><div class='add'>+	DEFINE_RES_MEM_NAMED(0x0030000, 0x0010000, "rew"),</div><div class='add'>+	DEFINE_RES_MEM_NAMED(0x0040000, 0x0000400, "s0"),</div><div class='add'>+	DEFINE_RES_MEM_NAMED(0x0050000, 0x0000400, "s1"),</div><div class='add'>+	DEFINE_RES_MEM_NAMED(0x0060000, 0x0000400, "s2"),</div><div class='add'>+	DEFINE_RES_MEM_NAMED(0x0070000, 0x0000200, "devcpu_gcb"),</div><div class='add'>+	DEFINE_RES_MEM_NAMED(0x0080000, 0x0000100, "qs"),</div><div class='add'>+	DEFINE_RES_MEM_NAMED(0x0090000, 0x00000cc, "ptp"),</div><div class='add'>+	DEFINE_RES_MEM_NAMED(0x0100000, 0x0010000, "port0"),</div><div class='add'>+	DEFINE_RES_MEM_NAMED(0x0110000, 0x0010000, "port1"),</div><div class='add'>+	DEFINE_RES_MEM_NAMED(0x0120000, 0x0010000, "port2"),</div><div class='add'>+	DEFINE_RES_MEM_NAMED(0x0130000, 0x0010000, "port3"),</div><div class='add'>+	DEFINE_RES_MEM_NAMED(0x0140000, 0x0010000, "port4"),</div><div class='add'>+	DEFINE_RES_MEM_NAMED(0x0150000, 0x0010000, "port5"),</div><div class='add'>+	DEFINE_RES_MEM_NAMED(0x0200000, 0x0020000, "qsys"),</div><div class='add'>+	DEFINE_RES_MEM_NAMED(0x0280000, 0x0010000, "ana"),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char * const vsc9959_resource_names[TARGET_MAX] = {</div><div class='add'>+	[SYS] = "sys",</div><div class='add'>+	[REW] = "rew",</div><div class='add'>+	[S0] = "s0",</div><div class='add'>+	[S1] = "s1",</div><div class='add'>+	[S2] = "s2",</div><div class='add'>+	[GCB] = "devcpu_gcb",</div><div class='add'>+	[QS] = "qs",</div><div class='add'>+	[PTP] = "ptp",</div><div class='add'>+	[QSYS] = "qsys",</div><div class='add'>+	[ANA] = "ana",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Port MAC 0 Internal MDIO bus through which the SerDes acting as an</div><div class='add'>+ * SGMII/QSGMII MAC PCS can be found.</div><div class='add'>+ */</div><div class='add'>+static const struct resource vsc9959_imdio_res =</div><div class='add'>+	DEFINE_RES_MEM_NAMED(0x8030, 0x10, "imdio");</div><div class='add'>+</div><div class='add'>+static const struct reg_field vsc9959_regfields[REGFIELD_MAX] = {</div><div class='add'>+	[ANA_ADVLEARN_VLAN_CHK] = REG_FIELD(ANA_ADVLEARN, 6, 6),</div><div class='add'>+	[ANA_ADVLEARN_LEARN_MIRROR] = REG_FIELD(ANA_ADVLEARN, 0, 5),</div><div class='add'>+	[ANA_ANEVENTS_FLOOD_DISCARD] = REG_FIELD(ANA_ANEVENTS, 30, 30),</div><div class='add'>+	[ANA_ANEVENTS_AUTOAGE] = REG_FIELD(ANA_ANEVENTS, 26, 26),</div><div class='add'>+	[ANA_ANEVENTS_STORM_DROP] = REG_FIELD(ANA_ANEVENTS, 24, 24),</div><div class='add'>+	[ANA_ANEVENTS_LEARN_DROP] = REG_FIELD(ANA_ANEVENTS, 23, 23),</div><div class='add'>+	[ANA_ANEVENTS_AGED_ENTRY] = REG_FIELD(ANA_ANEVENTS, 22, 22),</div><div class='add'>+	[ANA_ANEVENTS_CPU_LEARN_FAILED] = REG_FIELD(ANA_ANEVENTS, 21, 21),</div><div class='add'>+	[ANA_ANEVENTS_AUTO_LEARN_FAILED] = REG_FIELD(ANA_ANEVENTS, 20, 20),</div><div class='add'>+	[ANA_ANEVENTS_LEARN_REMOVE] = REG_FIELD(ANA_ANEVENTS, 19, 19),</div><div class='add'>+	[ANA_ANEVENTS_AUTO_LEARNED] = REG_FIELD(ANA_ANEVENTS, 18, 18),</div><div class='add'>+	[ANA_ANEVENTS_AUTO_MOVED] = REG_FIELD(ANA_ANEVENTS, 17, 17),</div><div class='add'>+	[ANA_ANEVENTS_CLASSIFIED_DROP] = REG_FIELD(ANA_ANEVENTS, 15, 15),</div><div class='add'>+	[ANA_ANEVENTS_CLASSIFIED_COPY] = REG_FIELD(ANA_ANEVENTS, 14, 14),</div><div class='add'>+	[ANA_ANEVENTS_VLAN_DISCARD] = REG_FIELD(ANA_ANEVENTS, 13, 13),</div><div class='add'>+	[ANA_ANEVENTS_FWD_DISCARD] = REG_FIELD(ANA_ANEVENTS, 12, 12),</div><div class='add'>+	[ANA_ANEVENTS_MULTICAST_FLOOD] = REG_FIELD(ANA_ANEVENTS, 11, 11),</div><div class='add'>+	[ANA_ANEVENTS_UNICAST_FLOOD] = REG_FIELD(ANA_ANEVENTS, 10, 10),</div><div class='add'>+	[ANA_ANEVENTS_DEST_KNOWN] = REG_FIELD(ANA_ANEVENTS, 9, 9),</div><div class='add'>+	[ANA_ANEVENTS_BUCKET3_MATCH] = REG_FIELD(ANA_ANEVENTS, 8, 8),</div><div class='add'>+	[ANA_ANEVENTS_BUCKET2_MATCH] = REG_FIELD(ANA_ANEVENTS, 7, 7),</div><div class='add'>+	[ANA_ANEVENTS_BUCKET1_MATCH] = REG_FIELD(ANA_ANEVENTS, 6, 6),</div><div class='add'>+	[ANA_ANEVENTS_BUCKET0_MATCH] = REG_FIELD(ANA_ANEVENTS, 5, 5),</div><div class='add'>+	[ANA_ANEVENTS_CPU_OPERATION] = REG_FIELD(ANA_ANEVENTS, 4, 4),</div><div class='add'>+	[ANA_ANEVENTS_DMAC_LOOKUP] = REG_FIELD(ANA_ANEVENTS, 3, 3),</div><div class='add'>+	[ANA_ANEVENTS_SMAC_LOOKUP] = REG_FIELD(ANA_ANEVENTS, 2, 2),</div><div class='add'>+	[ANA_ANEVENTS_SEQ_GEN_ERR_0] = REG_FIELD(ANA_ANEVENTS, 1, 1),</div><div class='add'>+	[ANA_ANEVENTS_SEQ_GEN_ERR_1] = REG_FIELD(ANA_ANEVENTS, 0, 0),</div><div class='add'>+	[ANA_TABLES_MACACCESS_B_DOM] = REG_FIELD(ANA_TABLES_MACACCESS, 16, 16),</div><div class='add'>+	[ANA_TABLES_MACTINDX_BUCKET] = REG_FIELD(ANA_TABLES_MACTINDX, 11, 12),</div><div class='add'>+	[ANA_TABLES_MACTINDX_M_INDEX] = REG_FIELD(ANA_TABLES_MACTINDX, 0, 10),</div><div class='add'>+	[SYS_RESET_CFG_CORE_ENA] = REG_FIELD(SYS_RESET_CFG, 0, 0),</div><div class='add'>+	[GCB_SOFT_RST_SWC_RST] = REG_FIELD(GCB_SOFT_RST, 0, 0),</div><div class='add'>+	/* Replicated per number of ports (7), register size 4 per port */</div><div class='add'>+	[QSYS_SWITCH_PORT_MODE_PORT_ENA] = REG_FIELD_ID(QSYS_SWITCH_PORT_MODE, 14, 14, 7, 4),</div><div class='add'>+	[QSYS_SWITCH_PORT_MODE_SCH_NEXT_CFG] = REG_FIELD_ID(QSYS_SWITCH_PORT_MODE, 11, 13, 7, 4),</div><div class='add'>+	[QSYS_SWITCH_PORT_MODE_YEL_RSRVD] = REG_FIELD_ID(QSYS_SWITCH_PORT_MODE, 10, 10, 7, 4),</div><div class='add'>+	[QSYS_SWITCH_PORT_MODE_INGRESS_DROP_MODE] = REG_FIELD_ID(QSYS_SWITCH_PORT_MODE, 9, 9, 7, 4),</div><div class='add'>+	[QSYS_SWITCH_PORT_MODE_TX_PFC_ENA] = REG_FIELD_ID(QSYS_SWITCH_PORT_MODE, 1, 8, 7, 4),</div><div class='add'>+	[QSYS_SWITCH_PORT_MODE_TX_PFC_MODE] = REG_FIELD_ID(QSYS_SWITCH_PORT_MODE, 0, 0, 7, 4),</div><div class='add'>+	[SYS_PORT_MODE_DATA_WO_TS] = REG_FIELD_ID(SYS_PORT_MODE, 5, 6, 7, 4),</div><div class='add'>+	[SYS_PORT_MODE_INCL_INJ_HDR] = REG_FIELD_ID(SYS_PORT_MODE, 3, 4, 7, 4),</div><div class='add'>+	[SYS_PORT_MODE_INCL_XTR_HDR] = REG_FIELD_ID(SYS_PORT_MODE, 1, 2, 7, 4),</div><div class='add'>+	[SYS_PORT_MODE_INCL_HDR_ERR] = REG_FIELD_ID(SYS_PORT_MODE, 0, 0, 7, 4),</div><div class='add'>+	[SYS_PAUSE_CFG_PAUSE_START] = REG_FIELD_ID(SYS_PAUSE_CFG, 10, 18, 7, 4),</div><div class='add'>+	[SYS_PAUSE_CFG_PAUSE_STOP] = REG_FIELD_ID(SYS_PAUSE_CFG, 1, 9, 7, 4),</div><div class='add'>+	[SYS_PAUSE_CFG_PAUSE_ENA] = REG_FIELD_ID(SYS_PAUSE_CFG, 0, 1, 7, 4),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_field vsc9959_vcap_es0_keys[] = {</div><div class='add'>+	[VCAP_ES0_EGR_PORT]			= {  0,  3},</div><div class='add'>+	[VCAP_ES0_IGR_PORT]			= {  3,  3},</div><div class='add'>+	[VCAP_ES0_RSV]				= {  6,  2},</div><div class='add'>+	[VCAP_ES0_L2_MC]			= {  8,  1},</div><div class='add'>+	[VCAP_ES0_L2_BC]			= {  9,  1},</div><div class='add'>+	[VCAP_ES0_VID]				= { 10, 12},</div><div class='add'>+	[VCAP_ES0_DP]				= { 22,  1},</div><div class='add'>+	[VCAP_ES0_PCP]				= { 23,  3},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_field vsc9959_vcap_es0_actions[] = {</div><div class='add'>+	[VCAP_ES0_ACT_PUSH_OUTER_TAG]		= {  0,  2},</div><div class='add'>+	[VCAP_ES0_ACT_PUSH_INNER_TAG]		= {  2,  1},</div><div class='add'>+	[VCAP_ES0_ACT_TAG_A_TPID_SEL]		= {  3,  2},</div><div class='add'>+	[VCAP_ES0_ACT_TAG_A_VID_SEL]		= {  5,  1},</div><div class='add'>+	[VCAP_ES0_ACT_TAG_A_PCP_SEL]		= {  6,  2},</div><div class='add'>+	[VCAP_ES0_ACT_TAG_A_DEI_SEL]		= {  8,  2},</div><div class='add'>+	[VCAP_ES0_ACT_TAG_B_TPID_SEL]		= { 10,  2},</div><div class='add'>+	[VCAP_ES0_ACT_TAG_B_VID_SEL]		= { 12,  1},</div><div class='add'>+	[VCAP_ES0_ACT_TAG_B_PCP_SEL]		= { 13,  2},</div><div class='add'>+	[VCAP_ES0_ACT_TAG_B_DEI_SEL]		= { 15,  2},</div><div class='add'>+	[VCAP_ES0_ACT_VID_A_VAL]		= { 17, 12},</div><div class='add'>+	[VCAP_ES0_ACT_PCP_A_VAL]		= { 29,  3},</div><div class='add'>+	[VCAP_ES0_ACT_DEI_A_VAL]		= { 32,  1},</div><div class='add'>+	[VCAP_ES0_ACT_VID_B_VAL]		= { 33, 12},</div><div class='add'>+	[VCAP_ES0_ACT_PCP_B_VAL]		= { 45,  3},</div><div class='add'>+	[VCAP_ES0_ACT_DEI_B_VAL]		= { 48,  1},</div><div class='add'>+	[VCAP_ES0_ACT_RSV]			= { 49, 23},</div><div class='add'>+	[VCAP_ES0_ACT_HIT_STICKY]		= { 72,  1},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_field vsc9959_vcap_is1_keys[] = {</div><div class='add'>+	[VCAP_IS1_HK_TYPE]			= {  0,   1},</div><div class='add'>+	[VCAP_IS1_HK_LOOKUP]			= {  1,   2},</div><div class='add'>+	[VCAP_IS1_HK_IGR_PORT_MASK]		= {  3,   7},</div><div class='add'>+	[VCAP_IS1_HK_RSV]			= { 10,   9},</div><div class='add'>+	[VCAP_IS1_HK_OAM_Y1731]			= { 19,   1},</div><div class='add'>+	[VCAP_IS1_HK_L2_MC]			= { 20,   1},</div><div class='add'>+	[VCAP_IS1_HK_L2_BC]			= { 21,   1},</div><div class='add'>+	[VCAP_IS1_HK_IP_MC]			= { 22,   1},</div><div class='add'>+	[VCAP_IS1_HK_VLAN_TAGGED]		= { 23,   1},</div><div class='add'>+	[VCAP_IS1_HK_VLAN_DBL_TAGGED]		= { 24,   1},</div><div class='add'>+	[VCAP_IS1_HK_TPID]			= { 25,   1},</div><div class='add'>+	[VCAP_IS1_HK_VID]			= { 26,  12},</div><div class='add'>+	[VCAP_IS1_HK_DEI]			= { 38,   1},</div><div class='add'>+	[VCAP_IS1_HK_PCP]			= { 39,   3},</div><div class='add'>+	/* Specific Fields for IS1 Half Key S1_NORMAL */</div><div class='add'>+	[VCAP_IS1_HK_L2_SMAC]			= { 42,  48},</div><div class='add'>+	[VCAP_IS1_HK_ETYPE_LEN]			= { 90,   1},</div><div class='add'>+	[VCAP_IS1_HK_ETYPE]			= { 91,  16},</div><div class='add'>+	[VCAP_IS1_HK_IP_SNAP]			= {107,   1},</div><div class='add'>+	[VCAP_IS1_HK_IP4]			= {108,   1},</div><div class='add'>+	/* Layer-3 Information */</div><div class='add'>+	[VCAP_IS1_HK_L3_FRAGMENT]		= {109,   1},</div><div class='add'>+	[VCAP_IS1_HK_L3_FRAG_OFS_GT0]		= {110,   1},</div><div class='add'>+	[VCAP_IS1_HK_L3_OPTIONS]		= {111,   1},</div><div class='add'>+	[VCAP_IS1_HK_L3_DSCP]			= {112,   6},</div><div class='add'>+	[VCAP_IS1_HK_L3_IP4_SIP]		= {118,  32},</div><div class='add'>+	/* Layer-4 Information */</div><div class='add'>+	[VCAP_IS1_HK_TCP_UDP]			= {150,   1},</div><div class='add'>+	[VCAP_IS1_HK_TCP]			= {151,   1},</div><div class='add'>+	[VCAP_IS1_HK_L4_SPORT]			= {152,  16},</div><div class='add'>+	[VCAP_IS1_HK_L4_RNG]			= {168,   8},</div><div class='add'>+	/* Specific Fields for IS1 Half Key S1_5TUPLE_IP4 */</div><div class='add'>+	[VCAP_IS1_HK_IP4_INNER_TPID]            = { 42,   1},</div><div class='add'>+	[VCAP_IS1_HK_IP4_INNER_VID]		= { 43,  12},</div><div class='add'>+	[VCAP_IS1_HK_IP4_INNER_DEI]		= { 55,   1},</div><div class='add'>+	[VCAP_IS1_HK_IP4_INNER_PCP]		= { 56,   3},</div><div class='add'>+	[VCAP_IS1_HK_IP4_IP4]			= { 59,   1},</div><div class='add'>+	[VCAP_IS1_HK_IP4_L3_FRAGMENT]		= { 60,   1},</div><div class='add'>+	[VCAP_IS1_HK_IP4_L3_FRAG_OFS_GT0]	= { 61,   1},</div><div class='add'>+	[VCAP_IS1_HK_IP4_L3_OPTIONS]		= { 62,   1},</div><div class='add'>+	[VCAP_IS1_HK_IP4_L3_DSCP]		= { 63,   6},</div><div class='add'>+	[VCAP_IS1_HK_IP4_L3_IP4_DIP]		= { 69,  32},</div><div class='add'>+	[VCAP_IS1_HK_IP4_L3_IP4_SIP]		= {101,  32},</div><div class='add'>+	[VCAP_IS1_HK_IP4_L3_PROTO]		= {133,   8},</div><div class='add'>+	[VCAP_IS1_HK_IP4_TCP_UDP]		= {141,   1},</div><div class='add'>+	[VCAP_IS1_HK_IP4_TCP]			= {142,   1},</div><div class='add'>+	[VCAP_IS1_HK_IP4_L4_RNG]		= {143,   8},</div><div class='add'>+	[VCAP_IS1_HK_IP4_IP_PAYLOAD_S1_5TUPLE]	= {151,  32},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_field vsc9959_vcap_is1_actions[] = {</div><div class='add'>+	[VCAP_IS1_ACT_DSCP_ENA]			= {  0,  1},</div><div class='add'>+	[VCAP_IS1_ACT_DSCP_VAL]			= {  1,  6},</div><div class='add'>+	[VCAP_IS1_ACT_QOS_ENA]			= {  7,  1},</div><div class='add'>+	[VCAP_IS1_ACT_QOS_VAL]			= {  8,  3},</div><div class='add'>+	[VCAP_IS1_ACT_DP_ENA]			= { 11,  1},</div><div class='add'>+	[VCAP_IS1_ACT_DP_VAL]			= { 12,  1},</div><div class='add'>+	[VCAP_IS1_ACT_PAG_OVERRIDE_MASK]	= { 13,  8},</div><div class='add'>+	[VCAP_IS1_ACT_PAG_VAL]			= { 21,  8},</div><div class='add'>+	[VCAP_IS1_ACT_RSV]			= { 29,  9},</div><div class='add'>+	/* The fields below are incorrectly shifted by 2 in the manual */</div><div class='add'>+	[VCAP_IS1_ACT_VID_REPLACE_ENA]		= { 38,  1},</div><div class='add'>+	[VCAP_IS1_ACT_VID_ADD_VAL]		= { 39, 12},</div><div class='add'>+	[VCAP_IS1_ACT_FID_SEL]			= { 51,  2},</div><div class='add'>+	[VCAP_IS1_ACT_FID_VAL]			= { 53, 13},</div><div class='add'>+	[VCAP_IS1_ACT_PCP_DEI_ENA]		= { 66,  1},</div><div class='add'>+	[VCAP_IS1_ACT_PCP_VAL]			= { 67,  3},</div><div class='add'>+	[VCAP_IS1_ACT_DEI_VAL]			= { 70,  1},</div><div class='add'>+	[VCAP_IS1_ACT_VLAN_POP_CNT_ENA]		= { 71,  1},</div><div class='add'>+	[VCAP_IS1_ACT_VLAN_POP_CNT]		= { 72,  2},</div><div class='add'>+	[VCAP_IS1_ACT_CUSTOM_ACE_TYPE_ENA]	= { 74,  4},</div><div class='add'>+	[VCAP_IS1_ACT_HIT_STICKY]		= { 78,  1},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct vcap_field vsc9959_vcap_is2_keys[] = {</div><div class='add'>+	/* Common: 41 bits */</div><div class='add'>+	[VCAP_IS2_TYPE]				= {  0,   4},</div><div class='add'>+	[VCAP_IS2_HK_FIRST]			= {  4,   1},</div><div class='add'>+	[VCAP_IS2_HK_PAG]			= {  5,   8},</div><div class='add'>+	[VCAP_IS2_HK_IGR_PORT_MASK]		= { 13,   7},</div><div class='add'>+	[VCAP_IS2_HK_RSV2]			= { 20,   1},</div><div class='add'>+	[VCAP_IS2_HK_HOST_MATCH]		= { 21,   1},</div><div class='add'>+	[VCAP_IS2_HK_L2_MC]			= { 22,   1},</div><div class='add'>+	[VCAP_IS2_HK_L2_BC]			= { 23,   1},</div><div class='add'>+	[VCAP_IS2_HK_VLAN_TAGGED]		= { 24,   1},</div><div class='add'>+	[VCAP_IS2_HK_VID]			= { 25,  12},</div><div class='add'>+	[VCAP_IS2_HK_DEI]			= { 37,   1},</div><div class='add'>+	[VCAP_IS2_HK_PCP]			= { 38,   3},</div><div class='add'>+	/* MAC_ETYPE / MAC_LLC / MAC_SNAP / OAM common */</div><div class='add'>+	[VCAP_IS2_HK_L2_DMAC]			= { 41,  48},</div><div class='add'>+	[VCAP_IS2_HK_L2_SMAC]			= { 89,  48},</div><div class='add'>+	/* MAC_ETYPE (TYPE=000) */</div><div class='add'>+	[VCAP_IS2_HK_MAC_ETYPE_ETYPE]		= {137,  16},</div><div class='add'>+	[VCAP_IS2_HK_MAC_ETYPE_L2_PAYLOAD0]	= {153,  16},</div><div class='add'>+	[VCAP_IS2_HK_MAC_ETYPE_L2_PAYLOAD1]	= {169,   8},</div><div class='add'>+	[VCAP_IS2_HK_MAC_ETYPE_L2_PAYLOAD2]	= {177,   3},</div><div class='add'>+	/* MAC_LLC (TYPE=001) */</div><div class='add'>+	[VCAP_IS2_HK_MAC_LLC_L2_LLC]		= {137,  40},</div><div class='add'>+	/* MAC_SNAP (TYPE=010) */</div><div class='add'>+	[VCAP_IS2_HK_MAC_SNAP_L2_SNAP]		= {137,  40},</div><div class='add'>+	/* MAC_ARP (TYPE=011) */</div><div class='add'>+	[VCAP_IS2_HK_MAC_ARP_SMAC]		= { 41,  48},</div><div class='add'>+	[VCAP_IS2_HK_MAC_ARP_ADDR_SPACE_OK]	= { 89,   1},</div><div class='add'>+	[VCAP_IS2_HK_MAC_ARP_PROTO_SPACE_OK]	= { 90,   1},</div><div class='add'>+	[VCAP_IS2_HK_MAC_ARP_LEN_OK]		= { 91,   1},</div><div class='add'>+	[VCAP_IS2_HK_MAC_ARP_TARGET_MATCH]	= { 92,   1},</div><div class='add'>+	[VCAP_IS2_HK_MAC_ARP_SENDER_MATCH]	= { 93,   1},</div><div class='add'>+	[VCAP_IS2_HK_MAC_ARP_OPCODE_UNKNOWN]	= { 94,   1},</div><div class='add'>+	[VCAP_IS2_HK_MAC_ARP_OPCODE]		= { 95,   2},</div><div class='add'>+	[VCAP_IS2_HK_MAC_ARP_L3_IP4_DIP]	= { 97,  32},</div><div class='add'>+	[VCAP_IS2_HK_MAC_ARP_L3_IP4_SIP]	= {129,  32},</div><div class='add'>+	[VCAP_IS2_HK_MAC_ARP_DIP_EQ_SIP]	= {161,   1},</div><div class='add'>+	/* IP4_TCP_UDP / IP4_OTHER common */</div><div class='add'>+	[VCAP_IS2_HK_IP4]			= { 41,   1},</div><div class='add'>+	[VCAP_IS2_HK_L3_FRAGMENT]		= { 42,   1},</div><div class='add'>+	[VCAP_IS2_HK_L3_FRAG_OFS_GT0]		= { 43,   1},</div><div class='add'>+	[VCAP_IS2_HK_L3_OPTIONS]		= { 44,   1},</div><div class='add'>+	[VCAP_IS2_HK_IP4_L3_TTL_GT0]		= { 45,   1},</div><div class='add'>+	[VCAP_IS2_HK_L3_TOS]			= { 46,   8},</div><div class='add'>+	[VCAP_IS2_HK_L3_IP4_DIP]		= { 54,  32},</div><div class='add'>+	[VCAP_IS2_HK_L3_IP4_SIP]		= { 86,  32},</div><div class='add'>+	[VCAP_IS2_HK_DIP_EQ_SIP]		= {118,   1},</div><div class='add'>+	/* IP4_TCP_UDP (TYPE=100) */</div><div class='add'>+	[VCAP_IS2_HK_TCP]			= {119,   1},</div><div class='add'>+	[VCAP_IS2_HK_L4_DPORT]			= {120,  16},</div><div class='add'>+	[VCAP_IS2_HK_L4_SPORT]			= {136,  16},</div><div class='add'>+	[VCAP_IS2_HK_L4_RNG]			= {152,   8},</div><div class='add'>+	[VCAP_IS2_HK_L4_SPORT_EQ_DPORT]		= {160,   1},</div><div class='add'>+	[VCAP_IS2_HK_L4_SEQUENCE_EQ0]		= {161,   1},</div><div class='add'>+	[VCAP_IS2_HK_L4_FIN]			= {162,   1},</div><div class='add'>+	[VCAP_IS2_HK_L4_SYN]			= {163,   1},</div><div class='add'>+	[VCAP_IS2_HK_L4_RST]			= {164,   1},</div><div class='add'>+	[VCAP_IS2_HK_L4_PSH]			= {165,   1},</div><div class='add'>+	[VCAP_IS2_HK_L4_ACK]			= {166,   1},</div><div class='add'>+	[VCAP_IS2_HK_L4_URG]			= {167,   1},</div><div class='add'>+	[VCAP_IS2_HK_L4_1588_DOM]		= {168,   8},</div><div class='add'>+	[VCAP_IS2_HK_L4_1588_VER]		= {176,   4},</div><div class='add'>+	/* IP4_OTHER (TYPE=101) */</div><div class='add'>+	[VCAP_IS2_HK_IP4_L3_PROTO]		= {119,   8},</div><div class='add'>+	[VCAP_IS2_HK_L3_PAYLOAD]		= {127,  56},</div><div class='add'>+	/* IP6_STD (TYPE=110) */</div><div class='add'>+	[VCAP_IS2_HK_IP6_L3_TTL_GT0]		= { 41,   1},</div><div class='add'>+	[VCAP_IS2_HK_L3_IP6_SIP]		= { 42, 128},</div><div class='add'>+	[VCAP_IS2_HK_IP6_L3_PROTO]		= {170,   8},</div><div class='add'>+	/* OAM (TYPE=111) */</div><div class='add'>+	[VCAP_IS2_HK_OAM_MEL_FLAGS]		= {137,   7},</div><div class='add'>+	[VCAP_IS2_HK_OAM_VER]			= {144,   5},</div><div class='add'>+	[VCAP_IS2_HK_OAM_OPCODE]		= {149,   8},</div><div class='add'>+	[VCAP_IS2_HK_OAM_FLAGS]			= {157,   8},</div><div class='add'>+	[VCAP_IS2_HK_OAM_MEPID]			= {165,  16},</div><div class='add'>+	[VCAP_IS2_HK_OAM_CCM_CNTS_EQ0]		= {181,   1},</div><div class='add'>+	[VCAP_IS2_HK_OAM_IS_Y1731]		= {182,   1},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct vcap_field vsc9959_vcap_is2_actions[] = {</div><div class='add'>+	[VCAP_IS2_ACT_HIT_ME_ONCE]		= {  0,  1},</div><div class='add'>+	[VCAP_IS2_ACT_CPU_COPY_ENA]		= {  1,  1},</div><div class='add'>+	[VCAP_IS2_ACT_CPU_QU_NUM]		= {  2,  3},</div><div class='add'>+	[VCAP_IS2_ACT_MASK_MODE]		= {  5,  2},</div><div class='add'>+	[VCAP_IS2_ACT_MIRROR_ENA]		= {  7,  1},</div><div class='add'>+	[VCAP_IS2_ACT_LRN_DIS]			= {  8,  1},</div><div class='add'>+	[VCAP_IS2_ACT_POLICE_ENA]		= {  9,  1},</div><div class='add'>+	[VCAP_IS2_ACT_POLICE_IDX]		= { 10,  9},</div><div class='add'>+	[VCAP_IS2_ACT_POLICE_VCAP_ONLY]		= { 19,  1},</div><div class='add'>+	[VCAP_IS2_ACT_PORT_MASK]		= { 20,  6},</div><div class='add'>+	[VCAP_IS2_ACT_REW_OP]			= { 26,  9},</div><div class='add'>+	[VCAP_IS2_ACT_SMAC_REPLACE_ENA]		= { 35,  1},</div><div class='add'>+	[VCAP_IS2_ACT_RSV]			= { 36,  2},</div><div class='add'>+	[VCAP_IS2_ACT_ACL_ID]			= { 38,  6},</div><div class='add'>+	[VCAP_IS2_ACT_HIT_CNT]			= { 44, 32},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct vcap_props vsc9959_vcap_props[] = {</div><div class='add'>+	[VCAP_ES0] = {</div><div class='add'>+		.action_type_width = 0,</div><div class='add'>+		.action_table = {</div><div class='add'>+			[ES0_ACTION_TYPE_NORMAL] = {</div><div class='add'>+				.width = 72, /* HIT_STICKY not included */</div><div class='add'>+				.count = 1,</div><div class='add'>+			},</div><div class='add'>+		},</div><div class='add'>+		.target = S0,</div><div class='add'>+		.keys = vsc9959_vcap_es0_keys,</div><div class='add'>+		.actions = vsc9959_vcap_es0_actions,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_IS1] = {</div><div class='add'>+		.action_type_width = 0,</div><div class='add'>+		.action_table = {</div><div class='add'>+			[IS1_ACTION_TYPE_NORMAL] = {</div><div class='add'>+				.width = 78, /* HIT_STICKY not included */</div><div class='add'>+				.count = 4,</div><div class='add'>+			},</div><div class='add'>+		},</div><div class='add'>+		.target = S1,</div><div class='add'>+		.keys = vsc9959_vcap_is1_keys,</div><div class='add'>+		.actions = vsc9959_vcap_is1_actions,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_IS2] = {</div><div class='add'>+		.action_type_width = 1,</div><div class='add'>+		.action_table = {</div><div class='add'>+			[IS2_ACTION_TYPE_NORMAL] = {</div><div class='add'>+				.width = 44,</div><div class='add'>+				.count = 2</div><div class='add'>+			},</div><div class='add'>+			[IS2_ACTION_TYPE_SMAC_SIP] = {</div><div class='add'>+				.width = 6,</div><div class='add'>+				.count = 4</div><div class='add'>+			},</div><div class='add'>+		},</div><div class='add'>+		.target = S2,</div><div class='add'>+		.keys = vsc9959_vcap_is2_keys,</div><div class='add'>+		.actions = vsc9959_vcap_is2_actions,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ptp_clock_info vsc9959_ptp_caps = {</div><div class='add'>+	.owner		= THIS_MODULE,</div><div class='add'>+	.name		= "felix ptp",</div><div class='add'>+	.max_adj	= 0x7fffffff,</div><div class='add'>+	.n_alarm	= 0,</div><div class='add'>+	.n_ext_ts	= 0,</div><div class='add'>+	.n_per_out	= OCELOT_PTP_PINS_NUM,</div><div class='add'>+	.n_pins		= OCELOT_PTP_PINS_NUM,</div><div class='add'>+	.pps		= 0,</div><div class='add'>+	.gettime64	= ocelot_ptp_gettime64,</div><div class='add'>+	.settime64	= ocelot_ptp_settime64,</div><div class='add'>+	.adjtime	= ocelot_ptp_adjtime,</div><div class='add'>+	.adjfine	= ocelot_ptp_adjfine,</div><div class='add'>+	.verify		= ocelot_ptp_verify,</div><div class='add'>+	.enable		= ocelot_ptp_enable,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define VSC9959_INIT_TIMEOUT			50000</div><div class='add'>+#define VSC9959_GCB_RST_SLEEP			100</div><div class='add'>+#define VSC9959_SYS_RAMINIT_SLEEP		80</div><div class='add'>+</div><div class='add'>+static int vsc9959_gcb_soft_rst_status(struct ocelot *ocelot)</div><div class='add'>+{</div><div class='add'>+	int val;</div><div class='add'>+</div><div class='add'>+	ocelot_field_read(ocelot, GCB_SOFT_RST_SWC_RST, &amp;val);</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc9959_sys_ram_init_status(struct ocelot *ocelot)</div><div class='add'>+{</div><div class='add'>+	return ocelot_read(ocelot, SYS_RAM_INIT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* CORE_ENA is in SYS:SYSTEM:RESET_CFG</div><div class='add'>+ * RAM_INIT is in SYS:RAM_CTRL:RAM_INIT</div><div class='add'>+ */</div><div class='add'>+static int vsc9959_reset(struct ocelot *ocelot)</div><div class='add'>+{</div><div class='add'>+	int val, err;</div><div class='add'>+</div><div class='add'>+	/* soft-reset the switch core */</div><div class='add'>+	ocelot_field_write(ocelot, GCB_SOFT_RST_SWC_RST, 1);</div><div class='add'>+</div><div class='add'>+	err = readx_poll_timeout(vsc9959_gcb_soft_rst_status, ocelot, val, !val,</div><div class='add'>+				 VSC9959_GCB_RST_SLEEP, VSC9959_INIT_TIMEOUT);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(ocelot-&gt;dev, "timeout: switch core reset\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* initialize switch mem ~40us */</div><div class='add'>+	ocelot_write(ocelot, SYS_RAM_INIT_RAM_INIT, SYS_RAM_INIT);</div><div class='add'>+	err = readx_poll_timeout(vsc9959_sys_ram_init_status, ocelot, val, !val,</div><div class='add'>+				 VSC9959_SYS_RAMINIT_SLEEP,</div><div class='add'>+				 VSC9959_INIT_TIMEOUT);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(ocelot-&gt;dev, "timeout: switch sram init\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* enable switch core */</div><div class='add'>+	ocelot_field_write(ocelot, SYS_RESET_CFG_CORE_ENA, 1);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Watermark encode</div><div class='add'>+ * Bit 8:   Unit; 0:1, 1:16</div><div class='add'>+ * Bit 7-0: Value to be multiplied with unit</div><div class='add'>+ */</div><div class='add'>+static u16 vsc9959_wm_enc(u16 value)</div><div class='add'>+{</div><div class='add'>+	WARN_ON(value &gt;= 16 * BIT(8));</div><div class='add'>+</div><div class='add'>+	if (value &gt;= BIT(8))</div><div class='add'>+		return BIT(8) | (value / 16);</div><div class='add'>+</div><div class='add'>+	return value;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 vsc9959_wm_dec(u16 wm)</div><div class='add'>+{</div><div class='add'>+	WARN_ON(wm &amp; ~GENMASK(8, 0));</div><div class='add'>+</div><div class='add'>+	if (wm &amp; BIT(8))</div><div class='add'>+		return (wm &amp; GENMASK(7, 0)) * 16;</div><div class='add'>+</div><div class='add'>+	return wm;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vsc9959_wm_stat(u32 val, u32 *inuse, u32 *maxuse)</div><div class='add'>+{</div><div class='add'>+	*inuse = (val &amp; GENMASK(23, 12)) &gt;&gt; 12;</div><div class='add'>+	*maxuse = val &amp; GENMASK(11, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc9959_mdio_bus_alloc(struct ocelot *ocelot)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = to_pci_dev(ocelot-&gt;dev);</div><div class='add'>+	struct felix *felix = ocelot_to_felix(ocelot);</div><div class='add'>+	struct enetc_mdio_priv *mdio_priv;</div><div class='add'>+	struct device *dev = ocelot-&gt;dev;</div><div class='add'>+	resource_size_t imdio_base;</div><div class='add'>+	void __iomem *imdio_regs;</div><div class='add'>+	struct resource res;</div><div class='add'>+	struct enetc_hw *hw;</div><div class='add'>+	struct mii_bus *bus;</div><div class='add'>+	int port;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	felix-&gt;pcs = devm_kcalloc(dev, felix-&gt;info-&gt;num_ports,</div><div class='add'>+				  sizeof(struct phylink_pcs *),</div><div class='add'>+				  GFP_KERNEL);</div><div class='add'>+	if (!felix-&gt;pcs) {</div><div class='add'>+		dev_err(dev, "failed to allocate array for PCS PHYs\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	imdio_base = pci_resource_start(pdev, VSC9959_IMDIO_PCI_BAR);</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;res, &amp;vsc9959_imdio_res, sizeof(res));</div><div class='add'>+	res.start += imdio_base;</div><div class='add'>+	res.end += imdio_base;</div><div class='add'>+</div><div class='add'>+	imdio_regs = devm_ioremap_resource(dev, &amp;res);</div><div class='add'>+	if (IS_ERR(imdio_regs))</div><div class='add'>+		return PTR_ERR(imdio_regs);</div><div class='add'>+</div><div class='add'>+	hw = enetc_hw_alloc(dev, imdio_regs);</div><div class='add'>+	if (IS_ERR(hw)) {</div><div class='add'>+		dev_err(dev, "failed to allocate ENETC HW structure\n");</div><div class='add'>+		return PTR_ERR(hw);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bus = mdiobus_alloc_size(sizeof(*mdio_priv));</div><div class='add'>+	if (!bus)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	bus-&gt;name = "VSC9959 internal MDIO bus";</div><div class='add'>+	bus-&gt;read = enetc_mdio_read_c22;</div><div class='add'>+	bus-&gt;write = enetc_mdio_write_c22;</div><div class='add'>+	bus-&gt;read_c45 = enetc_mdio_read_c45;</div><div class='add'>+	bus-&gt;write_c45 = enetc_mdio_write_c45;</div><div class='add'>+	bus-&gt;parent = dev;</div><div class='add'>+	mdio_priv = bus-&gt;priv;</div><div class='add'>+	mdio_priv-&gt;hw = hw;</div><div class='add'>+	/* This gets added to imdio_regs, which already maps addresses</div><div class='add'>+	 * starting with the proper offset.</div><div class='add'>+	 */</div><div class='add'>+	mdio_priv-&gt;mdio_base = 0;</div><div class='add'>+	snprintf(bus-&gt;id, MII_BUS_ID_SIZE, "%s-imdio", dev_name(dev));</div><div class='add'>+</div><div class='add'>+	/* Needed in order to initialize the bus mutex lock */</div><div class='add'>+	rc = mdiobus_register(bus);</div><div class='add'>+	if (rc &lt; 0) {</div><div class='add'>+		dev_err(dev, "failed to register MDIO bus\n");</div><div class='add'>+		mdiobus_free(bus);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	felix-&gt;imdio = bus;</div><div class='add'>+</div><div class='add'>+	for (port = 0; port &lt; felix-&gt;info-&gt;num_ports; port++) {</div><div class='add'>+		struct ocelot_port *ocelot_port = ocelot-&gt;ports[port];</div><div class='add'>+		struct phylink_pcs *phylink_pcs;</div><div class='add'>+</div><div class='add'>+		if (dsa_is_unused_port(felix-&gt;ds, port))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (ocelot_port-&gt;phy_mode == PHY_INTERFACE_MODE_INTERNAL)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		phylink_pcs = lynx_pcs_create_mdiodev(felix-&gt;imdio, port);</div><div class='add'>+		if (IS_ERR(phylink_pcs))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		felix-&gt;pcs[port] = phylink_pcs;</div><div class='add'>+</div><div class='add'>+		dev_info(dev, "Found PCS at internal MDIO address %d\n", port);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vsc9959_mdio_bus_free(struct ocelot *ocelot)</div><div class='add'>+{</div><div class='add'>+	struct felix *felix = ocelot_to_felix(ocelot);</div><div class='add'>+	int port;</div><div class='add'>+</div><div class='add'>+	for (port = 0; port &lt; ocelot-&gt;num_phys_ports; port++) {</div><div class='add'>+		struct phylink_pcs *phylink_pcs = felix-&gt;pcs[port];</div><div class='add'>+</div><div class='add'>+		if (phylink_pcs)</div><div class='add'>+			lynx_pcs_destroy(phylink_pcs);</div><div class='add'>+	}</div><div class='add'>+	mdiobus_unregister(felix-&gt;imdio);</div><div class='add'>+	mdiobus_free(felix-&gt;imdio);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The switch considers any frame (regardless of size) as eligible</div><div class='add'>+ * for transmission if the traffic class gate is open for at least</div><div class='add'>+ * VSC9959_TAS_MIN_GATE_LEN_NS.</div><div class='add'>+ *</div><div class='add'>+ * Overruns are prevented by cropping an interval at the end of the gate time</div><div class='add'>+ * slot for which egress scheduling is blocked, but we need to still keep</div><div class='add'>+ * VSC9959_TAS_MIN_GATE_LEN_NS available for one packet to be transmitted,</div><div class='add'>+ * otherwise the port tc will hang.</div><div class='add'>+ *</div><div class='add'>+ * This function returns the size of a gate interval that remains available for</div><div class='add'>+ * setting the guard band, after reserving the space for one egress frame.</div><div class='add'>+ */</div><div class='add'>+static u64 vsc9959_tas_remaining_gate_len_ps(u64 gate_len_ns)</div><div class='add'>+{</div><div class='add'>+	/* Gate always open */</div><div class='add'>+	if (gate_len_ns == U64_MAX)</div><div class='add'>+		return U64_MAX;</div><div class='add'>+</div><div class='add'>+	if (gate_len_ns &lt; VSC9959_TAS_MIN_GATE_LEN_NS)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return (gate_len_ns - VSC9959_TAS_MIN_GATE_LEN_NS) * PSEC_PER_NSEC;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Extract shortest continuous gate open intervals in ns for each traffic class</div><div class='add'>+ * of a cyclic tc-taprio schedule. If a gate is always open, the duration is</div><div class='add'>+ * considered U64_MAX. If the gate is always closed, it is considered 0.</div><div class='add'>+ */</div><div class='add'>+static void vsc9959_tas_min_gate_lengths(struct tc_taprio_qopt_offload *taprio,</div><div class='add'>+					 u64 min_gate_len[OCELOT_NUM_TC])</div><div class='add'>+{</div><div class='add'>+	struct tc_taprio_sched_entry *entry;</div><div class='add'>+	u64 gate_len[OCELOT_NUM_TC];</div><div class='add'>+	u8 gates_ever_opened = 0;</div><div class='add'>+	int tc, i, n;</div><div class='add'>+</div><div class='add'>+	/* Initialize arrays */</div><div class='add'>+	for (tc = 0; tc &lt; OCELOT_NUM_TC; tc++) {</div><div class='add'>+		min_gate_len[tc] = U64_MAX;</div><div class='add'>+		gate_len[tc] = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* If we don't have taprio, consider all gates as permanently open */</div><div class='add'>+	if (!taprio)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	n = taprio-&gt;num_entries;</div><div class='add'>+</div><div class='add'>+	/* Walk through the gate list twice to determine the length</div><div class='add'>+	 * of consecutively open gates for a traffic class, including</div><div class='add'>+	 * open gates that wrap around. We are just interested in the</div><div class='add'>+	 * minimum window size, and this doesn't change what the</div><div class='add'>+	 * minimum is (if the gate never closes, min_gate_len will</div><div class='add'>+	 * remain U64_MAX).</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; 2 * n; i++) {</div><div class='add'>+		entry = &amp;taprio-&gt;entries[i % n];</div><div class='add'>+</div><div class='add'>+		for (tc = 0; tc &lt; OCELOT_NUM_TC; tc++) {</div><div class='add'>+			if (entry-&gt;gate_mask &amp; BIT(tc)) {</div><div class='add'>+				gate_len[tc] += entry-&gt;interval;</div><div class='add'>+				gates_ever_opened |= BIT(tc);</div><div class='add'>+			} else {</div><div class='add'>+				/* Gate closes now, record a potential new</div><div class='add'>+				 * minimum and reinitialize length</div><div class='add'>+				 */</div><div class='add'>+				if (min_gate_len[tc] &gt; gate_len[tc] &amp;&amp;</div><div class='add'>+				    gate_len[tc])</div><div class='add'>+					min_gate_len[tc] = gate_len[tc];</div><div class='add'>+				gate_len[tc] = 0;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* min_gate_len[tc] actually tracks minimum *open* gate time, so for</div><div class='add'>+	 * permanently closed gates, min_gate_len[tc] will still be U64_MAX.</div><div class='add'>+	 * Therefore they are currently indistinguishable from permanently</div><div class='add'>+	 * open gates. Overwrite the gate len with 0 when we know they're</div><div class='add'>+	 * actually permanently closed, i.e. after the loop above.</div><div class='add'>+	 */</div><div class='add'>+	for (tc = 0; tc &lt; OCELOT_NUM_TC; tc++)</div><div class='add'>+		if (!(gates_ever_opened &amp; BIT(tc)))</div><div class='add'>+			min_gate_len[tc] = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ocelot_write_rix is a macro that concatenates QSYS_MAXSDU_CFG_* with _RSZ,</div><div class='add'>+ * so we need to spell out the register access to each traffic class in helper</div><div class='add'>+ * functions, to simplify callers</div><div class='add'>+ */</div><div class='add'>+static void vsc9959_port_qmaxsdu_set(struct ocelot *ocelot, int port, int tc,</div><div class='add'>+				     u32 max_sdu)</div><div class='add'>+{</div><div class='add'>+	switch (tc) {</div><div class='add'>+	case 0:</div><div class='add'>+		ocelot_write_rix(ocelot, max_sdu, QSYS_QMAXSDU_CFG_0,</div><div class='add'>+				 port);</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		ocelot_write_rix(ocelot, max_sdu, QSYS_QMAXSDU_CFG_1,</div><div class='add'>+				 port);</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		ocelot_write_rix(ocelot, max_sdu, QSYS_QMAXSDU_CFG_2,</div><div class='add'>+				 port);</div><div class='add'>+		break;</div><div class='add'>+	case 3:</div><div class='add'>+		ocelot_write_rix(ocelot, max_sdu, QSYS_QMAXSDU_CFG_3,</div><div class='add'>+				 port);</div><div class='add'>+		break;</div><div class='add'>+	case 4:</div><div class='add'>+		ocelot_write_rix(ocelot, max_sdu, QSYS_QMAXSDU_CFG_4,</div><div class='add'>+				 port);</div><div class='add'>+		break;</div><div class='add'>+	case 5:</div><div class='add'>+		ocelot_write_rix(ocelot, max_sdu, QSYS_QMAXSDU_CFG_5,</div><div class='add'>+				 port);</div><div class='add'>+		break;</div><div class='add'>+	case 6:</div><div class='add'>+		ocelot_write_rix(ocelot, max_sdu, QSYS_QMAXSDU_CFG_6,</div><div class='add'>+				 port);</div><div class='add'>+		break;</div><div class='add'>+	case 7:</div><div class='add'>+		ocelot_write_rix(ocelot, max_sdu, QSYS_QMAXSDU_CFG_7,</div><div class='add'>+				 port);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 vsc9959_port_qmaxsdu_get(struct ocelot *ocelot, int port, int tc)</div><div class='add'>+{</div><div class='add'>+	switch (tc) {</div><div class='add'>+	case 0: return ocelot_read_rix(ocelot, QSYS_QMAXSDU_CFG_0, port);</div><div class='add'>+	case 1: return ocelot_read_rix(ocelot, QSYS_QMAXSDU_CFG_1, port);</div><div class='add'>+	case 2: return ocelot_read_rix(ocelot, QSYS_QMAXSDU_CFG_2, port);</div><div class='add'>+	case 3: return ocelot_read_rix(ocelot, QSYS_QMAXSDU_CFG_3, port);</div><div class='add'>+	case 4: return ocelot_read_rix(ocelot, QSYS_QMAXSDU_CFG_4, port);</div><div class='add'>+	case 5: return ocelot_read_rix(ocelot, QSYS_QMAXSDU_CFG_5, port);</div><div class='add'>+	case 6: return ocelot_read_rix(ocelot, QSYS_QMAXSDU_CFG_6, port);</div><div class='add'>+	case 7: return ocelot_read_rix(ocelot, QSYS_QMAXSDU_CFG_7, port);</div><div class='add'>+	default:</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 vsc9959_tas_tc_max_sdu(struct tc_taprio_qopt_offload *taprio, int tc)</div><div class='add'>+{</div><div class='add'>+	if (!taprio || !taprio-&gt;max_sdu[tc])</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return taprio-&gt;max_sdu[tc] + ETH_HLEN + 2 * VLAN_HLEN + ETH_FCS_LEN;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Update QSYS_PORT_MAX_SDU to make sure the static guard bands added by the</div><div class='add'>+ * switch (see the ALWAYS_GUARD_BAND_SCH_Q comment) are correct at all MTU</div><div class='add'>+ * values (the default value is 1518). Also, for traffic class windows smaller</div><div class='add'>+ * than one MTU sized frame, update QSYS_QMAXSDU_CFG to enable oversized frame</div><div class='add'>+ * dropping, such that these won't hang the port, as they will never be sent.</div><div class='add'>+ */</div><div class='add'>+static void vsc9959_tas_guard_bands_update(struct ocelot *ocelot, int port)</div><div class='add'>+{</div><div class='add'>+	struct ocelot_port *ocelot_port = ocelot-&gt;ports[port];</div><div class='add'>+	struct ocelot_mm_state *mm = &amp;ocelot-&gt;mm[port];</div><div class='add'>+	struct tc_taprio_qopt_offload *taprio;</div><div class='add'>+	u64 min_gate_len[OCELOT_NUM_TC];</div><div class='add'>+	u32 val, maxlen, add_frag_size;</div><div class='add'>+	u64 needed_min_frag_time_ps;</div><div class='add'>+	int speed, picos_per_byte;</div><div class='add'>+	u64 needed_bit_time_ps;</div><div class='add'>+	u8 tas_speed;</div><div class='add'>+	int tc;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;ocelot-&gt;fwd_domain_lock);</div><div class='add'>+</div><div class='add'>+	taprio = ocelot_port-&gt;taprio;</div><div class='add'>+</div><div class='add'>+	val = ocelot_read_rix(ocelot, QSYS_TAG_CONFIG, port);</div><div class='add'>+	tas_speed = QSYS_TAG_CONFIG_LINK_SPEED_X(val);</div><div class='add'>+</div><div class='add'>+	switch (tas_speed) {</div><div class='add'>+	case OCELOT_SPEED_10:</div><div class='add'>+		speed = SPEED_10;</div><div class='add'>+		break;</div><div class='add'>+	case OCELOT_SPEED_100:</div><div class='add'>+		speed = SPEED_100;</div><div class='add'>+		break;</div><div class='add'>+	case OCELOT_SPEED_1000:</div><div class='add'>+		speed = SPEED_1000;</div><div class='add'>+		break;</div><div class='add'>+	case OCELOT_SPEED_2500:</div><div class='add'>+		speed = SPEED_2500;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	picos_per_byte = (USEC_PER_SEC * 8) / speed;</div><div class='add'>+</div><div class='add'>+	val = ocelot_port_readl(ocelot_port, DEV_MAC_MAXLEN_CFG);</div><div class='add'>+	/* MAXLEN_CFG accounts automatically for VLAN. We need to include it</div><div class='add'>+	 * manually in the bit time calculation, plus the preamble and SFD.</div><div class='add'>+	 */</div><div class='add'>+	maxlen = val + 2 * VLAN_HLEN;</div><div class='add'>+	/* Consider the standard Ethernet overhead of 8 octets preamble+SFD,</div><div class='add'>+	 * 4 octets FCS, 12 octets IFG.</div><div class='add'>+	 */</div><div class='add'>+	needed_bit_time_ps = (u64)(maxlen + 24) * picos_per_byte;</div><div class='add'>+</div><div class='add'>+	/* Preemptible TCs don't need to pass a full MTU, the port will</div><div class='add'>+	 * automatically emit a HOLD request when a preemptible TC gate closes</div><div class='add'>+	 */</div><div class='add'>+	val = ocelot_read_rix(ocelot, QSYS_PREEMPTION_CFG, port);</div><div class='add'>+	add_frag_size = QSYS_PREEMPTION_CFG_MM_ADD_FRAG_SIZE_X(val);</div><div class='add'>+	needed_min_frag_time_ps = picos_per_byte *</div><div class='add'>+		(u64)(24 + 2 * ethtool_mm_frag_size_add_to_min(add_frag_size));</div><div class='add'>+</div><div class='add'>+	dev_dbg(ocelot-&gt;dev,</div><div class='add'>+		"port %d: max frame size %d needs %llu ps, %llu ps for mPackets at speed %d\n",</div><div class='add'>+		port, maxlen, needed_bit_time_ps, needed_min_frag_time_ps,</div><div class='add'>+		speed);</div><div class='add'>+</div><div class='add'>+	vsc9959_tas_min_gate_lengths(taprio, min_gate_len);</div><div class='add'>+</div><div class='add'>+	for (tc = 0; tc &lt; OCELOT_NUM_TC; tc++) {</div><div class='add'>+		u32 requested_max_sdu = vsc9959_tas_tc_max_sdu(taprio, tc);</div><div class='add'>+		u64 remaining_gate_len_ps;</div><div class='add'>+		u32 max_sdu;</div><div class='add'>+</div><div class='add'>+		remaining_gate_len_ps =</div><div class='add'>+			vsc9959_tas_remaining_gate_len_ps(min_gate_len[tc]);</div><div class='add'>+</div><div class='add'>+		if ((mm-&gt;active_preemptible_tcs &amp; BIT(tc)) ?</div><div class='add'>+		    remaining_gate_len_ps &gt; needed_min_frag_time_ps :</div><div class='add'>+		    remaining_gate_len_ps &gt; needed_bit_time_ps) {</div><div class='add'>+			/* Setting QMAXSDU_CFG to 0 disables oversized frame</div><div class='add'>+			 * dropping.</div><div class='add'>+			 */</div><div class='add'>+			max_sdu = requested_max_sdu;</div><div class='add'>+			dev_dbg(ocelot-&gt;dev,</div><div class='add'>+				"port %d tc %d min gate len %llu"</div><div class='add'>+				", sending all frames\n",</div><div class='add'>+				port, tc, min_gate_len[tc]);</div><div class='add'>+		} else {</div><div class='add'>+			/* If traffic class doesn't support a full MTU sized</div><div class='add'>+			 * frame, make sure to enable oversize frame dropping</div><div class='add'>+			 * for frames larger than the smallest that would fit.</div><div class='add'>+			 *</div><div class='add'>+			 * However, the exact same register, QSYS_QMAXSDU_CFG_*,</div><div class='add'>+			 * controls not only oversized frame dropping, but also</div><div class='add'>+			 * per-tc static guard band lengths, so it reduces the</div><div class='add'>+			 * useful gate interval length. Therefore, be careful</div><div class='add'>+			 * to calculate a guard band (and therefore max_sdu)</div><div class='add'>+			 * that still leaves VSC9959_TAS_MIN_GATE_LEN_NS</div><div class='add'>+			 * available in the time slot.</div><div class='add'>+			 */</div><div class='add'>+			max_sdu = div_u64(remaining_gate_len_ps, picos_per_byte);</div><div class='add'>+			/* A TC gate may be completely closed, which is a</div><div class='add'>+			 * special case where all packets are oversized.</div><div class='add'>+			 * Any limit smaller than 64 octets accomplishes this</div><div class='add'>+			 */</div><div class='add'>+			if (!max_sdu)</div><div class='add'>+				max_sdu = 1;</div><div class='add'>+			/* Take L1 overhead into account, but just don't allow</div><div class='add'>+			 * max_sdu to go negative or to 0. Here we use 20</div><div class='add'>+			 * because QSYS_MAXSDU_CFG_* already counts the 4 FCS</div><div class='add'>+			 * octets as part of packet size.</div><div class='add'>+			 */</div><div class='add'>+			if (max_sdu &gt; 20)</div><div class='add'>+				max_sdu -= 20;</div><div class='add'>+</div><div class='add'>+			if (requested_max_sdu &amp;&amp; requested_max_sdu &lt; max_sdu)</div><div class='add'>+				max_sdu = requested_max_sdu;</div><div class='add'>+</div><div class='add'>+			dev_info(ocelot-&gt;dev,</div><div class='add'>+				 "port %d tc %d min gate length %llu"</div><div class='add'>+				 " ns not enough for max frame size %d at %d"</div><div class='add'>+				 " Mbps, dropping frames over %d"</div><div class='add'>+				 " octets including FCS\n",</div><div class='add'>+				 port, tc, min_gate_len[tc], maxlen, speed,</div><div class='add'>+				 max_sdu);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		vsc9959_port_qmaxsdu_set(ocelot, port, tc, max_sdu);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ocelot_write_rix(ocelot, maxlen, QSYS_PORT_MAX_SDU, port);</div><div class='add'>+</div><div class='add'>+	ocelot-&gt;ops-&gt;cut_through_fwd(ocelot);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vsc9959_sched_speed_set(struct ocelot *ocelot, int port,</div><div class='add'>+				    u32 speed)</div><div class='add'>+{</div><div class='add'>+	struct ocelot_port *ocelot_port = ocelot-&gt;ports[port];</div><div class='add'>+	u8 tas_speed;</div><div class='add'>+</div><div class='add'>+	switch (speed) {</div><div class='add'>+	case SPEED_10:</div><div class='add'>+		tas_speed = OCELOT_SPEED_10;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_100:</div><div class='add'>+		tas_speed = OCELOT_SPEED_100;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_1000:</div><div class='add'>+		tas_speed = OCELOT_SPEED_1000;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_2500:</div><div class='add'>+		tas_speed = OCELOT_SPEED_2500;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		tas_speed = OCELOT_SPEED_1000;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ocelot-&gt;fwd_domain_lock);</div><div class='add'>+</div><div class='add'>+	ocelot_rmw_rix(ocelot,</div><div class='add'>+		       QSYS_TAG_CONFIG_LINK_SPEED(tas_speed),</div><div class='add'>+		       QSYS_TAG_CONFIG_LINK_SPEED_M,</div><div class='add'>+		       QSYS_TAG_CONFIG, port);</div><div class='add'>+</div><div class='add'>+	if (ocelot_port-&gt;taprio)</div><div class='add'>+		vsc9959_tas_guard_bands_update(ocelot, port);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;ocelot-&gt;fwd_domain_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vsc9959_new_base_time(struct ocelot *ocelot, ktime_t base_time,</div><div class='add'>+				  u64 cycle_time,</div><div class='add'>+				  struct timespec64 *new_base_ts)</div><div class='add'>+{</div><div class='add'>+	struct timespec64 ts;</div><div class='add'>+	ktime_t new_base_time;</div><div class='add'>+	ktime_t current_time;</div><div class='add'>+</div><div class='add'>+	ocelot_ptp_gettime64(&amp;ocelot-&gt;ptp_info, &amp;ts);</div><div class='add'>+	current_time = timespec64_to_ktime(ts);</div><div class='add'>+	new_base_time = base_time;</div><div class='add'>+</div><div class='add'>+	if (base_time &lt; current_time) {</div><div class='add'>+		u64 nr_of_cycles = current_time - base_time;</div><div class='add'>+</div><div class='add'>+		do_div(nr_of_cycles, cycle_time);</div><div class='add'>+		new_base_time += cycle_time * (nr_of_cycles + 1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*new_base_ts = ktime_to_timespec64(new_base_time);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 vsc9959_tas_read_cfg_status(struct ocelot *ocelot)</div><div class='add'>+{</div><div class='add'>+	return ocelot_read(ocelot, QSYS_TAS_PARAM_CFG_CTRL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vsc9959_tas_gcl_set(struct ocelot *ocelot, const u32 gcl_ix,</div><div class='add'>+				struct tc_taprio_sched_entry *entry)</div><div class='add'>+{</div><div class='add'>+	ocelot_write(ocelot,</div><div class='add'>+		     QSYS_GCL_CFG_REG_1_GCL_ENTRY_NUM(gcl_ix) |</div><div class='add'>+		     QSYS_GCL_CFG_REG_1_GATE_STATE(entry-&gt;gate_mask),</div><div class='add'>+		     QSYS_GCL_CFG_REG_1);</div><div class='add'>+	ocelot_write(ocelot, entry-&gt;interval, QSYS_GCL_CFG_REG_2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc9959_qos_port_tas_set(struct ocelot *ocelot, int port,</div><div class='add'>+				    struct tc_taprio_qopt_offload *taprio)</div><div class='add'>+{</div><div class='add'>+	struct ocelot_port *ocelot_port = ocelot-&gt;ports[port];</div><div class='add'>+	struct timespec64 base_ts;</div><div class='add'>+	int ret, i;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ocelot-&gt;fwd_domain_lock);</div><div class='add'>+</div><div class='add'>+	if (taprio-&gt;cmd == TAPRIO_CMD_DESTROY) {</div><div class='add'>+		ocelot_port_mqprio(ocelot, port, &amp;taprio-&gt;mqprio);</div><div class='add'>+		ocelot_rmw_rix(ocelot, 0, QSYS_TAG_CONFIG_ENABLE,</div><div class='add'>+			       QSYS_TAG_CONFIG, port);</div><div class='add'>+</div><div class='add'>+		taprio_offload_free(ocelot_port-&gt;taprio);</div><div class='add'>+		ocelot_port-&gt;taprio = NULL;</div><div class='add'>+</div><div class='add'>+		vsc9959_tas_guard_bands_update(ocelot, port);</div><div class='add'>+</div><div class='add'>+		mutex_unlock(&amp;ocelot-&gt;fwd_domain_lock);</div><div class='add'>+		return 0;</div><div class='add'>+	} else if (taprio-&gt;cmd != TAPRIO_CMD_REPLACE) {</div><div class='add'>+		ret = -EOPNOTSUPP;</div><div class='add'>+		goto err_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ocelot_port_mqprio(ocelot, port, &amp;taprio-&gt;mqprio);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_unlock;</div><div class='add'>+</div><div class='add'>+	if (taprio-&gt;cycle_time &gt; NSEC_PER_SEC ||</div><div class='add'>+	    taprio-&gt;cycle_time_extension &gt;= NSEC_PER_SEC) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto err_reset_tc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (taprio-&gt;num_entries &gt; VSC9959_TAS_GCL_ENTRY_MAX) {</div><div class='add'>+		ret = -ERANGE;</div><div class='add'>+		goto err_reset_tc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Enable guard band. The switch will schedule frames without taking</div><div class='add'>+	 * their length into account. Thus we'll always need to enable the</div><div class='add'>+	 * guard band which reserves the time of a maximum sized frame at the</div><div class='add'>+	 * end of the time window.</div><div class='add'>+	 *</div><div class='add'>+	 * Although the ALWAYS_GUARD_BAND_SCH_Q bit is global for all ports, we</div><div class='add'>+	 * need to set PORT_NUM, because subsequent writes to PARAM_CFG_REG_n</div><div class='add'>+	 * operate on the port number.</div><div class='add'>+	 */</div><div class='add'>+	ocelot_rmw(ocelot, QSYS_TAS_PARAM_CFG_CTRL_PORT_NUM(port) |</div><div class='add'>+		   QSYS_TAS_PARAM_CFG_CTRL_ALWAYS_GUARD_BAND_SCH_Q,</div><div class='add'>+		   QSYS_TAS_PARAM_CFG_CTRL_PORT_NUM_M |</div><div class='add'>+		   QSYS_TAS_PARAM_CFG_CTRL_ALWAYS_GUARD_BAND_SCH_Q,</div><div class='add'>+		   QSYS_TAS_PARAM_CFG_CTRL);</div><div class='add'>+</div><div class='add'>+	/* Hardware errata -  Admin config could not be overwritten if</div><div class='add'>+	 * config is pending, need reset the TAS module</div><div class='add'>+	 */</div><div class='add'>+	val = ocelot_read_rix(ocelot, QSYS_TAG_CONFIG, port);</div><div class='add'>+	if (val &amp; QSYS_TAG_CONFIG_ENABLE) {</div><div class='add'>+		val = ocelot_read(ocelot, QSYS_PARAM_STATUS_REG_8);</div><div class='add'>+		if (val &amp; QSYS_PARAM_STATUS_REG_8_CONFIG_PENDING) {</div><div class='add'>+			ret = -EBUSY;</div><div class='add'>+			goto err_reset_tc;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ocelot_rmw_rix(ocelot,</div><div class='add'>+		       QSYS_TAG_CONFIG_ENABLE |</div><div class='add'>+		       QSYS_TAG_CONFIG_INIT_GATE_STATE(0xFF) |</div><div class='add'>+		       QSYS_TAG_CONFIG_SCH_TRAFFIC_QUEUES(0xFF),</div><div class='add'>+		       QSYS_TAG_CONFIG_ENABLE |</div><div class='add'>+		       QSYS_TAG_CONFIG_INIT_GATE_STATE_M |</div><div class='add'>+		       QSYS_TAG_CONFIG_SCH_TRAFFIC_QUEUES_M,</div><div class='add'>+		       QSYS_TAG_CONFIG, port);</div><div class='add'>+</div><div class='add'>+	vsc9959_new_base_time(ocelot, taprio-&gt;base_time,</div><div class='add'>+			      taprio-&gt;cycle_time, &amp;base_ts);</div><div class='add'>+	ocelot_write(ocelot, base_ts.tv_nsec, QSYS_PARAM_CFG_REG_1);</div><div class='add'>+	ocelot_write(ocelot, lower_32_bits(base_ts.tv_sec), QSYS_PARAM_CFG_REG_2);</div><div class='add'>+	val = upper_32_bits(base_ts.tv_sec);</div><div class='add'>+	ocelot_write(ocelot,</div><div class='add'>+		     QSYS_PARAM_CFG_REG_3_BASE_TIME_SEC_MSB(val) |</div><div class='add'>+		     QSYS_PARAM_CFG_REG_3_LIST_LENGTH(taprio-&gt;num_entries),</div><div class='add'>+		     QSYS_PARAM_CFG_REG_3);</div><div class='add'>+	ocelot_write(ocelot, taprio-&gt;cycle_time, QSYS_PARAM_CFG_REG_4);</div><div class='add'>+	ocelot_write(ocelot, taprio-&gt;cycle_time_extension, QSYS_PARAM_CFG_REG_5);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; taprio-&gt;num_entries; i++)</div><div class='add'>+		vsc9959_tas_gcl_set(ocelot, i, &amp;taprio-&gt;entries[i]);</div><div class='add'>+</div><div class='add'>+	ocelot_rmw(ocelot, QSYS_TAS_PARAM_CFG_CTRL_CONFIG_CHANGE,</div><div class='add'>+		   QSYS_TAS_PARAM_CFG_CTRL_CONFIG_CHANGE,</div><div class='add'>+		   QSYS_TAS_PARAM_CFG_CTRL);</div><div class='add'>+</div><div class='add'>+	ret = readx_poll_timeout(vsc9959_tas_read_cfg_status, ocelot, val,</div><div class='add'>+				 !(val &amp; QSYS_TAS_PARAM_CFG_CTRL_CONFIG_CHANGE),</div><div class='add'>+				 10, 100000);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_reset_tc;</div><div class='add'>+</div><div class='add'>+	ocelot_port-&gt;taprio = taprio_offload_get(taprio);</div><div class='add'>+	vsc9959_tas_guard_bands_update(ocelot, port);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;ocelot-&gt;fwd_domain_lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_reset_tc:</div><div class='add'>+	taprio-&gt;mqprio.qopt.num_tc = 0;</div><div class='add'>+	ocelot_port_mqprio(ocelot, port, &amp;taprio-&gt;mqprio);</div><div class='add'>+err_unlock:</div><div class='add'>+	mutex_unlock(&amp;ocelot-&gt;fwd_domain_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vsc9959_tas_clock_adjust(struct ocelot *ocelot)</div><div class='add'>+{</div><div class='add'>+	struct tc_taprio_qopt_offload *taprio;</div><div class='add'>+	struct ocelot_port *ocelot_port;</div><div class='add'>+	struct timespec64 base_ts;</div><div class='add'>+	int i, port;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ocelot-&gt;fwd_domain_lock);</div><div class='add'>+</div><div class='add'>+	for (port = 0; port &lt; ocelot-&gt;num_phys_ports; port++) {</div><div class='add'>+		ocelot_port = ocelot-&gt;ports[port];</div><div class='add'>+		taprio = ocelot_port-&gt;taprio;</div><div class='add'>+		if (!taprio)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		ocelot_rmw(ocelot,</div><div class='add'>+			   QSYS_TAS_PARAM_CFG_CTRL_PORT_NUM(port),</div><div class='add'>+			   QSYS_TAS_PARAM_CFG_CTRL_PORT_NUM_M,</div><div class='add'>+			   QSYS_TAS_PARAM_CFG_CTRL);</div><div class='add'>+</div><div class='add'>+		/* Disable time-aware shaper */</div><div class='add'>+		ocelot_rmw_rix(ocelot, 0, QSYS_TAG_CONFIG_ENABLE,</div><div class='add'>+			       QSYS_TAG_CONFIG, port);</div><div class='add'>+</div><div class='add'>+		vsc9959_new_base_time(ocelot, taprio-&gt;base_time,</div><div class='add'>+				      taprio-&gt;cycle_time, &amp;base_ts);</div><div class='add'>+</div><div class='add'>+		ocelot_write(ocelot, base_ts.tv_nsec, QSYS_PARAM_CFG_REG_1);</div><div class='add'>+		ocelot_write(ocelot, lower_32_bits(base_ts.tv_sec),</div><div class='add'>+			     QSYS_PARAM_CFG_REG_2);</div><div class='add'>+		val = upper_32_bits(base_ts.tv_sec);</div><div class='add'>+		ocelot_rmw(ocelot,</div><div class='add'>+			   QSYS_PARAM_CFG_REG_3_BASE_TIME_SEC_MSB(val),</div><div class='add'>+			   QSYS_PARAM_CFG_REG_3_BASE_TIME_SEC_MSB_M,</div><div class='add'>+			   QSYS_PARAM_CFG_REG_3);</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; taprio-&gt;num_entries; i++)</div><div class='add'>+			vsc9959_tas_gcl_set(ocelot, i, &amp;taprio-&gt;entries[i]);</div><div class='add'>+</div><div class='add'>+		ocelot_rmw(ocelot, QSYS_TAS_PARAM_CFG_CTRL_CONFIG_CHANGE,</div><div class='add'>+			   QSYS_TAS_PARAM_CFG_CTRL_CONFIG_CHANGE,</div><div class='add'>+			   QSYS_TAS_PARAM_CFG_CTRL);</div><div class='add'>+</div><div class='add'>+		/* Re-enable time-aware shaper */</div><div class='add'>+		ocelot_rmw_rix(ocelot, QSYS_TAG_CONFIG_ENABLE,</div><div class='add'>+			       QSYS_TAG_CONFIG_ENABLE,</div><div class='add'>+			       QSYS_TAG_CONFIG, port);</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;ocelot-&gt;fwd_domain_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc9959_qos_port_cbs_set(struct dsa_switch *ds, int port,</div><div class='add'>+				    struct tc_cbs_qopt_offload *cbs_qopt)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+	int port_ix = port * 8 + cbs_qopt-&gt;queue;</div><div class='add'>+	u32 rate, burst;</div><div class='add'>+</div><div class='add'>+	if (cbs_qopt-&gt;queue &gt;= ds-&gt;num_tx_queues)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!cbs_qopt-&gt;enable) {</div><div class='add'>+		ocelot_write_gix(ocelot, QSYS_CIR_CFG_CIR_RATE(0) |</div><div class='add'>+				 QSYS_CIR_CFG_CIR_BURST(0),</div><div class='add'>+				 QSYS_CIR_CFG, port_ix);</div><div class='add'>+</div><div class='add'>+		ocelot_rmw_gix(ocelot, 0, QSYS_SE_CFG_SE_AVB_ENA,</div><div class='add'>+			       QSYS_SE_CFG, port_ix);</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Rate unit is 100 kbps */</div><div class='add'>+	rate = DIV_ROUND_UP(cbs_qopt-&gt;idleslope, 100);</div><div class='add'>+	/* Avoid using zero rate */</div><div class='add'>+	rate = clamp_t(u32, rate, 1, GENMASK(14, 0));</div><div class='add'>+	/* Burst unit is 4kB */</div><div class='add'>+	burst = DIV_ROUND_UP(cbs_qopt-&gt;hicredit, 4096);</div><div class='add'>+	/* Avoid using zero burst size */</div><div class='add'>+	burst = clamp_t(u32, burst, 1, GENMASK(5, 0));</div><div class='add'>+	ocelot_write_gix(ocelot,</div><div class='add'>+			 QSYS_CIR_CFG_CIR_RATE(rate) |</div><div class='add'>+			 QSYS_CIR_CFG_CIR_BURST(burst),</div><div class='add'>+			 QSYS_CIR_CFG,</div><div class='add'>+			 port_ix);</div><div class='add'>+</div><div class='add'>+	ocelot_rmw_gix(ocelot,</div><div class='add'>+		       QSYS_SE_CFG_SE_FRM_MODE(0) |</div><div class='add'>+		       QSYS_SE_CFG_SE_AVB_ENA,</div><div class='add'>+		       QSYS_SE_CFG_SE_AVB_ENA |</div><div class='add'>+		       QSYS_SE_CFG_SE_FRM_MODE_M,</div><div class='add'>+		       QSYS_SE_CFG,</div><div class='add'>+		       port_ix);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc9959_qos_query_caps(struct tc_query_caps_base *base)</div><div class='add'>+{</div><div class='add'>+	switch (base-&gt;type) {</div><div class='add'>+	case TC_SETUP_QDISC_MQPRIO: {</div><div class='add'>+		struct tc_mqprio_caps *caps = base-&gt;caps;</div><div class='add'>+</div><div class='add'>+		caps-&gt;validate_queue_counts = true;</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	case TC_SETUP_QDISC_TAPRIO: {</div><div class='add'>+		struct tc_taprio_caps *caps = base-&gt;caps;</div><div class='add'>+</div><div class='add'>+		caps-&gt;supports_queue_max_sdu = true;</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc9959_qos_port_mqprio(struct ocelot *ocelot, int port,</div><div class='add'>+				   struct tc_mqprio_qopt_offload *mqprio)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ocelot-&gt;fwd_domain_lock);</div><div class='add'>+	ret = ocelot_port_mqprio(ocelot, port, mqprio);</div><div class='add'>+	mutex_unlock(&amp;ocelot-&gt;fwd_domain_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc9959_port_setup_tc(struct dsa_switch *ds, int port,</div><div class='add'>+				 enum tc_setup_type type,</div><div class='add'>+				 void *type_data)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	switch (type) {</div><div class='add'>+	case TC_QUERY_CAPS:</div><div class='add'>+		return vsc9959_qos_query_caps(type_data);</div><div class='add'>+	case TC_SETUP_QDISC_TAPRIO:</div><div class='add'>+		return vsc9959_qos_port_tas_set(ocelot, port, type_data);</div><div class='add'>+	case TC_SETUP_QDISC_MQPRIO:</div><div class='add'>+		return vsc9959_qos_port_mqprio(ocelot, port, type_data);</div><div class='add'>+	case TC_SETUP_QDISC_CBS:</div><div class='add'>+		return vsc9959_qos_port_cbs_set(ds, port, type_data);</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define VSC9959_PSFP_SFID_MAX			175</div><div class='add'>+#define VSC9959_PSFP_GATE_ID_MAX		183</div><div class='add'>+#define VSC9959_PSFP_POLICER_BASE		63</div><div class='add'>+#define VSC9959_PSFP_POLICER_MAX		383</div><div class='add'>+#define VSC9959_PSFP_GATE_LIST_NUM		4</div><div class='add'>+#define VSC9959_PSFP_GATE_CYCLETIME_MIN		5000</div><div class='add'>+</div><div class='add'>+struct felix_stream {</div><div class='add'>+	struct list_head list;</div><div class='add'>+	unsigned long id;</div><div class='add'>+	bool dummy;</div><div class='add'>+	int ports;</div><div class='add'>+	int port;</div><div class='add'>+	u8 dmac[ETH_ALEN];</div><div class='add'>+	u16 vid;</div><div class='add'>+	s8 prio;</div><div class='add'>+	u8 sfid_valid;</div><div class='add'>+	u8 ssid_valid;</div><div class='add'>+	u32 sfid;</div><div class='add'>+	u32 ssid;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct felix_stream_filter_counters {</div><div class='add'>+	u64 match;</div><div class='add'>+	u64 not_pass_gate;</div><div class='add'>+	u64 not_pass_sdu;</div><div class='add'>+	u64 red;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct felix_stream_filter {</div><div class='add'>+	struct felix_stream_filter_counters stats;</div><div class='add'>+	struct list_head list;</div><div class='add'>+	refcount_t refcount;</div><div class='add'>+	u32 index;</div><div class='add'>+	u8 enable;</div><div class='add'>+	int portmask;</div><div class='add'>+	u8 sg_valid;</div><div class='add'>+	u32 sgid;</div><div class='add'>+	u8 fm_valid;</div><div class='add'>+	u32 fmid;</div><div class='add'>+	u8 prio_valid;</div><div class='add'>+	u8 prio;</div><div class='add'>+	u32 maxsdu;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct felix_stream_gate {</div><div class='add'>+	u32 index;</div><div class='add'>+	u8 enable;</div><div class='add'>+	u8 ipv_valid;</div><div class='add'>+	u8 init_ipv;</div><div class='add'>+	u64 basetime;</div><div class='add'>+	u64 cycletime;</div><div class='add'>+	u64 cycletime_ext;</div><div class='add'>+	u32 num_entries;</div><div class='add'>+	struct action_gate_entry entries[] __counted_by(num_entries);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct felix_stream_gate_entry {</div><div class='add'>+	struct list_head list;</div><div class='add'>+	refcount_t refcount;</div><div class='add'>+	u32 index;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int vsc9959_stream_identify(struct flow_cls_offload *f,</div><div class='add'>+				   struct felix_stream *stream)</div><div class='add'>+{</div><div class='add'>+	struct flow_rule *rule = flow_cls_offload_flow_rule(f);</div><div class='add'>+	struct flow_dissector *dissector = rule-&gt;match.dissector;</div><div class='add'>+</div><div class='add'>+	if (dissector-&gt;used_keys &amp;</div><div class='add'>+	    ~(BIT_ULL(FLOW_DISSECTOR_KEY_CONTROL) |</div><div class='add'>+	      BIT_ULL(FLOW_DISSECTOR_KEY_BASIC) |</div><div class='add'>+	      BIT_ULL(FLOW_DISSECTOR_KEY_VLAN) |</div><div class='add'>+	      BIT_ULL(FLOW_DISSECTOR_KEY_ETH_ADDRS)))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (flow_rule_match_has_control_flags(rule, f-&gt;common.extack))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {</div><div class='add'>+		struct flow_match_eth_addrs match;</div><div class='add'>+</div><div class='add'>+		flow_rule_match_eth_addrs(rule, &amp;match);</div><div class='add'>+		ether_addr_copy(stream-&gt;dmac, match.key-&gt;dst);</div><div class='add'>+		if (!is_zero_ether_addr(match.mask-&gt;src))</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+	} else {</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_VLAN)) {</div><div class='add'>+		struct flow_match_vlan match;</div><div class='add'>+</div><div class='add'>+		flow_rule_match_vlan(rule, &amp;match);</div><div class='add'>+		if (match.mask-&gt;vlan_priority)</div><div class='add'>+			stream-&gt;prio = match.key-&gt;vlan_priority;</div><div class='add'>+		else</div><div class='add'>+			stream-&gt;prio = -1;</div><div class='add'>+</div><div class='add'>+		if (!match.mask-&gt;vlan_id)</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		stream-&gt;vid = match.key-&gt;vlan_id;</div><div class='add'>+	} else {</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	stream-&gt;id = f-&gt;cookie;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc9959_mact_stream_set(struct ocelot *ocelot,</div><div class='add'>+				   struct felix_stream *stream,</div><div class='add'>+				   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	enum macaccess_entry_type type;</div><div class='add'>+	int ret, sfid, ssid;</div><div class='add'>+	u32 vid, dst_idx;</div><div class='add'>+	u8 mac[ETH_ALEN];</div><div class='add'>+</div><div class='add'>+	ether_addr_copy(mac, stream-&gt;dmac);</div><div class='add'>+	vid = stream-&gt;vid;</div><div class='add'>+</div><div class='add'>+	/* Stream identification desn't support to add a stream with non</div><div class='add'>+	 * existent MAC (The MAC entry has not been learned in MAC table).</div><div class='add'>+	 */</div><div class='add'>+	ret = ocelot_mact_lookup(ocelot, &amp;dst_idx, mac, vid, &amp;type);</div><div class='add'>+	if (ret) {</div><div class='add'>+		if (extack)</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack, "Stream is not learned in MAC table");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((stream-&gt;sfid_valid || stream-&gt;ssid_valid) &amp;&amp;</div><div class='add'>+	    type == ENTRYTYPE_NORMAL)</div><div class='add'>+		type = ENTRYTYPE_LOCKED;</div><div class='add'>+</div><div class='add'>+	sfid = stream-&gt;sfid_valid ? stream-&gt;sfid : -1;</div><div class='add'>+	ssid = stream-&gt;ssid_valid ? stream-&gt;ssid : -1;</div><div class='add'>+</div><div class='add'>+	ret = ocelot_mact_learn_streamdata(ocelot, dst_idx, mac, vid, type,</div><div class='add'>+					   sfid, ssid);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct felix_stream *</div><div class='add'>+vsc9959_stream_table_lookup(struct list_head *stream_list,</div><div class='add'>+			    struct felix_stream *stream)</div><div class='add'>+{</div><div class='add'>+	struct felix_stream *tmp;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(tmp, stream_list, list)</div><div class='add'>+		if (ether_addr_equal(tmp-&gt;dmac, stream-&gt;dmac) &amp;&amp;</div><div class='add'>+		    tmp-&gt;vid == stream-&gt;vid)</div><div class='add'>+			return tmp;</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc9959_stream_table_add(struct ocelot *ocelot,</div><div class='add'>+				    struct list_head *stream_list,</div><div class='add'>+				    struct felix_stream *stream,</div><div class='add'>+				    struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct felix_stream *stream_entry;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	stream_entry = kmemdup(stream, sizeof(*stream_entry), GFP_KERNEL);</div><div class='add'>+	if (!stream_entry)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	if (!stream-&gt;dummy) {</div><div class='add'>+		ret = vsc9959_mact_stream_set(ocelot, stream_entry, extack);</div><div class='add'>+		if (ret) {</div><div class='add'>+			kfree(stream_entry);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	list_add_tail(&amp;stream_entry-&gt;list, stream_list);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct felix_stream *</div><div class='add'>+vsc9959_stream_table_get(struct list_head *stream_list, unsigned long id)</div><div class='add'>+{</div><div class='add'>+	struct felix_stream *tmp;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(tmp, stream_list, list)</div><div class='add'>+		if (tmp-&gt;id == id)</div><div class='add'>+			return tmp;</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vsc9959_stream_table_del(struct ocelot *ocelot,</div><div class='add'>+				     struct felix_stream *stream)</div><div class='add'>+{</div><div class='add'>+	if (!stream-&gt;dummy)</div><div class='add'>+		vsc9959_mact_stream_set(ocelot, stream, NULL);</div><div class='add'>+</div><div class='add'>+	list_del(&amp;stream-&gt;list);</div><div class='add'>+	kfree(stream);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 vsc9959_sfi_access_status(struct ocelot *ocelot)</div><div class='add'>+{</div><div class='add'>+	return ocelot_read(ocelot, ANA_TABLES_SFIDACCESS);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc9959_psfp_sfi_set(struct ocelot *ocelot,</div><div class='add'>+				struct felix_stream_filter *sfi)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	if (sfi-&gt;index &gt; VSC9959_PSFP_SFID_MAX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!sfi-&gt;enable) {</div><div class='add'>+		ocelot_write(ocelot, ANA_TABLES_SFIDTIDX_SFID_INDEX(sfi-&gt;index),</div><div class='add'>+			     ANA_TABLES_SFIDTIDX);</div><div class='add'>+</div><div class='add'>+		val = ANA_TABLES_SFIDACCESS_SFID_TBL_CMD(SFIDACCESS_CMD_WRITE);</div><div class='add'>+		ocelot_write(ocelot, val, ANA_TABLES_SFIDACCESS);</div><div class='add'>+</div><div class='add'>+		return readx_poll_timeout(vsc9959_sfi_access_status, ocelot, val,</div><div class='add'>+					  (!ANA_TABLES_SFIDACCESS_SFID_TBL_CMD(val)),</div><div class='add'>+					  10, 100000);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (sfi-&gt;sgid &gt; VSC9959_PSFP_GATE_ID_MAX ||</div><div class='add'>+	    sfi-&gt;fmid &gt; VSC9959_PSFP_POLICER_MAX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ocelot_write(ocelot,</div><div class='add'>+		     (sfi-&gt;sg_valid ? ANA_TABLES_SFIDTIDX_SGID_VALID : 0) |</div><div class='add'>+		     ANA_TABLES_SFIDTIDX_SGID(sfi-&gt;sgid) |</div><div class='add'>+		     (sfi-&gt;fm_valid ? ANA_TABLES_SFIDTIDX_POL_ENA : 0) |</div><div class='add'>+		     ANA_TABLES_SFIDTIDX_POL_IDX(sfi-&gt;fmid) |</div><div class='add'>+		     ANA_TABLES_SFIDTIDX_SFID_INDEX(sfi-&gt;index),</div><div class='add'>+		     ANA_TABLES_SFIDTIDX);</div><div class='add'>+</div><div class='add'>+	ocelot_write(ocelot,</div><div class='add'>+		     (sfi-&gt;prio_valid ? ANA_TABLES_SFIDACCESS_IGR_PRIO_MATCH_ENA : 0) |</div><div class='add'>+		     ANA_TABLES_SFIDACCESS_IGR_PRIO(sfi-&gt;prio) |</div><div class='add'>+		     ANA_TABLES_SFIDACCESS_MAX_SDU_LEN(sfi-&gt;maxsdu) |</div><div class='add'>+		     ANA_TABLES_SFIDACCESS_SFID_TBL_CMD(SFIDACCESS_CMD_WRITE),</div><div class='add'>+		     ANA_TABLES_SFIDACCESS);</div><div class='add'>+</div><div class='add'>+	return readx_poll_timeout(vsc9959_sfi_access_status, ocelot, val,</div><div class='add'>+				  (!ANA_TABLES_SFIDACCESS_SFID_TBL_CMD(val)),</div><div class='add'>+				  10, 100000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc9959_psfp_sfidmask_set(struct ocelot *ocelot, u32 sfid, int ports)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	ocelot_rmw(ocelot,</div><div class='add'>+		   ANA_TABLES_SFIDTIDX_SFID_INDEX(sfid),</div><div class='add'>+		   ANA_TABLES_SFIDTIDX_SFID_INDEX_M,</div><div class='add'>+		   ANA_TABLES_SFIDTIDX);</div><div class='add'>+</div><div class='add'>+	ocelot_write(ocelot,</div><div class='add'>+		     ANA_TABLES_SFID_MASK_IGR_PORT_MASK(ports) |</div><div class='add'>+		     ANA_TABLES_SFID_MASK_IGR_SRCPORT_MATCH_ENA,</div><div class='add'>+		     ANA_TABLES_SFID_MASK);</div><div class='add'>+</div><div class='add'>+	ocelot_rmw(ocelot,</div><div class='add'>+		   ANA_TABLES_SFIDACCESS_SFID_TBL_CMD(SFIDACCESS_CMD_WRITE),</div><div class='add'>+		   ANA_TABLES_SFIDACCESS_SFID_TBL_CMD_M,</div><div class='add'>+		   ANA_TABLES_SFIDACCESS);</div><div class='add'>+</div><div class='add'>+	return readx_poll_timeout(vsc9959_sfi_access_status, ocelot, val,</div><div class='add'>+				  (!ANA_TABLES_SFIDACCESS_SFID_TBL_CMD(val)),</div><div class='add'>+				  10, 100000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc9959_psfp_sfi_list_add(struct ocelot *ocelot,</div><div class='add'>+				     struct felix_stream_filter *sfi,</div><div class='add'>+				     struct list_head *pos)</div><div class='add'>+{</div><div class='add'>+	struct felix_stream_filter *sfi_entry;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	sfi_entry = kmemdup(sfi, sizeof(*sfi_entry), GFP_KERNEL);</div><div class='add'>+	if (!sfi_entry)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	refcount_set(&amp;sfi_entry-&gt;refcount, 1);</div><div class='add'>+</div><div class='add'>+	ret = vsc9959_psfp_sfi_set(ocelot, sfi_entry);</div><div class='add'>+	if (ret) {</div><div class='add'>+		kfree(sfi_entry);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vsc9959_psfp_sfidmask_set(ocelot, sfi-&gt;index, sfi-&gt;portmask);</div><div class='add'>+</div><div class='add'>+	list_add(&amp;sfi_entry-&gt;list, pos);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc9959_psfp_sfi_table_add(struct ocelot *ocelot,</div><div class='add'>+				      struct felix_stream_filter *sfi)</div><div class='add'>+{</div><div class='add'>+	struct list_head *pos, *q, *last;</div><div class='add'>+	struct felix_stream_filter *tmp;</div><div class='add'>+	struct ocelot_psfp_list *psfp;</div><div class='add'>+	u32 insert = 0;</div><div class='add'>+</div><div class='add'>+	psfp = &amp;ocelot-&gt;psfp;</div><div class='add'>+	last = &amp;psfp-&gt;sfi_list;</div><div class='add'>+</div><div class='add'>+	list_for_each_safe(pos, q, &amp;psfp-&gt;sfi_list) {</div><div class='add'>+		tmp = list_entry(pos, struct felix_stream_filter, list);</div><div class='add'>+		if (sfi-&gt;sg_valid == tmp-&gt;sg_valid &amp;&amp;</div><div class='add'>+		    sfi-&gt;fm_valid == tmp-&gt;fm_valid &amp;&amp;</div><div class='add'>+		    sfi-&gt;portmask == tmp-&gt;portmask &amp;&amp;</div><div class='add'>+		    tmp-&gt;sgid == sfi-&gt;sgid &amp;&amp;</div><div class='add'>+		    tmp-&gt;fmid == sfi-&gt;fmid) {</div><div class='add'>+			sfi-&gt;index = tmp-&gt;index;</div><div class='add'>+			refcount_inc(&amp;tmp-&gt;refcount);</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+		/* Make sure that the index is increasing in order. */</div><div class='add'>+		if (tmp-&gt;index == insert) {</div><div class='add'>+			last = pos;</div><div class='add'>+			insert++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	sfi-&gt;index = insert;</div><div class='add'>+</div><div class='add'>+	return vsc9959_psfp_sfi_list_add(ocelot, sfi, last);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc9959_psfp_sfi_table_add2(struct ocelot *ocelot,</div><div class='add'>+				       struct felix_stream_filter *sfi,</div><div class='add'>+				       struct felix_stream_filter *sfi2)</div><div class='add'>+{</div><div class='add'>+	struct felix_stream_filter *tmp;</div><div class='add'>+	struct list_head *pos, *q, *last;</div><div class='add'>+	struct ocelot_psfp_list *psfp;</div><div class='add'>+	u32 insert = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	psfp = &amp;ocelot-&gt;psfp;</div><div class='add'>+	last = &amp;psfp-&gt;sfi_list;</div><div class='add'>+</div><div class='add'>+	list_for_each_safe(pos, q, &amp;psfp-&gt;sfi_list) {</div><div class='add'>+		tmp = list_entry(pos, struct felix_stream_filter, list);</div><div class='add'>+		/* Make sure that the index is increasing in order. */</div><div class='add'>+		if (tmp-&gt;index &gt;= insert + 2)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		insert = tmp-&gt;index + 1;</div><div class='add'>+		last = pos;</div><div class='add'>+	}</div><div class='add'>+	sfi-&gt;index = insert;</div><div class='add'>+</div><div class='add'>+	ret = vsc9959_psfp_sfi_list_add(ocelot, sfi, last);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	sfi2-&gt;index = insert + 1;</div><div class='add'>+</div><div class='add'>+	return vsc9959_psfp_sfi_list_add(ocelot, sfi2, last-&gt;next);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct felix_stream_filter *</div><div class='add'>+vsc9959_psfp_sfi_table_get(struct list_head *sfi_list, u32 index)</div><div class='add'>+{</div><div class='add'>+	struct felix_stream_filter *tmp;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(tmp, sfi_list, list)</div><div class='add'>+		if (tmp-&gt;index == index)</div><div class='add'>+			return tmp;</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vsc9959_psfp_sfi_table_del(struct ocelot *ocelot, u32 index)</div><div class='add'>+{</div><div class='add'>+	struct felix_stream_filter *tmp, *n;</div><div class='add'>+	struct ocelot_psfp_list *psfp;</div><div class='add'>+	u8 z;</div><div class='add'>+</div><div class='add'>+	psfp = &amp;ocelot-&gt;psfp;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_safe(tmp, n, &amp;psfp-&gt;sfi_list, list)</div><div class='add'>+		if (tmp-&gt;index == index) {</div><div class='add'>+			z = refcount_dec_and_test(&amp;tmp-&gt;refcount);</div><div class='add'>+			if (z) {</div><div class='add'>+				tmp-&gt;enable = 0;</div><div class='add'>+				vsc9959_psfp_sfi_set(ocelot, tmp);</div><div class='add'>+				list_del(&amp;tmp-&gt;list);</div><div class='add'>+				kfree(tmp);</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vsc9959_psfp_parse_gate(const struct flow_action_entry *entry,</div><div class='add'>+				    struct felix_stream_gate *sgi)</div><div class='add'>+{</div><div class='add'>+	sgi-&gt;index = entry-&gt;hw_index;</div><div class='add'>+	sgi-&gt;ipv_valid = (entry-&gt;gate.prio &lt; 0) ? 0 : 1;</div><div class='add'>+	sgi-&gt;init_ipv = (sgi-&gt;ipv_valid) ? entry-&gt;gate.prio : 0;</div><div class='add'>+	sgi-&gt;basetime = entry-&gt;gate.basetime;</div><div class='add'>+	sgi-&gt;cycletime = entry-&gt;gate.cycletime;</div><div class='add'>+	sgi-&gt;num_entries = entry-&gt;gate.num_entries;</div><div class='add'>+	sgi-&gt;enable = 1;</div><div class='add'>+</div><div class='add'>+	memcpy(sgi-&gt;entries, entry-&gt;gate.entries,</div><div class='add'>+	       entry-&gt;gate.num_entries * sizeof(struct action_gate_entry));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 vsc9959_sgi_cfg_status(struct ocelot *ocelot)</div><div class='add'>+{</div><div class='add'>+	return ocelot_read(ocelot, ANA_SG_ACCESS_CTRL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc9959_psfp_sgi_set(struct ocelot *ocelot,</div><div class='add'>+				struct felix_stream_gate *sgi)</div><div class='add'>+{</div><div class='add'>+	struct action_gate_entry *e;</div><div class='add'>+	struct timespec64 base_ts;</div><div class='add'>+	u32 interval_sum = 0;</div><div class='add'>+	u32 val;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (sgi-&gt;index &gt; VSC9959_PSFP_GATE_ID_MAX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ocelot_write(ocelot, ANA_SG_ACCESS_CTRL_SGID(sgi-&gt;index),</div><div class='add'>+		     ANA_SG_ACCESS_CTRL);</div><div class='add'>+</div><div class='add'>+	if (!sgi-&gt;enable) {</div><div class='add'>+		ocelot_rmw(ocelot, ANA_SG_CONFIG_REG_3_INIT_GATE_STATE,</div><div class='add'>+			   ANA_SG_CONFIG_REG_3_INIT_GATE_STATE |</div><div class='add'>+			   ANA_SG_CONFIG_REG_3_GATE_ENABLE,</div><div class='add'>+			   ANA_SG_CONFIG_REG_3);</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (sgi-&gt;cycletime &lt; VSC9959_PSFP_GATE_CYCLETIME_MIN ||</div><div class='add'>+	    sgi-&gt;cycletime &gt; NSEC_PER_SEC)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (sgi-&gt;num_entries &gt; VSC9959_PSFP_GATE_LIST_NUM)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	vsc9959_new_base_time(ocelot, sgi-&gt;basetime, sgi-&gt;cycletime, &amp;base_ts);</div><div class='add'>+	ocelot_write(ocelot, base_ts.tv_nsec, ANA_SG_CONFIG_REG_1);</div><div class='add'>+	val = lower_32_bits(base_ts.tv_sec);</div><div class='add'>+	ocelot_write(ocelot, val, ANA_SG_CONFIG_REG_2);</div><div class='add'>+</div><div class='add'>+	val = upper_32_bits(base_ts.tv_sec);</div><div class='add'>+	ocelot_write(ocelot,</div><div class='add'>+		     (sgi-&gt;ipv_valid ? ANA_SG_CONFIG_REG_3_IPV_VALID : 0) |</div><div class='add'>+		     ANA_SG_CONFIG_REG_3_INIT_IPV(sgi-&gt;init_ipv) |</div><div class='add'>+		     ANA_SG_CONFIG_REG_3_GATE_ENABLE |</div><div class='add'>+		     ANA_SG_CONFIG_REG_3_LIST_LENGTH(sgi-&gt;num_entries) |</div><div class='add'>+		     ANA_SG_CONFIG_REG_3_INIT_GATE_STATE |</div><div class='add'>+		     ANA_SG_CONFIG_REG_3_BASE_TIME_SEC_MSB(val),</div><div class='add'>+		     ANA_SG_CONFIG_REG_3);</div><div class='add'>+</div><div class='add'>+	ocelot_write(ocelot, sgi-&gt;cycletime, ANA_SG_CONFIG_REG_4);</div><div class='add'>+</div><div class='add'>+	e = sgi-&gt;entries;</div><div class='add'>+	for (i = 0; i &lt; sgi-&gt;num_entries; i++) {</div><div class='add'>+		u32 ips = (e[i].ipv &lt; 0) ? 0 : (e[i].ipv + 8);</div><div class='add'>+</div><div class='add'>+		ocelot_write_rix(ocelot, ANA_SG_GCL_GS_CONFIG_IPS(ips) |</div><div class='add'>+				 (e[i].gate_state ?</div><div class='add'>+				  ANA_SG_GCL_GS_CONFIG_GATE_STATE : 0),</div><div class='add'>+				 ANA_SG_GCL_GS_CONFIG, i);</div><div class='add'>+</div><div class='add'>+		interval_sum += e[i].interval;</div><div class='add'>+		ocelot_write_rix(ocelot, interval_sum, ANA_SG_GCL_TI_CONFIG, i);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ocelot_rmw(ocelot, ANA_SG_ACCESS_CTRL_CONFIG_CHANGE,</div><div class='add'>+		   ANA_SG_ACCESS_CTRL_CONFIG_CHANGE,</div><div class='add'>+		   ANA_SG_ACCESS_CTRL);</div><div class='add'>+</div><div class='add'>+	return readx_poll_timeout(vsc9959_sgi_cfg_status, ocelot, val,</div><div class='add'>+				  (!(ANA_SG_ACCESS_CTRL_CONFIG_CHANGE &amp; val)),</div><div class='add'>+				  10, 100000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc9959_psfp_sgi_table_add(struct ocelot *ocelot,</div><div class='add'>+				      struct felix_stream_gate *sgi)</div><div class='add'>+{</div><div class='add'>+	struct felix_stream_gate_entry *tmp;</div><div class='add'>+	struct ocelot_psfp_list *psfp;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	psfp = &amp;ocelot-&gt;psfp;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(tmp, &amp;psfp-&gt;sgi_list, list)</div><div class='add'>+		if (tmp-&gt;index == sgi-&gt;index) {</div><div class='add'>+			refcount_inc(&amp;tmp-&gt;refcount);</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+	tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);</div><div class='add'>+	if (!tmp)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ret = vsc9959_psfp_sgi_set(ocelot, sgi);</div><div class='add'>+	if (ret) {</div><div class='add'>+		kfree(tmp);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tmp-&gt;index = sgi-&gt;index;</div><div class='add'>+	refcount_set(&amp;tmp-&gt;refcount, 1);</div><div class='add'>+	list_add_tail(&amp;tmp-&gt;list, &amp;psfp-&gt;sgi_list);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vsc9959_psfp_sgi_table_del(struct ocelot *ocelot,</div><div class='add'>+				       u32 index)</div><div class='add'>+{</div><div class='add'>+	struct felix_stream_gate_entry *tmp, *n;</div><div class='add'>+	struct felix_stream_gate sgi = {0};</div><div class='add'>+	struct ocelot_psfp_list *psfp;</div><div class='add'>+	u8 z;</div><div class='add'>+</div><div class='add'>+	psfp = &amp;ocelot-&gt;psfp;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_safe(tmp, n, &amp;psfp-&gt;sgi_list, list)</div><div class='add'>+		if (tmp-&gt;index == index) {</div><div class='add'>+			z = refcount_dec_and_test(&amp;tmp-&gt;refcount);</div><div class='add'>+			if (z) {</div><div class='add'>+				sgi.index = index;</div><div class='add'>+				sgi.enable = 0;</div><div class='add'>+				vsc9959_psfp_sgi_set(ocelot, &amp;sgi);</div><div class='add'>+				list_del(&amp;tmp-&gt;list);</div><div class='add'>+				kfree(tmp);</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc9959_psfp_filter_add(struct ocelot *ocelot, int port,</div><div class='add'>+				   struct flow_cls_offload *f)</div><div class='add'>+{</div><div class='add'>+	struct netlink_ext_ack *extack = f-&gt;common.extack;</div><div class='add'>+	struct felix_stream_filter old_sfi, *sfi_entry;</div><div class='add'>+	struct felix_stream_filter sfi = {0};</div><div class='add'>+	const struct flow_action_entry *a;</div><div class='add'>+	struct felix_stream *stream_entry;</div><div class='add'>+	struct felix_stream stream = {0};</div><div class='add'>+	struct felix_stream_gate *sgi;</div><div class='add'>+	struct ocelot_psfp_list *psfp;</div><div class='add'>+	struct ocelot_policer pol;</div><div class='add'>+	int ret, i, size;</div><div class='add'>+	u64 rate, burst;</div><div class='add'>+	u32 index;</div><div class='add'>+</div><div class='add'>+	psfp = &amp;ocelot-&gt;psfp;</div><div class='add'>+</div><div class='add'>+	ret = vsc9959_stream_identify(f, &amp;stream);</div><div class='add'>+	if (ret) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Only can match on VID, PCP, and dest MAC");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;psfp-&gt;lock);</div><div class='add'>+</div><div class='add'>+	flow_action_for_each(i, a, &amp;f-&gt;rule-&gt;action) {</div><div class='add'>+		switch (a-&gt;id) {</div><div class='add'>+		case FLOW_ACTION_GATE:</div><div class='add'>+			size = struct_size(sgi, entries, a-&gt;gate.num_entries);</div><div class='add'>+			sgi = kzalloc(size, GFP_KERNEL);</div><div class='add'>+			if (!sgi) {</div><div class='add'>+				ret = -ENOMEM;</div><div class='add'>+				goto err;</div><div class='add'>+			}</div><div class='add'>+			vsc9959_psfp_parse_gate(a, sgi);</div><div class='add'>+			ret = vsc9959_psfp_sgi_table_add(ocelot, sgi);</div><div class='add'>+			if (ret) {</div><div class='add'>+				kfree(sgi);</div><div class='add'>+				goto err;</div><div class='add'>+			}</div><div class='add'>+			sfi.sg_valid = 1;</div><div class='add'>+			sfi.sgid = sgi-&gt;index;</div><div class='add'>+			kfree(sgi);</div><div class='add'>+			break;</div><div class='add'>+		case FLOW_ACTION_POLICE:</div><div class='add'>+			index = a-&gt;hw_index + VSC9959_PSFP_POLICER_BASE;</div><div class='add'>+			if (index &gt; VSC9959_PSFP_POLICER_MAX) {</div><div class='add'>+				ret = -EINVAL;</div><div class='add'>+				goto err;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			rate = a-&gt;police.rate_bytes_ps;</div><div class='add'>+			burst = rate * PSCHED_NS2TICKS(a-&gt;police.burst);</div><div class='add'>+			pol = (struct ocelot_policer) {</div><div class='add'>+				.burst = div_u64(burst, PSCHED_TICKS_PER_SEC),</div><div class='add'>+				.rate = div_u64(rate, 1000) * 8,</div><div class='add'>+			};</div><div class='add'>+			ret = ocelot_vcap_policer_add(ocelot, index, &amp;pol);</div><div class='add'>+			if (ret)</div><div class='add'>+				goto err;</div><div class='add'>+</div><div class='add'>+			sfi.fm_valid = 1;</div><div class='add'>+			sfi.fmid = index;</div><div class='add'>+			sfi.maxsdu = a-&gt;police.mtu;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			mutex_unlock(&amp;psfp-&gt;lock);</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	stream.ports = BIT(port);</div><div class='add'>+	stream.port = port;</div><div class='add'>+</div><div class='add'>+	sfi.portmask = stream.ports;</div><div class='add'>+	sfi.prio_valid = (stream.prio &lt; 0 ? 0 : 1);</div><div class='add'>+	sfi.prio = (sfi.prio_valid ? stream.prio : 0);</div><div class='add'>+	sfi.enable = 1;</div><div class='add'>+</div><div class='add'>+	/* Check if stream is set. */</div><div class='add'>+	stream_entry = vsc9959_stream_table_lookup(&amp;psfp-&gt;stream_list, &amp;stream);</div><div class='add'>+	if (stream_entry) {</div><div class='add'>+		if (stream_entry-&gt;ports &amp; BIT(port)) {</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+					   "The stream is added on this port");</div><div class='add'>+			ret = -EEXIST;</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (stream_entry-&gt;ports != BIT(stream_entry-&gt;port)) {</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+					   "The stream is added on two ports");</div><div class='add'>+			ret = -EEXIST;</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		stream_entry-&gt;ports |= BIT(port);</div><div class='add'>+		stream.ports = stream_entry-&gt;ports;</div><div class='add'>+</div><div class='add'>+		sfi_entry = vsc9959_psfp_sfi_table_get(&amp;psfp-&gt;sfi_list,</div><div class='add'>+						       stream_entry-&gt;sfid);</div><div class='add'>+		memcpy(&amp;old_sfi, sfi_entry, sizeof(old_sfi));</div><div class='add'>+</div><div class='add'>+		vsc9959_psfp_sfi_table_del(ocelot, stream_entry-&gt;sfid);</div><div class='add'>+</div><div class='add'>+		old_sfi.portmask = stream_entry-&gt;ports;</div><div class='add'>+		sfi.portmask = stream.ports;</div><div class='add'>+</div><div class='add'>+		if (stream_entry-&gt;port &gt; port) {</div><div class='add'>+			ret = vsc9959_psfp_sfi_table_add2(ocelot, &amp;sfi,</div><div class='add'>+							  &amp;old_sfi);</div><div class='add'>+			stream_entry-&gt;dummy = true;</div><div class='add'>+		} else {</div><div class='add'>+			ret = vsc9959_psfp_sfi_table_add2(ocelot, &amp;old_sfi,</div><div class='add'>+							  &amp;sfi);</div><div class='add'>+			stream.dummy = true;</div><div class='add'>+		}</div><div class='add'>+		if (ret)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		stream_entry-&gt;sfid = old_sfi.index;</div><div class='add'>+	} else {</div><div class='add'>+		ret = vsc9959_psfp_sfi_table_add(ocelot, &amp;sfi);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	stream.sfid = sfi.index;</div><div class='add'>+	stream.sfid_valid = 1;</div><div class='add'>+	ret = vsc9959_stream_table_add(ocelot, &amp;psfp-&gt;stream_list,</div><div class='add'>+				       &amp;stream, extack);</div><div class='add'>+	if (ret) {</div><div class='add'>+		vsc9959_psfp_sfi_table_del(ocelot, stream.sfid);</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;psfp-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	if (sfi.sg_valid)</div><div class='add'>+		vsc9959_psfp_sgi_table_del(ocelot, sfi.sgid);</div><div class='add'>+</div><div class='add'>+	if (sfi.fm_valid)</div><div class='add'>+		ocelot_vcap_policer_del(ocelot, sfi.fmid);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;psfp-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc9959_psfp_filter_del(struct ocelot *ocelot,</div><div class='add'>+				   struct flow_cls_offload *f)</div><div class='add'>+{</div><div class='add'>+	struct felix_stream *stream, tmp, *stream_entry;</div><div class='add'>+	struct ocelot_psfp_list *psfp = &amp;ocelot-&gt;psfp;</div><div class='add'>+	static struct felix_stream_filter *sfi;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;psfp-&gt;lock);</div><div class='add'>+</div><div class='add'>+	stream = vsc9959_stream_table_get(&amp;psfp-&gt;stream_list, f-&gt;cookie);</div><div class='add'>+	if (!stream) {</div><div class='add'>+		mutex_unlock(&amp;psfp-&gt;lock);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sfi = vsc9959_psfp_sfi_table_get(&amp;psfp-&gt;sfi_list, stream-&gt;sfid);</div><div class='add'>+	if (!sfi) {</div><div class='add'>+		mutex_unlock(&amp;psfp-&gt;lock);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (sfi-&gt;sg_valid)</div><div class='add'>+		vsc9959_psfp_sgi_table_del(ocelot, sfi-&gt;sgid);</div><div class='add'>+</div><div class='add'>+	if (sfi-&gt;fm_valid)</div><div class='add'>+		ocelot_vcap_policer_del(ocelot, sfi-&gt;fmid);</div><div class='add'>+</div><div class='add'>+	vsc9959_psfp_sfi_table_del(ocelot, stream-&gt;sfid);</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;tmp, stream, sizeof(tmp));</div><div class='add'>+</div><div class='add'>+	stream-&gt;sfid_valid = 0;</div><div class='add'>+	vsc9959_stream_table_del(ocelot, stream);</div><div class='add'>+</div><div class='add'>+	stream_entry = vsc9959_stream_table_lookup(&amp;psfp-&gt;stream_list, &amp;tmp);</div><div class='add'>+	if (stream_entry) {</div><div class='add'>+		stream_entry-&gt;ports = BIT(stream_entry-&gt;port);</div><div class='add'>+		if (stream_entry-&gt;dummy) {</div><div class='add'>+			stream_entry-&gt;dummy = false;</div><div class='add'>+			vsc9959_mact_stream_set(ocelot, stream_entry, NULL);</div><div class='add'>+		}</div><div class='add'>+		vsc9959_psfp_sfidmask_set(ocelot, stream_entry-&gt;sfid,</div><div class='add'>+					  stream_entry-&gt;ports);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;psfp-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vsc9959_update_sfid_stats(struct ocelot *ocelot,</div><div class='add'>+				      struct felix_stream_filter *sfi)</div><div class='add'>+{</div><div class='add'>+	struct felix_stream_filter_counters *s = &amp;sfi-&gt;stats;</div><div class='add'>+	u32 match, not_pass_gate, not_pass_sdu, red;</div><div class='add'>+	u32 sfid = sfi-&gt;index;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;ocelot-&gt;stat_view_lock);</div><div class='add'>+</div><div class='add'>+	ocelot_rmw(ocelot, SYS_STAT_CFG_STAT_VIEW(sfid),</div><div class='add'>+		   SYS_STAT_CFG_STAT_VIEW_M,</div><div class='add'>+		   SYS_STAT_CFG);</div><div class='add'>+</div><div class='add'>+	match = ocelot_read(ocelot, SYS_COUNT_SF_MATCHING_FRAMES);</div><div class='add'>+	not_pass_gate = ocelot_read(ocelot, SYS_COUNT_SF_NOT_PASSING_FRAMES);</div><div class='add'>+	not_pass_sdu = ocelot_read(ocelot, SYS_COUNT_SF_NOT_PASSING_SDU);</div><div class='add'>+	red = ocelot_read(ocelot, SYS_COUNT_SF_RED_FRAMES);</div><div class='add'>+</div><div class='add'>+	/* Clear the PSFP counter. */</div><div class='add'>+	ocelot_write(ocelot,</div><div class='add'>+		     SYS_STAT_CFG_STAT_VIEW(sfid) |</div><div class='add'>+		     SYS_STAT_CFG_STAT_CLEAR_SHOT(0x10),</div><div class='add'>+		     SYS_STAT_CFG);</div><div class='add'>+</div><div class='add'>+	s-&gt;match += match;</div><div class='add'>+	s-&gt;not_pass_gate += not_pass_gate;</div><div class='add'>+	s-&gt;not_pass_sdu += not_pass_sdu;</div><div class='add'>+	s-&gt;red += red;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Caller must hold &amp;ocelot-&gt;stat_view_lock */</div><div class='add'>+static void vsc9959_update_stats(struct ocelot *ocelot)</div><div class='add'>+{</div><div class='add'>+	struct ocelot_psfp_list *psfp = &amp;ocelot-&gt;psfp;</div><div class='add'>+	struct felix_stream_filter *sfi;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;psfp-&gt;lock);</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(sfi, &amp;psfp-&gt;sfi_list, list)</div><div class='add'>+		vsc9959_update_sfid_stats(ocelot, sfi);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;psfp-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc9959_psfp_stats_get(struct ocelot *ocelot,</div><div class='add'>+				  struct flow_cls_offload *f,</div><div class='add'>+				  struct flow_stats *stats)</div><div class='add'>+{</div><div class='add'>+	struct ocelot_psfp_list *psfp = &amp;ocelot-&gt;psfp;</div><div class='add'>+	struct felix_stream_filter_counters *s;</div><div class='add'>+	static struct felix_stream_filter *sfi;</div><div class='add'>+	struct felix_stream *stream;</div><div class='add'>+</div><div class='add'>+	stream = vsc9959_stream_table_get(&amp;psfp-&gt;stream_list, f-&gt;cookie);</div><div class='add'>+	if (!stream)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	sfi = vsc9959_psfp_sfi_table_get(&amp;psfp-&gt;sfi_list, stream-&gt;sfid);</div><div class='add'>+	if (!sfi)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ocelot-&gt;stat_view_lock);</div><div class='add'>+</div><div class='add'>+	vsc9959_update_sfid_stats(ocelot, sfi);</div><div class='add'>+</div><div class='add'>+	s = &amp;sfi-&gt;stats;</div><div class='add'>+	stats-&gt;pkts = s-&gt;match;</div><div class='add'>+	stats-&gt;drops = s-&gt;not_pass_gate + s-&gt;not_pass_sdu + s-&gt;red;</div><div class='add'>+</div><div class='add'>+	memset(s, 0, sizeof(*s));</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;ocelot-&gt;stat_view_lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vsc9959_psfp_init(struct ocelot *ocelot)</div><div class='add'>+{</div><div class='add'>+	struct ocelot_psfp_list *psfp = &amp;ocelot-&gt;psfp;</div><div class='add'>+</div><div class='add'>+	INIT_LIST_HEAD(&amp;psfp-&gt;stream_list);</div><div class='add'>+	INIT_LIST_HEAD(&amp;psfp-&gt;sfi_list);</div><div class='add'>+	INIT_LIST_HEAD(&amp;psfp-&gt;sgi_list);</div><div class='add'>+	mutex_init(&amp;psfp-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* When using cut-through forwarding and the egress port runs at a higher data</div><div class='add'>+ * rate than the ingress port, the packet currently under transmission would</div><div class='add'>+ * suffer an underrun since it would be transmitted faster than it is received.</div><div class='add'>+ * The Felix switch implementation of cut-through forwarding does not check in</div><div class='add'>+ * hardware whether this condition is satisfied or not, so we must restrict the</div><div class='add'>+ * list of ports that have cut-through forwarding enabled on egress to only be</div><div class='add'>+ * the ports operating at the lowest link speed within their respective</div><div class='add'>+ * forwarding domain.</div><div class='add'>+ */</div><div class='add'>+static void vsc9959_cut_through_fwd(struct ocelot *ocelot)</div><div class='add'>+{</div><div class='add'>+	struct felix *felix = ocelot_to_felix(ocelot);</div><div class='add'>+	struct dsa_switch *ds = felix-&gt;ds;</div><div class='add'>+	int tc, port, other_port;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;ocelot-&gt;fwd_domain_lock);</div><div class='add'>+</div><div class='add'>+	for (port = 0; port &lt; ocelot-&gt;num_phys_ports; port++) {</div><div class='add'>+		struct ocelot_port *ocelot_port = ocelot-&gt;ports[port];</div><div class='add'>+		struct ocelot_mm_state *mm = &amp;ocelot-&gt;mm[port];</div><div class='add'>+		int min_speed = ocelot_port-&gt;speed;</div><div class='add'>+		unsigned long mask = 0;</div><div class='add'>+		u32 tmp, val = 0;</div><div class='add'>+</div><div class='add'>+		/* Disable cut-through on ports that are down */</div><div class='add'>+		if (ocelot_port-&gt;speed &lt;= 0)</div><div class='add'>+			goto set;</div><div class='add'>+</div><div class='add'>+		if (dsa_is_cpu_port(ds, port)) {</div><div class='add'>+			/* Ocelot switches forward from the NPI port towards</div><div class='add'>+			 * any port, regardless of it being in the NPI port's</div><div class='add'>+			 * forwarding domain or not.</div><div class='add'>+			 */</div><div class='add'>+			mask = dsa_user_ports(ds);</div><div class='add'>+		} else {</div><div class='add'>+			mask = ocelot_get_bridge_fwd_mask(ocelot, port);</div><div class='add'>+			mask &amp;= ~BIT(port);</div><div class='add'>+			if (ocelot-&gt;npi &gt;= 0)</div><div class='add'>+				mask |= BIT(ocelot-&gt;npi);</div><div class='add'>+			else</div><div class='add'>+				mask |= ocelot_port_assigned_dsa_8021q_cpu_mask(ocelot,</div><div class='add'>+										port);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Calculate the minimum link speed, among the ports that are</div><div class='add'>+		 * up, of this source port's forwarding domain.</div><div class='add'>+		 */</div><div class='add'>+		for_each_set_bit(other_port, &amp;mask, ocelot-&gt;num_phys_ports) {</div><div class='add'>+			struct ocelot_port *other_ocelot_port;</div><div class='add'>+</div><div class='add'>+			other_ocelot_port = ocelot-&gt;ports[other_port];</div><div class='add'>+			if (other_ocelot_port-&gt;speed &lt;= 0)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			if (min_speed &gt; other_ocelot_port-&gt;speed)</div><div class='add'>+				min_speed = other_ocelot_port-&gt;speed;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Enable cut-through forwarding for all traffic classes that</div><div class='add'>+		 * don't have oversized dropping enabled, since this check is</div><div class='add'>+		 * bypassed in cut-through mode. Also exclude preemptible</div><div class='add'>+		 * traffic classes, since these would hang the port for some</div><div class='add'>+		 * reason, if sent as cut-through.</div><div class='add'>+		 */</div><div class='add'>+		if (ocelot_port-&gt;speed == min_speed) {</div><div class='add'>+			val = GENMASK(7, 0) &amp; ~mm-&gt;active_preemptible_tcs;</div><div class='add'>+</div><div class='add'>+			for (tc = 0; tc &lt; OCELOT_NUM_TC; tc++)</div><div class='add'>+				if (vsc9959_port_qmaxsdu_get(ocelot, port, tc))</div><div class='add'>+					val &amp;= ~BIT(tc);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+set:</div><div class='add'>+		tmp = ocelot_read_rix(ocelot, ANA_CUT_THRU_CFG, port);</div><div class='add'>+		if (tmp == val)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		dev_dbg(ocelot-&gt;dev,</div><div class='add'>+			"port %d fwd mask 0x%lx speed %d min_speed %d, %s cut-through forwarding on TC mask 0x%x\n",</div><div class='add'>+			port, mask, ocelot_port-&gt;speed, min_speed,</div><div class='add'>+			val ? "enabling" : "disabling", val);</div><div class='add'>+</div><div class='add'>+		ocelot_write_rix(ocelot, val, ANA_CUT_THRU_CFG, port);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The INTB interrupt is shared between for PTP TX timestamp availability</div><div class='add'>+ * notification and MAC Merge status change on each port.</div><div class='add'>+ */</div><div class='add'>+static irqreturn_t vsc9959_irq_handler(int irq, void *data)</div><div class='add'>+{</div><div class='add'>+	struct ocelot *ocelot = data;</div><div class='add'>+</div><div class='add'>+	ocelot_get_txtstamp(ocelot);</div><div class='add'>+	ocelot_mm_irq(ocelot);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc9959_request_irq(struct ocelot *ocelot)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = to_pci_dev(ocelot-&gt;dev);</div><div class='add'>+</div><div class='add'>+	return devm_request_threaded_irq(ocelot-&gt;dev, pdev-&gt;irq, NULL,</div><div class='add'>+					 &amp;vsc9959_irq_handler, IRQF_ONESHOT,</div><div class='add'>+					 "felix-intb", ocelot);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ocelot_ops vsc9959_ops = {</div><div class='add'>+	.reset			= vsc9959_reset,</div><div class='add'>+	.wm_enc			= vsc9959_wm_enc,</div><div class='add'>+	.wm_dec			= vsc9959_wm_dec,</div><div class='add'>+	.wm_stat		= vsc9959_wm_stat,</div><div class='add'>+	.port_to_netdev		= felix_port_to_netdev,</div><div class='add'>+	.netdev_to_port		= felix_netdev_to_port,</div><div class='add'>+	.psfp_init		= vsc9959_psfp_init,</div><div class='add'>+	.psfp_filter_add	= vsc9959_psfp_filter_add,</div><div class='add'>+	.psfp_filter_del	= vsc9959_psfp_filter_del,</div><div class='add'>+	.psfp_stats_get		= vsc9959_psfp_stats_get,</div><div class='add'>+	.cut_through_fwd	= vsc9959_cut_through_fwd,</div><div class='add'>+	.tas_clock_adjust	= vsc9959_tas_clock_adjust,</div><div class='add'>+	.update_stats		= vsc9959_update_stats,</div><div class='add'>+	.tas_guard_bands_update	= vsc9959_tas_guard_bands_update,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct felix_info felix_info_vsc9959 = {</div><div class='add'>+	.resources		= vsc9959_resources,</div><div class='add'>+	.num_resources		= ARRAY_SIZE(vsc9959_resources),</div><div class='add'>+	.resource_names		= vsc9959_resource_names,</div><div class='add'>+	.regfields		= vsc9959_regfields,</div><div class='add'>+	.map			= vsc9959_regmap,</div><div class='add'>+	.ops			= &amp;vsc9959_ops,</div><div class='add'>+	.vcap			= vsc9959_vcap_props,</div><div class='add'>+	.vcap_pol_base		= VSC9959_VCAP_POLICER_BASE,</div><div class='add'>+	.vcap_pol_max		= VSC9959_VCAP_POLICER_MAX,</div><div class='add'>+	.vcap_pol_base2		= 0,</div><div class='add'>+	.vcap_pol_max2		= 0,</div><div class='add'>+	.num_mact_rows		= 2048,</div><div class='add'>+	.num_ports		= VSC9959_NUM_PORTS,</div><div class='add'>+	.quirks			= FELIX_MAC_QUIRKS,</div><div class='add'>+	.quirk_no_xtr_irq	= true,</div><div class='add'>+	.ptp_caps		= &amp;vsc9959_ptp_caps,</div><div class='add'>+	.mdio_bus_alloc		= vsc9959_mdio_bus_alloc,</div><div class='add'>+	.mdio_bus_free		= vsc9959_mdio_bus_free,</div><div class='add'>+	.port_modes		= vsc9959_port_modes,</div><div class='add'>+	.port_setup_tc		= vsc9959_port_setup_tc,</div><div class='add'>+	.port_sched_speed_set	= vsc9959_sched_speed_set,</div><div class='add'>+	.request_irq		= vsc9959_request_irq,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int felix_pci_probe(struct pci_dev *pdev,</div><div class='add'>+			   const struct pci_device_id *id)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	resource_size_t switch_base;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = pci_enable_device(pdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "device enable failed: %pe\n", ERR_PTR(err));</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pci_set_master(pdev);</div><div class='add'>+</div><div class='add'>+	switch_base = pci_resource_start(pdev, VSC9959_SWITCH_PCI_BAR);</div><div class='add'>+</div><div class='add'>+	err = felix_register_switch(dev, switch_base, OCELOT_NUM_TC,</div><div class='add'>+				    true, true, DSA_TAG_PROTO_OCELOT,</div><div class='add'>+				    &amp;felix_info_vsc9959);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_disable;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_disable:</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void felix_pci_remove(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct felix *felix = pci_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	if (!felix)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dsa_unregister_switch(felix-&gt;ds);</div><div class='add'>+</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void felix_pci_shutdown(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct felix *felix = pci_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	if (!felix)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dsa_switch_shutdown(felix-&gt;ds);</div><div class='add'>+</div><div class='add'>+	pci_set_drvdata(pdev, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct pci_device_id felix_ids[] = {</div><div class='add'>+	{</div><div class='add'>+		/* NXP LS1028A */</div><div class='add'>+		PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, 0xEEF0),</div><div class='add'>+	},</div><div class='add'>+	{ 0, }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(pci, felix_ids);</div><div class='add'>+</div><div class='add'>+static struct pci_driver felix_vsc9959_pci_driver = {</div><div class='add'>+	.name		= "mscc_felix",</div><div class='add'>+	.id_table	= felix_ids,</div><div class='add'>+	.probe		= felix_pci_probe,</div><div class='add'>+	.remove		= felix_pci_remove,</div><div class='add'>+	.shutdown	= felix_pci_shutdown,</div><div class='add'>+};</div><div class='add'>+module_pci_driver(felix_vsc9959_pci_driver);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("Felix Switch driver");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/net/dsa/ocelot/ocelot_ext.c b/drivers/net/dsa/ocelot/ocelot_ext.c<br/>new file mode 100644<br/>index 000000000000..d5c557a20292<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/ocelot/ocelot_ext.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/ocelot/ocelot_ext.c</a></div><div class='hunk'>@@ -0,0 +1,112 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2021-2022 Innovative Advantage Inc.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/mfd/ocelot.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;soc/mscc/ocelot.h&gt;</div><div class='add'>+#include &lt;soc/mscc/vsc7514_regs.h&gt;</div><div class='add'>+#include "felix.h"</div><div class='add'>+</div><div class='add'>+#define VSC7514_NUM_PORTS		11</div><div class='add'>+</div><div class='add'>+#define OCELOT_PORT_MODE_SERDES		(OCELOT_PORT_MODE_SGMII | \</div><div class='add'>+					 OCELOT_PORT_MODE_QSGMII)</div><div class='add'>+</div><div class='add'>+static const u32 vsc7512_port_modes[VSC7514_NUM_PORTS] = {</div><div class='add'>+	OCELOT_PORT_MODE_INTERNAL,</div><div class='add'>+	OCELOT_PORT_MODE_INTERNAL,</div><div class='add'>+	OCELOT_PORT_MODE_INTERNAL,</div><div class='add'>+	OCELOT_PORT_MODE_INTERNAL,</div><div class='add'>+	OCELOT_PORT_MODE_SERDES,</div><div class='add'>+	OCELOT_PORT_MODE_SERDES,</div><div class='add'>+	OCELOT_PORT_MODE_SERDES,</div><div class='add'>+	OCELOT_PORT_MODE_SERDES,</div><div class='add'>+	OCELOT_PORT_MODE_SERDES,</div><div class='add'>+	OCELOT_PORT_MODE_SGMII,</div><div class='add'>+	OCELOT_PORT_MODE_SERDES,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ocelot_ops ocelot_ext_ops = {</div><div class='add'>+	.reset		= ocelot_reset,</div><div class='add'>+	.wm_enc		= ocelot_wm_enc,</div><div class='add'>+	.wm_dec		= ocelot_wm_dec,</div><div class='add'>+	.wm_stat	= ocelot_wm_stat,</div><div class='add'>+	.port_to_netdev	= felix_port_to_netdev,</div><div class='add'>+	.netdev_to_port	= felix_netdev_to_port,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char * const vsc7512_resource_names[TARGET_MAX] = {</div><div class='add'>+	[SYS] = "sys",</div><div class='add'>+	[REW] = "rew",</div><div class='add'>+	[S0] = "s0",</div><div class='add'>+	[S1] = "s1",</div><div class='add'>+	[S2] = "s2",</div><div class='add'>+	[QS] = "qs",</div><div class='add'>+	[QSYS] = "qsys",</div><div class='add'>+	[ANA] = "ana",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct felix_info vsc7512_info = {</div><div class='add'>+	.resource_names			= vsc7512_resource_names,</div><div class='add'>+	.regfields			= vsc7514_regfields,</div><div class='add'>+	.map				= vsc7514_regmap,</div><div class='add'>+	.ops				= &amp;ocelot_ext_ops,</div><div class='add'>+	.vcap				= vsc7514_vcap_props,</div><div class='add'>+	.num_mact_rows			= 1024,</div><div class='add'>+	.num_ports			= VSC7514_NUM_PORTS,</div><div class='add'>+	.port_modes			= vsc7512_port_modes,</div><div class='add'>+	.phylink_mac_config		= ocelot_phylink_mac_config,</div><div class='add'>+	.configure_serdes		= ocelot_port_configure_serdes,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int ocelot_ext_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	return felix_register_switch(&amp;pdev-&gt;dev, 0, 1, false, false,</div><div class='add'>+				     DSA_TAG_PROTO_OCELOT, &amp;vsc7512_info);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocelot_ext_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct felix *felix = dev_get_drvdata(&amp;pdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	if (!felix)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dsa_unregister_switch(felix-&gt;ds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ocelot_ext_shutdown(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct felix *felix = dev_get_drvdata(&amp;pdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	if (!felix)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dsa_switch_shutdown(felix-&gt;ds);</div><div class='add'>+</div><div class='add'>+	dev_set_drvdata(&amp;pdev-&gt;dev, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id ocelot_ext_switch_of_match[] = {</div><div class='add'>+	{ .compatible = "mscc,vsc7512-switch" },</div><div class='add'>+	{ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, ocelot_ext_switch_of_match);</div><div class='add'>+</div><div class='add'>+static struct platform_driver ocelot_ext_switch_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "ocelot-ext-switch",</div><div class='add'>+		.of_match_table = ocelot_ext_switch_of_match,</div><div class='add'>+	},</div><div class='add'>+	.probe = ocelot_ext_probe,</div><div class='add'>+	.remove = ocelot_ext_remove,</div><div class='add'>+	.shutdown = ocelot_ext_shutdown,</div><div class='add'>+};</div><div class='add'>+module_platform_driver(ocelot_ext_switch_driver);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("External Ocelot Switch driver");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_IMPORT_NS("MFD_OCELOT");</div><div class='head'>diff --git a/drivers/net/dsa/ocelot/seville_vsc9953.c b/drivers/net/dsa/ocelot/seville_vsc9953.c<br/>new file mode 100644<br/>index 000000000000..eb3944ba2a72<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/ocelot/seville_vsc9953.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/ocelot/seville_vsc9953.c</a></div><div class='hunk'>@@ -0,0 +1,1027 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+/* Distributed Switch Architecture VSC9953 driver</div><div class='add'>+ * Copyright (C) 2020, Maxim Kochetkov &lt;fido_max@inbox.ru&gt;</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;soc/mscc/ocelot_vcap.h&gt;</div><div class='add'>+#include &lt;soc/mscc/ocelot_sys.h&gt;</div><div class='add'>+#include &lt;soc/mscc/ocelot.h&gt;</div><div class='add'>+#include &lt;linux/mdio/mdio-mscc-miim.h&gt;</div><div class='add'>+#include &lt;linux/mod_devicetable.h&gt;</div><div class='add'>+#include &lt;linux/of_mdio.h&gt;</div><div class='add'>+#include &lt;linux/pcs-lynx.h&gt;</div><div class='add'>+#include &lt;linux/dsa/ocelot.h&gt;</div><div class='add'>+#include &lt;linux/iopoll.h&gt;</div><div class='add'>+#include "felix.h"</div><div class='add'>+</div><div class='add'>+#define VSC9953_NUM_PORTS			10</div><div class='add'>+</div><div class='add'>+#define VSC9953_VCAP_POLICER_BASE		11</div><div class='add'>+#define VSC9953_VCAP_POLICER_MAX		31</div><div class='add'>+#define VSC9953_VCAP_POLICER_BASE2		120</div><div class='add'>+#define VSC9953_VCAP_POLICER_MAX2		161</div><div class='add'>+</div><div class='add'>+#define VSC9953_PORT_MODE_SERDES		(OCELOT_PORT_MODE_1000BASEX | \</div><div class='add'>+						 OCELOT_PORT_MODE_SGMII | \</div><div class='add'>+						 OCELOT_PORT_MODE_QSGMII)</div><div class='add'>+</div><div class='add'>+static const u32 vsc9953_port_modes[VSC9953_NUM_PORTS] = {</div><div class='add'>+	VSC9953_PORT_MODE_SERDES,</div><div class='add'>+	VSC9953_PORT_MODE_SERDES,</div><div class='add'>+	VSC9953_PORT_MODE_SERDES,</div><div class='add'>+	VSC9953_PORT_MODE_SERDES,</div><div class='add'>+	VSC9953_PORT_MODE_SERDES,</div><div class='add'>+	VSC9953_PORT_MODE_SERDES,</div><div class='add'>+	VSC9953_PORT_MODE_SERDES,</div><div class='add'>+	VSC9953_PORT_MODE_SERDES,</div><div class='add'>+	OCELOT_PORT_MODE_INTERNAL,</div><div class='add'>+	OCELOT_PORT_MODE_INTERNAL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 vsc9953_ana_regmap[] = {</div><div class='add'>+	REG(ANA_ADVLEARN,			0x00b500),</div><div class='add'>+	REG(ANA_VLANMASK,			0x00b504),</div><div class='add'>+	REG_RESERVED(ANA_PORT_B_DOMAIN),</div><div class='add'>+	REG(ANA_ANAGEFIL,			0x00b50c),</div><div class='add'>+	REG(ANA_ANEVENTS,			0x00b510),</div><div class='add'>+	REG(ANA_STORMLIMIT_BURST,		0x00b514),</div><div class='add'>+	REG(ANA_STORMLIMIT_CFG,			0x00b518),</div><div class='add'>+	REG(ANA_ISOLATED_PORTS,			0x00b528),</div><div class='add'>+	REG(ANA_COMMUNITY_PORTS,		0x00b52c),</div><div class='add'>+	REG(ANA_AUTOAGE,			0x00b530),</div><div class='add'>+	REG(ANA_MACTOPTIONS,			0x00b534),</div><div class='add'>+	REG(ANA_LEARNDISC,			0x00b538),</div><div class='add'>+	REG(ANA_AGENCTRL,			0x00b53c),</div><div class='add'>+	REG(ANA_MIRRORPORTS,			0x00b540),</div><div class='add'>+	REG(ANA_EMIRRORPORTS,			0x00b544),</div><div class='add'>+	REG(ANA_FLOODING,			0x00b548),</div><div class='add'>+	REG(ANA_FLOODING_IPMC,			0x00b54c),</div><div class='add'>+	REG(ANA_SFLOW_CFG,			0x00b550),</div><div class='add'>+	REG(ANA_PORT_MODE,			0x00b57c),</div><div class='add'>+	REG_RESERVED(ANA_CUT_THRU_CFG),</div><div class='add'>+	REG(ANA_PGID_PGID,			0x00b600),</div><div class='add'>+	REG(ANA_TABLES_ANMOVED,			0x00b4ac),</div><div class='add'>+	REG(ANA_TABLES_MACHDATA,		0x00b4b0),</div><div class='add'>+	REG(ANA_TABLES_MACLDATA,		0x00b4b4),</div><div class='add'>+	REG_RESERVED(ANA_TABLES_STREAMDATA),</div><div class='add'>+	REG(ANA_TABLES_MACACCESS,		0x00b4b8),</div><div class='add'>+	REG(ANA_TABLES_MACTINDX,		0x00b4bc),</div><div class='add'>+	REG(ANA_TABLES_VLANACCESS,		0x00b4c0),</div><div class='add'>+	REG(ANA_TABLES_VLANTIDX,		0x00b4c4),</div><div class='add'>+	REG_RESERVED(ANA_TABLES_ISDXACCESS),</div><div class='add'>+	REG_RESERVED(ANA_TABLES_ISDXTIDX),</div><div class='add'>+	REG(ANA_TABLES_ENTRYLIM,		0x00b480),</div><div class='add'>+	REG_RESERVED(ANA_TABLES_PTP_ID_HIGH),</div><div class='add'>+	REG_RESERVED(ANA_TABLES_PTP_ID_LOW),</div><div class='add'>+	REG_RESERVED(ANA_TABLES_STREAMACCESS),</div><div class='add'>+	REG_RESERVED(ANA_TABLES_STREAMTIDX),</div><div class='add'>+	REG_RESERVED(ANA_TABLES_SEQ_HISTORY),</div><div class='add'>+	REG_RESERVED(ANA_TABLES_SEQ_MASK),</div><div class='add'>+	REG_RESERVED(ANA_TABLES_SFID_MASK),</div><div class='add'>+	REG_RESERVED(ANA_TABLES_SFIDACCESS),</div><div class='add'>+	REG_RESERVED(ANA_TABLES_SFIDTIDX),</div><div class='add'>+	REG_RESERVED(ANA_MSTI_STATE),</div><div class='add'>+	REG_RESERVED(ANA_OAM_UPM_LM_CNT),</div><div class='add'>+	REG_RESERVED(ANA_SG_ACCESS_CTRL),</div><div class='add'>+	REG_RESERVED(ANA_SG_CONFIG_REG_1),</div><div class='add'>+	REG_RESERVED(ANA_SG_CONFIG_REG_2),</div><div class='add'>+	REG_RESERVED(ANA_SG_CONFIG_REG_3),</div><div class='add'>+	REG_RESERVED(ANA_SG_CONFIG_REG_4),</div><div class='add'>+	REG_RESERVED(ANA_SG_CONFIG_REG_5),</div><div class='add'>+	REG_RESERVED(ANA_SG_GCL_GS_CONFIG),</div><div class='add'>+	REG_RESERVED(ANA_SG_GCL_TI_CONFIG),</div><div class='add'>+	REG_RESERVED(ANA_SG_STATUS_REG_1),</div><div class='add'>+	REG_RESERVED(ANA_SG_STATUS_REG_2),</div><div class='add'>+	REG_RESERVED(ANA_SG_STATUS_REG_3),</div><div class='add'>+	REG(ANA_PORT_VLAN_CFG,			0x000000),</div><div class='add'>+	REG(ANA_PORT_DROP_CFG,			0x000004),</div><div class='add'>+	REG(ANA_PORT_QOS_CFG,			0x000008),</div><div class='add'>+	REG(ANA_PORT_VCAP_CFG,			0x00000c),</div><div class='add'>+	REG(ANA_PORT_VCAP_S1_KEY_CFG,		0x000010),</div><div class='add'>+	REG(ANA_PORT_VCAP_S2_CFG,		0x00001c),</div><div class='add'>+	REG(ANA_PORT_PCP_DEI_MAP,		0x000020),</div><div class='add'>+	REG(ANA_PORT_CPU_FWD_CFG,		0x000060),</div><div class='add'>+	REG(ANA_PORT_CPU_FWD_BPDU_CFG,		0x000064),</div><div class='add'>+	REG(ANA_PORT_CPU_FWD_GARP_CFG,		0x000068),</div><div class='add'>+	REG(ANA_PORT_CPU_FWD_CCM_CFG,		0x00006c),</div><div class='add'>+	REG(ANA_PORT_PORT_CFG,			0x000070),</div><div class='add'>+	REG(ANA_PORT_POL_CFG,			0x000074),</div><div class='add'>+	REG_RESERVED(ANA_PORT_PTP_CFG),</div><div class='add'>+	REG_RESERVED(ANA_PORT_PTP_DLY1_CFG),</div><div class='add'>+	REG_RESERVED(ANA_PORT_PTP_DLY2_CFG),</div><div class='add'>+	REG_RESERVED(ANA_PORT_SFID_CFG),</div><div class='add'>+	REG(ANA_PFC_PFC_CFG,			0x00c000),</div><div class='add'>+	REG_RESERVED(ANA_PFC_PFC_TIMER),</div><div class='add'>+	REG_RESERVED(ANA_IPT_OAM_MEP_CFG),</div><div class='add'>+	REG_RESERVED(ANA_IPT_IPT),</div><div class='add'>+	REG_RESERVED(ANA_PPT_PPT),</div><div class='add'>+	REG_RESERVED(ANA_FID_MAP_FID_MAP),</div><div class='add'>+	REG(ANA_AGGR_CFG,			0x00c600),</div><div class='add'>+	REG(ANA_CPUQ_CFG,			0x00c604),</div><div class='add'>+	REG_RESERVED(ANA_CPUQ_CFG2),</div><div class='add'>+	REG(ANA_CPUQ_8021_CFG,			0x00c60c),</div><div class='add'>+	REG(ANA_DSCP_CFG,			0x00c64c),</div><div class='add'>+	REG(ANA_DSCP_REWR_CFG,			0x00c74c),</div><div class='add'>+	REG(ANA_VCAP_RNG_TYPE_CFG,		0x00c78c),</div><div class='add'>+	REG(ANA_VCAP_RNG_VAL_CFG,		0x00c7ac),</div><div class='add'>+	REG_RESERVED(ANA_VRAP_CFG),</div><div class='add'>+	REG_RESERVED(ANA_VRAP_HDR_DATA),</div><div class='add'>+	REG_RESERVED(ANA_VRAP_HDR_MASK),</div><div class='add'>+	REG(ANA_DISCARD_CFG,			0x00c7d8),</div><div class='add'>+	REG(ANA_FID_CFG,			0x00c7dc),</div><div class='add'>+	REG(ANA_POL_PIR_CFG,			0x00a000),</div><div class='add'>+	REG(ANA_POL_CIR_CFG,			0x00a004),</div><div class='add'>+	REG(ANA_POL_MODE_CFG,			0x00a008),</div><div class='add'>+	REG(ANA_POL_PIR_STATE,			0x00a00c),</div><div class='add'>+	REG(ANA_POL_CIR_STATE,			0x00a010),</div><div class='add'>+	REG_RESERVED(ANA_POL_STATE),</div><div class='add'>+	REG(ANA_POL_FLOWC,			0x00c280),</div><div class='add'>+	REG(ANA_POL_HYST,			0x00c2ec),</div><div class='add'>+	REG_RESERVED(ANA_POL_MISC_CFG),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 vsc9953_qs_regmap[] = {</div><div class='add'>+	REG(QS_XTR_GRP_CFG,			0x000000),</div><div class='add'>+	REG(QS_XTR_RD,				0x000008),</div><div class='add'>+	REG(QS_XTR_FRM_PRUNING,			0x000010),</div><div class='add'>+	REG(QS_XTR_FLUSH,			0x000018),</div><div class='add'>+	REG(QS_XTR_DATA_PRESENT,		0x00001c),</div><div class='add'>+	REG(QS_XTR_CFG,				0x000020),</div><div class='add'>+	REG(QS_INJ_GRP_CFG,			0x000024),</div><div class='add'>+	REG(QS_INJ_WR,				0x00002c),</div><div class='add'>+	REG(QS_INJ_CTRL,			0x000034),</div><div class='add'>+	REG(QS_INJ_STATUS,			0x00003c),</div><div class='add'>+	REG(QS_INJ_ERR,				0x000040),</div><div class='add'>+	REG_RESERVED(QS_INH_DBG),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 vsc9953_vcap_regmap[] = {</div><div class='add'>+	/* VCAP_CORE_CFG */</div><div class='add'>+	REG(VCAP_CORE_UPDATE_CTRL,		0x000000),</div><div class='add'>+	REG(VCAP_CORE_MV_CFG,			0x000004),</div><div class='add'>+	/* VCAP_CORE_CACHE */</div><div class='add'>+	REG(VCAP_CACHE_ENTRY_DAT,		0x000008),</div><div class='add'>+	REG(VCAP_CACHE_MASK_DAT,		0x000108),</div><div class='add'>+	REG(VCAP_CACHE_ACTION_DAT,		0x000208),</div><div class='add'>+	REG(VCAP_CACHE_CNT_DAT,			0x000308),</div><div class='add'>+	REG(VCAP_CACHE_TG_DAT,			0x000388),</div><div class='add'>+	/* VCAP_CONST */</div><div class='add'>+	REG(VCAP_CONST_VCAP_VER,		0x000398),</div><div class='add'>+	REG(VCAP_CONST_ENTRY_WIDTH,		0x00039c),</div><div class='add'>+	REG(VCAP_CONST_ENTRY_CNT,		0x0003a0),</div><div class='add'>+	REG(VCAP_CONST_ENTRY_SWCNT,		0x0003a4),</div><div class='add'>+	REG(VCAP_CONST_ENTRY_TG_WIDTH,		0x0003a8),</div><div class='add'>+	REG(VCAP_CONST_ACTION_DEF_CNT,		0x0003ac),</div><div class='add'>+	REG(VCAP_CONST_ACTION_WIDTH,		0x0003b0),</div><div class='add'>+	REG(VCAP_CONST_CNT_WIDTH,		0x0003b4),</div><div class='add'>+	REG_RESERVED(VCAP_CONST_CORE_CNT),</div><div class='add'>+	REG_RESERVED(VCAP_CONST_IF_CNT),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 vsc9953_qsys_regmap[] = {</div><div class='add'>+	REG(QSYS_PORT_MODE,			0x003600),</div><div class='add'>+	REG(QSYS_SWITCH_PORT_MODE,		0x003630),</div><div class='add'>+	REG(QSYS_STAT_CNT_CFG,			0x00365c),</div><div class='add'>+	REG(QSYS_EEE_CFG,			0x003660),</div><div class='add'>+	REG(QSYS_EEE_THRES,			0x003688),</div><div class='add'>+	REG(QSYS_IGR_NO_SHARING,		0x00368c),</div><div class='add'>+	REG(QSYS_EGR_NO_SHARING,		0x003690),</div><div class='add'>+	REG(QSYS_SW_STATUS,			0x003694),</div><div class='add'>+	REG(QSYS_EXT_CPU_CFG,			0x0036c0),</div><div class='add'>+	REG_RESERVED(QSYS_PAD_CFG),</div><div class='add'>+	REG(QSYS_CPU_GROUP_MAP,			0x0036c8),</div><div class='add'>+	REG_RESERVED(QSYS_QMAP),</div><div class='add'>+	REG_RESERVED(QSYS_ISDX_SGRP),</div><div class='add'>+	REG_RESERVED(QSYS_TIMED_FRAME_ENTRY),</div><div class='add'>+	REG_RESERVED(QSYS_TFRM_MISC),</div><div class='add'>+	REG_RESERVED(QSYS_TFRM_PORT_DLY),</div><div class='add'>+	REG_RESERVED(QSYS_TFRM_TIMER_CFG_1),</div><div class='add'>+	REG_RESERVED(QSYS_TFRM_TIMER_CFG_2),</div><div class='add'>+	REG_RESERVED(QSYS_TFRM_TIMER_CFG_3),</div><div class='add'>+	REG_RESERVED(QSYS_TFRM_TIMER_CFG_4),</div><div class='add'>+	REG_RESERVED(QSYS_TFRM_TIMER_CFG_5),</div><div class='add'>+	REG_RESERVED(QSYS_TFRM_TIMER_CFG_6),</div><div class='add'>+	REG_RESERVED(QSYS_TFRM_TIMER_CFG_7),</div><div class='add'>+	REG_RESERVED(QSYS_TFRM_TIMER_CFG_8),</div><div class='add'>+	REG(QSYS_RED_PROFILE,			0x003724),</div><div class='add'>+	REG(QSYS_RES_QOS_MODE,			0x003764),</div><div class='add'>+	REG(QSYS_RES_CFG,			0x004000),</div><div class='add'>+	REG(QSYS_RES_STAT,			0x004004),</div><div class='add'>+	REG(QSYS_EGR_DROP_MODE,			0x003768),</div><div class='add'>+	REG(QSYS_EQ_CTRL,			0x00376c),</div><div class='add'>+	REG_RESERVED(QSYS_EVENTS_CORE),</div><div class='add'>+	REG_RESERVED(QSYS_QMAXSDU_CFG_0),</div><div class='add'>+	REG_RESERVED(QSYS_QMAXSDU_CFG_1),</div><div class='add'>+	REG_RESERVED(QSYS_QMAXSDU_CFG_2),</div><div class='add'>+	REG_RESERVED(QSYS_QMAXSDU_CFG_3),</div><div class='add'>+	REG_RESERVED(QSYS_QMAXSDU_CFG_4),</div><div class='add'>+	REG_RESERVED(QSYS_QMAXSDU_CFG_5),</div><div class='add'>+	REG_RESERVED(QSYS_QMAXSDU_CFG_6),</div><div class='add'>+	REG_RESERVED(QSYS_QMAXSDU_CFG_7),</div><div class='add'>+	REG_RESERVED(QSYS_PREEMPTION_CFG),</div><div class='add'>+	REG(QSYS_CIR_CFG,			0x000000),</div><div class='add'>+	REG_RESERVED(QSYS_EIR_CFG),</div><div class='add'>+	REG(QSYS_SE_CFG,			0x000008),</div><div class='add'>+	REG(QSYS_SE_DWRR_CFG,			0x00000c),</div><div class='add'>+	REG_RESERVED(QSYS_SE_CONNECT),</div><div class='add'>+	REG_RESERVED(QSYS_SE_DLB_SENSE),</div><div class='add'>+	REG(QSYS_CIR_STATE,			0x000044),</div><div class='add'>+	REG_RESERVED(QSYS_EIR_STATE),</div><div class='add'>+	REG_RESERVED(QSYS_SE_STATE),</div><div class='add'>+	REG(QSYS_HSCH_MISC_CFG,			0x003774),</div><div class='add'>+	REG_RESERVED(QSYS_TAG_CONFIG),</div><div class='add'>+	REG_RESERVED(QSYS_TAS_PARAM_CFG_CTRL),</div><div class='add'>+	REG_RESERVED(QSYS_PORT_MAX_SDU),</div><div class='add'>+	REG_RESERVED(QSYS_PARAM_CFG_REG_1),</div><div class='add'>+	REG_RESERVED(QSYS_PARAM_CFG_REG_2),</div><div class='add'>+	REG_RESERVED(QSYS_PARAM_CFG_REG_3),</div><div class='add'>+	REG_RESERVED(QSYS_PARAM_CFG_REG_4),</div><div class='add'>+	REG_RESERVED(QSYS_PARAM_CFG_REG_5),</div><div class='add'>+	REG_RESERVED(QSYS_GCL_CFG_REG_1),</div><div class='add'>+	REG_RESERVED(QSYS_GCL_CFG_REG_2),</div><div class='add'>+	REG_RESERVED(QSYS_PARAM_STATUS_REG_1),</div><div class='add'>+	REG_RESERVED(QSYS_PARAM_STATUS_REG_2),</div><div class='add'>+	REG_RESERVED(QSYS_PARAM_STATUS_REG_3),</div><div class='add'>+	REG_RESERVED(QSYS_PARAM_STATUS_REG_4),</div><div class='add'>+	REG_RESERVED(QSYS_PARAM_STATUS_REG_5),</div><div class='add'>+	REG_RESERVED(QSYS_PARAM_STATUS_REG_6),</div><div class='add'>+	REG_RESERVED(QSYS_PARAM_STATUS_REG_7),</div><div class='add'>+	REG_RESERVED(QSYS_PARAM_STATUS_REG_8),</div><div class='add'>+	REG_RESERVED(QSYS_PARAM_STATUS_REG_9),</div><div class='add'>+	REG_RESERVED(QSYS_GCL_STATUS_REG_1),</div><div class='add'>+	REG_RESERVED(QSYS_GCL_STATUS_REG_2),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 vsc9953_rew_regmap[] = {</div><div class='add'>+	REG(REW_PORT_VLAN_CFG,			0x000000),</div><div class='add'>+	REG(REW_TAG_CFG,			0x000004),</div><div class='add'>+	REG(REW_PORT_CFG,			0x000008),</div><div class='add'>+	REG(REW_DSCP_CFG,			0x00000c),</div><div class='add'>+	REG(REW_PCP_DEI_QOS_MAP_CFG,		0x000010),</div><div class='add'>+	REG_RESERVED(REW_PTP_CFG),</div><div class='add'>+	REG_RESERVED(REW_PTP_DLY1_CFG),</div><div class='add'>+	REG_RESERVED(REW_RED_TAG_CFG),</div><div class='add'>+	REG(REW_DSCP_REMAP_DP1_CFG,		0x000610),</div><div class='add'>+	REG(REW_DSCP_REMAP_CFG,			0x000710),</div><div class='add'>+	REG_RESERVED(REW_STAT_CFG),</div><div class='add'>+	REG_RESERVED(REW_REW_STICKY),</div><div class='add'>+	REG_RESERVED(REW_PPT),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 vsc9953_sys_regmap[] = {</div><div class='add'>+	REG(SYS_COUNT_RX_OCTETS,		0x000000),</div><div class='add'>+	REG(SYS_COUNT_RX_UNICAST,		0x000004),</div><div class='add'>+	REG(SYS_COUNT_RX_MULTICAST,		0x000008),</div><div class='add'>+	REG(SYS_COUNT_RX_BROADCAST,		0x00000c),</div><div class='add'>+	REG(SYS_COUNT_RX_SHORTS,		0x000010),</div><div class='add'>+	REG(SYS_COUNT_RX_FRAGMENTS,		0x000014),</div><div class='add'>+	REG(SYS_COUNT_RX_JABBERS,		0x000018),</div><div class='add'>+	REG(SYS_COUNT_RX_CRC_ALIGN_ERRS,	0x00001c),</div><div class='add'>+	REG(SYS_COUNT_RX_SYM_ERRS,		0x000020),</div><div class='add'>+	REG(SYS_COUNT_RX_64,			0x000024),</div><div class='add'>+	REG(SYS_COUNT_RX_65_127,		0x000028),</div><div class='add'>+	REG(SYS_COUNT_RX_128_255,		0x00002c),</div><div class='add'>+	REG(SYS_COUNT_RX_256_511,		0x000030),</div><div class='add'>+	REG(SYS_COUNT_RX_512_1023,		0x000034),</div><div class='add'>+	REG(SYS_COUNT_RX_1024_1526,		0x000038),</div><div class='add'>+	REG(SYS_COUNT_RX_1527_MAX,		0x00003c),</div><div class='add'>+	REG(SYS_COUNT_RX_PAUSE,			0x000040),</div><div class='add'>+	REG(SYS_COUNT_RX_CONTROL,		0x000044),</div><div class='add'>+	REG(SYS_COUNT_RX_LONGS,			0x000048),</div><div class='add'>+	REG(SYS_COUNT_RX_CLASSIFIED_DROPS,	0x00004c),</div><div class='add'>+	REG(SYS_COUNT_RX_RED_PRIO_0,		0x000050),</div><div class='add'>+	REG(SYS_COUNT_RX_RED_PRIO_1,		0x000054),</div><div class='add'>+	REG(SYS_COUNT_RX_RED_PRIO_2,		0x000058),</div><div class='add'>+	REG(SYS_COUNT_RX_RED_PRIO_3,		0x00005c),</div><div class='add'>+	REG(SYS_COUNT_RX_RED_PRIO_4,		0x000060),</div><div class='add'>+	REG(SYS_COUNT_RX_RED_PRIO_5,		0x000064),</div><div class='add'>+	REG(SYS_COUNT_RX_RED_PRIO_6,		0x000068),</div><div class='add'>+	REG(SYS_COUNT_RX_RED_PRIO_7,		0x00006c),</div><div class='add'>+	REG(SYS_COUNT_RX_YELLOW_PRIO_0,		0x000070),</div><div class='add'>+	REG(SYS_COUNT_RX_YELLOW_PRIO_1,		0x000074),</div><div class='add'>+	REG(SYS_COUNT_RX_YELLOW_PRIO_2,		0x000078),</div><div class='add'>+	REG(SYS_COUNT_RX_YELLOW_PRIO_3,		0x00007c),</div><div class='add'>+	REG(SYS_COUNT_RX_YELLOW_PRIO_4,		0x000080),</div><div class='add'>+	REG(SYS_COUNT_RX_YELLOW_PRIO_5,		0x000084),</div><div class='add'>+	REG(SYS_COUNT_RX_YELLOW_PRIO_6,		0x000088),</div><div class='add'>+	REG(SYS_COUNT_RX_YELLOW_PRIO_7,		0x00008c),</div><div class='add'>+	REG(SYS_COUNT_RX_GREEN_PRIO_0,		0x000090),</div><div class='add'>+	REG(SYS_COUNT_RX_GREEN_PRIO_1,		0x000094),</div><div class='add'>+	REG(SYS_COUNT_RX_GREEN_PRIO_2,		0x000098),</div><div class='add'>+	REG(SYS_COUNT_RX_GREEN_PRIO_3,		0x00009c),</div><div class='add'>+	REG(SYS_COUNT_RX_GREEN_PRIO_4,		0x0000a0),</div><div class='add'>+	REG(SYS_COUNT_RX_GREEN_PRIO_5,		0x0000a4),</div><div class='add'>+	REG(SYS_COUNT_RX_GREEN_PRIO_6,		0x0000a8),</div><div class='add'>+	REG(SYS_COUNT_RX_GREEN_PRIO_7,		0x0000ac),</div><div class='add'>+	REG(SYS_COUNT_TX_OCTETS,		0x000100),</div><div class='add'>+	REG(SYS_COUNT_TX_UNICAST,		0x000104),</div><div class='add'>+	REG(SYS_COUNT_TX_MULTICAST,		0x000108),</div><div class='add'>+	REG(SYS_COUNT_TX_BROADCAST,		0x00010c),</div><div class='add'>+	REG(SYS_COUNT_TX_COLLISION,		0x000110),</div><div class='add'>+	REG(SYS_COUNT_TX_DROPS,			0x000114),</div><div class='add'>+	REG(SYS_COUNT_TX_PAUSE,			0x000118),</div><div class='add'>+	REG(SYS_COUNT_TX_64,			0x00011c),</div><div class='add'>+	REG(SYS_COUNT_TX_65_127,		0x000120),</div><div class='add'>+	REG(SYS_COUNT_TX_128_255,		0x000124),</div><div class='add'>+	REG(SYS_COUNT_TX_256_511,		0x000128),</div><div class='add'>+	REG(SYS_COUNT_TX_512_1023,		0x00012c),</div><div class='add'>+	REG(SYS_COUNT_TX_1024_1526,		0x000130),</div><div class='add'>+	REG(SYS_COUNT_TX_1527_MAX,		0x000134),</div><div class='add'>+	REG(SYS_COUNT_TX_YELLOW_PRIO_0,		0x000138),</div><div class='add'>+	REG(SYS_COUNT_TX_YELLOW_PRIO_1,		0x00013c),</div><div class='add'>+	REG(SYS_COUNT_TX_YELLOW_PRIO_2,		0x000140),</div><div class='add'>+	REG(SYS_COUNT_TX_YELLOW_PRIO_3,		0x000144),</div><div class='add'>+	REG(SYS_COUNT_TX_YELLOW_PRIO_4,		0x000148),</div><div class='add'>+	REG(SYS_COUNT_TX_YELLOW_PRIO_5,		0x00014c),</div><div class='add'>+	REG(SYS_COUNT_TX_YELLOW_PRIO_6,		0x000150),</div><div class='add'>+	REG(SYS_COUNT_TX_YELLOW_PRIO_7,		0x000154),</div><div class='add'>+	REG(SYS_COUNT_TX_GREEN_PRIO_0,		0x000158),</div><div class='add'>+	REG(SYS_COUNT_TX_GREEN_PRIO_1,		0x00015c),</div><div class='add'>+	REG(SYS_COUNT_TX_GREEN_PRIO_2,		0x000160),</div><div class='add'>+	REG(SYS_COUNT_TX_GREEN_PRIO_3,		0x000164),</div><div class='add'>+	REG(SYS_COUNT_TX_GREEN_PRIO_4,		0x000168),</div><div class='add'>+	REG(SYS_COUNT_TX_GREEN_PRIO_5,		0x00016c),</div><div class='add'>+	REG(SYS_COUNT_TX_GREEN_PRIO_6,		0x000170),</div><div class='add'>+	REG(SYS_COUNT_TX_GREEN_PRIO_7,		0x000174),</div><div class='add'>+	REG(SYS_COUNT_TX_AGED,			0x000178),</div><div class='add'>+	REG(SYS_COUNT_DROP_LOCAL,		0x000200),</div><div class='add'>+	REG(SYS_COUNT_DROP_TAIL,		0x000204),</div><div class='add'>+	REG(SYS_COUNT_DROP_YELLOW_PRIO_0,	0x000208),</div><div class='add'>+	REG(SYS_COUNT_DROP_YELLOW_PRIO_1,	0x00020c),</div><div class='add'>+	REG(SYS_COUNT_DROP_YELLOW_PRIO_2,	0x000210),</div><div class='add'>+	REG(SYS_COUNT_DROP_YELLOW_PRIO_3,	0x000214),</div><div class='add'>+	REG(SYS_COUNT_DROP_YELLOW_PRIO_4,	0x000218),</div><div class='add'>+	REG(SYS_COUNT_DROP_YELLOW_PRIO_5,	0x00021c),</div><div class='add'>+	REG(SYS_COUNT_DROP_YELLOW_PRIO_6,	0x000220),</div><div class='add'>+	REG(SYS_COUNT_DROP_YELLOW_PRIO_7,	0x000224),</div><div class='add'>+	REG(SYS_COUNT_DROP_GREEN_PRIO_0,	0x000228),</div><div class='add'>+	REG(SYS_COUNT_DROP_GREEN_PRIO_1,	0x00022c),</div><div class='add'>+	REG(SYS_COUNT_DROP_GREEN_PRIO_2,	0x000230),</div><div class='add'>+	REG(SYS_COUNT_DROP_GREEN_PRIO_3,	0x000234),</div><div class='add'>+	REG(SYS_COUNT_DROP_GREEN_PRIO_4,	0x000238),</div><div class='add'>+	REG(SYS_COUNT_DROP_GREEN_PRIO_5,	0x00023c),</div><div class='add'>+	REG(SYS_COUNT_DROP_GREEN_PRIO_6,	0x000240),</div><div class='add'>+	REG(SYS_COUNT_DROP_GREEN_PRIO_7,	0x000244),</div><div class='add'>+	REG(SYS_RESET_CFG,			0x000318),</div><div class='add'>+	REG_RESERVED(SYS_SR_ETYPE_CFG),</div><div class='add'>+	REG(SYS_VLAN_ETYPE_CFG,			0x000320),</div><div class='add'>+	REG(SYS_PORT_MODE,			0x000324),</div><div class='add'>+	REG(SYS_FRONT_PORT_MODE,		0x000354),</div><div class='add'>+	REG(SYS_FRM_AGING,			0x00037c),</div><div class='add'>+	REG(SYS_STAT_CFG,			0x000380),</div><div class='add'>+	REG_RESERVED(SYS_SW_STATUS),</div><div class='add'>+	REG_RESERVED(SYS_MISC_CFG),</div><div class='add'>+	REG_RESERVED(SYS_REW_MAC_HIGH_CFG),</div><div class='add'>+	REG_RESERVED(SYS_REW_MAC_LOW_CFG),</div><div class='add'>+	REG_RESERVED(SYS_TIMESTAMP_OFFSET),</div><div class='add'>+	REG(SYS_PAUSE_CFG,			0x00044c),</div><div class='add'>+	REG(SYS_PAUSE_TOT_CFG,			0x000478),</div><div class='add'>+	REG(SYS_ATOP,				0x00047c),</div><div class='add'>+	REG(SYS_ATOP_TOT_CFG,			0x0004a8),</div><div class='add'>+	REG(SYS_MAC_FC_CFG,			0x0004ac),</div><div class='add'>+	REG(SYS_MMGT,				0x0004d4),</div><div class='add'>+	REG_RESERVED(SYS_MMGT_FAST),</div><div class='add'>+	REG_RESERVED(SYS_EVENTS_DIF),</div><div class='add'>+	REG_RESERVED(SYS_EVENTS_CORE),</div><div class='add'>+	REG_RESERVED(SYS_PTP_STATUS),</div><div class='add'>+	REG_RESERVED(SYS_PTP_TXSTAMP),</div><div class='add'>+	REG_RESERVED(SYS_PTP_NXT),</div><div class='add'>+	REG_RESERVED(SYS_PTP_CFG),</div><div class='add'>+	REG_RESERVED(SYS_RAM_INIT),</div><div class='add'>+	REG_RESERVED(SYS_CM_ADDR),</div><div class='add'>+	REG_RESERVED(SYS_CM_DATA_WR),</div><div class='add'>+	REG_RESERVED(SYS_CM_DATA_RD),</div><div class='add'>+	REG_RESERVED(SYS_CM_OP),</div><div class='add'>+	REG_RESERVED(SYS_CM_DATA),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 vsc9953_gcb_regmap[] = {</div><div class='add'>+	REG(GCB_SOFT_RST,			0x000008),</div><div class='add'>+	REG(GCB_MIIM_MII_STATUS,		0x0000ac),</div><div class='add'>+	REG(GCB_MIIM_MII_CMD,			0x0000b4),</div><div class='add'>+	REG(GCB_MIIM_MII_DATA,			0x0000b8),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 vsc9953_dev_gmii_regmap[] = {</div><div class='add'>+	REG(DEV_CLOCK_CFG,			0x0),</div><div class='add'>+	REG(DEV_PORT_MISC,			0x4),</div><div class='add'>+	REG_RESERVED(DEV_EVENTS),</div><div class='add'>+	REG(DEV_EEE_CFG,			0xc),</div><div class='add'>+	REG_RESERVED(DEV_RX_PATH_DELAY),</div><div class='add'>+	REG_RESERVED(DEV_TX_PATH_DELAY),</div><div class='add'>+	REG_RESERVED(DEV_PTP_PREDICT_CFG),</div><div class='add'>+	REG(DEV_MAC_ENA_CFG,			0x10),</div><div class='add'>+	REG(DEV_MAC_MODE_CFG,			0x14),</div><div class='add'>+	REG(DEV_MAC_MAXLEN_CFG,			0x18),</div><div class='add'>+	REG(DEV_MAC_TAGS_CFG,			0x1c),</div><div class='add'>+	REG(DEV_MAC_ADV_CHK_CFG,		0x20),</div><div class='add'>+	REG(DEV_MAC_IFG_CFG,			0x24),</div><div class='add'>+	REG(DEV_MAC_HDX_CFG,			0x28),</div><div class='add'>+	REG_RESERVED(DEV_MAC_DBG_CFG),</div><div class='add'>+	REG(DEV_MAC_FC_MAC_LOW_CFG,		0x30),</div><div class='add'>+	REG(DEV_MAC_FC_MAC_HIGH_CFG,		0x34),</div><div class='add'>+	REG(DEV_MAC_STICKY,			0x38),</div><div class='add'>+	REG_RESERVED(PCS1G_CFG),</div><div class='add'>+	REG_RESERVED(PCS1G_MODE_CFG),</div><div class='add'>+	REG_RESERVED(PCS1G_SD_CFG),</div><div class='add'>+	REG_RESERVED(PCS1G_ANEG_CFG),</div><div class='add'>+	REG_RESERVED(PCS1G_ANEG_NP_CFG),</div><div class='add'>+	REG_RESERVED(PCS1G_LB_CFG),</div><div class='add'>+	REG_RESERVED(PCS1G_DBG_CFG),</div><div class='add'>+	REG_RESERVED(PCS1G_CDET_CFG),</div><div class='add'>+	REG_RESERVED(PCS1G_ANEG_STATUS),</div><div class='add'>+	REG_RESERVED(PCS1G_ANEG_NP_STATUS),</div><div class='add'>+	REG_RESERVED(PCS1G_LINK_STATUS),</div><div class='add'>+	REG_RESERVED(PCS1G_LINK_DOWN_CNT),</div><div class='add'>+	REG_RESERVED(PCS1G_STICKY),</div><div class='add'>+	REG_RESERVED(PCS1G_DEBUG_STATUS),</div><div class='add'>+	REG_RESERVED(PCS1G_LPI_CFG),</div><div class='add'>+	REG_RESERVED(PCS1G_LPI_WAKE_ERROR_CNT),</div><div class='add'>+	REG_RESERVED(PCS1G_LPI_STATUS),</div><div class='add'>+	REG_RESERVED(PCS1G_TSTPAT_MODE_CFG),</div><div class='add'>+	REG_RESERVED(PCS1G_TSTPAT_STATUS),</div><div class='add'>+	REG_RESERVED(DEV_PCS_FX100_CFG),</div><div class='add'>+	REG_RESERVED(DEV_PCS_FX100_STATUS),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 *vsc9953_regmap[TARGET_MAX] = {</div><div class='add'>+	[ANA]		= vsc9953_ana_regmap,</div><div class='add'>+	[QS]		= vsc9953_qs_regmap,</div><div class='add'>+	[QSYS]		= vsc9953_qsys_regmap,</div><div class='add'>+	[REW]		= vsc9953_rew_regmap,</div><div class='add'>+	[SYS]		= vsc9953_sys_regmap,</div><div class='add'>+	[S0]		= vsc9953_vcap_regmap,</div><div class='add'>+	[S1]		= vsc9953_vcap_regmap,</div><div class='add'>+	[S2]		= vsc9953_vcap_regmap,</div><div class='add'>+	[GCB]		= vsc9953_gcb_regmap,</div><div class='add'>+	[DEV_GMII]	= vsc9953_dev_gmii_regmap,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Addresses are relative to the device's base address */</div><div class='add'>+static const struct resource vsc9953_resources[] = {</div><div class='add'>+	DEFINE_RES_MEM_NAMED(0x0010000, 0x0010000, "sys"),</div><div class='add'>+	DEFINE_RES_MEM_NAMED(0x0030000, 0x0010000, "rew"),</div><div class='add'>+	DEFINE_RES_MEM_NAMED(0x0040000, 0x0000400, "s0"),</div><div class='add'>+	DEFINE_RES_MEM_NAMED(0x0050000, 0x0000400, "s1"),</div><div class='add'>+	DEFINE_RES_MEM_NAMED(0x0060000, 0x0000400, "s2"),</div><div class='add'>+	DEFINE_RES_MEM_NAMED(0x0070000, 0x0000200, "devcpu_gcb"),</div><div class='add'>+	DEFINE_RES_MEM_NAMED(0x0080000, 0x0000100, "qs"),</div><div class='add'>+	DEFINE_RES_MEM_NAMED(0x0090000, 0x00000cc, "ptp"),</div><div class='add'>+	DEFINE_RES_MEM_NAMED(0x0100000, 0x0010000, "port0"),</div><div class='add'>+	DEFINE_RES_MEM_NAMED(0x0110000, 0x0010000, "port1"),</div><div class='add'>+	DEFINE_RES_MEM_NAMED(0x0120000, 0x0010000, "port2"),</div><div class='add'>+	DEFINE_RES_MEM_NAMED(0x0130000, 0x0010000, "port3"),</div><div class='add'>+	DEFINE_RES_MEM_NAMED(0x0140000, 0x0010000, "port4"),</div><div class='add'>+	DEFINE_RES_MEM_NAMED(0x0150000, 0x0010000, "port5"),</div><div class='add'>+	DEFINE_RES_MEM_NAMED(0x0160000, 0x0010000, "port6"),</div><div class='add'>+	DEFINE_RES_MEM_NAMED(0x0170000, 0x0010000, "port7"),</div><div class='add'>+	DEFINE_RES_MEM_NAMED(0x0180000, 0x0010000, "port8"),</div><div class='add'>+	DEFINE_RES_MEM_NAMED(0x0190000, 0x0010000, "port9"),</div><div class='add'>+	DEFINE_RES_MEM_NAMED(0x0200000, 0x0020000, "qsys"),</div><div class='add'>+	DEFINE_RES_MEM_NAMED(0x0280000, 0x0010000, "ana"),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char * const vsc9953_resource_names[TARGET_MAX] = {</div><div class='add'>+	[SYS] = "sys",</div><div class='add'>+	[REW] = "rew",</div><div class='add'>+	[S0] = "s0",</div><div class='add'>+	[S1] = "s1",</div><div class='add'>+	[S2] = "s2",</div><div class='add'>+	[GCB] = "devcpu_gcb",</div><div class='add'>+	[QS] = "qs",</div><div class='add'>+	[PTP] = "ptp",</div><div class='add'>+	[QSYS] = "qsys",</div><div class='add'>+	[ANA] = "ana",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct reg_field vsc9953_regfields[REGFIELD_MAX] = {</div><div class='add'>+	[ANA_ADVLEARN_VLAN_CHK] = REG_FIELD(ANA_ADVLEARN, 10, 10),</div><div class='add'>+	[ANA_ADVLEARN_LEARN_MIRROR] = REG_FIELD(ANA_ADVLEARN, 0, 9),</div><div class='add'>+	[ANA_ANEVENTS_AUTOAGE] = REG_FIELD(ANA_ANEVENTS, 24, 24),</div><div class='add'>+	[ANA_ANEVENTS_STORM_DROP] = REG_FIELD(ANA_ANEVENTS, 22, 22),</div><div class='add'>+	[ANA_ANEVENTS_LEARN_DROP] = REG_FIELD(ANA_ANEVENTS, 21, 21),</div><div class='add'>+	[ANA_ANEVENTS_AGED_ENTRY] = REG_FIELD(ANA_ANEVENTS, 20, 20),</div><div class='add'>+	[ANA_ANEVENTS_CPU_LEARN_FAILED] = REG_FIELD(ANA_ANEVENTS, 19, 19),</div><div class='add'>+	[ANA_ANEVENTS_AUTO_LEARN_FAILED] = REG_FIELD(ANA_ANEVENTS, 18, 18),</div><div class='add'>+	[ANA_ANEVENTS_LEARN_REMOVE] = REG_FIELD(ANA_ANEVENTS, 17, 17),</div><div class='add'>+	[ANA_ANEVENTS_AUTO_LEARNED] = REG_FIELD(ANA_ANEVENTS, 16, 16),</div><div class='add'>+	[ANA_ANEVENTS_AUTO_MOVED] = REG_FIELD(ANA_ANEVENTS, 15, 15),</div><div class='add'>+	[ANA_ANEVENTS_CLASSIFIED_DROP] = REG_FIELD(ANA_ANEVENTS, 13, 13),</div><div class='add'>+	[ANA_ANEVENTS_CLASSIFIED_COPY] = REG_FIELD(ANA_ANEVENTS, 12, 12),</div><div class='add'>+	[ANA_ANEVENTS_VLAN_DISCARD] = REG_FIELD(ANA_ANEVENTS, 11, 11),</div><div class='add'>+	[ANA_ANEVENTS_FWD_DISCARD] = REG_FIELD(ANA_ANEVENTS, 10, 10),</div><div class='add'>+	[ANA_ANEVENTS_MULTICAST_FLOOD] = REG_FIELD(ANA_ANEVENTS, 9, 9),</div><div class='add'>+	[ANA_ANEVENTS_UNICAST_FLOOD] = REG_FIELD(ANA_ANEVENTS, 8, 8),</div><div class='add'>+	[ANA_ANEVENTS_DEST_KNOWN] = REG_FIELD(ANA_ANEVENTS, 7, 7),</div><div class='add'>+	[ANA_ANEVENTS_BUCKET3_MATCH] = REG_FIELD(ANA_ANEVENTS, 6, 6),</div><div class='add'>+	[ANA_ANEVENTS_BUCKET2_MATCH] = REG_FIELD(ANA_ANEVENTS, 5, 5),</div><div class='add'>+	[ANA_ANEVENTS_BUCKET1_MATCH] = REG_FIELD(ANA_ANEVENTS, 4, 4),</div><div class='add'>+	[ANA_ANEVENTS_BUCKET0_MATCH] = REG_FIELD(ANA_ANEVENTS, 3, 3),</div><div class='add'>+	[ANA_ANEVENTS_CPU_OPERATION] = REG_FIELD(ANA_ANEVENTS, 2, 2),</div><div class='add'>+	[ANA_ANEVENTS_DMAC_LOOKUP] = REG_FIELD(ANA_ANEVENTS, 1, 1),</div><div class='add'>+	[ANA_ANEVENTS_SMAC_LOOKUP] = REG_FIELD(ANA_ANEVENTS, 0, 0),</div><div class='add'>+	[ANA_TABLES_MACACCESS_B_DOM] = REG_FIELD(ANA_TABLES_MACACCESS, 16, 16),</div><div class='add'>+	[ANA_TABLES_MACTINDX_BUCKET] = REG_FIELD(ANA_TABLES_MACTINDX, 11, 12),</div><div class='add'>+	[ANA_TABLES_MACTINDX_M_INDEX] = REG_FIELD(ANA_TABLES_MACTINDX, 0, 10),</div><div class='add'>+	[SYS_RESET_CFG_CORE_ENA] = REG_FIELD(SYS_RESET_CFG, 7, 7),</div><div class='add'>+	[SYS_RESET_CFG_MEM_ENA] = REG_FIELD(SYS_RESET_CFG, 6, 6),</div><div class='add'>+	[SYS_RESET_CFG_MEM_INIT] = REG_FIELD(SYS_RESET_CFG, 5, 5),</div><div class='add'>+	[GCB_SOFT_RST_SWC_RST] = REG_FIELD(GCB_SOFT_RST, 0, 0),</div><div class='add'>+	[GCB_MIIM_MII_STATUS_PENDING] = REG_FIELD(GCB_MIIM_MII_STATUS, 2, 2),</div><div class='add'>+	[GCB_MIIM_MII_STATUS_BUSY] = REG_FIELD(GCB_MIIM_MII_STATUS, 3, 3),</div><div class='add'>+	/* Replicated per number of ports (11), register size 4 per port */</div><div class='add'>+	[QSYS_SWITCH_PORT_MODE_PORT_ENA] = REG_FIELD_ID(QSYS_SWITCH_PORT_MODE, 13, 13, 11, 4),</div><div class='add'>+	[QSYS_SWITCH_PORT_MODE_YEL_RSRVD] = REG_FIELD_ID(QSYS_SWITCH_PORT_MODE, 10, 10, 11, 4),</div><div class='add'>+	[QSYS_SWITCH_PORT_MODE_INGRESS_DROP_MODE] = REG_FIELD_ID(QSYS_SWITCH_PORT_MODE, 9, 9, 11, 4),</div><div class='add'>+	[QSYS_SWITCH_PORT_MODE_TX_PFC_ENA] = REG_FIELD_ID(QSYS_SWITCH_PORT_MODE, 1, 8, 11, 4),</div><div class='add'>+	[QSYS_SWITCH_PORT_MODE_TX_PFC_MODE] = REG_FIELD_ID(QSYS_SWITCH_PORT_MODE, 0, 0, 11, 4),</div><div class='add'>+	[SYS_PORT_MODE_INCL_INJ_HDR] = REG_FIELD_ID(SYS_PORT_MODE, 4, 5, 11, 4),</div><div class='add'>+	[SYS_PORT_MODE_INCL_XTR_HDR] = REG_FIELD_ID(SYS_PORT_MODE, 2, 3, 11, 4),</div><div class='add'>+	[SYS_PORT_MODE_INCL_HDR_ERR] = REG_FIELD_ID(SYS_PORT_MODE, 0, 0, 11, 4),</div><div class='add'>+	[SYS_PAUSE_CFG_PAUSE_START] = REG_FIELD_ID(SYS_PAUSE_CFG, 11, 20, 11, 4),</div><div class='add'>+	[SYS_PAUSE_CFG_PAUSE_STOP] = REG_FIELD_ID(SYS_PAUSE_CFG, 1, 10, 11, 4),</div><div class='add'>+	[SYS_PAUSE_CFG_PAUSE_ENA] = REG_FIELD_ID(SYS_PAUSE_CFG, 0, 1, 11, 4),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_field vsc9953_vcap_es0_keys[] = {</div><div class='add'>+	[VCAP_ES0_EGR_PORT]			= {  0,  4},</div><div class='add'>+	[VCAP_ES0_IGR_PORT]			= {  4,  4},</div><div class='add'>+	[VCAP_ES0_RSV]				= {  8,  2},</div><div class='add'>+	[VCAP_ES0_L2_MC]			= { 10,  1},</div><div class='add'>+	[VCAP_ES0_L2_BC]			= { 11,  1},</div><div class='add'>+	[VCAP_ES0_VID]				= { 12, 12},</div><div class='add'>+	[VCAP_ES0_DP]				= { 24,  1},</div><div class='add'>+	[VCAP_ES0_PCP]				= { 25,  3},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_field vsc9953_vcap_es0_actions[] = {</div><div class='add'>+	[VCAP_ES0_ACT_PUSH_OUTER_TAG]		= {  0,  2},</div><div class='add'>+	[VCAP_ES0_ACT_PUSH_INNER_TAG]		= {  2,  1},</div><div class='add'>+	[VCAP_ES0_ACT_TAG_A_TPID_SEL]		= {  3,  2},</div><div class='add'>+	[VCAP_ES0_ACT_TAG_A_VID_SEL]		= {  5,  1},</div><div class='add'>+	[VCAP_ES0_ACT_TAG_A_PCP_SEL]		= {  6,  2},</div><div class='add'>+	[VCAP_ES0_ACT_TAG_A_DEI_SEL]		= {  8,  2},</div><div class='add'>+	[VCAP_ES0_ACT_TAG_B_TPID_SEL]		= { 10,  2},</div><div class='add'>+	[VCAP_ES0_ACT_TAG_B_VID_SEL]		= { 12,  1},</div><div class='add'>+	[VCAP_ES0_ACT_TAG_B_PCP_SEL]		= { 13,  2},</div><div class='add'>+	[VCAP_ES0_ACT_TAG_B_DEI_SEL]		= { 15,  2},</div><div class='add'>+	[VCAP_ES0_ACT_VID_A_VAL]		= { 17, 12},</div><div class='add'>+	[VCAP_ES0_ACT_PCP_A_VAL]		= { 29,  3},</div><div class='add'>+	[VCAP_ES0_ACT_DEI_A_VAL]		= { 32,  1},</div><div class='add'>+	[VCAP_ES0_ACT_VID_B_VAL]		= { 33, 12},</div><div class='add'>+	[VCAP_ES0_ACT_PCP_B_VAL]		= { 45,  3},</div><div class='add'>+	[VCAP_ES0_ACT_DEI_B_VAL]		= { 48,  1},</div><div class='add'>+	[VCAP_ES0_ACT_RSV]			= { 49, 24},</div><div class='add'>+	[VCAP_ES0_ACT_HIT_STICKY]		= { 73,  1},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_field vsc9953_vcap_is1_keys[] = {</div><div class='add'>+	[VCAP_IS1_HK_TYPE]			= {  0,   1},</div><div class='add'>+	[VCAP_IS1_HK_LOOKUP]			= {  1,   2},</div><div class='add'>+	[VCAP_IS1_HK_IGR_PORT_MASK]		= {  3,  11},</div><div class='add'>+	[VCAP_IS1_HK_RSV]			= { 14,  10},</div><div class='add'>+	/* VCAP_IS1_HK_OAM_Y1731 not supported */</div><div class='add'>+	[VCAP_IS1_HK_L2_MC]			= { 24,   1},</div><div class='add'>+	[VCAP_IS1_HK_L2_BC]			= { 25,   1},</div><div class='add'>+	[VCAP_IS1_HK_IP_MC]			= { 26,   1},</div><div class='add'>+	[VCAP_IS1_HK_VLAN_TAGGED]		= { 27,   1},</div><div class='add'>+	[VCAP_IS1_HK_VLAN_DBL_TAGGED]		= { 28,   1},</div><div class='add'>+	[VCAP_IS1_HK_TPID]			= { 29,   1},</div><div class='add'>+	[VCAP_IS1_HK_VID]			= { 30,  12},</div><div class='add'>+	[VCAP_IS1_HK_DEI]			= { 42,   1},</div><div class='add'>+	[VCAP_IS1_HK_PCP]			= { 43,   3},</div><div class='add'>+	/* Specific Fields for IS1 Half Key S1_NORMAL */</div><div class='add'>+	[VCAP_IS1_HK_L2_SMAC]			= { 46,  48},</div><div class='add'>+	[VCAP_IS1_HK_ETYPE_LEN]			= { 94,   1},</div><div class='add'>+	[VCAP_IS1_HK_ETYPE]			= { 95,  16},</div><div class='add'>+	[VCAP_IS1_HK_IP_SNAP]			= {111,   1},</div><div class='add'>+	[VCAP_IS1_HK_IP4]			= {112,   1},</div><div class='add'>+	/* Layer-3 Information */</div><div class='add'>+	[VCAP_IS1_HK_L3_FRAGMENT]		= {113,   1},</div><div class='add'>+	[VCAP_IS1_HK_L3_FRAG_OFS_GT0]		= {114,   1},</div><div class='add'>+	[VCAP_IS1_HK_L3_OPTIONS]		= {115,   1},</div><div class='add'>+	[VCAP_IS1_HK_L3_DSCP]			= {116,   6},</div><div class='add'>+	[VCAP_IS1_HK_L3_IP4_SIP]		= {122,  32},</div><div class='add'>+	/* Layer-4 Information */</div><div class='add'>+	[VCAP_IS1_HK_TCP_UDP]			= {154,   1},</div><div class='add'>+	[VCAP_IS1_HK_TCP]			= {155,   1},</div><div class='add'>+	[VCAP_IS1_HK_L4_SPORT]			= {156,  16},</div><div class='add'>+	[VCAP_IS1_HK_L4_RNG]			= {172,   8},</div><div class='add'>+	/* Specific Fields for IS1 Half Key S1_5TUPLE_IP4 */</div><div class='add'>+	[VCAP_IS1_HK_IP4_INNER_TPID]            = { 46,   1},</div><div class='add'>+	[VCAP_IS1_HK_IP4_INNER_VID]		= { 47,  12},</div><div class='add'>+	[VCAP_IS1_HK_IP4_INNER_DEI]		= { 59,   1},</div><div class='add'>+	[VCAP_IS1_HK_IP4_INNER_PCP]		= { 60,   3},</div><div class='add'>+	[VCAP_IS1_HK_IP4_IP4]			= { 63,   1},</div><div class='add'>+	[VCAP_IS1_HK_IP4_L3_FRAGMENT]		= { 64,   1},</div><div class='add'>+	[VCAP_IS1_HK_IP4_L3_FRAG_OFS_GT0]	= { 65,   1},</div><div class='add'>+	[VCAP_IS1_HK_IP4_L3_OPTIONS]		= { 66,   1},</div><div class='add'>+	[VCAP_IS1_HK_IP4_L3_DSCP]		= { 67,   6},</div><div class='add'>+	[VCAP_IS1_HK_IP4_L3_IP4_DIP]		= { 73,  32},</div><div class='add'>+	[VCAP_IS1_HK_IP4_L3_IP4_SIP]		= {105,  32},</div><div class='add'>+	[VCAP_IS1_HK_IP4_L3_PROTO]		= {137,   8},</div><div class='add'>+	[VCAP_IS1_HK_IP4_TCP_UDP]		= {145,   1},</div><div class='add'>+	[VCAP_IS1_HK_IP4_TCP]			= {146,   1},</div><div class='add'>+	[VCAP_IS1_HK_IP4_L4_RNG]		= {147,   8},</div><div class='add'>+	[VCAP_IS1_HK_IP4_IP_PAYLOAD_S1_5TUPLE]	= {155,  32},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vcap_field vsc9953_vcap_is1_actions[] = {</div><div class='add'>+	[VCAP_IS1_ACT_DSCP_ENA]			= {  0,  1},</div><div class='add'>+	[VCAP_IS1_ACT_DSCP_VAL]			= {  1,  6},</div><div class='add'>+	[VCAP_IS1_ACT_QOS_ENA]			= {  7,  1},</div><div class='add'>+	[VCAP_IS1_ACT_QOS_VAL]			= {  8,  3},</div><div class='add'>+	[VCAP_IS1_ACT_DP_ENA]			= { 11,  1},</div><div class='add'>+	[VCAP_IS1_ACT_DP_VAL]			= { 12,  1},</div><div class='add'>+	[VCAP_IS1_ACT_PAG_OVERRIDE_MASK]	= { 13,  8},</div><div class='add'>+	[VCAP_IS1_ACT_PAG_VAL]			= { 21,  8},</div><div class='add'>+	[VCAP_IS1_ACT_RSV]			= { 29, 11},</div><div class='add'>+	[VCAP_IS1_ACT_VID_REPLACE_ENA]		= { 40,  1},</div><div class='add'>+	[VCAP_IS1_ACT_VID_ADD_VAL]		= { 41, 12},</div><div class='add'>+	[VCAP_IS1_ACT_FID_SEL]			= { 53,  2},</div><div class='add'>+	[VCAP_IS1_ACT_FID_VAL]			= { 55, 13},</div><div class='add'>+	[VCAP_IS1_ACT_PCP_DEI_ENA]		= { 68,  1},</div><div class='add'>+	[VCAP_IS1_ACT_PCP_VAL]			= { 69,  3},</div><div class='add'>+	[VCAP_IS1_ACT_DEI_VAL]			= { 72,  1},</div><div class='add'>+	[VCAP_IS1_ACT_VLAN_POP_CNT_ENA]		= { 73,  1},</div><div class='add'>+	[VCAP_IS1_ACT_VLAN_POP_CNT]		= { 74,  2},</div><div class='add'>+	[VCAP_IS1_ACT_CUSTOM_ACE_TYPE_ENA]	= { 76,  4},</div><div class='add'>+	[VCAP_IS1_ACT_HIT_STICKY]		= { 80,  1},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct vcap_field vsc9953_vcap_is2_keys[] = {</div><div class='add'>+	/* Common: 41 bits */</div><div class='add'>+	[VCAP_IS2_TYPE]				= {  0,   4},</div><div class='add'>+	[VCAP_IS2_HK_FIRST]			= {  4,   1},</div><div class='add'>+	[VCAP_IS2_HK_PAG]			= {  5,   8},</div><div class='add'>+	[VCAP_IS2_HK_IGR_PORT_MASK]		= { 13,  11},</div><div class='add'>+	[VCAP_IS2_HK_RSV2]			= { 24,   1},</div><div class='add'>+	[VCAP_IS2_HK_HOST_MATCH]		= { 25,   1},</div><div class='add'>+	[VCAP_IS2_HK_L2_MC]			= { 26,   1},</div><div class='add'>+	[VCAP_IS2_HK_L2_BC]			= { 27,   1},</div><div class='add'>+	[VCAP_IS2_HK_VLAN_TAGGED]		= { 28,   1},</div><div class='add'>+	[VCAP_IS2_HK_VID]			= { 29,  12},</div><div class='add'>+	[VCAP_IS2_HK_DEI]			= { 41,   1},</div><div class='add'>+	[VCAP_IS2_HK_PCP]			= { 42,   3},</div><div class='add'>+	/* MAC_ETYPE / MAC_LLC / MAC_SNAP / OAM common */</div><div class='add'>+	[VCAP_IS2_HK_L2_DMAC]			= { 45,  48},</div><div class='add'>+	[VCAP_IS2_HK_L2_SMAC]			= { 93,  48},</div><div class='add'>+	/* MAC_ETYPE (TYPE=000) */</div><div class='add'>+	[VCAP_IS2_HK_MAC_ETYPE_ETYPE]		= {141,  16},</div><div class='add'>+	[VCAP_IS2_HK_MAC_ETYPE_L2_PAYLOAD0]	= {157,  16},</div><div class='add'>+	[VCAP_IS2_HK_MAC_ETYPE_L2_PAYLOAD1]	= {173,   8},</div><div class='add'>+	[VCAP_IS2_HK_MAC_ETYPE_L2_PAYLOAD2]	= {181,   3},</div><div class='add'>+	/* MAC_LLC (TYPE=001) */</div><div class='add'>+	[VCAP_IS2_HK_MAC_LLC_L2_LLC]		= {141,  40},</div><div class='add'>+	/* MAC_SNAP (TYPE=010) */</div><div class='add'>+	[VCAP_IS2_HK_MAC_SNAP_L2_SNAP]		= {141,  40},</div><div class='add'>+	/* MAC_ARP (TYPE=011) */</div><div class='add'>+	[VCAP_IS2_HK_MAC_ARP_SMAC]		= { 45,  48},</div><div class='add'>+	[VCAP_IS2_HK_MAC_ARP_ADDR_SPACE_OK]	= { 93,   1},</div><div class='add'>+	[VCAP_IS2_HK_MAC_ARP_PROTO_SPACE_OK]	= { 94,   1},</div><div class='add'>+	[VCAP_IS2_HK_MAC_ARP_LEN_OK]		= { 95,   1},</div><div class='add'>+	[VCAP_IS2_HK_MAC_ARP_TARGET_MATCH]	= { 96,   1},</div><div class='add'>+	[VCAP_IS2_HK_MAC_ARP_SENDER_MATCH]	= { 97,   1},</div><div class='add'>+	[VCAP_IS2_HK_MAC_ARP_OPCODE_UNKNOWN]	= { 98,   1},</div><div class='add'>+	[VCAP_IS2_HK_MAC_ARP_OPCODE]		= { 99,   2},</div><div class='add'>+	[VCAP_IS2_HK_MAC_ARP_L3_IP4_DIP]	= {101,  32},</div><div class='add'>+	[VCAP_IS2_HK_MAC_ARP_L3_IP4_SIP]	= {133,  32},</div><div class='add'>+	[VCAP_IS2_HK_MAC_ARP_DIP_EQ_SIP]	= {165,   1},</div><div class='add'>+	/* IP4_TCP_UDP / IP4_OTHER common */</div><div class='add'>+	[VCAP_IS2_HK_IP4]			= { 45,   1},</div><div class='add'>+	[VCAP_IS2_HK_L3_FRAGMENT]		= { 46,   1},</div><div class='add'>+	[VCAP_IS2_HK_L3_FRAG_OFS_GT0]		= { 47,   1},</div><div class='add'>+	[VCAP_IS2_HK_L3_OPTIONS]		= { 48,   1},</div><div class='add'>+	[VCAP_IS2_HK_IP4_L3_TTL_GT0]		= { 49,   1},</div><div class='add'>+	[VCAP_IS2_HK_L3_TOS]			= { 50,   8},</div><div class='add'>+	[VCAP_IS2_HK_L3_IP4_DIP]		= { 58,  32},</div><div class='add'>+	[VCAP_IS2_HK_L3_IP4_SIP]		= { 90,  32},</div><div class='add'>+	[VCAP_IS2_HK_DIP_EQ_SIP]		= {122,   1},</div><div class='add'>+	/* IP4_TCP_UDP (TYPE=100) */</div><div class='add'>+	[VCAP_IS2_HK_TCP]			= {123,   1},</div><div class='add'>+	[VCAP_IS2_HK_L4_DPORT]			= {124,  16},</div><div class='add'>+	[VCAP_IS2_HK_L4_SPORT]			= {140,  16},</div><div class='add'>+	[VCAP_IS2_HK_L4_RNG]			= {156,   8},</div><div class='add'>+	[VCAP_IS2_HK_L4_SPORT_EQ_DPORT]		= {164,   1},</div><div class='add'>+	[VCAP_IS2_HK_L4_SEQUENCE_EQ0]		= {165,   1},</div><div class='add'>+	[VCAP_IS2_HK_L4_FIN]			= {166,   1},</div><div class='add'>+	[VCAP_IS2_HK_L4_SYN]			= {167,   1},</div><div class='add'>+	[VCAP_IS2_HK_L4_RST]			= {168,   1},</div><div class='add'>+	[VCAP_IS2_HK_L4_PSH]			= {169,   1},</div><div class='add'>+	[VCAP_IS2_HK_L4_ACK]			= {170,   1},</div><div class='add'>+	[VCAP_IS2_HK_L4_URG]			= {171,   1},</div><div class='add'>+	/* IP4_OTHER (TYPE=101) */</div><div class='add'>+	[VCAP_IS2_HK_IP4_L3_PROTO]		= {123,   8},</div><div class='add'>+	[VCAP_IS2_HK_L3_PAYLOAD]		= {131,  56},</div><div class='add'>+	/* IP6_STD (TYPE=110) */</div><div class='add'>+	[VCAP_IS2_HK_IP6_L3_TTL_GT0]		= { 45,   1},</div><div class='add'>+	[VCAP_IS2_HK_L3_IP6_SIP]		= { 46, 128},</div><div class='add'>+	[VCAP_IS2_HK_IP6_L3_PROTO]		= {174,   8},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct vcap_field vsc9953_vcap_is2_actions[] = {</div><div class='add'>+	[VCAP_IS2_ACT_HIT_ME_ONCE]		= {  0,  1},</div><div class='add'>+	[VCAP_IS2_ACT_CPU_COPY_ENA]		= {  1,  1},</div><div class='add'>+	[VCAP_IS2_ACT_CPU_QU_NUM]		= {  2,  3},</div><div class='add'>+	[VCAP_IS2_ACT_MASK_MODE]		= {  5,  2},</div><div class='add'>+	[VCAP_IS2_ACT_MIRROR_ENA]		= {  7,  1},</div><div class='add'>+	[VCAP_IS2_ACT_LRN_DIS]			= {  8,  1},</div><div class='add'>+	[VCAP_IS2_ACT_POLICE_ENA]		= {  9,  1},</div><div class='add'>+	[VCAP_IS2_ACT_POLICE_IDX]		= { 10,  8},</div><div class='add'>+	[VCAP_IS2_ACT_POLICE_VCAP_ONLY]		= { 21,  1},</div><div class='add'>+	[VCAP_IS2_ACT_PORT_MASK]		= { 22, 10},</div><div class='add'>+	[VCAP_IS2_ACT_ACL_ID]			= { 44,  6},</div><div class='add'>+	[VCAP_IS2_ACT_HIT_CNT]			= { 50, 32},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct vcap_props vsc9953_vcap_props[] = {</div><div class='add'>+	[VCAP_ES0] = {</div><div class='add'>+		.action_type_width = 0,</div><div class='add'>+		.action_table = {</div><div class='add'>+			[ES0_ACTION_TYPE_NORMAL] = {</div><div class='add'>+				.width = 73, /* HIT_STICKY not included */</div><div class='add'>+				.count = 1,</div><div class='add'>+			},</div><div class='add'>+		},</div><div class='add'>+		.target = S0,</div><div class='add'>+		.keys = vsc9953_vcap_es0_keys,</div><div class='add'>+		.actions = vsc9953_vcap_es0_actions,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_IS1] = {</div><div class='add'>+		.action_type_width = 0,</div><div class='add'>+		.action_table = {</div><div class='add'>+			[IS1_ACTION_TYPE_NORMAL] = {</div><div class='add'>+				.width = 80, /* HIT_STICKY not included */</div><div class='add'>+				.count = 4,</div><div class='add'>+			},</div><div class='add'>+		},</div><div class='add'>+		.target = S1,</div><div class='add'>+		.keys = vsc9953_vcap_is1_keys,</div><div class='add'>+		.actions = vsc9953_vcap_is1_actions,</div><div class='add'>+	},</div><div class='add'>+	[VCAP_IS2] = {</div><div class='add'>+		.action_type_width = 1,</div><div class='add'>+		.action_table = {</div><div class='add'>+			[IS2_ACTION_TYPE_NORMAL] = {</div><div class='add'>+				.width = 50, /* HIT_CNT not included */</div><div class='add'>+				.count = 2</div><div class='add'>+			},</div><div class='add'>+			[IS2_ACTION_TYPE_SMAC_SIP] = {</div><div class='add'>+				.width = 6,</div><div class='add'>+				.count = 4</div><div class='add'>+			},</div><div class='add'>+		},</div><div class='add'>+		.target = S2,</div><div class='add'>+		.keys = vsc9953_vcap_is2_keys,</div><div class='add'>+		.actions = vsc9953_vcap_is2_actions,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define VSC9953_INIT_TIMEOUT			50000</div><div class='add'>+#define VSC9953_GCB_RST_SLEEP			100</div><div class='add'>+#define VSC9953_SYS_RAMINIT_SLEEP		80</div><div class='add'>+</div><div class='add'>+static int vsc9953_gcb_soft_rst_status(struct ocelot *ocelot)</div><div class='add'>+{</div><div class='add'>+	int val;</div><div class='add'>+</div><div class='add'>+	ocelot_field_read(ocelot, GCB_SOFT_RST_SWC_RST, &amp;val);</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc9953_sys_ram_init_status(struct ocelot *ocelot)</div><div class='add'>+{</div><div class='add'>+	int val;</div><div class='add'>+</div><div class='add'>+	ocelot_field_read(ocelot, SYS_RESET_CFG_MEM_INIT, &amp;val);</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* CORE_ENA is in SYS:SYSTEM:RESET_CFG</div><div class='add'>+ * MEM_INIT is in SYS:SYSTEM:RESET_CFG</div><div class='add'>+ * MEM_ENA is in SYS:SYSTEM:RESET_CFG</div><div class='add'>+ */</div><div class='add'>+static int vsc9953_reset(struct ocelot *ocelot)</div><div class='add'>+{</div><div class='add'>+	int val, err;</div><div class='add'>+</div><div class='add'>+	/* soft-reset the switch core */</div><div class='add'>+	ocelot_field_write(ocelot, GCB_SOFT_RST_SWC_RST, 1);</div><div class='add'>+</div><div class='add'>+	err = readx_poll_timeout(vsc9953_gcb_soft_rst_status, ocelot, val, !val,</div><div class='add'>+				 VSC9953_GCB_RST_SLEEP, VSC9953_INIT_TIMEOUT);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(ocelot-&gt;dev, "timeout: switch core reset\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* initialize switch mem ~40us */</div><div class='add'>+	ocelot_field_write(ocelot, SYS_RESET_CFG_MEM_ENA, 1);</div><div class='add'>+	ocelot_field_write(ocelot, SYS_RESET_CFG_MEM_INIT, 1);</div><div class='add'>+</div><div class='add'>+	err = readx_poll_timeout(vsc9953_sys_ram_init_status, ocelot, val, !val,</div><div class='add'>+				 VSC9953_SYS_RAMINIT_SLEEP,</div><div class='add'>+				 VSC9953_INIT_TIMEOUT);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(ocelot-&gt;dev, "timeout: switch sram init\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* enable switch core */</div><div class='add'>+	ocelot_field_write(ocelot, SYS_RESET_CFG_CORE_ENA, 1);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Watermark encode</div><div class='add'>+ * Bit 9:   Unit; 0:1, 1:16</div><div class='add'>+ * Bit 8-0: Value to be multiplied with unit</div><div class='add'>+ */</div><div class='add'>+static u16 vsc9953_wm_enc(u16 value)</div><div class='add'>+{</div><div class='add'>+	WARN_ON(value &gt;= 16 * BIT(9));</div><div class='add'>+</div><div class='add'>+	if (value &gt;= BIT(9))</div><div class='add'>+		return BIT(9) | (value / 16);</div><div class='add'>+</div><div class='add'>+	return value;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 vsc9953_wm_dec(u16 wm)</div><div class='add'>+{</div><div class='add'>+	WARN_ON(wm &amp; ~GENMASK(9, 0));</div><div class='add'>+</div><div class='add'>+	if (wm &amp; BIT(9))</div><div class='add'>+		return (wm &amp; GENMASK(8, 0)) * 16;</div><div class='add'>+</div><div class='add'>+	return wm;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vsc9953_wm_stat(u32 val, u32 *inuse, u32 *maxuse)</div><div class='add'>+{</div><div class='add'>+	*inuse = (val &amp; GENMASK(25, 13)) &gt;&gt; 13;</div><div class='add'>+	*maxuse = val &amp; GENMASK(12, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ocelot_ops vsc9953_ops = {</div><div class='add'>+	.reset			= vsc9953_reset,</div><div class='add'>+	.wm_enc			= vsc9953_wm_enc,</div><div class='add'>+	.wm_dec			= vsc9953_wm_dec,</div><div class='add'>+	.wm_stat		= vsc9953_wm_stat,</div><div class='add'>+	.port_to_netdev		= felix_port_to_netdev,</div><div class='add'>+	.netdev_to_port		= felix_netdev_to_port,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int vsc9953_mdio_bus_alloc(struct ocelot *ocelot)</div><div class='add'>+{</div><div class='add'>+	struct felix *felix = ocelot_to_felix(ocelot);</div><div class='add'>+	struct device *dev = ocelot-&gt;dev;</div><div class='add'>+	struct mii_bus *bus;</div><div class='add'>+	int port;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	felix-&gt;pcs = devm_kcalloc(dev, felix-&gt;info-&gt;num_ports,</div><div class='add'>+				  sizeof(struct phylink_pcs *),</div><div class='add'>+				  GFP_KERNEL);</div><div class='add'>+	if (!felix-&gt;pcs) {</div><div class='add'>+		dev_err(dev, "failed to allocate array for PCS PHYs\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = mscc_miim_setup(dev, &amp;bus, "VSC9953 internal MDIO bus",</div><div class='add'>+			     ocelot-&gt;targets[GCB],</div><div class='add'>+			     ocelot-&gt;map[GCB][GCB_MIIM_MII_STATUS &amp; REG_MASK],</div><div class='add'>+			     true);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(dev, "failed to setup MDIO bus\n");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Needed in order to initialize the bus mutex lock */</div><div class='add'>+	rc = devm_of_mdiobus_register(dev, bus, NULL);</div><div class='add'>+	if (rc &lt; 0) {</div><div class='add'>+		dev_err(dev, "failed to register MDIO bus\n");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	felix-&gt;imdio = bus;</div><div class='add'>+</div><div class='add'>+	for (port = 0; port &lt; felix-&gt;info-&gt;num_ports; port++) {</div><div class='add'>+		struct ocelot_port *ocelot_port = ocelot-&gt;ports[port];</div><div class='add'>+		struct phylink_pcs *phylink_pcs;</div><div class='add'>+		int addr = port + 4;</div><div class='add'>+</div><div class='add'>+		if (dsa_is_unused_port(felix-&gt;ds, port))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (ocelot_port-&gt;phy_mode == PHY_INTERFACE_MODE_INTERNAL)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		phylink_pcs = lynx_pcs_create_mdiodev(felix-&gt;imdio, addr);</div><div class='add'>+		if (IS_ERR(phylink_pcs))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		felix-&gt;pcs[port] = phylink_pcs;</div><div class='add'>+</div><div class='add'>+		dev_info(dev, "Found PCS at internal MDIO address %d\n", addr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vsc9953_mdio_bus_free(struct ocelot *ocelot)</div><div class='add'>+{</div><div class='add'>+	struct felix *felix = ocelot_to_felix(ocelot);</div><div class='add'>+	int port;</div><div class='add'>+</div><div class='add'>+	for (port = 0; port &lt; ocelot-&gt;num_phys_ports; port++) {</div><div class='add'>+		struct phylink_pcs *phylink_pcs = felix-&gt;pcs[port];</div><div class='add'>+</div><div class='add'>+		if (phylink_pcs)</div><div class='add'>+			lynx_pcs_destroy(phylink_pcs);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* mdiobus_unregister and mdiobus_free handled by devres */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct felix_info seville_info_vsc9953 = {</div><div class='add'>+	.resources		= vsc9953_resources,</div><div class='add'>+	.num_resources		= ARRAY_SIZE(vsc9953_resources),</div><div class='add'>+	.resource_names		= vsc9953_resource_names,</div><div class='add'>+	.regfields		= vsc9953_regfields,</div><div class='add'>+	.map			= vsc9953_regmap,</div><div class='add'>+	.ops			= &amp;vsc9953_ops,</div><div class='add'>+	.vcap			= vsc9953_vcap_props,</div><div class='add'>+	.vcap_pol_base		= VSC9953_VCAP_POLICER_BASE,</div><div class='add'>+	.vcap_pol_max		= VSC9953_VCAP_POLICER_MAX,</div><div class='add'>+	.vcap_pol_base2		= VSC9953_VCAP_POLICER_BASE2,</div><div class='add'>+	.vcap_pol_max2		= VSC9953_VCAP_POLICER_MAX2,</div><div class='add'>+	.quirks			= FELIX_MAC_QUIRKS,</div><div class='add'>+	.num_mact_rows		= 2048,</div><div class='add'>+	.num_ports		= VSC9953_NUM_PORTS,</div><div class='add'>+	.mdio_bus_alloc		= vsc9953_mdio_bus_alloc,</div><div class='add'>+	.mdio_bus_free		= vsc9953_mdio_bus_free,</div><div class='add'>+	.port_modes		= vsc9953_port_modes,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int seville_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct resource *res;</div><div class='add'>+</div><div class='add'>+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='add'>+	if (!res) {</div><div class='add'>+		dev_err(dev, "Invalid resource\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return felix_register_switch(dev, res-&gt;start, 1, false, false,</div><div class='add'>+				     DSA_TAG_PROTO_SEVILLE,</div><div class='add'>+				     &amp;seville_info_vsc9953);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void seville_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct felix *felix = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	if (!felix)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dsa_unregister_switch(felix-&gt;ds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void seville_shutdown(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct felix *felix = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	if (!felix)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dsa_switch_shutdown(felix-&gt;ds);</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id seville_of_match[] = {</div><div class='add'>+	{ .compatible = "mscc,vsc9953-switch" },</div><div class='add'>+	{ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, seville_of_match);</div><div class='add'>+</div><div class='add'>+static struct platform_driver seville_vsc9953_driver = {</div><div class='add'>+	.probe		= seville_probe,</div><div class='add'>+	.remove		= seville_remove,</div><div class='add'>+	.shutdown	= seville_shutdown,</div><div class='add'>+	.driver = {</div><div class='add'>+		.name		= "mscc_seville",</div><div class='add'>+		.of_match_table	= seville_of_match,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+module_platform_driver(seville_vsc9953_driver);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("Seville Switch driver");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/net/dsa/qca/Kconfig b/drivers/net/dsa/qca/Kconfig<br/>new file mode 100644<br/>index 000000000000..de9da469908b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/qca/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/qca/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,26 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+config NET_DSA_AR9331</div><div class='add'>+	tristate "Qualcomm Atheros AR9331 Ethernet switch support"</div><div class='add'>+	depends on NET_DSA</div><div class='add'>+	select NET_DSA_TAG_AR9331</div><div class='add'>+	select REGMAP</div><div class='add'>+	help</div><div class='add'>+	  This enables support for the Qualcomm Atheros AR9331 built-in Ethernet</div><div class='add'>+	  switch.</div><div class='add'>+</div><div class='add'>+config NET_DSA_QCA8K</div><div class='add'>+	tristate "Qualcomm Atheros QCA8K Ethernet switch family support"</div><div class='add'>+	select NET_DSA_TAG_QCA</div><div class='add'>+	select REGMAP</div><div class='add'>+	help</div><div class='add'>+	  This enables support for the Qualcomm Atheros QCA8K Ethernet</div><div class='add'>+	  switch chips.</div><div class='add'>+</div><div class='add'>+config NET_DSA_QCA8K_LEDS_SUPPORT</div><div class='add'>+	bool "Qualcomm Atheros QCA8K Ethernet switch family LEDs support"</div><div class='add'>+	depends on NET_DSA_QCA8K</div><div class='add'>+	depends on LEDS_CLASS=y || LEDS_CLASS=NET_DSA_QCA8K</div><div class='add'>+	depends on LEDS_TRIGGERS</div><div class='add'>+	help</div><div class='add'>+	  This enabled support for LEDs present on the Qualcomm Atheros</div><div class='add'>+	  QCA8K Ethernet switch chips.</div><div class='head'>diff --git a/drivers/net/dsa/qca/Makefile b/drivers/net/dsa/qca/Makefile<br/>new file mode 100644<br/>index 000000000000..ce66b1984e5f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/qca/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/qca/Makefile</a></div><div class='hunk'>@@ -0,0 +1,7 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+obj-$(CONFIG_NET_DSA_AR9331)	+= ar9331.o</div><div class='add'>+obj-$(CONFIG_NET_DSA_QCA8K)	+= qca8k.o</div><div class='add'>+qca8k-y 			+= qca8k-common.o qca8k-8xxx.o</div><div class='add'>+ifdef CONFIG_NET_DSA_QCA8K_LEDS_SUPPORT</div><div class='add'>+qca8k-y				+= qca8k-leds.o</div><div class='add'>+endif</div><div class='head'>diff --git a/drivers/net/dsa/qca/ar9331.c b/drivers/net/dsa/qca/ar9331.c<br/>new file mode 100644<br/>index 000000000000..0526aa96146e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/qca/ar9331.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/qca/ar9331.c</a></div><div class='hunk'>@@ -0,0 +1,1142 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+// Copyright (c) 2019 Pengutronix, Oleksij Rempel &lt;kernel@pengutronix.de&gt;</div><div class='add'>+/*</div><div class='add'>+ *                   +----------------------+</div><div class='add'>+ * GMAC1----RGMII----|--MAC0                |</div><div class='add'>+ *      \---MDIO1----|--REGs                |----MDIO3----\</div><div class='add'>+ *                   |                      |             |  +------+</div><div class='add'>+ *                   |                      |             +--|      |</div><div class='add'>+ *                   |                 MAC1-|----RMII--M-----| PHY0 |-o P0</div><div class='add'>+ *                   |                      |          |  |  +------+</div><div class='add'>+ *                   |                      |          |  +--|      |</div><div class='add'>+ *                   |                 MAC2-|----RMII--------| PHY1 |-o P1</div><div class='add'>+ *                   |                      |          |  |  +------+</div><div class='add'>+ *                   |                      |          |  +--|      |</div><div class='add'>+ *                   |                 MAC3-|----RMII--------| PHY2 |-o P2</div><div class='add'>+ *                   |                      |          |  |  +------+</div><div class='add'>+ *                   |                      |          |  +--|      |</div><div class='add'>+ *                   |                 MAC4-|----RMII--------| PHY3 |-o P3</div><div class='add'>+ *                   |                      |          |  |  +------+</div><div class='add'>+ *                   |                      |          |  +--|      |</div><div class='add'>+ *                   |                 MAC5-|--+-RMII--M-----|-PHY4-|-o P4</div><div class='add'>+ *                   |                      |  |       |     +------+</div><div class='add'>+ *                   +----------------------+  |       \--CFG_SW_PHY_SWAP</div><div class='add'>+ * GMAC0---------------RMII--------------------/        \-CFG_SW_PHY_ADDR_SWAP</div><div class='add'>+ *      \---MDIO0--NC</div><div class='add'>+ *</div><div class='add'>+ * GMAC0 and MAC5 are connected together and use same PHY. Depending on</div><div class='add'>+ * configuration it can be PHY4 (default) or PHY0. Only GMAC0 or MAC5 can be</div><div class='add'>+ * used at same time. If GMAC0 is used (default) then MAC5 should be disabled.</div><div class='add'>+ *</div><div class='add'>+ * CFG_SW_PHY_SWAP - swap connections of PHY0 and PHY4. If this bit is not set</div><div class='add'>+ * PHY4 is connected to GMAC0/MAC5 bundle and PHY0 is connected to MAC1. If this</div><div class='add'>+ * bit is set, PHY4 is connected to MAC1 and PHY0 is connected to GMAC0/MAC5</div><div class='add'>+ * bundle.</div><div class='add'>+ *</div><div class='add'>+ * CFG_SW_PHY_ADDR_SWAP - swap addresses of PHY0 and PHY4</div><div class='add'>+ *</div><div class='add'>+ * CFG_SW_PHY_SWAP and CFG_SW_PHY_ADDR_SWAP are part of SoC specific register</div><div class='add'>+ * set and not related to switch internal registers.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of_irq.h&gt;</div><div class='add'>+#include &lt;linux/of_mdio.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;linux/reset.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+</div><div class='add'>+#define AR9331_SW_NAME				"ar9331_switch"</div><div class='add'>+#define AR9331_SW_PORTS				6</div><div class='add'>+</div><div class='add'>+/* dummy reg to change page */</div><div class='add'>+#define AR9331_SW_REG_PAGE			0x40000</div><div class='add'>+</div><div class='add'>+/* Global Interrupt */</div><div class='add'>+#define AR9331_SW_REG_GINT			0x10</div><div class='add'>+#define AR9331_SW_REG_GINT_MASK			0x14</div><div class='add'>+#define AR9331_SW_GINT_PHY_INT			BIT(2)</div><div class='add'>+</div><div class='add'>+#define AR9331_SW_REG_FLOOD_MASK		0x2c</div><div class='add'>+#define AR9331_SW_FLOOD_MASK_BROAD_TO_CPU	BIT(26)</div><div class='add'>+</div><div class='add'>+#define AR9331_SW_REG_GLOBAL_CTRL		0x30</div><div class='add'>+#define AR9331_SW_GLOBAL_CTRL_MFS_M		GENMASK(13, 0)</div><div class='add'>+</div><div class='add'>+#define AR9331_SW_REG_MDIO_CTRL			0x98</div><div class='add'>+#define AR9331_SW_MDIO_CTRL_BUSY		BIT(31)</div><div class='add'>+#define AR9331_SW_MDIO_CTRL_MASTER_EN		BIT(30)</div><div class='add'>+#define AR9331_SW_MDIO_CTRL_CMD_READ		BIT(27)</div><div class='add'>+#define AR9331_SW_MDIO_CTRL_PHY_ADDR_M		GENMASK(25, 21)</div><div class='add'>+#define AR9331_SW_MDIO_CTRL_REG_ADDR_M		GENMASK(20, 16)</div><div class='add'>+#define AR9331_SW_MDIO_CTRL_DATA_M		GENMASK(16, 0)</div><div class='add'>+</div><div class='add'>+#define AR9331_SW_REG_PORT_STATUS(_port)	(0x100 + (_port) * 0x100)</div><div class='add'>+</div><div class='add'>+/* FLOW_LINK_EN - enable mac flow control config auto-neg with phy.</div><div class='add'>+ * If not set, mac can be config by software.</div><div class='add'>+ */</div><div class='add'>+#define AR9331_SW_PORT_STATUS_FLOW_LINK_EN	BIT(12)</div><div class='add'>+</div><div class='add'>+/* LINK_EN - If set, MAC is configured from PHY link status.</div><div class='add'>+ * If not set, MAC should be configured by software.</div><div class='add'>+ */</div><div class='add'>+#define AR9331_SW_PORT_STATUS_LINK_EN		BIT(9)</div><div class='add'>+#define AR9331_SW_PORT_STATUS_DUPLEX_MODE	BIT(6)</div><div class='add'>+#define AR9331_SW_PORT_STATUS_RX_FLOW_EN	BIT(5)</div><div class='add'>+#define AR9331_SW_PORT_STATUS_TX_FLOW_EN	BIT(4)</div><div class='add'>+#define AR9331_SW_PORT_STATUS_RXMAC		BIT(3)</div><div class='add'>+#define AR9331_SW_PORT_STATUS_TXMAC		BIT(2)</div><div class='add'>+#define AR9331_SW_PORT_STATUS_SPEED_M		GENMASK(1, 0)</div><div class='add'>+#define AR9331_SW_PORT_STATUS_SPEED_1000	2</div><div class='add'>+#define AR9331_SW_PORT_STATUS_SPEED_100		1</div><div class='add'>+#define AR9331_SW_PORT_STATUS_SPEED_10		0</div><div class='add'>+</div><div class='add'>+#define AR9331_SW_PORT_STATUS_MAC_MASK \</div><div class='add'>+	(AR9331_SW_PORT_STATUS_TXMAC | AR9331_SW_PORT_STATUS_RXMAC)</div><div class='add'>+</div><div class='add'>+#define AR9331_SW_PORT_STATUS_LINK_MASK \</div><div class='add'>+	(AR9331_SW_PORT_STATUS_DUPLEX_MODE | \</div><div class='add'>+	 AR9331_SW_PORT_STATUS_RX_FLOW_EN | AR9331_SW_PORT_STATUS_TX_FLOW_EN | \</div><div class='add'>+	 AR9331_SW_PORT_STATUS_SPEED_M)</div><div class='add'>+</div><div class='add'>+#define AR9331_SW_REG_PORT_CTRL(_port)			(0x104 + (_port) * 0x100)</div><div class='add'>+#define AR9331_SW_PORT_CTRL_HEAD_EN			BIT(11)</div><div class='add'>+#define AR9331_SW_PORT_CTRL_PORT_STATE			GENMASK(2, 0)</div><div class='add'>+#define AR9331_SW_PORT_CTRL_PORT_STATE_DISABLED		0</div><div class='add'>+#define AR9331_SW_PORT_CTRL_PORT_STATE_BLOCKING		1</div><div class='add'>+#define AR9331_SW_PORT_CTRL_PORT_STATE_LISTENING	2</div><div class='add'>+#define AR9331_SW_PORT_CTRL_PORT_STATE_LEARNING		3</div><div class='add'>+#define AR9331_SW_PORT_CTRL_PORT_STATE_FORWARD		4</div><div class='add'>+</div><div class='add'>+#define AR9331_SW_REG_PORT_VLAN(_port)			(0x108 + (_port) * 0x100)</div><div class='add'>+#define AR9331_SW_PORT_VLAN_8021Q_MODE			GENMASK(31, 30)</div><div class='add'>+#define AR9331_SW_8021Q_MODE_SECURE			3</div><div class='add'>+#define AR9331_SW_8021Q_MODE_CHECK			2</div><div class='add'>+#define AR9331_SW_8021Q_MODE_FALLBACK			1</div><div class='add'>+#define AR9331_SW_8021Q_MODE_NONE			0</div><div class='add'>+#define AR9331_SW_PORT_VLAN_PORT_VID_MEMBER		GENMASK(25, 16)</div><div class='add'>+</div><div class='add'>+/* MIB registers */</div><div class='add'>+#define AR9331_MIB_COUNTER(x)			(0x20000 + ((x) * 0x100))</div><div class='add'>+</div><div class='add'>+/* Phy bypass mode</div><div class='add'>+ * ------------------------------------------------------------------------</div><div class='add'>+ * Bit:   | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 |10 |11 |12 |13 |14 |15 |</div><div class='add'>+ *</div><div class='add'>+ * real   | start |   OP  | PhyAddr           |  Reg Addr         |  TA   |</div><div class='add'>+ * atheros| start |   OP  | 2'b00 |PhyAdd[2:0]|  Reg Addr[4:0]    |  TA   |</div><div class='add'>+ *</div><div class='add'>+ *</div><div class='add'>+ * Bit:   |16 |17 |18 |19 |20 |21 |22 |23 |24 |25 |26 |27 |28 |29 |30 |31 |</div><div class='add'>+ * real   |  Data                                                         |</div><div class='add'>+ * atheros|  Data                                                         |</div><div class='add'>+ *</div><div class='add'>+ * ------------------------------------------------------------------------</div><div class='add'>+ * Page address mode</div><div class='add'>+ * ------------------------------------------------------------------------</div><div class='add'>+ * Bit:   | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 |10 |11 |12 |13 |14 |15 |</div><div class='add'>+ * real   | start |   OP  | PhyAddr           |  Reg Addr         |  TA   |</div><div class='add'>+ * atheros| start |   OP  | 2'b11 |                          8'b0 |  TA   |</div><div class='add'>+ *</div><div class='add'>+ * Bit:   |16 |17 |18 |19 |20 |21 |22 |23 |24 |25 |26 |27 |28 |29 |30 |31 |</div><div class='add'>+ * real   |  Data                                                         |</div><div class='add'>+ * atheros|                       | Page [9:0]                            |</div><div class='add'>+ */</div><div class='add'>+/* In case of Page Address mode, Bit[18:9] of 32 bit register address should be</div><div class='add'>+ * written to bits[9:0] of mdio data register.</div><div class='add'>+ */</div><div class='add'>+#define AR9331_SW_ADDR_PAGE			GENMASK(18, 9)</div><div class='add'>+</div><div class='add'>+/* ------------------------------------------------------------------------</div><div class='add'>+ * Normal register access mode</div><div class='add'>+ * ------------------------------------------------------------------------</div><div class='add'>+ * Bit:   | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 |10 |11 |12 |13 |14 |15 |</div><div class='add'>+ * real   | start |   OP  | PhyAddr           |  Reg Addr         |  TA   |</div><div class='add'>+ * atheros| start |   OP  | 2'b10 |  low_addr[7:0]                |  TA   |</div><div class='add'>+ *</div><div class='add'>+ * Bit:   |16 |17 |18 |19 |20 |21 |22 |23 |24 |25 |26 |27 |28 |29 |30 |31 |</div><div class='add'>+ * real   |  Data                                                         |</div><div class='add'>+ * atheros|  Data                                                         |</div><div class='add'>+ * ------------------------------------------------------------------------</div><div class='add'>+ */</div><div class='add'>+#define AR9331_SW_LOW_ADDR_PHY			GENMASK(8, 6)</div><div class='add'>+#define AR9331_SW_LOW_ADDR_REG			GENMASK(5, 1)</div><div class='add'>+</div><div class='add'>+#define AR9331_SW_MDIO_PHY_MODE_M		GENMASK(4, 3)</div><div class='add'>+#define AR9331_SW_MDIO_PHY_MODE_PAGE		3</div><div class='add'>+#define AR9331_SW_MDIO_PHY_MODE_REG		2</div><div class='add'>+#define AR9331_SW_MDIO_PHY_MODE_BYPASS		0</div><div class='add'>+#define AR9331_SW_MDIO_PHY_ADDR_M		GENMASK(2, 0)</div><div class='add'>+</div><div class='add'>+/* Empirical determined values */</div><div class='add'>+#define AR9331_SW_MDIO_POLL_SLEEP_US		1</div><div class='add'>+#define AR9331_SW_MDIO_POLL_TIMEOUT_US		20</div><div class='add'>+</div><div class='add'>+/* The interval should be small enough to avoid overflow of 32bit MIBs */</div><div class='add'>+/*</div><div class='add'>+ * FIXME: until we can read MIBs from stats64 call directly (i.e. sleep</div><div class='add'>+ * there), we have to poll stats more frequently then it is actually needed.</div><div class='add'>+ * For overflow protection, normally, 100 sec interval should have been OK.</div><div class='add'>+ */</div><div class='add'>+#define STATS_INTERVAL_JIFFIES			(3 * HZ)</div><div class='add'>+</div><div class='add'>+struct ar9331_sw_stats_raw {</div><div class='add'>+	u32 rxbroad;			/* 0x00 */</div><div class='add'>+	u32 rxpause;			/* 0x04 */</div><div class='add'>+	u32 rxmulti;			/* 0x08 */</div><div class='add'>+	u32 rxfcserr;			/* 0x0c */</div><div class='add'>+	u32 rxalignerr;			/* 0x10 */</div><div class='add'>+	u32 rxrunt;			/* 0x14 */</div><div class='add'>+	u32 rxfragment;			/* 0x18 */</div><div class='add'>+	u32 rx64byte;			/* 0x1c */</div><div class='add'>+	u32 rx128byte;			/* 0x20 */</div><div class='add'>+	u32 rx256byte;			/* 0x24 */</div><div class='add'>+	u32 rx512byte;			/* 0x28 */</div><div class='add'>+	u32 rx1024byte;			/* 0x2c */</div><div class='add'>+	u32 rx1518byte;			/* 0x30 */</div><div class='add'>+	u32 rxmaxbyte;			/* 0x34 */</div><div class='add'>+	u32 rxtoolong;			/* 0x38 */</div><div class='add'>+	u32 rxgoodbyte;			/* 0x3c */</div><div class='add'>+	u32 rxgoodbyte_hi;</div><div class='add'>+	u32 rxbadbyte;			/* 0x44 */</div><div class='add'>+	u32 rxbadbyte_hi;</div><div class='add'>+	u32 rxoverflow;			/* 0x4c */</div><div class='add'>+	u32 filtered;			/* 0x50 */</div><div class='add'>+	u32 txbroad;			/* 0x54 */</div><div class='add'>+	u32 txpause;			/* 0x58 */</div><div class='add'>+	u32 txmulti;			/* 0x5c */</div><div class='add'>+	u32 txunderrun;			/* 0x60 */</div><div class='add'>+	u32 tx64byte;			/* 0x64 */</div><div class='add'>+	u32 tx128byte;			/* 0x68 */</div><div class='add'>+	u32 tx256byte;			/* 0x6c */</div><div class='add'>+	u32 tx512byte;			/* 0x70 */</div><div class='add'>+	u32 tx1024byte;			/* 0x74 */</div><div class='add'>+	u32 tx1518byte;			/* 0x78 */</div><div class='add'>+	u32 txmaxbyte;			/* 0x7c */</div><div class='add'>+	u32 txoversize;			/* 0x80 */</div><div class='add'>+	u32 txbyte;			/* 0x84 */</div><div class='add'>+	u32 txbyte_hi;</div><div class='add'>+	u32 txcollision;		/* 0x8c */</div><div class='add'>+	u32 txabortcol;			/* 0x90 */</div><div class='add'>+	u32 txmulticol;			/* 0x94 */</div><div class='add'>+	u32 txsinglecol;		/* 0x98 */</div><div class='add'>+	u32 txexcdefer;			/* 0x9c */</div><div class='add'>+	u32 txdefer;			/* 0xa0 */</div><div class='add'>+	u32 txlatecol;			/* 0xa4 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ar9331_sw_port {</div><div class='add'>+	int idx;</div><div class='add'>+	struct delayed_work mib_read;</div><div class='add'>+	struct rtnl_link_stats64 stats;</div><div class='add'>+	struct ethtool_pause_stats pause_stats;</div><div class='add'>+	struct spinlock stats_lock;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ar9331_sw_priv {</div><div class='add'>+	struct device *dev;</div><div class='add'>+	struct dsa_switch ds;</div><div class='add'>+	struct dsa_switch_ops ops;</div><div class='add'>+	struct irq_domain *irqdomain;</div><div class='add'>+	u32 irq_mask;</div><div class='add'>+	struct mutex lock_irq;</div><div class='add'>+	struct mii_bus *mbus; /* mdio master */</div><div class='add'>+	struct mii_bus *sbus; /* mdio slave */</div><div class='add'>+	struct regmap *regmap;</div><div class='add'>+	struct reset_control *sw_reset;</div><div class='add'>+	struct ar9331_sw_port port[AR9331_SW_PORTS];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct ar9331_sw_priv *ar9331_sw_port_to_priv(struct ar9331_sw_port *port)</div><div class='add'>+{</div><div class='add'>+	struct ar9331_sw_port *p = port - port-&gt;idx;</div><div class='add'>+</div><div class='add'>+	return (struct ar9331_sw_priv *)((void *)p -</div><div class='add'>+					 offsetof(struct ar9331_sw_priv, port));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Warning: switch reset will reset last AR9331_SW_MDIO_PHY_MODE_PAGE request</div><div class='add'>+ * If some kind of optimization is used, the request should be repeated.</div><div class='add'>+ */</div><div class='add'>+static int ar9331_sw_reset(struct ar9331_sw_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = reset_control_assert(priv-&gt;sw_reset);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	/* AR9331 doc do not provide any information about proper reset</div><div class='add'>+	 * sequence. The AR8136 (the closes switch to the AR9331) doc says:</div><div class='add'>+	 * reset duration should be greater than 10ms. So, let's use this value</div><div class='add'>+	 * for now.</div><div class='add'>+	 */</div><div class='add'>+	usleep_range(10000, 15000);</div><div class='add'>+	ret = reset_control_deassert(priv-&gt;sw_reset);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+	/* There is no information on how long should we wait after reset.</div><div class='add'>+	 * AR8136 has an EEPROM and there is an Interrupt for EEPROM load</div><div class='add'>+	 * status. AR9331 has no EEPROM support.</div><div class='add'>+	 * For now, do not wait. In case AR8136 will be needed, the after</div><div class='add'>+	 * reset delay can be added as well.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+error:</div><div class='add'>+	dev_err_ratelimited(priv-&gt;dev, "%s: %i\n", __func__, ret);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ar9331_sw_mbus_write(struct mii_bus *mbus, int port, int regnum,</div><div class='add'>+				u16 data)</div><div class='add'>+{</div><div class='add'>+	struct ar9331_sw_priv *priv = mbus-&gt;priv;</div><div class='add'>+	struct regmap *regmap = priv-&gt;regmap;</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(regmap, AR9331_SW_REG_MDIO_CTRL,</div><div class='add'>+			   AR9331_SW_MDIO_CTRL_BUSY |</div><div class='add'>+			   AR9331_SW_MDIO_CTRL_MASTER_EN |</div><div class='add'>+			   FIELD_PREP(AR9331_SW_MDIO_CTRL_PHY_ADDR_M, port) |</div><div class='add'>+			   FIELD_PREP(AR9331_SW_MDIO_CTRL_REG_ADDR_M, regnum) |</div><div class='add'>+			   FIELD_PREP(AR9331_SW_MDIO_CTRL_DATA_M, data));</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	ret = regmap_read_poll_timeout(regmap, AR9331_SW_REG_MDIO_CTRL, val,</div><div class='add'>+				       !(val &amp; AR9331_SW_MDIO_CTRL_BUSY),</div><div class='add'>+				       AR9331_SW_MDIO_POLL_SLEEP_US,</div><div class='add'>+				       AR9331_SW_MDIO_POLL_TIMEOUT_US);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+error:</div><div class='add'>+	dev_err_ratelimited(priv-&gt;dev, "PHY write error: %i\n", ret);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ar9331_sw_mbus_read(struct mii_bus *mbus, int port, int regnum)</div><div class='add'>+{</div><div class='add'>+	struct ar9331_sw_priv *priv = mbus-&gt;priv;</div><div class='add'>+	struct regmap *regmap = priv-&gt;regmap;</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(regmap, AR9331_SW_REG_MDIO_CTRL,</div><div class='add'>+			   AR9331_SW_MDIO_CTRL_BUSY |</div><div class='add'>+			   AR9331_SW_MDIO_CTRL_MASTER_EN |</div><div class='add'>+			   AR9331_SW_MDIO_CTRL_CMD_READ |</div><div class='add'>+			   FIELD_PREP(AR9331_SW_MDIO_CTRL_PHY_ADDR_M, port) |</div><div class='add'>+			   FIELD_PREP(AR9331_SW_MDIO_CTRL_REG_ADDR_M, regnum));</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	ret = regmap_read_poll_timeout(regmap, AR9331_SW_REG_MDIO_CTRL, val,</div><div class='add'>+				       !(val &amp; AR9331_SW_MDIO_CTRL_BUSY),</div><div class='add'>+				       AR9331_SW_MDIO_POLL_SLEEP_US,</div><div class='add'>+				       AR9331_SW_MDIO_POLL_TIMEOUT_US);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	ret = regmap_read(regmap, AR9331_SW_REG_MDIO_CTRL, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	return FIELD_GET(AR9331_SW_MDIO_CTRL_DATA_M, val);</div><div class='add'>+</div><div class='add'>+error:</div><div class='add'>+	dev_err_ratelimited(priv-&gt;dev, "PHY read error: %i\n", ret);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ar9331_sw_mbus_init(struct ar9331_sw_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = priv-&gt;dev;</div><div class='add'>+	struct mii_bus *mbus;</div><div class='add'>+	struct device_node *np, *mnp;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	np = dev-&gt;of_node;</div><div class='add'>+</div><div class='add'>+	mbus = devm_mdiobus_alloc(dev);</div><div class='add'>+	if (!mbus)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mbus-&gt;name = np-&gt;full_name;</div><div class='add'>+	snprintf(mbus-&gt;id, MII_BUS_ID_SIZE, "%pOF", np);</div><div class='add'>+</div><div class='add'>+	mbus-&gt;read = ar9331_sw_mbus_read;</div><div class='add'>+	mbus-&gt;write = ar9331_sw_mbus_write;</div><div class='add'>+	mbus-&gt;priv = priv;</div><div class='add'>+	mbus-&gt;parent = dev;</div><div class='add'>+</div><div class='add'>+	mnp = of_get_child_by_name(np, "mdio");</div><div class='add'>+	if (!mnp)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	ret = devm_of_mdiobus_register(dev, mbus, mnp);</div><div class='add'>+	of_node_put(mnp);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	priv-&gt;mbus = mbus;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ar9331_sw_setup_port(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct ar9331_sw_priv *priv = ds-&gt;priv;</div><div class='add'>+	struct regmap *regmap = priv-&gt;regmap;</div><div class='add'>+	u32 port_mask, port_ctrl, val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Generate default port settings */</div><div class='add'>+	port_ctrl = FIELD_PREP(AR9331_SW_PORT_CTRL_PORT_STATE,</div><div class='add'>+			       AR9331_SW_PORT_CTRL_PORT_STATE_FORWARD);</div><div class='add'>+</div><div class='add'>+	if (dsa_is_cpu_port(ds, port)) {</div><div class='add'>+		/* CPU port should be allowed to communicate with all user</div><div class='add'>+		 * ports.</div><div class='add'>+		 */</div><div class='add'>+		port_mask = dsa_user_ports(ds);</div><div class='add'>+		/* Enable Atheros header on CPU port. This will allow us</div><div class='add'>+		 * communicate with each port separately</div><div class='add'>+		 */</div><div class='add'>+		port_ctrl |= AR9331_SW_PORT_CTRL_HEAD_EN;</div><div class='add'>+	} else if (dsa_is_user_port(ds, port)) {</div><div class='add'>+		/* User ports should communicate only with the CPU port.</div><div class='add'>+		 */</div><div class='add'>+		port_mask = BIT(dsa_upstream_port(ds, port));</div><div class='add'>+	} else {</div><div class='add'>+		/* Other ports do not need to communicate at all */</div><div class='add'>+		port_mask = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	val = FIELD_PREP(AR9331_SW_PORT_VLAN_8021Q_MODE,</div><div class='add'>+			 AR9331_SW_8021Q_MODE_NONE) |</div><div class='add'>+		FIELD_PREP(AR9331_SW_PORT_VLAN_PORT_VID_MEMBER, port_mask);</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(regmap, AR9331_SW_REG_PORT_VLAN(port), val);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(regmap, AR9331_SW_REG_PORT_CTRL(port), port_ctrl);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+error:</div><div class='add'>+	dev_err(priv-&gt;dev, "%s: error: %i\n", __func__, ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ar9331_sw_setup(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct ar9331_sw_priv *priv = ds-&gt;priv;</div><div class='add'>+	struct regmap *regmap = priv-&gt;regmap;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	ret = ar9331_sw_reset(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Reset will set proper defaults. CPU - Port0 will be enabled and</div><div class='add'>+	 * configured. All other ports (ports 1 - 5) are disabled</div><div class='add'>+	 */</div><div class='add'>+	ret = ar9331_sw_mbus_init(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Do not drop broadcast frames */</div><div class='add'>+	ret = regmap_write_bits(regmap, AR9331_SW_REG_FLOOD_MASK,</div><div class='add'>+				AR9331_SW_FLOOD_MASK_BROAD_TO_CPU,</div><div class='add'>+				AR9331_SW_FLOOD_MASK_BROAD_TO_CPU);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	/* Set max frame size to the maximum supported value */</div><div class='add'>+	ret = regmap_write_bits(regmap, AR9331_SW_REG_GLOBAL_CTRL,</div><div class='add'>+				AR9331_SW_GLOBAL_CTRL_MFS_M,</div><div class='add'>+				AR9331_SW_GLOBAL_CTRL_MFS_M);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ds-&gt;num_ports; i++) {</div><div class='add'>+		ret = ar9331_sw_setup_port(ds, i);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ds-&gt;configure_vlan_while_not_filtering = false;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+error:</div><div class='add'>+	dev_err_ratelimited(priv-&gt;dev, "%s: %i\n", __func__, ret);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ar9331_sw_port_disable(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct ar9331_sw_priv *priv = ds-&gt;priv;</div><div class='add'>+	struct regmap *regmap = priv-&gt;regmap;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(regmap, AR9331_SW_REG_PORT_STATUS(port), 0);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err_ratelimited(priv-&gt;dev, "%s: %i\n", __func__, ret);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum dsa_tag_protocol ar9331_sw_get_tag_protocol(struct dsa_switch *ds,</div><div class='add'>+							int port,</div><div class='add'>+							enum dsa_tag_protocol m)</div><div class='add'>+{</div><div class='add'>+	return DSA_TAG_PROTO_AR9331;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ar9331_sw_phylink_get_caps(struct dsa_switch *ds, int port,</div><div class='add'>+				       struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	config-&gt;mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |</div><div class='add'>+		MAC_10 | MAC_100;</div><div class='add'>+</div><div class='add'>+	switch (port) {</div><div class='add'>+	case 0:</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_GMII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		config-&gt;mac_capabilities |= MAC_1000;</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+	case 2:</div><div class='add'>+	case 3:</div><div class='add'>+	case 4:</div><div class='add'>+	case 5:</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_INTERNAL,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ar9331_sw_phylink_mac_config(struct phylink_config *config,</div><div class='add'>+					 unsigned int mode,</div><div class='add'>+					 const struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct ar9331_sw_priv *priv = dp-&gt;ds-&gt;priv;</div><div class='add'>+	struct regmap *regmap = priv-&gt;regmap;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_update_bits(regmap, AR9331_SW_REG_PORT_STATUS(dp-&gt;index),</div><div class='add'>+				 AR9331_SW_PORT_STATUS_LINK_EN |</div><div class='add'>+				 AR9331_SW_PORT_STATUS_FLOW_LINK_EN, 0);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err_ratelimited(priv-&gt;dev, "%s: %i\n", __func__, ret);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ar9331_sw_phylink_mac_link_down(struct phylink_config *config,</div><div class='add'>+					    unsigned int mode,</div><div class='add'>+					    phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct ar9331_sw_priv *priv = dp-&gt;ds-&gt;priv;</div><div class='add'>+	struct regmap *regmap = priv-&gt;regmap;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_update_bits(regmap, AR9331_SW_REG_PORT_STATUS(port),</div><div class='add'>+				 AR9331_SW_PORT_STATUS_MAC_MASK, 0);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err_ratelimited(priv-&gt;dev, "%s: %i\n", __func__, ret);</div><div class='add'>+</div><div class='add'>+	cancel_delayed_work_sync(&amp;priv-&gt;port[port].mib_read);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ar9331_sw_phylink_mac_link_up(struct phylink_config *config,</div><div class='add'>+					  struct phy_device *phydev,</div><div class='add'>+					  unsigned int mode,</div><div class='add'>+					  phy_interface_t interface,</div><div class='add'>+					  int speed, int duplex,</div><div class='add'>+					  bool tx_pause, bool rx_pause)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct ar9331_sw_priv *priv = dp-&gt;ds-&gt;priv;</div><div class='add'>+	struct regmap *regmap = priv-&gt;regmap;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	schedule_delayed_work(&amp;priv-&gt;port[port].mib_read, 0);</div><div class='add'>+</div><div class='add'>+	val = AR9331_SW_PORT_STATUS_MAC_MASK;</div><div class='add'>+	switch (speed) {</div><div class='add'>+	case SPEED_1000:</div><div class='add'>+		val |= AR9331_SW_PORT_STATUS_SPEED_1000;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_100:</div><div class='add'>+		val |= AR9331_SW_PORT_STATUS_SPEED_100;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_10:</div><div class='add'>+		val |= AR9331_SW_PORT_STATUS_SPEED_10;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (duplex)</div><div class='add'>+		val |= AR9331_SW_PORT_STATUS_DUPLEX_MODE;</div><div class='add'>+</div><div class='add'>+	if (tx_pause)</div><div class='add'>+		val |= AR9331_SW_PORT_STATUS_TX_FLOW_EN;</div><div class='add'>+</div><div class='add'>+	if (rx_pause)</div><div class='add'>+		val |= AR9331_SW_PORT_STATUS_RX_FLOW_EN;</div><div class='add'>+</div><div class='add'>+	ret = regmap_update_bits(regmap, AR9331_SW_REG_PORT_STATUS(port),</div><div class='add'>+				 AR9331_SW_PORT_STATUS_MAC_MASK |</div><div class='add'>+				 AR9331_SW_PORT_STATUS_LINK_MASK,</div><div class='add'>+				 val);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err_ratelimited(priv-&gt;dev, "%s: %i\n", __func__, ret);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ar9331_read_stats(struct ar9331_sw_port *port)</div><div class='add'>+{</div><div class='add'>+	struct ar9331_sw_priv *priv = ar9331_sw_port_to_priv(port);</div><div class='add'>+	struct ethtool_pause_stats *pstats = &amp;port-&gt;pause_stats;</div><div class='add'>+	struct rtnl_link_stats64 *stats = &amp;port-&gt;stats;</div><div class='add'>+	struct ar9331_sw_stats_raw raw;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Do the slowest part first, to avoid needless locking for long time */</div><div class='add'>+	ret = regmap_bulk_read(priv-&gt;regmap, AR9331_MIB_COUNTER(port-&gt;idx),</div><div class='add'>+			       &amp;raw, sizeof(raw) / sizeof(u32));</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err_ratelimited(priv-&gt;dev, "%s: %i\n", __func__, ret);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	/* All MIB counters are cleared automatically on read */</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;port-&gt;stats_lock);</div><div class='add'>+</div><div class='add'>+	stats-&gt;rx_bytes += raw.rxgoodbyte;</div><div class='add'>+	stats-&gt;tx_bytes += raw.txbyte;</div><div class='add'>+</div><div class='add'>+	stats-&gt;rx_packets += raw.rx64byte + raw.rx128byte + raw.rx256byte +</div><div class='add'>+		raw.rx512byte + raw.rx1024byte + raw.rx1518byte + raw.rxmaxbyte;</div><div class='add'>+	stats-&gt;tx_packets += raw.tx64byte + raw.tx128byte + raw.tx256byte +</div><div class='add'>+		raw.tx512byte + raw.tx1024byte + raw.tx1518byte + raw.txmaxbyte;</div><div class='add'>+</div><div class='add'>+	stats-&gt;rx_length_errors += raw.rxrunt + raw.rxfragment + raw.rxtoolong;</div><div class='add'>+	stats-&gt;rx_crc_errors += raw.rxfcserr;</div><div class='add'>+	stats-&gt;rx_frame_errors += raw.rxalignerr;</div><div class='add'>+	stats-&gt;rx_missed_errors += raw.rxoverflow;</div><div class='add'>+	stats-&gt;rx_dropped += raw.filtered;</div><div class='add'>+	stats-&gt;rx_errors += raw.rxfcserr + raw.rxalignerr + raw.rxrunt +</div><div class='add'>+		raw.rxfragment + raw.rxoverflow + raw.rxtoolong;</div><div class='add'>+</div><div class='add'>+	stats-&gt;tx_window_errors += raw.txlatecol;</div><div class='add'>+	stats-&gt;tx_fifo_errors += raw.txunderrun;</div><div class='add'>+	stats-&gt;tx_aborted_errors += raw.txabortcol;</div><div class='add'>+	stats-&gt;tx_errors += raw.txoversize + raw.txabortcol + raw.txunderrun +</div><div class='add'>+		raw.txlatecol;</div><div class='add'>+</div><div class='add'>+	stats-&gt;multicast += raw.rxmulti;</div><div class='add'>+	stats-&gt;collisions += raw.txcollision;</div><div class='add'>+</div><div class='add'>+	pstats-&gt;tx_pause_frames += raw.txpause;</div><div class='add'>+	pstats-&gt;rx_pause_frames += raw.rxpause;</div><div class='add'>+</div><div class='add'>+	spin_unlock(&amp;port-&gt;stats_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ar9331_do_stats_poll(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct ar9331_sw_port *port = container_of(work, struct ar9331_sw_port,</div><div class='add'>+						   mib_read.work);</div><div class='add'>+</div><div class='add'>+	ar9331_read_stats(port);</div><div class='add'>+</div><div class='add'>+	schedule_delayed_work(&amp;port-&gt;mib_read, STATS_INTERVAL_JIFFIES);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ar9331_get_stats64(struct dsa_switch *ds, int port,</div><div class='add'>+			       struct rtnl_link_stats64 *s)</div><div class='add'>+{</div><div class='add'>+	struct ar9331_sw_priv *priv = ds-&gt;priv;</div><div class='add'>+	struct ar9331_sw_port *p = &amp;priv-&gt;port[port];</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;p-&gt;stats_lock);</div><div class='add'>+	memcpy(s, &amp;p-&gt;stats, sizeof(*s));</div><div class='add'>+	spin_unlock(&amp;p-&gt;stats_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ar9331_get_pause_stats(struct dsa_switch *ds, int port,</div><div class='add'>+				   struct ethtool_pause_stats *pause_stats)</div><div class='add'>+{</div><div class='add'>+	struct ar9331_sw_priv *priv = ds-&gt;priv;</div><div class='add'>+	struct ar9331_sw_port *p = &amp;priv-&gt;port[port];</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;p-&gt;stats_lock);</div><div class='add'>+	memcpy(pause_stats, &amp;p-&gt;pause_stats, sizeof(*pause_stats));</div><div class='add'>+	spin_unlock(&amp;p-&gt;stats_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct phylink_mac_ops ar9331_phylink_mac_ops = {</div><div class='add'>+	.mac_config	= ar9331_sw_phylink_mac_config,</div><div class='add'>+	.mac_link_down	= ar9331_sw_phylink_mac_link_down,</div><div class='add'>+	.mac_link_up	= ar9331_sw_phylink_mac_link_up,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct dsa_switch_ops ar9331_sw_ops = {</div><div class='add'>+	.get_tag_protocol	= ar9331_sw_get_tag_protocol,</div><div class='add'>+	.setup			= ar9331_sw_setup,</div><div class='add'>+	.port_disable		= ar9331_sw_port_disable,</div><div class='add'>+	.phylink_get_caps	= ar9331_sw_phylink_get_caps,</div><div class='add'>+	.get_stats64		= ar9331_get_stats64,</div><div class='add'>+	.get_pause_stats	= ar9331_get_pause_stats,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static irqreturn_t ar9331_sw_irq(int irq, void *data)</div><div class='add'>+{</div><div class='add'>+	struct ar9331_sw_priv *priv = data;</div><div class='add'>+	struct regmap *regmap = priv-&gt;regmap;</div><div class='add'>+	u32 stat;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_read(regmap, AR9331_SW_REG_GINT, &amp;stat);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(priv-&gt;dev, "can't read interrupt status\n");</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!stat)</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+</div><div class='add'>+	if (stat &amp; AR9331_SW_GINT_PHY_INT) {</div><div class='add'>+		int child_irq;</div><div class='add'>+</div><div class='add'>+		child_irq = irq_find_mapping(priv-&gt;irqdomain, 0);</div><div class='add'>+		handle_nested_irq(child_irq);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(regmap, AR9331_SW_REG_GINT, stat);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(priv-&gt;dev, "can't write interrupt status\n");</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ar9331_sw_mask_irq(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct ar9331_sw_priv *priv = irq_data_get_irq_chip_data(d);</div><div class='add'>+</div><div class='add'>+	priv-&gt;irq_mask = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ar9331_sw_unmask_irq(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct ar9331_sw_priv *priv = irq_data_get_irq_chip_data(d);</div><div class='add'>+</div><div class='add'>+	priv-&gt;irq_mask = AR9331_SW_GINT_PHY_INT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ar9331_sw_irq_bus_lock(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct ar9331_sw_priv *priv = irq_data_get_irq_chip_data(d);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;lock_irq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ar9331_sw_irq_bus_sync_unlock(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct ar9331_sw_priv *priv = irq_data_get_irq_chip_data(d);</div><div class='add'>+	struct regmap *regmap = priv-&gt;regmap;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_update_bits(regmap, AR9331_SW_REG_GINT_MASK,</div><div class='add'>+				 AR9331_SW_GINT_PHY_INT, priv-&gt;irq_mask);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(priv-&gt;dev, "failed to change IRQ mask\n");</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;lock_irq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct irq_chip ar9331_sw_irq_chip = {</div><div class='add'>+	.name = AR9331_SW_NAME,</div><div class='add'>+	.irq_mask = ar9331_sw_mask_irq,</div><div class='add'>+	.irq_unmask = ar9331_sw_unmask_irq,</div><div class='add'>+	.irq_bus_lock = ar9331_sw_irq_bus_lock,</div><div class='add'>+	.irq_bus_sync_unlock = ar9331_sw_irq_bus_sync_unlock,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int ar9331_sw_irq_map(struct irq_domain *domain, unsigned int irq,</div><div class='add'>+			     irq_hw_number_t hwirq)</div><div class='add'>+{</div><div class='add'>+	irq_set_chip_data(irq, domain-&gt;host_data);</div><div class='add'>+	irq_set_chip_and_handler(irq, &amp;ar9331_sw_irq_chip, handle_simple_irq);</div><div class='add'>+	irq_set_nested_thread(irq, 1);</div><div class='add'>+	irq_set_noprobe(irq);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ar9331_sw_irq_unmap(struct irq_domain *d, unsigned int irq)</div><div class='add'>+{</div><div class='add'>+	irq_set_nested_thread(irq, 0);</div><div class='add'>+	irq_set_chip_and_handler(irq, NULL, NULL);</div><div class='add'>+	irq_set_chip_data(irq, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct irq_domain_ops ar9331_sw_irqdomain_ops = {</div><div class='add'>+	.map = ar9331_sw_irq_map,</div><div class='add'>+	.unmap = ar9331_sw_irq_unmap,</div><div class='add'>+	.xlate = irq_domain_xlate_onecell,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int ar9331_sw_irq_init(struct ar9331_sw_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct device_node *np = priv-&gt;dev-&gt;of_node;</div><div class='add'>+	struct device *dev = priv-&gt;dev;</div><div class='add'>+	int ret, irq;</div><div class='add'>+</div><div class='add'>+	irq = of_irq_get(np, 0);</div><div class='add'>+	if (irq &lt;= 0) {</div><div class='add'>+		dev_err(dev, "failed to get parent IRQ\n");</div><div class='add'>+		return irq ? irq : -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;priv-&gt;lock_irq);</div><div class='add'>+	ret = devm_request_threaded_irq(dev, irq, NULL, ar9331_sw_irq,</div><div class='add'>+					IRQF_ONESHOT, AR9331_SW_NAME, priv);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "unable to request irq: %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;irqdomain = irq_domain_create_linear(dev_fwnode(dev), 1, &amp;ar9331_sw_irqdomain_ops,</div><div class='add'>+						   priv);</div><div class='add'>+	if (!priv-&gt;irqdomain) {</div><div class='add'>+		dev_err(dev, "failed to create IRQ domain\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	irq_set_parent(irq_create_mapping(priv-&gt;irqdomain, 0), irq);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __ar9331_mdio_write(struct mii_bus *sbus, u8 mode, u16 reg, u16 val)</div><div class='add'>+{</div><div class='add'>+	u8 r, p;</div><div class='add'>+</div><div class='add'>+	p = FIELD_PREP(AR9331_SW_MDIO_PHY_MODE_M, mode) |</div><div class='add'>+		FIELD_GET(AR9331_SW_LOW_ADDR_PHY, reg);</div><div class='add'>+	r = FIELD_GET(AR9331_SW_LOW_ADDR_REG, reg);</div><div class='add'>+</div><div class='add'>+	return __mdiobus_write(sbus, p, r, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __ar9331_mdio_read(struct mii_bus *sbus, u16 reg)</div><div class='add'>+{</div><div class='add'>+	u8 r, p;</div><div class='add'>+</div><div class='add'>+	p = FIELD_PREP(AR9331_SW_MDIO_PHY_MODE_M, AR9331_SW_MDIO_PHY_MODE_REG) |</div><div class='add'>+		FIELD_GET(AR9331_SW_LOW_ADDR_PHY, reg);</div><div class='add'>+	r = FIELD_GET(AR9331_SW_LOW_ADDR_REG, reg);</div><div class='add'>+</div><div class='add'>+	return __mdiobus_read(sbus, p, r);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ar9331_mdio_read(void *ctx, const void *reg_buf, size_t reg_len,</div><div class='add'>+			    void *val_buf, size_t val_len)</div><div class='add'>+{</div><div class='add'>+	struct ar9331_sw_priv *priv = ctx;</div><div class='add'>+	struct mii_bus *sbus = priv-&gt;sbus;</div><div class='add'>+	u32 reg = *(u32 *)reg_buf;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (reg == AR9331_SW_REG_PAGE) {</div><div class='add'>+		/* We cannot read the page selector register from hardware and</div><div class='add'>+		 * we cache its value in regmap. Return all bits set here,</div><div class='add'>+		 * that regmap will always write the page on first use.</div><div class='add'>+		 */</div><div class='add'>+		*(u32 *)val_buf = GENMASK(9, 0);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_lock_nested(&amp;sbus-&gt;mdio_lock, MDIO_MUTEX_NESTED);</div><div class='add'>+</div><div class='add'>+	ret = __ar9331_mdio_read(sbus, reg);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	*(u32 *)val_buf = ret;</div><div class='add'>+	ret = __ar9331_mdio_read(sbus, reg + 2);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	*(u32 *)val_buf |= ret &lt;&lt; 16;</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;sbus-&gt;mdio_lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+error:</div><div class='add'>+	mutex_unlock(&amp;sbus-&gt;mdio_lock);</div><div class='add'>+	dev_err_ratelimited(&amp;sbus-&gt;dev, "Bus error. Failed to read register.\n");</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ar9331_mdio_write(void *ctx, u32 reg, u32 val)</div><div class='add'>+{</div><div class='add'>+	struct ar9331_sw_priv *priv = (struct ar9331_sw_priv *)ctx;</div><div class='add'>+	struct mii_bus *sbus = priv-&gt;sbus;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock_nested(&amp;sbus-&gt;mdio_lock, MDIO_MUTEX_NESTED);</div><div class='add'>+	if (reg == AR9331_SW_REG_PAGE) {</div><div class='add'>+		ret = __ar9331_mdio_write(sbus, AR9331_SW_MDIO_PHY_MODE_PAGE,</div><div class='add'>+					  0, val);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			goto error;</div><div class='add'>+</div><div class='add'>+		mutex_unlock(&amp;sbus-&gt;mdio_lock);</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* In case of this switch we work with 32bit registers on top of 16bit</div><div class='add'>+	 * bus. Some registers (for example access to forwarding database) have</div><div class='add'>+	 * trigger bit on the first 16bit half of request, the result and</div><div class='add'>+	 * configuration of request in the second half.</div><div class='add'>+	 * To make it work properly, we should do the second part of transfer</div><div class='add'>+	 * before the first one is done.</div><div class='add'>+	 */</div><div class='add'>+	ret = __ar9331_mdio_write(sbus, AR9331_SW_MDIO_PHY_MODE_REG, reg + 2,</div><div class='add'>+				  val &gt;&gt; 16);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	ret = __ar9331_mdio_write(sbus, AR9331_SW_MDIO_PHY_MODE_REG, reg, val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;sbus-&gt;mdio_lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+error:</div><div class='add'>+	mutex_unlock(&amp;sbus-&gt;mdio_lock);</div><div class='add'>+	dev_err_ratelimited(&amp;sbus-&gt;dev, "Bus error. Failed to write register.\n");</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ar9331_sw_bus_write(void *context, const void *data, size_t count)</div><div class='add'>+{</div><div class='add'>+	u32 reg = *(u32 *)data;</div><div class='add'>+	u32 val = *((u32 *)data + 1);</div><div class='add'>+</div><div class='add'>+	return ar9331_mdio_write(context, reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct regmap_range ar9331_valid_regs[] = {</div><div class='add'>+	regmap_reg_range(0x0, 0x0),</div><div class='add'>+	regmap_reg_range(0x10, 0x14),</div><div class='add'>+	regmap_reg_range(0x20, 0x24),</div><div class='add'>+	regmap_reg_range(0x2c, 0x30),</div><div class='add'>+	regmap_reg_range(0x40, 0x44),</div><div class='add'>+	regmap_reg_range(0x50, 0x78),</div><div class='add'>+	regmap_reg_range(0x80, 0x98),</div><div class='add'>+</div><div class='add'>+	regmap_reg_range(0x100, 0x120),</div><div class='add'>+	regmap_reg_range(0x200, 0x220),</div><div class='add'>+	regmap_reg_range(0x300, 0x320),</div><div class='add'>+	regmap_reg_range(0x400, 0x420),</div><div class='add'>+	regmap_reg_range(0x500, 0x520),</div><div class='add'>+	regmap_reg_range(0x600, 0x620),</div><div class='add'>+</div><div class='add'>+	regmap_reg_range(0x20000, 0x200a4),</div><div class='add'>+	regmap_reg_range(0x20100, 0x201a4),</div><div class='add'>+	regmap_reg_range(0x20200, 0x202a4),</div><div class='add'>+	regmap_reg_range(0x20300, 0x203a4),</div><div class='add'>+	regmap_reg_range(0x20400, 0x204a4),</div><div class='add'>+	regmap_reg_range(0x20500, 0x205a4),</div><div class='add'>+</div><div class='add'>+	/* dummy page selector reg */</div><div class='add'>+	regmap_reg_range(AR9331_SW_REG_PAGE, AR9331_SW_REG_PAGE),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_range ar9331_nonvolatile_regs[] = {</div><div class='add'>+	regmap_reg_range(AR9331_SW_REG_PAGE, AR9331_SW_REG_PAGE),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_range_cfg ar9331_regmap_range[] = {</div><div class='add'>+	{</div><div class='add'>+		.selector_reg = AR9331_SW_REG_PAGE,</div><div class='add'>+		.selector_mask = GENMASK(9, 0),</div><div class='add'>+		.selector_shift = 0,</div><div class='add'>+</div><div class='add'>+		.window_start = 0,</div><div class='add'>+		.window_len = 512,</div><div class='add'>+</div><div class='add'>+		.range_min = 0,</div><div class='add'>+		.range_max = AR9331_SW_REG_PAGE - 4,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_access_table ar9331_register_set = {</div><div class='add'>+	.yes_ranges = ar9331_valid_regs,</div><div class='add'>+	.n_yes_ranges = ARRAY_SIZE(ar9331_valid_regs),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_access_table ar9331_volatile_set = {</div><div class='add'>+	.no_ranges = ar9331_nonvolatile_regs,</div><div class='add'>+	.n_no_ranges = ARRAY_SIZE(ar9331_nonvolatile_regs),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_config ar9331_mdio_regmap_config = {</div><div class='add'>+	.reg_bits = 32,</div><div class='add'>+	.val_bits = 32,</div><div class='add'>+	.reg_stride = 4,</div><div class='add'>+	.max_register = AR9331_SW_REG_PAGE,</div><div class='add'>+	.use_single_read = true,</div><div class='add'>+	.use_single_write = true,</div><div class='add'>+</div><div class='add'>+	.ranges = ar9331_regmap_range,</div><div class='add'>+	.num_ranges = ARRAY_SIZE(ar9331_regmap_range),</div><div class='add'>+</div><div class='add'>+	.volatile_table = &amp;ar9331_volatile_set,</div><div class='add'>+	.wr_table = &amp;ar9331_register_set,</div><div class='add'>+	.rd_table = &amp;ar9331_register_set,</div><div class='add'>+</div><div class='add'>+	.cache_type = REGCACHE_MAPLE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct regmap_bus ar9331_sw_bus = {</div><div class='add'>+	.reg_format_endian_default = REGMAP_ENDIAN_NATIVE,</div><div class='add'>+	.val_format_endian_default = REGMAP_ENDIAN_NATIVE,</div><div class='add'>+	.read = ar9331_mdio_read,</div><div class='add'>+	.write = ar9331_sw_bus_write,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int ar9331_sw_probe(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct ar9331_sw_priv *priv;</div><div class='add'>+	struct dsa_switch *ds;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	priv = devm_kzalloc(&amp;mdiodev-&gt;dev, sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv-&gt;regmap = devm_regmap_init(&amp;mdiodev-&gt;dev, &amp;ar9331_sw_bus, priv,</div><div class='add'>+					&amp;ar9331_mdio_regmap_config);</div><div class='add'>+	if (IS_ERR(priv-&gt;regmap)) {</div><div class='add'>+		ret = PTR_ERR(priv-&gt;regmap);</div><div class='add'>+		dev_err(&amp;mdiodev-&gt;dev, "regmap init failed: %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;sw_reset = devm_reset_control_get(&amp;mdiodev-&gt;dev, "switch");</div><div class='add'>+	if (IS_ERR(priv-&gt;sw_reset)) {</div><div class='add'>+		dev_err(&amp;mdiodev-&gt;dev, "missing switch reset\n");</div><div class='add'>+		return PTR_ERR(priv-&gt;sw_reset);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;sbus = mdiodev-&gt;bus;</div><div class='add'>+	priv-&gt;dev = &amp;mdiodev-&gt;dev;</div><div class='add'>+</div><div class='add'>+	ret = ar9331_sw_irq_init(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ds = &amp;priv-&gt;ds;</div><div class='add'>+	ds-&gt;dev = &amp;mdiodev-&gt;dev;</div><div class='add'>+	ds-&gt;num_ports = AR9331_SW_PORTS;</div><div class='add'>+	ds-&gt;priv = priv;</div><div class='add'>+	priv-&gt;ops = ar9331_sw_ops;</div><div class='add'>+	ds-&gt;ops = &amp;priv-&gt;ops;</div><div class='add'>+	ds-&gt;phylink_mac_ops = &amp;ar9331_phylink_mac_ops;</div><div class='add'>+	dev_set_drvdata(&amp;mdiodev-&gt;dev, priv);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(priv-&gt;port); i++) {</div><div class='add'>+		struct ar9331_sw_port *port = &amp;priv-&gt;port[i];</div><div class='add'>+</div><div class='add'>+		port-&gt;idx = i;</div><div class='add'>+		spin_lock_init(&amp;port-&gt;stats_lock);</div><div class='add'>+		INIT_DELAYED_WORK(&amp;port-&gt;mib_read, ar9331_do_stats_poll);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = dsa_register_switch(ds);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_remove_irq;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_remove_irq:</div><div class='add'>+	irq_domain_remove(priv-&gt;irqdomain);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ar9331_sw_remove(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct ar9331_sw_priv *priv = dev_get_drvdata(&amp;mdiodev-&gt;dev);</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(priv-&gt;port); i++) {</div><div class='add'>+		struct ar9331_sw_port *port = &amp;priv-&gt;port[i];</div><div class='add'>+</div><div class='add'>+		cancel_delayed_work_sync(&amp;port-&gt;mib_read);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	irq_domain_remove(priv-&gt;irqdomain);</div><div class='add'>+	dsa_unregister_switch(&amp;priv-&gt;ds);</div><div class='add'>+</div><div class='add'>+	reset_control_assert(priv-&gt;sw_reset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ar9331_sw_shutdown(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct ar9331_sw_priv *priv = dev_get_drvdata(&amp;mdiodev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dsa_switch_shutdown(&amp;priv-&gt;ds);</div><div class='add'>+</div><div class='add'>+	dev_set_drvdata(&amp;mdiodev-&gt;dev, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id ar9331_sw_of_match[] = {</div><div class='add'>+	{ .compatible = "qca,ar9331-switch" },</div><div class='add'>+	{ },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct mdio_driver ar9331_sw_mdio_driver = {</div><div class='add'>+	.probe = ar9331_sw_probe,</div><div class='add'>+	.remove = ar9331_sw_remove,</div><div class='add'>+	.shutdown = ar9331_sw_shutdown,</div><div class='add'>+	.mdiodrv.driver = {</div><div class='add'>+		.name = AR9331_SW_NAME,</div><div class='add'>+		.of_match_table = ar9331_sw_of_match,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+mdio_module_driver(ar9331_sw_mdio_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Oleksij Rempel &lt;kernel@pengutronix.de&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Driver for Atheros AR9331 switch");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/net/dsa/qca/qca8k-8xxx.c b/drivers/net/dsa/qca/qca8k-8xxx.c<br/>new file mode 100644<br/>index 000000000000..a36b8b07030e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/qca/qca8k-8xxx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/qca/qca8k-8xxx.c</a></div><div class='hunk'>@@ -0,0 +1,2227 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2009 Felix Fietkau &lt;nbd@nbd.name&gt;</div><div class='add'>+ * Copyright (C) 2011-2012 Gabor Juhos &lt;juhosg@openwrt.org&gt;</div><div class='add'>+ * Copyright (c) 2015, 2019, The Linux Foundation. All rights reserved.</div><div class='add'>+ * Copyright (c) 2016 John Crispin &lt;john@phrozen.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+#include &lt;linux/of_net.h&gt;</div><div class='add'>+#include &lt;linux/of_mdio.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/mdio.h&gt;</div><div class='add'>+#include &lt;linux/phylink.h&gt;</div><div class='add'>+#include &lt;linux/gpio/consumer.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/dsa/tag_qca.h&gt;</div><div class='add'>+</div><div class='add'>+#include "qca8k.h"</div><div class='add'>+#include "qca8k_leds.h"</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+qca8k_split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page)</div><div class='add'>+{</div><div class='add'>+	regaddr &gt;&gt;= 1;</div><div class='add'>+	*r1 = regaddr &amp; 0x1e;</div><div class='add'>+</div><div class='add'>+	regaddr &gt;&gt;= 5;</div><div class='add'>+	*r2 = regaddr &amp; 0x7;</div><div class='add'>+</div><div class='add'>+	regaddr &gt;&gt;= 3;</div><div class='add'>+	*page = regaddr &amp; 0x3ff;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_mii_write_lo(struct mii_bus *bus, int phy_id, u32 regnum, u32 val)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u16 lo;</div><div class='add'>+</div><div class='add'>+	lo = val &amp; 0xffff;</div><div class='add'>+	ret = bus-&gt;write(bus, phy_id, regnum, lo);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		dev_err_ratelimited(&amp;bus-&gt;dev,</div><div class='add'>+				    "failed to write qca8k 32bit lo register\n");</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_mii_write_hi(struct mii_bus *bus, int phy_id, u32 regnum, u32 val)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u16 hi;</div><div class='add'>+</div><div class='add'>+	hi = (u16)(val &gt;&gt; 16);</div><div class='add'>+	ret = bus-&gt;write(bus, phy_id, regnum, hi);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		dev_err_ratelimited(&amp;bus-&gt;dev,</div><div class='add'>+				    "failed to write qca8k 32bit hi register\n");</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_mii_read_lo(struct mii_bus *bus, int phy_id, u32 regnum, u32 *val)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = bus-&gt;read(bus, phy_id, regnum);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	*val = ret &amp; 0xffff;</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	dev_err_ratelimited(&amp;bus-&gt;dev,</div><div class='add'>+			    "failed to read qca8k 32bit lo register\n");</div><div class='add'>+	*val = 0;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_mii_read_hi(struct mii_bus *bus, int phy_id, u32 regnum, u32 *val)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = bus-&gt;read(bus, phy_id, regnum);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	*val = ret &lt;&lt; 16;</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	dev_err_ratelimited(&amp;bus-&gt;dev,</div><div class='add'>+			    "failed to read qca8k 32bit hi register\n");</div><div class='add'>+	*val = 0;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_mii_read32(struct mii_bus *bus, int phy_id, u32 regnum, u32 *val)</div><div class='add'>+{</div><div class='add'>+	u32 hi, lo;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	*val = 0;</div><div class='add'>+</div><div class='add'>+	ret = qca8k_mii_read_lo(bus, phy_id, regnum, &amp;lo);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	ret = qca8k_mii_read_hi(bus, phy_id, regnum + 1, &amp;hi);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	*val = lo | hi;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+qca8k_mii_write32(struct mii_bus *bus, int phy_id, u32 regnum, u32 val)</div><div class='add'>+{</div><div class='add'>+	if (qca8k_mii_write_lo(bus, phy_id, regnum, val) &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	qca8k_mii_write_hi(bus, phy_id, regnum + 1, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_set_page(struct qca8k_priv *priv, u16 page)</div><div class='add'>+{</div><div class='add'>+	u16 *cached_page = &amp;priv-&gt;mdio_cache.page;</div><div class='add'>+	struct mii_bus *bus = priv-&gt;bus;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (page == *cached_page)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ret = bus-&gt;write(bus, 0x18, 0, page);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err_ratelimited(&amp;bus-&gt;dev,</div><div class='add'>+				    "failed to set qca8k page\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*cached_page = page;</div><div class='add'>+	usleep_range(1000, 2000);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void qca8k_rw_reg_ack_handler(struct dsa_switch *ds, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_mgmt_eth_data *mgmt_eth_data;</div><div class='add'>+	struct qca8k_priv *priv = ds-&gt;priv;</div><div class='add'>+	struct qca_mgmt_ethhdr *mgmt_ethhdr;</div><div class='add'>+	u32 command;</div><div class='add'>+	u8 len, cmd;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	mgmt_ethhdr = (struct qca_mgmt_ethhdr *)skb_mac_header(skb);</div><div class='add'>+	mgmt_eth_data = &amp;priv-&gt;mgmt_eth_data;</div><div class='add'>+</div><div class='add'>+	command = get_unaligned_le32(&amp;mgmt_ethhdr-&gt;command);</div><div class='add'>+	cmd = FIELD_GET(QCA_HDR_MGMT_CMD, command);</div><div class='add'>+</div><div class='add'>+	len = FIELD_GET(QCA_HDR_MGMT_LENGTH, command);</div><div class='add'>+	/* Special case for len of 15 as this is the max value for len and needs to</div><div class='add'>+	 * be increased before converting it from word to dword.</div><div class='add'>+	 */</div><div class='add'>+	if (len == 15)</div><div class='add'>+		len++;</div><div class='add'>+</div><div class='add'>+	/* We can ignore odd value, we always round up them in the alloc function. */</div><div class='add'>+	len *= sizeof(u16);</div><div class='add'>+</div><div class='add'>+	/* Make sure the seq match the requested packet */</div><div class='add'>+	if (get_unaligned_le32(&amp;mgmt_ethhdr-&gt;seq) == mgmt_eth_data-&gt;seq)</div><div class='add'>+		mgmt_eth_data-&gt;ack = true;</div><div class='add'>+</div><div class='add'>+	if (cmd == MDIO_READ) {</div><div class='add'>+		u32 *val = mgmt_eth_data-&gt;data;</div><div class='add'>+</div><div class='add'>+		*val = get_unaligned_le32(&amp;mgmt_ethhdr-&gt;mdio_data);</div><div class='add'>+</div><div class='add'>+		/* Get the rest of the 12 byte of data.</div><div class='add'>+		 * The read/write function will extract the requested data.</div><div class='add'>+		 */</div><div class='add'>+		if (len &gt; QCA_HDR_MGMT_DATA1_LEN) {</div><div class='add'>+			__le32 *data2 = (__le32 *)skb-&gt;data;</div><div class='add'>+			int data_len = min_t(int, QCA_HDR_MGMT_DATA2_LEN,</div><div class='add'>+					     len - QCA_HDR_MGMT_DATA1_LEN);</div><div class='add'>+</div><div class='add'>+			val++;</div><div class='add'>+</div><div class='add'>+			for (i = sizeof(u32); i &lt;= data_len; i += sizeof(u32)) {</div><div class='add'>+				*val = get_unaligned_le32(data2);</div><div class='add'>+				val++;</div><div class='add'>+				data2++;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	complete(&amp;mgmt_eth_data-&gt;rw_done);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct sk_buff *qca8k_alloc_mdio_header(enum mdio_cmd cmd, u32 reg, u32 *val,</div><div class='add'>+					       int priority, unsigned int len)</div><div class='add'>+{</div><div class='add'>+	struct qca_mgmt_ethhdr *mgmt_ethhdr;</div><div class='add'>+	unsigned int real_len;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	__le32 *data2;</div><div class='add'>+	u32 command;</div><div class='add'>+	u16 hdr;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	skb = dev_alloc_skb(QCA_HDR_MGMT_PKT_LEN);</div><div class='add'>+	if (!skb)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	/* Hdr mgmt length value is in step of word size.</div><div class='add'>+	 * As an example to process 4 byte of data the correct length to set is 2.</div><div class='add'>+	 * To process 8 byte 4, 12 byte 6, 16 byte 8...</div><div class='add'>+	 *</div><div class='add'>+	 * Odd values will always return the next size on the ack packet.</div><div class='add'>+	 * (length of 3 (6 byte) will always return 8 bytes of data)</div><div class='add'>+	 *</div><div class='add'>+	 * This means that a value of 15 (0xf) actually means reading/writing 32 bytes</div><div class='add'>+	 * of data.</div><div class='add'>+	 *</div><div class='add'>+	 * To correctly calculate the length we devide the requested len by word and</div><div class='add'>+	 * round up.</div><div class='add'>+	 * On the ack function we can skip the odd check as we already handle the</div><div class='add'>+	 * case here.</div><div class='add'>+	 */</div><div class='add'>+	real_len = DIV_ROUND_UP(len, sizeof(u16));</div><div class='add'>+</div><div class='add'>+	/* We check if the result len is odd and we round up another time to</div><div class='add'>+	 * the next size. (length of 3 will be increased to 4 as switch will always</div><div class='add'>+	 * return 8 bytes)</div><div class='add'>+	 */</div><div class='add'>+	if (real_len % sizeof(u16) != 0)</div><div class='add'>+		real_len++;</div><div class='add'>+</div><div class='add'>+	/* Max reg value is 0xf(15) but switch will always return the next size (32 byte) */</div><div class='add'>+	if (real_len == 16)</div><div class='add'>+		real_len--;</div><div class='add'>+</div><div class='add'>+	skb_reset_mac_header(skb);</div><div class='add'>+	skb_set_network_header(skb, skb-&gt;len);</div><div class='add'>+</div><div class='add'>+	mgmt_ethhdr = skb_push(skb, QCA_HDR_MGMT_HEADER_LEN + QCA_HDR_LEN);</div><div class='add'>+</div><div class='add'>+	hdr = FIELD_PREP(QCA_HDR_XMIT_VERSION, QCA_HDR_VERSION);</div><div class='add'>+	hdr |= FIELD_PREP(QCA_HDR_XMIT_PRIORITY, priority);</div><div class='add'>+	hdr |= QCA_HDR_XMIT_FROM_CPU;</div><div class='add'>+	hdr |= FIELD_PREP(QCA_HDR_XMIT_DP_BIT, BIT(0));</div><div class='add'>+	hdr |= FIELD_PREP(QCA_HDR_XMIT_CONTROL, QCA_HDR_XMIT_TYPE_RW_REG);</div><div class='add'>+</div><div class='add'>+	command = FIELD_PREP(QCA_HDR_MGMT_ADDR, reg);</div><div class='add'>+	command |= FIELD_PREP(QCA_HDR_MGMT_LENGTH, real_len);</div><div class='add'>+	command |= FIELD_PREP(QCA_HDR_MGMT_CMD, cmd);</div><div class='add'>+	command |= FIELD_PREP(QCA_HDR_MGMT_CHECK_CODE,</div><div class='add'>+					   QCA_HDR_MGMT_CHECK_CODE_VAL);</div><div class='add'>+</div><div class='add'>+	put_unaligned_le32(command, &amp;mgmt_ethhdr-&gt;command);</div><div class='add'>+</div><div class='add'>+	if (cmd == MDIO_WRITE)</div><div class='add'>+		put_unaligned_le32(*val, &amp;mgmt_ethhdr-&gt;mdio_data);</div><div class='add'>+</div><div class='add'>+	mgmt_ethhdr-&gt;hdr = htons(hdr);</div><div class='add'>+</div><div class='add'>+	data2 = skb_put_zero(skb, QCA_HDR_MGMT_DATA2_LEN + QCA_HDR_MGMT_PADDING_LEN);</div><div class='add'>+	if (cmd == MDIO_WRITE &amp;&amp; len &gt; QCA_HDR_MGMT_DATA1_LEN) {</div><div class='add'>+		int data_len = min_t(int, QCA_HDR_MGMT_DATA2_LEN,</div><div class='add'>+				     len - QCA_HDR_MGMT_DATA1_LEN);</div><div class='add'>+</div><div class='add'>+		val++;</div><div class='add'>+</div><div class='add'>+		for (i = sizeof(u32); i &lt;= data_len; i += sizeof(u32)) {</div><div class='add'>+			put_unaligned_le32(*val, data2);</div><div class='add'>+			data2++;</div><div class='add'>+			val++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return skb;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void qca8k_mdio_header_fill_seq_num(struct sk_buff *skb, u32 seq_num)</div><div class='add'>+{</div><div class='add'>+	struct qca_mgmt_ethhdr *mgmt_ethhdr;</div><div class='add'>+	u32 seq;</div><div class='add'>+</div><div class='add'>+	seq = FIELD_PREP(QCA_HDR_MGMT_SEQ_NUM, seq_num);</div><div class='add'>+	mgmt_ethhdr = (struct qca_mgmt_ethhdr *)skb-&gt;data;</div><div class='add'>+	put_unaligned_le32(seq, &amp;mgmt_ethhdr-&gt;seq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int qca8k_read_eth(struct qca8k_priv *priv, u32 reg, u32 *val, int len)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_mgmt_eth_data *mgmt_eth_data = &amp;priv-&gt;mgmt_eth_data;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	bool ack;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	skb = qca8k_alloc_mdio_header(MDIO_READ, reg, NULL,</div><div class='add'>+				      QCA8K_ETHERNET_MDIO_PRIORITY, len);</div><div class='add'>+	if (!skb)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;mgmt_eth_data-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	/* Check if the mgmt_conduit if is operational */</div><div class='add'>+	if (!priv-&gt;mgmt_conduit) {</div><div class='add'>+		kfree_skb(skb);</div><div class='add'>+		mutex_unlock(&amp;mgmt_eth_data-&gt;mutex);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb-&gt;dev = priv-&gt;mgmt_conduit;</div><div class='add'>+</div><div class='add'>+	reinit_completion(&amp;mgmt_eth_data-&gt;rw_done);</div><div class='add'>+</div><div class='add'>+	/* Increment seq_num and set it in the mdio pkt */</div><div class='add'>+	mgmt_eth_data-&gt;seq++;</div><div class='add'>+	qca8k_mdio_header_fill_seq_num(skb, mgmt_eth_data-&gt;seq);</div><div class='add'>+	mgmt_eth_data-&gt;ack = false;</div><div class='add'>+</div><div class='add'>+	dev_queue_xmit(skb);</div><div class='add'>+</div><div class='add'>+	ret = wait_for_completion_timeout(&amp;mgmt_eth_data-&gt;rw_done,</div><div class='add'>+					  QCA8K_ETHERNET_TIMEOUT);</div><div class='add'>+</div><div class='add'>+	*val = mgmt_eth_data-&gt;data[0];</div><div class='add'>+	if (len &gt; QCA_HDR_MGMT_DATA1_LEN)</div><div class='add'>+		memcpy(val + 1, mgmt_eth_data-&gt;data + 1, len - QCA_HDR_MGMT_DATA1_LEN);</div><div class='add'>+</div><div class='add'>+	ack = mgmt_eth_data-&gt;ack;</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;mgmt_eth_data-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	if (ret &lt;= 0)</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+	if (!ack)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int qca8k_write_eth(struct qca8k_priv *priv, u32 reg, u32 *val, int len)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_mgmt_eth_data *mgmt_eth_data = &amp;priv-&gt;mgmt_eth_data;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	bool ack;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	skb = qca8k_alloc_mdio_header(MDIO_WRITE, reg, val,</div><div class='add'>+				      QCA8K_ETHERNET_MDIO_PRIORITY, len);</div><div class='add'>+	if (!skb)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;mgmt_eth_data-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	/* Check if the mgmt_conduit if is operational */</div><div class='add'>+	if (!priv-&gt;mgmt_conduit) {</div><div class='add'>+		kfree_skb(skb);</div><div class='add'>+		mutex_unlock(&amp;mgmt_eth_data-&gt;mutex);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb-&gt;dev = priv-&gt;mgmt_conduit;</div><div class='add'>+</div><div class='add'>+	reinit_completion(&amp;mgmt_eth_data-&gt;rw_done);</div><div class='add'>+</div><div class='add'>+	/* Increment seq_num and set it in the mdio pkt */</div><div class='add'>+	mgmt_eth_data-&gt;seq++;</div><div class='add'>+	qca8k_mdio_header_fill_seq_num(skb, mgmt_eth_data-&gt;seq);</div><div class='add'>+	mgmt_eth_data-&gt;ack = false;</div><div class='add'>+</div><div class='add'>+	dev_queue_xmit(skb);</div><div class='add'>+</div><div class='add'>+	ret = wait_for_completion_timeout(&amp;mgmt_eth_data-&gt;rw_done,</div><div class='add'>+					  QCA8K_ETHERNET_TIMEOUT);</div><div class='add'>+</div><div class='add'>+	ack = mgmt_eth_data-&gt;ack;</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;mgmt_eth_data-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	if (ret &lt;= 0)</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+	if (!ack)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_regmap_update_bits_eth(struct qca8k_priv *priv, u32 reg, u32 mask, u32 write_val)</div><div class='add'>+{</div><div class='add'>+	u32 val = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = qca8k_read_eth(priv, reg, &amp;val, sizeof(val));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	val &amp;= ~mask;</div><div class='add'>+	val |= write_val;</div><div class='add'>+</div><div class='add'>+	return qca8k_write_eth(priv, reg, &amp;val, sizeof(val));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_read_mii(struct qca8k_priv *priv, uint32_t reg, uint32_t *val)</div><div class='add'>+{</div><div class='add'>+	struct mii_bus *bus = priv-&gt;bus;</div><div class='add'>+	u16 r1, r2, page;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	qca8k_split_addr(reg, &amp;r1, &amp;r2, &amp;page);</div><div class='add'>+</div><div class='add'>+	mutex_lock_nested(&amp;bus-&gt;mdio_lock, MDIO_MUTEX_NESTED);</div><div class='add'>+</div><div class='add'>+	ret = qca8k_set_page(priv, page);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto exit;</div><div class='add'>+</div><div class='add'>+	ret = qca8k_mii_read32(bus, 0x10 | r2, r1, val);</div><div class='add'>+</div><div class='add'>+exit:</div><div class='add'>+	mutex_unlock(&amp;bus-&gt;mdio_lock);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_write_mii(struct qca8k_priv *priv, uint32_t reg, uint32_t val)</div><div class='add'>+{</div><div class='add'>+	struct mii_bus *bus = priv-&gt;bus;</div><div class='add'>+	u16 r1, r2, page;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	qca8k_split_addr(reg, &amp;r1, &amp;r2, &amp;page);</div><div class='add'>+</div><div class='add'>+	mutex_lock_nested(&amp;bus-&gt;mdio_lock, MDIO_MUTEX_NESTED);</div><div class='add'>+</div><div class='add'>+	ret = qca8k_set_page(priv, page);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto exit;</div><div class='add'>+</div><div class='add'>+	qca8k_mii_write32(bus, 0x10 | r2, r1, val);</div><div class='add'>+</div><div class='add'>+exit:</div><div class='add'>+	mutex_unlock(&amp;bus-&gt;mdio_lock);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_regmap_update_bits_mii(struct qca8k_priv *priv, uint32_t reg,</div><div class='add'>+			     uint32_t mask, uint32_t write_val)</div><div class='add'>+{</div><div class='add'>+	struct mii_bus *bus = priv-&gt;bus;</div><div class='add'>+	u16 r1, r2, page;</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	qca8k_split_addr(reg, &amp;r1, &amp;r2, &amp;page);</div><div class='add'>+</div><div class='add'>+	mutex_lock_nested(&amp;bus-&gt;mdio_lock, MDIO_MUTEX_NESTED);</div><div class='add'>+</div><div class='add'>+	ret = qca8k_set_page(priv, page);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto exit;</div><div class='add'>+</div><div class='add'>+	ret = qca8k_mii_read32(bus, 0x10 | r2, r1, &amp;val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto exit;</div><div class='add'>+</div><div class='add'>+	val &amp;= ~mask;</div><div class='add'>+	val |= write_val;</div><div class='add'>+	qca8k_mii_write32(bus, 0x10 | r2, r1, val);</div><div class='add'>+</div><div class='add'>+exit:</div><div class='add'>+	mutex_unlock(&amp;bus-&gt;mdio_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_bulk_read(void *ctx, const void *reg_buf, size_t reg_len,</div><div class='add'>+		void *val_buf, size_t val_len)</div><div class='add'>+{</div><div class='add'>+	int i, count = val_len / sizeof(u32), ret;</div><div class='add'>+	struct qca8k_priv *priv = ctx;</div><div class='add'>+	u32 reg = *(u16 *)reg_buf;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;mgmt_conduit &amp;&amp;</div><div class='add'>+	    !qca8k_read_eth(priv, reg, val_buf, val_len))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* loop count times and increment reg of 4 */</div><div class='add'>+	for (i = 0; i &lt; count; i++, reg += sizeof(u32)) {</div><div class='add'>+		ret = qca8k_read_mii(priv, reg, val_buf + i);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_bulk_gather_write(void *ctx, const void *reg_buf, size_t reg_len,</div><div class='add'>+			const void *val_buf, size_t val_len)</div><div class='add'>+{</div><div class='add'>+	int i, count = val_len / sizeof(u32), ret;</div><div class='add'>+	struct qca8k_priv *priv = ctx;</div><div class='add'>+	u32 reg = *(u16 *)reg_buf;</div><div class='add'>+	u32 *val = (u32 *)val_buf;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;mgmt_conduit &amp;&amp;</div><div class='add'>+	    !qca8k_write_eth(priv, reg, val, val_len))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* loop count times, increment reg of 4 and increment val ptr to</div><div class='add'>+	 * the next value</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; count; i++, reg += sizeof(u32), val++) {</div><div class='add'>+		ret = qca8k_write_mii(priv, reg, *val);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_bulk_write(void *ctx, const void *data, size_t bytes)</div><div class='add'>+{</div><div class='add'>+	return qca8k_bulk_gather_write(ctx, data, sizeof(u16), data + sizeof(u16),</div><div class='add'>+				       bytes - sizeof(u16));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_regmap_update_bits(void *ctx, uint32_t reg, uint32_t mask, uint32_t write_val)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_priv *priv = ctx;</div><div class='add'>+</div><div class='add'>+	if (!qca8k_regmap_update_bits_eth(priv, reg, mask, write_val))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return qca8k_regmap_update_bits_mii(priv, reg, mask, write_val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct regmap_config qca8k_regmap_config = {</div><div class='add'>+	.reg_bits = 16,</div><div class='add'>+	.val_bits = 32,</div><div class='add'>+	.reg_stride = 4,</div><div class='add'>+	.max_register = 0x16ac, /* end MIB - Port6 range */</div><div class='add'>+	.read = qca8k_bulk_read,</div><div class='add'>+	.write = qca8k_bulk_write,</div><div class='add'>+	.reg_update_bits = qca8k_regmap_update_bits,</div><div class='add'>+	.rd_table = &amp;qca8k_readable_table,</div><div class='add'>+	.disable_locking = true, /* Locking is handled by qca8k read/write */</div><div class='add'>+	.cache_type = REGCACHE_NONE, /* Explicitly disable CACHE */</div><div class='add'>+	.max_raw_read = 32, /* mgmt eth can read up to 8 registers at time */</div><div class='add'>+	/* ATU regs suffer from a bug where some data are not correctly</div><div class='add'>+	 * written. Disable bulk write to correctly write ATU entry.</div><div class='add'>+	 */</div><div class='add'>+	.use_single_write = true,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_phy_eth_busy_wait(struct qca8k_mgmt_eth_data *mgmt_eth_data,</div><div class='add'>+			struct sk_buff *read_skb, u32 *val)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *skb = skb_copy(read_skb, GFP_KERNEL);</div><div class='add'>+	bool ack;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!skb)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	reinit_completion(&amp;mgmt_eth_data-&gt;rw_done);</div><div class='add'>+</div><div class='add'>+	/* Increment seq_num and set it in the copy pkt */</div><div class='add'>+	mgmt_eth_data-&gt;seq++;</div><div class='add'>+	qca8k_mdio_header_fill_seq_num(skb, mgmt_eth_data-&gt;seq);</div><div class='add'>+	mgmt_eth_data-&gt;ack = false;</div><div class='add'>+</div><div class='add'>+	dev_queue_xmit(skb);</div><div class='add'>+</div><div class='add'>+	ret = wait_for_completion_timeout(&amp;mgmt_eth_data-&gt;rw_done,</div><div class='add'>+					  QCA8K_ETHERNET_TIMEOUT);</div><div class='add'>+</div><div class='add'>+	ack = mgmt_eth_data-&gt;ack;</div><div class='add'>+</div><div class='add'>+	if (ret &lt;= 0)</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+	if (!ack)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	*val = mgmt_eth_data-&gt;data[0];</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_phy_eth_command(struct qca8k_priv *priv, bool read, int phy,</div><div class='add'>+		      int regnum, u16 data)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *write_skb, *clear_skb, *read_skb;</div><div class='add'>+	struct qca8k_mgmt_eth_data *mgmt_eth_data;</div><div class='add'>+	u32 write_val, clear_val = 0, val;</div><div class='add'>+	struct net_device *mgmt_conduit;</div><div class='add'>+	int ret, ret1;</div><div class='add'>+	bool ack;</div><div class='add'>+</div><div class='add'>+	if (regnum &gt;= QCA8K_MDIO_MASTER_MAX_REG)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	mgmt_eth_data = &amp;priv-&gt;mgmt_eth_data;</div><div class='add'>+</div><div class='add'>+	write_val = QCA8K_MDIO_MASTER_BUSY | QCA8K_MDIO_MASTER_EN |</div><div class='add'>+		    QCA8K_MDIO_MASTER_PHY_ADDR(phy) |</div><div class='add'>+		    QCA8K_MDIO_MASTER_REG_ADDR(regnum);</div><div class='add'>+</div><div class='add'>+	if (read) {</div><div class='add'>+		write_val |= QCA8K_MDIO_MASTER_READ;</div><div class='add'>+	} else {</div><div class='add'>+		write_val |= QCA8K_MDIO_MASTER_WRITE;</div><div class='add'>+		write_val |= QCA8K_MDIO_MASTER_DATA(data);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Prealloc all the needed skb before the lock */</div><div class='add'>+	write_skb = qca8k_alloc_mdio_header(MDIO_WRITE, QCA8K_MDIO_MASTER_CTRL, &amp;write_val,</div><div class='add'>+					    QCA8K_ETHERNET_PHY_PRIORITY, sizeof(write_val));</div><div class='add'>+	if (!write_skb)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	clear_skb = qca8k_alloc_mdio_header(MDIO_WRITE, QCA8K_MDIO_MASTER_CTRL, &amp;clear_val,</div><div class='add'>+					    QCA8K_ETHERNET_PHY_PRIORITY, sizeof(clear_val));</div><div class='add'>+	if (!clear_skb) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err_clear_skb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	read_skb = qca8k_alloc_mdio_header(MDIO_READ, QCA8K_MDIO_MASTER_CTRL, &amp;clear_val,</div><div class='add'>+					   QCA8K_ETHERNET_PHY_PRIORITY, sizeof(clear_val));</div><div class='add'>+	if (!read_skb) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err_read_skb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* It seems that accessing the switch's internal PHYs via management</div><div class='add'>+	 * packets still uses the MDIO bus within the switch internally, and</div><div class='add'>+	 * these accesses can conflict with external MDIO accesses to other</div><div class='add'>+	 * devices on the MDIO bus.</div><div class='add'>+	 * We therefore need to lock the MDIO bus onto which the switch is</div><div class='add'>+	 * connected.</div><div class='add'>+	 */</div><div class='add'>+	mutex_lock_nested(&amp;priv-&gt;bus-&gt;mdio_lock, MDIO_MUTEX_NESTED);</div><div class='add'>+</div><div class='add'>+	/* Actually start the request:</div><div class='add'>+	 * 1. Send mdio master packet</div><div class='add'>+	 * 2. Busy Wait for mdio master command</div><div class='add'>+	 * 3. Get the data if we are reading</div><div class='add'>+	 * 4. Reset the mdio master (even with error)</div><div class='add'>+	 */</div><div class='add'>+	mutex_lock(&amp;mgmt_eth_data-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	/* Check if mgmt_conduit is operational */</div><div class='add'>+	mgmt_conduit = priv-&gt;mgmt_conduit;</div><div class='add'>+	if (!mgmt_conduit) {</div><div class='add'>+		mutex_unlock(&amp;mgmt_eth_data-&gt;mutex);</div><div class='add'>+		mutex_unlock(&amp;priv-&gt;bus-&gt;mdio_lock);</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto err_mgmt_conduit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	read_skb-&gt;dev = mgmt_conduit;</div><div class='add'>+	clear_skb-&gt;dev = mgmt_conduit;</div><div class='add'>+	write_skb-&gt;dev = mgmt_conduit;</div><div class='add'>+</div><div class='add'>+	reinit_completion(&amp;mgmt_eth_data-&gt;rw_done);</div><div class='add'>+</div><div class='add'>+	/* Increment seq_num and set it in the write pkt */</div><div class='add'>+	mgmt_eth_data-&gt;seq++;</div><div class='add'>+	qca8k_mdio_header_fill_seq_num(write_skb, mgmt_eth_data-&gt;seq);</div><div class='add'>+	mgmt_eth_data-&gt;ack = false;</div><div class='add'>+</div><div class='add'>+	dev_queue_xmit(write_skb);</div><div class='add'>+</div><div class='add'>+	ret = wait_for_completion_timeout(&amp;mgmt_eth_data-&gt;rw_done,</div><div class='add'>+					  QCA8K_ETHERNET_TIMEOUT);</div><div class='add'>+</div><div class='add'>+	ack = mgmt_eth_data-&gt;ack;</div><div class='add'>+</div><div class='add'>+	if (ret &lt;= 0) {</div><div class='add'>+		ret = -ETIMEDOUT;</div><div class='add'>+		kfree_skb(read_skb);</div><div class='add'>+		goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!ack) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		kfree_skb(read_skb);</div><div class='add'>+		goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = read_poll_timeout(qca8k_phy_eth_busy_wait, ret1,</div><div class='add'>+				!(val &amp; QCA8K_MDIO_MASTER_BUSY), 0,</div><div class='add'>+				QCA8K_BUSY_WAIT_TIMEOUT * USEC_PER_MSEC, false,</div><div class='add'>+				mgmt_eth_data, read_skb, &amp;val);</div><div class='add'>+</div><div class='add'>+	if (ret &lt; 0 &amp;&amp; ret1 &lt; 0) {</div><div class='add'>+		ret = ret1;</div><div class='add'>+		goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (read) {</div><div class='add'>+		reinit_completion(&amp;mgmt_eth_data-&gt;rw_done);</div><div class='add'>+</div><div class='add'>+		/* Increment seq_num and set it in the read pkt */</div><div class='add'>+		mgmt_eth_data-&gt;seq++;</div><div class='add'>+		qca8k_mdio_header_fill_seq_num(read_skb, mgmt_eth_data-&gt;seq);</div><div class='add'>+		mgmt_eth_data-&gt;ack = false;</div><div class='add'>+</div><div class='add'>+		dev_queue_xmit(read_skb);</div><div class='add'>+</div><div class='add'>+		ret = wait_for_completion_timeout(&amp;mgmt_eth_data-&gt;rw_done,</div><div class='add'>+						  QCA8K_ETHERNET_TIMEOUT);</div><div class='add'>+</div><div class='add'>+		ack = mgmt_eth_data-&gt;ack;</div><div class='add'>+</div><div class='add'>+		if (ret &lt;= 0) {</div><div class='add'>+			ret = -ETIMEDOUT;</div><div class='add'>+			goto exit;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!ack) {</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+			goto exit;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = mgmt_eth_data-&gt;data[0] &amp; QCA8K_MDIO_MASTER_DATA_MASK;</div><div class='add'>+	} else {</div><div class='add'>+		kfree_skb(read_skb);</div><div class='add'>+	}</div><div class='add'>+exit:</div><div class='add'>+	reinit_completion(&amp;mgmt_eth_data-&gt;rw_done);</div><div class='add'>+</div><div class='add'>+	/* Increment seq_num and set it in the clear pkt */</div><div class='add'>+	mgmt_eth_data-&gt;seq++;</div><div class='add'>+	qca8k_mdio_header_fill_seq_num(clear_skb, mgmt_eth_data-&gt;seq);</div><div class='add'>+	mgmt_eth_data-&gt;ack = false;</div><div class='add'>+</div><div class='add'>+	dev_queue_xmit(clear_skb);</div><div class='add'>+</div><div class='add'>+	wait_for_completion_timeout(&amp;mgmt_eth_data-&gt;rw_done,</div><div class='add'>+				    QCA8K_ETHERNET_TIMEOUT);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;mgmt_eth_data-&gt;mutex);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;bus-&gt;mdio_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+</div><div class='add'>+	/* Error handling before lock */</div><div class='add'>+err_mgmt_conduit:</div><div class='add'>+	kfree_skb(read_skb);</div><div class='add'>+err_read_skb:</div><div class='add'>+	kfree_skb(clear_skb);</div><div class='add'>+err_clear_skb:</div><div class='add'>+	kfree_skb(write_skb);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_mdio_busy_wait(struct mii_bus *bus, u32 reg, u32 mask)</div><div class='add'>+{</div><div class='add'>+	u16 r1, r2, page;</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret, ret1;</div><div class='add'>+</div><div class='add'>+	qca8k_split_addr(reg, &amp;r1, &amp;r2, &amp;page);</div><div class='add'>+</div><div class='add'>+	ret = read_poll_timeout(qca8k_mii_read_hi, ret1, !(val &amp; mask), 0,</div><div class='add'>+				QCA8K_BUSY_WAIT_TIMEOUT * USEC_PER_MSEC, false,</div><div class='add'>+				bus, 0x10 | r2, r1 + 1, &amp;val);</div><div class='add'>+</div><div class='add'>+	/* Check if qca8k_read has failed for a different reason</div><div class='add'>+	 * before returnting -ETIMEDOUT</div><div class='add'>+	 */</div><div class='add'>+	if (ret &lt; 0 &amp;&amp; ret1 &lt; 0)</div><div class='add'>+		return ret1;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_mdio_write(struct qca8k_priv *priv, int phy, int regnum, u16 data)</div><div class='add'>+{</div><div class='add'>+	struct mii_bus *bus = priv-&gt;bus;</div><div class='add'>+	u16 r1, r2, page;</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (regnum &gt;= QCA8K_MDIO_MASTER_MAX_REG)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	val = QCA8K_MDIO_MASTER_BUSY | QCA8K_MDIO_MASTER_EN |</div><div class='add'>+	      QCA8K_MDIO_MASTER_WRITE | QCA8K_MDIO_MASTER_PHY_ADDR(phy) |</div><div class='add'>+	      QCA8K_MDIO_MASTER_REG_ADDR(regnum) |</div><div class='add'>+	      QCA8K_MDIO_MASTER_DATA(data);</div><div class='add'>+</div><div class='add'>+	qca8k_split_addr(QCA8K_MDIO_MASTER_CTRL, &amp;r1, &amp;r2, &amp;page);</div><div class='add'>+</div><div class='add'>+	mutex_lock_nested(&amp;bus-&gt;mdio_lock, MDIO_MUTEX_NESTED);</div><div class='add'>+</div><div class='add'>+	ret = qca8k_set_page(priv, page);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto exit;</div><div class='add'>+</div><div class='add'>+	qca8k_mii_write32(bus, 0x10 | r2, r1, val);</div><div class='add'>+</div><div class='add'>+	ret = qca8k_mdio_busy_wait(bus, QCA8K_MDIO_MASTER_CTRL,</div><div class='add'>+				   QCA8K_MDIO_MASTER_BUSY);</div><div class='add'>+</div><div class='add'>+exit:</div><div class='add'>+	/* even if the busy_wait timeouts try to clear the MASTER_EN */</div><div class='add'>+	qca8k_mii_write_hi(bus, 0x10 | r2, r1 + 1, 0);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;bus-&gt;mdio_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_mdio_read(struct qca8k_priv *priv, int phy, int regnum)</div><div class='add'>+{</div><div class='add'>+	struct mii_bus *bus = priv-&gt;bus;</div><div class='add'>+	u16 r1, r2, page;</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (regnum &gt;= QCA8K_MDIO_MASTER_MAX_REG)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	val = QCA8K_MDIO_MASTER_BUSY | QCA8K_MDIO_MASTER_EN |</div><div class='add'>+	      QCA8K_MDIO_MASTER_READ | QCA8K_MDIO_MASTER_PHY_ADDR(phy) |</div><div class='add'>+	      QCA8K_MDIO_MASTER_REG_ADDR(regnum);</div><div class='add'>+</div><div class='add'>+	qca8k_split_addr(QCA8K_MDIO_MASTER_CTRL, &amp;r1, &amp;r2, &amp;page);</div><div class='add'>+</div><div class='add'>+	mutex_lock_nested(&amp;bus-&gt;mdio_lock, MDIO_MUTEX_NESTED);</div><div class='add'>+</div><div class='add'>+	ret = qca8k_set_page(priv, page);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto exit;</div><div class='add'>+</div><div class='add'>+	qca8k_mii_write_hi(bus, 0x10 | r2, r1 + 1, val);</div><div class='add'>+</div><div class='add'>+	ret = qca8k_mdio_busy_wait(bus, QCA8K_MDIO_MASTER_CTRL,</div><div class='add'>+				   QCA8K_MDIO_MASTER_BUSY);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto exit;</div><div class='add'>+</div><div class='add'>+	ret = qca8k_mii_read_lo(bus, 0x10 | r2, r1, &amp;val);</div><div class='add'>+</div><div class='add'>+exit:</div><div class='add'>+	/* even if the busy_wait timeouts try to clear the MASTER_EN */</div><div class='add'>+	qca8k_mii_write_hi(bus, 0x10 | r2, r1 + 1, 0);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;bus-&gt;mdio_lock);</div><div class='add'>+</div><div class='add'>+	if (ret &gt;= 0)</div><div class='add'>+		ret = val &amp; QCA8K_MDIO_MASTER_DATA_MASK;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_internal_mdio_write(struct mii_bus *slave_bus, int phy, int regnum, u16 data)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_priv *priv = slave_bus-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Use mdio Ethernet when available, fallback to legacy one on error */</div><div class='add'>+	ret = qca8k_phy_eth_command(priv, false, phy, regnum, data);</div><div class='add'>+	if (!ret)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return qca8k_mdio_write(priv, phy, regnum, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_internal_mdio_read(struct mii_bus *slave_bus, int phy, int regnum)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_priv *priv = slave_bus-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Use mdio Ethernet when available, fallback to legacy one on error */</div><div class='add'>+	ret = qca8k_phy_eth_command(priv, true, phy, regnum, 0);</div><div class='add'>+	if (ret &gt;= 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = qca8k_mdio_read(priv, phy, regnum);</div><div class='add'>+</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return 0xffff;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_legacy_mdio_write(struct mii_bus *slave_bus, int port, int regnum, u16 data)</div><div class='add'>+{</div><div class='add'>+	port = qca8k_port_to_phy(port) % PHY_MAX_ADDR;</div><div class='add'>+</div><div class='add'>+	return qca8k_internal_mdio_write(slave_bus, port, regnum, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_legacy_mdio_read(struct mii_bus *slave_bus, int port, int regnum)</div><div class='add'>+{</div><div class='add'>+	port = qca8k_port_to_phy(port) % PHY_MAX_ADDR;</div><div class='add'>+</div><div class='add'>+	return qca8k_internal_mdio_read(slave_bus, port, regnum);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_mdio_register(struct qca8k_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds = priv-&gt;ds;</div><div class='add'>+	struct device *dev = ds-&gt;dev;</div><div class='add'>+	struct device_node *mdio;</div><div class='add'>+	struct mii_bus *bus;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	mdio = of_get_child_by_name(dev-&gt;of_node, "mdio");</div><div class='add'>+	if (mdio &amp;&amp; !of_device_is_available(mdio))</div><div class='add'>+		goto out_put_node;</div><div class='add'>+</div><div class='add'>+	bus = devm_mdiobus_alloc(dev);</div><div class='add'>+	if (!bus) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto out_put_node;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;internal_mdio_bus = bus;</div><div class='add'>+	bus-&gt;priv = (void *)priv;</div><div class='add'>+	snprintf(bus-&gt;id, MII_BUS_ID_SIZE, "qca8k-%d.%d",</div><div class='add'>+		 ds-&gt;dst-&gt;index, ds-&gt;index);</div><div class='add'>+	bus-&gt;parent = dev;</div><div class='add'>+</div><div class='add'>+	if (mdio) {</div><div class='add'>+		/* Check if the device tree declares the port:phy mapping */</div><div class='add'>+		bus-&gt;name = "qca8k user mii";</div><div class='add'>+		bus-&gt;read = qca8k_internal_mdio_read;</div><div class='add'>+		bus-&gt;write = qca8k_internal_mdio_write;</div><div class='add'>+	} else {</div><div class='add'>+		/* If a mapping can't be found, the legacy mapping is used,</div><div class='add'>+		 * using qca8k_port_to_phy()</div><div class='add'>+		 */</div><div class='add'>+		ds-&gt;user_mii_bus = bus;</div><div class='add'>+		bus-&gt;phy_mask = ~ds-&gt;phys_mii_mask;</div><div class='add'>+		bus-&gt;name = "qca8k-legacy user mii";</div><div class='add'>+		bus-&gt;read = qca8k_legacy_mdio_read;</div><div class='add'>+		bus-&gt;write = qca8k_legacy_mdio_write;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = devm_of_mdiobus_register(dev, bus, mdio);</div><div class='add'>+</div><div class='add'>+out_put_node:</div><div class='add'>+	of_node_put(mdio);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_setup_mdio_bus(struct qca8k_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 internal_mdio_mask = 0, external_mdio_mask = 0, reg;</div><div class='add'>+	struct device_node *ports, *port;</div><div class='add'>+	phy_interface_t mode;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ports = of_get_child_by_name(priv-&gt;dev-&gt;of_node, "ports");</div><div class='add'>+	if (!ports)</div><div class='add'>+		ports = of_get_child_by_name(priv-&gt;dev-&gt;of_node, "ethernet-ports");</div><div class='add'>+</div><div class='add'>+	if (!ports)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	for_each_available_child_of_node(ports, port) {</div><div class='add'>+		ret = of_property_read_u32(port, "reg", &amp;reg);</div><div class='add'>+		if (ret) {</div><div class='add'>+			of_node_put(port);</div><div class='add'>+			of_node_put(ports);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!dsa_is_user_port(priv-&gt;ds, reg))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		of_get_phy_mode(port, &amp;mode);</div><div class='add'>+</div><div class='add'>+		if (of_property_present(port, "phy-handle") &amp;&amp;</div><div class='add'>+		    mode != PHY_INTERFACE_MODE_INTERNAL)</div><div class='add'>+			external_mdio_mask |= BIT(reg);</div><div class='add'>+		else</div><div class='add'>+			internal_mdio_mask |= BIT(reg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	of_node_put(ports);</div><div class='add'>+	if (!external_mdio_mask &amp;&amp; !internal_mdio_mask) {</div><div class='add'>+		dev_err(priv-&gt;dev, "no PHYs are defined.\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* The QCA8K_MDIO_MASTER_EN Bit, which grants access to PHYs through</div><div class='add'>+	 * the MDIO_MASTER register also _disconnects_ the external MDC</div><div class='add'>+	 * passthrough to the internal PHYs. It's not possible to use both</div><div class='add'>+	 * configurations at the same time!</div><div class='add'>+	 *</div><div class='add'>+	 * Because this came up during the review process:</div><div class='add'>+	 * If the external mdio-bus driver is capable magically disabling</div><div class='add'>+	 * the QCA8K_MDIO_MASTER_EN and mutex/spin-locking out the qca8k's</div><div class='add'>+	 * accessors for the time being, it would be possible to pull this</div><div class='add'>+	 * off.</div><div class='add'>+	 */</div><div class='add'>+	if (!!external_mdio_mask &amp;&amp; !!internal_mdio_mask) {</div><div class='add'>+		dev_err(priv-&gt;dev, "either internal or external mdio bus configuration is supported.\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (external_mdio_mask) {</div><div class='add'>+		/* Make sure to disable the internal mdio bus in cases</div><div class='add'>+		 * a dt-overlay and driver reload changed the configuration</div><div class='add'>+		 */</div><div class='add'>+</div><div class='add'>+		return regmap_clear_bits(priv-&gt;regmap, QCA8K_MDIO_MASTER_CTRL,</div><div class='add'>+					 QCA8K_MDIO_MASTER_EN);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return qca8k_mdio_register(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_setup_mac_pwr_sel(struct qca8k_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 mask = 0;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	/* SoC specific settings for ipq8064.</div><div class='add'>+	 * If more device require this consider adding</div><div class='add'>+	 * a dedicated binding.</div><div class='add'>+	 */</div><div class='add'>+	if (of_machine_is_compatible("qcom,ipq8064"))</div><div class='add'>+		mask |= QCA8K_MAC_PWR_RGMII0_1_8V;</div><div class='add'>+</div><div class='add'>+	/* SoC specific settings for ipq8065 */</div><div class='add'>+	if (of_machine_is_compatible("qcom,ipq8065"))</div><div class='add'>+		mask |= QCA8K_MAC_PWR_RGMII1_1_8V;</div><div class='add'>+</div><div class='add'>+	if (mask) {</div><div class='add'>+		ret = qca8k_rmw(priv, QCA8K_REG_MAC_PWR_SEL,</div><div class='add'>+				QCA8K_MAC_PWR_RGMII0_1_8V |</div><div class='add'>+				QCA8K_MAC_PWR_RGMII1_1_8V,</div><div class='add'>+				mask);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int qca8k_find_cpu_port(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	/* Find the connected cpu port. Valid port are 0 or 6 */</div><div class='add'>+	if (dsa_is_cpu_port(ds, 0))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	dev_dbg(priv-&gt;dev, "port 0 is not the CPU port. Checking port 6");</div><div class='add'>+</div><div class='add'>+	if (dsa_is_cpu_port(ds, 6))</div><div class='add'>+		return 6;</div><div class='add'>+</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_setup_of_pws_reg(struct qca8k_priv *priv)</div><div class='add'>+{</div><div class='add'>+	const struct qca8k_match_data *data = priv-&gt;info;</div><div class='add'>+	struct device_node *node = priv-&gt;dev-&gt;of_node;</div><div class='add'>+	u32 val = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* QCA8327 require to set to the correct mode.</div><div class='add'>+	 * His bigger brother QCA8328 have the 172 pin layout.</div><div class='add'>+	 * Should be applied by default but we set this just to make sure.</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;switch_id == QCA8K_ID_QCA8327) {</div><div class='add'>+		/* Set the correct package of 148 pin for QCA8327 */</div><div class='add'>+		if (data-&gt;reduced_package)</div><div class='add'>+			val |= QCA8327_PWS_PACKAGE148_EN;</div><div class='add'>+</div><div class='add'>+		ret = qca8k_rmw(priv, QCA8K_REG_PWS, QCA8327_PWS_PACKAGE148_EN,</div><div class='add'>+				val);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (of_property_read_bool(node, "qca,ignore-power-on-sel"))</div><div class='add'>+		val |= QCA8K_PWS_POWER_ON_SEL;</div><div class='add'>+</div><div class='add'>+	if (of_property_read_bool(node, "qca,led-open-drain")) {</div><div class='add'>+		if (!(val &amp; QCA8K_PWS_POWER_ON_SEL)) {</div><div class='add'>+			dev_err(priv-&gt;dev, "qca,led-open-drain require qca,ignore-power-on-sel to be set.");</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		val |= QCA8K_PWS_LED_OPEN_EN_CSR;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return qca8k_rmw(priv, QCA8K_REG_PWS,</div><div class='add'>+			QCA8K_PWS_LED_OPEN_EN_CSR | QCA8K_PWS_POWER_ON_SEL,</div><div class='add'>+			val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_parse_port_config(struct qca8k_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int port, cpu_port_index = -1, ret;</div><div class='add'>+	struct device_node *port_dn;</div><div class='add'>+	phy_interface_t mode;</div><div class='add'>+	struct dsa_port *dp;</div><div class='add'>+	u32 delay;</div><div class='add'>+</div><div class='add'>+	/* We have 2 CPU port. Check them */</div><div class='add'>+	for (port = 0; port &lt; QCA8K_NUM_PORTS; port++) {</div><div class='add'>+		/* Skip every other port */</div><div class='add'>+		if (port != 0 &amp;&amp; port != 6)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		dp = dsa_to_port(priv-&gt;ds, port);</div><div class='add'>+		port_dn = dp-&gt;dn;</div><div class='add'>+		cpu_port_index++;</div><div class='add'>+</div><div class='add'>+		if (!of_device_is_available(port_dn))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		ret = of_get_phy_mode(port_dn, &amp;mode);</div><div class='add'>+		if (ret)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		switch (mode) {</div><div class='add'>+		case PHY_INTERFACE_MODE_RGMII:</div><div class='add'>+		case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='add'>+		case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='add'>+		case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='add'>+		case PHY_INTERFACE_MODE_SGMII:</div><div class='add'>+			delay = 0;</div><div class='add'>+</div><div class='add'>+			if (!of_property_read_u32(port_dn, "tx-internal-delay-ps", &amp;delay))</div><div class='add'>+				/* Switch regs accept value in ns, convert ps to ns */</div><div class='add'>+				delay = delay / 1000;</div><div class='add'>+			else if (mode == PHY_INTERFACE_MODE_RGMII_ID ||</div><div class='add'>+				 mode == PHY_INTERFACE_MODE_RGMII_TXID)</div><div class='add'>+				delay = 1;</div><div class='add'>+</div><div class='add'>+			if (!FIELD_FIT(QCA8K_PORT_PAD_RGMII_TX_DELAY_MASK, delay)) {</div><div class='add'>+				dev_err(priv-&gt;dev, "rgmii tx delay is limited to a max value of 3ns, setting to the max value");</div><div class='add'>+				delay = 3;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			priv-&gt;ports_config.rgmii_tx_delay[cpu_port_index] = delay;</div><div class='add'>+</div><div class='add'>+			delay = 0;</div><div class='add'>+</div><div class='add'>+			if (!of_property_read_u32(port_dn, "rx-internal-delay-ps", &amp;delay))</div><div class='add'>+				/* Switch regs accept value in ns, convert ps to ns */</div><div class='add'>+				delay = delay / 1000;</div><div class='add'>+			else if (mode == PHY_INTERFACE_MODE_RGMII_ID ||</div><div class='add'>+				 mode == PHY_INTERFACE_MODE_RGMII_RXID)</div><div class='add'>+				delay = 2;</div><div class='add'>+</div><div class='add'>+			if (!FIELD_FIT(QCA8K_PORT_PAD_RGMII_RX_DELAY_MASK, delay)) {</div><div class='add'>+				dev_err(priv-&gt;dev, "rgmii rx delay is limited to a max value of 3ns, setting to the max value");</div><div class='add'>+				delay = 3;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			priv-&gt;ports_config.rgmii_rx_delay[cpu_port_index] = delay;</div><div class='add'>+</div><div class='add'>+			/* Skip sgmii parsing for rgmii* mode */</div><div class='add'>+			if (mode == PHY_INTERFACE_MODE_RGMII ||</div><div class='add'>+			    mode == PHY_INTERFACE_MODE_RGMII_ID ||</div><div class='add'>+			    mode == PHY_INTERFACE_MODE_RGMII_TXID ||</div><div class='add'>+			    mode == PHY_INTERFACE_MODE_RGMII_RXID)</div><div class='add'>+				break;</div><div class='add'>+</div><div class='add'>+			if (of_property_read_bool(port_dn, "qca,sgmii-txclk-falling-edge"))</div><div class='add'>+				priv-&gt;ports_config.sgmii_tx_clk_falling_edge = true;</div><div class='add'>+</div><div class='add'>+			if (of_property_read_bool(port_dn, "qca,sgmii-rxclk-falling-edge"))</div><div class='add'>+				priv-&gt;ports_config.sgmii_rx_clk_falling_edge = true;</div><div class='add'>+</div><div class='add'>+			if (of_property_read_bool(port_dn, "qca,sgmii-enable-pll")) {</div><div class='add'>+				priv-&gt;ports_config.sgmii_enable_pll = true;</div><div class='add'>+</div><div class='add'>+				if (priv-&gt;switch_id == QCA8K_ID_QCA8327) {</div><div class='add'>+					dev_err(priv-&gt;dev, "SGMII PLL should NOT be enabled for qca8327. Aborting enabling");</div><div class='add'>+					priv-&gt;ports_config.sgmii_enable_pll = false;</div><div class='add'>+				}</div><div class='add'>+</div><div class='add'>+				if (priv-&gt;switch_revision &lt; 2)</div><div class='add'>+					dev_warn(priv-&gt;dev, "SGMII PLL should NOT be enabled for qca8337 with revision 2 or more.");</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+qca8k_mac_config_setup_internal_delay(struct qca8k_priv *priv, int cpu_port_index,</div><div class='add'>+				      u32 reg)</div><div class='add'>+{</div><div class='add'>+	u32 delay, val = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Delay can be declared in 3 different way.</div><div class='add'>+	 * Mode to rgmii and internal-delay standard binding defined</div><div class='add'>+	 * rgmii-id or rgmii-tx/rx phy mode set.</div><div class='add'>+	 * The parse logic set a delay different than 0 only when one</div><div class='add'>+	 * of the 3 different way is used. In all other case delay is</div><div class='add'>+	 * not enabled. With ID or TX/RXID delay is enabled and set</div><div class='add'>+	 * to the default and recommended value.</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;ports_config.rgmii_tx_delay[cpu_port_index]) {</div><div class='add'>+		delay = priv-&gt;ports_config.rgmii_tx_delay[cpu_port_index];</div><div class='add'>+</div><div class='add'>+		val |= QCA8K_PORT_PAD_RGMII_TX_DELAY(delay) |</div><div class='add'>+			QCA8K_PORT_PAD_RGMII_TX_DELAY_EN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;ports_config.rgmii_rx_delay[cpu_port_index]) {</div><div class='add'>+		delay = priv-&gt;ports_config.rgmii_rx_delay[cpu_port_index];</div><div class='add'>+</div><div class='add'>+		val |= QCA8K_PORT_PAD_RGMII_RX_DELAY(delay) |</div><div class='add'>+			QCA8K_PORT_PAD_RGMII_RX_DELAY_EN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set RGMII delay based on the selected values */</div><div class='add'>+	ret = qca8k_rmw(priv, reg,</div><div class='add'>+			QCA8K_PORT_PAD_RGMII_TX_DELAY_MASK |</div><div class='add'>+			QCA8K_PORT_PAD_RGMII_RX_DELAY_MASK |</div><div class='add'>+			QCA8K_PORT_PAD_RGMII_TX_DELAY_EN |</div><div class='add'>+			QCA8K_PORT_PAD_RGMII_RX_DELAY_EN,</div><div class='add'>+			val);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(priv-&gt;dev, "Failed to set internal delay for CPU port%d",</div><div class='add'>+			cpu_port_index == QCA8K_CPU_PORT0 ? 0 : 6);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct phylink_pcs *</div><div class='add'>+qca8k_phylink_mac_select_pcs(struct phylink_config *config,</div><div class='add'>+			     phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct qca8k_priv *priv = dp-&gt;ds-&gt;priv;</div><div class='add'>+	struct phylink_pcs *pcs = NULL;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+</div><div class='add'>+	switch (interface) {</div><div class='add'>+	case PHY_INTERFACE_MODE_SGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_1000BASEX:</div><div class='add'>+		switch (port) {</div><div class='add'>+		case 0:</div><div class='add'>+			pcs = &amp;priv-&gt;pcs_port_0.pcs;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case 6:</div><div class='add'>+			pcs = &amp;priv-&gt;pcs_port_6.pcs;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return pcs;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+qca8k_phylink_mac_config(struct phylink_config *config, unsigned int mode,</div><div class='add'>+			 const struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct dsa_switch *ds = dp-&gt;ds;</div><div class='add'>+	struct qca8k_priv *priv;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+	int cpu_port_index;</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	switch (port) {</div><div class='add'>+	case 0: /* 1st CPU port */</div><div class='add'>+		if (state-&gt;interface != PHY_INTERFACE_MODE_RGMII &amp;&amp;</div><div class='add'>+		    state-&gt;interface != PHY_INTERFACE_MODE_RGMII_ID &amp;&amp;</div><div class='add'>+		    state-&gt;interface != PHY_INTERFACE_MODE_RGMII_TXID &amp;&amp;</div><div class='add'>+		    state-&gt;interface != PHY_INTERFACE_MODE_RGMII_RXID &amp;&amp;</div><div class='add'>+		    state-&gt;interface != PHY_INTERFACE_MODE_SGMII)</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		reg = QCA8K_REG_PORT0_PAD_CTRL;</div><div class='add'>+		cpu_port_index = QCA8K_CPU_PORT0;</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+	case 2:</div><div class='add'>+	case 3:</div><div class='add'>+	case 4:</div><div class='add'>+	case 5:</div><div class='add'>+		/* Internal PHY, nothing to do */</div><div class='add'>+		return;</div><div class='add'>+	case 6: /* 2nd CPU port / external PHY */</div><div class='add'>+		if (state-&gt;interface != PHY_INTERFACE_MODE_RGMII &amp;&amp;</div><div class='add'>+		    state-&gt;interface != PHY_INTERFACE_MODE_RGMII_ID &amp;&amp;</div><div class='add'>+		    state-&gt;interface != PHY_INTERFACE_MODE_RGMII_TXID &amp;&amp;</div><div class='add'>+		    state-&gt;interface != PHY_INTERFACE_MODE_RGMII_RXID &amp;&amp;</div><div class='add'>+		    state-&gt;interface != PHY_INTERFACE_MODE_SGMII &amp;&amp;</div><div class='add'>+		    state-&gt;interface != PHY_INTERFACE_MODE_1000BASEX)</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		reg = QCA8K_REG_PORT6_PAD_CTRL;</div><div class='add'>+		cpu_port_index = QCA8K_CPU_PORT6;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(ds-&gt;dev, "%s: unsupported port: %i\n", __func__, port);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (port != 6 &amp;&amp; phylink_autoneg_inband(mode)) {</div><div class='add'>+		dev_err(ds-&gt;dev, "%s: in-band negotiation unsupported\n",</div><div class='add'>+			__func__);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (state-&gt;interface) {</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='add'>+		qca8k_write(priv, reg, QCA8K_PORT_PAD_RGMII_EN);</div><div class='add'>+</div><div class='add'>+		/* Configure rgmii delay */</div><div class='add'>+		qca8k_mac_config_setup_internal_delay(priv, cpu_port_index, reg);</div><div class='add'>+</div><div class='add'>+		/* QCA8337 requires to set rgmii rx delay for all ports.</div><div class='add'>+		 * This is enabled through PORT5_PAD_CTRL for all ports,</div><div class='add'>+		 * rather than individual port registers.</div><div class='add'>+		 */</div><div class='add'>+		if (priv-&gt;switch_id == QCA8K_ID_QCA8337)</div><div class='add'>+			qca8k_write(priv, QCA8K_REG_PORT5_PAD_CTRL,</div><div class='add'>+				    QCA8K_PORT_PAD_RGMII_RX_DELAY_EN);</div><div class='add'>+		break;</div><div class='add'>+	case PHY_INTERFACE_MODE_SGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_1000BASEX:</div><div class='add'>+		/* Enable SGMII on the port */</div><div class='add'>+		qca8k_write(priv, reg, QCA8K_PORT_PAD_SGMII_EN);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(ds-&gt;dev, "xMII mode %s not supported for port %d\n",</div><div class='add'>+			phy_modes(state-&gt;interface), port);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void qca8k_phylink_get_caps(struct dsa_switch *ds, int port,</div><div class='add'>+				   struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	switch (port) {</div><div class='add'>+	case 0: /* 1st CPU port */</div><div class='add'>+		phy_interface_set_rgmii(config-&gt;supported_interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_SGMII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case 1:</div><div class='add'>+	case 2:</div><div class='add'>+	case 3:</div><div class='add'>+	case 4:</div><div class='add'>+	case 5:</div><div class='add'>+		/* Internal PHY */</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_GMII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_INTERNAL,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case 6: /* 2nd CPU port / external PHY */</div><div class='add'>+		phy_interface_set_rgmii(config-&gt;supported_interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_SGMII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_1000BASEX,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	config-&gt;mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |</div><div class='add'>+		MAC_10 | MAC_100 | MAC_1000FD;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+qca8k_phylink_mac_link_down(struct phylink_config *config, unsigned int mode,</div><div class='add'>+			    phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct qca8k_priv *priv = dp-&gt;ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	qca8k_port_set_status(priv, dp-&gt;index, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+qca8k_phylink_mac_link_up(struct phylink_config *config,</div><div class='add'>+			  struct phy_device *phydev, unsigned int mode,</div><div class='add'>+			  phy_interface_t interface, int speed, int duplex,</div><div class='add'>+			  bool tx_pause, bool rx_pause)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct qca8k_priv *priv = dp-&gt;ds-&gt;priv;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	if (phylink_autoneg_inband(mode)) {</div><div class='add'>+		reg = QCA8K_PORT_STATUS_LINK_AUTO;</div><div class='add'>+	} else {</div><div class='add'>+		switch (speed) {</div><div class='add'>+		case SPEED_10:</div><div class='add'>+			reg = QCA8K_PORT_STATUS_SPEED_10;</div><div class='add'>+			break;</div><div class='add'>+		case SPEED_100:</div><div class='add'>+			reg = QCA8K_PORT_STATUS_SPEED_100;</div><div class='add'>+			break;</div><div class='add'>+		case SPEED_1000:</div><div class='add'>+			reg = QCA8K_PORT_STATUS_SPEED_1000;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			reg = QCA8K_PORT_STATUS_LINK_AUTO;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (duplex == DUPLEX_FULL)</div><div class='add'>+			reg |= QCA8K_PORT_STATUS_DUPLEX;</div><div class='add'>+</div><div class='add'>+		if (rx_pause || dsa_port_is_cpu(dp))</div><div class='add'>+			reg |= QCA8K_PORT_STATUS_RXFLOW;</div><div class='add'>+</div><div class='add'>+		if (tx_pause || dsa_port_is_cpu(dp))</div><div class='add'>+			reg |= QCA8K_PORT_STATUS_TXFLOW;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	reg |= QCA8K_PORT_STATUS_TXMAC | QCA8K_PORT_STATUS_RXMAC;</div><div class='add'>+</div><div class='add'>+	qca8k_write(priv, QCA8K_REG_PORT_STATUS(port), reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct qca8k_pcs *pcs_to_qca8k_pcs(struct phylink_pcs *pcs)</div><div class='add'>+{</div><div class='add'>+	return container_of(pcs, struct qca8k_pcs, pcs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void qca8k_pcs_get_state(struct phylink_pcs *pcs, unsigned int neg_mode,</div><div class='add'>+				struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_priv *priv = pcs_to_qca8k_pcs(pcs)-&gt;priv;</div><div class='add'>+	int port = pcs_to_qca8k_pcs(pcs)-&gt;port;</div><div class='add'>+	u32 reg;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = qca8k_read(priv, QCA8K_REG_PORT_STATUS(port), &amp;reg);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		state-&gt;link = false;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	state-&gt;link = !!(reg &amp; QCA8K_PORT_STATUS_LINK_UP);</div><div class='add'>+	state-&gt;an_complete = state-&gt;link;</div><div class='add'>+	state-&gt;duplex = (reg &amp; QCA8K_PORT_STATUS_DUPLEX) ? DUPLEX_FULL :</div><div class='add'>+							   DUPLEX_HALF;</div><div class='add'>+</div><div class='add'>+	switch (reg &amp; QCA8K_PORT_STATUS_SPEED) {</div><div class='add'>+	case QCA8K_PORT_STATUS_SPEED_10:</div><div class='add'>+		state-&gt;speed = SPEED_10;</div><div class='add'>+		break;</div><div class='add'>+	case QCA8K_PORT_STATUS_SPEED_100:</div><div class='add'>+		state-&gt;speed = SPEED_100;</div><div class='add'>+		break;</div><div class='add'>+	case QCA8K_PORT_STATUS_SPEED_1000:</div><div class='add'>+		state-&gt;speed = SPEED_1000;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		state-&gt;speed = SPEED_UNKNOWN;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (reg &amp; QCA8K_PORT_STATUS_RXFLOW)</div><div class='add'>+		state-&gt;pause |= MLO_PAUSE_RX;</div><div class='add'>+	if (reg &amp; QCA8K_PORT_STATUS_TXFLOW)</div><div class='add'>+		state-&gt;pause |= MLO_PAUSE_TX;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int qca8k_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode,</div><div class='add'>+			    phy_interface_t interface,</div><div class='add'>+			    const unsigned long *advertising,</div><div class='add'>+			    bool permit_pause_to_mac)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_priv *priv = pcs_to_qca8k_pcs(pcs)-&gt;priv;</div><div class='add'>+	int cpu_port_index, ret, port;</div><div class='add'>+	u32 reg, val;</div><div class='add'>+</div><div class='add'>+	port = pcs_to_qca8k_pcs(pcs)-&gt;port;</div><div class='add'>+	switch (port) {</div><div class='add'>+	case 0:</div><div class='add'>+		reg = QCA8K_REG_PORT0_PAD_CTRL;</div><div class='add'>+		cpu_port_index = QCA8K_CPU_PORT0;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case 6:</div><div class='add'>+		reg = QCA8K_REG_PORT6_PAD_CTRL;</div><div class='add'>+		cpu_port_index = QCA8K_CPU_PORT6;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		WARN_ON(1);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Enable/disable SerDes auto-negotiation as necessary */</div><div class='add'>+	val = neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED ?</div><div class='add'>+		0 : QCA8K_PWS_SERDES_AEN_DIS;</div><div class='add'>+</div><div class='add'>+	ret = qca8k_rmw(priv, QCA8K_REG_PWS, QCA8K_PWS_SERDES_AEN_DIS, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Configure the SGMII parameters */</div><div class='add'>+	ret = qca8k_read(priv, QCA8K_REG_SGMII_CTRL, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	val |= QCA8K_SGMII_EN_SD;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;ports_config.sgmii_enable_pll)</div><div class='add'>+		val |= QCA8K_SGMII_EN_PLL | QCA8K_SGMII_EN_RX |</div><div class='add'>+		       QCA8K_SGMII_EN_TX;</div><div class='add'>+</div><div class='add'>+	if (dsa_is_cpu_port(priv-&gt;ds, port)) {</div><div class='add'>+		/* CPU port, we're talking to the CPU MAC, be a PHY */</div><div class='add'>+		val &amp;= ~QCA8K_SGMII_MODE_CTRL_MASK;</div><div class='add'>+		val |= QCA8K_SGMII_MODE_CTRL_PHY;</div><div class='add'>+	} else if (interface == PHY_INTERFACE_MODE_SGMII) {</div><div class='add'>+		val &amp;= ~QCA8K_SGMII_MODE_CTRL_MASK;</div><div class='add'>+		val |= QCA8K_SGMII_MODE_CTRL_MAC;</div><div class='add'>+	} else if (interface == PHY_INTERFACE_MODE_1000BASEX) {</div><div class='add'>+		val &amp;= ~QCA8K_SGMII_MODE_CTRL_MASK;</div><div class='add'>+		val |= QCA8K_SGMII_MODE_CTRL_BASEX;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	qca8k_write(priv, QCA8K_REG_SGMII_CTRL, val);</div><div class='add'>+</div><div class='add'>+	/* From original code is reported port instability as SGMII also</div><div class='add'>+	 * require delay set. Apply advised values here or take them from DT.</div><div class='add'>+	 */</div><div class='add'>+	if (interface == PHY_INTERFACE_MODE_SGMII)</div><div class='add'>+		qca8k_mac_config_setup_internal_delay(priv, cpu_port_index, reg);</div><div class='add'>+	/* For qca8327/qca8328/qca8334/qca8338 sgmii is unique and</div><div class='add'>+	 * falling edge is set writing in the PORT0 PAD reg</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;switch_id == QCA8K_ID_QCA8327 ||</div><div class='add'>+	    priv-&gt;switch_id == QCA8K_ID_QCA8337)</div><div class='add'>+		reg = QCA8K_REG_PORT0_PAD_CTRL;</div><div class='add'>+</div><div class='add'>+	val = 0;</div><div class='add'>+</div><div class='add'>+	/* SGMII Clock phase configuration */</div><div class='add'>+	if (priv-&gt;ports_config.sgmii_rx_clk_falling_edge)</div><div class='add'>+		val |= QCA8K_PORT0_PAD_SGMII_RXCLK_FALLING_EDGE;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;ports_config.sgmii_tx_clk_falling_edge)</div><div class='add'>+		val |= QCA8K_PORT0_PAD_SGMII_TXCLK_FALLING_EDGE;</div><div class='add'>+</div><div class='add'>+	if (val)</div><div class='add'>+		ret = qca8k_rmw(priv, reg,</div><div class='add'>+				QCA8K_PORT0_PAD_SGMII_RXCLK_FALLING_EDGE |</div><div class='add'>+				QCA8K_PORT0_PAD_SGMII_TXCLK_FALLING_EDGE,</div><div class='add'>+				val);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void qca8k_pcs_an_restart(struct phylink_pcs *pcs)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct phylink_pcs_ops qca8k_pcs_ops = {</div><div class='add'>+	.pcs_get_state = qca8k_pcs_get_state,</div><div class='add'>+	.pcs_config = qca8k_pcs_config,</div><div class='add'>+	.pcs_an_restart = qca8k_pcs_an_restart,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void qca8k_setup_pcs(struct qca8k_priv *priv, struct qca8k_pcs *qpcs,</div><div class='add'>+			    int port)</div><div class='add'>+{</div><div class='add'>+	qpcs-&gt;pcs.ops = &amp;qca8k_pcs_ops;</div><div class='add'>+</div><div class='add'>+	/* We don't have interrupts for link changes, so we need to poll */</div><div class='add'>+	qpcs-&gt;pcs.poll = true;</div><div class='add'>+	qpcs-&gt;priv = priv;</div><div class='add'>+	qpcs-&gt;port = port;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void qca8k_mib_autocast_handler(struct dsa_switch *ds, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_mib_eth_data *mib_eth_data;</div><div class='add'>+	struct qca8k_priv *priv = ds-&gt;priv;</div><div class='add'>+	const struct qca8k_mib_desc *mib;</div><div class='add'>+	struct mib_ethhdr *mib_ethhdr;</div><div class='add'>+	__le32 *data2;</div><div class='add'>+	u8 port;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	mib_ethhdr = (struct mib_ethhdr *)skb_mac_header(skb);</div><div class='add'>+	mib_eth_data = &amp;priv-&gt;mib_eth_data;</div><div class='add'>+</div><div class='add'>+	/* The switch autocast every port. Ignore other packet and</div><div class='add'>+	 * parse only the requested one.</div><div class='add'>+	 */</div><div class='add'>+	port = FIELD_GET(QCA_HDR_RECV_SOURCE_PORT, ntohs(mib_ethhdr-&gt;hdr));</div><div class='add'>+	if (port != mib_eth_data-&gt;req_port)</div><div class='add'>+		goto exit;</div><div class='add'>+</div><div class='add'>+	data2 = (__le32 *)skb-&gt;data;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;info-&gt;mib_count; i++) {</div><div class='add'>+		mib = &amp;ar8327_mib[i];</div><div class='add'>+</div><div class='add'>+		/* First 3 mib are present in the skb head */</div><div class='add'>+		if (i &lt; 3) {</div><div class='add'>+			mib_eth_data-&gt;data[i] = get_unaligned_le32(mib_ethhdr-&gt;data + i);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Some mib are 64 bit wide */</div><div class='add'>+		if (mib-&gt;size == 2)</div><div class='add'>+			mib_eth_data-&gt;data[i] = get_unaligned_le64((__le64 *)data2);</div><div class='add'>+		else</div><div class='add'>+			mib_eth_data-&gt;data[i] = get_unaligned_le32(data2);</div><div class='add'>+</div><div class='add'>+		data2 += mib-&gt;size;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+exit:</div><div class='add'>+	/* Complete on receiving all the mib packet */</div><div class='add'>+	if (refcount_dec_and_test(&amp;mib_eth_data-&gt;port_parsed))</div><div class='add'>+		complete(&amp;mib_eth_data-&gt;rw_done);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_get_ethtool_stats_eth(struct dsa_switch *ds, int port, u64 *data)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(ds, port);</div><div class='add'>+	struct qca8k_mib_eth_data *mib_eth_data;</div><div class='add'>+	struct qca8k_priv *priv = ds-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mib_eth_data = &amp;priv-&gt;mib_eth_data;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;mib_eth_data-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	reinit_completion(&amp;mib_eth_data-&gt;rw_done);</div><div class='add'>+</div><div class='add'>+	mib_eth_data-&gt;req_port = dp-&gt;index;</div><div class='add'>+	mib_eth_data-&gt;data = data;</div><div class='add'>+	refcount_set(&amp;mib_eth_data-&gt;port_parsed, QCA8K_NUM_PORTS);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+</div><div class='add'>+	/* Send mib autocast request */</div><div class='add'>+	ret = regmap_update_bits(priv-&gt;regmap, QCA8K_REG_MIB,</div><div class='add'>+				 QCA8K_MIB_FUNC | QCA8K_MIB_BUSY,</div><div class='add'>+				 FIELD_PREP(QCA8K_MIB_FUNC, QCA8K_MIB_CAST) |</div><div class='add'>+				 QCA8K_MIB_BUSY);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		goto exit;</div><div class='add'>+</div><div class='add'>+	ret = wait_for_completion_timeout(&amp;mib_eth_data-&gt;rw_done, QCA8K_ETHERNET_TIMEOUT);</div><div class='add'>+</div><div class='add'>+exit:</div><div class='add'>+	mutex_unlock(&amp;mib_eth_data-&gt;mutex);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 qca8k_get_phy_flags(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	/* Communicate to the phy internal driver the switch revision.</div><div class='add'>+	 * Based on the switch revision different values needs to be</div><div class='add'>+	 * set to the dbg and mmd reg on the phy.</div><div class='add'>+	 * The first 2 bit are used to communicate the switch revision</div><div class='add'>+	 * to the phy driver.</div><div class='add'>+	 */</div><div class='add'>+	if (port &gt; 0 &amp;&amp; port &lt; 6)</div><div class='add'>+		return priv-&gt;switch_revision;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum dsa_tag_protocol</div><div class='add'>+qca8k_get_tag_protocol(struct dsa_switch *ds, int port,</div><div class='add'>+		       enum dsa_tag_protocol mp)</div><div class='add'>+{</div><div class='add'>+	return DSA_TAG_PROTO_QCA;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+qca8k_conduit_change(struct dsa_switch *ds, const struct net_device *conduit,</div><div class='add'>+		     bool operational)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = conduit-&gt;dsa_ptr;</div><div class='add'>+	struct qca8k_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	/* Ethernet MIB/MDIO is only supported for CPU port 0 */</div><div class='add'>+	if (dp-&gt;index != 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;mgmt_eth_data.mutex);</div><div class='add'>+	mutex_lock(&amp;priv-&gt;mib_eth_data.mutex);</div><div class='add'>+</div><div class='add'>+	priv-&gt;mgmt_conduit = operational ? (struct net_device *)conduit : NULL;</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;mib_eth_data.mutex);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;mgmt_eth_data.mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int qca8k_connect_tag_protocol(struct dsa_switch *ds,</div><div class='add'>+				      enum dsa_tag_protocol proto)</div><div class='add'>+{</div><div class='add'>+	struct qca_tagger_data *tagger_data;</div><div class='add'>+</div><div class='add'>+	switch (proto) {</div><div class='add'>+	case DSA_TAG_PROTO_QCA:</div><div class='add'>+		tagger_data = ds-&gt;tagger_data;</div><div class='add'>+</div><div class='add'>+		tagger_data-&gt;rw_reg_ack_handler = qca8k_rw_reg_ack_handler;</div><div class='add'>+		tagger_data-&gt;mib_autocast_handler = qca8k_mib_autocast_handler;</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void qca8k_setup_hol_fixup(struct qca8k_priv *priv, int port)</div><div class='add'>+{</div><div class='add'>+	u32 mask;</div><div class='add'>+</div><div class='add'>+	switch (port) {</div><div class='add'>+	/* The 2 CPU port and port 5 requires some different</div><div class='add'>+	 * priority than any other ports.</div><div class='add'>+	 */</div><div class='add'>+	case 0:</div><div class='add'>+	case 5:</div><div class='add'>+	case 6:</div><div class='add'>+		mask = QCA8K_PORT_HOL_CTRL0_EG_PRI0(0x3) |</div><div class='add'>+			QCA8K_PORT_HOL_CTRL0_EG_PRI1(0x4) |</div><div class='add'>+			QCA8K_PORT_HOL_CTRL0_EG_PRI2(0x4) |</div><div class='add'>+			QCA8K_PORT_HOL_CTRL0_EG_PRI3(0x4) |</div><div class='add'>+			QCA8K_PORT_HOL_CTRL0_EG_PRI4(0x6) |</div><div class='add'>+			QCA8K_PORT_HOL_CTRL0_EG_PRI5(0x8) |</div><div class='add'>+			QCA8K_PORT_HOL_CTRL0_EG_PORT(0x1e);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		mask = QCA8K_PORT_HOL_CTRL0_EG_PRI0(0x3) |</div><div class='add'>+			QCA8K_PORT_HOL_CTRL0_EG_PRI1(0x4) |</div><div class='add'>+			QCA8K_PORT_HOL_CTRL0_EG_PRI2(0x6) |</div><div class='add'>+			QCA8K_PORT_HOL_CTRL0_EG_PRI3(0x8) |</div><div class='add'>+			QCA8K_PORT_HOL_CTRL0_EG_PORT(0x19);</div><div class='add'>+	}</div><div class='add'>+	regmap_write(priv-&gt;regmap, QCA8K_REG_PORT_HOL_CTRL0(port), mask);</div><div class='add'>+</div><div class='add'>+	mask = QCA8K_PORT_HOL_CTRL1_ING(0x6) |</div><div class='add'>+	       QCA8K_PORT_HOL_CTRL1_EG_PRI_BUF_EN |</div><div class='add'>+	       QCA8K_PORT_HOL_CTRL1_EG_PORT_BUF_EN |</div><div class='add'>+	       QCA8K_PORT_HOL_CTRL1_WRED_EN;</div><div class='add'>+	regmap_update_bits(priv-&gt;regmap, QCA8K_REG_PORT_HOL_CTRL1(port),</div><div class='add'>+			   QCA8K_PORT_HOL_CTRL1_ING_BUF_MASK |</div><div class='add'>+			   QCA8K_PORT_HOL_CTRL1_EG_PRI_BUF_EN |</div><div class='add'>+			   QCA8K_PORT_HOL_CTRL1_EG_PORT_BUF_EN |</div><div class='add'>+			   QCA8K_PORT_HOL_CTRL1_WRED_EN,</div><div class='add'>+			   mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_setup(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_priv *priv = ds-&gt;priv;</div><div class='add'>+	struct dsa_port *dp;</div><div class='add'>+	int cpu_port, ret;</div><div class='add'>+	u32 mask;</div><div class='add'>+</div><div class='add'>+	cpu_port = qca8k_find_cpu_port(ds);</div><div class='add'>+	if (cpu_port &lt; 0) {</div><div class='add'>+		dev_err(priv-&gt;dev, "No cpu port configured in both cpu port0 and port6");</div><div class='add'>+		return cpu_port;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Parse CPU port config to be later used in phy_link mac_config */</div><div class='add'>+	ret = qca8k_parse_port_config(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = qca8k_setup_mdio_bus(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = qca8k_setup_of_pws_reg(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = qca8k_setup_mac_pwr_sel(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = qca8k_setup_led_ctrl(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	qca8k_setup_pcs(priv, &amp;priv-&gt;pcs_port_0, 0);</div><div class='add'>+	qca8k_setup_pcs(priv, &amp;priv-&gt;pcs_port_6, 6);</div><div class='add'>+</div><div class='add'>+	/* Make sure MAC06 is disabled */</div><div class='add'>+	ret = regmap_clear_bits(priv-&gt;regmap, QCA8K_REG_PORT0_PAD_CTRL,</div><div class='add'>+				QCA8K_PORT0_PAD_MAC06_EXCHANGE_EN);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(priv-&gt;dev, "failed disabling MAC06 exchange");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Enable CPU Port */</div><div class='add'>+	ret = regmap_set_bits(priv-&gt;regmap, QCA8K_REG_GLOBAL_FW_CTRL0,</div><div class='add'>+			      QCA8K_GLOBAL_FW_CTRL0_CPU_PORT_EN);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(priv-&gt;dev, "failed enabling CPU port");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Enable MIB counters */</div><div class='add'>+	ret = qca8k_mib_init(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_warn(priv-&gt;dev, "mib init failed");</div><div class='add'>+</div><div class='add'>+	/* Initial setup of all ports */</div><div class='add'>+	dsa_switch_for_each_port(dp, ds) {</div><div class='add'>+		/* Disable forwarding by default on all ports */</div><div class='add'>+		ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(dp-&gt;index),</div><div class='add'>+				QCA8K_PORT_LOOKUP_MEMBER, 0);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Disable MAC by default on all user ports */</div><div class='add'>+	dsa_switch_for_each_user_port(dp, ds)</div><div class='add'>+		qca8k_port_set_status(priv, dp-&gt;index, 0);</div><div class='add'>+</div><div class='add'>+	/* Enable QCA header mode on all cpu ports */</div><div class='add'>+	dsa_switch_for_each_cpu_port(dp, ds) {</div><div class='add'>+		ret = qca8k_write(priv, QCA8K_REG_PORT_HDR_CTRL(dp-&gt;index),</div><div class='add'>+				  FIELD_PREP(QCA8K_PORT_HDR_CTRL_TX_MASK, QCA8K_PORT_HDR_CTRL_ALL) |</div><div class='add'>+				  FIELD_PREP(QCA8K_PORT_HDR_CTRL_RX_MASK, QCA8K_PORT_HDR_CTRL_ALL));</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(priv-&gt;dev, "failed enabling QCA header mode on port %d", dp-&gt;index);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Forward all unknown frames to CPU port for Linux processing</div><div class='add'>+	 * Notice that in multi-cpu config only one port should be set</div><div class='add'>+	 * for igmp, unknown, multicast and broadcast packet</div><div class='add'>+	 */</div><div class='add'>+	ret = qca8k_write(priv, QCA8K_REG_GLOBAL_FW_CTRL1,</div><div class='add'>+			  FIELD_PREP(QCA8K_GLOBAL_FW_CTRL1_IGMP_DP_MASK, BIT(cpu_port)) |</div><div class='add'>+			  FIELD_PREP(QCA8K_GLOBAL_FW_CTRL1_BC_DP_MASK, BIT(cpu_port)) |</div><div class='add'>+			  FIELD_PREP(QCA8K_GLOBAL_FW_CTRL1_MC_DP_MASK, BIT(cpu_port)) |</div><div class='add'>+			  FIELD_PREP(QCA8K_GLOBAL_FW_CTRL1_UC_DP_MASK, BIT(cpu_port)));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* CPU port gets connected to all user ports of the switch */</div><div class='add'>+	ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(cpu_port),</div><div class='add'>+			QCA8K_PORT_LOOKUP_MEMBER, dsa_user_ports(ds));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Setup connection between CPU port &amp; user ports</div><div class='add'>+	 * Individual user ports get connected to CPU port only</div><div class='add'>+	 */</div><div class='add'>+	dsa_switch_for_each_user_port(dp, ds) {</div><div class='add'>+		u8 port = dp-&gt;index;</div><div class='add'>+</div><div class='add'>+		ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port),</div><div class='add'>+				QCA8K_PORT_LOOKUP_MEMBER,</div><div class='add'>+				BIT(cpu_port));</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		ret = regmap_clear_bits(priv-&gt;regmap, QCA8K_PORT_LOOKUP_CTRL(port),</div><div class='add'>+					QCA8K_PORT_LOOKUP_LEARN);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		/* For port based vlans to work we need to set the</div><div class='add'>+		 * default egress vid</div><div class='add'>+		 */</div><div class='add'>+		ret = qca8k_rmw(priv, QCA8K_EGRESS_VLAN(port),</div><div class='add'>+				QCA8K_EGREES_VLAN_PORT_MASK(port),</div><div class='add'>+				QCA8K_EGREES_VLAN_PORT(port, QCA8K_PORT_VID_DEF));</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		ret = qca8k_write(priv, QCA8K_REG_PORT_VLAN_CTRL0(port),</div><div class='add'>+				  QCA8K_PORT_VLAN_CVID(QCA8K_PORT_VID_DEF) |</div><div class='add'>+				  QCA8K_PORT_VLAN_SVID(QCA8K_PORT_VID_DEF));</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* The port 5 of the qca8337 have some problem in flood condition. The</div><div class='add'>+	 * original legacy driver had some specific buffer and priority settings</div><div class='add'>+	 * for the different port suggested by the QCA switch team. Add this</div><div class='add'>+	 * missing settings to improve switch stability under load condition.</div><div class='add'>+	 * This problem is limited to qca8337 and other qca8k switch are not affected.</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;switch_id == QCA8K_ID_QCA8337)</div><div class='add'>+		dsa_switch_for_each_available_port(dp, ds)</div><div class='add'>+			qca8k_setup_hol_fixup(priv, dp-&gt;index);</div><div class='add'>+</div><div class='add'>+	/* Special GLOBAL_FC_THRESH value are needed for ar8327 switch */</div><div class='add'>+	if (priv-&gt;switch_id == QCA8K_ID_QCA8327) {</div><div class='add'>+		mask = QCA8K_GLOBAL_FC_GOL_XON_THRES(288) |</div><div class='add'>+		       QCA8K_GLOBAL_FC_GOL_XOFF_THRES(496);</div><div class='add'>+		qca8k_rmw(priv, QCA8K_REG_GLOBAL_FC_THRESH,</div><div class='add'>+			  QCA8K_GLOBAL_FC_GOL_XON_THRES_MASK |</div><div class='add'>+			  QCA8K_GLOBAL_FC_GOL_XOFF_THRES_MASK,</div><div class='add'>+			  mask);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Setup our port MTUs to match power on defaults */</div><div class='add'>+	ret = qca8k_write(priv, QCA8K_MAX_FRAME_SIZE, ETH_FRAME_LEN + ETH_FCS_LEN);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_warn(priv-&gt;dev, "failed setting MTU settings");</div><div class='add'>+</div><div class='add'>+	/* Flush the FDB table */</div><div class='add'>+	qca8k_fdb_flush(priv);</div><div class='add'>+</div><div class='add'>+	/* Set min a max ageing value supported */</div><div class='add'>+	ds-&gt;ageing_time_min = 7000;</div><div class='add'>+	ds-&gt;ageing_time_max = 458745000;</div><div class='add'>+</div><div class='add'>+	/* Set max number of LAGs supported */</div><div class='add'>+	ds-&gt;num_lag_ids = QCA8K_NUM_LAGS;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct phylink_mac_ops qca8k_phylink_mac_ops = {</div><div class='add'>+	.mac_select_pcs	= qca8k_phylink_mac_select_pcs,</div><div class='add'>+	.mac_config	= qca8k_phylink_mac_config,</div><div class='add'>+	.mac_link_down	= qca8k_phylink_mac_link_down,</div><div class='add'>+	.mac_link_up	= qca8k_phylink_mac_link_up,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct dsa_switch_ops qca8k_switch_ops = {</div><div class='add'>+	.get_tag_protocol	= qca8k_get_tag_protocol,</div><div class='add'>+	.setup			= qca8k_setup,</div><div class='add'>+	.get_strings		= qca8k_get_strings,</div><div class='add'>+	.get_ethtool_stats	= qca8k_get_ethtool_stats,</div><div class='add'>+	.get_sset_count		= qca8k_get_sset_count,</div><div class='add'>+	.set_ageing_time	= qca8k_set_ageing_time,</div><div class='add'>+	.support_eee		= dsa_supports_eee,</div><div class='add'>+	.set_mac_eee		= qca8k_set_mac_eee,</div><div class='add'>+	.port_enable		= qca8k_port_enable,</div><div class='add'>+	.port_disable		= qca8k_port_disable,</div><div class='add'>+	.port_change_mtu	= qca8k_port_change_mtu,</div><div class='add'>+	.port_max_mtu		= qca8k_port_max_mtu,</div><div class='add'>+	.port_stp_state_set	= qca8k_port_stp_state_set,</div><div class='add'>+	.port_pre_bridge_flags	= qca8k_port_pre_bridge_flags,</div><div class='add'>+	.port_bridge_flags	= qca8k_port_bridge_flags,</div><div class='add'>+	.port_bridge_join	= qca8k_port_bridge_join,</div><div class='add'>+	.port_bridge_leave	= qca8k_port_bridge_leave,</div><div class='add'>+	.port_fast_age		= qca8k_port_fast_age,</div><div class='add'>+	.port_fdb_add		= qca8k_port_fdb_add,</div><div class='add'>+	.port_fdb_del		= qca8k_port_fdb_del,</div><div class='add'>+	.port_fdb_dump		= qca8k_port_fdb_dump,</div><div class='add'>+	.port_mdb_add		= qca8k_port_mdb_add,</div><div class='add'>+	.port_mdb_del		= qca8k_port_mdb_del,</div><div class='add'>+	.port_mirror_add	= qca8k_port_mirror_add,</div><div class='add'>+	.port_mirror_del	= qca8k_port_mirror_del,</div><div class='add'>+	.port_vlan_filtering	= qca8k_port_vlan_filtering,</div><div class='add'>+	.port_vlan_add		= qca8k_port_vlan_add,</div><div class='add'>+	.port_vlan_del		= qca8k_port_vlan_del,</div><div class='add'>+	.phylink_get_caps	= qca8k_phylink_get_caps,</div><div class='add'>+	.get_phy_flags		= qca8k_get_phy_flags,</div><div class='add'>+	.port_lag_join		= qca8k_port_lag_join,</div><div class='add'>+	.port_lag_leave		= qca8k_port_lag_leave,</div><div class='add'>+	.conduit_state_change	= qca8k_conduit_change,</div><div class='add'>+	.connect_tag_protocol	= qca8k_connect_tag_protocol,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_sw_probe(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_priv *priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* allocate the private data struct so that we can probe the switches</div><div class='add'>+	 * ID register</div><div class='add'>+	 */</div><div class='add'>+	priv = devm_kzalloc(&amp;mdiodev-&gt;dev, sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv-&gt;bus = mdiodev-&gt;bus;</div><div class='add'>+	priv-&gt;dev = &amp;mdiodev-&gt;dev;</div><div class='add'>+	priv-&gt;info = of_device_get_match_data(priv-&gt;dev);</div><div class='add'>+</div><div class='add'>+	priv-&gt;reset_gpio = devm_gpiod_get_optional(priv-&gt;dev, "reset",</div><div class='add'>+						   GPIOD_OUT_HIGH);</div><div class='add'>+	if (IS_ERR(priv-&gt;reset_gpio))</div><div class='add'>+		return PTR_ERR(priv-&gt;reset_gpio);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;reset_gpio) {</div><div class='add'>+		/* The active low duration must be greater than 10 ms</div><div class='add'>+		 * and checkpatch.pl wants 20 ms.</div><div class='add'>+		 */</div><div class='add'>+		msleep(20);</div><div class='add'>+		gpiod_set_value_cansleep(priv-&gt;reset_gpio, 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Start by setting up the register mapping */</div><div class='add'>+	priv-&gt;regmap = devm_regmap_init(&amp;mdiodev-&gt;dev, NULL, priv,</div><div class='add'>+					&amp;qca8k_regmap_config);</div><div class='add'>+	if (IS_ERR(priv-&gt;regmap)) {</div><div class='add'>+		dev_err(priv-&gt;dev, "regmap initialization failed");</div><div class='add'>+		return PTR_ERR(priv-&gt;regmap);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;mdio_cache.page = 0xffff;</div><div class='add'>+</div><div class='add'>+	/* Check the detected switch id */</div><div class='add'>+	ret = qca8k_read_switch_id(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	priv-&gt;ds = devm_kzalloc(&amp;mdiodev-&gt;dev, sizeof(*priv-&gt;ds), GFP_KERNEL);</div><div class='add'>+	if (!priv-&gt;ds)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;priv-&gt;mgmt_eth_data.mutex);</div><div class='add'>+	init_completion(&amp;priv-&gt;mgmt_eth_data.rw_done);</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;priv-&gt;mib_eth_data.mutex);</div><div class='add'>+	init_completion(&amp;priv-&gt;mib_eth_data.rw_done);</div><div class='add'>+</div><div class='add'>+	priv-&gt;ds-&gt;dev = &amp;mdiodev-&gt;dev;</div><div class='add'>+	priv-&gt;ds-&gt;num_ports = QCA8K_NUM_PORTS;</div><div class='add'>+	priv-&gt;ds-&gt;priv = priv;</div><div class='add'>+	priv-&gt;ds-&gt;ops = &amp;qca8k_switch_ops;</div><div class='add'>+	priv-&gt;ds-&gt;phylink_mac_ops = &amp;qca8k_phylink_mac_ops;</div><div class='add'>+	mutex_init(&amp;priv-&gt;reg_mutex);</div><div class='add'>+	dev_set_drvdata(&amp;mdiodev-&gt;dev, priv);</div><div class='add'>+</div><div class='add'>+	return dsa_register_switch(priv-&gt;ds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+qca8k_sw_remove(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_priv *priv = dev_get_drvdata(&amp;mdiodev-&gt;dev);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; QCA8K_NUM_PORTS; i++)</div><div class='add'>+		qca8k_port_set_status(priv, i, 0);</div><div class='add'>+</div><div class='add'>+	dsa_unregister_switch(priv-&gt;ds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void qca8k_sw_shutdown(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_priv *priv = dev_get_drvdata(&amp;mdiodev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dsa_switch_shutdown(priv-&gt;ds);</div><div class='add'>+</div><div class='add'>+	dev_set_drvdata(&amp;mdiodev-&gt;dev, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PM_SLEEP</div><div class='add'>+static void</div><div class='add'>+qca8k_set_pm(struct qca8k_priv *priv, int enable)</div><div class='add'>+{</div><div class='add'>+	int port;</div><div class='add'>+</div><div class='add'>+	for (port = 0; port &lt; QCA8K_NUM_PORTS; port++) {</div><div class='add'>+		/* Do not enable on resume if the port was</div><div class='add'>+		 * disabled before.</div><div class='add'>+		 */</div><div class='add'>+		if (!(priv-&gt;port_enabled_map &amp; BIT(port)))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		qca8k_port_set_status(priv, port, enable);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int qca8k_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_priv *priv = dev_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	qca8k_set_pm(priv, 0);</div><div class='add'>+</div><div class='add'>+	return dsa_switch_suspend(priv-&gt;ds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int qca8k_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_priv *priv = dev_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	qca8k_set_pm(priv, 1);</div><div class='add'>+</div><div class='add'>+	return dsa_switch_resume(priv-&gt;ds);</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_PM_SLEEP */</div><div class='add'>+</div><div class='add'>+static SIMPLE_DEV_PM_OPS(qca8k_pm_ops,</div><div class='add'>+			 qca8k_suspend, qca8k_resume);</div><div class='add'>+</div><div class='add'>+static const struct qca8k_info_ops qca8xxx_ops = {</div><div class='add'>+	.autocast_mib = qca8k_get_ethtool_stats_eth,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct qca8k_match_data qca8327 = {</div><div class='add'>+	.id = QCA8K_ID_QCA8327,</div><div class='add'>+	.reduced_package = true,</div><div class='add'>+	.mib_count = QCA8K_QCA832X_MIB_COUNT,</div><div class='add'>+	.ops = &amp;qca8xxx_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct qca8k_match_data qca8328 = {</div><div class='add'>+	.id = QCA8K_ID_QCA8327,</div><div class='add'>+	.mib_count = QCA8K_QCA832X_MIB_COUNT,</div><div class='add'>+	.ops = &amp;qca8xxx_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct qca8k_match_data qca833x = {</div><div class='add'>+	.id = QCA8K_ID_QCA8337,</div><div class='add'>+	.mib_count = QCA8K_QCA833X_MIB_COUNT,</div><div class='add'>+	.ops = &amp;qca8xxx_ops,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct of_device_id qca8k_of_match[] = {</div><div class='add'>+	{ .compatible = "qca,qca8327", .data = &amp;qca8327 },</div><div class='add'>+	{ .compatible = "qca,qca8328", .data = &amp;qca8328 },</div><div class='add'>+	{ .compatible = "qca,qca8334", .data = &amp;qca833x },</div><div class='add'>+	{ .compatible = "qca,qca8337", .data = &amp;qca833x },</div><div class='add'>+	{ /* sentinel */ },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct mdio_driver qca8kmdio_driver = {</div><div class='add'>+	.probe  = qca8k_sw_probe,</div><div class='add'>+	.remove = qca8k_sw_remove,</div><div class='add'>+	.shutdown = qca8k_sw_shutdown,</div><div class='add'>+	.mdiodrv.driver = {</div><div class='add'>+		.name = "qca8k",</div><div class='add'>+		.of_match_table = qca8k_of_match,</div><div class='add'>+		.pm = &amp;qca8k_pm_ops,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+mdio_module_driver(qca8kmdio_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Mathieu Olivari, John Crispin &lt;john@phrozen.org&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Driver for QCA8K ethernet switch family");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='add'>+MODULE_ALIAS("platform:qca8k");</div><div class='head'>diff --git a/drivers/net/dsa/qca/qca8k-common.c b/drivers/net/dsa/qca/qca8k-common.c<br/>new file mode 100644<br/>index 000000000000..13005f10edb7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/qca/qca8k-common.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/qca/qca8k-common.c</a></div><div class='hunk'>@@ -0,0 +1,1257 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2009 Felix Fietkau &lt;nbd@nbd.name&gt;</div><div class='add'>+ * Copyright (C) 2011-2012 Gabor Juhos &lt;juhosg@openwrt.org&gt;</div><div class='add'>+ * Copyright (c) 2015, 2019, The Linux Foundation. All rights reserved.</div><div class='add'>+ * Copyright (c) 2016 John Crispin &lt;john@phrozen.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+#include &lt;linux/if_bridge.h&gt;</div><div class='add'>+</div><div class='add'>+#include "qca8k.h"</div><div class='add'>+</div><div class='add'>+#define MIB_DESC(_s, _o, _n)	\</div><div class='add'>+	{			\</div><div class='add'>+		.size = (_s),	\</div><div class='add'>+		.offset = (_o),	\</div><div class='add'>+		.name = (_n),	\</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+const struct qca8k_mib_desc ar8327_mib[] = {</div><div class='add'>+	MIB_DESC(1, 0x00, "RxBroad"),</div><div class='add'>+	MIB_DESC(1, 0x04, "RxPause"),</div><div class='add'>+	MIB_DESC(1, 0x08, "RxMulti"),</div><div class='add'>+	MIB_DESC(1, 0x0c, "RxFcsErr"),</div><div class='add'>+	MIB_DESC(1, 0x10, "RxAlignErr"),</div><div class='add'>+	MIB_DESC(1, 0x14, "RxRunt"),</div><div class='add'>+	MIB_DESC(1, 0x18, "RxFragment"),</div><div class='add'>+	MIB_DESC(1, 0x1c, "Rx64Byte"),</div><div class='add'>+	MIB_DESC(1, 0x20, "Rx128Byte"),</div><div class='add'>+	MIB_DESC(1, 0x24, "Rx256Byte"),</div><div class='add'>+	MIB_DESC(1, 0x28, "Rx512Byte"),</div><div class='add'>+	MIB_DESC(1, 0x2c, "Rx1024Byte"),</div><div class='add'>+	MIB_DESC(1, 0x30, "Rx1518Byte"),</div><div class='add'>+	MIB_DESC(1, 0x34, "RxMaxByte"),</div><div class='add'>+	MIB_DESC(1, 0x38, "RxTooLong"),</div><div class='add'>+	MIB_DESC(2, 0x3c, "RxGoodByte"),</div><div class='add'>+	MIB_DESC(2, 0x44, "RxBadByte"),</div><div class='add'>+	MIB_DESC(1, 0x4c, "RxOverFlow"),</div><div class='add'>+	MIB_DESC(1, 0x50, "Filtered"),</div><div class='add'>+	MIB_DESC(1, 0x54, "TxBroad"),</div><div class='add'>+	MIB_DESC(1, 0x58, "TxPause"),</div><div class='add'>+	MIB_DESC(1, 0x5c, "TxMulti"),</div><div class='add'>+	MIB_DESC(1, 0x60, "TxUnderRun"),</div><div class='add'>+	MIB_DESC(1, 0x64, "Tx64Byte"),</div><div class='add'>+	MIB_DESC(1, 0x68, "Tx128Byte"),</div><div class='add'>+	MIB_DESC(1, 0x6c, "Tx256Byte"),</div><div class='add'>+	MIB_DESC(1, 0x70, "Tx512Byte"),</div><div class='add'>+	MIB_DESC(1, 0x74, "Tx1024Byte"),</div><div class='add'>+	MIB_DESC(1, 0x78, "Tx1518Byte"),</div><div class='add'>+	MIB_DESC(1, 0x7c, "TxMaxByte"),</div><div class='add'>+	MIB_DESC(1, 0x80, "TxOverSize"),</div><div class='add'>+	MIB_DESC(2, 0x84, "TxByte"),</div><div class='add'>+	MIB_DESC(1, 0x8c, "TxCollision"),</div><div class='add'>+	MIB_DESC(1, 0x90, "TxAbortCol"),</div><div class='add'>+	MIB_DESC(1, 0x94, "TxMultiCol"),</div><div class='add'>+	MIB_DESC(1, 0x98, "TxSingleCol"),</div><div class='add'>+	MIB_DESC(1, 0x9c, "TxExcDefer"),</div><div class='add'>+	MIB_DESC(1, 0xa0, "TxDefer"),</div><div class='add'>+	MIB_DESC(1, 0xa4, "TxLateCol"),</div><div class='add'>+	MIB_DESC(1, 0xa8, "RXUnicast"),</div><div class='add'>+	MIB_DESC(1, 0xac, "TXUnicast"),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int qca8k_read(struct qca8k_priv *priv, u32 reg, u32 *val)</div><div class='add'>+{</div><div class='add'>+	return regmap_read(priv-&gt;regmap, reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int qca8k_write(struct qca8k_priv *priv, u32 reg, u32 val)</div><div class='add'>+{</div><div class='add'>+	return regmap_write(priv-&gt;regmap, reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int qca8k_rmw(struct qca8k_priv *priv, u32 reg, u32 mask, u32 write_val)</div><div class='add'>+{</div><div class='add'>+	return regmap_update_bits(priv-&gt;regmap, reg, mask, write_val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct regmap_range qca8k_readable_ranges[] = {</div><div class='add'>+	regmap_reg_range(0x0000, 0x00e4), /* Global control */</div><div class='add'>+	regmap_reg_range(0x0100, 0x0168), /* EEE control */</div><div class='add'>+	regmap_reg_range(0x0200, 0x0270), /* Parser control */</div><div class='add'>+	regmap_reg_range(0x0400, 0x0454), /* ACL */</div><div class='add'>+	regmap_reg_range(0x0600, 0x0718), /* Lookup */</div><div class='add'>+	regmap_reg_range(0x0800, 0x0b70), /* QM */</div><div class='add'>+	regmap_reg_range(0x0c00, 0x0c80), /* PKT */</div><div class='add'>+	regmap_reg_range(0x0e00, 0x0e98), /* L3 */</div><div class='add'>+	regmap_reg_range(0x1000, 0x10ac), /* MIB - Port0 */</div><div class='add'>+	regmap_reg_range(0x1100, 0x11ac), /* MIB - Port1 */</div><div class='add'>+	regmap_reg_range(0x1200, 0x12ac), /* MIB - Port2 */</div><div class='add'>+	regmap_reg_range(0x1300, 0x13ac), /* MIB - Port3 */</div><div class='add'>+	regmap_reg_range(0x1400, 0x14ac), /* MIB - Port4 */</div><div class='add'>+	regmap_reg_range(0x1500, 0x15ac), /* MIB - Port5 */</div><div class='add'>+	regmap_reg_range(0x1600, 0x16ac), /* MIB - Port6 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct regmap_access_table qca8k_readable_table = {</div><div class='add'>+	.yes_ranges = qca8k_readable_ranges,</div><div class='add'>+	.n_yes_ranges = ARRAY_SIZE(qca8k_readable_ranges),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int qca8k_busy_wait(struct qca8k_priv *priv, u32 reg, u32 mask)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	return regmap_read_poll_timeout(priv-&gt;regmap, reg, val, !(val &amp; mask), 0,</div><div class='add'>+				       QCA8K_BUSY_WAIT_TIMEOUT * USEC_PER_MSEC);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int qca8k_fdb_read(struct qca8k_priv *priv, struct qca8k_fdb *fdb)</div><div class='add'>+{</div><div class='add'>+	u32 reg[QCA8K_ATU_TABLE_SIZE];</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* load the ARL table into an array */</div><div class='add'>+	ret = regmap_bulk_read(priv-&gt;regmap, QCA8K_REG_ATU_DATA0, reg,</div><div class='add'>+			       QCA8K_ATU_TABLE_SIZE);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* vid - 83:72 */</div><div class='add'>+	fdb-&gt;vid = FIELD_GET(QCA8K_ATU_VID_MASK, reg[2]);</div><div class='add'>+	/* aging - 67:64 */</div><div class='add'>+	fdb-&gt;aging = FIELD_GET(QCA8K_ATU_STATUS_MASK, reg[2]);</div><div class='add'>+	/* portmask - 54:48 */</div><div class='add'>+	fdb-&gt;port_mask = FIELD_GET(QCA8K_ATU_PORT_MASK, reg[1]);</div><div class='add'>+	/* mac - 47:0 */</div><div class='add'>+	fdb-&gt;mac[0] = FIELD_GET(QCA8K_ATU_ADDR0_MASK, reg[1]);</div><div class='add'>+	fdb-&gt;mac[1] = FIELD_GET(QCA8K_ATU_ADDR1_MASK, reg[1]);</div><div class='add'>+	fdb-&gt;mac[2] = FIELD_GET(QCA8K_ATU_ADDR2_MASK, reg[0]);</div><div class='add'>+	fdb-&gt;mac[3] = FIELD_GET(QCA8K_ATU_ADDR3_MASK, reg[0]);</div><div class='add'>+	fdb-&gt;mac[4] = FIELD_GET(QCA8K_ATU_ADDR4_MASK, reg[0]);</div><div class='add'>+	fdb-&gt;mac[5] = FIELD_GET(QCA8K_ATU_ADDR5_MASK, reg[0]);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void qca8k_fdb_write(struct qca8k_priv *priv, u16 vid, u8 port_mask,</div><div class='add'>+			    const u8 *mac, u8 aging)</div><div class='add'>+{</div><div class='add'>+	u32 reg[QCA8K_ATU_TABLE_SIZE] = { 0 };</div><div class='add'>+</div><div class='add'>+	/* vid - 83:72 */</div><div class='add'>+	reg[2] = FIELD_PREP(QCA8K_ATU_VID_MASK, vid);</div><div class='add'>+	/* aging - 67:64 */</div><div class='add'>+	reg[2] |= FIELD_PREP(QCA8K_ATU_STATUS_MASK, aging);</div><div class='add'>+	/* portmask - 54:48 */</div><div class='add'>+	reg[1] = FIELD_PREP(QCA8K_ATU_PORT_MASK, port_mask);</div><div class='add'>+	/* mac - 47:0 */</div><div class='add'>+	reg[1] |= FIELD_PREP(QCA8K_ATU_ADDR0_MASK, mac[0]);</div><div class='add'>+	reg[1] |= FIELD_PREP(QCA8K_ATU_ADDR1_MASK, mac[1]);</div><div class='add'>+	reg[0] |= FIELD_PREP(QCA8K_ATU_ADDR2_MASK, mac[2]);</div><div class='add'>+	reg[0] |= FIELD_PREP(QCA8K_ATU_ADDR3_MASK, mac[3]);</div><div class='add'>+	reg[0] |= FIELD_PREP(QCA8K_ATU_ADDR4_MASK, mac[4]);</div><div class='add'>+	reg[0] |= FIELD_PREP(QCA8K_ATU_ADDR5_MASK, mac[5]);</div><div class='add'>+</div><div class='add'>+	/* load the array into the ARL table */</div><div class='add'>+	regmap_bulk_write(priv-&gt;regmap, QCA8K_REG_ATU_DATA0, reg,</div><div class='add'>+			  QCA8K_ATU_TABLE_SIZE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int qca8k_fdb_access(struct qca8k_priv *priv, enum qca8k_fdb_cmd cmd,</div><div class='add'>+			    int port)</div><div class='add'>+{</div><div class='add'>+	u32 reg;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Set the command and FDB index */</div><div class='add'>+	reg = QCA8K_ATU_FUNC_BUSY;</div><div class='add'>+	reg |= cmd;</div><div class='add'>+	if (port &gt;= 0) {</div><div class='add'>+		reg |= QCA8K_ATU_FUNC_PORT_EN;</div><div class='add'>+		reg |= FIELD_PREP(QCA8K_ATU_FUNC_PORT_MASK, port);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Write the function register triggering the table access */</div><div class='add'>+	ret = qca8k_write(priv, QCA8K_REG_ATU_FUNC, reg);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* wait for completion */</div><div class='add'>+	ret = qca8k_busy_wait(priv, QCA8K_REG_ATU_FUNC, QCA8K_ATU_FUNC_BUSY);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Check for table full violation when adding an entry */</div><div class='add'>+	if (cmd == QCA8K_FDB_LOAD) {</div><div class='add'>+		ret = qca8k_read(priv, QCA8K_REG_ATU_FUNC, &amp;reg);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+		if (reg &amp; QCA8K_ATU_FUNC_FULL)</div><div class='add'>+			return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int qca8k_fdb_next(struct qca8k_priv *priv, struct qca8k_fdb *fdb,</div><div class='add'>+			  int port)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	qca8k_fdb_write(priv, fdb-&gt;vid, fdb-&gt;port_mask, fdb-&gt;mac, fdb-&gt;aging);</div><div class='add'>+	ret = qca8k_fdb_access(priv, QCA8K_FDB_NEXT, port);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return qca8k_fdb_read(priv, fdb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int qca8k_fdb_add(struct qca8k_priv *priv, const u8 *mac,</div><div class='add'>+			 u16 port_mask, u16 vid, u8 aging)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+	qca8k_fdb_write(priv, vid, port_mask, mac, aging);</div><div class='add'>+	ret = qca8k_fdb_access(priv, QCA8K_FDB_LOAD, -1);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int qca8k_fdb_del(struct qca8k_priv *priv, const u8 *mac,</div><div class='add'>+			 u16 port_mask, u16 vid)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+	qca8k_fdb_write(priv, vid, port_mask, mac, 0);</div><div class='add'>+	ret = qca8k_fdb_access(priv, QCA8K_FDB_PURGE, -1);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void qca8k_fdb_flush(struct qca8k_priv *priv)</div><div class='add'>+{</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+	qca8k_fdb_access(priv, QCA8K_FDB_FLUSH, -1);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int qca8k_fdb_search_and_insert(struct qca8k_priv *priv, u8 port_mask,</div><div class='add'>+				       const u8 *mac, u16 vid, u8 aging)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_fdb fdb = { 0 };</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+</div><div class='add'>+	qca8k_fdb_write(priv, vid, 0, mac, 0);</div><div class='add'>+	ret = qca8k_fdb_access(priv, QCA8K_FDB_SEARCH, -1);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto exit;</div><div class='add'>+</div><div class='add'>+	ret = qca8k_fdb_read(priv, &amp;fdb);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto exit;</div><div class='add'>+</div><div class='add'>+	/* Rule exist. Delete first */</div><div class='add'>+	if (fdb.aging) {</div><div class='add'>+		ret = qca8k_fdb_access(priv, QCA8K_FDB_PURGE, -1);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto exit;</div><div class='add'>+	} else {</div><div class='add'>+		fdb.aging = aging;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Add port to fdb portmask */</div><div class='add'>+	fdb.port_mask |= port_mask;</div><div class='add'>+</div><div class='add'>+	qca8k_fdb_write(priv, vid, fdb.port_mask, mac, fdb.aging);</div><div class='add'>+	ret = qca8k_fdb_access(priv, QCA8K_FDB_LOAD, -1);</div><div class='add'>+</div><div class='add'>+exit:</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int qca8k_fdb_search_and_del(struct qca8k_priv *priv, u8 port_mask,</div><div class='add'>+				    const u8 *mac, u16 vid)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_fdb fdb = { 0 };</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+</div><div class='add'>+	qca8k_fdb_write(priv, vid, 0, mac, 0);</div><div class='add'>+	ret = qca8k_fdb_access(priv, QCA8K_FDB_SEARCH, -1);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto exit;</div><div class='add'>+</div><div class='add'>+	ret = qca8k_fdb_read(priv, &amp;fdb);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto exit;</div><div class='add'>+</div><div class='add'>+	/* Rule doesn't exist. Why delete? */</div><div class='add'>+	if (!fdb.aging) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = qca8k_fdb_access(priv, QCA8K_FDB_PURGE, -1);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto exit;</div><div class='add'>+</div><div class='add'>+	/* Only port in the rule is this port. Don't re insert */</div><div class='add'>+	if (fdb.port_mask == port_mask)</div><div class='add'>+		goto exit;</div><div class='add'>+</div><div class='add'>+	/* Remove port from port mask */</div><div class='add'>+	fdb.port_mask &amp;= ~port_mask;</div><div class='add'>+</div><div class='add'>+	qca8k_fdb_write(priv, vid, fdb.port_mask, mac, fdb.aging);</div><div class='add'>+	ret = qca8k_fdb_access(priv, QCA8K_FDB_LOAD, -1);</div><div class='add'>+</div><div class='add'>+exit:</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int qca8k_vlan_access(struct qca8k_priv *priv,</div><div class='add'>+			     enum qca8k_vlan_cmd cmd, u16 vid)</div><div class='add'>+{</div><div class='add'>+	u32 reg;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Set the command and VLAN index */</div><div class='add'>+	reg = QCA8K_VTU_FUNC1_BUSY;</div><div class='add'>+	reg |= cmd;</div><div class='add'>+	reg |= FIELD_PREP(QCA8K_VTU_FUNC1_VID_MASK, vid);</div><div class='add'>+</div><div class='add'>+	/* Write the function register triggering the table access */</div><div class='add'>+	ret = qca8k_write(priv, QCA8K_REG_VTU_FUNC1, reg);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* wait for completion */</div><div class='add'>+	ret = qca8k_busy_wait(priv, QCA8K_REG_VTU_FUNC1, QCA8K_VTU_FUNC1_BUSY);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Check for table full violation when adding an entry */</div><div class='add'>+	if (cmd == QCA8K_VLAN_LOAD) {</div><div class='add'>+		ret = qca8k_read(priv, QCA8K_REG_VTU_FUNC1, &amp;reg);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+		if (reg &amp; QCA8K_VTU_FUNC1_FULL)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int qca8k_vlan_add(struct qca8k_priv *priv, u8 port, u16 vid,</div><div class='add'>+			  bool untagged)</div><div class='add'>+{</div><div class='add'>+	u32 reg;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* We do the right thing with VLAN 0 and treat it as untagged while</div><div class='add'>+	 * preserving the tag on egress.</div><div class='add'>+	 */</div><div class='add'>+	if (vid == 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+	ret = qca8k_vlan_access(priv, QCA8K_VLAN_READ, vid);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ret = qca8k_read(priv, QCA8K_REG_VTU_FUNC0, &amp;reg);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+	reg |= QCA8K_VTU_FUNC0_VALID | QCA8K_VTU_FUNC0_IVL_EN;</div><div class='add'>+	reg &amp;= ~QCA8K_VTU_FUNC0_EG_MODE_PORT_MASK(port);</div><div class='add'>+	if (untagged)</div><div class='add'>+		reg |= QCA8K_VTU_FUNC0_EG_MODE_PORT_UNTAG(port);</div><div class='add'>+	else</div><div class='add'>+		reg |= QCA8K_VTU_FUNC0_EG_MODE_PORT_TAG(port);</div><div class='add'>+</div><div class='add'>+	ret = qca8k_write(priv, QCA8K_REG_VTU_FUNC0, reg);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+	ret = qca8k_vlan_access(priv, QCA8K_VLAN_LOAD, vid);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int qca8k_vlan_del(struct qca8k_priv *priv, u8 port, u16 vid)</div><div class='add'>+{</div><div class='add'>+	u32 reg, mask;</div><div class='add'>+	int ret, i;</div><div class='add'>+	bool del;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+	ret = qca8k_vlan_access(priv, QCA8K_VLAN_READ, vid);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ret = qca8k_read(priv, QCA8K_REG_VTU_FUNC0, &amp;reg);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+	reg &amp;= ~QCA8K_VTU_FUNC0_EG_MODE_PORT_MASK(port);</div><div class='add'>+	reg |= QCA8K_VTU_FUNC0_EG_MODE_PORT_NOT(port);</div><div class='add'>+</div><div class='add'>+	/* Check if we're the last member to be removed */</div><div class='add'>+	del = true;</div><div class='add'>+	for (i = 0; i &lt; QCA8K_NUM_PORTS; i++) {</div><div class='add'>+		mask = QCA8K_VTU_FUNC0_EG_MODE_PORT_NOT(i);</div><div class='add'>+</div><div class='add'>+		if ((reg &amp; mask) != mask) {</div><div class='add'>+			del = false;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (del) {</div><div class='add'>+		ret = qca8k_vlan_access(priv, QCA8K_VLAN_PURGE, vid);</div><div class='add'>+	} else {</div><div class='add'>+		ret = qca8k_write(priv, QCA8K_REG_VTU_FUNC0, reg);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out;</div><div class='add'>+		ret = qca8k_vlan_access(priv, QCA8K_VLAN_LOAD, vid);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int qca8k_mib_init(struct qca8k_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+	ret = regmap_update_bits(priv-&gt;regmap, QCA8K_REG_MIB,</div><div class='add'>+				 QCA8K_MIB_FUNC | QCA8K_MIB_BUSY,</div><div class='add'>+				 FIELD_PREP(QCA8K_MIB_FUNC, QCA8K_MIB_FLUSH) |</div><div class='add'>+				 QCA8K_MIB_BUSY);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto exit;</div><div class='add'>+</div><div class='add'>+	ret = qca8k_busy_wait(priv, QCA8K_REG_MIB, QCA8K_MIB_BUSY);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto exit;</div><div class='add'>+</div><div class='add'>+	ret = regmap_set_bits(priv-&gt;regmap, QCA8K_REG_MIB, QCA8K_MIB_CPU_KEEP);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto exit;</div><div class='add'>+</div><div class='add'>+	ret = qca8k_write(priv, QCA8K_REG_MODULE_EN, QCA8K_MODULE_EN_MIB);</div><div class='add'>+</div><div class='add'>+exit:</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void qca8k_port_set_status(struct qca8k_priv *priv, int port, int enable)</div><div class='add'>+{</div><div class='add'>+	u32 mask = QCA8K_PORT_STATUS_TXMAC | QCA8K_PORT_STATUS_RXMAC;</div><div class='add'>+</div><div class='add'>+	/* Port 0 and 6 have no internal PHY */</div><div class='add'>+	if (port &gt; 0 &amp;&amp; port &lt; 6)</div><div class='add'>+		mask |= QCA8K_PORT_STATUS_LINK_AUTO;</div><div class='add'>+</div><div class='add'>+	if (enable)</div><div class='add'>+		regmap_set_bits(priv-&gt;regmap, QCA8K_REG_PORT_STATUS(port), mask);</div><div class='add'>+	else</div><div class='add'>+		regmap_clear_bits(priv-&gt;regmap, QCA8K_REG_PORT_STATUS(port), mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void qca8k_get_strings(struct dsa_switch *ds, int port, u32 stringset,</div><div class='add'>+		       uint8_t *data)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_priv *priv = ds-&gt;priv;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (stringset != ETH_SS_STATS)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;info-&gt;mib_count; i++)</div><div class='add'>+		ethtool_puts(&amp;data, ar8327_mib[i].name);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void qca8k_get_ethtool_stats(struct dsa_switch *ds, int port,</div><div class='add'>+			     uint64_t *data)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_priv *priv = ds-&gt;priv;</div><div class='add'>+	const struct qca8k_mib_desc *mib;</div><div class='add'>+	u32 reg, i, val;</div><div class='add'>+	u32 hi = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;mgmt_conduit &amp;&amp; priv-&gt;info-&gt;ops-&gt;autocast_mib &amp;&amp;</div><div class='add'>+	    priv-&gt;info-&gt;ops-&gt;autocast_mib(ds, port, data) &gt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;info-&gt;mib_count; i++) {</div><div class='add'>+		mib = &amp;ar8327_mib[i];</div><div class='add'>+		reg = QCA8K_PORT_MIB_COUNTER(port) + mib-&gt;offset;</div><div class='add'>+</div><div class='add'>+		ret = qca8k_read(priv, reg, &amp;val);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (mib-&gt;size == 2) {</div><div class='add'>+			ret = qca8k_read(priv, reg + 4, &amp;hi);</div><div class='add'>+			if (ret &lt; 0)</div><div class='add'>+				continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		data[i] = val;</div><div class='add'>+		if (mib-&gt;size == 2)</div><div class='add'>+			data[i] |= (u64)hi &lt;&lt; 32;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int qca8k_get_sset_count(struct dsa_switch *ds, int port, int sset)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (sset != ETH_SS_STATS)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return priv-&gt;info-&gt;mib_count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int qca8k_set_mac_eee(struct dsa_switch *ds, int port,</div><div class='add'>+		      struct ethtool_keee *eee)</div><div class='add'>+{</div><div class='add'>+	u32 lpi_en = QCA8K_REG_EEE_CTRL_LPI_EN(port);</div><div class='add'>+	struct qca8k_priv *priv = ds-&gt;priv;</div><div class='add'>+	u32 reg;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+	ret = qca8k_read(priv, QCA8K_REG_EEE_CTRL, &amp;reg);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto exit;</div><div class='add'>+</div><div class='add'>+	if (eee-&gt;eee_enabled)</div><div class='add'>+		reg |= lpi_en;</div><div class='add'>+	else</div><div class='add'>+		reg &amp;= ~lpi_en;</div><div class='add'>+	ret = qca8k_write(priv, QCA8K_REG_EEE_CTRL, reg);</div><div class='add'>+</div><div class='add'>+exit:</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int qca8k_port_configure_learning(struct dsa_switch *ds, int port,</div><div class='add'>+					 bool learning)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (learning)</div><div class='add'>+		return regmap_set_bits(priv-&gt;regmap,</div><div class='add'>+				       QCA8K_PORT_LOOKUP_CTRL(port),</div><div class='add'>+				       QCA8K_PORT_LOOKUP_LEARN);</div><div class='add'>+	else</div><div class='add'>+		return regmap_clear_bits(priv-&gt;regmap,</div><div class='add'>+					 QCA8K_PORT_LOOKUP_CTRL(port),</div><div class='add'>+					 QCA8K_PORT_LOOKUP_LEARN);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void qca8k_port_stp_state_set(struct dsa_switch *ds, int port, u8 state)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(ds, port);</div><div class='add'>+	struct qca8k_priv *priv = ds-&gt;priv;</div><div class='add'>+	bool learning = false;</div><div class='add'>+	u32 stp_state;</div><div class='add'>+</div><div class='add'>+	switch (state) {</div><div class='add'>+	case BR_STATE_DISABLED:</div><div class='add'>+		stp_state = QCA8K_PORT_LOOKUP_STATE_DISABLED;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_BLOCKING:</div><div class='add'>+		stp_state = QCA8K_PORT_LOOKUP_STATE_BLOCKING;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_LISTENING:</div><div class='add'>+		stp_state = QCA8K_PORT_LOOKUP_STATE_LISTENING;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_LEARNING:</div><div class='add'>+		stp_state = QCA8K_PORT_LOOKUP_STATE_LEARNING;</div><div class='add'>+		learning = dp-&gt;learning;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_FORWARDING:</div><div class='add'>+		learning = dp-&gt;learning;</div><div class='add'>+		fallthrough;</div><div class='add'>+	default:</div><div class='add'>+		stp_state = QCA8K_PORT_LOOKUP_STATE_FORWARD;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port),</div><div class='add'>+		  QCA8K_PORT_LOOKUP_STATE_MASK, stp_state);</div><div class='add'>+</div><div class='add'>+	qca8k_port_configure_learning(ds, port, learning);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int qca8k_update_port_member(struct qca8k_priv *priv, int port,</div><div class='add'>+				    const struct net_device *bridge_dev,</div><div class='add'>+				    bool join)</div><div class='add'>+{</div><div class='add'>+	bool isolated = !!(priv-&gt;port_isolated_map &amp; BIT(port)), other_isolated;</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(priv-&gt;ds, port), *other_dp;</div><div class='add'>+	u32 port_mask = BIT(dp-&gt;cpu_dp-&gt;index);</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; QCA8K_NUM_PORTS; i++) {</div><div class='add'>+		if (i == port)</div><div class='add'>+			continue;</div><div class='add'>+		if (dsa_is_cpu_port(priv-&gt;ds, i))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		other_dp = dsa_to_port(priv-&gt;ds, i);</div><div class='add'>+		if (!dsa_port_offloads_bridge_dev(other_dp, bridge_dev))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		other_isolated = !!(priv-&gt;port_isolated_map &amp; BIT(i));</div><div class='add'>+</div><div class='add'>+		/* Add/remove this port to/from the portvlan mask of the other</div><div class='add'>+		 * ports in the bridge</div><div class='add'>+		 */</div><div class='add'>+		if (join &amp;&amp; !(isolated &amp;&amp; other_isolated)) {</div><div class='add'>+			port_mask |= BIT(i);</div><div class='add'>+			ret = regmap_set_bits(priv-&gt;regmap,</div><div class='add'>+					      QCA8K_PORT_LOOKUP_CTRL(i),</div><div class='add'>+					      BIT(port));</div><div class='add'>+		} else {</div><div class='add'>+			ret = regmap_clear_bits(priv-&gt;regmap,</div><div class='add'>+						QCA8K_PORT_LOOKUP_CTRL(i),</div><div class='add'>+						BIT(port));</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Add/remove all other ports to/from this port's portvlan mask */</div><div class='add'>+	ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port),</div><div class='add'>+			QCA8K_PORT_LOOKUP_MEMBER, port_mask);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int qca8k_port_pre_bridge_flags(struct dsa_switch *ds, int port,</div><div class='add'>+				struct switchdev_brport_flags flags,</div><div class='add'>+				struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	if (flags.mask &amp; ~(BR_LEARNING | BR_ISOLATED))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int qca8k_port_bridge_flags(struct dsa_switch *ds, int port,</div><div class='add'>+			    struct switchdev_brport_flags flags,</div><div class='add'>+			    struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_priv *priv = ds-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (flags.mask &amp; BR_LEARNING) {</div><div class='add'>+		ret = qca8k_port_configure_learning(ds, port,</div><div class='add'>+						    flags.val &amp; BR_LEARNING);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flags.mask &amp; BR_ISOLATED) {</div><div class='add'>+		struct dsa_port *dp = dsa_to_port(ds, port);</div><div class='add'>+		struct net_device *bridge_dev = dsa_port_bridge_dev_get(dp);</div><div class='add'>+</div><div class='add'>+		if (flags.val &amp; BR_ISOLATED)</div><div class='add'>+			priv-&gt;port_isolated_map |= BIT(port);</div><div class='add'>+		else</div><div class='add'>+			priv-&gt;port_isolated_map &amp;= ~BIT(port);</div><div class='add'>+</div><div class='add'>+		ret = qca8k_update_port_member(priv, port, bridge_dev, true);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int qca8k_port_bridge_join(struct dsa_switch *ds, int port,</div><div class='add'>+			   struct dsa_bridge bridge,</div><div class='add'>+			   bool *tx_fwd_offload,</div><div class='add'>+			   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return qca8k_update_port_member(priv, port, bridge.dev, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void qca8k_port_bridge_leave(struct dsa_switch *ds, int port,</div><div class='add'>+			     struct dsa_bridge bridge)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_priv *priv = ds-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = qca8k_update_port_member(priv, port, bridge.dev, false);</div><div class='add'>+	if (err)</div><div class='add'>+		dev_err(priv-&gt;dev,</div><div class='add'>+			"Failed to update switch config for bridge leave: %d\n",</div><div class='add'>+			err);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void qca8k_port_fast_age(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+	qca8k_fdb_access(priv, QCA8K_FDB_FLUSH_PORT, port);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int qca8k_set_ageing_time(struct dsa_switch *ds, unsigned int msecs)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_priv *priv = ds-&gt;priv;</div><div class='add'>+	unsigned int secs = msecs / 1000;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	/* AGE_TIME reg is set in 7s step */</div><div class='add'>+	val = secs / 7;</div><div class='add'>+</div><div class='add'>+	/* Handle case with 0 as val to NOT disable</div><div class='add'>+	 * learning</div><div class='add'>+	 */</div><div class='add'>+	if (!val)</div><div class='add'>+		val = 1;</div><div class='add'>+</div><div class='add'>+	return regmap_update_bits(priv-&gt;regmap, QCA8K_REG_ATU_CTRL,</div><div class='add'>+				  QCA8K_ATU_AGE_TIME_MASK,</div><div class='add'>+				  QCA8K_ATU_AGE_TIME(val));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int qca8k_port_enable(struct dsa_switch *ds, int port,</div><div class='add'>+		      struct phy_device *phy)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	qca8k_port_set_status(priv, port, 1);</div><div class='add'>+	priv-&gt;port_enabled_map |= BIT(port);</div><div class='add'>+</div><div class='add'>+	if (dsa_is_user_port(ds, port))</div><div class='add'>+		phy_support_asym_pause(phy);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void qca8k_port_disable(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	qca8k_port_set_status(priv, port, 0);</div><div class='add'>+	priv-&gt;port_enabled_map &amp;= ~BIT(port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int qca8k_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_priv *priv = ds-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* We have only have a general MTU setting.</div><div class='add'>+	 * DSA always set the CPU port's MTU to the largest MTU of the user</div><div class='add'>+	 * ports.</div><div class='add'>+	 * Setting MTU just for the CPU port is sufficient to correctly set a</div><div class='add'>+	 * value for every port.</div><div class='add'>+	 */</div><div class='add'>+	if (!dsa_is_cpu_port(ds, port))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* To change the MAX_FRAME_SIZE the cpu ports must be off or</div><div class='add'>+	 * the switch panics.</div><div class='add'>+	 * Turn off both cpu ports before applying the new value to prevent</div><div class='add'>+	 * this.</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;port_enabled_map &amp; BIT(0))</div><div class='add'>+		qca8k_port_set_status(priv, 0, 0);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;port_enabled_map &amp; BIT(6))</div><div class='add'>+		qca8k_port_set_status(priv, 6, 0);</div><div class='add'>+</div><div class='add'>+	/* Include L2 header / FCS length */</div><div class='add'>+	ret = qca8k_write(priv, QCA8K_MAX_FRAME_SIZE, new_mtu +</div><div class='add'>+			  ETH_HLEN + ETH_FCS_LEN);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;port_enabled_map &amp; BIT(0))</div><div class='add'>+		qca8k_port_set_status(priv, 0, 1);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;port_enabled_map &amp; BIT(6))</div><div class='add'>+		qca8k_port_set_status(priv, 6, 1);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int qca8k_port_max_mtu(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	return QCA8K_MAX_MTU;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int qca8k_port_fdb_insert(struct qca8k_priv *priv, const u8 *addr,</div><div class='add'>+			  u16 port_mask, u16 vid)</div><div class='add'>+{</div><div class='add'>+	/* Set the vid to the port vlan id if no vid is set */</div><div class='add'>+	if (!vid)</div><div class='add'>+		vid = QCA8K_PORT_VID_DEF;</div><div class='add'>+</div><div class='add'>+	return qca8k_fdb_add(priv, addr, port_mask, vid,</div><div class='add'>+			     QCA8K_ATU_STATUS_STATIC);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int qca8k_port_fdb_add(struct dsa_switch *ds, int port,</div><div class='add'>+		       const unsigned char *addr, u16 vid,</div><div class='add'>+		       struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_priv *priv = ds-&gt;priv;</div><div class='add'>+	u16 port_mask = BIT(port);</div><div class='add'>+</div><div class='add'>+	return qca8k_port_fdb_insert(priv, addr, port_mask, vid);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int qca8k_port_fdb_del(struct dsa_switch *ds, int port,</div><div class='add'>+		       const unsigned char *addr, u16 vid,</div><div class='add'>+		       struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_priv *priv = ds-&gt;priv;</div><div class='add'>+	u16 port_mask = BIT(port);</div><div class='add'>+</div><div class='add'>+	if (!vid)</div><div class='add'>+		vid = QCA8K_PORT_VID_DEF;</div><div class='add'>+</div><div class='add'>+	return qca8k_fdb_del(priv, addr, port_mask, vid);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int qca8k_port_fdb_dump(struct dsa_switch *ds, int port,</div><div class='add'>+			dsa_fdb_dump_cb_t *cb, void *data)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_priv *priv = ds-&gt;priv;</div><div class='add'>+	struct qca8k_fdb _fdb = { 0 };</div><div class='add'>+	int cnt = QCA8K_NUM_FDB_RECORDS;</div><div class='add'>+	bool is_static;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+	while (cnt-- &amp;&amp; !qca8k_fdb_next(priv, &amp;_fdb, port)) {</div><div class='add'>+		if (!_fdb.aging)</div><div class='add'>+			break;</div><div class='add'>+		is_static = (_fdb.aging == QCA8K_ATU_STATUS_STATIC);</div><div class='add'>+		ret = cb(_fdb.mac, _fdb.vid, is_static, data);</div><div class='add'>+		if (ret)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_mutex);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int qca8k_port_mdb_add(struct dsa_switch *ds, int port,</div><div class='add'>+		       const struct switchdev_obj_port_mdb *mdb,</div><div class='add'>+		       struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_priv *priv = ds-&gt;priv;</div><div class='add'>+	const u8 *addr = mdb-&gt;addr;</div><div class='add'>+	u16 vid = mdb-&gt;vid;</div><div class='add'>+</div><div class='add'>+	if (!vid)</div><div class='add'>+		vid = QCA8K_PORT_VID_DEF;</div><div class='add'>+</div><div class='add'>+	return qca8k_fdb_search_and_insert(priv, BIT(port), addr, vid,</div><div class='add'>+					   QCA8K_ATU_STATUS_STATIC);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int qca8k_port_mdb_del(struct dsa_switch *ds, int port,</div><div class='add'>+		       const struct switchdev_obj_port_mdb *mdb,</div><div class='add'>+		       struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_priv *priv = ds-&gt;priv;</div><div class='add'>+	const u8 *addr = mdb-&gt;addr;</div><div class='add'>+	u16 vid = mdb-&gt;vid;</div><div class='add'>+</div><div class='add'>+	if (!vid)</div><div class='add'>+		vid = QCA8K_PORT_VID_DEF;</div><div class='add'>+</div><div class='add'>+	return qca8k_fdb_search_and_del(priv, BIT(port), addr, vid);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int qca8k_port_mirror_add(struct dsa_switch *ds, int port,</div><div class='add'>+			  struct dsa_mall_mirror_tc_entry *mirror,</div><div class='add'>+			  bool ingress, struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_priv *priv = ds-&gt;priv;</div><div class='add'>+	int monitor_port, ret;</div><div class='add'>+	u32 reg, val;</div><div class='add'>+</div><div class='add'>+	/* Check for existent entry */</div><div class='add'>+	if ((ingress ? priv-&gt;mirror_rx : priv-&gt;mirror_tx) &amp; BIT(port))</div><div class='add'>+		return -EEXIST;</div><div class='add'>+</div><div class='add'>+	ret = regmap_read(priv-&gt;regmap, QCA8K_REG_GLOBAL_FW_CTRL0, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* QCA83xx can have only one port set to mirror mode.</div><div class='add'>+	 * Check that the correct port is requested and return error otherwise.</div><div class='add'>+	 * When no mirror port is set, the values is set to 0xF</div><div class='add'>+	 */</div><div class='add'>+	monitor_port = FIELD_GET(QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM, val);</div><div class='add'>+	if (monitor_port != 0xF &amp;&amp; monitor_port != mirror-&gt;to_local_port)</div><div class='add'>+		return -EEXIST;</div><div class='add'>+</div><div class='add'>+	/* Set the monitor port */</div><div class='add'>+	val = FIELD_PREP(QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM,</div><div class='add'>+			 mirror-&gt;to_local_port);</div><div class='add'>+	ret = regmap_update_bits(priv-&gt;regmap, QCA8K_REG_GLOBAL_FW_CTRL0,</div><div class='add'>+				 QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (ingress) {</div><div class='add'>+		reg = QCA8K_PORT_LOOKUP_CTRL(port);</div><div class='add'>+		val = QCA8K_PORT_LOOKUP_ING_MIRROR_EN;</div><div class='add'>+	} else {</div><div class='add'>+		reg = QCA8K_REG_PORT_HOL_CTRL1(port);</div><div class='add'>+		val = QCA8K_PORT_HOL_CTRL1_EG_MIRROR_EN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = regmap_update_bits(priv-&gt;regmap, reg, val, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Track mirror port for tx and rx to decide when the</div><div class='add'>+	 * mirror port has to be disabled.</div><div class='add'>+	 */</div><div class='add'>+	if (ingress)</div><div class='add'>+		priv-&gt;mirror_rx |= BIT(port);</div><div class='add'>+	else</div><div class='add'>+		priv-&gt;mirror_tx |= BIT(port);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void qca8k_port_mirror_del(struct dsa_switch *ds, int port,</div><div class='add'>+			   struct dsa_mall_mirror_tc_entry *mirror)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_priv *priv = ds-&gt;priv;</div><div class='add'>+	u32 reg, val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (mirror-&gt;ingress) {</div><div class='add'>+		reg = QCA8K_PORT_LOOKUP_CTRL(port);</div><div class='add'>+		val = QCA8K_PORT_LOOKUP_ING_MIRROR_EN;</div><div class='add'>+	} else {</div><div class='add'>+		reg = QCA8K_REG_PORT_HOL_CTRL1(port);</div><div class='add'>+		val = QCA8K_PORT_HOL_CTRL1_EG_MIRROR_EN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = regmap_clear_bits(priv-&gt;regmap, reg, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	if (mirror-&gt;ingress)</div><div class='add'>+		priv-&gt;mirror_rx &amp;= ~BIT(port);</div><div class='add'>+	else</div><div class='add'>+		priv-&gt;mirror_tx &amp;= ~BIT(port);</div><div class='add'>+</div><div class='add'>+	/* No port set to send packet to mirror port. Disable mirror port */</div><div class='add'>+	if (!priv-&gt;mirror_rx &amp;&amp; !priv-&gt;mirror_tx) {</div><div class='add'>+		val = FIELD_PREP(QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM, 0xF);</div><div class='add'>+		ret = regmap_update_bits(priv-&gt;regmap, QCA8K_REG_GLOBAL_FW_CTRL0,</div><div class='add'>+					 QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM, val);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto err;</div><div class='add'>+	}</div><div class='add'>+err:</div><div class='add'>+	dev_err(priv-&gt;dev, "Failed to del mirror port from %d", port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int qca8k_port_vlan_filtering(struct dsa_switch *ds, int port,</div><div class='add'>+			      bool vlan_filtering,</div><div class='add'>+			      struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_priv *priv = ds-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (vlan_filtering) {</div><div class='add'>+		ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port),</div><div class='add'>+				QCA8K_PORT_LOOKUP_VLAN_MODE_MASK,</div><div class='add'>+				QCA8K_PORT_LOOKUP_VLAN_MODE_SECURE);</div><div class='add'>+	} else {</div><div class='add'>+		ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port),</div><div class='add'>+				QCA8K_PORT_LOOKUP_VLAN_MODE_MASK,</div><div class='add'>+				QCA8K_PORT_LOOKUP_VLAN_MODE_NONE);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int qca8k_port_vlan_add(struct dsa_switch *ds, int port,</div><div class='add'>+			const struct switchdev_obj_port_vlan *vlan,</div><div class='add'>+			struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	bool untagged = vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_UNTAGGED;</div><div class='add'>+	bool pvid = vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_PVID;</div><div class='add'>+	struct qca8k_priv *priv = ds-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = qca8k_vlan_add(priv, port, vlan-&gt;vid, untagged);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(priv-&gt;dev, "Failed to add VLAN to port %d (%d)", port, ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pvid) {</div><div class='add'>+		ret = qca8k_rmw(priv, QCA8K_EGRESS_VLAN(port),</div><div class='add'>+				QCA8K_EGREES_VLAN_PORT_MASK(port),</div><div class='add'>+				QCA8K_EGREES_VLAN_PORT(port, vlan-&gt;vid));</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		ret = qca8k_write(priv, QCA8K_REG_PORT_VLAN_CTRL0(port),</div><div class='add'>+				  QCA8K_PORT_VLAN_CVID(vlan-&gt;vid) |</div><div class='add'>+				  QCA8K_PORT_VLAN_SVID(vlan-&gt;vid));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int qca8k_port_vlan_del(struct dsa_switch *ds, int port,</div><div class='add'>+			const struct switchdev_obj_port_vlan *vlan)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_priv *priv = ds-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = qca8k_vlan_del(priv, port, vlan-&gt;vid);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(priv-&gt;dev, "Failed to delete VLAN from port %d (%d)", port, ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool qca8k_lag_can_offload(struct dsa_switch *ds,</div><div class='add'>+				  struct dsa_lag lag,</div><div class='add'>+				  struct netdev_lag_upper_info *info,</div><div class='add'>+				  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp;</div><div class='add'>+	int members = 0;</div><div class='add'>+</div><div class='add'>+	if (!lag.id)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	dsa_lag_foreach_port(dp, ds-&gt;dst, &amp;lag)</div><div class='add'>+		/* Includes the port joining the LAG */</div><div class='add'>+		members++;</div><div class='add'>+</div><div class='add'>+	if (members &gt; QCA8K_NUM_PORTS_FOR_LAG) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Cannot offload more than 4 LAG ports");</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (info-&gt;tx_type != NETDEV_LAG_TX_TYPE_HASH) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Can only offload LAG using hash TX type");</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (info-&gt;hash_type != NETDEV_LAG_HASH_L2 &amp;&amp;</div><div class='add'>+	    info-&gt;hash_type != NETDEV_LAG_HASH_L23) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Can only offload L2 or L2+L3 TX hash");</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int qca8k_lag_setup_hash(struct dsa_switch *ds,</div><div class='add'>+				struct dsa_lag lag,</div><div class='add'>+				struct netdev_lag_upper_info *info)</div><div class='add'>+{</div><div class='add'>+	struct net_device *lag_dev = lag.dev;</div><div class='add'>+	struct qca8k_priv *priv = ds-&gt;priv;</div><div class='add'>+	bool unique_lag = true;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	u32 hash = 0;</div><div class='add'>+</div><div class='add'>+	switch (info-&gt;hash_type) {</div><div class='add'>+	case NETDEV_LAG_HASH_L23:</div><div class='add'>+		hash |= QCA8K_TRUNK_HASH_SIP_EN;</div><div class='add'>+		hash |= QCA8K_TRUNK_HASH_DIP_EN;</div><div class='add'>+		fallthrough;</div><div class='add'>+	case NETDEV_LAG_HASH_L2:</div><div class='add'>+		hash |= QCA8K_TRUNK_HASH_SA_EN;</div><div class='add'>+		hash |= QCA8K_TRUNK_HASH_DA_EN;</div><div class='add'>+		break;</div><div class='add'>+	default: /* We should NEVER reach this */</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Check if we are the unique configured LAG */</div><div class='add'>+	dsa_lags_foreach_id(i, ds-&gt;dst)</div><div class='add'>+		if (i != lag.id &amp;&amp; dsa_lag_by_id(ds-&gt;dst, i)) {</div><div class='add'>+			unique_lag = false;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+	/* Hash Mode is global. Make sure the same Hash Mode</div><div class='add'>+	 * is set to all the 4 possible lag.</div><div class='add'>+	 * If we are the unique LAG we can set whatever hash</div><div class='add'>+	 * mode we want.</div><div class='add'>+	 * To change hash mode it's needed to remove all LAG</div><div class='add'>+	 * and change the mode with the latest.</div><div class='add'>+	 */</div><div class='add'>+	if (unique_lag) {</div><div class='add'>+		priv-&gt;lag_hash_mode = hash;</div><div class='add'>+	} else if (priv-&gt;lag_hash_mode != hash) {</div><div class='add'>+		netdev_err(lag_dev, "Error: Mismatched Hash Mode across different lag is not supported\n");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return regmap_update_bits(priv-&gt;regmap, QCA8K_TRUNK_HASH_EN_CTRL,</div><div class='add'>+				  QCA8K_TRUNK_HASH_MASK, hash);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int qca8k_lag_refresh_portmap(struct dsa_switch *ds, int port,</div><div class='add'>+				     struct dsa_lag lag, bool delete)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_priv *priv = ds-&gt;priv;</div><div class='add'>+	int ret, id, i;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	/* DSA LAG IDs are one-based, hardware is zero-based */</div><div class='add'>+	id = lag.id - 1;</div><div class='add'>+</div><div class='add'>+	/* Read current port member */</div><div class='add'>+	ret = regmap_read(priv-&gt;regmap, QCA8K_REG_GOL_TRUNK_CTRL0, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Shift val to the correct trunk */</div><div class='add'>+	val &gt;&gt;= QCA8K_REG_GOL_TRUNK_SHIFT(id);</div><div class='add'>+	val &amp;= QCA8K_REG_GOL_TRUNK_MEMBER_MASK;</div><div class='add'>+	if (delete)</div><div class='add'>+		val &amp;= ~BIT(port);</div><div class='add'>+	else</div><div class='add'>+		val |= BIT(port);</div><div class='add'>+</div><div class='add'>+	/* Update port member. With empty portmap disable trunk */</div><div class='add'>+	ret = regmap_update_bits(priv-&gt;regmap, QCA8K_REG_GOL_TRUNK_CTRL0,</div><div class='add'>+				 QCA8K_REG_GOL_TRUNK_MEMBER(id) |</div><div class='add'>+				 QCA8K_REG_GOL_TRUNK_EN(id),</div><div class='add'>+				 !val &lt;&lt; QCA8K_REG_GOL_TRUNK_SHIFT(id) |</div><div class='add'>+				 val &lt;&lt; QCA8K_REG_GOL_TRUNK_SHIFT(id));</div><div class='add'>+</div><div class='add'>+	/* Search empty member if adding or port on deleting */</div><div class='add'>+	for (i = 0; i &lt; QCA8K_NUM_PORTS_FOR_LAG; i++) {</div><div class='add'>+		ret = regmap_read(priv-&gt;regmap, QCA8K_REG_GOL_TRUNK_CTRL(id), &amp;val);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		val &gt;&gt;= QCA8K_REG_GOL_TRUNK_ID_MEM_ID_SHIFT(id, i);</div><div class='add'>+		val &amp;= QCA8K_REG_GOL_TRUNK_ID_MEM_ID_MASK;</div><div class='add'>+</div><div class='add'>+		if (delete) {</div><div class='add'>+			/* If port flagged to be disabled assume this member is</div><div class='add'>+			 * empty</div><div class='add'>+			 */</div><div class='add'>+			if (val != QCA8K_REG_GOL_TRUNK_ID_MEM_ID_EN_MASK)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			val &amp;= QCA8K_REG_GOL_TRUNK_ID_MEM_ID_PORT_MASK;</div><div class='add'>+			if (val != port)</div><div class='add'>+				continue;</div><div class='add'>+		} else {</div><div class='add'>+			/* If port flagged to be enabled assume this member is</div><div class='add'>+			 * already set</div><div class='add'>+			 */</div><div class='add'>+			if (val == QCA8K_REG_GOL_TRUNK_ID_MEM_ID_EN_MASK)</div><div class='add'>+				continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* We have found the member to add/remove */</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set port in the correct port mask or disable port if in delete mode */</div><div class='add'>+	return regmap_update_bits(priv-&gt;regmap, QCA8K_REG_GOL_TRUNK_CTRL(id),</div><div class='add'>+				  QCA8K_REG_GOL_TRUNK_ID_MEM_ID_EN(id, i) |</div><div class='add'>+				  QCA8K_REG_GOL_TRUNK_ID_MEM_ID_PORT(id, i),</div><div class='add'>+				  !delete &lt;&lt; QCA8K_REG_GOL_TRUNK_ID_MEM_ID_SHIFT(id, i) |</div><div class='add'>+				  port &lt;&lt; QCA8K_REG_GOL_TRUNK_ID_MEM_ID_SHIFT(id, i));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int qca8k_port_lag_join(struct dsa_switch *ds, int port, struct dsa_lag lag,</div><div class='add'>+			struct netdev_lag_upper_info *info,</div><div class='add'>+			struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!qca8k_lag_can_offload(ds, lag, info, extack))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	ret = qca8k_lag_setup_hash(ds, lag, info);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return qca8k_lag_refresh_portmap(ds, port, lag, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int qca8k_port_lag_leave(struct dsa_switch *ds, int port,</div><div class='add'>+			 struct dsa_lag lag)</div><div class='add'>+{</div><div class='add'>+	return qca8k_lag_refresh_portmap(ds, port, lag, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int qca8k_read_switch_id(struct qca8k_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+	u8 id;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;info)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	ret = qca8k_read(priv, QCA8K_REG_MASK_CTRL, &amp;val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	id = QCA8K_MASK_CTRL_DEVICE_ID(val);</div><div class='add'>+	if (id != priv-&gt;info-&gt;id) {</div><div class='add'>+		dev_err(priv-&gt;dev,</div><div class='add'>+			"Switch id detected %x but expected %x",</div><div class='add'>+			id, priv-&gt;info-&gt;id);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;switch_id = id;</div><div class='add'>+</div><div class='add'>+	/* Save revision to communicate to the internal PHY driver */</div><div class='add'>+	priv-&gt;switch_revision = QCA8K_MASK_CTRL_REV_ID(val);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/dsa/qca/qca8k-leds.c b/drivers/net/dsa/qca/qca8k-leds.c<br/>new file mode 100644<br/>index 000000000000..43ac68052baf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/qca/qca8k-leds.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/qca/qca8k-leds.c</a></div><div class='hunk'>@@ -0,0 +1,487 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#include &lt;linux/property.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+</div><div class='add'>+#include "qca8k.h"</div><div class='add'>+#include "qca8k_leds.h"</div><div class='add'>+</div><div class='add'>+static u32 qca8k_phy_to_port(int phy)</div><div class='add'>+{</div><div class='add'>+	/* Internal PHY 0 has port at index 1.</div><div class='add'>+	 * Internal PHY 1 has port at index 2.</div><div class='add'>+	 * Internal PHY 2 has port at index 3.</div><div class='add'>+	 * Internal PHY 3 has port at index 4.</div><div class='add'>+	 * Internal PHY 4 has port at index 5.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	return phy + 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_get_enable_led_reg(int port_num, int led_num, struct qca8k_led_pattern_en *reg_info)</div><div class='add'>+{</div><div class='add'>+	switch (port_num) {</div><div class='add'>+	case 0:</div><div class='add'>+		reg_info-&gt;reg = QCA8K_LED_CTRL_REG(led_num);</div><div class='add'>+		reg_info-&gt;shift = QCA8K_LED_PHY0123_CONTROL_RULE_SHIFT;</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+	case 2:</div><div class='add'>+	case 3:</div><div class='add'>+		/* Port 123 are controlled on a different reg */</div><div class='add'>+		reg_info-&gt;reg = QCA8K_LED_CTRL3_REG;</div><div class='add'>+		reg_info-&gt;shift = QCA8K_LED_PHY123_PATTERN_EN_SHIFT(port_num, led_num);</div><div class='add'>+		break;</div><div class='add'>+	case 4:</div><div class='add'>+		reg_info-&gt;reg = QCA8K_LED_CTRL_REG(led_num);</div><div class='add'>+		reg_info-&gt;shift = QCA8K_LED_PHY4_CONTROL_RULE_SHIFT;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_get_control_led_reg(int port_num, int led_num, struct qca8k_led_pattern_en *reg_info)</div><div class='add'>+{</div><div class='add'>+	reg_info-&gt;reg = QCA8K_LED_CTRL_REG(led_num);</div><div class='add'>+</div><div class='add'>+	/* 6 total control rule:</div><div class='add'>+	 * 3 control rules for phy0-3 that applies to all their leds</div><div class='add'>+	 * 3 control rules for phy4</div><div class='add'>+	 */</div><div class='add'>+	if (port_num == 4)</div><div class='add'>+		reg_info-&gt;shift = QCA8K_LED_PHY4_CONTROL_RULE_SHIFT;</div><div class='add'>+	else</div><div class='add'>+		reg_info-&gt;shift = QCA8K_LED_PHY0123_CONTROL_RULE_SHIFT;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_parse_netdev(unsigned long rules, u32 *offload_trigger)</div><div class='add'>+{</div><div class='add'>+	/* Parsing specific to netdev trigger */</div><div class='add'>+	if (test_bit(TRIGGER_NETDEV_TX, &amp;rules))</div><div class='add'>+		*offload_trigger |= QCA8K_LED_TX_BLINK_MASK;</div><div class='add'>+	if (test_bit(TRIGGER_NETDEV_RX, &amp;rules))</div><div class='add'>+		*offload_trigger |= QCA8K_LED_RX_BLINK_MASK;</div><div class='add'>+	if (test_bit(TRIGGER_NETDEV_LINK_10, &amp;rules))</div><div class='add'>+		*offload_trigger |= QCA8K_LED_LINK_10M_EN_MASK;</div><div class='add'>+	if (test_bit(TRIGGER_NETDEV_LINK_100, &amp;rules))</div><div class='add'>+		*offload_trigger |= QCA8K_LED_LINK_100M_EN_MASK;</div><div class='add'>+	if (test_bit(TRIGGER_NETDEV_LINK_1000, &amp;rules))</div><div class='add'>+		*offload_trigger |= QCA8K_LED_LINK_1000M_EN_MASK;</div><div class='add'>+	if (test_bit(TRIGGER_NETDEV_HALF_DUPLEX, &amp;rules))</div><div class='add'>+		*offload_trigger |= QCA8K_LED_HALF_DUPLEX_MASK;</div><div class='add'>+	if (test_bit(TRIGGER_NETDEV_FULL_DUPLEX, &amp;rules))</div><div class='add'>+		*offload_trigger |= QCA8K_LED_FULL_DUPLEX_MASK;</div><div class='add'>+</div><div class='add'>+	if (rules &amp;&amp; !*offload_trigger)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	/* Enable some default rule by default to the requested mode:</div><div class='add'>+	 * - Blink at 4Hz by default</div><div class='add'>+	 */</div><div class='add'>+	*offload_trigger |= QCA8K_LED_BLINK_4HZ;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_led_brightness_set(struct qca8k_led *led,</div><div class='add'>+			 enum led_brightness brightness)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_led_pattern_en reg_info;</div><div class='add'>+	struct qca8k_priv *priv = led-&gt;priv;</div><div class='add'>+	u32 mask, val;</div><div class='add'>+</div><div class='add'>+	qca8k_get_enable_led_reg(led-&gt;port_num, led-&gt;led_num, &amp;reg_info);</div><div class='add'>+</div><div class='add'>+	val = QCA8K_LED_ALWAYS_OFF;</div><div class='add'>+	if (brightness)</div><div class='add'>+		val = QCA8K_LED_ALWAYS_ON;</div><div class='add'>+</div><div class='add'>+	/* HW regs to control brightness is special and port 1-2-3</div><div class='add'>+	 * are placed in a different reg.</div><div class='add'>+	 *</div><div class='add'>+	 * To control port 0 brightness:</div><div class='add'>+	 * - the 2 bit (15, 14) of:</div><div class='add'>+	 *   - QCA8K_LED_CTRL0_REG for led1</div><div class='add'>+	 *   - QCA8K_LED_CTRL1_REG for led2</div><div class='add'>+	 *   - QCA8K_LED_CTRL2_REG for led3</div><div class='add'>+	 *</div><div class='add'>+	 * To control port 4:</div><div class='add'>+	 * - the 2 bit (31, 30) of:</div><div class='add'>+	 *   - QCA8K_LED_CTRL0_REG for led1</div><div class='add'>+	 *   - QCA8K_LED_CTRL1_REG for led2</div><div class='add'>+	 *   - QCA8K_LED_CTRL2_REG for led3</div><div class='add'>+	 *</div><div class='add'>+	 * To control port 1:</div><div class='add'>+	 *   - the 2 bit at (9, 8) of QCA8K_LED_CTRL3_REG are used for led1</div><div class='add'>+	 *   - the 2 bit at (11, 10) of QCA8K_LED_CTRL3_REG are used for led2</div><div class='add'>+	 *   - the 2 bit at (13, 12) of QCA8K_LED_CTRL3_REG are used for led3</div><div class='add'>+	 *</div><div class='add'>+	 * To control port 2:</div><div class='add'>+	 *   - the 2 bit at (15, 14) of QCA8K_LED_CTRL3_REG are used for led1</div><div class='add'>+	 *   - the 2 bit at (17, 16) of QCA8K_LED_CTRL3_REG are used for led2</div><div class='add'>+	 *   - the 2 bit at (19, 18) of QCA8K_LED_CTRL3_REG are used for led3</div><div class='add'>+	 *</div><div class='add'>+	 * To control port 3:</div><div class='add'>+	 *   - the 2 bit at (21, 20) of QCA8K_LED_CTRL3_REG are used for led1</div><div class='add'>+	 *   - the 2 bit at (23, 22) of QCA8K_LED_CTRL3_REG are used for led2</div><div class='add'>+	 *   - the 2 bit at (25, 24) of QCA8K_LED_CTRL3_REG are used for led3</div><div class='add'>+	 *</div><div class='add'>+	 * To abstract this and have less code, we use the port and led numm</div><div class='add'>+	 * to calculate the shift and the correct reg due to this problem of</div><div class='add'>+	 * not having a 1:1 map of LED with the regs.</div><div class='add'>+	 */</div><div class='add'>+	if (led-&gt;port_num == 0 || led-&gt;port_num == 4) {</div><div class='add'>+		mask = QCA8K_LED_PATTERN_EN_MASK;</div><div class='add'>+		val &lt;&lt;= QCA8K_LED_PATTERN_EN_SHIFT;</div><div class='add'>+	} else {</div><div class='add'>+		mask = QCA8K_LED_PHY123_PATTERN_EN_MASK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return regmap_update_bits(priv-&gt;regmap, reg_info.reg,</div><div class='add'>+				  mask &lt;&lt; reg_info.shift,</div><div class='add'>+				  val &lt;&lt; reg_info.shift);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_cled_brightness_set_blocking(struct led_classdev *ldev,</div><div class='add'>+				   enum led_brightness brightness)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_led *led = container_of(ldev, struct qca8k_led, cdev);</div><div class='add'>+</div><div class='add'>+	return qca8k_led_brightness_set(led, brightness);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum led_brightness</div><div class='add'>+qca8k_led_brightness_get(struct qca8k_led *led)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_led_pattern_en reg_info;</div><div class='add'>+	struct qca8k_priv *priv = led-&gt;priv;</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	qca8k_get_enable_led_reg(led-&gt;port_num, led-&gt;led_num, &amp;reg_info);</div><div class='add'>+</div><div class='add'>+	ret = regmap_read(priv-&gt;regmap, reg_info.reg, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	val &gt;&gt;= reg_info.shift;</div><div class='add'>+</div><div class='add'>+	if (led-&gt;port_num == 0 || led-&gt;port_num == 4) {</div><div class='add'>+		val &amp;= QCA8K_LED_PATTERN_EN_MASK;</div><div class='add'>+		val &gt;&gt;= QCA8K_LED_PATTERN_EN_SHIFT;</div><div class='add'>+	} else {</div><div class='add'>+		val &amp;= QCA8K_LED_PHY123_PATTERN_EN_MASK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Assume brightness ON only when the LED is set to always ON */</div><div class='add'>+	return val == QCA8K_LED_ALWAYS_ON;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_cled_blink_set(struct led_classdev *ldev,</div><div class='add'>+		     unsigned long *delay_on,</div><div class='add'>+		     unsigned long *delay_off)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_led *led = container_of(ldev, struct qca8k_led, cdev);</div><div class='add'>+	u32 mask, val = QCA8K_LED_ALWAYS_BLINK_4HZ;</div><div class='add'>+	struct qca8k_led_pattern_en reg_info;</div><div class='add'>+	struct qca8k_priv *priv = led-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (*delay_on == 0 &amp;&amp; *delay_off == 0) {</div><div class='add'>+		*delay_on = 125;</div><div class='add'>+		*delay_off = 125;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (*delay_on != 125 || *delay_off != 125) {</div><div class='add'>+		/* The hardware only supports blinking at 4Hz. Fall back</div><div class='add'>+		 * to software implementation in other cases.</div><div class='add'>+		 */</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	qca8k_get_enable_led_reg(led-&gt;port_num, led-&gt;led_num, &amp;reg_info);</div><div class='add'>+</div><div class='add'>+	if (led-&gt;port_num == 0 || led-&gt;port_num == 4) {</div><div class='add'>+		mask = QCA8K_LED_PATTERN_EN_MASK;</div><div class='add'>+		val &lt;&lt;= QCA8K_LED_PATTERN_EN_SHIFT;</div><div class='add'>+	} else {</div><div class='add'>+		mask = QCA8K_LED_PHY123_PATTERN_EN_MASK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	regmap_update_bits(priv-&gt;regmap, reg_info.reg, mask &lt;&lt; reg_info.shift,</div><div class='add'>+			   val &lt;&lt; reg_info.shift);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_cled_trigger_offload(struct led_classdev *ldev, bool enable)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_led *led = container_of(ldev, struct qca8k_led, cdev);</div><div class='add'>+</div><div class='add'>+	struct qca8k_led_pattern_en reg_info;</div><div class='add'>+	struct qca8k_priv *priv = led-&gt;priv;</div><div class='add'>+	u32 mask, val = QCA8K_LED_ALWAYS_OFF;</div><div class='add'>+</div><div class='add'>+	qca8k_get_enable_led_reg(led-&gt;port_num, led-&gt;led_num, &amp;reg_info);</div><div class='add'>+</div><div class='add'>+	if (enable)</div><div class='add'>+		val = QCA8K_LED_RULE_CONTROLLED;</div><div class='add'>+</div><div class='add'>+	if (led-&gt;port_num == 0 || led-&gt;port_num == 4) {</div><div class='add'>+		mask = QCA8K_LED_PATTERN_EN_MASK;</div><div class='add'>+		val &lt;&lt;= QCA8K_LED_PATTERN_EN_SHIFT;</div><div class='add'>+	} else {</div><div class='add'>+		mask = QCA8K_LED_PHY123_PATTERN_EN_MASK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return regmap_update_bits(priv-&gt;regmap, reg_info.reg, mask &lt;&lt; reg_info.shift,</div><div class='add'>+				  val &lt;&lt; reg_info.shift);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool</div><div class='add'>+qca8k_cled_hw_control_status(struct led_classdev *ldev)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_led *led = container_of(ldev, struct qca8k_led, cdev);</div><div class='add'>+</div><div class='add'>+	struct qca8k_led_pattern_en reg_info;</div><div class='add'>+	struct qca8k_priv *priv = led-&gt;priv;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	qca8k_get_enable_led_reg(led-&gt;port_num, led-&gt;led_num, &amp;reg_info);</div><div class='add'>+</div><div class='add'>+	regmap_read(priv-&gt;regmap, reg_info.reg, &amp;val);</div><div class='add'>+</div><div class='add'>+	val &gt;&gt;= reg_info.shift;</div><div class='add'>+</div><div class='add'>+	if (led-&gt;port_num == 0 || led-&gt;port_num == 4) {</div><div class='add'>+		val &amp;= QCA8K_LED_PATTERN_EN_MASK;</div><div class='add'>+		val &gt;&gt;= QCA8K_LED_PATTERN_EN_SHIFT;</div><div class='add'>+	} else {</div><div class='add'>+		val &amp;= QCA8K_LED_PHY123_PATTERN_EN_MASK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return val == QCA8K_LED_RULE_CONTROLLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_cled_hw_control_is_supported(struct led_classdev *ldev, unsigned long rules)</div><div class='add'>+{</div><div class='add'>+	u32 offload_trigger = 0;</div><div class='add'>+</div><div class='add'>+	return qca8k_parse_netdev(rules, &amp;offload_trigger);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_cled_hw_control_set(struct led_classdev *ldev, unsigned long rules)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_led *led = container_of(ldev, struct qca8k_led, cdev);</div><div class='add'>+	struct qca8k_led_pattern_en reg_info;</div><div class='add'>+	struct qca8k_priv *priv = led-&gt;priv;</div><div class='add'>+	u32 offload_trigger = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = qca8k_parse_netdev(rules, &amp;offload_trigger);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = qca8k_cled_trigger_offload(ldev, true);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	qca8k_get_control_led_reg(led-&gt;port_num, led-&gt;led_num, &amp;reg_info);</div><div class='add'>+</div><div class='add'>+	return regmap_update_bits(priv-&gt;regmap, reg_info.reg,</div><div class='add'>+				  QCA8K_LED_RULE_MASK &lt;&lt; reg_info.shift,</div><div class='add'>+				  offload_trigger &lt;&lt; reg_info.shift);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_cled_hw_control_get(struct led_classdev *ldev, unsigned long *rules)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_led *led = container_of(ldev, struct qca8k_led, cdev);</div><div class='add'>+	struct qca8k_led_pattern_en reg_info;</div><div class='add'>+	struct qca8k_priv *priv = led-&gt;priv;</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* With hw control not active return err */</div><div class='add'>+	if (!qca8k_cled_hw_control_status(ldev))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	qca8k_get_control_led_reg(led-&gt;port_num, led-&gt;led_num, &amp;reg_info);</div><div class='add'>+</div><div class='add'>+	ret = regmap_read(priv-&gt;regmap, reg_info.reg, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	val &gt;&gt;= reg_info.shift;</div><div class='add'>+	val &amp;= QCA8K_LED_RULE_MASK;</div><div class='add'>+</div><div class='add'>+	/* Parsing specific to netdev trigger */</div><div class='add'>+	if (val &amp; QCA8K_LED_TX_BLINK_MASK)</div><div class='add'>+		set_bit(TRIGGER_NETDEV_TX, rules);</div><div class='add'>+	if (val &amp; QCA8K_LED_RX_BLINK_MASK)</div><div class='add'>+		set_bit(TRIGGER_NETDEV_RX, rules);</div><div class='add'>+	if (val &amp; QCA8K_LED_LINK_10M_EN_MASK)</div><div class='add'>+		set_bit(TRIGGER_NETDEV_LINK_10, rules);</div><div class='add'>+	if (val &amp; QCA8K_LED_LINK_100M_EN_MASK)</div><div class='add'>+		set_bit(TRIGGER_NETDEV_LINK_100, rules);</div><div class='add'>+	if (val &amp; QCA8K_LED_LINK_1000M_EN_MASK)</div><div class='add'>+		set_bit(TRIGGER_NETDEV_LINK_1000, rules);</div><div class='add'>+	if (val &amp; QCA8K_LED_HALF_DUPLEX_MASK)</div><div class='add'>+		set_bit(TRIGGER_NETDEV_HALF_DUPLEX, rules);</div><div class='add'>+	if (val &amp; QCA8K_LED_FULL_DUPLEX_MASK)</div><div class='add'>+		set_bit(TRIGGER_NETDEV_FULL_DUPLEX, rules);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct device *qca8k_cled_hw_control_get_device(struct led_classdev *ldev)</div><div class='add'>+{</div><div class='add'>+	struct qca8k_led *led = container_of(ldev, struct qca8k_led, cdev);</div><div class='add'>+	struct qca8k_priv *priv = led-&gt;priv;</div><div class='add'>+	struct dsa_port *dp;</div><div class='add'>+</div><div class='add'>+	dp = dsa_to_port(priv-&gt;ds, qca8k_phy_to_port(led-&gt;port_num));</div><div class='add'>+	if (!dp)</div><div class='add'>+		return NULL;</div><div class='add'>+	if (dp-&gt;user)</div><div class='add'>+		return &amp;dp-&gt;user-&gt;dev;</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+qca8k_parse_port_leds(struct qca8k_priv *priv, struct fwnode_handle *port, int port_num)</div><div class='add'>+{</div><div class='add'>+	struct fwnode_handle *led = NULL, *leds = NULL;</div><div class='add'>+	struct led_init_data init_data = { };</div><div class='add'>+	enum led_default_state state;</div><div class='add'>+	struct qca8k_led *port_led;</div><div class='add'>+	int led_num, led_index;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	leds = fwnode_get_named_child_node(port, "leds");</div><div class='add'>+	if (!leds) {</div><div class='add'>+		dev_dbg(priv-&gt;dev, "No Leds node specified in device tree for port %d!\n",</div><div class='add'>+			port_num);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fwnode_for_each_child_node(leds, led) {</div><div class='add'>+		/* Reg represent the led number of the port.</div><div class='add'>+		 * Each port can have at most 3 leds attached</div><div class='add'>+		 * Commonly:</div><div class='add'>+		 * 1. is gigabit led</div><div class='add'>+		 * 2. is mbit led</div><div class='add'>+		 * 3. additional status led</div><div class='add'>+		 */</div><div class='add'>+		if (fwnode_property_read_u32(led, "reg", &amp;led_num))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (led_num &gt;= QCA8K_LED_PORT_COUNT) {</div><div class='add'>+			dev_warn(priv-&gt;dev, "Invalid LED reg %d defined for port %d",</div><div class='add'>+				 led_num, port_num);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		led_index = QCA8K_LED_PORT_INDEX(port_num, led_num);</div><div class='add'>+</div><div class='add'>+		port_led = &amp;priv-&gt;ports_led[led_index];</div><div class='add'>+		port_led-&gt;port_num = port_num;</div><div class='add'>+		port_led-&gt;led_num = led_num;</div><div class='add'>+		port_led-&gt;priv = priv;</div><div class='add'>+</div><div class='add'>+		state = led_init_default_state_get(led);</div><div class='add'>+		switch (state) {</div><div class='add'>+		case LEDS_DEFSTATE_ON:</div><div class='add'>+			port_led-&gt;cdev.brightness = 1;</div><div class='add'>+			qca8k_led_brightness_set(port_led, 1);</div><div class='add'>+			break;</div><div class='add'>+		case LEDS_DEFSTATE_KEEP:</div><div class='add'>+			port_led-&gt;cdev.brightness =</div><div class='add'>+					qca8k_led_brightness_get(port_led);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			port_led-&gt;cdev.brightness = 0;</div><div class='add'>+			qca8k_led_brightness_set(port_led, 0);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		port_led-&gt;cdev.max_brightness = 1;</div><div class='add'>+		port_led-&gt;cdev.brightness_set_blocking = qca8k_cled_brightness_set_blocking;</div><div class='add'>+		port_led-&gt;cdev.blink_set = qca8k_cled_blink_set;</div><div class='add'>+		port_led-&gt;cdev.hw_control_is_supported = qca8k_cled_hw_control_is_supported;</div><div class='add'>+		port_led-&gt;cdev.hw_control_set = qca8k_cled_hw_control_set;</div><div class='add'>+		port_led-&gt;cdev.hw_control_get = qca8k_cled_hw_control_get;</div><div class='add'>+		port_led-&gt;cdev.hw_control_get_device = qca8k_cled_hw_control_get_device;</div><div class='add'>+		port_led-&gt;cdev.hw_control_trigger = "netdev";</div><div class='add'>+		init_data.default_label = ":port";</div><div class='add'>+		init_data.fwnode = led;</div><div class='add'>+		init_data.devname_mandatory = true;</div><div class='add'>+		init_data.devicename = kasprintf(GFP_KERNEL, "%s:0%d",</div><div class='add'>+						 priv-&gt;internal_mdio_bus-&gt;id,</div><div class='add'>+						 port_num);</div><div class='add'>+		if (!init_data.devicename) {</div><div class='add'>+			fwnode_handle_put(led);</div><div class='add'>+			fwnode_handle_put(leds);</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = devm_led_classdev_register_ext(priv-&gt;dev, &amp;port_led-&gt;cdev, &amp;init_data);</div><div class='add'>+		if (ret)</div><div class='add'>+			dev_warn(priv-&gt;dev, "Failed to init LED %d for port %d", led_num, port_num);</div><div class='add'>+</div><div class='add'>+		kfree(init_data.devicename);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fwnode_handle_put(leds);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int</div><div class='add'>+qca8k_setup_led_ctrl(struct qca8k_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct fwnode_handle *ports, *port;</div><div class='add'>+	int port_num;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ports = device_get_named_child_node(priv-&gt;dev, "ports");</div><div class='add'>+	if (!ports) {</div><div class='add'>+		dev_info(priv-&gt;dev, "No ports node specified in device tree!");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fwnode_for_each_child_node(ports, port) {</div><div class='add'>+		if (fwnode_property_read_u32(port, "reg", &amp;port_num))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* Skip checking for CPU port 0 and CPU port 6 as not supported */</div><div class='add'>+		if (port_num == 0 || port_num == 6)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* Each port can have at most 3 different leds attached.</div><div class='add'>+		 * Switch port starts from 0 to 6, but port 0 and 6 are CPU</div><div class='add'>+		 * port. The port index needs to be decreased by one to identify</div><div class='add'>+		 * the correct port for LED setup.</div><div class='add'>+		 */</div><div class='add'>+		ret = qca8k_parse_port_leds(priv, port, qca8k_port_to_phy(port_num));</div><div class='add'>+		if (ret) {</div><div class='add'>+			fwnode_handle_put(port);</div><div class='add'>+			fwnode_handle_put(ports);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fwnode_handle_put(ports);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/dsa/qca/qca8k.h b/drivers/net/dsa/qca/qca8k.h<br/>new file mode 100644<br/>index 000000000000..d046679265fa<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/qca/qca8k.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/qca/qca8k.h</a></div><div class='hunk'>@@ -0,0 +1,595 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2009 Felix Fietkau &lt;nbd@nbd.name&gt;</div><div class='add'>+ * Copyright (C) 2011-2012 Gabor Juhos &lt;juhosg@openwrt.org&gt;</div><div class='add'>+ * Copyright (c) 2015, The Linux Foundation. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __QCA8K_H</div><div class='add'>+#define __QCA8K_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='add'>+#include &lt;linux/leds.h&gt;</div><div class='add'>+#include &lt;linux/dsa/tag_qca.h&gt;</div><div class='add'>+</div><div class='add'>+#define QCA8K_ETHERNET_MDIO_PRIORITY			7</div><div class='add'>+#define QCA8K_ETHERNET_PHY_PRIORITY			6</div><div class='add'>+#define QCA8K_ETHERNET_TIMEOUT				msecs_to_jiffies(5)</div><div class='add'>+</div><div class='add'>+#define QCA8K_NUM_PORTS					7</div><div class='add'>+#define QCA8K_NUM_CPU_PORTS				2</div><div class='add'>+#define QCA8K_MAX_MTU					9000</div><div class='add'>+#define QCA8K_NUM_LAGS					4</div><div class='add'>+#define QCA8K_NUM_PORTS_FOR_LAG				4</div><div class='add'>+</div><div class='add'>+#define PHY_ID_QCA8327					0x004dd034</div><div class='add'>+#define QCA8K_ID_QCA8327				0x12</div><div class='add'>+#define PHY_ID_QCA8337					0x004dd036</div><div class='add'>+#define QCA8K_ID_QCA8337				0x13</div><div class='add'>+</div><div class='add'>+#define QCA8K_QCA832X_MIB_COUNT				39</div><div class='add'>+#define QCA8K_QCA833X_MIB_COUNT				41</div><div class='add'>+</div><div class='add'>+#define QCA8K_BUSY_WAIT_TIMEOUT				2000</div><div class='add'>+</div><div class='add'>+#define QCA8K_NUM_FDB_RECORDS				2048</div><div class='add'>+</div><div class='add'>+#define QCA8K_PORT_VID_DEF				1</div><div class='add'>+</div><div class='add'>+/* Global control registers */</div><div class='add'>+#define QCA8K_REG_MASK_CTRL				0x000</div><div class='add'>+#define   QCA8K_MASK_CTRL_REV_ID_MASK			GENMASK(7, 0)</div><div class='add'>+#define   QCA8K_MASK_CTRL_REV_ID(x)			FIELD_GET(QCA8K_MASK_CTRL_REV_ID_MASK, x)</div><div class='add'>+#define   QCA8K_MASK_CTRL_DEVICE_ID_MASK		GENMASK(15, 8)</div><div class='add'>+#define   QCA8K_MASK_CTRL_DEVICE_ID(x)			FIELD_GET(QCA8K_MASK_CTRL_DEVICE_ID_MASK, x)</div><div class='add'>+#define QCA8K_REG_PORT0_PAD_CTRL			0x004</div><div class='add'>+#define   QCA8K_PORT0_PAD_MAC06_EXCHANGE_EN		BIT(31)</div><div class='add'>+#define   QCA8K_PORT0_PAD_SGMII_RXCLK_FALLING_EDGE	BIT(19)</div><div class='add'>+#define   QCA8K_PORT0_PAD_SGMII_TXCLK_FALLING_EDGE	BIT(18)</div><div class='add'>+#define QCA8K_REG_PORT5_PAD_CTRL			0x008</div><div class='add'>+#define QCA8K_REG_PORT6_PAD_CTRL			0x00c</div><div class='add'>+#define   QCA8K_PORT_PAD_RGMII_EN			BIT(26)</div><div class='add'>+#define   QCA8K_PORT_PAD_RGMII_TX_DELAY_MASK		GENMASK(23, 22)</div><div class='add'>+#define   QCA8K_PORT_PAD_RGMII_TX_DELAY(x)		FIELD_PREP(QCA8K_PORT_PAD_RGMII_TX_DELAY_MASK, x)</div><div class='add'>+#define   QCA8K_PORT_PAD_RGMII_RX_DELAY_MASK		GENMASK(21, 20)</div><div class='add'>+#define   QCA8K_PORT_PAD_RGMII_RX_DELAY(x)		FIELD_PREP(QCA8K_PORT_PAD_RGMII_RX_DELAY_MASK, x)</div><div class='add'>+#define	  QCA8K_PORT_PAD_RGMII_TX_DELAY_EN		BIT(25)</div><div class='add'>+#define   QCA8K_PORT_PAD_RGMII_RX_DELAY_EN		BIT(24)</div><div class='add'>+#define   QCA8K_PORT_PAD_SGMII_EN			BIT(7)</div><div class='add'>+#define QCA8K_REG_PWS					0x010</div><div class='add'>+#define   QCA8K_PWS_POWER_ON_SEL			BIT(31)</div><div class='add'>+/* This reg is only valid for QCA832x and toggle the package</div><div class='add'>+ * type from 176 pin (by default) to 148 pin used on QCA8327</div><div class='add'>+ */</div><div class='add'>+#define   QCA8327_PWS_PACKAGE148_EN			BIT(30)</div><div class='add'>+#define   QCA8K_PWS_LED_OPEN_EN_CSR			BIT(24)</div><div class='add'>+#define   QCA8K_PWS_SERDES_AEN_DIS			BIT(7)</div><div class='add'>+#define QCA8K_REG_MODULE_EN				0x030</div><div class='add'>+#define   QCA8K_MODULE_EN_MIB				BIT(0)</div><div class='add'>+#define QCA8K_REG_MIB					0x034</div><div class='add'>+#define   QCA8K_MIB_FUNC				GENMASK(26, 24)</div><div class='add'>+#define   QCA8K_MIB_CPU_KEEP				BIT(20)</div><div class='add'>+#define   QCA8K_MIB_BUSY				BIT(17)</div><div class='add'>+#define QCA8K_MDIO_MASTER_CTRL				0x3c</div><div class='add'>+#define   QCA8K_MDIO_MASTER_BUSY			BIT(31)</div><div class='add'>+#define   QCA8K_MDIO_MASTER_EN				BIT(30)</div><div class='add'>+#define   QCA8K_MDIO_MASTER_READ			BIT(27)</div><div class='add'>+#define   QCA8K_MDIO_MASTER_WRITE			0</div><div class='add'>+#define   QCA8K_MDIO_MASTER_SUP_PRE			BIT(26)</div><div class='add'>+#define   QCA8K_MDIO_MASTER_PHY_ADDR_MASK		GENMASK(25, 21)</div><div class='add'>+#define   QCA8K_MDIO_MASTER_PHY_ADDR(x)			FIELD_PREP(QCA8K_MDIO_MASTER_PHY_ADDR_MASK, x)</div><div class='add'>+#define   QCA8K_MDIO_MASTER_REG_ADDR_MASK		GENMASK(20, 16)</div><div class='add'>+#define   QCA8K_MDIO_MASTER_REG_ADDR(x)			FIELD_PREP(QCA8K_MDIO_MASTER_REG_ADDR_MASK, x)</div><div class='add'>+#define   QCA8K_MDIO_MASTER_DATA_MASK			GENMASK(15, 0)</div><div class='add'>+#define   QCA8K_MDIO_MASTER_DATA(x)			FIELD_PREP(QCA8K_MDIO_MASTER_DATA_MASK, x)</div><div class='add'>+#define   QCA8K_MDIO_MASTER_MAX_PORTS			5</div><div class='add'>+#define   QCA8K_MDIO_MASTER_MAX_REG			32</div><div class='add'>+</div><div class='add'>+/* LED control register */</div><div class='add'>+#define QCA8K_LED_PORT_COUNT				3</div><div class='add'>+#define QCA8K_LED_COUNT					((QCA8K_NUM_PORTS - QCA8K_NUM_CPU_PORTS) * QCA8K_LED_PORT_COUNT)</div><div class='add'>+#define QCA8K_LED_RULE_COUNT				6</div><div class='add'>+#define QCA8K_LED_RULE_MAX				11</div><div class='add'>+#define QCA8K_LED_PORT_INDEX(_phy, _led)		(((_phy) * QCA8K_LED_PORT_COUNT) + (_led))</div><div class='add'>+</div><div class='add'>+#define QCA8K_LED_PHY123_PATTERN_EN_SHIFT(_phy, _led)	((((_phy) - 1) * 6) + 8 + (2 * (_led)))</div><div class='add'>+#define QCA8K_LED_PHY123_PATTERN_EN_MASK		GENMASK(1, 0)</div><div class='add'>+</div><div class='add'>+#define QCA8K_LED_PHY0123_CONTROL_RULE_SHIFT		0</div><div class='add'>+#define QCA8K_LED_PHY4_CONTROL_RULE_SHIFT		16</div><div class='add'>+</div><div class='add'>+#define QCA8K_LED_CTRL_REG(_i)				(0x050 + (_i) * 4)</div><div class='add'>+#define QCA8K_LED_CTRL0_REG				0x50</div><div class='add'>+#define QCA8K_LED_CTRL1_REG				0x54</div><div class='add'>+#define QCA8K_LED_CTRL2_REG				0x58</div><div class='add'>+#define QCA8K_LED_CTRL3_REG				0x5C</div><div class='add'>+#define   QCA8K_LED_CTRL_SHIFT(_i)			(((_i) % 2) * 16)</div><div class='add'>+#define   QCA8K_LED_CTRL_MASK				GENMASK(15, 0)</div><div class='add'>+#define QCA8K_LED_RULE_MASK				GENMASK(13, 0)</div><div class='add'>+#define QCA8K_LED_BLINK_FREQ_MASK			GENMASK(1, 0)</div><div class='add'>+#define QCA8K_LED_BLINK_FREQ_SHITF			0</div><div class='add'>+#define   QCA8K_LED_BLINK_2HZ				0</div><div class='add'>+#define   QCA8K_LED_BLINK_4HZ				1</div><div class='add'>+#define   QCA8K_LED_BLINK_8HZ				2</div><div class='add'>+#define   QCA8K_LED_BLINK_AUTO				3</div><div class='add'>+#define QCA8K_LED_LINKUP_OVER_MASK			BIT(2)</div><div class='add'>+#define QCA8K_LED_TX_BLINK_MASK				BIT(4)</div><div class='add'>+#define QCA8K_LED_RX_BLINK_MASK				BIT(5)</div><div class='add'>+#define QCA8K_LED_COL_BLINK_MASK			BIT(7)</div><div class='add'>+#define QCA8K_LED_LINK_10M_EN_MASK			BIT(8)</div><div class='add'>+#define QCA8K_LED_LINK_100M_EN_MASK			BIT(9)</div><div class='add'>+#define QCA8K_LED_LINK_1000M_EN_MASK			BIT(10)</div><div class='add'>+#define QCA8K_LED_POWER_ON_LIGHT_MASK			BIT(11)</div><div class='add'>+#define QCA8K_LED_HALF_DUPLEX_MASK			BIT(12)</div><div class='add'>+#define QCA8K_LED_FULL_DUPLEX_MASK			BIT(13)</div><div class='add'>+#define QCA8K_LED_PATTERN_EN_MASK			GENMASK(15, 14)</div><div class='add'>+#define QCA8K_LED_PATTERN_EN_SHIFT			14</div><div class='add'>+#define   QCA8K_LED_ALWAYS_OFF				0</div><div class='add'>+#define   QCA8K_LED_ALWAYS_BLINK_4HZ			1</div><div class='add'>+#define   QCA8K_LED_ALWAYS_ON				2</div><div class='add'>+#define   QCA8K_LED_RULE_CONTROLLED			3</div><div class='add'>+</div><div class='add'>+#define QCA8K_GOL_MAC_ADDR0				0x60</div><div class='add'>+#define QCA8K_GOL_MAC_ADDR1				0x64</div><div class='add'>+#define QCA8K_MAX_FRAME_SIZE				0x78</div><div class='add'>+#define QCA8K_REG_PORT_STATUS(_i)			(0x07c + (_i) * 4)</div><div class='add'>+#define   QCA8K_PORT_STATUS_SPEED			GENMASK(1, 0)</div><div class='add'>+#define   QCA8K_PORT_STATUS_SPEED_10			0</div><div class='add'>+#define   QCA8K_PORT_STATUS_SPEED_100			0x1</div><div class='add'>+#define   QCA8K_PORT_STATUS_SPEED_1000			0x2</div><div class='add'>+#define   QCA8K_PORT_STATUS_TXMAC			BIT(2)</div><div class='add'>+#define   QCA8K_PORT_STATUS_RXMAC			BIT(3)</div><div class='add'>+#define   QCA8K_PORT_STATUS_TXFLOW			BIT(4)</div><div class='add'>+#define   QCA8K_PORT_STATUS_RXFLOW			BIT(5)</div><div class='add'>+#define   QCA8K_PORT_STATUS_DUPLEX			BIT(6)</div><div class='add'>+#define   QCA8K_PORT_STATUS_LINK_UP			BIT(8)</div><div class='add'>+#define   QCA8K_PORT_STATUS_LINK_AUTO			BIT(9)</div><div class='add'>+#define   QCA8K_PORT_STATUS_LINK_PAUSE			BIT(10)</div><div class='add'>+#define   QCA8K_PORT_STATUS_FLOW_AUTO			BIT(12)</div><div class='add'>+#define QCA8K_REG_PORT_HDR_CTRL(_i)			(0x9c + (_i * 4))</div><div class='add'>+#define   QCA8K_PORT_HDR_CTRL_RX_MASK			GENMASK(3, 2)</div><div class='add'>+#define   QCA8K_PORT_HDR_CTRL_TX_MASK			GENMASK(1, 0)</div><div class='add'>+#define   QCA8K_PORT_HDR_CTRL_ALL			2</div><div class='add'>+#define   QCA8K_PORT_HDR_CTRL_MGMT			1</div><div class='add'>+#define   QCA8K_PORT_HDR_CTRL_NONE			0</div><div class='add'>+#define QCA8K_REG_SGMII_CTRL				0x0e0</div><div class='add'>+#define   QCA8K_SGMII_EN_PLL				BIT(1)</div><div class='add'>+#define   QCA8K_SGMII_EN_RX				BIT(2)</div><div class='add'>+#define   QCA8K_SGMII_EN_TX				BIT(3)</div><div class='add'>+#define   QCA8K_SGMII_EN_SD				BIT(4)</div><div class='add'>+#define   QCA8K_SGMII_CLK125M_DELAY			BIT(7)</div><div class='add'>+#define   QCA8K_SGMII_MODE_CTRL_MASK			GENMASK(23, 22)</div><div class='add'>+#define   QCA8K_SGMII_MODE_CTRL(x)			FIELD_PREP(QCA8K_SGMII_MODE_CTRL_MASK, x)</div><div class='add'>+#define   QCA8K_SGMII_MODE_CTRL_BASEX			QCA8K_SGMII_MODE_CTRL(0x0)</div><div class='add'>+#define   QCA8K_SGMII_MODE_CTRL_PHY			QCA8K_SGMII_MODE_CTRL(0x1)</div><div class='add'>+#define   QCA8K_SGMII_MODE_CTRL_MAC			QCA8K_SGMII_MODE_CTRL(0x2)</div><div class='add'>+</div><div class='add'>+/* MAC_PWR_SEL registers */</div><div class='add'>+#define QCA8K_REG_MAC_PWR_SEL				0x0e4</div><div class='add'>+#define   QCA8K_MAC_PWR_RGMII1_1_8V			BIT(18)</div><div class='add'>+#define   QCA8K_MAC_PWR_RGMII0_1_8V			BIT(19)</div><div class='add'>+</div><div class='add'>+/* EEE control registers */</div><div class='add'>+#define QCA8K_REG_EEE_CTRL				0x100</div><div class='add'>+#define  QCA8K_REG_EEE_CTRL_LPI_EN(_i)			((_i + 1) * 2)</div><div class='add'>+</div><div class='add'>+/* TRUNK_HASH_EN registers */</div><div class='add'>+#define QCA8K_TRUNK_HASH_EN_CTRL			0x270</div><div class='add'>+#define   QCA8K_TRUNK_HASH_SIP_EN			BIT(3)</div><div class='add'>+#define   QCA8K_TRUNK_HASH_DIP_EN			BIT(2)</div><div class='add'>+#define   QCA8K_TRUNK_HASH_SA_EN			BIT(1)</div><div class='add'>+#define   QCA8K_TRUNK_HASH_DA_EN			BIT(0)</div><div class='add'>+#define   QCA8K_TRUNK_HASH_MASK				GENMASK(3, 0)</div><div class='add'>+</div><div class='add'>+/* ACL registers */</div><div class='add'>+#define QCA8K_REG_PORT_VLAN_CTRL0(_i)			(0x420 + (_i * 8))</div><div class='add'>+#define   QCA8K_PORT_VLAN_CVID_MASK			GENMASK(27, 16)</div><div class='add'>+#define   QCA8K_PORT_VLAN_CVID(x)			FIELD_PREP(QCA8K_PORT_VLAN_CVID_MASK, x)</div><div class='add'>+#define   QCA8K_PORT_VLAN_SVID_MASK			GENMASK(11, 0)</div><div class='add'>+#define   QCA8K_PORT_VLAN_SVID(x)			FIELD_PREP(QCA8K_PORT_VLAN_SVID_MASK, x)</div><div class='add'>+#define QCA8K_REG_PORT_VLAN_CTRL1(_i)			(0x424 + (_i * 8))</div><div class='add'>+#define QCA8K_REG_IPV4_PRI_BASE_ADDR			0x470</div><div class='add'>+#define QCA8K_REG_IPV4_PRI_ADDR_MASK			0x474</div><div class='add'>+</div><div class='add'>+/* Lookup registers */</div><div class='add'>+#define QCA8K_ATU_TABLE_SIZE				3 /* 12 bytes wide table / sizeof(u32) */</div><div class='add'>+</div><div class='add'>+#define QCA8K_REG_ATU_DATA0				0x600</div><div class='add'>+#define   QCA8K_ATU_ADDR2_MASK				GENMASK(31, 24)</div><div class='add'>+#define   QCA8K_ATU_ADDR3_MASK				GENMASK(23, 16)</div><div class='add'>+#define   QCA8K_ATU_ADDR4_MASK				GENMASK(15, 8)</div><div class='add'>+#define   QCA8K_ATU_ADDR5_MASK				GENMASK(7, 0)</div><div class='add'>+#define QCA8K_REG_ATU_DATA1				0x604</div><div class='add'>+#define   QCA8K_ATU_PORT_MASK				GENMASK(22, 16)</div><div class='add'>+#define   QCA8K_ATU_ADDR0_MASK				GENMASK(15, 8)</div><div class='add'>+#define   QCA8K_ATU_ADDR1_MASK				GENMASK(7, 0)</div><div class='add'>+#define QCA8K_REG_ATU_DATA2				0x608</div><div class='add'>+#define   QCA8K_ATU_VID_MASK				GENMASK(19, 8)</div><div class='add'>+#define   QCA8K_ATU_STATUS_MASK				GENMASK(3, 0)</div><div class='add'>+#define   QCA8K_ATU_STATUS_STATIC			0xf</div><div class='add'>+#define QCA8K_REG_ATU_FUNC				0x60c</div><div class='add'>+#define   QCA8K_ATU_FUNC_BUSY				BIT(31)</div><div class='add'>+#define   QCA8K_ATU_FUNC_PORT_EN			BIT(14)</div><div class='add'>+#define   QCA8K_ATU_FUNC_MULTI_EN			BIT(13)</div><div class='add'>+#define   QCA8K_ATU_FUNC_FULL				BIT(12)</div><div class='add'>+#define   QCA8K_ATU_FUNC_PORT_MASK			GENMASK(11, 8)</div><div class='add'>+#define QCA8K_REG_VTU_FUNC0				0x610</div><div class='add'>+#define   QCA8K_VTU_FUNC0_VALID				BIT(20)</div><div class='add'>+#define   QCA8K_VTU_FUNC0_IVL_EN			BIT(19)</div><div class='add'>+/*        QCA8K_VTU_FUNC0_EG_MODE_MASK			GENMASK(17, 4)</div><div class='add'>+ *          It does contain VLAN_MODE for each port [5:4] for port0,</div><div class='add'>+ *          [7:6] for port1 ... [17:16] for port6. Use virtual port</div><div class='add'>+ *          define to handle this.</div><div class='add'>+ */</div><div class='add'>+#define   QCA8K_VTU_FUNC0_EG_MODE_PORT_SHIFT(_i)	(4 + (_i) * 2)</div><div class='add'>+#define   QCA8K_VTU_FUNC0_EG_MODE_MASK			GENMASK(1, 0)</div><div class='add'>+#define   QCA8K_VTU_FUNC0_EG_MODE_PORT_MASK(_i)		(GENMASK(1, 0) &lt;&lt; QCA8K_VTU_FUNC0_EG_MODE_PORT_SHIFT(_i))</div><div class='add'>+#define   QCA8K_VTU_FUNC0_EG_MODE_UNMOD			FIELD_PREP(QCA8K_VTU_FUNC0_EG_MODE_MASK, 0x0)</div><div class='add'>+#define   QCA8K_VTU_FUNC0_EG_MODE_PORT_UNMOD(_i)	(QCA8K_VTU_FUNC0_EG_MODE_UNMOD &lt;&lt; QCA8K_VTU_FUNC0_EG_MODE_PORT_SHIFT(_i))</div><div class='add'>+#define   QCA8K_VTU_FUNC0_EG_MODE_UNTAG			FIELD_PREP(QCA8K_VTU_FUNC0_EG_MODE_MASK, 0x1)</div><div class='add'>+#define   QCA8K_VTU_FUNC0_EG_MODE_PORT_UNTAG(_i)	(QCA8K_VTU_FUNC0_EG_MODE_UNTAG &lt;&lt; QCA8K_VTU_FUNC0_EG_MODE_PORT_SHIFT(_i))</div><div class='add'>+#define   QCA8K_VTU_FUNC0_EG_MODE_TAG			FIELD_PREP(QCA8K_VTU_FUNC0_EG_MODE_MASK, 0x2)</div><div class='add'>+#define   QCA8K_VTU_FUNC0_EG_MODE_PORT_TAG(_i)		(QCA8K_VTU_FUNC0_EG_MODE_TAG &lt;&lt; QCA8K_VTU_FUNC0_EG_MODE_PORT_SHIFT(_i))</div><div class='add'>+#define   QCA8K_VTU_FUNC0_EG_MODE_NOT			FIELD_PREP(QCA8K_VTU_FUNC0_EG_MODE_MASK, 0x3)</div><div class='add'>+#define   QCA8K_VTU_FUNC0_EG_MODE_PORT_NOT(_i)		(QCA8K_VTU_FUNC0_EG_MODE_NOT &lt;&lt; QCA8K_VTU_FUNC0_EG_MODE_PORT_SHIFT(_i))</div><div class='add'>+#define QCA8K_REG_VTU_FUNC1				0x614</div><div class='add'>+#define   QCA8K_VTU_FUNC1_BUSY				BIT(31)</div><div class='add'>+#define   QCA8K_VTU_FUNC1_VID_MASK			GENMASK(27, 16)</div><div class='add'>+#define   QCA8K_VTU_FUNC1_FULL				BIT(4)</div><div class='add'>+#define QCA8K_REG_ATU_CTRL				0x618</div><div class='add'>+#define   QCA8K_ATU_AGE_TIME_MASK			GENMASK(15, 0)</div><div class='add'>+#define   QCA8K_ATU_AGE_TIME(x)				FIELD_PREP(QCA8K_ATU_AGE_TIME_MASK, (x))</div><div class='add'>+#define QCA8K_REG_GLOBAL_FW_CTRL0			0x620</div><div class='add'>+#define   QCA8K_GLOBAL_FW_CTRL0_CPU_PORT_EN		BIT(10)</div><div class='add'>+#define   QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM		GENMASK(7, 4)</div><div class='add'>+#define QCA8K_REG_GLOBAL_FW_CTRL1			0x624</div><div class='add'>+#define   QCA8K_GLOBAL_FW_CTRL1_IGMP_DP_MASK		GENMASK(30, 24)</div><div class='add'>+#define   QCA8K_GLOBAL_FW_CTRL1_BC_DP_MASK		GENMASK(22, 16)</div><div class='add'>+#define   QCA8K_GLOBAL_FW_CTRL1_MC_DP_MASK		GENMASK(14, 8)</div><div class='add'>+#define   QCA8K_GLOBAL_FW_CTRL1_UC_DP_MASK		GENMASK(6, 0)</div><div class='add'>+#define QCA8K_PORT_LOOKUP_CTRL(_i)			(0x660 + (_i) * 0xc)</div><div class='add'>+#define   QCA8K_PORT_LOOKUP_MEMBER			GENMASK(6, 0)</div><div class='add'>+#define   QCA8K_PORT_LOOKUP_VLAN_MODE_MASK		GENMASK(9, 8)</div><div class='add'>+#define   QCA8K_PORT_LOOKUP_VLAN_MODE(x)		FIELD_PREP(QCA8K_PORT_LOOKUP_VLAN_MODE_MASK, x)</div><div class='add'>+#define   QCA8K_PORT_LOOKUP_VLAN_MODE_NONE		QCA8K_PORT_LOOKUP_VLAN_MODE(0x0)</div><div class='add'>+#define   QCA8K_PORT_LOOKUP_VLAN_MODE_FALLBACK		QCA8K_PORT_LOOKUP_VLAN_MODE(0x1)</div><div class='add'>+#define   QCA8K_PORT_LOOKUP_VLAN_MODE_CHECK		QCA8K_PORT_LOOKUP_VLAN_MODE(0x2)</div><div class='add'>+#define   QCA8K_PORT_LOOKUP_VLAN_MODE_SECURE		QCA8K_PORT_LOOKUP_VLAN_MODE(0x3)</div><div class='add'>+#define   QCA8K_PORT_LOOKUP_STATE_MASK			GENMASK(18, 16)</div><div class='add'>+#define   QCA8K_PORT_LOOKUP_STATE(x)			FIELD_PREP(QCA8K_PORT_LOOKUP_STATE_MASK, x)</div><div class='add'>+#define   QCA8K_PORT_LOOKUP_STATE_DISABLED		QCA8K_PORT_LOOKUP_STATE(0x0)</div><div class='add'>+#define   QCA8K_PORT_LOOKUP_STATE_BLOCKING		QCA8K_PORT_LOOKUP_STATE(0x1)</div><div class='add'>+#define   QCA8K_PORT_LOOKUP_STATE_LISTENING		QCA8K_PORT_LOOKUP_STATE(0x2)</div><div class='add'>+#define   QCA8K_PORT_LOOKUP_STATE_LEARNING		QCA8K_PORT_LOOKUP_STATE(0x3)</div><div class='add'>+#define   QCA8K_PORT_LOOKUP_STATE_FORWARD		QCA8K_PORT_LOOKUP_STATE(0x4)</div><div class='add'>+#define   QCA8K_PORT_LOOKUP_LEARN			BIT(20)</div><div class='add'>+#define   QCA8K_PORT_LOOKUP_ING_MIRROR_EN		BIT(25)</div><div class='add'>+</div><div class='add'>+#define QCA8K_REG_GOL_TRUNK_CTRL0			0x700</div><div class='add'>+/* 4 max trunk first</div><div class='add'>+ * first 6 bit for member bitmap</div><div class='add'>+ * 7th bit is to enable trunk port</div><div class='add'>+ */</div><div class='add'>+#define QCA8K_REG_GOL_TRUNK_SHIFT(_i)			((_i) * 8)</div><div class='add'>+#define QCA8K_REG_GOL_TRUNK_EN_MASK			BIT(7)</div><div class='add'>+#define QCA8K_REG_GOL_TRUNK_EN(_i)			(QCA8K_REG_GOL_TRUNK_EN_MASK &lt;&lt; QCA8K_REG_GOL_TRUNK_SHIFT(_i))</div><div class='add'>+#define QCA8K_REG_GOL_TRUNK_MEMBER_MASK			GENMASK(6, 0)</div><div class='add'>+#define QCA8K_REG_GOL_TRUNK_MEMBER(_i)			(QCA8K_REG_GOL_TRUNK_MEMBER_MASK &lt;&lt; QCA8K_REG_GOL_TRUNK_SHIFT(_i))</div><div class='add'>+/* 0x704 for TRUNK 0-1 --- 0x708 for TRUNK 2-3 */</div><div class='add'>+#define QCA8K_REG_GOL_TRUNK_CTRL(_i)			(0x704 + (((_i) / 2) * 4))</div><div class='add'>+#define QCA8K_REG_GOL_TRUNK_ID_MEM_ID_MASK		GENMASK(3, 0)</div><div class='add'>+#define QCA8K_REG_GOL_TRUNK_ID_MEM_ID_EN_MASK		BIT(3)</div><div class='add'>+#define QCA8K_REG_GOL_TRUNK_ID_MEM_ID_PORT_MASK		GENMASK(2, 0)</div><div class='add'>+#define QCA8K_REG_GOL_TRUNK_ID_SHIFT(_i)		(((_i) / 2) * 16)</div><div class='add'>+#define QCA8K_REG_GOL_MEM_ID_SHIFT(_i)			((_i) * 4)</div><div class='add'>+/* Complex shift: FIRST shift for port THEN shift for trunk */</div><div class='add'>+#define QCA8K_REG_GOL_TRUNK_ID_MEM_ID_SHIFT(_i, _j)	(QCA8K_REG_GOL_MEM_ID_SHIFT(_j) + QCA8K_REG_GOL_TRUNK_ID_SHIFT(_i))</div><div class='add'>+#define QCA8K_REG_GOL_TRUNK_ID_MEM_ID_EN(_i, _j)	(QCA8K_REG_GOL_TRUNK_ID_MEM_ID_EN_MASK &lt;&lt; QCA8K_REG_GOL_TRUNK_ID_MEM_ID_SHIFT(_i, _j))</div><div class='add'>+#define QCA8K_REG_GOL_TRUNK_ID_MEM_ID_PORT(_i, _j)	(QCA8K_REG_GOL_TRUNK_ID_MEM_ID_PORT_MASK &lt;&lt; QCA8K_REG_GOL_TRUNK_ID_MEM_ID_SHIFT(_i, _j))</div><div class='add'>+</div><div class='add'>+#define QCA8K_REG_GLOBAL_FC_THRESH			0x800</div><div class='add'>+#define   QCA8K_GLOBAL_FC_GOL_XON_THRES_MASK		GENMASK(24, 16)</div><div class='add'>+#define   QCA8K_GLOBAL_FC_GOL_XON_THRES(x)		FIELD_PREP(QCA8K_GLOBAL_FC_GOL_XON_THRES_MASK, x)</div><div class='add'>+#define   QCA8K_GLOBAL_FC_GOL_XOFF_THRES_MASK		GENMASK(8, 0)</div><div class='add'>+#define   QCA8K_GLOBAL_FC_GOL_XOFF_THRES(x)		FIELD_PREP(QCA8K_GLOBAL_FC_GOL_XOFF_THRES_MASK, x)</div><div class='add'>+</div><div class='add'>+#define QCA8K_REG_PORT_HOL_CTRL0(_i)			(0x970 + (_i) * 0x8)</div><div class='add'>+#define   QCA8K_PORT_HOL_CTRL0_EG_PRI0_BUF_MASK		GENMASK(3, 0)</div><div class='add'>+#define   QCA8K_PORT_HOL_CTRL0_EG_PRI0(x)		FIELD_PREP(QCA8K_PORT_HOL_CTRL0_EG_PRI0_BUF_MASK, x)</div><div class='add'>+#define   QCA8K_PORT_HOL_CTRL0_EG_PRI1_BUF_MASK		GENMASK(7, 4)</div><div class='add'>+#define   QCA8K_PORT_HOL_CTRL0_EG_PRI1(x)		FIELD_PREP(QCA8K_PORT_HOL_CTRL0_EG_PRI1_BUF_MASK, x)</div><div class='add'>+#define   QCA8K_PORT_HOL_CTRL0_EG_PRI2_BUF_MASK		GENMASK(11, 8)</div><div class='add'>+#define   QCA8K_PORT_HOL_CTRL0_EG_PRI2(x)		FIELD_PREP(QCA8K_PORT_HOL_CTRL0_EG_PRI2_BUF_MASK, x)</div><div class='add'>+#define   QCA8K_PORT_HOL_CTRL0_EG_PRI3_BUF_MASK		GENMASK(15, 12)</div><div class='add'>+#define   QCA8K_PORT_HOL_CTRL0_EG_PRI3(x)		FIELD_PREP(QCA8K_PORT_HOL_CTRL0_EG_PRI3_BUF_MASK, x)</div><div class='add'>+#define   QCA8K_PORT_HOL_CTRL0_EG_PRI4_BUF_MASK		GENMASK(19, 16)</div><div class='add'>+#define   QCA8K_PORT_HOL_CTRL0_EG_PRI4(x)		FIELD_PREP(QCA8K_PORT_HOL_CTRL0_EG_PRI4_BUF_MASK, x)</div><div class='add'>+#define   QCA8K_PORT_HOL_CTRL0_EG_PRI5_BUF_MASK		GENMASK(23, 20)</div><div class='add'>+#define   QCA8K_PORT_HOL_CTRL0_EG_PRI5(x)		FIELD_PREP(QCA8K_PORT_HOL_CTRL0_EG_PRI5_BUF_MASK, x)</div><div class='add'>+#define   QCA8K_PORT_HOL_CTRL0_EG_PORT_BUF_MASK		GENMASK(29, 24)</div><div class='add'>+#define   QCA8K_PORT_HOL_CTRL0_EG_PORT(x)		FIELD_PREP(QCA8K_PORT_HOL_CTRL0_EG_PORT_BUF_MASK, x)</div><div class='add'>+</div><div class='add'>+#define QCA8K_REG_PORT_HOL_CTRL1(_i)			(0x974 + (_i) * 0x8)</div><div class='add'>+#define   QCA8K_PORT_HOL_CTRL1_ING_BUF_MASK		GENMASK(3, 0)</div><div class='add'>+#define   QCA8K_PORT_HOL_CTRL1_ING(x)			FIELD_PREP(QCA8K_PORT_HOL_CTRL1_ING_BUF_MASK, x)</div><div class='add'>+#define   QCA8K_PORT_HOL_CTRL1_EG_PRI_BUF_EN		BIT(6)</div><div class='add'>+#define   QCA8K_PORT_HOL_CTRL1_EG_PORT_BUF_EN		BIT(7)</div><div class='add'>+#define   QCA8K_PORT_HOL_CTRL1_WRED_EN			BIT(8)</div><div class='add'>+#define   QCA8K_PORT_HOL_CTRL1_EG_MIRROR_EN		BIT(16)</div><div class='add'>+</div><div class='add'>+/* Pkt edit registers */</div><div class='add'>+#define QCA8K_EGREES_VLAN_PORT_SHIFT(_i)		(16 * ((_i) % 2))</div><div class='add'>+#define QCA8K_EGREES_VLAN_PORT_MASK(_i)			(GENMASK(11, 0) &lt;&lt; QCA8K_EGREES_VLAN_PORT_SHIFT(_i))</div><div class='add'>+#define QCA8K_EGREES_VLAN_PORT(_i, x)			((x) &lt;&lt; QCA8K_EGREES_VLAN_PORT_SHIFT(_i))</div><div class='add'>+#define QCA8K_EGRESS_VLAN(x)				(0x0c70 + (4 * (x / 2)))</div><div class='add'>+</div><div class='add'>+/* L3 registers */</div><div class='add'>+#define QCA8K_HROUTER_CONTROL				0xe00</div><div class='add'>+#define   QCA8K_HROUTER_CONTROL_GLB_LOCKTIME_M		GENMASK(17, 16)</div><div class='add'>+#define   QCA8K_HROUTER_CONTROL_GLB_LOCKTIME_S		16</div><div class='add'>+#define   QCA8K_HROUTER_CONTROL_ARP_AGE_MODE		1</div><div class='add'>+#define QCA8K_HROUTER_PBASED_CONTROL1			0xe08</div><div class='add'>+#define QCA8K_HROUTER_PBASED_CONTROL2			0xe0c</div><div class='add'>+#define QCA8K_HNAT_CONTROL				0xe38</div><div class='add'>+</div><div class='add'>+/* MIB registers */</div><div class='add'>+#define QCA8K_PORT_MIB_COUNTER(_i)			(0x1000 + (_i) * 0x100)</div><div class='add'>+</div><div class='add'>+/* QCA specific MII registers */</div><div class='add'>+#define MII_ATH_MMD_ADDR				0x0d</div><div class='add'>+#define MII_ATH_MMD_DATA				0x0e</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	QCA8K_PORT_SPEED_10M = 0,</div><div class='add'>+	QCA8K_PORT_SPEED_100M = 1,</div><div class='add'>+	QCA8K_PORT_SPEED_1000M = 2,</div><div class='add'>+	QCA8K_PORT_SPEED_ERR = 3,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum qca8k_fdb_cmd {</div><div class='add'>+	QCA8K_FDB_FLUSH	= 1,</div><div class='add'>+	QCA8K_FDB_LOAD = 2,</div><div class='add'>+	QCA8K_FDB_PURGE = 3,</div><div class='add'>+	QCA8K_FDB_FLUSH_PORT = 5,</div><div class='add'>+	QCA8K_FDB_NEXT = 6,</div><div class='add'>+	QCA8K_FDB_SEARCH = 7,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum qca8k_vlan_cmd {</div><div class='add'>+	QCA8K_VLAN_FLUSH = 1,</div><div class='add'>+	QCA8K_VLAN_LOAD = 2,</div><div class='add'>+	QCA8K_VLAN_PURGE = 3,</div><div class='add'>+	QCA8K_VLAN_REMOVE_PORT = 4,</div><div class='add'>+	QCA8K_VLAN_NEXT = 5,</div><div class='add'>+	QCA8K_VLAN_READ = 6,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum qca8k_mid_cmd {</div><div class='add'>+	QCA8K_MIB_FLUSH = 1,</div><div class='add'>+	QCA8K_MIB_FLUSH_PORT = 2,</div><div class='add'>+	QCA8K_MIB_CAST = 3,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct qca8k_priv;</div><div class='add'>+</div><div class='add'>+struct qca8k_info_ops {</div><div class='add'>+	int (*autocast_mib)(struct dsa_switch *ds, int port, u64 *data);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct qca8k_match_data {</div><div class='add'>+	u8 id;</div><div class='add'>+	bool reduced_package;</div><div class='add'>+	u8 mib_count;</div><div class='add'>+	const struct qca8k_info_ops *ops;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	QCA8K_CPU_PORT0,</div><div class='add'>+	QCA8K_CPU_PORT6,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct qca8k_mgmt_eth_data {</div><div class='add'>+	struct completion rw_done;</div><div class='add'>+	struct mutex mutex; /* Enforce one mdio read/write at time */</div><div class='add'>+	bool ack;</div><div class='add'>+	u32 seq;</div><div class='add'>+	u32 data[4];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct qca8k_mib_eth_data {</div><div class='add'>+	struct completion rw_done;</div><div class='add'>+	struct mutex mutex; /* Process one command at time */</div><div class='add'>+	refcount_t port_parsed; /* Counter to track parsed port */</div><div class='add'>+	u8 req_port;</div><div class='add'>+	u64 *data; /* pointer to ethtool data */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct qca8k_ports_config {</div><div class='add'>+	bool sgmii_rx_clk_falling_edge;</div><div class='add'>+	bool sgmii_tx_clk_falling_edge;</div><div class='add'>+	bool sgmii_enable_pll;</div><div class='add'>+	u8 rgmii_rx_delay[QCA8K_NUM_CPU_PORTS]; /* 0: CPU port0, 1: CPU port6 */</div><div class='add'>+	u8 rgmii_tx_delay[QCA8K_NUM_CPU_PORTS]; /* 0: CPU port0, 1: CPU port6 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct qca8k_mdio_cache {</div><div class='add'>+/* The 32bit switch registers are accessed indirectly. To achieve this we need</div><div class='add'>+ * to set the page of the register. Track the last page that was set to reduce</div><div class='add'>+ * mdio writes</div><div class='add'>+ */</div><div class='add'>+	u16 page;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct qca8k_pcs {</div><div class='add'>+	struct phylink_pcs pcs;</div><div class='add'>+	struct qca8k_priv *priv;</div><div class='add'>+	int port;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct qca8k_led_pattern_en {</div><div class='add'>+	u32 reg;</div><div class='add'>+	u8 shift;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct qca8k_led {</div><div class='add'>+	u8 port_num;</div><div class='add'>+	u8 led_num;</div><div class='add'>+	u16 old_rule;</div><div class='add'>+	struct qca8k_priv *priv;</div><div class='add'>+	struct led_classdev cdev;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct qca8k_priv {</div><div class='add'>+	u8 switch_id;</div><div class='add'>+	u8 switch_revision;</div><div class='add'>+	u8 mirror_rx;</div><div class='add'>+	u8 mirror_tx;</div><div class='add'>+	u8 lag_hash_mode;</div><div class='add'>+	/* Each bit correspond to a port. This switch can support a max of 7 port.</div><div class='add'>+	 * Bit 1: port enabled. Bit 0: port disabled.</div><div class='add'>+	 */</div><div class='add'>+	u8 port_enabled_map;</div><div class='add'>+	u8 port_isolated_map;</div><div class='add'>+	struct qca8k_ports_config ports_config;</div><div class='add'>+	struct regmap *regmap;</div><div class='add'>+	struct mii_bus *bus;</div><div class='add'>+	struct mii_bus *internal_mdio_bus;</div><div class='add'>+	struct dsa_switch *ds;</div><div class='add'>+	struct mutex reg_mutex;</div><div class='add'>+	struct device *dev;</div><div class='add'>+	struct gpio_desc *reset_gpio;</div><div class='add'>+	struct net_device *mgmt_conduit; /* Track if mdio/mib Ethernet is available */</div><div class='add'>+	struct qca8k_mgmt_eth_data mgmt_eth_data;</div><div class='add'>+	struct qca8k_mib_eth_data mib_eth_data;</div><div class='add'>+	struct qca8k_mdio_cache mdio_cache;</div><div class='add'>+	struct qca8k_pcs pcs_port_0;</div><div class='add'>+	struct qca8k_pcs pcs_port_6;</div><div class='add'>+	const struct qca8k_match_data *info;</div><div class='add'>+	struct qca8k_led ports_led[QCA8K_LED_COUNT];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct qca8k_mib_desc {</div><div class='add'>+	unsigned int size;</div><div class='add'>+	unsigned int offset;</div><div class='add'>+	const char *name;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct qca8k_fdb {</div><div class='add'>+	u16 vid;</div><div class='add'>+	u8 port_mask;</div><div class='add'>+	u8 aging;</div><div class='add'>+	u8 mac[6];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline u32 qca8k_port_to_phy(int port)</div><div class='add'>+{</div><div class='add'>+	/* From Andrew Lunn:</div><div class='add'>+	 * Port 0 has no internal phy.</div><div class='add'>+	 * Port 1 has an internal PHY at MDIO address 0.</div><div class='add'>+	 * Port 2 has an internal PHY at MDIO address 1.</div><div class='add'>+	 * ...</div><div class='add'>+	 * Port 5 has an internal PHY at MDIO address 4.</div><div class='add'>+	 * Port 6 has no internal PHY.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	return port - 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Common setup function */</div><div class='add'>+extern const struct qca8k_mib_desc ar8327_mib[];</div><div class='add'>+extern const struct regmap_access_table qca8k_readable_table;</div><div class='add'>+int qca8k_mib_init(struct qca8k_priv *priv);</div><div class='add'>+void qca8k_port_set_status(struct qca8k_priv *priv, int port, int enable);</div><div class='add'>+int qca8k_read_switch_id(struct qca8k_priv *priv);</div><div class='add'>+</div><div class='add'>+/* Common read/write/rmw function */</div><div class='add'>+int qca8k_read(struct qca8k_priv *priv, u32 reg, u32 *val);</div><div class='add'>+int qca8k_write(struct qca8k_priv *priv, u32 reg, u32 val);</div><div class='add'>+int qca8k_rmw(struct qca8k_priv *priv, u32 reg, u32 mask, u32 write_val);</div><div class='add'>+</div><div class='add'>+/* Common ops function */</div><div class='add'>+void qca8k_fdb_flush(struct qca8k_priv *priv);</div><div class='add'>+</div><div class='add'>+/* Common ethtool stats function */</div><div class='add'>+void qca8k_get_strings(struct dsa_switch *ds, int port, u32 stringset, uint8_t *data);</div><div class='add'>+void qca8k_get_ethtool_stats(struct dsa_switch *ds, int port,</div><div class='add'>+			     uint64_t *data);</div><div class='add'>+int qca8k_get_sset_count(struct dsa_switch *ds, int port, int sset);</div><div class='add'>+</div><div class='add'>+/* Common eee function */</div><div class='add'>+int qca8k_set_mac_eee(struct dsa_switch *ds, int port, struct ethtool_keee *eee);</div><div class='add'>+</div><div class='add'>+/* Common bridge function */</div><div class='add'>+void qca8k_port_stp_state_set(struct dsa_switch *ds, int port, u8 state);</div><div class='add'>+int qca8k_port_pre_bridge_flags(struct dsa_switch *ds, int port,</div><div class='add'>+				struct switchdev_brport_flags flags,</div><div class='add'>+				struct netlink_ext_ack *extack);</div><div class='add'>+int qca8k_port_bridge_flags(struct dsa_switch *ds, int port,</div><div class='add'>+			    struct switchdev_brport_flags flags,</div><div class='add'>+			    struct netlink_ext_ack *extack);</div><div class='add'>+int qca8k_port_bridge_join(struct dsa_switch *ds, int port,</div><div class='add'>+			   struct dsa_bridge bridge,</div><div class='add'>+			   bool *tx_fwd_offload,</div><div class='add'>+			   struct netlink_ext_ack *extack);</div><div class='add'>+void qca8k_port_bridge_leave(struct dsa_switch *ds, int port,</div><div class='add'>+			     struct dsa_bridge bridge);</div><div class='add'>+</div><div class='add'>+/* Common port enable/disable function */</div><div class='add'>+int qca8k_port_enable(struct dsa_switch *ds, int port,</div><div class='add'>+		      struct phy_device *phy);</div><div class='add'>+void qca8k_port_disable(struct dsa_switch *ds, int port);</div><div class='add'>+</div><div class='add'>+/* Common MTU function */</div><div class='add'>+int qca8k_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu);</div><div class='add'>+int qca8k_port_max_mtu(struct dsa_switch *ds, int port);</div><div class='add'>+</div><div class='add'>+/* Common fast age function */</div><div class='add'>+void qca8k_port_fast_age(struct dsa_switch *ds, int port);</div><div class='add'>+int qca8k_set_ageing_time(struct dsa_switch *ds, unsigned int msecs);</div><div class='add'>+</div><div class='add'>+/* Common FDB function */</div><div class='add'>+int qca8k_port_fdb_insert(struct qca8k_priv *priv, const u8 *addr,</div><div class='add'>+			  u16 port_mask, u16 vid);</div><div class='add'>+int qca8k_port_fdb_add(struct dsa_switch *ds, int port,</div><div class='add'>+		       const unsigned char *addr, u16 vid,</div><div class='add'>+		       struct dsa_db db);</div><div class='add'>+int qca8k_port_fdb_del(struct dsa_switch *ds, int port,</div><div class='add'>+		       const unsigned char *addr, u16 vid,</div><div class='add'>+		       struct dsa_db db);</div><div class='add'>+int qca8k_port_fdb_dump(struct dsa_switch *ds, int port,</div><div class='add'>+			dsa_fdb_dump_cb_t *cb, void *data);</div><div class='add'>+</div><div class='add'>+/* Common MDB function */</div><div class='add'>+int qca8k_port_mdb_add(struct dsa_switch *ds, int port,</div><div class='add'>+		       const struct switchdev_obj_port_mdb *mdb,</div><div class='add'>+		       struct dsa_db db);</div><div class='add'>+int qca8k_port_mdb_del(struct dsa_switch *ds, int port,</div><div class='add'>+		       const struct switchdev_obj_port_mdb *mdb,</div><div class='add'>+		       struct dsa_db db);</div><div class='add'>+</div><div class='add'>+/* Common port mirror function */</div><div class='add'>+int qca8k_port_mirror_add(struct dsa_switch *ds, int port,</div><div class='add'>+			  struct dsa_mall_mirror_tc_entry *mirror,</div><div class='add'>+			  bool ingress, struct netlink_ext_ack *extack);</div><div class='add'>+void qca8k_port_mirror_del(struct dsa_switch *ds, int port,</div><div class='add'>+			   struct dsa_mall_mirror_tc_entry *mirror);</div><div class='add'>+</div><div class='add'>+/* Common port VLAN function */</div><div class='add'>+int qca8k_port_vlan_filtering(struct dsa_switch *ds, int port, bool vlan_filtering,</div><div class='add'>+			      struct netlink_ext_ack *extack);</div><div class='add'>+int qca8k_port_vlan_add(struct dsa_switch *ds, int port,</div><div class='add'>+			const struct switchdev_obj_port_vlan *vlan,</div><div class='add'>+			struct netlink_ext_ack *extack);</div><div class='add'>+int qca8k_port_vlan_del(struct dsa_switch *ds, int port,</div><div class='add'>+			const struct switchdev_obj_port_vlan *vlan);</div><div class='add'>+</div><div class='add'>+/* Common port LAG function */</div><div class='add'>+int qca8k_port_lag_join(struct dsa_switch *ds, int port, struct dsa_lag lag,</div><div class='add'>+			struct netdev_lag_upper_info *info,</div><div class='add'>+			struct netlink_ext_ack *extack);</div><div class='add'>+int qca8k_port_lag_leave(struct dsa_switch *ds, int port,</div><div class='add'>+			 struct dsa_lag lag);</div><div class='add'>+</div><div class='add'>+#endif /* __QCA8K_H */</div><div class='head'>diff --git a/drivers/net/dsa/qca/qca8k_leds.h b/drivers/net/dsa/qca/qca8k_leds.h<br/>new file mode 100644<br/>index 000000000000..ab367f05b173<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/qca/qca8k_leds.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/qca/qca8k_leds.h</a></div><div class='hunk'>@@ -0,0 +1,16 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+</div><div class='add'>+#ifndef __QCA8K_LEDS_H</div><div class='add'>+#define __QCA8K_LEDS_H</div><div class='add'>+</div><div class='add'>+/* Leds Support function */</div><div class='add'>+#ifdef CONFIG_NET_DSA_QCA8K_LEDS_SUPPORT</div><div class='add'>+int qca8k_setup_led_ctrl(struct qca8k_priv *priv);</div><div class='add'>+#else</div><div class='add'>+static inline int qca8k_setup_led_ctrl(struct qca8k_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif /* __QCA8K_LEDS_H */</div><div class='head'>diff --git a/drivers/net/dsa/realtek/Kconfig b/drivers/net/dsa/realtek/Kconfig<br/>new file mode 100644<br/>index 000000000000..d6eb6713e5f6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/realtek/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/realtek/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+menuconfig NET_DSA_REALTEK</div><div class='add'>+	tristate "Realtek Ethernet switch family support"</div><div class='add'>+	depends on NET_DSA</div><div class='add'>+	select FIXED_PHY</div><div class='add'>+	select IRQ_DOMAIN</div><div class='add'>+	select REALTEK_PHY</div><div class='add'>+	select REGMAP</div><div class='add'>+	help</div><div class='add'>+	  Select to enable support for Realtek Ethernet switch chips.</div><div class='add'>+</div><div class='add'>+	  Note that at least one interface driver must be enabled for the</div><div class='add'>+	  subdrivers to be loaded. Moreover, an interface driver cannot achieve</div><div class='add'>+	  anything without at least one subdriver enabled.</div><div class='add'>+</div><div class='add'>+if NET_DSA_REALTEK</div><div class='add'>+</div><div class='add'>+config NET_DSA_REALTEK_MDIO</div><div class='add'>+	bool "Realtek MDIO interface support"</div><div class='add'>+	depends on OF</div><div class='add'>+	help</div><div class='add'>+	  Select to enable support for registering switches configured</div><div class='add'>+	  through MDIO.</div><div class='add'>+</div><div class='add'>+config NET_DSA_REALTEK_SMI</div><div class='add'>+	bool "Realtek SMI interface support"</div><div class='add'>+	depends on OF</div><div class='add'>+	help</div><div class='add'>+	  Select to enable support for registering switches connected</div><div class='add'>+	  through SMI.</div><div class='add'>+</div><div class='add'>+config NET_DSA_REALTEK_RTL8365MB</div><div class='add'>+	tristate "Realtek RTL8365MB switch driver"</div><div class='add'>+	depends on NET_DSA_REALTEK_SMI || NET_DSA_REALTEK_MDIO</div><div class='add'>+	select NET_DSA_TAG_RTL8_4</div><div class='add'>+	help</div><div class='add'>+	  Select to enable support for Realtek RTL8365MB-VC and RTL8367S.</div><div class='add'>+</div><div class='add'>+config NET_DSA_REALTEK_RTL8366RB</div><div class='add'>+	tristate "Realtek RTL8366RB switch driver"</div><div class='add'>+	depends on NET_DSA_REALTEK_SMI || NET_DSA_REALTEK_MDIO</div><div class='add'>+	select NET_DSA_TAG_RTL4_A</div><div class='add'>+	help</div><div class='add'>+	  Select to enable support for Realtek RTL8366RB.</div><div class='add'>+</div><div class='add'>+config NET_DSA_REALTEK_RTL8366RB_LEDS</div><div class='add'>+	bool</div><div class='add'>+	depends on (LEDS_CLASS=y || LEDS_CLASS=NET_DSA_REALTEK_RTL8366RB)</div><div class='add'>+	depends on NET_DSA_REALTEK_RTL8366RB</div><div class='add'>+	default NET_DSA_REALTEK_RTL8366RB</div><div class='add'>+</div><div class='add'>+endif</div><div class='head'>diff --git a/drivers/net/dsa/realtek/Makefile b/drivers/net/dsa/realtek/Makefile<br/>new file mode 100644<br/>index 000000000000..17367bcba496<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/realtek/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/realtek/Makefile</a></div><div class='hunk'>@@ -0,0 +1,18 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+obj-$(CONFIG_NET_DSA_REALTEK)		+= realtek_dsa.o</div><div class='add'>+realtek_dsa-objs			:= rtl83xx.o</div><div class='add'>+</div><div class='add'>+ifdef CONFIG_NET_DSA_REALTEK_MDIO</div><div class='add'>+realtek_dsa-objs += realtek-mdio.o</div><div class='add'>+endif</div><div class='add'>+</div><div class='add'>+ifdef CONFIG_NET_DSA_REALTEK_SMI</div><div class='add'>+realtek_dsa-objs += realtek-smi.o</div><div class='add'>+endif</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_NET_DSA_REALTEK_RTL8366RB) += rtl8366.o</div><div class='add'>+rtl8366-objs 				:= rtl8366-core.o rtl8366rb.o</div><div class='add'>+ifdef CONFIG_NET_DSA_REALTEK_RTL8366RB_LEDS</div><div class='add'>+rtl8366-objs 				+= rtl8366rb-leds.o</div><div class='add'>+endif</div><div class='add'>+obj-$(CONFIG_NET_DSA_REALTEK_RTL8365MB) += rtl8365mb.o</div><div class='head'>diff --git a/drivers/net/dsa/realtek/realtek-mdio.c b/drivers/net/dsa/realtek/realtek-mdio.c<br/>new file mode 100644<br/>index 000000000000..a5e7dff96e91<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/realtek/realtek-mdio.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/realtek/realtek-mdio.c</a></div><div class='hunk'>@@ -0,0 +1,187 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+/* Realtek MDIO interface driver</div><div class='add'>+ *</div><div class='add'>+ * ASICs we intend to support with this driver:</div><div class='add'>+ *</div><div class='add'>+ * RTL8366   - The original version, apparently</div><div class='add'>+ * RTL8369   - Similar enough to have the same datsheet as RTL8366</div><div class='add'>+ * RTL8366RB - Probably reads out "RTL8366 revision B", has a quite</div><div class='add'>+ *             different register layout from the other two</div><div class='add'>+ * RTL8366S  - Is this "RTL8366 super"?</div><div class='add'>+ * RTL8367   - Has an OpenWRT driver as well</div><div class='add'>+ * RTL8368S  - Seems to be an alternative name for RTL8366RB</div><div class='add'>+ * RTL8370   - Also uses SMI</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2017 Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='add'>+ * Copyright (C) 2010 Antti Seppälä &lt;a.seppala@gmail.com&gt;</div><div class='add'>+ * Copyright (C) 2010 Roman Yeryomin &lt;roman@advem.lv&gt;</div><div class='add'>+ * Copyright (C) 2011 Colin Leitner &lt;colin.leitner@googlemail.com&gt;</div><div class='add'>+ * Copyright (C) 2009-2010 Gabor Juhos &lt;juhosg@openwrt.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/overflow.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+</div><div class='add'>+#include "realtek.h"</div><div class='add'>+#include "realtek-mdio.h"</div><div class='add'>+#include "rtl83xx.h"</div><div class='add'>+</div><div class='add'>+/* Read/write via mdiobus */</div><div class='add'>+#define REALTEK_MDIO_CTRL0_REG		31</div><div class='add'>+#define REALTEK_MDIO_START_REG		29</div><div class='add'>+#define REALTEK_MDIO_CTRL1_REG		21</div><div class='add'>+#define REALTEK_MDIO_ADDRESS_REG	23</div><div class='add'>+#define REALTEK_MDIO_DATA_WRITE_REG	24</div><div class='add'>+#define REALTEK_MDIO_DATA_READ_REG	25</div><div class='add'>+</div><div class='add'>+#define REALTEK_MDIO_START_OP		0xFFFF</div><div class='add'>+#define REALTEK_MDIO_ADDR_OP		0x000E</div><div class='add'>+#define REALTEK_MDIO_READ_OP		0x0001</div><div class='add'>+#define REALTEK_MDIO_WRITE_OP		0x0003</div><div class='add'>+</div><div class='add'>+static int realtek_mdio_write(void *ctx, u32 reg, u32 val)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = ctx;</div><div class='add'>+	struct mii_bus *bus = priv-&gt;bus;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;bus-&gt;mdio_lock);</div><div class='add'>+</div><div class='add'>+	ret = bus-&gt;write(bus, priv-&gt;mdio_addr, REALTEK_MDIO_CTRL0_REG, REALTEK_MDIO_ADDR_OP);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+</div><div class='add'>+	ret = bus-&gt;write(bus, priv-&gt;mdio_addr, REALTEK_MDIO_ADDRESS_REG, reg);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+</div><div class='add'>+	ret = bus-&gt;write(bus, priv-&gt;mdio_addr, REALTEK_MDIO_DATA_WRITE_REG, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+</div><div class='add'>+	ret = bus-&gt;write(bus, priv-&gt;mdio_addr, REALTEK_MDIO_CTRL1_REG, REALTEK_MDIO_WRITE_OP);</div><div class='add'>+</div><div class='add'>+out_unlock:</div><div class='add'>+	mutex_unlock(&amp;bus-&gt;mdio_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int realtek_mdio_read(void *ctx, u32 reg, u32 *val)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = ctx;</div><div class='add'>+	struct mii_bus *bus = priv-&gt;bus;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;bus-&gt;mdio_lock);</div><div class='add'>+</div><div class='add'>+	ret = bus-&gt;write(bus, priv-&gt;mdio_addr, REALTEK_MDIO_CTRL0_REG, REALTEK_MDIO_ADDR_OP);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+</div><div class='add'>+	ret = bus-&gt;write(bus, priv-&gt;mdio_addr, REALTEK_MDIO_ADDRESS_REG, reg);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+</div><div class='add'>+	ret = bus-&gt;write(bus, priv-&gt;mdio_addr, REALTEK_MDIO_CTRL1_REG, REALTEK_MDIO_READ_OP);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+</div><div class='add'>+	ret = bus-&gt;read(bus, priv-&gt;mdio_addr, REALTEK_MDIO_DATA_READ_REG);</div><div class='add'>+	if (ret &gt;= 0) {</div><div class='add'>+		*val = ret;</div><div class='add'>+		ret = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out_unlock:</div><div class='add'>+	mutex_unlock(&amp;bus-&gt;mdio_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct realtek_interface_info realtek_mdio_info = {</div><div class='add'>+	.reg_read = realtek_mdio_read,</div><div class='add'>+	.reg_write = realtek_mdio_write,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * realtek_mdio_probe() - Probe a platform device for an MDIO-connected switch</div><div class='add'>+ * @mdiodev: mdio_device to probe on.</div><div class='add'>+ *</div><div class='add'>+ * This function should be used as the .probe in an mdio_driver. After</div><div class='add'>+ * calling the common probe function for both interfaces, it initializes the</div><div class='add'>+ * values specific for MDIO-connected devices. Finally, it calls a common</div><div class='add'>+ * function to register the DSA switch.</div><div class='add'>+ *</div><div class='add'>+ * Context: Can sleep. Takes and releases priv-&gt;map_lock.</div><div class='add'>+ * Return: Returns 0 on success, a negative error on failure.</div><div class='add'>+ */</div><div class='add'>+int realtek_mdio_probe(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;mdiodev-&gt;dev;</div><div class='add'>+	struct realtek_priv *priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	priv = rtl83xx_probe(dev, &amp;realtek_mdio_info);</div><div class='add'>+	if (IS_ERR(priv))</div><div class='add'>+		return PTR_ERR(priv);</div><div class='add'>+</div><div class='add'>+	priv-&gt;bus = mdiodev-&gt;bus;</div><div class='add'>+	priv-&gt;mdio_addr = mdiodev-&gt;addr;</div><div class='add'>+	priv-&gt;write_reg_noack = realtek_mdio_write;</div><div class='add'>+</div><div class='add'>+	ret = rtl83xx_register_switch(priv);</div><div class='add'>+	if (ret) {</div><div class='add'>+		rtl83xx_remove(priv);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(realtek_mdio_probe, "REALTEK_DSA");</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * realtek_mdio_remove() - Remove the driver of an MDIO-connected switch</div><div class='add'>+ * @mdiodev: mdio_device to be removed.</div><div class='add'>+ *</div><div class='add'>+ * This function should be used as the .remove in an mdio_driver. First</div><div class='add'>+ * it unregisters the DSA switch and then it calls the common remove function.</div><div class='add'>+ *</div><div class='add'>+ * Context: Can sleep.</div><div class='add'>+ * Return: Nothing.</div><div class='add'>+ */</div><div class='add'>+void realtek_mdio_remove(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = dev_get_drvdata(&amp;mdiodev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	rtl83xx_unregister_switch(priv);</div><div class='add'>+</div><div class='add'>+	rtl83xx_remove(priv);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(realtek_mdio_remove, "REALTEK_DSA");</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * realtek_mdio_shutdown() - Shutdown the driver of a MDIO-connected switch</div><div class='add'>+ * @mdiodev: mdio_device shutting down.</div><div class='add'>+ *</div><div class='add'>+ * This function should be used as the .shutdown in a platform_driver. It calls</div><div class='add'>+ * the common shutdown function.</div><div class='add'>+ *</div><div class='add'>+ * Context: Can sleep.</div><div class='add'>+ * Return: Nothing.</div><div class='add'>+ */</div><div class='add'>+void realtek_mdio_shutdown(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = dev_get_drvdata(&amp;mdiodev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	rtl83xx_shutdown(priv);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(realtek_mdio_shutdown, "REALTEK_DSA");</div><div class='head'>diff --git a/drivers/net/dsa/realtek/realtek-mdio.h b/drivers/net/dsa/realtek/realtek-mdio.h<br/>new file mode 100644<br/>index 000000000000..ee70f6a5b8ff<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/realtek/realtek-mdio.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/realtek/realtek-mdio.h</a></div><div class='hunk'>@@ -0,0 +1,48 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0+ */</div><div class='add'>+</div><div class='add'>+#ifndef _REALTEK_MDIO_H</div><div class='add'>+#define _REALTEK_MDIO_H</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_NET_DSA_REALTEK_MDIO)</div><div class='add'>+</div><div class='add'>+static inline int realtek_mdio_driver_register(struct mdio_driver *drv)</div><div class='add'>+{</div><div class='add'>+	return mdio_driver_register(drv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void realtek_mdio_driver_unregister(struct mdio_driver *drv)</div><div class='add'>+{</div><div class='add'>+	mdio_driver_unregister(drv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int realtek_mdio_probe(struct mdio_device *mdiodev);</div><div class='add'>+void realtek_mdio_remove(struct mdio_device *mdiodev);</div><div class='add'>+void realtek_mdio_shutdown(struct mdio_device *mdiodev);</div><div class='add'>+</div><div class='add'>+#else /* IS_ENABLED(CONFIG_NET_DSA_REALTEK_MDIO) */</div><div class='add'>+</div><div class='add'>+static inline int realtek_mdio_driver_register(struct mdio_driver *drv)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void realtek_mdio_driver_unregister(struct mdio_driver *drv)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int realtek_mdio_probe(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	return -ENOENT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void realtek_mdio_remove(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void realtek_mdio_shutdown(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* IS_ENABLED(CONFIG_NET_DSA_REALTEK_MDIO) */</div><div class='add'>+</div><div class='add'>+#endif /* _REALTEK_MDIO_H */</div><div class='head'>diff --git a/drivers/net/dsa/realtek/realtek-smi.c b/drivers/net/dsa/realtek/realtek-smi.c<br/>new file mode 100644<br/>index 000000000000..972e22218418<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/realtek/realtek-smi.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/realtek/realtek-smi.c</a></div><div class='hunk'>@@ -0,0 +1,408 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+/* Realtek Simple Management Interface (SMI) driver</div><div class='add'>+ * It can be discussed how "simple" this interface is.</div><div class='add'>+ *</div><div class='add'>+ * The SMI protocol piggy-backs the MDIO MDC and MDIO signals levels</div><div class='add'>+ * but the protocol is not MDIO at all. Instead it is a Realtek</div><div class='add'>+ * pecularity that need to bit-bang the lines in a special way to</div><div class='add'>+ * communicate with the switch.</div><div class='add'>+ *</div><div class='add'>+ * ASICs we intend to support with this driver:</div><div class='add'>+ *</div><div class='add'>+ * RTL8366   - The original version, apparently</div><div class='add'>+ * RTL8369   - Similar enough to have the same datsheet as RTL8366</div><div class='add'>+ * RTL8366RB - Probably reads out "RTL8366 revision B", has a quite</div><div class='add'>+ *             different register layout from the other two</div><div class='add'>+ * RTL8366S  - Is this "RTL8366 super"?</div><div class='add'>+ * RTL8367   - Has an OpenWRT driver as well</div><div class='add'>+ * RTL8368S  - Seems to be an alternative name for RTL8366RB</div><div class='add'>+ * RTL8370   - Also uses SMI</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2017 Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='add'>+ * Copyright (C) 2010 Antti Seppälä &lt;a.seppala@gmail.com&gt;</div><div class='add'>+ * Copyright (C) 2010 Roman Yeryomin &lt;roman@advem.lv&gt;</div><div class='add'>+ * Copyright (C) 2011 Colin Leitner &lt;colin.leitner@googlemail.com&gt;</div><div class='add'>+ * Copyright (C) 2009-2010 Gabor Juhos &lt;juhosg@openwrt.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/skbuff.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/gpio/consumer.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;linux/bitops.h&gt;</div><div class='add'>+#include &lt;linux/if_bridge.h&gt;</div><div class='add'>+</div><div class='add'>+#include "realtek.h"</div><div class='add'>+#include "realtek-smi.h"</div><div class='add'>+#include "rtl83xx.h"</div><div class='add'>+</div><div class='add'>+#define REALTEK_SMI_ACK_RETRY_COUNT		5</div><div class='add'>+</div><div class='add'>+static inline void realtek_smi_clk_delay(struct realtek_priv *priv)</div><div class='add'>+{</div><div class='add'>+	ndelay(priv-&gt;variant-&gt;clk_delay);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void realtek_smi_start(struct realtek_priv *priv)</div><div class='add'>+{</div><div class='add'>+	/* Set GPIO pins to output mode, with initial state:</div><div class='add'>+	 * SCK = 0, SDA = 1</div><div class='add'>+	 */</div><div class='add'>+	gpiod_direction_output(priv-&gt;mdc, 0);</div><div class='add'>+	gpiod_direction_output(priv-&gt;mdio, 1);</div><div class='add'>+	realtek_smi_clk_delay(priv);</div><div class='add'>+</div><div class='add'>+	/* CLK 1: 0 -&gt; 1, 1 -&gt; 0 */</div><div class='add'>+	gpiod_set_value(priv-&gt;mdc, 1);</div><div class='add'>+	realtek_smi_clk_delay(priv);</div><div class='add'>+	gpiod_set_value(priv-&gt;mdc, 0);</div><div class='add'>+	realtek_smi_clk_delay(priv);</div><div class='add'>+</div><div class='add'>+	/* CLK 2: */</div><div class='add'>+	gpiod_set_value(priv-&gt;mdc, 1);</div><div class='add'>+	realtek_smi_clk_delay(priv);</div><div class='add'>+	gpiod_set_value(priv-&gt;mdio, 0);</div><div class='add'>+	realtek_smi_clk_delay(priv);</div><div class='add'>+	gpiod_set_value(priv-&gt;mdc, 0);</div><div class='add'>+	realtek_smi_clk_delay(priv);</div><div class='add'>+	gpiod_set_value(priv-&gt;mdio, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void realtek_smi_stop(struct realtek_priv *priv)</div><div class='add'>+{</div><div class='add'>+	realtek_smi_clk_delay(priv);</div><div class='add'>+	gpiod_set_value(priv-&gt;mdio, 0);</div><div class='add'>+	gpiod_set_value(priv-&gt;mdc, 1);</div><div class='add'>+	realtek_smi_clk_delay(priv);</div><div class='add'>+	gpiod_set_value(priv-&gt;mdio, 1);</div><div class='add'>+	realtek_smi_clk_delay(priv);</div><div class='add'>+	gpiod_set_value(priv-&gt;mdc, 1);</div><div class='add'>+	realtek_smi_clk_delay(priv);</div><div class='add'>+	gpiod_set_value(priv-&gt;mdc, 0);</div><div class='add'>+	realtek_smi_clk_delay(priv);</div><div class='add'>+	gpiod_set_value(priv-&gt;mdc, 1);</div><div class='add'>+</div><div class='add'>+	/* Add a click */</div><div class='add'>+	realtek_smi_clk_delay(priv);</div><div class='add'>+	gpiod_set_value(priv-&gt;mdc, 0);</div><div class='add'>+	realtek_smi_clk_delay(priv);</div><div class='add'>+	gpiod_set_value(priv-&gt;mdc, 1);</div><div class='add'>+</div><div class='add'>+	/* Set GPIO pins to input mode */</div><div class='add'>+	gpiod_direction_input(priv-&gt;mdio);</div><div class='add'>+	gpiod_direction_input(priv-&gt;mdc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void realtek_smi_write_bits(struct realtek_priv *priv, u32 data, u32 len)</div><div class='add'>+{</div><div class='add'>+	for (; len &gt; 0; len--) {</div><div class='add'>+		realtek_smi_clk_delay(priv);</div><div class='add'>+</div><div class='add'>+		/* Prepare data */</div><div class='add'>+		gpiod_set_value(priv-&gt;mdio, !!(data &amp; (1 &lt;&lt; (len - 1))));</div><div class='add'>+		realtek_smi_clk_delay(priv);</div><div class='add'>+</div><div class='add'>+		/* Clocking */</div><div class='add'>+		gpiod_set_value(priv-&gt;mdc, 1);</div><div class='add'>+		realtek_smi_clk_delay(priv);</div><div class='add'>+		gpiod_set_value(priv-&gt;mdc, 0);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void realtek_smi_read_bits(struct realtek_priv *priv, u32 len, u32 *data)</div><div class='add'>+{</div><div class='add'>+	gpiod_direction_input(priv-&gt;mdio);</div><div class='add'>+</div><div class='add'>+	for (*data = 0; len &gt; 0; len--) {</div><div class='add'>+		u32 u;</div><div class='add'>+</div><div class='add'>+		realtek_smi_clk_delay(priv);</div><div class='add'>+</div><div class='add'>+		/* Clocking */</div><div class='add'>+		gpiod_set_value(priv-&gt;mdc, 1);</div><div class='add'>+		realtek_smi_clk_delay(priv);</div><div class='add'>+		u = !!gpiod_get_value(priv-&gt;mdio);</div><div class='add'>+		gpiod_set_value(priv-&gt;mdc, 0);</div><div class='add'>+</div><div class='add'>+		*data |= (u &lt;&lt; (len - 1));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	gpiod_direction_output(priv-&gt;mdio, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int realtek_smi_wait_for_ack(struct realtek_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int retry_cnt;</div><div class='add'>+</div><div class='add'>+	retry_cnt = 0;</div><div class='add'>+	do {</div><div class='add'>+		u32 ack;</div><div class='add'>+</div><div class='add'>+		realtek_smi_read_bits(priv, 1, &amp;ack);</div><div class='add'>+		if (ack == 0)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if (++retry_cnt &gt; REALTEK_SMI_ACK_RETRY_COUNT) {</div><div class='add'>+			dev_err(priv-&gt;dev, "ACK timeout\n");</div><div class='add'>+			return -ETIMEDOUT;</div><div class='add'>+		}</div><div class='add'>+	} while (1);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int realtek_smi_write_byte(struct realtek_priv *priv, u8 data)</div><div class='add'>+{</div><div class='add'>+	realtek_smi_write_bits(priv, data, 8);</div><div class='add'>+	return realtek_smi_wait_for_ack(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int realtek_smi_write_byte_noack(struct realtek_priv *priv, u8 data)</div><div class='add'>+{</div><div class='add'>+	realtek_smi_write_bits(priv, data, 8);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int realtek_smi_read_byte0(struct realtek_priv *priv, u8 *data)</div><div class='add'>+{</div><div class='add'>+	u32 t;</div><div class='add'>+</div><div class='add'>+	/* Read data */</div><div class='add'>+	realtek_smi_read_bits(priv, 8, &amp;t);</div><div class='add'>+	*data = (t &amp; 0xff);</div><div class='add'>+</div><div class='add'>+	/* Send an ACK */</div><div class='add'>+	realtek_smi_write_bits(priv, 0x00, 1);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int realtek_smi_read_byte1(struct realtek_priv *priv, u8 *data)</div><div class='add'>+{</div><div class='add'>+	u32 t;</div><div class='add'>+</div><div class='add'>+	/* Read data */</div><div class='add'>+	realtek_smi_read_bits(priv, 8, &amp;t);</div><div class='add'>+	*data = (t &amp; 0xff);</div><div class='add'>+</div><div class='add'>+	/* Send an ACK */</div><div class='add'>+	realtek_smi_write_bits(priv, 0x01, 1);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int realtek_smi_read_reg(struct realtek_priv *priv, u32 addr, u32 *data)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u8 lo = 0;</div><div class='add'>+	u8 hi = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	realtek_smi_start(priv);</div><div class='add'>+</div><div class='add'>+	/* Send READ command */</div><div class='add'>+	ret = realtek_smi_write_byte(priv, priv-&gt;variant-&gt;cmd_read);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* Set ADDR[7:0] */</div><div class='add'>+	ret = realtek_smi_write_byte(priv, addr &amp; 0xff);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* Set ADDR[15:8] */</div><div class='add'>+	ret = realtek_smi_write_byte(priv, addr &gt;&gt; 8);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* Read DATA[7:0] */</div><div class='add'>+	realtek_smi_read_byte0(priv, &amp;lo);</div><div class='add'>+	/* Read DATA[15:8] */</div><div class='add'>+	realtek_smi_read_byte1(priv, &amp;hi);</div><div class='add'>+</div><div class='add'>+	*data = ((u32)lo) | (((u32)hi) &lt;&lt; 8);</div><div class='add'>+</div><div class='add'>+	ret = 0;</div><div class='add'>+</div><div class='add'>+ out:</div><div class='add'>+	realtek_smi_stop(priv);</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int realtek_smi_write_reg(struct realtek_priv *priv,</div><div class='add'>+				 u32 addr, u32 data, bool ack)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;priv-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	realtek_smi_start(priv);</div><div class='add'>+</div><div class='add'>+	/* Send WRITE command */</div><div class='add'>+	ret = realtek_smi_write_byte(priv, priv-&gt;variant-&gt;cmd_write);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* Set ADDR[7:0] */</div><div class='add'>+	ret = realtek_smi_write_byte(priv, addr &amp; 0xff);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* Set ADDR[15:8] */</div><div class='add'>+	ret = realtek_smi_write_byte(priv, addr &gt;&gt; 8);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* Write DATA[7:0] */</div><div class='add'>+	ret = realtek_smi_write_byte(priv, data &amp; 0xff);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* Write DATA[15:8] */</div><div class='add'>+	if (ack)</div><div class='add'>+		ret = realtek_smi_write_byte(priv, data &gt;&gt; 8);</div><div class='add'>+	else</div><div class='add'>+		ret = realtek_smi_write_byte_noack(priv, data &gt;&gt; 8);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ret = 0;</div><div class='add'>+</div><div class='add'>+ out:</div><div class='add'>+	realtek_smi_stop(priv);</div><div class='add'>+	spin_unlock_irqrestore(&amp;priv-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* There is one single case when we need to use this accessor and that</div><div class='add'>+ * is when issueing soft reset. Since the device reset as soon as we write</div><div class='add'>+ * that bit, no ACK will come back for natural reasons.</div><div class='add'>+ */</div><div class='add'>+static int realtek_smi_write_reg_noack(void *ctx, u32 reg, u32 val)</div><div class='add'>+{</div><div class='add'>+	return realtek_smi_write_reg(ctx, reg, val, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Regmap accessors */</div><div class='add'>+</div><div class='add'>+static int realtek_smi_write(void *ctx, u32 reg, u32 val)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = ctx;</div><div class='add'>+</div><div class='add'>+	return realtek_smi_write_reg(priv, reg, val, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int realtek_smi_read(void *ctx, u32 reg, u32 *val)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = ctx;</div><div class='add'>+</div><div class='add'>+	return realtek_smi_read_reg(priv, reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct realtek_interface_info realtek_smi_info = {</div><div class='add'>+	.reg_read = realtek_smi_read,</div><div class='add'>+	.reg_write = realtek_smi_write,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * realtek_smi_probe() - Probe a platform device for an SMI-connected switch</div><div class='add'>+ * @pdev: platform_device to probe on.</div><div class='add'>+ *</div><div class='add'>+ * This function should be used as the .probe in a platform_driver. After</div><div class='add'>+ * calling the common probe function for both interfaces, it initializes the</div><div class='add'>+ * values specific for SMI-connected devices. Finally, it calls a common</div><div class='add'>+ * function to register the DSA switch.</div><div class='add'>+ *</div><div class='add'>+ * Context: Can sleep. Takes and releases priv-&gt;map_lock.</div><div class='add'>+ * Return: Returns 0 on success, a negative error on failure.</div><div class='add'>+ */</div><div class='add'>+int realtek_smi_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct realtek_priv *priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	priv = rtl83xx_probe(dev, &amp;realtek_smi_info);</div><div class='add'>+	if (IS_ERR(priv))</div><div class='add'>+		return PTR_ERR(priv);</div><div class='add'>+</div><div class='add'>+	/* Fetch MDIO pins */</div><div class='add'>+	priv-&gt;mdc = devm_gpiod_get_optional(dev, "mdc", GPIOD_OUT_LOW);</div><div class='add'>+	if (IS_ERR(priv-&gt;mdc)) {</div><div class='add'>+		rtl83xx_remove(priv);</div><div class='add'>+		return PTR_ERR(priv-&gt;mdc);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;mdio = devm_gpiod_get_optional(dev, "mdio", GPIOD_OUT_LOW);</div><div class='add'>+	if (IS_ERR(priv-&gt;mdio)) {</div><div class='add'>+		rtl83xx_remove(priv);</div><div class='add'>+		return PTR_ERR(priv-&gt;mdio);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;write_reg_noack = realtek_smi_write_reg_noack;</div><div class='add'>+</div><div class='add'>+	ret = rtl83xx_register_switch(priv);</div><div class='add'>+	if (ret) {</div><div class='add'>+		rtl83xx_remove(priv);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(realtek_smi_probe, "REALTEK_DSA");</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * realtek_smi_remove() - Remove the driver of a SMI-connected switch</div><div class='add'>+ * @pdev: platform_device to be removed.</div><div class='add'>+ *</div><div class='add'>+ * This function should be used as the .remove in a platform_driver. First</div><div class='add'>+ * it unregisters the DSA switch and then it calls the common remove function.</div><div class='add'>+ *</div><div class='add'>+ * Context: Can sleep.</div><div class='add'>+ * Return: Nothing.</div><div class='add'>+ */</div><div class='add'>+void realtek_smi_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	rtl83xx_unregister_switch(priv);</div><div class='add'>+</div><div class='add'>+	rtl83xx_remove(priv);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(realtek_smi_remove, "REALTEK_DSA");</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * realtek_smi_shutdown() - Shutdown the driver of a SMI-connected switch</div><div class='add'>+ * @pdev: platform_device shutting down.</div><div class='add'>+ *</div><div class='add'>+ * This function should be used as the .shutdown in a platform_driver. It calls</div><div class='add'>+ * the common shutdown function.</div><div class='add'>+ *</div><div class='add'>+ * Context: Can sleep.</div><div class='add'>+ * Return: Nothing.</div><div class='add'>+ */</div><div class='add'>+void realtek_smi_shutdown(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	rtl83xx_shutdown(priv);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(realtek_smi_shutdown, "REALTEK_DSA");</div><div class='head'>diff --git a/drivers/net/dsa/realtek/realtek-smi.h b/drivers/net/dsa/realtek/realtek-smi.h<br/>new file mode 100644<br/>index 000000000000..ea49a2edd3c8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/realtek/realtek-smi.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/realtek/realtek-smi.h</a></div><div class='hunk'>@@ -0,0 +1,48 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0+ */</div><div class='add'>+</div><div class='add'>+#ifndef _REALTEK_SMI_H</div><div class='add'>+#define _REALTEK_SMI_H</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_NET_DSA_REALTEK_SMI)</div><div class='add'>+</div><div class='add'>+static inline int realtek_smi_driver_register(struct platform_driver *drv)</div><div class='add'>+{</div><div class='add'>+	return platform_driver_register(drv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void realtek_smi_driver_unregister(struct platform_driver *drv)</div><div class='add'>+{</div><div class='add'>+	platform_driver_unregister(drv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int realtek_smi_probe(struct platform_device *pdev);</div><div class='add'>+void realtek_smi_remove(struct platform_device *pdev);</div><div class='add'>+void realtek_smi_shutdown(struct platform_device *pdev);</div><div class='add'>+</div><div class='add'>+#else /* IS_ENABLED(CONFIG_NET_DSA_REALTEK_SMI) */</div><div class='add'>+</div><div class='add'>+static inline int realtek_smi_driver_register(struct platform_driver *drv)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void realtek_smi_driver_unregister(struct platform_driver *drv)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int realtek_smi_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	return -ENOENT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void realtek_smi_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void realtek_smi_shutdown(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* IS_ENABLED(CONFIG_NET_DSA_REALTEK_SMI) */</div><div class='add'>+</div><div class='add'>+#endif  /* _REALTEK_SMI_H */</div><div class='head'>diff --git a/drivers/net/dsa/realtek/realtek.h b/drivers/net/dsa/realtek/realtek.h<br/>new file mode 100644<br/>index 000000000000..c03485a80d93<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/realtek/realtek.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/realtek/realtek.h</a></div><div class='hunk'>@@ -0,0 +1,147 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0+ */</div><div class='add'>+/* Realtek SMI interface driver defines</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2017 Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='add'>+ * Copyright (C) 2009-2010 Gabor Juhos &lt;juhosg@openwrt.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef _REALTEK_H</div><div class='add'>+#define _REALTEK_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/gpio/consumer.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+#include &lt;linux/reset.h&gt;</div><div class='add'>+</div><div class='add'>+#define REALTEK_HW_STOP_DELAY		25	/* msecs */</div><div class='add'>+#define REALTEK_HW_START_DELAY		100	/* msecs */</div><div class='add'>+</div><div class='add'>+struct phylink_mac_ops;</div><div class='add'>+struct realtek_ops;</div><div class='add'>+</div><div class='add'>+struct rtl8366_mib_counter {</div><div class='add'>+	unsigned int	base;</div><div class='add'>+	unsigned int	offset;</div><div class='add'>+	unsigned int	length;</div><div class='add'>+	const char	*name;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * struct rtl8366_vlan_mc - Virtual LAN member configuration</div><div class='add'>+ */</div><div class='add'>+struct rtl8366_vlan_mc {</div><div class='add'>+	u16	vid;</div><div class='add'>+	u16	untag;</div><div class='add'>+	u16	member;</div><div class='add'>+	u8	fid;</div><div class='add'>+	u8	priority;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct rtl8366_vlan_4k {</div><div class='add'>+	u16	vid;</div><div class='add'>+	u16	untag;</div><div class='add'>+	u16	member;</div><div class='add'>+	u8	fid;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct realtek_priv {</div><div class='add'>+	struct device		*dev;</div><div class='add'>+	struct reset_control    *reset_ctl;</div><div class='add'>+	struct gpio_desc	*reset;</div><div class='add'>+	struct gpio_desc	*mdc;</div><div class='add'>+	struct gpio_desc	*mdio;</div><div class='add'>+	struct regmap		*map;</div><div class='add'>+	struct regmap		*map_nolock;</div><div class='add'>+	struct mutex		map_lock;</div><div class='add'>+	struct mii_bus		*user_mii_bus;</div><div class='add'>+	struct mii_bus		*bus;</div><div class='add'>+	int			mdio_addr;</div><div class='add'>+</div><div class='add'>+	const struct realtek_variant *variant;</div><div class='add'>+</div><div class='add'>+	spinlock_t		lock; /* Locks around command writes */</div><div class='add'>+	struct dsa_switch	ds;</div><div class='add'>+	struct irq_domain	*irqdomain;</div><div class='add'>+	bool			leds_disabled;</div><div class='add'>+</div><div class='add'>+	unsigned int		cpu_port;</div><div class='add'>+	unsigned int		num_ports;</div><div class='add'>+	unsigned int		num_vlan_mc;</div><div class='add'>+	unsigned int		num_mib_counters;</div><div class='add'>+	struct rtl8366_mib_counter *mib_counters;</div><div class='add'>+</div><div class='add'>+	const struct realtek_ops *ops;</div><div class='add'>+	int			(*write_reg_noack)(void *ctx, u32 addr, u32 data);</div><div class='add'>+</div><div class='add'>+	int			vlan_enabled;</div><div class='add'>+	int			vlan4k_enabled;</div><div class='add'>+</div><div class='add'>+	char			buf[4096];</div><div class='add'>+	void			*chip_data; /* Per-chip extra variant data */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * struct realtek_ops - vtable for the per-SMI-chiptype operations</div><div class='add'>+ * @detect: detects the chiptype</div><div class='add'>+ */</div><div class='add'>+struct realtek_ops {</div><div class='add'>+	int	(*detect)(struct realtek_priv *priv);</div><div class='add'>+	int	(*reset_chip)(struct realtek_priv *priv);</div><div class='add'>+	int	(*setup)(struct realtek_priv *priv);</div><div class='add'>+	int	(*get_mib_counter)(struct realtek_priv *priv,</div><div class='add'>+				   int port,</div><div class='add'>+				   struct rtl8366_mib_counter *mib,</div><div class='add'>+				   u64 *mibvalue);</div><div class='add'>+	int	(*get_vlan_mc)(struct realtek_priv *priv, u32 index,</div><div class='add'>+			       struct rtl8366_vlan_mc *vlanmc);</div><div class='add'>+	int	(*set_vlan_mc)(struct realtek_priv *priv, u32 index,</div><div class='add'>+			       const struct rtl8366_vlan_mc *vlanmc);</div><div class='add'>+	int	(*get_vlan_4k)(struct realtek_priv *priv, u32 vid,</div><div class='add'>+			       struct rtl8366_vlan_4k *vlan4k);</div><div class='add'>+	int	(*set_vlan_4k)(struct realtek_priv *priv,</div><div class='add'>+			       const struct rtl8366_vlan_4k *vlan4k);</div><div class='add'>+	int	(*get_mc_index)(struct realtek_priv *priv, int port, int *val);</div><div class='add'>+	int	(*set_mc_index)(struct realtek_priv *priv, int port, int index);</div><div class='add'>+	bool	(*is_vlan_valid)(struct realtek_priv *priv, unsigned int vlan);</div><div class='add'>+	int	(*enable_vlan)(struct realtek_priv *priv, bool enable);</div><div class='add'>+	int	(*enable_vlan4k)(struct realtek_priv *priv, bool enable);</div><div class='add'>+	int	(*enable_port)(struct realtek_priv *priv, int port, bool enable);</div><div class='add'>+	int	(*phy_read)(struct realtek_priv *priv, int phy, int regnum);</div><div class='add'>+	int	(*phy_write)(struct realtek_priv *priv, int phy, int regnum,</div><div class='add'>+			     u16 val);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct realtek_variant {</div><div class='add'>+	const struct dsa_switch_ops *ds_ops;</div><div class='add'>+	const struct realtek_ops *ops;</div><div class='add'>+	const struct phylink_mac_ops *phylink_mac_ops;</div><div class='add'>+	unsigned int clk_delay;</div><div class='add'>+	u8 cmd_read;</div><div class='add'>+	u8 cmd_write;</div><div class='add'>+	size_t chip_data_sz;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* RTL8366 library helpers */</div><div class='add'>+int rtl8366_mc_is_used(struct realtek_priv *priv, int mc_index, int *used);</div><div class='add'>+int rtl8366_set_vlan(struct realtek_priv *priv, int vid, u32 member,</div><div class='add'>+		     u32 untag, u32 fid);</div><div class='add'>+int rtl8366_set_pvid(struct realtek_priv *priv, unsigned int port,</div><div class='add'>+		     unsigned int vid);</div><div class='add'>+int rtl8366_enable_vlan4k(struct realtek_priv *priv, bool enable);</div><div class='add'>+int rtl8366_enable_vlan(struct realtek_priv *priv, bool enable);</div><div class='add'>+int rtl8366_reset_vlan(struct realtek_priv *priv);</div><div class='add'>+int rtl8366_vlan_add(struct dsa_switch *ds, int port,</div><div class='add'>+		     const struct switchdev_obj_port_vlan *vlan,</div><div class='add'>+		     struct netlink_ext_ack *extack);</div><div class='add'>+int rtl8366_vlan_del(struct dsa_switch *ds, int port,</div><div class='add'>+		     const struct switchdev_obj_port_vlan *vlan);</div><div class='add'>+void rtl8366_get_strings(struct dsa_switch *ds, int port, u32 stringset,</div><div class='add'>+			 uint8_t *data);</div><div class='add'>+int rtl8366_get_sset_count(struct dsa_switch *ds, int port, int sset);</div><div class='add'>+void rtl8366_get_ethtool_stats(struct dsa_switch *ds, int port, uint64_t *data);</div><div class='add'>+</div><div class='add'>+extern const struct realtek_variant rtl8366rb_variant;</div><div class='add'>+extern const struct realtek_variant rtl8365mb_variant;</div><div class='add'>+</div><div class='add'>+#endif /*  _REALTEK_H */</div><div class='head'>diff --git a/drivers/net/dsa/realtek/rtl8365mb.c b/drivers/net/dsa/realtek/rtl8365mb.c<br/>new file mode 100644<br/>index 000000000000..c575e164368c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/realtek/rtl8365mb.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/realtek/rtl8365mb.c</a></div><div class='hunk'>@@ -0,0 +1,2211 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Realtek SMI subdriver for the Realtek RTL8365MB-VC ethernet switch.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2021 Alvin Šipraga &lt;alsi@bang-olufsen.dk&gt;</div><div class='add'>+ * Copyright (C) 2021 Michael Rasmussen &lt;mir@bang-olufsen.dk&gt;</div><div class='add'>+ *</div><div class='add'>+ * The RTL8365MB-VC is a 4+1 port 10/100/1000M switch controller. It includes 4</div><div class='add'>+ * integrated PHYs for the user facing ports, and an extension interface which</div><div class='add'>+ * can be connected to the CPU - or another PHY - via either MII, RMII, or</div><div class='add'>+ * RGMII. The switch is configured via the Realtek Simple Management Interface</div><div class='add'>+ * (SMI), which uses the MDIO/MDC lines.</div><div class='add'>+ *</div><div class='add'>+ * Below is a simplified block diagram of the chip and its relevant interfaces.</div><div class='add'>+ *</div><div class='add'>+ *                          .-----------------------------------.</div><div class='add'>+ *                          |                                   |</div><div class='add'>+ *         UTP &lt;---------------&gt; Giga PHY &lt;-&gt; PCS &lt;-&gt; P0 GMAC   |</div><div class='add'>+ *         UTP &lt;---------------&gt; Giga PHY &lt;-&gt; PCS &lt;-&gt; P1 GMAC   |</div><div class='add'>+ *         UTP &lt;---------------&gt; Giga PHY &lt;-&gt; PCS &lt;-&gt; P2 GMAC   |</div><div class='add'>+ *         UTP &lt;---------------&gt; Giga PHY &lt;-&gt; PCS &lt;-&gt; P3 GMAC   |</div><div class='add'>+ *                          |                                   |</div><div class='add'>+ *     CPU/PHY &lt;-MII/RMII/RGMII---&gt;  Extension  &lt;---&gt; Extension |</div><div class='add'>+ *                          |       interface 1        GMAC 1   |</div><div class='add'>+ *                          |                                   |</div><div class='add'>+ *     SMI driver/ &lt;-MDC/SCL---&gt; Management    ~~~~~~~~~~~~~~   |</div><div class='add'>+ *        EEPROM   &lt;-MDIO/SDA--&gt; interface     ~REALTEK ~~~~~   |</div><div class='add'>+ *                          |                  ~RTL8365MB ~~~   |</div><div class='add'>+ *                          |                  ~GXXXC TAIWAN~   |</div><div class='add'>+ *        GPIO &lt;--------------&gt; Reset          ~~~~~~~~~~~~~~   |</div><div class='add'>+ *                          |                                   |</div><div class='add'>+ *      Interrupt  &lt;----------&gt; Link UP/DOWN events             |</div><div class='add'>+ *      controller          |                                   |</div><div class='add'>+ *                          '-----------------------------------'</div><div class='add'>+ *</div><div class='add'>+ * The driver uses DSA to integrate the 4 user and 1 extension ports into the</div><div class='add'>+ * kernel. Netdevices are created for the user ports, as are PHY devices for</div><div class='add'>+ * their integrated PHYs. The device tree firmware should also specify the link</div><div class='add'>+ * partner of the extension port - either via a fixed-link or other phy-handle.</div><div class='add'>+ * See the device tree bindings for more detailed information. Note that the</div><div class='add'>+ * driver has only been tested with a fixed-link, but in principle it should not</div><div class='add'>+ * matter.</div><div class='add'>+ *</div><div class='add'>+ * NOTE: Currently, only the RGMII interface is implemented in this driver.</div><div class='add'>+ *</div><div class='add'>+ * The interrupt line is asserted on link UP/DOWN events. The driver creates a</div><div class='add'>+ * custom irqchip to handle this interrupt and demultiplex the events by reading</div><div class='add'>+ * the status registers via SMI. Interrupts are then propagated to the relevant</div><div class='add'>+ * PHY device.</div><div class='add'>+ *</div><div class='add'>+ * The EEPROM contains initial register values which the chip will read over I2C</div><div class='add'>+ * upon hardware reset. It is also possible to omit the EEPROM. In both cases,</div><div class='add'>+ * the driver will manually reprogram some registers using jam tables to reach</div><div class='add'>+ * an initial state defined by the vendor driver.</div><div class='add'>+ *</div><div class='add'>+ * This Linux driver is written based on an OS-agnostic vendor driver from</div><div class='add'>+ * Realtek. The reference GPL-licensed sources can be found in the OpenWrt</div><div class='add'>+ * source tree under the name rtl8367c. The vendor driver claims to support a</div><div class='add'>+ * number of similar switch controllers from Realtek, but the only hardware we</div><div class='add'>+ * have is the RTL8365MB-VC. Moreover, there does not seem to be any chip under</div><div class='add'>+ * the name RTL8367C. Although one wishes that the 'C' stood for some kind of</div><div class='add'>+ * common hardware revision, there exist examples of chips with the suffix -VC</div><div class='add'>+ * which are explicitly not supported by the rtl8367c driver and which instead</div><div class='add'>+ * require the rtl8367d vendor driver. With all this uncertainty, the driver has</div><div class='add'>+ * been modestly named rtl8365mb. Future implementors may wish to rename things</div><div class='add'>+ * accordingly.</div><div class='add'>+ *</div><div class='add'>+ * In the same family of chips, some carry up to 8 user ports and up to 2</div><div class='add'>+ * extension ports. Where possible this driver tries to make things generic, but</div><div class='add'>+ * more work must be done to support these configurations. According to</div><div class='add'>+ * documentation from Realtek, the family should include the following chips:</div><div class='add'>+ *</div><div class='add'>+ *  - RTL8363NB</div><div class='add'>+ *  - RTL8363NB-VB</div><div class='add'>+ *  - RTL8363SC</div><div class='add'>+ *  - RTL8363SC-VB</div><div class='add'>+ *  - RTL8364NB</div><div class='add'>+ *  - RTL8364NB-VB</div><div class='add'>+ *  - RTL8365MB-VC</div><div class='add'>+ *  - RTL8366SC</div><div class='add'>+ *  - RTL8367RB-VB</div><div class='add'>+ *  - RTL8367SB</div><div class='add'>+ *  - RTL8367S</div><div class='add'>+ *  - RTL8370MB</div><div class='add'>+ *  - RTL8310SR</div><div class='add'>+ *</div><div class='add'>+ * Some of the register logic for these additional chips has been skipped over</div><div class='add'>+ * while implementing this driver. It is therefore not possible to assume that</div><div class='add'>+ * things will work out-of-the-box for other chips, and a careful review of the</div><div class='add'>+ * vendor driver may be needed to expand support. The RTL8365MB-VC seems to be</div><div class='add'>+ * one of the simpler chips.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/bitops.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/irqdomain.h&gt;</div><div class='add'>+#include &lt;linux/mutex.h&gt;</div><div class='add'>+#include &lt;linux/of_irq.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;linux/if_bridge.h&gt;</div><div class='add'>+#include &lt;linux/if_vlan.h&gt;</div><div class='add'>+</div><div class='add'>+#include "realtek.h"</div><div class='add'>+#include "realtek-smi.h"</div><div class='add'>+#include "realtek-mdio.h"</div><div class='add'>+#include "rtl83xx.h"</div><div class='add'>+</div><div class='add'>+/* Family-specific data and limits */</div><div class='add'>+#define RTL8365MB_PHYADDRMAX		7</div><div class='add'>+#define RTL8365MB_NUM_PHYREGS		32</div><div class='add'>+#define RTL8365MB_PHYREGMAX		(RTL8365MB_NUM_PHYREGS - 1)</div><div class='add'>+#define RTL8365MB_MAX_NUM_PORTS		11</div><div class='add'>+#define RTL8365MB_MAX_NUM_EXTINTS	3</div><div class='add'>+#define RTL8365MB_LEARN_LIMIT_MAX	2112</div><div class='add'>+</div><div class='add'>+/* Chip identification registers */</div><div class='add'>+#define RTL8365MB_CHIP_ID_REG		0x1300</div><div class='add'>+</div><div class='add'>+#define RTL8365MB_CHIP_VER_REG		0x1301</div><div class='add'>+</div><div class='add'>+#define RTL8365MB_MAGIC_REG		0x13C2</div><div class='add'>+#define   RTL8365MB_MAGIC_VALUE		0x0249</div><div class='add'>+</div><div class='add'>+/* Chip reset register */</div><div class='add'>+#define RTL8365MB_CHIP_RESET_REG	0x1322</div><div class='add'>+#define RTL8365MB_CHIP_RESET_SW_MASK	0x0002</div><div class='add'>+#define RTL8365MB_CHIP_RESET_HW_MASK	0x0001</div><div class='add'>+</div><div class='add'>+/* Interrupt polarity register */</div><div class='add'>+#define RTL8365MB_INTR_POLARITY_REG	0x1100</div><div class='add'>+#define   RTL8365MB_INTR_POLARITY_MASK	0x0001</div><div class='add'>+#define   RTL8365MB_INTR_POLARITY_HIGH	0</div><div class='add'>+#define   RTL8365MB_INTR_POLARITY_LOW	1</div><div class='add'>+</div><div class='add'>+/* Interrupt control/status register - enable/check specific interrupt types */</div><div class='add'>+#define RTL8365MB_INTR_CTRL_REG			0x1101</div><div class='add'>+#define RTL8365MB_INTR_STATUS_REG		0x1102</div><div class='add'>+#define   RTL8365MB_INTR_SLIENT_START_2_MASK	0x1000</div><div class='add'>+#define   RTL8365MB_INTR_SLIENT_START_MASK	0x0800</div><div class='add'>+#define   RTL8365MB_INTR_ACL_ACTION_MASK	0x0200</div><div class='add'>+#define   RTL8365MB_INTR_CABLE_DIAG_FIN_MASK	0x0100</div><div class='add'>+#define   RTL8365MB_INTR_INTERRUPT_8051_MASK	0x0080</div><div class='add'>+#define   RTL8365MB_INTR_LOOP_DETECTION_MASK	0x0040</div><div class='add'>+#define   RTL8365MB_INTR_GREEN_TIMER_MASK	0x0020</div><div class='add'>+#define   RTL8365MB_INTR_SPECIAL_CONGEST_MASK	0x0010</div><div class='add'>+#define   RTL8365MB_INTR_SPEED_CHANGE_MASK	0x0008</div><div class='add'>+#define   RTL8365MB_INTR_LEARN_OVER_MASK	0x0004</div><div class='add'>+#define   RTL8365MB_INTR_METER_EXCEEDED_MASK	0x0002</div><div class='add'>+#define   RTL8365MB_INTR_LINK_CHANGE_MASK	0x0001</div><div class='add'>+#define   RTL8365MB_INTR_ALL_MASK                      \</div><div class='add'>+		(RTL8365MB_INTR_SLIENT_START_2_MASK |  \</div><div class='add'>+		 RTL8365MB_INTR_SLIENT_START_MASK |    \</div><div class='add'>+		 RTL8365MB_INTR_ACL_ACTION_MASK |      \</div><div class='add'>+		 RTL8365MB_INTR_CABLE_DIAG_FIN_MASK |  \</div><div class='add'>+		 RTL8365MB_INTR_INTERRUPT_8051_MASK |  \</div><div class='add'>+		 RTL8365MB_INTR_LOOP_DETECTION_MASK |  \</div><div class='add'>+		 RTL8365MB_INTR_GREEN_TIMER_MASK |     \</div><div class='add'>+		 RTL8365MB_INTR_SPECIAL_CONGEST_MASK | \</div><div class='add'>+		 RTL8365MB_INTR_SPEED_CHANGE_MASK |    \</div><div class='add'>+		 RTL8365MB_INTR_LEARN_OVER_MASK |      \</div><div class='add'>+		 RTL8365MB_INTR_METER_EXCEEDED_MASK |  \</div><div class='add'>+		 RTL8365MB_INTR_LINK_CHANGE_MASK)</div><div class='add'>+</div><div class='add'>+/* Per-port interrupt type status registers */</div><div class='add'>+#define RTL8365MB_PORT_LINKDOWN_IND_REG		0x1106</div><div class='add'>+#define   RTL8365MB_PORT_LINKDOWN_IND_MASK	0x07FF</div><div class='add'>+</div><div class='add'>+#define RTL8365MB_PORT_LINKUP_IND_REG		0x1107</div><div class='add'>+#define   RTL8365MB_PORT_LINKUP_IND_MASK	0x07FF</div><div class='add'>+</div><div class='add'>+/* PHY indirect access registers */</div><div class='add'>+#define RTL8365MB_INDIRECT_ACCESS_CTRL_REG			0x1F00</div><div class='add'>+#define   RTL8365MB_INDIRECT_ACCESS_CTRL_RW_MASK		0x0002</div><div class='add'>+#define   RTL8365MB_INDIRECT_ACCESS_CTRL_RW_READ		0</div><div class='add'>+#define   RTL8365MB_INDIRECT_ACCESS_CTRL_RW_WRITE		1</div><div class='add'>+#define   RTL8365MB_INDIRECT_ACCESS_CTRL_CMD_MASK		0x0001</div><div class='add'>+#define   RTL8365MB_INDIRECT_ACCESS_CTRL_CMD_VALUE		1</div><div class='add'>+#define RTL8365MB_INDIRECT_ACCESS_STATUS_REG			0x1F01</div><div class='add'>+#define RTL8365MB_INDIRECT_ACCESS_ADDRESS_REG			0x1F02</div><div class='add'>+#define   RTL8365MB_INDIRECT_ACCESS_ADDRESS_OCPADR_5_1_MASK	GENMASK(4, 0)</div><div class='add'>+#define   RTL8365MB_INDIRECT_ACCESS_ADDRESS_PHYNUM_MASK		GENMASK(7, 5)</div><div class='add'>+#define   RTL8365MB_INDIRECT_ACCESS_ADDRESS_OCPADR_9_6_MASK	GENMASK(11, 8)</div><div class='add'>+#define   RTL8365MB_PHY_BASE					0x2000</div><div class='add'>+#define RTL8365MB_INDIRECT_ACCESS_WRITE_DATA_REG		0x1F03</div><div class='add'>+#define RTL8365MB_INDIRECT_ACCESS_READ_DATA_REG			0x1F04</div><div class='add'>+</div><div class='add'>+/* PHY OCP address prefix register */</div><div class='add'>+#define RTL8365MB_GPHY_OCP_MSB_0_REG			0x1D15</div><div class='add'>+#define   RTL8365MB_GPHY_OCP_MSB_0_CFG_CPU_OCPADR_MASK	0x0FC0</div><div class='add'>+#define RTL8365MB_PHY_OCP_ADDR_PREFIX_MASK		0xFC00</div><div class='add'>+</div><div class='add'>+/* The PHY OCP addresses of PHY registers 0~31 start here */</div><div class='add'>+#define RTL8365MB_PHY_OCP_ADDR_PHYREG_BASE		0xA400</div><div class='add'>+</div><div class='add'>+/* External interface port mode values - used in DIGITAL_INTERFACE_SELECT */</div><div class='add'>+#define RTL8365MB_EXT_PORT_MODE_DISABLE		0</div><div class='add'>+#define RTL8365MB_EXT_PORT_MODE_RGMII		1</div><div class='add'>+#define RTL8365MB_EXT_PORT_MODE_MII_MAC		2</div><div class='add'>+#define RTL8365MB_EXT_PORT_MODE_MII_PHY		3</div><div class='add'>+#define RTL8365MB_EXT_PORT_MODE_TMII_MAC	4</div><div class='add'>+#define RTL8365MB_EXT_PORT_MODE_TMII_PHY	5</div><div class='add'>+#define RTL8365MB_EXT_PORT_MODE_GMII		6</div><div class='add'>+#define RTL8365MB_EXT_PORT_MODE_RMII_MAC	7</div><div class='add'>+#define RTL8365MB_EXT_PORT_MODE_RMII_PHY	8</div><div class='add'>+#define RTL8365MB_EXT_PORT_MODE_SGMII		9</div><div class='add'>+#define RTL8365MB_EXT_PORT_MODE_HSGMII		10</div><div class='add'>+#define RTL8365MB_EXT_PORT_MODE_1000X_100FX	11</div><div class='add'>+#define RTL8365MB_EXT_PORT_MODE_1000X		12</div><div class='add'>+#define RTL8365MB_EXT_PORT_MODE_100FX		13</div><div class='add'>+</div><div class='add'>+/* External interface mode configuration registers 0~1 */</div><div class='add'>+#define RTL8365MB_DIGITAL_INTERFACE_SELECT_REG0		0x1305 /* EXT0,EXT1 */</div><div class='add'>+#define RTL8365MB_DIGITAL_INTERFACE_SELECT_REG1		0x13C3 /* EXT2 */</div><div class='add'>+#define RTL8365MB_DIGITAL_INTERFACE_SELECT_REG(_extint) \</div><div class='add'>+		((_extint) &lt;= 1 ? RTL8365MB_DIGITAL_INTERFACE_SELECT_REG0 : \</div><div class='add'>+		 (_extint) == 2 ? RTL8365MB_DIGITAL_INTERFACE_SELECT_REG1 : \</div><div class='add'>+		 0x0)</div><div class='add'>+#define   RTL8365MB_DIGITAL_INTERFACE_SELECT_MODE_MASK(_extint) \</div><div class='add'>+		(0xF &lt;&lt; (((_extint) % 2)))</div><div class='add'>+#define   RTL8365MB_DIGITAL_INTERFACE_SELECT_MODE_OFFSET(_extint) \</div><div class='add'>+		(((_extint) % 2) * 4)</div><div class='add'>+</div><div class='add'>+/* External interface RGMII TX/RX delay configuration registers 0~2 */</div><div class='add'>+#define RTL8365MB_EXT_RGMXF_REG0		0x1306 /* EXT0 */</div><div class='add'>+#define RTL8365MB_EXT_RGMXF_REG1		0x1307 /* EXT1 */</div><div class='add'>+#define RTL8365MB_EXT_RGMXF_REG2		0x13C5 /* EXT2 */</div><div class='add'>+#define RTL8365MB_EXT_RGMXF_REG(_extint) \</div><div class='add'>+		((_extint) == 0 ? RTL8365MB_EXT_RGMXF_REG0 : \</div><div class='add'>+		 (_extint) == 1 ? RTL8365MB_EXT_RGMXF_REG1 : \</div><div class='add'>+		 (_extint) == 2 ? RTL8365MB_EXT_RGMXF_REG2 : \</div><div class='add'>+		 0x0)</div><div class='add'>+#define   RTL8365MB_EXT_RGMXF_RXDELAY_MASK	0x0007</div><div class='add'>+#define   RTL8365MB_EXT_RGMXF_TXDELAY_MASK	0x0008</div><div class='add'>+</div><div class='add'>+/* External interface port speed values - used in DIGITAL_INTERFACE_FORCE */</div><div class='add'>+#define RTL8365MB_PORT_SPEED_10M	0</div><div class='add'>+#define RTL8365MB_PORT_SPEED_100M	1</div><div class='add'>+#define RTL8365MB_PORT_SPEED_1000M	2</div><div class='add'>+</div><div class='add'>+/* External interface force configuration registers 0~2 */</div><div class='add'>+#define RTL8365MB_DIGITAL_INTERFACE_FORCE_REG0		0x1310 /* EXT0 */</div><div class='add'>+#define RTL8365MB_DIGITAL_INTERFACE_FORCE_REG1		0x1311 /* EXT1 */</div><div class='add'>+#define RTL8365MB_DIGITAL_INTERFACE_FORCE_REG2		0x13C4 /* EXT2 */</div><div class='add'>+#define RTL8365MB_DIGITAL_INTERFACE_FORCE_REG(_extint) \</div><div class='add'>+		((_extint) == 0 ? RTL8365MB_DIGITAL_INTERFACE_FORCE_REG0 : \</div><div class='add'>+		 (_extint) == 1 ? RTL8365MB_DIGITAL_INTERFACE_FORCE_REG1 : \</div><div class='add'>+		 (_extint) == 2 ? RTL8365MB_DIGITAL_INTERFACE_FORCE_REG2 : \</div><div class='add'>+		 0x0)</div><div class='add'>+#define   RTL8365MB_DIGITAL_INTERFACE_FORCE_EN_MASK		0x1000</div><div class='add'>+#define   RTL8365MB_DIGITAL_INTERFACE_FORCE_NWAY_MASK		0x0080</div><div class='add'>+#define   RTL8365MB_DIGITAL_INTERFACE_FORCE_TXPAUSE_MASK	0x0040</div><div class='add'>+#define   RTL8365MB_DIGITAL_INTERFACE_FORCE_RXPAUSE_MASK	0x0020</div><div class='add'>+#define   RTL8365MB_DIGITAL_INTERFACE_FORCE_LINK_MASK		0x0010</div><div class='add'>+#define   RTL8365MB_DIGITAL_INTERFACE_FORCE_DUPLEX_MASK		0x0004</div><div class='add'>+#define   RTL8365MB_DIGITAL_INTERFACE_FORCE_SPEED_MASK		0x0003</div><div class='add'>+</div><div class='add'>+/* CPU port mask register - controls which ports are treated as CPU ports */</div><div class='add'>+#define RTL8365MB_CPU_PORT_MASK_REG	0x1219</div><div class='add'>+#define   RTL8365MB_CPU_PORT_MASK_MASK	0x07FF</div><div class='add'>+</div><div class='add'>+/* CPU control register */</div><div class='add'>+#define RTL8365MB_CPU_CTRL_REG			0x121A</div><div class='add'>+#define   RTL8365MB_CPU_CTRL_TRAP_PORT_EXT_MASK	0x0400</div><div class='add'>+#define   RTL8365MB_CPU_CTRL_TAG_FORMAT_MASK	0x0200</div><div class='add'>+#define   RTL8365MB_CPU_CTRL_RXBYTECOUNT_MASK	0x0080</div><div class='add'>+#define   RTL8365MB_CPU_CTRL_TAG_POSITION_MASK	0x0040</div><div class='add'>+#define   RTL8365MB_CPU_CTRL_TRAP_PORT_MASK	0x0038</div><div class='add'>+#define   RTL8365MB_CPU_CTRL_INSERTMODE_MASK	0x0006</div><div class='add'>+#define   RTL8365MB_CPU_CTRL_EN_MASK		0x0001</div><div class='add'>+</div><div class='add'>+/* Maximum packet length register */</div><div class='add'>+#define RTL8365MB_CFG0_MAX_LEN_REG	0x088C</div><div class='add'>+#define   RTL8365MB_CFG0_MAX_LEN_MASK	0x3FFF</div><div class='add'>+#define RTL8365MB_CFG0_MAX_LEN_MAX	0x3FFF</div><div class='add'>+</div><div class='add'>+/* Port learning limit registers */</div><div class='add'>+#define RTL8365MB_LUT_PORT_LEARN_LIMIT_BASE		0x0A20</div><div class='add'>+#define RTL8365MB_LUT_PORT_LEARN_LIMIT_REG(_physport) \</div><div class='add'>+		(RTL8365MB_LUT_PORT_LEARN_LIMIT_BASE + (_physport))</div><div class='add'>+</div><div class='add'>+/* Port isolation (forwarding mask) registers */</div><div class='add'>+#define RTL8365MB_PORT_ISOLATION_REG_BASE		0x08A2</div><div class='add'>+#define RTL8365MB_PORT_ISOLATION_REG(_physport) \</div><div class='add'>+		(RTL8365MB_PORT_ISOLATION_REG_BASE + (_physport))</div><div class='add'>+#define   RTL8365MB_PORT_ISOLATION_MASK			0x07FF</div><div class='add'>+</div><div class='add'>+/* MSTP port state registers - indexed by tree instance */</div><div class='add'>+#define RTL8365MB_MSTI_CTRL_BASE			0x0A00</div><div class='add'>+#define RTL8365MB_MSTI_CTRL_REG(_msti, _physport) \</div><div class='add'>+		(RTL8365MB_MSTI_CTRL_BASE + ((_msti) &lt;&lt; 1) + ((_physport) &gt;&gt; 3))</div><div class='add'>+#define   RTL8365MB_MSTI_CTRL_PORT_STATE_OFFSET(_physport) ((_physport) &lt;&lt; 1)</div><div class='add'>+#define   RTL8365MB_MSTI_CTRL_PORT_STATE_MASK(_physport) \</div><div class='add'>+		(0x3 &lt;&lt; RTL8365MB_MSTI_CTRL_PORT_STATE_OFFSET((_physport)))</div><div class='add'>+</div><div class='add'>+/* MIB counter value registers */</div><div class='add'>+#define RTL8365MB_MIB_COUNTER_BASE	0x1000</div><div class='add'>+#define RTL8365MB_MIB_COUNTER_REG(_x)	(RTL8365MB_MIB_COUNTER_BASE + (_x))</div><div class='add'>+</div><div class='add'>+/* MIB counter address register */</div><div class='add'>+#define RTL8365MB_MIB_ADDRESS_REG		0x1004</div><div class='add'>+#define   RTL8365MB_MIB_ADDRESS_PORT_OFFSET	0x007C</div><div class='add'>+#define   RTL8365MB_MIB_ADDRESS(_p, _x) \</div><div class='add'>+		(((RTL8365MB_MIB_ADDRESS_PORT_OFFSET) * (_p) + (_x)) &gt;&gt; 2)</div><div class='add'>+</div><div class='add'>+#define RTL8365MB_MIB_CTRL0_REG			0x1005</div><div class='add'>+#define   RTL8365MB_MIB_CTRL0_RESET_MASK	0x0002</div><div class='add'>+#define   RTL8365MB_MIB_CTRL0_BUSY_MASK		0x0001</div><div class='add'>+</div><div class='add'>+/* The DSA callback .get_stats64 runs in atomic context, so we are not allowed</div><div class='add'>+ * to block. On the other hand, accessing MIB counters absolutely requires us to</div><div class='add'>+ * block. The solution is thus to schedule work which polls the MIB counters</div><div class='add'>+ * asynchronously and updates some private data, which the callback can then</div><div class='add'>+ * fetch atomically. Three seconds should be a good enough polling interval.</div><div class='add'>+ */</div><div class='add'>+#define RTL8365MB_STATS_INTERVAL_JIFFIES	(3 * HZ)</div><div class='add'>+</div><div class='add'>+enum rtl8365mb_mib_counter_index {</div><div class='add'>+	RTL8365MB_MIB_ifInOctets,</div><div class='add'>+	RTL8365MB_MIB_dot3StatsFCSErrors,</div><div class='add'>+	RTL8365MB_MIB_dot3StatsSymbolErrors,</div><div class='add'>+	RTL8365MB_MIB_dot3InPauseFrames,</div><div class='add'>+	RTL8365MB_MIB_dot3ControlInUnknownOpcodes,</div><div class='add'>+	RTL8365MB_MIB_etherStatsFragments,</div><div class='add'>+	RTL8365MB_MIB_etherStatsJabbers,</div><div class='add'>+	RTL8365MB_MIB_ifInUcastPkts,</div><div class='add'>+	RTL8365MB_MIB_etherStatsDropEvents,</div><div class='add'>+	RTL8365MB_MIB_ifInMulticastPkts,</div><div class='add'>+	RTL8365MB_MIB_ifInBroadcastPkts,</div><div class='add'>+	RTL8365MB_MIB_inMldChecksumError,</div><div class='add'>+	RTL8365MB_MIB_inIgmpChecksumError,</div><div class='add'>+	RTL8365MB_MIB_inMldSpecificQuery,</div><div class='add'>+	RTL8365MB_MIB_inMldGeneralQuery,</div><div class='add'>+	RTL8365MB_MIB_inIgmpSpecificQuery,</div><div class='add'>+	RTL8365MB_MIB_inIgmpGeneralQuery,</div><div class='add'>+	RTL8365MB_MIB_inMldLeaves,</div><div class='add'>+	RTL8365MB_MIB_inIgmpLeaves,</div><div class='add'>+	RTL8365MB_MIB_etherStatsOctets,</div><div class='add'>+	RTL8365MB_MIB_etherStatsUnderSizePkts,</div><div class='add'>+	RTL8365MB_MIB_etherOversizeStats,</div><div class='add'>+	RTL8365MB_MIB_etherStatsPkts64Octets,</div><div class='add'>+	RTL8365MB_MIB_etherStatsPkts65to127Octets,</div><div class='add'>+	RTL8365MB_MIB_etherStatsPkts128to255Octets,</div><div class='add'>+	RTL8365MB_MIB_etherStatsPkts256to511Octets,</div><div class='add'>+	RTL8365MB_MIB_etherStatsPkts512to1023Octets,</div><div class='add'>+	RTL8365MB_MIB_etherStatsPkts1024to1518Octets,</div><div class='add'>+	RTL8365MB_MIB_ifOutOctets,</div><div class='add'>+	RTL8365MB_MIB_dot3StatsSingleCollisionFrames,</div><div class='add'>+	RTL8365MB_MIB_dot3StatsMultipleCollisionFrames,</div><div class='add'>+	RTL8365MB_MIB_dot3StatsDeferredTransmissions,</div><div class='add'>+	RTL8365MB_MIB_dot3StatsLateCollisions,</div><div class='add'>+	RTL8365MB_MIB_etherStatsCollisions,</div><div class='add'>+	RTL8365MB_MIB_dot3StatsExcessiveCollisions,</div><div class='add'>+	RTL8365MB_MIB_dot3OutPauseFrames,</div><div class='add'>+	RTL8365MB_MIB_ifOutDiscards,</div><div class='add'>+	RTL8365MB_MIB_dot1dTpPortInDiscards,</div><div class='add'>+	RTL8365MB_MIB_ifOutUcastPkts,</div><div class='add'>+	RTL8365MB_MIB_ifOutMulticastPkts,</div><div class='add'>+	RTL8365MB_MIB_ifOutBroadcastPkts,</div><div class='add'>+	RTL8365MB_MIB_outOampduPkts,</div><div class='add'>+	RTL8365MB_MIB_inOampduPkts,</div><div class='add'>+	RTL8365MB_MIB_inIgmpJoinsSuccess,</div><div class='add'>+	RTL8365MB_MIB_inIgmpJoinsFail,</div><div class='add'>+	RTL8365MB_MIB_inMldJoinsSuccess,</div><div class='add'>+	RTL8365MB_MIB_inMldJoinsFail,</div><div class='add'>+	RTL8365MB_MIB_inReportSuppressionDrop,</div><div class='add'>+	RTL8365MB_MIB_inLeaveSuppressionDrop,</div><div class='add'>+	RTL8365MB_MIB_outIgmpReports,</div><div class='add'>+	RTL8365MB_MIB_outIgmpLeaves,</div><div class='add'>+	RTL8365MB_MIB_outIgmpGeneralQuery,</div><div class='add'>+	RTL8365MB_MIB_outIgmpSpecificQuery,</div><div class='add'>+	RTL8365MB_MIB_outMldReports,</div><div class='add'>+	RTL8365MB_MIB_outMldLeaves,</div><div class='add'>+	RTL8365MB_MIB_outMldGeneralQuery,</div><div class='add'>+	RTL8365MB_MIB_outMldSpecificQuery,</div><div class='add'>+	RTL8365MB_MIB_inKnownMulticastPkts,</div><div class='add'>+	RTL8365MB_MIB_END,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct rtl8365mb_mib_counter {</div><div class='add'>+	u32 offset;</div><div class='add'>+	u32 length;</div><div class='add'>+	const char *name;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define RTL8365MB_MAKE_MIB_COUNTER(_offset, _length, _name) \</div><div class='add'>+		[RTL8365MB_MIB_ ## _name] = { _offset, _length, #_name }</div><div class='add'>+</div><div class='add'>+static struct rtl8365mb_mib_counter rtl8365mb_mib_counters[] = {</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(0, 4, ifInOctets),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(4, 2, dot3StatsFCSErrors),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(6, 2, dot3StatsSymbolErrors),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(8, 2, dot3InPauseFrames),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(10, 2, dot3ControlInUnknownOpcodes),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(12, 2, etherStatsFragments),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(14, 2, etherStatsJabbers),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(16, 2, ifInUcastPkts),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(18, 2, etherStatsDropEvents),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(20, 2, ifInMulticastPkts),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(22, 2, ifInBroadcastPkts),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(24, 2, inMldChecksumError),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(26, 2, inIgmpChecksumError),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(28, 2, inMldSpecificQuery),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(30, 2, inMldGeneralQuery),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(32, 2, inIgmpSpecificQuery),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(34, 2, inIgmpGeneralQuery),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(36, 2, inMldLeaves),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(38, 2, inIgmpLeaves),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(40, 4, etherStatsOctets),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(44, 2, etherStatsUnderSizePkts),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(46, 2, etherOversizeStats),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(48, 2, etherStatsPkts64Octets),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(50, 2, etherStatsPkts65to127Octets),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(52, 2, etherStatsPkts128to255Octets),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(54, 2, etherStatsPkts256to511Octets),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(56, 2, etherStatsPkts512to1023Octets),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(58, 2, etherStatsPkts1024to1518Octets),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(60, 4, ifOutOctets),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(64, 2, dot3StatsSingleCollisionFrames),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(66, 2, dot3StatsMultipleCollisionFrames),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(68, 2, dot3StatsDeferredTransmissions),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(70, 2, dot3StatsLateCollisions),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(72, 2, etherStatsCollisions),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(74, 2, dot3StatsExcessiveCollisions),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(76, 2, dot3OutPauseFrames),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(78, 2, ifOutDiscards),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(80, 2, dot1dTpPortInDiscards),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(82, 2, ifOutUcastPkts),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(84, 2, ifOutMulticastPkts),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(86, 2, ifOutBroadcastPkts),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(88, 2, outOampduPkts),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(90, 2, inOampduPkts),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(92, 4, inIgmpJoinsSuccess),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(96, 2, inIgmpJoinsFail),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(98, 2, inMldJoinsSuccess),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(100, 2, inMldJoinsFail),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(102, 2, inReportSuppressionDrop),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(104, 2, inLeaveSuppressionDrop),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(106, 2, outIgmpReports),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(108, 2, outIgmpLeaves),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(110, 2, outIgmpGeneralQuery),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(112, 2, outIgmpSpecificQuery),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(114, 2, outMldReports),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(116, 2, outMldLeaves),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(118, 2, outMldGeneralQuery),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(120, 2, outMldSpecificQuery),</div><div class='add'>+	RTL8365MB_MAKE_MIB_COUNTER(122, 2, inKnownMulticastPkts),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static_assert(ARRAY_SIZE(rtl8365mb_mib_counters) == RTL8365MB_MIB_END);</div><div class='add'>+</div><div class='add'>+struct rtl8365mb_jam_tbl_entry {</div><div class='add'>+	u16 reg;</div><div class='add'>+	u16 val;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Lifted from the vendor driver sources */</div><div class='add'>+static const struct rtl8365mb_jam_tbl_entry rtl8365mb_init_jam_8365mb_vc[] = {</div><div class='add'>+	{ 0x13EB, 0x15BB }, { 0x1303, 0x06D6 }, { 0x1304, 0x0700 },</div><div class='add'>+	{ 0x13E2, 0x003F }, { 0x13F9, 0x0090 }, { 0x121E, 0x03CA },</div><div class='add'>+	{ 0x1233, 0x0352 }, { 0x1237, 0x00A0 }, { 0x123A, 0x0030 },</div><div class='add'>+	{ 0x1239, 0x0084 }, { 0x0301, 0x1000 }, { 0x1349, 0x001F },</div><div class='add'>+	{ 0x18E0, 0x4004 }, { 0x122B, 0x241C }, { 0x1305, 0xC000 },</div><div class='add'>+	{ 0x13F0, 0x0000 },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct rtl8365mb_jam_tbl_entry rtl8365mb_init_jam_common[] = {</div><div class='add'>+	{ 0x1200, 0x7FCB }, { 0x0884, 0x0003 }, { 0x06EB, 0x0001 },</div><div class='add'>+	{ 0x03Fa, 0x0007 }, { 0x08C8, 0x00C0 }, { 0x0A30, 0x020E },</div><div class='add'>+	{ 0x0800, 0x0000 }, { 0x0802, 0x0000 }, { 0x09DA, 0x0013 },</div><div class='add'>+	{ 0x1D32, 0x0002 },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum rtl8365mb_phy_interface_mode {</div><div class='add'>+	RTL8365MB_PHY_INTERFACE_MODE_INVAL = 0,</div><div class='add'>+	RTL8365MB_PHY_INTERFACE_MODE_INTERNAL = BIT(0),</div><div class='add'>+	RTL8365MB_PHY_INTERFACE_MODE_MII = BIT(1),</div><div class='add'>+	RTL8365MB_PHY_INTERFACE_MODE_TMII = BIT(2),</div><div class='add'>+	RTL8365MB_PHY_INTERFACE_MODE_RMII = BIT(3),</div><div class='add'>+	RTL8365MB_PHY_INTERFACE_MODE_RGMII = BIT(4),</div><div class='add'>+	RTL8365MB_PHY_INTERFACE_MODE_SGMII = BIT(5),</div><div class='add'>+	RTL8365MB_PHY_INTERFACE_MODE_HSGMII = BIT(6),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct rtl8365mb_extint - external interface info</div><div class='add'>+ * @port: the port with an external interface</div><div class='add'>+ * @id: the external interface ID, which is either 0, 1, or 2</div><div class='add'>+ * @supported_interfaces: a bitmask of supported PHY interface modes</div><div class='add'>+ *</div><div class='add'>+ * Represents a mapping: port -&gt; { id, supported_interfaces }. To be embedded</div><div class='add'>+ * in &amp;struct rtl8365mb_chip_info for every port with an external interface.</div><div class='add'>+ */</div><div class='add'>+struct rtl8365mb_extint {</div><div class='add'>+	int port;</div><div class='add'>+	int id;</div><div class='add'>+	unsigned int supported_interfaces;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct rtl8365mb_chip_info - static chip-specific info</div><div class='add'>+ * @name: human-readable chip name</div><div class='add'>+ * @chip_id: chip identifier</div><div class='add'>+ * @chip_ver: chip silicon revision</div><div class='add'>+ * @extints: available external interfaces</div><div class='add'>+ * @jam_table: chip-specific initialization jam table</div><div class='add'>+ * @jam_size: size of the chip's jam table</div><div class='add'>+ *</div><div class='add'>+ * These data are specific to a given chip in the family of switches supported</div><div class='add'>+ * by this driver. When adding support for another chip in the family, a new</div><div class='add'>+ * chip info should be added to the rtl8365mb_chip_infos array.</div><div class='add'>+ */</div><div class='add'>+struct rtl8365mb_chip_info {</div><div class='add'>+	const char *name;</div><div class='add'>+	u32 chip_id;</div><div class='add'>+	u32 chip_ver;</div><div class='add'>+	const struct rtl8365mb_extint extints[RTL8365MB_MAX_NUM_EXTINTS];</div><div class='add'>+	const struct rtl8365mb_jam_tbl_entry *jam_table;</div><div class='add'>+	size_t jam_size;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Chip info for each supported switch in the family */</div><div class='add'>+#define PHY_INTF(_mode) (RTL8365MB_PHY_INTERFACE_MODE_ ## _mode)</div><div class='add'>+static const struct rtl8365mb_chip_info rtl8365mb_chip_infos[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "RTL8365MB-VC",</div><div class='add'>+		.chip_id = 0x6367,</div><div class='add'>+		.chip_ver = 0x0040,</div><div class='add'>+		.extints = {</div><div class='add'>+			{ 6, 1, PHY_INTF(MII) | PHY_INTF(TMII) |</div><div class='add'>+				PHY_INTF(RMII) | PHY_INTF(RGMII) },</div><div class='add'>+		},</div><div class='add'>+		.jam_table = rtl8365mb_init_jam_8365mb_vc,</div><div class='add'>+		.jam_size = ARRAY_SIZE(rtl8365mb_init_jam_8365mb_vc),</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "RTL8367S",</div><div class='add'>+		.chip_id = 0x6367,</div><div class='add'>+		.chip_ver = 0x00A0,</div><div class='add'>+		.extints = {</div><div class='add'>+			{ 6, 1, PHY_INTF(SGMII) | PHY_INTF(HSGMII) },</div><div class='add'>+			{ 7, 2, PHY_INTF(MII) | PHY_INTF(TMII) |</div><div class='add'>+				PHY_INTF(RMII) | PHY_INTF(RGMII) },</div><div class='add'>+		},</div><div class='add'>+		.jam_table = rtl8365mb_init_jam_8365mb_vc,</div><div class='add'>+		.jam_size = ARRAY_SIZE(rtl8365mb_init_jam_8365mb_vc),</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.name = "RTL8367RB-VB",</div><div class='add'>+		.chip_id = 0x6367,</div><div class='add'>+		.chip_ver = 0x0020,</div><div class='add'>+		.extints = {</div><div class='add'>+			{ 6, 1, PHY_INTF(MII) | PHY_INTF(TMII) |</div><div class='add'>+				PHY_INTF(RMII) | PHY_INTF(RGMII) },</div><div class='add'>+			{ 7, 2, PHY_INTF(MII) | PHY_INTF(TMII) |</div><div class='add'>+				PHY_INTF(RMII) | PHY_INTF(RGMII) },</div><div class='add'>+		},</div><div class='add'>+		.jam_table = rtl8365mb_init_jam_8365mb_vc,</div><div class='add'>+		.jam_size = ARRAY_SIZE(rtl8365mb_init_jam_8365mb_vc),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum rtl8365mb_stp_state {</div><div class='add'>+	RTL8365MB_STP_STATE_DISABLED = 0,</div><div class='add'>+	RTL8365MB_STP_STATE_BLOCKING = 1,</div><div class='add'>+	RTL8365MB_STP_STATE_LEARNING = 2,</div><div class='add'>+	RTL8365MB_STP_STATE_FORWARDING = 3,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum rtl8365mb_cpu_insert {</div><div class='add'>+	RTL8365MB_CPU_INSERT_TO_ALL = 0,</div><div class='add'>+	RTL8365MB_CPU_INSERT_TO_TRAPPING = 1,</div><div class='add'>+	RTL8365MB_CPU_INSERT_TO_NONE = 2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum rtl8365mb_cpu_position {</div><div class='add'>+	RTL8365MB_CPU_POS_AFTER_SA = 0,</div><div class='add'>+	RTL8365MB_CPU_POS_BEFORE_CRC = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum rtl8365mb_cpu_format {</div><div class='add'>+	RTL8365MB_CPU_FORMAT_8BYTES = 0,</div><div class='add'>+	RTL8365MB_CPU_FORMAT_4BYTES = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum rtl8365mb_cpu_rxlen {</div><div class='add'>+	RTL8365MB_CPU_RXLEN_72BYTES = 0,</div><div class='add'>+	RTL8365MB_CPU_RXLEN_64BYTES = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct rtl8365mb_cpu - CPU port configuration</div><div class='add'>+ * @enable: enable/disable hardware insertion of CPU tag in switch-&gt;CPU frames</div><div class='add'>+ * @mask: port mask of ports that parse should parse CPU tags</div><div class='add'>+ * @trap_port: forward trapped frames to this port</div><div class='add'>+ * @insert: CPU tag insertion mode in switch-&gt;CPU frames</div><div class='add'>+ * @position: position of CPU tag in frame</div><div class='add'>+ * @rx_length: minimum CPU RX length</div><div class='add'>+ * @format: CPU tag format</div><div class='add'>+ *</div><div class='add'>+ * Represents the CPU tagging and CPU port configuration of the switch. These</div><div class='add'>+ * settings are configurable at runtime.</div><div class='add'>+ */</div><div class='add'>+struct rtl8365mb_cpu {</div><div class='add'>+	bool enable;</div><div class='add'>+	u32 mask;</div><div class='add'>+	u32 trap_port;</div><div class='add'>+	enum rtl8365mb_cpu_insert insert;</div><div class='add'>+	enum rtl8365mb_cpu_position position;</div><div class='add'>+	enum rtl8365mb_cpu_rxlen rx_length;</div><div class='add'>+	enum rtl8365mb_cpu_format format;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct rtl8365mb_port - private per-port data</div><div class='add'>+ * @priv: pointer to parent realtek_priv data</div><div class='add'>+ * @index: DSA port index, same as dsa_port::index</div><div class='add'>+ * @stats: link statistics populated by rtl8365mb_stats_poll, ready for atomic</div><div class='add'>+ *         access via rtl8365mb_get_stats64</div><div class='add'>+ * @stats_lock: protect the stats structure during read/update</div><div class='add'>+ * @mib_work: delayed work for polling MIB counters</div><div class='add'>+ */</div><div class='add'>+struct rtl8365mb_port {</div><div class='add'>+	struct realtek_priv *priv;</div><div class='add'>+	unsigned int index;</div><div class='add'>+	struct rtnl_link_stats64 stats;</div><div class='add'>+	spinlock_t stats_lock;</div><div class='add'>+	struct delayed_work mib_work;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct rtl8365mb - driver private data</div><div class='add'>+ * @priv: pointer to parent realtek_priv data</div><div class='add'>+ * @irq: registered IRQ or zero</div><div class='add'>+ * @chip_info: chip-specific info about the attached switch</div><div class='add'>+ * @cpu: CPU tagging and CPU port configuration for this chip</div><div class='add'>+ * @mib_lock: prevent concurrent reads of MIB counters</div><div class='add'>+ * @ports: per-port data</div><div class='add'>+ *</div><div class='add'>+ * Private data for this driver.</div><div class='add'>+ */</div><div class='add'>+struct rtl8365mb {</div><div class='add'>+	struct realtek_priv *priv;</div><div class='add'>+	int irq;</div><div class='add'>+	const struct rtl8365mb_chip_info *chip_info;</div><div class='add'>+	struct rtl8365mb_cpu cpu;</div><div class='add'>+	struct mutex mib_lock;</div><div class='add'>+	struct rtl8365mb_port ports[RTL8365MB_MAX_NUM_PORTS];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int rtl8365mb_phy_poll_busy(struct realtek_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	return regmap_read_poll_timeout(priv-&gt;map_nolock,</div><div class='add'>+					RTL8365MB_INDIRECT_ACCESS_STATUS_REG,</div><div class='add'>+					val, !val, 10, 100);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8365mb_phy_ocp_prepare(struct realtek_priv *priv, int phy,</div><div class='add'>+				     u32 ocp_addr)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Set OCP prefix */</div><div class='add'>+	val = FIELD_GET(RTL8365MB_PHY_OCP_ADDR_PREFIX_MASK, ocp_addr);</div><div class='add'>+	ret = regmap_update_bits(</div><div class='add'>+		priv-&gt;map_nolock, RTL8365MB_GPHY_OCP_MSB_0_REG,</div><div class='add'>+		RTL8365MB_GPHY_OCP_MSB_0_CFG_CPU_OCPADR_MASK,</div><div class='add'>+		FIELD_PREP(RTL8365MB_GPHY_OCP_MSB_0_CFG_CPU_OCPADR_MASK, val));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Set PHY register address */</div><div class='add'>+	val = RTL8365MB_PHY_BASE;</div><div class='add'>+	val |= FIELD_PREP(RTL8365MB_INDIRECT_ACCESS_ADDRESS_PHYNUM_MASK, phy);</div><div class='add'>+	val |= FIELD_PREP(RTL8365MB_INDIRECT_ACCESS_ADDRESS_OCPADR_5_1_MASK,</div><div class='add'>+			  ocp_addr &gt;&gt; 1);</div><div class='add'>+	val |= FIELD_PREP(RTL8365MB_INDIRECT_ACCESS_ADDRESS_OCPADR_9_6_MASK,</div><div class='add'>+			  ocp_addr &gt;&gt; 6);</div><div class='add'>+	ret = regmap_write(priv-&gt;map_nolock,</div><div class='add'>+			   RTL8365MB_INDIRECT_ACCESS_ADDRESS_REG, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8365mb_phy_ocp_read(struct realtek_priv *priv, int phy,</div><div class='add'>+				  u32 ocp_addr, u16 *data)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	rtl83xx_lock(priv);</div><div class='add'>+</div><div class='add'>+	ret = rtl8365mb_phy_poll_busy(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ret = rtl8365mb_phy_ocp_prepare(priv, phy, ocp_addr);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* Execute read operation */</div><div class='add'>+	val = FIELD_PREP(RTL8365MB_INDIRECT_ACCESS_CTRL_CMD_MASK,</div><div class='add'>+			 RTL8365MB_INDIRECT_ACCESS_CTRL_CMD_VALUE) |</div><div class='add'>+	      FIELD_PREP(RTL8365MB_INDIRECT_ACCESS_CTRL_RW_MASK,</div><div class='add'>+			 RTL8365MB_INDIRECT_ACCESS_CTRL_RW_READ);</div><div class='add'>+	ret = regmap_write(priv-&gt;map_nolock, RTL8365MB_INDIRECT_ACCESS_CTRL_REG,</div><div class='add'>+			   val);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ret = rtl8365mb_phy_poll_busy(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* Get PHY register data */</div><div class='add'>+	ret = regmap_read(priv-&gt;map_nolock,</div><div class='add'>+			  RTL8365MB_INDIRECT_ACCESS_READ_DATA_REG, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	*data = val &amp; 0xFFFF;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	rtl83xx_unlock(priv);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8365mb_phy_ocp_write(struct realtek_priv *priv, int phy,</div><div class='add'>+				   u32 ocp_addr, u16 data)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	rtl83xx_lock(priv);</div><div class='add'>+</div><div class='add'>+	ret = rtl8365mb_phy_poll_busy(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ret = rtl8365mb_phy_ocp_prepare(priv, phy, ocp_addr);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* Set PHY register data */</div><div class='add'>+	ret = regmap_write(priv-&gt;map_nolock,</div><div class='add'>+			   RTL8365MB_INDIRECT_ACCESS_WRITE_DATA_REG, data);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* Execute write operation */</div><div class='add'>+	val = FIELD_PREP(RTL8365MB_INDIRECT_ACCESS_CTRL_CMD_MASK,</div><div class='add'>+			 RTL8365MB_INDIRECT_ACCESS_CTRL_CMD_VALUE) |</div><div class='add'>+	      FIELD_PREP(RTL8365MB_INDIRECT_ACCESS_CTRL_RW_MASK,</div><div class='add'>+			 RTL8365MB_INDIRECT_ACCESS_CTRL_RW_WRITE);</div><div class='add'>+	ret = regmap_write(priv-&gt;map_nolock, RTL8365MB_INDIRECT_ACCESS_CTRL_REG,</div><div class='add'>+			   val);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ret = rtl8365mb_phy_poll_busy(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	rtl83xx_unlock(priv);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8365mb_phy_read(struct realtek_priv *priv, int phy, int regnum)</div><div class='add'>+{</div><div class='add'>+	u32 ocp_addr;</div><div class='add'>+	u16 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (phy &gt; RTL8365MB_PHYADDRMAX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (regnum &gt; RTL8365MB_PHYREGMAX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ocp_addr = RTL8365MB_PHY_OCP_ADDR_PHYREG_BASE + regnum * 2;</div><div class='add'>+</div><div class='add'>+	ret = rtl8365mb_phy_ocp_read(priv, phy, ocp_addr, &amp;val);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(priv-&gt;dev,</div><div class='add'>+			"failed to read PHY%d reg %02x @ %04x, ret %d\n", phy,</div><div class='add'>+			regnum, ocp_addr, ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(priv-&gt;dev, "read PHY%d register 0x%02x @ %04x, val &lt;- %04x\n",</div><div class='add'>+		phy, regnum, ocp_addr, val);</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8365mb_phy_write(struct realtek_priv *priv, int phy, int regnum,</div><div class='add'>+			       u16 val)</div><div class='add'>+{</div><div class='add'>+	u32 ocp_addr;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (phy &gt; RTL8365MB_PHYADDRMAX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (regnum &gt; RTL8365MB_PHYREGMAX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ocp_addr = RTL8365MB_PHY_OCP_ADDR_PHYREG_BASE + regnum * 2;</div><div class='add'>+</div><div class='add'>+	ret = rtl8365mb_phy_ocp_write(priv, phy, ocp_addr, val);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(priv-&gt;dev,</div><div class='add'>+			"failed to write PHY%d reg %02x @ %04x, ret %d\n", phy,</div><div class='add'>+			regnum, ocp_addr, ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(priv-&gt;dev, "write PHY%d register 0x%02x @ %04x, val -&gt; %04x\n",</div><div class='add'>+		phy, regnum, ocp_addr, val);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct rtl8365mb_extint *</div><div class='add'>+rtl8365mb_get_port_extint(struct realtek_priv *priv, int port)</div><div class='add'>+{</div><div class='add'>+	struct rtl8365mb *mb = priv-&gt;chip_data;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; RTL8365MB_MAX_NUM_EXTINTS; i++) {</div><div class='add'>+		const struct rtl8365mb_extint *extint =</div><div class='add'>+			&amp;mb-&gt;chip_info-&gt;extints[i];</div><div class='add'>+</div><div class='add'>+		if (!extint-&gt;supported_interfaces)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (extint-&gt;port == port)</div><div class='add'>+			return extint;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum dsa_tag_protocol</div><div class='add'>+rtl8365mb_get_tag_protocol(struct dsa_switch *ds, int port,</div><div class='add'>+			   enum dsa_tag_protocol mp)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = ds-&gt;priv;</div><div class='add'>+	struct rtl8365mb_cpu *cpu;</div><div class='add'>+	struct rtl8365mb *mb;</div><div class='add'>+</div><div class='add'>+	mb = priv-&gt;chip_data;</div><div class='add'>+	cpu = &amp;mb-&gt;cpu;</div><div class='add'>+</div><div class='add'>+	if (cpu-&gt;position == RTL8365MB_CPU_POS_BEFORE_CRC)</div><div class='add'>+		return DSA_TAG_PROTO_RTL8_4T;</div><div class='add'>+</div><div class='add'>+	return DSA_TAG_PROTO_RTL8_4;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8365mb_ext_config_rgmii(struct realtek_priv *priv, int port,</div><div class='add'>+				      phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	const struct rtl8365mb_extint *extint =</div><div class='add'>+		rtl8365mb_get_port_extint(priv, port);</div><div class='add'>+	struct dsa_switch *ds = &amp;priv-&gt;ds;</div><div class='add'>+	struct device_node *dn;</div><div class='add'>+	struct dsa_port *dp;</div><div class='add'>+	int tx_delay = 0;</div><div class='add'>+	int rx_delay = 0;</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!extint)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	dp = dsa_to_port(ds, port);</div><div class='add'>+	dn = dp-&gt;dn;</div><div class='add'>+</div><div class='add'>+	/* Set the RGMII TX/RX delay</div><div class='add'>+	 *</div><div class='add'>+	 * The Realtek vendor driver indicates the following possible</div><div class='add'>+	 * configuration settings:</div><div class='add'>+	 *</div><div class='add'>+	 *   TX delay:</div><div class='add'>+	 *     0 = no delay, 1 = 2 ns delay</div><div class='add'>+	 *   RX delay:</div><div class='add'>+	 *     0 = no delay, 7 = maximum delay</div><div class='add'>+	 *     Each step is approximately 0.3 ns, so the maximum delay is about</div><div class='add'>+	 *     2.1 ns.</div><div class='add'>+	 *</div><div class='add'>+	 * The vendor driver also states that this must be configured *before*</div><div class='add'>+	 * forcing the external interface into a particular mode, which is done</div><div class='add'>+	 * in the rtl8365mb_phylink_mac_link_{up,down} functions.</div><div class='add'>+	 *</div><div class='add'>+	 * Only configure an RGMII TX (resp. RX) delay if the</div><div class='add'>+	 * tx-internal-delay-ps (resp. rx-internal-delay-ps) OF property is</div><div class='add'>+	 * specified. We ignore the detail of the RGMII interface mode</div><div class='add'>+	 * (RGMII_{RXID, TXID, etc.}), as this is considered to be a PHY-only</div><div class='add'>+	 * property.</div><div class='add'>+	 */</div><div class='add'>+	if (!of_property_read_u32(dn, "tx-internal-delay-ps", &amp;val)) {</div><div class='add'>+		val = val / 1000; /* convert to ns */</div><div class='add'>+</div><div class='add'>+		if (val == 0 || val == 2)</div><div class='add'>+			tx_delay = val / 2;</div><div class='add'>+		else</div><div class='add'>+			dev_warn(priv-&gt;dev,</div><div class='add'>+				 "RGMII TX delay must be 0 or 2 ns\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!of_property_read_u32(dn, "rx-internal-delay-ps", &amp;val)) {</div><div class='add'>+		val = DIV_ROUND_CLOSEST(val, 300); /* convert to 0.3 ns step */</div><div class='add'>+</div><div class='add'>+		if (val &lt;= 7)</div><div class='add'>+			rx_delay = val;</div><div class='add'>+		else</div><div class='add'>+			dev_warn(priv-&gt;dev,</div><div class='add'>+				 "RGMII RX delay must be 0 to 2.1 ns\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = regmap_update_bits(</div><div class='add'>+		priv-&gt;map, RTL8365MB_EXT_RGMXF_REG(extint-&gt;id),</div><div class='add'>+		RTL8365MB_EXT_RGMXF_TXDELAY_MASK |</div><div class='add'>+			RTL8365MB_EXT_RGMXF_RXDELAY_MASK,</div><div class='add'>+		FIELD_PREP(RTL8365MB_EXT_RGMXF_TXDELAY_MASK, tx_delay) |</div><div class='add'>+			FIELD_PREP(RTL8365MB_EXT_RGMXF_RXDELAY_MASK, rx_delay));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_update_bits(</div><div class='add'>+		priv-&gt;map, RTL8365MB_DIGITAL_INTERFACE_SELECT_REG(extint-&gt;id),</div><div class='add'>+		RTL8365MB_DIGITAL_INTERFACE_SELECT_MODE_MASK(extint-&gt;id),</div><div class='add'>+		RTL8365MB_EXT_PORT_MODE_RGMII</div><div class='add'>+			&lt;&lt; RTL8365MB_DIGITAL_INTERFACE_SELECT_MODE_OFFSET(</div><div class='add'>+				   extint-&gt;id));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8365mb_ext_config_forcemode(struct realtek_priv *priv, int port,</div><div class='add'>+					  bool link, int speed, int duplex,</div><div class='add'>+					  bool tx_pause, bool rx_pause)</div><div class='add'>+{</div><div class='add'>+	const struct rtl8365mb_extint *extint =</div><div class='add'>+		rtl8365mb_get_port_extint(priv, port);</div><div class='add'>+	u32 r_tx_pause;</div><div class='add'>+	u32 r_rx_pause;</div><div class='add'>+	u32 r_duplex;</div><div class='add'>+	u32 r_speed;</div><div class='add'>+	u32 r_link;</div><div class='add'>+	int val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!extint)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	if (link) {</div><div class='add'>+		/* Force the link up with the desired configuration */</div><div class='add'>+		r_link = 1;</div><div class='add'>+		r_rx_pause = rx_pause ? 1 : 0;</div><div class='add'>+		r_tx_pause = tx_pause ? 1 : 0;</div><div class='add'>+</div><div class='add'>+		if (speed == SPEED_1000) {</div><div class='add'>+			r_speed = RTL8365MB_PORT_SPEED_1000M;</div><div class='add'>+		} else if (speed == SPEED_100) {</div><div class='add'>+			r_speed = RTL8365MB_PORT_SPEED_100M;</div><div class='add'>+		} else if (speed == SPEED_10) {</div><div class='add'>+			r_speed = RTL8365MB_PORT_SPEED_10M;</div><div class='add'>+		} else {</div><div class='add'>+			dev_err(priv-&gt;dev, "unsupported port speed %s\n",</div><div class='add'>+				phy_speed_to_str(speed));</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (duplex == DUPLEX_FULL) {</div><div class='add'>+			r_duplex = 1;</div><div class='add'>+		} else if (duplex == DUPLEX_HALF) {</div><div class='add'>+			r_duplex = 0;</div><div class='add'>+		} else {</div><div class='add'>+			dev_err(priv-&gt;dev, "unsupported duplex %s\n",</div><div class='add'>+				phy_duplex_to_str(duplex));</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		/* Force the link down and reset any programmed configuration */</div><div class='add'>+		r_link = 0;</div><div class='add'>+		r_tx_pause = 0;</div><div class='add'>+		r_rx_pause = 0;</div><div class='add'>+		r_speed = 0;</div><div class='add'>+		r_duplex = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	val = FIELD_PREP(RTL8365MB_DIGITAL_INTERFACE_FORCE_EN_MASK, 1) |</div><div class='add'>+	      FIELD_PREP(RTL8365MB_DIGITAL_INTERFACE_FORCE_TXPAUSE_MASK,</div><div class='add'>+			 r_tx_pause) |</div><div class='add'>+	      FIELD_PREP(RTL8365MB_DIGITAL_INTERFACE_FORCE_RXPAUSE_MASK,</div><div class='add'>+			 r_rx_pause) |</div><div class='add'>+	      FIELD_PREP(RTL8365MB_DIGITAL_INTERFACE_FORCE_LINK_MASK, r_link) |</div><div class='add'>+	      FIELD_PREP(RTL8365MB_DIGITAL_INTERFACE_FORCE_DUPLEX_MASK,</div><div class='add'>+			 r_duplex) |</div><div class='add'>+	      FIELD_PREP(RTL8365MB_DIGITAL_INTERFACE_FORCE_SPEED_MASK, r_speed);</div><div class='add'>+	ret = regmap_write(priv-&gt;map,</div><div class='add'>+			   RTL8365MB_DIGITAL_INTERFACE_FORCE_REG(extint-&gt;id),</div><div class='add'>+			   val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rtl8365mb_phylink_get_caps(struct dsa_switch *ds, int port,</div><div class='add'>+				       struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	const struct rtl8365mb_extint *extint =</div><div class='add'>+		rtl8365mb_get_port_extint(ds-&gt;priv, port);</div><div class='add'>+</div><div class='add'>+	config-&gt;mac_capabilities = MAC_SYM_PAUSE | MAC_ASYM_PAUSE |</div><div class='add'>+				   MAC_10 | MAC_100 | MAC_1000FD;</div><div class='add'>+</div><div class='add'>+	if (!extint) {</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_INTERNAL,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+</div><div class='add'>+		/* GMII is the default interface mode for phylib, so</div><div class='add'>+		 * we have to support it for ports with integrated PHY.</div><div class='add'>+		 */</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_GMII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Populate according to the modes supported by _this driver_,</div><div class='add'>+	 * not necessarily the modes supported by the hardware, some of</div><div class='add'>+	 * which remain unimplemented.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	if (extint-&gt;supported_interfaces &amp; RTL8365MB_PHY_INTERFACE_MODE_RGMII)</div><div class='add'>+		phy_interface_set_rgmii(config-&gt;supported_interfaces);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rtl8365mb_phylink_mac_config(struct phylink_config *config,</div><div class='add'>+					 unsigned int mode,</div><div class='add'>+					 const struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct realtek_priv *priv = dp-&gt;ds-&gt;priv;</div><div class='add'>+	u8 port = dp-&gt;index;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (mode != MLO_AN_PHY &amp;&amp; mode != MLO_AN_FIXED) {</div><div class='add'>+		dev_err(priv-&gt;dev,</div><div class='add'>+			"port %d supports only conventional PHY or fixed-link\n",</div><div class='add'>+			port);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (phy_interface_mode_is_rgmii(state-&gt;interface)) {</div><div class='add'>+		ret = rtl8365mb_ext_config_rgmii(priv, port, state-&gt;interface);</div><div class='add'>+		if (ret)</div><div class='add'>+			dev_err(priv-&gt;dev,</div><div class='add'>+				"failed to configure RGMII mode on port %d: %d\n",</div><div class='add'>+				port, ret);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* TODO: Implement MII and RMII modes, which the RTL8365MB-VC also</div><div class='add'>+	 * supports</div><div class='add'>+	 */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rtl8365mb_phylink_mac_link_down(struct phylink_config *config,</div><div class='add'>+					    unsigned int mode,</div><div class='add'>+					    phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct realtek_priv *priv = dp-&gt;ds-&gt;priv;</div><div class='add'>+	struct rtl8365mb_port *p;</div><div class='add'>+	struct rtl8365mb *mb;</div><div class='add'>+	u8 port = dp-&gt;index;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mb = priv-&gt;chip_data;</div><div class='add'>+	p = &amp;mb-&gt;ports[port];</div><div class='add'>+	cancel_delayed_work_sync(&amp;p-&gt;mib_work);</div><div class='add'>+</div><div class='add'>+	if (phy_interface_mode_is_rgmii(interface)) {</div><div class='add'>+		ret = rtl8365mb_ext_config_forcemode(priv, port, false, 0, 0,</div><div class='add'>+						     false, false);</div><div class='add'>+		if (ret)</div><div class='add'>+			dev_err(priv-&gt;dev,</div><div class='add'>+				"failed to reset forced mode on port %d: %d\n",</div><div class='add'>+				port, ret);</div><div class='add'>+</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rtl8365mb_phylink_mac_link_up(struct phylink_config *config,</div><div class='add'>+					  struct phy_device *phydev,</div><div class='add'>+					  unsigned int mode,</div><div class='add'>+					  phy_interface_t interface,</div><div class='add'>+					  int speed, int duplex, bool tx_pause,</div><div class='add'>+					  bool rx_pause)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct realtek_priv *priv = dp-&gt;ds-&gt;priv;</div><div class='add'>+	struct rtl8365mb_port *p;</div><div class='add'>+	struct rtl8365mb *mb;</div><div class='add'>+	u8 port = dp-&gt;index;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mb = priv-&gt;chip_data;</div><div class='add'>+	p = &amp;mb-&gt;ports[port];</div><div class='add'>+	schedule_delayed_work(&amp;p-&gt;mib_work, 0);</div><div class='add'>+</div><div class='add'>+	if (phy_interface_mode_is_rgmii(interface)) {</div><div class='add'>+		ret = rtl8365mb_ext_config_forcemode(priv, port, true, speed,</div><div class='add'>+						     duplex, tx_pause,</div><div class='add'>+						     rx_pause);</div><div class='add'>+		if (ret)</div><div class='add'>+			dev_err(priv-&gt;dev,</div><div class='add'>+				"failed to force mode on port %d: %d\n", port,</div><div class='add'>+				ret);</div><div class='add'>+</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8365mb_port_change_mtu(struct dsa_switch *ds, int port,</div><div class='add'>+				     int new_mtu)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = ds-&gt;priv;</div><div class='add'>+	int frame_size;</div><div class='add'>+</div><div class='add'>+	/* When a new MTU is set, DSA always sets the CPU port's MTU to the</div><div class='add'>+	 * largest MTU of the user ports. Because the switch only has a global</div><div class='add'>+	 * RX length register, only allowing CPU port here is enough.</div><div class='add'>+	 */</div><div class='add'>+	if (!dsa_is_cpu_port(ds, port))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	frame_size = new_mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;</div><div class='add'>+</div><div class='add'>+	dev_dbg(priv-&gt;dev, "changing mtu to %d (frame size: %d)\n",</div><div class='add'>+		new_mtu, frame_size);</div><div class='add'>+</div><div class='add'>+	return regmap_update_bits(priv-&gt;map, RTL8365MB_CFG0_MAX_LEN_REG,</div><div class='add'>+				  RTL8365MB_CFG0_MAX_LEN_MASK,</div><div class='add'>+				  FIELD_PREP(RTL8365MB_CFG0_MAX_LEN_MASK,</div><div class='add'>+					     frame_size));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8365mb_port_max_mtu(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	return RTL8365MB_CFG0_MAX_LEN_MAX - VLAN_ETH_HLEN - ETH_FCS_LEN;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rtl8365mb_port_stp_state_set(struct dsa_switch *ds, int port,</div><div class='add'>+					 u8 state)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = ds-&gt;priv;</div><div class='add'>+	enum rtl8365mb_stp_state val;</div><div class='add'>+	int msti = 0;</div><div class='add'>+</div><div class='add'>+	switch (state) {</div><div class='add'>+	case BR_STATE_DISABLED:</div><div class='add'>+		val = RTL8365MB_STP_STATE_DISABLED;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_BLOCKING:</div><div class='add'>+	case BR_STATE_LISTENING:</div><div class='add'>+		val = RTL8365MB_STP_STATE_BLOCKING;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_LEARNING:</div><div class='add'>+		val = RTL8365MB_STP_STATE_LEARNING;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_FORWARDING:</div><div class='add'>+		val = RTL8365MB_STP_STATE_FORWARDING;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(priv-&gt;dev, "invalid STP state: %u\n", state);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	regmap_update_bits(priv-&gt;map, RTL8365MB_MSTI_CTRL_REG(msti, port),</div><div class='add'>+			   RTL8365MB_MSTI_CTRL_PORT_STATE_MASK(port),</div><div class='add'>+			   val &lt;&lt; RTL8365MB_MSTI_CTRL_PORT_STATE_OFFSET(port));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8365mb_port_set_learning(struct realtek_priv *priv, int port,</div><div class='add'>+				       bool enable)</div><div class='add'>+{</div><div class='add'>+	/* Enable/disable learning by limiting the number of L2 addresses the</div><div class='add'>+	 * port can learn. Realtek documentation states that a limit of zero</div><div class='add'>+	 * disables learning. When enabling learning, set it to the chip's</div><div class='add'>+	 * maximum.</div><div class='add'>+	 */</div><div class='add'>+	return regmap_write(priv-&gt;map, RTL8365MB_LUT_PORT_LEARN_LIMIT_REG(port),</div><div class='add'>+			    enable ? RTL8365MB_LEARN_LIMIT_MAX : 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8365mb_port_set_isolation(struct realtek_priv *priv, int port,</div><div class='add'>+					u32 mask)</div><div class='add'>+{</div><div class='add'>+	return regmap_write(priv-&gt;map, RTL8365MB_PORT_ISOLATION_REG(port), mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8365mb_mib_counter_read(struct realtek_priv *priv, int port,</div><div class='add'>+				      u32 offset, u32 length, u64 *mibvalue)</div><div class='add'>+{</div><div class='add'>+	u64 tmpvalue = 0;</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* The MIB address is an SRAM address. We request a particular address</div><div class='add'>+	 * and then poll the control register before reading the value from some</div><div class='add'>+	 * counter registers.</div><div class='add'>+	 */</div><div class='add'>+	ret = regmap_write(priv-&gt;map, RTL8365MB_MIB_ADDRESS_REG,</div><div class='add'>+			   RTL8365MB_MIB_ADDRESS(port, offset));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Poll for completion */</div><div class='add'>+	ret = regmap_read_poll_timeout(priv-&gt;map, RTL8365MB_MIB_CTRL0_REG, val,</div><div class='add'>+				       !(val &amp; RTL8365MB_MIB_CTRL0_BUSY_MASK),</div><div class='add'>+				       10, 100);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Presumably this indicates a MIB counter read failure */</div><div class='add'>+	if (val &amp; RTL8365MB_MIB_CTRL0_RESET_MASK)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	/* There are four MIB counter registers each holding a 16 bit word of a</div><div class='add'>+	 * MIB counter. Depending on the offset, we should read from the upper</div><div class='add'>+	 * two or lower two registers. In case the MIB counter is 4 words, we</div><div class='add'>+	 * read from all four registers.</div><div class='add'>+	 */</div><div class='add'>+	if (length == 4)</div><div class='add'>+		offset = 3;</div><div class='add'>+	else</div><div class='add'>+		offset = (offset + 1) % 4;</div><div class='add'>+</div><div class='add'>+	/* Read the MIB counter 16 bits at a time */</div><div class='add'>+	for (i = 0; i &lt; length; i++) {</div><div class='add'>+		ret = regmap_read(priv-&gt;map,</div><div class='add'>+				  RTL8365MB_MIB_COUNTER_REG(offset - i), &amp;val);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		tmpvalue = ((tmpvalue) &lt;&lt; 16) | (val &amp; 0xFFFF);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Only commit the result if no error occurred */</div><div class='add'>+	*mibvalue = tmpvalue;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rtl8365mb_get_ethtool_stats(struct dsa_switch *ds, int port, u64 *data)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = ds-&gt;priv;</div><div class='add'>+	struct rtl8365mb *mb;</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	mb = priv-&gt;chip_data;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;mb-&gt;mib_lock);</div><div class='add'>+	for (i = 0; i &lt; RTL8365MB_MIB_END; i++) {</div><div class='add'>+		struct rtl8365mb_mib_counter *mib = &amp;rtl8365mb_mib_counters[i];</div><div class='add'>+</div><div class='add'>+		ret = rtl8365mb_mib_counter_read(priv, port, mib-&gt;offset,</div><div class='add'>+						 mib-&gt;length, &amp;data[i]);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(priv-&gt;dev,</div><div class='add'>+				"failed to read port %d counters: %d\n", port,</div><div class='add'>+				ret);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;mb-&gt;mib_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rtl8365mb_get_strings(struct dsa_switch *ds, int port, u32 stringset, u8 *data)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (stringset != ETH_SS_STATS)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; RTL8365MB_MIB_END; i++) {</div><div class='add'>+		struct rtl8365mb_mib_counter *mib = &amp;rtl8365mb_mib_counters[i];</div><div class='add'>+		ethtool_puts(&amp;data, mib-&gt;name);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8365mb_get_sset_count(struct dsa_switch *ds, int port, int sset)</div><div class='add'>+{</div><div class='add'>+	if (sset != ETH_SS_STATS)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return RTL8365MB_MIB_END;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rtl8365mb_get_phy_stats(struct dsa_switch *ds, int port,</div><div class='add'>+				    struct ethtool_eth_phy_stats *phy_stats)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = ds-&gt;priv;</div><div class='add'>+	struct rtl8365mb_mib_counter *mib;</div><div class='add'>+	struct rtl8365mb *mb;</div><div class='add'>+</div><div class='add'>+	mb = priv-&gt;chip_data;</div><div class='add'>+	mib = &amp;rtl8365mb_mib_counters[RTL8365MB_MIB_dot3StatsSymbolErrors];</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;mb-&gt;mib_lock);</div><div class='add'>+	rtl8365mb_mib_counter_read(priv, port, mib-&gt;offset, mib-&gt;length,</div><div class='add'>+				   &amp;phy_stats-&gt;SymbolErrorDuringCarrier);</div><div class='add'>+	mutex_unlock(&amp;mb-&gt;mib_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rtl8365mb_get_mac_stats(struct dsa_switch *ds, int port,</div><div class='add'>+				    struct ethtool_eth_mac_stats *mac_stats)</div><div class='add'>+{</div><div class='add'>+	u64 cnt[RTL8365MB_MIB_END] = {</div><div class='add'>+		[RTL8365MB_MIB_ifOutOctets] = 1,</div><div class='add'>+		[RTL8365MB_MIB_ifOutUcastPkts] = 1,</div><div class='add'>+		[RTL8365MB_MIB_ifOutMulticastPkts] = 1,</div><div class='add'>+		[RTL8365MB_MIB_ifOutBroadcastPkts] = 1,</div><div class='add'>+		[RTL8365MB_MIB_dot3OutPauseFrames] = 1,</div><div class='add'>+		[RTL8365MB_MIB_ifOutDiscards] = 1,</div><div class='add'>+		[RTL8365MB_MIB_ifInOctets] = 1,</div><div class='add'>+		[RTL8365MB_MIB_ifInUcastPkts] = 1,</div><div class='add'>+		[RTL8365MB_MIB_ifInMulticastPkts] = 1,</div><div class='add'>+		[RTL8365MB_MIB_ifInBroadcastPkts] = 1,</div><div class='add'>+		[RTL8365MB_MIB_dot3InPauseFrames] = 1,</div><div class='add'>+		[RTL8365MB_MIB_dot3StatsSingleCollisionFrames] = 1,</div><div class='add'>+		[RTL8365MB_MIB_dot3StatsMultipleCollisionFrames] = 1,</div><div class='add'>+		[RTL8365MB_MIB_dot3StatsFCSErrors] = 1,</div><div class='add'>+		[RTL8365MB_MIB_dot3StatsDeferredTransmissions] = 1,</div><div class='add'>+		[RTL8365MB_MIB_dot3StatsLateCollisions] = 1,</div><div class='add'>+		[RTL8365MB_MIB_dot3StatsExcessiveCollisions] = 1,</div><div class='add'>+</div><div class='add'>+	};</div><div class='add'>+	struct realtek_priv *priv = ds-&gt;priv;</div><div class='add'>+	struct rtl8365mb *mb;</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	mb = priv-&gt;chip_data;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;mb-&gt;mib_lock);</div><div class='add'>+	for (i = 0; i &lt; RTL8365MB_MIB_END; i++) {</div><div class='add'>+		struct rtl8365mb_mib_counter *mib = &amp;rtl8365mb_mib_counters[i];</div><div class='add'>+</div><div class='add'>+		/* Only fetch required MIB counters (marked = 1 above) */</div><div class='add'>+		if (!cnt[i])</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		ret = rtl8365mb_mib_counter_read(priv, port, mib-&gt;offset,</div><div class='add'>+						 mib-&gt;length, &amp;cnt[i]);</div><div class='add'>+		if (ret)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;mb-&gt;mib_lock);</div><div class='add'>+</div><div class='add'>+	/* The RTL8365MB-VC exposes MIB objects, which we have to translate into</div><div class='add'>+	 * IEEE 802.3 Managed Objects. This is not always completely faithful,</div><div class='add'>+	 * but we try out best. See RFC 3635 for a detailed treatment of the</div><div class='add'>+	 * subject.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	mac_stats-&gt;FramesTransmittedOK = cnt[RTL8365MB_MIB_ifOutUcastPkts] +</div><div class='add'>+					 cnt[RTL8365MB_MIB_ifOutMulticastPkts] +</div><div class='add'>+					 cnt[RTL8365MB_MIB_ifOutBroadcastPkts] +</div><div class='add'>+					 cnt[RTL8365MB_MIB_dot3OutPauseFrames] -</div><div class='add'>+					 cnt[RTL8365MB_MIB_ifOutDiscards];</div><div class='add'>+	mac_stats-&gt;SingleCollisionFrames =</div><div class='add'>+		cnt[RTL8365MB_MIB_dot3StatsSingleCollisionFrames];</div><div class='add'>+	mac_stats-&gt;MultipleCollisionFrames =</div><div class='add'>+		cnt[RTL8365MB_MIB_dot3StatsMultipleCollisionFrames];</div><div class='add'>+	mac_stats-&gt;FramesReceivedOK = cnt[RTL8365MB_MIB_ifInUcastPkts] +</div><div class='add'>+				      cnt[RTL8365MB_MIB_ifInMulticastPkts] +</div><div class='add'>+				      cnt[RTL8365MB_MIB_ifInBroadcastPkts] +</div><div class='add'>+				      cnt[RTL8365MB_MIB_dot3InPauseFrames];</div><div class='add'>+	mac_stats-&gt;FrameCheckSequenceErrors =</div><div class='add'>+		cnt[RTL8365MB_MIB_dot3StatsFCSErrors];</div><div class='add'>+	mac_stats-&gt;OctetsTransmittedOK = cnt[RTL8365MB_MIB_ifOutOctets] -</div><div class='add'>+					 18 * mac_stats-&gt;FramesTransmittedOK;</div><div class='add'>+	mac_stats-&gt;FramesWithDeferredXmissions =</div><div class='add'>+		cnt[RTL8365MB_MIB_dot3StatsDeferredTransmissions];</div><div class='add'>+	mac_stats-&gt;LateCollisions = cnt[RTL8365MB_MIB_dot3StatsLateCollisions];</div><div class='add'>+	mac_stats-&gt;FramesAbortedDueToXSColls =</div><div class='add'>+		cnt[RTL8365MB_MIB_dot3StatsExcessiveCollisions];</div><div class='add'>+	mac_stats-&gt;OctetsReceivedOK = cnt[RTL8365MB_MIB_ifInOctets] -</div><div class='add'>+				      18 * mac_stats-&gt;FramesReceivedOK;</div><div class='add'>+	mac_stats-&gt;MulticastFramesXmittedOK =</div><div class='add'>+		cnt[RTL8365MB_MIB_ifOutMulticastPkts];</div><div class='add'>+	mac_stats-&gt;BroadcastFramesXmittedOK =</div><div class='add'>+		cnt[RTL8365MB_MIB_ifOutBroadcastPkts];</div><div class='add'>+	mac_stats-&gt;MulticastFramesReceivedOK =</div><div class='add'>+		cnt[RTL8365MB_MIB_ifInMulticastPkts];</div><div class='add'>+	mac_stats-&gt;BroadcastFramesReceivedOK =</div><div class='add'>+		cnt[RTL8365MB_MIB_ifInBroadcastPkts];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rtl8365mb_get_ctrl_stats(struct dsa_switch *ds, int port,</div><div class='add'>+				     struct ethtool_eth_ctrl_stats *ctrl_stats)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = ds-&gt;priv;</div><div class='add'>+	struct rtl8365mb_mib_counter *mib;</div><div class='add'>+	struct rtl8365mb *mb;</div><div class='add'>+</div><div class='add'>+	mb = priv-&gt;chip_data;</div><div class='add'>+	mib = &amp;rtl8365mb_mib_counters[RTL8365MB_MIB_dot3ControlInUnknownOpcodes];</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;mb-&gt;mib_lock);</div><div class='add'>+	rtl8365mb_mib_counter_read(priv, port, mib-&gt;offset, mib-&gt;length,</div><div class='add'>+				   &amp;ctrl_stats-&gt;UnsupportedOpcodesReceived);</div><div class='add'>+	mutex_unlock(&amp;mb-&gt;mib_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rtl8365mb_stats_update(struct realtek_priv *priv, int port)</div><div class='add'>+{</div><div class='add'>+	u64 cnt[RTL8365MB_MIB_END] = {</div><div class='add'>+		[RTL8365MB_MIB_ifOutOctets] = 1,</div><div class='add'>+		[RTL8365MB_MIB_ifOutUcastPkts] = 1,</div><div class='add'>+		[RTL8365MB_MIB_ifOutMulticastPkts] = 1,</div><div class='add'>+		[RTL8365MB_MIB_ifOutBroadcastPkts] = 1,</div><div class='add'>+		[RTL8365MB_MIB_ifOutDiscards] = 1,</div><div class='add'>+		[RTL8365MB_MIB_ifInOctets] = 1,</div><div class='add'>+		[RTL8365MB_MIB_ifInUcastPkts] = 1,</div><div class='add'>+		[RTL8365MB_MIB_ifInMulticastPkts] = 1,</div><div class='add'>+		[RTL8365MB_MIB_ifInBroadcastPkts] = 1,</div><div class='add'>+		[RTL8365MB_MIB_etherStatsDropEvents] = 1,</div><div class='add'>+		[RTL8365MB_MIB_etherStatsCollisions] = 1,</div><div class='add'>+		[RTL8365MB_MIB_etherStatsFragments] = 1,</div><div class='add'>+		[RTL8365MB_MIB_etherStatsJabbers] = 1,</div><div class='add'>+		[RTL8365MB_MIB_dot3StatsFCSErrors] = 1,</div><div class='add'>+		[RTL8365MB_MIB_dot3StatsLateCollisions] = 1,</div><div class='add'>+	};</div><div class='add'>+	struct rtl8365mb *mb = priv-&gt;chip_data;</div><div class='add'>+	struct rtnl_link_stats64 *stats;</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	stats = &amp;mb-&gt;ports[port].stats;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;mb-&gt;mib_lock);</div><div class='add'>+	for (i = 0; i &lt; RTL8365MB_MIB_END; i++) {</div><div class='add'>+		struct rtl8365mb_mib_counter *c = &amp;rtl8365mb_mib_counters[i];</div><div class='add'>+</div><div class='add'>+		/* Only fetch required MIB counters (marked = 1 above) */</div><div class='add'>+		if (!cnt[i])</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		ret = rtl8365mb_mib_counter_read(priv, port, c-&gt;offset,</div><div class='add'>+						 c-&gt;length, &amp;cnt[i]);</div><div class='add'>+		if (ret)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;mb-&gt;mib_lock);</div><div class='add'>+</div><div class='add'>+	/* Don't update statistics if there was an error reading the counters */</div><div class='add'>+	if (ret)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;mb-&gt;ports[port].stats_lock);</div><div class='add'>+</div><div class='add'>+	stats-&gt;rx_packets = cnt[RTL8365MB_MIB_ifInUcastPkts] +</div><div class='add'>+			    cnt[RTL8365MB_MIB_ifInMulticastPkts] +</div><div class='add'>+			    cnt[RTL8365MB_MIB_ifInBroadcastPkts] -</div><div class='add'>+			    cnt[RTL8365MB_MIB_ifOutDiscards];</div><div class='add'>+</div><div class='add'>+	stats-&gt;tx_packets = cnt[RTL8365MB_MIB_ifOutUcastPkts] +</div><div class='add'>+			    cnt[RTL8365MB_MIB_ifOutMulticastPkts] +</div><div class='add'>+			    cnt[RTL8365MB_MIB_ifOutBroadcastPkts];</div><div class='add'>+</div><div class='add'>+	/* if{In,Out}Octets includes FCS - remove it */</div><div class='add'>+	stats-&gt;rx_bytes = cnt[RTL8365MB_MIB_ifInOctets] - 4 * stats-&gt;rx_packets;</div><div class='add'>+	stats-&gt;tx_bytes =</div><div class='add'>+		cnt[RTL8365MB_MIB_ifOutOctets] - 4 * stats-&gt;tx_packets;</div><div class='add'>+</div><div class='add'>+	stats-&gt;rx_dropped = cnt[RTL8365MB_MIB_etherStatsDropEvents];</div><div class='add'>+	stats-&gt;tx_dropped = cnt[RTL8365MB_MIB_ifOutDiscards];</div><div class='add'>+</div><div class='add'>+	stats-&gt;multicast = cnt[RTL8365MB_MIB_ifInMulticastPkts];</div><div class='add'>+	stats-&gt;collisions = cnt[RTL8365MB_MIB_etherStatsCollisions];</div><div class='add'>+</div><div class='add'>+	stats-&gt;rx_length_errors = cnt[RTL8365MB_MIB_etherStatsFragments] +</div><div class='add'>+				  cnt[RTL8365MB_MIB_etherStatsJabbers];</div><div class='add'>+	stats-&gt;rx_crc_errors = cnt[RTL8365MB_MIB_dot3StatsFCSErrors];</div><div class='add'>+	stats-&gt;rx_errors = stats-&gt;rx_length_errors + stats-&gt;rx_crc_errors;</div><div class='add'>+</div><div class='add'>+	stats-&gt;tx_aborted_errors = cnt[RTL8365MB_MIB_ifOutDiscards];</div><div class='add'>+	stats-&gt;tx_window_errors = cnt[RTL8365MB_MIB_dot3StatsLateCollisions];</div><div class='add'>+	stats-&gt;tx_errors = stats-&gt;tx_aborted_errors + stats-&gt;tx_window_errors;</div><div class='add'>+</div><div class='add'>+	spin_unlock(&amp;mb-&gt;ports[port].stats_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rtl8365mb_stats_poll(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct rtl8365mb_port *p = container_of(to_delayed_work(work),</div><div class='add'>+						struct rtl8365mb_port,</div><div class='add'>+						mib_work);</div><div class='add'>+	struct realtek_priv *priv = p-&gt;priv;</div><div class='add'>+</div><div class='add'>+	rtl8365mb_stats_update(priv, p-&gt;index);</div><div class='add'>+</div><div class='add'>+	schedule_delayed_work(&amp;p-&gt;mib_work, RTL8365MB_STATS_INTERVAL_JIFFIES);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rtl8365mb_get_stats64(struct dsa_switch *ds, int port,</div><div class='add'>+				  struct rtnl_link_stats64 *s)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = ds-&gt;priv;</div><div class='add'>+	struct rtl8365mb_port *p;</div><div class='add'>+	struct rtl8365mb *mb;</div><div class='add'>+</div><div class='add'>+	mb = priv-&gt;chip_data;</div><div class='add'>+	p = &amp;mb-&gt;ports[port];</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;p-&gt;stats_lock);</div><div class='add'>+	memcpy(s, &amp;p-&gt;stats, sizeof(*s));</div><div class='add'>+	spin_unlock(&amp;p-&gt;stats_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rtl8365mb_stats_setup(struct realtek_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct rtl8365mb *mb = priv-&gt;chip_data;</div><div class='add'>+	struct dsa_switch *ds = &amp;priv-&gt;ds;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Per-chip global mutex to protect MIB counter access, since doing</div><div class='add'>+	 * so requires accessing a series of registers in a particular order.</div><div class='add'>+	 */</div><div class='add'>+	mutex_init(&amp;mb-&gt;mib_lock);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;num_ports; i++) {</div><div class='add'>+		struct rtl8365mb_port *p = &amp;mb-&gt;ports[i];</div><div class='add'>+</div><div class='add'>+		if (dsa_is_unused_port(ds, i))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* Per-port spinlock to protect the stats64 data */</div><div class='add'>+		spin_lock_init(&amp;p-&gt;stats_lock);</div><div class='add'>+</div><div class='add'>+		/* This work polls the MIB counters and keeps the stats64 data</div><div class='add'>+		 * up-to-date.</div><div class='add'>+		 */</div><div class='add'>+		INIT_DELAYED_WORK(&amp;p-&gt;mib_work, rtl8365mb_stats_poll);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rtl8365mb_stats_teardown(struct realtek_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct rtl8365mb *mb = priv-&gt;chip_data;</div><div class='add'>+	struct dsa_switch *ds = &amp;priv-&gt;ds;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;num_ports; i++) {</div><div class='add'>+		struct rtl8365mb_port *p = &amp;mb-&gt;ports[i];</div><div class='add'>+</div><div class='add'>+		if (dsa_is_unused_port(ds, i))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		cancel_delayed_work_sync(&amp;p-&gt;mib_work);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8365mb_get_and_clear_status_reg(struct realtek_priv *priv, u32 reg,</div><div class='add'>+					      u32 *val)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_read(priv-&gt;map, reg, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return regmap_write(priv-&gt;map, reg, *val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t rtl8365mb_irq(int irq, void *data)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = data;</div><div class='add'>+	unsigned long line_changes = 0;</div><div class='add'>+	u32 stat;</div><div class='add'>+	int line;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = rtl8365mb_get_and_clear_status_reg(priv, RTL8365MB_INTR_STATUS_REG,</div><div class='add'>+						 &amp;stat);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_error;</div><div class='add'>+</div><div class='add'>+	if (stat &amp; RTL8365MB_INTR_LINK_CHANGE_MASK) {</div><div class='add'>+		u32 linkdown_ind;</div><div class='add'>+		u32 linkup_ind;</div><div class='add'>+		u32 val;</div><div class='add'>+</div><div class='add'>+		ret = rtl8365mb_get_and_clear_status_reg(</div><div class='add'>+			priv, RTL8365MB_PORT_LINKUP_IND_REG, &amp;val);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out_error;</div><div class='add'>+</div><div class='add'>+		linkup_ind = FIELD_GET(RTL8365MB_PORT_LINKUP_IND_MASK, val);</div><div class='add'>+</div><div class='add'>+		ret = rtl8365mb_get_and_clear_status_reg(</div><div class='add'>+			priv, RTL8365MB_PORT_LINKDOWN_IND_REG, &amp;val);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out_error;</div><div class='add'>+</div><div class='add'>+		linkdown_ind = FIELD_GET(RTL8365MB_PORT_LINKDOWN_IND_MASK, val);</div><div class='add'>+</div><div class='add'>+		line_changes = linkup_ind | linkdown_ind;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!line_changes)</div><div class='add'>+		goto out_none;</div><div class='add'>+</div><div class='add'>+	for_each_set_bit(line, &amp;line_changes, priv-&gt;num_ports) {</div><div class='add'>+		int child_irq = irq_find_mapping(priv-&gt;irqdomain, line);</div><div class='add'>+</div><div class='add'>+		handle_nested_irq(child_irq);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+</div><div class='add'>+out_error:</div><div class='add'>+	dev_err(priv-&gt;dev, "failed to read interrupt status: %d\n", ret);</div><div class='add'>+</div><div class='add'>+out_none:</div><div class='add'>+	return IRQ_NONE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct irq_chip rtl8365mb_irq_chip = {</div><div class='add'>+	.name = "rtl8365mb",</div><div class='add'>+	/* The hardware doesn't support masking IRQs on a per-port basis */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int rtl8365mb_irq_map(struct irq_domain *domain, unsigned int irq,</div><div class='add'>+			     irq_hw_number_t hwirq)</div><div class='add'>+{</div><div class='add'>+	irq_set_chip_data(irq, domain-&gt;host_data);</div><div class='add'>+	irq_set_chip_and_handler(irq, &amp;rtl8365mb_irq_chip, handle_simple_irq);</div><div class='add'>+	irq_set_nested_thread(irq, 1);</div><div class='add'>+	irq_set_noprobe(irq);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rtl8365mb_irq_unmap(struct irq_domain *d, unsigned int irq)</div><div class='add'>+{</div><div class='add'>+	irq_set_nested_thread(irq, 0);</div><div class='add'>+	irq_set_chip_and_handler(irq, NULL, NULL);</div><div class='add'>+	irq_set_chip_data(irq, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct irq_domain_ops rtl8365mb_irqdomain_ops = {</div><div class='add'>+	.map = rtl8365mb_irq_map,</div><div class='add'>+	.unmap = rtl8365mb_irq_unmap,</div><div class='add'>+	.xlate = irq_domain_xlate_onecell,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int rtl8365mb_set_irq_enable(struct realtek_priv *priv, bool enable)</div><div class='add'>+{</div><div class='add'>+	return regmap_update_bits(priv-&gt;map, RTL8365MB_INTR_CTRL_REG,</div><div class='add'>+				  RTL8365MB_INTR_LINK_CHANGE_MASK,</div><div class='add'>+				  FIELD_PREP(RTL8365MB_INTR_LINK_CHANGE_MASK,</div><div class='add'>+					     enable ? 1 : 0));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8365mb_irq_enable(struct realtek_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return rtl8365mb_set_irq_enable(priv, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8365mb_irq_disable(struct realtek_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return rtl8365mb_set_irq_enable(priv, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8365mb_irq_setup(struct realtek_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct rtl8365mb *mb = priv-&gt;chip_data;</div><div class='add'>+	struct device_node *intc;</div><div class='add'>+	u32 irq_trig;</div><div class='add'>+	int virq;</div><div class='add'>+	int irq;</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	intc = of_get_child_by_name(priv-&gt;dev-&gt;of_node, "interrupt-controller");</div><div class='add'>+	if (!intc) {</div><div class='add'>+		dev_err(priv-&gt;dev, "missing child interrupt-controller node\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* rtl8365mb IRQs cascade off this one */</div><div class='add'>+	irq = of_irq_get(intc, 0);</div><div class='add'>+	if (irq &lt;= 0) {</div><div class='add'>+		if (irq != -EPROBE_DEFER)</div><div class='add'>+			dev_err(priv-&gt;dev, "failed to get parent irq: %d\n",</div><div class='add'>+				irq);</div><div class='add'>+		ret = irq ? irq : -EINVAL;</div><div class='add'>+		goto out_put_node;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;irqdomain = irq_domain_create_linear(of_fwnode_handle(intc), priv-&gt;num_ports,</div><div class='add'>+						   &amp;rtl8365mb_irqdomain_ops, priv);</div><div class='add'>+	if (!priv-&gt;irqdomain) {</div><div class='add'>+		dev_err(priv-&gt;dev, "failed to add irq domain\n");</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto out_put_node;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;num_ports; i++) {</div><div class='add'>+		virq = irq_create_mapping(priv-&gt;irqdomain, i);</div><div class='add'>+		if (!virq) {</div><div class='add'>+			dev_err(priv-&gt;dev,</div><div class='add'>+				"failed to create irq domain mapping\n");</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+			goto out_remove_irqdomain;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		irq_set_parent(virq, irq);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Configure chip interrupt signal polarity */</div><div class='add'>+	irq_trig = irq_get_trigger_type(irq);</div><div class='add'>+	switch (irq_trig) {</div><div class='add'>+	case IRQF_TRIGGER_RISING:</div><div class='add'>+	case IRQF_TRIGGER_HIGH:</div><div class='add'>+		val = RTL8365MB_INTR_POLARITY_HIGH;</div><div class='add'>+		break;</div><div class='add'>+	case IRQF_TRIGGER_FALLING:</div><div class='add'>+	case IRQF_TRIGGER_LOW:</div><div class='add'>+		val = RTL8365MB_INTR_POLARITY_LOW;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(priv-&gt;dev, "unsupported irq trigger type %u\n",</div><div class='add'>+			irq_trig);</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto out_remove_irqdomain;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = regmap_update_bits(priv-&gt;map, RTL8365MB_INTR_POLARITY_REG,</div><div class='add'>+				 RTL8365MB_INTR_POLARITY_MASK,</div><div class='add'>+				 FIELD_PREP(RTL8365MB_INTR_POLARITY_MASK, val));</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_remove_irqdomain;</div><div class='add'>+</div><div class='add'>+	/* Disable the interrupt in case the chip has it enabled on reset */</div><div class='add'>+	ret = rtl8365mb_irq_disable(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_remove_irqdomain;</div><div class='add'>+</div><div class='add'>+	/* Clear the interrupt status register */</div><div class='add'>+	ret = regmap_write(priv-&gt;map, RTL8365MB_INTR_STATUS_REG,</div><div class='add'>+			   RTL8365MB_INTR_ALL_MASK);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_remove_irqdomain;</div><div class='add'>+</div><div class='add'>+	ret = request_threaded_irq(irq, NULL, rtl8365mb_irq, IRQF_ONESHOT,</div><div class='add'>+				   "rtl8365mb", priv);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(priv-&gt;dev, "failed to request irq: %d\n", ret);</div><div class='add'>+		goto out_remove_irqdomain;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Store the irq so that we know to free it during teardown */</div><div class='add'>+	mb-&gt;irq = irq;</div><div class='add'>+</div><div class='add'>+	ret = rtl8365mb_irq_enable(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_free_irq;</div><div class='add'>+</div><div class='add'>+	of_node_put(intc);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_free_irq:</div><div class='add'>+	free_irq(mb-&gt;irq, priv);</div><div class='add'>+	mb-&gt;irq = 0;</div><div class='add'>+</div><div class='add'>+out_remove_irqdomain:</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;num_ports; i++) {</div><div class='add'>+		virq = irq_find_mapping(priv-&gt;irqdomain, i);</div><div class='add'>+		irq_dispose_mapping(virq);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	irq_domain_remove(priv-&gt;irqdomain);</div><div class='add'>+	priv-&gt;irqdomain = NULL;</div><div class='add'>+</div><div class='add'>+out_put_node:</div><div class='add'>+	of_node_put(intc);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rtl8365mb_irq_teardown(struct realtek_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct rtl8365mb *mb = priv-&gt;chip_data;</div><div class='add'>+	int virq;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (mb-&gt;irq) {</div><div class='add'>+		free_irq(mb-&gt;irq, priv);</div><div class='add'>+		mb-&gt;irq = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;irqdomain) {</div><div class='add'>+		for (i = 0; i &lt; priv-&gt;num_ports; i++) {</div><div class='add'>+			virq = irq_find_mapping(priv-&gt;irqdomain, i);</div><div class='add'>+			irq_dispose_mapping(virq);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		irq_domain_remove(priv-&gt;irqdomain);</div><div class='add'>+		priv-&gt;irqdomain = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8365mb_cpu_config(struct realtek_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct rtl8365mb *mb = priv-&gt;chip_data;</div><div class='add'>+	struct rtl8365mb_cpu *cpu = &amp;mb-&gt;cpu;</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_update_bits(priv-&gt;map, RTL8365MB_CPU_PORT_MASK_REG,</div><div class='add'>+				 RTL8365MB_CPU_PORT_MASK_MASK,</div><div class='add'>+				 FIELD_PREP(RTL8365MB_CPU_PORT_MASK_MASK,</div><div class='add'>+					    cpu-&gt;mask));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	val = FIELD_PREP(RTL8365MB_CPU_CTRL_EN_MASK, cpu-&gt;enable ? 1 : 0) |</div><div class='add'>+	      FIELD_PREP(RTL8365MB_CPU_CTRL_INSERTMODE_MASK, cpu-&gt;insert) |</div><div class='add'>+	      FIELD_PREP(RTL8365MB_CPU_CTRL_TAG_POSITION_MASK, cpu-&gt;position) |</div><div class='add'>+	      FIELD_PREP(RTL8365MB_CPU_CTRL_RXBYTECOUNT_MASK, cpu-&gt;rx_length) |</div><div class='add'>+	      FIELD_PREP(RTL8365MB_CPU_CTRL_TAG_FORMAT_MASK, cpu-&gt;format) |</div><div class='add'>+	      FIELD_PREP(RTL8365MB_CPU_CTRL_TRAP_PORT_MASK, cpu-&gt;trap_port &amp; 0x7) |</div><div class='add'>+	      FIELD_PREP(RTL8365MB_CPU_CTRL_TRAP_PORT_EXT_MASK,</div><div class='add'>+			 cpu-&gt;trap_port &gt;&gt; 3 &amp; 0x1);</div><div class='add'>+	ret = regmap_write(priv-&gt;map, RTL8365MB_CPU_CTRL_REG, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8365mb_change_tag_protocol(struct dsa_switch *ds,</div><div class='add'>+					 enum dsa_tag_protocol proto)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = ds-&gt;priv;</div><div class='add'>+	struct rtl8365mb_cpu *cpu;</div><div class='add'>+	struct rtl8365mb *mb;</div><div class='add'>+</div><div class='add'>+	mb = priv-&gt;chip_data;</div><div class='add'>+	cpu = &amp;mb-&gt;cpu;</div><div class='add'>+</div><div class='add'>+	switch (proto) {</div><div class='add'>+	case DSA_TAG_PROTO_RTL8_4:</div><div class='add'>+		cpu-&gt;format = RTL8365MB_CPU_FORMAT_8BYTES;</div><div class='add'>+		cpu-&gt;position = RTL8365MB_CPU_POS_AFTER_SA;</div><div class='add'>+		break;</div><div class='add'>+	case DSA_TAG_PROTO_RTL8_4T:</div><div class='add'>+		cpu-&gt;format = RTL8365MB_CPU_FORMAT_8BYTES;</div><div class='add'>+		cpu-&gt;position = RTL8365MB_CPU_POS_BEFORE_CRC;</div><div class='add'>+		break;</div><div class='add'>+	/* The switch also supports a 4-byte format, similar to rtl4a but with</div><div class='add'>+	 * the same 0x04 8-bit version and probably 8-bit port source/dest.</div><div class='add'>+	 * There is no public doc about it. Not supported yet and it will probably</div><div class='add'>+	 * never be.</div><div class='add'>+	 */</div><div class='add'>+	default:</div><div class='add'>+		return -EPROTONOSUPPORT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rtl8365mb_cpu_config(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8365mb_switch_init(struct realtek_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct rtl8365mb *mb = priv-&gt;chip_data;</div><div class='add'>+	const struct rtl8365mb_chip_info *ci;</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	ci = mb-&gt;chip_info;</div><div class='add'>+</div><div class='add'>+	/* Do any chip-specific init jam before getting to the common stuff */</div><div class='add'>+	if (ci-&gt;jam_table) {</div><div class='add'>+		for (i = 0; i &lt; ci-&gt;jam_size; i++) {</div><div class='add'>+			ret = regmap_write(priv-&gt;map, ci-&gt;jam_table[i].reg,</div><div class='add'>+					   ci-&gt;jam_table[i].val);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Common init jam */</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(rtl8365mb_init_jam_common); i++) {</div><div class='add'>+		ret = regmap_write(priv-&gt;map, rtl8365mb_init_jam_common[i].reg,</div><div class='add'>+				   rtl8365mb_init_jam_common[i].val);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8365mb_reset_chip(struct realtek_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	priv-&gt;write_reg_noack(priv, RTL8365MB_CHIP_RESET_REG,</div><div class='add'>+			      FIELD_PREP(RTL8365MB_CHIP_RESET_HW_MASK, 1));</div><div class='add'>+</div><div class='add'>+	/* Realtek documentation says the chip needs 1 second to reset. Sleep</div><div class='add'>+	 * for 100 ms before accessing any registers to prevent ACK timeouts.</div><div class='add'>+	 */</div><div class='add'>+	msleep(100);</div><div class='add'>+	return regmap_read_poll_timeout(priv-&gt;map, RTL8365MB_CHIP_RESET_REG, val,</div><div class='add'>+					!(val &amp; RTL8365MB_CHIP_RESET_HW_MASK),</div><div class='add'>+					20000, 1e6);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8365mb_setup(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = ds-&gt;priv;</div><div class='add'>+	struct rtl8365mb_cpu *cpu;</div><div class='add'>+	struct dsa_port *cpu_dp;</div><div class='add'>+	struct rtl8365mb *mb;</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	mb = priv-&gt;chip_data;</div><div class='add'>+	cpu = &amp;mb-&gt;cpu;</div><div class='add'>+</div><div class='add'>+	ret = rtl8365mb_reset_chip(priv);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(priv-&gt;dev, "failed to reset chip: %d\n", ret);</div><div class='add'>+		goto out_error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Configure switch to vendor-defined initial state */</div><div class='add'>+	ret = rtl8365mb_switch_init(priv);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(priv-&gt;dev, "failed to initialize switch: %d\n", ret);</div><div class='add'>+		goto out_error;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set up cascading IRQs */</div><div class='add'>+	ret = rtl8365mb_irq_setup(priv);</div><div class='add'>+	if (ret == -EPROBE_DEFER)</div><div class='add'>+		return ret;</div><div class='add'>+	else if (ret)</div><div class='add'>+		dev_info(priv-&gt;dev, "no interrupt support\n");</div><div class='add'>+</div><div class='add'>+	/* Configure CPU tagging */</div><div class='add'>+	dsa_switch_for_each_cpu_port(cpu_dp, ds) {</div><div class='add'>+		cpu-&gt;mask |= BIT(cpu_dp-&gt;index);</div><div class='add'>+</div><div class='add'>+		if (cpu-&gt;trap_port == RTL8365MB_MAX_NUM_PORTS)</div><div class='add'>+			cpu-&gt;trap_port = cpu_dp-&gt;index;</div><div class='add'>+	}</div><div class='add'>+	cpu-&gt;enable = cpu-&gt;mask &gt; 0;</div><div class='add'>+	ret = rtl8365mb_cpu_config(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_teardown_irq;</div><div class='add'>+</div><div class='add'>+	/* Configure ports */</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;num_ports; i++) {</div><div class='add'>+		struct rtl8365mb_port *p = &amp;mb-&gt;ports[i];</div><div class='add'>+</div><div class='add'>+		if (dsa_is_unused_port(ds, i))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* Forward only to the CPU */</div><div class='add'>+		ret = rtl8365mb_port_set_isolation(priv, i, cpu-&gt;mask);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out_teardown_irq;</div><div class='add'>+</div><div class='add'>+		/* Disable learning */</div><div class='add'>+		ret = rtl8365mb_port_set_learning(priv, i, false);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out_teardown_irq;</div><div class='add'>+</div><div class='add'>+		/* Set the initial STP state of all ports to DISABLED, otherwise</div><div class='add'>+		 * ports will still forward frames to the CPU despite being</div><div class='add'>+		 * administratively down by default.</div><div class='add'>+		 */</div><div class='add'>+		rtl8365mb_port_stp_state_set(ds, i, BR_STATE_DISABLED);</div><div class='add'>+</div><div class='add'>+		/* Set up per-port private data */</div><div class='add'>+		p-&gt;priv = priv;</div><div class='add'>+		p-&gt;index = i;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = rtl8365mb_port_change_mtu(ds, cpu-&gt;trap_port, ETH_DATA_LEN);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out_teardown_irq;</div><div class='add'>+</div><div class='add'>+	ret = rtl83xx_setup_user_mdio(ds);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(priv-&gt;dev, "could not set up MDIO bus\n");</div><div class='add'>+		goto out_teardown_irq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Start statistics counter polling */</div><div class='add'>+	rtl8365mb_stats_setup(priv);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_teardown_irq:</div><div class='add'>+	rtl8365mb_irq_teardown(priv);</div><div class='add'>+</div><div class='add'>+out_error:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rtl8365mb_teardown(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	rtl8365mb_stats_teardown(priv);</div><div class='add'>+	rtl8365mb_irq_teardown(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8365mb_get_chip_id_and_ver(struct regmap *map, u32 *id, u32 *ver)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* For some reason we have to write a magic value to an arbitrary</div><div class='add'>+	 * register whenever accessing the chip ID/version registers.</div><div class='add'>+	 */</div><div class='add'>+	ret = regmap_write(map, RTL8365MB_MAGIC_REG, RTL8365MB_MAGIC_VALUE);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_read(map, RTL8365MB_CHIP_ID_REG, id);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_read(map, RTL8365MB_CHIP_VER_REG, ver);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Reset magic register */</div><div class='add'>+	ret = regmap_write(map, RTL8365MB_MAGIC_REG, 0);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8365mb_detect(struct realtek_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct rtl8365mb *mb = priv-&gt;chip_data;</div><div class='add'>+	u32 chip_id;</div><div class='add'>+	u32 chip_ver;</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	ret = rtl8365mb_get_chip_id_and_ver(priv-&gt;map, &amp;chip_id, &amp;chip_ver);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(priv-&gt;dev, "failed to read chip id and version: %d\n",</div><div class='add'>+			ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(rtl8365mb_chip_infos); i++) {</div><div class='add'>+		const struct rtl8365mb_chip_info *ci = &amp;rtl8365mb_chip_infos[i];</div><div class='add'>+</div><div class='add'>+		if (ci-&gt;chip_id == chip_id &amp;&amp; ci-&gt;chip_ver == chip_ver) {</div><div class='add'>+			mb-&gt;chip_info = ci;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!mb-&gt;chip_info) {</div><div class='add'>+		dev_err(priv-&gt;dev,</div><div class='add'>+			"unrecognized switch (id=0x%04x, ver=0x%04x)", chip_id,</div><div class='add'>+			chip_ver);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_info(priv-&gt;dev, "found an %s switch\n", mb-&gt;chip_info-&gt;name);</div><div class='add'>+</div><div class='add'>+	priv-&gt;num_ports = RTL8365MB_MAX_NUM_PORTS;</div><div class='add'>+	mb-&gt;priv = priv;</div><div class='add'>+	mb-&gt;cpu.trap_port = RTL8365MB_MAX_NUM_PORTS;</div><div class='add'>+	mb-&gt;cpu.insert = RTL8365MB_CPU_INSERT_TO_ALL;</div><div class='add'>+	mb-&gt;cpu.position = RTL8365MB_CPU_POS_AFTER_SA;</div><div class='add'>+	mb-&gt;cpu.rx_length = RTL8365MB_CPU_RXLEN_64BYTES;</div><div class='add'>+	mb-&gt;cpu.format = RTL8365MB_CPU_FORMAT_8BYTES;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct phylink_mac_ops rtl8365mb_phylink_mac_ops = {</div><div class='add'>+	.mac_config = rtl8365mb_phylink_mac_config,</div><div class='add'>+	.mac_link_down = rtl8365mb_phylink_mac_link_down,</div><div class='add'>+	.mac_link_up = rtl8365mb_phylink_mac_link_up,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct dsa_switch_ops rtl8365mb_switch_ops = {</div><div class='add'>+	.get_tag_protocol = rtl8365mb_get_tag_protocol,</div><div class='add'>+	.change_tag_protocol = rtl8365mb_change_tag_protocol,</div><div class='add'>+	.setup = rtl8365mb_setup,</div><div class='add'>+	.teardown = rtl8365mb_teardown,</div><div class='add'>+	.phylink_get_caps = rtl8365mb_phylink_get_caps,</div><div class='add'>+	.port_stp_state_set = rtl8365mb_port_stp_state_set,</div><div class='add'>+	.get_strings = rtl8365mb_get_strings,</div><div class='add'>+	.get_ethtool_stats = rtl8365mb_get_ethtool_stats,</div><div class='add'>+	.get_sset_count = rtl8365mb_get_sset_count,</div><div class='add'>+	.get_eth_phy_stats = rtl8365mb_get_phy_stats,</div><div class='add'>+	.get_eth_mac_stats = rtl8365mb_get_mac_stats,</div><div class='add'>+	.get_eth_ctrl_stats = rtl8365mb_get_ctrl_stats,</div><div class='add'>+	.get_stats64 = rtl8365mb_get_stats64,</div><div class='add'>+	.port_change_mtu = rtl8365mb_port_change_mtu,</div><div class='add'>+	.port_max_mtu = rtl8365mb_port_max_mtu,</div><div class='add'>+	.port_hsr_join = dsa_port_simple_hsr_join,</div><div class='add'>+	.port_hsr_leave = dsa_port_simple_hsr_leave,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct realtek_ops rtl8365mb_ops = {</div><div class='add'>+	.detect = rtl8365mb_detect,</div><div class='add'>+	.phy_read = rtl8365mb_phy_read,</div><div class='add'>+	.phy_write = rtl8365mb_phy_write,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct realtek_variant rtl8365mb_variant = {</div><div class='add'>+	.ds_ops = &amp;rtl8365mb_switch_ops,</div><div class='add'>+	.ops = &amp;rtl8365mb_ops,</div><div class='add'>+	.phylink_mac_ops = &amp;rtl8365mb_phylink_mac_ops,</div><div class='add'>+	.clk_delay = 10,</div><div class='add'>+	.cmd_read = 0xb9,</div><div class='add'>+	.cmd_write = 0xb8,</div><div class='add'>+	.chip_data_sz = sizeof(struct rtl8365mb),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct of_device_id rtl8365mb_of_match[] = {</div><div class='add'>+	{ .compatible = "realtek,rtl8365mb", .data = &amp;rtl8365mb_variant, },</div><div class='add'>+	{ /* sentinel */ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, rtl8365mb_of_match);</div><div class='add'>+</div><div class='add'>+static struct platform_driver rtl8365mb_smi_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "rtl8365mb-smi",</div><div class='add'>+		.of_match_table = rtl8365mb_of_match,</div><div class='add'>+	},</div><div class='add'>+	.probe  = realtek_smi_probe,</div><div class='add'>+	.remove = realtek_smi_remove,</div><div class='add'>+	.shutdown = realtek_smi_shutdown,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct mdio_driver rtl8365mb_mdio_driver = {</div><div class='add'>+	.mdiodrv.driver = {</div><div class='add'>+		.name = "rtl8365mb-mdio",</div><div class='add'>+		.of_match_table = rtl8365mb_of_match,</div><div class='add'>+	},</div><div class='add'>+	.probe  = realtek_mdio_probe,</div><div class='add'>+	.remove = realtek_mdio_remove,</div><div class='add'>+	.shutdown = realtek_mdio_shutdown,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int rtl8365mb_init(void)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = realtek_mdio_driver_register(&amp;rtl8365mb_mdio_driver);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = realtek_smi_driver_register(&amp;rtl8365mb_smi_driver);</div><div class='add'>+	if (ret) {</div><div class='add'>+		realtek_mdio_driver_unregister(&amp;rtl8365mb_mdio_driver);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+module_init(rtl8365mb_init);</div><div class='add'>+</div><div class='add'>+static void __exit rtl8365mb_exit(void)</div><div class='add'>+{</div><div class='add'>+	realtek_smi_driver_unregister(&amp;rtl8365mb_smi_driver);</div><div class='add'>+	realtek_mdio_driver_unregister(&amp;rtl8365mb_mdio_driver);</div><div class='add'>+}</div><div class='add'>+module_exit(rtl8365mb_exit);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Alvin Šipraga &lt;alsi@bang-olufsen.dk&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Driver for RTL8365MB-VC ethernet switch");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_IMPORT_NS("REALTEK_DSA");</div><div class='head'>diff --git a/drivers/net/dsa/realtek/rtl8366-core.c b/drivers/net/dsa/realtek/rtl8366-core.c<br/>new file mode 100644<br/>index 000000000000..047feeed96a2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/realtek/rtl8366-core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/realtek/rtl8366-core.c</a></div><div class='hunk'>@@ -0,0 +1,444 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Realtek SMI library helpers for the RTL8366x variants</div><div class='add'>+ * RTL8366RB and RTL8366S</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2017 Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='add'>+ * Copyright (C) 2009-2010 Gabor Juhos &lt;juhosg@openwrt.org&gt;</div><div class='add'>+ * Copyright (C) 2010 Antti Seppälä &lt;a.seppala@gmail.com&gt;</div><div class='add'>+ * Copyright (C) 2010 Roman Yeryomin &lt;roman@advem.lv&gt;</div><div class='add'>+ * Copyright (C) 2011 Colin Leitner &lt;colin.leitner@googlemail.com&gt;</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/if_bridge.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+</div><div class='add'>+#include "realtek.h"</div><div class='add'>+</div><div class='add'>+int rtl8366_mc_is_used(struct realtek_priv *priv, int mc_index, int *used)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	*used = 0;</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;num_ports; i++) {</div><div class='add'>+		int index = 0;</div><div class='add'>+</div><div class='add'>+		ret = priv-&gt;ops-&gt;get_mc_index(priv, i, &amp;index);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		if (mc_index == index) {</div><div class='add'>+			*used = 1;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(rtl8366_mc_is_used, "REALTEK_DSA");</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * rtl8366_obtain_mc() - retrieve or allocate a VLAN member configuration</div><div class='add'>+ * @priv: the Realtek SMI device instance</div><div class='add'>+ * @vid: the VLAN ID to look up or allocate</div><div class='add'>+ * @vlanmc: the pointer will be assigned to a pointer to a valid member config</div><div class='add'>+ * if successful</div><div class='add'>+ * @return: index of a new member config or negative error number</div><div class='add'>+ */</div><div class='add'>+static int rtl8366_obtain_mc(struct realtek_priv *priv, int vid,</div><div class='add'>+			     struct rtl8366_vlan_mc *vlanmc)</div><div class='add'>+{</div><div class='add'>+	struct rtl8366_vlan_4k vlan4k;</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Try to find an existing member config entry for this VID */</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;num_vlan_mc; i++) {</div><div class='add'>+		ret = priv-&gt;ops-&gt;get_vlan_mc(priv, i, vlanmc);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(priv-&gt;dev, "error searching for VLAN MC %d for VID %d\n",</div><div class='add'>+				i, vid);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (vid == vlanmc-&gt;vid)</div><div class='add'>+			return i;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* We have no MC entry for this VID, try to find an empty one */</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;num_vlan_mc; i++) {</div><div class='add'>+		ret = priv-&gt;ops-&gt;get_vlan_mc(priv, i, vlanmc);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(priv-&gt;dev, "error searching for VLAN MC %d for VID %d\n",</div><div class='add'>+				i, vid);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (vlanmc-&gt;vid == 0 &amp;&amp; vlanmc-&gt;member == 0) {</div><div class='add'>+			/* Update the entry from the 4K table */</div><div class='add'>+			ret = priv-&gt;ops-&gt;get_vlan_4k(priv, vid, &amp;vlan4k);</div><div class='add'>+			if (ret) {</div><div class='add'>+				dev_err(priv-&gt;dev, "error looking for 4K VLAN MC %d for VID %d\n",</div><div class='add'>+					i, vid);</div><div class='add'>+				return ret;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			vlanmc-&gt;vid = vid;</div><div class='add'>+			vlanmc-&gt;member = vlan4k.member;</div><div class='add'>+			vlanmc-&gt;untag = vlan4k.untag;</div><div class='add'>+			vlanmc-&gt;fid = vlan4k.fid;</div><div class='add'>+			ret = priv-&gt;ops-&gt;set_vlan_mc(priv, i, vlanmc);</div><div class='add'>+			if (ret) {</div><div class='add'>+				dev_err(priv-&gt;dev, "unable to set/update VLAN MC %d for VID %d\n",</div><div class='add'>+					i, vid);</div><div class='add'>+				return ret;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			dev_dbg(priv-&gt;dev, "created new MC at index %d for VID %d\n",</div><div class='add'>+				i, vid);</div><div class='add'>+			return i;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* MC table is full, try to find an unused entry and replace it */</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;num_vlan_mc; i++) {</div><div class='add'>+		int used;</div><div class='add'>+</div><div class='add'>+		ret = rtl8366_mc_is_used(priv, i, &amp;used);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		if (!used) {</div><div class='add'>+			/* Update the entry from the 4K table */</div><div class='add'>+			ret = priv-&gt;ops-&gt;get_vlan_4k(priv, vid, &amp;vlan4k);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+</div><div class='add'>+			vlanmc-&gt;vid = vid;</div><div class='add'>+			vlanmc-&gt;member = vlan4k.member;</div><div class='add'>+			vlanmc-&gt;untag = vlan4k.untag;</div><div class='add'>+			vlanmc-&gt;fid = vlan4k.fid;</div><div class='add'>+			ret = priv-&gt;ops-&gt;set_vlan_mc(priv, i, vlanmc);</div><div class='add'>+			if (ret) {</div><div class='add'>+				dev_err(priv-&gt;dev, "unable to set/update VLAN MC %d for VID %d\n",</div><div class='add'>+					i, vid);</div><div class='add'>+				return ret;</div><div class='add'>+			}</div><div class='add'>+			dev_dbg(priv-&gt;dev, "recycled MC at index %i for VID %d\n",</div><div class='add'>+				i, vid);</div><div class='add'>+			return i;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_err(priv-&gt;dev, "all VLAN member configurations are in use\n");</div><div class='add'>+	return -ENOSPC;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int rtl8366_set_vlan(struct realtek_priv *priv, int vid, u32 member,</div><div class='add'>+		     u32 untag, u32 fid)</div><div class='add'>+{</div><div class='add'>+	struct rtl8366_vlan_mc vlanmc;</div><div class='add'>+	struct rtl8366_vlan_4k vlan4k;</div><div class='add'>+	int mc;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;ops-&gt;is_vlan_valid(priv, vid))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	dev_dbg(priv-&gt;dev,</div><div class='add'>+		"setting VLAN%d 4k members: 0x%02x, untagged: 0x%02x\n",</div><div class='add'>+		vid, member, untag);</div><div class='add'>+</div><div class='add'>+	/* Update the 4K table */</div><div class='add'>+	ret = priv-&gt;ops-&gt;get_vlan_4k(priv, vid, &amp;vlan4k);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	vlan4k.member |= member;</div><div class='add'>+	vlan4k.untag |= untag;</div><div class='add'>+	vlan4k.fid = fid;</div><div class='add'>+	ret = priv-&gt;ops-&gt;set_vlan_4k(priv, &amp;vlan4k);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	dev_dbg(priv-&gt;dev,</div><div class='add'>+		"resulting VLAN%d 4k members: 0x%02x, untagged: 0x%02x\n",</div><div class='add'>+		vid, vlan4k.member, vlan4k.untag);</div><div class='add'>+</div><div class='add'>+	/* Find or allocate a member config for this VID */</div><div class='add'>+	ret = rtl8366_obtain_mc(priv, vid, &amp;vlanmc);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	mc = ret;</div><div class='add'>+</div><div class='add'>+	/* Update the MC entry */</div><div class='add'>+	vlanmc.member |= member;</div><div class='add'>+	vlanmc.untag |= untag;</div><div class='add'>+	vlanmc.fid = fid;</div><div class='add'>+</div><div class='add'>+	/* Commit updates to the MC entry */</div><div class='add'>+	ret = priv-&gt;ops-&gt;set_vlan_mc(priv, mc, &amp;vlanmc);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(priv-&gt;dev, "failed to commit changes to VLAN MC index %d for VID %d\n",</div><div class='add'>+			mc, vid);</div><div class='add'>+	else</div><div class='add'>+		dev_dbg(priv-&gt;dev,</div><div class='add'>+			"resulting VLAN%d MC members: 0x%02x, untagged: 0x%02x\n",</div><div class='add'>+			vid, vlanmc.member, vlanmc.untag);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(rtl8366_set_vlan, "REALTEK_DSA");</div><div class='add'>+</div><div class='add'>+int rtl8366_set_pvid(struct realtek_priv *priv, unsigned int port,</div><div class='add'>+		     unsigned int vid)</div><div class='add'>+{</div><div class='add'>+	struct rtl8366_vlan_mc vlanmc;</div><div class='add'>+	int mc;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;ops-&gt;is_vlan_valid(priv, vid))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Find or allocate a member config for this VID */</div><div class='add'>+	ret = rtl8366_obtain_mc(priv, vid, &amp;vlanmc);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	mc = ret;</div><div class='add'>+</div><div class='add'>+	ret = priv-&gt;ops-&gt;set_mc_index(priv, port, mc);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(priv-&gt;dev, "set PVID: failed to set MC index %d for port %d\n",</div><div class='add'>+			mc, port);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(priv-&gt;dev, "set PVID: the PVID for port %d set to %d using existing MC index %d\n",</div><div class='add'>+		port, vid, mc);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(rtl8366_set_pvid, "REALTEK_DSA");</div><div class='add'>+</div><div class='add'>+int rtl8366_enable_vlan4k(struct realtek_priv *priv, bool enable)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* To enable 4k VLAN, ordinary VLAN must be enabled first,</div><div class='add'>+	 * but if we disable 4k VLAN it is fine to leave ordinary</div><div class='add'>+	 * VLAN enabled.</div><div class='add'>+	 */</div><div class='add'>+	if (enable) {</div><div class='add'>+		/* Make sure VLAN is ON */</div><div class='add'>+		ret = priv-&gt;ops-&gt;enable_vlan(priv, true);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		priv-&gt;vlan_enabled = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = priv-&gt;ops-&gt;enable_vlan4k(priv, enable);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	priv-&gt;vlan4k_enabled = enable;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(rtl8366_enable_vlan4k, "REALTEK_DSA");</div><div class='add'>+</div><div class='add'>+int rtl8366_enable_vlan(struct realtek_priv *priv, bool enable)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = priv-&gt;ops-&gt;enable_vlan(priv, enable);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	priv-&gt;vlan_enabled = enable;</div><div class='add'>+</div><div class='add'>+	/* If we turn VLAN off, make sure that we turn off</div><div class='add'>+	 * 4k VLAN as well, if that happened to be on.</div><div class='add'>+	 */</div><div class='add'>+	if (!enable) {</div><div class='add'>+		priv-&gt;vlan4k_enabled = false;</div><div class='add'>+		ret = priv-&gt;ops-&gt;enable_vlan4k(priv, false);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(rtl8366_enable_vlan, "REALTEK_DSA");</div><div class='add'>+</div><div class='add'>+int rtl8366_reset_vlan(struct realtek_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct rtl8366_vlan_mc vlanmc;</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	rtl8366_enable_vlan(priv, false);</div><div class='add'>+	rtl8366_enable_vlan4k(priv, false);</div><div class='add'>+</div><div class='add'>+	/* Clear the 16 VLAN member configurations */</div><div class='add'>+	vlanmc.vid = 0;</div><div class='add'>+	vlanmc.priority = 0;</div><div class='add'>+	vlanmc.member = 0;</div><div class='add'>+	vlanmc.untag = 0;</div><div class='add'>+	vlanmc.fid = 0;</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;num_vlan_mc; i++) {</div><div class='add'>+		ret = priv-&gt;ops-&gt;set_vlan_mc(priv, i, &amp;vlanmc);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(rtl8366_reset_vlan, "REALTEK_DSA");</div><div class='add'>+</div><div class='add'>+int rtl8366_vlan_add(struct dsa_switch *ds, int port,</div><div class='add'>+		     const struct switchdev_obj_port_vlan *vlan,</div><div class='add'>+		     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	bool untagged = !!(vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_UNTAGGED);</div><div class='add'>+	bool pvid = !!(vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_PVID);</div><div class='add'>+	struct realtek_priv *priv = ds-&gt;priv;</div><div class='add'>+	u32 member = 0;</div><div class='add'>+	u32 untag = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;ops-&gt;is_vlan_valid(priv, vlan-&gt;vid)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "VLAN ID not valid");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Enable VLAN in the hardware</div><div class='add'>+	 * FIXME: what's with this 4k business?</div><div class='add'>+	 * Just rtl8366_enable_vlan() seems inconclusive.</div><div class='add'>+	 */</div><div class='add'>+	ret = rtl8366_enable_vlan4k(priv, true);</div><div class='add'>+	if (ret) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Failed to enable VLAN 4K");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(priv-&gt;dev, "add VLAN %d on port %d, %s, %s\n",</div><div class='add'>+		vlan-&gt;vid, port, untagged ? "untagged" : "tagged",</div><div class='add'>+		pvid ? "PVID" : "no PVID");</div><div class='add'>+</div><div class='add'>+	member |= BIT(port);</div><div class='add'>+</div><div class='add'>+	if (untagged)</div><div class='add'>+		untag |= BIT(port);</div><div class='add'>+</div><div class='add'>+	ret = rtl8366_set_vlan(priv, vlan-&gt;vid, member, untag, 0);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(priv-&gt;dev, "failed to set up VLAN %04x", vlan-&gt;vid);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!pvid)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ret = rtl8366_set_pvid(priv, port, vlan-&gt;vid);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(priv-&gt;dev, "failed to set PVID on port %d to VLAN %04x",</div><div class='add'>+			port, vlan-&gt;vid);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(rtl8366_vlan_add, "REALTEK_DSA");</div><div class='add'>+</div><div class='add'>+int rtl8366_vlan_del(struct dsa_switch *ds, int port,</div><div class='add'>+		     const struct switchdev_obj_port_vlan *vlan)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = ds-&gt;priv;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	dev_dbg(priv-&gt;dev, "del VLAN %d on port %d\n", vlan-&gt;vid, port);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;num_vlan_mc; i++) {</div><div class='add'>+		struct rtl8366_vlan_mc vlanmc;</div><div class='add'>+</div><div class='add'>+		ret = priv-&gt;ops-&gt;get_vlan_mc(priv, i, &amp;vlanmc);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		if (vlan-&gt;vid == vlanmc.vid) {</div><div class='add'>+			/* Remove this port from the VLAN */</div><div class='add'>+			vlanmc.member &amp;= ~BIT(port);</div><div class='add'>+			vlanmc.untag &amp;= ~BIT(port);</div><div class='add'>+			/*</div><div class='add'>+			 * If no ports are members of this VLAN</div><div class='add'>+			 * anymore then clear the whole member</div><div class='add'>+			 * config so it can be reused.</div><div class='add'>+			 */</div><div class='add'>+			if (!vlanmc.member) {</div><div class='add'>+				vlanmc.vid = 0;</div><div class='add'>+				vlanmc.priority = 0;</div><div class='add'>+				vlanmc.fid = 0;</div><div class='add'>+			}</div><div class='add'>+			ret = priv-&gt;ops-&gt;set_vlan_mc(priv, i, &amp;vlanmc);</div><div class='add'>+			if (ret) {</div><div class='add'>+				dev_err(priv-&gt;dev,</div><div class='add'>+					"failed to remove VLAN %04x\n",</div><div class='add'>+					vlan-&gt;vid);</div><div class='add'>+				return ret;</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(rtl8366_vlan_del, "REALTEK_DSA");</div><div class='add'>+</div><div class='add'>+void rtl8366_get_strings(struct dsa_switch *ds, int port, u32 stringset,</div><div class='add'>+			 uint8_t *data)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = ds-&gt;priv;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (port &gt;= priv-&gt;num_ports)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;num_mib_counters; i++)</div><div class='add'>+		ethtool_puts(&amp;data, priv-&gt;mib_counters[i].name);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(rtl8366_get_strings, "REALTEK_DSA");</div><div class='add'>+</div><div class='add'>+int rtl8366_get_sset_count(struct dsa_switch *ds, int port, int sset)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	/* We only support SS_STATS */</div><div class='add'>+	if (sset != ETH_SS_STATS)</div><div class='add'>+		return 0;</div><div class='add'>+	if (port &gt;= priv-&gt;num_ports)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return priv-&gt;num_mib_counters;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(rtl8366_get_sset_count, "REALTEK_DSA");</div><div class='add'>+</div><div class='add'>+void rtl8366_get_ethtool_stats(struct dsa_switch *ds, int port, uint64_t *data)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = ds-&gt;priv;</div><div class='add'>+	int i;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (port &gt;= priv-&gt;num_ports)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;num_mib_counters; i++) {</div><div class='add'>+		struct rtl8366_mib_counter *mib;</div><div class='add'>+		u64 mibvalue = 0;</div><div class='add'>+</div><div class='add'>+		mib = &amp;priv-&gt;mib_counters[i];</div><div class='add'>+		ret = priv-&gt;ops-&gt;get_mib_counter(priv, port, mib, &amp;mibvalue);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(priv-&gt;dev, "error reading MIB counter %s\n",</div><div class='add'>+				mib-&gt;name);</div><div class='add'>+		}</div><div class='add'>+		data[i] = mibvalue;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(rtl8366_get_ethtool_stats, "REALTEK_DSA");</div><div class='head'>diff --git a/drivers/net/dsa/realtek/rtl8366rb-leds.c b/drivers/net/dsa/realtek/rtl8366rb-leds.c<br/>new file mode 100644<br/>index 000000000000..99c890681ae6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/realtek/rtl8366rb-leds.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/realtek/rtl8366rb-leds.c</a></div><div class='hunk'>@@ -0,0 +1,177 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitops.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+#include "rtl83xx.h"</div><div class='add'>+#include "rtl8366rb.h"</div><div class='add'>+</div><div class='add'>+static inline u32 rtl8366rb_led_group_port_mask(u8 led_group, u8 port)</div><div class='add'>+{</div><div class='add'>+	switch (led_group) {</div><div class='add'>+	case 0:</div><div class='add'>+		return FIELD_PREP(RTL8366RB_LED_0_X_CTRL_MASK, BIT(port));</div><div class='add'>+	case 1:</div><div class='add'>+		return FIELD_PREP(RTL8366RB_LED_0_X_CTRL_MASK, BIT(port));</div><div class='add'>+	case 2:</div><div class='add'>+		return FIELD_PREP(RTL8366RB_LED_0_X_CTRL_MASK, BIT(port));</div><div class='add'>+	case 3:</div><div class='add'>+		return FIELD_PREP(RTL8366RB_LED_0_X_CTRL_MASK, BIT(port));</div><div class='add'>+	default:</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rb8366rb_get_port_led(struct rtl8366rb_led *led)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = led-&gt;priv;</div><div class='add'>+	u8 led_group = led-&gt;led_group;</div><div class='add'>+	u8 port_num = led-&gt;port_num;</div><div class='add'>+	int ret;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	ret = regmap_read(priv-&gt;map, RTL8366RB_LED_X_X_CTRL_REG(led_group),</div><div class='add'>+			  &amp;val);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(priv-&gt;dev, "error reading LED on port %d group %d\n",</div><div class='add'>+			led_group, port_num);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return !!(val &amp; rtl8366rb_led_group_port_mask(led_group, port_num));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rb8366rb_set_port_led(struct rtl8366rb_led *led, bool enable)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = led-&gt;priv;</div><div class='add'>+	u8 led_group = led-&gt;led_group;</div><div class='add'>+	u8 port_num = led-&gt;port_num;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_update_bits(priv-&gt;map,</div><div class='add'>+				 RTL8366RB_LED_X_X_CTRL_REG(led_group),</div><div class='add'>+				 rtl8366rb_led_group_port_mask(led_group,</div><div class='add'>+							       port_num),</div><div class='add'>+				 enable ? 0xffff : 0);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(priv-&gt;dev, "error updating LED on port %d group %d\n",</div><div class='add'>+			led_group, port_num);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Change the LED group to manual controlled LEDs if required */</div><div class='add'>+	ret = rb8366rb_set_ledgroup_mode(priv, led_group,</div><div class='add'>+					 RTL8366RB_LEDGROUP_FORCE);</div><div class='add'>+</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(priv-&gt;dev, "error updating LED GROUP group %d\n",</div><div class='add'>+			led_group);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+rtl8366rb_cled_brightness_set_blocking(struct led_classdev *ldev,</div><div class='add'>+				       enum led_brightness brightness)</div><div class='add'>+{</div><div class='add'>+	struct rtl8366rb_led *led = container_of(ldev, struct rtl8366rb_led,</div><div class='add'>+						 cdev);</div><div class='add'>+</div><div class='add'>+	return rb8366rb_set_port_led(led, brightness == LED_ON);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8366rb_setup_led(struct realtek_priv *priv, struct dsa_port *dp,</div><div class='add'>+			       struct fwnode_handle *led_fwnode)</div><div class='add'>+{</div><div class='add'>+	struct rtl8366rb *rb = priv-&gt;chip_data;</div><div class='add'>+	struct led_init_data init_data = { };</div><div class='add'>+	enum led_default_state state;</div><div class='add'>+	struct rtl8366rb_led *led;</div><div class='add'>+	u32 led_group;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = fwnode_property_read_u32(led_fwnode, "reg", &amp;led_group);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (led_group &gt;= RTL8366RB_NUM_LEDGROUPS) {</div><div class='add'>+		dev_warn(priv-&gt;dev, "Invalid LED reg %d defined for port %d",</div><div class='add'>+			 led_group, dp-&gt;index);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	led = &amp;rb-&gt;leds[dp-&gt;index][led_group];</div><div class='add'>+	led-&gt;port_num = dp-&gt;index;</div><div class='add'>+	led-&gt;led_group = led_group;</div><div class='add'>+	led-&gt;priv = priv;</div><div class='add'>+</div><div class='add'>+	state = led_init_default_state_get(led_fwnode);</div><div class='add'>+	switch (state) {</div><div class='add'>+	case LEDS_DEFSTATE_ON:</div><div class='add'>+		led-&gt;cdev.brightness = 1;</div><div class='add'>+		rb8366rb_set_port_led(led, 1);</div><div class='add'>+		break;</div><div class='add'>+	case LEDS_DEFSTATE_KEEP:</div><div class='add'>+		led-&gt;cdev.brightness =</div><div class='add'>+			rb8366rb_get_port_led(led);</div><div class='add'>+		break;</div><div class='add'>+	case LEDS_DEFSTATE_OFF:</div><div class='add'>+	default:</div><div class='add'>+		led-&gt;cdev.brightness = 0;</div><div class='add'>+		rb8366rb_set_port_led(led, 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	led-&gt;cdev.max_brightness = 1;</div><div class='add'>+	led-&gt;cdev.brightness_set_blocking =</div><div class='add'>+		rtl8366rb_cled_brightness_set_blocking;</div><div class='add'>+	init_data.fwnode = led_fwnode;</div><div class='add'>+	init_data.devname_mandatory = true;</div><div class='add'>+</div><div class='add'>+	init_data.devicename = kasprintf(GFP_KERNEL, "Realtek-%d:0%d:%d",</div><div class='add'>+					 dp-&gt;ds-&gt;index, dp-&gt;index, led_group);</div><div class='add'>+	if (!init_data.devicename)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ret = devm_led_classdev_register_ext(priv-&gt;dev, &amp;led-&gt;cdev, &amp;init_data);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_warn(priv-&gt;dev, "Failed to init LED %d for port %d",</div><div class='add'>+			 led_group, dp-&gt;index);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int rtl8366rb_setup_leds(struct realtek_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds = &amp;priv-&gt;ds;</div><div class='add'>+	struct device_node *leds_np;</div><div class='add'>+	struct dsa_port *dp;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	dsa_switch_for_each_port(dp, ds) {</div><div class='add'>+		if (!dp-&gt;dn)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		leds_np = of_get_child_by_name(dp-&gt;dn, "leds");</div><div class='add'>+		if (!leds_np) {</div><div class='add'>+			dev_dbg(priv-&gt;dev, "No leds defined for port %d",</div><div class='add'>+				dp-&gt;index);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		for_each_child_of_node_scoped(leds_np, led_np) {</div><div class='add'>+			ret = rtl8366rb_setup_led(priv, dp,</div><div class='add'>+						  of_fwnode_handle(led_np));</div><div class='add'>+			if (ret)</div><div class='add'>+				break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		of_node_put(leds_np);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/dsa/realtek/rtl8366rb.c b/drivers/net/dsa/realtek/rtl8366rb.c<br/>new file mode 100644<br/>index 000000000000..d96ae72b0a5c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/realtek/rtl8366rb.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/realtek/rtl8366rb.c</a></div><div class='hunk'>@@ -0,0 +1,1902 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Realtek SMI subdriver for the Realtek RTL8366RB ethernet switch</div><div class='add'>+ *</div><div class='add'>+ * This is a sparsely documented chip, the only viable documentation seems</div><div class='add'>+ * to be a patched up code drop from the vendor that appear in various</div><div class='add'>+ * GPL source trees.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2017 Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='add'>+ * Copyright (C) 2009-2010 Gabor Juhos &lt;juhosg@openwrt.org&gt;</div><div class='add'>+ * Copyright (C) 2010 Antti Seppälä &lt;a.seppala@gmail.com&gt;</div><div class='add'>+ * Copyright (C) 2010 Roman Yeryomin &lt;roman@advem.lv&gt;</div><div class='add'>+ * Copyright (C) 2011 Colin Leitner &lt;colin.leitner@googlemail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitops.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/if_bridge.h&gt;</div><div class='add'>+#include &lt;linux/if_vlan.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/irqdomain.h&gt;</div><div class='add'>+#include &lt;linux/irqchip/chained_irq.h&gt;</div><div class='add'>+#include &lt;linux/of_irq.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;linux/string_choices.h&gt;</div><div class='add'>+</div><div class='add'>+#include "realtek.h"</div><div class='add'>+#include "realtek-smi.h"</div><div class='add'>+#include "realtek-mdio.h"</div><div class='add'>+#include "rtl83xx.h"</div><div class='add'>+#include "rtl8366rb.h"</div><div class='add'>+</div><div class='add'>+/* Switch Global Configuration register */</div><div class='add'>+#define RTL8366RB_SGCR				0x0000</div><div class='add'>+#define RTL8366RB_SGCR_EN_BC_STORM_CTRL		BIT(0)</div><div class='add'>+#define RTL8366RB_SGCR_MAX_LENGTH(a)		((a) &lt;&lt; 4)</div><div class='add'>+#define RTL8366RB_SGCR_MAX_LENGTH_MASK		RTL8366RB_SGCR_MAX_LENGTH(0x3)</div><div class='add'>+#define RTL8366RB_SGCR_MAX_LENGTH_1522		RTL8366RB_SGCR_MAX_LENGTH(0x0)</div><div class='add'>+#define RTL8366RB_SGCR_MAX_LENGTH_1536		RTL8366RB_SGCR_MAX_LENGTH(0x1)</div><div class='add'>+#define RTL8366RB_SGCR_MAX_LENGTH_1552		RTL8366RB_SGCR_MAX_LENGTH(0x2)</div><div class='add'>+#define RTL8366RB_SGCR_MAX_LENGTH_16000		RTL8366RB_SGCR_MAX_LENGTH(0x3)</div><div class='add'>+#define RTL8366RB_SGCR_EN_VLAN			BIT(13)</div><div class='add'>+#define RTL8366RB_SGCR_EN_VLAN_4KTB		BIT(14)</div><div class='add'>+</div><div class='add'>+/* Port Enable Control register */</div><div class='add'>+#define RTL8366RB_PECR				0x0001</div><div class='add'>+</div><div class='add'>+/* Switch per-port learning disablement register */</div><div class='add'>+#define RTL8366RB_PORT_LEARNDIS_CTRL		0x0002</div><div class='add'>+</div><div class='add'>+/* Security control, actually aging register */</div><div class='add'>+#define RTL8366RB_SECURITY_CTRL			0x0003</div><div class='add'>+</div><div class='add'>+#define RTL8366RB_SSCR2				0x0004</div><div class='add'>+#define RTL8366RB_SSCR2_DROP_UNKNOWN_DA		BIT(0)</div><div class='add'>+</div><div class='add'>+/* Port Mode Control registers */</div><div class='add'>+#define RTL8366RB_PMC0				0x0005</div><div class='add'>+#define RTL8366RB_PMC0_SPI			BIT(0)</div><div class='add'>+#define RTL8366RB_PMC0_EN_AUTOLOAD		BIT(1)</div><div class='add'>+#define RTL8366RB_PMC0_PROBE			BIT(2)</div><div class='add'>+#define RTL8366RB_PMC0_DIS_BISR			BIT(3)</div><div class='add'>+#define RTL8366RB_PMC0_ADCTEST			BIT(4)</div><div class='add'>+#define RTL8366RB_PMC0_SRAM_DIAG		BIT(5)</div><div class='add'>+#define RTL8366RB_PMC0_EN_SCAN			BIT(6)</div><div class='add'>+#define RTL8366RB_PMC0_P4_IOMODE_SHIFT		7</div><div class='add'>+#define RTL8366RB_PMC0_P4_IOMODE_MASK		GENMASK(9, 7)</div><div class='add'>+#define RTL8366RB_PMC0_P5_IOMODE_SHIFT		10</div><div class='add'>+#define RTL8366RB_PMC0_P5_IOMODE_MASK		GENMASK(12, 10)</div><div class='add'>+#define RTL8366RB_PMC0_SDSMODE_SHIFT		13</div><div class='add'>+#define RTL8366RB_PMC0_SDSMODE_MASK		GENMASK(15, 13)</div><div class='add'>+#define RTL8366RB_PMC1				0x0006</div><div class='add'>+</div><div class='add'>+/* Port Mirror Control Register */</div><div class='add'>+#define RTL8366RB_PMCR				0x0007</div><div class='add'>+#define RTL8366RB_PMCR_SOURCE_PORT(a)		(a)</div><div class='add'>+#define RTL8366RB_PMCR_SOURCE_PORT_MASK		0x000f</div><div class='add'>+#define RTL8366RB_PMCR_MONITOR_PORT(a)		((a) &lt;&lt; 4)</div><div class='add'>+#define RTL8366RB_PMCR_MONITOR_PORT_MASK	0x00f0</div><div class='add'>+#define RTL8366RB_PMCR_MIRROR_RX		BIT(8)</div><div class='add'>+#define RTL8366RB_PMCR_MIRROR_TX		BIT(9)</div><div class='add'>+#define RTL8366RB_PMCR_MIRROR_SPC		BIT(10)</div><div class='add'>+#define RTL8366RB_PMCR_MIRROR_ISO		BIT(11)</div><div class='add'>+</div><div class='add'>+/* bits 0..7 = port 0, bits 8..15 = port 1 */</div><div class='add'>+#define RTL8366RB_PAACR0		0x0010</div><div class='add'>+/* bits 0..7 = port 2, bits 8..15 = port 3 */</div><div class='add'>+#define RTL8366RB_PAACR1		0x0011</div><div class='add'>+/* bits 0..7 = port 4, bits 8..15 = port 5 */</div><div class='add'>+#define RTL8366RB_PAACR2		0x0012</div><div class='add'>+#define RTL8366RB_PAACR_SPEED_10M	0</div><div class='add'>+#define RTL8366RB_PAACR_SPEED_100M	1</div><div class='add'>+#define RTL8366RB_PAACR_SPEED_1000M	2</div><div class='add'>+#define RTL8366RB_PAACR_FULL_DUPLEX	BIT(2)</div><div class='add'>+#define RTL8366RB_PAACR_LINK_UP		BIT(4)</div><div class='add'>+#define RTL8366RB_PAACR_TX_PAUSE	BIT(5)</div><div class='add'>+#define RTL8366RB_PAACR_RX_PAUSE	BIT(6)</div><div class='add'>+#define RTL8366RB_PAACR_AN		BIT(7)</div><div class='add'>+</div><div class='add'>+/* bits 0..7 = port 0, bits 8..15 = port 1 */</div><div class='add'>+#define RTL8366RB_PSTAT0		0x0014</div><div class='add'>+/* bits 0..7 = port 2, bits 8..15 = port 3 */</div><div class='add'>+#define RTL8366RB_PSTAT1		0x0015</div><div class='add'>+/* bits 0..7 = port 4, bits 8..15 = port 5 */</div><div class='add'>+#define RTL8366RB_PSTAT2		0x0016</div><div class='add'>+</div><div class='add'>+#define RTL8366RB_POWER_SAVING_REG	0x0021</div><div class='add'>+</div><div class='add'>+/* Spanning tree status (STP) control, two bits per port per FID */</div><div class='add'>+#define RTL8366RB_STP_STATE_BASE	0x0050 /* 0x0050..0x0057 */</div><div class='add'>+#define RTL8366RB_STP_STATE_DISABLED	0x0</div><div class='add'>+#define RTL8366RB_STP_STATE_BLOCKING	0x1</div><div class='add'>+#define RTL8366RB_STP_STATE_LEARNING	0x2</div><div class='add'>+#define RTL8366RB_STP_STATE_FORWARDING	0x3</div><div class='add'>+#define RTL8366RB_STP_MASK		GENMASK(1, 0)</div><div class='add'>+#define RTL8366RB_STP_STATE(port, state) \</div><div class='add'>+	((state) &lt;&lt; ((port) * 2))</div><div class='add'>+#define RTL8366RB_STP_STATE_MASK(port) \</div><div class='add'>+	RTL8366RB_STP_STATE((port), RTL8366RB_STP_MASK)</div><div class='add'>+</div><div class='add'>+/* CPU port control reg */</div><div class='add'>+#define RTL8366RB_CPU_CTRL_REG		0x0061</div><div class='add'>+#define RTL8366RB_CPU_PORTS_MSK		0x00FF</div><div class='add'>+/* Disables inserting custom tag length/type 0x8899 */</div><div class='add'>+#define RTL8366RB_CPU_NO_TAG		BIT(15)</div><div class='add'>+#define RTL8366RB_CPU_TAG_SIZE		4</div><div class='add'>+</div><div class='add'>+#define RTL8366RB_SMAR0			0x0070 /* bits 0..15 */</div><div class='add'>+#define RTL8366RB_SMAR1			0x0071 /* bits 16..31 */</div><div class='add'>+#define RTL8366RB_SMAR2			0x0072 /* bits 32..47 */</div><div class='add'>+</div><div class='add'>+#define RTL8366RB_RESET_CTRL_REG		0x0100</div><div class='add'>+#define RTL8366RB_CHIP_CTRL_RESET_HW		BIT(0)</div><div class='add'>+#define RTL8366RB_CHIP_CTRL_RESET_SW		BIT(1)</div><div class='add'>+</div><div class='add'>+#define RTL8366RB_CHIP_ID_REG			0x0509</div><div class='add'>+#define RTL8366RB_CHIP_ID_8366			0x5937</div><div class='add'>+#define RTL8366RB_CHIP_VERSION_CTRL_REG		0x050A</div><div class='add'>+#define RTL8366RB_CHIP_VERSION_MASK		0xf</div><div class='add'>+</div><div class='add'>+/* PHY registers control */</div><div class='add'>+#define RTL8366RB_PHY_ACCESS_CTRL_REG		0x8000</div><div class='add'>+#define RTL8366RB_PHY_CTRL_READ			BIT(0)</div><div class='add'>+#define RTL8366RB_PHY_CTRL_WRITE		0</div><div class='add'>+#define RTL8366RB_PHY_ACCESS_BUSY_REG		0x8001</div><div class='add'>+#define RTL8366RB_PHY_INT_BUSY			BIT(0)</div><div class='add'>+#define RTL8366RB_PHY_EXT_BUSY			BIT(4)</div><div class='add'>+#define RTL8366RB_PHY_ACCESS_DATA_REG		0x8002</div><div class='add'>+#define RTL8366RB_PHY_EXT_CTRL_REG		0x8010</div><div class='add'>+#define RTL8366RB_PHY_EXT_WRDATA_REG		0x8011</div><div class='add'>+#define RTL8366RB_PHY_EXT_RDDATA_REG		0x8012</div><div class='add'>+</div><div class='add'>+#define RTL8366RB_PHY_REG_MASK			0x1f</div><div class='add'>+#define RTL8366RB_PHY_PAGE_OFFSET		5</div><div class='add'>+#define RTL8366RB_PHY_PAGE_MASK			(0xf &lt;&lt; 5)</div><div class='add'>+#define RTL8366RB_PHY_NO_OFFSET			9</div><div class='add'>+#define RTL8366RB_PHY_NO_MASK			(0x1f &lt;&lt; 9)</div><div class='add'>+</div><div class='add'>+/* VLAN Ingress Control Register 1, one bit per port.</div><div class='add'>+ * bit 0 .. 5 will make the switch drop ingress frames without</div><div class='add'>+ * VID such as untagged or priority-tagged frames for respective</div><div class='add'>+ * port.</div><div class='add'>+ * bit 6 .. 11 will make the switch drop ingress frames carrying</div><div class='add'>+ * a C-tag with VID != 0 for respective port.</div><div class='add'>+ */</div><div class='add'>+#define RTL8366RB_VLAN_INGRESS_CTRL1_REG	0x037E</div><div class='add'>+#define RTL8366RB_VLAN_INGRESS_CTRL1_DROP(port)	(BIT((port)) | BIT((port) + 6))</div><div class='add'>+</div><div class='add'>+/* VLAN Ingress Control Register 2, one bit per port.</div><div class='add'>+ * bit0 .. bit5 will make the switch drop all ingress frames with</div><div class='add'>+ * a VLAN classification that does not include the port is in its</div><div class='add'>+ * member set.</div><div class='add'>+ */</div><div class='add'>+#define RTL8366RB_VLAN_INGRESS_CTRL2_REG	0x037f</div><div class='add'>+</div><div class='add'>+#define RTL8366RB_MIB_COUNT			33</div><div class='add'>+#define RTL8366RB_GLOBAL_MIB_COUNT		1</div><div class='add'>+#define RTL8366RB_MIB_COUNTER_PORT_OFFSET	0x0050</div><div class='add'>+#define RTL8366RB_MIB_COUNTER_BASE		0x1000</div><div class='add'>+#define RTL8366RB_MIB_CTRL_REG			0x13F0</div><div class='add'>+#define RTL8366RB_MIB_CTRL_USER_MASK		0x0FFC</div><div class='add'>+#define RTL8366RB_MIB_CTRL_BUSY_MASK		BIT(0)</div><div class='add'>+#define RTL8366RB_MIB_CTRL_RESET_MASK		BIT(1)</div><div class='add'>+#define RTL8366RB_MIB_CTRL_PORT_RESET(_p)	BIT(2 + (_p))</div><div class='add'>+#define RTL8366RB_MIB_CTRL_GLOBAL_RESET		BIT(11)</div><div class='add'>+</div><div class='add'>+#define RTL8366RB_PORT_VLAN_CTRL_BASE		0x0063</div><div class='add'>+#define RTL8366RB_PORT_VLAN_CTRL_REG(_p)  \</div><div class='add'>+		(RTL8366RB_PORT_VLAN_CTRL_BASE + (_p) / 4)</div><div class='add'>+#define RTL8366RB_PORT_VLAN_CTRL_MASK		0xf</div><div class='add'>+#define RTL8366RB_PORT_VLAN_CTRL_SHIFT(_p)	(4 * ((_p) % 4))</div><div class='add'>+</div><div class='add'>+#define RTL8366RB_VLAN_TABLE_READ_BASE		0x018C</div><div class='add'>+#define RTL8366RB_VLAN_TABLE_WRITE_BASE		0x0185</div><div class='add'>+</div><div class='add'>+#define RTL8366RB_TABLE_ACCESS_CTRL_REG		0x0180</div><div class='add'>+#define RTL8366RB_TABLE_VLAN_READ_CTRL		0x0E01</div><div class='add'>+#define RTL8366RB_TABLE_VLAN_WRITE_CTRL		0x0F01</div><div class='add'>+</div><div class='add'>+#define RTL8366RB_VLAN_MC_BASE(_x)		(0x0020 + (_x) * 3)</div><div class='add'>+</div><div class='add'>+#define RTL8366RB_PORT_LINK_STATUS_BASE		0x0014</div><div class='add'>+#define RTL8366RB_PORT_STATUS_SPEED_MASK	0x0003</div><div class='add'>+#define RTL8366RB_PORT_STATUS_DUPLEX_MASK	0x0004</div><div class='add'>+#define RTL8366RB_PORT_STATUS_LINK_MASK		0x0010</div><div class='add'>+#define RTL8366RB_PORT_STATUS_TXPAUSE_MASK	0x0020</div><div class='add'>+#define RTL8366RB_PORT_STATUS_RXPAUSE_MASK	0x0040</div><div class='add'>+#define RTL8366RB_PORT_STATUS_AN_MASK		0x0080</div><div class='add'>+</div><div class='add'>+#define RTL8366RB_NUM_VLANS		16</div><div class='add'>+#define RTL8366RB_NUM_VIDS		4096</div><div class='add'>+#define RTL8366RB_PRIORITYMAX		7</div><div class='add'>+#define RTL8366RB_NUM_FIDS		8</div><div class='add'>+#define RTL8366RB_FIDMAX		7</div><div class='add'>+</div><div class='add'>+#define RTL8366RB_PORT_1		BIT(0) /* In userspace port 0 */</div><div class='add'>+#define RTL8366RB_PORT_2		BIT(1) /* In userspace port 1 */</div><div class='add'>+#define RTL8366RB_PORT_3		BIT(2) /* In userspace port 2 */</div><div class='add'>+#define RTL8366RB_PORT_4		BIT(3) /* In userspace port 3 */</div><div class='add'>+#define RTL8366RB_PORT_5		BIT(4) /* In userspace port 4 */</div><div class='add'>+</div><div class='add'>+#define RTL8366RB_PORT_CPU		BIT(5) /* CPU port */</div><div class='add'>+</div><div class='add'>+#define RTL8366RB_PORT_ALL		(RTL8366RB_PORT_1 |	\</div><div class='add'>+					 RTL8366RB_PORT_2 |	\</div><div class='add'>+					 RTL8366RB_PORT_3 |	\</div><div class='add'>+					 RTL8366RB_PORT_4 |	\</div><div class='add'>+					 RTL8366RB_PORT_5 |	\</div><div class='add'>+					 RTL8366RB_PORT_CPU)</div><div class='add'>+</div><div class='add'>+#define RTL8366RB_PORT_ALL_BUT_CPU	(RTL8366RB_PORT_1 |	\</div><div class='add'>+					 RTL8366RB_PORT_2 |	\</div><div class='add'>+					 RTL8366RB_PORT_3 |	\</div><div class='add'>+					 RTL8366RB_PORT_4 |	\</div><div class='add'>+					 RTL8366RB_PORT_5)</div><div class='add'>+</div><div class='add'>+#define RTL8366RB_PORT_ALL_EXTERNAL	(RTL8366RB_PORT_1 |	\</div><div class='add'>+					 RTL8366RB_PORT_2 |	\</div><div class='add'>+					 RTL8366RB_PORT_3 |	\</div><div class='add'>+					 RTL8366RB_PORT_4)</div><div class='add'>+</div><div class='add'>+#define RTL8366RB_PORT_ALL_INTERNAL	 RTL8366RB_PORT_CPU</div><div class='add'>+</div><div class='add'>+/* First configuration word per member config, VID and prio */</div><div class='add'>+#define RTL8366RB_VLAN_VID_MASK		0xfff</div><div class='add'>+#define RTL8366RB_VLAN_PRIORITY_SHIFT	12</div><div class='add'>+#define RTL8366RB_VLAN_PRIORITY_MASK	0x7</div><div class='add'>+/* Second configuration word per member config, member and untagged */</div><div class='add'>+#define RTL8366RB_VLAN_UNTAG_SHIFT	8</div><div class='add'>+#define RTL8366RB_VLAN_UNTAG_MASK	0xff</div><div class='add'>+#define RTL8366RB_VLAN_MEMBER_MASK	0xff</div><div class='add'>+/* Third config word per member config, STAG currently unused */</div><div class='add'>+#define RTL8366RB_VLAN_STAG_MBR_MASK	0xff</div><div class='add'>+#define RTL8366RB_VLAN_STAG_MBR_SHIFT	8</div><div class='add'>+#define RTL8366RB_VLAN_STAG_IDX_MASK	0x7</div><div class='add'>+#define RTL8366RB_VLAN_STAG_IDX_SHIFT	5</div><div class='add'>+#define RTL8366RB_VLAN_FID_MASK		0x7</div><div class='add'>+</div><div class='add'>+/* Port ingress bandwidth control */</div><div class='add'>+#define RTL8366RB_IB_BASE		0x0200</div><div class='add'>+#define RTL8366RB_IB_REG(pnum)		(RTL8366RB_IB_BASE + (pnum))</div><div class='add'>+#define RTL8366RB_IB_BDTH_MASK		0x3fff</div><div class='add'>+#define RTL8366RB_IB_PREIFG		BIT(14)</div><div class='add'>+</div><div class='add'>+/* Port egress bandwidth control */</div><div class='add'>+#define RTL8366RB_EB_BASE		0x02d1</div><div class='add'>+#define RTL8366RB_EB_REG(pnum)		(RTL8366RB_EB_BASE + (pnum))</div><div class='add'>+#define RTL8366RB_EB_BDTH_MASK		0x3fff</div><div class='add'>+#define RTL8366RB_EB_PREIFG_REG		0x02f8</div><div class='add'>+#define RTL8366RB_EB_PREIFG		BIT(9)</div><div class='add'>+</div><div class='add'>+#define RTL8366RB_BDTH_SW_MAX		1048512 /* 1048576? */</div><div class='add'>+#define RTL8366RB_BDTH_UNIT		64</div><div class='add'>+#define RTL8366RB_BDTH_REG_DEFAULT	16383</div><div class='add'>+</div><div class='add'>+/* QOS */</div><div class='add'>+#define RTL8366RB_QOS			BIT(15)</div><div class='add'>+/* Include/Exclude Preamble and IFG (20 bytes). 0:Exclude, 1:Include. */</div><div class='add'>+#define RTL8366RB_QOS_DEFAULT_PREIFG	1</div><div class='add'>+</div><div class='add'>+/* Interrupt handling */</div><div class='add'>+#define RTL8366RB_INTERRUPT_CONTROL_REG	0x0440</div><div class='add'>+#define RTL8366RB_INTERRUPT_POLARITY	BIT(0)</div><div class='add'>+#define RTL8366RB_P4_RGMII_LED		BIT(2)</div><div class='add'>+#define RTL8366RB_INTERRUPT_MASK_REG	0x0441</div><div class='add'>+#define RTL8366RB_INTERRUPT_LINK_CHGALL	GENMASK(11, 0)</div><div class='add'>+#define RTL8366RB_INTERRUPT_ACLEXCEED	BIT(8)</div><div class='add'>+#define RTL8366RB_INTERRUPT_STORMEXCEED	BIT(9)</div><div class='add'>+#define RTL8366RB_INTERRUPT_P4_FIBER	BIT(12)</div><div class='add'>+#define RTL8366RB_INTERRUPT_P4_UTP	BIT(13)</div><div class='add'>+#define RTL8366RB_INTERRUPT_VALID	(RTL8366RB_INTERRUPT_LINK_CHGALL | \</div><div class='add'>+					 RTL8366RB_INTERRUPT_ACLEXCEED | \</div><div class='add'>+					 RTL8366RB_INTERRUPT_STORMEXCEED | \</div><div class='add'>+					 RTL8366RB_INTERRUPT_P4_FIBER | \</div><div class='add'>+					 RTL8366RB_INTERRUPT_P4_UTP)</div><div class='add'>+#define RTL8366RB_INTERRUPT_STATUS_REG	0x0442</div><div class='add'>+#define RTL8366RB_NUM_INTERRUPT		14 /* 0..13 */</div><div class='add'>+</div><div class='add'>+/* Port isolation registers */</div><div class='add'>+#define RTL8366RB_PORT_ISO_BASE		0x0F08</div><div class='add'>+#define RTL8366RB_PORT_ISO(pnum)	(RTL8366RB_PORT_ISO_BASE + (pnum))</div><div class='add'>+#define RTL8366RB_PORT_ISO_EN		BIT(0)</div><div class='add'>+#define RTL8366RB_PORT_ISO_PORTS_MASK	GENMASK(7, 1)</div><div class='add'>+#define RTL8366RB_PORT_ISO_PORTS(pmask)	((pmask) &lt;&lt; 1)</div><div class='add'>+</div><div class='add'>+/* bits 0..5 enable force when cleared */</div><div class='add'>+#define RTL8366RB_MAC_FORCE_CTRL_REG	0x0F11</div><div class='add'>+</div><div class='add'>+#define RTL8366RB_OAM_PARSER_REG	0x0F14</div><div class='add'>+#define RTL8366RB_OAM_MULTIPLEXER_REG	0x0F15</div><div class='add'>+</div><div class='add'>+#define RTL8366RB_GREEN_FEATURE_REG	0x0F51</div><div class='add'>+#define RTL8366RB_GREEN_FEATURE_MSK	0x0007</div><div class='add'>+#define RTL8366RB_GREEN_FEATURE_TX	BIT(0)</div><div class='add'>+#define RTL8366RB_GREEN_FEATURE_RX	BIT(2)</div><div class='add'>+</div><div class='add'>+static struct rtl8366_mib_counter rtl8366rb_mib_counters[] = {</div><div class='add'>+	{ 0,  0, 4, "IfInOctets"				},</div><div class='add'>+	{ 0,  4, 4, "EtherStatsOctets"				},</div><div class='add'>+	{ 0,  8, 2, "EtherStatsUnderSizePkts"			},</div><div class='add'>+	{ 0, 10, 2, "EtherFragments"				},</div><div class='add'>+	{ 0, 12, 2, "EtherStatsPkts64Octets"			},</div><div class='add'>+	{ 0, 14, 2, "EtherStatsPkts65to127Octets"		},</div><div class='add'>+	{ 0, 16, 2, "EtherStatsPkts128to255Octets"		},</div><div class='add'>+	{ 0, 18, 2, "EtherStatsPkts256to511Octets"		},</div><div class='add'>+	{ 0, 20, 2, "EtherStatsPkts512to1023Octets"		},</div><div class='add'>+	{ 0, 22, 2, "EtherStatsPkts1024to1518Octets"		},</div><div class='add'>+	{ 0, 24, 2, "EtherOversizeStats"			},</div><div class='add'>+	{ 0, 26, 2, "EtherStatsJabbers"				},</div><div class='add'>+	{ 0, 28, 2, "IfInUcastPkts"				},</div><div class='add'>+	{ 0, 30, 2, "EtherStatsMulticastPkts"			},</div><div class='add'>+	{ 0, 32, 2, "EtherStatsBroadcastPkts"			},</div><div class='add'>+	{ 0, 34, 2, "EtherStatsDropEvents"			},</div><div class='add'>+	{ 0, 36, 2, "Dot3StatsFCSErrors"			},</div><div class='add'>+	{ 0, 38, 2, "Dot3StatsSymbolErrors"			},</div><div class='add'>+	{ 0, 40, 2, "Dot3InPauseFrames"				},</div><div class='add'>+	{ 0, 42, 2, "Dot3ControlInUnknownOpcodes"		},</div><div class='add'>+	{ 0, 44, 4, "IfOutOctets"				},</div><div class='add'>+	{ 0, 48, 2, "Dot3StatsSingleCollisionFrames"		},</div><div class='add'>+	{ 0, 50, 2, "Dot3StatMultipleCollisionFrames"		},</div><div class='add'>+	{ 0, 52, 2, "Dot3sDeferredTransmissions"		},</div><div class='add'>+	{ 0, 54, 2, "Dot3StatsLateCollisions"			},</div><div class='add'>+	{ 0, 56, 2, "EtherStatsCollisions"			},</div><div class='add'>+	{ 0, 58, 2, "Dot3StatsExcessiveCollisions"		},</div><div class='add'>+	{ 0, 60, 2, "Dot3OutPauseFrames"			},</div><div class='add'>+	{ 0, 62, 2, "Dot1dBasePortDelayExceededDiscards"	},</div><div class='add'>+	{ 0, 64, 2, "Dot1dTpPortInDiscards"			},</div><div class='add'>+	{ 0, 66, 2, "IfOutUcastPkts"				},</div><div class='add'>+	{ 0, 68, 2, "IfOutMulticastPkts"			},</div><div class='add'>+	{ 0, 70, 2, "IfOutBroadcastPkts"			},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int rtl8366rb_get_mib_counter(struct realtek_priv *priv,</div><div class='add'>+				     int port,</div><div class='add'>+				     struct rtl8366_mib_counter *mib,</div><div class='add'>+				     u64 *mibvalue)</div><div class='add'>+{</div><div class='add'>+	u32 addr, val;</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	addr = RTL8366RB_MIB_COUNTER_BASE +</div><div class='add'>+		RTL8366RB_MIB_COUNTER_PORT_OFFSET * (port) +</div><div class='add'>+		mib-&gt;offset;</div><div class='add'>+</div><div class='add'>+	/* Writing access counter address first</div><div class='add'>+	 * then ASIC will prepare 64bits counter wait for being retrived</div><div class='add'>+	 */</div><div class='add'>+	ret = regmap_write(priv-&gt;map, addr, 0); /* Write whatever */</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Read MIB control register */</div><div class='add'>+	ret = regmap_read(priv-&gt;map, RTL8366RB_MIB_CTRL_REG, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	if (val &amp; RTL8366RB_MIB_CTRL_BUSY_MASK)</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	if (val &amp; RTL8366RB_MIB_CTRL_RESET_MASK)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	/* Read each individual MIB 16 bits at the time */</div><div class='add'>+	*mibvalue = 0;</div><div class='add'>+	for (i = mib-&gt;length; i &gt; 0; i--) {</div><div class='add'>+		ret = regmap_read(priv-&gt;map, addr + (i - 1), &amp;val);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+		*mibvalue = (*mibvalue &lt;&lt; 16) | (val &amp; 0xFFFF);</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 rtl8366rb_get_irqmask(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	int line = irqd_to_hwirq(d);</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	/* For line interrupts we combine link down in bits</div><div class='add'>+	 * 6..11 with link up in bits 0..5 into one interrupt.</div><div class='add'>+	 */</div><div class='add'>+	if (line &lt; 12)</div><div class='add'>+		val = BIT(line) | BIT(line + 6);</div><div class='add'>+	else</div><div class='add'>+		val = BIT(line);</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rtl8366rb_mask_irq(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = irq_data_get_irq_chip_data(d);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_update_bits(priv-&gt;map, RTL8366RB_INTERRUPT_MASK_REG,</div><div class='add'>+				 rtl8366rb_get_irqmask(d), 0);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(priv-&gt;dev, "could not mask IRQ\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rtl8366rb_unmask_irq(struct irq_data *d)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = irq_data_get_irq_chip_data(d);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_update_bits(priv-&gt;map, RTL8366RB_INTERRUPT_MASK_REG,</div><div class='add'>+				 rtl8366rb_get_irqmask(d),</div><div class='add'>+				 rtl8366rb_get_irqmask(d));</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(priv-&gt;dev, "could not unmask IRQ\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t rtl8366rb_irq(int irq, void *data)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = data;</div><div class='add'>+	u32 stat;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* This clears the IRQ status register */</div><div class='add'>+	ret = regmap_read(priv-&gt;map, RTL8366RB_INTERRUPT_STATUS_REG,</div><div class='add'>+			  &amp;stat);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(priv-&gt;dev, "can't read interrupt status\n");</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+	}</div><div class='add'>+	stat &amp;= RTL8366RB_INTERRUPT_VALID;</div><div class='add'>+	if (!stat)</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+	while (stat) {</div><div class='add'>+		int line = __ffs(stat);</div><div class='add'>+		int child_irq;</div><div class='add'>+</div><div class='add'>+		stat &amp;= ~BIT(line);</div><div class='add'>+		/* For line interrupts we combine link down in bits</div><div class='add'>+		 * 6..11 with link up in bits 0..5 into one interrupt.</div><div class='add'>+		 */</div><div class='add'>+		if (line &lt; 12 &amp;&amp; line &gt; 5)</div><div class='add'>+			line -= 5;</div><div class='add'>+		child_irq = irq_find_mapping(priv-&gt;irqdomain, line);</div><div class='add'>+		handle_nested_irq(child_irq);</div><div class='add'>+	}</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct irq_chip rtl8366rb_irq_chip = {</div><div class='add'>+	.name = "RTL8366RB",</div><div class='add'>+	.irq_mask = rtl8366rb_mask_irq,</div><div class='add'>+	.irq_unmask = rtl8366rb_unmask_irq,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int rtl8366rb_irq_map(struct irq_domain *domain, unsigned int irq,</div><div class='add'>+			     irq_hw_number_t hwirq)</div><div class='add'>+{</div><div class='add'>+	irq_set_chip_data(irq, domain-&gt;host_data);</div><div class='add'>+	irq_set_chip_and_handler(irq, &amp;rtl8366rb_irq_chip, handle_simple_irq);</div><div class='add'>+	irq_set_nested_thread(irq, 1);</div><div class='add'>+	irq_set_noprobe(irq);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rtl8366rb_irq_unmap(struct irq_domain *d, unsigned int irq)</div><div class='add'>+{</div><div class='add'>+	irq_set_nested_thread(irq, 0);</div><div class='add'>+	irq_set_chip_and_handler(irq, NULL, NULL);</div><div class='add'>+	irq_set_chip_data(irq, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct irq_domain_ops rtl8366rb_irqdomain_ops = {</div><div class='add'>+	.map = rtl8366rb_irq_map,</div><div class='add'>+	.unmap = rtl8366rb_irq_unmap,</div><div class='add'>+	.xlate  = irq_domain_xlate_onecell,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int rtl8366rb_setup_cascaded_irq(struct realtek_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct device_node *intc;</div><div class='add'>+	unsigned long irq_trig;</div><div class='add'>+	int irq;</div><div class='add'>+	int ret;</div><div class='add'>+	u32 val;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	intc = of_get_child_by_name(priv-&gt;dev-&gt;of_node, "interrupt-controller");</div><div class='add'>+	if (!intc) {</div><div class='add'>+		dev_err(priv-&gt;dev, "missing child interrupt-controller node\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	/* RB8366RB IRQs cascade off this one */</div><div class='add'>+	irq = of_irq_get(intc, 0);</div><div class='add'>+	if (irq &lt;= 0) {</div><div class='add'>+		dev_err(priv-&gt;dev, "failed to get parent IRQ\n");</div><div class='add'>+		ret = irq ? irq : -EINVAL;</div><div class='add'>+		goto out_put_node;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* This clears the IRQ status register */</div><div class='add'>+	ret = regmap_read(priv-&gt;map, RTL8366RB_INTERRUPT_STATUS_REG,</div><div class='add'>+			  &amp;val);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(priv-&gt;dev, "can't read interrupt status\n");</div><div class='add'>+		goto out_put_node;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Fetch IRQ edge information from the descriptor */</div><div class='add'>+	irq_trig = irq_get_trigger_type(irq);</div><div class='add'>+	switch (irq_trig) {</div><div class='add'>+	case IRQF_TRIGGER_RISING:</div><div class='add'>+	case IRQF_TRIGGER_HIGH:</div><div class='add'>+		dev_info(priv-&gt;dev, "active high/rising IRQ\n");</div><div class='add'>+		val = 0;</div><div class='add'>+		break;</div><div class='add'>+	case IRQF_TRIGGER_FALLING:</div><div class='add'>+	case IRQF_TRIGGER_LOW:</div><div class='add'>+		dev_info(priv-&gt;dev, "active low/falling IRQ\n");</div><div class='add'>+		val = RTL8366RB_INTERRUPT_POLARITY;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	ret = regmap_update_bits(priv-&gt;map, RTL8366RB_INTERRUPT_CONTROL_REG,</div><div class='add'>+				 RTL8366RB_INTERRUPT_POLARITY,</div><div class='add'>+				 val);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(priv-&gt;dev, "could not configure IRQ polarity\n");</div><div class='add'>+		goto out_put_node;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = devm_request_threaded_irq(priv-&gt;dev, irq, NULL,</div><div class='add'>+					rtl8366rb_irq, IRQF_ONESHOT,</div><div class='add'>+					"RTL8366RB", priv);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(priv-&gt;dev, "unable to request irq: %d\n", ret);</div><div class='add'>+		goto out_put_node;</div><div class='add'>+	}</div><div class='add'>+	priv-&gt;irqdomain = irq_domain_create_linear(of_fwnode_handle(intc), RTL8366RB_NUM_INTERRUPT,</div><div class='add'>+						   &amp;rtl8366rb_irqdomain_ops, priv);</div><div class='add'>+	if (!priv-&gt;irqdomain) {</div><div class='add'>+		dev_err(priv-&gt;dev, "failed to create IRQ domain\n");</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto out_put_node;</div><div class='add'>+	}</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;num_ports; i++)</div><div class='add'>+		irq_set_parent(irq_create_mapping(priv-&gt;irqdomain, i), irq);</div><div class='add'>+</div><div class='add'>+out_put_node:</div><div class='add'>+	of_node_put(intc);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8366rb_set_addr(struct realtek_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u8 addr[ETH_ALEN];</div><div class='add'>+	u16 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	eth_random_addr(addr);</div><div class='add'>+</div><div class='add'>+	dev_info(priv-&gt;dev, "set MAC: %02X:%02X:%02X:%02X:%02X:%02X\n",</div><div class='add'>+		 addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]);</div><div class='add'>+	val = addr[0] &lt;&lt; 8 | addr[1];</div><div class='add'>+	ret = regmap_write(priv-&gt;map, RTL8366RB_SMAR0, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+	val = addr[2] &lt;&lt; 8 | addr[3];</div><div class='add'>+	ret = regmap_write(priv-&gt;map, RTL8366RB_SMAR1, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+	val = addr[4] &lt;&lt; 8 | addr[5];</div><div class='add'>+	ret = regmap_write(priv-&gt;map, RTL8366RB_SMAR2, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Found in a vendor driver */</div><div class='add'>+</div><div class='add'>+/* Struct for handling the jam tables' entries */</div><div class='add'>+struct rtl8366rb_jam_tbl_entry {</div><div class='add'>+	u16 reg;</div><div class='add'>+	u16 val;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* For the "version 0" early silicon, appear in most source releases */</div><div class='add'>+static const struct rtl8366rb_jam_tbl_entry rtl8366rb_init_jam_ver_0[] = {</div><div class='add'>+	{0x000B, 0x0001}, {0x03A6, 0x0100}, {0x03A7, 0x0001}, {0x02D1, 0x3FFF},</div><div class='add'>+	{0x02D2, 0x3FFF}, {0x02D3, 0x3FFF}, {0x02D4, 0x3FFF}, {0x02D5, 0x3FFF},</div><div class='add'>+	{0x02D6, 0x3FFF}, {0x02D7, 0x3FFF}, {0x02D8, 0x3FFF}, {0x022B, 0x0688},</div><div class='add'>+	{0x022C, 0x0FAC}, {0x03D0, 0x4688}, {0x03D1, 0x01F5}, {0x0000, 0x0830},</div><div class='add'>+	{0x02F9, 0x0200}, {0x02F7, 0x7FFF}, {0x02F8, 0x03FF}, {0x0080, 0x03E8},</div><div class='add'>+	{0x0081, 0x00CE}, {0x0082, 0x00DA}, {0x0083, 0x0230}, {0xBE0F, 0x2000},</div><div class='add'>+	{0x0231, 0x422A}, {0x0232, 0x422A}, {0x0233, 0x422A}, {0x0234, 0x422A},</div><div class='add'>+	{0x0235, 0x422A}, {0x0236, 0x422A}, {0x0237, 0x422A}, {0x0238, 0x422A},</div><div class='add'>+	{0x0239, 0x422A}, {0x023A, 0x422A}, {0x023B, 0x422A}, {0x023C, 0x422A},</div><div class='add'>+	{0x023D, 0x422A}, {0x023E, 0x422A}, {0x023F, 0x422A}, {0x0240, 0x422A},</div><div class='add'>+	{0x0241, 0x422A}, {0x0242, 0x422A}, {0x0243, 0x422A}, {0x0244, 0x422A},</div><div class='add'>+	{0x0245, 0x422A}, {0x0246, 0x422A}, {0x0247, 0x422A}, {0x0248, 0x422A},</div><div class='add'>+	{0x0249, 0x0146}, {0x024A, 0x0146}, {0x024B, 0x0146}, {0xBE03, 0xC961},</div><div class='add'>+	{0x024D, 0x0146}, {0x024E, 0x0146}, {0x024F, 0x0146}, {0x0250, 0x0146},</div><div class='add'>+	{0xBE64, 0x0226}, {0x0252, 0x0146}, {0x0253, 0x0146}, {0x024C, 0x0146},</div><div class='add'>+	{0x0251, 0x0146}, {0x0254, 0x0146}, {0xBE62, 0x3FD0}, {0x0084, 0x0320},</div><div class='add'>+	{0x0255, 0x0146}, {0x0256, 0x0146}, {0x0257, 0x0146}, {0x0258, 0x0146},</div><div class='add'>+	{0x0259, 0x0146}, {0x025A, 0x0146}, {0x025B, 0x0146}, {0x025C, 0x0146},</div><div class='add'>+	{0x025D, 0x0146}, {0x025E, 0x0146}, {0x025F, 0x0146}, {0x0260, 0x0146},</div><div class='add'>+	{0x0261, 0xA23F}, {0x0262, 0x0294}, {0x0263, 0xA23F}, {0x0264, 0x0294},</div><div class='add'>+	{0x0265, 0xA23F}, {0x0266, 0x0294}, {0x0267, 0xA23F}, {0x0268, 0x0294},</div><div class='add'>+	{0x0269, 0xA23F}, {0x026A, 0x0294}, {0x026B, 0xA23F}, {0x026C, 0x0294},</div><div class='add'>+	{0x026D, 0xA23F}, {0x026E, 0x0294}, {0x026F, 0xA23F}, {0x0270, 0x0294},</div><div class='add'>+	{0x02F5, 0x0048}, {0xBE09, 0x0E00}, {0xBE1E, 0x0FA0}, {0xBE14, 0x8448},</div><div class='add'>+	{0xBE15, 0x1007}, {0xBE4A, 0xA284}, {0xC454, 0x3F0B}, {0xC474, 0x3F0B},</div><div class='add'>+	{0xBE48, 0x3672}, {0xBE4B, 0x17A7}, {0xBE4C, 0x0B15}, {0xBE52, 0x0EDD},</div><div class='add'>+	{0xBE49, 0x8C00}, {0xBE5B, 0x785C}, {0xBE5C, 0x785C}, {0xBE5D, 0x785C},</div><div class='add'>+	{0xBE61, 0x368A}, {0xBE63, 0x9B84}, {0xC456, 0xCC13}, {0xC476, 0xCC13},</div><div class='add'>+	{0xBE65, 0x307D}, {0xBE6D, 0x0005}, {0xBE6E, 0xE120}, {0xBE2E, 0x7BAF},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* This v1 init sequence is from Belkin F5D8235 U-Boot release */</div><div class='add'>+static const struct rtl8366rb_jam_tbl_entry rtl8366rb_init_jam_ver_1[] = {</div><div class='add'>+	{0x0000, 0x0830}, {0x0001, 0x8000}, {0x0400, 0x8130}, {0xBE78, 0x3C3C},</div><div class='add'>+	{0x0431, 0x5432}, {0xBE37, 0x0CE4}, {0x02FA, 0xFFDF}, {0x02FB, 0xFFE0},</div><div class='add'>+	{0xC44C, 0x1585}, {0xC44C, 0x1185}, {0xC44C, 0x1585}, {0xC46C, 0x1585},</div><div class='add'>+	{0xC46C, 0x1185}, {0xC46C, 0x1585}, {0xC451, 0x2135}, {0xC471, 0x2135},</div><div class='add'>+	{0xBE10, 0x8140}, {0xBE15, 0x0007}, {0xBE6E, 0xE120}, {0xBE69, 0xD20F},</div><div class='add'>+	{0xBE6B, 0x0320}, {0xBE24, 0xB000}, {0xBE23, 0xFF51}, {0xBE22, 0xDF20},</div><div class='add'>+	{0xBE21, 0x0140}, {0xBE20, 0x00BB}, {0xBE24, 0xB800}, {0xBE24, 0x0000},</div><div class='add'>+	{0xBE24, 0x7000}, {0xBE23, 0xFF51}, {0xBE22, 0xDF60}, {0xBE21, 0x0140},</div><div class='add'>+	{0xBE20, 0x0077}, {0xBE24, 0x7800}, {0xBE24, 0x0000}, {0xBE2E, 0x7B7A},</div><div class='add'>+	{0xBE36, 0x0CE4}, {0x02F5, 0x0048}, {0xBE77, 0x2940}, {0x000A, 0x83E0},</div><div class='add'>+	{0xBE79, 0x3C3C}, {0xBE00, 0x1340},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* This v2 init sequence is from Belkin F5D8235 U-Boot release */</div><div class='add'>+static const struct rtl8366rb_jam_tbl_entry rtl8366rb_init_jam_ver_2[] = {</div><div class='add'>+	{0x0450, 0x0000}, {0x0400, 0x8130}, {0x000A, 0x83ED}, {0x0431, 0x5432},</div><div class='add'>+	{0xC44F, 0x6250}, {0xC46F, 0x6250}, {0xC456, 0x0C14}, {0xC476, 0x0C14},</div><div class='add'>+	{0xC44C, 0x1C85}, {0xC44C, 0x1885}, {0xC44C, 0x1C85}, {0xC46C, 0x1C85},</div><div class='add'>+	{0xC46C, 0x1885}, {0xC46C, 0x1C85}, {0xC44C, 0x0885}, {0xC44C, 0x0881},</div><div class='add'>+	{0xC44C, 0x0885}, {0xC46C, 0x0885}, {0xC46C, 0x0881}, {0xC46C, 0x0885},</div><div class='add'>+	{0xBE2E, 0x7BA7}, {0xBE36, 0x1000}, {0xBE37, 0x1000}, {0x8000, 0x0001},</div><div class='add'>+	{0xBE69, 0xD50F}, {0x8000, 0x0000}, {0xBE69, 0xD50F}, {0xBE6E, 0x0320},</div><div class='add'>+	{0xBE77, 0x2940}, {0xBE78, 0x3C3C}, {0xBE79, 0x3C3C}, {0xBE6E, 0xE120},</div><div class='add'>+	{0x8000, 0x0001}, {0xBE15, 0x1007}, {0x8000, 0x0000}, {0xBE15, 0x1007},</div><div class='add'>+	{0xBE14, 0x0448}, {0xBE1E, 0x00A0}, {0xBE10, 0x8160}, {0xBE10, 0x8140},</div><div class='add'>+	{0xBE00, 0x1340}, {0x0F51, 0x0010},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Appears in a DDWRT code dump */</div><div class='add'>+static const struct rtl8366rb_jam_tbl_entry rtl8366rb_init_jam_ver_3[] = {</div><div class='add'>+	{0x0000, 0x0830}, {0x0400, 0x8130}, {0x000A, 0x83ED}, {0x0431, 0x5432},</div><div class='add'>+	{0x0F51, 0x0017}, {0x02F5, 0x0048}, {0x02FA, 0xFFDF}, {0x02FB, 0xFFE0},</div><div class='add'>+	{0xC456, 0x0C14}, {0xC476, 0x0C14}, {0xC454, 0x3F8B}, {0xC474, 0x3F8B},</div><div class='add'>+	{0xC450, 0x2071}, {0xC470, 0x2071}, {0xC451, 0x226B}, {0xC471, 0x226B},</div><div class='add'>+	{0xC452, 0xA293}, {0xC472, 0xA293}, {0xC44C, 0x1585}, {0xC44C, 0x1185},</div><div class='add'>+	{0xC44C, 0x1585}, {0xC46C, 0x1585}, {0xC46C, 0x1185}, {0xC46C, 0x1585},</div><div class='add'>+	{0xC44C, 0x0185}, {0xC44C, 0x0181}, {0xC44C, 0x0185}, {0xC46C, 0x0185},</div><div class='add'>+	{0xC46C, 0x0181}, {0xC46C, 0x0185}, {0xBE24, 0xB000}, {0xBE23, 0xFF51},</div><div class='add'>+	{0xBE22, 0xDF20}, {0xBE21, 0x0140}, {0xBE20, 0x00BB}, {0xBE24, 0xB800},</div><div class='add'>+	{0xBE24, 0x0000}, {0xBE24, 0x7000}, {0xBE23, 0xFF51}, {0xBE22, 0xDF60},</div><div class='add'>+	{0xBE21, 0x0140}, {0xBE20, 0x0077}, {0xBE24, 0x7800}, {0xBE24, 0x0000},</div><div class='add'>+	{0xBE2E, 0x7BA7}, {0xBE36, 0x1000}, {0xBE37, 0x1000}, {0x8000, 0x0001},</div><div class='add'>+	{0xBE69, 0xD50F}, {0x8000, 0x0000}, {0xBE69, 0xD50F}, {0xBE6B, 0x0320},</div><div class='add'>+	{0xBE77, 0x2800}, {0xBE78, 0x3C3C}, {0xBE79, 0x3C3C}, {0xBE6E, 0xE120},</div><div class='add'>+	{0x8000, 0x0001}, {0xBE10, 0x8140}, {0x8000, 0x0000}, {0xBE10, 0x8140},</div><div class='add'>+	{0xBE15, 0x1007}, {0xBE14, 0x0448}, {0xBE1E, 0x00A0}, {0xBE10, 0x8160},</div><div class='add'>+	{0xBE10, 0x8140}, {0xBE00, 0x1340}, {0x0450, 0x0000}, {0x0401, 0x0000},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Belkin F5D8235 v1, "belkin,f5d8235-v1" */</div><div class='add'>+static const struct rtl8366rb_jam_tbl_entry rtl8366rb_init_jam_f5d8235[] = {</div><div class='add'>+	{0x0242, 0x02BF}, {0x0245, 0x02BF}, {0x0248, 0x02BF}, {0x024B, 0x02BF},</div><div class='add'>+	{0x024E, 0x02BF}, {0x0251, 0x02BF}, {0x0254, 0x0A3F}, {0x0256, 0x0A3F},</div><div class='add'>+	{0x0258, 0x0A3F}, {0x025A, 0x0A3F}, {0x025C, 0x0A3F}, {0x025E, 0x0A3F},</div><div class='add'>+	{0x0263, 0x007C}, {0x0100, 0x0004}, {0xBE5B, 0x3500}, {0x800E, 0x200F},</div><div class='add'>+	{0xBE1D, 0x0F00}, {0x8001, 0x5011}, {0x800A, 0xA2F4}, {0x800B, 0x17A3},</div><div class='add'>+	{0xBE4B, 0x17A3}, {0xBE41, 0x5011}, {0xBE17, 0x2100}, {0x8000, 0x8304},</div><div class='add'>+	{0xBE40, 0x8304}, {0xBE4A, 0xA2F4}, {0x800C, 0xA8D5}, {0x8014, 0x5500},</div><div class='add'>+	{0x8015, 0x0004}, {0xBE4C, 0xA8D5}, {0xBE59, 0x0008}, {0xBE09, 0x0E00},</div><div class='add'>+	{0xBE36, 0x1036}, {0xBE37, 0x1036}, {0x800D, 0x00FF}, {0xBE4D, 0x00FF},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* DGN3500, "netgear,dgn3500", "netgear,dgn3500b" */</div><div class='add'>+static const struct rtl8366rb_jam_tbl_entry rtl8366rb_init_jam_dgn3500[] = {</div><div class='add'>+	{0x0000, 0x0830}, {0x0400, 0x8130}, {0x000A, 0x83ED}, {0x0F51, 0x0017},</div><div class='add'>+	{0x02F5, 0x0048}, {0x02FA, 0xFFDF}, {0x02FB, 0xFFE0}, {0x0450, 0x0000},</div><div class='add'>+	{0x0401, 0x0000}, {0x0431, 0x0960},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* This jam table activates "green ethernet", which means low power mode</div><div class='add'>+ * and is claimed to detect the cable length and not use more power than</div><div class='add'>+ * necessary, and the ports should enter power saving mode 10 seconds after</div><div class='add'>+ * a cable is disconnected. Seems to always be the same.</div><div class='add'>+ */</div><div class='add'>+static const struct rtl8366rb_jam_tbl_entry rtl8366rb_green_jam[] = {</div><div class='add'>+	{0xBE78, 0x323C}, {0xBE77, 0x5000}, {0xBE2E, 0x7BA7},</div><div class='add'>+	{0xBE59, 0x3459}, {0xBE5A, 0x745A}, {0xBE5B, 0x785C},</div><div class='add'>+	{0xBE5C, 0x785C}, {0xBE6E, 0xE120}, {0xBE79, 0x323C},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Function that jams the tables in the proper registers */</div><div class='add'>+static int rtl8366rb_jam_table(const struct rtl8366rb_jam_tbl_entry *jam_table,</div><div class='add'>+			       int jam_size, struct realtek_priv *priv,</div><div class='add'>+			       bool write_dbg)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; jam_size; i++) {</div><div class='add'>+		if ((jam_table[i].reg &amp; 0xBE00) == 0xBE00) {</div><div class='add'>+			ret = regmap_read(priv-&gt;map,</div><div class='add'>+					  RTL8366RB_PHY_ACCESS_BUSY_REG,</div><div class='add'>+					  &amp;val);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+			if (!(val &amp; RTL8366RB_PHY_INT_BUSY)) {</div><div class='add'>+				ret = regmap_write(priv-&gt;map,</div><div class='add'>+						   RTL8366RB_PHY_ACCESS_CTRL_REG,</div><div class='add'>+						   RTL8366RB_PHY_CTRL_WRITE);</div><div class='add'>+				if (ret)</div><div class='add'>+					return ret;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		if (write_dbg)</div><div class='add'>+			dev_dbg(priv-&gt;dev, "jam %04x into register %04x\n",</div><div class='add'>+				jam_table[i].val,</div><div class='add'>+				jam_table[i].reg);</div><div class='add'>+		ret = regmap_write(priv-&gt;map,</div><div class='add'>+				   jam_table[i].reg,</div><div class='add'>+				   jam_table[i].val);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This code is used also with LEDs disabled */</div><div class='add'>+int rb8366rb_set_ledgroup_mode(struct realtek_priv *priv,</div><div class='add'>+			       u8 led_group,</div><div class='add'>+			       enum rtl8366_ledgroup_mode mode)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = mode &lt;&lt; RTL8366RB_LED_CTRL_OFFSET(led_group);</div><div class='add'>+</div><div class='add'>+	ret = regmap_update_bits(priv-&gt;map,</div><div class='add'>+				 RTL8366RB_LED_CTRL_REG,</div><div class='add'>+				 RTL8366RB_LED_CTRL_MASK(led_group),</div><div class='add'>+				 val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This code is used also with LEDs disabled */</div><div class='add'>+static int rtl8366rb_setup_all_leds_off(struct realtek_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	regmap_update_bits(priv-&gt;map,</div><div class='add'>+			   RTL8366RB_INTERRUPT_CONTROL_REG,</div><div class='add'>+			   RTL8366RB_P4_RGMII_LED,</div><div class='add'>+			   0);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; RTL8366RB_NUM_LEDGROUPS; i++) {</div><div class='add'>+		ret = rb8366rb_set_ledgroup_mode(priv, i,</div><div class='add'>+						 RTL8366RB_LEDGROUP_OFF);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8366rb_setup(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = ds-&gt;priv;</div><div class='add'>+	const struct rtl8366rb_jam_tbl_entry *jam_table;</div><div class='add'>+	struct rtl8366rb *rb;</div><div class='add'>+	u32 chip_ver = 0;</div><div class='add'>+	u32 chip_id = 0;</div><div class='add'>+	int jam_size;</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	rb = priv-&gt;chip_data;</div><div class='add'>+</div><div class='add'>+	ret = regmap_read(priv-&gt;map, RTL8366RB_CHIP_ID_REG, &amp;chip_id);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(priv-&gt;dev, "unable to read chip id\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (chip_id) {</div><div class='add'>+	case RTL8366RB_CHIP_ID_8366:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(priv-&gt;dev, "unknown chip id (%04x)\n", chip_id);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = regmap_read(priv-&gt;map, RTL8366RB_CHIP_VERSION_CTRL_REG,</div><div class='add'>+			  &amp;chip_ver);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(priv-&gt;dev, "unable to read chip version\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_info(priv-&gt;dev, "RTL%04x ver %u chip found\n",</div><div class='add'>+		 chip_id, chip_ver &amp; RTL8366RB_CHIP_VERSION_MASK);</div><div class='add'>+</div><div class='add'>+	/* Do the init dance using the right jam table */</div><div class='add'>+	switch (chip_ver) {</div><div class='add'>+	case 0:</div><div class='add'>+		jam_table = rtl8366rb_init_jam_ver_0;</div><div class='add'>+		jam_size = ARRAY_SIZE(rtl8366rb_init_jam_ver_0);</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		jam_table = rtl8366rb_init_jam_ver_1;</div><div class='add'>+		jam_size = ARRAY_SIZE(rtl8366rb_init_jam_ver_1);</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		jam_table = rtl8366rb_init_jam_ver_2;</div><div class='add'>+		jam_size = ARRAY_SIZE(rtl8366rb_init_jam_ver_2);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		jam_table = rtl8366rb_init_jam_ver_3;</div><div class='add'>+		jam_size = ARRAY_SIZE(rtl8366rb_init_jam_ver_3);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Special jam tables for special routers</div><div class='add'>+	 * TODO: are these necessary? Maintainers, please test</div><div class='add'>+	 * without them, using just the off-the-shelf tables.</div><div class='add'>+	 */</div><div class='add'>+	if (of_machine_is_compatible("belkin,f5d8235-v1")) {</div><div class='add'>+		jam_table = rtl8366rb_init_jam_f5d8235;</div><div class='add'>+		jam_size = ARRAY_SIZE(rtl8366rb_init_jam_f5d8235);</div><div class='add'>+	}</div><div class='add'>+	if (of_machine_is_compatible("netgear,dgn3500") ||</div><div class='add'>+	    of_machine_is_compatible("netgear,dgn3500b")) {</div><div class='add'>+		jam_table = rtl8366rb_init_jam_dgn3500;</div><div class='add'>+		jam_size = ARRAY_SIZE(rtl8366rb_init_jam_dgn3500);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = rtl8366rb_jam_table(jam_table, jam_size, priv, true);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Isolate all user ports so they can only send packets to itself and the CPU port */</div><div class='add'>+	for (i = 0; i &lt; RTL8366RB_PORT_NUM_CPU; i++) {</div><div class='add'>+		ret = regmap_write(priv-&gt;map, RTL8366RB_PORT_ISO(i),</div><div class='add'>+				   RTL8366RB_PORT_ISO_PORTS(BIT(RTL8366RB_PORT_NUM_CPU)) |</div><div class='add'>+				   RTL8366RB_PORT_ISO_EN);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+	/* CPU port can send packets to all ports */</div><div class='add'>+	ret = regmap_write(priv-&gt;map, RTL8366RB_PORT_ISO(RTL8366RB_PORT_NUM_CPU),</div><div class='add'>+			   RTL8366RB_PORT_ISO_PORTS(dsa_user_ports(ds)) |</div><div class='add'>+			   RTL8366RB_PORT_ISO_EN);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Set up the "green ethernet" feature */</div><div class='add'>+	ret = rtl8366rb_jam_table(rtl8366rb_green_jam,</div><div class='add'>+				  ARRAY_SIZE(rtl8366rb_green_jam), priv, false);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(priv-&gt;map,</div><div class='add'>+			   RTL8366RB_GREEN_FEATURE_REG,</div><div class='add'>+			   (chip_ver == 1) ? 0x0007 : 0x0003);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Vendor driver sets 0x240 in registers 0xc and 0xd (undocumented) */</div><div class='add'>+	ret = regmap_write(priv-&gt;map, 0x0c, 0x240);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+	ret = regmap_write(priv-&gt;map, 0x0d, 0x240);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Set some random MAC address */</div><div class='add'>+	ret = rtl8366rb_set_addr(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Enable CPU port with custom DSA tag 8899.</div><div class='add'>+	 *</div><div class='add'>+	 * If you set RTL8366RB_CPU_NO_TAG (bit 15) in this register</div><div class='add'>+	 * the custom tag is turned off.</div><div class='add'>+	 */</div><div class='add'>+	ret = regmap_update_bits(priv-&gt;map, RTL8366RB_CPU_CTRL_REG,</div><div class='add'>+				 0xFFFF,</div><div class='add'>+				 BIT(priv-&gt;cpu_port));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Make sure we default-enable the fixed CPU port */</div><div class='add'>+	ret = regmap_update_bits(priv-&gt;map, RTL8366RB_PECR,</div><div class='add'>+				 BIT(priv-&gt;cpu_port),</div><div class='add'>+				 0);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Set default maximum packet length to 1536 bytes */</div><div class='add'>+	ret = regmap_update_bits(priv-&gt;map, RTL8366RB_SGCR,</div><div class='add'>+				 RTL8366RB_SGCR_MAX_LENGTH_MASK,</div><div class='add'>+				 RTL8366RB_SGCR_MAX_LENGTH_1536);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+	for (i = 0; i &lt; RTL8366RB_NUM_PORTS; i++) {</div><div class='add'>+		if (i == priv-&gt;cpu_port)</div><div class='add'>+			/* CPU port need to also accept the tag */</div><div class='add'>+			rb-&gt;max_mtu[i] = ETH_DATA_LEN + RTL8366RB_CPU_TAG_SIZE;</div><div class='add'>+		else</div><div class='add'>+			rb-&gt;max_mtu[i] = ETH_DATA_LEN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Disable learning for all ports */</div><div class='add'>+	ret = regmap_write(priv-&gt;map, RTL8366RB_PORT_LEARNDIS_CTRL,</div><div class='add'>+			   RTL8366RB_PORT_ALL);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Enable auto ageing for all ports */</div><div class='add'>+	ret = regmap_write(priv-&gt;map, RTL8366RB_SECURITY_CTRL, 0);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Port 4 setup: this enables Port 4, usually the WAN port,</div><div class='add'>+	 * common PHY IO mode is apparently mode 0, and this is not what</div><div class='add'>+	 * the port is initialized to. There is no explanation of the</div><div class='add'>+	 * IO modes in the Realtek source code, if your WAN port is</div><div class='add'>+	 * connected to something exotic such as fiber, then this might</div><div class='add'>+	 * be worth experimenting with.</div><div class='add'>+	 */</div><div class='add'>+	ret = regmap_update_bits(priv-&gt;map, RTL8366RB_PMC0,</div><div class='add'>+				 RTL8366RB_PMC0_P4_IOMODE_MASK,</div><div class='add'>+				 0 &lt;&lt; RTL8366RB_PMC0_P4_IOMODE_SHIFT);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Accept all packets by default, we enable filtering on-demand */</div><div class='add'>+	ret = regmap_write(priv-&gt;map, RTL8366RB_VLAN_INGRESS_CTRL1_REG,</div><div class='add'>+			   0);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+	ret = regmap_write(priv-&gt;map, RTL8366RB_VLAN_INGRESS_CTRL2_REG,</div><div class='add'>+			   0);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Don't drop packets whose DA has not been learned */</div><div class='add'>+	ret = regmap_update_bits(priv-&gt;map, RTL8366RB_SSCR2,</div><div class='add'>+				 RTL8366RB_SSCR2_DROP_UNKNOWN_DA, 0);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Set blinking, used by all LED groups using HW triggers.</div><div class='add'>+	 * TODO: make this configurable</div><div class='add'>+	 */</div><div class='add'>+	ret = regmap_update_bits(priv-&gt;map, RTL8366RB_LED_BLINKRATE_REG,</div><div class='add'>+				 RTL8366RB_LED_BLINKRATE_MASK,</div><div class='add'>+				 RTL8366RB_LED_BLINKRATE_56MS);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Set up LED activity:</div><div class='add'>+	 * Each port has 4 LEDs on fixed groups. Each group shares the same</div><div class='add'>+	 * hardware trigger across all ports. LEDs can only be indiviually</div><div class='add'>+	 * controlled setting the LED group to fixed mode and using the driver</div><div class='add'>+	 * to toggle them LEDs on/off.</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;leds_disabled) {</div><div class='add'>+		ret = rtl8366rb_setup_all_leds_off(priv);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	} else {</div><div class='add'>+		ret = rtl8366rb_setup_leds(priv);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = rtl8366_reset_vlan(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = rtl8366rb_setup_cascaded_irq(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_info(priv-&gt;dev, "no interrupt support\n");</div><div class='add'>+</div><div class='add'>+	ret = rtl83xx_setup_user_mdio(ds);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(priv-&gt;dev, "could not set up MDIO bus\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum dsa_tag_protocol rtl8366_get_tag_protocol(struct dsa_switch *ds,</div><div class='add'>+						      int port,</div><div class='add'>+						      enum dsa_tag_protocol mp)</div><div class='add'>+{</div><div class='add'>+	/* This switch uses the 4 byte protocol A Realtek DSA tag */</div><div class='add'>+	return DSA_TAG_PROTO_RTL4_A;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void rtl8366rb_phylink_get_caps(struct dsa_switch *ds, int port,</div><div class='add'>+				       struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	unsigned long *interfaces = config-&gt;supported_interfaces;</div><div class='add'>+	struct realtek_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (port == priv-&gt;cpu_port) {</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_MII, interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_GMII, interfaces);</div><div class='add'>+		/* REVMII only supports 100M FD */</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_REVMII, interfaces);</div><div class='add'>+		/* RGMII only supports 1G FD */</div><div class='add'>+		phy_interface_set_rgmii(interfaces);</div><div class='add'>+</div><div class='add'>+		config-&gt;mac_capabilities = MAC_1000 | MAC_100 |</div><div class='add'>+					   MAC_SYM_PAUSE;</div><div class='add'>+	} else {</div><div class='add'>+		/* RSGMII port, but we don't have that, and we don't</div><div class='add'>+		 * specify in DT, so phylib uses the default of GMII</div><div class='add'>+		 */</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_GMII, interfaces);</div><div class='add'>+		config-&gt;mac_capabilities = MAC_1000 | MAC_100 | MAC_10 |</div><div class='add'>+					   MAC_SYM_PAUSE | MAC_ASYM_PAUSE;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+rtl8366rb_mac_config(struct phylink_config *config, unsigned int mode,</div><div class='add'>+		     const struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+rtl8366rb_mac_link_up(struct phylink_config *config, struct phy_device *phydev,</div><div class='add'>+		      unsigned int mode, phy_interface_t interface,</div><div class='add'>+		      int speed, int duplex, bool tx_pause, bool rx_pause)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct realtek_priv *priv = dp-&gt;ds-&gt;priv;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+	unsigned int val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Allow forcing the mode on the fixed CPU port, no autonegotiation.</div><div class='add'>+	 * We assume autonegotiation works on the PHY-facing ports.</div><div class='add'>+	 */</div><div class='add'>+	if (port != priv-&gt;cpu_port)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dev_dbg(priv-&gt;dev, "MAC link up on CPU port (%d)\n", port);</div><div class='add'>+</div><div class='add'>+	ret = regmap_update_bits(priv-&gt;map, RTL8366RB_MAC_FORCE_CTRL_REG,</div><div class='add'>+				 BIT(port), BIT(port));</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(priv-&gt;dev, "failed to force CPU port\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Conjure port config */</div><div class='add'>+	switch (speed) {</div><div class='add'>+	case SPEED_10:</div><div class='add'>+		val = RTL8366RB_PAACR_SPEED_10M;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_100:</div><div class='add'>+		val = RTL8366RB_PAACR_SPEED_100M;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_1000:</div><div class='add'>+		val = RTL8366RB_PAACR_SPEED_1000M;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		val = RTL8366RB_PAACR_SPEED_1000M;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (duplex == DUPLEX_FULL)</div><div class='add'>+		val |= RTL8366RB_PAACR_FULL_DUPLEX;</div><div class='add'>+</div><div class='add'>+	if (tx_pause)</div><div class='add'>+		val |=  RTL8366RB_PAACR_TX_PAUSE;</div><div class='add'>+</div><div class='add'>+	if (rx_pause)</div><div class='add'>+		val |= RTL8366RB_PAACR_RX_PAUSE;</div><div class='add'>+</div><div class='add'>+	val |= RTL8366RB_PAACR_LINK_UP;</div><div class='add'>+</div><div class='add'>+	ret = regmap_update_bits(priv-&gt;map, RTL8366RB_PAACR2,</div><div class='add'>+				 0xFF00U,</div><div class='add'>+				 val &lt;&lt; 8);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(priv-&gt;dev, "failed to set PAACR on CPU port\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(priv-&gt;dev, "set PAACR to %04x\n", val);</div><div class='add'>+</div><div class='add'>+	/* Enable the CPU port */</div><div class='add'>+	ret = regmap_update_bits(priv-&gt;map, RTL8366RB_PECR, BIT(port),</div><div class='add'>+				 0);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(priv-&gt;dev, "failed to enable the CPU port\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+rtl8366rb_mac_link_down(struct phylink_config *config, unsigned int mode,</div><div class='add'>+			phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct realtek_priv *priv = dp-&gt;ds-&gt;priv;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (port != priv-&gt;cpu_port)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dev_dbg(priv-&gt;dev, "MAC link down on CPU port (%d)\n", port);</div><div class='add'>+</div><div class='add'>+	/* Disable the CPU port */</div><div class='add'>+	ret = regmap_update_bits(priv-&gt;map, RTL8366RB_PECR, BIT(port),</div><div class='add'>+				 BIT(port));</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(priv-&gt;dev, "failed to disable the CPU port\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+rtl8366rb_port_enable(struct dsa_switch *ds, int port,</div><div class='add'>+		      struct phy_device *phy)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = ds-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	dev_dbg(priv-&gt;dev, "enable port %d\n", port);</div><div class='add'>+	ret = regmap_update_bits(priv-&gt;map, RTL8366RB_PECR, BIT(port),</div><div class='add'>+				 0);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+rtl8366rb_port_disable(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = ds-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	dev_dbg(priv-&gt;dev, "disable port %d\n", port);</div><div class='add'>+	ret = regmap_update_bits(priv-&gt;map, RTL8366RB_PECR, BIT(port),</div><div class='add'>+				 BIT(port));</div><div class='add'>+	if (ret)</div><div class='add'>+		return;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+rtl8366rb_port_bridge_join(struct dsa_switch *ds, int port,</div><div class='add'>+			   struct dsa_bridge bridge,</div><div class='add'>+			   bool *tx_fwd_offload,</div><div class='add'>+			   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = ds-&gt;priv;</div><div class='add'>+	unsigned int port_bitmap = 0;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	/* Loop over all other ports than the current one */</div><div class='add'>+	for (i = 0; i &lt; RTL8366RB_PORT_NUM_CPU; i++) {</div><div class='add'>+		/* Current port handled last */</div><div class='add'>+		if (i == port)</div><div class='add'>+			continue;</div><div class='add'>+		/* Not on this bridge */</div><div class='add'>+		if (!dsa_port_offloads_bridge(dsa_to_port(ds, i), &amp;bridge))</div><div class='add'>+			continue;</div><div class='add'>+		/* Join this port to each other port on the bridge */</div><div class='add'>+		ret = regmap_update_bits(priv-&gt;map, RTL8366RB_PORT_ISO(i),</div><div class='add'>+					 RTL8366RB_PORT_ISO_PORTS(BIT(port)),</div><div class='add'>+					 RTL8366RB_PORT_ISO_PORTS(BIT(port)));</div><div class='add'>+		if (ret)</div><div class='add'>+			dev_err(priv-&gt;dev, "failed to join port %d\n", port);</div><div class='add'>+</div><div class='add'>+		port_bitmap |= BIT(i);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set the bits for the ports we can access */</div><div class='add'>+	return regmap_update_bits(priv-&gt;map, RTL8366RB_PORT_ISO(port),</div><div class='add'>+				  RTL8366RB_PORT_ISO_PORTS(port_bitmap),</div><div class='add'>+				  RTL8366RB_PORT_ISO_PORTS(port_bitmap));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+rtl8366rb_port_bridge_leave(struct dsa_switch *ds, int port,</div><div class='add'>+			    struct dsa_bridge bridge)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = ds-&gt;priv;</div><div class='add'>+	unsigned int port_bitmap = 0;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	/* Loop over all other ports than this one */</div><div class='add'>+	for (i = 0; i &lt; RTL8366RB_PORT_NUM_CPU; i++) {</div><div class='add'>+		/* Current port handled last */</div><div class='add'>+		if (i == port)</div><div class='add'>+			continue;</div><div class='add'>+		/* Not on this bridge */</div><div class='add'>+		if (!dsa_port_offloads_bridge(dsa_to_port(ds, i), &amp;bridge))</div><div class='add'>+			continue;</div><div class='add'>+		/* Remove this port from any other port on the bridge */</div><div class='add'>+		ret = regmap_update_bits(priv-&gt;map, RTL8366RB_PORT_ISO(i),</div><div class='add'>+					 RTL8366RB_PORT_ISO_PORTS(BIT(port)), 0);</div><div class='add'>+		if (ret)</div><div class='add'>+			dev_err(priv-&gt;dev, "failed to leave port %d\n", port);</div><div class='add'>+</div><div class='add'>+		port_bitmap |= BIT(i);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Clear the bits for the ports we can not access, leave ourselves */</div><div class='add'>+	regmap_update_bits(priv-&gt;map, RTL8366RB_PORT_ISO(port),</div><div class='add'>+			   RTL8366RB_PORT_ISO_PORTS(port_bitmap), 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * rtl8366rb_drop_untagged() - make the switch drop untagged and C-tagged frames</div><div class='add'>+ * @priv: SMI state container</div><div class='add'>+ * @port: the port to drop untagged and C-tagged frames on</div><div class='add'>+ * @drop: whether to drop or pass untagged and C-tagged frames</div><div class='add'>+ *</div><div class='add'>+ * Return: zero for success, a negative number on error.</div><div class='add'>+ */</div><div class='add'>+static int rtl8366rb_drop_untagged(struct realtek_priv *priv, int port, bool drop)</div><div class='add'>+{</div><div class='add'>+	return regmap_update_bits(priv-&gt;map, RTL8366RB_VLAN_INGRESS_CTRL1_REG,</div><div class='add'>+				  RTL8366RB_VLAN_INGRESS_CTRL1_DROP(port),</div><div class='add'>+				  drop ? RTL8366RB_VLAN_INGRESS_CTRL1_DROP(port) : 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8366rb_vlan_filtering(struct dsa_switch *ds, int port,</div><div class='add'>+				    bool vlan_filtering,</div><div class='add'>+				    struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = ds-&gt;priv;</div><div class='add'>+	struct rtl8366rb *rb;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	rb = priv-&gt;chip_data;</div><div class='add'>+</div><div class='add'>+	dev_dbg(priv-&gt;dev, "port %d: %s VLAN filtering\n", port,</div><div class='add'>+		str_enable_disable(vlan_filtering));</div><div class='add'>+</div><div class='add'>+	/* If the port is not in the member set, the frame will be dropped */</div><div class='add'>+	ret = regmap_update_bits(priv-&gt;map, RTL8366RB_VLAN_INGRESS_CTRL2_REG,</div><div class='add'>+				 BIT(port), vlan_filtering ? BIT(port) : 0);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* If VLAN filtering is enabled and PVID is also enabled, we must</div><div class='add'>+	 * not drop any untagged or C-tagged frames. If we turn off VLAN</div><div class='add'>+	 * filtering on a port, we need to accept any frames.</div><div class='add'>+	 */</div><div class='add'>+	if (vlan_filtering)</div><div class='add'>+		ret = rtl8366rb_drop_untagged(priv, port, !rb-&gt;pvid_enabled[port]);</div><div class='add'>+	else</div><div class='add'>+		ret = rtl8366rb_drop_untagged(priv, port, false);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+rtl8366rb_port_pre_bridge_flags(struct dsa_switch *ds, int port,</div><div class='add'>+				struct switchdev_brport_flags flags,</div><div class='add'>+				struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	/* We support enabling/disabling learning */</div><div class='add'>+	if (flags.mask &amp; ~(BR_LEARNING))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+rtl8366rb_port_bridge_flags(struct dsa_switch *ds, int port,</div><div class='add'>+			    struct switchdev_brport_flags flags,</div><div class='add'>+			    struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = ds-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (flags.mask &amp; BR_LEARNING) {</div><div class='add'>+		ret = regmap_update_bits(priv-&gt;map, RTL8366RB_PORT_LEARNDIS_CTRL,</div><div class='add'>+					 BIT(port),</div><div class='add'>+					 (flags.val &amp; BR_LEARNING) ? 0 : BIT(port));</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+rtl8366rb_port_stp_state_set(struct dsa_switch *ds, int port, u8 state)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = ds-&gt;priv;</div><div class='add'>+	u32 val;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	switch (state) {</div><div class='add'>+	case BR_STATE_DISABLED:</div><div class='add'>+		val = RTL8366RB_STP_STATE_DISABLED;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_BLOCKING:</div><div class='add'>+	case BR_STATE_LISTENING:</div><div class='add'>+		val = RTL8366RB_STP_STATE_BLOCKING;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_LEARNING:</div><div class='add'>+		val = RTL8366RB_STP_STATE_LEARNING;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_FORWARDING:</div><div class='add'>+		val = RTL8366RB_STP_STATE_FORWARDING;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(priv-&gt;dev, "unknown bridge state requested\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set the same status for the port on all the FIDs */</div><div class='add'>+	for (i = 0; i &lt; RTL8366RB_NUM_FIDS; i++) {</div><div class='add'>+		regmap_update_bits(priv-&gt;map, RTL8366RB_STP_STATE_BASE + i,</div><div class='add'>+				   RTL8366RB_STP_STATE_MASK(port),</div><div class='add'>+				   RTL8366RB_STP_STATE(port, val));</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+rtl8366rb_port_fast_age(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	/* This will age out any learned L2 entries */</div><div class='add'>+	regmap_update_bits(priv-&gt;map, RTL8366RB_SECURITY_CTRL,</div><div class='add'>+			   BIT(port), BIT(port));</div><div class='add'>+	/* Restore the normal state of things */</div><div class='add'>+	regmap_update_bits(priv-&gt;map, RTL8366RB_SECURITY_CTRL,</div><div class='add'>+			   BIT(port), 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8366rb_change_mtu(struct dsa_switch *ds, int port, int new_mtu)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = ds-&gt;priv;</div><div class='add'>+	struct rtl8366rb *rb;</div><div class='add'>+	unsigned int max_mtu;</div><div class='add'>+	u32 len;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Cache the per-port MTU setting */</div><div class='add'>+	rb = priv-&gt;chip_data;</div><div class='add'>+	rb-&gt;max_mtu[port] = new_mtu;</div><div class='add'>+</div><div class='add'>+	/* Roof out the MTU for the entire switch to the greatest</div><div class='add'>+	 * common denominator: the biggest set for any one port will</div><div class='add'>+	 * be the biggest MTU for the switch.</div><div class='add'>+	 */</div><div class='add'>+	max_mtu = ETH_DATA_LEN;</div><div class='add'>+	for (i = 0; i &lt; RTL8366RB_NUM_PORTS; i++) {</div><div class='add'>+		if (rb-&gt;max_mtu[i] &gt; max_mtu)</div><div class='add'>+			max_mtu = rb-&gt;max_mtu[i];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Translate to layer 2 size.</div><div class='add'>+	 * Add ethernet and (possible) VLAN headers, and checksum to the size.</div><div class='add'>+	 * For ETH_DATA_LEN (1500 bytes) this will add up to 1522 bytes.</div><div class='add'>+	 */</div><div class='add'>+	max_mtu += VLAN_ETH_HLEN;</div><div class='add'>+	max_mtu += ETH_FCS_LEN;</div><div class='add'>+</div><div class='add'>+	if (max_mtu &lt;= 1522)</div><div class='add'>+		len = RTL8366RB_SGCR_MAX_LENGTH_1522;</div><div class='add'>+	else if (max_mtu &gt; 1522 &amp;&amp; max_mtu &lt;= 1536)</div><div class='add'>+		/* This will be the most common default if using VLAN and</div><div class='add'>+		 * CPU tagging on a port as both VLAN and CPU tag will</div><div class='add'>+		 * result in 1518 + 4 + 4 = 1526 bytes.</div><div class='add'>+		 */</div><div class='add'>+		len = RTL8366RB_SGCR_MAX_LENGTH_1536;</div><div class='add'>+	else if (max_mtu &gt; 1536 &amp;&amp; max_mtu &lt;= 1552)</div><div class='add'>+		len = RTL8366RB_SGCR_MAX_LENGTH_1552;</div><div class='add'>+	else</div><div class='add'>+		len = RTL8366RB_SGCR_MAX_LENGTH_16000;</div><div class='add'>+</div><div class='add'>+	return regmap_update_bits(priv-&gt;map, RTL8366RB_SGCR,</div><div class='add'>+				  RTL8366RB_SGCR_MAX_LENGTH_MASK,</div><div class='add'>+				  len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8366rb_max_mtu(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	/* The max MTU is 16000 bytes, so we subtract the ethernet</div><div class='add'>+	 * headers with VLAN and checksum and arrive at</div><div class='add'>+	 * 16000 - 18 - 4 = 15978. This does not include the CPU tag</div><div class='add'>+	 * since that is added to the requested MTU by the DSA framework.</div><div class='add'>+	 */</div><div class='add'>+	return 16000 - VLAN_ETH_HLEN - ETH_FCS_LEN;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8366rb_get_vlan_4k(struct realtek_priv *priv, u32 vid,</div><div class='add'>+				 struct rtl8366_vlan_4k *vlan4k)</div><div class='add'>+{</div><div class='add'>+	u32 data[3];</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	memset(vlan4k, '\0', sizeof(struct rtl8366_vlan_4k));</div><div class='add'>+</div><div class='add'>+	if (vid &gt;= RTL8366RB_NUM_VIDS)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* write VID */</div><div class='add'>+	ret = regmap_write(priv-&gt;map, RTL8366RB_VLAN_TABLE_WRITE_BASE,</div><div class='add'>+			   vid &amp; RTL8366RB_VLAN_VID_MASK);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* write table access control word */</div><div class='add'>+	ret = regmap_write(priv-&gt;map, RTL8366RB_TABLE_ACCESS_CTRL_REG,</div><div class='add'>+			   RTL8366RB_TABLE_VLAN_READ_CTRL);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 3; i++) {</div><div class='add'>+		ret = regmap_read(priv-&gt;map,</div><div class='add'>+				  RTL8366RB_VLAN_TABLE_READ_BASE + i,</div><div class='add'>+				  &amp;data[i]);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vlan4k-&gt;vid = vid;</div><div class='add'>+	vlan4k-&gt;untag = (data[1] &gt;&gt; RTL8366RB_VLAN_UNTAG_SHIFT) &amp;</div><div class='add'>+			RTL8366RB_VLAN_UNTAG_MASK;</div><div class='add'>+	vlan4k-&gt;member = data[1] &amp; RTL8366RB_VLAN_MEMBER_MASK;</div><div class='add'>+	vlan4k-&gt;fid = data[2] &amp; RTL8366RB_VLAN_FID_MASK;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8366rb_set_vlan_4k(struct realtek_priv *priv,</div><div class='add'>+				 const struct rtl8366_vlan_4k *vlan4k)</div><div class='add'>+{</div><div class='add'>+	u32 data[3];</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (vlan4k-&gt;vid &gt;= RTL8366RB_NUM_VIDS ||</div><div class='add'>+	    vlan4k-&gt;member &gt; RTL8366RB_VLAN_MEMBER_MASK ||</div><div class='add'>+	    vlan4k-&gt;untag &gt; RTL8366RB_VLAN_UNTAG_MASK ||</div><div class='add'>+	    vlan4k-&gt;fid &gt; RTL8366RB_FIDMAX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	data[0] = vlan4k-&gt;vid &amp; RTL8366RB_VLAN_VID_MASK;</div><div class='add'>+	data[1] = (vlan4k-&gt;member &amp; RTL8366RB_VLAN_MEMBER_MASK) |</div><div class='add'>+		  ((vlan4k-&gt;untag &amp; RTL8366RB_VLAN_UNTAG_MASK) &lt;&lt;</div><div class='add'>+			RTL8366RB_VLAN_UNTAG_SHIFT);</div><div class='add'>+	data[2] = vlan4k-&gt;fid &amp; RTL8366RB_VLAN_FID_MASK;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 3; i++) {</div><div class='add'>+		ret = regmap_write(priv-&gt;map,</div><div class='add'>+				   RTL8366RB_VLAN_TABLE_WRITE_BASE + i,</div><div class='add'>+				   data[i]);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* write table access control word */</div><div class='add'>+	ret = regmap_write(priv-&gt;map, RTL8366RB_TABLE_ACCESS_CTRL_REG,</div><div class='add'>+			   RTL8366RB_TABLE_VLAN_WRITE_CTRL);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8366rb_get_vlan_mc(struct realtek_priv *priv, u32 index,</div><div class='add'>+				 struct rtl8366_vlan_mc *vlanmc)</div><div class='add'>+{</div><div class='add'>+	u32 data[3];</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	memset(vlanmc, '\0', sizeof(struct rtl8366_vlan_mc));</div><div class='add'>+</div><div class='add'>+	if (index &gt;= RTL8366RB_NUM_VLANS)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 3; i++) {</div><div class='add'>+		ret = regmap_read(priv-&gt;map,</div><div class='add'>+				  RTL8366RB_VLAN_MC_BASE(index) + i,</div><div class='add'>+				  &amp;data[i]);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vlanmc-&gt;vid = data[0] &amp; RTL8366RB_VLAN_VID_MASK;</div><div class='add'>+	vlanmc-&gt;priority = (data[0] &gt;&gt; RTL8366RB_VLAN_PRIORITY_SHIFT) &amp;</div><div class='add'>+		RTL8366RB_VLAN_PRIORITY_MASK;</div><div class='add'>+	vlanmc-&gt;untag = (data[1] &gt;&gt; RTL8366RB_VLAN_UNTAG_SHIFT) &amp;</div><div class='add'>+		RTL8366RB_VLAN_UNTAG_MASK;</div><div class='add'>+	vlanmc-&gt;member = data[1] &amp; RTL8366RB_VLAN_MEMBER_MASK;</div><div class='add'>+	vlanmc-&gt;fid = data[2] &amp; RTL8366RB_VLAN_FID_MASK;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8366rb_set_vlan_mc(struct realtek_priv *priv, u32 index,</div><div class='add'>+				 const struct rtl8366_vlan_mc *vlanmc)</div><div class='add'>+{</div><div class='add'>+	u32 data[3];</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (index &gt;= RTL8366RB_NUM_VLANS ||</div><div class='add'>+	    vlanmc-&gt;vid &gt;= RTL8366RB_NUM_VIDS ||</div><div class='add'>+	    vlanmc-&gt;priority &gt; RTL8366RB_PRIORITYMAX ||</div><div class='add'>+	    vlanmc-&gt;member &gt; RTL8366RB_VLAN_MEMBER_MASK ||</div><div class='add'>+	    vlanmc-&gt;untag &gt; RTL8366RB_VLAN_UNTAG_MASK ||</div><div class='add'>+	    vlanmc-&gt;fid &gt; RTL8366RB_FIDMAX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	data[0] = (vlanmc-&gt;vid &amp; RTL8366RB_VLAN_VID_MASK) |</div><div class='add'>+		  ((vlanmc-&gt;priority &amp; RTL8366RB_VLAN_PRIORITY_MASK) &lt;&lt;</div><div class='add'>+			RTL8366RB_VLAN_PRIORITY_SHIFT);</div><div class='add'>+	data[1] = (vlanmc-&gt;member &amp; RTL8366RB_VLAN_MEMBER_MASK) |</div><div class='add'>+		  ((vlanmc-&gt;untag &amp; RTL8366RB_VLAN_UNTAG_MASK) &lt;&lt;</div><div class='add'>+			RTL8366RB_VLAN_UNTAG_SHIFT);</div><div class='add'>+	data[2] = vlanmc-&gt;fid &amp; RTL8366RB_VLAN_FID_MASK;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 3; i++) {</div><div class='add'>+		ret = regmap_write(priv-&gt;map,</div><div class='add'>+				   RTL8366RB_VLAN_MC_BASE(index) + i,</div><div class='add'>+				   data[i]);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8366rb_get_mc_index(struct realtek_priv *priv, int port, int *val)</div><div class='add'>+{</div><div class='add'>+	u32 data;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (port &gt;= priv-&gt;num_ports)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = regmap_read(priv-&gt;map, RTL8366RB_PORT_VLAN_CTRL_REG(port),</div><div class='add'>+			  &amp;data);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	*val = (data &gt;&gt; RTL8366RB_PORT_VLAN_CTRL_SHIFT(port)) &amp;</div><div class='add'>+		RTL8366RB_PORT_VLAN_CTRL_MASK;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8366rb_set_mc_index(struct realtek_priv *priv, int port, int index)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds = &amp;priv-&gt;ds;</div><div class='add'>+	struct rtl8366rb *rb;</div><div class='add'>+	bool pvid_enabled;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	rb = priv-&gt;chip_data;</div><div class='add'>+	pvid_enabled = !!index;</div><div class='add'>+</div><div class='add'>+	if (port &gt;= priv-&gt;num_ports || index &gt;= RTL8366RB_NUM_VLANS)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = regmap_update_bits(priv-&gt;map, RTL8366RB_PORT_VLAN_CTRL_REG(port),</div><div class='add'>+				 RTL8366RB_PORT_VLAN_CTRL_MASK &lt;&lt;</div><div class='add'>+					RTL8366RB_PORT_VLAN_CTRL_SHIFT(port),</div><div class='add'>+				 (index &amp; RTL8366RB_PORT_VLAN_CTRL_MASK) &lt;&lt;</div><div class='add'>+					RTL8366RB_PORT_VLAN_CTRL_SHIFT(port));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	rb-&gt;pvid_enabled[port] = pvid_enabled;</div><div class='add'>+</div><div class='add'>+	/* If VLAN filtering is enabled and PVID is also enabled, we must</div><div class='add'>+	 * not drop any untagged or C-tagged frames. Make sure to update the</div><div class='add'>+	 * filtering setting.</div><div class='add'>+	 */</div><div class='add'>+	if (dsa_port_is_vlan_filtering(dsa_to_port(ds, port)))</div><div class='add'>+		ret = rtl8366rb_drop_untagged(priv, port, !pvid_enabled);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool rtl8366rb_is_vlan_valid(struct realtek_priv *priv, unsigned int vlan)</div><div class='add'>+{</div><div class='add'>+	unsigned int max = RTL8366RB_NUM_VLANS - 1;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;vlan4k_enabled)</div><div class='add'>+		max = RTL8366RB_NUM_VIDS - 1;</div><div class='add'>+</div><div class='add'>+	if (vlan &gt; max)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8366rb_enable_vlan(struct realtek_priv *priv, bool enable)</div><div class='add'>+{</div><div class='add'>+	dev_dbg(priv-&gt;dev, "%s VLAN\n", str_enable_disable(enable));</div><div class='add'>+	return regmap_update_bits(priv-&gt;map,</div><div class='add'>+				  RTL8366RB_SGCR, RTL8366RB_SGCR_EN_VLAN,</div><div class='add'>+				  enable ? RTL8366RB_SGCR_EN_VLAN : 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8366rb_enable_vlan4k(struct realtek_priv *priv, bool enable)</div><div class='add'>+{</div><div class='add'>+	dev_dbg(priv-&gt;dev, "%s VLAN 4k\n", str_enable_disable(enable));</div><div class='add'>+	return regmap_update_bits(priv-&gt;map, RTL8366RB_SGCR,</div><div class='add'>+				  RTL8366RB_SGCR_EN_VLAN_4KTB,</div><div class='add'>+				  enable ? RTL8366RB_SGCR_EN_VLAN_4KTB : 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8366rb_phy_read(struct realtek_priv *priv, int phy, int regnum)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+	u32 reg;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (phy &gt; RTL8366RB_PHY_NO_MAX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	rtl83xx_lock(priv);</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(priv-&gt;map_nolock, RTL8366RB_PHY_ACCESS_CTRL_REG,</div><div class='add'>+			   RTL8366RB_PHY_CTRL_READ);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	reg = 0x8000 | (1 &lt;&lt; (phy + RTL8366RB_PHY_NO_OFFSET)) | regnum;</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(priv-&gt;map_nolock, reg, 0);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(priv-&gt;dev,</div><div class='add'>+			"failed to write PHY%d reg %04x @ %04x, ret %d\n",</div><div class='add'>+			phy, regnum, reg, ret);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = regmap_read(priv-&gt;map_nolock, RTL8366RB_PHY_ACCESS_DATA_REG,</div><div class='add'>+			  &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ret = val;</div><div class='add'>+</div><div class='add'>+	dev_dbg(priv-&gt;dev, "read PHY%d register 0x%04x @ %08x, val &lt;- %04x\n",</div><div class='add'>+		phy, regnum, reg, val);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	rtl83xx_unlock(priv);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8366rb_phy_write(struct realtek_priv *priv, int phy, int regnum,</div><div class='add'>+			       u16 val)</div><div class='add'>+{</div><div class='add'>+	u32 reg;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (phy &gt; RTL8366RB_PHY_NO_MAX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	rtl83xx_lock(priv);</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(priv-&gt;map_nolock, RTL8366RB_PHY_ACCESS_CTRL_REG,</div><div class='add'>+			   RTL8366RB_PHY_CTRL_WRITE);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	reg = 0x8000 | (1 &lt;&lt; (phy + RTL8366RB_PHY_NO_OFFSET)) | regnum;</div><div class='add'>+</div><div class='add'>+	dev_dbg(priv-&gt;dev, "write PHY%d register 0x%04x @ %04x, val -&gt; %04x\n",</div><div class='add'>+		phy, regnum, reg, val);</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(priv-&gt;map_nolock, reg, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	rtl83xx_unlock(priv);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8366rb_reset_chip(struct realtek_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int timeout = 10;</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	priv-&gt;write_reg_noack(priv, RTL8366RB_RESET_CTRL_REG,</div><div class='add'>+			      RTL8366RB_CHIP_CTRL_RESET_HW);</div><div class='add'>+	do {</div><div class='add'>+		usleep_range(20000, 25000);</div><div class='add'>+		ret = regmap_read(priv-&gt;map, RTL8366RB_RESET_CTRL_REG, &amp;val);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		if (!(val &amp; RTL8366RB_CHIP_CTRL_RESET_HW))</div><div class='add'>+			break;</div><div class='add'>+	} while (--timeout);</div><div class='add'>+</div><div class='add'>+	if (!timeout) {</div><div class='add'>+		dev_err(priv-&gt;dev, "timeout waiting for the switch to reset\n");</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl8366rb_detect(struct realtek_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = priv-&gt;dev;</div><div class='add'>+	int ret;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	/* Detect device */</div><div class='add'>+	ret = regmap_read(priv-&gt;map, 0x5c, &amp;val);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "can't get chip ID (%d)\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (val) {</div><div class='add'>+	case 0x6027:</div><div class='add'>+		dev_info(dev, "found an RTL8366S switch\n");</div><div class='add'>+		dev_err(dev, "this switch is not yet supported, submit patches!\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	case 0x5937:</div><div class='add'>+		dev_info(dev, "found an RTL8366RB switch\n");</div><div class='add'>+		priv-&gt;cpu_port = RTL8366RB_PORT_NUM_CPU;</div><div class='add'>+		priv-&gt;num_ports = RTL8366RB_NUM_PORTS;</div><div class='add'>+		priv-&gt;num_vlan_mc = RTL8366RB_NUM_VLANS;</div><div class='add'>+		priv-&gt;mib_counters = rtl8366rb_mib_counters;</div><div class='add'>+		priv-&gt;num_mib_counters = ARRAY_SIZE(rtl8366rb_mib_counters);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_info(dev, "found an Unknown Realtek switch (id=0x%04x)\n",</div><div class='add'>+			 val);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = rtl8366rb_reset_chip(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct phylink_mac_ops rtl8366rb_phylink_mac_ops = {</div><div class='add'>+	.mac_config = rtl8366rb_mac_config,</div><div class='add'>+	.mac_link_down = rtl8366rb_mac_link_down,</div><div class='add'>+	.mac_link_up = rtl8366rb_mac_link_up,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct dsa_switch_ops rtl8366rb_switch_ops = {</div><div class='add'>+	.get_tag_protocol = rtl8366_get_tag_protocol,</div><div class='add'>+	.setup = rtl8366rb_setup,</div><div class='add'>+	.phylink_get_caps = rtl8366rb_phylink_get_caps,</div><div class='add'>+	.get_strings = rtl8366_get_strings,</div><div class='add'>+	.get_ethtool_stats = rtl8366_get_ethtool_stats,</div><div class='add'>+	.get_sset_count = rtl8366_get_sset_count,</div><div class='add'>+	.port_bridge_join = rtl8366rb_port_bridge_join,</div><div class='add'>+	.port_bridge_leave = rtl8366rb_port_bridge_leave,</div><div class='add'>+	.port_vlan_filtering = rtl8366rb_vlan_filtering,</div><div class='add'>+	.port_vlan_add = rtl8366_vlan_add,</div><div class='add'>+	.port_vlan_del = rtl8366_vlan_del,</div><div class='add'>+	.port_enable = rtl8366rb_port_enable,</div><div class='add'>+	.port_disable = rtl8366rb_port_disable,</div><div class='add'>+	.port_pre_bridge_flags = rtl8366rb_port_pre_bridge_flags,</div><div class='add'>+	.port_bridge_flags = rtl8366rb_port_bridge_flags,</div><div class='add'>+	.port_stp_state_set = rtl8366rb_port_stp_state_set,</div><div class='add'>+	.port_fast_age = rtl8366rb_port_fast_age,</div><div class='add'>+	.port_change_mtu = rtl8366rb_change_mtu,</div><div class='add'>+	.port_max_mtu = rtl8366rb_max_mtu,</div><div class='add'>+	.port_hsr_join = dsa_port_simple_hsr_join,</div><div class='add'>+	.port_hsr_leave = dsa_port_simple_hsr_leave,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct realtek_ops rtl8366rb_ops = {</div><div class='add'>+	.detect		= rtl8366rb_detect,</div><div class='add'>+	.get_vlan_mc	= rtl8366rb_get_vlan_mc,</div><div class='add'>+	.set_vlan_mc	= rtl8366rb_set_vlan_mc,</div><div class='add'>+	.get_vlan_4k	= rtl8366rb_get_vlan_4k,</div><div class='add'>+	.set_vlan_4k	= rtl8366rb_set_vlan_4k,</div><div class='add'>+	.get_mc_index	= rtl8366rb_get_mc_index,</div><div class='add'>+	.set_mc_index	= rtl8366rb_set_mc_index,</div><div class='add'>+	.get_mib_counter = rtl8366rb_get_mib_counter,</div><div class='add'>+	.is_vlan_valid	= rtl8366rb_is_vlan_valid,</div><div class='add'>+	.enable_vlan	= rtl8366rb_enable_vlan,</div><div class='add'>+	.enable_vlan4k	= rtl8366rb_enable_vlan4k,</div><div class='add'>+	.phy_read	= rtl8366rb_phy_read,</div><div class='add'>+	.phy_write	= rtl8366rb_phy_write,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct realtek_variant rtl8366rb_variant = {</div><div class='add'>+	.ds_ops = &amp;rtl8366rb_switch_ops,</div><div class='add'>+	.ops = &amp;rtl8366rb_ops,</div><div class='add'>+	.phylink_mac_ops = &amp;rtl8366rb_phylink_mac_ops,</div><div class='add'>+	.clk_delay = 10,</div><div class='add'>+	.cmd_read = 0xa9,</div><div class='add'>+	.cmd_write = 0xa8,</div><div class='add'>+	.chip_data_sz = sizeof(struct rtl8366rb),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct of_device_id rtl8366rb_of_match[] = {</div><div class='add'>+	{ .compatible = "realtek,rtl8366rb", .data = &amp;rtl8366rb_variant, },</div><div class='add'>+	{ /* sentinel */ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, rtl8366rb_of_match);</div><div class='add'>+</div><div class='add'>+static struct platform_driver rtl8366rb_smi_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "rtl8366rb-smi",</div><div class='add'>+		.of_match_table = rtl8366rb_of_match,</div><div class='add'>+	},</div><div class='add'>+	.probe  = realtek_smi_probe,</div><div class='add'>+	.remove = realtek_smi_remove,</div><div class='add'>+	.shutdown = realtek_smi_shutdown,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct mdio_driver rtl8366rb_mdio_driver = {</div><div class='add'>+	.mdiodrv.driver = {</div><div class='add'>+		.name = "rtl8366rb-mdio",</div><div class='add'>+		.of_match_table = rtl8366rb_of_match,</div><div class='add'>+	},</div><div class='add'>+	.probe  = realtek_mdio_probe,</div><div class='add'>+	.remove = realtek_mdio_remove,</div><div class='add'>+	.shutdown = realtek_mdio_shutdown,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int rtl8366rb_init(void)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = realtek_mdio_driver_register(&amp;rtl8366rb_mdio_driver);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = realtek_smi_driver_register(&amp;rtl8366rb_smi_driver);</div><div class='add'>+	if (ret) {</div><div class='add'>+		realtek_mdio_driver_unregister(&amp;rtl8366rb_mdio_driver);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+module_init(rtl8366rb_init);</div><div class='add'>+</div><div class='add'>+static void __exit rtl8366rb_exit(void)</div><div class='add'>+{</div><div class='add'>+	realtek_smi_driver_unregister(&amp;rtl8366rb_smi_driver);</div><div class='add'>+	realtek_mdio_driver_unregister(&amp;rtl8366rb_mdio_driver);</div><div class='add'>+}</div><div class='add'>+module_exit(rtl8366rb_exit);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Linus Walleij &lt;linus.walleij@linaro.org&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Driver for RTL8366RB ethernet switch");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_IMPORT_NS("REALTEK_DSA");</div><div class='head'>diff --git a/drivers/net/dsa/realtek/rtl8366rb.h b/drivers/net/dsa/realtek/rtl8366rb.h<br/>new file mode 100644<br/>index 000000000000..685ff3275faa<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/realtek/rtl8366rb.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/realtek/rtl8366rb.h</a></div><div class='hunk'>@@ -0,0 +1,107 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0+ */</div><div class='add'>+</div><div class='add'>+#ifndef _RTL8366RB_H</div><div class='add'>+#define _RTL8366RB_H</div><div class='add'>+</div><div class='add'>+#include "realtek.h"</div><div class='add'>+</div><div class='add'>+#define RTL8366RB_PORT_NUM_CPU		5</div><div class='add'>+#define RTL8366RB_NUM_PORTS		6</div><div class='add'>+#define RTL8366RB_PHY_NO_MAX		4</div><div class='add'>+#define RTL8366RB_NUM_LEDGROUPS		4</div><div class='add'>+#define RTL8366RB_PHY_ADDR_MAX		31</div><div class='add'>+</div><div class='add'>+/* LED control registers */</div><div class='add'>+/* The LED blink rate is global; it is used by all triggers in all groups. */</div><div class='add'>+#define RTL8366RB_LED_BLINKRATE_REG		0x0430</div><div class='add'>+#define RTL8366RB_LED_BLINKRATE_MASK		0x0007</div><div class='add'>+#define RTL8366RB_LED_BLINKRATE_28MS		0x0000</div><div class='add'>+#define RTL8366RB_LED_BLINKRATE_56MS		0x0001</div><div class='add'>+#define RTL8366RB_LED_BLINKRATE_84MS		0x0002</div><div class='add'>+#define RTL8366RB_LED_BLINKRATE_111MS		0x0003</div><div class='add'>+#define RTL8366RB_LED_BLINKRATE_222MS		0x0004</div><div class='add'>+#define RTL8366RB_LED_BLINKRATE_446MS		0x0005</div><div class='add'>+</div><div class='add'>+/* LED trigger event for each group */</div><div class='add'>+#define RTL8366RB_LED_CTRL_REG			0x0431</div><div class='add'>+#define RTL8366RB_LED_CTRL_OFFSET(led_group)	\</div><div class='add'>+	(4 * (led_group))</div><div class='add'>+#define RTL8366RB_LED_CTRL_MASK(led_group)	\</div><div class='add'>+	(0xf &lt;&lt; RTL8366RB_LED_CTRL_OFFSET(led_group))</div><div class='add'>+</div><div class='add'>+/* The RTL8366RB_LED_X_X registers are used to manually set the LED state only</div><div class='add'>+ * when the corresponding LED group in RTL8366RB_LED_CTRL_REG is</div><div class='add'>+ * RTL8366RB_LEDGROUP_FORCE. Otherwise, it is ignored.</div><div class='add'>+ */</div><div class='add'>+#define RTL8366RB_LED_0_1_CTRL_REG		0x0432</div><div class='add'>+#define RTL8366RB_LED_2_3_CTRL_REG		0x0433</div><div class='add'>+#define RTL8366RB_LED_X_X_CTRL_REG(led_group)	\</div><div class='add'>+	((led_group) &lt;= 1 ? \</div><div class='add'>+		RTL8366RB_LED_0_1_CTRL_REG : \</div><div class='add'>+		RTL8366RB_LED_2_3_CTRL_REG)</div><div class='add'>+#define RTL8366RB_LED_0_X_CTRL_MASK		GENMASK(5, 0)</div><div class='add'>+#define RTL8366RB_LED_X_1_CTRL_MASK		GENMASK(11, 6)</div><div class='add'>+#define RTL8366RB_LED_2_X_CTRL_MASK		GENMASK(5, 0)</div><div class='add'>+#define RTL8366RB_LED_X_3_CTRL_MASK		GENMASK(11, 6)</div><div class='add'>+</div><div class='add'>+enum rtl8366_ledgroup_mode {</div><div class='add'>+	RTL8366RB_LEDGROUP_OFF			= 0x0,</div><div class='add'>+	RTL8366RB_LEDGROUP_DUP_COL		= 0x1,</div><div class='add'>+	RTL8366RB_LEDGROUP_LINK_ACT		= 0x2,</div><div class='add'>+	RTL8366RB_LEDGROUP_SPD1000		= 0x3,</div><div class='add'>+	RTL8366RB_LEDGROUP_SPD100		= 0x4,</div><div class='add'>+	RTL8366RB_LEDGROUP_SPD10		= 0x5,</div><div class='add'>+	RTL8366RB_LEDGROUP_SPD1000_ACT		= 0x6,</div><div class='add'>+	RTL8366RB_LEDGROUP_SPD100_ACT		= 0x7,</div><div class='add'>+	RTL8366RB_LEDGROUP_SPD10_ACT		= 0x8,</div><div class='add'>+	RTL8366RB_LEDGROUP_SPD100_10_ACT	= 0x9,</div><div class='add'>+	RTL8366RB_LEDGROUP_FIBER		= 0xa,</div><div class='add'>+	RTL8366RB_LEDGROUP_AN_FAULT		= 0xb,</div><div class='add'>+	RTL8366RB_LEDGROUP_LINK_RX		= 0xc,</div><div class='add'>+	RTL8366RB_LEDGROUP_LINK_TX		= 0xd,</div><div class='add'>+	RTL8366RB_LEDGROUP_MASTER		= 0xe,</div><div class='add'>+	RTL8366RB_LEDGROUP_FORCE		= 0xf,</div><div class='add'>+</div><div class='add'>+	__RTL8366RB_LEDGROUP_MODE_MAX</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_NET_DSA_REALTEK_RTL8366RB_LEDS)</div><div class='add'>+</div><div class='add'>+struct rtl8366rb_led {</div><div class='add'>+	u8 port_num;</div><div class='add'>+	u8 led_group;</div><div class='add'>+	struct realtek_priv *priv;</div><div class='add'>+	struct led_classdev cdev;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int rtl8366rb_setup_leds(struct realtek_priv *priv);</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+</div><div class='add'>+static inline int rtl8366rb_setup_leds(struct realtek_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* IS_ENABLED(CONFIG_LEDS_CLASS) */</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct rtl8366rb - RTL8366RB-specific data</div><div class='add'>+ * @max_mtu: per-port max MTU setting</div><div class='add'>+ * @pvid_enabled: if PVID is set for respective port</div><div class='add'>+ * @leds: per-port and per-ledgroup led info</div><div class='add'>+ */</div><div class='add'>+struct rtl8366rb {</div><div class='add'>+	unsigned int max_mtu[RTL8366RB_NUM_PORTS];</div><div class='add'>+	bool pvid_enabled[RTL8366RB_NUM_PORTS];</div><div class='add'>+#if IS_ENABLED(CONFIG_NET_DSA_REALTEK_RTL8366RB_LEDS)</div><div class='add'>+	struct rtl8366rb_led leds[RTL8366RB_NUM_PORTS][RTL8366RB_NUM_LEDGROUPS];</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* This code is used also with LEDs disabled */</div><div class='add'>+int rb8366rb_set_ledgroup_mode(struct realtek_priv *priv,</div><div class='add'>+			       u8 led_group,</div><div class='add'>+			       enum rtl8366_ledgroup_mode mode);</div><div class='add'>+</div><div class='add'>+#endif /* _RTL8366RB_H */</div><div class='head'>diff --git a/drivers/net/dsa/realtek/rtl83xx.c b/drivers/net/dsa/realtek/rtl83xx.c<br/>new file mode 100644<br/>index 000000000000..2b9bd4462714<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/realtek/rtl83xx.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/realtek/rtl83xx.c</a></div><div class='hunk'>@@ -0,0 +1,331 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;linux/of_mdio.h&gt;</div><div class='add'>+</div><div class='add'>+#include "realtek.h"</div><div class='add'>+#include "rtl83xx.h"</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * rtl83xx_lock() - Locks the mutex used by regmaps</div><div class='add'>+ * @ctx: realtek_priv pointer</div><div class='add'>+ *</div><div class='add'>+ * This function is passed to regmap to be used as the lock function.</div><div class='add'>+ * It is also used externally to block regmap before executing multiple</div><div class='add'>+ * operations that must happen in sequence (which will use</div><div class='add'>+ * realtek_priv.map_nolock instead).</div><div class='add'>+ *</div><div class='add'>+ * Context: Can sleep. Holds priv-&gt;map_lock lock.</div><div class='add'>+ * Return: nothing</div><div class='add'>+ */</div><div class='add'>+void rtl83xx_lock(void *ctx)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = ctx;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;map_lock);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(rtl83xx_lock, "REALTEK_DSA");</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * rtl83xx_unlock() - Unlocks the mutex used by regmaps</div><div class='add'>+ * @ctx: realtek_priv pointer</div><div class='add'>+ *</div><div class='add'>+ * This function unlocks the lock acquired by rtl83xx_lock.</div><div class='add'>+ *</div><div class='add'>+ * Context: Releases priv-&gt;map_lock lock.</div><div class='add'>+ * Return: nothing</div><div class='add'>+ */</div><div class='add'>+void rtl83xx_unlock(void *ctx)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = ctx;</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;map_lock);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(rtl83xx_unlock, "REALTEK_DSA");</div><div class='add'>+</div><div class='add'>+static int rtl83xx_user_mdio_read(struct mii_bus *bus, int addr, int regnum)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = bus-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return priv-&gt;ops-&gt;phy_read(priv, addr, regnum);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int rtl83xx_user_mdio_write(struct mii_bus *bus, int addr, int regnum,</div><div class='add'>+				   u16 val)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = bus-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return priv-&gt;ops-&gt;phy_write(priv, addr, regnum, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * rtl83xx_setup_user_mdio() - register the user mii bus driver</div><div class='add'>+ * @ds: DSA switch associated with this user_mii_bus</div><div class='add'>+ *</div><div class='add'>+ * Registers the MDIO bus for built-in Ethernet PHYs, and associates it with</div><div class='add'>+ * the mandatory 'mdio' child OF node of the switch.</div><div class='add'>+ *</div><div class='add'>+ * Context: Can sleep.</div><div class='add'>+ * Return: 0 on success, negative value for failure.</div><div class='add'>+ */</div><div class='add'>+int rtl83xx_setup_user_mdio(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct realtek_priv *priv = ds-&gt;priv;</div><div class='add'>+	struct device_node *mdio_np;</div><div class='add'>+	struct mii_bus *bus;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	mdio_np = of_get_child_by_name(priv-&gt;dev-&gt;of_node, "mdio");</div><div class='add'>+	if (!mdio_np) {</div><div class='add'>+		dev_err(priv-&gt;dev, "no MDIO bus node\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bus = devm_mdiobus_alloc(priv-&gt;dev);</div><div class='add'>+	if (!bus) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err_put_node;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bus-&gt;priv = priv;</div><div class='add'>+	bus-&gt;name = "Realtek user MII";</div><div class='add'>+	bus-&gt;read = rtl83xx_user_mdio_read;</div><div class='add'>+	bus-&gt;write = rtl83xx_user_mdio_write;</div><div class='add'>+	snprintf(bus-&gt;id, MII_BUS_ID_SIZE, "%s:user_mii", dev_name(priv-&gt;dev));</div><div class='add'>+	bus-&gt;parent = priv-&gt;dev;</div><div class='add'>+</div><div class='add'>+	ret = devm_of_mdiobus_register(priv-&gt;dev, bus, mdio_np);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(priv-&gt;dev, "unable to register MDIO bus %s\n",</div><div class='add'>+			bus-&gt;id);</div><div class='add'>+		goto err_put_node;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;user_mii_bus = bus;</div><div class='add'>+</div><div class='add'>+err_put_node:</div><div class='add'>+	of_node_put(mdio_np);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(rtl83xx_setup_user_mdio, "REALTEK_DSA");</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * rtl83xx_probe() - probe a Realtek switch</div><div class='add'>+ * @dev: the device being probed</div><div class='add'>+ * @interface_info: specific management interface info.</div><div class='add'>+ *</div><div class='add'>+ * This function initializes realtek_priv and reads data from the device tree</div><div class='add'>+ * node. The switch is hard resetted if a method is provided.</div><div class='add'>+ *</div><div class='add'>+ * Context: Can sleep.</div><div class='add'>+ * Return: Pointer to the realtek_priv or ERR_PTR() in case of failure.</div><div class='add'>+ *</div><div class='add'>+ * The realtek_priv pointer does not need to be freed as it is controlled by</div><div class='add'>+ * devres.</div><div class='add'>+ */</div><div class='add'>+struct realtek_priv *</div><div class='add'>+rtl83xx_probe(struct device *dev,</div><div class='add'>+	      const struct realtek_interface_info *interface_info)</div><div class='add'>+{</div><div class='add'>+	const struct realtek_variant *var;</div><div class='add'>+	struct realtek_priv *priv;</div><div class='add'>+	struct regmap_config rc = {</div><div class='add'>+		.reg_bits = 10, /* A4..A0 R4..R0 */</div><div class='add'>+		.val_bits = 16,</div><div class='add'>+		.reg_stride = 1,</div><div class='add'>+		.max_register = 0xffff,</div><div class='add'>+		.reg_format_endian = REGMAP_ENDIAN_BIG,</div><div class='add'>+		.reg_read = interface_info-&gt;reg_read,</div><div class='add'>+		.reg_write = interface_info-&gt;reg_write,</div><div class='add'>+		.cache_type = REGCACHE_NONE,</div><div class='add'>+		.lock = rtl83xx_lock,</div><div class='add'>+		.unlock = rtl83xx_unlock,</div><div class='add'>+	};</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	var = of_device_get_match_data(dev);</div><div class='add'>+	if (!var)</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='add'>+	priv = devm_kzalloc(dev, size_add(sizeof(*priv), var-&gt;chip_data_sz),</div><div class='add'>+			    GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;priv-&gt;map_lock);</div><div class='add'>+</div><div class='add'>+	rc.lock_arg = priv;</div><div class='add'>+	priv-&gt;map = devm_regmap_init(dev, NULL, priv, &amp;rc);</div><div class='add'>+	if (IS_ERR(priv-&gt;map)) {</div><div class='add'>+		ret = PTR_ERR(priv-&gt;map);</div><div class='add'>+		dev_err(dev, "regmap init failed: %d\n", ret);</div><div class='add'>+		return ERR_PTR(ret);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc.disable_locking = true;</div><div class='add'>+	priv-&gt;map_nolock = devm_regmap_init(dev, NULL, priv, &amp;rc);</div><div class='add'>+	if (IS_ERR(priv-&gt;map_nolock)) {</div><div class='add'>+		ret = PTR_ERR(priv-&gt;map_nolock);</div><div class='add'>+		dev_err(dev, "regmap init failed: %d\n", ret);</div><div class='add'>+		return ERR_PTR(ret);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Link forward and backward */</div><div class='add'>+	priv-&gt;dev = dev;</div><div class='add'>+	priv-&gt;variant = var;</div><div class='add'>+	priv-&gt;ops = var-&gt;ops;</div><div class='add'>+	priv-&gt;chip_data = (void *)priv + sizeof(*priv);</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	priv-&gt;leds_disabled = of_property_read_bool(dev-&gt;of_node,</div><div class='add'>+						    "realtek,disable-leds");</div><div class='add'>+</div><div class='add'>+	/* TODO: if power is software controlled, set up any regulators here */</div><div class='add'>+	priv-&gt;reset_ctl = devm_reset_control_get_optional(dev, NULL);</div><div class='add'>+	if (IS_ERR(priv-&gt;reset_ctl))</div><div class='add'>+		return dev_err_cast_probe(dev, priv-&gt;reset_ctl,</div><div class='add'>+					  "failed to get reset control\n");</div><div class='add'>+</div><div class='add'>+	priv-&gt;reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);</div><div class='add'>+	if (IS_ERR(priv-&gt;reset)) {</div><div class='add'>+		dev_err(dev, "failed to get RESET GPIO\n");</div><div class='add'>+		return ERR_CAST(priv-&gt;reset);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_set_drvdata(dev, priv);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;reset_ctl || priv-&gt;reset) {</div><div class='add'>+		rtl83xx_reset_assert(priv);</div><div class='add'>+		dev_dbg(dev, "asserted RESET\n");</div><div class='add'>+		msleep(REALTEK_HW_STOP_DELAY);</div><div class='add'>+		rtl83xx_reset_deassert(priv);</div><div class='add'>+		msleep(REALTEK_HW_START_DELAY);</div><div class='add'>+		dev_dbg(dev, "deasserted RESET\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return priv;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(rtl83xx_probe, "REALTEK_DSA");</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * rtl83xx_register_switch() - detects and register a switch</div><div class='add'>+ * @priv: realtek_priv pointer</div><div class='add'>+ *</div><div class='add'>+ * This function first checks the switch chip ID and register a DSA</div><div class='add'>+ * switch.</div><div class='add'>+ *</div><div class='add'>+ * Context: Can sleep. Takes and releases priv-&gt;map_lock.</div><div class='add'>+ * Return: 0 on success, negative value for failure.</div><div class='add'>+ */</div><div class='add'>+int rtl83xx_register_switch(struct realtek_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds = &amp;priv-&gt;ds;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = priv-&gt;ops-&gt;detect(priv);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err_probe(priv-&gt;dev, ret, "unable to detect switch\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ds-&gt;priv = priv;</div><div class='add'>+	ds-&gt;dev = priv-&gt;dev;</div><div class='add'>+	ds-&gt;ops = priv-&gt;variant-&gt;ds_ops;</div><div class='add'>+	ds-&gt;phylink_mac_ops = priv-&gt;variant-&gt;phylink_mac_ops;</div><div class='add'>+	ds-&gt;num_ports = priv-&gt;num_ports;</div><div class='add'>+</div><div class='add'>+	ret = dsa_register_switch(ds);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err_probe(priv-&gt;dev, ret, "unable to register switch\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(rtl83xx_register_switch, "REALTEK_DSA");</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * rtl83xx_unregister_switch() - unregister a switch</div><div class='add'>+ * @priv: realtek_priv pointer</div><div class='add'>+ *</div><div class='add'>+ * This function unregister a DSA switch.</div><div class='add'>+ *</div><div class='add'>+ * Context: Can sleep.</div><div class='add'>+ * Return: Nothing.</div><div class='add'>+ */</div><div class='add'>+void rtl83xx_unregister_switch(struct realtek_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds = &amp;priv-&gt;ds;</div><div class='add'>+</div><div class='add'>+	dsa_unregister_switch(ds);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(rtl83xx_unregister_switch, "REALTEK_DSA");</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * rtl83xx_shutdown() - shutdown a switch</div><div class='add'>+ * @priv: realtek_priv pointer</div><div class='add'>+ *</div><div class='add'>+ * This function shuts down the DSA switch and cleans the platform driver data,</div><div class='add'>+ * to prevent realtek_{smi,mdio}_remove() from running afterwards, which is</div><div class='add'>+ * possible if the parent bus implements its own .shutdown() as .remove().</div><div class='add'>+ *</div><div class='add'>+ * Context: Can sleep.</div><div class='add'>+ * Return: Nothing.</div><div class='add'>+ */</div><div class='add'>+void rtl83xx_shutdown(struct realtek_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds = &amp;priv-&gt;ds;</div><div class='add'>+</div><div class='add'>+	dsa_switch_shutdown(ds);</div><div class='add'>+</div><div class='add'>+	dev_set_drvdata(priv-&gt;dev, NULL);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(rtl83xx_shutdown, "REALTEK_DSA");</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * rtl83xx_remove() - Cleanup a realtek switch driver</div><div class='add'>+ * @priv: realtek_priv pointer</div><div class='add'>+ *</div><div class='add'>+ * Placehold for common cleanup procedures.</div><div class='add'>+ *</div><div class='add'>+ * Context: Any</div><div class='add'>+ * Return: nothing</div><div class='add'>+ */</div><div class='add'>+void rtl83xx_remove(struct realtek_priv *priv)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_NS_GPL(rtl83xx_remove, "REALTEK_DSA");</div><div class='add'>+</div><div class='add'>+void rtl83xx_reset_assert(struct realtek_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = reset_control_assert(priv-&gt;reset_ctl);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_warn(priv-&gt;dev,</div><div class='add'>+			 "Failed to assert the switch reset control: %pe\n",</div><div class='add'>+			 ERR_PTR(ret));</div><div class='add'>+</div><div class='add'>+	gpiod_set_value(priv-&gt;reset, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void rtl83xx_reset_deassert(struct realtek_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = reset_control_deassert(priv-&gt;reset_ctl);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_warn(priv-&gt;dev,</div><div class='add'>+			 "Failed to deassert the switch reset control: %pe\n",</div><div class='add'>+			 ERR_PTR(ret));</div><div class='add'>+</div><div class='add'>+	gpiod_set_value(priv-&gt;reset, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Luiz Angelo Daros de Luca &lt;luizluca@gmail.com&gt;");</div><div class='add'>+MODULE_AUTHOR("Linus Walleij &lt;linus.walleij@linaro.org&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Realtek DSA switches common module");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/dsa/realtek/rtl83xx.h b/drivers/net/dsa/realtek/rtl83xx.h<br/>new file mode 100644<br/>index 000000000000..c8a0ff8fd75e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/realtek/rtl83xx.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/realtek/rtl83xx.h</a></div><div class='hunk'>@@ -0,0 +1,24 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0+ */</div><div class='add'>+</div><div class='add'>+#ifndef _RTL83XX_H</div><div class='add'>+#define _RTL83XX_H</div><div class='add'>+</div><div class='add'>+struct realtek_interface_info {</div><div class='add'>+	int (*reg_read)(void *ctx, u32 reg, u32 *val);</div><div class='add'>+	int (*reg_write)(void *ctx, u32 reg, u32 val);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void rtl83xx_lock(void *ctx);</div><div class='add'>+void rtl83xx_unlock(void *ctx);</div><div class='add'>+int rtl83xx_setup_user_mdio(struct dsa_switch *ds);</div><div class='add'>+struct realtek_priv *</div><div class='add'>+rtl83xx_probe(struct device *dev,</div><div class='add'>+	      const struct realtek_interface_info *interface_info);</div><div class='add'>+int rtl83xx_register_switch(struct realtek_priv *priv);</div><div class='add'>+void rtl83xx_unregister_switch(struct realtek_priv *priv);</div><div class='add'>+void rtl83xx_shutdown(struct realtek_priv *priv);</div><div class='add'>+void rtl83xx_remove(struct realtek_priv *priv);</div><div class='add'>+void rtl83xx_reset_assert(struct realtek_priv *priv);</div><div class='add'>+void rtl83xx_reset_deassert(struct realtek_priv *priv);</div><div class='add'>+</div><div class='add'>+#endif /* _RTL83XX_H */</div><div class='head'>diff --git a/drivers/net/dsa/rzn1_a5psw.c b/drivers/net/dsa/rzn1_a5psw.c<br/>new file mode 100644<br/>index 000000000000..4d857e3be10b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/rzn1_a5psw.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/rzn1_a5psw.c</a></div><div class='hunk'>@@ -0,0 +1,1319 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2022 Schneider-Electric</div><div class='add'>+ *</div><div class='add'>+ * Clément Léger &lt;clement.leger@bootlin.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/if_bridge.h&gt;</div><div class='add'>+#include &lt;linux/if_ether.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_mdio.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+</div><div class='add'>+#include "rzn1_a5psw.h"</div><div class='add'>+</div><div class='add'>+struct a5psw_stats {</div><div class='add'>+	u16 offset;</div><div class='add'>+	const char name[ETH_GSTRING_LEN];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define STAT_DESC(_offset) {	\</div><div class='add'>+	.offset = A5PSW_##_offset,	\</div><div class='add'>+	.name = __stringify(_offset),	\</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct a5psw_stats a5psw_stats[] = {</div><div class='add'>+	STAT_DESC(aFramesTransmittedOK),</div><div class='add'>+	STAT_DESC(aFramesReceivedOK),</div><div class='add'>+	STAT_DESC(aFrameCheckSequenceErrors),</div><div class='add'>+	STAT_DESC(aAlignmentErrors),</div><div class='add'>+	STAT_DESC(aOctetsTransmittedOK),</div><div class='add'>+	STAT_DESC(aOctetsReceivedOK),</div><div class='add'>+	STAT_DESC(aTxPAUSEMACCtrlFrames),</div><div class='add'>+	STAT_DESC(aRxPAUSEMACCtrlFrames),</div><div class='add'>+	STAT_DESC(ifInErrors),</div><div class='add'>+	STAT_DESC(ifOutErrors),</div><div class='add'>+	STAT_DESC(ifInUcastPkts),</div><div class='add'>+	STAT_DESC(ifInMulticastPkts),</div><div class='add'>+	STAT_DESC(ifInBroadcastPkts),</div><div class='add'>+	STAT_DESC(ifOutDiscards),</div><div class='add'>+	STAT_DESC(ifOutUcastPkts),</div><div class='add'>+	STAT_DESC(ifOutMulticastPkts),</div><div class='add'>+	STAT_DESC(ifOutBroadcastPkts),</div><div class='add'>+	STAT_DESC(etherStatsDropEvents),</div><div class='add'>+	STAT_DESC(etherStatsOctets),</div><div class='add'>+	STAT_DESC(etherStatsPkts),</div><div class='add'>+	STAT_DESC(etherStatsUndersizePkts),</div><div class='add'>+	STAT_DESC(etherStatsOversizePkts),</div><div class='add'>+	STAT_DESC(etherStatsPkts64Octets),</div><div class='add'>+	STAT_DESC(etherStatsPkts65to127Octets),</div><div class='add'>+	STAT_DESC(etherStatsPkts128to255Octets),</div><div class='add'>+	STAT_DESC(etherStatsPkts256to511Octets),</div><div class='add'>+	STAT_DESC(etherStatsPkts1024to1518Octets),</div><div class='add'>+	STAT_DESC(etherStatsPkts1519toXOctets),</div><div class='add'>+	STAT_DESC(etherStatsJabbers),</div><div class='add'>+	STAT_DESC(etherStatsFragments),</div><div class='add'>+	STAT_DESC(VLANReceived),</div><div class='add'>+	STAT_DESC(VLANTransmitted),</div><div class='add'>+	STAT_DESC(aDeferred),</div><div class='add'>+	STAT_DESC(aMultipleCollisions),</div><div class='add'>+	STAT_DESC(aSingleCollisions),</div><div class='add'>+	STAT_DESC(aLateCollisions),</div><div class='add'>+	STAT_DESC(aExcessiveCollisions),</div><div class='add'>+	STAT_DESC(aCarrierSenseErrors),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void a5psw_reg_writel(struct a5psw *a5psw, int offset, u32 value)</div><div class='add'>+{</div><div class='add'>+	writel(value, a5psw-&gt;base + offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 a5psw_reg_readl(struct a5psw *a5psw, int offset)</div><div class='add'>+{</div><div class='add'>+	return readl(a5psw-&gt;base + offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void a5psw_reg_rmw(struct a5psw *a5psw, int offset, u32 mask, u32 val)</div><div class='add'>+{</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;a5psw-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	reg = a5psw_reg_readl(a5psw, offset);</div><div class='add'>+	reg &amp;= ~mask;</div><div class='add'>+	reg |= val;</div><div class='add'>+	a5psw_reg_writel(a5psw, offset, reg);</div><div class='add'>+</div><div class='add'>+	spin_unlock(&amp;a5psw-&gt;reg_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum dsa_tag_protocol a5psw_get_tag_protocol(struct dsa_switch *ds,</div><div class='add'>+						    int port,</div><div class='add'>+						    enum dsa_tag_protocol mp)</div><div class='add'>+{</div><div class='add'>+	return DSA_TAG_PROTO_RZN1_A5PSW;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void a5psw_port_pattern_set(struct a5psw *a5psw, int port, int pattern,</div><div class='add'>+				   bool enable)</div><div class='add'>+{</div><div class='add'>+	u32 rx_match = 0;</div><div class='add'>+</div><div class='add'>+	if (enable)</div><div class='add'>+		rx_match |= A5PSW_RXMATCH_CONFIG_PATTERN(pattern);</div><div class='add'>+</div><div class='add'>+	a5psw_reg_rmw(a5psw, A5PSW_RXMATCH_CONFIG(port),</div><div class='add'>+		      A5PSW_RXMATCH_CONFIG_PATTERN(pattern), rx_match);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void a5psw_port_mgmtfwd_set(struct a5psw *a5psw, int port, bool enable)</div><div class='add'>+{</div><div class='add'>+	/* Enable "management forward" pattern matching, this will forward</div><div class='add'>+	 * packets from this port only towards the management port and thus</div><div class='add'>+	 * isolate the port.</div><div class='add'>+	 */</div><div class='add'>+	a5psw_port_pattern_set(a5psw, port, A5PSW_PATTERN_MGMTFWD, enable);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void a5psw_port_tx_enable(struct a5psw *a5psw, int port, bool enable)</div><div class='add'>+{</div><div class='add'>+	u32 mask = A5PSW_PORT_ENA_TX(port);</div><div class='add'>+	u32 reg = enable ? mask : 0;</div><div class='add'>+</div><div class='add'>+	/* Even though the port TX is disabled through TXENA bit in the</div><div class='add'>+	 * PORT_ENA register, it can still send BPDUs. This depends on the tag</div><div class='add'>+	 * configuration added when sending packets from the CPU port to the</div><div class='add'>+	 * switch port. Indeed, when using forced forwarding without filtering,</div><div class='add'>+	 * even disabled ports will be able to send packets that are tagged.</div><div class='add'>+	 * This allows to implement STP support when ports are in a state where</div><div class='add'>+	 * forwarding traffic should be stopped but BPDUs should still be sent.</div><div class='add'>+	 */</div><div class='add'>+	a5psw_reg_rmw(a5psw, A5PSW_PORT_ENA, mask, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void a5psw_port_enable_set(struct a5psw *a5psw, int port, bool enable)</div><div class='add'>+{</div><div class='add'>+	u32 port_ena = 0;</div><div class='add'>+</div><div class='add'>+	if (enable)</div><div class='add'>+		port_ena |= A5PSW_PORT_ENA_TX_RX(port);</div><div class='add'>+</div><div class='add'>+	a5psw_reg_rmw(a5psw, A5PSW_PORT_ENA, A5PSW_PORT_ENA_TX_RX(port),</div><div class='add'>+		      port_ena);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int a5psw_lk_execute_ctrl(struct a5psw *a5psw, u32 *ctrl)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	a5psw_reg_writel(a5psw, A5PSW_LK_ADDR_CTRL, *ctrl);</div><div class='add'>+</div><div class='add'>+	ret = readl_poll_timeout(a5psw-&gt;base + A5PSW_LK_ADDR_CTRL, *ctrl,</div><div class='add'>+				 !(*ctrl &amp; A5PSW_LK_ADDR_CTRL_BUSY),</div><div class='add'>+				 A5PSW_LK_BUSY_USEC_POLL, A5PSW_CTRL_TIMEOUT);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(a5psw-&gt;dev, "LK_CTRL timeout waiting for BUSY bit\n");</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void a5psw_port_fdb_flush(struct a5psw *a5psw, int port)</div><div class='add'>+{</div><div class='add'>+	u32 ctrl = A5PSW_LK_ADDR_CTRL_DELETE_PORT | BIT(port);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;a5psw-&gt;lk_lock);</div><div class='add'>+	a5psw_lk_execute_ctrl(a5psw, &amp;ctrl);</div><div class='add'>+	mutex_unlock(&amp;a5psw-&gt;lk_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void a5psw_port_authorize_set(struct a5psw *a5psw, int port,</div><div class='add'>+				     bool authorize)</div><div class='add'>+{</div><div class='add'>+	u32 reg = a5psw_reg_readl(a5psw, A5PSW_AUTH_PORT(port));</div><div class='add'>+</div><div class='add'>+	if (authorize)</div><div class='add'>+		reg |= A5PSW_AUTH_PORT_AUTHORIZED;</div><div class='add'>+	else</div><div class='add'>+		reg &amp;= ~A5PSW_AUTH_PORT_AUTHORIZED;</div><div class='add'>+</div><div class='add'>+	a5psw_reg_writel(a5psw, A5PSW_AUTH_PORT(port), reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void a5psw_port_disable(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct a5psw *a5psw = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	a5psw_port_authorize_set(a5psw, port, false);</div><div class='add'>+	a5psw_port_enable_set(a5psw, port, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int a5psw_port_enable(struct dsa_switch *ds, int port,</div><div class='add'>+			     struct phy_device *phy)</div><div class='add'>+{</div><div class='add'>+	struct a5psw *a5psw = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	a5psw_port_authorize_set(a5psw, port, true);</div><div class='add'>+	a5psw_port_enable_set(a5psw, port, true);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int a5psw_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu)</div><div class='add'>+{</div><div class='add'>+	struct a5psw *a5psw = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	new_mtu += ETH_HLEN + A5PSW_EXTRA_MTU_LEN + ETH_FCS_LEN;</div><div class='add'>+	a5psw_reg_writel(a5psw, A5PSW_FRM_LENGTH(port), new_mtu);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int a5psw_port_max_mtu(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	return A5PSW_MAX_MTU;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void a5psw_phylink_get_caps(struct dsa_switch *ds, int port,</div><div class='add'>+				   struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	unsigned long *intf = config-&gt;supported_interfaces;</div><div class='add'>+</div><div class='add'>+	config-&gt;mac_capabilities = MAC_1000FD;</div><div class='add'>+</div><div class='add'>+	if (dsa_is_cpu_port(ds, port)) {</div><div class='add'>+		/* GMII is used internally and GMAC2 is connected to the switch</div><div class='add'>+		 * using 1000Mbps Full-Duplex mode only (cf ethernet manual)</div><div class='add'>+		 */</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_GMII, intf);</div><div class='add'>+	} else {</div><div class='add'>+		config-&gt;mac_capabilities |= MAC_100 | MAC_10;</div><div class='add'>+		phy_interface_set_rgmii(intf);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_RMII, intf);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_MII, intf);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct phylink_pcs *</div><div class='add'>+a5psw_phylink_mac_select_pcs(struct phylink_config *config,</div><div class='add'>+			     phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct a5psw *a5psw = dp-&gt;ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (dsa_port_is_cpu(dp))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	return a5psw-&gt;pcs[dp-&gt;index];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void a5psw_phylink_mac_config(struct phylink_config *config,</div><div class='add'>+				     unsigned int mode,</div><div class='add'>+				     const struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void a5psw_phylink_mac_link_down(struct phylink_config *config,</div><div class='add'>+					unsigned int mode,</div><div class='add'>+					phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct a5psw *a5psw = dp-&gt;ds-&gt;priv;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+	u32 cmd_cfg;</div><div class='add'>+</div><div class='add'>+	cmd_cfg = a5psw_reg_readl(a5psw, A5PSW_CMD_CFG(port));</div><div class='add'>+	cmd_cfg &amp;= ~(A5PSW_CMD_CFG_RX_ENA | A5PSW_CMD_CFG_TX_ENA);</div><div class='add'>+	a5psw_reg_writel(a5psw, A5PSW_CMD_CFG(port), cmd_cfg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void a5psw_phylink_mac_link_up(struct phylink_config *config,</div><div class='add'>+				      struct phy_device *phydev,</div><div class='add'>+				      unsigned int mode,</div><div class='add'>+				      phy_interface_t interface,</div><div class='add'>+				      int speed, int duplex, bool tx_pause,</div><div class='add'>+				      bool rx_pause)</div><div class='add'>+{</div><div class='add'>+	u32 cmd_cfg = A5PSW_CMD_CFG_RX_ENA | A5PSW_CMD_CFG_TX_ENA |</div><div class='add'>+		      A5PSW_CMD_CFG_TX_CRC_APPEND;</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct a5psw *a5psw = dp-&gt;ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (speed == SPEED_1000)</div><div class='add'>+		cmd_cfg |= A5PSW_CMD_CFG_ETH_SPEED;</div><div class='add'>+</div><div class='add'>+	if (duplex == DUPLEX_HALF)</div><div class='add'>+		cmd_cfg |= A5PSW_CMD_CFG_HD_ENA;</div><div class='add'>+</div><div class='add'>+	cmd_cfg |= A5PSW_CMD_CFG_CNTL_FRM_ENA;</div><div class='add'>+</div><div class='add'>+	if (!rx_pause)</div><div class='add'>+		cmd_cfg &amp;= ~A5PSW_CMD_CFG_PAUSE_IGNORE;</div><div class='add'>+</div><div class='add'>+	a5psw_reg_writel(a5psw, A5PSW_CMD_CFG(dp-&gt;index), cmd_cfg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int a5psw_set_ageing_time(struct dsa_switch *ds, unsigned int msecs)</div><div class='add'>+{</div><div class='add'>+	struct a5psw *a5psw = ds-&gt;priv;</div><div class='add'>+	unsigned long rate;</div><div class='add'>+	u64 max, tmp;</div><div class='add'>+	u32 agetime;</div><div class='add'>+</div><div class='add'>+	rate = clk_get_rate(a5psw-&gt;clk);</div><div class='add'>+	max = div64_ul(((u64)A5PSW_LK_AGETIME_MASK * A5PSW_TABLE_ENTRIES * 1024),</div><div class='add'>+		       rate) * 1000;</div><div class='add'>+	if (msecs &gt; max)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	tmp = div_u64(rate, MSEC_PER_SEC);</div><div class='add'>+	agetime = div_u64(msecs * tmp, 1024 * A5PSW_TABLE_ENTRIES);</div><div class='add'>+</div><div class='add'>+	a5psw_reg_writel(a5psw, A5PSW_LK_AGETIME, agetime);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void a5psw_port_learning_set(struct a5psw *a5psw, int port, bool learn)</div><div class='add'>+{</div><div class='add'>+	u32 mask = A5PSW_INPUT_LEARN_DIS(port);</div><div class='add'>+	u32 reg = !learn ? mask : 0;</div><div class='add'>+</div><div class='add'>+	a5psw_reg_rmw(a5psw, A5PSW_INPUT_LEARN, mask, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void a5psw_port_rx_block_set(struct a5psw *a5psw, int port, bool block)</div><div class='add'>+{</div><div class='add'>+	u32 mask = A5PSW_INPUT_LEARN_BLOCK(port);</div><div class='add'>+	u32 reg = block ? mask : 0;</div><div class='add'>+</div><div class='add'>+	a5psw_reg_rmw(a5psw, A5PSW_INPUT_LEARN, mask, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void a5psw_flooding_set_resolution(struct a5psw *a5psw, int port,</div><div class='add'>+					  bool set)</div><div class='add'>+{</div><div class='add'>+	static const u8 offsets[] = {</div><div class='add'>+		A5PSW_UCAST_DEF_MASK, A5PSW_BCAST_DEF_MASK, A5PSW_MCAST_DEF_MASK</div><div class='add'>+	};</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(offsets); i++)</div><div class='add'>+		a5psw_reg_rmw(a5psw, offsets[i], BIT(port),</div><div class='add'>+			      set ? BIT(port) : 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void a5psw_port_set_standalone(struct a5psw *a5psw, int port,</div><div class='add'>+				      bool standalone)</div><div class='add'>+{</div><div class='add'>+	a5psw_port_learning_set(a5psw, port, !standalone);</div><div class='add'>+	a5psw_flooding_set_resolution(a5psw, port, !standalone);</div><div class='add'>+	a5psw_port_mgmtfwd_set(a5psw, port, standalone);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int a5psw_port_bridge_join(struct dsa_switch *ds, int port,</div><div class='add'>+				  struct dsa_bridge bridge,</div><div class='add'>+				  bool *tx_fwd_offload,</div><div class='add'>+				  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct a5psw *a5psw = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	/* We only support 1 bridge device */</div><div class='add'>+	if (a5psw-&gt;br_dev &amp;&amp; bridge.dev != a5psw-&gt;br_dev) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Forwarding offload supported for a single bridge");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	a5psw-&gt;br_dev = bridge.dev;</div><div class='add'>+	a5psw_port_set_standalone(a5psw, port, false);</div><div class='add'>+</div><div class='add'>+	a5psw-&gt;bridged_ports |= BIT(port);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void a5psw_port_bridge_leave(struct dsa_switch *ds, int port,</div><div class='add'>+				    struct dsa_bridge bridge)</div><div class='add'>+{</div><div class='add'>+	struct a5psw *a5psw = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	a5psw-&gt;bridged_ports &amp;= ~BIT(port);</div><div class='add'>+</div><div class='add'>+	a5psw_port_set_standalone(a5psw, port, true);</div><div class='add'>+</div><div class='add'>+	/* No more ports bridged */</div><div class='add'>+	if (a5psw-&gt;bridged_ports == BIT(A5PSW_CPU_PORT))</div><div class='add'>+		a5psw-&gt;br_dev = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int a5psw_port_pre_bridge_flags(struct dsa_switch *ds, int port,</div><div class='add'>+				       struct switchdev_brport_flags flags,</div><div class='add'>+				       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	if (flags.mask &amp; ~(BR_LEARNING | BR_FLOOD | BR_MCAST_FLOOD |</div><div class='add'>+			   BR_BCAST_FLOOD))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+a5psw_port_bridge_flags(struct dsa_switch *ds, int port,</div><div class='add'>+			struct switchdev_brport_flags flags,</div><div class='add'>+			struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct a5psw *a5psw = ds-&gt;priv;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	/* If a port is set as standalone, we do not want to be able to</div><div class='add'>+	 * configure flooding nor learning which would result in joining the</div><div class='add'>+	 * unique bridge. This can happen when a port leaves the bridge, in</div><div class='add'>+	 * which case the DSA core will try to "clear" all flags for the</div><div class='add'>+	 * standalone port (ie enable flooding, disable learning). In that case</div><div class='add'>+	 * do not fail but do not apply the flags.</div><div class='add'>+	 */</div><div class='add'>+	if (!(a5psw-&gt;bridged_ports &amp; BIT(port)))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (flags.mask &amp; BR_LEARNING) {</div><div class='add'>+		val = flags.val &amp; BR_LEARNING ? 0 : A5PSW_INPUT_LEARN_DIS(port);</div><div class='add'>+		a5psw_reg_rmw(a5psw, A5PSW_INPUT_LEARN,</div><div class='add'>+			      A5PSW_INPUT_LEARN_DIS(port), val);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flags.mask &amp; BR_FLOOD) {</div><div class='add'>+		val = flags.val &amp; BR_FLOOD ? BIT(port) : 0;</div><div class='add'>+		a5psw_reg_rmw(a5psw, A5PSW_UCAST_DEF_MASK, BIT(port), val);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flags.mask &amp; BR_MCAST_FLOOD) {</div><div class='add'>+		val = flags.val &amp; BR_MCAST_FLOOD ? BIT(port) : 0;</div><div class='add'>+		a5psw_reg_rmw(a5psw, A5PSW_MCAST_DEF_MASK, BIT(port), val);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flags.mask &amp; BR_BCAST_FLOOD) {</div><div class='add'>+		val = flags.val &amp; BR_BCAST_FLOOD ? BIT(port) : 0;</div><div class='add'>+		a5psw_reg_rmw(a5psw, A5PSW_BCAST_DEF_MASK, BIT(port), val);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void a5psw_port_stp_state_set(struct dsa_switch *ds, int port, u8 state)</div><div class='add'>+{</div><div class='add'>+	bool learning_enabled, rx_enabled, tx_enabled;</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(ds, port);</div><div class='add'>+	struct a5psw *a5psw = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	switch (state) {</div><div class='add'>+	case BR_STATE_DISABLED:</div><div class='add'>+	case BR_STATE_BLOCKING:</div><div class='add'>+	case BR_STATE_LISTENING:</div><div class='add'>+		rx_enabled = false;</div><div class='add'>+		tx_enabled = false;</div><div class='add'>+		learning_enabled = false;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_LEARNING:</div><div class='add'>+		rx_enabled = false;</div><div class='add'>+		tx_enabled = false;</div><div class='add'>+		learning_enabled = dp-&gt;learning;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_FORWARDING:</div><div class='add'>+		rx_enabled = true;</div><div class='add'>+		tx_enabled = true;</div><div class='add'>+		learning_enabled = dp-&gt;learning;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(ds-&gt;dev, "invalid STP state: %d\n", state);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	a5psw_port_learning_set(a5psw, port, learning_enabled);</div><div class='add'>+	a5psw_port_rx_block_set(a5psw, port, !rx_enabled);</div><div class='add'>+	a5psw_port_tx_enable(a5psw, port, tx_enabled);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void a5psw_port_fast_age(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct a5psw *a5psw = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	a5psw_port_fdb_flush(a5psw, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int a5psw_lk_execute_lookup(struct a5psw *a5psw, union lk_data *lk_data,</div><div class='add'>+				   u16 *entry)</div><div class='add'>+{</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	a5psw_reg_writel(a5psw, A5PSW_LK_DATA_LO, lk_data-&gt;lo);</div><div class='add'>+	a5psw_reg_writel(a5psw, A5PSW_LK_DATA_HI, lk_data-&gt;hi);</div><div class='add'>+</div><div class='add'>+	ctrl = A5PSW_LK_ADDR_CTRL_LOOKUP;</div><div class='add'>+	ret = a5psw_lk_execute_ctrl(a5psw, &amp;ctrl);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	*entry = ctrl &amp; A5PSW_LK_ADDR_CTRL_ADDRESS;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int a5psw_port_fdb_add(struct dsa_switch *ds, int port,</div><div class='add'>+			      const unsigned char *addr, u16 vid,</div><div class='add'>+			      struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct a5psw *a5psw = ds-&gt;priv;</div><div class='add'>+	union lk_data lk_data = {0};</div><div class='add'>+	bool inc_learncount = false;</div><div class='add'>+	int ret = 0;</div><div class='add'>+	u16 entry;</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	ether_addr_copy(lk_data.entry.mac, addr);</div><div class='add'>+	lk_data.entry.port_mask = BIT(port);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;a5psw-&gt;lk_lock);</div><div class='add'>+</div><div class='add'>+	/* Set the value to be written in the lookup table */</div><div class='add'>+	ret = a5psw_lk_execute_lookup(a5psw, &amp;lk_data, &amp;entry);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto lk_unlock;</div><div class='add'>+</div><div class='add'>+	lk_data.hi = a5psw_reg_readl(a5psw, A5PSW_LK_DATA_HI);</div><div class='add'>+	if (!lk_data.entry.valid) {</div><div class='add'>+		inc_learncount = true;</div><div class='add'>+		/* port_mask set to 0x1f when entry is not valid, clear it */</div><div class='add'>+		lk_data.entry.port_mask = 0;</div><div class='add'>+		lk_data.entry.prio = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	lk_data.entry.port_mask |= BIT(port);</div><div class='add'>+	lk_data.entry.is_static = 1;</div><div class='add'>+	lk_data.entry.valid = 1;</div><div class='add'>+</div><div class='add'>+	a5psw_reg_writel(a5psw, A5PSW_LK_DATA_HI, lk_data.hi);</div><div class='add'>+</div><div class='add'>+	reg = A5PSW_LK_ADDR_CTRL_WRITE | entry;</div><div class='add'>+	ret = a5psw_lk_execute_ctrl(a5psw, &amp;reg);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto lk_unlock;</div><div class='add'>+</div><div class='add'>+	if (inc_learncount) {</div><div class='add'>+		reg = A5PSW_LK_LEARNCOUNT_MODE_INC;</div><div class='add'>+		a5psw_reg_writel(a5psw, A5PSW_LK_LEARNCOUNT, reg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+lk_unlock:</div><div class='add'>+	mutex_unlock(&amp;a5psw-&gt;lk_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int a5psw_port_fdb_del(struct dsa_switch *ds, int port,</div><div class='add'>+			      const unsigned char *addr, u16 vid,</div><div class='add'>+			      struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct a5psw *a5psw = ds-&gt;priv;</div><div class='add'>+	union lk_data lk_data = {0};</div><div class='add'>+	bool clear = false;</div><div class='add'>+	u16 entry;</div><div class='add'>+	u32 reg;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ether_addr_copy(lk_data.entry.mac, addr);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;a5psw-&gt;lk_lock);</div><div class='add'>+</div><div class='add'>+	ret = a5psw_lk_execute_lookup(a5psw, &amp;lk_data, &amp;entry);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto lk_unlock;</div><div class='add'>+</div><div class='add'>+	lk_data.hi = a5psw_reg_readl(a5psw, A5PSW_LK_DATA_HI);</div><div class='add'>+</div><div class='add'>+	/* Our hardware does not associate any VID to the FDB entries so this</div><div class='add'>+	 * means that if two entries were added for the same mac but for</div><div class='add'>+	 * different VID, then, on the deletion of the first one, we would also</div><div class='add'>+	 * delete the second one. Since there is unfortunately nothing we can do</div><div class='add'>+	 * about that, do not return an error...</div><div class='add'>+	 */</div><div class='add'>+	if (!lk_data.entry.valid)</div><div class='add'>+		goto lk_unlock;</div><div class='add'>+</div><div class='add'>+	lk_data.entry.port_mask &amp;= ~BIT(port);</div><div class='add'>+	/* If there is no more port in the mask, clear the entry */</div><div class='add'>+	if (lk_data.entry.port_mask == 0)</div><div class='add'>+		clear = true;</div><div class='add'>+</div><div class='add'>+	a5psw_reg_writel(a5psw, A5PSW_LK_DATA_HI, lk_data.hi);</div><div class='add'>+</div><div class='add'>+	reg = entry;</div><div class='add'>+	if (clear)</div><div class='add'>+		reg |= A5PSW_LK_ADDR_CTRL_CLEAR;</div><div class='add'>+	else</div><div class='add'>+		reg |= A5PSW_LK_ADDR_CTRL_WRITE;</div><div class='add'>+</div><div class='add'>+	ret = a5psw_lk_execute_ctrl(a5psw, &amp;reg);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto lk_unlock;</div><div class='add'>+</div><div class='add'>+	/* Decrement LEARNCOUNT */</div><div class='add'>+	if (clear) {</div><div class='add'>+		reg = A5PSW_LK_LEARNCOUNT_MODE_DEC;</div><div class='add'>+		a5psw_reg_writel(a5psw, A5PSW_LK_LEARNCOUNT, reg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+lk_unlock:</div><div class='add'>+	mutex_unlock(&amp;a5psw-&gt;lk_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int a5psw_port_fdb_dump(struct dsa_switch *ds, int port,</div><div class='add'>+			       dsa_fdb_dump_cb_t *cb, void *data)</div><div class='add'>+{</div><div class='add'>+	struct a5psw *a5psw = ds-&gt;priv;</div><div class='add'>+	union lk_data lk_data;</div><div class='add'>+	int i = 0, ret = 0;</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;a5psw-&gt;lk_lock);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; A5PSW_TABLE_ENTRIES; i++) {</div><div class='add'>+		reg = A5PSW_LK_ADDR_CTRL_READ | A5PSW_LK_ADDR_CTRL_WAIT | i;</div><div class='add'>+</div><div class='add'>+		ret = a5psw_lk_execute_ctrl(a5psw, &amp;reg);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out_unlock;</div><div class='add'>+</div><div class='add'>+		lk_data.hi = a5psw_reg_readl(a5psw, A5PSW_LK_DATA_HI);</div><div class='add'>+		/* If entry is not valid or does not contain the port, skip */</div><div class='add'>+		if (!lk_data.entry.valid ||</div><div class='add'>+		    !(lk_data.entry.port_mask &amp; BIT(port)))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		lk_data.lo = a5psw_reg_readl(a5psw, A5PSW_LK_DATA_LO);</div><div class='add'>+</div><div class='add'>+		ret = cb(lk_data.entry.mac, 0, lk_data.entry.is_static, data);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out_unlock:</div><div class='add'>+	mutex_unlock(&amp;a5psw-&gt;lk_lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int a5psw_port_vlan_filtering(struct dsa_switch *ds, int port,</div><div class='add'>+				     bool vlan_filtering,</div><div class='add'>+				     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	u32 mask = BIT(port + A5PSW_VLAN_VERI_SHIFT) |</div><div class='add'>+		   BIT(port + A5PSW_VLAN_DISC_SHIFT);</div><div class='add'>+	u32 val = vlan_filtering ? mask : 0;</div><div class='add'>+	struct a5psw *a5psw = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	/* Disable/enable vlan tagging */</div><div class='add'>+	a5psw_reg_rmw(a5psw, A5PSW_VLAN_IN_MODE_ENA, BIT(port),</div><div class='add'>+		      vlan_filtering ? BIT(port) : 0);</div><div class='add'>+</div><div class='add'>+	/* Disable/enable vlan input filtering */</div><div class='add'>+	a5psw_reg_rmw(a5psw, A5PSW_VLAN_VERIFY, mask, val);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int a5psw_find_vlan_entry(struct a5psw *a5psw, u16 vid)</div><div class='add'>+{</div><div class='add'>+	u32 vlan_res;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Find vlan for this port */</div><div class='add'>+	for (i = 0; i &lt; A5PSW_VLAN_COUNT; i++) {</div><div class='add'>+		vlan_res = a5psw_reg_readl(a5psw, A5PSW_VLAN_RES(i));</div><div class='add'>+		if (FIELD_GET(A5PSW_VLAN_RES_VLANID, vlan_res) == vid)</div><div class='add'>+			return i;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int a5psw_new_vlan_res_entry(struct a5psw *a5psw, u16 newvid)</div><div class='add'>+{</div><div class='add'>+	u32 vlan_res;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Find a free VLAN entry */</div><div class='add'>+	for (i = 0; i &lt; A5PSW_VLAN_COUNT; i++) {</div><div class='add'>+		vlan_res = a5psw_reg_readl(a5psw, A5PSW_VLAN_RES(i));</div><div class='add'>+		if (!(FIELD_GET(A5PSW_VLAN_RES_PORTMASK, vlan_res))) {</div><div class='add'>+			vlan_res = FIELD_PREP(A5PSW_VLAN_RES_VLANID, newvid);</div><div class='add'>+			a5psw_reg_writel(a5psw, A5PSW_VLAN_RES(i), vlan_res);</div><div class='add'>+			return i;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void a5psw_port_vlan_tagged_cfg(struct a5psw *a5psw,</div><div class='add'>+				       unsigned int vlan_res_id, int port,</div><div class='add'>+				       bool set)</div><div class='add'>+{</div><div class='add'>+	u32 mask = A5PSW_VLAN_RES_WR_PORTMASK | A5PSW_VLAN_RES_RD_TAGMASK |</div><div class='add'>+		   BIT(port);</div><div class='add'>+	u32 vlan_res_off = A5PSW_VLAN_RES(vlan_res_id);</div><div class='add'>+	u32 val = A5PSW_VLAN_RES_WR_TAGMASK, reg;</div><div class='add'>+</div><div class='add'>+	if (set)</div><div class='add'>+		val |= BIT(port);</div><div class='add'>+</div><div class='add'>+	/* Toggle tag mask read */</div><div class='add'>+	a5psw_reg_writel(a5psw, vlan_res_off, A5PSW_VLAN_RES_RD_TAGMASK);</div><div class='add'>+	reg = a5psw_reg_readl(a5psw, vlan_res_off);</div><div class='add'>+	a5psw_reg_writel(a5psw, vlan_res_off, A5PSW_VLAN_RES_RD_TAGMASK);</div><div class='add'>+</div><div class='add'>+	reg &amp;= ~mask;</div><div class='add'>+	reg |= val;</div><div class='add'>+	a5psw_reg_writel(a5psw, vlan_res_off, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void a5psw_port_vlan_cfg(struct a5psw *a5psw, unsigned int vlan_res_id,</div><div class='add'>+				int port, bool set)</div><div class='add'>+{</div><div class='add'>+	u32 mask = A5PSW_VLAN_RES_WR_TAGMASK | BIT(port);</div><div class='add'>+	u32 reg = A5PSW_VLAN_RES_WR_PORTMASK;</div><div class='add'>+</div><div class='add'>+	if (set)</div><div class='add'>+		reg |= BIT(port);</div><div class='add'>+</div><div class='add'>+	a5psw_reg_rmw(a5psw, A5PSW_VLAN_RES(vlan_res_id), mask, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int a5psw_port_vlan_add(struct dsa_switch *ds, int port,</div><div class='add'>+			       const struct switchdev_obj_port_vlan *vlan,</div><div class='add'>+			       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	bool tagged = !(vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_UNTAGGED);</div><div class='add'>+	bool pvid = vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_PVID;</div><div class='add'>+	struct a5psw *a5psw = ds-&gt;priv;</div><div class='add'>+	u16 vid = vlan-&gt;vid;</div><div class='add'>+	int vlan_res_id;</div><div class='add'>+</div><div class='add'>+	vlan_res_id = a5psw_find_vlan_entry(a5psw, vid);</div><div class='add'>+	if (vlan_res_id &lt; 0) {</div><div class='add'>+		vlan_res_id = a5psw_new_vlan_res_entry(a5psw, vid);</div><div class='add'>+		if (vlan_res_id &lt; 0)</div><div class='add'>+			return -ENOSPC;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	a5psw_port_vlan_cfg(a5psw, vlan_res_id, port, true);</div><div class='add'>+	if (tagged)</div><div class='add'>+		a5psw_port_vlan_tagged_cfg(a5psw, vlan_res_id, port, true);</div><div class='add'>+</div><div class='add'>+	/* Configure port to tag with corresponding VID, but do not enable it</div><div class='add'>+	 * yet: wait for vlan filtering to be enabled to enable vlan port</div><div class='add'>+	 * tagging</div><div class='add'>+	 */</div><div class='add'>+	if (pvid)</div><div class='add'>+		a5psw_reg_writel(a5psw, A5PSW_SYSTEM_TAGINFO(port), vid);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int a5psw_port_vlan_del(struct dsa_switch *ds, int port,</div><div class='add'>+			       const struct switchdev_obj_port_vlan *vlan)</div><div class='add'>+{</div><div class='add'>+	struct a5psw *a5psw = ds-&gt;priv;</div><div class='add'>+	u16 vid = vlan-&gt;vid;</div><div class='add'>+	int vlan_res_id;</div><div class='add'>+</div><div class='add'>+	vlan_res_id = a5psw_find_vlan_entry(a5psw, vid);</div><div class='add'>+	if (vlan_res_id &lt; 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	a5psw_port_vlan_cfg(a5psw, vlan_res_id, port, false);</div><div class='add'>+	a5psw_port_vlan_tagged_cfg(a5psw, vlan_res_id, port, false);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u64 a5psw_read_stat(struct a5psw *a5psw, u32 offset, int port)</div><div class='add'>+{</div><div class='add'>+	u32 reg_lo, reg_hi;</div><div class='add'>+</div><div class='add'>+	reg_lo = a5psw_reg_readl(a5psw, offset + A5PSW_PORT_OFFSET(port));</div><div class='add'>+	/* A5PSW_STATS_HIWORD is latched on stat read */</div><div class='add'>+	reg_hi = a5psw_reg_readl(a5psw, A5PSW_STATS_HIWORD);</div><div class='add'>+</div><div class='add'>+	return ((u64)reg_hi &lt;&lt; 32) | reg_lo;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void a5psw_get_strings(struct dsa_switch *ds, int port, u32 stringset,</div><div class='add'>+			      uint8_t *data)</div><div class='add'>+{</div><div class='add'>+	unsigned int u;</div><div class='add'>+</div><div class='add'>+	if (stringset != ETH_SS_STATS)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (u = 0; u &lt; ARRAY_SIZE(a5psw_stats); u++)</div><div class='add'>+		ethtool_puts(&amp;data, a5psw_stats[u].name);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void a5psw_get_ethtool_stats(struct dsa_switch *ds, int port,</div><div class='add'>+				    uint64_t *data)</div><div class='add'>+{</div><div class='add'>+	struct a5psw *a5psw = ds-&gt;priv;</div><div class='add'>+	unsigned int u;</div><div class='add'>+</div><div class='add'>+	for (u = 0; u &lt; ARRAY_SIZE(a5psw_stats); u++)</div><div class='add'>+		data[u] = a5psw_read_stat(a5psw, a5psw_stats[u].offset, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int a5psw_get_sset_count(struct dsa_switch *ds, int port, int sset)</div><div class='add'>+{</div><div class='add'>+	if (sset != ETH_SS_STATS)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return ARRAY_SIZE(a5psw_stats);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void a5psw_get_eth_mac_stats(struct dsa_switch *ds, int port,</div><div class='add'>+				    struct ethtool_eth_mac_stats *mac_stats)</div><div class='add'>+{</div><div class='add'>+	struct a5psw *a5psw = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+#define RD(name) a5psw_read_stat(a5psw, A5PSW_##name, port)</div><div class='add'>+	mac_stats-&gt;FramesTransmittedOK = RD(aFramesTransmittedOK);</div><div class='add'>+	mac_stats-&gt;SingleCollisionFrames = RD(aSingleCollisions);</div><div class='add'>+	mac_stats-&gt;MultipleCollisionFrames = RD(aMultipleCollisions);</div><div class='add'>+	mac_stats-&gt;FramesReceivedOK = RD(aFramesReceivedOK);</div><div class='add'>+	mac_stats-&gt;FrameCheckSequenceErrors = RD(aFrameCheckSequenceErrors);</div><div class='add'>+	mac_stats-&gt;AlignmentErrors = RD(aAlignmentErrors);</div><div class='add'>+	mac_stats-&gt;OctetsTransmittedOK = RD(aOctetsTransmittedOK);</div><div class='add'>+	mac_stats-&gt;FramesWithDeferredXmissions = RD(aDeferred);</div><div class='add'>+	mac_stats-&gt;LateCollisions = RD(aLateCollisions);</div><div class='add'>+	mac_stats-&gt;FramesAbortedDueToXSColls = RD(aExcessiveCollisions);</div><div class='add'>+	mac_stats-&gt;FramesLostDueToIntMACXmitError = RD(ifOutErrors);</div><div class='add'>+	mac_stats-&gt;CarrierSenseErrors = RD(aCarrierSenseErrors);</div><div class='add'>+	mac_stats-&gt;OctetsReceivedOK = RD(aOctetsReceivedOK);</div><div class='add'>+	mac_stats-&gt;FramesLostDueToIntMACRcvError = RD(ifInErrors);</div><div class='add'>+	mac_stats-&gt;MulticastFramesXmittedOK = RD(ifOutMulticastPkts);</div><div class='add'>+	mac_stats-&gt;BroadcastFramesXmittedOK = RD(ifOutBroadcastPkts);</div><div class='add'>+	mac_stats-&gt;FramesWithExcessiveDeferral = RD(aDeferred);</div><div class='add'>+	mac_stats-&gt;MulticastFramesReceivedOK = RD(ifInMulticastPkts);</div><div class='add'>+	mac_stats-&gt;BroadcastFramesReceivedOK = RD(ifInBroadcastPkts);</div><div class='add'>+#undef RD</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ethtool_rmon_hist_range a5psw_rmon_ranges[] = {</div><div class='add'>+	{ 0, 64 },</div><div class='add'>+	{ 65, 127 },</div><div class='add'>+	{ 128, 255 },</div><div class='add'>+	{ 256, 511 },</div><div class='add'>+	{ 512, 1023 },</div><div class='add'>+	{ 1024, 1518 },</div><div class='add'>+	{ 1519, A5PSW_MAX_MTU },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void a5psw_get_rmon_stats(struct dsa_switch *ds, int port,</div><div class='add'>+				 struct ethtool_rmon_stats *rmon_stats,</div><div class='add'>+				 const struct ethtool_rmon_hist_range **ranges)</div><div class='add'>+{</div><div class='add'>+	struct a5psw *a5psw = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+#define RD(name) a5psw_read_stat(a5psw, A5PSW_##name, port)</div><div class='add'>+	rmon_stats-&gt;undersize_pkts = RD(etherStatsUndersizePkts);</div><div class='add'>+	rmon_stats-&gt;oversize_pkts = RD(etherStatsOversizePkts);</div><div class='add'>+	rmon_stats-&gt;fragments = RD(etherStatsFragments);</div><div class='add'>+	rmon_stats-&gt;jabbers = RD(etherStatsJabbers);</div><div class='add'>+	rmon_stats-&gt;hist[0] = RD(etherStatsPkts64Octets);</div><div class='add'>+	rmon_stats-&gt;hist[1] = RD(etherStatsPkts65to127Octets);</div><div class='add'>+	rmon_stats-&gt;hist[2] = RD(etherStatsPkts128to255Octets);</div><div class='add'>+	rmon_stats-&gt;hist[3] = RD(etherStatsPkts256to511Octets);</div><div class='add'>+	rmon_stats-&gt;hist[4] = RD(etherStatsPkts512to1023Octets);</div><div class='add'>+	rmon_stats-&gt;hist[5] = RD(etherStatsPkts1024to1518Octets);</div><div class='add'>+	rmon_stats-&gt;hist[6] = RD(etherStatsPkts1519toXOctets);</div><div class='add'>+#undef RD</div><div class='add'>+</div><div class='add'>+	*ranges = a5psw_rmon_ranges;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void a5psw_get_eth_ctrl_stats(struct dsa_switch *ds, int port,</div><div class='add'>+				     struct ethtool_eth_ctrl_stats *ctrl_stats)</div><div class='add'>+{</div><div class='add'>+	struct a5psw *a5psw = ds-&gt;priv;</div><div class='add'>+	u64 stat;</div><div class='add'>+</div><div class='add'>+	stat = a5psw_read_stat(a5psw, A5PSW_aTxPAUSEMACCtrlFrames, port);</div><div class='add'>+	ctrl_stats-&gt;MACControlFramesTransmitted = stat;</div><div class='add'>+	stat = a5psw_read_stat(a5psw, A5PSW_aRxPAUSEMACCtrlFrames, port);</div><div class='add'>+	ctrl_stats-&gt;MACControlFramesReceived = stat;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void a5psw_vlan_setup(struct a5psw *a5psw, int port)</div><div class='add'>+{</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	/* Enable TAG always mode for the port, this is actually controlled</div><div class='add'>+	 * by VLAN_IN_MODE_ENA field which will be used for PVID insertion</div><div class='add'>+	 */</div><div class='add'>+	reg = A5PSW_VLAN_IN_MODE_TAG_ALWAYS;</div><div class='add'>+	reg &lt;&lt;= A5PSW_VLAN_IN_MODE_PORT_SHIFT(port);</div><div class='add'>+	a5psw_reg_rmw(a5psw, A5PSW_VLAN_IN_MODE, A5PSW_VLAN_IN_MODE_PORT(port),</div><div class='add'>+		      reg);</div><div class='add'>+</div><div class='add'>+	/* Set transparent mode for output frame manipulation, this will depend</div><div class='add'>+	 * on the VLAN_RES configuration mode</div><div class='add'>+	 */</div><div class='add'>+	reg = A5PSW_VLAN_OUT_MODE_TRANSPARENT;</div><div class='add'>+	reg &lt;&lt;= A5PSW_VLAN_OUT_MODE_PORT_SHIFT(port);</div><div class='add'>+	a5psw_reg_rmw(a5psw, A5PSW_VLAN_OUT_MODE,</div><div class='add'>+		      A5PSW_VLAN_OUT_MODE_PORT(port), reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int a5psw_setup(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct a5psw *a5psw = ds-&gt;priv;</div><div class='add'>+	int port, vlan, ret;</div><div class='add'>+	struct dsa_port *dp;</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	/* Validate that there is only 1 CPU port with index A5PSW_CPU_PORT */</div><div class='add'>+	dsa_switch_for_each_cpu_port(dp, ds) {</div><div class='add'>+		if (dp-&gt;index != A5PSW_CPU_PORT) {</div><div class='add'>+			dev_err(a5psw-&gt;dev, "Invalid CPU port\n");</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Configure management port */</div><div class='add'>+	reg = A5PSW_CPU_PORT | A5PSW_MGMT_CFG_ENABLE;</div><div class='add'>+	a5psw_reg_writel(a5psw, A5PSW_MGMT_CFG, reg);</div><div class='add'>+</div><div class='add'>+	/* Set pattern 0 to forward all frame to mgmt port */</div><div class='add'>+	a5psw_reg_writel(a5psw, A5PSW_PATTERN_CTRL(A5PSW_PATTERN_MGMTFWD),</div><div class='add'>+			 A5PSW_PATTERN_CTRL_MGMTFWD);</div><div class='add'>+</div><div class='add'>+	/* Enable port tagging */</div><div class='add'>+	reg = FIELD_PREP(A5PSW_MGMT_TAG_CFG_TAGFIELD, ETH_P_DSA_A5PSW);</div><div class='add'>+	reg |= A5PSW_MGMT_TAG_CFG_ENABLE | A5PSW_MGMT_TAG_CFG_ALL_FRAMES;</div><div class='add'>+	a5psw_reg_writel(a5psw, A5PSW_MGMT_TAG_CFG, reg);</div><div class='add'>+</div><div class='add'>+	/* Enable normal switch operation */</div><div class='add'>+	reg = A5PSW_LK_ADDR_CTRL_BLOCKING | A5PSW_LK_ADDR_CTRL_LEARNING |</div><div class='add'>+	      A5PSW_LK_ADDR_CTRL_AGEING | A5PSW_LK_ADDR_CTRL_ALLOW_MIGR |</div><div class='add'>+	      A5PSW_LK_ADDR_CTRL_CLEAR_TABLE;</div><div class='add'>+	a5psw_reg_writel(a5psw, A5PSW_LK_CTRL, reg);</div><div class='add'>+</div><div class='add'>+	ret = readl_poll_timeout(a5psw-&gt;base + A5PSW_LK_CTRL, reg,</div><div class='add'>+				 !(reg &amp; A5PSW_LK_ADDR_CTRL_CLEAR_TABLE),</div><div class='add'>+				 A5PSW_LK_BUSY_USEC_POLL, A5PSW_CTRL_TIMEOUT);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(a5psw-&gt;dev, "Failed to clear lookup table\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Reset learn count to 0 */</div><div class='add'>+	reg = A5PSW_LK_LEARNCOUNT_MODE_SET;</div><div class='add'>+	a5psw_reg_writel(a5psw, A5PSW_LK_LEARNCOUNT, reg);</div><div class='add'>+</div><div class='add'>+	/* Clear VLAN resource table */</div><div class='add'>+	reg = A5PSW_VLAN_RES_WR_PORTMASK | A5PSW_VLAN_RES_WR_TAGMASK;</div><div class='add'>+	for (vlan = 0; vlan &lt; A5PSW_VLAN_COUNT; vlan++)</div><div class='add'>+		a5psw_reg_writel(a5psw, A5PSW_VLAN_RES(vlan), reg);</div><div class='add'>+</div><div class='add'>+	/* Reset all ports */</div><div class='add'>+	dsa_switch_for_each_port(dp, ds) {</div><div class='add'>+		port = dp-&gt;index;</div><div class='add'>+</div><div class='add'>+		/* Reset the port */</div><div class='add'>+		a5psw_reg_writel(a5psw, A5PSW_CMD_CFG(port),</div><div class='add'>+				 A5PSW_CMD_CFG_SW_RESET);</div><div class='add'>+</div><div class='add'>+		/* Enable only CPU port */</div><div class='add'>+		a5psw_port_enable_set(a5psw, port, dsa_port_is_cpu(dp));</div><div class='add'>+</div><div class='add'>+		if (dsa_port_is_unused(dp))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* Enable egress flooding and learning for CPU port */</div><div class='add'>+		if (dsa_port_is_cpu(dp)) {</div><div class='add'>+			a5psw_flooding_set_resolution(a5psw, port, true);</div><div class='add'>+			a5psw_port_learning_set(a5psw, port, true);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Enable standalone mode for user ports */</div><div class='add'>+		if (dsa_port_is_user(dp))</div><div class='add'>+			a5psw_port_set_standalone(a5psw, port, true);</div><div class='add'>+</div><div class='add'>+		a5psw_vlan_setup(a5psw, port);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct phylink_mac_ops a5psw_phylink_mac_ops = {</div><div class='add'>+	.mac_select_pcs = a5psw_phylink_mac_select_pcs,</div><div class='add'>+	.mac_config = a5psw_phylink_mac_config,</div><div class='add'>+	.mac_link_down = a5psw_phylink_mac_link_down,</div><div class='add'>+	.mac_link_up = a5psw_phylink_mac_link_up,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct dsa_switch_ops a5psw_switch_ops = {</div><div class='add'>+	.get_tag_protocol = a5psw_get_tag_protocol,</div><div class='add'>+	.setup = a5psw_setup,</div><div class='add'>+	.port_disable = a5psw_port_disable,</div><div class='add'>+	.port_enable = a5psw_port_enable,</div><div class='add'>+	.phylink_get_caps = a5psw_phylink_get_caps,</div><div class='add'>+	.port_change_mtu = a5psw_port_change_mtu,</div><div class='add'>+	.port_max_mtu = a5psw_port_max_mtu,</div><div class='add'>+	.get_sset_count = a5psw_get_sset_count,</div><div class='add'>+	.get_strings = a5psw_get_strings,</div><div class='add'>+	.get_ethtool_stats = a5psw_get_ethtool_stats,</div><div class='add'>+	.get_eth_mac_stats = a5psw_get_eth_mac_stats,</div><div class='add'>+	.get_eth_ctrl_stats = a5psw_get_eth_ctrl_stats,</div><div class='add'>+	.get_rmon_stats = a5psw_get_rmon_stats,</div><div class='add'>+	.set_ageing_time = a5psw_set_ageing_time,</div><div class='add'>+	.port_bridge_join = a5psw_port_bridge_join,</div><div class='add'>+	.port_bridge_leave = a5psw_port_bridge_leave,</div><div class='add'>+	.port_pre_bridge_flags = a5psw_port_pre_bridge_flags,</div><div class='add'>+	.port_bridge_flags = a5psw_port_bridge_flags,</div><div class='add'>+	.port_stp_state_set = a5psw_port_stp_state_set,</div><div class='add'>+	.port_fast_age = a5psw_port_fast_age,</div><div class='add'>+	.port_vlan_filtering = a5psw_port_vlan_filtering,</div><div class='add'>+	.port_vlan_add = a5psw_port_vlan_add,</div><div class='add'>+	.port_vlan_del = a5psw_port_vlan_del,</div><div class='add'>+	.port_fdb_add = a5psw_port_fdb_add,</div><div class='add'>+	.port_fdb_del = a5psw_port_fdb_del,</div><div class='add'>+	.port_fdb_dump = a5psw_port_fdb_dump,</div><div class='add'>+	.port_hsr_join = dsa_port_simple_hsr_join,</div><div class='add'>+	.port_hsr_leave = dsa_port_simple_hsr_leave,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int a5psw_mdio_wait_busy(struct a5psw *a5psw)</div><div class='add'>+{</div><div class='add'>+	u32 status;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = readl_poll_timeout(a5psw-&gt;base + A5PSW_MDIO_CFG_STATUS, status,</div><div class='add'>+				 !(status &amp; A5PSW_MDIO_CFG_STATUS_BUSY), 10,</div><div class='add'>+				 1000 * USEC_PER_MSEC);</div><div class='add'>+	if (err)</div><div class='add'>+		dev_err(a5psw-&gt;dev, "MDIO command timeout\n");</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int a5psw_mdio_read(struct mii_bus *bus, int phy_id, int phy_reg)</div><div class='add'>+{</div><div class='add'>+	struct a5psw *a5psw = bus-&gt;priv;</div><div class='add'>+	u32 cmd, status;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	cmd = A5PSW_MDIO_COMMAND_READ;</div><div class='add'>+	cmd |= FIELD_PREP(A5PSW_MDIO_COMMAND_REG_ADDR, phy_reg);</div><div class='add'>+	cmd |= FIELD_PREP(A5PSW_MDIO_COMMAND_PHY_ADDR, phy_id);</div><div class='add'>+</div><div class='add'>+	a5psw_reg_writel(a5psw, A5PSW_MDIO_COMMAND, cmd);</div><div class='add'>+</div><div class='add'>+	ret = a5psw_mdio_wait_busy(a5psw);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = a5psw_reg_readl(a5psw, A5PSW_MDIO_DATA) &amp; A5PSW_MDIO_DATA_MASK;</div><div class='add'>+</div><div class='add'>+	status = a5psw_reg_readl(a5psw, A5PSW_MDIO_CFG_STATUS);</div><div class='add'>+	if (status &amp; A5PSW_MDIO_CFG_STATUS_READERR)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int a5psw_mdio_write(struct mii_bus *bus, int phy_id, int phy_reg,</div><div class='add'>+			    u16 phy_data)</div><div class='add'>+{</div><div class='add'>+	struct a5psw *a5psw = bus-&gt;priv;</div><div class='add'>+	u32 cmd;</div><div class='add'>+</div><div class='add'>+	cmd = FIELD_PREP(A5PSW_MDIO_COMMAND_REG_ADDR, phy_reg);</div><div class='add'>+	cmd |= FIELD_PREP(A5PSW_MDIO_COMMAND_PHY_ADDR, phy_id);</div><div class='add'>+</div><div class='add'>+	a5psw_reg_writel(a5psw, A5PSW_MDIO_COMMAND, cmd);</div><div class='add'>+	a5psw_reg_writel(a5psw, A5PSW_MDIO_DATA, phy_data);</div><div class='add'>+</div><div class='add'>+	return a5psw_mdio_wait_busy(a5psw);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int a5psw_mdio_config(struct a5psw *a5psw, u32 mdio_freq)</div><div class='add'>+{</div><div class='add'>+	unsigned long rate;</div><div class='add'>+	unsigned long div;</div><div class='add'>+	u32 cfgstatus;</div><div class='add'>+</div><div class='add'>+	rate = clk_get_rate(a5psw-&gt;hclk);</div><div class='add'>+	div = ((rate / mdio_freq) / 2);</div><div class='add'>+	if (div &gt; FIELD_MAX(A5PSW_MDIO_CFG_STATUS_CLKDIV) ||</div><div class='add'>+	    div &lt; A5PSW_MDIO_CLK_DIV_MIN) {</div><div class='add'>+		dev_err(a5psw-&gt;dev, "MDIO clock div %ld out of range\n", div);</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cfgstatus = FIELD_PREP(A5PSW_MDIO_CFG_STATUS_CLKDIV, div);</div><div class='add'>+</div><div class='add'>+	a5psw_reg_writel(a5psw, A5PSW_MDIO_CFG_STATUS, cfgstatus);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int a5psw_probe_mdio(struct a5psw *a5psw, struct device_node *node)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = a5psw-&gt;dev;</div><div class='add'>+	struct mii_bus *bus;</div><div class='add'>+	u32 mdio_freq;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (of_property_read_u32(node, "clock-frequency", &amp;mdio_freq))</div><div class='add'>+		mdio_freq = A5PSW_MDIO_DEF_FREQ;</div><div class='add'>+</div><div class='add'>+	ret = a5psw_mdio_config(a5psw, mdio_freq);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	bus = devm_mdiobus_alloc(dev);</div><div class='add'>+	if (!bus)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	bus-&gt;name = "a5psw_mdio";</div><div class='add'>+	bus-&gt;read = a5psw_mdio_read;</div><div class='add'>+	bus-&gt;write = a5psw_mdio_write;</div><div class='add'>+	bus-&gt;priv = a5psw;</div><div class='add'>+	bus-&gt;parent = dev;</div><div class='add'>+	snprintf(bus-&gt;id, MII_BUS_ID_SIZE, "%s", dev_name(dev));</div><div class='add'>+</div><div class='add'>+	a5psw-&gt;mii_bus = bus;</div><div class='add'>+</div><div class='add'>+	return devm_of_mdiobus_register(dev, bus, node);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void a5psw_pcs_free(struct a5psw *a5psw)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(a5psw-&gt;pcs); i++) {</div><div class='add'>+		if (a5psw-&gt;pcs[i])</div><div class='add'>+			miic_destroy(a5psw-&gt;pcs[i]);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int a5psw_pcs_get(struct a5psw *a5psw)</div><div class='add'>+{</div><div class='add'>+	struct device_node *ports, *port, *pcs_node;</div><div class='add'>+	struct phylink_pcs *pcs;</div><div class='add'>+	int ret;</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	ports = of_get_child_by_name(a5psw-&gt;dev-&gt;of_node, "ethernet-ports");</div><div class='add'>+	if (!ports)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	for_each_available_child_of_node(ports, port) {</div><div class='add'>+		pcs_node = of_parse_phandle(port, "pcs-handle", 0);</div><div class='add'>+		if (!pcs_node)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (of_property_read_u32(port, "reg", &amp;reg)) {</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+			goto free_pcs;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (reg &gt;= ARRAY_SIZE(a5psw-&gt;pcs)) {</div><div class='add'>+			ret = -ENODEV;</div><div class='add'>+			goto free_pcs;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		pcs = miic_create(a5psw-&gt;dev, pcs_node);</div><div class='add'>+		if (IS_ERR(pcs)) {</div><div class='add'>+			dev_err(a5psw-&gt;dev, "Failed to create PCS for port %d\n",</div><div class='add'>+				reg);</div><div class='add'>+			ret = PTR_ERR(pcs);</div><div class='add'>+			goto free_pcs;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		a5psw-&gt;pcs[reg] = pcs;</div><div class='add'>+		of_node_put(pcs_node);</div><div class='add'>+	}</div><div class='add'>+	of_node_put(ports);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+free_pcs:</div><div class='add'>+	of_node_put(pcs_node);</div><div class='add'>+	of_node_put(port);</div><div class='add'>+	of_node_put(ports);</div><div class='add'>+	a5psw_pcs_free(a5psw);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int a5psw_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct device_node *mdio;</div><div class='add'>+	struct dsa_switch *ds;</div><div class='add'>+	struct a5psw *a5psw;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	a5psw = devm_kzalloc(dev, sizeof(*a5psw), GFP_KERNEL);</div><div class='add'>+	if (!a5psw)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	a5psw-&gt;dev = dev;</div><div class='add'>+	mutex_init(&amp;a5psw-&gt;lk_lock);</div><div class='add'>+	spin_lock_init(&amp;a5psw-&gt;reg_lock);</div><div class='add'>+	a5psw-&gt;base = devm_platform_ioremap_resource(pdev, 0);</div><div class='add'>+	if (IS_ERR(a5psw-&gt;base))</div><div class='add'>+		return PTR_ERR(a5psw-&gt;base);</div><div class='add'>+</div><div class='add'>+	a5psw-&gt;bridged_ports = BIT(A5PSW_CPU_PORT);</div><div class='add'>+</div><div class='add'>+	ret = a5psw_pcs_get(a5psw);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	a5psw-&gt;hclk = devm_clk_get_enabled(dev, "hclk");</div><div class='add'>+	if (IS_ERR(a5psw-&gt;hclk)) {</div><div class='add'>+		dev_err(dev, "failed get hclk clock\n");</div><div class='add'>+		ret = PTR_ERR(a5psw-&gt;hclk);</div><div class='add'>+		goto free_pcs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	a5psw-&gt;clk = devm_clk_get_enabled(dev, "clk");</div><div class='add'>+	if (IS_ERR(a5psw-&gt;clk)) {</div><div class='add'>+		dev_err(dev, "failed get clk_switch clock\n");</div><div class='add'>+		ret = PTR_ERR(a5psw-&gt;clk);</div><div class='add'>+		goto free_pcs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mdio = of_get_available_child_by_name(dev-&gt;of_node, "mdio");</div><div class='add'>+	if (mdio) {</div><div class='add'>+		ret = a5psw_probe_mdio(a5psw, mdio);</div><div class='add'>+		of_node_put(mdio);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(dev, "Failed to register MDIO: %d\n", ret);</div><div class='add'>+			goto free_pcs;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ds = &amp;a5psw-&gt;ds;</div><div class='add'>+	ds-&gt;dev = dev;</div><div class='add'>+	ds-&gt;num_ports = A5PSW_PORTS_NUM;</div><div class='add'>+	ds-&gt;ops = &amp;a5psw_switch_ops;</div><div class='add'>+	ds-&gt;phylink_mac_ops = &amp;a5psw_phylink_mac_ops;</div><div class='add'>+	ds-&gt;priv = a5psw;</div><div class='add'>+</div><div class='add'>+	ret = dsa_register_switch(ds);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "Failed to register DSA switch: %d\n", ret);</div><div class='add'>+		goto free_pcs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+free_pcs:</div><div class='add'>+	a5psw_pcs_free(a5psw);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void a5psw_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct a5psw *a5psw = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	if (!a5psw)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dsa_unregister_switch(&amp;a5psw-&gt;ds);</div><div class='add'>+	a5psw_pcs_free(a5psw);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void a5psw_shutdown(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct a5psw *a5psw = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	if (!a5psw)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dsa_switch_shutdown(&amp;a5psw-&gt;ds);</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id a5psw_of_mtable[] = {</div><div class='add'>+	{ .compatible = "renesas,rzn1-a5psw", },</div><div class='add'>+	{ /* sentinel */ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, a5psw_of_mtable);</div><div class='add'>+</div><div class='add'>+static struct platform_driver a5psw_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name	 = "rzn1_a5psw",</div><div class='add'>+		.of_match_table = a5psw_of_mtable,</div><div class='add'>+	},</div><div class='add'>+	.probe = a5psw_probe,</div><div class='add'>+	.remove = a5psw_remove,</div><div class='add'>+	.shutdown = a5psw_shutdown,</div><div class='add'>+};</div><div class='add'>+module_platform_driver(a5psw_driver);</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_DESCRIPTION("Renesas RZ/N1 Advanced 5-port Switch driver");</div><div class='add'>+MODULE_AUTHOR("Clément Léger &lt;clement.leger@bootlin.com&gt;");</div><div class='head'>diff --git a/drivers/net/dsa/rzn1_a5psw.h b/drivers/net/dsa/rzn1_a5psw.h<br/>new file mode 100644<br/>index 000000000000..d54acedac194<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/rzn1_a5psw.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/rzn1_a5psw.h</a></div><div class='hunk'>@@ -0,0 +1,262 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2022 Schneider Electric</div><div class='add'>+ *</div><div class='add'>+ * Clément Léger &lt;clement.leger@bootlin.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/debugfs.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_mdio.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/pcs-rzn1-miic.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+</div><div class='add'>+#define A5PSW_REVISION			0x0</div><div class='add'>+#define A5PSW_PORT_OFFSET(port)		(0x400 * (port))</div><div class='add'>+</div><div class='add'>+#define A5PSW_PORT_ENA			0x8</div><div class='add'>+#define A5PSW_PORT_ENA_TX(port)		BIT(port)</div><div class='add'>+#define A5PSW_PORT_ENA_RX_SHIFT		16</div><div class='add'>+#define A5PSW_PORT_ENA_TX_RX(port)	(BIT((port) + A5PSW_PORT_ENA_RX_SHIFT) | \</div><div class='add'>+					 BIT(port))</div><div class='add'>+#define A5PSW_UCAST_DEF_MASK		0xC</div><div class='add'>+</div><div class='add'>+#define A5PSW_VLAN_VERIFY		0x10</div><div class='add'>+#define A5PSW_VLAN_VERI_SHIFT		0</div><div class='add'>+#define A5PSW_VLAN_DISC_SHIFT		16</div><div class='add'>+</div><div class='add'>+#define A5PSW_BCAST_DEF_MASK		0x14</div><div class='add'>+#define A5PSW_MCAST_DEF_MASK		0x18</div><div class='add'>+</div><div class='add'>+#define A5PSW_INPUT_LEARN		0x1C</div><div class='add'>+#define A5PSW_INPUT_LEARN_DIS(p)	BIT((p) + 16)</div><div class='add'>+#define A5PSW_INPUT_LEARN_BLOCK(p)	BIT(p)</div><div class='add'>+</div><div class='add'>+#define A5PSW_MGMT_CFG			0x20</div><div class='add'>+#define A5PSW_MGMT_CFG_ENABLE		BIT(6)</div><div class='add'>+</div><div class='add'>+#define A5PSW_MODE_CFG			0x24</div><div class='add'>+#define A5PSW_MODE_STATS_RESET		BIT(31)</div><div class='add'>+</div><div class='add'>+#define A5PSW_VLAN_IN_MODE		0x28</div><div class='add'>+#define A5PSW_VLAN_IN_MODE_PORT_SHIFT(port)	((port) * 2)</div><div class='add'>+#define A5PSW_VLAN_IN_MODE_PORT(port)		(GENMASK(1, 0) &lt;&lt; \</div><div class='add'>+					A5PSW_VLAN_IN_MODE_PORT_SHIFT(port))</div><div class='add'>+#define A5PSW_VLAN_IN_MODE_SINGLE_PASSTHROUGH	0x0</div><div class='add'>+#define A5PSW_VLAN_IN_MODE_SINGLE_REPLACE	0x1</div><div class='add'>+#define A5PSW_VLAN_IN_MODE_TAG_ALWAYS		0x2</div><div class='add'>+</div><div class='add'>+#define A5PSW_VLAN_OUT_MODE		0x2C</div><div class='add'>+#define A5PSW_VLAN_OUT_MODE_PORT_SHIFT(port)	((port) * 2)</div><div class='add'>+#define A5PSW_VLAN_OUT_MODE_PORT(port)	(GENMASK(1, 0) &lt;&lt; \</div><div class='add'>+					A5PSW_VLAN_OUT_MODE_PORT_SHIFT(port))</div><div class='add'>+#define A5PSW_VLAN_OUT_MODE_DIS		0x0</div><div class='add'>+#define A5PSW_VLAN_OUT_MODE_STRIP	0x1</div><div class='add'>+#define A5PSW_VLAN_OUT_MODE_TAG_THROUGH	0x2</div><div class='add'>+#define A5PSW_VLAN_OUT_MODE_TRANSPARENT	0x3</div><div class='add'>+</div><div class='add'>+#define A5PSW_VLAN_IN_MODE_ENA		0x30</div><div class='add'>+#define A5PSW_VLAN_TAG_ID		0x34</div><div class='add'>+</div><div class='add'>+#define A5PSW_SYSTEM_TAGINFO(port)	(0x200 + 4 * (port))</div><div class='add'>+</div><div class='add'>+#define A5PSW_AUTH_PORT(port)		(0x240 + 4 * (port))</div><div class='add'>+#define A5PSW_AUTH_PORT_AUTHORIZED	BIT(0)</div><div class='add'>+</div><div class='add'>+#define A5PSW_VLAN_RES(entry)		(0x280 + 4 * (entry))</div><div class='add'>+#define A5PSW_VLAN_RES_WR_PORTMASK	BIT(30)</div><div class='add'>+#define A5PSW_VLAN_RES_WR_TAGMASK	BIT(29)</div><div class='add'>+#define A5PSW_VLAN_RES_RD_TAGMASK	BIT(28)</div><div class='add'>+#define A5PSW_VLAN_RES_VLANID		GENMASK(16, 5)</div><div class='add'>+#define A5PSW_VLAN_RES_PORTMASK		GENMASK(4, 0)</div><div class='add'>+</div><div class='add'>+#define A5PSW_RXMATCH_CONFIG(port)	(0x3e80 + 4 * (port))</div><div class='add'>+#define A5PSW_RXMATCH_CONFIG_PATTERN(p)	BIT(p)</div><div class='add'>+</div><div class='add'>+#define A5PSW_PATTERN_CTRL(p)		(0x3eb0 + 4  * (p))</div><div class='add'>+#define A5PSW_PATTERN_CTRL_MGMTFWD	BIT(1)</div><div class='add'>+</div><div class='add'>+#define A5PSW_LK_CTRL		0x400</div><div class='add'>+#define A5PSW_LK_ADDR_CTRL_BLOCKING	BIT(0)</div><div class='add'>+#define A5PSW_LK_ADDR_CTRL_LEARNING	BIT(1)</div><div class='add'>+#define A5PSW_LK_ADDR_CTRL_AGEING	BIT(2)</div><div class='add'>+#define A5PSW_LK_ADDR_CTRL_ALLOW_MIGR	BIT(3)</div><div class='add'>+#define A5PSW_LK_ADDR_CTRL_CLEAR_TABLE	BIT(6)</div><div class='add'>+</div><div class='add'>+#define A5PSW_LK_ADDR_CTRL		0x408</div><div class='add'>+#define A5PSW_LK_ADDR_CTRL_BUSY		BIT(31)</div><div class='add'>+#define A5PSW_LK_ADDR_CTRL_DELETE_PORT	BIT(30)</div><div class='add'>+#define A5PSW_LK_ADDR_CTRL_CLEAR	BIT(29)</div><div class='add'>+#define A5PSW_LK_ADDR_CTRL_LOOKUP	BIT(28)</div><div class='add'>+#define A5PSW_LK_ADDR_CTRL_WAIT		BIT(27)</div><div class='add'>+#define A5PSW_LK_ADDR_CTRL_READ		BIT(26)</div><div class='add'>+#define A5PSW_LK_ADDR_CTRL_WRITE	BIT(25)</div><div class='add'>+#define A5PSW_LK_ADDR_CTRL_ADDRESS	GENMASK(12, 0)</div><div class='add'>+</div><div class='add'>+#define A5PSW_LK_DATA_LO		0x40C</div><div class='add'>+#define A5PSW_LK_DATA_HI		0x410</div><div class='add'>+#define A5PSW_LK_DATA_HI_VALID		BIT(16)</div><div class='add'>+#define A5PSW_LK_DATA_HI_PORT		BIT(16)</div><div class='add'>+</div><div class='add'>+#define A5PSW_LK_LEARNCOUNT		0x418</div><div class='add'>+#define A5PSW_LK_LEARNCOUNT_COUNT	GENMASK(13, 0)</div><div class='add'>+#define A5PSW_LK_LEARNCOUNT_MODE	GENMASK(31, 30)</div><div class='add'>+#define A5PSW_LK_LEARNCOUNT_MODE_SET	0x0</div><div class='add'>+#define A5PSW_LK_LEARNCOUNT_MODE_INC	0x1</div><div class='add'>+#define A5PSW_LK_LEARNCOUNT_MODE_DEC	0x2</div><div class='add'>+</div><div class='add'>+#define A5PSW_MGMT_TAG_CFG		0x480</div><div class='add'>+#define A5PSW_MGMT_TAG_CFG_TAGFIELD	GENMASK(31, 16)</div><div class='add'>+#define A5PSW_MGMT_TAG_CFG_ALL_FRAMES	BIT(1)</div><div class='add'>+#define A5PSW_MGMT_TAG_CFG_ENABLE	BIT(0)</div><div class='add'>+</div><div class='add'>+#define A5PSW_LK_AGETIME		0x41C</div><div class='add'>+#define A5PSW_LK_AGETIME_MASK		GENMASK(23, 0)</div><div class='add'>+</div><div class='add'>+#define A5PSW_MDIO_CFG_STATUS		0x700</div><div class='add'>+#define A5PSW_MDIO_CFG_STATUS_CLKDIV	GENMASK(15, 7)</div><div class='add'>+#define A5PSW_MDIO_CFG_STATUS_READERR	BIT(1)</div><div class='add'>+#define A5PSW_MDIO_CFG_STATUS_BUSY	BIT(0)</div><div class='add'>+</div><div class='add'>+#define A5PSW_MDIO_COMMAND		0x704</div><div class='add'>+/* Register is named TRAININIT in datasheet and should be set when reading */</div><div class='add'>+#define A5PSW_MDIO_COMMAND_READ		BIT(15)</div><div class='add'>+#define A5PSW_MDIO_COMMAND_PHY_ADDR	GENMASK(9, 5)</div><div class='add'>+#define A5PSW_MDIO_COMMAND_REG_ADDR	GENMASK(4, 0)</div><div class='add'>+</div><div class='add'>+#define A5PSW_MDIO_DATA			0x708</div><div class='add'>+#define A5PSW_MDIO_DATA_MASK		GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define A5PSW_CMD_CFG(port)		(0x808 + A5PSW_PORT_OFFSET(port))</div><div class='add'>+#define A5PSW_CMD_CFG_CNTL_FRM_ENA	BIT(23)</div><div class='add'>+#define A5PSW_CMD_CFG_SW_RESET		BIT(13)</div><div class='add'>+#define A5PSW_CMD_CFG_TX_CRC_APPEND	BIT(11)</div><div class='add'>+#define A5PSW_CMD_CFG_HD_ENA		BIT(10)</div><div class='add'>+#define A5PSW_CMD_CFG_PAUSE_IGNORE	BIT(8)</div><div class='add'>+#define A5PSW_CMD_CFG_CRC_FWD		BIT(6)</div><div class='add'>+#define A5PSW_CMD_CFG_ETH_SPEED		BIT(3)</div><div class='add'>+#define A5PSW_CMD_CFG_RX_ENA		BIT(1)</div><div class='add'>+#define A5PSW_CMD_CFG_TX_ENA		BIT(0)</div><div class='add'>+</div><div class='add'>+#define A5PSW_FRM_LENGTH(port)		(0x814 + A5PSW_PORT_OFFSET(port))</div><div class='add'>+#define A5PSW_FRM_LENGTH_MASK		GENMASK(13, 0)</div><div class='add'>+</div><div class='add'>+#define A5PSW_STATUS(port)		(0x840 + A5PSW_PORT_OFFSET(port))</div><div class='add'>+</div><div class='add'>+#define A5PSW_STATS_HIWORD		0x900</div><div class='add'>+</div><div class='add'>+/* Stats */</div><div class='add'>+#define A5PSW_aFramesTransmittedOK		0x868</div><div class='add'>+#define A5PSW_aFramesReceivedOK			0x86C</div><div class='add'>+#define A5PSW_aFrameCheckSequenceErrors		0x870</div><div class='add'>+#define A5PSW_aAlignmentErrors			0x874</div><div class='add'>+#define A5PSW_aOctetsTransmittedOK		0x878</div><div class='add'>+#define A5PSW_aOctetsReceivedOK			0x87C</div><div class='add'>+#define A5PSW_aTxPAUSEMACCtrlFrames		0x880</div><div class='add'>+#define A5PSW_aRxPAUSEMACCtrlFrames		0x884</div><div class='add'>+/* If */</div><div class='add'>+#define A5PSW_ifInErrors			0x888</div><div class='add'>+#define A5PSW_ifOutErrors			0x88C</div><div class='add'>+#define A5PSW_ifInUcastPkts			0x890</div><div class='add'>+#define A5PSW_ifInMulticastPkts			0x894</div><div class='add'>+#define A5PSW_ifInBroadcastPkts			0x898</div><div class='add'>+#define A5PSW_ifOutDiscards			0x89C</div><div class='add'>+#define A5PSW_ifOutUcastPkts			0x8A0</div><div class='add'>+#define A5PSW_ifOutMulticastPkts		0x8A4</div><div class='add'>+#define A5PSW_ifOutBroadcastPkts		0x8A8</div><div class='add'>+/* Ether */</div><div class='add'>+#define A5PSW_etherStatsDropEvents		0x8AC</div><div class='add'>+#define A5PSW_etherStatsOctets			0x8B0</div><div class='add'>+#define A5PSW_etherStatsPkts			0x8B4</div><div class='add'>+#define A5PSW_etherStatsUndersizePkts		0x8B8</div><div class='add'>+#define A5PSW_etherStatsOversizePkts		0x8BC</div><div class='add'>+#define A5PSW_etherStatsPkts64Octets		0x8C0</div><div class='add'>+#define A5PSW_etherStatsPkts65to127Octets	0x8C4</div><div class='add'>+#define A5PSW_etherStatsPkts128to255Octets	0x8C8</div><div class='add'>+#define A5PSW_etherStatsPkts256to511Octets	0x8CC</div><div class='add'>+#define A5PSW_etherStatsPkts512to1023Octets	0x8D0</div><div class='add'>+#define A5PSW_etherStatsPkts1024to1518Octets	0x8D4</div><div class='add'>+#define A5PSW_etherStatsPkts1519toXOctets	0x8D8</div><div class='add'>+#define A5PSW_etherStatsJabbers			0x8DC</div><div class='add'>+#define A5PSW_etherStatsFragments		0x8E0</div><div class='add'>+</div><div class='add'>+#define A5PSW_VLANReceived			0x8E8</div><div class='add'>+#define A5PSW_VLANTransmitted			0x8EC</div><div class='add'>+</div><div class='add'>+#define A5PSW_aDeferred				0x910</div><div class='add'>+#define A5PSW_aMultipleCollisions		0x914</div><div class='add'>+#define A5PSW_aSingleCollisions			0x918</div><div class='add'>+#define A5PSW_aLateCollisions			0x91C</div><div class='add'>+#define A5PSW_aExcessiveCollisions		0x920</div><div class='add'>+#define A5PSW_aCarrierSenseErrors		0x924</div><div class='add'>+</div><div class='add'>+#define A5PSW_VLAN_TAG(prio, id)	(((prio) &lt;&lt; 12) | (id))</div><div class='add'>+#define A5PSW_PORTS_NUM			5</div><div class='add'>+#define A5PSW_CPU_PORT			(A5PSW_PORTS_NUM - 1)</div><div class='add'>+#define A5PSW_MDIO_DEF_FREQ		2500000</div><div class='add'>+#define A5PSW_MDIO_TIMEOUT		100</div><div class='add'>+#define A5PSW_JUMBO_LEN			(10 * SZ_1K)</div><div class='add'>+#define A5PSW_MDIO_CLK_DIV_MIN		5</div><div class='add'>+#define A5PSW_TAG_LEN			8</div><div class='add'>+#define A5PSW_VLAN_COUNT		32</div><div class='add'>+</div><div class='add'>+/* Ensure enough space for 2 VLAN tags */</div><div class='add'>+#define A5PSW_EXTRA_MTU_LEN		(A5PSW_TAG_LEN + 8)</div><div class='add'>+#define A5PSW_MAX_MTU			(A5PSW_JUMBO_LEN - A5PSW_EXTRA_MTU_LEN)</div><div class='add'>+</div><div class='add'>+#define A5PSW_PATTERN_MGMTFWD		0</div><div class='add'>+</div><div class='add'>+#define A5PSW_LK_BUSY_USEC_POLL		10</div><div class='add'>+#define A5PSW_CTRL_TIMEOUT		1000</div><div class='add'>+#define A5PSW_TABLE_ENTRIES		8192</div><div class='add'>+</div><div class='add'>+struct fdb_entry {</div><div class='add'>+	u8 mac[ETH_ALEN];</div><div class='add'>+	u16 valid:1;</div><div class='add'>+	u16 is_static:1;</div><div class='add'>+	u16 prio:3;</div><div class='add'>+	u16 port_mask:5;</div><div class='add'>+	u16 reserved:6;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+union lk_data {</div><div class='add'>+	struct {</div><div class='add'>+		u32 lo;</div><div class='add'>+		u32 hi;</div><div class='add'>+	};</div><div class='add'>+	struct fdb_entry entry;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct a5psw - switch struct</div><div class='add'>+ * @base: Base address of the switch</div><div class='add'>+ * @hclk: hclk_switch clock</div><div class='add'>+ * @clk: clk_switch clock</div><div class='add'>+ * @dev: Device associated to the switch</div><div class='add'>+ * @mii_bus: MDIO bus struct</div><div class='add'>+ * @mdio_freq: MDIO bus frequency requested</div><div class='add'>+ * @pcs: Array of PCS connected to the switch ports (not for the CPU)</div><div class='add'>+ * @ds: DSA switch struct</div><div class='add'>+ * @stats_lock: lock to access statistics (shared HI counter)</div><div class='add'>+ * @lk_lock: Lock for the lookup table</div><div class='add'>+ * @reg_lock: Lock for register read-modify-write operation</div><div class='add'>+ * @bridged_ports: Mask of ports that are bridged and should be flooded</div><div class='add'>+ * @br_dev: Bridge net device</div><div class='add'>+ */</div><div class='add'>+struct a5psw {</div><div class='add'>+	void __iomem *base;</div><div class='add'>+	struct clk *hclk;</div><div class='add'>+	struct clk *clk;</div><div class='add'>+	struct device *dev;</div><div class='add'>+	struct mii_bus	*mii_bus;</div><div class='add'>+	struct phylink_pcs *pcs[A5PSW_PORTS_NUM - 1];</div><div class='add'>+	struct dsa_switch ds;</div><div class='add'>+	struct mutex lk_lock;</div><div class='add'>+	spinlock_t reg_lock;</div><div class='add'>+	u32 bridged_ports;</div><div class='add'>+	struct net_device *br_dev;</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/net/dsa/sja1105/Kconfig b/drivers/net/dsa/sja1105/Kconfig<br/>new file mode 100644<br/>index 000000000000..1291bba3f3b6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/sja1105/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/sja1105/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,51 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+config NET_DSA_SJA1105</div><div class='add'>+tristate "NXP SJA1105 Ethernet switch family support"</div><div class='add'>+	depends on NET_DSA &amp;&amp; SPI</div><div class='add'>+	depends on PTP_1588_CLOCK_OPTIONAL</div><div class='add'>+	select NET_DSA_TAG_SJA1105</div><div class='add'>+	select PCS_XPCS</div><div class='add'>+	select PACKING</div><div class='add'>+	select CRC32</div><div class='add'>+	help</div><div class='add'>+	  This is the driver for the NXP SJA1105 (5-port) and SJA1110 (10-port)</div><div class='add'>+	  automotive Ethernet switch family. These are managed over an SPI</div><div class='add'>+	  interface. Probing is handled based on OF bindings and so is the</div><div class='add'>+	  linkage to PHYLINK. The driver supports the following revisions:</div><div class='add'>+	    - SJA1105E (Gen. 1, No TT-Ethernet)</div><div class='add'>+	    - SJA1105T (Gen. 1, TT-Ethernet)</div><div class='add'>+	    - SJA1105P (Gen. 2, No SGMII, No TT-Ethernet)</div><div class='add'>+	    - SJA1105Q (Gen. 2, No SGMII, TT-Ethernet)</div><div class='add'>+	    - SJA1105R (Gen. 2, SGMII, No TT-Ethernet)</div><div class='add'>+	    - SJA1105S (Gen. 2, SGMII, TT-Ethernet)</div><div class='add'>+	    - SJA1110A (Gen. 3, SGMII, TT-Ethernet, 100base-TX PHY, 10 ports)</div><div class='add'>+	    - SJA1110B (Gen. 3, SGMII, TT-Ethernet, 100base-TX PHY, 9 ports)</div><div class='add'>+	    - SJA1110C (Gen. 3, SGMII, TT-Ethernet, 100base-TX PHY, 7 ports)</div><div class='add'>+	    - SJA1110D (Gen. 3, SGMII, TT-Ethernet, no 100base-TX PHY, 7 ports)</div><div class='add'>+</div><div class='add'>+config NET_DSA_SJA1105_PTP</div><div class='add'>+	bool "Support for the PTP clock on the NXP SJA1105 Ethernet switch"</div><div class='add'>+	depends on NET_DSA_SJA1105</div><div class='add'>+	depends on PTP_1588_CLOCK</div><div class='add'>+	help</div><div class='add'>+	  This enables support for timestamping and PTP clock manipulations in</div><div class='add'>+	  the SJA1105 DSA driver.</div><div class='add'>+</div><div class='add'>+config NET_DSA_SJA1105_TAS</div><div class='add'>+	bool "Support for the Time-Aware Scheduler on NXP SJA1105"</div><div class='add'>+	depends on NET_DSA_SJA1105 &amp;&amp; NET_SCH_TAPRIO</div><div class='add'>+	depends on NET_SCH_TAPRIO=y || NET_DSA_SJA1105=m</div><div class='add'>+	depends on NET_DSA_SJA1105_PTP</div><div class='add'>+	help</div><div class='add'>+	  This enables support for the TTEthernet-based egress scheduling</div><div class='add'>+	  engine in the SJA1105 DSA driver, which is controlled using a</div><div class='add'>+	  hardware offload of the tc-tqprio qdisc.</div><div class='add'>+</div><div class='add'>+config NET_DSA_SJA1105_VL</div><div class='add'>+	bool "Support for Virtual Links on NXP SJA1105"</div><div class='add'>+	depends on NET_DSA_SJA1105_TAS</div><div class='add'>+	help</div><div class='add'>+	  This enables support for flow classification using capable devices</div><div class='add'>+	  (SJA1105T, SJA1105Q, SJA1105S). The following actions are supported:</div><div class='add'>+	  - redirect, trap, drop</div><div class='add'>+	  - time-based ingress policing, via the tc-gate action</div><div class='head'>diff --git a/drivers/net/dsa/sja1105/Makefile b/drivers/net/dsa/sja1105/Makefile<br/>new file mode 100644<br/>index 000000000000..40d69e6c0bae<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/sja1105/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/sja1105/Makefile</a></div><div class='hunk'>@@ -0,0 +1,25 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+obj-$(CONFIG_NET_DSA_SJA1105) += sja1105.o</div><div class='add'>+</div><div class='add'>+sja1105-objs := \</div><div class='add'>+    sja1105_spi.o \</div><div class='add'>+    sja1105_main.o \</div><div class='add'>+    sja1105_mdio.o \</div><div class='add'>+    sja1105_flower.o \</div><div class='add'>+    sja1105_ethtool.o \</div><div class='add'>+    sja1105_devlink.o \</div><div class='add'>+    sja1105_clocking.o \</div><div class='add'>+    sja1105_static_config.o \</div><div class='add'>+    sja1105_dynamic_config.o \</div><div class='add'>+</div><div class='add'>+ifdef CONFIG_NET_DSA_SJA1105_PTP</div><div class='add'>+sja1105-objs += sja1105_ptp.o</div><div class='add'>+endif</div><div class='add'>+</div><div class='add'>+ifdef CONFIG_NET_DSA_SJA1105_TAS</div><div class='add'>+sja1105-objs += sja1105_tas.o</div><div class='add'>+endif</div><div class='add'>+</div><div class='add'>+ifdef CONFIG_NET_DSA_SJA1105_VL</div><div class='add'>+sja1105-objs += sja1105_vl.o</div><div class='add'>+endif</div><div class='head'>diff --git a/drivers/net/dsa/sja1105/sja1105.h b/drivers/net/dsa/sja1105/sja1105.h<br/>new file mode 100644<br/>index 000000000000..dceb96ae9c83<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/sja1105/sja1105.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/sja1105/sja1105.h</a></div><div class='hunk'>@@ -0,0 +1,426 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) 2018, Sensor-Technik Wiedemann GmbH</div><div class='add'>+ * Copyright (c) 2018-2019, Vladimir Oltean &lt;olteanv@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+#ifndef _SJA1105_H</div><div class='add'>+#define _SJA1105_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/ptp_clock_kernel.h&gt;</div><div class='add'>+#include &lt;linux/timecounter.h&gt;</div><div class='add'>+#include &lt;linux/dsa/sja1105.h&gt;</div><div class='add'>+#include &lt;linux/dsa/8021q.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+#include &lt;linux/mutex.h&gt;</div><div class='add'>+#include "sja1105_static_config.h"</div><div class='add'>+</div><div class='add'>+#define SJA1105ET_FDB_BIN_SIZE		4</div><div class='add'>+/* The hardware value is in multiples of 10 ms.</div><div class='add'>+ * The passed parameter is in multiples of 1 ms.</div><div class='add'>+ */</div><div class='add'>+#define SJA1105_AGEING_TIME_MS(ms)	((ms) / 10)</div><div class='add'>+#define SJA1105_NUM_L2_POLICERS		SJA1110_MAX_L2_POLICING_COUNT</div><div class='add'>+</div><div class='add'>+/* Calculated assuming 1Gbps, where the clock has 125 MHz (8 ns period)</div><div class='add'>+ * To avoid floating point operations, we'll multiply the degrees by 10</div><div class='add'>+ * to get a "phase" and get 1 decimal point precision.</div><div class='add'>+ */</div><div class='add'>+#define SJA1105_RGMII_DELAY_PS_TO_PHASE(ps) \</div><div class='add'>+	(((ps) * 360) / 800)</div><div class='add'>+#define SJA1105_RGMII_DELAY_PHASE_TO_PS(phase) \</div><div class='add'>+	((800 * (phase)) / 360)</div><div class='add'>+#define SJA1105_RGMII_DELAY_PHASE_TO_HW(phase) \</div><div class='add'>+	(((phase) - 738) / 9)</div><div class='add'>+#define SJA1105_RGMII_DELAY_PS_TO_HW(ps) \</div><div class='add'>+	SJA1105_RGMII_DELAY_PHASE_TO_HW(SJA1105_RGMII_DELAY_PS_TO_PHASE(ps))</div><div class='add'>+</div><div class='add'>+/* Valid range in degrees is a value between 73.8 and 101.7</div><div class='add'>+ * in 0.9 degree increments</div><div class='add'>+ */</div><div class='add'>+#define SJA1105_RGMII_DELAY_MIN_PS \</div><div class='add'>+	SJA1105_RGMII_DELAY_PHASE_TO_PS(738)</div><div class='add'>+#define SJA1105_RGMII_DELAY_MAX_PS \</div><div class='add'>+	SJA1105_RGMII_DELAY_PHASE_TO_PS(1017)</div><div class='add'>+</div><div class='add'>+typedef enum {</div><div class='add'>+	SPI_READ = 0,</div><div class='add'>+	SPI_WRITE = 1,</div><div class='add'>+} sja1105_spi_rw_mode_t;</div><div class='add'>+</div><div class='add'>+#include "sja1105_tas.h"</div><div class='add'>+#include "sja1105_ptp.h"</div><div class='add'>+</div><div class='add'>+enum sja1105_stats_area {</div><div class='add'>+	MAC,</div><div class='add'>+	HL1,</div><div class='add'>+	HL2,</div><div class='add'>+	ETHER,</div><div class='add'>+	__MAX_SJA1105_STATS_AREA,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Keeps the different addresses between E/T and P/Q/R/S */</div><div class='add'>+struct sja1105_regs {</div><div class='add'>+	u64 device_id;</div><div class='add'>+	u64 prod_id;</div><div class='add'>+	u64 status;</div><div class='add'>+	u64 port_control;</div><div class='add'>+	u64 rgu;</div><div class='add'>+	u64 vl_status;</div><div class='add'>+	u64 config;</div><div class='add'>+	u64 rmii_pll1;</div><div class='add'>+	u64 ptppinst;</div><div class='add'>+	u64 ptppindur;</div><div class='add'>+	u64 ptp_control;</div><div class='add'>+	u64 ptpclkval;</div><div class='add'>+	u64 ptpclkrate;</div><div class='add'>+	u64 ptpclkcorp;</div><div class='add'>+	u64 ptpsyncts;</div><div class='add'>+	u64 ptpschtm;</div><div class='add'>+	u64 ptpegr_ts[SJA1105_MAX_NUM_PORTS];</div><div class='add'>+	u64 pad_mii_tx[SJA1105_MAX_NUM_PORTS];</div><div class='add'>+	u64 pad_mii_rx[SJA1105_MAX_NUM_PORTS];</div><div class='add'>+	u64 pad_mii_id[SJA1105_MAX_NUM_PORTS];</div><div class='add'>+	u64 cgu_idiv[SJA1105_MAX_NUM_PORTS];</div><div class='add'>+	u64 mii_tx_clk[SJA1105_MAX_NUM_PORTS];</div><div class='add'>+	u64 mii_rx_clk[SJA1105_MAX_NUM_PORTS];</div><div class='add'>+	u64 mii_ext_tx_clk[SJA1105_MAX_NUM_PORTS];</div><div class='add'>+	u64 mii_ext_rx_clk[SJA1105_MAX_NUM_PORTS];</div><div class='add'>+	u64 rgmii_tx_clk[SJA1105_MAX_NUM_PORTS];</div><div class='add'>+	u64 rmii_ref_clk[SJA1105_MAX_NUM_PORTS];</div><div class='add'>+	u64 rmii_ext_tx_clk[SJA1105_MAX_NUM_PORTS];</div><div class='add'>+	u64 stats[__MAX_SJA1105_STATS_AREA][SJA1105_MAX_NUM_PORTS];</div><div class='add'>+	u64 mdio_100base_tx;</div><div class='add'>+	u64 mdio_100base_t1;</div><div class='add'>+	u64 pcs_base[SJA1105_MAX_NUM_PORTS];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1105_mdio_private {</div><div class='add'>+	struct sja1105_private *priv;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	SJA1105_SPEED_AUTO,</div><div class='add'>+	SJA1105_SPEED_10MBPS,</div><div class='add'>+	SJA1105_SPEED_100MBPS,</div><div class='add'>+	SJA1105_SPEED_1000MBPS,</div><div class='add'>+	SJA1105_SPEED_2500MBPS,</div><div class='add'>+	SJA1105_SPEED_MAX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum sja1105_internal_phy_t {</div><div class='add'>+	SJA1105_NO_PHY		= 0,</div><div class='add'>+	SJA1105_PHY_BASE_TX,</div><div class='add'>+	SJA1105_PHY_BASE_T1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1105_info {</div><div class='add'>+	u64 device_id;</div><div class='add'>+	/* Needed for distinction between P and R, and between Q and S</div><div class='add'>+	 * (since the parts with/without SGMII share the same</div><div class='add'>+	 * switch core and device_id)</div><div class='add'>+	 */</div><div class='add'>+	u64 part_no;</div><div class='add'>+	/* E/T and P/Q/R/S have partial timestamps of different sizes.</div><div class='add'>+	 * They must be reconstructed on both families anyway to get the full</div><div class='add'>+	 * 64-bit values back.</div><div class='add'>+	 */</div><div class='add'>+	int ptp_ts_bits;</div><div class='add'>+	/* Also SPI commands are of different sizes to retrieve</div><div class='add'>+	 * the egress timestamps.</div><div class='add'>+	 */</div><div class='add'>+	int ptpegr_ts_bytes;</div><div class='add'>+	int num_cbs_shapers;</div><div class='add'>+	int max_frame_mem;</div><div class='add'>+	int num_ports;</div><div class='add'>+	bool multiple_cascade_ports;</div><div class='add'>+	/* Every {port, TXQ} has its own CBS shaper */</div><div class='add'>+	bool fixed_cbs_mapping;</div><div class='add'>+	enum dsa_tag_protocol tag_proto;</div><div class='add'>+	const struct sja1105_dynamic_table_ops *dyn_ops;</div><div class='add'>+	const struct sja1105_table_ops *static_ops;</div><div class='add'>+	const struct sja1105_regs *regs;</div><div class='add'>+	bool can_limit_mcast_flood;</div><div class='add'>+	int (*reset_cmd)(struct dsa_switch *ds);</div><div class='add'>+	int (*setup_rgmii_delay)(const void *ctx, int port);</div><div class='add'>+	/* Prototypes from include/net/dsa.h */</div><div class='add'>+	int (*fdb_add_cmd)(struct dsa_switch *ds, int port,</div><div class='add'>+			   const unsigned char *addr, u16 vid);</div><div class='add'>+	int (*fdb_del_cmd)(struct dsa_switch *ds, int port,</div><div class='add'>+			   const unsigned char *addr, u16 vid);</div><div class='add'>+	void (*ptp_cmd_packing)(u8 *buf, struct sja1105_ptp_cmd *cmd,</div><div class='add'>+				enum packing_op op);</div><div class='add'>+	bool (*rxtstamp)(struct dsa_switch *ds, int port, struct sk_buff *skb);</div><div class='add'>+	void (*txtstamp)(struct dsa_switch *ds, int port, struct sk_buff *skb);</div><div class='add'>+	int (*clocking_setup)(struct sja1105_private *priv);</div><div class='add'>+	int (*pcs_mdio_read_c45)(struct mii_bus *bus, int phy, int mmd,</div><div class='add'>+				 int reg);</div><div class='add'>+	int (*pcs_mdio_write_c45)(struct mii_bus *bus, int phy, int mmd,</div><div class='add'>+				  int reg, u16 val);</div><div class='add'>+	int (*disable_microcontroller)(struct sja1105_private *priv);</div><div class='add'>+	const char *name;</div><div class='add'>+	bool supports_mii[SJA1105_MAX_NUM_PORTS];</div><div class='add'>+	bool supports_rmii[SJA1105_MAX_NUM_PORTS];</div><div class='add'>+	bool supports_rgmii[SJA1105_MAX_NUM_PORTS];</div><div class='add'>+	bool supports_sgmii[SJA1105_MAX_NUM_PORTS];</div><div class='add'>+	bool supports_2500basex[SJA1105_MAX_NUM_PORTS];</div><div class='add'>+	enum sja1105_internal_phy_t internal_phy[SJA1105_MAX_NUM_PORTS];</div><div class='add'>+	const u64 port_speed[SJA1105_SPEED_MAX];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum sja1105_key_type {</div><div class='add'>+	SJA1105_KEY_BCAST,</div><div class='add'>+	SJA1105_KEY_TC,</div><div class='add'>+	SJA1105_KEY_VLAN_UNAWARE_VL,</div><div class='add'>+	SJA1105_KEY_VLAN_AWARE_VL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1105_key {</div><div class='add'>+	enum sja1105_key_type type;</div><div class='add'>+</div><div class='add'>+	union {</div><div class='add'>+		/* SJA1105_KEY_TC */</div><div class='add'>+		struct {</div><div class='add'>+			int pcp;</div><div class='add'>+		} tc;</div><div class='add'>+</div><div class='add'>+		/* SJA1105_KEY_VLAN_UNAWARE_VL */</div><div class='add'>+		/* SJA1105_KEY_VLAN_AWARE_VL */</div><div class='add'>+		struct {</div><div class='add'>+			u64 dmac;</div><div class='add'>+			u16 vid;</div><div class='add'>+			u16 pcp;</div><div class='add'>+		} vl;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum sja1105_rule_type {</div><div class='add'>+	SJA1105_RULE_BCAST_POLICER,</div><div class='add'>+	SJA1105_RULE_TC_POLICER,</div><div class='add'>+	SJA1105_RULE_VL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum sja1105_vl_type {</div><div class='add'>+	SJA1105_VL_NONCRITICAL,</div><div class='add'>+	SJA1105_VL_RATE_CONSTRAINED,</div><div class='add'>+	SJA1105_VL_TIME_TRIGGERED,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1105_rule {</div><div class='add'>+	struct list_head list;</div><div class='add'>+	unsigned long cookie;</div><div class='add'>+	unsigned long port_mask;</div><div class='add'>+	struct sja1105_key key;</div><div class='add'>+	enum sja1105_rule_type type;</div><div class='add'>+</div><div class='add'>+	/* Action */</div><div class='add'>+	union {</div><div class='add'>+		/* SJA1105_RULE_BCAST_POLICER */</div><div class='add'>+		struct {</div><div class='add'>+			int sharindx;</div><div class='add'>+		} bcast_pol;</div><div class='add'>+</div><div class='add'>+		/* SJA1105_RULE_TC_POLICER */</div><div class='add'>+		struct {</div><div class='add'>+			int sharindx;</div><div class='add'>+		} tc_pol;</div><div class='add'>+</div><div class='add'>+		/* SJA1105_RULE_VL */</div><div class='add'>+		struct {</div><div class='add'>+			enum sja1105_vl_type type;</div><div class='add'>+			unsigned long destports;</div><div class='add'>+			int sharindx;</div><div class='add'>+			int maxlen;</div><div class='add'>+			int ipv;</div><div class='add'>+			u64 base_time;</div><div class='add'>+			u64 cycle_time;</div><div class='add'>+			int num_entries;</div><div class='add'>+			struct action_gate_entry *entries;</div><div class='add'>+			struct flow_stats stats;</div><div class='add'>+		} vl;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1105_flow_block {</div><div class='add'>+	struct list_head rules;</div><div class='add'>+	bool l2_policer_used[SJA1105_NUM_L2_POLICERS];</div><div class='add'>+	int num_virtual_links;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1105_private {</div><div class='add'>+	struct sja1105_static_config static_config;</div><div class='add'>+	int rgmii_rx_delay_ps[SJA1105_MAX_NUM_PORTS];</div><div class='add'>+	int rgmii_tx_delay_ps[SJA1105_MAX_NUM_PORTS];</div><div class='add'>+	phy_interface_t phy_mode[SJA1105_MAX_NUM_PORTS];</div><div class='add'>+	bool fixed_link[SJA1105_MAX_NUM_PORTS];</div><div class='add'>+	unsigned long ucast_egress_floods;</div><div class='add'>+	unsigned long bcast_egress_floods;</div><div class='add'>+	unsigned long hwts_tx_en;</div><div class='add'>+	unsigned long hwts_rx_en;</div><div class='add'>+	const struct sja1105_info *info;</div><div class='add'>+	size_t max_xfer_len;</div><div class='add'>+	struct spi_device *spidev;</div><div class='add'>+	struct dsa_switch *ds;</div><div class='add'>+	u16 bridge_pvid[SJA1105_MAX_NUM_PORTS];</div><div class='add'>+	u16 tag_8021q_pvid[SJA1105_MAX_NUM_PORTS];</div><div class='add'>+	struct sja1105_flow_block flow_block;</div><div class='add'>+	/* Serializes transmission of management frames so that</div><div class='add'>+	 * the switch doesn't confuse them with one another.</div><div class='add'>+	 */</div><div class='add'>+	struct mutex mgmt_lock;</div><div class='add'>+	/* Serializes accesses to the FDB */</div><div class='add'>+	struct mutex fdb_lock;</div><div class='add'>+	/* PTP two-step TX timestamp ID, and its serialization lock */</div><div class='add'>+	spinlock_t ts_id_lock;</div><div class='add'>+	u8 ts_id;</div><div class='add'>+	/* Serializes access to the dynamic config interface */</div><div class='add'>+	struct mutex dynamic_config_lock;</div><div class='add'>+	struct devlink_region **regions;</div><div class='add'>+	struct sja1105_cbs_entry *cbs;</div><div class='add'>+	struct mii_bus *mdio_base_t1;</div><div class='add'>+	struct mii_bus *mdio_base_tx;</div><div class='add'>+	struct mii_bus *mdio_pcs;</div><div class='add'>+	struct phylink_pcs *pcs[SJA1105_MAX_NUM_PORTS];</div><div class='add'>+	struct sja1105_ptp_data ptp_data;</div><div class='add'>+	struct sja1105_tas_data tas_data;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#include "sja1105_dynamic_config.h"</div><div class='add'>+</div><div class='add'>+struct sja1105_spi_message {</div><div class='add'>+	u64 access;</div><div class='add'>+	u64 read_count;</div><div class='add'>+	u64 address;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* From sja1105_main.c */</div><div class='add'>+enum sja1105_reset_reason {</div><div class='add'>+	SJA1105_VLAN_FILTERING = 0,</div><div class='add'>+	SJA1105_AGEING_TIME,</div><div class='add'>+	SJA1105_SCHEDULING,</div><div class='add'>+	SJA1105_BEST_EFFORT_POLICING,</div><div class='add'>+	SJA1105_VIRTUAL_LINKS,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int sja1105_static_config_reload(struct sja1105_private *priv,</div><div class='add'>+				 enum sja1105_reset_reason reason);</div><div class='add'>+int sja1105_vlan_filtering(struct dsa_switch *ds, int port, bool enabled,</div><div class='add'>+			   struct netlink_ext_ack *extack);</div><div class='add'>+void sja1105_frame_memory_partitioning(struct sja1105_private *priv);</div><div class='add'>+</div><div class='add'>+/* From sja1105_mdio.c */</div><div class='add'>+int sja1105_mdiobus_register(struct dsa_switch *ds);</div><div class='add'>+void sja1105_mdiobus_unregister(struct dsa_switch *ds);</div><div class='add'>+int sja1105_pcs_mdio_read_c45(struct mii_bus *bus, int phy, int mmd, int reg);</div><div class='add'>+int sja1105_pcs_mdio_write_c45(struct mii_bus *bus, int phy, int mmd, int reg,</div><div class='add'>+			       u16 val);</div><div class='add'>+int sja1110_pcs_mdio_read_c45(struct mii_bus *bus, int phy, int mmd, int reg);</div><div class='add'>+int sja1110_pcs_mdio_write_c45(struct mii_bus *bus, int phy, int mmd, int reg,</div><div class='add'>+			       u16 val);</div><div class='add'>+</div><div class='add'>+/* From sja1105_devlink.c */</div><div class='add'>+int sja1105_devlink_setup(struct dsa_switch *ds);</div><div class='add'>+void sja1105_devlink_teardown(struct dsa_switch *ds);</div><div class='add'>+int sja1105_devlink_info_get(struct dsa_switch *ds,</div><div class='add'>+			     struct devlink_info_req *req,</div><div class='add'>+			     struct netlink_ext_ack *extack);</div><div class='add'>+</div><div class='add'>+/* From sja1105_spi.c */</div><div class='add'>+int sja1105_xfer_buf(const struct sja1105_private *priv,</div><div class='add'>+		     sja1105_spi_rw_mode_t rw, u64 reg_addr,</div><div class='add'>+		     u8 *buf, size_t len);</div><div class='add'>+int sja1105_xfer_u32(const struct sja1105_private *priv,</div><div class='add'>+		     sja1105_spi_rw_mode_t rw, u64 reg_addr, u32 *value,</div><div class='add'>+		     struct ptp_system_timestamp *ptp_sts);</div><div class='add'>+int sja1105_xfer_u64(const struct sja1105_private *priv,</div><div class='add'>+		     sja1105_spi_rw_mode_t rw, u64 reg_addr, u64 *value,</div><div class='add'>+		     struct ptp_system_timestamp *ptp_sts);</div><div class='add'>+int static_config_buf_prepare_for_upload(struct sja1105_private *priv,</div><div class='add'>+					 void *config_buf, int buf_len);</div><div class='add'>+int sja1105_static_config_upload(struct sja1105_private *priv);</div><div class='add'>+int sja1105_inhibit_tx(const struct sja1105_private *priv,</div><div class='add'>+		       unsigned long port_bitmap, bool tx_inhibited);</div><div class='add'>+</div><div class='add'>+extern const struct sja1105_info sja1105e_info;</div><div class='add'>+extern const struct sja1105_info sja1105t_info;</div><div class='add'>+extern const struct sja1105_info sja1105p_info;</div><div class='add'>+extern const struct sja1105_info sja1105q_info;</div><div class='add'>+extern const struct sja1105_info sja1105r_info;</div><div class='add'>+extern const struct sja1105_info sja1105s_info;</div><div class='add'>+extern const struct sja1105_info sja1110a_info;</div><div class='add'>+extern const struct sja1105_info sja1110b_info;</div><div class='add'>+extern const struct sja1105_info sja1110c_info;</div><div class='add'>+extern const struct sja1105_info sja1110d_info;</div><div class='add'>+</div><div class='add'>+/* From sja1105_clocking.c */</div><div class='add'>+</div><div class='add'>+typedef enum {</div><div class='add'>+	XMII_MAC = 0,</div><div class='add'>+	XMII_PHY = 1,</div><div class='add'>+} sja1105_mii_role_t;</div><div class='add'>+</div><div class='add'>+typedef enum {</div><div class='add'>+	XMII_MODE_MII		= 0,</div><div class='add'>+	XMII_MODE_RMII		= 1,</div><div class='add'>+	XMII_MODE_RGMII		= 2,</div><div class='add'>+	XMII_MODE_SGMII		= 3,</div><div class='add'>+} sja1105_phy_interface_t;</div><div class='add'>+</div><div class='add'>+int sja1105pqrs_setup_rgmii_delay(const void *ctx, int port);</div><div class='add'>+int sja1110_setup_rgmii_delay(const void *ctx, int port);</div><div class='add'>+int sja1105_clocking_setup_port(struct sja1105_private *priv, int port);</div><div class='add'>+int sja1105_clocking_setup(struct sja1105_private *priv);</div><div class='add'>+int sja1110_disable_microcontroller(struct sja1105_private *priv);</div><div class='add'>+</div><div class='add'>+/* From sja1105_ethtool.c */</div><div class='add'>+void sja1105_get_ethtool_stats(struct dsa_switch *ds, int port, u64 *data);</div><div class='add'>+void sja1105_get_strings(struct dsa_switch *ds, int port,</div><div class='add'>+			 u32 stringset, u8 *data);</div><div class='add'>+int sja1105_get_sset_count(struct dsa_switch *ds, int port, int sset);</div><div class='add'>+</div><div class='add'>+/* From sja1105_dynamic_config.c */</div><div class='add'>+int sja1105_dynamic_config_read(struct sja1105_private *priv,</div><div class='add'>+				enum sja1105_blk_idx blk_idx,</div><div class='add'>+				int index, void *entry);</div><div class='add'>+int sja1105_dynamic_config_write(struct sja1105_private *priv,</div><div class='add'>+				 enum sja1105_blk_idx blk_idx,</div><div class='add'>+				 int index, void *entry, bool keep);</div><div class='add'>+</div><div class='add'>+enum sja1105_iotag {</div><div class='add'>+	SJA1105_C_TAG = 0, /* Inner VLAN header */</div><div class='add'>+	SJA1105_S_TAG = 1, /* Outer VLAN header */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum sja1110_vlan_type {</div><div class='add'>+	SJA1110_VLAN_INVALID = 0,</div><div class='add'>+	SJA1110_VLAN_C_TAG = 1, /* Single inner VLAN tag */</div><div class='add'>+	SJA1110_VLAN_S_TAG = 2, /* Single outer VLAN tag */</div><div class='add'>+	SJA1110_VLAN_D_TAG = 3, /* Double tagged, use outer tag for lookup */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum sja1110_shaper_type {</div><div class='add'>+	SJA1110_LEAKY_BUCKET_SHAPER = 0,</div><div class='add'>+	SJA1110_CBS_SHAPER = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+u8 sja1105et_fdb_hash(struct sja1105_private *priv, const u8 *addr, u16 vid);</div><div class='add'>+int sja1105et_fdb_add(struct dsa_switch *ds, int port,</div><div class='add'>+		      const unsigned char *addr, u16 vid);</div><div class='add'>+int sja1105et_fdb_del(struct dsa_switch *ds, int port,</div><div class='add'>+		      const unsigned char *addr, u16 vid);</div><div class='add'>+int sja1105pqrs_fdb_add(struct dsa_switch *ds, int port,</div><div class='add'>+			const unsigned char *addr, u16 vid);</div><div class='add'>+int sja1105pqrs_fdb_del(struct dsa_switch *ds, int port,</div><div class='add'>+			const unsigned char *addr, u16 vid);</div><div class='add'>+</div><div class='add'>+/* From sja1105_flower.c */</div><div class='add'>+int sja1105_cls_flower_del(struct dsa_switch *ds, int port,</div><div class='add'>+			   struct flow_cls_offload *cls, bool ingress);</div><div class='add'>+int sja1105_cls_flower_add(struct dsa_switch *ds, int port,</div><div class='add'>+			   struct flow_cls_offload *cls, bool ingress);</div><div class='add'>+int sja1105_cls_flower_stats(struct dsa_switch *ds, int port,</div><div class='add'>+			     struct flow_cls_offload *cls, bool ingress);</div><div class='add'>+void sja1105_flower_setup(struct dsa_switch *ds);</div><div class='add'>+void sja1105_flower_teardown(struct dsa_switch *ds);</div><div class='add'>+struct sja1105_rule *sja1105_rule_find(struct sja1105_private *priv,</div><div class='add'>+				       unsigned long cookie);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/dsa/sja1105/sja1105_clocking.c b/drivers/net/dsa/sja1105/sja1105_clocking.c<br/>new file mode 100644<br/>index 000000000000..08a3e7b96254<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/sja1105/sja1105_clocking.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/sja1105/sja1105_clocking.c</a></div><div class='hunk'>@@ -0,0 +1,860 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/* Copyright 2016-2018 NXP</div><div class='add'>+ * Copyright (c) 2018-2019, Vladimir Oltean &lt;olteanv@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/packing.h&gt;</div><div class='add'>+#include "sja1105.h"</div><div class='add'>+</div><div class='add'>+#define SJA1105_SIZE_CGU_CMD	4</div><div class='add'>+#define SJA1110_BASE_MCSS_CLK	SJA1110_CGU_ADDR(0x70)</div><div class='add'>+#define SJA1110_BASE_TIMER_CLK	SJA1110_CGU_ADDR(0x74)</div><div class='add'>+</div><div class='add'>+/* Common structure for CFG_PAD_MIIx_RX and CFG_PAD_MIIx_TX */</div><div class='add'>+struct sja1105_cfg_pad_mii {</div><div class='add'>+	u64 d32_os;</div><div class='add'>+	u64 d32_ih;</div><div class='add'>+	u64 d32_ipud;</div><div class='add'>+	u64 d10_ih;</div><div class='add'>+	u64 d10_os;</div><div class='add'>+	u64 d10_ipud;</div><div class='add'>+	u64 ctrl_os;</div><div class='add'>+	u64 ctrl_ih;</div><div class='add'>+	u64 ctrl_ipud;</div><div class='add'>+	u64 clk_os;</div><div class='add'>+	u64 clk_ih;</div><div class='add'>+	u64 clk_ipud;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1105_cfg_pad_mii_id {</div><div class='add'>+	u64 rxc_stable_ovr;</div><div class='add'>+	u64 rxc_delay;</div><div class='add'>+	u64 rxc_bypass;</div><div class='add'>+	u64 rxc_pd;</div><div class='add'>+	u64 txc_stable_ovr;</div><div class='add'>+	u64 txc_delay;</div><div class='add'>+	u64 txc_bypass;</div><div class='add'>+	u64 txc_pd;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* UM10944 Table 82.</div><div class='add'>+ * IDIV_0_C to IDIV_4_C control registers</div><div class='add'>+ * (addr. 10000Bh to 10000Fh)</div><div class='add'>+ */</div><div class='add'>+struct sja1105_cgu_idiv {</div><div class='add'>+	u64 clksrc;</div><div class='add'>+	u64 autoblock;</div><div class='add'>+	u64 idiv;</div><div class='add'>+	u64 pd;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* PLL_1_C control register</div><div class='add'>+ *</div><div class='add'>+ * SJA1105 E/T: UM10944 Table 81 (address 10000Ah)</div><div class='add'>+ * SJA1105 P/Q/R/S: UM11040 Table 116 (address 10000Ah)</div><div class='add'>+ */</div><div class='add'>+struct sja1105_cgu_pll_ctrl {</div><div class='add'>+	u64 pllclksrc;</div><div class='add'>+	u64 msel;</div><div class='add'>+	u64 autoblock;</div><div class='add'>+	u64 psel;</div><div class='add'>+	u64 direct;</div><div class='add'>+	u64 fbsel;</div><div class='add'>+	u64 bypass;</div><div class='add'>+	u64 pd;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1110_cgu_outclk {</div><div class='add'>+	u64 clksrc;</div><div class='add'>+	u64 autoblock;</div><div class='add'>+	u64 pd;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	CLKSRC_MII0_TX_CLK	= 0x00,</div><div class='add'>+	CLKSRC_MII0_RX_CLK	= 0x01,</div><div class='add'>+	CLKSRC_MII1_TX_CLK	= 0x02,</div><div class='add'>+	CLKSRC_MII1_RX_CLK	= 0x03,</div><div class='add'>+	CLKSRC_MII2_TX_CLK	= 0x04,</div><div class='add'>+	CLKSRC_MII2_RX_CLK	= 0x05,</div><div class='add'>+	CLKSRC_MII3_TX_CLK	= 0x06,</div><div class='add'>+	CLKSRC_MII3_RX_CLK	= 0x07,</div><div class='add'>+	CLKSRC_MII4_TX_CLK	= 0x08,</div><div class='add'>+	CLKSRC_MII4_RX_CLK	= 0x09,</div><div class='add'>+	CLKSRC_PLL0		= 0x0B,</div><div class='add'>+	CLKSRC_PLL1		= 0x0E,</div><div class='add'>+	CLKSRC_IDIV0		= 0x11,</div><div class='add'>+	CLKSRC_IDIV1		= 0x12,</div><div class='add'>+	CLKSRC_IDIV2		= 0x13,</div><div class='add'>+	CLKSRC_IDIV3		= 0x14,</div><div class='add'>+	CLKSRC_IDIV4		= 0x15,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* UM10944 Table 83.</div><div class='add'>+ * MIIx clock control registers 1 to 30</div><div class='add'>+ * (addresses 100013h to 100035h)</div><div class='add'>+ */</div><div class='add'>+struct sja1105_cgu_mii_ctrl {</div><div class='add'>+	u64 clksrc;</div><div class='add'>+	u64 autoblock;</div><div class='add'>+	u64 pd;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void sja1105_cgu_idiv_packing(void *buf, struct sja1105_cgu_idiv *idiv,</div><div class='add'>+				     enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const int size = 4;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;idiv-&gt;clksrc,    28, 24, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;idiv-&gt;autoblock, 11, 11, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;idiv-&gt;idiv,       5,  2, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;idiv-&gt;pd,         0,  0, size, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_cgu_idiv_config(struct sja1105_private *priv, int port,</div><div class='add'>+				   bool enabled, int factor)</div><div class='add'>+{</div><div class='add'>+	const struct sja1105_regs *regs = priv-&gt;info-&gt;regs;</div><div class='add'>+	struct device *dev = priv-&gt;ds-&gt;dev;</div><div class='add'>+	struct sja1105_cgu_idiv idiv;</div><div class='add'>+	u8 packed_buf[SJA1105_SIZE_CGU_CMD] = {0};</div><div class='add'>+</div><div class='add'>+	if (regs-&gt;cgu_idiv[port] == SJA1105_RSV_ADDR)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (enabled &amp;&amp; factor != 1 &amp;&amp; factor != 10) {</div><div class='add'>+		dev_err(dev, "idiv factor must be 1 or 10\n");</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Payload for packed_buf */</div><div class='add'>+	idiv.clksrc    = 0x0A;            /* 25MHz */</div><div class='add'>+	idiv.autoblock = 1;               /* Block clk automatically */</div><div class='add'>+	idiv.idiv      = factor - 1;      /* Divide by 1 or 10 */</div><div class='add'>+	idiv.pd        = enabled ? 0 : 1; /* Power down? */</div><div class='add'>+	sja1105_cgu_idiv_packing(packed_buf, &amp;idiv, PACK);</div><div class='add'>+</div><div class='add'>+	return sja1105_xfer_buf(priv, SPI_WRITE, regs-&gt;cgu_idiv[port],</div><div class='add'>+				packed_buf, SJA1105_SIZE_CGU_CMD);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+sja1105_cgu_mii_control_packing(void *buf, struct sja1105_cgu_mii_ctrl *cmd,</div><div class='add'>+				enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const int size = 4;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;clksrc,    28, 24, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;autoblock, 11, 11, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;pd,         0,  0, size, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_cgu_mii_tx_clk_config(struct sja1105_private *priv,</div><div class='add'>+					 int port, sja1105_mii_role_t role)</div><div class='add'>+{</div><div class='add'>+	const struct sja1105_regs *regs = priv-&gt;info-&gt;regs;</div><div class='add'>+	struct sja1105_cgu_mii_ctrl mii_tx_clk;</div><div class='add'>+	static const int mac_clk_sources[] = {</div><div class='add'>+		CLKSRC_MII0_TX_CLK,</div><div class='add'>+		CLKSRC_MII1_TX_CLK,</div><div class='add'>+		CLKSRC_MII2_TX_CLK,</div><div class='add'>+		CLKSRC_MII3_TX_CLK,</div><div class='add'>+		CLKSRC_MII4_TX_CLK,</div><div class='add'>+	};</div><div class='add'>+	static const int phy_clk_sources[] = {</div><div class='add'>+		CLKSRC_IDIV0,</div><div class='add'>+		CLKSRC_IDIV1,</div><div class='add'>+		CLKSRC_IDIV2,</div><div class='add'>+		CLKSRC_IDIV3,</div><div class='add'>+		CLKSRC_IDIV4,</div><div class='add'>+	};</div><div class='add'>+	u8 packed_buf[SJA1105_SIZE_CGU_CMD] = {0};</div><div class='add'>+	int clksrc;</div><div class='add'>+</div><div class='add'>+	if (regs-&gt;mii_tx_clk[port] == SJA1105_RSV_ADDR)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (role == XMII_MAC)</div><div class='add'>+		clksrc = mac_clk_sources[port];</div><div class='add'>+	else</div><div class='add'>+		clksrc = phy_clk_sources[port];</div><div class='add'>+</div><div class='add'>+	/* Payload for packed_buf */</div><div class='add'>+	mii_tx_clk.clksrc    = clksrc;</div><div class='add'>+	mii_tx_clk.autoblock = 1;  /* Autoblock clk while changing clksrc */</div><div class='add'>+	mii_tx_clk.pd        = 0;  /* Power Down off =&gt; enabled */</div><div class='add'>+	sja1105_cgu_mii_control_packing(packed_buf, &amp;mii_tx_clk, PACK);</div><div class='add'>+</div><div class='add'>+	return sja1105_xfer_buf(priv, SPI_WRITE, regs-&gt;mii_tx_clk[port],</div><div class='add'>+				packed_buf, SJA1105_SIZE_CGU_CMD);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+sja1105_cgu_mii_rx_clk_config(struct sja1105_private *priv, int port)</div><div class='add'>+{</div><div class='add'>+	const struct sja1105_regs *regs = priv-&gt;info-&gt;regs;</div><div class='add'>+	struct sja1105_cgu_mii_ctrl mii_rx_clk;</div><div class='add'>+	u8 packed_buf[SJA1105_SIZE_CGU_CMD] = {0};</div><div class='add'>+	static const int clk_sources[] = {</div><div class='add'>+		CLKSRC_MII0_RX_CLK,</div><div class='add'>+		CLKSRC_MII1_RX_CLK,</div><div class='add'>+		CLKSRC_MII2_RX_CLK,</div><div class='add'>+		CLKSRC_MII3_RX_CLK,</div><div class='add'>+		CLKSRC_MII4_RX_CLK,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	if (regs-&gt;mii_rx_clk[port] == SJA1105_RSV_ADDR)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Payload for packed_buf */</div><div class='add'>+	mii_rx_clk.clksrc    = clk_sources[port];</div><div class='add'>+	mii_rx_clk.autoblock = 1;  /* Autoblock clk while changing clksrc */</div><div class='add'>+	mii_rx_clk.pd        = 0;  /* Power Down off =&gt; enabled */</div><div class='add'>+	sja1105_cgu_mii_control_packing(packed_buf, &amp;mii_rx_clk, PACK);</div><div class='add'>+</div><div class='add'>+	return sja1105_xfer_buf(priv, SPI_WRITE, regs-&gt;mii_rx_clk[port],</div><div class='add'>+				packed_buf, SJA1105_SIZE_CGU_CMD);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+sja1105_cgu_mii_ext_tx_clk_config(struct sja1105_private *priv, int port)</div><div class='add'>+{</div><div class='add'>+	const struct sja1105_regs *regs = priv-&gt;info-&gt;regs;</div><div class='add'>+	struct sja1105_cgu_mii_ctrl mii_ext_tx_clk;</div><div class='add'>+	u8 packed_buf[SJA1105_SIZE_CGU_CMD] = {0};</div><div class='add'>+	static const int clk_sources[] = {</div><div class='add'>+		CLKSRC_IDIV0,</div><div class='add'>+		CLKSRC_IDIV1,</div><div class='add'>+		CLKSRC_IDIV2,</div><div class='add'>+		CLKSRC_IDIV3,</div><div class='add'>+		CLKSRC_IDIV4,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	if (regs-&gt;mii_ext_tx_clk[port] == SJA1105_RSV_ADDR)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Payload for packed_buf */</div><div class='add'>+	mii_ext_tx_clk.clksrc    = clk_sources[port];</div><div class='add'>+	mii_ext_tx_clk.autoblock = 1; /* Autoblock clk while changing clksrc */</div><div class='add'>+	mii_ext_tx_clk.pd        = 0; /* Power Down off =&gt; enabled */</div><div class='add'>+	sja1105_cgu_mii_control_packing(packed_buf, &amp;mii_ext_tx_clk, PACK);</div><div class='add'>+</div><div class='add'>+	return sja1105_xfer_buf(priv, SPI_WRITE, regs-&gt;mii_ext_tx_clk[port],</div><div class='add'>+				packed_buf, SJA1105_SIZE_CGU_CMD);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+sja1105_cgu_mii_ext_rx_clk_config(struct sja1105_private *priv, int port)</div><div class='add'>+{</div><div class='add'>+	const struct sja1105_regs *regs = priv-&gt;info-&gt;regs;</div><div class='add'>+	struct sja1105_cgu_mii_ctrl mii_ext_rx_clk;</div><div class='add'>+	u8 packed_buf[SJA1105_SIZE_CGU_CMD] = {0};</div><div class='add'>+	static const int clk_sources[] = {</div><div class='add'>+		CLKSRC_IDIV0,</div><div class='add'>+		CLKSRC_IDIV1,</div><div class='add'>+		CLKSRC_IDIV2,</div><div class='add'>+		CLKSRC_IDIV3,</div><div class='add'>+		CLKSRC_IDIV4,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	if (regs-&gt;mii_ext_rx_clk[port] == SJA1105_RSV_ADDR)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Payload for packed_buf */</div><div class='add'>+	mii_ext_rx_clk.clksrc    = clk_sources[port];</div><div class='add'>+	mii_ext_rx_clk.autoblock = 1; /* Autoblock clk while changing clksrc */</div><div class='add'>+	mii_ext_rx_clk.pd        = 0; /* Power Down off =&gt; enabled */</div><div class='add'>+	sja1105_cgu_mii_control_packing(packed_buf, &amp;mii_ext_rx_clk, PACK);</div><div class='add'>+</div><div class='add'>+	return sja1105_xfer_buf(priv, SPI_WRITE, regs-&gt;mii_ext_rx_clk[port],</div><div class='add'>+				packed_buf, SJA1105_SIZE_CGU_CMD);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_mii_clocking_setup(struct sja1105_private *priv, int port,</div><div class='add'>+				      sja1105_mii_role_t role)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = priv-&gt;ds-&gt;dev;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	dev_dbg(dev, "Configuring MII-%s clocking\n",</div><div class='add'>+		(role == XMII_MAC) ? "MAC" : "PHY");</div><div class='add'>+	/* If role is MAC, disable IDIV</div><div class='add'>+	 * If role is PHY, enable IDIV and configure for 1/1 divider</div><div class='add'>+	 */</div><div class='add'>+	rc = sja1105_cgu_idiv_config(priv, port, (role == XMII_PHY), 1);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	/* Configure CLKSRC of MII_TX_CLK_n</div><div class='add'>+	 *   * If role is MAC, select TX_CLK_n</div><div class='add'>+	 *   * If role is PHY, select IDIV_n</div><div class='add'>+	 */</div><div class='add'>+	rc = sja1105_cgu_mii_tx_clk_config(priv, port, role);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	/* Configure CLKSRC of MII_RX_CLK_n</div><div class='add'>+	 * Select RX_CLK_n</div><div class='add'>+	 */</div><div class='add'>+	rc = sja1105_cgu_mii_rx_clk_config(priv, port);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	if (role == XMII_PHY) {</div><div class='add'>+		/* Per MII spec, the PHY (which is us) drives the TX_CLK pin */</div><div class='add'>+</div><div class='add'>+		/* Configure CLKSRC of EXT_TX_CLK_n</div><div class='add'>+		 * Select IDIV_n</div><div class='add'>+		 */</div><div class='add'>+		rc = sja1105_cgu_mii_ext_tx_clk_config(priv, port);</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			return rc;</div><div class='add'>+</div><div class='add'>+		/* Configure CLKSRC of EXT_RX_CLK_n</div><div class='add'>+		 * Select IDIV_n</div><div class='add'>+		 */</div><div class='add'>+		rc = sja1105_cgu_mii_ext_rx_clk_config(priv, port);</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			return rc;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+sja1105_cgu_pll_control_packing(void *buf, struct sja1105_cgu_pll_ctrl *cmd,</div><div class='add'>+				enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const int size = 4;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;pllclksrc, 28, 24, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;msel,      23, 16, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;autoblock, 11, 11, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;psel,       9,  8, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;direct,     7,  7, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;fbsel,      6,  6, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;bypass,     1,  1, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;pd,         0,  0, size, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_cgu_rgmii_tx_clk_config(struct sja1105_private *priv,</div><div class='add'>+					   int port, u64 speed)</div><div class='add'>+{</div><div class='add'>+	const struct sja1105_regs *regs = priv-&gt;info-&gt;regs;</div><div class='add'>+	struct sja1105_cgu_mii_ctrl txc;</div><div class='add'>+	u8 packed_buf[SJA1105_SIZE_CGU_CMD] = {0};</div><div class='add'>+	int clksrc;</div><div class='add'>+</div><div class='add'>+	if (regs-&gt;rgmii_tx_clk[port] == SJA1105_RSV_ADDR)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (speed == priv-&gt;info-&gt;port_speed[SJA1105_SPEED_1000MBPS]) {</div><div class='add'>+		clksrc = CLKSRC_PLL0;</div><div class='add'>+	} else {</div><div class='add'>+		static const int clk_sources[] = {</div><div class='add'>+			CLKSRC_IDIV0,</div><div class='add'>+			CLKSRC_IDIV1,</div><div class='add'>+			CLKSRC_IDIV2,</div><div class='add'>+			CLKSRC_IDIV3,</div><div class='add'>+			CLKSRC_IDIV4,</div><div class='add'>+		};</div><div class='add'>+		clksrc = clk_sources[port];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* RGMII: 125MHz for 1000, 25MHz for 100, 2.5MHz for 10 */</div><div class='add'>+	txc.clksrc = clksrc;</div><div class='add'>+	/* Autoblock clk while changing clksrc */</div><div class='add'>+	txc.autoblock = 1;</div><div class='add'>+	/* Power Down off =&gt; enabled */</div><div class='add'>+	txc.pd = 0;</div><div class='add'>+	sja1105_cgu_mii_control_packing(packed_buf, &amp;txc, PACK);</div><div class='add'>+</div><div class='add'>+	return sja1105_xfer_buf(priv, SPI_WRITE, regs-&gt;rgmii_tx_clk[port],</div><div class='add'>+				packed_buf, SJA1105_SIZE_CGU_CMD);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* AGU */</div><div class='add'>+static void</div><div class='add'>+sja1105_cfg_pad_mii_packing(void *buf, struct sja1105_cfg_pad_mii *cmd,</div><div class='add'>+			    enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const int size = 4;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;d32_os,   28, 27, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;d32_ih,   26, 26, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;d32_ipud, 25, 24, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;d10_os,   20, 19, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;d10_ih,   18, 18, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;d10_ipud, 17, 16, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;ctrl_os,  12, 11, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;ctrl_ih,  10, 10, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;ctrl_ipud, 9,  8, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;clk_os,    4,  3, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;clk_ih,    2,  2, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;clk_ipud,  1,  0, size, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_rgmii_cfg_pad_tx_config(struct sja1105_private *priv,</div><div class='add'>+					   int port)</div><div class='add'>+{</div><div class='add'>+	const struct sja1105_regs *regs = priv-&gt;info-&gt;regs;</div><div class='add'>+	struct sja1105_cfg_pad_mii pad_mii_tx = {0};</div><div class='add'>+	u8 packed_buf[SJA1105_SIZE_CGU_CMD] = {0};</div><div class='add'>+</div><div class='add'>+	if (regs-&gt;pad_mii_tx[port] == SJA1105_RSV_ADDR)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Payload */</div><div class='add'>+	pad_mii_tx.d32_os    = 3; /* TXD[3:2] output stage: */</div><div class='add'>+				  /*          high noise/high speed */</div><div class='add'>+	pad_mii_tx.d10_os    = 3; /* TXD[1:0] output stage: */</div><div class='add'>+				  /*          high noise/high speed */</div><div class='add'>+	pad_mii_tx.d32_ipud  = 2; /* TXD[3:2] input stage: */</div><div class='add'>+				  /*          plain input (default) */</div><div class='add'>+	pad_mii_tx.d10_ipud  = 2; /* TXD[1:0] input stage: */</div><div class='add'>+				  /*          plain input (default) */</div><div class='add'>+	pad_mii_tx.ctrl_os   = 3; /* TX_CTL / TX_ER output stage */</div><div class='add'>+	pad_mii_tx.ctrl_ipud = 2; /* TX_CTL / TX_ER input stage (default) */</div><div class='add'>+	pad_mii_tx.clk_os    = 3; /* TX_CLK output stage */</div><div class='add'>+	pad_mii_tx.clk_ih    = 0; /* TX_CLK input hysteresis (default) */</div><div class='add'>+	pad_mii_tx.clk_ipud  = 2; /* TX_CLK input stage (default) */</div><div class='add'>+	sja1105_cfg_pad_mii_packing(packed_buf, &amp;pad_mii_tx, PACK);</div><div class='add'>+</div><div class='add'>+	return sja1105_xfer_buf(priv, SPI_WRITE, regs-&gt;pad_mii_tx[port],</div><div class='add'>+				packed_buf, SJA1105_SIZE_CGU_CMD);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_cfg_pad_rx_config(struct sja1105_private *priv, int port)</div><div class='add'>+{</div><div class='add'>+	const struct sja1105_regs *regs = priv-&gt;info-&gt;regs;</div><div class='add'>+	struct sja1105_cfg_pad_mii pad_mii_rx = {0};</div><div class='add'>+	u8 packed_buf[SJA1105_SIZE_CGU_CMD] = {0};</div><div class='add'>+</div><div class='add'>+	if (regs-&gt;pad_mii_rx[port] == SJA1105_RSV_ADDR)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Payload */</div><div class='add'>+	pad_mii_rx.d32_ih    = 0; /* RXD[3:2] input stage hysteresis: */</div><div class='add'>+				  /*          non-Schmitt (default) */</div><div class='add'>+	pad_mii_rx.d32_ipud  = 2; /* RXD[3:2] input weak pull-up/down */</div><div class='add'>+				  /*          plain input (default) */</div><div class='add'>+	pad_mii_rx.d10_ih    = 0; /* RXD[1:0] input stage hysteresis: */</div><div class='add'>+				  /*          non-Schmitt (default) */</div><div class='add'>+	pad_mii_rx.d10_ipud  = 2; /* RXD[1:0] input weak pull-up/down */</div><div class='add'>+				  /*          plain input (default) */</div><div class='add'>+	pad_mii_rx.ctrl_ih   = 0; /* RX_DV/CRS_DV/RX_CTL and RX_ER */</div><div class='add'>+				  /* input stage hysteresis: */</div><div class='add'>+				  /* non-Schmitt (default) */</div><div class='add'>+	pad_mii_rx.ctrl_ipud = 3; /* RX_DV/CRS_DV/RX_CTL and RX_ER */</div><div class='add'>+				  /* input stage weak pull-up/down: */</div><div class='add'>+				  /* pull-down */</div><div class='add'>+	pad_mii_rx.clk_os    = 2; /* RX_CLK/RXC output stage: */</div><div class='add'>+				  /* medium noise/fast speed (default) */</div><div class='add'>+	pad_mii_rx.clk_ih    = 0; /* RX_CLK/RXC input hysteresis: */</div><div class='add'>+				  /* non-Schmitt (default) */</div><div class='add'>+	pad_mii_rx.clk_ipud  = 2; /* RX_CLK/RXC input pull-up/down: */</div><div class='add'>+				  /* plain input (default) */</div><div class='add'>+	sja1105_cfg_pad_mii_packing(packed_buf, &amp;pad_mii_rx, PACK);</div><div class='add'>+</div><div class='add'>+	return sja1105_xfer_buf(priv, SPI_WRITE, regs-&gt;pad_mii_rx[port],</div><div class='add'>+				packed_buf, SJA1105_SIZE_CGU_CMD);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+sja1105_cfg_pad_mii_id_packing(void *buf, struct sja1105_cfg_pad_mii_id *cmd,</div><div class='add'>+			       enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const int size = SJA1105_SIZE_CGU_CMD;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;rxc_stable_ovr, 15, 15, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;rxc_delay,      14, 10, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;rxc_bypass,      9,  9, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;rxc_pd,          8,  8, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;txc_stable_ovr,  7,  7, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;txc_delay,       6,  2, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;txc_bypass,      1,  1, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;txc_pd,          0,  0, size, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+sja1110_cfg_pad_mii_id_packing(void *buf, struct sja1105_cfg_pad_mii_id *cmd,</div><div class='add'>+			       enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const int size = SJA1105_SIZE_CGU_CMD;</div><div class='add'>+	u64 range = 4;</div><div class='add'>+</div><div class='add'>+	/* Fields RXC_RANGE and TXC_RANGE select the input frequency range:</div><div class='add'>+	 * 0 = 2.5MHz</div><div class='add'>+	 * 1 = 25MHz</div><div class='add'>+	 * 2 = 50MHz</div><div class='add'>+	 * 3 = 125MHz</div><div class='add'>+	 * 4 = Automatically determined by port speed.</div><div class='add'>+	 * There's no point in defining a structure different than the one for</div><div class='add'>+	 * SJA1105, so just hardcode the frequency range to automatic, just as</div><div class='add'>+	 * before.</div><div class='add'>+	 */</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;rxc_stable_ovr, 26, 26, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;rxc_delay,      25, 21, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;range,               20, 18, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;rxc_bypass,     17, 17, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;rxc_pd,         16, 16, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;txc_stable_ovr, 10, 10, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;txc_delay,       9,  5, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;range,                4,  2, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;txc_bypass,      1,  1, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;txc_pd,          0,  0, size, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The RGMII delay setup procedure is 2-step and gets called upon each</div><div class='add'>+ * .phylink_mac_config. Both are strategic.</div><div class='add'>+ * The reason is that the RX Tunable Delay Line of the SJA1105 MAC has issues</div><div class='add'>+ * with recovering from a frequency change of the link partner's RGMII clock.</div><div class='add'>+ * The easiest way to recover from this is to temporarily power down the TDL,</div><div class='add'>+ * as it will re-lock at the new frequency afterwards.</div><div class='add'>+ */</div><div class='add'>+int sja1105pqrs_setup_rgmii_delay(const void *ctx, int port)</div><div class='add'>+{</div><div class='add'>+	const struct sja1105_private *priv = ctx;</div><div class='add'>+	const struct sja1105_regs *regs = priv-&gt;info-&gt;regs;</div><div class='add'>+	struct sja1105_cfg_pad_mii_id pad_mii_id = {0};</div><div class='add'>+	int rx_delay = priv-&gt;rgmii_rx_delay_ps[port];</div><div class='add'>+	int tx_delay = priv-&gt;rgmii_tx_delay_ps[port];</div><div class='add'>+	u8 packed_buf[SJA1105_SIZE_CGU_CMD] = {0};</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (rx_delay)</div><div class='add'>+		pad_mii_id.rxc_delay = SJA1105_RGMII_DELAY_PS_TO_HW(rx_delay);</div><div class='add'>+	if (tx_delay)</div><div class='add'>+		pad_mii_id.txc_delay = SJA1105_RGMII_DELAY_PS_TO_HW(tx_delay);</div><div class='add'>+</div><div class='add'>+	/* Stage 1: Turn the RGMII delay lines off. */</div><div class='add'>+	pad_mii_id.rxc_bypass = 1;</div><div class='add'>+	pad_mii_id.rxc_pd = 1;</div><div class='add'>+	pad_mii_id.txc_bypass = 1;</div><div class='add'>+	pad_mii_id.txc_pd = 1;</div><div class='add'>+	sja1105_cfg_pad_mii_id_packing(packed_buf, &amp;pad_mii_id, PACK);</div><div class='add'>+</div><div class='add'>+	rc = sja1105_xfer_buf(priv, SPI_WRITE, regs-&gt;pad_mii_id[port],</div><div class='add'>+			      packed_buf, SJA1105_SIZE_CGU_CMD);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	/* Stage 2: Turn the RGMII delay lines on. */</div><div class='add'>+	if (rx_delay) {</div><div class='add'>+		pad_mii_id.rxc_bypass = 0;</div><div class='add'>+		pad_mii_id.rxc_pd = 0;</div><div class='add'>+	}</div><div class='add'>+	if (tx_delay) {</div><div class='add'>+		pad_mii_id.txc_bypass = 0;</div><div class='add'>+		pad_mii_id.txc_pd = 0;</div><div class='add'>+	}</div><div class='add'>+	sja1105_cfg_pad_mii_id_packing(packed_buf, &amp;pad_mii_id, PACK);</div><div class='add'>+</div><div class='add'>+	return sja1105_xfer_buf(priv, SPI_WRITE, regs-&gt;pad_mii_id[port],</div><div class='add'>+				packed_buf, SJA1105_SIZE_CGU_CMD);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int sja1110_setup_rgmii_delay(const void *ctx, int port)</div><div class='add'>+{</div><div class='add'>+	const struct sja1105_private *priv = ctx;</div><div class='add'>+	const struct sja1105_regs *regs = priv-&gt;info-&gt;regs;</div><div class='add'>+	struct sja1105_cfg_pad_mii_id pad_mii_id = {0};</div><div class='add'>+	int rx_delay = priv-&gt;rgmii_rx_delay_ps[port];</div><div class='add'>+	int tx_delay = priv-&gt;rgmii_tx_delay_ps[port];</div><div class='add'>+	u8 packed_buf[SJA1105_SIZE_CGU_CMD] = {0};</div><div class='add'>+</div><div class='add'>+	pad_mii_id.rxc_pd = 1;</div><div class='add'>+	pad_mii_id.txc_pd = 1;</div><div class='add'>+</div><div class='add'>+	if (rx_delay) {</div><div class='add'>+		pad_mii_id.rxc_delay = SJA1105_RGMII_DELAY_PS_TO_HW(rx_delay);</div><div class='add'>+		/* The "BYPASS" bit in SJA1110 is actually a "don't bypass" */</div><div class='add'>+		pad_mii_id.rxc_bypass = 1;</div><div class='add'>+		pad_mii_id.rxc_pd = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (tx_delay) {</div><div class='add'>+		pad_mii_id.txc_delay = SJA1105_RGMII_DELAY_PS_TO_HW(tx_delay);</div><div class='add'>+		pad_mii_id.txc_bypass = 1;</div><div class='add'>+		pad_mii_id.txc_pd = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sja1110_cfg_pad_mii_id_packing(packed_buf, &amp;pad_mii_id, PACK);</div><div class='add'>+</div><div class='add'>+	return sja1105_xfer_buf(priv, SPI_WRITE, regs-&gt;pad_mii_id[port],</div><div class='add'>+				packed_buf, SJA1105_SIZE_CGU_CMD);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_rgmii_clocking_setup(struct sja1105_private *priv, int port,</div><div class='add'>+					sja1105_mii_role_t role)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = priv-&gt;ds-&gt;dev;</div><div class='add'>+	struct sja1105_mac_config_entry *mac;</div><div class='add'>+	u64 speed;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	mac = priv-&gt;static_config.tables[BLK_IDX_MAC_CONFIG].entries;</div><div class='add'>+	speed = mac[port].speed;</div><div class='add'>+</div><div class='add'>+	dev_dbg(dev, "Configuring port %d RGMII at speed %lldMbps\n",</div><div class='add'>+		port, speed);</div><div class='add'>+</div><div class='add'>+	if (speed == priv-&gt;info-&gt;port_speed[SJA1105_SPEED_1000MBPS]) {</div><div class='add'>+		/* 1000Mbps, IDIV disabled (125 MHz) */</div><div class='add'>+		rc = sja1105_cgu_idiv_config(priv, port, false, 1);</div><div class='add'>+	} else if (speed == priv-&gt;info-&gt;port_speed[SJA1105_SPEED_100MBPS]) {</div><div class='add'>+		/* 100Mbps, IDIV enabled, divide by 1 (25 MHz) */</div><div class='add'>+		rc = sja1105_cgu_idiv_config(priv, port, true, 1);</div><div class='add'>+	} else if (speed == priv-&gt;info-&gt;port_speed[SJA1105_SPEED_10MBPS]) {</div><div class='add'>+		/* 10Mbps, IDIV enabled, divide by 10 (2.5 MHz) */</div><div class='add'>+		rc = sja1105_cgu_idiv_config(priv, port, true, 10);</div><div class='add'>+	} else if (speed == priv-&gt;info-&gt;port_speed[SJA1105_SPEED_AUTO]) {</div><div class='add'>+		/* Skip CGU configuration if there is no speed available</div><div class='add'>+		 * (e.g. link is not established yet)</div><div class='add'>+		 */</div><div class='add'>+		dev_dbg(dev, "Speed not available, skipping CGU config\n");</div><div class='add'>+		return 0;</div><div class='add'>+	} else {</div><div class='add'>+		rc = -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rc &lt; 0) {</div><div class='add'>+		dev_err(dev, "Failed to configure idiv\n");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+	rc = sja1105_cgu_rgmii_tx_clk_config(priv, port, speed);</div><div class='add'>+	if (rc &lt; 0) {</div><div class='add'>+		dev_err(dev, "Failed to configure RGMII Tx clock\n");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+	rc = sja1105_rgmii_cfg_pad_tx_config(priv, port);</div><div class='add'>+	if (rc &lt; 0) {</div><div class='add'>+		dev_err(dev, "Failed to configure Tx pad registers\n");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;info-&gt;setup_rgmii_delay)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return priv-&gt;info-&gt;setup_rgmii_delay(priv, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_cgu_rmii_ref_clk_config(struct sja1105_private *priv,</div><div class='add'>+					   int port)</div><div class='add'>+{</div><div class='add'>+	const struct sja1105_regs *regs = priv-&gt;info-&gt;regs;</div><div class='add'>+	struct sja1105_cgu_mii_ctrl ref_clk;</div><div class='add'>+	u8 packed_buf[SJA1105_SIZE_CGU_CMD] = {0};</div><div class='add'>+	static const int clk_sources[] = {</div><div class='add'>+		CLKSRC_MII0_TX_CLK,</div><div class='add'>+		CLKSRC_MII1_TX_CLK,</div><div class='add'>+		CLKSRC_MII2_TX_CLK,</div><div class='add'>+		CLKSRC_MII3_TX_CLK,</div><div class='add'>+		CLKSRC_MII4_TX_CLK,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	if (regs-&gt;rmii_ref_clk[port] == SJA1105_RSV_ADDR)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Payload for packed_buf */</div><div class='add'>+	ref_clk.clksrc    = clk_sources[port];</div><div class='add'>+	ref_clk.autoblock = 1;      /* Autoblock clk while changing clksrc */</div><div class='add'>+	ref_clk.pd        = 0;      /* Power Down off =&gt; enabled */</div><div class='add'>+	sja1105_cgu_mii_control_packing(packed_buf, &amp;ref_clk, PACK);</div><div class='add'>+</div><div class='add'>+	return sja1105_xfer_buf(priv, SPI_WRITE, regs-&gt;rmii_ref_clk[port],</div><div class='add'>+				packed_buf, SJA1105_SIZE_CGU_CMD);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+sja1105_cgu_rmii_ext_tx_clk_config(struct sja1105_private *priv, int port)</div><div class='add'>+{</div><div class='add'>+	const struct sja1105_regs *regs = priv-&gt;info-&gt;regs;</div><div class='add'>+	struct sja1105_cgu_mii_ctrl ext_tx_clk;</div><div class='add'>+	u8 packed_buf[SJA1105_SIZE_CGU_CMD] = {0};</div><div class='add'>+</div><div class='add'>+	if (regs-&gt;rmii_ext_tx_clk[port] == SJA1105_RSV_ADDR)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Payload for packed_buf */</div><div class='add'>+	ext_tx_clk.clksrc    = CLKSRC_PLL1;</div><div class='add'>+	ext_tx_clk.autoblock = 1;   /* Autoblock clk while changing clksrc */</div><div class='add'>+	ext_tx_clk.pd        = 0;   /* Power Down off =&gt; enabled */</div><div class='add'>+	sja1105_cgu_mii_control_packing(packed_buf, &amp;ext_tx_clk, PACK);</div><div class='add'>+</div><div class='add'>+	return sja1105_xfer_buf(priv, SPI_WRITE, regs-&gt;rmii_ext_tx_clk[port],</div><div class='add'>+				packed_buf, SJA1105_SIZE_CGU_CMD);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_cgu_rmii_pll_config(struct sja1105_private *priv)</div><div class='add'>+{</div><div class='add'>+	const struct sja1105_regs *regs = priv-&gt;info-&gt;regs;</div><div class='add'>+	u8 packed_buf[SJA1105_SIZE_CGU_CMD] = {0};</div><div class='add'>+	struct sja1105_cgu_pll_ctrl pll = {0};</div><div class='add'>+	struct device *dev = priv-&gt;ds-&gt;dev;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (regs-&gt;rmii_pll1 == SJA1105_RSV_ADDR)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* PLL1 must be enabled and output 50 Mhz.</div><div class='add'>+	 * This is done by writing first 0x0A010941 to</div><div class='add'>+	 * the PLL_1_C register and then deasserting</div><div class='add'>+	 * power down (PD) 0x0A010940.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	/* Step 1: PLL1 setup for 50Mhz */</div><div class='add'>+	pll.pllclksrc = 0xA;</div><div class='add'>+	pll.msel      = 0x1;</div><div class='add'>+	pll.autoblock = 0x1;</div><div class='add'>+	pll.psel      = 0x1;</div><div class='add'>+	pll.direct    = 0x0;</div><div class='add'>+	pll.fbsel     = 0x1;</div><div class='add'>+	pll.bypass    = 0x0;</div><div class='add'>+	pll.pd        = 0x1;</div><div class='add'>+</div><div class='add'>+	sja1105_cgu_pll_control_packing(packed_buf, &amp;pll, PACK);</div><div class='add'>+	rc = sja1105_xfer_buf(priv, SPI_WRITE, regs-&gt;rmii_pll1, packed_buf,</div><div class='add'>+			      SJA1105_SIZE_CGU_CMD);</div><div class='add'>+	if (rc &lt; 0) {</div><div class='add'>+		dev_err(dev, "failed to configure PLL1 for 50MHz\n");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Step 2: Enable PLL1 */</div><div class='add'>+	pll.pd = 0x0;</div><div class='add'>+</div><div class='add'>+	sja1105_cgu_pll_control_packing(packed_buf, &amp;pll, PACK);</div><div class='add'>+	rc = sja1105_xfer_buf(priv, SPI_WRITE, regs-&gt;rmii_pll1, packed_buf,</div><div class='add'>+			      SJA1105_SIZE_CGU_CMD);</div><div class='add'>+	if (rc &lt; 0) {</div><div class='add'>+		dev_err(dev, "failed to enable PLL1\n");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_rmii_clocking_setup(struct sja1105_private *priv, int port,</div><div class='add'>+				       sja1105_mii_role_t role)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = priv-&gt;ds-&gt;dev;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	dev_dbg(dev, "Configuring RMII-%s clocking\n",</div><div class='add'>+		(role == XMII_MAC) ? "MAC" : "PHY");</div><div class='add'>+	/* AH1601.pdf chapter 2.5.1. Sources */</div><div class='add'>+	if (role == XMII_MAC) {</div><div class='add'>+		/* Configure and enable PLL1 for 50Mhz output */</div><div class='add'>+		rc = sja1105_cgu_rmii_pll_config(priv);</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			return rc;</div><div class='add'>+	}</div><div class='add'>+	/* Disable IDIV for this port */</div><div class='add'>+	rc = sja1105_cgu_idiv_config(priv, port, false, 1);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+	/* Source to sink mappings */</div><div class='add'>+	rc = sja1105_cgu_rmii_ref_clk_config(priv, port);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+	if (role == XMII_MAC) {</div><div class='add'>+		rc = sja1105_cgu_rmii_ext_tx_clk_config(priv, port);</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			return rc;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int sja1105_clocking_setup_port(struct sja1105_private *priv, int port)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_xmii_params_entry *mii;</div><div class='add'>+	struct device *dev = priv-&gt;ds-&gt;dev;</div><div class='add'>+	sja1105_phy_interface_t phy_mode;</div><div class='add'>+	sja1105_mii_role_t role;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	mii = priv-&gt;static_config.tables[BLK_IDX_XMII_PARAMS].entries;</div><div class='add'>+</div><div class='add'>+	/* RGMII etc */</div><div class='add'>+	phy_mode = mii-&gt;xmii_mode[port];</div><div class='add'>+	/* MAC or PHY, for applicable types (not RGMII) */</div><div class='add'>+	role = mii-&gt;phy_mac[port];</div><div class='add'>+</div><div class='add'>+	switch (phy_mode) {</div><div class='add'>+	case XMII_MODE_MII:</div><div class='add'>+		rc = sja1105_mii_clocking_setup(priv, port, role);</div><div class='add'>+		break;</div><div class='add'>+	case XMII_MODE_RMII:</div><div class='add'>+		rc = sja1105_rmii_clocking_setup(priv, port, role);</div><div class='add'>+		break;</div><div class='add'>+	case XMII_MODE_RGMII:</div><div class='add'>+		rc = sja1105_rgmii_clocking_setup(priv, port, role);</div><div class='add'>+		break;</div><div class='add'>+	case XMII_MODE_SGMII:</div><div class='add'>+		/* Nothing to do in the CGU for SGMII */</div><div class='add'>+		rc = 0;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(dev, "Invalid interface mode specified: %d\n",</div><div class='add'>+			phy_mode);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(dev, "Clocking setup for port %d failed: %d\n",</div><div class='add'>+			port, rc);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Internally pull down the RX_DV/CRS_DV/RX_CTL and RX_ER inputs */</div><div class='add'>+	return sja1105_cfg_pad_rx_config(priv, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int sja1105_clocking_setup(struct sja1105_private *priv)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds = priv-&gt;ds;</div><div class='add'>+	int port, rc;</div><div class='add'>+</div><div class='add'>+	for (port = 0; port &lt; ds-&gt;num_ports; port++) {</div><div class='add'>+		rc = sja1105_clocking_setup_port(priv, port);</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			return rc;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+sja1110_cgu_outclk_packing(void *buf, struct sja1110_cgu_outclk *outclk,</div><div class='add'>+			   enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const int size = 4;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;outclk-&gt;clksrc,    27, 24, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;outclk-&gt;autoblock, 11, 11, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;outclk-&gt;pd,         0,  0, size, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int sja1110_disable_microcontroller(struct sja1105_private *priv)</div><div class='add'>+{</div><div class='add'>+	u8 packed_buf[SJA1105_SIZE_CGU_CMD] = {0};</div><div class='add'>+	struct sja1110_cgu_outclk outclk_6_c = {</div><div class='add'>+		.clksrc = 0x3,</div><div class='add'>+		.pd = true,</div><div class='add'>+	};</div><div class='add'>+	struct sja1110_cgu_outclk outclk_7_c = {</div><div class='add'>+		.clksrc = 0x5,</div><div class='add'>+		.pd = true,</div><div class='add'>+	};</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	/* Power down the BASE_TIMER_CLK to disable the watchdog timer */</div><div class='add'>+	sja1110_cgu_outclk_packing(packed_buf, &amp;outclk_7_c, PACK);</div><div class='add'>+</div><div class='add'>+	rc = sja1105_xfer_buf(priv, SPI_WRITE, SJA1110_BASE_TIMER_CLK,</div><div class='add'>+			      packed_buf, SJA1105_SIZE_CGU_CMD);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	/* Power down the BASE_MCSS_CLOCK to gate the microcontroller off */</div><div class='add'>+	sja1110_cgu_outclk_packing(packed_buf, &amp;outclk_6_c, PACK);</div><div class='add'>+</div><div class='add'>+	return sja1105_xfer_buf(priv, SPI_WRITE, SJA1110_BASE_MCSS_CLK,</div><div class='add'>+				packed_buf, SJA1105_SIZE_CGU_CMD);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/dsa/sja1105/sja1105_devlink.c b/drivers/net/dsa/sja1105/sja1105_devlink.c<br/>new file mode 100644<br/>index 000000000000..30b1f1ba762f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/sja1105/sja1105_devlink.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/sja1105/sja1105_devlink.c</a></div><div class='hunk'>@@ -0,0 +1,139 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright (c) 2018-2019, Vladimir Oltean &lt;olteanv@gmail.com&gt;</div><div class='add'>+ * Copyright 2020 NXP</div><div class='add'>+ */</div><div class='add'>+#include "sja1105.h"</div><div class='add'>+</div><div class='add'>+/* Since devlink regions have a fixed size and the static config has a variable</div><div class='add'>+ * size, we need to calculate the maximum possible static config size by</div><div class='add'>+ * creating a dummy config with all table entries populated to the max, and get</div><div class='add'>+ * its packed length. This is done dynamically as opposed to simply hardcoding</div><div class='add'>+ * a number, since currently not all static config tables are implemented, so</div><div class='add'>+ * we are avoiding a possible code desynchronization.</div><div class='add'>+ */</div><div class='add'>+static size_t sja1105_static_config_get_max_size(struct sja1105_private *priv)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_static_config config;</div><div class='add'>+	enum sja1105_blk_idx blk_idx;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_static_config_init(&amp;config,</div><div class='add'>+					priv-&gt;info-&gt;static_ops,</div><div class='add'>+					priv-&gt;info-&gt;device_id);</div><div class='add'>+	if (rc)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	for (blk_idx = 0; blk_idx &lt; BLK_IDX_MAX; blk_idx++) {</div><div class='add'>+		struct sja1105_table *table = &amp;config.tables[blk_idx];</div><div class='add'>+</div><div class='add'>+		table-&gt;entry_count = table-&gt;ops-&gt;max_entry_count;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return sja1105_static_config_get_length(&amp;config);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+sja1105_region_static_config_snapshot(struct devlink *dl,</div><div class='add'>+				      const struct devlink_region_ops *ops,</div><div class='add'>+				      struct netlink_ext_ack *extack,</div><div class='add'>+				      u8 **data)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds = dsa_devlink_to_ds(dl);</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	size_t max_len, len;</div><div class='add'>+</div><div class='add'>+	len = sja1105_static_config_get_length(&amp;priv-&gt;static_config);</div><div class='add'>+	max_len = sja1105_static_config_get_max_size(priv);</div><div class='add'>+</div><div class='add'>+	*data = kcalloc(max_len, sizeof(u8), GFP_KERNEL);</div><div class='add'>+	if (!*data)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	return static_config_buf_prepare_for_upload(priv, *data, len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct devlink_region_ops sja1105_region_static_config_ops = {</div><div class='add'>+	.name = "static-config",</div><div class='add'>+	.snapshot = sja1105_region_static_config_snapshot,</div><div class='add'>+	.destructor = kfree,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum sja1105_region_id {</div><div class='add'>+	SJA1105_REGION_STATIC_CONFIG = 0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1105_region {</div><div class='add'>+	const struct devlink_region_ops *ops;</div><div class='add'>+	size_t (*get_size)(struct sja1105_private *priv);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct sja1105_region sja1105_regions[] = {</div><div class='add'>+	[SJA1105_REGION_STATIC_CONFIG] = {</div><div class='add'>+		.ops = &amp;sja1105_region_static_config_ops,</div><div class='add'>+		.get_size = sja1105_static_config_get_max_size,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int sja1105_setup_devlink_regions(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	int i, num_regions = ARRAY_SIZE(sja1105_regions);</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	const struct devlink_region_ops *ops;</div><div class='add'>+	struct devlink_region *region;</div><div class='add'>+	u64 size;</div><div class='add'>+</div><div class='add'>+	priv-&gt;regions = kcalloc(num_regions, sizeof(struct devlink_region *),</div><div class='add'>+				GFP_KERNEL);</div><div class='add'>+	if (!priv-&gt;regions)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_regions; i++) {</div><div class='add'>+		size = sja1105_regions[i].get_size(priv);</div><div class='add'>+		ops = sja1105_regions[i].ops;</div><div class='add'>+</div><div class='add'>+		region = dsa_devlink_region_create(ds, ops, 1, size);</div><div class='add'>+		if (IS_ERR(region)) {</div><div class='add'>+			while (--i &gt;= 0)</div><div class='add'>+				dsa_devlink_region_destroy(priv-&gt;regions[i]);</div><div class='add'>+</div><div class='add'>+			kfree(priv-&gt;regions);</div><div class='add'>+			return PTR_ERR(region);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		priv-&gt;regions[i] = region;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sja1105_teardown_devlink_regions(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	int i, num_regions = ARRAY_SIZE(sja1105_regions);</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_regions; i++)</div><div class='add'>+		dsa_devlink_region_destroy(priv-&gt;regions[i]);</div><div class='add'>+</div><div class='add'>+	kfree(priv-&gt;regions);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int sja1105_devlink_info_get(struct dsa_switch *ds,</div><div class='add'>+			     struct devlink_info_req *req,</div><div class='add'>+			     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return devlink_info_version_fixed_put(req,</div><div class='add'>+					      DEVLINK_INFO_VERSION_GENERIC_ASIC_ID,</div><div class='add'>+					      priv-&gt;info-&gt;name);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int sja1105_devlink_setup(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	return sja1105_setup_devlink_regions(ds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void sja1105_devlink_teardown(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	sja1105_teardown_devlink_regions(ds);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/dsa/sja1105/sja1105_dynamic_config.c b/drivers/net/dsa/sja1105/sja1105_dynamic_config.c<br/>new file mode 100644<br/>index 000000000000..984c0e604e8d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/sja1105/sja1105_dynamic_config.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/sja1105/sja1105_dynamic_config.c</a></div><div class='hunk'>@@ -0,0 +1,1413 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright (c) 2018-2019, Vladimir Oltean &lt;olteanv@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+#include "sja1105.h"</div><div class='add'>+</div><div class='add'>+/* In the dynamic configuration interface, the switch exposes a register-like</div><div class='add'>+ * view of some of the static configuration tables.</div><div class='add'>+ * Many times the field organization of the dynamic tables is abbreviated (not</div><div class='add'>+ * all fields are dynamically reconfigurable) and different from the static</div><div class='add'>+ * ones, but the key reason for having it is that we can spare a switch reset</div><div class='add'>+ * for settings that can be changed dynamically.</div><div class='add'>+ *</div><div class='add'>+ * This file creates a per-switch-family abstraction called</div><div class='add'>+ * struct sja1105_dynamic_table_ops and two operations that work with it:</div><div class='add'>+ * - sja1105_dynamic_config_write</div><div class='add'>+ * - sja1105_dynamic_config_read</div><div class='add'>+ *</div><div class='add'>+ * Compared to the struct sja1105_table_ops from sja1105_static_config.c,</div><div class='add'>+ * the dynamic accessors work with a compound buffer:</div><div class='add'>+ *</div><div class='add'>+ * packed_buf</div><div class='add'>+ *</div><div class='add'>+ * |</div><div class='add'>+ * V</div><div class='add'>+ * +-----------------------------------------+------------------+</div><div class='add'>+ * |              ENTRY BUFFER               |  COMMAND BUFFER  |</div><div class='add'>+ * +-----------------------------------------+------------------+</div><div class='add'>+ *</div><div class='add'>+ * &lt;----------------------- packed_size ------------------------&gt;</div><div class='add'>+ *</div><div class='add'>+ * The ENTRY BUFFER may or may not have the same layout, or size, as its static</div><div class='add'>+ * configuration table entry counterpart. When it does, the same packing</div><div class='add'>+ * function is reused (bar exceptional cases - see</div><div class='add'>+ * sja1105pqrs_dyn_l2_lookup_entry_packing).</div><div class='add'>+ *</div><div class='add'>+ * The reason for the COMMAND BUFFER being at the end is to be able to send</div><div class='add'>+ * a dynamic write command through a single SPI burst. By the time the switch</div><div class='add'>+ * reacts to the command, the ENTRY BUFFER is already populated with the data</div><div class='add'>+ * sent by the core.</div><div class='add'>+ *</div><div class='add'>+ * The COMMAND BUFFER is always SJA1105_SIZE_DYN_CMD bytes (one 32-bit word) in</div><div class='add'>+ * size.</div><div class='add'>+ *</div><div class='add'>+ * Sometimes the ENTRY BUFFER does not really exist (when the number of fields</div><div class='add'>+ * that can be reconfigured is small), then the switch repurposes some of the</div><div class='add'>+ * unused 32 bits of the COMMAND BUFFER to hold ENTRY data.</div><div class='add'>+ *</div><div class='add'>+ * The key members of struct sja1105_dynamic_table_ops are:</div><div class='add'>+ * - .entry_packing: A function that deals with packing an ENTRY structure</div><div class='add'>+ *		     into an SPI buffer, or retrieving an ENTRY structure</div><div class='add'>+ *		     from one.</div><div class='add'>+ *		     The @packed_buf pointer it's given does always point to</div><div class='add'>+ *		     the ENTRY portion of the buffer.</div><div class='add'>+ * - .cmd_packing: A function that deals with packing/unpacking the COMMAND</div><div class='add'>+ *		   structure to/from the SPI buffer.</div><div class='add'>+ *		   It is given the same @packed_buf pointer as .entry_packing,</div><div class='add'>+ *		   so most of the time, the @packed_buf points *behind* the</div><div class='add'>+ *		   COMMAND offset inside the buffer.</div><div class='add'>+ *		   To access the COMMAND portion of the buffer, the function</div><div class='add'>+ *		   knows its correct offset.</div><div class='add'>+ *		   Giving both functions the same pointer is handy because in</div><div class='add'>+ *		   extreme cases (see sja1105pqrs_dyn_l2_lookup_entry_packing)</div><div class='add'>+ *		   the .entry_packing is able to jump to the COMMAND portion,</div><div class='add'>+ *		   or vice-versa (sja1105pqrs_l2_lookup_cmd_packing).</div><div class='add'>+ * - .access: A bitmap of:</div><div class='add'>+ *	OP_READ: Set if the hardware manual marks the ENTRY portion of the</div><div class='add'>+ *		 dynamic configuration table buffer as R (readable) after</div><div class='add'>+ *		 an SPI read command (the switch will populate the buffer).</div><div class='add'>+ *	OP_WRITE: Set if the manual marks the ENTRY portion of the dynamic</div><div class='add'>+ *		  table buffer as W (writable) after an SPI write command</div><div class='add'>+ *		  (the switch will read the fields provided in the buffer).</div><div class='add'>+ *	OP_DEL: Set if the manual says the VALIDENT bit is supported in the</div><div class='add'>+ *		COMMAND portion of this dynamic config buffer (i.e. the</div><div class='add'>+ *		specified entry can be invalidated through a SPI write</div><div class='add'>+ *		command).</div><div class='add'>+ *	OP_SEARCH: Set if the manual says that the index of an entry can</div><div class='add'>+ *		   be retrieved in the COMMAND portion of the buffer based</div><div class='add'>+ *		   on its ENTRY portion, as a result of a SPI write command.</div><div class='add'>+ *		   Only the TCAM-based FDB table on SJA1105 P/Q/R/S supports</div><div class='add'>+ *		   this.</div><div class='add'>+ *	OP_VALID_ANYWAY: Reading some tables through the dynamic config</div><div class='add'>+ *			 interface is possible even if the VALIDENT bit is not</div><div class='add'>+ *			 set in the writeback. So don't error out in that case.</div><div class='add'>+ * - .max_entry_count: The number of entries, counting from zero, that can be</div><div class='add'>+ *		       reconfigured through the dynamic interface. If a static</div><div class='add'>+ *		       table can be reconfigured at all dynamically, this</div><div class='add'>+ *		       number always matches the maximum number of supported</div><div class='add'>+ *		       static entries.</div><div class='add'>+ * - .packed_size: The length in bytes of the compound ENTRY + COMMAND BUFFER.</div><div class='add'>+ *		   Note that sometimes the compound buffer may contain holes in</div><div class='add'>+ *		   it (see sja1105_vlan_lookup_cmd_packing). The @packed_buf is</div><div class='add'>+ *		   contiguous however, so @packed_size includes any unused</div><div class='add'>+ *		   bytes.</div><div class='add'>+ * - .addr: The base SPI address at which the buffer must be written to the</div><div class='add'>+ *	    switch's memory. When looking at the hardware manual, this must</div><div class='add'>+ *	    always match the lowest documented address for the ENTRY, and not</div><div class='add'>+ *	    that of the COMMAND, since the other 32-bit words will follow along</div><div class='add'>+ *	    at the correct addresses.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define SJA1105_SIZE_DYN_CMD					4</div><div class='add'>+</div><div class='add'>+#define SJA1105ET_SIZE_VL_LOOKUP_DYN_CMD			\</div><div class='add'>+	SJA1105_SIZE_DYN_CMD</div><div class='add'>+</div><div class='add'>+#define SJA1105PQRS_SIZE_VL_LOOKUP_DYN_CMD			\</div><div class='add'>+	(SJA1105_SIZE_DYN_CMD + SJA1105_SIZE_VL_LOOKUP_ENTRY)</div><div class='add'>+</div><div class='add'>+#define SJA1110_SIZE_VL_POLICING_DYN_CMD			\</div><div class='add'>+	(SJA1105_SIZE_DYN_CMD + SJA1105_SIZE_VL_POLICING_ENTRY)</div><div class='add'>+</div><div class='add'>+#define SJA1105ET_SIZE_MAC_CONFIG_DYN_ENTRY			\</div><div class='add'>+	SJA1105_SIZE_DYN_CMD</div><div class='add'>+</div><div class='add'>+#define SJA1105ET_SIZE_L2_LOOKUP_DYN_CMD			\</div><div class='add'>+	(SJA1105_SIZE_DYN_CMD + SJA1105ET_SIZE_L2_LOOKUP_ENTRY)</div><div class='add'>+</div><div class='add'>+#define SJA1105PQRS_SIZE_L2_LOOKUP_DYN_CMD			\</div><div class='add'>+	(SJA1105_SIZE_DYN_CMD + SJA1105PQRS_SIZE_L2_LOOKUP_ENTRY)</div><div class='add'>+</div><div class='add'>+#define SJA1110_SIZE_L2_LOOKUP_DYN_CMD				\</div><div class='add'>+	(SJA1105_SIZE_DYN_CMD + SJA1110_SIZE_L2_LOOKUP_ENTRY)</div><div class='add'>+</div><div class='add'>+#define SJA1105_SIZE_VLAN_LOOKUP_DYN_CMD			\</div><div class='add'>+	(SJA1105_SIZE_DYN_CMD + 4 + SJA1105_SIZE_VLAN_LOOKUP_ENTRY)</div><div class='add'>+</div><div class='add'>+#define SJA1110_SIZE_VLAN_LOOKUP_DYN_CMD			\</div><div class='add'>+	(SJA1105_SIZE_DYN_CMD + SJA1110_SIZE_VLAN_LOOKUP_ENTRY)</div><div class='add'>+</div><div class='add'>+#define SJA1105_SIZE_L2_FORWARDING_DYN_CMD			\</div><div class='add'>+	(SJA1105_SIZE_DYN_CMD + SJA1105_SIZE_L2_FORWARDING_ENTRY)</div><div class='add'>+</div><div class='add'>+#define SJA1105ET_SIZE_MAC_CONFIG_DYN_CMD			\</div><div class='add'>+	(SJA1105_SIZE_DYN_CMD + SJA1105ET_SIZE_MAC_CONFIG_DYN_ENTRY)</div><div class='add'>+</div><div class='add'>+#define SJA1105PQRS_SIZE_MAC_CONFIG_DYN_CMD			\</div><div class='add'>+	(SJA1105_SIZE_DYN_CMD + SJA1105PQRS_SIZE_MAC_CONFIG_ENTRY)</div><div class='add'>+</div><div class='add'>+#define SJA1105ET_SIZE_L2_LOOKUP_PARAMS_DYN_CMD			\</div><div class='add'>+	SJA1105_SIZE_DYN_CMD</div><div class='add'>+</div><div class='add'>+#define SJA1105PQRS_SIZE_L2_LOOKUP_PARAMS_DYN_CMD		\</div><div class='add'>+	(SJA1105_SIZE_DYN_CMD + SJA1105PQRS_SIZE_L2_LOOKUP_PARAMS_ENTRY)</div><div class='add'>+</div><div class='add'>+#define SJA1110_SIZE_L2_LOOKUP_PARAMS_DYN_CMD		\</div><div class='add'>+	(SJA1105_SIZE_DYN_CMD + SJA1110_SIZE_L2_LOOKUP_PARAMS_ENTRY)</div><div class='add'>+</div><div class='add'>+#define SJA1105ET_SIZE_GENERAL_PARAMS_DYN_CMD			\</div><div class='add'>+	SJA1105_SIZE_DYN_CMD</div><div class='add'>+</div><div class='add'>+#define SJA1105PQRS_SIZE_GENERAL_PARAMS_DYN_CMD			\</div><div class='add'>+	(SJA1105_SIZE_DYN_CMD + SJA1105PQRS_SIZE_GENERAL_PARAMS_ENTRY)</div><div class='add'>+</div><div class='add'>+#define SJA1110_SIZE_GENERAL_PARAMS_DYN_CMD			\</div><div class='add'>+	(SJA1105_SIZE_DYN_CMD + SJA1110_SIZE_GENERAL_PARAMS_ENTRY)</div><div class='add'>+</div><div class='add'>+#define SJA1105PQRS_SIZE_AVB_PARAMS_DYN_CMD			\</div><div class='add'>+	(SJA1105_SIZE_DYN_CMD + SJA1105PQRS_SIZE_AVB_PARAMS_ENTRY)</div><div class='add'>+</div><div class='add'>+#define SJA1105_SIZE_RETAGGING_DYN_CMD				\</div><div class='add'>+	(SJA1105_SIZE_DYN_CMD + SJA1105_SIZE_RETAGGING_ENTRY)</div><div class='add'>+</div><div class='add'>+#define SJA1105ET_SIZE_CBS_DYN_CMD				\</div><div class='add'>+	(SJA1105_SIZE_DYN_CMD + SJA1105ET_SIZE_CBS_ENTRY)</div><div class='add'>+</div><div class='add'>+#define SJA1105PQRS_SIZE_CBS_DYN_CMD				\</div><div class='add'>+	(SJA1105_SIZE_DYN_CMD + SJA1105PQRS_SIZE_CBS_ENTRY)</div><div class='add'>+</div><div class='add'>+#define SJA1110_SIZE_XMII_PARAMS_DYN_CMD			\</div><div class='add'>+	SJA1110_SIZE_XMII_PARAMS_ENTRY</div><div class='add'>+</div><div class='add'>+#define SJA1110_SIZE_L2_POLICING_DYN_CMD			\</div><div class='add'>+	(SJA1105_SIZE_DYN_CMD + SJA1105_SIZE_L2_POLICING_ENTRY)</div><div class='add'>+</div><div class='add'>+#define SJA1110_SIZE_L2_FORWARDING_PARAMS_DYN_CMD		\</div><div class='add'>+	SJA1105_SIZE_L2_FORWARDING_PARAMS_ENTRY</div><div class='add'>+</div><div class='add'>+#define SJA1105_MAX_DYN_CMD_SIZE				\</div><div class='add'>+	SJA1110_SIZE_GENERAL_PARAMS_DYN_CMD</div><div class='add'>+</div><div class='add'>+struct sja1105_dyn_cmd {</div><div class='add'>+	bool search;</div><div class='add'>+	u64 valid;</div><div class='add'>+	u64 rdwrset;</div><div class='add'>+	u64 errors;</div><div class='add'>+	u64 valident;</div><div class='add'>+	u64 index;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum sja1105_hostcmd {</div><div class='add'>+	SJA1105_HOSTCMD_SEARCH = 1,</div><div class='add'>+	SJA1105_HOSTCMD_READ = 2,</div><div class='add'>+	SJA1105_HOSTCMD_WRITE = 3,</div><div class='add'>+	SJA1105_HOSTCMD_INVALIDATE = 4,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Command and entry overlap */</div><div class='add'>+static void</div><div class='add'>+sja1105et_vl_lookup_cmd_packing(void *buf, struct sja1105_dyn_cmd *cmd,</div><div class='add'>+				enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const int size = SJA1105_SIZE_DYN_CMD;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;valid,   31, 31, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;errors,  30, 30, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;rdwrset, 29, 29, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;index,    9,  0, size, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Command and entry are separate */</div><div class='add'>+static void</div><div class='add'>+sja1105pqrs_vl_lookup_cmd_packing(void *buf, struct sja1105_dyn_cmd *cmd,</div><div class='add'>+				  enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	u8 *p = buf + SJA1105_SIZE_VL_LOOKUP_ENTRY;</div><div class='add'>+	const int size = SJA1105_SIZE_DYN_CMD;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;valid,   31, 31, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;errors,  30, 30, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;rdwrset, 29, 29, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;index,    9,  0, size, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+sja1110_vl_lookup_cmd_packing(void *buf, struct sja1105_dyn_cmd *cmd,</div><div class='add'>+			      enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	u8 *p = buf + SJA1105PQRS_SIZE_L2_LOOKUP_ENTRY;</div><div class='add'>+	const int size = SJA1105_SIZE_DYN_CMD;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;valid,   31, 31, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;rdwrset, 30, 30, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;errors,  29, 29, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;index,   11,  0, size, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t sja1105et_vl_lookup_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+						enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_vl_lookup_entry *entry = entry_ptr;</div><div class='add'>+	const int size = SJA1105ET_SIZE_VL_LOOKUP_DYN_CMD;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;egrmirr,  21, 17, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;ingrmirr, 16, 16, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+sja1110_vl_policing_cmd_packing(void *buf, struct sja1105_dyn_cmd *cmd,</div><div class='add'>+				enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	u8 *p = buf + SJA1105_SIZE_VL_LOOKUP_ENTRY;</div><div class='add'>+	const int size = SJA1105_SIZE_DYN_CMD;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;valid,   31, 31, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;rdwrset, 30, 30, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;index,   11,  0, size, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+sja1105pqrs_common_l2_lookup_cmd_packing(void *buf, struct sja1105_dyn_cmd *cmd,</div><div class='add'>+					 enum packing_op op, int entry_size)</div><div class='add'>+{</div><div class='add'>+	const int size = SJA1105_SIZE_DYN_CMD;</div><div class='add'>+	u8 *p = buf + entry_size;</div><div class='add'>+	u64 hostcmd;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;valid,    31, 31, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;rdwrset,  30, 30, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;errors,   29, 29, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;valident, 27, 27, size, op);</div><div class='add'>+</div><div class='add'>+	/* VALIDENT is supposed to indicate "keep or not", but in SJA1105 E/T,</div><div class='add'>+	 * using it to delete a management route was unsupported. UM10944</div><div class='add'>+	 * said about it:</div><div class='add'>+	 *</div><div class='add'>+	 *   In case of a write access with the MGMTROUTE flag set,</div><div class='add'>+	 *   the flag will be ignored. It will always be found cleared</div><div class='add'>+	 *   for read accesses with the MGMTROUTE flag set.</div><div class='add'>+	 *</div><div class='add'>+	 * SJA1105 P/Q/R/S keeps the same behavior w.r.t. VALIDENT, but there</div><div class='add'>+	 * is now another flag called HOSTCMD which does more stuff (quoting</div><div class='add'>+	 * from UM11040):</div><div class='add'>+	 *</div><div class='add'>+	 *   A write request is accepted only when HOSTCMD is set to write host</div><div class='add'>+	 *   or invalid. A read request is accepted only when HOSTCMD is set to</div><div class='add'>+	 *   search host or read host.</div><div class='add'>+	 *</div><div class='add'>+	 * So it is possible to translate a RDWRSET/VALIDENT combination into</div><div class='add'>+	 * HOSTCMD so that we keep the dynamic command API in place, and</div><div class='add'>+	 * at the same time achieve compatibility with the management route</div><div class='add'>+	 * command structure.</div><div class='add'>+	 */</div><div class='add'>+	if (cmd-&gt;rdwrset == SPI_READ) {</div><div class='add'>+		if (cmd-&gt;search)</div><div class='add'>+			hostcmd = SJA1105_HOSTCMD_SEARCH;</div><div class='add'>+		else</div><div class='add'>+			hostcmd = SJA1105_HOSTCMD_READ;</div><div class='add'>+	} else {</div><div class='add'>+		/* SPI_WRITE */</div><div class='add'>+		if (cmd-&gt;valident)</div><div class='add'>+			hostcmd = SJA1105_HOSTCMD_WRITE;</div><div class='add'>+		else</div><div class='add'>+			hostcmd = SJA1105_HOSTCMD_INVALIDATE;</div><div class='add'>+	}</div><div class='add'>+	sja1105_packing(p, &amp;hostcmd, 25, 23, size, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+sja1105pqrs_l2_lookup_cmd_packing(void *buf, struct sja1105_dyn_cmd *cmd,</div><div class='add'>+				  enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	int entry_size = SJA1105PQRS_SIZE_L2_LOOKUP_ENTRY;</div><div class='add'>+</div><div class='add'>+	sja1105pqrs_common_l2_lookup_cmd_packing(buf, cmd, op, entry_size);</div><div class='add'>+</div><div class='add'>+	/* Hack - The hardware takes the 'index' field within</div><div class='add'>+	 * struct sja1105_l2_lookup_entry as the index on which this command</div><div class='add'>+	 * will operate. However it will ignore everything else, so 'index'</div><div class='add'>+	 * is logically part of command but physically part of entry.</div><div class='add'>+	 * Populate the 'index' entry field from within the command callback,</div><div class='add'>+	 * such that our API doesn't need to ask for a full-blown entry</div><div class='add'>+	 * structure when e.g. a delete is requested.</div><div class='add'>+	 */</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;index, 15, 6, entry_size, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+sja1110_l2_lookup_cmd_packing(void *buf, struct sja1105_dyn_cmd *cmd,</div><div class='add'>+			      enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	int entry_size = SJA1110_SIZE_L2_LOOKUP_ENTRY;</div><div class='add'>+</div><div class='add'>+	sja1105pqrs_common_l2_lookup_cmd_packing(buf, cmd, op, entry_size);</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;index, 10, 1, entry_size, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The switch is so retarded that it makes our command/entry abstraction</div><div class='add'>+ * crumble apart.</div><div class='add'>+ *</div><div class='add'>+ * On P/Q/R/S, the switch tries to say whether a FDB entry</div><div class='add'>+ * is statically programmed or dynamically learned via a flag called LOCKEDS.</div><div class='add'>+ * The hardware manual says about this fiels:</div><div class='add'>+ *</div><div class='add'>+ *   On write will specify the format of ENTRY.</div><div class='add'>+ *   On read the flag will be found cleared at times the VALID flag is found</div><div class='add'>+ *   set.  The flag will also be found cleared in response to a read having the</div><div class='add'>+ *   MGMTROUTE flag set.  In response to a read with the MGMTROUTE flag</div><div class='add'>+ *   cleared, the flag be set if the most recent access operated on an entry</div><div class='add'>+ *   that was either loaded by configuration or through dynamic reconfiguration</div><div class='add'>+ *   (as opposed to automatically learned entries).</div><div class='add'>+ *</div><div class='add'>+ * The trouble with this flag is that it's part of the *command* to access the</div><div class='add'>+ * dynamic interface, and not part of the *entry* retrieved from it.</div><div class='add'>+ * Otherwise said, for a sja1105_dynamic_config_read, LOCKEDS is supposed to be</div><div class='add'>+ * an output from the switch into the command buffer, and for a</div><div class='add'>+ * sja1105_dynamic_config_write, the switch treats LOCKEDS as an input</div><div class='add'>+ * (hence we can write either static, or automatically learned entries, from</div><div class='add'>+ * the core).</div><div class='add'>+ * But the manual contradicts itself in the last phrase where it says that on</div><div class='add'>+ * read, LOCKEDS will be set to 1 for all FDB entries written through the</div><div class='add'>+ * dynamic interface (therefore, the value of LOCKEDS from the</div><div class='add'>+ * sja1105_dynamic_config_write is not really used for anything, it'll store a</div><div class='add'>+ * 1 anyway).</div><div class='add'>+ * This means you can't really write a FDB entry with LOCKEDS=0 (automatically</div><div class='add'>+ * learned) into the switch, which kind of makes sense.</div><div class='add'>+ * As for reading through the dynamic interface, it doesn't make too much sense</div><div class='add'>+ * to put LOCKEDS into the command, since the switch will inevitably have to</div><div class='add'>+ * ignore it (otherwise a command would be like "read the FDB entry 123, but</div><div class='add'>+ * only if it's dynamically learned" &lt;- well how am I supposed to know?) and</div><div class='add'>+ * just use it as an output buffer for its findings. But guess what... that's</div><div class='add'>+ * what the entry buffer is for!</div><div class='add'>+ * Unfortunately, what really breaks this abstraction is the fact that it</div><div class='add'>+ * wasn't designed having the fact in mind that the switch can output</div><div class='add'>+ * entry-related data as writeback through the command buffer.</div><div class='add'>+ * However, whether a FDB entry is statically or dynamically learned *is* part</div><div class='add'>+ * of the entry and not the command data, no matter what the switch thinks.</div><div class='add'>+ * In order to do that, we'll need to wrap around the</div><div class='add'>+ * sja1105pqrs_l2_lookup_entry_packing from sja1105_static_config.c, and take</div><div class='add'>+ * a peek outside of the caller-supplied @buf (the entry buffer), to reach the</div><div class='add'>+ * command buffer.</div><div class='add'>+ */</div><div class='add'>+static size_t</div><div class='add'>+sja1105pqrs_dyn_l2_lookup_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_l2_lookup_entry *entry = entry_ptr;</div><div class='add'>+	u8 *cmd = buf + SJA1105PQRS_SIZE_L2_LOOKUP_ENTRY;</div><div class='add'>+	const int size = SJA1105_SIZE_DYN_CMD;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(cmd, &amp;entry-&gt;lockeds, 28, 28, size, op);</div><div class='add'>+</div><div class='add'>+	return sja1105pqrs_l2_lookup_entry_packing(buf, entry_ptr, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t sja1110_dyn_l2_lookup_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+						  enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_l2_lookup_entry *entry = entry_ptr;</div><div class='add'>+	u8 *cmd = buf + SJA1110_SIZE_L2_LOOKUP_ENTRY;</div><div class='add'>+	const int size = SJA1105_SIZE_DYN_CMD;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(cmd, &amp;entry-&gt;lockeds, 28, 28, size, op);</div><div class='add'>+</div><div class='add'>+	return sja1110_l2_lookup_entry_packing(buf, entry_ptr, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+sja1105et_l2_lookup_cmd_packing(void *buf, struct sja1105_dyn_cmd *cmd,</div><div class='add'>+				enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	u8 *p = buf + SJA1105ET_SIZE_L2_LOOKUP_ENTRY;</div><div class='add'>+	const int size = SJA1105_SIZE_DYN_CMD;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;valid,    31, 31, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;rdwrset,  30, 30, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;errors,   29, 29, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;valident, 27, 27, size, op);</div><div class='add'>+	/* Hack - see comments above. */</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;index, 29, 20,</div><div class='add'>+			SJA1105ET_SIZE_L2_LOOKUP_ENTRY, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t sja1105et_dyn_l2_lookup_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+						    enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_l2_lookup_entry *entry = entry_ptr;</div><div class='add'>+	u8 *cmd = buf + SJA1105ET_SIZE_L2_LOOKUP_ENTRY;</div><div class='add'>+	const int size = SJA1105_SIZE_DYN_CMD;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(cmd, &amp;entry-&gt;lockeds, 28, 28, size, op);</div><div class='add'>+</div><div class='add'>+	return sja1105et_l2_lookup_entry_packing(buf, entry_ptr, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+sja1105et_mgmt_route_cmd_packing(void *buf, struct sja1105_dyn_cmd *cmd,</div><div class='add'>+				 enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	u8 *p = buf + SJA1105ET_SIZE_L2_LOOKUP_ENTRY;</div><div class='add'>+	u64 mgmtroute = 1;</div><div class='add'>+</div><div class='add'>+	sja1105et_l2_lookup_cmd_packing(buf, cmd, op);</div><div class='add'>+	if (op == PACK)</div><div class='add'>+		sja1105_pack(p, &amp;mgmtroute, 26, 26, SJA1105_SIZE_DYN_CMD);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t sja1105et_mgmt_route_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+						 enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_mgmt_entry *entry = entry_ptr;</div><div class='add'>+	const size_t size = SJA1105ET_SIZE_L2_LOOKUP_ENTRY;</div><div class='add'>+</div><div class='add'>+	/* UM10944: To specify if a PTP egress timestamp shall be captured on</div><div class='add'>+	 * each port upon transmission of the frame, the LSB of VLANID in the</div><div class='add'>+	 * ENTRY field provided by the host must be set.</div><div class='add'>+	 * Bit 1 of VLANID then specifies the register where the timestamp for</div><div class='add'>+	 * this port is stored in.</div><div class='add'>+	 */</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;tsreg,     85, 85, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;takets,    84, 84, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;macaddr,   83, 36, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;destports, 35, 31, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;enfport,   30, 30, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+sja1105pqrs_mgmt_route_cmd_packing(void *buf, struct sja1105_dyn_cmd *cmd,</div><div class='add'>+				   enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	u8 *p = buf + SJA1105PQRS_SIZE_L2_LOOKUP_ENTRY;</div><div class='add'>+	u64 mgmtroute = 1;</div><div class='add'>+</div><div class='add'>+	sja1105pqrs_l2_lookup_cmd_packing(buf, cmd, op);</div><div class='add'>+	if (op == PACK)</div><div class='add'>+		sja1105_pack(p, &amp;mgmtroute, 26, 26, SJA1105_SIZE_DYN_CMD);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t sja1105pqrs_mgmt_route_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+						   enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const size_t size = SJA1105PQRS_SIZE_L2_LOOKUP_ENTRY;</div><div class='add'>+	struct sja1105_mgmt_entry *entry = entry_ptr;</div><div class='add'>+</div><div class='add'>+	/* In P/Q/R/S, enfport got renamed to mgmtvalid, but its purpose</div><div class='add'>+	 * is the same (driver uses it to confirm that frame was sent).</div><div class='add'>+	 * So just keep the name from E/T.</div><div class='add'>+	 */</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;tsreg,     71, 71, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;takets,    70, 70, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;macaddr,   69, 22, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;destports, 21, 17, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;enfport,   16, 16, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* In E/T, entry is at addresses 0x27-0x28. There is a 4 byte gap at 0x29,</div><div class='add'>+ * and command is at 0x2a. Similarly in P/Q/R/S there is a 1 register gap</div><div class='add'>+ * between entry (0x2d, 0x2e) and command (0x30).</div><div class='add'>+ */</div><div class='add'>+static void</div><div class='add'>+sja1105_vlan_lookup_cmd_packing(void *buf, struct sja1105_dyn_cmd *cmd,</div><div class='add'>+				enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	u8 *p = buf + SJA1105_SIZE_VLAN_LOOKUP_ENTRY + 4;</div><div class='add'>+	const int size = SJA1105_SIZE_DYN_CMD;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;valid,    31, 31, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;rdwrset,  30, 30, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;valident, 27, 27, size, op);</div><div class='add'>+	/* Hack - see comments above, applied for 'vlanid' field of</div><div class='add'>+	 * struct sja1105_vlan_lookup_entry.</div><div class='add'>+	 */</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;index, 38, 27,</div><div class='add'>+			SJA1105_SIZE_VLAN_LOOKUP_ENTRY, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* In SJA1110 there is no gap between the command and the data, yay... */</div><div class='add'>+static void</div><div class='add'>+sja1110_vlan_lookup_cmd_packing(void *buf, struct sja1105_dyn_cmd *cmd,</div><div class='add'>+				enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	u8 *p = buf + SJA1110_SIZE_VLAN_LOOKUP_ENTRY;</div><div class='add'>+	const int size = SJA1105_SIZE_DYN_CMD;</div><div class='add'>+	u64 type_entry = 0;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;valid,   31, 31, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;rdwrset, 30, 30, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;errors,  29, 29, size, op);</div><div class='add'>+	/* Hack: treat 'vlanid' field of struct sja1105_vlan_lookup_entry as</div><div class='add'>+	 * cmd-&gt;index.</div><div class='add'>+	 */</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;index, 38, 27,</div><div class='add'>+			SJA1110_SIZE_VLAN_LOOKUP_ENTRY, op);</div><div class='add'>+</div><div class='add'>+	/* But the VALIDENT bit has disappeared, now we are supposed to</div><div class='add'>+	 * invalidate an entry through the TYPE_ENTRY field of the entry..</div><div class='add'>+	 * This is a hack to transform the non-zero quality of the TYPE_ENTRY</div><div class='add'>+	 * field into a VALIDENT bit.</div><div class='add'>+	 */</div><div class='add'>+	if (op == PACK &amp;&amp; !cmd-&gt;valident) {</div><div class='add'>+		sja1105_packing(buf, &amp;type_entry, 40, 39,</div><div class='add'>+				SJA1110_SIZE_VLAN_LOOKUP_ENTRY, PACK);</div><div class='add'>+	} else if (op == UNPACK) {</div><div class='add'>+		sja1105_packing(buf, &amp;type_entry, 40, 39,</div><div class='add'>+				SJA1110_SIZE_VLAN_LOOKUP_ENTRY, UNPACK);</div><div class='add'>+		cmd-&gt;valident = !!type_entry;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+sja1105_l2_forwarding_cmd_packing(void *buf, struct sja1105_dyn_cmd *cmd,</div><div class='add'>+				  enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	u8 *p = buf + SJA1105_SIZE_L2_FORWARDING_ENTRY;</div><div class='add'>+	const int size = SJA1105_SIZE_DYN_CMD;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;valid,   31, 31, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;errors,  30, 30, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;rdwrset, 29, 29, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;index,    4,  0, size, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+sja1110_l2_forwarding_cmd_packing(void *buf, struct sja1105_dyn_cmd *cmd,</div><div class='add'>+				  enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	u8 *p = buf + SJA1105_SIZE_L2_FORWARDING_ENTRY;</div><div class='add'>+	const int size = SJA1105_SIZE_DYN_CMD;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;valid,   31, 31, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;rdwrset, 30, 30, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;errors,  29, 29, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;index,    4,  0, size, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+sja1105et_mac_config_cmd_packing(void *buf, struct sja1105_dyn_cmd *cmd,</div><div class='add'>+				 enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const int size = SJA1105_SIZE_DYN_CMD;</div><div class='add'>+	/* Yup, user manual definitions are reversed */</div><div class='add'>+	u8 *reg1 = buf + 4;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(reg1, &amp;cmd-&gt;valid, 31, 31, size, op);</div><div class='add'>+	sja1105_packing(reg1, &amp;cmd-&gt;index, 26, 24, size, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t sja1105et_mac_config_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+						 enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const int size = SJA1105ET_SIZE_MAC_CONFIG_DYN_ENTRY;</div><div class='add'>+	struct sja1105_mac_config_entry *entry = entry_ptr;</div><div class='add'>+	/* Yup, user manual definitions are reversed */</div><div class='add'>+	u8 *reg1 = buf + 4;</div><div class='add'>+	u8 *reg2 = buf;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(reg1, &amp;entry-&gt;speed,     30, 29, size, op);</div><div class='add'>+	sja1105_packing(reg1, &amp;entry-&gt;drpdtag,   23, 23, size, op);</div><div class='add'>+	sja1105_packing(reg1, &amp;entry-&gt;drpuntag,  22, 22, size, op);</div><div class='add'>+	sja1105_packing(reg1, &amp;entry-&gt;retag,     21, 21, size, op);</div><div class='add'>+	sja1105_packing(reg1, &amp;entry-&gt;dyn_learn, 20, 20, size, op);</div><div class='add'>+	sja1105_packing(reg1, &amp;entry-&gt;egress,    19, 19, size, op);</div><div class='add'>+	sja1105_packing(reg1, &amp;entry-&gt;ingress,   18, 18, size, op);</div><div class='add'>+	sja1105_packing(reg1, &amp;entry-&gt;ing_mirr,  17, 17, size, op);</div><div class='add'>+	sja1105_packing(reg1, &amp;entry-&gt;egr_mirr,  16, 16, size, op);</div><div class='add'>+	sja1105_packing(reg1, &amp;entry-&gt;vlanprio,  14, 12, size, op);</div><div class='add'>+	sja1105_packing(reg1, &amp;entry-&gt;vlanid,    11,  0, size, op);</div><div class='add'>+	sja1105_packing(reg2, &amp;entry-&gt;tp_delin,  31, 16, size, op);</div><div class='add'>+	sja1105_packing(reg2, &amp;entry-&gt;tp_delout, 15,  0, size, op);</div><div class='add'>+	/* MAC configuration table entries which can't be reconfigured:</div><div class='add'>+	 * top, base, enabled, ifg, maxage, drpnona664</div><div class='add'>+	 */</div><div class='add'>+	/* Bogus return value, not used anywhere */</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+sja1105pqrs_mac_config_cmd_packing(void *buf, struct sja1105_dyn_cmd *cmd,</div><div class='add'>+				   enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const int size = SJA1105ET_SIZE_MAC_CONFIG_DYN_ENTRY;</div><div class='add'>+	u8 *p = buf + SJA1105PQRS_SIZE_MAC_CONFIG_ENTRY;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;valid,   31, 31, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;errors,  30, 30, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;rdwrset, 29, 29, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;index,    2,  0, size, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+sja1110_mac_config_cmd_packing(void *buf, struct sja1105_dyn_cmd *cmd,</div><div class='add'>+			       enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	u8 *p = buf + SJA1105PQRS_SIZE_MAC_CONFIG_ENTRY;</div><div class='add'>+	const int size = SJA1105_SIZE_DYN_CMD;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;valid,   31, 31, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;rdwrset, 30, 30, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;errors,  29, 29, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;index,    3,  0, size, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+sja1105et_l2_lookup_params_cmd_packing(void *buf, struct sja1105_dyn_cmd *cmd,</div><div class='add'>+				       enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;valid, 31, 31,</div><div class='add'>+			SJA1105ET_SIZE_L2_LOOKUP_PARAMS_DYN_CMD, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t</div><div class='add'>+sja1105et_l2_lookup_params_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					 enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_l2_lookup_params_entry *entry = entry_ptr;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;poly, 7, 0,</div><div class='add'>+			SJA1105ET_SIZE_L2_LOOKUP_PARAMS_DYN_CMD, op);</div><div class='add'>+	/* Bogus return value, not used anywhere */</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+sja1105pqrs_l2_lookup_params_cmd_packing(void *buf,</div><div class='add'>+					 struct sja1105_dyn_cmd *cmd,</div><div class='add'>+					 enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	u8 *p = buf + SJA1105PQRS_SIZE_L2_LOOKUP_PARAMS_ENTRY;</div><div class='add'>+	const int size = SJA1105_SIZE_DYN_CMD;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;valid,   31, 31, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;rdwrset, 30, 30, size, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+sja1110_l2_lookup_params_cmd_packing(void *buf, struct sja1105_dyn_cmd *cmd,</div><div class='add'>+				     enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	u8 *p = buf + SJA1110_SIZE_L2_LOOKUP_PARAMS_ENTRY;</div><div class='add'>+	const int size = SJA1105_SIZE_DYN_CMD;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;valid,   31, 31, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;rdwrset, 30, 30, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;errors,  29, 29, size, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+sja1105et_general_params_cmd_packing(void *buf, struct sja1105_dyn_cmd *cmd,</div><div class='add'>+				     enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const int size = SJA1105ET_SIZE_GENERAL_PARAMS_DYN_CMD;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;valid,  31, 31, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;errors, 30, 30, size, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t</div><div class='add'>+sja1105et_general_params_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+				       enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_general_params_entry *entry = entry_ptr;</div><div class='add'>+	const int size = SJA1105ET_SIZE_GENERAL_PARAMS_DYN_CMD;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;mirr_port, 2, 0, size, op);</div><div class='add'>+	/* Bogus return value, not used anywhere */</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+sja1105pqrs_general_params_cmd_packing(void *buf, struct sja1105_dyn_cmd *cmd,</div><div class='add'>+				       enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	u8 *p = buf + SJA1105PQRS_SIZE_GENERAL_PARAMS_ENTRY;</div><div class='add'>+	const int size = SJA1105_SIZE_DYN_CMD;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;valid,   31, 31, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;errors,  30, 30, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;rdwrset, 28, 28, size, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+sja1110_general_params_cmd_packing(void *buf, struct sja1105_dyn_cmd *cmd,</div><div class='add'>+				   enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	u8 *p = buf + SJA1110_SIZE_GENERAL_PARAMS_ENTRY;</div><div class='add'>+	const int size = SJA1105_SIZE_DYN_CMD;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;valid,   31, 31, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;rdwrset, 30, 30, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;errors,  29, 29, size, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+sja1105pqrs_avb_params_cmd_packing(void *buf, struct sja1105_dyn_cmd *cmd,</div><div class='add'>+				   enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	u8 *p = buf + SJA1105PQRS_SIZE_AVB_PARAMS_ENTRY;</div><div class='add'>+	const int size = SJA1105_SIZE_DYN_CMD;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;valid,   31, 31, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;errors,  30, 30, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;rdwrset, 29, 29, size, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+sja1105_retagging_cmd_packing(void *buf, struct sja1105_dyn_cmd *cmd,</div><div class='add'>+			      enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	u8 *p = buf + SJA1105_SIZE_RETAGGING_ENTRY;</div><div class='add'>+	const int size = SJA1105_SIZE_DYN_CMD;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;valid,    31, 31, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;errors,   30, 30, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;valident, 29, 29, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;rdwrset,  28, 28, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;index,     5,  0, size, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+sja1110_retagging_cmd_packing(void *buf, struct sja1105_dyn_cmd *cmd,</div><div class='add'>+			      enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	u8 *p = buf + SJA1105_SIZE_RETAGGING_ENTRY;</div><div class='add'>+	const int size = SJA1105_SIZE_DYN_CMD;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;valid,    31, 31, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;rdwrset,  30, 30, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;errors,   29, 29, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;valident, 28, 28, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;index,     4,  0, size, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sja1105et_cbs_cmd_packing(void *buf, struct sja1105_dyn_cmd *cmd,</div><div class='add'>+				      enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	u8 *p = buf + SJA1105ET_SIZE_CBS_ENTRY;</div><div class='add'>+	const int size = SJA1105_SIZE_DYN_CMD;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;valid, 31, 31, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;index, 19, 16, size, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t sja1105et_cbs_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					  enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const size_t size = SJA1105ET_SIZE_CBS_ENTRY;</div><div class='add'>+	struct sja1105_cbs_entry *entry = entry_ptr;</div><div class='add'>+	u8 *cmd = buf + size;</div><div class='add'>+	u32 *p = buf;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(cmd, &amp;entry-&gt;port, 5, 3, SJA1105_SIZE_DYN_CMD, op);</div><div class='add'>+	sja1105_packing(cmd, &amp;entry-&gt;prio, 2, 0, SJA1105_SIZE_DYN_CMD, op);</div><div class='add'>+	sja1105_packing(p + 3, &amp;entry-&gt;credit_lo,  31, 0, size, op);</div><div class='add'>+	sja1105_packing(p + 2, &amp;entry-&gt;credit_hi,  31, 0, size, op);</div><div class='add'>+	sja1105_packing(p + 1, &amp;entry-&gt;send_slope, 31, 0, size, op);</div><div class='add'>+	sja1105_packing(p + 0, &amp;entry-&gt;idle_slope, 31, 0, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sja1105pqrs_cbs_cmd_packing(void *buf, struct sja1105_dyn_cmd *cmd,</div><div class='add'>+					enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	u8 *p = buf + SJA1105PQRS_SIZE_CBS_ENTRY;</div><div class='add'>+	const int size = SJA1105_SIZE_DYN_CMD;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;valid,   31, 31, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;rdwrset, 30, 30, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;errors,  29, 29, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;index,    3,  0, size, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sja1110_cbs_cmd_packing(void *buf, struct sja1105_dyn_cmd *cmd,</div><div class='add'>+				    enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	u8 *p = buf + SJA1105PQRS_SIZE_CBS_ENTRY;</div><div class='add'>+	const int size = SJA1105_SIZE_DYN_CMD;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;valid,   31, 31, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;rdwrset, 30, 30, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;errors,  29, 29, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;index,    7,  0, size, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t sja1105pqrs_cbs_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					    enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const size_t size = SJA1105PQRS_SIZE_CBS_ENTRY;</div><div class='add'>+	struct sja1105_cbs_entry *entry = entry_ptr;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;port,      159, 157, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;prio,      156, 154, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;credit_lo, 153, 122, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;credit_hi, 121,  90, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;send_slope, 89,  58, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;idle_slope, 57,  26, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t sja1110_cbs_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const size_t size = SJA1105PQRS_SIZE_CBS_ENTRY;</div><div class='add'>+	struct sja1105_cbs_entry *entry = entry_ptr;</div><div class='add'>+	u64 entry_type = SJA1110_CBS_SHAPER;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;entry_type,       159, 159, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;credit_lo, 151, 120, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;credit_hi, 119,  88, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;send_slope, 87,  56, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;idle_slope, 55,  24, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sja1110_dummy_cmd_packing(void *buf, struct sja1105_dyn_cmd *cmd,</div><div class='add'>+				      enum packing_op op)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+sja1110_l2_policing_cmd_packing(void *buf, struct sja1105_dyn_cmd *cmd,</div><div class='add'>+				enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	u8 *p = buf + SJA1105_SIZE_L2_POLICING_ENTRY;</div><div class='add'>+	const int size = SJA1105_SIZE_DYN_CMD;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;valid,   31, 31, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;rdwrset, 30, 30, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;errors,  29, 29, size, op);</div><div class='add'>+	sja1105_packing(p, &amp;cmd-&gt;index,    6,  0, size, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define OP_READ		BIT(0)</div><div class='add'>+#define OP_WRITE	BIT(1)</div><div class='add'>+#define OP_DEL		BIT(2)</div><div class='add'>+#define OP_SEARCH	BIT(3)</div><div class='add'>+#define OP_VALID_ANYWAY	BIT(4)</div><div class='add'>+</div><div class='add'>+/* SJA1105E/T: First generation */</div><div class='add'>+const struct sja1105_dynamic_table_ops sja1105et_dyn_ops[BLK_IDX_MAX_DYN] = {</div><div class='add'>+	[BLK_IDX_VL_LOOKUP] = {</div><div class='add'>+		.entry_packing = sja1105et_vl_lookup_entry_packing,</div><div class='add'>+		.cmd_packing = sja1105et_vl_lookup_cmd_packing,</div><div class='add'>+		.access = OP_WRITE,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_VL_LOOKUP_COUNT,</div><div class='add'>+		.packed_size = SJA1105ET_SIZE_VL_LOOKUP_DYN_CMD,</div><div class='add'>+		.addr = 0x35,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_LOOKUP] = {</div><div class='add'>+		.entry_packing = sja1105et_dyn_l2_lookup_entry_packing,</div><div class='add'>+		.cmd_packing = sja1105et_l2_lookup_cmd_packing,</div><div class='add'>+		.access = (OP_READ | OP_WRITE | OP_DEL),</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_LOOKUP_COUNT,</div><div class='add'>+		.packed_size = SJA1105ET_SIZE_L2_LOOKUP_DYN_CMD,</div><div class='add'>+		.addr = 0x20,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_MGMT_ROUTE] = {</div><div class='add'>+		.entry_packing = sja1105et_mgmt_route_entry_packing,</div><div class='add'>+		.cmd_packing = sja1105et_mgmt_route_cmd_packing,</div><div class='add'>+		.access = (OP_READ | OP_WRITE | OP_VALID_ANYWAY),</div><div class='add'>+		.max_entry_count = SJA1105_NUM_PORTS,</div><div class='add'>+		.packed_size = SJA1105ET_SIZE_L2_LOOKUP_DYN_CMD,</div><div class='add'>+		.addr = 0x20,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_VLAN_LOOKUP] = {</div><div class='add'>+		.entry_packing = sja1105_vlan_lookup_entry_packing,</div><div class='add'>+		.cmd_packing = sja1105_vlan_lookup_cmd_packing,</div><div class='add'>+		.access = (OP_WRITE | OP_DEL),</div><div class='add'>+		.max_entry_count = SJA1105_MAX_VLAN_LOOKUP_COUNT,</div><div class='add'>+		.packed_size = SJA1105_SIZE_VLAN_LOOKUP_DYN_CMD,</div><div class='add'>+		.addr = 0x27,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_FORWARDING] = {</div><div class='add'>+		.entry_packing = sja1105_l2_forwarding_entry_packing,</div><div class='add'>+		.cmd_packing = sja1105_l2_forwarding_cmd_packing,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_FORWARDING_COUNT,</div><div class='add'>+		.access = OP_WRITE,</div><div class='add'>+		.packed_size = SJA1105_SIZE_L2_FORWARDING_DYN_CMD,</div><div class='add'>+		.addr = 0x24,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_MAC_CONFIG] = {</div><div class='add'>+		.entry_packing = sja1105et_mac_config_entry_packing,</div><div class='add'>+		.cmd_packing = sja1105et_mac_config_cmd_packing,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_MAC_CONFIG_COUNT,</div><div class='add'>+		.access = OP_WRITE,</div><div class='add'>+		.packed_size = SJA1105ET_SIZE_MAC_CONFIG_DYN_CMD,</div><div class='add'>+		.addr = 0x36,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_LOOKUP_PARAMS] = {</div><div class='add'>+		.entry_packing = sja1105et_l2_lookup_params_entry_packing,</div><div class='add'>+		.cmd_packing = sja1105et_l2_lookup_params_cmd_packing,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_LOOKUP_PARAMS_COUNT,</div><div class='add'>+		.access = OP_WRITE,</div><div class='add'>+		.packed_size = SJA1105ET_SIZE_L2_LOOKUP_PARAMS_DYN_CMD,</div><div class='add'>+		.addr = 0x38,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_GENERAL_PARAMS] = {</div><div class='add'>+		.entry_packing = sja1105et_general_params_entry_packing,</div><div class='add'>+		.cmd_packing = sja1105et_general_params_cmd_packing,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_GENERAL_PARAMS_COUNT,</div><div class='add'>+		.access = OP_WRITE,</div><div class='add'>+		.packed_size = SJA1105ET_SIZE_GENERAL_PARAMS_DYN_CMD,</div><div class='add'>+		.addr = 0x34,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_RETAGGING] = {</div><div class='add'>+		.entry_packing = sja1105_retagging_entry_packing,</div><div class='add'>+		.cmd_packing = sja1105_retagging_cmd_packing,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_RETAGGING_COUNT,</div><div class='add'>+		.access = (OP_WRITE | OP_DEL),</div><div class='add'>+		.packed_size = SJA1105_SIZE_RETAGGING_DYN_CMD,</div><div class='add'>+		.addr = 0x31,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_CBS] = {</div><div class='add'>+		.entry_packing = sja1105et_cbs_entry_packing,</div><div class='add'>+		.cmd_packing = sja1105et_cbs_cmd_packing,</div><div class='add'>+		.max_entry_count = SJA1105ET_MAX_CBS_COUNT,</div><div class='add'>+		.access = OP_WRITE,</div><div class='add'>+		.packed_size = SJA1105ET_SIZE_CBS_DYN_CMD,</div><div class='add'>+		.addr = 0x2c,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SJA1105P/Q/R/S: Second generation */</div><div class='add'>+const struct sja1105_dynamic_table_ops sja1105pqrs_dyn_ops[BLK_IDX_MAX_DYN] = {</div><div class='add'>+	[BLK_IDX_VL_LOOKUP] = {</div><div class='add'>+		.entry_packing = sja1105_vl_lookup_entry_packing,</div><div class='add'>+		.cmd_packing = sja1105pqrs_vl_lookup_cmd_packing,</div><div class='add'>+		.access = (OP_READ | OP_WRITE),</div><div class='add'>+		.max_entry_count = SJA1105_MAX_VL_LOOKUP_COUNT,</div><div class='add'>+		.packed_size = SJA1105PQRS_SIZE_VL_LOOKUP_DYN_CMD,</div><div class='add'>+		.addr = 0x47,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_LOOKUP] = {</div><div class='add'>+		.entry_packing = sja1105pqrs_dyn_l2_lookup_entry_packing,</div><div class='add'>+		.cmd_packing = sja1105pqrs_l2_lookup_cmd_packing,</div><div class='add'>+		.access = (OP_READ | OP_WRITE | OP_DEL | OP_SEARCH),</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_LOOKUP_COUNT,</div><div class='add'>+		.packed_size = SJA1105PQRS_SIZE_L2_LOOKUP_DYN_CMD,</div><div class='add'>+		.addr = 0x24,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_MGMT_ROUTE] = {</div><div class='add'>+		.entry_packing = sja1105pqrs_mgmt_route_entry_packing,</div><div class='add'>+		.cmd_packing = sja1105pqrs_mgmt_route_cmd_packing,</div><div class='add'>+		.access = (OP_READ | OP_WRITE | OP_DEL | OP_SEARCH | OP_VALID_ANYWAY),</div><div class='add'>+		.max_entry_count = SJA1105_NUM_PORTS,</div><div class='add'>+		.packed_size = SJA1105PQRS_SIZE_L2_LOOKUP_DYN_CMD,</div><div class='add'>+		.addr = 0x24,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_VLAN_LOOKUP] = {</div><div class='add'>+		.entry_packing = sja1105_vlan_lookup_entry_packing,</div><div class='add'>+		.cmd_packing = sja1105_vlan_lookup_cmd_packing,</div><div class='add'>+		.access = (OP_READ | OP_WRITE | OP_DEL),</div><div class='add'>+		.max_entry_count = SJA1105_MAX_VLAN_LOOKUP_COUNT,</div><div class='add'>+		.packed_size = SJA1105_SIZE_VLAN_LOOKUP_DYN_CMD,</div><div class='add'>+		.addr = 0x2D,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_FORWARDING] = {</div><div class='add'>+		.entry_packing = sja1105_l2_forwarding_entry_packing,</div><div class='add'>+		.cmd_packing = sja1105_l2_forwarding_cmd_packing,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_FORWARDING_COUNT,</div><div class='add'>+		.access = OP_WRITE,</div><div class='add'>+		.packed_size = SJA1105_SIZE_L2_FORWARDING_DYN_CMD,</div><div class='add'>+		.addr = 0x2A,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_MAC_CONFIG] = {</div><div class='add'>+		.entry_packing = sja1105pqrs_mac_config_entry_packing,</div><div class='add'>+		.cmd_packing = sja1105pqrs_mac_config_cmd_packing,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_MAC_CONFIG_COUNT,</div><div class='add'>+		.access = (OP_READ | OP_WRITE),</div><div class='add'>+		.packed_size = SJA1105PQRS_SIZE_MAC_CONFIG_DYN_CMD,</div><div class='add'>+		.addr = 0x4B,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_LOOKUP_PARAMS] = {</div><div class='add'>+		.entry_packing = sja1105pqrs_l2_lookup_params_entry_packing,</div><div class='add'>+		.cmd_packing = sja1105pqrs_l2_lookup_params_cmd_packing,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_LOOKUP_PARAMS_COUNT,</div><div class='add'>+		.access = (OP_READ | OP_WRITE),</div><div class='add'>+		.packed_size = SJA1105PQRS_SIZE_L2_LOOKUP_PARAMS_DYN_CMD,</div><div class='add'>+		.addr = 0x54,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_AVB_PARAMS] = {</div><div class='add'>+		.entry_packing = sja1105pqrs_avb_params_entry_packing,</div><div class='add'>+		.cmd_packing = sja1105pqrs_avb_params_cmd_packing,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_AVB_PARAMS_COUNT,</div><div class='add'>+		.access = (OP_READ | OP_WRITE),</div><div class='add'>+		.packed_size = SJA1105PQRS_SIZE_AVB_PARAMS_DYN_CMD,</div><div class='add'>+		.addr = 0x8003,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_GENERAL_PARAMS] = {</div><div class='add'>+		.entry_packing = sja1105pqrs_general_params_entry_packing,</div><div class='add'>+		.cmd_packing = sja1105pqrs_general_params_cmd_packing,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_GENERAL_PARAMS_COUNT,</div><div class='add'>+		.access = (OP_READ | OP_WRITE),</div><div class='add'>+		.packed_size = SJA1105PQRS_SIZE_GENERAL_PARAMS_DYN_CMD,</div><div class='add'>+		.addr = 0x3B,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_RETAGGING] = {</div><div class='add'>+		.entry_packing = sja1105_retagging_entry_packing,</div><div class='add'>+		.cmd_packing = sja1105_retagging_cmd_packing,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_RETAGGING_COUNT,</div><div class='add'>+		.access = (OP_READ | OP_WRITE | OP_DEL),</div><div class='add'>+		.packed_size = SJA1105_SIZE_RETAGGING_DYN_CMD,</div><div class='add'>+		.addr = 0x38,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_CBS] = {</div><div class='add'>+		.entry_packing = sja1105pqrs_cbs_entry_packing,</div><div class='add'>+		.cmd_packing = sja1105pqrs_cbs_cmd_packing,</div><div class='add'>+		.max_entry_count = SJA1105PQRS_MAX_CBS_COUNT,</div><div class='add'>+		.access = OP_WRITE,</div><div class='add'>+		.packed_size = SJA1105PQRS_SIZE_CBS_DYN_CMD,</div><div class='add'>+		.addr = 0x32,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SJA1110: Third generation */</div><div class='add'>+const struct sja1105_dynamic_table_ops sja1110_dyn_ops[BLK_IDX_MAX_DYN] = {</div><div class='add'>+	[BLK_IDX_VL_LOOKUP] = {</div><div class='add'>+		.entry_packing = sja1110_vl_lookup_entry_packing,</div><div class='add'>+		.cmd_packing = sja1110_vl_lookup_cmd_packing,</div><div class='add'>+		.access = (OP_READ | OP_WRITE | OP_VALID_ANYWAY),</div><div class='add'>+		.max_entry_count = SJA1110_MAX_VL_LOOKUP_COUNT,</div><div class='add'>+		.packed_size = SJA1105PQRS_SIZE_VL_LOOKUP_DYN_CMD,</div><div class='add'>+		.addr = SJA1110_SPI_ADDR(0x124),</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_VL_POLICING] = {</div><div class='add'>+		.entry_packing = sja1110_vl_policing_entry_packing,</div><div class='add'>+		.cmd_packing = sja1110_vl_policing_cmd_packing,</div><div class='add'>+		.access = (OP_READ | OP_WRITE | OP_VALID_ANYWAY),</div><div class='add'>+		.max_entry_count = SJA1110_MAX_VL_POLICING_COUNT,</div><div class='add'>+		.packed_size = SJA1110_SIZE_VL_POLICING_DYN_CMD,</div><div class='add'>+		.addr = SJA1110_SPI_ADDR(0x310),</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_LOOKUP] = {</div><div class='add'>+		.entry_packing = sja1110_dyn_l2_lookup_entry_packing,</div><div class='add'>+		.cmd_packing = sja1110_l2_lookup_cmd_packing,</div><div class='add'>+		.access = (OP_READ | OP_WRITE | OP_DEL | OP_SEARCH),</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_LOOKUP_COUNT,</div><div class='add'>+		.packed_size = SJA1110_SIZE_L2_LOOKUP_DYN_CMD,</div><div class='add'>+		.addr = SJA1110_SPI_ADDR(0x8c),</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_VLAN_LOOKUP] = {</div><div class='add'>+		.entry_packing = sja1110_vlan_lookup_entry_packing,</div><div class='add'>+		.cmd_packing = sja1110_vlan_lookup_cmd_packing,</div><div class='add'>+		.access = (OP_READ | OP_WRITE | OP_DEL),</div><div class='add'>+		.max_entry_count = SJA1105_MAX_VLAN_LOOKUP_COUNT,</div><div class='add'>+		.packed_size = SJA1110_SIZE_VLAN_LOOKUP_DYN_CMD,</div><div class='add'>+		.addr = SJA1110_SPI_ADDR(0xb4),</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_FORWARDING] = {</div><div class='add'>+		.entry_packing = sja1110_l2_forwarding_entry_packing,</div><div class='add'>+		.cmd_packing = sja1110_l2_forwarding_cmd_packing,</div><div class='add'>+		.max_entry_count = SJA1110_MAX_L2_FORWARDING_COUNT,</div><div class='add'>+		.access = (OP_READ | OP_WRITE | OP_VALID_ANYWAY),</div><div class='add'>+		.packed_size = SJA1105_SIZE_L2_FORWARDING_DYN_CMD,</div><div class='add'>+		.addr = SJA1110_SPI_ADDR(0xa8),</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_MAC_CONFIG] = {</div><div class='add'>+		.entry_packing = sja1110_mac_config_entry_packing,</div><div class='add'>+		.cmd_packing = sja1110_mac_config_cmd_packing,</div><div class='add'>+		.max_entry_count = SJA1110_MAX_MAC_CONFIG_COUNT,</div><div class='add'>+		.access = (OP_READ | OP_WRITE | OP_VALID_ANYWAY),</div><div class='add'>+		.packed_size = SJA1105PQRS_SIZE_MAC_CONFIG_DYN_CMD,</div><div class='add'>+		.addr = SJA1110_SPI_ADDR(0x134),</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_LOOKUP_PARAMS] = {</div><div class='add'>+		.entry_packing = sja1110_l2_lookup_params_entry_packing,</div><div class='add'>+		.cmd_packing = sja1110_l2_lookup_params_cmd_packing,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_LOOKUP_PARAMS_COUNT,</div><div class='add'>+		.access = (OP_READ | OP_WRITE | OP_VALID_ANYWAY),</div><div class='add'>+		.packed_size = SJA1110_SIZE_L2_LOOKUP_PARAMS_DYN_CMD,</div><div class='add'>+		.addr = SJA1110_SPI_ADDR(0x158),</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_AVB_PARAMS] = {</div><div class='add'>+		.entry_packing = sja1105pqrs_avb_params_entry_packing,</div><div class='add'>+		.cmd_packing = sja1105pqrs_avb_params_cmd_packing,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_AVB_PARAMS_COUNT,</div><div class='add'>+		.access = (OP_READ | OP_WRITE | OP_VALID_ANYWAY),</div><div class='add'>+		.packed_size = SJA1105PQRS_SIZE_AVB_PARAMS_DYN_CMD,</div><div class='add'>+		.addr = SJA1110_SPI_ADDR(0x2000C),</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_GENERAL_PARAMS] = {</div><div class='add'>+		.entry_packing = sja1110_general_params_entry_packing,</div><div class='add'>+		.cmd_packing = sja1110_general_params_cmd_packing,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_GENERAL_PARAMS_COUNT,</div><div class='add'>+		.access = (OP_READ | OP_WRITE | OP_VALID_ANYWAY),</div><div class='add'>+		.packed_size = SJA1110_SIZE_GENERAL_PARAMS_DYN_CMD,</div><div class='add'>+		.addr = SJA1110_SPI_ADDR(0xe8),</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_RETAGGING] = {</div><div class='add'>+		.entry_packing = sja1110_retagging_entry_packing,</div><div class='add'>+		.cmd_packing = sja1110_retagging_cmd_packing,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_RETAGGING_COUNT,</div><div class='add'>+		.access = (OP_READ | OP_WRITE | OP_DEL),</div><div class='add'>+		.packed_size = SJA1105_SIZE_RETAGGING_DYN_CMD,</div><div class='add'>+		.addr = SJA1110_SPI_ADDR(0xdc),</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_CBS] = {</div><div class='add'>+		.entry_packing = sja1110_cbs_entry_packing,</div><div class='add'>+		.cmd_packing = sja1110_cbs_cmd_packing,</div><div class='add'>+		.max_entry_count = SJA1110_MAX_CBS_COUNT,</div><div class='add'>+		.access = (OP_READ | OP_WRITE | OP_VALID_ANYWAY),</div><div class='add'>+		.packed_size = SJA1105PQRS_SIZE_CBS_DYN_CMD,</div><div class='add'>+		.addr = SJA1110_SPI_ADDR(0xc4),</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_XMII_PARAMS] = {</div><div class='add'>+		.entry_packing = sja1110_xmii_params_entry_packing,</div><div class='add'>+		.cmd_packing = sja1110_dummy_cmd_packing,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_XMII_PARAMS_COUNT,</div><div class='add'>+		.access = (OP_READ | OP_VALID_ANYWAY),</div><div class='add'>+		.packed_size = SJA1110_SIZE_XMII_PARAMS_DYN_CMD,</div><div class='add'>+		.addr = SJA1110_SPI_ADDR(0x3c),</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_POLICING] = {</div><div class='add'>+		.entry_packing = sja1110_l2_policing_entry_packing,</div><div class='add'>+		.cmd_packing = sja1110_l2_policing_cmd_packing,</div><div class='add'>+		.max_entry_count = SJA1110_MAX_L2_POLICING_COUNT,</div><div class='add'>+		.access = (OP_READ | OP_WRITE | OP_VALID_ANYWAY),</div><div class='add'>+		.packed_size = SJA1110_SIZE_L2_POLICING_DYN_CMD,</div><div class='add'>+		.addr = SJA1110_SPI_ADDR(0x2fc),</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_FORWARDING_PARAMS] = {</div><div class='add'>+		.entry_packing = sja1110_l2_forwarding_params_entry_packing,</div><div class='add'>+		.cmd_packing = sja1110_dummy_cmd_packing,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_FORWARDING_PARAMS_COUNT,</div><div class='add'>+		.access = (OP_READ | OP_VALID_ANYWAY),</div><div class='add'>+		.packed_size = SJA1110_SIZE_L2_FORWARDING_PARAMS_DYN_CMD,</div><div class='add'>+		.addr = SJA1110_SPI_ADDR(0x20000),</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define SJA1105_DYNAMIC_CONFIG_SLEEP_US		10</div><div class='add'>+#define SJA1105_DYNAMIC_CONFIG_TIMEOUT_US	100000</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+sja1105_dynamic_config_poll_valid(struct sja1105_private *priv,</div><div class='add'>+				  const struct sja1105_dynamic_table_ops *ops,</div><div class='add'>+				  void *entry, bool check_valident,</div><div class='add'>+				  bool check_errors)</div><div class='add'>+{</div><div class='add'>+	u8 packed_buf[SJA1105_MAX_DYN_CMD_SIZE] = {};</div><div class='add'>+	struct sja1105_dyn_cmd cmd = {};</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	/* Read back the whole entry + command structure. */</div><div class='add'>+	rc = sja1105_xfer_buf(priv, SPI_READ, ops-&gt;addr, packed_buf,</div><div class='add'>+			      ops-&gt;packed_size);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	/* Unpack the command structure, and return it to the caller in case it</div><div class='add'>+	 * needs to perform further checks on it (VALIDENT).</div><div class='add'>+	 */</div><div class='add'>+	ops-&gt;cmd_packing(packed_buf, &amp;cmd, UNPACK);</div><div class='add'>+</div><div class='add'>+	/* Hardware hasn't cleared VALID =&gt; still working on it */</div><div class='add'>+	if (cmd.valid)</div><div class='add'>+		return -EAGAIN;</div><div class='add'>+</div><div class='add'>+	if (check_valident &amp;&amp; !cmd.valident &amp;&amp; !(ops-&gt;access &amp; OP_VALID_ANYWAY))</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	if (check_errors &amp;&amp; cmd.errors)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Don't dereference possibly NULL pointer - maybe caller</div><div class='add'>+	 * only wanted to see whether the entry existed or not.</div><div class='add'>+	 */</div><div class='add'>+	if (entry)</div><div class='add'>+		ops-&gt;entry_packing(packed_buf, entry, UNPACK);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Poll the dynamic config entry's control area until the hardware has</div><div class='add'>+ * cleared the VALID bit, which means we have confirmation that it has</div><div class='add'>+ * finished processing the command.</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+sja1105_dynamic_config_wait_complete(struct sja1105_private *priv,</div><div class='add'>+				     const struct sja1105_dynamic_table_ops *ops,</div><div class='add'>+				     void *entry, bool check_valident,</div><div class='add'>+				     bool check_errors)</div><div class='add'>+{</div><div class='add'>+	int err, rc;</div><div class='add'>+</div><div class='add'>+	err = read_poll_timeout(sja1105_dynamic_config_poll_valid,</div><div class='add'>+				rc, rc != -EAGAIN,</div><div class='add'>+				SJA1105_DYNAMIC_CONFIG_SLEEP_US,</div><div class='add'>+				SJA1105_DYNAMIC_CONFIG_TIMEOUT_US,</div><div class='add'>+				false, priv, ops, entry, check_valident,</div><div class='add'>+				check_errors);</div><div class='add'>+	return err &lt; 0 ? err : rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Provides read access to the settings through the dynamic interface</div><div class='add'>+ * of the switch.</div><div class='add'>+ * @blk_idx	is used as key to select from the sja1105_dynamic_table_ops.</div><div class='add'>+ *		The selection is limited by the hardware in respect to which</div><div class='add'>+ *		configuration blocks can be read through the dynamic interface.</div><div class='add'>+ * @index	is used to retrieve a particular table entry. If negative,</div><div class='add'>+ *		(and if the @blk_idx supports the searching operation) a search</div><div class='add'>+ *		is performed by the @entry parameter.</div><div class='add'>+ * @entry	Type-casted to an unpacked structure that holds a table entry</div><div class='add'>+ *		of the type specified in @blk_idx.</div><div class='add'>+ *		Usually an output argument. If @index is negative, then this</div><div class='add'>+ *		argument is used as input/output: it should be pre-populated</div><div class='add'>+ *		with the element to search for. Entries which support the</div><div class='add'>+ *		search operation will have an "index" field (not the @index</div><div class='add'>+ *		argument to this function) and that is where the found index</div><div class='add'>+ *		will be returned (or left unmodified - thus negative - if not</div><div class='add'>+ *		found).</div><div class='add'>+ */</div><div class='add'>+int sja1105_dynamic_config_read(struct sja1105_private *priv,</div><div class='add'>+				enum sja1105_blk_idx blk_idx,</div><div class='add'>+				int index, void *entry)</div><div class='add'>+{</div><div class='add'>+	const struct sja1105_dynamic_table_ops *ops;</div><div class='add'>+	struct sja1105_dyn_cmd cmd = {0};</div><div class='add'>+	/* SPI payload buffer */</div><div class='add'>+	u8 packed_buf[SJA1105_MAX_DYN_CMD_SIZE] = {0};</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (blk_idx &gt;= BLK_IDX_MAX_DYN)</div><div class='add'>+		return -ERANGE;</div><div class='add'>+</div><div class='add'>+	ops = &amp;priv-&gt;info-&gt;dyn_ops[blk_idx];</div><div class='add'>+</div><div class='add'>+	if (index &gt;= 0 &amp;&amp; index &gt;= ops-&gt;max_entry_count)</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	if (index &lt; 0 &amp;&amp; !(ops-&gt;access &amp; OP_SEARCH))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	if (!(ops-&gt;access &amp; OP_READ))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	if (ops-&gt;packed_size &gt; SJA1105_MAX_DYN_CMD_SIZE)</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	if (!ops-&gt;cmd_packing)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	if (!ops-&gt;entry_packing)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	cmd.valid = true; /* Trigger action on table entry */</div><div class='add'>+	cmd.rdwrset = SPI_READ; /* Action is read */</div><div class='add'>+	if (index &lt; 0) {</div><div class='add'>+		/* Avoid copying a signed negative number to an u64 */</div><div class='add'>+		cmd.index = 0;</div><div class='add'>+		cmd.search = true;</div><div class='add'>+	} else {</div><div class='add'>+		cmd.index = index;</div><div class='add'>+		cmd.search = false;</div><div class='add'>+	}</div><div class='add'>+	cmd.valident = true;</div><div class='add'>+	ops-&gt;cmd_packing(packed_buf, &amp;cmd, PACK);</div><div class='add'>+</div><div class='add'>+	if (cmd.search)</div><div class='add'>+		ops-&gt;entry_packing(packed_buf, entry, PACK);</div><div class='add'>+</div><div class='add'>+	/* Send SPI write operation: read config table entry */</div><div class='add'>+	mutex_lock(&amp;priv-&gt;dynamic_config_lock);</div><div class='add'>+	rc = sja1105_xfer_buf(priv, SPI_WRITE, ops-&gt;addr, packed_buf,</div><div class='add'>+			      ops-&gt;packed_size);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_dynamic_config_wait_complete(priv, ops, entry, true, false);</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;dynamic_config_lock);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int sja1105_dynamic_config_write(struct sja1105_private *priv,</div><div class='add'>+				 enum sja1105_blk_idx blk_idx,</div><div class='add'>+				 int index, void *entry, bool keep)</div><div class='add'>+{</div><div class='add'>+	const struct sja1105_dynamic_table_ops *ops;</div><div class='add'>+	struct sja1105_dyn_cmd cmd = {0};</div><div class='add'>+	/* SPI payload buffer */</div><div class='add'>+	u8 packed_buf[SJA1105_MAX_DYN_CMD_SIZE] = {0};</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (blk_idx &gt;= BLK_IDX_MAX_DYN)</div><div class='add'>+		return -ERANGE;</div><div class='add'>+</div><div class='add'>+	ops = &amp;priv-&gt;info-&gt;dyn_ops[blk_idx];</div><div class='add'>+</div><div class='add'>+	if (index &gt;= ops-&gt;max_entry_count)</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	if (index &lt; 0)</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	if (!(ops-&gt;access &amp; OP_WRITE))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	if (!keep &amp;&amp; !(ops-&gt;access &amp; OP_DEL))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	if (ops-&gt;packed_size &gt; SJA1105_MAX_DYN_CMD_SIZE)</div><div class='add'>+		return -ERANGE;</div><div class='add'>+</div><div class='add'>+	cmd.valident = keep; /* If false, deletes entry */</div><div class='add'>+	cmd.valid = true; /* Trigger action on table entry */</div><div class='add'>+	cmd.rdwrset = SPI_WRITE; /* Action is write */</div><div class='add'>+	cmd.index = index;</div><div class='add'>+</div><div class='add'>+	if (!ops-&gt;cmd_packing)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	ops-&gt;cmd_packing(packed_buf, &amp;cmd, PACK);</div><div class='add'>+</div><div class='add'>+	if (!ops-&gt;entry_packing)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	/* Don't dereference potentially NULL pointer if just</div><div class='add'>+	 * deleting a table entry is what was requested. For cases</div><div class='add'>+	 * where 'index' field is physically part of entry structure,</div><div class='add'>+	 * and needed here, we deal with that in the cmd_packing callback.</div><div class='add'>+	 */</div><div class='add'>+	if (keep)</div><div class='add'>+		ops-&gt;entry_packing(packed_buf, entry, PACK);</div><div class='add'>+</div><div class='add'>+	/* Send SPI write operation: read config table entry */</div><div class='add'>+	mutex_lock(&amp;priv-&gt;dynamic_config_lock);</div><div class='add'>+	rc = sja1105_xfer_buf(priv, SPI_WRITE, ops-&gt;addr, packed_buf,</div><div class='add'>+			      ops-&gt;packed_size);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_dynamic_config_wait_complete(priv, ops, NULL, false, true);</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;dynamic_config_lock);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 sja1105_crc8_add(u8 crc, u8 byte, u8 poly)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 8; i++) {</div><div class='add'>+		if ((crc ^ byte) &amp; (1 &lt;&lt; 7)) {</div><div class='add'>+			crc &lt;&lt;= 1;</div><div class='add'>+			crc ^= poly;</div><div class='add'>+		} else {</div><div class='add'>+			crc &lt;&lt;= 1;</div><div class='add'>+		}</div><div class='add'>+		byte &lt;&lt;= 1;</div><div class='add'>+	}</div><div class='add'>+	return crc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* CRC8 algorithm with non-reversed input, non-reversed output,</div><div class='add'>+ * no input xor and no output xor. Code customized for receiving</div><div class='add'>+ * the SJA1105 E/T FDB keys (vlanid, macaddr) as input. CRC polynomial</div><div class='add'>+ * is also received as argument in the Koopman notation that the switch</div><div class='add'>+ * hardware stores it in.</div><div class='add'>+ */</div><div class='add'>+u8 sja1105et_fdb_hash(struct sja1105_private *priv, const u8 *addr, u16 vid)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_l2_lookup_params_entry *l2_lookup_params =</div><div class='add'>+		priv-&gt;static_config.tables[BLK_IDX_L2_LOOKUP_PARAMS].entries;</div><div class='add'>+	u64 input, poly_koopman = l2_lookup_params-&gt;poly;</div><div class='add'>+	/* Convert polynomial from Koopman to 'normal' notation */</div><div class='add'>+	u8 poly = (u8)(1 + (poly_koopman &lt;&lt; 1));</div><div class='add'>+	u8 crc = 0; /* seed */</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	input = ((u64)vid &lt;&lt; 48) | ether_addr_to_u64(addr);</div><div class='add'>+</div><div class='add'>+	/* Mask the eight bytes starting from MSB one at a time */</div><div class='add'>+	for (i = 56; i &gt;= 0; i -= 8) {</div><div class='add'>+		u8 byte = (input &amp; (0xffull &lt;&lt; i)) &gt;&gt; i;</div><div class='add'>+</div><div class='add'>+		crc = sja1105_crc8_add(crc, byte, poly);</div><div class='add'>+	}</div><div class='add'>+	return crc;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/dsa/sja1105/sja1105_dynamic_config.h b/drivers/net/dsa/sja1105/sja1105_dynamic_config.h<br/>new file mode 100644<br/>index 000000000000..a1472f80a059<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/sja1105/sja1105_dynamic_config.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/sja1105/sja1105_dynamic_config.h</a></div><div class='hunk'>@@ -0,0 +1,41 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) 2019, Vladimir Oltean &lt;olteanv@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+#ifndef _SJA1105_DYNAMIC_CONFIG_H</div><div class='add'>+#define _SJA1105_DYNAMIC_CONFIG_H</div><div class='add'>+</div><div class='add'>+#include "sja1105.h"</div><div class='add'>+#include &lt;linux/packing.h&gt;</div><div class='add'>+</div><div class='add'>+/* Special index that can be used for sja1105_dynamic_config_read */</div><div class='add'>+#define SJA1105_SEARCH		-1</div><div class='add'>+</div><div class='add'>+struct sja1105_dyn_cmd;</div><div class='add'>+</div><div class='add'>+struct sja1105_dynamic_table_ops {</div><div class='add'>+	/* This returns size_t just to keep same prototype as the</div><div class='add'>+	 * static config ops, of which we are reusing some functions.</div><div class='add'>+	 */</div><div class='add'>+	size_t (*entry_packing)(void *buf, void *entry_ptr, enum packing_op op);</div><div class='add'>+	void (*cmd_packing)(void *buf, struct sja1105_dyn_cmd *cmd,</div><div class='add'>+			    enum packing_op op);</div><div class='add'>+	size_t max_entry_count;</div><div class='add'>+	size_t packed_size;</div><div class='add'>+	u64 addr;</div><div class='add'>+	u8 access;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1105_mgmt_entry {</div><div class='add'>+	u64 tsreg;</div><div class='add'>+	u64 takets;</div><div class='add'>+	u64 macaddr;</div><div class='add'>+	u64 destports;</div><div class='add'>+	u64 enfport;</div><div class='add'>+	u64 index;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+extern const struct sja1105_dynamic_table_ops sja1105et_dyn_ops[BLK_IDX_MAX_DYN];</div><div class='add'>+extern const struct sja1105_dynamic_table_ops sja1105pqrs_dyn_ops[BLK_IDX_MAX_DYN];</div><div class='add'>+extern const struct sja1105_dynamic_table_ops sja1110_dyn_ops[BLK_IDX_MAX_DYN];</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/dsa/sja1105/sja1105_ethtool.c b/drivers/net/dsa/sja1105/sja1105_ethtool.c<br/>new file mode 100644<br/>index 000000000000..84d7d3f66bd0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/sja1105/sja1105_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/sja1105/sja1105_ethtool.c</a></div><div class='hunk'>@@ -0,0 +1,633 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright (c) 2018-2019, Vladimir Oltean &lt;olteanv@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+#include "sja1105.h"</div><div class='add'>+</div><div class='add'>+enum sja1105_counter_index {</div><div class='add'>+	__SJA1105_COUNTER_UNUSED,</div><div class='add'>+	/* MAC */</div><div class='add'>+	N_RUNT,</div><div class='add'>+	N_SOFERR,</div><div class='add'>+	N_ALIGNERR,</div><div class='add'>+	N_MIIERR,</div><div class='add'>+	TYPEERR,</div><div class='add'>+	SIZEERR,</div><div class='add'>+	TCTIMEOUT,</div><div class='add'>+	PRIORERR,</div><div class='add'>+	NOMASTER,</div><div class='add'>+	MEMOV,</div><div class='add'>+	MEMERR,</div><div class='add'>+	INVTYP,</div><div class='add'>+	INTCYOV,</div><div class='add'>+	DOMERR,</div><div class='add'>+	PCFBAGDROP,</div><div class='add'>+	SPCPRIOR,</div><div class='add'>+	AGEPRIOR,</div><div class='add'>+	PORTDROP,</div><div class='add'>+	LENDROP,</div><div class='add'>+	BAGDROP,</div><div class='add'>+	POLICEERR,</div><div class='add'>+	DRPNONA664ERR,</div><div class='add'>+	SPCERR,</div><div class='add'>+	AGEDRP,</div><div class='add'>+	/* HL1 */</div><div class='add'>+	N_N664ERR,</div><div class='add'>+	N_VLANERR,</div><div class='add'>+	N_UNRELEASED,</div><div class='add'>+	N_SIZEERR,</div><div class='add'>+	N_CRCERR,</div><div class='add'>+	N_VLNOTFOUND,</div><div class='add'>+	N_CTPOLERR,</div><div class='add'>+	N_POLERR,</div><div class='add'>+	N_RXFRM,</div><div class='add'>+	N_RXBYTE,</div><div class='add'>+	N_TXFRM,</div><div class='add'>+	N_TXBYTE,</div><div class='add'>+	/* HL2 */</div><div class='add'>+	N_QFULL,</div><div class='add'>+	N_PART_DROP,</div><div class='add'>+	N_EGR_DISABLED,</div><div class='add'>+	N_NOT_REACH,</div><div class='add'>+	__MAX_SJA1105ET_PORT_COUNTER,</div><div class='add'>+	/* P/Q/R/S only */</div><div class='add'>+	/* ETHER */</div><div class='add'>+	N_DROPS_NOLEARN = __MAX_SJA1105ET_PORT_COUNTER,</div><div class='add'>+	N_DROPS_NOROUTE,</div><div class='add'>+	N_DROPS_ILL_DTAG,</div><div class='add'>+	N_DROPS_DTAG,</div><div class='add'>+	N_DROPS_SOTAG,</div><div class='add'>+	N_DROPS_SITAG,</div><div class='add'>+	N_DROPS_UTAG,</div><div class='add'>+	N_TX_BYTES_1024_2047,</div><div class='add'>+	N_TX_BYTES_512_1023,</div><div class='add'>+	N_TX_BYTES_256_511,</div><div class='add'>+	N_TX_BYTES_128_255,</div><div class='add'>+	N_TX_BYTES_65_127,</div><div class='add'>+	N_TX_BYTES_64,</div><div class='add'>+	N_TX_MCAST,</div><div class='add'>+	N_TX_BCAST,</div><div class='add'>+	N_RX_BYTES_1024_2047,</div><div class='add'>+	N_RX_BYTES_512_1023,</div><div class='add'>+	N_RX_BYTES_256_511,</div><div class='add'>+	N_RX_BYTES_128_255,</div><div class='add'>+	N_RX_BYTES_65_127,</div><div class='add'>+	N_RX_BYTES_64,</div><div class='add'>+	N_RX_MCAST,</div><div class='add'>+	N_RX_BCAST,</div><div class='add'>+	__MAX_SJA1105PQRS_PORT_COUNTER,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1105_port_counter {</div><div class='add'>+	enum sja1105_stats_area area;</div><div class='add'>+	const char name[ETH_GSTRING_LEN];</div><div class='add'>+	int offset;</div><div class='add'>+	int start;</div><div class='add'>+	int end;</div><div class='add'>+	bool is_64bit;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct sja1105_port_counter sja1105_port_counters[] = {</div><div class='add'>+	/* MAC-Level Diagnostic Counters */</div><div class='add'>+	[N_RUNT] = {</div><div class='add'>+		.area = MAC,</div><div class='add'>+		.name = "n_runt",</div><div class='add'>+		.offset = 0,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 24,</div><div class='add'>+	},</div><div class='add'>+	[N_SOFERR] = {</div><div class='add'>+		.area = MAC,</div><div class='add'>+		.name = "n_soferr",</div><div class='add'>+		.offset = 0x0,</div><div class='add'>+		.start = 23,</div><div class='add'>+		.end = 16,</div><div class='add'>+	},</div><div class='add'>+	[N_ALIGNERR] = {</div><div class='add'>+		.area = MAC,</div><div class='add'>+		.name = "n_alignerr",</div><div class='add'>+		.offset = 0x0,</div><div class='add'>+		.start = 15,</div><div class='add'>+		.end = 8,</div><div class='add'>+	},</div><div class='add'>+	[N_MIIERR] = {</div><div class='add'>+		.area = MAC,</div><div class='add'>+		.name = "n_miierr",</div><div class='add'>+		.offset = 0x0,</div><div class='add'>+		.start = 7,</div><div class='add'>+		.end = 0,</div><div class='add'>+	},</div><div class='add'>+	/* MAC-Level Diagnostic Flags */</div><div class='add'>+	[TYPEERR] = {</div><div class='add'>+		.area = MAC,</div><div class='add'>+		.name = "typeerr",</div><div class='add'>+		.offset = 0x1,</div><div class='add'>+		.start = 27,</div><div class='add'>+		.end = 27,</div><div class='add'>+	},</div><div class='add'>+	[SIZEERR] = {</div><div class='add'>+		.area = MAC,</div><div class='add'>+		.name = "sizeerr",</div><div class='add'>+		.offset = 0x1,</div><div class='add'>+		.start = 26,</div><div class='add'>+		.end = 26,</div><div class='add'>+	},</div><div class='add'>+	[TCTIMEOUT] = {</div><div class='add'>+		.area = MAC,</div><div class='add'>+		.name = "tctimeout",</div><div class='add'>+		.offset = 0x1,</div><div class='add'>+		.start = 25,</div><div class='add'>+		.end = 25,</div><div class='add'>+	},</div><div class='add'>+	[PRIORERR] = {</div><div class='add'>+		.area = MAC,</div><div class='add'>+		.name = "priorerr",</div><div class='add'>+		.offset = 0x1,</div><div class='add'>+		.start = 24,</div><div class='add'>+		.end = 24,</div><div class='add'>+	},</div><div class='add'>+	[NOMASTER] = {</div><div class='add'>+		.area = MAC,</div><div class='add'>+		.name = "nomaster",</div><div class='add'>+		.offset = 0x1,</div><div class='add'>+		.start = 23,</div><div class='add'>+		.end = 23,</div><div class='add'>+	},</div><div class='add'>+	[MEMOV] = {</div><div class='add'>+		.area = MAC,</div><div class='add'>+		.name = "memov",</div><div class='add'>+		.offset = 0x1,</div><div class='add'>+		.start = 22,</div><div class='add'>+		.end = 22,</div><div class='add'>+	},</div><div class='add'>+	[MEMERR] = {</div><div class='add'>+		.area = MAC,</div><div class='add'>+		.name = "memerr",</div><div class='add'>+		.offset = 0x1,</div><div class='add'>+		.start = 21,</div><div class='add'>+		.end = 21,</div><div class='add'>+	},</div><div class='add'>+	[INVTYP] = {</div><div class='add'>+		.area = MAC,</div><div class='add'>+		.name = "invtyp",</div><div class='add'>+		.offset = 0x1,</div><div class='add'>+		.start = 19,</div><div class='add'>+		.end = 19,</div><div class='add'>+	},</div><div class='add'>+	[INTCYOV] = {</div><div class='add'>+		.area = MAC,</div><div class='add'>+		.name = "intcyov",</div><div class='add'>+		.offset = 0x1,</div><div class='add'>+		.start = 18,</div><div class='add'>+		.end = 18,</div><div class='add'>+	},</div><div class='add'>+	[DOMERR] = {</div><div class='add'>+		.area = MAC,</div><div class='add'>+		.name = "domerr",</div><div class='add'>+		.offset = 0x1,</div><div class='add'>+		.start = 17,</div><div class='add'>+		.end = 17,</div><div class='add'>+	},</div><div class='add'>+	[PCFBAGDROP] = {</div><div class='add'>+		.area = MAC,</div><div class='add'>+		.name = "pcfbagdrop",</div><div class='add'>+		.offset = 0x1,</div><div class='add'>+		.start = 16,</div><div class='add'>+		.end = 16,</div><div class='add'>+	},</div><div class='add'>+	[SPCPRIOR] = {</div><div class='add'>+		.area = MAC,</div><div class='add'>+		.name = "spcprior",</div><div class='add'>+		.offset = 0x1,</div><div class='add'>+		.start = 15,</div><div class='add'>+		.end = 12,</div><div class='add'>+	},</div><div class='add'>+	[AGEPRIOR] = {</div><div class='add'>+		.area = MAC,</div><div class='add'>+		.name = "ageprior",</div><div class='add'>+		.offset = 0x1,</div><div class='add'>+		.start = 11,</div><div class='add'>+		.end = 8,</div><div class='add'>+	},</div><div class='add'>+	[PORTDROP] = {</div><div class='add'>+		.area = MAC,</div><div class='add'>+		.name = "portdrop",</div><div class='add'>+		.offset = 0x1,</div><div class='add'>+		.start = 6,</div><div class='add'>+		.end = 6,</div><div class='add'>+	},</div><div class='add'>+	[LENDROP] = {</div><div class='add'>+		.area = MAC,</div><div class='add'>+		.name = "lendrop",</div><div class='add'>+		.offset = 0x1,</div><div class='add'>+		.start = 5,</div><div class='add'>+		.end = 5,</div><div class='add'>+	},</div><div class='add'>+	[BAGDROP] = {</div><div class='add'>+		.area = MAC,</div><div class='add'>+		.name = "bagdrop",</div><div class='add'>+		.offset = 0x1,</div><div class='add'>+		.start = 4,</div><div class='add'>+		.end = 4,</div><div class='add'>+	},</div><div class='add'>+	[POLICEERR] = {</div><div class='add'>+		.area = MAC,</div><div class='add'>+		.name = "policeerr",</div><div class='add'>+		.offset = 0x1,</div><div class='add'>+		.start = 3,</div><div class='add'>+		.end = 3,</div><div class='add'>+	},</div><div class='add'>+	[DRPNONA664ERR] = {</div><div class='add'>+		.area = MAC,</div><div class='add'>+		.name = "drpnona664err",</div><div class='add'>+		.offset = 0x1,</div><div class='add'>+		.start = 2,</div><div class='add'>+		.end = 2,</div><div class='add'>+	},</div><div class='add'>+	[SPCERR] = {</div><div class='add'>+		.area = MAC,</div><div class='add'>+		.name = "spcerr",</div><div class='add'>+		.offset = 0x1,</div><div class='add'>+		.start = 1,</div><div class='add'>+		.end = 1,</div><div class='add'>+	},</div><div class='add'>+	[AGEDRP] = {</div><div class='add'>+		.area = MAC,</div><div class='add'>+		.name = "agedrp",</div><div class='add'>+		.offset = 0x1,</div><div class='add'>+		.start = 0,</div><div class='add'>+		.end = 0,</div><div class='add'>+	},</div><div class='add'>+	/* High-Level Diagnostic Counters */</div><div class='add'>+	[N_N664ERR] = {</div><div class='add'>+		.area = HL1,</div><div class='add'>+		.name = "n_n664err",</div><div class='add'>+		.offset = 0xF,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+	},</div><div class='add'>+	[N_VLANERR] = {</div><div class='add'>+		.area = HL1,</div><div class='add'>+		.name = "n_vlanerr",</div><div class='add'>+		.offset = 0xE,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+	},</div><div class='add'>+	[N_UNRELEASED] = {</div><div class='add'>+		.area = HL1,</div><div class='add'>+		.name = "n_unreleased",</div><div class='add'>+		.offset = 0xD,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+	},</div><div class='add'>+	[N_SIZEERR] = {</div><div class='add'>+		.area = HL1,</div><div class='add'>+		.name = "n_sizeerr",</div><div class='add'>+		.offset = 0xC,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+	},</div><div class='add'>+	[N_CRCERR] = {</div><div class='add'>+		.area = HL1,</div><div class='add'>+		.name = "n_crcerr",</div><div class='add'>+		.offset = 0xB,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+	},</div><div class='add'>+	[N_VLNOTFOUND] = {</div><div class='add'>+		.area = HL1,</div><div class='add'>+		.name = "n_vlnotfound",</div><div class='add'>+		.offset = 0xA,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+	},</div><div class='add'>+	[N_CTPOLERR] = {</div><div class='add'>+		.area = HL1,</div><div class='add'>+		.name = "n_ctpolerr",</div><div class='add'>+		.offset = 0x9,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+	},</div><div class='add'>+	[N_POLERR] = {</div><div class='add'>+		.area = HL1,</div><div class='add'>+		.name = "n_polerr",</div><div class='add'>+		.offset = 0x8,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+	},</div><div class='add'>+	[N_RXFRM] = {</div><div class='add'>+		.area = HL1,</div><div class='add'>+		.name = "n_rxfrm",</div><div class='add'>+		.offset = 0x6,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+		.is_64bit = true,</div><div class='add'>+	},</div><div class='add'>+	[N_RXBYTE] = {</div><div class='add'>+		.area = HL1,</div><div class='add'>+		.name = "n_rxbyte",</div><div class='add'>+		.offset = 0x4,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+		.is_64bit = true,</div><div class='add'>+	},</div><div class='add'>+	[N_TXFRM] = {</div><div class='add'>+		.area = HL1,</div><div class='add'>+		.name = "n_txfrm",</div><div class='add'>+		.offset = 0x2,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+		.is_64bit = true,</div><div class='add'>+	},</div><div class='add'>+	[N_TXBYTE] = {</div><div class='add'>+		.area = HL1,</div><div class='add'>+		.name = "n_txbyte",</div><div class='add'>+		.offset = 0x0,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+		.is_64bit = true,</div><div class='add'>+	},</div><div class='add'>+	[N_QFULL] = {</div><div class='add'>+		.area = HL2,</div><div class='add'>+		.name = "n_qfull",</div><div class='add'>+		.offset = 0x3,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+	},</div><div class='add'>+	[N_PART_DROP] = {</div><div class='add'>+		.area = HL2,</div><div class='add'>+		.name = "n_part_drop",</div><div class='add'>+		.offset = 0x2,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+	},</div><div class='add'>+	[N_EGR_DISABLED] = {</div><div class='add'>+		.area = HL2,</div><div class='add'>+		.name = "n_egr_disabled",</div><div class='add'>+		.offset = 0x1,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+	},</div><div class='add'>+	[N_NOT_REACH] = {</div><div class='add'>+		.area = HL2,</div><div class='add'>+		.name = "n_not_reach",</div><div class='add'>+		.offset = 0x0,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+	},</div><div class='add'>+	/* Ether Stats */</div><div class='add'>+	[N_DROPS_NOLEARN] = {</div><div class='add'>+		.area = ETHER,</div><div class='add'>+		.name = "n_drops_nolearn",</div><div class='add'>+		.offset = 0x16,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+	},</div><div class='add'>+	[N_DROPS_NOROUTE] = {</div><div class='add'>+		.area = ETHER,</div><div class='add'>+		.name = "n_drops_noroute",</div><div class='add'>+		.offset = 0x15,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+	},</div><div class='add'>+	[N_DROPS_ILL_DTAG] = {</div><div class='add'>+		.area = ETHER,</div><div class='add'>+		.name = "n_drops_ill_dtag",</div><div class='add'>+		.offset = 0x14,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+	},</div><div class='add'>+	[N_DROPS_DTAG] = {</div><div class='add'>+		.area = ETHER,</div><div class='add'>+		.name = "n_drops_dtag",</div><div class='add'>+		.offset = 0x13,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+	},</div><div class='add'>+	[N_DROPS_SOTAG] = {</div><div class='add'>+		.area = ETHER,</div><div class='add'>+		.name = "n_drops_sotag",</div><div class='add'>+		.offset = 0x12,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+	},</div><div class='add'>+	[N_DROPS_SITAG] = {</div><div class='add'>+		.area = ETHER,</div><div class='add'>+		.name = "n_drops_sitag",</div><div class='add'>+		.offset = 0x11,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+	},</div><div class='add'>+	[N_DROPS_UTAG] = {</div><div class='add'>+		.area = ETHER,</div><div class='add'>+		.name = "n_drops_utag",</div><div class='add'>+		.offset = 0x10,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+	},</div><div class='add'>+	[N_TX_BYTES_1024_2047] = {</div><div class='add'>+		.area = ETHER,</div><div class='add'>+		.name = "n_tx_bytes_1024_2047",</div><div class='add'>+		.offset = 0x0F,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+	},</div><div class='add'>+	[N_TX_BYTES_512_1023] = {</div><div class='add'>+		.area = ETHER,</div><div class='add'>+		.name = "n_tx_bytes_512_1023",</div><div class='add'>+		.offset = 0x0E,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+	},</div><div class='add'>+	[N_TX_BYTES_256_511] = {</div><div class='add'>+		.area = ETHER,</div><div class='add'>+		.name = "n_tx_bytes_256_511",</div><div class='add'>+		.offset = 0x0D,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+	},</div><div class='add'>+	[N_TX_BYTES_128_255] = {</div><div class='add'>+		.area = ETHER,</div><div class='add'>+		.name = "n_tx_bytes_128_255",</div><div class='add'>+		.offset = 0x0C,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+	},</div><div class='add'>+	[N_TX_BYTES_65_127] = {</div><div class='add'>+		.area = ETHER,</div><div class='add'>+		.name = "n_tx_bytes_65_127",</div><div class='add'>+		.offset = 0x0B,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+	},</div><div class='add'>+	[N_TX_BYTES_64] = {</div><div class='add'>+		.area = ETHER,</div><div class='add'>+		.name = "n_tx_bytes_64",</div><div class='add'>+		.offset = 0x0A,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+	},</div><div class='add'>+	[N_TX_MCAST] = {</div><div class='add'>+		.area = ETHER,</div><div class='add'>+		.name = "n_tx_mcast",</div><div class='add'>+		.offset = 0x09,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+	},</div><div class='add'>+	[N_TX_BCAST] = {</div><div class='add'>+		.area = ETHER,</div><div class='add'>+		.name = "n_tx_bcast",</div><div class='add'>+		.offset = 0x08,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+	},</div><div class='add'>+	[N_RX_BYTES_1024_2047] = {</div><div class='add'>+		.area = ETHER,</div><div class='add'>+		.name = "n_rx_bytes_1024_2047",</div><div class='add'>+		.offset = 0x07,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+	},</div><div class='add'>+	[N_RX_BYTES_512_1023] = {</div><div class='add'>+		.area = ETHER,</div><div class='add'>+		.name = "n_rx_bytes_512_1023",</div><div class='add'>+		.offset = 0x06,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+	},</div><div class='add'>+	[N_RX_BYTES_256_511] = {</div><div class='add'>+		.area = ETHER,</div><div class='add'>+		.name = "n_rx_bytes_256_511",</div><div class='add'>+		.offset = 0x05,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+	},</div><div class='add'>+	[N_RX_BYTES_128_255] = {</div><div class='add'>+		.area = ETHER,</div><div class='add'>+		.name = "n_rx_bytes_128_255",</div><div class='add'>+		.offset = 0x04,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+	},</div><div class='add'>+	[N_RX_BYTES_65_127] = {</div><div class='add'>+		.area = ETHER,</div><div class='add'>+		.name = "n_rx_bytes_65_127",</div><div class='add'>+		.offset = 0x03,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+	},</div><div class='add'>+	[N_RX_BYTES_64] = {</div><div class='add'>+		.area = ETHER,</div><div class='add'>+		.name = "n_rx_bytes_64",</div><div class='add'>+		.offset = 0x02,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+	},</div><div class='add'>+	[N_RX_MCAST] = {</div><div class='add'>+		.area = ETHER,</div><div class='add'>+		.name = "n_rx_mcast",</div><div class='add'>+		.offset = 0x01,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+	},</div><div class='add'>+	[N_RX_BCAST] = {</div><div class='add'>+		.area = ETHER,</div><div class='add'>+		.name = "n_rx_bcast",</div><div class='add'>+		.offset = 0x00,</div><div class='add'>+		.start = 31,</div><div class='add'>+		.end = 0,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int sja1105_port_counter_read(struct sja1105_private *priv, int port,</div><div class='add'>+				     enum sja1105_counter_index idx, u64 *ctr)</div><div class='add'>+{</div><div class='add'>+	const struct sja1105_port_counter *c = &amp;sja1105_port_counters[idx];</div><div class='add'>+	size_t size = c-&gt;is_64bit ? 8 : 4;</div><div class='add'>+	u8 buf[8] = {0};</div><div class='add'>+	u64 regs;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	regs = priv-&gt;info-&gt;regs-&gt;stats[c-&gt;area][port];</div><div class='add'>+</div><div class='add'>+	rc = sja1105_xfer_buf(priv, SPI_READ, regs + c-&gt;offset, buf, size);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	sja1105_unpack(buf, ctr, c-&gt;start, c-&gt;end, size);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void sja1105_get_ethtool_stats(struct dsa_switch *ds, int port, u64 *data)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	enum sja1105_counter_index max_ctr, i;</div><div class='add'>+	int rc, k = 0;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;info-&gt;device_id == SJA1105E_DEVICE_ID ||</div><div class='add'>+	    priv-&gt;info-&gt;device_id == SJA1105T_DEVICE_ID)</div><div class='add'>+		max_ctr = __MAX_SJA1105ET_PORT_COUNTER;</div><div class='add'>+	else</div><div class='add'>+		max_ctr = __MAX_SJA1105PQRS_PORT_COUNTER;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; max_ctr; i++) {</div><div class='add'>+		if (!strlen(sja1105_port_counters[i].name))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		rc = sja1105_port_counter_read(priv, port, i, &amp;data[k++]);</div><div class='add'>+		if (rc) {</div><div class='add'>+			dev_err(ds-&gt;dev,</div><div class='add'>+				"Failed to read port %d counters: %d\n",</div><div class='add'>+				port, rc);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void sja1105_get_strings(struct dsa_switch *ds, int port,</div><div class='add'>+			 u32 stringset, u8 *data)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	enum sja1105_counter_index max_ctr, i;</div><div class='add'>+</div><div class='add'>+	if (stringset != ETH_SS_STATS)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;info-&gt;device_id == SJA1105E_DEVICE_ID ||</div><div class='add'>+	    priv-&gt;info-&gt;device_id == SJA1105T_DEVICE_ID)</div><div class='add'>+		max_ctr = __MAX_SJA1105ET_PORT_COUNTER;</div><div class='add'>+	else</div><div class='add'>+		max_ctr = __MAX_SJA1105PQRS_PORT_COUNTER;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; max_ctr; i++) {</div><div class='add'>+		if (!strlen(sja1105_port_counters[i].name))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		ethtool_puts(&amp;data, sja1105_port_counters[i].name);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int sja1105_get_sset_count(struct dsa_switch *ds, int port, int sset)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	enum sja1105_counter_index max_ctr, i;</div><div class='add'>+	int sset_count = 0;</div><div class='add'>+</div><div class='add'>+	if (sset != ETH_SS_STATS)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;info-&gt;device_id == SJA1105E_DEVICE_ID ||</div><div class='add'>+	    priv-&gt;info-&gt;device_id == SJA1105T_DEVICE_ID)</div><div class='add'>+		max_ctr = __MAX_SJA1105ET_PORT_COUNTER;</div><div class='add'>+	else</div><div class='add'>+		max_ctr = __MAX_SJA1105PQRS_PORT_COUNTER;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; max_ctr; i++) {</div><div class='add'>+		if (!strlen(sja1105_port_counters[i].name))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		sset_count++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return sset_count;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/dsa/sja1105/sja1105_flower.c b/drivers/net/dsa/sja1105/sja1105_flower.c<br/>new file mode 100644<br/>index 000000000000..05d8ed3121e7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/sja1105/sja1105_flower.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/sja1105/sja1105_flower.c</a></div><div class='hunk'>@@ -0,0 +1,545 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright 2020 NXP</div><div class='add'>+ */</div><div class='add'>+#include "sja1105.h"</div><div class='add'>+#include "sja1105_vl.h"</div><div class='add'>+</div><div class='add'>+struct sja1105_rule *sja1105_rule_find(struct sja1105_private *priv,</div><div class='add'>+				       unsigned long cookie)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_rule *rule;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(rule, &amp;priv-&gt;flow_block.rules, list)</div><div class='add'>+		if (rule-&gt;cookie == cookie)</div><div class='add'>+			return rule;</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_find_free_l2_policer(struct sja1105_private *priv)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; SJA1105_NUM_L2_POLICERS; i++)</div><div class='add'>+		if (!priv-&gt;flow_block.l2_policer_used[i])</div><div class='add'>+			return i;</div><div class='add'>+</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_setup_bcast_policer(struct sja1105_private *priv,</div><div class='add'>+				       struct netlink_ext_ack *extack,</div><div class='add'>+				       unsigned long cookie, int port,</div><div class='add'>+				       u64 rate_bytes_per_sec,</div><div class='add'>+				       u32 burst)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_rule *rule = sja1105_rule_find(priv, cookie);</div><div class='add'>+	struct sja1105_l2_policing_entry *policing;</div><div class='add'>+	struct dsa_switch *ds = priv-&gt;ds;</div><div class='add'>+	bool new_rule = false;</div><div class='add'>+	unsigned long p;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (!rule) {</div><div class='add'>+		rule = kzalloc(sizeof(*rule), GFP_KERNEL);</div><div class='add'>+		if (!rule)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		rule-&gt;cookie = cookie;</div><div class='add'>+		rule-&gt;type = SJA1105_RULE_BCAST_POLICER;</div><div class='add'>+		rule-&gt;bcast_pol.sharindx = sja1105_find_free_l2_policer(priv);</div><div class='add'>+		rule-&gt;key.type = SJA1105_KEY_BCAST;</div><div class='add'>+		new_rule = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rule-&gt;bcast_pol.sharindx == -1) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "No more L2 policers free");</div><div class='add'>+		rc = -ENOSPC;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	policing = priv-&gt;static_config.tables[BLK_IDX_L2_POLICING].entries;</div><div class='add'>+</div><div class='add'>+	if (policing[(ds-&gt;num_ports * SJA1105_NUM_TC) + port].sharindx != port) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Port already has a broadcast policer");</div><div class='add'>+		rc = -EEXIST;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rule-&gt;port_mask |= BIT(port);</div><div class='add'>+</div><div class='add'>+	/* Make the broadcast policers of all ports attached to this block</div><div class='add'>+	 * point to the newly allocated policer</div><div class='add'>+	 */</div><div class='add'>+	for_each_set_bit(p, &amp;rule-&gt;port_mask, SJA1105_MAX_NUM_PORTS) {</div><div class='add'>+		int bcast = (ds-&gt;num_ports * SJA1105_NUM_TC) + p;</div><div class='add'>+</div><div class='add'>+		policing[bcast].sharindx = rule-&gt;bcast_pol.sharindx;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	policing[rule-&gt;bcast_pol.sharindx].rate = div_u64(rate_bytes_per_sec *</div><div class='add'>+							  512, 1000000);</div><div class='add'>+	policing[rule-&gt;bcast_pol.sharindx].smax = burst;</div><div class='add'>+</div><div class='add'>+	/* TODO: support per-flow MTU */</div><div class='add'>+	policing[rule-&gt;bcast_pol.sharindx].maxlen = VLAN_ETH_FRAME_LEN +</div><div class='add'>+						    ETH_FCS_LEN;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_static_config_reload(priv, SJA1105_BEST_EFFORT_POLICING);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	if (rc == 0 &amp;&amp; new_rule) {</div><div class='add'>+		priv-&gt;flow_block.l2_policer_used[rule-&gt;bcast_pol.sharindx] = true;</div><div class='add'>+		list_add(&amp;rule-&gt;list, &amp;priv-&gt;flow_block.rules);</div><div class='add'>+	} else if (new_rule) {</div><div class='add'>+		kfree(rule);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_setup_tc_policer(struct sja1105_private *priv,</div><div class='add'>+				    struct netlink_ext_ack *extack,</div><div class='add'>+				    unsigned long cookie, int port, int tc,</div><div class='add'>+				    u64 rate_bytes_per_sec,</div><div class='add'>+				    u32 burst)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_rule *rule = sja1105_rule_find(priv, cookie);</div><div class='add'>+	struct sja1105_l2_policing_entry *policing;</div><div class='add'>+	bool new_rule = false;</div><div class='add'>+	unsigned long p;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (!rule) {</div><div class='add'>+		rule = kzalloc(sizeof(*rule), GFP_KERNEL);</div><div class='add'>+		if (!rule)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		rule-&gt;cookie = cookie;</div><div class='add'>+		rule-&gt;type = SJA1105_RULE_TC_POLICER;</div><div class='add'>+		rule-&gt;tc_pol.sharindx = sja1105_find_free_l2_policer(priv);</div><div class='add'>+		rule-&gt;key.type = SJA1105_KEY_TC;</div><div class='add'>+		rule-&gt;key.tc.pcp = tc;</div><div class='add'>+		new_rule = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rule-&gt;tc_pol.sharindx == -1) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "No more L2 policers free");</div><div class='add'>+		rc = -ENOSPC;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	policing = priv-&gt;static_config.tables[BLK_IDX_L2_POLICING].entries;</div><div class='add'>+</div><div class='add'>+	if (policing[(port * SJA1105_NUM_TC) + tc].sharindx != port) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Port-TC pair already has an L2 policer");</div><div class='add'>+		rc = -EEXIST;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rule-&gt;port_mask |= BIT(port);</div><div class='add'>+</div><div class='add'>+	/* Make the policers for traffic class @tc of all ports attached to</div><div class='add'>+	 * this block point to the newly allocated policer</div><div class='add'>+	 */</div><div class='add'>+	for_each_set_bit(p, &amp;rule-&gt;port_mask, SJA1105_MAX_NUM_PORTS) {</div><div class='add'>+		int index = (p * SJA1105_NUM_TC) + tc;</div><div class='add'>+</div><div class='add'>+		policing[index].sharindx = rule-&gt;tc_pol.sharindx;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	policing[rule-&gt;tc_pol.sharindx].rate = div_u64(rate_bytes_per_sec *</div><div class='add'>+						       512, 1000000);</div><div class='add'>+	policing[rule-&gt;tc_pol.sharindx].smax = burst;</div><div class='add'>+</div><div class='add'>+	/* TODO: support per-flow MTU */</div><div class='add'>+	policing[rule-&gt;tc_pol.sharindx].maxlen = VLAN_ETH_FRAME_LEN +</div><div class='add'>+						 ETH_FCS_LEN;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_static_config_reload(priv, SJA1105_BEST_EFFORT_POLICING);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	if (rc == 0 &amp;&amp; new_rule) {</div><div class='add'>+		priv-&gt;flow_block.l2_policer_used[rule-&gt;tc_pol.sharindx] = true;</div><div class='add'>+		list_add(&amp;rule-&gt;list, &amp;priv-&gt;flow_block.rules);</div><div class='add'>+	} else if (new_rule) {</div><div class='add'>+		kfree(rule);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_flower_policer(struct sja1105_private *priv, int port,</div><div class='add'>+				  struct netlink_ext_ack *extack,</div><div class='add'>+				  unsigned long cookie,</div><div class='add'>+				  struct sja1105_key *key,</div><div class='add'>+				  u64 rate_bytes_per_sec,</div><div class='add'>+				  u32 burst)</div><div class='add'>+{</div><div class='add'>+	switch (key-&gt;type) {</div><div class='add'>+	case SJA1105_KEY_BCAST:</div><div class='add'>+		return sja1105_setup_bcast_policer(priv, extack, cookie, port,</div><div class='add'>+						   rate_bytes_per_sec, burst);</div><div class='add'>+	case SJA1105_KEY_TC:</div><div class='add'>+		return sja1105_setup_tc_policer(priv, extack, cookie, port,</div><div class='add'>+						key-&gt;tc.pcp, rate_bytes_per_sec,</div><div class='add'>+						burst);</div><div class='add'>+	default:</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Unknown keys for policing");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_flower_parse_key(struct sja1105_private *priv,</div><div class='add'>+				    struct netlink_ext_ack *extack,</div><div class='add'>+				    struct flow_cls_offload *cls,</div><div class='add'>+				    struct sja1105_key *key)</div><div class='add'>+{</div><div class='add'>+	struct flow_rule *rule = flow_cls_offload_flow_rule(cls);</div><div class='add'>+	struct flow_dissector *dissector = rule-&gt;match.dissector;</div><div class='add'>+	bool is_bcast_dmac = false;</div><div class='add'>+	u64 dmac = U64_MAX;</div><div class='add'>+	u16 vid = U16_MAX;</div><div class='add'>+	u16 pcp = U16_MAX;</div><div class='add'>+</div><div class='add'>+	if (dissector-&gt;used_keys &amp;</div><div class='add'>+	    ~(BIT_ULL(FLOW_DISSECTOR_KEY_BASIC) |</div><div class='add'>+	      BIT_ULL(FLOW_DISSECTOR_KEY_CONTROL) |</div><div class='add'>+	      BIT_ULL(FLOW_DISSECTOR_KEY_VLAN) |</div><div class='add'>+	      BIT_ULL(FLOW_DISSECTOR_KEY_ETH_ADDRS))) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Unsupported keys used");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flow_rule_match_has_control_flags(rule, extack))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC)) {</div><div class='add'>+		struct flow_match_basic match;</div><div class='add'>+</div><div class='add'>+		flow_rule_match_basic(rule, &amp;match);</div><div class='add'>+		if (match.key-&gt;n_proto) {</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+					   "Matching on protocol not supported");</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {</div><div class='add'>+		u8 bcast[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};</div><div class='add'>+		u8 null[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00};</div><div class='add'>+		struct flow_match_eth_addrs match;</div><div class='add'>+</div><div class='add'>+		flow_rule_match_eth_addrs(rule, &amp;match);</div><div class='add'>+</div><div class='add'>+		if (!ether_addr_equal_masked(match.key-&gt;src, null,</div><div class='add'>+					     match.mask-&gt;src)) {</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+					   "Matching on source MAC not supported");</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!ether_addr_equal(match.mask-&gt;dst, bcast)) {</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+					   "Masked matching on MAC not supported");</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		dmac = ether_addr_to_u64(match.key-&gt;dst);</div><div class='add'>+		is_bcast_dmac = ether_addr_equal(match.key-&gt;dst, bcast);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_VLAN)) {</div><div class='add'>+		struct flow_match_vlan match;</div><div class='add'>+</div><div class='add'>+		flow_rule_match_vlan(rule, &amp;match);</div><div class='add'>+</div><div class='add'>+		if (match.mask-&gt;vlan_id &amp;&amp;</div><div class='add'>+		    match.mask-&gt;vlan_id != VLAN_VID_MASK) {</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+					   "Masked matching on VID is not supported");</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (match.mask-&gt;vlan_priority &amp;&amp;</div><div class='add'>+		    match.mask-&gt;vlan_priority != 0x7) {</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+					   "Masked matching on PCP is not supported");</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (match.mask-&gt;vlan_id)</div><div class='add'>+			vid = match.key-&gt;vlan_id;</div><div class='add'>+		if (match.mask-&gt;vlan_priority)</div><div class='add'>+			pcp = match.key-&gt;vlan_priority;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (is_bcast_dmac &amp;&amp; vid == U16_MAX &amp;&amp; pcp == U16_MAX) {</div><div class='add'>+		key-&gt;type = SJA1105_KEY_BCAST;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	if (dmac == U64_MAX &amp;&amp; vid == U16_MAX &amp;&amp; pcp != U16_MAX) {</div><div class='add'>+		key-&gt;type = SJA1105_KEY_TC;</div><div class='add'>+		key-&gt;tc.pcp = pcp;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	if (dmac != U64_MAX &amp;&amp; vid != U16_MAX &amp;&amp; pcp != U16_MAX) {</div><div class='add'>+		key-&gt;type = SJA1105_KEY_VLAN_AWARE_VL;</div><div class='add'>+		key-&gt;vl.dmac = dmac;</div><div class='add'>+		key-&gt;vl.vid = vid;</div><div class='add'>+		key-&gt;vl.pcp = pcp;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	if (dmac != U64_MAX) {</div><div class='add'>+		key-&gt;type = SJA1105_KEY_VLAN_UNAWARE_VL;</div><div class='add'>+		key-&gt;vl.dmac = dmac;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	NL_SET_ERR_MSG_MOD(extack, "Not matching on any known key");</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_policer_validate(const struct flow_action *action,</div><div class='add'>+				    const struct flow_action_entry *act,</div><div class='add'>+				    struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	if (act-&gt;police.exceed.act_id != FLOW_ACTION_DROP) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Offload not supported when exceed action is not drop");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (act-&gt;police.notexceed.act_id != FLOW_ACTION_PIPE &amp;&amp;</div><div class='add'>+	    act-&gt;police.notexceed.act_id != FLOW_ACTION_ACCEPT) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Offload not supported when conform action is not pipe or ok");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (act-&gt;police.notexceed.act_id == FLOW_ACTION_ACCEPT &amp;&amp;</div><div class='add'>+	    !flow_action_is_last_entry(action, act)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Offload not supported when conform action is ok, but action is not last");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (act-&gt;police.peakrate_bytes_ps ||</div><div class='add'>+	    act-&gt;police.avrate || act-&gt;police.overhead) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Offload not supported when peakrate/avrate/overhead is configured");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (act-&gt;police.rate_pkt_ps) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "QoS offload not support packets per second");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int sja1105_cls_flower_add(struct dsa_switch *ds, int port,</div><div class='add'>+			   struct flow_cls_offload *cls, bool ingress)</div><div class='add'>+{</div><div class='add'>+	struct flow_rule *rule = flow_cls_offload_flow_rule(cls);</div><div class='add'>+	struct netlink_ext_ack *extack = cls-&gt;common.extack;</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	const struct flow_action_entry *act;</div><div class='add'>+	unsigned long cookie = cls-&gt;cookie;</div><div class='add'>+	bool routing_rule = false;</div><div class='add'>+	struct sja1105_key key;</div><div class='add'>+	bool gate_rule = false;</div><div class='add'>+	bool vl_rule = false;</div><div class='add'>+	int rc, i;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_flower_parse_key(priv, extack, cls, &amp;key);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	flow_action_for_each(i, act, &amp;rule-&gt;action) {</div><div class='add'>+		switch (act-&gt;id) {</div><div class='add'>+		case FLOW_ACTION_POLICE:</div><div class='add'>+			rc = sja1105_policer_validate(&amp;rule-&gt;action, act, extack);</div><div class='add'>+			if (rc)</div><div class='add'>+				goto out;</div><div class='add'>+</div><div class='add'>+			rc = sja1105_flower_policer(priv, port, extack, cookie,</div><div class='add'>+						    &amp;key,</div><div class='add'>+						    act-&gt;police.rate_bytes_ps,</div><div class='add'>+						    act-&gt;police.burst);</div><div class='add'>+			if (rc)</div><div class='add'>+				goto out;</div><div class='add'>+			break;</div><div class='add'>+		case FLOW_ACTION_TRAP: {</div><div class='add'>+			int cpu = dsa_upstream_port(ds, port);</div><div class='add'>+</div><div class='add'>+			routing_rule = true;</div><div class='add'>+			vl_rule = true;</div><div class='add'>+</div><div class='add'>+			rc = sja1105_vl_redirect(priv, port, extack, cookie,</div><div class='add'>+						 &amp;key, BIT(cpu), true);</div><div class='add'>+			if (rc)</div><div class='add'>+				goto out;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		case FLOW_ACTION_REDIRECT: {</div><div class='add'>+			struct dsa_port *to_dp;</div><div class='add'>+</div><div class='add'>+			to_dp = dsa_port_from_netdev(act-&gt;dev);</div><div class='add'>+			if (IS_ERR(to_dp)) {</div><div class='add'>+				NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+						   "Destination not a switch port");</div><div class='add'>+				return -EOPNOTSUPP;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			routing_rule = true;</div><div class='add'>+			vl_rule = true;</div><div class='add'>+</div><div class='add'>+			rc = sja1105_vl_redirect(priv, port, extack, cookie,</div><div class='add'>+						 &amp;key, BIT(to_dp-&gt;index), true);</div><div class='add'>+			if (rc)</div><div class='add'>+				goto out;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		case FLOW_ACTION_DROP:</div><div class='add'>+			vl_rule = true;</div><div class='add'>+</div><div class='add'>+			rc = sja1105_vl_redirect(priv, port, extack, cookie,</div><div class='add'>+						 &amp;key, 0, false);</div><div class='add'>+			if (rc)</div><div class='add'>+				goto out;</div><div class='add'>+			break;</div><div class='add'>+		case FLOW_ACTION_GATE:</div><div class='add'>+			gate_rule = true;</div><div class='add'>+			vl_rule = true;</div><div class='add'>+</div><div class='add'>+			rc = sja1105_vl_gate(priv, port, extack, cookie,</div><div class='add'>+					     &amp;key, act-&gt;hw_index,</div><div class='add'>+					     act-&gt;gate.prio,</div><div class='add'>+					     act-&gt;gate.basetime,</div><div class='add'>+					     act-&gt;gate.cycletime,</div><div class='add'>+					     act-&gt;gate.cycletimeext,</div><div class='add'>+					     act-&gt;gate.num_entries,</div><div class='add'>+					     act-&gt;gate.entries);</div><div class='add'>+			if (rc)</div><div class='add'>+				goto out;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+					   "Action not supported");</div><div class='add'>+			rc = -EOPNOTSUPP;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (vl_rule &amp;&amp; !rc) {</div><div class='add'>+		/* Delay scheduling configuration until DESTPORTS has been</div><div class='add'>+		 * populated by all other actions.</div><div class='add'>+		 */</div><div class='add'>+		if (gate_rule) {</div><div class='add'>+			if (!routing_rule) {</div><div class='add'>+				NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+						   "Can only offload gate action together with redirect or trap");</div><div class='add'>+				return -EOPNOTSUPP;</div><div class='add'>+			}</div><div class='add'>+			rc = sja1105_init_scheduling(priv);</div><div class='add'>+			if (rc)</div><div class='add'>+				goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		rc = sja1105_static_config_reload(priv, SJA1105_VIRTUAL_LINKS);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int sja1105_cls_flower_del(struct dsa_switch *ds, int port,</div><div class='add'>+			   struct flow_cls_offload *cls, bool ingress)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	struct sja1105_rule *rule = sja1105_rule_find(priv, cls-&gt;cookie);</div><div class='add'>+	struct sja1105_l2_policing_entry *policing;</div><div class='add'>+	int old_sharindx;</div><div class='add'>+</div><div class='add'>+	if (!rule)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (rule-&gt;type == SJA1105_RULE_VL)</div><div class='add'>+		return sja1105_vl_delete(priv, port, rule, cls-&gt;common.extack);</div><div class='add'>+</div><div class='add'>+	policing = priv-&gt;static_config.tables[BLK_IDX_L2_POLICING].entries;</div><div class='add'>+</div><div class='add'>+	if (rule-&gt;type == SJA1105_RULE_BCAST_POLICER) {</div><div class='add'>+		int bcast = (ds-&gt;num_ports * SJA1105_NUM_TC) + port;</div><div class='add'>+</div><div class='add'>+		old_sharindx = policing[bcast].sharindx;</div><div class='add'>+		policing[bcast].sharindx = port;</div><div class='add'>+	} else if (rule-&gt;type == SJA1105_RULE_TC_POLICER) {</div><div class='add'>+		int index = (port * SJA1105_NUM_TC) + rule-&gt;key.tc.pcp;</div><div class='add'>+</div><div class='add'>+		old_sharindx = policing[index].sharindx;</div><div class='add'>+		policing[index].sharindx = port;</div><div class='add'>+	} else {</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rule-&gt;port_mask &amp;= ~BIT(port);</div><div class='add'>+	if (!rule-&gt;port_mask) {</div><div class='add'>+		priv-&gt;flow_block.l2_policer_used[old_sharindx] = false;</div><div class='add'>+		list_del(&amp;rule-&gt;list);</div><div class='add'>+		kfree(rule);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return sja1105_static_config_reload(priv, SJA1105_BEST_EFFORT_POLICING);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int sja1105_cls_flower_stats(struct dsa_switch *ds, int port,</div><div class='add'>+			     struct flow_cls_offload *cls, bool ingress)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	struct sja1105_rule *rule = sja1105_rule_find(priv, cls-&gt;cookie);</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (!rule)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (rule-&gt;type != SJA1105_RULE_VL)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_vl_stats(priv, port, rule, &amp;cls-&gt;stats,</div><div class='add'>+			      cls-&gt;common.extack);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void sja1105_flower_setup(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	int port;</div><div class='add'>+</div><div class='add'>+	INIT_LIST_HEAD(&amp;priv-&gt;flow_block.rules);</div><div class='add'>+</div><div class='add'>+	for (port = 0; port &lt; ds-&gt;num_ports; port++)</div><div class='add'>+		priv-&gt;flow_block.l2_policer_used[port] = true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void sja1105_flower_teardown(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	struct sja1105_rule *rule;</div><div class='add'>+	struct list_head *pos, *n;</div><div class='add'>+</div><div class='add'>+	list_for_each_safe(pos, n, &amp;priv-&gt;flow_block.rules) {</div><div class='add'>+		rule = list_entry(pos, struct sja1105_rule, list);</div><div class='add'>+		list_del(&amp;rule-&gt;list);</div><div class='add'>+		kfree(rule);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/dsa/sja1105/sja1105_main.c b/drivers/net/dsa/sja1105/sja1105_main.c<br/>new file mode 100644<br/>index 000000000000..aa2145cf29a6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/sja1105/sja1105_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/sja1105/sja1105_main.c</a></div><div class='hunk'>@@ -0,0 +1,3467 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright (c) 2018, Sensor-Technik Wiedemann GmbH</div><div class='add'>+ * Copyright (c) 2018-2019, Vladimir Oltean &lt;olteanv@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/printk.h&gt;</div><div class='add'>+#include &lt;linux/spi/spi.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/gpio/consumer.h&gt;</div><div class='add'>+#include &lt;linux/phylink.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_net.h&gt;</div><div class='add'>+#include &lt;linux/of_mdio.h&gt;</div><div class='add'>+#include &lt;linux/netdev_features.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/if_bridge.h&gt;</div><div class='add'>+#include &lt;linux/if_ether.h&gt;</div><div class='add'>+#include &lt;linux/dsa/8021q.h&gt;</div><div class='add'>+#include &lt;linux/units.h&gt;</div><div class='add'>+</div><div class='add'>+#include "sja1105.h"</div><div class='add'>+#include "sja1105_tas.h"</div><div class='add'>+</div><div class='add'>+#define SJA1105_UNKNOWN_MULTICAST	0x010000000000ull</div><div class='add'>+</div><div class='add'>+/* Configure the optional reset pin and bring up switch */</div><div class='add'>+static int sja1105_hw_reset(struct device *dev, unsigned int pulse_len,</div><div class='add'>+			    unsigned int startup_delay)</div><div class='add'>+{</div><div class='add'>+	struct gpio_desc *gpio;</div><div class='add'>+</div><div class='add'>+	gpio = gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);</div><div class='add'>+	if (IS_ERR(gpio))</div><div class='add'>+		return PTR_ERR(gpio);</div><div class='add'>+</div><div class='add'>+	if (!gpio)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	gpiod_set_value_cansleep(gpio, 1);</div><div class='add'>+	/* Wait for minimum reset pulse length */</div><div class='add'>+	msleep(pulse_len);</div><div class='add'>+	gpiod_set_value_cansleep(gpio, 0);</div><div class='add'>+	/* Wait until chip is ready after reset */</div><div class='add'>+	msleep(startup_delay);</div><div class='add'>+</div><div class='add'>+	gpiod_put(gpio);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+sja1105_port_allow_traffic(struct sja1105_l2_forwarding_entry *l2_fwd,</div><div class='add'>+			   int from, int to, bool allow)</div><div class='add'>+{</div><div class='add'>+	if (allow)</div><div class='add'>+		l2_fwd[from].reach_port |= BIT(to);</div><div class='add'>+	else</div><div class='add'>+		l2_fwd[from].reach_port &amp;= ~BIT(to);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool sja1105_can_forward(struct sja1105_l2_forwarding_entry *l2_fwd,</div><div class='add'>+				int from, int to)</div><div class='add'>+{</div><div class='add'>+	return !!(l2_fwd[from].reach_port &amp; BIT(to));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_is_vlan_configured(struct sja1105_private *priv, u16 vid)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_vlan_lookup_entry *vlan;</div><div class='add'>+	int count, i;</div><div class='add'>+</div><div class='add'>+	vlan = priv-&gt;static_config.tables[BLK_IDX_VLAN_LOOKUP].entries;</div><div class='add'>+	count = priv-&gt;static_config.tables[BLK_IDX_VLAN_LOOKUP].entry_count;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; count; i++)</div><div class='add'>+		if (vlan[i].vlanid == vid)</div><div class='add'>+			return i;</div><div class='add'>+</div><div class='add'>+	/* Return an invalid entry index if not found */</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_drop_untagged(struct dsa_switch *ds, int port, bool drop)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	struct sja1105_mac_config_entry *mac;</div><div class='add'>+</div><div class='add'>+	mac = priv-&gt;static_config.tables[BLK_IDX_MAC_CONFIG].entries;</div><div class='add'>+</div><div class='add'>+	if (mac[port].drpuntag == drop)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	mac[port].drpuntag = drop;</div><div class='add'>+</div><div class='add'>+	return sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, port,</div><div class='add'>+					    &amp;mac[port], true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_pvid_apply(struct sja1105_private *priv, int port, u16 pvid)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_mac_config_entry *mac;</div><div class='add'>+</div><div class='add'>+	mac = priv-&gt;static_config.tables[BLK_IDX_MAC_CONFIG].entries;</div><div class='add'>+</div><div class='add'>+	if (mac[port].vlanid == pvid)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	mac[port].vlanid = pvid;</div><div class='add'>+</div><div class='add'>+	return sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, port,</div><div class='add'>+					    &amp;mac[port], true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_commit_pvid(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(ds, port);</div><div class='add'>+	struct net_device *br = dsa_port_bridge_dev_get(dp);</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	struct sja1105_vlan_lookup_entry *vlan;</div><div class='add'>+	bool drop_untagged = false;</div><div class='add'>+	int match, rc;</div><div class='add'>+	u16 pvid;</div><div class='add'>+</div><div class='add'>+	if (br &amp;&amp; br_vlan_enabled(br))</div><div class='add'>+		pvid = priv-&gt;bridge_pvid[port];</div><div class='add'>+	else</div><div class='add'>+		pvid = priv-&gt;tag_8021q_pvid[port];</div><div class='add'>+</div><div class='add'>+	rc = sja1105_pvid_apply(priv, port, pvid);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	/* Only force dropping of untagged packets when the port is under a</div><div class='add'>+	 * VLAN-aware bridge. When the tag_8021q pvid is used, we are</div><div class='add'>+	 * deliberately removing the RX VLAN from the port's VMEMB_PORT list,</div><div class='add'>+	 * to prevent DSA tag spoofing from the link partner. Untagged packets</div><div class='add'>+	 * are the only ones that should be received with tag_8021q, so</div><div class='add'>+	 * definitely don't drop them.</div><div class='add'>+	 */</div><div class='add'>+	if (pvid == priv-&gt;bridge_pvid[port]) {</div><div class='add'>+		vlan = priv-&gt;static_config.tables[BLK_IDX_VLAN_LOOKUP].entries;</div><div class='add'>+</div><div class='add'>+		match = sja1105_is_vlan_configured(priv, pvid);</div><div class='add'>+</div><div class='add'>+		if (match &lt; 0 || !(vlan[match].vmemb_port &amp; BIT(port)))</div><div class='add'>+			drop_untagged = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (dsa_is_cpu_port(ds, port) || dsa_is_dsa_port(ds, port))</div><div class='add'>+		drop_untagged = true;</div><div class='add'>+</div><div class='add'>+	return sja1105_drop_untagged(ds, port, drop_untagged);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_init_mac_settings(struct sja1105_private *priv)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_mac_config_entry default_mac = {</div><div class='add'>+		/* Enable all 8 priority queues on egress.</div><div class='add'>+		 * Every queue i holds top[i] - base[i] frames.</div><div class='add'>+		 * Sum of top[i] - base[i] is 511 (max hardware limit).</div><div class='add'>+		 */</div><div class='add'>+		.top  = {0x3F, 0x7F, 0xBF, 0xFF, 0x13F, 0x17F, 0x1BF, 0x1FF},</div><div class='add'>+		.base = {0x0, 0x40, 0x80, 0xC0, 0x100, 0x140, 0x180, 0x1C0},</div><div class='add'>+		.enabled = {true, true, true, true, true, true, true, true},</div><div class='add'>+		/* Keep standard IFG of 12 bytes on egress. */</div><div class='add'>+		.ifg = 0,</div><div class='add'>+		/* Always put the MAC speed in automatic mode, where it can be</div><div class='add'>+		 * adjusted at runtime by PHYLINK.</div><div class='add'>+		 */</div><div class='add'>+		.speed = priv-&gt;info-&gt;port_speed[SJA1105_SPEED_AUTO],</div><div class='add'>+		/* No static correction for 1-step 1588 events */</div><div class='add'>+		.tp_delin = 0,</div><div class='add'>+		.tp_delout = 0,</div><div class='add'>+		/* Disable aging for critical TTEthernet traffic */</div><div class='add'>+		.maxage = 0xFF,</div><div class='add'>+		/* Internal VLAN (pvid) to apply to untagged ingress */</div><div class='add'>+		.vlanprio = 0,</div><div class='add'>+		.vlanid = 1,</div><div class='add'>+		.ing_mirr = false,</div><div class='add'>+		.egr_mirr = false,</div><div class='add'>+		/* Don't drop traffic with other EtherType than ETH_P_IP */</div><div class='add'>+		.drpnona664 = false,</div><div class='add'>+		/* Don't drop double-tagged traffic */</div><div class='add'>+		.drpdtag = false,</div><div class='add'>+		/* Don't drop untagged traffic */</div><div class='add'>+		.drpuntag = false,</div><div class='add'>+		/* Don't retag 802.1p (VID 0) traffic with the pvid */</div><div class='add'>+		.retag = false,</div><div class='add'>+		/* Disable learning and I/O on user ports by default -</div><div class='add'>+		 * STP will enable it.</div><div class='add'>+		 */</div><div class='add'>+		.dyn_learn = false,</div><div class='add'>+		.egress = false,</div><div class='add'>+		.ingress = false,</div><div class='add'>+	};</div><div class='add'>+	struct sja1105_mac_config_entry *mac;</div><div class='add'>+	struct dsa_switch *ds = priv-&gt;ds;</div><div class='add'>+	struct sja1105_table *table;</div><div class='add'>+	struct dsa_port *dp;</div><div class='add'>+</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_MAC_CONFIG];</div><div class='add'>+</div><div class='add'>+	/* Discard previous MAC Configuration Table */</div><div class='add'>+	if (table-&gt;entry_count) {</div><div class='add'>+		kfree(table-&gt;entries);</div><div class='add'>+		table-&gt;entry_count = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	table-&gt;entries = kcalloc(table-&gt;ops-&gt;max_entry_count,</div><div class='add'>+				 table-&gt;ops-&gt;unpacked_entry_size, GFP_KERNEL);</div><div class='add'>+	if (!table-&gt;entries)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	table-&gt;entry_count = table-&gt;ops-&gt;max_entry_count;</div><div class='add'>+</div><div class='add'>+	mac = table-&gt;entries;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(dp, &amp;ds-&gt;dst-&gt;ports, list) {</div><div class='add'>+		if (dp-&gt;ds != ds)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		mac[dp-&gt;index] = default_mac;</div><div class='add'>+</div><div class='add'>+		/* Let sja1105_bridge_stp_state_set() keep address learning</div><div class='add'>+		 * enabled for the DSA ports. CPU ports use software-assisted</div><div class='add'>+		 * learning to ensure that only FDB entries belonging to the</div><div class='add'>+		 * bridge are learned, and that they are learned towards all</div><div class='add'>+		 * CPU ports in a cross-chip topology if multiple CPU ports</div><div class='add'>+		 * exist.</div><div class='add'>+		 */</div><div class='add'>+		if (dsa_port_is_dsa(dp))</div><div class='add'>+			dp-&gt;learning = true;</div><div class='add'>+</div><div class='add'>+		/* Disallow untagged packets from being received on the</div><div class='add'>+		 * CPU and DSA ports.</div><div class='add'>+		 */</div><div class='add'>+		if (dsa_port_is_cpu(dp) || dsa_port_is_dsa(dp))</div><div class='add'>+			mac[dp-&gt;index].drpuntag = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_init_mii_settings(struct sja1105_private *priv)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;priv-&gt;spidev-&gt;dev;</div><div class='add'>+	struct sja1105_xmii_params_entry *mii;</div><div class='add'>+	struct dsa_switch *ds = priv-&gt;ds;</div><div class='add'>+	struct sja1105_table *table;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_XMII_PARAMS];</div><div class='add'>+</div><div class='add'>+	/* Discard previous xMII Mode Parameters Table */</div><div class='add'>+	if (table-&gt;entry_count) {</div><div class='add'>+		kfree(table-&gt;entries);</div><div class='add'>+		table-&gt;entry_count = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	table-&gt;entries = kcalloc(table-&gt;ops-&gt;max_entry_count,</div><div class='add'>+				 table-&gt;ops-&gt;unpacked_entry_size, GFP_KERNEL);</div><div class='add'>+	if (!table-&gt;entries)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* Override table based on PHYLINK DT bindings */</div><div class='add'>+	table-&gt;entry_count = table-&gt;ops-&gt;max_entry_count;</div><div class='add'>+</div><div class='add'>+	mii = table-&gt;entries;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ds-&gt;num_ports; i++) {</div><div class='add'>+		sja1105_mii_role_t role = XMII_MAC;</div><div class='add'>+</div><div class='add'>+		if (dsa_is_unused_port(priv-&gt;ds, i))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		switch (priv-&gt;phy_mode[i]) {</div><div class='add'>+		case PHY_INTERFACE_MODE_INTERNAL:</div><div class='add'>+			if (priv-&gt;info-&gt;internal_phy[i] == SJA1105_NO_PHY)</div><div class='add'>+				goto unsupported;</div><div class='add'>+</div><div class='add'>+			mii-&gt;xmii_mode[i] = XMII_MODE_MII;</div><div class='add'>+			if (priv-&gt;info-&gt;internal_phy[i] == SJA1105_PHY_BASE_TX)</div><div class='add'>+				mii-&gt;special[i] = true;</div><div class='add'>+</div><div class='add'>+			break;</div><div class='add'>+		case PHY_INTERFACE_MODE_REVMII:</div><div class='add'>+			role = XMII_PHY;</div><div class='add'>+			fallthrough;</div><div class='add'>+		case PHY_INTERFACE_MODE_MII:</div><div class='add'>+			if (!priv-&gt;info-&gt;supports_mii[i])</div><div class='add'>+				goto unsupported;</div><div class='add'>+</div><div class='add'>+			mii-&gt;xmii_mode[i] = XMII_MODE_MII;</div><div class='add'>+			break;</div><div class='add'>+		case PHY_INTERFACE_MODE_REVRMII:</div><div class='add'>+			role = XMII_PHY;</div><div class='add'>+			fallthrough;</div><div class='add'>+		case PHY_INTERFACE_MODE_RMII:</div><div class='add'>+			if (!priv-&gt;info-&gt;supports_rmii[i])</div><div class='add'>+				goto unsupported;</div><div class='add'>+</div><div class='add'>+			mii-&gt;xmii_mode[i] = XMII_MODE_RMII;</div><div class='add'>+			break;</div><div class='add'>+		case PHY_INTERFACE_MODE_RGMII:</div><div class='add'>+		case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='add'>+		case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='add'>+		case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='add'>+			if (!priv-&gt;info-&gt;supports_rgmii[i])</div><div class='add'>+				goto unsupported;</div><div class='add'>+</div><div class='add'>+			mii-&gt;xmii_mode[i] = XMII_MODE_RGMII;</div><div class='add'>+			break;</div><div class='add'>+		case PHY_INTERFACE_MODE_SGMII:</div><div class='add'>+			if (!priv-&gt;info-&gt;supports_sgmii[i])</div><div class='add'>+				goto unsupported;</div><div class='add'>+</div><div class='add'>+			mii-&gt;xmii_mode[i] = XMII_MODE_SGMII;</div><div class='add'>+			mii-&gt;special[i] = true;</div><div class='add'>+			break;</div><div class='add'>+		case PHY_INTERFACE_MODE_2500BASEX:</div><div class='add'>+			if (!priv-&gt;info-&gt;supports_2500basex[i])</div><div class='add'>+				goto unsupported;</div><div class='add'>+</div><div class='add'>+			mii-&gt;xmii_mode[i] = XMII_MODE_SGMII;</div><div class='add'>+			mii-&gt;special[i] = true;</div><div class='add'>+			break;</div><div class='add'>+unsupported:</div><div class='add'>+		default:</div><div class='add'>+			dev_err(dev, "Unsupported PHY mode %s on port %d!\n",</div><div class='add'>+				phy_modes(priv-&gt;phy_mode[i]), i);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		mii-&gt;phy_mac[i] = role;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_init_static_fdb(struct sja1105_private *priv)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_l2_lookup_entry *l2_lookup;</div><div class='add'>+	struct sja1105_table *table;</div><div class='add'>+	int port;</div><div class='add'>+</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_L2_LOOKUP];</div><div class='add'>+</div><div class='add'>+	/* We only populate the FDB table through dynamic L2 Address Lookup</div><div class='add'>+	 * entries, except for a special entry at the end which is a catch-all</div><div class='add'>+	 * for unknown multicast and will be used to control flooding domain.</div><div class='add'>+	 */</div><div class='add'>+	if (table-&gt;entry_count) {</div><div class='add'>+		kfree(table-&gt;entries);</div><div class='add'>+		table-&gt;entry_count = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;info-&gt;can_limit_mcast_flood)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	table-&gt;entries = kcalloc(1, table-&gt;ops-&gt;unpacked_entry_size,</div><div class='add'>+				 GFP_KERNEL);</div><div class='add'>+	if (!table-&gt;entries)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	table-&gt;entry_count = 1;</div><div class='add'>+	l2_lookup = table-&gt;entries;</div><div class='add'>+</div><div class='add'>+	/* All L2 multicast addresses have an odd first octet */</div><div class='add'>+	l2_lookup[0].macaddr = SJA1105_UNKNOWN_MULTICAST;</div><div class='add'>+	l2_lookup[0].mask_macaddr = SJA1105_UNKNOWN_MULTICAST;</div><div class='add'>+	l2_lookup[0].lockeds = true;</div><div class='add'>+	l2_lookup[0].index = SJA1105_MAX_L2_LOOKUP_COUNT - 1;</div><div class='add'>+</div><div class='add'>+	/* Flood multicast to every port by default */</div><div class='add'>+	for (port = 0; port &lt; priv-&gt;ds-&gt;num_ports; port++)</div><div class='add'>+		if (!dsa_is_unused_port(priv-&gt;ds, port))</div><div class='add'>+			l2_lookup[0].destports |= BIT(port);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_init_l2_lookup_params(struct sja1105_private *priv)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_l2_lookup_params_entry default_l2_lookup_params = {</div><div class='add'>+		/* Learned FDB entries are forgotten after 300 seconds */</div><div class='add'>+		.maxage = SJA1105_AGEING_TIME_MS(300000),</div><div class='add'>+		/* All entries within a FDB bin are available for learning */</div><div class='add'>+		.dyn_tbsz = SJA1105ET_FDB_BIN_SIZE,</div><div class='add'>+		/* And the P/Q/R/S equivalent setting: */</div><div class='add'>+		.start_dynspc = 0,</div><div class='add'>+		/* 2^8 + 2^5 + 2^3 + 2^2 + 2^1 + 1 in Koopman notation */</div><div class='add'>+		.poly = 0x97,</div><div class='add'>+		/* Always use Independent VLAN Learning (IVL) */</div><div class='add'>+		.shared_learn = false,</div><div class='add'>+		/* Don't discard management traffic based on ENFPORT -</div><div class='add'>+		 * we don't perform SMAC port enforcement anyway, so</div><div class='add'>+		 * what we are setting here doesn't matter.</div><div class='add'>+		 */</div><div class='add'>+		.no_enf_hostprt = false,</div><div class='add'>+		/* Don't learn SMAC for mac_fltres1 and mac_fltres0.</div><div class='add'>+		 * Maybe correlate with no_linklocal_learn from bridge driver?</div><div class='add'>+		 */</div><div class='add'>+		.no_mgmt_learn = true,</div><div class='add'>+		/* P/Q/R/S only */</div><div class='add'>+		.use_static = true,</div><div class='add'>+		/* Dynamically learned FDB entries can overwrite other (older)</div><div class='add'>+		 * dynamic FDB entries</div><div class='add'>+		 */</div><div class='add'>+		.owr_dyn = true,</div><div class='add'>+		.drpnolearn = true,</div><div class='add'>+	};</div><div class='add'>+	struct dsa_switch *ds = priv-&gt;ds;</div><div class='add'>+	int port, num_used_ports = 0;</div><div class='add'>+	struct sja1105_table *table;</div><div class='add'>+	u64 max_fdb_entries;</div><div class='add'>+</div><div class='add'>+	for (port = 0; port &lt; ds-&gt;num_ports; port++)</div><div class='add'>+		if (!dsa_is_unused_port(ds, port))</div><div class='add'>+			num_used_ports++;</div><div class='add'>+</div><div class='add'>+	max_fdb_entries = SJA1105_MAX_L2_LOOKUP_COUNT / num_used_ports;</div><div class='add'>+</div><div class='add'>+	for (port = 0; port &lt; ds-&gt;num_ports; port++) {</div><div class='add'>+		if (dsa_is_unused_port(ds, port))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		default_l2_lookup_params.maxaddrp[port] = max_fdb_entries;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_L2_LOOKUP_PARAMS];</div><div class='add'>+</div><div class='add'>+	if (table-&gt;entry_count) {</div><div class='add'>+		kfree(table-&gt;entries);</div><div class='add'>+		table-&gt;entry_count = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	table-&gt;entries = kcalloc(table-&gt;ops-&gt;max_entry_count,</div><div class='add'>+				 table-&gt;ops-&gt;unpacked_entry_size, GFP_KERNEL);</div><div class='add'>+	if (!table-&gt;entries)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	table-&gt;entry_count = table-&gt;ops-&gt;max_entry_count;</div><div class='add'>+</div><div class='add'>+	/* This table only has a single entry */</div><div class='add'>+	((struct sja1105_l2_lookup_params_entry *)table-&gt;entries)[0] =</div><div class='add'>+				default_l2_lookup_params;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Set up a default VLAN for untagged traffic injected from the CPU</div><div class='add'>+ * using management routes (e.g. STP, PTP) as opposed to tag_8021q.</div><div class='add'>+ * All DT-defined ports are members of this VLAN, and there are no</div><div class='add'>+ * restrictions on forwarding (since the CPU selects the destination).</div><div class='add'>+ * Frames from this VLAN will always be transmitted as untagged, and</div><div class='add'>+ * neither the bridge nor the 8021q module cannot create this VLAN ID.</div><div class='add'>+ */</div><div class='add'>+static int sja1105_init_static_vlan(struct sja1105_private *priv)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_table *table;</div><div class='add'>+	struct sja1105_vlan_lookup_entry pvid = {</div><div class='add'>+		.type_entry = SJA1110_VLAN_D_TAG,</div><div class='add'>+		.ving_mirr = 0,</div><div class='add'>+		.vegr_mirr = 0,</div><div class='add'>+		.vmemb_port = 0,</div><div class='add'>+		.vlan_bc = 0,</div><div class='add'>+		.tag_port = 0,</div><div class='add'>+		.vlanid = SJA1105_DEFAULT_VLAN,</div><div class='add'>+	};</div><div class='add'>+	struct dsa_switch *ds = priv-&gt;ds;</div><div class='add'>+	int port;</div><div class='add'>+</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_VLAN_LOOKUP];</div><div class='add'>+</div><div class='add'>+	if (table-&gt;entry_count) {</div><div class='add'>+		kfree(table-&gt;entries);</div><div class='add'>+		table-&gt;entry_count = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	table-&gt;entries = kzalloc(table-&gt;ops-&gt;unpacked_entry_size,</div><div class='add'>+				 GFP_KERNEL);</div><div class='add'>+	if (!table-&gt;entries)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	table-&gt;entry_count = 1;</div><div class='add'>+</div><div class='add'>+	for (port = 0; port &lt; ds-&gt;num_ports; port++) {</div><div class='add'>+		if (dsa_is_unused_port(ds, port))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		pvid.vmemb_port |= BIT(port);</div><div class='add'>+		pvid.vlan_bc |= BIT(port);</div><div class='add'>+		pvid.tag_port &amp;= ~BIT(port);</div><div class='add'>+</div><div class='add'>+		if (dsa_is_cpu_port(ds, port) || dsa_is_dsa_port(ds, port)) {</div><div class='add'>+			priv-&gt;tag_8021q_pvid[port] = SJA1105_DEFAULT_VLAN;</div><div class='add'>+			priv-&gt;bridge_pvid[port] = SJA1105_DEFAULT_VLAN;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	((struct sja1105_vlan_lookup_entry *)table-&gt;entries)[0] = pvid;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_init_l2_forwarding(struct sja1105_private *priv)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_l2_forwarding_entry *l2fwd;</div><div class='add'>+	struct dsa_switch *ds = priv-&gt;ds;</div><div class='add'>+	struct dsa_switch_tree *dst;</div><div class='add'>+	struct sja1105_table *table;</div><div class='add'>+	struct dsa_link *dl;</div><div class='add'>+	int port, tc;</div><div class='add'>+	int from, to;</div><div class='add'>+</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_L2_FORWARDING];</div><div class='add'>+</div><div class='add'>+	if (table-&gt;entry_count) {</div><div class='add'>+		kfree(table-&gt;entries);</div><div class='add'>+		table-&gt;entry_count = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	table-&gt;entries = kcalloc(table-&gt;ops-&gt;max_entry_count,</div><div class='add'>+				 table-&gt;ops-&gt;unpacked_entry_size, GFP_KERNEL);</div><div class='add'>+	if (!table-&gt;entries)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	table-&gt;entry_count = table-&gt;ops-&gt;max_entry_count;</div><div class='add'>+</div><div class='add'>+	l2fwd = table-&gt;entries;</div><div class='add'>+</div><div class='add'>+	/* First 5 entries in the L2 Forwarding Table define the forwarding</div><div class='add'>+	 * rules and the VLAN PCP to ingress queue mapping.</div><div class='add'>+	 * Set up the ingress queue mapping first.</div><div class='add'>+	 */</div><div class='add'>+	for (port = 0; port &lt; ds-&gt;num_ports; port++) {</div><div class='add'>+		if (dsa_is_unused_port(ds, port))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		for (tc = 0; tc &lt; SJA1105_NUM_TC; tc++)</div><div class='add'>+			l2fwd[port].vlan_pmap[tc] = tc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Then manage the forwarding domain for user ports. These can forward</div><div class='add'>+	 * only to the always-on domain (CPU port and DSA links)</div><div class='add'>+	 */</div><div class='add'>+	for (from = 0; from &lt; ds-&gt;num_ports; from++) {</div><div class='add'>+		if (!dsa_is_user_port(ds, from))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		for (to = 0; to &lt; ds-&gt;num_ports; to++) {</div><div class='add'>+			if (!dsa_is_cpu_port(ds, to) &amp;&amp;</div><div class='add'>+			    !dsa_is_dsa_port(ds, to))</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			l2fwd[from].bc_domain |= BIT(to);</div><div class='add'>+			l2fwd[from].fl_domain |= BIT(to);</div><div class='add'>+</div><div class='add'>+			sja1105_port_allow_traffic(l2fwd, from, to, true);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Then manage the forwarding domain for DSA links and CPU ports (the</div><div class='add'>+	 * always-on domain). These can send packets to any enabled port except</div><div class='add'>+	 * themselves.</div><div class='add'>+	 */</div><div class='add'>+	for (from = 0; from &lt; ds-&gt;num_ports; from++) {</div><div class='add'>+		if (!dsa_is_cpu_port(ds, from) &amp;&amp; !dsa_is_dsa_port(ds, from))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		for (to = 0; to &lt; ds-&gt;num_ports; to++) {</div><div class='add'>+			if (dsa_is_unused_port(ds, to))</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			if (from == to)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			l2fwd[from].bc_domain |= BIT(to);</div><div class='add'>+			l2fwd[from].fl_domain |= BIT(to);</div><div class='add'>+</div><div class='add'>+			sja1105_port_allow_traffic(l2fwd, from, to, true);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* In odd topologies ("H" connections where there is a DSA link to</div><div class='add'>+	 * another switch which also has its own CPU port), TX packets can loop</div><div class='add'>+	 * back into the system (they are flooded from CPU port 1 to the DSA</div><div class='add'>+	 * link, and from there to CPU port 2). Prevent this from happening by</div><div class='add'>+	 * cutting RX from DSA links towards our CPU port, if the remote switch</div><div class='add'>+	 * has its own CPU port and therefore doesn't need ours for network</div><div class='add'>+	 * stack termination.</div><div class='add'>+	 */</div><div class='add'>+	dst = ds-&gt;dst;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(dl, &amp;dst-&gt;rtable, list) {</div><div class='add'>+		if (dl-&gt;dp-&gt;ds != ds || dl-&gt;link_dp-&gt;cpu_dp == dl-&gt;dp-&gt;cpu_dp)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		from = dl-&gt;dp-&gt;index;</div><div class='add'>+		to = dsa_upstream_port(ds, from);</div><div class='add'>+</div><div class='add'>+		dev_warn(ds-&gt;dev,</div><div class='add'>+			 "H topology detected, cutting RX from DSA link %d to CPU port %d to prevent TX packet loops\n",</div><div class='add'>+			 from, to);</div><div class='add'>+</div><div class='add'>+		sja1105_port_allow_traffic(l2fwd, from, to, false);</div><div class='add'>+</div><div class='add'>+		l2fwd[from].bc_domain &amp;= ~BIT(to);</div><div class='add'>+		l2fwd[from].fl_domain &amp;= ~BIT(to);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Finally, manage the egress flooding domain. All ports start up with</div><div class='add'>+	 * flooding enabled, including the CPU port and DSA links.</div><div class='add'>+	 */</div><div class='add'>+	for (port = 0; port &lt; ds-&gt;num_ports; port++) {</div><div class='add'>+		if (dsa_is_unused_port(ds, port))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		priv-&gt;ucast_egress_floods |= BIT(port);</div><div class='add'>+		priv-&gt;bcast_egress_floods |= BIT(port);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Next 8 entries define VLAN PCP mapping from ingress to egress.</div><div class='add'>+	 * Create a one-to-one mapping.</div><div class='add'>+	 */</div><div class='add'>+	for (tc = 0; tc &lt; SJA1105_NUM_TC; tc++) {</div><div class='add'>+		for (port = 0; port &lt; ds-&gt;num_ports; port++) {</div><div class='add'>+			if (dsa_is_unused_port(ds, port))</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			l2fwd[ds-&gt;num_ports + tc].vlan_pmap[port] = tc;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		l2fwd[ds-&gt;num_ports + tc].type_egrpcp2outputq = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1110_init_pcp_remapping(struct sja1105_private *priv)</div><div class='add'>+{</div><div class='add'>+	struct sja1110_pcp_remapping_entry *pcp_remap;</div><div class='add'>+	struct dsa_switch *ds = priv-&gt;ds;</div><div class='add'>+	struct sja1105_table *table;</div><div class='add'>+	int port, tc;</div><div class='add'>+</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_PCP_REMAPPING];</div><div class='add'>+</div><div class='add'>+	/* Nothing to do for SJA1105 */</div><div class='add'>+	if (!table-&gt;ops-&gt;max_entry_count)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (table-&gt;entry_count) {</div><div class='add'>+		kfree(table-&gt;entries);</div><div class='add'>+		table-&gt;entry_count = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	table-&gt;entries = kcalloc(table-&gt;ops-&gt;max_entry_count,</div><div class='add'>+				 table-&gt;ops-&gt;unpacked_entry_size, GFP_KERNEL);</div><div class='add'>+	if (!table-&gt;entries)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	table-&gt;entry_count = table-&gt;ops-&gt;max_entry_count;</div><div class='add'>+</div><div class='add'>+	pcp_remap = table-&gt;entries;</div><div class='add'>+</div><div class='add'>+	/* Repeat the configuration done for vlan_pmap */</div><div class='add'>+	for (port = 0; port &lt; ds-&gt;num_ports; port++) {</div><div class='add'>+		if (dsa_is_unused_port(ds, port))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		for (tc = 0; tc &lt; SJA1105_NUM_TC; tc++)</div><div class='add'>+			pcp_remap[port].egrpcp[tc] = tc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_init_l2_forwarding_params(struct sja1105_private *priv)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_l2_forwarding_params_entry *l2fwd_params;</div><div class='add'>+	struct sja1105_table *table;</div><div class='add'>+</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_L2_FORWARDING_PARAMS];</div><div class='add'>+</div><div class='add'>+	if (table-&gt;entry_count) {</div><div class='add'>+		kfree(table-&gt;entries);</div><div class='add'>+		table-&gt;entry_count = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	table-&gt;entries = kcalloc(table-&gt;ops-&gt;max_entry_count,</div><div class='add'>+				 table-&gt;ops-&gt;unpacked_entry_size, GFP_KERNEL);</div><div class='add'>+	if (!table-&gt;entries)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	table-&gt;entry_count = table-&gt;ops-&gt;max_entry_count;</div><div class='add'>+</div><div class='add'>+	/* This table only has a single entry */</div><div class='add'>+	l2fwd_params = table-&gt;entries;</div><div class='add'>+</div><div class='add'>+	/* Disallow dynamic reconfiguration of vlan_pmap */</div><div class='add'>+	l2fwd_params-&gt;max_dynp = 0;</div><div class='add'>+	/* Use a single memory partition for all ingress queues */</div><div class='add'>+	l2fwd_params-&gt;part_spc[0] = priv-&gt;info-&gt;max_frame_mem;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void sja1105_frame_memory_partitioning(struct sja1105_private *priv)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_l2_forwarding_params_entry *l2_fwd_params;</div><div class='add'>+	struct sja1105_vl_forwarding_params_entry *vl_fwd_params;</div><div class='add'>+	struct sja1105_table *table;</div><div class='add'>+</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_L2_FORWARDING_PARAMS];</div><div class='add'>+	l2_fwd_params = table-&gt;entries;</div><div class='add'>+	l2_fwd_params-&gt;part_spc[0] = SJA1105_MAX_FRAME_MEMORY;</div><div class='add'>+</div><div class='add'>+	/* If we have any critical-traffic virtual links, we need to reserve</div><div class='add'>+	 * some frame buffer memory for them. At the moment, hardcode the value</div><div class='add'>+	 * at 100 blocks of 128 bytes of memory each. This leaves 829 blocks</div><div class='add'>+	 * remaining for best-effort traffic. TODO: figure out a more flexible</div><div class='add'>+	 * way to perform the frame buffer partitioning.</div><div class='add'>+	 */</div><div class='add'>+	if (!priv-&gt;static_config.tables[BLK_IDX_VL_FORWARDING].entry_count)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_VL_FORWARDING_PARAMS];</div><div class='add'>+	vl_fwd_params = table-&gt;entries;</div><div class='add'>+</div><div class='add'>+	l2_fwd_params-&gt;part_spc[0] -= SJA1105_VL_FRAME_MEMORY;</div><div class='add'>+	vl_fwd_params-&gt;partspc[0] = SJA1105_VL_FRAME_MEMORY;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* SJA1110 TDMACONFIGIDX values:</div><div class='add'>+ *</div><div class='add'>+ *      | 100 Mbps ports |  1Gbps ports  | 2.5Gbps ports | Disabled ports</div><div class='add'>+ * -----+----------------+---------------+---------------+---------------</div><div class='add'>+ *   0  |   0, [5:10]    |     [1:2]     |     [3:4]     |     retag</div><div class='add'>+ *   1  |0, [5:10], retag|     [1:2]     |     [3:4]     |       -</div><div class='add'>+ *   2  |   0, [5:10]    |  [1:3], retag |       4       |       -</div><div class='add'>+ *   3  |   0, [5:10]    |[1:2], 4, retag|       3       |       -</div><div class='add'>+ *   4  |  0, 2, [5:10]  |    1, retag   |     [3:4]     |       -</div><div class='add'>+ *   5  |  0, 1, [5:10]  |    2, retag   |     [3:4]     |       -</div><div class='add'>+ *  14  |   0, [5:10]    | [1:4], retag  |       -       |       -</div><div class='add'>+ *  15  |     [5:10]     | [0:4], retag  |       -       |       -</div><div class='add'>+ */</div><div class='add'>+static void sja1110_select_tdmaconfigidx(struct sja1105_private *priv)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_general_params_entry *general_params;</div><div class='add'>+	struct sja1105_table *table;</div><div class='add'>+	bool port_1_is_base_tx;</div><div class='add'>+	bool port_3_is_2500;</div><div class='add'>+	bool port_4_is_2500;</div><div class='add'>+	u64 tdmaconfigidx;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;info-&gt;device_id != SJA1110_DEVICE_ID)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_GENERAL_PARAMS];</div><div class='add'>+	general_params = table-&gt;entries;</div><div class='add'>+</div><div class='add'>+	/* All the settings below are "as opposed to SGMII", which is the</div><div class='add'>+	 * other pinmuxing option.</div><div class='add'>+	 */</div><div class='add'>+	port_1_is_base_tx = priv-&gt;phy_mode[1] == PHY_INTERFACE_MODE_INTERNAL;</div><div class='add'>+	port_3_is_2500 = priv-&gt;phy_mode[3] == PHY_INTERFACE_MODE_2500BASEX;</div><div class='add'>+	port_4_is_2500 = priv-&gt;phy_mode[4] == PHY_INTERFACE_MODE_2500BASEX;</div><div class='add'>+</div><div class='add'>+	if (port_1_is_base_tx)</div><div class='add'>+		/* Retagging port will operate at 1 Gbps */</div><div class='add'>+		tdmaconfigidx = 5;</div><div class='add'>+	else if (port_3_is_2500 &amp;&amp; port_4_is_2500)</div><div class='add'>+		/* Retagging port will operate at 100 Mbps */</div><div class='add'>+		tdmaconfigidx = 1;</div><div class='add'>+	else if (port_3_is_2500)</div><div class='add'>+		/* Retagging port will operate at 1 Gbps */</div><div class='add'>+		tdmaconfigidx = 3;</div><div class='add'>+	else if (port_4_is_2500)</div><div class='add'>+		/* Retagging port will operate at 1 Gbps */</div><div class='add'>+		tdmaconfigidx = 2;</div><div class='add'>+	else</div><div class='add'>+		/* Retagging port will operate at 1 Gbps */</div><div class='add'>+		tdmaconfigidx = 14;</div><div class='add'>+</div><div class='add'>+	general_params-&gt;tdmaconfigidx = tdmaconfigidx;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_init_topology(struct sja1105_private *priv,</div><div class='add'>+				 struct sja1105_general_params_entry *general_params)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds = priv-&gt;ds;</div><div class='add'>+	int port;</div><div class='add'>+</div><div class='add'>+	/* The host port is the destination for traffic matching mac_fltres1</div><div class='add'>+	 * and mac_fltres0 on all ports except itself. Default to an invalid</div><div class='add'>+	 * value.</div><div class='add'>+	 */</div><div class='add'>+	general_params-&gt;host_port = ds-&gt;num_ports;</div><div class='add'>+</div><div class='add'>+	/* Link-local traffic received on casc_port will be forwarded</div><div class='add'>+	 * to host_port without embedding the source port and device ID</div><div class='add'>+	 * info in the destination MAC address, and no RX timestamps will be</div><div class='add'>+	 * taken either (presumably because it is a cascaded port and a</div><div class='add'>+	 * downstream SJA switch already did that).</div><div class='add'>+	 * To disable the feature, we need to do different things depending on</div><div class='add'>+	 * switch generation. On SJA1105 we need to set an invalid port, while</div><div class='add'>+	 * on SJA1110 which support multiple cascaded ports, this field is a</div><div class='add'>+	 * bitmask so it must be left zero.</div><div class='add'>+	 */</div><div class='add'>+	if (!priv-&gt;info-&gt;multiple_cascade_ports)</div><div class='add'>+		general_params-&gt;casc_port = ds-&gt;num_ports;</div><div class='add'>+</div><div class='add'>+	for (port = 0; port &lt; ds-&gt;num_ports; port++) {</div><div class='add'>+		bool is_upstream = dsa_is_upstream_port(ds, port);</div><div class='add'>+		bool is_dsa_link = dsa_is_dsa_port(ds, port);</div><div class='add'>+</div><div class='add'>+		/* Upstream ports can be dedicated CPU ports or</div><div class='add'>+		 * upstream-facing DSA links</div><div class='add'>+		 */</div><div class='add'>+		if (is_upstream) {</div><div class='add'>+			if (general_params-&gt;host_port == ds-&gt;num_ports) {</div><div class='add'>+				general_params-&gt;host_port = port;</div><div class='add'>+			} else {</div><div class='add'>+				dev_err(ds-&gt;dev,</div><div class='add'>+					"Port %llu is already a host port, configuring %d as one too is not supported\n",</div><div class='add'>+					general_params-&gt;host_port, port);</div><div class='add'>+				return -EINVAL;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Cascade ports are downstream-facing DSA links */</div><div class='add'>+		if (is_dsa_link &amp;&amp; !is_upstream) {</div><div class='add'>+			if (priv-&gt;info-&gt;multiple_cascade_ports) {</div><div class='add'>+				general_params-&gt;casc_port |= BIT(port);</div><div class='add'>+			} else if (general_params-&gt;casc_port == ds-&gt;num_ports) {</div><div class='add'>+				general_params-&gt;casc_port = port;</div><div class='add'>+			} else {</div><div class='add'>+				dev_err(ds-&gt;dev,</div><div class='add'>+					"Port %llu is already a cascade port, configuring %d as one too is not supported\n",</div><div class='add'>+					general_params-&gt;casc_port, port);</div><div class='add'>+				return -EINVAL;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (general_params-&gt;host_port == ds-&gt;num_ports) {</div><div class='add'>+		dev_err(ds-&gt;dev, "No host port configured\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_init_general_params(struct sja1105_private *priv)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_general_params_entry default_general_params = {</div><div class='add'>+		/* Allow dynamic changing of the mirror port */</div><div class='add'>+		.mirr_ptacu = true,</div><div class='add'>+		.switchid = priv-&gt;ds-&gt;index,</div><div class='add'>+		/* Priority queue for link-local management frames</div><div class='add'>+		 * (both ingress to and egress from CPU - PTP, STP etc)</div><div class='add'>+		 */</div><div class='add'>+		.hostprio = 7,</div><div class='add'>+		.mac_fltres1 = SJA1105_LINKLOCAL_FILTER_A,</div><div class='add'>+		.mac_flt1    = SJA1105_LINKLOCAL_FILTER_A_MASK,</div><div class='add'>+		.incl_srcpt1 = true,</div><div class='add'>+		.send_meta1  = true,</div><div class='add'>+		.mac_fltres0 = SJA1105_LINKLOCAL_FILTER_B,</div><div class='add'>+		.mac_flt0    = SJA1105_LINKLOCAL_FILTER_B_MASK,</div><div class='add'>+		.incl_srcpt0 = true,</div><div class='add'>+		.send_meta0  = true,</div><div class='add'>+		/* Default to an invalid value */</div><div class='add'>+		.mirr_port = priv-&gt;ds-&gt;num_ports,</div><div class='add'>+		/* No TTEthernet */</div><div class='add'>+		.vllupformat = SJA1105_VL_FORMAT_PSFP,</div><div class='add'>+		.vlmarker = 0,</div><div class='add'>+		.vlmask = 0,</div><div class='add'>+		/* Only update correctionField for 1-step PTP (L2 transport) */</div><div class='add'>+		.ignore2stf = 0,</div><div class='add'>+		/* Forcefully disable VLAN filtering by telling</div><div class='add'>+		 * the switch that VLAN has a different EtherType.</div><div class='add'>+		 */</div><div class='add'>+		.tpid = ETH_P_SJA1105,</div><div class='add'>+		.tpid2 = ETH_P_SJA1105,</div><div class='add'>+		/* Enable the TTEthernet engine on SJA1110 */</div><div class='add'>+		.tte_en = true,</div><div class='add'>+		/* Set up the EtherType for control packets on SJA1110 */</div><div class='add'>+		.header_type = ETH_P_SJA1110,</div><div class='add'>+	};</div><div class='add'>+	struct sja1105_general_params_entry *general_params;</div><div class='add'>+	struct sja1105_table *table;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_init_topology(priv, &amp;default_general_params);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_GENERAL_PARAMS];</div><div class='add'>+</div><div class='add'>+	if (table-&gt;entry_count) {</div><div class='add'>+		kfree(table-&gt;entries);</div><div class='add'>+		table-&gt;entry_count = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	table-&gt;entries = kcalloc(table-&gt;ops-&gt;max_entry_count,</div><div class='add'>+				 table-&gt;ops-&gt;unpacked_entry_size, GFP_KERNEL);</div><div class='add'>+	if (!table-&gt;entries)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	table-&gt;entry_count = table-&gt;ops-&gt;max_entry_count;</div><div class='add'>+</div><div class='add'>+	general_params = table-&gt;entries;</div><div class='add'>+</div><div class='add'>+	/* This table only has a single entry */</div><div class='add'>+	general_params[0] = default_general_params;</div><div class='add'>+</div><div class='add'>+	sja1110_select_tdmaconfigidx(priv);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_init_avb_params(struct sja1105_private *priv)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_avb_params_entry *avb;</div><div class='add'>+	struct sja1105_table *table;</div><div class='add'>+</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_AVB_PARAMS];</div><div class='add'>+</div><div class='add'>+	/* Discard previous AVB Parameters Table */</div><div class='add'>+	if (table-&gt;entry_count) {</div><div class='add'>+		kfree(table-&gt;entries);</div><div class='add'>+		table-&gt;entry_count = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	table-&gt;entries = kcalloc(table-&gt;ops-&gt;max_entry_count,</div><div class='add'>+				 table-&gt;ops-&gt;unpacked_entry_size, GFP_KERNEL);</div><div class='add'>+	if (!table-&gt;entries)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	table-&gt;entry_count = table-&gt;ops-&gt;max_entry_count;</div><div class='add'>+</div><div class='add'>+	avb = table-&gt;entries;</div><div class='add'>+</div><div class='add'>+	/* Configure the MAC addresses for meta frames */</div><div class='add'>+	avb-&gt;destmeta = SJA1105_META_DMAC;</div><div class='add'>+	avb-&gt;srcmeta  = SJA1105_META_SMAC;</div><div class='add'>+	/* On P/Q/R/S, configure the direction of the PTP_CLK pin as input by</div><div class='add'>+	 * default. This is because there might be boards with a hardware</div><div class='add'>+	 * layout where enabling the pin as output might cause an electrical</div><div class='add'>+	 * clash. On E/T the pin is always an output, which the board designers</div><div class='add'>+	 * probably already knew, so even if there are going to be electrical</div><div class='add'>+	 * issues, there's nothing we can do.</div><div class='add'>+	 */</div><div class='add'>+	avb-&gt;cas_master = false;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The L2 policing table is 2-stage. The table is looked up for each frame</div><div class='add'>+ * according to the ingress port, whether it was broadcast or not, and the</div><div class='add'>+ * classified traffic class (given by VLAN PCP). This portion of the lookup is</div><div class='add'>+ * fixed, and gives access to the SHARINDX, an indirection register pointing</div><div class='add'>+ * within the policing table itself, which is used to resolve the policer that</div><div class='add'>+ * will be used for this frame.</div><div class='add'>+ *</div><div class='add'>+ *  Stage 1                              Stage 2</div><div class='add'>+ * +------------+--------+              +---------------------------------+</div><div class='add'>+ * |Port 0 TC 0 |SHARINDX|              | Policer 0: Rate, Burst, MTU     |</div><div class='add'>+ * +------------+--------+              +---------------------------------+</div><div class='add'>+ * |Port 0 TC 1 |SHARINDX|              | Policer 1: Rate, Burst, MTU     |</div><div class='add'>+ * +------------+--------+              +---------------------------------+</div><div class='add'>+ *    ...                               | Policer 2: Rate, Burst, MTU     |</div><div class='add'>+ * +------------+--------+              +---------------------------------+</div><div class='add'>+ * |Port 0 TC 7 |SHARINDX|              | Policer 3: Rate, Burst, MTU     |</div><div class='add'>+ * +------------+--------+              +---------------------------------+</div><div class='add'>+ * |Port 1 TC 0 |SHARINDX|              | Policer 4: Rate, Burst, MTU     |</div><div class='add'>+ * +------------+--------+              +---------------------------------+</div><div class='add'>+ *    ...                               | Policer 5: Rate, Burst, MTU     |</div><div class='add'>+ * +------------+--------+              +---------------------------------+</div><div class='add'>+ * |Port 1 TC 7 |SHARINDX|              | Policer 6: Rate, Burst, MTU     |</div><div class='add'>+ * +------------+--------+              +---------------------------------+</div><div class='add'>+ *    ...                               | Policer 7: Rate, Burst, MTU     |</div><div class='add'>+ * +------------+--------+              +---------------------------------+</div><div class='add'>+ * |Port 4 TC 7 |SHARINDX|                 ...</div><div class='add'>+ * +------------+--------+</div><div class='add'>+ * |Port 0 BCAST|SHARINDX|                 ...</div><div class='add'>+ * +------------+--------+</div><div class='add'>+ * |Port 1 BCAST|SHARINDX|                 ...</div><div class='add'>+ * +------------+--------+</div><div class='add'>+ *    ...                                  ...</div><div class='add'>+ * +------------+--------+              +---------------------------------+</div><div class='add'>+ * |Port 4 BCAST|SHARINDX|              | Policer 44: Rate, Burst, MTU    |</div><div class='add'>+ * +------------+--------+              +---------------------------------+</div><div class='add'>+ *</div><div class='add'>+ * In this driver, we shall use policers 0-4 as statically alocated port</div><div class='add'>+ * (matchall) policers. So we need to make the SHARINDX for all lookups</div><div class='add'>+ * corresponding to this ingress port (8 VLAN PCP lookups and 1 broadcast</div><div class='add'>+ * lookup) equal.</div><div class='add'>+ * The remaining policers (40) shall be dynamically allocated for flower</div><div class='add'>+ * policers, where the key is either vlan_prio or dst_mac ff:ff:ff:ff:ff:ff.</div><div class='add'>+ */</div><div class='add'>+#define SJA1105_RATE_MBPS(speed) (((speed) * 64000) / 1000)</div><div class='add'>+</div><div class='add'>+static int sja1105_init_l2_policing(struct sja1105_private *priv)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_l2_policing_entry *policing;</div><div class='add'>+	struct dsa_switch *ds = priv-&gt;ds;</div><div class='add'>+	struct sja1105_table *table;</div><div class='add'>+	int port, tc;</div><div class='add'>+</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_L2_POLICING];</div><div class='add'>+</div><div class='add'>+	/* Discard previous L2 Policing Table */</div><div class='add'>+	if (table-&gt;entry_count) {</div><div class='add'>+		kfree(table-&gt;entries);</div><div class='add'>+		table-&gt;entry_count = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	table-&gt;entries = kcalloc(table-&gt;ops-&gt;max_entry_count,</div><div class='add'>+				 table-&gt;ops-&gt;unpacked_entry_size, GFP_KERNEL);</div><div class='add'>+	if (!table-&gt;entries)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	table-&gt;entry_count = table-&gt;ops-&gt;max_entry_count;</div><div class='add'>+</div><div class='add'>+	policing = table-&gt;entries;</div><div class='add'>+</div><div class='add'>+	/* Setup shared indices for the matchall policers */</div><div class='add'>+	for (port = 0; port &lt; ds-&gt;num_ports; port++) {</div><div class='add'>+		int mcast = (ds-&gt;num_ports * (SJA1105_NUM_TC + 1)) + port;</div><div class='add'>+		int bcast = (ds-&gt;num_ports * SJA1105_NUM_TC) + port;</div><div class='add'>+</div><div class='add'>+		for (tc = 0; tc &lt; SJA1105_NUM_TC; tc++)</div><div class='add'>+			policing[port * SJA1105_NUM_TC + tc].sharindx = port;</div><div class='add'>+</div><div class='add'>+		policing[bcast].sharindx = port;</div><div class='add'>+		/* Only SJA1110 has multicast policers */</div><div class='add'>+		if (mcast &lt; table-&gt;ops-&gt;max_entry_count)</div><div class='add'>+			policing[mcast].sharindx = port;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Setup the matchall policer parameters */</div><div class='add'>+	for (port = 0; port &lt; ds-&gt;num_ports; port++) {</div><div class='add'>+		int mtu = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;</div><div class='add'>+</div><div class='add'>+		if (dsa_is_cpu_port(ds, port) || dsa_is_dsa_port(ds, port))</div><div class='add'>+			mtu += VLAN_HLEN;</div><div class='add'>+</div><div class='add'>+		policing[port].smax = 65535; /* Burst size in bytes */</div><div class='add'>+		policing[port].rate = SJA1105_RATE_MBPS(1000);</div><div class='add'>+		policing[port].maxlen = mtu;</div><div class='add'>+		policing[port].partition = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_static_config_load(struct sja1105_private *priv)</div><div class='add'>+{</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	sja1105_static_config_free(&amp;priv-&gt;static_config);</div><div class='add'>+	rc = sja1105_static_config_init(&amp;priv-&gt;static_config,</div><div class='add'>+					priv-&gt;info-&gt;static_ops,</div><div class='add'>+					priv-&gt;info-&gt;device_id);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	/* Build static configuration */</div><div class='add'>+	rc = sja1105_init_mac_settings(priv);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+	rc = sja1105_init_mii_settings(priv);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+	rc = sja1105_init_static_fdb(priv);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+	rc = sja1105_init_static_vlan(priv);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+	rc = sja1105_init_l2_lookup_params(priv);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+	rc = sja1105_init_l2_forwarding(priv);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+	rc = sja1105_init_l2_forwarding_params(priv);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+	rc = sja1105_init_l2_policing(priv);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+	rc = sja1105_init_general_params(priv);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+	rc = sja1105_init_avb_params(priv);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+	rc = sja1110_init_pcp_remapping(priv);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	/* Send initial configuration to hardware via SPI */</div><div class='add'>+	return sja1105_static_config_upload(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This is the "new way" for a MAC driver to configure its RGMII delay lines,</div><div class='add'>+ * based on the explicit "rx-internal-delay-ps" and "tx-internal-delay-ps"</div><div class='add'>+ * properties. It has the advantage of working with fixed links and with PHYs</div><div class='add'>+ * that apply RGMII delays too, and the MAC driver needs not perform any</div><div class='add'>+ * special checks.</div><div class='add'>+ *</div><div class='add'>+ * Previously we were acting upon the "phy-mode" property when we were</div><div class='add'>+ * operating in fixed-link, basically acting as a PHY, but with a reversed</div><div class='add'>+ * interpretation: PHY_INTERFACE_MODE_RGMII_TXID means that the MAC should</div><div class='add'>+ * behave as if it is connected to a PHY which has applied RGMII delays in the</div><div class='add'>+ * TX direction. So if anything, RX delays should have been added by the MAC,</div><div class='add'>+ * but we were adding TX delays.</div><div class='add'>+ *</div><div class='add'>+ * If the "{rx,tx}-internal-delay-ps" properties are not specified, we fall</div><div class='add'>+ * back to the legacy behavior and apply delays on fixed-link ports based on</div><div class='add'>+ * the reverse interpretation of the phy-mode. This is a deviation from the</div><div class='add'>+ * expected default behavior which is to simply apply no delays. To achieve</div><div class='add'>+ * that behavior with the new bindings, it is mandatory to specify</div><div class='add'>+ * "{rx,tx}-internal-delay-ps" with a value of 0.</div><div class='add'>+ */</div><div class='add'>+static int sja1105_parse_rgmii_delays(struct sja1105_private *priv, int port,</div><div class='add'>+				      struct device_node *port_dn)</div><div class='add'>+{</div><div class='add'>+	phy_interface_t phy_mode = priv-&gt;phy_mode[port];</div><div class='add'>+	struct device *dev = &amp;priv-&gt;spidev-&gt;dev;</div><div class='add'>+	int rx_delay = -1, tx_delay = -1;</div><div class='add'>+</div><div class='add'>+	if (!phy_interface_mode_is_rgmii(phy_mode))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	of_property_read_u32(port_dn, "rx-internal-delay-ps", &amp;rx_delay);</div><div class='add'>+	of_property_read_u32(port_dn, "tx-internal-delay-ps", &amp;tx_delay);</div><div class='add'>+</div><div class='add'>+	if (rx_delay == -1 &amp;&amp; tx_delay == -1 &amp;&amp; priv-&gt;fixed_link[port]) {</div><div class='add'>+		dev_warn(dev,</div><div class='add'>+			 "Port %d interpreting RGMII delay settings based on \"phy-mode\" property, "</div><div class='add'>+			 "please update device tree to specify \"rx-internal-delay-ps\" and "</div><div class='add'>+			 "\"tx-internal-delay-ps\"",</div><div class='add'>+			 port);</div><div class='add'>+</div><div class='add'>+		if (phy_mode == PHY_INTERFACE_MODE_RGMII_RXID ||</div><div class='add'>+		    phy_mode == PHY_INTERFACE_MODE_RGMII_ID)</div><div class='add'>+			rx_delay = 2000;</div><div class='add'>+</div><div class='add'>+		if (phy_mode == PHY_INTERFACE_MODE_RGMII_TXID ||</div><div class='add'>+		    phy_mode == PHY_INTERFACE_MODE_RGMII_ID)</div><div class='add'>+			tx_delay = 2000;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rx_delay &lt; 0)</div><div class='add'>+		rx_delay = 0;</div><div class='add'>+	if (tx_delay &lt; 0)</div><div class='add'>+		tx_delay = 0;</div><div class='add'>+</div><div class='add'>+	if ((rx_delay || tx_delay) &amp;&amp; !priv-&gt;info-&gt;setup_rgmii_delay) {</div><div class='add'>+		dev_err(dev, "Chip cannot apply RGMII delays\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((rx_delay &amp;&amp; rx_delay &lt; SJA1105_RGMII_DELAY_MIN_PS) ||</div><div class='add'>+	    (tx_delay &amp;&amp; tx_delay &lt; SJA1105_RGMII_DELAY_MIN_PS) ||</div><div class='add'>+	    (rx_delay &gt; SJA1105_RGMII_DELAY_MAX_PS) ||</div><div class='add'>+	    (tx_delay &gt; SJA1105_RGMII_DELAY_MAX_PS)) {</div><div class='add'>+		dev_err(dev,</div><div class='add'>+			"port %d RGMII delay values out of range, must be between %d and %d ps\n",</div><div class='add'>+			port, SJA1105_RGMII_DELAY_MIN_PS, SJA1105_RGMII_DELAY_MAX_PS);</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;rgmii_rx_delay_ps[port] = rx_delay;</div><div class='add'>+	priv-&gt;rgmii_tx_delay_ps[port] = tx_delay;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_parse_ports_node(struct sja1105_private *priv,</div><div class='add'>+				    struct device_node *ports_node)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;priv-&gt;spidev-&gt;dev;</div><div class='add'>+</div><div class='add'>+	for_each_available_child_of_node_scoped(ports_node, child) {</div><div class='add'>+		struct device_node *phy_node;</div><div class='add'>+		phy_interface_t phy_mode;</div><div class='add'>+		u32 index;</div><div class='add'>+		int err;</div><div class='add'>+</div><div class='add'>+		/* Get switch port number from DT */</div><div class='add'>+		if (of_property_read_u32(child, "reg", &amp;index) &lt; 0) {</div><div class='add'>+			dev_err(dev, "Port number not defined in device tree "</div><div class='add'>+				"(property \"reg\")\n");</div><div class='add'>+			return -ENODEV;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Get PHY mode from DT */</div><div class='add'>+		err = of_get_phy_mode(child, &amp;phy_mode);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(dev, "Failed to read phy-mode or "</div><div class='add'>+				"phy-interface-type property for port %d\n",</div><div class='add'>+				index);</div><div class='add'>+			return -ENODEV;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		phy_node = of_parse_phandle(child, "phy-handle", 0);</div><div class='add'>+		if (!phy_node) {</div><div class='add'>+			if (!of_phy_is_fixed_link(child)) {</div><div class='add'>+				dev_err(dev, "phy-handle or fixed-link "</div><div class='add'>+					"properties missing!\n");</div><div class='add'>+				return -ENODEV;</div><div class='add'>+			}</div><div class='add'>+			/* phy-handle is missing, but fixed-link isn't.</div><div class='add'>+			 * So it's a fixed link. Default to PHY role.</div><div class='add'>+			 */</div><div class='add'>+			priv-&gt;fixed_link[index] = true;</div><div class='add'>+		} else {</div><div class='add'>+			of_node_put(phy_node);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		priv-&gt;phy_mode[index] = phy_mode;</div><div class='add'>+</div><div class='add'>+		err = sja1105_parse_rgmii_delays(priv, index, child);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_parse_dt(struct sja1105_private *priv)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;priv-&gt;spidev-&gt;dev;</div><div class='add'>+	struct device_node *switch_node = dev-&gt;of_node;</div><div class='add'>+	struct device_node *ports_node;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	ports_node = of_get_child_by_name(switch_node, "ports");</div><div class='add'>+	if (!ports_node)</div><div class='add'>+		ports_node = of_get_child_by_name(switch_node, "ethernet-ports");</div><div class='add'>+	if (!ports_node) {</div><div class='add'>+		dev_err(dev, "Incorrect bindings: absent \"ports\" node\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = sja1105_parse_ports_node(priv, ports_node);</div><div class='add'>+	of_node_put(ports_node);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_set_port_speed(struct sja1105_private *priv, int port,</div><div class='add'>+				  int speed_mbps)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_mac_config_entry *mac;</div><div class='add'>+	u64 speed;</div><div class='add'>+</div><div class='add'>+	/* On P/Q/R/S, one can read from the device via the MAC reconfiguration</div><div class='add'>+	 * tables. On E/T, MAC reconfig tables are not readable, only writable.</div><div class='add'>+	 * We have to *know* what the MAC looks like.  For the sake of keeping</div><div class='add'>+	 * the code common, we'll use the static configuration tables as a</div><div class='add'>+	 * reasonable approximation for both E/T and P/Q/R/S.</div><div class='add'>+	 */</div><div class='add'>+	mac = priv-&gt;static_config.tables[BLK_IDX_MAC_CONFIG].entries;</div><div class='add'>+</div><div class='add'>+	switch (speed_mbps) {</div><div class='add'>+	case SPEED_UNKNOWN:</div><div class='add'>+		/* PHYLINK called sja1105_mac_config() to inform us about</div><div class='add'>+		 * the state-&gt;interface, but AN has not completed and the</div><div class='add'>+		 * speed is not yet valid. UM10944.pdf says that setting</div><div class='add'>+		 * SJA1105_SPEED_AUTO at runtime disables the port, so that is</div><div class='add'>+		 * ok for power consumption in case AN will never complete -</div><div class='add'>+		 * otherwise PHYLINK should come back with a new update.</div><div class='add'>+		 */</div><div class='add'>+		speed = priv-&gt;info-&gt;port_speed[SJA1105_SPEED_AUTO];</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_10:</div><div class='add'>+		speed = priv-&gt;info-&gt;port_speed[SJA1105_SPEED_10MBPS];</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_100:</div><div class='add'>+		speed = priv-&gt;info-&gt;port_speed[SJA1105_SPEED_100MBPS];</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_1000:</div><div class='add'>+		speed = priv-&gt;info-&gt;port_speed[SJA1105_SPEED_1000MBPS];</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_2500:</div><div class='add'>+		speed = priv-&gt;info-&gt;port_speed[SJA1105_SPEED_2500MBPS];</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(priv-&gt;ds-&gt;dev, "Invalid speed %iMbps\n", speed_mbps);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Overwrite SJA1105_SPEED_AUTO from the static MAC configuration</div><div class='add'>+	 * table, since this will be used for the clocking setup, and we no</div><div class='add'>+	 * longer need to store it in the static config (already told hardware</div><div class='add'>+	 * we want auto during upload phase).</div><div class='add'>+	 */</div><div class='add'>+	mac[port].speed = speed;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Write the MAC Configuration Table entry and, if necessary, the CGU settings,</div><div class='add'>+ * after a link speedchange for this port.</div><div class='add'>+ */</div><div class='add'>+static int sja1105_set_port_config(struct sja1105_private *priv, int port)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_mac_config_entry *mac;</div><div class='add'>+	struct device *dev = priv-&gt;ds-&gt;dev;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	/* On P/Q/R/S, one can read from the device via the MAC reconfiguration</div><div class='add'>+	 * tables. On E/T, MAC reconfig tables are not readable, only writable.</div><div class='add'>+	 * We have to *know* what the MAC looks like.  For the sake of keeping</div><div class='add'>+	 * the code common, we'll use the static configuration tables as a</div><div class='add'>+	 * reasonable approximation for both E/T and P/Q/R/S.</div><div class='add'>+	 */</div><div class='add'>+	mac = priv-&gt;static_config.tables[BLK_IDX_MAC_CONFIG].entries;</div><div class='add'>+</div><div class='add'>+	/* Write to the dynamic reconfiguration tables */</div><div class='add'>+	rc = sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, port,</div><div class='add'>+					  &amp;mac[port], true);</div><div class='add'>+	if (rc &lt; 0) {</div><div class='add'>+		dev_err(dev, "Failed to write MAC config: %d\n", rc);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Reconfigure the PLLs for the RGMII interfaces (required 125 MHz at</div><div class='add'>+	 * gigabit, 25 MHz at 100 Mbps and 2.5 MHz at 10 Mbps). For MII and</div><div class='add'>+	 * RMII no change of the clock setup is required. Actually, changing</div><div class='add'>+	 * the clock setup does interrupt the clock signal for a certain time</div><div class='add'>+	 * which causes trouble for all PHYs relying on this signal.</div><div class='add'>+	 */</div><div class='add'>+	if (!phy_interface_mode_is_rgmii(priv-&gt;phy_mode[port]))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return sja1105_clocking_setup_port(priv, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct phylink_pcs *</div><div class='add'>+sja1105_mac_select_pcs(struct phylink_config *config, phy_interface_t iface)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct sja1105_private *priv = dp-&gt;ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return priv-&gt;pcs[dp-&gt;index];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sja1105_mac_config(struct phylink_config *config,</div><div class='add'>+			       unsigned int mode,</div><div class='add'>+			       const struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sja1105_mac_link_down(struct phylink_config *config,</div><div class='add'>+				  unsigned int mode,</div><div class='add'>+				  phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+</div><div class='add'>+	sja1105_inhibit_tx(dp-&gt;ds-&gt;priv, BIT(dp-&gt;index), true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sja1105_mac_link_up(struct phylink_config *config,</div><div class='add'>+				struct phy_device *phydev,</div><div class='add'>+				unsigned int mode,</div><div class='add'>+				phy_interface_t interface,</div><div class='add'>+				int speed, int duplex,</div><div class='add'>+				bool tx_pause, bool rx_pause)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct sja1105_private *priv = dp-&gt;ds-&gt;priv;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+</div><div class='add'>+	if (!sja1105_set_port_speed(priv, port, speed))</div><div class='add'>+		sja1105_set_port_config(priv, port);</div><div class='add'>+</div><div class='add'>+	sja1105_inhibit_tx(priv, BIT(port), false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sja1105_phylink_get_caps(struct dsa_switch *ds, int port,</div><div class='add'>+				     struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	struct sja1105_xmii_params_entry *mii;</div><div class='add'>+	phy_interface_t phy_mode;</div><div class='add'>+</div><div class='add'>+	phy_mode = priv-&gt;phy_mode[port];</div><div class='add'>+	if (phy_mode == PHY_INTERFACE_MODE_SGMII ||</div><div class='add'>+	    phy_mode == PHY_INTERFACE_MODE_2500BASEX) {</div><div class='add'>+		/* Changing the PHY mode on SERDES ports is possible and makes</div><div class='add'>+		 * sense, because that is done through the XPCS. We allow</div><div class='add'>+		 * changes between SGMII and 2500base-X.</div><div class='add'>+		 */</div><div class='add'>+		if (priv-&gt;info-&gt;supports_sgmii[port])</div><div class='add'>+			__set_bit(PHY_INTERFACE_MODE_SGMII,</div><div class='add'>+				  config-&gt;supported_interfaces);</div><div class='add'>+</div><div class='add'>+		if (priv-&gt;info-&gt;supports_2500basex[port])</div><div class='add'>+			__set_bit(PHY_INTERFACE_MODE_2500BASEX,</div><div class='add'>+				  config-&gt;supported_interfaces);</div><div class='add'>+	} else {</div><div class='add'>+		/* The SJA1105 MAC programming model is through the static</div><div class='add'>+		 * config (the xMII Mode table cannot be dynamically</div><div class='add'>+		 * reconfigured), and we have to program that early.</div><div class='add'>+		 */</div><div class='add'>+		__set_bit(phy_mode, config-&gt;supported_interfaces);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* The MAC does not support pause frames, and also doesn't</div><div class='add'>+	 * support half-duplex traffic modes.</div><div class='add'>+	 */</div><div class='add'>+	config-&gt;mac_capabilities = MAC_10FD | MAC_100FD;</div><div class='add'>+</div><div class='add'>+	mii = priv-&gt;static_config.tables[BLK_IDX_XMII_PARAMS].entries;</div><div class='add'>+	if (mii-&gt;xmii_mode[port] == XMII_MODE_RGMII ||</div><div class='add'>+	    mii-&gt;xmii_mode[port] == XMII_MODE_SGMII)</div><div class='add'>+		config-&gt;mac_capabilities |= MAC_1000FD;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;info-&gt;supports_2500basex[port])</div><div class='add'>+		config-&gt;mac_capabilities |= MAC_2500FD;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+sja1105_find_static_fdb_entry(struct sja1105_private *priv, int port,</div><div class='add'>+			      const struct sja1105_l2_lookup_entry *requested)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_l2_lookup_entry *l2_lookup;</div><div class='add'>+	struct sja1105_table *table;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_L2_LOOKUP];</div><div class='add'>+	l2_lookup = table-&gt;entries;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; table-&gt;entry_count; i++)</div><div class='add'>+		if (l2_lookup[i].macaddr == requested-&gt;macaddr &amp;&amp;</div><div class='add'>+		    l2_lookup[i].vlanid == requested-&gt;vlanid &amp;&amp;</div><div class='add'>+		    l2_lookup[i].destports &amp; BIT(port))</div><div class='add'>+			return i;</div><div class='add'>+</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* We want FDB entries added statically through the bridge command to persist</div><div class='add'>+ * across switch resets, which are a common thing during normal SJA1105</div><div class='add'>+ * operation. So we have to back them up in the static configuration tables</div><div class='add'>+ * and hence apply them on next static config upload... yay!</div><div class='add'>+ */</div><div class='add'>+static int</div><div class='add'>+sja1105_static_fdb_change(struct sja1105_private *priv, int port,</div><div class='add'>+			  const struct sja1105_l2_lookup_entry *requested,</div><div class='add'>+			  bool keep)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_l2_lookup_entry *l2_lookup;</div><div class='add'>+	struct sja1105_table *table;</div><div class='add'>+	int rc, match;</div><div class='add'>+</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_L2_LOOKUP];</div><div class='add'>+</div><div class='add'>+	match = sja1105_find_static_fdb_entry(priv, port, requested);</div><div class='add'>+	if (match &lt; 0) {</div><div class='add'>+		/* Can't delete a missing entry. */</div><div class='add'>+		if (!keep)</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		/* No match =&gt; new entry */</div><div class='add'>+		rc = sja1105_table_resize(table, table-&gt;entry_count + 1);</div><div class='add'>+		if (rc)</div><div class='add'>+			return rc;</div><div class='add'>+</div><div class='add'>+		match = table-&gt;entry_count - 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Assign pointer after the resize (it may be new memory) */</div><div class='add'>+	l2_lookup = table-&gt;entries;</div><div class='add'>+</div><div class='add'>+	/* We have a match.</div><div class='add'>+	 * If the job was to add this FDB entry, it's already done (mostly</div><div class='add'>+	 * anyway, since the port forwarding mask may have changed, case in</div><div class='add'>+	 * which we update it).</div><div class='add'>+	 * Otherwise we have to delete it.</div><div class='add'>+	 */</div><div class='add'>+	if (keep) {</div><div class='add'>+		l2_lookup[match] = *requested;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* To remove, the strategy is to overwrite the element with</div><div class='add'>+	 * the last one, and then reduce the array size by 1</div><div class='add'>+	 */</div><div class='add'>+	l2_lookup[match] = l2_lookup[table-&gt;entry_count - 1];</div><div class='add'>+	return sja1105_table_resize(table, table-&gt;entry_count - 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* First-generation switches have a 4-way set associative TCAM that</div><div class='add'>+ * holds the FDB entries. An FDB index spans from 0 to 1023 and is comprised of</div><div class='add'>+ * a "bin" (grouping of 4 entries) and a "way" (an entry within a bin).</div><div class='add'>+ * For the placement of a newly learnt FDB entry, the switch selects the bin</div><div class='add'>+ * based on a hash function, and the way within that bin incrementally.</div><div class='add'>+ */</div><div class='add'>+static int sja1105et_fdb_index(int bin, int way)</div><div class='add'>+{</div><div class='add'>+	return bin * SJA1105ET_FDB_BIN_SIZE + way;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105et_is_fdb_entry_in_bin(struct sja1105_private *priv, int bin,</div><div class='add'>+					 const u8 *addr, u16 vid,</div><div class='add'>+					 struct sja1105_l2_lookup_entry *match,</div><div class='add'>+					 int *last_unused)</div><div class='add'>+{</div><div class='add'>+	int way;</div><div class='add'>+</div><div class='add'>+	for (way = 0; way &lt; SJA1105ET_FDB_BIN_SIZE; way++) {</div><div class='add'>+		struct sja1105_l2_lookup_entry l2_lookup = {0};</div><div class='add'>+		int index = sja1105et_fdb_index(bin, way);</div><div class='add'>+</div><div class='add'>+		/* Skip unused entries, optionally marking them</div><div class='add'>+		 * into the return value</div><div class='add'>+		 */</div><div class='add'>+		if (sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,</div><div class='add'>+						index, &amp;l2_lookup)) {</div><div class='add'>+			if (last_unused)</div><div class='add'>+				*last_unused = way;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (l2_lookup.macaddr == ether_addr_to_u64(addr) &amp;&amp;</div><div class='add'>+		    l2_lookup.vlanid == vid) {</div><div class='add'>+			if (match)</div><div class='add'>+				*match = l2_lookup;</div><div class='add'>+			return way;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	/* Return an invalid entry index if not found */</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int sja1105et_fdb_add(struct dsa_switch *ds, int port,</div><div class='add'>+		      const unsigned char *addr, u16 vid)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_l2_lookup_entry l2_lookup = {0}, tmp;</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	struct device *dev = ds-&gt;dev;</div><div class='add'>+	int last_unused = -1;</div><div class='add'>+	int start, end, i;</div><div class='add'>+	int bin, way, rc;</div><div class='add'>+</div><div class='add'>+	bin = sja1105et_fdb_hash(priv, addr, vid);</div><div class='add'>+</div><div class='add'>+	way = sja1105et_is_fdb_entry_in_bin(priv, bin, addr, vid,</div><div class='add'>+					    &amp;l2_lookup, &amp;last_unused);</div><div class='add'>+	if (way &gt;= 0) {</div><div class='add'>+		/* We have an FDB entry. Is our port in the destination</div><div class='add'>+		 * mask? If yes, we need to do nothing. If not, we need</div><div class='add'>+		 * to rewrite the entry by adding this port to it.</div><div class='add'>+		 */</div><div class='add'>+		if ((l2_lookup.destports &amp; BIT(port)) &amp;&amp; l2_lookup.lockeds)</div><div class='add'>+			return 0;</div><div class='add'>+		l2_lookup.destports |= BIT(port);</div><div class='add'>+	} else {</div><div class='add'>+		int index = sja1105et_fdb_index(bin, way);</div><div class='add'>+</div><div class='add'>+		/* We don't have an FDB entry. We construct a new one and</div><div class='add'>+		 * try to find a place for it within the FDB table.</div><div class='add'>+		 */</div><div class='add'>+		l2_lookup.macaddr = ether_addr_to_u64(addr);</div><div class='add'>+		l2_lookup.destports = BIT(port);</div><div class='add'>+		l2_lookup.vlanid = vid;</div><div class='add'>+</div><div class='add'>+		if (last_unused &gt;= 0) {</div><div class='add'>+			way = last_unused;</div><div class='add'>+		} else {</div><div class='add'>+			/* Bin is full, need to evict somebody.</div><div class='add'>+			 * Choose victim at random. If you get these messages</div><div class='add'>+			 * often, you may need to consider changing the</div><div class='add'>+			 * distribution function:</div><div class='add'>+			 * static_config[BLK_IDX_L2_LOOKUP_PARAMS].entries-&gt;poly</div><div class='add'>+			 */</div><div class='add'>+			get_random_bytes(&amp;way, sizeof(u8));</div><div class='add'>+			way %= SJA1105ET_FDB_BIN_SIZE;</div><div class='add'>+			dev_warn(dev, "Warning, FDB bin %d full while adding entry for %pM. Evicting entry %u.\n",</div><div class='add'>+				 bin, addr, way);</div><div class='add'>+			/* Evict entry */</div><div class='add'>+			sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,</div><div class='add'>+						     index, NULL, false);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	l2_lookup.lockeds = true;</div><div class='add'>+	l2_lookup.index = sja1105et_fdb_index(bin, way);</div><div class='add'>+</div><div class='add'>+	rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,</div><div class='add'>+					  l2_lookup.index, &amp;l2_lookup,</div><div class='add'>+					  true);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	/* Invalidate a dynamically learned entry if that exists */</div><div class='add'>+	start = sja1105et_fdb_index(bin, 0);</div><div class='add'>+	end = sja1105et_fdb_index(bin, way);</div><div class='add'>+</div><div class='add'>+	for (i = start; i &lt; end; i++) {</div><div class='add'>+		rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,</div><div class='add'>+						 i, &amp;tmp);</div><div class='add'>+		if (rc == -ENOENT)</div><div class='add'>+			continue;</div><div class='add'>+		if (rc)</div><div class='add'>+			return rc;</div><div class='add'>+</div><div class='add'>+		if (tmp.macaddr != ether_addr_to_u64(addr) || tmp.vlanid != vid)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,</div><div class='add'>+						  i, NULL, false);</div><div class='add'>+		if (rc)</div><div class='add'>+			return rc;</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return sja1105_static_fdb_change(priv, port, &amp;l2_lookup, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int sja1105et_fdb_del(struct dsa_switch *ds, int port,</div><div class='add'>+		      const unsigned char *addr, u16 vid)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_l2_lookup_entry l2_lookup = {0};</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	int index, bin, way, rc;</div><div class='add'>+	bool keep;</div><div class='add'>+</div><div class='add'>+	bin = sja1105et_fdb_hash(priv, addr, vid);</div><div class='add'>+	way = sja1105et_is_fdb_entry_in_bin(priv, bin, addr, vid,</div><div class='add'>+					    &amp;l2_lookup, NULL);</div><div class='add'>+	if (way &lt; 0)</div><div class='add'>+		return 0;</div><div class='add'>+	index = sja1105et_fdb_index(bin, way);</div><div class='add'>+</div><div class='add'>+	/* We have an FDB entry. Is our port in the destination mask? If yes,</div><div class='add'>+	 * we need to remove it. If the resulting port mask becomes empty, we</div><div class='add'>+	 * need to completely evict the FDB entry.</div><div class='add'>+	 * Otherwise we just write it back.</div><div class='add'>+	 */</div><div class='add'>+	l2_lookup.destports &amp;= ~BIT(port);</div><div class='add'>+</div><div class='add'>+	if (l2_lookup.destports)</div><div class='add'>+		keep = true;</div><div class='add'>+	else</div><div class='add'>+		keep = false;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,</div><div class='add'>+					  index, &amp;l2_lookup, keep);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	return sja1105_static_fdb_change(priv, port, &amp;l2_lookup, keep);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int sja1105pqrs_fdb_add(struct dsa_switch *ds, int port,</div><div class='add'>+			const unsigned char *addr, u16 vid)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_l2_lookup_entry l2_lookup = {0}, tmp;</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	int rc, i;</div><div class='add'>+</div><div class='add'>+	/* Search for an existing entry in the FDB table */</div><div class='add'>+	l2_lookup.macaddr = ether_addr_to_u64(addr);</div><div class='add'>+	l2_lookup.vlanid = vid;</div><div class='add'>+	l2_lookup.mask_macaddr = GENMASK_ULL(ETH_ALEN * 8 - 1, 0);</div><div class='add'>+	l2_lookup.mask_vlanid = VLAN_VID_MASK;</div><div class='add'>+	l2_lookup.destports = BIT(port);</div><div class='add'>+</div><div class='add'>+	tmp = l2_lookup;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,</div><div class='add'>+					 SJA1105_SEARCH, &amp;tmp);</div><div class='add'>+	if (rc == 0 &amp;&amp; tmp.index != SJA1105_MAX_L2_LOOKUP_COUNT - 1) {</div><div class='add'>+		/* Found a static entry and this port is already in the entry's</div><div class='add'>+		 * port mask =&gt; job done</div><div class='add'>+		 */</div><div class='add'>+		if ((tmp.destports &amp; BIT(port)) &amp;&amp; tmp.lockeds)</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		l2_lookup = tmp;</div><div class='add'>+</div><div class='add'>+		/* l2_lookup.index is populated by the switch in case it</div><div class='add'>+		 * found something.</div><div class='add'>+		 */</div><div class='add'>+		l2_lookup.destports |= BIT(port);</div><div class='add'>+		goto skip_finding_an_index;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Not found, so try to find an unused spot in the FDB.</div><div class='add'>+	 * This is slightly inefficient because the strategy is knock-knock at</div><div class='add'>+	 * every possible position from 0 to 1023.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; SJA1105_MAX_L2_LOOKUP_COUNT; i++) {</div><div class='add'>+		rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,</div><div class='add'>+						 i, NULL);</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+	if (i == SJA1105_MAX_L2_LOOKUP_COUNT) {</div><div class='add'>+		dev_err(ds-&gt;dev, "FDB is full, cannot add entry.\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	l2_lookup.index = i;</div><div class='add'>+</div><div class='add'>+skip_finding_an_index:</div><div class='add'>+	l2_lookup.lockeds = true;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,</div><div class='add'>+					  l2_lookup.index, &amp;l2_lookup,</div><div class='add'>+					  true);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	/* The switch learns dynamic entries and looks up the FDB left to</div><div class='add'>+	 * right. It is possible that our addition was concurrent with the</div><div class='add'>+	 * dynamic learning of the same address, so now that the static entry</div><div class='add'>+	 * has been installed, we are certain that address learning for this</div><div class='add'>+	 * particular address has been turned off, so the dynamic entry either</div><div class='add'>+	 * is in the FDB at an index smaller than the static one, or isn't (it</div><div class='add'>+	 * can also be at a larger index, but in that case it is inactive</div><div class='add'>+	 * because the static FDB entry will match first, and the dynamic one</div><div class='add'>+	 * will eventually age out). Search for a dynamically learned address</div><div class='add'>+	 * prior to our static one and invalidate it.</div><div class='add'>+	 */</div><div class='add'>+	tmp = l2_lookup;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,</div><div class='add'>+					 SJA1105_SEARCH, &amp;tmp);</div><div class='add'>+	if (rc &lt; 0) {</div><div class='add'>+		dev_err(ds-&gt;dev,</div><div class='add'>+			"port %d failed to read back entry for %pM vid %d: %pe\n",</div><div class='add'>+			port, addr, vid, ERR_PTR(rc));</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (tmp.index &lt; l2_lookup.index) {</div><div class='add'>+		rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,</div><div class='add'>+						  tmp.index, NULL, false);</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return sja1105_static_fdb_change(priv, port, &amp;l2_lookup, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int sja1105pqrs_fdb_del(struct dsa_switch *ds, int port,</div><div class='add'>+			const unsigned char *addr, u16 vid)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_l2_lookup_entry l2_lookup = {0};</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	bool keep;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	l2_lookup.macaddr = ether_addr_to_u64(addr);</div><div class='add'>+	l2_lookup.vlanid = vid;</div><div class='add'>+	l2_lookup.mask_macaddr = GENMASK_ULL(ETH_ALEN * 8 - 1, 0);</div><div class='add'>+	l2_lookup.mask_vlanid = VLAN_VID_MASK;</div><div class='add'>+	l2_lookup.destports = BIT(port);</div><div class='add'>+</div><div class='add'>+	rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,</div><div class='add'>+					 SJA1105_SEARCH, &amp;l2_lookup);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	l2_lookup.destports &amp;= ~BIT(port);</div><div class='add'>+</div><div class='add'>+	/* Decide whether we remove just this port from the FDB entry,</div><div class='add'>+	 * or if we remove it completely.</div><div class='add'>+	 */</div><div class='add'>+	if (l2_lookup.destports)</div><div class='add'>+		keep = true;</div><div class='add'>+	else</div><div class='add'>+		keep = false;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,</div><div class='add'>+					  l2_lookup.index, &amp;l2_lookup, keep);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	return sja1105_static_fdb_change(priv, port, &amp;l2_lookup, keep);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_fdb_add(struct dsa_switch *ds, int port,</div><div class='add'>+			   const unsigned char *addr, u16 vid,</div><div class='add'>+			   struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (!vid) {</div><div class='add'>+		switch (db.type) {</div><div class='add'>+		case DSA_DB_PORT:</div><div class='add'>+			vid = dsa_tag_8021q_standalone_vid(db.dp);</div><div class='add'>+			break;</div><div class='add'>+		case DSA_DB_BRIDGE:</div><div class='add'>+			vid = dsa_tag_8021q_bridge_vid(db.bridge.num);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;fdb_lock);</div><div class='add'>+	rc = priv-&gt;info-&gt;fdb_add_cmd(ds, port, addr, vid);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;fdb_lock);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __sja1105_fdb_del(struct dsa_switch *ds, int port,</div><div class='add'>+			     const unsigned char *addr, u16 vid,</div><div class='add'>+			     struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (!vid) {</div><div class='add'>+		switch (db.type) {</div><div class='add'>+		case DSA_DB_PORT:</div><div class='add'>+			vid = dsa_tag_8021q_standalone_vid(db.dp);</div><div class='add'>+			break;</div><div class='add'>+		case DSA_DB_BRIDGE:</div><div class='add'>+			vid = dsa_tag_8021q_bridge_vid(db.bridge.num);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return priv-&gt;info-&gt;fdb_del_cmd(ds, port, addr, vid);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_fdb_del(struct dsa_switch *ds, int port,</div><div class='add'>+			   const unsigned char *addr, u16 vid,</div><div class='add'>+			   struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;fdb_lock);</div><div class='add'>+	rc = __sja1105_fdb_del(ds, port, addr, vid, db);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;fdb_lock);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_fdb_dump(struct dsa_switch *ds, int port,</div><div class='add'>+			    dsa_fdb_dump_cb_t *cb, void *data)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	struct device *dev = ds-&gt;dev;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; SJA1105_MAX_L2_LOOKUP_COUNT; i++) {</div><div class='add'>+		struct sja1105_l2_lookup_entry l2_lookup = {0};</div><div class='add'>+		u8 macaddr[ETH_ALEN];</div><div class='add'>+		int rc;</div><div class='add'>+</div><div class='add'>+		rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,</div><div class='add'>+						 i, &amp;l2_lookup);</div><div class='add'>+		/* No fdb entry at i, not an issue */</div><div class='add'>+		if (rc == -ENOENT)</div><div class='add'>+			continue;</div><div class='add'>+		if (rc) {</div><div class='add'>+			dev_err(dev, "Failed to dump FDB: %d\n", rc);</div><div class='add'>+			return rc;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* FDB dump callback is per port. This means we have to</div><div class='add'>+		 * disregard a valid entry if it's not for this port, even if</div><div class='add'>+		 * only to revisit it later. This is inefficient because the</div><div class='add'>+		 * 1024-sized FDB table needs to be traversed 4 times through</div><div class='add'>+		 * SPI during a 'bridge fdb show' command.</div><div class='add'>+		 */</div><div class='add'>+		if (!(l2_lookup.destports &amp; BIT(port)))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		u64_to_ether_addr(l2_lookup.macaddr, macaddr);</div><div class='add'>+</div><div class='add'>+		/* Hardware FDB is shared for fdb and mdb, "bridge fdb show"</div><div class='add'>+		 * only wants to see unicast</div><div class='add'>+		 */</div><div class='add'>+		if (is_multicast_ether_addr(macaddr))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* We need to hide the dsa_8021q VLANs from the user. */</div><div class='add'>+		if (vid_is_dsa_8021q(l2_lookup.vlanid))</div><div class='add'>+			l2_lookup.vlanid = 0;</div><div class='add'>+		rc = cb(macaddr, l2_lookup.vlanid, l2_lookup.lockeds, data);</div><div class='add'>+		if (rc)</div><div class='add'>+			return rc;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sja1105_fast_age(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(ds, port);</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	struct dsa_db db = {</div><div class='add'>+		.type = DSA_DB_BRIDGE,</div><div class='add'>+		.bridge = {</div><div class='add'>+			.dev = dsa_port_bridge_dev_get(dp),</div><div class='add'>+			.num = dsa_port_bridge_num_get(dp),</div><div class='add'>+		},</div><div class='add'>+	};</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;fdb_lock);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; SJA1105_MAX_L2_LOOKUP_COUNT; i++) {</div><div class='add'>+		struct sja1105_l2_lookup_entry l2_lookup = {0};</div><div class='add'>+		u8 macaddr[ETH_ALEN];</div><div class='add'>+		int rc;</div><div class='add'>+</div><div class='add'>+		rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,</div><div class='add'>+						 i, &amp;l2_lookup);</div><div class='add'>+		/* No fdb entry at i, not an issue */</div><div class='add'>+		if (rc == -ENOENT)</div><div class='add'>+			continue;</div><div class='add'>+		if (rc) {</div><div class='add'>+			dev_err(ds-&gt;dev, "Failed to read FDB: %pe\n",</div><div class='add'>+				ERR_PTR(rc));</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!(l2_lookup.destports &amp; BIT(port)))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* Don't delete static FDB entries */</div><div class='add'>+		if (l2_lookup.lockeds)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		u64_to_ether_addr(l2_lookup.macaddr, macaddr);</div><div class='add'>+</div><div class='add'>+		rc = __sja1105_fdb_del(ds, port, macaddr, l2_lookup.vlanid, db);</div><div class='add'>+		if (rc) {</div><div class='add'>+			dev_err(ds-&gt;dev,</div><div class='add'>+				"Failed to delete FDB entry %pM vid %lld: %pe\n",</div><div class='add'>+				macaddr, l2_lookup.vlanid, ERR_PTR(rc));</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;fdb_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_mdb_add(struct dsa_switch *ds, int port,</div><div class='add'>+			   const struct switchdev_obj_port_mdb *mdb,</div><div class='add'>+			   struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	return sja1105_fdb_add(ds, port, mdb-&gt;addr, mdb-&gt;vid, db);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_mdb_del(struct dsa_switch *ds, int port,</div><div class='add'>+			   const struct switchdev_obj_port_mdb *mdb,</div><div class='add'>+			   struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	return sja1105_fdb_del(ds, port, mdb-&gt;addr, mdb-&gt;vid, db);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Common function for unicast and broadcast flood configuration.</div><div class='add'>+ * Flooding is configured between each {ingress, egress} port pair, and since</div><div class='add'>+ * the bridge's semantics are those of "egress flooding", it means we must</div><div class='add'>+ * enable flooding towards this port from all ingress ports that are in the</div><div class='add'>+ * same forwarding domain.</div><div class='add'>+ */</div><div class='add'>+static int sja1105_manage_flood_domains(struct sja1105_private *priv)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_l2_forwarding_entry *l2_fwd;</div><div class='add'>+	struct dsa_switch *ds = priv-&gt;ds;</div><div class='add'>+	int from, to, rc;</div><div class='add'>+</div><div class='add'>+	l2_fwd = priv-&gt;static_config.tables[BLK_IDX_L2_FORWARDING].entries;</div><div class='add'>+</div><div class='add'>+	for (from = 0; from &lt; ds-&gt;num_ports; from++) {</div><div class='add'>+		u64 fl_domain = 0, bc_domain = 0;</div><div class='add'>+</div><div class='add'>+		for (to = 0; to &lt; priv-&gt;ds-&gt;num_ports; to++) {</div><div class='add'>+			if (!sja1105_can_forward(l2_fwd, from, to))</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			if (priv-&gt;ucast_egress_floods &amp; BIT(to))</div><div class='add'>+				fl_domain |= BIT(to);</div><div class='add'>+			if (priv-&gt;bcast_egress_floods &amp; BIT(to))</div><div class='add'>+				bc_domain |= BIT(to);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Nothing changed, nothing to do */</div><div class='add'>+		if (l2_fwd[from].fl_domain == fl_domain &amp;&amp;</div><div class='add'>+		    l2_fwd[from].bc_domain == bc_domain)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		l2_fwd[from].fl_domain = fl_domain;</div><div class='add'>+		l2_fwd[from].bc_domain = bc_domain;</div><div class='add'>+</div><div class='add'>+		rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_FORWARDING,</div><div class='add'>+						  from, &amp;l2_fwd[from], true);</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_bridge_member(struct dsa_switch *ds, int port,</div><div class='add'>+				 struct dsa_bridge bridge, bool member)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_l2_forwarding_entry *l2_fwd;</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	int i, rc;</div><div class='add'>+</div><div class='add'>+	l2_fwd = priv-&gt;static_config.tables[BLK_IDX_L2_FORWARDING].entries;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ds-&gt;num_ports; i++) {</div><div class='add'>+		/* Add this port to the forwarding matrix of the</div><div class='add'>+		 * other ports in the same bridge, and viceversa.</div><div class='add'>+		 */</div><div class='add'>+		if (!dsa_is_user_port(ds, i))</div><div class='add'>+			continue;</div><div class='add'>+		/* For the ports already under the bridge, only one thing needs</div><div class='add'>+		 * to be done, and that is to add this port to their</div><div class='add'>+		 * reachability domain. So we can perform the SPI write for</div><div class='add'>+		 * them immediately. However, for this port itself (the one</div><div class='add'>+		 * that is new to the bridge), we need to add all other ports</div><div class='add'>+		 * to its reachability domain. So we do that incrementally in</div><div class='add'>+		 * this loop, and perform the SPI write only at the end, once</div><div class='add'>+		 * the domain contains all other bridge ports.</div><div class='add'>+		 */</div><div class='add'>+		if (i == port)</div><div class='add'>+			continue;</div><div class='add'>+		if (!dsa_port_offloads_bridge(dsa_to_port(ds, i), &amp;bridge))</div><div class='add'>+			continue;</div><div class='add'>+		sja1105_port_allow_traffic(l2_fwd, i, port, member);</div><div class='add'>+		sja1105_port_allow_traffic(l2_fwd, port, i, member);</div><div class='add'>+</div><div class='add'>+		rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_FORWARDING,</div><div class='add'>+						  i, &amp;l2_fwd[i], true);</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_FORWARDING,</div><div class='add'>+					  port, &amp;l2_fwd[port], true);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_commit_pvid(ds, port);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	return sja1105_manage_flood_domains(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sja1105_bridge_stp_state_set(struct dsa_switch *ds, int port,</div><div class='add'>+					 u8 state)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(ds, port);</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	struct sja1105_mac_config_entry *mac;</div><div class='add'>+</div><div class='add'>+	mac = priv-&gt;static_config.tables[BLK_IDX_MAC_CONFIG].entries;</div><div class='add'>+</div><div class='add'>+	switch (state) {</div><div class='add'>+	case BR_STATE_DISABLED:</div><div class='add'>+	case BR_STATE_BLOCKING:</div><div class='add'>+	case BR_STATE_LISTENING:</div><div class='add'>+		/* From UM10944 description of DRPDTAG (why put this there?):</div><div class='add'>+		 * "Management traffic flows to the port regardless of the state</div><div class='add'>+		 * of the INGRESS flag". So BPDUs are still be allowed to pass.</div><div class='add'>+		 * At the moment no difference between DISABLED and BLOCKING.</div><div class='add'>+		 */</div><div class='add'>+		mac[port].ingress   = false;</div><div class='add'>+		mac[port].egress    = false;</div><div class='add'>+		mac[port].dyn_learn = false;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_LEARNING:</div><div class='add'>+		mac[port].ingress   = true;</div><div class='add'>+		mac[port].egress    = false;</div><div class='add'>+		mac[port].dyn_learn = dp-&gt;learning;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_FORWARDING:</div><div class='add'>+		mac[port].ingress   = true;</div><div class='add'>+		mac[port].egress    = true;</div><div class='add'>+		mac[port].dyn_learn = dp-&gt;learning;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(ds-&gt;dev, "invalid STP state: %d\n", state);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, port,</div><div class='add'>+				     &amp;mac[port], true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_bridge_join(struct dsa_switch *ds, int port,</div><div class='add'>+			       struct dsa_bridge bridge,</div><div class='add'>+			       bool *tx_fwd_offload,</div><div class='add'>+			       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_bridge_member(ds, port, bridge, true);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	rc = dsa_tag_8021q_bridge_join(ds, port, bridge, tx_fwd_offload,</div><div class='add'>+				       extack);</div><div class='add'>+	if (rc) {</div><div class='add'>+		sja1105_bridge_member(ds, port, bridge, false);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sja1105_bridge_leave(struct dsa_switch *ds, int port,</div><div class='add'>+				 struct dsa_bridge bridge)</div><div class='add'>+{</div><div class='add'>+	dsa_tag_8021q_bridge_leave(ds, port, bridge);</div><div class='add'>+	sja1105_bridge_member(ds, port, bridge, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Port 0 (the uC port) does not have CBS shapers */</div><div class='add'>+#define SJA1110_FIXED_CBS(port, prio) ((((port) - 1) * SJA1105_NUM_TC) + (prio))</div><div class='add'>+</div><div class='add'>+static int sja1105_find_cbs_shaper(struct sja1105_private *priv,</div><div class='add'>+				   int port, int prio)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;info-&gt;fixed_cbs_mapping) {</div><div class='add'>+		i = SJA1110_FIXED_CBS(port, prio);</div><div class='add'>+		if (i &gt;= 0 &amp;&amp; i &lt; priv-&gt;info-&gt;num_cbs_shapers)</div><div class='add'>+			return i;</div><div class='add'>+</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;info-&gt;num_cbs_shapers; i++)</div><div class='add'>+		if (priv-&gt;cbs[i].port == port &amp;&amp; priv-&gt;cbs[i].prio == prio)</div><div class='add'>+			return i;</div><div class='add'>+</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_find_unused_cbs_shaper(struct sja1105_private *priv)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;info-&gt;fixed_cbs_mapping)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;info-&gt;num_cbs_shapers; i++)</div><div class='add'>+		if (!priv-&gt;cbs[i].idle_slope &amp;&amp; !priv-&gt;cbs[i].send_slope)</div><div class='add'>+			return i;</div><div class='add'>+</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_delete_cbs_shaper(struct sja1105_private *priv, int port,</div><div class='add'>+				     int prio)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;info-&gt;num_cbs_shapers; i++) {</div><div class='add'>+		struct sja1105_cbs_entry *cbs = &amp;priv-&gt;cbs[i];</div><div class='add'>+</div><div class='add'>+		if (cbs-&gt;port == port &amp;&amp; cbs-&gt;prio == prio) {</div><div class='add'>+			memset(cbs, 0, sizeof(*cbs));</div><div class='add'>+			return sja1105_dynamic_config_write(priv, BLK_IDX_CBS,</div><div class='add'>+							    i, cbs, true);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_setup_tc_cbs(struct dsa_switch *ds, int port,</div><div class='add'>+				struct tc_cbs_qopt_offload *offload)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	struct sja1105_cbs_entry *cbs;</div><div class='add'>+	s64 port_transmit_rate_kbps;</div><div class='add'>+	int index;</div><div class='add'>+</div><div class='add'>+	if (!offload-&gt;enable)</div><div class='add'>+		return sja1105_delete_cbs_shaper(priv, port, offload-&gt;queue);</div><div class='add'>+</div><div class='add'>+	/* The user may be replacing an existing shaper */</div><div class='add'>+	index = sja1105_find_cbs_shaper(priv, port, offload-&gt;queue);</div><div class='add'>+	if (index &lt; 0) {</div><div class='add'>+		/* That isn't the case - see if we can allocate a new one */</div><div class='add'>+		index = sja1105_find_unused_cbs_shaper(priv);</div><div class='add'>+		if (index &lt; 0)</div><div class='add'>+			return -ENOSPC;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cbs = &amp;priv-&gt;cbs[index];</div><div class='add'>+	cbs-&gt;port = port;</div><div class='add'>+	cbs-&gt;prio = offload-&gt;queue;</div><div class='add'>+	/* locredit and sendslope are negative by definition. In hardware,</div><div class='add'>+	 * positive values must be provided, and the negative sign is implicit.</div><div class='add'>+	 */</div><div class='add'>+	cbs-&gt;credit_hi = offload-&gt;hicredit;</div><div class='add'>+	cbs-&gt;credit_lo = abs(offload-&gt;locredit);</div><div class='add'>+	/* User space is in kbits/sec, while the hardware in bytes/sec times</div><div class='add'>+	 * link speed. Since the given offload-&gt;sendslope is good only for the</div><div class='add'>+	 * current link speed anyway, and user space is likely to reprogram it</div><div class='add'>+	 * when that changes, don't even bother to track the port's link speed,</div><div class='add'>+	 * but deduce the port transmit rate from idleslope - sendslope.</div><div class='add'>+	 */</div><div class='add'>+	port_transmit_rate_kbps = offload-&gt;idleslope - offload-&gt;sendslope;</div><div class='add'>+	cbs-&gt;idle_slope = div_s64(offload-&gt;idleslope * BYTES_PER_KBIT,</div><div class='add'>+				  port_transmit_rate_kbps);</div><div class='add'>+	cbs-&gt;send_slope = div_s64(abs(offload-&gt;sendslope * BYTES_PER_KBIT),</div><div class='add'>+				  port_transmit_rate_kbps);</div><div class='add'>+	/* Convert the negative values from 64-bit 2's complement</div><div class='add'>+	 * to 32-bit 2's complement (for the case of 0x80000000 whose</div><div class='add'>+	 * negative is still negative).</div><div class='add'>+	 */</div><div class='add'>+	cbs-&gt;credit_lo &amp;= GENMASK_ULL(31, 0);</div><div class='add'>+	cbs-&gt;send_slope &amp;= GENMASK_ULL(31, 0);</div><div class='add'>+</div><div class='add'>+	return sja1105_dynamic_config_write(priv, BLK_IDX_CBS, index, cbs,</div><div class='add'>+					    true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_reload_cbs(struct sja1105_private *priv)</div><div class='add'>+{</div><div class='add'>+	int rc = 0, i;</div><div class='add'>+</div><div class='add'>+	/* The credit based shapers are only allocated if</div><div class='add'>+	 * CONFIG_NET_SCH_CBS is enabled.</div><div class='add'>+	 */</div><div class='add'>+	if (!priv-&gt;cbs)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;info-&gt;num_cbs_shapers; i++) {</div><div class='add'>+		struct sja1105_cbs_entry *cbs = &amp;priv-&gt;cbs[i];</div><div class='add'>+</div><div class='add'>+		if (!cbs-&gt;idle_slope &amp;&amp; !cbs-&gt;send_slope)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		rc = sja1105_dynamic_config_write(priv, BLK_IDX_CBS, i, cbs,</div><div class='add'>+						  true);</div><div class='add'>+		if (rc)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char * const sja1105_reset_reasons[] = {</div><div class='add'>+	[SJA1105_VLAN_FILTERING] = "VLAN filtering",</div><div class='add'>+	[SJA1105_AGEING_TIME] = "Ageing time",</div><div class='add'>+	[SJA1105_SCHEDULING] = "Time-aware scheduling",</div><div class='add'>+	[SJA1105_BEST_EFFORT_POLICING] = "Best-effort policing",</div><div class='add'>+	[SJA1105_VIRTUAL_LINKS] = "Virtual links",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* For situations where we need to change a setting at runtime that is only</div><div class='add'>+ * available through the static configuration, resetting the switch in order</div><div class='add'>+ * to upload the new static config is unavoidable. Back up the settings we</div><div class='add'>+ * modify at runtime (currently only MAC) and restore them after uploading,</div><div class='add'>+ * such that this operation is relatively seamless.</div><div class='add'>+ */</div><div class='add'>+int sja1105_static_config_reload(struct sja1105_private *priv,</div><div class='add'>+				 enum sja1105_reset_reason reason)</div><div class='add'>+{</div><div class='add'>+	struct ptp_system_timestamp ptp_sts_before;</div><div class='add'>+	struct ptp_system_timestamp ptp_sts_after;</div><div class='add'>+	u16 bmcr[SJA1105_MAX_NUM_PORTS] = {0};</div><div class='add'>+	u64 mac_speed[SJA1105_MAX_NUM_PORTS];</div><div class='add'>+	struct sja1105_mac_config_entry *mac;</div><div class='add'>+	struct dsa_switch *ds = priv-&gt;ds;</div><div class='add'>+	s64 t1, t2, t3, t4;</div><div class='add'>+	s64 t12, t34;</div><div class='add'>+	int rc, i;</div><div class='add'>+	s64 now;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;fdb_lock);</div><div class='add'>+	mutex_lock(&amp;priv-&gt;mgmt_lock);</div><div class='add'>+</div><div class='add'>+	mac = priv-&gt;static_config.tables[BLK_IDX_MAC_CONFIG].entries;</div><div class='add'>+</div><div class='add'>+	/* Back up the dynamic link speed changed by sja1105_set_port_speed()</div><div class='add'>+	 * in order to temporarily restore it to SJA1105_SPEED_AUTO - which the</div><div class='add'>+	 * switch wants to see in the static config in order to allow us to</div><div class='add'>+	 * change it through the dynamic interface later.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; ds-&gt;num_ports; i++) {</div><div class='add'>+		mac_speed[i] = mac[i].speed;</div><div class='add'>+		mac[i].speed = priv-&gt;info-&gt;port_speed[SJA1105_SPEED_AUTO];</div><div class='add'>+</div><div class='add'>+		if (priv-&gt;pcs[i])</div><div class='add'>+			bmcr[i] = mdiobus_c45_read(priv-&gt;mdio_pcs, i,</div><div class='add'>+						   MDIO_MMD_VEND2, MDIO_CTRL1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* No PTP operations can run right now */</div><div class='add'>+	mutex_lock(&amp;priv-&gt;ptp_data.lock);</div><div class='add'>+</div><div class='add'>+	rc = __sja1105_ptp_gettimex(ds, &amp;now, &amp;ptp_sts_before);</div><div class='add'>+	if (rc &lt; 0) {</div><div class='add'>+		mutex_unlock(&amp;priv-&gt;ptp_data.lock);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Reset switch and send updated static configuration */</div><div class='add'>+	rc = sja1105_static_config_upload(priv);</div><div class='add'>+	if (rc &lt; 0) {</div><div class='add'>+		mutex_unlock(&amp;priv-&gt;ptp_data.lock);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = __sja1105_ptp_settime(ds, 0, &amp;ptp_sts_after);</div><div class='add'>+	if (rc &lt; 0) {</div><div class='add'>+		mutex_unlock(&amp;priv-&gt;ptp_data.lock);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	t1 = timespec64_to_ns(&amp;ptp_sts_before.pre_ts);</div><div class='add'>+	t2 = timespec64_to_ns(&amp;ptp_sts_before.post_ts);</div><div class='add'>+	t3 = timespec64_to_ns(&amp;ptp_sts_after.pre_ts);</div><div class='add'>+	t4 = timespec64_to_ns(&amp;ptp_sts_after.post_ts);</div><div class='add'>+	/* Mid point, corresponds to pre-reset PTPCLKVAL */</div><div class='add'>+	t12 = t1 + (t2 - t1) / 2;</div><div class='add'>+	/* Mid point, corresponds to post-reset PTPCLKVAL, aka 0 */</div><div class='add'>+	t34 = t3 + (t4 - t3) / 2;</div><div class='add'>+	/* Advance PTPCLKVAL by the time it took since its readout */</div><div class='add'>+	now += (t34 - t12);</div><div class='add'>+</div><div class='add'>+	__sja1105_ptp_adjtime(ds, now);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;ptp_data.lock);</div><div class='add'>+</div><div class='add'>+	dev_info(priv-&gt;ds-&gt;dev,</div><div class='add'>+		 "Reset switch and programmed static config. Reason: %s\n",</div><div class='add'>+		 sja1105_reset_reasons[reason]);</div><div class='add'>+</div><div class='add'>+	/* Configure the CGU (PLLs) for MII and RMII PHYs.</div><div class='add'>+	 * For these interfaces there is no dynamic configuration</div><div class='add'>+	 * needed, since PLLs have same settings at all speeds.</div><div class='add'>+	 */</div><div class='add'>+	if (priv-&gt;info-&gt;clocking_setup) {</div><div class='add'>+		rc = priv-&gt;info-&gt;clocking_setup(priv);</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ds-&gt;num_ports; i++) {</div><div class='add'>+		struct phylink_pcs *pcs = priv-&gt;pcs[i];</div><div class='add'>+		unsigned int neg_mode;</div><div class='add'>+</div><div class='add'>+		mac[i].speed = mac_speed[i];</div><div class='add'>+		rc = sja1105_set_port_config(priv, i);</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		if (!pcs)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (bmcr[i] &amp; BMCR_ANENABLE)</div><div class='add'>+			neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;</div><div class='add'>+		else</div><div class='add'>+			neg_mode = PHYLINK_PCS_NEG_OUTBAND;</div><div class='add'>+</div><div class='add'>+		rc = pcs-&gt;ops-&gt;pcs_config(pcs, neg_mode, priv-&gt;phy_mode[i],</div><div class='add'>+					  NULL, true);</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		if (neg_mode == PHYLINK_PCS_NEG_OUTBAND) {</div><div class='add'>+			int speed = SPEED_UNKNOWN;</div><div class='add'>+</div><div class='add'>+			if (priv-&gt;phy_mode[i] == PHY_INTERFACE_MODE_2500BASEX)</div><div class='add'>+				speed = SPEED_2500;</div><div class='add'>+			else if (bmcr[i] &amp; BMCR_SPEED1000)</div><div class='add'>+				speed = SPEED_1000;</div><div class='add'>+			else if (bmcr[i] &amp; BMCR_SPEED100)</div><div class='add'>+				speed = SPEED_100;</div><div class='add'>+			else</div><div class='add'>+				speed = SPEED_10;</div><div class='add'>+</div><div class='add'>+			pcs-&gt;ops-&gt;pcs_link_up(pcs, neg_mode, priv-&gt;phy_mode[i],</div><div class='add'>+					      speed, DUPLEX_FULL);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = sja1105_reload_cbs(priv);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;mgmt_lock);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;fdb_lock);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum dsa_tag_protocol</div><div class='add'>+sja1105_get_tag_protocol(struct dsa_switch *ds, int port,</div><div class='add'>+			 enum dsa_tag_protocol mp)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return priv-&gt;info-&gt;tag_proto;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The TPID setting belongs to the General Parameters table,</div><div class='add'>+ * which can only be partially reconfigured at runtime (and not the TPID).</div><div class='add'>+ * So a switch reset is required.</div><div class='add'>+ */</div><div class='add'>+int sja1105_vlan_filtering(struct dsa_switch *ds, int port, bool enabled,</div><div class='add'>+			   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_general_params_entry *general_params;</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	struct sja1105_table *table;</div><div class='add'>+	struct sja1105_rule *rule;</div><div class='add'>+	u16 tpid, tpid2;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(rule, &amp;priv-&gt;flow_block.rules, list) {</div><div class='add'>+		if (rule-&gt;type == SJA1105_RULE_VL) {</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+					   "Cannot change VLAN filtering with active VL rules");</div><div class='add'>+			return -EBUSY;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (enabled) {</div><div class='add'>+		/* Enable VLAN filtering. */</div><div class='add'>+		tpid  = ETH_P_8021Q;</div><div class='add'>+		tpid2 = ETH_P_8021AD;</div><div class='add'>+	} else {</div><div class='add'>+		/* Disable VLAN filtering. */</div><div class='add'>+		tpid  = ETH_P_SJA1105;</div><div class='add'>+		tpid2 = ETH_P_SJA1105;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_GENERAL_PARAMS];</div><div class='add'>+	general_params = table-&gt;entries;</div><div class='add'>+	/* EtherType used to identify inner tagged (C-tag) VLAN traffic */</div><div class='add'>+	general_params-&gt;tpid = tpid;</div><div class='add'>+	/* EtherType used to identify outer tagged (S-tag) VLAN traffic */</div><div class='add'>+	general_params-&gt;tpid2 = tpid2;</div><div class='add'>+</div><div class='add'>+	for (port = 0; port &lt; ds-&gt;num_ports; port++) {</div><div class='add'>+		if (dsa_is_unused_port(ds, port))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		rc = sja1105_commit_pvid(ds, port);</div><div class='add'>+		if (rc)</div><div class='add'>+			return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = sja1105_static_config_reload(priv, SJA1105_VLAN_FILTERING);</div><div class='add'>+	if (rc)</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Failed to change VLAN Ethertype");</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_vlan_add(struct sja1105_private *priv, int port, u16 vid,</div><div class='add'>+			    u16 flags, bool allowed_ingress)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_vlan_lookup_entry *vlan;</div><div class='add'>+	struct sja1105_table *table;</div><div class='add'>+	int match, rc;</div><div class='add'>+</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_VLAN_LOOKUP];</div><div class='add'>+</div><div class='add'>+	match = sja1105_is_vlan_configured(priv, vid);</div><div class='add'>+	if (match &lt; 0) {</div><div class='add'>+		rc = sja1105_table_resize(table, table-&gt;entry_count + 1);</div><div class='add'>+		if (rc)</div><div class='add'>+			return rc;</div><div class='add'>+		match = table-&gt;entry_count - 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Assign pointer after the resize (it's new memory) */</div><div class='add'>+	vlan = table-&gt;entries;</div><div class='add'>+</div><div class='add'>+	vlan[match].type_entry = SJA1110_VLAN_D_TAG;</div><div class='add'>+	vlan[match].vlanid = vid;</div><div class='add'>+	vlan[match].vlan_bc |= BIT(port);</div><div class='add'>+</div><div class='add'>+	if (allowed_ingress)</div><div class='add'>+		vlan[match].vmemb_port |= BIT(port);</div><div class='add'>+	else</div><div class='add'>+		vlan[match].vmemb_port &amp;= ~BIT(port);</div><div class='add'>+</div><div class='add'>+	if (flags &amp; BRIDGE_VLAN_INFO_UNTAGGED)</div><div class='add'>+		vlan[match].tag_port &amp;= ~BIT(port);</div><div class='add'>+	else</div><div class='add'>+		vlan[match].tag_port |= BIT(port);</div><div class='add'>+</div><div class='add'>+	return sja1105_dynamic_config_write(priv, BLK_IDX_VLAN_LOOKUP, vid,</div><div class='add'>+					    &amp;vlan[match], true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_vlan_del(struct sja1105_private *priv, int port, u16 vid)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_vlan_lookup_entry *vlan;</div><div class='add'>+	struct sja1105_table *table;</div><div class='add'>+	bool keep = true;</div><div class='add'>+	int match, rc;</div><div class='add'>+</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_VLAN_LOOKUP];</div><div class='add'>+</div><div class='add'>+	match = sja1105_is_vlan_configured(priv, vid);</div><div class='add'>+	/* Can't delete a missing entry. */</div><div class='add'>+	if (match &lt; 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Assign pointer after the resize (it's new memory) */</div><div class='add'>+	vlan = table-&gt;entries;</div><div class='add'>+</div><div class='add'>+	vlan[match].vlanid = vid;</div><div class='add'>+	vlan[match].vlan_bc &amp;= ~BIT(port);</div><div class='add'>+	vlan[match].vmemb_port &amp;= ~BIT(port);</div><div class='add'>+	/* Also unset tag_port, just so we don't have a confusing bitmap</div><div class='add'>+	 * (no practical purpose).</div><div class='add'>+	 */</div><div class='add'>+	vlan[match].tag_port &amp;= ~BIT(port);</div><div class='add'>+</div><div class='add'>+	/* If there's no port left as member of this VLAN,</div><div class='add'>+	 * it's time for it to go.</div><div class='add'>+	 */</div><div class='add'>+	if (!vlan[match].vmemb_port)</div><div class='add'>+		keep = false;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_dynamic_config_write(priv, BLK_IDX_VLAN_LOOKUP, vid,</div><div class='add'>+					  &amp;vlan[match], keep);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	if (!keep)</div><div class='add'>+		return sja1105_table_delete_entry(table, match);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_bridge_vlan_add(struct dsa_switch *ds, int port,</div><div class='add'>+				   const struct switchdev_obj_port_vlan *vlan,</div><div class='add'>+				   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	u16 flags = vlan-&gt;flags;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	/* Be sure to deny alterations to the configuration done by tag_8021q.</div><div class='add'>+	 */</div><div class='add'>+	if (vid_is_dsa_8021q(vlan-&gt;vid)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Range 3072-4095 reserved for dsa_8021q operation");</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Always install bridge VLANs as egress-tagged on CPU and DSA ports */</div><div class='add'>+	if (dsa_is_cpu_port(ds, port) || dsa_is_dsa_port(ds, port))</div><div class='add'>+		flags = 0;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_vlan_add(priv, port, vlan-&gt;vid, flags, true);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	if (vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_PVID)</div><div class='add'>+		priv-&gt;bridge_pvid[port] = vlan-&gt;vid;</div><div class='add'>+</div><div class='add'>+	return sja1105_commit_pvid(ds, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_bridge_vlan_del(struct dsa_switch *ds, int port,</div><div class='add'>+				   const struct switchdev_obj_port_vlan *vlan)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_vlan_del(priv, port, vlan-&gt;vid);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	/* In case the pvid was deleted, make sure that untagged packets will</div><div class='add'>+	 * be dropped.</div><div class='add'>+	 */</div><div class='add'>+	return sja1105_commit_pvid(ds, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_dsa_8021q_vlan_add(struct dsa_switch *ds, int port, u16 vid,</div><div class='add'>+				      u16 flags)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	bool allowed_ingress = true;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	/* Prevent attackers from trying to inject a DSA tag from</div><div class='add'>+	 * the outside world.</div><div class='add'>+	 */</div><div class='add'>+	if (dsa_is_user_port(ds, port))</div><div class='add'>+		allowed_ingress = false;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_vlan_add(priv, port, vid, flags, allowed_ingress);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	if (flags &amp; BRIDGE_VLAN_INFO_PVID)</div><div class='add'>+		priv-&gt;tag_8021q_pvid[port] = vid;</div><div class='add'>+</div><div class='add'>+	return sja1105_commit_pvid(ds, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_dsa_8021q_vlan_del(struct dsa_switch *ds, int port, u16 vid)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return sja1105_vlan_del(priv, port, vid);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_prechangeupper(struct dsa_switch *ds, int port,</div><div class='add'>+				  struct netdev_notifier_changeupper_info *info)</div><div class='add'>+{</div><div class='add'>+	struct netlink_ext_ack *extack = info-&gt;info.extack;</div><div class='add'>+	struct net_device *upper = info-&gt;upper_dev;</div><div class='add'>+	struct dsa_switch_tree *dst = ds-&gt;dst;</div><div class='add'>+	struct dsa_port *dp;</div><div class='add'>+</div><div class='add'>+	if (is_vlan_dev(upper)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "8021q uppers are not supported");</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (netif_is_bridge_master(upper)) {</div><div class='add'>+		list_for_each_entry(dp, &amp;dst-&gt;ports, list) {</div><div class='add'>+			struct net_device *br = dsa_port_bridge_dev_get(dp);</div><div class='add'>+</div><div class='add'>+			if (br &amp;&amp; br != upper &amp;&amp; br_vlan_enabled(br)) {</div><div class='add'>+				NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+						   "Only one VLAN-aware bridge is supported");</div><div class='add'>+				return -EBUSY;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_mgmt_xmit(struct dsa_switch *ds, int port, int slot,</div><div class='add'>+			     struct sk_buff *skb, bool takets)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_mgmt_entry mgmt_route = {0};</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	struct ethhdr *hdr;</div><div class='add'>+	int timeout = 10;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	hdr = eth_hdr(skb);</div><div class='add'>+</div><div class='add'>+	mgmt_route.macaddr = ether_addr_to_u64(hdr-&gt;h_dest);</div><div class='add'>+	mgmt_route.destports = BIT(port);</div><div class='add'>+	mgmt_route.enfport = 1;</div><div class='add'>+	mgmt_route.tsreg = 0;</div><div class='add'>+	mgmt_route.takets = takets;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_dynamic_config_write(priv, BLK_IDX_MGMT_ROUTE,</div><div class='add'>+					  slot, &amp;mgmt_route, true);</div><div class='add'>+	if (rc &lt; 0) {</div><div class='add'>+		kfree_skb(skb);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Transfer skb to the host port. */</div><div class='add'>+	dsa_enqueue_skb(skb, dsa_to_port(ds, port)-&gt;user);</div><div class='add'>+</div><div class='add'>+	/* Wait until the switch has processed the frame */</div><div class='add'>+	do {</div><div class='add'>+		rc = sja1105_dynamic_config_read(priv, BLK_IDX_MGMT_ROUTE,</div><div class='add'>+						 slot, &amp;mgmt_route);</div><div class='add'>+		if (rc &lt; 0) {</div><div class='add'>+			dev_err_ratelimited(priv-&gt;ds-&gt;dev,</div><div class='add'>+					    "failed to poll for mgmt route\n");</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* UM10944: The ENFPORT flag of the respective entry is</div><div class='add'>+		 * cleared when a match is found. The host can use this</div><div class='add'>+		 * flag as an acknowledgment.</div><div class='add'>+		 */</div><div class='add'>+		cpu_relax();</div><div class='add'>+	} while (mgmt_route.enfport &amp;&amp; --timeout);</div><div class='add'>+</div><div class='add'>+	if (!timeout) {</div><div class='add'>+		/* Clean up the management route so that a follow-up</div><div class='add'>+		 * frame may not match on it by mistake.</div><div class='add'>+		 * This is only hardware supported on P/Q/R/S - on E/T it is</div><div class='add'>+		 * a no-op and we are silently discarding the -EOPNOTSUPP.</div><div class='add'>+		 */</div><div class='add'>+		sja1105_dynamic_config_write(priv, BLK_IDX_MGMT_ROUTE,</div><div class='add'>+					     slot, &amp;mgmt_route, false);</div><div class='add'>+		dev_err_ratelimited(priv-&gt;ds-&gt;dev, "xmit timed out\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define work_to_xmit_work(w) \</div><div class='add'>+		container_of((w), struct sja1105_deferred_xmit_work, work)</div><div class='add'>+</div><div class='add'>+/* Deferred work is unfortunately necessary because setting up the management</div><div class='add'>+ * route cannot be done from atomit context (SPI transfer takes a sleepable</div><div class='add'>+ * lock on the bus)</div><div class='add'>+ */</div><div class='add'>+static void sja1105_port_deferred_xmit(struct kthread_work *work)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_deferred_xmit_work *xmit_work = work_to_xmit_work(work);</div><div class='add'>+	struct sk_buff *clone, *skb = xmit_work-&gt;skb;</div><div class='add'>+	struct dsa_switch *ds = xmit_work-&gt;dp-&gt;ds;</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	int port = xmit_work-&gt;dp-&gt;index;</div><div class='add'>+</div><div class='add'>+	clone = SJA1105_SKB_CB(skb)-&gt;clone;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;mgmt_lock);</div><div class='add'>+</div><div class='add'>+	sja1105_mgmt_xmit(ds, port, 0, skb, !!clone);</div><div class='add'>+</div><div class='add'>+	/* The clone, if there, was made by dsa_skb_tx_timestamp */</div><div class='add'>+	if (clone)</div><div class='add'>+		sja1105_ptp_txtstamp_skb(ds, port, clone);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;mgmt_lock);</div><div class='add'>+</div><div class='add'>+	kfree(xmit_work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_connect_tag_protocol(struct dsa_switch *ds,</div><div class='add'>+					enum dsa_tag_protocol proto)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	struct sja1105_tagger_data *tagger_data;</div><div class='add'>+</div><div class='add'>+	if (proto != priv-&gt;info-&gt;tag_proto)</div><div class='add'>+		return -EPROTONOSUPPORT;</div><div class='add'>+</div><div class='add'>+	tagger_data = sja1105_tagger_data(ds);</div><div class='add'>+	tagger_data-&gt;xmit_work_fn = sja1105_port_deferred_xmit;</div><div class='add'>+	tagger_data-&gt;meta_tstamp_handler = sja1110_process_meta_tstamp;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The MAXAGE setting belongs to the L2 Forwarding Parameters table,</div><div class='add'>+ * which cannot be reconfigured at runtime. So a switch reset is required.</div><div class='add'>+ */</div><div class='add'>+static int sja1105_set_ageing_time(struct dsa_switch *ds,</div><div class='add'>+				   unsigned int ageing_time)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_l2_lookup_params_entry *l2_lookup_params;</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	struct sja1105_table *table;</div><div class='add'>+	unsigned int maxage;</div><div class='add'>+</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_L2_LOOKUP_PARAMS];</div><div class='add'>+	l2_lookup_params = table-&gt;entries;</div><div class='add'>+</div><div class='add'>+	maxage = SJA1105_AGEING_TIME_MS(ageing_time);</div><div class='add'>+</div><div class='add'>+	if (l2_lookup_params-&gt;maxage == maxage)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	l2_lookup_params-&gt;maxage = maxage;</div><div class='add'>+</div><div class='add'>+	return sja1105_static_config_reload(priv, SJA1105_AGEING_TIME);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_change_mtu(struct dsa_switch *ds, int port, int new_mtu)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_l2_policing_entry *policing;</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	new_mtu += VLAN_ETH_HLEN + ETH_FCS_LEN;</div><div class='add'>+</div><div class='add'>+	if (dsa_is_cpu_port(ds, port) || dsa_is_dsa_port(ds, port))</div><div class='add'>+		new_mtu += VLAN_HLEN;</div><div class='add'>+</div><div class='add'>+	policing = priv-&gt;static_config.tables[BLK_IDX_L2_POLICING].entries;</div><div class='add'>+</div><div class='add'>+	if (policing[port].maxlen == new_mtu)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	policing[port].maxlen = new_mtu;</div><div class='add'>+</div><div class='add'>+	return sja1105_static_config_reload(priv, SJA1105_BEST_EFFORT_POLICING);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_get_max_mtu(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	return 2043 - VLAN_ETH_HLEN - ETH_FCS_LEN;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_port_setup_tc(struct dsa_switch *ds, int port,</div><div class='add'>+				 enum tc_setup_type type,</div><div class='add'>+				 void *type_data)</div><div class='add'>+{</div><div class='add'>+	switch (type) {</div><div class='add'>+	case TC_SETUP_QDISC_TAPRIO:</div><div class='add'>+		return sja1105_setup_tc_taprio(ds, port, type_data);</div><div class='add'>+	case TC_SETUP_QDISC_CBS:</div><div class='add'>+		return sja1105_setup_tc_cbs(ds, port, type_data);</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* We have a single mirror (@to) port, but can configure ingress and egress</div><div class='add'>+ * mirroring on all other (@from) ports.</div><div class='add'>+ * We need to allow mirroring rules only as long as the @to port is always the</div><div class='add'>+ * same, and we need to unset the @to port from mirr_port only when there is no</div><div class='add'>+ * mirroring rule that references it.</div><div class='add'>+ */</div><div class='add'>+static int sja1105_mirror_apply(struct sja1105_private *priv, int from, int to,</div><div class='add'>+				bool ingress, bool enabled)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_general_params_entry *general_params;</div><div class='add'>+	struct sja1105_mac_config_entry *mac;</div><div class='add'>+	struct dsa_switch *ds = priv-&gt;ds;</div><div class='add'>+	struct sja1105_table *table;</div><div class='add'>+	bool already_enabled;</div><div class='add'>+	u64 new_mirr_port;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_GENERAL_PARAMS];</div><div class='add'>+	general_params = table-&gt;entries;</div><div class='add'>+</div><div class='add'>+	mac = priv-&gt;static_config.tables[BLK_IDX_MAC_CONFIG].entries;</div><div class='add'>+</div><div class='add'>+	already_enabled = (general_params-&gt;mirr_port != ds-&gt;num_ports);</div><div class='add'>+	if (already_enabled &amp;&amp; enabled &amp;&amp; general_params-&gt;mirr_port != to) {</div><div class='add'>+		dev_err(priv-&gt;ds-&gt;dev,</div><div class='add'>+			"Delete mirroring rules towards port %llu first\n",</div><div class='add'>+			general_params-&gt;mirr_port);</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	new_mirr_port = to;</div><div class='add'>+	if (!enabled) {</div><div class='add'>+		bool keep = false;</div><div class='add'>+		int port;</div><div class='add'>+</div><div class='add'>+		/* Anybody still referencing mirr_port? */</div><div class='add'>+		for (port = 0; port &lt; ds-&gt;num_ports; port++) {</div><div class='add'>+			if (mac[port].ing_mirr || mac[port].egr_mirr) {</div><div class='add'>+				keep = true;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		/* Unset already_enabled for next time */</div><div class='add'>+		if (!keep)</div><div class='add'>+			new_mirr_port = ds-&gt;num_ports;</div><div class='add'>+	}</div><div class='add'>+	if (new_mirr_port != general_params-&gt;mirr_port) {</div><div class='add'>+		general_params-&gt;mirr_port = new_mirr_port;</div><div class='add'>+</div><div class='add'>+		rc = sja1105_dynamic_config_write(priv, BLK_IDX_GENERAL_PARAMS,</div><div class='add'>+						  0, general_params, true);</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ingress)</div><div class='add'>+		mac[from].ing_mirr = enabled;</div><div class='add'>+	else</div><div class='add'>+		mac[from].egr_mirr = enabled;</div><div class='add'>+</div><div class='add'>+	return sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, from,</div><div class='add'>+					    &amp;mac[from], true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_mirror_add(struct dsa_switch *ds, int port,</div><div class='add'>+			      struct dsa_mall_mirror_tc_entry *mirror,</div><div class='add'>+			      bool ingress, struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	return sja1105_mirror_apply(ds-&gt;priv, port, mirror-&gt;to_local_port,</div><div class='add'>+				    ingress, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sja1105_mirror_del(struct dsa_switch *ds, int port,</div><div class='add'>+			       struct dsa_mall_mirror_tc_entry *mirror)</div><div class='add'>+{</div><div class='add'>+	sja1105_mirror_apply(ds-&gt;priv, port, mirror-&gt;to_local_port,</div><div class='add'>+			     mirror-&gt;ingress, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_port_policer_add(struct dsa_switch *ds, int port,</div><div class='add'>+				    struct dsa_mall_policer_tc_entry *policer)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_l2_policing_entry *policing;</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	policing = priv-&gt;static_config.tables[BLK_IDX_L2_POLICING].entries;</div><div class='add'>+</div><div class='add'>+	/* In hardware, every 8 microseconds the credit level is incremented by</div><div class='add'>+	 * the value of RATE bytes divided by 64, up to a maximum of SMAX</div><div class='add'>+	 * bytes.</div><div class='add'>+	 */</div><div class='add'>+	policing[port].rate = div_u64(512 * policer-&gt;rate_bytes_per_sec,</div><div class='add'>+				      1000000);</div><div class='add'>+	policing[port].smax = policer-&gt;burst;</div><div class='add'>+</div><div class='add'>+	return sja1105_static_config_reload(priv, SJA1105_BEST_EFFORT_POLICING);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sja1105_port_policer_del(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_l2_policing_entry *policing;</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	policing = priv-&gt;static_config.tables[BLK_IDX_L2_POLICING].entries;</div><div class='add'>+</div><div class='add'>+	policing[port].rate = SJA1105_RATE_MBPS(1000);</div><div class='add'>+	policing[port].smax = 65535;</div><div class='add'>+</div><div class='add'>+	sja1105_static_config_reload(priv, SJA1105_BEST_EFFORT_POLICING);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_port_set_learning(struct sja1105_private *priv, int port,</div><div class='add'>+				     bool enabled)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_mac_config_entry *mac;</div><div class='add'>+</div><div class='add'>+	mac = priv-&gt;static_config.tables[BLK_IDX_MAC_CONFIG].entries;</div><div class='add'>+</div><div class='add'>+	mac[port].dyn_learn = enabled;</div><div class='add'>+</div><div class='add'>+	return sja1105_dynamic_config_write(priv, BLK_IDX_MAC_CONFIG, port,</div><div class='add'>+					    &amp;mac[port], true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_port_ucast_bcast_flood(struct sja1105_private *priv, int to,</div><div class='add'>+					  struct switchdev_brport_flags flags)</div><div class='add'>+{</div><div class='add'>+	if (flags.mask &amp; BR_FLOOD) {</div><div class='add'>+		if (flags.val &amp; BR_FLOOD)</div><div class='add'>+			priv-&gt;ucast_egress_floods |= BIT(to);</div><div class='add'>+		else</div><div class='add'>+			priv-&gt;ucast_egress_floods &amp;= ~BIT(to);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flags.mask &amp; BR_BCAST_FLOOD) {</div><div class='add'>+		if (flags.val &amp; BR_BCAST_FLOOD)</div><div class='add'>+			priv-&gt;bcast_egress_floods |= BIT(to);</div><div class='add'>+		else</div><div class='add'>+			priv-&gt;bcast_egress_floods &amp;= ~BIT(to);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return sja1105_manage_flood_domains(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_port_mcast_flood(struct sja1105_private *priv, int to,</div><div class='add'>+				    struct switchdev_brport_flags flags,</div><div class='add'>+				    struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_l2_lookup_entry *l2_lookup;</div><div class='add'>+	struct sja1105_table *table;</div><div class='add'>+	int match, rc;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;fdb_lock);</div><div class='add'>+</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_L2_LOOKUP];</div><div class='add'>+	l2_lookup = table-&gt;entries;</div><div class='add'>+</div><div class='add'>+	for (match = 0; match &lt; table-&gt;entry_count; match++)</div><div class='add'>+		if (l2_lookup[match].macaddr == SJA1105_UNKNOWN_MULTICAST &amp;&amp;</div><div class='add'>+		    l2_lookup[match].mask_macaddr == SJA1105_UNKNOWN_MULTICAST)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+	if (match == table-&gt;entry_count) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Could not find FDB entry for unknown multicast");</div><div class='add'>+		rc = -ENOSPC;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flags.val &amp; BR_MCAST_FLOOD)</div><div class='add'>+		l2_lookup[match].destports |= BIT(to);</div><div class='add'>+	else</div><div class='add'>+		l2_lookup[match].destports &amp;= ~BIT(to);</div><div class='add'>+</div><div class='add'>+	rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,</div><div class='add'>+					  l2_lookup[match].index,</div><div class='add'>+					  &amp;l2_lookup[match], true);</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;fdb_lock);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_port_pre_bridge_flags(struct dsa_switch *ds, int port,</div><div class='add'>+					 struct switchdev_brport_flags flags,</div><div class='add'>+					 struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (flags.mask &amp; ~(BR_LEARNING | BR_FLOOD | BR_MCAST_FLOOD |</div><div class='add'>+			   BR_BCAST_FLOOD))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (flags.mask &amp; (BR_FLOOD | BR_MCAST_FLOOD) &amp;&amp;</div><div class='add'>+	    !priv-&gt;info-&gt;can_limit_mcast_flood) {</div><div class='add'>+		bool multicast = !!(flags.val &amp; BR_MCAST_FLOOD);</div><div class='add'>+		bool unicast = !!(flags.val &amp; BR_FLOOD);</div><div class='add'>+</div><div class='add'>+		if (unicast != multicast) {</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+					   "This chip cannot configure multicast flooding independently of unicast");</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_port_bridge_flags(struct dsa_switch *ds, int port,</div><div class='add'>+				     struct switchdev_brport_flags flags,</div><div class='add'>+				     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (flags.mask &amp; BR_LEARNING) {</div><div class='add'>+		bool learn_ena = !!(flags.val &amp; BR_LEARNING);</div><div class='add'>+</div><div class='add'>+		rc = sja1105_port_set_learning(priv, port, learn_ena);</div><div class='add'>+		if (rc)</div><div class='add'>+			return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flags.mask &amp; (BR_FLOOD | BR_BCAST_FLOOD)) {</div><div class='add'>+		rc = sja1105_port_ucast_bcast_flood(priv, port, flags);</div><div class='add'>+		if (rc)</div><div class='add'>+			return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* For chips that can't offload BR_MCAST_FLOOD independently, there</div><div class='add'>+	 * is nothing to do here, we ensured the configuration is in sync by</div><div class='add'>+	 * offloading BR_FLOOD.</div><div class='add'>+	 */</div><div class='add'>+	if (flags.mask &amp; BR_MCAST_FLOOD &amp;&amp; priv-&gt;info-&gt;can_limit_mcast_flood) {</div><div class='add'>+		rc = sja1105_port_mcast_flood(priv, port, flags,</div><div class='add'>+					      extack);</div><div class='add'>+		if (rc)</div><div class='add'>+			return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The programming model for the SJA1105 switch is "all-at-once" via static</div><div class='add'>+ * configuration tables. Some of these can be dynamically modified at runtime,</div><div class='add'>+ * but not the xMII mode parameters table.</div><div class='add'>+ * Furthermode, some PHYs may not have crystals for generating their clocks</div><div class='add'>+ * (e.g. RMII). Instead, their 50MHz clock is supplied via the SJA1105 port's</div><div class='add'>+ * ref_clk pin. So port clocking needs to be initialized early, before</div><div class='add'>+ * connecting to PHYs is attempted, otherwise they won't respond through MDIO.</div><div class='add'>+ * Setting correct PHY link speed does not matter now.</div><div class='add'>+ * But dsa_user_phy_setup is called later than sja1105_setup, so the PHY</div><div class='add'>+ * bindings are not yet parsed by DSA core. We need to parse early so that we</div><div class='add'>+ * can populate the xMII mode parameters table.</div><div class='add'>+ */</div><div class='add'>+static int sja1105_setup(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;info-&gt;disable_microcontroller) {</div><div class='add'>+		rc = priv-&gt;info-&gt;disable_microcontroller(priv);</div><div class='add'>+		if (rc &lt; 0) {</div><div class='add'>+			dev_err(ds-&gt;dev,</div><div class='add'>+				"Failed to disable microcontroller: %pe\n",</div><div class='add'>+				ERR_PTR(rc));</div><div class='add'>+			return rc;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Create and send configuration down to device */</div><div class='add'>+	rc = sja1105_static_config_load(priv);</div><div class='add'>+	if (rc &lt; 0) {</div><div class='add'>+		dev_err(ds-&gt;dev, "Failed to load static config: %d\n", rc);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Configure the CGU (PHY link modes and speeds) */</div><div class='add'>+	if (priv-&gt;info-&gt;clocking_setup) {</div><div class='add'>+		rc = priv-&gt;info-&gt;clocking_setup(priv);</div><div class='add'>+		if (rc &lt; 0) {</div><div class='add'>+			dev_err(ds-&gt;dev,</div><div class='add'>+				"Failed to configure MII clocking: %pe\n",</div><div class='add'>+				ERR_PTR(rc));</div><div class='add'>+			goto out_static_config_free;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sja1105_tas_setup(ds);</div><div class='add'>+	sja1105_flower_setup(ds);</div><div class='add'>+</div><div class='add'>+	rc = sja1105_ptp_clock_register(ds);</div><div class='add'>+	if (rc &lt; 0) {</div><div class='add'>+		dev_err(ds-&gt;dev, "Failed to register PTP clock: %d\n", rc);</div><div class='add'>+		goto out_flower_teardown;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = sja1105_mdiobus_register(ds);</div><div class='add'>+	if (rc &lt; 0) {</div><div class='add'>+		dev_err(ds-&gt;dev, "Failed to register MDIO bus: %pe\n",</div><div class='add'>+			ERR_PTR(rc));</div><div class='add'>+		goto out_ptp_clock_unregister;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = sja1105_devlink_setup(ds);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		goto out_mdiobus_unregister;</div><div class='add'>+</div><div class='add'>+	rtnl_lock();</div><div class='add'>+	rc = dsa_tag_8021q_register(ds, htons(ETH_P_8021Q));</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out_devlink_teardown;</div><div class='add'>+</div><div class='add'>+	/* On SJA1105, VLAN filtering per se is always enabled in hardware.</div><div class='add'>+	 * The only thing we can do to disable it is lie about what the 802.1Q</div><div class='add'>+	 * EtherType is.</div><div class='add'>+	 * So it will still try to apply VLAN filtering, but all ingress</div><div class='add'>+	 * traffic (except frames received with EtherType of ETH_P_SJA1105)</div><div class='add'>+	 * will be internally tagged with a distorted VLAN header where the</div><div class='add'>+	 * TPID is ETH_P_SJA1105, and the VLAN ID is the port pvid.</div><div class='add'>+	 */</div><div class='add'>+	ds-&gt;vlan_filtering_is_global = true;</div><div class='add'>+	ds-&gt;fdb_isolation = true;</div><div class='add'>+	ds-&gt;max_num_bridges = DSA_TAG_8021Q_MAX_NUM_BRIDGES;</div><div class='add'>+</div><div class='add'>+	/* Advertise the 8 egress queues */</div><div class='add'>+	ds-&gt;num_tx_queues = SJA1105_NUM_TC;</div><div class='add'>+</div><div class='add'>+	ds-&gt;mtu_enforcement_ingress = true;</div><div class='add'>+	ds-&gt;assisted_learning_on_cpu_port = true;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_devlink_teardown:</div><div class='add'>+	sja1105_devlink_teardown(ds);</div><div class='add'>+out_mdiobus_unregister:</div><div class='add'>+	sja1105_mdiobus_unregister(ds);</div><div class='add'>+out_ptp_clock_unregister:</div><div class='add'>+	sja1105_ptp_clock_unregister(ds);</div><div class='add'>+out_flower_teardown:</div><div class='add'>+	sja1105_flower_teardown(ds);</div><div class='add'>+	sja1105_tas_teardown(ds);</div><div class='add'>+out_static_config_free:</div><div class='add'>+	sja1105_static_config_free(&amp;priv-&gt;static_config);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sja1105_teardown(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	rtnl_lock();</div><div class='add'>+	dsa_tag_8021q_unregister(ds);</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+</div><div class='add'>+	sja1105_devlink_teardown(ds);</div><div class='add'>+	sja1105_mdiobus_unregister(ds);</div><div class='add'>+	sja1105_ptp_clock_unregister(ds);</div><div class='add'>+	sja1105_flower_teardown(ds);</div><div class='add'>+	sja1105_tas_teardown(ds);</div><div class='add'>+	sja1105_static_config_free(&amp;priv-&gt;static_config);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct phylink_mac_ops sja1105_phylink_mac_ops = {</div><div class='add'>+	.mac_select_pcs	= sja1105_mac_select_pcs,</div><div class='add'>+	.mac_config	= sja1105_mac_config,</div><div class='add'>+	.mac_link_up	= sja1105_mac_link_up,</div><div class='add'>+	.mac_link_down	= sja1105_mac_link_down,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct dsa_switch_ops sja1105_switch_ops = {</div><div class='add'>+	.get_tag_protocol	= sja1105_get_tag_protocol,</div><div class='add'>+	.connect_tag_protocol	= sja1105_connect_tag_protocol,</div><div class='add'>+	.setup			= sja1105_setup,</div><div class='add'>+	.teardown		= sja1105_teardown,</div><div class='add'>+	.set_ageing_time	= sja1105_set_ageing_time,</div><div class='add'>+	.port_change_mtu	= sja1105_change_mtu,</div><div class='add'>+	.port_max_mtu		= sja1105_get_max_mtu,</div><div class='add'>+	.phylink_get_caps	= sja1105_phylink_get_caps,</div><div class='add'>+	.get_strings		= sja1105_get_strings,</div><div class='add'>+	.get_ethtool_stats	= sja1105_get_ethtool_stats,</div><div class='add'>+	.get_sset_count		= sja1105_get_sset_count,</div><div class='add'>+	.get_ts_info		= sja1105_get_ts_info,</div><div class='add'>+	.port_fdb_dump		= sja1105_fdb_dump,</div><div class='add'>+	.port_fdb_add		= sja1105_fdb_add,</div><div class='add'>+	.port_fdb_del		= sja1105_fdb_del,</div><div class='add'>+	.port_fast_age		= sja1105_fast_age,</div><div class='add'>+	.port_bridge_join	= sja1105_bridge_join,</div><div class='add'>+	.port_bridge_leave	= sja1105_bridge_leave,</div><div class='add'>+	.port_pre_bridge_flags	= sja1105_port_pre_bridge_flags,</div><div class='add'>+	.port_bridge_flags	= sja1105_port_bridge_flags,</div><div class='add'>+	.port_stp_state_set	= sja1105_bridge_stp_state_set,</div><div class='add'>+	.port_vlan_filtering	= sja1105_vlan_filtering,</div><div class='add'>+	.port_vlan_add		= sja1105_bridge_vlan_add,</div><div class='add'>+	.port_vlan_del		= sja1105_bridge_vlan_del,</div><div class='add'>+	.port_mdb_add		= sja1105_mdb_add,</div><div class='add'>+	.port_mdb_del		= sja1105_mdb_del,</div><div class='add'>+	.port_hwtstamp_get	= sja1105_hwtstamp_get,</div><div class='add'>+	.port_hwtstamp_set	= sja1105_hwtstamp_set,</div><div class='add'>+	.port_rxtstamp		= sja1105_port_rxtstamp,</div><div class='add'>+	.port_txtstamp		= sja1105_port_txtstamp,</div><div class='add'>+	.port_setup_tc		= sja1105_port_setup_tc,</div><div class='add'>+	.port_mirror_add	= sja1105_mirror_add,</div><div class='add'>+	.port_mirror_del	= sja1105_mirror_del,</div><div class='add'>+	.port_policer_add	= sja1105_port_policer_add,</div><div class='add'>+	.port_policer_del	= sja1105_port_policer_del,</div><div class='add'>+	.cls_flower_add		= sja1105_cls_flower_add,</div><div class='add'>+	.cls_flower_del		= sja1105_cls_flower_del,</div><div class='add'>+	.cls_flower_stats	= sja1105_cls_flower_stats,</div><div class='add'>+	.devlink_info_get	= sja1105_devlink_info_get,</div><div class='add'>+	.tag_8021q_vlan_add	= sja1105_dsa_8021q_vlan_add,</div><div class='add'>+	.tag_8021q_vlan_del	= sja1105_dsa_8021q_vlan_del,</div><div class='add'>+	.port_prechangeupper	= sja1105_prechangeupper,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct of_device_id sja1105_dt_ids[];</div><div class='add'>+</div><div class='add'>+static int sja1105_check_device_id(struct sja1105_private *priv)</div><div class='add'>+{</div><div class='add'>+	const struct sja1105_regs *regs = priv-&gt;info-&gt;regs;</div><div class='add'>+	u8 prod_id[SJA1105_SIZE_DEVICE_ID] = {0};</div><div class='add'>+	struct device *dev = &amp;priv-&gt;spidev-&gt;dev;</div><div class='add'>+	const struct of_device_id *match;</div><div class='add'>+	u32 device_id;</div><div class='add'>+	u64 part_no;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_xfer_u32(priv, SPI_READ, regs-&gt;device_id, &amp;device_id,</div><div class='add'>+			      NULL);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_xfer_buf(priv, SPI_READ, regs-&gt;prod_id, prod_id,</div><div class='add'>+			      SJA1105_SIZE_DEVICE_ID);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	sja1105_unpack(prod_id, &amp;part_no, 19, 4, SJA1105_SIZE_DEVICE_ID);</div><div class='add'>+</div><div class='add'>+	for (match = sja1105_dt_ids; match-&gt;compatible[0]; match++) {</div><div class='add'>+		const struct sja1105_info *info = match-&gt;data;</div><div class='add'>+</div><div class='add'>+		/* Is what's been probed in our match table at all? */</div><div class='add'>+		if (info-&gt;device_id != device_id || info-&gt;part_no != part_no)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* But is it what's in the device tree? */</div><div class='add'>+		if (priv-&gt;info-&gt;device_id != device_id ||</div><div class='add'>+		    priv-&gt;info-&gt;part_no != part_no) {</div><div class='add'>+			dev_warn(dev, "Device tree specifies chip %s but found %s, please fix it!\n",</div><div class='add'>+				 priv-&gt;info-&gt;name, info-&gt;name);</div><div class='add'>+			/* It isn't. No problem, pick that up. */</div><div class='add'>+			priv-&gt;info = info;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_err(dev, "Unexpected {device ID, part number}: 0x%x 0x%llx\n",</div><div class='add'>+		device_id, part_no);</div><div class='add'>+</div><div class='add'>+	return -ENODEV;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_probe(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;spi-&gt;dev;</div><div class='add'>+	struct sja1105_private *priv;</div><div class='add'>+	size_t max_xfer, max_msg;</div><div class='add'>+	struct dsa_switch *ds;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (!dev-&gt;of_node) {</div><div class='add'>+		dev_err(dev, "No DTS bindings for SJA1105 driver\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = sja1105_hw_reset(dev, 1, 1);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	priv = devm_kzalloc(dev, sizeof(struct sja1105_private), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* Populate our driver private structure (priv) based on</div><div class='add'>+	 * the device tree node that was probed (spi)</div><div class='add'>+	 */</div><div class='add'>+	priv-&gt;spidev = spi;</div><div class='add'>+	spi_set_drvdata(spi, priv);</div><div class='add'>+</div><div class='add'>+	/* Configure the SPI bus */</div><div class='add'>+	spi-&gt;bits_per_word = 8;</div><div class='add'>+	rc = spi_setup(spi);</div><div class='add'>+	if (rc &lt; 0) {</div><div class='add'>+		dev_err(dev, "Could not init SPI\n");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* In sja1105_xfer, we send spi_messages composed of two spi_transfers:</div><div class='add'>+	 * a small one for the message header and another one for the current</div><div class='add'>+	 * chunk of the packed buffer.</div><div class='add'>+	 * Check that the restrictions imposed by the SPI controller are</div><div class='add'>+	 * respected: the chunk buffer is smaller than the max transfer size,</div><div class='add'>+	 * and the total length of the chunk plus its message header is smaller</div><div class='add'>+	 * than the max message size.</div><div class='add'>+	 * We do that during probe time since the maximum transfer size is a</div><div class='add'>+	 * runtime invariant.</div><div class='add'>+	 */</div><div class='add'>+	max_xfer = spi_max_transfer_size(spi);</div><div class='add'>+	max_msg = spi_max_message_size(spi);</div><div class='add'>+</div><div class='add'>+	/* We need to send at least one 64-bit word of SPI payload per message</div><div class='add'>+	 * in order to be able to make useful progress.</div><div class='add'>+	 */</div><div class='add'>+	if (max_msg &lt; SJA1105_SIZE_SPI_MSG_HEADER + 8) {</div><div class='add'>+		dev_err(dev, "SPI master cannot send large enough buffers, aborting\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;max_xfer_len = SJA1105_SIZE_SPI_MSG_MAXLEN;</div><div class='add'>+	if (priv-&gt;max_xfer_len &gt; max_xfer)</div><div class='add'>+		priv-&gt;max_xfer_len = max_xfer;</div><div class='add'>+	if (priv-&gt;max_xfer_len &gt; max_msg - SJA1105_SIZE_SPI_MSG_HEADER)</div><div class='add'>+		priv-&gt;max_xfer_len = max_msg - SJA1105_SIZE_SPI_MSG_HEADER;</div><div class='add'>+</div><div class='add'>+	priv-&gt;info = of_device_get_match_data(dev);</div><div class='add'>+</div><div class='add'>+	/* Detect hardware device */</div><div class='add'>+	rc = sja1105_check_device_id(priv);</div><div class='add'>+	if (rc &lt; 0) {</div><div class='add'>+		dev_err(dev, "Device ID check failed: %d\n", rc);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_info(dev, "Probed switch chip: %s\n", priv-&gt;info-&gt;name);</div><div class='add'>+</div><div class='add'>+	ds = devm_kzalloc(dev, sizeof(*ds), GFP_KERNEL);</div><div class='add'>+	if (!ds)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ds-&gt;dev = dev;</div><div class='add'>+	ds-&gt;num_ports = priv-&gt;info-&gt;num_ports;</div><div class='add'>+	ds-&gt;ops = &amp;sja1105_switch_ops;</div><div class='add'>+	ds-&gt;phylink_mac_ops = &amp;sja1105_phylink_mac_ops;</div><div class='add'>+	ds-&gt;priv = priv;</div><div class='add'>+	priv-&gt;ds = ds;</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;priv-&gt;ptp_data.lock);</div><div class='add'>+	mutex_init(&amp;priv-&gt;dynamic_config_lock);</div><div class='add'>+	mutex_init(&amp;priv-&gt;mgmt_lock);</div><div class='add'>+	mutex_init(&amp;priv-&gt;fdb_lock);</div><div class='add'>+	spin_lock_init(&amp;priv-&gt;ts_id_lock);</div><div class='add'>+</div><div class='add'>+	rc = sja1105_parse_dt(priv);</div><div class='add'>+	if (rc &lt; 0) {</div><div class='add'>+		dev_err(ds-&gt;dev, "Failed to parse DT: %d\n", rc);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (IS_ENABLED(CONFIG_NET_SCH_CBS)) {</div><div class='add'>+		priv-&gt;cbs = devm_kcalloc(dev, priv-&gt;info-&gt;num_cbs_shapers,</div><div class='add'>+					 sizeof(struct sja1105_cbs_entry),</div><div class='add'>+					 GFP_KERNEL);</div><div class='add'>+		if (!priv-&gt;cbs)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return dsa_register_switch(priv-&gt;ds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sja1105_remove(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = spi_get_drvdata(spi);</div><div class='add'>+</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dsa_unregister_switch(priv-&gt;ds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sja1105_shutdown(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = spi_get_drvdata(spi);</div><div class='add'>+</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dsa_switch_shutdown(priv-&gt;ds);</div><div class='add'>+</div><div class='add'>+	spi_set_drvdata(spi, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id sja1105_dt_ids[] = {</div><div class='add'>+	{ .compatible = "nxp,sja1105e", .data = &amp;sja1105e_info },</div><div class='add'>+	{ .compatible = "nxp,sja1105t", .data = &amp;sja1105t_info },</div><div class='add'>+	{ .compatible = "nxp,sja1105p", .data = &amp;sja1105p_info },</div><div class='add'>+	{ .compatible = "nxp,sja1105q", .data = &amp;sja1105q_info },</div><div class='add'>+	{ .compatible = "nxp,sja1105r", .data = &amp;sja1105r_info },</div><div class='add'>+	{ .compatible = "nxp,sja1105s", .data = &amp;sja1105s_info },</div><div class='add'>+	{ .compatible = "nxp,sja1110a", .data = &amp;sja1110a_info },</div><div class='add'>+	{ .compatible = "nxp,sja1110b", .data = &amp;sja1110b_info },</div><div class='add'>+	{ .compatible = "nxp,sja1110c", .data = &amp;sja1110c_info },</div><div class='add'>+	{ .compatible = "nxp,sja1110d", .data = &amp;sja1110d_info },</div><div class='add'>+	{ /* sentinel */ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, sja1105_dt_ids);</div><div class='add'>+</div><div class='add'>+static const struct spi_device_id sja1105_spi_ids[] = {</div><div class='add'>+	{ "sja1105e" },</div><div class='add'>+	{ "sja1105t" },</div><div class='add'>+	{ "sja1105p" },</div><div class='add'>+	{ "sja1105q" },</div><div class='add'>+	{ "sja1105r" },</div><div class='add'>+	{ "sja1105s" },</div><div class='add'>+	{ "sja1110a" },</div><div class='add'>+	{ "sja1110b" },</div><div class='add'>+	{ "sja1110c" },</div><div class='add'>+	{ "sja1110d" },</div><div class='add'>+	{ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(spi, sja1105_spi_ids);</div><div class='add'>+</div><div class='add'>+static struct spi_driver sja1105_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name  = "sja1105",</div><div class='add'>+		.of_match_table = of_match_ptr(sja1105_dt_ids),</div><div class='add'>+	},</div><div class='add'>+	.id_table = sja1105_spi_ids,</div><div class='add'>+	.probe  = sja1105_probe,</div><div class='add'>+	.remove = sja1105_remove,</div><div class='add'>+	.shutdown = sja1105_shutdown,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_spi_driver(sja1105_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Vladimir Oltean &lt;olteanv@gmail.com&gt;");</div><div class='add'>+MODULE_AUTHOR("Georg Waibel &lt;georg.waibel@sensor-technik.de&gt;");</div><div class='add'>+MODULE_DESCRIPTION("SJA1105 Driver");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/net/dsa/sja1105/sja1105_mdio.c b/drivers/net/dsa/sja1105/sja1105_mdio.c<br/>new file mode 100644<br/>index 000000000000..8d535c033cef<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/sja1105/sja1105_mdio.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/sja1105/sja1105_mdio.c</a></div><div class='hunk'>@@ -0,0 +1,507 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright 2021 NXP</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/pcs/pcs-xpcs.h&gt;</div><div class='add'>+#include &lt;linux/of_mdio.h&gt;</div><div class='add'>+#include "sja1105.h"</div><div class='add'>+</div><div class='add'>+#define SJA1110_PCS_BANK_REG		SJA1110_SPI_ADDR(0x3fc)</div><div class='add'>+</div><div class='add'>+int sja1105_pcs_mdio_read_c45(struct mii_bus *bus, int phy, int mmd, int reg)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_mdio_private *mdio_priv = bus-&gt;priv;</div><div class='add'>+	struct sja1105_private *priv = mdio_priv-&gt;priv;</div><div class='add'>+	u64 addr;</div><div class='add'>+	u32 tmp;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	addr = (mmd &lt;&lt; 16) | reg;</div><div class='add'>+</div><div class='add'>+	if (mmd != MDIO_MMD_VEND1 &amp;&amp; mmd != MDIO_MMD_VEND2)</div><div class='add'>+		return 0xffff;</div><div class='add'>+</div><div class='add'>+	if (mmd == MDIO_MMD_VEND2 &amp;&amp; (reg &amp; GENMASK(15, 0)) == MII_PHYSID1)</div><div class='add'>+		return NXP_SJA1105_XPCS_ID &gt;&gt; 16;</div><div class='add'>+	if (mmd == MDIO_MMD_VEND2 &amp;&amp; (reg &amp; GENMASK(15, 0)) == MII_PHYSID2)</div><div class='add'>+		return NXP_SJA1105_XPCS_ID &amp; GENMASK(15, 0);</div><div class='add'>+</div><div class='add'>+	rc = sja1105_xfer_u32(priv, SPI_READ, addr, &amp;tmp, NULL);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	return tmp &amp; 0xffff;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int sja1105_pcs_mdio_write_c45(struct mii_bus *bus, int phy, int mmd,</div><div class='add'>+			       int reg, u16 val)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_mdio_private *mdio_priv = bus-&gt;priv;</div><div class='add'>+	struct sja1105_private *priv = mdio_priv-&gt;priv;</div><div class='add'>+	u64 addr;</div><div class='add'>+	u32 tmp;</div><div class='add'>+</div><div class='add'>+	addr = (mmd &lt;&lt; 16) | reg;</div><div class='add'>+	tmp = val;</div><div class='add'>+</div><div class='add'>+	if (mmd != MDIO_MMD_VEND1 &amp;&amp; mmd != MDIO_MMD_VEND2)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return sja1105_xfer_u32(priv, SPI_WRITE, addr, &amp;tmp, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int sja1110_pcs_mdio_read_c45(struct mii_bus *bus, int phy, int mmd, int reg)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_mdio_private *mdio_priv = bus-&gt;priv;</div><div class='add'>+	struct sja1105_private *priv = mdio_priv-&gt;priv;</div><div class='add'>+	const struct sja1105_regs *regs = priv-&gt;info-&gt;regs;</div><div class='add'>+	int offset, bank;</div><div class='add'>+	u64 addr;</div><div class='add'>+	u32 tmp;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (regs-&gt;pcs_base[phy] == SJA1105_RSV_ADDR)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	addr = (mmd &lt;&lt; 16) | reg;</div><div class='add'>+</div><div class='add'>+	if (mmd == MDIO_MMD_VEND2 &amp;&amp; (reg &amp; GENMASK(15, 0)) == MII_PHYSID1)</div><div class='add'>+		return NXP_SJA1110_XPCS_ID &gt;&gt; 16;</div><div class='add'>+	if (mmd == MDIO_MMD_VEND2 &amp;&amp; (reg &amp; GENMASK(15, 0)) == MII_PHYSID2)</div><div class='add'>+		return NXP_SJA1110_XPCS_ID &amp; GENMASK(15, 0);</div><div class='add'>+</div><div class='add'>+	bank = addr &gt;&gt; 8;</div><div class='add'>+	offset = addr &amp; GENMASK(7, 0);</div><div class='add'>+</div><div class='add'>+	/* This addressing scheme reserves register 0xff for the bank address</div><div class='add'>+	 * register, so that can never be addressed.</div><div class='add'>+	 */</div><div class='add'>+	if (WARN_ON(offset == 0xff))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	tmp = bank;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_xfer_u32(priv, SPI_WRITE,</div><div class='add'>+			      regs-&gt;pcs_base[phy] + SJA1110_PCS_BANK_REG,</div><div class='add'>+			      &amp;tmp, NULL);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_xfer_u32(priv, SPI_READ, regs-&gt;pcs_base[phy] + offset,</div><div class='add'>+			      &amp;tmp, NULL);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	return tmp &amp; 0xffff;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int sja1110_pcs_mdio_write_c45(struct mii_bus *bus, int phy, int mmd, int reg,</div><div class='add'>+			       u16 val)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_mdio_private *mdio_priv = bus-&gt;priv;</div><div class='add'>+	struct sja1105_private *priv = mdio_priv-&gt;priv;</div><div class='add'>+	const struct sja1105_regs *regs = priv-&gt;info-&gt;regs;</div><div class='add'>+	int offset, bank;</div><div class='add'>+	u64 addr;</div><div class='add'>+	u32 tmp;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (regs-&gt;pcs_base[phy] == SJA1105_RSV_ADDR)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	addr = (mmd &lt;&lt; 16) | reg;</div><div class='add'>+</div><div class='add'>+	bank = addr &gt;&gt; 8;</div><div class='add'>+	offset = addr &amp; GENMASK(7, 0);</div><div class='add'>+</div><div class='add'>+	/* This addressing scheme reserves register 0xff for the bank address</div><div class='add'>+	 * register, so that can never be addressed.</div><div class='add'>+	 */</div><div class='add'>+	if (WARN_ON(offset == 0xff))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	tmp = bank;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_xfer_u32(priv, SPI_WRITE,</div><div class='add'>+			      regs-&gt;pcs_base[phy] + SJA1110_PCS_BANK_REG,</div><div class='add'>+			      &amp;tmp, NULL);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	tmp = val;</div><div class='add'>+</div><div class='add'>+	return sja1105_xfer_u32(priv, SPI_WRITE, regs-&gt;pcs_base[phy] + offset,</div><div class='add'>+				&amp;tmp, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+enum sja1105_mdio_opcode {</div><div class='add'>+	SJA1105_C45_ADDR = 0,</div><div class='add'>+	SJA1105_C22 = 1,</div><div class='add'>+	SJA1105_C45_DATA = 2,</div><div class='add'>+	SJA1105_C45_DATA_AUTOINC = 3,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static u64 sja1105_base_t1_encode_addr(struct sja1105_private *priv,</div><div class='add'>+				       int phy, enum sja1105_mdio_opcode op,</div><div class='add'>+				       int xad)</div><div class='add'>+{</div><div class='add'>+	const struct sja1105_regs *regs = priv-&gt;info-&gt;regs;</div><div class='add'>+</div><div class='add'>+	return regs-&gt;mdio_100base_t1 | (phy &lt;&lt; 7) | (op &lt;&lt; 5) | (xad &lt;&lt; 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_base_t1_mdio_read_c22(struct mii_bus *bus, int phy, int reg)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_mdio_private *mdio_priv = bus-&gt;priv;</div><div class='add'>+	struct sja1105_private *priv = mdio_priv-&gt;priv;</div><div class='add'>+	u64 addr;</div><div class='add'>+	u32 tmp;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	addr = sja1105_base_t1_encode_addr(priv, phy, SJA1105_C22, reg &amp; 0x1f);</div><div class='add'>+</div><div class='add'>+	rc = sja1105_xfer_u32(priv, SPI_READ, addr, &amp;tmp, NULL);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	return tmp &amp; 0xffff;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_base_t1_mdio_read_c45(struct mii_bus *bus, int phy,</div><div class='add'>+					 int mmd, int reg)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_mdio_private *mdio_priv = bus-&gt;priv;</div><div class='add'>+	struct sja1105_private *priv = mdio_priv-&gt;priv;</div><div class='add'>+	u64 addr;</div><div class='add'>+	u32 tmp;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	addr = sja1105_base_t1_encode_addr(priv, phy, SJA1105_C45_ADDR, mmd);</div><div class='add'>+</div><div class='add'>+	rc = sja1105_xfer_u32(priv, SPI_WRITE, addr, &amp;reg, NULL);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	addr = sja1105_base_t1_encode_addr(priv, phy, SJA1105_C45_DATA, mmd);</div><div class='add'>+</div><div class='add'>+	rc = sja1105_xfer_u32(priv, SPI_READ, addr, &amp;tmp, NULL);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	return tmp &amp; 0xffff;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_base_t1_mdio_write_c22(struct mii_bus *bus, int phy, int reg,</div><div class='add'>+					  u16 val)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_mdio_private *mdio_priv = bus-&gt;priv;</div><div class='add'>+	struct sja1105_private *priv = mdio_priv-&gt;priv;</div><div class='add'>+	u64 addr;</div><div class='add'>+	u32 tmp;</div><div class='add'>+</div><div class='add'>+	addr = sja1105_base_t1_encode_addr(priv, phy, SJA1105_C22, reg &amp; 0x1f);</div><div class='add'>+</div><div class='add'>+	tmp = val &amp; 0xffff;</div><div class='add'>+</div><div class='add'>+	return sja1105_xfer_u32(priv, SPI_WRITE, addr, &amp;tmp, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_base_t1_mdio_write_c45(struct mii_bus *bus, int phy,</div><div class='add'>+					  int mmd, int reg, u16 val)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_mdio_private *mdio_priv = bus-&gt;priv;</div><div class='add'>+	struct sja1105_private *priv = mdio_priv-&gt;priv;</div><div class='add'>+	u64 addr;</div><div class='add'>+	u32 tmp;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	addr = sja1105_base_t1_encode_addr(priv, phy, SJA1105_C45_ADDR, mmd);</div><div class='add'>+</div><div class='add'>+	rc = sja1105_xfer_u32(priv, SPI_WRITE, addr, &amp;reg, NULL);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	addr = sja1105_base_t1_encode_addr(priv, phy, SJA1105_C45_DATA, mmd);</div><div class='add'>+</div><div class='add'>+	tmp = val &amp; 0xffff;</div><div class='add'>+</div><div class='add'>+	return sja1105_xfer_u32(priv, SPI_WRITE, addr, &amp;tmp, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_base_tx_mdio_read(struct mii_bus *bus, int phy, int reg)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_mdio_private *mdio_priv = bus-&gt;priv;</div><div class='add'>+	struct sja1105_private *priv = mdio_priv-&gt;priv;</div><div class='add'>+	const struct sja1105_regs *regs = priv-&gt;info-&gt;regs;</div><div class='add'>+	u32 tmp;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_xfer_u32(priv, SPI_READ, regs-&gt;mdio_100base_tx + reg,</div><div class='add'>+			      &amp;tmp, NULL);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	return tmp &amp; 0xffff;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_base_tx_mdio_write(struct mii_bus *bus, int phy, int reg,</div><div class='add'>+				      u16 val)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_mdio_private *mdio_priv = bus-&gt;priv;</div><div class='add'>+	struct sja1105_private *priv = mdio_priv-&gt;priv;</div><div class='add'>+	const struct sja1105_regs *regs = priv-&gt;info-&gt;regs;</div><div class='add'>+	u32 tmp = val;</div><div class='add'>+</div><div class='add'>+	return sja1105_xfer_u32(priv, SPI_WRITE, regs-&gt;mdio_100base_tx + reg,</div><div class='add'>+				&amp;tmp, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_mdiobus_base_tx_register(struct sja1105_private *priv,</div><div class='add'>+					    struct device_node *mdio_node)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_mdio_private *mdio_priv;</div><div class='add'>+	struct device_node *np;</div><div class='add'>+	struct mii_bus *bus;</div><div class='add'>+	int rc = 0;</div><div class='add'>+</div><div class='add'>+	np = of_get_compatible_child(mdio_node, "nxp,sja1110-base-tx-mdio");</div><div class='add'>+	if (!np)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (!of_device_is_available(np))</div><div class='add'>+		goto out_put_np;</div><div class='add'>+</div><div class='add'>+	bus = mdiobus_alloc_size(sizeof(*mdio_priv));</div><div class='add'>+	if (!bus) {</div><div class='add'>+		rc = -ENOMEM;</div><div class='add'>+		goto out_put_np;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bus-&gt;name = "SJA1110 100base-TX MDIO bus";</div><div class='add'>+	snprintf(bus-&gt;id, MII_BUS_ID_SIZE, "%s-base-tx",</div><div class='add'>+		 dev_name(priv-&gt;ds-&gt;dev));</div><div class='add'>+	bus-&gt;read = sja1105_base_tx_mdio_read;</div><div class='add'>+	bus-&gt;write = sja1105_base_tx_mdio_write;</div><div class='add'>+	bus-&gt;parent = priv-&gt;ds-&gt;dev;</div><div class='add'>+	mdio_priv = bus-&gt;priv;</div><div class='add'>+	mdio_priv-&gt;priv = priv;</div><div class='add'>+</div><div class='add'>+	rc = of_mdiobus_register(bus, np);</div><div class='add'>+	if (rc) {</div><div class='add'>+		mdiobus_free(bus);</div><div class='add'>+		goto out_put_np;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;mdio_base_tx = bus;</div><div class='add'>+</div><div class='add'>+out_put_np:</div><div class='add'>+	of_node_put(np);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sja1105_mdiobus_base_tx_unregister(struct sja1105_private *priv)</div><div class='add'>+{</div><div class='add'>+	if (!priv-&gt;mdio_base_tx)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mdiobus_unregister(priv-&gt;mdio_base_tx);</div><div class='add'>+	mdiobus_free(priv-&gt;mdio_base_tx);</div><div class='add'>+	priv-&gt;mdio_base_tx = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_mdiobus_base_t1_register(struct sja1105_private *priv,</div><div class='add'>+					    struct device_node *mdio_node)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_mdio_private *mdio_priv;</div><div class='add'>+	struct device_node *np;</div><div class='add'>+	struct mii_bus *bus;</div><div class='add'>+	int rc = 0;</div><div class='add'>+</div><div class='add'>+	np = of_get_compatible_child(mdio_node, "nxp,sja1110-base-t1-mdio");</div><div class='add'>+	if (!np)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (!of_device_is_available(np))</div><div class='add'>+		goto out_put_np;</div><div class='add'>+</div><div class='add'>+	bus = mdiobus_alloc_size(sizeof(*mdio_priv));</div><div class='add'>+	if (!bus) {</div><div class='add'>+		rc = -ENOMEM;</div><div class='add'>+		goto out_put_np;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bus-&gt;name = "SJA1110 100base-T1 MDIO bus";</div><div class='add'>+	snprintf(bus-&gt;id, MII_BUS_ID_SIZE, "%s-base-t1",</div><div class='add'>+		 dev_name(priv-&gt;ds-&gt;dev));</div><div class='add'>+	bus-&gt;read = sja1105_base_t1_mdio_read_c22;</div><div class='add'>+	bus-&gt;write = sja1105_base_t1_mdio_write_c22;</div><div class='add'>+	bus-&gt;read_c45 = sja1105_base_t1_mdio_read_c45;</div><div class='add'>+	bus-&gt;write_c45 = sja1105_base_t1_mdio_write_c45;</div><div class='add'>+	bus-&gt;parent = priv-&gt;ds-&gt;dev;</div><div class='add'>+	mdio_priv = bus-&gt;priv;</div><div class='add'>+	mdio_priv-&gt;priv = priv;</div><div class='add'>+</div><div class='add'>+	rc = of_mdiobus_register(bus, np);</div><div class='add'>+	if (rc) {</div><div class='add'>+		mdiobus_free(bus);</div><div class='add'>+		goto out_put_np;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;mdio_base_t1 = bus;</div><div class='add'>+</div><div class='add'>+out_put_np:</div><div class='add'>+	of_node_put(np);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sja1105_mdiobus_base_t1_unregister(struct sja1105_private *priv)</div><div class='add'>+{</div><div class='add'>+	if (!priv-&gt;mdio_base_t1)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mdiobus_unregister(priv-&gt;mdio_base_t1);</div><div class='add'>+	mdiobus_free(priv-&gt;mdio_base_t1);</div><div class='add'>+	priv-&gt;mdio_base_t1 = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_mdiobus_pcs_register(struct sja1105_private *priv)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_mdio_private *mdio_priv;</div><div class='add'>+	struct dsa_switch *ds = priv-&gt;ds;</div><div class='add'>+	struct mii_bus *bus;</div><div class='add'>+	int rc = 0;</div><div class='add'>+	int port;</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;info-&gt;pcs_mdio_read_c45 || !priv-&gt;info-&gt;pcs_mdio_write_c45)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	bus = mdiobus_alloc_size(sizeof(*mdio_priv));</div><div class='add'>+	if (!bus)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	bus-&gt;name = "SJA1105 PCS MDIO bus";</div><div class='add'>+	snprintf(bus-&gt;id, MII_BUS_ID_SIZE, "%s-pcs",</div><div class='add'>+		 dev_name(ds-&gt;dev));</div><div class='add'>+	bus-&gt;read_c45 = priv-&gt;info-&gt;pcs_mdio_read_c45;</div><div class='add'>+	bus-&gt;write_c45 = priv-&gt;info-&gt;pcs_mdio_write_c45;</div><div class='add'>+	bus-&gt;parent = ds-&gt;dev;</div><div class='add'>+	/* There is no PHY on this MDIO bus =&gt; mask out all PHY addresses</div><div class='add'>+	 * from auto probing.</div><div class='add'>+	 */</div><div class='add'>+	bus-&gt;phy_mask = ~0;</div><div class='add'>+	mdio_priv = bus-&gt;priv;</div><div class='add'>+	mdio_priv-&gt;priv = priv;</div><div class='add'>+</div><div class='add'>+	rc = mdiobus_register(bus);</div><div class='add'>+	if (rc) {</div><div class='add'>+		mdiobus_free(bus);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (port = 0; port &lt; ds-&gt;num_ports; port++) {</div><div class='add'>+		struct phylink_pcs *pcs;</div><div class='add'>+</div><div class='add'>+		if (dsa_is_unused_port(ds, port))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (priv-&gt;phy_mode[port] != PHY_INTERFACE_MODE_SGMII &amp;&amp;</div><div class='add'>+		    priv-&gt;phy_mode[port] != PHY_INTERFACE_MODE_2500BASEX)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		pcs = xpcs_create_pcs_mdiodev(bus, port);</div><div class='add'>+		if (IS_ERR(pcs)) {</div><div class='add'>+			rc = PTR_ERR(pcs);</div><div class='add'>+			goto out_pcs_free;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		priv-&gt;pcs[port] = pcs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;mdio_pcs = bus;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+out_pcs_free:</div><div class='add'>+	for (port = 0; port &lt; ds-&gt;num_ports; port++) {</div><div class='add'>+		if (priv-&gt;pcs[port]) {</div><div class='add'>+			xpcs_destroy_pcs(priv-&gt;pcs[port]);</div><div class='add'>+			priv-&gt;pcs[port] = NULL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mdiobus_unregister(bus);</div><div class='add'>+	mdiobus_free(bus);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sja1105_mdiobus_pcs_unregister(struct sja1105_private *priv)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds = priv-&gt;ds;</div><div class='add'>+	int port;</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;mdio_pcs)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (port = 0; port &lt; ds-&gt;num_ports; port++) {</div><div class='add'>+		if (priv-&gt;pcs[port]) {</div><div class='add'>+			xpcs_destroy_pcs(priv-&gt;pcs[port]);</div><div class='add'>+			priv-&gt;pcs[port] = NULL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mdiobus_unregister(priv-&gt;mdio_pcs);</div><div class='add'>+	mdiobus_free(priv-&gt;mdio_pcs);</div><div class='add'>+	priv-&gt;mdio_pcs = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int sja1105_mdiobus_register(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	const struct sja1105_regs *regs = priv-&gt;info-&gt;regs;</div><div class='add'>+	struct device_node *switch_node = ds-&gt;dev-&gt;of_node;</div><div class='add'>+	struct device_node *mdio_node;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_mdiobus_pcs_register(priv);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	mdio_node = of_get_available_child_by_name(switch_node, "mdios");</div><div class='add'>+	if (!mdio_node)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (regs-&gt;mdio_100base_tx != SJA1105_RSV_ADDR) {</div><div class='add'>+		rc = sja1105_mdiobus_base_tx_register(priv, mdio_node);</div><div class='add'>+		if (rc)</div><div class='add'>+			goto err_put_mdio_node;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (regs-&gt;mdio_100base_t1 != SJA1105_RSV_ADDR) {</div><div class='add'>+		rc = sja1105_mdiobus_base_t1_register(priv, mdio_node);</div><div class='add'>+		if (rc)</div><div class='add'>+			goto err_free_base_tx_mdiobus;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	of_node_put(mdio_node);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_base_tx_mdiobus:</div><div class='add'>+	sja1105_mdiobus_base_tx_unregister(priv);</div><div class='add'>+err_put_mdio_node:</div><div class='add'>+	of_node_put(mdio_node);</div><div class='add'>+	sja1105_mdiobus_pcs_unregister(priv);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void sja1105_mdiobus_unregister(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	sja1105_mdiobus_base_t1_unregister(priv);</div><div class='add'>+	sja1105_mdiobus_base_tx_unregister(priv);</div><div class='add'>+	sja1105_mdiobus_pcs_unregister(priv);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/dsa/sja1105/sja1105_ptp.c b/drivers/net/dsa/sja1105/sja1105_ptp.c<br/>new file mode 100644<br/>index 000000000000..fefe46e2a5e6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/sja1105/sja1105_ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/sja1105/sja1105_ptp.c</a></div><div class='hunk'>@@ -0,0 +1,970 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright (c) 2019, Vladimir Oltean &lt;olteanv@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/spi/spi.h&gt;</div><div class='add'>+#include "sja1105.h"</div><div class='add'>+</div><div class='add'>+/* The adjfine API clamps ppb between [-32,768,000, 32,768,000], and</div><div class='add'>+ * therefore scaled_ppm between [-2,147,483,648, 2,147,483,647].</div><div class='add'>+ * Set the maximum supported ppb to a round value smaller than the maximum.</div><div class='add'>+ *</div><div class='add'>+ * Percentually speaking, this is a +/- 0.032x adjustment of the</div><div class='add'>+ * free-running counter (0.968x to 1.032x).</div><div class='add'>+ */</div><div class='add'>+#define SJA1105_MAX_ADJ_PPB		32000000</div><div class='add'>+#define SJA1105_SIZE_PTP_CMD		4</div><div class='add'>+</div><div class='add'>+/* PTPSYNCTS has no interrupt or update mechanism, because the intended</div><div class='add'>+ * hardware use case is for the timestamp to be collected synchronously,</div><div class='add'>+ * immediately after the CAS_MASTER SJA1105 switch has performed a CASSYNC</div><div class='add'>+ * one-shot toggle (no return to level) on the PTP_CLK pin. When used as a</div><div class='add'>+ * generic extts source, the PTPSYNCTS register needs polling and a comparison</div><div class='add'>+ * with the old value. The polling interval is configured as the Nyquist rate</div><div class='add'>+ * of a signal with 50% duty cycle and 1Hz frequency, which is sadly all that</div><div class='add'>+ * this hardware can do (but may be enough for some setups). Anything of higher</div><div class='add'>+ * frequency than 1 Hz will be lost, since there is no timestamp FIFO.</div><div class='add'>+ */</div><div class='add'>+#define SJA1105_EXTTS_INTERVAL		(HZ / 6)</div><div class='add'>+</div><div class='add'>+/*            This range is actually +/- SJA1105_MAX_ADJ_PPB</div><div class='add'>+ *            divided by 1000 (ppb -&gt; ppm) and with a 16-bit</div><div class='add'>+ *            "fractional" part (actually fixed point).</div><div class='add'>+ *                                    |</div><div class='add'>+ *                                    v</div><div class='add'>+ * Convert scaled_ppm from the +/- ((10^6) &lt;&lt; 16) range</div><div class='add'>+ * into the +/- (1 &lt;&lt; 31) range.</div><div class='add'>+ *</div><div class='add'>+ * This forgoes a "ppb" numeric representation (up to NSEC_PER_SEC)</div><div class='add'>+ * and defines the scaling factor between scaled_ppm and the actual</div><div class='add'>+ * frequency adjustments of the PHC.</div><div class='add'>+ *</div><div class='add'>+ *   ptpclkrate = scaled_ppm * 2^31 / (10^6 * 2^16)</div><div class='add'>+ *   simplifies to</div><div class='add'>+ *   ptpclkrate = scaled_ppm * 2^9 / 5^6</div><div class='add'>+ */</div><div class='add'>+#define SJA1105_CC_MULT_NUM		(1 &lt;&lt; 9)</div><div class='add'>+#define SJA1105_CC_MULT_DEM		15625</div><div class='add'>+#define SJA1105_CC_MULT			0x80000000</div><div class='add'>+</div><div class='add'>+enum sja1105_ptp_clk_mode {</div><div class='add'>+	PTP_ADD_MODE = 1,</div><div class='add'>+	PTP_SET_MODE = 0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define extts_to_data(t) \</div><div class='add'>+		container_of((t), struct sja1105_ptp_data, extts_timer)</div><div class='add'>+#define ptp_caps_to_data(d) \</div><div class='add'>+		container_of((d), struct sja1105_ptp_data, caps)</div><div class='add'>+#define ptp_data_to_sja1105(d) \</div><div class='add'>+		container_of((d), struct sja1105_private, ptp_data)</div><div class='add'>+</div><div class='add'>+int sja1105_hwtstamp_set(struct dsa_switch *ds, int port,</div><div class='add'>+			 struct kernel_hwtstamp_config *config,</div><div class='add'>+			 struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	unsigned long hwts_tx_en, hwts_rx_en;</div><div class='add'>+</div><div class='add'>+	hwts_tx_en = priv-&gt;hwts_tx_en;</div><div class='add'>+	hwts_rx_en = priv-&gt;hwts_rx_en;</div><div class='add'>+</div><div class='add'>+	switch (config-&gt;tx_type) {</div><div class='add'>+	case HWTSTAMP_TX_OFF:</div><div class='add'>+		hwts_tx_en &amp;= ~BIT(port);</div><div class='add'>+		break;</div><div class='add'>+	case HWTSTAMP_TX_ON:</div><div class='add'>+		hwts_tx_en |= BIT(port);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (config-&gt;rx_filter) {</div><div class='add'>+	case HWTSTAMP_FILTER_NONE:</div><div class='add'>+		hwts_rx_en &amp;= ~BIT(port);</div><div class='add'>+		break;</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:</div><div class='add'>+		hwts_rx_en |= BIT(port);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;hwts_tx_en = hwts_tx_en;</div><div class='add'>+	priv-&gt;hwts_rx_en = hwts_rx_en;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int sja1105_hwtstamp_get(struct dsa_switch *ds, int port,</div><div class='add'>+			 struct kernel_hwtstamp_config *config)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	config-&gt;flags = 0;</div><div class='add'>+	if (priv-&gt;hwts_tx_en &amp; BIT(port))</div><div class='add'>+		config-&gt;tx_type = HWTSTAMP_TX_ON;</div><div class='add'>+	else</div><div class='add'>+		config-&gt;tx_type = HWTSTAMP_TX_OFF;</div><div class='add'>+	if (priv-&gt;hwts_rx_en &amp; BIT(port))</div><div class='add'>+		config-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT;</div><div class='add'>+	else</div><div class='add'>+		config-&gt;rx_filter = HWTSTAMP_FILTER_NONE;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int sja1105_get_ts_info(struct dsa_switch *ds, int port,</div><div class='add'>+			struct kernel_ethtool_ts_info *info)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	struct sja1105_ptp_data *ptp_data = &amp;priv-&gt;ptp_data;</div><div class='add'>+</div><div class='add'>+	/* Called during cleanup */</div><div class='add'>+	if (!ptp_data-&gt;clock)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	info-&gt;so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE |</div><div class='add'>+				SOF_TIMESTAMPING_RX_HARDWARE |</div><div class='add'>+				SOF_TIMESTAMPING_RAW_HARDWARE;</div><div class='add'>+	info-&gt;tx_types = (1 &lt;&lt; HWTSTAMP_TX_OFF) |</div><div class='add'>+			 (1 &lt;&lt; HWTSTAMP_TX_ON);</div><div class='add'>+	info-&gt;rx_filters = (1 &lt;&lt; HWTSTAMP_FILTER_NONE) |</div><div class='add'>+			   (1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_L2_EVENT);</div><div class='add'>+	info-&gt;phc_index = ptp_clock_index(ptp_data-&gt;clock);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void sja1105et_ptp_cmd_packing(u8 *buf, struct sja1105_ptp_cmd *cmd,</div><div class='add'>+			       enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const int size = SJA1105_SIZE_PTP_CMD;</div><div class='add'>+	/* No need to keep this as part of the structure */</div><div class='add'>+	u64 valid = 1;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;valid,           31, 31, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;ptpstrtsch, 30, 30, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;ptpstopsch, 29, 29, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;startptpcp, 28, 28, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;stopptpcp,  27, 27, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;resptp,      2,  2, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;corrclk4ts,  1,  1, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;ptpclkadd,   0,  0, size, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void sja1105pqrs_ptp_cmd_packing(u8 *buf, struct sja1105_ptp_cmd *cmd,</div><div class='add'>+				 enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const int size = SJA1105_SIZE_PTP_CMD;</div><div class='add'>+	/* No need to keep this as part of the structure */</div><div class='add'>+	u64 valid = 1;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;valid,           31, 31, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;ptpstrtsch, 30, 30, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;ptpstopsch, 29, 29, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;startptpcp, 28, 28, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;stopptpcp,  27, 27, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;resptp,      3,  3, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;corrclk4ts,  2,  2, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;cmd-&gt;ptpclkadd,   0,  0, size, op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int sja1105_ptp_commit(struct dsa_switch *ds, struct sja1105_ptp_cmd *cmd,</div><div class='add'>+		       sja1105_spi_rw_mode_t rw)</div><div class='add'>+{</div><div class='add'>+	const struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	const struct sja1105_regs *regs = priv-&gt;info-&gt;regs;</div><div class='add'>+	u8 buf[SJA1105_SIZE_PTP_CMD] = {0};</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (rw == SPI_WRITE)</div><div class='add'>+		priv-&gt;info-&gt;ptp_cmd_packing(buf, cmd, PACK);</div><div class='add'>+</div><div class='add'>+	rc = sja1105_xfer_buf(priv, rw, regs-&gt;ptp_control, buf,</div><div class='add'>+			      SJA1105_SIZE_PTP_CMD);</div><div class='add'>+</div><div class='add'>+	if (rw == SPI_READ)</div><div class='add'>+		priv-&gt;info-&gt;ptp_cmd_packing(buf, cmd, UNPACK);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The switch returns partial timestamps (24 bits for SJA1105 E/T, which wrap</div><div class='add'>+ * around in 0.135 seconds, and 32 bits for P/Q/R/S, wrapping around in 34.35</div><div class='add'>+ * seconds).</div><div class='add'>+ *</div><div class='add'>+ * This receives the RX or TX MAC timestamps, provided by hardware as</div><div class='add'>+ * the lower bits of the cycle counter, sampled at the time the timestamp was</div><div class='add'>+ * collected.</div><div class='add'>+ *</div><div class='add'>+ * To reconstruct into a full 64-bit-wide timestamp, the cycle counter is</div><div class='add'>+ * read and the high-order bits are filled in.</div><div class='add'>+ *</div><div class='add'>+ * Must be called within one wraparound period of the partial timestamp since</div><div class='add'>+ * it was generated by the MAC.</div><div class='add'>+ */</div><div class='add'>+static u64 sja1105_tstamp_reconstruct(struct dsa_switch *ds, u64 now,</div><div class='add'>+				      u64 ts_partial)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	u64 partial_tstamp_mask = CYCLECOUNTER_MASK(priv-&gt;info-&gt;ptp_ts_bits);</div><div class='add'>+	u64 ts_reconstructed;</div><div class='add'>+</div><div class='add'>+	ts_reconstructed = (now &amp; ~partial_tstamp_mask) | ts_partial;</div><div class='add'>+</div><div class='add'>+	/* Check lower bits of current cycle counter against the timestamp.</div><div class='add'>+	 * If the current cycle counter is lower than the partial timestamp,</div><div class='add'>+	 * then wraparound surely occurred and must be accounted for.</div><div class='add'>+	 */</div><div class='add'>+	if ((now &amp; partial_tstamp_mask) &lt;= ts_partial)</div><div class='add'>+		ts_reconstructed -= (partial_tstamp_mask + 1);</div><div class='add'>+</div><div class='add'>+	return ts_reconstructed;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Reads the SPI interface for an egress timestamp generated by the switch</div><div class='add'>+ * for frames sent using management routes.</div><div class='add'>+ *</div><div class='add'>+ * SJA1105 E/T layout of the 4-byte SPI payload:</div><div class='add'>+ *</div><div class='add'>+ * 31    23    15    7     0</div><div class='add'>+ * |     |     |     |     |</div><div class='add'>+ * +-----+-----+-----+     ^</div><div class='add'>+ *          ^              |</div><div class='add'>+ *          |              |</div><div class='add'>+ *  24-bit timestamp   Update bit</div><div class='add'>+ *</div><div class='add'>+ *</div><div class='add'>+ * SJA1105 P/Q/R/S layout of the 8-byte SPI payload:</div><div class='add'>+ *</div><div class='add'>+ * 31    23    15    7     0     63    55    47    39    32</div><div class='add'>+ * |     |     |     |     |     |     |     |     |     |</div><div class='add'>+ *                         ^     +-----+-----+-----+-----+</div><div class='add'>+ *                         |                 ^</div><div class='add'>+ *                         |                 |</div><div class='add'>+ *                    Update bit    32-bit timestamp</div><div class='add'>+ *</div><div class='add'>+ * Notice that the update bit is in the same place.</div><div class='add'>+ * To have common code for E/T and P/Q/R/S for reading the timestamp,</div><div class='add'>+ * we need to juggle with the offset and the bit indices.</div><div class='add'>+ */</div><div class='add'>+static int sja1105_ptpegr_ts_poll(struct dsa_switch *ds, int port, u64 *ts)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	const struct sja1105_regs *regs = priv-&gt;info-&gt;regs;</div><div class='add'>+	int tstamp_bit_start, tstamp_bit_end;</div><div class='add'>+	int timeout = 10;</div><div class='add'>+	u8 packed_buf[8];</div><div class='add'>+	u64 update;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		rc = sja1105_xfer_buf(priv, SPI_READ, regs-&gt;ptpegr_ts[port],</div><div class='add'>+				      packed_buf, priv-&gt;info-&gt;ptpegr_ts_bytes);</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			return rc;</div><div class='add'>+</div><div class='add'>+		sja1105_unpack(packed_buf, &amp;update, 0, 0,</div><div class='add'>+			       priv-&gt;info-&gt;ptpegr_ts_bytes);</div><div class='add'>+		if (update)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		usleep_range(10, 50);</div><div class='add'>+	} while (--timeout);</div><div class='add'>+</div><div class='add'>+	if (!timeout)</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+	/* Point the end bit to the second 32-bit word on P/Q/R/S,</div><div class='add'>+	 * no-op on E/T.</div><div class='add'>+	 */</div><div class='add'>+	tstamp_bit_end = (priv-&gt;info-&gt;ptpegr_ts_bytes - 4) * 8;</div><div class='add'>+	/* Shift the 24-bit timestamp on E/T to be collected from 31:8.</div><div class='add'>+	 * No-op on P/Q/R/S.</div><div class='add'>+	 */</div><div class='add'>+	tstamp_bit_end += 32 - priv-&gt;info-&gt;ptp_ts_bits;</div><div class='add'>+	tstamp_bit_start = tstamp_bit_end + priv-&gt;info-&gt;ptp_ts_bits - 1;</div><div class='add'>+</div><div class='add'>+	*ts = 0;</div><div class='add'>+</div><div class='add'>+	sja1105_unpack(packed_buf, ts, tstamp_bit_start, tstamp_bit_end,</div><div class='add'>+		       priv-&gt;info-&gt;ptpegr_ts_bytes);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Caller must hold ptp_data-&gt;lock */</div><div class='add'>+static int sja1105_ptpclkval_read(struct sja1105_private *priv, u64 *ticks,</div><div class='add'>+				  struct ptp_system_timestamp *ptp_sts)</div><div class='add'>+{</div><div class='add'>+	const struct sja1105_regs *regs = priv-&gt;info-&gt;regs;</div><div class='add'>+</div><div class='add'>+	return sja1105_xfer_u64(priv, SPI_READ, regs-&gt;ptpclkval, ticks,</div><div class='add'>+				ptp_sts);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Caller must hold ptp_data-&gt;lock */</div><div class='add'>+static int sja1105_ptpclkval_write(struct sja1105_private *priv, u64 ticks,</div><div class='add'>+				   struct ptp_system_timestamp *ptp_sts)</div><div class='add'>+{</div><div class='add'>+	const struct sja1105_regs *regs = priv-&gt;info-&gt;regs;</div><div class='add'>+</div><div class='add'>+	return sja1105_xfer_u64(priv, SPI_WRITE, regs-&gt;ptpclkval, &amp;ticks,</div><div class='add'>+				ptp_sts);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sja1105_extts_poll(struct sja1105_private *priv)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_ptp_data *ptp_data = &amp;priv-&gt;ptp_data;</div><div class='add'>+	const struct sja1105_regs *regs = priv-&gt;info-&gt;regs;</div><div class='add'>+	struct ptp_clock_event event;</div><div class='add'>+	u64 ptpsyncts = 0;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_xfer_u64(priv, SPI_READ, regs-&gt;ptpsyncts, &amp;ptpsyncts,</div><div class='add'>+			      NULL);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		dev_err_ratelimited(priv-&gt;ds-&gt;dev,</div><div class='add'>+				    "Failed to read PTPSYNCTS: %d\n", rc);</div><div class='add'>+</div><div class='add'>+	if (ptpsyncts &amp;&amp; ptp_data-&gt;ptpsyncts != ptpsyncts) {</div><div class='add'>+		event.index = 0;</div><div class='add'>+		event.type = PTP_CLOCK_EXTTS;</div><div class='add'>+		event.timestamp = ns_to_ktime(sja1105_ticks_to_ns(ptpsyncts));</div><div class='add'>+		ptp_clock_event(ptp_data-&gt;clock, &amp;event);</div><div class='add'>+</div><div class='add'>+		ptp_data-&gt;ptpsyncts = ptpsyncts;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static long sja1105_rxtstamp_work(struct ptp_clock_info *ptp)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_ptp_data *ptp_data = ptp_caps_to_data(ptp);</div><div class='add'>+	struct sja1105_private *priv = ptp_data_to_sja1105(ptp_data);</div><div class='add'>+	struct dsa_switch *ds = priv-&gt;ds;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ptp_data-&gt;lock);</div><div class='add'>+</div><div class='add'>+	while ((skb = skb_dequeue(&amp;ptp_data-&gt;skb_rxtstamp_queue)) != NULL) {</div><div class='add'>+		struct skb_shared_hwtstamps *shwt = skb_hwtstamps(skb);</div><div class='add'>+		u64 ticks, ts;</div><div class='add'>+		int rc;</div><div class='add'>+</div><div class='add'>+		rc = sja1105_ptpclkval_read(priv, &amp;ticks, NULL);</div><div class='add'>+		if (rc &lt; 0) {</div><div class='add'>+			dev_err(ds-&gt;dev, "Failed to read PTP clock: %d\n", rc);</div><div class='add'>+			kfree_skb(skb);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		*shwt = (struct skb_shared_hwtstamps) {0};</div><div class='add'>+</div><div class='add'>+		ts = SJA1105_SKB_CB(skb)-&gt;tstamp;</div><div class='add'>+		ts = sja1105_tstamp_reconstruct(ds, ticks, ts);</div><div class='add'>+</div><div class='add'>+		shwt-&gt;hwtstamp = ns_to_ktime(sja1105_ticks_to_ns(ts));</div><div class='add'>+		netif_rx(skb);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ptp_data-&gt;extts_enabled)</div><div class='add'>+		sja1105_extts_poll(priv);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;ptp_data-&gt;lock);</div><div class='add'>+</div><div class='add'>+	/* Don't restart */</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool sja1105_rxtstamp(struct dsa_switch *ds, int port, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	struct sja1105_ptp_data *ptp_data = &amp;priv-&gt;ptp_data;</div><div class='add'>+</div><div class='add'>+	if (!(priv-&gt;hwts_rx_en &amp; BIT(port)))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* We need to read the full PTP clock to reconstruct the Rx</div><div class='add'>+	 * timestamp. For that we need a sleepable context.</div><div class='add'>+	 */</div><div class='add'>+	skb_queue_tail(&amp;ptp_data-&gt;skb_rxtstamp_queue, skb);</div><div class='add'>+	ptp_schedule_worker(ptp_data-&gt;clock, 0);</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool sja1110_rxtstamp(struct dsa_switch *ds, int port, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct skb_shared_hwtstamps *shwt = skb_hwtstamps(skb);</div><div class='add'>+	u64 ts = SJA1105_SKB_CB(skb)-&gt;tstamp;</div><div class='add'>+</div><div class='add'>+	*shwt = (struct skb_shared_hwtstamps) {0};</div><div class='add'>+</div><div class='add'>+	shwt-&gt;hwtstamp = ns_to_ktime(sja1105_ticks_to_ns(ts));</div><div class='add'>+</div><div class='add'>+	/* Don't defer */</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Called from dsa_skb_defer_rx_timestamp */</div><div class='add'>+bool sja1105_port_rxtstamp(struct dsa_switch *ds, int port,</div><div class='add'>+			   struct sk_buff *skb, unsigned int type)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return priv-&gt;info-&gt;rxtstamp(ds, port, skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void sja1110_process_meta_tstamp(struct dsa_switch *ds, int port, u8 ts_id,</div><div class='add'>+				 enum sja1110_meta_tstamp dir, u64 tstamp)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	struct sja1105_ptp_data *ptp_data = &amp;priv-&gt;ptp_data;</div><div class='add'>+	struct sk_buff *skb, *skb_tmp, *skb_match = NULL;</div><div class='add'>+	struct skb_shared_hwtstamps shwt = {0};</div><div class='add'>+</div><div class='add'>+	/* We don't care about RX timestamps on the CPU port */</div><div class='add'>+	if (dir == SJA1110_META_TSTAMP_RX)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;ptp_data-&gt;skb_txtstamp_queue.lock);</div><div class='add'>+</div><div class='add'>+	skb_queue_walk_safe(&amp;ptp_data-&gt;skb_txtstamp_queue, skb, skb_tmp) {</div><div class='add'>+		if (SJA1105_SKB_CB(skb)-&gt;ts_id != ts_id)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		__skb_unlink(skb, &amp;ptp_data-&gt;skb_txtstamp_queue);</div><div class='add'>+		skb_match = skb;</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_unlock(&amp;ptp_data-&gt;skb_txtstamp_queue.lock);</div><div class='add'>+</div><div class='add'>+	if (WARN_ON(!skb_match))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	shwt.hwtstamp = ns_to_ktime(sja1105_ticks_to_ns(tstamp));</div><div class='add'>+	skb_complete_tx_timestamp(skb_match, &amp;shwt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* In addition to cloning the skb which is done by the common</div><div class='add'>+ * sja1105_port_txtstamp, we need to generate a timestamp ID and save the</div><div class='add'>+ * packet to the TX timestamping queue.</div><div class='add'>+ */</div><div class='add'>+void sja1110_txtstamp(struct dsa_switch *ds, int port, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *clone = SJA1105_SKB_CB(skb)-&gt;clone;</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	struct sja1105_ptp_data *ptp_data = &amp;priv-&gt;ptp_data;</div><div class='add'>+	u8 ts_id;</div><div class='add'>+</div><div class='add'>+	skb_shinfo(skb)-&gt;tx_flags |= SKBTX_IN_PROGRESS;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;priv-&gt;ts_id_lock);</div><div class='add'>+</div><div class='add'>+	ts_id = priv-&gt;ts_id;</div><div class='add'>+	/* Deal automatically with 8-bit wraparound */</div><div class='add'>+	priv-&gt;ts_id++;</div><div class='add'>+</div><div class='add'>+	SJA1105_SKB_CB(clone)-&gt;ts_id = ts_id;</div><div class='add'>+</div><div class='add'>+	spin_unlock(&amp;priv-&gt;ts_id_lock);</div><div class='add'>+</div><div class='add'>+	skb_queue_tail(&amp;ptp_data-&gt;skb_txtstamp_queue, clone);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Called from dsa_skb_tx_timestamp. This callback is just to clone</div><div class='add'>+ * the skb and have it available in SJA1105_SKB_CB in the .port_deferred_xmit</div><div class='add'>+ * callback, where we will timestamp it synchronously.</div><div class='add'>+ */</div><div class='add'>+void sja1105_port_txtstamp(struct dsa_switch *ds, int port, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	struct sk_buff *clone;</div><div class='add'>+</div><div class='add'>+	if (!(priv-&gt;hwts_tx_en &amp; BIT(port)))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	clone = skb_clone_sk(skb);</div><div class='add'>+	if (!clone)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	SJA1105_SKB_CB(skb)-&gt;clone = clone;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;info-&gt;txtstamp)</div><div class='add'>+		priv-&gt;info-&gt;txtstamp(ds, port, skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_ptp_reset(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	struct sja1105_ptp_data *ptp_data = &amp;priv-&gt;ptp_data;</div><div class='add'>+	struct sja1105_ptp_cmd cmd = ptp_data-&gt;cmd;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ptp_data-&gt;lock);</div><div class='add'>+</div><div class='add'>+	cmd.resptp = 1;</div><div class='add'>+</div><div class='add'>+	dev_dbg(ds-&gt;dev, "Resetting PTP clock\n");</div><div class='add'>+	rc = sja1105_ptp_commit(ds, &amp;cmd, SPI_WRITE);</div><div class='add'>+</div><div class='add'>+	sja1105_tas_clockstep(priv-&gt;ds);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;ptp_data-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Caller must hold ptp_data-&gt;lock */</div><div class='add'>+int __sja1105_ptp_gettimex(struct dsa_switch *ds, u64 *ns,</div><div class='add'>+			   struct ptp_system_timestamp *ptp_sts)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	u64 ticks;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_ptpclkval_read(priv, &amp;ticks, ptp_sts);</div><div class='add'>+	if (rc &lt; 0) {</div><div class='add'>+		dev_err(ds-&gt;dev, "Failed to read PTP clock: %d\n", rc);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*ns = sja1105_ticks_to_ns(ticks);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_ptp_gettimex(struct ptp_clock_info *ptp,</div><div class='add'>+				struct timespec64 *ts,</div><div class='add'>+				struct ptp_system_timestamp *ptp_sts)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_ptp_data *ptp_data = ptp_caps_to_data(ptp);</div><div class='add'>+	struct sja1105_private *priv = ptp_data_to_sja1105(ptp_data);</div><div class='add'>+	u64 now = 0;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ptp_data-&gt;lock);</div><div class='add'>+</div><div class='add'>+	rc = __sja1105_ptp_gettimex(priv-&gt;ds, &amp;now, ptp_sts);</div><div class='add'>+	*ts = ns_to_timespec64(now);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;ptp_data-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Caller must hold ptp_data-&gt;lock */</div><div class='add'>+static int sja1105_ptp_mode_set(struct sja1105_private *priv,</div><div class='add'>+				enum sja1105_ptp_clk_mode mode)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_ptp_data *ptp_data = &amp;priv-&gt;ptp_data;</div><div class='add'>+</div><div class='add'>+	if (ptp_data-&gt;cmd.ptpclkadd == mode)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ptp_data-&gt;cmd.ptpclkadd = mode;</div><div class='add'>+</div><div class='add'>+	return sja1105_ptp_commit(priv-&gt;ds, &amp;ptp_data-&gt;cmd, SPI_WRITE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Write to PTPCLKVAL while PTPCLKADD is 0 */</div><div class='add'>+int __sja1105_ptp_settime(struct dsa_switch *ds, u64 ns,</div><div class='add'>+			  struct ptp_system_timestamp *ptp_sts)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	u64 ticks = ns_to_sja1105_ticks(ns);</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_ptp_mode_set(priv, PTP_SET_MODE);</div><div class='add'>+	if (rc &lt; 0) {</div><div class='add'>+		dev_err(priv-&gt;ds-&gt;dev, "Failed to put PTPCLK in set mode\n");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = sja1105_ptpclkval_write(priv, ticks, ptp_sts);</div><div class='add'>+</div><div class='add'>+	sja1105_tas_clockstep(priv-&gt;ds);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_ptp_settime(struct ptp_clock_info *ptp,</div><div class='add'>+			       const struct timespec64 *ts)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_ptp_data *ptp_data = ptp_caps_to_data(ptp);</div><div class='add'>+	struct sja1105_private *priv = ptp_data_to_sja1105(ptp_data);</div><div class='add'>+	u64 ns = timespec64_to_ns(ts);</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ptp_data-&gt;lock);</div><div class='add'>+</div><div class='add'>+	rc = __sja1105_ptp_settime(priv-&gt;ds, ns, NULL);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;ptp_data-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_ptp_data *ptp_data = ptp_caps_to_data(ptp);</div><div class='add'>+	struct sja1105_private *priv = ptp_data_to_sja1105(ptp_data);</div><div class='add'>+	const struct sja1105_regs *regs = priv-&gt;info-&gt;regs;</div><div class='add'>+	u32 clkrate32;</div><div class='add'>+	s64 clkrate;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	clkrate = (s64)scaled_ppm * SJA1105_CC_MULT_NUM;</div><div class='add'>+	clkrate = div_s64(clkrate, SJA1105_CC_MULT_DEM);</div><div class='add'>+</div><div class='add'>+	/* Take a +/- value and re-center it around 2^31. */</div><div class='add'>+	clkrate = SJA1105_CC_MULT + clkrate;</div><div class='add'>+	WARN_ON(abs(clkrate) &gt;= GENMASK_ULL(31, 0));</div><div class='add'>+	clkrate32 = clkrate;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ptp_data-&gt;lock);</div><div class='add'>+</div><div class='add'>+	rc = sja1105_xfer_u32(priv, SPI_WRITE, regs-&gt;ptpclkrate, &amp;clkrate32,</div><div class='add'>+			      NULL);</div><div class='add'>+</div><div class='add'>+	sja1105_tas_adjfreq(priv-&gt;ds);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;ptp_data-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Write to PTPCLKVAL while PTPCLKADD is 1 */</div><div class='add'>+int __sja1105_ptp_adjtime(struct dsa_switch *ds, s64 delta)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	s64 ticks = ns_to_sja1105_ticks(delta);</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_ptp_mode_set(priv, PTP_ADD_MODE);</div><div class='add'>+	if (rc &lt; 0) {</div><div class='add'>+		dev_err(priv-&gt;ds-&gt;dev, "Failed to put PTPCLK in add mode\n");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = sja1105_ptpclkval_write(priv, ticks, NULL);</div><div class='add'>+</div><div class='add'>+	sja1105_tas_clockstep(priv-&gt;ds);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_ptp_data *ptp_data = ptp_caps_to_data(ptp);</div><div class='add'>+	struct sja1105_private *priv = ptp_data_to_sja1105(ptp_data);</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ptp_data-&gt;lock);</div><div class='add'>+</div><div class='add'>+	rc = __sja1105_ptp_adjtime(priv-&gt;ds, delta);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;ptp_data-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sja1105_ptp_extts_setup_timer(struct sja1105_ptp_data *ptp_data)</div><div class='add'>+{</div><div class='add'>+	unsigned long expires = ((jiffies / SJA1105_EXTTS_INTERVAL) + 1) *</div><div class='add'>+				SJA1105_EXTTS_INTERVAL;</div><div class='add'>+</div><div class='add'>+	mod_timer(&amp;ptp_data-&gt;extts_timer, expires);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sja1105_ptp_extts_timer(struct timer_list *t)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_ptp_data *ptp_data = extts_to_data(t);</div><div class='add'>+</div><div class='add'>+	ptp_schedule_worker(ptp_data-&gt;clock, 0);</div><div class='add'>+</div><div class='add'>+	sja1105_ptp_extts_setup_timer(ptp_data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_change_ptp_clk_pin_func(struct sja1105_private *priv,</div><div class='add'>+					   enum ptp_pin_function func)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_avb_params_entry *avb;</div><div class='add'>+	enum ptp_pin_function old_func;</div><div class='add'>+</div><div class='add'>+	avb = priv-&gt;static_config.tables[BLK_IDX_AVB_PARAMS].entries;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;info-&gt;device_id == SJA1105E_DEVICE_ID ||</div><div class='add'>+	    priv-&gt;info-&gt;device_id == SJA1105T_DEVICE_ID ||</div><div class='add'>+	    avb-&gt;cas_master)</div><div class='add'>+		old_func = PTP_PF_PEROUT;</div><div class='add'>+	else</div><div class='add'>+		old_func = PTP_PF_EXTTS;</div><div class='add'>+</div><div class='add'>+	if (func == old_func)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	avb-&gt;cas_master = (func == PTP_PF_PEROUT);</div><div class='add'>+</div><div class='add'>+	return sja1105_dynamic_config_write(priv, BLK_IDX_AVB_PARAMS, 0, avb,</div><div class='add'>+					    true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The PTP_CLK pin may be configured to toggle with a 50% duty cycle and a</div><div class='add'>+ * frequency f:</div><div class='add'>+ *</div><div class='add'>+ *           NSEC_PER_SEC</div><div class='add'>+ * f = ----------------------</div><div class='add'>+ *     (PTPPINDUR * 8 ns) * 2</div><div class='add'>+ */</div><div class='add'>+static int sja1105_per_out_enable(struct sja1105_private *priv,</div><div class='add'>+				  struct ptp_perout_request *perout,</div><div class='add'>+				  bool on)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_ptp_data *ptp_data = &amp;priv-&gt;ptp_data;</div><div class='add'>+	const struct sja1105_regs *regs = priv-&gt;info-&gt;regs;</div><div class='add'>+	struct sja1105_ptp_cmd cmd = ptp_data-&gt;cmd;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	/* We only support one channel */</div><div class='add'>+	if (perout-&gt;index != 0)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ptp_data-&gt;lock);</div><div class='add'>+</div><div class='add'>+	rc = sja1105_change_ptp_clk_pin_func(priv, PTP_PF_PEROUT);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (on) {</div><div class='add'>+		struct timespec64 pin_duration_ts = {</div><div class='add'>+			.tv_sec = perout-&gt;period.sec,</div><div class='add'>+			.tv_nsec = perout-&gt;period.nsec,</div><div class='add'>+		};</div><div class='add'>+		struct timespec64 pin_start_ts = {</div><div class='add'>+			.tv_sec = perout-&gt;start.sec,</div><div class='add'>+			.tv_nsec = perout-&gt;start.nsec,</div><div class='add'>+		};</div><div class='add'>+		u64 pin_duration = timespec64_to_ns(&amp;pin_duration_ts);</div><div class='add'>+		u64 pin_start = timespec64_to_ns(&amp;pin_start_ts);</div><div class='add'>+		u32 pin_duration32;</div><div class='add'>+		u64 now;</div><div class='add'>+</div><div class='add'>+		/* ptppindur: 32 bit register which holds the interval between</div><div class='add'>+		 * 2 edges on PTP_CLK. So check for truncation which happens</div><div class='add'>+		 * at periods larger than around 68.7 seconds.</div><div class='add'>+		 */</div><div class='add'>+		pin_duration = ns_to_sja1105_ticks(pin_duration / 2);</div><div class='add'>+		if (pin_duration &gt; U32_MAX) {</div><div class='add'>+			rc = -ERANGE;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+		pin_duration32 = pin_duration;</div><div class='add'>+</div><div class='add'>+		/* ptppins: 64 bit register which needs to hold a PTP time</div><div class='add'>+		 * larger than the current time, otherwise the startptpcp</div><div class='add'>+		 * command won't do anything. So advance the current time</div><div class='add'>+		 * by a number of periods in a way that won't alter the</div><div class='add'>+		 * phase offset.</div><div class='add'>+		 */</div><div class='add'>+		rc = __sja1105_ptp_gettimex(priv-&gt;ds, &amp;now, NULL);</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		pin_start = future_base_time(pin_start, pin_duration,</div><div class='add'>+					     now + 1ull * NSEC_PER_SEC);</div><div class='add'>+		pin_start = ns_to_sja1105_ticks(pin_start);</div><div class='add'>+</div><div class='add'>+		rc = sja1105_xfer_u64(priv, SPI_WRITE, regs-&gt;ptppinst,</div><div class='add'>+				      &amp;pin_start, NULL);</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		rc = sja1105_xfer_u32(priv, SPI_WRITE, regs-&gt;ptppindur,</div><div class='add'>+				      &amp;pin_duration32, NULL);</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (on)</div><div class='add'>+		cmd.startptpcp = true;</div><div class='add'>+	else</div><div class='add'>+		cmd.stopptpcp = true;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_ptp_commit(priv-&gt;ds, &amp;cmd, SPI_WRITE);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;ptp_data-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_extts_enable(struct sja1105_private *priv,</div><div class='add'>+				struct ptp_extts_request *extts,</div><div class='add'>+				bool on)</div><div class='add'>+{</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	/* We only support one channel */</div><div class='add'>+	if (extts-&gt;index != 0)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	/* We can only enable time stamping on both edges, sadly. */</div><div class='add'>+	if ((extts-&gt;flags &amp; PTP_STRICT_FLAGS) &amp;&amp;</div><div class='add'>+	    (extts-&gt;flags &amp; PTP_ENABLE_FEATURE) &amp;&amp;</div><div class='add'>+	    (extts-&gt;flags &amp; PTP_EXTTS_EDGES) != PTP_EXTTS_EDGES)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_change_ptp_clk_pin_func(priv, PTP_PF_EXTTS);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	priv-&gt;ptp_data.extts_enabled = on;</div><div class='add'>+</div><div class='add'>+	if (on)</div><div class='add'>+		sja1105_ptp_extts_setup_timer(&amp;priv-&gt;ptp_data);</div><div class='add'>+	else</div><div class='add'>+		timer_delete_sync(&amp;priv-&gt;ptp_data.extts_timer);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_ptp_enable(struct ptp_clock_info *ptp,</div><div class='add'>+			      struct ptp_clock_request *req, int on)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_ptp_data *ptp_data = ptp_caps_to_data(ptp);</div><div class='add'>+	struct sja1105_private *priv = ptp_data_to_sja1105(ptp_data);</div><div class='add'>+	int rc = -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (req-&gt;type == PTP_CLK_REQ_PEROUT)</div><div class='add'>+		rc = sja1105_per_out_enable(priv, &amp;req-&gt;perout, on);</div><div class='add'>+	else if (req-&gt;type == PTP_CLK_REQ_EXTTS)</div><div class='add'>+		rc = sja1105_extts_enable(priv, &amp;req-&gt;extts, on);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_ptp_verify_pin(struct ptp_clock_info *ptp, unsigned int pin,</div><div class='add'>+				  enum ptp_pin_function func, unsigned int chan)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_ptp_data *ptp_data = ptp_caps_to_data(ptp);</div><div class='add'>+	struct sja1105_private *priv = ptp_data_to_sja1105(ptp_data);</div><div class='add'>+</div><div class='add'>+	if (chan != 0 || pin != 0)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	switch (func) {</div><div class='add'>+	case PTP_PF_NONE:</div><div class='add'>+	case PTP_PF_PEROUT:</div><div class='add'>+		break;</div><div class='add'>+	case PTP_PF_EXTTS:</div><div class='add'>+		if (priv-&gt;info-&gt;device_id == SJA1105E_DEVICE_ID ||</div><div class='add'>+		    priv-&gt;info-&gt;device_id == SJA1105T_DEVICE_ID)</div><div class='add'>+			return -1;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct ptp_pin_desc sja1105_ptp_pin = {</div><div class='add'>+	.name = "ptp_clk",</div><div class='add'>+	.index = 0,</div><div class='add'>+	.func = PTP_PF_NONE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int sja1105_ptp_clock_register(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	struct sja1105_ptp_data *ptp_data = &amp;priv-&gt;ptp_data;</div><div class='add'>+</div><div class='add'>+	ptp_data-&gt;caps = (struct ptp_clock_info) {</div><div class='add'>+		.owner		= THIS_MODULE,</div><div class='add'>+		.name		= "SJA1105 PHC",</div><div class='add'>+		.adjfine	= sja1105_ptp_adjfine,</div><div class='add'>+		.adjtime	= sja1105_ptp_adjtime,</div><div class='add'>+		.gettimex64	= sja1105_ptp_gettimex,</div><div class='add'>+		.settime64	= sja1105_ptp_settime,</div><div class='add'>+		.enable		= sja1105_ptp_enable,</div><div class='add'>+		.verify		= sja1105_ptp_verify_pin,</div><div class='add'>+		.do_aux_work	= sja1105_rxtstamp_work,</div><div class='add'>+		.max_adj	= SJA1105_MAX_ADJ_PPB,</div><div class='add'>+		.pin_config	= &amp;sja1105_ptp_pin,</div><div class='add'>+		.n_pins		= 1,</div><div class='add'>+		.n_ext_ts	= 1,</div><div class='add'>+		.n_per_out	= 1,</div><div class='add'>+		.supported_extts_flags = PTP_RISING_EDGE |</div><div class='add'>+					 PTP_FALLING_EDGE |</div><div class='add'>+					 PTP_STRICT_FLAGS,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* Only used on SJA1105 */</div><div class='add'>+	skb_queue_head_init(&amp;ptp_data-&gt;skb_rxtstamp_queue);</div><div class='add'>+	/* Only used on SJA1110 */</div><div class='add'>+	skb_queue_head_init(&amp;ptp_data-&gt;skb_txtstamp_queue);</div><div class='add'>+</div><div class='add'>+	ptp_data-&gt;clock = ptp_clock_register(&amp;ptp_data-&gt;caps, ds-&gt;dev);</div><div class='add'>+	if (IS_ERR_OR_NULL(ptp_data-&gt;clock))</div><div class='add'>+		return PTR_ERR(ptp_data-&gt;clock);</div><div class='add'>+</div><div class='add'>+	ptp_data-&gt;cmd.corrclk4ts = true;</div><div class='add'>+	ptp_data-&gt;cmd.ptpclkadd = PTP_SET_MODE;</div><div class='add'>+</div><div class='add'>+	timer_setup(&amp;ptp_data-&gt;extts_timer, sja1105_ptp_extts_timer, 0);</div><div class='add'>+</div><div class='add'>+	return sja1105_ptp_reset(ds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void sja1105_ptp_clock_unregister(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	struct sja1105_ptp_data *ptp_data = &amp;priv-&gt;ptp_data;</div><div class='add'>+</div><div class='add'>+	if (IS_ERR_OR_NULL(ptp_data-&gt;clock))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	timer_delete_sync(&amp;ptp_data-&gt;extts_timer);</div><div class='add'>+	ptp_cancel_worker_sync(ptp_data-&gt;clock);</div><div class='add'>+	skb_queue_purge(&amp;ptp_data-&gt;skb_txtstamp_queue);</div><div class='add'>+	skb_queue_purge(&amp;ptp_data-&gt;skb_rxtstamp_queue);</div><div class='add'>+	ptp_clock_unregister(ptp_data-&gt;clock);</div><div class='add'>+	ptp_data-&gt;clock = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void sja1105_ptp_txtstamp_skb(struct dsa_switch *ds, int port,</div><div class='add'>+			      struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	struct sja1105_ptp_data *ptp_data = &amp;priv-&gt;ptp_data;</div><div class='add'>+	struct skb_shared_hwtstamps shwt = {0};</div><div class='add'>+	u64 ticks, ts;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	skb_shinfo(skb)-&gt;tx_flags |= SKBTX_IN_PROGRESS;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ptp_data-&gt;lock);</div><div class='add'>+</div><div class='add'>+	rc = sja1105_ptpegr_ts_poll(ds, port, &amp;ts);</div><div class='add'>+	if (rc &lt; 0) {</div><div class='add'>+		dev_err(ds-&gt;dev, "timed out polling for tstamp\n");</div><div class='add'>+		kfree_skb(skb);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = sja1105_ptpclkval_read(priv, &amp;ticks, NULL);</div><div class='add'>+	if (rc &lt; 0) {</div><div class='add'>+		dev_err(ds-&gt;dev, "Failed to read PTP clock: %d\n", rc);</div><div class='add'>+		kfree_skb(skb);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ts = sja1105_tstamp_reconstruct(ds, ticks, ts);</div><div class='add'>+</div><div class='add'>+	shwt.hwtstamp = ns_to_ktime(sja1105_ticks_to_ns(ts));</div><div class='add'>+	skb_complete_tx_timestamp(skb, &amp;shwt);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;ptp_data-&gt;lock);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/dsa/sja1105/sja1105_ptp.h b/drivers/net/dsa/sja1105/sja1105_ptp.h<br/>new file mode 100644<br/>index 000000000000..325e3777ea07<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/sja1105/sja1105_ptp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/sja1105/sja1105_ptp.h</a></div><div class='hunk'>@@ -0,0 +1,210 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) 2019, Vladimir Oltean &lt;olteanv@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+#ifndef _SJA1105_PTP_H</div><div class='add'>+#define _SJA1105_PTP_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/timer.h&gt;</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_NET_DSA_SJA1105_PTP)</div><div class='add'>+</div><div class='add'>+/* Timestamps are in units of 8 ns clock ticks (equivalent to</div><div class='add'>+ * a fixed 125 MHz clock).</div><div class='add'>+ */</div><div class='add'>+#define SJA1105_TICK_NS			8</div><div class='add'>+</div><div class='add'>+static inline s64 ns_to_sja1105_ticks(s64 ns)</div><div class='add'>+{</div><div class='add'>+	return ns / SJA1105_TICK_NS;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline s64 sja1105_ticks_to_ns(s64 ticks)</div><div class='add'>+{</div><div class='add'>+	return ticks * SJA1105_TICK_NS;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Calculate the first base_time in the future that satisfies this</div><div class='add'>+ * relationship:</div><div class='add'>+ *</div><div class='add'>+ * future_base_time = base_time + N x cycle_time &gt;= now, or</div><div class='add'>+ *</div><div class='add'>+ *      now - base_time</div><div class='add'>+ * N &gt;= ---------------</div><div class='add'>+ *         cycle_time</div><div class='add'>+ *</div><div class='add'>+ * Because N is an integer, the ceiling value of the above "a / b" ratio</div><div class='add'>+ * is in fact precisely the floor value of "(a + b - 1) / b", which is</div><div class='add'>+ * easier to calculate only having integer division tools.</div><div class='add'>+ */</div><div class='add'>+static inline s64 future_base_time(s64 base_time, s64 cycle_time, s64 now)</div><div class='add'>+{</div><div class='add'>+	s64 a, b, n;</div><div class='add'>+</div><div class='add'>+	if (base_time &gt;= now)</div><div class='add'>+		return base_time;</div><div class='add'>+</div><div class='add'>+	a = now - base_time;</div><div class='add'>+	b = cycle_time;</div><div class='add'>+	n = div_s64(a + b - 1, b);</div><div class='add'>+</div><div class='add'>+	return base_time + n * cycle_time;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This is not a preprocessor macro because the "ns" argument may or may not be</div><div class='add'>+ * s64 at caller side. This ensures it is properly type-cast before div_s64.</div><div class='add'>+ */</div><div class='add'>+static inline s64 ns_to_sja1105_delta(s64 ns)</div><div class='add'>+{</div><div class='add'>+	return div_s64(ns, 200);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline s64 sja1105_delta_to_ns(s64 delta)</div><div class='add'>+{</div><div class='add'>+	return delta * 200;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct sja1105_ptp_cmd {</div><div class='add'>+	u64 startptpcp;		/* start toggling PTP_CLK pin */</div><div class='add'>+	u64 stopptpcp;		/* stop toggling PTP_CLK pin */</div><div class='add'>+	u64 ptpstrtsch;		/* start schedule */</div><div class='add'>+	u64 ptpstopsch;		/* stop schedule */</div><div class='add'>+	u64 resptp;		/* reset */</div><div class='add'>+	u64 corrclk4ts;		/* use the corrected clock for timestamps */</div><div class='add'>+	u64 ptpclkadd;		/* enum sja1105_ptp_clk_mode */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1105_ptp_data {</div><div class='add'>+	struct timer_list extts_timer;</div><div class='add'>+	/* Used only on SJA1105 to reconstruct partial timestamps */</div><div class='add'>+	struct sk_buff_head skb_rxtstamp_queue;</div><div class='add'>+	/* Used on SJA1110 where meta frames are generated only for</div><div class='add'>+	 * 2-step TX timestamps</div><div class='add'>+	 */</div><div class='add'>+	struct sk_buff_head skb_txtstamp_queue;</div><div class='add'>+	struct ptp_clock_info caps;</div><div class='add'>+	struct ptp_clock *clock;</div><div class='add'>+	struct sja1105_ptp_cmd cmd;</div><div class='add'>+	/* Serializes all operations on the PTP hardware clock */</div><div class='add'>+	struct mutex lock;</div><div class='add'>+	bool extts_enabled;</div><div class='add'>+	u64 ptpsyncts;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int sja1105_ptp_clock_register(struct dsa_switch *ds);</div><div class='add'>+</div><div class='add'>+void sja1105_ptp_clock_unregister(struct dsa_switch *ds);</div><div class='add'>+</div><div class='add'>+void sja1105et_ptp_cmd_packing(u8 *buf, struct sja1105_ptp_cmd *cmd,</div><div class='add'>+			       enum packing_op op);</div><div class='add'>+</div><div class='add'>+void sja1105pqrs_ptp_cmd_packing(u8 *buf, struct sja1105_ptp_cmd *cmd,</div><div class='add'>+				 enum packing_op op);</div><div class='add'>+</div><div class='add'>+int sja1105_get_ts_info(struct dsa_switch *ds, int port,</div><div class='add'>+			struct kernel_ethtool_ts_info *ts);</div><div class='add'>+</div><div class='add'>+void sja1105_ptp_txtstamp_skb(struct dsa_switch *ds, int slot,</div><div class='add'>+			      struct sk_buff *clone);</div><div class='add'>+</div><div class='add'>+bool sja1105_port_rxtstamp(struct dsa_switch *ds, int port,</div><div class='add'>+			   struct sk_buff *skb, unsigned int type);</div><div class='add'>+</div><div class='add'>+void sja1105_port_txtstamp(struct dsa_switch *ds, int port,</div><div class='add'>+			   struct sk_buff *skb);</div><div class='add'>+</div><div class='add'>+int sja1105_hwtstamp_get(struct dsa_switch *ds, int port,</div><div class='add'>+			 struct kernel_hwtstamp_config *config);</div><div class='add'>+</div><div class='add'>+int sja1105_hwtstamp_set(struct dsa_switch *ds, int port,</div><div class='add'>+			 struct kernel_hwtstamp_config *config,</div><div class='add'>+			 struct netlink_ext_ack *extack);</div><div class='add'>+</div><div class='add'>+int __sja1105_ptp_gettimex(struct dsa_switch *ds, u64 *ns,</div><div class='add'>+			   struct ptp_system_timestamp *sts);</div><div class='add'>+</div><div class='add'>+int __sja1105_ptp_settime(struct dsa_switch *ds, u64 ns,</div><div class='add'>+			  struct ptp_system_timestamp *ptp_sts);</div><div class='add'>+</div><div class='add'>+int __sja1105_ptp_adjtime(struct dsa_switch *ds, s64 delta);</div><div class='add'>+</div><div class='add'>+int sja1105_ptp_commit(struct dsa_switch *ds, struct sja1105_ptp_cmd *cmd,</div><div class='add'>+		       sja1105_spi_rw_mode_t rw);</div><div class='add'>+</div><div class='add'>+bool sja1105_rxtstamp(struct dsa_switch *ds, int port, struct sk_buff *skb);</div><div class='add'>+bool sja1110_rxtstamp(struct dsa_switch *ds, int port, struct sk_buff *skb);</div><div class='add'>+void sja1110_txtstamp(struct dsa_switch *ds, int port, struct sk_buff *skb);</div><div class='add'>+</div><div class='add'>+void sja1110_process_meta_tstamp(struct dsa_switch *ds, int port, u8 ts_id,</div><div class='add'>+				 enum sja1110_meta_tstamp dir, u64 tstamp);</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+</div><div class='add'>+struct sja1105_ptp_cmd;</div><div class='add'>+</div><div class='add'>+/* Structures cannot be empty in C. Bah!</div><div class='add'>+ * Keep the mutex as the only element, which is a bit more difficult to</div><div class='add'>+ * refactor out of sja1105_main.c anyway.</div><div class='add'>+ */</div><div class='add'>+struct sja1105_ptp_data {</div><div class='add'>+	struct mutex lock;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline int sja1105_ptp_clock_register(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void sja1105_ptp_clock_unregister(struct dsa_switch *ds) { }</div><div class='add'>+</div><div class='add'>+static inline void sja1105_ptp_txtstamp_skb(struct dsa_switch *ds, int slot,</div><div class='add'>+					    struct sk_buff *clone)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int __sja1105_ptp_gettimex(struct dsa_switch *ds, u64 *ns,</div><div class='add'>+					 struct ptp_system_timestamp *sts)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int __sja1105_ptp_settime(struct dsa_switch *ds, u64 ns,</div><div class='add'>+					struct ptp_system_timestamp *ptp_sts)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int __sja1105_ptp_adjtime(struct dsa_switch *ds, s64 delta)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int sja1105_ptp_commit(struct dsa_switch *ds,</div><div class='add'>+				     struct sja1105_ptp_cmd *cmd,</div><div class='add'>+				     sja1105_spi_rw_mode_t rw)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define sja1105et_ptp_cmd_packing NULL</div><div class='add'>+</div><div class='add'>+#define sja1105pqrs_ptp_cmd_packing NULL</div><div class='add'>+</div><div class='add'>+#define sja1105_get_ts_info NULL</div><div class='add'>+</div><div class='add'>+#define sja1105_port_rxtstamp NULL</div><div class='add'>+</div><div class='add'>+#define sja1105_port_txtstamp NULL</div><div class='add'>+</div><div class='add'>+#define sja1105_hwtstamp_get NULL</div><div class='add'>+</div><div class='add'>+#define sja1105_hwtstamp_set NULL</div><div class='add'>+</div><div class='add'>+#define sja1105_rxtstamp NULL</div><div class='add'>+#define sja1110_rxtstamp NULL</div><div class='add'>+#define sja1110_txtstamp NULL</div><div class='add'>+</div><div class='add'>+#define sja1110_process_meta_tstamp NULL</div><div class='add'>+</div><div class='add'>+#endif /* IS_ENABLED(CONFIG_NET_DSA_SJA1105_PTP) */</div><div class='add'>+</div><div class='add'>+#endif /* _SJA1105_PTP_H */</div><div class='head'>diff --git a/drivers/net/dsa/sja1105/sja1105_spi.c b/drivers/net/dsa/sja1105/sja1105_spi.c<br/>new file mode 100644<br/>index 000000000000..834b5c1b4db0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/sja1105/sja1105_spi.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/sja1105/sja1105_spi.c</a></div><div class='hunk'>@@ -0,0 +1,977 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/* Copyright 2016-2018 NXP</div><div class='add'>+ * Copyright (c) 2018, Sensor-Technik Wiedemann GmbH</div><div class='add'>+ * Copyright (c) 2018-2019, Vladimir Oltean &lt;olteanv@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/spi/spi.h&gt;</div><div class='add'>+#include &lt;linux/packing.h&gt;</div><div class='add'>+#include "sja1105.h"</div><div class='add'>+</div><div class='add'>+struct sja1105_chunk {</div><div class='add'>+	u8	*buf;</div><div class='add'>+	size_t	len;</div><div class='add'>+	u64	reg_addr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+sja1105_spi_message_pack(void *buf, const struct sja1105_spi_message *msg)</div><div class='add'>+{</div><div class='add'>+	const int size = SJA1105_SIZE_SPI_MSG_HEADER;</div><div class='add'>+</div><div class='add'>+	memset(buf, 0, size);</div><div class='add'>+</div><div class='add'>+	sja1105_pack(buf, &amp;msg-&gt;access,     31, 31, size);</div><div class='add'>+	sja1105_pack(buf, &amp;msg-&gt;read_count, 30, 25, size);</div><div class='add'>+	sja1105_pack(buf, &amp;msg-&gt;address,    24,  4, size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* If @rw is:</div><div class='add'>+ * - SPI_WRITE: creates and sends an SPI write message at absolute</div><div class='add'>+ *		address reg_addr, taking @len bytes from *buf</div><div class='add'>+ * - SPI_READ:  creates and sends an SPI read message from absolute</div><div class='add'>+ *		address reg_addr, writing @len bytes into *buf</div><div class='add'>+ */</div><div class='add'>+static int sja1105_xfer(const struct sja1105_private *priv,</div><div class='add'>+			sja1105_spi_rw_mode_t rw, u64 reg_addr, u8 *buf,</div><div class='add'>+			size_t len, struct ptp_system_timestamp *ptp_sts)</div><div class='add'>+{</div><div class='add'>+	u8 hdr_buf[SJA1105_SIZE_SPI_MSG_HEADER] = {0};</div><div class='add'>+	struct spi_device *spi = priv-&gt;spidev;</div><div class='add'>+	struct spi_transfer xfers[2] = {0};</div><div class='add'>+	struct spi_transfer *chunk_xfer;</div><div class='add'>+	struct spi_transfer *hdr_xfer;</div><div class='add'>+	struct sja1105_chunk chunk;</div><div class='add'>+	int num_chunks;</div><div class='add'>+	int rc, i = 0;</div><div class='add'>+</div><div class='add'>+	num_chunks = DIV_ROUND_UP(len, priv-&gt;max_xfer_len);</div><div class='add'>+</div><div class='add'>+	chunk.reg_addr = reg_addr;</div><div class='add'>+	chunk.buf = buf;</div><div class='add'>+	chunk.len = min_t(size_t, len, priv-&gt;max_xfer_len);</div><div class='add'>+</div><div class='add'>+	hdr_xfer = &amp;xfers[0];</div><div class='add'>+	chunk_xfer = &amp;xfers[1];</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_chunks; i++) {</div><div class='add'>+		struct spi_transfer *ptp_sts_xfer;</div><div class='add'>+		struct sja1105_spi_message msg;</div><div class='add'>+</div><div class='add'>+		/* Populate the transfer's header buffer */</div><div class='add'>+		msg.address = chunk.reg_addr;</div><div class='add'>+		msg.access = rw;</div><div class='add'>+		if (rw == SPI_READ)</div><div class='add'>+			msg.read_count = chunk.len / 4;</div><div class='add'>+		else</div><div class='add'>+			/* Ignored */</div><div class='add'>+			msg.read_count = 0;</div><div class='add'>+		sja1105_spi_message_pack(hdr_buf, &amp;msg);</div><div class='add'>+		hdr_xfer-&gt;tx_buf = hdr_buf;</div><div class='add'>+		hdr_xfer-&gt;len = SJA1105_SIZE_SPI_MSG_HEADER;</div><div class='add'>+</div><div class='add'>+		/* Populate the transfer's data buffer */</div><div class='add'>+		if (rw == SPI_READ)</div><div class='add'>+			chunk_xfer-&gt;rx_buf = chunk.buf;</div><div class='add'>+		else</div><div class='add'>+			chunk_xfer-&gt;tx_buf = chunk.buf;</div><div class='add'>+		chunk_xfer-&gt;len = chunk.len;</div><div class='add'>+</div><div class='add'>+		/* Request timestamping for the transfer. Instead of letting</div><div class='add'>+		 * callers specify which byte they want to timestamp, we can</div><div class='add'>+		 * make certain assumptions:</div><div class='add'>+		 * - A read operation will request a software timestamp when</div><div class='add'>+		 *   what's being read is the PTP time. That is snapshotted by</div><div class='add'>+		 *   the switch hardware at the end of the command portion</div><div class='add'>+		 *   (hdr_xfer).</div><div class='add'>+		 * - A write operation will request a software timestamp on</div><div class='add'>+		 *   actions that modify the PTP time. Taking clock stepping as</div><div class='add'>+		 *   an example, the switch writes the PTP time at the end of</div><div class='add'>+		 *   the data portion (chunk_xfer).</div><div class='add'>+		 */</div><div class='add'>+		if (rw == SPI_READ)</div><div class='add'>+			ptp_sts_xfer = hdr_xfer;</div><div class='add'>+		else</div><div class='add'>+			ptp_sts_xfer = chunk_xfer;</div><div class='add'>+		ptp_sts_xfer-&gt;ptp_sts_word_pre = ptp_sts_xfer-&gt;len - 1;</div><div class='add'>+		ptp_sts_xfer-&gt;ptp_sts_word_post = ptp_sts_xfer-&gt;len - 1;</div><div class='add'>+		ptp_sts_xfer-&gt;ptp_sts = ptp_sts;</div><div class='add'>+</div><div class='add'>+		/* Calculate next chunk */</div><div class='add'>+		chunk.buf += chunk.len;</div><div class='add'>+		chunk.reg_addr += chunk.len / 4;</div><div class='add'>+		chunk.len = min_t(size_t, (ptrdiff_t)(buf + len - chunk.buf),</div><div class='add'>+				  priv-&gt;max_xfer_len);</div><div class='add'>+</div><div class='add'>+		rc = spi_sync_transfer(spi, xfers, 2);</div><div class='add'>+		if (rc &lt; 0) {</div><div class='add'>+			dev_err(&amp;spi-&gt;dev, "SPI transfer failed: %d\n", rc);</div><div class='add'>+			return rc;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int sja1105_xfer_buf(const struct sja1105_private *priv,</div><div class='add'>+		     sja1105_spi_rw_mode_t rw, u64 reg_addr,</div><div class='add'>+		     u8 *buf, size_t len)</div><div class='add'>+{</div><div class='add'>+	return sja1105_xfer(priv, rw, reg_addr, buf, len, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* If @rw is:</div><div class='add'>+ * - SPI_WRITE: creates and sends an SPI write message at absolute</div><div class='add'>+ *		address reg_addr</div><div class='add'>+ * - SPI_READ:  creates and sends an SPI read message from absolute</div><div class='add'>+ *		address reg_addr</div><div class='add'>+ *</div><div class='add'>+ * The u64 *value is unpacked, meaning that it's stored in the native</div><div class='add'>+ * CPU endianness and directly usable by software running on the core.</div><div class='add'>+ */</div><div class='add'>+int sja1105_xfer_u64(const struct sja1105_private *priv,</div><div class='add'>+		     sja1105_spi_rw_mode_t rw, u64 reg_addr, u64 *value,</div><div class='add'>+		     struct ptp_system_timestamp *ptp_sts)</div><div class='add'>+{</div><div class='add'>+	u8 packed_buf[8];</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (rw == SPI_WRITE)</div><div class='add'>+		sja1105_pack(packed_buf, value, 63, 0, 8);</div><div class='add'>+</div><div class='add'>+	rc = sja1105_xfer(priv, rw, reg_addr, packed_buf, 8, ptp_sts);</div><div class='add'>+</div><div class='add'>+	if (rw == SPI_READ)</div><div class='add'>+		sja1105_unpack(packed_buf, value, 63, 0, 8);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Same as above, but transfers only a 4 byte word */</div><div class='add'>+int sja1105_xfer_u32(const struct sja1105_private *priv,</div><div class='add'>+		     sja1105_spi_rw_mode_t rw, u64 reg_addr, u32 *value,</div><div class='add'>+		     struct ptp_system_timestamp *ptp_sts)</div><div class='add'>+{</div><div class='add'>+	u8 packed_buf[4];</div><div class='add'>+	u64 tmp;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (rw == SPI_WRITE) {</div><div class='add'>+		/* The packing API only supports u64 as CPU word size,</div><div class='add'>+		 * so we need to convert.</div><div class='add'>+		 */</div><div class='add'>+		tmp = *value;</div><div class='add'>+		sja1105_pack(packed_buf, &amp;tmp, 31, 0, 4);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = sja1105_xfer(priv, rw, reg_addr, packed_buf, 4, ptp_sts);</div><div class='add'>+</div><div class='add'>+	if (rw == SPI_READ) {</div><div class='add'>+		sja1105_unpack(packed_buf, &amp;tmp, 31, 0, 4);</div><div class='add'>+		*value = tmp;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105et_reset_cmd(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	const struct sja1105_regs *regs = priv-&gt;info-&gt;regs;</div><div class='add'>+	u32 cold_reset = BIT(3);</div><div class='add'>+</div><div class='add'>+	/* Cold reset */</div><div class='add'>+	return sja1105_xfer_u32(priv, SPI_WRITE, regs-&gt;rgu, &amp;cold_reset, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105pqrs_reset_cmd(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	const struct sja1105_regs *regs = priv-&gt;info-&gt;regs;</div><div class='add'>+	u32 cold_reset = BIT(2);</div><div class='add'>+</div><div class='add'>+	/* Cold reset */</div><div class='add'>+	return sja1105_xfer_u32(priv, SPI_WRITE, regs-&gt;rgu, &amp;cold_reset, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1110_reset_cmd(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	const struct sja1105_regs *regs = priv-&gt;info-&gt;regs;</div><div class='add'>+	u32 switch_reset = BIT(20);</div><div class='add'>+</div><div class='add'>+	/* Only reset the switch core.</div><div class='add'>+	 * A full cold reset would re-enable the BASE_MCSS_CLOCK PLL which</div><div class='add'>+	 * would turn on the microcontroller, potentially letting it execute</div><div class='add'>+	 * code which could interfere with our configuration.</div><div class='add'>+	 */</div><div class='add'>+	return sja1105_xfer_u32(priv, SPI_WRITE, regs-&gt;rgu, &amp;switch_reset, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int sja1105_inhibit_tx(const struct sja1105_private *priv,</div><div class='add'>+		       unsigned long port_bitmap, bool tx_inhibited)</div><div class='add'>+{</div><div class='add'>+	const struct sja1105_regs *regs = priv-&gt;info-&gt;regs;</div><div class='add'>+	u32 inhibit_cmd;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_xfer_u32(priv, SPI_READ, regs-&gt;port_control,</div><div class='add'>+			      &amp;inhibit_cmd, NULL);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	if (tx_inhibited)</div><div class='add'>+		inhibit_cmd |= port_bitmap;</div><div class='add'>+	else</div><div class='add'>+		inhibit_cmd &amp;= ~port_bitmap;</div><div class='add'>+</div><div class='add'>+	return sja1105_xfer_u32(priv, SPI_WRITE, regs-&gt;port_control,</div><div class='add'>+				&amp;inhibit_cmd, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct sja1105_status {</div><div class='add'>+	u64 configs;</div><div class='add'>+	u64 crcchkl;</div><div class='add'>+	u64 ids;</div><div class='add'>+	u64 crcchkg;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* This is not reading the entire General Status area, which is also</div><div class='add'>+ * divergent between E/T and P/Q/R/S, but only the relevant bits for</div><div class='add'>+ * ensuring that the static config upload procedure was successful.</div><div class='add'>+ */</div><div class='add'>+static void sja1105_status_unpack(void *buf, struct sja1105_status *status)</div><div class='add'>+{</div><div class='add'>+	/* So that addition translates to 4 bytes */</div><div class='add'>+	u32 *p = buf;</div><div class='add'>+</div><div class='add'>+	/* device_id is missing from the buffer, but we don't</div><div class='add'>+	 * want to diverge from the manual definition of the</div><div class='add'>+	 * register addresses, so we'll back off one step with</div><div class='add'>+	 * the register pointer, and never access p[0].</div><div class='add'>+	 */</div><div class='add'>+	p--;</div><div class='add'>+	sja1105_unpack(p + 0x1, &amp;status-&gt;configs,   31, 31, 4);</div><div class='add'>+	sja1105_unpack(p + 0x1, &amp;status-&gt;crcchkl,   30, 30, 4);</div><div class='add'>+	sja1105_unpack(p + 0x1, &amp;status-&gt;ids,       29, 29, 4);</div><div class='add'>+	sja1105_unpack(p + 0x1, &amp;status-&gt;crcchkg,   28, 28, 4);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_status_get(struct sja1105_private *priv,</div><div class='add'>+			      struct sja1105_status *status)</div><div class='add'>+{</div><div class='add'>+	const struct sja1105_regs *regs = priv-&gt;info-&gt;regs;</div><div class='add'>+	u8 packed_buf[4];</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_xfer_buf(priv, SPI_READ, regs-&gt;status, packed_buf, 4);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	sja1105_status_unpack(packed_buf, status);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Not const because unpacking priv-&gt;static_config into buffers and preparing</div><div class='add'>+ * for upload requires the recalculation of table CRCs and updating the</div><div class='add'>+ * structures with these.</div><div class='add'>+ */</div><div class='add'>+int static_config_buf_prepare_for_upload(struct sja1105_private *priv,</div><div class='add'>+					 void *config_buf, int buf_len)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_static_config *config = &amp;priv-&gt;static_config;</div><div class='add'>+	struct sja1105_table_header final_header;</div><div class='add'>+	sja1105_config_valid_t valid;</div><div class='add'>+	char *final_header_ptr;</div><div class='add'>+	int crc_len;</div><div class='add'>+</div><div class='add'>+	valid = sja1105_static_config_check_valid(config,</div><div class='add'>+						  priv-&gt;info-&gt;max_frame_mem);</div><div class='add'>+	if (valid != SJA1105_CONFIG_OK) {</div><div class='add'>+		dev_err(&amp;priv-&gt;spidev-&gt;dev,</div><div class='add'>+			sja1105_static_config_error_msg[valid]);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Write Device ID and config tables to config_buf */</div><div class='add'>+	sja1105_static_config_pack(config_buf, config);</div><div class='add'>+	/* Recalculate CRC of the last header (right now 0xDEADBEEF).</div><div class='add'>+	 * Don't include the CRC field itself.</div><div class='add'>+	 */</div><div class='add'>+	crc_len = buf_len - 4;</div><div class='add'>+	/* Read the whole table header */</div><div class='add'>+	final_header_ptr = config_buf + buf_len - SJA1105_SIZE_TABLE_HEADER;</div><div class='add'>+	sja1105_table_header_packing(final_header_ptr, &amp;final_header, UNPACK);</div><div class='add'>+	/* Modify */</div><div class='add'>+	final_header.crc = sja1105_crc32(config_buf, crc_len);</div><div class='add'>+	/* Rewrite */</div><div class='add'>+	sja1105_table_header_packing(final_header_ptr, &amp;final_header, PACK);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define RETRIES 10</div><div class='add'>+</div><div class='add'>+int sja1105_static_config_upload(struct sja1105_private *priv)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_static_config *config = &amp;priv-&gt;static_config;</div><div class='add'>+	const struct sja1105_regs *regs = priv-&gt;info-&gt;regs;</div><div class='add'>+	struct device *dev = &amp;priv-&gt;spidev-&gt;dev;</div><div class='add'>+	struct dsa_switch *ds = priv-&gt;ds;</div><div class='add'>+	struct sja1105_status status;</div><div class='add'>+	int rc, retries = RETRIES;</div><div class='add'>+	u8 *config_buf;</div><div class='add'>+	int buf_len;</div><div class='add'>+</div><div class='add'>+	buf_len = sja1105_static_config_get_length(config);</div><div class='add'>+	config_buf = kcalloc(buf_len, sizeof(char), GFP_KERNEL);</div><div class='add'>+	if (!config_buf)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	rc = static_config_buf_prepare_for_upload(priv, config_buf, buf_len);</div><div class='add'>+	if (rc &lt; 0) {</div><div class='add'>+		dev_err(dev, "Invalid config, cannot upload\n");</div><div class='add'>+		rc = -EINVAL;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	/* Prevent PHY jabbering during switch reset by inhibiting</div><div class='add'>+	 * Tx on all ports and waiting for current packet to drain.</div><div class='add'>+	 * Otherwise, the PHY will see an unterminated Ethernet packet.</div><div class='add'>+	 */</div><div class='add'>+	rc = sja1105_inhibit_tx(priv, GENMASK_ULL(ds-&gt;num_ports - 1, 0), true);</div><div class='add'>+	if (rc &lt; 0) {</div><div class='add'>+		dev_err(dev, "Failed to inhibit Tx on ports\n");</div><div class='add'>+		rc = -ENXIO;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	/* Wait for an eventual egress packet to finish transmission</div><div class='add'>+	 * (reach IFG). It is guaranteed that a second one will not</div><div class='add'>+	 * follow, and that switch cold reset is thus safe</div><div class='add'>+	 */</div><div class='add'>+	usleep_range(500, 1000);</div><div class='add'>+	do {</div><div class='add'>+		/* Put the SJA1105 in programming mode */</div><div class='add'>+		rc = priv-&gt;info-&gt;reset_cmd(priv-&gt;ds);</div><div class='add'>+		if (rc &lt; 0) {</div><div class='add'>+			dev_err(dev, "Failed to reset switch, retrying...\n");</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+		/* Wait for the switch to come out of reset */</div><div class='add'>+		usleep_range(1000, 5000);</div><div class='add'>+		/* Upload the static config to the device */</div><div class='add'>+		rc = sja1105_xfer_buf(priv, SPI_WRITE, regs-&gt;config,</div><div class='add'>+				      config_buf, buf_len);</div><div class='add'>+		if (rc &lt; 0) {</div><div class='add'>+			dev_err(dev, "Failed to upload config, retrying...\n");</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+		/* Check that SJA1105 responded well to the config upload */</div><div class='add'>+		rc = sja1105_status_get(priv, &amp;status);</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (status.ids == 1) {</div><div class='add'>+			dev_err(dev, "Mismatch between hardware and static config "</div><div class='add'>+				"device id. Wrote 0x%llx, wants 0x%llx\n",</div><div class='add'>+				config-&gt;device_id, priv-&gt;info-&gt;device_id);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+		if (status.crcchkl == 1) {</div><div class='add'>+			dev_err(dev, "Switch reported invalid local CRC on "</div><div class='add'>+				"the uploaded config, retrying...\n");</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+		if (status.crcchkg == 1) {</div><div class='add'>+			dev_err(dev, "Switch reported invalid global CRC on "</div><div class='add'>+				"the uploaded config, retrying...\n");</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+		if (status.configs == 0) {</div><div class='add'>+			dev_err(dev, "Switch reported that configuration is "</div><div class='add'>+				"invalid, retrying...\n");</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+		/* Success! */</div><div class='add'>+		break;</div><div class='add'>+	} while (--retries);</div><div class='add'>+</div><div class='add'>+	if (!retries) {</div><div class='add'>+		rc = -EIO;</div><div class='add'>+		dev_err(dev, "Failed to upload config to device, giving up\n");</div><div class='add'>+		goto out;</div><div class='add'>+	} else if (retries != RETRIES) {</div><div class='add'>+		dev_info(dev, "Succeeded after %d tried\n", RETRIES - retries);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	kfree(config_buf);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct sja1105_regs sja1105et_regs = {</div><div class='add'>+	.device_id = 0x0,</div><div class='add'>+	.prod_id = 0x100BC3,</div><div class='add'>+	.status = 0x1,</div><div class='add'>+	.port_control = 0x11,</div><div class='add'>+	.vl_status = 0x10000,</div><div class='add'>+	.config = 0x020000,</div><div class='add'>+	.rgu = 0x100440,</div><div class='add'>+	/* UM10944.pdf, Table 86, ACU Register overview */</div><div class='add'>+	.pad_mii_tx = {0x100800, 0x100802, 0x100804, 0x100806, 0x100808},</div><div class='add'>+	.pad_mii_rx = {0x100801, 0x100803, 0x100805, 0x100807, 0x100809},</div><div class='add'>+	.rmii_pll1 = 0x10000A,</div><div class='add'>+	.cgu_idiv = {0x10000B, 0x10000C, 0x10000D, 0x10000E, 0x10000F},</div><div class='add'>+	.stats[MAC] = {0x200, 0x202, 0x204, 0x206, 0x208},</div><div class='add'>+	.stats[HL1] = {0x400, 0x410, 0x420, 0x430, 0x440},</div><div class='add'>+	.stats[HL2] = {0x600, 0x610, 0x620, 0x630, 0x640},</div><div class='add'>+	/* UM10944.pdf, Table 78, CGU Register overview */</div><div class='add'>+	.mii_tx_clk = {0x100013, 0x10001A, 0x100021, 0x100028, 0x10002F},</div><div class='add'>+	.mii_rx_clk = {0x100014, 0x10001B, 0x100022, 0x100029, 0x100030},</div><div class='add'>+	.mii_ext_tx_clk = {0x100018, 0x10001F, 0x100026, 0x10002D, 0x100034},</div><div class='add'>+	.mii_ext_rx_clk = {0x100019, 0x100020, 0x100027, 0x10002E, 0x100035},</div><div class='add'>+	.rgmii_tx_clk = {0x100016, 0x10001D, 0x100024, 0x10002B, 0x100032},</div><div class='add'>+	.rmii_ref_clk = {0x100015, 0x10001C, 0x100023, 0x10002A, 0x100031},</div><div class='add'>+	.rmii_ext_tx_clk = {0x100018, 0x10001F, 0x100026, 0x10002D, 0x100034},</div><div class='add'>+	.ptpegr_ts = {0xC0, 0xC2, 0xC4, 0xC6, 0xC8},</div><div class='add'>+	.ptpschtm = 0x12, /* Spans 0x12 to 0x13 */</div><div class='add'>+	.ptppinst = 0x14,</div><div class='add'>+	.ptppindur = 0x16,</div><div class='add'>+	.ptp_control = 0x17,</div><div class='add'>+	.ptpclkval = 0x18, /* Spans 0x18 to 0x19 */</div><div class='add'>+	.ptpclkrate = 0x1A,</div><div class='add'>+	.ptpclkcorp = 0x1D,</div><div class='add'>+	.mdio_100base_tx = SJA1105_RSV_ADDR,</div><div class='add'>+	.mdio_100base_t1 = SJA1105_RSV_ADDR,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct sja1105_regs sja1105pqrs_regs = {</div><div class='add'>+	.device_id = 0x0,</div><div class='add'>+	.prod_id = 0x100BC3,</div><div class='add'>+	.status = 0x1,</div><div class='add'>+	.port_control = 0x12,</div><div class='add'>+	.vl_status = 0x10000,</div><div class='add'>+	.config = 0x020000,</div><div class='add'>+	.rgu = 0x100440,</div><div class='add'>+	/* UM10944.pdf, Table 86, ACU Register overview */</div><div class='add'>+	.pad_mii_tx = {0x100800, 0x100802, 0x100804, 0x100806, 0x100808},</div><div class='add'>+	.pad_mii_rx = {0x100801, 0x100803, 0x100805, 0x100807, 0x100809},</div><div class='add'>+	.pad_mii_id = {0x100810, 0x100811, 0x100812, 0x100813, 0x100814},</div><div class='add'>+	.rmii_pll1 = 0x10000A,</div><div class='add'>+	.cgu_idiv = {0x10000B, 0x10000C, 0x10000D, 0x10000E, 0x10000F},</div><div class='add'>+	.stats[MAC] = {0x200, 0x202, 0x204, 0x206, 0x208},</div><div class='add'>+	.stats[HL1] = {0x400, 0x410, 0x420, 0x430, 0x440},</div><div class='add'>+	.stats[HL2] = {0x600, 0x610, 0x620, 0x630, 0x640},</div><div class='add'>+	.stats[ETHER] = {0x1400, 0x1418, 0x1430, 0x1448, 0x1460},</div><div class='add'>+	/* UM11040.pdf, Table 114 */</div><div class='add'>+	.mii_tx_clk = {0x100013, 0x100019, 0x10001F, 0x100025, 0x10002B},</div><div class='add'>+	.mii_rx_clk = {0x100014, 0x10001A, 0x100020, 0x100026, 0x10002C},</div><div class='add'>+	.mii_ext_tx_clk = {0x100017, 0x10001D, 0x100023, 0x100029, 0x10002F},</div><div class='add'>+	.mii_ext_rx_clk = {0x100018, 0x10001E, 0x100024, 0x10002A, 0x100030},</div><div class='add'>+	.rgmii_tx_clk = {0x100016, 0x10001C, 0x100022, 0x100028, 0x10002E},</div><div class='add'>+	.rmii_ref_clk = {0x100015, 0x10001B, 0x100021, 0x100027, 0x10002D},</div><div class='add'>+	.rmii_ext_tx_clk = {0x100017, 0x10001D, 0x100023, 0x100029, 0x10002F},</div><div class='add'>+	.ptpegr_ts = {0xC0, 0xC4, 0xC8, 0xCC, 0xD0},</div><div class='add'>+	.ptpschtm = 0x13, /* Spans 0x13 to 0x14 */</div><div class='add'>+	.ptppinst = 0x15,</div><div class='add'>+	.ptppindur = 0x17,</div><div class='add'>+	.ptp_control = 0x18,</div><div class='add'>+	.ptpclkval = 0x19,</div><div class='add'>+	.ptpclkrate = 0x1B,</div><div class='add'>+	.ptpclkcorp = 0x1E,</div><div class='add'>+	.ptpsyncts = 0x1F,</div><div class='add'>+	.mdio_100base_tx = SJA1105_RSV_ADDR,</div><div class='add'>+	.mdio_100base_t1 = SJA1105_RSV_ADDR,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct sja1105_regs sja1110_regs = {</div><div class='add'>+	.device_id = SJA1110_SPI_ADDR(0x0),</div><div class='add'>+	.prod_id = SJA1110_ACU_ADDR(0xf00),</div><div class='add'>+	.status = SJA1110_SPI_ADDR(0x4),</div><div class='add'>+	.port_control = SJA1110_SPI_ADDR(0x50), /* actually INHIB_TX */</div><div class='add'>+	.vl_status = 0x10000,</div><div class='add'>+	.config = 0x020000,</div><div class='add'>+	.rgu = SJA1110_RGU_ADDR(0x100), /* Reset Control Register 0 */</div><div class='add'>+	/* Ports 2 and 3 are capable of xMII, but there isn't anything to</div><div class='add'>+	 * configure in the CGU/ACU for them.</div><div class='add'>+	 */</div><div class='add'>+	.pad_mii_tx = {SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+		       SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+		       SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+		       SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+		       SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+		       SJA1105_RSV_ADDR},</div><div class='add'>+	.pad_mii_rx = {SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+		       SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+		       SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+		       SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+		       SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+		       SJA1105_RSV_ADDR},</div><div class='add'>+	.pad_mii_id = {SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+		       SJA1110_ACU_ADDR(0x18), SJA1110_ACU_ADDR(0x28),</div><div class='add'>+		       SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+		       SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+		       SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+		       SJA1105_RSV_ADDR},</div><div class='add'>+	.rmii_pll1 = SJA1105_RSV_ADDR,</div><div class='add'>+	.cgu_idiv = {SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+		     SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+		     SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+		     SJA1105_RSV_ADDR, SJA1105_RSV_ADDR},</div><div class='add'>+	.stats[MAC] = {0x200, 0x202, 0x204, 0x206, 0x208, 0x20a,</div><div class='add'>+		       0x20c, 0x20e, 0x210, 0x212, 0x214},</div><div class='add'>+	.stats[HL1] = {0x400, 0x410, 0x420, 0x430, 0x440, 0x450,</div><div class='add'>+		       0x460, 0x470, 0x480, 0x490, 0x4a0},</div><div class='add'>+	.stats[HL2] = {0x600, 0x610, 0x620, 0x630, 0x640, 0x650,</div><div class='add'>+		       0x660, 0x670, 0x680, 0x690, 0x6a0},</div><div class='add'>+	.stats[ETHER] = {0x1400, 0x1418, 0x1430, 0x1448, 0x1460, 0x1478,</div><div class='add'>+			 0x1490, 0x14a8, 0x14c0, 0x14d8, 0x14f0},</div><div class='add'>+	.mii_tx_clk = {SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+		       SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+		       SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+		       SJA1105_RSV_ADDR, SJA1105_RSV_ADDR},</div><div class='add'>+	.mii_rx_clk = {SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+		       SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+		       SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+		       SJA1105_RSV_ADDR, SJA1105_RSV_ADDR},</div><div class='add'>+	.mii_ext_tx_clk = {SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+			   SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+			   SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+			   SJA1105_RSV_ADDR, SJA1105_RSV_ADDR},</div><div class='add'>+	.mii_ext_rx_clk = {SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+			   SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+			   SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+			   SJA1105_RSV_ADDR, SJA1105_RSV_ADDR},</div><div class='add'>+	.rgmii_tx_clk = {SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+			 SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+			 SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+			 SJA1105_RSV_ADDR, SJA1105_RSV_ADDR},</div><div class='add'>+	.rmii_ref_clk = {SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+			 SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+			 SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+			 SJA1105_RSV_ADDR, SJA1105_RSV_ADDR},</div><div class='add'>+	.rmii_ext_tx_clk = {SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+			    SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+			    SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+			    SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+			    SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+			    SJA1105_RSV_ADDR},</div><div class='add'>+	.ptpschtm = SJA1110_SPI_ADDR(0x54),</div><div class='add'>+	.ptppinst = SJA1110_SPI_ADDR(0x5c),</div><div class='add'>+	.ptppindur = SJA1110_SPI_ADDR(0x64),</div><div class='add'>+	.ptp_control = SJA1110_SPI_ADDR(0x68),</div><div class='add'>+	.ptpclkval = SJA1110_SPI_ADDR(0x6c),</div><div class='add'>+	.ptpclkrate = SJA1110_SPI_ADDR(0x74),</div><div class='add'>+	.ptpclkcorp = SJA1110_SPI_ADDR(0x80),</div><div class='add'>+	.ptpsyncts = SJA1110_SPI_ADDR(0x84),</div><div class='add'>+	.mdio_100base_tx = 0x1c2400,</div><div class='add'>+	.mdio_100base_t1 = 0x1c1000,</div><div class='add'>+	.pcs_base = {SJA1105_RSV_ADDR, 0x1c1400, 0x1c1800, 0x1c1c00, 0x1c2000,</div><div class='add'>+		     SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR,</div><div class='add'>+		     SJA1105_RSV_ADDR, SJA1105_RSV_ADDR, SJA1105_RSV_ADDR},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct sja1105_info sja1105e_info = {</div><div class='add'>+	.device_id		= SJA1105E_DEVICE_ID,</div><div class='add'>+	.part_no		= SJA1105ET_PART_NO,</div><div class='add'>+	.static_ops		= sja1105e_table_ops,</div><div class='add'>+	.dyn_ops		= sja1105et_dyn_ops,</div><div class='add'>+	.tag_proto		= DSA_TAG_PROTO_SJA1105,</div><div class='add'>+	.can_limit_mcast_flood	= false,</div><div class='add'>+	.ptp_ts_bits		= 24,</div><div class='add'>+	.ptpegr_ts_bytes	= 4,</div><div class='add'>+	.max_frame_mem		= SJA1105_MAX_FRAME_MEMORY,</div><div class='add'>+	.num_ports		= SJA1105_NUM_PORTS,</div><div class='add'>+	.num_cbs_shapers	= SJA1105ET_MAX_CBS_COUNT,</div><div class='add'>+	.reset_cmd		= sja1105et_reset_cmd,</div><div class='add'>+	.fdb_add_cmd		= sja1105et_fdb_add,</div><div class='add'>+	.fdb_del_cmd		= sja1105et_fdb_del,</div><div class='add'>+	.ptp_cmd_packing	= sja1105et_ptp_cmd_packing,</div><div class='add'>+	.rxtstamp		= sja1105_rxtstamp,</div><div class='add'>+	.clocking_setup		= sja1105_clocking_setup,</div><div class='add'>+	.regs			= &amp;sja1105et_regs,</div><div class='add'>+	.port_speed		= {</div><div class='add'>+		[SJA1105_SPEED_AUTO] = 0,</div><div class='add'>+		[SJA1105_SPEED_10MBPS] = 3,</div><div class='add'>+		[SJA1105_SPEED_100MBPS] = 2,</div><div class='add'>+		[SJA1105_SPEED_1000MBPS] = 1,</div><div class='add'>+		[SJA1105_SPEED_2500MBPS] = 0, /* Not supported */</div><div class='add'>+	},</div><div class='add'>+	.supports_mii		= {true, true, true, true, true},</div><div class='add'>+	.supports_rmii		= {true, true, true, true, true},</div><div class='add'>+	.supports_rgmii		= {true, true, true, true, true},</div><div class='add'>+	.name			= "SJA1105E",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct sja1105_info sja1105t_info = {</div><div class='add'>+	.device_id		= SJA1105T_DEVICE_ID,</div><div class='add'>+	.part_no		= SJA1105ET_PART_NO,</div><div class='add'>+	.static_ops		= sja1105t_table_ops,</div><div class='add'>+	.dyn_ops		= sja1105et_dyn_ops,</div><div class='add'>+	.tag_proto		= DSA_TAG_PROTO_SJA1105,</div><div class='add'>+	.can_limit_mcast_flood	= false,</div><div class='add'>+	.ptp_ts_bits		= 24,</div><div class='add'>+	.ptpegr_ts_bytes	= 4,</div><div class='add'>+	.max_frame_mem		= SJA1105_MAX_FRAME_MEMORY,</div><div class='add'>+	.num_ports		= SJA1105_NUM_PORTS,</div><div class='add'>+	.num_cbs_shapers	= SJA1105ET_MAX_CBS_COUNT,</div><div class='add'>+	.reset_cmd		= sja1105et_reset_cmd,</div><div class='add'>+	.fdb_add_cmd		= sja1105et_fdb_add,</div><div class='add'>+	.fdb_del_cmd		= sja1105et_fdb_del,</div><div class='add'>+	.ptp_cmd_packing	= sja1105et_ptp_cmd_packing,</div><div class='add'>+	.rxtstamp		= sja1105_rxtstamp,</div><div class='add'>+	.clocking_setup		= sja1105_clocking_setup,</div><div class='add'>+	.regs			= &amp;sja1105et_regs,</div><div class='add'>+	.port_speed		= {</div><div class='add'>+		[SJA1105_SPEED_AUTO] = 0,</div><div class='add'>+		[SJA1105_SPEED_10MBPS] = 3,</div><div class='add'>+		[SJA1105_SPEED_100MBPS] = 2,</div><div class='add'>+		[SJA1105_SPEED_1000MBPS] = 1,</div><div class='add'>+		[SJA1105_SPEED_2500MBPS] = 0, /* Not supported */</div><div class='add'>+	},</div><div class='add'>+	.supports_mii		= {true, true, true, true, true},</div><div class='add'>+	.supports_rmii		= {true, true, true, true, true},</div><div class='add'>+	.supports_rgmii		= {true, true, true, true, true},</div><div class='add'>+	.name			= "SJA1105T",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct sja1105_info sja1105p_info = {</div><div class='add'>+	.device_id		= SJA1105PR_DEVICE_ID,</div><div class='add'>+	.part_no		= SJA1105P_PART_NO,</div><div class='add'>+	.static_ops		= sja1105p_table_ops,</div><div class='add'>+	.dyn_ops		= sja1105pqrs_dyn_ops,</div><div class='add'>+	.tag_proto		= DSA_TAG_PROTO_SJA1105,</div><div class='add'>+	.can_limit_mcast_flood	= true,</div><div class='add'>+	.ptp_ts_bits		= 32,</div><div class='add'>+	.ptpegr_ts_bytes	= 8,</div><div class='add'>+	.max_frame_mem		= SJA1105_MAX_FRAME_MEMORY,</div><div class='add'>+	.num_ports		= SJA1105_NUM_PORTS,</div><div class='add'>+	.num_cbs_shapers	= SJA1105PQRS_MAX_CBS_COUNT,</div><div class='add'>+	.setup_rgmii_delay	= sja1105pqrs_setup_rgmii_delay,</div><div class='add'>+	.reset_cmd		= sja1105pqrs_reset_cmd,</div><div class='add'>+	.fdb_add_cmd		= sja1105pqrs_fdb_add,</div><div class='add'>+	.fdb_del_cmd		= sja1105pqrs_fdb_del,</div><div class='add'>+	.ptp_cmd_packing	= sja1105pqrs_ptp_cmd_packing,</div><div class='add'>+	.rxtstamp		= sja1105_rxtstamp,</div><div class='add'>+	.clocking_setup		= sja1105_clocking_setup,</div><div class='add'>+	.regs			= &amp;sja1105pqrs_regs,</div><div class='add'>+	.port_speed		= {</div><div class='add'>+		[SJA1105_SPEED_AUTO] = 0,</div><div class='add'>+		[SJA1105_SPEED_10MBPS] = 3,</div><div class='add'>+		[SJA1105_SPEED_100MBPS] = 2,</div><div class='add'>+		[SJA1105_SPEED_1000MBPS] = 1,</div><div class='add'>+		[SJA1105_SPEED_2500MBPS] = 0, /* Not supported */</div><div class='add'>+	},</div><div class='add'>+	.supports_mii		= {true, true, true, true, true},</div><div class='add'>+	.supports_rmii		= {true, true, true, true, true},</div><div class='add'>+	.supports_rgmii		= {true, true, true, true, true},</div><div class='add'>+	.name			= "SJA1105P",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct sja1105_info sja1105q_info = {</div><div class='add'>+	.device_id		= SJA1105QS_DEVICE_ID,</div><div class='add'>+	.part_no		= SJA1105Q_PART_NO,</div><div class='add'>+	.static_ops		= sja1105q_table_ops,</div><div class='add'>+	.dyn_ops		= sja1105pqrs_dyn_ops,</div><div class='add'>+	.tag_proto		= DSA_TAG_PROTO_SJA1105,</div><div class='add'>+	.can_limit_mcast_flood	= true,</div><div class='add'>+	.ptp_ts_bits		= 32,</div><div class='add'>+	.ptpegr_ts_bytes	= 8,</div><div class='add'>+	.max_frame_mem		= SJA1105_MAX_FRAME_MEMORY,</div><div class='add'>+	.num_ports		= SJA1105_NUM_PORTS,</div><div class='add'>+	.num_cbs_shapers	= SJA1105PQRS_MAX_CBS_COUNT,</div><div class='add'>+	.setup_rgmii_delay	= sja1105pqrs_setup_rgmii_delay,</div><div class='add'>+	.reset_cmd		= sja1105pqrs_reset_cmd,</div><div class='add'>+	.fdb_add_cmd		= sja1105pqrs_fdb_add,</div><div class='add'>+	.fdb_del_cmd		= sja1105pqrs_fdb_del,</div><div class='add'>+	.ptp_cmd_packing	= sja1105pqrs_ptp_cmd_packing,</div><div class='add'>+	.rxtstamp		= sja1105_rxtstamp,</div><div class='add'>+	.clocking_setup		= sja1105_clocking_setup,</div><div class='add'>+	.regs			= &amp;sja1105pqrs_regs,</div><div class='add'>+	.port_speed		= {</div><div class='add'>+		[SJA1105_SPEED_AUTO] = 0,</div><div class='add'>+		[SJA1105_SPEED_10MBPS] = 3,</div><div class='add'>+		[SJA1105_SPEED_100MBPS] = 2,</div><div class='add'>+		[SJA1105_SPEED_1000MBPS] = 1,</div><div class='add'>+		[SJA1105_SPEED_2500MBPS] = 0, /* Not supported */</div><div class='add'>+	},</div><div class='add'>+	.supports_mii		= {true, true, true, true, true},</div><div class='add'>+	.supports_rmii		= {true, true, true, true, true},</div><div class='add'>+	.supports_rgmii		= {true, true, true, true, true},</div><div class='add'>+	.name			= "SJA1105Q",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct sja1105_info sja1105r_info = {</div><div class='add'>+	.device_id		= SJA1105PR_DEVICE_ID,</div><div class='add'>+	.part_no		= SJA1105R_PART_NO,</div><div class='add'>+	.static_ops		= sja1105r_table_ops,</div><div class='add'>+	.dyn_ops		= sja1105pqrs_dyn_ops,</div><div class='add'>+	.tag_proto		= DSA_TAG_PROTO_SJA1105,</div><div class='add'>+	.can_limit_mcast_flood	= true,</div><div class='add'>+	.ptp_ts_bits		= 32,</div><div class='add'>+	.ptpegr_ts_bytes	= 8,</div><div class='add'>+	.max_frame_mem		= SJA1105_MAX_FRAME_MEMORY,</div><div class='add'>+	.num_ports		= SJA1105_NUM_PORTS,</div><div class='add'>+	.num_cbs_shapers	= SJA1105PQRS_MAX_CBS_COUNT,</div><div class='add'>+	.setup_rgmii_delay	= sja1105pqrs_setup_rgmii_delay,</div><div class='add'>+	.reset_cmd		= sja1105pqrs_reset_cmd,</div><div class='add'>+	.fdb_add_cmd		= sja1105pqrs_fdb_add,</div><div class='add'>+	.fdb_del_cmd		= sja1105pqrs_fdb_del,</div><div class='add'>+	.ptp_cmd_packing	= sja1105pqrs_ptp_cmd_packing,</div><div class='add'>+	.rxtstamp		= sja1105_rxtstamp,</div><div class='add'>+	.clocking_setup		= sja1105_clocking_setup,</div><div class='add'>+	.pcs_mdio_read_c45	= sja1105_pcs_mdio_read_c45,</div><div class='add'>+	.pcs_mdio_write_c45	= sja1105_pcs_mdio_write_c45,</div><div class='add'>+	.regs			= &amp;sja1105pqrs_regs,</div><div class='add'>+	.port_speed		= {</div><div class='add'>+		[SJA1105_SPEED_AUTO] = 0,</div><div class='add'>+		[SJA1105_SPEED_10MBPS] = 3,</div><div class='add'>+		[SJA1105_SPEED_100MBPS] = 2,</div><div class='add'>+		[SJA1105_SPEED_1000MBPS] = 1,</div><div class='add'>+		[SJA1105_SPEED_2500MBPS] = 0, /* Not supported */</div><div class='add'>+	},</div><div class='add'>+	.supports_mii		= {true, true, true, true, true},</div><div class='add'>+	.supports_rmii		= {true, true, true, true, true},</div><div class='add'>+	.supports_rgmii		= {true, true, true, true, true},</div><div class='add'>+	.supports_sgmii		= {false, false, false, false, true},</div><div class='add'>+	.name			= "SJA1105R",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct sja1105_info sja1105s_info = {</div><div class='add'>+	.device_id		= SJA1105QS_DEVICE_ID,</div><div class='add'>+	.part_no		= SJA1105S_PART_NO,</div><div class='add'>+	.static_ops		= sja1105s_table_ops,</div><div class='add'>+	.dyn_ops		= sja1105pqrs_dyn_ops,</div><div class='add'>+	.regs			= &amp;sja1105pqrs_regs,</div><div class='add'>+	.tag_proto		= DSA_TAG_PROTO_SJA1105,</div><div class='add'>+	.can_limit_mcast_flood	= true,</div><div class='add'>+	.ptp_ts_bits		= 32,</div><div class='add'>+	.ptpegr_ts_bytes	= 8,</div><div class='add'>+	.max_frame_mem		= SJA1105_MAX_FRAME_MEMORY,</div><div class='add'>+	.num_ports		= SJA1105_NUM_PORTS,</div><div class='add'>+	.num_cbs_shapers	= SJA1105PQRS_MAX_CBS_COUNT,</div><div class='add'>+	.setup_rgmii_delay	= sja1105pqrs_setup_rgmii_delay,</div><div class='add'>+	.reset_cmd		= sja1105pqrs_reset_cmd,</div><div class='add'>+	.fdb_add_cmd		= sja1105pqrs_fdb_add,</div><div class='add'>+	.fdb_del_cmd		= sja1105pqrs_fdb_del,</div><div class='add'>+	.ptp_cmd_packing	= sja1105pqrs_ptp_cmd_packing,</div><div class='add'>+	.rxtstamp		= sja1105_rxtstamp,</div><div class='add'>+	.clocking_setup		= sja1105_clocking_setup,</div><div class='add'>+	.pcs_mdio_read_c45	= sja1105_pcs_mdio_read_c45,</div><div class='add'>+	.pcs_mdio_write_c45	= sja1105_pcs_mdio_write_c45,</div><div class='add'>+	.port_speed		= {</div><div class='add'>+		[SJA1105_SPEED_AUTO] = 0,</div><div class='add'>+		[SJA1105_SPEED_10MBPS] = 3,</div><div class='add'>+		[SJA1105_SPEED_100MBPS] = 2,</div><div class='add'>+		[SJA1105_SPEED_1000MBPS] = 1,</div><div class='add'>+		[SJA1105_SPEED_2500MBPS] = 0, /* Not supported */</div><div class='add'>+	},</div><div class='add'>+	.supports_mii		= {true, true, true, true, true},</div><div class='add'>+	.supports_rmii		= {true, true, true, true, true},</div><div class='add'>+	.supports_rgmii		= {true, true, true, true, true},</div><div class='add'>+	.supports_sgmii		= {false, false, false, false, true},</div><div class='add'>+	.name			= "SJA1105S",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct sja1105_info sja1110a_info = {</div><div class='add'>+	.device_id		= SJA1110_DEVICE_ID,</div><div class='add'>+	.part_no		= SJA1110A_PART_NO,</div><div class='add'>+	.static_ops		= sja1110_table_ops,</div><div class='add'>+	.dyn_ops		= sja1110_dyn_ops,</div><div class='add'>+	.regs			= &amp;sja1110_regs,</div><div class='add'>+	.tag_proto		= DSA_TAG_PROTO_SJA1110,</div><div class='add'>+	.can_limit_mcast_flood	= true,</div><div class='add'>+	.multiple_cascade_ports	= true,</div><div class='add'>+	.fixed_cbs_mapping	= true,</div><div class='add'>+	.ptp_ts_bits		= 32,</div><div class='add'>+	.ptpegr_ts_bytes	= 8,</div><div class='add'>+	.max_frame_mem		= SJA1110_MAX_FRAME_MEMORY,</div><div class='add'>+	.num_ports		= SJA1110_NUM_PORTS,</div><div class='add'>+	.num_cbs_shapers	= SJA1110_MAX_CBS_COUNT,</div><div class='add'>+	.setup_rgmii_delay	= sja1110_setup_rgmii_delay,</div><div class='add'>+	.reset_cmd		= sja1110_reset_cmd,</div><div class='add'>+	.fdb_add_cmd		= sja1105pqrs_fdb_add,</div><div class='add'>+	.fdb_del_cmd		= sja1105pqrs_fdb_del,</div><div class='add'>+	.ptp_cmd_packing	= sja1105pqrs_ptp_cmd_packing,</div><div class='add'>+	.rxtstamp		= sja1110_rxtstamp,</div><div class='add'>+	.txtstamp		= sja1110_txtstamp,</div><div class='add'>+	.disable_microcontroller = sja1110_disable_microcontroller,</div><div class='add'>+	.pcs_mdio_read_c45	= sja1110_pcs_mdio_read_c45,</div><div class='add'>+	.pcs_mdio_write_c45	= sja1110_pcs_mdio_write_c45,</div><div class='add'>+	.port_speed		= {</div><div class='add'>+		[SJA1105_SPEED_AUTO] = 0,</div><div class='add'>+		[SJA1105_SPEED_10MBPS] = 4,</div><div class='add'>+		[SJA1105_SPEED_100MBPS] = 3,</div><div class='add'>+		[SJA1105_SPEED_1000MBPS] = 2,</div><div class='add'>+		[SJA1105_SPEED_2500MBPS] = 1,</div><div class='add'>+	},</div><div class='add'>+	.supports_mii		= {true, true, true, true, false,</div><div class='add'>+				   true, true, true, true, true, true},</div><div class='add'>+	.supports_rmii		= {false, false, true, true, false,</div><div class='add'>+				   false, false, false, false, false, false},</div><div class='add'>+	.supports_rgmii		= {false, false, true, true, false,</div><div class='add'>+				   false, false, false, false, false, false},</div><div class='add'>+	.supports_sgmii		= {false, true, true, true, true,</div><div class='add'>+				   false, false, false, false, false, false},</div><div class='add'>+	.supports_2500basex	= {false, false, false, true, true,</div><div class='add'>+				   false, false, false, false, false, false},</div><div class='add'>+	.internal_phy		= {SJA1105_NO_PHY, SJA1105_PHY_BASE_TX,</div><div class='add'>+				   SJA1105_NO_PHY, SJA1105_NO_PHY,</div><div class='add'>+				   SJA1105_NO_PHY, SJA1105_PHY_BASE_T1,</div><div class='add'>+				   SJA1105_PHY_BASE_T1, SJA1105_PHY_BASE_T1,</div><div class='add'>+				   SJA1105_PHY_BASE_T1, SJA1105_PHY_BASE_T1,</div><div class='add'>+				   SJA1105_PHY_BASE_T1},</div><div class='add'>+	.name			= "SJA1110A",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct sja1105_info sja1110b_info = {</div><div class='add'>+	.device_id		= SJA1110_DEVICE_ID,</div><div class='add'>+	.part_no		= SJA1110B_PART_NO,</div><div class='add'>+	.static_ops		= sja1110_table_ops,</div><div class='add'>+	.dyn_ops		= sja1110_dyn_ops,</div><div class='add'>+	.regs			= &amp;sja1110_regs,</div><div class='add'>+	.tag_proto		= DSA_TAG_PROTO_SJA1110,</div><div class='add'>+	.can_limit_mcast_flood	= true,</div><div class='add'>+	.multiple_cascade_ports	= true,</div><div class='add'>+	.fixed_cbs_mapping	= true,</div><div class='add'>+	.ptp_ts_bits		= 32,</div><div class='add'>+	.ptpegr_ts_bytes	= 8,</div><div class='add'>+	.max_frame_mem		= SJA1110_MAX_FRAME_MEMORY,</div><div class='add'>+	.num_ports		= SJA1110_NUM_PORTS,</div><div class='add'>+	.num_cbs_shapers	= SJA1110_MAX_CBS_COUNT,</div><div class='add'>+	.setup_rgmii_delay	= sja1110_setup_rgmii_delay,</div><div class='add'>+	.reset_cmd		= sja1110_reset_cmd,</div><div class='add'>+	.fdb_add_cmd		= sja1105pqrs_fdb_add,</div><div class='add'>+	.fdb_del_cmd		= sja1105pqrs_fdb_del,</div><div class='add'>+	.ptp_cmd_packing	= sja1105pqrs_ptp_cmd_packing,</div><div class='add'>+	.rxtstamp		= sja1110_rxtstamp,</div><div class='add'>+	.txtstamp		= sja1110_txtstamp,</div><div class='add'>+	.disable_microcontroller = sja1110_disable_microcontroller,</div><div class='add'>+	.pcs_mdio_read_c45	= sja1110_pcs_mdio_read_c45,</div><div class='add'>+	.pcs_mdio_write_c45	= sja1110_pcs_mdio_write_c45,</div><div class='add'>+	.port_speed		= {</div><div class='add'>+		[SJA1105_SPEED_AUTO] = 0,</div><div class='add'>+		[SJA1105_SPEED_10MBPS] = 4,</div><div class='add'>+		[SJA1105_SPEED_100MBPS] = 3,</div><div class='add'>+		[SJA1105_SPEED_1000MBPS] = 2,</div><div class='add'>+		[SJA1105_SPEED_2500MBPS] = 1,</div><div class='add'>+	},</div><div class='add'>+	.supports_mii		= {true, true, true, true, false,</div><div class='add'>+				   true, true, true, true, true, false},</div><div class='add'>+	.supports_rmii		= {false, false, true, true, false,</div><div class='add'>+				   false, false, false, false, false, false},</div><div class='add'>+	.supports_rgmii		= {false, false, true, true, false,</div><div class='add'>+				   false, false, false, false, false, false},</div><div class='add'>+	.supports_sgmii		= {false, false, false, true, true,</div><div class='add'>+				   false, false, false, false, false, false},</div><div class='add'>+	.supports_2500basex	= {false, false, false, true, true,</div><div class='add'>+				   false, false, false, false, false, false},</div><div class='add'>+	.internal_phy		= {SJA1105_NO_PHY, SJA1105_PHY_BASE_TX,</div><div class='add'>+				   SJA1105_NO_PHY, SJA1105_NO_PHY,</div><div class='add'>+				   SJA1105_NO_PHY, SJA1105_PHY_BASE_T1,</div><div class='add'>+				   SJA1105_PHY_BASE_T1, SJA1105_PHY_BASE_T1,</div><div class='add'>+				   SJA1105_PHY_BASE_T1, SJA1105_PHY_BASE_T1,</div><div class='add'>+				   SJA1105_NO_PHY},</div><div class='add'>+	.name			= "SJA1110B",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct sja1105_info sja1110c_info = {</div><div class='add'>+	.device_id		= SJA1110_DEVICE_ID,</div><div class='add'>+	.part_no		= SJA1110C_PART_NO,</div><div class='add'>+	.static_ops		= sja1110_table_ops,</div><div class='add'>+	.dyn_ops		= sja1110_dyn_ops,</div><div class='add'>+	.regs			= &amp;sja1110_regs,</div><div class='add'>+	.tag_proto		= DSA_TAG_PROTO_SJA1110,</div><div class='add'>+	.can_limit_mcast_flood	= true,</div><div class='add'>+	.multiple_cascade_ports	= true,</div><div class='add'>+	.fixed_cbs_mapping	= true,</div><div class='add'>+	.ptp_ts_bits		= 32,</div><div class='add'>+	.ptpegr_ts_bytes	= 8,</div><div class='add'>+	.max_frame_mem		= SJA1110_MAX_FRAME_MEMORY,</div><div class='add'>+	.num_ports		= SJA1110_NUM_PORTS,</div><div class='add'>+	.num_cbs_shapers	= SJA1110_MAX_CBS_COUNT,</div><div class='add'>+	.setup_rgmii_delay	= sja1110_setup_rgmii_delay,</div><div class='add'>+	.reset_cmd		= sja1110_reset_cmd,</div><div class='add'>+	.fdb_add_cmd		= sja1105pqrs_fdb_add,</div><div class='add'>+	.fdb_del_cmd		= sja1105pqrs_fdb_del,</div><div class='add'>+	.ptp_cmd_packing	= sja1105pqrs_ptp_cmd_packing,</div><div class='add'>+	.rxtstamp		= sja1110_rxtstamp,</div><div class='add'>+	.txtstamp		= sja1110_txtstamp,</div><div class='add'>+	.disable_microcontroller = sja1110_disable_microcontroller,</div><div class='add'>+	.pcs_mdio_read_c45	= sja1110_pcs_mdio_read_c45,</div><div class='add'>+	.pcs_mdio_write_c45	= sja1110_pcs_mdio_write_c45,</div><div class='add'>+	.port_speed		= {</div><div class='add'>+		[SJA1105_SPEED_AUTO] = 0,</div><div class='add'>+		[SJA1105_SPEED_10MBPS] = 4,</div><div class='add'>+		[SJA1105_SPEED_100MBPS] = 3,</div><div class='add'>+		[SJA1105_SPEED_1000MBPS] = 2,</div><div class='add'>+		[SJA1105_SPEED_2500MBPS] = 1,</div><div class='add'>+	},</div><div class='add'>+	.supports_mii		= {true, true, true, true, false,</div><div class='add'>+				   true, true, true, false, false, false},</div><div class='add'>+	.supports_rmii		= {false, false, true, true, false,</div><div class='add'>+				   false, false, false, false, false, false},</div><div class='add'>+	.supports_rgmii		= {false, false, true, true, false,</div><div class='add'>+				   false, false, false, false, false, false},</div><div class='add'>+	.supports_sgmii		= {false, false, false, false, true,</div><div class='add'>+				   false, false, false, false, false, false},</div><div class='add'>+	.supports_2500basex	= {false, false, false, false, true,</div><div class='add'>+				   false, false, false, false, false, false},</div><div class='add'>+	.internal_phy		= {SJA1105_NO_PHY, SJA1105_PHY_BASE_TX,</div><div class='add'>+				   SJA1105_NO_PHY, SJA1105_NO_PHY,</div><div class='add'>+				   SJA1105_NO_PHY, SJA1105_PHY_BASE_T1,</div><div class='add'>+				   SJA1105_PHY_BASE_T1, SJA1105_PHY_BASE_T1,</div><div class='add'>+				   SJA1105_NO_PHY, SJA1105_NO_PHY,</div><div class='add'>+				   SJA1105_NO_PHY},</div><div class='add'>+	.name			= "SJA1110C",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct sja1105_info sja1110d_info = {</div><div class='add'>+	.device_id		= SJA1110_DEVICE_ID,</div><div class='add'>+	.part_no		= SJA1110D_PART_NO,</div><div class='add'>+	.static_ops		= sja1110_table_ops,</div><div class='add'>+	.dyn_ops		= sja1110_dyn_ops,</div><div class='add'>+	.regs			= &amp;sja1110_regs,</div><div class='add'>+	.tag_proto		= DSA_TAG_PROTO_SJA1110,</div><div class='add'>+	.can_limit_mcast_flood	= true,</div><div class='add'>+	.multiple_cascade_ports	= true,</div><div class='add'>+	.fixed_cbs_mapping	= true,</div><div class='add'>+	.ptp_ts_bits		= 32,</div><div class='add'>+	.ptpegr_ts_bytes	= 8,</div><div class='add'>+	.max_frame_mem		= SJA1110_MAX_FRAME_MEMORY,</div><div class='add'>+	.num_ports		= SJA1110_NUM_PORTS,</div><div class='add'>+	.num_cbs_shapers	= SJA1110_MAX_CBS_COUNT,</div><div class='add'>+	.setup_rgmii_delay	= sja1110_setup_rgmii_delay,</div><div class='add'>+	.reset_cmd		= sja1110_reset_cmd,</div><div class='add'>+	.fdb_add_cmd		= sja1105pqrs_fdb_add,</div><div class='add'>+	.fdb_del_cmd		= sja1105pqrs_fdb_del,</div><div class='add'>+	.ptp_cmd_packing	= sja1105pqrs_ptp_cmd_packing,</div><div class='add'>+	.rxtstamp		= sja1110_rxtstamp,</div><div class='add'>+	.txtstamp		= sja1110_txtstamp,</div><div class='add'>+	.disable_microcontroller = sja1110_disable_microcontroller,</div><div class='add'>+	.pcs_mdio_read_c45	= sja1110_pcs_mdio_read_c45,</div><div class='add'>+	.pcs_mdio_write_c45	= sja1110_pcs_mdio_write_c45,</div><div class='add'>+	.port_speed		= {</div><div class='add'>+		[SJA1105_SPEED_AUTO] = 0,</div><div class='add'>+		[SJA1105_SPEED_10MBPS] = 4,</div><div class='add'>+		[SJA1105_SPEED_100MBPS] = 3,</div><div class='add'>+		[SJA1105_SPEED_1000MBPS] = 2,</div><div class='add'>+		[SJA1105_SPEED_2500MBPS] = 1,</div><div class='add'>+	},</div><div class='add'>+	.supports_mii		= {true, false, true, false, false,</div><div class='add'>+				   true, true, true, false, false, false},</div><div class='add'>+	.supports_rmii		= {false, false, true, false, false,</div><div class='add'>+				   false, false, false, false, false, false},</div><div class='add'>+	.supports_rgmii		= {false, false, true, false, false,</div><div class='add'>+				   false, false, false, false, false, false},</div><div class='add'>+	.supports_sgmii		= {false, true, true, true, true,</div><div class='add'>+				   false, false, false, false, false, false},</div><div class='add'>+	.supports_2500basex     = {false, false, false, true, true,</div><div class='add'>+				   false, false, false, false, false, false},</div><div class='add'>+	.internal_phy		= {SJA1105_NO_PHY, SJA1105_NO_PHY,</div><div class='add'>+				   SJA1105_NO_PHY, SJA1105_NO_PHY,</div><div class='add'>+				   SJA1105_NO_PHY, SJA1105_PHY_BASE_T1,</div><div class='add'>+				   SJA1105_PHY_BASE_T1, SJA1105_PHY_BASE_T1,</div><div class='add'>+				   SJA1105_NO_PHY, SJA1105_NO_PHY,</div><div class='add'>+				   SJA1105_NO_PHY},</div><div class='add'>+	.name			= "SJA1110D",</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/net/dsa/sja1105/sja1105_static_config.c b/drivers/net/dsa/sja1105/sja1105_static_config.c<br/>new file mode 100644<br/>index 000000000000..ffece8a400a6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/sja1105/sja1105_static_config.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/sja1105/sja1105_static_config.c</a></div><div class='hunk'>@@ -0,0 +1,1950 @@</div><div class='add'>+// SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+/* Copyright 2016-2018 NXP</div><div class='add'>+ * Copyright (c) 2018-2019, Vladimir Oltean &lt;olteanv@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+#include "sja1105_static_config.h"</div><div class='add'>+#include &lt;linux/crc32.h&gt;</div><div class='add'>+#include &lt;linux/slab.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+</div><div class='add'>+/* Convenience wrappers over the generic packing functions. These take into</div><div class='add'>+ * account the SJA1105 memory layout quirks and provide some level of</div><div class='add'>+ * programmer protection against incorrect API use. The errors are not expected</div><div class='add'>+ * to occur durring runtime, therefore printing and swallowing them here is</div><div class='add'>+ * appropriate instead of clutterring up higher-level code.</div><div class='add'>+ */</div><div class='add'>+void sja1105_pack(void *buf, const u64 *val, int start, int end, size_t len)</div><div class='add'>+{</div><div class='add'>+	int rc = packing(buf, (u64 *)val, start, end, len,</div><div class='add'>+			 PACK, QUIRK_LSW32_IS_FIRST);</div><div class='add'>+</div><div class='add'>+	if (likely(!rc))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (rc == -EINVAL) {</div><div class='add'>+		pr_err("Start bit (%d) expected to be larger than end (%d)\n",</div><div class='add'>+		       start, end);</div><div class='add'>+	} else if (rc == -ERANGE) {</div><div class='add'>+		pr_err("Field %d-%d too large for 64 bits!\n",</div><div class='add'>+		       start, end);</div><div class='add'>+	}</div><div class='add'>+	dump_stack();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void sja1105_unpack(const void *buf, u64 *val, int start, int end, size_t len)</div><div class='add'>+{</div><div class='add'>+	int rc = packing((void *)buf, val, start, end, len,</div><div class='add'>+			 UNPACK, QUIRK_LSW32_IS_FIRST);</div><div class='add'>+</div><div class='add'>+	if (likely(!rc))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (rc == -EINVAL)</div><div class='add'>+		pr_err("Start bit (%d) expected to be larger than end (%d)\n",</div><div class='add'>+		       start, end);</div><div class='add'>+	else if (rc == -ERANGE)</div><div class='add'>+		pr_err("Field %d-%d too large for 64 bits!\n",</div><div class='add'>+		       start, end);</div><div class='add'>+	dump_stack();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void sja1105_packing(void *buf, u64 *val, int start, int end,</div><div class='add'>+		     size_t len, enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	int rc = packing(buf, val, start, end, len, op, QUIRK_LSW32_IS_FIRST);</div><div class='add'>+</div><div class='add'>+	if (likely(!rc))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (rc == -EINVAL) {</div><div class='add'>+		pr_err("Start bit (%d) expected to be larger than end (%d)\n",</div><div class='add'>+		       start, end);</div><div class='add'>+	} else if (rc == -ERANGE) {</div><div class='add'>+		if ((start - end + 1) &gt; 64)</div><div class='add'>+			pr_err("Field %d-%d too large for 64 bits!\n",</div><div class='add'>+			       start, end);</div><div class='add'>+		else</div><div class='add'>+			pr_err("Cannot store %llx inside bits %d-%d (would truncate)\n",</div><div class='add'>+			       *val, start, end);</div><div class='add'>+	}</div><div class='add'>+	dump_stack();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Little-endian Ethernet CRC32 of data packed as big-endian u32 words */</div><div class='add'>+u32 sja1105_crc32(const void *buf, size_t len)</div><div class='add'>+{</div><div class='add'>+	unsigned int i;</div><div class='add'>+	u64 word;</div><div class='add'>+	u32 crc;</div><div class='add'>+</div><div class='add'>+	/* seed */</div><div class='add'>+	crc = ~0;</div><div class='add'>+	for (i = 0; i &lt; len; i += 4) {</div><div class='add'>+		sja1105_unpack(buf + i, &amp;word, 31, 0, 4);</div><div class='add'>+		crc = crc32_le(crc, (u8 *)&amp;word, 4);</div><div class='add'>+	}</div><div class='add'>+	return ~crc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t sja1105et_avb_params_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+						 enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const size_t size = SJA1105ET_SIZE_AVB_PARAMS_ENTRY;</div><div class='add'>+	struct sja1105_avb_params_entry *entry = entry_ptr;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;destmeta, 95, 48, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;srcmeta,  47,  0, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+size_t sja1105pqrs_avb_params_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					    enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const size_t size = SJA1105PQRS_SIZE_AVB_PARAMS_ENTRY;</div><div class='add'>+	struct sja1105_avb_params_entry *entry = entry_ptr;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;cas_master, 126, 126, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;destmeta,   125,  78, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;srcmeta,     77,  30, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t sja1105et_general_params_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+						     enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const size_t size = SJA1105ET_SIZE_GENERAL_PARAMS_ENTRY;</div><div class='add'>+	struct sja1105_general_params_entry *entry = entry_ptr;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;vllupformat, 319, 319, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;mirr_ptacu,  318, 318, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;switchid,    317, 315, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;hostprio,    314, 312, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;mac_fltres1, 311, 264, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;mac_fltres0, 263, 216, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;mac_flt1,    215, 168, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;mac_flt0,    167, 120, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;incl_srcpt1, 119, 119, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;incl_srcpt0, 118, 118, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;send_meta1,  117, 117, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;send_meta0,  116, 116, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;casc_port,   115, 113, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;host_port,   112, 110, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;mirr_port,   109, 107, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;vlmarker,    106,  75, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;vlmask,       74,  43, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;tpid,         42,  27, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;ignore2stf,   26,  26, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;tpid2,        25,  10, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* TPID and TPID2 are intentionally reversed so that semantic</div><div class='add'>+ * compatibility with E/T is kept.</div><div class='add'>+ */</div><div class='add'>+size_t sja1105pqrs_general_params_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+						enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const size_t size = SJA1105PQRS_SIZE_GENERAL_PARAMS_ENTRY;</div><div class='add'>+	struct sja1105_general_params_entry *entry = entry_ptr;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;vllupformat, 351, 351, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;mirr_ptacu,  350, 350, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;switchid,    349, 347, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;hostprio,    346, 344, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;mac_fltres1, 343, 296, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;mac_fltres0, 295, 248, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;mac_flt1,    247, 200, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;mac_flt0,    199, 152, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;incl_srcpt1, 151, 151, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;incl_srcpt0, 150, 150, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;send_meta1,  149, 149, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;send_meta0,  148, 148, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;casc_port,   147, 145, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;host_port,   144, 142, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;mirr_port,   141, 139, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;vlmarker,    138, 107, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;vlmask,      106,  75, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;tpid2,        74,  59, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;ignore2stf,   58,  58, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;tpid,         57,  42, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;queue_ts,     41,  41, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;egrmirrvid,   40,  29, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;egrmirrpcp,   28,  26, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;egrmirrdei,   25,  25, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;replay_port,  24,  22, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+size_t sja1110_general_params_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					    enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_general_params_entry *entry = entry_ptr;</div><div class='add'>+	const size_t size = SJA1110_SIZE_GENERAL_PARAMS_ENTRY;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;vllupformat,  447, 447, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;mirr_ptacu,   446, 446, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;switchid,     445, 442, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;hostprio,     441, 439, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;mac_fltres1,  438, 391, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;mac_fltres0,  390, 343, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;mac_flt1,     342, 295, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;mac_flt0,     294, 247, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;incl_srcpt1,  246, 246, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;incl_srcpt0,  245, 245, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;send_meta1,   244, 244, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;send_meta0,   243, 243, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;casc_port,    242, 232, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;host_port,    231, 228, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;mirr_port,    227, 224, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;vlmarker,     223, 192, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;vlmask,       191, 160, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;tpid2,        159, 144, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;ignore2stf,   143, 143, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;tpid,         142, 127, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;queue_ts,     126, 126, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;egrmirrvid,   125, 114, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;egrmirrpcp,   113, 111, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;egrmirrdei,   110, 110, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;replay_port,  109, 106, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;tdmaconfigidx, 70,  67, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;header_type,   64,  49, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;tte_en,        16,  16, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t</div><div class='add'>+sja1105_l2_forwarding_params_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					   enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const size_t size = SJA1105_SIZE_L2_FORWARDING_PARAMS_ENTRY;</div><div class='add'>+	struct sja1105_l2_forwarding_params_entry *entry = entry_ptr;</div><div class='add'>+	int offset, i;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;max_dynp, 95, 93, size, op);</div><div class='add'>+	for (i = 0, offset = 13; i &lt; 8; i++, offset += 10)</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;part_spc[i],</div><div class='add'>+				offset + 9, offset + 0, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+size_t sja1110_l2_forwarding_params_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+						  enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_l2_forwarding_params_entry *entry = entry_ptr;</div><div class='add'>+	const size_t size = SJA1105_SIZE_L2_FORWARDING_PARAMS_ENTRY;</div><div class='add'>+	int offset, i;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;max_dynp, 95, 93, size, op);</div><div class='add'>+	for (i = 0, offset = 5; i &lt; 8; i++, offset += 11)</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;part_spc[i],</div><div class='add'>+				offset + 10, offset + 0, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+size_t sja1105_l2_forwarding_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					   enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const size_t size = SJA1105_SIZE_L2_FORWARDING_ENTRY;</div><div class='add'>+	struct sja1105_l2_forwarding_entry *entry = entry_ptr;</div><div class='add'>+	int offset, i;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;bc_domain,  63, 59, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;reach_port, 58, 54, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;fl_domain,  53, 49, size, op);</div><div class='add'>+	for (i = 0, offset = 25; i &lt; 8; i++, offset += 3)</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;vlan_pmap[i],</div><div class='add'>+				offset + 2, offset + 0, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+size_t sja1110_l2_forwarding_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					   enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_l2_forwarding_entry *entry = entry_ptr;</div><div class='add'>+	const size_t size = SJA1105_SIZE_L2_FORWARDING_ENTRY;</div><div class='add'>+	int offset, i;</div><div class='add'>+</div><div class='add'>+	if (entry-&gt;type_egrpcp2outputq) {</div><div class='add'>+		for (i = 0, offset = 31; i &lt; SJA1110_NUM_PORTS;</div><div class='add'>+		     i++, offset += 3) {</div><div class='add'>+			sja1105_packing(buf, &amp;entry-&gt;vlan_pmap[i],</div><div class='add'>+					offset + 2, offset + 0, size, op);</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;bc_domain,  63, 53, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;reach_port, 52, 42, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;fl_domain,  41, 31, size, op);</div><div class='add'>+	}</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t</div><div class='add'>+sja1105et_l2_lookup_params_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					 enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const size_t size = SJA1105ET_SIZE_L2_LOOKUP_PARAMS_ENTRY;</div><div class='add'>+	struct sja1105_l2_lookup_params_entry *entry = entry_ptr;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;maxage,         31, 17, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;dyn_tbsz,       16, 14, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;poly,           13,  6, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;shared_learn,    5,  5, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;no_enf_hostprt,  4,  4, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;no_mgmt_learn,   3,  3, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+size_t sja1105pqrs_l2_lookup_params_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+						  enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const size_t size = SJA1105PQRS_SIZE_L2_LOOKUP_PARAMS_ENTRY;</div><div class='add'>+	struct sja1105_l2_lookup_params_entry *entry = entry_ptr;</div><div class='add'>+	int offset, i;</div><div class='add'>+</div><div class='add'>+	for (i = 0, offset = 58; i &lt; 5; i++, offset += 11)</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;maxaddrp[i],</div><div class='add'>+				offset + 10, offset + 0, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;maxage,         57,  43, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;start_dynspc,   42,  33, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;drpnolearn,     32,  28, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;shared_learn,   27,  27, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;no_enf_hostprt, 26,  26, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;no_mgmt_learn,  25,  25, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;use_static,     24,  24, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;owr_dyn,        23,  23, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;learn_once,     22,  22, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+size_t sja1110_l2_lookup_params_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					      enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_l2_lookup_params_entry *entry = entry_ptr;</div><div class='add'>+	const size_t size = SJA1110_SIZE_L2_LOOKUP_PARAMS_ENTRY;</div><div class='add'>+	int offset, i;</div><div class='add'>+</div><div class='add'>+	for (i = 0, offset = 70; i &lt; SJA1110_NUM_PORTS; i++, offset += 11)</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;maxaddrp[i],</div><div class='add'>+				offset + 10, offset + 0, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;maxage,         69,  55, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;start_dynspc,   54,  45, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;drpnolearn,     44,  34, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;shared_learn,   33,  33, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;no_enf_hostprt, 32,  32, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;no_mgmt_learn,  31,  31, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;use_static,     30,  30, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;owr_dyn,        29,  29, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;learn_once,     28,  28, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+size_t sja1105et_l2_lookup_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					 enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const size_t size = SJA1105ET_SIZE_L2_LOOKUP_ENTRY;</div><div class='add'>+	struct sja1105_l2_lookup_entry *entry = entry_ptr;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;vlanid,    95, 84, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;macaddr,   83, 36, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;destports, 35, 31, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;enfport,   30, 30, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;index,     29, 20, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+size_t sja1105pqrs_l2_lookup_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					   enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const size_t size = SJA1105PQRS_SIZE_L2_LOOKUP_ENTRY;</div><div class='add'>+	struct sja1105_l2_lookup_entry *entry = entry_ptr;</div><div class='add'>+</div><div class='add'>+	if (entry-&gt;lockeds) {</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;tsreg,    159, 159, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;mirrvlan, 158, 147, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;takets,   146, 146, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;mirr,     145, 145, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;retag,    144, 144, size, op);</div><div class='add'>+	} else {</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;touched,  159, 159, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;age,      158, 144, size, op);</div><div class='add'>+	}</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;mask_iotag,   143, 143, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;mask_vlanid,  142, 131, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;mask_macaddr, 130,  83, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;iotag,         82,  82, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;vlanid,        81,  70, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;macaddr,       69,  22, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;destports,     21,  17, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;enfport,       16,  16, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;index,         15,   6, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+size_t sja1110_l2_lookup_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+				       enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const size_t size = SJA1110_SIZE_L2_LOOKUP_ENTRY;</div><div class='add'>+	struct sja1105_l2_lookup_entry *entry = entry_ptr;</div><div class='add'>+</div><div class='add'>+	if (entry-&gt;lockeds) {</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;trap,     168, 168, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;mirrvlan, 167, 156, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;takets,   155, 155, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;mirr,     154, 154, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;retag,    153, 153, size, op);</div><div class='add'>+	} else {</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;touched,  168, 168, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;age,      167, 153, size, op);</div><div class='add'>+	}</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;mask_iotag,   152, 152, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;mask_vlanid,  151, 140, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;mask_macaddr, 139,  92, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;mask_srcport,  91,  88, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;iotag,         87,  87, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;vlanid,        86,  75, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;macaddr,       74,  27, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;srcport,       26,  23, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;destports,     22,  12, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;enfport,       11,  11, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;index,         10,   1, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t sja1105_l2_policing_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+						enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const size_t size = SJA1105_SIZE_L2_POLICING_ENTRY;</div><div class='add'>+	struct sja1105_l2_policing_entry *entry = entry_ptr;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;sharindx,  63, 58, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;smax,      57, 42, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;rate,      41, 26, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;maxlen,    25, 15, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;partition, 14, 12, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+size_t sja1110_l2_policing_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					 enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_l2_policing_entry *entry = entry_ptr;</div><div class='add'>+	const size_t size = SJA1105_SIZE_L2_POLICING_ENTRY;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;sharindx, 63, 57, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;smax,     56, 39, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;rate,     38, 21, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;maxlen,   20, 10, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;partition, 9,  7, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t sja1105et_mac_config_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+						 enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const size_t size = SJA1105ET_SIZE_MAC_CONFIG_ENTRY;</div><div class='add'>+	struct sja1105_mac_config_entry *entry = entry_ptr;</div><div class='add'>+	int offset, i;</div><div class='add'>+</div><div class='add'>+	for (i = 0, offset = 72; i &lt; 8; i++, offset += 19) {</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;enabled[i],</div><div class='add'>+				offset +  0, offset +  0, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;base[i],</div><div class='add'>+				offset +  9, offset +  1, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;top[i],</div><div class='add'>+				offset + 18, offset + 10, size, op);</div><div class='add'>+	}</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;ifg,       71, 67, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;speed,     66, 65, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;tp_delin,  64, 49, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;tp_delout, 48, 33, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;maxage,    32, 25, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;vlanprio,  24, 22, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;vlanid,    21, 10, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;ing_mirr,   9,  9, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;egr_mirr,   8,  8, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;drpnona664, 7,  7, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;drpdtag,    6,  6, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;drpuntag,   5,  5, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;retag,      4,  4, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;dyn_learn,  3,  3, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;egress,     2,  2, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;ingress,    1,  1, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+size_t sja1105pqrs_mac_config_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					    enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const size_t size = SJA1105PQRS_SIZE_MAC_CONFIG_ENTRY;</div><div class='add'>+	struct sja1105_mac_config_entry *entry = entry_ptr;</div><div class='add'>+	int offset, i;</div><div class='add'>+</div><div class='add'>+	for (i = 0, offset = 104; i &lt; 8; i++, offset += 19) {</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;enabled[i],</div><div class='add'>+				offset +  0, offset +  0, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;base[i],</div><div class='add'>+				offset +  9, offset +  1, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;top[i],</div><div class='add'>+				offset + 18, offset + 10, size, op);</div><div class='add'>+	}</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;ifg,       103, 99, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;speed,      98, 97, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;tp_delin,   96, 81, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;tp_delout,  80, 65, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;maxage,     64, 57, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;vlanprio,   56, 54, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;vlanid,     53, 42, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;ing_mirr,   41, 41, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;egr_mirr,   40, 40, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;drpnona664, 39, 39, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;drpdtag,    38, 38, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;drpuntag,   35, 35, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;retag,      34, 34, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;dyn_learn,  33, 33, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;egress,     32, 32, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;ingress,    31, 31, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+size_t sja1110_mac_config_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const size_t size = SJA1105PQRS_SIZE_MAC_CONFIG_ENTRY;</div><div class='add'>+	struct sja1105_mac_config_entry *entry = entry_ptr;</div><div class='add'>+	int offset, i;</div><div class='add'>+</div><div class='add'>+	for (i = 0, offset = 104; i &lt; 8; i++, offset += 19) {</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;enabled[i],</div><div class='add'>+				offset +  0, offset +  0, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;base[i],</div><div class='add'>+				offset +  9, offset +  1, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;top[i],</div><div class='add'>+				offset + 18, offset + 10, size, op);</div><div class='add'>+	}</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;speed,      98, 96, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;tp_delin,   95, 80, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;tp_delout,  79, 64, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;maxage,     63, 56, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;vlanprio,   55, 53, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;vlanid,     52, 41, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;ing_mirr,   40, 40, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;egr_mirr,   39, 39, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;drpnona664, 38, 38, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;drpdtag,    37, 37, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;drpuntag,   34, 34, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;retag,      33, 33, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;dyn_learn,  32, 32, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;egress,     31, 31, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;ingress,    30, 30, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;ifg,        10,  5, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t</div><div class='add'>+sja1105_schedule_entry_points_params_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+						   enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_schedule_entry_points_params_entry *entry = entry_ptr;</div><div class='add'>+	const size_t size = SJA1105_SIZE_SCHEDULE_ENTRY_POINTS_PARAMS_ENTRY;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;clksrc,    31, 30, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;actsubsch, 29, 27, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t</div><div class='add'>+sja1105_schedule_entry_points_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					    enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_schedule_entry_points_entry *entry = entry_ptr;</div><div class='add'>+	const size_t size = SJA1105_SIZE_SCHEDULE_ENTRY_POINTS_ENTRY;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;subschindx, 31, 29, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;delta,      28, 11, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;address,    10, 1,  size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t</div><div class='add'>+sja1110_schedule_entry_points_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					    enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_schedule_entry_points_entry *entry = entry_ptr;</div><div class='add'>+	const size_t size = SJA1110_SIZE_SCHEDULE_ENTRY_POINTS_ENTRY;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;subschindx, 63, 61, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;delta,      60, 43, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;address,    42, 31, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t sja1105_schedule_params_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+						    enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const size_t size = SJA1105_SIZE_SCHEDULE_PARAMS_ENTRY;</div><div class='add'>+	struct sja1105_schedule_params_entry *entry = entry_ptr;</div><div class='add'>+	int offset, i;</div><div class='add'>+</div><div class='add'>+	for (i = 0, offset = 16; i &lt; 8; i++, offset += 10)</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;subscheind[i],</div><div class='add'>+				offset + 9, offset + 0, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t sja1110_schedule_params_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+						    enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_schedule_params_entry *entry = entry_ptr;</div><div class='add'>+	const size_t size = SJA1105_SIZE_SCHEDULE_PARAMS_ENTRY;</div><div class='add'>+	int offset, i;</div><div class='add'>+</div><div class='add'>+	for (i = 0, offset = 0; i &lt; 8; i++, offset += 12)</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;subscheind[i],</div><div class='add'>+				offset + 11, offset + 0, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t sja1105_schedule_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					     enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const size_t size = SJA1105_SIZE_SCHEDULE_ENTRY;</div><div class='add'>+	struct sja1105_schedule_entry *entry = entry_ptr;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;winstindex,  63, 54, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;winend,      53, 53, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;winst,       52, 52, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;destports,   51, 47, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;setvalid,    46, 46, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;txen,        45, 45, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;resmedia_en, 44, 44, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;resmedia,    43, 36, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;vlindex,     35, 26, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;delta,       25, 8,  size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t sja1110_schedule_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					     enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const size_t size = SJA1110_SIZE_SCHEDULE_ENTRY;</div><div class='add'>+	struct sja1105_schedule_entry *entry = entry_ptr;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;winstindex,  95, 84, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;winend,      83, 83, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;winst,       82, 82, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;destports,   81, 71, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;setvalid,    70, 70, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;txen,        69, 69, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;resmedia_en, 68, 68, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;resmedia,    67, 60, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;vlindex,     59, 48, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;delta,       47, 30, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t</div><div class='add'>+sja1105_vl_forwarding_params_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					   enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_vl_forwarding_params_entry *entry = entry_ptr;</div><div class='add'>+	const size_t size = SJA1105_SIZE_VL_FORWARDING_PARAMS_ENTRY;</div><div class='add'>+	int offset, i;</div><div class='add'>+</div><div class='add'>+	for (i = 0, offset = 16; i &lt; 8; i++, offset += 10)</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;partspc[i],</div><div class='add'>+				offset + 9, offset + 0, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;debugen, 15, 15, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t</div><div class='add'>+sja1110_vl_forwarding_params_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					   enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_vl_forwarding_params_entry *entry = entry_ptr;</div><div class='add'>+	const size_t size = SJA1105_SIZE_VL_FORWARDING_PARAMS_ENTRY;</div><div class='add'>+	int offset, i;</div><div class='add'>+</div><div class='add'>+	for (i = 0, offset = 8; i &lt; 8; i++, offset += 11)</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;partspc[i],</div><div class='add'>+				offset + 10, offset + 0, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;debugen, 7, 7, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t sja1105_vl_forwarding_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+						  enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_vl_forwarding_entry *entry = entry_ptr;</div><div class='add'>+	const size_t size = SJA1105_SIZE_VL_FORWARDING_ENTRY;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;type,      31, 31, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;priority,  30, 28, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;partition, 27, 25, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;destports, 24, 20, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t sja1110_vl_forwarding_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+						  enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_vl_forwarding_entry *entry = entry_ptr;</div><div class='add'>+	const size_t size = SJA1105_SIZE_VL_FORWARDING_ENTRY;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;type,      31, 31, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;priority,  30, 28, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;partition, 27, 25, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;destports, 24, 14, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+size_t sja1105_vl_lookup_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+				       enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_vl_lookup_entry *entry = entry_ptr;</div><div class='add'>+	const size_t size = SJA1105_SIZE_VL_LOOKUP_ENTRY;</div><div class='add'>+</div><div class='add'>+	if (entry-&gt;format == SJA1105_VL_FORMAT_PSFP) {</div><div class='add'>+		/* Interpreting vllupformat as 0 */</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;destports,</div><div class='add'>+				95, 91, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;iscritical,</div><div class='add'>+				90, 90, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;macaddr,</div><div class='add'>+				89, 42, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;vlanid,</div><div class='add'>+				41, 30, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;port,</div><div class='add'>+				29, 27, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;vlanprior,</div><div class='add'>+				26, 24, size, op);</div><div class='add'>+	} else {</div><div class='add'>+		/* Interpreting vllupformat as 1 */</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;egrmirr,</div><div class='add'>+				95, 91, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;ingrmirr,</div><div class='add'>+				90, 90, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;vlid,</div><div class='add'>+				57, 42, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;port,</div><div class='add'>+				29, 27, size, op);</div><div class='add'>+	}</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+size_t sja1110_vl_lookup_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+				       enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_vl_lookup_entry *entry = entry_ptr;</div><div class='add'>+	const size_t size = SJA1105_SIZE_VL_LOOKUP_ENTRY;</div><div class='add'>+</div><div class='add'>+	if (entry-&gt;format == SJA1105_VL_FORMAT_PSFP) {</div><div class='add'>+		/* Interpreting vllupformat as 0 */</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;destports,</div><div class='add'>+				94, 84, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;iscritical,</div><div class='add'>+				83, 83, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;macaddr,</div><div class='add'>+				82, 35, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;vlanid,</div><div class='add'>+				34, 23, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;port,</div><div class='add'>+				22, 19, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;vlanprior,</div><div class='add'>+				18, 16, size, op);</div><div class='add'>+	} else {</div><div class='add'>+		/* Interpreting vllupformat as 1 */</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;egrmirr,</div><div class='add'>+				94, 84, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;ingrmirr,</div><div class='add'>+				83, 83, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;vlid,</div><div class='add'>+				50, 35, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;port,</div><div class='add'>+				22, 19, size, op);</div><div class='add'>+	}</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t sja1105_vl_policing_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+						enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_vl_policing_entry *entry = entry_ptr;</div><div class='add'>+	const size_t size = SJA1105_SIZE_VL_POLICING_ENTRY;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;type,      63, 63, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;maxlen,    62, 52, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;sharindx,  51, 42, size, op);</div><div class='add'>+	if (entry-&gt;type == 0) {</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;bag,    41, 28, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;jitter, 27, 18, size, op);</div><div class='add'>+	}</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+size_t sja1110_vl_policing_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					 enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_vl_policing_entry *entry = entry_ptr;</div><div class='add'>+	const size_t size = SJA1105_SIZE_VL_POLICING_ENTRY;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;type,      63, 63, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;maxlen,    62, 52, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;sharindx,  51, 40, size, op);</div><div class='add'>+	if (entry-&gt;type == 0) {</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;bag,    41, 28, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;jitter, 27, 18, size, op);</div><div class='add'>+	}</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+size_t sja1105_vlan_lookup_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					 enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const size_t size = SJA1105_SIZE_VLAN_LOOKUP_ENTRY;</div><div class='add'>+	struct sja1105_vlan_lookup_entry *entry = entry_ptr;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;ving_mirr,  63, 59, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;vegr_mirr,  58, 54, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;vmemb_port, 53, 49, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;vlan_bc,    48, 44, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;tag_port,   43, 39, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;vlanid,     38, 27, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+size_t sja1110_vlan_lookup_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					 enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_vlan_lookup_entry *entry = entry_ptr;</div><div class='add'>+	const size_t size = SJA1110_SIZE_VLAN_LOOKUP_ENTRY;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;ving_mirr,  95, 85, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;vegr_mirr,  84, 74, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;vmemb_port, 73, 63, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;vlan_bc,    62, 52, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;tag_port,   51, 41, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;type_entry, 40, 39, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;vlanid,     38, 27, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t sja1105_xmii_params_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+						enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const size_t size = SJA1105_SIZE_XMII_PARAMS_ENTRY;</div><div class='add'>+	struct sja1105_xmii_params_entry *entry = entry_ptr;</div><div class='add'>+	int offset, i;</div><div class='add'>+</div><div class='add'>+	for (i = 0, offset = 17; i &lt; 5; i++, offset += 3) {</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;xmii_mode[i],</div><div class='add'>+				offset + 1, offset + 0, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;phy_mac[i],</div><div class='add'>+				offset + 2, offset + 2, size, op);</div><div class='add'>+	}</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+size_t sja1110_xmii_params_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					 enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const size_t size = SJA1110_SIZE_XMII_PARAMS_ENTRY;</div><div class='add'>+	struct sja1105_xmii_params_entry *entry = entry_ptr;</div><div class='add'>+	int offset, i;</div><div class='add'>+</div><div class='add'>+	for (i = 0, offset = 20; i &lt; SJA1110_NUM_PORTS; i++, offset += 4) {</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;xmii_mode[i],</div><div class='add'>+				offset + 1, offset + 0, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;phy_mac[i],</div><div class='add'>+				offset + 2, offset + 2, size, op);</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;special[i],</div><div class='add'>+				offset + 3, offset + 3, size, op);</div><div class='add'>+	}</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+size_t sja1105_retagging_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+				       enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_retagging_entry *entry = entry_ptr;</div><div class='add'>+	const size_t size = SJA1105_SIZE_RETAGGING_ENTRY;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;egr_port,       63, 59, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;ing_port,       58, 54, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;vlan_ing,       53, 42, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;vlan_egr,       41, 30, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;do_not_learn,   29, 29, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;use_dest_ports, 28, 28, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;destports,      27, 23, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+size_t sja1110_retagging_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+				       enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_retagging_entry *entry = entry_ptr;</div><div class='add'>+	const size_t size = SJA1105_SIZE_RETAGGING_ENTRY;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;egr_port,       63, 53, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;ing_port,       52, 42, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;vlan_ing,       41, 30, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;vlan_egr,       29, 18, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;do_not_learn,   17, 17, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;use_dest_ports, 16, 16, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;destports,      15, 5, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static size_t sja1110_pcp_remapping_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+						  enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	struct sja1110_pcp_remapping_entry *entry = entry_ptr;</div><div class='add'>+	const size_t size = SJA1110_SIZE_PCP_REMAPPING_ENTRY;</div><div class='add'>+	int offset, i;</div><div class='add'>+</div><div class='add'>+	for (i = 0, offset = 8; i &lt; SJA1105_NUM_TC; i++, offset += 3)</div><div class='add'>+		sja1105_packing(buf, &amp;entry-&gt;egrpcp[i],</div><div class='add'>+				offset + 2, offset + 0, size, op);</div><div class='add'>+</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+size_t sja1105_table_header_packing(void *buf, void *entry_ptr,</div><div class='add'>+				    enum packing_op op)</div><div class='add'>+{</div><div class='add'>+	const size_t size = SJA1105_SIZE_TABLE_HEADER;</div><div class='add'>+	struct sja1105_table_header *entry = entry_ptr;</div><div class='add'>+</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;block_id, 31, 24, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;len,      55, 32, size, op);</div><div class='add'>+	sja1105_packing(buf, &amp;entry-&gt;crc,      95, 64, size, op);</div><div class='add'>+	return size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* WARNING: the *hdr pointer is really non-const, because it is</div><div class='add'>+ * modifying the CRC of the header for a 2-stage packing operation</div><div class='add'>+ */</div><div class='add'>+void</div><div class='add'>+sja1105_table_header_pack_with_crc(void *buf, struct sja1105_table_header *hdr)</div><div class='add'>+{</div><div class='add'>+	/* First pack the table as-is, then calculate the CRC, and</div><div class='add'>+	 * finally put the proper CRC into the packed buffer</div><div class='add'>+	 */</div><div class='add'>+	memset(buf, 0, SJA1105_SIZE_TABLE_HEADER);</div><div class='add'>+	sja1105_table_header_packing(buf, hdr, PACK);</div><div class='add'>+	hdr-&gt;crc = sja1105_crc32(buf, SJA1105_SIZE_TABLE_HEADER - 4);</div><div class='add'>+	sja1105_pack(buf + SJA1105_SIZE_TABLE_HEADER - 4, &amp;hdr-&gt;crc, 31, 0, 4);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sja1105_table_write_crc(u8 *table_start, u8 *crc_ptr)</div><div class='add'>+{</div><div class='add'>+	u64 computed_crc;</div><div class='add'>+	int len_bytes;</div><div class='add'>+</div><div class='add'>+	len_bytes = (uintptr_t)(crc_ptr - table_start);</div><div class='add'>+	computed_crc = sja1105_crc32(table_start, len_bytes);</div><div class='add'>+	sja1105_pack(crc_ptr, &amp;computed_crc, 31, 0, 4);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The block IDs that the switches support are unfortunately sparse, so keep a</div><div class='add'>+ * mapping table to "block indices" and translate back and forth so that we</div><div class='add'>+ * don't waste useless memory in struct sja1105_static_config.</div><div class='add'>+ * Also, since the block id comes from essentially untrusted input (unpacking</div><div class='add'>+ * the static config from userspace) it has to be sanitized (range-checked)</div><div class='add'>+ * before blindly indexing kernel memory with the blk_idx.</div><div class='add'>+ */</div><div class='add'>+static u64 blk_id_map[BLK_IDX_MAX] = {</div><div class='add'>+	[BLK_IDX_SCHEDULE] = BLKID_SCHEDULE,</div><div class='add'>+	[BLK_IDX_SCHEDULE_ENTRY_POINTS] = BLKID_SCHEDULE_ENTRY_POINTS,</div><div class='add'>+	[BLK_IDX_VL_LOOKUP] = BLKID_VL_LOOKUP,</div><div class='add'>+	[BLK_IDX_VL_POLICING] = BLKID_VL_POLICING,</div><div class='add'>+	[BLK_IDX_VL_FORWARDING] = BLKID_VL_FORWARDING,</div><div class='add'>+	[BLK_IDX_L2_LOOKUP] = BLKID_L2_LOOKUP,</div><div class='add'>+	[BLK_IDX_L2_POLICING] = BLKID_L2_POLICING,</div><div class='add'>+	[BLK_IDX_VLAN_LOOKUP] = BLKID_VLAN_LOOKUP,</div><div class='add'>+	[BLK_IDX_L2_FORWARDING] = BLKID_L2_FORWARDING,</div><div class='add'>+	[BLK_IDX_MAC_CONFIG] = BLKID_MAC_CONFIG,</div><div class='add'>+	[BLK_IDX_SCHEDULE_PARAMS] = BLKID_SCHEDULE_PARAMS,</div><div class='add'>+	[BLK_IDX_SCHEDULE_ENTRY_POINTS_PARAMS] = BLKID_SCHEDULE_ENTRY_POINTS_PARAMS,</div><div class='add'>+	[BLK_IDX_VL_FORWARDING_PARAMS] = BLKID_VL_FORWARDING_PARAMS,</div><div class='add'>+	[BLK_IDX_L2_LOOKUP_PARAMS] = BLKID_L2_LOOKUP_PARAMS,</div><div class='add'>+	[BLK_IDX_L2_FORWARDING_PARAMS] = BLKID_L2_FORWARDING_PARAMS,</div><div class='add'>+	[BLK_IDX_AVB_PARAMS] = BLKID_AVB_PARAMS,</div><div class='add'>+	[BLK_IDX_GENERAL_PARAMS] = BLKID_GENERAL_PARAMS,</div><div class='add'>+	[BLK_IDX_RETAGGING] = BLKID_RETAGGING,</div><div class='add'>+	[BLK_IDX_XMII_PARAMS] = BLKID_XMII_PARAMS,</div><div class='add'>+	[BLK_IDX_PCP_REMAPPING] = BLKID_PCP_REMAPPING,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const char *sja1105_static_config_error_msg[] = {</div><div class='add'>+	[SJA1105_CONFIG_OK] = "",</div><div class='add'>+	[SJA1105_TTETHERNET_NOT_SUPPORTED] =</div><div class='add'>+		"schedule-table present, but TTEthernet is "</div><div class='add'>+		"only supported on T and Q/S",</div><div class='add'>+	[SJA1105_INCORRECT_TTETHERNET_CONFIGURATION] =</div><div class='add'>+		"schedule-table present, but one of "</div><div class='add'>+		"schedule-entry-points-table, schedule-parameters-table or "</div><div class='add'>+		"schedule-entry-points-parameters table is empty",</div><div class='add'>+	[SJA1105_INCORRECT_VIRTUAL_LINK_CONFIGURATION] =</div><div class='add'>+		"vl-lookup-table present, but one of vl-policing-table, "</div><div class='add'>+		"vl-forwarding-table or vl-forwarding-parameters-table is empty",</div><div class='add'>+	[SJA1105_MISSING_L2_POLICING_TABLE] =</div><div class='add'>+		"l2-policing-table needs to have at least one entry",</div><div class='add'>+	[SJA1105_MISSING_L2_FORWARDING_TABLE] =</div><div class='add'>+		"l2-forwarding-table is either missing or incomplete",</div><div class='add'>+	[SJA1105_MISSING_L2_FORWARDING_PARAMS_TABLE] =</div><div class='add'>+		"l2-forwarding-parameters-table is missing",</div><div class='add'>+	[SJA1105_MISSING_GENERAL_PARAMS_TABLE] =</div><div class='add'>+		"general-parameters-table is missing",</div><div class='add'>+	[SJA1105_MISSING_VLAN_TABLE] =</div><div class='add'>+		"vlan-lookup-table needs to have at least the default untagged VLAN",</div><div class='add'>+	[SJA1105_MISSING_XMII_TABLE] =</div><div class='add'>+		"xmii-table is missing",</div><div class='add'>+	[SJA1105_MISSING_MAC_TABLE] =</div><div class='add'>+		"mac-configuration-table needs to contain an entry for each port",</div><div class='add'>+	[SJA1105_OVERCOMMITTED_FRAME_MEMORY] =</div><div class='add'>+		"Not allowed to overcommit frame memory. L2 memory partitions "</div><div class='add'>+		"and VL memory partitions share the same space. The sum of all "</div><div class='add'>+		"16 memory partitions is not allowed to be larger than 929 "</div><div class='add'>+		"128-byte blocks (or 910 with retagging). Please adjust "</div><div class='add'>+		"l2-forwarding-parameters-table.part_spc and/or "</div><div class='add'>+		"vl-forwarding-parameters-table.partspc.",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static sja1105_config_valid_t</div><div class='add'>+static_config_check_memory_size(const struct sja1105_table *tables, int max_mem)</div><div class='add'>+{</div><div class='add'>+	const struct sja1105_l2_forwarding_params_entry *l2_fwd_params;</div><div class='add'>+	const struct sja1105_vl_forwarding_params_entry *vl_fwd_params;</div><div class='add'>+	int i, mem = 0;</div><div class='add'>+</div><div class='add'>+	l2_fwd_params = tables[BLK_IDX_L2_FORWARDING_PARAMS].entries;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 8; i++)</div><div class='add'>+		mem += l2_fwd_params-&gt;part_spc[i];</div><div class='add'>+</div><div class='add'>+	if (tables[BLK_IDX_VL_FORWARDING_PARAMS].entry_count) {</div><div class='add'>+		vl_fwd_params = tables[BLK_IDX_VL_FORWARDING_PARAMS].entries;</div><div class='add'>+		for (i = 0; i &lt; 8; i++)</div><div class='add'>+			mem += vl_fwd_params-&gt;partspc[i];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (tables[BLK_IDX_RETAGGING].entry_count)</div><div class='add'>+		max_mem -= SJA1105_FRAME_MEMORY_RETAGGING_OVERHEAD;</div><div class='add'>+</div><div class='add'>+	if (mem &gt; max_mem)</div><div class='add'>+		return SJA1105_OVERCOMMITTED_FRAME_MEMORY;</div><div class='add'>+</div><div class='add'>+	return SJA1105_CONFIG_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+sja1105_config_valid_t</div><div class='add'>+sja1105_static_config_check_valid(const struct sja1105_static_config *config,</div><div class='add'>+				  int max_mem)</div><div class='add'>+{</div><div class='add'>+	const struct sja1105_table *tables = config-&gt;tables;</div><div class='add'>+#define IS_FULL(blk_idx) \</div><div class='add'>+	(tables[blk_idx].entry_count == tables[blk_idx].ops-&gt;max_entry_count)</div><div class='add'>+</div><div class='add'>+	if (tables[BLK_IDX_SCHEDULE].entry_count) {</div><div class='add'>+		if (!tables[BLK_IDX_SCHEDULE].ops-&gt;max_entry_count)</div><div class='add'>+			return SJA1105_TTETHERNET_NOT_SUPPORTED;</div><div class='add'>+</div><div class='add'>+		if (tables[BLK_IDX_SCHEDULE_ENTRY_POINTS].entry_count == 0)</div><div class='add'>+			return SJA1105_INCORRECT_TTETHERNET_CONFIGURATION;</div><div class='add'>+</div><div class='add'>+		if (!IS_FULL(BLK_IDX_SCHEDULE_PARAMS))</div><div class='add'>+			return SJA1105_INCORRECT_TTETHERNET_CONFIGURATION;</div><div class='add'>+</div><div class='add'>+		if (!IS_FULL(BLK_IDX_SCHEDULE_ENTRY_POINTS_PARAMS))</div><div class='add'>+			return SJA1105_INCORRECT_TTETHERNET_CONFIGURATION;</div><div class='add'>+	}</div><div class='add'>+	if (tables[BLK_IDX_VL_LOOKUP].entry_count) {</div><div class='add'>+		struct sja1105_vl_lookup_entry *vl_lookup;</div><div class='add'>+		bool has_critical_links = false;</div><div class='add'>+		int i;</div><div class='add'>+</div><div class='add'>+		vl_lookup = tables[BLK_IDX_VL_LOOKUP].entries;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; tables[BLK_IDX_VL_LOOKUP].entry_count; i++) {</div><div class='add'>+			if (vl_lookup[i].iscritical) {</div><div class='add'>+				has_critical_links = true;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (tables[BLK_IDX_VL_POLICING].entry_count == 0 &amp;&amp;</div><div class='add'>+		    has_critical_links)</div><div class='add'>+			return SJA1105_INCORRECT_VIRTUAL_LINK_CONFIGURATION;</div><div class='add'>+</div><div class='add'>+		if (tables[BLK_IDX_VL_FORWARDING].entry_count == 0 &amp;&amp;</div><div class='add'>+		    has_critical_links)</div><div class='add'>+			return SJA1105_INCORRECT_VIRTUAL_LINK_CONFIGURATION;</div><div class='add'>+</div><div class='add'>+		if (tables[BLK_IDX_VL_FORWARDING_PARAMS].entry_count == 0 &amp;&amp;</div><div class='add'>+		    has_critical_links)</div><div class='add'>+			return SJA1105_INCORRECT_VIRTUAL_LINK_CONFIGURATION;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (tables[BLK_IDX_L2_POLICING].entry_count == 0)</div><div class='add'>+		return SJA1105_MISSING_L2_POLICING_TABLE;</div><div class='add'>+</div><div class='add'>+	if (tables[BLK_IDX_VLAN_LOOKUP].entry_count == 0)</div><div class='add'>+		return SJA1105_MISSING_VLAN_TABLE;</div><div class='add'>+</div><div class='add'>+	if (!IS_FULL(BLK_IDX_L2_FORWARDING))</div><div class='add'>+		return SJA1105_MISSING_L2_FORWARDING_TABLE;</div><div class='add'>+</div><div class='add'>+	if (!IS_FULL(BLK_IDX_MAC_CONFIG))</div><div class='add'>+		return SJA1105_MISSING_MAC_TABLE;</div><div class='add'>+</div><div class='add'>+	if (!IS_FULL(BLK_IDX_L2_FORWARDING_PARAMS))</div><div class='add'>+		return SJA1105_MISSING_L2_FORWARDING_PARAMS_TABLE;</div><div class='add'>+</div><div class='add'>+	if (!IS_FULL(BLK_IDX_GENERAL_PARAMS))</div><div class='add'>+		return SJA1105_MISSING_GENERAL_PARAMS_TABLE;</div><div class='add'>+</div><div class='add'>+	if (!IS_FULL(BLK_IDX_XMII_PARAMS))</div><div class='add'>+		return SJA1105_MISSING_XMII_TABLE;</div><div class='add'>+</div><div class='add'>+	return static_config_check_memory_size(tables, max_mem);</div><div class='add'>+#undef IS_FULL</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void</div><div class='add'>+sja1105_static_config_pack(void *buf, struct sja1105_static_config *config)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_table_header header = {0};</div><div class='add'>+	enum sja1105_blk_idx i;</div><div class='add'>+	char *p = buf;</div><div class='add'>+	int j;</div><div class='add'>+</div><div class='add'>+	sja1105_pack(p, &amp;config-&gt;device_id, 31, 0, 4);</div><div class='add'>+	p += SJA1105_SIZE_DEVICE_ID;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; BLK_IDX_MAX; i++) {</div><div class='add'>+		const struct sja1105_table *table;</div><div class='add'>+		char *table_start;</div><div class='add'>+</div><div class='add'>+		table = &amp;config-&gt;tables[i];</div><div class='add'>+		if (!table-&gt;entry_count)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		header.block_id = blk_id_map[i];</div><div class='add'>+		header.len = table-&gt;entry_count *</div><div class='add'>+			     table-&gt;ops-&gt;packed_entry_size / 4;</div><div class='add'>+		sja1105_table_header_pack_with_crc(p, &amp;header);</div><div class='add'>+		p += SJA1105_SIZE_TABLE_HEADER;</div><div class='add'>+		table_start = p;</div><div class='add'>+		for (j = 0; j &lt; table-&gt;entry_count; j++) {</div><div class='add'>+			u8 *entry_ptr = table-&gt;entries;</div><div class='add'>+</div><div class='add'>+			entry_ptr += j * table-&gt;ops-&gt;unpacked_entry_size;</div><div class='add'>+			memset(p, 0, table-&gt;ops-&gt;packed_entry_size);</div><div class='add'>+			table-&gt;ops-&gt;packing(p, entry_ptr, PACK);</div><div class='add'>+			p += table-&gt;ops-&gt;packed_entry_size;</div><div class='add'>+		}</div><div class='add'>+		sja1105_table_write_crc(table_start, p);</div><div class='add'>+		p += 4;</div><div class='add'>+	}</div><div class='add'>+	/* Final header:</div><div class='add'>+	 * Block ID does not matter</div><div class='add'>+	 * Length of 0 marks that header is final</div><div class='add'>+	 * CRC will be replaced on-the-fly on "config upload"</div><div class='add'>+	 */</div><div class='add'>+	header.block_id = 0;</div><div class='add'>+	header.len = 0;</div><div class='add'>+	header.crc = 0xDEADBEEF;</div><div class='add'>+	memset(p, 0, SJA1105_SIZE_TABLE_HEADER);</div><div class='add'>+	sja1105_table_header_packing(p, &amp;header, PACK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+size_t</div><div class='add'>+sja1105_static_config_get_length(const struct sja1105_static_config *config)</div><div class='add'>+{</div><div class='add'>+	unsigned int sum;</div><div class='add'>+	unsigned int header_count;</div><div class='add'>+	enum sja1105_blk_idx i;</div><div class='add'>+</div><div class='add'>+	/* Ending header */</div><div class='add'>+	header_count = 1;</div><div class='add'>+	sum = SJA1105_SIZE_DEVICE_ID;</div><div class='add'>+</div><div class='add'>+	/* Tables (headers and entries) */</div><div class='add'>+	for (i = 0; i &lt; BLK_IDX_MAX; i++) {</div><div class='add'>+		const struct sja1105_table *table;</div><div class='add'>+</div><div class='add'>+		table = &amp;config-&gt;tables[i];</div><div class='add'>+		if (table-&gt;entry_count)</div><div class='add'>+			header_count++;</div><div class='add'>+</div><div class='add'>+		sum += table-&gt;ops-&gt;packed_entry_size * table-&gt;entry_count;</div><div class='add'>+	}</div><div class='add'>+	/* Headers have an additional CRC at the end */</div><div class='add'>+	sum += header_count * (SJA1105_SIZE_TABLE_HEADER + 4);</div><div class='add'>+	/* Last header does not have an extra CRC because there is no data */</div><div class='add'>+	sum -= 4;</div><div class='add'>+</div><div class='add'>+	return sum;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Compatibility matrices */</div><div class='add'>+</div><div class='add'>+/* SJA1105E: First generation, no TTEthernet */</div><div class='add'>+const struct sja1105_table_ops sja1105e_table_ops[BLK_IDX_MAX] = {</div><div class='add'>+	[BLK_IDX_L2_LOOKUP] = {</div><div class='add'>+		.packing = sja1105et_l2_lookup_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_l2_lookup_entry),</div><div class='add'>+		.packed_entry_size = SJA1105ET_SIZE_L2_LOOKUP_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_LOOKUP_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_POLICING] = {</div><div class='add'>+		.packing = sja1105_l2_policing_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_l2_policing_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_L2_POLICING_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_POLICING_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_VLAN_LOOKUP] = {</div><div class='add'>+		.packing = sja1105_vlan_lookup_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_vlan_lookup_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_VLAN_LOOKUP_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_VLAN_LOOKUP_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_FORWARDING] = {</div><div class='add'>+		.packing = sja1105_l2_forwarding_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_l2_forwarding_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_L2_FORWARDING_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_FORWARDING_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_MAC_CONFIG] = {</div><div class='add'>+		.packing = sja1105et_mac_config_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_mac_config_entry),</div><div class='add'>+		.packed_entry_size = SJA1105ET_SIZE_MAC_CONFIG_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_MAC_CONFIG_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_LOOKUP_PARAMS] = {</div><div class='add'>+		.packing = sja1105et_l2_lookup_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_l2_lookup_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105ET_SIZE_L2_LOOKUP_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_LOOKUP_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_FORWARDING_PARAMS] = {</div><div class='add'>+		.packing = sja1105_l2_forwarding_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_l2_forwarding_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_L2_FORWARDING_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_FORWARDING_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_AVB_PARAMS] = {</div><div class='add'>+		.packing = sja1105et_avb_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_avb_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105ET_SIZE_AVB_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_AVB_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_GENERAL_PARAMS] = {</div><div class='add'>+		.packing = sja1105et_general_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_general_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105ET_SIZE_GENERAL_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_GENERAL_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_RETAGGING] = {</div><div class='add'>+		.packing = sja1105_retagging_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_retagging_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_RETAGGING_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_RETAGGING_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_XMII_PARAMS] = {</div><div class='add'>+		.packing = sja1105_xmii_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_xmii_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_XMII_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_XMII_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SJA1105T: First generation, TTEthernet */</div><div class='add'>+const struct sja1105_table_ops sja1105t_table_ops[BLK_IDX_MAX] = {</div><div class='add'>+	[BLK_IDX_SCHEDULE] = {</div><div class='add'>+		.packing = sja1105_schedule_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_schedule_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_SCHEDULE_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_SCHEDULE_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_SCHEDULE_ENTRY_POINTS] = {</div><div class='add'>+		.packing = sja1105_schedule_entry_points_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_schedule_entry_points_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_SCHEDULE_ENTRY_POINTS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_SCHEDULE_ENTRY_POINTS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_VL_LOOKUP] = {</div><div class='add'>+		.packing = sja1105_vl_lookup_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_vl_lookup_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_VL_LOOKUP_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_VL_LOOKUP_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_VL_POLICING] = {</div><div class='add'>+		.packing = sja1105_vl_policing_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_vl_policing_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_VL_POLICING_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_VL_POLICING_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_VL_FORWARDING] = {</div><div class='add'>+		.packing = sja1105_vl_forwarding_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_vl_forwarding_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_VL_FORWARDING_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_VL_FORWARDING_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_LOOKUP] = {</div><div class='add'>+		.packing = sja1105et_l2_lookup_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_l2_lookup_entry),</div><div class='add'>+		.packed_entry_size = SJA1105ET_SIZE_L2_LOOKUP_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_LOOKUP_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_POLICING] = {</div><div class='add'>+		.packing = sja1105_l2_policing_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_l2_policing_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_L2_POLICING_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_POLICING_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_VLAN_LOOKUP] = {</div><div class='add'>+		.packing = sja1105_vlan_lookup_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_vlan_lookup_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_VLAN_LOOKUP_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_VLAN_LOOKUP_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_FORWARDING] = {</div><div class='add'>+		.packing = sja1105_l2_forwarding_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_l2_forwarding_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_L2_FORWARDING_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_FORWARDING_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_MAC_CONFIG] = {</div><div class='add'>+		.packing = sja1105et_mac_config_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_mac_config_entry),</div><div class='add'>+		.packed_entry_size = SJA1105ET_SIZE_MAC_CONFIG_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_MAC_CONFIG_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_SCHEDULE_PARAMS] = {</div><div class='add'>+		.packing = sja1105_schedule_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_schedule_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_SCHEDULE_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_SCHEDULE_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_SCHEDULE_ENTRY_POINTS_PARAMS] = {</div><div class='add'>+		.packing = sja1105_schedule_entry_points_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_schedule_entry_points_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_SCHEDULE_ENTRY_POINTS_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_SCHEDULE_ENTRY_POINTS_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_VL_FORWARDING_PARAMS] = {</div><div class='add'>+		.packing = sja1105_vl_forwarding_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_vl_forwarding_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_VL_FORWARDING_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_VL_FORWARDING_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_LOOKUP_PARAMS] = {</div><div class='add'>+		.packing = sja1105et_l2_lookup_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_l2_lookup_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105ET_SIZE_L2_LOOKUP_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_LOOKUP_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_FORWARDING_PARAMS] = {</div><div class='add'>+		.packing = sja1105_l2_forwarding_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_l2_forwarding_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_L2_FORWARDING_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_FORWARDING_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_AVB_PARAMS] = {</div><div class='add'>+		.packing = sja1105et_avb_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_avb_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105ET_SIZE_AVB_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_AVB_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_GENERAL_PARAMS] = {</div><div class='add'>+		.packing = sja1105et_general_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_general_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105ET_SIZE_GENERAL_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_GENERAL_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_RETAGGING] = {</div><div class='add'>+		.packing = sja1105_retagging_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_retagging_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_RETAGGING_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_RETAGGING_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_XMII_PARAMS] = {</div><div class='add'>+		.packing = sja1105_xmii_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_xmii_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_XMII_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_XMII_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SJA1105P: Second generation, no TTEthernet, no SGMII */</div><div class='add'>+const struct sja1105_table_ops sja1105p_table_ops[BLK_IDX_MAX] = {</div><div class='add'>+	[BLK_IDX_L2_LOOKUP] = {</div><div class='add'>+		.packing = sja1105pqrs_l2_lookup_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_l2_lookup_entry),</div><div class='add'>+		.packed_entry_size = SJA1105PQRS_SIZE_L2_LOOKUP_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_LOOKUP_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_POLICING] = {</div><div class='add'>+		.packing = sja1105_l2_policing_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_l2_policing_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_L2_POLICING_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_POLICING_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_VLAN_LOOKUP] = {</div><div class='add'>+		.packing = sja1105_vlan_lookup_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_vlan_lookup_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_VLAN_LOOKUP_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_VLAN_LOOKUP_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_FORWARDING] = {</div><div class='add'>+		.packing = sja1105_l2_forwarding_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_l2_forwarding_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_L2_FORWARDING_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_FORWARDING_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_MAC_CONFIG] = {</div><div class='add'>+		.packing = sja1105pqrs_mac_config_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_mac_config_entry),</div><div class='add'>+		.packed_entry_size = SJA1105PQRS_SIZE_MAC_CONFIG_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_MAC_CONFIG_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_LOOKUP_PARAMS] = {</div><div class='add'>+		.packing = sja1105pqrs_l2_lookup_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_l2_lookup_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105PQRS_SIZE_L2_LOOKUP_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_LOOKUP_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_FORWARDING_PARAMS] = {</div><div class='add'>+		.packing = sja1105_l2_forwarding_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_l2_forwarding_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_L2_FORWARDING_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_FORWARDING_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_AVB_PARAMS] = {</div><div class='add'>+		.packing = sja1105pqrs_avb_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_avb_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105PQRS_SIZE_AVB_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_AVB_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_GENERAL_PARAMS] = {</div><div class='add'>+		.packing = sja1105pqrs_general_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_general_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105PQRS_SIZE_GENERAL_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_GENERAL_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_RETAGGING] = {</div><div class='add'>+		.packing = sja1105_retagging_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_retagging_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_RETAGGING_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_RETAGGING_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_XMII_PARAMS] = {</div><div class='add'>+		.packing = sja1105_xmii_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_xmii_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_XMII_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_XMII_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SJA1105Q: Second generation, TTEthernet, no SGMII */</div><div class='add'>+const struct sja1105_table_ops sja1105q_table_ops[BLK_IDX_MAX] = {</div><div class='add'>+	[BLK_IDX_SCHEDULE] = {</div><div class='add'>+		.packing = sja1105_schedule_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_schedule_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_SCHEDULE_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_SCHEDULE_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_SCHEDULE_ENTRY_POINTS] = {</div><div class='add'>+		.packing = sja1105_schedule_entry_points_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_schedule_entry_points_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_SCHEDULE_ENTRY_POINTS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_SCHEDULE_ENTRY_POINTS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_VL_LOOKUP] = {</div><div class='add'>+		.packing = sja1105_vl_lookup_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_vl_lookup_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_VL_LOOKUP_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_VL_LOOKUP_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_VL_POLICING] = {</div><div class='add'>+		.packing = sja1105_vl_policing_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_vl_policing_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_VL_POLICING_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_VL_POLICING_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_VL_FORWARDING] = {</div><div class='add'>+		.packing = sja1105_vl_forwarding_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_vl_forwarding_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_VL_FORWARDING_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_VL_FORWARDING_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_LOOKUP] = {</div><div class='add'>+		.packing = sja1105pqrs_l2_lookup_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_l2_lookup_entry),</div><div class='add'>+		.packed_entry_size = SJA1105PQRS_SIZE_L2_LOOKUP_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_LOOKUP_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_POLICING] = {</div><div class='add'>+		.packing = sja1105_l2_policing_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_l2_policing_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_L2_POLICING_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_POLICING_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_VLAN_LOOKUP] = {</div><div class='add'>+		.packing = sja1105_vlan_lookup_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_vlan_lookup_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_VLAN_LOOKUP_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_VLAN_LOOKUP_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_FORWARDING] = {</div><div class='add'>+		.packing = sja1105_l2_forwarding_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_l2_forwarding_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_L2_FORWARDING_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_FORWARDING_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_MAC_CONFIG] = {</div><div class='add'>+		.packing = sja1105pqrs_mac_config_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_mac_config_entry),</div><div class='add'>+		.packed_entry_size = SJA1105PQRS_SIZE_MAC_CONFIG_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_MAC_CONFIG_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_SCHEDULE_PARAMS] = {</div><div class='add'>+		.packing = sja1105_schedule_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_schedule_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_SCHEDULE_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_SCHEDULE_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_SCHEDULE_ENTRY_POINTS_PARAMS] = {</div><div class='add'>+		.packing = sja1105_schedule_entry_points_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_schedule_entry_points_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_SCHEDULE_ENTRY_POINTS_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_SCHEDULE_ENTRY_POINTS_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_VL_FORWARDING_PARAMS] = {</div><div class='add'>+		.packing = sja1105_vl_forwarding_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_vl_forwarding_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_VL_FORWARDING_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_VL_FORWARDING_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_LOOKUP_PARAMS] = {</div><div class='add'>+		.packing = sja1105pqrs_l2_lookup_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_l2_lookup_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105PQRS_SIZE_L2_LOOKUP_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_LOOKUP_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_FORWARDING_PARAMS] = {</div><div class='add'>+		.packing = sja1105_l2_forwarding_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_l2_forwarding_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_L2_FORWARDING_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_FORWARDING_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_AVB_PARAMS] = {</div><div class='add'>+		.packing = sja1105pqrs_avb_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_avb_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105PQRS_SIZE_AVB_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_AVB_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_GENERAL_PARAMS] = {</div><div class='add'>+		.packing = sja1105pqrs_general_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_general_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105PQRS_SIZE_GENERAL_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_GENERAL_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_RETAGGING] = {</div><div class='add'>+		.packing = sja1105_retagging_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_retagging_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_RETAGGING_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_RETAGGING_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_XMII_PARAMS] = {</div><div class='add'>+		.packing = sja1105_xmii_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_xmii_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_XMII_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_XMII_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SJA1105R: Second generation, no TTEthernet, SGMII */</div><div class='add'>+const struct sja1105_table_ops sja1105r_table_ops[BLK_IDX_MAX] = {</div><div class='add'>+	[BLK_IDX_L2_LOOKUP] = {</div><div class='add'>+		.packing = sja1105pqrs_l2_lookup_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_l2_lookup_entry),</div><div class='add'>+		.packed_entry_size = SJA1105PQRS_SIZE_L2_LOOKUP_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_LOOKUP_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_POLICING] = {</div><div class='add'>+		.packing = sja1105_l2_policing_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_l2_policing_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_L2_POLICING_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_POLICING_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_VLAN_LOOKUP] = {</div><div class='add'>+		.packing = sja1105_vlan_lookup_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_vlan_lookup_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_VLAN_LOOKUP_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_VLAN_LOOKUP_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_FORWARDING] = {</div><div class='add'>+		.packing = sja1105_l2_forwarding_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_l2_forwarding_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_L2_FORWARDING_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_FORWARDING_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_MAC_CONFIG] = {</div><div class='add'>+		.packing = sja1105pqrs_mac_config_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_mac_config_entry),</div><div class='add'>+		.packed_entry_size = SJA1105PQRS_SIZE_MAC_CONFIG_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_MAC_CONFIG_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_LOOKUP_PARAMS] = {</div><div class='add'>+		.packing = sja1105pqrs_l2_lookup_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_l2_lookup_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105PQRS_SIZE_L2_LOOKUP_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_LOOKUP_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_FORWARDING_PARAMS] = {</div><div class='add'>+		.packing = sja1105_l2_forwarding_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_l2_forwarding_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_L2_FORWARDING_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_FORWARDING_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_AVB_PARAMS] = {</div><div class='add'>+		.packing = sja1105pqrs_avb_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_avb_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105PQRS_SIZE_AVB_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_AVB_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_GENERAL_PARAMS] = {</div><div class='add'>+		.packing = sja1105pqrs_general_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_general_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105PQRS_SIZE_GENERAL_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_GENERAL_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_RETAGGING] = {</div><div class='add'>+		.packing = sja1105_retagging_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_retagging_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_RETAGGING_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_RETAGGING_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_XMII_PARAMS] = {</div><div class='add'>+		.packing = sja1105_xmii_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_xmii_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_XMII_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_XMII_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SJA1105S: Second generation, TTEthernet, SGMII */</div><div class='add'>+const struct sja1105_table_ops sja1105s_table_ops[BLK_IDX_MAX] = {</div><div class='add'>+	[BLK_IDX_SCHEDULE] = {</div><div class='add'>+		.packing = sja1105_schedule_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_schedule_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_SCHEDULE_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_SCHEDULE_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_SCHEDULE_ENTRY_POINTS] = {</div><div class='add'>+		.packing = sja1105_schedule_entry_points_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_schedule_entry_points_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_SCHEDULE_ENTRY_POINTS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_SCHEDULE_ENTRY_POINTS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_VL_LOOKUP] = {</div><div class='add'>+		.packing = sja1105_vl_lookup_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_vl_lookup_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_VL_LOOKUP_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_VL_LOOKUP_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_VL_POLICING] = {</div><div class='add'>+		.packing = sja1105_vl_policing_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_vl_policing_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_VL_POLICING_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_VL_POLICING_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_VL_FORWARDING] = {</div><div class='add'>+		.packing = sja1105_vl_forwarding_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_vl_forwarding_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_VL_FORWARDING_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_VL_FORWARDING_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_LOOKUP] = {</div><div class='add'>+		.packing = sja1105pqrs_l2_lookup_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_l2_lookup_entry),</div><div class='add'>+		.packed_entry_size = SJA1105PQRS_SIZE_L2_LOOKUP_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_LOOKUP_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_POLICING] = {</div><div class='add'>+		.packing = sja1105_l2_policing_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_l2_policing_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_L2_POLICING_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_POLICING_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_VLAN_LOOKUP] = {</div><div class='add'>+		.packing = sja1105_vlan_lookup_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_vlan_lookup_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_VLAN_LOOKUP_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_VLAN_LOOKUP_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_FORWARDING] = {</div><div class='add'>+		.packing = sja1105_l2_forwarding_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_l2_forwarding_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_L2_FORWARDING_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_FORWARDING_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_MAC_CONFIG] = {</div><div class='add'>+		.packing = sja1105pqrs_mac_config_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_mac_config_entry),</div><div class='add'>+		.packed_entry_size = SJA1105PQRS_SIZE_MAC_CONFIG_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_MAC_CONFIG_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_SCHEDULE_PARAMS] = {</div><div class='add'>+		.packing = sja1105_schedule_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_schedule_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_SCHEDULE_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_SCHEDULE_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_SCHEDULE_ENTRY_POINTS_PARAMS] = {</div><div class='add'>+		.packing = sja1105_schedule_entry_points_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_schedule_entry_points_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_SCHEDULE_ENTRY_POINTS_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_SCHEDULE_ENTRY_POINTS_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_VL_FORWARDING_PARAMS] = {</div><div class='add'>+		.packing = sja1105_vl_forwarding_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_vl_forwarding_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_VL_FORWARDING_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_VL_FORWARDING_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_LOOKUP_PARAMS] = {</div><div class='add'>+		.packing = sja1105pqrs_l2_lookup_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_l2_lookup_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105PQRS_SIZE_L2_LOOKUP_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_LOOKUP_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_FORWARDING_PARAMS] = {</div><div class='add'>+		.packing = sja1105_l2_forwarding_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_l2_forwarding_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_L2_FORWARDING_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_FORWARDING_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_AVB_PARAMS] = {</div><div class='add'>+		.packing = sja1105pqrs_avb_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_avb_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105PQRS_SIZE_AVB_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_AVB_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_GENERAL_PARAMS] = {</div><div class='add'>+		.packing = sja1105pqrs_general_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_general_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105PQRS_SIZE_GENERAL_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_GENERAL_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_RETAGGING] = {</div><div class='add'>+		.packing = sja1105_retagging_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_retagging_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_RETAGGING_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_RETAGGING_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_XMII_PARAMS] = {</div><div class='add'>+		.packing = sja1105_xmii_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_xmii_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_XMII_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_XMII_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SJA1110A: Third generation */</div><div class='add'>+const struct sja1105_table_ops sja1110_table_ops[BLK_IDX_MAX] = {</div><div class='add'>+	[BLK_IDX_SCHEDULE] = {</div><div class='add'>+		.packing = sja1110_schedule_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_schedule_entry),</div><div class='add'>+		.packed_entry_size = SJA1110_SIZE_SCHEDULE_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1110_MAX_SCHEDULE_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_SCHEDULE_ENTRY_POINTS] = {</div><div class='add'>+		.packing = sja1110_schedule_entry_points_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_schedule_entry_points_entry),</div><div class='add'>+		.packed_entry_size = SJA1110_SIZE_SCHEDULE_ENTRY_POINTS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_SCHEDULE_ENTRY_POINTS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_VL_LOOKUP] = {</div><div class='add'>+		.packing = sja1110_vl_lookup_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_vl_lookup_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_VL_LOOKUP_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1110_MAX_VL_LOOKUP_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_VL_POLICING] = {</div><div class='add'>+		.packing = sja1110_vl_policing_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_vl_policing_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_VL_POLICING_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1110_MAX_VL_POLICING_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_VL_FORWARDING] = {</div><div class='add'>+		.packing = sja1110_vl_forwarding_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_vl_forwarding_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_VL_FORWARDING_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1110_MAX_VL_FORWARDING_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_LOOKUP] = {</div><div class='add'>+		.packing = sja1110_l2_lookup_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_l2_lookup_entry),</div><div class='add'>+		.packed_entry_size = SJA1110_SIZE_L2_LOOKUP_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_LOOKUP_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_POLICING] = {</div><div class='add'>+		.packing = sja1110_l2_policing_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_l2_policing_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_L2_POLICING_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1110_MAX_L2_POLICING_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_VLAN_LOOKUP] = {</div><div class='add'>+		.packing = sja1110_vlan_lookup_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_vlan_lookup_entry),</div><div class='add'>+		.packed_entry_size = SJA1110_SIZE_VLAN_LOOKUP_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_VLAN_LOOKUP_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_FORWARDING] = {</div><div class='add'>+		.packing = sja1110_l2_forwarding_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_l2_forwarding_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_L2_FORWARDING_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1110_MAX_L2_FORWARDING_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_MAC_CONFIG] = {</div><div class='add'>+		.packing = sja1110_mac_config_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_mac_config_entry),</div><div class='add'>+		.packed_entry_size = SJA1105PQRS_SIZE_MAC_CONFIG_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1110_MAX_MAC_CONFIG_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_SCHEDULE_PARAMS] = {</div><div class='add'>+		.packing = sja1110_schedule_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_schedule_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_SCHEDULE_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_SCHEDULE_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_SCHEDULE_ENTRY_POINTS_PARAMS] = {</div><div class='add'>+		.packing = sja1105_schedule_entry_points_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_schedule_entry_points_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_SCHEDULE_ENTRY_POINTS_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_SCHEDULE_ENTRY_POINTS_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_VL_FORWARDING_PARAMS] = {</div><div class='add'>+		.packing = sja1110_vl_forwarding_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_vl_forwarding_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_VL_FORWARDING_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_VL_FORWARDING_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_LOOKUP_PARAMS] = {</div><div class='add'>+		.packing = sja1110_l2_lookup_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_l2_lookup_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1110_SIZE_L2_LOOKUP_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_LOOKUP_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_L2_FORWARDING_PARAMS] = {</div><div class='add'>+		.packing = sja1110_l2_forwarding_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_l2_forwarding_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_L2_FORWARDING_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_L2_FORWARDING_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_AVB_PARAMS] = {</div><div class='add'>+		.packing = sja1105pqrs_avb_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_avb_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1105PQRS_SIZE_AVB_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_AVB_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_GENERAL_PARAMS] = {</div><div class='add'>+		.packing = sja1110_general_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_general_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1110_SIZE_GENERAL_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_GENERAL_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_RETAGGING] = {</div><div class='add'>+		.packing = sja1110_retagging_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_retagging_entry),</div><div class='add'>+		.packed_entry_size = SJA1105_SIZE_RETAGGING_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_RETAGGING_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_XMII_PARAMS] = {</div><div class='add'>+		.packing = sja1110_xmii_params_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1105_xmii_params_entry),</div><div class='add'>+		.packed_entry_size = SJA1110_SIZE_XMII_PARAMS_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1105_MAX_XMII_PARAMS_COUNT,</div><div class='add'>+	},</div><div class='add'>+	[BLK_IDX_PCP_REMAPPING] = {</div><div class='add'>+		.packing = sja1110_pcp_remapping_entry_packing,</div><div class='add'>+		.unpacked_entry_size = sizeof(struct sja1110_pcp_remapping_entry),</div><div class='add'>+		.packed_entry_size = SJA1110_SIZE_PCP_REMAPPING_ENTRY,</div><div class='add'>+		.max_entry_count = SJA1110_MAX_PCP_REMAPPING_COUNT,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int sja1105_static_config_init(struct sja1105_static_config *config,</div><div class='add'>+			       const struct sja1105_table_ops *static_ops,</div><div class='add'>+			       u64 device_id)</div><div class='add'>+{</div><div class='add'>+	enum sja1105_blk_idx i;</div><div class='add'>+</div><div class='add'>+	*config = (struct sja1105_static_config) {0};</div><div class='add'>+</div><div class='add'>+	/* Transfer static_ops array from priv into per-table ops</div><div class='add'>+	 * for handier access</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; BLK_IDX_MAX; i++)</div><div class='add'>+		config-&gt;tables[i].ops = &amp;static_ops[i];</div><div class='add'>+</div><div class='add'>+	config-&gt;device_id = device_id;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void sja1105_static_config_free(struct sja1105_static_config *config)</div><div class='add'>+{</div><div class='add'>+	enum sja1105_blk_idx i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; BLK_IDX_MAX; i++) {</div><div class='add'>+		if (config-&gt;tables[i].entry_count) {</div><div class='add'>+			kfree(config-&gt;tables[i].entries);</div><div class='add'>+			config-&gt;tables[i].entry_count = 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int sja1105_table_delete_entry(struct sja1105_table *table, int i)</div><div class='add'>+{</div><div class='add'>+	size_t entry_size = table-&gt;ops-&gt;unpacked_entry_size;</div><div class='add'>+	u8 *entries = table-&gt;entries;</div><div class='add'>+</div><div class='add'>+	if (i &gt; table-&gt;entry_count)</div><div class='add'>+		return -ERANGE;</div><div class='add'>+</div><div class='add'>+	if (i + 1 &lt; table-&gt;entry_count) {</div><div class='add'>+		memmove(entries + i * entry_size, entries + (i + 1) * entry_size,</div><div class='add'>+			(table-&gt;entry_count - i - 1) * entry_size);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	table-&gt;entry_count--;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* No pointers to table-&gt;entries should be kept when this is called. */</div><div class='add'>+int sja1105_table_resize(struct sja1105_table *table, size_t new_count)</div><div class='add'>+{</div><div class='add'>+	size_t entry_size = table-&gt;ops-&gt;unpacked_entry_size;</div><div class='add'>+	void *new_entries, *old_entries = table-&gt;entries;</div><div class='add'>+</div><div class='add'>+	if (new_count &gt; table-&gt;ops-&gt;max_entry_count)</div><div class='add'>+		return -ERANGE;</div><div class='add'>+</div><div class='add'>+	new_entries = kcalloc(new_count, entry_size, GFP_KERNEL);</div><div class='add'>+	if (!new_entries)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	memcpy(new_entries, old_entries, min(new_count, table-&gt;entry_count) *</div><div class='add'>+		entry_size);</div><div class='add'>+</div><div class='add'>+	table-&gt;entries = new_entries;</div><div class='add'>+	table-&gt;entry_count = new_count;</div><div class='add'>+	kfree(old_entries);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/dsa/sja1105/sja1105_static_config.h b/drivers/net/dsa/sja1105/sja1105_static_config.h<br/>new file mode 100644<br/>index 000000000000..6a372d5f22ae<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/sja1105/sja1105_static_config.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/sja1105/sja1105_static_config.h</a></div><div class='hunk'>@@ -0,0 +1,548 @@</div><div class='add'>+/* SPDX-License-Identifier: BSD-3-Clause */</div><div class='add'>+/* Copyright 2016-2018 NXP</div><div class='add'>+ * Copyright (c) 2018-2019, Vladimir Oltean &lt;olteanv@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+#ifndef _SJA1105_STATIC_CONFIG_H</div><div class='add'>+#define _SJA1105_STATIC_CONFIG_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/packing.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;asm/types.h&gt;</div><div class='add'>+</div><div class='add'>+#define SJA1105_NUM_PORTS				5</div><div class='add'>+#define SJA1110_NUM_PORTS				11</div><div class='add'>+#define SJA1105_MAX_NUM_PORTS				SJA1110_NUM_PORTS</div><div class='add'>+#define SJA1105_NUM_TC					8</div><div class='add'>+</div><div class='add'>+#define SJA1105_SIZE_SPI_MSG_HEADER			4</div><div class='add'>+#define SJA1105_SIZE_SPI_MSG_MAXLEN			(64 * 4)</div><div class='add'>+#define SJA1105_SIZE_DEVICE_ID				4</div><div class='add'>+#define SJA1105_SIZE_TABLE_HEADER			12</div><div class='add'>+#define SJA1105_SIZE_SCHEDULE_ENTRY			8</div><div class='add'>+#define SJA1110_SIZE_SCHEDULE_ENTRY			12</div><div class='add'>+#define SJA1105_SIZE_SCHEDULE_ENTRY_POINTS_ENTRY	4</div><div class='add'>+#define SJA1110_SIZE_SCHEDULE_ENTRY_POINTS_ENTRY	8</div><div class='add'>+#define SJA1105_SIZE_VL_LOOKUP_ENTRY			12</div><div class='add'>+#define SJA1105_SIZE_VL_POLICING_ENTRY			8</div><div class='add'>+#define SJA1105_SIZE_VL_FORWARDING_ENTRY		4</div><div class='add'>+#define SJA1105_SIZE_L2_POLICING_ENTRY			8</div><div class='add'>+#define SJA1105_SIZE_VLAN_LOOKUP_ENTRY			8</div><div class='add'>+#define SJA1110_SIZE_VLAN_LOOKUP_ENTRY			12</div><div class='add'>+#define SJA1105_SIZE_L2_FORWARDING_ENTRY		8</div><div class='add'>+#define SJA1105_SIZE_L2_FORWARDING_PARAMS_ENTRY		12</div><div class='add'>+#define SJA1105_SIZE_RETAGGING_ENTRY			8</div><div class='add'>+#define SJA1105_SIZE_XMII_PARAMS_ENTRY			4</div><div class='add'>+#define SJA1110_SIZE_XMII_PARAMS_ENTRY			8</div><div class='add'>+#define SJA1105_SIZE_SCHEDULE_PARAMS_ENTRY		12</div><div class='add'>+#define SJA1105_SIZE_SCHEDULE_ENTRY_POINTS_PARAMS_ENTRY	4</div><div class='add'>+#define SJA1105_SIZE_VL_FORWARDING_PARAMS_ENTRY         12</div><div class='add'>+#define SJA1105ET_SIZE_L2_LOOKUP_ENTRY			12</div><div class='add'>+#define SJA1105ET_SIZE_MAC_CONFIG_ENTRY			28</div><div class='add'>+#define SJA1105ET_SIZE_L2_LOOKUP_PARAMS_ENTRY		4</div><div class='add'>+#define SJA1105ET_SIZE_GENERAL_PARAMS_ENTRY		40</div><div class='add'>+#define SJA1105ET_SIZE_AVB_PARAMS_ENTRY			12</div><div class='add'>+#define SJA1105ET_SIZE_CBS_ENTRY			16</div><div class='add'>+#define SJA1105PQRS_SIZE_L2_LOOKUP_ENTRY		20</div><div class='add'>+#define SJA1110_SIZE_L2_LOOKUP_ENTRY			24</div><div class='add'>+#define SJA1105PQRS_SIZE_MAC_CONFIG_ENTRY		32</div><div class='add'>+#define SJA1105PQRS_SIZE_L2_LOOKUP_PARAMS_ENTRY		16</div><div class='add'>+#define SJA1110_SIZE_L2_LOOKUP_PARAMS_ENTRY		28</div><div class='add'>+#define SJA1105PQRS_SIZE_GENERAL_PARAMS_ENTRY		44</div><div class='add'>+#define SJA1110_SIZE_GENERAL_PARAMS_ENTRY		56</div><div class='add'>+#define SJA1105PQRS_SIZE_AVB_PARAMS_ENTRY		16</div><div class='add'>+#define SJA1105PQRS_SIZE_CBS_ENTRY			20</div><div class='add'>+#define SJA1110_SIZE_PCP_REMAPPING_ENTRY		4</div><div class='add'>+</div><div class='add'>+/* UM10944.pdf Page 11, Table 2. Configuration Blocks */</div><div class='add'>+enum {</div><div class='add'>+	BLKID_SCHEDULE					= 0x00,</div><div class='add'>+	BLKID_SCHEDULE_ENTRY_POINTS			= 0x01,</div><div class='add'>+	BLKID_VL_LOOKUP					= 0x02,</div><div class='add'>+	BLKID_VL_POLICING				= 0x03,</div><div class='add'>+	BLKID_VL_FORWARDING				= 0x04,</div><div class='add'>+	BLKID_L2_LOOKUP					= 0x05,</div><div class='add'>+	BLKID_L2_POLICING				= 0x06,</div><div class='add'>+	BLKID_VLAN_LOOKUP				= 0x07,</div><div class='add'>+	BLKID_L2_FORWARDING				= 0x08,</div><div class='add'>+	BLKID_MAC_CONFIG				= 0x09,</div><div class='add'>+	BLKID_SCHEDULE_PARAMS				= 0x0A,</div><div class='add'>+	BLKID_SCHEDULE_ENTRY_POINTS_PARAMS		= 0x0B,</div><div class='add'>+	BLKID_VL_FORWARDING_PARAMS			= 0x0C,</div><div class='add'>+	BLKID_L2_LOOKUP_PARAMS				= 0x0D,</div><div class='add'>+	BLKID_L2_FORWARDING_PARAMS			= 0x0E,</div><div class='add'>+	BLKID_AVB_PARAMS				= 0x10,</div><div class='add'>+	BLKID_GENERAL_PARAMS				= 0x11,</div><div class='add'>+	BLKID_RETAGGING					= 0x12,</div><div class='add'>+	BLKID_CBS					= 0x13,</div><div class='add'>+	BLKID_PCP_REMAPPING				= 0x1C,</div><div class='add'>+	BLKID_XMII_PARAMS				= 0x4E,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum sja1105_blk_idx {</div><div class='add'>+	BLK_IDX_SCHEDULE = 0,</div><div class='add'>+	BLK_IDX_SCHEDULE_ENTRY_POINTS,</div><div class='add'>+	BLK_IDX_VL_LOOKUP,</div><div class='add'>+	BLK_IDX_VL_POLICING,</div><div class='add'>+	BLK_IDX_VL_FORWARDING,</div><div class='add'>+	BLK_IDX_L2_LOOKUP,</div><div class='add'>+	BLK_IDX_L2_POLICING,</div><div class='add'>+	BLK_IDX_VLAN_LOOKUP,</div><div class='add'>+	BLK_IDX_L2_FORWARDING,</div><div class='add'>+	BLK_IDX_MAC_CONFIG,</div><div class='add'>+	BLK_IDX_SCHEDULE_PARAMS,</div><div class='add'>+	BLK_IDX_SCHEDULE_ENTRY_POINTS_PARAMS,</div><div class='add'>+	BLK_IDX_VL_FORWARDING_PARAMS,</div><div class='add'>+	BLK_IDX_L2_LOOKUP_PARAMS,</div><div class='add'>+	BLK_IDX_L2_FORWARDING_PARAMS,</div><div class='add'>+	BLK_IDX_AVB_PARAMS,</div><div class='add'>+	BLK_IDX_GENERAL_PARAMS,</div><div class='add'>+	BLK_IDX_RETAGGING,</div><div class='add'>+	BLK_IDX_CBS,</div><div class='add'>+	BLK_IDX_XMII_PARAMS,</div><div class='add'>+	BLK_IDX_PCP_REMAPPING,</div><div class='add'>+	BLK_IDX_MAX,</div><div class='add'>+	/* Fake block indices that are only valid for dynamic access */</div><div class='add'>+	BLK_IDX_MGMT_ROUTE,</div><div class='add'>+	BLK_IDX_MAX_DYN,</div><div class='add'>+	BLK_IDX_INVAL = -1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define SJA1105_MAX_SCHEDULE_COUNT			1024</div><div class='add'>+#define SJA1110_MAX_SCHEDULE_COUNT			4096</div><div class='add'>+#define SJA1105_MAX_SCHEDULE_ENTRY_POINTS_COUNT		2048</div><div class='add'>+#define SJA1105_MAX_VL_LOOKUP_COUNT			1024</div><div class='add'>+#define SJA1110_MAX_VL_LOOKUP_COUNT			4096</div><div class='add'>+#define SJA1105_MAX_VL_POLICING_COUNT			1024</div><div class='add'>+#define SJA1110_MAX_VL_POLICING_COUNT			4096</div><div class='add'>+#define SJA1105_MAX_VL_FORWARDING_COUNT			1024</div><div class='add'>+#define SJA1110_MAX_VL_FORWARDING_COUNT			4096</div><div class='add'>+#define SJA1105_MAX_L2_LOOKUP_COUNT			1024</div><div class='add'>+#define SJA1105_MAX_L2_POLICING_COUNT			45</div><div class='add'>+#define SJA1110_MAX_L2_POLICING_COUNT			110</div><div class='add'>+#define SJA1105_MAX_VLAN_LOOKUP_COUNT			4096</div><div class='add'>+#define SJA1105_MAX_L2_FORWARDING_COUNT			13</div><div class='add'>+#define SJA1110_MAX_L2_FORWARDING_COUNT			19</div><div class='add'>+#define SJA1105_MAX_MAC_CONFIG_COUNT			5</div><div class='add'>+#define SJA1110_MAX_MAC_CONFIG_COUNT			11</div><div class='add'>+#define SJA1105_MAX_SCHEDULE_PARAMS_COUNT		1</div><div class='add'>+#define SJA1105_MAX_SCHEDULE_ENTRY_POINTS_PARAMS_COUNT	1</div><div class='add'>+#define SJA1105_MAX_VL_FORWARDING_PARAMS_COUNT		1</div><div class='add'>+#define SJA1105_MAX_L2_LOOKUP_PARAMS_COUNT		1</div><div class='add'>+#define SJA1105_MAX_L2_FORWARDING_PARAMS_COUNT		1</div><div class='add'>+#define SJA1105_MAX_GENERAL_PARAMS_COUNT		1</div><div class='add'>+#define SJA1105_MAX_RETAGGING_COUNT			32</div><div class='add'>+#define SJA1105_MAX_XMII_PARAMS_COUNT			1</div><div class='add'>+#define SJA1105_MAX_AVB_PARAMS_COUNT			1</div><div class='add'>+#define SJA1105ET_MAX_CBS_COUNT				10</div><div class='add'>+#define SJA1105PQRS_MAX_CBS_COUNT			16</div><div class='add'>+#define SJA1110_MAX_CBS_COUNT				80</div><div class='add'>+#define SJA1110_MAX_PCP_REMAPPING_COUNT			11</div><div class='add'>+</div><div class='add'>+#define SJA1105_MAX_FRAME_MEMORY			929</div><div class='add'>+#define SJA1110_MAX_FRAME_MEMORY			1820</div><div class='add'>+#define SJA1105_FRAME_MEMORY_RETAGGING_OVERHEAD		19</div><div class='add'>+#define SJA1105_VL_FRAME_MEMORY				100</div><div class='add'>+</div><div class='add'>+#define SJA1105E_DEVICE_ID				0x9C00000Cull</div><div class='add'>+#define SJA1105T_DEVICE_ID				0x9E00030Eull</div><div class='add'>+#define SJA1105PR_DEVICE_ID				0xAF00030Eull</div><div class='add'>+#define SJA1105QS_DEVICE_ID				0xAE00030Eull</div><div class='add'>+#define SJA1110_DEVICE_ID				0xB700030Full</div><div class='add'>+</div><div class='add'>+#define SJA1105ET_PART_NO				0x9A83</div><div class='add'>+#define SJA1105P_PART_NO				0x9A84</div><div class='add'>+#define SJA1105Q_PART_NO				0x9A85</div><div class='add'>+#define SJA1105R_PART_NO				0x9A86</div><div class='add'>+#define SJA1105S_PART_NO				0x9A87</div><div class='add'>+#define SJA1110A_PART_NO				0x1110</div><div class='add'>+#define SJA1110B_PART_NO				0x1111</div><div class='add'>+#define SJA1110C_PART_NO				0x1112</div><div class='add'>+#define SJA1110D_PART_NO				0x1113</div><div class='add'>+</div><div class='add'>+#define SJA1110_ACU			0x1c4400</div><div class='add'>+#define SJA1110_RGU			0x1c6000</div><div class='add'>+#define SJA1110_CGU			0x1c6400</div><div class='add'>+</div><div class='add'>+#define SJA1110_SPI_ADDR(x)		((x) / 4)</div><div class='add'>+#define SJA1110_ACU_ADDR(x)		(SJA1110_ACU + SJA1110_SPI_ADDR(x))</div><div class='add'>+#define SJA1110_CGU_ADDR(x)		(SJA1110_CGU + SJA1110_SPI_ADDR(x))</div><div class='add'>+#define SJA1110_RGU_ADDR(x)		(SJA1110_RGU + SJA1110_SPI_ADDR(x))</div><div class='add'>+</div><div class='add'>+#define SJA1105_RSV_ADDR		0xffffffffffffffffull</div><div class='add'>+</div><div class='add'>+struct sja1105_schedule_entry {</div><div class='add'>+	u64 winstindex;</div><div class='add'>+	u64 winend;</div><div class='add'>+	u64 winst;</div><div class='add'>+	u64 destports;</div><div class='add'>+	u64 setvalid;</div><div class='add'>+	u64 txen;</div><div class='add'>+	u64 resmedia_en;</div><div class='add'>+	u64 resmedia;</div><div class='add'>+	u64 vlindex;</div><div class='add'>+	u64 delta;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1105_schedule_params_entry {</div><div class='add'>+	u64 subscheind[8];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1105_general_params_entry {</div><div class='add'>+	u64 vllupformat;</div><div class='add'>+	u64 mirr_ptacu;</div><div class='add'>+	u64 switchid;</div><div class='add'>+	u64 hostprio;</div><div class='add'>+	u64 mac_fltres1;</div><div class='add'>+	u64 mac_fltres0;</div><div class='add'>+	u64 mac_flt1;</div><div class='add'>+	u64 mac_flt0;</div><div class='add'>+	u64 incl_srcpt1;</div><div class='add'>+	u64 incl_srcpt0;</div><div class='add'>+	u64 send_meta1;</div><div class='add'>+	u64 send_meta0;</div><div class='add'>+	u64 casc_port;</div><div class='add'>+	u64 host_port;</div><div class='add'>+	u64 mirr_port;</div><div class='add'>+	u64 vlmarker;</div><div class='add'>+	u64 vlmask;</div><div class='add'>+	u64 tpid;</div><div class='add'>+	u64 ignore2stf;</div><div class='add'>+	u64 tpid2;</div><div class='add'>+	/* P/Q/R/S only */</div><div class='add'>+	u64 queue_ts;</div><div class='add'>+	u64 egrmirrvid;</div><div class='add'>+	u64 egrmirrpcp;</div><div class='add'>+	u64 egrmirrdei;</div><div class='add'>+	u64 replay_port;</div><div class='add'>+	/* SJA1110 only */</div><div class='add'>+	u64 tte_en;</div><div class='add'>+	u64 tdmaconfigidx;</div><div class='add'>+	u64 header_type;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1105_schedule_entry_points_entry {</div><div class='add'>+	u64 subschindx;</div><div class='add'>+	u64 delta;</div><div class='add'>+	u64 address;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1105_schedule_entry_points_params_entry {</div><div class='add'>+	u64 clksrc;</div><div class='add'>+	u64 actsubsch;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1105_vlan_lookup_entry {</div><div class='add'>+	u64 ving_mirr;</div><div class='add'>+	u64 vegr_mirr;</div><div class='add'>+	u64 vmemb_port;</div><div class='add'>+	u64 vlan_bc;</div><div class='add'>+	u64 tag_port;</div><div class='add'>+	u64 vlanid;</div><div class='add'>+	u64 type_entry; /* SJA1110 only */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1105_l2_lookup_entry {</div><div class='add'>+	u64 vlanid;</div><div class='add'>+	u64 macaddr;</div><div class='add'>+	u64 destports;</div><div class='add'>+	u64 enfport;</div><div class='add'>+	u64 index;</div><div class='add'>+	/* P/Q/R/S only */</div><div class='add'>+	u64 mask_iotag;</div><div class='add'>+	u64 mask_vlanid;</div><div class='add'>+	u64 mask_macaddr;</div><div class='add'>+	u64 mask_srcport;</div><div class='add'>+	u64 iotag;</div><div class='add'>+	u64 srcport;</div><div class='add'>+	u64 lockeds;</div><div class='add'>+	union {</div><div class='add'>+		/* LOCKEDS=1: Static FDB entries */</div><div class='add'>+		struct {</div><div class='add'>+			/* TSREG is deprecated in SJA1110, TRAP is supported only</div><div class='add'>+			 * in SJA1110.</div><div class='add'>+			 */</div><div class='add'>+			u64 trap;</div><div class='add'>+			u64 tsreg;</div><div class='add'>+			u64 mirrvlan;</div><div class='add'>+			u64 takets;</div><div class='add'>+			u64 mirr;</div><div class='add'>+			u64 retag;</div><div class='add'>+		};</div><div class='add'>+		/* LOCKEDS=0: Dynamically learned FDB entries */</div><div class='add'>+		struct {</div><div class='add'>+			u64 touched;</div><div class='add'>+			u64 age;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1105_l2_lookup_params_entry {</div><div class='add'>+	u64 maxaddrp[SJA1105_MAX_NUM_PORTS]; /* P/Q/R/S only */</div><div class='add'>+	u64 start_dynspc;    /* P/Q/R/S only */</div><div class='add'>+	u64 drpnolearn;      /* P/Q/R/S only */</div><div class='add'>+	u64 use_static;      /* P/Q/R/S only */</div><div class='add'>+	u64 owr_dyn;         /* P/Q/R/S only */</div><div class='add'>+	u64 learn_once;      /* P/Q/R/S only */</div><div class='add'>+	u64 maxage;          /* Shared */</div><div class='add'>+	u64 dyn_tbsz;        /* E/T only */</div><div class='add'>+	u64 poly;            /* E/T only */</div><div class='add'>+	u64 shared_learn;    /* Shared */</div><div class='add'>+	u64 no_enf_hostprt;  /* Shared */</div><div class='add'>+	u64 no_mgmt_learn;   /* Shared */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1105_l2_forwarding_entry {</div><div class='add'>+	u64 bc_domain;</div><div class='add'>+	u64 reach_port;</div><div class='add'>+	u64 fl_domain;</div><div class='add'>+	/* This is actually max(SJA1105_NUM_TC, SJA1105_MAX_NUM_PORTS) */</div><div class='add'>+	u64 vlan_pmap[SJA1105_MAX_NUM_PORTS];</div><div class='add'>+	bool type_egrpcp2outputq;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1105_l2_forwarding_params_entry {</div><div class='add'>+	u64 max_dynp;</div><div class='add'>+	u64 part_spc[8];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1105_l2_policing_entry {</div><div class='add'>+	u64 sharindx;</div><div class='add'>+	u64 smax;</div><div class='add'>+	u64 rate;</div><div class='add'>+	u64 maxlen;</div><div class='add'>+	u64 partition;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1105_avb_params_entry {</div><div class='add'>+	u64 cas_master;</div><div class='add'>+	u64 destmeta;</div><div class='add'>+	u64 srcmeta;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1105_mac_config_entry {</div><div class='add'>+	u64 top[8];</div><div class='add'>+	u64 base[8];</div><div class='add'>+	u64 enabled[8];</div><div class='add'>+	u64 ifg;</div><div class='add'>+	u64 speed;</div><div class='add'>+	u64 tp_delin;</div><div class='add'>+	u64 tp_delout;</div><div class='add'>+	u64 maxage;</div><div class='add'>+	u64 vlanprio;</div><div class='add'>+	u64 vlanid;</div><div class='add'>+	u64 ing_mirr;</div><div class='add'>+	u64 egr_mirr;</div><div class='add'>+	u64 drpnona664;</div><div class='add'>+	u64 drpdtag;</div><div class='add'>+	u64 drpuntag;</div><div class='add'>+	u64 retag;</div><div class='add'>+	u64 dyn_learn;</div><div class='add'>+	u64 egress;</div><div class='add'>+	u64 ingress;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1105_retagging_entry {</div><div class='add'>+	u64 egr_port;</div><div class='add'>+	u64 ing_port;</div><div class='add'>+	u64 vlan_ing;</div><div class='add'>+	u64 vlan_egr;</div><div class='add'>+	u64 do_not_learn;</div><div class='add'>+	u64 use_dest_ports;</div><div class='add'>+	u64 destports;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1105_cbs_entry {</div><div class='add'>+	u64 port; /* Not used for SJA1110 */</div><div class='add'>+	u64 prio; /* Not used for SJA1110 */</div><div class='add'>+	u64 credit_hi;</div><div class='add'>+	u64 credit_lo;</div><div class='add'>+	u64 send_slope;</div><div class='add'>+	u64 idle_slope;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1105_xmii_params_entry {</div><div class='add'>+	u64 phy_mac[SJA1105_MAX_NUM_PORTS];</div><div class='add'>+	u64 xmii_mode[SJA1105_MAX_NUM_PORTS];</div><div class='add'>+	/* The SJA1110 insists being a snowflake, and requires SGMII,</div><div class='add'>+	 * 2500base-x and internal MII ports connected to the 100base-TX PHY to</div><div class='add'>+	 * set this bit. We set it unconditionally from the high-level logic,</div><div class='add'>+	 * and only sja1110_xmii_params_entry_packing writes it to the static</div><div class='add'>+	 * config. I have no better name for it than "special".</div><div class='add'>+	 */</div><div class='add'>+	u64 special[SJA1105_MAX_NUM_PORTS];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1110_pcp_remapping_entry {</div><div class='add'>+	u64 egrpcp[SJA1105_NUM_TC];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	SJA1105_VL_FORMAT_PSFP		= 0,</div><div class='add'>+	SJA1105_VL_FORMAT_ARINC664	= 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1105_vl_lookup_entry {</div><div class='add'>+	u64 format;</div><div class='add'>+	u64 port;</div><div class='add'>+	union {</div><div class='add'>+		/* SJA1105_VL_FORMAT_PSFP */</div><div class='add'>+		struct {</div><div class='add'>+			u64 destports;</div><div class='add'>+			u64 iscritical;</div><div class='add'>+			u64 macaddr;</div><div class='add'>+			u64 vlanid;</div><div class='add'>+			u64 vlanprior;</div><div class='add'>+		};</div><div class='add'>+		/* SJA1105_VL_FORMAT_ARINC664 */</div><div class='add'>+		struct {</div><div class='add'>+			u64 egrmirr;</div><div class='add'>+			u64 ingrmirr;</div><div class='add'>+			u64 vlid;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	/* Not part of hardware structure */</div><div class='add'>+	unsigned long flow_cookie;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1105_vl_policing_entry {</div><div class='add'>+	u64 type;</div><div class='add'>+	u64 maxlen;</div><div class='add'>+	u64 sharindx;</div><div class='add'>+	u64 bag;</div><div class='add'>+	u64 jitter;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1105_vl_forwarding_entry {</div><div class='add'>+	u64 type;</div><div class='add'>+	u64 priority;</div><div class='add'>+	u64 partition;</div><div class='add'>+	u64 destports;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1105_vl_forwarding_params_entry {</div><div class='add'>+	u64 partspc[8];</div><div class='add'>+	u64 debugen;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1105_table_header {</div><div class='add'>+	u64 block_id;</div><div class='add'>+	u64 len;</div><div class='add'>+	u64 crc;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1105_table_ops {</div><div class='add'>+	size_t (*packing)(void *buf, void *entry_ptr, enum packing_op op);</div><div class='add'>+	size_t unpacked_entry_size;</div><div class='add'>+	size_t packed_entry_size;</div><div class='add'>+	size_t max_entry_count;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1105_table {</div><div class='add'>+	const struct sja1105_table_ops *ops;</div><div class='add'>+	size_t entry_count;</div><div class='add'>+	void *entries;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1105_static_config {</div><div class='add'>+	u64 device_id;</div><div class='add'>+	struct sja1105_table tables[BLK_IDX_MAX];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+extern const struct sja1105_table_ops sja1105e_table_ops[BLK_IDX_MAX];</div><div class='add'>+extern const struct sja1105_table_ops sja1105t_table_ops[BLK_IDX_MAX];</div><div class='add'>+extern const struct sja1105_table_ops sja1105p_table_ops[BLK_IDX_MAX];</div><div class='add'>+extern const struct sja1105_table_ops sja1105q_table_ops[BLK_IDX_MAX];</div><div class='add'>+extern const struct sja1105_table_ops sja1105r_table_ops[BLK_IDX_MAX];</div><div class='add'>+extern const struct sja1105_table_ops sja1105s_table_ops[BLK_IDX_MAX];</div><div class='add'>+extern const struct sja1105_table_ops sja1110_table_ops[BLK_IDX_MAX];</div><div class='add'>+</div><div class='add'>+size_t sja1105_table_header_packing(void *buf, void *hdr, enum packing_op op);</div><div class='add'>+void</div><div class='add'>+sja1105_table_header_pack_with_crc(void *buf, struct sja1105_table_header *hdr);</div><div class='add'>+size_t</div><div class='add'>+sja1105_static_config_get_length(const struct sja1105_static_config *config);</div><div class='add'>+</div><div class='add'>+typedef enum {</div><div class='add'>+	SJA1105_CONFIG_OK = 0,</div><div class='add'>+	SJA1105_TTETHERNET_NOT_SUPPORTED,</div><div class='add'>+	SJA1105_INCORRECT_TTETHERNET_CONFIGURATION,</div><div class='add'>+	SJA1105_INCORRECT_VIRTUAL_LINK_CONFIGURATION,</div><div class='add'>+	SJA1105_MISSING_L2_POLICING_TABLE,</div><div class='add'>+	SJA1105_MISSING_L2_FORWARDING_TABLE,</div><div class='add'>+	SJA1105_MISSING_L2_FORWARDING_PARAMS_TABLE,</div><div class='add'>+	SJA1105_MISSING_GENERAL_PARAMS_TABLE,</div><div class='add'>+	SJA1105_MISSING_VLAN_TABLE,</div><div class='add'>+	SJA1105_MISSING_XMII_TABLE,</div><div class='add'>+	SJA1105_MISSING_MAC_TABLE,</div><div class='add'>+	SJA1105_OVERCOMMITTED_FRAME_MEMORY,</div><div class='add'>+} sja1105_config_valid_t;</div><div class='add'>+</div><div class='add'>+extern const char *sja1105_static_config_error_msg[];</div><div class='add'>+</div><div class='add'>+sja1105_config_valid_t</div><div class='add'>+sja1105_static_config_check_valid(const struct sja1105_static_config *config,</div><div class='add'>+				  int max_mem);</div><div class='add'>+void</div><div class='add'>+sja1105_static_config_pack(void *buf, struct sja1105_static_config *config);</div><div class='add'>+int sja1105_static_config_init(struct sja1105_static_config *config,</div><div class='add'>+			       const struct sja1105_table_ops *static_ops,</div><div class='add'>+			       u64 device_id);</div><div class='add'>+void sja1105_static_config_free(struct sja1105_static_config *config);</div><div class='add'>+</div><div class='add'>+int sja1105_table_delete_entry(struct sja1105_table *table, int i);</div><div class='add'>+int sja1105_table_resize(struct sja1105_table *table, size_t new_count);</div><div class='add'>+</div><div class='add'>+u32 sja1105_crc32(const void *buf, size_t len);</div><div class='add'>+</div><div class='add'>+void sja1105_pack(void *buf, const u64 *val, int start, int end, size_t len);</div><div class='add'>+void sja1105_unpack(const void *buf, u64 *val, int start, int end, size_t len);</div><div class='add'>+void sja1105_packing(void *buf, u64 *val, int start, int end,</div><div class='add'>+		     size_t len, enum packing_op op);</div><div class='add'>+</div><div class='add'>+/* Common implementations for the static and dynamic configs */</div><div class='add'>+size_t sja1105pqrs_general_params_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+						enum packing_op op);</div><div class='add'>+size_t sja1110_general_params_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					    enum packing_op op);</div><div class='add'>+size_t sja1105pqrs_l2_lookup_params_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+						  enum packing_op op);</div><div class='add'>+size_t sja1110_l2_lookup_params_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					      enum packing_op op);</div><div class='add'>+size_t sja1105_l2_forwarding_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					   enum packing_op op);</div><div class='add'>+size_t sja1110_l2_forwarding_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					   enum packing_op op);</div><div class='add'>+size_t sja1105pqrs_l2_lookup_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					   enum packing_op op);</div><div class='add'>+size_t sja1105et_l2_lookup_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					 enum packing_op op);</div><div class='add'>+size_t sja1110_l2_lookup_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+				       enum packing_op op);</div><div class='add'>+size_t sja1105_vlan_lookup_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					 enum packing_op op);</div><div class='add'>+size_t sja1110_vlan_lookup_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					 enum packing_op op);</div><div class='add'>+size_t sja1105_retagging_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+				       enum packing_op op);</div><div class='add'>+size_t sja1110_retagging_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+				       enum packing_op op);</div><div class='add'>+size_t sja1105pqrs_mac_config_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					    enum packing_op op);</div><div class='add'>+size_t sja1110_mac_config_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					enum packing_op op);</div><div class='add'>+size_t sja1105pqrs_avb_params_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					    enum packing_op op);</div><div class='add'>+size_t sja1105_vl_lookup_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+				       enum packing_op op);</div><div class='add'>+size_t sja1110_vl_lookup_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+				       enum packing_op op);</div><div class='add'>+size_t sja1110_vl_policing_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					 enum packing_op op);</div><div class='add'>+size_t sja1110_xmii_params_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					 enum packing_op op);</div><div class='add'>+size_t sja1110_l2_policing_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+					 enum packing_op op);</div><div class='add'>+size_t sja1110_l2_forwarding_params_entry_packing(void *buf, void *entry_ptr,</div><div class='add'>+						  enum packing_op op);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/dsa/sja1105/sja1105_tas.c b/drivers/net/dsa/sja1105/sja1105_tas.c<br/>new file mode 100644<br/>index 000000000000..d5949d2c3e71<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/sja1105/sja1105_tas.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/sja1105/sja1105_tas.c</a></div><div class='hunk'>@@ -0,0 +1,898 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright (c) 2019, Vladimir Oltean &lt;olteanv@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+#include "sja1105.h"</div><div class='add'>+</div><div class='add'>+#define SJA1105_TAS_CLKSRC_DISABLED	0</div><div class='add'>+#define SJA1105_TAS_CLKSRC_STANDALONE	1</div><div class='add'>+#define SJA1105_TAS_CLKSRC_AS6802	2</div><div class='add'>+#define SJA1105_TAS_CLKSRC_PTP		3</div><div class='add'>+#define SJA1105_GATE_MASK		GENMASK_ULL(SJA1105_NUM_TC - 1, 0)</div><div class='add'>+</div><div class='add'>+#define work_to_sja1105_tas(d) \</div><div class='add'>+	container_of((d), struct sja1105_tas_data, tas_work)</div><div class='add'>+#define tas_to_sja1105(d) \</div><div class='add'>+	container_of((d), struct sja1105_private, tas_data)</div><div class='add'>+</div><div class='add'>+static int sja1105_tas_set_runtime_params(struct sja1105_private *priv)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_tas_data *tas_data = &amp;priv-&gt;tas_data;</div><div class='add'>+	struct sja1105_gating_config *gating_cfg = &amp;tas_data-&gt;gating_cfg;</div><div class='add'>+	struct dsa_switch *ds = priv-&gt;ds;</div><div class='add'>+	s64 earliest_base_time = S64_MAX;</div><div class='add'>+	s64 latest_base_time = 0;</div><div class='add'>+	s64 its_cycle_time = 0;</div><div class='add'>+	s64 max_cycle_time = 0;</div><div class='add'>+	int port;</div><div class='add'>+</div><div class='add'>+	tas_data-&gt;enabled = false;</div><div class='add'>+</div><div class='add'>+	for (port = 0; port &lt; ds-&gt;num_ports; port++) {</div><div class='add'>+		const struct tc_taprio_qopt_offload *offload;</div><div class='add'>+</div><div class='add'>+		offload = tas_data-&gt;offload[port];</div><div class='add'>+		if (!offload)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		tas_data-&gt;enabled = true;</div><div class='add'>+</div><div class='add'>+		if (max_cycle_time &lt; offload-&gt;cycle_time)</div><div class='add'>+			max_cycle_time = offload-&gt;cycle_time;</div><div class='add'>+		if (latest_base_time &lt; offload-&gt;base_time)</div><div class='add'>+			latest_base_time = offload-&gt;base_time;</div><div class='add'>+		if (earliest_base_time &gt; offload-&gt;base_time) {</div><div class='add'>+			earliest_base_time = offload-&gt;base_time;</div><div class='add'>+			its_cycle_time = offload-&gt;cycle_time;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!list_empty(&amp;gating_cfg-&gt;entries)) {</div><div class='add'>+		tas_data-&gt;enabled = true;</div><div class='add'>+</div><div class='add'>+		if (max_cycle_time &lt; gating_cfg-&gt;cycle_time)</div><div class='add'>+			max_cycle_time = gating_cfg-&gt;cycle_time;</div><div class='add'>+		if (latest_base_time &lt; gating_cfg-&gt;base_time)</div><div class='add'>+			latest_base_time = gating_cfg-&gt;base_time;</div><div class='add'>+		if (earliest_base_time &gt; gating_cfg-&gt;base_time) {</div><div class='add'>+			earliest_base_time = gating_cfg-&gt;base_time;</div><div class='add'>+			its_cycle_time = gating_cfg-&gt;cycle_time;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!tas_data-&gt;enabled)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Roll the earliest base time over until it is in a comparable</div><div class='add'>+	 * time base with the latest, then compare their deltas.</div><div class='add'>+	 * We want to enforce that all ports' base times are within</div><div class='add'>+	 * SJA1105_TAS_MAX_DELTA 200ns cycles of one another.</div><div class='add'>+	 */</div><div class='add'>+	earliest_base_time = future_base_time(earliest_base_time,</div><div class='add'>+					      its_cycle_time,</div><div class='add'>+					      latest_base_time);</div><div class='add'>+	while (earliest_base_time &gt; latest_base_time)</div><div class='add'>+		earliest_base_time -= its_cycle_time;</div><div class='add'>+	if (latest_base_time - earliest_base_time &gt;</div><div class='add'>+	    sja1105_delta_to_ns(SJA1105_TAS_MAX_DELTA)) {</div><div class='add'>+		dev_err(ds-&gt;dev,</div><div class='add'>+			"Base times too far apart: min %llu max %llu\n",</div><div class='add'>+			earliest_base_time, latest_base_time);</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tas_data-&gt;earliest_base_time = earliest_base_time;</div><div class='add'>+	tas_data-&gt;max_cycle_time = max_cycle_time;</div><div class='add'>+</div><div class='add'>+	dev_dbg(ds-&gt;dev, "earliest base time %lld ns\n", earliest_base_time);</div><div class='add'>+	dev_dbg(ds-&gt;dev, "latest base time %lld ns\n", latest_base_time);</div><div class='add'>+	dev_dbg(ds-&gt;dev, "longest cycle time %lld ns\n", max_cycle_time);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Lo and behold: the egress scheduler from hell.</div><div class='add'>+ *</div><div class='add'>+ * At the hardware level, the Time-Aware Shaper holds a global linear arrray of</div><div class='add'>+ * all schedule entries for all ports. These are the Gate Control List (GCL)</div><div class='add'>+ * entries, let's call them "timeslots" for short. This linear array of</div><div class='add'>+ * timeslots is held in BLK_IDX_SCHEDULE.</div><div class='add'>+ *</div><div class='add'>+ * Then there are a maximum of 8 "execution threads" inside the switch, which</div><div class='add'>+ * iterate cyclically through the "schedule". Each "cycle" has an entry point</div><div class='add'>+ * and an exit point, both being timeslot indices in the schedule table. The</div><div class='add'>+ * hardware calls each cycle a "subschedule".</div><div class='add'>+ *</div><div class='add'>+ * Subschedule (cycle) i starts when</div><div class='add'>+ *   ptpclkval &gt;= ptpschtm + BLK_IDX_SCHEDULE_ENTRY_POINTS[i].delta.</div><div class='add'>+ *</div><div class='add'>+ * The hardware scheduler iterates BLK_IDX_SCHEDULE with a k ranging from</div><div class='add'>+ *   k = BLK_IDX_SCHEDULE_ENTRY_POINTS[i].address to</div><div class='add'>+ *   k = BLK_IDX_SCHEDULE_PARAMS.subscheind[i]</div><div class='add'>+ *</div><div class='add'>+ * For each schedule entry (timeslot) k, the engine executes the gate control</div><div class='add'>+ * list entry for the duration of BLK_IDX_SCHEDULE[k].delta.</div><div class='add'>+ *</div><div class='add'>+ *         +---------+</div><div class='add'>+ *         |         | BLK_IDX_SCHEDULE_ENTRY_POINTS_PARAMS</div><div class='add'>+ *         +---------+</div><div class='add'>+ *              |</div><div class='add'>+ *              +-----------------+</div><div class='add'>+ *                                | .actsubsch</div><div class='add'>+ *  BLK_IDX_SCHEDULE_ENTRY_POINTS v</div><div class='add'>+ *                 +-------+-------+</div><div class='add'>+ *                 |cycle 0|cycle 1|</div><div class='add'>+ *                 +-------+-------+</div><div class='add'>+ *                   |  |      |  |</div><div class='add'>+ *  +----------------+  |      |  +-------------------------------------+</div><div class='add'>+ *  |   .subschindx     |      |             .subschindx                |</div><div class='add'>+ *  |                   |      +---------------+                        |</div><div class='add'>+ *  |          .address |        .address      |                        |</div><div class='add'>+ *  |                   |                      |                        |</div><div class='add'>+ *  |                   |                      |                        |</div><div class='add'>+ *  |  BLK_IDX_SCHEDULE v                      v                        |</div><div class='add'>+ *  |              +-------+-------+-------+-------+-------+------+     |</div><div class='add'>+ *  |              |entry 0|entry 1|entry 2|entry 3|entry 4|entry5|     |</div><div class='add'>+ *  |              +-------+-------+-------+-------+-------+------+     |</div><div class='add'>+ *  |                                  ^                    ^  ^  ^     |</div><div class='add'>+ *  |                                  |                    |  |  |     |</div><div class='add'>+ *  |        +-------------------------+                    |  |  |     |</div><div class='add'>+ *  |        |              +-------------------------------+  |  |     |</div><div class='add'>+ *  |        |              |              +-------------------+  |     |</div><div class='add'>+ *  |        |              |              |                      |     |</div><div class='add'>+ *  | +---------------------------------------------------------------+ |</div><div class='add'>+ *  | |subscheind[0]&lt;=subscheind[1]&lt;=subscheind[2]&lt;=...&lt;=subscheind[7]| |</div><div class='add'>+ *  | +---------------------------------------------------------------+ |</div><div class='add'>+ *  |        ^              ^                BLK_IDX_SCHEDULE_PARAMS    |</div><div class='add'>+ *  |        |              |                                           |</div><div class='add'>+ *  +--------+              +-------------------------------------------+</div><div class='add'>+ *</div><div class='add'>+ *  In the above picture there are two subschedules (cycles):</div><div class='add'>+ *</div><div class='add'>+ *  - cycle 0: iterates the schedule table from 0 to 2 (and back)</div><div class='add'>+ *  - cycle 1: iterates the schedule table from 3 to 5 (and back)</div><div class='add'>+ *</div><div class='add'>+ *  All other possible execution threads must be marked as unused by making</div><div class='add'>+ *  their "subschedule end index" (subscheind) equal to the last valid</div><div class='add'>+ *  subschedule's end index (in this case 5).</div><div class='add'>+ */</div><div class='add'>+int sja1105_init_scheduling(struct sja1105_private *priv)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_schedule_entry_points_entry *schedule_entry_points;</div><div class='add'>+	struct sja1105_schedule_entry_points_params_entry</div><div class='add'>+					*schedule_entry_points_params;</div><div class='add'>+	struct sja1105_schedule_params_entry *schedule_params;</div><div class='add'>+	struct sja1105_tas_data *tas_data = &amp;priv-&gt;tas_data;</div><div class='add'>+	struct sja1105_gating_config *gating_cfg = &amp;tas_data-&gt;gating_cfg;</div><div class='add'>+	struct sja1105_schedule_entry *schedule;</div><div class='add'>+	struct dsa_switch *ds = priv-&gt;ds;</div><div class='add'>+	struct sja1105_table *table;</div><div class='add'>+	int schedule_start_idx;</div><div class='add'>+	s64 entry_point_delta;</div><div class='add'>+	int schedule_end_idx;</div><div class='add'>+	int num_entries = 0;</div><div class='add'>+	int num_cycles = 0;</div><div class='add'>+	int cycle = 0;</div><div class='add'>+	int i, k = 0;</div><div class='add'>+	int port, rc;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_tas_set_runtime_params(priv);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	/* Discard previous Schedule Table */</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_SCHEDULE];</div><div class='add'>+	if (table-&gt;entry_count) {</div><div class='add'>+		kfree(table-&gt;entries);</div><div class='add'>+		table-&gt;entry_count = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Discard previous Schedule Entry Points Parameters Table */</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_SCHEDULE_ENTRY_POINTS_PARAMS];</div><div class='add'>+	if (table-&gt;entry_count) {</div><div class='add'>+		kfree(table-&gt;entries);</div><div class='add'>+		table-&gt;entry_count = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Discard previous Schedule Parameters Table */</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_SCHEDULE_PARAMS];</div><div class='add'>+	if (table-&gt;entry_count) {</div><div class='add'>+		kfree(table-&gt;entries);</div><div class='add'>+		table-&gt;entry_count = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Discard previous Schedule Entry Points Table */</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_SCHEDULE_ENTRY_POINTS];</div><div class='add'>+	if (table-&gt;entry_count) {</div><div class='add'>+		kfree(table-&gt;entries);</div><div class='add'>+		table-&gt;entry_count = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Figure out the dimensioning of the problem */</div><div class='add'>+	for (port = 0; port &lt; ds-&gt;num_ports; port++) {</div><div class='add'>+		if (tas_data-&gt;offload[port]) {</div><div class='add'>+			num_entries += tas_data-&gt;offload[port]-&gt;num_entries;</div><div class='add'>+			num_cycles++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!list_empty(&amp;gating_cfg-&gt;entries)) {</div><div class='add'>+		num_entries += gating_cfg-&gt;num_entries;</div><div class='add'>+		num_cycles++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Nothing to do */</div><div class='add'>+	if (!num_cycles)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Pre-allocate space in the static config tables */</div><div class='add'>+</div><div class='add'>+	/* Schedule Table */</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_SCHEDULE];</div><div class='add'>+	table-&gt;entries = kcalloc(num_entries, table-&gt;ops-&gt;unpacked_entry_size,</div><div class='add'>+				 GFP_KERNEL);</div><div class='add'>+	if (!table-&gt;entries)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	table-&gt;entry_count = num_entries;</div><div class='add'>+	schedule = table-&gt;entries;</div><div class='add'>+</div><div class='add'>+	/* Schedule Points Parameters Table */</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_SCHEDULE_ENTRY_POINTS_PARAMS];</div><div class='add'>+	table-&gt;entries = kcalloc(SJA1105_MAX_SCHEDULE_ENTRY_POINTS_PARAMS_COUNT,</div><div class='add'>+				 table-&gt;ops-&gt;unpacked_entry_size, GFP_KERNEL);</div><div class='add'>+	if (!table-&gt;entries)</div><div class='add'>+		/* Previously allocated memory will be freed automatically in</div><div class='add'>+		 * sja1105_static_config_free. This is true for all early</div><div class='add'>+		 * returns below.</div><div class='add'>+		 */</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	table-&gt;entry_count = SJA1105_MAX_SCHEDULE_ENTRY_POINTS_PARAMS_COUNT;</div><div class='add'>+	schedule_entry_points_params = table-&gt;entries;</div><div class='add'>+</div><div class='add'>+	/* Schedule Parameters Table */</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_SCHEDULE_PARAMS];</div><div class='add'>+	table-&gt;entries = kcalloc(SJA1105_MAX_SCHEDULE_PARAMS_COUNT,</div><div class='add'>+				 table-&gt;ops-&gt;unpacked_entry_size, GFP_KERNEL);</div><div class='add'>+	if (!table-&gt;entries)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	table-&gt;entry_count = SJA1105_MAX_SCHEDULE_PARAMS_COUNT;</div><div class='add'>+	schedule_params = table-&gt;entries;</div><div class='add'>+</div><div class='add'>+	/* Schedule Entry Points Table */</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_SCHEDULE_ENTRY_POINTS];</div><div class='add'>+	table-&gt;entries = kcalloc(num_cycles, table-&gt;ops-&gt;unpacked_entry_size,</div><div class='add'>+				 GFP_KERNEL);</div><div class='add'>+	if (!table-&gt;entries)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	table-&gt;entry_count = num_cycles;</div><div class='add'>+	schedule_entry_points = table-&gt;entries;</div><div class='add'>+</div><div class='add'>+	/* Finally start populating the static config tables */</div><div class='add'>+	schedule_entry_points_params-&gt;clksrc = SJA1105_TAS_CLKSRC_PTP;</div><div class='add'>+	schedule_entry_points_params-&gt;actsubsch = num_cycles - 1;</div><div class='add'>+</div><div class='add'>+	for (port = 0; port &lt; ds-&gt;num_ports; port++) {</div><div class='add'>+		const struct tc_taprio_qopt_offload *offload;</div><div class='add'>+		/* Relative base time */</div><div class='add'>+		s64 rbt;</div><div class='add'>+</div><div class='add'>+		offload = tas_data-&gt;offload[port];</div><div class='add'>+		if (!offload)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		schedule_start_idx = k;</div><div class='add'>+		schedule_end_idx = k + offload-&gt;num_entries - 1;</div><div class='add'>+		/* This is the base time expressed as a number of TAS ticks</div><div class='add'>+		 * relative to PTPSCHTM, which we'll (perhaps improperly) call</div><div class='add'>+		 * the operational base time.</div><div class='add'>+		 */</div><div class='add'>+		rbt = future_base_time(offload-&gt;base_time,</div><div class='add'>+				       offload-&gt;cycle_time,</div><div class='add'>+				       tas_data-&gt;earliest_base_time);</div><div class='add'>+		rbt -= tas_data-&gt;earliest_base_time;</div><div class='add'>+		/* UM10944.pdf 4.2.2. Schedule Entry Points table says that</div><div class='add'>+		 * delta cannot be zero, which is shitty. Advance all relative</div><div class='add'>+		 * base times by 1 TAS delta, so that even the earliest base</div><div class='add'>+		 * time becomes 1 in relative terms. Then start the operational</div><div class='add'>+		 * base time (PTPSCHTM) one TAS delta earlier than planned.</div><div class='add'>+		 */</div><div class='add'>+		entry_point_delta = ns_to_sja1105_delta(rbt) + 1;</div><div class='add'>+</div><div class='add'>+		schedule_entry_points[cycle].subschindx = cycle;</div><div class='add'>+		schedule_entry_points[cycle].delta = entry_point_delta;</div><div class='add'>+		schedule_entry_points[cycle].address = schedule_start_idx;</div><div class='add'>+</div><div class='add'>+		/* The subschedule end indices need to be</div><div class='add'>+		 * monotonically increasing.</div><div class='add'>+		 */</div><div class='add'>+		for (i = cycle; i &lt; 8; i++)</div><div class='add'>+			schedule_params-&gt;subscheind[i] = schedule_end_idx;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; offload-&gt;num_entries; i++, k++) {</div><div class='add'>+			s64 delta_ns = offload-&gt;entries[i].interval;</div><div class='add'>+</div><div class='add'>+			schedule[k].delta = ns_to_sja1105_delta(delta_ns);</div><div class='add'>+			schedule[k].destports = BIT(port);</div><div class='add'>+			schedule[k].resmedia_en = true;</div><div class='add'>+			schedule[k].resmedia = SJA1105_GATE_MASK &amp;</div><div class='add'>+					~offload-&gt;entries[i].gate_mask;</div><div class='add'>+		}</div><div class='add'>+		cycle++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!list_empty(&amp;gating_cfg-&gt;entries)) {</div><div class='add'>+		struct sja1105_gate_entry *e;</div><div class='add'>+</div><div class='add'>+		/* Relative base time */</div><div class='add'>+		s64 rbt;</div><div class='add'>+</div><div class='add'>+		schedule_start_idx = k;</div><div class='add'>+		schedule_end_idx = k + gating_cfg-&gt;num_entries - 1;</div><div class='add'>+		rbt = future_base_time(gating_cfg-&gt;base_time,</div><div class='add'>+				       gating_cfg-&gt;cycle_time,</div><div class='add'>+				       tas_data-&gt;earliest_base_time);</div><div class='add'>+		rbt -= tas_data-&gt;earliest_base_time;</div><div class='add'>+		entry_point_delta = ns_to_sja1105_delta(rbt) + 1;</div><div class='add'>+</div><div class='add'>+		schedule_entry_points[cycle].subschindx = cycle;</div><div class='add'>+		schedule_entry_points[cycle].delta = entry_point_delta;</div><div class='add'>+		schedule_entry_points[cycle].address = schedule_start_idx;</div><div class='add'>+</div><div class='add'>+		for (i = cycle; i &lt; 8; i++)</div><div class='add'>+			schedule_params-&gt;subscheind[i] = schedule_end_idx;</div><div class='add'>+</div><div class='add'>+		list_for_each_entry(e, &amp;gating_cfg-&gt;entries, list) {</div><div class='add'>+			schedule[k].delta = ns_to_sja1105_delta(e-&gt;interval);</div><div class='add'>+			schedule[k].destports = e-&gt;rule-&gt;vl.destports;</div><div class='add'>+			schedule[k].setvalid = true;</div><div class='add'>+			schedule[k].txen = true;</div><div class='add'>+			schedule[k].vlindex = e-&gt;rule-&gt;vl.sharindx;</div><div class='add'>+			schedule[k].winstindex = e-&gt;rule-&gt;vl.sharindx;</div><div class='add'>+			if (e-&gt;gate_state) /* Gate open */</div><div class='add'>+				schedule[k].winst = true;</div><div class='add'>+			else /* Gate closed */</div><div class='add'>+				schedule[k].winend = true;</div><div class='add'>+			k++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Be there 2 port subschedules, each executing an arbitrary number of gate</div><div class='add'>+ * open/close events cyclically.</div><div class='add'>+ * None of those gate events must ever occur at the exact same time, otherwise</div><div class='add'>+ * the switch is known to act in exotically strange ways.</div><div class='add'>+ * However the hardware doesn't bother performing these integrity checks.</div><div class='add'>+ * So here we are with the task of validating whether the new @admin offload</div><div class='add'>+ * has any conflict with the already established TAS configuration in</div><div class='add'>+ * tas_data-&gt;offload.  We already know the other ports are in harmony with one</div><div class='add'>+ * another, otherwise we wouldn't have saved them.</div><div class='add'>+ * Each gate event executes periodically, with a period of @cycle_time and a</div><div class='add'>+ * phase given by its cycle's @base_time plus its offset within the cycle</div><div class='add'>+ * (which in turn is given by the length of the events prior to it).</div><div class='add'>+ * There are two aspects to possible collisions:</div><div class='add'>+ * - Collisions within one cycle's (actually the longest cycle's) time frame.</div><div class='add'>+ *   For that, we need to compare the cartesian product of each possible</div><div class='add'>+ *   occurrence of each event within one cycle time.</div><div class='add'>+ * - Collisions in the future. Events may not collide within one cycle time,</div><div class='add'>+ *   but if two port schedules don't have the same periodicity (aka the cycle</div><div class='add'>+ *   times aren't multiples of one another), they surely will some time in the</div><div class='add'>+ *   future (actually they will collide an infinite amount of times).</div><div class='add'>+ */</div><div class='add'>+static bool</div><div class='add'>+sja1105_tas_check_conflicts(struct sja1105_private *priv, int port,</div><div class='add'>+			    const struct tc_taprio_qopt_offload *admin)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_tas_data *tas_data = &amp;priv-&gt;tas_data;</div><div class='add'>+	const struct tc_taprio_qopt_offload *offload;</div><div class='add'>+	s64 max_cycle_time, min_cycle_time;</div><div class='add'>+	s64 delta1, delta2;</div><div class='add'>+	s64 rbt1, rbt2;</div><div class='add'>+	s64 stop_time;</div><div class='add'>+	s64 t1, t2;</div><div class='add'>+	int i, j;</div><div class='add'>+	s32 rem;</div><div class='add'>+</div><div class='add'>+	offload = tas_data-&gt;offload[port];</div><div class='add'>+	if (!offload)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* Check if the two cycle times are multiples of one another.</div><div class='add'>+	 * If they aren't, then they will surely collide.</div><div class='add'>+	 */</div><div class='add'>+	max_cycle_time = max(offload-&gt;cycle_time, admin-&gt;cycle_time);</div><div class='add'>+	min_cycle_time = min(offload-&gt;cycle_time, admin-&gt;cycle_time);</div><div class='add'>+	div_s64_rem(max_cycle_time, min_cycle_time, &amp;rem);</div><div class='add'>+	if (rem)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	/* Calculate the "reduced" base time of each of the two cycles</div><div class='add'>+	 * (transposed back as close to 0 as possible) by dividing to</div><div class='add'>+	 * the cycle time.</div><div class='add'>+	 */</div><div class='add'>+	div_s64_rem(offload-&gt;base_time, offload-&gt;cycle_time, &amp;rem);</div><div class='add'>+	rbt1 = rem;</div><div class='add'>+</div><div class='add'>+	div_s64_rem(admin-&gt;base_time, admin-&gt;cycle_time, &amp;rem);</div><div class='add'>+	rbt2 = rem;</div><div class='add'>+</div><div class='add'>+	stop_time = max_cycle_time + max(rbt1, rbt2);</div><div class='add'>+</div><div class='add'>+	/* delta1 is the relative base time of each GCL entry within</div><div class='add'>+	 * the established ports' TAS config.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0, delta1 = 0;</div><div class='add'>+	     i &lt; offload-&gt;num_entries;</div><div class='add'>+	     delta1 += offload-&gt;entries[i].interval, i++) {</div><div class='add'>+		/* delta2 is the relative base time of each GCL entry</div><div class='add'>+		 * within the newly added TAS config.</div><div class='add'>+		 */</div><div class='add'>+		for (j = 0, delta2 = 0;</div><div class='add'>+		     j &lt; admin-&gt;num_entries;</div><div class='add'>+		     delta2 += admin-&gt;entries[j].interval, j++) {</div><div class='add'>+			/* t1 follows all possible occurrences of the</div><div class='add'>+			 * established ports' GCL entry i within the</div><div class='add'>+			 * first cycle time.</div><div class='add'>+			 */</div><div class='add'>+			for (t1 = rbt1 + delta1;</div><div class='add'>+			     t1 &lt;= stop_time;</div><div class='add'>+			     t1 += offload-&gt;cycle_time) {</div><div class='add'>+				/* t2 follows all possible occurrences</div><div class='add'>+				 * of the newly added GCL entry j</div><div class='add'>+				 * within the first cycle time.</div><div class='add'>+				 */</div><div class='add'>+				for (t2 = rbt2 + delta2;</div><div class='add'>+				     t2 &lt;= stop_time;</div><div class='add'>+				     t2 += admin-&gt;cycle_time) {</div><div class='add'>+					if (t1 == t2) {</div><div class='add'>+						dev_warn(priv-&gt;ds-&gt;dev,</div><div class='add'>+							 "GCL entry %d collides with entry %d of port %d\n",</div><div class='add'>+							 j, i, port);</div><div class='add'>+						return true;</div><div class='add'>+					}</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Check the tc-taprio configuration on @port for conflicts with the tc-gate</div><div class='add'>+ * global subschedule. If @port is -1, check it against all ports.</div><div class='add'>+ * To reuse the sja1105_tas_check_conflicts logic without refactoring it,</div><div class='add'>+ * convert the gating configuration to a dummy tc-taprio offload structure.</div><div class='add'>+ */</div><div class='add'>+bool sja1105_gating_check_conflicts(struct sja1105_private *priv, int port,</div><div class='add'>+				    struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_gating_config *gating_cfg = &amp;priv-&gt;tas_data.gating_cfg;</div><div class='add'>+	size_t num_entries = gating_cfg-&gt;num_entries;</div><div class='add'>+	struct tc_taprio_qopt_offload *dummy;</div><div class='add'>+	struct dsa_switch *ds = priv-&gt;ds;</div><div class='add'>+	struct sja1105_gate_entry *e;</div><div class='add'>+	bool conflict;</div><div class='add'>+	int i = 0;</div><div class='add'>+</div><div class='add'>+	if (list_empty(&amp;gating_cfg-&gt;entries))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	dummy = kzalloc(struct_size(dummy, entries, num_entries), GFP_KERNEL);</div><div class='add'>+	if (!dummy) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Failed to allocate memory");</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dummy-&gt;num_entries = num_entries;</div><div class='add'>+	dummy-&gt;base_time = gating_cfg-&gt;base_time;</div><div class='add'>+	dummy-&gt;cycle_time = gating_cfg-&gt;cycle_time;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(e, &amp;gating_cfg-&gt;entries, list)</div><div class='add'>+		dummy-&gt;entries[i++].interval = e-&gt;interval;</div><div class='add'>+</div><div class='add'>+	if (port != -1) {</div><div class='add'>+		conflict = sja1105_tas_check_conflicts(priv, port, dummy);</div><div class='add'>+	} else {</div><div class='add'>+		for (port = 0; port &lt; ds-&gt;num_ports; port++) {</div><div class='add'>+			conflict = sja1105_tas_check_conflicts(priv, port,</div><div class='add'>+							       dummy);</div><div class='add'>+			if (conflict)</div><div class='add'>+				break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	kfree(dummy);</div><div class='add'>+</div><div class='add'>+	return conflict;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int sja1105_setup_tc_taprio(struct dsa_switch *ds, int port,</div><div class='add'>+			    struct tc_taprio_qopt_offload *admin)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	struct sja1105_tas_data *tas_data = &amp;priv-&gt;tas_data;</div><div class='add'>+	int other_port, rc, i;</div><div class='add'>+</div><div class='add'>+	/* Can't change an already configured port (must delete qdisc first).</div><div class='add'>+	 * Can't delete the qdisc from an unconfigured port.</div><div class='add'>+	 */</div><div class='add'>+	if ((!!tas_data-&gt;offload[port] &amp;&amp; admin-&gt;cmd == TAPRIO_CMD_REPLACE) ||</div><div class='add'>+	    (!tas_data-&gt;offload[port] &amp;&amp; admin-&gt;cmd == TAPRIO_CMD_DESTROY))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (admin-&gt;cmd == TAPRIO_CMD_DESTROY) {</div><div class='add'>+		taprio_offload_free(tas_data-&gt;offload[port]);</div><div class='add'>+		tas_data-&gt;offload[port] = NULL;</div><div class='add'>+</div><div class='add'>+		rc = sja1105_init_scheduling(priv);</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			return rc;</div><div class='add'>+</div><div class='add'>+		return sja1105_static_config_reload(priv, SJA1105_SCHEDULING);</div><div class='add'>+	} else if (admin-&gt;cmd != TAPRIO_CMD_REPLACE) {</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* The cycle time extension is the amount of time the last cycle from</div><div class='add'>+	 * the old OPER needs to be extended in order to phase-align with the</div><div class='add'>+	 * base time of the ADMIN when that becomes the new OPER.</div><div class='add'>+	 * But of course our switch needs to be reset to switch-over between</div><div class='add'>+	 * the ADMIN and the OPER configs - so much for a seamless transition.</div><div class='add'>+	 * So don't add insult over injury and just say we don't support cycle</div><div class='add'>+	 * time extension.</div><div class='add'>+	 */</div><div class='add'>+	if (admin-&gt;cycle_time_extension)</div><div class='add'>+		return -ENOTSUPP;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; admin-&gt;num_entries; i++) {</div><div class='add'>+		s64 delta_ns = admin-&gt;entries[i].interval;</div><div class='add'>+		s64 delta_cycles = ns_to_sja1105_delta(delta_ns);</div><div class='add'>+		bool too_long, too_short;</div><div class='add'>+</div><div class='add'>+		too_long = (delta_cycles &gt;= SJA1105_TAS_MAX_DELTA);</div><div class='add'>+		too_short = (delta_cycles == 0);</div><div class='add'>+		if (too_long || too_short) {</div><div class='add'>+			dev_err(priv-&gt;ds-&gt;dev,</div><div class='add'>+				"Interval %llu too %s for GCL entry %d\n",</div><div class='add'>+				delta_ns, too_long ? "long" : "short", i);</div><div class='add'>+			return -ERANGE;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (other_port = 0; other_port &lt; ds-&gt;num_ports; other_port++) {</div><div class='add'>+		if (other_port == port)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (sja1105_tas_check_conflicts(priv, other_port, admin))</div><div class='add'>+			return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (sja1105_gating_check_conflicts(priv, port, NULL)) {</div><div class='add'>+		dev_err(ds-&gt;dev, "Conflict with tc-gate schedule\n");</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tas_data-&gt;offload[port] = taprio_offload_get(admin);</div><div class='add'>+</div><div class='add'>+	rc = sja1105_init_scheduling(priv);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	return sja1105_static_config_reload(priv, SJA1105_SCHEDULING);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_tas_check_running(struct sja1105_private *priv)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_tas_data *tas_data = &amp;priv-&gt;tas_data;</div><div class='add'>+	struct dsa_switch *ds = priv-&gt;ds;</div><div class='add'>+	struct sja1105_ptp_cmd cmd = {0};</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_ptp_commit(ds, &amp;cmd, SPI_READ);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	if (cmd.ptpstrtsch == 1)</div><div class='add'>+		/* Schedule successfully started */</div><div class='add'>+		tas_data-&gt;state = SJA1105_TAS_STATE_RUNNING;</div><div class='add'>+	else if (cmd.ptpstopsch == 1)</div><div class='add'>+		/* Schedule is stopped */</div><div class='add'>+		tas_data-&gt;state = SJA1105_TAS_STATE_DISABLED;</div><div class='add'>+	else</div><div class='add'>+		/* Schedule is probably not configured with PTP clock source */</div><div class='add'>+		rc = -EINVAL;</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Write to PTPCLKCORP */</div><div class='add'>+static int sja1105_tas_adjust_drift(struct sja1105_private *priv,</div><div class='add'>+				    u64 correction)</div><div class='add'>+{</div><div class='add'>+	const struct sja1105_regs *regs = priv-&gt;info-&gt;regs;</div><div class='add'>+	u32 ptpclkcorp = ns_to_sja1105_ticks(correction);</div><div class='add'>+</div><div class='add'>+	return sja1105_xfer_u32(priv, SPI_WRITE, regs-&gt;ptpclkcorp,</div><div class='add'>+				&amp;ptpclkcorp, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Write to PTPSCHTM */</div><div class='add'>+static int sja1105_tas_set_base_time(struct sja1105_private *priv,</div><div class='add'>+				     u64 base_time)</div><div class='add'>+{</div><div class='add'>+	const struct sja1105_regs *regs = priv-&gt;info-&gt;regs;</div><div class='add'>+	u64 ptpschtm = ns_to_sja1105_ticks(base_time);</div><div class='add'>+</div><div class='add'>+	return sja1105_xfer_u64(priv, SPI_WRITE, regs-&gt;ptpschtm,</div><div class='add'>+				&amp;ptpschtm, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_tas_start(struct sja1105_private *priv)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_tas_data *tas_data = &amp;priv-&gt;tas_data;</div><div class='add'>+	struct sja1105_ptp_cmd *cmd = &amp;priv-&gt;ptp_data.cmd;</div><div class='add'>+	struct dsa_switch *ds = priv-&gt;ds;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	dev_dbg(ds-&gt;dev, "Starting the TAS\n");</div><div class='add'>+</div><div class='add'>+	if (tas_data-&gt;state == SJA1105_TAS_STATE_ENABLED_NOT_RUNNING ||</div><div class='add'>+	    tas_data-&gt;state == SJA1105_TAS_STATE_RUNNING) {</div><div class='add'>+		dev_err(ds-&gt;dev, "TAS already started\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cmd-&gt;ptpstrtsch = 1;</div><div class='add'>+	cmd-&gt;ptpstopsch = 0;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_ptp_commit(ds, cmd, SPI_WRITE);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	tas_data-&gt;state = SJA1105_TAS_STATE_ENABLED_NOT_RUNNING;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_tas_stop(struct sja1105_private *priv)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_tas_data *tas_data = &amp;priv-&gt;tas_data;</div><div class='add'>+	struct sja1105_ptp_cmd *cmd = &amp;priv-&gt;ptp_data.cmd;</div><div class='add'>+	struct dsa_switch *ds = priv-&gt;ds;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	dev_dbg(ds-&gt;dev, "Stopping the TAS\n");</div><div class='add'>+</div><div class='add'>+	if (tas_data-&gt;state == SJA1105_TAS_STATE_DISABLED) {</div><div class='add'>+		dev_err(ds-&gt;dev, "TAS already disabled\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cmd-&gt;ptpstopsch = 1;</div><div class='add'>+	cmd-&gt;ptpstrtsch = 0;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_ptp_commit(ds, cmd, SPI_WRITE);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	tas_data-&gt;state = SJA1105_TAS_STATE_DISABLED;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The schedule engine and the PTP clock are driven by the same oscillator, and</div><div class='add'>+ * they run in parallel. But whilst the PTP clock can keep an absolute</div><div class='add'>+ * time-of-day, the schedule engine is only running in 'ticks' (25 ticks make</div><div class='add'>+ * up a delta, which is 200ns), and wrapping around at the end of each cycle.</div><div class='add'>+ * The schedule engine is started when the PTP clock reaches the PTPSCHTM time</div><div class='add'>+ * (in PTP domain).</div><div class='add'>+ * Because the PTP clock can be rate-corrected (accelerated or slowed down) by</div><div class='add'>+ * a software servo, and the schedule engine clock runs in parallel to the PTP</div><div class='add'>+ * clock, there is logic internal to the switch that periodically keeps the</div><div class='add'>+ * schedule engine from drifting away. The frequency with which this internal</div><div class='add'>+ * syntonization happens is the PTP clock correction period (PTPCLKCORP). It is</div><div class='add'>+ * a value also in the PTP clock domain, and is also rate-corrected.</div><div class='add'>+ * To be precise, during a correction period, there is logic to determine by</div><div class='add'>+ * how many scheduler clock ticks has the PTP clock drifted. At the end of each</div><div class='add'>+ * correction period/beginning of new one, the length of a delta is shrunk or</div><div class='add'>+ * expanded with an integer number of ticks, compared with the typical 25.</div><div class='add'>+ * So a delta lasts for 200ns (or 25 ticks) only on average.</div><div class='add'>+ * Sometimes it is longer, sometimes it is shorter. The internal syntonization</div><div class='add'>+ * logic can adjust for at most 5 ticks each 20 ticks.</div><div class='add'>+ *</div><div class='add'>+ * The first implication is that you should choose your schedule correction</div><div class='add'>+ * period to be an integer multiple of the schedule length. Preferably one.</div><div class='add'>+ * In case there are schedules of multiple ports active, then the correction</div><div class='add'>+ * period needs to be a multiple of them all. Given the restriction that the</div><div class='add'>+ * cycle times have to be multiples of one another anyway, this means the</div><div class='add'>+ * correction period can simply be the largest cycle time, hence the current</div><div class='add'>+ * choice. This way, the updates are always synchronous to the transmission</div><div class='add'>+ * cycle, and therefore predictable.</div><div class='add'>+ *</div><div class='add'>+ * The second implication is that at the beginning of a correction period, the</div><div class='add'>+ * first few deltas will be modulated in time, until the schedule engine is</div><div class='add'>+ * properly phase-aligned with the PTP clock. For this reason, you should place</div><div class='add'>+ * your best-effort traffic at the beginning of a cycle, and your</div><div class='add'>+ * time-triggered traffic afterwards.</div><div class='add'>+ *</div><div class='add'>+ * The third implication is that once the schedule engine is started, it can</div><div class='add'>+ * only adjust for so much drift within a correction period. In the servo you</div><div class='add'>+ * can only change the PTPCLKRATE, but not step the clock (PTPCLKADD). If you</div><div class='add'>+ * want to do the latter, you need to stop and restart the schedule engine,</div><div class='add'>+ * which is what the state machine handles.</div><div class='add'>+ */</div><div class='add'>+static void sja1105_tas_state_machine(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_tas_data *tas_data = work_to_sja1105_tas(work);</div><div class='add'>+	struct sja1105_private *priv = tas_to_sja1105(tas_data);</div><div class='add'>+	struct sja1105_ptp_data *ptp_data = &amp;priv-&gt;ptp_data;</div><div class='add'>+	struct timespec64 base_time_ts, now_ts;</div><div class='add'>+	struct dsa_switch *ds = priv-&gt;ds;</div><div class='add'>+	struct timespec64 diff;</div><div class='add'>+	s64 base_time, now;</div><div class='add'>+	int rc = 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;ptp_data-&gt;lock);</div><div class='add'>+</div><div class='add'>+	switch (tas_data-&gt;state) {</div><div class='add'>+	case SJA1105_TAS_STATE_DISABLED:</div><div class='add'>+		/* Can't do anything at all if clock is still being stepped */</div><div class='add'>+		if (tas_data-&gt;last_op != SJA1105_PTP_ADJUSTFREQ)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		rc = sja1105_tas_adjust_drift(priv, tas_data-&gt;max_cycle_time);</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		rc = __sja1105_ptp_gettimex(ds, &amp;now, NULL);</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		/* Plan to start the earliest schedule first. The others</div><div class='add'>+		 * will be started in hardware, by way of their respective</div><div class='add'>+		 * entry points delta.</div><div class='add'>+		 * Try our best to avoid fringe cases (race condition between</div><div class='add'>+		 * ptpschtm and ptpstrtsch) by pushing the oper_base_time at</div><div class='add'>+		 * least one second in the future from now. This is not ideal,</div><div class='add'>+		 * but this only needs to buy us time until the</div><div class='add'>+		 * sja1105_tas_start command below gets executed.</div><div class='add'>+		 */</div><div class='add'>+		base_time = future_base_time(tas_data-&gt;earliest_base_time,</div><div class='add'>+					     tas_data-&gt;max_cycle_time,</div><div class='add'>+					     now + 1ull * NSEC_PER_SEC);</div><div class='add'>+		base_time -= sja1105_delta_to_ns(1);</div><div class='add'>+</div><div class='add'>+		rc = sja1105_tas_set_base_time(priv, base_time);</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		tas_data-&gt;oper_base_time = base_time;</div><div class='add'>+</div><div class='add'>+		rc = sja1105_tas_start(priv);</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		base_time_ts = ns_to_timespec64(base_time);</div><div class='add'>+		now_ts = ns_to_timespec64(now);</div><div class='add'>+</div><div class='add'>+		dev_dbg(ds-&gt;dev, "OPER base time %ptSp (now %ptSp)\n",</div><div class='add'>+			&amp;base_time_ts, &amp;now_ts);</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SJA1105_TAS_STATE_ENABLED_NOT_RUNNING:</div><div class='add'>+		if (tas_data-&gt;last_op != SJA1105_PTP_ADJUSTFREQ) {</div><div class='add'>+			/* Clock was stepped.. bad news for TAS */</div><div class='add'>+			sja1105_tas_stop(priv);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Check if TAS has actually started, by comparing the</div><div class='add'>+		 * scheduled start time with the SJA1105 PTP clock</div><div class='add'>+		 */</div><div class='add'>+		rc = __sja1105_ptp_gettimex(ds, &amp;now, NULL);</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if (now &lt; tas_data-&gt;oper_base_time) {</div><div class='add'>+			/* TAS has not started yet */</div><div class='add'>+			diff = ns_to_timespec64(tas_data-&gt;oper_base_time - now);</div><div class='add'>+			dev_dbg(ds-&gt;dev, "time to start: [%ptSp]", &amp;diff);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Time elapsed, what happened? */</div><div class='add'>+		rc = sja1105_tas_check_running(priv);</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if (tas_data-&gt;state != SJA1105_TAS_STATE_RUNNING)</div><div class='add'>+			/* TAS has started */</div><div class='add'>+			dev_err(ds-&gt;dev,</div><div class='add'>+				"TAS not started despite time elapsed\n");</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case SJA1105_TAS_STATE_RUNNING:</div><div class='add'>+		/* Clock was stepped.. bad news for TAS */</div><div class='add'>+		if (tas_data-&gt;last_op != SJA1105_PTP_ADJUSTFREQ) {</div><div class='add'>+			sja1105_tas_stop(priv);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		rc = sja1105_tas_check_running(priv);</div><div class='add'>+		if (rc &lt; 0)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if (tas_data-&gt;state != SJA1105_TAS_STATE_RUNNING)</div><div class='add'>+			dev_err(ds-&gt;dev, "TAS surprisingly stopped\n");</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		if (net_ratelimit())</div><div class='add'>+			dev_err(ds-&gt;dev, "TAS in an invalid state (incorrect use of API)!\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rc &amp;&amp; net_ratelimit())</div><div class='add'>+		dev_err(ds-&gt;dev, "An operation returned %d\n", rc);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;ptp_data-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void sja1105_tas_clockstep(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	struct sja1105_tas_data *tas_data = &amp;priv-&gt;tas_data;</div><div class='add'>+</div><div class='add'>+	if (!tas_data-&gt;enabled)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	tas_data-&gt;last_op = SJA1105_PTP_CLOCKSTEP;</div><div class='add'>+	schedule_work(&amp;tas_data-&gt;tas_work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void sja1105_tas_adjfreq(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	struct sja1105_tas_data *tas_data = &amp;priv-&gt;tas_data;</div><div class='add'>+</div><div class='add'>+	if (!tas_data-&gt;enabled)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* No reason to schedule the workqueue, nothing changed */</div><div class='add'>+	if (tas_data-&gt;state == SJA1105_TAS_STATE_RUNNING)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	tas_data-&gt;last_op = SJA1105_PTP_ADJUSTFREQ;</div><div class='add'>+	schedule_work(&amp;tas_data-&gt;tas_work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void sja1105_tas_setup(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	struct sja1105_tas_data *tas_data = &amp;priv-&gt;tas_data;</div><div class='add'>+</div><div class='add'>+	INIT_WORK(&amp;tas_data-&gt;tas_work, sja1105_tas_state_machine);</div><div class='add'>+	tas_data-&gt;state = SJA1105_TAS_STATE_DISABLED;</div><div class='add'>+	tas_data-&gt;last_op = SJA1105_PTP_NONE;</div><div class='add'>+</div><div class='add'>+	INIT_LIST_HEAD(&amp;tas_data-&gt;gating_cfg.entries);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void sja1105_tas_teardown(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_private *priv = ds-&gt;priv;</div><div class='add'>+	struct tc_taprio_qopt_offload *offload;</div><div class='add'>+	int port;</div><div class='add'>+</div><div class='add'>+	cancel_work_sync(&amp;priv-&gt;tas_data.tas_work);</div><div class='add'>+</div><div class='add'>+	for (port = 0; port &lt; ds-&gt;num_ports; port++) {</div><div class='add'>+		offload = priv-&gt;tas_data.offload[port];</div><div class='add'>+		if (!offload)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		taprio_offload_free(offload);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/dsa/sja1105/sja1105_tas.h b/drivers/net/dsa/sja1105/sja1105_tas.h<br/>new file mode 100644<br/>index 000000000000..c05bd07e8221<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/sja1105/sja1105_tas.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/sja1105/sja1105_tas.h</a></div><div class='hunk'>@@ -0,0 +1,104 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright (c) 2019, Vladimir Oltean &lt;olteanv@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+#ifndef _SJA1105_TAS_H</div><div class='add'>+#define _SJA1105_TAS_H</div><div class='add'>+</div><div class='add'>+#include &lt;net/pkt_sched.h&gt;</div><div class='add'>+</div><div class='add'>+#define SJA1105_TAS_MAX_DELTA		BIT(18)</div><div class='add'>+</div><div class='add'>+struct sja1105_private;</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_NET_DSA_SJA1105_TAS)</div><div class='add'>+</div><div class='add'>+enum sja1105_tas_state {</div><div class='add'>+	SJA1105_TAS_STATE_DISABLED,</div><div class='add'>+	SJA1105_TAS_STATE_ENABLED_NOT_RUNNING,</div><div class='add'>+	SJA1105_TAS_STATE_RUNNING,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum sja1105_ptp_op {</div><div class='add'>+	SJA1105_PTP_NONE,</div><div class='add'>+	SJA1105_PTP_CLOCKSTEP,</div><div class='add'>+	SJA1105_PTP_ADJUSTFREQ,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1105_gate_entry {</div><div class='add'>+	struct list_head list;</div><div class='add'>+	struct sja1105_rule *rule;</div><div class='add'>+	s64 interval;</div><div class='add'>+	u8 gate_state;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1105_gating_config {</div><div class='add'>+	u64 cycle_time;</div><div class='add'>+	s64 base_time;</div><div class='add'>+	int num_entries;</div><div class='add'>+	struct list_head entries;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sja1105_tas_data {</div><div class='add'>+	struct tc_taprio_qopt_offload *offload[SJA1105_MAX_NUM_PORTS];</div><div class='add'>+	struct sja1105_gating_config gating_cfg;</div><div class='add'>+	enum sja1105_tas_state state;</div><div class='add'>+	enum sja1105_ptp_op last_op;</div><div class='add'>+	struct work_struct tas_work;</div><div class='add'>+	s64 earliest_base_time;</div><div class='add'>+	s64 oper_base_time;</div><div class='add'>+	u64 max_cycle_time;</div><div class='add'>+	bool enabled;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int sja1105_setup_tc_taprio(struct dsa_switch *ds, int port,</div><div class='add'>+			    struct tc_taprio_qopt_offload *admin);</div><div class='add'>+</div><div class='add'>+void sja1105_tas_setup(struct dsa_switch *ds);</div><div class='add'>+</div><div class='add'>+void sja1105_tas_teardown(struct dsa_switch *ds);</div><div class='add'>+</div><div class='add'>+void sja1105_tas_clockstep(struct dsa_switch *ds);</div><div class='add'>+</div><div class='add'>+void sja1105_tas_adjfreq(struct dsa_switch *ds);</div><div class='add'>+</div><div class='add'>+bool sja1105_gating_check_conflicts(struct sja1105_private *priv, int port,</div><div class='add'>+				    struct netlink_ext_ack *extack);</div><div class='add'>+</div><div class='add'>+int sja1105_init_scheduling(struct sja1105_private *priv);</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+</div><div class='add'>+/* C doesn't allow empty structures, bah! */</div><div class='add'>+struct sja1105_tas_data {</div><div class='add'>+	u8 dummy;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline int sja1105_setup_tc_taprio(struct dsa_switch *ds, int port,</div><div class='add'>+					  struct tc_taprio_qopt_offload *admin)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void sja1105_tas_setup(struct dsa_switch *ds) { }</div><div class='add'>+</div><div class='add'>+static inline void sja1105_tas_teardown(struct dsa_switch *ds) { }</div><div class='add'>+</div><div class='add'>+static inline void sja1105_tas_clockstep(struct dsa_switch *ds) { }</div><div class='add'>+</div><div class='add'>+static inline void sja1105_tas_adjfreq(struct dsa_switch *ds) { }</div><div class='add'>+</div><div class='add'>+static inline bool</div><div class='add'>+sja1105_gating_check_conflicts(struct dsa_switch *ds, int port,</div><div class='add'>+			       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int sja1105_init_scheduling(struct sja1105_private *priv)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* IS_ENABLED(CONFIG_NET_DSA_SJA1105_TAS) */</div><div class='add'>+</div><div class='add'>+#endif /* _SJA1105_TAS_H */</div><div class='head'>diff --git a/drivers/net/dsa/sja1105/sja1105_vl.c b/drivers/net/dsa/sja1105/sja1105_vl.c<br/>new file mode 100644<br/>index 000000000000..b7e95d60a6e4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/sja1105/sja1105_vl.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/sja1105/sja1105_vl.c</a></div><div class='hunk'>@@ -0,0 +1,802 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright 2020 NXP</div><div class='add'>+ */</div><div class='add'>+#include &lt;net/tc_act/tc_gate.h&gt;</div><div class='add'>+#include &lt;linux/dsa/8021q.h&gt;</div><div class='add'>+#include "sja1105_vl.h"</div><div class='add'>+</div><div class='add'>+#define SJA1105_SIZE_VL_STATUS			8</div><div class='add'>+</div><div class='add'>+/* Insert into the global gate list, sorted by gate action time. */</div><div class='add'>+static int sja1105_insert_gate_entry(struct sja1105_gating_config *gating_cfg,</div><div class='add'>+				     struct sja1105_rule *rule,</div><div class='add'>+				     u8 gate_state, s64 entry_time,</div><div class='add'>+				     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_gate_entry *e;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	e = kzalloc(sizeof(*e), GFP_KERNEL);</div><div class='add'>+	if (!e)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	e-&gt;rule = rule;</div><div class='add'>+	e-&gt;gate_state = gate_state;</div><div class='add'>+	e-&gt;interval = entry_time;</div><div class='add'>+</div><div class='add'>+	if (list_empty(&amp;gating_cfg-&gt;entries)) {</div><div class='add'>+		list_add(&amp;e-&gt;list, &amp;gating_cfg-&gt;entries);</div><div class='add'>+	} else {</div><div class='add'>+		struct sja1105_gate_entry *p;</div><div class='add'>+</div><div class='add'>+		list_for_each_entry(p, &amp;gating_cfg-&gt;entries, list) {</div><div class='add'>+			if (p-&gt;interval == e-&gt;interval) {</div><div class='add'>+				NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+						   "Gate conflict");</div><div class='add'>+				rc = -EBUSY;</div><div class='add'>+				goto err;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (e-&gt;interval &lt; p-&gt;interval)</div><div class='add'>+				break;</div><div class='add'>+		}</div><div class='add'>+		list_add(&amp;e-&gt;list, p-&gt;list.prev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	gating_cfg-&gt;num_entries++;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+err:</div><div class='add'>+	kfree(e);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The gate entries contain absolute times in their e-&gt;interval field. Convert</div><div class='add'>+ * that to proper intervals (i.e. "0, 5, 10, 15" to "5, 5, 5, 5").</div><div class='add'>+ */</div><div class='add'>+static void</div><div class='add'>+sja1105_gating_cfg_time_to_interval(struct sja1105_gating_config *gating_cfg,</div><div class='add'>+				    u64 cycle_time)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_gate_entry *last_e;</div><div class='add'>+	struct sja1105_gate_entry *e;</div><div class='add'>+	struct list_head *prev;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(e, &amp;gating_cfg-&gt;entries, list) {</div><div class='add'>+		struct sja1105_gate_entry *p;</div><div class='add'>+</div><div class='add'>+		prev = e-&gt;list.prev;</div><div class='add'>+</div><div class='add'>+		if (prev == &amp;gating_cfg-&gt;entries)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		p = list_entry(prev, struct sja1105_gate_entry, list);</div><div class='add'>+		p-&gt;interval = e-&gt;interval - p-&gt;interval;</div><div class='add'>+	}</div><div class='add'>+	last_e = list_last_entry(&amp;gating_cfg-&gt;entries,</div><div class='add'>+				 struct sja1105_gate_entry, list);</div><div class='add'>+	last_e-&gt;interval = cycle_time - last_e-&gt;interval;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void sja1105_free_gating_config(struct sja1105_gating_config *gating_cfg)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_gate_entry *e, *n;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry_safe(e, n, &amp;gating_cfg-&gt;entries, list) {</div><div class='add'>+		list_del(&amp;e-&gt;list);</div><div class='add'>+		kfree(e);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_compose_gating_subschedule(struct sja1105_private *priv,</div><div class='add'>+					      struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_gating_config *gating_cfg = &amp;priv-&gt;tas_data.gating_cfg;</div><div class='add'>+	struct sja1105_rule *rule;</div><div class='add'>+	s64 max_cycle_time = 0;</div><div class='add'>+	s64 its_base_time = 0;</div><div class='add'>+	int i, rc = 0;</div><div class='add'>+</div><div class='add'>+	sja1105_free_gating_config(gating_cfg);</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(rule, &amp;priv-&gt;flow_block.rules, list) {</div><div class='add'>+		if (rule-&gt;type != SJA1105_RULE_VL)</div><div class='add'>+			continue;</div><div class='add'>+		if (rule-&gt;vl.type != SJA1105_VL_TIME_TRIGGERED)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (max_cycle_time &lt; rule-&gt;vl.cycle_time) {</div><div class='add'>+			max_cycle_time = rule-&gt;vl.cycle_time;</div><div class='add'>+			its_base_time = rule-&gt;vl.base_time;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!max_cycle_time)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	dev_dbg(priv-&gt;ds-&gt;dev, "max_cycle_time %lld its_base_time %lld\n",</div><div class='add'>+		max_cycle_time, its_base_time);</div><div class='add'>+</div><div class='add'>+	gating_cfg-&gt;base_time = its_base_time;</div><div class='add'>+	gating_cfg-&gt;cycle_time = max_cycle_time;</div><div class='add'>+	gating_cfg-&gt;num_entries = 0;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(rule, &amp;priv-&gt;flow_block.rules, list) {</div><div class='add'>+		s64 time;</div><div class='add'>+		s64 rbt;</div><div class='add'>+</div><div class='add'>+		if (rule-&gt;type != SJA1105_RULE_VL)</div><div class='add'>+			continue;</div><div class='add'>+		if (rule-&gt;vl.type != SJA1105_VL_TIME_TRIGGERED)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* Calculate the difference between this gating schedule's</div><div class='add'>+		 * base time, and the base time of the gating schedule with the</div><div class='add'>+		 * longest cycle time. We call it the relative base time (rbt).</div><div class='add'>+		 */</div><div class='add'>+		rbt = future_base_time(rule-&gt;vl.base_time, rule-&gt;vl.cycle_time,</div><div class='add'>+				       its_base_time);</div><div class='add'>+		rbt -= its_base_time;</div><div class='add'>+</div><div class='add'>+		time = rbt;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; rule-&gt;vl.num_entries; i++) {</div><div class='add'>+			u8 gate_state = rule-&gt;vl.entries[i].gate_state;</div><div class='add'>+			s64 entry_time = time;</div><div class='add'>+</div><div class='add'>+			while (entry_time &lt; max_cycle_time) {</div><div class='add'>+				rc = sja1105_insert_gate_entry(gating_cfg, rule,</div><div class='add'>+							       gate_state,</div><div class='add'>+							       entry_time,</div><div class='add'>+							       extack);</div><div class='add'>+				if (rc)</div><div class='add'>+					goto err;</div><div class='add'>+</div><div class='add'>+				entry_time += rule-&gt;vl.cycle_time;</div><div class='add'>+			}</div><div class='add'>+			time += rule-&gt;vl.entries[i].interval;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sja1105_gating_cfg_time_to_interval(gating_cfg, max_cycle_time);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+err:</div><div class='add'>+	sja1105_free_gating_config(gating_cfg);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The switch flow classification core implements TTEthernet, which 'thinks' in</div><div class='add'>+ * terms of Virtual Links (VL), a concept borrowed from ARINC 664 part 7.</div><div class='add'>+ * However it also has one other operating mode (VLLUPFORMAT=0) where it acts</div><div class='add'>+ * somewhat closer to a pre-standard implementation of IEEE 802.1Qci</div><div class='add'>+ * (Per-Stream Filtering and Policing), which is what the driver is going to be</div><div class='add'>+ * implementing.</div><div class='add'>+ *</div><div class='add'>+ *                                 VL Lookup</div><div class='add'>+ *        Key = {DMAC &amp;&amp; VLANID   +---------+  Key = { (DMAC[47:16] &amp; VLMASK ==</div><div class='add'>+ *               &amp;&amp; VLAN PCP      |         |                         VLMARKER)</div><div class='add'>+ *               &amp;&amp; INGRESS PORT} +---------+                      (both fixed)</div><div class='add'>+ *            (exact match,            |             &amp;&amp; DMAC[15:0] == VLID</div><div class='add'>+ *         all specified in rule)      |                    (specified in rule)</div><div class='add'>+ *                                     v             &amp;&amp; INGRESS PORT }</div><div class='add'>+ *                               ------------</div><div class='add'>+ *                    0 (PSFP)  /            \  1 (ARINC664)</div><div class='add'>+ *                 +-----------/  VLLUPFORMAT \----------+</div><div class='add'>+ *                 |           \    (fixed)   /          |</div><div class='add'>+ *                 |            \            /           |</div><div class='add'>+ *  0 (forwarding) v             ------------            |</div><div class='add'>+ *           ------------                                |</div><div class='add'>+ *          /            \  1 (QoS classification)       |</div><div class='add'>+ *     +---/  ISCRITICAL  \-----------+                  |</div><div class='add'>+ *     |   \  (per rule)  /           |                  |</div><div class='add'>+ *     |    \            /   VLID taken from      VLID taken from</div><div class='add'>+ *     v     ------------     index of rule       contents of rule</div><div class='add'>+ *  select                     that matched         that matched</div><div class='add'>+ * DESTPORTS                          |                  |</div><div class='add'>+ *  |                                 +---------+--------+</div><div class='add'>+ *  |                                           |</div><div class='add'>+ *  |                                           v</div><div class='add'>+ *  |                                     VL Forwarding</div><div class='add'>+ *  |                                   (indexed by VLID)</div><div class='add'>+ *  |                                      +---------+</div><div class='add'>+ *  |                       +--------------|         |</div><div class='add'>+ *  |                       |  select TYPE +---------+</div><div class='add'>+ *  |                       v</div><div class='add'>+ *  |   0 (rate      ------------    1 (time</div><div class='add'>+ *  |  constrained) /            \   triggered)</div><div class='add'>+ *  |       +------/     TYPE     \------------+</div><div class='add'>+ *  |       |      \  (per VLID)  /            |</div><div class='add'>+ *  |       v       \            /             v</div><div class='add'>+ *  |  VL Policing   ------------         VL Policing</div><div class='add'>+ *  | (indexed by VLID)                (indexed by VLID)</div><div class='add'>+ *  |  +---------+                        +---------+</div><div class='add'>+ *  |  | TYPE=0  |                        | TYPE=1  |</div><div class='add'>+ *  |  +---------+                        +---------+</div><div class='add'>+ *  |  select SHARINDX                 select SHARINDX to</div><div class='add'>+ *  |  to rate-limit                 re-enter VL Forwarding</div><div class='add'>+ *  |  groups of VL's               with new VLID for egress</div><div class='add'>+ *  |  to same quota                           |</div><div class='add'>+ *  |       |                                  |</div><div class='add'>+ *  |  select MAXLEN -&gt; exceed =&gt; drop    select MAXLEN -&gt; exceed =&gt; drop</div><div class='add'>+ *  |       |                                  |</div><div class='add'>+ *  |       v                                  v</div><div class='add'>+ *  |  VL Forwarding                      VL Forwarding</div><div class='add'>+ *  | (indexed by SHARINDX)             (indexed by SHARINDX)</div><div class='add'>+ *  |  +---------+                        +---------+</div><div class='add'>+ *  |  | TYPE=0  |                        | TYPE=1  |</div><div class='add'>+ *  |  +---------+                        +---------+</div><div class='add'>+ *  |  select PRIORITY,                 select PRIORITY,</div><div class='add'>+ *  | PARTITION, DESTPORTS            PARTITION, DESTPORTS</div><div class='add'>+ *  |       |                                  |</div><div class='add'>+ *  |       v                                  v</div><div class='add'>+ *  |  VL Policing                        VL Policing</div><div class='add'>+ *  | (indexed by SHARINDX)           (indexed by SHARINDX)</div><div class='add'>+ *  |  +---------+                        +---------+</div><div class='add'>+ *  |  | TYPE=0  |                        | TYPE=1  |</div><div class='add'>+ *  |  +---------+                        +---------+</div><div class='add'>+ *  |       |                                  |</div><div class='add'>+ *  |       v                                  |</div><div class='add'>+ *  |  select BAG, -&gt; exceed =&gt; drop           |</div><div class='add'>+ *  |    JITTER                                v</div><div class='add'>+ *  |       |             ----------------------------------------------</div><div class='add'>+ *  |       |            /    Reception Window is open for this VL      \</div><div class='add'>+ *  |       |           /    (the Schedule Table executes an entry i     \</div><div class='add'>+ *  |       |          /   M &lt;= i &lt; N, for which these conditions hold):  \ no</div><div class='add'>+ *  |       |    +----/                                                    \-+</div><div class='add'>+ *  |       |    |yes \       WINST[M] == 1 &amp;&amp; WINSTINDEX[M] == VLID       / |</div><div class='add'>+ *  |       |    |     \     WINEND[N] == 1 &amp;&amp; WINSTINDEX[N] == VLID      /  |</div><div class='add'>+ *  |       |    |      \                                                /   |</div><div class='add'>+ *  |       |    |       \ (the VL window has opened and not yet closed)/    |</div><div class='add'>+ *  |       |    |        ----------------------------------------------     |</div><div class='add'>+ *  |       |    v                                                           v</div><div class='add'>+ *  |       |  dispatch to DESTPORTS when the Schedule Table               drop</div><div class='add'>+ *  |       |  executes an entry i with TXEN == 1 &amp;&amp; VLINDEX == i</div><div class='add'>+ *  v       v</div><div class='add'>+ * dispatch immediately to DESTPORTS</div><div class='add'>+ *</div><div class='add'>+ * The per-port classification key is always composed of {DMAC, VID, PCP} and</div><div class='add'>+ * is non-maskable. This 'looks like' the NULL stream identification function</div><div class='add'>+ * from IEEE 802.1CB clause 6, except for the extra VLAN PCP. When the switch</div><div class='add'>+ * ports operate as VLAN-unaware, we do allow the user to not specify the VLAN</div><div class='add'>+ * ID and PCP, and then the port-based defaults will be used.</div><div class='add'>+ *</div><div class='add'>+ * In TTEthernet, routing is something that needs to be done manually for each</div><div class='add'>+ * Virtual Link. So the flow action must always include one of:</div><div class='add'>+ * a. 'redirect', 'trap' or 'drop': select the egress port list</div><div class='add'>+ * Additionally, the following actions may be applied on a Virtual Link,</div><div class='add'>+ * turning it into 'critical' traffic:</div><div class='add'>+ * b. 'police': turn it into a rate-constrained VL, with bandwidth limitation</div><div class='add'>+ *    given by the maximum frame length, bandwidth allocation gap (BAG) and</div><div class='add'>+ *    maximum jitter.</div><div class='add'>+ * c. 'gate': turn it into a time-triggered VL, which can be only be received</div><div class='add'>+ *    and forwarded according to a given schedule.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static bool sja1105_vl_key_lower(struct sja1105_vl_lookup_entry *a,</div><div class='add'>+				 struct sja1105_vl_lookup_entry *b)</div><div class='add'>+{</div><div class='add'>+	if (a-&gt;macaddr &lt; b-&gt;macaddr)</div><div class='add'>+		return true;</div><div class='add'>+	if (a-&gt;macaddr &gt; b-&gt;macaddr)</div><div class='add'>+		return false;</div><div class='add'>+	if (a-&gt;vlanid &lt; b-&gt;vlanid)</div><div class='add'>+		return true;</div><div class='add'>+	if (a-&gt;vlanid &gt; b-&gt;vlanid)</div><div class='add'>+		return false;</div><div class='add'>+	if (a-&gt;port &lt; b-&gt;port)</div><div class='add'>+		return true;</div><div class='add'>+	if (a-&gt;port &gt; b-&gt;port)</div><div class='add'>+		return false;</div><div class='add'>+	if (a-&gt;vlanprior &lt; b-&gt;vlanprior)</div><div class='add'>+		return true;</div><div class='add'>+	if (a-&gt;vlanprior &gt; b-&gt;vlanprior)</div><div class='add'>+		return false;</div><div class='add'>+	/* Keys are equal */</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* FIXME: this should change when the bridge upper of the port changes. */</div><div class='add'>+static u16 sja1105_port_get_tag_8021q_vid(struct dsa_port *dp)</div><div class='add'>+{</div><div class='add'>+	unsigned long bridge_num;</div><div class='add'>+</div><div class='add'>+	if (!dp-&gt;bridge)</div><div class='add'>+		return dsa_tag_8021q_standalone_vid(dp);</div><div class='add'>+</div><div class='add'>+	bridge_num = dsa_port_bridge_num_get(dp);</div><div class='add'>+</div><div class='add'>+	return dsa_tag_8021q_bridge_vid(bridge_num);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_init_virtual_links(struct sja1105_private *priv,</div><div class='add'>+				      struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_vl_policing_entry *vl_policing;</div><div class='add'>+	struct sja1105_vl_forwarding_entry *vl_fwd;</div><div class='add'>+	struct sja1105_vl_lookup_entry *vl_lookup;</div><div class='add'>+	bool have_critical_virtual_links = false;</div><div class='add'>+	struct sja1105_table *table;</div><div class='add'>+	struct sja1105_rule *rule;</div><div class='add'>+	int num_virtual_links = 0;</div><div class='add'>+	int max_sharindx = 0;</div><div class='add'>+	int i, j, k;</div><div class='add'>+</div><div class='add'>+	/* Figure out the dimensioning of the problem */</div><div class='add'>+	list_for_each_entry(rule, &amp;priv-&gt;flow_block.rules, list) {</div><div class='add'>+		if (rule-&gt;type != SJA1105_RULE_VL)</div><div class='add'>+			continue;</div><div class='add'>+		/* Each VL lookup entry matches on a single ingress port */</div><div class='add'>+		num_virtual_links += hweight_long(rule-&gt;port_mask);</div><div class='add'>+</div><div class='add'>+		if (rule-&gt;vl.type != SJA1105_VL_NONCRITICAL)</div><div class='add'>+			have_critical_virtual_links = true;</div><div class='add'>+		if (max_sharindx &lt; rule-&gt;vl.sharindx)</div><div class='add'>+			max_sharindx = rule-&gt;vl.sharindx;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (num_virtual_links &gt; SJA1105_MAX_VL_LOOKUP_COUNT) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Not enough VL entries available");</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (max_sharindx + 1 &gt; SJA1105_MAX_VL_LOOKUP_COUNT) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Policer index out of range");</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	max_sharindx = max_t(int, num_virtual_links, max_sharindx) + 1;</div><div class='add'>+</div><div class='add'>+	/* Discard previous VL Lookup Table */</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_VL_LOOKUP];</div><div class='add'>+	if (table-&gt;entry_count) {</div><div class='add'>+		kfree(table-&gt;entries);</div><div class='add'>+		table-&gt;entry_count = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Discard previous VL Policing Table */</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_VL_POLICING];</div><div class='add'>+	if (table-&gt;entry_count) {</div><div class='add'>+		kfree(table-&gt;entries);</div><div class='add'>+		table-&gt;entry_count = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Discard previous VL Forwarding Table */</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_VL_FORWARDING];</div><div class='add'>+	if (table-&gt;entry_count) {</div><div class='add'>+		kfree(table-&gt;entries);</div><div class='add'>+		table-&gt;entry_count = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Discard previous VL Forwarding Parameters Table */</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_VL_FORWARDING_PARAMS];</div><div class='add'>+	if (table-&gt;entry_count) {</div><div class='add'>+		kfree(table-&gt;entries);</div><div class='add'>+		table-&gt;entry_count = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Nothing to do */</div><div class='add'>+	if (!num_virtual_links)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Pre-allocate space in the static config tables */</div><div class='add'>+</div><div class='add'>+	/* VL Lookup Table */</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_VL_LOOKUP];</div><div class='add'>+	table-&gt;entries = kcalloc(num_virtual_links,</div><div class='add'>+				 table-&gt;ops-&gt;unpacked_entry_size,</div><div class='add'>+				 GFP_KERNEL);</div><div class='add'>+	if (!table-&gt;entries)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	table-&gt;entry_count = num_virtual_links;</div><div class='add'>+	vl_lookup = table-&gt;entries;</div><div class='add'>+</div><div class='add'>+	k = 0;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(rule, &amp;priv-&gt;flow_block.rules, list) {</div><div class='add'>+		unsigned long port;</div><div class='add'>+</div><div class='add'>+		if (rule-&gt;type != SJA1105_RULE_VL)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		for_each_set_bit(port, &amp;rule-&gt;port_mask, SJA1105_MAX_NUM_PORTS) {</div><div class='add'>+			vl_lookup[k].format = SJA1105_VL_FORMAT_PSFP;</div><div class='add'>+			vl_lookup[k].port = port;</div><div class='add'>+			vl_lookup[k].macaddr = rule-&gt;key.vl.dmac;</div><div class='add'>+			if (rule-&gt;key.type == SJA1105_KEY_VLAN_AWARE_VL) {</div><div class='add'>+				vl_lookup[k].vlanid = rule-&gt;key.vl.vid;</div><div class='add'>+				vl_lookup[k].vlanprior = rule-&gt;key.vl.pcp;</div><div class='add'>+			} else {</div><div class='add'>+				/* FIXME */</div><div class='add'>+				struct dsa_port *dp = dsa_to_port(priv-&gt;ds, port);</div><div class='add'>+				u16 vid = sja1105_port_get_tag_8021q_vid(dp);</div><div class='add'>+</div><div class='add'>+				vl_lookup[k].vlanid = vid;</div><div class='add'>+				vl_lookup[k].vlanprior = 0;</div><div class='add'>+			}</div><div class='add'>+			/* For critical VLs, the DESTPORTS mask is taken from</div><div class='add'>+			 * the VL Forwarding Table, so no point in putting it</div><div class='add'>+			 * in the VL Lookup Table</div><div class='add'>+			 */</div><div class='add'>+			if (rule-&gt;vl.type == SJA1105_VL_NONCRITICAL)</div><div class='add'>+				vl_lookup[k].destports = rule-&gt;vl.destports;</div><div class='add'>+			else</div><div class='add'>+				vl_lookup[k].iscritical = true;</div><div class='add'>+			vl_lookup[k].flow_cookie = rule-&gt;cookie;</div><div class='add'>+			k++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* UM10944.pdf chapter 4.2.3 VL Lookup table:</div><div class='add'>+	 * "the entries in the VL Lookup table must be sorted in ascending</div><div class='add'>+	 * order (i.e. the smallest value must be loaded first) according to</div><div class='add'>+	 * the following sort order: MACADDR, VLANID, PORT, VLANPRIOR."</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; num_virtual_links; i++) {</div><div class='add'>+		struct sja1105_vl_lookup_entry *a = &amp;vl_lookup[i];</div><div class='add'>+</div><div class='add'>+		for (j = i + 1; j &lt; num_virtual_links; j++) {</div><div class='add'>+			struct sja1105_vl_lookup_entry *b = &amp;vl_lookup[j];</div><div class='add'>+</div><div class='add'>+			if (sja1105_vl_key_lower(b, a)) {</div><div class='add'>+				struct sja1105_vl_lookup_entry tmp = *a;</div><div class='add'>+</div><div class='add'>+				*a = *b;</div><div class='add'>+				*b = tmp;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!have_critical_virtual_links)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* VL Policing Table */</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_VL_POLICING];</div><div class='add'>+	table-&gt;entries = kcalloc(max_sharindx, table-&gt;ops-&gt;unpacked_entry_size,</div><div class='add'>+				 GFP_KERNEL);</div><div class='add'>+	if (!table-&gt;entries)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	table-&gt;entry_count = max_sharindx;</div><div class='add'>+	vl_policing = table-&gt;entries;</div><div class='add'>+</div><div class='add'>+	/* VL Forwarding Table */</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_VL_FORWARDING];</div><div class='add'>+	table-&gt;entries = kcalloc(max_sharindx, table-&gt;ops-&gt;unpacked_entry_size,</div><div class='add'>+				 GFP_KERNEL);</div><div class='add'>+	if (!table-&gt;entries)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	table-&gt;entry_count = max_sharindx;</div><div class='add'>+	vl_fwd = table-&gt;entries;</div><div class='add'>+</div><div class='add'>+	/* VL Forwarding Parameters Table */</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_VL_FORWARDING_PARAMS];</div><div class='add'>+	table-&gt;entries = kcalloc(1, table-&gt;ops-&gt;unpacked_entry_size,</div><div class='add'>+				 GFP_KERNEL);</div><div class='add'>+	if (!table-&gt;entries)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	table-&gt;entry_count = 1;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_virtual_links; i++) {</div><div class='add'>+		unsigned long cookie = vl_lookup[i].flow_cookie;</div><div class='add'>+		struct sja1105_rule *rule = sja1105_rule_find(priv, cookie);</div><div class='add'>+</div><div class='add'>+		if (rule-&gt;vl.type == SJA1105_VL_NONCRITICAL)</div><div class='add'>+			continue;</div><div class='add'>+		if (rule-&gt;vl.type == SJA1105_VL_TIME_TRIGGERED) {</div><div class='add'>+			int sharindx = rule-&gt;vl.sharindx;</div><div class='add'>+</div><div class='add'>+			vl_policing[i].type = 1;</div><div class='add'>+			vl_policing[i].sharindx = sharindx;</div><div class='add'>+			vl_policing[i].maxlen = rule-&gt;vl.maxlen;</div><div class='add'>+			vl_policing[sharindx].type = 1;</div><div class='add'>+</div><div class='add'>+			vl_fwd[i].type = 1;</div><div class='add'>+			vl_fwd[sharindx].type = 1;</div><div class='add'>+			vl_fwd[sharindx].priority = rule-&gt;vl.ipv;</div><div class='add'>+			vl_fwd[sharindx].partition = 0;</div><div class='add'>+			vl_fwd[sharindx].destports = rule-&gt;vl.destports;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sja1105_frame_memory_partitioning(priv);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int sja1105_vl_redirect(struct sja1105_private *priv, int port,</div><div class='add'>+			struct netlink_ext_ack *extack, unsigned long cookie,</div><div class='add'>+			struct sja1105_key *key, unsigned long destports,</div><div class='add'>+			bool append)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_rule *rule = sja1105_rule_find(priv, cookie);</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(priv-&gt;ds, port);</div><div class='add'>+	bool vlan_aware = dsa_port_is_vlan_filtering(dp);</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (!vlan_aware &amp;&amp; key-&gt;type != SJA1105_KEY_VLAN_UNAWARE_VL) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Can only redirect based on DMAC");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	} else if (vlan_aware &amp;&amp; key-&gt;type != SJA1105_KEY_VLAN_AWARE_VL) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Can only redirect based on {DMAC, VID, PCP}");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!rule) {</div><div class='add'>+		rule = kzalloc(sizeof(*rule), GFP_KERNEL);</div><div class='add'>+		if (!rule)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		rule-&gt;cookie = cookie;</div><div class='add'>+		rule-&gt;type = SJA1105_RULE_VL;</div><div class='add'>+		rule-&gt;key = *key;</div><div class='add'>+		list_add(&amp;rule-&gt;list, &amp;priv-&gt;flow_block.rules);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rule-&gt;port_mask |= BIT(port);</div><div class='add'>+	if (append)</div><div class='add'>+		rule-&gt;vl.destports |= destports;</div><div class='add'>+	else</div><div class='add'>+		rule-&gt;vl.destports = destports;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_init_virtual_links(priv, extack);</div><div class='add'>+	if (rc) {</div><div class='add'>+		rule-&gt;port_mask &amp;= ~BIT(port);</div><div class='add'>+		if (!rule-&gt;port_mask) {</div><div class='add'>+			list_del(&amp;rule-&gt;list);</div><div class='add'>+			kfree(rule);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int sja1105_vl_delete(struct sja1105_private *priv, int port,</div><div class='add'>+		      struct sja1105_rule *rule, struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rule-&gt;port_mask &amp;= ~BIT(port);</div><div class='add'>+	if (!rule-&gt;port_mask) {</div><div class='add'>+		list_del(&amp;rule-&gt;list);</div><div class='add'>+		kfree(rule);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = sja1105_compose_gating_subschedule(priv, extack);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_init_virtual_links(priv, extack);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_init_scheduling(priv);</div><div class='add'>+	if (rc &lt; 0)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	return sja1105_static_config_reload(priv, SJA1105_VIRTUAL_LINKS);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int sja1105_vl_gate(struct sja1105_private *priv, int port,</div><div class='add'>+		    struct netlink_ext_ack *extack, unsigned long cookie,</div><div class='add'>+		    struct sja1105_key *key, u32 index, s32 prio,</div><div class='add'>+		    u64 base_time, u64 cycle_time, u64 cycle_time_ext,</div><div class='add'>+		    u32 num_entries, struct action_gate_entry *entries)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_rule *rule = sja1105_rule_find(priv, cookie);</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(priv-&gt;ds, port);</div><div class='add'>+	bool vlan_aware = dsa_port_is_vlan_filtering(dp);</div><div class='add'>+	int ipv = -1;</div><div class='add'>+	int i, rc;</div><div class='add'>+	s32 rem;</div><div class='add'>+</div><div class='add'>+	if (cycle_time_ext) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Cycle time extension not supported");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	div_s64_rem(base_time, sja1105_delta_to_ns(1), &amp;rem);</div><div class='add'>+	if (rem) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Base time must be multiple of 200 ns");</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	div_s64_rem(cycle_time, sja1105_delta_to_ns(1), &amp;rem);</div><div class='add'>+	if (rem) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Cycle time must be multiple of 200 ns");</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!vlan_aware &amp;&amp; key-&gt;type != SJA1105_KEY_VLAN_UNAWARE_VL) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Can only gate based on DMAC");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	} else if (vlan_aware &amp;&amp; key-&gt;type != SJA1105_KEY_VLAN_AWARE_VL) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Can only gate based on {DMAC, VID, PCP}");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!rule) {</div><div class='add'>+		rule = kzalloc(sizeof(*rule), GFP_KERNEL);</div><div class='add'>+		if (!rule)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		list_add(&amp;rule-&gt;list, &amp;priv-&gt;flow_block.rules);</div><div class='add'>+		rule-&gt;cookie = cookie;</div><div class='add'>+		rule-&gt;type = SJA1105_RULE_VL;</div><div class='add'>+		rule-&gt;key = *key;</div><div class='add'>+		rule-&gt;vl.type = SJA1105_VL_TIME_TRIGGERED;</div><div class='add'>+		rule-&gt;vl.sharindx = index;</div><div class='add'>+		rule-&gt;vl.base_time = base_time;</div><div class='add'>+		rule-&gt;vl.cycle_time = cycle_time;</div><div class='add'>+		rule-&gt;vl.num_entries = num_entries;</div><div class='add'>+		rule-&gt;vl.entries = kcalloc(num_entries,</div><div class='add'>+					   sizeof(struct action_gate_entry),</div><div class='add'>+					   GFP_KERNEL);</div><div class='add'>+		if (!rule-&gt;vl.entries) {</div><div class='add'>+			rc = -ENOMEM;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; num_entries; i++) {</div><div class='add'>+			div_s64_rem(entries[i].interval,</div><div class='add'>+				    sja1105_delta_to_ns(1), &amp;rem);</div><div class='add'>+			if (rem) {</div><div class='add'>+				NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+						   "Interval must be multiple of 200 ns");</div><div class='add'>+				rc = -ERANGE;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (!entries[i].interval) {</div><div class='add'>+				NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+						   "Interval cannot be zero");</div><div class='add'>+				rc = -ERANGE;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (ns_to_sja1105_delta(entries[i].interval) &gt;</div><div class='add'>+			    SJA1105_TAS_MAX_DELTA) {</div><div class='add'>+				NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+						   "Maximum interval is 52 ms");</div><div class='add'>+				rc = -ERANGE;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (entries[i].maxoctets != -1) {</div><div class='add'>+				NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+						   "Cannot offload IntervalOctetMax");</div><div class='add'>+				rc = -EOPNOTSUPP;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (ipv == -1) {</div><div class='add'>+				ipv = entries[i].ipv;</div><div class='add'>+			} else if (ipv != entries[i].ipv) {</div><div class='add'>+				NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+						   "Only support a single IPV per VL");</div><div class='add'>+				rc = -EOPNOTSUPP;</div><div class='add'>+				goto out;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			rule-&gt;vl.entries[i] = entries[i];</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (ipv == -1) {</div><div class='add'>+			if (key-&gt;type == SJA1105_KEY_VLAN_AWARE_VL)</div><div class='add'>+				ipv = key-&gt;vl.pcp;</div><div class='add'>+			else</div><div class='add'>+				ipv = 0;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* TODO: support per-flow MTU */</div><div class='add'>+		rule-&gt;vl.maxlen = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;</div><div class='add'>+		rule-&gt;vl.ipv = ipv;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rule-&gt;port_mask |= BIT(port);</div><div class='add'>+</div><div class='add'>+	rc = sja1105_compose_gating_subschedule(priv, extack);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_init_virtual_links(priv, extack);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (sja1105_gating_check_conflicts(priv, -1, extack)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Conflict with tc-taprio schedule");</div><div class='add'>+		rc = -ERANGE;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	if (rc) {</div><div class='add'>+		rule-&gt;port_mask &amp;= ~BIT(port);</div><div class='add'>+		if (!rule-&gt;port_mask) {</div><div class='add'>+			list_del(&amp;rule-&gt;list);</div><div class='add'>+			kfree(rule-&gt;vl.entries);</div><div class='add'>+			kfree(rule);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int sja1105_find_vlid(struct sja1105_private *priv, int port,</div><div class='add'>+			     struct sja1105_key *key)</div><div class='add'>+{</div><div class='add'>+	struct sja1105_vl_lookup_entry *vl_lookup;</div><div class='add'>+	struct sja1105_table *table;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (WARN_ON(key-&gt;type != SJA1105_KEY_VLAN_AWARE_VL &amp;&amp;</div><div class='add'>+		    key-&gt;type != SJA1105_KEY_VLAN_UNAWARE_VL))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	table = &amp;priv-&gt;static_config.tables[BLK_IDX_VL_LOOKUP];</div><div class='add'>+	vl_lookup = table-&gt;entries;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; table-&gt;entry_count; i++) {</div><div class='add'>+		if (key-&gt;type == SJA1105_KEY_VLAN_AWARE_VL) {</div><div class='add'>+			if (vl_lookup[i].port == port &amp;&amp;</div><div class='add'>+			    vl_lookup[i].macaddr == key-&gt;vl.dmac &amp;&amp;</div><div class='add'>+			    vl_lookup[i].vlanid == key-&gt;vl.vid &amp;&amp;</div><div class='add'>+			    vl_lookup[i].vlanprior == key-&gt;vl.pcp)</div><div class='add'>+				return i;</div><div class='add'>+		} else {</div><div class='add'>+			if (vl_lookup[i].port == port &amp;&amp;</div><div class='add'>+			    vl_lookup[i].macaddr == key-&gt;vl.dmac)</div><div class='add'>+				return i;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int sja1105_vl_stats(struct sja1105_private *priv, int port,</div><div class='add'>+		     struct sja1105_rule *rule, struct flow_stats *stats,</div><div class='add'>+		     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	const struct sja1105_regs *regs = priv-&gt;info-&gt;regs;</div><div class='add'>+	u8 buf[SJA1105_SIZE_VL_STATUS] = {0};</div><div class='add'>+	u64 unreleased;</div><div class='add'>+	u64 timingerr;</div><div class='add'>+	u64 lengtherr;</div><div class='add'>+	int vlid, rc;</div><div class='add'>+	u64 pkts;</div><div class='add'>+</div><div class='add'>+	if (rule-&gt;vl.type != SJA1105_VL_TIME_TRIGGERED)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	vlid = sja1105_find_vlid(priv, port, &amp;rule-&gt;key);</div><div class='add'>+	if (vlid &lt; 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	rc = sja1105_xfer_buf(priv, SPI_READ, regs-&gt;vl_status + 2 * vlid, buf,</div><div class='add'>+			      SJA1105_SIZE_VL_STATUS);</div><div class='add'>+	if (rc) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "SPI access failed");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sja1105_unpack(buf, &amp;timingerr,  31, 16, SJA1105_SIZE_VL_STATUS);</div><div class='add'>+	sja1105_unpack(buf, &amp;unreleased, 15,  0, SJA1105_SIZE_VL_STATUS);</div><div class='add'>+	sja1105_unpack(buf, &amp;lengtherr,  47, 32, SJA1105_SIZE_VL_STATUS);</div><div class='add'>+</div><div class='add'>+	pkts = timingerr + unreleased + lengtherr;</div><div class='add'>+</div><div class='add'>+	flow_stats_update(stats, 0, pkts - rule-&gt;vl.stats.pkts, 0,</div><div class='add'>+			  jiffies - rule-&gt;vl.stats.lastused,</div><div class='add'>+			  FLOW_ACTION_HW_STATS_IMMEDIATE);</div><div class='add'>+</div><div class='add'>+	rule-&gt;vl.stats.pkts = pkts;</div><div class='add'>+	rule-&gt;vl.stats.lastused = jiffies;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/dsa/sja1105/sja1105_vl.h b/drivers/net/dsa/sja1105/sja1105_vl.h<br/>new file mode 100644<br/>index 000000000000..51fba0dce91a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/sja1105/sja1105_vl.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/sja1105/sja1105_vl.h</a></div><div class='hunk'>@@ -0,0 +1,74 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright 2020 NXP</div><div class='add'>+ */</div><div class='add'>+#ifndef _SJA1105_VL_H</div><div class='add'>+#define _SJA1105_VL_H</div><div class='add'>+</div><div class='add'>+#include "sja1105.h"</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_NET_DSA_SJA1105_VL)</div><div class='add'>+</div><div class='add'>+int sja1105_vl_redirect(struct sja1105_private *priv, int port,</div><div class='add'>+			struct netlink_ext_ack *extack, unsigned long cookie,</div><div class='add'>+			struct sja1105_key *key, unsigned long destports,</div><div class='add'>+			bool append);</div><div class='add'>+</div><div class='add'>+int sja1105_vl_delete(struct sja1105_private *priv, int port,</div><div class='add'>+		      struct sja1105_rule *rule,</div><div class='add'>+		      struct netlink_ext_ack *extack);</div><div class='add'>+</div><div class='add'>+int sja1105_vl_gate(struct sja1105_private *priv, int port,</div><div class='add'>+		    struct netlink_ext_ack *extack, unsigned long cookie,</div><div class='add'>+		    struct sja1105_key *key, u32 index, s32 prio,</div><div class='add'>+		    u64 base_time, u64 cycle_time, u64 cycle_time_ext,</div><div class='add'>+		    u32 num_entries, struct action_gate_entry *entries);</div><div class='add'>+</div><div class='add'>+int sja1105_vl_stats(struct sja1105_private *priv, int port,</div><div class='add'>+		     struct sja1105_rule *rule, struct flow_stats *stats,</div><div class='add'>+		     struct netlink_ext_ack *extack);</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+</div><div class='add'>+static inline int sja1105_vl_redirect(struct sja1105_private *priv, int port,</div><div class='add'>+				      struct netlink_ext_ack *extack,</div><div class='add'>+				      unsigned long cookie,</div><div class='add'>+				      struct sja1105_key *key,</div><div class='add'>+				      unsigned long destports,</div><div class='add'>+				      bool append)</div><div class='add'>+{</div><div class='add'>+	NL_SET_ERR_MSG_MOD(extack, "Virtual Links not compiled in");</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int sja1105_vl_delete(struct sja1105_private *priv,</div><div class='add'>+				    int port, struct sja1105_rule *rule,</div><div class='add'>+				    struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	NL_SET_ERR_MSG_MOD(extack, "Virtual Links not compiled in");</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int sja1105_vl_gate(struct sja1105_private *priv, int port,</div><div class='add'>+				  struct netlink_ext_ack *extack,</div><div class='add'>+				  unsigned long cookie,</div><div class='add'>+				  struct sja1105_key *key, u32 index, s32 prio,</div><div class='add'>+				  u64 base_time, u64 cycle_time,</div><div class='add'>+				  u64 cycle_time_ext, u32 num_entries,</div><div class='add'>+				  struct action_gate_entry *entries)</div><div class='add'>+{</div><div class='add'>+	NL_SET_ERR_MSG_MOD(extack, "Virtual Links not compiled in");</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int sja1105_vl_stats(struct sja1105_private *priv, int port,</div><div class='add'>+				   struct sja1105_rule *rule,</div><div class='add'>+				   struct flow_stats *stats,</div><div class='add'>+				   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	NL_SET_ERR_MSG_MOD(extack, "Virtual Links not compiled in");</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* IS_ENABLED(CONFIG_NET_DSA_SJA1105_VL) */</div><div class='add'>+</div><div class='add'>+#endif /* _SJA1105_VL_H */</div><div class='head'>diff --git a/drivers/net/dsa/vitesse-vsc73xx-core.c b/drivers/net/dsa/vitesse-vsc73xx-core.c<br/>new file mode 100644<br/>index 000000000000..9d31b8258268<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/vitesse-vsc73xx-core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/vitesse-vsc73xx-core.c</a></div><div class='hunk'>@@ -0,0 +1,2416 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* DSA driver for:</div><div class='add'>+ * Vitesse VSC7385 SparX-G5 5+1-port Integrated Gigabit Ethernet Switch</div><div class='add'>+ * Vitesse VSC7388 SparX-G8 8-port Integrated Gigabit Ethernet Switch</div><div class='add'>+ * Vitesse VSC7395 SparX-G5e 5+1-port Integrated Gigabit Ethernet Switch</div><div class='add'>+ * Vitesse VSC7398 SparX-G8e 8-port Integrated Gigabit Ethernet Switch</div><div class='add'>+ *</div><div class='add'>+ * These switches have a built-in 8051 CPU and can download and execute a</div><div class='add'>+ * firmware in this CPU. They can also be configured to use an external CPU</div><div class='add'>+ * handling the switch in a memory-mapped manner by connecting to that external</div><div class='add'>+ * CPU's memory bus.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2018 Linus Wallej &lt;linus.walleij@linaro.org&gt;</div><div class='add'>+ * Includes portions of code from the firmware uploader by:</div><div class='add'>+ * Copyright (C) 2009 Gabor Juhos &lt;juhosg@openwrt.org&gt;</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/iopoll.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_mdio.h&gt;</div><div class='add'>+#include &lt;linux/bitops.h&gt;</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/if_bridge.h&gt;</div><div class='add'>+#include &lt;linux/if_vlan.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/gpio/consumer.h&gt;</div><div class='add'>+#include &lt;linux/gpio/driver.h&gt;</div><div class='add'>+#include &lt;linux/dsa/8021q.h&gt;</div><div class='add'>+#include &lt;linux/random.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+</div><div class='add'>+#include "vitesse-vsc73xx.h"</div><div class='add'>+</div><div class='add'>+#define VSC73XX_BLOCK_MAC	0x1 /* Subblocks 0-4, 6 (CPU port) */</div><div class='add'>+#define VSC73XX_BLOCK_ANALYZER	0x2 /* Only subblock 0 */</div><div class='add'>+#define VSC73XX_BLOCK_MII	0x3 /* Subblocks 0 and 1 */</div><div class='add'>+#define VSC73XX_BLOCK_MEMINIT	0x3 /* Only subblock 2 */</div><div class='add'>+#define VSC73XX_BLOCK_CAPTURE	0x4 /* Subblocks 0-4, 6, 7 */</div><div class='add'>+#define VSC73XX_BLOCK_ARBITER	0x5 /* Only subblock 0 */</div><div class='add'>+#define VSC73XX_BLOCK_SYSTEM	0x7 /* Only subblock 0 */</div><div class='add'>+</div><div class='add'>+/* MII Block subblock */</div><div class='add'>+#define VSC73XX_BLOCK_MII_INTERNAL	0x0 /* Internal MDIO subblock */</div><div class='add'>+#define VSC73XX_BLOCK_MII_EXTERNAL	0x1 /* External MDIO subblock */</div><div class='add'>+</div><div class='add'>+#define CPU_PORT	6 /* CPU port */</div><div class='add'>+#define VSC73XX_NUM_FDB_ROWS	2048</div><div class='add'>+#define VSC73XX_NUM_BUCKETS	4</div><div class='add'>+</div><div class='add'>+/* MAC Block registers */</div><div class='add'>+#define VSC73XX_MAC_CFG		0x00</div><div class='add'>+#define VSC73XX_MACHDXGAP	0x02</div><div class='add'>+#define VSC73XX_FCCONF		0x04</div><div class='add'>+#define VSC73XX_FCMACHI		0x08</div><div class='add'>+#define VSC73XX_FCMACLO		0x0c</div><div class='add'>+#define VSC73XX_MAXLEN		0x10</div><div class='add'>+#define VSC73XX_ADVPORTM	0x19</div><div class='add'>+#define VSC73XX_TXUPDCFG	0x24</div><div class='add'>+#define VSC73XX_TXQ_SELECT_CFG	0x28</div><div class='add'>+#define VSC73XX_RXOCT		0x50</div><div class='add'>+#define VSC73XX_TXOCT		0x51</div><div class='add'>+#define VSC73XX_C_RX0		0x52</div><div class='add'>+#define VSC73XX_C_RX1		0x53</div><div class='add'>+#define VSC73XX_C_RX2		0x54</div><div class='add'>+#define VSC73XX_C_TX0		0x55</div><div class='add'>+#define VSC73XX_C_TX1		0x56</div><div class='add'>+#define VSC73XX_C_TX2		0x57</div><div class='add'>+#define VSC73XX_C_CFG		0x58</div><div class='add'>+#define VSC73XX_CAT_DROP	0x6e</div><div class='add'>+#define VSC73XX_CAT_PR_MISC_L2	0x6f</div><div class='add'>+#define VSC73XX_CAT_PR_USR_PRIO	0x75</div><div class='add'>+#define VSC73XX_CAT_VLAN_MISC	0x79</div><div class='add'>+#define VSC73XX_CAT_PORT_VLAN	0x7a</div><div class='add'>+#define VSC73XX_Q_MISC_CONF	0xdf</div><div class='add'>+</div><div class='add'>+/* MAC_CFG register bits */</div><div class='add'>+#define VSC73XX_MAC_CFG_WEXC_DIS	BIT(31)</div><div class='add'>+#define VSC73XX_MAC_CFG_PORT_RST	BIT(29)</div><div class='add'>+#define VSC73XX_MAC_CFG_TX_EN		BIT(28)</div><div class='add'>+#define VSC73XX_MAC_CFG_SEED_LOAD	BIT(27)</div><div class='add'>+#define VSC73XX_MAC_CFG_SEED_MASK	GENMASK(26, 19)</div><div class='add'>+#define VSC73XX_MAC_CFG_SEED_OFFSET	19</div><div class='add'>+#define VSC73XX_MAC_CFG_FDX		BIT(18)</div><div class='add'>+#define VSC73XX_MAC_CFG_GIGA_MODE	BIT(17)</div><div class='add'>+#define VSC73XX_MAC_CFG_RX_EN		BIT(16)</div><div class='add'>+#define VSC73XX_MAC_CFG_VLAN_DBLAWR	BIT(15)</div><div class='add'>+#define VSC73XX_MAC_CFG_VLAN_AWR	BIT(14)</div><div class='add'>+#define VSC73XX_MAC_CFG_100_BASE_T	BIT(13) /* Not in manual */</div><div class='add'>+#define VSC73XX_MAC_CFG_TX_IPG_MASK	GENMASK(10, 6)</div><div class='add'>+#define VSC73XX_MAC_CFG_TX_IPG_OFFSET	6</div><div class='add'>+#define VSC73XX_MAC_CFG_TX_IPG_1000M	(6 &lt;&lt; VSC73XX_MAC_CFG_TX_IPG_OFFSET)</div><div class='add'>+#define VSC73XX_MAC_CFG_TX_IPG_100_10M	(17 &lt;&lt; VSC73XX_MAC_CFG_TX_IPG_OFFSET)</div><div class='add'>+#define VSC73XX_MAC_CFG_MAC_RX_RST	BIT(5)</div><div class='add'>+#define VSC73XX_MAC_CFG_MAC_TX_RST	BIT(4)</div><div class='add'>+#define VSC73XX_MAC_CFG_CLK_SEL_MASK	GENMASK(2, 0)</div><div class='add'>+#define VSC73XX_MAC_CFG_CLK_SEL_OFFSET	0</div><div class='add'>+#define VSC73XX_MAC_CFG_CLK_SEL_1000M	1</div><div class='add'>+#define VSC73XX_MAC_CFG_CLK_SEL_100M	2</div><div class='add'>+#define VSC73XX_MAC_CFG_CLK_SEL_10M	3</div><div class='add'>+#define VSC73XX_MAC_CFG_CLK_SEL_EXT	4</div><div class='add'>+</div><div class='add'>+#define VSC73XX_MAC_CFG_1000M_F_PHY	(VSC73XX_MAC_CFG_FDX | \</div><div class='add'>+					 VSC73XX_MAC_CFG_GIGA_MODE | \</div><div class='add'>+					 VSC73XX_MAC_CFG_TX_IPG_1000M | \</div><div class='add'>+					 VSC73XX_MAC_CFG_CLK_SEL_EXT)</div><div class='add'>+#define VSC73XX_MAC_CFG_100_10M_F_PHY	(VSC73XX_MAC_CFG_FDX | \</div><div class='add'>+					 VSC73XX_MAC_CFG_TX_IPG_100_10M | \</div><div class='add'>+					 VSC73XX_MAC_CFG_CLK_SEL_EXT)</div><div class='add'>+#define VSC73XX_MAC_CFG_100_10M_H_PHY	(VSC73XX_MAC_CFG_TX_IPG_100_10M | \</div><div class='add'>+					 VSC73XX_MAC_CFG_CLK_SEL_EXT)</div><div class='add'>+#define VSC73XX_MAC_CFG_1000M_F_RGMII	(VSC73XX_MAC_CFG_FDX | \</div><div class='add'>+					 VSC73XX_MAC_CFG_GIGA_MODE | \</div><div class='add'>+					 VSC73XX_MAC_CFG_TX_IPG_1000M | \</div><div class='add'>+					 VSC73XX_MAC_CFG_CLK_SEL_1000M)</div><div class='add'>+#define VSC73XX_MAC_CFG_RESET		(VSC73XX_MAC_CFG_PORT_RST | \</div><div class='add'>+					 VSC73XX_MAC_CFG_MAC_RX_RST | \</div><div class='add'>+					 VSC73XX_MAC_CFG_MAC_TX_RST)</div><div class='add'>+</div><div class='add'>+/* Flow control register bits */</div><div class='add'>+#define VSC73XX_FCCONF_ZERO_PAUSE_EN	BIT(17)</div><div class='add'>+#define VSC73XX_FCCONF_FLOW_CTRL_OBEY	BIT(16)</div><div class='add'>+#define VSC73XX_FCCONF_PAUSE_VAL_MASK	GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+/* ADVPORTM advanced port setup register bits */</div><div class='add'>+#define VSC73XX_ADVPORTM_IFG_PPM	BIT(7)</div><div class='add'>+#define VSC73XX_ADVPORTM_EXC_COL_CONT	BIT(6)</div><div class='add'>+#define VSC73XX_ADVPORTM_EXT_PORT	BIT(5)</div><div class='add'>+#define VSC73XX_ADVPORTM_INV_GTX	BIT(4)</div><div class='add'>+#define VSC73XX_ADVPORTM_ENA_GTX	BIT(3)</div><div class='add'>+#define VSC73XX_ADVPORTM_DDR_MODE	BIT(2)</div><div class='add'>+#define VSC73XX_ADVPORTM_IO_LOOPBACK	BIT(1)</div><div class='add'>+#define VSC73XX_ADVPORTM_HOST_LOOPBACK	BIT(0)</div><div class='add'>+</div><div class='add'>+/*  TXUPDCFG transmit modify setup bits */</div><div class='add'>+#define VSC73XX_TXUPDCFG_DSCP_REWR_MODE	GENMASK(20, 19)</div><div class='add'>+#define VSC73XX_TXUPDCFG_DSCP_REWR_ENA	BIT(18)</div><div class='add'>+#define VSC73XX_TXUPDCFG_TX_INT_TO_USRPRIO_ENA	BIT(17)</div><div class='add'>+#define VSC73XX_TXUPDCFG_TX_UNTAGGED_VID	GENMASK(15, 4)</div><div class='add'>+#define VSC73XX_TXUPDCFG_TX_UNTAGGED_VID_ENA	BIT(3)</div><div class='add'>+#define VSC73XX_TXUPDCFG_TX_UPDATE_CRC_CPU_ENA	BIT(1)</div><div class='add'>+#define VSC73XX_TXUPDCFG_TX_INSERT_TAG	BIT(0)</div><div class='add'>+</div><div class='add'>+#define VSC73XX_TXUPDCFG_TX_UNTAGGED_VID_SHIFT	4</div><div class='add'>+</div><div class='add'>+/* CAT_DROP categorizer frame dropping register bits */</div><div class='add'>+#define VSC73XX_CAT_DROP_DROP_MC_SMAC_ENA	BIT(6)</div><div class='add'>+#define VSC73XX_CAT_DROP_FWD_CTRL_ENA		BIT(4)</div><div class='add'>+#define VSC73XX_CAT_DROP_FWD_PAUSE_ENA		BIT(3)</div><div class='add'>+#define VSC73XX_CAT_DROP_UNTAGGED_ENA		BIT(2)</div><div class='add'>+#define VSC73XX_CAT_DROP_TAGGED_ENA		BIT(1)</div><div class='add'>+#define VSC73XX_CAT_DROP_NULL_MAC_ENA		BIT(0)</div><div class='add'>+</div><div class='add'>+#define VSC73XX_Q_MISC_CONF_EXTENT_MEM		BIT(31)</div><div class='add'>+#define VSC73XX_Q_MISC_CONF_EARLY_TX_MASK	GENMASK(4, 1)</div><div class='add'>+#define VSC73XX_Q_MISC_CONF_EARLY_TX_512	(1 &lt;&lt; 1)</div><div class='add'>+#define VSC73XX_Q_MISC_CONF_MAC_PAUSE_MODE	BIT(0)</div><div class='add'>+</div><div class='add'>+/* CAT_VLAN_MISC categorizer VLAN miscellaneous bits */</div><div class='add'>+#define VSC73XX_CAT_VLAN_MISC_VLAN_TCI_IGNORE_ENA BIT(8)</div><div class='add'>+#define VSC73XX_CAT_VLAN_MISC_VLAN_KEEP_TAG_ENA BIT(7)</div><div class='add'>+</div><div class='add'>+/* CAT_PORT_VLAN categorizer port VLAN */</div><div class='add'>+#define VSC73XX_CAT_PORT_VLAN_VLAN_CFI BIT(15)</div><div class='add'>+#define VSC73XX_CAT_PORT_VLAN_VLAN_USR_PRIO GENMASK(14, 12)</div><div class='add'>+#define VSC73XX_CAT_PORT_VLAN_VLAN_VID GENMASK(11, 0)</div><div class='add'>+</div><div class='add'>+/* Frame analyzer block 2 registers */</div><div class='add'>+#define VSC73XX_STORMLIMIT	0x02</div><div class='add'>+#define VSC73XX_ADVLEARN	0x03</div><div class='add'>+#define VSC73XX_IFLODMSK	0x04</div><div class='add'>+#define VSC73XX_VLANMASK	0x05</div><div class='add'>+#define VSC73XX_MACHDATA	0x06</div><div class='add'>+#define VSC73XX_MACLDATA	0x07</div><div class='add'>+#define VSC73XX_ANMOVED		0x08</div><div class='add'>+#define VSC73XX_ANAGEFIL	0x09</div><div class='add'>+#define VSC73XX_ANEVENTS	0x0a</div><div class='add'>+#define VSC73XX_ANCNTMASK	0x0b</div><div class='add'>+#define VSC73XX_ANCNTVAL	0x0c</div><div class='add'>+#define VSC73XX_LEARNMASK	0x0d</div><div class='add'>+#define VSC73XX_UFLODMASK	0x0e</div><div class='add'>+#define VSC73XX_MFLODMASK	0x0f</div><div class='add'>+#define VSC73XX_RECVMASK	0x10</div><div class='add'>+#define VSC73XX_AGGRCTRL	0x20</div><div class='add'>+#define VSC73XX_AGGRMSKS	0x30 /* Until 0x3f */</div><div class='add'>+#define VSC73XX_DSTMASKS	0x40 /* Until 0x7f */</div><div class='add'>+#define VSC73XX_SRCMASKS	0x80 /* Until 0x87 */</div><div class='add'>+#define VSC73XX_CAPENAB		0xa0</div><div class='add'>+#define VSC73XX_MACACCESS	0xb0</div><div class='add'>+#define VSC73XX_IPMCACCESS	0xb1</div><div class='add'>+#define VSC73XX_MACTINDX	0xc0</div><div class='add'>+#define VSC73XX_VLANACCESS	0xd0</div><div class='add'>+#define VSC73XX_VLANTIDX	0xe0</div><div class='add'>+#define VSC73XX_AGENCTRL	0xf0</div><div class='add'>+#define VSC73XX_CAPRST		0xff</div><div class='add'>+</div><div class='add'>+#define VSC73XX_SRCMASKS_CPU_COPY		BIT(27)</div><div class='add'>+#define VSC73XX_SRCMASKS_MIRROR			BIT(26)</div><div class='add'>+#define VSC73XX_SRCMASKS_PORTS_MASK		GENMASK(7, 0)</div><div class='add'>+</div><div class='add'>+#define VSC73XX_MACHDATA_VID			GENMASK(27, 16)</div><div class='add'>+#define VSC73XX_MACHDATA_MAC0			GENMASK(15, 8)</div><div class='add'>+#define VSC73XX_MACHDATA_MAC1			GENMASK(7, 0)</div><div class='add'>+#define VSC73XX_MACLDATA_MAC2			GENMASK(31, 24)</div><div class='add'>+#define VSC73XX_MACLDATA_MAC3			GENMASK(23, 16)</div><div class='add'>+#define VSC73XX_MACLDATA_MAC4			GENMASK(15, 8)</div><div class='add'>+#define VSC73XX_MACLDATA_MAC5			GENMASK(7, 0)</div><div class='add'>+</div><div class='add'>+#define VSC73XX_HASH0_VID_FROM_MASK		GENMASK(5, 0)</div><div class='add'>+#define VSC73XX_HASH0_MAC0_FROM_MASK		GENMASK(7, 4)</div><div class='add'>+#define VSC73XX_HASH1_MAC0_FROM_MASK		GENMASK(3, 0)</div><div class='add'>+#define VSC73XX_HASH1_MAC1_FROM_MASK		GENMASK(7, 1)</div><div class='add'>+#define VSC73XX_HASH2_MAC1_FROM_MASK		BIT(0)</div><div class='add'>+#define VSC73XX_HASH2_MAC2_FROM_MASK		GENMASK(7, 0)</div><div class='add'>+#define VSC73XX_HASH2_MAC3_FROM_MASK		GENMASK(7, 6)</div><div class='add'>+#define VSC73XX_HASH3_MAC3_FROM_MASK		GENMASK(5, 0)</div><div class='add'>+#define VSC73XX_HASH3_MAC4_FROM_MASK		GENMASK(7, 3)</div><div class='add'>+#define VSC73XX_HASH4_MAC4_FROM_MASK		GENMASK(2, 0)</div><div class='add'>+</div><div class='add'>+#define VSC73XX_HASH0_VID_TO_MASK		GENMASK(9, 4)</div><div class='add'>+#define VSC73XX_HASH0_MAC0_TO_MASK		GENMASK(3, 0)</div><div class='add'>+#define VSC73XX_HASH1_MAC0_TO_MASK		GENMASK(10, 7)</div><div class='add'>+#define VSC73XX_HASH1_MAC1_TO_MASK		GENMASK(6, 0)</div><div class='add'>+#define VSC73XX_HASH2_MAC1_TO_MASK		BIT(10)</div><div class='add'>+#define VSC73XX_HASH2_MAC2_TO_MASK		GENMASK(9, 2)</div><div class='add'>+#define VSC73XX_HASH2_MAC3_TO_MASK		GENMASK(1, 0)</div><div class='add'>+#define VSC73XX_HASH3_MAC3_TO_MASK		GENMASK(10, 5)</div><div class='add'>+#define VSC73XX_HASH3_MAC4_TO_MASK		GENMASK(4, 0)</div><div class='add'>+#define VSC73XX_HASH4_MAC4_TO_MASK		GENMASK(10, 8)</div><div class='add'>+</div><div class='add'>+#define VSC73XX_MACTINDX_SHADOW			BIT(13)</div><div class='add'>+#define VSC73XX_MACTINDX_BUCKET_MSK		GENMASK(12, 11)</div><div class='add'>+#define VSC73XX_MACTINDX_INDEX_MSK		GENMASK(10, 0)</div><div class='add'>+</div><div class='add'>+#define VSC73XX_MACACCESS_CPU_COPY		BIT(14)</div><div class='add'>+#define VSC73XX_MACACCESS_FWD_KILL		BIT(13)</div><div class='add'>+#define VSC73XX_MACACCESS_IGNORE_VLAN		BIT(12)</div><div class='add'>+#define VSC73XX_MACACCESS_AGED_FLAG		BIT(11)</div><div class='add'>+#define VSC73XX_MACACCESS_VALID			BIT(10)</div><div class='add'>+#define VSC73XX_MACACCESS_LOCKED		BIT(9)</div><div class='add'>+#define VSC73XX_MACACCESS_DEST_IDX_MASK		GENMASK(8, 3)</div><div class='add'>+#define VSC73XX_MACACCESS_CMD_MASK		GENMASK(2, 0)</div><div class='add'>+#define VSC73XX_MACACCESS_CMD_IDLE		0</div><div class='add'>+#define VSC73XX_MACACCESS_CMD_LEARN		1</div><div class='add'>+#define VSC73XX_MACACCESS_CMD_FORGET		2</div><div class='add'>+#define VSC73XX_MACACCESS_CMD_AGE_TABLE		3</div><div class='add'>+#define VSC73XX_MACACCESS_CMD_FLUSH_TABLE	4</div><div class='add'>+#define VSC73XX_MACACCESS_CMD_CLEAR_TABLE	5</div><div class='add'>+#define VSC73XX_MACACCESS_CMD_READ_ENTRY	6</div><div class='add'>+#define VSC73XX_MACACCESS_CMD_WRITE_ENTRY	7</div><div class='add'>+</div><div class='add'>+#define VSC73XX_VLANACCESS_LEARN_DISABLED	BIT(30)</div><div class='add'>+#define VSC73XX_VLANACCESS_VLAN_MIRROR		BIT(29)</div><div class='add'>+#define VSC73XX_VLANACCESS_VLAN_SRC_CHECK	BIT(28)</div><div class='add'>+#define VSC73XX_VLANACCESS_VLAN_PORT_MASK	GENMASK(9, 2)</div><div class='add'>+#define VSC73XX_VLANACCESS_VLAN_PORT_MASK_SHIFT	2</div><div class='add'>+#define VSC73XX_VLANACCESS_VLAN_TBL_CMD_MASK	GENMASK(1, 0)</div><div class='add'>+#define VSC73XX_VLANACCESS_VLAN_TBL_CMD_IDLE	0</div><div class='add'>+#define VSC73XX_VLANACCESS_VLAN_TBL_CMD_READ_ENTRY	1</div><div class='add'>+#define VSC73XX_VLANACCESS_VLAN_TBL_CMD_WRITE_ENTRY	2</div><div class='add'>+#define VSC73XX_VLANACCESS_VLAN_TBL_CMD_CLEAR_TABLE	3</div><div class='add'>+</div><div class='add'>+/* MII block 3 registers */</div><div class='add'>+#define VSC73XX_MII_STAT		0x0</div><div class='add'>+#define VSC73XX_MII_CMD			0x1</div><div class='add'>+#define VSC73XX_MII_DATA		0x2</div><div class='add'>+#define VSC73XX_MII_MPRES		0x3</div><div class='add'>+</div><div class='add'>+#define VSC73XX_MII_STAT_BUSY		BIT(3)</div><div class='add'>+#define VSC73XX_MII_STAT_READ		BIT(2)</div><div class='add'>+#define VSC73XX_MII_STAT_WRITE		BIT(1)</div><div class='add'>+</div><div class='add'>+#define VSC73XX_MII_CMD_SCAN		BIT(27)</div><div class='add'>+#define VSC73XX_MII_CMD_OPERATION	BIT(26)</div><div class='add'>+#define VSC73XX_MII_CMD_PHY_ADDR	GENMASK(25, 21)</div><div class='add'>+#define VSC73XX_MII_CMD_PHY_REG		GENMASK(20, 16)</div><div class='add'>+#define VSC73XX_MII_CMD_WRITE_DATA	GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define VSC73XX_MII_DATA_FAILURE	BIT(16)</div><div class='add'>+#define VSC73XX_MII_DATA_READ_DATA	GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define VSC73XX_MII_MPRES_NOPREAMBLE	BIT(6)</div><div class='add'>+#define VSC73XX_MII_MPRES_PRESCALEVAL	GENMASK(5, 0)</div><div class='add'>+#define VSC73XX_MII_PRESCALEVAL_MIN	3 /* min allowed mdio clock prescaler */</div><div class='add'>+</div><div class='add'>+#define VSC73XX_MII_STAT_BUSY	BIT(3)</div><div class='add'>+</div><div class='add'>+/* Arbiter block 5 registers */</div><div class='add'>+#define VSC73XX_ARBEMPTY		0x0c</div><div class='add'>+#define VSC73XX_ARBDISC			0x0e</div><div class='add'>+#define VSC73XX_SBACKWDROP		0x12</div><div class='add'>+#define VSC73XX_DBACKWDROP		0x13</div><div class='add'>+#define VSC73XX_ARBBURSTPROB		0x15</div><div class='add'>+</div><div class='add'>+/* System block 7 registers */</div><div class='add'>+#define VSC73XX_ICPU_SIPAD		0x01</div><div class='add'>+#define VSC73XX_GMIIDELAY		0x05</div><div class='add'>+#define VSC73XX_ICPU_CTRL		0x10</div><div class='add'>+#define VSC73XX_ICPU_ADDR		0x11</div><div class='add'>+#define VSC73XX_ICPU_SRAM		0x12</div><div class='add'>+#define VSC73XX_HWSEM			0x13</div><div class='add'>+#define VSC73XX_GLORESET		0x14</div><div class='add'>+#define VSC73XX_ICPU_MBOX_VAL		0x15</div><div class='add'>+#define VSC73XX_ICPU_MBOX_SET		0x16</div><div class='add'>+#define VSC73XX_ICPU_MBOX_CLR		0x17</div><div class='add'>+#define VSC73XX_CHIPID			0x18</div><div class='add'>+#define VSC73XX_GPIO			0x34</div><div class='add'>+</div><div class='add'>+#define VSC73XX_GMIIDELAY_GMII0_GTXDELAY_NONE	0</div><div class='add'>+#define VSC73XX_GMIIDELAY_GMII0_GTXDELAY_1_4_NS	1</div><div class='add'>+#define VSC73XX_GMIIDELAY_GMII0_GTXDELAY_1_7_NS	2</div><div class='add'>+#define VSC73XX_GMIIDELAY_GMII0_GTXDELAY_2_0_NS	3</div><div class='add'>+</div><div class='add'>+#define VSC73XX_GMIIDELAY_GMII0_RXDELAY_NONE	(0 &lt;&lt; 4)</div><div class='add'>+#define VSC73XX_GMIIDELAY_GMII0_RXDELAY_1_4_NS	(1 &lt;&lt; 4)</div><div class='add'>+#define VSC73XX_GMIIDELAY_GMII0_RXDELAY_1_7_NS	(2 &lt;&lt; 4)</div><div class='add'>+#define VSC73XX_GMIIDELAY_GMII0_RXDELAY_2_0_NS	(3 &lt;&lt; 4)</div><div class='add'>+</div><div class='add'>+#define VSC73XX_ICPU_CTRL_WATCHDOG_RST	BIT(31)</div><div class='add'>+#define VSC73XX_ICPU_CTRL_CLK_DIV_MASK	GENMASK(12, 8)</div><div class='add'>+#define VSC73XX_ICPU_CTRL_SRST_HOLD	BIT(7)</div><div class='add'>+#define VSC73XX_ICPU_CTRL_ICPU_PI_EN	BIT(6)</div><div class='add'>+#define VSC73XX_ICPU_CTRL_BOOT_EN	BIT(3)</div><div class='add'>+#define VSC73XX_ICPU_CTRL_EXT_ACC_EN	BIT(2)</div><div class='add'>+#define VSC73XX_ICPU_CTRL_CLK_EN	BIT(1)</div><div class='add'>+#define VSC73XX_ICPU_CTRL_SRST		BIT(0)</div><div class='add'>+</div><div class='add'>+#define VSC73XX_CHIPID_ID_SHIFT		12</div><div class='add'>+#define VSC73XX_CHIPID_ID_MASK		0xffff</div><div class='add'>+#define VSC73XX_CHIPID_REV_SHIFT	28</div><div class='add'>+#define VSC73XX_CHIPID_REV_MASK		0xf</div><div class='add'>+#define VSC73XX_CHIPID_ID_7385		0x7385</div><div class='add'>+#define VSC73XX_CHIPID_ID_7388		0x7388</div><div class='add'>+#define VSC73XX_CHIPID_ID_7395		0x7395</div><div class='add'>+#define VSC73XX_CHIPID_ID_7398		0x7398</div><div class='add'>+</div><div class='add'>+#define VSC73XX_GLORESET_STROBE		BIT(4)</div><div class='add'>+#define VSC73XX_GLORESET_ICPU_LOCK	BIT(3)</div><div class='add'>+#define VSC73XX_GLORESET_MEM_LOCK	BIT(2)</div><div class='add'>+#define VSC73XX_GLORESET_PHY_RESET	BIT(1)</div><div class='add'>+#define VSC73XX_GLORESET_MASTER_RESET	BIT(0)</div><div class='add'>+</div><div class='add'>+#define VSC7385_CLOCK_DELAY		((3 &lt;&lt; 4) | 3)</div><div class='add'>+#define VSC7385_CLOCK_DELAY_MASK	((3 &lt;&lt; 4) | 3)</div><div class='add'>+</div><div class='add'>+#define VSC73XX_ICPU_CTRL_STOP	(VSC73XX_ICPU_CTRL_SRST_HOLD | \</div><div class='add'>+				 VSC73XX_ICPU_CTRL_BOOT_EN | \</div><div class='add'>+				 VSC73XX_ICPU_CTRL_EXT_ACC_EN)</div><div class='add'>+</div><div class='add'>+#define VSC73XX_ICPU_CTRL_START	(VSC73XX_ICPU_CTRL_CLK_DIV | \</div><div class='add'>+				 VSC73XX_ICPU_CTRL_BOOT_EN | \</div><div class='add'>+				 VSC73XX_ICPU_CTRL_CLK_EN | \</div><div class='add'>+				 VSC73XX_ICPU_CTRL_SRST)</div><div class='add'>+</div><div class='add'>+#define IS_7385(a) ((a)-&gt;chipid == VSC73XX_CHIPID_ID_7385)</div><div class='add'>+#define IS_7388(a) ((a)-&gt;chipid == VSC73XX_CHIPID_ID_7388)</div><div class='add'>+#define IS_7395(a) ((a)-&gt;chipid == VSC73XX_CHIPID_ID_7395)</div><div class='add'>+#define IS_7398(a) ((a)-&gt;chipid == VSC73XX_CHIPID_ID_7398)</div><div class='add'>+#define IS_739X(a) (IS_7395(a) || IS_7398(a))</div><div class='add'>+</div><div class='add'>+#define VSC73XX_POLL_SLEEP_US		1000</div><div class='add'>+#define VSC73XX_MDIO_POLL_SLEEP_US	5</div><div class='add'>+#define VSC73XX_POLL_TIMEOUT_US		10000</div><div class='add'>+</div><div class='add'>+struct vsc73xx_counter {</div><div class='add'>+	u8 counter;</div><div class='add'>+	const char *name;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct vsc73xx_fdb {</div><div class='add'>+	u16 vid;</div><div class='add'>+	u8 port;</div><div class='add'>+	u8 mac[ETH_ALEN];</div><div class='add'>+	bool valid;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Counters are named according to the MIB standards where applicable.</div><div class='add'>+ * Some counters are custom, non-standard. The standard counters are</div><div class='add'>+ * named in accordance with RFC2819, RFC2021 and IEEE Std 802.3-2002 Annex</div><div class='add'>+ * 30A Counters.</div><div class='add'>+ */</div><div class='add'>+static const struct vsc73xx_counter vsc73xx_rx_counters[] = {</div><div class='add'>+	{ 0, "RxEtherStatsPkts" },</div><div class='add'>+	{ 1, "RxBroadcast+MulticastPkts" }, /* non-standard counter */</div><div class='add'>+	{ 2, "RxTotalErrorPackets" }, /* non-standard counter */</div><div class='add'>+	{ 3, "RxEtherStatsBroadcastPkts" },</div><div class='add'>+	{ 4, "RxEtherStatsMulticastPkts" },</div><div class='add'>+	{ 5, "RxEtherStatsPkts64Octets" },</div><div class='add'>+	{ 6, "RxEtherStatsPkts65to127Octets" },</div><div class='add'>+	{ 7, "RxEtherStatsPkts128to255Octets" },</div><div class='add'>+	{ 8, "RxEtherStatsPkts256to511Octets" },</div><div class='add'>+	{ 9, "RxEtherStatsPkts512to1023Octets" },</div><div class='add'>+	{ 10, "RxEtherStatsPkts1024to1518Octets" },</div><div class='add'>+	{ 11, "RxJumboFrames" }, /* non-standard counter */</div><div class='add'>+	{ 12, "RxaPauseMACControlFramesTransmitted" },</div><div class='add'>+	{ 13, "RxFIFODrops" }, /* non-standard counter */</div><div class='add'>+	{ 14, "RxBackwardDrops" }, /* non-standard counter */</div><div class='add'>+	{ 15, "RxClassifierDrops" }, /* non-standard counter */</div><div class='add'>+	{ 16, "RxEtherStatsCRCAlignErrors" },</div><div class='add'>+	{ 17, "RxEtherStatsUndersizePkts" },</div><div class='add'>+	{ 18, "RxEtherStatsOversizePkts" },</div><div class='add'>+	{ 19, "RxEtherStatsFragments" },</div><div class='add'>+	{ 20, "RxEtherStatsJabbers" },</div><div class='add'>+	{ 21, "RxaMACControlFramesReceived" },</div><div class='add'>+	/* 22-24 are undefined */</div><div class='add'>+	{ 25, "RxaFramesReceivedOK" },</div><div class='add'>+	{ 26, "RxQoSClass0" }, /* non-standard counter */</div><div class='add'>+	{ 27, "RxQoSClass1" }, /* non-standard counter */</div><div class='add'>+	{ 28, "RxQoSClass2" }, /* non-standard counter */</div><div class='add'>+	{ 29, "RxQoSClass3" }, /* non-standard counter */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vsc73xx_counter vsc73xx_tx_counters[] = {</div><div class='add'>+	{ 0, "TxEtherStatsPkts" },</div><div class='add'>+	{ 1, "TxBroadcast+MulticastPkts" }, /* non-standard counter */</div><div class='add'>+	{ 2, "TxTotalErrorPackets" }, /* non-standard counter */</div><div class='add'>+	{ 3, "TxEtherStatsBroadcastPkts" },</div><div class='add'>+	{ 4, "TxEtherStatsMulticastPkts" },</div><div class='add'>+	{ 5, "TxEtherStatsPkts64Octets" },</div><div class='add'>+	{ 6, "TxEtherStatsPkts65to127Octets" },</div><div class='add'>+	{ 7, "TxEtherStatsPkts128to255Octets" },</div><div class='add'>+	{ 8, "TxEtherStatsPkts256to511Octets" },</div><div class='add'>+	{ 9, "TxEtherStatsPkts512to1023Octets" },</div><div class='add'>+	{ 10, "TxEtherStatsPkts1024to1518Octets" },</div><div class='add'>+	{ 11, "TxJumboFrames" }, /* non-standard counter */</div><div class='add'>+	{ 12, "TxaPauseMACControlFramesTransmitted" },</div><div class='add'>+	{ 13, "TxFIFODrops" }, /* non-standard counter */</div><div class='add'>+	{ 14, "TxDrops" }, /* non-standard counter */</div><div class='add'>+	{ 15, "TxEtherStatsCollisions" },</div><div class='add'>+	{ 16, "TxEtherStatsCRCAlignErrors" },</div><div class='add'>+	{ 17, "TxEtherStatsUndersizePkts" },</div><div class='add'>+	{ 18, "TxEtherStatsOversizePkts" },</div><div class='add'>+	{ 19, "TxEtherStatsFragments" },</div><div class='add'>+	{ 20, "TxEtherStatsJabbers" },</div><div class='add'>+	/* 21-24 are undefined */</div><div class='add'>+	{ 25, "TxaFramesReceivedOK" },</div><div class='add'>+	{ 26, "TxQoSClass0" }, /* non-standard counter */</div><div class='add'>+	{ 27, "TxQoSClass1" }, /* non-standard counter */</div><div class='add'>+	{ 28, "TxQoSClass2" }, /* non-standard counter */</div><div class='add'>+	{ 29, "TxQoSClass3" }, /* non-standard counter */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct vsc73xx_vlan_summary {</div><div class='add'>+	size_t num_tagged;</div><div class='add'>+	size_t num_untagged;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum vsc73xx_port_vlan_conf {</div><div class='add'>+	VSC73XX_VLAN_FILTER,</div><div class='add'>+	VSC73XX_VLAN_FILTER_UNTAG_ALL,</div><div class='add'>+	VSC73XX_VLAN_IGNORE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int vsc73xx_is_addr_valid(u8 block, u8 subblock)</div><div class='add'>+{</div><div class='add'>+	switch (block) {</div><div class='add'>+	case VSC73XX_BLOCK_MAC:</div><div class='add'>+		switch (subblock) {</div><div class='add'>+		case 0 ... 4:</div><div class='add'>+		case 6:</div><div class='add'>+			return 1;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case VSC73XX_BLOCK_ANALYZER:</div><div class='add'>+	case VSC73XX_BLOCK_SYSTEM:</div><div class='add'>+		switch (subblock) {</div><div class='add'>+		case 0:</div><div class='add'>+			return 1;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case VSC73XX_BLOCK_MII:</div><div class='add'>+	case VSC73XX_BLOCK_ARBITER:</div><div class='add'>+		switch (subblock) {</div><div class='add'>+		case 0 ... 1:</div><div class='add'>+			return 1;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case VSC73XX_BLOCK_CAPTURE:</div><div class='add'>+		switch (subblock) {</div><div class='add'>+		case 0 ... 4:</div><div class='add'>+		case 6 ... 7:</div><div class='add'>+			return 1;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(vsc73xx_is_addr_valid);</div><div class='add'>+</div><div class='add'>+static int vsc73xx_read(struct vsc73xx *vsc, u8 block, u8 subblock, u8 reg,</div><div class='add'>+			u32 *val)</div><div class='add'>+{</div><div class='add'>+	return vsc-&gt;ops-&gt;read(vsc, block, subblock, reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc73xx_write(struct vsc73xx *vsc, u8 block, u8 subblock, u8 reg,</div><div class='add'>+			 u32 val)</div><div class='add'>+{</div><div class='add'>+	return vsc-&gt;ops-&gt;write(vsc, block, subblock, reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc73xx_update_bits(struct vsc73xx *vsc, u8 block, u8 subblock,</div><div class='add'>+			       u8 reg, u32 mask, u32 val)</div><div class='add'>+{</div><div class='add'>+	u32 tmp, orig;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Same read-modify-write algorithm as e.g. regmap */</div><div class='add'>+	ret = vsc73xx_read(vsc, block, subblock, reg, &amp;orig);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+	tmp = orig &amp; ~mask;</div><div class='add'>+	tmp |= val &amp; mask;</div><div class='add'>+	return vsc73xx_write(vsc, block, subblock, reg, tmp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc73xx_detect(struct vsc73xx *vsc)</div><div class='add'>+{</div><div class='add'>+	bool icpu_si_boot_en;</div><div class='add'>+	bool icpu_pi_en;</div><div class='add'>+	u32 val;</div><div class='add'>+	u32 rev;</div><div class='add'>+	int ret;</div><div class='add'>+	u32 id;</div><div class='add'>+</div><div class='add'>+	ret = vsc73xx_read(vsc, VSC73XX_BLOCK_SYSTEM, 0,</div><div class='add'>+			   VSC73XX_ICPU_MBOX_VAL, &amp;val);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(vsc-&gt;dev, "unable to read mailbox (%d)\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (val == 0xffffffff) {</div><div class='add'>+		dev_info(vsc-&gt;dev, "chip seems dead.\n");</div><div class='add'>+		return -EAGAIN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = vsc73xx_read(vsc, VSC73XX_BLOCK_SYSTEM, 0,</div><div class='add'>+			   VSC73XX_CHIPID, &amp;val);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(vsc-&gt;dev, "unable to read chip id (%d)\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	id = (val &gt;&gt; VSC73XX_CHIPID_ID_SHIFT) &amp;</div><div class='add'>+		VSC73XX_CHIPID_ID_MASK;</div><div class='add'>+	switch (id) {</div><div class='add'>+	case VSC73XX_CHIPID_ID_7385:</div><div class='add'>+	case VSC73XX_CHIPID_ID_7388:</div><div class='add'>+	case VSC73XX_CHIPID_ID_7395:</div><div class='add'>+	case VSC73XX_CHIPID_ID_7398:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(vsc-&gt;dev, "unsupported chip, id=%04x\n", id);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vsc-&gt;chipid = id;</div><div class='add'>+	rev = (val &gt;&gt; VSC73XX_CHIPID_REV_SHIFT) &amp;</div><div class='add'>+		VSC73XX_CHIPID_REV_MASK;</div><div class='add'>+	dev_info(vsc-&gt;dev, "VSC%04X (rev: %d) switch found\n", id, rev);</div><div class='add'>+</div><div class='add'>+	ret = vsc73xx_read(vsc, VSC73XX_BLOCK_SYSTEM, 0,</div><div class='add'>+			   VSC73XX_ICPU_CTRL, &amp;val);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(vsc-&gt;dev, "unable to read iCPU control\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* The iCPU can always be used but can boot in different ways.</div><div class='add'>+	 * If it is initially disabled and has no external memory,</div><div class='add'>+	 * we are in control and can do whatever we like, else we</div><div class='add'>+	 * are probably in trouble (we need some way to communicate</div><div class='add'>+	 * with the running firmware) so we bail out for now.</div><div class='add'>+	 */</div><div class='add'>+	icpu_pi_en = !!(val &amp; VSC73XX_ICPU_CTRL_ICPU_PI_EN);</div><div class='add'>+	icpu_si_boot_en = !!(val &amp; VSC73XX_ICPU_CTRL_BOOT_EN);</div><div class='add'>+	if (icpu_si_boot_en &amp;&amp; icpu_pi_en) {</div><div class='add'>+		dev_err(vsc-&gt;dev,</div><div class='add'>+			"iCPU enabled boots from SI, has external memory\n");</div><div class='add'>+		dev_err(vsc-&gt;dev, "no idea how to deal with this\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+	if (icpu_si_boot_en &amp;&amp; !icpu_pi_en) {</div><div class='add'>+		dev_err(vsc-&gt;dev,</div><div class='add'>+			"iCPU enabled boots from PI/SI, no external memory\n");</div><div class='add'>+		return -EAGAIN;</div><div class='add'>+	}</div><div class='add'>+	if (!icpu_si_boot_en &amp;&amp; icpu_pi_en) {</div><div class='add'>+		dev_err(vsc-&gt;dev,</div><div class='add'>+			"iCPU enabled, boots from PI external memory\n");</div><div class='add'>+		dev_err(vsc-&gt;dev, "no idea how to deal with this\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+	/* !icpu_si_boot_en &amp;&amp; !cpu_pi_en */</div><div class='add'>+	dev_info(vsc-&gt;dev, "iCPU disabled, no external memory\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc73xx_mdio_busy_check(struct vsc73xx *vsc)</div><div class='add'>+{</div><div class='add'>+	int ret, err;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	ret = read_poll_timeout(vsc73xx_read, err,</div><div class='add'>+				err &lt; 0 || !(val &amp; VSC73XX_MII_STAT_BUSY),</div><div class='add'>+				VSC73XX_MDIO_POLL_SLEEP_US,</div><div class='add'>+				VSC73XX_POLL_TIMEOUT_US, false, vsc,</div><div class='add'>+				VSC73XX_BLOCK_MII, VSC73XX_BLOCK_MII_INTERNAL,</div><div class='add'>+				VSC73XX_MII_STAT, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc73xx_phy_read(struct dsa_switch *ds, int phy, int regnum)</div><div class='add'>+{</div><div class='add'>+	struct vsc73xx *vsc = ds-&gt;priv;</div><div class='add'>+	u32 cmd;</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = vsc73xx_mdio_busy_check(vsc);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Setting bit 26 means "read" */</div><div class='add'>+	cmd = VSC73XX_MII_CMD_OPERATION |</div><div class='add'>+	      FIELD_PREP(VSC73XX_MII_CMD_PHY_ADDR, phy) |</div><div class='add'>+	      FIELD_PREP(VSC73XX_MII_CMD_PHY_REG, regnum);</div><div class='add'>+	ret = vsc73xx_write(vsc, VSC73XX_BLOCK_MII, VSC73XX_BLOCK_MII_INTERNAL,</div><div class='add'>+			    VSC73XX_MII_CMD, cmd);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = vsc73xx_mdio_busy_check(vsc);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = vsc73xx_read(vsc, VSC73XX_BLOCK_MII, VSC73XX_BLOCK_MII_INTERNAL,</div><div class='add'>+			   VSC73XX_MII_DATA, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+	if (val &amp; VSC73XX_MII_DATA_FAILURE) {</div><div class='add'>+		dev_err(vsc-&gt;dev, "reading reg %02x from phy%d failed\n",</div><div class='add'>+			regnum, phy);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+	val &amp;= VSC73XX_MII_DATA_READ_DATA;</div><div class='add'>+</div><div class='add'>+	dev_dbg(vsc-&gt;dev, "read reg %02x from phy%d = %04x\n",</div><div class='add'>+		regnum, phy, val);</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc73xx_phy_write(struct dsa_switch *ds, int phy, int regnum,</div><div class='add'>+			     u16 val)</div><div class='add'>+{</div><div class='add'>+	struct vsc73xx *vsc = ds-&gt;priv;</div><div class='add'>+	u32 cmd;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = vsc73xx_mdio_busy_check(vsc);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	cmd = FIELD_PREP(VSC73XX_MII_CMD_PHY_ADDR, phy) |</div><div class='add'>+	      FIELD_PREP(VSC73XX_MII_CMD_PHY_REG, regnum) |</div><div class='add'>+	      FIELD_PREP(VSC73XX_MII_CMD_WRITE_DATA, val);</div><div class='add'>+	ret = vsc73xx_write(vsc, VSC73XX_BLOCK_MII, VSC73XX_BLOCK_MII_INTERNAL,</div><div class='add'>+			    VSC73XX_MII_CMD, cmd);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	dev_dbg(vsc-&gt;dev, "write %04x to reg %02x in phy%d\n",</div><div class='add'>+		val, regnum, phy);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum dsa_tag_protocol vsc73xx_get_tag_protocol(struct dsa_switch *ds,</div><div class='add'>+						      int port,</div><div class='add'>+						      enum dsa_tag_protocol mp)</div><div class='add'>+{</div><div class='add'>+	/* The switch internally uses a 8 byte header with length,</div><div class='add'>+	 * source port, tag, LPA and priority. This is supposedly</div><div class='add'>+	 * only accessible when operating the switch using the internal</div><div class='add'>+	 * CPU or with an external CPU mapping the device in, but not</div><div class='add'>+	 * when operating the switch over SPI and putting frames in/out</div><div class='add'>+	 * on port 6 (the CPU port). So far we must assume that we</div><div class='add'>+	 * cannot access the tag. (See "Internal frame header" section</div><div class='add'>+	 * 3.9.1 in the manual.)</div><div class='add'>+	 */</div><div class='add'>+	return DSA_TAG_PROTO_VSC73XX_8021Q;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc73xx_wait_for_vlan_table_cmd(struct vsc73xx *vsc)</div><div class='add'>+{</div><div class='add'>+	int ret, err;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	ret = read_poll_timeout(vsc73xx_read, err,</div><div class='add'>+				err &lt; 0 ||</div><div class='add'>+				((val &amp; VSC73XX_VLANACCESS_VLAN_TBL_CMD_MASK) ==</div><div class='add'>+				VSC73XX_VLANACCESS_VLAN_TBL_CMD_IDLE),</div><div class='add'>+				VSC73XX_POLL_SLEEP_US, VSC73XX_POLL_TIMEOUT_US,</div><div class='add'>+				false, vsc, VSC73XX_BLOCK_ANALYZER,</div><div class='add'>+				0, VSC73XX_VLANACCESS, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+vsc73xx_read_vlan_table_entry(struct vsc73xx *vsc, u16 vid, u8 *portmap)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	vsc73xx_write(vsc, VSC73XX_BLOCK_ANALYZER, 0, VSC73XX_VLANTIDX, vid);</div><div class='add'>+</div><div class='add'>+	ret = vsc73xx_wait_for_vlan_table_cmd(vsc);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	vsc73xx_update_bits(vsc, VSC73XX_BLOCK_ANALYZER, 0, VSC73XX_VLANACCESS,</div><div class='add'>+			    VSC73XX_VLANACCESS_VLAN_TBL_CMD_MASK,</div><div class='add'>+			    VSC73XX_VLANACCESS_VLAN_TBL_CMD_READ_ENTRY);</div><div class='add'>+</div><div class='add'>+	ret = vsc73xx_wait_for_vlan_table_cmd(vsc);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	vsc73xx_read(vsc, VSC73XX_BLOCK_ANALYZER, 0, VSC73XX_VLANACCESS, &amp;val);</div><div class='add'>+	*portmap = (val &amp; VSC73XX_VLANACCESS_VLAN_PORT_MASK) &gt;&gt;</div><div class='add'>+		   VSC73XX_VLANACCESS_VLAN_PORT_MASK_SHIFT;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+vsc73xx_write_vlan_table_entry(struct vsc73xx *vsc, u16 vid, u8 portmap)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	vsc73xx_write(vsc, VSC73XX_BLOCK_ANALYZER, 0, VSC73XX_VLANTIDX, vid);</div><div class='add'>+</div><div class='add'>+	ret = vsc73xx_wait_for_vlan_table_cmd(vsc);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	vsc73xx_update_bits(vsc, VSC73XX_BLOCK_ANALYZER, 0, VSC73XX_VLANACCESS,</div><div class='add'>+			    VSC73XX_VLANACCESS_VLAN_TBL_CMD_MASK |</div><div class='add'>+			    VSC73XX_VLANACCESS_VLAN_SRC_CHECK |</div><div class='add'>+			    VSC73XX_VLANACCESS_VLAN_PORT_MASK,</div><div class='add'>+			    VSC73XX_VLANACCESS_VLAN_TBL_CMD_WRITE_ENTRY |</div><div class='add'>+			    VSC73XX_VLANACCESS_VLAN_SRC_CHECK |</div><div class='add'>+			    (portmap &lt;&lt; VSC73XX_VLANACCESS_VLAN_PORT_MASK_SHIFT));</div><div class='add'>+</div><div class='add'>+	return vsc73xx_wait_for_vlan_table_cmd(vsc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+vsc73xx_update_vlan_table(struct vsc73xx *vsc, int port, u16 vid, bool set)</div><div class='add'>+{</div><div class='add'>+	u8 portmap;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = vsc73xx_read_vlan_table_entry(vsc, vid, &amp;portmap);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (set)</div><div class='add'>+		portmap |= BIT(port);</div><div class='add'>+	else</div><div class='add'>+		portmap &amp;= ~BIT(port);</div><div class='add'>+</div><div class='add'>+	return vsc73xx_write_vlan_table_entry(vsc, vid, portmap);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc73xx_configure_rgmii_port_delay(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	/* Keep 2.0 ns delay for backward complatibility */</div><div class='add'>+	u32 tx_delay = VSC73XX_GMIIDELAY_GMII0_GTXDELAY_2_0_NS;</div><div class='add'>+	u32 rx_delay = VSC73XX_GMIIDELAY_GMII0_RXDELAY_2_0_NS;</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(ds, CPU_PORT);</div><div class='add'>+	struct device_node *port_dn = dp-&gt;dn;</div><div class='add'>+	struct vsc73xx *vsc = ds-&gt;priv;</div><div class='add'>+	u32 delay;</div><div class='add'>+</div><div class='add'>+	if (!of_property_read_u32(port_dn, "tx-internal-delay-ps", &amp;delay)) {</div><div class='add'>+		switch (delay) {</div><div class='add'>+		case 0:</div><div class='add'>+			tx_delay = VSC73XX_GMIIDELAY_GMII0_GTXDELAY_NONE;</div><div class='add'>+			break;</div><div class='add'>+		case 1400:</div><div class='add'>+			tx_delay = VSC73XX_GMIIDELAY_GMII0_GTXDELAY_1_4_NS;</div><div class='add'>+			break;</div><div class='add'>+		case 1700:</div><div class='add'>+			tx_delay = VSC73XX_GMIIDELAY_GMII0_GTXDELAY_1_7_NS;</div><div class='add'>+			break;</div><div class='add'>+		case 2000:</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			dev_err(vsc-&gt;dev,</div><div class='add'>+				"Unsupported RGMII Transmit Clock Delay\n");</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		dev_dbg(vsc-&gt;dev,</div><div class='add'>+			"RGMII Transmit Clock Delay isn't configured, set to 2.0 ns\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!of_property_read_u32(port_dn, "rx-internal-delay-ps", &amp;delay)) {</div><div class='add'>+		switch (delay) {</div><div class='add'>+		case 0:</div><div class='add'>+			rx_delay = VSC73XX_GMIIDELAY_GMII0_RXDELAY_NONE;</div><div class='add'>+			break;</div><div class='add'>+		case 1400:</div><div class='add'>+			rx_delay = VSC73XX_GMIIDELAY_GMII0_RXDELAY_1_4_NS;</div><div class='add'>+			break;</div><div class='add'>+		case 1700:</div><div class='add'>+			rx_delay = VSC73XX_GMIIDELAY_GMII0_RXDELAY_1_7_NS;</div><div class='add'>+			break;</div><div class='add'>+		case 2000:</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			dev_err(vsc-&gt;dev,</div><div class='add'>+				"Unsupported RGMII Receive Clock Delay value\n");</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		dev_dbg(vsc-&gt;dev,</div><div class='add'>+			"RGMII Receive Clock Delay isn't configured, set to 2.0 ns\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* MII delay, set both GTX and RX delay */</div><div class='add'>+	return vsc73xx_write(vsc, VSC73XX_BLOCK_SYSTEM, 0, VSC73XX_GMIIDELAY,</div><div class='add'>+			     tx_delay | rx_delay);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc73xx_setup(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct vsc73xx *vsc = ds-&gt;priv;</div><div class='add'>+	int i, ret, val;</div><div class='add'>+</div><div class='add'>+	dev_info(vsc-&gt;dev, "set up the switch\n");</div><div class='add'>+</div><div class='add'>+	ds-&gt;max_num_bridges = DSA_TAG_8021Q_MAX_NUM_BRIDGES;</div><div class='add'>+	ds-&gt;fdb_isolation = true;</div><div class='add'>+</div><div class='add'>+	/* Issue RESET */</div><div class='add'>+	vsc73xx_write(vsc, VSC73XX_BLOCK_SYSTEM, 0, VSC73XX_GLORESET,</div><div class='add'>+		      VSC73XX_GLORESET_MASTER_RESET);</div><div class='add'>+	usleep_range(125, 200);</div><div class='add'>+</div><div class='add'>+	/* Initialize memory, initialize RAM bank 0..15 except 6 and 7</div><div class='add'>+	 * This sequence appears in the</div><div class='add'>+	 * VSC7385 SparX-G5 datasheet section 6.6.1</div><div class='add'>+	 * VSC7395 SparX-G5e datasheet section 6.6.1</div><div class='add'>+	 * "initialization sequence".</div><div class='add'>+	 * No explanation is given to the 0x1010400 magic number.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt;= 15; i++) {</div><div class='add'>+		if (i != 6 &amp;&amp; i != 7) {</div><div class='add'>+			vsc73xx_write(vsc, VSC73XX_BLOCK_MEMINIT,</div><div class='add'>+				      2,</div><div class='add'>+				      0, 0x1010400 + i);</div><div class='add'>+			mdelay(1);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	mdelay(30);</div><div class='add'>+</div><div class='add'>+	/* Clear MAC table */</div><div class='add'>+	vsc73xx_write(vsc, VSC73XX_BLOCK_ANALYZER, 0,</div><div class='add'>+		      VSC73XX_MACACCESS,</div><div class='add'>+		      VSC73XX_MACACCESS_CMD_CLEAR_TABLE);</div><div class='add'>+</div><div class='add'>+	/* Set VLAN table to default values */</div><div class='add'>+	vsc73xx_write(vsc, VSC73XX_BLOCK_ANALYZER, 0,</div><div class='add'>+		      VSC73XX_VLANACCESS,</div><div class='add'>+		      VSC73XX_VLANACCESS_VLAN_TBL_CMD_CLEAR_TABLE);</div><div class='add'>+</div><div class='add'>+	msleep(40);</div><div class='add'>+</div><div class='add'>+	/* Use 20KiB buffers on all ports on VSC7395</div><div class='add'>+	 * The VSC7385 has 16KiB buffers and that is the</div><div class='add'>+	 * default if we don't set this up explicitly.</div><div class='add'>+	 * Port "31" is "all ports".</div><div class='add'>+	 */</div><div class='add'>+	if (IS_739X(vsc))</div><div class='add'>+		vsc73xx_write(vsc, VSC73XX_BLOCK_MAC, 0x1f,</div><div class='add'>+			      VSC73XX_Q_MISC_CONF,</div><div class='add'>+			      VSC73XX_Q_MISC_CONF_EXTENT_MEM);</div><div class='add'>+</div><div class='add'>+	/* Put all ports into reset until enabled */</div><div class='add'>+	for (i = 0; i &lt; 7; i++) {</div><div class='add'>+		if (i == 5)</div><div class='add'>+			continue;</div><div class='add'>+		vsc73xx_write(vsc, VSC73XX_BLOCK_MAC, 4,</div><div class='add'>+			      VSC73XX_MAC_CFG, VSC73XX_MAC_CFG_RESET);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Configure RGMII delay */</div><div class='add'>+	ret = vsc73xx_configure_rgmii_port_delay(ds);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Ingess VLAN reception mask (table 145) */</div><div class='add'>+	vsc73xx_write(vsc, VSC73XX_BLOCK_ANALYZER, 0, VSC73XX_VLANMASK,</div><div class='add'>+		      0xff);</div><div class='add'>+	/* IP multicast flood mask (table 144) */</div><div class='add'>+	vsc73xx_write(vsc, VSC73XX_BLOCK_ANALYZER, 0, VSC73XX_IFLODMSK,</div><div class='add'>+		      0xff);</div><div class='add'>+</div><div class='add'>+	mdelay(50);</div><div class='add'>+</div><div class='add'>+	/* Disable preamble and use maximum allowed clock for the internal</div><div class='add'>+	 * mdio bus, used for communication with internal PHYs only.</div><div class='add'>+	 */</div><div class='add'>+	val = VSC73XX_MII_MPRES_NOPREAMBLE |</div><div class='add'>+	      FIELD_PREP(VSC73XX_MII_MPRES_PRESCALEVAL,</div><div class='add'>+			 VSC73XX_MII_PRESCALEVAL_MIN);</div><div class='add'>+	vsc73xx_write(vsc, VSC73XX_BLOCK_MII, VSC73XX_BLOCK_MII_INTERNAL,</div><div class='add'>+		      VSC73XX_MII_MPRES, val);</div><div class='add'>+</div><div class='add'>+	/* Release reset from the internal PHYs */</div><div class='add'>+	vsc73xx_write(vsc, VSC73XX_BLOCK_SYSTEM, 0, VSC73XX_GLORESET,</div><div class='add'>+		      VSC73XX_GLORESET_PHY_RESET);</div><div class='add'>+</div><div class='add'>+	udelay(4);</div><div class='add'>+</div><div class='add'>+	/* Clear VLAN table */</div><div class='add'>+	for (i = 0; i &lt; VLAN_N_VID; i++)</div><div class='add'>+		vsc73xx_write_vlan_table_entry(vsc, i, 0);</div><div class='add'>+</div><div class='add'>+	INIT_LIST_HEAD(&amp;vsc-&gt;vlans);</div><div class='add'>+</div><div class='add'>+	rtnl_lock();</div><div class='add'>+	ret = dsa_tag_8021q_register(ds, htons(ETH_P_8021Q));</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vsc73xx_teardown(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	rtnl_lock();</div><div class='add'>+	dsa_tag_8021q_unregister(ds);</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vsc73xx_init_port(struct vsc73xx *vsc, int port)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	/* MAC configure, first reset the port and then write defaults */</div><div class='add'>+	vsc73xx_write(vsc, VSC73XX_BLOCK_MAC,</div><div class='add'>+		      port,</div><div class='add'>+		      VSC73XX_MAC_CFG,</div><div class='add'>+		      VSC73XX_MAC_CFG_RESET);</div><div class='add'>+</div><div class='add'>+	/* Take up the port in 1Gbit mode by default, this will be</div><div class='add'>+	 * augmented after auto-negotiation on the PHY-facing</div><div class='add'>+	 * ports.</div><div class='add'>+	 */</div><div class='add'>+	if (port == CPU_PORT)</div><div class='add'>+		val = VSC73XX_MAC_CFG_1000M_F_RGMII;</div><div class='add'>+	else</div><div class='add'>+		val = VSC73XX_MAC_CFG_1000M_F_PHY;</div><div class='add'>+</div><div class='add'>+	vsc73xx_write(vsc, VSC73XX_BLOCK_MAC,</div><div class='add'>+		      port,</div><div class='add'>+		      VSC73XX_MAC_CFG,</div><div class='add'>+		      val |</div><div class='add'>+		      VSC73XX_MAC_CFG_TX_EN |</div><div class='add'>+		      VSC73XX_MAC_CFG_RX_EN);</div><div class='add'>+</div><div class='add'>+	/* Flow control for the CPU port:</div><div class='add'>+	 * Use a zero delay pause frame when pause condition is left</div><div class='add'>+	 * Obey pause control frames</div><div class='add'>+	 */</div><div class='add'>+	vsc73xx_write(vsc, VSC73XX_BLOCK_MAC,</div><div class='add'>+		      port,</div><div class='add'>+		      VSC73XX_FCCONF,</div><div class='add'>+		      VSC73XX_FCCONF_ZERO_PAUSE_EN |</div><div class='add'>+		      VSC73XX_FCCONF_FLOW_CTRL_OBEY);</div><div class='add'>+</div><div class='add'>+	/* Issue pause control frames on PHY facing ports.</div><div class='add'>+	 * Allow early initiation of MAC transmission if the amount</div><div class='add'>+	 * of egress data is below 512 bytes on CPU port.</div><div class='add'>+	 * FIXME: enable 20KiB buffers?</div><div class='add'>+	 */</div><div class='add'>+	if (port == CPU_PORT)</div><div class='add'>+		val = VSC73XX_Q_MISC_CONF_EARLY_TX_512;</div><div class='add'>+	else</div><div class='add'>+		val = VSC73XX_Q_MISC_CONF_MAC_PAUSE_MODE;</div><div class='add'>+	val |= VSC73XX_Q_MISC_CONF_EXTENT_MEM;</div><div class='add'>+	vsc73xx_write(vsc, VSC73XX_BLOCK_MAC,</div><div class='add'>+		      port,</div><div class='add'>+		      VSC73XX_Q_MISC_CONF,</div><div class='add'>+		      val);</div><div class='add'>+</div><div class='add'>+	/* Flow control MAC: a MAC address used in flow control frames */</div><div class='add'>+	val = (vsc-&gt;addr[5] &lt;&lt; 16) | (vsc-&gt;addr[4] &lt;&lt; 8) | (vsc-&gt;addr[3]);</div><div class='add'>+	vsc73xx_write(vsc, VSC73XX_BLOCK_MAC,</div><div class='add'>+		      port,</div><div class='add'>+		      VSC73XX_FCMACHI,</div><div class='add'>+		      val);</div><div class='add'>+	val = (vsc-&gt;addr[2] &lt;&lt; 16) | (vsc-&gt;addr[1] &lt;&lt; 8) | (vsc-&gt;addr[0]);</div><div class='add'>+	vsc73xx_write(vsc, VSC73XX_BLOCK_MAC,</div><div class='add'>+		      port,</div><div class='add'>+		      VSC73XX_FCMACLO,</div><div class='add'>+		      val);</div><div class='add'>+</div><div class='add'>+	/* Tell the categorizer to forward pause frames, not control</div><div class='add'>+	 * frame. Do not drop anything.</div><div class='add'>+	 */</div><div class='add'>+	vsc73xx_write(vsc, VSC73XX_BLOCK_MAC,</div><div class='add'>+		      port,</div><div class='add'>+		      VSC73XX_CAT_DROP,</div><div class='add'>+		      VSC73XX_CAT_DROP_FWD_PAUSE_ENA);</div><div class='add'>+</div><div class='add'>+	/* Clear all counters */</div><div class='add'>+	vsc73xx_write(vsc, VSC73XX_BLOCK_MAC,</div><div class='add'>+		      port, VSC73XX_C_RX0, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vsc73xx_reset_port(struct vsc73xx *vsc, int port, u32 initval)</div><div class='add'>+{</div><div class='add'>+	int ret, err;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	/* Disable RX on this port */</div><div class='add'>+	vsc73xx_update_bits(vsc, VSC73XX_BLOCK_MAC, port,</div><div class='add'>+			    VSC73XX_MAC_CFG,</div><div class='add'>+			    VSC73XX_MAC_CFG_RX_EN, 0);</div><div class='add'>+</div><div class='add'>+	/* Discard packets */</div><div class='add'>+	vsc73xx_update_bits(vsc, VSC73XX_BLOCK_ARBITER, 0,</div><div class='add'>+			    VSC73XX_ARBDISC, BIT(port), BIT(port));</div><div class='add'>+</div><div class='add'>+	/* Wait until queue is empty */</div><div class='add'>+	ret = read_poll_timeout(vsc73xx_read, err,</div><div class='add'>+				err &lt; 0 || (val &amp; BIT(port)),</div><div class='add'>+				VSC73XX_POLL_SLEEP_US,</div><div class='add'>+				VSC73XX_POLL_TIMEOUT_US, false,</div><div class='add'>+				vsc, VSC73XX_BLOCK_ARBITER, 0,</div><div class='add'>+				VSC73XX_ARBEMPTY, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(vsc-&gt;dev,</div><div class='add'>+			"timeout waiting for block arbiter\n");</div><div class='add'>+	else if (err &lt; 0)</div><div class='add'>+		dev_err(vsc-&gt;dev, "error reading arbiter\n");</div><div class='add'>+</div><div class='add'>+	/* Put this port into reset */</div><div class='add'>+	vsc73xx_write(vsc, VSC73XX_BLOCK_MAC, port, VSC73XX_MAC_CFG,</div><div class='add'>+		      VSC73XX_MAC_CFG_RESET | initval);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vsc73xx_mac_config(struct phylink_config *config, unsigned int mode,</div><div class='add'>+			       const struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct vsc73xx *vsc = dp-&gt;ds-&gt;priv;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+</div><div class='add'>+	/* Special handling of the CPU-facing port */</div><div class='add'>+	if (port == CPU_PORT) {</div><div class='add'>+		/* Other ports are already initialized but not this one */</div><div class='add'>+		vsc73xx_init_port(vsc, CPU_PORT);</div><div class='add'>+		/* Select the external port for this interface (EXT_PORT)</div><div class='add'>+		 * Enable the GMII GTX external clock</div><div class='add'>+		 * Use double data rate (DDR mode)</div><div class='add'>+		 */</div><div class='add'>+		vsc73xx_write(vsc, VSC73XX_BLOCK_MAC,</div><div class='add'>+			      CPU_PORT,</div><div class='add'>+			      VSC73XX_ADVPORTM,</div><div class='add'>+			      VSC73XX_ADVPORTM_EXT_PORT |</div><div class='add'>+			      VSC73XX_ADVPORTM_ENA_GTX |</div><div class='add'>+			      VSC73XX_ADVPORTM_DDR_MODE);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vsc73xx_mac_link_down(struct phylink_config *config,</div><div class='add'>+				  unsigned int mode, phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct vsc73xx *vsc = dp-&gt;ds-&gt;priv;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+</div><div class='add'>+	/* This routine is described in the datasheet (below ARBDISC register</div><div class='add'>+	 * description)</div><div class='add'>+	 */</div><div class='add'>+	vsc73xx_reset_port(vsc, port, 0);</div><div class='add'>+</div><div class='add'>+	/* Allow backward dropping of frames from this port */</div><div class='add'>+	vsc73xx_update_bits(vsc, VSC73XX_BLOCK_ARBITER, 0,</div><div class='add'>+			    VSC73XX_SBACKWDROP, BIT(port), BIT(port));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vsc73xx_mac_link_up(struct phylink_config *config,</div><div class='add'>+				struct phy_device *phy, unsigned int mode,</div><div class='add'>+				phy_interface_t interface, int speed,</div><div class='add'>+				int duplex, bool tx_pause, bool rx_pause)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct vsc73xx *vsc = dp-&gt;ds-&gt;priv;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+	u32 val;</div><div class='add'>+	u8 seed;</div><div class='add'>+</div><div class='add'>+	if (speed == SPEED_1000)</div><div class='add'>+		val = VSC73XX_MAC_CFG_GIGA_MODE | VSC73XX_MAC_CFG_TX_IPG_1000M;</div><div class='add'>+	else</div><div class='add'>+		val = VSC73XX_MAC_CFG_TX_IPG_100_10M;</div><div class='add'>+</div><div class='add'>+	if (phy_interface_mode_is_rgmii(interface))</div><div class='add'>+		val |= VSC73XX_MAC_CFG_CLK_SEL_1000M;</div><div class='add'>+	else</div><div class='add'>+		val |= VSC73XX_MAC_CFG_CLK_SEL_EXT;</div><div class='add'>+</div><div class='add'>+	if (duplex == DUPLEX_FULL)</div><div class='add'>+		val |= VSC73XX_MAC_CFG_FDX;</div><div class='add'>+	else</div><div class='add'>+		/* In datasheet description ("Port Mode Procedure" in 5.6.2)</div><div class='add'>+		 * this bit is configured only for half duplex.</div><div class='add'>+		 */</div><div class='add'>+		val |= VSC73XX_MAC_CFG_WEXC_DIS;</div><div class='add'>+</div><div class='add'>+	/* This routine is described in the datasheet (below ARBDISC register</div><div class='add'>+	 * description)</div><div class='add'>+	 */</div><div class='add'>+	vsc73xx_reset_port(vsc, port, val);</div><div class='add'>+</div><div class='add'>+	/* Seed the port randomness with randomness */</div><div class='add'>+	get_random_bytes(&amp;seed, 1);</div><div class='add'>+	val |= seed &lt;&lt; VSC73XX_MAC_CFG_SEED_OFFSET;</div><div class='add'>+	val |= VSC73XX_MAC_CFG_SEED_LOAD;</div><div class='add'>+</div><div class='add'>+	/* Those bits are responsible for MTU only. Kernel takes care about MTU,</div><div class='add'>+	 * let's enable +8 bytes frame length unconditionally.</div><div class='add'>+	 */</div><div class='add'>+	val |= VSC73XX_MAC_CFG_VLAN_AWR | VSC73XX_MAC_CFG_VLAN_DBLAWR;</div><div class='add'>+</div><div class='add'>+	vsc73xx_write(vsc, VSC73XX_BLOCK_MAC, port, VSC73XX_MAC_CFG, val);</div><div class='add'>+</div><div class='add'>+	/* Flow control for the PHY facing ports:</div><div class='add'>+	 * Use a zero delay pause frame when pause condition is left</div><div class='add'>+	 * Obey pause control frames</div><div class='add'>+	 * When generating pause frames, use 0xff as pause value</div><div class='add'>+	 */</div><div class='add'>+	vsc73xx_write(vsc, VSC73XX_BLOCK_MAC, port, VSC73XX_FCCONF,</div><div class='add'>+		      VSC73XX_FCCONF_ZERO_PAUSE_EN |</div><div class='add'>+		      VSC73XX_FCCONF_FLOW_CTRL_OBEY |</div><div class='add'>+		      0xff);</div><div class='add'>+</div><div class='add'>+	/* Accept packets again */</div><div class='add'>+	vsc73xx_update_bits(vsc, VSC73XX_BLOCK_ARBITER, 0,</div><div class='add'>+			    VSC73XX_ARBDISC, BIT(port), 0);</div><div class='add'>+</div><div class='add'>+	/* Disallow backward dropping of frames from this port */</div><div class='add'>+	vsc73xx_update_bits(vsc, VSC73XX_BLOCK_ARBITER, 0,</div><div class='add'>+			    VSC73XX_SBACKWDROP, BIT(port), 0);</div><div class='add'>+</div><div class='add'>+	/* Enable TX, RX, deassert reset, stop loading seed */</div><div class='add'>+	vsc73xx_update_bits(vsc, VSC73XX_BLOCK_MAC, port,</div><div class='add'>+			    VSC73XX_MAC_CFG,</div><div class='add'>+			    VSC73XX_MAC_CFG_RESET | VSC73XX_MAC_CFG_SEED_LOAD |</div><div class='add'>+			    VSC73XX_MAC_CFG_TX_EN | VSC73XX_MAC_CFG_RX_EN,</div><div class='add'>+			    VSC73XX_MAC_CFG_TX_EN | VSC73XX_MAC_CFG_RX_EN);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool vsc73xx_tag_8021q_active(struct dsa_port *dp)</div><div class='add'>+{</div><div class='add'>+	return !dsa_port_is_vlan_filtering(dp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct vsc73xx_bridge_vlan *</div><div class='add'>+vsc73xx_bridge_vlan_find(struct vsc73xx *vsc, u16 vid)</div><div class='add'>+{</div><div class='add'>+	struct vsc73xx_bridge_vlan *vlan;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(vlan, &amp;vsc-&gt;vlans, list)</div><div class='add'>+		if (vlan-&gt;vid == vid)</div><div class='add'>+			return vlan;</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+vsc73xx_bridge_vlan_remove_port(struct vsc73xx_bridge_vlan *vsc73xx_vlan,</div><div class='add'>+				int port)</div><div class='add'>+{</div><div class='add'>+	vsc73xx_vlan-&gt;portmask &amp;= ~BIT(port);</div><div class='add'>+</div><div class='add'>+	if (vsc73xx_vlan-&gt;portmask)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	list_del(&amp;vsc73xx_vlan-&gt;list);</div><div class='add'>+	kfree(vsc73xx_vlan);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vsc73xx_bridge_vlan_summary(struct vsc73xx *vsc, int port,</div><div class='add'>+					struct vsc73xx_vlan_summary *summary,</div><div class='add'>+					u16 ignored_vid)</div><div class='add'>+{</div><div class='add'>+	size_t num_tagged = 0, num_untagged = 0;</div><div class='add'>+	struct vsc73xx_bridge_vlan *vlan;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(vlan, &amp;vsc-&gt;vlans, list) {</div><div class='add'>+		if (!(vlan-&gt;portmask &amp; BIT(port)) || vlan-&gt;vid == ignored_vid)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (vlan-&gt;untagged &amp; BIT(port))</div><div class='add'>+			num_untagged++;</div><div class='add'>+		else</div><div class='add'>+			num_tagged++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	summary-&gt;num_untagged = num_untagged;</div><div class='add'>+	summary-&gt;num_tagged = num_tagged;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 vsc73xx_find_first_vlan_untagged(struct vsc73xx *vsc, int port)</div><div class='add'>+{</div><div class='add'>+	struct vsc73xx_bridge_vlan *vlan;</div><div class='add'>+</div><div class='add'>+	list_for_each_entry(vlan, &amp;vsc-&gt;vlans, list)</div><div class='add'>+		if ((vlan-&gt;portmask &amp; BIT(port)) &amp;&amp;</div><div class='add'>+		    (vlan-&gt;untagged &amp; BIT(port)))</div><div class='add'>+			return vlan-&gt;vid;</div><div class='add'>+</div><div class='add'>+	return VLAN_N_VID;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc73xx_set_vlan_conf(struct vsc73xx *vsc, int port,</div><div class='add'>+				 enum vsc73xx_port_vlan_conf port_vlan_conf)</div><div class='add'>+{</div><div class='add'>+	u32 val = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (port_vlan_conf == VSC73XX_VLAN_IGNORE)</div><div class='add'>+		val = VSC73XX_CAT_VLAN_MISC_VLAN_TCI_IGNORE_ENA |</div><div class='add'>+		      VSC73XX_CAT_VLAN_MISC_VLAN_KEEP_TAG_ENA;</div><div class='add'>+</div><div class='add'>+	ret = vsc73xx_update_bits(vsc, VSC73XX_BLOCK_MAC, port,</div><div class='add'>+				  VSC73XX_CAT_VLAN_MISC,</div><div class='add'>+				  VSC73XX_CAT_VLAN_MISC_VLAN_TCI_IGNORE_ENA |</div><div class='add'>+				  VSC73XX_CAT_VLAN_MISC_VLAN_KEEP_TAG_ENA, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	val = (port_vlan_conf == VSC73XX_VLAN_FILTER) ?</div><div class='add'>+	      VSC73XX_TXUPDCFG_TX_INSERT_TAG : 0;</div><div class='add'>+</div><div class='add'>+	return vsc73xx_update_bits(vsc, VSC73XX_BLOCK_MAC, port,</div><div class='add'>+				   VSC73XX_TXUPDCFG,</div><div class='add'>+				   VSC73XX_TXUPDCFG_TX_INSERT_TAG, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vsc73xx_vlan_commit_conf - Update VLAN configuration of a port</div><div class='add'>+ * @vsc: Switch private data structure</div><div class='add'>+ * @port: Port index on which to operate</div><div class='add'>+ *</div><div class='add'>+ * Update the VLAN behavior of a port to make sure that when it is under</div><div class='add'>+ * a VLAN filtering bridge, the port is either filtering with tag</div><div class='add'>+ * preservation, or filtering with all VLANs egress-untagged. Otherwise,</div><div class='add'>+ * the port ignores VLAN tags from packets and applies the port-based</div><div class='add'>+ * VID.</div><div class='add'>+ *</div><div class='add'>+ * Must be called when changes are made to:</div><div class='add'>+ * - the bridge VLAN filtering state of the port</div><div class='add'>+ * - the number or attributes of VLANs from the bridge VLAN table,</div><div class='add'>+ *   while the port is currently VLAN-aware</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or negative errno on error.</div><div class='add'>+ */</div><div class='add'>+static int vsc73xx_vlan_commit_conf(struct vsc73xx *vsc, int port)</div><div class='add'>+{</div><div class='add'>+	enum vsc73xx_port_vlan_conf port_vlan_conf = VSC73XX_VLAN_IGNORE;</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(vsc-&gt;ds, port);</div><div class='add'>+</div><div class='add'>+	if (port == CPU_PORT) {</div><div class='add'>+		port_vlan_conf = VSC73XX_VLAN_FILTER;</div><div class='add'>+	} else if (dsa_port_is_vlan_filtering(dp)) {</div><div class='add'>+		struct vsc73xx_vlan_summary summary;</div><div class='add'>+</div><div class='add'>+		port_vlan_conf = VSC73XX_VLAN_FILTER;</div><div class='add'>+</div><div class='add'>+		vsc73xx_bridge_vlan_summary(vsc, port, &amp;summary, VLAN_N_VID);</div><div class='add'>+		if (summary.num_tagged == 0)</div><div class='add'>+			port_vlan_conf = VSC73XX_VLAN_FILTER_UNTAG_ALL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return vsc73xx_set_vlan_conf(vsc, port, port_vlan_conf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+vsc73xx_vlan_change_untagged(struct vsc73xx *vsc, int port, u16 vid, bool set)</div><div class='add'>+{</div><div class='add'>+	u32 val = 0;</div><div class='add'>+</div><div class='add'>+	if (set)</div><div class='add'>+		val = VSC73XX_TXUPDCFG_TX_UNTAGGED_VID_ENA |</div><div class='add'>+		      ((vid &lt;&lt; VSC73XX_TXUPDCFG_TX_UNTAGGED_VID_SHIFT) &amp;</div><div class='add'>+		       VSC73XX_TXUPDCFG_TX_UNTAGGED_VID);</div><div class='add'>+</div><div class='add'>+	return vsc73xx_update_bits(vsc, VSC73XX_BLOCK_MAC, port,</div><div class='add'>+				   VSC73XX_TXUPDCFG,</div><div class='add'>+				   VSC73XX_TXUPDCFG_TX_UNTAGGED_VID_ENA |</div><div class='add'>+				   VSC73XX_TXUPDCFG_TX_UNTAGGED_VID, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vsc73xx_vlan_commit_untagged - Update native VLAN of a port</div><div class='add'>+ * @vsc: Switch private data structure</div><div class='add'>+ * @port: Port index on which to operate</div><div class='add'>+ *</div><div class='add'>+ * Update the native VLAN of a port (the one VLAN which is transmitted</div><div class='add'>+ * as egress-tagged on a trunk port) when port is in VLAN filtering mode and</div><div class='add'>+ * only one untagged vid is configured.</div><div class='add'>+ * In other cases no need to configure it because switch can untag all vlans on</div><div class='add'>+ * the port.</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or negative errno on error.</div><div class='add'>+ */</div><div class='add'>+static int vsc73xx_vlan_commit_untagged(struct vsc73xx *vsc, int port)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(vsc-&gt;ds, port);</div><div class='add'>+	struct vsc73xx_vlan_summary summary;</div><div class='add'>+	u16 vid = 0;</div><div class='add'>+	bool valid;</div><div class='add'>+</div><div class='add'>+	if (!dsa_port_is_vlan_filtering(dp))</div><div class='add'>+		/* Port is configured to untag all vlans in that case.</div><div class='add'>+		 * No need to commit untagged config change.</div><div class='add'>+		 */</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	vsc73xx_bridge_vlan_summary(vsc, port, &amp;summary, VLAN_N_VID);</div><div class='add'>+</div><div class='add'>+	if (summary.num_untagged &gt; 1)</div><div class='add'>+		/* Port must untag all vlans in that case.</div><div class='add'>+		 * No need to commit untagged config change.</div><div class='add'>+		 */</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	valid = (summary.num_untagged == 1);</div><div class='add'>+	if (valid)</div><div class='add'>+		vid = vsc73xx_find_first_vlan_untagged(vsc, port);</div><div class='add'>+</div><div class='add'>+	return vsc73xx_vlan_change_untagged(vsc, port, vid, valid);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+vsc73xx_vlan_change_pvid(struct vsc73xx *vsc, int port, u16 vid, bool set)</div><div class='add'>+{</div><div class='add'>+	u32 val = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	val = set ? 0 : VSC73XX_CAT_DROP_UNTAGGED_ENA;</div><div class='add'>+</div><div class='add'>+	ret = vsc73xx_update_bits(vsc, VSC73XX_BLOCK_MAC, port,</div><div class='add'>+				  VSC73XX_CAT_DROP,</div><div class='add'>+				  VSC73XX_CAT_DROP_UNTAGGED_ENA, val);</div><div class='add'>+	if (!set || ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return vsc73xx_update_bits(vsc, VSC73XX_BLOCK_MAC, port,</div><div class='add'>+				   VSC73XX_CAT_PORT_VLAN,</div><div class='add'>+				   VSC73XX_CAT_PORT_VLAN_VLAN_VID,</div><div class='add'>+				   vid &amp; VSC73XX_CAT_PORT_VLAN_VLAN_VID);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * vsc73xx_vlan_commit_pvid - Update port-based default VLAN of a port</div><div class='add'>+ * @vsc: Switch private data structure</div><div class='add'>+ * @port: Port index on which to operate</div><div class='add'>+ *</div><div class='add'>+ * Update the PVID of a port so that it follows either the bridge PVID</div><div class='add'>+ * configuration, when the bridge is currently VLAN-aware, or the PVID</div><div class='add'>+ * from tag_8021q, when the port is standalone or under a VLAN-unaware</div><div class='add'>+ * bridge. A port with no PVID drops all untagged and VID 0 tagged</div><div class='add'>+ * traffic.</div><div class='add'>+ *</div><div class='add'>+ * Must be called when changes are made to:</div><div class='add'>+ * - the bridge VLAN filtering state of the port</div><div class='add'>+ * - the number or attributes of VLANs from the bridge VLAN table,</div><div class='add'>+ *   while the port is currently VLAN-aware</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or negative errno on error.</div><div class='add'>+ */</div><div class='add'>+static int vsc73xx_vlan_commit_pvid(struct vsc73xx *vsc, int port)</div><div class='add'>+{</div><div class='add'>+	struct vsc73xx_portinfo *portinfo = &amp;vsc-&gt;portinfo[port];</div><div class='add'>+	bool valid = portinfo-&gt;pvid_tag_8021q_configured;</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(vsc-&gt;ds, port);</div><div class='add'>+	u16 vid = portinfo-&gt;pvid_tag_8021q;</div><div class='add'>+</div><div class='add'>+	if (dsa_port_is_vlan_filtering(dp)) {</div><div class='add'>+		vid = portinfo-&gt;pvid_vlan_filtering;</div><div class='add'>+		valid = portinfo-&gt;pvid_vlan_filtering_configured;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return vsc73xx_vlan_change_pvid(vsc, port, vid, valid);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc73xx_vlan_commit_settings(struct vsc73xx *vsc, int port)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = vsc73xx_vlan_commit_untagged(vsc, port);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = vsc73xx_vlan_commit_pvid(vsc, port);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return vsc73xx_vlan_commit_conf(vsc, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc73xx_port_enable(struct dsa_switch *ds, int port,</div><div class='add'>+			       struct phy_device *phy)</div><div class='add'>+{</div><div class='add'>+	struct vsc73xx *vsc = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	dev_info(vsc-&gt;dev, "enable port %d\n", port);</div><div class='add'>+	vsc73xx_init_port(vsc, port);</div><div class='add'>+</div><div class='add'>+	return vsc73xx_vlan_commit_settings(vsc, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vsc73xx_port_disable(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct vsc73xx *vsc = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	/* Just put the port into reset */</div><div class='add'>+	vsc73xx_write(vsc, VSC73XX_BLOCK_MAC, port,</div><div class='add'>+		      VSC73XX_MAC_CFG, VSC73XX_MAC_CFG_RESET);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct vsc73xx_counter *</div><div class='add'>+vsc73xx_find_counter(struct vsc73xx *vsc,</div><div class='add'>+		     u8 counter,</div><div class='add'>+		     bool tx)</div><div class='add'>+{</div><div class='add'>+	const struct vsc73xx_counter *cnts;</div><div class='add'>+	int num_cnts;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (tx) {</div><div class='add'>+		cnts = vsc73xx_tx_counters;</div><div class='add'>+		num_cnts = ARRAY_SIZE(vsc73xx_tx_counters);</div><div class='add'>+	} else {</div><div class='add'>+		cnts = vsc73xx_rx_counters;</div><div class='add'>+		num_cnts = ARRAY_SIZE(vsc73xx_rx_counters);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_cnts; i++) {</div><div class='add'>+		const struct vsc73xx_counter *cnt;</div><div class='add'>+</div><div class='add'>+		cnt = &amp;cnts[i];</div><div class='add'>+		if (cnt-&gt;counter == counter)</div><div class='add'>+			return cnt;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vsc73xx_get_strings(struct dsa_switch *ds, int port, u32 stringset,</div><div class='add'>+				uint8_t *data)</div><div class='add'>+{</div><div class='add'>+	const struct vsc73xx_counter *cnt;</div><div class='add'>+	struct vsc73xx *vsc = ds-&gt;priv;</div><div class='add'>+	u8 indices[6];</div><div class='add'>+	u8 *buf = data;</div><div class='add'>+	int i;</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (stringset != ETH_SS_STATS)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ret = vsc73xx_read(vsc, VSC73XX_BLOCK_MAC, port,</div><div class='add'>+			   VSC73XX_C_CFG, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	indices[0] = (val &amp; 0x1f); /* RX counter 0 */</div><div class='add'>+	indices[1] = ((val &gt;&gt; 5) &amp; 0x1f); /* RX counter 1 */</div><div class='add'>+	indices[2] = ((val &gt;&gt; 10) &amp; 0x1f); /* RX counter 2 */</div><div class='add'>+	indices[3] = ((val &gt;&gt; 16) &amp; 0x1f); /* TX counter 0 */</div><div class='add'>+	indices[4] = ((val &gt;&gt; 21) &amp; 0x1f); /* TX counter 1 */</div><div class='add'>+	indices[5] = ((val &gt;&gt; 26) &amp; 0x1f); /* TX counter 2 */</div><div class='add'>+</div><div class='add'>+	/* The first counters is the RX octets */</div><div class='add'>+	ethtool_puts(&amp;buf, "RxEtherStatsOctets");</div><div class='add'>+</div><div class='add'>+	/* Each port supports recording 3 RX counters and 3 TX counters,</div><div class='add'>+	 * figure out what counters we use in this set-up and return the</div><div class='add'>+	 * names of them. The hardware default counters will be number of</div><div class='add'>+	 * packets on RX/TX, combined broadcast+multicast packets RX/TX and</div><div class='add'>+	 * total error packets RX/TX.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; 3; i++) {</div><div class='add'>+		cnt = vsc73xx_find_counter(vsc, indices[i], false);</div><div class='add'>+		ethtool_puts(&amp;buf, cnt ? cnt-&gt;name : "");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* TX stats begins with the number of TX octets */</div><div class='add'>+	ethtool_puts(&amp;buf, "TxEtherStatsOctets");</div><div class='add'>+</div><div class='add'>+	for (i = 3; i &lt; 6; i++) {</div><div class='add'>+		cnt = vsc73xx_find_counter(vsc, indices[i], true);</div><div class='add'>+		ethtool_puts(&amp;buf, cnt ? cnt-&gt;name : "");</div><div class='add'>+</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc73xx_get_sset_count(struct dsa_switch *ds, int port, int sset)</div><div class='add'>+{</div><div class='add'>+	/* We only support SS_STATS */</div><div class='add'>+	if (sset != ETH_SS_STATS)</div><div class='add'>+		return 0;</div><div class='add'>+	/* RX and TX packets, then 3 RX counters, 3 TX counters */</div><div class='add'>+	return 8;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vsc73xx_get_ethtool_stats(struct dsa_switch *ds, int port,</div><div class='add'>+				      uint64_t *data)</div><div class='add'>+{</div><div class='add'>+	struct vsc73xx *vsc = ds-&gt;priv;</div><div class='add'>+	u8 regs[] = {</div><div class='add'>+		VSC73XX_RXOCT,</div><div class='add'>+		VSC73XX_C_RX0,</div><div class='add'>+		VSC73XX_C_RX1,</div><div class='add'>+		VSC73XX_C_RX2,</div><div class='add'>+		VSC73XX_TXOCT,</div><div class='add'>+		VSC73XX_C_TX0,</div><div class='add'>+		VSC73XX_C_TX1,</div><div class='add'>+		VSC73XX_C_TX2,</div><div class='add'>+	};</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(regs); i++) {</div><div class='add'>+		ret = vsc73xx_read(vsc, VSC73XX_BLOCK_MAC, port,</div><div class='add'>+				   regs[i], &amp;val);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(vsc-&gt;dev, "error reading counter %d\n", i);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+		data[i] = val;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc73xx_change_mtu(struct dsa_switch *ds, int port, int new_mtu)</div><div class='add'>+{</div><div class='add'>+	struct vsc73xx *vsc = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	return vsc73xx_write(vsc, VSC73XX_BLOCK_MAC, port,</div><div class='add'>+			     VSC73XX_MAXLEN, new_mtu + ETH_HLEN + ETH_FCS_LEN);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* According to application not "VSC7398 Jumbo Frames" setting</div><div class='add'>+ * up the frame size to 9.6 KB does not affect the performance on standard</div><div class='add'>+ * frames. It is clear from the application note that</div><div class='add'>+ * "9.6 kilobytes" == 9600 bytes.</div><div class='add'>+ */</div><div class='add'>+static int vsc73xx_get_max_mtu(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	return 9600 - ETH_HLEN - ETH_FCS_LEN;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vsc73xx_phylink_get_caps(struct dsa_switch *dsa, int port,</div><div class='add'>+				     struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	unsigned long *interfaces = config-&gt;supported_interfaces;</div><div class='add'>+</div><div class='add'>+	if (port == 5)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (port == CPU_PORT) {</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_MII, interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_REVMII, interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_GMII, interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_RGMII, interfaces);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (port &lt;= 4) {</div><div class='add'>+		/* Internal PHYs */</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_INTERNAL, interfaces);</div><div class='add'>+		/* phylib default */</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_GMII, interfaces);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	config-&gt;mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100 | MAC_1000;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+vsc73xx_port_vlan_filtering(struct dsa_switch *ds, int port,</div><div class='add'>+			    bool vlan_filtering, struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct vsc73xx *vsc = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	/* The commit to hardware processed below is required because vsc73xx</div><div class='add'>+	 * is using tag_8021q. When vlan_filtering is disabled, tag_8021q uses</div><div class='add'>+	 * pvid/untagged vlans for port recognition. The values configured for</div><div class='add'>+	 * vlans and pvid/untagged states are stored in portinfo structure.</div><div class='add'>+	 * When vlan_filtering is enabled, we need to restore pvid/untagged from</div><div class='add'>+	 * portinfo structure. Analogous routine is processed when</div><div class='add'>+	 * vlan_filtering is disabled, but values used for tag_8021q are</div><div class='add'>+	 * restored.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	return vsc73xx_vlan_commit_settings(vsc, port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc73xx_port_vlan_add(struct dsa_switch *ds, int port,</div><div class='add'>+				 const struct switchdev_obj_port_vlan *vlan,</div><div class='add'>+				 struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	bool untagged = vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_UNTAGGED;</div><div class='add'>+	bool pvid = vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_PVID;</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(ds, port);</div><div class='add'>+	struct vsc73xx_bridge_vlan *vsc73xx_vlan;</div><div class='add'>+	struct vsc73xx_vlan_summary summary;</div><div class='add'>+	struct vsc73xx_portinfo *portinfo;</div><div class='add'>+	struct vsc73xx *vsc = ds-&gt;priv;</div><div class='add'>+	bool commit_to_hardware;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	/* Be sure to deny alterations to the configuration done by tag_8021q.</div><div class='add'>+	 */</div><div class='add'>+	if (vid_is_dsa_8021q(vlan-&gt;vid)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Range 3072-4095 reserved for dsa_8021q operation");</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* The processed vlan-&gt;vid is excluded from the search because the VLAN</div><div class='add'>+	 * can be re-added with a different set of flags, so it's easiest to</div><div class='add'>+	 * ignore its old flags from the VLAN database software copy.</div><div class='add'>+	 */</div><div class='add'>+	vsc73xx_bridge_vlan_summary(vsc, port, &amp;summary, vlan-&gt;vid);</div><div class='add'>+</div><div class='add'>+	/* VSC73XX allows only three untagged states: none, one or all */</div><div class='add'>+	if ((untagged &amp;&amp; summary.num_tagged &gt; 0 &amp;&amp; summary.num_untagged &gt; 0) ||</div><div class='add'>+	    (!untagged &amp;&amp; summary.num_untagged &gt; 1)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Port can have only none, one or all untagged vlan");</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vsc73xx_vlan = vsc73xx_bridge_vlan_find(vsc, vlan-&gt;vid);</div><div class='add'>+</div><div class='add'>+	if (!vsc73xx_vlan) {</div><div class='add'>+		vsc73xx_vlan = kzalloc(sizeof(*vsc73xx_vlan), GFP_KERNEL);</div><div class='add'>+		if (!vsc73xx_vlan)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		vsc73xx_vlan-&gt;vid = vlan-&gt;vid;</div><div class='add'>+</div><div class='add'>+		list_add_tail(&amp;vsc73xx_vlan-&gt;list, &amp;vsc-&gt;vlans);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vsc73xx_vlan-&gt;portmask |= BIT(port);</div><div class='add'>+</div><div class='add'>+	/* CPU port must be always tagged because source port identification is</div><div class='add'>+	 * based on tag_8021q.</div><div class='add'>+	 */</div><div class='add'>+	if (port == CPU_PORT)</div><div class='add'>+		goto update_vlan_table;</div><div class='add'>+</div><div class='add'>+	if (untagged)</div><div class='add'>+		vsc73xx_vlan-&gt;untagged |= BIT(port);</div><div class='add'>+	else</div><div class='add'>+		vsc73xx_vlan-&gt;untagged &amp;= ~BIT(port);</div><div class='add'>+</div><div class='add'>+	portinfo = &amp;vsc-&gt;portinfo[port];</div><div class='add'>+</div><div class='add'>+	if (pvid) {</div><div class='add'>+		portinfo-&gt;pvid_vlan_filtering_configured = true;</div><div class='add'>+		portinfo-&gt;pvid_vlan_filtering = vlan-&gt;vid;</div><div class='add'>+	} else if (portinfo-&gt;pvid_vlan_filtering_configured &amp;&amp;</div><div class='add'>+		   portinfo-&gt;pvid_vlan_filtering == vlan-&gt;vid) {</div><div class='add'>+		portinfo-&gt;pvid_vlan_filtering_configured = false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	commit_to_hardware = !vsc73xx_tag_8021q_active(dp);</div><div class='add'>+	if (commit_to_hardware) {</div><div class='add'>+		ret = vsc73xx_vlan_commit_settings(vsc, port);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+update_vlan_table:</div><div class='add'>+	ret = vsc73xx_update_vlan_table(vsc, port, vlan-&gt;vid, true);</div><div class='add'>+	if (!ret)</div><div class='add'>+		return 0;</div><div class='add'>+err:</div><div class='add'>+	vsc73xx_bridge_vlan_remove_port(vsc73xx_vlan, port);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc73xx_port_vlan_del(struct dsa_switch *ds, int port,</div><div class='add'>+				 const struct switchdev_obj_port_vlan *vlan)</div><div class='add'>+{</div><div class='add'>+	struct vsc73xx_bridge_vlan *vsc73xx_vlan;</div><div class='add'>+	struct vsc73xx_portinfo *portinfo;</div><div class='add'>+	struct vsc73xx *vsc = ds-&gt;priv;</div><div class='add'>+	bool commit_to_hardware;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = vsc73xx_update_vlan_table(vsc, port, vlan-&gt;vid, false);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	portinfo = &amp;vsc-&gt;portinfo[port];</div><div class='add'>+</div><div class='add'>+	if (portinfo-&gt;pvid_vlan_filtering_configured &amp;&amp;</div><div class='add'>+	    portinfo-&gt;pvid_vlan_filtering == vlan-&gt;vid)</div><div class='add'>+		portinfo-&gt;pvid_vlan_filtering_configured = false;</div><div class='add'>+</div><div class='add'>+	vsc73xx_vlan = vsc73xx_bridge_vlan_find(vsc, vlan-&gt;vid);</div><div class='add'>+</div><div class='add'>+	if (vsc73xx_vlan)</div><div class='add'>+		vsc73xx_bridge_vlan_remove_port(vsc73xx_vlan, port);</div><div class='add'>+</div><div class='add'>+	commit_to_hardware = !vsc73xx_tag_8021q_active(dsa_to_port(ds, port));</div><div class='add'>+</div><div class='add'>+	if (commit_to_hardware)</div><div class='add'>+		return vsc73xx_vlan_commit_settings(vsc, port);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc73xx_tag_8021q_vlan_add(struct dsa_switch *ds, int port, u16 vid,</div><div class='add'>+				      u16 flags)</div><div class='add'>+{</div><div class='add'>+	bool pvid = flags &amp; BRIDGE_VLAN_INFO_PVID;</div><div class='add'>+	struct vsc73xx_portinfo *portinfo;</div><div class='add'>+	struct vsc73xx *vsc = ds-&gt;priv;</div><div class='add'>+	bool commit_to_hardware;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	portinfo = &amp;vsc-&gt;portinfo[port];</div><div class='add'>+</div><div class='add'>+	if (pvid) {</div><div class='add'>+		portinfo-&gt;pvid_tag_8021q_configured = true;</div><div class='add'>+		portinfo-&gt;pvid_tag_8021q = vid;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	commit_to_hardware = vsc73xx_tag_8021q_active(dsa_to_port(ds, port));</div><div class='add'>+	if (commit_to_hardware) {</div><div class='add'>+		ret = vsc73xx_vlan_commit_settings(vsc, port);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return vsc73xx_update_vlan_table(vsc, port, vid, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc73xx_tag_8021q_vlan_del(struct dsa_switch *ds, int port, u16 vid)</div><div class='add'>+{</div><div class='add'>+	struct vsc73xx_portinfo *portinfo;</div><div class='add'>+	struct vsc73xx *vsc = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	portinfo = &amp;vsc-&gt;portinfo[port];</div><div class='add'>+</div><div class='add'>+	if (portinfo-&gt;pvid_tag_8021q_configured &amp;&amp;</div><div class='add'>+	    portinfo-&gt;pvid_tag_8021q == vid) {</div><div class='add'>+		struct dsa_port *dp = dsa_to_port(ds, port);</div><div class='add'>+		bool commit_to_hardware;</div><div class='add'>+		int err;</div><div class='add'>+</div><div class='add'>+		portinfo-&gt;pvid_tag_8021q_configured = false;</div><div class='add'>+</div><div class='add'>+		commit_to_hardware = vsc73xx_tag_8021q_active(dp);</div><div class='add'>+		if (commit_to_hardware) {</div><div class='add'>+			err = vsc73xx_vlan_commit_settings(vsc, port);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return vsc73xx_update_vlan_table(vsc, port, vid, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc73xx_port_pre_bridge_flags(struct dsa_switch *ds, int port,</div><div class='add'>+					 struct switchdev_brport_flags flags,</div><div class='add'>+					 struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	if (flags.mask &amp; ~BR_LEARNING)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc73xx_port_bridge_flags(struct dsa_switch *ds, int port,</div><div class='add'>+				     struct switchdev_brport_flags flags,</div><div class='add'>+				     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	if (flags.mask &amp; BR_LEARNING) {</div><div class='add'>+		u32 val = flags.val &amp; BR_LEARNING ? BIT(port) : 0;</div><div class='add'>+		struct vsc73xx *vsc = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+		return vsc73xx_update_bits(vsc, VSC73XX_BLOCK_ANALYZER, 0,</div><div class='add'>+					   VSC73XX_LEARNMASK, BIT(port), val);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vsc73xx_refresh_fwd_map(struct dsa_switch *ds, int port, u8 state)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *other_dp, *dp = dsa_to_port(ds, port);</div><div class='add'>+	struct vsc73xx *vsc = ds-&gt;priv;</div><div class='add'>+	u16 mask;</div><div class='add'>+</div><div class='add'>+	if (state != BR_STATE_FORWARDING) {</div><div class='add'>+		/* Ports that aren't in the forwarding state must not</div><div class='add'>+		 * forward packets anywhere.</div><div class='add'>+		 */</div><div class='add'>+		vsc73xx_update_bits(vsc, VSC73XX_BLOCK_ANALYZER, 0,</div><div class='add'>+				    VSC73XX_SRCMASKS + port,</div><div class='add'>+				    VSC73XX_SRCMASKS_PORTS_MASK, 0);</div><div class='add'>+</div><div class='add'>+		dsa_switch_for_each_available_port(other_dp, ds) {</div><div class='add'>+			if (other_dp == dp)</div><div class='add'>+				continue;</div><div class='add'>+			vsc73xx_update_bits(vsc, VSC73XX_BLOCK_ANALYZER, 0,</div><div class='add'>+					    VSC73XX_SRCMASKS + other_dp-&gt;index,</div><div class='add'>+					    BIT(port), 0);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Forwarding ports must forward to the CPU and to other ports</div><div class='add'>+	 * in the same bridge</div><div class='add'>+	 */</div><div class='add'>+	vsc73xx_update_bits(vsc, VSC73XX_BLOCK_ANALYZER, 0,</div><div class='add'>+			    VSC73XX_SRCMASKS + CPU_PORT, BIT(port), BIT(port));</div><div class='add'>+</div><div class='add'>+	mask = BIT(CPU_PORT);</div><div class='add'>+</div><div class='add'>+	dsa_switch_for_each_user_port(other_dp, ds) {</div><div class='add'>+		int other_port = other_dp-&gt;index;</div><div class='add'>+</div><div class='add'>+		if (port == other_port || !dsa_port_bridge_same(dp, other_dp) ||</div><div class='add'>+		    other_dp-&gt;stp_state != BR_STATE_FORWARDING)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		mask |= BIT(other_port);</div><div class='add'>+</div><div class='add'>+		vsc73xx_update_bits(vsc, VSC73XX_BLOCK_ANALYZER, 0,</div><div class='add'>+				    VSC73XX_SRCMASKS + other_port,</div><div class='add'>+				    BIT(port), BIT(port));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	vsc73xx_update_bits(vsc, VSC73XX_BLOCK_ANALYZER, 0,</div><div class='add'>+			    VSC73XX_SRCMASKS + port,</div><div class='add'>+			    VSC73XX_SRCMASKS_PORTS_MASK, mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* FIXME: STP frames aren't forwarded at this moment. BPDU frames are</div><div class='add'>+ * forwarded only from and to PI/SI interface. For more info see chapter</div><div class='add'>+ * 2.7.1 (CPU Forwarding) in datasheet.</div><div class='add'>+ * This function is required for tag_8021q operations.</div><div class='add'>+ */</div><div class='add'>+static void vsc73xx_port_stp_state_set(struct dsa_switch *ds, int port,</div><div class='add'>+				       u8 state)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(ds, port);</div><div class='add'>+	struct vsc73xx *vsc = ds-&gt;priv;</div><div class='add'>+	u32 val = 0;</div><div class='add'>+</div><div class='add'>+	if (state == BR_STATE_LEARNING || state == BR_STATE_FORWARDING)</div><div class='add'>+		val = dp-&gt;learning ? BIT(port) : 0;</div><div class='add'>+</div><div class='add'>+	vsc73xx_update_bits(vsc, VSC73XX_BLOCK_ANALYZER, 0,</div><div class='add'>+			    VSC73XX_LEARNMASK, BIT(port), val);</div><div class='add'>+</div><div class='add'>+	val = (state == BR_STATE_BLOCKING || state == BR_STATE_DISABLED) ?</div><div class='add'>+	      0 : BIT(port);</div><div class='add'>+	vsc73xx_update_bits(vsc, VSC73XX_BLOCK_ANALYZER, 0,</div><div class='add'>+			    VSC73XX_RECVMASK, BIT(port), val);</div><div class='add'>+</div><div class='add'>+	/* CPU Port should always forward packets when user ports are forwarding</div><div class='add'>+	 * so let's configure it from other ports only.</div><div class='add'>+	 */</div><div class='add'>+	if (port != CPU_PORT)</div><div class='add'>+		vsc73xx_refresh_fwd_map(ds, port, state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 vsc73xx_calc_hash(const unsigned char *addr, u16 vid)</div><div class='add'>+{</div><div class='add'>+	/* VID 5-0, MAC 47-44 */</div><div class='add'>+	u16 hash = FIELD_PREP(VSC73XX_HASH0_VID_TO_MASK,</div><div class='add'>+			      FIELD_GET(VSC73XX_HASH0_VID_FROM_MASK, vid)) |</div><div class='add'>+		   FIELD_PREP(VSC73XX_HASH0_MAC0_TO_MASK,</div><div class='add'>+			      FIELD_GET(VSC73XX_HASH0_MAC0_FROM_MASK, addr[0]));</div><div class='add'>+	/* MAC 43-33 */</div><div class='add'>+	hash ^= FIELD_PREP(VSC73XX_HASH1_MAC0_TO_MASK,</div><div class='add'>+			   FIELD_GET(VSC73XX_HASH1_MAC0_FROM_MASK, addr[0])) |</div><div class='add'>+		FIELD_PREP(VSC73XX_HASH1_MAC1_TO_MASK,</div><div class='add'>+			   FIELD_GET(VSC73XX_HASH1_MAC1_FROM_MASK, addr[1]));</div><div class='add'>+	/* MAC 32-22 */</div><div class='add'>+	hash ^= FIELD_PREP(VSC73XX_HASH2_MAC1_TO_MASK,</div><div class='add'>+			   FIELD_GET(VSC73XX_HASH2_MAC1_FROM_MASK, addr[1])) |</div><div class='add'>+		FIELD_PREP(VSC73XX_HASH2_MAC2_TO_MASK,</div><div class='add'>+			   FIELD_GET(VSC73XX_HASH2_MAC2_FROM_MASK, addr[2])) |</div><div class='add'>+		FIELD_PREP(VSC73XX_HASH2_MAC3_TO_MASK,</div><div class='add'>+			   FIELD_GET(VSC73XX_HASH2_MAC3_FROM_MASK, addr[3]));</div><div class='add'>+	/* MAC 21-11 */</div><div class='add'>+	hash ^= FIELD_PREP(VSC73XX_HASH3_MAC3_TO_MASK,</div><div class='add'>+			   FIELD_GET(VSC73XX_HASH3_MAC3_FROM_MASK, addr[3])) |</div><div class='add'>+		FIELD_PREP(VSC73XX_HASH3_MAC4_TO_MASK,</div><div class='add'>+			   FIELD_GET(VSC73XX_HASH3_MAC4_FROM_MASK, addr[4]));</div><div class='add'>+	/* MAC 10-0 */</div><div class='add'>+	hash ^= FIELD_PREP(VSC73XX_HASH4_MAC4_TO_MASK,</div><div class='add'>+			   FIELD_GET(VSC73XX_HASH4_MAC4_FROM_MASK, addr[4])) |</div><div class='add'>+		addr[5];</div><div class='add'>+</div><div class='add'>+	return hash;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+vsc73xx_port_wait_for_mac_table_cmd(struct vsc73xx *vsc)</div><div class='add'>+{</div><div class='add'>+	int ret, err;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	ret = read_poll_timeout(vsc73xx_read, err,</div><div class='add'>+				err &lt; 0 ||</div><div class='add'>+				((val &amp; VSC73XX_MACACCESS_CMD_MASK) ==</div><div class='add'>+				 VSC73XX_MACACCESS_CMD_IDLE),</div><div class='add'>+				VSC73XX_POLL_SLEEP_US, VSC73XX_POLL_TIMEOUT_US,</div><div class='add'>+				false, vsc, VSC73XX_BLOCK_ANALYZER,</div><div class='add'>+				0, VSC73XX_MACACCESS, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc73xx_port_read_mac_table_row(struct vsc73xx *vsc, u16 index,</div><div class='add'>+					   struct vsc73xx_fdb *fdb)</div><div class='add'>+{</div><div class='add'>+	int ret, i;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	if (!fdb)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	if (index &gt;= VSC73XX_NUM_FDB_ROWS)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; VSC73XX_NUM_BUCKETS; i++) {</div><div class='add'>+		ret = vsc73xx_write(vsc, VSC73XX_BLOCK_ANALYZER, 0,</div><div class='add'>+				    VSC73XX_MACTINDX,</div><div class='add'>+				    (i ? 0 : VSC73XX_MACTINDX_SHADOW) |</div><div class='add'>+				    FIELD_PREP(VSC73XX_MACTINDX_BUCKET_MSK, i) |</div><div class='add'>+				    index);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		ret = vsc73xx_port_wait_for_mac_table_cmd(vsc);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		ret = vsc73xx_update_bits(vsc, VSC73XX_BLOCK_ANALYZER, 0,</div><div class='add'>+					  VSC73XX_MACACCESS,</div><div class='add'>+					  VSC73XX_MACACCESS_CMD_MASK,</div><div class='add'>+					  VSC73XX_MACACCESS_CMD_READ_ENTRY);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		ret = vsc73xx_port_wait_for_mac_table_cmd(vsc);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		ret = vsc73xx_read(vsc, VSC73XX_BLOCK_ANALYZER, 0,</div><div class='add'>+				   VSC73XX_MACACCESS, &amp;val);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		fdb[i].valid = FIELD_GET(VSC73XX_MACACCESS_VALID, val);</div><div class='add'>+		if (!fdb[i].valid)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		fdb[i].port = FIELD_GET(VSC73XX_MACACCESS_DEST_IDX_MASK, val);</div><div class='add'>+</div><div class='add'>+		ret = vsc73xx_read(vsc, VSC73XX_BLOCK_ANALYZER, 0,</div><div class='add'>+				   VSC73XX_MACHDATA, &amp;val);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		fdb[i].vid = FIELD_GET(VSC73XX_MACHDATA_VID, val);</div><div class='add'>+		fdb[i].mac[0] = FIELD_GET(VSC73XX_MACHDATA_MAC0, val);</div><div class='add'>+		fdb[i].mac[1] = FIELD_GET(VSC73XX_MACHDATA_MAC1, val);</div><div class='add'>+</div><div class='add'>+		ret = vsc73xx_read(vsc, VSC73XX_BLOCK_ANALYZER, 0,</div><div class='add'>+				   VSC73XX_MACLDATA, &amp;val);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		fdb[i].mac[2] = FIELD_GET(VSC73XX_MACLDATA_MAC2, val);</div><div class='add'>+		fdb[i].mac[3] = FIELD_GET(VSC73XX_MACLDATA_MAC3, val);</div><div class='add'>+		fdb[i].mac[4] = FIELD_GET(VSC73XX_MACLDATA_MAC4, val);</div><div class='add'>+		fdb[i].mac[5] = FIELD_GET(VSC73XX_MACLDATA_MAC5, val);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+vsc73xx_fdb_operation(struct vsc73xx *vsc, const unsigned char *addr, u16 vid,</div><div class='add'>+		      u16 hash, u16 cmd_mask, u16 cmd_val)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = FIELD_PREP(VSC73XX_MACHDATA_VID, vid) |</div><div class='add'>+	      FIELD_PREP(VSC73XX_MACHDATA_MAC0, addr[0]) |</div><div class='add'>+	      FIELD_PREP(VSC73XX_MACHDATA_MAC1, addr[1]);</div><div class='add'>+	ret = vsc73xx_write(vsc, VSC73XX_BLOCK_ANALYZER, 0, VSC73XX_MACHDATA,</div><div class='add'>+			    val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	val = FIELD_PREP(VSC73XX_MACLDATA_MAC2, addr[2]) |</div><div class='add'>+	      FIELD_PREP(VSC73XX_MACLDATA_MAC3, addr[3]) |</div><div class='add'>+	      FIELD_PREP(VSC73XX_MACLDATA_MAC4, addr[4]) |</div><div class='add'>+	      FIELD_PREP(VSC73XX_MACLDATA_MAC5, addr[5]);</div><div class='add'>+	ret = vsc73xx_write(vsc, VSC73XX_BLOCK_ANALYZER, 0, VSC73XX_MACLDATA,</div><div class='add'>+			    val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = vsc73xx_write(vsc, VSC73XX_BLOCK_ANALYZER, 0, VSC73XX_MACTINDX,</div><div class='add'>+			    hash);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = vsc73xx_port_wait_for_mac_table_cmd(vsc);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = vsc73xx_update_bits(vsc, VSC73XX_BLOCK_ANALYZER, 0,</div><div class='add'>+				  VSC73XX_MACACCESS, cmd_mask, cmd_val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return vsc73xx_port_wait_for_mac_table_cmd(vsc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc73xx_fdb_del_entry(struct vsc73xx *vsc, int port,</div><div class='add'>+				 const unsigned char *addr, u16 vid)</div><div class='add'>+{</div><div class='add'>+	struct vsc73xx_fdb fdb[VSC73XX_NUM_BUCKETS];</div><div class='add'>+	u16 hash = vsc73xx_calc_hash(addr, vid);</div><div class='add'>+	int bucket, ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;vsc-&gt;fdb_lock);</div><div class='add'>+</div><div class='add'>+	ret = vsc73xx_port_read_mac_table_row(vsc, hash, fdb);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	for (bucket = 0; bucket &lt; VSC73XX_NUM_BUCKETS; bucket++) {</div><div class='add'>+		if (fdb[bucket].valid &amp;&amp; fdb[bucket].port == port &amp;&amp;</div><div class='add'>+		    ether_addr_equal(addr, fdb[bucket].mac))</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (bucket == VSC73XX_NUM_BUCKETS) {</div><div class='add'>+		/* Can't find MAC in MAC table */</div><div class='add'>+		ret = -ENODATA;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = vsc73xx_fdb_operation(vsc, addr, vid, hash,</div><div class='add'>+				    VSC73XX_MACACCESS_CMD_MASK,</div><div class='add'>+				    VSC73XX_MACACCESS_CMD_FORGET);</div><div class='add'>+err:</div><div class='add'>+	mutex_unlock(&amp;vsc-&gt;fdb_lock);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc73xx_fdb_add_entry(struct vsc73xx *vsc, int port,</div><div class='add'>+				 const unsigned char *addr, u16 vid)</div><div class='add'>+{</div><div class='add'>+	struct vsc73xx_fdb fdb[VSC73XX_NUM_BUCKETS];</div><div class='add'>+	u16 hash = vsc73xx_calc_hash(addr, vid);</div><div class='add'>+	int bucket, ret;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;vsc-&gt;fdb_lock);</div><div class='add'>+</div><div class='add'>+	ret = vsc73xx_port_read_mac_table_row(vsc, hash, fdb);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	for (bucket = 0; bucket &lt; VSC73XX_NUM_BUCKETS; bucket++) {</div><div class='add'>+		if (!fdb[bucket].valid)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (bucket == VSC73XX_NUM_BUCKETS) {</div><div class='add'>+		/* Bucket is full */</div><div class='add'>+		ret = -EOVERFLOW;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	val = VSC73XX_MACACCESS_VALID | VSC73XX_MACACCESS_LOCKED |</div><div class='add'>+	      FIELD_PREP(VSC73XX_MACACCESS_DEST_IDX_MASK, port) |</div><div class='add'>+	      VSC73XX_MACACCESS_CMD_LEARN;</div><div class='add'>+	ret = vsc73xx_fdb_operation(vsc, addr, vid, hash,</div><div class='add'>+				    VSC73XX_MACACCESS_VALID |</div><div class='add'>+				    VSC73XX_MACACCESS_LOCKED |</div><div class='add'>+				    VSC73XX_MACACCESS_DEST_IDX_MASK |</div><div class='add'>+				    VSC73XX_MACACCESS_CMD_MASK, val);</div><div class='add'>+err:</div><div class='add'>+	mutex_unlock(&amp;vsc-&gt;fdb_lock);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc73xx_fdb_add(struct dsa_switch *ds, int port,</div><div class='add'>+			   const unsigned char *addr, u16 vid, struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct vsc73xx *vsc = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (!vid) {</div><div class='add'>+		switch (db.type) {</div><div class='add'>+		case DSA_DB_PORT:</div><div class='add'>+			vid = dsa_tag_8021q_standalone_vid(db.dp);</div><div class='add'>+			break;</div><div class='add'>+		case DSA_DB_BRIDGE:</div><div class='add'>+			vid = dsa_tag_8021q_bridge_vid(db.bridge.num);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return vsc73xx_fdb_add_entry(vsc, port, addr, vid);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc73xx_fdb_del(struct dsa_switch *ds, int port,</div><div class='add'>+			   const unsigned char *addr, u16 vid, struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct vsc73xx *vsc = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	if (!vid) {</div><div class='add'>+		switch (db.type) {</div><div class='add'>+		case DSA_DB_PORT:</div><div class='add'>+			vid = dsa_tag_8021q_standalone_vid(db.dp);</div><div class='add'>+			break;</div><div class='add'>+		case DSA_DB_BRIDGE:</div><div class='add'>+			vid = dsa_tag_8021q_bridge_vid(db.bridge.num);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return vsc73xx_fdb_del_entry(vsc, port, addr, vid);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc73xx_port_fdb_dump(struct dsa_switch *ds,</div><div class='add'>+				 int port, dsa_fdb_dump_cb_t *cb, void *data)</div><div class='add'>+{</div><div class='add'>+	struct vsc73xx_fdb fdb[VSC73XX_NUM_BUCKETS];</div><div class='add'>+	struct vsc73xx *vsc = ds-&gt;priv;</div><div class='add'>+	u16 i, bucket;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;vsc-&gt;fdb_lock);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; VSC73XX_NUM_FDB_ROWS; i++) {</div><div class='add'>+		err = vsc73xx_port_read_mac_table_row(vsc, i, fdb);</div><div class='add'>+		if (err)</div><div class='add'>+			goto unlock;</div><div class='add'>+</div><div class='add'>+		for (bucket = 0; bucket &lt; VSC73XX_NUM_BUCKETS; bucket++) {</div><div class='add'>+			if (!fdb[bucket].valid || fdb[bucket].port != port)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			/* We need to hide dsa_8021q VLANs from the user */</div><div class='add'>+			if (vid_is_dsa_8021q(fdb[bucket].vid))</div><div class='add'>+				fdb[bucket].vid = 0;</div><div class='add'>+</div><div class='add'>+			err = cb(fdb[bucket].mac, fdb[bucket].vid, false, data);</div><div class='add'>+			if (err)</div><div class='add'>+				goto unlock;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+unlock:</div><div class='add'>+	mutex_unlock(&amp;vsc-&gt;fdb_lock);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct phylink_mac_ops vsc73xx_phylink_mac_ops = {</div><div class='add'>+	.mac_config = vsc73xx_mac_config,</div><div class='add'>+	.mac_link_down = vsc73xx_mac_link_down,</div><div class='add'>+	.mac_link_up = vsc73xx_mac_link_up,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct dsa_switch_ops vsc73xx_ds_ops = {</div><div class='add'>+	.get_tag_protocol = vsc73xx_get_tag_protocol,</div><div class='add'>+	.setup = vsc73xx_setup,</div><div class='add'>+	.teardown = vsc73xx_teardown,</div><div class='add'>+	.phy_read = vsc73xx_phy_read,</div><div class='add'>+	.phy_write = vsc73xx_phy_write,</div><div class='add'>+	.get_strings = vsc73xx_get_strings,</div><div class='add'>+	.get_ethtool_stats = vsc73xx_get_ethtool_stats,</div><div class='add'>+	.get_sset_count = vsc73xx_get_sset_count,</div><div class='add'>+	.port_enable = vsc73xx_port_enable,</div><div class='add'>+	.port_disable = vsc73xx_port_disable,</div><div class='add'>+	.port_pre_bridge_flags = vsc73xx_port_pre_bridge_flags,</div><div class='add'>+	.port_bridge_flags = vsc73xx_port_bridge_flags,</div><div class='add'>+	.port_bridge_join = dsa_tag_8021q_bridge_join,</div><div class='add'>+	.port_bridge_leave = dsa_tag_8021q_bridge_leave,</div><div class='add'>+	.port_change_mtu = vsc73xx_change_mtu,</div><div class='add'>+	.port_fdb_add = vsc73xx_fdb_add,</div><div class='add'>+	.port_fdb_del = vsc73xx_fdb_del,</div><div class='add'>+	.port_fdb_dump = vsc73xx_port_fdb_dump,</div><div class='add'>+	.port_max_mtu = vsc73xx_get_max_mtu,</div><div class='add'>+	.port_stp_state_set = vsc73xx_port_stp_state_set,</div><div class='add'>+	.port_vlan_filtering = vsc73xx_port_vlan_filtering,</div><div class='add'>+	.port_vlan_add = vsc73xx_port_vlan_add,</div><div class='add'>+	.port_vlan_del = vsc73xx_port_vlan_del,</div><div class='add'>+	.phylink_get_caps = vsc73xx_phylink_get_caps,</div><div class='add'>+	.tag_8021q_vlan_add = vsc73xx_tag_8021q_vlan_add,</div><div class='add'>+	.tag_8021q_vlan_del = vsc73xx_tag_8021q_vlan_del,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int vsc73xx_gpio_get(struct gpio_chip *chip, unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	struct vsc73xx *vsc = gpiochip_get_data(chip);</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = vsc73xx_read(vsc, VSC73XX_BLOCK_SYSTEM, 0,</div><div class='add'>+			   VSC73XX_GPIO, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return !!(val &amp; BIT(offset));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc73xx_gpio_set(struct gpio_chip *chip, unsigned int offset,</div><div class='add'>+			    int val)</div><div class='add'>+{</div><div class='add'>+	struct vsc73xx *vsc = gpiochip_get_data(chip);</div><div class='add'>+	u32 tmp = val ? BIT(offset) : 0;</div><div class='add'>+</div><div class='add'>+	return vsc73xx_update_bits(vsc, VSC73XX_BLOCK_SYSTEM, 0,</div><div class='add'>+				   VSC73XX_GPIO, BIT(offset), tmp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc73xx_gpio_direction_output(struct gpio_chip *chip,</div><div class='add'>+					 unsigned int offset, int val)</div><div class='add'>+{</div><div class='add'>+	struct vsc73xx *vsc = gpiochip_get_data(chip);</div><div class='add'>+	u32 tmp = val ? BIT(offset) : 0;</div><div class='add'>+</div><div class='add'>+	return vsc73xx_update_bits(vsc, VSC73XX_BLOCK_SYSTEM, 0,</div><div class='add'>+				   VSC73XX_GPIO, BIT(offset + 4) | BIT(offset),</div><div class='add'>+				   BIT(offset + 4) | tmp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc73xx_gpio_direction_input(struct gpio_chip *chip,</div><div class='add'>+					unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	struct vsc73xx *vsc = gpiochip_get_data(chip);</div><div class='add'>+</div><div class='add'>+	return  vsc73xx_update_bits(vsc, VSC73XX_BLOCK_SYSTEM, 0,</div><div class='add'>+				    VSC73XX_GPIO, BIT(offset + 4),</div><div class='add'>+				    0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc73xx_gpio_get_direction(struct gpio_chip *chip,</div><div class='add'>+				      unsigned int offset)</div><div class='add'>+{</div><div class='add'>+	struct vsc73xx *vsc = gpiochip_get_data(chip);</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = vsc73xx_read(vsc, VSC73XX_BLOCK_SYSTEM, 0,</div><div class='add'>+			   VSC73XX_GPIO, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return !(val &amp; BIT(offset + 4));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc73xx_gpio_probe(struct vsc73xx *vsc)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	vsc-&gt;gc.label = devm_kasprintf(vsc-&gt;dev, GFP_KERNEL, "VSC%04x",</div><div class='add'>+				       vsc-&gt;chipid);</div><div class='add'>+	if (!vsc-&gt;gc.label)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	vsc-&gt;gc.ngpio = 4;</div><div class='add'>+	vsc-&gt;gc.owner = THIS_MODULE;</div><div class='add'>+	vsc-&gt;gc.parent = vsc-&gt;dev;</div><div class='add'>+	vsc-&gt;gc.base = -1;</div><div class='add'>+	vsc-&gt;gc.get = vsc73xx_gpio_get;</div><div class='add'>+	vsc-&gt;gc.set = vsc73xx_gpio_set;</div><div class='add'>+	vsc-&gt;gc.direction_input = vsc73xx_gpio_direction_input;</div><div class='add'>+	vsc-&gt;gc.direction_output = vsc73xx_gpio_direction_output;</div><div class='add'>+	vsc-&gt;gc.get_direction = vsc73xx_gpio_get_direction;</div><div class='add'>+	vsc-&gt;gc.can_sleep = true;</div><div class='add'>+	ret = devm_gpiochip_add_data(vsc-&gt;dev, &amp;vsc-&gt;gc, vsc);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(vsc-&gt;dev, "unable to register GPIO chip\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int vsc73xx_probe(struct vsc73xx *vsc)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = vsc-&gt;dev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Release reset, if any */</div><div class='add'>+	vsc-&gt;reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);</div><div class='add'>+	if (IS_ERR(vsc-&gt;reset)) {</div><div class='add'>+		dev_err(dev, "failed to get RESET GPIO\n");</div><div class='add'>+		return PTR_ERR(vsc-&gt;reset);</div><div class='add'>+	}</div><div class='add'>+	if (vsc-&gt;reset)</div><div class='add'>+		/* Wait 20ms according to datasheet table 245 */</div><div class='add'>+		msleep(20);</div><div class='add'>+</div><div class='add'>+	ret = vsc73xx_detect(vsc);</div><div class='add'>+	if (ret == -EAGAIN) {</div><div class='add'>+		dev_err(vsc-&gt;dev,</div><div class='add'>+			"Chip seems to be out of control. Assert reset and try again.\n");</div><div class='add'>+		gpiod_set_value_cansleep(vsc-&gt;reset, 1);</div><div class='add'>+		/* Reset pulse should be 20ns minimum, according to datasheet</div><div class='add'>+		 * table 245, so 10us should be fine</div><div class='add'>+		 */</div><div class='add'>+		usleep_range(10, 100);</div><div class='add'>+		gpiod_set_value_cansleep(vsc-&gt;reset, 0);</div><div class='add'>+		/* Wait 20ms according to datasheet table 245 */</div><div class='add'>+		msleep(20);</div><div class='add'>+		ret = vsc73xx_detect(vsc);</div><div class='add'>+	}</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "no chip found (%d)\n", ret);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;vsc-&gt;fdb_lock);</div><div class='add'>+</div><div class='add'>+	eth_random_addr(vsc-&gt;addr);</div><div class='add'>+	dev_info(vsc-&gt;dev,</div><div class='add'>+		 "MAC for control frames: %02X:%02X:%02X:%02X:%02X:%02X\n",</div><div class='add'>+		 vsc-&gt;addr[0], vsc-&gt;addr[1], vsc-&gt;addr[2],</div><div class='add'>+		 vsc-&gt;addr[3], vsc-&gt;addr[4], vsc-&gt;addr[5]);</div><div class='add'>+</div><div class='add'>+	vsc-&gt;ds = devm_kzalloc(dev, sizeof(*vsc-&gt;ds), GFP_KERNEL);</div><div class='add'>+	if (!vsc-&gt;ds)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	vsc-&gt;ds-&gt;dev = dev;</div><div class='add'>+	vsc-&gt;ds-&gt;num_ports = VSC73XX_MAX_NUM_PORTS;</div><div class='add'>+	vsc-&gt;ds-&gt;priv = vsc;</div><div class='add'>+</div><div class='add'>+	vsc-&gt;ds-&gt;ops = &amp;vsc73xx_ds_ops;</div><div class='add'>+	vsc-&gt;ds-&gt;phylink_mac_ops = &amp;vsc73xx_phylink_mac_ops;</div><div class='add'>+	ret = dsa_register_switch(vsc-&gt;ds);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "unable to register switch (%d)\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = vsc73xx_gpio_probe(vsc);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dsa_unregister_switch(vsc-&gt;ds);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(vsc73xx_probe);</div><div class='add'>+</div><div class='add'>+void vsc73xx_remove(struct vsc73xx *vsc)</div><div class='add'>+{</div><div class='add'>+	dsa_unregister_switch(vsc-&gt;ds);</div><div class='add'>+	gpiod_set_value(vsc-&gt;reset, 1);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(vsc73xx_remove);</div><div class='add'>+</div><div class='add'>+void vsc73xx_shutdown(struct vsc73xx *vsc)</div><div class='add'>+{</div><div class='add'>+	dsa_switch_shutdown(vsc-&gt;ds);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(vsc73xx_shutdown);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Linus Walleij &lt;linus.walleij@linaro.org&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Vitesse VSC7385/7388/7395/7398 driver");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/net/dsa/vitesse-vsc73xx-platform.c b/drivers/net/dsa/vitesse-vsc73xx-platform.c<br/>new file mode 100644<br/>index 000000000000..7a2e0a619b85<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/vitesse-vsc73xx-platform.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/vitesse-vsc73xx-platform.c</a></div><div class='hunk'>@@ -0,0 +1,172 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* DSA driver for:</div><div class='add'>+ * Vitesse VSC7385 SparX-G5 5+1-port Integrated Gigabit Ethernet Switch</div><div class='add'>+ * Vitesse VSC7388 SparX-G8 8-port Integrated Gigabit Ethernet Switch</div><div class='add'>+ * Vitesse VSC7395 SparX-G5e 5+1-port Integrated Gigabit Ethernet Switch</div><div class='add'>+ * Vitesse VSC7398 SparX-G8e 8-port Integrated Gigabit Ethernet Switch</div><div class='add'>+ *</div><div class='add'>+ * This driver takes control of the switch chip connected over CPU-attached</div><div class='add'>+ * address bus and configures it to route packages around when connected to</div><div class='add'>+ * a CPU port.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2019 Pawel Dembicki &lt;paweldembicki@gmail.com&gt;</div><div class='add'>+ * Based on vitesse-vsc-spi.c by:</div><div class='add'>+ * Copyright (C) 2018 Linus Wallej &lt;linus.walleij@linaro.org&gt;</div><div class='add'>+ * Includes portions of code from the firmware uploader by:</div><div class='add'>+ * Copyright (C) 2009 Gabor Juhos &lt;juhosg@openwrt.org&gt;</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+</div><div class='add'>+#include "vitesse-vsc73xx.h"</div><div class='add'>+</div><div class='add'>+#define VSC73XX_CMD_PLATFORM_BLOCK_SHIFT		14</div><div class='add'>+#define VSC73XX_CMD_PLATFORM_BLOCK_MASK			0x7</div><div class='add'>+#define VSC73XX_CMD_PLATFORM_SUBBLOCK_SHIFT		10</div><div class='add'>+#define VSC73XX_CMD_PLATFORM_SUBBLOCK_MASK		0xf</div><div class='add'>+#define VSC73XX_CMD_PLATFORM_REGISTER_SHIFT		2</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * struct vsc73xx_platform - VSC73xx Platform state container</div><div class='add'>+ */</div><div class='add'>+struct vsc73xx_platform {</div><div class='add'>+	struct platform_device	*pdev;</div><div class='add'>+	void __iomem		*base_addr;</div><div class='add'>+	struct vsc73xx		vsc;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vsc73xx_ops vsc73xx_platform_ops;</div><div class='add'>+</div><div class='add'>+static u32 vsc73xx_make_addr(u8 block, u8 subblock, u8 reg)</div><div class='add'>+{</div><div class='add'>+	u32 ret;</div><div class='add'>+</div><div class='add'>+	ret = (block &amp; VSC73XX_CMD_PLATFORM_BLOCK_MASK)</div><div class='add'>+	    &lt;&lt; VSC73XX_CMD_PLATFORM_BLOCK_SHIFT;</div><div class='add'>+	ret |= (subblock &amp; VSC73XX_CMD_PLATFORM_SUBBLOCK_MASK)</div><div class='add'>+	    &lt;&lt; VSC73XX_CMD_PLATFORM_SUBBLOCK_SHIFT;</div><div class='add'>+	ret |= reg &lt;&lt; VSC73XX_CMD_PLATFORM_REGISTER_SHIFT;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc73xx_platform_read(struct vsc73xx *vsc, u8 block, u8 subblock,</div><div class='add'>+				 u8 reg, u32 *val)</div><div class='add'>+{</div><div class='add'>+	struct vsc73xx_platform *vsc_platform = vsc-&gt;priv;</div><div class='add'>+	u32 offset;</div><div class='add'>+</div><div class='add'>+	if (!vsc73xx_is_addr_valid(block, subblock))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	offset = vsc73xx_make_addr(block, subblock, reg);</div><div class='add'>+	/* By default vsc73xx running in big-endian mode.</div><div class='add'>+	 * (See "Register Addressing" section 5.5.3 in the VSC7385 manual.)</div><div class='add'>+	 */</div><div class='add'>+	*val = ioread32be(vsc_platform-&gt;base_addr + offset);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc73xx_platform_write(struct vsc73xx *vsc, u8 block, u8 subblock,</div><div class='add'>+				  u8 reg, u32 val)</div><div class='add'>+{</div><div class='add'>+	struct vsc73xx_platform *vsc_platform = vsc-&gt;priv;</div><div class='add'>+	u32 offset;</div><div class='add'>+</div><div class='add'>+	if (!vsc73xx_is_addr_valid(block, subblock))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	offset = vsc73xx_make_addr(block, subblock, reg);</div><div class='add'>+	iowrite32be(val, vsc_platform-&gt;base_addr + offset);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc73xx_platform_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct vsc73xx_platform *vsc_platform;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	vsc_platform = devm_kzalloc(dev, sizeof(*vsc_platform), GFP_KERNEL);</div><div class='add'>+	if (!vsc_platform)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, vsc_platform);</div><div class='add'>+	vsc_platform-&gt;pdev = pdev;</div><div class='add'>+	vsc_platform-&gt;vsc.dev = dev;</div><div class='add'>+	vsc_platform-&gt;vsc.priv = vsc_platform;</div><div class='add'>+	vsc_platform-&gt;vsc.ops = &amp;vsc73xx_platform_ops;</div><div class='add'>+</div><div class='add'>+	/* obtain I/O memory space */</div><div class='add'>+	vsc_platform-&gt;base_addr = devm_platform_ioremap_resource(pdev, 0);</div><div class='add'>+	if (IS_ERR(vsc_platform-&gt;base_addr)) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "cannot request I/O memory space\n");</div><div class='add'>+		ret = -ENXIO;</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return vsc73xx_probe(&amp;vsc_platform-&gt;vsc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vsc73xx_platform_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct vsc73xx_platform *vsc_platform = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	if (!vsc_platform)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vsc73xx_remove(&amp;vsc_platform-&gt;vsc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vsc73xx_platform_shutdown(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct vsc73xx_platform *vsc_platform = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	if (!vsc_platform)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vsc73xx_shutdown(&amp;vsc_platform-&gt;vsc);</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct vsc73xx_ops vsc73xx_platform_ops = {</div><div class='add'>+	.read = vsc73xx_platform_read,</div><div class='add'>+	.write = vsc73xx_platform_write,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct of_device_id vsc73xx_of_match[] = {</div><div class='add'>+	{</div><div class='add'>+		.compatible = "vitesse,vsc7385",</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "vitesse,vsc7388",</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "vitesse,vsc7395",</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "vitesse,vsc7398",</div><div class='add'>+	},</div><div class='add'>+	{ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, vsc73xx_of_match);</div><div class='add'>+</div><div class='add'>+static struct platform_driver vsc73xx_platform_driver = {</div><div class='add'>+	.probe = vsc73xx_platform_probe,</div><div class='add'>+	.remove = vsc73xx_platform_remove,</div><div class='add'>+	.shutdown = vsc73xx_platform_shutdown,</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "vsc73xx-platform",</div><div class='add'>+		.of_match_table = vsc73xx_of_match,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+module_platform_driver(vsc73xx_platform_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Pawel Dembicki &lt;paweldembicki@gmail.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Vitesse VSC7385/7388/7395/7398 Platform driver");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/net/dsa/vitesse-vsc73xx-spi.c b/drivers/net/dsa/vitesse-vsc73xx-spi.c<br/>new file mode 100644<br/>index 000000000000..85b9a0f51dd8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/vitesse-vsc73xx-spi.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/vitesse-vsc73xx-spi.c</a></div><div class='hunk'>@@ -0,0 +1,229 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* DSA driver for:</div><div class='add'>+ * Vitesse VSC7385 SparX-G5 5+1-port Integrated Gigabit Ethernet Switch</div><div class='add'>+ * Vitesse VSC7388 SparX-G8 8-port Integrated Gigabit Ethernet Switch</div><div class='add'>+ * Vitesse VSC7395 SparX-G5e 5+1-port Integrated Gigabit Ethernet Switch</div><div class='add'>+ * Vitesse VSC7398 SparX-G8e 8-port Integrated Gigabit Ethernet Switch</div><div class='add'>+ *</div><div class='add'>+ * This driver takes control of the switch chip over SPI and</div><div class='add'>+ * configures it to route packages around when connected to a CPU port.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2018 Linus Wallej &lt;linus.walleij@linaro.org&gt;</div><div class='add'>+ * Includes portions of code from the firmware uploader by:</div><div class='add'>+ * Copyright (C) 2009 Gabor Juhos &lt;juhosg@openwrt.org&gt;</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/spi/spi.h&gt;</div><div class='add'>+</div><div class='add'>+#include "vitesse-vsc73xx.h"</div><div class='add'>+</div><div class='add'>+#define VSC73XX_CMD_SPI_MODE_READ		0</div><div class='add'>+#define VSC73XX_CMD_SPI_MODE_WRITE		1</div><div class='add'>+#define VSC73XX_CMD_SPI_MODE_SHIFT		4</div><div class='add'>+#define VSC73XX_CMD_SPI_BLOCK_SHIFT		5</div><div class='add'>+#define VSC73XX_CMD_SPI_BLOCK_MASK		0x7</div><div class='add'>+#define VSC73XX_CMD_SPI_SUBBLOCK_MASK		0xf</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * struct vsc73xx_spi - VSC73xx SPI state container</div><div class='add'>+ */</div><div class='add'>+struct vsc73xx_spi {</div><div class='add'>+	struct spi_device	*spi;</div><div class='add'>+	struct mutex		lock; /* Protects SPI traffic */</div><div class='add'>+	struct vsc73xx		vsc;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct vsc73xx_ops vsc73xx_spi_ops;</div><div class='add'>+</div><div class='add'>+static u8 vsc73xx_make_addr(u8 mode, u8 block, u8 subblock)</div><div class='add'>+{</div><div class='add'>+	u8 ret;</div><div class='add'>+</div><div class='add'>+	ret =</div><div class='add'>+	    (block &amp; VSC73XX_CMD_SPI_BLOCK_MASK) &lt;&lt; VSC73XX_CMD_SPI_BLOCK_SHIFT;</div><div class='add'>+	ret |= (mode &amp; 1) &lt;&lt; VSC73XX_CMD_SPI_MODE_SHIFT;</div><div class='add'>+	ret |= subblock &amp; VSC73XX_CMD_SPI_SUBBLOCK_MASK;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc73xx_spi_read(struct vsc73xx *vsc, u8 block, u8 subblock, u8 reg,</div><div class='add'>+			    u32 *val)</div><div class='add'>+{</div><div class='add'>+	struct vsc73xx_spi *vsc_spi = vsc-&gt;priv;</div><div class='add'>+	struct spi_transfer t[2];</div><div class='add'>+	struct spi_message m;</div><div class='add'>+	u8 cmd[4];</div><div class='add'>+	u8 buf[4];</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!vsc73xx_is_addr_valid(block, subblock))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	spi_message_init(&amp;m);</div><div class='add'>+</div><div class='add'>+	memset(&amp;t, 0, sizeof(t));</div><div class='add'>+</div><div class='add'>+	t[0].tx_buf = cmd;</div><div class='add'>+	t[0].len = sizeof(cmd);</div><div class='add'>+	spi_message_add_tail(&amp;t[0], &amp;m);</div><div class='add'>+</div><div class='add'>+	t[1].rx_buf = buf;</div><div class='add'>+	t[1].len = sizeof(buf);</div><div class='add'>+	spi_message_add_tail(&amp;t[1], &amp;m);</div><div class='add'>+</div><div class='add'>+	cmd[0] = vsc73xx_make_addr(VSC73XX_CMD_SPI_MODE_READ, block, subblock);</div><div class='add'>+	cmd[1] = reg;</div><div class='add'>+	cmd[2] = 0;</div><div class='add'>+	cmd[3] = 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;vsc_spi-&gt;lock);</div><div class='add'>+	ret = spi_sync(vsc_spi-&gt;spi, &amp;m);</div><div class='add'>+	mutex_unlock(&amp;vsc_spi-&gt;lock);</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	*val = (buf[0] &lt;&lt; 24) | (buf[1] &lt;&lt; 16) | (buf[2] &lt;&lt; 8) | buf[3];</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc73xx_spi_write(struct vsc73xx *vsc, u8 block, u8 subblock, u8 reg,</div><div class='add'>+			     u32 val)</div><div class='add'>+{</div><div class='add'>+	struct vsc73xx_spi *vsc_spi = vsc-&gt;priv;</div><div class='add'>+	struct spi_transfer t[2];</div><div class='add'>+	struct spi_message m;</div><div class='add'>+	u8 cmd[2];</div><div class='add'>+	u8 buf[4];</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!vsc73xx_is_addr_valid(block, subblock))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	spi_message_init(&amp;m);</div><div class='add'>+</div><div class='add'>+	memset(&amp;t, 0, sizeof(t));</div><div class='add'>+</div><div class='add'>+	t[0].tx_buf = cmd;</div><div class='add'>+	t[0].len = sizeof(cmd);</div><div class='add'>+	spi_message_add_tail(&amp;t[0], &amp;m);</div><div class='add'>+</div><div class='add'>+	t[1].tx_buf = buf;</div><div class='add'>+	t[1].len = sizeof(buf);</div><div class='add'>+	spi_message_add_tail(&amp;t[1], &amp;m);</div><div class='add'>+</div><div class='add'>+	cmd[0] = vsc73xx_make_addr(VSC73XX_CMD_SPI_MODE_WRITE, block, subblock);</div><div class='add'>+	cmd[1] = reg;</div><div class='add'>+</div><div class='add'>+	buf[0] = (val &gt;&gt; 24) &amp; 0xff;</div><div class='add'>+	buf[1] = (val &gt;&gt; 16) &amp; 0xff;</div><div class='add'>+	buf[2] = (val &gt;&gt; 8) &amp; 0xff;</div><div class='add'>+	buf[3] = val &amp; 0xff;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;vsc_spi-&gt;lock);</div><div class='add'>+	ret = spi_sync(vsc_spi-&gt;spi, &amp;m);</div><div class='add'>+	mutex_unlock(&amp;vsc_spi-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int vsc73xx_spi_probe(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;spi-&gt;dev;</div><div class='add'>+	struct vsc73xx_spi *vsc_spi;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	vsc_spi = devm_kzalloc(dev, sizeof(*vsc_spi), GFP_KERNEL);</div><div class='add'>+	if (!vsc_spi)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	spi_set_drvdata(spi, vsc_spi);</div><div class='add'>+	vsc_spi-&gt;spi = spi_dev_get(spi);</div><div class='add'>+	vsc_spi-&gt;vsc.dev = dev;</div><div class='add'>+	vsc_spi-&gt;vsc.priv = vsc_spi;</div><div class='add'>+	vsc_spi-&gt;vsc.ops = &amp;vsc73xx_spi_ops;</div><div class='add'>+	mutex_init(&amp;vsc_spi-&gt;lock);</div><div class='add'>+</div><div class='add'>+	spi-&gt;mode = SPI_MODE_0;</div><div class='add'>+	spi-&gt;bits_per_word = 8;</div><div class='add'>+	ret = spi_setup(spi);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(dev, "spi setup failed.\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return vsc73xx_probe(&amp;vsc_spi-&gt;vsc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vsc73xx_spi_remove(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+	struct vsc73xx_spi *vsc_spi = spi_get_drvdata(spi);</div><div class='add'>+</div><div class='add'>+	if (!vsc_spi)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vsc73xx_remove(&amp;vsc_spi-&gt;vsc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void vsc73xx_spi_shutdown(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+	struct vsc73xx_spi *vsc_spi = spi_get_drvdata(spi);</div><div class='add'>+</div><div class='add'>+	if (!vsc_spi)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	vsc73xx_shutdown(&amp;vsc_spi-&gt;vsc);</div><div class='add'>+</div><div class='add'>+	spi_set_drvdata(spi, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct vsc73xx_ops vsc73xx_spi_ops = {</div><div class='add'>+	.read = vsc73xx_spi_read,</div><div class='add'>+	.write = vsc73xx_spi_write,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct of_device_id vsc73xx_of_match[] = {</div><div class='add'>+	{</div><div class='add'>+		.compatible = "vitesse,vsc7385",</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "vitesse,vsc7388",</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "vitesse,vsc7395",</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.compatible = "vitesse,vsc7398",</div><div class='add'>+	},</div><div class='add'>+	{ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, vsc73xx_of_match);</div><div class='add'>+</div><div class='add'>+static const struct spi_device_id vsc73xx_spi_ids[] = {</div><div class='add'>+	{ "vsc7385" },</div><div class='add'>+	{ "vsc7388" },</div><div class='add'>+	{ "vsc7395" },</div><div class='add'>+	{ "vsc7398" },</div><div class='add'>+	{ },</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(spi, vsc73xx_spi_ids);</div><div class='add'>+</div><div class='add'>+static struct spi_driver vsc73xx_spi_driver = {</div><div class='add'>+	.probe = vsc73xx_spi_probe,</div><div class='add'>+	.remove = vsc73xx_spi_remove,</div><div class='add'>+	.shutdown = vsc73xx_spi_shutdown,</div><div class='add'>+	.id_table = vsc73xx_spi_ids,</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "vsc73xx-spi",</div><div class='add'>+		.of_match_table = vsc73xx_of_match,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+module_spi_driver(vsc73xx_spi_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Linus Walleij &lt;linus.walleij@linaro.org&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Vitesse VSC7385/7388/7395/7398 SPI driver");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/net/dsa/vitesse-vsc73xx.h b/drivers/net/dsa/vitesse-vsc73xx.h<br/>new file mode 100644<br/>index 000000000000..3c30e143c14f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/vitesse-vsc73xx.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/vitesse-vsc73xx.h</a></div><div class='hunk'>@@ -0,0 +1,94 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/gpio/driver.h&gt;</div><div class='add'>+</div><div class='add'>+/* The VSC7395 switch chips have 5+1 ports which means 5 ordinary ports and</div><div class='add'>+ * a sixth CPU port facing the processor with an RGMII interface. These ports</div><div class='add'>+ * are numbered 0..4 and 6, so they leave a "hole" in the port map for port 5,</div><div class='add'>+ * which is invalid.</div><div class='add'>+ *</div><div class='add'>+ * The VSC7398 has 8 ports, port 7 is again the CPU port.</div><div class='add'>+ *</div><div class='add'>+ * We allocate 8 ports and avoid access to the nonexistent ports.</div><div class='add'>+ */</div><div class='add'>+#define VSC73XX_MAX_NUM_PORTS	8</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct vsc73xx_portinfo - port data structure: contains storage data</div><div class='add'>+ * @pvid_vlan_filtering: pvid vlan number used in vlan filtering mode</div><div class='add'>+ * @pvid_tag_8021q: pvid vlan number used in tag_8021q mode</div><div class='add'>+ * @pvid_vlan_filtering_configured: informs if port has configured pvid in vlan</div><div class='add'>+ *	filtering mode</div><div class='add'>+ * @pvid_tag_8021q_configured: imforms if port have configured pvid in tag_8021q</div><div class='add'>+ *	mode</div><div class='add'>+ */</div><div class='add'>+struct vsc73xx_portinfo {</div><div class='add'>+	u16		pvid_vlan_filtering;</div><div class='add'>+	u16		pvid_tag_8021q;</div><div class='add'>+	bool		pvid_vlan_filtering_configured;</div><div class='add'>+	bool		pvid_tag_8021q_configured;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct vsc73xx - VSC73xx state container: main data structure</div><div class='add'>+ * @dev: The device pointer</div><div class='add'>+ * @reset: The descriptor for the GPIO line tied to the reset pin</div><div class='add'>+ * @ds: Pointer to the DSA core structure</div><div class='add'>+ * @gc: Main structure of the GPIO controller</div><div class='add'>+ * @chipid: Storage for the Chip ID value read from the CHIPID register of the</div><div class='add'>+ *	switch</div><div class='add'>+ * @addr: MAC address used in flow control frames</div><div class='add'>+ * @ops: Structure with hardware-dependent operations</div><div class='add'>+ * @priv: Pointer to the configuration interface structure</div><div class='add'>+ * @portinfo: Storage table portinfo structructures</div><div class='add'>+ * @vlans: List of configured vlans. Contains port mask and untagged status of</div><div class='add'>+ *	every vlan configured in port vlan operation. It doesn't cover tag_8021q</div><div class='add'>+ *	vlans.</div><div class='add'>+ * @fdb_lock: Mutex protects fdb access</div><div class='add'>+ */</div><div class='add'>+struct vsc73xx {</div><div class='add'>+	struct device			*dev;</div><div class='add'>+	struct gpio_desc		*reset;</div><div class='add'>+	struct dsa_switch		*ds;</div><div class='add'>+	struct gpio_chip		gc;</div><div class='add'>+	u16				chipid;</div><div class='add'>+	u8				addr[ETH_ALEN];</div><div class='add'>+	const struct vsc73xx_ops	*ops;</div><div class='add'>+	void				*priv;</div><div class='add'>+	struct vsc73xx_portinfo		portinfo[VSC73XX_MAX_NUM_PORTS];</div><div class='add'>+	struct list_head		vlans;</div><div class='add'>+	struct mutex			fdb_lock;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct vsc73xx_ops - VSC73xx methods container</div><div class='add'>+ * @read: Method for register reading over the hardware-dependent interface</div><div class='add'>+ * @write: Method for register writing over the hardware-dependent interface</div><div class='add'>+ */</div><div class='add'>+struct vsc73xx_ops {</div><div class='add'>+	int (*read)(struct vsc73xx *vsc, u8 block, u8 subblock, u8 reg,</div><div class='add'>+		    u32 *val);</div><div class='add'>+	int (*write)(struct vsc73xx *vsc, u8 block, u8 subblock, u8 reg,</div><div class='add'>+		     u32 val);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct vsc73xx_bridge_vlan - VSC73xx driver structure which keeps vlan</div><div class='add'>+ *	database copy</div><div class='add'>+ * @vid: VLAN number</div><div class='add'>+ * @portmask: each bit represents one port</div><div class='add'>+ * @untagged: each bit represents one port configured with @vid untagged</div><div class='add'>+ * @list: list structure</div><div class='add'>+ */</div><div class='add'>+struct vsc73xx_bridge_vlan {</div><div class='add'>+	u16 vid;</div><div class='add'>+	u8 portmask;</div><div class='add'>+	u8 untagged;</div><div class='add'>+	struct list_head list;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int vsc73xx_is_addr_valid(u8 block, u8 subblock);</div><div class='add'>+int vsc73xx_probe(struct vsc73xx *vsc);</div><div class='add'>+void vsc73xx_remove(struct vsc73xx *vsc);</div><div class='add'>+void vsc73xx_shutdown(struct vsc73xx *vsc);</div><div class='head'>diff --git a/drivers/net/dsa/xrs700x/Kconfig b/drivers/net/dsa/xrs700x/Kconfig<br/>new file mode 100644<br/>index 000000000000..d10a4dce1676<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/xrs700x/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/xrs700x/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,26 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+config NET_DSA_XRS700X</div><div class='add'>+	tristate</div><div class='add'>+	depends on NET_DSA</div><div class='add'>+	select NET_DSA_TAG_XRS700X</div><div class='add'>+	select REGMAP</div><div class='add'>+	help</div><div class='add'>+	  This enables support for Arrow SpeedChips XRS7003/7004 gigabit</div><div class='add'>+	  Ethernet switches.</div><div class='add'>+</div><div class='add'>+config NET_DSA_XRS700X_I2C</div><div class='add'>+	tristate "Arrow XRS7000X series switch in I2C mode"</div><div class='add'>+	depends on NET_DSA &amp;&amp; I2C</div><div class='add'>+	select NET_DSA_XRS700X</div><div class='add'>+	select REGMAP_I2C</div><div class='add'>+	help</div><div class='add'>+	  Enable I2C support for Arrow SpeedChips XRS7003/7004 gigabit Ethernet</div><div class='add'>+	  switches.</div><div class='add'>+</div><div class='add'>+config NET_DSA_XRS700X_MDIO</div><div class='add'>+	tristate "Arrow XRS7000X series switch in MDIO mode"</div><div class='add'>+	depends on NET_DSA</div><div class='add'>+	select NET_DSA_XRS700X</div><div class='add'>+	help</div><div class='add'>+	  Enable MDIO support for Arrow SpeedChips XRS7003/7004 gigabit Ethernet</div><div class='add'>+	  switches.</div><div class='head'>diff --git a/drivers/net/dsa/xrs700x/Makefile b/drivers/net/dsa/xrs700x/Makefile<br/>new file mode 100644<br/>index 000000000000..51a3a7d9296a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/xrs700x/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/xrs700x/Makefile</a></div><div class='hunk'>@@ -0,0 +1,4 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+obj-$(CONFIG_NET_DSA_XRS700X) += xrs700x.o</div><div class='add'>+obj-$(CONFIG_NET_DSA_XRS700X_I2C) += xrs700x_i2c.o</div><div class='add'>+obj-$(CONFIG_NET_DSA_XRS700X_MDIO) += xrs700x_mdio.o</div><div class='head'>diff --git a/drivers/net/dsa/xrs700x/xrs700x.c b/drivers/net/dsa/xrs700x/xrs700x.c<br/>new file mode 100644<br/>index 000000000000..0a05f4156ef4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/xrs700x/xrs700x.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/xrs700x/xrs700x.c</a></div><div class='hunk'>@@ -0,0 +1,860 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2020 NovaTech LLC</div><div class='add'>+ * George McCollister &lt;george.mccollister@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/if_bridge.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/netdev_features.h&gt;</div><div class='add'>+#include &lt;linux/if_hsr.h&gt;</div><div class='add'>+#include "xrs700x.h"</div><div class='add'>+#include "xrs700x_reg.h"</div><div class='add'>+</div><div class='add'>+#define XRS700X_MIB_INTERVAL msecs_to_jiffies(3000)</div><div class='add'>+</div><div class='add'>+#define XRS7000X_SUPPORTED_HSR_FEATURES \</div><div class='add'>+	(NETIF_F_HW_HSR_TAG_INS | NETIF_F_HW_HSR_TAG_RM | \</div><div class='add'>+	 NETIF_F_HW_HSR_FWD | NETIF_F_HW_HSR_DUP)</div><div class='add'>+</div><div class='add'>+#define XRS7003E_ID	0x100</div><div class='add'>+#define XRS7003F_ID	0x101</div><div class='add'>+#define XRS7004E_ID	0x200</div><div class='add'>+#define XRS7004F_ID	0x201</div><div class='add'>+</div><div class='add'>+const struct xrs700x_info xrs7003e_info = {XRS7003E_ID, "XRS7003E", 3};</div><div class='add'>+EXPORT_SYMBOL(xrs7003e_info);</div><div class='add'>+</div><div class='add'>+const struct xrs700x_info xrs7003f_info = {XRS7003F_ID, "XRS7003F", 3};</div><div class='add'>+EXPORT_SYMBOL(xrs7003f_info);</div><div class='add'>+</div><div class='add'>+const struct xrs700x_info xrs7004e_info = {XRS7004E_ID, "XRS7004E", 4};</div><div class='add'>+EXPORT_SYMBOL(xrs7004e_info);</div><div class='add'>+</div><div class='add'>+const struct xrs700x_info xrs7004f_info = {XRS7004F_ID, "XRS7004F", 4};</div><div class='add'>+EXPORT_SYMBOL(xrs7004f_info);</div><div class='add'>+</div><div class='add'>+struct xrs700x_regfield {</div><div class='add'>+	struct reg_field rf;</div><div class='add'>+	struct regmap_field **rmf;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct xrs700x_mib {</div><div class='add'>+	unsigned int offset;</div><div class='add'>+	const char *name;</div><div class='add'>+	int stats64_offset;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define XRS700X_MIB_ETHTOOL_ONLY(o, n) {o, n, -1}</div><div class='add'>+#define XRS700X_MIB(o, n, m) {o, n, offsetof(struct rtnl_link_stats64, m)}</div><div class='add'>+</div><div class='add'>+static const struct xrs700x_mib xrs700x_mibs[] = {</div><div class='add'>+	XRS700X_MIB(XRS_RX_GOOD_OCTETS_L, "rx_good_octets", rx_bytes),</div><div class='add'>+	XRS700X_MIB_ETHTOOL_ONLY(XRS_RX_BAD_OCTETS_L, "rx_bad_octets"),</div><div class='add'>+	XRS700X_MIB(XRS_RX_UNICAST_L, "rx_unicast", rx_packets),</div><div class='add'>+	XRS700X_MIB(XRS_RX_BROADCAST_L, "rx_broadcast", rx_packets),</div><div class='add'>+	XRS700X_MIB(XRS_RX_MULTICAST_L, "rx_multicast", multicast),</div><div class='add'>+	XRS700X_MIB(XRS_RX_UNDERSIZE_L, "rx_undersize", rx_length_errors),</div><div class='add'>+	XRS700X_MIB(XRS_RX_FRAGMENTS_L, "rx_fragments", rx_length_errors),</div><div class='add'>+	XRS700X_MIB(XRS_RX_OVERSIZE_L, "rx_oversize", rx_length_errors),</div><div class='add'>+	XRS700X_MIB(XRS_RX_JABBER_L, "rx_jabber", rx_length_errors),</div><div class='add'>+	XRS700X_MIB(XRS_RX_ERR_L, "rx_err", rx_errors),</div><div class='add'>+	XRS700X_MIB(XRS_RX_CRC_L, "rx_crc", rx_crc_errors),</div><div class='add'>+	XRS700X_MIB_ETHTOOL_ONLY(XRS_RX_64_L, "rx_64"),</div><div class='add'>+	XRS700X_MIB_ETHTOOL_ONLY(XRS_RX_65_127_L, "rx_65_127"),</div><div class='add'>+	XRS700X_MIB_ETHTOOL_ONLY(XRS_RX_128_255_L, "rx_128_255"),</div><div class='add'>+	XRS700X_MIB_ETHTOOL_ONLY(XRS_RX_256_511_L, "rx_256_511"),</div><div class='add'>+	XRS700X_MIB_ETHTOOL_ONLY(XRS_RX_512_1023_L, "rx_512_1023"),</div><div class='add'>+	XRS700X_MIB_ETHTOOL_ONLY(XRS_RX_1024_1536_L, "rx_1024_1536"),</div><div class='add'>+	XRS700X_MIB_ETHTOOL_ONLY(XRS_RX_HSR_PRP_L, "rx_hsr_prp"),</div><div class='add'>+	XRS700X_MIB_ETHTOOL_ONLY(XRS_RX_WRONGLAN_L, "rx_wronglan"),</div><div class='add'>+	XRS700X_MIB_ETHTOOL_ONLY(XRS_RX_DUPLICATE_L, "rx_duplicate"),</div><div class='add'>+	XRS700X_MIB(XRS_TX_OCTETS_L, "tx_octets", tx_bytes),</div><div class='add'>+	XRS700X_MIB(XRS_TX_UNICAST_L, "tx_unicast", tx_packets),</div><div class='add'>+	XRS700X_MIB(XRS_TX_BROADCAST_L, "tx_broadcast", tx_packets),</div><div class='add'>+	XRS700X_MIB(XRS_TX_MULTICAST_L, "tx_multicast", tx_packets),</div><div class='add'>+	XRS700X_MIB_ETHTOOL_ONLY(XRS_TX_HSR_PRP_L, "tx_hsr_prp"),</div><div class='add'>+	XRS700X_MIB(XRS_PRIQ_DROP_L, "priq_drop", tx_dropped),</div><div class='add'>+	XRS700X_MIB(XRS_EARLY_DROP_L, "early_drop", tx_dropped),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u8 eth_hsrsup_addr[ETH_ALEN] = {</div><div class='add'>+	0x01, 0x15, 0x4e, 0x00, 0x01, 0x00};</div><div class='add'>+</div><div class='add'>+static void xrs700x_get_strings(struct dsa_switch *ds, int port,</div><div class='add'>+				u32 stringset, u8 *data)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (stringset != ETH_SS_STATS)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(xrs700x_mibs); i++)</div><div class='add'>+		ethtool_puts(&amp;data, xrs700x_mibs[i].name);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xrs700x_get_sset_count(struct dsa_switch *ds, int port, int sset)</div><div class='add'>+{</div><div class='add'>+	if (sset != ETH_SS_STATS)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return ARRAY_SIZE(xrs700x_mibs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xrs700x_read_port_counters(struct xrs700x *priv, int port)</div><div class='add'>+{</div><div class='add'>+	struct xrs700x_port *p = &amp;priv-&gt;ports[port];</div><div class='add'>+	struct rtnl_link_stats64 stats;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	memset(&amp;stats, 0, sizeof(stats));</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;p-&gt;mib_mutex);</div><div class='add'>+</div><div class='add'>+	/* Capture counter values */</div><div class='add'>+	regmap_write(priv-&gt;regmap, XRS_CNT_CTRL(port), 1);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(xrs700x_mibs); i++) {</div><div class='add'>+		unsigned int high = 0, low = 0, reg;</div><div class='add'>+</div><div class='add'>+		reg = xrs700x_mibs[i].offset + XRS_PORT_OFFSET * port;</div><div class='add'>+		regmap_read(priv-&gt;regmap, reg, &amp;low);</div><div class='add'>+		regmap_read(priv-&gt;regmap, reg + 2, &amp;high);</div><div class='add'>+</div><div class='add'>+		p-&gt;mib_data[i] += (high &lt;&lt; 16) | low;</div><div class='add'>+</div><div class='add'>+		if (xrs700x_mibs[i].stats64_offset &gt;= 0) {</div><div class='add'>+			u8 *s = (u8 *)&amp;stats + xrs700x_mibs[i].stats64_offset;</div><div class='add'>+			*(u64 *)s += p-&gt;mib_data[i];</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* multicast must be added to rx_packets (which already includes</div><div class='add'>+	 * unicast and broadcast)</div><div class='add'>+	 */</div><div class='add'>+	stats.rx_packets += stats.multicast;</div><div class='add'>+</div><div class='add'>+	flags = u64_stats_update_begin_irqsave(&amp;p-&gt;syncp);</div><div class='add'>+	p-&gt;stats64 = stats;</div><div class='add'>+	u64_stats_update_end_irqrestore(&amp;p-&gt;syncp, flags);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;p-&gt;mib_mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xrs700x_mib_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct xrs700x *priv = container_of(work, struct xrs700x,</div><div class='add'>+					    mib_work.work);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;ds-&gt;num_ports; i++)</div><div class='add'>+		xrs700x_read_port_counters(priv, i);</div><div class='add'>+</div><div class='add'>+	schedule_delayed_work(&amp;priv-&gt;mib_work, XRS700X_MIB_INTERVAL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xrs700x_get_ethtool_stats(struct dsa_switch *ds, int port,</div><div class='add'>+				      u64 *data)</div><div class='add'>+{</div><div class='add'>+	struct xrs700x *priv = ds-&gt;priv;</div><div class='add'>+	struct xrs700x_port *p = &amp;priv-&gt;ports[port];</div><div class='add'>+</div><div class='add'>+	xrs700x_read_port_counters(priv, port);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;p-&gt;mib_mutex);</div><div class='add'>+	memcpy(data, p-&gt;mib_data, sizeof(*data) * ARRAY_SIZE(xrs700x_mibs));</div><div class='add'>+	mutex_unlock(&amp;p-&gt;mib_mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xrs700x_get_stats64(struct dsa_switch *ds, int port,</div><div class='add'>+				struct rtnl_link_stats64 *s)</div><div class='add'>+{</div><div class='add'>+	struct xrs700x *priv = ds-&gt;priv;</div><div class='add'>+	struct xrs700x_port *p = &amp;priv-&gt;ports[port];</div><div class='add'>+	unsigned int start;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		start = u64_stats_fetch_begin(&amp;p-&gt;syncp);</div><div class='add'>+		*s = p-&gt;stats64;</div><div class='add'>+	} while (u64_stats_fetch_retry(&amp;p-&gt;syncp, start));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xrs700x_setup_regmap_range(struct xrs700x *priv)</div><div class='add'>+{</div><div class='add'>+	struct xrs700x_regfield regfields[] = {</div><div class='add'>+		{</div><div class='add'>+			.rf = REG_FIELD_ID(XRS_PORT_STATE(0), 0, 1,</div><div class='add'>+					   priv-&gt;ds-&gt;num_ports,</div><div class='add'>+					   XRS_PORT_OFFSET),</div><div class='add'>+			.rmf = &amp;priv-&gt;ps_forward</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			.rf = REG_FIELD_ID(XRS_PORT_STATE(0), 2, 3,</div><div class='add'>+					   priv-&gt;ds-&gt;num_ports,</div><div class='add'>+					   XRS_PORT_OFFSET),</div><div class='add'>+			.rmf = &amp;priv-&gt;ps_management</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			.rf = REG_FIELD_ID(XRS_PORT_STATE(0), 4, 9,</div><div class='add'>+					   priv-&gt;ds-&gt;num_ports,</div><div class='add'>+					   XRS_PORT_OFFSET),</div><div class='add'>+			.rmf = &amp;priv-&gt;ps_sel_speed</div><div class='add'>+		},</div><div class='add'>+		{</div><div class='add'>+			.rf = REG_FIELD_ID(XRS_PORT_STATE(0), 10, 11,</div><div class='add'>+					   priv-&gt;ds-&gt;num_ports,</div><div class='add'>+					   XRS_PORT_OFFSET),</div><div class='add'>+			.rmf = &amp;priv-&gt;ps_cur_speed</div><div class='add'>+		}</div><div class='add'>+	};</div><div class='add'>+	int i = 0;</div><div class='add'>+</div><div class='add'>+	for (; i &lt; ARRAY_SIZE(regfields); i++) {</div><div class='add'>+		*regfields[i].rmf = devm_regmap_field_alloc(priv-&gt;dev,</div><div class='add'>+							    priv-&gt;regmap,</div><div class='add'>+							    regfields[i].rf);</div><div class='add'>+		if (IS_ERR(*regfields[i].rmf))</div><div class='add'>+			return PTR_ERR(*regfields[i].rmf);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum dsa_tag_protocol xrs700x_get_tag_protocol(struct dsa_switch *ds,</div><div class='add'>+						      int port,</div><div class='add'>+						      enum dsa_tag_protocol m)</div><div class='add'>+{</div><div class='add'>+	return DSA_TAG_PROTO_XRS700X;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xrs700x_reset(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct xrs700x *priv = ds-&gt;priv;</div><div class='add'>+	unsigned int val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(priv-&gt;regmap, XRS_GENERAL, XRS_GENERAL_RESET);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	ret = regmap_read_poll_timeout(priv-&gt;regmap, XRS_GENERAL,</div><div class='add'>+				       val, !(val &amp; XRS_GENERAL_RESET),</div><div class='add'>+				       10, 1000);</div><div class='add'>+error:</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err_ratelimited(priv-&gt;dev, "error resetting switch: %d\n",</div><div class='add'>+				    ret);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xrs700x_port_stp_state_set(struct dsa_switch *ds, int port,</div><div class='add'>+				       u8 state)</div><div class='add'>+{</div><div class='add'>+	struct xrs700x *priv = ds-&gt;priv;</div><div class='add'>+	unsigned int bpdus = 1;</div><div class='add'>+	unsigned int val;</div><div class='add'>+</div><div class='add'>+	switch (state) {</div><div class='add'>+	case BR_STATE_DISABLED:</div><div class='add'>+		bpdus = 0;</div><div class='add'>+		fallthrough;</div><div class='add'>+	case BR_STATE_BLOCKING:</div><div class='add'>+	case BR_STATE_LISTENING:</div><div class='add'>+		val = XRS_PORT_DISABLED;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_LEARNING:</div><div class='add'>+		val = XRS_PORT_LEARNING;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_FORWARDING:</div><div class='add'>+		val = XRS_PORT_FORWARDING;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(ds-&gt;dev, "invalid STP state: %d\n", state);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	regmap_fields_write(priv-&gt;ps_forward, port, val);</div><div class='add'>+</div><div class='add'>+	/* Enable/disable inbound policy added by xrs700x_port_add_bpdu_ipf()</div><div class='add'>+	 * which allows BPDU forwarding to the CPU port when the front facing</div><div class='add'>+	 * port is in disabled/learning state.</div><div class='add'>+	 */</div><div class='add'>+	regmap_update_bits(priv-&gt;regmap, XRS_ETH_ADDR_CFG(port, 0), 1, bpdus);</div><div class='add'>+</div><div class='add'>+	dev_dbg_ratelimited(priv-&gt;dev, "%s - port: %d, state: %u, val: 0x%x\n",</div><div class='add'>+			    __func__, port, state, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Add an inbound policy filter which matches the BPDU destination MAC</div><div class='add'>+ * and forwards to the CPU port. Leave the policy disabled, it will be</div><div class='add'>+ * enabled as needed.</div><div class='add'>+ */</div><div class='add'>+static int xrs700x_port_add_bpdu_ipf(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct xrs700x *priv = ds-&gt;priv;</div><div class='add'>+	unsigned int val = 0;</div><div class='add'>+	int i = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Compare all 48 bits of the destination MAC address. */</div><div class='add'>+	ret = regmap_write(priv-&gt;regmap, XRS_ETH_ADDR_CFG(port, 0), 48 &lt;&lt; 2);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* match BPDU destination 01:80:c2:00:00:00 */</div><div class='add'>+	for (i = 0; i &lt; sizeof(eth_stp_addr); i += 2) {</div><div class='add'>+		ret = regmap_write(priv-&gt;regmap, XRS_ETH_ADDR_0(port, 0) + i,</div><div class='add'>+				   eth_stp_addr[i] |</div><div class='add'>+				   (eth_stp_addr[i + 1] &lt;&lt; 8));</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Mirror BPDU to CPU port */</div><div class='add'>+	for (i = 0; i &lt; ds-&gt;num_ports; i++) {</div><div class='add'>+		if (dsa_is_cpu_port(ds, i))</div><div class='add'>+			val |= BIT(i);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(priv-&gt;regmap, XRS_ETH_ADDR_FWD_MIRROR(port, 0), val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(priv-&gt;regmap, XRS_ETH_ADDR_FWD_ALLOW(port, 0), 0);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Add an inbound policy filter which matches the HSR/PRP supervision MAC</div><div class='add'>+ * range and forwards to the CPU port without discarding duplicates.</div><div class='add'>+ * This is required to correctly populate the HSR/PRP node_table.</div><div class='add'>+ * Leave the policy disabled, it will be enabled as needed.</div><div class='add'>+ */</div><div class='add'>+static int xrs700x_port_add_hsrsup_ipf(struct dsa_switch *ds, int port,</div><div class='add'>+				       int fwdport)</div><div class='add'>+{</div><div class='add'>+	struct xrs700x *priv = ds-&gt;priv;</div><div class='add'>+	unsigned int val = 0;</div><div class='add'>+	int i = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Compare 40 bits of the destination MAC address. */</div><div class='add'>+	ret = regmap_write(priv-&gt;regmap, XRS_ETH_ADDR_CFG(port, 1), 40 &lt;&lt; 2);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* match HSR/PRP supervision destination 01:15:4e:00:01:XX */</div><div class='add'>+	for (i = 0; i &lt; sizeof(eth_hsrsup_addr); i += 2) {</div><div class='add'>+		ret = regmap_write(priv-&gt;regmap, XRS_ETH_ADDR_0(port, 1) + i,</div><div class='add'>+				   eth_hsrsup_addr[i] |</div><div class='add'>+				   (eth_hsrsup_addr[i + 1] &lt;&lt; 8));</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Mirror HSR/PRP supervision to CPU port */</div><div class='add'>+	for (i = 0; i &lt; ds-&gt;num_ports; i++) {</div><div class='add'>+		if (dsa_is_cpu_port(ds, i))</div><div class='add'>+			val |= BIT(i);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = regmap_write(priv-&gt;regmap, XRS_ETH_ADDR_FWD_MIRROR(port, 1), val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (fwdport &gt;= 0)</div><div class='add'>+		val |= BIT(fwdport);</div><div class='add'>+</div><div class='add'>+	/* Allow must be set prevent duplicate discard */</div><div class='add'>+	ret = regmap_write(priv-&gt;regmap, XRS_ETH_ADDR_FWD_ALLOW(port, 1), val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xrs700x_port_setup(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	bool cpu_port = dsa_is_cpu_port(ds, port);</div><div class='add'>+	struct xrs700x *priv = ds-&gt;priv;</div><div class='add'>+	unsigned int val = 0;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	xrs700x_port_stp_state_set(ds, port, BR_STATE_DISABLED);</div><div class='add'>+</div><div class='add'>+	/* Disable forwarding to non-CPU ports */</div><div class='add'>+	for (i = 0; i &lt; ds-&gt;num_ports; i++) {</div><div class='add'>+		if (!dsa_is_cpu_port(ds, i))</div><div class='add'>+			val |= BIT(i);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* 1 = Disable forwarding to the port */</div><div class='add'>+	ret = regmap_write(priv-&gt;regmap, XRS_PORT_FWD_MASK(port), val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	val = cpu_port ? XRS_PORT_MODE_MANAGEMENT : XRS_PORT_MODE_NORMAL;</div><div class='add'>+	ret = regmap_fields_write(priv-&gt;ps_management, port, val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (!cpu_port) {</div><div class='add'>+		ret = xrs700x_port_add_bpdu_ipf(ds, port);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xrs700x_setup(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct xrs700x *priv = ds-&gt;priv;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	ret = xrs700x_reset(ds);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ds-&gt;num_ports; i++) {</div><div class='add'>+		ret = xrs700x_port_setup(ds, i);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	schedule_delayed_work(&amp;priv-&gt;mib_work, XRS700X_MIB_INTERVAL);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xrs700x_teardown(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct xrs700x *priv = ds-&gt;priv;</div><div class='add'>+</div><div class='add'>+	cancel_delayed_work_sync(&amp;priv-&gt;mib_work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xrs700x_phylink_get_caps(struct dsa_switch *ds, int port,</div><div class='add'>+				     struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	switch (port) {</div><div class='add'>+	case 0:</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_RMII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		config-&gt;mac_capabilities = MAC_10FD | MAC_100FD;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case 1:</div><div class='add'>+	case 2:</div><div class='add'>+	case 3:</div><div class='add'>+		phy_interface_set_rgmii(config-&gt;supported_interfaces);</div><div class='add'>+		config-&gt;mac_capabilities = MAC_10FD | MAC_100FD | MAC_1000FD;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		dev_err(ds-&gt;dev, "Unsupported port: %i\n", port);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xrs700x_mac_config(struct phylink_config *config, unsigned int mode,</div><div class='add'>+			       const struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xrs700x_mac_link_down(struct phylink_config *config,</div><div class='add'>+				  unsigned int mode, phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xrs700x_mac_link_up(struct phylink_config *config,</div><div class='add'>+				struct phy_device *phydev,</div><div class='add'>+				unsigned int mode, phy_interface_t interface,</div><div class='add'>+				int speed, int duplex,</div><div class='add'>+				bool tx_pause, bool rx_pause)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct xrs700x *priv = dp-&gt;ds-&gt;priv;</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+	unsigned int val;</div><div class='add'>+</div><div class='add'>+	switch (speed) {</div><div class='add'>+	case SPEED_1000:</div><div class='add'>+		val = XRS_PORT_SPEED_1000;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_100:</div><div class='add'>+		val = XRS_PORT_SPEED_100;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_10:</div><div class='add'>+		val = XRS_PORT_SPEED_10;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	regmap_fields_write(priv-&gt;ps_sel_speed, port, val);</div><div class='add'>+</div><div class='add'>+	dev_dbg_ratelimited(priv-&gt;dev, "%s: port: %d mode: %u speed: %u\n",</div><div class='add'>+			    __func__, port, mode, speed);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xrs700x_bridge_common(struct dsa_switch *ds, int port,</div><div class='add'>+				 struct dsa_bridge bridge, bool join)</div><div class='add'>+{</div><div class='add'>+	unsigned int i, cpu_mask = 0, mask = 0;</div><div class='add'>+	struct xrs700x *priv = ds-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ds-&gt;num_ports; i++) {</div><div class='add'>+		if (dsa_is_cpu_port(ds, i))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		cpu_mask |= BIT(i);</div><div class='add'>+</div><div class='add'>+		if (dsa_port_offloads_bridge(dsa_to_port(ds, i), &amp;bridge))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		mask |= BIT(i);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ds-&gt;num_ports; i++) {</div><div class='add'>+		if (!dsa_port_offloads_bridge(dsa_to_port(ds, i), &amp;bridge))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* 1 = Disable forwarding to the port */</div><div class='add'>+		ret = regmap_write(priv-&gt;regmap, XRS_PORT_FWD_MASK(i), mask);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!join) {</div><div class='add'>+		ret = regmap_write(priv-&gt;regmap, XRS_PORT_FWD_MASK(port),</div><div class='add'>+				   cpu_mask);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xrs700x_bridge_join(struct dsa_switch *ds, int port,</div><div class='add'>+			       struct dsa_bridge bridge, bool *tx_fwd_offload,</div><div class='add'>+			       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	return xrs700x_bridge_common(ds, port, bridge, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xrs700x_bridge_leave(struct dsa_switch *ds, int port,</div><div class='add'>+				 struct dsa_bridge bridge)</div><div class='add'>+{</div><div class='add'>+	xrs700x_bridge_common(ds, port, bridge, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xrs700x_hsr_join(struct dsa_switch *ds, int port,</div><div class='add'>+			    struct net_device *hsr,</div><div class='add'>+			    struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	unsigned int val = XRS_HSR_CFG_HSR_PRP;</div><div class='add'>+	struct dsa_port *partner = NULL, *dp;</div><div class='add'>+	struct xrs700x *priv = ds-&gt;priv;</div><div class='add'>+	struct net_device *user;</div><div class='add'>+	int ret, i, hsr_pair[2];</div><div class='add'>+	enum hsr_port_type type;</div><div class='add'>+	enum hsr_version ver;</div><div class='add'>+	bool fwd = false;</div><div class='add'>+</div><div class='add'>+	ret = hsr_get_version(hsr, &amp;ver);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (port != 1 &amp;&amp; port != 2) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Only ports 1 and 2 can offload HSR/PRP");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ver == HSR_V1) {</div><div class='add'>+		val |= XRS_HSR_CFG_HSR;</div><div class='add'>+	} else if (ver == PRP_V1) {</div><div class='add'>+		val |= XRS_HSR_CFG_PRP;</div><div class='add'>+	} else {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Only HSR v1 and PRP v1 can be offloaded");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = hsr_get_port_type(hsr, dsa_to_port(ds, port)-&gt;user, &amp;type);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (type != HSR_PT_SLAVE_A &amp;&amp; type != HSR_PT_SLAVE_B) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Only HSR slave ports can be offloaded");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dsa_hsr_foreach_port(dp, ds, hsr) {</div><div class='add'>+		if (dp-&gt;index != port) {</div><div class='add'>+			partner = dp;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* We can't enable redundancy on the switch until both</div><div class='add'>+	 * redundant ports have signed up.</div><div class='add'>+	 */</div><div class='add'>+	if (!partner)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	regmap_fields_write(priv-&gt;ps_forward, partner-&gt;index,</div><div class='add'>+			    XRS_PORT_DISABLED);</div><div class='add'>+	regmap_fields_write(priv-&gt;ps_forward, port, XRS_PORT_DISABLED);</div><div class='add'>+</div><div class='add'>+	regmap_write(priv-&gt;regmap, XRS_HSR_CFG(partner-&gt;index),</div><div class='add'>+		     val | XRS_HSR_CFG_LANID_A);</div><div class='add'>+	regmap_write(priv-&gt;regmap, XRS_HSR_CFG(port),</div><div class='add'>+		     val | XRS_HSR_CFG_LANID_B);</div><div class='add'>+</div><div class='add'>+	/* Clear bits for both redundant ports (HSR only) and the CPU port to</div><div class='add'>+	 * enable forwarding.</div><div class='add'>+	 */</div><div class='add'>+	val = GENMASK(ds-&gt;num_ports - 1, 0);</div><div class='add'>+	if (ver == HSR_V1) {</div><div class='add'>+		val &amp;= ~BIT(partner-&gt;index);</div><div class='add'>+		val &amp;= ~BIT(port);</div><div class='add'>+		fwd = true;</div><div class='add'>+	}</div><div class='add'>+	val &amp;= ~BIT(dsa_upstream_port(ds, port));</div><div class='add'>+	regmap_write(priv-&gt;regmap, XRS_PORT_FWD_MASK(partner-&gt;index), val);</div><div class='add'>+	regmap_write(priv-&gt;regmap, XRS_PORT_FWD_MASK(port), val);</div><div class='add'>+</div><div class='add'>+	regmap_fields_write(priv-&gt;ps_forward, partner-&gt;index,</div><div class='add'>+			    XRS_PORT_FORWARDING);</div><div class='add'>+	regmap_fields_write(priv-&gt;ps_forward, port, XRS_PORT_FORWARDING);</div><div class='add'>+</div><div class='add'>+	/* Enable inbound policy which allows HSR/PRP supervision forwarding</div><div class='add'>+	 * to the CPU port without discarding duplicates. Continue to</div><div class='add'>+	 * forward to redundant ports when in HSR mode while discarding</div><div class='add'>+	 * duplicates.</div><div class='add'>+	 */</div><div class='add'>+	ret = xrs700x_port_add_hsrsup_ipf(ds, partner-&gt;index, fwd ? port : -1);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = xrs700x_port_add_hsrsup_ipf(ds, port, fwd ? partner-&gt;index : -1);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	regmap_update_bits(priv-&gt;regmap,</div><div class='add'>+			   XRS_ETH_ADDR_CFG(partner-&gt;index, 1), 1, 1);</div><div class='add'>+	regmap_update_bits(priv-&gt;regmap, XRS_ETH_ADDR_CFG(port, 1), 1, 1);</div><div class='add'>+</div><div class='add'>+	hsr_pair[0] = port;</div><div class='add'>+	hsr_pair[1] = partner-&gt;index;</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(hsr_pair); i++) {</div><div class='add'>+		user = dsa_to_port(ds, hsr_pair[i])-&gt;user;</div><div class='add'>+		user-&gt;features |= XRS7000X_SUPPORTED_HSR_FEATURES;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xrs700x_hsr_leave(struct dsa_switch *ds, int port,</div><div class='add'>+			     struct net_device *hsr)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *partner = NULL, *dp;</div><div class='add'>+	struct xrs700x *priv = ds-&gt;priv;</div><div class='add'>+	struct net_device *user;</div><div class='add'>+	int i, hsr_pair[2];</div><div class='add'>+	unsigned int val;</div><div class='add'>+</div><div class='add'>+	dsa_hsr_foreach_port(dp, ds, hsr) {</div><div class='add'>+		if (dp-&gt;index != port) {</div><div class='add'>+			partner = dp;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!partner)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	regmap_fields_write(priv-&gt;ps_forward, partner-&gt;index,</div><div class='add'>+			    XRS_PORT_DISABLED);</div><div class='add'>+	regmap_fields_write(priv-&gt;ps_forward, port, XRS_PORT_DISABLED);</div><div class='add'>+</div><div class='add'>+	regmap_write(priv-&gt;regmap, XRS_HSR_CFG(partner-&gt;index), 0);</div><div class='add'>+	regmap_write(priv-&gt;regmap, XRS_HSR_CFG(port), 0);</div><div class='add'>+</div><div class='add'>+	/* Clear bit for the CPU port to enable forwarding. */</div><div class='add'>+	val = GENMASK(ds-&gt;num_ports - 1, 0);</div><div class='add'>+	val &amp;= ~BIT(dsa_upstream_port(ds, port));</div><div class='add'>+	regmap_write(priv-&gt;regmap, XRS_PORT_FWD_MASK(partner-&gt;index), val);</div><div class='add'>+	regmap_write(priv-&gt;regmap, XRS_PORT_FWD_MASK(port), val);</div><div class='add'>+</div><div class='add'>+	regmap_fields_write(priv-&gt;ps_forward, partner-&gt;index,</div><div class='add'>+			    XRS_PORT_FORWARDING);</div><div class='add'>+	regmap_fields_write(priv-&gt;ps_forward, port, XRS_PORT_FORWARDING);</div><div class='add'>+</div><div class='add'>+	/* Disable inbound policy added by xrs700x_port_add_hsrsup_ipf()</div><div class='add'>+	 * which allows HSR/PRP supervision forwarding to the CPU port without</div><div class='add'>+	 * discarding duplicates.</div><div class='add'>+	 */</div><div class='add'>+	regmap_update_bits(priv-&gt;regmap,</div><div class='add'>+			   XRS_ETH_ADDR_CFG(partner-&gt;index, 1), 1, 0);</div><div class='add'>+	regmap_update_bits(priv-&gt;regmap, XRS_ETH_ADDR_CFG(port, 1), 1, 0);</div><div class='add'>+</div><div class='add'>+	hsr_pair[0] = port;</div><div class='add'>+	hsr_pair[1] = partner-&gt;index;</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(hsr_pair); i++) {</div><div class='add'>+		user = dsa_to_port(ds, hsr_pair[i])-&gt;user;</div><div class='add'>+		user-&gt;features &amp;= ~XRS7000X_SUPPORTED_HSR_FEATURES;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct phylink_mac_ops xrs700x_phylink_mac_ops = {</div><div class='add'>+	.mac_config		= xrs700x_mac_config,</div><div class='add'>+	.mac_link_down		= xrs700x_mac_link_down,</div><div class='add'>+	.mac_link_up		= xrs700x_mac_link_up,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct dsa_switch_ops xrs700x_ops = {</div><div class='add'>+	.get_tag_protocol	= xrs700x_get_tag_protocol,</div><div class='add'>+	.setup			= xrs700x_setup,</div><div class='add'>+	.teardown		= xrs700x_teardown,</div><div class='add'>+	.port_stp_state_set	= xrs700x_port_stp_state_set,</div><div class='add'>+	.phylink_get_caps	= xrs700x_phylink_get_caps,</div><div class='add'>+	.get_strings		= xrs700x_get_strings,</div><div class='add'>+	.get_sset_count		= xrs700x_get_sset_count,</div><div class='add'>+	.get_ethtool_stats	= xrs700x_get_ethtool_stats,</div><div class='add'>+	.get_stats64		= xrs700x_get_stats64,</div><div class='add'>+	.port_bridge_join	= xrs700x_bridge_join,</div><div class='add'>+	.port_bridge_leave	= xrs700x_bridge_leave,</div><div class='add'>+	.port_hsr_join		= xrs700x_hsr_join,</div><div class='add'>+	.port_hsr_leave		= xrs700x_hsr_leave,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int xrs700x_detect(struct xrs700x *priv)</div><div class='add'>+{</div><div class='add'>+	const struct xrs700x_info *info;</div><div class='add'>+	unsigned int id;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = regmap_read(priv-&gt;regmap, XRS_DEV_ID0, &amp;id);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(priv-&gt;dev, "error %d while reading switch id.\n",</div><div class='add'>+			ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	info = of_device_get_match_data(priv-&gt;dev);</div><div class='add'>+	if (!info)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (info-&gt;id == id) {</div><div class='add'>+		priv-&gt;ds-&gt;num_ports = info-&gt;num_ports;</div><div class='add'>+		dev_info(priv-&gt;dev, "%s detected.\n", info-&gt;name);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_err(priv-&gt;dev, "expected switch id 0x%x but found 0x%x.\n",</div><div class='add'>+		info-&gt;id, id);</div><div class='add'>+</div><div class='add'>+	return -ENODEV;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct xrs700x *xrs700x_switch_alloc(struct device *base, void *devpriv)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds;</div><div class='add'>+	struct xrs700x *priv;</div><div class='add'>+</div><div class='add'>+	ds = devm_kzalloc(base, sizeof(*ds), GFP_KERNEL);</div><div class='add'>+	if (!ds)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	ds-&gt;dev = base;</div><div class='add'>+</div><div class='add'>+	priv = devm_kzalloc(base, sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	INIT_DELAYED_WORK(&amp;priv-&gt;mib_work, xrs700x_mib_work);</div><div class='add'>+</div><div class='add'>+	ds-&gt;ops = &amp;xrs700x_ops;</div><div class='add'>+	ds-&gt;phylink_mac_ops = &amp;xrs700x_phylink_mac_ops;</div><div class='add'>+	ds-&gt;priv = priv;</div><div class='add'>+	priv-&gt;dev = base;</div><div class='add'>+</div><div class='add'>+	priv-&gt;ds = ds;</div><div class='add'>+	priv-&gt;priv = devpriv;</div><div class='add'>+</div><div class='add'>+	return priv;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(xrs700x_switch_alloc);</div><div class='add'>+</div><div class='add'>+static int xrs700x_alloc_port_mib(struct xrs700x *priv, int port)</div><div class='add'>+{</div><div class='add'>+	struct xrs700x_port *p = &amp;priv-&gt;ports[port];</div><div class='add'>+</div><div class='add'>+	p-&gt;mib_data = devm_kcalloc(priv-&gt;dev, ARRAY_SIZE(xrs700x_mibs),</div><div class='add'>+				   sizeof(*p-&gt;mib_data), GFP_KERNEL);</div><div class='add'>+	if (!p-&gt;mib_data)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;p-&gt;mib_mutex);</div><div class='add'>+	u64_stats_init(&amp;p-&gt;syncp);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int xrs700x_switch_register(struct xrs700x *priv)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	ret = xrs700x_detect(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = xrs700x_setup_regmap_range(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	priv-&gt;ports = devm_kcalloc(priv-&gt;dev, priv-&gt;ds-&gt;num_ports,</div><div class='add'>+				   sizeof(*priv-&gt;ports), GFP_KERNEL);</div><div class='add'>+	if (!priv-&gt;ports)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;ds-&gt;num_ports; i++) {</div><div class='add'>+		ret = xrs700x_alloc_port_mib(priv, i);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return dsa_register_switch(priv-&gt;ds);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(xrs700x_switch_register);</div><div class='add'>+</div><div class='add'>+void xrs700x_switch_remove(struct xrs700x *priv)</div><div class='add'>+{</div><div class='add'>+	dsa_unregister_switch(priv-&gt;ds);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(xrs700x_switch_remove);</div><div class='add'>+</div><div class='add'>+void xrs700x_switch_shutdown(struct xrs700x *priv)</div><div class='add'>+{</div><div class='add'>+	dsa_switch_shutdown(priv-&gt;ds);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL(xrs700x_switch_shutdown);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("George McCollister &lt;george.mccollister@gmail.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Arrow SpeedChips XRS700x DSA driver");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/net/dsa/xrs700x/xrs700x.h b/drivers/net/dsa/xrs700x/xrs700x.h<br/>new file mode 100644<br/>index 000000000000..4d58257471d2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/xrs700x/xrs700x.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/xrs700x/xrs700x.h</a></div><div class='hunk'>@@ -0,0 +1,43 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/mutex.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+#include &lt;linux/workqueue.h&gt;</div><div class='add'>+#include &lt;linux/u64_stats_sync.h&gt;</div><div class='add'>+#include &lt;uapi/linux/if_link.h&gt;</div><div class='add'>+</div><div class='add'>+struct xrs700x_info {</div><div class='add'>+	unsigned int id;</div><div class='add'>+	const char *name;</div><div class='add'>+	size_t num_ports;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+extern const struct xrs700x_info xrs7003e_info;</div><div class='add'>+extern const struct xrs700x_info xrs7003f_info;</div><div class='add'>+extern const struct xrs700x_info xrs7004e_info;</div><div class='add'>+extern const struct xrs700x_info xrs7004f_info;</div><div class='add'>+</div><div class='add'>+struct xrs700x_port {</div><div class='add'>+	struct mutex mib_mutex; /* protects mib_data */</div><div class='add'>+	u64 *mib_data;</div><div class='add'>+	struct rtnl_link_stats64 stats64;</div><div class='add'>+	struct u64_stats_sync syncp;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct xrs700x {</div><div class='add'>+	struct dsa_switch *ds;</div><div class='add'>+	struct device *dev;</div><div class='add'>+	void *priv;</div><div class='add'>+	struct regmap *regmap;</div><div class='add'>+	struct regmap_field *ps_forward;</div><div class='add'>+	struct regmap_field *ps_management;</div><div class='add'>+	struct regmap_field *ps_sel_speed;</div><div class='add'>+	struct regmap_field *ps_cur_speed;</div><div class='add'>+	struct delayed_work mib_work;</div><div class='add'>+	struct xrs700x_port *ports;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct xrs700x *xrs700x_switch_alloc(struct device *base, void *devpriv);</div><div class='add'>+int xrs700x_switch_register(struct xrs700x *priv);</div><div class='add'>+void xrs700x_switch_remove(struct xrs700x *priv);</div><div class='add'>+void xrs700x_switch_shutdown(struct xrs700x *priv);</div><div class='head'>diff --git a/drivers/net/dsa/xrs700x/xrs700x_i2c.c b/drivers/net/dsa/xrs700x/xrs700x_i2c.c<br/>new file mode 100644<br/>index 000000000000..9b731dea78c1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/xrs700x/xrs700x_i2c.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/xrs700x/xrs700x_i2c.c</a></div><div class='hunk'>@@ -0,0 +1,160 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2020 NovaTech LLC</div><div class='add'>+ * George McCollister &lt;george.mccollister@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bits.h&gt;</div><div class='add'>+#include &lt;linux/i2c.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include "xrs700x.h"</div><div class='add'>+#include "xrs700x_reg.h"</div><div class='add'>+</div><div class='add'>+struct xrs700x_i2c_cmd {</div><div class='add'>+	__be32 reg;</div><div class='add'>+	__be16 val;</div><div class='add'>+} __packed;</div><div class='add'>+</div><div class='add'>+static int xrs700x_i2c_reg_read(void *context, unsigned int reg,</div><div class='add'>+				unsigned int *val)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = context;</div><div class='add'>+	struct i2c_client *i2c = to_i2c_client(dev);</div><div class='add'>+	struct xrs700x_i2c_cmd cmd;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	cmd.reg = cpu_to_be32(reg | 1);</div><div class='add'>+</div><div class='add'>+	ret = i2c_master_send(i2c, (char *)&amp;cmd.reg, sizeof(cmd.reg));</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(dev, "xrs i2c_master_send returned %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = i2c_master_recv(i2c, (char *)&amp;cmd.val, sizeof(cmd.val));</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(dev, "xrs i2c_master_recv returned %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*val = be16_to_cpu(cmd.val);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xrs700x_i2c_reg_write(void *context, unsigned int reg,</div><div class='add'>+				 unsigned int val)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = context;</div><div class='add'>+	struct i2c_client *i2c = to_i2c_client(dev);</div><div class='add'>+	struct xrs700x_i2c_cmd cmd;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	cmd.reg = cpu_to_be32(reg);</div><div class='add'>+	cmd.val = cpu_to_be16(val);</div><div class='add'>+</div><div class='add'>+	ret = i2c_master_send(i2c, (char *)&amp;cmd, sizeof(cmd));</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(dev, "xrs i2c_master_send returned %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct regmap_config xrs700x_i2c_regmap_config = {</div><div class='add'>+	.val_bits = 16,</div><div class='add'>+	.reg_stride = 2,</div><div class='add'>+	.reg_bits = 32,</div><div class='add'>+	.pad_bits = 0,</div><div class='add'>+	.write_flag_mask = 0,</div><div class='add'>+	.read_flag_mask = 0,</div><div class='add'>+	.reg_read = xrs700x_i2c_reg_read,</div><div class='add'>+	.reg_write = xrs700x_i2c_reg_write,</div><div class='add'>+	.max_register = 0,</div><div class='add'>+	.cache_type = REGCACHE_NONE,</div><div class='add'>+	.reg_format_endian = REGMAP_ENDIAN_BIG,</div><div class='add'>+	.val_format_endian = REGMAP_ENDIAN_BIG</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int xrs700x_i2c_probe(struct i2c_client *i2c)</div><div class='add'>+{</div><div class='add'>+	struct xrs700x *priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	priv = xrs700x_switch_alloc(&amp;i2c-&gt;dev, i2c);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv-&gt;regmap = devm_regmap_init(&amp;i2c-&gt;dev, NULL, &amp;i2c-&gt;dev,</div><div class='add'>+					&amp;xrs700x_i2c_regmap_config);</div><div class='add'>+	if (IS_ERR(priv-&gt;regmap)) {</div><div class='add'>+		ret = PTR_ERR(priv-&gt;regmap);</div><div class='add'>+		dev_err(&amp;i2c-&gt;dev, "Failed to initialize regmap: %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	i2c_set_clientdata(i2c, priv);</div><div class='add'>+</div><div class='add'>+	ret = xrs700x_switch_register(priv);</div><div class='add'>+</div><div class='add'>+	/* Main DSA driver may not be started yet. */</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xrs700x_i2c_remove(struct i2c_client *i2c)</div><div class='add'>+{</div><div class='add'>+	struct xrs700x *priv = i2c_get_clientdata(i2c);</div><div class='add'>+</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	xrs700x_switch_remove(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xrs700x_i2c_shutdown(struct i2c_client *i2c)</div><div class='add'>+{</div><div class='add'>+	struct xrs700x *priv = i2c_get_clientdata(i2c);</div><div class='add'>+</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	xrs700x_switch_shutdown(priv);</div><div class='add'>+</div><div class='add'>+	i2c_set_clientdata(i2c, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct i2c_device_id xrs700x_i2c_id[] = {</div><div class='add'>+	{ "xrs700x-switch" },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+MODULE_DEVICE_TABLE(i2c, xrs700x_i2c_id);</div><div class='add'>+</div><div class='add'>+static const struct of_device_id __maybe_unused xrs700x_i2c_dt_ids[] = {</div><div class='add'>+	{ .compatible = "arrow,xrs7003e", .data = &amp;xrs7003e_info },</div><div class='add'>+	{ .compatible = "arrow,xrs7003f", .data = &amp;xrs7003f_info },</div><div class='add'>+	{ .compatible = "arrow,xrs7004e", .data = &amp;xrs7004e_info },</div><div class='add'>+	{ .compatible = "arrow,xrs7004f", .data = &amp;xrs7004f_info },</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, xrs700x_i2c_dt_ids);</div><div class='add'>+</div><div class='add'>+static struct i2c_driver xrs700x_i2c_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name	= "xrs700x-i2c",</div><div class='add'>+		.of_match_table = of_match_ptr(xrs700x_i2c_dt_ids),</div><div class='add'>+	},</div><div class='add'>+	.probe = xrs700x_i2c_probe,</div><div class='add'>+	.remove	= xrs700x_i2c_remove,</div><div class='add'>+	.shutdown = xrs700x_i2c_shutdown,</div><div class='add'>+	.id_table = xrs700x_i2c_id,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_i2c_driver(xrs700x_i2c_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("George McCollister &lt;george.mccollister@gmail.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Arrow SpeedChips XRS700x DSA I2C driver");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/net/dsa/xrs700x/xrs700x_mdio.c b/drivers/net/dsa/xrs700x/xrs700x_mdio.c<br/>new file mode 100644<br/>index 000000000000..5f7d344b5d73<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/xrs700x/xrs700x_mdio.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/xrs700x/xrs700x_mdio.c</a></div><div class='hunk'>@@ -0,0 +1,180 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/*</div><div class='add'>+ * Copyright (C) 2020 NovaTech LLC</div><div class='add'>+ * George McCollister &lt;george.mccollister@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/bits.h&gt;</div><div class='add'>+#include &lt;linux/mdio.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/if_vlan.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include "xrs700x.h"</div><div class='add'>+#include "xrs700x_reg.h"</div><div class='add'>+</div><div class='add'>+#define XRS_MDIO_IBA0	0x10</div><div class='add'>+#define XRS_MDIO_IBA1	0x11</div><div class='add'>+#define XRS_MDIO_IBD	0x14</div><div class='add'>+</div><div class='add'>+#define XRS_IB_READ	0x0</div><div class='add'>+#define XRS_IB_WRITE	0x1</div><div class='add'>+</div><div class='add'>+static int xrs700x_mdio_reg_read(void *context, unsigned int reg,</div><div class='add'>+				 unsigned int *val)</div><div class='add'>+{</div><div class='add'>+	struct mdio_device *mdiodev = context;</div><div class='add'>+	struct device *dev = &amp;mdiodev-&gt;dev;</div><div class='add'>+	u16 uval;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	uval = (u16)FIELD_GET(GENMASK(31, 16), reg);</div><div class='add'>+</div><div class='add'>+	ret = mdiodev_write(mdiodev, XRS_MDIO_IBA1, uval);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(dev, "xrs mdiobus_write returned %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	uval = (u16)((reg &amp; GENMASK(15, 1)) | XRS_IB_READ);</div><div class='add'>+</div><div class='add'>+	ret = mdiodev_write(mdiodev, XRS_MDIO_IBA0, uval);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(dev, "xrs mdiobus_write returned %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = mdiodev_read(mdiodev, XRS_MDIO_IBD);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(dev, "xrs mdiobus_read returned %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*val = (unsigned int)ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xrs700x_mdio_reg_write(void *context, unsigned int reg,</div><div class='add'>+				  unsigned int val)</div><div class='add'>+{</div><div class='add'>+	struct mdio_device *mdiodev = context;</div><div class='add'>+	struct device *dev = &amp;mdiodev-&gt;dev;</div><div class='add'>+	u16 uval;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = mdiodev_write(mdiodev, XRS_MDIO_IBD, (u16)val);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(dev, "xrs mdiobus_write returned %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	uval = (u16)FIELD_GET(GENMASK(31, 16), reg);</div><div class='add'>+</div><div class='add'>+	ret = mdiodev_write(mdiodev, XRS_MDIO_IBA1, uval);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(dev, "xrs mdiobus_write returned %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	uval = (u16)((reg &amp; GENMASK(15, 1)) | XRS_IB_WRITE);</div><div class='add'>+</div><div class='add'>+	ret = mdiodev_write(mdiodev, XRS_MDIO_IBA0, uval);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(dev, "xrs mdiobus_write returned %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct regmap_config xrs700x_mdio_regmap_config = {</div><div class='add'>+	.val_bits = 16,</div><div class='add'>+	.reg_stride = 2,</div><div class='add'>+	.reg_bits = 32,</div><div class='add'>+	.pad_bits = 0,</div><div class='add'>+	.write_flag_mask = 0,</div><div class='add'>+	.read_flag_mask = 0,</div><div class='add'>+	.reg_read = xrs700x_mdio_reg_read,</div><div class='add'>+	.reg_write = xrs700x_mdio_reg_write,</div><div class='add'>+	.max_register = XRS_VLAN(VLAN_N_VID - 1),</div><div class='add'>+	.cache_type = REGCACHE_NONE,</div><div class='add'>+	.reg_format_endian = REGMAP_ENDIAN_BIG,</div><div class='add'>+	.val_format_endian = REGMAP_ENDIAN_BIG</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int xrs700x_mdio_probe(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct xrs700x *priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	priv = xrs700x_switch_alloc(&amp;mdiodev-&gt;dev, mdiodev);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv-&gt;regmap = devm_regmap_init(&amp;mdiodev-&gt;dev, NULL, mdiodev,</div><div class='add'>+					&amp;xrs700x_mdio_regmap_config);</div><div class='add'>+	if (IS_ERR(priv-&gt;regmap)) {</div><div class='add'>+		ret = PTR_ERR(priv-&gt;regmap);</div><div class='add'>+		dev_err(&amp;mdiodev-&gt;dev, "Failed to initialize regmap: %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_set_drvdata(&amp;mdiodev-&gt;dev, priv);</div><div class='add'>+</div><div class='add'>+	ret = xrs700x_switch_register(priv);</div><div class='add'>+</div><div class='add'>+	/* Main DSA driver may not be started yet. */</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xrs700x_mdio_remove(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct xrs700x *priv = dev_get_drvdata(&amp;mdiodev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	xrs700x_switch_remove(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xrs700x_mdio_shutdown(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct xrs700x *priv = dev_get_drvdata(&amp;mdiodev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	xrs700x_switch_shutdown(priv);</div><div class='add'>+</div><div class='add'>+	dev_set_drvdata(&amp;mdiodev-&gt;dev, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id __maybe_unused xrs700x_mdio_dt_ids[] = {</div><div class='add'>+	{ .compatible = "arrow,xrs7003e", .data = &amp;xrs7003e_info },</div><div class='add'>+	{ .compatible = "arrow,xrs7003f", .data = &amp;xrs7003f_info },</div><div class='add'>+	{ .compatible = "arrow,xrs7004e", .data = &amp;xrs7004e_info },</div><div class='add'>+	{ .compatible = "arrow,xrs7004f", .data = &amp;xrs7004f_info },</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, xrs700x_mdio_dt_ids);</div><div class='add'>+</div><div class='add'>+static struct mdio_driver xrs700x_mdio_driver = {</div><div class='add'>+	.mdiodrv.driver = {</div><div class='add'>+		.name	= "xrs700x-mdio",</div><div class='add'>+		.of_match_table = of_match_ptr(xrs700x_mdio_dt_ids),</div><div class='add'>+	},</div><div class='add'>+	.probe	= xrs700x_mdio_probe,</div><div class='add'>+	.remove	= xrs700x_mdio_remove,</div><div class='add'>+	.shutdown = xrs700x_mdio_shutdown,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+mdio_module_driver(xrs700x_mdio_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("George McCollister &lt;george.mccollister@gmail.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Arrow SpeedChips XRS700x DSA MDIO driver");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/net/dsa/xrs700x/xrs700x_reg.h b/drivers/net/dsa/xrs700x/xrs700x_reg.h<br/>new file mode 100644<br/>index 000000000000..470d00e07f15<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/xrs700x/xrs700x_reg.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/xrs700x/xrs700x_reg.h</a></div><div class='hunk'>@@ -0,0 +1,208 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+</div><div class='add'>+/* Register Base Addresses */</div><div class='add'>+#define XRS_DEVICE_ID_BASE		0x0</div><div class='add'>+#define XRS_GPIO_BASE			0x10000</div><div class='add'>+#define XRS_PORT_OFFSET			0x10000</div><div class='add'>+#define XRS_PORT_BASE(x)		(0x200000 + XRS_PORT_OFFSET * (x))</div><div class='add'>+#define XRS_RTC_BASE			0x280000</div><div class='add'>+#define XRS_TS_OFFSET			0x8000</div><div class='add'>+#define XRS_TS_BASE(x)			(0x290000 + XRS_TS_OFFSET * (x))</div><div class='add'>+#define XRS_SWITCH_CONF_BASE		0x300000</div><div class='add'>+</div><div class='add'>+/* Device Identification Registers */</div><div class='add'>+#define XRS_DEV_ID0			(XRS_DEVICE_ID_BASE + 0)</div><div class='add'>+#define XRS_DEV_ID1			(XRS_DEVICE_ID_BASE + 2)</div><div class='add'>+#define XRS_INT_ID0			(XRS_DEVICE_ID_BASE + 4)</div><div class='add'>+#define XRS_INT_ID1			(XRS_DEVICE_ID_BASE + 6)</div><div class='add'>+#define XRS_REV_ID			(XRS_DEVICE_ID_BASE + 8)</div><div class='add'>+</div><div class='add'>+/* GPIO Registers */</div><div class='add'>+#define XRS_CONFIG0			(XRS_GPIO_BASE + 0x1000)</div><div class='add'>+#define XRS_INPUT_STATUS0		(XRS_GPIO_BASE + 0x1002)</div><div class='add'>+#define XRS_CONFIG1			(XRS_GPIO_BASE + 0x1004)</div><div class='add'>+#define XRS_INPUT_STATUS1		(XRS_GPIO_BASE + 0x1006)</div><div class='add'>+#define XRS_CONFIG2			(XRS_GPIO_BASE + 0x1008)</div><div class='add'>+#define XRS_INPUT_STATUS2		(XRS_GPIO_BASE + 0x100a)</div><div class='add'>+</div><div class='add'>+/* Port Configuration Registers */</div><div class='add'>+#define XRS_PORT_GEN_BASE(x)		(XRS_PORT_BASE(x) + 0x0)</div><div class='add'>+#define XRS_PORT_HSR_BASE(x)		(XRS_PORT_BASE(x) + 0x2000)</div><div class='add'>+#define XRS_PORT_PTP_BASE(x)		(XRS_PORT_BASE(x) + 0x4000)</div><div class='add'>+#define XRS_PORT_CNT_BASE(x)		(XRS_PORT_BASE(x) + 0x6000)</div><div class='add'>+#define XRS_PORT_IPO_BASE(x)		(XRS_PORT_BASE(x) + 0x8000)</div><div class='add'>+</div><div class='add'>+/* Port Configuration Registers - General and State */</div><div class='add'>+#define XRS_PORT_STATE(x)		(XRS_PORT_GEN_BASE(x) + 0x0)</div><div class='add'>+#define XRS_PORT_FORWARDING		0</div><div class='add'>+#define XRS_PORT_LEARNING		1</div><div class='add'>+#define XRS_PORT_DISABLED		2</div><div class='add'>+#define XRS_PORT_MODE_NORMAL		0</div><div class='add'>+#define XRS_PORT_MODE_MANAGEMENT	1</div><div class='add'>+#define XRS_PORT_SPEED_1000		0x12</div><div class='add'>+#define XRS_PORT_SPEED_100		0x20</div><div class='add'>+#define XRS_PORT_SPEED_10		0x30</div><div class='add'>+#define XRS_PORT_VLAN(x)		(XRS_PORT_GEN_BASE(x) + 0x10)</div><div class='add'>+#define XRS_PORT_VLAN0_MAPPING(x)	(XRS_PORT_GEN_BASE(x) + 0x12)</div><div class='add'>+#define XRS_PORT_FWD_MASK(x)		(XRS_PORT_GEN_BASE(x) + 0x14)</div><div class='add'>+#define XRS_PORT_VLAN_PRIO(x)		(XRS_PORT_GEN_BASE(x) + 0x16)</div><div class='add'>+</div><div class='add'>+/* Port Configuration Registers - HSR/PRP */</div><div class='add'>+#define XRS_HSR_CFG(x)			(XRS_PORT_HSR_BASE(x) + 0x0)</div><div class='add'>+#define XRS_HSR_CFG_HSR_PRP		BIT(0)</div><div class='add'>+#define XRS_HSR_CFG_HSR			0</div><div class='add'>+#define XRS_HSR_CFG_PRP			BIT(8)</div><div class='add'>+#define XRS_HSR_CFG_LANID_A		0</div><div class='add'>+#define XRS_HSR_CFG_LANID_B		BIT(10)</div><div class='add'>+</div><div class='add'>+/* Port Configuration Registers - PTP */</div><div class='add'>+#define XRS_PTP_RX_SYNC_DELAY_NS_LO(x)	(XRS_PORT_PTP_BASE(x) + 0x2)</div><div class='add'>+#define XRS_PTP_RX_SYNC_DELAY_NS_HI(x)	(XRS_PORT_PTP_BASE(x) + 0x4)</div><div class='add'>+#define XRS_PTP_RX_EVENT_DELAY_NS(x)	(XRS_PORT_PTP_BASE(x) + 0xa)</div><div class='add'>+#define XRS_PTP_TX_EVENT_DELAY_NS(x)	(XRS_PORT_PTP_BASE(x) + 0x12)</div><div class='add'>+</div><div class='add'>+/* Port Configuration Registers - Counter */</div><div class='add'>+#define XRS_CNT_CTRL(x)			(XRS_PORT_CNT_BASE(x) + 0x0)</div><div class='add'>+#define XRS_RX_GOOD_OCTETS_L		(XRS_PORT_CNT_BASE(0) + 0x200)</div><div class='add'>+#define XRS_RX_GOOD_OCTETS_H		(XRS_PORT_CNT_BASE(0) + 0x202)</div><div class='add'>+#define XRS_RX_BAD_OCTETS_L		(XRS_PORT_CNT_BASE(0) + 0x204)</div><div class='add'>+#define XRS_RX_BAD_OCTETS_H		(XRS_PORT_CNT_BASE(0) + 0x206)</div><div class='add'>+#define XRS_RX_UNICAST_L		(XRS_PORT_CNT_BASE(0) + 0x208)</div><div class='add'>+#define XRS_RX_UNICAST_H		(XRS_PORT_CNT_BASE(0) + 0x20a)</div><div class='add'>+#define XRS_RX_BROADCAST_L		(XRS_PORT_CNT_BASE(0) + 0x20c)</div><div class='add'>+#define XRS_RX_BROADCAST_H		(XRS_PORT_CNT_BASE(0) + 0x20e)</div><div class='add'>+#define XRS_RX_MULTICAST_L		(XRS_PORT_CNT_BASE(0) + 0x210)</div><div class='add'>+#define XRS_RX_MULTICAST_H		(XRS_PORT_CNT_BASE(0) + 0x212)</div><div class='add'>+#define XRS_RX_UNDERSIZE_L		(XRS_PORT_CNT_BASE(0) + 0x214)</div><div class='add'>+#define XRS_RX_UNDERSIZE_H		(XRS_PORT_CNT_BASE(0) + 0x216)</div><div class='add'>+#define XRS_RX_FRAGMENTS_L		(XRS_PORT_CNT_BASE(0) + 0x218)</div><div class='add'>+#define XRS_RX_FRAGMENTS_H		(XRS_PORT_CNT_BASE(0) + 0x21a)</div><div class='add'>+#define XRS_RX_OVERSIZE_L		(XRS_PORT_CNT_BASE(0) + 0x21c)</div><div class='add'>+#define XRS_RX_OVERSIZE_H		(XRS_PORT_CNT_BASE(0) + 0x21e)</div><div class='add'>+#define XRS_RX_JABBER_L			(XRS_PORT_CNT_BASE(0) + 0x220)</div><div class='add'>+#define XRS_RX_JABBER_H			(XRS_PORT_CNT_BASE(0) + 0x222)</div><div class='add'>+#define XRS_RX_ERR_L			(XRS_PORT_CNT_BASE(0) + 0x224)</div><div class='add'>+#define XRS_RX_ERR_H			(XRS_PORT_CNT_BASE(0) + 0x226)</div><div class='add'>+#define XRS_RX_CRC_L			(XRS_PORT_CNT_BASE(0) + 0x228)</div><div class='add'>+#define XRS_RX_CRC_H			(XRS_PORT_CNT_BASE(0) + 0x22a)</div><div class='add'>+#define XRS_RX_64_L			(XRS_PORT_CNT_BASE(0) + 0x22c)</div><div class='add'>+#define XRS_RX_64_H			(XRS_PORT_CNT_BASE(0) + 0x22e)</div><div class='add'>+#define XRS_RX_65_127_L			(XRS_PORT_CNT_BASE(0) + 0x230)</div><div class='add'>+#define XRS_RX_65_127_H			(XRS_PORT_CNT_BASE(0) + 0x232)</div><div class='add'>+#define XRS_RX_128_255_L		(XRS_PORT_CNT_BASE(0) + 0x234)</div><div class='add'>+#define XRS_RX_128_255_H		(XRS_PORT_CNT_BASE(0) + 0x236)</div><div class='add'>+#define XRS_RX_256_511_L		(XRS_PORT_CNT_BASE(0) + 0x238)</div><div class='add'>+#define XRS_RX_256_511_H		(XRS_PORT_CNT_BASE(0) + 0x23a)</div><div class='add'>+#define XRS_RX_512_1023_L		(XRS_PORT_CNT_BASE(0) + 0x23c)</div><div class='add'>+#define XRS_RX_512_1023_H		(XRS_PORT_CNT_BASE(0) + 0x23e)</div><div class='add'>+#define XRS_RX_1024_1536_L		(XRS_PORT_CNT_BASE(0) + 0x240)</div><div class='add'>+#define XRS_RX_1024_1536_H		(XRS_PORT_CNT_BASE(0) + 0x242)</div><div class='add'>+#define XRS_RX_HSR_PRP_L		(XRS_PORT_CNT_BASE(0) + 0x244)</div><div class='add'>+#define XRS_RX_HSR_PRP_H		(XRS_PORT_CNT_BASE(0) + 0x246)</div><div class='add'>+#define XRS_RX_WRONGLAN_L		(XRS_PORT_CNT_BASE(0) + 0x248)</div><div class='add'>+#define XRS_RX_WRONGLAN_H		(XRS_PORT_CNT_BASE(0) + 0x24a)</div><div class='add'>+#define XRS_RX_DUPLICATE_L		(XRS_PORT_CNT_BASE(0) + 0x24c)</div><div class='add'>+#define XRS_RX_DUPLICATE_H		(XRS_PORT_CNT_BASE(0) + 0x24e)</div><div class='add'>+#define XRS_TX_OCTETS_L			(XRS_PORT_CNT_BASE(0) + 0x280)</div><div class='add'>+#define XRS_TX_OCTETS_H			(XRS_PORT_CNT_BASE(0) + 0x282)</div><div class='add'>+#define XRS_TX_UNICAST_L		(XRS_PORT_CNT_BASE(0) + 0x284)</div><div class='add'>+#define XRS_TX_UNICAST_H		(XRS_PORT_CNT_BASE(0) + 0x286)</div><div class='add'>+#define XRS_TX_BROADCAST_L		(XRS_PORT_CNT_BASE(0) + 0x288)</div><div class='add'>+#define XRS_TX_BROADCAST_H		(XRS_PORT_CNT_BASE(0) + 0x28a)</div><div class='add'>+#define XRS_TX_MULTICAST_L		(XRS_PORT_CNT_BASE(0) + 0x28c)</div><div class='add'>+#define XRS_TX_MULTICAST_H		(XRS_PORT_CNT_BASE(0) + 0x28e)</div><div class='add'>+#define XRS_TX_HSR_PRP_L		(XRS_PORT_CNT_BASE(0) + 0x290)</div><div class='add'>+#define XRS_TX_HSR_PRP_H		(XRS_PORT_CNT_BASE(0) + 0x292)</div><div class='add'>+#define XRS_PRIQ_DROP_L			(XRS_PORT_CNT_BASE(0) + 0x2c0)</div><div class='add'>+#define XRS_PRIQ_DROP_H			(XRS_PORT_CNT_BASE(0) + 0x2c2)</div><div class='add'>+#define XRS_EARLY_DROP_L		(XRS_PORT_CNT_BASE(0) + 0x2c4)</div><div class='add'>+#define XRS_EARLY_DROP_H		(XRS_PORT_CNT_BASE(0) + 0x2c6)</div><div class='add'>+</div><div class='add'>+/* Port Configuration Registers - Inbound Policy 0 - 15 */</div><div class='add'>+#define XRS_ETH_ADDR_CFG(x, p)		(XRS_PORT_IPO_BASE(x) + \</div><div class='add'>+					 (p) * 0x20 + 0x0)</div><div class='add'>+#define XRS_ETH_ADDR_FWD_ALLOW(x, p)	(XRS_PORT_IPO_BASE(x) + \</div><div class='add'>+					 (p) * 0x20 + 0x2)</div><div class='add'>+#define XRS_ETH_ADDR_FWD_MIRROR(x, p)	(XRS_PORT_IPO_BASE(x) + \</div><div class='add'>+					 (p) * 0x20 + 0x4)</div><div class='add'>+#define XRS_ETH_ADDR_0(x, p)		(XRS_PORT_IPO_BASE(x) + \</div><div class='add'>+					 (p) * 0x20 + 0x8)</div><div class='add'>+#define XRS_ETH_ADDR_1(x, p)		(XRS_PORT_IPO_BASE(x) + \</div><div class='add'>+					 (p) * 0x20 + 0xa)</div><div class='add'>+#define XRS_ETH_ADDR_2(x, p)		(XRS_PORT_IPO_BASE(x) + \</div><div class='add'>+					 (p) * 0x20 + 0xc)</div><div class='add'>+</div><div class='add'>+/* RTC Registers */</div><div class='add'>+#define XRS_CUR_NSEC0			(XRS_RTC_BASE + 0x1004)</div><div class='add'>+#define XRS_CUR_NSEC1			(XRS_RTC_BASE + 0x1006)</div><div class='add'>+#define XRS_CUR_SEC0			(XRS_RTC_BASE + 0x1008)</div><div class='add'>+#define XRS_CUR_SEC1			(XRS_RTC_BASE + 0x100a)</div><div class='add'>+#define XRS_CUR_SEC2			(XRS_RTC_BASE + 0x100c)</div><div class='add'>+#define XRS_TIME_CC0			(XRS_RTC_BASE + 0x1010)</div><div class='add'>+#define XRS_TIME_CC1			(XRS_RTC_BASE + 0x1012)</div><div class='add'>+#define XRS_TIME_CC2			(XRS_RTC_BASE + 0x1014)</div><div class='add'>+#define XRS_STEP_SIZE0			(XRS_RTC_BASE + 0x1020)</div><div class='add'>+#define XRS_STEP_SIZE1			(XRS_RTC_BASE + 0x1022)</div><div class='add'>+#define XRS_STEP_SIZE2			(XRS_RTC_BASE + 0x1024)</div><div class='add'>+#define XRS_ADJUST_NSEC0		(XRS_RTC_BASE + 0x1034)</div><div class='add'>+#define XRS_ADJUST_NSEC1		(XRS_RTC_BASE + 0x1036)</div><div class='add'>+#define XRS_ADJUST_SEC0			(XRS_RTC_BASE + 0x1038)</div><div class='add'>+#define XRS_ADJUST_SEC1			(XRS_RTC_BASE + 0x103a)</div><div class='add'>+#define XRS_ADJUST_SEC2			(XRS_RTC_BASE + 0x103c)</div><div class='add'>+#define XRS_TIME_CMD			(XRS_RTC_BASE + 0x1040)</div><div class='add'>+</div><div class='add'>+/* Time Stamper Registers */</div><div class='add'>+#define XRS_TS_CTRL(x)			(XRS_TS_BASE(x) + 0x1000)</div><div class='add'>+#define XRS_TS_INT_MASK(x)		(XRS_TS_BASE(x) + 0x1008)</div><div class='add'>+#define XRS_TS_INT_STATUS(x)		(XRS_TS_BASE(x) + 0x1010)</div><div class='add'>+#define XRS_TS_NSEC0(x)			(XRS_TS_BASE(x) + 0x1104)</div><div class='add'>+#define XRS_TS_NSEC1(x)			(XRS_TS_BASE(x) + 0x1106)</div><div class='add'>+#define XRS_TS_SEC0(x)			(XRS_TS_BASE(x) + 0x1108)</div><div class='add'>+#define XRS_TS_SEC1(x)			(XRS_TS_BASE(x) + 0x110a)</div><div class='add'>+#define XRS_TS_SEC2(x)			(XRS_TS_BASE(x) + 0x110c)</div><div class='add'>+#define XRS_PNCT0(x)			(XRS_TS_BASE(x) + 0x1110)</div><div class='add'>+#define XRS_PNCT1(x)			(XRS_TS_BASE(x) + 0x1112)</div><div class='add'>+</div><div class='add'>+/* Switch Configuration Registers */</div><div class='add'>+#define XRS_SWITCH_GEN_BASE		(XRS_SWITCH_CONF_BASE + 0x0)</div><div class='add'>+#define XRS_SWITCH_TS_BASE		(XRS_SWITCH_CONF_BASE + 0x2000)</div><div class='add'>+#define XRS_SWITCH_VLAN_BASE		(XRS_SWITCH_CONF_BASE + 0x4000)</div><div class='add'>+</div><div class='add'>+/* Switch Configuration Registers - General */</div><div class='add'>+#define XRS_GENERAL			(XRS_SWITCH_GEN_BASE + 0x10)</div><div class='add'>+#define XRS_GENERAL_TIME_TRAILER	BIT(9)</div><div class='add'>+#define XRS_GENERAL_MOD_SYNC		BIT(10)</div><div class='add'>+#define XRS_GENERAL_CUT_THRU		BIT(13)</div><div class='add'>+#define XRS_GENERAL_CLR_MAC_TBL		BIT(14)</div><div class='add'>+#define XRS_GENERAL_RESET		BIT(15)</div><div class='add'>+#define XRS_MT_CLEAR_MASK		(XRS_SWITCH_GEN_BASE + 0x12)</div><div class='add'>+#define XRS_ADDRESS_AGING		(XRS_SWITCH_GEN_BASE + 0x20)</div><div class='add'>+#define XRS_TS_CTRL_TX			(XRS_SWITCH_GEN_BASE + 0x28)</div><div class='add'>+#define XRS_TS_CTRL_RX			(XRS_SWITCH_GEN_BASE + 0x2a)</div><div class='add'>+#define XRS_INT_MASK			(XRS_SWITCH_GEN_BASE + 0x2c)</div><div class='add'>+#define XRS_INT_STATUS			(XRS_SWITCH_GEN_BASE + 0x2e)</div><div class='add'>+#define XRS_MAC_TABLE0			(XRS_SWITCH_GEN_BASE + 0x200)</div><div class='add'>+#define XRS_MAC_TABLE1			(XRS_SWITCH_GEN_BASE + 0x202)</div><div class='add'>+#define XRS_MAC_TABLE2			(XRS_SWITCH_GEN_BASE + 0x204)</div><div class='add'>+#define XRS_MAC_TABLE3			(XRS_SWITCH_GEN_BASE + 0x206)</div><div class='add'>+</div><div class='add'>+/* Switch Configuration Registers - Frame Timestamp */</div><div class='add'>+#define XRS_TX_TS_NS_LO(t)		(XRS_SWITCH_TS_BASE + 0x80 * (t) + 0x0)</div><div class='add'>+#define XRS_TX_TS_NS_HI(t)		(XRS_SWITCH_TS_BASE + 0x80 * (t) + 0x2)</div><div class='add'>+#define XRS_TX_TS_S_LO(t)		(XRS_SWITCH_TS_BASE + 0x80 * (t) + 0x4)</div><div class='add'>+#define XRS_TX_TS_S_HI(t)		(XRS_SWITCH_TS_BASE + 0x80 * (t) + 0x6)</div><div class='add'>+#define XRS_TX_TS_HDR(t, h)		(XRS_SWITCH_TS_BASE + 0x80 * (t) + \</div><div class='add'>+					 0x2 * (h) + 0xe)</div><div class='add'>+#define XRS_RX_TS_NS_LO(t)		(XRS_SWITCH_TS_BASE + 0x80 * (t) + \</div><div class='add'>+					 0x200)</div><div class='add'>+#define XRS_RX_TS_NS_HI(t)		(XRS_SWITCH_TS_BASE + 0x80 * (t) + \</div><div class='add'>+					 0x202)</div><div class='add'>+#define XRS_RX_TS_S_LO(t)		(XRS_SWITCH_TS_BASE + 0x80 * (t) + \</div><div class='add'>+					 0x204)</div><div class='add'>+#define XRS_RX_TS_S_HI(t)		(XRS_SWITCH_TS_BASE + 0x80 * (t) + \</div><div class='add'>+					 0x206)</div><div class='add'>+#define XRS_RX_TS_HDR(t, h)		(XRS_SWITCH_TS_BASE + 0x80 * (t) + \</div><div class='add'>+					 0x2 * (h) + 0xe)</div><div class='add'>+</div><div class='add'>+/* Switch Configuration Registers - VLAN */</div><div class='add'>+#define XRS_VLAN(v)			(XRS_SWITCH_VLAN_BASE + 0x2 * (v))</div><div class='head'>diff --git a/drivers/net/dsa/yt921x.c b/drivers/net/dsa/yt921x.c<br/>new file mode 100644<br/>index 000000000000..1c511f5dc6ab<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/yt921x.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/yt921x.c</a></div><div class='hunk'>@@ -0,0 +1,3006 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Driver for Motorcomm YT921x Switch</div><div class='add'>+ *</div><div class='add'>+ * Should work on YT9213/YT9214/YT9215/YT9218, but only tested on YT9215+SGMII,</div><div class='add'>+ * be sure to do your own checks before porting to another chip.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2025 David Yang</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/if_bridge.h&gt;</div><div class='add'>+#include &lt;linux/if_hsr.h&gt;</div><div class='add'>+#include &lt;linux/if_vlan.h&gt;</div><div class='add'>+#include &lt;linux/iopoll.h&gt;</div><div class='add'>+#include &lt;linux/mdio.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_mdio.h&gt;</div><div class='add'>+#include &lt;linux/of_net.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+</div><div class='add'>+#include "yt921x.h"</div><div class='add'>+</div><div class='add'>+struct yt921x_mib_desc {</div><div class='add'>+	unsigned int size;</div><div class='add'>+	unsigned int offset;</div><div class='add'>+	const char *name;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define MIB_DESC(_size, _offset, _name) \</div><div class='add'>+	{_size, _offset, _name}</div><div class='add'>+</div><div class='add'>+/* Must agree with yt921x_mib</div><div class='add'>+ *</div><div class='add'>+ * Unstructured fields (name != NULL) will appear in get_ethtool_stats(),</div><div class='add'>+ * structured go to their *_stats() methods, but we need their sizes and offsets</div><div class='add'>+ * to perform 32bit MIB overflow wraparound.</div><div class='add'>+ */</div><div class='add'>+static const struct yt921x_mib_desc yt921x_mib_descs[] = {</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_RX_BROADCAST, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_RX_PAUSE, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_RX_MULTICAST, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_RX_CRC_ERR, NULL),</div><div class='add'>+</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_RX_ALIGN_ERR, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_RX_UNDERSIZE_ERR, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_RX_FRAG_ERR, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_RX_PKT_SZ_64, NULL),</div><div class='add'>+</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_RX_PKT_SZ_65_TO_127, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_RX_PKT_SZ_128_TO_255, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_RX_PKT_SZ_256_TO_511, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_RX_PKT_SZ_512_TO_1023, NULL),</div><div class='add'>+</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_RX_PKT_SZ_1024_TO_1518, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_RX_PKT_SZ_1519_TO_MAX, NULL),</div><div class='add'>+	MIB_DESC(2, YT921X_MIB_DATA_RX_GOOD_BYTES, NULL),</div><div class='add'>+</div><div class='add'>+	MIB_DESC(2, YT921X_MIB_DATA_RX_BAD_BYTES, "RxBadBytes"),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_RX_OVERSIZE_ERR, NULL),</div><div class='add'>+</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_RX_DROPPED, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_TX_BROADCAST, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_TX_PAUSE, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_TX_MULTICAST, NULL),</div><div class='add'>+</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_TX_UNDERSIZE_ERR, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_TX_PKT_SZ_64, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_TX_PKT_SZ_65_TO_127, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_TX_PKT_SZ_128_TO_255, NULL),</div><div class='add'>+</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_TX_PKT_SZ_256_TO_511, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_TX_PKT_SZ_512_TO_1023, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_TX_PKT_SZ_1024_TO_1518, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_TX_PKT_SZ_1519_TO_MAX, NULL),</div><div class='add'>+</div><div class='add'>+	MIB_DESC(2, YT921X_MIB_DATA_TX_GOOD_BYTES, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_TX_COLLISION, NULL),</div><div class='add'>+</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_TX_EXCESSIVE_COLLISION, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_TX_MULTIPLE_COLLISION, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_TX_SINGLE_COLLISION, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_TX_PKT, NULL),</div><div class='add'>+</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_TX_DEFERRED, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_TX_LATE_COLLISION, NULL),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_RX_OAM, "RxOAM"),</div><div class='add'>+	MIB_DESC(1, YT921X_MIB_DATA_TX_OAM, "TxOAM"),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct yt921x_info {</div><div class='add'>+	const char *name;</div><div class='add'>+	u16 major;</div><div class='add'>+	/* Unknown, seems to be plain enumeration */</div><div class='add'>+	u8 mode;</div><div class='add'>+	u8 extmode;</div><div class='add'>+	/* Ports with integral GbE PHYs, not including MCU Port 10 */</div><div class='add'>+	u16 internal_mask;</div><div class='add'>+	/* TODO: see comments in yt921x_dsa_phylink_get_caps() */</div><div class='add'>+	u16 external_mask;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define YT921X_PORT_MASK_INTn(port)	BIT(port)</div><div class='add'>+#define YT921X_PORT_MASK_INT0_n(n)	GENMASK((n) - 1, 0)</div><div class='add'>+#define YT921X_PORT_MASK_EXT0		BIT(8)</div><div class='add'>+#define YT921X_PORT_MASK_EXT1		BIT(9)</div><div class='add'>+</div><div class='add'>+static const struct yt921x_info yt921x_infos[] = {</div><div class='add'>+	{</div><div class='add'>+		"YT9215SC", YT9215_MAJOR, 1, 0,</div><div class='add'>+		YT921X_PORT_MASK_INT0_n(5),</div><div class='add'>+		YT921X_PORT_MASK_EXT0 | YT921X_PORT_MASK_EXT1,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"YT9215S", YT9215_MAJOR, 2, 0,</div><div class='add'>+		YT921X_PORT_MASK_INT0_n(5),</div><div class='add'>+		YT921X_PORT_MASK_EXT0 | YT921X_PORT_MASK_EXT1,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"YT9215RB", YT9215_MAJOR, 3, 0,</div><div class='add'>+		YT921X_PORT_MASK_INT0_n(5),</div><div class='add'>+		YT921X_PORT_MASK_EXT0 | YT921X_PORT_MASK_EXT1,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"YT9214NB", YT9215_MAJOR, 3, 2,</div><div class='add'>+		YT921X_PORT_MASK_INTn(1) | YT921X_PORT_MASK_INTn(3),</div><div class='add'>+		YT921X_PORT_MASK_EXT0 | YT921X_PORT_MASK_EXT1,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"YT9213NB", YT9215_MAJOR, 3, 3,</div><div class='add'>+		YT921X_PORT_MASK_INTn(1) | YT921X_PORT_MASK_INTn(3),</div><div class='add'>+		YT921X_PORT_MASK_EXT1,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"YT9218N", YT9218_MAJOR, 0, 0,</div><div class='add'>+		YT921X_PORT_MASK_INT0_n(8),</div><div class='add'>+		0,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		"YT9218MB", YT9218_MAJOR, 1, 0,</div><div class='add'>+		YT921X_PORT_MASK_INT0_n(8),</div><div class='add'>+		YT921X_PORT_MASK_EXT0 | YT921X_PORT_MASK_EXT1,</div><div class='add'>+	},</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define YT921X_NAME	"yt921x"</div><div class='add'>+</div><div class='add'>+#define YT921X_VID_UNWARE	4095</div><div class='add'>+</div><div class='add'>+#define YT921X_POLL_SLEEP_US	10000</div><div class='add'>+#define YT921X_POLL_TIMEOUT_US	100000</div><div class='add'>+</div><div class='add'>+/* The interval should be small enough to avoid overflow of 32bit MIBs.</div><div class='add'>+ *</div><div class='add'>+ * Until we can read MIBs from stats64 call directly (i.e. sleep</div><div class='add'>+ * there), we have to poll stats more frequently then it is actually needed.</div><div class='add'>+ * For overflow protection, normally, 100 sec interval should have been OK.</div><div class='add'>+ */</div><div class='add'>+#define YT921X_STATS_INTERVAL_JIFFIES	(3 * HZ)</div><div class='add'>+</div><div class='add'>+struct yt921x_reg_mdio {</div><div class='add'>+	struct mii_bus *bus;</div><div class='add'>+	int addr;</div><div class='add'>+	/* SWITCH_ID_1 / SWITCH_ID_0 of the device</div><div class='add'>+	 *</div><div class='add'>+	 * This is a way to multiplex multiple devices on the same MII phyaddr</div><div class='add'>+	 * and should be configurable in DT. However, MDIO core simply doesn't</div><div class='add'>+	 * allow multiple devices over one reg addr, so this is a fixed value</div><div class='add'>+	 * for now until a solution is found.</div><div class='add'>+	 *</div><div class='add'>+	 * Keep this because we need switchid to form MII regaddrs anyway.</div><div class='add'>+	 */</div><div class='add'>+	unsigned char switchid;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* TODO: SPI/I2C */</div><div class='add'>+</div><div class='add'>+#define to_yt921x_priv(_ds) container_of_const(_ds, struct yt921x_priv, ds)</div><div class='add'>+#define to_device(priv) ((priv)-&gt;ds.dev)</div><div class='add'>+</div><div class='add'>+static int yt921x_reg_read(struct yt921x_priv *priv, u32 reg, u32 *valp)</div><div class='add'>+{</div><div class='add'>+	WARN_ON(!mutex_is_locked(&amp;priv-&gt;reg_lock));</div><div class='add'>+</div><div class='add'>+	return priv-&gt;reg_ops-&gt;read(priv-&gt;reg_ctx, reg, valp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_reg_write(struct yt921x_priv *priv, u32 reg, u32 val)</div><div class='add'>+{</div><div class='add'>+	WARN_ON(!mutex_is_locked(&amp;priv-&gt;reg_lock));</div><div class='add'>+</div><div class='add'>+	return priv-&gt;reg_ops-&gt;write(priv-&gt;reg_ctx, reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_reg_wait(struct yt921x_priv *priv, u32 reg, u32 mask, u32 *valp)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+	int res;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = read_poll_timeout(yt921x_reg_read, res,</div><div class='add'>+				res || (val &amp; mask) == *valp,</div><div class='add'>+				YT921X_POLL_SLEEP_US, YT921X_POLL_TIMEOUT_US,</div><div class='add'>+				false, priv, reg, &amp;val);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	*valp = val;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_reg_update_bits(struct yt921x_priv *priv, u32 reg, u32 mask, u32 val)</div><div class='add'>+{</div><div class='add'>+	int res;</div><div class='add'>+	u32 v;</div><div class='add'>+	u32 u;</div><div class='add'>+</div><div class='add'>+	res = yt921x_reg_read(priv, reg, &amp;v);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	u = v;</div><div class='add'>+	u &amp;= ~mask;</div><div class='add'>+	u |= val;</div><div class='add'>+	if (u == v)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return yt921x_reg_write(priv, reg, u);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_reg_set_bits(struct yt921x_priv *priv, u32 reg, u32 mask)</div><div class='add'>+{</div><div class='add'>+	return yt921x_reg_update_bits(priv, reg, 0, mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_reg_clear_bits(struct yt921x_priv *priv, u32 reg, u32 mask)</div><div class='add'>+{</div><div class='add'>+	return yt921x_reg_update_bits(priv, reg, mask, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_reg_toggle_bits(struct yt921x_priv *priv, u32 reg, u32 mask, bool set)</div><div class='add'>+{</div><div class='add'>+	return yt921x_reg_update_bits(priv, reg, mask, !set ? 0 : mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Some registers, like VLANn_CTRL, should always be written in 64-bit, even if</div><div class='add'>+ * you are to write only the lower / upper 32 bits.</div><div class='add'>+ *</div><div class='add'>+ * There is no such restriction for reading, but we still provide 64-bit read</div><div class='add'>+ * wrappers so that we always handle u64 values.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static int yt921x_reg64_read(struct yt921x_priv *priv, u32 reg, u64 *valp)</div><div class='add'>+{</div><div class='add'>+	u32 lo;</div><div class='add'>+	u32 hi;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_reg_read(priv, reg, &amp;lo);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	res = yt921x_reg_read(priv, reg + 4, &amp;hi);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	*valp = ((u64)hi &lt;&lt; 32) | lo;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_reg64_write(struct yt921x_priv *priv, u32 reg, u64 val)</div><div class='add'>+{</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_reg_write(priv, reg, (u32)val);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	return yt921x_reg_write(priv, reg + 4, (u32)(val &gt;&gt; 32));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_reg64_update_bits(struct yt921x_priv *priv, u32 reg, u64 mask, u64 val)</div><div class='add'>+{</div><div class='add'>+	int res;</div><div class='add'>+	u64 v;</div><div class='add'>+	u64 u;</div><div class='add'>+</div><div class='add'>+	res = yt921x_reg64_read(priv, reg, &amp;v);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	u = v;</div><div class='add'>+	u &amp;= ~mask;</div><div class='add'>+	u |= val;</div><div class='add'>+	if (u == v)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return yt921x_reg64_write(priv, reg, u);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_reg64_clear_bits(struct yt921x_priv *priv, u32 reg, u64 mask)</div><div class='add'>+{</div><div class='add'>+	return yt921x_reg64_update_bits(priv, reg, mask, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_reg_mdio_read(void *context, u32 reg, u32 *valp)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_reg_mdio *mdio = context;</div><div class='add'>+	struct mii_bus *bus = mdio-&gt;bus;</div><div class='add'>+	int addr = mdio-&gt;addr;</div><div class='add'>+	u32 reg_addr;</div><div class='add'>+	u32 reg_data;</div><div class='add'>+	u32 val;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	/* Hold the mdio bus lock to avoid (un)locking for 4 times */</div><div class='add'>+	mutex_lock_nested(&amp;bus-&gt;mdio_lock, MDIO_MUTEX_NESTED);</div><div class='add'>+</div><div class='add'>+	reg_addr = YT921X_SMI_SWITCHID(mdio-&gt;switchid) | YT921X_SMI_ADDR |</div><div class='add'>+		   YT921X_SMI_READ;</div><div class='add'>+	res = __mdiobus_write(bus, addr, reg_addr, (u16)(reg &gt;&gt; 16));</div><div class='add'>+	if (res)</div><div class='add'>+		goto end;</div><div class='add'>+	res = __mdiobus_write(bus, addr, reg_addr, (u16)reg);</div><div class='add'>+	if (res)</div><div class='add'>+		goto end;</div><div class='add'>+</div><div class='add'>+	reg_data = YT921X_SMI_SWITCHID(mdio-&gt;switchid) | YT921X_SMI_DATA |</div><div class='add'>+		   YT921X_SMI_READ;</div><div class='add'>+	res = __mdiobus_read(bus, addr, reg_data);</div><div class='add'>+	if (res &lt; 0)</div><div class='add'>+		goto end;</div><div class='add'>+	val = (u16)res;</div><div class='add'>+	res = __mdiobus_read(bus, addr, reg_data);</div><div class='add'>+	if (res &lt; 0)</div><div class='add'>+		goto end;</div><div class='add'>+	val = (val &lt;&lt; 16) | (u16)res;</div><div class='add'>+</div><div class='add'>+	*valp = val;</div><div class='add'>+	res = 0;</div><div class='add'>+</div><div class='add'>+end:</div><div class='add'>+	mutex_unlock(&amp;bus-&gt;mdio_lock);</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_reg_mdio_write(void *context, u32 reg, u32 val)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_reg_mdio *mdio = context;</div><div class='add'>+	struct mii_bus *bus = mdio-&gt;bus;</div><div class='add'>+	int addr = mdio-&gt;addr;</div><div class='add'>+	u32 reg_addr;</div><div class='add'>+	u32 reg_data;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mutex_lock_nested(&amp;bus-&gt;mdio_lock, MDIO_MUTEX_NESTED);</div><div class='add'>+</div><div class='add'>+	reg_addr = YT921X_SMI_SWITCHID(mdio-&gt;switchid) | YT921X_SMI_ADDR |</div><div class='add'>+		   YT921X_SMI_WRITE;</div><div class='add'>+	res = __mdiobus_write(bus, addr, reg_addr, (u16)(reg &gt;&gt; 16));</div><div class='add'>+	if (res)</div><div class='add'>+		goto end;</div><div class='add'>+	res = __mdiobus_write(bus, addr, reg_addr, (u16)reg);</div><div class='add'>+	if (res)</div><div class='add'>+		goto end;</div><div class='add'>+</div><div class='add'>+	reg_data = YT921X_SMI_SWITCHID(mdio-&gt;switchid) | YT921X_SMI_DATA |</div><div class='add'>+		   YT921X_SMI_WRITE;</div><div class='add'>+	res = __mdiobus_write(bus, addr, reg_data, (u16)(val &gt;&gt; 16));</div><div class='add'>+	if (res)</div><div class='add'>+		goto end;</div><div class='add'>+	res = __mdiobus_write(bus, addr, reg_data, (u16)val);</div><div class='add'>+	if (res)</div><div class='add'>+		goto end;</div><div class='add'>+</div><div class='add'>+	res = 0;</div><div class='add'>+</div><div class='add'>+end:</div><div class='add'>+	mutex_unlock(&amp;bus-&gt;mdio_lock);</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct yt921x_reg_ops yt921x_reg_ops_mdio = {</div><div class='add'>+	.read = yt921x_reg_mdio_read,</div><div class='add'>+	.write = yt921x_reg_mdio_write,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* TODO: SPI/I2C */</div><div class='add'>+</div><div class='add'>+static int yt921x_intif_wait(struct yt921x_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 val = 0;</div><div class='add'>+</div><div class='add'>+	return yt921x_reg_wait(priv, YT921X_INT_MBUS_OP, YT921X_MBUS_OP_START,</div><div class='add'>+			       &amp;val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_intif_read(struct yt921x_priv *priv, int port, int reg, u16 *valp)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = to_device(priv);</div><div class='add'>+	u32 mask;</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	u32 val;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_intif_wait(priv);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	mask = YT921X_MBUS_CTRL_PORT_M | YT921X_MBUS_CTRL_REG_M |</div><div class='add'>+	       YT921X_MBUS_CTRL_OP_M;</div><div class='add'>+	ctrl = YT921X_MBUS_CTRL_PORT(port) | YT921X_MBUS_CTRL_REG(reg) |</div><div class='add'>+	       YT921X_MBUS_CTRL_READ;</div><div class='add'>+	res = yt921x_reg_update_bits(priv, YT921X_INT_MBUS_CTRL, mask, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_INT_MBUS_OP, YT921X_MBUS_OP_START);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_intif_wait(priv);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	res = yt921x_reg_read(priv, YT921X_INT_MBUS_DIN, &amp;val);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	if ((u16)val != val)</div><div class='add'>+		dev_info(dev,</div><div class='add'>+			 "%s: port %d, reg 0x%x: Expected u16, got 0x%08x\n",</div><div class='add'>+			 __func__, port, reg, val);</div><div class='add'>+	*valp = (u16)val;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_intif_write(struct yt921x_priv *priv, int port, int reg, u16 val)</div><div class='add'>+{</div><div class='add'>+	u32 mask;</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_intif_wait(priv);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	mask = YT921X_MBUS_CTRL_PORT_M | YT921X_MBUS_CTRL_REG_M |</div><div class='add'>+	       YT921X_MBUS_CTRL_OP_M;</div><div class='add'>+	ctrl = YT921X_MBUS_CTRL_PORT(port) | YT921X_MBUS_CTRL_REG(reg) |</div><div class='add'>+	       YT921X_MBUS_CTRL_WRITE;</div><div class='add'>+	res = yt921x_reg_update_bits(priv, YT921X_INT_MBUS_CTRL, mask, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_INT_MBUS_DOUT, val);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_INT_MBUS_OP, YT921X_MBUS_OP_START);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	return yt921x_intif_wait(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_mbus_int_read(struct mii_bus *mbus, int port, int reg)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = mbus-&gt;priv;</div><div class='add'>+	u16 val;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	if (port &gt;= YT921X_PORT_NUM)</div><div class='add'>+		return U16_MAX;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_intif_read(priv, port, reg, &amp;val);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_mbus_int_write(struct mii_bus *mbus, int port, int reg, u16 data)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = mbus-&gt;priv;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	if (port &gt;= YT921X_PORT_NUM)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_intif_write(priv, port, reg, data);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_mbus_int_init(struct yt921x_priv *priv, struct device_node *mnp)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = to_device(priv);</div><div class='add'>+	struct mii_bus *mbus;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mbus = devm_mdiobus_alloc(dev);</div><div class='add'>+	if (!mbus)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mbus-&gt;name = "YT921x internal MDIO bus";</div><div class='add'>+	snprintf(mbus-&gt;id, MII_BUS_ID_SIZE, "%s", dev_name(dev));</div><div class='add'>+	mbus-&gt;priv = priv;</div><div class='add'>+	mbus-&gt;read = yt921x_mbus_int_read;</div><div class='add'>+	mbus-&gt;write = yt921x_mbus_int_write;</div><div class='add'>+	mbus-&gt;parent = dev;</div><div class='add'>+	mbus-&gt;phy_mask = (u32)~GENMASK(YT921X_PORT_NUM - 1, 0);</div><div class='add'>+</div><div class='add'>+	res = devm_of_mdiobus_register(dev, mbus, mnp);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	priv-&gt;mbus_int = mbus;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_extif_wait(struct yt921x_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 val = 0;</div><div class='add'>+</div><div class='add'>+	return yt921x_reg_wait(priv, YT921X_EXT_MBUS_OP, YT921X_MBUS_OP_START,</div><div class='add'>+			       &amp;val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_extif_read(struct yt921x_priv *priv, int port, int reg, u16 *valp)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = to_device(priv);</div><div class='add'>+	u32 mask;</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	u32 val;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_extif_wait(priv);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	mask = YT921X_MBUS_CTRL_PORT_M | YT921X_MBUS_CTRL_REG_M |</div><div class='add'>+	       YT921X_MBUS_CTRL_TYPE_M | YT921X_MBUS_CTRL_OP_M;</div><div class='add'>+	ctrl = YT921X_MBUS_CTRL_PORT(port) | YT921X_MBUS_CTRL_REG(reg) |</div><div class='add'>+	       YT921X_MBUS_CTRL_TYPE_C22 | YT921X_MBUS_CTRL_READ;</div><div class='add'>+	res = yt921x_reg_update_bits(priv, YT921X_EXT_MBUS_CTRL, mask, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_EXT_MBUS_OP, YT921X_MBUS_OP_START);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_extif_wait(priv);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	res = yt921x_reg_read(priv, YT921X_EXT_MBUS_DIN, &amp;val);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	if ((u16)val != val)</div><div class='add'>+		dev_info(dev,</div><div class='add'>+			 "%s: port %d, reg 0x%x: Expected u16, got 0x%08x\n",</div><div class='add'>+			 __func__, port, reg, val);</div><div class='add'>+	*valp = (u16)val;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_extif_write(struct yt921x_priv *priv, int port, int reg, u16 val)</div><div class='add'>+{</div><div class='add'>+	u32 mask;</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_extif_wait(priv);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	mask = YT921X_MBUS_CTRL_PORT_M | YT921X_MBUS_CTRL_REG_M |</div><div class='add'>+	       YT921X_MBUS_CTRL_TYPE_M | YT921X_MBUS_CTRL_OP_M;</div><div class='add'>+	ctrl = YT921X_MBUS_CTRL_PORT(port) | YT921X_MBUS_CTRL_REG(reg) |</div><div class='add'>+	       YT921X_MBUS_CTRL_TYPE_C22 | YT921X_MBUS_CTRL_WRITE;</div><div class='add'>+	res = yt921x_reg_update_bits(priv, YT921X_EXT_MBUS_CTRL, mask, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_EXT_MBUS_DOUT, val);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_EXT_MBUS_OP, YT921X_MBUS_OP_START);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	return yt921x_extif_wait(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_mbus_ext_read(struct mii_bus *mbus, int port, int reg)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = mbus-&gt;priv;</div><div class='add'>+	u16 val;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_extif_read(priv, port, reg, &amp;val);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_mbus_ext_write(struct mii_bus *mbus, int port, int reg, u16 data)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = mbus-&gt;priv;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_extif_write(priv, port, reg, data);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_mbus_ext_init(struct yt921x_priv *priv, struct device_node *mnp)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = to_device(priv);</div><div class='add'>+	struct mii_bus *mbus;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mbus = devm_mdiobus_alloc(dev);</div><div class='add'>+	if (!mbus)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mbus-&gt;name = "YT921x external MDIO bus";</div><div class='add'>+	snprintf(mbus-&gt;id, MII_BUS_ID_SIZE, "%s@ext", dev_name(dev));</div><div class='add'>+	mbus-&gt;priv = priv;</div><div class='add'>+	/* TODO: c45? */</div><div class='add'>+	mbus-&gt;read = yt921x_mbus_ext_read;</div><div class='add'>+	mbus-&gt;write = yt921x_mbus_ext_write;</div><div class='add'>+	mbus-&gt;parent = dev;</div><div class='add'>+</div><div class='add'>+	res = devm_of_mdiobus_register(dev, mbus, mnp);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	priv-&gt;mbus_ext = mbus;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Read and handle overflow of 32bit MIBs. MIB buffer must be zeroed before. */</div><div class='add'>+static int yt921x_read_mib(struct yt921x_priv *priv, int port)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_port *pp = &amp;priv-&gt;ports[port];</div><div class='add'>+	struct device *dev = to_device(priv);</div><div class='add'>+	struct yt921x_mib *mib = &amp;pp-&gt;mib;</div><div class='add'>+	int res = 0;</div><div class='add'>+</div><div class='add'>+	/* Reading of yt921x_port::mib is not protected by a lock and it's vain</div><div class='add'>+	 * to keep its consistency, since we have to read registers one by one</div><div class='add'>+	 * and there is no way to make a snapshot of MIB stats.</div><div class='add'>+	 *</div><div class='add'>+	 * Writing (by this function only) is and should be protected by</div><div class='add'>+	 * reg_lock.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	for (size_t i = 0; i &lt; ARRAY_SIZE(yt921x_mib_descs); i++) {</div><div class='add'>+		const struct yt921x_mib_desc *desc = &amp;yt921x_mib_descs[i];</div><div class='add'>+		u32 reg = YT921X_MIBn_DATA0(port) + desc-&gt;offset;</div><div class='add'>+		u64 *valp = &amp;((u64 *)mib)[i];</div><div class='add'>+		u64 val = *valp;</div><div class='add'>+		u32 val0;</div><div class='add'>+		u32 val1;</div><div class='add'>+</div><div class='add'>+		res = yt921x_reg_read(priv, reg, &amp;val0);</div><div class='add'>+		if (res)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if (desc-&gt;size &lt;= 1) {</div><div class='add'>+			if (val &lt; (u32)val)</div><div class='add'>+				/* overflow */</div><div class='add'>+				val += (u64)U32_MAX + 1;</div><div class='add'>+			val &amp;= ~U32_MAX;</div><div class='add'>+			val |= val0;</div><div class='add'>+		} else {</div><div class='add'>+			res = yt921x_reg_read(priv, reg + 4, &amp;val1);</div><div class='add'>+			if (res)</div><div class='add'>+				break;</div><div class='add'>+			val = ((u64)val1 &lt;&lt; 32) | val0;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		WRITE_ONCE(*valp, val);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pp-&gt;rx_frames = mib-&gt;rx_64byte + mib-&gt;rx_65_127byte +</div><div class='add'>+			mib-&gt;rx_128_255byte + mib-&gt;rx_256_511byte +</div><div class='add'>+			mib-&gt;rx_512_1023byte + mib-&gt;rx_1024_1518byte +</div><div class='add'>+			mib-&gt;rx_jumbo;</div><div class='add'>+	pp-&gt;tx_frames = mib-&gt;tx_64byte + mib-&gt;tx_65_127byte +</div><div class='add'>+			mib-&gt;tx_128_255byte + mib-&gt;tx_256_511byte +</div><div class='add'>+			mib-&gt;tx_512_1023byte + mib-&gt;tx_1024_1518byte +</div><div class='add'>+			mib-&gt;tx_jumbo;</div><div class='add'>+</div><div class='add'>+	if (res)</div><div class='add'>+		dev_err(dev, "Failed to %s port %d: %i\n", "read stats for",</div><div class='add'>+			port, res);</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void yt921x_poll_mib(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_port *pp = container_of_const(work, struct yt921x_port,</div><div class='add'>+						    mib_read.work);</div><div class='add'>+	struct yt921x_priv *priv = (void *)(pp - pp-&gt;index) -</div><div class='add'>+				   offsetof(struct yt921x_priv, ports);</div><div class='add'>+	unsigned long delay = YT921X_STATS_INTERVAL_JIFFIES;</div><div class='add'>+	int port = pp-&gt;index;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_read_mib(priv, port);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	if (res)</div><div class='add'>+		delay *= 4;</div><div class='add'>+</div><div class='add'>+	schedule_delayed_work(&amp;pp-&gt;mib_read, delay);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+yt921x_dsa_get_strings(struct dsa_switch *ds, int port, u32 stringset,</div><div class='add'>+		       uint8_t *data)</div><div class='add'>+{</div><div class='add'>+	if (stringset != ETH_SS_STATS)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (size_t i = 0; i &lt; ARRAY_SIZE(yt921x_mib_descs); i++) {</div><div class='add'>+		const struct yt921x_mib_desc *desc = &amp;yt921x_mib_descs[i];</div><div class='add'>+</div><div class='add'>+		if (desc-&gt;name)</div><div class='add'>+			ethtool_puts(&amp;data, desc-&gt;name);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+yt921x_dsa_get_ethtool_stats(struct dsa_switch *ds, int port, uint64_t *data)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	struct yt921x_port *pp = &amp;priv-&gt;ports[port];</div><div class='add'>+	struct yt921x_mib *mib = &amp;pp-&gt;mib;</div><div class='add'>+	size_t j;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	yt921x_read_mib(priv, port);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	j = 0;</div><div class='add'>+	for (size_t i = 0; i &lt; ARRAY_SIZE(yt921x_mib_descs); i++) {</div><div class='add'>+		const struct yt921x_mib_desc *desc = &amp;yt921x_mib_descs[i];</div><div class='add'>+</div><div class='add'>+		if (!desc-&gt;name)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		data[j] = ((u64 *)mib)[i];</div><div class='add'>+		j++;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_dsa_get_sset_count(struct dsa_switch *ds, int port, int sset)</div><div class='add'>+{</div><div class='add'>+	int cnt = 0;</div><div class='add'>+</div><div class='add'>+	if (sset != ETH_SS_STATS)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	for (size_t i = 0; i &lt; ARRAY_SIZE(yt921x_mib_descs); i++) {</div><div class='add'>+		const struct yt921x_mib_desc *desc = &amp;yt921x_mib_descs[i];</div><div class='add'>+</div><div class='add'>+		if (desc-&gt;name)</div><div class='add'>+			cnt++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return cnt;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+yt921x_dsa_get_eth_mac_stats(struct dsa_switch *ds, int port,</div><div class='add'>+			     struct ethtool_eth_mac_stats *mac_stats)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	struct yt921x_port *pp = &amp;priv-&gt;ports[port];</div><div class='add'>+	struct yt921x_mib *mib = &amp;pp-&gt;mib;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	yt921x_read_mib(priv, port);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	mac_stats-&gt;FramesTransmittedOK = pp-&gt;tx_frames;</div><div class='add'>+	mac_stats-&gt;SingleCollisionFrames = mib-&gt;tx_single_collisions;</div><div class='add'>+	mac_stats-&gt;MultipleCollisionFrames = mib-&gt;tx_multiple_collisions;</div><div class='add'>+	mac_stats-&gt;FramesReceivedOK = pp-&gt;rx_frames;</div><div class='add'>+	mac_stats-&gt;FrameCheckSequenceErrors = mib-&gt;rx_crc_errors;</div><div class='add'>+	mac_stats-&gt;AlignmentErrors = mib-&gt;rx_alignment_errors;</div><div class='add'>+	mac_stats-&gt;OctetsTransmittedOK = mib-&gt;tx_good_bytes;</div><div class='add'>+	mac_stats-&gt;FramesWithDeferredXmissions = mib-&gt;tx_deferred;</div><div class='add'>+	mac_stats-&gt;LateCollisions = mib-&gt;tx_late_collisions;</div><div class='add'>+	mac_stats-&gt;FramesAbortedDueToXSColls = mib-&gt;tx_aborted_errors;</div><div class='add'>+	/* mac_stats-&gt;FramesLostDueToIntMACXmitError */</div><div class='add'>+	/* mac_stats-&gt;CarrierSenseErrors */</div><div class='add'>+	mac_stats-&gt;OctetsReceivedOK = mib-&gt;rx_good_bytes;</div><div class='add'>+	/* mac_stats-&gt;FramesLostDueToIntMACRcvError */</div><div class='add'>+	mac_stats-&gt;MulticastFramesXmittedOK = mib-&gt;tx_multicast;</div><div class='add'>+	mac_stats-&gt;BroadcastFramesXmittedOK = mib-&gt;tx_broadcast;</div><div class='add'>+	/* mac_stats-&gt;FramesWithExcessiveDeferral */</div><div class='add'>+	mac_stats-&gt;MulticastFramesReceivedOK = mib-&gt;rx_multicast;</div><div class='add'>+	mac_stats-&gt;BroadcastFramesReceivedOK = mib-&gt;rx_broadcast;</div><div class='add'>+	/* mac_stats-&gt;InRangeLengthErrors */</div><div class='add'>+	/* mac_stats-&gt;OutOfRangeLengthField */</div><div class='add'>+	mac_stats-&gt;FrameTooLongErrors = mib-&gt;rx_oversize_errors;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+yt921x_dsa_get_eth_ctrl_stats(struct dsa_switch *ds, int port,</div><div class='add'>+			      struct ethtool_eth_ctrl_stats *ctrl_stats)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	struct yt921x_port *pp = &amp;priv-&gt;ports[port];</div><div class='add'>+	struct yt921x_mib *mib = &amp;pp-&gt;mib;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	yt921x_read_mib(priv, port);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	ctrl_stats-&gt;MACControlFramesTransmitted = mib-&gt;tx_pause;</div><div class='add'>+	ctrl_stats-&gt;MACControlFramesReceived = mib-&gt;rx_pause;</div><div class='add'>+	/* ctrl_stats-&gt;UnsupportedOpcodesReceived */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ethtool_rmon_hist_range yt921x_rmon_ranges[] = {</div><div class='add'>+	{ 0, 64 },</div><div class='add'>+	{ 65, 127 },</div><div class='add'>+	{ 128, 255 },</div><div class='add'>+	{ 256, 511 },</div><div class='add'>+	{ 512, 1023 },</div><div class='add'>+	{ 1024, 1518 },</div><div class='add'>+	{ 1519, YT921X_FRAME_SIZE_MAX },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+yt921x_dsa_get_rmon_stats(struct dsa_switch *ds, int port,</div><div class='add'>+			  struct ethtool_rmon_stats *rmon_stats,</div><div class='add'>+			  const struct ethtool_rmon_hist_range **ranges)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	struct yt921x_port *pp = &amp;priv-&gt;ports[port];</div><div class='add'>+	struct yt921x_mib *mib = &amp;pp-&gt;mib;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	yt921x_read_mib(priv, port);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	*ranges = yt921x_rmon_ranges;</div><div class='add'>+</div><div class='add'>+	rmon_stats-&gt;undersize_pkts = mib-&gt;rx_undersize_errors;</div><div class='add'>+	rmon_stats-&gt;oversize_pkts = mib-&gt;rx_oversize_errors;</div><div class='add'>+	rmon_stats-&gt;fragments = mib-&gt;rx_alignment_errors;</div><div class='add'>+	/* rmon_stats-&gt;jabbers */</div><div class='add'>+</div><div class='add'>+	rmon_stats-&gt;hist[0] = mib-&gt;rx_64byte;</div><div class='add'>+	rmon_stats-&gt;hist[1] = mib-&gt;rx_65_127byte;</div><div class='add'>+	rmon_stats-&gt;hist[2] = mib-&gt;rx_128_255byte;</div><div class='add'>+	rmon_stats-&gt;hist[3] = mib-&gt;rx_256_511byte;</div><div class='add'>+	rmon_stats-&gt;hist[4] = mib-&gt;rx_512_1023byte;</div><div class='add'>+	rmon_stats-&gt;hist[5] = mib-&gt;rx_1024_1518byte;</div><div class='add'>+	rmon_stats-&gt;hist[6] = mib-&gt;rx_jumbo;</div><div class='add'>+</div><div class='add'>+	rmon_stats-&gt;hist_tx[0] = mib-&gt;tx_64byte;</div><div class='add'>+	rmon_stats-&gt;hist_tx[1] = mib-&gt;tx_65_127byte;</div><div class='add'>+	rmon_stats-&gt;hist_tx[2] = mib-&gt;tx_128_255byte;</div><div class='add'>+	rmon_stats-&gt;hist_tx[3] = mib-&gt;tx_256_511byte;</div><div class='add'>+	rmon_stats-&gt;hist_tx[4] = mib-&gt;tx_512_1023byte;</div><div class='add'>+	rmon_stats-&gt;hist_tx[5] = mib-&gt;tx_1024_1518byte;</div><div class='add'>+	rmon_stats-&gt;hist_tx[6] = mib-&gt;tx_jumbo;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+yt921x_dsa_get_stats64(struct dsa_switch *ds, int port,</div><div class='add'>+		       struct rtnl_link_stats64 *stats)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	struct yt921x_port *pp = &amp;priv-&gt;ports[port];</div><div class='add'>+	struct yt921x_mib *mib = &amp;pp-&gt;mib;</div><div class='add'>+</div><div class='add'>+	stats-&gt;rx_length_errors = mib-&gt;rx_undersize_errors +</div><div class='add'>+				  mib-&gt;rx_fragment_errors;</div><div class='add'>+	stats-&gt;rx_over_errors = mib-&gt;rx_oversize_errors;</div><div class='add'>+	stats-&gt;rx_crc_errors = mib-&gt;rx_crc_errors;</div><div class='add'>+	stats-&gt;rx_frame_errors = mib-&gt;rx_alignment_errors;</div><div class='add'>+	/* stats-&gt;rx_fifo_errors */</div><div class='add'>+	/* stats-&gt;rx_missed_errors */</div><div class='add'>+</div><div class='add'>+	stats-&gt;tx_aborted_errors = mib-&gt;tx_aborted_errors;</div><div class='add'>+	/* stats-&gt;tx_carrier_errors */</div><div class='add'>+	stats-&gt;tx_fifo_errors = mib-&gt;tx_undersize_errors;</div><div class='add'>+	/* stats-&gt;tx_heartbeat_errors */</div><div class='add'>+	stats-&gt;tx_window_errors = mib-&gt;tx_late_collisions;</div><div class='add'>+</div><div class='add'>+	stats-&gt;rx_packets = pp-&gt;rx_frames;</div><div class='add'>+	stats-&gt;tx_packets = pp-&gt;tx_frames;</div><div class='add'>+	stats-&gt;rx_bytes = mib-&gt;rx_good_bytes - ETH_FCS_LEN * stats-&gt;rx_packets;</div><div class='add'>+	stats-&gt;tx_bytes = mib-&gt;tx_good_bytes - ETH_FCS_LEN * stats-&gt;tx_packets;</div><div class='add'>+	stats-&gt;rx_errors = stats-&gt;rx_length_errors + stats-&gt;rx_over_errors +</div><div class='add'>+			   stats-&gt;rx_crc_errors + stats-&gt;rx_frame_errors;</div><div class='add'>+	stats-&gt;tx_errors = stats-&gt;tx_aborted_errors + stats-&gt;tx_fifo_errors +</div><div class='add'>+			   stats-&gt;tx_window_errors;</div><div class='add'>+	stats-&gt;rx_dropped = mib-&gt;rx_dropped;</div><div class='add'>+	/* stats-&gt;tx_dropped */</div><div class='add'>+	stats-&gt;multicast = mib-&gt;rx_multicast;</div><div class='add'>+	stats-&gt;collisions = mib-&gt;tx_collisions;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+yt921x_dsa_get_pause_stats(struct dsa_switch *ds, int port,</div><div class='add'>+			   struct ethtool_pause_stats *pause_stats)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	struct yt921x_port *pp = &amp;priv-&gt;ports[port];</div><div class='add'>+	struct yt921x_mib *mib = &amp;pp-&gt;mib;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	yt921x_read_mib(priv, port);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	pause_stats-&gt;tx_pause_frames = mib-&gt;tx_pause;</div><div class='add'>+	pause_stats-&gt;rx_pause_frames = mib-&gt;rx_pause;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_set_eee(struct yt921x_priv *priv, int port, struct ethtool_keee *e)</div><div class='add'>+{</div><div class='add'>+	/* Poor datasheet for EEE operations; don't ask if you are confused */</div><div class='add'>+</div><div class='add'>+	bool enable = e-&gt;eee_enabled;</div><div class='add'>+	u16 new_mask;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	/* Enable / disable global EEE */</div><div class='add'>+	new_mask = priv-&gt;eee_ports_mask;</div><div class='add'>+	new_mask &amp;= ~BIT(port);</div><div class='add'>+	new_mask |= !enable ? 0 : BIT(port);</div><div class='add'>+</div><div class='add'>+	if (!!new_mask != !!priv-&gt;eee_ports_mask) {</div><div class='add'>+		res = yt921x_reg_toggle_bits(priv, YT921X_PON_STRAP_FUNC,</div><div class='add'>+					     YT921X_PON_STRAP_EEE, !!new_mask);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+		res = yt921x_reg_toggle_bits(priv, YT921X_PON_STRAP_VAL,</div><div class='add'>+					     YT921X_PON_STRAP_EEE, !!new_mask);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;eee_ports_mask = new_mask;</div><div class='add'>+</div><div class='add'>+	/* Enable / disable port EEE */</div><div class='add'>+	res = yt921x_reg_toggle_bits(priv, YT921X_EEE_CTRL,</div><div class='add'>+				     YT921X_EEE_CTRL_ENn(port), enable);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	res = yt921x_reg_toggle_bits(priv, YT921X_EEEn_VAL(port),</div><div class='add'>+				     YT921X_EEE_VAL_DATA, enable);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_dsa_set_mac_eee(struct dsa_switch *ds, int port, struct ethtool_keee *e)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_set_eee(priv, port, e);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_dsa_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu)</div><div class='add'>+{</div><div class='add'>+	/* Only serves as packet filter, since the frame size is always set to</div><div class='add'>+	 * maximum after reset</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(ds, port);</div><div class='add'>+	int frame_size;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	frame_size = new_mtu + ETH_HLEN + ETH_FCS_LEN;</div><div class='add'>+	if (dsa_port_is_cpu(dp))</div><div class='add'>+		frame_size += YT921X_TAG_LEN;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_reg_update_bits(priv, YT921X_MACn_FRAME(port),</div><div class='add'>+				     YT921X_MAC_FRAME_SIZE_M,</div><div class='add'>+				     YT921X_MAC_FRAME_SIZE(frame_size));</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_dsa_port_max_mtu(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	/* Only called for user ports, exclude tag len here */</div><div class='add'>+	return YT921X_FRAME_SIZE_MAX - ETH_HLEN - ETH_FCS_LEN - YT921X_TAG_LEN;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_mirror_del(struct yt921x_priv *priv, int port, bool ingress)</div><div class='add'>+{</div><div class='add'>+	u32 mask;</div><div class='add'>+</div><div class='add'>+	if (ingress)</div><div class='add'>+		mask = YT921X_MIRROR_IGR_PORTn(port);</div><div class='add'>+	else</div><div class='add'>+		mask = YT921X_MIRROR_EGR_PORTn(port);</div><div class='add'>+	return yt921x_reg_clear_bits(priv, YT921X_MIRROR, mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_mirror_add(struct yt921x_priv *priv, int port, bool ingress,</div><div class='add'>+		  int to_local_port, struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	u32 srcs;</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	u32 val;</div><div class='add'>+	u32 dst;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	if (ingress)</div><div class='add'>+		srcs = YT921X_MIRROR_IGR_PORTn(port);</div><div class='add'>+	else</div><div class='add'>+		srcs = YT921X_MIRROR_EGR_PORTn(port);</div><div class='add'>+	dst = YT921X_MIRROR_PORT(to_local_port);</div><div class='add'>+</div><div class='add'>+	res = yt921x_reg_read(priv, YT921X_MIRROR, &amp;val);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	/* other mirror tasks &amp; different dst port -&gt; conflict */</div><div class='add'>+	if ((val &amp; ~srcs &amp; (YT921X_MIRROR_EGR_PORTS_M |</div><div class='add'>+			    YT921X_MIRROR_IGR_PORTS_M)) &amp;&amp;</div><div class='add'>+	    (val &amp; YT921X_MIRROR_PORT_M) != dst) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Sniffer port is already configured, delete existing rules &amp; retry");</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ctrl = val &amp; ~YT921X_MIRROR_PORT_M;</div><div class='add'>+	ctrl |= srcs;</div><div class='add'>+	ctrl |= dst;</div><div class='add'>+</div><div class='add'>+	if (ctrl == val)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return yt921x_reg_write(priv, YT921X_MIRROR, ctrl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+yt921x_dsa_port_mirror_del(struct dsa_switch *ds, int port,</div><div class='add'>+			   struct dsa_mall_mirror_tc_entry *mirror)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	struct device *dev = to_device(priv);</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_mirror_del(priv, port, mirror-&gt;ingress);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	if (res)</div><div class='add'>+		dev_err(dev, "Failed to %s port %d: %i\n", "unmirror",</div><div class='add'>+			port, res);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_dsa_port_mirror_add(struct dsa_switch *ds, int port,</div><div class='add'>+			   struct dsa_mall_mirror_tc_entry *mirror,</div><div class='add'>+			   bool ingress, struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_mirror_add(priv, port, ingress,</div><div class='add'>+				mirror-&gt;to_local_port, extack);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_fdb_wait(struct yt921x_priv *priv, u32 *valp)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = to_device(priv);</div><div class='add'>+	u32 val = YT921X_FDB_RESULT_DONE;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_reg_wait(priv, YT921X_FDB_RESULT, YT921X_FDB_RESULT_DONE,</div><div class='add'>+			      &amp;val);</div><div class='add'>+	if (res) {</div><div class='add'>+		dev_err(dev, "FDB probably stuck\n");</div><div class='add'>+		return res;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*valp = val;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_fdb_in01(struct yt921x_priv *priv, const unsigned char *addr,</div><div class='add'>+		u16 vid, u32 ctrl1)</div><div class='add'>+{</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	ctrl = (addr[0] &lt;&lt; 24) | (addr[1] &lt;&lt; 16) | (addr[2] &lt;&lt; 8) | addr[3];</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_FDB_IN0, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	ctrl = ctrl1 | YT921X_FDB_IO1_FID(vid) | (addr[4] &lt;&lt; 8) | addr[5];</div><div class='add'>+	return yt921x_reg_write(priv, YT921X_FDB_IN1, ctrl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_fdb_has(struct yt921x_priv *priv, const unsigned char *addr, u16 vid,</div><div class='add'>+	       u16 *indexp)</div><div class='add'>+{</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	u32 val;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_fdb_in01(priv, addr, vid, 0);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	ctrl = 0;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_FDB_IN2, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	ctrl = YT921X_FDB_OP_OP_GET_ONE | YT921X_FDB_OP_START;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_FDB_OP, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_fdb_wait(priv, &amp;val);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	if (val &amp; YT921X_FDB_RESULT_NOTFOUND) {</div><div class='add'>+		*indexp = YT921X_FDB_NUM;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*indexp = FIELD_GET(YT921X_FDB_RESULT_INDEX_M, val);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_fdb_read(struct yt921x_priv *priv, unsigned char *addr, u16 *vidp,</div><div class='add'>+		u16 *ports_maskp, u16 *indexp, u8 *statusp)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = to_device(priv);</div><div class='add'>+	u16 index;</div><div class='add'>+	u32 data0;</div><div class='add'>+	u32 data1;</div><div class='add'>+	u32 data2;</div><div class='add'>+	u32 val;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_fdb_wait(priv, &amp;val);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	if (val &amp; YT921X_FDB_RESULT_NOTFOUND) {</div><div class='add'>+		*ports_maskp = 0;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+	index = FIELD_GET(YT921X_FDB_RESULT_INDEX_M, val);</div><div class='add'>+</div><div class='add'>+	res = yt921x_reg_read(priv, YT921X_FDB_OUT1, &amp;data1);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	if ((data1 &amp; YT921X_FDB_IO1_STATUS_M) ==</div><div class='add'>+	    YT921X_FDB_IO1_STATUS_INVALID) {</div><div class='add'>+		*ports_maskp = 0;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	res = yt921x_reg_read(priv, YT921X_FDB_OUT0, &amp;data0);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	res = yt921x_reg_read(priv, YT921X_FDB_OUT2, &amp;data2);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	addr[0] = data0 &gt;&gt; 24;</div><div class='add'>+	addr[1] = data0 &gt;&gt; 16;</div><div class='add'>+	addr[2] = data0 &gt;&gt; 8;</div><div class='add'>+	addr[3] = data0;</div><div class='add'>+	addr[4] = data1 &gt;&gt; 8;</div><div class='add'>+	addr[5] = data1;</div><div class='add'>+	*vidp = FIELD_GET(YT921X_FDB_IO1_FID_M, data1);</div><div class='add'>+	*indexp = index;</div><div class='add'>+	*ports_maskp = FIELD_GET(YT921X_FDB_IO2_EGR_PORTS_M, data2);</div><div class='add'>+	*statusp = FIELD_GET(YT921X_FDB_IO1_STATUS_M, data1);</div><div class='add'>+</div><div class='add'>+	dev_dbg(dev,</div><div class='add'>+		"%s: index 0x%x, mac %02x:%02x:%02x:%02x:%02x:%02x, vid %d, ports 0x%x, status %d\n",</div><div class='add'>+		__func__, *indexp, addr[0], addr[1], addr[2], addr[3],</div><div class='add'>+		addr[4], addr[5], *vidp, *ports_maskp, *statusp);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_fdb_dump(struct yt921x_priv *priv, u16 ports_mask,</div><div class='add'>+		dsa_fdb_dump_cb_t *cb, void *data)</div><div class='add'>+{</div><div class='add'>+	unsigned char addr[ETH_ALEN];</div><div class='add'>+	u8 status;</div><div class='add'>+	u16 pmask;</div><div class='add'>+	u16 index;</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	u16 vid;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	ctrl = YT921X_FDB_OP_INDEX(0) | YT921X_FDB_OP_MODE_INDEX |</div><div class='add'>+	       YT921X_FDB_OP_OP_GET_ONE | YT921X_FDB_OP_START;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_FDB_OP, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	res = yt921x_fdb_read(priv, addr, &amp;vid, &amp;pmask, &amp;index, &amp;status);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	if ((pmask &amp; ports_mask) &amp;&amp; !is_multicast_ether_addr(addr)) {</div><div class='add'>+		res = cb(addr, vid,</div><div class='add'>+			 status == YT921X_FDB_ENTRY_STATUS_STATIC, data);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ctrl = YT921X_FDB_IO2_EGR_PORTS(ports_mask);</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_FDB_IN2, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	index = 0;</div><div class='add'>+	do {</div><div class='add'>+		ctrl = YT921X_FDB_OP_INDEX(index) | YT921X_FDB_OP_MODE_INDEX |</div><div class='add'>+		       YT921X_FDB_OP_NEXT_TYPE_UCAST_PORT |</div><div class='add'>+		       YT921X_FDB_OP_OP_GET_NEXT | YT921X_FDB_OP_START;</div><div class='add'>+		res = yt921x_reg_write(priv, YT921X_FDB_OP, ctrl);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+</div><div class='add'>+		res = yt921x_fdb_read(priv, addr, &amp;vid, &amp;pmask, &amp;index,</div><div class='add'>+				      &amp;status);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+		if (!pmask)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if ((pmask &amp; ports_mask) &amp;&amp; !is_multicast_ether_addr(addr)) {</div><div class='add'>+			res = cb(addr, vid,</div><div class='add'>+				 status == YT921X_FDB_ENTRY_STATUS_STATIC,</div><div class='add'>+				 data);</div><div class='add'>+			if (res)</div><div class='add'>+				return res;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Never call GET_NEXT with 4095, otherwise it will hang</div><div class='add'>+		 * forever until a reset!</div><div class='add'>+		 */</div><div class='add'>+	} while (index &lt; YT921X_FDB_NUM - 1);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_fdb_flush_raw(struct yt921x_priv *priv, u16 ports_mask, u16 vid,</div><div class='add'>+		     bool flush_static)</div><div class='add'>+{</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	u32 val;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	if (vid &lt; 4096) {</div><div class='add'>+		ctrl = YT921X_FDB_IO1_FID(vid);</div><div class='add'>+		res = yt921x_reg_write(priv, YT921X_FDB_IN1, ctrl);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ctrl = YT921X_FDB_IO2_EGR_PORTS(ports_mask);</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_FDB_IN2, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	ctrl = YT921X_FDB_OP_OP_FLUSH | YT921X_FDB_OP_START;</div><div class='add'>+	if (vid &gt;= 4096)</div><div class='add'>+		ctrl |= YT921X_FDB_OP_FLUSH_PORT;</div><div class='add'>+	else</div><div class='add'>+		ctrl |= YT921X_FDB_OP_FLUSH_PORT_VID;</div><div class='add'>+	if (flush_static)</div><div class='add'>+		ctrl |= YT921X_FDB_OP_FLUSH_STATIC;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_FDB_OP, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_fdb_wait(priv, &amp;val);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_fdb_flush_port(struct yt921x_priv *priv, int port, bool flush_static)</div><div class='add'>+{</div><div class='add'>+	return yt921x_fdb_flush_raw(priv, BIT(port), 4096, flush_static);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_fdb_add_index_in12(struct yt921x_priv *priv, u16 index, u16 ctrl1,</div><div class='add'>+			  u16 ctrl2)</div><div class='add'>+{</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	u32 val;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_FDB_IN1, ctrl1);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_FDB_IN2, ctrl2);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	ctrl = YT921X_FDB_OP_INDEX(index) | YT921X_FDB_OP_MODE_INDEX |</div><div class='add'>+	       YT921X_FDB_OP_OP_ADD | YT921X_FDB_OP_START;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_FDB_OP, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	return yt921x_fdb_wait(priv, &amp;val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_fdb_add(struct yt921x_priv *priv, const unsigned char *addr, u16 vid,</div><div class='add'>+	       u16 ports_mask)</div><div class='add'>+{</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	u32 val;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	ctrl = YT921X_FDB_IO1_STATUS_STATIC;</div><div class='add'>+	res = yt921x_fdb_in01(priv, addr, vid, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	ctrl = YT921X_FDB_IO2_EGR_PORTS(ports_mask);</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_FDB_IN2, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	ctrl = YT921X_FDB_OP_OP_ADD | YT921X_FDB_OP_START;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_FDB_OP, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	return yt921x_fdb_wait(priv, &amp;val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_fdb_leave(struct yt921x_priv *priv, const unsigned char *addr,</div><div class='add'>+		 u16 vid, u16 ports_mask)</div><div class='add'>+{</div><div class='add'>+	u16 index;</div><div class='add'>+	u32 ctrl1;</div><div class='add'>+	u32 ctrl2;</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	u32 val2;</div><div class='add'>+	u32 val;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	/* Check for presence */</div><div class='add'>+	res = yt921x_fdb_has(priv, addr, vid, &amp;index);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	if (index &gt;= YT921X_FDB_NUM)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Check if action required */</div><div class='add'>+	res = yt921x_reg_read(priv, YT921X_FDB_OUT2, &amp;val2);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	ctrl2 = val2 &amp; ~YT921X_FDB_IO2_EGR_PORTS(ports_mask);</div><div class='add'>+	if (ctrl2 == val2)</div><div class='add'>+		return 0;</div><div class='add'>+	if (!(ctrl2 &amp; YT921X_FDB_IO2_EGR_PORTS_M)) {</div><div class='add'>+		ctrl = YT921X_FDB_OP_OP_DEL | YT921X_FDB_OP_START;</div><div class='add'>+		res = yt921x_reg_write(priv, YT921X_FDB_OP, ctrl);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+</div><div class='add'>+		return yt921x_fdb_wait(priv, &amp;val);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	res = yt921x_reg_read(priv, YT921X_FDB_OUT1, &amp;ctrl1);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	return yt921x_fdb_add_index_in12(priv, index, ctrl1, ctrl2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_fdb_join(struct yt921x_priv *priv, const unsigned char *addr, u16 vid,</div><div class='add'>+		u16 ports_mask)</div><div class='add'>+{</div><div class='add'>+	u16 index;</div><div class='add'>+	u32 ctrl1;</div><div class='add'>+	u32 ctrl2;</div><div class='add'>+	u32 val1;</div><div class='add'>+	u32 val2;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	/* Check for presence */</div><div class='add'>+	res = yt921x_fdb_has(priv, addr, vid, &amp;index);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	if (index &gt;= YT921X_FDB_NUM)</div><div class='add'>+		return yt921x_fdb_add(priv, addr, vid, ports_mask);</div><div class='add'>+</div><div class='add'>+	/* Check if action required */</div><div class='add'>+	res = yt921x_reg_read(priv, YT921X_FDB_OUT1, &amp;val1);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	res = yt921x_reg_read(priv, YT921X_FDB_OUT2, &amp;val2);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	ctrl1 = val1 &amp; ~YT921X_FDB_IO1_STATUS_M;</div><div class='add'>+	ctrl1 |= YT921X_FDB_IO1_STATUS_STATIC;</div><div class='add'>+	ctrl2 = val2 | YT921X_FDB_IO2_EGR_PORTS(ports_mask);</div><div class='add'>+	if (ctrl1 == val1 &amp;&amp; ctrl2 == val2)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return yt921x_fdb_add_index_in12(priv, index, ctrl1, ctrl2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_dsa_port_fdb_dump(struct dsa_switch *ds, int port,</div><div class='add'>+			 dsa_fdb_dump_cb_t *cb, void *data)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	/* Hardware FDB is shared for fdb and mdb, "bridge fdb show"</div><div class='add'>+	 * only wants to see unicast</div><div class='add'>+	 */</div><div class='add'>+	res = yt921x_fdb_dump(priv, BIT(port), cb, data);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void yt921x_dsa_port_fast_age(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	struct device *dev = to_device(priv);</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_fdb_flush_port(priv, port, false);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	if (res)</div><div class='add'>+		dev_err(dev, "Failed to %s port %d: %i\n", "clear FDB for",</div><div class='add'>+			port, res);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_dsa_set_ageing_time(struct dsa_switch *ds, unsigned int msecs)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	/* AGEING reg is set in 5s step */</div><div class='add'>+	ctrl = clamp(msecs / 5000, 1, U16_MAX);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_AGEING, ctrl);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_dsa_port_fdb_del(struct dsa_switch *ds, int port,</div><div class='add'>+			const unsigned char *addr, u16 vid, struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_fdb_leave(priv, addr, vid, BIT(port));</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_dsa_port_fdb_add(struct dsa_switch *ds, int port,</div><div class='add'>+			const unsigned char *addr, u16 vid, struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_fdb_join(priv, addr, vid, BIT(port));</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_dsa_port_mdb_del(struct dsa_switch *ds, int port,</div><div class='add'>+			const struct switchdev_obj_port_mdb *mdb,</div><div class='add'>+			struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	const unsigned char *addr = mdb-&gt;addr;</div><div class='add'>+	u16 vid = mdb-&gt;vid;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_fdb_leave(priv, addr, vid, BIT(port));</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_dsa_port_mdb_add(struct dsa_switch *ds, int port,</div><div class='add'>+			const struct switchdev_obj_port_mdb *mdb,</div><div class='add'>+			struct dsa_db db)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	const unsigned char *addr = mdb-&gt;addr;</div><div class='add'>+	u16 vid = mdb-&gt;vid;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_fdb_join(priv, addr, vid, BIT(port));</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_port_set_pvid(struct yt921x_priv *priv, int port, u16 vid)</div><div class='add'>+{</div><div class='add'>+	u32 mask;</div><div class='add'>+	u32 ctrl;</div><div class='add'>+</div><div class='add'>+	mask = YT921X_PORT_VLAN_CTRL_CVID_M;</div><div class='add'>+	ctrl = YT921X_PORT_VLAN_CTRL_CVID(vid);</div><div class='add'>+	return yt921x_reg_update_bits(priv, YT921X_PORTn_VLAN_CTRL(port),</div><div class='add'>+				      mask, ctrl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_vlan_filtering(struct yt921x_priv *priv, int port, bool vlan_filtering)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(&amp;priv-&gt;ds, port);</div><div class='add'>+	struct net_device *bdev;</div><div class='add'>+	u16 pvid;</div><div class='add'>+	u32 mask;</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	bdev = dsa_port_bridge_dev_get(dp);</div><div class='add'>+</div><div class='add'>+	if (!bdev || !vlan_filtering)</div><div class='add'>+		pvid = YT921X_VID_UNWARE;</div><div class='add'>+	else</div><div class='add'>+		br_vlan_get_pvid(bdev, &amp;pvid);</div><div class='add'>+	res = yt921x_port_set_pvid(priv, port, pvid);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	mask = YT921X_PORT_VLAN_CTRL1_CVLAN_DROP_TAGGED |</div><div class='add'>+	       YT921X_PORT_VLAN_CTRL1_CVLAN_DROP_UNTAGGED;</div><div class='add'>+	ctrl = 0;</div><div class='add'>+	/* Do not drop tagged frames here; let VLAN_IGR_FILTER do it */</div><div class='add'>+	if (vlan_filtering &amp;&amp; !pvid)</div><div class='add'>+		ctrl |= YT921X_PORT_VLAN_CTRL1_CVLAN_DROP_UNTAGGED;</div><div class='add'>+	res = yt921x_reg_update_bits(priv, YT921X_PORTn_VLAN_CTRL1(port),</div><div class='add'>+				     mask, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_reg_toggle_bits(priv, YT921X_VLAN_IGR_FILTER,</div><div class='add'>+				     YT921X_VLAN_IGR_FILTER_PORTn(port),</div><div class='add'>+				     vlan_filtering);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	/* Turn on / off VLAN awareness */</div><div class='add'>+	mask = YT921X_PORT_IGR_TPIDn_CTAG_M;</div><div class='add'>+	if (!vlan_filtering)</div><div class='add'>+		ctrl = 0;</div><div class='add'>+	else</div><div class='add'>+		ctrl = YT921X_PORT_IGR_TPIDn_CTAG(0);</div><div class='add'>+	res = yt921x_reg_update_bits(priv, YT921X_PORTn_IGR_TPID(port),</div><div class='add'>+				     mask, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_vlan_del(struct yt921x_priv *priv, int port, u16 vid)</div><div class='add'>+{</div><div class='add'>+	u64 mask64;</div><div class='add'>+</div><div class='add'>+	mask64 = YT921X_VLAN_CTRL_PORTS(port) |</div><div class='add'>+		 YT921X_VLAN_CTRL_UNTAG_PORTn(port);</div><div class='add'>+</div><div class='add'>+	return yt921x_reg64_clear_bits(priv, YT921X_VLANn_CTRL(vid), mask64);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_vlan_add(struct yt921x_priv *priv, int port, u16 vid, bool untagged)</div><div class='add'>+{</div><div class='add'>+	u64 mask64;</div><div class='add'>+	u64 ctrl64;</div><div class='add'>+</div><div class='add'>+	mask64 = YT921X_VLAN_CTRL_PORTn(port) |</div><div class='add'>+		 YT921X_VLAN_CTRL_PORTS(priv-&gt;cpu_ports_mask);</div><div class='add'>+	ctrl64 = mask64;</div><div class='add'>+</div><div class='add'>+	mask64 |= YT921X_VLAN_CTRL_UNTAG_PORTn(port);</div><div class='add'>+	if (untagged)</div><div class='add'>+		ctrl64 |= YT921X_VLAN_CTRL_UNTAG_PORTn(port);</div><div class='add'>+</div><div class='add'>+	return yt921x_reg64_update_bits(priv, YT921X_VLANn_CTRL(vid),</div><div class='add'>+					mask64, ctrl64);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_pvid_clear(struct yt921x_priv *priv, int port)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(&amp;priv-&gt;ds, port);</div><div class='add'>+	bool vlan_filtering;</div><div class='add'>+	u32 mask;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	vlan_filtering = dsa_port_is_vlan_filtering(dp);</div><div class='add'>+</div><div class='add'>+	res = yt921x_port_set_pvid(priv, port,</div><div class='add'>+				   vlan_filtering ? 0 : YT921X_VID_UNWARE);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	if (vlan_filtering) {</div><div class='add'>+		mask = YT921X_PORT_VLAN_CTRL1_CVLAN_DROP_UNTAGGED;</div><div class='add'>+		res = yt921x_reg_set_bits(priv, YT921X_PORTn_VLAN_CTRL1(port),</div><div class='add'>+					  mask);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_pvid_set(struct yt921x_priv *priv, int port, u16 vid)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(&amp;priv-&gt;ds, port);</div><div class='add'>+	bool vlan_filtering;</div><div class='add'>+	u32 mask;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	vlan_filtering = dsa_port_is_vlan_filtering(dp);</div><div class='add'>+</div><div class='add'>+	if (vlan_filtering) {</div><div class='add'>+		res = yt921x_port_set_pvid(priv, port, vid);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mask = YT921X_PORT_VLAN_CTRL1_CVLAN_DROP_UNTAGGED;</div><div class='add'>+	res = yt921x_reg_clear_bits(priv, YT921X_PORTn_VLAN_CTRL1(port), mask);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_dsa_port_vlan_filtering(struct dsa_switch *ds, int port,</div><div class='add'>+			       bool vlan_filtering,</div><div class='add'>+			       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	if (dsa_is_cpu_port(ds, port))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_vlan_filtering(priv, port, vlan_filtering);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_dsa_port_vlan_del(struct dsa_switch *ds, int port,</div><div class='add'>+			 const struct switchdev_obj_port_vlan *vlan)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	u16 vid = vlan-&gt;vid;</div><div class='add'>+	u16 pvid;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	if (dsa_is_cpu_port(ds, port))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	do {</div><div class='add'>+		struct dsa_port *dp = dsa_to_port(ds, port);</div><div class='add'>+		struct net_device *bdev;</div><div class='add'>+</div><div class='add'>+		res = yt921x_vlan_del(priv, port, vid);</div><div class='add'>+		if (res)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		bdev = dsa_port_bridge_dev_get(dp);</div><div class='add'>+		if (bdev) {</div><div class='add'>+			br_vlan_get_pvid(bdev, &amp;pvid);</div><div class='add'>+			if (pvid == vid)</div><div class='add'>+				res = yt921x_pvid_clear(priv, port);</div><div class='add'>+		}</div><div class='add'>+	} while (0);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_dsa_port_vlan_add(struct dsa_switch *ds, int port,</div><div class='add'>+			 const struct switchdev_obj_port_vlan *vlan,</div><div class='add'>+			 struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	u16 vid = vlan-&gt;vid;</div><div class='add'>+	u16 pvid;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	/* CPU port is supposed to be a member of every VLAN; see</div><div class='add'>+	 * yt921x_vlan_add() and yt921x_port_setup()</div><div class='add'>+	 */</div><div class='add'>+	if (dsa_is_cpu_port(ds, port))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	do {</div><div class='add'>+		struct dsa_port *dp = dsa_to_port(ds, port);</div><div class='add'>+		struct net_device *bdev;</div><div class='add'>+</div><div class='add'>+		res = yt921x_vlan_add(priv, port, vid,</div><div class='add'>+				      vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_UNTAGGED);</div><div class='add'>+		if (res)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		bdev = dsa_port_bridge_dev_get(dp);</div><div class='add'>+		if (bdev) {</div><div class='add'>+			if (vlan-&gt;flags &amp; BRIDGE_VLAN_INFO_PVID) {</div><div class='add'>+				res = yt921x_pvid_set(priv, port, vid);</div><div class='add'>+			} else {</div><div class='add'>+				br_vlan_get_pvid(bdev, &amp;pvid);</div><div class='add'>+				if (pvid == vid)</div><div class='add'>+					res = yt921x_pvid_clear(priv, port);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	} while (0);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_userport_standalone(struct yt921x_priv *priv, int port)</div><div class='add'>+{</div><div class='add'>+	u32 mask;</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	ctrl = ~priv-&gt;cpu_ports_mask;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_PORTn_ISOLATION(port), ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	/* Turn off FDB learning to prevent FDB pollution */</div><div class='add'>+	mask = YT921X_PORT_LEARN_DIS;</div><div class='add'>+	res = yt921x_reg_set_bits(priv, YT921X_PORTn_LEARN(port), mask);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	/* Turn off VLAN awareness */</div><div class='add'>+	mask = YT921X_PORT_IGR_TPIDn_CTAG_M;</div><div class='add'>+	res = yt921x_reg_clear_bits(priv, YT921X_PORTn_IGR_TPID(port), mask);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	/* Unrelated since learning is off and all packets are trapped;</div><div class='add'>+	 * set it anyway</div><div class='add'>+	 */</div><div class='add'>+	res = yt921x_port_set_pvid(priv, port, YT921X_VID_UNWARE);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_userport_bridge(struct yt921x_priv *priv, int port)</div><div class='add'>+{</div><div class='add'>+	u32 mask;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mask = YT921X_PORT_LEARN_DIS;</div><div class='add'>+	res = yt921x_reg_clear_bits(priv, YT921X_PORTn_LEARN(port), mask);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_isolate(struct yt921x_priv *priv, int port)</div><div class='add'>+{</div><div class='add'>+	u32 mask;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mask = BIT(port);</div><div class='add'>+	for (int i = 0; i &lt; YT921X_PORT_NUM; i++) {</div><div class='add'>+		if ((BIT(i) &amp; priv-&gt;cpu_ports_mask) || i == port)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		res = yt921x_reg_set_bits(priv, YT921X_PORTn_ISOLATION(i),</div><div class='add'>+					  mask);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Make sure to include the CPU port in ports_mask, or your bridge will</div><div class='add'>+ * not have it.</div><div class='add'>+ */</div><div class='add'>+static int yt921x_bridge(struct yt921x_priv *priv, u16 ports_mask)</div><div class='add'>+{</div><div class='add'>+	unsigned long targets_mask = ports_mask &amp; ~priv-&gt;cpu_ports_mask;</div><div class='add'>+	u32 isolated_mask;</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	int port;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	isolated_mask = 0;</div><div class='add'>+	for_each_set_bit(port, &amp;targets_mask, YT921X_PORT_NUM) {</div><div class='add'>+		struct yt921x_port *pp = &amp;priv-&gt;ports[port];</div><div class='add'>+</div><div class='add'>+		if (pp-&gt;isolated)</div><div class='add'>+			isolated_mask |= BIT(port);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Block from non-cpu bridge ports ... */</div><div class='add'>+	for_each_set_bit(port, &amp;targets_mask, YT921X_PORT_NUM) {</div><div class='add'>+		struct yt921x_port *pp = &amp;priv-&gt;ports[port];</div><div class='add'>+</div><div class='add'>+		/* to non-bridge ports */</div><div class='add'>+		ctrl = ~ports_mask;</div><div class='add'>+		/* to isolated ports when isolated */</div><div class='add'>+		if (pp-&gt;isolated)</div><div class='add'>+			ctrl |= isolated_mask;</div><div class='add'>+		/* to itself when non-hairpin */</div><div class='add'>+		if (!pp-&gt;hairpin)</div><div class='add'>+			ctrl |= BIT(port);</div><div class='add'>+		else</div><div class='add'>+			ctrl &amp;= ~BIT(port);</div><div class='add'>+</div><div class='add'>+		res = yt921x_reg_write(priv, YT921X_PORTn_ISOLATION(port),</div><div class='add'>+				       ctrl);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_bridge_leave(struct yt921x_priv *priv, int port)</div><div class='add'>+{</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_userport_standalone(priv, port);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_isolate(priv, port);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_bridge_join(struct yt921x_priv *priv, int port, u16 ports_mask)</div><div class='add'>+{</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_userport_bridge(priv, port);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_bridge(priv, ports_mask);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32</div><div class='add'>+dsa_bridge_ports(struct dsa_switch *ds, const struct net_device *bdev)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp;</div><div class='add'>+	u32 mask = 0;</div><div class='add'>+</div><div class='add'>+	dsa_switch_for_each_user_port(dp, ds)</div><div class='add'>+		if (dsa_port_offloads_bridge_dev(dp, bdev))</div><div class='add'>+			mask |= BIT(dp-&gt;index);</div><div class='add'>+</div><div class='add'>+	return mask;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_bridge_flags(struct yt921x_priv *priv, int port,</div><div class='add'>+		    struct switchdev_brport_flags flags)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_port *pp = &amp;priv-&gt;ports[port];</div><div class='add'>+	bool do_flush;</div><div class='add'>+	u32 mask;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	if (flags.mask &amp; BR_LEARNING) {</div><div class='add'>+		bool learning = flags.val &amp; BR_LEARNING;</div><div class='add'>+</div><div class='add'>+		mask = YT921X_PORT_LEARN_DIS;</div><div class='add'>+		res = yt921x_reg_toggle_bits(priv, YT921X_PORTn_LEARN(port),</div><div class='add'>+					     mask, !learning);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* BR_FLOOD, BR_MCAST_FLOOD: see the comment where ACT_UNK_ACTn_TRAP</div><div class='add'>+	 * is set</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	/* BR_BCAST_FLOOD: we can filter bcast, but cannot trap them */</div><div class='add'>+</div><div class='add'>+	do_flush = false;</div><div class='add'>+	if (flags.mask &amp; BR_HAIRPIN_MODE) {</div><div class='add'>+		pp-&gt;hairpin = flags.val &amp; BR_HAIRPIN_MODE;</div><div class='add'>+		do_flush = true;</div><div class='add'>+	}</div><div class='add'>+	if (flags.mask &amp; BR_ISOLATED) {</div><div class='add'>+		pp-&gt;isolated = flags.val &amp; BR_ISOLATED;</div><div class='add'>+		do_flush = true;</div><div class='add'>+	}</div><div class='add'>+	if (do_flush) {</div><div class='add'>+		struct dsa_switch *ds = &amp;priv-&gt;ds;</div><div class='add'>+		struct dsa_port *dp = dsa_to_port(ds, port);</div><div class='add'>+		struct net_device *bdev;</div><div class='add'>+</div><div class='add'>+		bdev = dsa_port_bridge_dev_get(dp);</div><div class='add'>+		if (bdev) {</div><div class='add'>+			u32 ports_mask;</div><div class='add'>+</div><div class='add'>+			ports_mask = dsa_bridge_ports(ds, bdev);</div><div class='add'>+			ports_mask |= priv-&gt;cpu_ports_mask;</div><div class='add'>+			res = yt921x_bridge(priv, ports_mask);</div><div class='add'>+			if (res)</div><div class='add'>+				return res;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_dsa_port_pre_bridge_flags(struct dsa_switch *ds, int port,</div><div class='add'>+				 struct switchdev_brport_flags flags,</div><div class='add'>+				 struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	if (flags.mask &amp; ~(BR_HAIRPIN_MODE | BR_LEARNING | BR_FLOOD |</div><div class='add'>+			   BR_MCAST_FLOOD | BR_ISOLATED))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_dsa_port_bridge_flags(struct dsa_switch *ds, int port,</div><div class='add'>+			     struct switchdev_brport_flags flags,</div><div class='add'>+			     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	if (dsa_is_cpu_port(ds, port))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_bridge_flags(priv, port, flags);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+yt921x_dsa_port_bridge_leave(struct dsa_switch *ds, int port,</div><div class='add'>+			     struct dsa_bridge bridge)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	struct device *dev = to_device(priv);</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	if (dsa_is_cpu_port(ds, port))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_bridge_leave(priv, port);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	if (res)</div><div class='add'>+		dev_err(dev, "Failed to %s port %d: %i\n", "unbridge",</div><div class='add'>+			port, res);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_dsa_port_bridge_join(struct dsa_switch *ds, int port,</div><div class='add'>+			    struct dsa_bridge bridge, bool *tx_fwd_offload,</div><div class='add'>+			    struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	u16 ports_mask;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	if (dsa_is_cpu_port(ds, port))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ports_mask = dsa_bridge_ports(ds, bridge.dev);</div><div class='add'>+	ports_mask |= priv-&gt;cpu_ports_mask;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_bridge_join(priv, port, ports_mask);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_dsa_port_mst_state_set(struct dsa_switch *ds, int port,</div><div class='add'>+			      const struct switchdev_mst_state *st)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	u32 mask;</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mask = YT921X_STP_PORTn_M(port);</div><div class='add'>+	switch (st-&gt;state) {</div><div class='add'>+	case BR_STATE_DISABLED:</div><div class='add'>+		ctrl = YT921X_STP_PORTn_DISABLED(port);</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_LISTENING:</div><div class='add'>+	case BR_STATE_LEARNING:</div><div class='add'>+		ctrl = YT921X_STP_PORTn_LEARNING(port);</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_FORWARDING:</div><div class='add'>+	default:</div><div class='add'>+		ctrl = YT921X_STP_PORTn_FORWARD(port);</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_BLOCKING:</div><div class='add'>+		ctrl = YT921X_STP_PORTn_BLOCKING(port);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_reg_update_bits(priv, YT921X_STPn(st-&gt;msti), mask, ctrl);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_dsa_vlan_msti_set(struct dsa_switch *ds, struct dsa_bridge bridge,</div><div class='add'>+			 const struct switchdev_vlan_msti *msti)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	u64 mask64;</div><div class='add'>+	u64 ctrl64;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	if (!msti-&gt;vid)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	if (!msti-&gt;msti || msti-&gt;msti &gt;= YT921X_MSTI_NUM)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	mask64 = YT921X_VLAN_CTRL_STP_ID_M;</div><div class='add'>+	ctrl64 = YT921X_VLAN_CTRL_STP_ID(msti-&gt;msti);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_reg64_update_bits(priv, YT921X_VLANn_CTRL(msti-&gt;vid),</div><div class='add'>+				       mask64, ctrl64);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+yt921x_dsa_port_stp_state_set(struct dsa_switch *ds, int port, u8 state)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	struct dsa_port *dp = dsa_to_port(ds, port);</div><div class='add'>+	struct device *dev = to_device(priv);</div><div class='add'>+	bool learning;</div><div class='add'>+	u32 mask;</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mask = YT921X_STP_PORTn_M(port);</div><div class='add'>+	learning = false;</div><div class='add'>+	switch (state) {</div><div class='add'>+	case BR_STATE_DISABLED:</div><div class='add'>+		ctrl = YT921X_STP_PORTn_DISABLED(port);</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_LISTENING:</div><div class='add'>+		ctrl = YT921X_STP_PORTn_LEARNING(port);</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_LEARNING:</div><div class='add'>+		ctrl = YT921X_STP_PORTn_LEARNING(port);</div><div class='add'>+		learning = dp-&gt;learning;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_FORWARDING:</div><div class='add'>+	default:</div><div class='add'>+		ctrl = YT921X_STP_PORTn_FORWARD(port);</div><div class='add'>+		learning = dp-&gt;learning;</div><div class='add'>+		break;</div><div class='add'>+	case BR_STATE_BLOCKING:</div><div class='add'>+		ctrl = YT921X_STP_PORTn_BLOCKING(port);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	do {</div><div class='add'>+		res = yt921x_reg_update_bits(priv, YT921X_STPn(0), mask, ctrl);</div><div class='add'>+		if (res)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		mask = YT921X_PORT_LEARN_DIS;</div><div class='add'>+		ctrl = !learning ? YT921X_PORT_LEARN_DIS : 0;</div><div class='add'>+		res = yt921x_reg_update_bits(priv, YT921X_PORTn_LEARN(port),</div><div class='add'>+					     mask, ctrl);</div><div class='add'>+	} while (0);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	if (res)</div><div class='add'>+		dev_err(dev, "Failed to %s port %d: %i\n", "set STP state for",</div><div class='add'>+			port, res);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_port_down(struct yt921x_priv *priv, int port)</div><div class='add'>+{</div><div class='add'>+	u32 mask;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mask = YT921X_PORT_LINK | YT921X_PORT_RX_MAC_EN | YT921X_PORT_TX_MAC_EN;</div><div class='add'>+	res = yt921x_reg_clear_bits(priv, YT921X_PORTn_CTRL(port), mask);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	if (yt921x_port_is_external(port)) {</div><div class='add'>+		mask = YT921X_SERDES_LINK;</div><div class='add'>+		res = yt921x_reg_clear_bits(priv, YT921X_SERDESn(port), mask);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+</div><div class='add'>+		mask = YT921X_XMII_LINK;</div><div class='add'>+		res = yt921x_reg_clear_bits(priv, YT921X_XMIIn(port), mask);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_port_up(struct yt921x_priv *priv, int port, unsigned int mode,</div><div class='add'>+	       phy_interface_t interface, int speed, int duplex,</div><div class='add'>+	       bool tx_pause, bool rx_pause)</div><div class='add'>+{</div><div class='add'>+	u32 mask;</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	switch (speed) {</div><div class='add'>+	case SPEED_10:</div><div class='add'>+		ctrl = YT921X_PORT_SPEED_10;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_100:</div><div class='add'>+		ctrl = YT921X_PORT_SPEED_100;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_1000:</div><div class='add'>+		ctrl = YT921X_PORT_SPEED_1000;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_2500:</div><div class='add'>+		ctrl = YT921X_PORT_SPEED_2500;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_10000:</div><div class='add'>+		ctrl = YT921X_PORT_SPEED_10000;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (duplex == DUPLEX_FULL)</div><div class='add'>+		ctrl |= YT921X_PORT_DUPLEX_FULL;</div><div class='add'>+	if (tx_pause)</div><div class='add'>+		ctrl |= YT921X_PORT_TX_PAUSE;</div><div class='add'>+	if (rx_pause)</div><div class='add'>+		ctrl |= YT921X_PORT_RX_PAUSE;</div><div class='add'>+	ctrl |= YT921X_PORT_RX_MAC_EN | YT921X_PORT_TX_MAC_EN;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_PORTn_CTRL(port), ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	if (yt921x_port_is_external(port)) {</div><div class='add'>+		mask = YT921X_SERDES_SPEED_M;</div><div class='add'>+		switch (speed) {</div><div class='add'>+		case SPEED_10:</div><div class='add'>+			ctrl = YT921X_SERDES_SPEED_10;</div><div class='add'>+			break;</div><div class='add'>+		case SPEED_100:</div><div class='add'>+			ctrl = YT921X_SERDES_SPEED_100;</div><div class='add'>+			break;</div><div class='add'>+		case SPEED_1000:</div><div class='add'>+			ctrl = YT921X_SERDES_SPEED_1000;</div><div class='add'>+			break;</div><div class='add'>+		case SPEED_2500:</div><div class='add'>+			ctrl = YT921X_SERDES_SPEED_2500;</div><div class='add'>+			break;</div><div class='add'>+		case SPEED_10000:</div><div class='add'>+			ctrl = YT921X_SERDES_SPEED_10000;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+		mask |= YT921X_SERDES_DUPLEX_FULL;</div><div class='add'>+		if (duplex == DUPLEX_FULL)</div><div class='add'>+			ctrl |= YT921X_SERDES_DUPLEX_FULL;</div><div class='add'>+		mask |= YT921X_SERDES_TX_PAUSE;</div><div class='add'>+		if (tx_pause)</div><div class='add'>+			ctrl |= YT921X_SERDES_TX_PAUSE;</div><div class='add'>+		mask |= YT921X_SERDES_RX_PAUSE;</div><div class='add'>+		if (rx_pause)</div><div class='add'>+			ctrl |= YT921X_SERDES_RX_PAUSE;</div><div class='add'>+		mask |= YT921X_SERDES_LINK;</div><div class='add'>+		ctrl |= YT921X_SERDES_LINK;</div><div class='add'>+		res = yt921x_reg_update_bits(priv, YT921X_SERDESn(port),</div><div class='add'>+					     mask, ctrl);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+</div><div class='add'>+		mask = YT921X_XMII_LINK;</div><div class='add'>+		res = yt921x_reg_set_bits(priv, YT921X_XMIIn(port), mask);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+</div><div class='add'>+		switch (speed) {</div><div class='add'>+		case SPEED_10:</div><div class='add'>+			ctrl = YT921X_MDIO_POLLING_SPEED_10;</div><div class='add'>+			break;</div><div class='add'>+		case SPEED_100:</div><div class='add'>+			ctrl = YT921X_MDIO_POLLING_SPEED_100;</div><div class='add'>+			break;</div><div class='add'>+		case SPEED_1000:</div><div class='add'>+			ctrl = YT921X_MDIO_POLLING_SPEED_1000;</div><div class='add'>+			break;</div><div class='add'>+		case SPEED_2500:</div><div class='add'>+			ctrl = YT921X_MDIO_POLLING_SPEED_2500;</div><div class='add'>+			break;</div><div class='add'>+		case SPEED_10000:</div><div class='add'>+			ctrl = YT921X_MDIO_POLLING_SPEED_10000;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+		if (duplex == DUPLEX_FULL)</div><div class='add'>+			ctrl |= YT921X_MDIO_POLLING_DUPLEX_FULL;</div><div class='add'>+		ctrl |= YT921X_MDIO_POLLING_LINK;</div><div class='add'>+		res = yt921x_reg_write(priv, YT921X_MDIO_POLLINGn(port), ctrl);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_port_config(struct yt921x_priv *priv, int port, unsigned int mode,</div><div class='add'>+		   phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = to_device(priv);</div><div class='add'>+	u32 mask;</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	if (!yt921x_port_is_external(port)) {</div><div class='add'>+		if (interface != PHY_INTERFACE_MODE_INTERNAL) {</div><div class='add'>+			dev_err(dev, "Wrong mode %d on port %d\n",</div><div class='add'>+				interface, port);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (interface) {</div><div class='add'>+	/* SERDES */</div><div class='add'>+	case PHY_INTERFACE_MODE_SGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_100BASEX:</div><div class='add'>+	case PHY_INTERFACE_MODE_1000BASEX:</div><div class='add'>+	case PHY_INTERFACE_MODE_2500BASEX:</div><div class='add'>+		mask = YT921X_SERDES_CTRL_PORTn(port);</div><div class='add'>+		res = yt921x_reg_set_bits(priv, YT921X_SERDES_CTRL, mask);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+</div><div class='add'>+		mask = YT921X_XMII_CTRL_PORTn(port);</div><div class='add'>+		res = yt921x_reg_clear_bits(priv, YT921X_XMII_CTRL, mask);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+</div><div class='add'>+		mask = YT921X_SERDES_MODE_M;</div><div class='add'>+		switch (interface) {</div><div class='add'>+		case PHY_INTERFACE_MODE_SGMII:</div><div class='add'>+			ctrl = YT921X_SERDES_MODE_SGMII;</div><div class='add'>+			break;</div><div class='add'>+		case PHY_INTERFACE_MODE_100BASEX:</div><div class='add'>+			ctrl = YT921X_SERDES_MODE_100BASEX;</div><div class='add'>+			break;</div><div class='add'>+		case PHY_INTERFACE_MODE_1000BASEX:</div><div class='add'>+			ctrl = YT921X_SERDES_MODE_1000BASEX;</div><div class='add'>+			break;</div><div class='add'>+		case PHY_INTERFACE_MODE_2500BASEX:</div><div class='add'>+			ctrl = YT921X_SERDES_MODE_2500BASEX;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+		res = yt921x_reg_update_bits(priv, YT921X_SERDESn(port),</div><div class='add'>+					     mask, ctrl);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+</div><div class='add'>+		break;</div><div class='add'>+	/* add XMII support here */</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+yt921x_phylink_mac_link_down(struct phylink_config *config, unsigned int mode,</div><div class='add'>+			     phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(dp-&gt;ds);</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	/* No need to sync; port control block is hold until device remove */</div><div class='add'>+	cancel_delayed_work(&amp;priv-&gt;ports[port].mib_read);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_port_down(priv, port);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	if (res)</div><div class='add'>+		dev_err(dp-&gt;ds-&gt;dev, "Failed to %s port %d: %i\n", "bring down",</div><div class='add'>+			port, res);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+yt921x_phylink_mac_link_up(struct phylink_config *config,</div><div class='add'>+			   struct phy_device *phydev, unsigned int mode,</div><div class='add'>+			   phy_interface_t interface, int speed, int duplex,</div><div class='add'>+			   bool tx_pause, bool rx_pause)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(dp-&gt;ds);</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_port_up(priv, port, mode, interface, speed, duplex,</div><div class='add'>+			     tx_pause, rx_pause);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	if (res)</div><div class='add'>+		dev_err(dp-&gt;ds-&gt;dev, "Failed to %s port %d: %i\n", "bring up",</div><div class='add'>+			port, res);</div><div class='add'>+</div><div class='add'>+	schedule_delayed_work(&amp;priv-&gt;ports[port].mib_read, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+yt921x_phylink_mac_config(struct phylink_config *config, unsigned int mode,</div><div class='add'>+			  const struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+	struct dsa_port *dp = dsa_phylink_to_port(config);</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(dp-&gt;ds);</div><div class='add'>+	int port = dp-&gt;index;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_port_config(priv, port, mode, state-&gt;interface);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	if (res)</div><div class='add'>+		dev_err(dp-&gt;ds-&gt;dev, "Failed to %s port %d: %i\n", "config",</div><div class='add'>+			port, res);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+yt921x_dsa_phylink_get_caps(struct dsa_switch *ds, int port,</div><div class='add'>+			    struct phylink_config *config)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	const struct yt921x_info *info = priv-&gt;info;</div><div class='add'>+</div><div class='add'>+	config-&gt;mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |</div><div class='add'>+				   MAC_10 | MAC_100 | MAC_1000;</div><div class='add'>+</div><div class='add'>+	if (info-&gt;internal_mask &amp; BIT(port)) {</div><div class='add'>+		/* Port 10 for MCU should probably go here too. But since that</div><div class='add'>+		 * is untested yet, turn it down for the moment by letting it</div><div class='add'>+		 * fall to the default branch.</div><div class='add'>+		 */</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_INTERNAL,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+	} else if (info-&gt;external_mask &amp; BIT(port)) {</div><div class='add'>+		/* TODO: external ports may support SERDES only, XMII only, or</div><div class='add'>+		 * SERDES + XMII depending on the chip. However, we can't get</div><div class='add'>+		 * the accurate config table due to lack of document, thus</div><div class='add'>+		 * we simply declare SERDES + XMII and rely on the correctness</div><div class='add'>+		 * of devicetree for now.</div><div class='add'>+		 */</div><div class='add'>+</div><div class='add'>+		/* SERDES */</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_SGMII,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		/* REVSGMII (SGMII in PHY role) should go here, once</div><div class='add'>+		 * PHY_INTERFACE_MODE_REVSGMII is introduced.</div><div class='add'>+		 */</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_100BASEX,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_1000BASEX,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		__set_bit(PHY_INTERFACE_MODE_2500BASEX,</div><div class='add'>+			  config-&gt;supported_interfaces);</div><div class='add'>+		config-&gt;mac_capabilities |= MAC_2500FD;</div><div class='add'>+</div><div class='add'>+		/* XMII */</div><div class='add'>+</div><div class='add'>+		/* Not tested. To add support for XMII:</div><div class='add'>+		 *   - Add proper interface modes below</div><div class='add'>+		 *   - Handle them in yt921x_port_config()</div><div class='add'>+		 */</div><div class='add'>+	}</div><div class='add'>+	/* no such port: empty supported_interfaces causes phylink to turn it</div><div class='add'>+	 * down</div><div class='add'>+	 */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_port_setup(struct yt921x_priv *priv, int port)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds = &amp;priv-&gt;ds;</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_userport_standalone(priv, port);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	if (dsa_is_cpu_port(ds, port)) {</div><div class='add'>+		/* Egress of CPU port is supposed to be completely controlled</div><div class='add'>+		 * via tagging, so set to oneway isolated (drop all packets</div><div class='add'>+		 * without tag).</div><div class='add'>+		 */</div><div class='add'>+		ctrl = ~(u32)0;</div><div class='add'>+		res = yt921x_reg_write(priv, YT921X_PORTn_ISOLATION(port),</div><div class='add'>+				       ctrl);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+</div><div class='add'>+		/* To simplify FDB "isolation" simulation, we also disable</div><div class='add'>+		 * learning on the CPU port, and let software identify packets</div><div class='add'>+		 * towarding CPU (either trapped or a static FDB entry is</div><div class='add'>+		 * matched, no matter which bridge that entry is for), which is</div><div class='add'>+		 * already done by yt921x_userport_standalone(). As a result,</div><div class='add'>+		 * VLAN-awareness becomes unrelated on the CPU port (set to</div><div class='add'>+		 * VLAN-unaware by the way).</div><div class='add'>+		 */</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum dsa_tag_protocol</div><div class='add'>+yt921x_dsa_get_tag_protocol(struct dsa_switch *ds, int port,</div><div class='add'>+			    enum dsa_tag_protocol m)</div><div class='add'>+{</div><div class='add'>+	return DSA_TAG_PROTO_YT921X;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_dsa_port_setup(struct dsa_switch *ds, int port)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_port_setup(priv, port);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	return res;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_edata_wait(struct yt921x_priv *priv, u32 *valp)</div><div class='add'>+{</div><div class='add'>+	u32 val = YT921X_EDATA_DATA_IDLE;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_reg_wait(priv, YT921X_EDATA_DATA,</div><div class='add'>+			      YT921X_EDATA_DATA_STATUS_M, &amp;val);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	*valp = val;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+yt921x_edata_read_cont(struct yt921x_priv *priv, u8 addr, u8 *valp)</div><div class='add'>+{</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	u32 val;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	ctrl = YT921X_EDATA_CTRL_ADDR(addr) | YT921X_EDATA_CTRL_READ;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_EDATA_CTRL, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	res = yt921x_edata_wait(priv, &amp;val);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	*valp = FIELD_GET(YT921X_EDATA_DATA_DATA_M, val);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_edata_read(struct yt921x_priv *priv, u8 addr, u8 *valp)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_edata_wait(priv, &amp;val);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	return yt921x_edata_read_cont(priv, addr, valp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_chip_detect(struct yt921x_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = to_device(priv);</div><div class='add'>+	const struct yt921x_info *info;</div><div class='add'>+	u8 extmode;</div><div class='add'>+	u32 chipid;</div><div class='add'>+	u32 major;</div><div class='add'>+	u32 mode;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_reg_read(priv, YT921X_CHIP_ID, &amp;chipid);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	major = FIELD_GET(YT921X_CHIP_ID_MAJOR, chipid);</div><div class='add'>+</div><div class='add'>+	for (info = yt921x_infos; info-&gt;name; info++)</div><div class='add'>+		if (info-&gt;major == major)</div><div class='add'>+			break;</div><div class='add'>+	if (!info-&gt;name) {</div><div class='add'>+		dev_err(dev, "Unexpected chipid 0x%x\n", chipid);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	res = yt921x_reg_read(priv, YT921X_CHIP_MODE, &amp;mode);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	res = yt921x_edata_read(priv, YT921X_EDATA_EXTMODE, &amp;extmode);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	for (; info-&gt;name; info++)</div><div class='add'>+		if (info-&gt;major == major &amp;&amp; info-&gt;mode == mode &amp;&amp;</div><div class='add'>+		    info-&gt;extmode == extmode)</div><div class='add'>+			break;</div><div class='add'>+	if (!info-&gt;name) {</div><div class='add'>+		dev_err(dev,</div><div class='add'>+			"Unsupported chipid 0x%x with chipmode 0x%x 0x%x\n",</div><div class='add'>+			chipid, mode, extmode);</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Print chipid here since we are interested in lower 16 bits */</div><div class='add'>+	dev_info(dev,</div><div class='add'>+		 "Motorcomm %s ethernet switch, chipid: 0x%x, chipmode: 0x%x 0x%x\n",</div><div class='add'>+		 info-&gt;name, chipid, mode, extmode);</div><div class='add'>+</div><div class='add'>+	priv-&gt;info = info;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_chip_reset(struct yt921x_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = to_device(priv);</div><div class='add'>+	u16 eth_p_tag;</div><div class='add'>+	u32 val;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	res = yt921x_chip_detect(priv);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	/* Reset */</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_RST, YT921X_RST_HW);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	/* RST_HW is almost same as GPIO hard reset, so we need this delay. */</div><div class='add'>+	fsleep(YT921X_RST_DELAY_US);</div><div class='add'>+</div><div class='add'>+	val = 0;</div><div class='add'>+	res = yt921x_reg_wait(priv, YT921X_RST, ~0, &amp;val);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	/* Check for tag EtherType; do it after reset in case you messed it up</div><div class='add'>+	 * before.</div><div class='add'>+	 */</div><div class='add'>+	res = yt921x_reg_read(priv, YT921X_CPU_TAG_TPID, &amp;val);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	eth_p_tag = FIELD_GET(YT921X_CPU_TAG_TPID_TPID_M, val);</div><div class='add'>+	if (eth_p_tag != ETH_P_YT921X) {</div><div class='add'>+		dev_err(dev, "Tag type 0x%x != 0x%x\n", eth_p_tag,</div><div class='add'>+			ETH_P_YT921X);</div><div class='add'>+		/* Despite being possible, we choose not to set CPU_TAG_TPID,</div><div class='add'>+		 * since there is no way it can be different unless you have the</div><div class='add'>+		 * wrong chip.</div><div class='add'>+		 */</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_chip_setup(struct yt921x_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct dsa_switch *ds = &amp;priv-&gt;ds;</div><div class='add'>+	unsigned long cpu_ports_mask;</div><div class='add'>+	u64 ctrl64;</div><div class='add'>+	u32 ctrl;</div><div class='add'>+	int port;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	/* Enable DSA */</div><div class='add'>+	priv-&gt;cpu_ports_mask = dsa_cpu_ports(ds);</div><div class='add'>+</div><div class='add'>+	ctrl = YT921X_EXT_CPU_PORT_TAG_EN | YT921X_EXT_CPU_PORT_PORT_EN |</div><div class='add'>+	       YT921X_EXT_CPU_PORT_PORT(__ffs(priv-&gt;cpu_ports_mask));</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_EXT_CPU_PORT, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	/* Enable and clear MIB */</div><div class='add'>+	res = yt921x_reg_set_bits(priv, YT921X_FUNC, YT921X_FUNC_MIB);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	ctrl = YT921X_MIB_CTRL_CLEAN | YT921X_MIB_CTRL_ALL_PORT;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_MIB_CTRL, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	/* Setup software switch */</div><div class='add'>+	ctrl = YT921X_CPU_COPY_TO_EXT_CPU;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_CPU_COPY, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	ctrl = GENMASK(10, 0);</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_FILTER_UNK_UCAST, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_FILTER_UNK_MCAST, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	/* YT921x does not support native DSA port bridging, so we use port</div><div class='add'>+	 * isolation to emulate it. However, be especially careful that port</div><div class='add'>+	 * isolation takes _after_ FDB lookups, i.e. if an FDB entry (from</div><div class='add'>+	 * another bridge) is matched and the destination port (in another</div><div class='add'>+	 * bridge) is blocked, the packet will be dropped instead of flooding to</div><div class='add'>+	 * the "bridged" ports, thus we need to trap and handle those packets by</div><div class='add'>+	 * software.</div><div class='add'>+	 *</div><div class='add'>+	 * If there is no more than one bridge, we might be able to drop them</div><div class='add'>+	 * directly given some conditions are met, but we trap them in all cases</div><div class='add'>+	 * for now.</div><div class='add'>+	 */</div><div class='add'>+	ctrl = 0;</div><div class='add'>+	for (int i = 0; i &lt; YT921X_PORT_NUM; i++)</div><div class='add'>+		ctrl |= YT921X_ACT_UNK_ACTn_TRAP(i);</div><div class='add'>+	/* Except for CPU ports, if any packets are sent via CPU ports without</div><div class='add'>+	 * tag, they should be dropped.</div><div class='add'>+	 */</div><div class='add'>+	cpu_ports_mask = priv-&gt;cpu_ports_mask;</div><div class='add'>+	for_each_set_bit(port, &amp;cpu_ports_mask, YT921X_PORT_NUM) {</div><div class='add'>+		ctrl &amp;= ~YT921X_ACT_UNK_ACTn_M(port);</div><div class='add'>+		ctrl |= YT921X_ACT_UNK_ACTn_DROP(port);</div><div class='add'>+	}</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_ACT_UNK_UCAST, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+	res = yt921x_reg_write(priv, YT921X_ACT_UNK_MCAST, ctrl);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	/* Tagged VID 0 should be treated as untagged, which confuses the</div><div class='add'>+	 * hardware a lot</div><div class='add'>+	 */</div><div class='add'>+	ctrl64 = YT921X_VLAN_CTRL_LEARN_DIS | YT921X_VLAN_CTRL_PORTS_M;</div><div class='add'>+	res = yt921x_reg64_write(priv, YT921X_VLANn_CTRL(0), ctrl64);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	/* Miscellaneous */</div><div class='add'>+	res = yt921x_reg_set_bits(priv, YT921X_SENSOR, YT921X_SENSOR_TEMP);</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_dsa_setup(struct dsa_switch *ds)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = to_yt921x_priv(ds);</div><div class='add'>+	struct device *dev = to_device(priv);</div><div class='add'>+	struct device_node *np = dev-&gt;of_node;</div><div class='add'>+	struct device_node *child;</div><div class='add'>+	int res;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_chip_reset(priv);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	/* Register the internal mdio bus. Nodes for internal ports should have</div><div class='add'>+	 * proper phy-handle pointing to their PHYs. Not enabling the internal</div><div class='add'>+	 * bus is possible, though pretty wired, if internal ports are not used.</div><div class='add'>+	 */</div><div class='add'>+	child = of_get_child_by_name(np, "mdio");</div><div class='add'>+	if (child) {</div><div class='add'>+		res = yt921x_mbus_int_init(priv, child);</div><div class='add'>+		of_node_put(child);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* External mdio bus is optional */</div><div class='add'>+	child = of_get_child_by_name(np, "mdio-external");</div><div class='add'>+	if (child) {</div><div class='add'>+		res = yt921x_mbus_ext_init(priv, child);</div><div class='add'>+		of_node_put(child);</div><div class='add'>+		if (res)</div><div class='add'>+			return res;</div><div class='add'>+</div><div class='add'>+		dev_err(dev, "Untested external mdio bus\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;reg_lock);</div><div class='add'>+	res = yt921x_chip_setup(priv);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	if (res)</div><div class='add'>+		return res;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct phylink_mac_ops yt921x_phylink_mac_ops = {</div><div class='add'>+	.mac_link_down	= yt921x_phylink_mac_link_down,</div><div class='add'>+	.mac_link_up	= yt921x_phylink_mac_link_up,</div><div class='add'>+	.mac_config	= yt921x_phylink_mac_config,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct dsa_switch_ops yt921x_dsa_switch_ops = {</div><div class='add'>+	/* mib */</div><div class='add'>+	.get_strings		= yt921x_dsa_get_strings,</div><div class='add'>+	.get_ethtool_stats	= yt921x_dsa_get_ethtool_stats,</div><div class='add'>+	.get_sset_count		= yt921x_dsa_get_sset_count,</div><div class='add'>+	.get_eth_mac_stats	= yt921x_dsa_get_eth_mac_stats,</div><div class='add'>+	.get_eth_ctrl_stats	= yt921x_dsa_get_eth_ctrl_stats,</div><div class='add'>+	.get_rmon_stats		= yt921x_dsa_get_rmon_stats,</div><div class='add'>+	.get_stats64		= yt921x_dsa_get_stats64,</div><div class='add'>+	.get_pause_stats	= yt921x_dsa_get_pause_stats,</div><div class='add'>+	/* eee */</div><div class='add'>+	.support_eee		= dsa_supports_eee,</div><div class='add'>+	.set_mac_eee		= yt921x_dsa_set_mac_eee,</div><div class='add'>+	/* mtu */</div><div class='add'>+	.port_change_mtu	= yt921x_dsa_port_change_mtu,</div><div class='add'>+	.port_max_mtu		= yt921x_dsa_port_max_mtu,</div><div class='add'>+	/* hsr */</div><div class='add'>+	.port_hsr_leave		= dsa_port_simple_hsr_leave,</div><div class='add'>+	.port_hsr_join		= dsa_port_simple_hsr_join,</div><div class='add'>+	/* mirror */</div><div class='add'>+	.port_mirror_del	= yt921x_dsa_port_mirror_del,</div><div class='add'>+	.port_mirror_add	= yt921x_dsa_port_mirror_add,</div><div class='add'>+	/* fdb */</div><div class='add'>+	.port_fdb_dump		= yt921x_dsa_port_fdb_dump,</div><div class='add'>+	.port_fast_age		= yt921x_dsa_port_fast_age,</div><div class='add'>+	.set_ageing_time	= yt921x_dsa_set_ageing_time,</div><div class='add'>+	.port_fdb_del		= yt921x_dsa_port_fdb_del,</div><div class='add'>+	.port_fdb_add		= yt921x_dsa_port_fdb_add,</div><div class='add'>+	.port_mdb_del		= yt921x_dsa_port_mdb_del,</div><div class='add'>+	.port_mdb_add		= yt921x_dsa_port_mdb_add,</div><div class='add'>+	/* vlan */</div><div class='add'>+	.port_vlan_filtering	= yt921x_dsa_port_vlan_filtering,</div><div class='add'>+	.port_vlan_del		= yt921x_dsa_port_vlan_del,</div><div class='add'>+	.port_vlan_add		= yt921x_dsa_port_vlan_add,</div><div class='add'>+	/* bridge */</div><div class='add'>+	.port_pre_bridge_flags	= yt921x_dsa_port_pre_bridge_flags,</div><div class='add'>+	.port_bridge_flags	= yt921x_dsa_port_bridge_flags,</div><div class='add'>+	.port_bridge_leave	= yt921x_dsa_port_bridge_leave,</div><div class='add'>+	.port_bridge_join	= yt921x_dsa_port_bridge_join,</div><div class='add'>+	/* mst */</div><div class='add'>+	.port_mst_state_set	= yt921x_dsa_port_mst_state_set,</div><div class='add'>+	.vlan_msti_set		= yt921x_dsa_vlan_msti_set,</div><div class='add'>+	.port_stp_state_set	= yt921x_dsa_port_stp_state_set,</div><div class='add'>+	/* port */</div><div class='add'>+	.get_tag_protocol	= yt921x_dsa_get_tag_protocol,</div><div class='add'>+	.phylink_get_caps	= yt921x_dsa_phylink_get_caps,</div><div class='add'>+	.port_setup		= yt921x_dsa_port_setup,</div><div class='add'>+	/* chip */</div><div class='add'>+	.setup			= yt921x_dsa_setup,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void yt921x_mdio_shutdown(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = mdiodev_get_drvdata(mdiodev);</div><div class='add'>+</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dsa_switch_shutdown(&amp;priv-&gt;ds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void yt921x_mdio_remove(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct yt921x_priv *priv = mdiodev_get_drvdata(mdiodev);</div><div class='add'>+</div><div class='add'>+	if (!priv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (size_t i = ARRAY_SIZE(priv-&gt;ports); i-- &gt; 0; ) {</div><div class='add'>+		struct yt921x_port *pp = &amp;priv-&gt;ports[i];</div><div class='add'>+</div><div class='add'>+		disable_delayed_work_sync(&amp;pp-&gt;mib_read);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dsa_unregister_switch(&amp;priv-&gt;ds);</div><div class='add'>+</div><div class='add'>+	mutex_destroy(&amp;priv-&gt;reg_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int yt921x_mdio_probe(struct mdio_device *mdiodev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;mdiodev-&gt;dev;</div><div class='add'>+	struct yt921x_reg_mdio *mdio;</div><div class='add'>+	struct yt921x_priv *priv;</div><div class='add'>+	struct dsa_switch *ds;</div><div class='add'>+</div><div class='add'>+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mdio = devm_kzalloc(dev, sizeof(*mdio), GFP_KERNEL);</div><div class='add'>+	if (!mdio)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mdio-&gt;bus = mdiodev-&gt;bus;</div><div class='add'>+	mdio-&gt;addr = mdiodev-&gt;addr;</div><div class='add'>+	mdio-&gt;switchid = 0;</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;priv-&gt;reg_lock);</div><div class='add'>+</div><div class='add'>+	priv-&gt;reg_ops = &amp;yt921x_reg_ops_mdio;</div><div class='add'>+	priv-&gt;reg_ctx = mdio;</div><div class='add'>+</div><div class='add'>+	for (size_t i = 0; i &lt; ARRAY_SIZE(priv-&gt;ports); i++) {</div><div class='add'>+		struct yt921x_port *pp = &amp;priv-&gt;ports[i];</div><div class='add'>+</div><div class='add'>+		pp-&gt;index = i;</div><div class='add'>+		INIT_DELAYED_WORK(&amp;pp-&gt;mib_read, yt921x_poll_mib);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ds = &amp;priv-&gt;ds;</div><div class='add'>+	ds-&gt;dev = dev;</div><div class='add'>+	ds-&gt;assisted_learning_on_cpu_port = true;</div><div class='add'>+	ds-&gt;priv = priv;</div><div class='add'>+	ds-&gt;ops = &amp;yt921x_dsa_switch_ops;</div><div class='add'>+	ds-&gt;ageing_time_min = 1 * 5000;</div><div class='add'>+	ds-&gt;ageing_time_max = U16_MAX * 5000;</div><div class='add'>+	ds-&gt;phylink_mac_ops = &amp;yt921x_phylink_mac_ops;</div><div class='add'>+	ds-&gt;num_ports = YT921X_PORT_NUM;</div><div class='add'>+</div><div class='add'>+	mdiodev_set_drvdata(mdiodev, priv);</div><div class='add'>+</div><div class='add'>+	return dsa_register_switch(ds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id yt921x_of_match[] = {</div><div class='add'>+	{ .compatible = "motorcomm,yt9215" },</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, yt921x_of_match);</div><div class='add'>+</div><div class='add'>+static struct mdio_driver yt921x_mdio_driver = {</div><div class='add'>+	.probe = yt921x_mdio_probe,</div><div class='add'>+	.remove = yt921x_mdio_remove,</div><div class='add'>+	.shutdown = yt921x_mdio_shutdown,</div><div class='add'>+	.mdiodrv.driver = {</div><div class='add'>+		.name = YT921X_NAME,</div><div class='add'>+		.of_match_table = yt921x_of_match,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+mdio_module_driver(yt921x_mdio_driver);</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("David Yang &lt;mmyangfl@gmail.com&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Driver for Motorcomm YT921x Switch");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/dsa/yt921x.h b/drivers/net/dsa/yt921x.h<br/>new file mode 100644<br/>index 000000000000..61bb0ab3b09a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dsa/yt921x.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dsa/yt921x.h</a></div><div class='hunk'>@@ -0,0 +1,567 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 David Yang</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __YT921X_H</div><div class='add'>+#define __YT921X_H</div><div class='add'>+</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+</div><div class='add'>+#define YT921X_SMI_SWITCHID_M		GENMASK(3, 2)</div><div class='add'>+#define  YT921X_SMI_SWITCHID(x)			FIELD_PREP(YT921X_SMI_SWITCHID_M, (x))</div><div class='add'>+#define YT921X_SMI_AD			BIT(1)</div><div class='add'>+#define  YT921X_SMI_ADDR			0</div><div class='add'>+#define  YT921X_SMI_DATA			YT921X_SMI_AD</div><div class='add'>+#define YT921X_SMI_RW			BIT(0)</div><div class='add'>+#define  YT921X_SMI_WRITE			0</div><div class='add'>+#define  YT921X_SMI_READ			YT921X_SMI_RW</div><div class='add'>+</div><div class='add'>+#define YT921X_SWITCHID_NUM		4</div><div class='add'>+</div><div class='add'>+#define YT921X_RST			0x80000</div><div class='add'>+#define  YT921X_RST_HW				BIT(31)</div><div class='add'>+#define  YT921X_RST_SW				BIT(1)</div><div class='add'>+#define YT921X_FUNC			0x80004</div><div class='add'>+#define  YT921X_FUNC_MIB			BIT(1)</div><div class='add'>+#define YT921X_CHIP_ID			0x80008</div><div class='add'>+#define  YT921X_CHIP_ID_MAJOR			GENMASK(31, 16)</div><div class='add'>+#define YT921X_EXT_CPU_PORT		0x8000c</div><div class='add'>+#define  YT921X_EXT_CPU_PORT_TAG_EN		BIT(15)</div><div class='add'>+#define  YT921X_EXT_CPU_PORT_PORT_EN		BIT(14)</div><div class='add'>+#define  YT921X_EXT_CPU_PORT_PORT_M		GENMASK(3, 0)</div><div class='add'>+#define   YT921X_EXT_CPU_PORT_PORT(x)			FIELD_PREP(YT921X_EXT_CPU_PORT_PORT_M, (x))</div><div class='add'>+#define YT921X_CPU_TAG_TPID		0x80010</div><div class='add'>+#define  YT921X_CPU_TAG_TPID_TPID_M		GENMASK(15, 0)</div><div class='add'>+/* Same as ETH_P_YT921X, but this represents the true HW default, while the</div><div class='add'>+ * former is a local convention chosen by us.</div><div class='add'>+ */</div><div class='add'>+#define   YT921X_CPU_TAG_TPID_TPID_DEFAULT		0x9988</div><div class='add'>+#define YT921X_PVID_SEL			0x80014</div><div class='add'>+#define  YT921X_PVID_SEL_SVID_PORTn(port)	BIT(port)</div><div class='add'>+#define YT921X_SERDES_CTRL		0x80028</div><div class='add'>+#define  YT921X_SERDES_CTRL_PORTn_TEST(port)	BIT((port) - 3)</div><div class='add'>+#define  YT921X_SERDES_CTRL_PORTn(port)		BIT((port) - 8)</div><div class='add'>+#define YT921X_IO_LEVEL			0x80030</div><div class='add'>+#define  YT9215_IO_LEVEL_NORMAL_M		GENMASK(5, 4)</div><div class='add'>+#define   YT9215_IO_LEVEL_NORMAL(x)			FIELD_PREP(YT9215_IO_LEVEL_NORMAL_M, (x))</div><div class='add'>+#define   YT9215_IO_LEVEL_NORMAL_3V3			YT9215_IO_LEVEL_NORMAL(0)</div><div class='add'>+#define   YT9215_IO_LEVEL_NORMAL_1V8			YT9215_IO_LEVEL_NORMAL(3)</div><div class='add'>+#define  YT9215_IO_LEVEL_RGMII1_M		GENMASK(3, 2)</div><div class='add'>+#define   YT9215_IO_LEVEL_RGMII1(x)			FIELD_PREP(YT9215_IO_LEVEL_RGMII1_M, (x))</div><div class='add'>+#define   YT9215_IO_LEVEL_RGMII1_3V3			YT9215_IO_LEVEL_RGMII1(0)</div><div class='add'>+#define   YT9215_IO_LEVEL_RGMII1_2V5			YT9215_IO_LEVEL_RGMII1(1)</div><div class='add'>+#define   YT9215_IO_LEVEL_RGMII1_1V8			YT9215_IO_LEVEL_RGMII1(2)</div><div class='add'>+#define  YT9215_IO_LEVEL_RGMII0_M		GENMASK(1, 0)</div><div class='add'>+#define   YT9215_IO_LEVEL_RGMII0(x)			FIELD_PREP(YT9215_IO_LEVEL_RGMII0_M, (x))</div><div class='add'>+#define   YT9215_IO_LEVEL_RGMII0_3V3			YT9215_IO_LEVEL_RGMII0(0)</div><div class='add'>+#define   YT9215_IO_LEVEL_RGMII0_2V5			YT9215_IO_LEVEL_RGMII0(1)</div><div class='add'>+#define   YT9215_IO_LEVEL_RGMII0_1V8			YT9215_IO_LEVEL_RGMII0(2)</div><div class='add'>+#define  YT9218_IO_LEVEL_RGMII1_M		GENMASK(5, 4)</div><div class='add'>+#define   YT9218_IO_LEVEL_RGMII1(x)			FIELD_PREP(YT9218_IO_LEVEL_RGMII1_M, (x))</div><div class='add'>+#define   YT9218_IO_LEVEL_RGMII1_3V3			YT9218_IO_LEVEL_RGMII1(0)</div><div class='add'>+#define   YT9218_IO_LEVEL_RGMII1_2V5			YT9218_IO_LEVEL_RGMII1(1)</div><div class='add'>+#define   YT9218_IO_LEVEL_RGMII1_1V8			YT9218_IO_LEVEL_RGMII1(2)</div><div class='add'>+#define  YT9218_IO_LEVEL_RGMII0_M		GENMASK(3, 2)</div><div class='add'>+#define   YT9218_IO_LEVEL_RGMII0(x)			FIELD_PREP(YT9218_IO_LEVEL_RGMII0_M, (x))</div><div class='add'>+#define   YT9218_IO_LEVEL_RGMII0_3V3			YT9218_IO_LEVEL_RGMII0(0)</div><div class='add'>+#define   YT9218_IO_LEVEL_RGMII0_2V5			YT9218_IO_LEVEL_RGMII0(1)</div><div class='add'>+#define   YT9218_IO_LEVEL_RGMII0_1V8			YT9218_IO_LEVEL_RGMII0(2)</div><div class='add'>+#define  YT9218_IO_LEVEL_NORMAL_M		GENMASK(1, 0)</div><div class='add'>+#define   YT9218_IO_LEVEL_NORMAL(x)			FIELD_PREP(YT9218_IO_LEVEL_NORMAL_M, (x))</div><div class='add'>+#define   YT9218_IO_LEVEL_NORMAL_3V3			YT9218_IO_LEVEL_NORMAL(0)</div><div class='add'>+#define   YT9218_IO_LEVEL_NORMAL_1V8			YT9218_IO_LEVEL_NORMAL(3)</div><div class='add'>+#define YT921X_MAC_ADDR_HI2		0x80080</div><div class='add'>+#define YT921X_MAC_ADDR_LO4		0x80084</div><div class='add'>+#define YT921X_SERDESn(port)		(0x8008c + 4 * ((port) - 8))</div><div class='add'>+#define  YT921X_SERDES_MODE_M			GENMASK(9, 7)</div><div class='add'>+#define   YT921X_SERDES_MODE(x)				FIELD_PREP(YT921X_SERDES_MODE_M, (x))</div><div class='add'>+#define   YT921X_SERDES_MODE_SGMII			YT921X_SERDES_MODE(0)</div><div class='add'>+#define   YT921X_SERDES_MODE_REVSGMII			YT921X_SERDES_MODE(1)</div><div class='add'>+#define   YT921X_SERDES_MODE_1000BASEX			YT921X_SERDES_MODE(2)</div><div class='add'>+#define   YT921X_SERDES_MODE_100BASEX			YT921X_SERDES_MODE(3)</div><div class='add'>+#define   YT921X_SERDES_MODE_2500BASEX			YT921X_SERDES_MODE(4)</div><div class='add'>+#define  YT921X_SERDES_RX_PAUSE			BIT(6)</div><div class='add'>+#define  YT921X_SERDES_TX_PAUSE			BIT(5)</div><div class='add'>+#define  YT921X_SERDES_LINK			BIT(4)  /* force link */</div><div class='add'>+#define  YT921X_SERDES_DUPLEX_FULL		BIT(3)</div><div class='add'>+#define  YT921X_SERDES_SPEED_M			GENMASK(2, 0)</div><div class='add'>+#define   YT921X_SERDES_SPEED(x)			FIELD_PREP(YT921X_SERDES_SPEED_M, (x))</div><div class='add'>+#define   YT921X_SERDES_SPEED_10			YT921X_SERDES_SPEED(0)</div><div class='add'>+#define   YT921X_SERDES_SPEED_100			YT921X_SERDES_SPEED(1)</div><div class='add'>+#define   YT921X_SERDES_SPEED_1000			YT921X_SERDES_SPEED(2)</div><div class='add'>+#define   YT921X_SERDES_SPEED_10000			YT921X_SERDES_SPEED(3)</div><div class='add'>+#define   YT921X_SERDES_SPEED_2500			YT921X_SERDES_SPEED(4)</div><div class='add'>+#define YT921X_PORTn_CTRL(port)		(0x80100 + 4 * (port))</div><div class='add'>+#define  YT921X_PORT_CTRL_PAUSE_AN		BIT(10)</div><div class='add'>+#define YT921X_PORTn_STATUS(port)	(0x80200 + 4 * (port))</div><div class='add'>+#define  YT921X_PORT_LINK			BIT(9)  /* CTRL: auto negotiation */</div><div class='add'>+#define  YT921X_PORT_HALF_PAUSE			BIT(8)  /* Half-duplex back pressure mode */</div><div class='add'>+#define  YT921X_PORT_DUPLEX_FULL		BIT(7)</div><div class='add'>+#define  YT921X_PORT_RX_PAUSE			BIT(6)</div><div class='add'>+#define  YT921X_PORT_TX_PAUSE			BIT(5)</div><div class='add'>+#define  YT921X_PORT_RX_MAC_EN			BIT(4)</div><div class='add'>+#define  YT921X_PORT_TX_MAC_EN			BIT(3)</div><div class='add'>+#define  YT921X_PORT_SPEED_M			GENMASK(2, 0)</div><div class='add'>+#define   YT921X_PORT_SPEED(x)				FIELD_PREP(YT921X_PORT_SPEED_M, (x))</div><div class='add'>+#define   YT921X_PORT_SPEED_10				YT921X_PORT_SPEED(0)</div><div class='add'>+#define   YT921X_PORT_SPEED_100				YT921X_PORT_SPEED(1)</div><div class='add'>+#define   YT921X_PORT_SPEED_1000			YT921X_PORT_SPEED(2)</div><div class='add'>+#define   YT921X_PORT_SPEED_10000			YT921X_PORT_SPEED(3)</div><div class='add'>+#define   YT921X_PORT_SPEED_2500			YT921X_PORT_SPEED(4)</div><div class='add'>+#define YT921X_PON_STRAP_FUNC		0x80320</div><div class='add'>+#define YT921X_PON_STRAP_VAL		0x80324</div><div class='add'>+#define YT921X_PON_STRAP_CAP		0x80328</div><div class='add'>+#define  YT921X_PON_STRAP_EEE			BIT(16)</div><div class='add'>+#define  YT921X_PON_STRAP_LOOP_DETECT		BIT(7)</div><div class='add'>+#define YT921X_MDIO_POLLINGn(port)	(0x80364 + 4 * ((port) - 8))</div><div class='add'>+#define  YT921X_MDIO_POLLING_DUPLEX_FULL	BIT(4)</div><div class='add'>+#define  YT921X_MDIO_POLLING_LINK		BIT(3)</div><div class='add'>+#define  YT921X_MDIO_POLLING_SPEED_M		GENMASK(2, 0)</div><div class='add'>+#define   YT921X_MDIO_POLLING_SPEED(x)			FIELD_PREP(YT921X_MDIO_POLLING_SPEED_M, (x))</div><div class='add'>+#define   YT921X_MDIO_POLLING_SPEED_10			YT921X_MDIO_POLLING_SPEED(0)</div><div class='add'>+#define   YT921X_MDIO_POLLING_SPEED_100			YT921X_MDIO_POLLING_SPEED(1)</div><div class='add'>+#define   YT921X_MDIO_POLLING_SPEED_1000		YT921X_MDIO_POLLING_SPEED(2)</div><div class='add'>+#define   YT921X_MDIO_POLLING_SPEED_10000		YT921X_MDIO_POLLING_SPEED(3)</div><div class='add'>+#define   YT921X_MDIO_POLLING_SPEED_2500		YT921X_MDIO_POLLING_SPEED(4)</div><div class='add'>+#define YT921X_SENSOR			0x8036c</div><div class='add'>+#define  YT921X_SENSOR_TEMP			BIT(18)</div><div class='add'>+#define YT921X_TEMP			0x80374</div><div class='add'>+#define YT921X_CHIP_MODE		0x80388</div><div class='add'>+#define  YT921X_CHIP_MODE_MODE			GENMASK(1, 0)</div><div class='add'>+#define YT921X_XMII_CTRL		0x80394</div><div class='add'>+#define  YT921X_XMII_CTRL_PORTn(port)		BIT(9 - (port))  /* Yes, it's reversed */</div><div class='add'>+#define YT921X_XMIIn(port)		(0x80400 + 8 * ((port) - 8))</div><div class='add'>+#define  YT921X_XMII_MODE_M			GENMASK(31, 29)</div><div class='add'>+#define   YT921X_XMII_MODE(x)				FIELD_PREP(YT921X_XMII_MODE_M, (x))</div><div class='add'>+#define   YT921X_XMII_MODE_MII				YT921X_XMII_MODE(0)</div><div class='add'>+#define   YT921X_XMII_MODE_REVMII			YT921X_XMII_MODE(1)</div><div class='add'>+#define   YT921X_XMII_MODE_RMII				YT921X_XMII_MODE(2)</div><div class='add'>+#define   YT921X_XMII_MODE_REVRMII			YT921X_XMII_MODE(3)</div><div class='add'>+#define   YT921X_XMII_MODE_RGMII			YT921X_XMII_MODE(4)</div><div class='add'>+#define   YT921X_XMII_MODE_DISABLE			YT921X_XMII_MODE(5)</div><div class='add'>+#define  YT921X_XMII_LINK			BIT(19)  /* force link */</div><div class='add'>+#define  YT921X_XMII_EN				BIT(18)</div><div class='add'>+#define  YT921X_XMII_SOFT_RST			BIT(17)</div><div class='add'>+#define  YT921X_XMII_RGMII_TX_DELAY_150PS_M	GENMASK(16, 13)</div><div class='add'>+#define   YT921X_XMII_RGMII_TX_DELAY_150PS(x)		FIELD_PREP(YT921X_XMII_RGMII_TX_DELAY_150PS_M, (x))</div><div class='add'>+#define  YT921X_XMII_TX_CLK_IN			BIT(11)</div><div class='add'>+#define  YT921X_XMII_RX_CLK_IN			BIT(10)</div><div class='add'>+#define  YT921X_XMII_RGMII_TX_DELAY_2NS		BIT(8)</div><div class='add'>+#define  YT921X_XMII_RGMII_TX_CLK_OUT		BIT(7)</div><div class='add'>+#define  YT921X_XMII_RGMII_RX_DELAY_150PS_M	GENMASK(6, 3)</div><div class='add'>+#define   YT921X_XMII_RGMII_RX_DELAY_150PS(x)		FIELD_PREP(YT921X_XMII_RGMII_RX_DELAY_150PS_M, (x))</div><div class='add'>+#define  YT921X_XMII_RMII_PHY_TX_CLK_OUT	BIT(2)</div><div class='add'>+#define  YT921X_XMII_REVMII_TX_CLK_OUT		BIT(1)</div><div class='add'>+#define  YT921X_XMII_REVMII_RX_CLK_OUT		BIT(0)</div><div class='add'>+</div><div class='add'>+#define YT921X_MACn_FRAME(port)		(0x81008 + 0x1000 * (port))</div><div class='add'>+#define  YT921X_MAC_FRAME_SIZE_M		GENMASK(21, 8)</div><div class='add'>+#define   YT921X_MAC_FRAME_SIZE(x)			FIELD_PREP(YT921X_MAC_FRAME_SIZE_M, (x))</div><div class='add'>+</div><div class='add'>+#define YT921X_EEEn_VAL(port)		(0xa0000 + 0x40 * (port))</div><div class='add'>+#define  YT921X_EEE_VAL_DATA			BIT(1)</div><div class='add'>+</div><div class='add'>+#define YT921X_EEE_CTRL			0xb0000</div><div class='add'>+#define  YT921X_EEE_CTRL_ENn(port)		BIT(port)</div><div class='add'>+</div><div class='add'>+#define YT921X_MIB_CTRL			0xc0004</div><div class='add'>+#define  YT921X_MIB_CTRL_CLEAN			BIT(30)</div><div class='add'>+#define  YT921X_MIB_CTRL_PORT_M			GENMASK(6, 3)</div><div class='add'>+#define   YT921X_MIB_CTRL_PORT(x)			FIELD_PREP(YT921X_MIB_CTRL_PORT_M, (x))</div><div class='add'>+#define  YT921X_MIB_CTRL_ONE_PORT		BIT(1)</div><div class='add'>+#define  YT921X_MIB_CTRL_ALL_PORT		BIT(0)</div><div class='add'>+#define YT921X_MIBn_DATA0(port)		(0xc0100 + 0x100 * (port))</div><div class='add'>+#define YT921X_MIBn_DATAm(port, x)	(YT921X_MIBn_DATA0(port) + 4 * (x))</div><div class='add'>+#define  YT921X_MIB_DATA_RX_BROADCAST		0x00</div><div class='add'>+#define  YT921X_MIB_DATA_RX_PAUSE		0x04</div><div class='add'>+#define  YT921X_MIB_DATA_RX_MULTICAST		0x08</div><div class='add'>+#define  YT921X_MIB_DATA_RX_CRC_ERR		0x0c</div><div class='add'>+</div><div class='add'>+#define  YT921X_MIB_DATA_RX_ALIGN_ERR		0x10</div><div class='add'>+#define  YT921X_MIB_DATA_RX_UNDERSIZE_ERR	0x14</div><div class='add'>+#define  YT921X_MIB_DATA_RX_FRAG_ERR		0x18</div><div class='add'>+#define  YT921X_MIB_DATA_RX_PKT_SZ_64		0x1c</div><div class='add'>+</div><div class='add'>+#define  YT921X_MIB_DATA_RX_PKT_SZ_65_TO_127	0x20</div><div class='add'>+#define  YT921X_MIB_DATA_RX_PKT_SZ_128_TO_255	0x24</div><div class='add'>+#define  YT921X_MIB_DATA_RX_PKT_SZ_256_TO_511	0x28</div><div class='add'>+#define  YT921X_MIB_DATA_RX_PKT_SZ_512_TO_1023	0x2c</div><div class='add'>+</div><div class='add'>+#define  YT921X_MIB_DATA_RX_PKT_SZ_1024_TO_1518	0x30</div><div class='add'>+#define  YT921X_MIB_DATA_RX_PKT_SZ_1519_TO_MAX	0x34</div><div class='add'>+/* 0x38: unused */</div><div class='add'>+#define  YT921X_MIB_DATA_RX_GOOD_BYTES		0x3c</div><div class='add'>+</div><div class='add'>+/* 0x40: 64 bytes */</div><div class='add'>+#define  YT921X_MIB_DATA_RX_BAD_BYTES		0x44</div><div class='add'>+/* 0x48: 64 bytes */</div><div class='add'>+#define  YT921X_MIB_DATA_RX_OVERSIZE_ERR	0x4c</div><div class='add'>+</div><div class='add'>+#define  YT921X_MIB_DATA_RX_DROPPED		0x50</div><div class='add'>+#define  YT921X_MIB_DATA_TX_BROADCAST		0x54</div><div class='add'>+#define  YT921X_MIB_DATA_TX_PAUSE		0x58</div><div class='add'>+#define  YT921X_MIB_DATA_TX_MULTICAST		0x5c</div><div class='add'>+</div><div class='add'>+#define  YT921X_MIB_DATA_TX_UNDERSIZE_ERR	0x60</div><div class='add'>+#define  YT921X_MIB_DATA_TX_PKT_SZ_64		0x64</div><div class='add'>+#define  YT921X_MIB_DATA_TX_PKT_SZ_65_TO_127	0x68</div><div class='add'>+#define  YT921X_MIB_DATA_TX_PKT_SZ_128_TO_255	0x6c</div><div class='add'>+</div><div class='add'>+#define  YT921X_MIB_DATA_TX_PKT_SZ_256_TO_511	0x70</div><div class='add'>+#define  YT921X_MIB_DATA_TX_PKT_SZ_512_TO_1023	0x74</div><div class='add'>+#define  YT921X_MIB_DATA_TX_PKT_SZ_1024_TO_1518	0x78</div><div class='add'>+#define  YT921X_MIB_DATA_TX_PKT_SZ_1519_TO_MAX	0x7c</div><div class='add'>+</div><div class='add'>+/* 0x80: unused */</div><div class='add'>+#define  YT921X_MIB_DATA_TX_GOOD_BYTES		0x84</div><div class='add'>+/* 0x88: 64 bytes */</div><div class='add'>+#define  YT921X_MIB_DATA_TX_COLLISION		0x8c</div><div class='add'>+</div><div class='add'>+#define  YT921X_MIB_DATA_TX_EXCESSIVE_COLLISION	0x90</div><div class='add'>+#define  YT921X_MIB_DATA_TX_MULTIPLE_COLLISION	0x94</div><div class='add'>+#define  YT921X_MIB_DATA_TX_SINGLE_COLLISION	0x98</div><div class='add'>+#define  YT921X_MIB_DATA_TX_PKT			0x9c</div><div class='add'>+</div><div class='add'>+#define  YT921X_MIB_DATA_TX_DEFERRED		0xa0</div><div class='add'>+#define  YT921X_MIB_DATA_TX_LATE_COLLISION	0xa4</div><div class='add'>+#define  YT921X_MIB_DATA_RX_OAM			0xa8</div><div class='add'>+#define  YT921X_MIB_DATA_TX_OAM			0xac</div><div class='add'>+</div><div class='add'>+#define YT921X_EDATA_CTRL		0xe0000</div><div class='add'>+#define  YT921X_EDATA_CTRL_ADDR_M		GENMASK(15, 8)</div><div class='add'>+#define   YT921X_EDATA_CTRL_ADDR(x)			FIELD_PREP(YT921X_EDATA_CTRL_ADDR_M, (x))</div><div class='add'>+#define  YT921X_EDATA_CTRL_OP_M			GENMASK(3, 0)</div><div class='add'>+#define   YT921X_EDATA_CTRL_OP(x)			FIELD_PREP(YT921X_EDATA_CTRL_OP_M, (x))</div><div class='add'>+#define   YT921X_EDATA_CTRL_READ			YT921X_EDATA_CTRL_OP(5)</div><div class='add'>+#define YT921X_EDATA_DATA		0xe0004</div><div class='add'>+#define  YT921X_EDATA_DATA_DATA_M			GENMASK(31, 24)</div><div class='add'>+#define  YT921X_EDATA_DATA_STATUS_M		GENMASK(3, 0)</div><div class='add'>+#define   YT921X_EDATA_DATA_STATUS(x)			FIELD_PREP(YT921X_EDATA_DATA_STATUS_M, (x))</div><div class='add'>+#define   YT921X_EDATA_DATA_IDLE			YT921X_EDATA_DATA_STATUS(3)</div><div class='add'>+</div><div class='add'>+#define YT921X_EXT_MBUS_OP		0x6a000</div><div class='add'>+#define YT921X_INT_MBUS_OP		0xf0000</div><div class='add'>+#define  YT921X_MBUS_OP_START			BIT(0)</div><div class='add'>+#define YT921X_EXT_MBUS_CTRL		0x6a004</div><div class='add'>+#define YT921X_INT_MBUS_CTRL		0xf0004</div><div class='add'>+#define  YT921X_MBUS_CTRL_PORT_M		GENMASK(25, 21)</div><div class='add'>+#define   YT921X_MBUS_CTRL_PORT(x)			FIELD_PREP(YT921X_MBUS_CTRL_PORT_M, (x))</div><div class='add'>+#define  YT921X_MBUS_CTRL_REG_M			GENMASK(20, 16)</div><div class='add'>+#define   YT921X_MBUS_CTRL_REG(x)			FIELD_PREP(YT921X_MBUS_CTRL_REG_M, (x))</div><div class='add'>+#define  YT921X_MBUS_CTRL_TYPE_M		GENMASK(11, 8)  /* wild guess */</div><div class='add'>+#define   YT921X_MBUS_CTRL_TYPE(x)			FIELD_PREP(YT921X_MBUS_CTRL_TYPE_M, (x))</div><div class='add'>+#define   YT921X_MBUS_CTRL_TYPE_C22			YT921X_MBUS_CTRL_TYPE(4)</div><div class='add'>+#define  YT921X_MBUS_CTRL_OP_M			GENMASK(3, 2)  /* wild guess */</div><div class='add'>+#define   YT921X_MBUS_CTRL_OP(x)			FIELD_PREP(YT921X_MBUS_CTRL_OP_M, (x))</div><div class='add'>+#define   YT921X_MBUS_CTRL_WRITE			YT921X_MBUS_CTRL_OP(1)</div><div class='add'>+#define   YT921X_MBUS_CTRL_READ				YT921X_MBUS_CTRL_OP(2)</div><div class='add'>+#define YT921X_EXT_MBUS_DOUT		0x6a008</div><div class='add'>+#define YT921X_INT_MBUS_DOUT		0xf0008</div><div class='add'>+#define YT921X_EXT_MBUS_DIN		0x6a00c</div><div class='add'>+#define YT921X_INT_MBUS_DIN		0xf000c</div><div class='add'>+</div><div class='add'>+#define YT921X_PORTn_EGR(port)		(0x100000 + 4 * (port))</div><div class='add'>+#define  YT921X_PORT_EGR_TPID_CTAG_M		GENMASK(5, 4)</div><div class='add'>+#define   YT921X_PORT_EGR_TPID_CTAG(x)			FIELD_PREP(YT921X_PORT_EGR_TPID_CTAG_M, (x))</div><div class='add'>+#define  YT921X_PORT_EGR_TPID_STAG_M		GENMASK(3, 2)</div><div class='add'>+#define   YT921X_PORT_EGR_TPID_STAG(x)			FIELD_PREP(YT921X_PORT_EGR_TPID_STAG_M, (x))</div><div class='add'>+#define YT921X_TPID_EGRn(x)		(0x100300 + 4 * (x))	/* [0, 3] */</div><div class='add'>+#define  YT921X_TPID_EGR_TPID_M			GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define YT921X_VLAN_IGR_FILTER		0x180280</div><div class='add'>+#define  YT921X_VLAN_IGR_FILTER_PORTn_BYPASS_IGMP(port)	BIT((port) + 11)</div><div class='add'>+#define  YT921X_VLAN_IGR_FILTER_PORTn(port)	BIT(port)</div><div class='add'>+#define YT921X_PORTn_ISOLATION(port)	(0x180294 + 4 * (port))</div><div class='add'>+#define  YT921X_PORT_ISOLATION_BLOCKn(port)	BIT(port)</div><div class='add'>+#define YT921X_STPn(n)			(0x18038c + 4 * (n))</div><div class='add'>+#define  YT921X_STP_PORTn_M(port)		GENMASK(2 * (port) + 1, 2 * (port))</div><div class='add'>+#define   YT921X_STP_PORTn(port, x)			((x) &lt;&lt; (2 * (port)))</div><div class='add'>+#define   YT921X_STP_PORTn_DISABLED(port)		YT921X_STP_PORTn(port, 0)</div><div class='add'>+#define   YT921X_STP_PORTn_LEARNING(port)		YT921X_STP_PORTn(port, 1)</div><div class='add'>+#define   YT921X_STP_PORTn_BLOCKING(port)		YT921X_STP_PORTn(port, 2)</div><div class='add'>+#define   YT921X_STP_PORTn_FORWARD(port)		YT921X_STP_PORTn(port, 3)</div><div class='add'>+#define YT921X_PORTn_LEARN(port)	(0x1803d0 + 4 * (port))</div><div class='add'>+#define  YT921X_PORT_LEARN_VID_LEARN_MULTI_EN	BIT(22)</div><div class='add'>+#define  YT921X_PORT_LEARN_VID_LEARN_MODE	BIT(21)</div><div class='add'>+#define  YT921X_PORT_LEARN_VID_LEARN_EN		BIT(20)</div><div class='add'>+#define  YT921X_PORT_LEARN_SUSPEND_COPY_EN	BIT(19)</div><div class='add'>+#define  YT921X_PORT_LEARN_SUSPEND_DROP_EN	BIT(18)</div><div class='add'>+#define  YT921X_PORT_LEARN_DIS			BIT(17)</div><div class='add'>+#define  YT921X_PORT_LEARN_LIMIT_EN		BIT(16)</div><div class='add'>+#define  YT921X_PORT_LEARN_LIMIT_M		GENMASK(15, 8)</div><div class='add'>+#define   YT921X_PORT_LEARN_LIMIT(x)			FIELD_PREP(YT921X_PORT_LEARN_LIMIT_M, (x))</div><div class='add'>+#define  YT921X_PORT_LEARN_DROP_ON_EXCEEDED	BIT(2)</div><div class='add'>+#define  YT921X_PORT_LEARN_MODE_M		GENMASK(1, 0)</div><div class='add'>+#define   YT921X_PORT_LEARN_MODE(x)			FIELD_PREP(YT921X_PORT_LEARN_MODE_M, (x))</div><div class='add'>+#define   YT921X_PORT_LEARN_MODE_AUTO			YT921X_PORT_LEARN_MODE(0)</div><div class='add'>+#define   YT921X_PORT_LEARN_MODE_AUTO_AND_COPY		YT921X_PORT_LEARN_MODE(1)</div><div class='add'>+#define   YT921X_PORT_LEARN_MODE_CPU_CONTROL		YT921X_PORT_LEARN_MODE(2)</div><div class='add'>+#define YT921X_AGEING			0x180440</div><div class='add'>+#define  YT921X_AGEING_INTERVAL_M		GENMASK(15, 0)</div><div class='add'>+#define YT921X_FDB_IN0			0x180454</div><div class='add'>+#define YT921X_FDB_IN1			0x180458</div><div class='add'>+#define YT921X_FDB_IN2			0x18045c</div><div class='add'>+#define YT921X_FDB_OP			0x180460</div><div class='add'>+#define  YT921X_FDB_OP_INDEX_M			GENMASK(22, 11)</div><div class='add'>+#define   YT921X_FDB_OP_INDEX(x)			FIELD_PREP(YT921X_FDB_OP_INDEX_M, (x))</div><div class='add'>+#define  YT921X_FDB_OP_MODE_INDEX		BIT(10)  /* mac+fid / index */</div><div class='add'>+#define  YT921X_FDB_OP_FLUSH_MCAST		BIT(9)  /* ucast / mcast */</div><div class='add'>+#define  YT921X_FDB_OP_FLUSH_M			GENMASK(8, 7)</div><div class='add'>+#define   YT921X_FDB_OP_FLUSH(x)			FIELD_PREP(YT921X_FDB_OP_FLUSH_M, (x))</div><div class='add'>+#define   YT921X_FDB_OP_FLUSH_ALL			YT921X_FDB_OP_FLUSH(0)</div><div class='add'>+#define   YT921X_FDB_OP_FLUSH_PORT			YT921X_FDB_OP_FLUSH(1)</div><div class='add'>+#define   YT921X_FDB_OP_FLUSH_PORT_VID			YT921X_FDB_OP_FLUSH(2)</div><div class='add'>+#define   YT921X_FDB_OP_FLUSH_VID			YT921X_FDB_OP_FLUSH(3)</div><div class='add'>+#define  YT921X_FDB_OP_FLUSH_STATIC		BIT(6)</div><div class='add'>+#define  YT921X_FDB_OP_NEXT_TYPE_M		GENMASK(5, 4)</div><div class='add'>+#define   YT921X_FDB_OP_NEXT_TYPE(x)			FIELD_PREP(YT921X_FDB_OP_NEXT_TYPE_M, (x))</div><div class='add'>+#define   YT921X_FDB_OP_NEXT_TYPE_UCAST_PORT		YT921X_FDB_OP_NEXT_TYPE(0)</div><div class='add'>+#define   YT921X_FDB_OP_NEXT_TYPE_UCAST_VID		YT921X_FDB_OP_NEXT_TYPE(1)</div><div class='add'>+#define   YT921X_FDB_OP_NEXT_TYPE_UCAST			YT921X_FDB_OP_NEXT_TYPE(2)</div><div class='add'>+#define   YT921X_FDB_OP_NEXT_TYPE_MCAST			YT921X_FDB_OP_NEXT_TYPE(3)</div><div class='add'>+#define  YT921X_FDB_OP_OP_M			GENMASK(3, 1)</div><div class='add'>+#define   YT921X_FDB_OP_OP(x)				FIELD_PREP(YT921X_FDB_OP_OP_M, (x))</div><div class='add'>+#define   YT921X_FDB_OP_OP_ADD				YT921X_FDB_OP_OP(0)</div><div class='add'>+#define   YT921X_FDB_OP_OP_DEL				YT921X_FDB_OP_OP(1)</div><div class='add'>+#define   YT921X_FDB_OP_OP_GET_ONE			YT921X_FDB_OP_OP(2)</div><div class='add'>+#define   YT921X_FDB_OP_OP_GET_NEXT			YT921X_FDB_OP_OP(3)</div><div class='add'>+#define   YT921X_FDB_OP_OP_FLUSH			YT921X_FDB_OP_OP(4)</div><div class='add'>+#define  YT921X_FDB_OP_START			BIT(0)</div><div class='add'>+#define YT921X_FDB_RESULT		0x180464</div><div class='add'>+#define  YT921X_FDB_RESULT_DONE			BIT(15)</div><div class='add'>+#define  YT921X_FDB_RESULT_NOTFOUND		BIT(14)</div><div class='add'>+#define  YT921X_FDB_RESULT_OVERWRITED		BIT(13)</div><div class='add'>+#define  YT921X_FDB_RESULT_INDEX_M		GENMASK(11, 0)</div><div class='add'>+#define   YT921X_FDB_RESULT_INDEX(x)			FIELD_PREP(YT921X_FDB_RESULT_INDEX_M, (x))</div><div class='add'>+#define YT921X_FDB_OUT0			0x1804b0</div><div class='add'>+#define  YT921X_FDB_IO0_ADDR_HI4_M		GENMASK(31, 0)</div><div class='add'>+#define YT921X_FDB_OUT1			0x1804b4</div><div class='add'>+#define  YT921X_FDB_IO1_EGR_INT_PRI_EN		BIT(31)</div><div class='add'>+#define  YT921X_FDB_IO1_STATUS_M		GENMASK(30, 28)</div><div class='add'>+#define   YT921X_FDB_IO1_STATUS(x)			FIELD_PREP(YT921X_FDB_IO1_STATUS_M, (x))</div><div class='add'>+#define   YT921X_FDB_IO1_STATUS_INVALID			YT921X_FDB_IO1_STATUS(0)</div><div class='add'>+#define   YT921X_FDB_IO1_STATUS_MIN_TIME		YT921X_FDB_IO1_STATUS(1)</div><div class='add'>+#define   YT921X_FDB_IO1_STATUS_MOVE_AGING_MAX_TIME	YT921X_FDB_IO1_STATUS(3)</div><div class='add'>+#define   YT921X_FDB_IO1_STATUS_MAX_TIME		YT921X_FDB_IO1_STATUS(5)</div><div class='add'>+#define   YT921X_FDB_IO1_STATUS_PENDING			YT921X_FDB_IO1_STATUS(6)</div><div class='add'>+#define   YT921X_FDB_IO1_STATUS_STATIC			YT921X_FDB_IO1_STATUS(7)</div><div class='add'>+#define  YT921X_FDB_IO1_FID_M			GENMASK(27, 16)  /* filtering ID (VID) */</div><div class='add'>+#define   YT921X_FDB_IO1_FID(x)				FIELD_PREP(YT921X_FDB_IO1_FID_M, (x))</div><div class='add'>+#define  YT921X_FDB_IO1_ADDR_LO2_M		GENMASK(15, 0)</div><div class='add'>+#define YT921X_FDB_OUT2			0x1804b8</div><div class='add'>+#define  YT921X_FDB_IO2_MOVE_AGING_STATUS_M	GENMASK(31, 30)</div><div class='add'>+#define  YT921X_FDB_IO2_IGR_DROP		BIT(29)</div><div class='add'>+#define  YT921X_FDB_IO2_EGR_PORTS_M		GENMASK(28, 18)</div><div class='add'>+#define   YT921X_FDB_IO2_EGR_PORTS(x)			FIELD_PREP(YT921X_FDB_IO2_EGR_PORTS_M, (x))</div><div class='add'>+#define  YT921X_FDB_IO2_EGR_DROP		BIT(17)</div><div class='add'>+#define  YT921X_FDB_IO2_COPY_TO_CPU		BIT(16)</div><div class='add'>+#define  YT921X_FDB_IO2_IGR_INT_PRI_EN		BIT(15)</div><div class='add'>+#define  YT921X_FDB_IO2_INT_PRI_M		GENMASK(14, 12)</div><div class='add'>+#define   YT921X_FDB_IO2_INT_PRI(x)			FIELD_PREP(YT921X_FDB_IO2_INT_PRI_M, (x))</div><div class='add'>+#define  YT921X_FDB_IO2_NEW_VID_M		GENMASK(11, 0)</div><div class='add'>+#define   YT921X_FDB_IO2_NEW_VID(x)			FIELD_PREP(YT921X_FDB_IO2_NEW_VID_M, (x))</div><div class='add'>+#define YT921X_FILTER_UNK_UCAST		0x180508</div><div class='add'>+#define YT921X_FILTER_UNK_MCAST		0x18050c</div><div class='add'>+#define YT921X_FILTER_MCAST		0x180510</div><div class='add'>+#define YT921X_FILTER_BCAST		0x180514</div><div class='add'>+#define  YT921X_FILTER_PORTS_M			GENMASK(10, 0)</div><div class='add'>+#define   YT921X_FILTER_PORTS(x)			FIELD_PREP(YT921X_FILTER_PORTS_M, (x))</div><div class='add'>+#define  YT921X_FILTER_PORTn(port)		BIT(port)</div><div class='add'>+#define YT921X_VLAN_EGR_FILTER		0x180598</div><div class='add'>+#define  YT921X_VLAN_EGR_FILTER_PORTn(port)	BIT(port)</div><div class='add'>+#define YT921X_CPU_COPY			0x180690</div><div class='add'>+#define  YT921X_CPU_COPY_FORCE_INT_PORT		BIT(2)</div><div class='add'>+#define  YT921X_CPU_COPY_TO_INT_CPU		BIT(1)</div><div class='add'>+#define  YT921X_CPU_COPY_TO_EXT_CPU		BIT(0)</div><div class='add'>+#define YT921X_ACT_UNK_UCAST		0x180734</div><div class='add'>+#define YT921X_ACT_UNK_MCAST		0x180738</div><div class='add'>+#define  YT921X_ACT_UNK_MCAST_BYPASS_DROP_RMA	BIT(23)</div><div class='add'>+#define  YT921X_ACT_UNK_MCAST_BYPASS_DROP_IGMP	BIT(22)</div><div class='add'>+#define  YT921X_ACT_UNK_ACTn_M(port)		GENMASK(2 * (port) + 1, 2 * (port))</div><div class='add'>+#define   YT921X_ACT_UNK_ACTn(port, x)			((x) &lt;&lt; (2 * (port)))</div><div class='add'>+#define   YT921X_ACT_UNK_ACTn_FORWARD(port)		YT921X_ACT_UNK_ACTn(port, 0)  /* flood */</div><div class='add'>+#define   YT921X_ACT_UNK_ACTn_TRAP(port)		YT921X_ACT_UNK_ACTn(port, 1)  /* steer to CPU */</div><div class='add'>+#define   YT921X_ACT_UNK_ACTn_DROP(port)		YT921X_ACT_UNK_ACTn(port, 2)  /* discard */</div><div class='add'>+/* NEVER use this action; see comments in the tag driver */</div><div class='add'>+#define   YT921X_ACT_UNK_ACTn_COPY(port)		YT921X_ACT_UNK_ACTn(port, 3)  /* flood and copy */</div><div class='add'>+#define YT921X_FDB_HW_FLUSH		0x180958</div><div class='add'>+#define  YT921X_FDB_HW_FLUSH_ON_LINKDOWN	BIT(0)</div><div class='add'>+</div><div class='add'>+#define YT921X_VLANn_CTRL(vlan)		(0x188000 + 8 * (vlan))</div><div class='add'>+#define  YT921X_VLAN_CTRL_UNTAG_PORTS_M		GENMASK_ULL(50, 40)</div><div class='add'>+#define   YT921X_VLAN_CTRL_UNTAG_PORTS(x)		FIELD_PREP(YT921X_VLAN_CTRL_UNTAG_PORTS_M, (x))</div><div class='add'>+#define  YT921X_VLAN_CTRL_UNTAG_PORTn(port)	BIT_ULL((port) + 40)</div><div class='add'>+#define  YT921X_VLAN_CTRL_STP_ID_M		GENMASK_ULL(39, 36)</div><div class='add'>+#define   YT921X_VLAN_CTRL_STP_ID(x)			FIELD_PREP(YT921X_VLAN_CTRL_STP_ID_M, (x))</div><div class='add'>+#define  YT921X_VLAN_CTRL_SVLAN_EN		BIT_ULL(35)</div><div class='add'>+#define  YT921X_VLAN_CTRL_FID_M			GENMASK_ULL(34, 23)</div><div class='add'>+#define   YT921X_VLAN_CTRL_FID(x)			FIELD_PREP(YT921X_VLAN_CTRL_FID_M, (x))</div><div class='add'>+#define  YT921X_VLAN_CTRL_LEARN_DIS		BIT_ULL(22)</div><div class='add'>+#define  YT921X_VLAN_CTRL_INT_PRI_EN		BIT_ULL(21)</div><div class='add'>+#define  YT921X_VLAN_CTRL_INT_PRI_M		GENMASK_ULL(20, 18)</div><div class='add'>+#define  YT921X_VLAN_CTRL_PORTS_M		GENMASK_ULL(17, 7)</div><div class='add'>+#define   YT921X_VLAN_CTRL_PORTS(x)			FIELD_PREP(YT921X_VLAN_CTRL_PORTS_M, (x))</div><div class='add'>+#define  YT921X_VLAN_CTRL_PORTn(port)		BIT_ULL((port) + 7)</div><div class='add'>+#define  YT921X_VLAN_CTRL_BYPASS_1X_AC		BIT_ULL(6)</div><div class='add'>+#define  YT921X_VLAN_CTRL_METER_EN		BIT_ULL(5)</div><div class='add'>+#define  YT921X_VLAN_CTRL_METER_ID_M		GENMASK_ULL(4, 0)</div><div class='add'>+</div><div class='add'>+#define YT921X_TPID_IGRn(x)		(0x210000 + 4 * (x))	/* [0, 3] */</div><div class='add'>+#define  YT921X_TPID_IGR_TPID_M			GENMASK(15, 0)</div><div class='add'>+#define YT921X_PORTn_IGR_TPID(port)	(0x210010 + 4 * (port))</div><div class='add'>+#define  YT921X_PORT_IGR_TPIDn_STAG_M		GENMASK(7, 4)</div><div class='add'>+#define  YT921X_PORT_IGR_TPIDn_STAG(x)		BIT((x) + 4)</div><div class='add'>+#define  YT921X_PORT_IGR_TPIDn_CTAG_M		GENMASK(3, 0)</div><div class='add'>+#define  YT921X_PORT_IGR_TPIDn_CTAG(x)		BIT(x)</div><div class='add'>+</div><div class='add'>+#define YT921X_PORTn_VLAN_CTRL(port)	(0x230010 + 4 * (port))</div><div class='add'>+#define  YT921X_PORT_VLAN_CTRL_SVLAN_PRI_EN	BIT(31)</div><div class='add'>+#define  YT921X_PORT_VLAN_CTRL_CVLAN_PRI_EN	BIT(30)</div><div class='add'>+#define  YT921X_PORT_VLAN_CTRL_SVID_M		GENMASK(29, 18)</div><div class='add'>+#define   YT921X_PORT_VLAN_CTRL_SVID(x)			FIELD_PREP(YT921X_PORT_VLAN_CTRL_SVID_M, (x))</div><div class='add'>+#define  YT921X_PORT_VLAN_CTRL_CVID_M		GENMASK(17, 6)</div><div class='add'>+#define   YT921X_PORT_VLAN_CTRL_CVID(x)			FIELD_PREP(YT921X_PORT_VLAN_CTRL_CVID_M, (x))</div><div class='add'>+#define  YT921X_PORT_VLAN_CTRL_SVLAN_PRI_M	GENMASK(5, 3)</div><div class='add'>+#define  YT921X_PORT_VLAN_CTRL_CVLAN_PRI_M	GENMASK(2, 0)</div><div class='add'>+#define YT921X_PORTn_VLAN_CTRL1(port)	(0x230080 + 4 * (port))</div><div class='add'>+#define  YT921X_PORT_VLAN_CTRL1_VLAN_RANGE_EN	BIT(8)</div><div class='add'>+#define  YT921X_PORT_VLAN_CTRL1_VLAN_RANGE_PROFILE_ID_M	GENMASK(7, 4)</div><div class='add'>+#define  YT921X_PORT_VLAN_CTRL1_SVLAN_DROP_TAGGED	BIT(3)</div><div class='add'>+#define  YT921X_PORT_VLAN_CTRL1_SVLAN_DROP_UNTAGGED	BIT(2)</div><div class='add'>+#define  YT921X_PORT_VLAN_CTRL1_CVLAN_DROP_TAGGED	BIT(1)</div><div class='add'>+#define  YT921X_PORT_VLAN_CTRL1_CVLAN_DROP_UNTAGGED	BIT(0)</div><div class='add'>+</div><div class='add'>+#define YT921X_MIRROR			0x300300</div><div class='add'>+#define  YT921X_MIRROR_IGR_PORTS_M		GENMASK(26, 16)</div><div class='add'>+#define   YT921X_MIRROR_IGR_PORTS(x)			FIELD_PREP(YT921X_MIRROR_IGR_PORTS_M, (x))</div><div class='add'>+#define  YT921X_MIRROR_IGR_PORTn(port)		BIT((port) + 16)</div><div class='add'>+#define  YT921X_MIRROR_EGR_PORTS_M		GENMASK(14, 4)</div><div class='add'>+#define   YT921X_MIRROR_EGR_PORTS(x)			FIELD_PREP(YT921X_MIRROR_EGR_PORTS_M, (x))</div><div class='add'>+#define  YT921X_MIRROR_EGR_PORTn(port)		BIT((port) + 4)</div><div class='add'>+#define  YT921X_MIRROR_PORT_M			GENMASK(3, 0)</div><div class='add'>+#define   YT921X_MIRROR_PORT(x)				FIELD_PREP(YT921X_MIRROR_PORT_M, (x))</div><div class='add'>+</div><div class='add'>+#define YT921X_EDATA_EXTMODE	0xfb</div><div class='add'>+#define YT921X_EDATA_LEN	0x100</div><div class='add'>+</div><div class='add'>+#define YT921X_FDB_NUM	4096</div><div class='add'>+</div><div class='add'>+enum yt921x_fdb_entry_status {</div><div class='add'>+	YT921X_FDB_ENTRY_STATUS_INVALID = 0,</div><div class='add'>+	YT921X_FDB_ENTRY_STATUS_MIN_TIME = 1,</div><div class='add'>+	YT921X_FDB_ENTRY_STATUS_MOVE_AGING_MAX_TIME = 3,</div><div class='add'>+	YT921X_FDB_ENTRY_STATUS_MAX_TIME = 5,</div><div class='add'>+	YT921X_FDB_ENTRY_STATUS_PENDING = 6,</div><div class='add'>+	YT921X_FDB_ENTRY_STATUS_STATIC = 7,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define YT921X_MSTI_NUM		16</div><div class='add'>+</div><div class='add'>+#define YT9215_MAJOR	0x9002</div><div class='add'>+#define YT9218_MAJOR	0x9001</div><div class='add'>+</div><div class='add'>+/* required for a hard reset */</div><div class='add'>+#define YT921X_RST_DELAY_US	10000</div><div class='add'>+</div><div class='add'>+#define YT921X_FRAME_SIZE_MAX	0x2400  /* 9216 */</div><div class='add'>+</div><div class='add'>+#define YT921X_TAG_LEN	8</div><div class='add'>+</div><div class='add'>+/* 8 internal + 2 external + 1 mcu */</div><div class='add'>+#define YT921X_PORT_NUM			11</div><div class='add'>+</div><div class='add'>+#define yt921x_port_is_internal(port) ((port) &lt; 8)</div><div class='add'>+#define yt921x_port_is_external(port) (8 &lt;= (port) &amp;&amp; (port) &lt; 9)</div><div class='add'>+</div><div class='add'>+struct yt921x_mib {</div><div class='add'>+	u64 rx_broadcast;</div><div class='add'>+	u64 rx_pause;</div><div class='add'>+	u64 rx_multicast;</div><div class='add'>+	u64 rx_crc_errors;</div><div class='add'>+</div><div class='add'>+	u64 rx_alignment_errors;</div><div class='add'>+	u64 rx_undersize_errors;</div><div class='add'>+	u64 rx_fragment_errors;</div><div class='add'>+	u64 rx_64byte;</div><div class='add'>+</div><div class='add'>+	u64 rx_65_127byte;</div><div class='add'>+	u64 rx_128_255byte;</div><div class='add'>+	u64 rx_256_511byte;</div><div class='add'>+	u64 rx_512_1023byte;</div><div class='add'>+</div><div class='add'>+	u64 rx_1024_1518byte;</div><div class='add'>+	u64 rx_jumbo;</div><div class='add'>+	u64 rx_good_bytes;</div><div class='add'>+</div><div class='add'>+	u64 rx_bad_bytes;</div><div class='add'>+	u64 rx_oversize_errors;</div><div class='add'>+</div><div class='add'>+	u64 rx_dropped;</div><div class='add'>+	u64 tx_broadcast;</div><div class='add'>+	u64 tx_pause;</div><div class='add'>+	u64 tx_multicast;</div><div class='add'>+</div><div class='add'>+	u64 tx_undersize_errors;</div><div class='add'>+	u64 tx_64byte;</div><div class='add'>+	u64 tx_65_127byte;</div><div class='add'>+	u64 tx_128_255byte;</div><div class='add'>+</div><div class='add'>+	u64 tx_256_511byte;</div><div class='add'>+	u64 tx_512_1023byte;</div><div class='add'>+	u64 tx_1024_1518byte;</div><div class='add'>+	u64 tx_jumbo;</div><div class='add'>+</div><div class='add'>+	u64 tx_good_bytes;</div><div class='add'>+	u64 tx_collisions;</div><div class='add'>+</div><div class='add'>+	u64 tx_aborted_errors;</div><div class='add'>+	u64 tx_multiple_collisions;</div><div class='add'>+	u64 tx_single_collisions;</div><div class='add'>+	u64 tx_good;</div><div class='add'>+</div><div class='add'>+	u64 tx_deferred;</div><div class='add'>+	u64 tx_late_collisions;</div><div class='add'>+	u64 rx_oam;</div><div class='add'>+	u64 tx_oam;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct yt921x_port {</div><div class='add'>+	unsigned char index;</div><div class='add'>+</div><div class='add'>+	bool hairpin;</div><div class='add'>+	bool isolated;</div><div class='add'>+</div><div class='add'>+	struct delayed_work mib_read;</div><div class='add'>+	struct yt921x_mib mib;</div><div class='add'>+	u64 rx_frames;</div><div class='add'>+	u64 tx_frames;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct yt921x_reg_ops {</div><div class='add'>+	int (*read)(void *context, u32 reg, u32 *valp);</div><div class='add'>+	int (*write)(void *context, u32 reg, u32 val);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct yt921x_priv {</div><div class='add'>+	struct dsa_switch ds;</div><div class='add'>+</div><div class='add'>+	const struct yt921x_info *info;</div><div class='add'>+	/* cache of dsa_cpu_ports(ds) */</div><div class='add'>+	u16 cpu_ports_mask;</div><div class='add'>+</div><div class='add'>+	/* protect the access to the switch registers */</div><div class='add'>+	struct mutex reg_lock;</div><div class='add'>+	const struct yt921x_reg_ops *reg_ops;</div><div class='add'>+	void *reg_ctx;</div><div class='add'>+</div><div class='add'>+	/* mdio master bus */</div><div class='add'>+	struct mii_bus *mbus_int;</div><div class='add'>+	struct mii_bus *mbus_ext;</div><div class='add'>+</div><div class='add'>+	struct yt921x_port ports[YT921X_PORT_NUM];</div><div class='add'>+</div><div class='add'>+	u16 eee_ports_mask;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/dummy.c b/drivers/net/dummy.c<br/>index 49adbf1b7574..d6bdad4baadd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/dummy.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/dummy.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/dummy.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/dummy.c</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /* dummy.c: a dummy net driver</div><div class='ctx'> </div><div class='ctx'> 	The purpose of this driver is to provide a device to point a</div><div class='hunk'>@@ -32,14 +33,16 @@</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/moduleparam.h&gt;</div><div class='ctx'> #include &lt;linux/rtnetlink.h&gt;</div><div class='add'>+#include &lt;linux/net_tstamp.h&gt;</div><div class='add'>+#include &lt;net/netdev_lock.h&gt;</div><div class='ctx'> #include &lt;net/rtnetlink.h&gt;</div><div class='ctx'> #include &lt;linux/u64_stats_sync.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define DRV_NAME	"dummy"</div><div class='del'>-#define DRV_VERSION	"1.0"</div><div class='ctx'> </div><div class='ctx'> static int numdummies = 1;</div><div class='ctx'> </div><div class='hunk'>@@ -48,61 +51,29 @@ static void set_multicast_list(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct pcpu_dstats {</div><div class='del'>-	u64			tx_packets;</div><div class='del'>-	u64			tx_bytes;</div><div class='del'>-	struct u64_stats_sync	syncp;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct rtnl_link_stats64 *dummy_get_stats64(struct net_device *dev,</div><div class='del'>-						   struct rtnl_link_stats64 *stats)</div><div class='add'>+static void dummy_get_stats64(struct net_device *dev,</div><div class='add'>+			      struct rtnl_link_stats64 *stats)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for_each_possible_cpu(i) {</div><div class='del'>-		const struct pcpu_dstats *dstats;</div><div class='del'>-		u64 tbytes, tpackets;</div><div class='del'>-		unsigned int start;</div><div class='del'>-</div><div class='del'>-		dstats = per_cpu_ptr(dev-&gt;dstats, i);</div><div class='del'>-		do {</div><div class='del'>-			start = u64_stats_fetch_begin_irq(&amp;dstats-&gt;syncp);</div><div class='del'>-			tbytes = dstats-&gt;tx_bytes;</div><div class='del'>-			tpackets = dstats-&gt;tx_packets;</div><div class='del'>-		} while (u64_stats_fetch_retry_irq(&amp;dstats-&gt;syncp, start));</div><div class='del'>-		stats-&gt;tx_bytes += tbytes;</div><div class='del'>-		stats-&gt;tx_packets += tpackets;</div><div class='del'>-	}</div><div class='del'>-	return stats;</div><div class='add'>+	dev_lstats_read(dev, &amp;stats-&gt;tx_packets, &amp;stats-&gt;tx_bytes);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static netdev_tx_t dummy_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct pcpu_dstats *dstats = this_cpu_ptr(dev-&gt;dstats);</div><div class='del'>-</div><div class='del'>-	u64_stats_update_begin(&amp;dstats-&gt;syncp);</div><div class='del'>-	dstats-&gt;tx_packets++;</div><div class='del'>-	dstats-&gt;tx_bytes += skb-&gt;len;</div><div class='del'>-	u64_stats_update_end(&amp;dstats-&gt;syncp);</div><div class='add'>+	dev_lstats_add(dev, skb-&gt;len);</div><div class='ctx'> </div><div class='add'>+	skb_tx_timestamp(skb);</div><div class='ctx'> 	dev_kfree_skb(skb);</div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int dummy_dev_init(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	dev-&gt;dstats = netdev_alloc_pcpu_stats(struct pcpu_dstats);</div><div class='del'>-	if (!dev-&gt;dstats)</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+	dev-&gt;pcpu_stat_type = NETDEV_PCPU_STAT_LSTATS;</div><div class='ctx'> </div><div class='add'>+	netdev_lockdep_set_classes(dev);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void dummy_dev_uninit(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	free_percpu(dev-&gt;dstats);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int dummy_change_carrier(struct net_device *dev, bool new_carrier)</div><div class='ctx'> {</div><div class='ctx'> 	if (new_carrier)</div><div class='hunk'>@@ -114,7 +85,6 @@ static int dummy_change_carrier(struct net_device *dev, bool new_carrier)</div><div class='ctx'> </div><div class='ctx'> static const struct net_device_ops dummy_netdev_ops = {</div><div class='ctx'> 	.ndo_init		= dummy_dev_init,</div><div class='del'>-	.ndo_uninit		= dummy_dev_uninit,</div><div class='ctx'> 	.ndo_start_xmit		= dummy_xmit,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> 	.ndo_set_rx_mode	= set_multicast_list,</div><div class='hunk'>@@ -123,15 +93,8 @@ static const struct net_device_ops dummy_netdev_ops = {</div><div class='ctx'> 	.ndo_change_carrier	= dummy_change_carrier,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void dummy_get_drvinfo(struct net_device *dev,</div><div class='del'>-			      struct ethtool_drvinfo *info)</div><div class='del'>-{</div><div class='del'>-	strlcpy(info-&gt;driver, DRV_NAME, sizeof(info-&gt;driver));</div><div class='del'>-	strlcpy(info-&gt;version, DRV_VERSION, sizeof(info-&gt;version));</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static const struct ethtool_ops dummy_ethtool_ops = {</div><div class='del'>-	.get_drvinfo            = dummy_get_drvinfo,</div><div class='add'>+	.get_ts_info		= ethtool_op_get_ts_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void dummy_setup(struct net_device *dev)</div><div class='hunk'>@@ -141,19 +104,28 @@ static void dummy_setup(struct net_device *dev)</div><div class='ctx'> 	/* Initialize the device structure. */</div><div class='ctx'> 	dev-&gt;netdev_ops = &amp;dummy_netdev_ops;</div><div class='ctx'> 	dev-&gt;ethtool_ops = &amp;dummy_ethtool_ops;</div><div class='del'>-	dev-&gt;destructor = free_netdev;</div><div class='add'>+	dev-&gt;needs_free_netdev = true;</div><div class='add'>+	dev-&gt;request_ops_lock = true;</div><div class='ctx'> </div><div class='ctx'> 	/* Fill in device structure with ethernet-generic values. */</div><div class='del'>-	dev-&gt;tx_queue_len = 0;</div><div class='ctx'> 	dev-&gt;flags |= IFF_NOARP;</div><div class='ctx'> 	dev-&gt;flags &amp;= ~IFF_MULTICAST;</div><div class='del'>-	dev-&gt;priv_flags |= IFF_LIVE_ADDR_CHANGE;</div><div class='del'>-	dev-&gt;features	|= NETIF_F_SG | NETIF_F_FRAGLIST | NETIF_F_TSO;</div><div class='del'>-	dev-&gt;features	|= NETIF_F_HW_CSUM | NETIF_F_HIGHDMA | NETIF_F_LLTX;</div><div class='add'>+	dev-&gt;priv_flags |= IFF_LIVE_ADDR_CHANGE | IFF_NO_QUEUE;</div><div class='add'>+	dev-&gt;lltx = true;</div><div class='add'>+	dev-&gt;features	|= NETIF_F_SG | NETIF_F_FRAGLIST;</div><div class='add'>+	dev-&gt;features	|= NETIF_F_GSO_SOFTWARE;</div><div class='add'>+	dev-&gt;features	|= NETIF_F_HW_CSUM | NETIF_F_HIGHDMA;</div><div class='add'>+	dev-&gt;features	|= NETIF_F_GSO_ENCAP_ALL;</div><div class='add'>+	dev-&gt;hw_features |= dev-&gt;features;</div><div class='add'>+	dev-&gt;hw_enc_features |= dev-&gt;features;</div><div class='ctx'> 	eth_hw_addr_random(dev);</div><div class='add'>+</div><div class='add'>+	dev-&gt;min_mtu = 0;</div><div class='add'>+	dev-&gt;max_mtu = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int dummy_validate(struct nlattr *tb[], struct nlattr *data[])</div><div class='add'>+static int dummy_validate(struct nlattr *tb[], struct nlattr *data[],</div><div class='add'>+			  struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	if (tb[IFLA_ADDRESS]) {</div><div class='ctx'> 		if (nla_len(tb[IFLA_ADDRESS]) != ETH_ALEN)</div><div class='hunk'>@@ -179,7 +151,7 @@ static int __init dummy_init_one(void)</div><div class='ctx'> 	struct net_device *dev_dummy;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	dev_dummy = alloc_netdev(0, "dummy%d", NET_NAME_UNKNOWN, dummy_setup);</div><div class='add'>+	dev_dummy = alloc_netdev(0, "dummy%d", NET_NAME_ENUM, dummy_setup);</div><div class='ctx'> 	if (!dev_dummy)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -198,20 +170,21 @@ static int __init dummy_init_module(void)</div><div class='ctx'> {</div><div class='ctx'> 	int i, err = 0;</div><div class='ctx'> </div><div class='del'>-	rtnl_lock();</div><div class='del'>-	err = __rtnl_link_register(&amp;dummy_link_ops);</div><div class='add'>+	err = rtnl_link_register(&amp;dummy_link_ops);</div><div class='ctx'> 	if (err &lt; 0)</div><div class='del'>-		goto out;</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	rtnl_net_lock(&amp;init_net);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; numdummies &amp;&amp; !err; i++) {</div><div class='ctx'> 		err = dummy_init_one();</div><div class='ctx'> 		cond_resched();</div><div class='ctx'> 	}</div><div class='del'>-	if (err &lt; 0)</div><div class='del'>-		__rtnl_link_unregister(&amp;dummy_link_ops);</div><div class='ctx'> </div><div class='del'>-out:</div><div class='del'>-	rtnl_unlock();</div><div class='add'>+	rtnl_net_unlock(&amp;init_net);</div><div class='add'>+</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		rtnl_link_unregister(&amp;dummy_link_ops);</div><div class='ctx'> </div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -224,5 +197,5 @@ static void __exit dummy_cleanup_module(void)</div><div class='ctx'> module_init(dummy_init_module);</div><div class='ctx'> module_exit(dummy_cleanup_module);</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_DESCRIPTION("Dummy netdevice driver which discards all packets sent to it");</div><div class='ctx'> MODULE_ALIAS_RTNL_LINK(DRV_NAME);</div><div class='del'>-MODULE_VERSION(DRV_VERSION);</div><div class='head'>diff --git a/drivers/net/eql.c b/drivers/net/eql.c<br/>index a10ad74cc8d2..9ba10efd3794 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/eql.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/eql.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/eql.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/eql.c</a></div><div class='hunk'>@@ -113,6 +113,7 @@</div><div class='ctx'> </div><div class='ctx'> #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/compat.h&gt;</div><div class='ctx'> #include &lt;linux/capability.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='hunk'>@@ -127,11 +128,12 @@</div><div class='ctx'> #include &lt;linux/if_eql.h&gt;</div><div class='ctx'> #include &lt;linux/pkt_sched.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> static int eql_open(struct net_device *dev);</div><div class='ctx'> static int eql_close(struct net_device *dev);</div><div class='del'>-static int eql_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);</div><div class='add'>+static int eql_siocdevprivate(struct net_device *dev, struct ifreq *ifr,</div><div class='add'>+			      void __user *data, int cmd);</div><div class='ctx'> static netdev_tx_t eql_slave_xmit(struct sk_buff *skb, struct net_device *dev);</div><div class='ctx'> </div><div class='ctx'> #define eql_is_slave(dev)	((dev-&gt;flags &amp; IFF_SLAVE) == IFF_SLAVE)</div><div class='hunk'>@@ -139,9 +141,9 @@ static netdev_tx_t eql_slave_xmit(struct sk_buff *skb, struct net_device *dev);</div><div class='ctx'> </div><div class='ctx'> static void eql_kill_one_slave(slave_queue_t *queue, slave_t *slave);</div><div class='ctx'> </div><div class='del'>-static void eql_timer(unsigned long param)</div><div class='add'>+static void eql_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	equalizer_t *eql = (equalizer_t *) param;</div><div class='add'>+	equalizer_t *eql = timer_container_of(eql, t, timer);</div><div class='ctx'> 	struct list_head *this, *tmp, *head;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;eql-&gt;queue.lock);</div><div class='hunk'>@@ -170,7 +172,7 @@ static const char version[] __initconst =</div><div class='ctx'> static const struct net_device_ops eql_netdev_ops = {</div><div class='ctx'> 	.ndo_open	= eql_open,</div><div class='ctx'> 	.ndo_stop	= eql_close,</div><div class='del'>-	.ndo_do_ioctl	= eql_ioctl,</div><div class='add'>+	.ndo_siocdevprivate = eql_siocdevprivate,</div><div class='ctx'> 	.ndo_start_xmit	= eql_slave_xmit,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -178,10 +180,8 @@ static void __init eql_setup(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	equalizer_t *eql = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	init_timer(&amp;eql-&gt;timer);</div><div class='del'>-	eql-&gt;timer.data     	= (unsigned long) eql;</div><div class='add'>+	timer_setup(&amp;eql-&gt;timer, eql_timer, 0);</div><div class='ctx'> 	eql-&gt;timer.expires  	= jiffies + EQL_DEFAULT_RESCHED_IVAL;</div><div class='del'>-	eql-&gt;timer.function 	= eql_timer;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_init(&amp;eql-&gt;queue.lock);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;eql-&gt;queue.all_slaves);</div><div class='hunk'>@@ -225,7 +225,7 @@ static void eql_kill_one_slave(slave_queue_t *queue, slave_t *slave)</div><div class='ctx'> 	list_del(&amp;slave-&gt;list);</div><div class='ctx'> 	queue-&gt;num_slaves--;</div><div class='ctx'> 	slave-&gt;dev-&gt;flags &amp;= ~IFF_SLAVE;</div><div class='del'>-	dev_put(slave-&gt;dev);</div><div class='add'>+	netdev_put(slave-&gt;dev, &amp;slave-&gt;dev_tracker);</div><div class='ctx'> 	kfree(slave);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -254,7 +254,7 @@ static int eql_close(struct net_device *dev)</div><div class='ctx'> 	 *	at the data structure it scans every so often...</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;eql-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;eql-&gt;timer);</div><div class='ctx'> </div><div class='ctx'> 	eql_kill_slave_queue(&amp;eql-&gt;queue);</div><div class='ctx'> </div><div class='hunk'>@@ -270,25 +270,29 @@ static int eql_s_slave_cfg(struct net_device *dev, slave_config_t __user *sc);</div><div class='ctx'> static int eql_g_master_cfg(struct net_device *dev, master_config_t __user *mc);</div><div class='ctx'> static int eql_s_master_cfg(struct net_device *dev, master_config_t __user *mc);</div><div class='ctx'> </div><div class='del'>-static int eql_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)</div><div class='add'>+static int eql_siocdevprivate(struct net_device *dev, struct ifreq *ifr,</div><div class='add'>+			      void __user *data, int cmd)</div><div class='ctx'> {</div><div class='ctx'> 	if (cmd != EQL_GETMASTRCFG &amp;&amp; cmd != EQL_GETSLAVECFG &amp;&amp;</div><div class='ctx'> 	    !capable(CAP_NET_ADMIN))</div><div class='ctx'> 	  	return -EPERM;</div><div class='ctx'> </div><div class='add'>+	if (in_compat_syscall()) /* to be implemented */</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='ctx'> 	switch (cmd) {</div><div class='ctx'> 		case EQL_ENSLAVE:</div><div class='del'>-			return eql_enslave(dev, ifr-&gt;ifr_data);</div><div class='add'>+			return eql_enslave(dev, data);</div><div class='ctx'> 		case EQL_EMANCIPATE:</div><div class='del'>-			return eql_emancipate(dev, ifr-&gt;ifr_data);</div><div class='add'>+			return eql_emancipate(dev, data);</div><div class='ctx'> 		case EQL_GETSLAVECFG:</div><div class='del'>-			return eql_g_slave_cfg(dev, ifr-&gt;ifr_data);</div><div class='add'>+			return eql_g_slave_cfg(dev, data);</div><div class='ctx'> 		case EQL_SETSLAVECFG:</div><div class='del'>-			return eql_s_slave_cfg(dev, ifr-&gt;ifr_data);</div><div class='add'>+			return eql_s_slave_cfg(dev, data);</div><div class='ctx'> 		case EQL_GETMASTRCFG:</div><div class='del'>-			return eql_g_master_cfg(dev, ifr-&gt;ifr_data);</div><div class='add'>+			return eql_g_master_cfg(dev, data);</div><div class='ctx'> 		case EQL_SETMASTRCFG:</div><div class='del'>-			return eql_s_master_cfg(dev, ifr-&gt;ifr_data);</div><div class='add'>+			return eql_s_master_cfg(dev, data);</div><div class='ctx'> 		default:</div><div class='ctx'> 			return -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -395,7 +399,7 @@ static int __eql_insert_slave(slave_queue_t *queue, slave_t *slave)</div><div class='ctx'> 		if (duplicate_slave)</div><div class='ctx'> 			eql_kill_one_slave(queue, duplicate_slave);</div><div class='ctx'> </div><div class='del'>-		dev_hold(slave-&gt;dev);</div><div class='add'>+		netdev_hold(slave-&gt;dev, &amp;slave-&gt;dev_tracker, GFP_ATOMIC);</div><div class='ctx'> 		list_add(&amp;slave-&gt;list, &amp;queue-&gt;all_slaves);</div><div class='ctx'> 		queue-&gt;num_slaves++;</div><div class='ctx'> 		slave-&gt;dev-&gt;flags |= IFF_SLAVE;</div><div class='hunk'>@@ -421,14 +425,13 @@ static int eql_enslave(struct net_device *master_dev, slaving_request_t __user *</div><div class='ctx'> 	if ((master_dev-&gt;flags &amp; IFF_UP) == IFF_UP) {</div><div class='ctx'> 		/* slave is not a master &amp; not already a slave: */</div><div class='ctx'> 		if (!eql_is_master(slave_dev) &amp;&amp; !eql_is_slave(slave_dev)) {</div><div class='del'>-			slave_t *s = kmalloc(sizeof(*s), GFP_KERNEL);</div><div class='add'>+			slave_t *s = kzalloc(sizeof(*s), GFP_KERNEL);</div><div class='ctx'> 			equalizer_t *eql = netdev_priv(master_dev);</div><div class='ctx'> 			int ret;</div><div class='ctx'> </div><div class='ctx'> 			if (!s)</div><div class='ctx'> 				return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-			memset(s, 0, sizeof(*s));</div><div class='ctx'> 			s-&gt;dev = slave_dev;</div><div class='ctx'> 			s-&gt;priority = srq.priority;</div><div class='ctx'> 			s-&gt;priority_bps = srq.priority;</div><div class='hunk'>@@ -604,4 +607,5 @@ static void __exit eql_cleanup_module(void)</div><div class='ctx'> </div><div class='ctx'> module_init(eql_init_module);</div><div class='ctx'> module_exit(eql_cleanup_module);</div><div class='add'>+MODULE_DESCRIPTION("Equalizer Load-balancer for serial network interfaces");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/3com/3c509.c b/drivers/net/ethernet/3com/3c509.c<br/>index 4547a1b8b958..fb68339e1511 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/3com/3c509.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/3com/3c509.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/3com/3c509.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/3com/3c509.c</a></div><div class='hunk'>@@ -60,8 +60,6 @@</div><div class='ctx'> */</div><div class='ctx'> </div><div class='ctx'> #define DRV_NAME	"3c509"</div><div class='del'>-#define DRV_VERSION	"1.20"</div><div class='del'>-#define DRV_RELDATE	"04Feb2008"</div><div class='ctx'> </div><div class='ctx'> /* A few values that may be tweaked. */</div><div class='ctx'> </div><div class='hunk'>@@ -88,12 +86,10 @@</div><div class='ctx'> #include &lt;linux/eisa.h&gt;</div><div class='ctx'> #include &lt;linux/bitops.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/irq.h&gt;</div><div class='ctx'> </div><div class='del'>-static char version[] = DRV_NAME ".c:" DRV_VERSION " " DRV_RELDATE " becker@scyld.com\n";</div><div class='del'>-</div><div class='ctx'> #ifdef EL3_DEBUG</div><div class='ctx'> static int el3_debug = EL3_DEBUG;</div><div class='ctx'> #else</div><div class='hunk'>@@ -196,7 +192,7 @@ static struct net_device_stats *el3_get_stats(struct net_device *dev);</div><div class='ctx'> static int el3_rx(struct net_device *dev);</div><div class='ctx'> static int el3_close(struct net_device *dev);</div><div class='ctx'> static void set_multicast_list(struct net_device *dev);</div><div class='del'>-static void el3_tx_timeout (struct net_device *dev);</div><div class='add'>+static void el3_tx_timeout (struct net_device *dev, unsigned int txqueue);</div><div class='ctx'> static void el3_down(struct net_device *dev);</div><div class='ctx'> static void el3_up(struct net_device *dev);</div><div class='ctx'> static const struct ethtool_ops ethtool_ops;</div><div class='hunk'>@@ -274,7 +270,7 @@ static void el3_dev_fill(struct net_device *dev, __be16 *phys_addr, int ioaddr,</div><div class='ctx'> {</div><div class='ctx'> 	struct el3_private *lp = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	memcpy(dev-&gt;dev_addr, phys_addr, ETH_ALEN);</div><div class='add'>+	eth_hw_addr_set(dev, (u8 *)phys_addr);</div><div class='ctx'> 	dev-&gt;base_addr = ioaddr;</div><div class='ctx'> 	dev-&gt;irq = irq;</div><div class='ctx'> 	dev-&gt;if_port = if_port;</div><div class='hunk'>@@ -306,7 +302,6 @@ static int el3_isa_match(struct device *pdev, unsigned int ndev)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	SET_NETDEV_DEV(dev, pdev);</div><div class='del'>-	netdev_boot_setup_check(dev);</div><div class='ctx'> </div><div class='ctx'> 	if (!request_region(ioaddr, EL3_IO_EXTENT, "3c509-isa")) {</div><div class='ctx'> 		free_netdev(dev);</div><div class='hunk'>@@ -339,12 +334,11 @@ static int el3_isa_match(struct device *pdev, unsigned int ndev)</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int el3_isa_remove(struct device *pdev,</div><div class='add'>+static void el3_isa_remove(struct device *pdev,</div><div class='ctx'> 				    unsigned int ndev)</div><div class='ctx'> {</div><div class='ctx'> 	el3_device_remove(pdev);</div><div class='ctx'> 	dev_set_drvdata(pdev, NULL);</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PM</div><div class='hunk'>@@ -392,7 +386,7 @@ static struct isa_driver el3_isa_driver = {</div><div class='ctx'> static int isa_registered;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PNP</div><div class='del'>-static struct pnp_device_id el3_pnp_ids[] = {</div><div class='add'>+static const struct pnp_device_id el3_pnp_ids[] = {</div><div class='ctx'> 	{ .id = "TCM5090" }, /* 3Com Etherlink III (TP) */</div><div class='ctx'> 	{ .id = "TCM5091" }, /* 3Com Etherlink III */</div><div class='ctx'> 	{ .id = "TCM5094" }, /* 3Com Etherlink III (combo) */</div><div class='hunk'>@@ -426,7 +420,6 @@ static int el3_pnp_probe(struct pnp_dev *pdev, const struct pnp_device_id *id)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> 	SET_NETDEV_DEV(dev, &amp;pdev-&gt;dev);</div><div class='del'>-	netdev_boot_setup_check(dev);</div><div class='ctx'> </div><div class='ctx'> 	el3_dev_fill(dev, phys_addr, ioaddr, irq, if_port, EL3_PNP);</div><div class='ctx'> 	pnp_set_drvdata(pdev, dev);</div><div class='hunk'>@@ -474,7 +467,7 @@ static int pnp_registered;</div><div class='ctx'> #endif /* CONFIG_PNP */</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_EISA</div><div class='del'>-static struct eisa_device_id el3_eisa_ids[] = {</div><div class='add'>+static const struct eisa_device_id el3_eisa_ids[] = {</div><div class='ctx'> 		{ "TCM5090" },</div><div class='ctx'> 		{ "TCM5091" },</div><div class='ctx'> 		{ "TCM5092" },</div><div class='hunk'>@@ -508,7 +501,6 @@ static const struct net_device_ops netdev_ops = {</div><div class='ctx'> 	.ndo_get_stats 		= el3_get_stats,</div><div class='ctx'> 	.ndo_set_rx_mode	= set_multicast_list,</div><div class='ctx'> 	.ndo_tx_timeout 	= el3_tx_timeout,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='ctx'> 	.ndo_set_mac_address 	= eth_mac_addr,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> #ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='hunk'>@@ -520,7 +512,9 @@ static int el3_common_init(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct el3_private *lp = netdev_priv(dev);</div><div class='ctx'> 	int err;</div><div class='del'>-	const char *if_names[] = {"10baseT", "AUI", "undefined", "BNC"};</div><div class='add'>+	static const char * const if_names[] = {</div><div class='add'>+		"10baseT", "AUI", "undefined", "BNC"</div><div class='add'>+	};</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_init(&amp;lp-&gt;lock);</div><div class='ctx'> </div><div class='hunk'>@@ -548,8 +542,6 @@ static int el3_common_init(struct net_device *dev)</div><div class='ctx'> 	       dev-&gt;name, dev-&gt;base_addr, if_names[(dev-&gt;if_port &amp; 0x03)],</div><div class='ctx'> 	       dev-&gt;dev_addr, dev-&gt;irq);</div><div class='ctx'> </div><div class='del'>-	if (el3_debug &gt; 0)</div><div class='del'>-		pr_info("%s", version);</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> }</div><div class='hunk'>@@ -562,7 +554,7 @@ static void el3_common_remove (struct net_device *dev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_EISA</div><div class='del'>-static int __init el3_eisa_probe (struct device *device)</div><div class='add'>+static int el3_eisa_probe(struct device *device)</div><div class='ctx'> {</div><div class='ctx'> 	short i;</div><div class='ctx'> 	int ioaddr, irq, if_port;</div><div class='hunk'>@@ -596,7 +588,6 @@ static int __init el3_eisa_probe (struct device *device)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	SET_NETDEV_DEV(dev, device);</div><div class='del'>-	netdev_boot_setup_check(dev);</div><div class='ctx'> </div><div class='ctx'> 	el3_dev_fill(dev, phys_addr, ioaddr, irq, if_port, EL3_EISA);</div><div class='ctx'> 	eisa_set_drvdata (edev, dev);</div><div class='hunk'>@@ -690,7 +681,7 @@ el3_open(struct net_device *dev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='del'>-el3_tx_timeout (struct net_device *dev)</div><div class='add'>+el3_tx_timeout (struct net_device *dev, unsigned int txqueue)</div><div class='ctx'> {</div><div class='ctx'> 	int ioaddr = dev-&gt;base_addr;</div><div class='ctx'> </div><div class='hunk'>@@ -699,7 +690,7 @@ el3_tx_timeout (struct net_device *dev)</div><div class='ctx'> 		dev-&gt;name, inb(ioaddr + TX_STATUS), inw(ioaddr + EL3_STATUS),</div><div class='ctx'> 		inw(ioaddr + TX_FREE));</div><div class='ctx'> 	dev-&gt;stats.tx_errors++;</div><div class='del'>-	dev-&gt;trans_start = jiffies; /* prevent tx timeout */</div><div class='add'>+	netif_trans_update(dev); /* prevent tx timeout */</div><div class='ctx'> 	/* Issue TX_RESET and TX_START commands. */</div><div class='ctx'> 	outw(TxReset, ioaddr + EL3_CMD);</div><div class='ctx'> 	outw(TxEnable, ioaddr + EL3_CMD);</div><div class='hunk'>@@ -1040,68 +1031,69 @@ el3_link_ok(struct net_device *dev)</div><div class='ctx'> 	return tmp &amp; (1&lt;&lt;11);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int</div><div class='del'>-el3_netdev_get_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)</div><div class='add'>+static void</div><div class='add'>+el3_netdev_get_ecmd(struct net_device *dev, struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	u16 tmp;</div><div class='ctx'> 	int ioaddr = dev-&gt;base_addr;</div><div class='add'>+	u32 supported;</div><div class='ctx'> </div><div class='ctx'> 	EL3WINDOW(0);</div><div class='ctx'> 	/* obtain current transceiver via WN4_MEDIA? */</div><div class='ctx'> 	tmp = inw(ioaddr + WN0_ADDR_CONF);</div><div class='del'>-	ecmd-&gt;transceiver = XCVR_INTERNAL;</div><div class='ctx'> 	switch (tmp &gt;&gt; 14) {</div><div class='ctx'> 	case 0:</div><div class='del'>-		ecmd-&gt;port = PORT_TP;</div><div class='add'>+		cmd-&gt;base.port = PORT_TP;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 1:</div><div class='del'>-		ecmd-&gt;port = PORT_AUI;</div><div class='del'>-		ecmd-&gt;transceiver = XCVR_EXTERNAL;</div><div class='add'>+		cmd-&gt;base.port = PORT_AUI;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case 3:</div><div class='del'>-		ecmd-&gt;port = PORT_BNC;</div><div class='add'>+		cmd-&gt;base.port = PORT_BNC;</div><div class='add'>+		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ecmd-&gt;duplex = DUPLEX_HALF;</div><div class='del'>-	ecmd-&gt;supported = 0;</div><div class='add'>+	cmd-&gt;base.duplex = DUPLEX_HALF;</div><div class='add'>+	supported = 0;</div><div class='ctx'> 	tmp = inw(ioaddr + WN0_CONF_CTRL);</div><div class='ctx'> 	if (tmp &amp; (1&lt;&lt;13))</div><div class='del'>-		ecmd-&gt;supported |= SUPPORTED_AUI;</div><div class='add'>+		supported |= SUPPORTED_AUI;</div><div class='ctx'> 	if (tmp &amp; (1&lt;&lt;12))</div><div class='del'>-		ecmd-&gt;supported |= SUPPORTED_BNC;</div><div class='add'>+		supported |= SUPPORTED_BNC;</div><div class='ctx'> 	if (tmp &amp; (1&lt;&lt;9)) {</div><div class='del'>-		ecmd-&gt;supported |= SUPPORTED_TP | SUPPORTED_10baseT_Half |</div><div class='add'>+		supported |= SUPPORTED_TP | SUPPORTED_10baseT_Half |</div><div class='ctx'> 				SUPPORTED_10baseT_Full;	/* hmm... */</div><div class='ctx'> 		EL3WINDOW(4);</div><div class='ctx'> 		tmp = inw(ioaddr + WN4_NETDIAG);</div><div class='ctx'> 		if (tmp &amp; FD_ENABLE)</div><div class='del'>-			ecmd-&gt;duplex = DUPLEX_FULL;</div><div class='add'>+			cmd-&gt;base.duplex = DUPLEX_FULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ethtool_cmd_speed_set(ecmd, SPEED_10);</div><div class='add'>+	ethtool_convert_legacy_u32_to_link_mode(cmd-&gt;link_modes.supported,</div><div class='add'>+						supported);</div><div class='add'>+	cmd-&gt;base.speed = SPEED_10;</div><div class='ctx'> 	EL3WINDOW(1);</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='del'>-el3_netdev_set_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)</div><div class='add'>+el3_netdev_set_ecmd(struct net_device *dev,</div><div class='add'>+		    const struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	u16 tmp;</div><div class='ctx'> 	int ioaddr = dev-&gt;base_addr;</div><div class='ctx'> </div><div class='del'>-	if (ecmd-&gt;speed != SPEED_10)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	if ((ecmd-&gt;duplex != DUPLEX_HALF) &amp;&amp; (ecmd-&gt;duplex != DUPLEX_FULL))</div><div class='add'>+	if (cmd-&gt;base.speed != SPEED_10)</div><div class='ctx'> 		return -EINVAL;</div><div class='del'>-	if ((ecmd-&gt;transceiver != XCVR_INTERNAL) &amp;&amp; (ecmd-&gt;transceiver != XCVR_EXTERNAL))</div><div class='add'>+	if ((cmd-&gt;base.duplex != DUPLEX_HALF) &amp;&amp;</div><div class='add'>+	    (cmd-&gt;base.duplex != DUPLEX_FULL))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	/* change XCVR type */</div><div class='ctx'> 	EL3WINDOW(0);</div><div class='ctx'> 	tmp = inw(ioaddr + WN0_ADDR_CONF);</div><div class='del'>-	switch (ecmd-&gt;port) {</div><div class='add'>+	switch (cmd-&gt;base.port) {</div><div class='ctx'> 	case PORT_TP:</div><div class='ctx'> 		tmp &amp;= ~(3&lt;&lt;14);</div><div class='ctx'> 		dev-&gt;if_port = 0;</div><div class='hunk'>@@ -1131,7 +1123,7 @@ el3_netdev_set_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)</div><div class='ctx'> </div><div class='ctx'> 	EL3WINDOW(4);</div><div class='ctx'> 	tmp = inw(ioaddr + WN4_NETDIAG);</div><div class='del'>-	if (ecmd-&gt;duplex == DUPLEX_FULL)</div><div class='add'>+	if (cmd-&gt;base.duplex == DUPLEX_FULL)</div><div class='ctx'> 		tmp |= FD_ENABLE;</div><div class='ctx'> 	else</div><div class='ctx'> 		tmp &amp;= ~FD_ENABLE;</div><div class='hunk'>@@ -1143,28 +1135,28 @@ el3_netdev_set_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)</div><div class='ctx'> </div><div class='ctx'> static void el3_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)</div><div class='ctx'> {</div><div class='del'>-	strlcpy(info-&gt;driver, DRV_NAME, sizeof(info-&gt;driver));</div><div class='del'>-	strlcpy(info-&gt;version, DRV_VERSION, sizeof(info-&gt;version));</div><div class='add'>+	strscpy(info-&gt;driver, DRV_NAME, sizeof(info-&gt;driver));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int el3_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)</div><div class='add'>+static int el3_get_link_ksettings(struct net_device *dev,</div><div class='add'>+				  struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct el3_private *lp = netdev_priv(dev);</div><div class='del'>-	int ret;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irq(&amp;lp-&gt;lock);</div><div class='del'>-	ret = el3_netdev_get_ecmd(dev, ecmd);</div><div class='add'>+	el3_netdev_get_ecmd(dev, cmd);</div><div class='ctx'> 	spin_unlock_irq(&amp;lp-&gt;lock);</div><div class='del'>-	return ret;</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int el3_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)</div><div class='add'>+static int el3_set_link_ksettings(struct net_device *dev,</div><div class='add'>+				  const struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct el3_private *lp = netdev_priv(dev);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irq(&amp;lp-&gt;lock);</div><div class='del'>-	ret = el3_netdev_set_ecmd(dev, ecmd);</div><div class='add'>+	ret = el3_netdev_set_ecmd(dev, cmd);</div><div class='ctx'> 	spin_unlock_irq(&amp;lp-&gt;lock);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -1192,11 +1184,11 @@ static void el3_set_msglevel(struct net_device *dev, u32 v)</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops ethtool_ops = {</div><div class='ctx'> 	.get_drvinfo = el3_get_drvinfo,</div><div class='del'>-	.get_settings = el3_get_settings,</div><div class='del'>-	.set_settings = el3_set_settings,</div><div class='ctx'> 	.get_link = el3_get_link,</div><div class='ctx'> 	.get_msglevel = el3_get_msglevel,</div><div class='ctx'> 	.set_msglevel = el3_set_msglevel,</div><div class='add'>+	.get_link_ksettings = el3_get_link_ksettings,</div><div class='add'>+	.set_link_ksettings = el3_set_link_ksettings,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='hunk'>@@ -1266,12 +1258,14 @@ el3_up(struct net_device *dev)</div><div class='ctx'> 					pr_cont("Forcing 3c5x9b full-duplex mode");</div><div class='ctx'> 					break;</div><div class='ctx'> 				}</div><div class='add'>+				fallthrough;</div><div class='ctx'> 			case 8:</div><div class='ctx'> 				/* set full-duplex mode based on eeprom config setting */</div><div class='ctx'> 				if ((sw_info &amp; 0x000f) &amp;&amp; (sw_info &amp; 0x8000)) {</div><div class='ctx'> 					pr_cont("Setting 3c5x9b full-duplex mode (from EEPROM configuration bit)");</div><div class='ctx'> 					break;</div><div class='ctx'> 				}</div><div class='add'>+				fallthrough;</div><div class='ctx'> 			default:</div><div class='ctx'> 				/* xcvr=(0 || 4) OR user has an old 3c5x9 non "B" model */</div><div class='ctx'> 				pr_cont("Setting 3c5x9/3c5x9B half-duplex mode");</div><div class='hunk'>@@ -1369,7 +1363,7 @@ el3_resume(struct device *pdev)</div><div class='ctx'> #endif /* CONFIG_PM */</div><div class='ctx'> </div><div class='ctx'> module_param(debug,int, 0);</div><div class='del'>-module_param_array(irq, int, NULL, 0);</div><div class='add'>+module_param_hw_array(irq, int, irq, NULL, 0);</div><div class='ctx'> module_param(max_interrupt_work, int, 0);</div><div class='ctx'> MODULE_PARM_DESC(debug, "debug level (0-6)");</div><div class='ctx'> MODULE_PARM_DESC(irq, "IRQ number(s) (assigned)");</div><div class='head'>diff --git a/drivers/net/ethernet/3com/3c515.c b/drivers/net/ethernet/3com/3c515.c<br/>index 942fb0d5aace..2227c83a4862 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/3com/3c515.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/3com/3c515.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/3com/3c515.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/3com/3c515.c</a></div><div class='hunk'>@@ -23,11 +23,6 @@</div><div class='ctx'> */</div><div class='ctx'> </div><div class='ctx'> #define DRV_NAME		"3c515"</div><div class='del'>-#define DRV_VERSION		"0.99t-ac"</div><div class='del'>-#define DRV_RELDATE		"28-Oct-2002"</div><div class='del'>-</div><div class='del'>-static char *version =</div><div class='del'>-DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " becker@scyld.com and others\n";</div><div class='ctx'> </div><div class='ctx'> #define CORKSCREW 1</div><div class='ctx'> </div><div class='hunk'>@@ -36,9 +31,6 @@ DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " becker@scyld.com and others\n";</div><div class='ctx'>    Setting to &gt; 1512 effectively disables this feature. */</div><div class='ctx'> static int rx_copybreak = 200;</div><div class='ctx'> </div><div class='del'>-/* Allow setting MTU to a larger size, bypassing the normal ethernet setup. */</div><div class='del'>-static const int mtu = 1500;</div><div class='del'>-</div><div class='ctx'> /* Maximum events (Rx packets, etc.) to handle at each interrupt. */</div><div class='ctx'> static int max_interrupt_work = 20;</div><div class='ctx'> </div><div class='hunk'>@@ -71,8 +63,10 @@ static int max_interrupt_work = 20;</div><div class='ctx'> #include &lt;linux/timer.h&gt;</div><div class='ctx'> #include &lt;linux/ethtool.h&gt;</div><div class='ctx'> #include &lt;linux/bitops.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;net/Space.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/dma.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -84,7 +78,6 @@ static int max_interrupt_work = 20;</div><div class='ctx'> MODULE_AUTHOR("Donald Becker &lt;becker@scyld.com&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("3Com 3c515 Corkscrew driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_VERSION(DRV_VERSION);</div><div class='ctx'> </div><div class='ctx'> /* "Knobs" for adjusting internal parameters. */</div><div class='ctx'> /* Put out somewhat more debugging messages. (0 - no msg, 1 minimal msgs). */</div><div class='hunk'>@@ -367,11 +360,11 @@ static struct net_device *corkscrew_scan(int unit);</div><div class='ctx'> static int corkscrew_setup(struct net_device *dev, int ioaddr,</div><div class='ctx'> 			    struct pnp_dev *idev, int card_number);</div><div class='ctx'> static int corkscrew_open(struct net_device *dev);</div><div class='del'>-static void corkscrew_timer(unsigned long arg);</div><div class='add'>+static void corkscrew_timer(struct timer_list *t);</div><div class='ctx'> static netdev_tx_t corkscrew_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 					struct net_device *dev);</div><div class='ctx'> static int corkscrew_rx(struct net_device *dev);</div><div class='del'>-static void corkscrew_timeout(struct net_device *dev);</div><div class='add'>+static void corkscrew_timeout(struct net_device *dev, unsigned int txqueue);</div><div class='ctx'> static int boomerang_rx(struct net_device *dev);</div><div class='ctx'> static irqreturn_t corkscrew_interrupt(int irq, void *dev_id);</div><div class='ctx'> static int corkscrew_close(struct net_device *dev);</div><div class='hunk'>@@ -413,32 +406,25 @@ MODULE_PARM_DESC(max_interrupt_work, "3c515 maximum events handled per interrupt</div><div class='ctx'> /* we will need locking (and refcounting) if we ever use it for more */</div><div class='ctx'> static LIST_HEAD(root_corkscrew_dev);</div><div class='ctx'> </div><div class='del'>-int init_module(void)</div><div class='add'>+static int corkscrew_init_module(void)</div><div class='ctx'> {</div><div class='ctx'> 	int found = 0;</div><div class='ctx'> 	if (debug &gt;= 0)</div><div class='ctx'> 		corkscrew_debug = debug;</div><div class='del'>-	if (corkscrew_debug)</div><div class='del'>-		pr_debug("%s", version);</div><div class='ctx'> 	while (corkscrew_scan(-1))</div><div class='ctx'> 		found++;</div><div class='ctx'> 	return found ? 0 : -ENODEV;</div><div class='ctx'> }</div><div class='add'>+module_init(corkscrew_init_module);</div><div class='ctx'> </div><div class='ctx'> #else</div><div class='ctx'> struct net_device *tc515_probe(int unit)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = corkscrew_scan(unit);</div><div class='del'>-	static int printed;</div><div class='ctx'> </div><div class='ctx'> 	if (!dev)</div><div class='ctx'> 		return ERR_PTR(-ENODEV);</div><div class='ctx'> </div><div class='del'>-	if (corkscrew_debug &gt; 0 &amp;&amp; !printed) {</div><div class='del'>-		printed = 1;</div><div class='del'>-		pr_debug("%s", version);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	return dev;</div><div class='ctx'> }</div><div class='ctx'> #endif				/* not MODULE */</div><div class='hunk'>@@ -570,7 +556,6 @@ static const struct net_device_ops netdev_ops = {</div><div class='ctx'> 	.ndo_tx_timeout		= corkscrew_timeout,</div><div class='ctx'> 	.ndo_get_stats		= corkscrew_get_stats,</div><div class='ctx'> 	.ndo_set_rx_mode	= set_rx_mode,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='ctx'> 	.ndo_set_mac_address 	= eth_mac_addr,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> };</div><div class='hunk'>@@ -581,6 +566,7 @@ static int corkscrew_setup(struct net_device *dev, int ioaddr,</div><div class='ctx'> {</div><div class='ctx'> 	struct corkscrew_private *vp = netdev_priv(dev);</div><div class='ctx'> 	unsigned int eeprom[0x40], checksum = 0;	/* EEPROM contents */</div><div class='add'>+	__be16 addr[ETH_ALEN / 2];</div><div class='ctx'> 	int i;</div><div class='ctx'> 	int irq;</div><div class='ctx'> </div><div class='hunk'>@@ -628,10 +614,11 @@ static int corkscrew_setup(struct net_device *dev, int ioaddr,</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_init(&amp;vp-&gt;lock);</div><div class='ctx'> </div><div class='add'>+	timer_setup(&amp;vp-&gt;timer, corkscrew_timer, 0);</div><div class='add'>+</div><div class='ctx'> 	/* Read the station address from the EEPROM. */</div><div class='ctx'> 	EL3WINDOW(0);</div><div class='ctx'> 	for (i = 0; i &lt; 0x18; i++) {</div><div class='del'>-		__be16 *phys_addr = (__be16 *) dev-&gt;dev_addr;</div><div class='ctx'> 		int timer;</div><div class='ctx'> 		outw(EEPROM_Read + i, ioaddr + Wn0EepromCmd);</div><div class='ctx'> 		/* Pause for at least 162 us. for the read to take place. */</div><div class='hunk'>@@ -643,8 +630,9 @@ static int corkscrew_setup(struct net_device *dev, int ioaddr,</div><div class='ctx'> 		eeprom[i] = inw(ioaddr + Wn0EepromData);</div><div class='ctx'> 		checksum ^= eeprom[i];</div><div class='ctx'> 		if (i &lt; 3)</div><div class='del'>-			phys_addr[i] = htons(eeprom[i]);</div><div class='add'>+			addr[i] = htons(eeprom[i]);</div><div class='ctx'> 	}</div><div class='add'>+	eth_hw_addr_set(dev, (u8 *)addr);</div><div class='ctx'> 	checksum = (checksum ^ (checksum &gt;&gt; 8)) &amp; 0xff;</div><div class='ctx'> 	if (checksum != 0x00)</div><div class='ctx'> 		pr_cont(" ***INVALID CHECKSUM %4.4x*** ", checksum);</div><div class='hunk'>@@ -708,6 +696,7 @@ static int corkscrew_open(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	int ioaddr = dev-&gt;base_addr;</div><div class='ctx'> 	struct corkscrew_private *vp = netdev_priv(dev);</div><div class='add'>+	bool armtimer = false;</div><div class='ctx'> 	__u32 config;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='hunk'>@@ -732,12 +721,7 @@ static int corkscrew_open(struct net_device *dev)</div><div class='ctx'> 		if (corkscrew_debug &gt; 1)</div><div class='ctx'> 			pr_debug("%s: Initial media type %s.\n",</div><div class='ctx'> 			       dev-&gt;name, media_tbl[dev-&gt;if_port].name);</div><div class='del'>-</div><div class='del'>-		init_timer(&amp;vp-&gt;timer);</div><div class='del'>-		vp-&gt;timer.expires = jiffies + media_tbl[dev-&gt;if_port].wait;</div><div class='del'>-		vp-&gt;timer.data = (unsigned long) dev;</div><div class='del'>-		vp-&gt;timer.function = corkscrew_timer;	/* timer handler */</div><div class='del'>-		add_timer(&amp;vp-&gt;timer);</div><div class='add'>+		armtimer = true;</div><div class='ctx'> 	} else</div><div class='ctx'> 		dev-&gt;if_port = vp-&gt;default_media;</div><div class='ctx'> </div><div class='hunk'>@@ -777,6 +761,9 @@ static int corkscrew_open(struct net_device *dev)</div><div class='ctx'> 		return -EAGAIN;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (armtimer)</div><div class='add'>+		mod_timer(&amp;vp-&gt;timer, jiffies + media_tbl[dev-&gt;if_port].wait);</div><div class='add'>+</div><div class='ctx'> 	if (corkscrew_debug &gt; 1) {</div><div class='ctx'> 		EL3WINDOW(4);</div><div class='ctx'> 		pr_debug("%s: corkscrew_open() irq %d media status %4.4x.\n",</div><div class='hunk'>@@ -869,11 +856,11 @@ static int corkscrew_open(struct net_device *dev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void corkscrew_timer(unsigned long data)</div><div class='add'>+static void corkscrew_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='ctx'> #ifdef AUTOMEDIA</div><div class='del'>-	struct net_device *dev = (struct net_device *) data;</div><div class='del'>-	struct corkscrew_private *vp = netdev_priv(dev);</div><div class='add'>+	struct corkscrew_private *vp = timer_container_of(vp, t, timer);</div><div class='add'>+	struct net_device *dev = vp-&gt;our_dev;</div><div class='ctx'> 	int ioaddr = dev-&gt;base_addr;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int ok = 0;</div><div class='hunk'>@@ -961,7 +948,7 @@ static void corkscrew_timer(unsigned long data)</div><div class='ctx'> #endif				/* AUTOMEDIA */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void corkscrew_timeout(struct net_device *dev)</div><div class='add'>+static void corkscrew_timeout(struct net_device *dev, unsigned int txqueue)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> 	struct corkscrew_private *vp = netdev_priv(dev);</div><div class='hunk'>@@ -992,7 +979,7 @@ static void corkscrew_timeout(struct net_device *dev)</div><div class='ctx'> 		if (!(inw(ioaddr + EL3_STATUS) &amp; CmdInProgress))</div><div class='ctx'> 			break;</div><div class='ctx'> 	outw(TxEnable, ioaddr + EL3_CMD);</div><div class='del'>-	dev-&gt;trans_start = jiffies; /* prevent tx timeout */</div><div class='add'>+	netif_trans_update(dev); /* prevent tx timeout */</div><div class='ctx'> 	dev-&gt;stats.tx_errors++;</div><div class='ctx'> 	dev-&gt;stats.tx_dropped++;</div><div class='ctx'> 	netif_wake_queue(dev);</div><div class='hunk'>@@ -1063,7 +1050,7 @@ static netdev_tx_t corkscrew_start_xmit(struct sk_buff *skb,</div><div class='ctx'> #ifdef VORTEX_BUS_MASTER</div><div class='ctx'> 	if (vp-&gt;bus_master) {</div><div class='ctx'> 		/* Set the bus-master controller to transfer the packet. */</div><div class='del'>-		outl((int) (skb-&gt;data), ioaddr + Wn7_MasterAddr);</div><div class='add'>+		outl(isa_virt_to_bus(skb-&gt;data), ioaddr + Wn7_MasterAddr);</div><div class='ctx'> 		outw((skb-&gt;len + 3) &amp; ~3, ioaddr + Wn7_MasterLen);</div><div class='ctx'> 		vp-&gt;tx_skb = skb;</div><div class='ctx'> 		outw(StartDMADown, ioaddr + EL3_CMD);</div><div class='hunk'>@@ -1177,7 +1164,7 @@ static irqreturn_t corkscrew_interrupt(int irq, void *dev_id)</div><div class='ctx'> 				if (inl(ioaddr + DownListPtr) == isa_virt_to_bus(&amp;lp-&gt;tx_ring[entry]))</div><div class='ctx'> 					break;	/* It still hasn't been processed. */</div><div class='ctx'> 				if (lp-&gt;tx_skbuff[entry]) {</div><div class='del'>-					dev_kfree_skb_irq(lp-&gt;tx_skbuff[entry]);</div><div class='add'>+					dev_consume_skb_irq(lp-&gt;tx_skbuff[entry]);</div><div class='ctx'> 					lp-&gt;tx_skbuff[entry] = NULL;</div><div class='ctx'> 				}</div><div class='ctx'> 				dirty_tx++;</div><div class='hunk'>@@ -1192,7 +1179,7 @@ static irqreturn_t corkscrew_interrupt(int irq, void *dev_id)</div><div class='ctx'> #ifdef VORTEX_BUS_MASTER</div><div class='ctx'> 		if (status &amp; DMADone) {</div><div class='ctx'> 			outw(0x1000, ioaddr + Wn7_MasterStatus);	/* Ack the event. */</div><div class='del'>-			dev_kfree_skb_irq(lp-&gt;tx_skb);	/* Release the transferred buffer */</div><div class='add'>+			dev_consume_skb_irq(lp-&gt;tx_skb);	/* Release the transferred buffer */</div><div class='ctx'> 			netif_wake_queue(dev);</div><div class='ctx'> 		}</div><div class='ctx'> #endif</div><div class='hunk'>@@ -1370,9 +1357,9 @@ static int boomerang_rx(struct net_device *dev)</div><div class='ctx'> 			    (skb = netdev_alloc_skb(dev, pkt_len + 4)) != NULL) {</div><div class='ctx'> 				skb_reserve(skb, 2);	/* Align IP on 16 byte boundaries */</div><div class='ctx'> 				/* 'skb_put()' points to the start of sk_buff data area. */</div><div class='del'>-				memcpy(skb_put(skb, pkt_len),</div><div class='del'>-				       isa_bus_to_virt(vp-&gt;rx_ring[entry].</div><div class='del'>-						   addr), pkt_len);</div><div class='add'>+				skb_put_data(skb,</div><div class='add'>+					     isa_bus_to_virt(vp-&gt;rx_ring[entry].addr),</div><div class='add'>+					     pkt_len);</div><div class='ctx'> 				rx_copy++;</div><div class='ctx'> 			} else {</div><div class='ctx'> 				void *temp;</div><div class='hunk'>@@ -1427,7 +1414,7 @@ static int corkscrew_close(struct net_device *dev)</div><div class='ctx'> 			dev-&gt;name, rx_nocopy, rx_copy, queued_packet);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	del_timer(&amp;vp-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;vp-&gt;timer);</div><div class='ctx'> </div><div class='ctx'> 	/* Turn off statistics ASAP.  We update lp-&gt;stats below. */</div><div class='ctx'> 	outw(StatsDisable, ioaddr + EL3_CMD);</div><div class='hunk'>@@ -1521,7 +1508,7 @@ static void update_stats(int ioaddr, struct net_device *dev)</div><div class='ctx'> static void set_rx_mode(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	int ioaddr = dev-&gt;base_addr;</div><div class='del'>-	short new_mode;</div><div class='add'>+	unsigned short new_mode;</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;flags &amp; IFF_PROMISC) {</div><div class='ctx'> 		if (corkscrew_debug &gt; 3)</div><div class='hunk'>@@ -1539,8 +1526,7 @@ static void set_rx_mode(struct net_device *dev)</div><div class='ctx'> static void netdev_get_drvinfo(struct net_device *dev,</div><div class='ctx'> 			       struct ethtool_drvinfo *info)</div><div class='ctx'> {</div><div class='del'>-	strlcpy(info-&gt;driver, DRV_NAME, sizeof(info-&gt;driver));</div><div class='del'>-	strlcpy(info-&gt;version, DRV_VERSION, sizeof(info-&gt;version));</div><div class='add'>+	strscpy(info-&gt;driver, DRV_NAME, sizeof(info-&gt;driver));</div><div class='ctx'> 	snprintf(info-&gt;bus_info, sizeof(info-&gt;bus_info), "ISA 0x%lx",</div><div class='ctx'> 		 dev-&gt;base_addr);</div><div class='ctx'> }</div><div class='hunk'>@@ -1561,9 +1547,8 @@ static const struct ethtool_ops netdev_ethtool_ops = {</div><div class='ctx'> 	.set_msglevel		= netdev_set_msglevel,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> #ifdef MODULE</div><div class='del'>-void cleanup_module(void)</div><div class='add'>+static void __exit corkscrew_exit_module(void)</div><div class='ctx'> {</div><div class='ctx'> 	while (!list_empty(&amp;root_corkscrew_dev)) {</div><div class='ctx'> 		struct net_device *dev;</div><div class='hunk'>@@ -1577,4 +1562,5 @@ void cleanup_module(void)</div><div class='ctx'> 		free_netdev(dev);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+module_exit(corkscrew_exit_module);</div><div class='ctx'> #endif				/* MODULE */</div><div class='head'>diff --git a/drivers/net/ethernet/3com/3c574_cs.c b/drivers/net/ethernet/3com/3c574_cs.c<br/>index b9948f00c5e9..1f2070497a75 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/3com/3c574_cs.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/3com/3c574_cs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/3com/3c574_cs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/3com/3c574_cs.c</a></div><div class='hunk'>@@ -92,7 +92,7 @@ earlier 3Com products.</div><div class='ctx'> #include &lt;pcmcia/ciscode.h&gt;</div><div class='ctx'> #include &lt;pcmcia/ds.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*====================================================================*/</div><div class='hunk'>@@ -225,7 +225,7 @@ static unsigned short read_eeprom(unsigned int ioaddr, int index);</div><div class='ctx'> static void tc574_wait_for_completion(struct net_device *dev, int cmd);</div><div class='ctx'> </div><div class='ctx'> static void tc574_reset(struct net_device *dev);</div><div class='del'>-static void media_check(unsigned long arg);</div><div class='add'>+static void media_check(struct timer_list *t);</div><div class='ctx'> static int el3_open(struct net_device *dev);</div><div class='ctx'> static netdev_tx_t el3_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 					struct net_device *dev);</div><div class='hunk'>@@ -234,7 +234,7 @@ static void update_stats(struct net_device *dev);</div><div class='ctx'> static struct net_device_stats *el3_get_stats(struct net_device *dev);</div><div class='ctx'> static int el3_rx(struct net_device *dev, int worklimit);</div><div class='ctx'> static int el3_close(struct net_device *dev);</div><div class='del'>-static void el3_tx_timeout(struct net_device *dev);</div><div class='add'>+static void el3_tx_timeout(struct net_device *dev, unsigned int txqueue);</div><div class='ctx'> static int el3_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);</div><div class='ctx'> static void set_rx_mode(struct net_device *dev);</div><div class='ctx'> static void set_multicast_list(struct net_device *dev);</div><div class='hunk'>@@ -252,9 +252,8 @@ static const struct net_device_ops el3_netdev_ops = {</div><div class='ctx'> 	.ndo_start_xmit		= el3_start_xmit,</div><div class='ctx'> 	.ndo_tx_timeout 	= el3_tx_timeout,</div><div class='ctx'> 	.ndo_get_stats		= el3_get_stats,</div><div class='del'>-	.ndo_do_ioctl		= el3_ioctl,</div><div class='add'>+	.ndo_eth_ioctl		= el3_ioctl,</div><div class='ctx'> 	.ndo_set_rx_mode	= set_multicast_list,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='ctx'> 	.ndo_set_mac_address 	= eth_mac_addr,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> };</div><div class='hunk'>@@ -306,15 +305,13 @@ static int tc574_config(struct pcmcia_device *link)</div><div class='ctx'> 	struct net_device *dev = link-&gt;priv;</div><div class='ctx'> 	struct el3_private *lp = netdev_priv(dev);</div><div class='ctx'> 	int ret, i, j;</div><div class='add'>+	__be16 addr[ETH_ALEN / 2];</div><div class='ctx'> 	unsigned int ioaddr;</div><div class='del'>-	__be16 *phys_addr;</div><div class='ctx'> 	char *cardname;</div><div class='ctx'> 	__u32 config;</div><div class='ctx'> 	u8 *buf;</div><div class='ctx'> 	size_t len;</div><div class='ctx'> </div><div class='del'>-	phys_addr = (__be16 *)dev-&gt;dev_addr;</div><div class='del'>-</div><div class='ctx'> 	dev_dbg(&amp;link-&gt;dev, "3c574_config()\n");</div><div class='ctx'> </div><div class='ctx'> 	link-&gt;io_lines = 16;</div><div class='hunk'>@@ -348,19 +345,20 @@ static int tc574_config(struct pcmcia_device *link)</div><div class='ctx'> 	len = pcmcia_get_tuple(link, 0x88, &amp;buf);</div><div class='ctx'> 	if (buf &amp;&amp; len &gt;= 6) {</div><div class='ctx'> 		for (i = 0; i &lt; 3; i++)</div><div class='del'>-			phys_addr[i] = htons(le16_to_cpu(buf[i * 2]));</div><div class='add'>+			addr[i] = htons(le16_to_cpu(buf[i * 2]));</div><div class='ctx'> 		kfree(buf);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		kfree(buf); /* 0 &lt; len &lt; 6 */</div><div class='ctx'> 		EL3WINDOW(0);</div><div class='ctx'> 		for (i = 0; i &lt; 3; i++)</div><div class='del'>-			phys_addr[i] = htons(read_eeprom(ioaddr, i + 10));</div><div class='del'>-		if (phys_addr[0] == htons(0x6060)) {</div><div class='add'>+			addr[i] = htons(read_eeprom(ioaddr, i + 10));</div><div class='add'>+		if (addr[0] == htons(0x6060)) {</div><div class='ctx'> 			pr_notice("IO port conflict at 0x%03lx-0x%03lx\n",</div><div class='ctx'> 				  dev-&gt;base_addr, dev-&gt;base_addr+15);</div><div class='ctx'> 			goto failed;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+	eth_hw_addr_set(dev, (u8 *)addr);</div><div class='ctx'> 	if (link-&gt;prod_id[1])</div><div class='ctx'> 		cardname = link-&gt;prod_id[1];</div><div class='ctx'> 	else</div><div class='hunk'>@@ -378,7 +376,7 @@ static int tc574_config(struct pcmcia_device *link)</div><div class='ctx'> 		lp-&gt;autoselect = config &amp; Autoselect ? 1 : 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	init_timer(&amp;lp-&gt;media);</div><div class='add'>+	timer_setup(&amp;lp-&gt;media, media_check, 0);</div><div class='ctx'> </div><div class='ctx'> 	{</div><div class='ctx'> 		int phy;</div><div class='hunk'>@@ -682,8 +680,6 @@ static int el3_open(struct net_device *dev)</div><div class='ctx'> 	netif_start_queue(dev);</div><div class='ctx'> 	</div><div class='ctx'> 	tc574_reset(dev);</div><div class='del'>-	lp-&gt;media.function = media_check;</div><div class='del'>-	lp-&gt;media.data = (unsigned long) dev;</div><div class='ctx'> 	lp-&gt;media.expires = jiffies + HZ;</div><div class='ctx'> 	add_timer(&amp;lp-&gt;media);</div><div class='ctx'> 	</div><div class='hunk'>@@ -693,14 +689,14 @@ static int el3_open(struct net_device *dev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void el3_tx_timeout(struct net_device *dev)</div><div class='add'>+static void el3_tx_timeout(struct net_device *dev, unsigned int txqueue)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int ioaddr = dev-&gt;base_addr;</div><div class='ctx'> 	</div><div class='ctx'> 	netdev_notice(dev, "Transmit timed out!\n");</div><div class='ctx'> 	dump_status(dev);</div><div class='ctx'> 	dev-&gt;stats.tx_errors++;</div><div class='del'>-	dev-&gt;trans_start = jiffies; /* prevent tx timeout */</div><div class='add'>+	netif_trans_update(dev); /* prevent tx timeout */</div><div class='ctx'> 	/* Issue TX_RESET and TX_START commands. */</div><div class='ctx'> 	tc574_wait_for_completion(dev, TxReset);</div><div class='ctx'> 	outw(TxEnable, ioaddr + EL3_CMD);</div><div class='hunk'>@@ -860,10 +856,10 @@ static irqreturn_t el3_interrupt(int irq, void *dev_id)</div><div class='ctx'> 	(and as a last resort, poll the NIC for events), and to monitor</div><div class='ctx'> 	the MII, reporting changes in cable status.</div><div class='ctx'> */</div><div class='del'>-static void media_check(unsigned long arg)</div><div class='add'>+static void media_check(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *dev = (struct net_device *) arg;</div><div class='del'>-	struct el3_private *lp = netdev_priv(dev);</div><div class='add'>+	struct el3_private *lp = timer_container_of(lp, t, media);</div><div class='add'>+	struct net_device *dev = lp-&gt;p_dev-&gt;priv;</div><div class='ctx'> 	unsigned int ioaddr = dev-&gt;base_addr;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	unsigned short /* cable, */ media, partner;</div><div class='hunk'>@@ -954,7 +950,7 @@ static struct net_device_stats *el3_get_stats(struct net_device *dev)</div><div class='ctx'> static void update_stats(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int ioaddr = dev-&gt;base_addr;</div><div class='del'>-	u8 rx, tx, up;</div><div class='add'>+	u8 up;</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("%s: updating the statistics.\n", dev-&gt;name);</div><div class='ctx'> </div><div class='hunk'>@@ -975,8 +971,8 @@ static void update_stats(struct net_device *dev)</div><div class='ctx'> 	dev-&gt;stats.tx_packets			+= (up&amp;0x30) &lt;&lt; 4;</div><div class='ctx'> 	/* Rx packets   */			   inb(ioaddr + 7);</div><div class='ctx'> 	/* Tx deferrals */			   inb(ioaddr + 8);</div><div class='del'>-	rx		 			 = inw(ioaddr + 10);</div><div class='del'>-	tx					 = inw(ioaddr + 12);</div><div class='add'>+	/* rx */				   inw(ioaddr + 10);</div><div class='add'>+	/* tx */				   inw(ioaddr + 12);</div><div class='ctx'> </div><div class='ctx'> 	EL3WINDOW(4);</div><div class='ctx'> 	/* BadSSD */				   inb(ioaddr + 12);</div><div class='hunk'>@@ -1049,6 +1045,7 @@ static int el3_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)</div><div class='ctx'> 	switch(cmd) {</div><div class='ctx'> 	case SIOCGMIIPHY:		/* Get the address of the PHY in use. */</div><div class='ctx'> 		data-&gt;phy_id = phy;</div><div class='add'>+		fallthrough;</div><div class='ctx'> 	case SIOCGMIIREG:		/* Read the specified MII register. */</div><div class='ctx'> 		{</div><div class='ctx'> 			int saved_window;</div><div class='hunk'>@@ -1143,7 +1140,7 @@ static int el3_close(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	link-&gt;open--;</div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='del'>-	del_timer_sync(&amp;lp-&gt;media);</div><div class='add'>+	timer_delete_sync(&amp;lp-&gt;media);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/3com/3c589_cs.c b/drivers/net/ethernet/3com/3c589_cs.c<br/>index c5a320507556..ea49be43b8c3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/3com/3c589_cs.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/3com/3c589_cs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/3com/3c589_cs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/3com/3c589_cs.c</a></div><div class='hunk'>@@ -23,7 +23,6 @@</div><div class='ctx'> #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='ctx'> </div><div class='ctx'> #define DRV_NAME	"3c589_cs"</div><div class='del'>-#define DRV_VERSION	"1.162-ac"</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='hunk'>@@ -163,7 +162,7 @@ static void tc589_release(struct pcmcia_device *link);</div><div class='ctx'> </div><div class='ctx'> static u16 read_eeprom(unsigned int ioaddr, int index);</div><div class='ctx'> static void tc589_reset(struct net_device *dev);</div><div class='del'>-static void media_check(unsigned long arg);</div><div class='add'>+static void media_check(struct timer_list *t);</div><div class='ctx'> static int el3_config(struct net_device *dev, struct ifmap *map);</div><div class='ctx'> static int el3_open(struct net_device *dev);</div><div class='ctx'> static netdev_tx_t el3_start_xmit(struct sk_buff *skb,</div><div class='hunk'>@@ -173,7 +172,7 @@ static void update_stats(struct net_device *dev);</div><div class='ctx'> static struct net_device_stats *el3_get_stats(struct net_device *dev);</div><div class='ctx'> static int el3_rx(struct net_device *dev);</div><div class='ctx'> static int el3_close(struct net_device *dev);</div><div class='del'>-static void el3_tx_timeout(struct net_device *dev);</div><div class='add'>+static void el3_tx_timeout(struct net_device *dev, unsigned int txqueue);</div><div class='ctx'> static void set_rx_mode(struct net_device *dev);</div><div class='ctx'> static void set_multicast_list(struct net_device *dev);</div><div class='ctx'> static const struct ethtool_ops netdev_ethtool_ops;</div><div class='hunk'>@@ -188,7 +187,6 @@ static const struct net_device_ops el3_netdev_ops = {</div><div class='ctx'> 	.ndo_set_config		= el3_config,</div><div class='ctx'> 	.ndo_get_stats		= el3_get_stats,</div><div class='ctx'> 	.ndo_set_rx_mode	= set_multicast_list,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='ctx'> 	.ndo_set_mac_address	= eth_mac_addr,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> };</div><div class='hunk'>@@ -197,6 +195,7 @@ static int tc589_probe(struct pcmcia_device *link)</div><div class='ctx'> {</div><div class='ctx'> 	struct el3_private *lp;</div><div class='ctx'> 	struct net_device *dev;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(&amp;link-&gt;dev, "3c589_attach()\n");</div><div class='ctx'> </div><div class='hunk'>@@ -220,7 +219,15 @@ static int tc589_probe(struct pcmcia_device *link)</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;ethtool_ops = &amp;netdev_ethtool_ops;</div><div class='ctx'> </div><div class='del'>-	return tc589_config(link);</div><div class='add'>+	ret = tc589_config(link);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_free_netdev;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_netdev:</div><div class='add'>+	free_netdev(dev);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void tc589_detach(struct pcmcia_device *link)</div><div class='hunk'>@@ -239,8 +246,8 @@ static void tc589_detach(struct pcmcia_device *link)</div><div class='ctx'> static int tc589_config(struct pcmcia_device *link)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = link-&gt;priv;</div><div class='del'>-	__be16 *phys_addr;</div><div class='ctx'> 	int ret, i, j, multi = 0, fifo;</div><div class='add'>+	__be16 addr[ETH_ALEN / 2];</div><div class='ctx'> 	unsigned int ioaddr;</div><div class='ctx'> 	static const char * const ram_split[] = {"5:3", "3:1", "1:1", "3:5"};</div><div class='ctx'> 	u8 *buf;</div><div class='hunk'>@@ -248,7 +255,6 @@ static int tc589_config(struct pcmcia_device *link)</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(&amp;link-&gt;dev, "3c589_config\n");</div><div class='ctx'> </div><div class='del'>-	phys_addr = (__be16 *)dev-&gt;dev_addr;</div><div class='ctx'> 	/* Is this a 3c562? */</div><div class='ctx'> 	if (link-&gt;manf_id != MANFID_3COM)</div><div class='ctx'> 		dev_info(&amp;link-&gt;dev, "hmmm, is this really a 3Com card??\n");</div><div class='hunk'>@@ -287,18 +293,19 @@ static int tc589_config(struct pcmcia_device *link)</div><div class='ctx'> 	len = pcmcia_get_tuple(link, 0x88, &amp;buf);</div><div class='ctx'> 	if (buf &amp;&amp; len &gt;= 6) {</div><div class='ctx'> 		for (i = 0; i &lt; 3; i++)</div><div class='del'>-			phys_addr[i] = htons(le16_to_cpu(buf[i*2]));</div><div class='add'>+			addr[i] = htons(le16_to_cpu(buf[i*2]));</div><div class='ctx'> 		kfree(buf);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		kfree(buf); /* 0 &lt; len &lt; 6 */</div><div class='ctx'> 		for (i = 0; i &lt; 3; i++)</div><div class='del'>-			phys_addr[i] = htons(read_eeprom(ioaddr, i));</div><div class='del'>-		if (phys_addr[0] == htons(0x6060)) {</div><div class='add'>+			addr[i] = htons(read_eeprom(ioaddr, i));</div><div class='add'>+		if (addr[0] == htons(0x6060)) {</div><div class='ctx'> 			dev_err(&amp;link-&gt;dev, "IO port conflict at 0x%03lx-0x%03lx\n",</div><div class='ctx'> 					dev-&gt;base_addr, dev-&gt;base_addr+15);</div><div class='ctx'> 			goto failed;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='add'>+	eth_hw_addr_set(dev, (u8 *)addr);</div><div class='ctx'> </div><div class='ctx'> 	/* The address and resource configuration register aren't loaded from</div><div class='ctx'> 	 * the EEPROM and *must* be set to 0 and IRQ3 for the PCMCIA version.</div><div class='hunk'>@@ -482,8 +489,7 @@ static void tc589_reset(struct net_device *dev)</div><div class='ctx'> static void netdev_get_drvinfo(struct net_device *dev,</div><div class='ctx'> 			       struct ethtool_drvinfo *info)</div><div class='ctx'> {</div><div class='del'>-	strlcpy(info-&gt;driver, DRV_NAME, sizeof(info-&gt;driver));</div><div class='del'>-	strlcpy(info-&gt;version, DRV_VERSION, sizeof(info-&gt;version));</div><div class='add'>+	strscpy(info-&gt;driver, DRV_NAME, sizeof(info-&gt;driver));</div><div class='ctx'> 	snprintf(info-&gt;bus_info, sizeof(info-&gt;bus_info),</div><div class='ctx'> 		"PCMCIA 0x%lx", dev-&gt;base_addr);</div><div class='ctx'> }</div><div class='hunk'>@@ -496,7 +502,7 @@ static int el3_config(struct net_device *dev, struct ifmap *map)</div><div class='ctx'> {</div><div class='ctx'> 	if ((map-&gt;port != (u_char)(-1)) &amp;&amp; (map-&gt;port != dev-&gt;if_port)) {</div><div class='ctx'> 		if (map-&gt;port &lt;= 3) {</div><div class='del'>-			dev-&gt;if_port = map-&gt;port;</div><div class='add'>+			WRITE_ONCE(dev-&gt;if_port, map-&gt;port);</div><div class='ctx'> 			netdev_info(dev, "switched to %s port\n", if_names[dev-&gt;if_port]);</div><div class='ctx'> 			tc589_set_xcvr(dev, dev-&gt;if_port);</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -518,7 +524,7 @@ static int el3_open(struct net_device *dev)</div><div class='ctx'> 	netif_start_queue(dev);</div><div class='ctx'> </div><div class='ctx'> 	tc589_reset(dev);</div><div class='del'>-	setup_timer(&amp;lp-&gt;media, media_check, (unsigned long)dev);</div><div class='add'>+	timer_setup(&amp;lp-&gt;media, media_check, 0);</div><div class='ctx'> 	mod_timer(&amp;lp-&gt;media, jiffies + HZ);</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(&amp;link-&gt;dev, "%s: opened, status %4.4x.\n",</div><div class='hunk'>@@ -527,14 +533,14 @@ static int el3_open(struct net_device *dev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void el3_tx_timeout(struct net_device *dev)</div><div class='add'>+static void el3_tx_timeout(struct net_device *dev, unsigned int txqueue)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int ioaddr = dev-&gt;base_addr;</div><div class='ctx'> </div><div class='ctx'> 	netdev_warn(dev, "Transmit timed out!\n");</div><div class='ctx'> 	dump_status(dev);</div><div class='ctx'> 	dev-&gt;stats.tx_errors++;</div><div class='del'>-	dev-&gt;trans_start = jiffies; /* prevent tx timeout */</div><div class='add'>+	netif_trans_update(dev); /* prevent tx timeout */</div><div class='ctx'> 	/* Issue TX_RESET and TX_START commands. */</div><div class='ctx'> 	tc589_wait_for_completion(dev, TxReset);</div><div class='ctx'> 	outw(TxEnable, ioaddr + EL3_CMD);</div><div class='hunk'>@@ -677,10 +683,10 @@ static irqreturn_t el3_interrupt(int irq, void *dev_id)</div><div class='ctx'> 	return IRQ_RETVAL(handled);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void media_check(unsigned long arg)</div><div class='add'>+static void media_check(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *dev = (struct net_device *)(arg);</div><div class='del'>-	struct el3_private *lp = netdev_priv(dev);</div><div class='add'>+	struct el3_private *lp = timer_container_of(lp, t, media);</div><div class='add'>+	struct net_device *dev = lp-&gt;p_dev-&gt;priv;</div><div class='ctx'> 	unsigned int ioaddr = dev-&gt;base_addr;</div><div class='ctx'> 	u16 media, errs;</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -940,7 +946,7 @@ static int el3_close(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	link-&gt;open--;</div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='del'>-	del_timer_sync(&amp;lp-&gt;media);</div><div class='add'>+	timer_delete_sync(&amp;lp-&gt;media);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/3com/3c59x.c b/drivers/net/ethernet/3com/3c59x.c<br/>index 753887d02b46..8c9cc97efd4e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/3com/3c59x.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/3com/3c59x.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/3com/3c59x.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/3com/3c59x.c</a></div><div class='hunk'>@@ -92,7 +92,7 @@ static int vortex_debug = 1;</div><div class='ctx'> #include &lt;linux/gfp.h&gt;</div><div class='ctx'> #include &lt;asm/irq.h&gt;			/* For nr_irqs only. */</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* Kernel compatibility defines, some common to David Hinds' PCMCIA package.</div><div class='ctx'>    This is only in the support-all-kernels source code. */</div><div class='hunk'>@@ -602,7 +602,7 @@ struct vortex_private {</div><div class='ctx'> 	struct sk_buff* rx_skbuff[RX_RING_SIZE];</div><div class='ctx'> 	struct sk_buff* tx_skbuff[TX_RING_SIZE];</div><div class='ctx'> 	unsigned int cur_rx, cur_tx;		/* The next free ring entry */</div><div class='del'>-	unsigned int dirty_rx, dirty_tx;	/* The ring entries to be free()ed. */</div><div class='add'>+	unsigned int dirty_tx;	/* The ring entries to be free()ed. */</div><div class='ctx'> 	struct vortex_extra_stats xstats;	/* NIC-specific extra stats */</div><div class='ctx'> 	struct sk_buff *tx_skb;				/* Packet being eaten by bus master ctrl.  */</div><div class='ctx'> 	dma_addr_t tx_skb_dma;				/* Allocated DMA address for bus master ctrl DMA.   */</div><div class='hunk'>@@ -618,7 +618,6 @@ struct vortex_private {</div><div class='ctx'> </div><div class='ctx'> 	/* The remainder are related to chip state, mostly media selection. */</div><div class='ctx'> 	struct timer_list timer;			/* Media selection timer. */</div><div class='del'>-	struct timer_list rx_oom_timer;		/* Rx skb allocation retry timer */</div><div class='ctx'> 	int options;						/* User-settable misc. driver options. */</div><div class='ctx'> 	unsigned int media_override:4, 		/* Passed-in media type. */</div><div class='ctx'> 		default_media:4,				/* Read from the EEPROM/Wn3_Config. */</div><div class='hunk'>@@ -759,16 +758,16 @@ static int vortex_open(struct net_device *dev);</div><div class='ctx'> static void mdio_sync(struct vortex_private *vp, int bits);</div><div class='ctx'> static int mdio_read(struct net_device *dev, int phy_id, int location);</div><div class='ctx'> static void mdio_write(struct net_device *vp, int phy_id, int location, int value);</div><div class='del'>-static void vortex_timer(unsigned long arg);</div><div class='del'>-static void rx_oom_timer(unsigned long arg);</div><div class='add'>+static void vortex_timer(struct timer_list *t);</div><div class='ctx'> static netdev_tx_t vortex_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 				     struct net_device *dev);</div><div class='ctx'> static netdev_tx_t boomerang_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 					struct net_device *dev);</div><div class='ctx'> static int vortex_rx(struct net_device *dev);</div><div class='ctx'> static int boomerang_rx(struct net_device *dev);</div><div class='del'>-static irqreturn_t vortex_interrupt(int irq, void *dev_id);</div><div class='del'>-static irqreturn_t boomerang_interrupt(int irq, void *dev_id);</div><div class='add'>+static irqreturn_t vortex_boomerang_interrupt(int irq, void *dev_id);</div><div class='add'>+static irqreturn_t _vortex_interrupt(int irq, struct net_device *dev);</div><div class='add'>+static irqreturn_t _boomerang_interrupt(int irq, struct net_device *dev);</div><div class='ctx'> static int vortex_close(struct net_device *dev);</div><div class='ctx'> static void dump_tx_ring(struct net_device *dev);</div><div class='ctx'> static void update_stats(void __iomem *ioaddr, struct net_device *dev);</div><div class='hunk'>@@ -777,7 +776,7 @@ static void set_rx_mode(struct net_device *dev);</div><div class='ctx'> #ifdef CONFIG_PCI</div><div class='ctx'> static int vortex_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);</div><div class='ctx'> #endif</div><div class='del'>-static void vortex_tx_timeout(struct net_device *dev);</div><div class='add'>+static void vortex_tx_timeout(struct net_device *dev, unsigned int txqueue);</div><div class='ctx'> static void acpi_set_WOL(struct net_device *dev);</div><div class='ctx'> static const struct ethtool_ops vortex_ethtool_ops;</div><div class='ctx'> static void set_8021q_mode(struct net_device *dev, int enable);</div><div class='hunk'>@@ -813,8 +812,8 @@ module_param(global_enable_wol, int, 0);</div><div class='ctx'> module_param_array(enable_wol, int, NULL, 0);</div><div class='ctx'> module_param(rx_copybreak, int, 0);</div><div class='ctx'> module_param(max_interrupt_work, int, 0);</div><div class='del'>-module_param(compaq_ioaddr, int, 0);</div><div class='del'>-module_param(compaq_irq, int, 0);</div><div class='add'>+module_param_hw(compaq_ioaddr, int, ioport, 0);</div><div class='add'>+module_param_hw(compaq_irq, int, irq, 0);</div><div class='ctx'> module_param(compaq_device_id, int, 0);</div><div class='ctx'> module_param(watchdog, int, 0);</div><div class='ctx'> module_param(global_use_mmio, int, 0);</div><div class='hunk'>@@ -840,11 +839,7 @@ MODULE_PARM_DESC(use_mmio, "3c59x: use memory-mapped PCI I/O resource (0-1)");</div><div class='ctx'> #ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='ctx'> static void poll_vortex(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct vortex_private *vp = netdev_priv(dev);</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	local_irq_save(flags);</div><div class='del'>-	(vp-&gt;full_bus_master_rx ? boomerang_interrupt:vortex_interrupt)(dev-&gt;irq,dev);</div><div class='del'>-	local_irq_restore(flags);</div><div class='add'>+	vortex_boomerang_interrupt(dev-&gt;irq, dev);</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -852,8 +847,7 @@ static void poll_vortex(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> static int vortex_suspend(struct device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct pci_dev *pdev = to_pci_dev(dev);</div><div class='del'>-	struct net_device *ndev = pci_get_drvdata(pdev);</div><div class='add'>+	struct net_device *ndev = dev_get_drvdata(dev);</div><div class='ctx'> </div><div class='ctx'> 	if (!ndev || !netif_running(ndev))</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -866,8 +860,7 @@ static int vortex_suspend(struct device *dev)</div><div class='ctx'> </div><div class='ctx'> static int vortex_resume(struct device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct pci_dev *pdev = to_pci_dev(dev);</div><div class='del'>-	struct net_device *ndev = pci_get_drvdata(pdev);</div><div class='add'>+	struct net_device *ndev = dev_get_drvdata(dev);</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	if (!ndev || !netif_running(ndev))</div><div class='hunk'>@@ -900,14 +893,14 @@ static const struct dev_pm_ops vortex_pm_ops = {</div><div class='ctx'> #endif /* !CONFIG_PM */</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_EISA</div><div class='del'>-static struct eisa_device_id vortex_eisa_ids[] = {</div><div class='add'>+static const struct eisa_device_id vortex_eisa_ids[] = {</div><div class='ctx'> 	{ "TCM5920", CH_3C592 },</div><div class='ctx'> 	{ "TCM5970", CH_3C597 },</div><div class='ctx'> 	{ "" }</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(eisa, vortex_eisa_ids);</div><div class='ctx'> </div><div class='del'>-static int __init vortex_eisa_probe(struct device *device)</div><div class='add'>+static int vortex_eisa_probe(struct device *device)</div><div class='ctx'> {</div><div class='ctx'> 	void __iomem *ioaddr;</div><div class='ctx'> 	struct eisa_device *edev;</div><div class='hunk'>@@ -1059,10 +1052,9 @@ static const struct net_device_ops boomrang_netdev_ops = {</div><div class='ctx'> 	.ndo_tx_timeout		= vortex_tx_timeout,</div><div class='ctx'> 	.ndo_get_stats		= vortex_get_stats,</div><div class='ctx'> #ifdef CONFIG_PCI</div><div class='del'>-	.ndo_do_ioctl 		= vortex_ioctl,</div><div class='add'>+	.ndo_eth_ioctl		= vortex_ioctl,</div><div class='ctx'> #endif</div><div class='ctx'> 	.ndo_set_rx_mode	= set_rx_mode,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='ctx'> 	.ndo_set_mac_address 	= eth_mac_addr,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> #ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='hunk'>@@ -1077,10 +1069,9 @@ static const struct net_device_ops vortex_netdev_ops = {</div><div class='ctx'> 	.ndo_tx_timeout		= vortex_tx_timeout,</div><div class='ctx'> 	.ndo_get_stats		= vortex_get_stats,</div><div class='ctx'> #ifdef CONFIG_PCI</div><div class='del'>-	.ndo_do_ioctl 		= vortex_ioctl,</div><div class='add'>+	.ndo_eth_ioctl		= vortex_ioctl,</div><div class='ctx'> #endif</div><div class='ctx'> 	.ndo_set_rx_mode	= set_rx_mode,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='ctx'> 	.ndo_set_mac_address 	= eth_mac_addr,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> #ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='hunk'>@@ -1100,6 +1091,7 @@ static int vortex_probe1(struct device *gendev, void __iomem *ioaddr, int irq,</div><div class='ctx'> 	struct vortex_private *vp;</div><div class='ctx'> 	int option;</div><div class='ctx'> 	unsigned int eeprom[0x40], checksum = 0;		/* EEPROM contents */</div><div class='add'>+	__be16 addr[ETH_ALEN / 2];</div><div class='ctx'> 	int i, step;</div><div class='ctx'> 	struct net_device *dev;</div><div class='ctx'> 	static int printed_version;</div><div class='hunk'>@@ -1158,7 +1150,7 @@ static int vortex_probe1(struct device *gendev, void __iomem *ioaddr, int irq,</div><div class='ctx'> </div><div class='ctx'> 	print_info = (vortex_debug &gt; 1);</div><div class='ctx'> 	if (print_info)</div><div class='del'>-		pr_info("See Documentation/networking/vortex.txt\n");</div><div class='add'>+		pr_info("See Documentation/networking/device_drivers/ethernet/3com/vortex.rst\n");</div><div class='ctx'> </div><div class='ctx'> 	pr_info("%s: 3Com %s %s at %p.\n",</div><div class='ctx'> 	       print_name,</div><div class='hunk'>@@ -1216,9 +1208,9 @@ static int vortex_probe1(struct device *gendev, void __iomem *ioaddr, int irq,</div><div class='ctx'> 	vp-&gt;mii.reg_num_mask = 0x1f;</div><div class='ctx'> </div><div class='ctx'> 	/* Makes sure rings are at least 16 byte aligned. */</div><div class='del'>-	vp-&gt;rx_ring = pci_alloc_consistent(pdev, sizeof(struct boom_rx_desc) * RX_RING_SIZE</div><div class='add'>+	vp-&gt;rx_ring = dma_alloc_coherent(gendev, sizeof(struct boom_rx_desc) * RX_RING_SIZE</div><div class='ctx'> 					   + sizeof(struct boom_tx_desc) * TX_RING_SIZE,</div><div class='del'>-					   &amp;vp-&gt;rx_ring_dma);</div><div class='add'>+					   &amp;vp-&gt;rx_ring_dma, GFP_KERNEL);</div><div class='ctx'> 	retval = -ENOMEM;</div><div class='ctx'> 	if (!vp-&gt;rx_ring)</div><div class='ctx'> 		goto free_device;</div><div class='hunk'>@@ -1293,7 +1285,8 @@ static int vortex_probe1(struct device *gendev, void __iomem *ioaddr, int irq,</div><div class='ctx'> 	if ((checksum != 0x00) &amp;&amp; !(vci-&gt;drv_flags &amp; IS_TORNADO))</div><div class='ctx'> 		pr_cont(" ***INVALID CHECKSUM %4.4x*** ", checksum);</div><div class='ctx'> 	for (i = 0; i &lt; 3; i++)</div><div class='del'>-		((__be16 *)dev-&gt;dev_addr)[i] = htons(eeprom[i + 10]);</div><div class='add'>+		addr[i] = htons(eeprom[i + 10]);</div><div class='add'>+	eth_hw_addr_set(dev, (u8 *)addr);</div><div class='ctx'> 	if (print_info)</div><div class='ctx'> 		pr_cont(" %pM", dev-&gt;dev_addr);</div><div class='ctx'> 	/* Unfortunately an all zero eeprom passes the checksum and this</div><div class='hunk'>@@ -1309,7 +1302,7 @@ static int vortex_probe1(struct device *gendev, void __iomem *ioaddr, int irq,</div><div class='ctx'> 	if (print_info)</div><div class='ctx'> 		pr_cont(", IRQ %d\n", dev-&gt;irq);</div><div class='ctx'> 	/* Tell them about an invalid IRQ. */</div><div class='del'>-	if (dev-&gt;irq &lt;= 0 || dev-&gt;irq &gt;= nr_irqs)</div><div class='add'>+	if (dev-&gt;irq &lt;= 0 || dev-&gt;irq &gt;= irq_get_nr_irqs())</div><div class='ctx'> 		pr_warn(" *** Warning: IRQ %d is unlikely to work! ***\n",</div><div class='ctx'> 			dev-&gt;irq);</div><div class='ctx'> </div><div class='hunk'>@@ -1473,18 +1466,17 @@ static int vortex_probe1(struct device *gendev, void __iomem *ioaddr, int irq,</div><div class='ctx'> 	if (pdev) {</div><div class='ctx'> 		vp-&gt;pm_state_valid = 1;</div><div class='ctx'> 		pci_save_state(pdev);</div><div class='del'>- 		acpi_set_WOL(dev);</div><div class='add'>+		acpi_set_WOL(dev);</div><div class='ctx'> 	}</div><div class='ctx'> 	retval = register_netdev(dev);</div><div class='ctx'> 	if (retval == 0)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> free_ring:</div><div class='del'>-	pci_free_consistent(pdev,</div><div class='del'>-						sizeof(struct boom_rx_desc) * RX_RING_SIZE</div><div class='del'>-							+ sizeof(struct boom_tx_desc) * TX_RING_SIZE,</div><div class='del'>-						vp-&gt;rx_ring,</div><div class='del'>-						vp-&gt;rx_ring_dma);</div><div class='add'>+	dma_free_coherent(&amp;pdev-&gt;dev,</div><div class='add'>+		sizeof(struct boom_rx_desc) * RX_RING_SIZE +</div><div class='add'>+		sizeof(struct boom_tx_desc) * TX_RING_SIZE,</div><div class='add'>+		vp-&gt;rx_ring, vp-&gt;rx_ring_dma);</div><div class='ctx'> free_device:</div><div class='ctx'> 	free_netdev(dev);</div><div class='ctx'> 	pr_err(PFX "vortex_probe1 fails.  Returns %d\n", retval);</div><div class='hunk'>@@ -1558,7 +1550,7 @@ vortex_up(struct net_device *dev)</div><div class='ctx'> 	struct vortex_private *vp = netdev_priv(dev);</div><div class='ctx'> 	void __iomem *ioaddr = vp-&gt;ioaddr;</div><div class='ctx'> 	unsigned int config;</div><div class='del'>-	int i, mii_reg1, mii_reg5, err = 0;</div><div class='add'>+	int i, mii_reg5, err = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (VORTEX_PCI(vp)) {</div><div class='ctx'> 		pci_set_power_state(VORTEX_PCI(vp), PCI_D0);	/* Go active */</div><div class='hunk'>@@ -1601,15 +1593,8 @@ vortex_up(struct net_device *dev)</div><div class='ctx'> 				dev-&gt;name, media_tbl[dev-&gt;if_port].name);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	init_timer(&amp;vp-&gt;timer);</div><div class='del'>-	vp-&gt;timer.expires = RUN_AT(media_tbl[dev-&gt;if_port].wait);</div><div class='del'>-	vp-&gt;timer.data = (unsigned long)dev;</div><div class='del'>-	vp-&gt;timer.function = vortex_timer;		/* timer handler */</div><div class='del'>-	add_timer(&amp;vp-&gt;timer);</div><div class='del'>-</div><div class='del'>-	init_timer(&amp;vp-&gt;rx_oom_timer);</div><div class='del'>-	vp-&gt;rx_oom_timer.data = (unsigned long)dev;</div><div class='del'>-	vp-&gt;rx_oom_timer.function = rx_oom_timer;</div><div class='add'>+	timer_setup(&amp;vp-&gt;timer, vortex_timer, 0);</div><div class='add'>+	mod_timer(&amp;vp-&gt;timer, RUN_AT(media_tbl[dev-&gt;if_port].wait));</div><div class='ctx'> </div><div class='ctx'> 	if (vortex_debug &gt; 1)</div><div class='ctx'> 		pr_debug("%s: Initial media type %s.\n",</div><div class='hunk'>@@ -1622,7 +1607,7 @@ vortex_up(struct net_device *dev)</div><div class='ctx'> 	window_write32(vp, config, 3, Wn3_Config);</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;if_port == XCVR_MII || dev-&gt;if_port == XCVR_NWAY) {</div><div class='del'>-		mii_reg1 = mdio_read(dev, vp-&gt;phys[0], MII_BMSR);</div><div class='add'>+		mdio_read(dev, vp-&gt;phys[0], MII_BMSR);</div><div class='ctx'> 		mii_reg5 = mdio_read(dev, vp-&gt;phys[0], MII_LPA);</div><div class='ctx'> 		vp-&gt;partner_flow_ctrl = ((mii_reg5 &amp; 0x0400) != 0);</div><div class='ctx'> 		vp-&gt;mii.full_duplex = vp-&gt;full_duplex;</div><div class='hunk'>@@ -1684,7 +1669,7 @@ vortex_up(struct net_device *dev)</div><div class='ctx'> 	window_write16(vp, 0x0040, 4, Wn4_NetDiag);</div><div class='ctx'> </div><div class='ctx'> 	if (vp-&gt;full_bus_master_rx) { /* Boomerang bus master. */</div><div class='del'>-		vp-&gt;cur_rx = vp-&gt;dirty_rx = 0;</div><div class='add'>+		vp-&gt;cur_rx = 0;</div><div class='ctx'> 		/* Initialize the RxEarly register as recommended. */</div><div class='ctx'> 		iowrite16(SetRxThreshold + (1536&gt;&gt;2), ioaddr + EL3_CMD);</div><div class='ctx'> 		iowrite32(0x0020, ioaddr + PktStatus);</div><div class='hunk'>@@ -1726,6 +1711,7 @@ vortex_up(struct net_device *dev)</div><div class='ctx'> 	if (vp-&gt;cb_fn_base)			/* The PCMCIA people are idiots.  */</div><div class='ctx'> 		iowrite32(0x8000, vp-&gt;cb_fn_base + 4);</div><div class='ctx'> 	netif_start_queue (dev);</div><div class='add'>+	netdev_reset_queue(dev);</div><div class='ctx'> err_out:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='hunk'>@@ -1736,10 +1722,10 @@ vortex_open(struct net_device *dev)</div><div class='ctx'> 	struct vortex_private *vp = netdev_priv(dev);</div><div class='ctx'> 	int i;</div><div class='ctx'> 	int retval;</div><div class='add'>+	dma_addr_t dma;</div><div class='ctx'> </div><div class='ctx'> 	/* Use the now-standard shared IRQ implementation. */</div><div class='del'>-	if ((retval = request_irq(dev-&gt;irq, vp-&gt;full_bus_master_rx ?</div><div class='del'>-				boomerang_interrupt : vortex_interrupt, IRQF_SHARED, dev-&gt;name, dev))) {</div><div class='add'>+	if ((retval = request_irq(dev-&gt;irq, vortex_boomerang_interrupt, IRQF_SHARED, dev-&gt;name, dev))) {</div><div class='ctx'> 		pr_err("%s: Could not reserve IRQ %d\n", dev-&gt;name, dev-&gt;irq);</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1760,7 +1746,11 @@ vortex_open(struct net_device *dev)</div><div class='ctx'> 				break;			/* Bad news!  */</div><div class='ctx'> </div><div class='ctx'> 			skb_reserve(skb, NET_IP_ALIGN);	/* Align IP on 16 byte boundaries */</div><div class='del'>-			vp-&gt;rx_ring[i].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb-&gt;data, PKT_BUF_SZ, PCI_DMA_FROMDEVICE));</div><div class='add'>+			dma = dma_map_single(vp-&gt;gendev, skb-&gt;data,</div><div class='add'>+					     PKT_BUF_SZ, DMA_FROM_DEVICE);</div><div class='add'>+			if (dma_mapping_error(vp-&gt;gendev, dma))</div><div class='add'>+				break;</div><div class='add'>+			vp-&gt;rx_ring[i].addr = cpu_to_le32(dma);</div><div class='ctx'> 		}</div><div class='ctx'> 		if (i != RX_RING_SIZE) {</div><div class='ctx'> 			pr_emerg("%s: no memory for rx ring\n", dev-&gt;name);</div><div class='hunk'>@@ -1791,10 +1781,10 @@ out:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='del'>-vortex_timer(unsigned long data)</div><div class='add'>+vortex_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *dev = (struct net_device *)data;</div><div class='del'>-	struct vortex_private *vp = netdev_priv(dev);</div><div class='add'>+	struct vortex_private *vp = timer_container_of(vp, t, timer);</div><div class='add'>+	struct net_device *dev = vp-&gt;mii.dev;</div><div class='ctx'> 	void __iomem *ioaddr = vp-&gt;ioaddr;</div><div class='ctx'> 	int next_tick = 60*HZ;</div><div class='ctx'> 	int ok = 0;</div><div class='hunk'>@@ -1889,7 +1879,7 @@ leave_media_alone:</div><div class='ctx'> 		iowrite16(FakeIntr, ioaddr + EL3_CMD);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void vortex_tx_timeout(struct net_device *dev)</div><div class='add'>+static void vortex_tx_timeout(struct net_device *dev, unsigned int txqueue)</div><div class='ctx'> {</div><div class='ctx'> 	struct vortex_private *vp = netdev_priv(dev);</div><div class='ctx'> 	void __iomem *ioaddr = vp-&gt;ioaddr;</div><div class='hunk'>@@ -1910,18 +1900,7 @@ static void vortex_tx_timeout(struct net_device *dev)</div><div class='ctx'> 		pr_err("%s: Interrupt posted but not delivered --"</div><div class='ctx'> 			   " IRQ blocked by another device?\n", dev-&gt;name);</div><div class='ctx'> 		/* Bad idea here.. but we might as well handle a few events. */</div><div class='del'>-		{</div><div class='del'>-			/*</div><div class='del'>-			 * Block interrupts because vortex_interrupt does a bare spin_lock()</div><div class='del'>-			 */</div><div class='del'>-			unsigned long flags;</div><div class='del'>-			local_irq_save(flags);</div><div class='del'>-			if (vp-&gt;full_bus_master_tx)</div><div class='del'>-				boomerang_interrupt(dev-&gt;irq, dev);</div><div class='del'>-			else</div><div class='del'>-				vortex_interrupt(dev-&gt;irq, dev);</div><div class='del'>-			local_irq_restore(flags);</div><div class='del'>-		}</div><div class='add'>+		vortex_boomerang_interrupt(dev-&gt;irq, dev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (vortex_debug &gt; 0)</div><div class='hunk'>@@ -1935,19 +1914,21 @@ static void vortex_tx_timeout(struct net_device *dev)</div><div class='ctx'> 		if (vp-&gt;cur_tx - vp-&gt;dirty_tx &gt; 0  &amp;&amp;  ioread32(ioaddr + DownListPtr) == 0)</div><div class='ctx'> 			iowrite32(vp-&gt;tx_ring_dma + (vp-&gt;dirty_tx % TX_RING_SIZE) * sizeof(struct boom_tx_desc),</div><div class='ctx'> 				 ioaddr + DownListPtr);</div><div class='del'>-		if (vp-&gt;cur_tx - vp-&gt;dirty_tx &lt; TX_RING_SIZE)</div><div class='add'>+		if (vp-&gt;cur_tx - vp-&gt;dirty_tx &lt; TX_RING_SIZE) {</div><div class='ctx'> 			netif_wake_queue (dev);</div><div class='add'>+			netdev_reset_queue (dev);</div><div class='add'>+		}</div><div class='ctx'> 		if (vp-&gt;drv_flags &amp; IS_BOOMERANG)</div><div class='ctx'> 			iowrite8(PKT_BUF_SZ&gt;&gt;8, ioaddr + TxFreeThreshold);</div><div class='ctx'> 		iowrite16(DownUnstall, ioaddr + EL3_CMD);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		dev-&gt;stats.tx_dropped++;</div><div class='ctx'> 		netif_wake_queue(dev);</div><div class='add'>+		netdev_reset_queue(dev);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='ctx'> 	/* Issue Tx Enable */</div><div class='ctx'> 	iowrite16(TxEnable, ioaddr + EL3_CMD);</div><div class='del'>-	dev-&gt;trans_start = jiffies; /* prevent tx timeout */</div><div class='add'>+	netif_trans_update(dev); /* prevent tx timeout */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -1975,7 +1956,7 @@ vortex_error(struct net_device *dev, int status)</div><div class='ctx'> 				   dev-&gt;name, tx_status);</div><div class='ctx'> 			if (tx_status == 0x82) {</div><div class='ctx'> 				pr_err("Probably a duplex mismatch.  See "</div><div class='del'>-						"Documentation/networking/vortex.txt\n");</div><div class='add'>+						"Documentation/networking/device_drivers/ethernet/3com/vortex.rst\n");</div><div class='ctx'> 			}</div><div class='ctx'> 			dump_tx_ring(dev);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -2063,14 +2044,21 @@ vortex_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct vortex_private *vp = netdev_priv(dev);</div><div class='ctx'> 	void __iomem *ioaddr = vp-&gt;ioaddr;</div><div class='add'>+	int skblen = skb-&gt;len;</div><div class='ctx'> </div><div class='ctx'> 	/* Put out the doubleword header... */</div><div class='ctx'> 	iowrite32(skb-&gt;len, ioaddr + TX_FIFO);</div><div class='ctx'> 	if (vp-&gt;bus_master) {</div><div class='ctx'> 		/* Set the bus-master controller to transfer the packet. */</div><div class='ctx'> 		int len = (skb-&gt;len + 3) &amp; ~3;</div><div class='del'>-		vp-&gt;tx_skb_dma = pci_map_single(VORTEX_PCI(vp), skb-&gt;data, len,</div><div class='del'>-						PCI_DMA_TODEVICE);</div><div class='add'>+		vp-&gt;tx_skb_dma = dma_map_single(vp-&gt;gendev, skb-&gt;data, len,</div><div class='add'>+						DMA_TO_DEVICE);</div><div class='add'>+		if (dma_mapping_error(vp-&gt;gendev, vp-&gt;tx_skb_dma)) {</div><div class='add'>+			dev_kfree_skb_any(skb);</div><div class='add'>+			dev-&gt;stats.tx_dropped++;</div><div class='add'>+			return NETDEV_TX_OK;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		spin_lock_irq(&amp;vp-&gt;window_lock);</div><div class='ctx'> 		window_set(vp, 7);</div><div class='ctx'> 		iowrite32(vp-&gt;tx_skb_dma, ioaddr + Wn7_MasterAddr);</div><div class='hunk'>@@ -2094,6 +2082,7 @@ vortex_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	netdev_sent_queue(dev, skblen);</div><div class='ctx'> </div><div class='ctx'> 	/* Clear the Tx status stack. */</div><div class='ctx'> 	{</div><div class='hunk'>@@ -2125,6 +2114,7 @@ boomerang_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	void __iomem *ioaddr = vp-&gt;ioaddr;</div><div class='ctx'> 	/* Calculate the next Tx descriptor entry. */</div><div class='ctx'> 	int entry = vp-&gt;cur_tx % TX_RING_SIZE;</div><div class='add'>+	int skblen = skb-&gt;len;</div><div class='ctx'> 	struct boom_tx_desc *prev_entry = &amp;vp-&gt;tx_ring[(vp-&gt;cur_tx-1) % TX_RING_SIZE];</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	dma_addr_t dma_addr;</div><div class='hunk'>@@ -2162,9 +2152,9 @@ boomerang_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 			vp-&gt;tx_ring[entry].status = cpu_to_le32(skb-&gt;len | TxIntrUploaded | AddTCPChksum | AddUDPChksum);</div><div class='ctx'> </div><div class='ctx'> 	if (!skb_shinfo(skb)-&gt;nr_frags) {</div><div class='del'>-		dma_addr = pci_map_single(VORTEX_PCI(vp), skb-&gt;data, skb-&gt;len,</div><div class='del'>-					  PCI_DMA_TODEVICE);</div><div class='del'>-		if (dma_mapping_error(&amp;VORTEX_PCI(vp)-&gt;dev, dma_addr))</div><div class='add'>+		dma_addr = dma_map_single(vp-&gt;gendev, skb-&gt;data, skb-&gt;len,</div><div class='add'>+					  DMA_TO_DEVICE);</div><div class='add'>+		if (dma_mapping_error(vp-&gt;gendev, dma_addr))</div><div class='ctx'> 			goto out_dma_err;</div><div class='ctx'> </div><div class='ctx'> 		vp-&gt;tx_ring[entry].frag[0].addr = cpu_to_le32(dma_addr);</div><div class='hunk'>@@ -2172,9 +2162,9 @@ boomerang_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	} else {</div><div class='ctx'> 		int i;</div><div class='ctx'> </div><div class='del'>-		dma_addr = pci_map_single(VORTEX_PCI(vp), skb-&gt;data,</div><div class='del'>-					  skb_headlen(skb), PCI_DMA_TODEVICE);</div><div class='del'>-		if (dma_mapping_error(&amp;VORTEX_PCI(vp)-&gt;dev, dma_addr))</div><div class='add'>+		dma_addr = dma_map_single(vp-&gt;gendev, skb-&gt;data,</div><div class='add'>+					  skb_headlen(skb), DMA_TO_DEVICE);</div><div class='add'>+		if (dma_mapping_error(vp-&gt;gendev, dma_addr))</div><div class='ctx'> 			goto out_dma_err;</div><div class='ctx'> </div><div class='ctx'> 		vp-&gt;tx_ring[entry].frag[0].addr = cpu_to_le32(dma_addr);</div><div class='hunk'>@@ -2183,21 +2173,21 @@ boomerang_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 		for (i = 0; i &lt; skb_shinfo(skb)-&gt;nr_frags; i++) {</div><div class='ctx'> 			skb_frag_t *frag = &amp;skb_shinfo(skb)-&gt;frags[i];</div><div class='ctx'> </div><div class='del'>-			dma_addr = skb_frag_dma_map(&amp;VORTEX_PCI(vp)-&gt;dev, frag,</div><div class='add'>+			dma_addr = skb_frag_dma_map(vp-&gt;gendev, frag,</div><div class='ctx'> 						    0,</div><div class='del'>-						    frag-&gt;size,</div><div class='add'>+						    skb_frag_size(frag),</div><div class='ctx'> 						    DMA_TO_DEVICE);</div><div class='del'>-			if (dma_mapping_error(&amp;VORTEX_PCI(vp)-&gt;dev, dma_addr)) {</div><div class='add'>+			if (dma_mapping_error(vp-&gt;gendev, dma_addr)) {</div><div class='ctx'> 				for(i = i-1; i &gt;= 0; i--)</div><div class='del'>-					dma_unmap_page(&amp;VORTEX_PCI(vp)-&gt;dev,</div><div class='add'>+					dma_unmap_page(vp-&gt;gendev,</div><div class='ctx'> 						       le32_to_cpu(vp-&gt;tx_ring[entry].frag[i+1].addr),</div><div class='ctx'> 						       le32_to_cpu(vp-&gt;tx_ring[entry].frag[i+1].length),</div><div class='ctx'> 						       DMA_TO_DEVICE);</div><div class='ctx'> </div><div class='del'>-				pci_unmap_single(VORTEX_PCI(vp),</div><div class='add'>+				dma_unmap_single(vp-&gt;gendev,</div><div class='ctx'> 						 le32_to_cpu(vp-&gt;tx_ring[entry].frag[0].addr),</div><div class='ctx'> 						 le32_to_cpu(vp-&gt;tx_ring[entry].frag[0].length),</div><div class='del'>-						 PCI_DMA_TODEVICE);</div><div class='add'>+						 DMA_TO_DEVICE);</div><div class='ctx'> </div><div class='ctx'> 				goto out_dma_err;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -2212,8 +2202,8 @@ boomerang_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> #else</div><div class='del'>-	dma_addr = pci_map_single(VORTEX_PCI(vp), skb-&gt;data, skb-&gt;len, PCI_DMA_TODEVICE);</div><div class='del'>-	if (dma_mapping_error(&amp;VORTEX_PCI(vp)-&gt;dev, dma_addr))</div><div class='add'>+	dma_addr = dma_map_single(vp-&gt;gendev, skb-&gt;data, skb-&gt;len, DMA_TO_DEVICE);</div><div class='add'>+	if (dma_mapping_error(vp-&gt;gendev, dma_addr))</div><div class='ctx'> 		goto out_dma_err;</div><div class='ctx'> 	vp-&gt;tx_ring[entry].addr = cpu_to_le32(dma_addr);</div><div class='ctx'> 	vp-&gt;tx_ring[entry].length = cpu_to_le32(skb-&gt;len | LAST_FRAG);</div><div class='hunk'>@@ -2230,6 +2220,8 @@ boomerang_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	vp-&gt;cur_tx++;</div><div class='add'>+	netdev_sent_queue(dev, skblen);</div><div class='add'>+</div><div class='ctx'> 	if (vp-&gt;cur_tx - vp-&gt;dirty_tx &gt; TX_RING_SIZE - 1) {</div><div class='ctx'> 		netif_stop_queue (dev);</div><div class='ctx'> 	} else {					/* Clear previous interrupt enable. */</div><div class='hunk'>@@ -2246,7 +2238,7 @@ boomerang_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> out:</div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> out_dma_err:</div><div class='del'>-	dev_err(&amp;VORTEX_PCI(vp)-&gt;dev, "Error mapping dma buffer\n");</div><div class='add'>+	dev_err(vp-&gt;gendev, "Error mapping dma buffer\n");</div><div class='ctx'> 	goto out;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2259,17 +2251,16 @@ out_dma_err:</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> static irqreturn_t</div><div class='del'>-vortex_interrupt(int irq, void *dev_id)</div><div class='add'>+_vortex_interrupt(int irq, struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *dev = dev_id;</div><div class='ctx'> 	struct vortex_private *vp = netdev_priv(dev);</div><div class='ctx'> 	void __iomem *ioaddr;</div><div class='ctx'> 	int status;</div><div class='ctx'> 	int work_done = max_interrupt_work;</div><div class='ctx'> 	int handled = 0;</div><div class='add'>+	unsigned int bytes_compl = 0, pkts_compl = 0;</div><div class='ctx'> </div><div class='ctx'> 	ioaddr = vp-&gt;ioaddr;</div><div class='del'>-	spin_lock(&amp;vp-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	status = ioread16(ioaddr + EL3_STATUS);</div><div class='ctx'> </div><div class='hunk'>@@ -2313,8 +2304,10 @@ vortex_interrupt(int irq, void *dev_id)</div><div class='ctx'> 		if (status &amp; DMADone) {</div><div class='ctx'> 			if (ioread16(ioaddr + Wn7_MasterStatus) &amp; 0x1000) {</div><div class='ctx'> 				iowrite16(0x1000, ioaddr + Wn7_MasterStatus); /* Ack the event. */</div><div class='del'>-				pci_unmap_single(VORTEX_PCI(vp), vp-&gt;tx_skb_dma, (vp-&gt;tx_skb-&gt;len + 3) &amp; ~3, PCI_DMA_TODEVICE);</div><div class='del'>-				dev_kfree_skb_irq(vp-&gt;tx_skb); /* Release the transferred buffer */</div><div class='add'>+				dma_unmap_single(vp-&gt;gendev, vp-&gt;tx_skb_dma, (vp-&gt;tx_skb-&gt;len + 3) &amp; ~3, DMA_TO_DEVICE);</div><div class='add'>+				pkts_compl++;</div><div class='add'>+				bytes_compl += vp-&gt;tx_skb-&gt;len;</div><div class='add'>+				dev_consume_skb_irq(vp-&gt;tx_skb); /* Release the transferred buffer */</div><div class='ctx'> 				if (ioread16(ioaddr + TxFree) &gt; 1536) {</div><div class='ctx'> 					/*</div><div class='ctx'> 					 * AKPM: FIXME: I don't think we need this.  If the queue was stopped due to</div><div class='hunk'>@@ -2358,13 +2351,13 @@ vortex_interrupt(int irq, void *dev_id)</div><div class='ctx'> 		iowrite16(AckIntr | IntReq | IntLatch, ioaddr + EL3_CMD);</div><div class='ctx'> 	} while ((status = ioread16(ioaddr + EL3_STATUS)) &amp; (IntLatch | RxComplete));</div><div class='ctx'> </div><div class='add'>+	netdev_completed_queue(dev, pkts_compl, bytes_compl);</div><div class='ctx'> 	spin_unlock(&amp;vp-&gt;window_lock);</div><div class='ctx'> </div><div class='ctx'> 	if (vortex_debug &gt; 4)</div><div class='ctx'> 		pr_debug("%s: exiting interrupt, status %4.4x.\n",</div><div class='ctx'> 			   dev-&gt;name, status);</div><div class='ctx'> handler_exit:</div><div class='del'>-	spin_unlock(&amp;vp-&gt;lock);</div><div class='ctx'> 	return IRQ_RETVAL(handled);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2374,23 +2367,17 @@ handler_exit:</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> static irqreturn_t</div><div class='del'>-boomerang_interrupt(int irq, void *dev_id)</div><div class='add'>+_boomerang_interrupt(int irq, struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *dev = dev_id;</div><div class='ctx'> 	struct vortex_private *vp = netdev_priv(dev);</div><div class='ctx'> 	void __iomem *ioaddr;</div><div class='ctx'> 	int status;</div><div class='ctx'> 	int work_done = max_interrupt_work;</div><div class='ctx'> 	int handled = 0;</div><div class='add'>+	unsigned int bytes_compl = 0, pkts_compl = 0;</div><div class='ctx'> </div><div class='ctx'> 	ioaddr = vp-&gt;ioaddr;</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * It seems dopey to put the spinlock this early, but we could race against vortex_tx_timeout</div><div class='del'>-	 * and boomerang_start_xmit</div><div class='del'>-	 */</div><div class='del'>-	spin_lock(&amp;vp-&gt;lock);</div><div class='ctx'> 	vp-&gt;handling_irq = 1;</div><div class='ctx'> </div><div class='ctx'> 	status = ioread16(ioaddr + EL3_STATUS);</div><div class='hunk'>@@ -2446,16 +2433,23 @@ boomerang_interrupt(int irq, void *dev_id)</div><div class='ctx'> 					struct sk_buff *skb = vp-&gt;tx_skbuff[entry];</div><div class='ctx'> #if DO_ZEROCOPY</div><div class='ctx'> 					int i;</div><div class='del'>-					for (i=0; i&lt;=skb_shinfo(skb)-&gt;nr_frags; i++)</div><div class='del'>-							pci_unmap_single(VORTEX_PCI(vp),</div><div class='add'>+					dma_unmap_single(vp-&gt;gendev,</div><div class='add'>+							le32_to_cpu(vp-&gt;tx_ring[entry].frag[0].addr),</div><div class='add'>+							le32_to_cpu(vp-&gt;tx_ring[entry].frag[0].length)&amp;0xFFF,</div><div class='add'>+							DMA_TO_DEVICE);</div><div class='add'>+</div><div class='add'>+					for (i=1; i&lt;=skb_shinfo(skb)-&gt;nr_frags; i++)</div><div class='add'>+							dma_unmap_page(vp-&gt;gendev,</div><div class='ctx'> 											 le32_to_cpu(vp-&gt;tx_ring[entry].frag[i].addr),</div><div class='ctx'> 											 le32_to_cpu(vp-&gt;tx_ring[entry].frag[i].length)&amp;0xFFF,</div><div class='del'>-											 PCI_DMA_TODEVICE);</div><div class='add'>+											 DMA_TO_DEVICE);</div><div class='ctx'> #else</div><div class='del'>-					pci_unmap_single(VORTEX_PCI(vp),</div><div class='del'>-						le32_to_cpu(vp-&gt;tx_ring[entry].addr), skb-&gt;len, PCI_DMA_TODEVICE);</div><div class='add'>+					dma_unmap_single(vp-&gt;gendev,</div><div class='add'>+						le32_to_cpu(vp-&gt;tx_ring[entry].addr), skb-&gt;len, DMA_TO_DEVICE);</div><div class='ctx'> #endif</div><div class='del'>-					dev_kfree_skb_irq(skb);</div><div class='add'>+					pkts_compl++;</div><div class='add'>+					bytes_compl += skb-&gt;len;</div><div class='add'>+					dev_consume_skb_irq(skb);</div><div class='ctx'> 					vp-&gt;tx_skbuff[entry] = NULL;</div><div class='ctx'> 				} else {</div><div class='ctx'> 					pr_debug("boomerang_interrupt: no skb!\n");</div><div class='hunk'>@@ -2495,16 +2489,36 @@ boomerang_interrupt(int irq, void *dev_id)</div><div class='ctx'> 			iowrite32(0x8000, vp-&gt;cb_fn_base + 4);</div><div class='ctx'> </div><div class='ctx'> 	} while ((status = ioread16(ioaddr + EL3_STATUS)) &amp; IntLatch);</div><div class='add'>+	netdev_completed_queue(dev, pkts_compl, bytes_compl);</div><div class='ctx'> </div><div class='ctx'> 	if (vortex_debug &gt; 4)</div><div class='ctx'> 		pr_debug("%s: exiting interrupt, status %4.4x.\n",</div><div class='ctx'> 			   dev-&gt;name, status);</div><div class='ctx'> handler_exit:</div><div class='ctx'> 	vp-&gt;handling_irq = 0;</div><div class='del'>-	spin_unlock(&amp;vp-&gt;lock);</div><div class='ctx'> 	return IRQ_RETVAL(handled);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static irqreturn_t</div><div class='add'>+vortex_boomerang_interrupt(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = dev_id;</div><div class='add'>+	struct vortex_private *vp = netdev_priv(dev);</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	irqreturn_t ret;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;vp-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	if (vp-&gt;full_bus_master_rx)</div><div class='add'>+		ret = _boomerang_interrupt(dev-&gt;irq, dev);</div><div class='add'>+	else</div><div class='add'>+		ret = _vortex_interrupt(dev-&gt;irq, dev);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;vp-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int vortex_rx(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct vortex_private *vp = netdev_priv(dev);</div><div class='hunk'>@@ -2540,14 +2554,14 @@ static int vortex_rx(struct net_device *dev)</div><div class='ctx'> 				/* 'skb_put()' points to the start of sk_buff data area. */</div><div class='ctx'> 				if (vp-&gt;bus_master &amp;&amp;</div><div class='ctx'> 					! (ioread16(ioaddr + Wn7_MasterStatus) &amp; 0x8000)) {</div><div class='del'>-					dma_addr_t dma = pci_map_single(VORTEX_PCI(vp), skb_put(skb, pkt_len),</div><div class='del'>-									   pkt_len, PCI_DMA_FROMDEVICE);</div><div class='add'>+					dma_addr_t dma = dma_map_single(vp-&gt;gendev, skb_put(skb, pkt_len),</div><div class='add'>+									   pkt_len, DMA_FROM_DEVICE);</div><div class='ctx'> 					iowrite32(dma, ioaddr + Wn7_MasterAddr);</div><div class='ctx'> 					iowrite16((skb-&gt;len + 3) &amp; ~3, ioaddr + Wn7_MasterLen);</div><div class='ctx'> 					iowrite16(StartDMAUp, ioaddr + EL3_CMD);</div><div class='ctx'> 					while (ioread16(ioaddr + Wn7_MasterStatus) &amp; 0x8000)</div><div class='ctx'> 						;</div><div class='del'>-					pci_unmap_single(VORTEX_PCI(vp), dma, pkt_len, PCI_DMA_FROMDEVICE);</div><div class='add'>+					dma_unmap_single(vp-&gt;gendev, dma, pkt_len, DMA_FROM_DEVICE);</div><div class='ctx'> 				} else {</div><div class='ctx'> 					ioread32_rep(ioaddr + RX_FIFO,</div><div class='ctx'> 					             skb_put(skb, pkt_len),</div><div class='hunk'>@@ -2580,7 +2594,7 @@ boomerang_rx(struct net_device *dev)</div><div class='ctx'> 	int entry = vp-&gt;cur_rx % RX_RING_SIZE;</div><div class='ctx'> 	void __iomem *ioaddr = vp-&gt;ioaddr;</div><div class='ctx'> 	int rx_status;</div><div class='del'>-	int rx_work_limit = vp-&gt;dirty_rx + RX_RING_SIZE - vp-&gt;cur_rx;</div><div class='add'>+	int rx_work_limit = RX_RING_SIZE;</div><div class='ctx'> </div><div class='ctx'> 	if (vortex_debug &gt; 5)</div><div class='ctx'> 		pr_debug("boomerang_rx(): status %4.4x\n", ioread16(ioaddr+EL3_STATUS));</div><div class='hunk'>@@ -2601,7 +2615,8 @@ boomerang_rx(struct net_device *dev)</div><div class='ctx'> 		} else {</div><div class='ctx'> 			/* The packet length: up to 4.5K!. */</div><div class='ctx'> 			int pkt_len = rx_status &amp; 0x1fff;</div><div class='del'>-			struct sk_buff *skb;</div><div class='add'>+			struct sk_buff *skb, *newskb;</div><div class='add'>+			dma_addr_t newdma;</div><div class='ctx'> 			dma_addr_t dma = le32_to_cpu(vp-&gt;rx_ring[entry].addr);</div><div class='ctx'> </div><div class='ctx'> 			if (vortex_debug &gt; 4)</div><div class='hunk'>@@ -2613,19 +2628,36 @@ boomerang_rx(struct net_device *dev)</div><div class='ctx'> 			if (pkt_len &lt; rx_copybreak &amp;&amp;</div><div class='ctx'> 			    (skb = netdev_alloc_skb(dev, pkt_len + 2)) != NULL) {</div><div class='ctx'> 				skb_reserve(skb, 2);	/* Align IP on 16 byte boundaries */</div><div class='del'>-				pci_dma_sync_single_for_cpu(VORTEX_PCI(vp), dma, PKT_BUF_SZ, PCI_DMA_FROMDEVICE);</div><div class='add'>+				dma_sync_single_for_cpu(vp-&gt;gendev, dma, PKT_BUF_SZ, DMA_FROM_DEVICE);</div><div class='ctx'> 				/* 'skb_put()' points to the start of sk_buff data area. */</div><div class='del'>-				memcpy(skb_put(skb, pkt_len),</div><div class='del'>-					   vp-&gt;rx_skbuff[entry]-&gt;data,</div><div class='del'>-					   pkt_len);</div><div class='del'>-				pci_dma_sync_single_for_device(VORTEX_PCI(vp), dma, PKT_BUF_SZ, PCI_DMA_FROMDEVICE);</div><div class='add'>+				skb_put_data(skb, vp-&gt;rx_skbuff[entry]-&gt;data,</div><div class='add'>+					     pkt_len);</div><div class='add'>+				dma_sync_single_for_device(vp-&gt;gendev, dma, PKT_BUF_SZ, DMA_FROM_DEVICE);</div><div class='ctx'> 				vp-&gt;rx_copy++;</div><div class='ctx'> 			} else {</div><div class='add'>+				/* Pre-allocate the replacement skb.  If it or its</div><div class='add'>+				 * mapping fails then recycle the buffer thats already</div><div class='add'>+				 * in place</div><div class='add'>+				 */</div><div class='add'>+				newskb = netdev_alloc_skb_ip_align(dev, PKT_BUF_SZ);</div><div class='add'>+				if (!newskb) {</div><div class='add'>+					dev-&gt;stats.rx_dropped++;</div><div class='add'>+					goto clear_complete;</div><div class='add'>+				}</div><div class='add'>+				newdma = dma_map_single(vp-&gt;gendev, newskb-&gt;data,</div><div class='add'>+							PKT_BUF_SZ, DMA_FROM_DEVICE);</div><div class='add'>+				if (dma_mapping_error(vp-&gt;gendev, newdma)) {</div><div class='add'>+					dev-&gt;stats.rx_dropped++;</div><div class='add'>+					consume_skb(newskb);</div><div class='add'>+					goto clear_complete;</div><div class='add'>+				}</div><div class='add'>+</div><div class='ctx'> 				/* Pass up the skbuff already on the Rx ring. */</div><div class='ctx'> 				skb = vp-&gt;rx_skbuff[entry];</div><div class='del'>-				vp-&gt;rx_skbuff[entry] = NULL;</div><div class='add'>+				vp-&gt;rx_skbuff[entry] = newskb;</div><div class='add'>+				vp-&gt;rx_ring[entry].addr = cpu_to_le32(newdma);</div><div class='ctx'> 				skb_put(skb, pkt_len);</div><div class='del'>-				pci_unmap_single(VORTEX_PCI(vp), dma, PKT_BUF_SZ, PCI_DMA_FROMDEVICE);</div><div class='add'>+				dma_unmap_single(vp-&gt;gendev, dma, PKT_BUF_SZ, DMA_FROM_DEVICE);</div><div class='ctx'> 				vp-&gt;rx_nocopy++;</div><div class='ctx'> 			}</div><div class='ctx'> 			skb-&gt;protocol = eth_type_trans(skb, dev);</div><div class='hunk'>@@ -2641,65 +2673,25 @@ boomerang_rx(struct net_device *dev)</div><div class='ctx'> 			netif_rx(skb);</div><div class='ctx'> 			dev-&gt;stats.rx_packets++;</div><div class='ctx'> 		}</div><div class='del'>-		entry = (++vp-&gt;cur_rx) % RX_RING_SIZE;</div><div class='del'>-	}</div><div class='del'>-	/* Refill the Rx ring buffers. */</div><div class='del'>-	for (; vp-&gt;cur_rx - vp-&gt;dirty_rx &gt; 0; vp-&gt;dirty_rx++) {</div><div class='del'>-		struct sk_buff *skb;</div><div class='del'>-		entry = vp-&gt;dirty_rx % RX_RING_SIZE;</div><div class='del'>-		if (vp-&gt;rx_skbuff[entry] == NULL) {</div><div class='del'>-			skb = netdev_alloc_skb_ip_align(dev, PKT_BUF_SZ);</div><div class='del'>-			if (skb == NULL) {</div><div class='del'>-				static unsigned long last_jif;</div><div class='del'>-				if (time_after(jiffies, last_jif + 10 * HZ)) {</div><div class='del'>-					pr_warn("%s: memory shortage\n",</div><div class='del'>-						dev-&gt;name);</div><div class='del'>-					last_jif = jiffies;</div><div class='del'>-				}</div><div class='del'>-				if ((vp-&gt;cur_rx - vp-&gt;dirty_rx) == RX_RING_SIZE)</div><div class='del'>-					mod_timer(&amp;vp-&gt;rx_oom_timer, RUN_AT(HZ * 1));</div><div class='del'>-				break;			/* Bad news!  */</div><div class='del'>-			}</div><div class='ctx'> </div><div class='del'>-			vp-&gt;rx_ring[entry].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb-&gt;data, PKT_BUF_SZ, PCI_DMA_FROMDEVICE));</div><div class='del'>-			vp-&gt;rx_skbuff[entry] = skb;</div><div class='del'>-		}</div><div class='add'>+clear_complete:</div><div class='ctx'> 		vp-&gt;rx_ring[entry].status = 0;	/* Clear complete bit. */</div><div class='ctx'> 		iowrite16(UpUnstall, ioaddr + EL3_CMD);</div><div class='add'>+		entry = (++vp-&gt;cur_rx) % RX_RING_SIZE;</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * If we've hit a total OOM refilling the Rx ring we poll once a second</div><div class='del'>- * for some memory.  Otherwise there is no way to restart the rx process.</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-rx_oom_timer(unsigned long arg)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = (struct net_device *)arg;</div><div class='del'>-	struct vortex_private *vp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	spin_lock_irq(&amp;vp-&gt;lock);</div><div class='del'>-	if ((vp-&gt;cur_rx - vp-&gt;dirty_rx) == RX_RING_SIZE)	/* This test is redundant, but makes me feel good */</div><div class='del'>-		boomerang_rx(dev);</div><div class='del'>-	if (vortex_debug &gt; 1) {</div><div class='del'>-		pr_debug("%s: rx_oom_timer %s\n", dev-&gt;name,</div><div class='del'>-			((vp-&gt;cur_rx - vp-&gt;dirty_rx) != RX_RING_SIZE) ? "succeeded" : "retrying");</div><div class='del'>-	}</div><div class='del'>-	spin_unlock_irq(&amp;vp-&gt;lock);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void</div><div class='ctx'> vortex_down(struct net_device *dev, int final_down)</div><div class='ctx'> {</div><div class='ctx'> 	struct vortex_private *vp = netdev_priv(dev);</div><div class='ctx'> 	void __iomem *ioaddr = vp-&gt;ioaddr;</div><div class='ctx'> </div><div class='del'>-	netif_stop_queue (dev);</div><div class='add'>+	netdev_reset_queue(dev);</div><div class='add'>+	netif_stop_queue(dev);</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;vp-&gt;rx_oom_timer);</div><div class='del'>-	del_timer_sync(&amp;vp-&gt;timer);</div><div class='add'>+	timer_delete_sync(&amp;vp-&gt;timer);</div><div class='ctx'> </div><div class='ctx'> 	/* Turn off statistics ASAP.  We update dev-&gt;stats below. */</div><div class='ctx'> 	iowrite16(StatsDisable, ioaddr + EL3_CMD);</div><div class='hunk'>@@ -2762,8 +2754,8 @@ vortex_close(struct net_device *dev)</div><div class='ctx'> 	if (vp-&gt;full_bus_master_rx) { /* Free Boomerang bus master Rx buffers. */</div><div class='ctx'> 		for (i = 0; i &lt; RX_RING_SIZE; i++)</div><div class='ctx'> 			if (vp-&gt;rx_skbuff[i]) {</div><div class='del'>-				pci_unmap_single(	VORTEX_PCI(vp), le32_to_cpu(vp-&gt;rx_ring[i].addr),</div><div class='del'>-									PKT_BUF_SZ, PCI_DMA_FROMDEVICE);</div><div class='add'>+				dma_unmap_single(vp-&gt;gendev, le32_to_cpu(vp-&gt;rx_ring[i].addr),</div><div class='add'>+									PKT_BUF_SZ, DMA_FROM_DEVICE);</div><div class='ctx'> 				dev_kfree_skb(vp-&gt;rx_skbuff[i]);</div><div class='ctx'> 				vp-&gt;rx_skbuff[i] = NULL;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -2776,12 +2768,12 @@ vortex_close(struct net_device *dev)</div><div class='ctx'> 				int k;</div><div class='ctx'> </div><div class='ctx'> 				for (k=0; k&lt;=skb_shinfo(skb)-&gt;nr_frags; k++)</div><div class='del'>-						pci_unmap_single(VORTEX_PCI(vp),</div><div class='add'>+						dma_unmap_single(vp-&gt;gendev,</div><div class='ctx'> 										 le32_to_cpu(vp-&gt;tx_ring[i].frag[k].addr),</div><div class='ctx'> 										 le32_to_cpu(vp-&gt;tx_ring[i].frag[k].length)&amp;0xFFF,</div><div class='del'>-										 PCI_DMA_TODEVICE);</div><div class='add'>+										 DMA_TO_DEVICE);</div><div class='ctx'> #else</div><div class='del'>-				pci_unmap_single(VORTEX_PCI(vp), le32_to_cpu(vp-&gt;tx_ring[i].addr), skb-&gt;len, PCI_DMA_TODEVICE);</div><div class='add'>+				dma_unmap_single(vp-&gt;gendev, le32_to_cpu(vp-&gt;tx_ring[i].addr), skb-&gt;len, DMA_TO_DEVICE);</div><div class='ctx'> #endif</div><div class='ctx'> 				dev_kfree_skb(skb);</div><div class='ctx'> 				vp-&gt;tx_skbuff[i] = NULL;</div><div class='hunk'>@@ -2796,7 +2788,7 @@ static void</div><div class='ctx'> dump_tx_ring(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	if (vortex_debug &gt; 0) {</div><div class='del'>-	struct vortex_private *vp = netdev_priv(dev);</div><div class='add'>+		struct vortex_private *vp = netdev_priv(dev);</div><div class='ctx'> 		void __iomem *ioaddr = vp-&gt;ioaddr;</div><div class='ctx'> </div><div class='ctx'> 		if (vp-&gt;full_bus_master_tx) {</div><div class='hunk'>@@ -2893,18 +2885,22 @@ static int vortex_nway_reset(struct net_device *dev)</div><div class='ctx'> 	return mii_nway_restart(&amp;vp-&gt;mii);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int vortex_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)</div><div class='add'>+static int vortex_get_link_ksettings(struct net_device *dev,</div><div class='add'>+				     struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct vortex_private *vp = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	return mii_ethtool_gset(&amp;vp-&gt;mii, cmd);</div><div class='add'>+	mii_ethtool_get_link_ksettings(&amp;vp-&gt;mii, cmd);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int vortex_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)</div><div class='add'>+static int vortex_set_link_ksettings(struct net_device *dev,</div><div class='add'>+				     const struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct vortex_private *vp = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	return mii_ethtool_sset(&amp;vp-&gt;mii, cmd);</div><div class='add'>+	return mii_ethtool_set_link_ksettings(&amp;vp-&gt;mii, cmd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u32 vortex_get_msglevel(struct net_device *dev)</div><div class='hunk'>@@ -2963,13 +2959,13 @@ static void vortex_get_drvinfo(struct net_device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct vortex_private *vp = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	strlcpy(info-&gt;driver, DRV_NAME, sizeof(info-&gt;driver));</div><div class='add'>+	strscpy(info-&gt;driver, DRV_NAME, sizeof(info-&gt;driver));</div><div class='ctx'> 	if (VORTEX_PCI(vp)) {</div><div class='del'>-		strlcpy(info-&gt;bus_info, pci_name(VORTEX_PCI(vp)),</div><div class='add'>+		strscpy(info-&gt;bus_info, pci_name(VORTEX_PCI(vp)),</div><div class='ctx'> 			sizeof(info-&gt;bus_info));</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (VORTEX_EISA(vp))</div><div class='del'>-			strlcpy(info-&gt;bus_info, dev_name(vp-&gt;gendev),</div><div class='add'>+			strscpy(info-&gt;bus_info, dev_name(vp-&gt;gendev),</div><div class='ctx'> 				sizeof(info-&gt;bus_info));</div><div class='ctx'> 		else</div><div class='ctx'> 			snprintf(info-&gt;bus_info, sizeof(info-&gt;bus_info),</div><div class='hunk'>@@ -3017,13 +3013,13 @@ static const struct ethtool_ops vortex_ethtool_ops = {</div><div class='ctx'> 	.set_msglevel           = vortex_set_msglevel,</div><div class='ctx'> 	.get_ethtool_stats      = vortex_get_ethtool_stats,</div><div class='ctx'> 	.get_sset_count		= vortex_get_sset_count,</div><div class='del'>-	.get_settings           = vortex_get_settings,</div><div class='del'>-	.set_settings           = vortex_set_settings,</div><div class='ctx'> 	.get_link               = ethtool_op_get_link,</div><div class='ctx'> 	.nway_reset             = vortex_nway_reset,</div><div class='ctx'> 	.get_wol                = vortex_get_wol,</div><div class='ctx'> 	.set_wol                = vortex_set_wol,</div><div class='ctx'> 	.get_ts_info		= ethtool_op_get_ts_info,</div><div class='add'>+	.get_link_ksettings     = vortex_get_link_ksettings,</div><div class='add'>+	.set_link_ksettings     = vortex_set_link_ksettings,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_PCI</div><div class='hunk'>@@ -3073,7 +3069,7 @@ static void set_rx_mode(struct net_device *dev)</div><div class='ctx'> 	iowrite16(new_mode, ioaddr + EL3_CMD);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)</div><div class='add'>+#if IS_ENABLED(CONFIG_VLAN_8021Q)</div><div class='ctx'> /* Setup the card so that it can receive frames with an 802.1q VLAN tag.</div><div class='ctx'>    Note that this must be done after each RxReset due to some backwards</div><div class='ctx'>    compatibility logic in the Cyclone and Tornado ASICs */</div><div class='hunk'>@@ -3285,11 +3281,10 @@ static void vortex_remove_one(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> 	pci_iounmap(pdev, vp-&gt;ioaddr);</div><div class='ctx'> </div><div class='del'>-	pci_free_consistent(pdev,</div><div class='del'>-						sizeof(struct boom_rx_desc) * RX_RING_SIZE</div><div class='del'>-							+ sizeof(struct boom_tx_desc) * TX_RING_SIZE,</div><div class='del'>-						vp-&gt;rx_ring,</div><div class='del'>-						vp-&gt;rx_ring_dma);</div><div class='add'>+	dma_free_coherent(&amp;pdev-&gt;dev,</div><div class='add'>+			sizeof(struct boom_rx_desc) * RX_RING_SIZE +</div><div class='add'>+			sizeof(struct boom_tx_desc) * TX_RING_SIZE,</div><div class='add'>+			vp-&gt;rx_ring, vp-&gt;rx_ring_dma);</div><div class='ctx'> </div><div class='ctx'> 	pci_release_regions(pdev);</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/3com/Kconfig b/drivers/net/ethernet/3com/Kconfig<br/>index 5b7658bcf020..1fbab79e2be4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/3com/Kconfig?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/3com/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/3com/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/3com/Kconfig</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> #</div><div class='ctx'> # 3Com Ethernet device configuration</div><div class='ctx'> #</div><div class='hunk'>@@ -6,7 +7,7 @@ config NET_VENDOR_3COM</div><div class='ctx'> 	bool "3Com devices"</div><div class='ctx'> 	default y</div><div class='ctx'> 	depends on ISA || EISA || PCI || PCMCIA</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  If you have a network (Ethernet) card belonging to this class, say Y.</div><div class='ctx'> </div><div class='ctx'> 	  Note that the answer to this question doesn't directly affect the</div><div class='hunk'>@@ -19,7 +20,7 @@ if NET_VENDOR_3COM</div><div class='ctx'> config EL3</div><div class='ctx'> 	tristate "3c509/3c579 \"EtherLink III\" support"</div><div class='ctx'> 	depends on (ISA || EISA)</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  If you have a network (Ethernet) card belonging to the 3Com</div><div class='ctx'> 	  EtherLinkIII series, say Y here.</div><div class='ctx'> </div><div class='hunk'>@@ -32,8 +33,9 @@ config EL3</div><div class='ctx'> </div><div class='ctx'> config 3C515</div><div class='ctx'> 	tristate "3c515 ISA \"Fast EtherLink\""</div><div class='del'>-	depends on ISA &amp;&amp; ISA_DMA_API</div><div class='del'>-	---help---</div><div class='add'>+	depends on ISA &amp;&amp; ISA_DMA_API &amp;&amp; !PPC32</div><div class='add'>+	select NETDEV_LEGACY_INIT</div><div class='add'>+	help</div><div class='ctx'> 	  If you have a 3Com ISA EtherLink XL "Corkscrew" 3c515 Fast Ethernet</div><div class='ctx'> 	  network card, say Y here.</div><div class='ctx'> </div><div class='hunk'>@@ -42,8 +44,8 @@ config 3C515</div><div class='ctx'> </div><div class='ctx'> config PCMCIA_3C574</div><div class='ctx'> 	tristate "3Com 3c574 PCMCIA support"</div><div class='del'>-	depends on PCMCIA</div><div class='del'>-	---help---</div><div class='add'>+	depends on PCMCIA &amp;&amp; HAS_IOPORT</div><div class='add'>+	help</div><div class='ctx'> 	  Say Y here if you intend to attach a 3Com 3c574 or compatible PCMCIA</div><div class='ctx'> 	  (PC-card) Fast Ethernet card to your computer.</div><div class='ctx'> </div><div class='hunk'>@@ -52,8 +54,8 @@ config PCMCIA_3C574</div><div class='ctx'> </div><div class='ctx'> config PCMCIA_3C589</div><div class='ctx'> 	tristate "3Com 3c589 PCMCIA support"</div><div class='del'>-	depends on PCMCIA</div><div class='del'>-	---help---</div><div class='add'>+	depends on PCMCIA &amp;&amp; HAS_IOPORT</div><div class='add'>+	help</div><div class='ctx'> 	  Say Y here if you intend to attach a 3Com 3c589 or compatible PCMCIA</div><div class='ctx'> 	  (PC-card) Ethernet card to your computer.</div><div class='ctx'> </div><div class='hunk'>@@ -64,7 +66,7 @@ config VORTEX</div><div class='ctx'> 	tristate "3c590/3c900 series (592/595/597) \"Vortex/Boomerang\" support"</div><div class='ctx'> 	depends on (PCI || EISA) &amp;&amp; HAS_IOPORT_MAP</div><div class='ctx'> 	select MII</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  This option enables driver support for a large number of 10Mbps and</div><div class='ctx'> 	  10/100Mbps EISA, PCI and Cardbus 3Com network cards:</div><div class='ctx'> </div><div class='hunk'>@@ -75,8 +77,9 @@ config VORTEX</div><div class='ctx'> 	  "Hurricane" (3c555/3cSOHO)                           PCI</div><div class='ctx'> </div><div class='ctx'> 	  If you have such a card, say Y here.  More specific information is in</div><div class='del'>-	  &lt;file:Documentation/networking/vortex.txt&gt; and in the comments at</div><div class='del'>-	  the beginning of &lt;file:drivers/net/ethernet/3com/3c59x.c&gt;.</div><div class='add'>+	  &lt;file:Documentation/networking/device_drivers/ethernet/3com/vortex.rst&gt;</div><div class='add'>+	  and in the comments at the beginning of</div><div class='add'>+	  &lt;file:drivers/net/ethernet/3com/3c59x.c&gt;.</div><div class='ctx'> </div><div class='ctx'> 	  To compile this support as a module, choose M here.</div><div class='ctx'> </div><div class='hunk'>@@ -84,7 +87,7 @@ config TYPHOON</div><div class='ctx'> 	tristate "3cr990 series \"Typhoon\" support"</div><div class='ctx'> 	depends on PCI</div><div class='ctx'> 	select CRC32</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  This option enables driver support for the 3cr990 series of cards:</div><div class='ctx'> </div><div class='ctx'> 	  3C990-TX, 3CR990-TX-95, 3CR990-TX-97, 3CR990-FX-95, 3CR990-FX-97,</div><div class='head'>diff --git a/drivers/net/ethernet/3com/Makefile b/drivers/net/ethernet/3com/Makefile<br/>index 74046afab993..f8b73babc510 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/3com/Makefile?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/3com/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/3com/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/3com/Makefile</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> #</div><div class='ctx'> # Makefile for the 3Com Ethernet device drivers</div><div class='ctx'> #</div><div class='head'>diff --git a/drivers/net/ethernet/3com/typhoon.c b/drivers/net/ethernet/3com/typhoon.c<br/>index 8f8418d2ac4a..aaaff3ba43ef 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/3com/typhoon.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/3com/typhoon.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/3com/typhoon.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/3com/typhoon.c</a></div><div class='hunk'>@@ -119,7 +119,7 @@ static const int multicast_filter_limit = 32;</div><div class='ctx'> #include &lt;linux/bitops.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> #include &lt;linux/in6.h&gt;</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> #include &lt;linux/firmware.h&gt;</div><div class='hunk'>@@ -127,7 +127,6 @@ static const int multicast_filter_limit = 32;</div><div class='ctx'> #include "typhoon.h"</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("David Dillow &lt;dave@thedillows.org&gt;");</div><div class='del'>-MODULE_VERSION("1.0");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_FIRMWARE(FIRMWARE_NAME);</div><div class='ctx'> MODULE_DESCRIPTION("3Com Typhoon Family (3C990, 3CR990, and variants)");</div><div class='hunk'>@@ -139,11 +138,6 @@ MODULE_PARM_DESC(use_mmio, "Use MMIO (1) or PIO(0) to access the NIC. "</div><div class='ctx'> module_param(rx_copybreak, int, 0);</div><div class='ctx'> module_param(use_mmio, int, 0);</div><div class='ctx'> </div><div class='del'>-#if defined(NETIF_F_TSO) &amp;&amp; MAX_SKB_FRAGS &gt; 32</div><div class='del'>-#warning Typhoon only supports 32 entries in its SG list for TSO, disabling TSO</div><div class='del'>-#undef NETIF_F_TSO</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> #if TXLO_ENTRIES &lt;= (2 * MAX_SKB_FRAGS)</div><div class='ctx'> #error TX ring too small!</div><div class='ctx'> #endif</div><div class='hunk'>@@ -283,7 +277,6 @@ struct typhoon {</div><div class='ctx'> 	spinlock_t		command_lock	____cacheline_aligned;</div><div class='ctx'> 	struct basic_ring	cmdRing;</div><div class='ctx'> 	struct basic_ring	respRing;</div><div class='del'>-	struct net_device_stats	stats;</div><div class='ctx'> 	struct net_device_stats	stats_saved;</div><div class='ctx'> 	struct typhoon_shared *	shared;</div><div class='ctx'> 	dma_addr_t		shared_dma;</div><div class='hunk'>@@ -312,7 +305,7 @@ enum state_values {</div><div class='ctx'>  * cannot pass a read, so this forces current writes to post.</div><div class='ctx'>  */</div><div class='ctx'> #define typhoon_post_pci_writes(x) \</div><div class='del'>-	do { if(likely(use_mmio)) ioread32(x+TYPHOON_REG_HEARTBEAT); } while(0)</div><div class='add'>+	do { if (likely(use_mmio)) ioread32(x+TYPHOON_REG_HEARTBEAT); } while (0)</div><div class='ctx'> </div><div class='ctx'> /* We'll wait up to six seconds for a reset, and half a second normally.</div><div class='ctx'>  */</div><div class='hunk'>@@ -382,7 +375,7 @@ typhoon_reset(void __iomem *ioaddr, int wait_type)</div><div class='ctx'> 	int i, err = 0;</div><div class='ctx'> 	int timeout;</div><div class='ctx'> </div><div class='del'>-	if(wait_type == WaitNoSleep)</div><div class='add'>+	if (wait_type == WaitNoSleep)</div><div class='ctx'> 		timeout = TYPHOON_RESET_TIMEOUT_NOSLEEP;</div><div class='ctx'> 	else</div><div class='ctx'> 		timeout = TYPHOON_RESET_TIMEOUT_SLEEP;</div><div class='hunk'>@@ -395,13 +388,13 @@ typhoon_reset(void __iomem *ioaddr, int wait_type)</div><div class='ctx'> 	udelay(1);</div><div class='ctx'> 	iowrite32(TYPHOON_RESET_NONE, ioaddr + TYPHOON_REG_SOFT_RESET);</div><div class='ctx'> </div><div class='del'>-	if(wait_type != NoWait) {</div><div class='del'>-		for(i = 0; i &lt; timeout; i++) {</div><div class='del'>-			if(ioread32(ioaddr + TYPHOON_REG_STATUS) ==</div><div class='add'>+	if (wait_type != NoWait) {</div><div class='add'>+		for (i = 0; i &lt; timeout; i++) {</div><div class='add'>+			if (ioread32(ioaddr + TYPHOON_REG_STATUS) ==</div><div class='ctx'> 			   TYPHOON_STATUS_WAITING_FOR_HOST)</div><div class='ctx'> 				goto out;</div><div class='ctx'> </div><div class='del'>-			if(wait_type == WaitSleep)</div><div class='add'>+			if (wait_type == WaitSleep)</div><div class='ctx'> 				schedule_timeout_uninterruptible(1);</div><div class='ctx'> 			else</div><div class='ctx'> 				udelay(TYPHOON_UDELAY);</div><div class='hunk'>@@ -424,7 +417,7 @@ out:</div><div class='ctx'> 	 * which should be enough (I've see it work well at 100us, but still</div><div class='ctx'> 	 * saw occasional problems.)</div><div class='ctx'> 	 */</div><div class='del'>-	if(wait_type == WaitSleep)</div><div class='add'>+	if (wait_type == WaitSleep)</div><div class='ctx'> 		msleep(5);</div><div class='ctx'> 	else</div><div class='ctx'> 		udelay(500);</div><div class='hunk'>@@ -436,8 +429,8 @@ typhoon_wait_status(void __iomem *ioaddr, u32 wait_value)</div><div class='ctx'> {</div><div class='ctx'> 	int i, err = 0;</div><div class='ctx'> </div><div class='del'>-	for(i = 0; i &lt; TYPHOON_WAIT_TIMEOUT; i++) {</div><div class='del'>-		if(ioread32(ioaddr + TYPHOON_REG_STATUS) == wait_value)</div><div class='add'>+	for (i = 0; i &lt; TYPHOON_WAIT_TIMEOUT; i++) {</div><div class='add'>+		if (ioread32(ioaddr + TYPHOON_REG_STATUS) == wait_value)</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		udelay(TYPHOON_UDELAY);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -451,7 +444,7 @@ out:</div><div class='ctx'> static inline void</div><div class='ctx'> typhoon_media_status(struct net_device *dev, struct resp_desc *resp)</div><div class='ctx'> {</div><div class='del'>-	if(resp-&gt;parm1 &amp; TYPHOON_MEDIA_STAT_NO_LINK)</div><div class='add'>+	if (resp-&gt;parm1 &amp; TYPHOON_MEDIA_STAT_NO_LINK)</div><div class='ctx'> 		netif_carrier_off(dev);</div><div class='ctx'> 	else</div><div class='ctx'> 		netif_carrier_on(dev);</div><div class='hunk'>@@ -467,7 +460,7 @@ typhoon_hello(struct typhoon *tp)</div><div class='ctx'> 	 * card in a long while. If the lock is held, then we're in the</div><div class='ctx'> 	 * process of issuing a command, so we don't need to respond.</div><div class='ctx'> 	 */</div><div class='del'>-	if(spin_trylock(&amp;tp-&gt;command_lock)) {</div><div class='add'>+	if (spin_trylock(&amp;tp-&gt;command_lock)) {</div><div class='ctx'> 		cmd = (struct cmd_desc *)(ring-&gt;ringBase + ring-&gt;lastWrite);</div><div class='ctx'> 		typhoon_inc_cmd_index(&amp;ring-&gt;lastWrite, 1);</div><div class='ctx'> </div><div class='hunk'>@@ -491,32 +484,32 @@ typhoon_process_response(struct typhoon *tp, int resp_size,</div><div class='ctx'> </div><div class='ctx'> 	cleared = le32_to_cpu(indexes-&gt;respCleared);</div><div class='ctx'> 	ready = le32_to_cpu(indexes-&gt;respReady);</div><div class='del'>-	while(cleared != ready) {</div><div class='add'>+	while (cleared != ready) {</div><div class='ctx'> 		resp = (struct resp_desc *)(base + cleared);</div><div class='ctx'> 		count = resp-&gt;numDesc + 1;</div><div class='del'>-		if(resp_save &amp;&amp; resp-&gt;seqNo) {</div><div class='del'>-			if(count &gt; resp_size) {</div><div class='add'>+		if (resp_save &amp;&amp; resp-&gt;seqNo) {</div><div class='add'>+			if (count &gt; resp_size) {</div><div class='ctx'> 				resp_save-&gt;flags = TYPHOON_RESP_ERROR;</div><div class='ctx'> 				goto cleanup;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			wrap_len = 0;</div><div class='ctx'> 			len = count * sizeof(*resp);</div><div class='del'>-			if(unlikely(cleared + len &gt; RESPONSE_RING_SIZE)) {</div><div class='add'>+			if (unlikely(cleared + len &gt; RESPONSE_RING_SIZE)) {</div><div class='ctx'> 				wrap_len = cleared + len - RESPONSE_RING_SIZE;</div><div class='ctx'> 				len = RESPONSE_RING_SIZE - cleared;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			memcpy(resp_save, resp, len);</div><div class='del'>-			if(unlikely(wrap_len)) {</div><div class='add'>+			if (unlikely(wrap_len)) {</div><div class='ctx'> 				resp_save += len / sizeof(*resp);</div><div class='ctx'> 				memcpy(resp_save, base, wrap_len);</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='ctx'> 			resp_save = NULL;</div><div class='del'>-		} else if(resp-&gt;cmd == TYPHOON_CMD_READ_MEDIA_STATUS) {</div><div class='add'>+		} else if (resp-&gt;cmd == TYPHOON_CMD_READ_MEDIA_STATUS) {</div><div class='ctx'> 			typhoon_media_status(tp-&gt;dev, resp);</div><div class='del'>-		} else if(resp-&gt;cmd == TYPHOON_CMD_HELLO_RESP) {</div><div class='add'>+		} else if (resp-&gt;cmd == TYPHOON_CMD_HELLO_RESP) {</div><div class='ctx'> 			typhoon_hello(tp);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			netdev_err(tp-&gt;dev,</div><div class='hunk'>@@ -590,19 +583,19 @@ typhoon_issue_command(struct typhoon *tp, int num_cmd, struct cmd_desc *cmd,</div><div class='ctx'> 	freeCmd = typhoon_num_free_cmd(tp);</div><div class='ctx'> 	freeResp = typhoon_num_free_resp(tp);</div><div class='ctx'> </div><div class='del'>-	if(freeCmd &lt; num_cmd || freeResp &lt; num_resp) {</div><div class='add'>+	if (freeCmd &lt; num_cmd || freeResp &lt; num_resp) {</div><div class='ctx'> 		netdev_err(tp-&gt;dev, "no descs for cmd, had (needed) %d (%d) cmd, %d (%d) resp\n",</div><div class='ctx'> 			   freeCmd, num_cmd, freeResp, num_resp);</div><div class='ctx'> 		err = -ENOMEM;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if(cmd-&gt;flags &amp; TYPHOON_CMD_RESPOND) {</div><div class='add'>+	if (cmd-&gt;flags &amp; TYPHOON_CMD_RESPOND) {</div><div class='ctx'> 		/* If we're expecting a response, but the caller hasn't given</div><div class='ctx'> 		 * us a place to put it, we'll provide one.</div><div class='ctx'> 		 */</div><div class='ctx'> 		tp-&gt;awaiting_resp = 1;</div><div class='del'>-		if(resp == NULL) {</div><div class='add'>+		if (resp == NULL) {</div><div class='ctx'> 			resp = &amp;local_resp;</div><div class='ctx'> 			num_resp = 1;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -610,13 +603,13 @@ typhoon_issue_command(struct typhoon *tp, int num_cmd, struct cmd_desc *cmd,</div><div class='ctx'> </div><div class='ctx'> 	wrap_len = 0;</div><div class='ctx'> 	len = num_cmd * sizeof(*cmd);</div><div class='del'>-	if(unlikely(ring-&gt;lastWrite + len &gt; COMMAND_RING_SIZE)) {</div><div class='add'>+	if (unlikely(ring-&gt;lastWrite + len &gt; COMMAND_RING_SIZE)) {</div><div class='ctx'> 		wrap_len = ring-&gt;lastWrite + len - COMMAND_RING_SIZE;</div><div class='ctx'> 		len = COMMAND_RING_SIZE - ring-&gt;lastWrite;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	memcpy(ring-&gt;ringBase + ring-&gt;lastWrite, cmd, len);</div><div class='del'>-	if(unlikely(wrap_len)) {</div><div class='add'>+	if (unlikely(wrap_len)) {</div><div class='ctx'> 		struct cmd_desc *wrap_ptr = cmd;</div><div class='ctx'> 		wrap_ptr += len / sizeof(*cmd);</div><div class='ctx'> 		memcpy(ring-&gt;ringBase, wrap_ptr, wrap_len);</div><div class='hunk'>@@ -630,7 +623,7 @@ typhoon_issue_command(struct typhoon *tp, int num_cmd, struct cmd_desc *cmd,</div><div class='ctx'> 	iowrite32(ring-&gt;lastWrite, tp-&gt;ioaddr + TYPHOON_REG_CMD_READY);</div><div class='ctx'> 	typhoon_post_pci_writes(tp-&gt;ioaddr);</div><div class='ctx'> </div><div class='del'>-	if((cmd-&gt;flags &amp; TYPHOON_CMD_RESPOND) == 0)</div><div class='add'>+	if ((cmd-&gt;flags &amp; TYPHOON_CMD_RESPOND) == 0)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	/* Ugh. We'll be here about 8ms, spinning our thumbs, unable to</div><div class='hunk'>@@ -650,14 +643,14 @@ typhoon_issue_command(struct typhoon *tp, int num_cmd, struct cmd_desc *cmd,</div><div class='ctx'> 	 * wait here.</div><div class='ctx'> 	 */</div><div class='ctx'> 	got_resp = 0;</div><div class='del'>-	for(i = 0; i &lt; TYPHOON_WAIT_TIMEOUT &amp;&amp; !got_resp; i++) {</div><div class='del'>-		if(indexes-&gt;respCleared != indexes-&gt;respReady)</div><div class='add'>+	for (i = 0; i &lt; TYPHOON_WAIT_TIMEOUT &amp;&amp; !got_resp; i++) {</div><div class='add'>+		if (indexes-&gt;respCleared != indexes-&gt;respReady)</div><div class='ctx'> 			got_resp = typhoon_process_response(tp, num_resp,</div><div class='ctx'> 								resp);</div><div class='ctx'> 		udelay(TYPHOON_UDELAY);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if(!got_resp) {</div><div class='add'>+	if (!got_resp) {</div><div class='ctx'> 		err = -ETIMEDOUT;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -665,11 +658,11 @@ typhoon_issue_command(struct typhoon *tp, int num_cmd, struct cmd_desc *cmd,</div><div class='ctx'> 	/* Collect the error response even if we don't care about the</div><div class='ctx'> 	 * rest of the response</div><div class='ctx'> 	 */</div><div class='del'>-	if(resp-&gt;flags &amp; TYPHOON_RESP_ERROR)</div><div class='add'>+	if (resp-&gt;flags &amp; TYPHOON_RESP_ERROR)</div><div class='ctx'> 		err = -EIO;</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	if(tp-&gt;awaiting_resp) {</div><div class='add'>+	if (tp-&gt;awaiting_resp) {</div><div class='ctx'> 		tp-&gt;awaiting_resp = 0;</div><div class='ctx'> 		smp_wmb();</div><div class='ctx'> </div><div class='hunk'>@@ -680,7 +673,7 @@ out:</div><div class='ctx'> 		 * time. So, check for it, and interrupt ourselves if this</div><div class='ctx'> 		 * is the case.</div><div class='ctx'> 		 */</div><div class='del'>-		if(indexes-&gt;respCleared != indexes-&gt;respReady)</div><div class='add'>+		if (indexes-&gt;respCleared != indexes-&gt;respReady)</div><div class='ctx'> 			iowrite32(1, tp-&gt;ioaddr + TYPHOON_REG_SELF_INTERRUPT);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -750,7 +743,7 @@ typhoon_start_tx(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	 * between marking the queue awake and updating the cleared index.</div><div class='ctx'> 	 * Just loop and it will appear. This comes from the acenic driver.</div><div class='ctx'> 	 */</div><div class='del'>-	while(unlikely(typhoon_num_free_tx(txRing) &lt; (numDesc + 2)))</div><div class='add'>+	while (unlikely(typhoon_num_free_tx(txRing) &lt; (numDesc + 2)))</div><div class='ctx'> 		smp_rmb();</div><div class='ctx'> </div><div class='ctx'> 	first_txd = (struct tx_desc *) (txRing-&gt;ringBase + txRing-&gt;lastWrite);</div><div class='hunk'>@@ -762,7 +755,7 @@ typhoon_start_tx(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	first_txd-&gt;tx_addr = (u64)((unsigned long) skb);</div><div class='ctx'> 	first_txd-&gt;processFlags = 0;</div><div class='ctx'> </div><div class='del'>-	if(skb-&gt;ip_summed == CHECKSUM_PARTIAL) {</div><div class='add'>+	if (skb-&gt;ip_summed == CHECKSUM_PARTIAL) {</div><div class='ctx'> 		/* The 3XP will figure out if this is UDP/TCP */</div><div class='ctx'> 		first_txd-&gt;processFlags |= TYPHOON_TX_PF_TCP_CHKSUM;</div><div class='ctx'> 		first_txd-&gt;processFlags |= TYPHOON_TX_PF_UDP_CHKSUM;</div><div class='hunk'>@@ -790,9 +783,9 @@ typhoon_start_tx(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	/* No need to worry about padding packet -- the firmware pads</div><div class='ctx'> 	 * it with zeros to ETH_ZLEN for us.</div><div class='ctx'> 	 */</div><div class='del'>-	if(skb_shinfo(skb)-&gt;nr_frags == 0) {</div><div class='del'>-		skb_dma = pci_map_single(tp-&gt;tx_pdev, skb-&gt;data, skb-&gt;len,</div><div class='del'>-				       PCI_DMA_TODEVICE);</div><div class='add'>+	if (skb_shinfo(skb)-&gt;nr_frags == 0) {</div><div class='add'>+		skb_dma = dma_map_single(&amp;tp-&gt;tx_pdev-&gt;dev, skb-&gt;data,</div><div class='add'>+					 skb-&gt;len, DMA_TO_DEVICE);</div><div class='ctx'> 		txd-&gt;flags = TYPHOON_FRAG_DESC | TYPHOON_DESC_VALID;</div><div class='ctx'> 		txd-&gt;len = cpu_to_le16(skb-&gt;len);</div><div class='ctx'> 		txd-&gt;frag.addr = cpu_to_le32(skb_dma);</div><div class='hunk'>@@ -802,8 +795,8 @@ typhoon_start_tx(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 		int i, len;</div><div class='ctx'> </div><div class='ctx'> 		len = skb_headlen(skb);</div><div class='del'>-		skb_dma = pci_map_single(tp-&gt;tx_pdev, skb-&gt;data, len,</div><div class='del'>-				         PCI_DMA_TODEVICE);</div><div class='add'>+		skb_dma = dma_map_single(&amp;tp-&gt;tx_pdev-&gt;dev, skb-&gt;data, len,</div><div class='add'>+					 DMA_TO_DEVICE);</div><div class='ctx'> 		txd-&gt;flags = TYPHOON_FRAG_DESC | TYPHOON_DESC_VALID;</div><div class='ctx'> 		txd-&gt;len = cpu_to_le16(len);</div><div class='ctx'> 		txd-&gt;frag.addr = cpu_to_le32(skb_dma);</div><div class='hunk'>@@ -820,8 +813,8 @@ typhoon_start_tx(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 			len = skb_frag_size(frag);</div><div class='ctx'> 			frag_addr = skb_frag_address(frag);</div><div class='del'>-			skb_dma = pci_map_single(tp-&gt;tx_pdev, frag_addr, len,</div><div class='del'>-					 PCI_DMA_TODEVICE);</div><div class='add'>+			skb_dma = dma_map_single(&amp;tp-&gt;tx_pdev-&gt;dev, frag_addr,</div><div class='add'>+						 len, DMA_TO_DEVICE);</div><div class='ctx'> 			txd-&gt;flags = TYPHOON_FRAG_DESC | TYPHOON_DESC_VALID;</div><div class='ctx'> 			txd-&gt;len = cpu_to_le16(len);</div><div class='ctx'> 			txd-&gt;frag.addr = cpu_to_le32(skb_dma);</div><div class='hunk'>@@ -842,14 +835,14 @@ typhoon_start_tx(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	 */</div><div class='ctx'> 	numDesc = MAX_SKB_FRAGS + TSO_NUM_DESCRIPTORS + 1;</div><div class='ctx'> </div><div class='del'>-	if(typhoon_num_free_tx(txRing) &lt; (numDesc + 2)) {</div><div class='add'>+	if (typhoon_num_free_tx(txRing) &lt; (numDesc + 2)) {</div><div class='ctx'> 		netif_stop_queue(dev);</div><div class='ctx'> </div><div class='ctx'> 		/* A Tx complete IRQ could have gotten between, making</div><div class='ctx'> 		 * the ring free again. Only need to recheck here, since</div><div class='ctx'> 		 * Tx is serialized.</div><div class='ctx'> 		 */</div><div class='del'>-		if(typhoon_num_free_tx(txRing) &gt;= (numDesc + 2))</div><div class='add'>+		if (typhoon_num_free_tx(txRing) &gt;= (numDesc + 2))</div><div class='ctx'> 			netif_wake_queue(dev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -865,7 +858,7 @@ typhoon_set_rx_mode(struct net_device *dev)</div><div class='ctx'> 	__le16 filter;</div><div class='ctx'> </div><div class='ctx'> 	filter = TYPHOON_RX_FILTER_DIRECTED | TYPHOON_RX_FILTER_BROADCAST;</div><div class='del'>-	if(dev-&gt;flags &amp; IFF_PROMISC) {</div><div class='add'>+	if (dev-&gt;flags &amp; IFF_PROMISC) {</div><div class='ctx'> 		filter |= TYPHOON_RX_FILTER_PROMISCOUS;</div><div class='ctx'> 	} else if ((netdev_mc_count(dev) &gt; multicast_filter_limit) ||</div><div class='ctx'> 		  (dev-&gt;flags &amp; IFF_ALLMULTI)) {</div><div class='hunk'>@@ -898,7 +891,7 @@ typhoon_set_rx_mode(struct net_device *dev)</div><div class='ctx'> static int</div><div class='ctx'> typhoon_do_get_stats(struct typhoon *tp)</div><div class='ctx'> {</div><div class='del'>-	struct net_device_stats *stats = &amp;tp-&gt;stats;</div><div class='add'>+	struct net_device_stats *stats = &amp;tp-&gt;dev-&gt;stats;</div><div class='ctx'> 	struct net_device_stats *saved = &amp;tp-&gt;stats_saved;</div><div class='ctx'> 	struct cmd_desc xp_cmd;</div><div class='ctx'> 	struct resp_desc xp_resp[7];</div><div class='hunk'>@@ -907,7 +900,7 @@ typhoon_do_get_stats(struct typhoon *tp)</div><div class='ctx'> </div><div class='ctx'> 	INIT_COMMAND_WITH_RESPONSE(&amp;xp_cmd, TYPHOON_CMD_READ_STATS);</div><div class='ctx'> 	err = typhoon_issue_command(tp, 1, &amp;xp_cmd, 7, xp_resp);</div><div class='del'>-	if(err &lt; 0)</div><div class='add'>+	if (err &lt; 0)</div><div class='ctx'> 		return err;</div><div class='ctx'> </div><div class='ctx'> 	/* 3Com's Linux driver uses txMultipleCollisions as it's</div><div class='hunk'>@@ -951,14 +944,14 @@ static struct net_device_stats *</div><div class='ctx'> typhoon_get_stats(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct typhoon *tp = netdev_priv(dev);</div><div class='del'>-	struct net_device_stats *stats = &amp;tp-&gt;stats;</div><div class='add'>+	struct net_device_stats *stats = &amp;tp-&gt;dev-&gt;stats;</div><div class='ctx'> 	struct net_device_stats *saved = &amp;tp-&gt;stats_saved;</div><div class='ctx'> </div><div class='ctx'> 	smp_rmb();</div><div class='del'>-	if(tp-&gt;card_state == Sleeping)</div><div class='add'>+	if (tp-&gt;card_state == Sleeping)</div><div class='ctx'> 		return saved;</div><div class='ctx'> </div><div class='del'>-	if(typhoon_do_get_stats(tp) &lt; 0) {</div><div class='add'>+	if (typhoon_do_get_stats(tp) &lt; 0) {</div><div class='ctx'> 		netdev_err(dev, "error getting stats\n");</div><div class='ctx'> 		return saved;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -975,13 +968,13 @@ typhoon_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)</div><div class='ctx'> 	struct resp_desc xp_resp[3];</div><div class='ctx'> </div><div class='ctx'> 	smp_rmb();</div><div class='del'>-	if(tp-&gt;card_state == Sleeping) {</div><div class='del'>-		strlcpy(info-&gt;fw_version, "Sleep image",</div><div class='add'>+	if (tp-&gt;card_state == Sleeping) {</div><div class='add'>+		strscpy(info-&gt;fw_version, "Sleep image",</div><div class='ctx'> 			sizeof(info-&gt;fw_version));</div><div class='ctx'> 	} else {</div><div class='ctx'> 		INIT_COMMAND_WITH_RESPONSE(&amp;xp_cmd, TYPHOON_CMD_READ_VERSIONS);</div><div class='del'>-		if(typhoon_issue_command(tp, 1, &amp;xp_cmd, 3, xp_resp) &lt; 0) {</div><div class='del'>-			strlcpy(info-&gt;fw_version, "Unknown runtime",</div><div class='add'>+		if (typhoon_issue_command(tp, 1, &amp;xp_cmd, 3, xp_resp) &lt; 0) {</div><div class='add'>+			strscpy(info-&gt;fw_version, "Unknown runtime",</div><div class='ctx'> 				sizeof(info-&gt;fw_version));</div><div class='ctx'> 		} else {</div><div class='ctx'> 			u32 sleep_ver = le32_to_cpu(xp_resp[0].parm2);</div><div class='hunk'>@@ -991,33 +984,35 @@ typhoon_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	strlcpy(info-&gt;driver, KBUILD_MODNAME, sizeof(info-&gt;driver));</div><div class='del'>-	strlcpy(info-&gt;bus_info, pci_name(pci_dev), sizeof(info-&gt;bus_info));</div><div class='add'>+	strscpy(info-&gt;driver, KBUILD_MODNAME, sizeof(info-&gt;driver));</div><div class='add'>+	strscpy(info-&gt;bus_info, pci_name(pci_dev), sizeof(info-&gt;bus_info));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='del'>-typhoon_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)</div><div class='add'>+typhoon_get_link_ksettings(struct net_device *dev,</div><div class='add'>+			   struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct typhoon *tp = netdev_priv(dev);</div><div class='add'>+	u32 supported, advertising = 0;</div><div class='ctx'> </div><div class='del'>-	cmd-&gt;supported = SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |</div><div class='add'>+	supported = SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |</div><div class='ctx'> 				SUPPORTED_Autoneg;</div><div class='ctx'> </div><div class='ctx'> 	switch (tp-&gt;xcvr_select) {</div><div class='ctx'> 	case TYPHOON_XCVR_10HALF:</div><div class='del'>-		cmd-&gt;advertising = ADVERTISED_10baseT_Half;</div><div class='add'>+		advertising = ADVERTISED_10baseT_Half;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TYPHOON_XCVR_10FULL:</div><div class='del'>-		cmd-&gt;advertising = ADVERTISED_10baseT_Full;</div><div class='add'>+		advertising = ADVERTISED_10baseT_Full;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TYPHOON_XCVR_100HALF:</div><div class='del'>-		cmd-&gt;advertising = ADVERTISED_100baseT_Half;</div><div class='add'>+		advertising = ADVERTISED_100baseT_Half;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TYPHOON_XCVR_100FULL:</div><div class='del'>-		cmd-&gt;advertising = ADVERTISED_100baseT_Full;</div><div class='add'>+		advertising = ADVERTISED_100baseT_Full;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case TYPHOON_XCVR_AUTONEG:</div><div class='del'>-		cmd-&gt;advertising = ADVERTISED_10baseT_Half |</div><div class='add'>+		advertising = ADVERTISED_10baseT_Half |</div><div class='ctx'> 					    ADVERTISED_10baseT_Full |</div><div class='ctx'> 					    ADVERTISED_100baseT_Half |</div><div class='ctx'> 					    ADVERTISED_100baseT_Full |</div><div class='hunk'>@@ -1025,55 +1020,58 @@ typhoon_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if(tp-&gt;capabilities &amp; TYPHOON_FIBER) {</div><div class='del'>-		cmd-&gt;supported |= SUPPORTED_FIBRE;</div><div class='del'>-		cmd-&gt;advertising |= ADVERTISED_FIBRE;</div><div class='del'>-		cmd-&gt;port = PORT_FIBRE;</div><div class='add'>+	if (tp-&gt;capabilities &amp; TYPHOON_FIBER) {</div><div class='add'>+		supported |= SUPPORTED_FIBRE;</div><div class='add'>+		advertising |= ADVERTISED_FIBRE;</div><div class='add'>+		cmd-&gt;base.port = PORT_FIBRE;</div><div class='ctx'> 	} else {</div><div class='del'>-		cmd-&gt;supported |= SUPPORTED_10baseT_Half |</div><div class='add'>+		supported |= SUPPORTED_10baseT_Half |</div><div class='ctx'> 		    			SUPPORTED_10baseT_Full |</div><div class='ctx'> 					SUPPORTED_TP;</div><div class='del'>-		cmd-&gt;advertising |= ADVERTISED_TP;</div><div class='del'>-		cmd-&gt;port = PORT_TP;</div><div class='add'>+		advertising |= ADVERTISED_TP;</div><div class='add'>+		cmd-&gt;base.port = PORT_TP;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* need to get stats to make these link speed/duplex valid */</div><div class='ctx'> 	typhoon_do_get_stats(tp);</div><div class='del'>-	ethtool_cmd_speed_set(cmd, tp-&gt;speed);</div><div class='del'>-	cmd-&gt;duplex = tp-&gt;duplex;</div><div class='del'>-	cmd-&gt;phy_address = 0;</div><div class='del'>-	cmd-&gt;transceiver = XCVR_INTERNAL;</div><div class='del'>-	if(tp-&gt;xcvr_select == TYPHOON_XCVR_AUTONEG)</div><div class='del'>-		cmd-&gt;autoneg = AUTONEG_ENABLE;</div><div class='add'>+	cmd-&gt;base.speed = tp-&gt;speed;</div><div class='add'>+	cmd-&gt;base.duplex = tp-&gt;duplex;</div><div class='add'>+	cmd-&gt;base.phy_address = 0;</div><div class='add'>+	if (tp-&gt;xcvr_select == TYPHOON_XCVR_AUTONEG)</div><div class='add'>+		cmd-&gt;base.autoneg = AUTONEG_ENABLE;</div><div class='ctx'> 	else</div><div class='del'>-		cmd-&gt;autoneg = AUTONEG_DISABLE;</div><div class='del'>-	cmd-&gt;maxtxpkt = 1;</div><div class='del'>-	cmd-&gt;maxrxpkt = 1;</div><div class='add'>+		cmd-&gt;base.autoneg = AUTONEG_DISABLE;</div><div class='add'>+</div><div class='add'>+	ethtool_convert_legacy_u32_to_link_mode(cmd-&gt;link_modes.supported,</div><div class='add'>+						supported);</div><div class='add'>+	ethtool_convert_legacy_u32_to_link_mode(cmd-&gt;link_modes.advertising,</div><div class='add'>+						advertising);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='del'>-typhoon_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)</div><div class='add'>+typhoon_set_link_ksettings(struct net_device *dev,</div><div class='add'>+			   const struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct typhoon *tp = netdev_priv(dev);</div><div class='del'>-	u32 speed = ethtool_cmd_speed(cmd);</div><div class='add'>+	u32 speed = cmd-&gt;base.speed;</div><div class='ctx'> 	struct cmd_desc xp_cmd;</div><div class='ctx'> 	__le16 xcvr;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	err = -EINVAL;</div><div class='del'>-	if (cmd-&gt;autoneg == AUTONEG_ENABLE) {</div><div class='add'>+	if (cmd-&gt;base.autoneg == AUTONEG_ENABLE) {</div><div class='ctx'> 		xcvr = TYPHOON_XCVR_AUTONEG;</div><div class='ctx'> 	} else {</div><div class='del'>-		if (cmd-&gt;duplex == DUPLEX_HALF) {</div><div class='add'>+		if (cmd-&gt;base.duplex == DUPLEX_HALF) {</div><div class='ctx'> 			if (speed == SPEED_10)</div><div class='ctx'> 				xcvr = TYPHOON_XCVR_10HALF;</div><div class='ctx'> 			else if (speed == SPEED_100)</div><div class='ctx'> 				xcvr = TYPHOON_XCVR_100HALF;</div><div class='ctx'> 			else</div><div class='ctx'> 				goto out;</div><div class='del'>-		} else if (cmd-&gt;duplex == DUPLEX_FULL) {</div><div class='add'>+		} else if (cmd-&gt;base.duplex == DUPLEX_FULL) {</div><div class='ctx'> 			if (speed == SPEED_10)</div><div class='ctx'> 				xcvr = TYPHOON_XCVR_10FULL;</div><div class='ctx'> 			else if (speed == SPEED_100)</div><div class='hunk'>@@ -1087,16 +1085,16 @@ typhoon_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)</div><div class='ctx'> 	INIT_COMMAND_NO_RESPONSE(&amp;xp_cmd, TYPHOON_CMD_XCVR_SELECT);</div><div class='ctx'> 	xp_cmd.parm1 = xcvr;</div><div class='ctx'> 	err = typhoon_issue_command(tp, 1, &amp;xp_cmd, 0, NULL);</div><div class='del'>-	if(err &lt; 0)</div><div class='add'>+	if (err &lt; 0)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='ctx'> 	tp-&gt;xcvr_select = xcvr;</div><div class='del'>-	if(cmd-&gt;autoneg == AUTONEG_ENABLE) {</div><div class='add'>+	if (cmd-&gt;base.autoneg == AUTONEG_ENABLE) {</div><div class='ctx'> 		tp-&gt;speed = 0xff;	/* invalid */</div><div class='ctx'> 		tp-&gt;duplex = 0xff;	/* invalid */</div><div class='ctx'> 	} else {</div><div class='ctx'> 		tp-&gt;speed = speed;</div><div class='del'>-		tp-&gt;duplex = cmd-&gt;duplex;</div><div class='add'>+		tp-&gt;duplex = cmd-&gt;base.duplex;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='hunk'>@@ -1110,9 +1108,9 @@ typhoon_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)</div><div class='ctx'> </div><div class='ctx'> 	wol-&gt;supported = WAKE_PHY | WAKE_MAGIC;</div><div class='ctx'> 	wol-&gt;wolopts = 0;</div><div class='del'>-	if(tp-&gt;wol_events &amp; TYPHOON_WAKE_LINK_EVENT)</div><div class='add'>+	if (tp-&gt;wol_events &amp; TYPHOON_WAKE_LINK_EVENT)</div><div class='ctx'> 		wol-&gt;wolopts |= WAKE_PHY;</div><div class='del'>-	if(tp-&gt;wol_events &amp; TYPHOON_WAKE_MAGIC_PKT)</div><div class='add'>+	if (tp-&gt;wol_events &amp; TYPHOON_WAKE_MAGIC_PKT)</div><div class='ctx'> 		wol-&gt;wolopts |= WAKE_MAGIC;</div><div class='ctx'> 	memset(&amp;wol-&gt;sopass, 0, sizeof(wol-&gt;sopass));</div><div class='ctx'> }</div><div class='hunk'>@@ -1122,20 +1120,22 @@ typhoon_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)</div><div class='ctx'> {</div><div class='ctx'> 	struct typhoon *tp = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	if(wol-&gt;wolopts &amp; ~(WAKE_PHY | WAKE_MAGIC))</div><div class='add'>+	if (wol-&gt;wolopts &amp; ~(WAKE_PHY | WAKE_MAGIC))</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	tp-&gt;wol_events = 0;</div><div class='del'>-	if(wol-&gt;wolopts &amp; WAKE_PHY)</div><div class='add'>+	if (wol-&gt;wolopts &amp; WAKE_PHY)</div><div class='ctx'> 		tp-&gt;wol_events |= TYPHOON_WAKE_LINK_EVENT;</div><div class='del'>-	if(wol-&gt;wolopts &amp; WAKE_MAGIC)</div><div class='add'>+	if (wol-&gt;wolopts &amp; WAKE_MAGIC)</div><div class='ctx'> 		tp-&gt;wol_events |= TYPHOON_WAKE_MAGIC_PKT;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='del'>-typhoon_get_ringparam(struct net_device *dev, struct ethtool_ringparam *ering)</div><div class='add'>+typhoon_get_ringparam(struct net_device *dev, struct ethtool_ringparam *ering,</div><div class='add'>+		      struct kernel_ethtool_ringparam *kernel_ering,</div><div class='add'>+		      struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	ering-&gt;rx_max_pending = RXENT_ENTRIES;</div><div class='ctx'> 	ering-&gt;tx_max_pending = TXLO_ENTRIES - 1;</div><div class='hunk'>@@ -1145,13 +1145,13 @@ typhoon_get_ringparam(struct net_device *dev, struct ethtool_ringparam *ering)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops typhoon_ethtool_ops = {</div><div class='del'>-	.get_settings		= typhoon_get_settings,</div><div class='del'>-	.set_settings		= typhoon_set_settings,</div><div class='ctx'> 	.get_drvinfo		= typhoon_get_drvinfo,</div><div class='ctx'> 	.get_wol		= typhoon_get_wol,</div><div class='ctx'> 	.set_wol		= typhoon_set_wol,</div><div class='ctx'> 	.get_link		= ethtool_op_get_link,</div><div class='ctx'> 	.get_ringparam		= typhoon_get_ringparam,</div><div class='add'>+	.get_link_ksettings	= typhoon_get_link_ksettings,</div><div class='add'>+	.set_link_ksettings	= typhoon_set_link_ksettings,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -1159,8 +1159,8 @@ typhoon_wait_interrupt(void __iomem *ioaddr)</div><div class='ctx'> {</div><div class='ctx'> 	int i, err = 0;</div><div class='ctx'> </div><div class='del'>-	for(i = 0; i &lt; TYPHOON_WAIT_TIMEOUT; i++) {</div><div class='del'>-		if(ioread32(ioaddr + TYPHOON_REG_INTR_STATUS) &amp;</div><div class='add'>+	for (i = 0; i &lt; TYPHOON_WAIT_TIMEOUT; i++) {</div><div class='add'>+		if (ioread32(ioaddr + TYPHOON_REG_INTR_STATUS) &amp;</div><div class='ctx'> 		   TYPHOON_INTR_BOOTCMD)</div><div class='ctx'> 			goto out;</div><div class='ctx'> 		udelay(TYPHOON_UDELAY);</div><div class='hunk'>@@ -1346,13 +1346,13 @@ typhoon_download_firmware(struct typhoon *tp)</div><div class='ctx'> 	image_data = typhoon_fw-&gt;data;</div><div class='ctx'> 	fHdr = (struct typhoon_file_header *) image_data;</div><div class='ctx'> </div><div class='del'>-	/* Cannot just map the firmware image using pci_map_single() as</div><div class='add'>+	/* Cannot just map the firmware image using dma_map_single() as</div><div class='ctx'> 	 * the firmware is vmalloc()'d and may not be physically contiguous,</div><div class='del'>-	 * so we allocate some consistent memory to copy the sections into.</div><div class='add'>+	 * so we allocate some coherent memory to copy the sections into.</div><div class='ctx'> 	 */</div><div class='ctx'> 	err = -ENOMEM;</div><div class='del'>-	dpage = pci_alloc_consistent(pdev, PAGE_SIZE, &amp;dpage_dma);</div><div class='del'>-	if(!dpage) {</div><div class='add'>+	dpage = dma_alloc_coherent(&amp;pdev-&gt;dev, PAGE_SIZE, &amp;dpage_dma, GFP_ATOMIC);</div><div class='add'>+	if (!dpage) {</div><div class='ctx'> 		netdev_err(tp-&gt;dev, "no DMA mem for firmware\n");</div><div class='ctx'> 		goto err_out;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1365,7 +1365,7 @@ typhoon_download_firmware(struct typhoon *tp)</div><div class='ctx'> 	       ioaddr + TYPHOON_REG_INTR_MASK);</div><div class='ctx'> </div><div class='ctx'> 	err = -ETIMEDOUT;</div><div class='del'>-	if(typhoon_wait_status(ioaddr, TYPHOON_STATUS_WAITING_FOR_HOST) &lt; 0) {</div><div class='add'>+	if (typhoon_wait_status(ioaddr, TYPHOON_STATUS_WAITING_FOR_HOST) &lt; 0) {</div><div class='ctx'> 		netdev_err(tp-&gt;dev, "card ready timeout\n");</div><div class='ctx'> 		goto err_out_irq;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1394,16 +1394,16 @@ typhoon_download_firmware(struct typhoon *tp)</div><div class='ctx'> 	 * last write to the command register to post, so</div><div class='ctx'> 	 * we don't need a typhoon_post_pci_writes() after it.</div><div class='ctx'> 	 */</div><div class='del'>-	for(i = 0; i &lt; numSections; i++) {</div><div class='add'>+	for (i = 0; i &lt; numSections; i++) {</div><div class='ctx'> 		sHdr = (struct typhoon_section_header *) image_data;</div><div class='ctx'> 		image_data += sizeof(struct typhoon_section_header);</div><div class='ctx'> 		load_addr = le32_to_cpu(sHdr-&gt;startAddr);</div><div class='ctx'> 		section_len = le32_to_cpu(sHdr-&gt;len);</div><div class='ctx'> </div><div class='del'>-		while(section_len) {</div><div class='add'>+		while (section_len) {</div><div class='ctx'> 			len = min_t(u32, section_len, PAGE_SIZE);</div><div class='ctx'> </div><div class='del'>-			if(typhoon_wait_interrupt(ioaddr) &lt; 0 ||</div><div class='add'>+			if (typhoon_wait_interrupt(ioaddr) &lt; 0 ||</div><div class='ctx'> 			   ioread32(ioaddr + TYPHOON_REG_STATUS) !=</div><div class='ctx'> 			   TYPHOON_STATUS_WAITING_FOR_SEGMENT) {</div><div class='ctx'> 				netdev_err(tp-&gt;dev, "segment ready timeout\n");</div><div class='hunk'>@@ -1416,8 +1416,7 @@ typhoon_download_firmware(struct typhoon *tp)</div><div class='ctx'> 			 * the checksum, we can do this once, at the end.</div><div class='ctx'> 			 */</div><div class='ctx'> 			csum = csum_fold(csum_partial_copy_nocheck(image_data,</div><div class='del'>-								   dpage, len,</div><div class='del'>-								   0));</div><div class='add'>+								   dpage, len));</div><div class='ctx'> </div><div class='ctx'> 			iowrite32(len, ioaddr + TYPHOON_REG_BOOT_LENGTH);</div><div class='ctx'> 			iowrite32(le16_to_cpu((__force __le16)csum),</div><div class='hunk'>@@ -1436,7 +1435,7 @@ typhoon_download_firmware(struct typhoon *tp)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if(typhoon_wait_interrupt(ioaddr) &lt; 0 ||</div><div class='add'>+	if (typhoon_wait_interrupt(ioaddr) &lt; 0 ||</div><div class='ctx'> 	   ioread32(ioaddr + TYPHOON_REG_STATUS) !=</div><div class='ctx'> 	   TYPHOON_STATUS_WAITING_FOR_SEGMENT) {</div><div class='ctx'> 		netdev_err(tp-&gt;dev, "final segment ready timeout\n");</div><div class='hunk'>@@ -1445,7 +1444,7 @@ typhoon_download_firmware(struct typhoon *tp)</div><div class='ctx'> </div><div class='ctx'> 	iowrite32(TYPHOON_BOOTCMD_DNLD_COMPLETE, ioaddr + TYPHOON_REG_COMMAND);</div><div class='ctx'> </div><div class='del'>-	if(typhoon_wait_status(ioaddr, TYPHOON_STATUS_WAITING_FOR_BOOT) &lt; 0) {</div><div class='add'>+	if (typhoon_wait_status(ioaddr, TYPHOON_STATUS_WAITING_FOR_BOOT) &lt; 0) {</div><div class='ctx'> 		netdev_err(tp-&gt;dev, "boot ready timeout, status 0x%0x\n",</div><div class='ctx'> 			   ioread32(ioaddr + TYPHOON_REG_STATUS));</div><div class='ctx'> 		goto err_out_irq;</div><div class='hunk'>@@ -1457,7 +1456,7 @@ err_out_irq:</div><div class='ctx'> 	iowrite32(irqMasked, ioaddr + TYPHOON_REG_INTR_MASK);</div><div class='ctx'> 	iowrite32(irqEnabled, ioaddr + TYPHOON_REG_INTR_ENABLE);</div><div class='ctx'> </div><div class='del'>-	pci_free_consistent(pdev, PAGE_SIZE, dpage, dpage_dma);</div><div class='add'>+	dma_free_coherent(&amp;pdev-&gt;dev, PAGE_SIZE, dpage, dpage_dma);</div><div class='ctx'> </div><div class='ctx'> err_out:</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -1468,7 +1467,7 @@ typhoon_boot_3XP(struct typhoon *tp, u32 initial_status)</div><div class='ctx'> {</div><div class='ctx'> 	void __iomem *ioaddr = tp-&gt;ioaddr;</div><div class='ctx'> </div><div class='del'>-	if(typhoon_wait_status(ioaddr, initial_status) &lt; 0) {</div><div class='add'>+	if (typhoon_wait_status(ioaddr, initial_status) &lt; 0) {</div><div class='ctx'> 		netdev_err(tp-&gt;dev, "boot ready timeout\n");</div><div class='ctx'> 		goto out_timeout;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1479,7 +1478,7 @@ typhoon_boot_3XP(struct typhoon *tp, u32 initial_status)</div><div class='ctx'> 	iowrite32(TYPHOON_BOOTCMD_REG_BOOT_RECORD,</div><div class='ctx'> 				ioaddr + TYPHOON_REG_COMMAND);</div><div class='ctx'> </div><div class='del'>-	if(typhoon_wait_status(ioaddr, TYPHOON_STATUS_RUNNING) &lt; 0) {</div><div class='add'>+	if (typhoon_wait_status(ioaddr, TYPHOON_STATUS_RUNNING) &lt; 0) {</div><div class='ctx'> 		netdev_err(tp-&gt;dev, "boot finish timeout (status 0x%x)\n",</div><div class='ctx'> 			   ioread32(ioaddr + TYPHOON_REG_STATUS));</div><div class='ctx'> 		goto out_timeout;</div><div class='hunk'>@@ -1509,23 +1508,23 @@ typhoon_clean_tx(struct typhoon *tp, struct transmit_ring *txRing,</div><div class='ctx'> 	int dma_len;</div><div class='ctx'> 	int type;</div><div class='ctx'> </div><div class='del'>-	while(lastRead != le32_to_cpu(*index)) {</div><div class='add'>+	while (lastRead != le32_to_cpu(*index)) {</div><div class='ctx'> 		tx = (struct tx_desc *) (txRing-&gt;ringBase + lastRead);</div><div class='ctx'> 		type = tx-&gt;flags &amp; TYPHOON_TYPE_MASK;</div><div class='ctx'> </div><div class='del'>-		if(type == TYPHOON_TX_DESC) {</div><div class='add'>+		if (type == TYPHOON_TX_DESC) {</div><div class='ctx'> 			/* This tx_desc describes a packet.</div><div class='ctx'> 			 */</div><div class='ctx'> 			unsigned long ptr = tx-&gt;tx_addr;</div><div class='ctx'> 			struct sk_buff *skb = (struct sk_buff *) ptr;</div><div class='ctx'> 			dev_kfree_skb_irq(skb);</div><div class='del'>-		} else if(type == TYPHOON_FRAG_DESC) {</div><div class='add'>+		} else if (type == TYPHOON_FRAG_DESC) {</div><div class='ctx'> 			/* This tx_desc describes a memory mapping. Free it.</div><div class='ctx'> 			 */</div><div class='ctx'> 			skb_dma = (dma_addr_t) le32_to_cpu(tx-&gt;frag.addr);</div><div class='ctx'> 			dma_len = le16_to_cpu(tx-&gt;len);</div><div class='del'>-			pci_unmap_single(tp-&gt;pdev, skb_dma, dma_len,</div><div class='del'>-				       PCI_DMA_TODEVICE);</div><div class='add'>+			dma_unmap_single(&amp;tp-&gt;pdev-&gt;dev, skb_dma, dma_len,</div><div class='add'>+					 DMA_TO_DEVICE);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		tx-&gt;flags = 0;</div><div class='hunk'>@@ -1544,7 +1543,7 @@ typhoon_tx_complete(struct typhoon *tp, struct transmit_ring *txRing,</div><div class='ctx'> </div><div class='ctx'> 	/* This will need changing if we start to use the Hi Tx ring. */</div><div class='ctx'> 	lastRead = typhoon_clean_tx(tp, txRing, index);</div><div class='del'>-	if(netif_queue_stopped(tp-&gt;dev) &amp;&amp; typhoon_num_free(txRing-&gt;lastWrite,</div><div class='add'>+	if (netif_queue_stopped(tp-&gt;dev) &amp;&amp; typhoon_num_free(txRing-&gt;lastWrite,</div><div class='ctx'> 				lastRead, TXLO_ENTRIES) &gt; (numDesc + 2))</div><div class='ctx'> 		netif_wake_queue(tp-&gt;dev);</div><div class='ctx'> </div><div class='hunk'>@@ -1560,7 +1559,7 @@ typhoon_recycle_rx_skb(struct typhoon *tp, u32 idx)</div><div class='ctx'> 	struct basic_ring *ring = &amp;tp-&gt;rxBuffRing;</div><div class='ctx'> 	struct rx_free *r;</div><div class='ctx'> </div><div class='del'>-	if((ring-&gt;lastWrite + sizeof(*r)) % (RXFREE_ENTRIES * sizeof(*r)) ==</div><div class='add'>+	if ((ring-&gt;lastWrite + sizeof(*r)) % (RXFREE_ENTRIES * sizeof(*r)) ==</div><div class='ctx'> 				le32_to_cpu(indexes-&gt;rxBuffCleared)) {</div><div class='ctx'> 		/* no room in ring, just drop the skb</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -1591,12 +1590,12 @@ typhoon_alloc_rx_skb(struct typhoon *tp, u32 idx)</div><div class='ctx'> </div><div class='ctx'> 	rxb-&gt;skb = NULL;</div><div class='ctx'> </div><div class='del'>-	if((ring-&gt;lastWrite + sizeof(*r)) % (RXFREE_ENTRIES * sizeof(*r)) ==</div><div class='add'>+	if ((ring-&gt;lastWrite + sizeof(*r)) % (RXFREE_ENTRIES * sizeof(*r)) ==</div><div class='ctx'> 				le32_to_cpu(indexes-&gt;rxBuffCleared))</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	skb = netdev_alloc_skb(tp-&gt;dev, PKT_BUF_SZ);</div><div class='del'>-	if(!skb)</div><div class='add'>+	if (!skb)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> #if 0</div><div class='hunk'>@@ -1606,8 +1605,8 @@ typhoon_alloc_rx_skb(struct typhoon *tp, u32 idx)</div><div class='ctx'> 	skb_reserve(skb, 2);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	dma_addr = pci_map_single(tp-&gt;pdev, skb-&gt;data,</div><div class='del'>-				  PKT_BUF_SZ, PCI_DMA_FROMDEVICE);</div><div class='add'>+	dma_addr = dma_map_single(&amp;tp-&gt;pdev-&gt;dev, skb-&gt;data, PKT_BUF_SZ,</div><div class='add'>+				  DMA_FROM_DEVICE);</div><div class='ctx'> </div><div class='ctx'> 	/* Since no card does 64 bit DAC, the high bits will never</div><div class='ctx'> 	 * change from zero.</div><div class='hunk'>@@ -1643,7 +1642,7 @@ typhoon_rx(struct typhoon *tp, struct basic_ring *rxRing, volatile __le32 * read</div><div class='ctx'> 	received = 0;</div><div class='ctx'> 	local_ready = le32_to_cpu(*ready);</div><div class='ctx'> 	rxaddr = le32_to_cpu(*cleared);</div><div class='del'>-	while(rxaddr != local_ready &amp;&amp; budget &gt; 0) {</div><div class='add'>+	while (rxaddr != local_ready &amp;&amp; budget &gt; 0) {</div><div class='ctx'> 		rx = (struct rx_desc *) (rxRing-&gt;ringBase + rxaddr);</div><div class='ctx'> 		idx = rx-&gt;addr;</div><div class='ctx'> 		rxb = &amp;tp-&gt;rxbuffers[idx];</div><div class='hunk'>@@ -1652,36 +1651,35 @@ typhoon_rx(struct typhoon *tp, struct basic_ring *rxRing, volatile __le32 * read</div><div class='ctx'> </div><div class='ctx'> 		typhoon_inc_rx_index(&amp;rxaddr, 1);</div><div class='ctx'> </div><div class='del'>-		if(rx-&gt;flags &amp; TYPHOON_RX_ERROR) {</div><div class='add'>+		if (rx-&gt;flags &amp; TYPHOON_RX_ERROR) {</div><div class='ctx'> 			typhoon_recycle_rx_skb(tp, idx);</div><div class='ctx'> 			continue;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		pkt_len = le16_to_cpu(rx-&gt;frameLen);</div><div class='ctx'> </div><div class='del'>-		if(pkt_len &lt; rx_copybreak &amp;&amp;</div><div class='add'>+		if (pkt_len &lt; rx_copybreak &amp;&amp;</div><div class='ctx'> 		   (new_skb = netdev_alloc_skb(tp-&gt;dev, pkt_len + 2)) != NULL) {</div><div class='ctx'> 			skb_reserve(new_skb, 2);</div><div class='del'>-			pci_dma_sync_single_for_cpu(tp-&gt;pdev, dma_addr,</div><div class='del'>-						    PKT_BUF_SZ,</div><div class='del'>-						    PCI_DMA_FROMDEVICE);</div><div class='add'>+			dma_sync_single_for_cpu(&amp;tp-&gt;pdev-&gt;dev, dma_addr,</div><div class='add'>+						PKT_BUF_SZ, DMA_FROM_DEVICE);</div><div class='ctx'> 			skb_copy_to_linear_data(new_skb, skb-&gt;data, pkt_len);</div><div class='del'>-			pci_dma_sync_single_for_device(tp-&gt;pdev, dma_addr,</div><div class='del'>-						       PKT_BUF_SZ,</div><div class='del'>-						       PCI_DMA_FROMDEVICE);</div><div class='add'>+			dma_sync_single_for_device(&amp;tp-&gt;pdev-&gt;dev, dma_addr,</div><div class='add'>+						   PKT_BUF_SZ,</div><div class='add'>+						   DMA_FROM_DEVICE);</div><div class='ctx'> 			skb_put(new_skb, pkt_len);</div><div class='ctx'> 			typhoon_recycle_rx_skb(tp, idx);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			new_skb = skb;</div><div class='ctx'> 			skb_put(new_skb, pkt_len);</div><div class='del'>-			pci_unmap_single(tp-&gt;pdev, dma_addr, PKT_BUF_SZ,</div><div class='del'>-				       PCI_DMA_FROMDEVICE);</div><div class='add'>+			dma_unmap_single(&amp;tp-&gt;pdev-&gt;dev, dma_addr, PKT_BUF_SZ,</div><div class='add'>+					 DMA_FROM_DEVICE);</div><div class='ctx'> 			typhoon_alloc_rx_skb(tp, idx);</div><div class='ctx'> 		}</div><div class='ctx'> 		new_skb-&gt;protocol = eth_type_trans(new_skb, tp-&gt;dev);</div><div class='ctx'> 		csum_bits = rx-&gt;rxStatus &amp; (TYPHOON_RX_IP_CHK_GOOD |</div><div class='ctx'> 			TYPHOON_RX_UDP_CHK_GOOD | TYPHOON_RX_TCP_CHK_GOOD);</div><div class='del'>-		if(csum_bits ==</div><div class='add'>+		if (csum_bits ==</div><div class='ctx'> 		   (TYPHOON_RX_IP_CHK_GOOD | TYPHOON_RX_TCP_CHK_GOOD) ||</div><div class='ctx'> 		   csum_bits ==</div><div class='ctx'> 		   (TYPHOON_RX_IP_CHK_GOOD | TYPHOON_RX_UDP_CHK_GOOD)) {</div><div class='hunk'>@@ -1707,11 +1705,11 @@ typhoon_fill_free_ring(struct typhoon *tp)</div><div class='ctx'> {</div><div class='ctx'> 	u32 i;</div><div class='ctx'> </div><div class='del'>-	for(i = 0; i &lt; RXENT_ENTRIES; i++) {</div><div class='add'>+	for (i = 0; i &lt; RXENT_ENTRIES; i++) {</div><div class='ctx'> 		struct rxbuff_ent *rxb = &amp;tp-&gt;rxbuffers[i];</div><div class='del'>-		if(rxb-&gt;skb)</div><div class='add'>+		if (rxb-&gt;skb)</div><div class='ctx'> 			continue;</div><div class='del'>-		if(typhoon_alloc_rx_skb(tp, i) &lt; 0)</div><div class='add'>+		if (typhoon_alloc_rx_skb(tp, i) &lt; 0)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -1724,31 +1722,31 @@ typhoon_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 	int work_done;</div><div class='ctx'> </div><div class='ctx'> 	rmb();</div><div class='del'>-	if(!tp-&gt;awaiting_resp &amp;&amp; indexes-&gt;respReady != indexes-&gt;respCleared)</div><div class='add'>+	if (!tp-&gt;awaiting_resp &amp;&amp; indexes-&gt;respReady != indexes-&gt;respCleared)</div><div class='ctx'> 			typhoon_process_response(tp, 0, NULL);</div><div class='ctx'> </div><div class='del'>-	if(le32_to_cpu(indexes-&gt;txLoCleared) != tp-&gt;txLoRing.lastRead)</div><div class='add'>+	if (le32_to_cpu(indexes-&gt;txLoCleared) != tp-&gt;txLoRing.lastRead)</div><div class='ctx'> 		typhoon_tx_complete(tp, &amp;tp-&gt;txLoRing, &amp;indexes-&gt;txLoCleared);</div><div class='ctx'> </div><div class='ctx'> 	work_done = 0;</div><div class='ctx'> </div><div class='del'>-	if(indexes-&gt;rxHiCleared != indexes-&gt;rxHiReady) {</div><div class='add'>+	if (indexes-&gt;rxHiCleared != indexes-&gt;rxHiReady) {</div><div class='ctx'> 		work_done += typhoon_rx(tp, &amp;tp-&gt;rxHiRing, &amp;indexes-&gt;rxHiReady,</div><div class='ctx'> 			   		&amp;indexes-&gt;rxHiCleared, budget);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if(indexes-&gt;rxLoCleared != indexes-&gt;rxLoReady) {</div><div class='add'>+	if (indexes-&gt;rxLoCleared != indexes-&gt;rxLoReady) {</div><div class='ctx'> 		work_done += typhoon_rx(tp, &amp;tp-&gt;rxLoRing, &amp;indexes-&gt;rxLoReady,</div><div class='ctx'> 					&amp;indexes-&gt;rxLoCleared, budget - work_done);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if(le32_to_cpu(indexes-&gt;rxBuffCleared) == tp-&gt;rxBuffRing.lastWrite) {</div><div class='add'>+	if (le32_to_cpu(indexes-&gt;rxBuffCleared) == tp-&gt;rxBuffRing.lastWrite) {</div><div class='ctx'> 		/* rxBuff ring is empty, try to fill it. */</div><div class='ctx'> 		typhoon_fill_free_ring(tp);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (work_done &lt; budget) {</div><div class='del'>-		napi_complete(napi);</div><div class='add'>+		napi_complete_done(napi, work_done);</div><div class='ctx'> 		iowrite32(TYPHOON_INTR_NONE,</div><div class='ctx'> 				tp-&gt;ioaddr + TYPHOON_REG_INTR_MASK);</div><div class='ctx'> 		typhoon_post_pci_writes(tp-&gt;ioaddr);</div><div class='hunk'>@@ -1766,7 +1764,7 @@ typhoon_interrupt(int irq, void *dev_instance)</div><div class='ctx'> 	u32 intr_status;</div><div class='ctx'> </div><div class='ctx'> 	intr_status = ioread32(ioaddr + TYPHOON_REG_INTR_STATUS);</div><div class='del'>-	if(!(intr_status &amp; TYPHOON_INTR_HOST_INT))</div><div class='add'>+	if (!(intr_status &amp; TYPHOON_INTR_HOST_INT))</div><div class='ctx'> 		return IRQ_NONE;</div><div class='ctx'> </div><div class='ctx'> 	iowrite32(intr_status, ioaddr + TYPHOON_REG_INTR_STATUS);</div><div class='hunk'>@@ -1786,11 +1784,11 @@ typhoon_free_rx_rings(struct typhoon *tp)</div><div class='ctx'> {</div><div class='ctx'> 	u32 i;</div><div class='ctx'> </div><div class='del'>-	for(i = 0; i &lt; RXENT_ENTRIES; i++) {</div><div class='add'>+	for (i = 0; i &lt; RXENT_ENTRIES; i++) {</div><div class='ctx'> 		struct rxbuff_ent *rxb = &amp;tp-&gt;rxbuffers[i];</div><div class='del'>-		if(rxb-&gt;skb) {</div><div class='del'>-			pci_unmap_single(tp-&gt;pdev, rxb-&gt;dma_addr, PKT_BUF_SZ,</div><div class='del'>-				       PCI_DMA_FROMDEVICE);</div><div class='add'>+		if (rxb-&gt;skb) {</div><div class='add'>+			dma_unmap_single(&amp;tp-&gt;pdev-&gt;dev, rxb-&gt;dma_addr,</div><div class='add'>+					 PKT_BUF_SZ, DMA_FROM_DEVICE);</div><div class='ctx'> 			dev_kfree_skb(rxb-&gt;skb);</div><div class='ctx'> 			rxb-&gt;skb = NULL;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1798,9 +1796,8 @@ typhoon_free_rx_rings(struct typhoon *tp)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='del'>-typhoon_sleep(struct typhoon *tp, pci_power_t state, __le16 events)</div><div class='add'>+typhoon_sleep_early(struct typhoon *tp, __le16 events)</div><div class='ctx'> {</div><div class='del'>-	struct pci_dev *pdev = tp-&gt;pdev;</div><div class='ctx'> 	void __iomem *ioaddr = tp-&gt;ioaddr;</div><div class='ctx'> 	struct cmd_desc xp_cmd;</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -1808,7 +1805,7 @@ typhoon_sleep(struct typhoon *tp, pci_power_t state, __le16 events)</div><div class='ctx'> 	INIT_COMMAND_WITH_RESPONSE(&amp;xp_cmd, TYPHOON_CMD_ENABLE_WAKE_EVENTS);</div><div class='ctx'> 	xp_cmd.parm1 = events;</div><div class='ctx'> 	err = typhoon_issue_command(tp, 1, &amp;xp_cmd, 0, NULL);</div><div class='del'>-	if(err &lt; 0) {</div><div class='add'>+	if (err &lt; 0) {</div><div class='ctx'> 		netdev_err(tp-&gt;dev, "typhoon_sleep(): wake events cmd err %d\n",</div><div class='ctx'> 			   err);</div><div class='ctx'> 		return err;</div><div class='hunk'>@@ -1816,12 +1813,12 @@ typhoon_sleep(struct typhoon *tp, pci_power_t state, __le16 events)</div><div class='ctx'> </div><div class='ctx'> 	INIT_COMMAND_NO_RESPONSE(&amp;xp_cmd, TYPHOON_CMD_GOTO_SLEEP);</div><div class='ctx'> 	err = typhoon_issue_command(tp, 1, &amp;xp_cmd, 0, NULL);</div><div class='del'>-	if(err &lt; 0) {</div><div class='add'>+	if (err &lt; 0) {</div><div class='ctx'> 		netdev_err(tp-&gt;dev, "typhoon_sleep(): sleep cmd err %d\n", err);</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if(typhoon_wait_status(ioaddr, TYPHOON_STATUS_SLEEPING) &lt; 0)</div><div class='add'>+	if (typhoon_wait_status(ioaddr, TYPHOON_STATUS_SLEEPING) &lt; 0)</div><div class='ctx'> 		return -ETIMEDOUT;</div><div class='ctx'> </div><div class='ctx'> 	/* Since we cannot monitor the status of the link while sleeping,</div><div class='hunk'>@@ -1829,26 +1826,35 @@ typhoon_sleep(struct typhoon *tp, pci_power_t state, __le16 events)</div><div class='ctx'> 	 */</div><div class='ctx'> 	netif_carrier_off(tp-&gt;dev);</div><div class='ctx'> </div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+typhoon_sleep(struct typhoon *tp, pci_power_t state, __le16 events)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = typhoon_sleep_early(tp, events);</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='ctx'> 	pci_enable_wake(tp-&gt;pdev, state, 1);</div><div class='del'>-	pci_disable_device(pdev);</div><div class='del'>-	return pci_set_power_state(pdev, state);</div><div class='add'>+	pci_disable_device(tp-&gt;pdev);</div><div class='add'>+	return pci_set_power_state(tp-&gt;pdev, state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='ctx'> typhoon_wakeup(struct typhoon *tp, int wait_type)</div><div class='ctx'> {</div><div class='del'>-	struct pci_dev *pdev = tp-&gt;pdev;</div><div class='ctx'> 	void __iomem *ioaddr = tp-&gt;ioaddr;</div><div class='ctx'> </div><div class='del'>-	pci_set_power_state(pdev, PCI_D0);</div><div class='del'>-	pci_restore_state(pdev);</div><div class='del'>-</div><div class='ctx'> 	/* Post 2.x.x versions of the Sleep Image require a reset before</div><div class='ctx'> 	 * we can download the Runtime Image. But let's not make users of</div><div class='ctx'> 	 * the old firmware pay for the reset.</div><div class='ctx'> 	 */</div><div class='ctx'> 	iowrite32(TYPHOON_BOOTCMD_WAKEUP, ioaddr + TYPHOON_REG_COMMAND);</div><div class='del'>-	if(typhoon_wait_status(ioaddr, TYPHOON_STATUS_WAITING_FOR_HOST) &lt; 0 ||</div><div class='add'>+	if (typhoon_wait_status(ioaddr, TYPHOON_STATUS_WAITING_FOR_HOST) &lt; 0 ||</div><div class='ctx'> 			(tp-&gt;capabilities &amp; TYPHOON_WAKEUP_NEEDS_RESET))</div><div class='ctx'> 		return typhoon_reset(ioaddr, wait_type);</div><div class='ctx'> </div><div class='hunk'>@@ -1867,12 +1873,12 @@ typhoon_start_runtime(struct typhoon *tp)</div><div class='ctx'> 	typhoon_fill_free_ring(tp);</div><div class='ctx'> </div><div class='ctx'> 	err = typhoon_download_firmware(tp);</div><div class='del'>-	if(err &lt; 0) {</div><div class='add'>+	if (err &lt; 0) {</div><div class='ctx'> 		netdev_err(tp-&gt;dev, "cannot load runtime on 3XP\n");</div><div class='ctx'> 		goto error_out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if(typhoon_boot_3XP(tp, TYPHOON_STATUS_WAITING_FOR_BOOT) &lt; 0) {</div><div class='add'>+	if (typhoon_boot_3XP(tp, TYPHOON_STATUS_WAITING_FOR_BOOT) &lt; 0) {</div><div class='ctx'> 		netdev_err(tp-&gt;dev, "cannot boot 3XP\n");</div><div class='ctx'> 		err = -EIO;</div><div class='ctx'> 		goto error_out;</div><div class='hunk'>@@ -1881,14 +1887,14 @@ typhoon_start_runtime(struct typhoon *tp)</div><div class='ctx'> 	INIT_COMMAND_NO_RESPONSE(&amp;xp_cmd, TYPHOON_CMD_SET_MAX_PKT_SIZE);</div><div class='ctx'> 	xp_cmd.parm1 = cpu_to_le16(PKT_BUF_SZ);</div><div class='ctx'> 	err = typhoon_issue_command(tp, 1, &amp;xp_cmd, 0, NULL);</div><div class='del'>-	if(err &lt; 0)</div><div class='add'>+	if (err &lt; 0)</div><div class='ctx'> 		goto error_out;</div><div class='ctx'> </div><div class='ctx'> 	INIT_COMMAND_NO_RESPONSE(&amp;xp_cmd, TYPHOON_CMD_SET_MAC_ADDRESS);</div><div class='ctx'> 	xp_cmd.parm1 = cpu_to_le16(ntohs(*(__be16 *)&amp;dev-&gt;dev_addr[0]));</div><div class='ctx'> 	xp_cmd.parm2 = cpu_to_le32(ntohl(*(__be32 *)&amp;dev-&gt;dev_addr[2]));</div><div class='ctx'> 	err = typhoon_issue_command(tp, 1, &amp;xp_cmd, 0, NULL);</div><div class='del'>-	if(err &lt; 0)</div><div class='add'>+	if (err &lt; 0)</div><div class='ctx'> 		goto error_out;</div><div class='ctx'> </div><div class='ctx'> 	/* Disable IRQ coalescing -- we can reenable it when 3Com gives</div><div class='hunk'>@@ -1897,38 +1903,38 @@ typhoon_start_runtime(struct typhoon *tp)</div><div class='ctx'> 	INIT_COMMAND_WITH_RESPONSE(&amp;xp_cmd, TYPHOON_CMD_IRQ_COALESCE_CTRL);</div><div class='ctx'> 	xp_cmd.parm1 = 0;</div><div class='ctx'> 	err = typhoon_issue_command(tp, 1, &amp;xp_cmd, 0, NULL);</div><div class='del'>-	if(err &lt; 0)</div><div class='add'>+	if (err &lt; 0)</div><div class='ctx'> 		goto error_out;</div><div class='ctx'> </div><div class='ctx'> 	INIT_COMMAND_NO_RESPONSE(&amp;xp_cmd, TYPHOON_CMD_XCVR_SELECT);</div><div class='ctx'> 	xp_cmd.parm1 = tp-&gt;xcvr_select;</div><div class='ctx'> 	err = typhoon_issue_command(tp, 1, &amp;xp_cmd, 0, NULL);</div><div class='del'>-	if(err &lt; 0)</div><div class='add'>+	if (err &lt; 0)</div><div class='ctx'> 		goto error_out;</div><div class='ctx'> </div><div class='ctx'> 	INIT_COMMAND_NO_RESPONSE(&amp;xp_cmd, TYPHOON_CMD_VLAN_TYPE_WRITE);</div><div class='ctx'> 	xp_cmd.parm1 = cpu_to_le16(ETH_P_8021Q);</div><div class='ctx'> 	err = typhoon_issue_command(tp, 1, &amp;xp_cmd, 0, NULL);</div><div class='del'>-	if(err &lt; 0)</div><div class='add'>+	if (err &lt; 0)</div><div class='ctx'> 		goto error_out;</div><div class='ctx'> </div><div class='ctx'> 	INIT_COMMAND_NO_RESPONSE(&amp;xp_cmd, TYPHOON_CMD_SET_OFFLOAD_TASKS);</div><div class='ctx'> 	xp_cmd.parm2 = tp-&gt;offload;</div><div class='ctx'> 	xp_cmd.parm3 = tp-&gt;offload;</div><div class='ctx'> 	err = typhoon_issue_command(tp, 1, &amp;xp_cmd, 0, NULL);</div><div class='del'>-	if(err &lt; 0)</div><div class='add'>+	if (err &lt; 0)</div><div class='ctx'> 		goto error_out;</div><div class='ctx'> </div><div class='ctx'> 	typhoon_set_rx_mode(dev);</div><div class='ctx'> </div><div class='ctx'> 	INIT_COMMAND_NO_RESPONSE(&amp;xp_cmd, TYPHOON_CMD_TX_ENABLE);</div><div class='ctx'> 	err = typhoon_issue_command(tp, 1, &amp;xp_cmd, 0, NULL);</div><div class='del'>-	if(err &lt; 0)</div><div class='add'>+	if (err &lt; 0)</div><div class='ctx'> 		goto error_out;</div><div class='ctx'> </div><div class='ctx'> 	INIT_COMMAND_WITH_RESPONSE(&amp;xp_cmd, TYPHOON_CMD_RX_ENABLE);</div><div class='ctx'> 	err = typhoon_issue_command(tp, 1, &amp;xp_cmd, 0, NULL);</div><div class='del'>-	if(err &lt; 0)</div><div class='add'>+	if (err &lt; 0)</div><div class='ctx'> 		goto error_out;</div><div class='ctx'> </div><div class='ctx'> 	tp-&gt;card_state = Running;</div><div class='hunk'>@@ -1968,13 +1974,13 @@ typhoon_stop_runtime(struct typhoon *tp, int wait_type)</div><div class='ctx'> 	/* Wait 1/2 sec for any outstanding transmits to occur</div><div class='ctx'> 	 * We'll cleanup after the reset if this times out.</div><div class='ctx'> 	 */</div><div class='del'>-	for(i = 0; i &lt; TYPHOON_WAIT_TIMEOUT; i++) {</div><div class='del'>-		if(indexes-&gt;txLoCleared == cpu_to_le32(txLo-&gt;lastWrite))</div><div class='add'>+	for (i = 0; i &lt; TYPHOON_WAIT_TIMEOUT; i++) {</div><div class='add'>+		if (indexes-&gt;txLoCleared == cpu_to_le32(txLo-&gt;lastWrite))</div><div class='ctx'> 			break;</div><div class='ctx'> 		udelay(TYPHOON_UDELAY);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if(i == TYPHOON_WAIT_TIMEOUT)</div><div class='add'>+	if (i == TYPHOON_WAIT_TIMEOUT)</div><div class='ctx'> 		netdev_err(tp-&gt;dev, "halt timed out waiting for Tx to complete\n");</div><div class='ctx'> </div><div class='ctx'> 	INIT_COMMAND_NO_RESPONSE(&amp;xp_cmd, TYPHOON_CMD_TX_DISABLE);</div><div class='hunk'>@@ -1986,21 +1992,21 @@ typhoon_stop_runtime(struct typhoon *tp, int wait_type)</div><div class='ctx'> 	tp-&gt;card_state = Sleeping;</div><div class='ctx'> 	smp_wmb();</div><div class='ctx'> 	typhoon_do_get_stats(tp);</div><div class='del'>-	memcpy(&amp;tp-&gt;stats_saved, &amp;tp-&gt;stats, sizeof(struct net_device_stats));</div><div class='add'>+	memcpy(&amp;tp-&gt;stats_saved, &amp;tp-&gt;dev-&gt;stats, sizeof(struct net_device_stats));</div><div class='ctx'> </div><div class='ctx'> 	INIT_COMMAND_NO_RESPONSE(&amp;xp_cmd, TYPHOON_CMD_HALT);</div><div class='ctx'> 	typhoon_issue_command(tp, 1, &amp;xp_cmd, 0, NULL);</div><div class='ctx'> </div><div class='del'>-	if(typhoon_wait_status(ioaddr, TYPHOON_STATUS_HALTED) &lt; 0)</div><div class='add'>+	if (typhoon_wait_status(ioaddr, TYPHOON_STATUS_HALTED) &lt; 0)</div><div class='ctx'> 		netdev_err(tp-&gt;dev, "timed out waiting for 3XP to halt\n");</div><div class='ctx'> </div><div class='del'>-	if(typhoon_reset(ioaddr, wait_type) &lt; 0) {</div><div class='add'>+	if (typhoon_reset(ioaddr, wait_type) &lt; 0) {</div><div class='ctx'> 		netdev_err(tp-&gt;dev, "unable to reset 3XP\n");</div><div class='ctx'> 		return -ETIMEDOUT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* cleanup any outstanding Tx packets */</div><div class='del'>-	if(indexes-&gt;txLoCleared != cpu_to_le32(txLo-&gt;lastWrite)) {</div><div class='add'>+	if (indexes-&gt;txLoCleared != cpu_to_le32(txLo-&gt;lastWrite)) {</div><div class='ctx'> 		indexes-&gt;txLoCleared = cpu_to_le32(txLo-&gt;lastWrite);</div><div class='ctx'> 		typhoon_clean_tx(tp, &amp;tp-&gt;txLoRing, &amp;indexes-&gt;txLoCleared);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2009,11 +2015,11 @@ typhoon_stop_runtime(struct typhoon *tp, int wait_type)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void</div><div class='del'>-typhoon_tx_timeout(struct net_device *dev)</div><div class='add'>+typhoon_tx_timeout(struct net_device *dev, unsigned int txqueue)</div><div class='ctx'> {</div><div class='ctx'> 	struct typhoon *tp = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	if(typhoon_reset(tp-&gt;ioaddr, WaitNoSleep) &lt; 0) {</div><div class='add'>+	if (typhoon_reset(tp-&gt;ioaddr, WaitNoSleep) &lt; 0) {</div><div class='ctx'> 		netdev_warn(dev, "could not reset in tx timeout\n");</div><div class='ctx'> 		goto truly_dead;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2022,7 +2028,7 @@ typhoon_tx_timeout(struct net_device *dev)</div><div class='ctx'> 	typhoon_clean_tx(tp, &amp;tp-&gt;txLoRing, &amp;tp-&gt;indexes-&gt;txLoCleared);</div><div class='ctx'> 	typhoon_free_rx_rings(tp);</div><div class='ctx'> </div><div class='del'>-	if(typhoon_start_runtime(tp) &lt; 0) {</div><div class='add'>+	if (typhoon_start_runtime(tp) &lt; 0) {</div><div class='ctx'> 		netdev_err(dev, "could not start runtime in tx timeout\n");</div><div class='ctx'> 		goto truly_dead;</div><div class='ctx'>         }</div><div class='hunk'>@@ -2046,21 +2052,24 @@ typhoon_open(struct net_device *dev)</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='add'>+	pci_set_power_state(tp-&gt;pdev, PCI_D0);</div><div class='add'>+	pci_restore_state(tp-&gt;pdev);</div><div class='add'>+</div><div class='ctx'> 	err = typhoon_wakeup(tp, WaitSleep);</div><div class='del'>-	if(err &lt; 0) {</div><div class='add'>+	if (err &lt; 0) {</div><div class='ctx'> 		netdev_err(dev, "unable to wakeup device\n");</div><div class='ctx'> 		goto out_sleep;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	err = request_irq(dev-&gt;irq, typhoon_interrupt, IRQF_SHARED,</div><div class='ctx'> 				dev-&gt;name, dev);</div><div class='del'>-	if(err &lt; 0)</div><div class='add'>+	if (err &lt; 0)</div><div class='ctx'> 		goto out_sleep;</div><div class='ctx'> </div><div class='ctx'> 	napi_enable(&amp;tp-&gt;napi);</div><div class='ctx'> </div><div class='ctx'> 	err = typhoon_start_runtime(tp);</div><div class='del'>-	if(err &lt; 0) {</div><div class='add'>+	if (err &lt; 0) {</div><div class='ctx'> 		napi_disable(&amp;tp-&gt;napi);</div><div class='ctx'> 		goto out_irq;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2072,13 +2081,13 @@ out_irq:</div><div class='ctx'> 	free_irq(dev-&gt;irq, dev);</div><div class='ctx'> </div><div class='ctx'> out_sleep:</div><div class='del'>-	if(typhoon_boot_3XP(tp, TYPHOON_STATUS_WAITING_FOR_HOST) &lt; 0) {</div><div class='add'>+	if (typhoon_boot_3XP(tp, TYPHOON_STATUS_WAITING_FOR_HOST) &lt; 0) {</div><div class='ctx'> 		netdev_err(dev, "unable to reboot into sleep img\n");</div><div class='ctx'> 		typhoon_reset(tp-&gt;ioaddr, NoWait);</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if(typhoon_sleep(tp, PCI_D3hot, 0) &lt; 0)</div><div class='add'>+	if (typhoon_sleep(tp, PCI_D3hot, 0) &lt; 0)</div><div class='ctx'> 		netdev_err(dev, "unable to go back to sleep\n");</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='hunk'>@@ -2093,7 +2102,7 @@ typhoon_close(struct net_device *dev)</div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='ctx'> 	napi_disable(&amp;tp-&gt;napi);</div><div class='ctx'> </div><div class='del'>-	if(typhoon_stop_runtime(tp, WaitSleep) &lt; 0)</div><div class='add'>+	if (typhoon_stop_runtime(tp, WaitSleep) &lt; 0)</div><div class='ctx'> 		netdev_err(dev, "unable to stop runtime\n");</div><div class='ctx'> </div><div class='ctx'> 	/* Make sure there is no irq handler running on a different CPU. */</div><div class='hunk'>@@ -2102,33 +2111,32 @@ typhoon_close(struct net_device *dev)</div><div class='ctx'> 	typhoon_free_rx_rings(tp);</div><div class='ctx'> 	typhoon_init_rings(tp);</div><div class='ctx'> </div><div class='del'>-	if(typhoon_boot_3XP(tp, TYPHOON_STATUS_WAITING_FOR_HOST) &lt; 0)</div><div class='add'>+	if (typhoon_boot_3XP(tp, TYPHOON_STATUS_WAITING_FOR_HOST) &lt; 0)</div><div class='ctx'> 		netdev_err(dev, "unable to boot sleep image\n");</div><div class='ctx'> </div><div class='del'>-	if(typhoon_sleep(tp, PCI_D3hot, 0) &lt; 0)</div><div class='add'>+	if (typhoon_sleep(tp, PCI_D3hot, 0) &lt; 0)</div><div class='ctx'> 		netdev_err(dev, "unable to put card to sleep\n");</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PM</div><div class='del'>-static int</div><div class='del'>-typhoon_resume(struct pci_dev *pdev)</div><div class='add'>+static int __maybe_unused</div><div class='add'>+typhoon_resume(struct device *dev_d)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *dev = pci_get_drvdata(pdev);</div><div class='add'>+	struct net_device *dev = dev_get_drvdata(dev_d);</div><div class='ctx'> 	struct typhoon *tp = netdev_priv(dev);</div><div class='ctx'> </div><div class='ctx'> 	/* If we're down, resume when we are upped.</div><div class='ctx'> 	 */</div><div class='del'>-	if(!netif_running(dev))</div><div class='add'>+	if (!netif_running(dev))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	if(typhoon_wakeup(tp, WaitNoSleep) &lt; 0) {</div><div class='add'>+	if (typhoon_wakeup(tp, WaitNoSleep) &lt; 0) {</div><div class='ctx'> 		netdev_err(dev, "critical: could not wake up in resume\n");</div><div class='ctx'> 		goto reset;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if(typhoon_start_runtime(tp) &lt; 0) {</div><div class='add'>+	if (typhoon_start_runtime(tp) &lt; 0) {</div><div class='ctx'> 		netdev_err(dev, "critical: could not start runtime in resume\n");</div><div class='ctx'> 		goto reset;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2141,25 +2149,26 @@ reset:</div><div class='ctx'> 	return -EBUSY;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int</div><div class='del'>-typhoon_suspend(struct pci_dev *pdev, pm_message_t state)</div><div class='add'>+static int __maybe_unused</div><div class='add'>+typhoon_suspend(struct device *dev_d)</div><div class='ctx'> {</div><div class='add'>+	struct pci_dev *pdev = to_pci_dev(dev_d);</div><div class='ctx'> 	struct net_device *dev = pci_get_drvdata(pdev);</div><div class='ctx'> 	struct typhoon *tp = netdev_priv(dev);</div><div class='ctx'> 	struct cmd_desc xp_cmd;</div><div class='ctx'> </div><div class='ctx'> 	/* If we're down, we're already suspended.</div><div class='ctx'> 	 */</div><div class='del'>-	if(!netif_running(dev))</div><div class='add'>+	if (!netif_running(dev))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	/* TYPHOON_OFFLOAD_VLAN is always on now, so this doesn't work */</div><div class='del'>-	if(tp-&gt;wol_events &amp; TYPHOON_WAKE_MAGIC_PKT)</div><div class='add'>+	if (tp-&gt;wol_events &amp; TYPHOON_WAKE_MAGIC_PKT)</div><div class='ctx'> 		netdev_warn(dev, "cannot do WAKE_MAGIC with VLAN offloading\n");</div><div class='ctx'> </div><div class='ctx'> 	netif_device_detach(dev);</div><div class='ctx'> </div><div class='del'>-	if(typhoon_stop_runtime(tp, WaitNoSleep) &lt; 0) {</div><div class='add'>+	if (typhoon_stop_runtime(tp, WaitNoSleep) &lt; 0) {</div><div class='ctx'> 		netdev_err(dev, "unable to stop runtime\n");</div><div class='ctx'> 		goto need_resume;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2167,7 +2176,7 @@ typhoon_suspend(struct pci_dev *pdev, pm_message_t state)</div><div class='ctx'> 	typhoon_free_rx_rings(tp);</div><div class='ctx'> 	typhoon_init_rings(tp);</div><div class='ctx'> </div><div class='del'>-	if(typhoon_boot_3XP(tp, TYPHOON_STATUS_WAITING_FOR_HOST) &lt; 0) {</div><div class='add'>+	if (typhoon_boot_3XP(tp, TYPHOON_STATUS_WAITING_FOR_HOST) &lt; 0) {</div><div class='ctx'> 		netdev_err(dev, "unable to boot sleep image\n");</div><div class='ctx'> 		goto need_resume;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2175,30 +2184,31 @@ typhoon_suspend(struct pci_dev *pdev, pm_message_t state)</div><div class='ctx'> 	INIT_COMMAND_NO_RESPONSE(&amp;xp_cmd, TYPHOON_CMD_SET_MAC_ADDRESS);</div><div class='ctx'> 	xp_cmd.parm1 = cpu_to_le16(ntohs(*(__be16 *)&amp;dev-&gt;dev_addr[0]));</div><div class='ctx'> 	xp_cmd.parm2 = cpu_to_le32(ntohl(*(__be32 *)&amp;dev-&gt;dev_addr[2]));</div><div class='del'>-	if(typhoon_issue_command(tp, 1, &amp;xp_cmd, 0, NULL) &lt; 0) {</div><div class='add'>+	if (typhoon_issue_command(tp, 1, &amp;xp_cmd, 0, NULL) &lt; 0) {</div><div class='ctx'> 		netdev_err(dev, "unable to set mac address in suspend\n");</div><div class='ctx'> 		goto need_resume;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	INIT_COMMAND_NO_RESPONSE(&amp;xp_cmd, TYPHOON_CMD_SET_RX_FILTER);</div><div class='ctx'> 	xp_cmd.parm1 = TYPHOON_RX_FILTER_DIRECTED | TYPHOON_RX_FILTER_BROADCAST;</div><div class='del'>-	if(typhoon_issue_command(tp, 1, &amp;xp_cmd, 0, NULL) &lt; 0) {</div><div class='add'>+	if (typhoon_issue_command(tp, 1, &amp;xp_cmd, 0, NULL) &lt; 0) {</div><div class='ctx'> 		netdev_err(dev, "unable to set rx filter in suspend\n");</div><div class='ctx'> 		goto need_resume;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if(typhoon_sleep(tp, pci_choose_state(pdev, state), tp-&gt;wol_events) &lt; 0) {</div><div class='add'>+	if (typhoon_sleep_early(tp, tp-&gt;wol_events) &lt; 0) {</div><div class='ctx'> 		netdev_err(dev, "unable to put card to sleep\n");</div><div class='ctx'> 		goto need_resume;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	device_wakeup_enable(dev_d);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> need_resume:</div><div class='del'>-	typhoon_resume(pdev);</div><div class='add'>+	typhoon_resume(dev_d);</div><div class='ctx'> 	return -EBUSY;</div><div class='ctx'> }</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='ctx'> typhoon_test_mmio(struct pci_dev *pdev)</div><div class='hunk'>@@ -2207,10 +2217,10 @@ typhoon_test_mmio(struct pci_dev *pdev)</div><div class='ctx'> 	int mode = 0;</div><div class='ctx'> 	u32 val;</div><div class='ctx'> </div><div class='del'>-	if(!ioaddr)</div><div class='add'>+	if (!ioaddr)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	if(ioread32(ioaddr + TYPHOON_REG_STATUS) !=</div><div class='add'>+	if (ioread32(ioaddr + TYPHOON_REG_STATUS) !=</div><div class='ctx'> 				TYPHOON_STATUS_WAITING_FOR_HOST)</div><div class='ctx'> 		goto out_unmap;</div><div class='ctx'> </div><div class='hunk'>@@ -2223,12 +2233,12 @@ typhoon_test_mmio(struct pci_dev *pdev)</div><div class='ctx'> 	 * The 50usec delay is arbitrary -- it could probably be smaller.</div><div class='ctx'> 	 */</div><div class='ctx'> 	val = ioread32(ioaddr + TYPHOON_REG_INTR_STATUS);</div><div class='del'>-	if((val &amp; TYPHOON_INTR_SELF) == 0) {</div><div class='add'>+	if ((val &amp; TYPHOON_INTR_SELF) == 0) {</div><div class='ctx'> 		iowrite32(1, ioaddr + TYPHOON_REG_SELF_INTERRUPT);</div><div class='ctx'> 		ioread32(ioaddr + TYPHOON_REG_INTR_STATUS);</div><div class='ctx'> 		udelay(50);</div><div class='ctx'> 		val = ioread32(ioaddr + TYPHOON_REG_INTR_STATUS);</div><div class='del'>-		if(val &amp; TYPHOON_INTR_SELF)</div><div class='add'>+		if (val &amp; TYPHOON_INTR_SELF)</div><div class='ctx'> 			mode = 1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2241,21 +2251,39 @@ out_unmap:</div><div class='ctx'> 	pci_iounmap(pdev, ioaddr);</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='del'>-	if(!mode)</div><div class='add'>+	if (!mode)</div><div class='ctx'> 		pr_info("%s: falling back to port IO\n", pci_name(pdev));</div><div class='ctx'> 	return mode;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#if MAX_SKB_FRAGS &gt; 32</div><div class='add'>+</div><div class='add'>+#include &lt;net/vxlan.h&gt;</div><div class='add'>+</div><div class='add'>+static netdev_features_t typhoon_features_check(struct sk_buff *skb,</div><div class='add'>+						struct net_device *dev,</div><div class='add'>+						netdev_features_t features)</div><div class='add'>+{</div><div class='add'>+	if (skb_shinfo(skb)-&gt;nr_frags &gt; 32 &amp;&amp; skb_is_gso(skb))</div><div class='add'>+		features &amp;= ~NETIF_F_GSO_MASK;</div><div class='add'>+</div><div class='add'>+	features = vlan_features_check(skb, features);</div><div class='add'>+	return vxlan_features_check(skb, features);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static const struct net_device_ops typhoon_netdev_ops = {</div><div class='ctx'> 	.ndo_open		= typhoon_open,</div><div class='ctx'> 	.ndo_stop		= typhoon_close,</div><div class='add'>+#if MAX_SKB_FRAGS &gt; 32</div><div class='add'>+	.ndo_features_check	= typhoon_features_check,</div><div class='add'>+#endif</div><div class='ctx'> 	.ndo_start_xmit		= typhoon_start_tx,</div><div class='ctx'> 	.ndo_set_rx_mode	= typhoon_set_rx_mode,</div><div class='ctx'> 	.ndo_tx_timeout		= typhoon_tx_timeout,</div><div class='ctx'> 	.ndo_get_stats		= typhoon_get_stats,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> 	.ndo_set_mac_address	= eth_mac_addr,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int</div><div class='hunk'>@@ -2264,6 +2292,7 @@ typhoon_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	struct net_device *dev;</div><div class='ctx'> 	struct typhoon *tp;</div><div class='ctx'> 	int card_id = (int) ent-&gt;driver_data;</div><div class='add'>+	u8 addr[ETH_ALEN] __aligned(4);</div><div class='ctx'> 	void __iomem *ioaddr;</div><div class='ctx'> 	void *shared;</div><div class='ctx'> 	dma_addr_t shared_dma;</div><div class='hunk'>@@ -2273,7 +2302,7 @@ typhoon_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	const char *err_msg;</div><div class='ctx'> </div><div class='ctx'> 	dev = alloc_etherdev(sizeof(*tp));</div><div class='del'>-	if(dev == NULL) {</div><div class='add'>+	if (dev == NULL) {</div><div class='ctx'> 		err_msg = "unable to alloc new net device";</div><div class='ctx'> 		err = -ENOMEM;</div><div class='ctx'> 		goto error_out;</div><div class='hunk'>@@ -2281,55 +2310,55 @@ typhoon_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	SET_NETDEV_DEV(dev, &amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	err = pci_enable_device(pdev);</div><div class='del'>-	if(err &lt; 0) {</div><div class='add'>+	if (err &lt; 0) {</div><div class='ctx'> 		err_msg = "unable to enable device";</div><div class='ctx'> 		goto error_out_dev;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	err = pci_set_mwi(pdev);</div><div class='del'>-	if(err &lt; 0) {</div><div class='add'>+	if (err &lt; 0) {</div><div class='ctx'> 		err_msg = "unable to set MWI";</div><div class='ctx'> 		goto error_out_disable;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));</div><div class='del'>-	if(err &lt; 0) {</div><div class='add'>+	err = dma_set_mask(&amp;pdev-&gt;dev, DMA_BIT_MASK(32));</div><div class='add'>+	if (err &lt; 0) {</div><div class='ctx'> 		err_msg = "No usable DMA configuration";</div><div class='ctx'> 		goto error_out_mwi;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* sanity checks on IO and MMIO BARs</div><div class='ctx'> 	 */</div><div class='del'>-	if(!(pci_resource_flags(pdev, 0) &amp; IORESOURCE_IO)) {</div><div class='add'>+	if (!(pci_resource_flags(pdev, 0) &amp; IORESOURCE_IO)) {</div><div class='ctx'> 		err_msg = "region #1 not a PCI IO resource, aborting";</div><div class='ctx'> 		err = -ENODEV;</div><div class='ctx'> 		goto error_out_mwi;</div><div class='ctx'> 	}</div><div class='del'>-	if(pci_resource_len(pdev, 0) &lt; 128) {</div><div class='add'>+	if (pci_resource_len(pdev, 0) &lt; 128) {</div><div class='ctx'> 		err_msg = "Invalid PCI IO region size, aborting";</div><div class='ctx'> 		err = -ENODEV;</div><div class='ctx'> 		goto error_out_mwi;</div><div class='ctx'> 	}</div><div class='del'>-	if(!(pci_resource_flags(pdev, 1) &amp; IORESOURCE_MEM)) {</div><div class='add'>+	if (!(pci_resource_flags(pdev, 1) &amp; IORESOURCE_MEM)) {</div><div class='ctx'> 		err_msg = "region #1 not a PCI MMIO resource, aborting";</div><div class='ctx'> 		err = -ENODEV;</div><div class='ctx'> 		goto error_out_mwi;</div><div class='ctx'> 	}</div><div class='del'>-	if(pci_resource_len(pdev, 1) &lt; 128) {</div><div class='add'>+	if (pci_resource_len(pdev, 1) &lt; 128) {</div><div class='ctx'> 		err_msg = "Invalid PCI MMIO region size, aborting";</div><div class='ctx'> 		err = -ENODEV;</div><div class='ctx'> 		goto error_out_mwi;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	err = pci_request_regions(pdev, KBUILD_MODNAME);</div><div class='del'>-	if(err &lt; 0) {</div><div class='add'>+	if (err &lt; 0) {</div><div class='ctx'> 		err_msg = "could not request regions";</div><div class='ctx'> 		goto error_out_mwi;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* map our registers</div><div class='ctx'> 	 */</div><div class='del'>-	if(use_mmio != 0 &amp;&amp; use_mmio != 1)</div><div class='add'>+	if (use_mmio != 0 &amp;&amp; use_mmio != 1)</div><div class='ctx'> 		use_mmio = typhoon_test_mmio(pdev);</div><div class='ctx'> </div><div class='ctx'> 	ioaddr = pci_iomap(pdev, use_mmio, 128);</div><div class='hunk'>@@ -2341,9 +2370,9 @@ typhoon_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> </div><div class='ctx'> 	/* allocate pci dma space for rx and tx descriptor rings</div><div class='ctx'> 	 */</div><div class='del'>-	shared = pci_alloc_consistent(pdev, sizeof(struct typhoon_shared),</div><div class='del'>-				      &amp;shared_dma);</div><div class='del'>-	if(!shared) {</div><div class='add'>+	shared = dma_alloc_coherent(&amp;pdev-&gt;dev, sizeof(struct typhoon_shared),</div><div class='add'>+				    &amp;shared_dma, GFP_KERNEL);</div><div class='add'>+	if (!shared) {</div><div class='ctx'> 		err_msg = "could not allocate DMA memory";</div><div class='ctx'> 		err = -ENOMEM;</div><div class='ctx'> 		goto error_out_remap;</div><div class='hunk'>@@ -2366,9 +2395,9 @@ typhoon_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	 * 4) Get the hardware address.</div><div class='ctx'> 	 * 5) Put the card to sleep.</div><div class='ctx'> 	 */</div><div class='del'>-	if (typhoon_reset(ioaddr, WaitSleep) &lt; 0) {</div><div class='add'>+	err = typhoon_reset(ioaddr, WaitSleep);</div><div class='add'>+	if (err &lt; 0) {</div><div class='ctx'> 		err_msg = "could not reset 3XP";</div><div class='del'>-		err = -EIO;</div><div class='ctx'> 		goto error_out_dma;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2382,24 +2411,26 @@ typhoon_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	typhoon_init_interface(tp);</div><div class='ctx'> 	typhoon_init_rings(tp);</div><div class='ctx'> </div><div class='del'>-	if(typhoon_boot_3XP(tp, TYPHOON_STATUS_WAITING_FOR_HOST) &lt; 0) {</div><div class='add'>+	err = typhoon_boot_3XP(tp, TYPHOON_STATUS_WAITING_FOR_HOST);</div><div class='add'>+	if (err &lt; 0) {</div><div class='ctx'> 		err_msg = "cannot boot 3XP sleep image";</div><div class='del'>-		err = -EIO;</div><div class='ctx'> 		goto error_out_reset;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	INIT_COMMAND_WITH_RESPONSE(&amp;xp_cmd, TYPHOON_CMD_READ_MAC_ADDRESS);</div><div class='del'>-	if(typhoon_issue_command(tp, 1, &amp;xp_cmd, 1, xp_resp) &lt; 0) {</div><div class='add'>+	err = typhoon_issue_command(tp, 1, &amp;xp_cmd, 1, xp_resp);</div><div class='add'>+	if (err &lt; 0) {</div><div class='ctx'> 		err_msg = "cannot read MAC address";</div><div class='del'>-		err = -EIO;</div><div class='ctx'> 		goto error_out_reset;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	*(__be16 *)&amp;dev-&gt;dev_addr[0] = htons(le16_to_cpu(xp_resp[0].parm1));</div><div class='del'>-	*(__be32 *)&amp;dev-&gt;dev_addr[2] = htonl(le32_to_cpu(xp_resp[0].parm2));</div><div class='add'>+	*(__be16 *)&amp;addr[0] = htons(le16_to_cpu(xp_resp[0].parm1));</div><div class='add'>+	*(__be32 *)&amp;addr[2] = htonl(le32_to_cpu(xp_resp[0].parm2));</div><div class='add'>+	eth_hw_addr_set(dev, addr);</div><div class='ctx'> </div><div class='del'>-	if(!is_valid_ether_addr(dev-&gt;dev_addr)) {</div><div class='add'>+	if (!is_valid_ether_addr(dev-&gt;dev_addr)) {</div><div class='ctx'> 		err_msg = "Could not obtain valid ethernet address, aborting";</div><div class='add'>+		err = -EIO;</div><div class='ctx'> 		goto error_out_reset;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2407,7 +2438,8 @@ typhoon_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	 * later when we print out the version reported.</div><div class='ctx'> 	 */</div><div class='ctx'> 	INIT_COMMAND_WITH_RESPONSE(&amp;xp_cmd, TYPHOON_CMD_READ_VERSIONS);</div><div class='del'>-	if(typhoon_issue_command(tp, 1, &amp;xp_cmd, 3, xp_resp) &lt; 0) {</div><div class='add'>+	err = typhoon_issue_command(tp, 1, &amp;xp_cmd, 3, xp_resp);</div><div class='add'>+	if (err &lt; 0) {</div><div class='ctx'> 		err_msg = "Could not get Sleep Image version";</div><div class='ctx'> 		goto error_out_reset;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2421,18 +2453,18 @@ typhoon_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	 * seem to need a little extra help to get started. Since we don't</div><div class='ctx'> 	 * know how to nudge it along, just kick it.</div><div class='ctx'> 	 */</div><div class='del'>-	if(xp_resp[0].numDesc != 0)</div><div class='add'>+	if (xp_resp[0].numDesc != 0)</div><div class='ctx'> 		tp-&gt;capabilities |= TYPHOON_WAKEUP_NEEDS_RESET;</div><div class='ctx'> </div><div class='del'>-	if(typhoon_sleep(tp, PCI_D3hot, 0) &lt; 0) {</div><div class='add'>+	err = typhoon_sleep(tp, PCI_D3hot, 0);</div><div class='add'>+	if (err &lt; 0) {</div><div class='ctx'> 		err_msg = "cannot put adapter to sleep";</div><div class='del'>-		err = -EIO;</div><div class='ctx'> 		goto error_out_reset;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* The chip-specific entries in the device structure. */</div><div class='ctx'> 	dev-&gt;netdev_ops		= &amp;typhoon_netdev_ops;</div><div class='del'>-	netif_napi_add(dev, &amp;tp-&gt;napi, typhoon_poll, 16);</div><div class='add'>+	netif_napi_add_weight(dev, &amp;tp-&gt;napi, typhoon_poll, 16);</div><div class='ctx'> 	dev-&gt;watchdog_timeo	= TX_TIMEOUT;</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;ethtool_ops = &amp;typhoon_ethtool_ops;</div><div class='hunk'>@@ -2449,7 +2481,8 @@ typhoon_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	dev-&gt;features = dev-&gt;hw_features |</div><div class='ctx'> 		NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_RXCSUM;</div><div class='ctx'> </div><div class='del'>-	if(register_netdev(dev) &lt; 0) {</div><div class='add'>+	err = register_netdev(dev);</div><div class='add'>+	if (err &lt; 0) {</div><div class='ctx'> 		err_msg = "unable to register netdev";</div><div class='ctx'> 		goto error_out_reset;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2465,14 +2498,14 @@ typhoon_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	/* xp_resp still contains the response to the READ_VERSIONS command.</div><div class='ctx'> 	 * For debugging, let the user know what version he has.</div><div class='ctx'> 	 */</div><div class='del'>-	if(xp_resp[0].numDesc == 0) {</div><div class='add'>+	if (xp_resp[0].numDesc == 0) {</div><div class='ctx'> 		/* This is the Typhoon 1.0 type Sleep Image, last 16 bits</div><div class='ctx'> 		 * of version is Month/Day of build.</div><div class='ctx'> 		 */</div><div class='ctx'> 		u16 monthday = le32_to_cpu(xp_resp[0].parm2) &amp; 0xffff;</div><div class='ctx'> 		netdev_info(dev, "Typhoon 1.0 Sleep Image built %02u/%02u/2000\n",</div><div class='ctx'> 			    monthday &gt;&gt; 8, monthday &amp; 0xff);</div><div class='del'>-	} else if(xp_resp[0].numDesc == 2) {</div><div class='add'>+	} else if (xp_resp[0].numDesc == 2) {</div><div class='ctx'> 		/* This is the Typhoon 1.1+ type Sleep Image</div><div class='ctx'> 		 */</div><div class='ctx'> 		u32 sleep_ver = le32_to_cpu(xp_resp[0].parm2);</div><div class='hunk'>@@ -2492,8 +2525,8 @@ error_out_reset:</div><div class='ctx'> 	typhoon_reset(ioaddr, NoWait);</div><div class='ctx'> </div><div class='ctx'> error_out_dma:</div><div class='del'>-	pci_free_consistent(pdev, sizeof(struct typhoon_shared),</div><div class='del'>-			    shared, shared_dma);</div><div class='add'>+	dma_free_coherent(&amp;pdev-&gt;dev, sizeof(struct typhoon_shared), shared,</div><div class='add'>+			  shared_dma);</div><div class='ctx'> error_out_remap:</div><div class='ctx'> 	pci_iounmap(pdev, ioaddr);</div><div class='ctx'> error_out_regions:</div><div class='hunk'>@@ -2520,23 +2553,22 @@ typhoon_remove_one(struct pci_dev *pdev)</div><div class='ctx'> 	pci_restore_state(pdev);</div><div class='ctx'> 	typhoon_reset(tp-&gt;ioaddr, NoWait);</div><div class='ctx'> 	pci_iounmap(pdev, tp-&gt;ioaddr);</div><div class='del'>-	pci_free_consistent(pdev, sizeof(struct typhoon_shared),</div><div class='del'>-			    tp-&gt;shared, tp-&gt;shared_dma);</div><div class='add'>+	dma_free_coherent(&amp;pdev-&gt;dev, sizeof(struct typhoon_shared),</div><div class='add'>+			  tp-&gt;shared, tp-&gt;shared_dma);</div><div class='ctx'> 	pci_release_regions(pdev);</div><div class='ctx'> 	pci_clear_mwi(pdev);</div><div class='ctx'> 	pci_disable_device(pdev);</div><div class='ctx'> 	free_netdev(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static SIMPLE_DEV_PM_OPS(typhoon_pm_ops, typhoon_suspend, typhoon_resume);</div><div class='add'>+</div><div class='ctx'> static struct pci_driver typhoon_driver = {</div><div class='ctx'> 	.name		= KBUILD_MODNAME,</div><div class='ctx'> 	.id_table	= typhoon_pci_tbl,</div><div class='ctx'> 	.probe		= typhoon_init_one,</div><div class='ctx'> 	.remove		= typhoon_remove_one,</div><div class='del'>-#ifdef CONFIG_PM</div><div class='del'>-	.suspend	= typhoon_suspend,</div><div class='del'>-	.resume		= typhoon_resume,</div><div class='del'>-#endif</div><div class='add'>+	.driver.pm	= &amp;typhoon_pm_ops,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int __init</div><div class='head'>diff --git a/drivers/net/ethernet/3com/typhoon.h b/drivers/net/ethernet/3com/typhoon.h<br/>index 88187fc84aa3..38e6dcab4e94 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/3com/typhoon.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/3com/typhoon.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/3com/typhoon.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/3com/typhoon.h</a></div><div class='hunk'>@@ -33,7 +33,7 @@ struct basic_ring {</div><div class='ctx'> 	u32 lastWrite;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* The Typoon transmit ring -- same as a basic ring, plus:</div><div class='add'>+/* The Typhoon transmit ring -- same as a basic ring, plus:</div><div class='ctx'>  * lastRead:      where we're at in regard to cleaning up the ring</div><div class='ctx'>  * writeRegister: register to use for writing (different for Hi &amp; Lo rings)</div><div class='ctx'>  */</div><div class='hunk'>@@ -366,7 +366,7 @@ struct resp_desc {</div><div class='ctx'> 		memset(_ptr, 0, sizeof(struct cmd_desc));		\</div><div class='ctx'> 		_ptr-&gt;flags = TYPHOON_CMD_DESC | TYPHOON_DESC_VALID;	\</div><div class='ctx'> 		_ptr-&gt;cmd = command;					\</div><div class='del'>-	} while(0)</div><div class='add'>+	} while (0)</div><div class='ctx'> </div><div class='ctx'> /* We set seqNo to 1 if we're expecting a response from this command */</div><div class='ctx'> #define INIT_COMMAND_WITH_RESPONSE(x, command)				\</div><div class='hunk'>@@ -376,7 +376,7 @@ struct resp_desc {</div><div class='ctx'> 		_ptr-&gt;flags |= TYPHOON_DESC_VALID; 			\</div><div class='ctx'> 		_ptr-&gt;cmd = command;					\</div><div class='ctx'> 		_ptr-&gt;seqNo = 1;					\</div><div class='del'>-	} while(0)</div><div class='add'>+	} while (0)</div><div class='ctx'> </div><div class='ctx'> /* TYPHOON_CMD_SET_RX_FILTER filter bits (cmd.parm1)</div><div class='ctx'>  */</div><div class='head'>diff --git a/drivers/net/ethernet/8390/8390.c b/drivers/net/ethernet/8390/8390.c<br/>index 5db1f55abef4..c5636245f1ca 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/8390.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/8390.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/8390.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/8390/8390.c</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /* 8390 core for usual drivers */</div><div class='ctx'> </div><div class='ctx'> static const char version[] =</div><div class='hunk'>@@ -35,9 +36,9 @@ void ei_set_multicast_list(struct net_device *dev)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(ei_set_multicast_list);</div><div class='ctx'> </div><div class='del'>-void ei_tx_timeout(struct net_device *dev)</div><div class='add'>+void ei_tx_timeout(struct net_device *dev, unsigned int txqueue)</div><div class='ctx'> {</div><div class='del'>-	__ei_tx_timeout(dev);</div><div class='add'>+	__ei_tx_timeout(dev, txqueue);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(ei_tx_timeout);</div><div class='ctx'> </div><div class='hunk'>@@ -64,7 +65,6 @@ const struct net_device_ops ei_netdev_ops = {</div><div class='ctx'> 	.ndo_set_rx_mode	= ei_set_multicast_list,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> 	.ndo_set_mac_address 	= eth_mac_addr,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='ctx'> #ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='ctx'> 	.ndo_poll_controller	= ei_poll,</div><div class='ctx'> #endif</div><div class='hunk'>@@ -100,4 +100,5 @@ static void __exit ns8390_module_exit(void)</div><div class='ctx'> module_init(ns8390_module_init);</div><div class='ctx'> module_exit(ns8390_module_exit);</div><div class='ctx'> #endif /* MODULE */</div><div class='add'>+MODULE_DESCRIPTION("National Semiconductor 8390 core driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/8390/8390.h b/drivers/net/ethernet/8390/8390.h<br/>index 3e2f2c2e7b58..f784a6e2ab0e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/8390.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/8390.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/8390.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/8390/8390.h</a></div><div class='hunk'>@@ -1,8 +1,12 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-1.0+ */</div><div class='add'>+</div><div class='ctx'> /* Generic NS8390 register definitions. */</div><div class='add'>+</div><div class='ctx'> /* This file is part of Donald Becker's 8390 drivers, and is distributed</div><div class='del'>-   under the same license. Auto-loading of 8390.o only in v2.2 - Paul G.</div><div class='del'>-   Some of these names and comments originated from the Crynwr</div><div class='del'>-   packet drivers, which are distributed under the GPL. */</div><div class='add'>+ * under the same license. Auto-loading of 8390.o only in v2.2 - Paul G.</div><div class='add'>+ * Some of these names and comments originated from the Crynwr</div><div class='add'>+ * packet drivers, which are distributed under the GPL.</div><div class='add'>+ */</div><div class='ctx'> </div><div class='ctx'> #ifndef _8390_h</div><div class='ctx'> #define _8390_h</div><div class='hunk'>@@ -16,9 +20,9 @@</div><div class='ctx'> </div><div class='ctx'> /* The 8390 specific per-packet-header format. */</div><div class='ctx'> struct e8390_pkt_hdr {</div><div class='del'>-  unsigned char status; /* status */</div><div class='del'>-  unsigned char next;   /* pointer to next packet. */</div><div class='del'>-  unsigned short count; /* header + packet length in bytes */</div><div class='add'>+	unsigned char status; /* status */</div><div class='add'>+	unsigned char next;   /* pointer to next packet. */</div><div class='add'>+	unsigned short count; /* header + packet length in bytes */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='hunk'>@@ -32,7 +36,7 @@ void NS8390_init(struct net_device *dev, int startp);</div><div class='ctx'> int ei_open(struct net_device *dev);</div><div class='ctx'> int ei_close(struct net_device *dev);</div><div class='ctx'> irqreturn_t ei_interrupt(int irq, void *dev_id);</div><div class='del'>-void ei_tx_timeout(struct net_device *dev);</div><div class='add'>+void ei_tx_timeout(struct net_device *dev, unsigned int txqueue);</div><div class='ctx'> netdev_tx_t ei_start_xmit(struct sk_buff *skb, struct net_device *dev);</div><div class='ctx'> void ei_set_multicast_list(struct net_device *dev);</div><div class='ctx'> struct net_device_stats *ei_get_stats(struct net_device *dev);</div><div class='hunk'>@@ -50,7 +54,7 @@ void NS8390p_init(struct net_device *dev, int startp);</div><div class='ctx'> int eip_open(struct net_device *dev);</div><div class='ctx'> int eip_close(struct net_device *dev);</div><div class='ctx'> irqreturn_t eip_interrupt(int irq, void *dev_id);</div><div class='del'>-void eip_tx_timeout(struct net_device *dev);</div><div class='add'>+void eip_tx_timeout(struct net_device *dev, unsigned int txqueue);</div><div class='ctx'> netdev_tx_t eip_start_xmit(struct sk_buff *skb, struct net_device *dev);</div><div class='ctx'> void eip_set_multicast_list(struct net_device *dev);</div><div class='ctx'> struct net_device_stats *eip_get_stats(struct net_device *dev);</div><div class='hunk'>@@ -66,18 +70,24 @@ static inline struct net_device *alloc_eip_netdev(void)</div><div class='ctx'> /* You have one of these per-board */</div><div class='ctx'> struct ei_device {</div><div class='ctx'> 	const char *name;</div><div class='del'>-	void (*reset_8390)(struct net_device *);</div><div class='del'>-	void (*get_8390_hdr)(struct net_device *, struct e8390_pkt_hdr *, int);</div><div class='del'>-	void (*block_output)(struct net_device *, int, const unsigned char *, int);</div><div class='del'>-	void (*block_input)(struct net_device *, int, struct sk_buff *, int);</div><div class='add'>+	void (*reset_8390)(struct net_device *dev);</div><div class='add'>+	void (*get_8390_hdr)(struct net_device *dev,</div><div class='add'>+			     struct e8390_pkt_hdr *hdr, int ring_page);</div><div class='add'>+	void (*block_output)(struct net_device *dev, int count,</div><div class='add'>+			     const unsigned char *buf, int start_page);</div><div class='add'>+	void (*block_input)(struct net_device *dev, int count,</div><div class='add'>+			    struct sk_buff *skb, int ring_offset);</div><div class='ctx'> 	unsigned long rmem_start;</div><div class='ctx'> 	unsigned long rmem_end;</div><div class='ctx'> 	void __iomem *mem;</div><div class='ctx'> 	unsigned char mcfilter[8];</div><div class='ctx'> 	unsigned open:1;</div><div class='del'>-	unsigned word16:1;  		/* We have the 16-bit (vs 8-bit) version of the card. */</div><div class='del'>-	unsigned bigendian:1;		/* 16-bit big endian mode. Do NOT */</div><div class='del'>-					/* set this on random 8390 clones! */</div><div class='add'>+	unsigned word16:1;		/* We have the 16-bit (vs 8-bit)</div><div class='add'>+					 * version of the card.</div><div class='add'>+					 */</div><div class='add'>+	unsigned bigendian:1;		/* 16-bit big endian mode. Do NOT</div><div class='add'>+					 * set this on random 8390 clones!</div><div class='add'>+					 */</div><div class='ctx'> 	unsigned txing:1;		/* Transmit Active */</div><div class='ctx'> 	unsigned irqlock:1;		/* 8390's intrs disabled when '1'. */</div><div class='ctx'> 	unsigned dmaing:1;		/* Remote DMA Active */</div><div class='hunk'>@@ -115,12 +125,16 @@ struct ei_device {</div><div class='ctx'> #define E8390_RXCONFIG		(ei_status.rxcr_base | 0x04)</div><div class='ctx'> #define E8390_RXOFF		(ei_status.rxcr_base | 0x20)</div><div class='ctx'> #else</div><div class='del'>-#define E8390_RXCONFIG		0x4	/* EN0_RXCR: broadcasts, no multicast,errors */</div><div class='del'>-#define E8390_RXOFF		0x20	/* EN0_RXCR: Accept no packets */</div><div class='add'>+/* EN0_RXCR: broadcasts, no multicast,errors */</div><div class='add'>+#define E8390_RXCONFIG		0x4</div><div class='add'>+/* EN0_RXCR: Accept no packets */</div><div class='add'>+#define E8390_RXOFF		0x20</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#define E8390_TXCONFIG		0x00	/* EN0_TXCR: Normal transmit mode */</div><div class='del'>-#define E8390_TXOFF		0x02	/* EN0_TXCR: Transmitter off */</div><div class='add'>+/* EN0_TXCR: Normal transmit mode */</div><div class='add'>+#define E8390_TXCONFIG		0x00</div><div class='add'>+/* EN0_TXCR: Transmitter off */</div><div class='add'>+#define E8390_TXOFF		0x02</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /*  Register accessed at EN_CMD, the 8390 base addr.  */</div><div class='hunk'>@@ -134,17 +148,16 @@ struct ei_device {</div><div class='ctx'> #define E8390_PAGE1	0x40	/* using the two high-order bits */</div><div class='ctx'> #define E8390_PAGE2	0x80	/* Page 3 is invalid. */</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- *	Only generate indirect loads given a machine that needs them.</div><div class='del'>- *      - removed AMIGA_PCMCIA from this list, handled as ISA io now</div><div class='del'>- *	- the _p for generates no delay by default 8390p.c overrides this.</div><div class='add'>+/* Only generate indirect loads given a machine that needs them.</div><div class='add'>+ * - removed AMIGA_PCMCIA from this list, handled as ISA io now</div><div class='add'>+ * - the _p for generates no delay by default 8390p.c overrides this.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef ei_inb</div><div class='ctx'> #define ei_inb(_p)	inb(_p)</div><div class='del'>-#define ei_outb(_v,_p)	outb(_v,_p)</div><div class='add'>+#define ei_outb(_v, _p)	outb(_v, _p)</div><div class='ctx'> #define ei_inb_p(_p)	inb(_p)</div><div class='del'>-#define ei_outb_p(_v,_p) outb(_v,_p)</div><div class='add'>+#define ei_outb_p(_v, _p) outb(_v, _p)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> #ifndef EI_SHIFT</div><div class='hunk'>@@ -153,9 +166,9 @@ struct ei_device {</div><div class='ctx'> </div><div class='ctx'> #define E8390_CMD	EI_SHIFT(0x00)  /* The command register (for all pages) */</div><div class='ctx'> /* Page 0 register offsets. */</div><div class='del'>-#define EN0_CLDALO	EI_SHIFT(0x01)	/* Low byte of current local dma addr  RD */</div><div class='add'>+#define EN0_CLDALO	EI_SHIFT(0x01)	/* Low byte of current local dma addr RD */</div><div class='ctx'> #define EN0_STARTPG	EI_SHIFT(0x01)	/* Starting page of ring bfr WR */</div><div class='del'>-#define EN0_CLDAHI	EI_SHIFT(0x02)	/* High byte of current local dma addr  RD */</div><div class='add'>+#define EN0_CLDAHI	EI_SHIFT(0x02)	/* High byte of current local dma addr RD */</div><div class='ctx'> #define EN0_STOPPG	EI_SHIFT(0x02)	/* Ending page +1 of ring bfr WR */</div><div class='ctx'> #define EN0_BOUNDARY	EI_SHIFT(0x03)	/* Boundary page of ring bfr RD WR */</div><div class='ctx'> #define EN0_TSR		EI_SHIFT(0x04)	/* Transmit status reg RD */</div><div class='head'>diff --git a/drivers/net/ethernet/8390/8390p.c b/drivers/net/ethernet/8390/8390p.c<br/>index e8fc2e87e840..6d429b11e9c6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/8390p.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/8390p.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/8390p.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/8390/8390p.c</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /* 8390 core for ISA devices needing bus delays */</div><div class='ctx'> </div><div class='ctx'> static const char version[] =</div><div class='hunk'>@@ -40,9 +41,9 @@ void eip_set_multicast_list(struct net_device *dev)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(eip_set_multicast_list);</div><div class='ctx'> </div><div class='del'>-void eip_tx_timeout(struct net_device *dev)</div><div class='add'>+void eip_tx_timeout(struct net_device *dev, unsigned int txqueue)</div><div class='ctx'> {</div><div class='del'>-	__ei_tx_timeout(dev);</div><div class='add'>+	__ei_tx_timeout(dev, txqueue);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL(eip_tx_timeout);</div><div class='ctx'> </div><div class='hunk'>@@ -69,7 +70,6 @@ const struct net_device_ops eip_netdev_ops = {</div><div class='ctx'> 	.ndo_set_rx_mode	= eip_set_multicast_list,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> 	.ndo_set_mac_address 	= eth_mac_addr,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='ctx'> #ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='ctx'> 	.ndo_poll_controller	= eip_poll,</div><div class='ctx'> #endif</div><div class='hunk'>@@ -102,4 +102,5 @@ static void __exit NS8390p_cleanup_module(void)</div><div class='ctx'> </div><div class='ctx'> module_init(NS8390p_init_module);</div><div class='ctx'> module_exit(NS8390p_cleanup_module);</div><div class='add'>+MODULE_DESCRIPTION("National Semiconductor 8390 core for ISA driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/8390/Kconfig b/drivers/net/ethernet/8390/Kconfig<br/>index edf72258ab1d..345f250781c6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/Kconfig?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/8390/Kconfig</a></div><div class='hunk'>@@ -1,25 +1,26 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> #</div><div class='ctx'> # 8390 device configuration</div><div class='ctx'> #</div><div class='ctx'> </div><div class='ctx'> config NET_VENDOR_8390</div><div class='del'>-	bool "National Semi-conductor 8390 devices"</div><div class='add'>+	bool "National Semiconductor 8390 devices"</div><div class='ctx'> 	default y</div><div class='ctx'> 	depends on NET_VENDOR_NATSEMI</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  If you have a network (Ethernet) card belonging to this class, say Y.</div><div class='ctx'> </div><div class='ctx'> 	  Note that the answer to this question doesn't directly affect the</div><div class='ctx'> 	  kernel: saying N will just cause the configurator to skip all</div><div class='del'>-	  the questions about Western Digital cards. If you say Y, you will be</div><div class='del'>-	  asked for your specific card in the following questions.</div><div class='add'>+	  the questions about National Semiconductor 8390 cards. If you say Y,</div><div class='add'>+	  you will be asked for your specific card in the following questions.</div><div class='ctx'> </div><div class='ctx'> if NET_VENDOR_8390</div><div class='ctx'> </div><div class='ctx'> config PCMCIA_AXNET</div><div class='ctx'> 	tristate "Asix AX88190 PCMCIA support"</div><div class='del'>-	depends on PCMCIA</div><div class='del'>-	---help---</div><div class='add'>+	depends on PCMCIA &amp;&amp; HAS_IOPORT</div><div class='add'>+	help</div><div class='ctx'> 	  Say Y here if you intend to attach an Asix AX88190-based PCMCIA</div><div class='ctx'> 	  (PC-card) Fast Ethernet card to your computer.  These cards are</div><div class='ctx'> 	  nearly NE2000 compatible but need a separate driver due to a few</div><div class='hunk'>@@ -29,12 +30,12 @@ config PCMCIA_AXNET</div><div class='ctx'> 	  called axnet_cs.  If unsure, say N.</div><div class='ctx'> </div><div class='ctx'> config AX88796</div><div class='del'>-	tristate "ASIX AX88796 NE2000 clone support"</div><div class='del'>-	depends on (ARM || MIPS || SUPERH)</div><div class='add'>+	tristate "ASIX AX88796 NE2000 clone support" if !ZORRO</div><div class='add'>+	depends on (ARM || MIPS || SUPERH || ZORRO || COMPILE_TEST)</div><div class='ctx'> 	select CRC32</div><div class='ctx'> 	select PHYLIB</div><div class='ctx'> 	select MDIO_BITBANG</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  AX88796 driver, using platform bus to provide</div><div class='ctx'> 	  chip detection and resources</div><div class='ctx'> </div><div class='hunk'>@@ -42,14 +43,27 @@ config AX88796_93CX6</div><div class='ctx'> 	bool "ASIX AX88796 external 93CX6 eeprom support"</div><div class='ctx'> 	depends on AX88796</div><div class='ctx'> 	select EEPROM_93CX6</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  Select this if your platform comes with an external 93CX6 eeprom.</div><div class='ctx'> </div><div class='add'>+config XSURF100</div><div class='add'>+	tristate "Amiga XSurf 100 AX88796/NE2000 clone support"</div><div class='add'>+	depends on ZORRO</div><div class='add'>+	select AX88796</div><div class='add'>+	select AX88796B_PHY</div><div class='add'>+	help</div><div class='add'>+	  This driver is for the Individual Computers X-Surf 100 Ethernet</div><div class='add'>+	  card (based on the Asix AX88796 chip). If you have such a card,</div><div class='add'>+	  say Y. Otherwise, say N.</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose M here: the module</div><div class='add'>+	  will be called xsurf100.</div><div class='add'>+</div><div class='ctx'> config HYDRA</div><div class='ctx'> 	tristate "Hydra support"</div><div class='ctx'> 	depends on ZORRO</div><div class='ctx'> 	select CRC32</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  If you have a Hydra Ethernet adapter, say Y. Otherwise, say N.</div><div class='ctx'> </div><div class='ctx'> 	  To compile this driver as a module, choose M here: the module</div><div class='hunk'>@@ -59,15 +73,15 @@ config ARM_ETHERH</div><div class='ctx'> 	tristate "I-cubed EtherH/ANT EtherM support"</div><div class='ctx'> 	depends on ARM &amp;&amp; ARCH_ACORN</div><div class='ctx'> 	select CRC32</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  If you have an Acorn system with one of these network cards, you</div><div class='ctx'> 	  should say Y to this option if you wish to use it with Linux.</div><div class='ctx'> </div><div class='ctx'> config MAC8390</div><div class='del'>-	bool "Macintosh NS 8390 based ethernet cards"</div><div class='add'>+	tristate "Macintosh NS 8390 based ethernet cards"</div><div class='ctx'> 	depends on MAC</div><div class='ctx'> 	select CRC32</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  If you want to include a driver to support Nubus or LC-PDS</div><div class='ctx'> 	  Ethernet cards using an NS8390 chipset or its equivalent, say Y.</div><div class='ctx'> </div><div class='hunk'>@@ -75,7 +89,7 @@ config MCF8390</div><div class='ctx'> 	tristate "ColdFire NS8390 based Ethernet support"</div><div class='ctx'> 	depends on COLDFIRE</div><div class='ctx'> 	select CRC32</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  This driver is for Ethernet devices using an NS8390-compatible</div><div class='ctx'> 	  chipset on many common ColdFire CPU based boards. Many of the older</div><div class='ctx'> 	  Freescale dev boards use this, and some other common boards like</div><div class='hunk'>@@ -87,10 +101,10 @@ config MCF8390</div><div class='ctx'> </div><div class='ctx'> config NE2000</div><div class='ctx'> 	tristate "NE2000/NE1000 support"</div><div class='del'>-	depends on (ISA || (Q40 &amp;&amp; m) || M32R || MACH_TX49XX || \</div><div class='del'>-		    ATARI_ETHERNEC)</div><div class='add'>+	depends on (ISA || (Q40 &amp;&amp; m) || MACH_TX49XX || ATARI_ETHERNEC)</div><div class='add'>+	select NETDEV_LEGACY_INIT if ISA</div><div class='ctx'> 	select CRC32</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  If you have a network (Ethernet) card of this type, say Y here.</div><div class='ctx'> 	  Many Ethernet cards without a specific driver are compatible with</div><div class='ctx'> 	  the NE2000.</div><div class='hunk'>@@ -103,9 +117,9 @@ config NE2000</div><div class='ctx'> </div><div class='ctx'> config NE2K_PCI</div><div class='ctx'> 	tristate "PCI NE2000 and clones support (see help)"</div><div class='del'>-	depends on PCI</div><div class='add'>+	depends on PCI &amp;&amp; HAS_IOPORT</div><div class='ctx'> 	select CRC32</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  This driver is for NE2000 compatible PCI cards. It will not work</div><div class='ctx'> 	  with ISA NE2000 cards (they have their own driver, "NE2000/NE1000</div><div class='ctx'> 	  support" below). If you have a PCI NE2000 network (Ethernet) card,</div><div class='hunk'>@@ -123,7 +137,7 @@ config APNE</div><div class='ctx'> 	tristate "PCMCIA NE2000 support"</div><div class='ctx'> 	depends on AMIGA_PCMCIA</div><div class='ctx'> 	select CRC32</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  If you have a PCMCIA NE2000 compatible adapter, say Y.  Otherwise,</div><div class='ctx'> 	  say N.</div><div class='ctx'> </div><div class='hunk'>@@ -132,9 +146,9 @@ config APNE</div><div class='ctx'> </div><div class='ctx'> config PCMCIA_PCNET</div><div class='ctx'> 	tristate "NE2000 compatible PCMCIA support"</div><div class='del'>-	depends on PCMCIA</div><div class='add'>+	depends on PCMCIA &amp;&amp; HAS_IOPORT</div><div class='ctx'> 	select CRC32</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  Say Y here if you intend to attach an NE2000 compatible PCMCIA</div><div class='ctx'> 	  (PC-card) Ethernet or Fast Ethernet card to your computer.</div><div class='ctx'> </div><div class='hunk'>@@ -145,7 +159,7 @@ config STNIC</div><div class='ctx'> 	tristate "National DP83902AV  support"</div><div class='ctx'> 	depends on SUPERH</div><div class='ctx'> 	select CRC32</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  Support for cards based on the National Semiconductor DP83902AV</div><div class='ctx'> 	  ST-NIC Serial Network Interface Controller for Twisted Pair.  This</div><div class='ctx'> 	  is a 10Mbit/sec Ethernet controller.  Product overview and specs at</div><div class='hunk'>@@ -156,8 +170,9 @@ config STNIC</div><div class='ctx'> config ULTRA</div><div class='ctx'> 	tristate "SMC Ultra support"</div><div class='ctx'> 	depends on ISA</div><div class='add'>+	select NETDEV_LEGACY_INIT</div><div class='ctx'> 	select CRC32</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  If you have a network (Ethernet) card of this type, say Y here.</div><div class='ctx'> </div><div class='ctx'> 	  Important: There have been many reports that, with some motherboards</div><div class='hunk'>@@ -173,8 +188,9 @@ config ULTRA</div><div class='ctx'> config WD80x3</div><div class='ctx'> 	tristate "WD80*3 support"</div><div class='ctx'> 	depends on ISA</div><div class='add'>+	select NETDEV_LEGACY_INIT</div><div class='ctx'> 	select CRC32</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  If you have a network (Ethernet) card of this type, say Y here.</div><div class='ctx'> </div><div class='ctx'> 	  To compile this driver as a module, choose M here. The module</div><div class='hunk'>@@ -184,7 +200,7 @@ config ZORRO8390</div><div class='ctx'> 	tristate "Zorro NS8390-based Ethernet support"</div><div class='ctx'> 	depends on ZORRO</div><div class='ctx'> 	select CRC32</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  This driver is for Zorro Ethernet cards using an NS8390-compatible</div><div class='ctx'> 	  chipset, like the Village Tronic Ariadne II and the Individual</div><div class='ctx'> 	  Computers X-Surf Ethernet cards. If you have such a card, say Y.</div><div class='head'>diff --git a/drivers/net/ethernet/8390/Makefile b/drivers/net/ethernet/8390/Makefile<br/>index ff3b31894188..85c83c566ec6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/Makefile?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/8390/Makefile</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> #</div><div class='ctx'> # Makefile for the 8390 network device drivers.</div><div class='ctx'> #</div><div class='hunk'>@@ -6,8 +7,8 @@ obj-$(CONFIG_MAC8390) += mac8390.o</div><div class='ctx'> obj-$(CONFIG_APNE) += apne.o 8390.o</div><div class='ctx'> obj-$(CONFIG_ARM_ETHERH) += etherh.o</div><div class='ctx'> obj-$(CONFIG_AX88796) += ax88796.o</div><div class='del'>-obj-$(CONFIG_HYDRA) += hydra.o 8390.o</div><div class='del'>-obj-$(CONFIG_MCF8390) += mcf8390.o 8390.o</div><div class='add'>+obj-$(CONFIG_HYDRA) += hydra.o</div><div class='add'>+obj-$(CONFIG_MCF8390) += mcf8390.o</div><div class='ctx'> obj-$(CONFIG_NE2000) += ne.o 8390p.o</div><div class='ctx'> obj-$(CONFIG_NE2K_PCI) += ne2k-pci.o 8390.o</div><div class='ctx'> obj-$(CONFIG_PCMCIA_AXNET) += axnet_cs.o 8390.o</div><div class='hunk'>@@ -15,4 +16,5 @@ obj-$(CONFIG_PCMCIA_PCNET) += pcnet_cs.o 8390.o</div><div class='ctx'> obj-$(CONFIG_STNIC) += stnic.o 8390.o</div><div class='ctx'> obj-$(CONFIG_ULTRA) += smc-ultra.o 8390.o</div><div class='ctx'> obj-$(CONFIG_WD80x3) += wd.o 8390.o</div><div class='del'>-obj-$(CONFIG_ZORRO8390) += zorro8390.o 8390.o</div><div class='add'>+obj-$(CONFIG_XSURF100) += xsurf100.o</div><div class='add'>+obj-$(CONFIG_ZORRO8390) += zorro8390.o</div><div class='head'>diff --git a/drivers/net/ethernet/8390/apne.c b/drivers/net/ethernet/8390/apne.c<br/>index c56ac9ebc08f..828edca8d30c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/apne.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/apne.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/apne.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/8390/apne.c</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='ctx'>  * Amiga Linux/68k 8390 based PCMCIA Ethernet Driver for the Amiga 1200</div><div class='ctx'>  *</div><div class='hunk'>@@ -19,12 +20,6 @@</div><div class='ctx'>  *</div><div class='ctx'>  * ----------------------------------------------------------------------------</div><div class='ctx'>  *</div><div class='del'>- * This file is subject to the terms and conditions of the GNU General Public</div><div class='del'>- * License.  See the file COPYING in the main directory of the Linux</div><div class='del'>- * distribution for more details.</div><div class='del'>- *</div><div class='del'>- * ----------------------------------------------------------------------------</div><div class='del'>- *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -75,7 +70,6 @@</div><div class='ctx'> #define NESM_STOP_PG	0x80	/* Last page +1 of RX ring */</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-struct net_device * __init apne_probe(int unit);</div><div class='ctx'> static int apne_probe1(struct net_device *dev, int ioaddr);</div><div class='ctx'> </div><div class='ctx'> static void apne_reset_8390(struct net_device *dev);</div><div class='hunk'>@@ -117,10 +111,10 @@ static const char version[] =</div><div class='ctx'> static int apne_owned;	/* signal if card already owned */</div><div class='ctx'> </div><div class='ctx'> static u32 apne_msg_enable;</div><div class='del'>-module_param_named(msg_enable, apne_msg_enable, uint, (S_IRUSR|S_IRGRP|S_IROTH));</div><div class='add'>+module_param_named(msg_enable, apne_msg_enable, uint, 0444);</div><div class='ctx'> MODULE_PARM_DESC(msg_enable, "Debug message level (see linux/netdevice.h for bitmap)");</div><div class='ctx'> </div><div class='del'>-struct net_device * __init apne_probe(int unit)</div><div class='add'>+static struct net_device * __init apne_probe(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev;</div><div class='ctx'> 	struct ei_device *ei_local;</div><div class='hunk'>@@ -150,10 +144,6 @@ struct net_device * __init apne_probe(int unit)</div><div class='ctx'> 	dev = alloc_ei_netdev();</div><div class='ctx'> 	if (!dev)</div><div class='ctx'> 		return ERR_PTR(-ENOMEM);</div><div class='del'>-	if (unit &gt;= 0) {</div><div class='del'>-		sprintf(dev-&gt;name, "eth%d", unit);</div><div class='del'>-		netdev_boot_setup_check(dev);</div><div class='del'>-	}</div><div class='ctx'> 	ei_local = netdev_priv(dev);</div><div class='ctx'> 	ei_local-&gt;msg_enable = apne_msg_enable;</div><div class='ctx'> </div><div class='hunk'>@@ -325,8 +315,7 @@ static int __init apne_probe1(struct net_device *dev, int ioaddr)</div><div class='ctx'>     i = request_irq(dev-&gt;irq, apne_interrupt, IRQF_SHARED, DRV_NAME, dev);</div><div class='ctx'>     if (i) return i;</div><div class='ctx'> </div><div class='del'>-    for (i = 0; i &lt; ETH_ALEN; i++)</div><div class='del'>-	dev-&gt;dev_addr[i] = SA_prom[i];</div><div class='add'>+    eth_hw_addr_set(dev, SA_prom);</div><div class='ctx'> </div><div class='ctx'>     pr_cont(" %pM\n", dev-&gt;dev_addr);</div><div class='ctx'> </div><div class='hunk'>@@ -554,12 +543,11 @@ static irqreturn_t apne_interrupt(int irq, void *dev_id)</div><div class='ctx'>     return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef MODULE</div><div class='ctx'> static struct net_device *apne_dev;</div><div class='ctx'> </div><div class='ctx'> static int __init apne_module_init(void)</div><div class='ctx'> {</div><div class='del'>-	apne_dev = apne_probe(-1);</div><div class='add'>+	apne_dev = apne_probe();</div><div class='ctx'> 	return PTR_ERR_OR_ZERO(apne_dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -579,7 +567,6 @@ static void __exit apne_module_exit(void)</div><div class='ctx'> }</div><div class='ctx'> module_init(apne_module_init);</div><div class='ctx'> module_exit(apne_module_exit);</div><div class='del'>-#endif</div><div class='ctx'> </div><div class='ctx'> static int init_pcmcia(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -623,4 +610,5 @@ static int init_pcmcia(void)</div><div class='ctx'> 	return 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+MODULE_DESCRIPTION("National Semiconductor 8390 Amiga PCMCIA ethernet driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/8390/ax88796.c b/drivers/net/ethernet/8390/ax88796.c<br/>index 0443654f0339..e1695d0fbd8b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/ax88796.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/ax88796.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/ax88796.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/8390/ax88796.c</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /* drivers/net/ethernet/8390/ax88796.c</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright 2005,2007 Simtec Electronics</div><div class='hunk'>@@ -5,10 +6,6 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Asix AX88796 10/100 Ethernet controller support</div><div class='ctx'>  *	Based on ne.c, by Donald Becker, et-al.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -77,14 +74,11 @@ static unsigned char version[] = "ax88796.c: Copyright 2005,2007 Simtec Electron</div><div class='ctx'> </div><div class='ctx'> #define AX_GPOC_PPDSET	BIT(6)</div><div class='ctx'> </div><div class='del'>-static u32 ax_msg_enable;</div><div class='del'>-</div><div class='ctx'> /* device private data */</div><div class='ctx'> </div><div class='ctx'> struct ax_device {</div><div class='ctx'> 	struct mii_bus *mii_bus;</div><div class='ctx'> 	struct mdiobb_ctrl bb_ctrl;</div><div class='del'>-	struct phy_device *phy_dev;</div><div class='ctx'> 	void __iomem *addr_memr;</div><div class='ctx'> 	u8 reg_memr;</div><div class='ctx'> 	int link;</div><div class='hunk'>@@ -107,6 +101,13 @@ static inline struct ax_device *to_ax_dev(struct net_device *dev)</div><div class='ctx'> 	return (struct ax_device *)(ei_local + 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void ax_NS8390_reinit(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	ax_NS8390_init(dev, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+EXPORT_SYMBOL_GPL(ax_NS8390_reinit);</div><div class='add'>+</div><div class='ctx'> /*</div><div class='ctx'>  * ax_initial_check</div><div class='ctx'>  *</div><div class='hunk'>@@ -166,6 +167,21 @@ static void ax_reset_8390(struct net_device *dev)</div><div class='ctx'> 	ei_outb(ENISR_RESET, addr + EN0_ISR);	/* Ack intr. */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+/* Wrapper for __ei_interrupt for platforms that have a platform-specific</div><div class='add'>+ * way to find out whether the interrupt request might be caused by</div><div class='add'>+ * the ax88796 chip.</div><div class='add'>+ */</div><div class='add'>+static irqreturn_t ax_ei_interrupt_filtered(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = dev_id;</div><div class='add'>+	struct ax_device *ax = to_ax_dev(dev);</div><div class='add'>+	struct platform_device *pdev = to_platform_device(dev-&gt;dev.parent);</div><div class='add'>+</div><div class='add'>+	if (!ax-&gt;plat-&gt;check_irq(pdev))</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+</div><div class='add'>+	return ax_ei_interrupt(irq, dev_id);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static void ax_get_8390_hdr(struct net_device *dev, struct e8390_pkt_hdr *hdr,</div><div class='ctx'> 			    int ring_page)</div><div class='hunk'>@@ -320,7 +336,7 @@ static void ax_block_output(struct net_device *dev, int count,</div><div class='ctx'> static void ax_handle_link_change(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct ax_device  *ax = to_ax_dev(dev);</div><div class='del'>-	struct phy_device *phy_dev = ax-&gt;phy_dev;</div><div class='add'>+	struct phy_device *phy_dev = dev-&gt;phydev;</div><div class='ctx'> 	int status_change = 0;</div><div class='ctx'> </div><div class='ctx'> 	if (phy_dev-&gt;link &amp;&amp; ((ax-&gt;speed != phy_dev-&gt;speed) ||</div><div class='hunk'>@@ -365,14 +381,10 @@ static int ax_mii_probe(struct net_device *dev)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* mask with MAC supported features */</div><div class='del'>-	phy_dev-&gt;supported &amp;= PHY_BASIC_FEATURES;</div><div class='del'>-	phy_dev-&gt;advertising = phy_dev-&gt;supported;</div><div class='del'>-</div><div class='del'>-	ax-&gt;phy_dev = phy_dev;</div><div class='add'>+	phy_set_max_speed(phy_dev, SPEED_100);</div><div class='ctx'> </div><div class='ctx'> 	netdev_info(dev, "PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",</div><div class='del'>-		    phy_dev-&gt;drv-&gt;name, dev_name(&amp;phy_dev-&gt;dev), phy_dev-&gt;irq);</div><div class='add'>+		    phy_dev-&gt;drv-&gt;name, phydev_name(phy_dev), phy_dev-&gt;irq);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -392,6 +404,90 @@ static void ax_phy_switch(struct net_device *dev, int on)</div><div class='ctx'> 	ei_outb(reg_gpoc, ei_local-&gt;mem + EI_SHIFT(0x17));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void ax_bb_mdc(struct mdiobb_ctrl *ctrl, int level)</div><div class='add'>+{</div><div class='add'>+	struct ax_device *ax = container_of(ctrl, struct ax_device, bb_ctrl);</div><div class='add'>+</div><div class='add'>+	if (level)</div><div class='add'>+		ax-&gt;reg_memr |= AX_MEMR_MDC;</div><div class='add'>+	else</div><div class='add'>+		ax-&gt;reg_memr &amp;= ~AX_MEMR_MDC;</div><div class='add'>+</div><div class='add'>+	ei_outb(ax-&gt;reg_memr, ax-&gt;addr_memr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ax_bb_dir(struct mdiobb_ctrl *ctrl, int output)</div><div class='add'>+{</div><div class='add'>+	struct ax_device *ax = container_of(ctrl, struct ax_device, bb_ctrl);</div><div class='add'>+</div><div class='add'>+	if (output)</div><div class='add'>+		ax-&gt;reg_memr &amp;= ~AX_MEMR_MDIR;</div><div class='add'>+	else</div><div class='add'>+		ax-&gt;reg_memr |= AX_MEMR_MDIR;</div><div class='add'>+</div><div class='add'>+	ei_outb(ax-&gt;reg_memr, ax-&gt;addr_memr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ax_bb_set_data(struct mdiobb_ctrl *ctrl, int value)</div><div class='add'>+{</div><div class='add'>+	struct ax_device *ax = container_of(ctrl, struct ax_device, bb_ctrl);</div><div class='add'>+</div><div class='add'>+	if (value)</div><div class='add'>+		ax-&gt;reg_memr |= AX_MEMR_MDO;</div><div class='add'>+	else</div><div class='add'>+		ax-&gt;reg_memr &amp;= ~AX_MEMR_MDO;</div><div class='add'>+</div><div class='add'>+	ei_outb(ax-&gt;reg_memr, ax-&gt;addr_memr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ax_bb_get_data(struct mdiobb_ctrl *ctrl)</div><div class='add'>+{</div><div class='add'>+	struct ax_device *ax = container_of(ctrl, struct ax_device, bb_ctrl);</div><div class='add'>+	int reg_memr = ei_inb(ax-&gt;addr_memr);</div><div class='add'>+</div><div class='add'>+	return reg_memr &amp; AX_MEMR_MDI ? 1 : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct mdiobb_ops bb_ops = {</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+	.set_mdc = ax_bb_mdc,</div><div class='add'>+	.set_mdio_dir = ax_bb_dir,</div><div class='add'>+	.set_mdio_data = ax_bb_set_data,</div><div class='add'>+	.get_mdio_data = ax_bb_get_data,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int ax_mii_init(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct platform_device *pdev = to_platform_device(dev-&gt;dev.parent);</div><div class='add'>+	struct ei_device *ei_local = netdev_priv(dev);</div><div class='add'>+	struct ax_device *ax = to_ax_dev(dev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	ax-&gt;bb_ctrl.ops = &amp;bb_ops;</div><div class='add'>+	ax-&gt;addr_memr = ei_local-&gt;mem + AX_MEMR;</div><div class='add'>+	ax-&gt;mii_bus = alloc_mdio_bitbang(&amp;ax-&gt;bb_ctrl);</div><div class='add'>+	if (!ax-&gt;mii_bus) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ax-&gt;mii_bus-&gt;name = "ax88796_mii_bus";</div><div class='add'>+	ax-&gt;mii_bus-&gt;parent = dev-&gt;dev.parent;</div><div class='add'>+	snprintf(ax-&gt;mii_bus-&gt;id, MII_BUS_ID_SIZE, "%s-%x",</div><div class='add'>+		 pdev-&gt;name, pdev-&gt;id);</div><div class='add'>+</div><div class='add'>+	err = mdiobus_register(ax-&gt;mii_bus);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out_free_mdio_bitbang;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+ out_free_mdio_bitbang:</div><div class='add'>+	free_mdio_bitbang(ax-&gt;mii_bus);</div><div class='add'>+ out:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int ax_open(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct ax_device *ax = to_ax_dev(dev);</div><div class='hunk'>@@ -399,8 +495,16 @@ static int ax_open(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	netdev_dbg(dev, "open\n");</div><div class='ctx'> </div><div class='del'>-	ret = request_irq(dev-&gt;irq, ax_ei_interrupt, ax-&gt;irqflags,</div><div class='del'>-			  dev-&gt;name, dev);</div><div class='add'>+	ret = ax_mii_init(dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto failed_mii;</div><div class='add'>+</div><div class='add'>+	if (ax-&gt;plat-&gt;check_irq)</div><div class='add'>+		ret = request_irq(dev-&gt;irq, ax_ei_interrupt_filtered,</div><div class='add'>+				  ax-&gt;irqflags, dev-&gt;name, dev);</div><div class='add'>+	else</div><div class='add'>+		ret = request_irq(dev-&gt;irq, ax_ei_interrupt, ax-&gt;irqflags,</div><div class='add'>+				  dev-&gt;name, dev);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto failed_request_irq;</div><div class='ctx'> </div><div class='hunk'>@@ -410,7 +514,7 @@ static int ax_open(struct net_device *dev)</div><div class='ctx'> 	ret = ax_mii_probe(dev);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto failed_mii_probe;</div><div class='del'>-	phy_start(ax-&gt;phy_dev);</div><div class='add'>+	phy_start(dev-&gt;phydev);</div><div class='ctx'> </div><div class='ctx'> 	ret = ax_ei_open(dev);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -421,11 +525,15 @@ static int ax_open(struct net_device *dev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'>  failed_ax_ei_open:</div><div class='del'>-	phy_disconnect(ax-&gt;phy_dev);</div><div class='add'>+	phy_disconnect(dev-&gt;phydev);</div><div class='ctx'>  failed_mii_probe:</div><div class='ctx'> 	ax_phy_switch(dev, 0);</div><div class='ctx'> 	free_irq(dev-&gt;irq, dev);</div><div class='ctx'>  failed_request_irq:</div><div class='add'>+	/* unregister mdiobus */</div><div class='add'>+	mdiobus_unregister(ax-&gt;mii_bus);</div><div class='add'>+	free_mdio_bitbang(ax-&gt;mii_bus);</div><div class='add'>+ failed_mii:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -442,16 +550,18 @@ static int ax_close(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	/* turn the phy off */</div><div class='ctx'> 	ax_phy_switch(dev, 0);</div><div class='del'>-	phy_disconnect(ax-&gt;phy_dev);</div><div class='add'>+	phy_disconnect(dev-&gt;phydev);</div><div class='ctx'> </div><div class='ctx'> 	free_irq(dev-&gt;irq, dev);</div><div class='add'>+</div><div class='add'>+	mdiobus_unregister(ax-&gt;mii_bus);</div><div class='add'>+	free_mdio_bitbang(ax-&gt;mii_bus);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int ax_ioctl(struct net_device *dev, struct ifreq *req, int cmd)</div><div class='ctx'> {</div><div class='del'>-	struct ax_device *ax = to_ax_dev(dev);</div><div class='del'>-	struct phy_device *phy_dev = ax-&gt;phy_dev;</div><div class='add'>+	struct phy_device *phy_dev = dev-&gt;phydev;</div><div class='ctx'> </div><div class='ctx'> 	if (!netif_running(dev))</div><div class='ctx'> 		return -EINVAL;</div><div class='hunk'>@@ -469,31 +579,9 @@ static void ax_get_drvinfo(struct net_device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct platform_device *pdev = to_platform_device(dev-&gt;dev.parent);</div><div class='ctx'> </div><div class='del'>-	strlcpy(info-&gt;driver, DRV_NAME, sizeof(info-&gt;driver));</div><div class='del'>-	strlcpy(info-&gt;version, DRV_VERSION, sizeof(info-&gt;version));</div><div class='del'>-	strlcpy(info-&gt;bus_info, pdev-&gt;name, sizeof(info-&gt;bus_info));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ax_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)</div><div class='del'>-{</div><div class='del'>-	struct ax_device *ax = to_ax_dev(dev);</div><div class='del'>-	struct phy_device *phy_dev = ax-&gt;phy_dev;</div><div class='del'>-</div><div class='del'>-	if (!phy_dev)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	return phy_ethtool_gset(phy_dev, cmd);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ax_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)</div><div class='del'>-{</div><div class='del'>-	struct ax_device *ax = to_ax_dev(dev);</div><div class='del'>-	struct phy_device *phy_dev = ax-&gt;phy_dev;</div><div class='del'>-</div><div class='del'>-	if (!phy_dev)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	return phy_ethtool_sset(phy_dev, cmd);</div><div class='add'>+	strscpy(info-&gt;driver, DRV_NAME, sizeof(info-&gt;driver));</div><div class='add'>+	strscpy(info-&gt;version, DRV_VERSION, sizeof(info-&gt;version));</div><div class='add'>+	strscpy(info-&gt;bus_info, pdev-&gt;name, sizeof(info-&gt;bus_info));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u32 ax_get_msglevel(struct net_device *dev)</div><div class='hunk'>@@ -512,12 +600,12 @@ static void ax_set_msglevel(struct net_device *dev, u32 v)</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops ax_ethtool_ops = {</div><div class='ctx'> 	.get_drvinfo		= ax_get_drvinfo,</div><div class='del'>-	.get_settings		= ax_get_settings,</div><div class='del'>-	.set_settings		= ax_set_settings,</div><div class='ctx'> 	.get_link		= ethtool_op_get_link,</div><div class='ctx'> 	.get_ts_info		= ethtool_op_get_ts_info,</div><div class='ctx'> 	.get_msglevel		= ax_get_msglevel,</div><div class='ctx'> 	.set_msglevel		= ax_set_msglevel,</div><div class='add'>+	.get_link_ksettings	= phy_ethtool_get_link_ksettings,</div><div class='add'>+	.set_link_ksettings	= phy_ethtool_set_link_ksettings,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_AX88796_93CX6</div><div class='hunk'>@@ -554,7 +642,7 @@ static void ax_eeprom_register_write(struct eeprom_93cx6 *eeprom)</div><div class='ctx'> static const struct net_device_ops ax_netdev_ops = {</div><div class='ctx'> 	.ndo_open		= ax_open,</div><div class='ctx'> 	.ndo_stop		= ax_close,</div><div class='del'>-	.ndo_do_ioctl		= ax_ioctl,</div><div class='add'>+	.ndo_eth_ioctl		= ax_ioctl,</div><div class='ctx'> </div><div class='ctx'> 	.ndo_start_xmit		= ax_ei_start_xmit,</div><div class='ctx'> 	.ndo_tx_timeout		= ax_ei_tx_timeout,</div><div class='hunk'>@@ -562,109 +650,13 @@ static const struct net_device_ops ax_netdev_ops = {</div><div class='ctx'> 	.ndo_set_rx_mode	= ax_ei_set_multicast_list,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> 	.ndo_set_mac_address	= eth_mac_addr,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='ctx'> #ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='ctx'> 	.ndo_poll_controller	= ax_ei_poll,</div><div class='ctx'> #endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void ax_bb_mdc(struct mdiobb_ctrl *ctrl, int level)</div><div class='del'>-{</div><div class='del'>-	struct ax_device *ax = container_of(ctrl, struct ax_device, bb_ctrl);</div><div class='del'>-</div><div class='del'>-	if (level)</div><div class='del'>-		ax-&gt;reg_memr |= AX_MEMR_MDC;</div><div class='del'>-	else</div><div class='del'>-		ax-&gt;reg_memr &amp;= ~AX_MEMR_MDC;</div><div class='del'>-</div><div class='del'>-	ei_outb(ax-&gt;reg_memr, ax-&gt;addr_memr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ax_bb_dir(struct mdiobb_ctrl *ctrl, int output)</div><div class='del'>-{</div><div class='del'>-	struct ax_device *ax = container_of(ctrl, struct ax_device, bb_ctrl);</div><div class='del'>-</div><div class='del'>-	if (output)</div><div class='del'>-		ax-&gt;reg_memr &amp;= ~AX_MEMR_MDIR;</div><div class='del'>-	else</div><div class='del'>-		ax-&gt;reg_memr |= AX_MEMR_MDIR;</div><div class='del'>-</div><div class='del'>-	ei_outb(ax-&gt;reg_memr, ax-&gt;addr_memr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void ax_bb_set_data(struct mdiobb_ctrl *ctrl, int value)</div><div class='del'>-{</div><div class='del'>-	struct ax_device *ax = container_of(ctrl, struct ax_device, bb_ctrl);</div><div class='del'>-</div><div class='del'>-	if (value)</div><div class='del'>-		ax-&gt;reg_memr |= AX_MEMR_MDO;</div><div class='del'>-	else</div><div class='del'>-		ax-&gt;reg_memr &amp;= ~AX_MEMR_MDO;</div><div class='del'>-</div><div class='del'>-	ei_outb(ax-&gt;reg_memr, ax-&gt;addr_memr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int ax_bb_get_data(struct mdiobb_ctrl *ctrl)</div><div class='del'>-{</div><div class='del'>-	struct ax_device *ax = container_of(ctrl, struct ax_device, bb_ctrl);</div><div class='del'>-	int reg_memr = ei_inb(ax-&gt;addr_memr);</div><div class='del'>-</div><div class='del'>-	return reg_memr &amp; AX_MEMR_MDI ? 1 : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct mdiobb_ops bb_ops = {</div><div class='del'>-	.owner = THIS_MODULE,</div><div class='del'>-	.set_mdc = ax_bb_mdc,</div><div class='del'>-	.set_mdio_dir = ax_bb_dir,</div><div class='del'>-	.set_mdio_data = ax_bb_set_data,</div><div class='del'>-	.get_mdio_data = ax_bb_get_data,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> /* setup code */</div><div class='ctx'> </div><div class='del'>-static int ax_mii_init(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct platform_device *pdev = to_platform_device(dev-&gt;dev.parent);</div><div class='del'>-	struct ei_device *ei_local = netdev_priv(dev);</div><div class='del'>-	struct ax_device *ax = to_ax_dev(dev);</div><div class='del'>-	int err, i;</div><div class='del'>-</div><div class='del'>-	ax-&gt;bb_ctrl.ops = &amp;bb_ops;</div><div class='del'>-	ax-&gt;addr_memr = ei_local-&gt;mem + AX_MEMR;</div><div class='del'>-	ax-&gt;mii_bus = alloc_mdio_bitbang(&amp;ax-&gt;bb_ctrl);</div><div class='del'>-	if (!ax-&gt;mii_bus) {</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ax-&gt;mii_bus-&gt;name = "ax88796_mii_bus";</div><div class='del'>-	ax-&gt;mii_bus-&gt;parent = dev-&gt;dev.parent;</div><div class='del'>-	snprintf(ax-&gt;mii_bus-&gt;id, MII_BUS_ID_SIZE, "%s-%x",</div><div class='del'>-		pdev-&gt;name, pdev-&gt;id);</div><div class='del'>-</div><div class='del'>-	ax-&gt;mii_bus-&gt;irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL);</div><div class='del'>-	if (!ax-&gt;mii_bus-&gt;irq) {</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto out_free_mdio_bitbang;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; PHY_MAX_ADDR; i++)</div><div class='del'>-		ax-&gt;mii_bus-&gt;irq[i] = PHY_POLL;</div><div class='del'>-</div><div class='del'>-	err = mdiobus_register(ax-&gt;mii_bus);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out_free_irq;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>- out_free_irq:</div><div class='del'>-	kfree(ax-&gt;mii_bus-&gt;irq);</div><div class='del'>- out_free_mdio_bitbang:</div><div class='del'>-	free_mdio_bitbang(ax-&gt;mii_bus);</div><div class='del'>- out:</div><div class='del'>-	return err;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void ax_initial_setup(struct net_device *dev, struct ei_device *ei_local)</div><div class='ctx'> {</div><div class='ctx'> 	void __iomem *ioaddr = ei_local-&gt;mem;</div><div class='hunk'>@@ -709,16 +701,22 @@ static int ax_init_dev(struct net_device *dev)</div><div class='ctx'> 	if (ax-&gt;plat-&gt;flags &amp; AXFLG_HAS_EEPROM) {</div><div class='ctx'> 		unsigned char SA_prom[32];</div><div class='ctx'> </div><div class='add'>+		ei_outb(6, ioaddr + EN0_RCNTLO);</div><div class='add'>+		ei_outb(0, ioaddr + EN0_RCNTHI);</div><div class='add'>+		ei_outb(0, ioaddr + EN0_RSARLO);</div><div class='add'>+		ei_outb(0, ioaddr + EN0_RSARHI);</div><div class='add'>+		ei_outb(E8390_RREAD + E8390_START, ioaddr + NE_CMD);</div><div class='ctx'> 		for (i = 0; i &lt; sizeof(SA_prom); i += 2) {</div><div class='ctx'> 			SA_prom[i] = ei_inb(ioaddr + NE_DATAPORT);</div><div class='ctx'> 			SA_prom[i + 1] = ei_inb(ioaddr + NE_DATAPORT);</div><div class='ctx'> 		}</div><div class='add'>+		ei_outb(ENISR_RDC, ioaddr + EN0_ISR);	/* Ack intr. */</div><div class='ctx'> </div><div class='ctx'> 		if (ax-&gt;plat-&gt;wordlength == 2)</div><div class='ctx'> 			for (i = 0; i &lt; 16; i++)</div><div class='ctx'> 				SA_prom[i] = SA_prom[i+i];</div><div class='ctx'> </div><div class='del'>-		memcpy(dev-&gt;dev_addr, SA_prom, ETH_ALEN);</div><div class='add'>+		eth_hw_addr_set(dev, SA_prom);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_AX88796_93CX6</div><div class='hunk'>@@ -735,7 +733,7 @@ static int ax_init_dev(struct net_device *dev)</div><div class='ctx'> 				       (__le16 __force *)mac_addr,</div><div class='ctx'> 				       sizeof(mac_addr) &gt;&gt; 1);</div><div class='ctx'> </div><div class='del'>-		memcpy(dev-&gt;dev_addr, mac_addr, ETH_ALEN);</div><div class='add'>+		eth_hw_addr_set(dev, mac_addr);</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> 	if (ax-&gt;plat-&gt;wordlength == 2) {</div><div class='hunk'>@@ -750,16 +748,24 @@ static int ax_init_dev(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	/* load the mac-address from the device */</div><div class='ctx'> 	if (ax-&gt;plat-&gt;flags &amp; AXFLG_MAC_FROMDEV) {</div><div class='add'>+		u8 addr[ETH_ALEN];</div><div class='add'>+</div><div class='ctx'> 		ei_outb(E8390_NODMA + E8390_PAGE1 + E8390_STOP,</div><div class='ctx'> 			ei_local-&gt;mem + E8390_CMD); /* 0x61 */</div><div class='ctx'> 		for (i = 0; i &lt; ETH_ALEN; i++)</div><div class='del'>-			dev-&gt;dev_addr[i] =</div><div class='del'>-				ei_inb(ioaddr + EN1_PHYS_SHIFT(i));</div><div class='add'>+			addr[i] = ei_inb(ioaddr + EN1_PHYS_SHIFT(i));</div><div class='add'>+		eth_hw_addr_set(dev, addr);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if ((ax-&gt;plat-&gt;flags &amp; AXFLG_MAC_FROMPLATFORM) &amp;&amp;</div><div class='ctx'> 	    ax-&gt;plat-&gt;mac_addr)</div><div class='del'>-		memcpy(dev-&gt;dev_addr, ax-&gt;plat-&gt;mac_addr, ETH_ALEN);</div><div class='add'>+		eth_hw_addr_set(dev, ax-&gt;plat-&gt;mac_addr);</div><div class='add'>+</div><div class='add'>+	if (!is_valid_ether_addr(dev-&gt;dev_addr)) {</div><div class='add'>+		eth_hw_addr_random(dev);</div><div class='add'>+		dev_info(&amp;dev-&gt;dev, "Using random MAC address: %pM\n",</div><div class='add'>+			 dev-&gt;dev_addr);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	ax_reset_8390(dev);</div><div class='ctx'> </div><div class='hunk'>@@ -775,24 +781,25 @@ static int ax_init_dev(struct net_device *dev)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	ei_local-&gt;reset_8390 = &amp;ax_reset_8390;</div><div class='del'>-	ei_local-&gt;block_input = &amp;ax_block_input;</div><div class='del'>-	ei_local-&gt;block_output = &amp;ax_block_output;</div><div class='add'>+	if (ax-&gt;plat-&gt;block_input)</div><div class='add'>+		ei_local-&gt;block_input = ax-&gt;plat-&gt;block_input;</div><div class='add'>+	else</div><div class='add'>+		ei_local-&gt;block_input = &amp;ax_block_input;</div><div class='add'>+	if (ax-&gt;plat-&gt;block_output)</div><div class='add'>+		ei_local-&gt;block_output = ax-&gt;plat-&gt;block_output;</div><div class='add'>+	else</div><div class='add'>+		ei_local-&gt;block_output = &amp;ax_block_output;</div><div class='ctx'> 	ei_local-&gt;get_8390_hdr = &amp;ax_get_8390_hdr;</div><div class='ctx'> 	ei_local-&gt;priv = 0;</div><div class='del'>-	ei_local-&gt;msg_enable = ax_msg_enable;</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;netdev_ops = &amp;ax_netdev_ops;</div><div class='ctx'> 	dev-&gt;ethtool_ops = &amp;ax_ethtool_ops;</div><div class='ctx'> </div><div class='del'>-	ret = ax_mii_init(dev);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto out_irq;</div><div class='del'>-</div><div class='ctx'> 	ax_NS8390_init(dev, 0);</div><div class='ctx'> </div><div class='ctx'> 	ret = register_netdev(dev);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto out_irq;</div><div class='add'>+		goto err_out;</div><div class='ctx'> </div><div class='ctx'> 	netdev_info(dev, "%dbit, irq %d, %lx, MAC: %pM\n",</div><div class='ctx'> 		    ei_local-&gt;word16 ? 16 : 8, dev-&gt;irq, dev-&gt;base_addr,</div><div class='hunk'>@@ -800,14 +807,11 @@ static int ax_init_dev(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>- out_irq:</div><div class='del'>-	/* cleanup irq */</div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='ctx'>  err_out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ax_remove(struct platform_device *pdev)</div><div class='add'>+static void ax_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = platform_get_drvdata(pdev);</div><div class='ctx'> 	struct ei_device *ei_local = netdev_priv(dev);</div><div class='hunk'>@@ -815,7 +819,6 @@ static int ax_remove(struct platform_device *pdev)</div><div class='ctx'> 	struct resource *mem;</div><div class='ctx'> </div><div class='ctx'> 	unregister_netdev(dev);</div><div class='del'>-	free_irq(dev-&gt;irq, dev);</div><div class='ctx'> </div><div class='ctx'> 	iounmap(ei_local-&gt;mem);</div><div class='ctx'> 	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='hunk'>@@ -827,9 +830,8 @@ static int ax_remove(struct platform_device *pdev)</div><div class='ctx'> 		release_mem_region(mem-&gt;start, resource_size(mem));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	platform_set_drvdata(pdev, NULL);</div><div class='ctx'> 	free_netdev(dev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -873,6 +875,9 @@ static int ax_probe(struct platform_device *pdev)</div><div class='ctx'> 	dev-&gt;irq = irq-&gt;start;</div><div class='ctx'> 	ax-&gt;irqflags = irq-&gt;flags &amp; IRQF_TRIGGER_MASK;</div><div class='ctx'> </div><div class='add'>+	if (irq-&gt;flags &amp;  IORESOURCE_IRQ_SHAREABLE)</div><div class='add'>+		ax-&gt;irqflags |= IRQF_SHARED;</div><div class='add'>+</div><div class='ctx'> 	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='ctx'> 	if (!mem) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "no MEM specified\n");</div><div class='hunk'>@@ -947,7 +952,8 @@ static int ax_probe(struct platform_device *pdev)</div><div class='ctx'> 	iounmap(ax-&gt;map2);</div><div class='ctx'> </div><div class='ctx'>  exit_mem2:</div><div class='del'>-	release_mem_region(mem2-&gt;start, mem2_size);</div><div class='add'>+	if (mem2)</div><div class='add'>+		release_mem_region(mem2-&gt;start, mem2_size);</div><div class='ctx'> </div><div class='ctx'>  exit_mem1:</div><div class='ctx'> 	iounmap(ei_local-&gt;mem);</div><div class='hunk'>@@ -956,6 +962,7 @@ static int ax_probe(struct platform_device *pdev)</div><div class='ctx'> 	release_mem_region(mem-&gt;start, mem_size);</div><div class='ctx'> </div><div class='ctx'>  exit_mem:</div><div class='add'>+	platform_set_drvdata(pdev, NULL);</div><div class='ctx'> 	free_netdev(dev);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='head'>diff --git a/drivers/net/ethernet/8390/axnet_cs.c b/drivers/net/ethernet/8390/axnet_cs.c<br/>index ec6eac1f8c95..7c8213011b5c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/axnet_cs.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/axnet_cs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/axnet_cs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/8390/axnet_cs.c</a></div><div class='hunk'>@@ -1,3 +1,5 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-1.0+</div><div class='add'>+</div><div class='ctx'> /*======================================================================</div><div class='ctx'> </div><div class='ctx'>     A PCMCIA ethernet driver for Asix AX88190-based cards</div><div class='hunk'>@@ -17,9 +19,7 @@</div><div class='ctx'> </div><div class='ctx'>     Written 1992,1993 by Donald Becker.</div><div class='ctx'>     Copyright 1993 United States Government as represented by the</div><div class='del'>-    Director, National Security Agency.  This software may be used and</div><div class='del'>-    distributed according to the terms of the GNU General Public License,</div><div class='del'>-    incorporated herein by reference.</div><div class='add'>+    Director, National Security Agency.</div><div class='ctx'>     Donald Becker may be reached at becker@scyld.com</div><div class='ctx'> </div><div class='ctx'> ======================================================================*/</div><div class='hunk'>@@ -46,7 +46,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/byteorder.h&gt;</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define AXNET_CMD	0x00</div><div class='ctx'> #define AXNET_DATAPORT	0x10	/* NatSemi-defined port window offset. */</div><div class='hunk'>@@ -83,9 +83,9 @@ static netdev_tx_t axnet_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 					  struct net_device *dev);</div><div class='ctx'> static struct net_device_stats *get_stats(struct net_device *dev);</div><div class='ctx'> static void set_multicast_list(struct net_device *dev);</div><div class='del'>-static void axnet_tx_timeout(struct net_device *dev);</div><div class='add'>+static void axnet_tx_timeout(struct net_device *dev, unsigned int txqueue);</div><div class='ctx'> static irqreturn_t ei_irq_wrapper(int irq, void *dev_id);</div><div class='del'>-static void ei_watchdog(u_long arg);</div><div class='add'>+static void ei_watchdog(struct timer_list *t);</div><div class='ctx'> static void axnet_reset_8390(struct net_device *dev);</div><div class='ctx'> </div><div class='ctx'> static int mdio_read(unsigned int addr, int phy_id, int loc);</div><div class='hunk'>@@ -104,7 +104,6 @@ static void AX88190_init(struct net_device *dev, int startp);</div><div class='ctx'> static int ax_open(struct net_device *dev);</div><div class='ctx'> static int ax_close(struct net_device *dev);</div><div class='ctx'> static irqreturn_t ax_interrupt(int irq, void *dev_id);</div><div class='del'>-static u32 axnet_msg_enable;</div><div class='ctx'> </div><div class='ctx'> /*====================================================================*/</div><div class='ctx'> </div><div class='hunk'>@@ -129,12 +128,11 @@ static inline struct axnet_dev *PRIV(struct net_device *dev)</div><div class='ctx'> static const struct net_device_ops axnet_netdev_ops = {</div><div class='ctx'> 	.ndo_open 		= axnet_open,</div><div class='ctx'> 	.ndo_stop		= axnet_close,</div><div class='del'>-	.ndo_do_ioctl		= axnet_ioctl,</div><div class='add'>+	.ndo_eth_ioctl		= axnet_ioctl,</div><div class='ctx'> 	.ndo_start_xmit		= axnet_start_xmit,</div><div class='ctx'> 	.ndo_tx_timeout		= axnet_tx_timeout,</div><div class='ctx'> 	.ndo_get_stats		= get_stats,</div><div class='ctx'> 	.ndo_set_rx_mode	= set_multicast_list,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='ctx'> 	.ndo_set_mac_address 	= eth_mac_addr,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> };</div><div class='hunk'>@@ -152,7 +150,6 @@ static int axnet_probe(struct pcmcia_device *link)</div><div class='ctx'> 	return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'>     ei_local = netdev_priv(dev);</div><div class='del'>-    ei_local-&gt;msg_enable = axnet_msg_enable;</div><div class='ctx'>     spin_lock_init(&amp;ei_local-&gt;page_lock);</div><div class='ctx'> </div><div class='ctx'>     info = PRIV(dev);</div><div class='hunk'>@@ -190,6 +187,7 @@ static int get_prom(struct pcmcia_device *link)</div><div class='ctx'> {</div><div class='ctx'>     struct net_device *dev = link-&gt;priv;</div><div class='ctx'>     unsigned int ioaddr = dev-&gt;base_addr;</div><div class='add'>+    u8 addr[ETH_ALEN];</div><div class='ctx'>     int i, j;</div><div class='ctx'> </div><div class='ctx'>     /* This is based on drivers/net/ethernet/8390/ne.c */</div><div class='hunk'>@@ -223,9 +221,11 @@ static int get_prom(struct pcmcia_device *link)</div><div class='ctx'> </div><div class='ctx'>     for (i = 0; i &lt; 6; i += 2) {</div><div class='ctx'> 	j = inw(ioaddr + AXNET_DATAPORT);</div><div class='del'>-	dev-&gt;dev_addr[i] = j &amp; 0xff;</div><div class='del'>-	dev-&gt;dev_addr[i+1] = j &gt;&gt; 8;</div><div class='add'>+	addr[i] = j &amp; 0xff;</div><div class='add'>+	addr[i+1] = j &gt;&gt; 8;</div><div class='ctx'>     }</div><div class='add'>+    eth_hw_addr_set(dev, addr);</div><div class='add'>+</div><div class='ctx'>     return 1;</div><div class='ctx'> } /* get_prom */</div><div class='ctx'> </div><div class='hunk'>@@ -484,7 +484,7 @@ static int axnet_open(struct net_device *dev)</div><div class='ctx'>     link-&gt;open++;</div><div class='ctx'> </div><div class='ctx'>     info-&gt;link_status = 0x00;</div><div class='del'>-    setup_timer(&amp;info-&gt;watchdog, ei_watchdog, (u_long)dev);</div><div class='add'>+    timer_setup(&amp;info-&gt;watchdog, ei_watchdog, 0);</div><div class='ctx'>     mod_timer(&amp;info-&gt;watchdog, jiffies + HZ);</div><div class='ctx'> </div><div class='ctx'>     return ax_open(dev);</div><div class='hunk'>@@ -504,7 +504,7 @@ static int axnet_close(struct net_device *dev)</div><div class='ctx'>     </div><div class='ctx'>     link-&gt;open--;</div><div class='ctx'>     netif_stop_queue(dev);</div><div class='del'>-    del_timer_sync(&amp;info-&gt;watchdog);</div><div class='add'>+    timer_delete_sync(&amp;info-&gt;watchdog);</div><div class='ctx'> </div><div class='ctx'>     return 0;</div><div class='ctx'> } /* axnet_close */</div><div class='hunk'>@@ -548,10 +548,10 @@ static irqreturn_t ei_irq_wrapper(int irq, void *dev_id)</div><div class='ctx'>     return ax_interrupt(irq, dev_id);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ei_watchdog(u_long arg)</div><div class='add'>+static void ei_watchdog(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-    struct net_device *dev = (struct net_device *)(arg);</div><div class='del'>-    struct axnet_dev *info = PRIV(dev);</div><div class='add'>+    struct axnet_dev *info = timer_container_of(info, t, watchdog);</div><div class='add'>+    struct net_device *dev = info-&gt;p_dev-&gt;priv;</div><div class='ctx'>     unsigned int nic_base = dev-&gt;base_addr;</div><div class='ctx'>     unsigned int mii_addr = nic_base + AXNET_MII_EEP;</div><div class='ctx'>     u_short link;</div><div class='hunk'>@@ -613,6 +613,7 @@ static int axnet_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)</div><div class='ctx'>     switch (cmd) {</div><div class='ctx'>     case SIOCGMIIPHY:</div><div class='ctx'> 	data-&gt;phy_id = info-&gt;phy_id;</div><div class='add'>+	fallthrough;</div><div class='ctx'>     case SIOCGMIIREG:		/* Read MII PHY register. */</div><div class='ctx'> 	data-&gt;val_out = mdio_read(mii_addr, data-&gt;phy_id, data-&gt;reg_num &amp; 0x1f);</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -649,7 +650,6 @@ static void block_input(struct net_device *dev, int count,</div><div class='ctx'> {</div><div class='ctx'>     unsigned int nic_base = dev-&gt;base_addr;</div><div class='ctx'>     struct ei_device *ei_local = netdev_priv(dev);</div><div class='del'>-    int xfer_count = count;</div><div class='ctx'>     char *buf = skb-&gt;data;</div><div class='ctx'> </div><div class='ctx'>     if ((netif_msg_rx_status(ei_local)) &amp;&amp; (count != 4))</div><div class='hunk'>@@ -659,9 +659,9 @@ static void block_input(struct net_device *dev, int count,</div><div class='ctx'>     outb_p(E8390_RREAD+E8390_START, nic_base + AXNET_CMD);</div><div class='ctx'> </div><div class='ctx'>     insw(nic_base + AXNET_DATAPORT,buf,count&gt;&gt;1);</div><div class='del'>-    if (count &amp; 0x01)</div><div class='del'>-	buf[count-1] = inb(nic_base + AXNET_DATAPORT), xfer_count++;</div><div class='del'>-</div><div class='add'>+    if (count &amp; 0x01) {</div><div class='add'>+	buf[count-1] = inb(nic_base + AXNET_DATAPORT);</div><div class='add'>+    }</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*====================================================================*/</div><div class='hunk'>@@ -767,7 +767,7 @@ module_pcmcia_driver(axnet_cs_driver);</div><div class='ctx'>   Paul Gortmaker	: tweak ANK's above multicast changes a bit.</div><div class='ctx'>   Paul Gortmaker	: update packet statistics for v2.1.x</div><div class='ctx'>   Alan Cox		: support arbitrary stupid port mappings on the</div><div class='del'>-  			  68K Macintosh. Support &gt;16bit I/O spaces</div><div class='add'>+			  68K Macintosh. Support &gt;16bit I/O spaces</div><div class='ctx'>   Paul Gortmaker	: add kmod support for auto-loading of the 8390</div><div class='ctx'> 			  module by all drivers that require it.</div><div class='ctx'>   Alan Cox		: Spinlocking work, added 'BUG_83C690'</div><div class='hunk'>@@ -900,12 +900,13 @@ static int ax_close(struct net_device *dev)</div><div class='ctx'> /**</div><div class='ctx'>  * axnet_tx_timeout - handle transmit time out condition</div><div class='ctx'>  * @dev: network device which has apparently fallen asleep</div><div class='add'>+ * @txqueue: unused</div><div class='ctx'>  *</div><div class='ctx'>  * Called by kernel when device never acknowledges a transmit has</div><div class='ctx'>  * completed (or failed) - i.e. never posted a Tx related interrupt.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static void axnet_tx_timeout(struct net_device *dev)</div><div class='add'>+static void axnet_tx_timeout(struct net_device *dev, unsigned int txqueue)</div><div class='ctx'> {</div><div class='ctx'> 	long e8390_base = dev-&gt;base_addr;</div><div class='ctx'> 	struct ei_device *ei_local = netdev_priv(dev);</div><div class='hunk'>@@ -1041,7 +1042,7 @@ static netdev_tx_t axnet_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 	{</div><div class='ctx'> 		ei_local-&gt;txing = 1;</div><div class='ctx'> 		NS8390_trigger_send(dev, send_length, output_page);</div><div class='del'>-		dev-&gt;trans_start = jiffies;</div><div class='add'>+		netif_trans_update(dev);</div><div class='ctx'> 		if (output_page == ei_local-&gt;tx_start_page) </div><div class='ctx'> 		{</div><div class='ctx'> 			ei_local-&gt;tx1 = -1;</div><div class='hunk'>@@ -1090,7 +1091,7 @@ static irqreturn_t ax_interrupt(int irq, void *dev_id)</div><div class='ctx'> 	long e8390_base;</div><div class='ctx'> 	int interrupts, nr_serviced = 0, i;</div><div class='ctx'> 	struct ei_device *ei_local;</div><div class='del'>-    	int handled = 0;</div><div class='add'>+	int handled = 0;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	e8390_base = dev-&gt;base_addr;</div><div class='hunk'>@@ -1270,11 +1271,13 @@ static void ei_tx_intr(struct net_device *dev)</div><div class='ctx'> 		{</div><div class='ctx'> 			ei_local-&gt;txing = 1;</div><div class='ctx'> 			NS8390_trigger_send(dev, ei_local-&gt;tx2, ei_local-&gt;tx_start_page + 6);</div><div class='del'>-			dev-&gt;trans_start = jiffies;</div><div class='del'>-			ei_local-&gt;tx2 = -1,</div><div class='add'>+			netif_trans_update(dev);</div><div class='add'>+			ei_local-&gt;tx2 = -1;</div><div class='ctx'> 			ei_local-&gt;lasttx = 2;</div><div class='add'>+		} else {</div><div class='add'>+			ei_local-&gt;lasttx = 20;</div><div class='add'>+			ei_local-&gt;txing = 0;</div><div class='ctx'> 		}</div><div class='del'>-		else ei_local-&gt;lasttx = 20, ei_local-&gt;txing = 0;	</div><div class='ctx'> 	}</div><div class='ctx'> 	else if (ei_local-&gt;tx2 &lt; 0) </div><div class='ctx'> 	{</div><div class='hunk'>@@ -1287,12 +1290,13 @@ static void ei_tx_intr(struct net_device *dev)</div><div class='ctx'> 		{</div><div class='ctx'> 			ei_local-&gt;txing = 1;</div><div class='ctx'> 			NS8390_trigger_send(dev, ei_local-&gt;tx1, ei_local-&gt;tx_start_page);</div><div class='del'>-			dev-&gt;trans_start = jiffies;</div><div class='add'>+			netif_trans_update(dev);</div><div class='ctx'> 			ei_local-&gt;tx1 = -1;</div><div class='ctx'> 			ei_local-&gt;lasttx = 1;</div><div class='add'>+		} else {</div><div class='add'>+			ei_local-&gt;lasttx = 10;</div><div class='add'>+			ei_local-&gt;txing = 0;</div><div class='ctx'> 		}</div><div class='del'>-		else</div><div class='del'>-			ei_local-&gt;lasttx = 10, ei_local-&gt;txing = 0;</div><div class='ctx'> 	}</div><div class='ctx'> //	else</div><div class='ctx'> //		netdev_warn(dev, "unexpected TX-done interrupt, lasttx=%d\n",</div><div class='hunk'>@@ -1583,12 +1587,12 @@ static void do_set_multicast_list(struct net_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> 	outb_p(E8390_NODMA + E8390_PAGE0, e8390_base + E8390_CMD);</div><div class='ctx'> </div><div class='del'>-  	if(dev-&gt;flags&amp;IFF_PROMISC)</div><div class='del'>-  		outb_p(E8390_RXCONFIG | 0x58, e8390_base + EN0_RXCR);</div><div class='add'>+	if(dev-&gt;flags&amp;IFF_PROMISC)</div><div class='add'>+		outb_p(E8390_RXCONFIG | 0x58, e8390_base + EN0_RXCR);</div><div class='ctx'> 	else if (dev-&gt;flags &amp; IFF_ALLMULTI || !netdev_mc_empty(dev))</div><div class='del'>-  		outb_p(E8390_RXCONFIG | 0x48, e8390_base + EN0_RXCR);</div><div class='del'>-  	else</div><div class='del'>-  		outb_p(E8390_RXCONFIG | 0x40, e8390_base + EN0_RXCR);</div><div class='add'>+		outb_p(E8390_RXCONFIG | 0x48, e8390_base + EN0_RXCR);</div><div class='add'>+	else</div><div class='add'>+		outb_p(E8390_RXCONFIG | 0x40, e8390_base + EN0_RXCR);</div><div class='ctx'> </div><div class='ctx'> 	outb_p(E8390_NODMA+E8390_PAGE0+E8390_START, e8390_base+E8390_CMD);</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/8390/etherh.c b/drivers/net/ethernet/8390/etherh.c<br/>index d686b9cac29f..e876fe52399a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/etherh.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/etherh.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/etherh.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/8390/etherh.c</a></div><div class='hunk'>@@ -1,12 +1,9 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='ctx'>  *  linux/drivers/acorn/net/etherh.c</div><div class='ctx'>  *</div><div class='ctx'>  *  Copyright (C) 2000-2002 Russell King</div><div class='ctx'>  *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- *</div><div class='ctx'>  * NS8390 I-cubed EtherH and ANT EtherM specific driver</div><div class='ctx'>  * Thanks to I-Cubed for information on their cards.</div><div class='ctx'>  * EtherM conversion (C) 1999 Chris Kemp and Tim Watterton</div><div class='hunk'>@@ -64,8 +61,6 @@ static char version[] =</div><div class='ctx'> </div><div class='ctx'> #include "lib8390.c"</div><div class='ctx'> </div><div class='del'>-static u32 etherh_msg_enable;</div><div class='del'>-</div><div class='ctx'> struct etherh_priv {</div><div class='ctx'> 	void __iomem	*ioc_fast;</div><div class='ctx'> 	void __iomem	*memc;</div><div class='hunk'>@@ -263,7 +258,7 @@ static int etherh_set_config(struct net_device *dev, struct ifmap *map)</div><div class='ctx'> 		 * media type, turn off automedia detection.</div><div class='ctx'> 		 */</div><div class='ctx'> 		dev-&gt;flags &amp;= ~IFF_AUTOMEDIA;</div><div class='del'>-		dev-&gt;if_port = map-&gt;port;</div><div class='add'>+		WRITE_ONCE(dev-&gt;if_port, map-&gt;port);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='hunk'>@@ -502,18 +497,6 @@ etherh_close(struct net_device *dev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * Initialisation</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void __init etherh_banner(void)</div><div class='del'>-{</div><div class='del'>-	static int version_printed;</div><div class='del'>-</div><div class='del'>-	if ((etherh_msg_enable &amp; NETIF_MSG_DRV) &amp;&amp; (version_printed++ == 0))</div><div class='del'>-		pr_info("%s", version);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * Read the ethernet address string from the on board rom.</div><div class='ctx'>  * This is an ascii string...</div><div class='ctx'>  */</div><div class='hunk'>@@ -572,32 +555,35 @@ static int __init etherm_addr(char *addr)</div><div class='ctx'> </div><div class='ctx'> static void etherh_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)</div><div class='ctx'> {</div><div class='del'>-	strlcpy(info-&gt;driver, DRV_NAME, sizeof(info-&gt;driver));</div><div class='del'>-	strlcpy(info-&gt;version, DRV_VERSION, sizeof(info-&gt;version));</div><div class='del'>-	strlcpy(info-&gt;bus_info, dev_name(dev-&gt;dev.parent),</div><div class='add'>+	strscpy(info-&gt;driver, DRV_NAME, sizeof(info-&gt;driver));</div><div class='add'>+	strscpy(info-&gt;version, DRV_VERSION, sizeof(info-&gt;version));</div><div class='add'>+	strscpy(info-&gt;bus_info, dev_name(dev-&gt;dev.parent),</div><div class='ctx'> 		sizeof(info-&gt;bus_info));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int etherh_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)</div><div class='add'>+static int etherh_get_link_ksettings(struct net_device *dev,</div><div class='add'>+				     struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='del'>-	cmd-&gt;supported	= etherh_priv(dev)-&gt;supported;</div><div class='del'>-	ethtool_cmd_speed_set(cmd, SPEED_10);</div><div class='del'>-	cmd-&gt;duplex	= DUPLEX_HALF;</div><div class='del'>-	cmd-&gt;port	= dev-&gt;if_port == IF_PORT_10BASET ? PORT_TP : PORT_BNC;</div><div class='del'>-	cmd-&gt;autoneg	= (dev-&gt;flags &amp; IFF_AUTOMEDIA ?</div><div class='del'>-			   AUTONEG_ENABLE : AUTONEG_DISABLE);</div><div class='add'>+	ethtool_convert_legacy_u32_to_link_mode(cmd-&gt;link_modes.supported,</div><div class='add'>+						etherh_priv(dev)-&gt;supported);</div><div class='add'>+	cmd-&gt;base.speed = SPEED_10;</div><div class='add'>+	cmd-&gt;base.duplex = DUPLEX_HALF;</div><div class='add'>+	cmd-&gt;base.port = dev-&gt;if_port == IF_PORT_10BASET ? PORT_TP : PORT_BNC;</div><div class='add'>+	cmd-&gt;base.autoneg = (dev-&gt;flags &amp; IFF_AUTOMEDIA ? AUTONEG_ENABLE :</div><div class='add'>+							  AUTONEG_DISABLE);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int etherh_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)</div><div class='add'>+static int etherh_set_link_ksettings(struct net_device *dev,</div><div class='add'>+				     const struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='del'>-	switch (cmd-&gt;autoneg) {</div><div class='add'>+	switch (cmd-&gt;base.autoneg) {</div><div class='ctx'> 	case AUTONEG_ENABLE:</div><div class='ctx'> 		dev-&gt;flags |= IFF_AUTOMEDIA;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case AUTONEG_DISABLE:</div><div class='del'>-		switch (cmd-&gt;port) {</div><div class='add'>+		switch (cmd-&gt;base.port) {</div><div class='ctx'> 		case PORT_TP:</div><div class='ctx'> 			dev-&gt;if_port = IF_PORT_10BASET;</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -636,12 +622,12 @@ static void etherh_set_msglevel(struct net_device *dev, u32 v)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops etherh_ethtool_ops = {</div><div class='del'>-	.get_settings	= etherh_get_settings,</div><div class='del'>-	.set_settings	= etherh_set_settings,</div><div class='del'>-	.get_drvinfo	= etherh_get_drvinfo,</div><div class='del'>-	.get_ts_info	= ethtool_op_get_ts_info,</div><div class='del'>-	.get_msglevel	= etherh_get_msglevel,</div><div class='del'>-	.set_msglevel	= etherh_set_msglevel,</div><div class='add'>+	.get_drvinfo		= etherh_get_drvinfo,</div><div class='add'>+	.get_ts_info		= ethtool_op_get_ts_info,</div><div class='add'>+	.get_msglevel		= etherh_get_msglevel,</div><div class='add'>+	.set_msglevel		= etherh_set_msglevel,</div><div class='add'>+	.get_link_ksettings	= etherh_get_link_ksettings,</div><div class='add'>+	.set_link_ksettings	= etherh_set_link_ksettings,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static const struct net_device_ops etherh_netdev_ops = {</div><div class='hunk'>@@ -654,7 +640,6 @@ static const struct net_device_ops etherh_netdev_ops = {</div><div class='ctx'> 	.ndo_set_rx_mode	= __ei_set_multicast_list,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> 	.ndo_set_mac_address	= eth_mac_addr,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='ctx'> #ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='ctx'> 	.ndo_poll_controller	= __ei_poll,</div><div class='ctx'> #endif</div><div class='hunk'>@@ -670,10 +655,9 @@ etherh_probe(struct expansion_card *ec, const struct ecard_id *id)</div><div class='ctx'> 	struct ei_device *ei_local;</div><div class='ctx'> 	struct net_device *dev;</div><div class='ctx'> 	struct etherh_priv *eh;</div><div class='add'>+	u8 addr[ETH_ALEN];</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	etherh_banner();</div><div class='del'>-</div><div class='ctx'> 	ret = ecard_request_resources(ec);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -741,12 +725,13 @@ etherh_probe(struct expansion_card *ec, const struct ecard_id *id)</div><div class='ctx'> 	spin_lock_init(&amp;ei_local-&gt;page_lock);</div><div class='ctx'> </div><div class='ctx'> 	if (ec-&gt;cid.product == PROD_ANT_ETHERM) {</div><div class='del'>-		etherm_addr(dev-&gt;dev_addr);</div><div class='add'>+		etherm_addr(addr);</div><div class='ctx'> 		ei_local-&gt;reg_offset = etherm_regoffsets;</div><div class='ctx'> 	} else {</div><div class='del'>-		etherh_addr(dev-&gt;dev_addr, ec);</div><div class='add'>+		etherh_addr(addr, ec);</div><div class='ctx'> 		ei_local-&gt;reg_offset = etherh_regoffsets;</div><div class='ctx'> 	}</div><div class='add'>+	eth_hw_addr_set(dev, addr);</div><div class='ctx'> </div><div class='ctx'> 	ei_local-&gt;name          = dev-&gt;name;</div><div class='ctx'> 	ei_local-&gt;word16        = 1;</div><div class='hunk'>@@ -758,7 +743,6 @@ etherh_probe(struct expansion_card *ec, const struct ecard_id *id)</div><div class='ctx'> 	ei_local-&gt;block_output  = etherh_block_output;</div><div class='ctx'> 	ei_local-&gt;get_8390_hdr  = etherh_get_header;</div><div class='ctx'> 	ei_local-&gt;interface_num = 0;</div><div class='del'>-	ei_local-&gt;msg_enable = etherh_msg_enable;</div><div class='ctx'> </div><div class='ctx'> 	etherh_reset(dev);</div><div class='ctx'> 	__NS8390_init(dev, 0);</div><div class='head'>diff --git a/drivers/net/ethernet/8390/hydra.c b/drivers/net/ethernet/8390/hydra.c<br/>index 0fe19d609c2e..fd9dcdc356e6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/hydra.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/hydra.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/hydra.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/8390/hydra.c</a></div><div class='hunk'>@@ -1,10 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='ctx'> /* New Hydra driver using generic 8390 core */</div><div class='ctx'> /* Based on old hydra driver by Topi Kanerva (topi@susanna.oulu.fi) */</div><div class='ctx'> </div><div class='del'>-/* This file is subject to the terms and conditions of the GNU General      */</div><div class='del'>-/* Public License.  See the file COPYING in the main directory of the       */</div><div class='del'>-/* Linux distribution for more details.                                     */</div><div class='del'>-</div><div class='ctx'> /* Peter De Schrijver (p2@mind.be) */</div><div class='ctx'> /* Oldenburg 2000 */</div><div class='ctx'> </div><div class='hunk'>@@ -66,7 +64,6 @@ static void hydra_block_input(struct net_device *dev, int count,</div><div class='ctx'> static void hydra_block_output(struct net_device *dev, int count,</div><div class='ctx'> 			       const unsigned char *buf, int start_page);</div><div class='ctx'> static void hydra_remove_one(struct zorro_dev *z);</div><div class='del'>-static u32 hydra_msg_enable;</div><div class='ctx'> </div><div class='ctx'> static struct zorro_device_id hydra_zorro_tbl[] = {</div><div class='ctx'>     { ZORRO_PROD_HYDRA_SYSTEMS_AMIGANET },</div><div class='hunk'>@@ -105,7 +102,6 @@ static const struct net_device_ops hydra_netdev_ops = {</div><div class='ctx'> 	.ndo_set_rx_mode	= __ei_set_multicast_list,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> 	.ndo_set_mac_address	= eth_mac_addr,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='ctx'> #ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='ctx'> 	.ndo_poll_controller	= __ei_poll,</div><div class='ctx'> #endif</div><div class='hunk'>@@ -118,9 +114,9 @@ static int hydra_init(struct zorro_dev *z)</div><div class='ctx'>     unsigned long ioaddr = board+HYDRA_NIC_BASE;</div><div class='ctx'>     const char name[] = "NE2000";</div><div class='ctx'>     int start_page, stop_page;</div><div class='add'>+    u8 macaddr[ETH_ALEN];</div><div class='ctx'>     int j;</div><div class='ctx'>     int err;</div><div class='del'>-    struct ei_device *ei_local;</div><div class='ctx'> </div><div class='ctx'>     static u32 hydra_offsets[16] = {</div><div class='ctx'> 	0x00, 0x02, 0x04, 0x06, 0x08, 0x0a, 0x0c, 0x0e,</div><div class='hunk'>@@ -132,15 +128,14 @@ static int hydra_init(struct zorro_dev *z)</div><div class='ctx'> 	return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'>     for (j = 0; j &lt; ETH_ALEN; j++)</div><div class='del'>-	dev-&gt;dev_addr[j] = *((u8 *)(board + HYDRA_ADDRPROM + 2*j));</div><div class='add'>+	macaddr[j] = *((u8 *)(board + HYDRA_ADDRPROM + 2*j));</div><div class='add'>+    eth_hw_addr_set(dev, macaddr);</div><div class='ctx'> </div><div class='ctx'>     /* We must set the 8390 for word mode. */</div><div class='ctx'>     z_writeb(0x4b, ioaddr + NE_EN0_DCFG);</div><div class='ctx'>     start_page = NESM_START_PG;</div><div class='ctx'>     stop_page = NESM_STOP_PG;</div><div class='ctx'> </div><div class='del'>-    ei_local = netdev_priv(dev);</div><div class='del'>-    ei_local-&gt;msg_enable = hydra_msg_enable;</div><div class='ctx'>     dev-&gt;base_addr = ioaddr;</div><div class='ctx'>     dev-&gt;irq = IRQ_AMIGA_PORTS;</div><div class='ctx'> </div><div class='hunk'>@@ -275,4 +270,5 @@ static void __exit hydra_cleanup_module(void)</div><div class='ctx'> module_init(hydra_init_module);</div><div class='ctx'> module_exit(hydra_cleanup_module);</div><div class='ctx'> </div><div class='add'>+MODULE_DESCRIPTION("Zorro-II Hydra 8390 ethernet driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/8390/lib8390.c b/drivers/net/ethernet/8390/lib8390.c<br/>index b96e8852b2d1..84aeb8054304 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/lib8390.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/lib8390.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/lib8390.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/8390/lib8390.c</a></div><div class='hunk'>@@ -1,3 +1,5 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-1.0+</div><div class='add'>+</div><div class='ctx'> /* 8390.c: A general NS8390 ethernet driver core for linux. */</div><div class='ctx'> /*</div><div class='ctx'> 	Written 1992-94 by Donald Becker.</div><div class='hunk'>@@ -5,9 +7,6 @@</div><div class='ctx'> 	Copyright 1993 United States Government as represented by the</div><div class='ctx'> 	Director, National Security Agency.</div><div class='ctx'> </div><div class='del'>-	This software may be used and distributed according to the terms</div><div class='del'>-	of the GNU General Public License, incorporated herein by reference.</div><div class='del'>-</div><div class='ctx'> 	The author may be reached as becker@scyld.com, or C/O</div><div class='ctx'> 	Scyld Computing Corporation</div><div class='ctx'> 	410 Severn Ave., Suite 210</div><div class='hunk'>@@ -50,6 +49,7 @@</div><div class='ctx'> </div><div class='ctx'>   */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/build_bug.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/jiffies.h&gt;</div><div class='hunk'>@@ -112,8 +112,10 @@ static void do_set_multicast_list(struct net_device *dev);</div><div class='ctx'> static void __NS8390_init(struct net_device *dev, int startp);</div><div class='ctx'> </div><div class='ctx'> static unsigned version_printed;</div><div class='del'>-static u32 msg_enable;</div><div class='del'>-module_param(msg_enable, uint, (S_IRUSR|S_IRGRP|S_IROTH));</div><div class='add'>+static int msg_enable;</div><div class='add'>+static const int default_msg_level = (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_RX_ERR |</div><div class='add'>+				     NETIF_MSG_TX_ERR);</div><div class='add'>+module_param(msg_enable, int, 0444);</div><div class='ctx'> MODULE_PARM_DESC(msg_enable, "Debug message level (see linux/netdevice.h for bitmap)");</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -251,7 +253,7 @@ static int __ei_close(struct net_device *dev)</div><div class='ctx'>  * completed (or failed) - i.e. never posted a Tx related interrupt.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static void __ei_tx_timeout(struct net_device *dev)</div><div class='add'>+static void __ei_tx_timeout(struct net_device *dev, unsigned int txqueue)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long e8390_base = dev-&gt;base_addr;</div><div class='ctx'> 	struct ei_device *ei_local = netdev_priv(dev);</div><div class='hunk'>@@ -596,11 +598,13 @@ static void ei_tx_intr(struct net_device *dev)</div><div class='ctx'> 		if (ei_local-&gt;tx2 &gt; 0) {</div><div class='ctx'> 			ei_local-&gt;txing = 1;</div><div class='ctx'> 			NS8390_trigger_send(dev, ei_local-&gt;tx2, ei_local-&gt;tx_start_page + 6);</div><div class='del'>-			dev-&gt;trans_start = jiffies;</div><div class='del'>-			ei_local-&gt;tx2 = -1,</div><div class='add'>+			netif_trans_update(dev);</div><div class='add'>+			ei_local-&gt;tx2 = -1;</div><div class='ctx'> 			ei_local-&gt;lasttx = 2;</div><div class='del'>-		} else</div><div class='del'>-			ei_local-&gt;lasttx = 20, ei_local-&gt;txing = 0;</div><div class='add'>+		} else {</div><div class='add'>+			ei_local-&gt;lasttx = 20;</div><div class='add'>+			ei_local-&gt;txing = 0;</div><div class='add'>+		}</div><div class='ctx'> 	} else if (ei_local-&gt;tx2 &lt; 0) {</div><div class='ctx'> 		if (ei_local-&gt;lasttx != 2  &amp;&amp;  ei_local-&gt;lasttx != -2)</div><div class='ctx'> 			pr_err("%s: bogus last_tx_buffer %d, tx2=%d\n",</div><div class='hunk'>@@ -609,11 +613,13 @@ static void ei_tx_intr(struct net_device *dev)</div><div class='ctx'> 		if (ei_local-&gt;tx1 &gt; 0) {</div><div class='ctx'> 			ei_local-&gt;txing = 1;</div><div class='ctx'> 			NS8390_trigger_send(dev, ei_local-&gt;tx1, ei_local-&gt;tx_start_page);</div><div class='del'>-			dev-&gt;trans_start = jiffies;</div><div class='add'>+			netif_trans_update(dev);</div><div class='ctx'> 			ei_local-&gt;tx1 = -1;</div><div class='ctx'> 			ei_local-&gt;lasttx = 1;</div><div class='del'>-		} else</div><div class='del'>-			ei_local-&gt;lasttx = 10, ei_local-&gt;txing = 0;</div><div class='add'>+		} else {</div><div class='add'>+			ei_local-&gt;lasttx = 10;</div><div class='add'>+			ei_local-&gt;txing = 0;</div><div class='add'>+		}</div><div class='ctx'> 	} /* else</div><div class='ctx'> 		netdev_warn(dev, "unexpected TX-done interrupt, lasttx=%d\n",</div><div class='ctx'> 			    ei_local-&gt;lasttx);</div><div class='hunk'>@@ -969,12 +975,14 @@ static void ethdev_setup(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct ei_device *ei_local = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	if ((msg_enable &amp; NETIF_MSG_DRV) &amp;&amp; (version_printed++ == 0))</div><div class='del'>-		pr_info("%s", version);</div><div class='del'>-</div><div class='ctx'> 	ether_setup(dev);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_init(&amp;ei_local-&gt;page_lock);</div><div class='add'>+</div><div class='add'>+	ei_local-&gt;msg_enable = netif_msg_init(msg_enable, default_msg_level);</div><div class='add'>+</div><div class='add'>+	if (netif_msg_drv(ei_local) &amp;&amp; (version_printed++ == 0))</div><div class='add'>+		pr_info("%s", version);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /**</div><div class='hunk'>@@ -1012,8 +1020,7 @@ static void __NS8390_init(struct net_device *dev, int startp)</div><div class='ctx'> 	    ? (0x48 | ENDCFG_WTS | (ei_local-&gt;bigendian ? ENDCFG_BOS : 0))</div><div class='ctx'> 	    : 0x48;</div><div class='ctx'> </div><div class='del'>-	if (sizeof(struct e8390_pkt_hdr) != 4)</div><div class='del'>-		panic("8390.c: header struct mispacked\n");</div><div class='add'>+	BUILD_BUG_ON(sizeof(struct e8390_pkt_hdr) != 4);</div><div class='ctx'> 	/* Follow National Semi's recommendations for initing the DP83902. */</div><div class='ctx'> 	ei_outb_p(E8390_NODMA+E8390_PAGE0+E8390_STOP, e8390_base+E8390_CMD); /* 0x21 */</div><div class='ctx'> 	ei_outb_p(endcfg, e8390_base + EN0_DCFG);	/* 0x48 or 0x49 */</div><div class='head'>diff --git a/drivers/net/ethernet/8390/mac8390.c b/drivers/net/ethernet/8390/mac8390.c<br/>index 65cf60f6718c..4a0a095a1a8a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/mac8390.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/mac8390.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/mac8390.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/8390/mac8390.c</a></div><div class='hunk'>@@ -1,11 +1,9 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-1.0+</div><div class='ctx'> /* mac8390.c: New driver for 8390-based Nubus (or Nubus-alike)</div><div class='ctx'>    Ethernet cards on Linux */</div><div class='ctx'> /* Based on the former daynaport.c driver, by Alan Cox.  Some code</div><div class='ctx'>    taken from or inspired by skeleton.c by Donald Becker, acenic.c by</div><div class='del'>-   Jes Sorensen, and ne2k-pci.c by Donald Becker and Paul Gortmaker.</div><div class='del'>-</div><div class='del'>-   This software may be used and distributed according to the terms of</div><div class='del'>-   the GNU Public License, incorporated herein by reference.  */</div><div class='add'>+   Jes Sorensen, and ne2k-pci.c by Donald Becker and Paul Gortmaker. */</div><div class='ctx'> </div><div class='ctx'> /* 2000-02-28: support added for Dayna and Kinetics cards by</div><div class='ctx'>    A.G.deWijn@phys.uu.nl */</div><div class='hunk'>@@ -123,7 +121,7 @@ enum mac8390_access {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> extern int mac8390_memtest(struct net_device *dev);</div><div class='del'>-static int mac8390_initdev(struct net_device *dev, struct nubus_dev *ndev,</div><div class='add'>+static int mac8390_initdev(struct net_device *dev, struct nubus_board *board,</div><div class='ctx'> 			   enum mac8390_type type);</div><div class='ctx'> </div><div class='ctx'> static int mac8390_open(struct net_device *dev);</div><div class='hunk'>@@ -153,11 +151,6 @@ static void dayna_block_input(struct net_device *dev, int count,</div><div class='ctx'> static void dayna_block_output(struct net_device *dev, int count,</div><div class='ctx'> 			       const unsigned char *buf, int start_page);</div><div class='ctx'> </div><div class='del'>-#define memcpy_fromio(a, b, c)	memcpy((a), (void *)(b), (c))</div><div class='del'>-#define memcpy_toio(a, b, c)	memcpy((void *)(a), (b), (c))</div><div class='del'>-</div><div class='del'>-#define memcmp_withio(a, b, c)	memcmp((a), (void *)(b), (c))</div><div class='del'>-</div><div class='ctx'> /* Slow Sane (16-bit chunk memory read/write) Cabletron uses this */</div><div class='ctx'> static void slow_sane_get_8390_hdr(struct net_device *dev,</div><div class='ctx'> 				   struct e8390_pkt_hdr *hdr, int ring_page);</div><div class='hunk'>@@ -167,13 +160,12 @@ static void slow_sane_block_output(struct net_device *dev, int count,</div><div class='ctx'> 				   const unsigned char *buf, int start_page);</div><div class='ctx'> static void word_memcpy_tocard(unsigned long tp, const void *fp, int count);</div><div class='ctx'> static void word_memcpy_fromcard(void *tp, unsigned long fp, int count);</div><div class='del'>-static u32 mac8390_msg_enable;</div><div class='ctx'> </div><div class='del'>-static enum mac8390_type __init mac8390_ident(struct nubus_dev *dev)</div><div class='add'>+static enum mac8390_type mac8390_ident(struct nubus_rsrc *fres)</div><div class='ctx'> {</div><div class='del'>-	switch (dev-&gt;dr_sw) {</div><div class='add'>+	switch (fres-&gt;dr_sw) {</div><div class='ctx'> 	case NUBUS_DRSW_3COM:</div><div class='del'>-		switch (dev-&gt;dr_hw) {</div><div class='add'>+		switch (fres-&gt;dr_hw) {</div><div class='ctx'> 		case NUBUS_DRHW_APPLE_SONIC_NB:</div><div class='ctx'> 		case NUBUS_DRHW_APPLE_SONIC_LC:</div><div class='ctx'> 		case NUBUS_DRHW_SONNET:</div><div class='hunk'>@@ -181,10 +173,9 @@ static enum mac8390_type __init mac8390_ident(struct nubus_dev *dev)</div><div class='ctx'> 		default:</div><div class='ctx'> 			return MAC8390_APPLE;</div><div class='ctx'> 		}</div><div class='del'>-		break;</div><div class='ctx'> </div><div class='ctx'> 	case NUBUS_DRSW_APPLE:</div><div class='del'>-		switch (dev-&gt;dr_hw) {</div><div class='add'>+		switch (fres-&gt;dr_hw) {</div><div class='ctx'> 		case NUBUS_DRHW_ASANTE_LC:</div><div class='ctx'> 			return MAC8390_NONE;</div><div class='ctx'> 		case NUBUS_DRHW_CABLETRON:</div><div class='hunk'>@@ -192,68 +183,69 @@ static enum mac8390_type __init mac8390_ident(struct nubus_dev *dev)</div><div class='ctx'> 		default:</div><div class='ctx'> 			return MAC8390_APPLE;</div><div class='ctx'> 		}</div><div class='del'>-		break;</div><div class='ctx'> </div><div class='ctx'> 	case NUBUS_DRSW_ASANTE:</div><div class='ctx'> 		return MAC8390_ASANTE;</div><div class='del'>-		break;</div><div class='ctx'> </div><div class='ctx'> 	case NUBUS_DRSW_TECHWORKS:</div><div class='ctx'> 	case NUBUS_DRSW_DAYNA2:</div><div class='ctx'> 	case NUBUS_DRSW_DAYNA_LC:</div><div class='del'>-		if (dev-&gt;dr_hw == NUBUS_DRHW_CABLETRON)</div><div class='add'>+		if (fres-&gt;dr_hw == NUBUS_DRHW_CABLETRON)</div><div class='ctx'> 			return MAC8390_CABLETRON;</div><div class='ctx'> 		else</div><div class='ctx'> 			return MAC8390_APPLE;</div><div class='del'>-		break;</div><div class='ctx'> </div><div class='ctx'> 	case NUBUS_DRSW_FARALLON:</div><div class='ctx'> 		return MAC8390_FARALLON;</div><div class='del'>-		break;</div><div class='ctx'> </div><div class='ctx'> 	case NUBUS_DRSW_KINETICS:</div><div class='del'>-		switch (dev-&gt;dr_hw) {</div><div class='add'>+		switch (fres-&gt;dr_hw) {</div><div class='ctx'> 		case NUBUS_DRHW_INTERLAN:</div><div class='ctx'> 			return MAC8390_INTERLAN;</div><div class='ctx'> 		default:</div><div class='ctx'> 			return MAC8390_KINETICS;</div><div class='ctx'> 		}</div><div class='del'>-		break;</div><div class='ctx'> </div><div class='ctx'> 	case NUBUS_DRSW_DAYNA:</div><div class='ctx'> 		/*</div><div class='ctx'> 		 * These correspond to Dayna Sonic cards</div><div class='ctx'> 		 * which use the macsonic driver</div><div class='ctx'> 		 */</div><div class='del'>-		if (dev-&gt;dr_hw == NUBUS_DRHW_SMC9194 ||</div><div class='del'>-		    dev-&gt;dr_hw == NUBUS_DRHW_INTERLAN)</div><div class='add'>+		if (fres-&gt;dr_hw == NUBUS_DRHW_SMC9194 ||</div><div class='add'>+		    fres-&gt;dr_hw == NUBUS_DRHW_INTERLAN)</div><div class='ctx'> 			return MAC8390_NONE;</div><div class='ctx'> 		else</div><div class='ctx'> 			return MAC8390_DAYNA;</div><div class='del'>-		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	return MAC8390_NONE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static enum mac8390_access __init mac8390_testio(volatile unsigned long membase)</div><div class='add'>+static enum mac8390_access mac8390_testio(unsigned long membase)</div><div class='ctx'> {</div><div class='del'>-	unsigned long outdata = 0xA5A0B5B0;</div><div class='del'>-	unsigned long indata =  0x00000000;</div><div class='add'>+	u32 outdata = 0xA5A0B5B0;</div><div class='add'>+	u32 indata = 0;</div><div class='add'>+</div><div class='ctx'> 	/* Try writing 32 bits */</div><div class='del'>-	memcpy_toio(membase, &amp;outdata, 4);</div><div class='del'>-	/* Now compare them */</div><div class='del'>-	if (memcmp_withio(&amp;outdata, membase, 4) == 0)</div><div class='add'>+	nubus_writel(outdata, membase);</div><div class='add'>+	/* Now read it back */</div><div class='add'>+	indata = nubus_readl(membase);</div><div class='add'>+	if (outdata == indata)</div><div class='ctx'> 		return ACCESS_32;</div><div class='add'>+</div><div class='add'>+	outdata = 0xC5C0D5D0;</div><div class='add'>+	indata = 0;</div><div class='add'>+</div><div class='ctx'> 	/* Write 16 bit output */</div><div class='ctx'> 	word_memcpy_tocard(membase, &amp;outdata, 4);</div><div class='ctx'> 	/* Now read it back */</div><div class='ctx'> 	word_memcpy_fromcard(&amp;indata, membase, 4);</div><div class='ctx'> 	if (outdata == indata)</div><div class='ctx'> 		return ACCESS_16;</div><div class='add'>+</div><div class='ctx'> 	return ACCESS_UNKNOWN;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __init mac8390_memsize(unsigned long membase)</div><div class='add'>+static int mac8390_memsize(unsigned long membase)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int i, j;</div><div class='hunk'>@@ -289,46 +281,47 @@ static int __init mac8390_memsize(unsigned long membase)</div><div class='ctx'> 	return i * 0x1000;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool __init mac8390_init(struct net_device *dev, struct nubus_dev *ndev,</div><div class='del'>-				enum mac8390_type cardtype)</div><div class='add'>+static bool mac8390_rsrc_init(struct net_device *dev,</div><div class='add'>+			      struct nubus_rsrc *fres,</div><div class='add'>+			      enum mac8390_type cardtype)</div><div class='ctx'> {</div><div class='add'>+	struct nubus_board *board = fres-&gt;board;</div><div class='ctx'> 	struct nubus_dir dir;</div><div class='ctx'> 	struct nubus_dirent ent;</div><div class='ctx'> 	int offset;</div><div class='ctx'> 	volatile unsigned short *i;</div><div class='add'>+	u8 addr[ETH_ALEN];</div><div class='ctx'> </div><div class='del'>-	printk_once(KERN_INFO pr_fmt("%s"), version);</div><div class='del'>-</div><div class='del'>-	dev-&gt;irq = SLOT2IRQ(ndev-&gt;board-&gt;slot);</div><div class='add'>+	dev-&gt;irq = SLOT2IRQ(board-&gt;slot);</div><div class='ctx'> 	/* This is getting to be a habit */</div><div class='del'>-	dev-&gt;base_addr = (ndev-&gt;board-&gt;slot_addr |</div><div class='del'>-			  ((ndev-&gt;board-&gt;slot &amp; 0xf) &lt;&lt; 20));</div><div class='add'>+	dev-&gt;base_addr = board-&gt;slot_addr | ((board-&gt;slot &amp; 0xf) &lt;&lt; 20);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Get some Nubus info - we will trust the card's idea</div><div class='ctx'> 	 * of where its memory and registers are.</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	if (nubus_get_func_dir(ndev, &amp;dir) == -1) {</div><div class='del'>-		pr_err("%s: Unable to get Nubus functional directory for slot %X!\n",</div><div class='del'>-		       dev-&gt;name, ndev-&gt;board-&gt;slot);</div><div class='add'>+	if (nubus_get_func_dir(fres, &amp;dir) == -1) {</div><div class='add'>+		dev_err(&amp;board-&gt;dev,</div><div class='add'>+			"Unable to get Nubus functional directory\n");</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Get the MAC address */</div><div class='ctx'> 	if (nubus_find_rsrc(&amp;dir, NUBUS_RESID_MAC_ADDRESS, &amp;ent) == -1) {</div><div class='del'>-		pr_info("%s: Couldn't get MAC address!\n", dev-&gt;name);</div><div class='add'>+		dev_info(&amp;board-&gt;dev, "MAC address resource not found\n");</div><div class='ctx'> 		return false;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	nubus_get_rsrc_mem(dev-&gt;dev_addr, &amp;ent, 6);</div><div class='add'>+	nubus_get_rsrc_mem(addr, &amp;ent, 6);</div><div class='add'>+	eth_hw_addr_set(dev, addr);</div><div class='ctx'> </div><div class='ctx'> 	if (useresources[cardtype] == 1) {</div><div class='ctx'> 		nubus_rewinddir(&amp;dir);</div><div class='ctx'> 		if (nubus_find_rsrc(&amp;dir, NUBUS_RESID_MINOR_BASEOS,</div><div class='ctx'> 				    &amp;ent) == -1) {</div><div class='del'>-			pr_err("%s: Memory offset resource for slot %X not found!\n",</div><div class='del'>-			       dev-&gt;name, ndev-&gt;board-&gt;slot);</div><div class='add'>+			dev_err(&amp;board-&gt;dev,</div><div class='add'>+				"Memory offset resource not found\n");</div><div class='ctx'> 			return false;</div><div class='ctx'> 		}</div><div class='ctx'> 		nubus_get_rsrc_mem(&amp;offset, &amp;ent, 4);</div><div class='hunk'>@@ -338,8 +331,8 @@ static bool __init mac8390_init(struct net_device *dev, struct nubus_dev *ndev,</div><div class='ctx'> 		nubus_rewinddir(&amp;dir);</div><div class='ctx'> 		if (nubus_find_rsrc(&amp;dir, NUBUS_RESID_MINOR_LENGTH,</div><div class='ctx'> 				    &amp;ent) == -1) {</div><div class='del'>-			pr_info("%s: Memory length resource for slot %X not found, probing\n",</div><div class='del'>-				dev-&gt;name, ndev-&gt;board-&gt;slot);</div><div class='add'>+			dev_info(&amp;board-&gt;dev,</div><div class='add'>+				 "Memory length resource not found, probing\n");</div><div class='ctx'> 			offset = mac8390_memsize(dev-&gt;mem_start);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			nubus_get_rsrc_mem(&amp;offset, &amp;ent, 4);</div><div class='hunk'>@@ -349,25 +342,25 @@ static bool __init mac8390_init(struct net_device *dev, struct nubus_dev *ndev,</div><div class='ctx'> 		switch (cardtype) {</div><div class='ctx'> 		case MAC8390_KINETICS:</div><div class='ctx'> 		case MAC8390_DAYNA: /* it's the same */</div><div class='del'>-			dev-&gt;base_addr = (int)(ndev-&gt;board-&gt;slot_addr +</div><div class='add'>+			dev-&gt;base_addr = (int)(board-&gt;slot_addr +</div><div class='ctx'> 					       DAYNA_8390_BASE);</div><div class='del'>-			dev-&gt;mem_start = (int)(ndev-&gt;board-&gt;slot_addr +</div><div class='add'>+			dev-&gt;mem_start = (int)(board-&gt;slot_addr +</div><div class='ctx'> 					       DAYNA_8390_MEM);</div><div class='ctx'> 			dev-&gt;mem_end = dev-&gt;mem_start +</div><div class='ctx'> 				       mac8390_memsize(dev-&gt;mem_start);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case MAC8390_INTERLAN:</div><div class='del'>-			dev-&gt;base_addr = (int)(ndev-&gt;board-&gt;slot_addr +</div><div class='add'>+			dev-&gt;base_addr = (int)(board-&gt;slot_addr +</div><div class='ctx'> 					       INTERLAN_8390_BASE);</div><div class='del'>-			dev-&gt;mem_start = (int)(ndev-&gt;board-&gt;slot_addr +</div><div class='add'>+			dev-&gt;mem_start = (int)(board-&gt;slot_addr +</div><div class='ctx'> 					       INTERLAN_8390_MEM);</div><div class='ctx'> 			dev-&gt;mem_end = dev-&gt;mem_start +</div><div class='ctx'> 				       mac8390_memsize(dev-&gt;mem_start);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case MAC8390_CABLETRON:</div><div class='del'>-			dev-&gt;base_addr = (int)(ndev-&gt;board-&gt;slot_addr +</div><div class='add'>+			dev-&gt;base_addr = (int)(board-&gt;slot_addr +</div><div class='ctx'> 					       CABLETRON_8390_BASE);</div><div class='del'>-			dev-&gt;mem_start = (int)(ndev-&gt;board-&gt;slot_addr +</div><div class='add'>+			dev-&gt;mem_start = (int)(board-&gt;slot_addr +</div><div class='ctx'> 					       CABLETRON_8390_MEM);</div><div class='ctx'> 			/* The base address is unreadable if 0x00</div><div class='ctx'> 			 * has been written to the command register</div><div class='hunk'>@@ -382,8 +375,8 @@ static bool __init mac8390_init(struct net_device *dev, struct nubus_dev *ndev,</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		default:</div><div class='del'>-			pr_err("Card type %s is unsupported, sorry\n",</div><div class='del'>-			       ndev-&gt;board-&gt;name);</div><div class='add'>+			dev_err(&amp;board-&gt;dev,</div><div class='add'>+				"No known base address for card type\n");</div><div class='ctx'> 			return false;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -391,100 +384,82 @@ static bool __init mac8390_init(struct net_device *dev, struct nubus_dev *ndev,</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct net_device * __init mac8390_probe(int unit)</div><div class='add'>+static int mac8390_device_probe(struct nubus_board *board)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev;</div><div class='del'>-	struct nubus_dev *ndev = NULL;</div><div class='ctx'> 	int err = -ENODEV;</div><div class='del'>-	struct ei_device *ei_local;</div><div class='del'>-</div><div class='del'>-	static unsigned int slots;</div><div class='del'>-</div><div class='del'>-	enum mac8390_type cardtype;</div><div class='del'>-</div><div class='del'>-	/* probably should check for Nubus instead */</div><div class='del'>-</div><div class='del'>-	if (!MACH_IS_MAC)</div><div class='del'>-		return ERR_PTR(-ENODEV);</div><div class='add'>+	struct nubus_rsrc *fres;</div><div class='add'>+	enum mac8390_type cardtype = MAC8390_NONE;</div><div class='ctx'> </div><div class='ctx'> 	dev = ____alloc_ei_netdev(0);</div><div class='ctx'> 	if (!dev)</div><div class='del'>-		return ERR_PTR(-ENOMEM);</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> </div><div class='del'>-	if (unit &gt;= 0)</div><div class='del'>-		sprintf(dev-&gt;name, "eth%d", unit);</div><div class='add'>+	SET_NETDEV_DEV(dev, &amp;board-&gt;dev);</div><div class='ctx'> </div><div class='del'>-	while ((ndev = nubus_find_type(NUBUS_CAT_NETWORK, NUBUS_TYPE_ETHERNET,</div><div class='del'>-				       ndev))) {</div><div class='del'>-		/* Have we seen it already? */</div><div class='del'>-		if (slots &amp; (1 &lt;&lt; ndev-&gt;board-&gt;slot))</div><div class='add'>+	for_each_board_func_rsrc(board, fres) {</div><div class='add'>+		if (fres-&gt;category != NUBUS_CAT_NETWORK ||</div><div class='add'>+		    fres-&gt;type != NUBUS_TYPE_ETHERNET)</div><div class='ctx'> 			continue;</div><div class='del'>-		slots |= 1 &lt;&lt; ndev-&gt;board-&gt;slot;</div><div class='ctx'> </div><div class='del'>-		cardtype = mac8390_ident(ndev);</div><div class='add'>+		cardtype = mac8390_ident(fres);</div><div class='ctx'> 		if (cardtype == MAC8390_NONE)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		if (!mac8390_init(dev, ndev, cardtype))</div><div class='del'>-			continue;</div><div class='del'>-</div><div class='del'>-		/* Do the nasty 8390 stuff */</div><div class='del'>-		if (!mac8390_initdev(dev, ndev, cardtype))</div><div class='add'>+		if (mac8390_rsrc_init(dev, fres, cardtype))</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	if (!ndev)</div><div class='add'>+	if (!fres)</div><div class='ctx'> 		goto out;</div><div class='ctx'> </div><div class='del'>-	 ei_local = netdev_priv(dev);</div><div class='del'>-	 ei_local-&gt;msg_enable = mac8390_msg_enable;</div><div class='add'>+	err = mac8390_initdev(dev, board, cardtype);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='ctx'> 	err = register_netdev(dev);</div><div class='ctx'> 	if (err)</div><div class='ctx'> 		goto out;</div><div class='del'>-	return dev;</div><div class='add'>+</div><div class='add'>+	nubus_set_drvdata(board, dev);</div><div class='add'>+	return 0;</div><div class='ctx'> </div><div class='ctx'> out:</div><div class='ctx'> 	free_netdev(dev);</div><div class='del'>-	return ERR_PTR(err);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void mac8390_device_remove(struct nubus_board *board)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = nubus_get_drvdata(board);</div><div class='add'>+</div><div class='add'>+	unregister_netdev(dev);</div><div class='add'>+	free_netdev(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef MODULE</div><div class='add'>+static struct nubus_driver mac8390_driver = {</div><div class='add'>+	.probe = mac8390_device_probe,</div><div class='add'>+	.remove = mac8390_device_remove,</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = KBUILD_MODNAME,</div><div class='add'>+		.owner = THIS_MODULE,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> MODULE_AUTHOR("David Huggins-Daines &lt;dhd@debian.org&gt; and others");</div><div class='ctx'> MODULE_DESCRIPTION("Macintosh NS8390-based Nubus Ethernet driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='del'>-/* overkill, of course */</div><div class='del'>-static struct net_device *dev_mac8390[15];</div><div class='del'>-int init_module(void)</div><div class='add'>+static int __init mac8390_init(void)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='del'>-	for (i = 0; i &lt; 15; i++) {</div><div class='del'>-		struct net_device *dev = mac8390_probe(-1);</div><div class='del'>-		if (IS_ERR(dev))</div><div class='del'>-			break;</div><div class='del'>-		dev_mac890[i] = dev;</div><div class='del'>-	}</div><div class='del'>-	if (!i) {</div><div class='del'>-		pr_notice("No useable cards found, driver NOT installed.\n");</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-	return 0;</div><div class='add'>+	return nubus_driver_register(&amp;mac8390_driver);</div><div class='ctx'> }</div><div class='add'>+module_init(mac8390_init);</div><div class='ctx'> </div><div class='del'>-void cleanup_module(void)</div><div class='add'>+static void __exit mac8390_exit(void)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='del'>-	for (i = 0; i &lt; 15; i++) {</div><div class='del'>-		struct net_device *dev = dev_mac890[i];</div><div class='del'>-		if (dev) {</div><div class='del'>-			unregister_netdev(dev);</div><div class='del'>-			free_netdev(dev);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	nubus_driver_unregister(&amp;mac8390_driver);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-#endif /* MODULE */</div><div class='add'>+module_exit(mac8390_exit);</div><div class='ctx'> </div><div class='ctx'> static const struct net_device_ops mac8390_netdev_ops = {</div><div class='ctx'> 	.ndo_open 		= mac8390_open,</div><div class='hunk'>@@ -495,15 +470,13 @@ static const struct net_device_ops mac8390_netdev_ops = {</div><div class='ctx'> 	.ndo_set_rx_mode	= __ei_set_multicast_list,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> 	.ndo_set_mac_address 	= eth_mac_addr,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='ctx'> #ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='ctx'> 	.ndo_poll_controller	= __ei_poll,</div><div class='ctx'> #endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init mac8390_initdev(struct net_device *dev,</div><div class='del'>-				  struct nubus_dev *ndev,</div><div class='del'>-				  enum mac8390_type type)</div><div class='add'>+static int mac8390_initdev(struct net_device *dev, struct nubus_board *board,</div><div class='add'>+			   enum mac8390_type type)</div><div class='ctx'> {</div><div class='ctx'> 	static u32 fwrd4_offsets[16] = {</div><div class='ctx'> 		0,      4,      8,      12,</div><div class='hunk'>@@ -554,7 +527,8 @@ static int __init mac8390_initdev(struct net_device *dev,</div><div class='ctx'> 	case MAC8390_APPLE:</div><div class='ctx'> 		switch (mac8390_testio(dev-&gt;mem_start)) {</div><div class='ctx'> 		case ACCESS_UNKNOWN:</div><div class='del'>-			pr_err("Don't know how to access card memory!\n");</div><div class='add'>+			dev_err(&amp;board-&gt;dev,</div><div class='add'>+				"Don't know how to access card memory\n");</div><div class='ctx'> 			return -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 		case ACCESS_16:</div><div class='hunk'>@@ -620,21 +594,18 @@ static int __init mac8390_initdev(struct net_device *dev,</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='del'>-		pr_err("Card type %s is unsupported, sorry\n",</div><div class='del'>-		       ndev-&gt;board-&gt;name);</div><div class='add'>+		dev_err(&amp;board-&gt;dev, "Unsupported card type\n");</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	__NS8390_init(dev, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* Good, done, now spit out some messages */</div><div class='del'>-	pr_info("%s: %s in slot %X (type %s)\n",</div><div class='del'>-		dev-&gt;name, ndev-&gt;board-&gt;name, ndev-&gt;board-&gt;slot,</div><div class='del'>-		cardname[type]);</div><div class='del'>-	pr_info("MAC %pM IRQ %d, %d KB shared memory at %#lx, %d-bit access.\n",</div><div class='del'>-		dev-&gt;dev_addr, dev-&gt;irq,</div><div class='del'>-		(unsigned int)(dev-&gt;mem_end - dev-&gt;mem_start) &gt;&gt; 10,</div><div class='del'>-		dev-&gt;mem_start, access_bitmode ? 32 : 16);</div><div class='add'>+	dev_info(&amp;board-&gt;dev, "%s (type %s)\n", board-&gt;name, cardname[type]);</div><div class='add'>+	dev_info(&amp;board-&gt;dev, "MAC %pM, IRQ %d, %d KB shared memory at %#lx, %d-bit access.\n",</div><div class='add'>+		 dev-&gt;dev_addr, dev-&gt;irq,</div><div class='add'>+		 (unsigned int)(dev-&gt;mem_end - dev-&gt;mem_start) &gt;&gt; 10,</div><div class='add'>+		 dev-&gt;mem_start, access_bitmode ? 32 : 16);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -734,7 +705,7 @@ static void sane_get_8390_hdr(struct net_device *dev,</div><div class='ctx'> 			      struct e8390_pkt_hdr *hdr, int ring_page)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long hdr_start = (ring_page - WD_START_PG)&lt;&lt;8;</div><div class='del'>-	memcpy_fromio(hdr, dev-&gt;mem_start + hdr_start, 4);</div><div class='add'>+	memcpy_fromio(hdr, (void __iomem *)dev-&gt;mem_start + hdr_start, 4);</div><div class='ctx'> 	/* Fix endianness */</div><div class='ctx'> 	hdr-&gt;count = swab16(hdr-&gt;count);</div><div class='ctx'> }</div><div class='hunk'>@@ -748,13 +719,16 @@ static void sane_block_input(struct net_device *dev, int count,</div><div class='ctx'> 	if (xfer_start + count &gt; ei_status.rmem_end) {</div><div class='ctx'> 		/* We must wrap the input move. */</div><div class='ctx'> 		int semi_count = ei_status.rmem_end - xfer_start;</div><div class='del'>-		memcpy_fromio(skb-&gt;data, dev-&gt;mem_start + xfer_base,</div><div class='add'>+		memcpy_fromio(skb-&gt;data,</div><div class='add'>+			      (void __iomem *)dev-&gt;mem_start + xfer_base,</div><div class='ctx'> 			      semi_count);</div><div class='ctx'> 		count -= semi_count;</div><div class='del'>-		memcpy_fromio(skb-&gt;data + semi_count, ei_status.rmem_start,</div><div class='del'>-			      count);</div><div class='add'>+		memcpy_fromio(skb-&gt;data + semi_count,</div><div class='add'>+			      (void __iomem *)ei_status.rmem_start, count);</div><div class='ctx'> 	} else {</div><div class='del'>-		memcpy_fromio(skb-&gt;data, dev-&gt;mem_start + xfer_base, count);</div><div class='add'>+		memcpy_fromio(skb-&gt;data,</div><div class='add'>+			      (void __iomem *)dev-&gt;mem_start + xfer_base,</div><div class='add'>+			      count);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -763,7 +737,7 @@ static void sane_block_output(struct net_device *dev, int count,</div><div class='ctx'> {</div><div class='ctx'> 	long shmem = (start_page - WD_START_PG)&lt;&lt;8;</div><div class='ctx'> </div><div class='del'>-	memcpy_toio(dev-&gt;mem_start + shmem, buf, count);</div><div class='add'>+	memcpy_toio((void __iomem *)dev-&gt;mem_start + shmem, buf, count);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* dayna block input/output */</div><div class='head'>diff --git a/drivers/net/ethernet/8390/mcf8390.c b/drivers/net/ethernet/8390/mcf8390.c<br/>index e1c055574a11..94ff8364cdf0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/mcf8390.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/mcf8390.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/mcf8390.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/8390/mcf8390.c</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='ctx'>  *  Support for ColdFire CPU based boards using a NS8390 Ethernet device.</div><div class='ctx'>  *</div><div class='hunk'>@@ -5,9 +6,6 @@</div><div class='ctx'>  *</div><div class='ctx'>  *  (C) Copyright 2012,  Greg Ungerer &lt;gerg@uclinux.org&gt;</div><div class='ctx'>  *</div><div class='del'>- *  This file is subject to the terms and conditions of the GNU General Public</div><div class='del'>- *  License.  See the file COPYING in the main directory of the Linux</div><div class='del'>- *  distribution for more details.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -38,7 +36,6 @@ static const char version[] =</div><div class='ctx'> </div><div class='ctx'> #define NESM_START_PG	0x40	/* First page of TX buffer */</div><div class='ctx'> #define NESM_STOP_PG	0x80	/* Last page +1 of RX ring */</div><div class='del'>-static u32 mcf8390_msg_enable;</div><div class='ctx'> </div><div class='ctx'> #ifdef NE2000_ODDOFFSET</div><div class='ctx'> /*</div><div class='hunk'>@@ -308,7 +305,6 @@ static const struct net_device_ops mcf8390_netdev_ops = {</div><div class='ctx'> 	.ndo_set_rx_mode	= __ei_set_multicast_list,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> 	.ndo_set_mac_address	= eth_mac_addr,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='ctx'> #ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='ctx'> 	.ndo_poll_controller	= __ei_poll,</div><div class='ctx'> #endif</div><div class='hunk'>@@ -376,8 +372,7 @@ static int mcf8390_init(struct net_device *dev)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ETH_ALEN; i++)</div><div class='del'>-		dev-&gt;dev_addr[i] = SA_prom[i];</div><div class='add'>+	eth_hw_addr_set(dev, SA_prom);</div><div class='ctx'> </div><div class='ctx'> 	netdev_dbg(dev, "Found ethernet address: %pM\n", dev-&gt;dev_addr);</div><div class='ctx'> </div><div class='hunk'>@@ -408,16 +403,13 @@ static int mcf8390_init(struct net_device *dev)</div><div class='ctx'> static int mcf8390_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev;</div><div class='del'>-	struct ei_device *ei_local;</div><div class='del'>-	struct resource *mem, *irq;</div><div class='add'>+	struct resource *mem;</div><div class='ctx'> 	resource_size_t msize;</div><div class='del'>-	int ret;</div><div class='add'>+	int ret, irq;</div><div class='ctx'> </div><div class='del'>-	irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);</div><div class='del'>-	if (irq == NULL) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "no IRQ specified?\n");</div><div class='add'>+	irq = platform_get_irq(pdev, 0);</div><div class='add'>+	if (irq &lt; 0)</div><div class='ctx'> 		return -ENXIO;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='ctx'> 	if (mem == NULL) {</div><div class='hunk'>@@ -436,10 +428,8 @@ static int mcf8390_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	SET_NETDEV_DEV(dev, &amp;pdev-&gt;dev);</div><div class='ctx'> 	platform_set_drvdata(pdev, dev);</div><div class='del'>-	ei_local = netdev_priv(dev);</div><div class='del'>-	ei_local-&gt;msg_enable = mcf8390_msg_enable;</div><div class='ctx'> </div><div class='del'>-	dev-&gt;irq = irq-&gt;start;</div><div class='add'>+	dev-&gt;irq = irq;</div><div class='ctx'> 	dev-&gt;base_addr = mem-&gt;start;</div><div class='ctx'> </div><div class='ctx'> 	ret = mcf8390_init(dev);</div><div class='hunk'>@@ -451,17 +441,15 @@ static int mcf8390_probe(struct platform_device *pdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mcf8390_remove(struct platform_device *pdev)</div><div class='add'>+static void mcf8390_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = platform_get_drvdata(pdev);</div><div class='ctx'> 	struct resource *mem;</div><div class='ctx'> </div><div class='ctx'> 	unregister_netdev(dev);</div><div class='ctx'> 	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='del'>-	if (mem)</div><div class='del'>-		release_mem_region(mem-&gt;start, resource_size(mem));</div><div class='add'>+	release_mem_region(mem-&gt;start, resource_size(mem));</div><div class='ctx'> 	free_netdev(dev);</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver mcf8390_drv = {</div><div class='head'>diff --git a/drivers/net/ethernet/8390/ne.c b/drivers/net/ethernet/8390/ne.c<br/>index c063b410a163..961019c32842 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/ne.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/ne.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/ne.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/8390/ne.c</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-1.0+</div><div class='ctx'> /* ne.c: A general non-shared-memory NS8390 ethernet driver for linux. */</div><div class='ctx'> /*</div><div class='ctx'>     Written 1992-94 by Donald Becker.</div><div class='hunk'>@@ -5,9 +6,6 @@</div><div class='ctx'>     Copyright 1993 United States Government as represented by the</div><div class='ctx'>     Director, National Security Agency.</div><div class='ctx'> </div><div class='del'>-    This software may be used and distributed according to the terms</div><div class='del'>-    of the GNU General Public License, incorporated herein by reference.</div><div class='del'>-</div><div class='ctx'>     The author may be reached as becker@scyld.com, or C/O</div><div class='ctx'>     Scyld Computing Corporation, 410 Severn Ave., Suite 210, Annapolis MD 21403</div><div class='ctx'> </div><div class='hunk'>@@ -52,6 +50,7 @@ static const char version2[] =</div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='ctx'> #include &lt;linux/jiffies.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;net/Space.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -74,10 +73,10 @@ static int bad[MAX_NE_CARDS];</div><div class='ctx'> static u32 ne_msg_enable;</div><div class='ctx'> </div><div class='ctx'> #ifdef MODULE</div><div class='del'>-module_param_array(io, int, NULL, 0);</div><div class='del'>-module_param_array(irq, int, NULL, 0);</div><div class='add'>+module_param_hw_array(io, int, ioport, NULL, 0);</div><div class='add'>+module_param_hw_array(irq, int, irq, NULL, 0);</div><div class='ctx'> module_param_array(bad, int, NULL, 0);</div><div class='del'>-module_param_named(msg_enable, ne_msg_enable, uint, (S_IRUSR|S_IRGRP|S_IROTH));</div><div class='add'>+module_param_named(msg_enable, ne_msg_enable, uint, 0444);</div><div class='ctx'> MODULE_PARM_DESC(io, "I/O base address(es),required");</div><div class='ctx'> MODULE_PARM_DESC(irq, "IRQ number(s)");</div><div class='ctx'> MODULE_PARM_DESC(bad, "Accept card(s) with bad signatures");</div><div class='hunk'>@@ -99,7 +98,7 @@ MODULE_LICENSE("GPL");</div><div class='ctx'> that the ne2k probe is the last 8390 based probe to take place (as it</div><div class='ctx'> is at boot) and so the probe will get confused by any other 8390 cards.</div><div class='ctx'> ISA device autoprobes on a running machine are not recommended anyway. */</div><div class='del'>-#if !defined(MODULE) &amp;&amp; (defined(CONFIG_ISA) || defined(CONFIG_M32R))</div><div class='add'>+#if !defined(MODULE) &amp;&amp; defined(CONFIG_ISA)</div><div class='ctx'> /* Do we need a portlist for the ISA auto-probe ? */</div><div class='ctx'> #define NEEDS_PORTLIST</div><div class='ctx'> #endif</div><div class='hunk'>@@ -164,10 +163,7 @@ bad_clone_list[] __initdata = {</div><div class='ctx'> #define NESM_START_PG	0x40	/* First page of TX buffer */</div><div class='ctx'> #define NESM_STOP_PG	0x80	/* Last page +1 of RX ring */</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_PLAT_MAPPI)</div><div class='del'>-#  define DCR_VAL 0x4b</div><div class='del'>-#elif defined(CONFIG_PLAT_OAKS32R)  || \</div><div class='del'>-   defined(CONFIG_MACH_TX49XX)</div><div class='add'>+#if defined(CONFIG_MACH_TX49XX)</div><div class='ctx'> #  define DCR_VAL 0x48		/* 8-bit mode */</div><div class='ctx'> #elif defined(CONFIG_ATARI)	/* 8-bit mode on Atari, normal on Q40 */</div><div class='ctx'> #  define DCR_VAL (MACH_IS_ATARI ? 0x48 : 0x49)</div><div class='hunk'>@@ -422,12 +418,7 @@ static int __init ne_probe1(struct net_device *dev, unsigned long ioaddr)</div><div class='ctx'> 		stop_page  = NE1SM_STOP_PG;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-#if  defined(CONFIG_PLAT_MAPPI) || defined(CONFIG_PLAT_OAKS32R)</div><div class='del'>-	neX000 = ((SA_prom[14] == 0x57  &amp;&amp;  SA_prom[15] == 0x57)</div><div class='del'>-		|| (SA_prom[14] == 0x42 &amp;&amp; SA_prom[15] == 0x42));</div><div class='del'>-#else</div><div class='ctx'> 	neX000 = (SA_prom[14] == 0x57  &amp;&amp;  SA_prom[15] == 0x57);</div><div class='del'>-#endif</div><div class='ctx'> 	ctron =  (SA_prom[0] == 0x00 &amp;&amp; SA_prom[1] == 0x00 &amp;&amp; SA_prom[2] == 0x1d);</div><div class='ctx'> 	copam =  (SA_prom[14] == 0x49 &amp;&amp; SA_prom[15] == 0x00);</div><div class='ctx'> </div><div class='hunk'>@@ -485,7 +476,7 @@ static int __init ne_probe1(struct net_device *dev, unsigned long ioaddr)</div><div class='ctx'> 		mdelay(10);		/* wait 10ms for interrupt to propagate */</div><div class='ctx'> 		outb_p(0x00, ioaddr + EN0_IMR); 		/* Mask it again. */</div><div class='ctx'> 		dev-&gt;irq = probe_irq_off(cookie);</div><div class='del'>-		if (netif_msg_probe(ei_local))</div><div class='add'>+		if (ne_msg_enable &amp; NETIF_MSG_PROBE)</div><div class='ctx'> 			pr_cont(" autoirq is %d", dev-&gt;irq);</div><div class='ctx'> 	} else if (dev-&gt;irq == 2)</div><div class='ctx'> 		/* Fixup for users that don't know that IRQ 2 is really IRQ 9,</div><div class='hunk'>@@ -508,18 +499,7 @@ static int __init ne_probe1(struct net_device *dev, unsigned long ioaddr)</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;base_addr = ioaddr;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PLAT_MAPPI</div><div class='del'>-	outb_p(E8390_NODMA + E8390_PAGE1 + E8390_STOP,</div><div class='del'>-		ioaddr + E8390_CMD); /* 0x61 */</div><div class='del'>-	for (i = 0; i &lt; ETH_ALEN; i++) {</div><div class='del'>-		dev-&gt;dev_addr[i] = SA_prom[i]</div><div class='del'>-			= inb_p(ioaddr + EN1_PHYS_SHIFT(i));</div><div class='del'>-	}</div><div class='del'>-#else</div><div class='del'>-	for (i = 0; i &lt; ETH_ALEN; i++) {</div><div class='del'>-		dev-&gt;dev_addr[i] = SA_prom[i];</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='add'>+	eth_hw_addr_set(dev, SA_prom);</div><div class='ctx'> </div><div class='ctx'> 	pr_cont("%pM\n", dev-&gt;dev_addr);</div><div class='ctx'> </div><div class='hunk'>@@ -727,7 +707,7 @@ static void ne_block_output(struct net_device *dev, int count,</div><div class='ctx'> retry:</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#ifdef NE8390_RW_BUGFIX</div><div class='add'>+#ifdef NE_RW_BUGFIX</div><div class='ctx'> 	/* Handle the read-before-write bug the same way as the</div><div class='ctx'> 	   Crynwr packet driver -- the NatSemi method doesn't work.</div><div class='ctx'> 	   Actually this doesn't always work either, but if you have</div><div class='hunk'>@@ -843,7 +823,7 @@ static int __init ne_drv_probe(struct platform_device *pdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ne_drv_remove(struct platform_device *pdev)</div><div class='add'>+static void ne_drv_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = platform_get_drvdata(pdev);</div><div class='ctx'> </div><div class='hunk'>@@ -862,7 +842,6 @@ static int ne_drv_remove(struct platform_device *pdev)</div><div class='ctx'> 		release_region(dev-&gt;base_addr, NE_IO_EXTENT);</div><div class='ctx'> 		free_netdev(dev);</div><div class='ctx'> 	}</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Remove unused devices or all if true. */</div><div class='hunk'>@@ -939,13 +918,16 @@ static void __init ne_add_devices(void)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef MODULE</div><div class='del'>-int __init init_module(void)</div><div class='add'>+static int __init ne_init(void)</div><div class='ctx'> {</div><div class='ctx'> 	int retval;</div><div class='del'>-	ne_add_devices();</div><div class='add'>+</div><div class='add'>+	if (IS_MODULE(CONFIG_NE2000))</div><div class='add'>+		ne_add_devices();</div><div class='add'>+</div><div class='ctx'> 	retval = platform_driver_probe(&amp;ne_driver, ne_drv_probe);</div><div class='del'>-	if (retval) {</div><div class='add'>+</div><div class='add'>+	if (IS_MODULE(CONFIG_NE2000) &amp;&amp; retval) {</div><div class='ctx'> 		if (io[0] == 0)</div><div class='ctx'> 			pr_notice("ne.c: You must supply \"io=0xNNN\""</div><div class='ctx'> 			       " value(s) for ISA cards.\n");</div><div class='hunk'>@@ -957,17 +939,9 @@ int __init init_module(void)</div><div class='ctx'> 	ne_loop_rm_unreg(0);</div><div class='ctx'> 	return retval;</div><div class='ctx'> }</div><div class='del'>-#else /* MODULE */</div><div class='del'>-static int __init ne_init(void)</div><div class='del'>-{</div><div class='del'>-	int retval = platform_driver_probe(&amp;ne_driver, ne_drv_probe);</div><div class='del'>-</div><div class='del'>-	/* Unregister unused platform_devices. */</div><div class='del'>-	ne_loop_rm_unreg(0);</div><div class='del'>-	return retval;</div><div class='del'>-}</div><div class='ctx'> module_init(ne_init);</div><div class='ctx'> </div><div class='add'>+#if !defined(MODULE) &amp;&amp; defined(CONFIG_NETDEV_LEGACY_INIT)</div><div class='ctx'> struct net_device * __init ne_probe(int unit)</div><div class='ctx'> {</div><div class='ctx'> 	int this_dev;</div><div class='hunk'>@@ -1008,7 +982,7 @@ struct net_device * __init ne_probe(int unit)</div><div class='ctx'> </div><div class='ctx'> 	return ERR_PTR(-ENODEV);</div><div class='ctx'> }</div><div class='del'>-#endif /* MODULE */</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> static void __exit ne_exit(void)</div><div class='ctx'> {</div><div class='head'>diff --git a/drivers/net/ethernet/8390/ne2k-pci.c b/drivers/net/ethernet/8390/ne2k-pci.c<br/>index 57e97910c728..1a34da07c0db 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/ne2k-pci.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/ne2k-pci.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/ne2k-pci.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/8390/ne2k-pci.c</a></div><div class='hunk'>@@ -1,39 +1,44 @@</div><div class='del'>-/* ne2k-pci.c: A NE2000 clone on PCI bus driver for Linux. */</div><div class='del'>-/*</div><div class='del'>-	A Linux device driver for PCI NE2000 clones.</div><div class='del'>-</div><div class='del'>-	Authors and other copyright holders:</div><div class='del'>-	1992-2000 by Donald Becker, NE2000 core and various modifications.</div><div class='del'>-	1995-1998 by Paul Gortmaker, core modifications and PCI support.</div><div class='del'>-	Copyright 1993 assigned to the United States Government as represented</div><div class='del'>-	by the Director, National Security Agency.</div><div class='del'>-</div><div class='del'>-	This software may be used and distributed according to the terms of</div><div class='del'>-	the GNU General Public License (GPL), incorporated herein by reference.</div><div class='del'>-	Drivers based on or derived from this code fall under the GPL and must</div><div class='del'>-	retain the authorship, copyright and license notice.  This file is not</div><div class='del'>-	a complete program and may only be used when the entire operating</div><div class='del'>-	system is licensed under the GPL.</div><div class='del'>-</div><div class='del'>-	The author may be reached as becker@scyld.com, or C/O</div><div class='del'>-	Scyld Computing Corporation</div><div class='del'>-	410 Severn Ave., Suite 210</div><div class='del'>-	Annapolis MD 21403</div><div class='del'>-</div><div class='del'>-	Issues remaining:</div><div class='del'>-	People are making PCI ne2000 clones! Oh the horror, the horror...</div><div class='del'>-	Limited full-duplex support.</div><div class='del'>-*/</div><div class='add'>+// SPDX-License-Identifier: GPL-1.0+</div><div class='add'>+/* A Linux device driver for PCI NE2000 clones.</div><div class='add'>+ *</div><div class='add'>+ * Authors and other copyright holders:</div><div class='add'>+ * 1992-2000 by Donald Becker, NE2000 core and various modifications.</div><div class='add'>+ * 1995-1998 by Paul Gortmaker, core modifications and PCI support.</div><div class='add'>+ * Copyright 1993 assigned to the United States Government as represented</div><div class='add'>+ * by the Director, National Security Agency.</div><div class='add'>+ *</div><div class='add'>+ * This software may be used and distributed according to the terms of</div><div class='add'>+ * the GNU General Public License (GPL), incorporated herein by reference.</div><div class='add'>+ * Drivers based on or derived from this code fall under the GPL and must</div><div class='add'>+ * retain the authorship, copyright and license notice.  This file is not</div><div class='add'>+ * a complete program and may only be used when the entire operating</div><div class='add'>+ * system is licensed under the GPL.</div><div class='add'>+ *</div><div class='add'>+ * The author may be reached as becker@scyld.com, or C/O</div><div class='add'>+ * Scyld Computing Corporation</div><div class='add'>+ * 410 Severn Ave., Suite 210</div><div class='add'>+ * Annapolis MD 21403</div><div class='add'>+ *</div><div class='add'>+ * Issues remaining:</div><div class='add'>+ * People are making PCI NE2000 clones! Oh the horror, the horror...</div><div class='add'>+ * Limited full-duplex support.</div><div class='add'>+ */</div><div class='ctx'> </div><div class='ctx'> #define DRV_NAME	"ne2k-pci"</div><div class='add'>+#define DRV_DESCRIPTION	"PCI NE2000 clone driver"</div><div class='add'>+#define DRV_AUTHOR	"Donald Becker / Paul Gortmaker"</div><div class='ctx'> #define DRV_VERSION	"1.03"</div><div class='ctx'> #define DRV_RELDATE	"9/22/2003"</div><div class='ctx'> </div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='ctx'> </div><div class='ctx'> /* The user-configurable values.</div><div class='del'>-   These may be modified when a driver module is loaded.*/</div><div class='add'>+ * These may be modified when a driver module is loaded.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* More are supported, limit only on options */</div><div class='add'>+#define MAX_UNITS 8</div><div class='ctx'> </div><div class='del'>-#define MAX_UNITS 8				/* More are supported, limit only on options */</div><div class='ctx'> /* Used to pass the full-duplex flag, etc. */</div><div class='ctx'> static int full_duplex[MAX_UNITS];</div><div class='ctx'> static int options[MAX_UNITS];</div><div class='hunk'>@@ -52,38 +57,36 @@ static int options[MAX_UNITS];</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;asm/irq.h&gt;</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "8390.h"</div><div class='ctx'> </div><div class='del'>-static u32 ne2k_msg_enable;</div><div class='add'>+static int ne2k_msg_enable;</div><div class='ctx'> </div><div class='del'>-/* These identify the driver base version and may not be removed. */</div><div class='del'>-static const char version[] =</div><div class='del'>-	KERN_INFO DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE</div><div class='del'>-	" D. Becker/P. Gortmaker\n";</div><div class='add'>+static const int default_msg_level = (NETIF_MSG_DRV | NETIF_MSG_PROBE |</div><div class='add'>+				      NETIF_MSG_RX_ERR | NETIF_MSG_TX_ERR);</div><div class='ctx'> </div><div class='ctx'> #if defined(__powerpc__)</div><div class='ctx'> #define inl_le(addr)  le32_to_cpu(inl(addr))</div><div class='ctx'> #define inw_le(addr)  le16_to_cpu(inw(addr))</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-#define PFX DRV_NAME ": "</div><div class='del'>-</div><div class='del'>-MODULE_AUTHOR("Donald Becker / Paul Gortmaker");</div><div class='del'>-MODULE_DESCRIPTION("PCI NE2000 clone driver");</div><div class='add'>+MODULE_AUTHOR(DRV_AUTHOR);</div><div class='add'>+MODULE_DESCRIPTION(DRV_DESCRIPTION);</div><div class='add'>+MODULE_VERSION(DRV_VERSION);</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='del'>-module_param_named(msg_enable, ne2k_msg_enable, uint, (S_IRUSR|S_IRGRP|S_IROTH));</div><div class='add'>+module_param_named(msg_enable, ne2k_msg_enable, int, 0444);</div><div class='ctx'> module_param_array(options, int, NULL, 0);</div><div class='ctx'> module_param_array(full_duplex, int, NULL, 0);</div><div class='ctx'> MODULE_PARM_DESC(msg_enable, "Debug message level (see linux/netdevice.h for bitmap)");</div><div class='ctx'> MODULE_PARM_DESC(options, "Bit 5: full duplex");</div><div class='ctx'> MODULE_PARM_DESC(full_duplex, "full duplex setting(s) (1)");</div><div class='ctx'> </div><div class='del'>-/* Some defines that people can play with if so inclined. */</div><div class='add'>+/* Some defines that people can play with if so inclined.</div><div class='add'>+ */</div><div class='ctx'> </div><div class='ctx'> /* Use 32 bit data-movement operations instead of 16 bit. */</div><div class='ctx'> #define USE_LONGIO</div><div class='hunk'>@@ -91,14 +94,18 @@ MODULE_PARM_DESC(full_duplex, "full duplex setting(s) (1)");</div><div class='ctx'> /* Do we implement the read before write bugfix ? */</div><div class='ctx'> /* #define NE_RW_BUGFIX */</div><div class='ctx'> </div><div class='del'>-/* Flags.  We rename an existing ei_status field to store flags! */</div><div class='del'>-/* Thus only the low 8 bits are usable for non-init-time flags. */</div><div class='add'>+/* Flags.  We rename an existing ei_status field to store flags!</div><div class='add'>+ * Thus only the low 8 bits are usable for non-init-time flags.</div><div class='add'>+ */</div><div class='ctx'> #define ne2k_flags reg0</div><div class='add'>+</div><div class='ctx'> enum {</div><div class='del'>-	ONLY_16BIT_IO=8, ONLY_32BIT_IO=4,	/* Chip can do only 16/32-bit xfers. */</div><div class='del'>-	FORCE_FDX=0x20,						/* User override. */</div><div class='del'>-	REALTEK_FDX=0x40, HOLTEK_FDX=0x80,</div><div class='del'>-	STOP_PG_0x60=0x100,</div><div class='add'>+	/* Chip can do only 16/32-bit xfers. */</div><div class='add'>+	ONLY_16BIT_IO = 8, ONLY_32BIT_IO = 4,</div><div class='add'>+	/* User override. */</div><div class='add'>+	FORCE_FDX = 0x20,</div><div class='add'>+	REALTEK_FDX = 0x40, HOLTEK_FDX = 0x80,</div><div class='add'>+	STOP_PG_0x60 = 0x100,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum ne2k_pci_chipsets {</div><div class='hunk'>@@ -120,7 +127,7 @@ static struct {</div><div class='ctx'> 	char *name;</div><div class='ctx'> 	int flags;</div><div class='ctx'> } pci_clone_list[] = {</div><div class='del'>-	{"RealTek RTL-8029", REALTEK_FDX},</div><div class='add'>+	{"RealTek RTL-8029(AS)", REALTEK_FDX},</div><div class='ctx'> 	{"Winbond 89C940", 0},</div><div class='ctx'> 	{"Compex RL2000", 0},</div><div class='ctx'> 	{"KTI ET32P2", 0},</div><div class='hunk'>@@ -149,13 +156,14 @@ static const struct pci_device_id ne2k_pci_tbl[] = {</div><div class='ctx'> 	{ 0x8c4a, 0x1980, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_Winbond_89C940_8c4a },</div><div class='ctx'> 	{ 0, }</div><div class='ctx'> };</div><div class='add'>+</div><div class='ctx'> MODULE_DEVICE_TABLE(pci, ne2k_pci_tbl);</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> /* ---- No user-serviceable parts below ---- */</div><div class='ctx'> </div><div class='ctx'> #define NE_BASE	 (dev-&gt;base_addr)</div><div class='del'>-#define NE_CMD	 	0x00</div><div class='add'>+#define NE_CMD		0x00</div><div class='ctx'> #define NE_DATAPORT	0x10	/* NatSemi-defined port window offset. */</div><div class='ctx'> #define NE_RESET	0x1f	/* Issue a read to reset, a write to clear. */</div><div class='ctx'> #define NE_IO_EXTENT	0x20</div><div class='hunk'>@@ -168,37 +176,27 @@ static int ne2k_pci_open(struct net_device *dev);</div><div class='ctx'> static int ne2k_pci_close(struct net_device *dev);</div><div class='ctx'> </div><div class='ctx'> static void ne2k_pci_reset_8390(struct net_device *dev);</div><div class='del'>-static void ne2k_pci_get_8390_hdr(struct net_device *dev, struct e8390_pkt_hdr *hdr,</div><div class='del'>-			  int ring_page);</div><div class='add'>+static void ne2k_pci_get_8390_hdr(struct net_device *dev,</div><div class='add'>+				  struct e8390_pkt_hdr *hdr, int ring_page);</div><div class='ctx'> static void ne2k_pci_block_input(struct net_device *dev, int count,</div><div class='del'>-			  struct sk_buff *skb, int ring_offset);</div><div class='add'>+				 struct sk_buff *skb, int ring_offset);</div><div class='ctx'> static void ne2k_pci_block_output(struct net_device *dev, const int count,</div><div class='del'>-		const unsigned char *buf, const int start_page);</div><div class='add'>+				  const unsigned char *buf,</div><div class='add'>+				  const int start_page);</div><div class='ctx'> static const struct ethtool_ops ne2k_pci_ethtool_ops;</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-/* There is no room in the standard 8390 structure for extra info we need,</div><div class='del'>-   so we build a meta/outer-wrapper structure.. */</div><div class='del'>-struct ne2k_pci_card {</div><div class='del'>-	struct net_device *dev;</div><div class='del'>-	struct pci_dev *pci_dev;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>-  NEx000-clone boards have a Station Address (SA) PROM (SAPROM) in the packet</div><div class='del'>-  buffer memory space.  By-the-spec NE2000 clones have 0x57,0x57 in bytes</div><div class='del'>-  0x0e,0x0f of the SAPROM, while other supposed NE2000 clones must be</div><div class='del'>-  detected by their SA prefix.</div><div class='del'>-</div><div class='del'>-  Reading the SAPROM from a word-wide card with the 8390 set in byte-wide</div><div class='del'>-  mode results in doubled values, which can be detected and compensated for.</div><div class='del'>-</div><div class='del'>-  The probe is also responsible for initializing the card and filling</div><div class='del'>-  in the 'dev' and 'ei_status' structures.</div><div class='del'>-*/</div><div class='add'>+/* NEx000-clone boards have a Station Address (SA) PROM (SAPROM) in the packet</div><div class='add'>+ * buffer memory space.  By-the-spec NE2000 clones have 0x57,0x57 in bytes</div><div class='add'>+ * 0x0e,0x0f of the SAPROM, while other supposed NE2000 clones must be</div><div class='add'>+ * detected by their SA prefix.</div><div class='add'>+ *</div><div class='add'>+ * Reading the SAPROM from a word-wide card with the 8390 set in byte-wide</div><div class='add'>+ * mode results in doubled values, which can be detected and compensated for.</div><div class='add'>+ *</div><div class='add'>+ * The probe is also responsible for initializing the card and filling</div><div class='add'>+ * in the 'dev' and 'ei_status' structures.</div><div class='add'>+ */</div><div class='ctx'> </div><div class='ctx'> static const struct net_device_ops ne2k_netdev_ops = {</div><div class='ctx'> 	.ndo_open		= ne2k_pci_open,</div><div class='hunk'>@@ -208,8 +206,7 @@ static const struct net_device_ops ne2k_netdev_ops = {</div><div class='ctx'> 	.ndo_get_stats		= ei_get_stats,</div><div class='ctx'> 	.ndo_set_rx_mode	= ei_set_multicast_list,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='del'>-	.ndo_set_mac_address 	= eth_mac_addr,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='add'>+	.ndo_set_mac_address	= eth_mac_addr,</div><div class='ctx'> #ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='ctx'> 	.ndo_poll_controller = ei_poll,</div><div class='ctx'> #endif</div><div class='hunk'>@@ -228,28 +225,21 @@ static int ne2k_pci_init_one(struct pci_dev *pdev,</div><div class='ctx'> 	int flags = pci_clone_list[chip_idx].flags;</div><div class='ctx'> 	struct ei_device *ei_local;</div><div class='ctx'> </div><div class='del'>-/* when built into the kernel, we only print version if device is found */</div><div class='del'>-#ifndef MODULE</div><div class='del'>-	static int printed_version;</div><div class='del'>-	if (!printed_version++)</div><div class='del'>-		printk(version);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> 	fnd_cnt++;</div><div class='ctx'> </div><div class='del'>-	i = pci_enable_device (pdev);</div><div class='add'>+	i = pci_enable_device(pdev);</div><div class='ctx'> 	if (i)</div><div class='ctx'> 		return i;</div><div class='ctx'> </div><div class='del'>-	ioaddr = pci_resource_start (pdev, 0);</div><div class='add'>+	ioaddr = pci_resource_start(pdev, 0);</div><div class='ctx'> 	irq = pdev-&gt;irq;</div><div class='ctx'> </div><div class='del'>-	if (!ioaddr || ((pci_resource_flags (pdev, 0) &amp; IORESOURCE_IO) == 0)) {</div><div class='add'>+	if (!ioaddr || ((pci_resource_flags(pdev, 0) &amp; IORESOURCE_IO) == 0)) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "no I/O resource at PCI BAR #0\n");</div><div class='ctx'> 		goto err_out;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (request_region (ioaddr, NE_IO_EXTENT, DRV_NAME) == NULL) {</div><div class='add'>+	if (!request_region(ioaddr, NE_IO_EXTENT, DRV_NAME)) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "I/O resource 0x%x @ 0x%lx busy\n",</div><div class='ctx'> 			NE_IO_EXTENT, ioaddr);</div><div class='ctx'> 		goto err_out;</div><div class='hunk'>@@ -262,14 +252,17 @@ static int ne2k_pci_init_one(struct pci_dev *pdev,</div><div class='ctx'> 	/* Do a preliminary verification that we have a 8390. */</div><div class='ctx'> 	{</div><div class='ctx'> 		int regd;</div><div class='del'>-		outb(E8390_NODMA+E8390_PAGE1+E8390_STOP, ioaddr + E8390_CMD);</div><div class='add'>+</div><div class='add'>+		outb(E8390_NODMA + E8390_PAGE1 + E8390_STOP, ioaddr + E8390_CMD);</div><div class='ctx'> 		regd = inb(ioaddr + 0x0d);</div><div class='ctx'> 		outb(0xff, ioaddr + 0x0d);</div><div class='del'>-		outb(E8390_NODMA+E8390_PAGE0, ioaddr + E8390_CMD);</div><div class='del'>-		inb(ioaddr + EN0_COUNTER0); /* Clear the counter by reading. */</div><div class='add'>+		outb(E8390_NODMA + E8390_PAGE0, ioaddr + E8390_CMD);</div><div class='add'>+		/* Clear the counter by reading. */</div><div class='add'>+		inb(ioaddr + EN0_COUNTER0);</div><div class='ctx'> 		if (inb(ioaddr + EN0_COUNTER0) != 0) {</div><div class='ctx'> 			outb(reg0, ioaddr);</div><div class='del'>-			outb(regd, ioaddr + 0x0d);	/* Restore the old values. */</div><div class='add'>+			/*  Restore the old values. */</div><div class='add'>+			outb(regd, ioaddr + 0x0d);</div><div class='ctx'> 			goto err_out_free_res;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -282,7 +275,7 @@ static int ne2k_pci_init_one(struct pci_dev *pdev,</div><div class='ctx'> 	}</div><div class='ctx'> 	dev-&gt;netdev_ops = &amp;ne2k_netdev_ops;</div><div class='ctx'> 	ei_local = netdev_priv(dev);</div><div class='del'>-	ei_local-&gt;msg_enable = ne2k_msg_enable;</div><div class='add'>+	ei_local-&gt;msg_enable = netif_msg_init(ne2k_msg_enable, default_msg_level);</div><div class='ctx'> </div><div class='ctx'> 	SET_NETDEV_DEV(dev, &amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='hunk'>@@ -292,9 +285,9 @@ static int ne2k_pci_init_one(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 		outb(inb(ioaddr + NE_RESET), ioaddr + NE_RESET);</div><div class='ctx'> </div><div class='del'>-		/* This looks like a horrible timing loop, but it should never take</div><div class='del'>-		   more than a few cycles.</div><div class='del'>-		*/</div><div class='add'>+		/* This looks like a horrible timing loop, but it should never</div><div class='add'>+		 * take more than a few cycles.</div><div class='add'>+		 */</div><div class='ctx'> 		while ((inb(ioaddr + EN0_ISR) &amp; ENISR_RESET) == 0)</div><div class='ctx'> 			/* Limit wait: '2' avoids jiffy roll-over. */</div><div class='ctx'> 			if (jiffies - reset_start_time &gt; 2) {</div><div class='hunk'>@@ -302,42 +295,53 @@ static int ne2k_pci_init_one(struct pci_dev *pdev,</div><div class='ctx'> 					"Card failure (no reset ack).\n");</div><div class='ctx'> 				goto err_out_free_netdev;</div><div class='ctx'> 			}</div><div class='del'>-</div><div class='del'>-		outb(0xff, ioaddr + EN0_ISR);		/* Ack all intr. */</div><div class='add'>+		/* Ack all intr. */</div><div class='add'>+		outb(0xff, ioaddr + EN0_ISR);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Read the 16 bytes of station address PROM.</div><div class='del'>-	   We must first initialize registers, similar to NS8390_init(eifdev, 0).</div><div class='del'>-	   We can't reliably read the SAPROM address without this.</div><div class='del'>-	   (I learned the hard way!). */</div><div class='add'>+	 * We must first initialize registers, similar</div><div class='add'>+	 * to NS8390_init(eifdev, 0).</div><div class='add'>+	 * We can't reliably read the SAPROM address without this.</div><div class='add'>+	 * (I learned the hard way!).</div><div class='add'>+	 */</div><div class='ctx'> 	{</div><div class='ctx'> 		struct {unsigned char value, offset; } program_seq[] = {</div><div class='del'>-			{E8390_NODMA+E8390_PAGE0+E8390_STOP, E8390_CMD}, /* Select page 0*/</div><div class='del'>-			{0x49,	EN0_DCFG},	/* Set word-wide access. */</div><div class='del'>-			{0x00,	EN0_RCNTLO},	/* Clear the count regs. */</div><div class='add'>+			/* Select page 0 */</div><div class='add'>+			{E8390_NODMA + E8390_PAGE0 + E8390_STOP, E8390_CMD},</div><div class='add'>+			/* Set word-wide access */</div><div class='add'>+			{0x49,	EN0_DCFG},</div><div class='add'>+			/* Clear the count regs. */</div><div class='add'>+			{0x00,	EN0_RCNTLO},</div><div class='add'>+			/* Mask completion IRQ */</div><div class='ctx'> 			{0x00,	EN0_RCNTHI},</div><div class='del'>-			{0x00,	EN0_IMR},	/* Mask completion irq. */</div><div class='add'>+			{0x00,	EN0_IMR},</div><div class='ctx'> 			{0xFF,	EN0_ISR},</div><div class='del'>-			{E8390_RXOFF, EN0_RXCR},	/* 0x20  Set to monitor */</div><div class='del'>-			{E8390_TXOFF, EN0_TXCR},	/* 0x02  and loopback mode. */</div><div class='add'>+			/* 0x20 Set to monitor */</div><div class='add'>+			{E8390_RXOFF, EN0_RXCR},</div><div class='add'>+			/* 0x02 and loopback mode */</div><div class='add'>+			{E8390_TXOFF, EN0_TXCR},</div><div class='ctx'> 			{32,	EN0_RCNTLO},</div><div class='ctx'> 			{0x00,	EN0_RCNTHI},</div><div class='del'>-			{0x00,	EN0_RSARLO},	/* DMA starting at 0x0000. */</div><div class='add'>+			/* DMA starting at 0x0000 */</div><div class='add'>+			{0x00,	EN0_RSARLO},</div><div class='ctx'> 			{0x00,	EN0_RSARHI},</div><div class='ctx'> 			{E8390_RREAD+E8390_START, E8390_CMD},</div><div class='ctx'> 		};</div><div class='ctx'> 		for (i = 0; i &lt; ARRAY_SIZE(program_seq); i++)</div><div class='del'>-			outb(program_seq[i].value, ioaddr + program_seq[i].offset);</div><div class='add'>+			outb(program_seq[i].value,</div><div class='add'>+			     ioaddr + program_seq[i].offset);</div><div class='ctx'> </div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Note: all PCI cards have at least 16 bit access, so we don't have</div><div class='del'>-	   to check for 8 bit cards.  Most cards permit 32 bit access. */</div><div class='add'>+	 * to check for 8 bit cards.  Most cards permit 32 bit access.</div><div class='add'>+	 */</div><div class='ctx'> 	if (flags &amp; ONLY_32BIT_IO) {</div><div class='ctx'> 		for (i = 0; i &lt; 4 ; i++)</div><div class='ctx'> 			((u32 *)SA_prom)[i] = le32_to_cpu(inl(ioaddr + NE_DATAPORT));</div><div class='ctx'> 	} else</div><div class='del'>-		for(i = 0; i &lt; 32 /*sizeof(SA_prom)*/; i++)</div><div class='add'>+		for (i = 0; i &lt; 32 /* sizeof(SA_prom )*/; i++)</div><div class='ctx'> 			SA_prom[i] = inb(ioaddr + NE_DATAPORT);</div><div class='ctx'> </div><div class='ctx'> 	/* We always set the 8390 registers for word mode. */</div><div class='hunk'>@@ -357,7 +361,7 @@ static int ne2k_pci_init_one(struct pci_dev *pdev,</div><div class='ctx'> 	ei_status.word16 = 1;</div><div class='ctx'> 	ei_status.ne2k_flags = flags;</div><div class='ctx'> 	if (fnd_cnt &lt; MAX_UNITS) {</div><div class='del'>-		if (full_duplex[fnd_cnt] &gt; 0  ||  (options[fnd_cnt] &amp; FORCE_FDX))</div><div class='add'>+		if (full_duplex[fnd_cnt] &gt; 0 || (options[fnd_cnt] &amp; FORCE_FDX))</div><div class='ctx'> 			ei_status.ne2k_flags |= FORCE_FDX;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -376,7 +380,7 @@ static int ne2k_pci_init_one(struct pci_dev *pdev,</div><div class='ctx'> 	dev-&gt;ethtool_ops = &amp;ne2k_pci_ethtool_ops;</div><div class='ctx'> 	NS8390_init(dev, 0);</div><div class='ctx'> </div><div class='del'>-	memcpy(dev-&gt;dev_addr, SA_prom, dev-&gt;addr_len);</div><div class='add'>+	eth_hw_addr_set(dev, SA_prom);</div><div class='ctx'> </div><div class='ctx'> 	i = register_netdev(dev);</div><div class='ctx'> 	if (i)</div><div class='hunk'>@@ -389,16 +393,15 @@ static int ne2k_pci_init_one(struct pci_dev *pdev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_out_free_netdev:</div><div class='del'>-	free_netdev (dev);</div><div class='add'>+	free_netdev(dev);</div><div class='ctx'> err_out_free_res:</div><div class='del'>-	release_region (ioaddr, NE_IO_EXTENT);</div><div class='add'>+	release_region(ioaddr, NE_IO_EXTENT);</div><div class='ctx'> err_out:</div><div class='ctx'> 	pci_disable_device(pdev);</div><div class='ctx'> 	return -ENODEV;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * Magic incantation sequence for full duplex on the supported cards.</div><div class='add'>+/* Magic incantation sequence for full duplex on the supported cards.</div><div class='ctx'>  */</div><div class='ctx'> static inline int set_realtek_fdx(struct net_device *dev)</div><div class='ctx'> {</div><div class='hunk'>@@ -432,7 +435,9 @@ static int ne2k_pci_set_fdx(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> static int ne2k_pci_open(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	int ret = request_irq(dev-&gt;irq, ei_interrupt, IRQF_SHARED, dev-&gt;name, dev);</div><div class='add'>+	int ret = request_irq(dev-&gt;irq, ei_interrupt, IRQF_SHARED,</div><div class='add'>+			      dev-&gt;name, dev);</div><div class='add'>+</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='hunk'>@@ -451,7 +456,8 @@ static int ne2k_pci_close(struct net_device *dev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Hard reset the card.  This used to pause for the same period that a</div><div class='del'>-   8390 reset command required, but that shouldn't be necessary. */</div><div class='add'>+ * 8390 reset command required, but that shouldn't be necessary.</div><div class='add'>+ */</div><div class='ctx'> static void ne2k_pci_reset_8390(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long reset_start_time = jiffies;</div><div class='hunk'>@@ -468,31 +474,34 @@ static void ne2k_pci_reset_8390(struct net_device *dev)</div><div class='ctx'> 	/* This check _should_not_ be necessary, omit eventually. */</div><div class='ctx'> 	while ((inb(NE_BASE+EN0_ISR) &amp; ENISR_RESET) == 0)</div><div class='ctx'> 		if (jiffies - reset_start_time &gt; 2) {</div><div class='del'>-			netdev_err(dev, "ne2k_pci_reset_8390() did not complete.\n");</div><div class='add'>+			netdev_err(dev, "%s did not complete.\n", __func__);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='del'>-	outb(ENISR_RESET, NE_BASE + EN0_ISR);	/* Ack intr. */</div><div class='add'>+	/* Ack intr. */</div><div class='add'>+	outb(ENISR_RESET, NE_BASE + EN0_ISR);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Grab the 8390 specific header. Similar to the block_input routine, but</div><div class='del'>-   we don't need to be concerned with ring wrap as the header will be at</div><div class='del'>-   the start of a page, so we optimize accordingly. */</div><div class='add'>+ * we don't need to be concerned with ring wrap as the header will be at</div><div class='add'>+ * the start of a page, so we optimize accordingly.</div><div class='add'>+ */</div><div class='ctx'> </div><div class='del'>-static void ne2k_pci_get_8390_hdr(struct net_device *dev, struct e8390_pkt_hdr *hdr, int ring_page)</div><div class='add'>+static void ne2k_pci_get_8390_hdr(struct net_device *dev,</div><div class='add'>+				  struct e8390_pkt_hdr *hdr, int ring_page)</div><div class='ctx'> {</div><div class='ctx'> </div><div class='ctx'> 	long nic_base = dev-&gt;base_addr;</div><div class='ctx'> </div><div class='del'>-	/* This *shouldn't* happen. If it does, it's the last thing you'll see */</div><div class='add'>+	/* This *shouldn't* happen. If it does, it's the last thing you'll see</div><div class='add'>+	 */</div><div class='ctx'> 	if (ei_status.dmaing) {</div><div class='del'>-		netdev_err(dev, "DMAing conflict in ne2k_pci_get_8390_hdr "</div><div class='del'>-			   "[DMAstat:%d][irqlock:%d].\n",</div><div class='del'>-			   ei_status.dmaing, ei_status.irqlock);</div><div class='add'>+		netdev_err(dev, "DMAing conflict in %s [DMAstat:%d][irqlock:%d].\n",</div><div class='add'>+			   __func__, ei_status.dmaing, ei_status.irqlock);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ei_status.dmaing |= 0x01;</div><div class='del'>-	outb(E8390_NODMA+E8390_PAGE0+E8390_START, nic_base+ NE_CMD);</div><div class='add'>+	outb(E8390_NODMA + E8390_PAGE0 + E8390_START, nic_base + NE_CMD);</div><div class='ctx'> 	outb(sizeof(struct e8390_pkt_hdr), nic_base + EN0_RCNTLO);</div><div class='ctx'> 	outb(0, nic_base + EN0_RCNTHI);</div><div class='ctx'> 	outb(0, nic_base + EN0_RSARLO);		/* On page boundary */</div><div class='hunk'>@@ -500,20 +509,22 @@ static void ne2k_pci_get_8390_hdr(struct net_device *dev, struct e8390_pkt_hdr *</div><div class='ctx'> 	outb(E8390_RREAD+E8390_START, nic_base + NE_CMD);</div><div class='ctx'> </div><div class='ctx'> 	if (ei_status.ne2k_flags &amp; ONLY_16BIT_IO) {</div><div class='del'>-		insw(NE_BASE + NE_DATAPORT, hdr, sizeof(struct e8390_pkt_hdr)&gt;&gt;1);</div><div class='add'>+		insw(NE_BASE + NE_DATAPORT, hdr,</div><div class='add'>+		     sizeof(struct e8390_pkt_hdr) &gt;&gt; 1);</div><div class='ctx'> 	} else {</div><div class='del'>-		*(u32*)hdr = le32_to_cpu(inl(NE_BASE + NE_DATAPORT));</div><div class='add'>+		*(u32 *)hdr = le32_to_cpu(inl(NE_BASE + NE_DATAPORT));</div><div class='ctx'> 		le16_to_cpus(&amp;hdr-&gt;count);</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	outb(ENISR_RDC, nic_base + EN0_ISR);	/* Ack intr. */</div><div class='add'>+	/* Ack intr. */</div><div class='add'>+	outb(ENISR_RDC, nic_base + EN0_ISR);</div><div class='ctx'> 	ei_status.dmaing &amp;= ~0x01;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Block input and output, similar to the Crynwr packet driver.  If you</div><div class='del'>-   are porting to a new ethercard, look at the packet driver source for hints.</div><div class='del'>-   The NEx000 doesn't share the on-board packet memory -- you have to put</div><div class='del'>-   the packet out through the "remote DMA" dataport using outb. */</div><div class='add'>+ *are porting to a new ethercard, look at the packet driver source for hints.</div><div class='add'>+ *The NEx000 doesn't share the on-board packet memory -- you have to put</div><div class='add'>+ *the packet out through the "remote DMA" dataport using outb.</div><div class='add'>+ */</div><div class='ctx'> </div><div class='ctx'> static void ne2k_pci_block_input(struct net_device *dev, int count,</div><div class='ctx'> 				 struct sk_buff *skb, int ring_offset)</div><div class='hunk'>@@ -521,30 +532,30 @@ static void ne2k_pci_block_input(struct net_device *dev, int count,</div><div class='ctx'> 	long nic_base = dev-&gt;base_addr;</div><div class='ctx'> 	char *buf = skb-&gt;data;</div><div class='ctx'> </div><div class='del'>-	/* This *shouldn't* happen. If it does, it's the last thing you'll see */</div><div class='add'>+	/* This *shouldn't* happen.</div><div class='add'>+	 * If it does, it's the last thing you'll see.</div><div class='add'>+	 */</div><div class='ctx'> 	if (ei_status.dmaing) {</div><div class='del'>-		netdev_err(dev, "DMAing conflict in ne2k_pci_block_input "</div><div class='del'>-			   "[DMAstat:%d][irqlock:%d].\n",</div><div class='del'>-			   ei_status.dmaing, ei_status.irqlock);</div><div class='add'>+		netdev_err(dev, "DMAing conflict in %s [DMAstat:%d][irqlock:%d]\n",</div><div class='add'>+			   __func__, ei_status.dmaing, ei_status.irqlock);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	ei_status.dmaing |= 0x01;</div><div class='ctx'> 	if (ei_status.ne2k_flags &amp; ONLY_32BIT_IO)</div><div class='ctx'> 		count = (count + 3) &amp; 0xFFFC;</div><div class='del'>-	outb(E8390_NODMA+E8390_PAGE0+E8390_START, nic_base+ NE_CMD);</div><div class='add'>+	outb(E8390_NODMA + E8390_PAGE0 + E8390_START, nic_base + NE_CMD);</div><div class='ctx'> 	outb(count &amp; 0xff, nic_base + EN0_RCNTLO);</div><div class='ctx'> 	outb(count &gt;&gt; 8, nic_base + EN0_RCNTHI);</div><div class='ctx'> 	outb(ring_offset &amp; 0xff, nic_base + EN0_RSARLO);</div><div class='ctx'> 	outb(ring_offset &gt;&gt; 8, nic_base + EN0_RSARHI);</div><div class='del'>-	outb(E8390_RREAD+E8390_START, nic_base + NE_CMD);</div><div class='add'>+	outb(E8390_RREAD + E8390_START, nic_base + NE_CMD);</div><div class='ctx'> </div><div class='ctx'> 	if (ei_status.ne2k_flags &amp; ONLY_16BIT_IO) {</div><div class='del'>-		insw(NE_BASE + NE_DATAPORT,buf,count&gt;&gt;1);</div><div class='del'>-		if (count &amp; 0x01) {</div><div class='add'>+		insw(NE_BASE + NE_DATAPORT, buf, count &gt;&gt; 1);</div><div class='add'>+		if (count &amp; 0x01)</div><div class='ctx'> 			buf[count-1] = inb(NE_BASE + NE_DATAPORT);</div><div class='del'>-		}</div><div class='ctx'> 	} else {</div><div class='del'>-		insl(NE_BASE + NE_DATAPORT, buf, count&gt;&gt;2);</div><div class='add'>+		insl(NE_BASE + NE_DATAPORT, buf, count &gt;&gt; 2);</div><div class='ctx'> 		if (count &amp; 3) {</div><div class='ctx'> 			buf += count &amp; ~3;</div><div class='ctx'> 			if (count &amp; 2) {</div><div class='hunk'>@@ -557,41 +568,44 @@ static void ne2k_pci_block_input(struct net_device *dev, int count,</div><div class='ctx'> 				*buf = inb(NE_BASE + NE_DATAPORT);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	outb(ENISR_RDC, nic_base + EN0_ISR);	/* Ack intr. */</div><div class='add'>+	/* Ack intr. */</div><div class='add'>+	outb(ENISR_RDC, nic_base + EN0_ISR);</div><div class='ctx'> 	ei_status.dmaing &amp;= ~0x01;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void ne2k_pci_block_output(struct net_device *dev, int count,</div><div class='del'>-				  const unsigned char *buf, const int start_page)</div><div class='add'>+		const unsigned char *buf, const int start_page)</div><div class='ctx'> {</div><div class='ctx'> 	long nic_base = NE_BASE;</div><div class='ctx'> 	unsigned long dma_start;</div><div class='ctx'> </div><div class='ctx'> 	/* On little-endian it's always safe to round the count up for</div><div class='del'>-	   word writes. */</div><div class='add'>+	 * word writes.</div><div class='add'>+	 */</div><div class='ctx'> 	if (ei_status.ne2k_flags &amp; ONLY_32BIT_IO)</div><div class='ctx'> 		count = (count + 3) &amp; 0xFFFC;</div><div class='ctx'> 	else</div><div class='ctx'> 		if (count &amp; 0x01)</div><div class='ctx'> 			count++;</div><div class='ctx'> </div><div class='del'>-	/* This *shouldn't* happen. If it does, it's the last thing you'll see */</div><div class='add'>+	/* This *shouldn't* happen.</div><div class='add'>+	 * If it does, it's the last thing you'll see.</div><div class='add'>+	 */</div><div class='ctx'> 	if (ei_status.dmaing) {</div><div class='del'>-		netdev_err(dev, "DMAing conflict in ne2k_pci_block_output."</div><div class='del'>-			   "[DMAstat:%d][irqlock:%d]\n",</div><div class='del'>-			   ei_status.dmaing, ei_status.irqlock);</div><div class='add'>+		netdev_err(dev, "DMAing conflict in %s [DMAstat:%d][irqlock:%d]\n",</div><div class='add'>+			   __func__, ei_status.dmaing, ei_status.irqlock);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	ei_status.dmaing |= 0x01;</div><div class='ctx'> 	/* We should already be in page 0, but to be safe... */</div><div class='ctx'> 	outb(E8390_PAGE0+E8390_START+E8390_NODMA, nic_base + NE_CMD);</div><div class='ctx'> </div><div class='del'>-#ifdef NE8390_RW_BUGFIX</div><div class='add'>+#ifdef NE_RW_BUGFIX</div><div class='ctx'> 	/* Handle the read-before-write bug the same way as the</div><div class='del'>-	   Crynwr packet driver -- the NatSemi method doesn't work.</div><div class='del'>-	   Actually this doesn't always work either, but if you have</div><div class='del'>-	   problems with your NEx000 this is better than nothing! */</div><div class='add'>+	 * Crynwr packet driver -- the NatSemi method doesn't work.</div><div class='add'>+	 * Actually this doesn't always work either, but if you have</div><div class='add'>+	 * problems with your NEx000 this is better than nothing!</div><div class='add'>+	 */</div><div class='ctx'> 	outb(0x42, nic_base + EN0_RCNTLO);</div><div class='ctx'> 	outb(0x00, nic_base + EN0_RCNTHI);</div><div class='ctx'> 	outb(0x42, nic_base + EN0_RSARLO);</div><div class='hunk'>@@ -600,16 +614,16 @@ static void ne2k_pci_block_output(struct net_device *dev, int count,</div><div class='ctx'> #endif</div><div class='ctx'> 	outb(ENISR_RDC, nic_base + EN0_ISR);</div><div class='ctx'> </div><div class='del'>-   /* Now the normal output. */</div><div class='add'>+	/* Now the normal output. */</div><div class='ctx'> 	outb(count &amp; 0xff, nic_base + EN0_RCNTLO);</div><div class='ctx'> 	outb(count &gt;&gt; 8,   nic_base + EN0_RCNTHI);</div><div class='ctx'> 	outb(0x00, nic_base + EN0_RSARLO);</div><div class='ctx'> 	outb(start_page, nic_base + EN0_RSARHI);</div><div class='ctx'> 	outb(E8390_RWRITE+E8390_START, nic_base + NE_CMD);</div><div class='ctx'> 	if (ei_status.ne2k_flags &amp; ONLY_16BIT_IO) {</div><div class='del'>-		outsw(NE_BASE + NE_DATAPORT, buf, count&gt;&gt;1);</div><div class='add'>+		outsw(NE_BASE + NE_DATAPORT, buf, count &gt;&gt; 1);</div><div class='ctx'> 	} else {</div><div class='del'>-		outsl(NE_BASE + NE_DATAPORT, buf, count&gt;&gt;2);</div><div class='add'>+		outsl(NE_BASE + NE_DATAPORT, buf, count &gt;&gt; 2);</div><div class='ctx'> 		if (count &amp; 3) {</div><div class='ctx'> 			buf += count &amp; ~3;</div><div class='ctx'> 			if (count &amp; 2) {</div><div class='hunk'>@@ -624,14 +638,15 @@ static void ne2k_pci_block_output(struct net_device *dev, int count,</div><div class='ctx'> 	dma_start = jiffies;</div><div class='ctx'> </div><div class='ctx'> 	while ((inb(nic_base + EN0_ISR) &amp; ENISR_RDC) == 0)</div><div class='del'>-		if (jiffies - dma_start &gt; 2) {			/* Avoid clock roll-over. */</div><div class='add'>+		/* Avoid clock roll-over. */</div><div class='add'>+		if (jiffies - dma_start &gt; 2) {</div><div class='ctx'> 			netdev_warn(dev, "timeout waiting for Tx RDC.\n");</div><div class='ctx'> 			ne2k_pci_reset_8390(dev);</div><div class='del'>-			NS8390_init(dev,1);</div><div class='add'>+			NS8390_init(dev, 1);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='del'>-</div><div class='del'>-	outb(ENISR_RDC, nic_base + EN0_ISR);	/* Ack intr. */</div><div class='add'>+	/* Ack intr. */</div><div class='add'>+	outb(ENISR_RDC, nic_base + EN0_ISR);</div><div class='ctx'> 	ei_status.dmaing &amp;= ~0x01;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -641,9 +656,9 @@ static void ne2k_pci_get_drvinfo(struct net_device *dev,</div><div class='ctx'> 	struct ei_device *ei = netdev_priv(dev);</div><div class='ctx'> 	struct pci_dev *pci_dev = (struct pci_dev *) ei-&gt;priv;</div><div class='ctx'> </div><div class='del'>-	strlcpy(info-&gt;driver, DRV_NAME, sizeof(info-&gt;driver));</div><div class='del'>-	strlcpy(info-&gt;version, DRV_VERSION, sizeof(info-&gt;version));</div><div class='del'>-	strlcpy(info-&gt;bus_info, pci_name(pci_dev), sizeof(info-&gt;bus_info));</div><div class='add'>+	strscpy(info-&gt;driver, DRV_NAME, sizeof(info-&gt;driver));</div><div class='add'>+	strscpy(info-&gt;version, DRV_VERSION, sizeof(info-&gt;version));</div><div class='add'>+	strscpy(info-&gt;bus_info, pci_name(pci_dev), sizeof(info-&gt;bus_info));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static u32 ne2k_pci_get_msglevel(struct net_device *dev)</div><div class='hunk'>@@ -677,30 +692,18 @@ static void ne2k_pci_remove_one(struct pci_dev *pdev)</div><div class='ctx'> 	pci_disable_device(pdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PM</div><div class='del'>-static int ne2k_pci_suspend (struct pci_dev *pdev, pm_message_t state)</div><div class='add'>+static int __maybe_unused ne2k_pci_suspend(struct device *dev_d)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *dev = pci_get_drvdata (pdev);</div><div class='add'>+	struct net_device *dev = dev_get_drvdata(dev_d);</div><div class='ctx'> </div><div class='ctx'> 	netif_device_detach(dev);</div><div class='del'>-	pci_save_state(pdev);</div><div class='del'>-	pci_disable_device(pdev);</div><div class='del'>-	pci_set_power_state(pdev, pci_choose_state(pdev, state));</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ne2k_pci_resume (struct pci_dev *pdev)</div><div class='add'>+static int __maybe_unused ne2k_pci_resume(struct device *dev_d)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *dev = pci_get_drvdata (pdev);</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	pci_set_power_state(pdev, PCI_D0);</div><div class='del'>-	pci_restore_state(pdev);</div><div class='del'>-</div><div class='del'>-	rc = pci_enable_device(pdev);</div><div class='del'>-	if (rc)</div><div class='del'>-		return rc;</div><div class='add'>+	struct net_device *dev = dev_get_drvdata(dev_d);</div><div class='ctx'> </div><div class='ctx'> 	NS8390_init(dev, 1);</div><div class='ctx'> 	netif_device_attach(dev);</div><div class='hunk'>@@ -708,36 +711,13 @@ static int ne2k_pci_resume (struct pci_dev *pdev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#endif /* CONFIG_PM */</div><div class='del'>-</div><div class='add'>+static SIMPLE_DEV_PM_OPS(ne2k_pci_pm_ops, ne2k_pci_suspend, ne2k_pci_resume);</div><div class='ctx'> </div><div class='ctx'> static struct pci_driver ne2k_driver = {</div><div class='ctx'> 	.name		= DRV_NAME,</div><div class='ctx'> 	.probe		= ne2k_pci_init_one,</div><div class='ctx'> 	.remove		= ne2k_pci_remove_one,</div><div class='ctx'> 	.id_table	= ne2k_pci_tbl,</div><div class='del'>-#ifdef CONFIG_PM</div><div class='del'>-	.suspend	= ne2k_pci_suspend,</div><div class='del'>-	.resume		= ne2k_pci_resume,</div><div class='del'>-#endif /* CONFIG_PM */</div><div class='del'>-</div><div class='add'>+	.driver.pm	= &amp;ne2k_pci_pm_ops,</div><div class='ctx'> };</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static int __init ne2k_pci_init(void)</div><div class='del'>-{</div><div class='del'>-/* when a module, this is printed whether or not devices are found in probe */</div><div class='del'>-#ifdef MODULE</div><div class='del'>-	printk(version);</div><div class='del'>-#endif</div><div class='del'>-	return pci_register_driver(&amp;ne2k_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-static void __exit ne2k_pci_cleanup(void)</div><div class='del'>-{</div><div class='del'>-	pci_unregister_driver (&amp;ne2k_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(ne2k_pci_init);</div><div class='del'>-module_exit(ne2k_pci_cleanup);</div><div class='add'>+module_pci_driver(ne2k_driver);</div><div class='head'>diff --git a/drivers/net/ethernet/8390/pcnet_cs.c b/drivers/net/ethernet/8390/pcnet_cs.c<br/>index 2777289a26c0..19f9c5db3f3b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/pcnet_cs.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/pcnet_cs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/pcnet_cs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/8390/pcnet_cs.c</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-1.0+</div><div class='ctx'> /*======================================================================</div><div class='ctx'> </div><div class='ctx'>     A PCMCIA ethernet driver for NS8390-based cards</div><div class='hunk'>@@ -17,9 +18,7 @@</div><div class='ctx'> </div><div class='ctx'>     Written 1992,1993 by Donald Becker.</div><div class='ctx'>     Copyright 1993 United States Government as represented by the</div><div class='del'>-    Director, National Security Agency.  This software may be used and</div><div class='del'>-    distributed according to the terms of the GNU General Public License,</div><div class='del'>-    incorporated herein by reference.</div><div class='add'>+    Director, National Security Agency.</div><div class='ctx'>     Donald Becker may be reached at becker@scyld.com</div><div class='ctx'> </div><div class='ctx'>     Based also on Keith Moore's changes to Don Becker's code, for IBM</div><div class='hunk'>@@ -49,7 +48,7 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/byteorder.h&gt;</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define PCNET_CMD	0x00</div><div class='ctx'> #define PCNET_DATAPORT	0x10	/* NatSemi-defined port window offset. */</div><div class='hunk'>@@ -66,7 +65,6 @@</div><div class='ctx'> #define PCNET_RDC_TIMEOUT (2*HZ/100)	/* Max wait in jiffies for Tx RDC */</div><div class='ctx'> </div><div class='ctx'> static const char *if_names[] = { "auto", "10baseT", "10base2"};</div><div class='del'>-static u32 pcnet_msg_enable;</div><div class='ctx'> </div><div class='ctx'> /*====================================================================*/</div><div class='ctx'> </div><div class='hunk'>@@ -99,7 +97,7 @@ static int pcnet_open(struct net_device *dev);</div><div class='ctx'> static int pcnet_close(struct net_device *dev);</div><div class='ctx'> static int ei_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);</div><div class='ctx'> static irqreturn_t ei_irq_wrapper(int irq, void *dev_id);</div><div class='del'>-static void ei_watchdog(u_long arg);</div><div class='add'>+static void ei_watchdog(struct timer_list *t);</div><div class='ctx'> static void pcnet_reset_8390(struct net_device *dev);</div><div class='ctx'> static int set_config(struct net_device *dev, struct ifmap *map);</div><div class='ctx'> static int setup_shmem_window(struct pcmcia_device *link, int start_pg,</div><div class='hunk'>@@ -224,10 +222,9 @@ static const struct net_device_ops pcnet_netdev_ops = {</div><div class='ctx'> 	.ndo_set_config		= set_config,</div><div class='ctx'> 	.ndo_start_xmit 	= ei_start_xmit,</div><div class='ctx'> 	.ndo_get_stats		= ei_get_stats,</div><div class='del'>-	.ndo_do_ioctl 		= ei_ioctl,</div><div class='add'>+	.ndo_eth_ioctl		= ei_ioctl,</div><div class='ctx'> 	.ndo_set_rx_mode	= ei_set_multicast_list,</div><div class='ctx'> 	.ndo_tx_timeout 	= ei_tx_timeout,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='ctx'> 	.ndo_set_mac_address 	= eth_mac_addr,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> #ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='hunk'>@@ -280,6 +277,7 @@ static struct hw_info *get_hwinfo(struct pcmcia_device *link)</div><div class='ctx'> {</div><div class='ctx'>     struct net_device *dev = link-&gt;priv;</div><div class='ctx'>     u_char __iomem *base, *virt;</div><div class='add'>+    u8 addr[ETH_ALEN];</div><div class='ctx'>     int i, j;</div><div class='ctx'> </div><div class='ctx'>     /* Allocate a small memory window */</div><div class='hunk'>@@ -291,6 +289,11 @@ static struct hw_info *get_hwinfo(struct pcmcia_device *link)</div><div class='ctx'> </div><div class='ctx'>     virt = ioremap(link-&gt;resource[2]-&gt;start,</div><div class='ctx'> 	    resource_size(link-&gt;resource[2]));</div><div class='add'>+    if (unlikely(!virt)) {</div><div class='add'>+	    pcmcia_release_window(link, link-&gt;resource[2]);</div><div class='add'>+	    return NULL;</div><div class='add'>+    }</div><div class='add'>+</div><div class='ctx'>     for (i = 0; i &lt; NR_INFO; i++) {</div><div class='ctx'> 	pcmcia_map_mem_page(link, link-&gt;resource[2],</div><div class='ctx'> 		hw_info[i].offset &amp; ~(resource_size(link-&gt;resource[2])-1));</div><div class='hunk'>@@ -299,7 +302,8 @@ static struct hw_info *get_hwinfo(struct pcmcia_device *link)</div><div class='ctx'> 	    (readb(base+2) == hw_info[i].a1) &amp;&amp;</div><div class='ctx'> 	    (readb(base+4) == hw_info[i].a2)) {</div><div class='ctx'> 		for (j = 0; j &lt; 6; j++)</div><div class='del'>-		    dev-&gt;dev_addr[j] = readb(base + (j&lt;&lt;1));</div><div class='add'>+			addr[j] = readb(base + (j&lt;&lt;1));</div><div class='add'>+		eth_hw_addr_set(dev, addr);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'>     }</div><div class='hunk'>@@ -321,6 +325,7 @@ static struct hw_info *get_prom(struct pcmcia_device *link)</div><div class='ctx'> {</div><div class='ctx'>     struct net_device *dev = link-&gt;priv;</div><div class='ctx'>     unsigned int ioaddr = dev-&gt;base_addr;</div><div class='add'>+    u8 addr[ETH_ALEN];</div><div class='ctx'>     u_char prom[32];</div><div class='ctx'>     int i, j;</div><div class='ctx'> </div><div class='hunk'>@@ -359,7 +364,8 @@ static struct hw_info *get_prom(struct pcmcia_device *link)</div><div class='ctx'>     }</div><div class='ctx'>     if ((i &lt; NR_INFO) || ((prom[28] == 0x57) &amp;&amp; (prom[30] == 0x57))) {</div><div class='ctx'> 	for (j = 0; j &lt; 6; j++)</div><div class='del'>-	    dev-&gt;dev_addr[j] = prom[j&lt;&lt;1];</div><div class='add'>+	    addr[j] = prom[j&lt;&lt;1];</div><div class='add'>+	eth_hw_addr_set(dev, addr);</div><div class='ctx'> 	return (i &lt; NR_INFO) ? hw_info+i : &amp;default_info;</div><div class='ctx'>     }</div><div class='ctx'>     return NULL;</div><div class='hunk'>@@ -374,6 +380,7 @@ static struct hw_info *get_prom(struct pcmcia_device *link)</div><div class='ctx'> static struct hw_info *get_dl10019(struct pcmcia_device *link)</div><div class='ctx'> {</div><div class='ctx'>     struct net_device *dev = link-&gt;priv;</div><div class='add'>+    u8 addr[ETH_ALEN];</div><div class='ctx'>     int i;</div><div class='ctx'>     u_char sum;</div><div class='ctx'> </div><div class='hunk'>@@ -382,7 +389,8 @@ static struct hw_info *get_dl10019(struct pcmcia_device *link)</div><div class='ctx'>     if (sum != 0xff)</div><div class='ctx'> 	return NULL;</div><div class='ctx'>     for (i = 0; i &lt; 6; i++)</div><div class='del'>-	dev-&gt;dev_addr[i] = inb_p(dev-&gt;base_addr + 0x14 + i);</div><div class='add'>+	addr[i] = inb_p(dev-&gt;base_addr + 0x14 + i);</div><div class='add'>+    eth_hw_addr_set(dev, addr);</div><div class='ctx'>     i = inb(dev-&gt;base_addr + 0x1f);</div><div class='ctx'>     return ((i == 0x91)||(i == 0x99)) ? &amp;dl10022_info : &amp;dl10019_info;</div><div class='ctx'> }</div><div class='hunk'>@@ -397,6 +405,7 @@ static struct hw_info *get_ax88190(struct pcmcia_device *link)</div><div class='ctx'> {</div><div class='ctx'>     struct net_device *dev = link-&gt;priv;</div><div class='ctx'>     unsigned int ioaddr = dev-&gt;base_addr;</div><div class='add'>+    u8 addr[ETH_ALEN];</div><div class='ctx'>     int i, j;</div><div class='ctx'> </div><div class='ctx'>     /* Not much of a test, but the alternatives are messy */</div><div class='hunk'>@@ -410,9 +419,10 @@ static struct hw_info *get_ax88190(struct pcmcia_device *link)</div><div class='ctx'> </div><div class='ctx'>     for (i = 0; i &lt; 6; i += 2) {</div><div class='ctx'> 	j = inw(ioaddr + PCNET_DATAPORT);</div><div class='del'>-	dev-&gt;dev_addr[i] = j &amp; 0xff;</div><div class='del'>-	dev-&gt;dev_addr[i+1] = j &gt;&gt; 8;</div><div class='add'>+	addr[i] = j &amp; 0xff;</div><div class='add'>+	addr[i+1] = j &gt;&gt; 8;</div><div class='ctx'>     }</div><div class='add'>+    eth_hw_addr_set(dev, addr);</div><div class='ctx'>     return NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -427,6 +437,7 @@ static struct hw_info *get_ax88190(struct pcmcia_device *link)</div><div class='ctx'> static struct hw_info *get_hwired(struct pcmcia_device *link)</div><div class='ctx'> {</div><div class='ctx'>     struct net_device *dev = link-&gt;priv;</div><div class='add'>+    u8 addr[ETH_ALEN];</div><div class='ctx'>     int i;</div><div class='ctx'> </div><div class='ctx'>     for (i = 0; i &lt; 6; i++)</div><div class='hunk'>@@ -435,7 +446,8 @@ static struct hw_info *get_hwired(struct pcmcia_device *link)</div><div class='ctx'> 	return NULL;</div><div class='ctx'> </div><div class='ctx'>     for (i = 0; i &lt; 6; i++)</div><div class='del'>-	dev-&gt;dev_addr[i] = hw_addr[i];</div><div class='add'>+	addr[i] = hw_addr[i];</div><div class='add'>+    eth_hw_addr_set(dev, addr);</div><div class='ctx'> </div><div class='ctx'>     return &amp;default_info;</div><div class='ctx'> } /* get_hwired */</div><div class='hunk'>@@ -557,7 +569,6 @@ static int pcnet_config(struct pcmcia_device *link)</div><div class='ctx'>     int start_pg, stop_pg, cm_offset;</div><div class='ctx'>     int has_shmem = 0;</div><div class='ctx'>     struct hw_info *local_hw_info;</div><div class='del'>-    struct ei_device *ei_local;</div><div class='ctx'> </div><div class='ctx'>     dev_dbg(&amp;link-&gt;dev, "pcnet_config\n");</div><div class='ctx'> </div><div class='hunk'>@@ -607,8 +618,6 @@ static int pcnet_config(struct pcmcia_device *link)</div><div class='ctx'> 	mii_phy_probe(dev);</div><div class='ctx'> </div><div class='ctx'>     SET_NETDEV_DEV(dev, &amp;link-&gt;dev);</div><div class='del'>-    ei_local = netdev_priv(dev);</div><div class='del'>-    ei_local-&gt;msg_enable = pcnet_msg_enable;</div><div class='ctx'> </div><div class='ctx'>     if (register_netdev(dev) != 0) {</div><div class='ctx'> 	pr_notice("register_netdev() failed\n");</div><div class='hunk'>@@ -918,7 +927,7 @@ static int pcnet_open(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'>     info-&gt;phy_id = info-&gt;eth_phy;</div><div class='ctx'>     info-&gt;link_status = 0x00;</div><div class='del'>-    setup_timer(&amp;info-&gt;watchdog, ei_watchdog, (u_long)dev);</div><div class='add'>+    timer_setup(&amp;info-&gt;watchdog, ei_watchdog, 0);</div><div class='ctx'>     mod_timer(&amp;info-&gt;watchdog, jiffies + HZ);</div><div class='ctx'> </div><div class='ctx'>     return ei_open(dev);</div><div class='hunk'>@@ -938,7 +947,7 @@ static int pcnet_close(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'>     link-&gt;open--;</div><div class='ctx'>     netif_stop_queue(dev);</div><div class='del'>-    del_timer_sync(&amp;info-&gt;watchdog);</div><div class='add'>+    timer_delete_sync(&amp;info-&gt;watchdog);</div><div class='ctx'> </div><div class='ctx'>     return 0;</div><div class='ctx'> } /* pcnet_close */</div><div class='hunk'>@@ -985,7 +994,7 @@ static int set_config(struct net_device *dev, struct ifmap *map)</div><div class='ctx'> 	    return -EOPNOTSUPP;</div><div class='ctx'> 	else if ((map-&gt;port &lt; 1) || (map-&gt;port &gt; 2))</div><div class='ctx'> 	    return -EINVAL;</div><div class='del'>-	dev-&gt;if_port = map-&gt;port;</div><div class='add'>+	WRITE_ONCE(dev-&gt;if_port, map-&gt;port);</div><div class='ctx'> 	netdev_info(dev, "switched to %s port\n", if_names[dev-&gt;if_port]);</div><div class='ctx'> 	NS8390_init(dev, 1);</div><div class='ctx'>     }</div><div class='hunk'>@@ -1007,10 +1016,10 @@ static irqreturn_t ei_irq_wrapper(int irq, void *dev_id)</div><div class='ctx'>     return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ei_watchdog(u_long arg)</div><div class='add'>+static void ei_watchdog(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-    struct net_device *dev = (struct net_device *)arg;</div><div class='del'>-    struct pcnet_dev *info = PRIV(dev);</div><div class='add'>+    struct pcnet_dev *info = timer_container_of(info, t, watchdog);</div><div class='add'>+    struct net_device *dev = info-&gt;p_dev-&gt;priv;</div><div class='ctx'>     unsigned int nic_base = dev-&gt;base_addr;</div><div class='ctx'>     unsigned int mii_addr = nic_base + DLINK_GPIO;</div><div class='ctx'>     u_short link;</div><div class='hunk'>@@ -1108,6 +1117,7 @@ static int ei_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)</div><div class='ctx'>     switch (cmd) {</div><div class='ctx'>     case SIOCGMIIPHY:</div><div class='ctx'> 	data-&gt;phy_id = info-&gt;phy_id;</div><div class='add'>+	fallthrough;</div><div class='ctx'>     case SIOCGMIIREG:		/* Read MII PHY register. */</div><div class='ctx'> 	data-&gt;val_out = mdio_read(mii_addr, data-&gt;phy_id, data-&gt;reg_num &amp; 0x1f);</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1177,8 +1187,10 @@ static void dma_block_input(struct net_device *dev, int count,</div><div class='ctx'>     outb_p(E8390_RREAD+E8390_START, nic_base + PCNET_CMD);</div><div class='ctx'> </div><div class='ctx'>     insw(nic_base + PCNET_DATAPORT,buf,count&gt;&gt;1);</div><div class='del'>-    if (count &amp; 0x01)</div><div class='del'>-	buf[count-1] = inb(nic_base + PCNET_DATAPORT), xfer_count++;</div><div class='add'>+    if (count &amp; 0x01) {</div><div class='add'>+	buf[count-1] = inb(nic_base + PCNET_DATAPORT);</div><div class='add'>+	xfer_count++;</div><div class='add'>+    }</div><div class='ctx'> </div><div class='ctx'>     /* This was for the ALPHA version only, but enough people have been</div><div class='ctx'>        encountering problems that it is still here. */</div><div class='hunk'>@@ -1427,6 +1439,11 @@ static int setup_shmem_window(struct pcmcia_device *link, int start_pg,</div><div class='ctx'>     /* Try scribbling on the buffer */</div><div class='ctx'>     info-&gt;base = ioremap(link-&gt;resource[3]-&gt;start,</div><div class='ctx'> 			resource_size(link-&gt;resource[3]));</div><div class='add'>+    if (unlikely(!info-&gt;base)) {</div><div class='add'>+	    ret = -ENOMEM;</div><div class='add'>+	    goto failed;</div><div class='add'>+    }</div><div class='add'>+</div><div class='ctx'>     for (i = 0; i &lt; (TX_PAGES&lt;&lt;8); i += 2)</div><div class='ctx'> 	__raw_writew((i&gt;&gt;1), info-&gt;base+offset+i);</div><div class='ctx'>     udelay(100);</div><div class='hunk'>@@ -1501,6 +1518,7 @@ static const struct pcmcia_device_id pcnet_ids[] = {</div><div class='ctx'> 	PCMCIA_DEVICE_MANF_CARD(0x026f, 0x030a),</div><div class='ctx'> 	PCMCIA_DEVICE_MANF_CARD(0x0274, 0x1103),</div><div class='ctx'> 	PCMCIA_DEVICE_MANF_CARD(0x0274, 0x1121),</div><div class='add'>+	PCMCIA_DEVICE_MANF_CARD(0xc001, 0x0009),</div><div class='ctx'> 	PCMCIA_DEVICE_PROD_ID12("2408LAN", "Ethernet", 0x352fff7f, 0x00b2e941),</div><div class='ctx'> 	PCMCIA_DEVICE_PROD_ID1234("Socket", "CF 10/100 Ethernet Card", "Revision B", "05/11/06", 0xb38bcc2e, 0x4de88352, 0xeaca6c8d, 0x7e57c22e),</div><div class='ctx'> 	PCMCIA_DEVICE_PROD_ID123("Cardwell", "PCMCIA", "ETHERNET", 0x9533672e, 0x281f1c5d, 0x3ff7175b),</div><div class='hunk'>@@ -1518,7 +1536,7 @@ static const struct pcmcia_device_id pcnet_ids[] = {</div><div class='ctx'> 	PCMCIA_DEVICE_PROD_ID12("ACCTON", "EN2216-PCMCIA-ETHERNET", 0xdfc6b5b2, 0x5542bfff),</div><div class='ctx'> 	PCMCIA_DEVICE_PROD_ID12("Allied Telesis, K.K.", "CentreCOM LA100-PCM-T V2 100/10M LAN PC Card", 0xbb7fbdd7, 0xcd91cc68),</div><div class='ctx'> 	PCMCIA_DEVICE_PROD_ID12("Allied Telesis K.K.", "LA100-PCM V2", 0x36634a66, 0xc6d05997),</div><div class='del'>-  	PCMCIA_DEVICE_PROD_ID12("Allied Telesis, K.K.", "CentreCOM LA-PCM_V2", 0xbb7fBdd7, 0x28e299f8),</div><div class='add'>+	PCMCIA_DEVICE_PROD_ID12("Allied Telesis, K.K.", "CentreCOM LA-PCM_V2", 0xbb7fBdd7, 0x28e299f8),</div><div class='ctx'> 	PCMCIA_DEVICE_PROD_ID12("Allied Telesis K.K.", "LA-PCM V3", 0x36634a66, 0x62241d96),</div><div class='ctx'> 	PCMCIA_DEVICE_PROD_ID12("AmbiCom", "AMB8010", 0x5070a7f9, 0x82f96e96),</div><div class='ctx'> 	PCMCIA_DEVICE_PROD_ID12("AmbiCom", "AMB8610", 0x5070a7f9, 0x86741224),</div><div class='head'>diff --git a/drivers/net/ethernet/8390/smc-ultra.c b/drivers/net/ethernet/8390/smc-ultra.c<br/>index 139385dcdaa7..22ca804b2e95 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/smc-ultra.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/smc-ultra.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/smc-ultra.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/8390/smc-ultra.c</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-1.0+</div><div class='ctx'> /* smc-ultra.c: A SMC Ultra ethernet driver for linux. */</div><div class='ctx'> /*</div><div class='ctx'> 	This is a driver for the SMC Ultra and SMC EtherEZ ISA ethercards.</div><div class='hunk'>@@ -7,9 +8,6 @@</div><div class='ctx'> 	Copyright 1993 United States Government as represented by the</div><div class='ctx'> 	Director, National Security Agency.</div><div class='ctx'> </div><div class='del'>-	This software may be used and distributed according to the terms</div><div class='del'>-	of the GNU General Public License, incorporated herein by reference.</div><div class='del'>-</div><div class='ctx'> 	The author may be reached as becker@scyld.com, or C/O</div><div class='ctx'> 	Scyld Computing Corporation</div><div class='ctx'> 	410 Severn Ave., Suite 210</div><div class='hunk'>@@ -66,6 +64,7 @@ static const char version[] =</div><div class='ctx'> #include &lt;linux/isapnp.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;net/Space.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/irq.h&gt;</div><div class='hunk'>@@ -195,7 +194,6 @@ static const struct net_device_ops ultra_netdev_ops = {</div><div class='ctx'> 	.ndo_set_rx_mode	= ei_set_multicast_list,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> 	.ndo_set_mac_address 	= eth_mac_addr,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='ctx'> #ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='ctx'> 	.ndo_poll_controller 	= ultra_poll,</div><div class='ctx'> #endif</div><div class='hunk'>@@ -205,6 +203,7 @@ static int __init ultra_probe1(struct net_device *dev, int ioaddr)</div><div class='ctx'> {</div><div class='ctx'> 	int i, retval;</div><div class='ctx'> 	int checksum = 0;</div><div class='add'>+	u8 macaddr[ETH_ALEN];</div><div class='ctx'> 	const char *model_name;</div><div class='ctx'> 	unsigned char eeprom_irq = 0;</div><div class='ctx'> 	static unsigned version_printed;</div><div class='hunk'>@@ -240,7 +239,8 @@ static int __init ultra_probe1(struct net_device *dev, int ioaddr)</div><div class='ctx'> 	model_name = (idreg &amp; 0xF0) == 0x20 ? "SMC Ultra" : "SMC EtherEZ";</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; 6; i++)</div><div class='del'>-		dev-&gt;dev_addr[i] = inb(ioaddr + 8 + i);</div><div class='add'>+		macaddr[i] = inb(ioaddr + 8 + i);</div><div class='add'>+	eth_hw_addr_set(dev, macaddr);</div><div class='ctx'> </div><div class='ctx'> 	netdev_info(dev, "%s at %#3x, %pM", model_name,</div><div class='ctx'> 		    ioaddr, dev-&gt;dev_addr);</div><div class='hunk'>@@ -348,11 +348,11 @@ static int __init ultra_probe_isapnp(struct net_device *dev)</div><div class='ctx'>                                             idev))) {</div><div class='ctx'>                         /* Avoid already found cards from previous calls */</div><div class='ctx'>                         if (pnp_device_attach(idev) &lt; 0)</div><div class='del'>-                        	continue;</div><div class='add'>+				continue;</div><div class='ctx'>                         if (pnp_activate_dev(idev) &lt; 0) {</div><div class='ctx'>                               __again:</div><div class='del'>-                        	pnp_device_detach(idev);</div><div class='del'>-                        	continue;</div><div class='add'>+				pnp_device_detach(idev);</div><div class='add'>+				continue;</div><div class='ctx'>                         }</div><div class='ctx'> 			/* if no io and irq, search for next */</div><div class='ctx'> 			if (!pnp_port_valid(idev, 0) || !pnp_irq_valid(idev, 0))</div><div class='hunk'>@@ -523,7 +523,6 @@ static void ultra_pio_input(struct net_device *dev, int count,</div><div class='ctx'> 	/* We know skbuffs are padded to at least word alignment. */</div><div class='ctx'> 	insw(ioaddr + IOPD, buf, (count+1)&gt;&gt;1);</div><div class='ctx'> }</div><div class='del'>-</div><div class='ctx'> static void ultra_pio_output(struct net_device *dev, int count,</div><div class='ctx'> 							const unsigned char *buf, const int start_page)</div><div class='ctx'> {</div><div class='hunk'>@@ -562,9 +561,9 @@ static struct net_device *dev_ultra[MAX_ULTRA_CARDS];</div><div class='ctx'> static int io[MAX_ULTRA_CARDS];</div><div class='ctx'> static int irq[MAX_ULTRA_CARDS];</div><div class='ctx'> </div><div class='del'>-module_param_array(io, int, NULL, 0);</div><div class='del'>-module_param_array(irq, int, NULL, 0);</div><div class='del'>-module_param_named(msg_enable, ultra_msg_enable, uint, (S_IRUSR|S_IRGRP|S_IROTH));</div><div class='add'>+module_param_hw_array(io, int, ioport, NULL, 0);</div><div class='add'>+module_param_hw_array(irq, int, irq, NULL, 0);</div><div class='add'>+module_param_named(msg_enable, ultra_msg_enable, uint, 0444);</div><div class='ctx'> MODULE_PARM_DESC(io, "I/O base address(es)");</div><div class='ctx'> MODULE_PARM_DESC(irq, "IRQ number(s) (assigned)");</div><div class='ctx'> MODULE_PARM_DESC(msg_enable, "Debug message level (see linux/netdevice.h for bitmap)");</div><div class='hunk'>@@ -573,8 +572,7 @@ MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='ctx'> /* This is set up so that only a single autoprobe takes place per call.</div><div class='ctx'> ISA device autoprobes on a running machine are not recommended. */</div><div class='del'>-int __init</div><div class='del'>-init_module(void)</div><div class='add'>+static int __init ultra_init_module(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev;</div><div class='ctx'> 	int this_dev, found = 0;</div><div class='hunk'>@@ -601,6 +599,7 @@ init_module(void)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	return -ENXIO;</div><div class='ctx'> }</div><div class='add'>+module_init(ultra_init_module);</div><div class='ctx'> </div><div class='ctx'> static void cleanup_card(struct net_device *dev)</div><div class='ctx'> {</div><div class='hunk'>@@ -614,8 +613,7 @@ static void cleanup_card(struct net_device *dev)</div><div class='ctx'> 	iounmap(ei_status.mem);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __exit</div><div class='del'>-cleanup_module(void)</div><div class='add'>+static void __exit ultra_cleanup_module(void)</div><div class='ctx'> {</div><div class='ctx'> 	int this_dev;</div><div class='ctx'> </div><div class='hunk'>@@ -628,4 +626,5 @@ cleanup_module(void)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+module_exit(ultra_cleanup_module);</div><div class='ctx'> #endif /* MODULE */</div><div class='head'>diff --git a/drivers/net/ethernet/8390/stnic.c b/drivers/net/ethernet/8390/stnic.c<br/>index aca957d4e121..6cc0e190aa79 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/stnic.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/stnic.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/stnic.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/8390/stnic.c</a></div><div class='hunk'>@@ -1,9 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /* stnic.c : A SH7750 specific part of driver for NS DP83902A ST-NIC.</div><div class='ctx'>  *</div><div class='del'>- * This file is subject to the terms and conditions of the GNU General Public</div><div class='del'>- * License.  See the file "COPYING" in the main directory of this archive</div><div class='del'>- * for more details.</div><div class='del'>- *</div><div class='ctx'>  * Copyright (C) 1999 kaz Kojima</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='hunk'>@@ -71,7 +68,7 @@ static void stnic_init (struct net_device *dev);</div><div class='ctx'> </div><div class='ctx'> static u32 stnic_msg_enable;</div><div class='ctx'> </div><div class='del'>-module_param_named(msg_enable, stnic_msg_enable, uint, (S_IRUSR|S_IRGRP|S_IROTH));</div><div class='add'>+module_param_named(msg_enable, stnic_msg_enable, uint, 0444);</div><div class='ctx'> MODULE_PARM_DESC(msg_enable, "Debug message level (see linux/netdevice.h for bitmap)");</div><div class='ctx'> </div><div class='ctx'> /* SH7750 specific read/write io. */</div><div class='hunk'>@@ -104,8 +101,8 @@ STNIC_WRITE (int reg, byte val)</div><div class='ctx'> static int __init stnic_probe(void)</div><div class='ctx'> {</div><div class='ctx'>   struct net_device *dev;</div><div class='del'>-  int i, err;</div><div class='ctx'>   struct ei_device *ei_local;</div><div class='add'>+  int err;</div><div class='ctx'> </div><div class='ctx'>   /* If we are not running on a SolutionEngine, give up now */</div><div class='ctx'>   if (! MACH_SE)</div><div class='hunk'>@@ -114,13 +111,12 @@ static int __init stnic_probe(void)</div><div class='ctx'>   /* New style probing API */</div><div class='ctx'>   dev = alloc_ei_netdev();</div><div class='ctx'>   if (!dev)</div><div class='del'>-  	return -ENOMEM;</div><div class='add'>+	return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SH_STANDARD_BIOS</div><div class='ctx'>   sh_bios_get_node_addr (stnic_eadr);</div><div class='ctx'> #endif</div><div class='del'>-  for (i = 0; i &lt; ETH_ALEN; i++)</div><div class='del'>-    dev-&gt;dev_addr[i] = stnic_eadr[i];</div><div class='add'>+  eth_hw_addr_set(dev, stnic_eadr);</div><div class='ctx'> </div><div class='ctx'>   /* Set the base address to point to the NIC, not the "real" base! */</div><div class='ctx'>   dev-&gt;base_addr = 0x1000;</div><div class='hunk'>@@ -300,4 +296,5 @@ static void __exit stnic_cleanup(void)</div><div class='ctx'> </div><div class='ctx'> module_init(stnic_probe);</div><div class='ctx'> module_exit(stnic_cleanup);</div><div class='add'>+MODULE_DESCRIPTION("National Semiconductor DP83902AV ethernet driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/8390/wd.c b/drivers/net/ethernet/8390/wd.c<br/>index dd7d816bde52..ffd639477dfc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/wd.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/wd.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/wd.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/8390/wd.c</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-1.0+</div><div class='ctx'> /* wd.c: A WD80x3 ethernet driver for linux. */</div><div class='ctx'> /*</div><div class='ctx'> 	Written 1993-94 by Donald Becker.</div><div class='hunk'>@@ -5,9 +6,6 @@</div><div class='ctx'> 	Copyright 1993 United States Government as represented by the</div><div class='ctx'> 	Director, National Security Agency.</div><div class='ctx'> </div><div class='del'>-	This software may be used and distributed according to the terms</div><div class='del'>-	of the GNU General Public License, incorporated herein by reference.</div><div class='del'>-</div><div class='ctx'> 	The author may be reached as becker@scyld.com, or C/O</div><div class='ctx'> 	Scyld Computing Corporation</div><div class='ctx'> 	410 Severn Ave., Suite 210</div><div class='hunk'>@@ -37,6 +35,7 @@ static const char version[] =</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;net/Space.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -156,7 +155,6 @@ static const struct net_device_ops wd_netdev_ops = {</div><div class='ctx'> 	.ndo_set_rx_mode	= ei_set_multicast_list,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> 	.ndo_set_mac_address 	= eth_mac_addr,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='ctx'> #ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='ctx'> 	.ndo_poll_controller 	= ei_poll,</div><div class='ctx'> #endif</div><div class='hunk'>@@ -169,6 +167,7 @@ static int __init wd_probe1(struct net_device *dev, int ioaddr)</div><div class='ctx'> 	int checksum = 0;</div><div class='ctx'> 	int ancient = 0;			/* An old card without config registers. */</div><div class='ctx'> 	int word16 = 0;				/* 0 = 8 bit, 1 = 16 bit */</div><div class='add'>+	u8 addr[ETH_ALEN];</div><div class='ctx'> 	const char *model_name;</div><div class='ctx'> 	static unsigned version_printed;</div><div class='ctx'> 	struct ei_device *ei_local = netdev_priv(dev);</div><div class='hunk'>@@ -192,7 +191,8 @@ static int __init wd_probe1(struct net_device *dev, int ioaddr)</div><div class='ctx'> 		netdev_info(dev, version);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; 6; i++)</div><div class='del'>-		dev-&gt;dev_addr[i] = inb(ioaddr + 8 + i);</div><div class='add'>+		addr[i] = inb(ioaddr + 8 + i);</div><div class='add'>+	eth_hw_addr_set(dev, addr);</div><div class='ctx'> </div><div class='ctx'> 	netdev_info(dev, "WD80x3 at %#3x, %pM", ioaddr, dev-&gt;dev_addr);</div><div class='ctx'> </div><div class='hunk'>@@ -300,7 +300,7 @@ static int __init wd_probe1(struct net_device *dev, int ioaddr)</div><div class='ctx'> </div><div class='ctx'> 			outb_p(0x00, nic_addr+EN0_IMR);	/* Mask all intrs. again. */</div><div class='ctx'> </div><div class='del'>-			if (netif_msg_drv(ei_local))</div><div class='add'>+			if (wd_msg_enable &amp; NETIF_MSG_PROBE)</div><div class='ctx'> 				pr_cont(" autoirq is %d", dev-&gt;irq);</div><div class='ctx'> 			if (dev-&gt;irq &lt; 2)</div><div class='ctx'> 				dev-&gt;irq = word16 ? 10 : 5;</div><div class='hunk'>@@ -504,11 +504,11 @@ static int irq[MAX_WD_CARDS];</div><div class='ctx'> static int mem[MAX_WD_CARDS];</div><div class='ctx'> static int mem_end[MAX_WD_CARDS];	/* for non std. mem size */</div><div class='ctx'> </div><div class='del'>-module_param_array(io, int, NULL, 0);</div><div class='del'>-module_param_array(irq, int, NULL, 0);</div><div class='del'>-module_param_array(mem, int, NULL, 0);</div><div class='del'>-module_param_array(mem_end, int, NULL, 0);</div><div class='del'>-module_param_named(msg_enable, wd_msg_enable, uint, (S_IRUSR|S_IRGRP|S_IROTH));</div><div class='add'>+module_param_hw_array(io, int, ioport, NULL, 0);</div><div class='add'>+module_param_hw_array(irq, int, irq, NULL, 0);</div><div class='add'>+module_param_hw_array(mem, int, iomem, NULL, 0);</div><div class='add'>+module_param_hw_array(mem_end, int, iomem, NULL, 0);</div><div class='add'>+module_param_named(msg_enable, wd_msg_enable, uint, 0444);</div><div class='ctx'> MODULE_PARM_DESC(io, "I/O base address(es)");</div><div class='ctx'> MODULE_PARM_DESC(irq, "IRQ number(s) (ignored for PureData boards)");</div><div class='ctx'> MODULE_PARM_DESC(mem, "memory base address(es)(ignored for PureData boards)");</div><div class='hunk'>@@ -520,7 +520,7 @@ MODULE_LICENSE("GPL");</div><div class='ctx'> /* This is set up so that only a single autoprobe takes place per call.</div><div class='ctx'> ISA device autoprobes on a running machine are not recommended. */</div><div class='ctx'> </div><div class='del'>-int __init init_module(void)</div><div class='add'>+static int __init wd_init_module(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev;</div><div class='ctx'> 	int this_dev, found = 0;</div><div class='hunk'>@@ -549,6 +549,7 @@ int __init init_module(void)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	return -ENXIO;</div><div class='ctx'> }</div><div class='add'>+module_init(wd_init_module);</div><div class='ctx'> </div><div class='ctx'> static void cleanup_card(struct net_device *dev)</div><div class='ctx'> {</div><div class='hunk'>@@ -557,8 +558,7 @@ static void cleanup_card(struct net_device *dev)</div><div class='ctx'> 	iounmap(ei_status.mem);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __exit</div><div class='del'>-cleanup_module(void)</div><div class='add'>+static void __exit wd_cleanup_module(void)</div><div class='ctx'> {</div><div class='ctx'> 	int this_dev;</div><div class='ctx'> </div><div class='hunk'>@@ -571,4 +571,5 @@ cleanup_module(void)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+module_exit(wd_cleanup_module);</div><div class='ctx'> #endif /* MODULE */</div><div class='head'>diff --git a/drivers/net/ethernet/8390/xsurf100.c b/drivers/net/ethernet/8390/xsurf100.c<br/>new file mode 100644<br/>index 000000000000..fe7a74707aa4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/xsurf100.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/8390/xsurf100.c</a></div><div class='hunk'>@@ -0,0 +1,377 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/zorro.h&gt;</div><div class='add'>+#include &lt;net/ax88796.h&gt;</div><div class='add'>+#include &lt;asm/amigaints.h&gt;</div><div class='add'>+</div><div class='add'>+#define ZORRO_PROD_INDIVIDUAL_COMPUTERS_X_SURF100 \</div><div class='add'>+		ZORRO_ID(INDIVIDUAL_COMPUTERS, 0x64, 0)</div><div class='add'>+</div><div class='add'>+#define XS100_IRQSTATUS_BASE 0x40</div><div class='add'>+#define XS100_8390_BASE 0x800</div><div class='add'>+</div><div class='add'>+/* Longword-access area. Translated to 2 16-bit access cycles by the</div><div class='add'>+ * X-Surf 100 FPGA</div><div class='add'>+ */</div><div class='add'>+#define XS100_8390_DATA32_BASE 0x8000</div><div class='add'>+#define XS100_8390_DATA32_SIZE 0x2000</div><div class='add'>+/* Sub-Areas for fast data register access; addresses relative to area begin */</div><div class='add'>+#define XS100_8390_DATA_READ32_BASE 0x0880</div><div class='add'>+#define XS100_8390_DATA_WRITE32_BASE 0x0C80</div><div class='add'>+#define XS100_8390_DATA_AREA_SIZE 0x80</div><div class='add'>+</div><div class='add'>+/* force unsigned long back to 'void __iomem *' */</div><div class='add'>+#define ax_convert_addr(_a) ((void __force __iomem *)(_a))</div><div class='add'>+</div><div class='add'>+#define ei_inb(_a) z_readb(ax_convert_addr(_a))</div><div class='add'>+#define ei_outb(_v, _a) z_writeb(_v, ax_convert_addr(_a))</div><div class='add'>+</div><div class='add'>+#define ei_inw(_a) z_readw(ax_convert_addr(_a))</div><div class='add'>+#define ei_outw(_v, _a) z_writew(_v, ax_convert_addr(_a))</div><div class='add'>+</div><div class='add'>+#define ei_inb_p(_a) ei_inb(_a)</div><div class='add'>+#define ei_outb_p(_v, _a) ei_outb(_v, _a)</div><div class='add'>+</div><div class='add'>+/* define EI_SHIFT() to take into account our register offsets */</div><div class='add'>+#define EI_SHIFT(x) (ei_local-&gt;reg_offset[(x)])</div><div class='add'>+</div><div class='add'>+/* Ensure we have our RCR base value */</div><div class='add'>+#define AX88796_PLATFORM</div><div class='add'>+</div><div class='add'>+#include "8390.h"</div><div class='add'>+</div><div class='add'>+/* from ne.c */</div><div class='add'>+#define NE_CMD		EI_SHIFT(0x00)</div><div class='add'>+#define NE_RESET	EI_SHIFT(0x1f)</div><div class='add'>+#define NE_DATAPORT	EI_SHIFT(0x10)</div><div class='add'>+</div><div class='add'>+struct xsurf100_ax_plat_data {</div><div class='add'>+	struct ax_plat_data ax;</div><div class='add'>+	void __iomem *base_regs;</div><div class='add'>+	void __iomem *data_area;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int is_xsurf100_network_irq(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct xsurf100_ax_plat_data *xs100 = dev_get_platdata(&amp;pdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	return (readw(xs100-&gt;base_regs + XS100_IRQSTATUS_BASE) &amp; 0xaaaa) != 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* These functions guarantee that the iomem is accessed with 32 bit</div><div class='add'>+ * cycles only. z_memcpy_fromio / z_memcpy_toio don't</div><div class='add'>+ */</div><div class='add'>+static void z_memcpy_fromio32(void *dst, const void __iomem *src, size_t bytes)</div><div class='add'>+{</div><div class='add'>+	while (bytes &gt; 32) {</div><div class='add'>+		asm __volatile__</div><div class='add'>+		   ("movem.l (%0)+,%%d0-%%d7\n"</div><div class='add'>+		    "movem.l %%d0-%%d7,(%1)\n"</div><div class='add'>+		    "adda.l #32,%1" : "=a"(src), "=a"(dst)</div><div class='add'>+		    : "0"(src), "1"(dst) : "d0", "d1", "d2", "d3", "d4",</div><div class='add'>+					   "d5", "d6", "d7", "memory");</div><div class='add'>+		bytes -= 32;</div><div class='add'>+	}</div><div class='add'>+	while (bytes) {</div><div class='add'>+		*(uint32_t *)dst = z_readl(src);</div><div class='add'>+		src += 4;</div><div class='add'>+		dst += 4;</div><div class='add'>+		bytes -= 4;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void z_memcpy_toio32(void __iomem *dst, const void *src, size_t bytes)</div><div class='add'>+{</div><div class='add'>+	while (bytes) {</div><div class='add'>+		z_writel(*(const uint32_t *)src, dst);</div><div class='add'>+		src += 4;</div><div class='add'>+		dst += 4;</div><div class='add'>+		bytes -= 4;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xs100_write(struct net_device *dev, const void *src,</div><div class='add'>+			unsigned int count)</div><div class='add'>+{</div><div class='add'>+	struct ei_device *ei_local = netdev_priv(dev);</div><div class='add'>+	struct platform_device *pdev = to_platform_device(dev-&gt;dev.parent);</div><div class='add'>+	struct xsurf100_ax_plat_data *xs100 = dev_get_platdata(&amp;pdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	/* copy whole blocks */</div><div class='add'>+	while (count &gt; XS100_8390_DATA_AREA_SIZE) {</div><div class='add'>+		z_memcpy_toio32(xs100-&gt;data_area +</div><div class='add'>+				XS100_8390_DATA_WRITE32_BASE, src,</div><div class='add'>+				XS100_8390_DATA_AREA_SIZE);</div><div class='add'>+		src += XS100_8390_DATA_AREA_SIZE;</div><div class='add'>+		count -= XS100_8390_DATA_AREA_SIZE;</div><div class='add'>+	}</div><div class='add'>+	/* copy whole dwords */</div><div class='add'>+	z_memcpy_toio32(xs100-&gt;data_area + XS100_8390_DATA_WRITE32_BASE,</div><div class='add'>+			src, count &amp; ~3);</div><div class='add'>+	src += count &amp; ~3;</div><div class='add'>+	if (count &amp; 2) {</div><div class='add'>+		ei_outw(*(uint16_t *)src, ei_local-&gt;mem + NE_DATAPORT);</div><div class='add'>+		src += 2;</div><div class='add'>+	}</div><div class='add'>+	if (count &amp; 1)</div><div class='add'>+		ei_outb(*(uint8_t *)src, ei_local-&gt;mem + NE_DATAPORT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xs100_read(struct net_device *dev, void *dst, unsigned int count)</div><div class='add'>+{</div><div class='add'>+	struct ei_device *ei_local = netdev_priv(dev);</div><div class='add'>+	struct platform_device *pdev = to_platform_device(dev-&gt;dev.parent);</div><div class='add'>+	struct xsurf100_ax_plat_data *xs100 = dev_get_platdata(&amp;pdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	/* copy whole blocks */</div><div class='add'>+	while (count &gt; XS100_8390_DATA_AREA_SIZE) {</div><div class='add'>+		z_memcpy_fromio32(dst, xs100-&gt;data_area +</div><div class='add'>+				  XS100_8390_DATA_READ32_BASE,</div><div class='add'>+				  XS100_8390_DATA_AREA_SIZE);</div><div class='add'>+		dst += XS100_8390_DATA_AREA_SIZE;</div><div class='add'>+		count -= XS100_8390_DATA_AREA_SIZE;</div><div class='add'>+	}</div><div class='add'>+	/* copy whole dwords */</div><div class='add'>+	z_memcpy_fromio32(dst, xs100-&gt;data_area + XS100_8390_DATA_READ32_BASE,</div><div class='add'>+			  count &amp; ~3);</div><div class='add'>+	dst += count &amp; ~3;</div><div class='add'>+	if (count &amp; 2) {</div><div class='add'>+		*(uint16_t *)dst = ei_inw(ei_local-&gt;mem + NE_DATAPORT);</div><div class='add'>+		dst += 2;</div><div class='add'>+	}</div><div class='add'>+	if (count &amp; 1)</div><div class='add'>+		*(uint8_t *)dst = ei_inb(ei_local-&gt;mem + NE_DATAPORT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Block input and output, similar to the Crynwr packet driver. If</div><div class='add'>+ * you are porting to a new ethercard, look at the packet driver</div><div class='add'>+ * source for hints. The NEx000 doesn't share the on-board packet</div><div class='add'>+ * memory -- you have to put the packet out through the "remote DMA"</div><div class='add'>+ * dataport using ei_outb.</div><div class='add'>+ */</div><div class='add'>+static void xs100_block_input(struct net_device *dev, int count,</div><div class='add'>+			      struct sk_buff *skb, int ring_offset)</div><div class='add'>+{</div><div class='add'>+	struct ei_device *ei_local = netdev_priv(dev);</div><div class='add'>+	void __iomem *nic_base = ei_local-&gt;mem;</div><div class='add'>+	char *buf = skb-&gt;data;</div><div class='add'>+</div><div class='add'>+	if (ei_local-&gt;dmaing) {</div><div class='add'>+		netdev_err(dev,</div><div class='add'>+			   "DMAing conflict in %s [DMAstat:%d][irqlock:%d]\n",</div><div class='add'>+			   __func__,</div><div class='add'>+			   ei_local-&gt;dmaing, ei_local-&gt;irqlock);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ei_local-&gt;dmaing |= 0x01;</div><div class='add'>+</div><div class='add'>+	ei_outb(E8390_NODMA + E8390_PAGE0 + E8390_START, nic_base + NE_CMD);</div><div class='add'>+	ei_outb(count &amp; 0xff, nic_base + EN0_RCNTLO);</div><div class='add'>+	ei_outb(count &gt;&gt; 8, nic_base + EN0_RCNTHI);</div><div class='add'>+	ei_outb(ring_offset &amp; 0xff, nic_base + EN0_RSARLO);</div><div class='add'>+	ei_outb(ring_offset &gt;&gt; 8, nic_base + EN0_RSARHI);</div><div class='add'>+	ei_outb(E8390_RREAD + E8390_START, nic_base + NE_CMD);</div><div class='add'>+</div><div class='add'>+	xs100_read(dev, buf, count);</div><div class='add'>+</div><div class='add'>+	ei_local-&gt;dmaing &amp;= ~1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xs100_block_output(struct net_device *dev, int count,</div><div class='add'>+			       const unsigned char *buf, const int start_page)</div><div class='add'>+{</div><div class='add'>+	struct ei_device *ei_local = netdev_priv(dev);</div><div class='add'>+	void __iomem *nic_base = ei_local-&gt;mem;</div><div class='add'>+	unsigned long dma_start;</div><div class='add'>+</div><div class='add'>+	/* Round the count up for word writes. Do we need to do this?</div><div class='add'>+	 * What effect will an odd byte count have on the 8390?  I</div><div class='add'>+	 * should check someday.</div><div class='add'>+	 */</div><div class='add'>+	if (ei_local-&gt;word16 &amp;&amp; (count &amp; 0x01))</div><div class='add'>+		count++;</div><div class='add'>+</div><div class='add'>+	/* This *shouldn't* happen. If it does, it's the last thing</div><div class='add'>+	 * you'll see</div><div class='add'>+	 */</div><div class='add'>+	if (ei_local-&gt;dmaing) {</div><div class='add'>+		netdev_err(dev,</div><div class='add'>+			   "DMAing conflict in %s [DMAstat:%d][irqlock:%d]\n",</div><div class='add'>+			   __func__,</div><div class='add'>+			   ei_local-&gt;dmaing, ei_local-&gt;irqlock);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ei_local-&gt;dmaing |= 0x01;</div><div class='add'>+	/* We should already be in page 0, but to be safe... */</div><div class='add'>+	ei_outb(E8390_PAGE0 + E8390_START + E8390_NODMA, nic_base + NE_CMD);</div><div class='add'>+</div><div class='add'>+	ei_outb(ENISR_RDC, nic_base + EN0_ISR);</div><div class='add'>+</div><div class='add'>+	/* Now the normal output. */</div><div class='add'>+	ei_outb(count &amp; 0xff, nic_base + EN0_RCNTLO);</div><div class='add'>+	ei_outb(count &gt;&gt; 8, nic_base + EN0_RCNTHI);</div><div class='add'>+	ei_outb(0x00, nic_base + EN0_RSARLO);</div><div class='add'>+	ei_outb(start_page, nic_base + EN0_RSARHI);</div><div class='add'>+</div><div class='add'>+	ei_outb(E8390_RWRITE + E8390_START, nic_base + NE_CMD);</div><div class='add'>+</div><div class='add'>+	xs100_write(dev, buf, count);</div><div class='add'>+</div><div class='add'>+	dma_start = jiffies;</div><div class='add'>+</div><div class='add'>+	while ((ei_inb(nic_base + EN0_ISR) &amp; ENISR_RDC) == 0) {</div><div class='add'>+		if (jiffies - dma_start &gt; 2 * HZ / 100) {	/* 20ms */</div><div class='add'>+			netdev_warn(dev, "timeout waiting for Tx RDC.\n");</div><div class='add'>+			ei_local-&gt;reset_8390(dev);</div><div class='add'>+			ax_NS8390_reinit(dev);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ei_outb(ENISR_RDC, nic_base + EN0_ISR);	/* Ack intr. */</div><div class='add'>+	ei_local-&gt;dmaing &amp;= ~0x01;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xsurf100_probe(struct zorro_dev *zdev,</div><div class='add'>+			  const struct zorro_device_id *ent)</div><div class='add'>+{</div><div class='add'>+	struct platform_device *pdev;</div><div class='add'>+	struct xsurf100_ax_plat_data ax88796_data;</div><div class='add'>+	struct resource res[2] = {</div><div class='add'>+		DEFINE_RES_NAMED(IRQ_AMIGA_PORTS, 1, NULL,</div><div class='add'>+				 IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE),</div><div class='add'>+		DEFINE_RES_MEM(zdev-&gt;resource.start + XS100_8390_BASE,</div><div class='add'>+			       4 * 0x20)</div><div class='add'>+	};</div><div class='add'>+	int reg;</div><div class='add'>+	/* This table is referenced in the device structure, so it must</div><div class='add'>+	 * outlive the scope of xsurf100_probe.</div><div class='add'>+	 */</div><div class='add'>+	static u32 reg_offsets[32];</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	/* X-Surf 100 control and 32 bit ring buffer data access areas.</div><div class='add'>+	 * These resources are not used by the ax88796 driver, so must</div><div class='add'>+	 * be requested here and passed via platform data.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	if (!request_mem_region(zdev-&gt;resource.start, 0x100, zdev-&gt;name)) {</div><div class='add'>+		dev_err(&amp;zdev-&gt;dev, "cannot reserve X-Surf 100 control registers\n");</div><div class='add'>+		return -ENXIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!request_mem_region(zdev-&gt;resource.start +</div><div class='add'>+				XS100_8390_DATA32_BASE,</div><div class='add'>+				XS100_8390_DATA32_SIZE,</div><div class='add'>+				"X-Surf 100 32-bit data access")) {</div><div class='add'>+		dev_err(&amp;zdev-&gt;dev, "cannot reserve 32-bit area\n");</div><div class='add'>+		ret = -ENXIO;</div><div class='add'>+		goto exit_req;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (reg = 0; reg &lt; 0x20; reg++)</div><div class='add'>+		reg_offsets[reg] = 4 * reg;</div><div class='add'>+</div><div class='add'>+	memset(&amp;ax88796_data, 0, sizeof(ax88796_data));</div><div class='add'>+	ax88796_data.ax.flags = AXFLG_HAS_EEPROM;</div><div class='add'>+	ax88796_data.ax.wordlength = 2;</div><div class='add'>+	ax88796_data.ax.dcr_val = 0x48;</div><div class='add'>+	ax88796_data.ax.rcr_val = 0x40;</div><div class='add'>+	ax88796_data.ax.reg_offsets = reg_offsets;</div><div class='add'>+	ax88796_data.ax.check_irq = is_xsurf100_network_irq;</div><div class='add'>+	ax88796_data.base_regs = ioremap(zdev-&gt;resource.start, 0x100);</div><div class='add'>+</div><div class='add'>+	/* error handling for ioremap regs */</div><div class='add'>+	if (!ax88796_data.base_regs) {</div><div class='add'>+		dev_err(&amp;zdev-&gt;dev, "Cannot ioremap area %pR (registers)\n",</div><div class='add'>+			&amp;zdev-&gt;resource);</div><div class='add'>+</div><div class='add'>+		ret = -ENXIO;</div><div class='add'>+		goto exit_req2;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ax88796_data.data_area = ioremap(zdev-&gt;resource.start +</div><div class='add'>+			XS100_8390_DATA32_BASE, XS100_8390_DATA32_SIZE);</div><div class='add'>+</div><div class='add'>+	/* error handling for ioremap data */</div><div class='add'>+	if (!ax88796_data.data_area) {</div><div class='add'>+		dev_err(&amp;zdev-&gt;dev,</div><div class='add'>+			"Cannot ioremap area %pR offset %x (32-bit access)\n",</div><div class='add'>+			&amp;zdev-&gt;resource,  XS100_8390_DATA32_BASE);</div><div class='add'>+</div><div class='add'>+		ret = -ENXIO;</div><div class='add'>+		goto exit_mem;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ax88796_data.ax.block_output = xs100_block_output;</div><div class='add'>+	ax88796_data.ax.block_input = xs100_block_input;</div><div class='add'>+</div><div class='add'>+	pdev = platform_device_register_resndata(&amp;zdev-&gt;dev, "ax88796",</div><div class='add'>+						 zdev-&gt;slotaddr, res, 2,</div><div class='add'>+						 &amp;ax88796_data,</div><div class='add'>+						 sizeof(ax88796_data));</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(pdev)) {</div><div class='add'>+		dev_err(&amp;zdev-&gt;dev, "cannot register platform device\n");</div><div class='add'>+		ret = -ENXIO;</div><div class='add'>+		goto exit_mem2;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	zorro_set_drvdata(zdev, pdev);</div><div class='add'>+</div><div class='add'>+	if (!ret)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+ exit_mem2:</div><div class='add'>+	iounmap(ax88796_data.data_area);</div><div class='add'>+</div><div class='add'>+ exit_mem:</div><div class='add'>+	iounmap(ax88796_data.base_regs);</div><div class='add'>+</div><div class='add'>+ exit_req2:</div><div class='add'>+	release_mem_region(zdev-&gt;resource.start + XS100_8390_DATA32_BASE,</div><div class='add'>+			   XS100_8390_DATA32_SIZE);</div><div class='add'>+</div><div class='add'>+ exit_req:</div><div class='add'>+	release_mem_region(zdev-&gt;resource.start, 0x100);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xsurf100_remove(struct zorro_dev *zdev)</div><div class='add'>+{</div><div class='add'>+	struct platform_device *pdev = zorro_get_drvdata(zdev);</div><div class='add'>+	struct xsurf100_ax_plat_data *xs100 = dev_get_platdata(&amp;pdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	platform_device_unregister(pdev);</div><div class='add'>+</div><div class='add'>+	iounmap(xs100-&gt;base_regs);</div><div class='add'>+	release_mem_region(zdev-&gt;resource.start, 0x100);</div><div class='add'>+	iounmap(xs100-&gt;data_area);</div><div class='add'>+	release_mem_region(zdev-&gt;resource.start + XS100_8390_DATA32_BASE,</div><div class='add'>+			   XS100_8390_DATA32_SIZE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct zorro_device_id xsurf100_zorro_tbl[] = {</div><div class='add'>+	{ ZORRO_PROD_INDIVIDUAL_COMPUTERS_X_SURF100, },</div><div class='add'>+	{ 0 }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+MODULE_DEVICE_TABLE(zorro, xsurf100_zorro_tbl);</div><div class='add'>+</div><div class='add'>+static struct zorro_driver xsurf100_driver = {</div><div class='add'>+	.name           = "xsurf100",</div><div class='add'>+	.id_table       = xsurf100_zorro_tbl,</div><div class='add'>+	.probe          = xsurf100_probe,</div><div class='add'>+	.remove         = xsurf100_remove,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_driver(xsurf100_driver, zorro_register_driver, zorro_unregister_driver);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("X-Surf 100 driver");</div><div class='add'>+MODULE_AUTHOR("Michael Karcher &lt;kernel@mkarcher.dialup.fu-berlin.de&gt;");</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='head'>diff --git a/drivers/net/ethernet/8390/zorro8390.c b/drivers/net/ethernet/8390/zorro8390.c<br/>index 8308728fad05..c24dd4fe7a10 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/zorro8390.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/8390/zorro8390.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/8390/zorro8390.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/8390/zorro8390.c</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='ctx'>  *  Amiga Linux/m68k and Linux/PPC Zorro NS8390 Ethernet Driver</div><div class='ctx'>  *</div><div class='hunk'>@@ -9,12 +10,6 @@</div><div class='ctx'>  *</div><div class='ctx'>  *  ---------------------------------------------------------------------------</div><div class='ctx'>  *</div><div class='del'>- *  This file is subject to the terms and conditions of the GNU General Public</div><div class='del'>- *  License.  See the file COPYING in the main directory of the Linux</div><div class='del'>- *  distribution for more details.</div><div class='del'>- *</div><div class='del'>- *  ---------------------------------------------------------------------------</div><div class='del'>- *</div><div class='ctx'>  *  The Ariadne II and X-Surf are Zorro-II boards containing Realtek RTL8019AS</div><div class='ctx'>  *  Ethernet Controllers.</div><div class='ctx'>  */</div><div class='hunk'>@@ -44,8 +39,6 @@</div><div class='ctx'> static const char version[] =</div><div class='ctx'> 	"8390.c:v1.10cvs 9/23/94 Donald Becker (becker@cesdis.gsfc.nasa.gov)\n";</div><div class='ctx'> </div><div class='del'>-static u32 zorro8390_msg_enable;</div><div class='del'>-</div><div class='ctx'> #include "lib8390.c"</div><div class='ctx'> </div><div class='ctx'> #define DRV_NAME	"zorro8390"</div><div class='hunk'>@@ -284,7 +277,6 @@ static const struct net_device_ops zorro8390_netdev_ops = {</div><div class='ctx'> 	.ndo_set_rx_mode	= __ei_set_multicast_list,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> 	.ndo_set_mac_address	= eth_mac_addr,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='ctx'> #ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='ctx'> 	.ndo_poll_controller	= __ei_poll,</div><div class='ctx'> #endif</div><div class='hunk'>@@ -297,7 +289,6 @@ static int zorro8390_init(struct net_device *dev, unsigned long board,</div><div class='ctx'> 	int err;</div><div class='ctx'> 	unsigned char SA_prom[32];</div><div class='ctx'> 	int start_page, stop_page;</div><div class='del'>-	struct ei_device *ei_local = netdev_priv(dev);</div><div class='ctx'> 	static u32 zorro8390_offsets[16] = {</div><div class='ctx'> 		0x00, 0x02, 0x04, 0x06, 0x08, 0x0a, 0x0c, 0x0e,</div><div class='ctx'> 		0x10, 0x12, 0x14, 0x16, 0x18, 0x1a, 0x1c, 0x1e,</div><div class='hunk'>@@ -368,8 +359,7 @@ static int zorro8390_init(struct net_device *dev, unsigned long board,</div><div class='ctx'> 	if (i)</div><div class='ctx'> 		return i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; ETH_ALEN; i++)</div><div class='del'>-		dev-&gt;dev_addr[i] = SA_prom[i];</div><div class='add'>+	eth_hw_addr_set(dev, SA_prom);</div><div class='ctx'> </div><div class='ctx'> 	pr_debug("Found ethernet address: %pM\n", dev-&gt;dev_addr);</div><div class='ctx'> </div><div class='hunk'>@@ -389,8 +379,6 @@ static int zorro8390_init(struct net_device *dev, unsigned long board,</div><div class='ctx'> 	dev-&gt;netdev_ops = &amp;zorro8390_netdev_ops;</div><div class='ctx'> 	__NS8390_init(dev, 0);</div><div class='ctx'> </div><div class='del'>-	ei_local-&gt;msg_enable = zorro8390_msg_enable;</div><div class='del'>-</div><div class='ctx'> 	err = register_netdev(dev);</div><div class='ctx'> 	if (err) {</div><div class='ctx'> 		free_irq(IRQ_AMIGA_PORTS, dev);</div><div class='hunk'>@@ -455,4 +443,5 @@ static void __exit zorro8390_cleanup_module(void)</div><div class='ctx'> module_init(zorro8390_init_module);</div><div class='ctx'> module_exit(zorro8390_cleanup_module);</div><div class='ctx'> </div><div class='add'>+MODULE_DESCRIPTION("Zorro NS8390-based ethernet driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig<br/>index f3bb1784066b..4a1b368ca7e6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/Kconfig?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/Kconfig</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> #</div><div class='ctx'> # Ethernet LAN device configuration</div><div class='ctx'> #</div><div class='hunk'>@@ -6,7 +7,7 @@ menuconfig ETHERNET</div><div class='ctx'> 	bool "Ethernet driver support"</div><div class='ctx'> 	depends on NET</div><div class='ctx'> 	default y</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  This section contains all the Ethernet device drivers.</div><div class='ctx'> </div><div class='ctx'> if ETHERNET</div><div class='hunk'>@@ -14,36 +15,30 @@ if ETHERNET</div><div class='ctx'> config MDIO</div><div class='ctx'> 	tristate</div><div class='ctx'> </div><div class='del'>-config SUNGEM_PHY</div><div class='del'>-	tristate</div><div class='del'>-</div><div class='ctx'> source "drivers/net/ethernet/3com/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/actions/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/adaptec/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/aeroflex/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/agere/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/airoha/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/alacritech/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/allwinner/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/alteon/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/altera/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/amazon/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/amd/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/apm/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/apple/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/aquantia/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/arc/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/asix/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/atheros/Kconfig"</div><div class='del'>-source "drivers/net/ethernet/cadence/Kconfig"</div><div class='del'>-source "drivers/net/ethernet/adi/Kconfig"</div><div class='del'>-source "drivers/net/ethernet/broadcom/Kconfig"</div><div class='del'>-source "drivers/net/ethernet/brocade/Kconfig"</div><div class='del'>-source "drivers/net/ethernet/calxeda/Kconfig"</div><div class='del'>-source "drivers/net/ethernet/cavium/Kconfig"</div><div class='del'>-source "drivers/net/ethernet/chelsio/Kconfig"</div><div class='del'>-source "drivers/net/ethernet/cirrus/Kconfig"</div><div class='del'>-source "drivers/net/ethernet/cisco/Kconfig"</div><div class='ctx'> </div><div class='ctx'> config CX_ECAT</div><div class='ctx'> 	tristate "Beckhoff CX5020 EtherCAT master support"</div><div class='ctx'> 	depends on PCI</div><div class='ctx'> 	depends on X86 || COMPILE_TEST</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  Driver for EtherCAT master module located on CCAT FPGA</div><div class='ctx'> 	  that can be found on Beckhoff CX5020, and possibly other of CX</div><div class='ctx'> 	  Beckhoff CX series industrial PCs.</div><div class='hunk'>@@ -51,13 +46,21 @@ config CX_ECAT</div><div class='ctx'> 	  To compile this driver as a module, choose M here. The module</div><div class='ctx'> 	  will be called ec_bhf.</div><div class='ctx'> </div><div class='add'>+source "drivers/net/ethernet/broadcom/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/cadence/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/calxeda/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/cavium/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/chelsio/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/cirrus/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/cisco/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/cortina/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/davicom/Kconfig"</div><div class='ctx'> </div><div class='ctx'> config DNET</div><div class='ctx'> 	tristate "Dave ethernet support (DNET)"</div><div class='ctx'> 	depends on HAS_IOMEM</div><div class='ctx'> 	select PHYLIB</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  The Dave ethernet interface (DNET) is found on Qong Board FPGA.</div><div class='ctx'> 	  Say Y to include support for the DNET chip.</div><div class='ctx'> </div><div class='hunk'>@@ -67,25 +70,26 @@ config DNET</div><div class='ctx'> source "drivers/net/ethernet/dec/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/dlink/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/emulex/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/engleder/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/ezchip/Kconfig"</div><div class='del'>-source "drivers/net/ethernet/neterion/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/faraday/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/freescale/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/fujitsu/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/fungible/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/google/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/hisilicon/Kconfig"</div><div class='del'>-source "drivers/net/ethernet/hp/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/huawei/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/i825xx/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/ibm/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/intel/Kconfig"</div><div class='del'>-source "drivers/net/ethernet/i825xx/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/xscale/Kconfig"</div><div class='del'>-source "drivers/net/ethernet/icplus/Kconfig"</div><div class='ctx'> </div><div class='ctx'> config JME</div><div class='ctx'> 	tristate "JMicron(R) PCI-Express Gigabit Ethernet support"</div><div class='ctx'> 	depends on PCI</div><div class='ctx'> 	select CRC32</div><div class='ctx'> 	select MII</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  This driver supports the PCI-Express gigabit ethernet adapters</div><div class='ctx'> 	  based on JMicron JMC250 chipset.</div><div class='ctx'> </div><div class='hunk'>@@ -94,22 +98,38 @@ config JME</div><div class='ctx'> </div><div class='ctx'> config KORINA</div><div class='ctx'> 	tristate "Korina (IDT RC32434) Ethernet support"</div><div class='del'>-	depends on MIKROTIK_RB532</div><div class='del'>-	---help---</div><div class='add'>+	depends on MIKROTIK_RB532 || COMPILE_TEST</div><div class='add'>+	select CRC32</div><div class='add'>+	select MII</div><div class='add'>+	help</div><div class='ctx'> 	  If you have a Mikrotik RouterBoard 500 or IDT RC32434</div><div class='ctx'> 	  based system say Y. Otherwise say N.</div><div class='ctx'> </div><div class='ctx'> config LANTIQ_ETOP</div><div class='ctx'> 	tristate "Lantiq SoC ETOP driver"</div><div class='ctx'> 	depends on SOC_TYPE_XWAY</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  Support for the MII0 inside the Lantiq SoC</div><div class='ctx'> </div><div class='add'>+config LANTIQ_XRX200</div><div class='add'>+	tristate "Lantiq / Intel xRX200 PMAC network driver"</div><div class='add'>+	depends on SOC_TYPE_XWAY</div><div class='add'>+	help</div><div class='add'>+	  Support for the PMAC of the Gigabit switch (GSWIP) inside the</div><div class='add'>+	  Lantiq / Intel VRX200 VDSL SoC</div><div class='add'>+</div><div class='add'>+source "drivers/net/ethernet/adi/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/litex/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/marvell/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/mediatek/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/mellanox/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/meta/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/micrel/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/microchip/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/mscc/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/microsoft/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/moxa/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/mucse/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/myricom/Kconfig"</div><div class='ctx'> </div><div class='ctx'> config FEALNX</div><div class='hunk'>@@ -117,27 +137,17 @@ config FEALNX</div><div class='ctx'> 	depends on PCI</div><div class='ctx'> 	select CRC32</div><div class='ctx'> 	select MII</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  Say Y here to support the Myson MTD-800 family of PCI-based Ethernet</div><div class='ctx'> 	  cards. &lt;http://www.myson.com.tw/&gt;</div><div class='ctx'> </div><div class='add'>+source "drivers/net/ethernet/ni/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/natsemi/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/neterion/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/netronome/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/8390/Kconfig"</div><div class='del'>-</div><div class='del'>-config NET_NETX</div><div class='del'>-	tristate "NetX Ethernet support"</div><div class='del'>-	select MII</div><div class='del'>-	depends on ARCH_NETX</div><div class='del'>-	---help---</div><div class='del'>-	  This is support for the Hilscher netX builtin Ethernet ports</div><div class='del'>-</div><div class='del'>-	  To compile this driver as a module, choose M here. The module</div><div class='del'>-	  will be called netx-eth.</div><div class='del'>-</div><div class='del'>-source "drivers/net/ethernet/nuvoton/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/nvidia/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/nxp/Kconfig"</div><div class='del'>-source "drivers/net/ethernet/octeon/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/oki-semi/Kconfig"</div><div class='ctx'> </div><div class='ctx'> config ETHOC</div><div class='hunk'>@@ -147,32 +157,50 @@ config ETHOC</div><div class='ctx'> 	select PHYLIB</div><div class='ctx'> 	select CRC32</div><div class='ctx'> 	select BITREVERSE</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  Say Y here if you want to use the OpenCores 10/100 Mbps Ethernet MAC.</div><div class='ctx'> </div><div class='add'>+config OA_TC6</div><div class='add'>+	tristate "OPEN Alliance TC6 10BASE-T1x MAC-PHY support" if COMPILE_TEST</div><div class='add'>+	depends on SPI</div><div class='add'>+	select PHYLIB</div><div class='add'>+	help</div><div class='add'>+	  This library implements OPEN Alliance TC6 10BASE-T1x MAC-PHY</div><div class='add'>+	  Serial Interface protocol for supporting 10BASE-T1x MAC-PHYs.</div><div class='add'>+</div><div class='add'>+	  To know the implementation details, refer documentation in</div><div class='add'>+	  &lt;file:Documentation/networking/oa-tc6-framework.rst&gt;.</div><div class='add'>+</div><div class='ctx'> source "drivers/net/ethernet/packetengines/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/pasemi/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/pensando/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/qlogic/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/brocade/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/qualcomm/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/rdc/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/realtek/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/renesas/Kconfig"</div><div class='del'>-source "drivers/net/ethernet/rdc/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/rocker/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/samsung/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/seeq/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/sgi/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/silan/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/sis/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/sfc/Kconfig"</div><div class='del'>-source "drivers/net/ethernet/sgi/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/smsc/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/socionext/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/spacemit/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/stmicro/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/sun/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/sunplus/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/synopsys/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/tehuti/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/ti/Kconfig"</div><div class='del'>-source "drivers/net/ethernet/tile/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/toshiba/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/tundra/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/vertexcom/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/via/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/wangxun/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/wiznet/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/xilinx/Kconfig"</div><div class='ctx'> source "drivers/net/ethernet/xircom/Kconfig"</div><div class='head'>diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile<br/>index c51014b0464f..2e18df8ca8ec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/Makefile?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/Makefile</a></div><div class='hunk'>@@ -1,22 +1,29 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> #</div><div class='ctx'> # Makefile for the Linux network Ethernet device drivers.</div><div class='ctx'> #</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_3COM) += 3com/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_8390) += 8390/</div><div class='add'>+obj-$(CONFIG_NET_VENDOR_ACTIONS) += actions/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_ADAPTEC) += adaptec/</div><div class='ctx'> obj-$(CONFIG_GRETH) += aeroflex/</div><div class='add'>+obj-$(CONFIG_NET_VENDOR_ADI) += adi/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_AGERE) += agere/</div><div class='add'>+obj-$(CONFIG_NET_VENDOR_AIROHA) += airoha/</div><div class='add'>+obj-$(CONFIG_NET_VENDOR_ALACRITECH) += alacritech/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_ALLWINNER) += allwinner/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_ALTEON) += alteon/</div><div class='ctx'> obj-$(CONFIG_ALTERA_TSE) += altera/</div><div class='add'>+obj-$(CONFIG_NET_VENDOR_AMAZON) += amazon/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_AMD) += amd/</div><div class='ctx'> obj-$(CONFIG_NET_XGENE) += apm/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_APPLE) += apple/</div><div class='add'>+obj-$(CONFIG_NET_VENDOR_AQUANTIA) += aquantia/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_ARC) += arc/</div><div class='add'>+obj-$(CONFIG_NET_VENDOR_ASIX) += asix/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_ATHEROS) += atheros/</div><div class='del'>-obj-$(CONFIG_NET_CADENCE) += cadence/</div><div class='del'>-obj-$(CONFIG_NET_BFIN) += adi/</div><div class='add'>+obj-$(CONFIG_NET_VENDOR_CADENCE) += cadence/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_BROADCOM) += broadcom/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_BROCADE) += brocade/</div><div class='ctx'> obj-$(CONFIG_NET_CALXEDA_XGMAC) += calxeda/</div><div class='hunk'>@@ -24,65 +31,81 @@ obj-$(CONFIG_NET_VENDOR_CAVIUM) += cavium/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_CHELSIO) += chelsio/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_CIRRUS) += cirrus/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_CISCO) += cisco/</div><div class='add'>+obj-$(CONFIG_NET_VENDOR_CORTINA) += cortina/</div><div class='ctx'> obj-$(CONFIG_CX_ECAT) += ec_bhf.o</div><div class='ctx'> obj-$(CONFIG_DM9000) += davicom/</div><div class='ctx'> obj-$(CONFIG_DNET) += dnet.o</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_DEC) += dec/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_DLINK) += dlink/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_EMULEX) += emulex/</div><div class='add'>+obj-$(CONFIG_NET_VENDOR_ENGLEDER) += engleder/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_EZCHIP) += ezchip/</div><div class='del'>-obj-$(CONFIG_NET_VENDOR_EXAR) += neterion/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_FARADAY) += faraday/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_FREESCALE) += freescale/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_FUJITSU) += fujitsu/</div><div class='add'>+obj-$(CONFIG_NET_VENDOR_FUNGIBLE) += fungible/</div><div class='add'>+obj-$(CONFIG_NET_VENDOR_GOOGLE) += google/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_HISILICON) += hisilicon/</div><div class='del'>-obj-$(CONFIG_NET_VENDOR_HP) += hp/</div><div class='add'>+obj-$(CONFIG_NET_VENDOR_HUAWEI) += huawei/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_IBM) += ibm/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_INTEL) += intel/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_I825XX) += i825xx/</div><div class='add'>+obj-$(CONFIG_NET_VENDOR_MICROSOFT) += microsoft/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_XSCALE) += xscale/</div><div class='del'>-obj-$(CONFIG_IP1000) += icplus/</div><div class='ctx'> obj-$(CONFIG_JME) += jme.o</div><div class='ctx'> obj-$(CONFIG_KORINA) += korina.o</div><div class='ctx'> obj-$(CONFIG_LANTIQ_ETOP) += lantiq_etop.o</div><div class='add'>+obj-$(CONFIG_LANTIQ_XRX200) += lantiq_xrx200.o</div><div class='add'>+obj-$(CONFIG_NET_VENDOR_LITEX) += litex/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_MARVELL) += marvell/</div><div class='add'>+obj-$(CONFIG_NET_VENDOR_MEDIATEK) += mediatek/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_MELLANOX) += mellanox/</div><div class='add'>+obj-$(CONFIG_NET_VENDOR_META) += meta/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_MICREL) += micrel/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_MICROCHIP) += microchip/</div><div class='add'>+obj-$(CONFIG_NET_VENDOR_MICROSEMI) += mscc/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_MOXART) += moxa/</div><div class='add'>+obj-$(CONFIG_NET_VENDOR_MUCSE) += mucse/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_MYRI) += myricom/</div><div class='ctx'> obj-$(CONFIG_FEALNX) += fealnx.o</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_NATSEMI) += natsemi/</div><div class='del'>-obj-$(CONFIG_NET_NETX) += netx-eth.o</div><div class='del'>-obj-$(CONFIG_NET_VENDOR_NUVOTON) += nuvoton/</div><div class='add'>+obj-$(CONFIG_NET_VENDOR_NETERION) += neterion/</div><div class='add'>+obj-$(CONFIG_NET_VENDOR_NETRONOME) += netronome/</div><div class='add'>+obj-$(CONFIG_NET_VENDOR_NI) += ni/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_NVIDIA) += nvidia/</div><div class='ctx'> obj-$(CONFIG_LPC_ENET) += nxp/</div><div class='del'>-obj-$(CONFIG_OCTEON_MGMT_ETHERNET) += octeon/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_OKI) += oki-semi/</div><div class='ctx'> obj-$(CONFIG_ETHOC) += ethoc.o</div><div class='del'>-obj-$(CONFIG_NET_PACKET_ENGINE) += packetengines/</div><div class='add'>+obj-$(CONFIG_NET_VENDOR_PACKET_ENGINES) += packetengines/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_PASEMI) += pasemi/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_QLOGIC) += qlogic/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_QUALCOMM) += qualcomm/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_REALTEK) += realtek/</div><div class='del'>-obj-$(CONFIG_SH_ETH) += renesas/</div><div class='add'>+obj-$(CONFIG_NET_VENDOR_RENESAS) += renesas/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_RDC) += rdc/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_ROCKER) += rocker/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_SAMSUNG) += samsung/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_SEEQ) += seeq/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_SILAN) += silan/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_SIS) += sis/</div><div class='del'>-obj-$(CONFIG_SFC) += sfc/</div><div class='add'>+obj-$(CONFIG_NET_VENDOR_SOLARFLARE) += sfc/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_SGI) += sgi/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_SMSC) += smsc/</div><div class='add'>+obj-$(CONFIG_NET_VENDOR_SOCIONEXT) += socionext/</div><div class='add'>+obj-$(CONFIG_NET_VENDOR_SPACEMIT) += spacemit/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_STMICRO) += stmicro/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_SUN) += sun/</div><div class='add'>+obj-$(CONFIG_NET_VENDOR_SUNPLUS) += sunplus/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_TEHUTI) += tehuti/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_TI) += ti/</div><div class='del'>-obj-$(CONFIG_TILE_NET) += tile/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_TOSHIBA) += toshiba/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_TUNDRA) += tundra/</div><div class='add'>+obj-$(CONFIG_NET_VENDOR_VERTEXCOM) += vertexcom/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_VIA) += via/</div><div class='add'>+obj-$(CONFIG_NET_VENDOR_WANGXUN) += wangxun/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_WIZNET) += wiznet/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_XILINX) += xilinx/</div><div class='ctx'> obj-$(CONFIG_NET_VENDOR_XIRCOM) += xircom/</div><div class='add'>+obj-$(CONFIG_NET_VENDOR_SYNOPSYS) += synopsys/</div><div class='add'>+obj-$(CONFIG_NET_VENDOR_PENSANDO) += pensando/</div><div class='add'>+obj-$(CONFIG_OA_TC6) += oa_tc6.o</div><div class='head'>diff --git a/drivers/net/ethernet/actions/Kconfig b/drivers/net/ethernet/actions/Kconfig<br/>new file mode 100644<br/>index 000000000000..f630cac2ab6c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/actions/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/actions/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,26 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+config NET_VENDOR_ACTIONS</div><div class='add'>+	bool "Actions Semi devices"</div><div class='add'>+	depends on ARCH_ACTIONS || COMPILE_TEST</div><div class='add'>+	default ARCH_ACTIONS</div><div class='add'>+	help</div><div class='add'>+	  If you have a network (Ethernet) card belonging to this class, say Y.</div><div class='add'>+</div><div class='add'>+	  Note that the answer to this question doesn't directly affect the</div><div class='add'>+	  kernel: saying N will just cause the configurator to skip all the</div><div class='add'>+	  questions about Actions Semi devices.  If you say Y, you will be</div><div class='add'>+	  asked for your specific card in the following questions.</div><div class='add'>+</div><div class='add'>+if NET_VENDOR_ACTIONS</div><div class='add'>+</div><div class='add'>+config OWL_EMAC</div><div class='add'>+	tristate "Actions Semi Owl Ethernet MAC support"</div><div class='add'>+	select PHYLIB</div><div class='add'>+	help</div><div class='add'>+	  This driver supports the Actions Semi Ethernet Media Access</div><div class='add'>+	  Controller (EMAC) found on the S500 and S900 SoCs.  The controller</div><div class='add'>+	  is compliant with the IEEE 802.3 CSMA/CD standard and supports</div><div class='add'>+	  both half-duplex and full-duplex operation modes at 10/100 Mb/s.</div><div class='add'>+</div><div class='add'>+endif # NET_VENDOR_ACTIONS</div><div class='head'>diff --git a/drivers/net/ethernet/actions/Makefile b/drivers/net/ethernet/actions/Makefile<br/>new file mode 100644<br/>index 000000000000..fde8001d538a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/actions/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/actions/Makefile</a></div><div class='hunk'>@@ -0,0 +1,6 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+#</div><div class='add'>+# Makefile for the Actions Semi Owl SoCs built-in ethernet macs</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_OWL_EMAC) += owl-emac.o</div><div class='head'>diff --git a/drivers/net/ethernet/actions/owl-emac.c b/drivers/net/ethernet/actions/owl-emac.c<br/>new file mode 100644<br/>index 000000000000..0a08da799255<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/actions/owl-emac.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/actions/owl-emac.c</a></div><div class='hunk'>@@ -0,0 +1,1612 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Actions Semi Owl SoCs Ethernet MAC driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2012 Actions Semi Inc.</div><div class='add'>+ * Copyright (c) 2021 Cristian Ciocaltea &lt;cristian.ciocaltea@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/circ_buf.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/of_mdio.h&gt;</div><div class='add'>+#include &lt;linux/of_net.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/pm.h&gt;</div><div class='add'>+#include &lt;linux/reset.h&gt;</div><div class='add'>+</div><div class='add'>+#include "owl-emac.h"</div><div class='add'>+</div><div class='add'>+#define OWL_EMAC_DEFAULT_MSG_ENABLE	(NETIF_MSG_DRV | \</div><div class='add'>+					 NETIF_MSG_PROBE | \</div><div class='add'>+					 NETIF_MSG_LINK)</div><div class='add'>+</div><div class='add'>+static u32 owl_emac_reg_read(struct owl_emac_priv *priv, u32 reg)</div><div class='add'>+{</div><div class='add'>+	return readl(priv-&gt;base + reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void owl_emac_reg_write(struct owl_emac_priv *priv, u32 reg, u32 data)</div><div class='add'>+{</div><div class='add'>+	writel(data, priv-&gt;base + reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 owl_emac_reg_update(struct owl_emac_priv *priv,</div><div class='add'>+			       u32 reg, u32 mask, u32 val)</div><div class='add'>+{</div><div class='add'>+	u32 data, old_val;</div><div class='add'>+</div><div class='add'>+	data = owl_emac_reg_read(priv, reg);</div><div class='add'>+	old_val = data &amp; mask;</div><div class='add'>+</div><div class='add'>+	data &amp;= ~mask;</div><div class='add'>+	data |= val &amp; mask;</div><div class='add'>+</div><div class='add'>+	owl_emac_reg_write(priv, reg, data);</div><div class='add'>+</div><div class='add'>+	return old_val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void owl_emac_reg_set(struct owl_emac_priv *priv, u32 reg, u32 bits)</div><div class='add'>+{</div><div class='add'>+	owl_emac_reg_update(priv, reg, bits, bits);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void owl_emac_reg_clear(struct owl_emac_priv *priv, u32 reg, u32 bits)</div><div class='add'>+{</div><div class='add'>+	owl_emac_reg_update(priv, reg, bits, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct device *owl_emac_get_dev(struct owl_emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return priv-&gt;netdev-&gt;dev.parent;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void owl_emac_irq_enable(struct owl_emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	/* Enable all interrupts except TU.</div><div class='add'>+	 *</div><div class='add'>+	 * Note the NIE and AIE bits shall also be set in order to actually</div><div class='add'>+	 * enable the selected interrupts.</div><div class='add'>+	 */</div><div class='add'>+	owl_emac_reg_write(priv, OWL_EMAC_REG_MAC_CSR7,</div><div class='add'>+			   OWL_EMAC_BIT_MAC_CSR7_NIE |</div><div class='add'>+			   OWL_EMAC_BIT_MAC_CSR7_AIE |</div><div class='add'>+			   OWL_EMAC_BIT_MAC_CSR7_ALL_NOT_TUE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void owl_emac_irq_disable(struct owl_emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	/* Disable all interrupts.</div><div class='add'>+	 *</div><div class='add'>+	 * WARNING: Unset only the NIE and AIE bits in CSR7 to workaround an</div><div class='add'>+	 * unexpected side effect (MAC hardware bug?!) where some bits in the</div><div class='add'>+	 * status register (CSR5) are cleared automatically before being able</div><div class='add'>+	 * to read them via owl_emac_irq_clear().</div><div class='add'>+	 */</div><div class='add'>+	owl_emac_reg_write(priv, OWL_EMAC_REG_MAC_CSR7,</div><div class='add'>+			   OWL_EMAC_BIT_MAC_CSR7_ALL_NOT_TUE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 owl_emac_irq_status(struct owl_emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return owl_emac_reg_read(priv, OWL_EMAC_REG_MAC_CSR5);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 owl_emac_irq_clear(struct owl_emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 val = owl_emac_irq_status(priv);</div><div class='add'>+</div><div class='add'>+	owl_emac_reg_write(priv, OWL_EMAC_REG_MAC_CSR5, val);</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static dma_addr_t owl_emac_dma_map_rx(struct owl_emac_priv *priv,</div><div class='add'>+				      struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = owl_emac_get_dev(priv);</div><div class='add'>+</div><div class='add'>+	/* Buffer pointer for the RX DMA descriptor must be word aligned. */</div><div class='add'>+	return dma_map_single(dev, skb_tail_pointer(skb),</div><div class='add'>+			      skb_tailroom(skb), DMA_FROM_DEVICE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void owl_emac_dma_unmap_rx(struct owl_emac_priv *priv,</div><div class='add'>+				  struct sk_buff *skb, dma_addr_t dma_addr)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = owl_emac_get_dev(priv);</div><div class='add'>+</div><div class='add'>+	dma_unmap_single(dev, dma_addr, skb_tailroom(skb), DMA_FROM_DEVICE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static dma_addr_t owl_emac_dma_map_tx(struct owl_emac_priv *priv,</div><div class='add'>+				      struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = owl_emac_get_dev(priv);</div><div class='add'>+</div><div class='add'>+	return dma_map_single(dev, skb-&gt;data, skb_headlen(skb), DMA_TO_DEVICE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void owl_emac_dma_unmap_tx(struct owl_emac_priv *priv,</div><div class='add'>+				  struct sk_buff *skb, dma_addr_t dma_addr)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = owl_emac_get_dev(priv);</div><div class='add'>+</div><div class='add'>+	dma_unmap_single(dev, dma_addr, skb_headlen(skb), DMA_TO_DEVICE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int owl_emac_ring_num_unused(struct owl_emac_ring *ring)</div><div class='add'>+{</div><div class='add'>+	return CIRC_SPACE(ring-&gt;head, ring-&gt;tail, ring-&gt;size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int owl_emac_ring_get_next(struct owl_emac_ring *ring,</div><div class='add'>+					   unsigned int cur)</div><div class='add'>+{</div><div class='add'>+	return (cur + 1) &amp; (ring-&gt;size - 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void owl_emac_ring_push_head(struct owl_emac_ring *ring)</div><div class='add'>+{</div><div class='add'>+	ring-&gt;head = owl_emac_ring_get_next(ring, ring-&gt;head);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void owl_emac_ring_pop_tail(struct owl_emac_ring *ring)</div><div class='add'>+{</div><div class='add'>+	ring-&gt;tail = owl_emac_ring_get_next(ring, ring-&gt;tail);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct sk_buff *owl_emac_alloc_skb(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	int offset;</div><div class='add'>+</div><div class='add'>+	skb = netdev_alloc_skb(netdev, OWL_EMAC_RX_FRAME_MAX_LEN +</div><div class='add'>+			       OWL_EMAC_SKB_RESERVE);</div><div class='add'>+	if (unlikely(!skb))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	/* Ensure 4 bytes DMA alignment. */</div><div class='add'>+	offset = ((uintptr_t)skb-&gt;data) &amp; (OWL_EMAC_SKB_ALIGN - 1);</div><div class='add'>+	if (unlikely(offset))</div><div class='add'>+		skb_reserve(skb, OWL_EMAC_SKB_ALIGN - offset);</div><div class='add'>+</div><div class='add'>+	return skb;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int owl_emac_ring_prepare_rx(struct owl_emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct owl_emac_ring *ring = &amp;priv-&gt;rx_ring;</div><div class='add'>+	struct device *dev = owl_emac_get_dev(priv);</div><div class='add'>+	struct net_device *netdev = priv-&gt;netdev;</div><div class='add'>+	struct owl_emac_ring_desc *desc;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	dma_addr_t dma_addr;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ring-&gt;size; i++) {</div><div class='add'>+		skb = owl_emac_alloc_skb(netdev);</div><div class='add'>+		if (!skb)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		dma_addr = owl_emac_dma_map_rx(priv, skb);</div><div class='add'>+		if (dma_mapping_error(dev, dma_addr)) {</div><div class='add'>+			dev_kfree_skb(skb);</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		desc = &amp;ring-&gt;descs[i];</div><div class='add'>+		desc-&gt;status = OWL_EMAC_BIT_RDES0_OWN;</div><div class='add'>+		desc-&gt;control = skb_tailroom(skb) &amp; OWL_EMAC_MSK_RDES1_RBS1;</div><div class='add'>+		desc-&gt;buf_addr = dma_addr;</div><div class='add'>+		desc-&gt;reserved = 0;</div><div class='add'>+</div><div class='add'>+		ring-&gt;skbs[i] = skb;</div><div class='add'>+		ring-&gt;skbs_dma[i] = dma_addr;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	desc-&gt;control |= OWL_EMAC_BIT_RDES1_RER;</div><div class='add'>+</div><div class='add'>+	ring-&gt;head = 0;</div><div class='add'>+	ring-&gt;tail = 0;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void owl_emac_ring_prepare_tx(struct owl_emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct owl_emac_ring *ring = &amp;priv-&gt;tx_ring;</div><div class='add'>+	struct owl_emac_ring_desc *desc;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ring-&gt;size; i++) {</div><div class='add'>+		desc = &amp;ring-&gt;descs[i];</div><div class='add'>+</div><div class='add'>+		desc-&gt;status = 0;</div><div class='add'>+		desc-&gt;control = OWL_EMAC_BIT_TDES1_IC;</div><div class='add'>+		desc-&gt;buf_addr = 0;</div><div class='add'>+		desc-&gt;reserved = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	desc-&gt;control |= OWL_EMAC_BIT_TDES1_TER;</div><div class='add'>+</div><div class='add'>+	memset(ring-&gt;skbs_dma, 0, sizeof(dma_addr_t) * ring-&gt;size);</div><div class='add'>+</div><div class='add'>+	ring-&gt;head = 0;</div><div class='add'>+	ring-&gt;tail = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void owl_emac_ring_unprepare_rx(struct owl_emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct owl_emac_ring *ring = &amp;priv-&gt;rx_ring;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ring-&gt;size; i++) {</div><div class='add'>+		ring-&gt;descs[i].status = 0;</div><div class='add'>+</div><div class='add'>+		if (!ring-&gt;skbs_dma[i])</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		owl_emac_dma_unmap_rx(priv, ring-&gt;skbs[i], ring-&gt;skbs_dma[i]);</div><div class='add'>+		ring-&gt;skbs_dma[i] = 0;</div><div class='add'>+</div><div class='add'>+		dev_kfree_skb(ring-&gt;skbs[i]);</div><div class='add'>+		ring-&gt;skbs[i] = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void owl_emac_ring_unprepare_tx(struct owl_emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct owl_emac_ring *ring = &amp;priv-&gt;tx_ring;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ring-&gt;size; i++) {</div><div class='add'>+		ring-&gt;descs[i].status = 0;</div><div class='add'>+</div><div class='add'>+		if (!ring-&gt;skbs_dma[i])</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		owl_emac_dma_unmap_tx(priv, ring-&gt;skbs[i], ring-&gt;skbs_dma[i]);</div><div class='add'>+		ring-&gt;skbs_dma[i] = 0;</div><div class='add'>+</div><div class='add'>+		dev_kfree_skb(ring-&gt;skbs[i]);</div><div class='add'>+		ring-&gt;skbs[i] = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int owl_emac_ring_alloc(struct device *dev, struct owl_emac_ring *ring,</div><div class='add'>+			       unsigned int size)</div><div class='add'>+{</div><div class='add'>+	ring-&gt;descs = dmam_alloc_coherent(dev,</div><div class='add'>+					  sizeof(struct owl_emac_ring_desc) * size,</div><div class='add'>+					  &amp;ring-&gt;descs_dma, GFP_KERNEL);</div><div class='add'>+	if (!ring-&gt;descs)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ring-&gt;skbs = devm_kcalloc(dev, size, sizeof(struct sk_buff *),</div><div class='add'>+				  GFP_KERNEL);</div><div class='add'>+	if (!ring-&gt;skbs)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ring-&gt;skbs_dma = devm_kcalloc(dev, size, sizeof(dma_addr_t),</div><div class='add'>+				      GFP_KERNEL);</div><div class='add'>+	if (!ring-&gt;skbs_dma)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ring-&gt;size = size;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void owl_emac_dma_cmd_resume_rx(struct owl_emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	owl_emac_reg_write(priv, OWL_EMAC_REG_MAC_CSR2,</div><div class='add'>+			   OWL_EMAC_VAL_MAC_CSR2_RPD);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void owl_emac_dma_cmd_resume_tx(struct owl_emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	owl_emac_reg_write(priv, OWL_EMAC_REG_MAC_CSR1,</div><div class='add'>+			   OWL_EMAC_VAL_MAC_CSR1_TPD);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 owl_emac_dma_cmd_set_tx(struct owl_emac_priv *priv, u32 status)</div><div class='add'>+{</div><div class='add'>+	return owl_emac_reg_update(priv, OWL_EMAC_REG_MAC_CSR6,</div><div class='add'>+				   OWL_EMAC_BIT_MAC_CSR6_ST, status);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 owl_emac_dma_cmd_start_tx(struct owl_emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return owl_emac_dma_cmd_set_tx(priv, ~0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 owl_emac_dma_cmd_set(struct owl_emac_priv *priv, u32 status)</div><div class='add'>+{</div><div class='add'>+	return owl_emac_reg_update(priv, OWL_EMAC_REG_MAC_CSR6,</div><div class='add'>+				   OWL_EMAC_MSK_MAC_CSR6_STSR, status);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 owl_emac_dma_cmd_start(struct owl_emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return owl_emac_dma_cmd_set(priv, ~0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 owl_emac_dma_cmd_stop(struct owl_emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	return owl_emac_dma_cmd_set(priv, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void owl_emac_set_hw_mac_addr(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct owl_emac_priv *priv = netdev_priv(netdev);</div><div class='add'>+	const u8 *mac_addr = netdev-&gt;dev_addr;</div><div class='add'>+	u32 addr_high, addr_low;</div><div class='add'>+</div><div class='add'>+	addr_high = mac_addr[0] &lt;&lt; 8 | mac_addr[1];</div><div class='add'>+	addr_low = mac_addr[2] &lt;&lt; 24 | mac_addr[3] &lt;&lt; 16 |</div><div class='add'>+		   mac_addr[4] &lt;&lt; 8 | mac_addr[5];</div><div class='add'>+</div><div class='add'>+	owl_emac_reg_write(priv, OWL_EMAC_REG_MAC_CSR17, addr_high);</div><div class='add'>+	owl_emac_reg_write(priv, OWL_EMAC_REG_MAC_CSR16, addr_low);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void owl_emac_update_link_state(struct owl_emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 val, status;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;pause) {</div><div class='add'>+		val = OWL_EMAC_BIT_MAC_CSR20_FCE | OWL_EMAC_BIT_MAC_CSR20_TUE;</div><div class='add'>+		val |= OWL_EMAC_BIT_MAC_CSR20_TPE | OWL_EMAC_BIT_MAC_CSR20_RPE;</div><div class='add'>+		val |= OWL_EMAC_BIT_MAC_CSR20_BPE;</div><div class='add'>+	} else {</div><div class='add'>+		val = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Update flow control. */</div><div class='add'>+	owl_emac_reg_write(priv, OWL_EMAC_REG_MAC_CSR20, val);</div><div class='add'>+</div><div class='add'>+	val = (priv-&gt;speed == SPEED_100) ? OWL_EMAC_VAL_MAC_CSR6_SPEED_100M :</div><div class='add'>+					   OWL_EMAC_VAL_MAC_CSR6_SPEED_10M;</div><div class='add'>+	val &lt;&lt;= OWL_EMAC_OFF_MAC_CSR6_SPEED;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;duplex == DUPLEX_FULL)</div><div class='add'>+		val |= OWL_EMAC_BIT_MAC_CSR6_FD;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	/* Temporarily stop DMA TX &amp; RX. */</div><div class='add'>+	status = owl_emac_dma_cmd_stop(priv);</div><div class='add'>+</div><div class='add'>+	/* Update operation modes. */</div><div class='add'>+	owl_emac_reg_update(priv, OWL_EMAC_REG_MAC_CSR6,</div><div class='add'>+			    OWL_EMAC_MSK_MAC_CSR6_SPEED |</div><div class='add'>+			    OWL_EMAC_BIT_MAC_CSR6_FD, val);</div><div class='add'>+</div><div class='add'>+	/* Restore DMA TX &amp; RX status. */</div><div class='add'>+	owl_emac_dma_cmd_set(priv, status);</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;priv-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void owl_emac_adjust_link(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct owl_emac_priv *priv = netdev_priv(netdev);</div><div class='add'>+	struct phy_device *phydev = netdev-&gt;phydev;</div><div class='add'>+	bool state_changed = false;</div><div class='add'>+</div><div class='add'>+	if (phydev-&gt;link) {</div><div class='add'>+		if (!priv-&gt;link) {</div><div class='add'>+			priv-&gt;link = phydev-&gt;link;</div><div class='add'>+			state_changed = true;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (priv-&gt;speed != phydev-&gt;speed) {</div><div class='add'>+			priv-&gt;speed = phydev-&gt;speed;</div><div class='add'>+			state_changed = true;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (priv-&gt;duplex != phydev-&gt;duplex) {</div><div class='add'>+			priv-&gt;duplex = phydev-&gt;duplex;</div><div class='add'>+			state_changed = true;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (priv-&gt;pause != phydev-&gt;pause) {</div><div class='add'>+			priv-&gt;pause = phydev-&gt;pause;</div><div class='add'>+			state_changed = true;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		if (priv-&gt;link) {</div><div class='add'>+			priv-&gt;link = phydev-&gt;link;</div><div class='add'>+			state_changed = true;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (state_changed) {</div><div class='add'>+		if (phydev-&gt;link)</div><div class='add'>+			owl_emac_update_link_state(priv);</div><div class='add'>+</div><div class='add'>+		if (netif_msg_link(priv))</div><div class='add'>+			phy_print_status(phydev);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t owl_emac_handle_irq(int irq, void *data)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = data;</div><div class='add'>+	struct owl_emac_priv *priv = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	if (netif_running(netdev)) {</div><div class='add'>+		owl_emac_irq_disable(priv);</div><div class='add'>+		napi_schedule(&amp;priv-&gt;napi);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void owl_emac_ether_addr_push(u8 **dst, const u8 *src)</div><div class='add'>+{</div><div class='add'>+	u32 *a = (u32 *)(*dst);</div><div class='add'>+	const u16 *b = (const u16 *)src;</div><div class='add'>+</div><div class='add'>+	a[0] = b[0];</div><div class='add'>+	a[1] = b[1];</div><div class='add'>+	a[2] = b[2];</div><div class='add'>+</div><div class='add'>+	*dst += 12;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+owl_emac_setup_frame_prepare(struct owl_emac_priv *priv, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	const u8 bcast_addr[] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };</div><div class='add'>+	const u8 *mac_addr = priv-&gt;netdev-&gt;dev_addr;</div><div class='add'>+	u8 *frame;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	skb_put(skb, OWL_EMAC_SETUP_FRAME_LEN);</div><div class='add'>+</div><div class='add'>+	frame = skb-&gt;data;</div><div class='add'>+	memset(frame, 0, skb-&gt;len);</div><div class='add'>+</div><div class='add'>+	owl_emac_ether_addr_push(&amp;frame, mac_addr);</div><div class='add'>+	owl_emac_ether_addr_push(&amp;frame, bcast_addr);</div><div class='add'>+</div><div class='add'>+	/* Fill multicast addresses. */</div><div class='add'>+	WARN_ON(priv-&gt;mcaddr_list.count &gt;= OWL_EMAC_MAX_MULTICAST_ADDRS);</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;mcaddr_list.count; i++) {</div><div class='add'>+		mac_addr = priv-&gt;mcaddr_list.addrs[i];</div><div class='add'>+		owl_emac_ether_addr_push(&amp;frame, mac_addr);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* The setup frame is a special descriptor which is used to provide physical</div><div class='add'>+ * addresses (i.e. mac, broadcast and multicast) to the MAC hardware for</div><div class='add'>+ * filtering purposes. To be recognized as a setup frame, the TDES1_SET bit</div><div class='add'>+ * must be set in the TX descriptor control field.</div><div class='add'>+ */</div><div class='add'>+static int owl_emac_setup_frame_xmit(struct owl_emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct owl_emac_ring *ring = &amp;priv-&gt;tx_ring;</div><div class='add'>+	struct net_device *netdev = priv-&gt;netdev;</div><div class='add'>+	struct owl_emac_ring_desc *desc;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	unsigned int tx_head;</div><div class='add'>+	u32 status, control;</div><div class='add'>+	dma_addr_t dma_addr;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	skb = owl_emac_alloc_skb(netdev);</div><div class='add'>+	if (!skb)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	owl_emac_setup_frame_prepare(priv, skb);</div><div class='add'>+</div><div class='add'>+	dma_addr = owl_emac_dma_map_tx(priv, skb);</div><div class='add'>+	if (dma_mapping_error(owl_emac_get_dev(priv), dma_addr)) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err_free_skb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	tx_head = ring-&gt;head;</div><div class='add'>+	desc = &amp;ring-&gt;descs[tx_head];</div><div class='add'>+</div><div class='add'>+	status = READ_ONCE(desc-&gt;status);</div><div class='add'>+	control = READ_ONCE(desc-&gt;control);</div><div class='add'>+	dma_rmb(); /* Ensure data has been read before used. */</div><div class='add'>+</div><div class='add'>+	if (unlikely(status &amp; OWL_EMAC_BIT_TDES0_OWN) ||</div><div class='add'>+	    !owl_emac_ring_num_unused(ring)) {</div><div class='add'>+		spin_unlock_bh(&amp;priv-&gt;lock);</div><div class='add'>+		owl_emac_dma_unmap_tx(priv, skb, dma_addr);</div><div class='add'>+		ret = -EBUSY;</div><div class='add'>+		goto err_free_skb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ring-&gt;skbs[tx_head] = skb;</div><div class='add'>+	ring-&gt;skbs_dma[tx_head] = dma_addr;</div><div class='add'>+</div><div class='add'>+	control &amp;= OWL_EMAC_BIT_TDES1_IC | OWL_EMAC_BIT_TDES1_TER; /* Maintain bits */</div><div class='add'>+	control |= OWL_EMAC_BIT_TDES1_SET;</div><div class='add'>+	control |= OWL_EMAC_MSK_TDES1_TBS1 &amp; skb-&gt;len;</div><div class='add'>+</div><div class='add'>+	WRITE_ONCE(desc-&gt;control, control);</div><div class='add'>+	WRITE_ONCE(desc-&gt;buf_addr, dma_addr);</div><div class='add'>+	dma_wmb(); /* Flush descriptor before changing ownership. */</div><div class='add'>+	WRITE_ONCE(desc-&gt;status, OWL_EMAC_BIT_TDES0_OWN);</div><div class='add'>+</div><div class='add'>+	owl_emac_ring_push_head(ring);</div><div class='add'>+</div><div class='add'>+	/* Temporarily enable DMA TX. */</div><div class='add'>+	status = owl_emac_dma_cmd_start_tx(priv);</div><div class='add'>+</div><div class='add'>+	/* Trigger setup frame processing. */</div><div class='add'>+	owl_emac_dma_cmd_resume_tx(priv);</div><div class='add'>+</div><div class='add'>+	/* Restore DMA TX status. */</div><div class='add'>+	owl_emac_dma_cmd_set_tx(priv, status);</div><div class='add'>+</div><div class='add'>+	/* Stop regular TX until setup frame is processed. */</div><div class='add'>+	netif_stop_queue(netdev);</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free_skb:</div><div class='add'>+	dev_kfree_skb(skb);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static netdev_tx_t owl_emac_ndo_start_xmit(struct sk_buff *skb,</div><div class='add'>+					   struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct owl_emac_priv *priv = netdev_priv(netdev);</div><div class='add'>+	struct device *dev = owl_emac_get_dev(priv);</div><div class='add'>+	struct owl_emac_ring *ring = &amp;priv-&gt;tx_ring;</div><div class='add'>+	struct owl_emac_ring_desc *desc;</div><div class='add'>+	unsigned int tx_head;</div><div class='add'>+	u32 status, control;</div><div class='add'>+	dma_addr_t dma_addr;</div><div class='add'>+</div><div class='add'>+	dma_addr = owl_emac_dma_map_tx(priv, skb);</div><div class='add'>+	if (dma_mapping_error(dev, dma_addr)) {</div><div class='add'>+		dev_err_ratelimited(&amp;netdev-&gt;dev, "TX DMA mapping failed\n");</div><div class='add'>+		dev_kfree_skb(skb);</div><div class='add'>+		netdev-&gt;stats.tx_dropped++;</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	tx_head = ring-&gt;head;</div><div class='add'>+	desc = &amp;ring-&gt;descs[tx_head];</div><div class='add'>+</div><div class='add'>+	status = READ_ONCE(desc-&gt;status);</div><div class='add'>+	control = READ_ONCE(desc-&gt;control);</div><div class='add'>+	dma_rmb(); /* Ensure data has been read before used. */</div><div class='add'>+</div><div class='add'>+	if (!owl_emac_ring_num_unused(ring) ||</div><div class='add'>+	    unlikely(status &amp; OWL_EMAC_BIT_TDES0_OWN)) {</div><div class='add'>+		netif_stop_queue(netdev);</div><div class='add'>+		spin_unlock_bh(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+		dev_dbg_ratelimited(&amp;netdev-&gt;dev, "TX buffer full, status=0x%08x\n",</div><div class='add'>+				    owl_emac_irq_status(priv));</div><div class='add'>+		owl_emac_dma_unmap_tx(priv, skb, dma_addr);</div><div class='add'>+		netdev-&gt;stats.tx_dropped++;</div><div class='add'>+		return NETDEV_TX_BUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ring-&gt;skbs[tx_head] = skb;</div><div class='add'>+	ring-&gt;skbs_dma[tx_head] = dma_addr;</div><div class='add'>+</div><div class='add'>+	control &amp;= OWL_EMAC_BIT_TDES1_IC | OWL_EMAC_BIT_TDES1_TER; /* Maintain bits */</div><div class='add'>+	control |= OWL_EMAC_BIT_TDES1_FS | OWL_EMAC_BIT_TDES1_LS;</div><div class='add'>+	control |= OWL_EMAC_MSK_TDES1_TBS1 &amp; skb-&gt;len;</div><div class='add'>+</div><div class='add'>+	WRITE_ONCE(desc-&gt;control, control);</div><div class='add'>+	WRITE_ONCE(desc-&gt;buf_addr, dma_addr);</div><div class='add'>+	dma_wmb(); /* Flush descriptor before changing ownership. */</div><div class='add'>+	WRITE_ONCE(desc-&gt;status, OWL_EMAC_BIT_TDES0_OWN);</div><div class='add'>+</div><div class='add'>+	owl_emac_dma_cmd_resume_tx(priv);</div><div class='add'>+	owl_emac_ring_push_head(ring);</div><div class='add'>+</div><div class='add'>+	/* FIXME: The transmission is currently restricted to a single frame</div><div class='add'>+	 * at a time as a workaround for a MAC hardware bug that causes random</div><div class='add'>+	 * freeze of the TX queue processor.</div><div class='add'>+	 */</div><div class='add'>+	netif_stop_queue(netdev);</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool owl_emac_tx_complete_tail(struct owl_emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct owl_emac_ring *ring = &amp;priv-&gt;tx_ring;</div><div class='add'>+	struct net_device *netdev = priv-&gt;netdev;</div><div class='add'>+	struct owl_emac_ring_desc *desc;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	unsigned int tx_tail;</div><div class='add'>+	u32 status;</div><div class='add'>+</div><div class='add'>+	tx_tail = ring-&gt;tail;</div><div class='add'>+	desc = &amp;ring-&gt;descs[tx_tail];</div><div class='add'>+</div><div class='add'>+	status = READ_ONCE(desc-&gt;status);</div><div class='add'>+	dma_rmb(); /* Ensure data has been read before used. */</div><div class='add'>+</div><div class='add'>+	if (status &amp; OWL_EMAC_BIT_TDES0_OWN)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* Check for errors. */</div><div class='add'>+	if (status &amp; OWL_EMAC_BIT_TDES0_ES) {</div><div class='add'>+		dev_dbg_ratelimited(&amp;netdev-&gt;dev,</div><div class='add'>+				    "TX complete error status: 0x%08x\n",</div><div class='add'>+				    status);</div><div class='add'>+</div><div class='add'>+		netdev-&gt;stats.tx_errors++;</div><div class='add'>+</div><div class='add'>+		if (status &amp; OWL_EMAC_BIT_TDES0_UF)</div><div class='add'>+			netdev-&gt;stats.tx_fifo_errors++;</div><div class='add'>+</div><div class='add'>+		if (status &amp; OWL_EMAC_BIT_TDES0_EC)</div><div class='add'>+			netdev-&gt;stats.tx_aborted_errors++;</div><div class='add'>+</div><div class='add'>+		if (status &amp; OWL_EMAC_BIT_TDES0_LC)</div><div class='add'>+			netdev-&gt;stats.tx_window_errors++;</div><div class='add'>+</div><div class='add'>+		if (status &amp; OWL_EMAC_BIT_TDES0_NC)</div><div class='add'>+			netdev-&gt;stats.tx_heartbeat_errors++;</div><div class='add'>+</div><div class='add'>+		if (status &amp; OWL_EMAC_BIT_TDES0_LO)</div><div class='add'>+			netdev-&gt;stats.tx_carrier_errors++;</div><div class='add'>+	} else {</div><div class='add'>+		netdev-&gt;stats.tx_packets++;</div><div class='add'>+		netdev-&gt;stats.tx_bytes += ring-&gt;skbs[tx_tail]-&gt;len;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Some collisions occurred, but pkt has been transmitted. */</div><div class='add'>+	if (status &amp; OWL_EMAC_BIT_TDES0_DE)</div><div class='add'>+		netdev-&gt;stats.collisions++;</div><div class='add'>+</div><div class='add'>+	skb = ring-&gt;skbs[tx_tail];</div><div class='add'>+	owl_emac_dma_unmap_tx(priv, skb, ring-&gt;skbs_dma[tx_tail]);</div><div class='add'>+	dev_kfree_skb(skb);</div><div class='add'>+</div><div class='add'>+	ring-&gt;skbs[tx_tail] = NULL;</div><div class='add'>+	ring-&gt;skbs_dma[tx_tail] = 0;</div><div class='add'>+</div><div class='add'>+	owl_emac_ring_pop_tail(ring);</div><div class='add'>+</div><div class='add'>+	if (unlikely(netif_queue_stopped(netdev)))</div><div class='add'>+		netif_wake_queue(netdev);</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void owl_emac_tx_complete(struct owl_emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct owl_emac_ring *ring = &amp;priv-&gt;tx_ring;</div><div class='add'>+	struct net_device *netdev = priv-&gt;netdev;</div><div class='add'>+	unsigned int tx_next;</div><div class='add'>+	u32 status;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	while (ring-&gt;tail != ring-&gt;head) {</div><div class='add'>+		if (!owl_emac_tx_complete_tail(priv))</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* FIXME: This is a workaround for a MAC hardware bug not clearing</div><div class='add'>+	 * (sometimes) the OWN bit for a transmitted frame descriptor.</div><div class='add'>+	 *</div><div class='add'>+	 * At this point, when TX queue is full, the tail descriptor has the</div><div class='add'>+	 * OWN bit set, which normally means the frame has not been processed</div><div class='add'>+	 * or transmitted yet. But if there is at least one descriptor in the</div><div class='add'>+	 * queue having the OWN bit cleared, we can safely assume the tail</div><div class='add'>+	 * frame has been also processed by the MAC hardware.</div><div class='add'>+	 *</div><div class='add'>+	 * If that's the case, let's force the frame completion by manually</div><div class='add'>+	 * clearing the OWN bit.</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely(!owl_emac_ring_num_unused(ring))) {</div><div class='add'>+		tx_next = ring-&gt;tail;</div><div class='add'>+</div><div class='add'>+		while ((tx_next = owl_emac_ring_get_next(ring, tx_next)) != ring-&gt;head) {</div><div class='add'>+			status = READ_ONCE(ring-&gt;descs[tx_next].status);</div><div class='add'>+			dma_rmb(); /* Ensure data has been read before used. */</div><div class='add'>+</div><div class='add'>+			if (status &amp; OWL_EMAC_BIT_TDES0_OWN)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			netdev_dbg(netdev, "Found uncleared TX desc OWN bit\n");</div><div class='add'>+</div><div class='add'>+			status = READ_ONCE(ring-&gt;descs[ring-&gt;tail].status);</div><div class='add'>+			dma_rmb(); /* Ensure data has been read before used. */</div><div class='add'>+			status &amp;= ~OWL_EMAC_BIT_TDES0_OWN;</div><div class='add'>+			WRITE_ONCE(ring-&gt;descs[ring-&gt;tail].status, status);</div><div class='add'>+</div><div class='add'>+			owl_emac_tx_complete_tail(priv);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_unlock(&amp;priv-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int owl_emac_rx_process(struct owl_emac_priv *priv, int budget)</div><div class='add'>+{</div><div class='add'>+	struct owl_emac_ring *ring = &amp;priv-&gt;rx_ring;</div><div class='add'>+	struct device *dev = owl_emac_get_dev(priv);</div><div class='add'>+	struct net_device *netdev = priv-&gt;netdev;</div><div class='add'>+	struct owl_emac_ring_desc *desc;</div><div class='add'>+	struct sk_buff *curr_skb, *new_skb;</div><div class='add'>+	dma_addr_t curr_dma, new_dma;</div><div class='add'>+	unsigned int rx_tail, len;</div><div class='add'>+	u32 status;</div><div class='add'>+	int recv = 0;</div><div class='add'>+</div><div class='add'>+	while (recv &lt; budget) {</div><div class='add'>+		spin_lock(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+		rx_tail = ring-&gt;tail;</div><div class='add'>+		desc = &amp;ring-&gt;descs[rx_tail];</div><div class='add'>+</div><div class='add'>+		status = READ_ONCE(desc-&gt;status);</div><div class='add'>+		dma_rmb(); /* Ensure data has been read before used. */</div><div class='add'>+</div><div class='add'>+		if (status &amp; OWL_EMAC_BIT_RDES0_OWN) {</div><div class='add'>+			spin_unlock(&amp;priv-&gt;lock);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		curr_skb = ring-&gt;skbs[rx_tail];</div><div class='add'>+		curr_dma = ring-&gt;skbs_dma[rx_tail];</div><div class='add'>+		owl_emac_ring_pop_tail(ring);</div><div class='add'>+</div><div class='add'>+		spin_unlock(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+		if (status &amp; (OWL_EMAC_BIT_RDES0_DE | OWL_EMAC_BIT_RDES0_RF |</div><div class='add'>+		    OWL_EMAC_BIT_RDES0_TL | OWL_EMAC_BIT_RDES0_CS |</div><div class='add'>+		    OWL_EMAC_BIT_RDES0_DB | OWL_EMAC_BIT_RDES0_CE |</div><div class='add'>+		    OWL_EMAC_BIT_RDES0_ZERO)) {</div><div class='add'>+			dev_dbg_ratelimited(&amp;netdev-&gt;dev,</div><div class='add'>+					    "RX desc error status: 0x%08x\n",</div><div class='add'>+					    status);</div><div class='add'>+</div><div class='add'>+			if (status &amp; OWL_EMAC_BIT_RDES0_DE)</div><div class='add'>+				netdev-&gt;stats.rx_over_errors++;</div><div class='add'>+</div><div class='add'>+			if (status &amp; (OWL_EMAC_BIT_RDES0_RF | OWL_EMAC_BIT_RDES0_DB))</div><div class='add'>+				netdev-&gt;stats.rx_frame_errors++;</div><div class='add'>+</div><div class='add'>+			if (status &amp; OWL_EMAC_BIT_RDES0_TL)</div><div class='add'>+				netdev-&gt;stats.rx_length_errors++;</div><div class='add'>+</div><div class='add'>+			if (status &amp; OWL_EMAC_BIT_RDES0_CS)</div><div class='add'>+				netdev-&gt;stats.collisions++;</div><div class='add'>+</div><div class='add'>+			if (status &amp; OWL_EMAC_BIT_RDES0_CE)</div><div class='add'>+				netdev-&gt;stats.rx_crc_errors++;</div><div class='add'>+</div><div class='add'>+			if (status &amp; OWL_EMAC_BIT_RDES0_ZERO)</div><div class='add'>+				netdev-&gt;stats.rx_fifo_errors++;</div><div class='add'>+</div><div class='add'>+			goto drop_skb;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		len = (status &amp; OWL_EMAC_MSK_RDES0_FL) &gt;&gt; OWL_EMAC_OFF_RDES0_FL;</div><div class='add'>+		if (unlikely(len &gt; OWL_EMAC_RX_FRAME_MAX_LEN)) {</div><div class='add'>+			netdev-&gt;stats.rx_length_errors++;</div><div class='add'>+			netdev_err(netdev, "invalid RX frame len: %u\n", len);</div><div class='add'>+			goto drop_skb;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Prepare new skb before receiving the current one. */</div><div class='add'>+		new_skb = owl_emac_alloc_skb(netdev);</div><div class='add'>+		if (unlikely(!new_skb))</div><div class='add'>+			goto drop_skb;</div><div class='add'>+</div><div class='add'>+		new_dma = owl_emac_dma_map_rx(priv, new_skb);</div><div class='add'>+		if (dma_mapping_error(dev, new_dma)) {</div><div class='add'>+			dev_kfree_skb(new_skb);</div><div class='add'>+			netdev_err(netdev, "RX DMA mapping failed\n");</div><div class='add'>+			goto drop_skb;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		owl_emac_dma_unmap_rx(priv, curr_skb, curr_dma);</div><div class='add'>+</div><div class='add'>+		skb_put(curr_skb, len - ETH_FCS_LEN);</div><div class='add'>+		curr_skb-&gt;ip_summed = CHECKSUM_NONE;</div><div class='add'>+		curr_skb-&gt;protocol = eth_type_trans(curr_skb, netdev);</div><div class='add'>+		curr_skb-&gt;dev = netdev;</div><div class='add'>+</div><div class='add'>+		netif_receive_skb(curr_skb);</div><div class='add'>+</div><div class='add'>+		netdev-&gt;stats.rx_packets++;</div><div class='add'>+		netdev-&gt;stats.rx_bytes += len;</div><div class='add'>+		recv++;</div><div class='add'>+		goto push_skb;</div><div class='add'>+</div><div class='add'>+drop_skb:</div><div class='add'>+		netdev-&gt;stats.rx_dropped++;</div><div class='add'>+		netdev-&gt;stats.rx_errors++;</div><div class='add'>+		/* Reuse the current skb. */</div><div class='add'>+		new_skb = curr_skb;</div><div class='add'>+		new_dma = curr_dma;</div><div class='add'>+</div><div class='add'>+push_skb:</div><div class='add'>+		spin_lock(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+		ring-&gt;skbs[ring-&gt;head] = new_skb;</div><div class='add'>+		ring-&gt;skbs_dma[ring-&gt;head] = new_dma;</div><div class='add'>+</div><div class='add'>+		WRITE_ONCE(desc-&gt;buf_addr, new_dma);</div><div class='add'>+		dma_wmb(); /* Flush descriptor before changing ownership. */</div><div class='add'>+		WRITE_ONCE(desc-&gt;status, OWL_EMAC_BIT_RDES0_OWN);</div><div class='add'>+</div><div class='add'>+		owl_emac_ring_push_head(ring);</div><div class='add'>+</div><div class='add'>+		spin_unlock(&amp;priv-&gt;lock);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return recv;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int owl_emac_poll(struct napi_struct *napi, int budget)</div><div class='add'>+{</div><div class='add'>+	int work_done = 0, ru_cnt = 0, recv;</div><div class='add'>+	static int tx_err_cnt, rx_err_cnt;</div><div class='add'>+	struct owl_emac_priv *priv;</div><div class='add'>+	u32 status, proc_status;</div><div class='add'>+</div><div class='add'>+	priv = container_of(napi, struct owl_emac_priv, napi);</div><div class='add'>+</div><div class='add'>+	while ((status = owl_emac_irq_clear(priv)) &amp;</div><div class='add'>+	       (OWL_EMAC_BIT_MAC_CSR5_NIS | OWL_EMAC_BIT_MAC_CSR5_AIS)) {</div><div class='add'>+		recv = 0;</div><div class='add'>+</div><div class='add'>+		/* TX setup frame raises ETI instead of TI. */</div><div class='add'>+		if (status &amp; (OWL_EMAC_BIT_MAC_CSR5_TI | OWL_EMAC_BIT_MAC_CSR5_ETI)) {</div><div class='add'>+			owl_emac_tx_complete(priv);</div><div class='add'>+			tx_err_cnt = 0;</div><div class='add'>+</div><div class='add'>+			/* Count MAC internal RX errors. */</div><div class='add'>+			proc_status = status &amp; OWL_EMAC_MSK_MAC_CSR5_RS;</div><div class='add'>+			proc_status &gt;&gt;= OWL_EMAC_OFF_MAC_CSR5_RS;</div><div class='add'>+			if (proc_status == OWL_EMAC_VAL_MAC_CSR5_RS_DATA ||</div><div class='add'>+			    proc_status == OWL_EMAC_VAL_MAC_CSR5_RS_CDES ||</div><div class='add'>+			    proc_status == OWL_EMAC_VAL_MAC_CSR5_RS_FDES)</div><div class='add'>+				rx_err_cnt++;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (status &amp; OWL_EMAC_BIT_MAC_CSR5_RI) {</div><div class='add'>+			recv = owl_emac_rx_process(priv, budget - work_done);</div><div class='add'>+			rx_err_cnt = 0;</div><div class='add'>+</div><div class='add'>+			/* Count MAC internal TX errors. */</div><div class='add'>+			proc_status = status &amp; OWL_EMAC_MSK_MAC_CSR5_TS;</div><div class='add'>+			proc_status &gt;&gt;= OWL_EMAC_OFF_MAC_CSR5_TS;</div><div class='add'>+			if (proc_status == OWL_EMAC_VAL_MAC_CSR5_TS_DATA ||</div><div class='add'>+			    proc_status == OWL_EMAC_VAL_MAC_CSR5_TS_CDES)</div><div class='add'>+				tx_err_cnt++;</div><div class='add'>+		} else if (status &amp; OWL_EMAC_BIT_MAC_CSR5_RU) {</div><div class='add'>+			/* MAC AHB is in suspended state, will return to RX</div><div class='add'>+			 * descriptor processing when the host changes ownership</div><div class='add'>+			 * of the descriptor and either an RX poll demand CMD is</div><div class='add'>+			 * issued or a new frame is recognized by the MAC AHB.</div><div class='add'>+			 */</div><div class='add'>+			if (++ru_cnt == 2)</div><div class='add'>+				owl_emac_dma_cmd_resume_rx(priv);</div><div class='add'>+</div><div class='add'>+			recv = owl_emac_rx_process(priv, budget - work_done);</div><div class='add'>+</div><div class='add'>+			/* Guard against too many RU interrupts. */</div><div class='add'>+			if (ru_cnt &gt; 3)</div><div class='add'>+				break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		work_done += recv;</div><div class='add'>+		if (work_done &gt;= budget)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (work_done &lt; budget) {</div><div class='add'>+		napi_complete_done(napi, work_done);</div><div class='add'>+		owl_emac_irq_enable(priv);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Reset MAC when getting too many internal TX or RX errors. */</div><div class='add'>+	if (tx_err_cnt &gt; 10 || rx_err_cnt &gt; 10) {</div><div class='add'>+		netdev_dbg(priv-&gt;netdev, "%s error status: 0x%08x\n",</div><div class='add'>+			   tx_err_cnt &gt; 10 ? "TX" : "RX", status);</div><div class='add'>+		rx_err_cnt = 0;</div><div class='add'>+		tx_err_cnt = 0;</div><div class='add'>+		schedule_work(&amp;priv-&gt;mac_reset_task);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return work_done;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void owl_emac_mdio_clock_enable(struct owl_emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	/* Enable MDC clock generation by adjusting CLKDIV according to</div><div class='add'>+	 * the vendor implementation of the original driver.</div><div class='add'>+	 */</div><div class='add'>+	val = owl_emac_reg_read(priv, OWL_EMAC_REG_MAC_CSR10);</div><div class='add'>+	val &amp;= OWL_EMAC_MSK_MAC_CSR10_CLKDIV;</div><div class='add'>+	val |= OWL_EMAC_VAL_MAC_CSR10_CLKDIV_128 &lt;&lt; OWL_EMAC_OFF_MAC_CSR10_CLKDIV;</div><div class='add'>+</div><div class='add'>+	val |= OWL_EMAC_BIT_MAC_CSR10_SB;</div><div class='add'>+	val |= OWL_EMAC_VAL_MAC_CSR10_OPCODE_CDS &lt;&lt; OWL_EMAC_OFF_MAC_CSR10_OPCODE;</div><div class='add'>+	owl_emac_reg_write(priv, OWL_EMAC_REG_MAC_CSR10, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void owl_emac_core_hw_reset(struct owl_emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	/* Trigger hardware reset. */</div><div class='add'>+	reset_control_assert(priv-&gt;reset);</div><div class='add'>+	usleep_range(10, 20);</div><div class='add'>+	reset_control_deassert(priv-&gt;reset);</div><div class='add'>+	usleep_range(100, 200);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int owl_emac_core_sw_reset(struct owl_emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Trigger software reset. */</div><div class='add'>+	owl_emac_reg_set(priv, OWL_EMAC_REG_MAC_CSR0, OWL_EMAC_BIT_MAC_CSR0_SWR);</div><div class='add'>+	ret = readl_poll_timeout(priv-&gt;base + OWL_EMAC_REG_MAC_CSR0,</div><div class='add'>+				 val, !(val &amp; OWL_EMAC_BIT_MAC_CSR0_SWR),</div><div class='add'>+				 OWL_EMAC_POLL_DELAY_USEC,</div><div class='add'>+				 OWL_EMAC_RESET_POLL_TIMEOUT_USEC);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;phy_mode == PHY_INTERFACE_MODE_RMII) {</div><div class='add'>+		/* Enable RMII and use the 50MHz rmii clk as output to PHY. */</div><div class='add'>+		val = 0;</div><div class='add'>+	} else {</div><div class='add'>+		/* Enable SMII and use the 125MHz rmii clk as output to PHY.</div><div class='add'>+		 * Additionally set SMII SYNC delay to 4 half cycle.</div><div class='add'>+		 */</div><div class='add'>+		val = 0x04 &lt;&lt; OWL_EMAC_OFF_MAC_CTRL_SSDC;</div><div class='add'>+		val |= OWL_EMAC_BIT_MAC_CTRL_RSIS;</div><div class='add'>+	}</div><div class='add'>+	owl_emac_reg_write(priv, OWL_EMAC_REG_MAC_CTRL, val);</div><div class='add'>+</div><div class='add'>+	/* MDC is disabled after reset. */</div><div class='add'>+	owl_emac_mdio_clock_enable(priv);</div><div class='add'>+</div><div class='add'>+	/* Set FIFO pause &amp; restart threshold levels. */</div><div class='add'>+	val = 0x40 &lt;&lt; OWL_EMAC_OFF_MAC_CSR19_FPTL;</div><div class='add'>+	val |= 0x10 &lt;&lt; OWL_EMAC_OFF_MAC_CSR19_FRTL;</div><div class='add'>+	owl_emac_reg_write(priv, OWL_EMAC_REG_MAC_CSR19, val);</div><div class='add'>+</div><div class='add'>+	/* Set flow control pause quanta time to ~100 ms. */</div><div class='add'>+	val = 0x4FFF &lt;&lt; OWL_EMAC_OFF_MAC_CSR18_PQT;</div><div class='add'>+	owl_emac_reg_write(priv, OWL_EMAC_REG_MAC_CSR18, val);</div><div class='add'>+</div><div class='add'>+	/* Setup interrupt mitigation. */</div><div class='add'>+	val = 7 &lt;&lt; OWL_EMAC_OFF_MAC_CSR11_NRP;</div><div class='add'>+	val |= 4 &lt;&lt; OWL_EMAC_OFF_MAC_CSR11_RT;</div><div class='add'>+	owl_emac_reg_write(priv, OWL_EMAC_REG_MAC_CSR11, val);</div><div class='add'>+</div><div class='add'>+	/* Set RX/TX rings base addresses. */</div><div class='add'>+	owl_emac_reg_write(priv, OWL_EMAC_REG_MAC_CSR3,</div><div class='add'>+			   (u32)(priv-&gt;rx_ring.descs_dma));</div><div class='add'>+	owl_emac_reg_write(priv, OWL_EMAC_REG_MAC_CSR4,</div><div class='add'>+			   (u32)(priv-&gt;tx_ring.descs_dma));</div><div class='add'>+</div><div class='add'>+	/* Setup initial operation mode. */</div><div class='add'>+	val = OWL_EMAC_VAL_MAC_CSR6_SPEED_100M &lt;&lt; OWL_EMAC_OFF_MAC_CSR6_SPEED;</div><div class='add'>+	val |= OWL_EMAC_BIT_MAC_CSR6_FD;</div><div class='add'>+	owl_emac_reg_update(priv, OWL_EMAC_REG_MAC_CSR6,</div><div class='add'>+			    OWL_EMAC_MSK_MAC_CSR6_SPEED |</div><div class='add'>+			    OWL_EMAC_BIT_MAC_CSR6_FD, val);</div><div class='add'>+	owl_emac_reg_clear(priv, OWL_EMAC_REG_MAC_CSR6,</div><div class='add'>+			   OWL_EMAC_BIT_MAC_CSR6_PR | OWL_EMAC_BIT_MAC_CSR6_PM);</div><div class='add'>+</div><div class='add'>+	priv-&gt;link = 0;</div><div class='add'>+	priv-&gt;speed = SPEED_UNKNOWN;</div><div class='add'>+	priv-&gt;duplex = DUPLEX_UNKNOWN;</div><div class='add'>+	priv-&gt;pause = 0;</div><div class='add'>+	priv-&gt;mcaddr_list.count = 0;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int owl_emac_enable(struct net_device *netdev, bool start_phy)</div><div class='add'>+{</div><div class='add'>+	struct owl_emac_priv *priv = netdev_priv(netdev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	owl_emac_dma_cmd_stop(priv);</div><div class='add'>+	owl_emac_irq_disable(priv);</div><div class='add'>+	owl_emac_irq_clear(priv);</div><div class='add'>+</div><div class='add'>+	owl_emac_ring_prepare_tx(priv);</div><div class='add'>+	ret = owl_emac_ring_prepare_rx(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_unprep;</div><div class='add'>+</div><div class='add'>+	ret = owl_emac_core_sw_reset(priv);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(netdev, "failed to soft reset MAC core: %d\n", ret);</div><div class='add'>+		goto err_unprep;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	owl_emac_set_hw_mac_addr(netdev);</div><div class='add'>+	owl_emac_setup_frame_xmit(priv);</div><div class='add'>+</div><div class='add'>+	netdev_reset_queue(netdev);</div><div class='add'>+	napi_enable(&amp;priv-&gt;napi);</div><div class='add'>+</div><div class='add'>+	owl_emac_irq_enable(priv);</div><div class='add'>+	owl_emac_dma_cmd_start(priv);</div><div class='add'>+</div><div class='add'>+	if (start_phy)</div><div class='add'>+		phy_start(netdev-&gt;phydev);</div><div class='add'>+</div><div class='add'>+	netif_start_queue(netdev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_unprep:</div><div class='add'>+	owl_emac_ring_unprepare_rx(priv);</div><div class='add'>+	owl_emac_ring_unprepare_tx(priv);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void owl_emac_disable(struct net_device *netdev, bool stop_phy)</div><div class='add'>+{</div><div class='add'>+	struct owl_emac_priv *priv = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	owl_emac_dma_cmd_stop(priv);</div><div class='add'>+	owl_emac_irq_disable(priv);</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(netdev);</div><div class='add'>+	napi_disable(&amp;priv-&gt;napi);</div><div class='add'>+</div><div class='add'>+	if (stop_phy)</div><div class='add'>+		phy_stop(netdev-&gt;phydev);</div><div class='add'>+</div><div class='add'>+	owl_emac_ring_unprepare_rx(priv);</div><div class='add'>+	owl_emac_ring_unprepare_tx(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int owl_emac_ndo_open(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	return owl_emac_enable(netdev, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int owl_emac_ndo_stop(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	owl_emac_disable(netdev, true);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void owl_emac_set_multicast(struct net_device *netdev, int count)</div><div class='add'>+{</div><div class='add'>+	struct owl_emac_priv *priv = netdev_priv(netdev);</div><div class='add'>+	struct netdev_hw_addr *ha;</div><div class='add'>+	int index = 0;</div><div class='add'>+</div><div class='add'>+	if (count &lt;= 0) {</div><div class='add'>+		priv-&gt;mcaddr_list.count = 0;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev_for_each_mc_addr(ha, netdev) {</div><div class='add'>+		if (!is_multicast_ether_addr(ha-&gt;addr))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		WARN_ON(index &gt;= OWL_EMAC_MAX_MULTICAST_ADDRS);</div><div class='add'>+		ether_addr_copy(priv-&gt;mcaddr_list.addrs[index++], ha-&gt;addr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;mcaddr_list.count = index;</div><div class='add'>+</div><div class='add'>+	owl_emac_setup_frame_xmit(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void owl_emac_ndo_set_rx_mode(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct owl_emac_priv *priv = netdev_priv(netdev);</div><div class='add'>+	u32 status, val = 0;</div><div class='add'>+	int mcast_count = 0;</div><div class='add'>+</div><div class='add'>+	if (netdev-&gt;flags &amp; IFF_PROMISC) {</div><div class='add'>+		val = OWL_EMAC_BIT_MAC_CSR6_PR;</div><div class='add'>+	} else if (netdev-&gt;flags &amp; IFF_ALLMULTI) {</div><div class='add'>+		val = OWL_EMAC_BIT_MAC_CSR6_PM;</div><div class='add'>+	} else if (netdev-&gt;flags &amp; IFF_MULTICAST) {</div><div class='add'>+		mcast_count = netdev_mc_count(netdev);</div><div class='add'>+</div><div class='add'>+		if (mcast_count &gt; OWL_EMAC_MAX_MULTICAST_ADDRS) {</div><div class='add'>+			val = OWL_EMAC_BIT_MAC_CSR6_PM;</div><div class='add'>+			mcast_count = 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	/* Temporarily stop DMA TX &amp; RX. */</div><div class='add'>+	status = owl_emac_dma_cmd_stop(priv);</div><div class='add'>+</div><div class='add'>+	/* Update operation modes. */</div><div class='add'>+	owl_emac_reg_update(priv, OWL_EMAC_REG_MAC_CSR6,</div><div class='add'>+			    OWL_EMAC_BIT_MAC_CSR6_PR | OWL_EMAC_BIT_MAC_CSR6_PM,</div><div class='add'>+			    val);</div><div class='add'>+</div><div class='add'>+	/* Restore DMA TX &amp; RX status. */</div><div class='add'>+	owl_emac_dma_cmd_set(priv, status);</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	/* Set/reset multicast addr list. */</div><div class='add'>+	owl_emac_set_multicast(netdev, mcast_count);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int owl_emac_ndo_set_mac_addr(struct net_device *netdev, void *addr)</div><div class='add'>+{</div><div class='add'>+	struct sockaddr *skaddr = addr;</div><div class='add'>+</div><div class='add'>+	if (!is_valid_ether_addr(skaddr-&gt;sa_data))</div><div class='add'>+		return -EADDRNOTAVAIL;</div><div class='add'>+</div><div class='add'>+	if (netif_running(netdev))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	eth_hw_addr_set(netdev, skaddr-&gt;sa_data);</div><div class='add'>+	owl_emac_set_hw_mac_addr(netdev);</div><div class='add'>+</div><div class='add'>+	return owl_emac_setup_frame_xmit(netdev_priv(netdev));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int owl_emac_ndo_eth_ioctl(struct net_device *netdev,</div><div class='add'>+				  struct ifreq *req, int cmd)</div><div class='add'>+{</div><div class='add'>+	if (!netif_running(netdev))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return phy_mii_ioctl(netdev-&gt;phydev, req, cmd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void owl_emac_ndo_tx_timeout(struct net_device *netdev,</div><div class='add'>+				    unsigned int txqueue)</div><div class='add'>+{</div><div class='add'>+	struct owl_emac_priv *priv = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	schedule_work(&amp;priv-&gt;mac_reset_task);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void owl_emac_reset_task(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct owl_emac_priv *priv;</div><div class='add'>+</div><div class='add'>+	priv = container_of(work, struct owl_emac_priv, mac_reset_task);</div><div class='add'>+</div><div class='add'>+	netdev_dbg(priv-&gt;netdev, "resetting MAC\n");</div><div class='add'>+	owl_emac_disable(priv-&gt;netdev, false);</div><div class='add'>+	owl_emac_enable(priv-&gt;netdev, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct net_device_stats *</div><div class='add'>+owl_emac_ndo_get_stats(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	/* FIXME: If possible, try to get stats from MAC hardware registers</div><div class='add'>+	 * instead of tracking them manually in the driver.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	return &amp;netdev-&gt;stats;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops owl_emac_netdev_ops = {</div><div class='add'>+	.ndo_open		= owl_emac_ndo_open,</div><div class='add'>+	.ndo_stop		= owl_emac_ndo_stop,</div><div class='add'>+	.ndo_start_xmit		= owl_emac_ndo_start_xmit,</div><div class='add'>+	.ndo_set_rx_mode	= owl_emac_ndo_set_rx_mode,</div><div class='add'>+	.ndo_set_mac_address	= owl_emac_ndo_set_mac_addr,</div><div class='add'>+	.ndo_validate_addr	= eth_validate_addr,</div><div class='add'>+	.ndo_eth_ioctl		= owl_emac_ndo_eth_ioctl,</div><div class='add'>+	.ndo_tx_timeout         = owl_emac_ndo_tx_timeout,</div><div class='add'>+	.ndo_get_stats		= owl_emac_ndo_get_stats,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void owl_emac_ethtool_get_drvinfo(struct net_device *dev,</div><div class='add'>+					 struct ethtool_drvinfo *info)</div><div class='add'>+{</div><div class='add'>+	strscpy(info-&gt;driver, OWL_EMAC_DRVNAME, sizeof(info-&gt;driver));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 owl_emac_ethtool_get_msglevel(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct owl_emac_priv *priv = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	return priv-&gt;msg_enable;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void owl_emac_ethtool_set_msglevel(struct net_device *ndev, u32 val)</div><div class='add'>+{</div><div class='add'>+	struct owl_emac_priv *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	priv-&gt;msg_enable = val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops owl_emac_ethtool_ops = {</div><div class='add'>+	.get_drvinfo		= owl_emac_ethtool_get_drvinfo,</div><div class='add'>+	.get_link		= ethtool_op_get_link,</div><div class='add'>+	.get_link_ksettings	= phy_ethtool_get_link_ksettings,</div><div class='add'>+	.set_link_ksettings	= phy_ethtool_set_link_ksettings,</div><div class='add'>+	.get_msglevel		= owl_emac_ethtool_get_msglevel,</div><div class='add'>+	.set_msglevel		= owl_emac_ethtool_set_msglevel,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int owl_emac_mdio_wait(struct owl_emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	/* Wait while data transfer is in progress. */</div><div class='add'>+	return readl_poll_timeout(priv-&gt;base + OWL_EMAC_REG_MAC_CSR10,</div><div class='add'>+				  val, !(val &amp; OWL_EMAC_BIT_MAC_CSR10_SB),</div><div class='add'>+				  OWL_EMAC_POLL_DELAY_USEC,</div><div class='add'>+				  OWL_EMAC_MDIO_POLL_TIMEOUT_USEC);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int owl_emac_mdio_read(struct mii_bus *bus, int addr, int regnum)</div><div class='add'>+{</div><div class='add'>+	struct owl_emac_priv *priv = bus-&gt;priv;</div><div class='add'>+	u32 data, tmp;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	data = OWL_EMAC_BIT_MAC_CSR10_SB;</div><div class='add'>+	data |= OWL_EMAC_VAL_MAC_CSR10_OPCODE_RD &lt;&lt; OWL_EMAC_OFF_MAC_CSR10_OPCODE;</div><div class='add'>+</div><div class='add'>+	tmp = addr &lt;&lt; OWL_EMAC_OFF_MAC_CSR10_PHYADD;</div><div class='add'>+	data |= tmp &amp; OWL_EMAC_MSK_MAC_CSR10_PHYADD;</div><div class='add'>+</div><div class='add'>+	tmp = regnum &lt;&lt; OWL_EMAC_OFF_MAC_CSR10_REGADD;</div><div class='add'>+	data |= tmp &amp; OWL_EMAC_MSK_MAC_CSR10_REGADD;</div><div class='add'>+</div><div class='add'>+	owl_emac_reg_write(priv, OWL_EMAC_REG_MAC_CSR10, data);</div><div class='add'>+</div><div class='add'>+	ret = owl_emac_mdio_wait(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	data = owl_emac_reg_read(priv, OWL_EMAC_REG_MAC_CSR10);</div><div class='add'>+	data &amp;= OWL_EMAC_MSK_MAC_CSR10_DATA;</div><div class='add'>+</div><div class='add'>+	return data;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+owl_emac_mdio_write(struct mii_bus *bus, int addr, int regnum, u16 val)</div><div class='add'>+{</div><div class='add'>+	struct owl_emac_priv *priv = bus-&gt;priv;</div><div class='add'>+	u32 data, tmp;</div><div class='add'>+</div><div class='add'>+	data = OWL_EMAC_BIT_MAC_CSR10_SB;</div><div class='add'>+	data |= OWL_EMAC_VAL_MAC_CSR10_OPCODE_WR &lt;&lt; OWL_EMAC_OFF_MAC_CSR10_OPCODE;</div><div class='add'>+</div><div class='add'>+	tmp = addr &lt;&lt; OWL_EMAC_OFF_MAC_CSR10_PHYADD;</div><div class='add'>+	data |= tmp &amp; OWL_EMAC_MSK_MAC_CSR10_PHYADD;</div><div class='add'>+</div><div class='add'>+	tmp = regnum &lt;&lt; OWL_EMAC_OFF_MAC_CSR10_REGADD;</div><div class='add'>+	data |= tmp &amp; OWL_EMAC_MSK_MAC_CSR10_REGADD;</div><div class='add'>+</div><div class='add'>+	data |= val &amp; OWL_EMAC_MSK_MAC_CSR10_DATA;</div><div class='add'>+</div><div class='add'>+	owl_emac_reg_write(priv, OWL_EMAC_REG_MAC_CSR10, data);</div><div class='add'>+</div><div class='add'>+	return owl_emac_mdio_wait(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int owl_emac_mdio_init(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct owl_emac_priv *priv = netdev_priv(netdev);</div><div class='add'>+	struct device *dev = owl_emac_get_dev(priv);</div><div class='add'>+	struct device_node *mdio_node;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mdio_node = of_get_available_child_by_name(dev-&gt;of_node, "mdio");</div><div class='add'>+	if (!mdio_node)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	priv-&gt;mii = devm_mdiobus_alloc(dev);</div><div class='add'>+	if (!priv-&gt;mii) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err_put_node;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	snprintf(priv-&gt;mii-&gt;id, MII_BUS_ID_SIZE, "%s", dev_name(dev));</div><div class='add'>+	priv-&gt;mii-&gt;name = "owl-emac-mdio";</div><div class='add'>+	priv-&gt;mii-&gt;parent = dev;</div><div class='add'>+	priv-&gt;mii-&gt;read = owl_emac_mdio_read;</div><div class='add'>+	priv-&gt;mii-&gt;write = owl_emac_mdio_write;</div><div class='add'>+	priv-&gt;mii-&gt;phy_mask = ~0; /* Mask out all PHYs from auto probing. */</div><div class='add'>+	priv-&gt;mii-&gt;priv = priv;</div><div class='add'>+</div><div class='add'>+	ret = devm_of_mdiobus_register(dev, priv-&gt;mii, mdio_node);</div><div class='add'>+</div><div class='add'>+err_put_node:</div><div class='add'>+	of_node_put(mdio_node);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int owl_emac_phy_init(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct owl_emac_priv *priv = netdev_priv(netdev);</div><div class='add'>+	struct device *dev = owl_emac_get_dev(priv);</div><div class='add'>+	struct phy_device *phy;</div><div class='add'>+</div><div class='add'>+	phy = of_phy_get_and_connect(netdev, dev-&gt;of_node,</div><div class='add'>+				     owl_emac_adjust_link);</div><div class='add'>+	if (!phy)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	phy_set_sym_pause(phy, true, true, true);</div><div class='add'>+</div><div class='add'>+	if (netif_msg_link(priv))</div><div class='add'>+		phy_attached_info(phy);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void owl_emac_get_mac_addr(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = netdev-&gt;dev.parent;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = platform_get_ethdev_address(dev, netdev);</div><div class='add'>+	if (!ret &amp;&amp; is_valid_ether_addr(netdev-&gt;dev_addr))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	eth_hw_addr_random(netdev);</div><div class='add'>+	dev_warn(dev, "using random MAC address %pM\n", netdev-&gt;dev_addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __maybe_unused int owl_emac_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = dev_get_drvdata(dev);</div><div class='add'>+	struct owl_emac_priv *priv = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	disable_irq(netdev-&gt;irq);</div><div class='add'>+</div><div class='add'>+	if (netif_running(netdev)) {</div><div class='add'>+		owl_emac_disable(netdev, true);</div><div class='add'>+		netif_device_detach(netdev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	clk_bulk_disable_unprepare(OWL_EMAC_NCLKS, priv-&gt;clks);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __maybe_unused int owl_emac_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = dev_get_drvdata(dev);</div><div class='add'>+	struct owl_emac_priv *priv = netdev_priv(netdev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = clk_bulk_prepare_enable(OWL_EMAC_NCLKS, priv-&gt;clks);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (netif_running(netdev)) {</div><div class='add'>+		owl_emac_core_hw_reset(priv);</div><div class='add'>+		owl_emac_core_sw_reset(priv);</div><div class='add'>+</div><div class='add'>+		ret = owl_emac_enable(netdev, true);</div><div class='add'>+		if (ret) {</div><div class='add'>+			clk_bulk_disable_unprepare(OWL_EMAC_NCLKS, priv-&gt;clks);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		netif_device_attach(netdev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	enable_irq(netdev-&gt;irq);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void owl_emac_clk_disable_unprepare(void *data)</div><div class='add'>+{</div><div class='add'>+	struct owl_emac_priv *priv = data;</div><div class='add'>+</div><div class='add'>+	clk_bulk_disable_unprepare(OWL_EMAC_NCLKS, priv-&gt;clks);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int owl_emac_clk_set_rate(struct owl_emac_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = owl_emac_get_dev(priv);</div><div class='add'>+	unsigned long rate;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	switch (priv-&gt;phy_mode) {</div><div class='add'>+	case PHY_INTERFACE_MODE_RMII:</div><div class='add'>+		rate = 50000000;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case PHY_INTERFACE_MODE_SMII:</div><div class='add'>+		rate = 125000000;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		dev_err(dev, "unsupported phy interface mode %d\n",</div><div class='add'>+			priv-&gt;phy_mode);</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = clk_set_rate(priv-&gt;clks[OWL_EMAC_CLK_RMII].clk, rate);</div><div class='add'>+	if (ret)</div><div class='add'>+		dev_err(dev, "failed to set RMII clock rate: %d\n", ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int owl_emac_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	struct owl_emac_priv *priv;</div><div class='add'>+	int ret, i;</div><div class='add'>+</div><div class='add'>+	netdev = devm_alloc_etherdev(dev, sizeof(*priv));</div><div class='add'>+	if (!netdev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, netdev);</div><div class='add'>+	SET_NETDEV_DEV(netdev, dev);</div><div class='add'>+</div><div class='add'>+	priv = netdev_priv(netdev);</div><div class='add'>+	priv-&gt;netdev = netdev;</div><div class='add'>+	priv-&gt;msg_enable = netif_msg_init(-1, OWL_EMAC_DEFAULT_MSG_ENABLE);</div><div class='add'>+</div><div class='add'>+	ret = of_get_phy_mode(dev-&gt;of_node, &amp;priv-&gt;phy_mode);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "failed to get phy mode: %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "unsupported DMA mask\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = owl_emac_ring_alloc(dev, &amp;priv-&gt;rx_ring, OWL_EMAC_RX_RING_SIZE);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = owl_emac_ring_alloc(dev, &amp;priv-&gt;tx_ring, OWL_EMAC_TX_RING_SIZE);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	priv-&gt;base = devm_platform_ioremap_resource(pdev, 0);</div><div class='add'>+	if (IS_ERR(priv-&gt;base))</div><div class='add'>+		return PTR_ERR(priv-&gt;base);</div><div class='add'>+</div><div class='add'>+	netdev-&gt;irq = platform_get_irq(pdev, 0);</div><div class='add'>+	if (netdev-&gt;irq &lt; 0)</div><div class='add'>+		return netdev-&gt;irq;</div><div class='add'>+</div><div class='add'>+	ret = devm_request_irq(dev, netdev-&gt;irq, owl_emac_handle_irq,</div><div class='add'>+			       IRQF_SHARED, netdev-&gt;name, netdev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "failed to request irq: %d\n", netdev-&gt;irq);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; OWL_EMAC_NCLKS; i++)</div><div class='add'>+		priv-&gt;clks[i].id = owl_emac_clk_names[i];</div><div class='add'>+</div><div class='add'>+	ret = devm_clk_bulk_get(dev, OWL_EMAC_NCLKS, priv-&gt;clks);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = clk_bulk_prepare_enable(OWL_EMAC_NCLKS, priv-&gt;clks);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = devm_add_action_or_reset(dev, owl_emac_clk_disable_unprepare, priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = owl_emac_clk_set_rate(priv);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	priv-&gt;reset = devm_reset_control_get_exclusive(dev, NULL);</div><div class='add'>+	if (IS_ERR(priv-&gt;reset))</div><div class='add'>+		return dev_err_probe(dev, PTR_ERR(priv-&gt;reset),</div><div class='add'>+				     "failed to get reset control");</div><div class='add'>+</div><div class='add'>+	owl_emac_get_mac_addr(netdev);</div><div class='add'>+</div><div class='add'>+	owl_emac_core_hw_reset(priv);</div><div class='add'>+	owl_emac_mdio_clock_enable(priv);</div><div class='add'>+</div><div class='add'>+	ret = owl_emac_mdio_init(netdev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "failed to initialize MDIO bus\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = owl_emac_phy_init(netdev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "failed to initialize PHY\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	INIT_WORK(&amp;priv-&gt;mac_reset_task, owl_emac_reset_task);</div><div class='add'>+</div><div class='add'>+	netdev-&gt;min_mtu = OWL_EMAC_MTU_MIN;</div><div class='add'>+	netdev-&gt;max_mtu = OWL_EMAC_MTU_MAX;</div><div class='add'>+	netdev-&gt;watchdog_timeo = OWL_EMAC_TX_TIMEOUT;</div><div class='add'>+	netdev-&gt;netdev_ops = &amp;owl_emac_netdev_ops;</div><div class='add'>+	netdev-&gt;ethtool_ops = &amp;owl_emac_ethtool_ops;</div><div class='add'>+	netif_napi_add(netdev, &amp;priv-&gt;napi, owl_emac_poll);</div><div class='add'>+</div><div class='add'>+	ret = devm_register_netdev(dev, netdev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netif_napi_del(&amp;priv-&gt;napi);</div><div class='add'>+		phy_disconnect(netdev-&gt;phydev);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void owl_emac_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct owl_emac_priv *priv = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	netif_napi_del(&amp;priv-&gt;napi);</div><div class='add'>+	phy_disconnect(priv-&gt;netdev-&gt;phydev);</div><div class='add'>+	cancel_work_sync(&amp;priv-&gt;mac_reset_task);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id owl_emac_of_match[] = {</div><div class='add'>+	{ .compatible = "actions,owl-emac", },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, owl_emac_of_match);</div><div class='add'>+</div><div class='add'>+static SIMPLE_DEV_PM_OPS(owl_emac_pm_ops,</div><div class='add'>+			 owl_emac_suspend, owl_emac_resume);</div><div class='add'>+</div><div class='add'>+static struct platform_driver owl_emac_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = OWL_EMAC_DRVNAME,</div><div class='add'>+		.of_match_table = owl_emac_of_match,</div><div class='add'>+		.pm = &amp;owl_emac_pm_ops,</div><div class='add'>+	},</div><div class='add'>+	.probe = owl_emac_probe,</div><div class='add'>+	.remove = owl_emac_remove,</div><div class='add'>+};</div><div class='add'>+module_platform_driver(owl_emac_driver);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("Actions Semi Owl SoCs Ethernet MAC Driver");</div><div class='add'>+MODULE_AUTHOR("Actions Semi Inc.");</div><div class='add'>+MODULE_AUTHOR("Cristian Ciocaltea &lt;cristian.ciocaltea@gmail.com&gt;");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/actions/owl-emac.h b/drivers/net/ethernet/actions/owl-emac.h<br/>new file mode 100644<br/>index 000000000000..9eb0d1a30242<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/actions/owl-emac.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/actions/owl-emac.h</a></div><div class='hunk'>@@ -0,0 +1,280 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+/*</div><div class='add'>+ * Actions Semi Owl SoCs Ethernet MAC driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2012 Actions Semi Inc.</div><div class='add'>+ * Copyright (c) 2021 Cristian Ciocaltea &lt;cristian.ciocaltea@gmail.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __OWL_EMAC_H__</div><div class='add'>+#define __OWL_EMAC_H__</div><div class='add'>+</div><div class='add'>+#define OWL_EMAC_DRVNAME			"owl-emac"</div><div class='add'>+</div><div class='add'>+#define OWL_EMAC_POLL_DELAY_USEC		5</div><div class='add'>+#define OWL_EMAC_MDIO_POLL_TIMEOUT_USEC		1000</div><div class='add'>+#define OWL_EMAC_RESET_POLL_TIMEOUT_USEC	2000</div><div class='add'>+#define OWL_EMAC_TX_TIMEOUT			(2 * HZ)</div><div class='add'>+</div><div class='add'>+#define OWL_EMAC_MTU_MIN			ETH_MIN_MTU</div><div class='add'>+#define OWL_EMAC_MTU_MAX			ETH_DATA_LEN</div><div class='add'>+#define OWL_EMAC_RX_FRAME_MAX_LEN		(ETH_FRAME_LEN + ETH_FCS_LEN)</div><div class='add'>+#define OWL_EMAC_SKB_ALIGN			4</div><div class='add'>+#define OWL_EMAC_SKB_RESERVE			18</div><div class='add'>+</div><div class='add'>+#define OWL_EMAC_MAX_MULTICAST_ADDRS		14</div><div class='add'>+#define OWL_EMAC_SETUP_FRAME_LEN		192</div><div class='add'>+</div><div class='add'>+#define OWL_EMAC_RX_RING_SIZE			64</div><div class='add'>+#define OWL_EMAC_TX_RING_SIZE			32</div><div class='add'>+</div><div class='add'>+/* Bus mode register */</div><div class='add'>+#define OWL_EMAC_REG_MAC_CSR0			0x0000</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR0_SWR		BIT(0)	/* Software reset */</div><div class='add'>+</div><div class='add'>+/* Transmit/receive poll demand registers */</div><div class='add'>+#define OWL_EMAC_REG_MAC_CSR1			0x0008</div><div class='add'>+#define OWL_EMAC_VAL_MAC_CSR1_TPD		0x01</div><div class='add'>+#define OWL_EMAC_REG_MAC_CSR2			0x0010</div><div class='add'>+#define OWL_EMAC_VAL_MAC_CSR2_RPD		0x01</div><div class='add'>+</div><div class='add'>+/* Receive/transmit descriptor list base address registers */</div><div class='add'>+#define OWL_EMAC_REG_MAC_CSR3			0x0018</div><div class='add'>+#define OWL_EMAC_REG_MAC_CSR4			0x0020</div><div class='add'>+</div><div class='add'>+/* Status register */</div><div class='add'>+#define OWL_EMAC_REG_MAC_CSR5			0x0028</div><div class='add'>+#define OWL_EMAC_MSK_MAC_CSR5_TS		GENMASK(22, 20)	/* Transmit process state */</div><div class='add'>+#define OWL_EMAC_OFF_MAC_CSR5_TS		20</div><div class='add'>+#define OWL_EMAC_VAL_MAC_CSR5_TS_DATA		0x03	/* Transferring data HOST -&gt; FIFO */</div><div class='add'>+#define OWL_EMAC_VAL_MAC_CSR5_TS_CDES		0x07	/* Closing transmit descriptor */</div><div class='add'>+#define OWL_EMAC_MSK_MAC_CSR5_RS		GENMASK(19, 17)	/* Receive process state */</div><div class='add'>+#define OWL_EMAC_OFF_MAC_CSR5_RS		17</div><div class='add'>+#define OWL_EMAC_VAL_MAC_CSR5_RS_FDES		0x01	/* Fetching receive descriptor */</div><div class='add'>+#define OWL_EMAC_VAL_MAC_CSR5_RS_CDES		0x05	/* Closing receive descriptor */</div><div class='add'>+#define OWL_EMAC_VAL_MAC_CSR5_RS_DATA		0x07	/* Transferring data FIFO -&gt; HOST */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR5_NIS		BIT(16)	/* Normal interrupt summary */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR5_AIS		BIT(15)	/* Abnormal interrupt summary */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR5_ERI		BIT(14)	/* Early receive interrupt */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR5_GTE		BIT(11)	/* General-purpose timer expiration */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR5_ETI		BIT(10)	/* Early transmit interrupt */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR5_RPS		BIT(8)	/* Receive process stopped */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR5_RU		BIT(7)	/* Receive buffer unavailable */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR5_RI		BIT(6)	/* Receive interrupt */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR5_UNF		BIT(5)	/* Transmit underflow */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR5_LCIS		BIT(4)	/* Link change status */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR5_LCIQ		BIT(3)	/* Link change interrupt */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR5_TU		BIT(2)	/* Transmit buffer unavailable */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR5_TPS		BIT(1)	/* Transmit process stopped */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR5_TI		BIT(0)	/* Transmit interrupt */</div><div class='add'>+</div><div class='add'>+/* Operation mode register */</div><div class='add'>+#define OWL_EMAC_REG_MAC_CSR6			0x0030</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR6_RA		BIT(30)	/* Receive all */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR6_TTM		BIT(22)	/* Transmit threshold mode */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR6_SF		BIT(21)	/* Store and forward */</div><div class='add'>+#define OWL_EMAC_MSK_MAC_CSR6_SPEED		GENMASK(17, 16)	/* Eth speed selection */</div><div class='add'>+#define OWL_EMAC_OFF_MAC_CSR6_SPEED		16</div><div class='add'>+#define OWL_EMAC_VAL_MAC_CSR6_SPEED_100M	0x00</div><div class='add'>+#define OWL_EMAC_VAL_MAC_CSR6_SPEED_10M		0x02</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR6_ST		BIT(13)	/* Start/stop transmit command */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR6_LP		BIT(10)	/* Loopback mode */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR6_FD		BIT(9)	/* Full duplex mode */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR6_PM		BIT(7)	/* Pass all multicast */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR6_PR		BIT(6)	/* Promiscuous mode */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR6_IF		BIT(4)	/* Inverse filtering */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR6_PB		BIT(3)	/* Pass bad frames */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR6_HO		BIT(2)	/* Hash only filtering mode */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR6_SR		BIT(1)	/* Start/stop receive command */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR6_HP		BIT(0)	/* Hash/perfect receive filtering mode */</div><div class='add'>+#define OWL_EMAC_MSK_MAC_CSR6_STSR	       (OWL_EMAC_BIT_MAC_CSR6_ST | \</div><div class='add'>+						OWL_EMAC_BIT_MAC_CSR6_SR)</div><div class='add'>+</div><div class='add'>+/* Interrupt enable register */</div><div class='add'>+#define OWL_EMAC_REG_MAC_CSR7			0x0038</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR7_NIE		BIT(16)	/* Normal interrupt summary enable */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR7_AIE		BIT(15)	/* Abnormal interrupt summary enable */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR7_ERE		BIT(14)	/* Early receive interrupt enable */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR7_GTE		BIT(11)	/* General-purpose timer overflow */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR7_ETE		BIT(10)	/* Early transmit interrupt enable */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR7_RSE		BIT(8)	/* Receive stopped enable */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR7_RUE		BIT(7)	/* Receive buffer unavailable enable */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR7_RIE		BIT(6)	/* Receive interrupt enable */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR7_UNE		BIT(5)	/* Underflow interrupt enable */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR7_TUE		BIT(2)	/* Transmit buffer unavailable enable */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR7_TSE		BIT(1)	/* Transmit stopped enable */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR7_TIE		BIT(0)	/* Transmit interrupt enable */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR7_ALL_NOT_TUE      (OWL_EMAC_BIT_MAC_CSR7_ERE | \</div><div class='add'>+						OWL_EMAC_BIT_MAC_CSR7_GTE | \</div><div class='add'>+						OWL_EMAC_BIT_MAC_CSR7_ETE | \</div><div class='add'>+						OWL_EMAC_BIT_MAC_CSR7_RSE | \</div><div class='add'>+						OWL_EMAC_BIT_MAC_CSR7_RUE | \</div><div class='add'>+						OWL_EMAC_BIT_MAC_CSR7_RIE | \</div><div class='add'>+						OWL_EMAC_BIT_MAC_CSR7_UNE | \</div><div class='add'>+						OWL_EMAC_BIT_MAC_CSR7_TSE | \</div><div class='add'>+						OWL_EMAC_BIT_MAC_CSR7_TIE)</div><div class='add'>+</div><div class='add'>+/* Missed frames and overflow counter register */</div><div class='add'>+#define OWL_EMAC_REG_MAC_CSR8			0x0040</div><div class='add'>+/* MII management and serial ROM register */</div><div class='add'>+#define OWL_EMAC_REG_MAC_CSR9			0x0048</div><div class='add'>+</div><div class='add'>+/* MII serial management register */</div><div class='add'>+#define OWL_EMAC_REG_MAC_CSR10			0x0050</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR10_SB		BIT(31)	/* Start transfer or busy */</div><div class='add'>+#define OWL_EMAC_MSK_MAC_CSR10_CLKDIV		GENMASK(30, 28)	/* Clock divider */</div><div class='add'>+#define OWL_EMAC_OFF_MAC_CSR10_CLKDIV		28</div><div class='add'>+#define OWL_EMAC_VAL_MAC_CSR10_CLKDIV_128	0x04</div><div class='add'>+#define OWL_EMAC_VAL_MAC_CSR10_OPCODE_WR	0x01	/* Register write command */</div><div class='add'>+#define OWL_EMAC_OFF_MAC_CSR10_OPCODE		26	/* Operation mode */</div><div class='add'>+#define OWL_EMAC_VAL_MAC_CSR10_OPCODE_DCG	0x00	/* Disable clock generation */</div><div class='add'>+#define OWL_EMAC_VAL_MAC_CSR10_OPCODE_WR	0x01	/* Register write command */</div><div class='add'>+#define OWL_EMAC_VAL_MAC_CSR10_OPCODE_RD	0x02	/* Register read command */</div><div class='add'>+#define OWL_EMAC_VAL_MAC_CSR10_OPCODE_CDS	0x03	/* Clock divider set */</div><div class='add'>+#define OWL_EMAC_MSK_MAC_CSR10_PHYADD		GENMASK(25, 21)	/* Physical layer address */</div><div class='add'>+#define OWL_EMAC_OFF_MAC_CSR10_PHYADD		21</div><div class='add'>+#define OWL_EMAC_MSK_MAC_CSR10_REGADD		GENMASK(20, 16)	/* Register address */</div><div class='add'>+#define OWL_EMAC_OFF_MAC_CSR10_REGADD		16</div><div class='add'>+#define OWL_EMAC_MSK_MAC_CSR10_DATA		GENMASK(15, 0)	/* Register data */</div><div class='add'>+</div><div class='add'>+/* General-purpose timer and interrupt mitigation control register */</div><div class='add'>+#define OWL_EMAC_REG_MAC_CSR11			0x0058</div><div class='add'>+#define OWL_EMAC_OFF_MAC_CSR11_TT		27	/* Transmit timer */</div><div class='add'>+#define OWL_EMAC_OFF_MAC_CSR11_NTP		24	/* No. of transmit packets */</div><div class='add'>+#define OWL_EMAC_OFF_MAC_CSR11_RT		20	/* Receive timer */</div><div class='add'>+#define OWL_EMAC_OFF_MAC_CSR11_NRP		17	/* No. of receive packets */</div><div class='add'>+</div><div class='add'>+/* MAC address low/high registers */</div><div class='add'>+#define OWL_EMAC_REG_MAC_CSR16			0x0080</div><div class='add'>+#define OWL_EMAC_REG_MAC_CSR17			0x0088</div><div class='add'>+</div><div class='add'>+/* Pause time &amp; cache thresholds register */</div><div class='add'>+#define OWL_EMAC_REG_MAC_CSR18			0x0090</div><div class='add'>+#define OWL_EMAC_OFF_MAC_CSR18_CPTL		24	/* Cache pause threshold level */</div><div class='add'>+#define OWL_EMAC_OFF_MAC_CSR18_CRTL		16	/* Cache restart threshold level */</div><div class='add'>+#define OWL_EMAC_OFF_MAC_CSR18_PQT		0	/* Flow control pause quanta time */</div><div class='add'>+</div><div class='add'>+/* FIFO pause &amp; restart threshold register */</div><div class='add'>+#define OWL_EMAC_REG_MAC_CSR19			0x0098</div><div class='add'>+#define OWL_EMAC_OFF_MAC_CSR19_FPTL		16	/* FIFO pause threshold level */</div><div class='add'>+#define OWL_EMAC_OFF_MAC_CSR19_FRTL		0	/* FIFO restart threshold level */</div><div class='add'>+</div><div class='add'>+/* Flow control setup &amp; status register */</div><div class='add'>+#define OWL_EMAC_REG_MAC_CSR20			0x00A0</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR20_FCE		BIT(31)	/* Flow Control Enable */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR20_TUE		BIT(30)	/* Transmit Un-pause frames Enable */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR20_TPE		BIT(29)	/* Transmit Pause frames Enable */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR20_RPE		BIT(28)	/* Receive Pause frames Enable */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CSR20_BPE		BIT(27)	/* Back pressure (half-duplex) Enable */</div><div class='add'>+</div><div class='add'>+/* MII control register */</div><div class='add'>+#define OWL_EMAC_REG_MAC_CTRL			0x00B0</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CTRL_RRSB		BIT(8)	/* RMII_REFCLK select bit */</div><div class='add'>+#define OWL_EMAC_OFF_MAC_CTRL_SSDC		4	/* SMII SYNC delay cycle */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CTRL_RCPS		BIT(1)	/* REF_CLK phase select */</div><div class='add'>+#define OWL_EMAC_BIT_MAC_CTRL_RSIS		BIT(0)	/* RMII/SMII interface select */</div><div class='add'>+</div><div class='add'>+/* Receive descriptor status field */</div><div class='add'>+#define OWL_EMAC_BIT_RDES0_OWN			BIT(31)	/* Ownership bit */</div><div class='add'>+#define OWL_EMAC_BIT_RDES0_FF			BIT(30)	/* Filtering fail */</div><div class='add'>+#define OWL_EMAC_MSK_RDES0_FL			GENMASK(29, 16)	/* Frame length */</div><div class='add'>+#define OWL_EMAC_OFF_RDES0_FL			16</div><div class='add'>+#define OWL_EMAC_BIT_RDES0_ES			BIT(15)	/* Error summary */</div><div class='add'>+#define OWL_EMAC_BIT_RDES0_DE			BIT(14)	/* Descriptor error */</div><div class='add'>+#define OWL_EMAC_BIT_RDES0_RF			BIT(11)	/* Runt frame */</div><div class='add'>+#define OWL_EMAC_BIT_RDES0_MF			BIT(10)	/* Multicast frame */</div><div class='add'>+#define OWL_EMAC_BIT_RDES0_FS			BIT(9)	/* First descriptor */</div><div class='add'>+#define OWL_EMAC_BIT_RDES0_LS			BIT(8)	/* Last descriptor */</div><div class='add'>+#define OWL_EMAC_BIT_RDES0_TL			BIT(7)	/* Frame too long */</div><div class='add'>+#define OWL_EMAC_BIT_RDES0_CS			BIT(6)	/* Collision seen */</div><div class='add'>+#define OWL_EMAC_BIT_RDES0_FT			BIT(5)	/* Frame type */</div><div class='add'>+#define OWL_EMAC_BIT_RDES0_RE			BIT(3)	/* Report on MII error */</div><div class='add'>+#define OWL_EMAC_BIT_RDES0_DB			BIT(2)	/* Dribbling bit */</div><div class='add'>+#define OWL_EMAC_BIT_RDES0_CE			BIT(1)	/* CRC error */</div><div class='add'>+#define OWL_EMAC_BIT_RDES0_ZERO			BIT(0)	/* Legal frame length indicator */</div><div class='add'>+</div><div class='add'>+/* Receive descriptor control and count field */</div><div class='add'>+#define OWL_EMAC_BIT_RDES1_RER			BIT(25)	/* Receive end of ring */</div><div class='add'>+#define OWL_EMAC_MSK_RDES1_RBS1			GENMASK(10, 0) /* Buffer 1 size */</div><div class='add'>+</div><div class='add'>+/* Transmit descriptor status field */</div><div class='add'>+#define OWL_EMAC_BIT_TDES0_OWN			BIT(31)	/* Ownership bit */</div><div class='add'>+#define OWL_EMAC_BIT_TDES0_ES			BIT(15)	/* Error summary */</div><div class='add'>+#define OWL_EMAC_BIT_TDES0_LO			BIT(11)	/* Loss of carrier */</div><div class='add'>+#define OWL_EMAC_BIT_TDES0_NC			BIT(10)	/* No carrier */</div><div class='add'>+#define OWL_EMAC_BIT_TDES0_LC			BIT(9)	/* Late collision */</div><div class='add'>+#define OWL_EMAC_BIT_TDES0_EC			BIT(8)	/* Excessive collisions */</div><div class='add'>+#define OWL_EMAC_MSK_TDES0_CC			GENMASK(6, 3) /* Collision count */</div><div class='add'>+#define OWL_EMAC_BIT_TDES0_UF			BIT(1)	/* Underflow error */</div><div class='add'>+#define OWL_EMAC_BIT_TDES0_DE			BIT(0)	/* Deferred */</div><div class='add'>+</div><div class='add'>+/* Transmit descriptor control and count field */</div><div class='add'>+#define OWL_EMAC_BIT_TDES1_IC			BIT(31)	/* Interrupt on completion */</div><div class='add'>+#define OWL_EMAC_BIT_TDES1_LS			BIT(30)	/* Last descriptor */</div><div class='add'>+#define OWL_EMAC_BIT_TDES1_FS			BIT(29)	/* First descriptor */</div><div class='add'>+#define OWL_EMAC_BIT_TDES1_FT1			BIT(28)	/* Filtering type */</div><div class='add'>+#define OWL_EMAC_BIT_TDES1_SET			BIT(27)	/* Setup packet */</div><div class='add'>+#define OWL_EMAC_BIT_TDES1_AC			BIT(26)	/* Add CRC disable */</div><div class='add'>+#define OWL_EMAC_BIT_TDES1_TER			BIT(25)	/* Transmit end of ring */</div><div class='add'>+#define OWL_EMAC_BIT_TDES1_DPD			BIT(23)	/* Disabled padding */</div><div class='add'>+#define OWL_EMAC_BIT_TDES1_FT0			BIT(22)	/* Filtering type */</div><div class='add'>+#define OWL_EMAC_MSK_TDES1_TBS1			GENMASK(10, 0) /* Buffer 1 size */</div><div class='add'>+</div><div class='add'>+static const char *const owl_emac_clk_names[] = { "eth", "rmii" };</div><div class='add'>+#define OWL_EMAC_NCLKS ARRAY_SIZE(owl_emac_clk_names)</div><div class='add'>+</div><div class='add'>+enum owl_emac_clk_map {</div><div class='add'>+	OWL_EMAC_CLK_ETH = 0,</div><div class='add'>+	OWL_EMAC_CLK_RMII</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct owl_emac_addr_list {</div><div class='add'>+	u8 addrs[OWL_EMAC_MAX_MULTICAST_ADDRS][ETH_ALEN];</div><div class='add'>+	int count;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* TX/RX descriptors */</div><div class='add'>+struct owl_emac_ring_desc {</div><div class='add'>+	u32 status;</div><div class='add'>+	u32 control;</div><div class='add'>+	u32 buf_addr;</div><div class='add'>+	u32 reserved;		/* 2nd buffer address is not used */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct owl_emac_ring {</div><div class='add'>+	struct owl_emac_ring_desc *descs;</div><div class='add'>+	dma_addr_t descs_dma;</div><div class='add'>+	struct sk_buff **skbs;</div><div class='add'>+	dma_addr_t *skbs_dma;</div><div class='add'>+	unsigned int size;</div><div class='add'>+	unsigned int head;</div><div class='add'>+	unsigned int tail;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct owl_emac_priv {</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	void __iomem *base;</div><div class='add'>+</div><div class='add'>+	struct clk_bulk_data clks[OWL_EMAC_NCLKS];</div><div class='add'>+	struct reset_control *reset;</div><div class='add'>+</div><div class='add'>+	struct owl_emac_ring rx_ring;</div><div class='add'>+	struct owl_emac_ring tx_ring;</div><div class='add'>+</div><div class='add'>+	struct mii_bus *mii;</div><div class='add'>+	struct napi_struct napi;</div><div class='add'>+</div><div class='add'>+	phy_interface_t phy_mode;</div><div class='add'>+	unsigned int link;</div><div class='add'>+	int speed;</div><div class='add'>+	int duplex;</div><div class='add'>+	int pause;</div><div class='add'>+	struct owl_emac_addr_list mcaddr_list;</div><div class='add'>+</div><div class='add'>+	struct work_struct mac_reset_task;</div><div class='add'>+</div><div class='add'>+	u32 msg_enable;		/* Debug message level */</div><div class='add'>+	spinlock_t lock;	/* Sync concurrent ring access */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif /* __OWL_EMAC_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/adaptec/Kconfig b/drivers/net/ethernet/adaptec/Kconfig<br/>index 822cffb4174c..c96edc2e582f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/adaptec/Kconfig?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/adaptec/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/adaptec/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/adaptec/Kconfig</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> #</div><div class='ctx'> # Adaptec network device configuration</div><div class='ctx'> #</div><div class='hunk'>@@ -6,7 +7,7 @@ config NET_VENDOR_ADAPTEC</div><div class='ctx'> 	bool "Adaptec devices"</div><div class='ctx'> 	default y</div><div class='ctx'> 	depends on PCI</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  If you have a network (Ethernet) card belonging to this class, say Y.</div><div class='ctx'> </div><div class='ctx'> 	  Note that the answer to this question doesn't directly affect the</div><div class='hunk'>@@ -21,7 +22,7 @@ config ADAPTEC_STARFIRE</div><div class='ctx'> 	depends on PCI</div><div class='ctx'> 	select CRC32</div><div class='ctx'> 	select MII</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  Say Y here if you have an Adaptec Starfire (or DuraLAN) PCI network</div><div class='ctx'> 	  adapter. The DuraLAN chip is used on the 64 bit PCI boards from</div><div class='ctx'> 	  Adaptec e.g. the ANA-6922A. The older 32 bit boards use the tulip</div><div class='head'>diff --git a/drivers/net/ethernet/adaptec/Makefile b/drivers/net/ethernet/adaptec/Makefile<br/>index 6c07b758ac0a..d84138c8a9ea 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/adaptec/Makefile?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/adaptec/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/adaptec/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/adaptec/Makefile</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> #</div><div class='ctx'> # Makefile for the Adaptec network device drivers.</div><div class='ctx'> #</div><div class='head'>diff --git a/drivers/net/ethernet/adaptec/starfire.c b/drivers/net/ethernet/adaptec/starfire.c<br/>index ac7288240d55..e1b8794b14c9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/adaptec/starfire.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/adaptec/starfire.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/adaptec/starfire.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/adaptec/starfire.c</a></div><div class='hunk'>@@ -27,8 +27,6 @@</div><div class='ctx'> */</div><div class='ctx'> </div><div class='ctx'> #define DRV_NAME	"starfire"</div><div class='del'>-#define DRV_VERSION	"2.1"</div><div class='del'>-#define DRV_RELDATE	"July  6, 2008"</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='hunk'>@@ -45,7 +43,7 @@</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/firmware.h&gt;</div><div class='ctx'> #include &lt;asm/processor.h&gt;		/* Processor type for cache alignment. */</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -66,7 +64,7 @@</div><div class='ctx'>  */</div><div class='ctx'> #define ZEROCOPY</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)</div><div class='add'>+#if IS_ENABLED(CONFIG_VLAN_8021Q)</div><div class='ctx'> #define VLAN_SUPPORT</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -165,15 +163,9 @@ static int rx_copybreak /* = 0 */;</div><div class='ctx'> #define FIRMWARE_RX	"adaptec/starfire_rx.bin"</div><div class='ctx'> #define FIRMWARE_TX	"adaptec/starfire_tx.bin"</div><div class='ctx'> </div><div class='del'>-/* These identify the driver base version and may not be removed. */</div><div class='del'>-static const char version[] =</div><div class='del'>-KERN_INFO "starfire.c:v1.03 7/26/2000  Written by Donald Becker &lt;becker@scyld.com&gt;\n"</div><div class='del'>-" (unofficial 2.2/2.4 kernel port, version " DRV_VERSION ", " DRV_RELDATE ")\n";</div><div class='del'>-</div><div class='ctx'> MODULE_AUTHOR("Donald Becker &lt;becker@scyld.com&gt;");</div><div class='ctx'> MODULE_DESCRIPTION("Adaptec Starfire Ethernet driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_VERSION(DRV_VERSION);</div><div class='ctx'> MODULE_FIRMWARE(FIRMWARE_RX);</div><div class='ctx'> MODULE_FIRMWARE(FIRMWARE_TX);</div><div class='ctx'> </div><div class='hunk'>@@ -449,14 +441,6 @@ enum rx_desc_bits {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Completion queue entry. */</div><div class='del'>-struct short_rx_done_desc {</div><div class='del'>-	__le32 status;			/* Low 16 bits is length. */</div><div class='del'>-};</div><div class='del'>-struct basic_rx_done_desc {</div><div class='del'>-	__le32 status;			/* Low 16 bits is length. */</div><div class='del'>-	__le16 vlanid;</div><div class='del'>-	__le16 status2;</div><div class='del'>-};</div><div class='ctx'> struct csum_rx_done_desc {</div><div class='ctx'> 	__le32 status;			/* Low 16 bits is length. */</div><div class='ctx'> 	__le16 csum;			/* Partial checksum */</div><div class='hunk'>@@ -576,7 +560,7 @@ static int	mdio_read(struct net_device *dev, int phy_id, int location);</div><div class='ctx'> static void	mdio_write(struct net_device *dev, int phy_id, int location, int value);</div><div class='ctx'> static int	netdev_open(struct net_device *dev);</div><div class='ctx'> static void	check_duplex(struct net_device *dev);</div><div class='del'>-static void	tx_timeout(struct net_device *dev);</div><div class='add'>+static void	tx_timeout(struct net_device *dev, unsigned int txqueue);</div><div class='ctx'> static void	init_ring(struct net_device *dev);</div><div class='ctx'> static netdev_tx_t start_tx(struct sk_buff *skb, struct net_device *dev);</div><div class='ctx'> static irqreturn_t intr_handler(int irq, void *dev_instance);</div><div class='hunk'>@@ -633,8 +617,7 @@ static const struct net_device_ops netdev_ops = {</div><div class='ctx'> 	.ndo_tx_timeout		= tx_timeout,</div><div class='ctx'> 	.ndo_get_stats		= get_stats,</div><div class='ctx'> 	.ndo_set_rx_mode	= set_rx_mode,</div><div class='del'>-	.ndo_do_ioctl		= netdev_ioctl,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='add'>+	.ndo_eth_ioctl		= netdev_ioctl,</div><div class='ctx'> 	.ndo_set_mac_address	= eth_mac_addr,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> #ifdef VLAN_SUPPORT</div><div class='hunk'>@@ -650,18 +633,12 @@ static int starfire_init_one(struct pci_dev *pdev,</div><div class='ctx'> 	struct netdev_private *np;</div><div class='ctx'> 	int i, irq, chip_idx = ent-&gt;driver_data;</div><div class='ctx'> 	struct net_device *dev;</div><div class='add'>+	u8 addr[ETH_ALEN];</div><div class='ctx'> 	long ioaddr;</div><div class='ctx'> 	void __iomem *base;</div><div class='ctx'> 	int drv_flags, io_size;</div><div class='ctx'> 	int boguscnt;</div><div class='ctx'> </div><div class='del'>-/* when built into the kernel, we only print version if device is found */</div><div class='del'>-#ifndef MODULE</div><div class='del'>-	static int printed_version;</div><div class='del'>-	if (!printed_version++)</div><div class='del'>-		printk(version);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='ctx'> 	if (pci_enable_device (pdev))</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> </div><div class='hunk'>@@ -712,7 +689,8 @@ static int starfire_init_one(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	/* Serial EEPROM reads are hidden by the hardware. */</div><div class='ctx'> 	for (i = 0; i &lt; 6; i++)</div><div class='del'>-		dev-&gt;dev_addr[i] = readb(base + EEPROMCtrl + 20 - i);</div><div class='add'>+		addr[i] = readb(base + EEPROMCtrl + 20 - i);</div><div class='add'>+	eth_hw_addr_set(dev, addr);</div><div class='ctx'> </div><div class='ctx'> #if ! defined(final_version) /* Dump the EEPROM contents during development. */</div><div class='ctx'> 	if (debug &gt; 4)</div><div class='hunk'>@@ -786,7 +764,7 @@ static int starfire_init_one(struct pci_dev *pdev,</div><div class='ctx'> 	dev-&gt;watchdog_timeo = TX_TIMEOUT;</div><div class='ctx'> 	dev-&gt;ethtool_ops = &amp;ethtool_ops;</div><div class='ctx'> </div><div class='del'>-	netif_napi_add(dev, &amp;np-&gt;napi, netdev_poll, max_interrupt_work);</div><div class='add'>+	netif_napi_add_weight(dev, &amp;np-&gt;napi, netdev_poll, max_interrupt_work);</div><div class='ctx'> </div><div class='ctx'> 	if (mtu)</div><div class='ctx'> 		dev-&gt;mtu = mtu;</div><div class='hunk'>@@ -803,7 +781,7 @@ static int starfire_init_one(struct pci_dev *pdev,</div><div class='ctx'> 		int mii_status;</div><div class='ctx'> 		for (phy = 0; phy &lt; 32 &amp;&amp; phy_idx &lt; PHY_CNT; phy++) {</div><div class='ctx'> 			mdio_write(dev, phy, MII_BMCR, BMCR_RESET);</div><div class='del'>-			mdelay(100);</div><div class='add'>+			msleep(100);</div><div class='ctx'> 			boguscnt = 1000;</div><div class='ctx'> 			while (--boguscnt &gt; 0)</div><div class='ctx'> 				if ((mdio_read(dev, phy, MII_BMCR) &amp; BMCR_RESET) == 0)</div><div class='hunk'>@@ -902,7 +880,9 @@ static int netdev_open(struct net_device *dev)</div><div class='ctx'> 		tx_ring_size = ((sizeof(starfire_tx_desc) * TX_RING_SIZE + QUEUE_ALIGN - 1) / QUEUE_ALIGN) * QUEUE_ALIGN;</div><div class='ctx'> 		rx_ring_size = sizeof(struct starfire_rx_desc) * RX_RING_SIZE;</div><div class='ctx'> 		np-&gt;queue_mem_size = tx_done_q_size + rx_done_q_size + tx_ring_size + rx_ring_size;</div><div class='del'>-		np-&gt;queue_mem = pci_alloc_consistent(np-&gt;pci_dev, np-&gt;queue_mem_size, &amp;np-&gt;queue_mem_dma);</div><div class='add'>+		np-&gt;queue_mem = dma_alloc_coherent(&amp;np-&gt;pci_dev-&gt;dev,</div><div class='add'>+						   np-&gt;queue_mem_size,</div><div class='add'>+						   &amp;np-&gt;queue_mem_dma, GFP_ATOMIC);</div><div class='ctx'> 		if (np-&gt;queue_mem == NULL) {</div><div class='ctx'> 			free_irq(irq, dev);</div><div class='ctx'> 			return -ENOMEM;</div><div class='hunk'>@@ -969,7 +949,7 @@ static int netdev_open(struct net_device *dev)</div><div class='ctx'> 	writew(0, ioaddr + PerfFilterTable + 4);</div><div class='ctx'> 	writew(0, ioaddr + PerfFilterTable + 8);</div><div class='ctx'> 	for (i = 1; i &lt; 16; i++) {</div><div class='del'>-		__be16 *eaddrs = (__be16 *)dev-&gt;dev_addr;</div><div class='add'>+		const __be16 *eaddrs = (const __be16 *)dev-&gt;dev_addr;</div><div class='ctx'> 		void __iomem *setup_frm = ioaddr + PerfFilterTable + i * 16;</div><div class='ctx'> 		writew(be16_to_cpu(eaddrs[2]), setup_frm); setup_frm += 4;</div><div class='ctx'> 		writew(be16_to_cpu(eaddrs[1]), setup_frm); setup_frm += 4;</div><div class='hunk'>@@ -1106,7 +1086,7 @@ static void check_duplex(struct net_device *dev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-static void tx_timeout(struct net_device *dev)</div><div class='add'>+static void tx_timeout(struct net_device *dev, unsigned int txqueue)</div><div class='ctx'> {</div><div class='ctx'> 	struct netdev_private *np = netdev_priv(dev);</div><div class='ctx'> 	void __iomem *ioaddr = np-&gt;base;</div><div class='hunk'>@@ -1129,7 +1109,7 @@ static void tx_timeout(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	/* Trigger an immediate transmit demand. */</div><div class='ctx'> </div><div class='del'>-	dev-&gt;trans_start = jiffies; /* prevent tx timeout */</div><div class='add'>+	netif_trans_update(dev); /* prevent tx timeout */</div><div class='ctx'> 	dev-&gt;stats.tx_errors++;</div><div class='ctx'> 	netif_wake_queue(dev);</div><div class='ctx'> }</div><div class='hunk'>@@ -1152,7 +1132,15 @@ static void init_ring(struct net_device *dev)</div><div class='ctx'> 		np-&gt;rx_info[i].skb = skb;</div><div class='ctx'> 		if (skb == NULL)</div><div class='ctx'> 			break;</div><div class='del'>-		np-&gt;rx_info[i].mapping = pci_map_single(np-&gt;pci_dev, skb-&gt;data, np-&gt;rx_buf_sz, PCI_DMA_FROMDEVICE);</div><div class='add'>+		np-&gt;rx_info[i].mapping = dma_map_single(&amp;np-&gt;pci_dev-&gt;dev,</div><div class='add'>+							skb-&gt;data,</div><div class='add'>+							np-&gt;rx_buf_sz,</div><div class='add'>+							DMA_FROM_DEVICE);</div><div class='add'>+		if (dma_mapping_error(&amp;np-&gt;pci_dev-&gt;dev, np-&gt;rx_info[i].mapping)) {</div><div class='add'>+			dev_kfree_skb(skb);</div><div class='add'>+			np-&gt;rx_info[i].skb = NULL;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='ctx'> 		/* Grrr, we cannot offset to correctly align the IP header. */</div><div class='ctx'> 		np-&gt;rx_ring[i].rxaddr = cpu_to_dma(np-&gt;rx_info[i].mapping | RxDescValid);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1183,8 +1171,9 @@ static netdev_tx_t start_tx(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct netdev_private *np = netdev_priv(dev);</div><div class='ctx'> 	unsigned int entry;</div><div class='add'>+	unsigned int prev_tx;</div><div class='ctx'> 	u32 status;</div><div class='del'>-	int i;</div><div class='add'>+	int i, j;</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * be cautious here, wrapping the queue has weird semantics</div><div class='hunk'>@@ -1202,6 +1191,7 @@ static netdev_tx_t start_tx(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> #endif /* ZEROCOPY &amp;&amp; HAS_BROKEN_FIRMWARE */</div><div class='ctx'> </div><div class='add'>+	prev_tx = np-&gt;cur_tx;</div><div class='ctx'> 	entry = np-&gt;cur_tx % TX_RING_SIZE;</div><div class='ctx'> 	for (i = 0; i &lt; skb_num_frags(skb); i++) {</div><div class='ctx'> 		int wrap_ring = 0;</div><div class='hunk'>@@ -1225,15 +1215,21 @@ static netdev_tx_t start_tx(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 			status |= skb_first_frag_len(skb) | (skb_num_frags(skb) &lt;&lt; 16);</div><div class='ctx'> </div><div class='ctx'> 			np-&gt;tx_info[entry].mapping =</div><div class='del'>-				pci_map_single(np-&gt;pci_dev, skb-&gt;data, skb_first_frag_len(skb), PCI_DMA_TODEVICE);</div><div class='add'>+				dma_map_single(&amp;np-&gt;pci_dev-&gt;dev, skb-&gt;data,</div><div class='add'>+					       skb_first_frag_len(skb),</div><div class='add'>+					       DMA_TO_DEVICE);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			const skb_frag_t *this_frag = &amp;skb_shinfo(skb)-&gt;frags[i - 1];</div><div class='ctx'> 			status |= skb_frag_size(this_frag);</div><div class='ctx'> 			np-&gt;tx_info[entry].mapping =</div><div class='del'>-				pci_map_single(np-&gt;pci_dev,</div><div class='add'>+				dma_map_single(&amp;np-&gt;pci_dev-&gt;dev,</div><div class='ctx'> 					       skb_frag_address(this_frag),</div><div class='ctx'> 					       skb_frag_size(this_frag),</div><div class='del'>-					       PCI_DMA_TODEVICE);</div><div class='add'>+					       DMA_TO_DEVICE);</div><div class='add'>+		}</div><div class='add'>+		if (dma_mapping_error(&amp;np-&gt;pci_dev-&gt;dev, np-&gt;tx_info[entry].mapping)) {</div><div class='add'>+			dev-&gt;stats.tx_dropped++;</div><div class='add'>+			goto err_out;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		np-&gt;tx_ring[entry].addr = cpu_to_dma(np-&gt;tx_info[entry].mapping);</div><div class='hunk'>@@ -1269,8 +1265,28 @@ static netdev_tx_t start_tx(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 		netif_stop_queue(dev);</div><div class='ctx'> </div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='del'>-}</div><div class='ctx'> </div><div class='add'>+err_out:</div><div class='add'>+	entry = prev_tx % TX_RING_SIZE;</div><div class='add'>+	np-&gt;tx_info[entry].skb = NULL;</div><div class='add'>+	if (i &gt; 0) {</div><div class='add'>+		dma_unmap_single(&amp;np-&gt;pci_dev-&gt;dev,</div><div class='add'>+				 np-&gt;tx_info[entry].mapping,</div><div class='add'>+				 skb_first_frag_len(skb), DMA_TO_DEVICE);</div><div class='add'>+		np-&gt;tx_info[entry].mapping = 0;</div><div class='add'>+		entry = (entry + np-&gt;tx_info[entry].used_slots) % TX_RING_SIZE;</div><div class='add'>+		for (j = 1; j &lt; i; j++) {</div><div class='add'>+			dma_unmap_single(&amp;np-&gt;pci_dev-&gt;dev,</div><div class='add'>+					 np-&gt;tx_info[entry].mapping,</div><div class='add'>+					 skb_frag_size(&amp;skb_shinfo(skb)-&gt;frags[j - 1]),</div><div class='add'>+					 DMA_TO_DEVICE);</div><div class='add'>+			entry++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	dev_kfree_skb_any(skb);</div><div class='add'>+	np-&gt;cur_tx = prev_tx;</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> /* The interrupt handler does all of the Rx thread work and cleans up</div><div class='ctx'>    after the Tx thread. */</div><div class='hunk'>@@ -1337,26 +1353,26 @@ static irqreturn_t intr_handler(int irq, void *dev_instance)</div><div class='ctx'> 				u16 entry = (tx_status &amp; 0x7fff) / sizeof(starfire_tx_desc);</div><div class='ctx'> 				struct sk_buff *skb = np-&gt;tx_info[entry].skb;</div><div class='ctx'> 				np-&gt;tx_info[entry].skb = NULL;</div><div class='del'>-				pci_unmap_single(np-&gt;pci_dev,</div><div class='add'>+				dma_unmap_single(&amp;np-&gt;pci_dev-&gt;dev,</div><div class='ctx'> 						 np-&gt;tx_info[entry].mapping,</div><div class='ctx'> 						 skb_first_frag_len(skb),</div><div class='del'>-						 PCI_DMA_TODEVICE);</div><div class='add'>+						 DMA_TO_DEVICE);</div><div class='ctx'> 				np-&gt;tx_info[entry].mapping = 0;</div><div class='ctx'> 				np-&gt;dirty_tx += np-&gt;tx_info[entry].used_slots;</div><div class='ctx'> 				entry = (entry + np-&gt;tx_info[entry].used_slots) % TX_RING_SIZE;</div><div class='ctx'> 				{</div><div class='ctx'> 					int i;</div><div class='ctx'> 					for (i = 0; i &lt; skb_shinfo(skb)-&gt;nr_frags; i++) {</div><div class='del'>-						pci_unmap_single(np-&gt;pci_dev,</div><div class='add'>+						dma_unmap_single(&amp;np-&gt;pci_dev-&gt;dev,</div><div class='ctx'> 								 np-&gt;tx_info[entry].mapping,</div><div class='ctx'> 								 skb_frag_size(&amp;skb_shinfo(skb)-&gt;frags[i]),</div><div class='del'>-								 PCI_DMA_TODEVICE);</div><div class='add'>+								 DMA_TO_DEVICE);</div><div class='ctx'> 						np-&gt;dirty_tx++;</div><div class='ctx'> 						entry++;</div><div class='ctx'> 					}</div><div class='ctx'> 				}</div><div class='ctx'> </div><div class='del'>-				dev_kfree_skb_irq(skb);</div><div class='add'>+				dev_consume_skb_irq(skb);</div><div class='ctx'> 			}</div><div class='ctx'> 			np-&gt;tx_done_q[np-&gt;tx_done].status = 0;</div><div class='ctx'> 			np-&gt;tx_done = (np-&gt;tx_done + 1) % DONE_Q_SIZE;</div><div class='hunk'>@@ -1442,16 +1458,18 @@ static int __netdev_rx(struct net_device *dev, int *quota)</div><div class='ctx'> 		if (pkt_len &lt; rx_copybreak &amp;&amp;</div><div class='ctx'> 		    (skb = netdev_alloc_skb(dev, pkt_len + 2)) != NULL) {</div><div class='ctx'> 			skb_reserve(skb, 2);	/* 16 byte align the IP header */</div><div class='del'>-			pci_dma_sync_single_for_cpu(np-&gt;pci_dev,</div><div class='del'>-						    np-&gt;rx_info[entry].mapping,</div><div class='del'>-						    pkt_len, PCI_DMA_FROMDEVICE);</div><div class='add'>+			dma_sync_single_for_cpu(&amp;np-&gt;pci_dev-&gt;dev,</div><div class='add'>+						np-&gt;rx_info[entry].mapping,</div><div class='add'>+						pkt_len, DMA_FROM_DEVICE);</div><div class='ctx'> 			skb_copy_to_linear_data(skb, np-&gt;rx_info[entry].skb-&gt;data, pkt_len);</div><div class='del'>-			pci_dma_sync_single_for_device(np-&gt;pci_dev,</div><div class='del'>-						       np-&gt;rx_info[entry].mapping,</div><div class='del'>-						       pkt_len, PCI_DMA_FROMDEVICE);</div><div class='add'>+			dma_sync_single_for_device(&amp;np-&gt;pci_dev-&gt;dev,</div><div class='add'>+						   np-&gt;rx_info[entry].mapping,</div><div class='add'>+						   pkt_len, DMA_FROM_DEVICE);</div><div class='ctx'> 			skb_put(skb, pkt_len);</div><div class='ctx'> 		} else {</div><div class='del'>-			pci_unmap_single(np-&gt;pci_dev, np-&gt;rx_info[entry].mapping, np-&gt;rx_buf_sz, PCI_DMA_FROMDEVICE);</div><div class='add'>+			dma_unmap_single(&amp;np-&gt;pci_dev-&gt;dev,</div><div class='add'>+					 np-&gt;rx_info[entry].mapping,</div><div class='add'>+					 np-&gt;rx_buf_sz, DMA_FROM_DEVICE);</div><div class='ctx'> 			skb = np-&gt;rx_info[entry].skb;</div><div class='ctx'> 			skb_put(skb, pkt_len);</div><div class='ctx'> 			np-&gt;rx_info[entry].skb = NULL;</div><div class='hunk'>@@ -1569,7 +1587,13 @@ static void refill_rx_ring(struct net_device *dev)</div><div class='ctx'> 			if (skb == NULL)</div><div class='ctx'> 				break;	/* Better luck next round. */</div><div class='ctx'> 			np-&gt;rx_info[entry].mapping =</div><div class='del'>-				pci_map_single(np-&gt;pci_dev, skb-&gt;data, np-&gt;rx_buf_sz, PCI_DMA_FROMDEVICE);</div><div class='add'>+				dma_map_single(&amp;np-&gt;pci_dev-&gt;dev, skb-&gt;data,</div><div class='add'>+					       np-&gt;rx_buf_sz, DMA_FROM_DEVICE);</div><div class='add'>+			if (dma_mapping_error(&amp;np-&gt;pci_dev-&gt;dev, np-&gt;rx_info[entry].mapping)) {</div><div class='add'>+				dev_kfree_skb(skb);</div><div class='add'>+				np-&gt;rx_info[entry].skb = NULL;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='ctx'> 			np-&gt;rx_ring[entry].rxaddr =</div><div class='ctx'> 				cpu_to_dma(np-&gt;rx_info[entry].mapping | RxDescValid);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1757,14 +1781,14 @@ static void set_rx_mode(struct net_device *dev)</div><div class='ctx'> 	} else if (netdev_mc_count(dev) &lt;= 14) {</div><div class='ctx'> 		/* Use the 16 element perfect filter, skip first two entries. */</div><div class='ctx'> 		void __iomem *filter_addr = ioaddr + PerfFilterTable + 2 * 16;</div><div class='del'>-		__be16 *eaddrs;</div><div class='add'>+		const __be16 *eaddrs;</div><div class='ctx'> 		netdev_for_each_mc_addr(ha, dev) {</div><div class='ctx'> 			eaddrs = (__be16 *) ha-&gt;addr;</div><div class='ctx'> 			writew(be16_to_cpu(eaddrs[2]), filter_addr); filter_addr += 4;</div><div class='ctx'> 			writew(be16_to_cpu(eaddrs[1]), filter_addr); filter_addr += 4;</div><div class='ctx'> 			writew(be16_to_cpu(eaddrs[0]), filter_addr); filter_addr += 8;</div><div class='ctx'> 		}</div><div class='del'>-		eaddrs = (__be16 *)dev-&gt;dev_addr;</div><div class='add'>+		eaddrs = (const __be16 *)dev-&gt;dev_addr;</div><div class='ctx'> 		i = netdev_mc_count(dev) + 2;</div><div class='ctx'> 		while (i++ &lt; 16) {</div><div class='ctx'> 			writew(be16_to_cpu(eaddrs[0]), filter_addr); filter_addr += 4;</div><div class='hunk'>@@ -1775,7 +1799,7 @@ static void set_rx_mode(struct net_device *dev)</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* Must use a multicast hash table. */</div><div class='ctx'> 		void __iomem *filter_addr;</div><div class='del'>-		__be16 *eaddrs;</div><div class='add'>+		const __be16 *eaddrs;</div><div class='ctx'> 		__le16 mc_filter[32] __attribute__ ((aligned(sizeof(long))));	/* Multicast hash filter */</div><div class='ctx'> </div><div class='ctx'> 		memset(mc_filter, 0, sizeof(mc_filter));</div><div class='hunk'>@@ -1789,7 +1813,7 @@ static void set_rx_mode(struct net_device *dev)</div><div class='ctx'> 		}</div><div class='ctx'> 		/* Clear the perfect filter list, skip first two entries. */</div><div class='ctx'> 		filter_addr = ioaddr + PerfFilterTable + 2 * 16;</div><div class='del'>-		eaddrs = (__be16 *)dev-&gt;dev_addr;</div><div class='add'>+		eaddrs = (const __be16 *)dev-&gt;dev_addr;</div><div class='ctx'> 		for (i = 2; i &lt; 16; i++) {</div><div class='ctx'> 			writew(be16_to_cpu(eaddrs[0]), filter_addr); filter_addr += 4;</div><div class='ctx'> 			writew(be16_to_cpu(eaddrs[1]), filter_addr); filter_addr += 4;</div><div class='hunk'>@@ -1812,26 +1836,27 @@ static int check_if_running(struct net_device *dev)</div><div class='ctx'> static void get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)</div><div class='ctx'> {</div><div class='ctx'> 	struct netdev_private *np = netdev_priv(dev);</div><div class='del'>-	strlcpy(info-&gt;driver, DRV_NAME, sizeof(info-&gt;driver));</div><div class='del'>-	strlcpy(info-&gt;version, DRV_VERSION, sizeof(info-&gt;version));</div><div class='del'>-	strlcpy(info-&gt;bus_info, pci_name(np-&gt;pci_dev), sizeof(info-&gt;bus_info));</div><div class='add'>+	strscpy(info-&gt;driver, DRV_NAME, sizeof(info-&gt;driver));</div><div class='add'>+	strscpy(info-&gt;bus_info, pci_name(np-&gt;pci_dev), sizeof(info-&gt;bus_info));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)</div><div class='add'>+static int get_link_ksettings(struct net_device *dev,</div><div class='add'>+			      struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct netdev_private *np = netdev_priv(dev);</div><div class='ctx'> 	spin_lock_irq(&amp;np-&gt;lock);</div><div class='del'>-	mii_ethtool_gset(&amp;np-&gt;mii_if, ecmd);</div><div class='add'>+	mii_ethtool_get_link_ksettings(&amp;np-&gt;mii_if, cmd);</div><div class='ctx'> 	spin_unlock_irq(&amp;np-&gt;lock);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)</div><div class='add'>+static int set_link_ksettings(struct net_device *dev,</div><div class='add'>+			      const struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct netdev_private *np = netdev_priv(dev);</div><div class='ctx'> 	int res;</div><div class='ctx'> 	spin_lock_irq(&amp;np-&gt;lock);</div><div class='del'>-	res = mii_ethtool_sset(&amp;np-&gt;mii_if, ecmd);</div><div class='add'>+	res = mii_ethtool_set_link_ksettings(&amp;np-&gt;mii_if, cmd);</div><div class='ctx'> 	spin_unlock_irq(&amp;np-&gt;lock);</div><div class='ctx'> 	check_duplex(dev);</div><div class='ctx'> 	return res;</div><div class='hunk'>@@ -1862,12 +1887,12 @@ static void set_msglevel(struct net_device *dev, u32 val)</div><div class='ctx'> static const struct ethtool_ops ethtool_ops = {</div><div class='ctx'> 	.begin = check_if_running,</div><div class='ctx'> 	.get_drvinfo = get_drvinfo,</div><div class='del'>-	.get_settings = get_settings,</div><div class='del'>-	.set_settings = set_settings,</div><div class='ctx'> 	.nway_reset = nway_reset,</div><div class='ctx'> 	.get_link = get_link,</div><div class='ctx'> 	.get_msglevel = get_msglevel,</div><div class='ctx'> 	.set_msglevel = set_msglevel,</div><div class='add'>+	.get_link_ksettings = get_link_ksettings,</div><div class='add'>+	.set_link_ksettings = set_link_ksettings,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)</div><div class='hunk'>@@ -1937,7 +1962,9 @@ static int netdev_close(struct net_device *dev)</div><div class='ctx'> 	for (i = 0; i &lt; RX_RING_SIZE; i++) {</div><div class='ctx'> 		np-&gt;rx_ring[i].rxaddr = cpu_to_dma(0xBADF00D0); /* An invalid address. */</div><div class='ctx'> 		if (np-&gt;rx_info[i].skb != NULL) {</div><div class='del'>-			pci_unmap_single(np-&gt;pci_dev, np-&gt;rx_info[i].mapping, np-&gt;rx_buf_sz, PCI_DMA_FROMDEVICE);</div><div class='add'>+			dma_unmap_single(&amp;np-&gt;pci_dev-&gt;dev,</div><div class='add'>+					 np-&gt;rx_info[i].mapping,</div><div class='add'>+					 np-&gt;rx_buf_sz, DMA_FROM_DEVICE);</div><div class='ctx'> 			dev_kfree_skb(np-&gt;rx_info[i].skb);</div><div class='ctx'> 		}</div><div class='ctx'> 		np-&gt;rx_info[i].skb = NULL;</div><div class='hunk'>@@ -1947,9 +1974,8 @@ static int netdev_close(struct net_device *dev)</div><div class='ctx'> 		struct sk_buff *skb = np-&gt;tx_info[i].skb;</div><div class='ctx'> 		if (skb == NULL)</div><div class='ctx'> 			continue;</div><div class='del'>-		pci_unmap_single(np-&gt;pci_dev,</div><div class='del'>-				 np-&gt;tx_info[i].mapping,</div><div class='del'>-				 skb_first_frag_len(skb), PCI_DMA_TODEVICE);</div><div class='add'>+		dma_unmap_single(&amp;np-&gt;pci_dev-&gt;dev, np-&gt;tx_info[i].mapping,</div><div class='add'>+				 skb_first_frag_len(skb), DMA_TO_DEVICE);</div><div class='ctx'> 		np-&gt;tx_info[i].mapping = 0;</div><div class='ctx'> 		dev_kfree_skb(skb);</div><div class='ctx'> 		np-&gt;tx_info[i].skb = NULL;</div><div class='hunk'>@@ -1958,28 +1984,21 @@ static int netdev_close(struct net_device *dev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PM</div><div class='del'>-static int starfire_suspend(struct pci_dev *pdev, pm_message_t state)</div><div class='add'>+static int __maybe_unused starfire_suspend(struct device *dev_d)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *dev = pci_get_drvdata(pdev);</div><div class='add'>+	struct net_device *dev = dev_get_drvdata(dev_d);</div><div class='ctx'> </div><div class='ctx'> 	if (netif_running(dev)) {</div><div class='ctx'> 		netif_device_detach(dev);</div><div class='ctx'> 		netdev_close(dev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pci_save_state(pdev);</div><div class='del'>-	pci_set_power_state(pdev, pci_choose_state(pdev,state));</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int starfire_resume(struct pci_dev *pdev)</div><div class='add'>+static int __maybe_unused starfire_resume(struct device *dev_d)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *dev = pci_get_drvdata(pdev);</div><div class='del'>-</div><div class='del'>-	pci_set_power_state(pdev, PCI_D0);</div><div class='del'>-	pci_restore_state(pdev);</div><div class='add'>+	struct net_device *dev = dev_get_drvdata(dev_d);</div><div class='ctx'> </div><div class='ctx'> 	if (netif_running(dev)) {</div><div class='ctx'> 		netdev_open(dev);</div><div class='hunk'>@@ -1988,8 +2007,6 @@ static int starfire_resume(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-#endif /* CONFIG_PM */</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> static void starfire_remove_one(struct pci_dev *pdev)</div><div class='ctx'> {</div><div class='hunk'>@@ -2001,7 +2018,8 @@ static void starfire_remove_one(struct pci_dev *pdev)</div><div class='ctx'> 	unregister_netdev(dev);</div><div class='ctx'> </div><div class='ctx'> 	if (np-&gt;queue_mem)</div><div class='del'>-		pci_free_consistent(pdev, np-&gt;queue_mem_size, np-&gt;queue_mem, np-&gt;queue_mem_dma);</div><div class='add'>+		dma_free_coherent(&amp;pdev-&gt;dev, np-&gt;queue_mem_size,</div><div class='add'>+				  np-&gt;queue_mem, np-&gt;queue_mem_dma);</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 	/* XXX: add wakeup code -- requires firmware for MagicPacket */</div><div class='hunk'>@@ -2014,15 +2032,13 @@ static void starfire_remove_one(struct pci_dev *pdev)</div><div class='ctx'> 	free_netdev(dev);			/* Will also free np!! */</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static SIMPLE_DEV_PM_OPS(starfire_pm_ops, starfire_suspend, starfire_resume);</div><div class='ctx'> </div><div class='ctx'> static struct pci_driver starfire_driver = {</div><div class='ctx'> 	.name		= DRV_NAME,</div><div class='ctx'> 	.probe		= starfire_init_one,</div><div class='ctx'> 	.remove		= starfire_remove_one,</div><div class='del'>-#ifdef CONFIG_PM</div><div class='del'>-	.suspend	= starfire_suspend,</div><div class='del'>-	.resume		= starfire_resume,</div><div class='del'>-#endif /* CONFIG_PM */</div><div class='add'>+	.driver.pm	= &amp;starfire_pm_ops,</div><div class='ctx'> 	.id_table	= starfire_pci_tbl,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -2031,8 +2047,6 @@ static int __init starfire_init (void)</div><div class='ctx'> {</div><div class='ctx'> /* when a module, this is printed whether or not devices are found in probe */</div><div class='ctx'> #ifdef MODULE</div><div class='del'>-	printk(version);</div><div class='del'>-</div><div class='ctx'> 	printk(KERN_INFO DRV_NAME ": polling (NAPI) enabled\n");</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='hunk'>@@ -2050,11 +2064,3 @@ static void __exit starfire_cleanup (void)</div><div class='ctx'> </div><div class='ctx'> module_init(starfire_init);</div><div class='ctx'> module_exit(starfire_cleanup);</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Local variables:</div><div class='del'>- *  c-basic-offset: 8</div><div class='del'>- *  tab-width: 8</div><div class='del'>- * End:</div><div class='del'>- */</div><div class='head'>diff --git a/drivers/net/ethernet/adi/Kconfig b/drivers/net/ethernet/adi/Kconfig<br/>index 6b94ba610399..760a9a60bc15 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/adi/Kconfig?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/adi/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/adi/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/adi/Kconfig</a></div><div class='hunk'>@@ -1,66 +1,29 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='ctx'> #</div><div class='del'>-# Blackfin device configuration</div><div class='add'>+# Analog Devices device configuration</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-config NET_BFIN</div><div class='del'>-	bool "Blackfin devices"</div><div class='del'>-	depends on BF516 || BF518 || BF526 || BF527 || BF536 || BF537</div><div class='del'>-	---help---</div><div class='add'>+config NET_VENDOR_ADI</div><div class='add'>+	bool "Analog Devices devices"</div><div class='add'>+	default y</div><div class='add'>+	depends on SPI</div><div class='add'>+	help</div><div class='ctx'> 	  If you have a network (Ethernet) card belonging to this class, say Y.</div><div class='ctx'> </div><div class='del'>-	  If unsure, say Y.</div><div class='del'>-</div><div class='ctx'> 	  Note that the answer to this question doesn't directly affect the</div><div class='ctx'> 	  kernel: saying N will just cause the configurator to skip all</div><div class='del'>-	  the remaining Blackfin card questions. If you say Y, you will be</div><div class='del'>-	  asked for your specific card in the following questions.</div><div class='add'>+	  the questions about ADI devices. If you say Y, you will be asked</div><div class='add'>+	  for your specific card in the following questions.</div><div class='ctx'> </div><div class='del'>-if NET_BFIN</div><div class='add'>+if NET_VENDOR_ADI</div><div class='ctx'> </div><div class='del'>-config BFIN_MAC</div><div class='del'>-	tristate "Blackfin on-chip MAC support"</div><div class='del'>-	depends on (BF516 || BF518 || BF526 || BF527 || BF536 || BF537)</div><div class='del'>-	select CRC32</div><div class='del'>-	select MII</div><div class='add'>+config ADIN1110</div><div class='add'>+	tristate "Analog Devices ADIN1110 MAC-PHY"</div><div class='add'>+	depends on SPI &amp;&amp; NET_SWITCHDEV</div><div class='add'>+	select CRC8</div><div class='ctx'> 	select PHYLIB</div><div class='del'>-	select BFIN_MAC_USE_L1 if DMA_UNCACHED_NONE</div><div class='del'>-	---help---</div><div class='del'>-	  This is the driver for Blackfin on-chip mac device. Say Y if you want</div><div class='del'>-	  it compiled into the kernel. This driver is also available as a</div><div class='del'>-	  module ( = code which can be inserted in and removed from the running</div><div class='del'>-	  kernel whenever you want). The module will be called bfin_mac.</div><div class='del'>-</div><div class='del'>-config BFIN_MAC_USE_L1</div><div class='del'>-	bool "Use L1 memory for rx/tx packets"</div><div class='del'>-	depends on BFIN_MAC &amp;&amp; (BF527 || BF537)</div><div class='del'>-	default y</div><div class='del'>-	---help---</div><div class='del'>-	  To get maximum network performance, you should use L1 memory as rx/tx</div><div class='del'>-	  buffers. Say N here if you want to reserve L1 memory for other uses.</div><div class='del'>-</div><div class='del'>-config BFIN_TX_DESC_NUM</div><div class='del'>-	int "Number of transmit buffer packets"</div><div class='del'>-	depends on BFIN_MAC</div><div class='del'>-	range 6 10 if BFIN_MAC_USE_L1</div><div class='del'>-	range 10 100</div><div class='del'>-	default "10"</div><div class='del'>-	---help---</div><div class='del'>-	  Set the number of buffer packets used in driver.</div><div class='del'>-</div><div class='del'>-config BFIN_RX_DESC_NUM</div><div class='del'>-	int "Number of receive buffer packets"</div><div class='del'>-	depends on BFIN_MAC</div><div class='del'>-	range 20 64</div><div class='del'>-	default "20"</div><div class='del'>-	---help---</div><div class='del'>-	  Set the number of buffer packets used in driver.</div><div class='del'>-</div><div class='del'>-config BFIN_MAC_USE_HWSTAMP</div><div class='del'>-	bool "Use IEEE 1588 hwstamp"</div><div class='del'>-	depends on BFIN_MAC &amp;&amp; BF518</div><div class='del'>-	select PTP_1588_CLOCK</div><div class='del'>-	default y</div><div class='del'>-	---help---</div><div class='del'>-	  To support the IEEE 1588 Precision Time Protocol (PTP), select y here</div><div class='add'>+	help</div><div class='add'>+	  Say yes here to build support for Analog Devices ADIN1110</div><div class='add'>+	  Low Power 10BASE-T1L Ethernet MAC-PHY.</div><div class='ctx'> </div><div class='del'>-endif # NET_BFIN</div><div class='add'>+endif # NET_VENDOR_ADI</div><div class='head'>diff --git a/drivers/net/ethernet/adi/Makefile b/drivers/net/ethernet/adi/Makefile<br/>index b1fbe195d0e8..d0383d94303c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/adi/Makefile?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/adi/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/adi/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/adi/Makefile</a></div><div class='hunk'>@@ -1,5 +1,6 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='ctx'> #</div><div class='del'>-# Makefile for the Blackfin device drivers.</div><div class='add'>+# Makefile for the Analog Devices network device drivers.</div><div class='ctx'> #</div><div class='ctx'> </div><div class='del'>-obj-$(CONFIG_BFIN_MAC) += bfin_mac.o</div><div class='add'>+obj-$(CONFIG_ADIN1110) += adin1110.o</div><div class='head'>diff --git a/drivers/net/ethernet/adi/adin1110.c b/drivers/net/ethernet/adi/adin1110.c<br/>new file mode 100644<br/>index 000000000000..30f9d271e595<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/adi/adin1110.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/adi/adin1110.c</a></div><div class='hunk'>@@ -0,0 +1,1737 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+/* ADIN1110 Low Power 10BASE-T1L Ethernet MAC-PHY</div><div class='add'>+ * ADIN2111 2-Port Ethernet Switch with Integrated 10BASE-T1L PHY</div><div class='add'>+ *</div><div class='add'>+ * Copyright 2021 Analog Devices Inc.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitfield.h&gt;</div><div class='add'>+#include &lt;linux/bits.h&gt;</div><div class='add'>+#include &lt;linux/cache.h&gt;</div><div class='add'>+#include &lt;linux/crc8.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/gpio/consumer.h&gt;</div><div class='add'>+#include &lt;linux/if_bridge.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/iopoll.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/mii.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/regulator/consumer.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/property.h&gt;</div><div class='add'>+#include &lt;linux/spi/spi.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;net/switchdev.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/unaligned.h&gt;</div><div class='add'>+</div><div class='add'>+#define ADIN1110_PHY_ID				0x1</div><div class='add'>+</div><div class='add'>+#define ADIN1110_RESET				0x03</div><div class='add'>+#define   ADIN1110_SWRESET			BIT(0)</div><div class='add'>+</div><div class='add'>+#define ADIN1110_CONFIG1			0x04</div><div class='add'>+#define   ADIN1110_CONFIG1_SYNC			BIT(15)</div><div class='add'>+</div><div class='add'>+#define ADIN1110_CONFIG2			0x06</div><div class='add'>+#define   ADIN2111_P2_FWD_UNK2HOST		BIT(12)</div><div class='add'>+#define   ADIN2111_PORT_CUT_THRU_EN		BIT(11)</div><div class='add'>+#define   ADIN1110_CRC_APPEND			BIT(5)</div><div class='add'>+#define   ADIN1110_FWD_UNK2HOST			BIT(2)</div><div class='add'>+</div><div class='add'>+#define ADIN1110_STATUS0			0x08</div><div class='add'>+</div><div class='add'>+#define ADIN1110_STATUS1			0x09</div><div class='add'>+#define   ADIN2111_P2_RX_RDY			BIT(17)</div><div class='add'>+#define   ADIN1110_SPI_ERR			BIT(10)</div><div class='add'>+#define   ADIN1110_RX_RDY			BIT(4)</div><div class='add'>+</div><div class='add'>+#define ADIN1110_IMASK1				0x0D</div><div class='add'>+#define   ADIN2111_RX_RDY_IRQ			BIT(17)</div><div class='add'>+#define   ADIN1110_SPI_ERR_IRQ			BIT(10)</div><div class='add'>+#define   ADIN1110_RX_RDY_IRQ			BIT(4)</div><div class='add'>+#define   ADIN1110_TX_RDY_IRQ			BIT(3)</div><div class='add'>+</div><div class='add'>+#define ADIN1110_MDIOACC			0x20</div><div class='add'>+#define   ADIN1110_MDIO_TRDONE			BIT(31)</div><div class='add'>+#define   ADIN1110_MDIO_ST			GENMASK(29, 28)</div><div class='add'>+#define   ADIN1110_MDIO_OP			GENMASK(27, 26)</div><div class='add'>+#define   ADIN1110_MDIO_PRTAD			GENMASK(25, 21)</div><div class='add'>+#define   ADIN1110_MDIO_DEVAD			GENMASK(20, 16)</div><div class='add'>+#define   ADIN1110_MDIO_DATA			GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define ADIN1110_TX_FSIZE			0x30</div><div class='add'>+#define ADIN1110_TX				0x31</div><div class='add'>+#define ADIN1110_TX_SPACE			0x32</div><div class='add'>+</div><div class='add'>+#define ADIN1110_MAC_ADDR_FILTER_UPR		0x50</div><div class='add'>+#define   ADIN2111_MAC_ADDR_APPLY2PORT2		BIT(31)</div><div class='add'>+#define   ADIN1110_MAC_ADDR_APPLY2PORT		BIT(30)</div><div class='add'>+#define   ADIN2111_MAC_ADDR_TO_OTHER_PORT	BIT(17)</div><div class='add'>+#define   ADIN1110_MAC_ADDR_TO_HOST		BIT(16)</div><div class='add'>+</div><div class='add'>+#define ADIN1110_MAC_ADDR_FILTER_LWR		0x51</div><div class='add'>+</div><div class='add'>+#define ADIN1110_MAC_ADDR_MASK_UPR		0x70</div><div class='add'>+#define ADIN1110_MAC_ADDR_MASK_LWR		0x71</div><div class='add'>+</div><div class='add'>+#define ADIN1110_RX_FSIZE			0x90</div><div class='add'>+#define ADIN1110_RX				0x91</div><div class='add'>+</div><div class='add'>+#define ADIN2111_RX_P2_FSIZE			0xC0</div><div class='add'>+#define ADIN2111_RX_P2				0xC1</div><div class='add'>+</div><div class='add'>+#define ADIN1110_CLEAR_STATUS0			0xFFF</div><div class='add'>+</div><div class='add'>+/* MDIO_OP codes */</div><div class='add'>+#define ADIN1110_MDIO_OP_WR			0x1</div><div class='add'>+#define ADIN1110_MDIO_OP_RD			0x3</div><div class='add'>+</div><div class='add'>+#define ADIN1110_CD				BIT(7)</div><div class='add'>+#define ADIN1110_WRITE				BIT(5)</div><div class='add'>+</div><div class='add'>+#define ADIN1110_MAX_BUFF			2048</div><div class='add'>+#define ADIN1110_MAX_FRAMES_READ		64</div><div class='add'>+#define ADIN1110_WR_HEADER_LEN			2</div><div class='add'>+#define ADIN1110_FRAME_HEADER_LEN		2</div><div class='add'>+#define ADIN1110_INTERNAL_SIZE_HEADER_LEN	2</div><div class='add'>+#define ADIN1110_RD_HEADER_LEN			3</div><div class='add'>+#define ADIN1110_REG_LEN			4</div><div class='add'>+#define ADIN1110_FEC_LEN			4</div><div class='add'>+</div><div class='add'>+#define ADIN1110_PHY_ID_VAL			0x0283BC91</div><div class='add'>+#define ADIN2111_PHY_ID_VAL			0x0283BCA1</div><div class='add'>+</div><div class='add'>+#define ADIN_MAC_MAX_PORTS			2</div><div class='add'>+#define ADIN_MAC_MAX_ADDR_SLOTS			16</div><div class='add'>+</div><div class='add'>+#define ADIN_MAC_MULTICAST_ADDR_SLOT		0</div><div class='add'>+#define ADIN_MAC_BROADCAST_ADDR_SLOT		1</div><div class='add'>+#define ADIN_MAC_P1_ADDR_SLOT			2</div><div class='add'>+#define ADIN_MAC_P2_ADDR_SLOT			3</div><div class='add'>+#define ADIN_MAC_FDB_ADDR_SLOT			4</div><div class='add'>+</div><div class='add'>+DECLARE_CRC8_TABLE(adin1110_crc_table);</div><div class='add'>+</div><div class='add'>+enum adin1110_chips_id {</div><div class='add'>+	ADIN1110_MAC = 0,</div><div class='add'>+	ADIN2111_MAC,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct adin1110_cfg {</div><div class='add'>+	enum adin1110_chips_id	id;</div><div class='add'>+	char			name[MDIO_NAME_SIZE];</div><div class='add'>+	u32			phy_ids[PHY_MAX_ADDR];</div><div class='add'>+	u32			ports_nr;</div><div class='add'>+	u32			phy_id_val;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct adin1110_port_priv {</div><div class='add'>+	struct adin1110_priv		*priv;</div><div class='add'>+	struct net_device		*netdev;</div><div class='add'>+	struct net_device		*bridge;</div><div class='add'>+	struct phy_device		*phydev;</div><div class='add'>+	struct work_struct		tx_work;</div><div class='add'>+	u64				rx_packets;</div><div class='add'>+	u64				tx_packets;</div><div class='add'>+	u64				rx_bytes;</div><div class='add'>+	u64				tx_bytes;</div><div class='add'>+	struct work_struct		rx_mode_work;</div><div class='add'>+	u32				flags;</div><div class='add'>+	struct sk_buff_head		txq;</div><div class='add'>+	u32				nr;</div><div class='add'>+	u32				state;</div><div class='add'>+	struct adin1110_cfg		*cfg;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct adin1110_priv {</div><div class='add'>+	struct mutex			lock; /* protect spi */</div><div class='add'>+	spinlock_t			state_lock; /* protect RX mode */</div><div class='add'>+	struct mii_bus			*mii_bus;</div><div class='add'>+	struct spi_device		*spidev;</div><div class='add'>+	bool				append_crc;</div><div class='add'>+	struct adin1110_cfg		*cfg;</div><div class='add'>+	u32				tx_space;</div><div class='add'>+	u32				irq_mask;</div><div class='add'>+	bool				forwarding;</div><div class='add'>+	int				irq;</div><div class='add'>+	struct adin1110_port_priv	*ports[ADIN_MAC_MAX_PORTS];</div><div class='add'>+	char				mii_bus_name[MII_BUS_ID_SIZE];</div><div class='add'>+	u8				data[ADIN1110_MAX_BUFF] ____cacheline_aligned;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct adin1110_switchdev_event_work {</div><div class='add'>+	struct work_struct work;</div><div class='add'>+	struct switchdev_notifier_fdb_info fdb_info;</div><div class='add'>+	struct adin1110_port_priv *port_priv;</div><div class='add'>+	unsigned long event;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct adin1110_cfg adin1110_cfgs[] = {</div><div class='add'>+	{</div><div class='add'>+		.id = ADIN1110_MAC,</div><div class='add'>+		.name = "adin1110",</div><div class='add'>+		.phy_ids = {1},</div><div class='add'>+		.ports_nr = 1,</div><div class='add'>+		.phy_id_val = ADIN1110_PHY_ID_VAL,</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		.id = ADIN2111_MAC,</div><div class='add'>+		.name = "adin2111",</div><div class='add'>+		.phy_ids = {1, 2},</div><div class='add'>+		.ports_nr = 2,</div><div class='add'>+		.phy_id_val = ADIN2111_PHY_ID_VAL,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static u8 adin1110_crc_data(u8 *data, u32 len)</div><div class='add'>+{</div><div class='add'>+	return crc8(adin1110_crc_table, data, len, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adin1110_read_reg(struct adin1110_priv *priv, u16 reg, u32 *val)</div><div class='add'>+{</div><div class='add'>+	u32 header_len = ADIN1110_RD_HEADER_LEN;</div><div class='add'>+	u32 read_len = ADIN1110_REG_LEN;</div><div class='add'>+	struct spi_transfer t = {0};</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	priv-&gt;data[0] = ADIN1110_CD | FIELD_GET(GENMASK(12, 8), reg);</div><div class='add'>+	priv-&gt;data[1] = FIELD_GET(GENMASK(7, 0), reg);</div><div class='add'>+	priv-&gt;data[2] = 0x00;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;append_crc) {</div><div class='add'>+		priv-&gt;data[2] = adin1110_crc_data(&amp;priv-&gt;data[0], 2);</div><div class='add'>+		priv-&gt;data[3] = 0x00;</div><div class='add'>+		header_len++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;append_crc)</div><div class='add'>+		read_len++;</div><div class='add'>+</div><div class='add'>+	memset(&amp;priv-&gt;data[header_len], 0, read_len);</div><div class='add'>+	t.tx_buf = &amp;priv-&gt;data[0];</div><div class='add'>+	t.rx_buf = &amp;priv-&gt;data[0];</div><div class='add'>+	t.len = read_len + header_len;</div><div class='add'>+</div><div class='add'>+	ret = spi_sync_transfer(priv-&gt;spidev, &amp;t, 1);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;append_crc) {</div><div class='add'>+		u8 recv_crc;</div><div class='add'>+		u8 crc;</div><div class='add'>+</div><div class='add'>+		crc = adin1110_crc_data(&amp;priv-&gt;data[header_len],</div><div class='add'>+					ADIN1110_REG_LEN);</div><div class='add'>+		recv_crc = priv-&gt;data[header_len + ADIN1110_REG_LEN];</div><div class='add'>+</div><div class='add'>+		if (crc != recv_crc) {</div><div class='add'>+			dev_err_ratelimited(&amp;priv-&gt;spidev-&gt;dev, "CRC error.");</div><div class='add'>+			return -EBADMSG;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*val = get_unaligned_be32(&amp;priv-&gt;data[header_len]);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adin1110_write_reg(struct adin1110_priv *priv, u16 reg, u32 val)</div><div class='add'>+{</div><div class='add'>+	u32 header_len = ADIN1110_WR_HEADER_LEN;</div><div class='add'>+	u32 write_len = ADIN1110_REG_LEN;</div><div class='add'>+</div><div class='add'>+	priv-&gt;data[0] = ADIN1110_CD | ADIN1110_WRITE | FIELD_GET(GENMASK(12, 8), reg);</div><div class='add'>+	priv-&gt;data[1] = FIELD_GET(GENMASK(7, 0), reg);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;append_crc) {</div><div class='add'>+		priv-&gt;data[2] = adin1110_crc_data(&amp;priv-&gt;data[0], header_len);</div><div class='add'>+		header_len++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	put_unaligned_be32(val, &amp;priv-&gt;data[header_len]);</div><div class='add'>+	if (priv-&gt;append_crc) {</div><div class='add'>+		priv-&gt;data[header_len + write_len] = adin1110_crc_data(&amp;priv-&gt;data[header_len],</div><div class='add'>+								       write_len);</div><div class='add'>+		write_len++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return spi_write(priv-&gt;spidev, &amp;priv-&gt;data[0], header_len + write_len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adin1110_set_bits(struct adin1110_priv *priv, u16 reg,</div><div class='add'>+			     unsigned long mask, unsigned long val)</div><div class='add'>+{</div><div class='add'>+	u32 write_val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = adin1110_read_reg(priv, reg, &amp;write_val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	set_mask_bits(&amp;write_val, mask, val);</div><div class='add'>+</div><div class='add'>+	return adin1110_write_reg(priv, reg, write_val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adin1110_round_len(int len)</div><div class='add'>+{</div><div class='add'>+	/* can read/write only mutiples of 4 bytes of payload */</div><div class='add'>+	len = ALIGN(len, 4);</div><div class='add'>+</div><div class='add'>+	/* NOTE: ADIN1110_WR_HEADER_LEN should be used for write ops. */</div><div class='add'>+	if (len + ADIN1110_RD_HEADER_LEN &gt; ADIN1110_MAX_BUFF)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adin1110_read_fifo(struct adin1110_port_priv *port_priv)</div><div class='add'>+{</div><div class='add'>+	struct adin1110_priv *priv = port_priv-&gt;priv;</div><div class='add'>+	u32 header_len = ADIN1110_RD_HEADER_LEN;</div><div class='add'>+	struct spi_transfer t = {0};</div><div class='add'>+	u32 frame_size_no_fcs;</div><div class='add'>+	struct sk_buff *rxb;</div><div class='add'>+	u32 frame_size;</div><div class='add'>+	int round_len;</div><div class='add'>+	u16 reg;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!port_priv-&gt;nr) {</div><div class='add'>+		reg = ADIN1110_RX;</div><div class='add'>+		ret = adin1110_read_reg(priv, ADIN1110_RX_FSIZE, &amp;frame_size);</div><div class='add'>+	} else {</div><div class='add'>+		reg = ADIN2111_RX_P2;</div><div class='add'>+		ret = adin1110_read_reg(priv, ADIN2111_RX_P2_FSIZE,</div><div class='add'>+					&amp;frame_size);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* The read frame size includes the extra 2 bytes</div><div class='add'>+	 * from the  ADIN1110 frame header.</div><div class='add'>+	 */</div><div class='add'>+	if (frame_size &lt; ADIN1110_FRAME_HEADER_LEN + ADIN1110_FEC_LEN)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	round_len = adin1110_round_len(frame_size);</div><div class='add'>+	if (round_len &lt; 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	frame_size_no_fcs = frame_size - ADIN1110_FRAME_HEADER_LEN - ADIN1110_FEC_LEN;</div><div class='add'>+	memset(priv-&gt;data, 0, ADIN1110_RD_HEADER_LEN);</div><div class='add'>+</div><div class='add'>+	priv-&gt;data[0] = ADIN1110_CD | FIELD_GET(GENMASK(12, 8), reg);</div><div class='add'>+	priv-&gt;data[1] = FIELD_GET(GENMASK(7, 0), reg);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;append_crc) {</div><div class='add'>+		priv-&gt;data[2] = adin1110_crc_data(&amp;priv-&gt;data[0], 2);</div><div class='add'>+		header_len++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rxb = netdev_alloc_skb(port_priv-&gt;netdev, round_len + header_len);</div><div class='add'>+	if (!rxb)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	skb_put(rxb, frame_size_no_fcs + header_len + ADIN1110_FRAME_HEADER_LEN);</div><div class='add'>+</div><div class='add'>+	t.tx_buf = &amp;priv-&gt;data[0];</div><div class='add'>+	t.rx_buf = &amp;rxb-&gt;data[0];</div><div class='add'>+	t.len = header_len + round_len;</div><div class='add'>+</div><div class='add'>+	ret = spi_sync_transfer(priv-&gt;spidev, &amp;t, 1);</div><div class='add'>+	if (ret) {</div><div class='add'>+		kfree_skb(rxb);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb_pull(rxb, header_len + ADIN1110_FRAME_HEADER_LEN);</div><div class='add'>+	rxb-&gt;protocol = eth_type_trans(rxb, port_priv-&gt;netdev);</div><div class='add'>+</div><div class='add'>+	if ((port_priv-&gt;flags &amp; IFF_ALLMULTI &amp;&amp; rxb-&gt;pkt_type == PACKET_MULTICAST) ||</div><div class='add'>+	    (port_priv-&gt;flags &amp; IFF_BROADCAST &amp;&amp; rxb-&gt;pkt_type == PACKET_BROADCAST))</div><div class='add'>+		rxb-&gt;offload_fwd_mark = port_priv-&gt;priv-&gt;forwarding;</div><div class='add'>+</div><div class='add'>+	netif_rx(rxb);</div><div class='add'>+</div><div class='add'>+	port_priv-&gt;rx_bytes += frame_size - ADIN1110_FRAME_HEADER_LEN;</div><div class='add'>+	port_priv-&gt;rx_packets++;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adin1110_write_fifo(struct adin1110_port_priv *port_priv,</div><div class='add'>+			       struct sk_buff *txb)</div><div class='add'>+{</div><div class='add'>+	struct adin1110_priv *priv = port_priv-&gt;priv;</div><div class='add'>+	u32 header_len = ADIN1110_WR_HEADER_LEN;</div><div class='add'>+	__be16 frame_header;</div><div class='add'>+	int padding = 0;</div><div class='add'>+	int padded_len;</div><div class='add'>+	int round_len;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Pad frame to 64 byte length,</div><div class='add'>+	 * MAC nor PHY will otherwise add the</div><div class='add'>+	 * required padding.</div><div class='add'>+	 * The FEC will be added by the MAC internally.</div><div class='add'>+	 */</div><div class='add'>+	if (txb-&gt;len + ADIN1110_FEC_LEN &lt; 64)</div><div class='add'>+		padding = 64 - (txb-&gt;len + ADIN1110_FEC_LEN);</div><div class='add'>+</div><div class='add'>+	padded_len = txb-&gt;len + padding + ADIN1110_FRAME_HEADER_LEN;</div><div class='add'>+</div><div class='add'>+	round_len = adin1110_round_len(padded_len);</div><div class='add'>+	if (round_len &lt; 0)</div><div class='add'>+		return round_len;</div><div class='add'>+</div><div class='add'>+	ret = adin1110_write_reg(priv, ADIN1110_TX_FSIZE, padded_len);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	memset(priv-&gt;data, 0, round_len + ADIN1110_WR_HEADER_LEN);</div><div class='add'>+</div><div class='add'>+	priv-&gt;data[0] = ADIN1110_CD | ADIN1110_WRITE;</div><div class='add'>+	priv-&gt;data[0] |= FIELD_GET(GENMASK(12, 8), ADIN1110_TX);</div><div class='add'>+	priv-&gt;data[1] = FIELD_GET(GENMASK(7, 0), ADIN1110_TX);</div><div class='add'>+	if (priv-&gt;append_crc) {</div><div class='add'>+		priv-&gt;data[2] = adin1110_crc_data(&amp;priv-&gt;data[0], 2);</div><div class='add'>+		header_len++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* mention the port on which to send the frame in the frame header */</div><div class='add'>+	frame_header = cpu_to_be16(port_priv-&gt;nr);</div><div class='add'>+	memcpy(&amp;priv-&gt;data[header_len], &amp;frame_header,</div><div class='add'>+	       ADIN1110_FRAME_HEADER_LEN);</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;priv-&gt;data[header_len + ADIN1110_FRAME_HEADER_LEN],</div><div class='add'>+	       txb-&gt;data, txb-&gt;len);</div><div class='add'>+</div><div class='add'>+	ret = spi_write(priv-&gt;spidev, &amp;priv-&gt;data[0], round_len + header_len);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	port_priv-&gt;tx_bytes += txb-&gt;len;</div><div class='add'>+	port_priv-&gt;tx_packets++;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adin1110_read_mdio_acc(struct adin1110_priv *priv)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;lock);</div><div class='add'>+	ret = adin1110_read_reg(priv, ADIN1110_MDIOACC, &amp;val);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;lock);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adin1110_mdio_read(struct mii_bus *bus, int phy_id, int reg)</div><div class='add'>+{</div><div class='add'>+	struct adin1110_priv *priv = bus-&gt;priv;</div><div class='add'>+	u32 val = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (mdio_phy_id_is_c45(phy_id))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	val |= FIELD_PREP(ADIN1110_MDIO_OP, ADIN1110_MDIO_OP_RD);</div><div class='add'>+	val |= FIELD_PREP(ADIN1110_MDIO_ST, 0x1);</div><div class='add'>+	val |= FIELD_PREP(ADIN1110_MDIO_PRTAD, phy_id);</div><div class='add'>+	val |= FIELD_PREP(ADIN1110_MDIO_DEVAD, reg);</div><div class='add'>+</div><div class='add'>+	/* write the clause 22 read command to the chip */</div><div class='add'>+	mutex_lock(&amp;priv-&gt;lock);</div><div class='add'>+	ret = adin1110_write_reg(priv, ADIN1110_MDIOACC, val);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;lock);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* ADIN1110_MDIO_TRDONE BIT of the ADIN1110_MDIOACC</div><div class='add'>+	 * register is set when the read is done.</div><div class='add'>+	 * After the transaction is done, ADIN1110_MDIO_DATA</div><div class='add'>+	 * bitfield of ADIN1110_MDIOACC register will contain</div><div class='add'>+	 * the requested register value.</div><div class='add'>+	 */</div><div class='add'>+	ret = readx_poll_timeout_atomic(adin1110_read_mdio_acc, priv, val,</div><div class='add'>+					(val &amp; ADIN1110_MDIO_TRDONE),</div><div class='add'>+					100, 30000);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return (val &amp; ADIN1110_MDIO_DATA);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adin1110_mdio_write(struct mii_bus *bus, int phy_id,</div><div class='add'>+			       int reg, u16 reg_val)</div><div class='add'>+{</div><div class='add'>+	struct adin1110_priv *priv = bus-&gt;priv;</div><div class='add'>+	u32 val = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (mdio_phy_id_is_c45(phy_id))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	val |= FIELD_PREP(ADIN1110_MDIO_OP, ADIN1110_MDIO_OP_WR);</div><div class='add'>+	val |= FIELD_PREP(ADIN1110_MDIO_ST, 0x1);</div><div class='add'>+	val |= FIELD_PREP(ADIN1110_MDIO_PRTAD, phy_id);</div><div class='add'>+	val |= FIELD_PREP(ADIN1110_MDIO_DEVAD, reg);</div><div class='add'>+	val |= FIELD_PREP(ADIN1110_MDIO_DATA, reg_val);</div><div class='add'>+</div><div class='add'>+	/* write the clause 22 write command to the chip */</div><div class='add'>+	mutex_lock(&amp;priv-&gt;lock);</div><div class='add'>+	ret = adin1110_write_reg(priv, ADIN1110_MDIOACC, val);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;lock);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return readx_poll_timeout_atomic(adin1110_read_mdio_acc, priv, val,</div><div class='add'>+					 (val &amp; ADIN1110_MDIO_TRDONE),</div><div class='add'>+					 100, 30000);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ADIN1110 MAC-PHY contains an ADIN1100 PHY.</div><div class='add'>+ * ADIN2111 MAC-PHY contains two ADIN1100 PHYs.</div><div class='add'>+ * By registering a new MDIO bus we allow the PAL to discover</div><div class='add'>+ * the encapsulated PHY and probe the ADIN1100 driver.</div><div class='add'>+ */</div><div class='add'>+static int adin1110_register_mdiobus(struct adin1110_priv *priv,</div><div class='add'>+				     struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct mii_bus *mii_bus;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mii_bus = devm_mdiobus_alloc(dev);</div><div class='add'>+	if (!mii_bus)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	snprintf(priv-&gt;mii_bus_name, MII_BUS_ID_SIZE, "%s-%u",</div><div class='add'>+		 priv-&gt;cfg-&gt;name, spi_get_chipselect(priv-&gt;spidev, 0));</div><div class='add'>+</div><div class='add'>+	mii_bus-&gt;name = priv-&gt;mii_bus_name;</div><div class='add'>+	mii_bus-&gt;read = adin1110_mdio_read;</div><div class='add'>+	mii_bus-&gt;write = adin1110_mdio_write;</div><div class='add'>+	mii_bus-&gt;priv = priv;</div><div class='add'>+	mii_bus-&gt;parent = dev;</div><div class='add'>+	mii_bus-&gt;phy_mask = ~((u32)GENMASK(2, 0));</div><div class='add'>+	snprintf(mii_bus-&gt;id, MII_BUS_ID_SIZE, "%s", dev_name(dev));</div><div class='add'>+</div><div class='add'>+	ret = devm_mdiobus_register(dev, mii_bus);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	priv-&gt;mii_bus = mii_bus;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool adin1110_port_rx_ready(struct adin1110_port_priv *port_priv,</div><div class='add'>+				   u32 status)</div><div class='add'>+{</div><div class='add'>+	if (!netif_oper_up(port_priv-&gt;netdev))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (!port_priv-&gt;nr)</div><div class='add'>+		return !!(status &amp; ADIN1110_RX_RDY);</div><div class='add'>+	else</div><div class='add'>+		return !!(status &amp; ADIN2111_P2_RX_RDY);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adin1110_read_frames(struct adin1110_port_priv *port_priv,</div><div class='add'>+				 unsigned int budget)</div><div class='add'>+{</div><div class='add'>+	struct adin1110_priv *priv = port_priv-&gt;priv;</div><div class='add'>+	u32 status1;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	while (budget) {</div><div class='add'>+		ret = adin1110_read_reg(priv, ADIN1110_STATUS1, &amp;status1);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		if (!adin1110_port_rx_ready(port_priv, status1))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		ret = adin1110_read_fifo(port_priv);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		budget--;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adin1110_wake_queues(struct adin1110_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;cfg-&gt;ports_nr; i++)</div><div class='add'>+		netif_wake_queue(priv-&gt;ports[i]-&gt;netdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t adin1110_irq(int irq, void *p)</div><div class='add'>+{</div><div class='add'>+	struct adin1110_priv *priv = p;</div><div class='add'>+	u32 status1;</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	ret = adin1110_read_reg(priv, ADIN1110_STATUS1, &amp;status1);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;append_crc &amp;&amp; (status1 &amp; ADIN1110_SPI_ERR))</div><div class='add'>+		dev_warn_ratelimited(&amp;priv-&gt;spidev-&gt;dev,</div><div class='add'>+				     "SPI CRC error on write.\n");</div><div class='add'>+</div><div class='add'>+	ret = adin1110_read_reg(priv, ADIN1110_TX_SPACE, &amp;val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* TX FIFO space is expressed in half-words */</div><div class='add'>+	priv-&gt;tx_space = 2 * val;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;cfg-&gt;ports_nr; i++) {</div><div class='add'>+		if (adin1110_port_rx_ready(priv-&gt;ports[i], status1))</div><div class='add'>+			adin1110_read_frames(priv-&gt;ports[i],</div><div class='add'>+					     ADIN1110_MAX_FRAMES_READ);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* clear IRQ sources */</div><div class='add'>+	adin1110_write_reg(priv, ADIN1110_STATUS0, ADIN1110_CLEAR_STATUS0);</div><div class='add'>+	adin1110_write_reg(priv, ADIN1110_STATUS1, priv-&gt;irq_mask);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;tx_space &gt; 0 &amp;&amp; ret &gt;= 0)</div><div class='add'>+		adin1110_wake_queues(priv);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ADIN1110 can filter up to 16 MAC addresses, mac_nr here is the slot used */</div><div class='add'>+static int adin1110_write_mac_address(struct adin1110_port_priv *port_priv,</div><div class='add'>+				      int mac_nr, const u8 *addr,</div><div class='add'>+				      u8 *mask, u32 port_rules)</div><div class='add'>+{</div><div class='add'>+	struct adin1110_priv *priv = port_priv-&gt;priv;</div><div class='add'>+	u32 offset = mac_nr * 2;</div><div class='add'>+	u32 port_rules_mask;</div><div class='add'>+	int ret;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	if (!port_priv-&gt;nr)</div><div class='add'>+		port_rules_mask = ADIN1110_MAC_ADDR_APPLY2PORT;</div><div class='add'>+	else</div><div class='add'>+		port_rules_mask = ADIN2111_MAC_ADDR_APPLY2PORT2;</div><div class='add'>+</div><div class='add'>+	if (port_rules &amp; port_rules_mask)</div><div class='add'>+		port_rules_mask |= ADIN1110_MAC_ADDR_TO_HOST | ADIN2111_MAC_ADDR_TO_OTHER_PORT;</div><div class='add'>+</div><div class='add'>+	port_rules_mask |= GENMASK(15, 0);</div><div class='add'>+	val = port_rules | get_unaligned_be16(&amp;addr[0]);</div><div class='add'>+	ret = adin1110_set_bits(priv, ADIN1110_MAC_ADDR_FILTER_UPR + offset,</div><div class='add'>+				port_rules_mask, val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	val = get_unaligned_be32(&amp;addr[2]);</div><div class='add'>+	ret =  adin1110_write_reg(priv,</div><div class='add'>+				  ADIN1110_MAC_ADDR_FILTER_LWR + offset, val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Only the first two MAC address slots support masking. */</div><div class='add'>+	if (mac_nr &lt; ADIN_MAC_P1_ADDR_SLOT) {</div><div class='add'>+		val = get_unaligned_be16(&amp;mask[0]);</div><div class='add'>+		ret = adin1110_write_reg(priv,</div><div class='add'>+					 ADIN1110_MAC_ADDR_MASK_UPR + offset,</div><div class='add'>+					 val);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		val = get_unaligned_be32(&amp;mask[2]);</div><div class='add'>+		return adin1110_write_reg(priv,</div><div class='add'>+					  ADIN1110_MAC_ADDR_MASK_LWR + offset,</div><div class='add'>+					  val);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adin1110_clear_mac_address(struct adin1110_priv *priv, int mac_nr)</div><div class='add'>+{</div><div class='add'>+	u32 offset = mac_nr * 2;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = adin1110_write_reg(priv, ADIN1110_MAC_ADDR_FILTER_UPR + offset, 0);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret =  adin1110_write_reg(priv, ADIN1110_MAC_ADDR_FILTER_LWR + offset, 0);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* only the first two MAC address slots are maskable */</div><div class='add'>+	if (mac_nr &lt;= 1) {</div><div class='add'>+		ret = adin1110_write_reg(priv, ADIN1110_MAC_ADDR_MASK_UPR + offset, 0);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		ret = adin1110_write_reg(priv, ADIN1110_MAC_ADDR_MASK_LWR + offset, 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 adin1110_port_rules(struct adin1110_port_priv *port_priv,</div><div class='add'>+			       bool fw_to_host,</div><div class='add'>+			       bool fw_to_other_port)</div><div class='add'>+{</div><div class='add'>+	u32 port_rules = 0;</div><div class='add'>+</div><div class='add'>+	if (!port_priv-&gt;nr)</div><div class='add'>+		port_rules |= ADIN1110_MAC_ADDR_APPLY2PORT;</div><div class='add'>+	else</div><div class='add'>+		port_rules |= ADIN2111_MAC_ADDR_APPLY2PORT2;</div><div class='add'>+</div><div class='add'>+	if (fw_to_host)</div><div class='add'>+		port_rules |= ADIN1110_MAC_ADDR_TO_HOST;</div><div class='add'>+</div><div class='add'>+	if (fw_to_other_port &amp;&amp; port_priv-&gt;priv-&gt;forwarding)</div><div class='add'>+		port_rules |= ADIN2111_MAC_ADDR_TO_OTHER_PORT;</div><div class='add'>+</div><div class='add'>+	return port_rules;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adin1110_multicast_filter(struct adin1110_port_priv *port_priv,</div><div class='add'>+				     int mac_nr, bool accept_multicast)</div><div class='add'>+{</div><div class='add'>+	u8 mask[ETH_ALEN] = {0};</div><div class='add'>+	u8 mac[ETH_ALEN] = {0};</div><div class='add'>+	u32 port_rules = 0;</div><div class='add'>+</div><div class='add'>+	mask[0] = BIT(0);</div><div class='add'>+	mac[0] = BIT(0);</div><div class='add'>+</div><div class='add'>+	if (accept_multicast &amp;&amp; port_priv-&gt;state == BR_STATE_FORWARDING)</div><div class='add'>+		port_rules = adin1110_port_rules(port_priv, true, true);</div><div class='add'>+</div><div class='add'>+	return adin1110_write_mac_address(port_priv, mac_nr, mac,</div><div class='add'>+					  mask, port_rules);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adin1110_broadcasts_filter(struct adin1110_port_priv *port_priv,</div><div class='add'>+				      int mac_nr, bool accept_broadcast)</div><div class='add'>+{</div><div class='add'>+	u32 port_rules = 0;</div><div class='add'>+	u8 mask[ETH_ALEN];</div><div class='add'>+</div><div class='add'>+	eth_broadcast_addr(mask);</div><div class='add'>+</div><div class='add'>+	if (accept_broadcast &amp;&amp; port_priv-&gt;state == BR_STATE_FORWARDING)</div><div class='add'>+		port_rules = adin1110_port_rules(port_priv, true, true);</div><div class='add'>+</div><div class='add'>+	return adin1110_write_mac_address(port_priv, mac_nr, mask,</div><div class='add'>+					  mask, port_rules);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adin1110_set_mac_address(struct net_device *netdev,</div><div class='add'>+				    const unsigned char *dev_addr)</div><div class='add'>+{</div><div class='add'>+	struct adin1110_port_priv *port_priv = netdev_priv(netdev);</div><div class='add'>+	u8 mask[ETH_ALEN];</div><div class='add'>+	u32 port_rules;</div><div class='add'>+	u32 mac_slot;</div><div class='add'>+</div><div class='add'>+	if (!is_valid_ether_addr(dev_addr))</div><div class='add'>+		return -EADDRNOTAVAIL;</div><div class='add'>+</div><div class='add'>+	eth_hw_addr_set(netdev, dev_addr);</div><div class='add'>+	eth_broadcast_addr(mask);</div><div class='add'>+</div><div class='add'>+	mac_slot = (!port_priv-&gt;nr) ?  ADIN_MAC_P1_ADDR_SLOT : ADIN_MAC_P2_ADDR_SLOT;</div><div class='add'>+	port_rules = adin1110_port_rules(port_priv, true, false);</div><div class='add'>+</div><div class='add'>+	return adin1110_write_mac_address(port_priv, mac_slot, netdev-&gt;dev_addr,</div><div class='add'>+					  mask, port_rules);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adin1110_ndo_set_mac_address(struct net_device *netdev, void *addr)</div><div class='add'>+{</div><div class='add'>+	struct sockaddr *sa = addr;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = eth_prepare_mac_addr_change(netdev, addr);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return adin1110_set_mac_address(netdev, sa-&gt;sa_data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adin1110_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)</div><div class='add'>+{</div><div class='add'>+	if (!netif_running(netdev))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return phy_do_ioctl(netdev, rq, cmd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adin1110_set_promisc_mode(struct adin1110_port_priv *port_priv,</div><div class='add'>+				     bool promisc)</div><div class='add'>+{</div><div class='add'>+	struct adin1110_priv *priv = port_priv-&gt;priv;</div><div class='add'>+	u32 mask;</div><div class='add'>+</div><div class='add'>+	if (port_priv-&gt;state != BR_STATE_FORWARDING)</div><div class='add'>+		promisc = false;</div><div class='add'>+</div><div class='add'>+	if (!port_priv-&gt;nr)</div><div class='add'>+		mask = ADIN1110_FWD_UNK2HOST;</div><div class='add'>+	else</div><div class='add'>+		mask = ADIN2111_P2_FWD_UNK2HOST;</div><div class='add'>+</div><div class='add'>+	return adin1110_set_bits(priv, ADIN1110_CONFIG2,</div><div class='add'>+				 mask, promisc ? mask : 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adin1110_setup_rx_mode(struct adin1110_port_priv *port_priv)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = adin1110_set_promisc_mode(port_priv,</div><div class='add'>+					!!(port_priv-&gt;flags &amp; IFF_PROMISC));</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = adin1110_multicast_filter(port_priv, ADIN_MAC_MULTICAST_ADDR_SLOT,</div><div class='add'>+					!!(port_priv-&gt;flags &amp; IFF_ALLMULTI));</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = adin1110_broadcasts_filter(port_priv,</div><div class='add'>+					 ADIN_MAC_BROADCAST_ADDR_SLOT,</div><div class='add'>+					 !!(port_priv-&gt;flags &amp; IFF_BROADCAST));</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return adin1110_set_bits(port_priv-&gt;priv, ADIN1110_CONFIG1,</div><div class='add'>+				 ADIN1110_CONFIG1_SYNC, ADIN1110_CONFIG1_SYNC);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool adin1110_can_offload_forwarding(struct adin1110_priv *priv)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (priv-&gt;cfg-&gt;id != ADIN2111_MAC)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* Can't enable forwarding if ports do not belong to the same bridge */</div><div class='add'>+	if (priv-&gt;ports[0]-&gt;bridge != priv-&gt;ports[1]-&gt;bridge || !priv-&gt;ports[0]-&gt;bridge)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* Can't enable forwarding if there is a port</div><div class='add'>+	 * that has been blocked by STP.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;cfg-&gt;ports_nr; i++) {</div><div class='add'>+		if (priv-&gt;ports[i]-&gt;state != BR_STATE_FORWARDING)</div><div class='add'>+			return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adin1110_rx_mode_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct adin1110_port_priv *port_priv;</div><div class='add'>+	struct adin1110_priv *priv;</div><div class='add'>+</div><div class='add'>+	port_priv = container_of(work, struct adin1110_port_priv, rx_mode_work);</div><div class='add'>+	priv = port_priv-&gt;priv;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;lock);</div><div class='add'>+	adin1110_setup_rx_mode(port_priv);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adin1110_set_rx_mode(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct adin1110_port_priv *port_priv = netdev_priv(dev);</div><div class='add'>+	struct adin1110_priv *priv = port_priv-&gt;priv;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;priv-&gt;state_lock);</div><div class='add'>+</div><div class='add'>+	port_priv-&gt;flags = dev-&gt;flags;</div><div class='add'>+	schedule_work(&amp;port_priv-&gt;rx_mode_work);</div><div class='add'>+</div><div class='add'>+	spin_unlock(&amp;priv-&gt;state_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adin1110_net_open(struct net_device *net_dev)</div><div class='add'>+{</div><div class='add'>+	struct adin1110_port_priv *port_priv = netdev_priv(net_dev);</div><div class='add'>+	struct adin1110_priv *priv = port_priv-&gt;priv;</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	/* Configure MAC to compute and append the FCS itself. */</div><div class='add'>+	ret = adin1110_write_reg(priv, ADIN1110_CONFIG2, ADIN1110_CRC_APPEND);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	val = ADIN1110_TX_RDY_IRQ | ADIN1110_RX_RDY_IRQ | ADIN1110_SPI_ERR_IRQ;</div><div class='add'>+	if (priv-&gt;cfg-&gt;id == ADIN2111_MAC)</div><div class='add'>+		val |= ADIN2111_RX_RDY_IRQ;</div><div class='add'>+</div><div class='add'>+	priv-&gt;irq_mask = val;</div><div class='add'>+	ret = adin1110_write_reg(priv, ADIN1110_IMASK1, ~val);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		netdev_err(net_dev, "Failed to enable chip IRQs: %d\n", ret);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = adin1110_read_reg(priv, ADIN1110_TX_SPACE, &amp;val);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		netdev_err(net_dev, "Failed to read TX FIFO space: %d\n", ret);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;tx_space = 2 * val;</div><div class='add'>+</div><div class='add'>+	port_priv-&gt;state = BR_STATE_FORWARDING;</div><div class='add'>+	ret = adin1110_set_mac_address(net_dev, net_dev-&gt;dev_addr);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		netdev_err(net_dev, "Could not set MAC address: %pM, %d\n",</div><div class='add'>+			   net_dev-&gt;dev_addr, ret);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = adin1110_set_bits(priv, ADIN1110_CONFIG1, ADIN1110_CONFIG1_SYNC,</div><div class='add'>+				ADIN1110_CONFIG1_SYNC);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	phy_start(port_priv-&gt;phydev);</div><div class='add'>+</div><div class='add'>+	netif_start_queue(net_dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adin1110_net_stop(struct net_device *net_dev)</div><div class='add'>+{</div><div class='add'>+	struct adin1110_port_priv *port_priv = netdev_priv(net_dev);</div><div class='add'>+	struct adin1110_priv *priv = port_priv-&gt;priv;</div><div class='add'>+	u32 mask;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mask = !port_priv-&gt;nr ? ADIN2111_RX_RDY_IRQ : ADIN1110_RX_RDY_IRQ;</div><div class='add'>+</div><div class='add'>+	/* Disable RX RDY IRQs */</div><div class='add'>+	mutex_lock(&amp;priv-&gt;lock);</div><div class='add'>+	ret = adin1110_set_bits(priv, ADIN1110_IMASK1, mask, mask);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;lock);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(port_priv-&gt;netdev);</div><div class='add'>+	flush_work(&amp;port_priv-&gt;tx_work);</div><div class='add'>+	phy_stop(port_priv-&gt;phydev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adin1110_tx_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct adin1110_port_priv *port_priv;</div><div class='add'>+	struct adin1110_priv *priv;</div><div class='add'>+	struct sk_buff *txb;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	port_priv = container_of(work, struct adin1110_port_priv, tx_work);</div><div class='add'>+	priv = port_priv-&gt;priv;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	while ((txb = skb_dequeue(&amp;port_priv-&gt;txq))) {</div><div class='add'>+		ret = adin1110_write_fifo(port_priv, txb);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			dev_err_ratelimited(&amp;priv-&gt;spidev-&gt;dev,</div><div class='add'>+					    "Frame write error: %d\n", ret);</div><div class='add'>+</div><div class='add'>+		dev_kfree_skb(txb);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static netdev_tx_t adin1110_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct adin1110_port_priv *port_priv = netdev_priv(dev);</div><div class='add'>+	struct adin1110_priv *priv = port_priv-&gt;priv;</div><div class='add'>+	netdev_tx_t netdev_ret = NETDEV_TX_OK;</div><div class='add'>+	u32 tx_space_needed;</div><div class='add'>+</div><div class='add'>+	tx_space_needed = skb-&gt;len + ADIN1110_FRAME_HEADER_LEN + ADIN1110_INTERNAL_SIZE_HEADER_LEN;</div><div class='add'>+	if (tx_space_needed &gt; priv-&gt;tx_space) {</div><div class='add'>+		netif_stop_queue(dev);</div><div class='add'>+		netdev_ret = NETDEV_TX_BUSY;</div><div class='add'>+	} else {</div><div class='add'>+		priv-&gt;tx_space -= tx_space_needed;</div><div class='add'>+		skb_queue_tail(&amp;port_priv-&gt;txq, skb);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	schedule_work(&amp;port_priv-&gt;tx_work);</div><div class='add'>+</div><div class='add'>+	return netdev_ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adin1110_ndo_get_stats64(struct net_device *dev,</div><div class='add'>+				     struct rtnl_link_stats64 *storage)</div><div class='add'>+{</div><div class='add'>+	struct adin1110_port_priv *port_priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	storage-&gt;rx_packets = port_priv-&gt;rx_packets;</div><div class='add'>+	storage-&gt;tx_packets = port_priv-&gt;tx_packets;</div><div class='add'>+</div><div class='add'>+	storage-&gt;rx_bytes = port_priv-&gt;rx_bytes;</div><div class='add'>+	storage-&gt;tx_bytes = port_priv-&gt;tx_bytes;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adin1110_port_get_port_parent_id(struct net_device *dev,</div><div class='add'>+					    struct netdev_phys_item_id *ppid)</div><div class='add'>+{</div><div class='add'>+	struct adin1110_port_priv *port_priv = netdev_priv(dev);</div><div class='add'>+	struct adin1110_priv *priv = port_priv-&gt;priv;</div><div class='add'>+</div><div class='add'>+	ppid-&gt;id_len = strnlen(priv-&gt;mii_bus_name, MAX_PHYS_ITEM_ID_LEN);</div><div class='add'>+	memcpy(ppid-&gt;id, priv-&gt;mii_bus_name, ppid-&gt;id_len);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adin1110_ndo_get_phys_port_name(struct net_device *dev,</div><div class='add'>+					   char *name, size_t len)</div><div class='add'>+{</div><div class='add'>+	struct adin1110_port_priv *port_priv = netdev_priv(dev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = snprintf(name, len, "p%d", port_priv-&gt;nr);</div><div class='add'>+	if (err &gt;= len)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops adin1110_netdev_ops = {</div><div class='add'>+	.ndo_open		= adin1110_net_open,</div><div class='add'>+	.ndo_stop		= adin1110_net_stop,</div><div class='add'>+	.ndo_eth_ioctl		= adin1110_ioctl,</div><div class='add'>+	.ndo_start_xmit		= adin1110_start_xmit,</div><div class='add'>+	.ndo_set_mac_address	= adin1110_ndo_set_mac_address,</div><div class='add'>+	.ndo_set_rx_mode	= adin1110_set_rx_mode,</div><div class='add'>+	.ndo_validate_addr	= eth_validate_addr,</div><div class='add'>+	.ndo_get_stats64	= adin1110_ndo_get_stats64,</div><div class='add'>+	.ndo_get_port_parent_id	= adin1110_port_get_port_parent_id,</div><div class='add'>+	.ndo_get_phys_port_name	= adin1110_ndo_get_phys_port_name,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void adin1110_get_drvinfo(struct net_device *dev,</div><div class='add'>+				 struct ethtool_drvinfo *di)</div><div class='add'>+{</div><div class='add'>+	strscpy(di-&gt;driver, "ADIN1110", sizeof(di-&gt;driver));</div><div class='add'>+	strscpy(di-&gt;bus_info, dev_name(dev-&gt;dev.parent), sizeof(di-&gt;bus_info));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops adin1110_ethtool_ops = {</div><div class='add'>+	.get_drvinfo		= adin1110_get_drvinfo,</div><div class='add'>+	.get_link		= ethtool_op_get_link,</div><div class='add'>+	.get_link_ksettings	= phy_ethtool_get_link_ksettings,</div><div class='add'>+	.set_link_ksettings	= phy_ethtool_set_link_ksettings,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void adin1110_adjust_link(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct phy_device *phydev = dev-&gt;phydev;</div><div class='add'>+</div><div class='add'>+	if (!phydev-&gt;link)</div><div class='add'>+		phy_print_status(phydev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* PHY ID is stored in the MAC registers too,</div><div class='add'>+ * check spi connection by reading it.</div><div class='add'>+ */</div><div class='add'>+static int adin1110_check_spi(struct adin1110_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct gpio_desc *reset_gpio;</div><div class='add'>+	int ret;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	reset_gpio = devm_gpiod_get_optional(&amp;priv-&gt;spidev-&gt;dev, "reset",</div><div class='add'>+					     GPIOD_OUT_LOW);</div><div class='add'>+	if (reset_gpio) {</div><div class='add'>+		/* MISO pin is used for internal configuration, can't have</div><div class='add'>+		 * anyone else disturbing the SDO line.</div><div class='add'>+		 */</div><div class='add'>+		spi_bus_lock(priv-&gt;spidev-&gt;controller);</div><div class='add'>+</div><div class='add'>+		gpiod_set_value(reset_gpio, 1);</div><div class='add'>+		fsleep(10000);</div><div class='add'>+		gpiod_set_value(reset_gpio, 0);</div><div class='add'>+</div><div class='add'>+		/* Need to wait 90 ms before interacting with</div><div class='add'>+		 * the MAC after a HW reset.</div><div class='add'>+		 */</div><div class='add'>+		fsleep(90000);</div><div class='add'>+</div><div class='add'>+		spi_bus_unlock(priv-&gt;spidev-&gt;controller);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = adin1110_read_reg(priv, ADIN1110_PHY_ID, &amp;val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (val != priv-&gt;cfg-&gt;phy_id_val) {</div><div class='add'>+		dev_err(&amp;priv-&gt;spidev-&gt;dev, "PHY ID expected: %x, read: %x\n",</div><div class='add'>+			priv-&gt;cfg-&gt;phy_id_val, val);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adin1110_hw_forwarding(struct adin1110_priv *priv, bool enable)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	priv-&gt;forwarding = enable;</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;forwarding) {</div><div class='add'>+		for (i = ADIN_MAC_FDB_ADDR_SLOT; i &lt; ADIN_MAC_MAX_ADDR_SLOTS; i++) {</div><div class='add'>+			ret = adin1110_clear_mac_address(priv, i);</div><div class='add'>+			if (ret &lt; 0)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Forwarding is optimised when MAC runs in Cut Through mode. */</div><div class='add'>+	ret = adin1110_set_bits(priv, ADIN1110_CONFIG2,</div><div class='add'>+				ADIN2111_PORT_CUT_THRU_EN,</div><div class='add'>+				priv-&gt;forwarding ? ADIN2111_PORT_CUT_THRU_EN : 0);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;cfg-&gt;ports_nr; i++) {</div><div class='add'>+		ret = adin1110_setup_rx_mode(priv-&gt;ports[i]);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adin1110_port_bridge_join(struct adin1110_port_priv *port_priv,</div><div class='add'>+				     struct net_device *bridge)</div><div class='add'>+{</div><div class='add'>+	struct adin1110_priv *priv = port_priv-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	port_priv-&gt;bridge = bridge;</div><div class='add'>+</div><div class='add'>+	if (adin1110_can_offload_forwarding(priv)) {</div><div class='add'>+		mutex_lock(&amp;priv-&gt;lock);</div><div class='add'>+		ret = adin1110_hw_forwarding(priv, true);</div><div class='add'>+		mutex_unlock(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return adin1110_set_mac_address(port_priv-&gt;netdev, bridge-&gt;dev_addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adin1110_port_bridge_leave(struct adin1110_port_priv *port_priv,</div><div class='add'>+				      struct net_device *bridge)</div><div class='add'>+{</div><div class='add'>+	struct adin1110_priv *priv = port_priv-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	port_priv-&gt;bridge = NULL;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;lock);</div><div class='add'>+	ret = adin1110_hw_forwarding(priv, false);</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool adin1110_port_dev_check(const struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	return dev-&gt;netdev_ops == &amp;adin1110_netdev_ops;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adin1110_netdevice_event(struct notifier_block *unused,</div><div class='add'>+				    unsigned long event, void *ptr)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = netdev_notifier_info_to_dev(ptr);</div><div class='add'>+	struct adin1110_port_priv *port_priv = netdev_priv(dev);</div><div class='add'>+	struct netdev_notifier_changeupper_info *info = ptr;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (!adin1110_port_dev_check(dev))</div><div class='add'>+		return NOTIFY_DONE;</div><div class='add'>+</div><div class='add'>+	switch (event) {</div><div class='add'>+	case NETDEV_CHANGEUPPER:</div><div class='add'>+		if (netif_is_bridge_master(info-&gt;upper_dev)) {</div><div class='add'>+			if (info-&gt;linking)</div><div class='add'>+				ret = adin1110_port_bridge_join(port_priv, info-&gt;upper_dev);</div><div class='add'>+			else</div><div class='add'>+				ret = adin1110_port_bridge_leave(port_priv, info-&gt;upper_dev);</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return notifier_from_errno(ret);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct notifier_block adin1110_netdevice_nb = {</div><div class='add'>+	.notifier_call = adin1110_netdevice_event,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void adin1110_disconnect_phy(void *data)</div><div class='add'>+{</div><div class='add'>+	phy_disconnect(data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adin1110_port_set_forwarding_state(struct adin1110_port_priv *port_priv)</div><div class='add'>+{</div><div class='add'>+	struct adin1110_priv *priv = port_priv-&gt;priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	port_priv-&gt;state = BR_STATE_FORWARDING;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;lock);</div><div class='add'>+	ret = adin1110_set_mac_address(port_priv-&gt;netdev,</div><div class='add'>+				       port_priv-&gt;netdev-&gt;dev_addr);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (adin1110_can_offload_forwarding(priv))</div><div class='add'>+		ret = adin1110_hw_forwarding(priv, true);</div><div class='add'>+	else</div><div class='add'>+		ret = adin1110_setup_rx_mode(port_priv);</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adin1110_port_set_blocking_state(struct adin1110_port_priv *port_priv)</div><div class='add'>+{</div><div class='add'>+	u8 mac[ETH_ALEN] = {0x01, 0x80, 0xC2, 0x00, 0x00, 0x00};</div><div class='add'>+	struct adin1110_priv *priv = port_priv-&gt;priv;</div><div class='add'>+	u8 mask[ETH_ALEN];</div><div class='add'>+	u32 port_rules;</div><div class='add'>+	int mac_slot;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	port_priv-&gt;state = BR_STATE_BLOCKING;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	mac_slot = (!port_priv-&gt;nr) ?  ADIN_MAC_P1_ADDR_SLOT : ADIN_MAC_P2_ADDR_SLOT;</div><div class='add'>+	ret = adin1110_clear_mac_address(priv, mac_slot);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ret = adin1110_hw_forwarding(priv, false);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* Allow only BPDUs to be passed to the CPU */</div><div class='add'>+	eth_broadcast_addr(mask);</div><div class='add'>+	port_rules = adin1110_port_rules(port_priv, true, false);</div><div class='add'>+	ret = adin1110_write_mac_address(port_priv, mac_slot, mac,</div><div class='add'>+					 mask, port_rules);</div><div class='add'>+out:</div><div class='add'>+	mutex_unlock(&amp;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ADIN1110/2111 does not have any native STP support.</div><div class='add'>+ * Listen for bridge core state changes and</div><div class='add'>+ * allow all frames to pass or only the BPDUs.</div><div class='add'>+ */</div><div class='add'>+static int adin1110_port_attr_stp_state_set(struct adin1110_port_priv *port_priv,</div><div class='add'>+					    u8 state)</div><div class='add'>+{</div><div class='add'>+	switch (state) {</div><div class='add'>+	case BR_STATE_FORWARDING:</div><div class='add'>+		return adin1110_port_set_forwarding_state(port_priv);</div><div class='add'>+	case BR_STATE_LEARNING:</div><div class='add'>+	case BR_STATE_LISTENING:</div><div class='add'>+	case BR_STATE_DISABLED:</div><div class='add'>+	case BR_STATE_BLOCKING:</div><div class='add'>+		return adin1110_port_set_blocking_state(port_priv);</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adin1110_port_attr_set(struct net_device *dev, const void *ctx,</div><div class='add'>+				  const struct switchdev_attr *attr,</div><div class='add'>+				  struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct adin1110_port_priv *port_priv = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	switch (attr-&gt;id) {</div><div class='add'>+	case SWITCHDEV_ATTR_ID_PORT_STP_STATE:</div><div class='add'>+		return adin1110_port_attr_stp_state_set(port_priv,</div><div class='add'>+							attr-&gt;u.stp_state);</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adin1110_switchdev_blocking_event(struct notifier_block *unused,</div><div class='add'>+					     unsigned long event,</div><div class='add'>+					     void *ptr)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = switchdev_notifier_info_to_dev(ptr);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (event == SWITCHDEV_PORT_ATTR_SET) {</div><div class='add'>+		ret = switchdev_handle_port_attr_set(netdev, ptr,</div><div class='add'>+						     adin1110_port_dev_check,</div><div class='add'>+						     adin1110_port_attr_set);</div><div class='add'>+</div><div class='add'>+		return notifier_from_errno(ret);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NOTIFY_DONE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct notifier_block adin1110_switchdev_blocking_notifier = {</div><div class='add'>+	.notifier_call = adin1110_switchdev_blocking_event,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void adin1110_fdb_offload_notify(struct net_device *netdev,</div><div class='add'>+					struct switchdev_notifier_fdb_info *rcv)</div><div class='add'>+{</div><div class='add'>+	struct switchdev_notifier_fdb_info info = {};</div><div class='add'>+</div><div class='add'>+	info.addr = rcv-&gt;addr;</div><div class='add'>+	info.vid = rcv-&gt;vid;</div><div class='add'>+	info.offloaded = true;</div><div class='add'>+	call_switchdev_notifiers(SWITCHDEV_FDB_OFFLOADED,</div><div class='add'>+				 netdev, &amp;info.info, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adin1110_fdb_add(struct adin1110_port_priv *port_priv,</div><div class='add'>+			    struct switchdev_notifier_fdb_info *fdb)</div><div class='add'>+{</div><div class='add'>+	struct adin1110_priv *priv = port_priv-&gt;priv;</div><div class='add'>+	struct adin1110_port_priv *other_port;</div><div class='add'>+	u8 mask[ETH_ALEN];</div><div class='add'>+	u32 port_rules;</div><div class='add'>+	int mac_nr;</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	netdev_dbg(port_priv-&gt;netdev,</div><div class='add'>+		   "DEBUG: %s: MACID = %pM vid = %u flags = %u %u -- port %d\n",</div><div class='add'>+		    __func__, fdb-&gt;addr, fdb-&gt;vid, fdb-&gt;added_by_user,</div><div class='add'>+		    fdb-&gt;offloaded, port_priv-&gt;nr);</div><div class='add'>+</div><div class='add'>+	if (!priv-&gt;forwarding)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (fdb-&gt;is_local)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Find free FDB slot on device. */</div><div class='add'>+	for (mac_nr = ADIN_MAC_FDB_ADDR_SLOT; mac_nr &lt; ADIN_MAC_MAX_ADDR_SLOTS; mac_nr++) {</div><div class='add'>+		ret = adin1110_read_reg(priv, ADIN1110_MAC_ADDR_FILTER_UPR + (mac_nr * 2), &amp;val);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+		if (!val)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (mac_nr == ADIN_MAC_MAX_ADDR_SLOTS)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	other_port = priv-&gt;ports[!port_priv-&gt;nr];</div><div class='add'>+	port_rules = adin1110_port_rules(other_port, false, true);</div><div class='add'>+	eth_broadcast_addr(mask);</div><div class='add'>+</div><div class='add'>+	return adin1110_write_mac_address(other_port, mac_nr, (u8 *)fdb-&gt;addr,</div><div class='add'>+					  mask, port_rules);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adin1110_read_mac(struct adin1110_priv *priv, int mac_nr, u8 *addr)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = adin1110_read_reg(priv, ADIN1110_MAC_ADDR_FILTER_UPR + (mac_nr * 2), &amp;val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	put_unaligned_be16(val, addr);</div><div class='add'>+</div><div class='add'>+	ret = adin1110_read_reg(priv, ADIN1110_MAC_ADDR_FILTER_LWR + (mac_nr * 2), &amp;val);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	put_unaligned_be32(val, addr + 2);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adin1110_fdb_del(struct adin1110_port_priv *port_priv,</div><div class='add'>+			    struct switchdev_notifier_fdb_info *fdb)</div><div class='add'>+{</div><div class='add'>+	struct adin1110_priv *priv = port_priv-&gt;priv;</div><div class='add'>+	u8 addr[ETH_ALEN];</div><div class='add'>+	int mac_nr;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	netdev_dbg(port_priv-&gt;netdev,</div><div class='add'>+		   "DEBUG: %s: MACID = %pM vid = %u flags = %u %u -- port %d\n",</div><div class='add'>+		   __func__, fdb-&gt;addr, fdb-&gt;vid, fdb-&gt;added_by_user,</div><div class='add'>+		   fdb-&gt;offloaded, port_priv-&gt;nr);</div><div class='add'>+</div><div class='add'>+	if (fdb-&gt;is_local)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	for (mac_nr = ADIN_MAC_FDB_ADDR_SLOT; mac_nr &lt; ADIN_MAC_MAX_ADDR_SLOTS; mac_nr++) {</div><div class='add'>+		ret = adin1110_read_mac(priv, mac_nr, addr);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		if (ether_addr_equal(addr, fdb-&gt;addr)) {</div><div class='add'>+			ret = adin1110_clear_mac_address(priv, mac_nr);</div><div class='add'>+			if (ret &lt; 0)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void adin1110_switchdev_event_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct adin1110_switchdev_event_work *switchdev_work;</div><div class='add'>+	struct adin1110_port_priv *port_priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	switchdev_work = container_of(work, struct adin1110_switchdev_event_work, work);</div><div class='add'>+	port_priv = switchdev_work-&gt;port_priv;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;port_priv-&gt;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	switch (switchdev_work-&gt;event) {</div><div class='add'>+	case SWITCHDEV_FDB_ADD_TO_DEVICE:</div><div class='add'>+		ret = adin1110_fdb_add(port_priv, &amp;switchdev_work-&gt;fdb_info);</div><div class='add'>+		if (!ret)</div><div class='add'>+			adin1110_fdb_offload_notify(port_priv-&gt;netdev,</div><div class='add'>+						    &amp;switchdev_work-&gt;fdb_info);</div><div class='add'>+		break;</div><div class='add'>+	case SWITCHDEV_FDB_DEL_TO_DEVICE:</div><div class='add'>+		adin1110_fdb_del(port_priv, &amp;switchdev_work-&gt;fdb_info);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;port_priv-&gt;priv-&gt;lock);</div><div class='add'>+</div><div class='add'>+	kfree(switchdev_work-&gt;fdb_info.addr);</div><div class='add'>+	kfree(switchdev_work);</div><div class='add'>+	dev_put(port_priv-&gt;netdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* called under rcu_read_lock() */</div><div class='add'>+static int adin1110_switchdev_event(struct notifier_block *unused,</div><div class='add'>+				    unsigned long event, void *ptr)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = switchdev_notifier_info_to_dev(ptr);</div><div class='add'>+	struct adin1110_port_priv *port_priv = netdev_priv(netdev);</div><div class='add'>+	struct adin1110_switchdev_event_work *switchdev_work;</div><div class='add'>+	struct switchdev_notifier_fdb_info *fdb_info = ptr;</div><div class='add'>+</div><div class='add'>+	if (!adin1110_port_dev_check(netdev))</div><div class='add'>+		return NOTIFY_DONE;</div><div class='add'>+</div><div class='add'>+	switchdev_work = kzalloc(sizeof(*switchdev_work), GFP_ATOMIC);</div><div class='add'>+	if (WARN_ON(!switchdev_work))</div><div class='add'>+		return NOTIFY_BAD;</div><div class='add'>+</div><div class='add'>+	INIT_WORK(&amp;switchdev_work-&gt;work, adin1110_switchdev_event_work);</div><div class='add'>+	switchdev_work-&gt;port_priv = port_priv;</div><div class='add'>+	switchdev_work-&gt;event = event;</div><div class='add'>+</div><div class='add'>+	switch (event) {</div><div class='add'>+	case SWITCHDEV_FDB_ADD_TO_DEVICE:</div><div class='add'>+	case SWITCHDEV_FDB_DEL_TO_DEVICE:</div><div class='add'>+		memcpy(&amp;switchdev_work-&gt;fdb_info, ptr,</div><div class='add'>+		       sizeof(switchdev_work-&gt;fdb_info));</div><div class='add'>+		switchdev_work-&gt;fdb_info.addr = kzalloc(ETH_ALEN, GFP_ATOMIC);</div><div class='add'>+</div><div class='add'>+		if (!switchdev_work-&gt;fdb_info.addr)</div><div class='add'>+			goto err_addr_alloc;</div><div class='add'>+</div><div class='add'>+		ether_addr_copy((u8 *)switchdev_work-&gt;fdb_info.addr,</div><div class='add'>+				fdb_info-&gt;addr);</div><div class='add'>+		dev_hold(netdev);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		kfree(switchdev_work);</div><div class='add'>+		return NOTIFY_DONE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	queue_work(system_long_wq, &amp;switchdev_work-&gt;work);</div><div class='add'>+</div><div class='add'>+	return NOTIFY_DONE;</div><div class='add'>+</div><div class='add'>+err_addr_alloc:</div><div class='add'>+	kfree(switchdev_work);</div><div class='add'>+	return NOTIFY_BAD;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct notifier_block adin1110_switchdev_notifier = {</div><div class='add'>+	.notifier_call = adin1110_switchdev_event,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void adin1110_unregister_notifiers(void)</div><div class='add'>+{</div><div class='add'>+	unregister_switchdev_blocking_notifier(&amp;adin1110_switchdev_blocking_notifier);</div><div class='add'>+	unregister_switchdev_notifier(&amp;adin1110_switchdev_notifier);</div><div class='add'>+	unregister_netdevice_notifier(&amp;adin1110_netdevice_nb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adin1110_setup_notifiers(void)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = register_netdevice_notifier(&amp;adin1110_netdevice_nb);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = register_switchdev_notifier(&amp;adin1110_switchdev_notifier);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err_netdev;</div><div class='add'>+</div><div class='add'>+	ret = register_switchdev_blocking_notifier(&amp;adin1110_switchdev_blocking_notifier);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err_sdev;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_sdev:</div><div class='add'>+	unregister_switchdev_notifier(&amp;adin1110_switchdev_notifier);</div><div class='add'>+</div><div class='add'>+err_netdev:</div><div class='add'>+	unregister_netdevice_notifier(&amp;adin1110_netdevice_nb);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adin1110_probe_netdevs(struct adin1110_priv *priv)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;priv-&gt;spidev-&gt;dev;</div><div class='add'>+	struct adin1110_port_priv *port_priv;</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;cfg-&gt;ports_nr; i++) {</div><div class='add'>+		netdev = devm_alloc_etherdev(dev, sizeof(*port_priv));</div><div class='add'>+		if (!netdev)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		port_priv = netdev_priv(netdev);</div><div class='add'>+		port_priv-&gt;netdev = netdev;</div><div class='add'>+		port_priv-&gt;priv = priv;</div><div class='add'>+		port_priv-&gt;cfg = priv-&gt;cfg;</div><div class='add'>+		port_priv-&gt;nr = i;</div><div class='add'>+		priv-&gt;ports[i] = port_priv;</div><div class='add'>+		SET_NETDEV_DEV(netdev, dev);</div><div class='add'>+</div><div class='add'>+		ret = device_get_ethdev_address(dev, netdev);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		netdev-&gt;irq = priv-&gt;spidev-&gt;irq;</div><div class='add'>+		INIT_WORK(&amp;port_priv-&gt;tx_work, adin1110_tx_work);</div><div class='add'>+		INIT_WORK(&amp;port_priv-&gt;rx_mode_work, adin1110_rx_mode_work);</div><div class='add'>+		skb_queue_head_init(&amp;port_priv-&gt;txq);</div><div class='add'>+</div><div class='add'>+		netif_carrier_off(netdev);</div><div class='add'>+</div><div class='add'>+		netdev-&gt;if_port = IF_PORT_10BASET;</div><div class='add'>+		netdev-&gt;netdev_ops = &amp;adin1110_netdev_ops;</div><div class='add'>+		netdev-&gt;ethtool_ops = &amp;adin1110_ethtool_ops;</div><div class='add'>+		netdev-&gt;priv_flags |= IFF_UNICAST_FLT;</div><div class='add'>+		netdev-&gt;netns_immutable = true;</div><div class='add'>+</div><div class='add'>+		port_priv-&gt;phydev = get_phy_device(priv-&gt;mii_bus, i + 1, false);</div><div class='add'>+		if (IS_ERR(port_priv-&gt;phydev)) {</div><div class='add'>+			netdev_err(netdev, "Could not find PHY with device address: %d.\n", i);</div><div class='add'>+			return PTR_ERR(port_priv-&gt;phydev);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		port_priv-&gt;phydev = phy_connect(netdev,</div><div class='add'>+						phydev_name(port_priv-&gt;phydev),</div><div class='add'>+						adin1110_adjust_link,</div><div class='add'>+						PHY_INTERFACE_MODE_INTERNAL);</div><div class='add'>+		if (IS_ERR(port_priv-&gt;phydev)) {</div><div class='add'>+			netdev_err(netdev, "Could not connect PHY with device address: %d.\n", i);</div><div class='add'>+			return PTR_ERR(port_priv-&gt;phydev);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = devm_add_action_or_reset(dev, adin1110_disconnect_phy,</div><div class='add'>+					       port_priv-&gt;phydev);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* ADIN1110 INT_N pin will be used to signal the host */</div><div class='add'>+	ret = devm_request_threaded_irq(dev, priv-&gt;spidev-&gt;irq, NULL,</div><div class='add'>+					adin1110_irq,</div><div class='add'>+					IRQF_TRIGGER_LOW | IRQF_ONESHOT,</div><div class='add'>+					dev_name(dev), priv);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; priv-&gt;cfg-&gt;ports_nr; i++) {</div><div class='add'>+		ret = devm_register_netdev(dev, priv-&gt;ports[i]-&gt;netdev);</div><div class='add'>+		if (ret &lt; 0) {</div><div class='add'>+			dev_err(dev, "Failed to register network device.\n");</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int adin1110_probe(struct spi_device *spi)</div><div class='add'>+{</div><div class='add'>+	const struct spi_device_id *dev_id = spi_get_device_id(spi);</div><div class='add'>+	struct device *dev = &amp;spi-&gt;dev;</div><div class='add'>+	struct adin1110_priv *priv;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	priv = devm_kzalloc(dev, sizeof(struct adin1110_priv), GFP_KERNEL);</div><div class='add'>+	if (!priv)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	priv-&gt;spidev = spi;</div><div class='add'>+	priv-&gt;cfg = &amp;adin1110_cfgs[dev_id-&gt;driver_data];</div><div class='add'>+	spi-&gt;bits_per_word = 8;</div><div class='add'>+	spi-&gt;mode = SPI_MODE_0;</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;priv-&gt;lock);</div><div class='add'>+	spin_lock_init(&amp;priv-&gt;state_lock);</div><div class='add'>+</div><div class='add'>+	/* use of CRC on control and data transactions is pin dependent */</div><div class='add'>+	priv-&gt;append_crc = device_property_read_bool(dev, "adi,spi-crc");</div><div class='add'>+	if (priv-&gt;append_crc)</div><div class='add'>+		crc8_populate_msb(adin1110_crc_table, 0x7);</div><div class='add'>+</div><div class='add'>+	ret = adin1110_check_spi(priv);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(dev, "Probe SPI Read check failed: %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = adin1110_write_reg(priv, ADIN1110_RESET, ADIN1110_SWRESET);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = adin1110_register_mdiobus(priv, dev);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_err(dev, "Could not register MDIO bus %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return adin1110_probe_netdevs(priv);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct of_device_id adin1110_match_table[] = {</div><div class='add'>+	{ .compatible = "adi,adin1110" },</div><div class='add'>+	{ .compatible = "adi,adin2111" },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, adin1110_match_table);</div><div class='add'>+</div><div class='add'>+static const struct spi_device_id adin1110_spi_id[] = {</div><div class='add'>+	{ .name = "adin1110", .driver_data = ADIN1110_MAC },</div><div class='add'>+	{ .name = "adin2111", .driver_data = ADIN2111_MAC },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(spi, adin1110_spi_id);</div><div class='add'>+</div><div class='add'>+static struct spi_driver adin1110_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "adin1110",</div><div class='add'>+		.of_match_table = adin1110_match_table,</div><div class='add'>+	},</div><div class='add'>+	.probe = adin1110_probe,</div><div class='add'>+	.id_table = adin1110_spi_id,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init adin1110_driver_init(void)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = adin1110_setup_notifiers();</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = spi_register_driver(&amp;adin1110_driver);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		adin1110_unregister_notifiers();</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit adin1110_exit(void)</div><div class='add'>+{</div><div class='add'>+	adin1110_unregister_notifiers();</div><div class='add'>+	spi_unregister_driver(&amp;adin1110_driver);</div><div class='add'>+}</div><div class='add'>+module_init(adin1110_driver_init);</div><div class='add'>+module_exit(adin1110_exit);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("ADIN1110 Network driver");</div><div class='add'>+MODULE_AUTHOR("Alexandru Tachici &lt;alexandru.tachici@analog.com&gt;");</div><div class='add'>+MODULE_LICENSE("Dual BSD/GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/adi/bfin_mac.c b/drivers/net/ethernet/adi/bfin_mac.c<br/>deleted file mode 100644<br/>index 096531a73124..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/adi/bfin_mac.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/adi/bfin_mac.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,1933 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Blackfin On-Chip MAC Driver</div><div class='del'>- *</div><div class='del'>- * Copyright 2004-2010 Analog Devices Inc.</div><div class='del'>- *</div><div class='del'>- * Enter bugs at http://blackfin.uclinux.org/</div><div class='del'>- *</div><div class='del'>- * Licensed under the GPL-2 or later.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define DRV_VERSION	"1.1"</div><div class='del'>-#define DRV_DESC	"Blackfin on-chip Ethernet MAC driver"</div><div class='del'>-</div><div class='del'>-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='del'>-</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/sched.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/timer.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/irq.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;linux/crc32.h&gt;</div><div class='del'>-#include &lt;linux/device.h&gt;</div><div class='del'>-#include &lt;linux/spinlock.h&gt;</div><div class='del'>-#include &lt;linux/mii.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/etherdevice.h&gt;</div><div class='del'>-#include &lt;linux/ethtool.h&gt;</div><div class='del'>-#include &lt;linux/skbuff.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/dma.h&gt;</div><div class='del'>-#include &lt;linux/dma-mapping.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/div64.h&gt;</div><div class='del'>-#include &lt;asm/dpmc.h&gt;</div><div class='del'>-#include &lt;asm/blackfin.h&gt;</div><div class='del'>-#include &lt;asm/cacheflush.h&gt;</div><div class='del'>-#include &lt;asm/portmux.h&gt;</div><div class='del'>-#include &lt;mach/pll.h&gt;</div><div class='del'>-</div><div class='del'>-#include "bfin_mac.h"</div><div class='del'>-</div><div class='del'>-MODULE_AUTHOR("Bryan Wu, Luke Yang");</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_DESCRIPTION(DRV_DESC);</div><div class='del'>-MODULE_ALIAS("platform:bfin_mac");</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_BFIN_MAC_USE_L1)</div><div class='del'>-# define bfin_mac_alloc(dma_handle, size, num)  l1_data_sram_zalloc(size*num)</div><div class='del'>-# define bfin_mac_free(dma_handle, ptr, num)    l1_data_sram_free(ptr)</div><div class='del'>-#else</div><div class='del'>-# define bfin_mac_alloc(dma_handle, size, num) \</div><div class='del'>-	dma_alloc_coherent(NULL, size*num, dma_handle, GFP_KERNEL)</div><div class='del'>-# define bfin_mac_free(dma_handle, ptr, num) \</div><div class='del'>-	dma_free_coherent(NULL, sizeof(*ptr)*num, ptr, dma_handle)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#define PKT_BUF_SZ 1580</div><div class='del'>-</div><div class='del'>-#define MAX_TIMEOUT_CNT	500</div><div class='del'>-</div><div class='del'>-/* pointers to maintain transmit list */</div><div class='del'>-static struct net_dma_desc_tx *tx_list_head;</div><div class='del'>-static struct net_dma_desc_tx *tx_list_tail;</div><div class='del'>-static struct net_dma_desc_rx *rx_list_head;</div><div class='del'>-static struct net_dma_desc_rx *rx_list_tail;</div><div class='del'>-static struct net_dma_desc_rx *current_rx_ptr;</div><div class='del'>-static struct net_dma_desc_tx *current_tx_ptr;</div><div class='del'>-static struct net_dma_desc_tx *tx_desc;</div><div class='del'>-static struct net_dma_desc_rx *rx_desc;</div><div class='del'>-</div><div class='del'>-static void desc_list_free(void)</div><div class='del'>-{</div><div class='del'>-	struct net_dma_desc_rx *r;</div><div class='del'>-	struct net_dma_desc_tx *t;</div><div class='del'>-	int i;</div><div class='del'>-#if !defined(CONFIG_BFIN_MAC_USE_L1)</div><div class='del'>-	dma_addr_t dma_handle = 0;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	if (tx_desc) {</div><div class='del'>-		t = tx_list_head;</div><div class='del'>-		for (i = 0; i &lt; CONFIG_BFIN_TX_DESC_NUM; i++) {</div><div class='del'>-			if (t) {</div><div class='del'>-				if (t-&gt;skb) {</div><div class='del'>-					dev_kfree_skb(t-&gt;skb);</div><div class='del'>-					t-&gt;skb = NULL;</div><div class='del'>-				}</div><div class='del'>-				t = t-&gt;next;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		bfin_mac_free(dma_handle, tx_desc, CONFIG_BFIN_TX_DESC_NUM);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (rx_desc) {</div><div class='del'>-		r = rx_list_head;</div><div class='del'>-		for (i = 0; i &lt; CONFIG_BFIN_RX_DESC_NUM; i++) {</div><div class='del'>-			if (r) {</div><div class='del'>-				if (r-&gt;skb) {</div><div class='del'>-					dev_kfree_skb(r-&gt;skb);</div><div class='del'>-					r-&gt;skb = NULL;</div><div class='del'>-				}</div><div class='del'>-				r = r-&gt;next;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		bfin_mac_free(dma_handle, rx_desc, CONFIG_BFIN_RX_DESC_NUM);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int desc_list_init(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	struct sk_buff *new_skb;</div><div class='del'>-#if !defined(CONFIG_BFIN_MAC_USE_L1)</div><div class='del'>-	/*</div><div class='del'>-	 * This dma_handle is useless in Blackfin dma_alloc_coherent().</div><div class='del'>-	 * The real dma handler is the return value of dma_alloc_coherent().</div><div class='del'>-	 */</div><div class='del'>-	dma_addr_t dma_handle;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	tx_desc = bfin_mac_alloc(&amp;dma_handle,</div><div class='del'>-				sizeof(struct net_dma_desc_tx),</div><div class='del'>-				CONFIG_BFIN_TX_DESC_NUM);</div><div class='del'>-	if (tx_desc == NULL)</div><div class='del'>-		goto init_error;</div><div class='del'>-</div><div class='del'>-	rx_desc = bfin_mac_alloc(&amp;dma_handle,</div><div class='del'>-				sizeof(struct net_dma_desc_rx),</div><div class='del'>-				CONFIG_BFIN_RX_DESC_NUM);</div><div class='del'>-	if (rx_desc == NULL)</div><div class='del'>-		goto init_error;</div><div class='del'>-</div><div class='del'>-	/* init tx_list */</div><div class='del'>-	tx_list_head = tx_list_tail = tx_desc;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; CONFIG_BFIN_TX_DESC_NUM; i++) {</div><div class='del'>-		struct net_dma_desc_tx *t = tx_desc + i;</div><div class='del'>-		struct dma_descriptor *a = &amp;(t-&gt;desc_a);</div><div class='del'>-		struct dma_descriptor *b = &amp;(t-&gt;desc_b);</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * disable DMA</div><div class='del'>-		 * read from memory WNR = 0</div><div class='del'>-		 * wordsize is 32 bits</div><div class='del'>-		 * 6 half words is desc size</div><div class='del'>-		 * large desc flow</div><div class='del'>-		 */</div><div class='del'>-		a-&gt;config = WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;</div><div class='del'>-		a-&gt;start_addr = (unsigned long)t-&gt;packet;</div><div class='del'>-		a-&gt;x_count = 0;</div><div class='del'>-		a-&gt;next_dma_desc = b;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * enabled DMA</div><div class='del'>-		 * write to memory WNR = 1</div><div class='del'>-		 * wordsize is 32 bits</div><div class='del'>-		 * disable interrupt</div><div class='del'>-		 * 6 half words is desc size</div><div class='del'>-		 * large desc flow</div><div class='del'>-		 */</div><div class='del'>-		b-&gt;config = DMAEN | WNR | WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;</div><div class='del'>-		b-&gt;start_addr = (unsigned long)(&amp;(t-&gt;status));</div><div class='del'>-		b-&gt;x_count = 0;</div><div class='del'>-</div><div class='del'>-		t-&gt;skb = NULL;</div><div class='del'>-		tx_list_tail-&gt;desc_b.next_dma_desc = a;</div><div class='del'>-		tx_list_tail-&gt;next = t;</div><div class='del'>-		tx_list_tail = t;</div><div class='del'>-	}</div><div class='del'>-	tx_list_tail-&gt;next = tx_list_head;	/* tx_list is a circle */</div><div class='del'>-	tx_list_tail-&gt;desc_b.next_dma_desc = &amp;(tx_list_head-&gt;desc_a);</div><div class='del'>-	current_tx_ptr = tx_list_head;</div><div class='del'>-</div><div class='del'>-	/* init rx_list */</div><div class='del'>-	rx_list_head = rx_list_tail = rx_desc;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; CONFIG_BFIN_RX_DESC_NUM; i++) {</div><div class='del'>-		struct net_dma_desc_rx *r = rx_desc + i;</div><div class='del'>-		struct dma_descriptor *a = &amp;(r-&gt;desc_a);</div><div class='del'>-		struct dma_descriptor *b = &amp;(r-&gt;desc_b);</div><div class='del'>-</div><div class='del'>-		/* allocate a new skb for next time receive */</div><div class='del'>-		new_skb = netdev_alloc_skb(dev, PKT_BUF_SZ + NET_IP_ALIGN);</div><div class='del'>-		if (!new_skb)</div><div class='del'>-			goto init_error;</div><div class='del'>-</div><div class='del'>-		skb_reserve(new_skb, NET_IP_ALIGN);</div><div class='del'>-		/* Invidate the data cache of skb-&gt;data range when it is write back</div><div class='del'>-		 * cache. It will prevent overwritting the new data from DMA</div><div class='del'>-		 */</div><div class='del'>-		blackfin_dcache_invalidate_range((unsigned long)new_skb-&gt;head,</div><div class='del'>-					 (unsigned long)new_skb-&gt;end);</div><div class='del'>-		r-&gt;skb = new_skb;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * enabled DMA</div><div class='del'>-		 * write to memory WNR = 1</div><div class='del'>-		 * wordsize is 32 bits</div><div class='del'>-		 * disable interrupt</div><div class='del'>-		 * 6 half words is desc size</div><div class='del'>-		 * large desc flow</div><div class='del'>-		 */</div><div class='del'>-		a-&gt;config = DMAEN | WNR | WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;</div><div class='del'>-		/* since RXDWA is enabled */</div><div class='del'>-		a-&gt;start_addr = (unsigned long)new_skb-&gt;data - 2;</div><div class='del'>-		a-&gt;x_count = 0;</div><div class='del'>-		a-&gt;next_dma_desc = b;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * enabled DMA</div><div class='del'>-		 * write to memory WNR = 1</div><div class='del'>-		 * wordsize is 32 bits</div><div class='del'>-		 * enable interrupt</div><div class='del'>-		 * 6 half words is desc size</div><div class='del'>-		 * large desc flow</div><div class='del'>-		 */</div><div class='del'>-		b-&gt;config = DMAEN | WNR | WDSIZE_32 | DI_EN |</div><div class='del'>-				NDSIZE_6 | DMAFLOW_LARGE;</div><div class='del'>-		b-&gt;start_addr = (unsigned long)(&amp;(r-&gt;status));</div><div class='del'>-		b-&gt;x_count = 0;</div><div class='del'>-</div><div class='del'>-		rx_list_tail-&gt;desc_b.next_dma_desc = a;</div><div class='del'>-		rx_list_tail-&gt;next = r;</div><div class='del'>-		rx_list_tail = r;</div><div class='del'>-	}</div><div class='del'>-	rx_list_tail-&gt;next = rx_list_head;	/* rx_list is a circle */</div><div class='del'>-	rx_list_tail-&gt;desc_b.next_dma_desc = &amp;(rx_list_head-&gt;desc_a);</div><div class='del'>-	current_rx_ptr = rx_list_head;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-init_error:</div><div class='del'>-	desc_list_free();</div><div class='del'>-	pr_err("kmalloc failed\n");</div><div class='del'>-	return -ENOMEM;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * MII operations</div><div class='del'>- */</div><div class='del'>-/* Wait until the previous MDC/MDIO transaction has completed */</div><div class='del'>-static int bfin_mdio_poll(void)</div><div class='del'>-{</div><div class='del'>-	int timeout_cnt = MAX_TIMEOUT_CNT;</div><div class='del'>-</div><div class='del'>-	/* poll the STABUSY bit */</div><div class='del'>-	while ((bfin_read_EMAC_STAADD()) &amp; STABUSY) {</div><div class='del'>-		udelay(1);</div><div class='del'>-		if (timeout_cnt-- &lt; 0) {</div><div class='del'>-			pr_err("wait MDC/MDIO transaction to complete timeout\n");</div><div class='del'>-			return -ETIMEDOUT;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Read an off-chip register in a PHY through the MDC/MDIO port */</div><div class='del'>-static int bfin_mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = bfin_mdio_poll();</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	/* read mode */</div><div class='del'>-	bfin_write_EMAC_STAADD(SET_PHYAD((u16) phy_addr) |</div><div class='del'>-				SET_REGAD((u16) regnum) |</div><div class='del'>-				STABUSY);</div><div class='del'>-</div><div class='del'>-	ret = bfin_mdio_poll();</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	return (int) bfin_read_EMAC_STADAT();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Write an off-chip register in a PHY through the MDC/MDIO port */</div><div class='del'>-static int bfin_mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum,</div><div class='del'>-			      u16 value)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = bfin_mdio_poll();</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	bfin_write_EMAC_STADAT((u32) value);</div><div class='del'>-</div><div class='del'>-	/* write mode */</div><div class='del'>-	bfin_write_EMAC_STAADD(SET_PHYAD((u16) phy_addr) |</div><div class='del'>-				SET_REGAD((u16) regnum) |</div><div class='del'>-				STAOP |</div><div class='del'>-				STABUSY);</div><div class='del'>-</div><div class='del'>-	return bfin_mdio_poll();</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void bfin_mac_adjust_link(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct bfin_mac_local *lp = netdev_priv(dev);</div><div class='del'>-	struct phy_device *phydev = lp-&gt;phydev;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	int new_state = 0;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;lp-&gt;lock, flags);</div><div class='del'>-	if (phydev-&gt;link) {</div><div class='del'>-		/* Now we make sure that we can be in full duplex mode.</div><div class='del'>-		 * If not, we operate in half-duplex mode. */</div><div class='del'>-		if (phydev-&gt;duplex != lp-&gt;old_duplex) {</div><div class='del'>-			u32 opmode = bfin_read_EMAC_OPMODE();</div><div class='del'>-			new_state = 1;</div><div class='del'>-</div><div class='del'>-			if (phydev-&gt;duplex)</div><div class='del'>-				opmode |= FDMODE;</div><div class='del'>-			else</div><div class='del'>-				opmode &amp;= ~(FDMODE);</div><div class='del'>-</div><div class='del'>-			bfin_write_EMAC_OPMODE(opmode);</div><div class='del'>-			lp-&gt;old_duplex = phydev-&gt;duplex;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (phydev-&gt;speed != lp-&gt;old_speed) {</div><div class='del'>-			if (phydev-&gt;interface == PHY_INTERFACE_MODE_RMII) {</div><div class='del'>-				u32 opmode = bfin_read_EMAC_OPMODE();</div><div class='del'>-				switch (phydev-&gt;speed) {</div><div class='del'>-				case 10:</div><div class='del'>-					opmode |= RMII_10;</div><div class='del'>-					break;</div><div class='del'>-				case 100:</div><div class='del'>-					opmode &amp;= ~RMII_10;</div><div class='del'>-					break;</div><div class='del'>-				default:</div><div class='del'>-					netdev_warn(dev,</div><div class='del'>-						"Ack! Speed (%d) is not 10/100!\n",</div><div class='del'>-						phydev-&gt;speed);</div><div class='del'>-					break;</div><div class='del'>-				}</div><div class='del'>-				bfin_write_EMAC_OPMODE(opmode);</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			new_state = 1;</div><div class='del'>-			lp-&gt;old_speed = phydev-&gt;speed;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (!lp-&gt;old_link) {</div><div class='del'>-			new_state = 1;</div><div class='del'>-			lp-&gt;old_link = 1;</div><div class='del'>-		}</div><div class='del'>-	} else if (lp-&gt;old_link) {</div><div class='del'>-		new_state = 1;</div><div class='del'>-		lp-&gt;old_link = 0;</div><div class='del'>-		lp-&gt;old_speed = 0;</div><div class='del'>-		lp-&gt;old_duplex = -1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (new_state) {</div><div class='del'>-		u32 opmode = bfin_read_EMAC_OPMODE();</div><div class='del'>-		phy_print_status(phydev);</div><div class='del'>-		pr_debug("EMAC_OPMODE = 0x%08x\n", opmode);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* MDC  = 2.5 MHz */</div><div class='del'>-#define MDC_CLK 2500000</div><div class='del'>-</div><div class='del'>-static int mii_probe(struct net_device *dev, int phy_mode)</div><div class='del'>-{</div><div class='del'>-	struct bfin_mac_local *lp = netdev_priv(dev);</div><div class='del'>-	struct phy_device *phydev = NULL;</div><div class='del'>-	unsigned short sysctl;</div><div class='del'>-	int i;</div><div class='del'>-	u32 sclk, mdc_div;</div><div class='del'>-</div><div class='del'>-	/* Enable PHY output early */</div><div class='del'>-	if (!(bfin_read_VR_CTL() &amp; CLKBUFOE))</div><div class='del'>-		bfin_write_VR_CTL(bfin_read_VR_CTL() | CLKBUFOE);</div><div class='del'>-</div><div class='del'>-	sclk = get_sclk();</div><div class='del'>-	mdc_div = ((sclk / MDC_CLK) / 2) - 1;</div><div class='del'>-</div><div class='del'>-	sysctl = bfin_read_EMAC_SYSCTL();</div><div class='del'>-	sysctl = (sysctl &amp; ~MDCDIV) | SET_MDCDIV(mdc_div);</div><div class='del'>-	bfin_write_EMAC_SYSCTL(sysctl);</div><div class='del'>-</div><div class='del'>-	/* search for connected PHY device */</div><div class='del'>-	for (i = 0; i &lt; PHY_MAX_ADDR; ++i) {</div><div class='del'>-		struct phy_device *const tmp_phydev = lp-&gt;mii_bus-&gt;phy_map[i];</div><div class='del'>-</div><div class='del'>-		if (!tmp_phydev)</div><div class='del'>-			continue; /* no PHY here... */</div><div class='del'>-</div><div class='del'>-		phydev = tmp_phydev;</div><div class='del'>-		break; /* found it */</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* now we are supposed to have a proper phydev, to attach to... */</div><div class='del'>-	if (!phydev) {</div><div class='del'>-		netdev_err(dev, "no phy device found\n");</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (phy_mode != PHY_INTERFACE_MODE_RMII &amp;&amp;</div><div class='del'>-		phy_mode != PHY_INTERFACE_MODE_MII) {</div><div class='del'>-		netdev_err(dev, "invalid phy interface mode\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	phydev = phy_connect(dev, dev_name(&amp;phydev-&gt;dev),</div><div class='del'>-			     &amp;bfin_mac_adjust_link, phy_mode);</div><div class='del'>-</div><div class='del'>-	if (IS_ERR(phydev)) {</div><div class='del'>-		netdev_err(dev, "could not attach PHY\n");</div><div class='del'>-		return PTR_ERR(phydev);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* mask with MAC supported features */</div><div class='del'>-	phydev-&gt;supported &amp;= (SUPPORTED_10baseT_Half</div><div class='del'>-			      | SUPPORTED_10baseT_Full</div><div class='del'>-			      | SUPPORTED_100baseT_Half</div><div class='del'>-			      | SUPPORTED_100baseT_Full</div><div class='del'>-			      | SUPPORTED_Autoneg</div><div class='del'>-			      | SUPPORTED_Pause | SUPPORTED_Asym_Pause</div><div class='del'>-			      | SUPPORTED_MII</div><div class='del'>-			      | SUPPORTED_TP);</div><div class='del'>-</div><div class='del'>-	phydev-&gt;advertising = phydev-&gt;supported;</div><div class='del'>-</div><div class='del'>-	lp-&gt;old_link = 0;</div><div class='del'>-	lp-&gt;old_speed = 0;</div><div class='del'>-	lp-&gt;old_duplex = -1;</div><div class='del'>-	lp-&gt;phydev = phydev;</div><div class='del'>-</div><div class='del'>-	pr_info("attached PHY driver [%s] "</div><div class='del'>-	        "(mii_bus:phy_addr=%s, irq=%d, mdc_clk=%dHz(mdc_div=%d)@sclk=%dMHz)\n",</div><div class='del'>-	        phydev-&gt;drv-&gt;name, dev_name(&amp;phydev-&gt;dev), phydev-&gt;irq,</div><div class='del'>-	        MDC_CLK, mdc_div, sclk/1000000);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Ethtool support</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * interrupt routine for magic packet wakeup</div><div class='del'>- */</div><div class='del'>-static irqreturn_t bfin_mac_wake_interrupt(int irq, void *dev_id)</div><div class='del'>-{</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-bfin_mac_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)</div><div class='del'>-{</div><div class='del'>-	struct bfin_mac_local *lp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	if (lp-&gt;phydev)</div><div class='del'>-		return phy_ethtool_gset(lp-&gt;phydev, cmd);</div><div class='del'>-</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-bfin_mac_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)</div><div class='del'>-{</div><div class='del'>-	struct bfin_mac_local *lp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	if (!capable(CAP_NET_ADMIN))</div><div class='del'>-		return -EPERM;</div><div class='del'>-</div><div class='del'>-	if (lp-&gt;phydev)</div><div class='del'>-		return phy_ethtool_sset(lp-&gt;phydev, cmd);</div><div class='del'>-</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void bfin_mac_ethtool_getdrvinfo(struct net_device *dev,</div><div class='del'>-					struct ethtool_drvinfo *info)</div><div class='del'>-{</div><div class='del'>-	strlcpy(info-&gt;driver, KBUILD_MODNAME, sizeof(info-&gt;driver));</div><div class='del'>-	strlcpy(info-&gt;version, DRV_VERSION, sizeof(info-&gt;version));</div><div class='del'>-	strlcpy(info-&gt;fw_version, "N/A", sizeof(info-&gt;fw_version));</div><div class='del'>-	strlcpy(info-&gt;bus_info, dev_name(&amp;dev-&gt;dev), sizeof(info-&gt;bus_info));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void bfin_mac_ethtool_getwol(struct net_device *dev,</div><div class='del'>-	struct ethtool_wolinfo *wolinfo)</div><div class='del'>-{</div><div class='del'>-	struct bfin_mac_local *lp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	wolinfo-&gt;supported = WAKE_MAGIC;</div><div class='del'>-	wolinfo-&gt;wolopts = lp-&gt;wol;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int bfin_mac_ethtool_setwol(struct net_device *dev,</div><div class='del'>-	struct ethtool_wolinfo *wolinfo)</div><div class='del'>-{</div><div class='del'>-	struct bfin_mac_local *lp = netdev_priv(dev);</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	if (wolinfo-&gt;wolopts &amp; (WAKE_MAGICSECURE |</div><div class='del'>-				WAKE_UCAST |</div><div class='del'>-				WAKE_MCAST |</div><div class='del'>-				WAKE_BCAST |</div><div class='del'>-				WAKE_ARP))</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='del'>-</div><div class='del'>-	lp-&gt;wol = wolinfo-&gt;wolopts;</div><div class='del'>-</div><div class='del'>-	if (lp-&gt;wol &amp;&amp; !lp-&gt;irq_wake_requested) {</div><div class='del'>-		/* register wake irq handler */</div><div class='del'>-		rc = request_irq(IRQ_MAC_WAKEDET, bfin_mac_wake_interrupt,</div><div class='del'>-				 0, "EMAC_WAKE", dev);</div><div class='del'>-		if (rc)</div><div class='del'>-			return rc;</div><div class='del'>-		lp-&gt;irq_wake_requested = true;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!lp-&gt;wol &amp;&amp; lp-&gt;irq_wake_requested) {</div><div class='del'>-		free_irq(IRQ_MAC_WAKEDET, dev);</div><div class='del'>-		lp-&gt;irq_wake_requested = false;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Make sure the PHY driver doesn't suspend */</div><div class='del'>-	device_init_wakeup(&amp;dev-&gt;dev, lp-&gt;wol);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_BFIN_MAC_USE_HWSTAMP</div><div class='del'>-static int bfin_mac_ethtool_get_ts_info(struct net_device *dev,</div><div class='del'>-	struct ethtool_ts_info *info)</div><div class='del'>-{</div><div class='del'>-	struct bfin_mac_local *lp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	info-&gt;so_timestamping =</div><div class='del'>-		SOF_TIMESTAMPING_TX_HARDWARE |</div><div class='del'>-		SOF_TIMESTAMPING_RX_HARDWARE |</div><div class='del'>-		SOF_TIMESTAMPING_RAW_HARDWARE;</div><div class='del'>-	info-&gt;phc_index = lp-&gt;phc_index;</div><div class='del'>-	info-&gt;tx_types =</div><div class='del'>-		(1 &lt;&lt; HWTSTAMP_TX_OFF) |</div><div class='del'>-		(1 &lt;&lt; HWTSTAMP_TX_ON);</div><div class='del'>-	info-&gt;rx_filters =</div><div class='del'>-		(1 &lt;&lt; HWTSTAMP_FILTER_NONE) |</div><div class='del'>-		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V1_L4_EVENT) |</div><div class='del'>-		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |</div><div class='del'>-		(1 &lt;&lt; HWTSTAMP_FILTER_PTP_V2_L4_EVENT);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static const struct ethtool_ops bfin_mac_ethtool_ops = {</div><div class='del'>-	.get_settings = bfin_mac_ethtool_getsettings,</div><div class='del'>-	.set_settings = bfin_mac_ethtool_setsettings,</div><div class='del'>-	.get_link = ethtool_op_get_link,</div><div class='del'>-	.get_drvinfo = bfin_mac_ethtool_getdrvinfo,</div><div class='del'>-	.get_wol = bfin_mac_ethtool_getwol,</div><div class='del'>-	.set_wol = bfin_mac_ethtool_setwol,</div><div class='del'>-#ifdef CONFIG_BFIN_MAC_USE_HWSTAMP</div><div class='del'>-	.get_ts_info = bfin_mac_ethtool_get_ts_info,</div><div class='del'>-#endif</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/**************************************************************************/</div><div class='del'>-static void setup_system_regs(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct bfin_mac_local *lp = netdev_priv(dev);</div><div class='del'>-	int i;</div><div class='del'>-	unsigned short sysctl;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Odd word alignment for Receive Frame DMA word</div><div class='del'>-	 * Configure checksum support and rcve frame word alignment</div><div class='del'>-	 */</div><div class='del'>-	sysctl = bfin_read_EMAC_SYSCTL();</div><div class='del'>-	/*</div><div class='del'>-	 * check if interrupt is requested for any PHY,</div><div class='del'>-	 * enable PHY interrupt only if needed</div><div class='del'>-	 */</div><div class='del'>-	for (i = 0; i &lt; PHY_MAX_ADDR; ++i)</div><div class='del'>-		if (lp-&gt;mii_bus-&gt;irq[i] != PHY_POLL)</div><div class='del'>-			break;</div><div class='del'>-	if (i &lt; PHY_MAX_ADDR)</div><div class='del'>-		sysctl |= PHYIE;</div><div class='del'>-	sysctl |= RXDWA;</div><div class='del'>-#if defined(BFIN_MAC_CSUM_OFFLOAD)</div><div class='del'>-	sysctl |= RXCKS;</div><div class='del'>-#else</div><div class='del'>-	sysctl &amp;= ~RXCKS;</div><div class='del'>-#endif</div><div class='del'>-	bfin_write_EMAC_SYSCTL(sysctl);</div><div class='del'>-</div><div class='del'>-	bfin_write_EMAC_MMC_CTL(RSTC | CROLL);</div><div class='del'>-</div><div class='del'>-	/* Set vlan regs to let 1522 bytes long packets pass through */</div><div class='del'>-	bfin_write_EMAC_VLAN1(lp-&gt;vlan1_mask);</div><div class='del'>-	bfin_write_EMAC_VLAN2(lp-&gt;vlan2_mask);</div><div class='del'>-</div><div class='del'>-	/* Initialize the TX DMA channel registers */</div><div class='del'>-	bfin_write_DMA2_X_COUNT(0);</div><div class='del'>-	bfin_write_DMA2_X_MODIFY(4);</div><div class='del'>-	bfin_write_DMA2_Y_COUNT(0);</div><div class='del'>-	bfin_write_DMA2_Y_MODIFY(0);</div><div class='del'>-</div><div class='del'>-	/* Initialize the RX DMA channel registers */</div><div class='del'>-	bfin_write_DMA1_X_COUNT(0);</div><div class='del'>-	bfin_write_DMA1_X_MODIFY(4);</div><div class='del'>-	bfin_write_DMA1_Y_COUNT(0);</div><div class='del'>-	bfin_write_DMA1_Y_MODIFY(0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void setup_mac_addr(u8 *mac_addr)</div><div class='del'>-{</div><div class='del'>-	u32 addr_low = le32_to_cpu(*(__le32 *) &amp; mac_addr[0]);</div><div class='del'>-	u16 addr_hi = le16_to_cpu(*(__le16 *) &amp; mac_addr[4]);</div><div class='del'>-</div><div class='del'>-	/* this depends on a little-endian machine */</div><div class='del'>-	bfin_write_EMAC_ADDRLO(addr_low);</div><div class='del'>-	bfin_write_EMAC_ADDRHI(addr_hi);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int bfin_mac_set_mac_address(struct net_device *dev, void *p)</div><div class='del'>-{</div><div class='del'>-	struct sockaddr *addr = p;</div><div class='del'>-	if (netif_running(dev))</div><div class='del'>-		return -EBUSY;</div><div class='del'>-	memcpy(dev-&gt;dev_addr, addr-&gt;sa_data, dev-&gt;addr_len);</div><div class='del'>-	setup_mac_addr(dev-&gt;dev_addr);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_BFIN_MAC_USE_HWSTAMP</div><div class='del'>-#define bfin_mac_hwtstamp_is_none(cfg) ((cfg) == HWTSTAMP_FILTER_NONE)</div><div class='del'>-</div><div class='del'>-static u32 bfin_select_phc_clock(u32 input_clk, unsigned int *shift_result)</div><div class='del'>-{</div><div class='del'>-	u32 ipn = 1000000000UL / input_clk;</div><div class='del'>-	u32 ppn = 1;</div><div class='del'>-	unsigned int shift = 0;</div><div class='del'>-</div><div class='del'>-	while (ppn &lt;= ipn) {</div><div class='del'>-		ppn &lt;&lt;= 1;</div><div class='del'>-		shift++;</div><div class='del'>-	}</div><div class='del'>-	*shift_result = shift;</div><div class='del'>-	return 1000000000UL / ppn;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int bfin_mac_hwtstamp_set(struct net_device *netdev,</div><div class='del'>-				 struct ifreq *ifr)</div><div class='del'>-{</div><div class='del'>-	struct hwtstamp_config config;</div><div class='del'>-	struct bfin_mac_local *lp = netdev_priv(netdev);</div><div class='del'>-	u16 ptpctl;</div><div class='del'>-	u32 ptpfv1, ptpfv2, ptpfv3, ptpfoff;</div><div class='del'>-</div><div class='del'>-	if (copy_from_user(&amp;config, ifr-&gt;ifr_data, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	pr_debug("%s config flag:0x%x, tx_type:0x%x, rx_filter:0x%x\n",</div><div class='del'>-			__func__, config.flags, config.tx_type, config.rx_filter);</div><div class='del'>-</div><div class='del'>-	/* reserved for future extensions */</div><div class='del'>-	if (config.flags)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if ((config.tx_type != HWTSTAMP_TX_OFF) &amp;&amp;</div><div class='del'>-			(config.tx_type != HWTSTAMP_TX_ON))</div><div class='del'>-		return -ERANGE;</div><div class='del'>-</div><div class='del'>-	ptpctl = bfin_read_EMAC_PTP_CTL();</div><div class='del'>-</div><div class='del'>-	switch (config.rx_filter) {</div><div class='del'>-	case HWTSTAMP_FILTER_NONE:</div><div class='del'>-		/*</div><div class='del'>-		 * Dont allow any timestamping</div><div class='del'>-		 */</div><div class='del'>-		ptpfv3 = 0xFFFFFFFF;</div><div class='del'>-		bfin_write_EMAC_PTP_FV3(ptpfv3);</div><div class='del'>-		break;</div><div class='del'>-	case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:</div><div class='del'>-	case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:</div><div class='del'>-	case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:</div><div class='del'>-		/*</div><div class='del'>-		 * Clear the five comparison mask bits (bits[12:8]) in EMAC_PTP_CTL)</div><div class='del'>-		 * to enable all the field matches.</div><div class='del'>-		 */</div><div class='del'>-		ptpctl &amp;= ~0x1F00;</div><div class='del'>-		bfin_write_EMAC_PTP_CTL(ptpctl);</div><div class='del'>-		/*</div><div class='del'>-		 * Keep the default values of the EMAC_PTP_FOFF register.</div><div class='del'>-		 */</div><div class='del'>-		ptpfoff = 0x4A24170C;</div><div class='del'>-		bfin_write_EMAC_PTP_FOFF(ptpfoff);</div><div class='del'>-		/*</div><div class='del'>-		 * Keep the default values of the EMAC_PTP_FV1 and EMAC_PTP_FV2</div><div class='del'>-		 * registers.</div><div class='del'>-		 */</div><div class='del'>-		ptpfv1 = 0x11040800;</div><div class='del'>-		bfin_write_EMAC_PTP_FV1(ptpfv1);</div><div class='del'>-		ptpfv2 = 0x0140013F;</div><div class='del'>-		bfin_write_EMAC_PTP_FV2(ptpfv2);</div><div class='del'>-		/*</div><div class='del'>-		 * The default value (0xFFFC) allows the timestamping of both</div><div class='del'>-		 * received Sync messages and Delay_Req messages.</div><div class='del'>-		 */</div><div class='del'>-		ptpfv3 = 0xFFFFFFFC;</div><div class='del'>-		bfin_write_EMAC_PTP_FV3(ptpfv3);</div><div class='del'>-</div><div class='del'>-		config.rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT;</div><div class='del'>-		break;</div><div class='del'>-	case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:</div><div class='del'>-	case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:</div><div class='del'>-	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:</div><div class='del'>-		/* Clear all five comparison mask bits (bits[12:8]) in the</div><div class='del'>-		 * EMAC_PTP_CTL register to enable all the field matches.</div><div class='del'>-		 */</div><div class='del'>-		ptpctl &amp;= ~0x1F00;</div><div class='del'>-		bfin_write_EMAC_PTP_CTL(ptpctl);</div><div class='del'>-		/*</div><div class='del'>-		 * Keep the default values of the EMAC_PTP_FOFF register, except set</div><div class='del'>-		 * the PTPCOF field to 0x2A.</div><div class='del'>-		 */</div><div class='del'>-		ptpfoff = 0x2A24170C;</div><div class='del'>-		bfin_write_EMAC_PTP_FOFF(ptpfoff);</div><div class='del'>-		/*</div><div class='del'>-		 * Keep the default values of the EMAC_PTP_FV1 and EMAC_PTP_FV2</div><div class='del'>-		 * registers.</div><div class='del'>-		 */</div><div class='del'>-		ptpfv1 = 0x11040800;</div><div class='del'>-		bfin_write_EMAC_PTP_FV1(ptpfv1);</div><div class='del'>-		ptpfv2 = 0x0140013F;</div><div class='del'>-		bfin_write_EMAC_PTP_FV2(ptpfv2);</div><div class='del'>-		/*</div><div class='del'>-		 * To allow the timestamping of Pdelay_Req and Pdelay_Resp, set</div><div class='del'>-		 * the value to 0xFFF0.</div><div class='del'>-		 */</div><div class='del'>-		ptpfv3 = 0xFFFFFFF0;</div><div class='del'>-		bfin_write_EMAC_PTP_FV3(ptpfv3);</div><div class='del'>-</div><div class='del'>-		config.rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_EVENT;</div><div class='del'>-		break;</div><div class='del'>-	case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:</div><div class='del'>-	case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:</div><div class='del'>-	case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:</div><div class='del'>-		/*</div><div class='del'>-		 * Clear bits 8 and 12 of the EMAC_PTP_CTL register to enable only the</div><div class='del'>-		 * EFTM and PTPCM field comparison.</div><div class='del'>-		 */</div><div class='del'>-		ptpctl &amp;= ~0x1100;</div><div class='del'>-		bfin_write_EMAC_PTP_CTL(ptpctl);</div><div class='del'>-		/*</div><div class='del'>-		 * Keep the default values of all the fields of the EMAC_PTP_FOFF</div><div class='del'>-		 * register, except set the PTPCOF field to 0x0E.</div><div class='del'>-		 */</div><div class='del'>-		ptpfoff = 0x0E24170C;</div><div class='del'>-		bfin_write_EMAC_PTP_FOFF(ptpfoff);</div><div class='del'>-		/*</div><div class='del'>-		 * Program bits [15:0] of the EMAC_PTP_FV1 register to 0x88F7, which</div><div class='del'>-		 * corresponds to PTP messages on the MAC layer.</div><div class='del'>-		 */</div><div class='del'>-		ptpfv1 = 0x110488F7;</div><div class='del'>-		bfin_write_EMAC_PTP_FV1(ptpfv1);</div><div class='del'>-		ptpfv2 = 0x0140013F;</div><div class='del'>-		bfin_write_EMAC_PTP_FV2(ptpfv2);</div><div class='del'>-		/*</div><div class='del'>-		 * To allow the timestamping of Pdelay_Req and Pdelay_Resp</div><div class='del'>-		 * messages, set the value to 0xFFF0.</div><div class='del'>-		 */</div><div class='del'>-		ptpfv3 = 0xFFFFFFF0;</div><div class='del'>-		bfin_write_EMAC_PTP_FV3(ptpfv3);</div><div class='del'>-</div><div class='del'>-		config.rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT;</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		return -ERANGE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (config.tx_type == HWTSTAMP_TX_OFF &amp;&amp;</div><div class='del'>-	    bfin_mac_hwtstamp_is_none(config.rx_filter)) {</div><div class='del'>-		ptpctl &amp;= ~PTP_EN;</div><div class='del'>-		bfin_write_EMAC_PTP_CTL(ptpctl);</div><div class='del'>-</div><div class='del'>-		SSYNC();</div><div class='del'>-	} else {</div><div class='del'>-		ptpctl |= PTP_EN;</div><div class='del'>-		bfin_write_EMAC_PTP_CTL(ptpctl);</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * clear any existing timestamp</div><div class='del'>-		 */</div><div class='del'>-		bfin_read_EMAC_PTP_RXSNAPLO();</div><div class='del'>-		bfin_read_EMAC_PTP_RXSNAPHI();</div><div class='del'>-</div><div class='del'>-		bfin_read_EMAC_PTP_TXSNAPLO();</div><div class='del'>-		bfin_read_EMAC_PTP_TXSNAPHI();</div><div class='del'>-</div><div class='del'>-		SSYNC();</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	lp-&gt;stamp_cfg = config;</div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;config, sizeof(config)) ?</div><div class='del'>-		-EFAULT : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int bfin_mac_hwtstamp_get(struct net_device *netdev,</div><div class='del'>-				 struct ifreq *ifr)</div><div class='del'>-{</div><div class='del'>-	struct bfin_mac_local *lp = netdev_priv(netdev);</div><div class='del'>-</div><div class='del'>-	return copy_to_user(ifr-&gt;ifr_data, &amp;lp-&gt;stamp_cfg,</div><div class='del'>-			    sizeof(lp-&gt;stamp_cfg)) ?</div><div class='del'>-		-EFAULT : 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void bfin_tx_hwtstamp(struct net_device *netdev, struct sk_buff *skb)</div><div class='del'>-{</div><div class='del'>-	struct bfin_mac_local *lp = netdev_priv(netdev);</div><div class='del'>-</div><div class='del'>-	if (skb_shinfo(skb)-&gt;tx_flags &amp; SKBTX_HW_TSTAMP) {</div><div class='del'>-		int timeout_cnt = MAX_TIMEOUT_CNT;</div><div class='del'>-</div><div class='del'>-		/* When doing time stamping, keep the connection to the socket</div><div class='del'>-		 * a while longer</div><div class='del'>-		 */</div><div class='del'>-		skb_shinfo(skb)-&gt;tx_flags |= SKBTX_IN_PROGRESS;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * The timestamping is done at the EMAC module's MII/RMII interface</div><div class='del'>-		 * when the module sees the Start of Frame of an event message packet. This</div><div class='del'>-		 * interface is the closest possible place to the physical Ethernet transmission</div><div class='del'>-		 * medium, providing the best timing accuracy.</div><div class='del'>-		 */</div><div class='del'>-		while ((!(bfin_read_EMAC_PTP_ISTAT() &amp; TXTL)) &amp;&amp; (--timeout_cnt))</div><div class='del'>-			udelay(1);</div><div class='del'>-		if (timeout_cnt == 0)</div><div class='del'>-			netdev_err(netdev, "timestamp the TX packet failed\n");</div><div class='del'>-		else {</div><div class='del'>-			struct skb_shared_hwtstamps shhwtstamps;</div><div class='del'>-			u64 ns;</div><div class='del'>-			u64 regval;</div><div class='del'>-</div><div class='del'>-			regval = bfin_read_EMAC_PTP_TXSNAPLO();</div><div class='del'>-			regval |= (u64)bfin_read_EMAC_PTP_TXSNAPHI() &lt;&lt; 32;</div><div class='del'>-			memset(&amp;shhwtstamps, 0, sizeof(shhwtstamps));</div><div class='del'>-			ns = regval &lt;&lt; lp-&gt;shift;</div><div class='del'>-			shhwtstamps.hwtstamp = ns_to_ktime(ns);</div><div class='del'>-			skb_tstamp_tx(skb, &amp;shhwtstamps);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void bfin_rx_hwtstamp(struct net_device *netdev, struct sk_buff *skb)</div><div class='del'>-{</div><div class='del'>-	struct bfin_mac_local *lp = netdev_priv(netdev);</div><div class='del'>-	u32 valid;</div><div class='del'>-	u64 regval, ns;</div><div class='del'>-	struct skb_shared_hwtstamps *shhwtstamps;</div><div class='del'>-</div><div class='del'>-	if (bfin_mac_hwtstamp_is_none(lp-&gt;stamp_cfg.rx_filter))</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	valid = bfin_read_EMAC_PTP_ISTAT() &amp; RXEL;</div><div class='del'>-	if (!valid)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	shhwtstamps = skb_hwtstamps(skb);</div><div class='del'>-</div><div class='del'>-	regval = bfin_read_EMAC_PTP_RXSNAPLO();</div><div class='del'>-	regval |= (u64)bfin_read_EMAC_PTP_RXSNAPHI() &lt;&lt; 32;</div><div class='del'>-	ns = regval &lt;&lt; lp-&gt;shift;</div><div class='del'>-	memset(shhwtstamps, 0, sizeof(*shhwtstamps));</div><div class='del'>-	shhwtstamps-&gt;hwtstamp = ns_to_ktime(ns);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void bfin_mac_hwtstamp_init(struct net_device *netdev)</div><div class='del'>-{</div><div class='del'>-	struct bfin_mac_local *lp = netdev_priv(netdev);</div><div class='del'>-	u64 addend, ppb;</div><div class='del'>-	u32 input_clk, phc_clk;</div><div class='del'>-</div><div class='del'>-	/* Initialize hardware timer */</div><div class='del'>-	input_clk = get_sclk();</div><div class='del'>-	phc_clk = bfin_select_phc_clock(input_clk, &amp;lp-&gt;shift);</div><div class='del'>-	addend = phc_clk * (1ULL &lt;&lt; 32);</div><div class='del'>-	do_div(addend, input_clk);</div><div class='del'>-	bfin_write_EMAC_PTP_ADDEND((u32)addend);</div><div class='del'>-</div><div class='del'>-	lp-&gt;addend = addend;</div><div class='del'>-	ppb = 1000000000ULL * input_clk;</div><div class='del'>-	do_div(ppb, phc_clk);</div><div class='del'>-	lp-&gt;max_ppb = ppb - 1000000000ULL - 1ULL;</div><div class='del'>-</div><div class='del'>-	/* Initialize hwstamp config */</div><div class='del'>-	lp-&gt;stamp_cfg.rx_filter = HWTSTAMP_FILTER_NONE;</div><div class='del'>-	lp-&gt;stamp_cfg.tx_type = HWTSTAMP_TX_OFF;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u64 bfin_ptp_time_read(struct bfin_mac_local *lp)</div><div class='del'>-{</div><div class='del'>-	u64 ns;</div><div class='del'>-	u32 lo, hi;</div><div class='del'>-</div><div class='del'>-	lo = bfin_read_EMAC_PTP_TIMELO();</div><div class='del'>-	hi = bfin_read_EMAC_PTP_TIMEHI();</div><div class='del'>-</div><div class='del'>-	ns = ((u64) hi) &lt;&lt; 32;</div><div class='del'>-	ns |= lo;</div><div class='del'>-	ns &lt;&lt;= lp-&gt;shift;</div><div class='del'>-</div><div class='del'>-	return ns;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void bfin_ptp_time_write(struct bfin_mac_local *lp, u64 ns)</div><div class='del'>-{</div><div class='del'>-	u32 hi, lo;</div><div class='del'>-</div><div class='del'>-	ns &gt;&gt;= lp-&gt;shift;</div><div class='del'>-	hi = ns &gt;&gt; 32;</div><div class='del'>-	lo = ns &amp; 0xffffffff;</div><div class='del'>-</div><div class='del'>-	bfin_write_EMAC_PTP_TIMELO(lo);</div><div class='del'>-	bfin_write_EMAC_PTP_TIMEHI(hi);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* PTP Hardware Clock operations */</div><div class='del'>-</div><div class='del'>-static int bfin_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb)</div><div class='del'>-{</div><div class='del'>-	u64 adj;</div><div class='del'>-	u32 diff, addend;</div><div class='del'>-	int neg_adj = 0;</div><div class='del'>-	struct bfin_mac_local *lp =</div><div class='del'>-		container_of(ptp, struct bfin_mac_local, caps);</div><div class='del'>-</div><div class='del'>-	if (ppb &lt; 0) {</div><div class='del'>-		neg_adj = 1;</div><div class='del'>-		ppb = -ppb;</div><div class='del'>-	}</div><div class='del'>-	addend = lp-&gt;addend;</div><div class='del'>-	adj = addend;</div><div class='del'>-	adj *= ppb;</div><div class='del'>-	diff = div_u64(adj, 1000000000ULL);</div><div class='del'>-</div><div class='del'>-	addend = neg_adj ? addend - diff : addend + diff;</div><div class='del'>-</div><div class='del'>-	bfin_write_EMAC_PTP_ADDEND(addend);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int bfin_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)</div><div class='del'>-{</div><div class='del'>-	s64 now;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	struct bfin_mac_local *lp =</div><div class='del'>-		container_of(ptp, struct bfin_mac_local, caps);</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;lp-&gt;phc_lock, flags);</div><div class='del'>-</div><div class='del'>-	now = bfin_ptp_time_read(lp);</div><div class='del'>-	now += delta;</div><div class='del'>-	bfin_ptp_time_write(lp, now);</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(&amp;lp-&gt;phc_lock, flags);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int bfin_ptp_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)</div><div class='del'>-{</div><div class='del'>-	u64 ns;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	struct bfin_mac_local *lp =</div><div class='del'>-		container_of(ptp, struct bfin_mac_local, caps);</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;lp-&gt;phc_lock, flags);</div><div class='del'>-</div><div class='del'>-	ns = bfin_ptp_time_read(lp);</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(&amp;lp-&gt;phc_lock, flags);</div><div class='del'>-</div><div class='del'>-	*ts = ns_to_timespec64(ns);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int bfin_ptp_settime(struct ptp_clock_info *ptp,</div><div class='del'>-			   const struct timespec64 *ts)</div><div class='del'>-{</div><div class='del'>-	u64 ns;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	struct bfin_mac_local *lp =</div><div class='del'>-		container_of(ptp, struct bfin_mac_local, caps);</div><div class='del'>-</div><div class='del'>-	ns = timespec64_to_ns(ts);</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;lp-&gt;phc_lock, flags);</div><div class='del'>-</div><div class='del'>-	bfin_ptp_time_write(lp, ns);</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(&amp;lp-&gt;phc_lock, flags);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int bfin_ptp_enable(struct ptp_clock_info *ptp,</div><div class='del'>-			  struct ptp_clock_request *rq, int on)</div><div class='del'>-{</div><div class='del'>-	return -EOPNOTSUPP;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct ptp_clock_info bfin_ptp_caps = {</div><div class='del'>-	.owner		= THIS_MODULE,</div><div class='del'>-	.name		= "BF518 clock",</div><div class='del'>-	.max_adj	= 0,</div><div class='del'>-	.n_alarm	= 0,</div><div class='del'>-	.n_ext_ts	= 0,</div><div class='del'>-	.n_per_out	= 0,</div><div class='del'>-	.n_pins		= 0,</div><div class='del'>-	.pps		= 0,</div><div class='del'>-	.adjfreq	= bfin_ptp_adjfreq,</div><div class='del'>-	.adjtime	= bfin_ptp_adjtime,</div><div class='del'>-	.gettime64	= bfin_ptp_gettime,</div><div class='del'>-	.settime64	= bfin_ptp_settime,</div><div class='del'>-	.enable		= bfin_ptp_enable,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int bfin_phc_init(struct net_device *netdev, struct device *dev)</div><div class='del'>-{</div><div class='del'>-	struct bfin_mac_local *lp = netdev_priv(netdev);</div><div class='del'>-</div><div class='del'>-	lp-&gt;caps = bfin_ptp_caps;</div><div class='del'>-	lp-&gt;caps.max_adj = lp-&gt;max_ppb;</div><div class='del'>-	lp-&gt;clock = ptp_clock_register(&amp;lp-&gt;caps, dev);</div><div class='del'>-	if (IS_ERR(lp-&gt;clock))</div><div class='del'>-		return PTR_ERR(lp-&gt;clock);</div><div class='del'>-</div><div class='del'>-	lp-&gt;phc_index = ptp_clock_index(lp-&gt;clock);</div><div class='del'>-	spin_lock_init(&amp;lp-&gt;phc_lock);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void bfin_phc_release(struct bfin_mac_local *lp)</div><div class='del'>-{</div><div class='del'>-	ptp_clock_unregister(lp-&gt;clock);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#else</div><div class='del'>-# define bfin_mac_hwtstamp_is_none(cfg) 0</div><div class='del'>-# define bfin_mac_hwtstamp_init(dev)</div><div class='del'>-# define bfin_mac_hwtstamp_set(dev, ifr) (-EOPNOTSUPP)</div><div class='del'>-# define bfin_mac_hwtstamp_get(dev, ifr) (-EOPNOTSUPP)</div><div class='del'>-# define bfin_rx_hwtstamp(dev, skb)</div><div class='del'>-# define bfin_tx_hwtstamp(dev, skb)</div><div class='del'>-# define bfin_phc_init(netdev, dev) 0</div><div class='del'>-# define bfin_phc_release(lp)</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static inline void _tx_reclaim_skb(void)</div><div class='del'>-{</div><div class='del'>-	do {</div><div class='del'>-		tx_list_head-&gt;desc_a.config &amp;= ~DMAEN;</div><div class='del'>-		tx_list_head-&gt;status.status_word = 0;</div><div class='del'>-		if (tx_list_head-&gt;skb) {</div><div class='del'>-			dev_consume_skb_any(tx_list_head-&gt;skb);</div><div class='del'>-			tx_list_head-&gt;skb = NULL;</div><div class='del'>-		}</div><div class='del'>-		tx_list_head = tx_list_head-&gt;next;</div><div class='del'>-</div><div class='del'>-	} while (tx_list_head-&gt;status.status_word != 0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void tx_reclaim_skb(struct bfin_mac_local *lp)</div><div class='del'>-{</div><div class='del'>-	int timeout_cnt = MAX_TIMEOUT_CNT;</div><div class='del'>-</div><div class='del'>-	if (tx_list_head-&gt;status.status_word != 0)</div><div class='del'>-		_tx_reclaim_skb();</div><div class='del'>-</div><div class='del'>-	if (current_tx_ptr-&gt;next == tx_list_head) {</div><div class='del'>-		while (tx_list_head-&gt;status.status_word == 0) {</div><div class='del'>-			/* slow down polling to avoid too many queue stop. */</div><div class='del'>-			udelay(10);</div><div class='del'>-			/* reclaim skb if DMA is not running. */</div><div class='del'>-			if (!(bfin_read_DMA2_IRQ_STATUS() &amp; DMA_RUN))</div><div class='del'>-				break;</div><div class='del'>-			if (timeout_cnt-- &lt; 0)</div><div class='del'>-				break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		if (timeout_cnt &gt;= 0)</div><div class='del'>-			_tx_reclaim_skb();</div><div class='del'>-		else</div><div class='del'>-			netif_stop_queue(lp-&gt;ndev);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (current_tx_ptr-&gt;next != tx_list_head &amp;&amp;</div><div class='del'>-		netif_queue_stopped(lp-&gt;ndev))</div><div class='del'>-		netif_wake_queue(lp-&gt;ndev);</div><div class='del'>-</div><div class='del'>-	if (tx_list_head != current_tx_ptr) {</div><div class='del'>-		/* shorten the timer interval if tx queue is stopped */</div><div class='del'>-		if (netif_queue_stopped(lp-&gt;ndev))</div><div class='del'>-			lp-&gt;tx_reclaim_timer.expires =</div><div class='del'>-				jiffies + (TX_RECLAIM_JIFFIES &gt;&gt; 4);</div><div class='del'>-		else</div><div class='del'>-			lp-&gt;tx_reclaim_timer.expires =</div><div class='del'>-				jiffies + TX_RECLAIM_JIFFIES;</div><div class='del'>-</div><div class='del'>-		mod_timer(&amp;lp-&gt;tx_reclaim_timer,</div><div class='del'>-			lp-&gt;tx_reclaim_timer.expires);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void tx_reclaim_skb_timeout(unsigned long lp)</div><div class='del'>-{</div><div class='del'>-	tx_reclaim_skb((struct bfin_mac_local *)lp);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int bfin_mac_hard_start_xmit(struct sk_buff *skb,</div><div class='del'>-				struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct bfin_mac_local *lp = netdev_priv(dev);</div><div class='del'>-	u16 *data;</div><div class='del'>-	u32 data_align = (unsigned long)(skb-&gt;data) &amp; 0x3;</div><div class='del'>-</div><div class='del'>-	current_tx_ptr-&gt;skb = skb;</div><div class='del'>-</div><div class='del'>-	if (data_align == 0x2) {</div><div class='del'>-		/* move skb-&gt;data to current_tx_ptr payload */</div><div class='del'>-		data = (u16 *)(skb-&gt;data) - 1;</div><div class='del'>-		*data = (u16)(skb-&gt;len);</div><div class='del'>-		/*</div><div class='del'>-		 * When transmitting an Ethernet packet, the PTP_TSYNC module requires</div><div class='del'>-		 * a DMA_Length_Word field associated with the packet. The lower 12 bits</div><div class='del'>-		 * of this field are the length of the packet payload in bytes and the higher</div><div class='del'>-		 * 4 bits are the timestamping enable field.</div><div class='del'>-		 */</div><div class='del'>-		if (skb_shinfo(skb)-&gt;tx_flags &amp; SKBTX_HW_TSTAMP)</div><div class='del'>-			*data |= 0x1000;</div><div class='del'>-</div><div class='del'>-		current_tx_ptr-&gt;desc_a.start_addr = (u32)data;</div><div class='del'>-		/* this is important! */</div><div class='del'>-		blackfin_dcache_flush_range((u32)data,</div><div class='del'>-				(u32)((u8 *)data + skb-&gt;len + 4));</div><div class='del'>-	} else {</div><div class='del'>-		*((u16 *)(current_tx_ptr-&gt;packet)) = (u16)(skb-&gt;len);</div><div class='del'>-		/* enable timestamping for the sent packet */</div><div class='del'>-		if (skb_shinfo(skb)-&gt;tx_flags &amp; SKBTX_HW_TSTAMP)</div><div class='del'>-			*((u16 *)(current_tx_ptr-&gt;packet)) |= 0x1000;</div><div class='del'>-		memcpy((u8 *)(current_tx_ptr-&gt;packet + 2), skb-&gt;data,</div><div class='del'>-			skb-&gt;len);</div><div class='del'>-		current_tx_ptr-&gt;desc_a.start_addr =</div><div class='del'>-			(u32)current_tx_ptr-&gt;packet;</div><div class='del'>-		blackfin_dcache_flush_range(</div><div class='del'>-			(u32)current_tx_ptr-&gt;packet,</div><div class='del'>-			(u32)(current_tx_ptr-&gt;packet + skb-&gt;len + 2));</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* make sure the internal data buffers in the core are drained</div><div class='del'>-	 * so that the DMA descriptors are completely written when the</div><div class='del'>-	 * DMA engine goes to fetch them below</div><div class='del'>-	 */</div><div class='del'>-	SSYNC();</div><div class='del'>-</div><div class='del'>-	/* always clear status buffer before start tx dma */</div><div class='del'>-	current_tx_ptr-&gt;status.status_word = 0;</div><div class='del'>-</div><div class='del'>-	/* enable this packet's dma */</div><div class='del'>-	current_tx_ptr-&gt;desc_a.config |= DMAEN;</div><div class='del'>-</div><div class='del'>-	/* tx dma is running, just return */</div><div class='del'>-	if (bfin_read_DMA2_IRQ_STATUS() &amp; DMA_RUN)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	/* tx dma is not running */</div><div class='del'>-	bfin_write_DMA2_NEXT_DESC_PTR(&amp;(current_tx_ptr-&gt;desc_a));</div><div class='del'>-	/* dma enabled, read from memory, size is 6 */</div><div class='del'>-	bfin_write_DMA2_CONFIG(current_tx_ptr-&gt;desc_a.config);</div><div class='del'>-	/* Turn on the EMAC tx */</div><div class='del'>-	bfin_write_EMAC_OPMODE(bfin_read_EMAC_OPMODE() | TE);</div><div class='del'>-</div><div class='del'>-out:</div><div class='del'>-	bfin_tx_hwtstamp(dev, skb);</div><div class='del'>-</div><div class='del'>-	current_tx_ptr = current_tx_ptr-&gt;next;</div><div class='del'>-	dev-&gt;stats.tx_packets++;</div><div class='del'>-	dev-&gt;stats.tx_bytes += (skb-&gt;len);</div><div class='del'>-</div><div class='del'>-	tx_reclaim_skb(lp);</div><div class='del'>-</div><div class='del'>-	return NETDEV_TX_OK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define IP_HEADER_OFF  0</div><div class='del'>-#define RX_ERROR_MASK (RX_LONG | RX_ALIGN | RX_CRC | RX_LEN | \</div><div class='del'>-	RX_FRAG | RX_ADDR | RX_DMAO | RX_PHY | RX_LATE | RX_RANGE)</div><div class='del'>-</div><div class='del'>-static void bfin_mac_rx(struct bfin_mac_local *lp)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = lp-&gt;ndev;</div><div class='del'>-	struct sk_buff *skb, *new_skb;</div><div class='del'>-	unsigned short len;</div><div class='del'>-#if defined(BFIN_MAC_CSUM_OFFLOAD)</div><div class='del'>-	unsigned int i;</div><div class='del'>-	unsigned char fcs[ETH_FCS_LEN + 1];</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	/* check if frame status word reports an error condition</div><div class='del'>-	 * we which case we simply drop the packet</div><div class='del'>-	 */</div><div class='del'>-	if (current_rx_ptr-&gt;status.status_word &amp; RX_ERROR_MASK) {</div><div class='del'>-		netdev_notice(dev, "rx: receive error - packet dropped\n");</div><div class='del'>-		dev-&gt;stats.rx_dropped++;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* allocate a new skb for next time receive */</div><div class='del'>-	skb = current_rx_ptr-&gt;skb;</div><div class='del'>-</div><div class='del'>-	new_skb = netdev_alloc_skb(dev, PKT_BUF_SZ + NET_IP_ALIGN);</div><div class='del'>-	if (!new_skb) {</div><div class='del'>-		dev-&gt;stats.rx_dropped++;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='del'>-	/* reserve 2 bytes for RXDWA padding */</div><div class='del'>-	skb_reserve(new_skb, NET_IP_ALIGN);</div><div class='del'>-	/* Invidate the data cache of skb-&gt;data range when it is write back</div><div class='del'>-	 * cache. It will prevent overwritting the new data from DMA</div><div class='del'>-	 */</div><div class='del'>-	blackfin_dcache_invalidate_range((unsigned long)new_skb-&gt;head,</div><div class='del'>-					 (unsigned long)new_skb-&gt;end);</div><div class='del'>-</div><div class='del'>-	current_rx_ptr-&gt;skb = new_skb;</div><div class='del'>-	current_rx_ptr-&gt;desc_a.start_addr = (unsigned long)new_skb-&gt;data - 2;</div><div class='del'>-</div><div class='del'>-	len = (unsigned short)(current_rx_ptr-&gt;status.status_word &amp; RX_FRLEN);</div><div class='del'>-	/* Deduce Ethernet FCS length from Ethernet payload length */</div><div class='del'>-	len -= ETH_FCS_LEN;</div><div class='del'>-	skb_put(skb, len);</div><div class='del'>-</div><div class='del'>-	skb-&gt;protocol = eth_type_trans(skb, dev);</div><div class='del'>-</div><div class='del'>-	bfin_rx_hwtstamp(dev, skb);</div><div class='del'>-</div><div class='del'>-#if defined(BFIN_MAC_CSUM_OFFLOAD)</div><div class='del'>-	/* Checksum offloading only works for IPv4 packets with the standard IP header</div><div class='del'>-	 * length of 20 bytes, because the blackfin MAC checksum calculation is</div><div class='del'>-	 * based on that assumption. We must NOT use the calculated checksum if our</div><div class='del'>-	 * IP version or header break that assumption.</div><div class='del'>-	 */</div><div class='del'>-	if (skb-&gt;data[IP_HEADER_OFF] == 0x45) {</div><div class='del'>-		skb-&gt;csum = current_rx_ptr-&gt;status.ip_payload_csum;</div><div class='del'>-		/*</div><div class='del'>-		 * Deduce Ethernet FCS from hardware generated IP payload checksum.</div><div class='del'>-		 * IP checksum is based on 16-bit one's complement algorithm.</div><div class='del'>-		 * To deduce a value from checksum is equal to add its inversion.</div><div class='del'>-		 * If the IP payload len is odd, the inversed FCS should also</div><div class='del'>-		 * begin from odd address and leave first byte zero.</div><div class='del'>-		 */</div><div class='del'>-		if (skb-&gt;len % 2) {</div><div class='del'>-			fcs[0] = 0;</div><div class='del'>-			for (i = 0; i &lt; ETH_FCS_LEN; i++)</div><div class='del'>-				fcs[i + 1] = ~skb-&gt;data[skb-&gt;len + i];</div><div class='del'>-			skb-&gt;csum = csum_partial(fcs, ETH_FCS_LEN + 1, skb-&gt;csum);</div><div class='del'>-		} else {</div><div class='del'>-			for (i = 0; i &lt; ETH_FCS_LEN; i++)</div><div class='del'>-				fcs[i] = ~skb-&gt;data[skb-&gt;len + i];</div><div class='del'>-			skb-&gt;csum = csum_partial(fcs, ETH_FCS_LEN, skb-&gt;csum);</div><div class='del'>-		}</div><div class='del'>-		skb-&gt;ip_summed = CHECKSUM_COMPLETE;</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	napi_gro_receive(&amp;lp-&gt;napi, skb);</div><div class='del'>-</div><div class='del'>-	dev-&gt;stats.rx_packets++;</div><div class='del'>-	dev-&gt;stats.rx_bytes += len;</div><div class='del'>-out:</div><div class='del'>-	current_rx_ptr-&gt;status.status_word = 0x00000000;</div><div class='del'>-	current_rx_ptr = current_rx_ptr-&gt;next;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int bfin_mac_poll(struct napi_struct *napi, int budget)</div><div class='del'>-{</div><div class='del'>-	int i = 0;</div><div class='del'>-	struct bfin_mac_local *lp = container_of(napi,</div><div class='del'>-						 struct bfin_mac_local,</div><div class='del'>-						 napi);</div><div class='del'>-</div><div class='del'>-	while (current_rx_ptr-&gt;status.status_word != 0 &amp;&amp; i &lt; budget) {</div><div class='del'>-		bfin_mac_rx(lp);</div><div class='del'>-		i++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (i &lt; budget) {</div><div class='del'>-		napi_complete(napi);</div><div class='del'>-		if (test_and_clear_bit(BFIN_MAC_RX_IRQ_DISABLED, &amp;lp-&gt;flags))</div><div class='del'>-			enable_irq(IRQ_MAC_RX);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return i;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* interrupt routine to handle rx and error signal */</div><div class='del'>-static irqreturn_t bfin_mac_interrupt(int irq, void *dev_id)</div><div class='del'>-{</div><div class='del'>-	struct bfin_mac_local *lp = netdev_priv(dev_id);</div><div class='del'>-	u32 status;</div><div class='del'>-</div><div class='del'>-	status = bfin_read_DMA1_IRQ_STATUS();</div><div class='del'>-</div><div class='del'>-	bfin_write_DMA1_IRQ_STATUS(status | DMA_DONE | DMA_ERR);</div><div class='del'>-	if (status &amp; DMA_DONE) {</div><div class='del'>-		disable_irq_nosync(IRQ_MAC_RX);</div><div class='del'>-		set_bit(BFIN_MAC_RX_IRQ_DISABLED, &amp;lp-&gt;flags);</div><div class='del'>-		napi_schedule(&amp;lp-&gt;napi);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='del'>-static void bfin_mac_poll_controller(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct bfin_mac_local *lp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	bfin_mac_interrupt(IRQ_MAC_RX, dev);</div><div class='del'>-	tx_reclaim_skb(lp);</div><div class='del'>-}</div><div class='del'>-#endif				/* CONFIG_NET_POLL_CONTROLLER */</div><div class='del'>-</div><div class='del'>-static void bfin_mac_disable(void)</div><div class='del'>-{</div><div class='del'>-	unsigned int opmode;</div><div class='del'>-</div><div class='del'>-	opmode = bfin_read_EMAC_OPMODE();</div><div class='del'>-	opmode &amp;= (~RE);</div><div class='del'>-	opmode &amp;= (~TE);</div><div class='del'>-	/* Turn off the EMAC */</div><div class='del'>-	bfin_write_EMAC_OPMODE(opmode);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Enable Interrupts, Receive, and Transmit</div><div class='del'>- */</div><div class='del'>-static int bfin_mac_enable(struct phy_device *phydev)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-	u32 opmode;</div><div class='del'>-</div><div class='del'>-	pr_debug("%s\n", __func__);</div><div class='del'>-</div><div class='del'>-	/* Set RX DMA */</div><div class='del'>-	bfin_write_DMA1_NEXT_DESC_PTR(&amp;(rx_list_head-&gt;desc_a));</div><div class='del'>-	bfin_write_DMA1_CONFIG(rx_list_head-&gt;desc_a.config);</div><div class='del'>-</div><div class='del'>-	/* Wait MII done */</div><div class='del'>-	ret = bfin_mdio_poll();</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	/* We enable only RX here */</div><div class='del'>-	/* ASTP   : Enable Automatic Pad Stripping</div><div class='del'>-	   PR     : Promiscuous Mode for test</div><div class='del'>-	   PSF    : Receive frames with total length less than 64 bytes.</div><div class='del'>-	   FDMODE : Full Duplex Mode</div><div class='del'>-	   LB     : Internal Loopback for test</div><div class='del'>-	   RE     : Receiver Enable */</div><div class='del'>-	opmode = bfin_read_EMAC_OPMODE();</div><div class='del'>-	if (opmode &amp; FDMODE)</div><div class='del'>-		opmode |= PSF;</div><div class='del'>-	else</div><div class='del'>-		opmode |= DRO | DC | PSF;</div><div class='del'>-	opmode |= RE;</div><div class='del'>-</div><div class='del'>-	if (phydev-&gt;interface == PHY_INTERFACE_MODE_RMII) {</div><div class='del'>-		opmode |= RMII; /* For Now only 100MBit are supported */</div><div class='del'>-#if defined(CONFIG_BF537) || defined(CONFIG_BF536)</div><div class='del'>-		if (__SILICON_REVISION__ &lt; 3) {</div><div class='del'>-			/*</div><div class='del'>-			 * This isn't publicly documented (fun times!), but in</div><div class='del'>-			 * silicon &lt;=0.2, the RX and TX pins are clocked together.</div><div class='del'>-			 * So in order to recv, we must enable the transmit side</div><div class='del'>-			 * as well.  This will cause a spurious TX interrupt too,</div><div class='del'>-			 * but we can easily consume that.</div><div class='del'>-			 */</div><div class='del'>-			opmode |= TE;</div><div class='del'>-		}</div><div class='del'>-#endif</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Turn on the EMAC rx */</div><div class='del'>-	bfin_write_EMAC_OPMODE(opmode);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* Our watchdog timed out. Called by the networking layer */</div><div class='del'>-static void bfin_mac_timeout(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct bfin_mac_local *lp = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	pr_debug("%s: %s\n", dev-&gt;name, __func__);</div><div class='del'>-</div><div class='del'>-	bfin_mac_disable();</div><div class='del'>-</div><div class='del'>-	del_timer(&amp;lp-&gt;tx_reclaim_timer);</div><div class='del'>-</div><div class='del'>-	/* reset tx queue and free skb */</div><div class='del'>-	while (tx_list_head != current_tx_ptr) {</div><div class='del'>-		tx_list_head-&gt;desc_a.config &amp;= ~DMAEN;</div><div class='del'>-		tx_list_head-&gt;status.status_word = 0;</div><div class='del'>-		if (tx_list_head-&gt;skb) {</div><div class='del'>-			dev_kfree_skb(tx_list_head-&gt;skb);</div><div class='del'>-			tx_list_head-&gt;skb = NULL;</div><div class='del'>-		}</div><div class='del'>-		tx_list_head = tx_list_head-&gt;next;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (netif_queue_stopped(dev))</div><div class='del'>-		netif_wake_queue(dev);</div><div class='del'>-</div><div class='del'>-	bfin_mac_enable(lp-&gt;phydev);</div><div class='del'>-</div><div class='del'>-	/* We can accept TX packets again */</div><div class='del'>-	dev-&gt;trans_start = jiffies; /* prevent tx timeout */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void bfin_mac_multicast_hash(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	u32 emac_hashhi, emac_hashlo;</div><div class='del'>-	struct netdev_hw_addr *ha;</div><div class='del'>-	u32 crc;</div><div class='del'>-</div><div class='del'>-	emac_hashhi = emac_hashlo = 0;</div><div class='del'>-</div><div class='del'>-	netdev_for_each_mc_addr(ha, dev) {</div><div class='del'>-		crc = ether_crc(ETH_ALEN, ha-&gt;addr);</div><div class='del'>-		crc &gt;&gt;= 26;</div><div class='del'>-</div><div class='del'>-		if (crc &amp; 0x20)</div><div class='del'>-			emac_hashhi |= 1 &lt;&lt; (crc &amp; 0x1f);</div><div class='del'>-		else</div><div class='del'>-			emac_hashlo |= 1 &lt;&lt; (crc &amp; 0x1f);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	bfin_write_EMAC_HASHHI(emac_hashhi);</div><div class='del'>-	bfin_write_EMAC_HASHLO(emac_hashlo);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * This routine will, depending on the values passed to it,</div><div class='del'>- * either make it accept multicast packets, go into</div><div class='del'>- * promiscuous mode (for TCPDUMP and cousins) or accept</div><div class='del'>- * a select set of multicast packets</div><div class='del'>- */</div><div class='del'>-static void bfin_mac_set_multicast_list(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	u32 sysctl;</div><div class='del'>-</div><div class='del'>-	if (dev-&gt;flags &amp; IFF_PROMISC) {</div><div class='del'>-		netdev_info(dev, "set promisc mode\n");</div><div class='del'>-		sysctl = bfin_read_EMAC_OPMODE();</div><div class='del'>-		sysctl |= PR;</div><div class='del'>-		bfin_write_EMAC_OPMODE(sysctl);</div><div class='del'>-	} else if (dev-&gt;flags &amp; IFF_ALLMULTI) {</div><div class='del'>-		/* accept all multicast */</div><div class='del'>-		sysctl = bfin_read_EMAC_OPMODE();</div><div class='del'>-		sysctl |= PAM;</div><div class='del'>-		bfin_write_EMAC_OPMODE(sysctl);</div><div class='del'>-	} else if (!netdev_mc_empty(dev)) {</div><div class='del'>-		/* set up multicast hash table */</div><div class='del'>-		sysctl = bfin_read_EMAC_OPMODE();</div><div class='del'>-		sysctl |= HM;</div><div class='del'>-		bfin_write_EMAC_OPMODE(sysctl);</div><div class='del'>-		bfin_mac_multicast_hash(dev);</div><div class='del'>-	} else {</div><div class='del'>-		/* clear promisc or multicast mode */</div><div class='del'>-		sysctl = bfin_read_EMAC_OPMODE();</div><div class='del'>-		sysctl &amp;= ~(RAF | PAM);</div><div class='del'>-		bfin_write_EMAC_OPMODE(sysctl);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int bfin_mac_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)</div><div class='del'>-{</div><div class='del'>-	struct bfin_mac_local *lp = netdev_priv(netdev);</div><div class='del'>-</div><div class='del'>-	if (!netif_running(netdev))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case SIOCSHWTSTAMP:</div><div class='del'>-		return bfin_mac_hwtstamp_set(netdev, ifr);</div><div class='del'>-	case SIOCGHWTSTAMP:</div><div class='del'>-		return bfin_mac_hwtstamp_get(netdev, ifr);</div><div class='del'>-	default:</div><div class='del'>-		if (lp-&gt;phydev)</div><div class='del'>-			return phy_mii_ioctl(lp-&gt;phydev, ifr, cmd);</div><div class='del'>-		else</div><div class='del'>-			return -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * this puts the device in an inactive state</div><div class='del'>- */</div><div class='del'>-static void bfin_mac_shutdown(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	/* Turn off the EMAC */</div><div class='del'>-	bfin_write_EMAC_OPMODE(0x00000000);</div><div class='del'>-	/* Turn off the EMAC RX DMA */</div><div class='del'>-	bfin_write_DMA1_CONFIG(0x0000);</div><div class='del'>-	bfin_write_DMA2_CONFIG(0x0000);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Open and Initialize the interface</div><div class='del'>- *</div><div class='del'>- * Set up everything, reset the card, etc..</div><div class='del'>- */</div><div class='del'>-static int bfin_mac_open(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct bfin_mac_local *lp = netdev_priv(dev);</div><div class='del'>-	int ret;</div><div class='del'>-	pr_debug("%s: %s\n", dev-&gt;name, __func__);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Check that the address is valid.  If its not, refuse</div><div class='del'>-	 * to bring the device up.  The user must specify an</div><div class='del'>-	 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx</div><div class='del'>-	 */</div><div class='del'>-	if (!is_valid_ether_addr(dev-&gt;dev_addr)) {</div><div class='del'>-		netdev_warn(dev, "no valid ethernet hw addr\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* initial rx and tx list */</div><div class='del'>-	ret = desc_list_init(dev);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	phy_start(lp-&gt;phydev);</div><div class='del'>-	setup_system_regs(dev);</div><div class='del'>-	setup_mac_addr(dev-&gt;dev_addr);</div><div class='del'>-</div><div class='del'>-	bfin_mac_disable();</div><div class='del'>-	ret = bfin_mac_enable(lp-&gt;phydev);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-	pr_debug("hardware init finished\n");</div><div class='del'>-</div><div class='del'>-	napi_enable(&amp;lp-&gt;napi);</div><div class='del'>-	netif_start_queue(dev);</div><div class='del'>-	netif_carrier_on(dev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * this makes the board clean up everything that it can</div><div class='del'>- * and not talk to the outside world.   Caused by</div><div class='del'>- * an 'ifconfig ethX down'</div><div class='del'>- */</div><div class='del'>-static int bfin_mac_close(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct bfin_mac_local *lp = netdev_priv(dev);</div><div class='del'>-	pr_debug("%s: %s\n", dev-&gt;name, __func__);</div><div class='del'>-</div><div class='del'>-	netif_stop_queue(dev);</div><div class='del'>-	napi_disable(&amp;lp-&gt;napi);</div><div class='del'>-	netif_carrier_off(dev);</div><div class='del'>-</div><div class='del'>-	phy_stop(lp-&gt;phydev);</div><div class='del'>-	phy_write(lp-&gt;phydev, MII_BMCR, BMCR_PDOWN);</div><div class='del'>-</div><div class='del'>-	/* clear everything */</div><div class='del'>-	bfin_mac_shutdown(dev);</div><div class='del'>-</div><div class='del'>-	/* free the rx/tx buffers */</div><div class='del'>-	desc_list_free();</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct net_device_ops bfin_mac_netdev_ops = {</div><div class='del'>-	.ndo_open		= bfin_mac_open,</div><div class='del'>-	.ndo_stop		= bfin_mac_close,</div><div class='del'>-	.ndo_start_xmit		= bfin_mac_hard_start_xmit,</div><div class='del'>-	.ndo_set_mac_address	= bfin_mac_set_mac_address,</div><div class='del'>-	.ndo_tx_timeout		= bfin_mac_timeout,</div><div class='del'>-	.ndo_set_rx_mode	= bfin_mac_set_multicast_list,</div><div class='del'>-	.ndo_do_ioctl           = bfin_mac_ioctl,</div><div class='del'>-	.ndo_validate_addr	= eth_validate_addr,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='del'>-#ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='del'>-	.ndo_poll_controller	= bfin_mac_poll_controller,</div><div class='del'>-#endif</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int bfin_mac_probe(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	struct net_device *ndev;</div><div class='del'>-	struct bfin_mac_local *lp;</div><div class='del'>-	struct platform_device *pd;</div><div class='del'>-	struct bfin_mii_bus_platform_data *mii_bus_data;</div><div class='del'>-	int rc;</div><div class='del'>-</div><div class='del'>-	ndev = alloc_etherdev(sizeof(struct bfin_mac_local));</div><div class='del'>-	if (!ndev)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	SET_NETDEV_DEV(ndev, &amp;pdev-&gt;dev);</div><div class='del'>-	platform_set_drvdata(pdev, ndev);</div><div class='del'>-	lp = netdev_priv(ndev);</div><div class='del'>-	lp-&gt;ndev = ndev;</div><div class='del'>-</div><div class='del'>-	/* Grab the MAC address in the MAC */</div><div class='del'>-	*(__le32 *) (&amp;(ndev-&gt;dev_addr[0])) = cpu_to_le32(bfin_read_EMAC_ADDRLO());</div><div class='del'>-	*(__le16 *) (&amp;(ndev-&gt;dev_addr[4])) = cpu_to_le16((u16) bfin_read_EMAC_ADDRHI());</div><div class='del'>-</div><div class='del'>-	/* probe mac */</div><div class='del'>-	/*todo: how to proble? which is revision_register */</div><div class='del'>-	bfin_write_EMAC_ADDRLO(0x12345678);</div><div class='del'>-	if (bfin_read_EMAC_ADDRLO() != 0x12345678) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "Cannot detect Blackfin on-chip ethernet MAC controller!\n");</div><div class='del'>-		rc = -ENODEV;</div><div class='del'>-		goto out_err_probe_mac;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Is it valid? (Did bootloader initialize it?)</div><div class='del'>-	 * Grab the MAC from the board somehow</div><div class='del'>-	 * this is done in the arch/blackfin/mach-bfxxx/boards/eth_mac.c</div><div class='del'>-	 */</div><div class='del'>-	if (!is_valid_ether_addr(ndev-&gt;dev_addr)) {</div><div class='del'>-		if (bfin_get_ether_addr(ndev-&gt;dev_addr) ||</div><div class='del'>-		     !is_valid_ether_addr(ndev-&gt;dev_addr)) {</div><div class='del'>-			/* Still not valid, get a random one */</div><div class='del'>-			netdev_warn(ndev, "Setting Ethernet MAC to a random one\n");</div><div class='del'>-			eth_hw_addr_random(ndev);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	setup_mac_addr(ndev-&gt;dev_addr);</div><div class='del'>-</div><div class='del'>-	if (!dev_get_platdata(&amp;pdev-&gt;dev)) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "Cannot get platform device bfin_mii_bus!\n");</div><div class='del'>-		rc = -ENODEV;</div><div class='del'>-		goto out_err_probe_mac;</div><div class='del'>-	}</div><div class='del'>-	pd = dev_get_platdata(&amp;pdev-&gt;dev);</div><div class='del'>-	lp-&gt;mii_bus = platform_get_drvdata(pd);</div><div class='del'>-	if (!lp-&gt;mii_bus) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "Cannot get mii_bus!\n");</div><div class='del'>-		rc = -ENODEV;</div><div class='del'>-		goto out_err_probe_mac;</div><div class='del'>-	}</div><div class='del'>-	lp-&gt;mii_bus-&gt;priv = ndev;</div><div class='del'>-	mii_bus_data = dev_get_platdata(&amp;pd-&gt;dev);</div><div class='del'>-</div><div class='del'>-	rc = mii_probe(ndev, mii_bus_data-&gt;phy_mode);</div><div class='del'>-	if (rc) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "MII Probe failed!\n");</div><div class='del'>-		goto out_err_mii_probe;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	lp-&gt;vlan1_mask = ETH_P_8021Q | mii_bus_data-&gt;vlan1_mask;</div><div class='del'>-	lp-&gt;vlan2_mask = ETH_P_8021Q | mii_bus_data-&gt;vlan2_mask;</div><div class='del'>-</div><div class='del'>-	ndev-&gt;netdev_ops = &amp;bfin_mac_netdev_ops;</div><div class='del'>-	ndev-&gt;ethtool_ops = &amp;bfin_mac_ethtool_ops;</div><div class='del'>-</div><div class='del'>-	init_timer(&amp;lp-&gt;tx_reclaim_timer);</div><div class='del'>-	lp-&gt;tx_reclaim_timer.data = (unsigned long)lp;</div><div class='del'>-	lp-&gt;tx_reclaim_timer.function = tx_reclaim_skb_timeout;</div><div class='del'>-</div><div class='del'>-	lp-&gt;flags = 0;</div><div class='del'>-	netif_napi_add(ndev, &amp;lp-&gt;napi, bfin_mac_poll, CONFIG_BFIN_RX_DESC_NUM);</div><div class='del'>-</div><div class='del'>-	spin_lock_init(&amp;lp-&gt;lock);</div><div class='del'>-</div><div class='del'>-	/* now, enable interrupts */</div><div class='del'>-	/* register irq handler */</div><div class='del'>-	rc = request_irq(IRQ_MAC_RX, bfin_mac_interrupt,</div><div class='del'>-			0, "EMAC_RX", ndev);</div><div class='del'>-	if (rc) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "Cannot request Blackfin MAC RX IRQ!\n");</div><div class='del'>-		rc = -EBUSY;</div><div class='del'>-		goto out_err_request_irq;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	rc = register_netdev(ndev);</div><div class='del'>-	if (rc) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "Cannot register net device!\n");</div><div class='del'>-		goto out_err_reg_ndev;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	bfin_mac_hwtstamp_init(ndev);</div><div class='del'>-	rc = bfin_phc_init(ndev, &amp;pdev-&gt;dev);</div><div class='del'>-	if (rc) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "Cannot register PHC device!\n");</div><div class='del'>-		goto out_err_phc;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* now, print out the card info, in a short format.. */</div><div class='del'>-	netdev_info(ndev, "%s, Version %s\n", DRV_DESC, DRV_VERSION);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-out_err_phc:</div><div class='del'>-out_err_reg_ndev:</div><div class='del'>-	free_irq(IRQ_MAC_RX, ndev);</div><div class='del'>-out_err_request_irq:</div><div class='del'>-	netif_napi_del(&amp;lp-&gt;napi);</div><div class='del'>-out_err_mii_probe:</div><div class='del'>-	mdiobus_unregister(lp-&gt;mii_bus);</div><div class='del'>-	mdiobus_free(lp-&gt;mii_bus);</div><div class='del'>-out_err_probe_mac:</div><div class='del'>-	free_netdev(ndev);</div><div class='del'>-</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int bfin_mac_remove(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	struct net_device *ndev = platform_get_drvdata(pdev);</div><div class='del'>-	struct bfin_mac_local *lp = netdev_priv(ndev);</div><div class='del'>-</div><div class='del'>-	bfin_phc_release(lp);</div><div class='del'>-</div><div class='del'>-	lp-&gt;mii_bus-&gt;priv = NULL;</div><div class='del'>-</div><div class='del'>-	unregister_netdev(ndev);</div><div class='del'>-</div><div class='del'>-	netif_napi_del(&amp;lp-&gt;napi);</div><div class='del'>-</div><div class='del'>-	free_irq(IRQ_MAC_RX, ndev);</div><div class='del'>-</div><div class='del'>-	free_netdev(ndev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_PM</div><div class='del'>-static int bfin_mac_suspend(struct platform_device *pdev, pm_message_t mesg)</div><div class='del'>-{</div><div class='del'>-	struct net_device *net_dev = platform_get_drvdata(pdev);</div><div class='del'>-	struct bfin_mac_local *lp = netdev_priv(net_dev);</div><div class='del'>-</div><div class='del'>-	if (lp-&gt;wol) {</div><div class='del'>-		bfin_write_EMAC_OPMODE((bfin_read_EMAC_OPMODE() &amp; ~TE) | RE);</div><div class='del'>-		bfin_write_EMAC_WKUP_CTL(MPKE);</div><div class='del'>-		enable_irq_wake(IRQ_MAC_WAKEDET);</div><div class='del'>-	} else {</div><div class='del'>-		if (netif_running(net_dev))</div><div class='del'>-			bfin_mac_close(net_dev);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int bfin_mac_resume(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	struct net_device *net_dev = platform_get_drvdata(pdev);</div><div class='del'>-	struct bfin_mac_local *lp = netdev_priv(net_dev);</div><div class='del'>-</div><div class='del'>-	if (lp-&gt;wol) {</div><div class='del'>-		bfin_write_EMAC_OPMODE(bfin_read_EMAC_OPMODE() | TE);</div><div class='del'>-		bfin_write_EMAC_WKUP_CTL(0);</div><div class='del'>-		disable_irq_wake(IRQ_MAC_WAKEDET);</div><div class='del'>-	} else {</div><div class='del'>-		if (netif_running(net_dev))</div><div class='del'>-			bfin_mac_open(net_dev);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-#else</div><div class='del'>-#define bfin_mac_suspend NULL</div><div class='del'>-#define bfin_mac_resume NULL</div><div class='del'>-#endif	/* CONFIG_PM */</div><div class='del'>-</div><div class='del'>-static int bfin_mii_bus_probe(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	struct mii_bus *miibus;</div><div class='del'>-	struct bfin_mii_bus_platform_data *mii_bus_pd;</div><div class='del'>-	const unsigned short *pin_req;</div><div class='del'>-	int rc, i;</div><div class='del'>-</div><div class='del'>-	mii_bus_pd = dev_get_platdata(&amp;pdev-&gt;dev);</div><div class='del'>-	if (!mii_bus_pd) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "No peripherals in platform data!\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * We are setting up a network card,</div><div class='del'>-	 * so set the GPIO pins to Ethernet mode</div><div class='del'>-	 */</div><div class='del'>-	pin_req = mii_bus_pd-&gt;mac_peripherals;</div><div class='del'>-	rc = peripheral_request_list(pin_req, KBUILD_MODNAME);</div><div class='del'>-	if (rc) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "Requesting peripherals failed!\n");</div><div class='del'>-		return rc;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	rc = -ENOMEM;</div><div class='del'>-	miibus = mdiobus_alloc();</div><div class='del'>-	if (miibus == NULL)</div><div class='del'>-		goto out_err_alloc;</div><div class='del'>-	miibus-&gt;read = bfin_mdiobus_read;</div><div class='del'>-	miibus-&gt;write = bfin_mdiobus_write;</div><div class='del'>-</div><div class='del'>-	miibus-&gt;parent = &amp;pdev-&gt;dev;</div><div class='del'>-	miibus-&gt;name = "bfin_mii_bus";</div><div class='del'>-	miibus-&gt;phy_mask = mii_bus_pd-&gt;phy_mask;</div><div class='del'>-</div><div class='del'>-	snprintf(miibus-&gt;id, MII_BUS_ID_SIZE, "%s-%x",</div><div class='del'>-		pdev-&gt;name, pdev-&gt;id);</div><div class='del'>-	miibus-&gt;irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);</div><div class='del'>-	if (!miibus-&gt;irq)</div><div class='del'>-		goto out_err_irq_alloc;</div><div class='del'>-</div><div class='del'>-	for (i = rc; i &lt; PHY_MAX_ADDR; ++i)</div><div class='del'>-		miibus-&gt;irq[i] = PHY_POLL;</div><div class='del'>-</div><div class='del'>-	rc = clamp(mii_bus_pd-&gt;phydev_number, 0, PHY_MAX_ADDR);</div><div class='del'>-	if (rc != mii_bus_pd-&gt;phydev_number)</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "Invalid number (%i) of phydevs\n",</div><div class='del'>-			mii_bus_pd-&gt;phydev_number);</div><div class='del'>-	for (i = 0; i &lt; rc; ++i) {</div><div class='del'>-		unsigned short phyaddr = mii_bus_pd-&gt;phydev_data[i].addr;</div><div class='del'>-		if (phyaddr &lt; PHY_MAX_ADDR)</div><div class='del'>-			miibus-&gt;irq[phyaddr] = mii_bus_pd-&gt;phydev_data[i].irq;</div><div class='del'>-		else</div><div class='del'>-			dev_err(&amp;pdev-&gt;dev,</div><div class='del'>-				"Invalid PHY address %i for phydev %i\n",</div><div class='del'>-				phyaddr, i);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	rc = mdiobus_register(miibus);</div><div class='del'>-	if (rc) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "Cannot register MDIO bus!\n");</div><div class='del'>-		goto out_err_mdiobus_register;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	platform_set_drvdata(pdev, miibus);</div><div class='del'>-	return 0;</div><div class='del'>-</div><div class='del'>-out_err_mdiobus_register:</div><div class='del'>-	kfree(miibus-&gt;irq);</div><div class='del'>-out_err_irq_alloc:</div><div class='del'>-	mdiobus_free(miibus);</div><div class='del'>-out_err_alloc:</div><div class='del'>-	peripheral_free_list(pin_req);</div><div class='del'>-</div><div class='del'>-	return rc;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int bfin_mii_bus_remove(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	struct mii_bus *miibus = platform_get_drvdata(pdev);</div><div class='del'>-	struct bfin_mii_bus_platform_data *mii_bus_pd =</div><div class='del'>-		dev_get_platdata(&amp;pdev-&gt;dev);</div><div class='del'>-</div><div class='del'>-	mdiobus_unregister(miibus);</div><div class='del'>-	kfree(miibus-&gt;irq);</div><div class='del'>-	mdiobus_free(miibus);</div><div class='del'>-	peripheral_free_list(mii_bus_pd-&gt;mac_peripherals);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct platform_driver bfin_mii_bus_driver = {</div><div class='del'>-	.probe = bfin_mii_bus_probe,</div><div class='del'>-	.remove = bfin_mii_bus_remove,</div><div class='del'>-	.driver = {</div><div class='del'>-		.name = "bfin_mii_bus",</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static struct platform_driver bfin_mac_driver = {</div><div class='del'>-	.probe = bfin_mac_probe,</div><div class='del'>-	.remove = bfin_mac_remove,</div><div class='del'>-	.resume = bfin_mac_resume,</div><div class='del'>-	.suspend = bfin_mac_suspend,</div><div class='del'>-	.driver = {</div><div class='del'>-		.name = KBUILD_MODNAME,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init bfin_mac_init(void)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-	ret = platform_driver_register(&amp;bfin_mii_bus_driver);</div><div class='del'>-	if (!ret)</div><div class='del'>-		return platform_driver_register(&amp;bfin_mac_driver);</div><div class='del'>-	return -ENODEV;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(bfin_mac_init);</div><div class='del'>-</div><div class='del'>-static void __exit bfin_mac_cleanup(void)</div><div class='del'>-{</div><div class='del'>-	platform_driver_unregister(&amp;bfin_mac_driver);</div><div class='del'>-	platform_driver_unregister(&amp;bfin_mii_bus_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_exit(bfin_mac_cleanup);</div><div class='del'>-</div><div class='head'>diff --git a/drivers/net/ethernet/adi/bfin_mac.h b/drivers/net/ethernet/adi/bfin_mac.h<br/>deleted file mode 100644<br/>index d1217db70db4..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/adi/bfin_mac.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/adi/bfin_mac.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,112 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Blackfin On-Chip MAC Driver</div><div class='del'>- *</div><div class='del'>- * Copyright 2004-2007 Analog Devices Inc.</div><div class='del'>- *</div><div class='del'>- * Enter bugs at http://blackfin.uclinux.org/</div><div class='del'>- *</div><div class='del'>- * Licensed under the GPL-2 or later.</div><div class='del'>- */</div><div class='del'>-#ifndef _BFIN_MAC_H_</div><div class='del'>-#define _BFIN_MAC_H_</div><div class='del'>-</div><div class='del'>-#include &lt;linux/net_tstamp.h&gt;</div><div class='del'>-#include &lt;linux/ptp_clock_kernel.h&gt;</div><div class='del'>-#include &lt;linux/timer.h&gt;</div><div class='del'>-#include &lt;linux/etherdevice.h&gt;</div><div class='del'>-#include &lt;linux/bfin_mac.h&gt;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Disable hardware checksum for bug #5600 if writeback cache is</div><div class='del'>- * enabled. Otherwize, corrupted RX packet will be sent up stack</div><div class='del'>- * without error mark.</div><div class='del'>- */</div><div class='del'>-#ifndef CONFIG_BFIN_EXTMEM_WRITEBACK</div><div class='del'>-#define BFIN_MAC_CSUM_OFFLOAD</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#define TX_RECLAIM_JIFFIES (HZ / 5)</div><div class='del'>-#define BFIN_MAC_RX_IRQ_DISABLED	1</div><div class='del'>-</div><div class='del'>-struct dma_descriptor {</div><div class='del'>-	struct dma_descriptor *next_dma_desc;</div><div class='del'>-	unsigned long start_addr;</div><div class='del'>-	unsigned short config;</div><div class='del'>-	unsigned short x_count;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct status_area_rx {</div><div class='del'>-#if defined(BFIN_MAC_CSUM_OFFLOAD)</div><div class='del'>-	unsigned short ip_hdr_csum;	/* ip header checksum */</div><div class='del'>-	/* ip payload(udp or tcp or others) checksum */</div><div class='del'>-	unsigned short ip_payload_csum;</div><div class='del'>-#endif</div><div class='del'>-	unsigned long status_word;	/* the frame status word */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct status_area_tx {</div><div class='del'>-	unsigned long status_word;	/* the frame status word */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* use two descriptors for a packet */</div><div class='del'>-struct net_dma_desc_rx {</div><div class='del'>-	struct net_dma_desc_rx *next;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	struct dma_descriptor desc_a;</div><div class='del'>-	struct dma_descriptor desc_b;</div><div class='del'>-	struct status_area_rx status;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/* use two descriptors for a packet */</div><div class='del'>-struct net_dma_desc_tx {</div><div class='del'>-	struct net_dma_desc_tx *next;</div><div class='del'>-	struct sk_buff *skb;</div><div class='del'>-	struct dma_descriptor desc_a;</div><div class='del'>-	struct dma_descriptor desc_b;</div><div class='del'>-	unsigned char packet[1560];</div><div class='del'>-	struct status_area_tx status;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct bfin_mac_local {</div><div class='del'>-	/*</div><div class='del'>-	 * these are things that the kernel wants me to keep, so users</div><div class='del'>-	 * can find out semi-useless statistics of how well the card is</div><div class='del'>-	 * performing</div><div class='del'>-	 */</div><div class='del'>-	struct net_device_stats stats;</div><div class='del'>-</div><div class='del'>-	spinlock_t lock;</div><div class='del'>-</div><div class='del'>-	int wol;		/* Wake On Lan */</div><div class='del'>-	int irq_wake_requested;</div><div class='del'>-	struct timer_list tx_reclaim_timer;</div><div class='del'>-	struct net_device *ndev;</div><div class='del'>-	struct napi_struct napi;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	/* Data for EMAC_VLAN1 regs */</div><div class='del'>-	u16 vlan1_mask, vlan2_mask;</div><div class='del'>-</div><div class='del'>-	/* MII and PHY stuffs */</div><div class='del'>-	int old_link;          /* used by bf537_adjust_link */</div><div class='del'>-	int old_speed;</div><div class='del'>-	int old_duplex;</div><div class='del'>-</div><div class='del'>-	struct phy_device *phydev;</div><div class='del'>-	struct mii_bus *mii_bus;</div><div class='del'>-</div><div class='del'>-#if defined(CONFIG_BFIN_MAC_USE_HWSTAMP)</div><div class='del'>-	u32 addend;</div><div class='del'>-	unsigned int shift;</div><div class='del'>-	s32 max_ppb;</div><div class='del'>-	struct hwtstamp_config stamp_cfg;</div><div class='del'>-	struct ptp_clock_info caps;</div><div class='del'>-	struct ptp_clock *clock;</div><div class='del'>-	int phc_index;</div><div class='del'>-	spinlock_t phc_lock; /* protects time lo/hi registers */</div><div class='del'>-#endif</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-int bfin_get_ether_addr(char *addr);</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/drivers/net/ethernet/aeroflex/Kconfig b/drivers/net/ethernet/aeroflex/Kconfig<br/>index 4f4a8d78fd54..ea4be67f787b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aeroflex/Kconfig?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aeroflex/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aeroflex/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aeroflex/Kconfig</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> #</div><div class='ctx'> # Aeroflex Gaisler network device configuration</div><div class='ctx'> #</div><div class='hunk'>@@ -7,5 +8,5 @@ config GRETH</div><div class='ctx'> 	depends on SPARC</div><div class='ctx'> 	select PHYLIB</div><div class='ctx'> 	select CRC32</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  Say Y here if you want to use the Aeroflex Gaisler GRETH Ethernet MAC.</div><div class='head'>diff --git a/drivers/net/ethernet/aeroflex/Makefile b/drivers/net/ethernet/aeroflex/Makefile<br/>index 6e62a679282f..1b18ef0a5389 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aeroflex/Makefile?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aeroflex/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aeroflex/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aeroflex/Makefile</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> #</div><div class='ctx'> # Makefile for the Aeroflex Gaisler network device drivers.</div><div class='ctx'> #</div><div class='head'>diff --git a/drivers/net/ethernet/aeroflex/greth.c b/drivers/net/ethernet/aeroflex/greth.c<br/>index ae89de7deb13..a593adc16c78 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aeroflex/greth.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aeroflex/greth.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aeroflex/greth.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aeroflex/greth.c</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='ctx'> /*</div><div class='ctx'>  * Aeroflex Gaisler GRETH 10/100/1G Ethernet MAC.</div><div class='ctx'>  *</div><div class='hunk'>@@ -7,16 +8,11 @@</div><div class='ctx'>  * available in the GRLIB VHDL IP core library.</div><div class='ctx'>  *</div><div class='ctx'>  * Full documentation of both cores can be found here:</div><div class='del'>- * http://www.gaisler.com/products/grlib/grip.pdf</div><div class='add'>+ * https://www.gaisler.com/products/grlib/grip.pdf</div><div class='ctx'>  *</div><div class='ctx'>  * The Gigabit version supports scatter/gather DMA, any alignment of</div><div class='ctx'>  * buffers and checksum offloading.</div><div class='ctx'>  *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms of the GNU General Public License as published by the</div><div class='del'>- * Free Software Foundation; either version 2 of the License, or (at your</div><div class='del'>- * option) any later version.</div><div class='del'>- *</div><div class='ctx'>  * Contributors: Kristoffer Glembo</div><div class='ctx'>  *               Daniel Hellstrom</div><div class='ctx'>  *               Marko Isomaki</div><div class='hunk'>@@ -33,8 +29,9 @@</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/crc32.h&gt;</div><div class='ctx'> #include &lt;linux/mii.h&gt;</div><div class='del'>-#include &lt;linux/of_device.h&gt;</div><div class='del'>-#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_net.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/byteorder.h&gt;</div><div class='hunk'>@@ -113,7 +110,7 @@ static void greth_print_tx_packet(struct sk_buff *skb)</div><div class='ctx'> </div><div class='ctx'> 		print_hex_dump(KERN_DEBUG, "TX: ", DUMP_PREFIX_OFFSET, 16, 1,</div><div class='ctx'> 			       skb_frag_address(&amp;skb_shinfo(skb)-&gt;frags[i]),</div><div class='del'>-			       skb_shinfo(skb)-&gt;frags[i].size, true);</div><div class='add'>+			       skb_frag_size(&amp;skb_shinfo(skb)-&gt;frags[i]), true);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -261,6 +258,7 @@ static int greth_init_rings(struct greth_private *greth)</div><div class='ctx'> 			if (dma_mapping_error(greth-&gt;dev, dma_addr)) {</div><div class='ctx'> 				if (netif_msg_ifup(greth))</div><div class='ctx'> 					dev_err(greth-&gt;dev, "Could not create initial DMA mapping\n");</div><div class='add'>+				dev_kfree_skb(skb);</div><div class='ctx'> 				goto cleanup;</div><div class='ctx'> 			}</div><div class='ctx'> 			greth-&gt;rx_skbuff[i] = skb;</div><div class='hunk'>@@ -486,7 +484,7 @@ greth_start_xmit_gbit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(skb-&gt;len &gt; MAX_FRAME_SIZE)) {</div><div class='ctx'> 		dev-&gt;stats.tx_errors++;</div><div class='del'>-		goto out;</div><div class='add'>+		goto len_error;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Save skb pointer. */</div><div class='hunk'>@@ -577,6 +575,7 @@ frag_map_error:</div><div class='ctx'> map_error:</div><div class='ctx'> 	if (net_ratelimit())</div><div class='ctx'> 		dev_warn(greth-&gt;dev, "Could not create TX DMA mapping\n");</div><div class='add'>+len_error:</div><div class='ctx'> 	dev_kfree_skb(skb);</div><div class='ctx'> out:</div><div class='ctx'> 	return err;</div><div class='hunk'>@@ -612,7 +611,6 @@ static irqreturn_t greth_interrupt(int irq, void *dev_id)</div><div class='ctx'> 		napi_schedule(&amp;greth-&gt;napi);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mmiowb();</div><div class='ctx'> 	spin_unlock(&amp;greth-&gt;devlock);</div><div class='ctx'> </div><div class='ctx'> 	return retval;</div><div class='hunk'>@@ -806,7 +804,8 @@ static int greth_rx(struct net_device *dev, int limit)</div><div class='ctx'> 				if (netif_msg_pktdata(greth))</div><div class='ctx'> 					greth_print_rx_packet(phys_to_virt(dma_addr), pkt_len);</div><div class='ctx'> </div><div class='del'>-				memcpy(skb_put(skb, pkt_len), phys_to_virt(dma_addr), pkt_len);</div><div class='add'>+				skb_put_data(skb, phys_to_virt(dma_addr),</div><div class='add'>+					     pkt_len);</div><div class='ctx'> </div><div class='ctx'> 				skb-&gt;protocol = eth_type_trans(skb, dev);</div><div class='ctx'> 				dev-&gt;stats.rx_bytes += pkt_len;</div><div class='hunk'>@@ -1008,7 +1007,7 @@ restart_txrx_poll:</div><div class='ctx'> 			spin_unlock_irqrestore(&amp;greth-&gt;devlock, flags);</div><div class='ctx'> 			goto restart_txrx_poll;</div><div class='ctx'> 		} else {</div><div class='del'>-			__napi_complete(napi);</div><div class='add'>+			napi_complete_done(napi, work_done);</div><div class='ctx'> 			spin_unlock_irqrestore(&amp;greth-&gt;devlock, flags);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1028,7 +1027,7 @@ static int greth_set_mac_add(struct net_device *dev, void *p)</div><div class='ctx'> 	if (!is_valid_ether_addr(addr-&gt;sa_data))</div><div class='ctx'> 		return -EADDRNOTAVAIL;</div><div class='ctx'> </div><div class='del'>-	memcpy(dev-&gt;dev_addr, addr-&gt;sa_data, dev-&gt;addr_len);</div><div class='add'>+	eth_hw_addr_set(dev, addr-&gt;sa_data);</div><div class='ctx'> 	GRETH_REGSAVE(regs-&gt;esa_msb, dev-&gt;dev_addr[0] &lt;&lt; 8 | dev-&gt;dev_addr[1]);</div><div class='ctx'> 	GRETH_REGSAVE(regs-&gt;esa_lsb, dev-&gt;dev_addr[2] &lt;&lt; 24 | dev-&gt;dev_addr[3] &lt;&lt; 16 |</div><div class='ctx'> 		      dev-&gt;dev_addr[4] &lt;&lt; 8 | dev-&gt;dev_addr[5]);</div><div class='hunk'>@@ -1105,27 +1104,6 @@ static void greth_set_msglevel(struct net_device *dev, u32 value)</div><div class='ctx'> 	struct greth_private *greth = netdev_priv(dev);</div><div class='ctx'> 	greth-&gt;msg_enable = value;</div><div class='ctx'> }</div><div class='del'>-static int greth_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)</div><div class='del'>-{</div><div class='del'>-	struct greth_private *greth = netdev_priv(dev);</div><div class='del'>-	struct phy_device *phy = greth-&gt;phy;</div><div class='del'>-</div><div class='del'>-	if (!phy)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	return phy_ethtool_gset(phy, cmd);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int greth_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)</div><div class='del'>-{</div><div class='del'>-	struct greth_private *greth = netdev_priv(dev);</div><div class='del'>-	struct phy_device *phy = greth-&gt;phy;</div><div class='del'>-</div><div class='del'>-	if (!phy)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	return phy_ethtool_sset(phy, cmd);</div><div class='del'>-}</div><div class='ctx'> </div><div class='ctx'> static int greth_get_regs_len(struct net_device *dev)</div><div class='ctx'> {</div><div class='hunk'>@@ -1136,13 +1114,9 @@ static void greth_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *in</div><div class='ctx'> {</div><div class='ctx'> 	struct greth_private *greth = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	strlcpy(info-&gt;driver, dev_driver_string(greth-&gt;dev),</div><div class='add'>+	strscpy(info-&gt;driver, dev_driver_string(greth-&gt;dev),</div><div class='ctx'> 		sizeof(info-&gt;driver));</div><div class='del'>-	strlcpy(info-&gt;version, "revision: 1.0", sizeof(info-&gt;version));</div><div class='del'>-	strlcpy(info-&gt;bus_info, greth-&gt;dev-&gt;bus-&gt;name, sizeof(info-&gt;bus_info));</div><div class='del'>-	strlcpy(info-&gt;fw_version, "N/A", sizeof(info-&gt;fw_version));</div><div class='del'>-	info-&gt;eedump_len = 0;</div><div class='del'>-	info-&gt;regdump_len = sizeof(struct greth_regs);</div><div class='add'>+	strscpy(info-&gt;bus_info, greth-&gt;dev-&gt;bus-&gt;name, sizeof(info-&gt;bus_info));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void greth_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *p)</div><div class='hunk'>@@ -1159,12 +1133,12 @@ static void greth_get_regs(struct net_device *dev, struct ethtool_regs *regs, vo</div><div class='ctx'> static const struct ethtool_ops greth_ethtool_ops = {</div><div class='ctx'> 	.get_msglevel		= greth_get_msglevel,</div><div class='ctx'> 	.set_msglevel		= greth_set_msglevel,</div><div class='del'>-	.get_settings		= greth_get_settings,</div><div class='del'>-	.set_settings		= greth_set_settings,</div><div class='ctx'> 	.get_drvinfo		= greth_get_drvinfo,</div><div class='ctx'> 	.get_regs_len           = greth_get_regs_len,</div><div class='ctx'> 	.get_regs               = greth_get_regs,</div><div class='ctx'> 	.get_link		= ethtool_op_get_link,</div><div class='add'>+	.get_link_ksettings	= phy_ethtool_get_link_ksettings,</div><div class='add'>+	.set_link_ksettings	= phy_ethtool_set_link_ksettings,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static struct net_device_ops greth_netdev_ops = {</div><div class='hunk'>@@ -1226,7 +1200,7 @@ static int greth_mdio_write(struct mii_bus *bus, int phy, int reg, u16 val)</div><div class='ctx'> static void greth_link_change(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct greth_private *greth = netdev_priv(dev);</div><div class='del'>-	struct phy_device *phydev = greth-&gt;phy;</div><div class='add'>+	struct phy_device *phydev = dev-&gt;phydev;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int status_change = 0;</div><div class='ctx'> 	u32 ctrl;</div><div class='hunk'>@@ -1300,33 +1274,24 @@ static int greth_mdio_probe(struct net_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (greth-&gt;gbit_mac)</div><div class='del'>-		phy-&gt;supported &amp;= PHY_GBIT_FEATURES;</div><div class='add'>+		phy_set_max_speed(phy, SPEED_1000);</div><div class='ctx'> 	else</div><div class='del'>-		phy-&gt;supported &amp;= PHY_BASIC_FEATURES;</div><div class='add'>+		phy_set_max_speed(phy, SPEED_100);</div><div class='ctx'> </div><div class='del'>-	phy-&gt;advertising = phy-&gt;supported;</div><div class='add'>+	linkmode_copy(phy-&gt;advertising, phy-&gt;supported);</div><div class='ctx'> </div><div class='ctx'> 	greth-&gt;link = 0;</div><div class='ctx'> 	greth-&gt;speed = 0;</div><div class='ctx'> 	greth-&gt;duplex = -1;</div><div class='del'>-	greth-&gt;phy = phy;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static inline int phy_aneg_done(struct phy_device *phydev)</div><div class='del'>-{</div><div class='del'>-	int retval;</div><div class='del'>-</div><div class='del'>-	retval = phy_read(phydev, MII_BMSR);</div><div class='del'>-</div><div class='del'>-	return (retval &lt; 0) ? retval : (retval &amp; BMSR_ANEGCOMPLETE);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int greth_mdio_init(struct greth_private *greth)</div><div class='ctx'> {</div><div class='del'>-	int ret, phy;</div><div class='add'>+	int ret;</div><div class='ctx'> 	unsigned long timeout;</div><div class='add'>+	struct net_device *ndev = greth-&gt;netdev;</div><div class='ctx'> </div><div class='ctx'> 	greth-&gt;mdio = mdiobus_alloc();</div><div class='ctx'> 	if (!greth-&gt;mdio) {</div><div class='hunk'>@@ -1339,11 +1304,6 @@ static int greth_mdio_init(struct greth_private *greth)</div><div class='ctx'> 	greth-&gt;mdio-&gt;write = greth_mdio_write;</div><div class='ctx'> 	greth-&gt;mdio-&gt;priv = greth;</div><div class='ctx'> </div><div class='del'>-	greth-&gt;mdio-&gt;irq = greth-&gt;mdio_irqs;</div><div class='del'>-</div><div class='del'>-	for (phy = 0; phy &lt; PHY_MAX_ADDR; phy++)</div><div class='del'>-		greth-&gt;mdio-&gt;irq[phy] = PHY_POLL;</div><div class='del'>-</div><div class='ctx'> 	ret = mdiobus_register(greth-&gt;mdio);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		goto error;</div><div class='hunk'>@@ -1356,15 +1316,16 @@ static int greth_mdio_init(struct greth_private *greth)</div><div class='ctx'> 		goto unreg_mdio;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	phy_start(greth-&gt;phy);</div><div class='add'>+	phy_start(ndev-&gt;phydev);</div><div class='ctx'> </div><div class='ctx'> 	/* If Ethernet debug link is used make autoneg happen right away */</div><div class='ctx'> 	if (greth-&gt;edcl &amp;&amp; greth_edcl == 1) {</div><div class='del'>-		phy_start_aneg(greth-&gt;phy);</div><div class='add'>+		phy_start_aneg(ndev-&gt;phydev);</div><div class='ctx'> 		timeout = jiffies + 6*HZ;</div><div class='del'>-		while (!phy_aneg_done(greth-&gt;phy) &amp;&amp; time_before(jiffies, timeout)) {</div><div class='add'>+		while (!phy_aneg_done(ndev-&gt;phydev) &amp;&amp;</div><div class='add'>+		       time_before(jiffies, timeout)) {</div><div class='ctx'> 		}</div><div class='del'>-		phy_read_status(greth-&gt;phy);</div><div class='add'>+		phy_read_status(ndev-&gt;phydev);</div><div class='ctx'> 		greth_link_change(greth-&gt;netdev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1387,6 +1348,7 @@ static int greth_of_probe(struct platform_device *ofdev)</div><div class='ctx'> 	int i;</div><div class='ctx'> 	int err;</div><div class='ctx'> 	int tmp;</div><div class='add'>+	u8 addr[ETH_ALEN];</div><div class='ctx'> 	unsigned long timeout;</div><div class='ctx'> </div><div class='ctx'> 	dev = alloc_etherdev(sizeof(struct greth_private));</div><div class='hunk'>@@ -1467,18 +1429,18 @@ static int greth_of_probe(struct platform_device *ofdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Allocate TX descriptor ring in coherent memory */</div><div class='del'>-	greth-&gt;tx_bd_base = dma_zalloc_coherent(greth-&gt;dev, 1024,</div><div class='del'>-						&amp;greth-&gt;tx_bd_base_phys,</div><div class='del'>-						GFP_KERNEL);</div><div class='add'>+	greth-&gt;tx_bd_base = dma_alloc_coherent(greth-&gt;dev, 1024,</div><div class='add'>+					       &amp;greth-&gt;tx_bd_base_phys,</div><div class='add'>+					       GFP_KERNEL);</div><div class='ctx'> 	if (!greth-&gt;tx_bd_base) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='ctx'> 		goto error3;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Allocate RX descriptor ring in coherent memory */</div><div class='del'>-	greth-&gt;rx_bd_base = dma_zalloc_coherent(greth-&gt;dev, 1024,</div><div class='del'>-						&amp;greth-&gt;rx_bd_base_phys,</div><div class='del'>-						GFP_KERNEL);</div><div class='add'>+	greth-&gt;rx_bd_base = dma_alloc_coherent(greth-&gt;dev, 1024,</div><div class='add'>+					       &amp;greth-&gt;rx_bd_base_phys,</div><div class='add'>+					       GFP_KERNEL);</div><div class='ctx'> 	if (!greth-&gt;rx_bd_base) {</div><div class='ctx'> 		err = -ENOMEM;</div><div class='ctx'> 		goto error4;</div><div class='hunk'>@@ -1490,11 +1452,8 @@ static int greth_of_probe(struct platform_device *ofdev)</div><div class='ctx'> 			break;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (i == 6) {</div><div class='del'>-		const unsigned char *addr;</div><div class='del'>-		int len;</div><div class='del'>-		addr = of_get_property(ofdev-&gt;dev.of_node, "local-mac-address",</div><div class='del'>-					&amp;len);</div><div class='del'>-		if (addr != NULL &amp;&amp; len == 6) {</div><div class='add'>+		err = of_get_mac_address(ofdev-&gt;dev.of_node, addr);</div><div class='add'>+		if (!err) {</div><div class='ctx'> 			for (i = 0; i &lt; 6; i++)</div><div class='ctx'> 				macaddr[i] = (unsigned int) addr[i];</div><div class='ctx'> 		} else {</div><div class='hunk'>@@ -1506,7 +1465,8 @@ static int greth_of_probe(struct platform_device *ofdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; 6; i++)</div><div class='del'>-		dev-&gt;dev_addr[i] = macaddr[i];</div><div class='add'>+		addr[i] = macaddr[i];</div><div class='add'>+	eth_hw_addr_set(dev, addr);</div><div class='ctx'> </div><div class='ctx'> 	macaddr[5]++;</div><div class='ctx'> </div><div class='hunk'>@@ -1549,7 +1509,7 @@ static int greth_of_probe(struct platform_device *ofdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* setup NAPI */</div><div class='del'>-	netif_napi_add(dev, &amp;greth-&gt;napi, greth_poll, 64);</div><div class='add'>+	netif_napi_add(dev, &amp;greth-&gt;napi, greth_poll);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -1566,7 +1526,7 @@ error1:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int greth_of_remove(struct platform_device *of_dev)</div><div class='add'>+static void greth_of_remove(struct platform_device *of_dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *ndev = platform_get_drvdata(of_dev);</div><div class='ctx'> 	struct greth_private *greth = netdev_priv(ndev);</div><div class='hunk'>@@ -1576,16 +1536,15 @@ static int greth_of_remove(struct platform_device *of_dev)</div><div class='ctx'> </div><div class='ctx'> 	dma_free_coherent(&amp;of_dev-&gt;dev, 1024, greth-&gt;tx_bd_base, greth-&gt;tx_bd_base_phys);</div><div class='ctx'> </div><div class='del'>-	if (greth-&gt;phy)</div><div class='del'>-		phy_stop(greth-&gt;phy);</div><div class='add'>+	if (ndev-&gt;phydev)</div><div class='add'>+		phy_stop(ndev-&gt;phydev);</div><div class='ctx'> 	mdiobus_unregister(greth-&gt;mdio);</div><div class='ctx'> </div><div class='ctx'> 	unregister_netdev(ndev);</div><div class='del'>-	free_netdev(ndev);</div><div class='ctx'> </div><div class='ctx'> 	of_iounmap(&amp;of_dev-&gt;resource[0], greth-&gt;regs, resource_size(&amp;of_dev-&gt;resource[0]));</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	free_netdev(ndev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id greth_of_match[] = {</div><div class='head'>diff --git a/drivers/net/ethernet/aeroflex/greth.h b/drivers/net/ethernet/aeroflex/greth.h<br/>index ae16ac94daf8..a1e04c9e932e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aeroflex/greth.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/aeroflex/greth.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aeroflex/greth.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aeroflex/greth.h</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='ctx'> #ifndef GRETH_H</div><div class='ctx'> #define GRETH_H</div><div class='ctx'> </div><div class='hunk'>@@ -123,9 +124,7 @@ struct greth_private {</div><div class='ctx'> 	struct napi_struct napi;</div><div class='ctx'> 	spinlock_t devlock;</div><div class='ctx'> </div><div class='del'>-	struct phy_device *phy;</div><div class='ctx'> 	struct mii_bus *mdio;</div><div class='del'>-	int mdio_irqs[PHY_MAX_ADDR];</div><div class='ctx'> 	unsigned int link;</div><div class='ctx'> 	unsigned int speed;</div><div class='ctx'> 	unsigned int duplex;</div><div class='head'>diff --git a/drivers/net/ethernet/agere/Kconfig b/drivers/net/ethernet/agere/Kconfig<br/>index b6fe9200355a..9cd750184947 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/agere/Kconfig?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/agere/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/agere/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/agere/Kconfig</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> #</div><div class='ctx'> # Agere device configuration</div><div class='ctx'> #</div><div class='hunk'>@@ -6,7 +7,7 @@ config NET_VENDOR_AGERE</div><div class='ctx'> 	bool "Agere devices"</div><div class='ctx'> 	default y</div><div class='ctx'> 	depends on PCI</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  If you have a network (Ethernet) card belonging to this class, say Y.</div><div class='ctx'> </div><div class='ctx'> 	  Note that the answer to this question doesn't directly affect the</div><div class='hunk'>@@ -20,7 +21,8 @@ config ET131X</div><div class='ctx'> 	tristate "Agere ET-1310 Gigabit Ethernet support"</div><div class='ctx'> 	depends on PCI</div><div class='ctx'> 	select PHYLIB</div><div class='del'>-	---help---</div><div class='add'>+	select CRC32</div><div class='add'>+	help</div><div class='ctx'> 	  This driver supports Agere ET-1310 ethernet adapters.</div><div class='ctx'> </div><div class='ctx'> 	  To compile this driver as a module, choose M here. The module</div><div class='head'>diff --git a/drivers/net/ethernet/agere/Makefile b/drivers/net/ethernet/agere/Makefile<br/>index 027ff9453fe1..8dbdf666b994 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/agere/Makefile?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/agere/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/agere/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/agere/Makefile</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> #</div><div class='ctx'> # Makefile for the Agere ET-131x ethernet driver</div><div class='ctx'> #</div><div class='head'>diff --git a/drivers/net/ethernet/agere/et131x.c b/drivers/net/ethernet/agere/et131x.c<br/>index e0f3d197e7f2..5c8217638dda 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/agere/et131x.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/agere/et131x.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/agere/et131x.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/agere/et131x.c</a></div><div class='hunk'>@@ -176,6 +176,8 @@ MODULE_DESCRIPTION("10/100/1000 Base-T Ethernet Driver for the ET1310 by Agere S</div><div class='ctx'> #define NUM_FBRS		2</div><div class='ctx'> </div><div class='ctx'> #define MAX_PACKETS_HANDLED	256</div><div class='add'>+#define ET131X_MIN_MTU		64</div><div class='add'>+#define ET131X_MAX_MTU		9216</div><div class='ctx'> </div><div class='ctx'> #define ALCATEL_MULTICAST_PKT	0x01000000</div><div class='ctx'> #define ALCATEL_BROADCAST_PKT	0x02000000</div><div class='hunk'>@@ -440,7 +442,6 @@ struct et131x_adapter {</div><div class='ctx'> 	struct net_device *netdev;</div><div class='ctx'> 	struct pci_dev *pdev;</div><div class='ctx'> 	struct mii_bus *mii_bus;</div><div class='del'>-	struct phy_device *phydev;</div><div class='ctx'> 	struct napi_struct napi;</div><div class='ctx'> </div><div class='ctx'> 	/* Flags that indicate current state of the adapter */</div><div class='hunk'>@@ -713,11 +714,11 @@ static int et131x_init_eeprom(struct et131x_adapter *adapter)</div><div class='ctx'> 			 * gather additional information that normally would</div><div class='ctx'> 			 * come from the eeprom, like MAC Address</div><div class='ctx'> 			 */</div><div class='del'>-			adapter-&gt;has_eeprom = 0;</div><div class='add'>+			adapter-&gt;has_eeprom = false;</div><div class='ctx'> 			return -EIO;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-	adapter-&gt;has_eeprom = 1;</div><div class='add'>+	adapter-&gt;has_eeprom = true;</div><div class='ctx'> </div><div class='ctx'> 	/* Read the EEPROM for information regarding LED behavior. Refer to</div><div class='ctx'> 	 * et131x_xcvr_init() for its use.</div><div class='hunk'>@@ -864,7 +865,7 @@ static void et1310_config_mac_regs2(struct et131x_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	int32_t delay = 0;</div><div class='ctx'> 	struct mac_regs __iomem *mac = &amp;adapter-&gt;regs-&gt;mac;</div><div class='del'>-	struct phy_device *phydev = adapter-&gt;phydev;</div><div class='add'>+	struct phy_device *phydev = adapter-&gt;netdev-&gt;phydev;</div><div class='ctx'> 	u32 cfg1;</div><div class='ctx'> 	u32 cfg2;</div><div class='ctx'> 	u32 ifctrl;</div><div class='hunk'>@@ -949,7 +950,6 @@ static void et1310_setup_device_for_multicast(struct et131x_adapter *adapter)</div><div class='ctx'> 	u32 hash2 = 0;</div><div class='ctx'> 	u32 hash3 = 0;</div><div class='ctx'> 	u32 hash4 = 0;</div><div class='del'>-	u32 pm_csr;</div><div class='ctx'> </div><div class='ctx'> 	/* If ET131X_PACKET_TYPE_MULTICAST is specified, then we provision</div><div class='ctx'> 	 * the multi-cast LIST.  If it is NOT specified, (and "ALL" is not</div><div class='hunk'>@@ -983,7 +983,6 @@ static void et1310_setup_device_for_multicast(struct et131x_adapter *adapter)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Write out the new hash to the device */</div><div class='del'>-	pm_csr = readl(&amp;adapter-&gt;regs-&gt;global.pm_csr);</div><div class='ctx'> 	if (!et1310_in_phy_coma(adapter)) {</div><div class='ctx'> 		writel(hash1, &amp;rxmac-&gt;multi_hash1);</div><div class='ctx'> 		writel(hash2, &amp;rxmac-&gt;multi_hash2);</div><div class='hunk'>@@ -998,7 +997,6 @@ static void et1310_setup_device_for_unicast(struct et131x_adapter *adapter)</div><div class='ctx'> 	u32 uni_pf1;</div><div class='ctx'> 	u32 uni_pf2;</div><div class='ctx'> 	u32 uni_pf3;</div><div class='del'>-	u32 pm_csr;</div><div class='ctx'> </div><div class='ctx'> 	/* Set up unicast packet filter reg 3 to be the first two octets of</div><div class='ctx'> 	 * the MAC address for both address</div><div class='hunk'>@@ -1024,7 +1022,6 @@ static void et1310_setup_device_for_unicast(struct et131x_adapter *adapter)</div><div class='ctx'> 		  (adapter-&gt;addr[4] &lt;&lt; ET_RX_UNI_PF_ADDR1_5_SHIFT) |</div><div class='ctx'> 		   adapter-&gt;addr[5];</div><div class='ctx'> </div><div class='del'>-	pm_csr = readl(&amp;adapter-&gt;regs-&gt;global.pm_csr);</div><div class='ctx'> 	if (!et1310_in_phy_coma(adapter)) {</div><div class='ctx'> 		writel(uni_pf1, &amp;rxmac-&gt;uni_pf_addr1);</div><div class='ctx'> 		writel(uni_pf2, &amp;rxmac-&gt;uni_pf_addr2);</div><div class='hunk'>@@ -1035,7 +1032,7 @@ static void et1310_setup_device_for_unicast(struct et131x_adapter *adapter)</div><div class='ctx'> static void et1310_config_rxmac_regs(struct et131x_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	struct rxmac_regs __iomem *rxmac = &amp;adapter-&gt;regs-&gt;rxmac;</div><div class='del'>-	struct phy_device *phydev = adapter-&gt;phydev;</div><div class='add'>+	struct phy_device *phydev = adapter-&gt;netdev-&gt;phydev;</div><div class='ctx'> 	u32 sa_lo;</div><div class='ctx'> 	u32 sa_hi = 0;</div><div class='ctx'> 	u32 pf_ctrl = 0;</div><div class='hunk'>@@ -1109,7 +1106,7 @@ static void et1310_config_rxmac_regs(struct et131x_adapter *adapter)</div><div class='ctx'> 	writel(0, &amp;rxmac-&gt;mif_ctrl);</div><div class='ctx'> 	writel(0, &amp;rxmac-&gt;space_avail);</div><div class='ctx'> </div><div class='del'>-	/* Initialize the the mif_ctrl register</div><div class='add'>+	/* Initialize the mif_ctrl register</div><div class='ctx'> 	 * bit 3:  Receive code error. One or more nibbles were signaled as</div><div class='ctx'> 	 *	   errors  during the reception of the packet.  Clear this</div><div class='ctx'> 	 *	   bit in Gigabit, set it in 100Mbit.  This was derived</div><div class='hunk'>@@ -1230,12 +1227,12 @@ out:</div><div class='ctx'> </div><div class='ctx'> static int et131x_mii_read(struct et131x_adapter *adapter, u8 reg, u16 *value)</div><div class='ctx'> {</div><div class='del'>-	struct phy_device *phydev = adapter-&gt;phydev;</div><div class='add'>+	struct phy_device *phydev = adapter-&gt;netdev-&gt;phydev;</div><div class='ctx'> </div><div class='ctx'> 	if (!phydev)</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> </div><div class='del'>-	return et131x_phy_mii_read(adapter, phydev-&gt;addr, reg, value);</div><div class='add'>+	return et131x_phy_mii_read(adapter, phydev-&gt;mdio.addr, reg, value);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int et131x_mii_write(struct et131x_adapter *adapter, u8 addr, u8 reg,</div><div class='hunk'>@@ -1311,7 +1308,7 @@ static void et1310_phy_read_mii_bit(struct et131x_adapter *adapter,</div><div class='ctx'> </div><div class='ctx'> static void et1310_config_flow_control(struct et131x_adapter *adapter)</div><div class='ctx'> {</div><div class='del'>-	struct phy_device *phydev = adapter-&gt;phydev;</div><div class='add'>+	struct phy_device *phydev = adapter-&gt;netdev-&gt;phydev;</div><div class='ctx'> </div><div class='ctx'> 	if (phydev-&gt;duplex == DUPLEX_HALF) {</div><div class='ctx'> 		adapter-&gt;flow = FLOW_NONE;</div><div class='hunk'>@@ -1456,20 +1453,20 @@ static int et131x_mdio_write(struct mii_bus *bus, int phy_addr,</div><div class='ctx'> static void et1310_phy_power_switch(struct et131x_adapter *adapter, bool down)</div><div class='ctx'> {</div><div class='ctx'> 	u16 data;</div><div class='del'>-	struct  phy_device *phydev = adapter-&gt;phydev;</div><div class='add'>+	struct  phy_device *phydev = adapter-&gt;netdev-&gt;phydev;</div><div class='ctx'> </div><div class='ctx'> 	et131x_mii_read(adapter, MII_BMCR, &amp;data);</div><div class='ctx'> 	data &amp;= ~BMCR_PDOWN;</div><div class='ctx'> 	if (down)</div><div class='ctx'> 		data |= BMCR_PDOWN;</div><div class='del'>-	et131x_mii_write(adapter, phydev-&gt;addr, MII_BMCR, data);</div><div class='add'>+	et131x_mii_write(adapter, phydev-&gt;mdio.addr, MII_BMCR, data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* et131x_xcvr_init - Init the phy if we are setting it into force mode */</div><div class='ctx'> static void et131x_xcvr_init(struct et131x_adapter *adapter)</div><div class='ctx'> {</div><div class='ctx'> 	u16 lcr2;</div><div class='del'>-	struct  phy_device *phydev = adapter-&gt;phydev;</div><div class='add'>+	struct  phy_device *phydev = adapter-&gt;netdev-&gt;phydev;</div><div class='ctx'> </div><div class='ctx'> 	/* Set the LED behavior such that LED 1 indicates speed (off =</div><div class='ctx'> 	 * 10Mbits, blink = 100Mbits, on = 1000Mbits) and LED 2 indicates</div><div class='hunk'>@@ -1490,7 +1487,7 @@ static void et131x_xcvr_init(struct et131x_adapter *adapter)</div><div class='ctx'> 		else</div><div class='ctx'> 			lcr2 |= (LED_VAL_LINKON &lt;&lt; LED_TXRX_SHIFT);</div><div class='ctx'> </div><div class='del'>-		et131x_mii_write(adapter, phydev-&gt;addr, PHY_LED_2, lcr2);</div><div class='add'>+		et131x_mii_write(adapter, phydev-&gt;mdio.addr, PHY_LED_2, lcr2);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2111,7 +2108,7 @@ static int et131x_init_recv(struct et131x_adapter *adapter)</div><div class='ctx'> /* et131x_set_rx_dma_timer - Set the heartbeat timer according to line rate */</div><div class='ctx'> static void et131x_set_rx_dma_timer(struct et131x_adapter *adapter)</div><div class='ctx'> {</div><div class='del'>-	struct phy_device *phydev = adapter-&gt;phydev;</div><div class='add'>+	struct phy_device *phydev = adapter-&gt;netdev-&gt;phydev;</div><div class='ctx'> </div><div class='ctx'> 	/* For version B silicon, we do not use the RxDMA timer for 10 and 100</div><div class='ctx'> 	 * Mbits/s line rates. We do not enable and RxDMA interrupt coalescing.</div><div class='hunk'>@@ -2281,7 +2278,7 @@ static struct rfd *nic_rx_pkts(struct et131x_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> 	adapter-&gt;netdev-&gt;stats.rx_bytes += rfd-&gt;len;</div><div class='ctx'> </div><div class='del'>-	memcpy(skb_put(skb, rfd-&gt;len), fbr-&gt;virt[buff_index], rfd-&gt;len);</div><div class='add'>+	skb_put_data(skb, fbr-&gt;virt[buff_index], rfd-&gt;len);</div><div class='ctx'> </div><div class='ctx'> 	skb-&gt;protocol = eth_type_trans(skb, adapter-&gt;netdev);</div><div class='ctx'> 	skb-&gt;ip_summed = CHECKSUM_NONE;</div><div class='hunk'>@@ -2361,7 +2358,7 @@ static int et131x_tx_dma_memory_alloc(struct et131x_adapter *adapter)</div><div class='ctx'> </div><div class='ctx'> 	/* Allocate memory for the TCB's (Transmit Control Block) */</div><div class='ctx'> 	tx_ring-&gt;tcb_ring = kcalloc(NUM_TCB, sizeof(struct tcb),</div><div class='del'>-				    GFP_ATOMIC | GFP_DMA);</div><div class='add'>+				    GFP_KERNEL | GFP_DMA);</div><div class='ctx'> 	if (!tx_ring-&gt;tcb_ring)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -2380,7 +2377,7 @@ static int et131x_tx_dma_memory_alloc(struct et131x_adapter *adapter)</div><div class='ctx'> 						    sizeof(u32),</div><div class='ctx'> 						    &amp;tx_ring-&gt;tx_status_pa,</div><div class='ctx'> 						    GFP_KERNEL);</div><div class='del'>-	if (!tx_ring-&gt;tx_status_pa) {</div><div class='add'>+	if (!tx_ring-&gt;tx_status) {</div><div class='ctx'> 		dev_err(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='ctx'> 			"Cannot alloc memory for Tx status block\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -2416,17 +2413,19 @@ static void et131x_tx_dma_memory_free(struct et131x_adapter *adapter)</div><div class='ctx'> 	kfree(tx_ring-&gt;tcb_ring);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+#define MAX_TX_DESC_PER_PKT 24</div><div class='add'>+</div><div class='ctx'> /* nic_send_packet - NIC specific send handler for version B silicon. */</div><div class='ctx'> static int nic_send_packet(struct et131x_adapter *adapter, struct tcb *tcb)</div><div class='ctx'> {</div><div class='ctx'> 	u32 i;</div><div class='del'>-	struct tx_desc desc[24];</div><div class='add'>+	struct tx_desc desc[MAX_TX_DESC_PER_PKT];</div><div class='ctx'> 	u32 frag = 0;</div><div class='ctx'> 	u32 thiscopy, remainder;</div><div class='ctx'> 	struct sk_buff *skb = tcb-&gt;skb;</div><div class='ctx'> 	u32 nr_frags = skb_shinfo(skb)-&gt;nr_frags + 1;</div><div class='del'>-	struct skb_frag_struct *frags = &amp;skb_shinfo(skb)-&gt;frags[0];</div><div class='del'>-	struct phy_device *phydev = adapter-&gt;phydev;</div><div class='add'>+	skb_frag_t *frags = &amp;skb_shinfo(skb)-&gt;frags[0];</div><div class='add'>+	struct phy_device *phydev = adapter-&gt;netdev-&gt;phydev;</div><div class='ctx'> 	dma_addr_t dma_addr;</div><div class='ctx'> 	struct tx_ring *tx_ring = &amp;adapter-&gt;tx_ring;</div><div class='ctx'> </div><div class='hunk'>@@ -2435,9 +2434,6 @@ static int nic_send_packet(struct et131x_adapter *adapter, struct tcb *tcb)</div><div class='ctx'> 	 * more than 5 fragments.</div><div class='ctx'> 	 */</div><div class='ctx'> </div><div class='del'>-	/* nr_frags should be no more than 18. */</div><div class='del'>-	BUILD_BUG_ON(MAX_SKB_FRAGS + 1 &gt; 23);</div><div class='del'>-</div><div class='ctx'> 	memset(desc, 0, sizeof(struct tx_desc) * (nr_frags + 1));</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; nr_frags; i++) {</div><div class='hunk'>@@ -2463,6 +2459,10 @@ static int nic_send_packet(struct et131x_adapter *adapter, struct tcb *tcb)</div><div class='ctx'> 							  skb-&gt;data,</div><div class='ctx'> 							  skb_headlen(skb),</div><div class='ctx'> 							  DMA_TO_DEVICE);</div><div class='add'>+				if (dma_mapping_error(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='add'>+						      dma_addr))</div><div class='add'>+					return -ENOMEM;</div><div class='add'>+</div><div class='ctx'> 				desc[frag].addr_lo = lower_32_bits(dma_addr);</div><div class='ctx'> 				desc[frag].addr_hi = upper_32_bits(dma_addr);</div><div class='ctx'> 				frag++;</div><div class='hunk'>@@ -2472,6 +2472,10 @@ static int nic_send_packet(struct et131x_adapter *adapter, struct tcb *tcb)</div><div class='ctx'> 							  skb-&gt;data,</div><div class='ctx'> 							  skb_headlen(skb) / 2,</div><div class='ctx'> 							  DMA_TO_DEVICE);</div><div class='add'>+				if (dma_mapping_error(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='add'>+						      dma_addr))</div><div class='add'>+					return -ENOMEM;</div><div class='add'>+</div><div class='ctx'> 				desc[frag].addr_lo = lower_32_bits(dma_addr);</div><div class='ctx'> 				desc[frag].addr_hi = upper_32_bits(dma_addr);</div><div class='ctx'> 				frag++;</div><div class='hunk'>@@ -2482,17 +2486,24 @@ static int nic_send_packet(struct et131x_adapter *adapter, struct tcb *tcb)</div><div class='ctx'> 							  skb_headlen(skb) / 2,</div><div class='ctx'> 							  skb_headlen(skb) / 2,</div><div class='ctx'> 							  DMA_TO_DEVICE);</div><div class='add'>+				if (dma_mapping_error(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='add'>+						      dma_addr))</div><div class='add'>+					goto unmap_first_out;</div><div class='add'>+</div><div class='ctx'> 				desc[frag].addr_lo = lower_32_bits(dma_addr);</div><div class='ctx'> 				desc[frag].addr_hi = upper_32_bits(dma_addr);</div><div class='ctx'> 				frag++;</div><div class='ctx'> 			}</div><div class='ctx'> 		} else {</div><div class='del'>-			desc[frag].len_vlan = frags[i - 1].size;</div><div class='add'>+			desc[frag].len_vlan = skb_frag_size(&amp;frags[i - 1]);</div><div class='ctx'> 			dma_addr = skb_frag_dma_map(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='ctx'> 						    &amp;frags[i - 1],</div><div class='ctx'> 						    0,</div><div class='del'>-						    frags[i - 1].size,</div><div class='add'>+						    desc[frag].len_vlan,</div><div class='ctx'> 						    DMA_TO_DEVICE);</div><div class='add'>+			if (dma_mapping_error(&amp;adapter-&gt;pdev-&gt;dev, dma_addr))</div><div class='add'>+				goto unmap_out;</div><div class='add'>+</div><div class='ctx'> 			desc[frag].addr_lo = lower_32_bits(dma_addr);</div><div class='ctx'> 			desc[frag].addr_hi = upper_32_bits(dma_addr);</div><div class='ctx'> 			frag++;</div><div class='hunk'>@@ -2582,6 +2593,27 @@ static int nic_send_packet(struct et131x_adapter *adapter, struct tcb *tcb)</div><div class='ctx'> 		       &amp;adapter-&gt;regs-&gt;global.watchdog_timer);</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='add'>+</div><div class='add'>+unmap_out:</div><div class='add'>+	// Unmap the body of the packet with map_page</div><div class='add'>+	while (--i) {</div><div class='add'>+		frag--;</div><div class='add'>+		dma_addr = desc[frag].addr_lo;</div><div class='add'>+		dma_addr |= (u64)desc[frag].addr_hi &lt;&lt; 32;</div><div class='add'>+		dma_unmap_page(&amp;adapter-&gt;pdev-&gt;dev, dma_addr,</div><div class='add'>+			       desc[frag].len_vlan, DMA_TO_DEVICE);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+unmap_first_out:</div><div class='add'>+	// Unmap the header with map_single</div><div class='add'>+	while (frag--) {</div><div class='add'>+		dma_addr = desc[frag].addr_lo;</div><div class='add'>+		dma_addr |= (u64)desc[frag].addr_hi &lt;&lt; 32;</div><div class='add'>+		dma_unmap_single(&amp;adapter-&gt;pdev-&gt;dev, dma_addr,</div><div class='add'>+				 desc[frag].len_vlan, DMA_TO_DEVICE);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -ENOMEM;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int send_packet(struct sk_buff *skb, struct et131x_adapter *adapter)</div><div class='hunk'>@@ -2791,22 +2823,6 @@ static void et131x_handle_send_pkts(struct et131x_adapter *adapter)</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;adapter-&gt;tcb_send_qlock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int et131x_get_settings(struct net_device *netdev,</div><div class='del'>-			       struct ethtool_cmd *cmd)</div><div class='del'>-{</div><div class='del'>-	struct et131x_adapter *adapter = netdev_priv(netdev);</div><div class='del'>-</div><div class='del'>-	return phy_ethtool_gset(adapter-&gt;phydev, cmd);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int et131x_set_settings(struct net_device *netdev,</div><div class='del'>-			       struct ethtool_cmd *cmd)</div><div class='del'>-{</div><div class='del'>-	struct et131x_adapter *adapter = netdev_priv(netdev);</div><div class='del'>-</div><div class='del'>-	return phy_ethtool_sset(adapter-&gt;phydev, cmd);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int et131x_get_regs_len(struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> #define ET131X_REGS_LEN 256</div><div class='hunk'>@@ -2972,19 +2988,18 @@ static void et131x_get_drvinfo(struct net_device *netdev,</div><div class='ctx'> {</div><div class='ctx'> 	struct et131x_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> </div><div class='del'>-	strlcpy(info-&gt;driver, DRIVER_NAME, sizeof(info-&gt;driver));</div><div class='del'>-	strlcpy(info-&gt;version, DRIVER_VERSION, sizeof(info-&gt;version));</div><div class='del'>-	strlcpy(info-&gt;bus_info, pci_name(adapter-&gt;pdev),</div><div class='add'>+	strscpy(info-&gt;driver, DRIVER_NAME, sizeof(info-&gt;driver));</div><div class='add'>+	strscpy(info-&gt;bus_info, pci_name(adapter-&gt;pdev),</div><div class='ctx'> 		sizeof(info-&gt;bus_info));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct ethtool_ops et131x_ethtool_ops = {</div><div class='del'>-	.get_settings	= et131x_get_settings,</div><div class='del'>-	.set_settings	= et131x_set_settings,</div><div class='add'>+static const struct ethtool_ops et131x_ethtool_ops = {</div><div class='ctx'> 	.get_drvinfo	= et131x_get_drvinfo,</div><div class='ctx'> 	.get_regs_len	= et131x_get_regs_len,</div><div class='ctx'> 	.get_regs	= et131x_get_regs,</div><div class='ctx'> 	.get_link	= ethtool_op_get_link,</div><div class='add'>+	.get_link_ksettings = phy_ethtool_get_link_ksettings,</div><div class='add'>+	.set_link_ksettings = phy_ethtool_set_link_ksettings,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* et131x_hwaddr_init - set up the MAC Address */</div><div class='hunk'>@@ -3095,10 +3110,11 @@ err_out:</div><div class='ctx'>  * The routine called when the error timer expires, to track the number of</div><div class='ctx'>  * recurring errors.</div><div class='ctx'>  */</div><div class='del'>-static void et131x_error_timer_handler(unsigned long data)</div><div class='add'>+static void et131x_error_timer_handler(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct et131x_adapter *adapter = (struct et131x_adapter *)data;</div><div class='del'>-	struct phy_device *phydev = adapter-&gt;phydev;</div><div class='add'>+	struct et131x_adapter *adapter = timer_container_of(adapter, t,</div><div class='add'>+							    error_timer);</div><div class='add'>+	struct phy_device *phydev = adapter-&gt;netdev-&gt;phydev;</div><div class='ctx'> </div><div class='ctx'> 	if (et1310_in_phy_coma(adapter)) {</div><div class='ctx'> 		/* Bring the device immediately out of coma, to</div><div class='hunk'>@@ -3168,7 +3184,7 @@ static int et131x_adapter_memory_alloc(struct et131x_adapter *adapter)</div><div class='ctx'> static void et131x_adjust_link(struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct et131x_adapter *adapter = netdev_priv(netdev);</div><div class='del'>-	struct  phy_device *phydev = adapter-&gt;phydev;</div><div class='add'>+	struct  phy_device *phydev = netdev-&gt;phydev;</div><div class='ctx'> </div><div class='ctx'> 	if (!phydev)</div><div class='ctx'> 		return;</div><div class='hunk'>@@ -3192,14 +3208,14 @@ static void et131x_adjust_link(struct net_device *netdev)</div><div class='ctx'> </div><div class='ctx'> 			et131x_mii_read(adapter, PHY_MPHY_CONTROL_REG,</div><div class='ctx'> 					&amp;register18);</div><div class='del'>-			et131x_mii_write(adapter, phydev-&gt;addr,</div><div class='add'>+			et131x_mii_write(adapter, phydev-&gt;mdio.addr,</div><div class='ctx'> 					 PHY_MPHY_CONTROL_REG,</div><div class='ctx'> 					 register18 | 0x4);</div><div class='del'>-			et131x_mii_write(adapter, phydev-&gt;addr, PHY_INDEX_REG,</div><div class='del'>-					 register18 | 0x8402);</div><div class='del'>-			et131x_mii_write(adapter, phydev-&gt;addr, PHY_DATA_REG,</div><div class='del'>-					 register18 | 511);</div><div class='del'>-			et131x_mii_write(adapter, phydev-&gt;addr,</div><div class='add'>+			et131x_mii_write(adapter, phydev-&gt;mdio.addr,</div><div class='add'>+					 PHY_INDEX_REG, register18 | 0x8402);</div><div class='add'>+			et131x_mii_write(adapter, phydev-&gt;mdio.addr,</div><div class='add'>+					 PHY_DATA_REG, register18 | 511);</div><div class='add'>+			et131x_mii_write(adapter, phydev-&gt;mdio.addr,</div><div class='ctx'> 					 PHY_MPHY_CONTROL_REG, register18);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -3212,8 +3228,8 @@ static void et131x_adjust_link(struct net_device *netdev)</div><div class='ctx'> 			et131x_mii_read(adapter, PHY_CONFIG, &amp;reg);</div><div class='ctx'> 			reg &amp;= ~ET_PHY_CONFIG_TX_FIFO_DEPTH;</div><div class='ctx'> 			reg |= ET_PHY_CONFIG_FIFO_DEPTH_32;</div><div class='del'>-			et131x_mii_write(adapter, phydev-&gt;addr, PHY_CONFIG,</div><div class='del'>-					 reg);</div><div class='add'>+			et131x_mii_write(adapter, phydev-&gt;mdio.addr,</div><div class='add'>+					 PHY_CONFIG, reg);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		et131x_set_rx_dma_timer(adapter);</div><div class='hunk'>@@ -3226,14 +3242,14 @@ static void et131x_adjust_link(struct net_device *netdev)</div><div class='ctx'> </div><div class='ctx'> 			et131x_mii_read(adapter, PHY_MPHY_CONTROL_REG,</div><div class='ctx'> 					&amp;register18);</div><div class='del'>-			et131x_mii_write(adapter, phydev-&gt;addr,</div><div class='add'>+			et131x_mii_write(adapter, phydev-&gt;mdio.addr,</div><div class='ctx'> 					 PHY_MPHY_CONTROL_REG,</div><div class='ctx'> 					 register18 | 0x4);</div><div class='del'>-			et131x_mii_write(adapter, phydev-&gt;addr,</div><div class='add'>+			et131x_mii_write(adapter, phydev-&gt;mdio.addr,</div><div class='ctx'> 					 PHY_INDEX_REG, register18 | 0x8402);</div><div class='del'>-			et131x_mii_write(adapter, phydev-&gt;addr,</div><div class='add'>+			et131x_mii_write(adapter, phydev-&gt;mdio.addr,</div><div class='ctx'> 					 PHY_DATA_REG, register18 | 511);</div><div class='del'>-			et131x_mii_write(adapter, phydev-&gt;addr,</div><div class='add'>+			et131x_mii_write(adapter, phydev-&gt;mdio.addr,</div><div class='ctx'> 					 PHY_MPHY_CONTROL_REG, register18);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -3265,7 +3281,7 @@ static int et131x_mii_probe(struct net_device *netdev)</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	phydev = phy_connect(netdev, dev_name(&amp;phydev-&gt;dev),</div><div class='add'>+	phydev = phy_connect(netdev, phydev_name(phydev),</div><div class='ctx'> 			     &amp;et131x_adjust_link, PHY_INTERFACE_MODE_MII);</div><div class='ctx'> </div><div class='ctx'> 	if (IS_ERR(phydev)) {</div><div class='hunk'>@@ -3273,25 +3289,14 @@ static int et131x_mii_probe(struct net_device *netdev)</div><div class='ctx'> 		return PTR_ERR(phydev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	phydev-&gt;supported &amp;= (SUPPORTED_10baseT_Half |</div><div class='del'>-			      SUPPORTED_10baseT_Full |</div><div class='del'>-			      SUPPORTED_100baseT_Half |</div><div class='del'>-			      SUPPORTED_100baseT_Full |</div><div class='del'>-			      SUPPORTED_Autoneg |</div><div class='del'>-			      SUPPORTED_MII |</div><div class='del'>-			      SUPPORTED_TP);</div><div class='add'>+	phy_set_max_speed(phydev, SPEED_100);</div><div class='ctx'> </div><div class='ctx'> 	if (adapter-&gt;pdev-&gt;device != ET131X_PCI_DEVICE_ID_FAST)</div><div class='del'>-		phydev-&gt;supported |= SUPPORTED_1000baseT_Half |</div><div class='del'>-				     SUPPORTED_1000baseT_Full;</div><div class='add'>+		phy_set_max_speed(phydev, SPEED_1000);</div><div class='ctx'> </div><div class='del'>-	phydev-&gt;advertising = phydev-&gt;supported;</div><div class='ctx'> 	phydev-&gt;autoneg = AUTONEG_ENABLE;</div><div class='del'>-	adapter-&gt;phydev = phydev;</div><div class='ctx'> </div><div class='del'>-	dev_info(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='del'>-		 "attached PHY driver [%s] (mii_bus:phy_addr=%s)\n",</div><div class='del'>-		 phydev-&gt;drv-&gt;name, dev_name(&amp;phydev-&gt;dev));</div><div class='add'>+	phy_attached_info(phydev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -3325,9 +3330,8 @@ static void et131x_pci_remove(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> 	unregister_netdev(netdev);</div><div class='ctx'> 	netif_napi_del(&amp;adapter-&gt;napi);</div><div class='del'>-	phy_disconnect(adapter-&gt;phydev);</div><div class='add'>+	phy_disconnect(netdev-&gt;phydev);</div><div class='ctx'> 	mdiobus_unregister(adapter-&gt;mii_bus);</div><div class='del'>-	kfree(adapter-&gt;mii_bus-&gt;irq);</div><div class='ctx'> 	mdiobus_free(adapter-&gt;mii_bus);</div><div class='ctx'> </div><div class='ctx'> 	et131x_adapter_memory_free(adapter);</div><div class='hunk'>@@ -3341,20 +3345,16 @@ static void et131x_pci_remove(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> static void et131x_up(struct net_device *netdev)</div><div class='ctx'> {</div><div class='del'>-	struct et131x_adapter *adapter = netdev_priv(netdev);</div><div class='del'>-</div><div class='ctx'> 	et131x_enable_txrx(netdev);</div><div class='del'>-	phy_start(adapter-&gt;phydev);</div><div class='add'>+	phy_start(netdev-&gt;phydev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void et131x_down(struct net_device *netdev)</div><div class='ctx'> {</div><div class='del'>-	struct et131x_adapter *adapter = netdev_priv(netdev);</div><div class='del'>-</div><div class='ctx'> 	/* Save the timestamp for the TX watchdog, prevent a timeout */</div><div class='del'>-	netdev-&gt;trans_start = jiffies;</div><div class='add'>+	netif_trans_update(netdev);</div><div class='ctx'> </div><div class='del'>-	phy_stop(adapter-&gt;phydev);</div><div class='add'>+	phy_stop(netdev-&gt;phydev);</div><div class='ctx'> 	et131x_disable_txrx(netdev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -3475,12 +3475,9 @@ static irqreturn_t et131x_isr(int irq, void *dev_id)</div><div class='ctx'> 		 * send a pause packet, otherwise just exit</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (adapter-&gt;flow == FLOW_TXONLY || adapter-&gt;flow == FLOW_BOTH) {</div><div class='del'>-			u32 pm_csr;</div><div class='del'>-</div><div class='ctx'> 			/* Tell the device to send a pause packet via the back</div><div class='ctx'> 			 * pressure register (bp req and bp xon/xoff)</div><div class='ctx'> 			 */</div><div class='del'>-			pm_csr = readl(&amp;iomem-&gt;global.pm_csr);</div><div class='ctx'> 			if (!et1310_in_phy_coma(adapter))</div><div class='ctx'> 				writel(3, &amp;iomem-&gt;txmac.bp_ctrl);</div><div class='ctx'> 		}</div><div class='hunk'>@@ -3598,7 +3595,7 @@ static int et131x_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 	et131x_handle_send_pkts(adapter);</div><div class='ctx'> </div><div class='ctx'> 	if (work_done &lt; budget) {</div><div class='del'>-		napi_complete(&amp;adapter-&gt;napi);</div><div class='add'>+		napi_complete_done(&amp;adapter-&gt;napi, work_done);</div><div class='ctx'> 		et131x_enable_interrupts(adapter);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3647,11 +3644,9 @@ static int et131x_open(struct net_device *netdev)</div><div class='ctx'> 	int result;</div><div class='ctx'> </div><div class='ctx'> 	/* Start the timer to track NIC errors */</div><div class='del'>-	init_timer(&amp;adapter-&gt;error_timer);</div><div class='add'>+	timer_setup(&amp;adapter-&gt;error_timer, et131x_error_timer_handler, 0);</div><div class='ctx'> 	adapter-&gt;error_timer.expires = jiffies +</div><div class='ctx'> 		msecs_to_jiffies(TX_ERROR_PERIOD);</div><div class='del'>-	adapter-&gt;error_timer.function = et131x_error_timer_handler;</div><div class='del'>-	adapter-&gt;error_timer.data = (unsigned long)adapter;</div><div class='ctx'> 	add_timer(&amp;adapter-&gt;error_timer);</div><div class='ctx'> </div><div class='ctx'> 	result = request_irq(irq, et131x_isr,</div><div class='hunk'>@@ -3681,18 +3676,7 @@ static int et131x_close(struct net_device *netdev)</div><div class='ctx'> 	free_irq(adapter-&gt;pdev-&gt;irq, netdev);</div><div class='ctx'> </div><div class='ctx'> 	/* Stop the error timer */</div><div class='del'>-	return del_timer_sync(&amp;adapter-&gt;error_timer);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int et131x_ioctl(struct net_device *netdev, struct ifreq *reqbuf,</div><div class='del'>-			int cmd)</div><div class='del'>-{</div><div class='del'>-	struct et131x_adapter *adapter = netdev_priv(netdev);</div><div class='del'>-</div><div class='del'>-	if (!adapter-&gt;phydev)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	return phy_mii_ioctl(adapter-&gt;phydev, reqbuf, cmd);</div><div class='add'>+	return timer_delete_sync(&amp;adapter-&gt;error_timer);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* et131x_set_packet_filter - Configures the Rx Packet filtering */</div><div class='hunk'>@@ -3814,12 +3798,19 @@ static netdev_tx_t et131x_tx(struct sk_buff *skb, struct net_device *netdev)</div><div class='ctx'> 	struct et131x_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> 	struct tx_ring *tx_ring = &amp;adapter-&gt;tx_ring;</div><div class='ctx'> </div><div class='add'>+	/* This driver does not support TSO, it is very unlikely</div><div class='add'>+	 * this condition is true.</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely(skb_shinfo(skb)-&gt;nr_frags &gt; MAX_TX_DESC_PER_PKT - 2)) {</div><div class='add'>+		if (skb_linearize(skb))</div><div class='add'>+			goto drop_err;</div><div class='add'>+	}</div><div class='ctx'> 	/* stop the queue if it's getting full */</div><div class='ctx'> 	if (tx_ring-&gt;used &gt;= NUM_TCB - 1 &amp;&amp; !netif_queue_stopped(netdev))</div><div class='ctx'> 		netif_stop_queue(netdev);</div><div class='ctx'> </div><div class='ctx'> 	/* Save the timestamp for the TX timeout watchdog */</div><div class='del'>-	netdev-&gt;trans_start = jiffies;</div><div class='add'>+	netif_trans_update(netdev);</div><div class='ctx'> </div><div class='ctx'> 	/* TCB is not available */</div><div class='ctx'> 	if (tx_ring-&gt;used &gt;= NUM_TCB)</div><div class='hunk'>@@ -3846,7 +3837,7 @@ drop_err:</div><div class='ctx'>  * specified by the 'tx_timeo" element in the net_device structure (see</div><div class='ctx'>  * et131x_alloc_device() to see how this value is set).</div><div class='ctx'>  */</div><div class='del'>-static void et131x_tx_timeout(struct net_device *netdev)</div><div class='add'>+static void et131x_tx_timeout(struct net_device *netdev, unsigned int txqueue)</div><div class='ctx'> {</div><div class='ctx'> 	struct et131x_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> 	struct tx_ring *tx_ring = &amp;adapter-&gt;tx_ring;</div><div class='hunk'>@@ -3854,7 +3845,7 @@ static void et131x_tx_timeout(struct net_device *netdev)</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	/* If the device is closed, ignore the timeout */</div><div class='del'>-	if (~(adapter-&gt;flags &amp; FMP_ADAPTER_INTERRUPT_IN_USE))</div><div class='add'>+	if (!(adapter-&gt;flags &amp; FMP_ADAPTER_INTERRUPT_IN_USE))</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	/* Any nonrecoverable hardware error?</div><div class='hunk'>@@ -3896,12 +3887,9 @@ static int et131x_change_mtu(struct net_device *netdev, int new_mtu)</div><div class='ctx'> 	int result = 0;</div><div class='ctx'> 	struct et131x_adapter *adapter = netdev_priv(netdev);</div><div class='ctx'> </div><div class='del'>-	if (new_mtu &lt; 64 || new_mtu &gt; 9216)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='ctx'> 	et131x_disable_txrx(netdev);</div><div class='ctx'> </div><div class='del'>-	netdev-&gt;mtu = new_mtu;</div><div class='add'>+	WRITE_ONCE(netdev-&gt;mtu, new_mtu);</div><div class='ctx'> </div><div class='ctx'> 	et131x_adapter_memory_free(adapter);</div><div class='ctx'> </div><div class='hunk'>@@ -3918,7 +3906,7 @@ static int et131x_change_mtu(struct net_device *netdev, int new_mtu)</div><div class='ctx'> </div><div class='ctx'> 	et131x_init_send(adapter);</div><div class='ctx'> 	et131x_hwaddr_init(adapter);</div><div class='del'>-	ether_addr_copy(netdev-&gt;dev_addr, adapter-&gt;addr);</div><div class='add'>+	eth_hw_addr_set(netdev, adapter-&gt;addr);</div><div class='ctx'> </div><div class='ctx'> 	/* Init the device with the new settings */</div><div class='ctx'> 	et131x_adapter_setup(adapter);</div><div class='hunk'>@@ -3937,7 +3925,7 @@ static const struct net_device_ops et131x_netdev_ops = {</div><div class='ctx'> 	.ndo_set_mac_address	= eth_mac_addr,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> 	.ndo_get_stats		= et131x_stats,</div><div class='del'>-	.ndo_do_ioctl		= et131x_ioctl,</div><div class='add'>+	.ndo_eth_ioctl		= phy_do_ioctl,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int et131x_pci_setup(struct pci_dev *pdev,</div><div class='hunk'>@@ -3946,7 +3934,6 @@ static int et131x_pci_setup(struct pci_dev *pdev,</div><div class='ctx'> 	struct net_device *netdev;</div><div class='ctx'> 	struct et131x_adapter *adapter;</div><div class='ctx'> 	int rc;</div><div class='del'>-	int ii;</div><div class='ctx'> </div><div class='ctx'> 	rc = pci_enable_device(pdev);</div><div class='ctx'> 	if (rc &lt; 0) {</div><div class='hunk'>@@ -3970,10 +3957,9 @@ static int et131x_pci_setup(struct pci_dev *pdev,</div><div class='ctx'> 	pci_set_master(pdev);</div><div class='ctx'> </div><div class='ctx'> 	/* Check the DMA addressing support of this device */</div><div class='del'>-	if (dma_set_mask_and_coherent(&amp;pdev-&gt;dev, DMA_BIT_MASK(64)) &amp;&amp;</div><div class='del'>-	    dma_set_mask_and_coherent(&amp;pdev-&gt;dev, DMA_BIT_MASK(32))) {</div><div class='add'>+	rc = dma_set_mask_and_coherent(&amp;pdev-&gt;dev, DMA_BIT_MASK(64));</div><div class='add'>+	if (rc) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "No usable DMA addressing method\n");</div><div class='del'>-		rc = -EIO;</div><div class='ctx'> 		goto err_release_res;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -3986,6 +3972,8 @@ static int et131x_pci_setup(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	netdev-&gt;watchdog_timeo = ET131X_TX_TIMEOUT;</div><div class='ctx'> 	netdev-&gt;netdev_ops     = &amp;et131x_netdev_ops;</div><div class='add'>+	netdev-&gt;min_mtu        = ET131X_MIN_MTU;</div><div class='add'>+	netdev-&gt;max_mtu        = ET131X_MAX_MTU;</div><div class='ctx'> </div><div class='ctx'> 	SET_NETDEV_DEV(netdev, &amp;pdev-&gt;dev);</div><div class='ctx'> 	netdev-&gt;ethtool_ops = &amp;et131x_ethtool_ops;</div><div class='hunk'>@@ -4018,9 +4006,9 @@ static int et131x_pci_setup(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	et131x_init_send(adapter);</div><div class='ctx'> </div><div class='del'>-	netif_napi_add(netdev, &amp;adapter-&gt;napi, et131x_poll, 64);</div><div class='add'>+	netif_napi_add(netdev, &amp;adapter-&gt;napi, et131x_poll);</div><div class='ctx'> </div><div class='del'>-	ether_addr_copy(netdev-&gt;dev_addr, adapter-&gt;addr);</div><div class='add'>+	eth_hw_addr_set(netdev, adapter-&gt;addr);</div><div class='ctx'> </div><div class='ctx'> 	rc = -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -4031,23 +4019,15 @@ static int et131x_pci_setup(struct pci_dev *pdev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	adapter-&gt;mii_bus-&gt;name = "et131x_eth_mii";</div><div class='del'>-	snprintf(adapter-&gt;mii_bus-&gt;id, MII_BUS_ID_SIZE, "%x",</div><div class='del'>-		 (adapter-&gt;pdev-&gt;bus-&gt;number &lt;&lt; 8) | adapter-&gt;pdev-&gt;devfn);</div><div class='add'>+	snprintf(adapter-&gt;mii_bus-&gt;id, MII_BUS_ID_SIZE, "%x", pci_dev_id(adapter-&gt;pdev));</div><div class='ctx'> 	adapter-&gt;mii_bus-&gt;priv = netdev;</div><div class='ctx'> 	adapter-&gt;mii_bus-&gt;read = et131x_mdio_read;</div><div class='ctx'> 	adapter-&gt;mii_bus-&gt;write = et131x_mdio_write;</div><div class='del'>-	adapter-&gt;mii_bus-&gt;irq = kmalloc_array(PHY_MAX_ADDR, sizeof(int),</div><div class='del'>-					      GFP_KERNEL);</div><div class='del'>-	if (!adapter-&gt;mii_bus-&gt;irq)</div><div class='del'>-		goto err_mdio_free;</div><div class='del'>-</div><div class='del'>-	for (ii = 0; ii &lt; PHY_MAX_ADDR; ii++)</div><div class='del'>-		adapter-&gt;mii_bus-&gt;irq[ii] = PHY_POLL;</div><div class='ctx'> </div><div class='ctx'> 	rc = mdiobus_register(adapter-&gt;mii_bus);</div><div class='ctx'> 	if (rc &lt; 0) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "failed to register MII bus\n");</div><div class='del'>-		goto err_mdio_free_irq;</div><div class='add'>+		goto err_mdio_free;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	rc = et131x_mii_probe(netdev);</div><div class='hunk'>@@ -4084,11 +4064,9 @@ out:</div><div class='ctx'> 	return rc;</div><div class='ctx'> </div><div class='ctx'> err_phy_disconnect:</div><div class='del'>-	phy_disconnect(adapter-&gt;phydev);</div><div class='add'>+	phy_disconnect(netdev-&gt;phydev);</div><div class='ctx'> err_mdio_unregister:</div><div class='ctx'> 	mdiobus_unregister(adapter-&gt;mii_bus);</div><div class='del'>-err_mdio_free_irq:</div><div class='del'>-	kfree(adapter-&gt;mii_bus-&gt;irq);</div><div class='ctx'> err_mdio_free:</div><div class='ctx'> 	mdiobus_free(adapter-&gt;mii_bus);</div><div class='ctx'> err_mem_free:</div><div class='head'>diff --git a/drivers/net/ethernet/agere/et131x.h b/drivers/net/ethernet/agere/et131x.h<br/>index be9a11c02526..d0e922584d8a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/agere/et131x.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/agere/et131x.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/agere/et131x.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/agere/et131x.h</a></div><div class='hunk'>@@ -46,7 +46,6 @@</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #define DRIVER_NAME "et131x"</div><div class='del'>-#define DRIVER_VERSION "v2.0"</div><div class='ctx'> </div><div class='ctx'> /* EEPROM registers */</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/airoha/Kconfig b/drivers/net/ethernet/airoha/Kconfig<br/>new file mode 100644<br/>index 000000000000..ad3ce501e7a5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/airoha/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/airoha/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,34 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+config NET_VENDOR_AIROHA</div><div class='add'>+	bool "Airoha devices"</div><div class='add'>+	depends on ARCH_AIROHA || COMPILE_TEST</div><div class='add'>+	help</div><div class='add'>+	  If you have a Airoha SoC with ethernet, say Y.</div><div class='add'>+</div><div class='add'>+if NET_VENDOR_AIROHA</div><div class='add'>+</div><div class='add'>+config NET_AIROHA_NPU</div><div class='add'>+	tristate "Airoha NPU support"</div><div class='add'>+	select WANT_DEV_COREDUMP</div><div class='add'>+	select REGMAP_MMIO</div><div class='add'>+	help</div><div class='add'>+	  This driver supports Airoha Network Processor (NPU) available</div><div class='add'>+	  on the Airoha Soc family.</div><div class='add'>+</div><div class='add'>+config NET_AIROHA</div><div class='add'>+	tristate "Airoha SoC Gigabit Ethernet support"</div><div class='add'>+	depends on NET_DSA || !NET_DSA</div><div class='add'>+	select NET_AIROHA_NPU</div><div class='add'>+	select PAGE_POOL</div><div class='add'>+	help</div><div class='add'>+	  This driver supports the gigabit ethernet MACs in the</div><div class='add'>+	  Airoha SoC family.</div><div class='add'>+</div><div class='add'>+config NET_AIROHA_FLOW_STATS</div><div class='add'>+	default y</div><div class='add'>+	bool "Airoha flow stats"</div><div class='add'>+	depends on NET_AIROHA &amp;&amp; NET_AIROHA_NPU</div><div class='add'>+	help</div><div class='add'>+	  Enable Aiorha flowtable statistic counters.</div><div class='add'>+</div><div class='add'>+endif #NET_VENDOR_AIROHA</div><div class='head'>diff --git a/drivers/net/ethernet/airoha/Makefile b/drivers/net/ethernet/airoha/Makefile<br/>new file mode 100644<br/>index 000000000000..94468053e34b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/airoha/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/airoha/Makefile</a></div><div class='hunk'>@@ -0,0 +1,9 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+#</div><div class='add'>+# Airoha for the Mediatek SoCs built-in ethernet macs</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_NET_AIROHA) += airoha-eth.o</div><div class='add'>+airoha-eth-y := airoha_eth.o airoha_ppe.o</div><div class='add'>+airoha-eth-$(CONFIG_DEBUG_FS) += airoha_ppe_debugfs.o</div><div class='add'>+obj-$(CONFIG_NET_AIROHA_NPU) += airoha_npu.o</div><div class='head'>diff --git a/drivers/net/ethernet/airoha/airoha_eth.c b/drivers/net/ethernet/airoha/airoha_eth.c<br/>new file mode 100644<br/>index 000000000000..75893c90a0a1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/airoha/airoha_eth.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/airoha/airoha_eth.c</a></div><div class='hunk'>@@ -0,0 +1,3180 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 AIROHA Inc</div><div class='add'>+ * Author: Lorenzo Bianconi &lt;lorenzo@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_net.h&gt;</div><div class='add'>+#include &lt;linux/of_reserved_mem.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/tcp.h&gt;</div><div class='add'>+#include &lt;linux/u64_stats_sync.h&gt;</div><div class='add'>+#include &lt;net/dst_metadata.h&gt;</div><div class='add'>+#include &lt;net/page_pool/helpers.h&gt;</div><div class='add'>+#include &lt;net/pkt_cls.h&gt;</div><div class='add'>+#include &lt;uapi/linux/ppp_defs.h&gt;</div><div class='add'>+</div><div class='add'>+#include "airoha_regs.h"</div><div class='add'>+#include "airoha_eth.h"</div><div class='add'>+</div><div class='add'>+u32 airoha_rr(void __iomem *base, u32 offset)</div><div class='add'>+{</div><div class='add'>+	return readl(base + offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void airoha_wr(void __iomem *base, u32 offset, u32 val)</div><div class='add'>+{</div><div class='add'>+	writel(val, base + offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 airoha_rmw(void __iomem *base, u32 offset, u32 mask, u32 val)</div><div class='add'>+{</div><div class='add'>+	val |= (airoha_rr(base, offset) &amp; ~mask);</div><div class='add'>+	airoha_wr(base, offset, val);</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_qdma_set_irqmask(struct airoha_irq_bank *irq_bank,</div><div class='add'>+				    int index, u32 clear, u32 set)</div><div class='add'>+{</div><div class='add'>+	struct airoha_qdma *qdma = irq_bank-&gt;qdma;</div><div class='add'>+	int bank = irq_bank - &amp;qdma-&gt;irq_banks[0];</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (WARN_ON_ONCE(index &gt;= ARRAY_SIZE(irq_bank-&gt;irqmask)))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;irq_bank-&gt;irq_lock, flags);</div><div class='add'>+</div><div class='add'>+	irq_bank-&gt;irqmask[index] &amp;= ~clear;</div><div class='add'>+	irq_bank-&gt;irqmask[index] |= set;</div><div class='add'>+	airoha_qdma_wr(qdma, REG_INT_ENABLE(bank, index),</div><div class='add'>+		       irq_bank-&gt;irqmask[index]);</div><div class='add'>+	/* Read irq_enable register in order to guarantee the update above</div><div class='add'>+	 * completes in the spinlock critical section.</div><div class='add'>+	 */</div><div class='add'>+	airoha_qdma_rr(qdma, REG_INT_ENABLE(bank, index));</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;irq_bank-&gt;irq_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_qdma_irq_enable(struct airoha_irq_bank *irq_bank,</div><div class='add'>+				   int index, u32 mask)</div><div class='add'>+{</div><div class='add'>+	airoha_qdma_set_irqmask(irq_bank, index, 0, mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_qdma_irq_disable(struct airoha_irq_bank *irq_bank,</div><div class='add'>+				    int index, u32 mask)</div><div class='add'>+{</div><div class='add'>+	airoha_qdma_set_irqmask(irq_bank, index, mask, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_set_macaddr(struct airoha_gdm_port *port, const u8 *addr)</div><div class='add'>+{</div><div class='add'>+	struct airoha_eth *eth = port-&gt;qdma-&gt;eth;</div><div class='add'>+	u32 val, reg;</div><div class='add'>+</div><div class='add'>+	reg = airhoa_is_lan_gdm_port(port) ? REG_FE_LAN_MAC_H</div><div class='add'>+					   : REG_FE_WAN_MAC_H;</div><div class='add'>+	val = (addr[0] &lt;&lt; 16) | (addr[1] &lt;&lt; 8) | addr[2];</div><div class='add'>+	airoha_fe_wr(eth, reg, val);</div><div class='add'>+</div><div class='add'>+	val = (addr[3] &lt;&lt; 16) | (addr[4] &lt;&lt; 8) | addr[5];</div><div class='add'>+	airoha_fe_wr(eth, REG_FE_MAC_LMIN(reg), val);</div><div class='add'>+	airoha_fe_wr(eth, REG_FE_MAC_LMAX(reg), val);</div><div class='add'>+</div><div class='add'>+	airoha_ppe_init_upd_mem(port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_set_gdm_port_fwd_cfg(struct airoha_eth *eth, u32 addr,</div><div class='add'>+					u32 val)</div><div class='add'>+{</div><div class='add'>+	airoha_fe_rmw(eth, addr, GDM_OCFQ_MASK,</div><div class='add'>+		      FIELD_PREP(GDM_OCFQ_MASK, val));</div><div class='add'>+	airoha_fe_rmw(eth, addr, GDM_MCFQ_MASK,</div><div class='add'>+		      FIELD_PREP(GDM_MCFQ_MASK, val));</div><div class='add'>+	airoha_fe_rmw(eth, addr, GDM_BCFQ_MASK,</div><div class='add'>+		      FIELD_PREP(GDM_BCFQ_MASK, val));</div><div class='add'>+	airoha_fe_rmw(eth, addr, GDM_UCFQ_MASK,</div><div class='add'>+		      FIELD_PREP(GDM_UCFQ_MASK, val));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_set_vip_for_gdm_port(struct airoha_gdm_port *port,</div><div class='add'>+				       bool enable)</div><div class='add'>+{</div><div class='add'>+	struct airoha_eth *eth = port-&gt;qdma-&gt;eth;</div><div class='add'>+	u32 vip_port;</div><div class='add'>+</div><div class='add'>+	switch (port-&gt;id) {</div><div class='add'>+	case 3:</div><div class='add'>+		/* FIXME: handle XSI_PCIE1_PORT */</div><div class='add'>+		vip_port = XSI_PCIE0_VIP_PORT_MASK;</div><div class='add'>+		break;</div><div class='add'>+	case 4:</div><div class='add'>+		/* FIXME: handle XSI_USB_PORT */</div><div class='add'>+		vip_port = XSI_ETH_VIP_PORT_MASK;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (enable) {</div><div class='add'>+		airoha_fe_set(eth, REG_FE_VIP_PORT_EN, vip_port);</div><div class='add'>+		airoha_fe_set(eth, REG_FE_IFC_PORT_EN, vip_port);</div><div class='add'>+	} else {</div><div class='add'>+		airoha_fe_clear(eth, REG_FE_VIP_PORT_EN, vip_port);</div><div class='add'>+		airoha_fe_clear(eth, REG_FE_IFC_PORT_EN, vip_port);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_fe_maccr_init(struct airoha_eth *eth)</div><div class='add'>+{</div><div class='add'>+	int p;</div><div class='add'>+</div><div class='add'>+	for (p = 1; p &lt;= ARRAY_SIZE(eth-&gt;ports); p++)</div><div class='add'>+		airoha_fe_set(eth, REG_GDM_FWD_CFG(p),</div><div class='add'>+			      GDM_TCP_CKSUM_MASK | GDM_UDP_CKSUM_MASK |</div><div class='add'>+			      GDM_IP4_CKSUM_MASK | GDM_DROP_CRC_ERR_MASK);</div><div class='add'>+</div><div class='add'>+	airoha_fe_rmw(eth, REG_CDM_VLAN_CTRL(1), CDM_VLAN_MASK,</div><div class='add'>+		      FIELD_PREP(CDM_VLAN_MASK, 0x8100));</div><div class='add'>+</div><div class='add'>+	airoha_fe_set(eth, REG_FE_CPORT_CFG, FE_CPORT_PAD);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_fe_vip_setup(struct airoha_eth *eth)</div><div class='add'>+{</div><div class='add'>+	airoha_fe_wr(eth, REG_FE_VIP_PATN(3), ETH_P_PPP_DISC);</div><div class='add'>+	airoha_fe_wr(eth, REG_FE_VIP_EN(3), PATN_FCPU_EN_MASK | PATN_EN_MASK);</div><div class='add'>+</div><div class='add'>+	airoha_fe_wr(eth, REG_FE_VIP_PATN(4), PPP_LCP);</div><div class='add'>+	airoha_fe_wr(eth, REG_FE_VIP_EN(4),</div><div class='add'>+		     PATN_FCPU_EN_MASK | FIELD_PREP(PATN_TYPE_MASK, 1) |</div><div class='add'>+		     PATN_EN_MASK);</div><div class='add'>+</div><div class='add'>+	airoha_fe_wr(eth, REG_FE_VIP_PATN(6), PPP_IPCP);</div><div class='add'>+	airoha_fe_wr(eth, REG_FE_VIP_EN(6),</div><div class='add'>+		     PATN_FCPU_EN_MASK | FIELD_PREP(PATN_TYPE_MASK, 1) |</div><div class='add'>+		     PATN_EN_MASK);</div><div class='add'>+</div><div class='add'>+	airoha_fe_wr(eth, REG_FE_VIP_PATN(7), PPP_CHAP);</div><div class='add'>+	airoha_fe_wr(eth, REG_FE_VIP_EN(7),</div><div class='add'>+		     PATN_FCPU_EN_MASK | FIELD_PREP(PATN_TYPE_MASK, 1) |</div><div class='add'>+		     PATN_EN_MASK);</div><div class='add'>+</div><div class='add'>+	/* BOOTP (0x43) */</div><div class='add'>+	airoha_fe_wr(eth, REG_FE_VIP_PATN(8), 0x43);</div><div class='add'>+	airoha_fe_wr(eth, REG_FE_VIP_EN(8),</div><div class='add'>+		     PATN_FCPU_EN_MASK | PATN_SP_EN_MASK |</div><div class='add'>+		     FIELD_PREP(PATN_TYPE_MASK, 4) | PATN_EN_MASK);</div><div class='add'>+</div><div class='add'>+	/* BOOTP (0x44) */</div><div class='add'>+	airoha_fe_wr(eth, REG_FE_VIP_PATN(9), 0x44);</div><div class='add'>+	airoha_fe_wr(eth, REG_FE_VIP_EN(9),</div><div class='add'>+		     PATN_FCPU_EN_MASK | PATN_SP_EN_MASK |</div><div class='add'>+		     FIELD_PREP(PATN_TYPE_MASK, 4) | PATN_EN_MASK);</div><div class='add'>+</div><div class='add'>+	/* ISAKMP */</div><div class='add'>+	airoha_fe_wr(eth, REG_FE_VIP_PATN(10), 0x1f401f4);</div><div class='add'>+	airoha_fe_wr(eth, REG_FE_VIP_EN(10),</div><div class='add'>+		     PATN_FCPU_EN_MASK | PATN_DP_EN_MASK | PATN_SP_EN_MASK |</div><div class='add'>+		     FIELD_PREP(PATN_TYPE_MASK, 4) | PATN_EN_MASK);</div><div class='add'>+</div><div class='add'>+	airoha_fe_wr(eth, REG_FE_VIP_PATN(11), PPP_IPV6CP);</div><div class='add'>+	airoha_fe_wr(eth, REG_FE_VIP_EN(11),</div><div class='add'>+		     PATN_FCPU_EN_MASK | FIELD_PREP(PATN_TYPE_MASK, 1) |</div><div class='add'>+		     PATN_EN_MASK);</div><div class='add'>+</div><div class='add'>+	/* DHCPv6 */</div><div class='add'>+	airoha_fe_wr(eth, REG_FE_VIP_PATN(12), 0x2220223);</div><div class='add'>+	airoha_fe_wr(eth, REG_FE_VIP_EN(12),</div><div class='add'>+		     PATN_FCPU_EN_MASK | PATN_DP_EN_MASK | PATN_SP_EN_MASK |</div><div class='add'>+		     FIELD_PREP(PATN_TYPE_MASK, 4) | PATN_EN_MASK);</div><div class='add'>+</div><div class='add'>+	airoha_fe_wr(eth, REG_FE_VIP_PATN(19), PPP_PAP);</div><div class='add'>+	airoha_fe_wr(eth, REG_FE_VIP_EN(19),</div><div class='add'>+		     PATN_FCPU_EN_MASK | FIELD_PREP(PATN_TYPE_MASK, 1) |</div><div class='add'>+		     PATN_EN_MASK);</div><div class='add'>+</div><div class='add'>+	/* ETH-&gt;ETH_P_1905 (0x893a) */</div><div class='add'>+	airoha_fe_wr(eth, REG_FE_VIP_PATN(20), 0x893a);</div><div class='add'>+	airoha_fe_wr(eth, REG_FE_VIP_EN(20),</div><div class='add'>+		     PATN_FCPU_EN_MASK | PATN_EN_MASK);</div><div class='add'>+</div><div class='add'>+	airoha_fe_wr(eth, REG_FE_VIP_PATN(21), ETH_P_LLDP);</div><div class='add'>+	airoha_fe_wr(eth, REG_FE_VIP_EN(21),</div><div class='add'>+		     PATN_FCPU_EN_MASK | PATN_EN_MASK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 airoha_fe_get_pse_queue_rsv_pages(struct airoha_eth *eth,</div><div class='add'>+					     u32 port, u32 queue)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	airoha_fe_rmw(eth, REG_FE_PSE_QUEUE_CFG_WR,</div><div class='add'>+		      PSE_CFG_PORT_ID_MASK | PSE_CFG_QUEUE_ID_MASK,</div><div class='add'>+		      FIELD_PREP(PSE_CFG_PORT_ID_MASK, port) |</div><div class='add'>+		      FIELD_PREP(PSE_CFG_QUEUE_ID_MASK, queue));</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_PSE_QUEUE_CFG_VAL);</div><div class='add'>+</div><div class='add'>+	return FIELD_GET(PSE_CFG_OQ_RSV_MASK, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_fe_set_pse_queue_rsv_pages(struct airoha_eth *eth,</div><div class='add'>+					      u32 port, u32 queue, u32 val)</div><div class='add'>+{</div><div class='add'>+	airoha_fe_rmw(eth, REG_FE_PSE_QUEUE_CFG_VAL, PSE_CFG_OQ_RSV_MASK,</div><div class='add'>+		      FIELD_PREP(PSE_CFG_OQ_RSV_MASK, val));</div><div class='add'>+	airoha_fe_rmw(eth, REG_FE_PSE_QUEUE_CFG_WR,</div><div class='add'>+		      PSE_CFG_PORT_ID_MASK | PSE_CFG_QUEUE_ID_MASK |</div><div class='add'>+		      PSE_CFG_WR_EN_MASK | PSE_CFG_OQRSV_SEL_MASK,</div><div class='add'>+		      FIELD_PREP(PSE_CFG_PORT_ID_MASK, port) |</div><div class='add'>+		      FIELD_PREP(PSE_CFG_QUEUE_ID_MASK, queue) |</div><div class='add'>+		      PSE_CFG_WR_EN_MASK | PSE_CFG_OQRSV_SEL_MASK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 airoha_fe_get_pse_all_rsv(struct airoha_eth *eth)</div><div class='add'>+{</div><div class='add'>+	u32 val = airoha_fe_rr(eth, REG_FE_PSE_BUF_SET);</div><div class='add'>+</div><div class='add'>+	return FIELD_GET(PSE_ALLRSV_MASK, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_fe_set_pse_oq_rsv(struct airoha_eth *eth,</div><div class='add'>+				    u32 port, u32 queue, u32 val)</div><div class='add'>+{</div><div class='add'>+	u32 orig_val = airoha_fe_get_pse_queue_rsv_pages(eth, port, queue);</div><div class='add'>+	u32 tmp, all_rsv, fq_limit;</div><div class='add'>+</div><div class='add'>+	airoha_fe_set_pse_queue_rsv_pages(eth, port, queue, val);</div><div class='add'>+</div><div class='add'>+	/* modify all rsv */</div><div class='add'>+	all_rsv = airoha_fe_get_pse_all_rsv(eth);</div><div class='add'>+	all_rsv += (val - orig_val);</div><div class='add'>+	airoha_fe_rmw(eth, REG_FE_PSE_BUF_SET, PSE_ALLRSV_MASK,</div><div class='add'>+		      FIELD_PREP(PSE_ALLRSV_MASK, all_rsv));</div><div class='add'>+</div><div class='add'>+	/* modify hthd */</div><div class='add'>+	tmp = airoha_fe_rr(eth, PSE_FQ_CFG);</div><div class='add'>+	fq_limit = FIELD_GET(PSE_FQ_LIMIT_MASK, tmp);</div><div class='add'>+	tmp = fq_limit - all_rsv - 0x20;</div><div class='add'>+	airoha_fe_rmw(eth, REG_PSE_SHARE_USED_THD,</div><div class='add'>+		      PSE_SHARE_USED_HTHD_MASK,</div><div class='add'>+		      FIELD_PREP(PSE_SHARE_USED_HTHD_MASK, tmp));</div><div class='add'>+</div><div class='add'>+	tmp = fq_limit - all_rsv - 0x100;</div><div class='add'>+	airoha_fe_rmw(eth, REG_PSE_SHARE_USED_THD,</div><div class='add'>+		      PSE_SHARE_USED_MTHD_MASK,</div><div class='add'>+		      FIELD_PREP(PSE_SHARE_USED_MTHD_MASK, tmp));</div><div class='add'>+	tmp = (3 * tmp) &gt;&gt; 2;</div><div class='add'>+	airoha_fe_rmw(eth, REG_FE_PSE_BUF_SET,</div><div class='add'>+		      PSE_SHARE_USED_LTHD_MASK,</div><div class='add'>+		      FIELD_PREP(PSE_SHARE_USED_LTHD_MASK, tmp));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_fe_pse_ports_init(struct airoha_eth *eth)</div><div class='add'>+{</div><div class='add'>+	const u32 pse_port_num_queues[] = {</div><div class='add'>+		[FE_PSE_PORT_CDM1] = 6,</div><div class='add'>+		[FE_PSE_PORT_GDM1] = 6,</div><div class='add'>+		[FE_PSE_PORT_GDM2] = 32,</div><div class='add'>+		[FE_PSE_PORT_GDM3] = 6,</div><div class='add'>+		[FE_PSE_PORT_PPE1] = 4,</div><div class='add'>+		[FE_PSE_PORT_CDM2] = 6,</div><div class='add'>+		[FE_PSE_PORT_CDM3] = 8,</div><div class='add'>+		[FE_PSE_PORT_CDM4] = 10,</div><div class='add'>+		[FE_PSE_PORT_PPE2] = 4,</div><div class='add'>+		[FE_PSE_PORT_GDM4] = 2,</div><div class='add'>+		[FE_PSE_PORT_CDM5] = 2,</div><div class='add'>+	};</div><div class='add'>+	u32 all_rsv;</div><div class='add'>+	int q;</div><div class='add'>+</div><div class='add'>+	all_rsv = airoha_fe_get_pse_all_rsv(eth);</div><div class='add'>+	if (airoha_ppe_is_enabled(eth, 1)) {</div><div class='add'>+		/* hw misses PPE2 oq rsv */</div><div class='add'>+		all_rsv += PSE_RSV_PAGES *</div><div class='add'>+			   pse_port_num_queues[FE_PSE_PORT_PPE2];</div><div class='add'>+	}</div><div class='add'>+	airoha_fe_set(eth, REG_FE_PSE_BUF_SET, all_rsv);</div><div class='add'>+</div><div class='add'>+	/* CMD1 */</div><div class='add'>+	for (q = 0; q &lt; pse_port_num_queues[FE_PSE_PORT_CDM1]; q++)</div><div class='add'>+		airoha_fe_set_pse_oq_rsv(eth, FE_PSE_PORT_CDM1, q,</div><div class='add'>+					 PSE_QUEUE_RSV_PAGES);</div><div class='add'>+	/* GMD1 */</div><div class='add'>+	for (q = 0; q &lt; pse_port_num_queues[FE_PSE_PORT_GDM1]; q++)</div><div class='add'>+		airoha_fe_set_pse_oq_rsv(eth, FE_PSE_PORT_GDM1, q,</div><div class='add'>+					 PSE_QUEUE_RSV_PAGES);</div><div class='add'>+	/* GMD2 */</div><div class='add'>+	for (q = 6; q &lt; pse_port_num_queues[FE_PSE_PORT_GDM2]; q++)</div><div class='add'>+		airoha_fe_set_pse_oq_rsv(eth, FE_PSE_PORT_GDM2, q, 0);</div><div class='add'>+	/* GMD3 */</div><div class='add'>+	for (q = 0; q &lt; pse_port_num_queues[FE_PSE_PORT_GDM3]; q++)</div><div class='add'>+		airoha_fe_set_pse_oq_rsv(eth, FE_PSE_PORT_GDM3, q,</div><div class='add'>+					 PSE_QUEUE_RSV_PAGES);</div><div class='add'>+	/* PPE1 */</div><div class='add'>+	for (q = 0; q &lt; pse_port_num_queues[FE_PSE_PORT_PPE1]; q++) {</div><div class='add'>+		if (q &lt; pse_port_num_queues[FE_PSE_PORT_PPE1])</div><div class='add'>+			airoha_fe_set_pse_oq_rsv(eth, FE_PSE_PORT_PPE1, q,</div><div class='add'>+						 PSE_QUEUE_RSV_PAGES);</div><div class='add'>+		else</div><div class='add'>+			airoha_fe_set_pse_oq_rsv(eth, FE_PSE_PORT_PPE1, q, 0);</div><div class='add'>+	}</div><div class='add'>+	/* CDM2 */</div><div class='add'>+	for (q = 0; q &lt; pse_port_num_queues[FE_PSE_PORT_CDM2]; q++)</div><div class='add'>+		airoha_fe_set_pse_oq_rsv(eth, FE_PSE_PORT_CDM2, q,</div><div class='add'>+					 PSE_QUEUE_RSV_PAGES);</div><div class='add'>+	/* CDM3 */</div><div class='add'>+	for (q = 0; q &lt; pse_port_num_queues[FE_PSE_PORT_CDM3] - 1; q++)</div><div class='add'>+		airoha_fe_set_pse_oq_rsv(eth, FE_PSE_PORT_CDM3, q, 0);</div><div class='add'>+	/* CDM4 */</div><div class='add'>+	for (q = 4; q &lt; pse_port_num_queues[FE_PSE_PORT_CDM4]; q++)</div><div class='add'>+		airoha_fe_set_pse_oq_rsv(eth, FE_PSE_PORT_CDM4, q,</div><div class='add'>+					 PSE_QUEUE_RSV_PAGES);</div><div class='add'>+	if (airoha_ppe_is_enabled(eth, 1)) {</div><div class='add'>+		/* PPE2 */</div><div class='add'>+		for (q = 0; q &lt; pse_port_num_queues[FE_PSE_PORT_PPE2]; q++) {</div><div class='add'>+			if (q &lt; pse_port_num_queues[FE_PSE_PORT_PPE2] / 2)</div><div class='add'>+				airoha_fe_set_pse_oq_rsv(eth, FE_PSE_PORT_PPE2,</div><div class='add'>+							 q,</div><div class='add'>+							 PSE_QUEUE_RSV_PAGES);</div><div class='add'>+			else</div><div class='add'>+				airoha_fe_set_pse_oq_rsv(eth, FE_PSE_PORT_PPE2,</div><div class='add'>+							 q, 0);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	/* GMD4 */</div><div class='add'>+	for (q = 0; q &lt; pse_port_num_queues[FE_PSE_PORT_GDM4]; q++)</div><div class='add'>+		airoha_fe_set_pse_oq_rsv(eth, FE_PSE_PORT_GDM4, q,</div><div class='add'>+					 PSE_QUEUE_RSV_PAGES);</div><div class='add'>+	/* CDM5 */</div><div class='add'>+	for (q = 0; q &lt; pse_port_num_queues[FE_PSE_PORT_CDM5]; q++)</div><div class='add'>+		airoha_fe_set_pse_oq_rsv(eth, FE_PSE_PORT_CDM5, q,</div><div class='add'>+					 PSE_QUEUE_RSV_PAGES);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_fe_mc_vlan_clear(struct airoha_eth *eth)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; AIROHA_FE_MC_MAX_VLAN_TABLE; i++) {</div><div class='add'>+		int err, j;</div><div class='add'>+		u32 val;</div><div class='add'>+</div><div class='add'>+		airoha_fe_wr(eth, REG_MC_VLAN_DATA, 0x0);</div><div class='add'>+</div><div class='add'>+		val = FIELD_PREP(MC_VLAN_CFG_TABLE_ID_MASK, i) |</div><div class='add'>+		      MC_VLAN_CFG_TABLE_SEL_MASK | MC_VLAN_CFG_RW_MASK;</div><div class='add'>+		airoha_fe_wr(eth, REG_MC_VLAN_CFG, val);</div><div class='add'>+		err = read_poll_timeout(airoha_fe_rr, val,</div><div class='add'>+					val &amp; MC_VLAN_CFG_CMD_DONE_MASK,</div><div class='add'>+					USEC_PER_MSEC, 5 * USEC_PER_MSEC,</div><div class='add'>+					false, eth, REG_MC_VLAN_CFG);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		for (j = 0; j &lt; AIROHA_FE_MC_MAX_VLAN_PORT; j++) {</div><div class='add'>+			airoha_fe_wr(eth, REG_MC_VLAN_DATA, 0x0);</div><div class='add'>+</div><div class='add'>+			val = FIELD_PREP(MC_VLAN_CFG_TABLE_ID_MASK, i) |</div><div class='add'>+			      FIELD_PREP(MC_VLAN_CFG_PORT_ID_MASK, j) |</div><div class='add'>+			      MC_VLAN_CFG_RW_MASK;</div><div class='add'>+			airoha_fe_wr(eth, REG_MC_VLAN_CFG, val);</div><div class='add'>+			err = read_poll_timeout(airoha_fe_rr, val,</div><div class='add'>+						val &amp; MC_VLAN_CFG_CMD_DONE_MASK,</div><div class='add'>+						USEC_PER_MSEC,</div><div class='add'>+						5 * USEC_PER_MSEC, false, eth,</div><div class='add'>+						REG_MC_VLAN_CFG);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_fe_crsn_qsel_init(struct airoha_eth *eth)</div><div class='add'>+{</div><div class='add'>+	/* CDM1_CRSN_QSEL */</div><div class='add'>+	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(1, CRSN_22 &gt;&gt; 2),</div><div class='add'>+		      CDM_CRSN_QSEL_REASON_MASK(CRSN_22),</div><div class='add'>+		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_22),</div><div class='add'>+				 CDM_CRSN_QSEL_Q1));</div><div class='add'>+	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(1, CRSN_08 &gt;&gt; 2),</div><div class='add'>+		      CDM_CRSN_QSEL_REASON_MASK(CRSN_08),</div><div class='add'>+		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_08),</div><div class='add'>+				 CDM_CRSN_QSEL_Q1));</div><div class='add'>+	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(1, CRSN_21 &gt;&gt; 2),</div><div class='add'>+		      CDM_CRSN_QSEL_REASON_MASK(CRSN_21),</div><div class='add'>+		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_21),</div><div class='add'>+				 CDM_CRSN_QSEL_Q1));</div><div class='add'>+	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(1, CRSN_24 &gt;&gt; 2),</div><div class='add'>+		      CDM_CRSN_QSEL_REASON_MASK(CRSN_24),</div><div class='add'>+		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_24),</div><div class='add'>+				 CDM_CRSN_QSEL_Q6));</div><div class='add'>+	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(1, CRSN_25 &gt;&gt; 2),</div><div class='add'>+		      CDM_CRSN_QSEL_REASON_MASK(CRSN_25),</div><div class='add'>+		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_25),</div><div class='add'>+				 CDM_CRSN_QSEL_Q1));</div><div class='add'>+	/* CDM2_CRSN_QSEL */</div><div class='add'>+	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(2, CRSN_08 &gt;&gt; 2),</div><div class='add'>+		      CDM_CRSN_QSEL_REASON_MASK(CRSN_08),</div><div class='add'>+		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_08),</div><div class='add'>+				 CDM_CRSN_QSEL_Q1));</div><div class='add'>+	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(2, CRSN_21 &gt;&gt; 2),</div><div class='add'>+		      CDM_CRSN_QSEL_REASON_MASK(CRSN_21),</div><div class='add'>+		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_21),</div><div class='add'>+				 CDM_CRSN_QSEL_Q1));</div><div class='add'>+	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(2, CRSN_22 &gt;&gt; 2),</div><div class='add'>+		      CDM_CRSN_QSEL_REASON_MASK(CRSN_22),</div><div class='add'>+		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_22),</div><div class='add'>+				 CDM_CRSN_QSEL_Q1));</div><div class='add'>+	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(2, CRSN_24 &gt;&gt; 2),</div><div class='add'>+		      CDM_CRSN_QSEL_REASON_MASK(CRSN_24),</div><div class='add'>+		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_24),</div><div class='add'>+				 CDM_CRSN_QSEL_Q6));</div><div class='add'>+	airoha_fe_rmw(eth, REG_CDM_CRSN_QSEL(2, CRSN_25 &gt;&gt; 2),</div><div class='add'>+		      CDM_CRSN_QSEL_REASON_MASK(CRSN_25),</div><div class='add'>+		      FIELD_PREP(CDM_CRSN_QSEL_REASON_MASK(CRSN_25),</div><div class='add'>+				 CDM_CRSN_QSEL_Q1));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_fe_init(struct airoha_eth *eth)</div><div class='add'>+{</div><div class='add'>+	airoha_fe_maccr_init(eth);</div><div class='add'>+</div><div class='add'>+	/* PSE IQ reserve */</div><div class='add'>+	airoha_fe_rmw(eth, REG_PSE_IQ_REV1, PSE_IQ_RES1_P2_MASK,</div><div class='add'>+		      FIELD_PREP(PSE_IQ_RES1_P2_MASK, 0x10));</div><div class='add'>+	airoha_fe_rmw(eth, REG_PSE_IQ_REV2,</div><div class='add'>+		      PSE_IQ_RES2_P5_MASK | PSE_IQ_RES2_P4_MASK,</div><div class='add'>+		      FIELD_PREP(PSE_IQ_RES2_P5_MASK, 0x40) |</div><div class='add'>+		      FIELD_PREP(PSE_IQ_RES2_P4_MASK, 0x34));</div><div class='add'>+</div><div class='add'>+	/* enable FE copy engine for MC/KA/DPI */</div><div class='add'>+	airoha_fe_wr(eth, REG_FE_PCE_CFG,</div><div class='add'>+		     PCE_DPI_EN_MASK | PCE_KA_EN_MASK | PCE_MC_EN_MASK);</div><div class='add'>+	/* set vip queue selection to ring 1 */</div><div class='add'>+	airoha_fe_rmw(eth, REG_CDM_FWD_CFG(1), CDM_VIP_QSEL_MASK,</div><div class='add'>+		      FIELD_PREP(CDM_VIP_QSEL_MASK, 0x4));</div><div class='add'>+	airoha_fe_rmw(eth, REG_CDM_FWD_CFG(2), CDM_VIP_QSEL_MASK,</div><div class='add'>+		      FIELD_PREP(CDM_VIP_QSEL_MASK, 0x4));</div><div class='add'>+	/* set GDM4 source interface offset to 8 */</div><div class='add'>+	airoha_fe_rmw(eth, REG_GDM_SRC_PORT_SET(4),</div><div class='add'>+		      GDM_SPORT_OFF2_MASK |</div><div class='add'>+		      GDM_SPORT_OFF1_MASK |</div><div class='add'>+		      GDM_SPORT_OFF0_MASK,</div><div class='add'>+		      FIELD_PREP(GDM_SPORT_OFF2_MASK, 8) |</div><div class='add'>+		      FIELD_PREP(GDM_SPORT_OFF1_MASK, 8) |</div><div class='add'>+		      FIELD_PREP(GDM_SPORT_OFF0_MASK, 8));</div><div class='add'>+</div><div class='add'>+	/* set PSE Page as 128B */</div><div class='add'>+	airoha_fe_rmw(eth, REG_FE_DMA_GLO_CFG,</div><div class='add'>+		      FE_DMA_GLO_L2_SPACE_MASK | FE_DMA_GLO_PG_SZ_MASK,</div><div class='add'>+		      FIELD_PREP(FE_DMA_GLO_L2_SPACE_MASK, 2) |</div><div class='add'>+		      FE_DMA_GLO_PG_SZ_MASK);</div><div class='add'>+	airoha_fe_wr(eth, REG_FE_RST_GLO_CFG,</div><div class='add'>+		     FE_RST_CORE_MASK | FE_RST_GDM3_MBI_ARB_MASK |</div><div class='add'>+		     FE_RST_GDM4_MBI_ARB_MASK);</div><div class='add'>+	usleep_range(1000, 2000);</div><div class='add'>+</div><div class='add'>+	/* connect RxRing1 and RxRing15 to PSE Port0 OQ-1</div><div class='add'>+	 * connect other rings to PSE Port0 OQ-0</div><div class='add'>+	 */</div><div class='add'>+	airoha_fe_wr(eth, REG_FE_CDM1_OQ_MAP0, BIT(4));</div><div class='add'>+	airoha_fe_wr(eth, REG_FE_CDM1_OQ_MAP1, BIT(28));</div><div class='add'>+	airoha_fe_wr(eth, REG_FE_CDM1_OQ_MAP2, BIT(4));</div><div class='add'>+	airoha_fe_wr(eth, REG_FE_CDM1_OQ_MAP3, BIT(28));</div><div class='add'>+</div><div class='add'>+	airoha_fe_vip_setup(eth);</div><div class='add'>+	airoha_fe_pse_ports_init(eth);</div><div class='add'>+</div><div class='add'>+	airoha_fe_set(eth, REG_GDM_MISC_CFG,</div><div class='add'>+		      GDM2_RDM_ACK_WAIT_PREF_MASK |</div><div class='add'>+		      GDM2_CHN_VLD_MODE_MASK);</div><div class='add'>+	airoha_fe_rmw(eth, REG_CDM_FWD_CFG(2), CDM_OAM_QSEL_MASK,</div><div class='add'>+		      FIELD_PREP(CDM_OAM_QSEL_MASK, 15));</div><div class='add'>+</div><div class='add'>+	/* init fragment and assemble Force Port */</div><div class='add'>+	/* NPU Core-3, NPU Bridge Channel-3 */</div><div class='add'>+	airoha_fe_rmw(eth, REG_IP_FRAG_FP,</div><div class='add'>+		      IP_FRAGMENT_PORT_MASK | IP_FRAGMENT_NBQ_MASK,</div><div class='add'>+		      FIELD_PREP(IP_FRAGMENT_PORT_MASK, 6) |</div><div class='add'>+		      FIELD_PREP(IP_FRAGMENT_NBQ_MASK, 3));</div><div class='add'>+	/* QDMA LAN, RX Ring-22 */</div><div class='add'>+	airoha_fe_rmw(eth, REG_IP_FRAG_FP,</div><div class='add'>+		      IP_ASSEMBLE_PORT_MASK | IP_ASSEMBLE_NBQ_MASK,</div><div class='add'>+		      FIELD_PREP(IP_ASSEMBLE_PORT_MASK, 0) |</div><div class='add'>+		      FIELD_PREP(IP_ASSEMBLE_NBQ_MASK, 22));</div><div class='add'>+</div><div class='add'>+	airoha_fe_set(eth, REG_GDM_FWD_CFG(3), GDM_PAD_EN_MASK);</div><div class='add'>+	airoha_fe_set(eth, REG_GDM_FWD_CFG(4), GDM_PAD_EN_MASK);</div><div class='add'>+</div><div class='add'>+	airoha_fe_crsn_qsel_init(eth);</div><div class='add'>+</div><div class='add'>+	airoha_fe_clear(eth, REG_FE_CPORT_CFG, FE_CPORT_QUEUE_XFC_MASK);</div><div class='add'>+	airoha_fe_set(eth, REG_FE_CPORT_CFG, FE_CPORT_PORT_XFC_MASK);</div><div class='add'>+</div><div class='add'>+	/* default aging mode for mbi unlock issue */</div><div class='add'>+	airoha_fe_rmw(eth, REG_GDM_CHN_RLS(2),</div><div class='add'>+		      MBI_RX_AGE_SEL_MASK | MBI_TX_AGE_SEL_MASK,</div><div class='add'>+		      FIELD_PREP(MBI_RX_AGE_SEL_MASK, 3) |</div><div class='add'>+		      FIELD_PREP(MBI_TX_AGE_SEL_MASK, 3));</div><div class='add'>+</div><div class='add'>+	/* disable IFC by default */</div><div class='add'>+	airoha_fe_clear(eth, REG_FE_CSR_IFC_CFG, FE_IFC_EN_MASK);</div><div class='add'>+</div><div class='add'>+	/* enable 1:N vlan action, init vlan table */</div><div class='add'>+	airoha_fe_set(eth, REG_MC_VLAN_EN, MC_VLAN_EN_MASK);</div><div class='add'>+</div><div class='add'>+	return airoha_fe_mc_vlan_clear(eth);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_fill_rx_queue(struct airoha_queue *q)</div><div class='add'>+{</div><div class='add'>+	struct airoha_qdma *qdma = q-&gt;qdma;</div><div class='add'>+	int qid = q - &amp;qdma-&gt;q_rx[0];</div><div class='add'>+	int nframes = 0;</div><div class='add'>+</div><div class='add'>+	while (q-&gt;queued &lt; q-&gt;ndesc - 1) {</div><div class='add'>+		struct airoha_queue_entry *e = &amp;q-&gt;entry[q-&gt;head];</div><div class='add'>+		struct airoha_qdma_desc *desc = &amp;q-&gt;desc[q-&gt;head];</div><div class='add'>+		struct page *page;</div><div class='add'>+		int offset;</div><div class='add'>+		u32 val;</div><div class='add'>+</div><div class='add'>+		page = page_pool_dev_alloc_frag(q-&gt;page_pool, &amp;offset,</div><div class='add'>+						q-&gt;buf_size);</div><div class='add'>+		if (!page)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		q-&gt;head = (q-&gt;head + 1) % q-&gt;ndesc;</div><div class='add'>+		q-&gt;queued++;</div><div class='add'>+		nframes++;</div><div class='add'>+</div><div class='add'>+		e-&gt;buf = page_address(page) + offset;</div><div class='add'>+		e-&gt;dma_addr = page_pool_get_dma_addr(page) + offset;</div><div class='add'>+		e-&gt;dma_len = SKB_WITH_OVERHEAD(q-&gt;buf_size);</div><div class='add'>+</div><div class='add'>+		val = FIELD_PREP(QDMA_DESC_LEN_MASK, e-&gt;dma_len);</div><div class='add'>+		WRITE_ONCE(desc-&gt;ctrl, cpu_to_le32(val));</div><div class='add'>+		WRITE_ONCE(desc-&gt;addr, cpu_to_le32(e-&gt;dma_addr));</div><div class='add'>+		val = FIELD_PREP(QDMA_DESC_NEXT_ID_MASK, q-&gt;head);</div><div class='add'>+		WRITE_ONCE(desc-&gt;data, cpu_to_le32(val));</div><div class='add'>+		WRITE_ONCE(desc-&gt;msg0, 0);</div><div class='add'>+		WRITE_ONCE(desc-&gt;msg1, 0);</div><div class='add'>+		WRITE_ONCE(desc-&gt;msg2, 0);</div><div class='add'>+		WRITE_ONCE(desc-&gt;msg3, 0);</div><div class='add'>+</div><div class='add'>+		airoha_qdma_rmw(qdma, REG_RX_CPU_IDX(qid),</div><div class='add'>+				RX_RING_CPU_IDX_MASK,</div><div class='add'>+				FIELD_PREP(RX_RING_CPU_IDX_MASK, q-&gt;head));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return nframes;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_get_gdm_port(struct airoha_eth *eth,</div><div class='add'>+				    struct airoha_qdma_desc *desc)</div><div class='add'>+{</div><div class='add'>+	u32 port, sport, msg1 = le32_to_cpu(desc-&gt;msg1);</div><div class='add'>+</div><div class='add'>+	sport = FIELD_GET(QDMA_ETH_RXMSG_SPORT_MASK, msg1);</div><div class='add'>+	switch (sport) {</div><div class='add'>+	case 0x10 ... 0x14:</div><div class='add'>+		port = 0;</div><div class='add'>+		break;</div><div class='add'>+	case 0x2 ... 0x4:</div><div class='add'>+		port = sport - 1;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return port &gt;= ARRAY_SIZE(eth-&gt;ports) ? -EINVAL : port;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_rx_process(struct airoha_queue *q, int budget)</div><div class='add'>+{</div><div class='add'>+	enum dma_data_direction dir = page_pool_get_dma_dir(q-&gt;page_pool);</div><div class='add'>+	struct airoha_qdma *qdma = q-&gt;qdma;</div><div class='add'>+	struct airoha_eth *eth = qdma-&gt;eth;</div><div class='add'>+	int qid = q - &amp;qdma-&gt;q_rx[0];</div><div class='add'>+	int done = 0;</div><div class='add'>+</div><div class='add'>+	while (done &lt; budget) {</div><div class='add'>+		struct airoha_queue_entry *e = &amp;q-&gt;entry[q-&gt;tail];</div><div class='add'>+		struct airoha_qdma_desc *desc = &amp;q-&gt;desc[q-&gt;tail];</div><div class='add'>+		u32 hash, reason, msg1 = le32_to_cpu(desc-&gt;msg1);</div><div class='add'>+		struct page *page = virt_to_head_page(e-&gt;buf);</div><div class='add'>+		u32 desc_ctrl = le32_to_cpu(desc-&gt;ctrl);</div><div class='add'>+		struct airoha_gdm_port *port;</div><div class='add'>+		int data_len, len, p;</div><div class='add'>+</div><div class='add'>+		if (!(desc_ctrl &amp; QDMA_DESC_DONE_MASK))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		q-&gt;tail = (q-&gt;tail + 1) % q-&gt;ndesc;</div><div class='add'>+		q-&gt;queued--;</div><div class='add'>+</div><div class='add'>+		dma_sync_single_for_cpu(eth-&gt;dev, e-&gt;dma_addr,</div><div class='add'>+					SKB_WITH_OVERHEAD(q-&gt;buf_size), dir);</div><div class='add'>+</div><div class='add'>+		len = FIELD_GET(QDMA_DESC_LEN_MASK, desc_ctrl);</div><div class='add'>+		data_len = q-&gt;skb ? q-&gt;buf_size</div><div class='add'>+				  : SKB_WITH_OVERHEAD(q-&gt;buf_size);</div><div class='add'>+		if (!len || data_len &lt; len)</div><div class='add'>+			goto free_frag;</div><div class='add'>+</div><div class='add'>+		p = airoha_qdma_get_gdm_port(eth, desc);</div><div class='add'>+		if (p &lt; 0 || !eth-&gt;ports[p])</div><div class='add'>+			goto free_frag;</div><div class='add'>+</div><div class='add'>+		port = eth-&gt;ports[p];</div><div class='add'>+		if (!q-&gt;skb) { /* first buffer */</div><div class='add'>+			q-&gt;skb = napi_build_skb(e-&gt;buf, q-&gt;buf_size);</div><div class='add'>+			if (!q-&gt;skb)</div><div class='add'>+				goto free_frag;</div><div class='add'>+</div><div class='add'>+			__skb_put(q-&gt;skb, len);</div><div class='add'>+			skb_mark_for_recycle(q-&gt;skb);</div><div class='add'>+			q-&gt;skb-&gt;dev = port-&gt;dev;</div><div class='add'>+			q-&gt;skb-&gt;protocol = eth_type_trans(q-&gt;skb, port-&gt;dev);</div><div class='add'>+			q-&gt;skb-&gt;ip_summed = CHECKSUM_UNNECESSARY;</div><div class='add'>+			skb_record_rx_queue(q-&gt;skb, qid);</div><div class='add'>+		} else { /* scattered frame */</div><div class='add'>+			struct skb_shared_info *shinfo = skb_shinfo(q-&gt;skb);</div><div class='add'>+			int nr_frags = shinfo-&gt;nr_frags;</div><div class='add'>+</div><div class='add'>+			if (nr_frags &gt;= ARRAY_SIZE(shinfo-&gt;frags))</div><div class='add'>+				goto free_frag;</div><div class='add'>+</div><div class='add'>+			skb_add_rx_frag(q-&gt;skb, nr_frags, page,</div><div class='add'>+					e-&gt;buf - page_address(page), len,</div><div class='add'>+					q-&gt;buf_size);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (FIELD_GET(QDMA_DESC_MORE_MASK, desc_ctrl))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (netdev_uses_dsa(port-&gt;dev)) {</div><div class='add'>+			/* PPE module requires untagged packets to work</div><div class='add'>+			 * properly and it provides DSA port index via the</div><div class='add'>+			 * DMA descriptor. Report DSA tag to the DSA stack</div><div class='add'>+			 * via skb dst info.</div><div class='add'>+			 */</div><div class='add'>+			u32 sptag = FIELD_GET(QDMA_ETH_RXMSG_SPTAG,</div><div class='add'>+					      le32_to_cpu(desc-&gt;msg0));</div><div class='add'>+</div><div class='add'>+			if (sptag &lt; ARRAY_SIZE(port-&gt;dsa_meta) &amp;&amp;</div><div class='add'>+			    port-&gt;dsa_meta[sptag])</div><div class='add'>+				skb_dst_set_noref(q-&gt;skb,</div><div class='add'>+						  &amp;port-&gt;dsa_meta[sptag]-&gt;dst);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		hash = FIELD_GET(AIROHA_RXD4_FOE_ENTRY, msg1);</div><div class='add'>+		if (hash != AIROHA_RXD4_FOE_ENTRY)</div><div class='add'>+			skb_set_hash(q-&gt;skb, jhash_1word(hash, 0),</div><div class='add'>+				     PKT_HASH_TYPE_L4);</div><div class='add'>+</div><div class='add'>+		reason = FIELD_GET(AIROHA_RXD4_PPE_CPU_REASON, msg1);</div><div class='add'>+		if (reason == PPE_CPU_REASON_HIT_UNBIND_RATE_REACHED)</div><div class='add'>+			airoha_ppe_check_skb(&amp;eth-&gt;ppe-&gt;dev, q-&gt;skb, hash,</div><div class='add'>+					     false);</div><div class='add'>+</div><div class='add'>+		done++;</div><div class='add'>+		napi_gro_receive(&amp;q-&gt;napi, q-&gt;skb);</div><div class='add'>+		q-&gt;skb = NULL;</div><div class='add'>+		continue;</div><div class='add'>+free_frag:</div><div class='add'>+		if (q-&gt;skb) {</div><div class='add'>+			dev_kfree_skb(q-&gt;skb);</div><div class='add'>+			q-&gt;skb = NULL;</div><div class='add'>+		} else {</div><div class='add'>+			page_pool_put_full_page(q-&gt;page_pool, page, true);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	airoha_qdma_fill_rx_queue(q);</div><div class='add'>+</div><div class='add'>+	return done;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_rx_napi_poll(struct napi_struct *napi, int budget)</div><div class='add'>+{</div><div class='add'>+	struct airoha_queue *q = container_of(napi, struct airoha_queue, napi);</div><div class='add'>+	int cur, done = 0;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		cur = airoha_qdma_rx_process(q, budget - done);</div><div class='add'>+		done += cur;</div><div class='add'>+	} while (cur &amp;&amp; done &lt; budget);</div><div class='add'>+</div><div class='add'>+	if (done &lt; budget &amp;&amp; napi_complete(napi)) {</div><div class='add'>+		struct airoha_qdma *qdma = q-&gt;qdma;</div><div class='add'>+		int i, qid = q - &amp;qdma-&gt;q_rx[0];</div><div class='add'>+		int intr_reg = qid &lt; RX_DONE_HIGH_OFFSET ? QDMA_INT_REG_IDX1</div><div class='add'>+							 : QDMA_INT_REG_IDX2;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; ARRAY_SIZE(qdma-&gt;irq_banks); i++) {</div><div class='add'>+			if (!(BIT(qid) &amp; RX_IRQ_BANK_PIN_MASK(i)))</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			airoha_qdma_irq_enable(&amp;qdma-&gt;irq_banks[i], intr_reg,</div><div class='add'>+					       BIT(qid % RX_DONE_HIGH_OFFSET));</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return done;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_init_rx_queue(struct airoha_queue *q,</div><div class='add'>+				     struct airoha_qdma *qdma, int ndesc)</div><div class='add'>+{</div><div class='add'>+	const struct page_pool_params pp_params = {</div><div class='add'>+		.order = 0,</div><div class='add'>+		.pool_size = 256,</div><div class='add'>+		.flags = PP_FLAG_DMA_MAP | PP_FLAG_DMA_SYNC_DEV,</div><div class='add'>+		.dma_dir = DMA_FROM_DEVICE,</div><div class='add'>+		.max_len = PAGE_SIZE,</div><div class='add'>+		.nid = NUMA_NO_NODE,</div><div class='add'>+		.dev = qdma-&gt;eth-&gt;dev,</div><div class='add'>+		.napi = &amp;q-&gt;napi,</div><div class='add'>+	};</div><div class='add'>+	struct airoha_eth *eth = qdma-&gt;eth;</div><div class='add'>+	int qid = q - &amp;qdma-&gt;q_rx[0], thr;</div><div class='add'>+	dma_addr_t dma_addr;</div><div class='add'>+</div><div class='add'>+	q-&gt;buf_size = PAGE_SIZE / 2;</div><div class='add'>+	q-&gt;ndesc = ndesc;</div><div class='add'>+	q-&gt;qdma = qdma;</div><div class='add'>+</div><div class='add'>+	q-&gt;entry = devm_kzalloc(eth-&gt;dev, q-&gt;ndesc * sizeof(*q-&gt;entry),</div><div class='add'>+				GFP_KERNEL);</div><div class='add'>+	if (!q-&gt;entry)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	q-&gt;page_pool = page_pool_create(&amp;pp_params);</div><div class='add'>+	if (IS_ERR(q-&gt;page_pool)) {</div><div class='add'>+		int err = PTR_ERR(q-&gt;page_pool);</div><div class='add'>+</div><div class='add'>+		q-&gt;page_pool = NULL;</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	q-&gt;desc = dmam_alloc_coherent(eth-&gt;dev, q-&gt;ndesc * sizeof(*q-&gt;desc),</div><div class='add'>+				      &amp;dma_addr, GFP_KERNEL);</div><div class='add'>+	if (!q-&gt;desc)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	netif_napi_add(eth-&gt;napi_dev, &amp;q-&gt;napi, airoha_qdma_rx_napi_poll);</div><div class='add'>+</div><div class='add'>+	airoha_qdma_wr(qdma, REG_RX_RING_BASE(qid), dma_addr);</div><div class='add'>+	airoha_qdma_rmw(qdma, REG_RX_RING_SIZE(qid),</div><div class='add'>+			RX_RING_SIZE_MASK,</div><div class='add'>+			FIELD_PREP(RX_RING_SIZE_MASK, ndesc));</div><div class='add'>+</div><div class='add'>+	thr = clamp(ndesc &gt;&gt; 3, 1, 32);</div><div class='add'>+	airoha_qdma_rmw(qdma, REG_RX_RING_SIZE(qid), RX_RING_THR_MASK,</div><div class='add'>+			FIELD_PREP(RX_RING_THR_MASK, thr));</div><div class='add'>+	airoha_qdma_rmw(qdma, REG_RX_DMA_IDX(qid), RX_RING_DMA_IDX_MASK,</div><div class='add'>+			FIELD_PREP(RX_RING_DMA_IDX_MASK, q-&gt;head));</div><div class='add'>+	airoha_qdma_set(qdma, REG_RX_SCATTER_CFG(qid), RX_RING_SG_EN_MASK);</div><div class='add'>+</div><div class='add'>+	airoha_qdma_fill_rx_queue(q);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_qdma_cleanup_rx_queue(struct airoha_queue *q)</div><div class='add'>+{</div><div class='add'>+	struct airoha_eth *eth = q-&gt;qdma-&gt;eth;</div><div class='add'>+</div><div class='add'>+	while (q-&gt;queued) {</div><div class='add'>+		struct airoha_queue_entry *e = &amp;q-&gt;entry[q-&gt;tail];</div><div class='add'>+		struct page *page = virt_to_head_page(e-&gt;buf);</div><div class='add'>+</div><div class='add'>+		dma_sync_single_for_cpu(eth-&gt;dev, e-&gt;dma_addr, e-&gt;dma_len,</div><div class='add'>+					page_pool_get_dma_dir(q-&gt;page_pool));</div><div class='add'>+		page_pool_put_full_page(q-&gt;page_pool, page, false);</div><div class='add'>+		q-&gt;tail = (q-&gt;tail + 1) % q-&gt;ndesc;</div><div class='add'>+		q-&gt;queued--;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_init_rx(struct airoha_qdma *qdma)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(qdma-&gt;q_rx); i++) {</div><div class='add'>+		int err;</div><div class='add'>+</div><div class='add'>+		if (!(RX_DONE_INT_MASK &amp; BIT(i))) {</div><div class='add'>+			/* rx-queue not binded to irq */</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = airoha_qdma_init_rx_queue(&amp;qdma-&gt;q_rx[i], qdma,</div><div class='add'>+						RX_DSCP_NUM(i));</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_tx_napi_poll(struct napi_struct *napi, int budget)</div><div class='add'>+{</div><div class='add'>+	struct airoha_tx_irq_queue *irq_q;</div><div class='add'>+	int id, done = 0, irq_queued;</div><div class='add'>+	struct airoha_qdma *qdma;</div><div class='add'>+	struct airoha_eth *eth;</div><div class='add'>+	u32 status, head;</div><div class='add'>+</div><div class='add'>+	irq_q = container_of(napi, struct airoha_tx_irq_queue, napi);</div><div class='add'>+	qdma = irq_q-&gt;qdma;</div><div class='add'>+	id = irq_q - &amp;qdma-&gt;q_tx_irq[0];</div><div class='add'>+	eth = qdma-&gt;eth;</div><div class='add'>+</div><div class='add'>+	status = airoha_qdma_rr(qdma, REG_IRQ_STATUS(id));</div><div class='add'>+	head = FIELD_GET(IRQ_HEAD_IDX_MASK, status);</div><div class='add'>+	head = head % irq_q-&gt;size;</div><div class='add'>+	irq_queued = FIELD_GET(IRQ_ENTRY_LEN_MASK, status);</div><div class='add'>+</div><div class='add'>+	while (irq_queued &gt; 0 &amp;&amp; done &lt; budget) {</div><div class='add'>+		u32 qid, val = irq_q-&gt;q[head];</div><div class='add'>+		struct airoha_qdma_desc *desc;</div><div class='add'>+		struct airoha_queue_entry *e;</div><div class='add'>+		struct airoha_queue *q;</div><div class='add'>+		u32 index, desc_ctrl;</div><div class='add'>+		struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+		if (val == 0xff)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		irq_q-&gt;q[head] = 0xff; /* mark as done */</div><div class='add'>+		head = (head + 1) % irq_q-&gt;size;</div><div class='add'>+		irq_queued--;</div><div class='add'>+		done++;</div><div class='add'>+</div><div class='add'>+		qid = FIELD_GET(IRQ_RING_IDX_MASK, val);</div><div class='add'>+		if (qid &gt;= ARRAY_SIZE(qdma-&gt;q_tx))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		q = &amp;qdma-&gt;q_tx[qid];</div><div class='add'>+		if (!q-&gt;ndesc)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		index = FIELD_GET(IRQ_DESC_IDX_MASK, val);</div><div class='add'>+		if (index &gt;= q-&gt;ndesc)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		spin_lock_bh(&amp;q-&gt;lock);</div><div class='add'>+</div><div class='add'>+		if (!q-&gt;queued)</div><div class='add'>+			goto unlock;</div><div class='add'>+</div><div class='add'>+		desc = &amp;q-&gt;desc[index];</div><div class='add'>+		desc_ctrl = le32_to_cpu(desc-&gt;ctrl);</div><div class='add'>+</div><div class='add'>+		if (!(desc_ctrl &amp; QDMA_DESC_DONE_MASK) &amp;&amp;</div><div class='add'>+		    !(desc_ctrl &amp; QDMA_DESC_DROP_MASK))</div><div class='add'>+			goto unlock;</div><div class='add'>+</div><div class='add'>+		e = &amp;q-&gt;entry[index];</div><div class='add'>+		skb = e-&gt;skb;</div><div class='add'>+</div><div class='add'>+		dma_unmap_single(eth-&gt;dev, e-&gt;dma_addr, e-&gt;dma_len,</div><div class='add'>+				 DMA_TO_DEVICE);</div><div class='add'>+		e-&gt;dma_addr = 0;</div><div class='add'>+		list_add_tail(&amp;e-&gt;list, &amp;q-&gt;tx_list);</div><div class='add'>+</div><div class='add'>+		WRITE_ONCE(desc-&gt;msg0, 0);</div><div class='add'>+		WRITE_ONCE(desc-&gt;msg1, 0);</div><div class='add'>+		q-&gt;queued--;</div><div class='add'>+</div><div class='add'>+		if (skb) {</div><div class='add'>+			u16 queue = skb_get_queue_mapping(skb);</div><div class='add'>+			struct netdev_queue *txq;</div><div class='add'>+</div><div class='add'>+			txq = netdev_get_tx_queue(skb-&gt;dev, queue);</div><div class='add'>+			netdev_tx_completed_queue(txq, 1, skb-&gt;len);</div><div class='add'>+			if (netif_tx_queue_stopped(txq) &amp;&amp;</div><div class='add'>+			    q-&gt;ndesc - q-&gt;queued &gt;= q-&gt;free_thr)</div><div class='add'>+				netif_tx_wake_queue(txq);</div><div class='add'>+</div><div class='add'>+			dev_kfree_skb_any(skb);</div><div class='add'>+		}</div><div class='add'>+unlock:</div><div class='add'>+		spin_unlock_bh(&amp;q-&gt;lock);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (done) {</div><div class='add'>+		int i, len = done &gt;&gt; 7;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; len; i++)</div><div class='add'>+			airoha_qdma_rmw(qdma, REG_IRQ_CLEAR_LEN(id),</div><div class='add'>+					IRQ_CLEAR_LEN_MASK, 0x80);</div><div class='add'>+		airoha_qdma_rmw(qdma, REG_IRQ_CLEAR_LEN(id),</div><div class='add'>+				IRQ_CLEAR_LEN_MASK, (done &amp; 0x7f));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (done &lt; budget &amp;&amp; napi_complete(napi))</div><div class='add'>+		airoha_qdma_irq_enable(&amp;qdma-&gt;irq_banks[0], QDMA_INT_REG_IDX0,</div><div class='add'>+				       TX_DONE_INT_MASK(id));</div><div class='add'>+</div><div class='add'>+	return done;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_init_tx_queue(struct airoha_queue *q,</div><div class='add'>+				     struct airoha_qdma *qdma, int size)</div><div class='add'>+{</div><div class='add'>+	struct airoha_eth *eth = qdma-&gt;eth;</div><div class='add'>+	int i, qid = q - &amp;qdma-&gt;q_tx[0];</div><div class='add'>+	dma_addr_t dma_addr;</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;q-&gt;lock);</div><div class='add'>+	q-&gt;ndesc = size;</div><div class='add'>+	q-&gt;qdma = qdma;</div><div class='add'>+	q-&gt;free_thr = 1 + MAX_SKB_FRAGS;</div><div class='add'>+	INIT_LIST_HEAD(&amp;q-&gt;tx_list);</div><div class='add'>+</div><div class='add'>+	q-&gt;entry = devm_kzalloc(eth-&gt;dev, q-&gt;ndesc * sizeof(*q-&gt;entry),</div><div class='add'>+				GFP_KERNEL);</div><div class='add'>+	if (!q-&gt;entry)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	q-&gt;desc = dmam_alloc_coherent(eth-&gt;dev, q-&gt;ndesc * sizeof(*q-&gt;desc),</div><div class='add'>+				      &amp;dma_addr, GFP_KERNEL);</div><div class='add'>+	if (!q-&gt;desc)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; q-&gt;ndesc; i++) {</div><div class='add'>+		u32 val = FIELD_PREP(QDMA_DESC_DONE_MASK, 1);</div><div class='add'>+</div><div class='add'>+		list_add_tail(&amp;q-&gt;entry[i].list, &amp;q-&gt;tx_list);</div><div class='add'>+		WRITE_ONCE(q-&gt;desc[i].ctrl, cpu_to_le32(val));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* xmit ring drop default setting */</div><div class='add'>+	airoha_qdma_set(qdma, REG_TX_RING_BLOCKING(qid),</div><div class='add'>+			TX_RING_IRQ_BLOCKING_TX_DROP_EN_MASK);</div><div class='add'>+</div><div class='add'>+	airoha_qdma_wr(qdma, REG_TX_RING_BASE(qid), dma_addr);</div><div class='add'>+	airoha_qdma_rmw(qdma, REG_TX_CPU_IDX(qid), TX_RING_CPU_IDX_MASK,</div><div class='add'>+			FIELD_PREP(TX_RING_CPU_IDX_MASK, 0));</div><div class='add'>+	airoha_qdma_rmw(qdma, REG_TX_DMA_IDX(qid), TX_RING_DMA_IDX_MASK,</div><div class='add'>+			FIELD_PREP(TX_RING_DMA_IDX_MASK, 0));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_tx_irq_init(struct airoha_tx_irq_queue *irq_q,</div><div class='add'>+				   struct airoha_qdma *qdma, int size)</div><div class='add'>+{</div><div class='add'>+	int id = irq_q - &amp;qdma-&gt;q_tx_irq[0];</div><div class='add'>+	struct airoha_eth *eth = qdma-&gt;eth;</div><div class='add'>+	dma_addr_t dma_addr;</div><div class='add'>+</div><div class='add'>+	netif_napi_add_tx(eth-&gt;napi_dev, &amp;irq_q-&gt;napi,</div><div class='add'>+			  airoha_qdma_tx_napi_poll);</div><div class='add'>+	irq_q-&gt;q = dmam_alloc_coherent(eth-&gt;dev, size * sizeof(u32),</div><div class='add'>+				       &amp;dma_addr, GFP_KERNEL);</div><div class='add'>+	if (!irq_q-&gt;q)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	memset(irq_q-&gt;q, 0xff, size * sizeof(u32));</div><div class='add'>+	irq_q-&gt;size = size;</div><div class='add'>+	irq_q-&gt;qdma = qdma;</div><div class='add'>+</div><div class='add'>+	airoha_qdma_wr(qdma, REG_TX_IRQ_BASE(id), dma_addr);</div><div class='add'>+	airoha_qdma_rmw(qdma, REG_TX_IRQ_CFG(id), TX_IRQ_DEPTH_MASK,</div><div class='add'>+			FIELD_PREP(TX_IRQ_DEPTH_MASK, size));</div><div class='add'>+	airoha_qdma_rmw(qdma, REG_TX_IRQ_CFG(id), TX_IRQ_THR_MASK,</div><div class='add'>+			FIELD_PREP(TX_IRQ_THR_MASK, 1));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_init_tx(struct airoha_qdma *qdma)</div><div class='add'>+{</div><div class='add'>+	int i, err;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(qdma-&gt;q_tx_irq); i++) {</div><div class='add'>+		err = airoha_qdma_tx_irq_init(&amp;qdma-&gt;q_tx_irq[i], qdma,</div><div class='add'>+					      IRQ_QUEUE_LEN(i));</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(qdma-&gt;q_tx); i++) {</div><div class='add'>+		err = airoha_qdma_init_tx_queue(&amp;qdma-&gt;q_tx[i], qdma,</div><div class='add'>+						TX_DSCP_NUM);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_qdma_cleanup_tx_queue(struct airoha_queue *q)</div><div class='add'>+{</div><div class='add'>+	struct airoha_eth *eth = q-&gt;qdma-&gt;eth;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;q-&gt;lock);</div><div class='add'>+	for (i = 0; i &lt; q-&gt;ndesc; i++) {</div><div class='add'>+		struct airoha_queue_entry *e = &amp;q-&gt;entry[i];</div><div class='add'>+</div><div class='add'>+		if (!e-&gt;dma_addr)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		dma_unmap_single(eth-&gt;dev, e-&gt;dma_addr, e-&gt;dma_len,</div><div class='add'>+				 DMA_TO_DEVICE);</div><div class='add'>+		dev_kfree_skb_any(e-&gt;skb);</div><div class='add'>+		e-&gt;dma_addr = 0;</div><div class='add'>+		e-&gt;skb = NULL;</div><div class='add'>+		list_add_tail(&amp;e-&gt;list, &amp;q-&gt;tx_list);</div><div class='add'>+		q-&gt;queued--;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_bh(&amp;q-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_init_hfwd_queues(struct airoha_qdma *qdma)</div><div class='add'>+{</div><div class='add'>+	int size, index, num_desc = HW_DSCP_NUM;</div><div class='add'>+	struct airoha_eth *eth = qdma-&gt;eth;</div><div class='add'>+	int id = qdma - &amp;eth-&gt;qdma[0];</div><div class='add'>+	u32 status, buf_size;</div><div class='add'>+	dma_addr_t dma_addr;</div><div class='add'>+	const char *name;</div><div class='add'>+</div><div class='add'>+	name = devm_kasprintf(eth-&gt;dev, GFP_KERNEL, "qdma%d-buf", id);</div><div class='add'>+	if (!name)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	buf_size = id ? AIROHA_MAX_PACKET_SIZE / 2 : AIROHA_MAX_PACKET_SIZE;</div><div class='add'>+	index = of_property_match_string(eth-&gt;dev-&gt;of_node,</div><div class='add'>+					 "memory-region-names", name);</div><div class='add'>+	if (index &gt;= 0) {</div><div class='add'>+		struct reserved_mem *rmem;</div><div class='add'>+		struct device_node *np;</div><div class='add'>+</div><div class='add'>+		/* Consume reserved memory for hw forwarding buffers queue if</div><div class='add'>+		 * available in the DTS</div><div class='add'>+		 */</div><div class='add'>+		np = of_parse_phandle(eth-&gt;dev-&gt;of_node, "memory-region",</div><div class='add'>+				      index);</div><div class='add'>+		if (!np)</div><div class='add'>+			return -ENODEV;</div><div class='add'>+</div><div class='add'>+		rmem = of_reserved_mem_lookup(np);</div><div class='add'>+		of_node_put(np);</div><div class='add'>+		dma_addr = rmem-&gt;base;</div><div class='add'>+		/* Compute the number of hw descriptors according to the</div><div class='add'>+		 * reserved memory size and the payload buffer size</div><div class='add'>+		 */</div><div class='add'>+		num_desc = div_u64(rmem-&gt;size, buf_size);</div><div class='add'>+	} else {</div><div class='add'>+		size = buf_size * num_desc;</div><div class='add'>+		if (!dmam_alloc_coherent(eth-&gt;dev, size, &amp;dma_addr,</div><div class='add'>+					 GFP_KERNEL))</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	airoha_qdma_wr(qdma, REG_FWD_BUF_BASE, dma_addr);</div><div class='add'>+</div><div class='add'>+	size = num_desc * sizeof(struct airoha_qdma_fwd_desc);</div><div class='add'>+	if (!dmam_alloc_coherent(eth-&gt;dev, size, &amp;dma_addr, GFP_KERNEL))</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	airoha_qdma_wr(qdma, REG_FWD_DSCP_BASE, dma_addr);</div><div class='add'>+	/* QDMA0: 2KB. QDMA1: 1KB */</div><div class='add'>+	airoha_qdma_rmw(qdma, REG_HW_FWD_DSCP_CFG,</div><div class='add'>+			HW_FWD_DSCP_PAYLOAD_SIZE_MASK,</div><div class='add'>+			FIELD_PREP(HW_FWD_DSCP_PAYLOAD_SIZE_MASK, !!id));</div><div class='add'>+	airoha_qdma_rmw(qdma, REG_FWD_DSCP_LOW_THR, FWD_DSCP_LOW_THR_MASK,</div><div class='add'>+			FIELD_PREP(FWD_DSCP_LOW_THR_MASK, 128));</div><div class='add'>+	airoha_qdma_rmw(qdma, REG_LMGR_INIT_CFG,</div><div class='add'>+			LMGR_INIT_START | LMGR_SRAM_MODE_MASK |</div><div class='add'>+			HW_FWD_DESC_NUM_MASK,</div><div class='add'>+			FIELD_PREP(HW_FWD_DESC_NUM_MASK, num_desc) |</div><div class='add'>+			LMGR_INIT_START | LMGR_SRAM_MODE_MASK);</div><div class='add'>+</div><div class='add'>+	return read_poll_timeout(airoha_qdma_rr, status,</div><div class='add'>+				 !(status &amp; LMGR_INIT_START), USEC_PER_MSEC,</div><div class='add'>+				 30 * USEC_PER_MSEC, true, qdma,</div><div class='add'>+				 REG_LMGR_INIT_CFG);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_qdma_init_qos(struct airoha_qdma *qdma)</div><div class='add'>+{</div><div class='add'>+	airoha_qdma_clear(qdma, REG_TXWRR_MODE_CFG, TWRR_WEIGHT_SCALE_MASK);</div><div class='add'>+	airoha_qdma_set(qdma, REG_TXWRR_MODE_CFG, TWRR_WEIGHT_BASE_MASK);</div><div class='add'>+</div><div class='add'>+	airoha_qdma_clear(qdma, REG_PSE_BUF_USAGE_CFG,</div><div class='add'>+			  PSE_BUF_ESTIMATE_EN_MASK);</div><div class='add'>+</div><div class='add'>+	airoha_qdma_set(qdma, REG_EGRESS_RATE_METER_CFG,</div><div class='add'>+			EGRESS_RATE_METER_EN_MASK |</div><div class='add'>+			EGRESS_RATE_METER_EQ_RATE_EN_MASK);</div><div class='add'>+	/* 2047us x 31 = 63.457ms */</div><div class='add'>+	airoha_qdma_rmw(qdma, REG_EGRESS_RATE_METER_CFG,</div><div class='add'>+			EGRESS_RATE_METER_WINDOW_SZ_MASK,</div><div class='add'>+			FIELD_PREP(EGRESS_RATE_METER_WINDOW_SZ_MASK, 0x1f));</div><div class='add'>+	airoha_qdma_rmw(qdma, REG_EGRESS_RATE_METER_CFG,</div><div class='add'>+			EGRESS_RATE_METER_TIMESLICE_MASK,</div><div class='add'>+			FIELD_PREP(EGRESS_RATE_METER_TIMESLICE_MASK, 0x7ff));</div><div class='add'>+</div><div class='add'>+	/* ratelimit init */</div><div class='add'>+	airoha_qdma_set(qdma, REG_GLB_TRTCM_CFG, GLB_TRTCM_EN_MASK);</div><div class='add'>+	/* fast-tick 25us */</div><div class='add'>+	airoha_qdma_rmw(qdma, REG_GLB_TRTCM_CFG, GLB_FAST_TICK_MASK,</div><div class='add'>+			FIELD_PREP(GLB_FAST_TICK_MASK, 25));</div><div class='add'>+	airoha_qdma_rmw(qdma, REG_GLB_TRTCM_CFG, GLB_SLOW_TICK_RATIO_MASK,</div><div class='add'>+			FIELD_PREP(GLB_SLOW_TICK_RATIO_MASK, 40));</div><div class='add'>+</div><div class='add'>+	airoha_qdma_set(qdma, REG_EGRESS_TRTCM_CFG, EGRESS_TRTCM_EN_MASK);</div><div class='add'>+	airoha_qdma_rmw(qdma, REG_EGRESS_TRTCM_CFG, EGRESS_FAST_TICK_MASK,</div><div class='add'>+			FIELD_PREP(EGRESS_FAST_TICK_MASK, 25));</div><div class='add'>+	airoha_qdma_rmw(qdma, REG_EGRESS_TRTCM_CFG,</div><div class='add'>+			EGRESS_SLOW_TICK_RATIO_MASK,</div><div class='add'>+			FIELD_PREP(EGRESS_SLOW_TICK_RATIO_MASK, 40));</div><div class='add'>+</div><div class='add'>+	airoha_qdma_set(qdma, REG_INGRESS_TRTCM_CFG, INGRESS_TRTCM_EN_MASK);</div><div class='add'>+	airoha_qdma_clear(qdma, REG_INGRESS_TRTCM_CFG,</div><div class='add'>+			  INGRESS_TRTCM_MODE_MASK);</div><div class='add'>+	airoha_qdma_rmw(qdma, REG_INGRESS_TRTCM_CFG, INGRESS_FAST_TICK_MASK,</div><div class='add'>+			FIELD_PREP(INGRESS_FAST_TICK_MASK, 125));</div><div class='add'>+	airoha_qdma_rmw(qdma, REG_INGRESS_TRTCM_CFG,</div><div class='add'>+			INGRESS_SLOW_TICK_RATIO_MASK,</div><div class='add'>+			FIELD_PREP(INGRESS_SLOW_TICK_RATIO_MASK, 8));</div><div class='add'>+</div><div class='add'>+	airoha_qdma_set(qdma, REG_SLA_TRTCM_CFG, SLA_TRTCM_EN_MASK);</div><div class='add'>+	airoha_qdma_rmw(qdma, REG_SLA_TRTCM_CFG, SLA_FAST_TICK_MASK,</div><div class='add'>+			FIELD_PREP(SLA_FAST_TICK_MASK, 25));</div><div class='add'>+	airoha_qdma_rmw(qdma, REG_SLA_TRTCM_CFG, SLA_SLOW_TICK_RATIO_MASK,</div><div class='add'>+			FIELD_PREP(SLA_SLOW_TICK_RATIO_MASK, 40));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_qdma_init_qos_stats(struct airoha_qdma *qdma)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; AIROHA_NUM_QOS_CHANNELS; i++) {</div><div class='add'>+		/* Tx-cpu transferred count */</div><div class='add'>+		airoha_qdma_wr(qdma, REG_CNTR_VAL(i &lt;&lt; 1), 0);</div><div class='add'>+		airoha_qdma_wr(qdma, REG_CNTR_CFG(i &lt;&lt; 1),</div><div class='add'>+			       CNTR_EN_MASK | CNTR_ALL_QUEUE_EN_MASK |</div><div class='add'>+			       CNTR_ALL_DSCP_RING_EN_MASK |</div><div class='add'>+			       FIELD_PREP(CNTR_CHAN_MASK, i));</div><div class='add'>+		/* Tx-fwd transferred count */</div><div class='add'>+		airoha_qdma_wr(qdma, REG_CNTR_VAL((i &lt;&lt; 1) + 1), 0);</div><div class='add'>+		airoha_qdma_wr(qdma, REG_CNTR_CFG(i &lt;&lt; 1),</div><div class='add'>+			       CNTR_EN_MASK | CNTR_ALL_QUEUE_EN_MASK |</div><div class='add'>+			       CNTR_ALL_DSCP_RING_EN_MASK |</div><div class='add'>+			       FIELD_PREP(CNTR_SRC_MASK, 1) |</div><div class='add'>+			       FIELD_PREP(CNTR_CHAN_MASK, i));</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_hw_init(struct airoha_qdma *qdma)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(qdma-&gt;irq_banks); i++) {</div><div class='add'>+		/* clear pending irqs */</div><div class='add'>+		airoha_qdma_wr(qdma, REG_INT_STATUS(i), 0xffffffff);</div><div class='add'>+		/* setup rx irqs */</div><div class='add'>+		airoha_qdma_irq_enable(&amp;qdma-&gt;irq_banks[i], QDMA_INT_REG_IDX0,</div><div class='add'>+				       INT_RX0_MASK(RX_IRQ_BANK_PIN_MASK(i)));</div><div class='add'>+		airoha_qdma_irq_enable(&amp;qdma-&gt;irq_banks[i], QDMA_INT_REG_IDX1,</div><div class='add'>+				       INT_RX1_MASK(RX_IRQ_BANK_PIN_MASK(i)));</div><div class='add'>+		airoha_qdma_irq_enable(&amp;qdma-&gt;irq_banks[i], QDMA_INT_REG_IDX2,</div><div class='add'>+				       INT_RX2_MASK(RX_IRQ_BANK_PIN_MASK(i)));</div><div class='add'>+		airoha_qdma_irq_enable(&amp;qdma-&gt;irq_banks[i], QDMA_INT_REG_IDX3,</div><div class='add'>+				       INT_RX3_MASK(RX_IRQ_BANK_PIN_MASK(i)));</div><div class='add'>+	}</div><div class='add'>+	/* setup tx irqs */</div><div class='add'>+	airoha_qdma_irq_enable(&amp;qdma-&gt;irq_banks[0], QDMA_INT_REG_IDX0,</div><div class='add'>+			       TX_COHERENT_LOW_INT_MASK | INT_TX_MASK);</div><div class='add'>+	airoha_qdma_irq_enable(&amp;qdma-&gt;irq_banks[0], QDMA_INT_REG_IDX4,</div><div class='add'>+			       TX_COHERENT_HIGH_INT_MASK);</div><div class='add'>+</div><div class='add'>+	/* setup irq binding */</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(qdma-&gt;q_tx); i++) {</div><div class='add'>+		if (!qdma-&gt;q_tx[i].ndesc)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (TX_RING_IRQ_BLOCKING_MAP_MASK &amp; BIT(i))</div><div class='add'>+			airoha_qdma_set(qdma, REG_TX_RING_BLOCKING(i),</div><div class='add'>+					TX_RING_IRQ_BLOCKING_CFG_MASK);</div><div class='add'>+		else</div><div class='add'>+			airoha_qdma_clear(qdma, REG_TX_RING_BLOCKING(i),</div><div class='add'>+					  TX_RING_IRQ_BLOCKING_CFG_MASK);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	airoha_qdma_wr(qdma, REG_QDMA_GLOBAL_CFG,</div><div class='add'>+		       FIELD_PREP(GLOBAL_CFG_DMA_PREFERENCE_MASK, 3) |</div><div class='add'>+		       GLOBAL_CFG_CPU_TXR_RR_MASK |</div><div class='add'>+		       GLOBAL_CFG_PAYLOAD_BYTE_SWAP_MASK |</div><div class='add'>+		       GLOBAL_CFG_MULTICAST_MODIFY_FP_MASK |</div><div class='add'>+		       GLOBAL_CFG_MULTICAST_EN_MASK |</div><div class='add'>+		       GLOBAL_CFG_IRQ0_EN_MASK | GLOBAL_CFG_IRQ1_EN_MASK |</div><div class='add'>+		       GLOBAL_CFG_TX_WB_DONE_MASK |</div><div class='add'>+		       FIELD_PREP(GLOBAL_CFG_MAX_ISSUE_NUM_MASK, 2));</div><div class='add'>+</div><div class='add'>+	airoha_qdma_init_qos(qdma);</div><div class='add'>+</div><div class='add'>+	/* disable qdma rx delay interrupt */</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(qdma-&gt;q_rx); i++) {</div><div class='add'>+		if (!qdma-&gt;q_rx[i].ndesc)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		airoha_qdma_clear(qdma, REG_RX_DELAY_INT_IDX(i),</div><div class='add'>+				  RX_DELAY_INT_MASK);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	airoha_qdma_set(qdma, REG_TXQ_CNGST_CFG,</div><div class='add'>+			TXQ_CNGST_DROP_EN | TXQ_CNGST_DEI_DROP_EN);</div><div class='add'>+	airoha_qdma_init_qos_stats(qdma);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t airoha_irq_handler(int irq, void *dev_instance)</div><div class='add'>+{</div><div class='add'>+	struct airoha_irq_bank *irq_bank = dev_instance;</div><div class='add'>+	struct airoha_qdma *qdma = irq_bank-&gt;qdma;</div><div class='add'>+	u32 rx_intr_mask = 0, rx_intr1, rx_intr2;</div><div class='add'>+	u32 intr[ARRAY_SIZE(irq_bank-&gt;irqmask)];</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(intr); i++) {</div><div class='add'>+		intr[i] = airoha_qdma_rr(qdma, REG_INT_STATUS(i));</div><div class='add'>+		intr[i] &amp;= irq_bank-&gt;irqmask[i];</div><div class='add'>+		airoha_qdma_wr(qdma, REG_INT_STATUS(i), intr[i]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!test_bit(DEV_STATE_INITIALIZED, &amp;qdma-&gt;eth-&gt;state))</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+</div><div class='add'>+	rx_intr1 = intr[1] &amp; RX_DONE_LOW_INT_MASK;</div><div class='add'>+	if (rx_intr1) {</div><div class='add'>+		airoha_qdma_irq_disable(irq_bank, QDMA_INT_REG_IDX1, rx_intr1);</div><div class='add'>+		rx_intr_mask |= rx_intr1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rx_intr2 = intr[2] &amp; RX_DONE_HIGH_INT_MASK;</div><div class='add'>+	if (rx_intr2) {</div><div class='add'>+		airoha_qdma_irq_disable(irq_bank, QDMA_INT_REG_IDX2, rx_intr2);</div><div class='add'>+		rx_intr_mask |= (rx_intr2 &lt;&lt; 16);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; rx_intr_mask &amp;&amp; i &lt; ARRAY_SIZE(qdma-&gt;q_rx); i++) {</div><div class='add'>+		if (!qdma-&gt;q_rx[i].ndesc)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (rx_intr_mask &amp; BIT(i))</div><div class='add'>+			napi_schedule(&amp;qdma-&gt;q_rx[i].napi);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (intr[0] &amp; INT_TX_MASK) {</div><div class='add'>+		for (i = 0; i &lt; ARRAY_SIZE(qdma-&gt;q_tx_irq); i++) {</div><div class='add'>+			if (!(intr[0] &amp; TX_DONE_INT_MASK(i)))</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			airoha_qdma_irq_disable(irq_bank, QDMA_INT_REG_IDX0,</div><div class='add'>+						TX_DONE_INT_MASK(i));</div><div class='add'>+			napi_schedule(&amp;qdma-&gt;q_tx_irq[i].napi);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_init_irq_banks(struct platform_device *pdev,</div><div class='add'>+				      struct airoha_qdma *qdma)</div><div class='add'>+{</div><div class='add'>+	struct airoha_eth *eth = qdma-&gt;eth;</div><div class='add'>+	int i, id = qdma - &amp;eth-&gt;qdma[0];</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(qdma-&gt;irq_banks); i++) {</div><div class='add'>+		struct airoha_irq_bank *irq_bank = &amp;qdma-&gt;irq_banks[i];</div><div class='add'>+		int err, irq_index = 4 * id + i;</div><div class='add'>+		const char *name;</div><div class='add'>+</div><div class='add'>+		spin_lock_init(&amp;irq_bank-&gt;irq_lock);</div><div class='add'>+		irq_bank-&gt;qdma = qdma;</div><div class='add'>+</div><div class='add'>+		irq_bank-&gt;irq = platform_get_irq(pdev, irq_index);</div><div class='add'>+		if (irq_bank-&gt;irq &lt; 0)</div><div class='add'>+			return irq_bank-&gt;irq;</div><div class='add'>+</div><div class='add'>+		name = devm_kasprintf(eth-&gt;dev, GFP_KERNEL,</div><div class='add'>+				      KBUILD_MODNAME ".%d", irq_index);</div><div class='add'>+		if (!name)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		err = devm_request_irq(eth-&gt;dev, irq_bank-&gt;irq,</div><div class='add'>+				       airoha_irq_handler, IRQF_SHARED, name,</div><div class='add'>+				       irq_bank);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_init(struct platform_device *pdev,</div><div class='add'>+			    struct airoha_eth *eth,</div><div class='add'>+			    struct airoha_qdma *qdma)</div><div class='add'>+{</div><div class='add'>+	int err, id = qdma - &amp;eth-&gt;qdma[0];</div><div class='add'>+	const char *res;</div><div class='add'>+</div><div class='add'>+	qdma-&gt;eth = eth;</div><div class='add'>+	res = devm_kasprintf(eth-&gt;dev, GFP_KERNEL, "qdma%d", id);</div><div class='add'>+	if (!res)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	qdma-&gt;regs = devm_platform_ioremap_resource_byname(pdev, res);</div><div class='add'>+	if (IS_ERR(qdma-&gt;regs))</div><div class='add'>+		return dev_err_probe(eth-&gt;dev, PTR_ERR(qdma-&gt;regs),</div><div class='add'>+				     "failed to iomap qdma%d regs\n", id);</div><div class='add'>+</div><div class='add'>+	err = airoha_qdma_init_irq_banks(pdev, qdma);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = airoha_qdma_init_rx(qdma);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = airoha_qdma_init_tx(qdma);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = airoha_qdma_init_hfwd_queues(qdma);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return airoha_qdma_hw_init(qdma);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_hw_init(struct platform_device *pdev,</div><div class='add'>+			  struct airoha_eth *eth)</div><div class='add'>+{</div><div class='add'>+	int err, i;</div><div class='add'>+</div><div class='add'>+	/* disable xsi */</div><div class='add'>+	err = reset_control_bulk_assert(eth-&gt;soc-&gt;num_xsi_rsts, eth-&gt;xsi_rsts);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = reset_control_bulk_assert(ARRAY_SIZE(eth-&gt;rsts), eth-&gt;rsts);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	msleep(20);</div><div class='add'>+	err = reset_control_bulk_deassert(ARRAY_SIZE(eth-&gt;rsts), eth-&gt;rsts);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	msleep(20);</div><div class='add'>+	err = airoha_fe_init(eth);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(eth-&gt;qdma); i++) {</div><div class='add'>+		err = airoha_qdma_init(pdev, eth, &amp;eth-&gt;qdma[i]);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = airoha_ppe_init(eth);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	set_bit(DEV_STATE_INITIALIZED, &amp;eth-&gt;state);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_hw_cleanup(struct airoha_qdma *qdma)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(qdma-&gt;q_rx); i++) {</div><div class='add'>+		if (!qdma-&gt;q_rx[i].ndesc)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		netif_napi_del(&amp;qdma-&gt;q_rx[i].napi);</div><div class='add'>+		airoha_qdma_cleanup_rx_queue(&amp;qdma-&gt;q_rx[i]);</div><div class='add'>+		if (qdma-&gt;q_rx[i].page_pool)</div><div class='add'>+			page_pool_destroy(qdma-&gt;q_rx[i].page_pool);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(qdma-&gt;q_tx_irq); i++)</div><div class='add'>+		netif_napi_del(&amp;qdma-&gt;q_tx_irq[i].napi);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(qdma-&gt;q_tx); i++) {</div><div class='add'>+		if (!qdma-&gt;q_tx[i].ndesc)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		airoha_qdma_cleanup_tx_queue(&amp;qdma-&gt;q_tx[i]);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_qdma_start_napi(struct airoha_qdma *qdma)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(qdma-&gt;q_tx_irq); i++)</div><div class='add'>+		napi_enable(&amp;qdma-&gt;q_tx_irq[i].napi);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(qdma-&gt;q_rx); i++) {</div><div class='add'>+		if (!qdma-&gt;q_rx[i].ndesc)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		napi_enable(&amp;qdma-&gt;q_rx[i].napi);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_qdma_stop_napi(struct airoha_qdma *qdma)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(qdma-&gt;q_tx_irq); i++)</div><div class='add'>+		napi_disable(&amp;qdma-&gt;q_tx_irq[i].napi);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(qdma-&gt;q_rx); i++) {</div><div class='add'>+		if (!qdma-&gt;q_rx[i].ndesc)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		napi_disable(&amp;qdma-&gt;q_rx[i].napi);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_update_hw_stats(struct airoha_gdm_port *port)</div><div class='add'>+{</div><div class='add'>+	struct airoha_eth *eth = port-&gt;qdma-&gt;eth;</div><div class='add'>+	u32 val, i = 0;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;port-&gt;stats.lock);</div><div class='add'>+	u64_stats_update_begin(&amp;port-&gt;stats.syncp);</div><div class='add'>+</div><div class='add'>+	/* TX */</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_TX_OK_PKT_CNT_H(port-&gt;id));</div><div class='add'>+	port-&gt;stats.tx_ok_pkts += ((u64)val &lt;&lt; 32);</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_TX_OK_PKT_CNT_L(port-&gt;id));</div><div class='add'>+	port-&gt;stats.tx_ok_pkts += val;</div><div class='add'>+</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_TX_OK_BYTE_CNT_H(port-&gt;id));</div><div class='add'>+	port-&gt;stats.tx_ok_bytes += ((u64)val &lt;&lt; 32);</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_TX_OK_BYTE_CNT_L(port-&gt;id));</div><div class='add'>+	port-&gt;stats.tx_ok_bytes += val;</div><div class='add'>+</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_DROP_CNT(port-&gt;id));</div><div class='add'>+	port-&gt;stats.tx_drops += val;</div><div class='add'>+</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_BC_CNT(port-&gt;id));</div><div class='add'>+	port-&gt;stats.tx_broadcast += val;</div><div class='add'>+</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_MC_CNT(port-&gt;id));</div><div class='add'>+	port-&gt;stats.tx_multicast += val;</div><div class='add'>+</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_RUNT_CNT(port-&gt;id));</div><div class='add'>+	port-&gt;stats.tx_len[i] += val;</div><div class='add'>+</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_E64_CNT_H(port-&gt;id));</div><div class='add'>+	port-&gt;stats.tx_len[i] += ((u64)val &lt;&lt; 32);</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_E64_CNT_L(port-&gt;id));</div><div class='add'>+	port-&gt;stats.tx_len[i++] += val;</div><div class='add'>+</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_L64_CNT_H(port-&gt;id));</div><div class='add'>+	port-&gt;stats.tx_len[i] += ((u64)val &lt;&lt; 32);</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_L64_CNT_L(port-&gt;id));</div><div class='add'>+	port-&gt;stats.tx_len[i++] += val;</div><div class='add'>+</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_L127_CNT_H(port-&gt;id));</div><div class='add'>+	port-&gt;stats.tx_len[i] += ((u64)val &lt;&lt; 32);</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_L127_CNT_L(port-&gt;id));</div><div class='add'>+	port-&gt;stats.tx_len[i++] += val;</div><div class='add'>+</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_L255_CNT_H(port-&gt;id));</div><div class='add'>+	port-&gt;stats.tx_len[i] += ((u64)val &lt;&lt; 32);</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_L255_CNT_L(port-&gt;id));</div><div class='add'>+	port-&gt;stats.tx_len[i++] += val;</div><div class='add'>+</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_L511_CNT_H(port-&gt;id));</div><div class='add'>+	port-&gt;stats.tx_len[i] += ((u64)val &lt;&lt; 32);</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_L511_CNT_L(port-&gt;id));</div><div class='add'>+	port-&gt;stats.tx_len[i++] += val;</div><div class='add'>+</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_L1023_CNT_H(port-&gt;id));</div><div class='add'>+	port-&gt;stats.tx_len[i] += ((u64)val &lt;&lt; 32);</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_L1023_CNT_L(port-&gt;id));</div><div class='add'>+	port-&gt;stats.tx_len[i++] += val;</div><div class='add'>+</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_LONG_CNT(port-&gt;id));</div><div class='add'>+	port-&gt;stats.tx_len[i++] += val;</div><div class='add'>+</div><div class='add'>+	/* RX */</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_RX_OK_PKT_CNT_H(port-&gt;id));</div><div class='add'>+	port-&gt;stats.rx_ok_pkts += ((u64)val &lt;&lt; 32);</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_RX_OK_PKT_CNT_L(port-&gt;id));</div><div class='add'>+	port-&gt;stats.rx_ok_pkts += val;</div><div class='add'>+</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_RX_OK_BYTE_CNT_H(port-&gt;id));</div><div class='add'>+	port-&gt;stats.rx_ok_bytes += ((u64)val &lt;&lt; 32);</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_RX_OK_BYTE_CNT_L(port-&gt;id));</div><div class='add'>+	port-&gt;stats.rx_ok_bytes += val;</div><div class='add'>+</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_DROP_CNT(port-&gt;id));</div><div class='add'>+	port-&gt;stats.rx_drops += val;</div><div class='add'>+</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_BC_CNT(port-&gt;id));</div><div class='add'>+	port-&gt;stats.rx_broadcast += val;</div><div class='add'>+</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_MC_CNT(port-&gt;id));</div><div class='add'>+	port-&gt;stats.rx_multicast += val;</div><div class='add'>+</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_RX_ERROR_DROP_CNT(port-&gt;id));</div><div class='add'>+	port-&gt;stats.rx_errors += val;</div><div class='add'>+</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_CRC_ERR_CNT(port-&gt;id));</div><div class='add'>+	port-&gt;stats.rx_crc_error += val;</div><div class='add'>+</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_RX_OVERFLOW_DROP_CNT(port-&gt;id));</div><div class='add'>+	port-&gt;stats.rx_over_errors += val;</div><div class='add'>+</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_FRAG_CNT(port-&gt;id));</div><div class='add'>+	port-&gt;stats.rx_fragment += val;</div><div class='add'>+</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_JABBER_CNT(port-&gt;id));</div><div class='add'>+	port-&gt;stats.rx_jabber += val;</div><div class='add'>+</div><div class='add'>+	i = 0;</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_RUNT_CNT(port-&gt;id));</div><div class='add'>+	port-&gt;stats.rx_len[i] += val;</div><div class='add'>+</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_E64_CNT_H(port-&gt;id));</div><div class='add'>+	port-&gt;stats.rx_len[i] += ((u64)val &lt;&lt; 32);</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_E64_CNT_L(port-&gt;id));</div><div class='add'>+	port-&gt;stats.rx_len[i++] += val;</div><div class='add'>+</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_L64_CNT_H(port-&gt;id));</div><div class='add'>+	port-&gt;stats.rx_len[i] += ((u64)val &lt;&lt; 32);</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_L64_CNT_L(port-&gt;id));</div><div class='add'>+	port-&gt;stats.rx_len[i++] += val;</div><div class='add'>+</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_L127_CNT_H(port-&gt;id));</div><div class='add'>+	port-&gt;stats.rx_len[i] += ((u64)val &lt;&lt; 32);</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_L127_CNT_L(port-&gt;id));</div><div class='add'>+	port-&gt;stats.rx_len[i++] += val;</div><div class='add'>+</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_L255_CNT_H(port-&gt;id));</div><div class='add'>+	port-&gt;stats.rx_len[i] += ((u64)val &lt;&lt; 32);</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_L255_CNT_L(port-&gt;id));</div><div class='add'>+	port-&gt;stats.rx_len[i++] += val;</div><div class='add'>+</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_L511_CNT_H(port-&gt;id));</div><div class='add'>+	port-&gt;stats.rx_len[i] += ((u64)val &lt;&lt; 32);</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_L511_CNT_L(port-&gt;id));</div><div class='add'>+	port-&gt;stats.rx_len[i++] += val;</div><div class='add'>+</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_L1023_CNT_H(port-&gt;id));</div><div class='add'>+	port-&gt;stats.rx_len[i] += ((u64)val &lt;&lt; 32);</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_L1023_CNT_L(port-&gt;id));</div><div class='add'>+	port-&gt;stats.rx_len[i++] += val;</div><div class='add'>+</div><div class='add'>+	val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_LONG_CNT(port-&gt;id));</div><div class='add'>+	port-&gt;stats.rx_len[i++] += val;</div><div class='add'>+</div><div class='add'>+	/* reset mib counters */</div><div class='add'>+	airoha_fe_set(eth, REG_FE_GDM_MIB_CLEAR(port-&gt;id),</div><div class='add'>+		      FE_GDM_MIB_RX_CLEAR_MASK | FE_GDM_MIB_TX_CLEAR_MASK);</div><div class='add'>+</div><div class='add'>+	u64_stats_update_end(&amp;port-&gt;stats.syncp);</div><div class='add'>+	spin_unlock(&amp;port-&gt;stats.lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_dev_open(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	int err, len = ETH_HLEN + dev-&gt;mtu + ETH_FCS_LEN;</div><div class='add'>+	struct airoha_gdm_port *port = netdev_priv(dev);</div><div class='add'>+	struct airoha_qdma *qdma = port-&gt;qdma;</div><div class='add'>+</div><div class='add'>+	netif_tx_start_all_queues(dev);</div><div class='add'>+	err = airoha_set_vip_for_gdm_port(port, true);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (netdev_uses_dsa(dev))</div><div class='add'>+		airoha_fe_set(qdma-&gt;eth, REG_GDM_INGRESS_CFG(port-&gt;id),</div><div class='add'>+			      GDM_STAG_EN_MASK);</div><div class='add'>+	else</div><div class='add'>+		airoha_fe_clear(qdma-&gt;eth, REG_GDM_INGRESS_CFG(port-&gt;id),</div><div class='add'>+				GDM_STAG_EN_MASK);</div><div class='add'>+</div><div class='add'>+	airoha_fe_rmw(qdma-&gt;eth, REG_GDM_LEN_CFG(port-&gt;id),</div><div class='add'>+		      GDM_SHORT_LEN_MASK | GDM_LONG_LEN_MASK,</div><div class='add'>+		      FIELD_PREP(GDM_SHORT_LEN_MASK, 60) |</div><div class='add'>+		      FIELD_PREP(GDM_LONG_LEN_MASK, len));</div><div class='add'>+</div><div class='add'>+	airoha_qdma_set(qdma, REG_QDMA_GLOBAL_CFG,</div><div class='add'>+			GLOBAL_CFG_TX_DMA_EN_MASK |</div><div class='add'>+			GLOBAL_CFG_RX_DMA_EN_MASK);</div><div class='add'>+	atomic_inc(&amp;qdma-&gt;users);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_dev_stop(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct airoha_gdm_port *port = netdev_priv(dev);</div><div class='add'>+	struct airoha_qdma *qdma = port-&gt;qdma;</div><div class='add'>+	int i, err;</div><div class='add'>+</div><div class='add'>+	netif_tx_disable(dev);</div><div class='add'>+	err = airoha_set_vip_for_gdm_port(port, false);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(qdma-&gt;q_tx); i++)</div><div class='add'>+		netdev_tx_reset_subqueue(dev, i);</div><div class='add'>+</div><div class='add'>+	if (atomic_dec_and_test(&amp;qdma-&gt;users)) {</div><div class='add'>+		airoha_qdma_clear(qdma, REG_QDMA_GLOBAL_CFG,</div><div class='add'>+				  GLOBAL_CFG_TX_DMA_EN_MASK |</div><div class='add'>+				  GLOBAL_CFG_RX_DMA_EN_MASK);</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; ARRAY_SIZE(qdma-&gt;q_tx); i++) {</div><div class='add'>+			if (!qdma-&gt;q_tx[i].ndesc)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			airoha_qdma_cleanup_tx_queue(&amp;qdma-&gt;q_tx[i]);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_dev_set_macaddr(struct net_device *dev, void *p)</div><div class='add'>+{</div><div class='add'>+	struct airoha_gdm_port *port = netdev_priv(dev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = eth_mac_addr(dev, p);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	airoha_set_macaddr(port, dev-&gt;dev_addr);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airhoha_set_gdm2_loopback(struct airoha_gdm_port *port)</div><div class='add'>+{</div><div class='add'>+	struct airoha_eth *eth = port-&gt;qdma-&gt;eth;</div><div class='add'>+	u32 val, pse_port, chan, nbq;</div><div class='add'>+	int src_port;</div><div class='add'>+</div><div class='add'>+	/* Forward the traffic to the proper GDM port */</div><div class='add'>+	pse_port = port-&gt;id == AIROHA_GDM3_IDX ? FE_PSE_PORT_GDM3</div><div class='add'>+					       : FE_PSE_PORT_GDM4;</div><div class='add'>+	airoha_set_gdm_port_fwd_cfg(eth, REG_GDM_FWD_CFG(2), pse_port);</div><div class='add'>+	airoha_fe_clear(eth, REG_GDM_FWD_CFG(2), GDM_STRIP_CRC_MASK);</div><div class='add'>+</div><div class='add'>+	/* Enable GDM2 loopback */</div><div class='add'>+	airoha_fe_wr(eth, REG_GDM_TXCHN_EN(2), 0xffffffff);</div><div class='add'>+	airoha_fe_wr(eth, REG_GDM_RXCHN_EN(2), 0xffff);</div><div class='add'>+</div><div class='add'>+	chan = port-&gt;id == AIROHA_GDM3_IDX ? airoha_is_7581(eth) ? 4 : 3 : 0;</div><div class='add'>+	airoha_fe_rmw(eth, REG_GDM_LPBK_CFG(2),</div><div class='add'>+		      LPBK_CHAN_MASK | LPBK_MODE_MASK | LPBK_EN_MASK,</div><div class='add'>+		      FIELD_PREP(LPBK_CHAN_MASK, chan) |</div><div class='add'>+		      LBK_GAP_MODE_MASK | LBK_LEN_MODE_MASK |</div><div class='add'>+		      LBK_CHAN_MODE_MASK | LPBK_EN_MASK);</div><div class='add'>+	airoha_fe_rmw(eth, REG_GDM_LEN_CFG(2),</div><div class='add'>+		      GDM_SHORT_LEN_MASK | GDM_LONG_LEN_MASK,</div><div class='add'>+		      FIELD_PREP(GDM_SHORT_LEN_MASK, 60) |</div><div class='add'>+		      FIELD_PREP(GDM_LONG_LEN_MASK, AIROHA_MAX_MTU));</div><div class='add'>+</div><div class='add'>+	/* Disable VIP and IFC for GDM2 */</div><div class='add'>+	airoha_fe_clear(eth, REG_FE_VIP_PORT_EN, BIT(2));</div><div class='add'>+	airoha_fe_clear(eth, REG_FE_IFC_PORT_EN, BIT(2));</div><div class='add'>+</div><div class='add'>+	/* XXX: handle XSI_USB_PORT and XSI_PCE1_PORT */</div><div class='add'>+	nbq = port-&gt;id == AIROHA_GDM3_IDX &amp;&amp; airoha_is_7581(eth) ? 4 : 0;</div><div class='add'>+	src_port = eth-&gt;soc-&gt;ops.get_src_port_id(port, nbq);</div><div class='add'>+	if (src_port &lt; 0)</div><div class='add'>+		return src_port;</div><div class='add'>+</div><div class='add'>+	airoha_fe_rmw(eth, REG_FE_WAN_PORT,</div><div class='add'>+		      WAN1_EN_MASK | WAN1_MASK | WAN0_MASK,</div><div class='add'>+		      FIELD_PREP(WAN0_MASK, src_port));</div><div class='add'>+	val = src_port &amp; SP_CPORT_DFT_MASK;</div><div class='add'>+	airoha_fe_rmw(eth,</div><div class='add'>+		      REG_SP_DFT_CPORT(src_port &gt;&gt; fls(SP_CPORT_DFT_MASK)),</div><div class='add'>+		      SP_CPORT_MASK(val),</div><div class='add'>+		      FE_PSE_PORT_CDM2 &lt;&lt; __ffs(SP_CPORT_MASK(val)));</div><div class='add'>+</div><div class='add'>+	if (port-&gt;id != AIROHA_GDM3_IDX &amp;&amp; airoha_is_7581(eth))</div><div class='add'>+		airoha_fe_rmw(eth, REG_SRC_PORT_FC_MAP6,</div><div class='add'>+			      FC_ID_OF_SRC_PORT24_MASK,</div><div class='add'>+			      FIELD_PREP(FC_ID_OF_SRC_PORT24_MASK, 2));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_dev_init(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct airoha_gdm_port *port = netdev_priv(dev);</div><div class='add'>+	struct airoha_qdma *qdma = port-&gt;qdma;</div><div class='add'>+	struct airoha_eth *eth = qdma-&gt;eth;</div><div class='add'>+	u32 pse_port, fe_cpu_port;</div><div class='add'>+	u8 ppe_id;</div><div class='add'>+</div><div class='add'>+	airoha_set_macaddr(port, dev-&gt;dev_addr);</div><div class='add'>+</div><div class='add'>+	switch (port-&gt;id) {</div><div class='add'>+	case 3:</div><div class='add'>+	case 4:</div><div class='add'>+		/* If GDM2 is active we can't enable loopback */</div><div class='add'>+		if (!eth-&gt;ports[1]) {</div><div class='add'>+			int err;</div><div class='add'>+</div><div class='add'>+			err = airhoha_set_gdm2_loopback(port);</div><div class='add'>+			if (err)</div><div class='add'>+				return err;</div><div class='add'>+		}</div><div class='add'>+		fallthrough;</div><div class='add'>+	case 2:</div><div class='add'>+		if (airoha_ppe_is_enabled(eth, 1)) {</div><div class='add'>+			/* For PPE2 always use secondary cpu port. */</div><div class='add'>+			fe_cpu_port = FE_PSE_PORT_CDM2;</div><div class='add'>+			pse_port = FE_PSE_PORT_PPE2;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		fallthrough;</div><div class='add'>+	default: {</div><div class='add'>+		u8 qdma_id = qdma - &amp;eth-&gt;qdma[0];</div><div class='add'>+</div><div class='add'>+		/* For PPE1 select cpu port according to the running QDMA. */</div><div class='add'>+		fe_cpu_port = qdma_id ? FE_PSE_PORT_CDM2 : FE_PSE_PORT_CDM1;</div><div class='add'>+		pse_port = FE_PSE_PORT_PPE1;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	airoha_set_gdm_port_fwd_cfg(eth, REG_GDM_FWD_CFG(port-&gt;id), pse_port);</div><div class='add'>+	ppe_id = pse_port == FE_PSE_PORT_PPE2 ? 1 : 0;</div><div class='add'>+	airoha_fe_rmw(eth, REG_PPE_DFT_CPORT0(ppe_id),</div><div class='add'>+		      DFT_CPORT_MASK(port-&gt;id),</div><div class='add'>+		      fe_cpu_port &lt;&lt; __ffs(DFT_CPORT_MASK(port-&gt;id)));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_dev_get_stats64(struct net_device *dev,</div><div class='add'>+				   struct rtnl_link_stats64 *storage)</div><div class='add'>+{</div><div class='add'>+	struct airoha_gdm_port *port = netdev_priv(dev);</div><div class='add'>+	unsigned int start;</div><div class='add'>+</div><div class='add'>+	airoha_update_hw_stats(port);</div><div class='add'>+	do {</div><div class='add'>+		start = u64_stats_fetch_begin(&amp;port-&gt;stats.syncp);</div><div class='add'>+		storage-&gt;rx_packets = port-&gt;stats.rx_ok_pkts;</div><div class='add'>+		storage-&gt;tx_packets = port-&gt;stats.tx_ok_pkts;</div><div class='add'>+		storage-&gt;rx_bytes = port-&gt;stats.rx_ok_bytes;</div><div class='add'>+		storage-&gt;tx_bytes = port-&gt;stats.tx_ok_bytes;</div><div class='add'>+		storage-&gt;multicast = port-&gt;stats.rx_multicast;</div><div class='add'>+		storage-&gt;rx_errors = port-&gt;stats.rx_errors;</div><div class='add'>+		storage-&gt;rx_dropped = port-&gt;stats.rx_drops;</div><div class='add'>+		storage-&gt;tx_dropped = port-&gt;stats.tx_drops;</div><div class='add'>+		storage-&gt;rx_crc_errors = port-&gt;stats.rx_crc_error;</div><div class='add'>+		storage-&gt;rx_over_errors = port-&gt;stats.rx_over_errors;</div><div class='add'>+	} while (u64_stats_fetch_retry(&amp;port-&gt;stats.syncp, start));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_dev_change_mtu(struct net_device *dev, int mtu)</div><div class='add'>+{</div><div class='add'>+	struct airoha_gdm_port *port = netdev_priv(dev);</div><div class='add'>+	struct airoha_eth *eth = port-&gt;qdma-&gt;eth;</div><div class='add'>+	u32 len = ETH_HLEN + mtu + ETH_FCS_LEN;</div><div class='add'>+</div><div class='add'>+	airoha_fe_rmw(eth, REG_GDM_LEN_CFG(port-&gt;id),</div><div class='add'>+		      GDM_LONG_LEN_MASK,</div><div class='add'>+		      FIELD_PREP(GDM_LONG_LEN_MASK, len));</div><div class='add'>+	WRITE_ONCE(dev-&gt;mtu, mtu);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 airoha_dev_select_queue(struct net_device *dev, struct sk_buff *skb,</div><div class='add'>+				   struct net_device *sb_dev)</div><div class='add'>+{</div><div class='add'>+	struct airoha_gdm_port *port = netdev_priv(dev);</div><div class='add'>+	int queue, channel;</div><div class='add'>+</div><div class='add'>+	/* For dsa device select QoS channel according to the dsa user port</div><div class='add'>+	 * index, rely on port id otherwise. Select QoS queue based on the</div><div class='add'>+	 * skb priority.</div><div class='add'>+	 */</div><div class='add'>+	channel = netdev_uses_dsa(dev) ? skb_get_queue_mapping(skb) : port-&gt;id;</div><div class='add'>+	channel = channel % AIROHA_NUM_QOS_CHANNELS;</div><div class='add'>+	queue = (skb-&gt;priority - 1) % AIROHA_NUM_QOS_QUEUES; /* QoS queue */</div><div class='add'>+	queue = channel * AIROHA_NUM_QOS_QUEUES + queue;</div><div class='add'>+</div><div class='add'>+	return queue &lt; dev-&gt;num_tx_queues ? queue : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 airoha_get_dsa_tag(struct sk_buff *skb, struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+#if IS_ENABLED(CONFIG_NET_DSA)</div><div class='add'>+	struct ethhdr *ehdr;</div><div class='add'>+	u8 xmit_tpid;</div><div class='add'>+	u16 tag;</div><div class='add'>+</div><div class='add'>+	if (!netdev_uses_dsa(dev))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;dsa_ptr-&gt;tag_ops-&gt;proto != DSA_TAG_PROTO_MTK)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (skb_cow_head(skb, 0))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ehdr = (struct ethhdr *)skb-&gt;data;</div><div class='add'>+	tag = be16_to_cpu(ehdr-&gt;h_proto);</div><div class='add'>+	xmit_tpid = tag &gt;&gt; 8;</div><div class='add'>+</div><div class='add'>+	switch (xmit_tpid) {</div><div class='add'>+	case MTK_HDR_XMIT_TAGGED_TPID_8100:</div><div class='add'>+		ehdr-&gt;h_proto = cpu_to_be16(ETH_P_8021Q);</div><div class='add'>+		tag &amp;= ~(MTK_HDR_XMIT_TAGGED_TPID_8100 &lt;&lt; 8);</div><div class='add'>+		break;</div><div class='add'>+	case MTK_HDR_XMIT_TAGGED_TPID_88A8:</div><div class='add'>+		ehdr-&gt;h_proto = cpu_to_be16(ETH_P_8021AD);</div><div class='add'>+		tag &amp;= ~(MTK_HDR_XMIT_TAGGED_TPID_88A8 &lt;&lt; 8);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		/* PPE module requires untagged DSA packets to work properly,</div><div class='add'>+		 * so move DSA tag to DMA descriptor.</div><div class='add'>+		 */</div><div class='add'>+		memmove(skb-&gt;data + MTK_HDR_LEN, skb-&gt;data, 2 * ETH_ALEN);</div><div class='add'>+		__skb_pull(skb, MTK_HDR_LEN);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return tag;</div><div class='add'>+#else</div><div class='add'>+	return 0;</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_get_fe_port(struct airoha_gdm_port *port)</div><div class='add'>+{</div><div class='add'>+	struct airoha_qdma *qdma = port-&gt;qdma;</div><div class='add'>+	struct airoha_eth *eth = qdma-&gt;eth;</div><div class='add'>+</div><div class='add'>+	switch (eth-&gt;soc-&gt;version) {</div><div class='add'>+	case 0x7583:</div><div class='add'>+		return port-&gt;id == AIROHA_GDM3_IDX ? FE_PSE_PORT_GDM3</div><div class='add'>+						   : port-&gt;id;</div><div class='add'>+	case 0x7581:</div><div class='add'>+	default:</div><div class='add'>+		return port-&gt;id == AIROHA_GDM4_IDX ? FE_PSE_PORT_GDM4</div><div class='add'>+						   : port-&gt;id;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static netdev_tx_t airoha_dev_xmit(struct sk_buff *skb,</div><div class='add'>+				   struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct airoha_gdm_port *port = netdev_priv(dev);</div><div class='add'>+	struct airoha_qdma *qdma = port-&gt;qdma;</div><div class='add'>+	u32 nr_frags, tag, msg0, msg1, len;</div><div class='add'>+	struct airoha_queue_entry *e;</div><div class='add'>+	struct netdev_queue *txq;</div><div class='add'>+	struct airoha_queue *q;</div><div class='add'>+	LIST_HEAD(tx_list);</div><div class='add'>+	void *data;</div><div class='add'>+	int i, qid;</div><div class='add'>+	u16 index;</div><div class='add'>+	u8 fport;</div><div class='add'>+</div><div class='add'>+	qid = skb_get_queue_mapping(skb) % ARRAY_SIZE(qdma-&gt;q_tx);</div><div class='add'>+	tag = airoha_get_dsa_tag(skb, dev);</div><div class='add'>+</div><div class='add'>+	msg0 = FIELD_PREP(QDMA_ETH_TXMSG_CHAN_MASK,</div><div class='add'>+			  qid / AIROHA_NUM_QOS_QUEUES) |</div><div class='add'>+	       FIELD_PREP(QDMA_ETH_TXMSG_QUEUE_MASK,</div><div class='add'>+			  qid % AIROHA_NUM_QOS_QUEUES) |</div><div class='add'>+	       FIELD_PREP(QDMA_ETH_TXMSG_SP_TAG_MASK, tag);</div><div class='add'>+	if (skb-&gt;ip_summed == CHECKSUM_PARTIAL)</div><div class='add'>+		msg0 |= FIELD_PREP(QDMA_ETH_TXMSG_TCO_MASK, 1) |</div><div class='add'>+			FIELD_PREP(QDMA_ETH_TXMSG_UCO_MASK, 1) |</div><div class='add'>+			FIELD_PREP(QDMA_ETH_TXMSG_ICO_MASK, 1);</div><div class='add'>+</div><div class='add'>+	/* TSO: fill MSS info in tcp checksum field */</div><div class='add'>+	if (skb_is_gso(skb)) {</div><div class='add'>+		if (skb_cow_head(skb, 0))</div><div class='add'>+			goto error;</div><div class='add'>+</div><div class='add'>+		if (skb_shinfo(skb)-&gt;gso_type &amp; (SKB_GSO_TCPV4 |</div><div class='add'>+						 SKB_GSO_TCPV6)) {</div><div class='add'>+			__be16 csum = cpu_to_be16(skb_shinfo(skb)-&gt;gso_size);</div><div class='add'>+</div><div class='add'>+			tcp_hdr(skb)-&gt;check = (__force __sum16)csum;</div><div class='add'>+			msg0 |= FIELD_PREP(QDMA_ETH_TXMSG_TSO_MASK, 1);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fport = airoha_get_fe_port(port);</div><div class='add'>+	msg1 = FIELD_PREP(QDMA_ETH_TXMSG_FPORT_MASK, fport) |</div><div class='add'>+	       FIELD_PREP(QDMA_ETH_TXMSG_METER_MASK, 0x7f);</div><div class='add'>+</div><div class='add'>+	q = &amp;qdma-&gt;q_tx[qid];</div><div class='add'>+	if (WARN_ON_ONCE(!q-&gt;ndesc))</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;q-&gt;lock);</div><div class='add'>+</div><div class='add'>+	txq = netdev_get_tx_queue(dev, qid);</div><div class='add'>+	nr_frags = 1 + skb_shinfo(skb)-&gt;nr_frags;</div><div class='add'>+</div><div class='add'>+	if (q-&gt;queued + nr_frags &gt;= q-&gt;ndesc) {</div><div class='add'>+		/* not enough space in the queue */</div><div class='add'>+		netif_tx_stop_queue(txq);</div><div class='add'>+		spin_unlock_bh(&amp;q-&gt;lock);</div><div class='add'>+		return NETDEV_TX_BUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	len = skb_headlen(skb);</div><div class='add'>+	data = skb-&gt;data;</div><div class='add'>+</div><div class='add'>+	e = list_first_entry(&amp;q-&gt;tx_list, struct airoha_queue_entry,</div><div class='add'>+			     list);</div><div class='add'>+	index = e - q-&gt;entry;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; nr_frags; i++) {</div><div class='add'>+		struct airoha_qdma_desc *desc = &amp;q-&gt;desc[index];</div><div class='add'>+		skb_frag_t *frag = &amp;skb_shinfo(skb)-&gt;frags[i];</div><div class='add'>+		dma_addr_t addr;</div><div class='add'>+		u32 val;</div><div class='add'>+</div><div class='add'>+		addr = dma_map_single(dev-&gt;dev.parent, data, len,</div><div class='add'>+				      DMA_TO_DEVICE);</div><div class='add'>+		if (unlikely(dma_mapping_error(dev-&gt;dev.parent, addr)))</div><div class='add'>+			goto error_unmap;</div><div class='add'>+</div><div class='add'>+		list_move_tail(&amp;e-&gt;list, &amp;tx_list);</div><div class='add'>+		e-&gt;skb = i ? NULL : skb;</div><div class='add'>+		e-&gt;dma_addr = addr;</div><div class='add'>+		e-&gt;dma_len = len;</div><div class='add'>+</div><div class='add'>+		e = list_first_entry(&amp;q-&gt;tx_list, struct airoha_queue_entry,</div><div class='add'>+				     list);</div><div class='add'>+		index = e - q-&gt;entry;</div><div class='add'>+</div><div class='add'>+		val = FIELD_PREP(QDMA_DESC_LEN_MASK, len);</div><div class='add'>+		if (i &lt; nr_frags - 1)</div><div class='add'>+			val |= FIELD_PREP(QDMA_DESC_MORE_MASK, 1);</div><div class='add'>+		WRITE_ONCE(desc-&gt;ctrl, cpu_to_le32(val));</div><div class='add'>+		WRITE_ONCE(desc-&gt;addr, cpu_to_le32(addr));</div><div class='add'>+		val = FIELD_PREP(QDMA_DESC_NEXT_ID_MASK, index);</div><div class='add'>+		WRITE_ONCE(desc-&gt;data, cpu_to_le32(val));</div><div class='add'>+		WRITE_ONCE(desc-&gt;msg0, cpu_to_le32(msg0));</div><div class='add'>+		WRITE_ONCE(desc-&gt;msg1, cpu_to_le32(msg1));</div><div class='add'>+		WRITE_ONCE(desc-&gt;msg2, cpu_to_le32(0xffff));</div><div class='add'>+</div><div class='add'>+		data = skb_frag_address(frag);</div><div class='add'>+		len = skb_frag_size(frag);</div><div class='add'>+	}</div><div class='add'>+	q-&gt;queued += i;</div><div class='add'>+</div><div class='add'>+	skb_tx_timestamp(skb);</div><div class='add'>+	netdev_tx_sent_queue(txq, skb-&gt;len);</div><div class='add'>+</div><div class='add'>+	if (netif_xmit_stopped(txq) || !netdev_xmit_more())</div><div class='add'>+		airoha_qdma_rmw(qdma, REG_TX_CPU_IDX(qid),</div><div class='add'>+				TX_RING_CPU_IDX_MASK,</div><div class='add'>+				FIELD_PREP(TX_RING_CPU_IDX_MASK, index));</div><div class='add'>+</div><div class='add'>+	if (q-&gt;ndesc - q-&gt;queued &lt; q-&gt;free_thr)</div><div class='add'>+		netif_tx_stop_queue(txq);</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;q-&gt;lock);</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+error_unmap:</div><div class='add'>+	while (!list_empty(&amp;tx_list)) {</div><div class='add'>+		e = list_first_entry(&amp;tx_list, struct airoha_queue_entry,</div><div class='add'>+				     list);</div><div class='add'>+		dma_unmap_single(dev-&gt;dev.parent, e-&gt;dma_addr, e-&gt;dma_len,</div><div class='add'>+				 DMA_TO_DEVICE);</div><div class='add'>+		e-&gt;dma_addr = 0;</div><div class='add'>+		list_move_tail(&amp;e-&gt;list, &amp;q-&gt;tx_list);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;q-&gt;lock);</div><div class='add'>+error:</div><div class='add'>+	dev_kfree_skb_any(skb);</div><div class='add'>+	dev-&gt;stats.tx_dropped++;</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_ethtool_get_drvinfo(struct net_device *dev,</div><div class='add'>+				       struct ethtool_drvinfo *info)</div><div class='add'>+{</div><div class='add'>+	struct airoha_gdm_port *port = netdev_priv(dev);</div><div class='add'>+	struct airoha_eth *eth = port-&gt;qdma-&gt;eth;</div><div class='add'>+</div><div class='add'>+	strscpy(info-&gt;driver, eth-&gt;dev-&gt;driver-&gt;name, sizeof(info-&gt;driver));</div><div class='add'>+	strscpy(info-&gt;bus_info, dev_name(eth-&gt;dev), sizeof(info-&gt;bus_info));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_ethtool_get_mac_stats(struct net_device *dev,</div><div class='add'>+					 struct ethtool_eth_mac_stats *stats)</div><div class='add'>+{</div><div class='add'>+	struct airoha_gdm_port *port = netdev_priv(dev);</div><div class='add'>+	unsigned int start;</div><div class='add'>+</div><div class='add'>+	airoha_update_hw_stats(port);</div><div class='add'>+	do {</div><div class='add'>+		start = u64_stats_fetch_begin(&amp;port-&gt;stats.syncp);</div><div class='add'>+		stats-&gt;FramesTransmittedOK = port-&gt;stats.tx_ok_pkts;</div><div class='add'>+		stats-&gt;OctetsTransmittedOK = port-&gt;stats.tx_ok_bytes;</div><div class='add'>+		stats-&gt;MulticastFramesXmittedOK = port-&gt;stats.tx_multicast;</div><div class='add'>+		stats-&gt;BroadcastFramesXmittedOK = port-&gt;stats.tx_broadcast;</div><div class='add'>+		stats-&gt;FramesReceivedOK = port-&gt;stats.rx_ok_pkts;</div><div class='add'>+		stats-&gt;OctetsReceivedOK = port-&gt;stats.rx_ok_bytes;</div><div class='add'>+		stats-&gt;BroadcastFramesReceivedOK = port-&gt;stats.rx_broadcast;</div><div class='add'>+	} while (u64_stats_fetch_retry(&amp;port-&gt;stats.syncp, start));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ethtool_rmon_hist_range airoha_ethtool_rmon_ranges[] = {</div><div class='add'>+	{    0,    64 },</div><div class='add'>+	{   65,   127 },</div><div class='add'>+	{  128,   255 },</div><div class='add'>+	{  256,   511 },</div><div class='add'>+	{  512,  1023 },</div><div class='add'>+	{ 1024,  1518 },</div><div class='add'>+	{ 1519, 10239 },</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+airoha_ethtool_get_rmon_stats(struct net_device *dev,</div><div class='add'>+			      struct ethtool_rmon_stats *stats,</div><div class='add'>+			      const struct ethtool_rmon_hist_range **ranges)</div><div class='add'>+{</div><div class='add'>+	struct airoha_gdm_port *port = netdev_priv(dev);</div><div class='add'>+	struct airoha_hw_stats *hw_stats = &amp;port-&gt;stats;</div><div class='add'>+	unsigned int start;</div><div class='add'>+</div><div class='add'>+	BUILD_BUG_ON(ARRAY_SIZE(airoha_ethtool_rmon_ranges) !=</div><div class='add'>+		     ARRAY_SIZE(hw_stats-&gt;tx_len) + 1);</div><div class='add'>+	BUILD_BUG_ON(ARRAY_SIZE(airoha_ethtool_rmon_ranges) !=</div><div class='add'>+		     ARRAY_SIZE(hw_stats-&gt;rx_len) + 1);</div><div class='add'>+</div><div class='add'>+	*ranges = airoha_ethtool_rmon_ranges;</div><div class='add'>+	airoha_update_hw_stats(port);</div><div class='add'>+	do {</div><div class='add'>+		int i;</div><div class='add'>+</div><div class='add'>+		start = u64_stats_fetch_begin(&amp;port-&gt;stats.syncp);</div><div class='add'>+		stats-&gt;fragments = hw_stats-&gt;rx_fragment;</div><div class='add'>+		stats-&gt;jabbers = hw_stats-&gt;rx_jabber;</div><div class='add'>+		for (i = 0; i &lt; ARRAY_SIZE(airoha_ethtool_rmon_ranges) - 1;</div><div class='add'>+		     i++) {</div><div class='add'>+			stats-&gt;hist[i] = hw_stats-&gt;rx_len[i];</div><div class='add'>+			stats-&gt;hist_tx[i] = hw_stats-&gt;tx_len[i];</div><div class='add'>+		}</div><div class='add'>+	} while (u64_stats_fetch_retry(&amp;port-&gt;stats.syncp, start));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_set_chan_tx_sched(struct airoha_gdm_port *port,</div><div class='add'>+					 int channel, enum tx_sched_mode mode,</div><div class='add'>+					 const u16 *weights, u8 n_weights)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; AIROHA_NUM_TX_RING; i++)</div><div class='add'>+		airoha_qdma_clear(port-&gt;qdma, REG_QUEUE_CLOSE_CFG(channel),</div><div class='add'>+				  TXQ_DISABLE_CHAN_QUEUE_MASK(channel, i));</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; n_weights; i++) {</div><div class='add'>+		u32 status;</div><div class='add'>+		int err;</div><div class='add'>+</div><div class='add'>+		airoha_qdma_wr(port-&gt;qdma, REG_TXWRR_WEIGHT_CFG,</div><div class='add'>+			       TWRR_RW_CMD_MASK |</div><div class='add'>+			       FIELD_PREP(TWRR_CHAN_IDX_MASK, channel) |</div><div class='add'>+			       FIELD_PREP(TWRR_QUEUE_IDX_MASK, i) |</div><div class='add'>+			       FIELD_PREP(TWRR_VALUE_MASK, weights[i]));</div><div class='add'>+		err = read_poll_timeout(airoha_qdma_rr, status,</div><div class='add'>+					status &amp; TWRR_RW_CMD_DONE,</div><div class='add'>+					USEC_PER_MSEC, 10 * USEC_PER_MSEC,</div><div class='add'>+					true, port-&gt;qdma,</div><div class='add'>+					REG_TXWRR_WEIGHT_CFG);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	airoha_qdma_rmw(port-&gt;qdma, REG_CHAN_QOS_MODE(channel &gt;&gt; 3),</div><div class='add'>+			CHAN_QOS_MODE_MASK(channel),</div><div class='add'>+			mode &lt;&lt; __ffs(CHAN_QOS_MODE_MASK(channel)));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_set_tx_prio_sched(struct airoha_gdm_port *port,</div><div class='add'>+					 int channel)</div><div class='add'>+{</div><div class='add'>+	static const u16 w[AIROHA_NUM_QOS_QUEUES] = {};</div><div class='add'>+</div><div class='add'>+	return airoha_qdma_set_chan_tx_sched(port, channel, TC_SCH_SP, w,</div><div class='add'>+					     ARRAY_SIZE(w));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_set_tx_ets_sched(struct airoha_gdm_port *port,</div><div class='add'>+					int channel,</div><div class='add'>+					struct tc_ets_qopt_offload *opt)</div><div class='add'>+{</div><div class='add'>+	struct tc_ets_qopt_offload_replace_params *p = &amp;opt-&gt;replace_params;</div><div class='add'>+	enum tx_sched_mode mode = TC_SCH_SP;</div><div class='add'>+	u16 w[AIROHA_NUM_QOS_QUEUES] = {};</div><div class='add'>+	int i, nstrict = 0;</div><div class='add'>+</div><div class='add'>+	if (p-&gt;bands &gt; AIROHA_NUM_QOS_QUEUES)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; p-&gt;bands; i++) {</div><div class='add'>+		if (!p-&gt;quanta[i])</div><div class='add'>+			nstrict++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* this configuration is not supported by the hw */</div><div class='add'>+	if (nstrict == AIROHA_NUM_QOS_QUEUES - 1)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* EN7581 SoC supports fixed QoS band priority where WRR queues have</div><div class='add'>+	 * lowest priorities with respect to SP ones.</div><div class='add'>+	 * e.g: WRR0, WRR1, .., WRRm, SP0, SP1, .., SPn</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; nstrict; i++) {</div><div class='add'>+		if (p-&gt;priomap[p-&gt;bands - i - 1] != i)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; p-&gt;bands - nstrict; i++) {</div><div class='add'>+		if (p-&gt;priomap[i] != nstrict + i)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		w[i] = p-&gt;weights[nstrict + i];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!nstrict)</div><div class='add'>+		mode = TC_SCH_WRR8;</div><div class='add'>+	else if (nstrict &lt; AIROHA_NUM_QOS_QUEUES - 1)</div><div class='add'>+		mode = nstrict + 1;</div><div class='add'>+</div><div class='add'>+	return airoha_qdma_set_chan_tx_sched(port, channel, mode, w,</div><div class='add'>+					     ARRAY_SIZE(w));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_get_tx_ets_stats(struct airoha_gdm_port *port,</div><div class='add'>+					int channel,</div><div class='add'>+					struct tc_ets_qopt_offload *opt)</div><div class='add'>+{</div><div class='add'>+	u64 cpu_tx_packets = airoha_qdma_rr(port-&gt;qdma,</div><div class='add'>+					    REG_CNTR_VAL(channel &lt;&lt; 1));</div><div class='add'>+	u64 fwd_tx_packets = airoha_qdma_rr(port-&gt;qdma,</div><div class='add'>+					    REG_CNTR_VAL((channel &lt;&lt; 1) + 1));</div><div class='add'>+	u64 tx_packets = (cpu_tx_packets - port-&gt;cpu_tx_packets) +</div><div class='add'>+			 (fwd_tx_packets - port-&gt;fwd_tx_packets);</div><div class='add'>+	_bstats_update(opt-&gt;stats.bstats, 0, tx_packets);</div><div class='add'>+</div><div class='add'>+	port-&gt;cpu_tx_packets = cpu_tx_packets;</div><div class='add'>+	port-&gt;fwd_tx_packets = fwd_tx_packets;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_tc_setup_qdisc_ets(struct airoha_gdm_port *port,</div><div class='add'>+				     struct tc_ets_qopt_offload *opt)</div><div class='add'>+{</div><div class='add'>+	int channel;</div><div class='add'>+</div><div class='add'>+	if (opt-&gt;parent == TC_H_ROOT)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	channel = TC_H_MAJ(opt-&gt;handle) &gt;&gt; 16;</div><div class='add'>+	channel = channel % AIROHA_NUM_QOS_CHANNELS;</div><div class='add'>+</div><div class='add'>+	switch (opt-&gt;command) {</div><div class='add'>+	case TC_ETS_REPLACE:</div><div class='add'>+		return airoha_qdma_set_tx_ets_sched(port, channel, opt);</div><div class='add'>+	case TC_ETS_DESTROY:</div><div class='add'>+		/* PRIO is default qdisc scheduler */</div><div class='add'>+		return airoha_qdma_set_tx_prio_sched(port, channel);</div><div class='add'>+	case TC_ETS_STATS:</div><div class='add'>+		return airoha_qdma_get_tx_ets_stats(port, channel, opt);</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_get_rl_param(struct airoha_qdma *qdma, int queue_id,</div><div class='add'>+				    u32 addr, enum trtcm_param_type param,</div><div class='add'>+				    u32 *val_low, u32 *val_high)</div><div class='add'>+{</div><div class='add'>+	u32 idx = QDMA_METER_IDX(queue_id), group = QDMA_METER_GROUP(queue_id);</div><div class='add'>+	u32 val, config = FIELD_PREP(RATE_LIMIT_PARAM_TYPE_MASK, param) |</div><div class='add'>+			  FIELD_PREP(RATE_LIMIT_METER_GROUP_MASK, group) |</div><div class='add'>+			  FIELD_PREP(RATE_LIMIT_PARAM_INDEX_MASK, idx);</div><div class='add'>+</div><div class='add'>+	airoha_qdma_wr(qdma, REG_TRTCM_CFG_PARAM(addr), config);</div><div class='add'>+	if (read_poll_timeout(airoha_qdma_rr, val,</div><div class='add'>+			      val &amp; RATE_LIMIT_PARAM_RW_DONE_MASK,</div><div class='add'>+			      USEC_PER_MSEC, 10 * USEC_PER_MSEC, true, qdma,</div><div class='add'>+			      REG_TRTCM_CFG_PARAM(addr)))</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+	*val_low = airoha_qdma_rr(qdma, REG_TRTCM_DATA_LOW(addr));</div><div class='add'>+	if (val_high)</div><div class='add'>+		*val_high = airoha_qdma_rr(qdma, REG_TRTCM_DATA_HIGH(addr));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_set_rl_param(struct airoha_qdma *qdma, int queue_id,</div><div class='add'>+				    u32 addr, enum trtcm_param_type param,</div><div class='add'>+				    u32 val)</div><div class='add'>+{</div><div class='add'>+	u32 idx = QDMA_METER_IDX(queue_id), group = QDMA_METER_GROUP(queue_id);</div><div class='add'>+	u32 config = RATE_LIMIT_PARAM_RW_MASK |</div><div class='add'>+		     FIELD_PREP(RATE_LIMIT_PARAM_TYPE_MASK, param) |</div><div class='add'>+		     FIELD_PREP(RATE_LIMIT_METER_GROUP_MASK, group) |</div><div class='add'>+		     FIELD_PREP(RATE_LIMIT_PARAM_INDEX_MASK, idx);</div><div class='add'>+</div><div class='add'>+	airoha_qdma_wr(qdma, REG_TRTCM_DATA_LOW(addr), val);</div><div class='add'>+	airoha_qdma_wr(qdma, REG_TRTCM_CFG_PARAM(addr), config);</div><div class='add'>+</div><div class='add'>+	return read_poll_timeout(airoha_qdma_rr, val,</div><div class='add'>+				 val &amp; RATE_LIMIT_PARAM_RW_DONE_MASK,</div><div class='add'>+				 USEC_PER_MSEC, 10 * USEC_PER_MSEC, true,</div><div class='add'>+				 qdma, REG_TRTCM_CFG_PARAM(addr));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_set_rl_config(struct airoha_qdma *qdma, int queue_id,</div><div class='add'>+				     u32 addr, bool enable, u32 enable_mask)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = airoha_qdma_get_rl_param(qdma, queue_id, addr, TRTCM_MISC_MODE,</div><div class='add'>+				       &amp;val, NULL);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	val = enable ? val | enable_mask : val &amp; ~enable_mask;</div><div class='add'>+</div><div class='add'>+	return airoha_qdma_set_rl_param(qdma, queue_id, addr, TRTCM_MISC_MODE,</div><div class='add'>+					val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_set_rl_token_bucket(struct airoha_qdma *qdma,</div><div class='add'>+					   int queue_id, u32 rate_val,</div><div class='add'>+					   u32 bucket_size)</div><div class='add'>+{</div><div class='add'>+	u32 val, config, tick, unit, rate, rate_frac;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = airoha_qdma_get_rl_param(qdma, queue_id, REG_INGRESS_TRTCM_CFG,</div><div class='add'>+				       TRTCM_MISC_MODE, &amp;config, NULL);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	val = airoha_qdma_rr(qdma, REG_INGRESS_TRTCM_CFG);</div><div class='add'>+	tick = FIELD_GET(INGRESS_FAST_TICK_MASK, val);</div><div class='add'>+	if (config &amp; TRTCM_TICK_SEL)</div><div class='add'>+		tick *= FIELD_GET(INGRESS_SLOW_TICK_RATIO_MASK, val);</div><div class='add'>+	if (!tick)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	unit = (config &amp; TRTCM_PKT_MODE) ? 1000000 / tick : 8000 / tick;</div><div class='add'>+	if (!unit)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	rate = rate_val / unit;</div><div class='add'>+	rate_frac = rate_val % unit;</div><div class='add'>+	rate_frac = FIELD_PREP(TRTCM_TOKEN_RATE_MASK, rate_frac) / unit;</div><div class='add'>+	rate = FIELD_PREP(TRTCM_TOKEN_RATE_MASK, rate) |</div><div class='add'>+	       FIELD_PREP(TRTCM_TOKEN_RATE_FRACTION_MASK, rate_frac);</div><div class='add'>+</div><div class='add'>+	err = airoha_qdma_set_rl_param(qdma, queue_id, REG_INGRESS_TRTCM_CFG,</div><div class='add'>+				       TRTCM_TOKEN_RATE_MODE, rate);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	val = bucket_size;</div><div class='add'>+	if (!(config &amp; TRTCM_PKT_MODE))</div><div class='add'>+		val = max_t(u32, val, MIN_TOKEN_SIZE);</div><div class='add'>+	val = min_t(u32, __fls(val), MAX_TOKEN_SIZE_OFFSET);</div><div class='add'>+</div><div class='add'>+	return airoha_qdma_set_rl_param(qdma, queue_id, REG_INGRESS_TRTCM_CFG,</div><div class='add'>+					TRTCM_BUCKETSIZE_SHIFT_MODE, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_init_rl_config(struct airoha_qdma *qdma, int queue_id,</div><div class='add'>+				      bool enable, enum trtcm_unit_type unit)</div><div class='add'>+{</div><div class='add'>+	bool tick_sel = queue_id == 0 || queue_id == 2 || queue_id == 8;</div><div class='add'>+	enum trtcm_param mode = TRTCM_METER_MODE;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mode |= unit == TRTCM_PACKET_UNIT ? TRTCM_PKT_MODE : 0;</div><div class='add'>+	err = airoha_qdma_set_rl_config(qdma, queue_id, REG_INGRESS_TRTCM_CFG,</div><div class='add'>+					enable, mode);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return airoha_qdma_set_rl_config(qdma, queue_id, REG_INGRESS_TRTCM_CFG,</div><div class='add'>+					 tick_sel, TRTCM_TICK_SEL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_get_trtcm_param(struct airoha_qdma *qdma, int channel,</div><div class='add'>+				       u32 addr, enum trtcm_param_type param,</div><div class='add'>+				       enum trtcm_mode_type mode,</div><div class='add'>+				       u32 *val_low, u32 *val_high)</div><div class='add'>+{</div><div class='add'>+	u32 idx = QDMA_METER_IDX(channel), group = QDMA_METER_GROUP(channel);</div><div class='add'>+	u32 val, config = FIELD_PREP(TRTCM_PARAM_TYPE_MASK, param) |</div><div class='add'>+			  FIELD_PREP(TRTCM_METER_GROUP_MASK, group) |</div><div class='add'>+			  FIELD_PREP(TRTCM_PARAM_INDEX_MASK, idx) |</div><div class='add'>+			  FIELD_PREP(TRTCM_PARAM_RATE_TYPE_MASK, mode);</div><div class='add'>+</div><div class='add'>+	airoha_qdma_wr(qdma, REG_TRTCM_CFG_PARAM(addr), config);</div><div class='add'>+	if (read_poll_timeout(airoha_qdma_rr, val,</div><div class='add'>+			      val &amp; TRTCM_PARAM_RW_DONE_MASK,</div><div class='add'>+			      USEC_PER_MSEC, 10 * USEC_PER_MSEC, true,</div><div class='add'>+			      qdma, REG_TRTCM_CFG_PARAM(addr)))</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+	*val_low = airoha_qdma_rr(qdma, REG_TRTCM_DATA_LOW(addr));</div><div class='add'>+	if (val_high)</div><div class='add'>+		*val_high = airoha_qdma_rr(qdma, REG_TRTCM_DATA_HIGH(addr));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_set_trtcm_param(struct airoha_qdma *qdma, int channel,</div><div class='add'>+				       u32 addr, enum trtcm_param_type param,</div><div class='add'>+				       enum trtcm_mode_type mode, u32 val)</div><div class='add'>+{</div><div class='add'>+	u32 idx = QDMA_METER_IDX(channel), group = QDMA_METER_GROUP(channel);</div><div class='add'>+	u32 config = TRTCM_PARAM_RW_MASK |</div><div class='add'>+		     FIELD_PREP(TRTCM_PARAM_TYPE_MASK, param) |</div><div class='add'>+		     FIELD_PREP(TRTCM_METER_GROUP_MASK, group) |</div><div class='add'>+		     FIELD_PREP(TRTCM_PARAM_INDEX_MASK, idx) |</div><div class='add'>+		     FIELD_PREP(TRTCM_PARAM_RATE_TYPE_MASK, mode);</div><div class='add'>+</div><div class='add'>+	airoha_qdma_wr(qdma, REG_TRTCM_DATA_LOW(addr), val);</div><div class='add'>+	airoha_qdma_wr(qdma, REG_TRTCM_CFG_PARAM(addr), config);</div><div class='add'>+</div><div class='add'>+	return read_poll_timeout(airoha_qdma_rr, val,</div><div class='add'>+				 val &amp; TRTCM_PARAM_RW_DONE_MASK,</div><div class='add'>+				 USEC_PER_MSEC, 10 * USEC_PER_MSEC, true,</div><div class='add'>+				 qdma, REG_TRTCM_CFG_PARAM(addr));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_set_trtcm_config(struct airoha_qdma *qdma, int channel,</div><div class='add'>+					u32 addr, enum trtcm_mode_type mode,</div><div class='add'>+					bool enable, u32 enable_mask)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	if (airoha_qdma_get_trtcm_param(qdma, channel, addr, TRTCM_MISC_MODE,</div><div class='add'>+					mode, &amp;val, NULL))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	val = enable ? val | enable_mask : val &amp; ~enable_mask;</div><div class='add'>+</div><div class='add'>+	return airoha_qdma_set_trtcm_param(qdma, channel, addr, TRTCM_MISC_MODE,</div><div class='add'>+					   mode, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_set_trtcm_token_bucket(struct airoha_qdma *qdma,</div><div class='add'>+					      int channel, u32 addr,</div><div class='add'>+					      enum trtcm_mode_type mode,</div><div class='add'>+					      u32 rate_val, u32 bucket_size)</div><div class='add'>+{</div><div class='add'>+	u32 val, config, tick, unit, rate, rate_frac;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (airoha_qdma_get_trtcm_param(qdma, channel, addr, TRTCM_MISC_MODE,</div><div class='add'>+					mode, &amp;config, NULL))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	val = airoha_qdma_rr(qdma, addr);</div><div class='add'>+	tick = FIELD_GET(INGRESS_FAST_TICK_MASK, val);</div><div class='add'>+	if (config &amp; TRTCM_TICK_SEL)</div><div class='add'>+		tick *= FIELD_GET(INGRESS_SLOW_TICK_RATIO_MASK, val);</div><div class='add'>+	if (!tick)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	unit = (config &amp; TRTCM_PKT_MODE) ? 1000000 / tick : 8000 / tick;</div><div class='add'>+	if (!unit)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	rate = rate_val / unit;</div><div class='add'>+	rate_frac = rate_val % unit;</div><div class='add'>+	rate_frac = FIELD_PREP(TRTCM_TOKEN_RATE_MASK, rate_frac) / unit;</div><div class='add'>+	rate = FIELD_PREP(TRTCM_TOKEN_RATE_MASK, rate) |</div><div class='add'>+	       FIELD_PREP(TRTCM_TOKEN_RATE_FRACTION_MASK, rate_frac);</div><div class='add'>+</div><div class='add'>+	err = airoha_qdma_set_trtcm_param(qdma, channel, addr,</div><div class='add'>+					  TRTCM_TOKEN_RATE_MODE, mode, rate);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	val = max_t(u32, bucket_size, MIN_TOKEN_SIZE);</div><div class='add'>+	val = min_t(u32, __fls(val), MAX_TOKEN_SIZE_OFFSET);</div><div class='add'>+</div><div class='add'>+	return airoha_qdma_set_trtcm_param(qdma, channel, addr,</div><div class='add'>+					   TRTCM_BUCKETSIZE_SHIFT_MODE,</div><div class='add'>+					   mode, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_set_tx_rate_limit(struct airoha_gdm_port *port,</div><div class='add'>+					 int channel, u32 rate,</div><div class='add'>+					 u32 bucket_size)</div><div class='add'>+{</div><div class='add'>+	int i, err;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt;= TRTCM_PEAK_MODE; i++) {</div><div class='add'>+		err = airoha_qdma_set_trtcm_config(port-&gt;qdma, channel,</div><div class='add'>+						   REG_EGRESS_TRTCM_CFG, i,</div><div class='add'>+						   !!rate, TRTCM_METER_MODE);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		err = airoha_qdma_set_trtcm_token_bucket(port-&gt;qdma, channel,</div><div class='add'>+							 REG_EGRESS_TRTCM_CFG,</div><div class='add'>+							 i, rate, bucket_size);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_tc_htb_alloc_leaf_queue(struct airoha_gdm_port *port,</div><div class='add'>+					  struct tc_htb_qopt_offload *opt)</div><div class='add'>+{</div><div class='add'>+	u32 channel = TC_H_MIN(opt-&gt;classid) % AIROHA_NUM_QOS_CHANNELS;</div><div class='add'>+	u32 rate = div_u64(opt-&gt;rate, 1000) &lt;&lt; 3; /* kbps */</div><div class='add'>+	struct net_device *dev = port-&gt;dev;</div><div class='add'>+	int num_tx_queues = dev-&gt;real_num_tx_queues;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (opt-&gt;parent_classid != TC_HTB_CLASSID_ROOT) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(opt-&gt;extack, "invalid parent classid");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = airoha_qdma_set_tx_rate_limit(port, channel, rate, opt-&gt;quantum);</div><div class='add'>+	if (err) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(opt-&gt;extack,</div><div class='add'>+				   "failed configuring htb offload");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (opt-&gt;command == TC_HTB_NODE_MODIFY)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	err = netif_set_real_num_tx_queues(dev, num_tx_queues + 1);</div><div class='add'>+	if (err) {</div><div class='add'>+		airoha_qdma_set_tx_rate_limit(port, channel, 0, opt-&gt;quantum);</div><div class='add'>+		NL_SET_ERR_MSG_MOD(opt-&gt;extack,</div><div class='add'>+				   "failed setting real_num_tx_queues");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	set_bit(channel, port-&gt;qos_sq_bmap);</div><div class='add'>+	opt-&gt;qid = AIROHA_NUM_TX_RING + channel;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_qdma_set_rx_meter(struct airoha_gdm_port *port,</div><div class='add'>+				    u32 rate, u32 bucket_size,</div><div class='add'>+				    enum trtcm_unit_type unit_type)</div><div class='add'>+{</div><div class='add'>+	struct airoha_qdma *qdma = port-&gt;qdma;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(qdma-&gt;q_rx); i++) {</div><div class='add'>+		int err;</div><div class='add'>+</div><div class='add'>+		if (!qdma-&gt;q_rx[i].ndesc)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		err = airoha_qdma_init_rl_config(qdma, i, !!rate, unit_type);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		err = airoha_qdma_set_rl_token_bucket(qdma, i, rate,</div><div class='add'>+						      bucket_size);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_tc_matchall_act_validate(struct tc_cls_matchall_offload *f)</div><div class='add'>+{</div><div class='add'>+	const struct flow_action *actions = &amp;f-&gt;rule-&gt;action;</div><div class='add'>+	const struct flow_action_entry *act;</div><div class='add'>+</div><div class='add'>+	if (!flow_action_has_entries(actions)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(f-&gt;common.extack,</div><div class='add'>+				   "filter run with no actions");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!flow_offload_has_one_action(actions)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(f-&gt;common.extack,</div><div class='add'>+				   "only once action per filter is supported");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	act = &amp;actions-&gt;entries[0];</div><div class='add'>+	if (act-&gt;id != FLOW_ACTION_POLICE) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(f-&gt;common.extack, "unsupported action");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (act-&gt;police.exceed.act_id != FLOW_ACTION_DROP) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(f-&gt;common.extack,</div><div class='add'>+				   "invalid exceed action id");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (act-&gt;police.notexceed.act_id != FLOW_ACTION_ACCEPT) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(f-&gt;common.extack,</div><div class='add'>+				   "invalid notexceed action id");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (act-&gt;police.notexceed.act_id == FLOW_ACTION_ACCEPT &amp;&amp;</div><div class='add'>+	    !flow_action_is_last_entry(actions, act)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(f-&gt;common.extack,</div><div class='add'>+				   "action accept must be last");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (act-&gt;police.peakrate_bytes_ps || act-&gt;police.avrate ||</div><div class='add'>+	    act-&gt;police.overhead || act-&gt;police.mtu) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(f-&gt;common.extack,</div><div class='add'>+				   "peakrate/avrate/overhead/mtu unsupported");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_dev_tc_matchall(struct net_device *dev,</div><div class='add'>+				  struct tc_cls_matchall_offload *f)</div><div class='add'>+{</div><div class='add'>+	enum trtcm_unit_type unit_type = TRTCM_BYTE_UNIT;</div><div class='add'>+	struct airoha_gdm_port *port = netdev_priv(dev);</div><div class='add'>+	u32 rate = 0, bucket_size = 0;</div><div class='add'>+</div><div class='add'>+	switch (f-&gt;command) {</div><div class='add'>+	case TC_CLSMATCHALL_REPLACE: {</div><div class='add'>+		const struct flow_action_entry *act;</div><div class='add'>+		int err;</div><div class='add'>+</div><div class='add'>+		err = airoha_tc_matchall_act_validate(f);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		act = &amp;f-&gt;rule-&gt;action.entries[0];</div><div class='add'>+		if (act-&gt;police.rate_pkt_ps) {</div><div class='add'>+			rate = act-&gt;police.rate_pkt_ps;</div><div class='add'>+			bucket_size = act-&gt;police.burst_pkt;</div><div class='add'>+			unit_type = TRTCM_PACKET_UNIT;</div><div class='add'>+		} else {</div><div class='add'>+			rate = div_u64(act-&gt;police.rate_bytes_ps, 1000);</div><div class='add'>+			rate = rate &lt;&lt; 3; /* Kbps */</div><div class='add'>+			bucket_size = act-&gt;police.burst;</div><div class='add'>+		}</div><div class='add'>+		fallthrough;</div><div class='add'>+	}</div><div class='add'>+	case TC_CLSMATCHALL_DESTROY:</div><div class='add'>+		return airoha_qdma_set_rx_meter(port, rate, bucket_size,</div><div class='add'>+						unit_type);</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_dev_setup_tc_block_cb(enum tc_setup_type type,</div><div class='add'>+					void *type_data, void *cb_priv)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = cb_priv;</div><div class='add'>+	struct airoha_gdm_port *port = netdev_priv(dev);</div><div class='add'>+	struct airoha_eth *eth = port-&gt;qdma-&gt;eth;</div><div class='add'>+</div><div class='add'>+	if (!tc_can_offload(dev))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	switch (type) {</div><div class='add'>+	case TC_SETUP_CLSFLOWER:</div><div class='add'>+		return airoha_ppe_setup_tc_block_cb(&amp;eth-&gt;ppe-&gt;dev, type_data);</div><div class='add'>+	case TC_SETUP_CLSMATCHALL:</div><div class='add'>+		return airoha_dev_tc_matchall(dev, type_data);</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_dev_setup_tc_block(struct airoha_gdm_port *port,</div><div class='add'>+				     struct flow_block_offload *f)</div><div class='add'>+{</div><div class='add'>+	flow_setup_cb_t *cb = airoha_dev_setup_tc_block_cb;</div><div class='add'>+	static LIST_HEAD(block_cb_list);</div><div class='add'>+	struct flow_block_cb *block_cb;</div><div class='add'>+</div><div class='add'>+	if (f-&gt;binder_type != FLOW_BLOCK_BINDER_TYPE_CLSACT_INGRESS)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	f-&gt;driver_block_list = &amp;block_cb_list;</div><div class='add'>+	switch (f-&gt;command) {</div><div class='add'>+	case FLOW_BLOCK_BIND:</div><div class='add'>+		block_cb = flow_block_cb_lookup(f-&gt;block, cb, port-&gt;dev);</div><div class='add'>+		if (block_cb) {</div><div class='add'>+			flow_block_cb_incref(block_cb);</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+		block_cb = flow_block_cb_alloc(cb, port-&gt;dev, port-&gt;dev, NULL);</div><div class='add'>+		if (IS_ERR(block_cb))</div><div class='add'>+			return PTR_ERR(block_cb);</div><div class='add'>+</div><div class='add'>+		flow_block_cb_incref(block_cb);</div><div class='add'>+		flow_block_cb_add(block_cb, f);</div><div class='add'>+		list_add_tail(&amp;block_cb-&gt;driver_list, &amp;block_cb_list);</div><div class='add'>+		return 0;</div><div class='add'>+	case FLOW_BLOCK_UNBIND:</div><div class='add'>+		block_cb = flow_block_cb_lookup(f-&gt;block, cb, port-&gt;dev);</div><div class='add'>+		if (!block_cb)</div><div class='add'>+			return -ENOENT;</div><div class='add'>+</div><div class='add'>+		if (!flow_block_cb_decref(block_cb)) {</div><div class='add'>+			flow_block_cb_remove(block_cb, f);</div><div class='add'>+			list_del(&amp;block_cb-&gt;driver_list);</div><div class='add'>+		}</div><div class='add'>+		return 0;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_tc_remove_htb_queue(struct airoha_gdm_port *port, int queue)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = port-&gt;dev;</div><div class='add'>+</div><div class='add'>+	netif_set_real_num_tx_queues(dev, dev-&gt;real_num_tx_queues - 1);</div><div class='add'>+	airoha_qdma_set_tx_rate_limit(port, queue + 1, 0, 0);</div><div class='add'>+	clear_bit(queue, port-&gt;qos_sq_bmap);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_tc_htb_delete_leaf_queue(struct airoha_gdm_port *port,</div><div class='add'>+					   struct tc_htb_qopt_offload *opt)</div><div class='add'>+{</div><div class='add'>+	u32 channel = TC_H_MIN(opt-&gt;classid) % AIROHA_NUM_QOS_CHANNELS;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(channel, port-&gt;qos_sq_bmap)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(opt-&gt;extack, "invalid queue id");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	airoha_tc_remove_htb_queue(port, channel);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_tc_htb_destroy(struct airoha_gdm_port *port)</div><div class='add'>+{</div><div class='add'>+	int q;</div><div class='add'>+</div><div class='add'>+	for_each_set_bit(q, port-&gt;qos_sq_bmap, AIROHA_NUM_QOS_CHANNELS)</div><div class='add'>+		airoha_tc_remove_htb_queue(port, q);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_tc_get_htb_get_leaf_queue(struct airoha_gdm_port *port,</div><div class='add'>+					    struct tc_htb_qopt_offload *opt)</div><div class='add'>+{</div><div class='add'>+	u32 channel = TC_H_MIN(opt-&gt;classid) % AIROHA_NUM_QOS_CHANNELS;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(channel, port-&gt;qos_sq_bmap)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(opt-&gt;extack, "invalid queue id");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	opt-&gt;qid = AIROHA_NUM_TX_RING + channel;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_tc_setup_qdisc_htb(struct airoha_gdm_port *port,</div><div class='add'>+				     struct tc_htb_qopt_offload *opt)</div><div class='add'>+{</div><div class='add'>+	switch (opt-&gt;command) {</div><div class='add'>+	case TC_HTB_CREATE:</div><div class='add'>+		break;</div><div class='add'>+	case TC_HTB_DESTROY:</div><div class='add'>+		return airoha_tc_htb_destroy(port);</div><div class='add'>+	case TC_HTB_NODE_MODIFY:</div><div class='add'>+	case TC_HTB_LEAF_ALLOC_QUEUE:</div><div class='add'>+		return airoha_tc_htb_alloc_leaf_queue(port, opt);</div><div class='add'>+	case TC_HTB_LEAF_DEL:</div><div class='add'>+	case TC_HTB_LEAF_DEL_LAST:</div><div class='add'>+	case TC_HTB_LEAF_DEL_LAST_FORCE:</div><div class='add'>+		return airoha_tc_htb_delete_leaf_queue(port, opt);</div><div class='add'>+	case TC_HTB_LEAF_QUERY_QUEUE:</div><div class='add'>+		return airoha_tc_get_htb_get_leaf_queue(port, opt);</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_dev_tc_setup(struct net_device *dev, enum tc_setup_type type,</div><div class='add'>+			       void *type_data)</div><div class='add'>+{</div><div class='add'>+	struct airoha_gdm_port *port = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	switch (type) {</div><div class='add'>+	case TC_SETUP_QDISC_ETS:</div><div class='add'>+		return airoha_tc_setup_qdisc_ets(port, type_data);</div><div class='add'>+	case TC_SETUP_QDISC_HTB:</div><div class='add'>+		return airoha_tc_setup_qdisc_htb(port, type_data);</div><div class='add'>+	case TC_SETUP_BLOCK:</div><div class='add'>+	case TC_SETUP_FT:</div><div class='add'>+		return airoha_dev_setup_tc_block(port, type_data);</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops airoha_netdev_ops = {</div><div class='add'>+	.ndo_init		= airoha_dev_init,</div><div class='add'>+	.ndo_open		= airoha_dev_open,</div><div class='add'>+	.ndo_stop		= airoha_dev_stop,</div><div class='add'>+	.ndo_change_mtu		= airoha_dev_change_mtu,</div><div class='add'>+	.ndo_select_queue	= airoha_dev_select_queue,</div><div class='add'>+	.ndo_start_xmit		= airoha_dev_xmit,</div><div class='add'>+	.ndo_get_stats64        = airoha_dev_get_stats64,</div><div class='add'>+	.ndo_set_mac_address	= airoha_dev_set_macaddr,</div><div class='add'>+	.ndo_setup_tc		= airoha_dev_tc_setup,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops airoha_ethtool_ops = {</div><div class='add'>+	.get_drvinfo		= airoha_ethtool_get_drvinfo,</div><div class='add'>+	.get_eth_mac_stats      = airoha_ethtool_get_mac_stats,</div><div class='add'>+	.get_rmon_stats		= airoha_ethtool_get_rmon_stats,</div><div class='add'>+	.get_link		= ethtool_op_get_link,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int airoha_metadata_dst_alloc(struct airoha_gdm_port *port)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(port-&gt;dsa_meta); i++) {</div><div class='add'>+		struct metadata_dst *md_dst;</div><div class='add'>+</div><div class='add'>+		md_dst = metadata_dst_alloc(0, METADATA_HW_PORT_MUX,</div><div class='add'>+					    GFP_KERNEL);</div><div class='add'>+		if (!md_dst)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		md_dst-&gt;u.port_info.port_id = i;</div><div class='add'>+		port-&gt;dsa_meta[i] = md_dst;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_metadata_dst_free(struct airoha_gdm_port *port)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(port-&gt;dsa_meta); i++) {</div><div class='add'>+		if (!port-&gt;dsa_meta[i])</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		metadata_dst_free(port-&gt;dsa_meta[i]);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool airoha_is_valid_gdm_port(struct airoha_eth *eth,</div><div class='add'>+			      struct airoha_gdm_port *port)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(eth-&gt;ports); i++) {</div><div class='add'>+		if (eth-&gt;ports[i] == port)</div><div class='add'>+			return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_alloc_gdm_port(struct airoha_eth *eth,</div><div class='add'>+				 struct device_node *np, int index)</div><div class='add'>+{</div><div class='add'>+	const __be32 *id_ptr = of_get_property(np, "reg", NULL);</div><div class='add'>+	struct airoha_gdm_port *port;</div><div class='add'>+	struct airoha_qdma *qdma;</div><div class='add'>+	struct net_device *dev;</div><div class='add'>+	int err, p;</div><div class='add'>+	u32 id;</div><div class='add'>+</div><div class='add'>+	if (!id_ptr) {</div><div class='add'>+		dev_err(eth-&gt;dev, "missing gdm port id\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	id = be32_to_cpup(id_ptr);</div><div class='add'>+	p = id - 1;</div><div class='add'>+</div><div class='add'>+	if (!id || id &gt; ARRAY_SIZE(eth-&gt;ports)) {</div><div class='add'>+		dev_err(eth-&gt;dev, "invalid gdm port id: %d\n", id);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (eth-&gt;ports[p]) {</div><div class='add'>+		dev_err(eth-&gt;dev, "duplicate gdm port id: %d\n", id);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev = devm_alloc_etherdev_mqs(eth-&gt;dev, sizeof(*port),</div><div class='add'>+				      AIROHA_NUM_NETDEV_TX_RINGS,</div><div class='add'>+				      AIROHA_NUM_RX_RING);</div><div class='add'>+	if (!dev) {</div><div class='add'>+		dev_err(eth-&gt;dev, "alloc_etherdev failed\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	qdma = &amp;eth-&gt;qdma[index % AIROHA_MAX_NUM_QDMA];</div><div class='add'>+	dev-&gt;netdev_ops = &amp;airoha_netdev_ops;</div><div class='add'>+	dev-&gt;ethtool_ops = &amp;airoha_ethtool_ops;</div><div class='add'>+	dev-&gt;max_mtu = AIROHA_MAX_MTU;</div><div class='add'>+	dev-&gt;watchdog_timeo = 5 * HZ;</div><div class='add'>+	dev-&gt;hw_features = NETIF_F_IP_CSUM | NETIF_F_RXCSUM |</div><div class='add'>+			   NETIF_F_TSO6 | NETIF_F_IPV6_CSUM |</div><div class='add'>+			   NETIF_F_SG | NETIF_F_TSO |</div><div class='add'>+			   NETIF_F_HW_TC;</div><div class='add'>+	dev-&gt;features |= dev-&gt;hw_features;</div><div class='add'>+	dev-&gt;vlan_features = dev-&gt;hw_features;</div><div class='add'>+	dev-&gt;dev.of_node = np;</div><div class='add'>+	dev-&gt;irq = qdma-&gt;irq_banks[0].irq;</div><div class='add'>+	SET_NETDEV_DEV(dev, eth-&gt;dev);</div><div class='add'>+</div><div class='add'>+	/* reserve hw queues for HTB offloading */</div><div class='add'>+	err = netif_set_real_num_tx_queues(dev, AIROHA_NUM_TX_RING);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = of_get_ethdev_address(np, dev);</div><div class='add'>+	if (err) {</div><div class='add'>+		if (err == -EPROBE_DEFER)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		eth_hw_addr_random(dev);</div><div class='add'>+		dev_info(eth-&gt;dev, "generated random MAC address %pM\n",</div><div class='add'>+			 dev-&gt;dev_addr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	port = netdev_priv(dev);</div><div class='add'>+	u64_stats_init(&amp;port-&gt;stats.syncp);</div><div class='add'>+	spin_lock_init(&amp;port-&gt;stats.lock);</div><div class='add'>+	port-&gt;qdma = qdma;</div><div class='add'>+	port-&gt;dev = dev;</div><div class='add'>+	port-&gt;id = id;</div><div class='add'>+	eth-&gt;ports[p] = port;</div><div class='add'>+</div><div class='add'>+	err = airoha_metadata_dst_alloc(port);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = register_netdev(dev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_metadata_dst;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+free_metadata_dst:</div><div class='add'>+	airoha_metadata_dst_free(port);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct reset_control_bulk_data *xsi_rsts;</div><div class='add'>+	struct device_node *np;</div><div class='add'>+	struct airoha_eth *eth;</div><div class='add'>+	int i, err;</div><div class='add'>+</div><div class='add'>+	eth = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*eth), GFP_KERNEL);</div><div class='add'>+	if (!eth)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	eth-&gt;soc = of_device_get_match_data(&amp;pdev-&gt;dev);</div><div class='add'>+	if (!eth-&gt;soc)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	eth-&gt;dev = &amp;pdev-&gt;dev;</div><div class='add'>+</div><div class='add'>+	err = dma_set_mask_and_coherent(eth-&gt;dev, DMA_BIT_MASK(32));</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(eth-&gt;dev, "failed configuring DMA mask\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	eth-&gt;fe_regs = devm_platform_ioremap_resource_byname(pdev, "fe");</div><div class='add'>+	if (IS_ERR(eth-&gt;fe_regs))</div><div class='add'>+		return dev_err_probe(eth-&gt;dev, PTR_ERR(eth-&gt;fe_regs),</div><div class='add'>+				     "failed to iomap fe regs\n");</div><div class='add'>+</div><div class='add'>+	eth-&gt;rsts[0].id = "fe";</div><div class='add'>+	eth-&gt;rsts[1].id = "pdma";</div><div class='add'>+	eth-&gt;rsts[2].id = "qdma";</div><div class='add'>+	err = devm_reset_control_bulk_get_exclusive(eth-&gt;dev,</div><div class='add'>+						    ARRAY_SIZE(eth-&gt;rsts),</div><div class='add'>+						    eth-&gt;rsts);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(eth-&gt;dev, "failed to get bulk reset lines\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	xsi_rsts = devm_kcalloc(eth-&gt;dev,</div><div class='add'>+				eth-&gt;soc-&gt;num_xsi_rsts, sizeof(*xsi_rsts),</div><div class='add'>+				GFP_KERNEL);</div><div class='add'>+	if (!xsi_rsts)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	eth-&gt;xsi_rsts = xsi_rsts;</div><div class='add'>+	for (i = 0; i &lt; eth-&gt;soc-&gt;num_xsi_rsts; i++)</div><div class='add'>+		eth-&gt;xsi_rsts[i].id = eth-&gt;soc-&gt;xsi_rsts_names[i];</div><div class='add'>+</div><div class='add'>+	err = devm_reset_control_bulk_get_exclusive(eth-&gt;dev,</div><div class='add'>+						    eth-&gt;soc-&gt;num_xsi_rsts,</div><div class='add'>+						    eth-&gt;xsi_rsts);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(eth-&gt;dev, "failed to get bulk xsi reset lines\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	eth-&gt;napi_dev = alloc_netdev_dummy(0);</div><div class='add'>+	if (!eth-&gt;napi_dev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* Enable threaded NAPI by default */</div><div class='add'>+	eth-&gt;napi_dev-&gt;threaded = true;</div><div class='add'>+	strscpy(eth-&gt;napi_dev-&gt;name, "qdma_eth", sizeof(eth-&gt;napi_dev-&gt;name));</div><div class='add'>+	platform_set_drvdata(pdev, eth);</div><div class='add'>+</div><div class='add'>+	err = airoha_hw_init(pdev, eth);</div><div class='add'>+	if (err)</div><div class='add'>+		goto error_hw_cleanup;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(eth-&gt;qdma); i++)</div><div class='add'>+		airoha_qdma_start_napi(&amp;eth-&gt;qdma[i]);</div><div class='add'>+</div><div class='add'>+	i = 0;</div><div class='add'>+	for_each_child_of_node(pdev-&gt;dev.of_node, np) {</div><div class='add'>+		if (!of_device_is_compatible(np, "airoha,eth-mac"))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (!of_device_is_available(np))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		err = airoha_alloc_gdm_port(eth, np, i++);</div><div class='add'>+		if (err) {</div><div class='add'>+			of_node_put(np);</div><div class='add'>+			goto error_napi_stop;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+error_napi_stop:</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(eth-&gt;qdma); i++)</div><div class='add'>+		airoha_qdma_stop_napi(&amp;eth-&gt;qdma[i]);</div><div class='add'>+	airoha_ppe_deinit(eth);</div><div class='add'>+error_hw_cleanup:</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(eth-&gt;qdma); i++)</div><div class='add'>+		airoha_hw_cleanup(&amp;eth-&gt;qdma[i]);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(eth-&gt;ports); i++) {</div><div class='add'>+		struct airoha_gdm_port *port = eth-&gt;ports[i];</div><div class='add'>+</div><div class='add'>+		if (port &amp;&amp; port-&gt;dev-&gt;reg_state == NETREG_REGISTERED) {</div><div class='add'>+			unregister_netdev(port-&gt;dev);</div><div class='add'>+			airoha_metadata_dst_free(port);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	free_netdev(eth-&gt;napi_dev);</div><div class='add'>+	platform_set_drvdata(pdev, NULL);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct airoha_eth *eth = platform_get_drvdata(pdev);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(eth-&gt;qdma); i++) {</div><div class='add'>+		airoha_qdma_stop_napi(&amp;eth-&gt;qdma[i]);</div><div class='add'>+		airoha_hw_cleanup(&amp;eth-&gt;qdma[i]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(eth-&gt;ports); i++) {</div><div class='add'>+		struct airoha_gdm_port *port = eth-&gt;ports[i];</div><div class='add'>+</div><div class='add'>+		if (!port)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		airoha_dev_stop(port-&gt;dev);</div><div class='add'>+		unregister_netdev(port-&gt;dev);</div><div class='add'>+		airoha_metadata_dst_free(port);</div><div class='add'>+	}</div><div class='add'>+	free_netdev(eth-&gt;napi_dev);</div><div class='add'>+</div><div class='add'>+	airoha_ppe_deinit(eth);</div><div class='add'>+	platform_set_drvdata(pdev, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char * const en7581_xsi_rsts_names[] = {</div><div class='add'>+	"xsi-mac",</div><div class='add'>+	"hsi0-mac",</div><div class='add'>+	"hsi1-mac",</div><div class='add'>+	"hsi-mac",</div><div class='add'>+	"xfp-mac",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int airoha_en7581_get_src_port_id(struct airoha_gdm_port *port, int nbq)</div><div class='add'>+{</div><div class='add'>+	switch (port-&gt;id) {</div><div class='add'>+	case 3:</div><div class='add'>+		/* 7581 SoC supports PCIe serdes on GDM3 port */</div><div class='add'>+		if (nbq == 4)</div><div class='add'>+			return HSGMII_LAN_7581_PCIE0_SRCPORT;</div><div class='add'>+		if (nbq == 5)</div><div class='add'>+			return HSGMII_LAN_7581_PCIE1_SRCPORT;</div><div class='add'>+		break;</div><div class='add'>+	case 4:</div><div class='add'>+		/* 7581 SoC supports eth and usb serdes on GDM4 port */</div><div class='add'>+		if (!nbq)</div><div class='add'>+			return HSGMII_LAN_7581_ETH_SRCPORT;</div><div class='add'>+		if (nbq == 1)</div><div class='add'>+			return HSGMII_LAN_7581_USB_SRCPORT;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char * const an7583_xsi_rsts_names[] = {</div><div class='add'>+	"xsi-mac",</div><div class='add'>+	"hsi0-mac",</div><div class='add'>+	"hsi1-mac",</div><div class='add'>+	"xfp-mac",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int airoha_an7583_get_src_port_id(struct airoha_gdm_port *port, int nbq)</div><div class='add'>+{</div><div class='add'>+	switch (port-&gt;id) {</div><div class='add'>+	case 3:</div><div class='add'>+		/* 7583 SoC supports eth serdes on GDM3 port */</div><div class='add'>+		if (!nbq)</div><div class='add'>+			return HSGMII_LAN_7583_ETH_SRCPORT;</div><div class='add'>+		break;</div><div class='add'>+	case 4:</div><div class='add'>+		/* 7583 SoC supports PCIe and USB serdes on GDM4 port */</div><div class='add'>+		if (!nbq)</div><div class='add'>+			return HSGMII_LAN_7583_PCIE_SRCPORT;</div><div class='add'>+		if (nbq == 1)</div><div class='add'>+			return HSGMII_LAN_7583_USB_SRCPORT;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct airoha_eth_soc_data en7581_soc_data = {</div><div class='add'>+	.version = 0x7581,</div><div class='add'>+	.xsi_rsts_names = en7581_xsi_rsts_names,</div><div class='add'>+	.num_xsi_rsts = ARRAY_SIZE(en7581_xsi_rsts_names),</div><div class='add'>+	.num_ppe = 2,</div><div class='add'>+	.ops = {</div><div class='add'>+		.get_src_port_id = airoha_en7581_get_src_port_id,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct airoha_eth_soc_data an7583_soc_data = {</div><div class='add'>+	.version = 0x7583,</div><div class='add'>+	.xsi_rsts_names = an7583_xsi_rsts_names,</div><div class='add'>+	.num_xsi_rsts = ARRAY_SIZE(an7583_xsi_rsts_names),</div><div class='add'>+	.num_ppe = 1,</div><div class='add'>+	.ops = {</div><div class='add'>+		.get_src_port_id = airoha_an7583_get_src_port_id,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct of_device_id of_airoha_match[] = {</div><div class='add'>+	{ .compatible = "airoha,en7581-eth", .data = &amp;en7581_soc_data },</div><div class='add'>+	{ .compatible = "airoha,an7583-eth", .data = &amp;an7583_soc_data },</div><div class='add'>+	{ /* sentinel */ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, of_airoha_match);</div><div class='add'>+</div><div class='add'>+static struct platform_driver airoha_driver = {</div><div class='add'>+	.probe = airoha_probe,</div><div class='add'>+	.remove = airoha_remove,</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = KBUILD_MODNAME,</div><div class='add'>+		.of_match_table = of_airoha_match,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+module_platform_driver(airoha_driver);</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_AUTHOR("Lorenzo Bianconi &lt;lorenzo@kernel.org&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Ethernet driver for Airoha SoC");</div><div class='head'>diff --git a/drivers/net/ethernet/airoha/airoha_eth.h b/drivers/net/ethernet/airoha/airoha_eth.h<br/>new file mode 100644<br/>index 000000000000..fbbc58133364<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/airoha/airoha_eth.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/airoha/airoha_eth.h</a></div><div class='hunk'>@@ -0,0 +1,673 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 AIROHA Inc</div><div class='add'>+ * Author: Lorenzo Bianconi &lt;lorenzo@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef AIROHA_ETH_H</div><div class='add'>+#define AIROHA_ETH_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/debugfs.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/iopoll.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/reset.h&gt;</div><div class='add'>+#include &lt;linux/soc/airoha/airoha_offload.h&gt;</div><div class='add'>+#include &lt;net/dsa.h&gt;</div><div class='add'>+</div><div class='add'>+#define AIROHA_MAX_NUM_GDM_PORTS	4</div><div class='add'>+#define AIROHA_MAX_NUM_QDMA		2</div><div class='add'>+#define AIROHA_MAX_NUM_IRQ_BANKS	4</div><div class='add'>+#define AIROHA_MAX_DSA_PORTS		7</div><div class='add'>+#define AIROHA_MAX_NUM_RSTS		3</div><div class='add'>+#define AIROHA_MAX_MTU			9216</div><div class='add'>+#define AIROHA_MAX_PACKET_SIZE		2048</div><div class='add'>+#define AIROHA_NUM_QOS_CHANNELS		4</div><div class='add'>+#define AIROHA_NUM_QOS_QUEUES		8</div><div class='add'>+#define AIROHA_NUM_TX_RING		32</div><div class='add'>+#define AIROHA_NUM_RX_RING		32</div><div class='add'>+#define AIROHA_NUM_NETDEV_TX_RINGS	(AIROHA_NUM_TX_RING + \</div><div class='add'>+					 AIROHA_NUM_QOS_CHANNELS)</div><div class='add'>+#define AIROHA_FE_MC_MAX_VLAN_TABLE	64</div><div class='add'>+#define AIROHA_FE_MC_MAX_VLAN_PORT	16</div><div class='add'>+#define AIROHA_NUM_TX_IRQ		2</div><div class='add'>+#define HW_DSCP_NUM			2048</div><div class='add'>+#define IRQ_QUEUE_LEN(_n)		((_n) ? 1024 : 2048)</div><div class='add'>+#define TX_DSCP_NUM			1024</div><div class='add'>+#define RX_DSCP_NUM(_n)			\</div><div class='add'>+	((_n) ==  2 ? 128 :		\</div><div class='add'>+	 (_n) == 11 ? 128 :		\</div><div class='add'>+	 (_n) == 15 ? 128 :		\</div><div class='add'>+	 (_n) ==  0 ? 1024 : 16)</div><div class='add'>+</div><div class='add'>+#define PSE_RSV_PAGES			128</div><div class='add'>+#define PSE_QUEUE_RSV_PAGES		64</div><div class='add'>+</div><div class='add'>+#define QDMA_METER_IDX(_n)		((_n) &amp; 0xff)</div><div class='add'>+#define QDMA_METER_GROUP(_n)		(((_n) &gt;&gt; 8) &amp; 0x3)</div><div class='add'>+</div><div class='add'>+#define PPE_SRAM_NUM_ENTRIES		(8 * 1024)</div><div class='add'>+#define PPE_STATS_NUM_ENTRIES		(4 * 1024)</div><div class='add'>+#define PPE_DRAM_NUM_ENTRIES		(16 * 1024)</div><div class='add'>+#define PPE_ENTRY_SIZE			80</div><div class='add'>+#define PPE_RAM_NUM_ENTRIES_SHIFT(_n)	(__ffs((_n) &gt;&gt; 10))</div><div class='add'>+</div><div class='add'>+#define MTK_HDR_LEN			4</div><div class='add'>+#define MTK_HDR_XMIT_TAGGED_TPID_8100	1</div><div class='add'>+#define MTK_HDR_XMIT_TAGGED_TPID_88A8	2</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	QDMA_INT_REG_IDX0,</div><div class='add'>+	QDMA_INT_REG_IDX1,</div><div class='add'>+	QDMA_INT_REG_IDX2,</div><div class='add'>+	QDMA_INT_REG_IDX3,</div><div class='add'>+	QDMA_INT_REG_IDX4,</div><div class='add'>+	QDMA_INT_REG_MAX</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	HSGMII_LAN_7581_PCIE0_SRCPORT	= 0x16,</div><div class='add'>+	HSGMII_LAN_7581_PCIE1_SRCPORT,</div><div class='add'>+	HSGMII_LAN_7581_ETH_SRCPORT,</div><div class='add'>+	HSGMII_LAN_7581_USB_SRCPORT,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	HSGMII_LAN_7583_ETH_SRCPORT	= 0x16,</div><div class='add'>+	HSGMII_LAN_7583_PCIE_SRCPORT	= 0x18,</div><div class='add'>+	HSGMII_LAN_7583_USB_SRCPORT,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	XSI_PCIE0_VIP_PORT_MASK	= BIT(22),</div><div class='add'>+	XSI_PCIE1_VIP_PORT_MASK	= BIT(23),</div><div class='add'>+	XSI_USB_VIP_PORT_MASK	= BIT(25),</div><div class='add'>+	XSI_ETH_VIP_PORT_MASK	= BIT(24),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	DEV_STATE_INITIALIZED,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	CDM_CRSN_QSEL_Q1 = 1,</div><div class='add'>+	CDM_CRSN_QSEL_Q5 = 5,</div><div class='add'>+	CDM_CRSN_QSEL_Q6 = 6,</div><div class='add'>+	CDM_CRSN_QSEL_Q15 = 15,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	CRSN_08 = 0x8,</div><div class='add'>+	CRSN_21 = 0x15, /* KA */</div><div class='add'>+	CRSN_22 = 0x16, /* hit bind and force route to CPU */</div><div class='add'>+	CRSN_24 = 0x18,</div><div class='add'>+	CRSN_25 = 0x19,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum airoha_gdm_index {</div><div class='add'>+	AIROHA_GDM1_IDX = 1,</div><div class='add'>+	AIROHA_GDM2_IDX = 2,</div><div class='add'>+	AIROHA_GDM3_IDX = 3,</div><div class='add'>+	AIROHA_GDM4_IDX = 4,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	FE_PSE_PORT_CDM1,</div><div class='add'>+	FE_PSE_PORT_GDM1,</div><div class='add'>+	FE_PSE_PORT_GDM2,</div><div class='add'>+	FE_PSE_PORT_GDM3,</div><div class='add'>+	FE_PSE_PORT_PPE1,</div><div class='add'>+	FE_PSE_PORT_CDM2,</div><div class='add'>+	FE_PSE_PORT_CDM3,</div><div class='add'>+	FE_PSE_PORT_CDM4,</div><div class='add'>+	FE_PSE_PORT_PPE2,</div><div class='add'>+	FE_PSE_PORT_GDM4,</div><div class='add'>+	FE_PSE_PORT_CDM5,</div><div class='add'>+	FE_PSE_PORT_DROP = 0xf,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum tx_sched_mode {</div><div class='add'>+	TC_SCH_WRR8,</div><div class='add'>+	TC_SCH_SP,</div><div class='add'>+	TC_SCH_WRR7,</div><div class='add'>+	TC_SCH_WRR6,</div><div class='add'>+	TC_SCH_WRR5,</div><div class='add'>+	TC_SCH_WRR4,</div><div class='add'>+	TC_SCH_WRR3,</div><div class='add'>+	TC_SCH_WRR2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum trtcm_unit_type {</div><div class='add'>+	TRTCM_BYTE_UNIT,</div><div class='add'>+	TRTCM_PACKET_UNIT,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum trtcm_param_type {</div><div class='add'>+	TRTCM_MISC_MODE, /* meter_en, pps_mode, tick_sel */</div><div class='add'>+	TRTCM_TOKEN_RATE_MODE,</div><div class='add'>+	TRTCM_BUCKETSIZE_SHIFT_MODE,</div><div class='add'>+	TRTCM_BUCKET_COUNTER_MODE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum trtcm_mode_type {</div><div class='add'>+	TRTCM_COMMIT_MODE,</div><div class='add'>+	TRTCM_PEAK_MODE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum trtcm_param {</div><div class='add'>+	TRTCM_TICK_SEL = BIT(0),</div><div class='add'>+	TRTCM_PKT_MODE = BIT(1),</div><div class='add'>+	TRTCM_METER_MODE = BIT(2),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define MIN_TOKEN_SIZE				4096</div><div class='add'>+#define MAX_TOKEN_SIZE_OFFSET			17</div><div class='add'>+#define TRTCM_TOKEN_RATE_MASK			GENMASK(23, 6)</div><div class='add'>+#define TRTCM_TOKEN_RATE_FRACTION_MASK		GENMASK(5, 0)</div><div class='add'>+</div><div class='add'>+struct airoha_queue_entry {</div><div class='add'>+	union {</div><div class='add'>+		void *buf;</div><div class='add'>+		struct {</div><div class='add'>+			struct list_head list;</div><div class='add'>+			struct sk_buff *skb;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	dma_addr_t dma_addr;</div><div class='add'>+	u16 dma_len;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_queue {</div><div class='add'>+	struct airoha_qdma *qdma;</div><div class='add'>+</div><div class='add'>+	/* protect concurrent queue accesses */</div><div class='add'>+	spinlock_t lock;</div><div class='add'>+	struct airoha_queue_entry *entry;</div><div class='add'>+	struct airoha_qdma_desc *desc;</div><div class='add'>+	u16 head;</div><div class='add'>+	u16 tail;</div><div class='add'>+</div><div class='add'>+	int queued;</div><div class='add'>+	int ndesc;</div><div class='add'>+	int free_thr;</div><div class='add'>+	int buf_size;</div><div class='add'>+</div><div class='add'>+	struct napi_struct napi;</div><div class='add'>+	struct page_pool *page_pool;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	struct list_head tx_list;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_tx_irq_queue {</div><div class='add'>+	struct airoha_qdma *qdma;</div><div class='add'>+</div><div class='add'>+	struct napi_struct napi;</div><div class='add'>+</div><div class='add'>+	int size;</div><div class='add'>+	u32 *q;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_hw_stats {</div><div class='add'>+	/* protect concurrent hw_stats accesses */</div><div class='add'>+	spinlock_t lock;</div><div class='add'>+	struct u64_stats_sync syncp;</div><div class='add'>+</div><div class='add'>+	/* get_stats64 */</div><div class='add'>+	u64 rx_ok_pkts;</div><div class='add'>+	u64 tx_ok_pkts;</div><div class='add'>+	u64 rx_ok_bytes;</div><div class='add'>+	u64 tx_ok_bytes;</div><div class='add'>+	u64 rx_multicast;</div><div class='add'>+	u64 rx_errors;</div><div class='add'>+	u64 rx_drops;</div><div class='add'>+	u64 tx_drops;</div><div class='add'>+	u64 rx_crc_error;</div><div class='add'>+	u64 rx_over_errors;</div><div class='add'>+	/* ethtool stats */</div><div class='add'>+	u64 tx_broadcast;</div><div class='add'>+	u64 tx_multicast;</div><div class='add'>+	u64 tx_len[7];</div><div class='add'>+	u64 rx_broadcast;</div><div class='add'>+	u64 rx_fragment;</div><div class='add'>+	u64 rx_jabber;</div><div class='add'>+	u64 rx_len[7];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	AIROHA_FOE_STATE_INVALID,</div><div class='add'>+	AIROHA_FOE_STATE_UNBIND,</div><div class='add'>+	AIROHA_FOE_STATE_BIND,</div><div class='add'>+	AIROHA_FOE_STATE_FIN</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	PPE_PKT_TYPE_IPV4_HNAPT = 0,</div><div class='add'>+	PPE_PKT_TYPE_IPV4_ROUTE = 1,</div><div class='add'>+	PPE_PKT_TYPE_BRIDGE = 2,</div><div class='add'>+	PPE_PKT_TYPE_IPV4_DSLITE = 3,</div><div class='add'>+	PPE_PKT_TYPE_IPV6_ROUTE_3T = 4,</div><div class='add'>+	PPE_PKT_TYPE_IPV6_ROUTE_5T = 5,</div><div class='add'>+	PPE_PKT_TYPE_IPV6_6RD = 7,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define AIROHA_FOE_MAC_SMAC_ID		GENMASK(20, 16)</div><div class='add'>+#define AIROHA_FOE_MAC_PPPOE_ID		GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define AIROHA_FOE_MAC_WDMA_QOS		GENMASK(15, 12)</div><div class='add'>+#define AIROHA_FOE_MAC_WDMA_BAND	BIT(11)</div><div class='add'>+#define AIROHA_FOE_MAC_WDMA_WCID	GENMASK(10, 0)</div><div class='add'>+</div><div class='add'>+struct airoha_foe_mac_info_common {</div><div class='add'>+	u16 vlan1;</div><div class='add'>+	u16 etype;</div><div class='add'>+</div><div class='add'>+	u32 dest_mac_hi;</div><div class='add'>+</div><div class='add'>+	u16 vlan2;</div><div class='add'>+	u16 dest_mac_lo;</div><div class='add'>+</div><div class='add'>+	u32 src_mac_hi;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_foe_mac_info {</div><div class='add'>+	struct airoha_foe_mac_info_common common;</div><div class='add'>+</div><div class='add'>+	u16 pppoe_id;</div><div class='add'>+	u16 src_mac_lo;</div><div class='add'>+</div><div class='add'>+	u32 meter;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define AIROHA_FOE_IB1_UNBIND_PREBIND		BIT(24)</div><div class='add'>+#define AIROHA_FOE_IB1_UNBIND_PACKETS		GENMASK(23, 8)</div><div class='add'>+#define AIROHA_FOE_IB1_UNBIND_TIMESTAMP		GENMASK(7, 0)</div><div class='add'>+</div><div class='add'>+#define AIROHA_FOE_IB1_BIND_STATIC		BIT(31)</div><div class='add'>+#define AIROHA_FOE_IB1_BIND_UDP			BIT(30)</div><div class='add'>+#define AIROHA_FOE_IB1_BIND_STATE		GENMASK(29, 28)</div><div class='add'>+#define AIROHA_FOE_IB1_BIND_PACKET_TYPE		GENMASK(27, 25)</div><div class='add'>+#define AIROHA_FOE_IB1_BIND_TTL			BIT(24)</div><div class='add'>+#define AIROHA_FOE_IB1_BIND_TUNNEL_DECAP	BIT(23)</div><div class='add'>+#define AIROHA_FOE_IB1_BIND_PPPOE		BIT(22)</div><div class='add'>+#define AIROHA_FOE_IB1_BIND_VPM			GENMASK(21, 20)</div><div class='add'>+#define AIROHA_FOE_IB1_BIND_VLAN_LAYER		GENMASK(19, 16)</div><div class='add'>+#define AIROHA_FOE_IB1_BIND_KEEPALIVE		BIT(15)</div><div class='add'>+#define AIROHA_FOE_IB1_BIND_TIMESTAMP		GENMASK(14, 0)</div><div class='add'>+</div><div class='add'>+#define AIROHA_FOE_IB2_DSCP			GENMASK(31, 24)</div><div class='add'>+#define AIROHA_FOE_IB2_PORT_AG			GENMASK(23, 13)</div><div class='add'>+#define AIROHA_FOE_IB2_PCP			BIT(12)</div><div class='add'>+#define AIROHA_FOE_IB2_MULTICAST		BIT(11)</div><div class='add'>+#define AIROHA_FOE_IB2_FAST_PATH		BIT(10)</div><div class='add'>+#define AIROHA_FOE_IB2_PSE_QOS			BIT(9)</div><div class='add'>+#define AIROHA_FOE_IB2_PSE_PORT			GENMASK(8, 5)</div><div class='add'>+#define AIROHA_FOE_IB2_NBQ			GENMASK(4, 0)</div><div class='add'>+</div><div class='add'>+#define AIROHA_FOE_ACTDP			GENMASK(31, 24)</div><div class='add'>+#define AIROHA_FOE_SHAPER_ID			GENMASK(23, 16)</div><div class='add'>+#define AIROHA_FOE_CHANNEL			GENMASK(15, 11)</div><div class='add'>+#define AIROHA_FOE_QID				GENMASK(10, 8)</div><div class='add'>+#define AIROHA_FOE_DPI				BIT(7)</div><div class='add'>+#define AIROHA_FOE_TUNNEL			BIT(6)</div><div class='add'>+#define AIROHA_FOE_TUNNEL_ID			GENMASK(5, 0)</div><div class='add'>+</div><div class='add'>+#define AIROHA_FOE_TUNNEL_MTU			GENMASK(31, 16)</div><div class='add'>+#define AIROHA_FOE_ACNT_GRP3			GENMASK(15, 9)</div><div class='add'>+#define AIROHA_FOE_METER_GRP3			GENMASK(8, 5)</div><div class='add'>+#define AIROHA_FOE_METER_GRP2			GENMASK(4, 0)</div><div class='add'>+</div><div class='add'>+struct airoha_foe_bridge {</div><div class='add'>+	u32 dest_mac_hi;</div><div class='add'>+</div><div class='add'>+	u16 src_mac_hi;</div><div class='add'>+	u16 dest_mac_lo;</div><div class='add'>+</div><div class='add'>+	u32 src_mac_lo;</div><div class='add'>+</div><div class='add'>+	u32 ib2;</div><div class='add'>+</div><div class='add'>+	u32 rsv[5];</div><div class='add'>+</div><div class='add'>+	u32 data;</div><div class='add'>+</div><div class='add'>+	struct airoha_foe_mac_info l2;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_foe_ipv4_tuple {</div><div class='add'>+	u32 src_ip;</div><div class='add'>+	u32 dest_ip;</div><div class='add'>+	union {</div><div class='add'>+		struct {</div><div class='add'>+			u16 dest_port;</div><div class='add'>+			u16 src_port;</div><div class='add'>+		};</div><div class='add'>+		struct {</div><div class='add'>+			u8 protocol;</div><div class='add'>+			u8 _pad[3]; /* fill with 0xa5a5a5 */</div><div class='add'>+		};</div><div class='add'>+		u32 ports;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_foe_ipv4 {</div><div class='add'>+	struct airoha_foe_ipv4_tuple orig_tuple;</div><div class='add'>+</div><div class='add'>+	u32 ib2;</div><div class='add'>+</div><div class='add'>+	struct airoha_foe_ipv4_tuple new_tuple;</div><div class='add'>+</div><div class='add'>+	u32 rsv[2];</div><div class='add'>+</div><div class='add'>+	u32 data;</div><div class='add'>+</div><div class='add'>+	struct airoha_foe_mac_info l2;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_foe_ipv4_dslite {</div><div class='add'>+	struct airoha_foe_ipv4_tuple ip4;</div><div class='add'>+</div><div class='add'>+	u32 ib2;</div><div class='add'>+</div><div class='add'>+	u8 flow_label[3];</div><div class='add'>+	u8 priority;</div><div class='add'>+</div><div class='add'>+	u32 rsv[4];</div><div class='add'>+</div><div class='add'>+	u32 data;</div><div class='add'>+</div><div class='add'>+	struct airoha_foe_mac_info l2;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_foe_ipv6 {</div><div class='add'>+	u32 src_ip[4];</div><div class='add'>+	u32 dest_ip[4];</div><div class='add'>+</div><div class='add'>+	union {</div><div class='add'>+		struct {</div><div class='add'>+			u16 dest_port;</div><div class='add'>+			u16 src_port;</div><div class='add'>+		};</div><div class='add'>+		struct {</div><div class='add'>+			u8 protocol;</div><div class='add'>+			u8 pad[3];</div><div class='add'>+		};</div><div class='add'>+		u32 ports;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	u32 data;</div><div class='add'>+</div><div class='add'>+	u32 ib2;</div><div class='add'>+</div><div class='add'>+	struct airoha_foe_mac_info_common l2;</div><div class='add'>+</div><div class='add'>+	u32 meter;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_foe_entry {</div><div class='add'>+	union {</div><div class='add'>+		struct {</div><div class='add'>+			u32 ib1;</div><div class='add'>+			union {</div><div class='add'>+				struct airoha_foe_bridge bridge;</div><div class='add'>+				struct airoha_foe_ipv4 ipv4;</div><div class='add'>+				struct airoha_foe_ipv4_dslite dslite;</div><div class='add'>+				struct airoha_foe_ipv6 ipv6;</div><div class='add'>+				DECLARE_FLEX_ARRAY(u32, d);</div><div class='add'>+			};</div><div class='add'>+		};</div><div class='add'>+		u8 data[PPE_ENTRY_SIZE];</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_foe_stats {</div><div class='add'>+	u32 bytes;</div><div class='add'>+	u32 packets;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_foe_stats64 {</div><div class='add'>+	u64 bytes;</div><div class='add'>+	u64 packets;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_flow_data {</div><div class='add'>+	struct ethhdr eth;</div><div class='add'>+</div><div class='add'>+	union {</div><div class='add'>+		struct {</div><div class='add'>+			__be32 src_addr;</div><div class='add'>+			__be32 dst_addr;</div><div class='add'>+		} v4;</div><div class='add'>+</div><div class='add'>+		struct {</div><div class='add'>+			struct in6_addr src_addr;</div><div class='add'>+			struct in6_addr dst_addr;</div><div class='add'>+		} v6;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	__be16 src_port;</div><div class='add'>+	__be16 dst_port;</div><div class='add'>+</div><div class='add'>+	struct {</div><div class='add'>+		struct {</div><div class='add'>+			u16 id;</div><div class='add'>+			__be16 proto;</div><div class='add'>+		} hdr[2];</div><div class='add'>+		u8 num;</div><div class='add'>+	} vlan;</div><div class='add'>+	struct {</div><div class='add'>+		u16 sid;</div><div class='add'>+		u8 num;</div><div class='add'>+	} pppoe;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum airoha_flow_entry_type {</div><div class='add'>+	FLOW_TYPE_L4,</div><div class='add'>+	FLOW_TYPE_L2,</div><div class='add'>+	FLOW_TYPE_L2_SUBFLOW,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_flow_table_entry {</div><div class='add'>+	union {</div><div class='add'>+		struct hlist_node list; /* PPE L3 flow entry */</div><div class='add'>+		struct {</div><div class='add'>+			struct rhash_head l2_node;  /* L2 flow entry */</div><div class='add'>+			struct hlist_head l2_flows; /* PPE L2 subflows list */</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	struct hlist_node l2_subflow_node; /* PPE L2 subflow entry */</div><div class='add'>+	u32 hash;</div><div class='add'>+</div><div class='add'>+	struct airoha_foe_stats64 stats;</div><div class='add'>+	enum airoha_flow_entry_type type;</div><div class='add'>+</div><div class='add'>+	struct rhash_head node;</div><div class='add'>+	unsigned long cookie;</div><div class='add'>+</div><div class='add'>+	/* Must be last --ends in a flexible-array member. */</div><div class='add'>+	struct airoha_foe_entry data;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_wdma_info {</div><div class='add'>+	u8 idx;</div><div class='add'>+	u8 queue;</div><div class='add'>+	u16 wcid;</div><div class='add'>+	u8 bss;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* RX queue to IRQ mapping: BIT(q) in IRQ(n) */</div><div class='add'>+#define RX_IRQ0_BANK_PIN_MASK			0x839f</div><div class='add'>+#define RX_IRQ1_BANK_PIN_MASK			0x7fe00000</div><div class='add'>+#define RX_IRQ2_BANK_PIN_MASK			0x20</div><div class='add'>+#define RX_IRQ3_BANK_PIN_MASK			0x40</div><div class='add'>+#define RX_IRQ_BANK_PIN_MASK(_n)		\</div><div class='add'>+	(((_n) == 3) ? RX_IRQ3_BANK_PIN_MASK :	\</div><div class='add'>+	 ((_n) == 2) ? RX_IRQ2_BANK_PIN_MASK :	\</div><div class='add'>+	 ((_n) == 1) ? RX_IRQ1_BANK_PIN_MASK :	\</div><div class='add'>+	 RX_IRQ0_BANK_PIN_MASK)</div><div class='add'>+</div><div class='add'>+struct airoha_irq_bank {</div><div class='add'>+	struct airoha_qdma *qdma;</div><div class='add'>+</div><div class='add'>+	/* protect concurrent irqmask accesses */</div><div class='add'>+	spinlock_t irq_lock;</div><div class='add'>+	u32 irqmask[QDMA_INT_REG_MAX];</div><div class='add'>+	int irq;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_qdma {</div><div class='add'>+	struct airoha_eth *eth;</div><div class='add'>+	void __iomem *regs;</div><div class='add'>+</div><div class='add'>+	atomic_t users;</div><div class='add'>+</div><div class='add'>+	struct airoha_irq_bank irq_banks[AIROHA_MAX_NUM_IRQ_BANKS];</div><div class='add'>+</div><div class='add'>+	struct airoha_tx_irq_queue q_tx_irq[AIROHA_NUM_TX_IRQ];</div><div class='add'>+</div><div class='add'>+	struct airoha_queue q_tx[AIROHA_NUM_TX_RING];</div><div class='add'>+	struct airoha_queue q_rx[AIROHA_NUM_RX_RING];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_gdm_port {</div><div class='add'>+	struct airoha_qdma *qdma;</div><div class='add'>+	struct net_device *dev;</div><div class='add'>+	int id;</div><div class='add'>+</div><div class='add'>+	struct airoha_hw_stats stats;</div><div class='add'>+</div><div class='add'>+	DECLARE_BITMAP(qos_sq_bmap, AIROHA_NUM_QOS_CHANNELS);</div><div class='add'>+</div><div class='add'>+	/* qos stats counters */</div><div class='add'>+	u64 cpu_tx_packets;</div><div class='add'>+	u64 fwd_tx_packets;</div><div class='add'>+</div><div class='add'>+	struct metadata_dst *dsa_meta[AIROHA_MAX_DSA_PORTS];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define AIROHA_RXD4_PPE_CPU_REASON	GENMASK(20, 16)</div><div class='add'>+#define AIROHA_RXD4_FOE_ENTRY		GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+struct airoha_ppe {</div><div class='add'>+	struct airoha_ppe_dev dev;</div><div class='add'>+	struct airoha_eth *eth;</div><div class='add'>+</div><div class='add'>+	void *foe;</div><div class='add'>+	dma_addr_t foe_dma;</div><div class='add'>+</div><div class='add'>+	struct rhashtable l2_flows;</div><div class='add'>+</div><div class='add'>+	struct hlist_head *foe_flow;</div><div class='add'>+	u16 *foe_check_time;</div><div class='add'>+</div><div class='add'>+	struct airoha_foe_stats *foe_stats;</div><div class='add'>+	dma_addr_t foe_stats_dma;</div><div class='add'>+</div><div class='add'>+	struct dentry *debugfs_dir;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_eth_soc_data {</div><div class='add'>+	u16 version;</div><div class='add'>+	const char * const *xsi_rsts_names;</div><div class='add'>+	int num_xsi_rsts;</div><div class='add'>+	int num_ppe;</div><div class='add'>+	struct {</div><div class='add'>+		int (*get_src_port_id)(struct airoha_gdm_port *port, int nbq);</div><div class='add'>+	} ops;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_eth {</div><div class='add'>+	struct device *dev;</div><div class='add'>+</div><div class='add'>+	const struct airoha_eth_soc_data *soc;</div><div class='add'>+</div><div class='add'>+	unsigned long state;</div><div class='add'>+	void __iomem *fe_regs;</div><div class='add'>+</div><div class='add'>+	struct airoha_npu __rcu *npu;</div><div class='add'>+</div><div class='add'>+	struct airoha_ppe *ppe;</div><div class='add'>+	struct rhashtable flow_table;</div><div class='add'>+</div><div class='add'>+	struct reset_control_bulk_data rsts[AIROHA_MAX_NUM_RSTS];</div><div class='add'>+	struct reset_control_bulk_data *xsi_rsts;</div><div class='add'>+</div><div class='add'>+	struct net_device *napi_dev;</div><div class='add'>+</div><div class='add'>+	struct airoha_qdma qdma[AIROHA_MAX_NUM_QDMA];</div><div class='add'>+	struct airoha_gdm_port *ports[AIROHA_MAX_NUM_GDM_PORTS];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+u32 airoha_rr(void __iomem *base, u32 offset);</div><div class='add'>+void airoha_wr(void __iomem *base, u32 offset, u32 val);</div><div class='add'>+u32 airoha_rmw(void __iomem *base, u32 offset, u32 mask, u32 val);</div><div class='add'>+</div><div class='add'>+#define airoha_fe_rr(eth, offset)				\</div><div class='add'>+	airoha_rr((eth)-&gt;fe_regs, (offset))</div><div class='add'>+#define airoha_fe_wr(eth, offset, val)				\</div><div class='add'>+	airoha_wr((eth)-&gt;fe_regs, (offset), (val))</div><div class='add'>+#define airoha_fe_rmw(eth, offset, mask, val)			\</div><div class='add'>+	airoha_rmw((eth)-&gt;fe_regs, (offset), (mask), (val))</div><div class='add'>+#define airoha_fe_set(eth, offset, val)				\</div><div class='add'>+	airoha_rmw((eth)-&gt;fe_regs, (offset), 0, (val))</div><div class='add'>+#define airoha_fe_clear(eth, offset, val)			\</div><div class='add'>+	airoha_rmw((eth)-&gt;fe_regs, (offset), (val), 0)</div><div class='add'>+</div><div class='add'>+#define airoha_qdma_rr(qdma, offset)				\</div><div class='add'>+	airoha_rr((qdma)-&gt;regs, (offset))</div><div class='add'>+#define airoha_qdma_wr(qdma, offset, val)			\</div><div class='add'>+	airoha_wr((qdma)-&gt;regs, (offset), (val))</div><div class='add'>+#define airoha_qdma_rmw(qdma, offset, mask, val)		\</div><div class='add'>+	airoha_rmw((qdma)-&gt;regs, (offset), (mask), (val))</div><div class='add'>+#define airoha_qdma_set(qdma, offset, val)			\</div><div class='add'>+	airoha_rmw((qdma)-&gt;regs, (offset), 0, (val))</div><div class='add'>+#define airoha_qdma_clear(qdma, offset, val)			\</div><div class='add'>+	airoha_rmw((qdma)-&gt;regs, (offset), (val), 0)</div><div class='add'>+</div><div class='add'>+static inline bool airhoa_is_lan_gdm_port(struct airoha_gdm_port *port)</div><div class='add'>+{</div><div class='add'>+	/* GDM1 port on EN7581 SoC is connected to the lan dsa switch.</div><div class='add'>+	 * GDM{2,3,4} can be used as wan port connected to an external</div><div class='add'>+	 * phy module.</div><div class='add'>+	 */</div><div class='add'>+	return port-&gt;id == 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool airoha_is_7581(struct airoha_eth *eth)</div><div class='add'>+{</div><div class='add'>+	return eth-&gt;soc-&gt;version == 0x7581;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool airoha_is_7583(struct airoha_eth *eth)</div><div class='add'>+{</div><div class='add'>+	return eth-&gt;soc-&gt;version == 0x7583;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool airoha_is_valid_gdm_port(struct airoha_eth *eth,</div><div class='add'>+			      struct airoha_gdm_port *port);</div><div class='add'>+</div><div class='add'>+bool airoha_ppe_is_enabled(struct airoha_eth *eth, int index);</div><div class='add'>+void airoha_ppe_check_skb(struct airoha_ppe_dev *dev, struct sk_buff *skb,</div><div class='add'>+			  u16 hash, bool rx_wlan);</div><div class='add'>+int airoha_ppe_setup_tc_block_cb(struct airoha_ppe_dev *dev, void *type_data);</div><div class='add'>+int airoha_ppe_init(struct airoha_eth *eth);</div><div class='add'>+void airoha_ppe_deinit(struct airoha_eth *eth);</div><div class='add'>+void airoha_ppe_init_upd_mem(struct airoha_gdm_port *port);</div><div class='add'>+u32 airoha_ppe_get_total_num_entries(struct airoha_ppe *ppe);</div><div class='add'>+struct airoha_foe_entry *airoha_ppe_foe_get_entry(struct airoha_ppe *ppe,</div><div class='add'>+						  u32 hash);</div><div class='add'>+void airoha_ppe_foe_entry_get_stats(struct airoha_ppe *ppe, u32 hash,</div><div class='add'>+				    struct airoha_foe_stats64 *stats);</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_DEBUG_FS</div><div class='add'>+int airoha_ppe_debugfs_init(struct airoha_ppe *ppe);</div><div class='add'>+#else</div><div class='add'>+static inline int airoha_ppe_debugfs_init(struct airoha_ppe *ppe)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif /* AIROHA_ETH_H */</div><div class='head'>diff --git a/drivers/net/ethernet/airoha/airoha_npu.c b/drivers/net/ethernet/airoha/airoha_npu.c<br/>new file mode 100644<br/>index 000000000000..68b7f9684dc7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/airoha/airoha_npu.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/airoha/airoha_npu.c</a></div><div class='hunk'>@@ -0,0 +1,783 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 AIROHA Inc</div><div class='add'>+ * Author: Lorenzo Bianconi &lt;lorenzo@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/devcoredump.h&gt;</div><div class='add'>+#include &lt;linux/firmware.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/of_net.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/of_reserved_mem.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='add'>+</div><div class='add'>+#include "airoha_eth.h"</div><div class='add'>+</div><div class='add'>+#define NPU_EN7581_FIRMWARE_DATA		"airoha/en7581_npu_data.bin"</div><div class='add'>+#define NPU_EN7581_FIRMWARE_RV32		"airoha/en7581_npu_rv32.bin"</div><div class='add'>+#define NPU_AN7583_FIRMWARE_DATA		"airoha/an7583_npu_data.bin"</div><div class='add'>+#define NPU_AN7583_FIRMWARE_RV32		"airoha/an7583_npu_rv32.bin"</div><div class='add'>+#define NPU_EN7581_FIRMWARE_RV32_MAX_SIZE	0x200000</div><div class='add'>+#define NPU_EN7581_FIRMWARE_DATA_MAX_SIZE	0x10000</div><div class='add'>+#define NPU_DUMP_SIZE				512</div><div class='add'>+</div><div class='add'>+#define REG_NPU_LOCAL_SRAM		0x0</div><div class='add'>+</div><div class='add'>+#define NPU_PC_BASE_ADDR		0x305000</div><div class='add'>+#define REG_PC_DBG(_n)			(0x305000 + ((_n) * 0x100))</div><div class='add'>+</div><div class='add'>+#define NPU_CLUSTER_BASE_ADDR		0x306000</div><div class='add'>+</div><div class='add'>+#define REG_CR_BOOT_TRIGGER		(NPU_CLUSTER_BASE_ADDR + 0x000)</div><div class='add'>+#define REG_CR_BOOT_CONFIG		(NPU_CLUSTER_BASE_ADDR + 0x004)</div><div class='add'>+#define REG_CR_BOOT_BASE(_n)		(NPU_CLUSTER_BASE_ADDR + 0x020 + ((_n) &lt;&lt; 2))</div><div class='add'>+</div><div class='add'>+#define NPU_MBOX_BASE_ADDR		0x30c000</div><div class='add'>+</div><div class='add'>+#define REG_CR_MBOX_INT_STATUS		(NPU_MBOX_BASE_ADDR + 0x000)</div><div class='add'>+#define MBOX_INT_STATUS_MASK		BIT(8)</div><div class='add'>+</div><div class='add'>+#define REG_CR_MBOX_INT_MASK(_n)	(NPU_MBOX_BASE_ADDR + 0x004 + ((_n) &lt;&lt; 2))</div><div class='add'>+#define REG_CR_MBQ0_CTRL(_n)		(NPU_MBOX_BASE_ADDR + 0x030 + ((_n) &lt;&lt; 2))</div><div class='add'>+#define REG_CR_MBQ8_CTRL(_n)		(NPU_MBOX_BASE_ADDR + 0x0b0 + ((_n) &lt;&lt; 2))</div><div class='add'>+#define REG_CR_NPU_MIB(_n)		(NPU_MBOX_BASE_ADDR + 0x140 + ((_n) &lt;&lt; 2))</div><div class='add'>+</div><div class='add'>+#define NPU_WLAN_BASE_ADDR		0x30d000</div><div class='add'>+</div><div class='add'>+#define REG_IRQ_STATUS			(NPU_WLAN_BASE_ADDR + 0x030)</div><div class='add'>+#define REG_IRQ_RXDONE(_n)		(NPU_WLAN_BASE_ADDR + ((_n) &lt;&lt; 2) + 0x034)</div><div class='add'>+#define NPU_IRQ_RX_MASK(_n)		((_n) == 1 ? BIT(17) : BIT(16))</div><div class='add'>+</div><div class='add'>+#define REG_TX_BASE(_n)			(NPU_WLAN_BASE_ADDR + ((_n) &lt;&lt; 4) + 0x080)</div><div class='add'>+#define REG_TX_DSCP_NUM(_n)		(NPU_WLAN_BASE_ADDR + ((_n) &lt;&lt; 4) + 0x084)</div><div class='add'>+#define REG_TX_CPU_IDX(_n)		(NPU_WLAN_BASE_ADDR + ((_n) &lt;&lt; 4) + 0x088)</div><div class='add'>+#define REG_TX_DMA_IDX(_n)		(NPU_WLAN_BASE_ADDR + ((_n) &lt;&lt; 4) + 0x08c)</div><div class='add'>+</div><div class='add'>+#define REG_RX_BASE(_n)			(NPU_WLAN_BASE_ADDR + ((_n) &lt;&lt; 4) + 0x180)</div><div class='add'>+#define REG_RX_DSCP_NUM(_n)		(NPU_WLAN_BASE_ADDR + ((_n) &lt;&lt; 4) + 0x184)</div><div class='add'>+#define REG_RX_CPU_IDX(_n)		(NPU_WLAN_BASE_ADDR + ((_n) &lt;&lt; 4) + 0x188)</div><div class='add'>+#define REG_RX_DMA_IDX(_n)		(NPU_WLAN_BASE_ADDR + ((_n) &lt;&lt; 4) + 0x18c)</div><div class='add'>+</div><div class='add'>+#define NPU_TIMER_BASE_ADDR		0x310100</div><div class='add'>+#define REG_WDT_TIMER_CTRL(_n)		(NPU_TIMER_BASE_ADDR + ((_n) * 0x100))</div><div class='add'>+#define WDT_EN_MASK			BIT(25)</div><div class='add'>+#define WDT_INTR_MASK			BIT(21)</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	NPU_OP_SET = 1,</div><div class='add'>+	NPU_OP_SET_NO_WAIT,</div><div class='add'>+	NPU_OP_GET,</div><div class='add'>+	NPU_OP_GET_NO_WAIT,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	NPU_FUNC_WIFI,</div><div class='add'>+	NPU_FUNC_TUNNEL,</div><div class='add'>+	NPU_FUNC_NOTIFY,</div><div class='add'>+	NPU_FUNC_DBA,</div><div class='add'>+	NPU_FUNC_TR471,</div><div class='add'>+	NPU_FUNC_PPE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	NPU_MBOX_ERROR,</div><div class='add'>+	NPU_MBOX_SUCCESS,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	PPE_FUNC_SET_WAIT,</div><div class='add'>+	PPE_FUNC_SET_WAIT_HWNAT_INIT,</div><div class='add'>+	PPE_FUNC_SET_WAIT_HWNAT_DEINIT,</div><div class='add'>+	PPE_FUNC_SET_WAIT_API,</div><div class='add'>+	PPE_FUNC_SET_WAIT_FLOW_STATS_SETUP,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	PPE2_SRAM_SET_ENTRY,</div><div class='add'>+	PPE_SRAM_SET_ENTRY,</div><div class='add'>+	PPE_SRAM_SET_VAL,</div><div class='add'>+	PPE_SRAM_RESET_VAL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum {</div><div class='add'>+	QDMA_WAN_ETHER = 1,</div><div class='add'>+	QDMA_WAN_PON_XDSL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_npu_fw {</div><div class='add'>+	const char *name;</div><div class='add'>+	int max_size;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct airoha_npu_soc_data {</div><div class='add'>+	struct airoha_npu_fw fw_rv32;</div><div class='add'>+	struct airoha_npu_fw fw_data;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define MBOX_MSG_FUNC_ID	GENMASK(14, 11)</div><div class='add'>+#define MBOX_MSG_STATIC_BUF	BIT(5)</div><div class='add'>+#define MBOX_MSG_STATUS		GENMASK(4, 2)</div><div class='add'>+#define MBOX_MSG_DONE		BIT(1)</div><div class='add'>+#define MBOX_MSG_WAIT_RSP	BIT(0)</div><div class='add'>+</div><div class='add'>+#define PPE_TYPE_L2B_IPV4	2</div><div class='add'>+#define PPE_TYPE_L2B_IPV4_IPV6	3</div><div class='add'>+</div><div class='add'>+struct ppe_mbox_data {</div><div class='add'>+	u32 func_type;</div><div class='add'>+	u32 func_id;</div><div class='add'>+	union {</div><div class='add'>+		struct {</div><div class='add'>+			u8 cds;</div><div class='add'>+			u8 xpon_hal_api;</div><div class='add'>+			u8 wan_xsi;</div><div class='add'>+			u8 ct_joyme4;</div><div class='add'>+			u8 max_packet;</div><div class='add'>+			u8 rsv[3];</div><div class='add'>+			u32 ppe_type;</div><div class='add'>+			u32 wan_mode;</div><div class='add'>+			u32 wan_sel;</div><div class='add'>+		} init_info;</div><div class='add'>+		struct {</div><div class='add'>+			u32 func_id;</div><div class='add'>+			u32 size;</div><div class='add'>+			u32 data;</div><div class='add'>+		} set_info;</div><div class='add'>+		struct {</div><div class='add'>+			u32 npu_stats_addr;</div><div class='add'>+			u32 foe_stats_addr;</div><div class='add'>+		} stats_info;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct wlan_mbox_data {</div><div class='add'>+	u32 ifindex:4;</div><div class='add'>+	u32 func_type:4;</div><div class='add'>+	u32 func_id;</div><div class='add'>+	DECLARE_FLEX_ARRAY(u8, d);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int airoha_npu_send_msg(struct airoha_npu *npu, int func_id,</div><div class='add'>+			       void *p, int size)</div><div class='add'>+{</div><div class='add'>+	u16 core = 0; /* FIXME */</div><div class='add'>+	u32 val, offset = core &lt;&lt; 4;</div><div class='add'>+	dma_addr_t dma_addr;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	dma_addr = dma_map_single(npu-&gt;dev, p, size, DMA_TO_DEVICE);</div><div class='add'>+	ret = dma_mapping_error(npu-&gt;dev, dma_addr);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;npu-&gt;cores[core].lock);</div><div class='add'>+</div><div class='add'>+	regmap_write(npu-&gt;regmap, REG_CR_MBQ0_CTRL(0) + offset, dma_addr);</div><div class='add'>+	regmap_write(npu-&gt;regmap, REG_CR_MBQ0_CTRL(1) + offset, size);</div><div class='add'>+	regmap_read(npu-&gt;regmap, REG_CR_MBQ0_CTRL(2) + offset, &amp;val);</div><div class='add'>+	regmap_write(npu-&gt;regmap, REG_CR_MBQ0_CTRL(2) + offset, val + 1);</div><div class='add'>+	val = FIELD_PREP(MBOX_MSG_FUNC_ID, func_id) | MBOX_MSG_WAIT_RSP;</div><div class='add'>+	regmap_write(npu-&gt;regmap, REG_CR_MBQ0_CTRL(3) + offset, val);</div><div class='add'>+</div><div class='add'>+	ret = regmap_read_poll_timeout_atomic(npu-&gt;regmap,</div><div class='add'>+					      REG_CR_MBQ0_CTRL(3) + offset,</div><div class='add'>+					      val, (val &amp; MBOX_MSG_DONE),</div><div class='add'>+					      100, 100 * MSEC_PER_SEC);</div><div class='add'>+	if (!ret &amp;&amp; FIELD_GET(MBOX_MSG_STATUS, val) != NPU_MBOX_SUCCESS)</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;npu-&gt;cores[core].lock);</div><div class='add'>+</div><div class='add'>+	dma_unmap_single(npu-&gt;dev, dma_addr, size, DMA_TO_DEVICE);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_npu_load_firmware(struct device *dev, void __iomem *addr,</div><div class='add'>+				    const struct airoha_npu_fw *fw_info)</div><div class='add'>+{</div><div class='add'>+	const struct firmware *fw;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = request_firmware(&amp;fw, fw_info-&gt;name, dev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret == -ENOENT ? -EPROBE_DEFER : ret;</div><div class='add'>+</div><div class='add'>+	if (fw-&gt;size &gt; fw_info-&gt;max_size) {</div><div class='add'>+		dev_err(dev, "%s: fw size too overlimit (%zu)\n",</div><div class='add'>+			fw_info-&gt;name, fw-&gt;size);</div><div class='add'>+		ret = -E2BIG;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy_toio(addr, fw-&gt;data, fw-&gt;size);</div><div class='add'>+out:</div><div class='add'>+	release_firmware(fw);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_npu_run_firmware(struct device *dev, void __iomem *base,</div><div class='add'>+				   struct resource *res)</div><div class='add'>+{</div><div class='add'>+	const struct airoha_npu_soc_data *soc;</div><div class='add'>+	void __iomem *addr;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	soc = of_device_get_match_data(dev);</div><div class='add'>+	if (!soc)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	addr = devm_ioremap_resource(dev, res);</div><div class='add'>+	if (IS_ERR(addr))</div><div class='add'>+		return PTR_ERR(addr);</div><div class='add'>+</div><div class='add'>+	/* Load rv32 npu firmware */</div><div class='add'>+	ret = airoha_npu_load_firmware(dev, addr, &amp;soc-&gt;fw_rv32);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Load data npu firmware */</div><div class='add'>+	return airoha_npu_load_firmware(dev, base + REG_NPU_LOCAL_SRAM,</div><div class='add'>+					&amp;soc-&gt;fw_data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t airoha_npu_mbox_handler(int irq, void *npu_instance)</div><div class='add'>+{</div><div class='add'>+	struct airoha_npu *npu = npu_instance;</div><div class='add'>+</div><div class='add'>+	/* clear mbox interrupt status */</div><div class='add'>+	regmap_write(npu-&gt;regmap, REG_CR_MBOX_INT_STATUS,</div><div class='add'>+		     MBOX_INT_STATUS_MASK);</div><div class='add'>+</div><div class='add'>+	/* acknowledge npu */</div><div class='add'>+	regmap_update_bits(npu-&gt;regmap, REG_CR_MBQ8_CTRL(3),</div><div class='add'>+			   MBOX_MSG_STATUS | MBOX_MSG_DONE, MBOX_MSG_DONE);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_npu_wdt_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct airoha_npu_core *core;</div><div class='add'>+	struct airoha_npu *npu;</div><div class='add'>+	void *dump;</div><div class='add'>+	u32 val[3];</div><div class='add'>+	int c;</div><div class='add'>+</div><div class='add'>+	core = container_of(work, struct airoha_npu_core, wdt_work);</div><div class='add'>+	npu = core-&gt;npu;</div><div class='add'>+</div><div class='add'>+	dump = vzalloc(NPU_DUMP_SIZE);</div><div class='add'>+	if (!dump)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	c = core - &amp;npu-&gt;cores[0];</div><div class='add'>+	regmap_bulk_read(npu-&gt;regmap, REG_PC_DBG(c), val, ARRAY_SIZE(val));</div><div class='add'>+	snprintf(dump, NPU_DUMP_SIZE, "PC: %08x SP: %08x LR: %08x\n",</div><div class='add'>+		 val[0], val[1], val[2]);</div><div class='add'>+</div><div class='add'>+	dev_coredumpv(npu-&gt;dev, dump, NPU_DUMP_SIZE, GFP_KERNEL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t airoha_npu_wdt_handler(int irq, void *core_instance)</div><div class='add'>+{</div><div class='add'>+	struct airoha_npu_core *core = core_instance;</div><div class='add'>+	struct airoha_npu *npu = core-&gt;npu;</div><div class='add'>+	int c = core - &amp;npu-&gt;cores[0];</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	regmap_set_bits(npu-&gt;regmap, REG_WDT_TIMER_CTRL(c), WDT_INTR_MASK);</div><div class='add'>+	if (!regmap_read(npu-&gt;regmap, REG_WDT_TIMER_CTRL(c), &amp;val) &amp;&amp;</div><div class='add'>+	    FIELD_GET(WDT_EN_MASK, val))</div><div class='add'>+		schedule_work(&amp;core-&gt;wdt_work);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_npu_ppe_init(struct airoha_npu *npu)</div><div class='add'>+{</div><div class='add'>+	struct ppe_mbox_data *ppe_data;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	ppe_data = kzalloc(sizeof(*ppe_data), GFP_KERNEL);</div><div class='add'>+	if (!ppe_data)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ppe_data-&gt;func_type = NPU_OP_SET;</div><div class='add'>+	ppe_data-&gt;func_id = PPE_FUNC_SET_WAIT_HWNAT_INIT;</div><div class='add'>+	ppe_data-&gt;init_info.ppe_type = PPE_TYPE_L2B_IPV4_IPV6;</div><div class='add'>+	ppe_data-&gt;init_info.wan_mode = QDMA_WAN_ETHER;</div><div class='add'>+</div><div class='add'>+	err = airoha_npu_send_msg(npu, NPU_FUNC_PPE, ppe_data,</div><div class='add'>+				  sizeof(*ppe_data));</div><div class='add'>+	kfree(ppe_data);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_npu_ppe_deinit(struct airoha_npu *npu)</div><div class='add'>+{</div><div class='add'>+	struct ppe_mbox_data *ppe_data;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	ppe_data = kzalloc(sizeof(*ppe_data), GFP_KERNEL);</div><div class='add'>+	if (!ppe_data)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ppe_data-&gt;func_type = NPU_OP_SET;</div><div class='add'>+	ppe_data-&gt;func_id = PPE_FUNC_SET_WAIT_HWNAT_DEINIT;</div><div class='add'>+</div><div class='add'>+	err = airoha_npu_send_msg(npu, NPU_FUNC_PPE, ppe_data,</div><div class='add'>+				  sizeof(*ppe_data));</div><div class='add'>+	kfree(ppe_data);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_npu_ppe_flush_sram_entries(struct airoha_npu *npu,</div><div class='add'>+					     dma_addr_t foe_addr,</div><div class='add'>+					     int sram_num_entries)</div><div class='add'>+{</div><div class='add'>+	struct ppe_mbox_data *ppe_data;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	ppe_data = kzalloc(sizeof(*ppe_data), GFP_KERNEL);</div><div class='add'>+	if (!ppe_data)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ppe_data-&gt;func_type = NPU_OP_SET;</div><div class='add'>+	ppe_data-&gt;func_id = PPE_FUNC_SET_WAIT_API;</div><div class='add'>+	ppe_data-&gt;set_info.func_id = PPE_SRAM_RESET_VAL;</div><div class='add'>+	ppe_data-&gt;set_info.data = foe_addr;</div><div class='add'>+	ppe_data-&gt;set_info.size = sram_num_entries;</div><div class='add'>+</div><div class='add'>+	err = airoha_npu_send_msg(npu, NPU_FUNC_PPE, ppe_data,</div><div class='add'>+				  sizeof(*ppe_data));</div><div class='add'>+	kfree(ppe_data);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_npu_foe_commit_entry(struct airoha_npu *npu,</div><div class='add'>+				       dma_addr_t foe_addr,</div><div class='add'>+				       u32 entry_size, u32 hash, bool ppe2)</div><div class='add'>+{</div><div class='add'>+	struct ppe_mbox_data *ppe_data;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	ppe_data = kzalloc(sizeof(*ppe_data), GFP_ATOMIC);</div><div class='add'>+	if (!ppe_data)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ppe_data-&gt;func_type = NPU_OP_SET;</div><div class='add'>+	ppe_data-&gt;func_id = PPE_FUNC_SET_WAIT_API;</div><div class='add'>+	ppe_data-&gt;set_info.data = foe_addr;</div><div class='add'>+	ppe_data-&gt;set_info.size = entry_size;</div><div class='add'>+	ppe_data-&gt;set_info.func_id = ppe2 ? PPE2_SRAM_SET_ENTRY</div><div class='add'>+					  : PPE_SRAM_SET_ENTRY;</div><div class='add'>+</div><div class='add'>+	err = airoha_npu_send_msg(npu, NPU_FUNC_PPE, ppe_data,</div><div class='add'>+				  sizeof(*ppe_data));</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ppe_data-&gt;set_info.func_id = PPE_SRAM_SET_VAL;</div><div class='add'>+	ppe_data-&gt;set_info.data = hash;</div><div class='add'>+	ppe_data-&gt;set_info.size = sizeof(u32);</div><div class='add'>+</div><div class='add'>+	err = airoha_npu_send_msg(npu, NPU_FUNC_PPE, ppe_data,</div><div class='add'>+				  sizeof(*ppe_data));</div><div class='add'>+out:</div><div class='add'>+	kfree(ppe_data);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_npu_ppe_stats_setup(struct airoha_npu *npu,</div><div class='add'>+				      dma_addr_t foe_stats_addr,</div><div class='add'>+				      u32 num_stats_entries)</div><div class='add'>+{</div><div class='add'>+	int err, size = num_stats_entries * sizeof(*npu-&gt;stats);</div><div class='add'>+	struct ppe_mbox_data *ppe_data;</div><div class='add'>+</div><div class='add'>+	ppe_data = kzalloc(sizeof(*ppe_data), GFP_ATOMIC);</div><div class='add'>+	if (!ppe_data)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ppe_data-&gt;func_type = NPU_OP_SET;</div><div class='add'>+	ppe_data-&gt;func_id = PPE_FUNC_SET_WAIT_FLOW_STATS_SETUP;</div><div class='add'>+	ppe_data-&gt;stats_info.foe_stats_addr = foe_stats_addr;</div><div class='add'>+</div><div class='add'>+	err = airoha_npu_send_msg(npu, NPU_FUNC_PPE, ppe_data,</div><div class='add'>+				  sizeof(*ppe_data));</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	npu-&gt;stats = devm_ioremap(npu-&gt;dev,</div><div class='add'>+				  ppe_data-&gt;stats_info.npu_stats_addr,</div><div class='add'>+				  size);</div><div class='add'>+	if (!npu-&gt;stats)</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+out:</div><div class='add'>+	kfree(ppe_data);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_npu_wlan_msg_send(struct airoha_npu *npu, int ifindex,</div><div class='add'>+				    enum airoha_npu_wlan_set_cmd func_id,</div><div class='add'>+				    void *data, int data_len, gfp_t gfp)</div><div class='add'>+{</div><div class='add'>+	struct wlan_mbox_data *wlan_data;</div><div class='add'>+	int err, len;</div><div class='add'>+</div><div class='add'>+	len = sizeof(*wlan_data) + data_len;</div><div class='add'>+	wlan_data = kzalloc(len, gfp);</div><div class='add'>+	if (!wlan_data)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	wlan_data-&gt;ifindex = ifindex;</div><div class='add'>+	wlan_data-&gt;func_type = NPU_OP_SET;</div><div class='add'>+	wlan_data-&gt;func_id = func_id;</div><div class='add'>+	memcpy(wlan_data-&gt;d, data, data_len);</div><div class='add'>+</div><div class='add'>+	err = airoha_npu_send_msg(npu, NPU_FUNC_WIFI, wlan_data, len);</div><div class='add'>+	kfree(wlan_data);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_npu_wlan_msg_get(struct airoha_npu *npu, int ifindex,</div><div class='add'>+				   enum airoha_npu_wlan_get_cmd func_id,</div><div class='add'>+				   void *data, int data_len, gfp_t gfp)</div><div class='add'>+{</div><div class='add'>+	struct wlan_mbox_data *wlan_data;</div><div class='add'>+	int err, len;</div><div class='add'>+</div><div class='add'>+	len = sizeof(*wlan_data) + data_len;</div><div class='add'>+	wlan_data = kzalloc(len, gfp);</div><div class='add'>+	if (!wlan_data)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	wlan_data-&gt;ifindex = ifindex;</div><div class='add'>+	wlan_data-&gt;func_type = NPU_OP_GET;</div><div class='add'>+	wlan_data-&gt;func_id = func_id;</div><div class='add'>+</div><div class='add'>+	err = airoha_npu_send_msg(npu, NPU_FUNC_WIFI, wlan_data, len);</div><div class='add'>+	if (!err)</div><div class='add'>+		memcpy(data, wlan_data-&gt;d, data_len);</div><div class='add'>+	kfree(wlan_data);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+airoha_npu_wlan_set_reserved_memory(struct airoha_npu *npu,</div><div class='add'>+				    int ifindex, const char *name,</div><div class='add'>+				    enum airoha_npu_wlan_set_cmd func_id)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = npu-&gt;dev;</div><div class='add'>+	struct resource res;</div><div class='add'>+	int err;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	err = of_reserved_mem_region_to_resource_byname(dev-&gt;of_node, name,</div><div class='add'>+							&amp;res);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	val = res.start;</div><div class='add'>+	return airoha_npu_wlan_msg_send(npu, ifindex, func_id, &amp;val,</div><div class='add'>+					sizeof(val), GFP_KERNEL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_npu_wlan_init_memory(struct airoha_npu *npu)</div><div class='add'>+{</div><div class='add'>+	enum airoha_npu_wlan_set_cmd cmd = WLAN_FUNC_SET_WAIT_NPU_BAND0_ONCPU;</div><div class='add'>+	u32 val = 0;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = airoha_npu_wlan_msg_send(npu, 1, cmd, &amp;val, sizeof(val),</div><div class='add'>+				       GFP_KERNEL);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	cmd = WLAN_FUNC_SET_WAIT_TX_BUF_CHECK_ADDR;</div><div class='add'>+	err = airoha_npu_wlan_set_reserved_memory(npu, 0, "tx-bufid", cmd);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	cmd = WLAN_FUNC_SET_WAIT_PKT_BUF_ADDR;</div><div class='add'>+	err = airoha_npu_wlan_set_reserved_memory(npu, 0, "pkt", cmd);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	cmd = WLAN_FUNC_SET_WAIT_TX_PKT_BUF_ADDR;</div><div class='add'>+	err = airoha_npu_wlan_set_reserved_memory(npu, 0, "tx-pkt", cmd);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	cmd = WLAN_FUNC_SET_WAIT_IS_FORCE_TO_CPU;</div><div class='add'>+	return airoha_npu_wlan_msg_send(npu, 0, cmd, &amp;val, sizeof(val),</div><div class='add'>+					GFP_KERNEL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 airoha_npu_wlan_queue_addr_get(struct airoha_npu *npu, int qid,</div><div class='add'>+					  bool xmit)</div><div class='add'>+{</div><div class='add'>+	if (xmit)</div><div class='add'>+		return REG_TX_BASE(qid + 2);</div><div class='add'>+</div><div class='add'>+	return REG_RX_BASE(qid);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_npu_wlan_irq_status_set(struct airoha_npu *npu, u32 val)</div><div class='add'>+{</div><div class='add'>+	regmap_write(npu-&gt;regmap, REG_IRQ_STATUS, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 airoha_npu_wlan_irq_status_get(struct airoha_npu *npu, int q)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	regmap_read(npu-&gt;regmap, REG_IRQ_STATUS, &amp;val);</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_npu_wlan_irq_enable(struct airoha_npu *npu, int q)</div><div class='add'>+{</div><div class='add'>+	regmap_set_bits(npu-&gt;regmap, REG_IRQ_RXDONE(q), NPU_IRQ_RX_MASK(q));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_npu_wlan_irq_disable(struct airoha_npu *npu, int q)</div><div class='add'>+{</div><div class='add'>+	regmap_clear_bits(npu-&gt;regmap, REG_IRQ_RXDONE(q), NPU_IRQ_RX_MASK(q));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct airoha_npu *airoha_npu_get(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct platform_device *pdev;</div><div class='add'>+	struct device_node *np;</div><div class='add'>+	struct airoha_npu *npu;</div><div class='add'>+</div><div class='add'>+	np = of_parse_phandle(dev-&gt;of_node, "airoha,npu", 0);</div><div class='add'>+	if (!np)</div><div class='add'>+		return ERR_PTR(-ENODEV);</div><div class='add'>+</div><div class='add'>+	pdev = of_find_device_by_node(np);</div><div class='add'>+</div><div class='add'>+	if (!pdev) {</div><div class='add'>+		dev_err(dev, "cannot find device node %s\n", np-&gt;name);</div><div class='add'>+		of_node_put(np);</div><div class='add'>+		return ERR_PTR(-ENODEV);</div><div class='add'>+	}</div><div class='add'>+	of_node_put(np);</div><div class='add'>+</div><div class='add'>+	if (!try_module_get(THIS_MODULE)) {</div><div class='add'>+		dev_err(dev, "failed to get the device driver module\n");</div><div class='add'>+		npu = ERR_PTR(-ENODEV);</div><div class='add'>+		goto error_pdev_put;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	npu = platform_get_drvdata(pdev);</div><div class='add'>+	if (!npu) {</div><div class='add'>+		npu = ERR_PTR(-ENODEV);</div><div class='add'>+		goto error_module_put;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!device_link_add(dev, &amp;pdev-&gt;dev, DL_FLAG_AUTOREMOVE_SUPPLIER)) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+			"failed to create device link to consumer %s\n",</div><div class='add'>+			dev_name(dev));</div><div class='add'>+		npu = ERR_PTR(-EINVAL);</div><div class='add'>+		goto error_module_put;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return npu;</div><div class='add'>+</div><div class='add'>+error_module_put:</div><div class='add'>+	module_put(THIS_MODULE);</div><div class='add'>+error_pdev_put:</div><div class='add'>+	platform_device_put(pdev);</div><div class='add'>+</div><div class='add'>+	return npu;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(airoha_npu_get);</div><div class='add'>+</div><div class='add'>+void airoha_npu_put(struct airoha_npu *npu)</div><div class='add'>+{</div><div class='add'>+	module_put(THIS_MODULE);</div><div class='add'>+	put_device(npu-&gt;dev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(airoha_npu_put);</div><div class='add'>+</div><div class='add'>+static const struct airoha_npu_soc_data en7581_npu_soc_data = {</div><div class='add'>+	.fw_rv32 = {</div><div class='add'>+		.name = NPU_EN7581_FIRMWARE_RV32,</div><div class='add'>+		.max_size = NPU_EN7581_FIRMWARE_RV32_MAX_SIZE,</div><div class='add'>+	},</div><div class='add'>+	.fw_data = {</div><div class='add'>+		.name = NPU_EN7581_FIRMWARE_DATA,</div><div class='add'>+		.max_size = NPU_EN7581_FIRMWARE_DATA_MAX_SIZE,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct airoha_npu_soc_data an7583_npu_soc_data = {</div><div class='add'>+	.fw_rv32 = {</div><div class='add'>+		.name = NPU_AN7583_FIRMWARE_RV32,</div><div class='add'>+		.max_size = NPU_EN7581_FIRMWARE_RV32_MAX_SIZE,</div><div class='add'>+	},</div><div class='add'>+	.fw_data = {</div><div class='add'>+		.name = NPU_AN7583_FIRMWARE_DATA,</div><div class='add'>+		.max_size = NPU_EN7581_FIRMWARE_DATA_MAX_SIZE,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct of_device_id of_airoha_npu_match[] = {</div><div class='add'>+	{ .compatible = "airoha,en7581-npu", .data = &amp;en7581_npu_soc_data },</div><div class='add'>+	{ .compatible = "airoha,an7583-npu", .data = &amp;an7583_npu_soc_data },</div><div class='add'>+	{ /* sentinel */ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(of, of_airoha_npu_match);</div><div class='add'>+</div><div class='add'>+static const struct regmap_config regmap_config = {</div><div class='add'>+	.name			= "npu",</div><div class='add'>+	.reg_bits		= 32,</div><div class='add'>+	.val_bits		= 32,</div><div class='add'>+	.reg_stride		= 4,</div><div class='add'>+	.disable_locking	= true,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int airoha_npu_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct airoha_npu *npu;</div><div class='add'>+	struct resource res;</div><div class='add'>+	void __iomem *base;</div><div class='add'>+	int i, irq, err;</div><div class='add'>+</div><div class='add'>+	base = devm_platform_ioremap_resource(pdev, 0);</div><div class='add'>+	if (IS_ERR(base))</div><div class='add'>+		return PTR_ERR(base);</div><div class='add'>+</div><div class='add'>+	npu = devm_kzalloc(dev, sizeof(*npu), GFP_KERNEL);</div><div class='add'>+	if (!npu)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	npu-&gt;dev = dev;</div><div class='add'>+	npu-&gt;ops.ppe_init = airoha_npu_ppe_init;</div><div class='add'>+	npu-&gt;ops.ppe_deinit = airoha_npu_ppe_deinit;</div><div class='add'>+	npu-&gt;ops.ppe_init_stats = airoha_npu_ppe_stats_setup;</div><div class='add'>+	npu-&gt;ops.ppe_flush_sram_entries = airoha_npu_ppe_flush_sram_entries;</div><div class='add'>+	npu-&gt;ops.ppe_foe_commit_entry = airoha_npu_foe_commit_entry;</div><div class='add'>+	npu-&gt;ops.wlan_init_reserved_memory = airoha_npu_wlan_init_memory;</div><div class='add'>+	npu-&gt;ops.wlan_send_msg = airoha_npu_wlan_msg_send;</div><div class='add'>+	npu-&gt;ops.wlan_get_msg = airoha_npu_wlan_msg_get;</div><div class='add'>+	npu-&gt;ops.wlan_get_queue_addr = airoha_npu_wlan_queue_addr_get;</div><div class='add'>+	npu-&gt;ops.wlan_set_irq_status = airoha_npu_wlan_irq_status_set;</div><div class='add'>+	npu-&gt;ops.wlan_get_irq_status = airoha_npu_wlan_irq_status_get;</div><div class='add'>+	npu-&gt;ops.wlan_enable_irq = airoha_npu_wlan_irq_enable;</div><div class='add'>+	npu-&gt;ops.wlan_disable_irq = airoha_npu_wlan_irq_disable;</div><div class='add'>+</div><div class='add'>+	npu-&gt;regmap = devm_regmap_init_mmio(dev, base, &amp;regmap_config);</div><div class='add'>+	if (IS_ERR(npu-&gt;regmap))</div><div class='add'>+		return PTR_ERR(npu-&gt;regmap);</div><div class='add'>+</div><div class='add'>+	err = of_reserved_mem_region_to_resource(dev-&gt;of_node, 0, &amp;res);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	irq = platform_get_irq(pdev, 0);</div><div class='add'>+	if (irq &lt; 0)</div><div class='add'>+		return irq;</div><div class='add'>+</div><div class='add'>+	err = devm_request_irq(dev, irq, airoha_npu_mbox_handler,</div><div class='add'>+			       IRQF_SHARED, "airoha-npu-mbox", npu);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(npu-&gt;cores); i++) {</div><div class='add'>+		struct airoha_npu_core *core = &amp;npu-&gt;cores[i];</div><div class='add'>+</div><div class='add'>+		spin_lock_init(&amp;core-&gt;lock);</div><div class='add'>+		core-&gt;npu = npu;</div><div class='add'>+</div><div class='add'>+		irq = platform_get_irq(pdev, i + 1);</div><div class='add'>+		if (irq &lt; 0)</div><div class='add'>+			return irq;</div><div class='add'>+</div><div class='add'>+		err = devm_request_irq(dev, irq, airoha_npu_wdt_handler,</div><div class='add'>+				       IRQF_SHARED, "airoha-npu-wdt", core);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		INIT_WORK(&amp;core-&gt;wdt_work, airoha_npu_wdt_work);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* wlan IRQ lines */</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(npu-&gt;irqs); i++) {</div><div class='add'>+		irq = platform_get_irq(pdev, i + ARRAY_SIZE(npu-&gt;cores) + 1);</div><div class='add'>+		if (irq &lt; 0)</div><div class='add'>+			return irq;</div><div class='add'>+</div><div class='add'>+		npu-&gt;irqs[i] = irq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = dma_set_coherent_mask(dev, DMA_BIT_MASK(32));</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = airoha_npu_run_firmware(dev, base, &amp;res);</div><div class='add'>+	if (err)</div><div class='add'>+		return dev_err_probe(dev, err, "failed to run npu firmware\n");</div><div class='add'>+</div><div class='add'>+	regmap_write(npu-&gt;regmap, REG_CR_NPU_MIB(10),</div><div class='add'>+		     res.start + NPU_EN7581_FIRMWARE_RV32_MAX_SIZE);</div><div class='add'>+	regmap_write(npu-&gt;regmap, REG_CR_NPU_MIB(11), 0x40000); /* SRAM 256K */</div><div class='add'>+	regmap_write(npu-&gt;regmap, REG_CR_NPU_MIB(12), 0);</div><div class='add'>+	regmap_write(npu-&gt;regmap, REG_CR_NPU_MIB(21), 1);</div><div class='add'>+	msleep(100);</div><div class='add'>+</div><div class='add'>+	/* setting booting address */</div><div class='add'>+	for (i = 0; i &lt; NPU_NUM_CORES; i++)</div><div class='add'>+		regmap_write(npu-&gt;regmap, REG_CR_BOOT_BASE(i), res.start);</div><div class='add'>+	usleep_range(1000, 2000);</div><div class='add'>+</div><div class='add'>+	/* enable NPU cores */</div><div class='add'>+	regmap_write(npu-&gt;regmap, REG_CR_BOOT_CONFIG, 0xff);</div><div class='add'>+	regmap_write(npu-&gt;regmap, REG_CR_BOOT_TRIGGER, 0x1);</div><div class='add'>+	msleep(100);</div><div class='add'>+</div><div class='add'>+	platform_set_drvdata(pdev, npu);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_npu_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct airoha_npu *npu = platform_get_drvdata(pdev);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(npu-&gt;cores); i++)</div><div class='add'>+		cancel_work_sync(&amp;npu-&gt;cores[i].wdt_work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_driver airoha_npu_driver = {</div><div class='add'>+	.probe = airoha_npu_probe,</div><div class='add'>+	.remove = airoha_npu_remove,</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = "airoha-npu",</div><div class='add'>+		.of_match_table = of_airoha_npu_match,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+module_platform_driver(airoha_npu_driver);</div><div class='add'>+</div><div class='add'>+MODULE_FIRMWARE(NPU_EN7581_FIRMWARE_DATA);</div><div class='add'>+MODULE_FIRMWARE(NPU_EN7581_FIRMWARE_RV32);</div><div class='add'>+MODULE_FIRMWARE(NPU_AN7583_FIRMWARE_DATA);</div><div class='add'>+MODULE_FIRMWARE(NPU_AN7583_FIRMWARE_RV32);</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+MODULE_AUTHOR("Lorenzo Bianconi &lt;lorenzo@kernel.org&gt;");</div><div class='add'>+MODULE_DESCRIPTION("Airoha Network Processor Unit driver");</div><div class='head'>diff --git a/drivers/net/ethernet/airoha/airoha_ppe.c b/drivers/net/ethernet/airoha/airoha_ppe.c<br/>new file mode 100644<br/>index 000000000000..0caabb0c3aa0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/airoha/airoha_ppe.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/airoha/airoha_ppe.c</a></div><div class='hunk'>@@ -0,0 +1,1561 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 AIROHA Inc</div><div class='add'>+ * Author: Lorenzo Bianconi &lt;lorenzo@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/ip.h&gt;</div><div class='add'>+#include &lt;linux/ipv6.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/rhashtable.h&gt;</div><div class='add'>+#include &lt;net/ipv6.h&gt;</div><div class='add'>+#include &lt;net/pkt_cls.h&gt;</div><div class='add'>+</div><div class='add'>+#include "airoha_regs.h"</div><div class='add'>+#include "airoha_eth.h"</div><div class='add'>+</div><div class='add'>+static DEFINE_MUTEX(flow_offload_mutex);</div><div class='add'>+static DEFINE_SPINLOCK(ppe_lock);</div><div class='add'>+</div><div class='add'>+static const struct rhashtable_params airoha_flow_table_params = {</div><div class='add'>+	.head_offset = offsetof(struct airoha_flow_table_entry, node),</div><div class='add'>+	.key_offset = offsetof(struct airoha_flow_table_entry, cookie),</div><div class='add'>+	.key_len = sizeof(unsigned long),</div><div class='add'>+	.automatic_shrinking = true,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct rhashtable_params airoha_l2_flow_table_params = {</div><div class='add'>+	.head_offset = offsetof(struct airoha_flow_table_entry, l2_node),</div><div class='add'>+	.key_offset = offsetof(struct airoha_flow_table_entry, data.bridge),</div><div class='add'>+	.key_len = 2 * ETH_ALEN,</div><div class='add'>+	.automatic_shrinking = true,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_get_num_stats_entries(struct airoha_ppe *ppe)</div><div class='add'>+{</div><div class='add'>+	if (!IS_ENABLED(CONFIG_NET_AIROHA_FLOW_STATS))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (airoha_is_7583(ppe-&gt;eth))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return PPE_STATS_NUM_ENTRIES;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_get_total_num_stats_entries(struct airoha_ppe *ppe)</div><div class='add'>+{</div><div class='add'>+	int num_stats = airoha_ppe_get_num_stats_entries(ppe);</div><div class='add'>+</div><div class='add'>+	if (num_stats &gt; 0) {</div><div class='add'>+		struct airoha_eth *eth = ppe-&gt;eth;</div><div class='add'>+</div><div class='add'>+		num_stats = num_stats * eth-&gt;soc-&gt;num_ppe;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return num_stats;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 airoha_ppe_get_total_sram_num_entries(struct airoha_ppe *ppe)</div><div class='add'>+{</div><div class='add'>+	struct airoha_eth *eth = ppe-&gt;eth;</div><div class='add'>+</div><div class='add'>+	return PPE_SRAM_NUM_ENTRIES * eth-&gt;soc-&gt;num_ppe;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 airoha_ppe_get_total_num_entries(struct airoha_ppe *ppe)</div><div class='add'>+{</div><div class='add'>+	u32 sram_num_entries = airoha_ppe_get_total_sram_num_entries(ppe);</div><div class='add'>+</div><div class='add'>+	return sram_num_entries + PPE_DRAM_NUM_ENTRIES;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool airoha_ppe_is_enabled(struct airoha_eth *eth, int index)</div><div class='add'>+{</div><div class='add'>+	if (index &gt;= eth-&gt;soc-&gt;num_ppe)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return airoha_fe_rr(eth, REG_PPE_GLO_CFG(index)) &amp; PPE_GLO_CFG_EN_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 airoha_ppe_get_timestamp(struct airoha_ppe *ppe)</div><div class='add'>+{</div><div class='add'>+	u16 timestamp = airoha_fe_rr(ppe-&gt;eth, REG_FE_FOE_TS);</div><div class='add'>+</div><div class='add'>+	return FIELD_GET(AIROHA_FOE_IB1_BIND_TIMESTAMP, timestamp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_ppe_hw_init(struct airoha_ppe *ppe)</div><div class='add'>+{</div><div class='add'>+	u32 sram_ppe_num_data_entries = PPE_SRAM_NUM_ENTRIES, sram_num_entries;</div><div class='add'>+	u32 sram_tb_size, dram_num_entries;</div><div class='add'>+	struct airoha_eth *eth = ppe-&gt;eth;</div><div class='add'>+	int i, sram_num_stats_entries;</div><div class='add'>+</div><div class='add'>+	sram_num_entries = airoha_ppe_get_total_sram_num_entries(ppe);</div><div class='add'>+	sram_tb_size = sram_num_entries * sizeof(struct airoha_foe_entry);</div><div class='add'>+	dram_num_entries = PPE_RAM_NUM_ENTRIES_SHIFT(PPE_DRAM_NUM_ENTRIES);</div><div class='add'>+</div><div class='add'>+	sram_num_stats_entries = airoha_ppe_get_num_stats_entries(ppe);</div><div class='add'>+	if (sram_num_stats_entries &gt; 0)</div><div class='add'>+		sram_ppe_num_data_entries -= sram_num_stats_entries;</div><div class='add'>+	sram_ppe_num_data_entries =</div><div class='add'>+		PPE_RAM_NUM_ENTRIES_SHIFT(sram_ppe_num_data_entries);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; eth-&gt;soc-&gt;num_ppe; i++) {</div><div class='add'>+		int p;</div><div class='add'>+</div><div class='add'>+		airoha_fe_wr(eth, REG_PPE_TB_BASE(i),</div><div class='add'>+			     ppe-&gt;foe_dma + sram_tb_size);</div><div class='add'>+</div><div class='add'>+		airoha_fe_rmw(eth, REG_PPE_BND_AGE0(i),</div><div class='add'>+			      PPE_BIND_AGE0_DELTA_NON_L4 |</div><div class='add'>+			      PPE_BIND_AGE0_DELTA_UDP,</div><div class='add'>+			      FIELD_PREP(PPE_BIND_AGE0_DELTA_NON_L4, 1) |</div><div class='add'>+			      FIELD_PREP(PPE_BIND_AGE0_DELTA_UDP, 12));</div><div class='add'>+		airoha_fe_rmw(eth, REG_PPE_BND_AGE1(i),</div><div class='add'>+			      PPE_BIND_AGE1_DELTA_TCP_FIN |</div><div class='add'>+			      PPE_BIND_AGE1_DELTA_TCP,</div><div class='add'>+			      FIELD_PREP(PPE_BIND_AGE1_DELTA_TCP_FIN, 1) |</div><div class='add'>+			      FIELD_PREP(PPE_BIND_AGE1_DELTA_TCP, 7));</div><div class='add'>+</div><div class='add'>+		airoha_fe_rmw(eth, REG_PPE_TB_HASH_CFG(i),</div><div class='add'>+			      PPE_SRAM_TABLE_EN_MASK |</div><div class='add'>+			      PPE_SRAM_HASH1_EN_MASK |</div><div class='add'>+			      PPE_DRAM_TABLE_EN_MASK |</div><div class='add'>+			      PPE_SRAM_HASH0_MODE_MASK |</div><div class='add'>+			      PPE_SRAM_HASH1_MODE_MASK |</div><div class='add'>+			      PPE_DRAM_HASH0_MODE_MASK |</div><div class='add'>+			      PPE_DRAM_HASH1_MODE_MASK,</div><div class='add'>+			      FIELD_PREP(PPE_SRAM_TABLE_EN_MASK, 1) |</div><div class='add'>+			      FIELD_PREP(PPE_SRAM_HASH1_EN_MASK, 1) |</div><div class='add'>+			      FIELD_PREP(PPE_SRAM_HASH1_MODE_MASK, 1) |</div><div class='add'>+			      FIELD_PREP(PPE_DRAM_HASH1_MODE_MASK, 3));</div><div class='add'>+</div><div class='add'>+		airoha_fe_rmw(eth, REG_PPE_TB_CFG(i),</div><div class='add'>+			      PPE_TB_CFG_SEARCH_MISS_MASK |</div><div class='add'>+			      PPE_SRAM_TB_NUM_ENTRY_MASK |</div><div class='add'>+			      PPE_DRAM_TB_NUM_ENTRY_MASK |</div><div class='add'>+			      PPE_TB_CFG_KEEPALIVE_MASK |</div><div class='add'>+			      PPE_TB_ENTRY_SIZE_MASK,</div><div class='add'>+			      FIELD_PREP(PPE_TB_CFG_SEARCH_MISS_MASK, 3) |</div><div class='add'>+			      FIELD_PREP(PPE_TB_ENTRY_SIZE_MASK, 0) |</div><div class='add'>+			      FIELD_PREP(PPE_SRAM_TB_NUM_ENTRY_MASK,</div><div class='add'>+					 sram_ppe_num_data_entries) |</div><div class='add'>+			      FIELD_PREP(PPE_DRAM_TB_NUM_ENTRY_MASK,</div><div class='add'>+					 dram_num_entries));</div><div class='add'>+</div><div class='add'>+		airoha_fe_wr(eth, REG_PPE_HASH_SEED(i), PPE_HASH_SEED);</div><div class='add'>+</div><div class='add'>+		for (p = 0; p &lt; ARRAY_SIZE(eth-&gt;ports); p++)</div><div class='add'>+			airoha_fe_rmw(eth, REG_PPE_MTU(i, p),</div><div class='add'>+				      FP0_EGRESS_MTU_MASK |</div><div class='add'>+				      FP1_EGRESS_MTU_MASK,</div><div class='add'>+				      FIELD_PREP(FP0_EGRESS_MTU_MASK,</div><div class='add'>+						 AIROHA_MAX_MTU) |</div><div class='add'>+				      FIELD_PREP(FP1_EGRESS_MTU_MASK,</div><div class='add'>+						 AIROHA_MAX_MTU));</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_ppe_flow_mangle_eth(const struct flow_action_entry *act, void *eth)</div><div class='add'>+{</div><div class='add'>+	void *dest = eth + act-&gt;mangle.offset;</div><div class='add'>+	const void *src = &amp;act-&gt;mangle.val;</div><div class='add'>+</div><div class='add'>+	if (act-&gt;mangle.offset &gt; 8)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (act-&gt;mangle.mask == 0xffff) {</div><div class='add'>+		src += 2;</div><div class='add'>+		dest += 2;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(dest, src, act-&gt;mangle.mask ? 2 : 4);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_flow_mangle_ports(const struct flow_action_entry *act,</div><div class='add'>+					struct airoha_flow_data *data)</div><div class='add'>+{</div><div class='add'>+	u32 val = be32_to_cpu((__force __be32)act-&gt;mangle.val);</div><div class='add'>+</div><div class='add'>+	switch (act-&gt;mangle.offset) {</div><div class='add'>+	case 0:</div><div class='add'>+		if ((__force __be32)act-&gt;mangle.mask == ~cpu_to_be32(0xffff))</div><div class='add'>+			data-&gt;dst_port = cpu_to_be16(val);</div><div class='add'>+		else</div><div class='add'>+			data-&gt;src_port = cpu_to_be16(val &gt;&gt; 16);</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		data-&gt;dst_port = cpu_to_be16(val);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_flow_mangle_ipv4(const struct flow_action_entry *act,</div><div class='add'>+				       struct airoha_flow_data *data)</div><div class='add'>+{</div><div class='add'>+	__be32 *dest;</div><div class='add'>+</div><div class='add'>+	switch (act-&gt;mangle.offset) {</div><div class='add'>+	case offsetof(struct iphdr, saddr):</div><div class='add'>+		dest = &amp;data-&gt;v4.src_addr;</div><div class='add'>+		break;</div><div class='add'>+	case offsetof(struct iphdr, daddr):</div><div class='add'>+		dest = &amp;data-&gt;v4.dst_addr;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(dest, &amp;act-&gt;mangle.val, sizeof(u32));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_get_wdma_info(struct net_device *dev, const u8 *addr,</div><div class='add'>+				    struct airoha_wdma_info *info)</div><div class='add'>+{</div><div class='add'>+	struct net_device_path_stack stack;</div><div class='add'>+	struct net_device_path *path;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!dev)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	err = dev_fill_forward_path(dev, addr, &amp;stack);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	path = &amp;stack.path[stack.num_paths - 1];</div><div class='add'>+	if (path-&gt;type != DEV_PATH_MTK_WDMA)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	info-&gt;idx = path-&gt;mtk_wdma.wdma_idx;</div><div class='add'>+	info-&gt;bss = path-&gt;mtk_wdma.bss;</div><div class='add'>+	info-&gt;wcid = path-&gt;mtk_wdma.wcid;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_get_dsa_port(struct net_device **dev)</div><div class='add'>+{</div><div class='add'>+#if IS_ENABLED(CONFIG_NET_DSA)</div><div class='add'>+	struct dsa_port *dp = dsa_port_from_netdev(*dev);</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(dp))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	*dev = dsa_port_to_conduit(dp);</div><div class='add'>+	return dp-&gt;index;</div><div class='add'>+#else</div><div class='add'>+	return -ENODEV;</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_ppe_foe_set_bridge_addrs(struct airoha_foe_bridge *br,</div><div class='add'>+					    struct ethhdr *eh)</div><div class='add'>+{</div><div class='add'>+	br-&gt;dest_mac_hi = get_unaligned_be32(eh-&gt;h_dest);</div><div class='add'>+	br-&gt;dest_mac_lo = get_unaligned_be16(eh-&gt;h_dest + 4);</div><div class='add'>+	br-&gt;src_mac_hi = get_unaligned_be16(eh-&gt;h_source);</div><div class='add'>+	br-&gt;src_mac_lo = get_unaligned_be32(eh-&gt;h_source + 2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_foe_entry_prepare(struct airoha_eth *eth,</div><div class='add'>+					struct airoha_foe_entry *hwe,</div><div class='add'>+					struct net_device *dev, int type,</div><div class='add'>+					struct airoha_flow_data *data,</div><div class='add'>+					int l4proto)</div><div class='add'>+{</div><div class='add'>+	u32 qdata = FIELD_PREP(AIROHA_FOE_SHAPER_ID, 0x7f), ports_pad, val;</div><div class='add'>+	int wlan_etype = -EINVAL, dsa_port = airoha_get_dsa_port(&amp;dev);</div><div class='add'>+	struct airoha_foe_mac_info_common *l2;</div><div class='add'>+	u8 smac_id = 0xf;</div><div class='add'>+</div><div class='add'>+	memset(hwe, 0, sizeof(*hwe));</div><div class='add'>+</div><div class='add'>+	val = FIELD_PREP(AIROHA_FOE_IB1_BIND_STATE, AIROHA_FOE_STATE_BIND) |</div><div class='add'>+	      FIELD_PREP(AIROHA_FOE_IB1_BIND_PACKET_TYPE, type) |</div><div class='add'>+	      FIELD_PREP(AIROHA_FOE_IB1_BIND_UDP, l4proto == IPPROTO_UDP) |</div><div class='add'>+	      FIELD_PREP(AIROHA_FOE_IB1_BIND_VLAN_LAYER, data-&gt;vlan.num) |</div><div class='add'>+	      FIELD_PREP(AIROHA_FOE_IB1_BIND_VPM, data-&gt;vlan.num) |</div><div class='add'>+	      FIELD_PREP(AIROHA_FOE_IB1_BIND_PPPOE, data-&gt;pppoe.num) |</div><div class='add'>+	      AIROHA_FOE_IB1_BIND_TTL;</div><div class='add'>+	hwe-&gt;ib1 = val;</div><div class='add'>+</div><div class='add'>+	val = FIELD_PREP(AIROHA_FOE_IB2_PORT_AG, 0x1f);</div><div class='add'>+	if (dev) {</div><div class='add'>+		struct airoha_wdma_info info = {};</div><div class='add'>+</div><div class='add'>+		if (!airoha_ppe_get_wdma_info(dev, data-&gt;eth.h_dest, &amp;info)) {</div><div class='add'>+			val |= FIELD_PREP(AIROHA_FOE_IB2_NBQ, info.idx) |</div><div class='add'>+			       FIELD_PREP(AIROHA_FOE_IB2_PSE_PORT,</div><div class='add'>+					  FE_PSE_PORT_CDM4);</div><div class='add'>+			qdata |= FIELD_PREP(AIROHA_FOE_ACTDP, info.bss);</div><div class='add'>+			wlan_etype = FIELD_PREP(AIROHA_FOE_MAC_WDMA_BAND,</div><div class='add'>+						info.idx) |</div><div class='add'>+				     FIELD_PREP(AIROHA_FOE_MAC_WDMA_WCID,</div><div class='add'>+						info.wcid);</div><div class='add'>+		} else {</div><div class='add'>+			struct airoha_gdm_port *port = netdev_priv(dev);</div><div class='add'>+			u8 pse_port;</div><div class='add'>+</div><div class='add'>+			if (!airoha_is_valid_gdm_port(eth, port))</div><div class='add'>+				return -EINVAL;</div><div class='add'>+</div><div class='add'>+			if (dsa_port &gt;= 0 || eth-&gt;ports[1])</div><div class='add'>+				pse_port = port-&gt;id == 4 ? FE_PSE_PORT_GDM4</div><div class='add'>+							 : port-&gt;id;</div><div class='add'>+			else</div><div class='add'>+				pse_port = 2; /* uplink relies on GDM2</div><div class='add'>+					       * loopback</div><div class='add'>+					       */</div><div class='add'>+</div><div class='add'>+			val |= FIELD_PREP(AIROHA_FOE_IB2_PSE_PORT, pse_port) |</div><div class='add'>+			       AIROHA_FOE_IB2_PSE_QOS;</div><div class='add'>+			/* For downlink traffic consume SRAM memory for hw</div><div class='add'>+			 * forwarding descriptors queue.</div><div class='add'>+			 */</div><div class='add'>+			if (airhoa_is_lan_gdm_port(port))</div><div class='add'>+				val |= AIROHA_FOE_IB2_FAST_PATH;</div><div class='add'>+			if (dsa_port &gt;= 0)</div><div class='add'>+				val |= FIELD_PREP(AIROHA_FOE_IB2_NBQ,</div><div class='add'>+						  dsa_port);</div><div class='add'>+</div><div class='add'>+			smac_id = port-&gt;id;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (is_multicast_ether_addr(data-&gt;eth.h_dest))</div><div class='add'>+		val |= AIROHA_FOE_IB2_MULTICAST;</div><div class='add'>+</div><div class='add'>+	ports_pad = 0xa5a5a500 | (l4proto &amp; 0xff);</div><div class='add'>+	if (type == PPE_PKT_TYPE_IPV4_ROUTE)</div><div class='add'>+		hwe-&gt;ipv4.orig_tuple.ports = ports_pad;</div><div class='add'>+	if (type == PPE_PKT_TYPE_IPV6_ROUTE_3T)</div><div class='add'>+		hwe-&gt;ipv6.ports = ports_pad;</div><div class='add'>+</div><div class='add'>+	if (type == PPE_PKT_TYPE_BRIDGE) {</div><div class='add'>+		airoha_ppe_foe_set_bridge_addrs(&amp;hwe-&gt;bridge, &amp;data-&gt;eth);</div><div class='add'>+		hwe-&gt;bridge.data = qdata;</div><div class='add'>+		hwe-&gt;bridge.ib2 = val;</div><div class='add'>+		l2 = &amp;hwe-&gt;bridge.l2.common;</div><div class='add'>+	} else if (type &gt;= PPE_PKT_TYPE_IPV6_ROUTE_3T) {</div><div class='add'>+		hwe-&gt;ipv6.data = qdata;</div><div class='add'>+		hwe-&gt;ipv6.ib2 = val;</div><div class='add'>+		l2 = &amp;hwe-&gt;ipv6.l2;</div><div class='add'>+		l2-&gt;etype = ETH_P_IPV6;</div><div class='add'>+	} else {</div><div class='add'>+		hwe-&gt;ipv4.data = qdata;</div><div class='add'>+		hwe-&gt;ipv4.ib2 = val;</div><div class='add'>+		l2 = &amp;hwe-&gt;ipv4.l2.common;</div><div class='add'>+		l2-&gt;etype = ETH_P_IP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	l2-&gt;dest_mac_hi = get_unaligned_be32(data-&gt;eth.h_dest);</div><div class='add'>+	l2-&gt;dest_mac_lo = get_unaligned_be16(data-&gt;eth.h_dest + 4);</div><div class='add'>+	if (type &lt;= PPE_PKT_TYPE_IPV4_DSLITE) {</div><div class='add'>+		struct airoha_foe_mac_info *mac_info;</div><div class='add'>+</div><div class='add'>+		l2-&gt;src_mac_hi = get_unaligned_be32(data-&gt;eth.h_source);</div><div class='add'>+		hwe-&gt;ipv4.l2.src_mac_lo =</div><div class='add'>+			get_unaligned_be16(data-&gt;eth.h_source + 4);</div><div class='add'>+</div><div class='add'>+		mac_info = (struct airoha_foe_mac_info *)l2;</div><div class='add'>+		mac_info-&gt;pppoe_id = data-&gt;pppoe.sid;</div><div class='add'>+	} else {</div><div class='add'>+		l2-&gt;src_mac_hi = FIELD_PREP(AIROHA_FOE_MAC_SMAC_ID, smac_id) |</div><div class='add'>+				 FIELD_PREP(AIROHA_FOE_MAC_PPPOE_ID,</div><div class='add'>+					    data-&gt;pppoe.sid);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (data-&gt;vlan.num) {</div><div class='add'>+		l2-&gt;vlan1 = data-&gt;vlan.hdr[0].id;</div><div class='add'>+		if (data-&gt;vlan.num == 2)</div><div class='add'>+			l2-&gt;vlan2 = data-&gt;vlan.hdr[1].id;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (wlan_etype &gt;= 0) {</div><div class='add'>+		l2-&gt;etype = wlan_etype;</div><div class='add'>+	} else if (dsa_port &gt;= 0) {</div><div class='add'>+		l2-&gt;etype = BIT(dsa_port);</div><div class='add'>+		l2-&gt;etype |= !data-&gt;vlan.num ? BIT(15) : 0;</div><div class='add'>+	} else if (data-&gt;pppoe.num) {</div><div class='add'>+		l2-&gt;etype = ETH_P_PPP_SES;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_foe_entry_set_ipv4_tuple(struct airoha_foe_entry *hwe,</div><div class='add'>+					       struct airoha_flow_data *data,</div><div class='add'>+					       bool egress)</div><div class='add'>+{</div><div class='add'>+	int type = FIELD_GET(AIROHA_FOE_IB1_BIND_PACKET_TYPE, hwe-&gt;ib1);</div><div class='add'>+	struct airoha_foe_ipv4_tuple *t;</div><div class='add'>+</div><div class='add'>+	switch (type) {</div><div class='add'>+	case PPE_PKT_TYPE_IPV4_HNAPT:</div><div class='add'>+		if (egress) {</div><div class='add'>+			t = &amp;hwe-&gt;ipv4.new_tuple;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		fallthrough;</div><div class='add'>+	case PPE_PKT_TYPE_IPV4_DSLITE:</div><div class='add'>+	case PPE_PKT_TYPE_IPV4_ROUTE:</div><div class='add'>+		t = &amp;hwe-&gt;ipv4.orig_tuple;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		WARN_ON_ONCE(1);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	t-&gt;src_ip = be32_to_cpu(data-&gt;v4.src_addr);</div><div class='add'>+	t-&gt;dest_ip = be32_to_cpu(data-&gt;v4.dst_addr);</div><div class='add'>+</div><div class='add'>+	if (type != PPE_PKT_TYPE_IPV4_ROUTE) {</div><div class='add'>+		t-&gt;src_port = be16_to_cpu(data-&gt;src_port);</div><div class='add'>+		t-&gt;dest_port = be16_to_cpu(data-&gt;dst_port);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_foe_entry_set_ipv6_tuple(struct airoha_foe_entry *hwe,</div><div class='add'>+					       struct airoha_flow_data *data)</div><div class='add'>+</div><div class='add'>+{</div><div class='add'>+	int type = FIELD_GET(AIROHA_FOE_IB1_BIND_PACKET_TYPE, hwe-&gt;ib1);</div><div class='add'>+	u32 *src, *dest;</div><div class='add'>+</div><div class='add'>+	switch (type) {</div><div class='add'>+	case PPE_PKT_TYPE_IPV6_ROUTE_5T:</div><div class='add'>+	case PPE_PKT_TYPE_IPV6_6RD:</div><div class='add'>+		hwe-&gt;ipv6.src_port = be16_to_cpu(data-&gt;src_port);</div><div class='add'>+		hwe-&gt;ipv6.dest_port = be16_to_cpu(data-&gt;dst_port);</div><div class='add'>+		fallthrough;</div><div class='add'>+	case PPE_PKT_TYPE_IPV6_ROUTE_3T:</div><div class='add'>+		src = hwe-&gt;ipv6.src_ip;</div><div class='add'>+		dest = hwe-&gt;ipv6.dest_ip;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		WARN_ON_ONCE(1);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ipv6_addr_be32_to_cpu(src, data-&gt;v6.src_addr.s6_addr32);</div><div class='add'>+	ipv6_addr_be32_to_cpu(dest, data-&gt;v6.dst_addr.s6_addr32);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 airoha_ppe_foe_get_entry_hash(struct airoha_ppe *ppe,</div><div class='add'>+					 struct airoha_foe_entry *hwe)</div><div class='add'>+{</div><div class='add'>+	int type = FIELD_GET(AIROHA_FOE_IB1_BIND_PACKET_TYPE, hwe-&gt;ib1);</div><div class='add'>+	u32 ppe_hash_mask = airoha_ppe_get_total_num_entries(ppe) - 1;</div><div class='add'>+	u32 hash, hv1, hv2, hv3;</div><div class='add'>+</div><div class='add'>+	switch (type) {</div><div class='add'>+	case PPE_PKT_TYPE_IPV4_ROUTE:</div><div class='add'>+	case PPE_PKT_TYPE_IPV4_HNAPT:</div><div class='add'>+		hv1 = hwe-&gt;ipv4.orig_tuple.ports;</div><div class='add'>+		hv2 = hwe-&gt;ipv4.orig_tuple.dest_ip;</div><div class='add'>+		hv3 = hwe-&gt;ipv4.orig_tuple.src_ip;</div><div class='add'>+		break;</div><div class='add'>+	case PPE_PKT_TYPE_IPV6_ROUTE_3T:</div><div class='add'>+	case PPE_PKT_TYPE_IPV6_ROUTE_5T:</div><div class='add'>+		hv1 = hwe-&gt;ipv6.src_ip[3] ^ hwe-&gt;ipv6.dest_ip[3];</div><div class='add'>+		hv1 ^= hwe-&gt;ipv6.ports;</div><div class='add'>+</div><div class='add'>+		hv2 = hwe-&gt;ipv6.src_ip[2] ^ hwe-&gt;ipv6.dest_ip[2];</div><div class='add'>+		hv2 ^= hwe-&gt;ipv6.dest_ip[0];</div><div class='add'>+</div><div class='add'>+		hv3 = hwe-&gt;ipv6.src_ip[1] ^ hwe-&gt;ipv6.dest_ip[1];</div><div class='add'>+		hv3 ^= hwe-&gt;ipv6.src_ip[0];</div><div class='add'>+		break;</div><div class='add'>+	case PPE_PKT_TYPE_BRIDGE: {</div><div class='add'>+		struct airoha_foe_mac_info *l2 = &amp;hwe-&gt;bridge.l2;</div><div class='add'>+</div><div class='add'>+		hv1 = l2-&gt;common.src_mac_hi &amp; 0xffff;</div><div class='add'>+		hv1 = hv1 &lt;&lt; 16 | l2-&gt;src_mac_lo;</div><div class='add'>+</div><div class='add'>+		hv2 = l2-&gt;common.dest_mac_lo;</div><div class='add'>+		hv2 = hv2 &lt;&lt; 16;</div><div class='add'>+		hv2 = hv2 | ((l2-&gt;common.src_mac_hi &amp; 0xffff0000) &gt;&gt; 16);</div><div class='add'>+</div><div class='add'>+		hv3 = l2-&gt;common.dest_mac_hi;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	case PPE_PKT_TYPE_IPV4_DSLITE:</div><div class='add'>+	case PPE_PKT_TYPE_IPV6_6RD:</div><div class='add'>+	default:</div><div class='add'>+		WARN_ON_ONCE(1);</div><div class='add'>+		return ppe_hash_mask;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hash = (hv1 &amp; hv2) | ((~hv1) &amp; hv3);</div><div class='add'>+	hash = (hash &gt;&gt; 24) | ((hash &amp; 0xffffff) &lt;&lt; 8);</div><div class='add'>+	hash ^= hv1 ^ hv2 ^ hv3;</div><div class='add'>+	hash ^= hash &gt;&gt; 16;</div><div class='add'>+	hash &amp;= ppe_hash_mask;</div><div class='add'>+</div><div class='add'>+	return hash;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_foe_get_flow_stats_index(struct airoha_ppe *ppe,</div><div class='add'>+					       u32 hash, u32 *index)</div><div class='add'>+{</div><div class='add'>+	int ppe_num_stats_entries;</div><div class='add'>+</div><div class='add'>+	ppe_num_stats_entries = airoha_ppe_get_total_num_stats_entries(ppe);</div><div class='add'>+	if (ppe_num_stats_entries &lt; 0)</div><div class='add'>+		return ppe_num_stats_entries;</div><div class='add'>+</div><div class='add'>+	*index = hash &gt;= ppe_num_stats_entries ? hash - PPE_STATS_NUM_ENTRIES</div><div class='add'>+					       : hash;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_ppe_foe_flow_stat_entry_reset(struct airoha_ppe *ppe,</div><div class='add'>+						 struct airoha_npu *npu,</div><div class='add'>+						 int index)</div><div class='add'>+{</div><div class='add'>+	memset_io(&amp;npu-&gt;stats[index], 0, sizeof(*npu-&gt;stats));</div><div class='add'>+	memset(&amp;ppe-&gt;foe_stats[index], 0, sizeof(*ppe-&gt;foe_stats));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_ppe_foe_flow_stats_reset(struct airoha_ppe *ppe,</div><div class='add'>+					    struct airoha_npu *npu)</div><div class='add'>+{</div><div class='add'>+	int i, ppe_num_stats_entries;</div><div class='add'>+</div><div class='add'>+	ppe_num_stats_entries = airoha_ppe_get_total_num_stats_entries(ppe);</div><div class='add'>+	if (ppe_num_stats_entries &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ppe_num_stats_entries; i++)</div><div class='add'>+		airoha_ppe_foe_flow_stat_entry_reset(ppe, npu, i);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_ppe_foe_flow_stats_update(struct airoha_ppe *ppe,</div><div class='add'>+					     struct airoha_npu *npu,</div><div class='add'>+					     struct airoha_foe_entry *hwe,</div><div class='add'>+					     u32 hash)</div><div class='add'>+{</div><div class='add'>+	int type = FIELD_GET(AIROHA_FOE_IB1_BIND_PACKET_TYPE, hwe-&gt;ib1);</div><div class='add'>+	u32 index, pse_port, val, *data, *ib2, *meter;</div><div class='add'>+	int ppe_num_stats_entries;</div><div class='add'>+	u8 nbq;</div><div class='add'>+</div><div class='add'>+	ppe_num_stats_entries = airoha_ppe_get_total_num_stats_entries(ppe);</div><div class='add'>+	if (ppe_num_stats_entries &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (airoha_ppe_foe_get_flow_stats_index(ppe, hash, &amp;index))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (index &gt;= ppe_num_stats_entries)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (type == PPE_PKT_TYPE_BRIDGE) {</div><div class='add'>+		data = &amp;hwe-&gt;bridge.data;</div><div class='add'>+		ib2 = &amp;hwe-&gt;bridge.ib2;</div><div class='add'>+		meter = &amp;hwe-&gt;bridge.l2.meter;</div><div class='add'>+	} else if (type &gt;= PPE_PKT_TYPE_IPV6_ROUTE_3T) {</div><div class='add'>+		data = &amp;hwe-&gt;ipv6.data;</div><div class='add'>+		ib2 = &amp;hwe-&gt;ipv6.ib2;</div><div class='add'>+		meter = &amp;hwe-&gt;ipv6.meter;</div><div class='add'>+	} else {</div><div class='add'>+		data = &amp;hwe-&gt;ipv4.data;</div><div class='add'>+		ib2 = &amp;hwe-&gt;ipv4.ib2;</div><div class='add'>+		meter = &amp;hwe-&gt;ipv4.l2.meter;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pse_port = FIELD_GET(AIROHA_FOE_IB2_PSE_PORT, *ib2);</div><div class='add'>+	if (pse_port == FE_PSE_PORT_CDM4)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	airoha_ppe_foe_flow_stat_entry_reset(ppe, npu, index);</div><div class='add'>+</div><div class='add'>+	val = FIELD_GET(AIROHA_FOE_CHANNEL | AIROHA_FOE_QID, *data);</div><div class='add'>+	*data = (*data &amp; ~AIROHA_FOE_ACTDP) |</div><div class='add'>+		FIELD_PREP(AIROHA_FOE_ACTDP, val);</div><div class='add'>+</div><div class='add'>+	val = *ib2 &amp; (AIROHA_FOE_IB2_NBQ | AIROHA_FOE_IB2_PSE_PORT |</div><div class='add'>+		      AIROHA_FOE_IB2_PSE_QOS | AIROHA_FOE_IB2_FAST_PATH);</div><div class='add'>+	*meter |= FIELD_PREP(AIROHA_FOE_TUNNEL_MTU, val);</div><div class='add'>+</div><div class='add'>+	nbq = pse_port == 1 ? 6 : 5;</div><div class='add'>+	*ib2 &amp;= ~(AIROHA_FOE_IB2_NBQ | AIROHA_FOE_IB2_PSE_PORT |</div><div class='add'>+		  AIROHA_FOE_IB2_PSE_QOS);</div><div class='add'>+	*ib2 |= FIELD_PREP(AIROHA_FOE_IB2_PSE_PORT, 6) |</div><div class='add'>+		FIELD_PREP(AIROHA_FOE_IB2_NBQ, nbq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct airoha_foe_entry *</div><div class='add'>+airoha_ppe_foe_get_entry_locked(struct airoha_ppe *ppe, u32 hash)</div><div class='add'>+{</div><div class='add'>+	u32 sram_num_entries = airoha_ppe_get_total_sram_num_entries(ppe);</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;ppe_lock);</div><div class='add'>+</div><div class='add'>+	if (hash &lt; sram_num_entries) {</div><div class='add'>+		u32 *hwe = ppe-&gt;foe + hash * sizeof(struct airoha_foe_entry);</div><div class='add'>+		bool ppe2 = hash &gt;= PPE_SRAM_NUM_ENTRIES;</div><div class='add'>+		struct airoha_eth *eth = ppe-&gt;eth;</div><div class='add'>+		u32 val;</div><div class='add'>+		int i;</div><div class='add'>+</div><div class='add'>+		airoha_fe_wr(ppe-&gt;eth, REG_PPE_RAM_CTRL(ppe2),</div><div class='add'>+			     FIELD_PREP(PPE_SRAM_CTRL_ENTRY_MASK, hash) |</div><div class='add'>+			     PPE_SRAM_CTRL_REQ_MASK);</div><div class='add'>+		if (read_poll_timeout_atomic(airoha_fe_rr, val,</div><div class='add'>+					     val &amp; PPE_SRAM_CTRL_ACK_MASK,</div><div class='add'>+					     10, 100, false, eth,</div><div class='add'>+					     REG_PPE_RAM_CTRL(ppe2)))</div><div class='add'>+			return NULL;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; sizeof(struct airoha_foe_entry) / sizeof(*hwe);</div><div class='add'>+		     i++)</div><div class='add'>+			hwe[i] = airoha_fe_rr(eth,</div><div class='add'>+					      REG_PPE_RAM_ENTRY(ppe2, i));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ppe-&gt;foe + hash * sizeof(struct airoha_foe_entry);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct airoha_foe_entry *airoha_ppe_foe_get_entry(struct airoha_ppe *ppe,</div><div class='add'>+						  u32 hash)</div><div class='add'>+{</div><div class='add'>+	struct airoha_foe_entry *hwe;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;ppe_lock);</div><div class='add'>+	hwe = airoha_ppe_foe_get_entry_locked(ppe, hash);</div><div class='add'>+	spin_unlock_bh(&amp;ppe_lock);</div><div class='add'>+</div><div class='add'>+	return hwe;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool airoha_ppe_foe_compare_entry(struct airoha_flow_table_entry *e,</div><div class='add'>+					 struct airoha_foe_entry *hwe)</div><div class='add'>+{</div><div class='add'>+	int type = FIELD_GET(AIROHA_FOE_IB1_BIND_PACKET_TYPE, e-&gt;data.ib1);</div><div class='add'>+	int len;</div><div class='add'>+</div><div class='add'>+	if ((hwe-&gt;ib1 ^ e-&gt;data.ib1) &amp; AIROHA_FOE_IB1_BIND_UDP)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (type &gt; PPE_PKT_TYPE_IPV4_DSLITE)</div><div class='add'>+		len = offsetof(struct airoha_foe_entry, ipv6.data);</div><div class='add'>+	else</div><div class='add'>+		len = offsetof(struct airoha_foe_entry, ipv4.ib2);</div><div class='add'>+</div><div class='add'>+	return !memcmp(&amp;e-&gt;data.d, &amp;hwe-&gt;d, len - sizeof(hwe-&gt;ib1));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_foe_commit_sram_entry(struct airoha_ppe *ppe, u32 hash)</div><div class='add'>+{</div><div class='add'>+	struct airoha_foe_entry *hwe = ppe-&gt;foe + hash * sizeof(*hwe);</div><div class='add'>+	bool ppe2 = hash &gt;= PPE_SRAM_NUM_ENTRIES;</div><div class='add'>+	u32 *ptr = (u32 *)hwe, val;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; sizeof(*hwe) / sizeof(*ptr); i++)</div><div class='add'>+		airoha_fe_wr(ppe-&gt;eth, REG_PPE_RAM_ENTRY(ppe2, i), ptr[i]);</div><div class='add'>+</div><div class='add'>+	wmb();</div><div class='add'>+	airoha_fe_wr(ppe-&gt;eth, REG_PPE_RAM_CTRL(ppe2),</div><div class='add'>+		     FIELD_PREP(PPE_SRAM_CTRL_ENTRY_MASK, hash) |</div><div class='add'>+		     PPE_SRAM_CTRL_WR_MASK | PPE_SRAM_CTRL_REQ_MASK);</div><div class='add'>+</div><div class='add'>+	return read_poll_timeout_atomic(airoha_fe_rr, val,</div><div class='add'>+					val &amp; PPE_SRAM_CTRL_ACK_MASK,</div><div class='add'>+					10, 100, false, ppe-&gt;eth,</div><div class='add'>+					REG_PPE_RAM_CTRL(ppe2));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_foe_commit_entry(struct airoha_ppe *ppe,</div><div class='add'>+				       struct airoha_foe_entry *e,</div><div class='add'>+				       u32 hash, bool rx_wlan)</div><div class='add'>+{</div><div class='add'>+	u32 sram_num_entries = airoha_ppe_get_total_sram_num_entries(ppe);</div><div class='add'>+	struct airoha_foe_entry *hwe = ppe-&gt;foe + hash * sizeof(*hwe);</div><div class='add'>+	u32 ts = airoha_ppe_get_timestamp(ppe);</div><div class='add'>+	struct airoha_eth *eth = ppe-&gt;eth;</div><div class='add'>+	struct airoha_npu *npu;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;hwe-&gt;d, &amp;e-&gt;d, sizeof(*hwe) - sizeof(hwe-&gt;ib1));</div><div class='add'>+	wmb();</div><div class='add'>+</div><div class='add'>+	e-&gt;ib1 &amp;= ~AIROHA_FOE_IB1_BIND_TIMESTAMP;</div><div class='add'>+	e-&gt;ib1 |= FIELD_PREP(AIROHA_FOE_IB1_BIND_TIMESTAMP, ts);</div><div class='add'>+	hwe-&gt;ib1 = e-&gt;ib1;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+</div><div class='add'>+	npu = rcu_dereference(eth-&gt;npu);</div><div class='add'>+	if (!npu) {</div><div class='add'>+		err = -ENODEV;</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!rx_wlan)</div><div class='add'>+		airoha_ppe_foe_flow_stats_update(ppe, npu, hwe, hash);</div><div class='add'>+</div><div class='add'>+	if (hash &lt; sram_num_entries)</div><div class='add'>+		err = airoha_ppe_foe_commit_sram_entry(ppe, hash);</div><div class='add'>+unlock:</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_ppe_foe_remove_flow(struct airoha_ppe *ppe,</div><div class='add'>+				       struct airoha_flow_table_entry *e)</div><div class='add'>+{</div><div class='add'>+	lockdep_assert_held(&amp;ppe_lock);</div><div class='add'>+</div><div class='add'>+	hlist_del_init(&amp;e-&gt;list);</div><div class='add'>+	if (e-&gt;hash != 0xffff) {</div><div class='add'>+		e-&gt;data.ib1 &amp;= ~AIROHA_FOE_IB1_BIND_STATE;</div><div class='add'>+		e-&gt;data.ib1 |= FIELD_PREP(AIROHA_FOE_IB1_BIND_STATE,</div><div class='add'>+					  AIROHA_FOE_STATE_INVALID);</div><div class='add'>+		airoha_ppe_foe_commit_entry(ppe, &amp;e-&gt;data, e-&gt;hash, false);</div><div class='add'>+		e-&gt;hash = 0xffff;</div><div class='add'>+	}</div><div class='add'>+	if (e-&gt;type == FLOW_TYPE_L2_SUBFLOW) {</div><div class='add'>+		hlist_del_init(&amp;e-&gt;l2_subflow_node);</div><div class='add'>+		kfree(e);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_ppe_foe_remove_l2_flow(struct airoha_ppe *ppe,</div><div class='add'>+					  struct airoha_flow_table_entry *e)</div><div class='add'>+{</div><div class='add'>+	struct hlist_head *head = &amp;e-&gt;l2_flows;</div><div class='add'>+	struct hlist_node *n;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;ppe_lock);</div><div class='add'>+</div><div class='add'>+	rhashtable_remove_fast(&amp;ppe-&gt;l2_flows, &amp;e-&gt;l2_node,</div><div class='add'>+			       airoha_l2_flow_table_params);</div><div class='add'>+	hlist_for_each_entry_safe(e, n, head, l2_subflow_node)</div><div class='add'>+		airoha_ppe_foe_remove_flow(ppe, e);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_ppe_foe_flow_remove_entry(struct airoha_ppe *ppe,</div><div class='add'>+					     struct airoha_flow_table_entry *e)</div><div class='add'>+{</div><div class='add'>+	spin_lock_bh(&amp;ppe_lock);</div><div class='add'>+</div><div class='add'>+	if (e-&gt;type == FLOW_TYPE_L2)</div><div class='add'>+		airoha_ppe_foe_remove_l2_flow(ppe, e);</div><div class='add'>+	else</div><div class='add'>+		airoha_ppe_foe_remove_flow(ppe, e);</div><div class='add'>+</div><div class='add'>+	spin_unlock_bh(&amp;ppe_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+airoha_ppe_foe_commit_subflow_entry(struct airoha_ppe *ppe,</div><div class='add'>+				    struct airoha_flow_table_entry *e,</div><div class='add'>+				    u32 hash, bool rx_wlan)</div><div class='add'>+{</div><div class='add'>+	u32 mask = AIROHA_FOE_IB1_BIND_PACKET_TYPE | AIROHA_FOE_IB1_BIND_UDP;</div><div class='add'>+	struct airoha_foe_entry *hwe_p, hwe;</div><div class='add'>+	struct airoha_flow_table_entry *f;</div><div class='add'>+	int type;</div><div class='add'>+</div><div class='add'>+	hwe_p = airoha_ppe_foe_get_entry_locked(ppe, hash);</div><div class='add'>+	if (!hwe_p)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	f = kzalloc(sizeof(*f), GFP_ATOMIC);</div><div class='add'>+	if (!f)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	hlist_add_head(&amp;f-&gt;l2_subflow_node, &amp;e-&gt;l2_flows);</div><div class='add'>+	f-&gt;type = FLOW_TYPE_L2_SUBFLOW;</div><div class='add'>+	f-&gt;hash = hash;</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;hwe, hwe_p, sizeof(*hwe_p));</div><div class='add'>+	hwe.ib1 = (hwe.ib1 &amp; mask) | (e-&gt;data.ib1 &amp; ~mask);</div><div class='add'>+</div><div class='add'>+	type = FIELD_GET(AIROHA_FOE_IB1_BIND_PACKET_TYPE, hwe.ib1);</div><div class='add'>+	if (type &gt;= PPE_PKT_TYPE_IPV6_ROUTE_3T) {</div><div class='add'>+		memcpy(&amp;hwe.ipv6.l2, &amp;e-&gt;data.bridge.l2, sizeof(hwe.ipv6.l2));</div><div class='add'>+		hwe.ipv6.ib2 = e-&gt;data.bridge.ib2;</div><div class='add'>+		/* setting smac_id to 0xf instruct the hw to keep original</div><div class='add'>+		 * source mac address</div><div class='add'>+		 */</div><div class='add'>+		hwe.ipv6.l2.src_mac_hi = FIELD_PREP(AIROHA_FOE_MAC_SMAC_ID,</div><div class='add'>+						    0xf);</div><div class='add'>+	} else {</div><div class='add'>+		memcpy(&amp;hwe.bridge.l2, &amp;e-&gt;data.bridge.l2,</div><div class='add'>+		       sizeof(hwe.bridge.l2));</div><div class='add'>+		hwe.bridge.ib2 = e-&gt;data.bridge.ib2;</div><div class='add'>+		if (type == PPE_PKT_TYPE_IPV4_HNAPT)</div><div class='add'>+			memcpy(&amp;hwe.ipv4.new_tuple, &amp;hwe.ipv4.orig_tuple,</div><div class='add'>+			       sizeof(hwe.ipv4.new_tuple));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hwe.bridge.data = e-&gt;data.bridge.data;</div><div class='add'>+	airoha_ppe_foe_commit_entry(ppe, &amp;hwe, hash, rx_wlan);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_ppe_foe_insert_entry(struct airoha_ppe *ppe,</div><div class='add'>+					struct sk_buff *skb,</div><div class='add'>+					u32 hash, bool rx_wlan)</div><div class='add'>+{</div><div class='add'>+	struct airoha_flow_table_entry *e;</div><div class='add'>+	struct airoha_foe_bridge br = {};</div><div class='add'>+	struct airoha_foe_entry *hwe;</div><div class='add'>+	bool commit_done = false;</div><div class='add'>+	struct hlist_node *n;</div><div class='add'>+	u32 index, state;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;ppe_lock);</div><div class='add'>+</div><div class='add'>+	hwe = airoha_ppe_foe_get_entry_locked(ppe, hash);</div><div class='add'>+	if (!hwe)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	state = FIELD_GET(AIROHA_FOE_IB1_BIND_STATE, hwe-&gt;ib1);</div><div class='add'>+	if (state == AIROHA_FOE_STATE_BIND)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	index = airoha_ppe_foe_get_entry_hash(ppe, hwe);</div><div class='add'>+	hlist_for_each_entry_safe(e, n, &amp;ppe-&gt;foe_flow[index], list) {</div><div class='add'>+		if (e-&gt;type == FLOW_TYPE_L2_SUBFLOW) {</div><div class='add'>+			state = FIELD_GET(AIROHA_FOE_IB1_BIND_STATE, hwe-&gt;ib1);</div><div class='add'>+			if (state != AIROHA_FOE_STATE_BIND) {</div><div class='add'>+				e-&gt;hash = 0xffff;</div><div class='add'>+				airoha_ppe_foe_remove_flow(ppe, e);</div><div class='add'>+			}</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!airoha_ppe_foe_compare_entry(e, hwe))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		airoha_ppe_foe_commit_entry(ppe, &amp;e-&gt;data, hash, rx_wlan);</div><div class='add'>+		commit_done = true;</div><div class='add'>+		e-&gt;hash = hash;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (commit_done)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	airoha_ppe_foe_set_bridge_addrs(&amp;br, eth_hdr(skb));</div><div class='add'>+	e = rhashtable_lookup_fast(&amp;ppe-&gt;l2_flows, &amp;br,</div><div class='add'>+				   airoha_l2_flow_table_params);</div><div class='add'>+	if (e)</div><div class='add'>+		airoha_ppe_foe_commit_subflow_entry(ppe, e, hash, rx_wlan);</div><div class='add'>+unlock:</div><div class='add'>+	spin_unlock_bh(&amp;ppe_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+airoha_ppe_foe_l2_flow_commit_entry(struct airoha_ppe *ppe,</div><div class='add'>+				    struct airoha_flow_table_entry *e)</div><div class='add'>+{</div><div class='add'>+	struct airoha_flow_table_entry *prev;</div><div class='add'>+</div><div class='add'>+	e-&gt;type = FLOW_TYPE_L2;</div><div class='add'>+	prev = rhashtable_lookup_get_insert_fast(&amp;ppe-&gt;l2_flows, &amp;e-&gt;l2_node,</div><div class='add'>+						 airoha_l2_flow_table_params);</div><div class='add'>+	if (!prev)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(prev))</div><div class='add'>+		return PTR_ERR(prev);</div><div class='add'>+</div><div class='add'>+	return rhashtable_replace_fast(&amp;ppe-&gt;l2_flows, &amp;prev-&gt;l2_node,</div><div class='add'>+				       &amp;e-&gt;l2_node,</div><div class='add'>+				       airoha_l2_flow_table_params);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_foe_flow_commit_entry(struct airoha_ppe *ppe,</div><div class='add'>+					    struct airoha_flow_table_entry *e)</div><div class='add'>+{</div><div class='add'>+	int type = FIELD_GET(AIROHA_FOE_IB1_BIND_PACKET_TYPE, e-&gt;data.ib1);</div><div class='add'>+	u32 hash;</div><div class='add'>+</div><div class='add'>+	if (type == PPE_PKT_TYPE_BRIDGE)</div><div class='add'>+		return airoha_ppe_foe_l2_flow_commit_entry(ppe, e);</div><div class='add'>+</div><div class='add'>+	hash = airoha_ppe_foe_get_entry_hash(ppe, &amp;e-&gt;data);</div><div class='add'>+	e-&gt;type = FLOW_TYPE_L4;</div><div class='add'>+	e-&gt;hash = 0xffff;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;ppe_lock);</div><div class='add'>+	hlist_add_head(&amp;e-&gt;list, &amp;ppe-&gt;foe_flow[hash]);</div><div class='add'>+	spin_unlock_bh(&amp;ppe_lock);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_get_entry_idle_time(struct airoha_ppe *ppe, u32 ib1)</div><div class='add'>+{</div><div class='add'>+	u32 state = FIELD_GET(AIROHA_FOE_IB1_BIND_STATE, ib1);</div><div class='add'>+	u32 ts, ts_mask, now = airoha_ppe_get_timestamp(ppe);</div><div class='add'>+	int idle;</div><div class='add'>+</div><div class='add'>+	if (state == AIROHA_FOE_STATE_BIND) {</div><div class='add'>+		ts = FIELD_GET(AIROHA_FOE_IB1_BIND_TIMESTAMP, ib1);</div><div class='add'>+		ts_mask = AIROHA_FOE_IB1_BIND_TIMESTAMP;</div><div class='add'>+	} else {</div><div class='add'>+		ts = FIELD_GET(AIROHA_FOE_IB1_UNBIND_TIMESTAMP, ib1);</div><div class='add'>+		now = FIELD_GET(AIROHA_FOE_IB1_UNBIND_TIMESTAMP, now);</div><div class='add'>+		ts_mask = AIROHA_FOE_IB1_UNBIND_TIMESTAMP;</div><div class='add'>+	}</div><div class='add'>+	idle = now - ts;</div><div class='add'>+</div><div class='add'>+	return idle &lt; 0 ? idle + ts_mask + 1 : idle;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+airoha_ppe_foe_flow_l2_entry_update(struct airoha_ppe *ppe,</div><div class='add'>+				    struct airoha_flow_table_entry *e)</div><div class='add'>+{</div><div class='add'>+	int min_idle = airoha_ppe_get_entry_idle_time(ppe, e-&gt;data.ib1);</div><div class='add'>+	struct airoha_flow_table_entry *iter;</div><div class='add'>+	struct hlist_node *n;</div><div class='add'>+</div><div class='add'>+	lockdep_assert_held(&amp;ppe_lock);</div><div class='add'>+</div><div class='add'>+	hlist_for_each_entry_safe(iter, n, &amp;e-&gt;l2_flows, l2_subflow_node) {</div><div class='add'>+		struct airoha_foe_entry *hwe;</div><div class='add'>+		u32 ib1, state;</div><div class='add'>+		int idle;</div><div class='add'>+</div><div class='add'>+		hwe = airoha_ppe_foe_get_entry_locked(ppe, iter-&gt;hash);</div><div class='add'>+		if (!hwe)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		ib1 = READ_ONCE(hwe-&gt;ib1);</div><div class='add'>+		state = FIELD_GET(AIROHA_FOE_IB1_BIND_STATE, ib1);</div><div class='add'>+		if (state != AIROHA_FOE_STATE_BIND) {</div><div class='add'>+			iter-&gt;hash = 0xffff;</div><div class='add'>+			airoha_ppe_foe_remove_flow(ppe, iter);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		idle = airoha_ppe_get_entry_idle_time(ppe, ib1);</div><div class='add'>+		if (idle &gt;= min_idle)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		min_idle = idle;</div><div class='add'>+		e-&gt;data.ib1 &amp;= ~AIROHA_FOE_IB1_BIND_TIMESTAMP;</div><div class='add'>+		e-&gt;data.ib1 |= ib1 &amp; AIROHA_FOE_IB1_BIND_TIMESTAMP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void airoha_ppe_foe_flow_entry_update(struct airoha_ppe *ppe,</div><div class='add'>+					     struct airoha_flow_table_entry *e)</div><div class='add'>+{</div><div class='add'>+	struct airoha_foe_entry *hwe_p, hwe = {};</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;ppe_lock);</div><div class='add'>+</div><div class='add'>+	if (e-&gt;type == FLOW_TYPE_L2) {</div><div class='add'>+		airoha_ppe_foe_flow_l2_entry_update(ppe, e);</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (e-&gt;hash == 0xffff)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	hwe_p = airoha_ppe_foe_get_entry_locked(ppe, e-&gt;hash);</div><div class='add'>+	if (!hwe_p)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;hwe, hwe_p, sizeof(*hwe_p));</div><div class='add'>+	if (!airoha_ppe_foe_compare_entry(e, &amp;hwe)) {</div><div class='add'>+		e-&gt;hash = 0xffff;</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	e-&gt;data.ib1 = hwe.ib1;</div><div class='add'>+unlock:</div><div class='add'>+	spin_unlock_bh(&amp;ppe_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_entry_idle_time(struct airoha_ppe *ppe,</div><div class='add'>+				      struct airoha_flow_table_entry *e)</div><div class='add'>+{</div><div class='add'>+	airoha_ppe_foe_flow_entry_update(ppe, e);</div><div class='add'>+</div><div class='add'>+	return airoha_ppe_get_entry_idle_time(ppe, e-&gt;data.ib1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_flow_offload_replace(struct airoha_eth *eth,</div><div class='add'>+					   struct flow_cls_offload *f)</div><div class='add'>+{</div><div class='add'>+	struct flow_rule *rule = flow_cls_offload_flow_rule(f);</div><div class='add'>+	struct airoha_flow_table_entry *e;</div><div class='add'>+	struct airoha_flow_data data = {};</div><div class='add'>+	struct net_device *odev = NULL;</div><div class='add'>+	struct flow_action_entry *act;</div><div class='add'>+	struct airoha_foe_entry hwe;</div><div class='add'>+	int err, i, offload_type;</div><div class='add'>+	u16 addr_type = 0;</div><div class='add'>+	u8 l4proto = 0;</div><div class='add'>+</div><div class='add'>+	if (rhashtable_lookup(&amp;eth-&gt;flow_table, &amp;f-&gt;cookie,</div><div class='add'>+			      airoha_flow_table_params))</div><div class='add'>+		return -EEXIST;</div><div class='add'>+</div><div class='add'>+	if (!flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_META))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_CONTROL)) {</div><div class='add'>+		struct flow_match_control match;</div><div class='add'>+</div><div class='add'>+		flow_rule_match_control(rule, &amp;match);</div><div class='add'>+		addr_type = match.key-&gt;addr_type;</div><div class='add'>+		if (flow_rule_has_control_flags(match.mask-&gt;flags,</div><div class='add'>+						f-&gt;common.extack))</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+	} else {</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC)) {</div><div class='add'>+		struct flow_match_basic match;</div><div class='add'>+</div><div class='add'>+		flow_rule_match_basic(rule, &amp;match);</div><div class='add'>+		l4proto = match.key-&gt;ip_proto;</div><div class='add'>+	} else {</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (addr_type) {</div><div class='add'>+	case 0:</div><div class='add'>+		offload_type = PPE_PKT_TYPE_BRIDGE;</div><div class='add'>+		if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {</div><div class='add'>+			struct flow_match_eth_addrs match;</div><div class='add'>+</div><div class='add'>+			flow_rule_match_eth_addrs(rule, &amp;match);</div><div class='add'>+			memcpy(data.eth.h_dest, match.key-&gt;dst, ETH_ALEN);</div><div class='add'>+			memcpy(data.eth.h_source, match.key-&gt;src, ETH_ALEN);</div><div class='add'>+		} else {</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case FLOW_DISSECTOR_KEY_IPV4_ADDRS:</div><div class='add'>+		offload_type = PPE_PKT_TYPE_IPV4_HNAPT;</div><div class='add'>+		break;</div><div class='add'>+	case FLOW_DISSECTOR_KEY_IPV6_ADDRS:</div><div class='add'>+		offload_type = PPE_PKT_TYPE_IPV6_ROUTE_5T;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	flow_action_for_each(i, act, &amp;rule-&gt;action) {</div><div class='add'>+		switch (act-&gt;id) {</div><div class='add'>+		case FLOW_ACTION_MANGLE:</div><div class='add'>+			if (offload_type == PPE_PKT_TYPE_BRIDGE)</div><div class='add'>+				return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+			if (act-&gt;mangle.htype == FLOW_ACT_MANGLE_HDR_TYPE_ETH)</div><div class='add'>+				airoha_ppe_flow_mangle_eth(act, &amp;data.eth);</div><div class='add'>+			break;</div><div class='add'>+		case FLOW_ACTION_REDIRECT:</div><div class='add'>+			odev = act-&gt;dev;</div><div class='add'>+			break;</div><div class='add'>+		case FLOW_ACTION_CSUM:</div><div class='add'>+			break;</div><div class='add'>+		case FLOW_ACTION_VLAN_PUSH:</div><div class='add'>+			if (data.vlan.num == 2 ||</div><div class='add'>+			    act-&gt;vlan.proto != htons(ETH_P_8021Q))</div><div class='add'>+				return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+			data.vlan.hdr[data.vlan.num].id = act-&gt;vlan.vid;</div><div class='add'>+			data.vlan.hdr[data.vlan.num].proto = act-&gt;vlan.proto;</div><div class='add'>+			data.vlan.num++;</div><div class='add'>+			break;</div><div class='add'>+		case FLOW_ACTION_VLAN_POP:</div><div class='add'>+			break;</div><div class='add'>+		case FLOW_ACTION_PPPOE_PUSH:</div><div class='add'>+			if (data.pppoe.num == 1 || data.vlan.num == 2)</div><div class='add'>+				return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+			data.pppoe.sid = act-&gt;pppoe.sid;</div><div class='add'>+			data.pppoe.num++;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!is_valid_ether_addr(data.eth.h_source) ||</div><div class='add'>+	    !is_valid_ether_addr(data.eth.h_dest))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	err = airoha_ppe_foe_entry_prepare(eth, &amp;hwe, odev, offload_type,</div><div class='add'>+					   &amp;data, l4proto);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_PORTS)) {</div><div class='add'>+		struct flow_match_ports ports;</div><div class='add'>+</div><div class='add'>+		if (offload_type == PPE_PKT_TYPE_BRIDGE)</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+		flow_rule_match_ports(rule, &amp;ports);</div><div class='add'>+		data.src_port = ports.key-&gt;src;</div><div class='add'>+		data.dst_port = ports.key-&gt;dst;</div><div class='add'>+	} else if (offload_type != PPE_PKT_TYPE_BRIDGE) {</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {</div><div class='add'>+		struct flow_match_ipv4_addrs addrs;</div><div class='add'>+</div><div class='add'>+		flow_rule_match_ipv4_addrs(rule, &amp;addrs);</div><div class='add'>+		data.v4.src_addr = addrs.key-&gt;src;</div><div class='add'>+		data.v4.dst_addr = addrs.key-&gt;dst;</div><div class='add'>+		airoha_ppe_foe_entry_set_ipv4_tuple(&amp;hwe, &amp;data, false);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {</div><div class='add'>+		struct flow_match_ipv6_addrs addrs;</div><div class='add'>+</div><div class='add'>+		flow_rule_match_ipv6_addrs(rule, &amp;addrs);</div><div class='add'>+</div><div class='add'>+		data.v6.src_addr = addrs.key-&gt;src;</div><div class='add'>+		data.v6.dst_addr = addrs.key-&gt;dst;</div><div class='add'>+		airoha_ppe_foe_entry_set_ipv6_tuple(&amp;hwe, &amp;data);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	flow_action_for_each(i, act, &amp;rule-&gt;action) {</div><div class='add'>+		if (act-&gt;id != FLOW_ACTION_MANGLE)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (offload_type == PPE_PKT_TYPE_BRIDGE)</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+		switch (act-&gt;mangle.htype) {</div><div class='add'>+		case FLOW_ACT_MANGLE_HDR_TYPE_TCP:</div><div class='add'>+		case FLOW_ACT_MANGLE_HDR_TYPE_UDP:</div><div class='add'>+			err = airoha_ppe_flow_mangle_ports(act, &amp;data);</div><div class='add'>+			break;</div><div class='add'>+		case FLOW_ACT_MANGLE_HDR_TYPE_IP4:</div><div class='add'>+			err = airoha_ppe_flow_mangle_ipv4(act, &amp;data);</div><div class='add'>+			break;</div><div class='add'>+		case FLOW_ACT_MANGLE_HDR_TYPE_ETH:</div><div class='add'>+			/* handled earlier */</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {</div><div class='add'>+		err = airoha_ppe_foe_entry_set_ipv4_tuple(&amp;hwe, &amp;data, true);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	e = kzalloc(sizeof(*e), GFP_KERNEL);</div><div class='add'>+	if (!e)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	e-&gt;cookie = f-&gt;cookie;</div><div class='add'>+	memcpy(&amp;e-&gt;data, &amp;hwe, sizeof(e-&gt;data));</div><div class='add'>+</div><div class='add'>+	err = airoha_ppe_foe_flow_commit_entry(eth-&gt;ppe, e);</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_entry;</div><div class='add'>+</div><div class='add'>+	err = rhashtable_insert_fast(&amp;eth-&gt;flow_table, &amp;e-&gt;node,</div><div class='add'>+				     airoha_flow_table_params);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto remove_foe_entry;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+remove_foe_entry:</div><div class='add'>+	airoha_ppe_foe_flow_remove_entry(eth-&gt;ppe, e);</div><div class='add'>+free_entry:</div><div class='add'>+	kfree(e);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_flow_offload_destroy(struct airoha_eth *eth,</div><div class='add'>+					   struct flow_cls_offload *f)</div><div class='add'>+{</div><div class='add'>+	struct airoha_flow_table_entry *e;</div><div class='add'>+</div><div class='add'>+	e = rhashtable_lookup(&amp;eth-&gt;flow_table, &amp;f-&gt;cookie,</div><div class='add'>+			      airoha_flow_table_params);</div><div class='add'>+	if (!e)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	airoha_ppe_foe_flow_remove_entry(eth-&gt;ppe, e);</div><div class='add'>+	rhashtable_remove_fast(&amp;eth-&gt;flow_table, &amp;e-&gt;node,</div><div class='add'>+			       airoha_flow_table_params);</div><div class='add'>+	kfree(e);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void airoha_ppe_foe_entry_get_stats(struct airoha_ppe *ppe, u32 hash,</div><div class='add'>+				    struct airoha_foe_stats64 *stats)</div><div class='add'>+{</div><div class='add'>+	struct airoha_eth *eth = ppe-&gt;eth;</div><div class='add'>+	int ppe_num_stats_entries;</div><div class='add'>+	struct airoha_npu *npu;</div><div class='add'>+	u32 index;</div><div class='add'>+</div><div class='add'>+	ppe_num_stats_entries = airoha_ppe_get_total_num_stats_entries(ppe);</div><div class='add'>+	if (ppe_num_stats_entries &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (airoha_ppe_foe_get_flow_stats_index(ppe, hash, &amp;index))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (index &gt;= ppe_num_stats_entries)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+</div><div class='add'>+	npu = rcu_dereference(eth-&gt;npu);</div><div class='add'>+	if (npu) {</div><div class='add'>+		u64 packets = ppe-&gt;foe_stats[index].packets;</div><div class='add'>+		u64 bytes = ppe-&gt;foe_stats[index].bytes;</div><div class='add'>+		struct airoha_foe_stats npu_stats;</div><div class='add'>+</div><div class='add'>+		memcpy_fromio(&amp;npu_stats, &amp;npu-&gt;stats[index],</div><div class='add'>+			      sizeof(*npu-&gt;stats));</div><div class='add'>+		stats-&gt;packets = packets &lt;&lt; 32 | npu_stats.packets;</div><div class='add'>+		stats-&gt;bytes = bytes &lt;&lt; 32 | npu_stats.bytes;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_flow_offload_stats(struct airoha_eth *eth,</div><div class='add'>+					 struct flow_cls_offload *f)</div><div class='add'>+{</div><div class='add'>+	struct airoha_flow_table_entry *e;</div><div class='add'>+	u32 idle;</div><div class='add'>+</div><div class='add'>+	e = rhashtable_lookup(&amp;eth-&gt;flow_table, &amp;f-&gt;cookie,</div><div class='add'>+			      airoha_flow_table_params);</div><div class='add'>+	if (!e)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	idle = airoha_ppe_entry_idle_time(eth-&gt;ppe, e);</div><div class='add'>+	f-&gt;stats.lastused = jiffies - idle * HZ;</div><div class='add'>+</div><div class='add'>+	if (e-&gt;hash != 0xffff) {</div><div class='add'>+		struct airoha_foe_stats64 stats = {};</div><div class='add'>+</div><div class='add'>+		airoha_ppe_foe_entry_get_stats(eth-&gt;ppe, e-&gt;hash, &amp;stats);</div><div class='add'>+		f-&gt;stats.pkts += (stats.packets - e-&gt;stats.packets);</div><div class='add'>+		f-&gt;stats.bytes += (stats.bytes - e-&gt;stats.bytes);</div><div class='add'>+		e-&gt;stats = stats;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_flow_offload_cmd(struct airoha_eth *eth,</div><div class='add'>+				       struct flow_cls_offload *f)</div><div class='add'>+{</div><div class='add'>+	switch (f-&gt;command) {</div><div class='add'>+	case FLOW_CLS_REPLACE:</div><div class='add'>+		return airoha_ppe_flow_offload_replace(eth, f);</div><div class='add'>+	case FLOW_CLS_DESTROY:</div><div class='add'>+		return airoha_ppe_flow_offload_destroy(eth, f);</div><div class='add'>+	case FLOW_CLS_STATS:</div><div class='add'>+		return airoha_ppe_flow_offload_stats(eth, f);</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_flush_sram_entries(struct airoha_ppe *ppe)</div><div class='add'>+{</div><div class='add'>+	u32 sram_num_entries = airoha_ppe_get_total_sram_num_entries(ppe);</div><div class='add'>+	struct airoha_foe_entry *hwe = ppe-&gt;foe;</div><div class='add'>+	int i, err = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; sram_num_entries; i++) {</div><div class='add'>+		int err;</div><div class='add'>+</div><div class='add'>+		memset(&amp;hwe[i], 0, sizeof(*hwe));</div><div class='add'>+		err = airoha_ppe_foe_commit_sram_entry(ppe, i);</div><div class='add'>+		if (err)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct airoha_npu *airoha_ppe_npu_get(struct airoha_eth *eth)</div><div class='add'>+{</div><div class='add'>+	struct airoha_npu *npu = airoha_npu_get(eth-&gt;dev);</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(npu)) {</div><div class='add'>+		request_module("airoha-npu");</div><div class='add'>+		npu = airoha_npu_get(eth-&gt;dev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return npu;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_offload_setup(struct airoha_eth *eth)</div><div class='add'>+{</div><div class='add'>+	struct airoha_npu *npu = airoha_ppe_npu_get(eth);</div><div class='add'>+	struct airoha_ppe *ppe = eth-&gt;ppe;</div><div class='add'>+	int err, ppe_num_stats_entries;</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(npu))</div><div class='add'>+		return PTR_ERR(npu);</div><div class='add'>+</div><div class='add'>+	err = npu-&gt;ops.ppe_init(npu);</div><div class='add'>+	if (err)</div><div class='add'>+		goto error_npu_put;</div><div class='add'>+</div><div class='add'>+	ppe_num_stats_entries = airoha_ppe_get_total_num_stats_entries(ppe);</div><div class='add'>+	if (ppe_num_stats_entries &gt; 0) {</div><div class='add'>+		err = npu-&gt;ops.ppe_init_stats(npu, ppe-&gt;foe_stats_dma,</div><div class='add'>+					      ppe_num_stats_entries);</div><div class='add'>+		if (err)</div><div class='add'>+			goto error_npu_put;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	airoha_ppe_hw_init(ppe);</div><div class='add'>+	airoha_ppe_foe_flow_stats_reset(ppe, npu);</div><div class='add'>+</div><div class='add'>+	rcu_assign_pointer(eth-&gt;npu, npu);</div><div class='add'>+	synchronize_rcu();</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+error_npu_put:</div><div class='add'>+	airoha_npu_put(npu);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int airoha_ppe_setup_tc_block_cb(struct airoha_ppe_dev *dev, void *type_data)</div><div class='add'>+{</div><div class='add'>+	struct airoha_ppe *ppe = dev-&gt;priv;</div><div class='add'>+	struct airoha_eth *eth = ppe-&gt;eth;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;flow_offload_mutex);</div><div class='add'>+</div><div class='add'>+	if (!eth-&gt;npu)</div><div class='add'>+		err = airoha_ppe_offload_setup(eth);</div><div class='add'>+	if (!err)</div><div class='add'>+		err = airoha_ppe_flow_offload_cmd(eth, type_data);</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;flow_offload_mutex);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void airoha_ppe_check_skb(struct airoha_ppe_dev *dev, struct sk_buff *skb,</div><div class='add'>+			  u16 hash, bool rx_wlan)</div><div class='add'>+{</div><div class='add'>+	struct airoha_ppe *ppe = dev-&gt;priv;</div><div class='add'>+	u32 ppe_hash_mask = airoha_ppe_get_total_num_entries(ppe) - 1;</div><div class='add'>+	u16 now, diff;</div><div class='add'>+</div><div class='add'>+	if (hash &gt; ppe_hash_mask)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	now = (u16)jiffies;</div><div class='add'>+	diff = now - ppe-&gt;foe_check_time[hash];</div><div class='add'>+	if (diff &lt; HZ / 10)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ppe-&gt;foe_check_time[hash] = now;</div><div class='add'>+	airoha_ppe_foe_insert_entry(ppe, skb, hash, rx_wlan);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void airoha_ppe_init_upd_mem(struct airoha_gdm_port *port)</div><div class='add'>+{</div><div class='add'>+	struct airoha_eth *eth = port-&gt;qdma-&gt;eth;</div><div class='add'>+	struct net_device *dev = port-&gt;dev;</div><div class='add'>+	const u8 *addr = dev-&gt;dev_addr;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = (addr[2] &lt;&lt; 24) | (addr[3] &lt;&lt; 16) | (addr[4] &lt;&lt; 8) | addr[5];</div><div class='add'>+	airoha_fe_wr(eth, REG_UPDMEM_DATA(0), val);</div><div class='add'>+	airoha_fe_wr(eth, REG_UPDMEM_CTRL(0),</div><div class='add'>+		     FIELD_PREP(PPE_UPDMEM_ADDR_MASK, port-&gt;id) |</div><div class='add'>+		     PPE_UPDMEM_WR_MASK | PPE_UPDMEM_REQ_MASK);</div><div class='add'>+</div><div class='add'>+	val = (addr[0] &lt;&lt; 8) | addr[1];</div><div class='add'>+	airoha_fe_wr(eth, REG_UPDMEM_DATA(0), val);</div><div class='add'>+	airoha_fe_wr(eth, REG_UPDMEM_CTRL(0),</div><div class='add'>+		     FIELD_PREP(PPE_UPDMEM_ADDR_MASK, port-&gt;id) |</div><div class='add'>+		     FIELD_PREP(PPE_UPDMEM_OFFSET_MASK, 1) |</div><div class='add'>+		     PPE_UPDMEM_WR_MASK | PPE_UPDMEM_REQ_MASK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct airoha_ppe_dev *airoha_ppe_get_dev(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct platform_device *pdev;</div><div class='add'>+	struct device_node *np;</div><div class='add'>+	struct airoha_eth *eth;</div><div class='add'>+</div><div class='add'>+	np = of_parse_phandle(dev-&gt;of_node, "airoha,eth", 0);</div><div class='add'>+	if (!np)</div><div class='add'>+		return ERR_PTR(-ENODEV);</div><div class='add'>+</div><div class='add'>+	pdev = of_find_device_by_node(np);</div><div class='add'>+	if (!pdev) {</div><div class='add'>+		dev_err(dev, "cannot find device node %s\n", np-&gt;name);</div><div class='add'>+		of_node_put(np);</div><div class='add'>+		return ERR_PTR(-ENODEV);</div><div class='add'>+	}</div><div class='add'>+	of_node_put(np);</div><div class='add'>+</div><div class='add'>+	if (!try_module_get(THIS_MODULE)) {</div><div class='add'>+		dev_err(dev, "failed to get the device driver module\n");</div><div class='add'>+		goto error_pdev_put;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	eth = platform_get_drvdata(pdev);</div><div class='add'>+	if (!eth)</div><div class='add'>+		goto error_module_put;</div><div class='add'>+</div><div class='add'>+	if (!device_link_add(dev, &amp;pdev-&gt;dev, DL_FLAG_AUTOREMOVE_SUPPLIER)) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+			"failed to create device link to consumer %s\n",</div><div class='add'>+			dev_name(dev));</div><div class='add'>+		goto error_module_put;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return &amp;eth-&gt;ppe-&gt;dev;</div><div class='add'>+</div><div class='add'>+error_module_put:</div><div class='add'>+	module_put(THIS_MODULE);</div><div class='add'>+error_pdev_put:</div><div class='add'>+	platform_device_put(pdev);</div><div class='add'>+</div><div class='add'>+	return ERR_PTR(-ENODEV);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(airoha_ppe_get_dev);</div><div class='add'>+</div><div class='add'>+void airoha_ppe_put_dev(struct airoha_ppe_dev *dev)</div><div class='add'>+{</div><div class='add'>+	struct airoha_ppe *ppe = dev-&gt;priv;</div><div class='add'>+	struct airoha_eth *eth = ppe-&gt;eth;</div><div class='add'>+</div><div class='add'>+	module_put(THIS_MODULE);</div><div class='add'>+	put_device(eth-&gt;dev);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(airoha_ppe_put_dev);</div><div class='add'>+</div><div class='add'>+int airoha_ppe_init(struct airoha_eth *eth)</div><div class='add'>+{</div><div class='add'>+	int foe_size, err, ppe_num_stats_entries;</div><div class='add'>+	u32 ppe_num_entries;</div><div class='add'>+	struct airoha_ppe *ppe;</div><div class='add'>+</div><div class='add'>+	ppe = devm_kzalloc(eth-&gt;dev, sizeof(*ppe), GFP_KERNEL);</div><div class='add'>+	if (!ppe)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ppe-&gt;dev.ops.setup_tc_block_cb = airoha_ppe_setup_tc_block_cb;</div><div class='add'>+	ppe-&gt;dev.ops.check_skb = airoha_ppe_check_skb;</div><div class='add'>+	ppe-&gt;dev.priv = ppe;</div><div class='add'>+	ppe-&gt;eth = eth;</div><div class='add'>+	eth-&gt;ppe = ppe;</div><div class='add'>+</div><div class='add'>+	ppe_num_entries = airoha_ppe_get_total_num_entries(ppe);</div><div class='add'>+	foe_size = ppe_num_entries * sizeof(struct airoha_foe_entry);</div><div class='add'>+	ppe-&gt;foe = dmam_alloc_coherent(eth-&gt;dev, foe_size, &amp;ppe-&gt;foe_dma,</div><div class='add'>+				       GFP_KERNEL);</div><div class='add'>+	if (!ppe-&gt;foe)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ppe-&gt;foe_flow = devm_kzalloc(eth-&gt;dev,</div><div class='add'>+				     ppe_num_entries * sizeof(*ppe-&gt;foe_flow),</div><div class='add'>+				     GFP_KERNEL);</div><div class='add'>+	if (!ppe-&gt;foe_flow)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ppe_num_stats_entries = airoha_ppe_get_total_num_stats_entries(ppe);</div><div class='add'>+	if (ppe_num_stats_entries &gt; 0) {</div><div class='add'>+		foe_size = ppe_num_stats_entries * sizeof(*ppe-&gt;foe_stats);</div><div class='add'>+		ppe-&gt;foe_stats = dmam_alloc_coherent(eth-&gt;dev, foe_size,</div><div class='add'>+						     &amp;ppe-&gt;foe_stats_dma,</div><div class='add'>+						     GFP_KERNEL);</div><div class='add'>+		if (!ppe-&gt;foe_stats)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ppe-&gt;foe_check_time = devm_kzalloc(eth-&gt;dev, ppe_num_entries,</div><div class='add'>+					   GFP_KERNEL);</div><div class='add'>+	if (!ppe-&gt;foe_check_time)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	err = airoha_ppe_flush_sram_entries(ppe);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = rhashtable_init(&amp;eth-&gt;flow_table, &amp;airoha_flow_table_params);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = rhashtable_init(&amp;ppe-&gt;l2_flows, &amp;airoha_l2_flow_table_params);</div><div class='add'>+	if (err)</div><div class='add'>+		goto error_flow_table_destroy;</div><div class='add'>+</div><div class='add'>+	err = airoha_ppe_debugfs_init(ppe);</div><div class='add'>+	if (err)</div><div class='add'>+		goto error_l2_flow_table_destroy;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+error_l2_flow_table_destroy:</div><div class='add'>+	rhashtable_destroy(&amp;ppe-&gt;l2_flows);</div><div class='add'>+error_flow_table_destroy:</div><div class='add'>+	rhashtable_destroy(&amp;eth-&gt;flow_table);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void airoha_ppe_deinit(struct airoha_eth *eth)</div><div class='add'>+{</div><div class='add'>+	struct airoha_npu *npu;</div><div class='add'>+</div><div class='add'>+	rcu_read_lock();</div><div class='add'>+	npu = rcu_dereference(eth-&gt;npu);</div><div class='add'>+	if (npu) {</div><div class='add'>+		npu-&gt;ops.ppe_deinit(npu);</div><div class='add'>+		airoha_npu_put(npu);</div><div class='add'>+	}</div><div class='add'>+	rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+	rhashtable_destroy(&amp;eth-&gt;ppe-&gt;l2_flows);</div><div class='add'>+	rhashtable_destroy(&amp;eth-&gt;flow_table);</div><div class='add'>+	debugfs_remove(eth-&gt;ppe-&gt;debugfs_dir);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/airoha/airoha_ppe_debugfs.c b/drivers/net/ethernet/airoha/airoha_ppe_debugfs.c<br/>new file mode 100644<br/>index 000000000000..0112c41150bb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/airoha/airoha_ppe_debugfs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/airoha/airoha_ppe_debugfs.c</a></div><div class='hunk'>@@ -0,0 +1,187 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2025 AIROHA Inc</div><div class='add'>+ * Author: Lorenzo Bianconi &lt;lorenzo@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "airoha_eth.h"</div><div class='add'>+</div><div class='add'>+static void airoha_debugfs_ppe_print_tuple(struct seq_file *m,</div><div class='add'>+					   void *src_addr, void *dest_addr,</div><div class='add'>+					   u16 *src_port, u16 *dest_port,</div><div class='add'>+					   bool ipv6)</div><div class='add'>+{</div><div class='add'>+	__be32 n_addr[IPV6_ADDR_WORDS];</div><div class='add'>+</div><div class='add'>+	if (ipv6) {</div><div class='add'>+		ipv6_addr_cpu_to_be32(n_addr, src_addr);</div><div class='add'>+		seq_printf(m, "%pI6", n_addr);</div><div class='add'>+	} else {</div><div class='add'>+		seq_printf(m, "%pI4h", src_addr);</div><div class='add'>+	}</div><div class='add'>+	if (src_port)</div><div class='add'>+		seq_printf(m, ":%d", *src_port);</div><div class='add'>+</div><div class='add'>+	seq_puts(m, "-&gt;");</div><div class='add'>+</div><div class='add'>+	if (ipv6) {</div><div class='add'>+		ipv6_addr_cpu_to_be32(n_addr, dest_addr);</div><div class='add'>+		seq_printf(m, "%pI6", n_addr);</div><div class='add'>+	} else {</div><div class='add'>+		seq_printf(m, "%pI4h", dest_addr);</div><div class='add'>+	}</div><div class='add'>+	if (dest_port)</div><div class='add'>+		seq_printf(m, ":%d", *dest_port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_debugfs_foe_show(struct seq_file *m, void *private,</div><div class='add'>+				       bool bind)</div><div class='add'>+{</div><div class='add'>+	static const char *const ppe_type_str[] = {</div><div class='add'>+		[PPE_PKT_TYPE_IPV4_HNAPT] = "IPv4 5T",</div><div class='add'>+		[PPE_PKT_TYPE_IPV4_ROUTE] = "IPv4 3T",</div><div class='add'>+		[PPE_PKT_TYPE_BRIDGE] = "L2B",</div><div class='add'>+		[PPE_PKT_TYPE_IPV4_DSLITE] = "DS-LITE",</div><div class='add'>+		[PPE_PKT_TYPE_IPV6_ROUTE_3T] = "IPv6 3T",</div><div class='add'>+		[PPE_PKT_TYPE_IPV6_ROUTE_5T] = "IPv6 5T",</div><div class='add'>+		[PPE_PKT_TYPE_IPV6_6RD] = "6RD",</div><div class='add'>+	};</div><div class='add'>+	static const char *const ppe_state_str[] = {</div><div class='add'>+		[AIROHA_FOE_STATE_INVALID] = "INV",</div><div class='add'>+		[AIROHA_FOE_STATE_UNBIND] = "UNB",</div><div class='add'>+		[AIROHA_FOE_STATE_BIND] = "BND",</div><div class='add'>+		[AIROHA_FOE_STATE_FIN] = "FIN",</div><div class='add'>+	};</div><div class='add'>+	struct airoha_ppe *ppe = m-&gt;private;</div><div class='add'>+	u32 ppe_num_entries = airoha_ppe_get_total_num_entries(ppe);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ppe_num_entries; i++) {</div><div class='add'>+		const char *state_str, *type_str = "UNKNOWN";</div><div class='add'>+		void *src_addr = NULL, *dest_addr = NULL;</div><div class='add'>+		u16 *src_port = NULL, *dest_port = NULL;</div><div class='add'>+		struct airoha_foe_mac_info_common *l2;</div><div class='add'>+		unsigned char h_source[ETH_ALEN] = {};</div><div class='add'>+		struct airoha_foe_stats64 stats = {};</div><div class='add'>+		unsigned char h_dest[ETH_ALEN];</div><div class='add'>+		struct airoha_foe_entry *hwe;</div><div class='add'>+		u32 type, state, ib2, data;</div><div class='add'>+		bool ipv6 = false;</div><div class='add'>+</div><div class='add'>+		hwe = airoha_ppe_foe_get_entry(ppe, i);</div><div class='add'>+		if (!hwe)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		state = FIELD_GET(AIROHA_FOE_IB1_BIND_STATE, hwe-&gt;ib1);</div><div class='add'>+		if (!state)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (bind &amp;&amp; state != AIROHA_FOE_STATE_BIND)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		state_str = ppe_state_str[state % ARRAY_SIZE(ppe_state_str)];</div><div class='add'>+		type = FIELD_GET(AIROHA_FOE_IB1_BIND_PACKET_TYPE, hwe-&gt;ib1);</div><div class='add'>+		if (type &lt; ARRAY_SIZE(ppe_type_str) &amp;&amp; ppe_type_str[type])</div><div class='add'>+			type_str = ppe_type_str[type];</div><div class='add'>+</div><div class='add'>+		seq_printf(m, "%05x %s %7s", i, state_str, type_str);</div><div class='add'>+</div><div class='add'>+		switch (type) {</div><div class='add'>+		case PPE_PKT_TYPE_IPV4_HNAPT:</div><div class='add'>+		case PPE_PKT_TYPE_IPV4_DSLITE:</div><div class='add'>+			src_port = &amp;hwe-&gt;ipv4.orig_tuple.src_port;</div><div class='add'>+			dest_port = &amp;hwe-&gt;ipv4.orig_tuple.dest_port;</div><div class='add'>+			fallthrough;</div><div class='add'>+		case PPE_PKT_TYPE_IPV4_ROUTE:</div><div class='add'>+			src_addr = &amp;hwe-&gt;ipv4.orig_tuple.src_ip;</div><div class='add'>+			dest_addr = &amp;hwe-&gt;ipv4.orig_tuple.dest_ip;</div><div class='add'>+			break;</div><div class='add'>+		case PPE_PKT_TYPE_IPV6_ROUTE_5T:</div><div class='add'>+			src_port = &amp;hwe-&gt;ipv6.src_port;</div><div class='add'>+			dest_port = &amp;hwe-&gt;ipv6.dest_port;</div><div class='add'>+			fallthrough;</div><div class='add'>+		case PPE_PKT_TYPE_IPV6_ROUTE_3T:</div><div class='add'>+		case PPE_PKT_TYPE_IPV6_6RD:</div><div class='add'>+			src_addr = &amp;hwe-&gt;ipv6.src_ip;</div><div class='add'>+			dest_addr = &amp;hwe-&gt;ipv6.dest_ip;</div><div class='add'>+			ipv6 = true;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (src_addr &amp;&amp; dest_addr) {</div><div class='add'>+			seq_puts(m, " orig=");</div><div class='add'>+			airoha_debugfs_ppe_print_tuple(m, src_addr, dest_addr,</div><div class='add'>+						       src_port, dest_port, ipv6);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		switch (type) {</div><div class='add'>+		case PPE_PKT_TYPE_IPV4_HNAPT:</div><div class='add'>+		case PPE_PKT_TYPE_IPV4_DSLITE:</div><div class='add'>+			src_port = &amp;hwe-&gt;ipv4.new_tuple.src_port;</div><div class='add'>+			dest_port = &amp;hwe-&gt;ipv4.new_tuple.dest_port;</div><div class='add'>+			fallthrough;</div><div class='add'>+		case PPE_PKT_TYPE_IPV4_ROUTE:</div><div class='add'>+			src_addr = &amp;hwe-&gt;ipv4.new_tuple.src_ip;</div><div class='add'>+			dest_addr = &amp;hwe-&gt;ipv4.new_tuple.dest_ip;</div><div class='add'>+			seq_puts(m, " new=");</div><div class='add'>+			airoha_debugfs_ppe_print_tuple(m, src_addr, dest_addr,</div><div class='add'>+						       src_port, dest_port,</div><div class='add'>+						       ipv6);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (type &gt;= PPE_PKT_TYPE_IPV6_ROUTE_3T) {</div><div class='add'>+			data = hwe-&gt;ipv6.data;</div><div class='add'>+			ib2 = hwe-&gt;ipv6.ib2;</div><div class='add'>+			l2 = &amp;hwe-&gt;ipv6.l2;</div><div class='add'>+		} else {</div><div class='add'>+			data = hwe-&gt;ipv4.data;</div><div class='add'>+			ib2 = hwe-&gt;ipv4.ib2;</div><div class='add'>+			l2 = &amp;hwe-&gt;ipv4.l2.common;</div><div class='add'>+			*((__be16 *)&amp;h_source[4]) =</div><div class='add'>+				cpu_to_be16(hwe-&gt;ipv4.l2.src_mac_lo);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		airoha_ppe_foe_entry_get_stats(ppe, i, &amp;stats);</div><div class='add'>+</div><div class='add'>+		*((__be32 *)h_dest) = cpu_to_be32(l2-&gt;dest_mac_hi);</div><div class='add'>+		*((__be16 *)&amp;h_dest[4]) = cpu_to_be16(l2-&gt;dest_mac_lo);</div><div class='add'>+		*((__be32 *)h_source) = cpu_to_be32(l2-&gt;src_mac_hi);</div><div class='add'>+</div><div class='add'>+		seq_printf(m, " eth=%pM-&gt;%pM etype=%04x data=%08x"</div><div class='add'>+			      " vlan=%d,%d ib1=%08x ib2=%08x"</div><div class='add'>+			      " packets=%llu bytes=%llu\n",</div><div class='add'>+			   h_source, h_dest, l2-&gt;etype, data,</div><div class='add'>+			   l2-&gt;vlan1, l2-&gt;vlan2, hwe-&gt;ib1, ib2,</div><div class='add'>+			   stats.packets, stats.bytes);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_debugfs_foe_all_show(struct seq_file *m, void *private)</div><div class='add'>+{</div><div class='add'>+	return airoha_ppe_debugfs_foe_show(m, private, false);</div><div class='add'>+}</div><div class='add'>+DEFINE_SHOW_ATTRIBUTE(airoha_ppe_debugfs_foe_all);</div><div class='add'>+</div><div class='add'>+static int airoha_ppe_debugfs_foe_bind_show(struct seq_file *m, void *private)</div><div class='add'>+{</div><div class='add'>+	return airoha_ppe_debugfs_foe_show(m, private, true);</div><div class='add'>+}</div><div class='add'>+DEFINE_SHOW_ATTRIBUTE(airoha_ppe_debugfs_foe_bind);</div><div class='add'>+</div><div class='add'>+int airoha_ppe_debugfs_init(struct airoha_ppe *ppe)</div><div class='add'>+{</div><div class='add'>+	ppe-&gt;debugfs_dir = debugfs_create_dir("ppe", NULL);</div><div class='add'>+	debugfs_create_file("entries", 0444, ppe-&gt;debugfs_dir, ppe,</div><div class='add'>+			    &amp;airoha_ppe_debugfs_foe_all_fops);</div><div class='add'>+	debugfs_create_file("bind", 0444, ppe-&gt;debugfs_dir, ppe,</div><div class='add'>+			    &amp;airoha_ppe_debugfs_foe_bind_fops);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/airoha/airoha_regs.h b/drivers/net/ethernet/airoha/airoha_regs.h<br/>new file mode 100644<br/>index 000000000000..ed4e3407f4a0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/airoha/airoha_regs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/airoha/airoha_regs.h</a></div><div class='hunk'>@@ -0,0 +1,923 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2024 AIROHA Inc</div><div class='add'>+ * Author: Lorenzo Bianconi &lt;lorenzo@kernel.org&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef AIROHA_REGS_H</div><div class='add'>+#define AIROHA_REGS_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+/* FE */</div><div class='add'>+#define PSE_BASE			0x0100</div><div class='add'>+#define CSR_IFC_BASE			0x0200</div><div class='add'>+#define CDM1_BASE			0x0400</div><div class='add'>+#define GDM1_BASE			0x0500</div><div class='add'>+#define PPE1_BASE			0x0c00</div><div class='add'>+#define PPE2_BASE			0x1c00</div><div class='add'>+</div><div class='add'>+#define CDM2_BASE			0x1400</div><div class='add'>+#define GDM2_BASE			0x1500</div><div class='add'>+</div><div class='add'>+#define GDM3_BASE			0x1100</div><div class='add'>+#define GDM4_BASE			0x2500</div><div class='add'>+</div><div class='add'>+#define CDM_BASE(_n)			\</div><div class='add'>+	((_n) == 2 ? CDM2_BASE : CDM1_BASE)</div><div class='add'>+#define GDM_BASE(_n)			\</div><div class='add'>+	((_n) == 4 ? GDM4_BASE :	\</div><div class='add'>+	 (_n) == 3 ? GDM3_BASE :	\</div><div class='add'>+	 (_n) == 2 ? GDM2_BASE : GDM1_BASE)</div><div class='add'>+</div><div class='add'>+#define REG_FE_DMA_GLO_CFG		0x0000</div><div class='add'>+#define FE_DMA_GLO_L2_SPACE_MASK	GENMASK(7, 4)</div><div class='add'>+#define FE_DMA_GLO_PG_SZ_MASK		BIT(3)</div><div class='add'>+</div><div class='add'>+#define REG_FE_RST_GLO_CFG		0x0004</div><div class='add'>+#define FE_RST_GDM4_MBI_ARB_MASK	BIT(3)</div><div class='add'>+#define FE_RST_GDM3_MBI_ARB_MASK	BIT(2)</div><div class='add'>+#define FE_RST_CORE_MASK		BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_FE_FOE_TS			0x0010</div><div class='add'>+</div><div class='add'>+#define REG_FE_WAN_PORT			0x0024</div><div class='add'>+#define WAN1_EN_MASK			BIT(16)</div><div class='add'>+#define WAN1_MASK			GENMASK(12, 8)</div><div class='add'>+#define WAN0_MASK			GENMASK(4, 0)</div><div class='add'>+</div><div class='add'>+#define REG_FE_WAN_MAC_H		0x0030</div><div class='add'>+#define REG_FE_LAN_MAC_H		0x0040</div><div class='add'>+</div><div class='add'>+#define REG_FE_MAC_LMIN(_n)		((_n) + 0x04)</div><div class='add'>+#define REG_FE_MAC_LMAX(_n)		((_n) + 0x08)</div><div class='add'>+</div><div class='add'>+#define REG_FE_CDM1_OQ_MAP0		0x0050</div><div class='add'>+#define REG_FE_CDM1_OQ_MAP1		0x0054</div><div class='add'>+#define REG_FE_CDM1_OQ_MAP2		0x0058</div><div class='add'>+#define REG_FE_CDM1_OQ_MAP3		0x005c</div><div class='add'>+</div><div class='add'>+#define REG_FE_PCE_CFG			0x0070</div><div class='add'>+#define PCE_DPI_EN_MASK			BIT(2)</div><div class='add'>+#define PCE_KA_EN_MASK			BIT(1)</div><div class='add'>+#define PCE_MC_EN_MASK			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_FE_PSE_QUEUE_CFG_WR		0x0080</div><div class='add'>+#define PSE_CFG_PORT_ID_MASK		GENMASK(27, 24)</div><div class='add'>+#define PSE_CFG_QUEUE_ID_MASK		GENMASK(20, 16)</div><div class='add'>+#define PSE_CFG_WR_EN_MASK		BIT(8)</div><div class='add'>+#define PSE_CFG_OQRSV_SEL_MASK		BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_FE_PSE_QUEUE_CFG_VAL	0x0084</div><div class='add'>+#define PSE_CFG_OQ_RSV_MASK		GENMASK(13, 0)</div><div class='add'>+</div><div class='add'>+#define PSE_FQ_CFG			0x008c</div><div class='add'>+#define PSE_FQ_LIMIT_MASK		GENMASK(14, 0)</div><div class='add'>+</div><div class='add'>+#define REG_FE_PSE_BUF_SET		0x0090</div><div class='add'>+#define PSE_SHARE_USED_LTHD_MASK	GENMASK(31, 16)</div><div class='add'>+#define PSE_ALLRSV_MASK			GENMASK(14, 0)</div><div class='add'>+</div><div class='add'>+#define REG_PSE_SHARE_USED_THD		0x0094</div><div class='add'>+#define PSE_SHARE_USED_MTHD_MASK	GENMASK(31, 16)</div><div class='add'>+#define PSE_SHARE_USED_HTHD_MASK	GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define REG_GDM_MISC_CFG		0x0148</div><div class='add'>+#define GDM2_RDM_ACK_WAIT_PREF_MASK	BIT(9)</div><div class='add'>+#define GDM2_CHN_VLD_MODE_MASK		BIT(5)</div><div class='add'>+</div><div class='add'>+#define REG_FE_CSR_IFC_CFG		CSR_IFC_BASE</div><div class='add'>+#define FE_IFC_EN_MASK			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_FE_VIP_PORT_EN		0x01f0</div><div class='add'>+#define REG_FE_IFC_PORT_EN		0x01f4</div><div class='add'>+</div><div class='add'>+#define REG_PSE_IQ_REV1			(PSE_BASE + 0x08)</div><div class='add'>+#define PSE_IQ_RES1_P2_MASK		GENMASK(23, 16)</div><div class='add'>+</div><div class='add'>+#define REG_PSE_IQ_REV2			(PSE_BASE + 0x0c)</div><div class='add'>+#define PSE_IQ_RES2_P5_MASK		GENMASK(15, 8)</div><div class='add'>+#define PSE_IQ_RES2_P4_MASK		GENMASK(7, 0)</div><div class='add'>+</div><div class='add'>+#define REG_FE_VIP_EN(_n)		(0x0300 + ((_n) &lt;&lt; 3))</div><div class='add'>+#define PATN_FCPU_EN_MASK		BIT(7)</div><div class='add'>+#define PATN_SWP_EN_MASK		BIT(6)</div><div class='add'>+#define PATN_DP_EN_MASK			BIT(5)</div><div class='add'>+#define PATN_SP_EN_MASK			BIT(4)</div><div class='add'>+#define PATN_TYPE_MASK			GENMASK(3, 1)</div><div class='add'>+#define PATN_EN_MASK			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_FE_VIP_PATN(_n)		(0x0304 + ((_n) &lt;&lt; 3))</div><div class='add'>+#define PATN_DP_MASK			GENMASK(31, 16)</div><div class='add'>+#define PATN_SP_MASK			GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define REG_CDM_VLAN_CTRL(_n)		CDM_BASE(_n)</div><div class='add'>+#define CDM_VLAN_MASK			GENMASK(31, 16)</div><div class='add'>+</div><div class='add'>+#define REG_CDM_FWD_CFG(_n)		(CDM_BASE(_n) + 0x08)</div><div class='add'>+#define CDM_OAM_QSEL_MASK		GENMASK(31, 27)</div><div class='add'>+#define CDM_VIP_QSEL_MASK		GENMASK(24, 20)</div><div class='add'>+</div><div class='add'>+#define REG_CDM_CRSN_QSEL(_n, _m)	(CDM_BASE(_n) + 0x10 + ((_m) &lt;&lt; 2))</div><div class='add'>+#define CDM_CRSN_QSEL_REASON_MASK(_n)	\</div><div class='add'>+	GENMASK(4 + (((_n) % 4) &lt;&lt; 3),	(((_n) % 4) &lt;&lt; 3))</div><div class='add'>+</div><div class='add'>+#define REG_GDM_FWD_CFG(_n)		GDM_BASE(_n)</div><div class='add'>+#define GDM_PAD_EN_MASK			BIT(28)</div><div class='add'>+#define GDM_DROP_CRC_ERR_MASK		BIT(23)</div><div class='add'>+#define GDM_IP4_CKSUM_MASK		BIT(22)</div><div class='add'>+#define GDM_TCP_CKSUM_MASK		BIT(21)</div><div class='add'>+#define GDM_UDP_CKSUM_MASK		BIT(20)</div><div class='add'>+#define GDM_STRIP_CRC_MASK		BIT(16)</div><div class='add'>+#define GDM_UCFQ_MASK			GENMASK(15, 12)</div><div class='add'>+#define GDM_BCFQ_MASK			GENMASK(11, 8)</div><div class='add'>+#define GDM_MCFQ_MASK			GENMASK(7, 4)</div><div class='add'>+#define GDM_OCFQ_MASK			GENMASK(3, 0)</div><div class='add'>+</div><div class='add'>+#define REG_GDM_INGRESS_CFG(_n)		(GDM_BASE(_n) + 0x10)</div><div class='add'>+#define GDM_INGRESS_FC_EN_MASK		BIT(1)</div><div class='add'>+#define GDM_STAG_EN_MASK		BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_GDM_LEN_CFG(_n)		(GDM_BASE(_n) + 0x14)</div><div class='add'>+#define GDM_SHORT_LEN_MASK		GENMASK(13, 0)</div><div class='add'>+#define GDM_LONG_LEN_MASK		GENMASK(29, 16)</div><div class='add'>+</div><div class='add'>+#define REG_GDM_LPBK_CFG(_n)		(GDM_BASE(_n) + 0x1c)</div><div class='add'>+#define LPBK_GAP_MASK			GENMASK(31, 24)</div><div class='add'>+#define LPBK_LEN_MASK			GENMASK(23, 10)</div><div class='add'>+#define LPBK_CHAN_MASK			GENMASK(8, 4)</div><div class='add'>+#define LPBK_MODE_MASK			GENMASK(3, 1)</div><div class='add'>+#define LBK_GAP_MODE_MASK		BIT(3)</div><div class='add'>+#define LBK_LEN_MODE_MASK		BIT(2)</div><div class='add'>+#define LBK_CHAN_MODE_MASK		BIT(1)</div><div class='add'>+#define LPBK_EN_MASK			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_GDM_CHN_RLS(_n)		(GDM_BASE(_n) + 0x20)</div><div class='add'>+#define MBI_RX_AGE_SEL_MASK		GENMASK(26, 25)</div><div class='add'>+#define MBI_TX_AGE_SEL_MASK		GENMASK(18, 17)</div><div class='add'>+</div><div class='add'>+#define REG_GDM_TXCHN_EN(_n)		(GDM_BASE(_n) + 0x24)</div><div class='add'>+#define REG_GDM_RXCHN_EN(_n)		(GDM_BASE(_n) + 0x28)</div><div class='add'>+</div><div class='add'>+#define REG_FE_CPORT_CFG		(GDM1_BASE + 0x40)</div><div class='add'>+#define FE_CPORT_PAD			BIT(26)</div><div class='add'>+#define FE_CPORT_PORT_XFC_MASK		BIT(25)</div><div class='add'>+#define FE_CPORT_QUEUE_XFC_MASK		BIT(24)</div><div class='add'>+</div><div class='add'>+#define REG_FE_GDM_MIB_CLEAR(_n)	(GDM_BASE(_n) + 0xf0)</div><div class='add'>+#define FE_GDM_MIB_RX_CLEAR_MASK	BIT(1)</div><div class='add'>+#define FE_GDM_MIB_TX_CLEAR_MASK	BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_FE_GDM_MIB_CFG(_n)		(GDM_BASE(_n) + 0xf4)</div><div class='add'>+#define FE_STRICT_RFC2819_MODE_MASK	BIT(31)</div><div class='add'>+#define FE_GDM_TX_MIB_SPLIT_EN_MASK	BIT(17)</div><div class='add'>+#define FE_GDM_RX_MIB_SPLIT_EN_MASK	BIT(16)</div><div class='add'>+#define FE_TX_MIB_ID_MASK		GENMASK(15, 8)</div><div class='add'>+#define FE_RX_MIB_ID_MASK		GENMASK(7, 0)</div><div class='add'>+</div><div class='add'>+#define REG_FE_GDM_TX_OK_PKT_CNT_L(_n)		(GDM_BASE(_n) + 0x104)</div><div class='add'>+#define REG_FE_GDM_TX_OK_BYTE_CNT_L(_n)		(GDM_BASE(_n) + 0x10c)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_PKT_CNT_L(_n)		(GDM_BASE(_n) + 0x110)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_BYTE_CNT_L(_n)	(GDM_BASE(_n) + 0x114)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_DROP_CNT(_n)		(GDM_BASE(_n) + 0x118)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_BC_CNT(_n)		(GDM_BASE(_n) + 0x11c)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_MC_CNT(_n)		(GDM_BASE(_n) + 0x120)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_RUNT_CNT(_n)		(GDM_BASE(_n) + 0x124)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_LONG_CNT(_n)		(GDM_BASE(_n) + 0x128)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_E64_CNT_L(_n)		(GDM_BASE(_n) + 0x12c)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_L64_CNT_L(_n)		(GDM_BASE(_n) + 0x130)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_L127_CNT_L(_n)	(GDM_BASE(_n) + 0x134)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_L255_CNT_L(_n)	(GDM_BASE(_n) + 0x138)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_L511_CNT_L(_n)	(GDM_BASE(_n) + 0x13c)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_L1023_CNT_L(_n)	(GDM_BASE(_n) + 0x140)</div><div class='add'>+</div><div class='add'>+#define REG_FE_GDM_RX_OK_PKT_CNT_L(_n)		(GDM_BASE(_n) + 0x148)</div><div class='add'>+#define REG_FE_GDM_RX_FC_DROP_CNT(_n)		(GDM_BASE(_n) + 0x14c)</div><div class='add'>+#define REG_FE_GDM_RX_RC_DROP_CNT(_n)		(GDM_BASE(_n) + 0x150)</div><div class='add'>+#define REG_FE_GDM_RX_OVERFLOW_DROP_CNT(_n)	(GDM_BASE(_n) + 0x154)</div><div class='add'>+#define REG_FE_GDM_RX_ERROR_DROP_CNT(_n)	(GDM_BASE(_n) + 0x158)</div><div class='add'>+#define REG_FE_GDM_RX_OK_BYTE_CNT_L(_n)		(GDM_BASE(_n) + 0x15c)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_PKT_CNT_L(_n)		(GDM_BASE(_n) + 0x160)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_BYTE_CNT_L(_n)	(GDM_BASE(_n) + 0x164)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_DROP_CNT(_n)		(GDM_BASE(_n) + 0x168)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_BC_CNT(_n)		(GDM_BASE(_n) + 0x16c)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_MC_CNT(_n)		(GDM_BASE(_n) + 0x170)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_CRC_ERR_CNT(_n)	(GDM_BASE(_n) + 0x174)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_FRAG_CNT(_n)		(GDM_BASE(_n) + 0x178)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_JABBER_CNT(_n)	(GDM_BASE(_n) + 0x17c)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_RUNT_CNT(_n)		(GDM_BASE(_n) + 0x180)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_LONG_CNT(_n)		(GDM_BASE(_n) + 0x184)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_E64_CNT_L(_n)		(GDM_BASE(_n) + 0x188)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_L64_CNT_L(_n)		(GDM_BASE(_n) + 0x18c)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_L127_CNT_L(_n)	(GDM_BASE(_n) + 0x190)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_L255_CNT_L(_n)	(GDM_BASE(_n) + 0x194)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_L511_CNT_L(_n)	(GDM_BASE(_n) + 0x198)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_L1023_CNT_L(_n)	(GDM_BASE(_n) + 0x19c)</div><div class='add'>+</div><div class='add'>+#define REG_GDM_SRC_PORT_SET(_n)		(GDM_BASE(_n) + 0x23c)</div><div class='add'>+#define GDM_SPORT_OFF2_MASK			GENMASK(19, 16)</div><div class='add'>+#define GDM_SPORT_OFF1_MASK			GENMASK(15, 12)</div><div class='add'>+#define GDM_SPORT_OFF0_MASK			GENMASK(11, 8)</div><div class='add'>+</div><div class='add'>+#define REG_FE_GDM_TX_OK_PKT_CNT_H(_n)		(GDM_BASE(_n) + 0x280)</div><div class='add'>+#define REG_FE_GDM_TX_OK_BYTE_CNT_H(_n)		(GDM_BASE(_n) + 0x284)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_PKT_CNT_H(_n)		(GDM_BASE(_n) + 0x288)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_BYTE_CNT_H(_n)	(GDM_BASE(_n) + 0x28c)</div><div class='add'>+</div><div class='add'>+#define REG_FE_GDM_RX_OK_PKT_CNT_H(_n)		(GDM_BASE(_n) + 0x290)</div><div class='add'>+#define REG_FE_GDM_RX_OK_BYTE_CNT_H(_n)		(GDM_BASE(_n) + 0x294)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_PKT_CNT_H(_n)		(GDM_BASE(_n) + 0x298)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_BYTE_CNT_H(_n)	(GDM_BASE(_n) + 0x29c)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_E64_CNT_H(_n)		(GDM_BASE(_n) + 0x2b8)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_L64_CNT_H(_n)		(GDM_BASE(_n) + 0x2bc)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_L127_CNT_H(_n)	(GDM_BASE(_n) + 0x2c0)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_L255_CNT_H(_n)	(GDM_BASE(_n) + 0x2c4)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_L511_CNT_H(_n)	(GDM_BASE(_n) + 0x2c8)</div><div class='add'>+#define REG_FE_GDM_TX_ETH_L1023_CNT_H(_n)	(GDM_BASE(_n) + 0x2cc)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_E64_CNT_H(_n)		(GDM_BASE(_n) + 0x2e8)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_L64_CNT_H(_n)		(GDM_BASE(_n) + 0x2ec)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_L127_CNT_H(_n)	(GDM_BASE(_n) + 0x2f0)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_L255_CNT_H(_n)	(GDM_BASE(_n) + 0x2f4)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_L511_CNT_H(_n)	(GDM_BASE(_n) + 0x2f8)</div><div class='add'>+#define REG_FE_GDM_RX_ETH_L1023_CNT_H(_n)	(GDM_BASE(_n) + 0x2fc)</div><div class='add'>+</div><div class='add'>+#define REG_PPE_GLO_CFG(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x200)</div><div class='add'>+#define PPE_GLO_CFG_BUSY_MASK			BIT(31)</div><div class='add'>+#define PPE_GLO_CFG_FLOW_DROP_UPDATE_MASK	BIT(9)</div><div class='add'>+#define PPE_GLO_CFG_PSE_HASH_OFS_MASK		BIT(6)</div><div class='add'>+#define PPE_GLO_CFG_PPE_BSWAP_MASK		BIT(5)</div><div class='add'>+#define PPE_GLO_CFG_TTL_DROP_MASK		BIT(4)</div><div class='add'>+#define PPE_GLO_CFG_IP4_CS_DROP_MASK		BIT(3)</div><div class='add'>+#define PPE_GLO_CFG_IP4_L4_CS_DROP_MASK		BIT(2)</div><div class='add'>+#define PPE_GLO_CFG_EN_MASK			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_PPE_PPE_FLOW_CFG(_n)		(((_n) ? PPE2_BASE : PPE1_BASE) + 0x204)</div><div class='add'>+#define PPE_FLOW_CFG_IP6_HASH_GRE_KEY_MASK	BIT(20)</div><div class='add'>+#define PPE_FLOW_CFG_IP4_HASH_GRE_KEY_MASK	BIT(19)</div><div class='add'>+#define PPE_FLOW_CFG_IP4_HASH_FLOW_LABEL_MASK	BIT(18)</div><div class='add'>+#define PPE_FLOW_CFG_IP4_NAT_FRAG_MASK		BIT(17)</div><div class='add'>+#define PPE_FLOW_CFG_IP_PROTO_BLACKLIST_MASK	BIT(16)</div><div class='add'>+#define PPE_FLOW_CFG_IP4_DSLITE_MASK		BIT(14)</div><div class='add'>+#define PPE_FLOW_CFG_IP4_NAPT_MASK		BIT(13)</div><div class='add'>+#define PPE_FLOW_CFG_IP4_NAT_MASK		BIT(12)</div><div class='add'>+#define PPE_FLOW_CFG_IP6_6RD_MASK		BIT(10)</div><div class='add'>+#define PPE_FLOW_CFG_IP6_5T_ROUTE_MASK		BIT(9)</div><div class='add'>+#define PPE_FLOW_CFG_IP6_3T_ROUTE_MASK		BIT(8)</div><div class='add'>+#define PPE_FLOW_CFG_IP4_UDP_FRAG_MASK		BIT(7)</div><div class='add'>+#define PPE_FLOW_CFG_IP4_TCP_FRAG_MASK		BIT(6)</div><div class='add'>+</div><div class='add'>+#define REG_PPE_IP_PROTO_CHK(_n)		(((_n) ? PPE2_BASE : PPE1_BASE) + 0x208)</div><div class='add'>+#define PPE_IP_PROTO_CHK_IPV4_MASK		GENMASK(31, 16)</div><div class='add'>+#define PPE_IP_PROTO_CHK_IPV6_MASK		GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define REG_PPE_TB_CFG(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x21c)</div><div class='add'>+#define PPE_SRAM_TB_NUM_ENTRY_MASK		GENMASK(26, 24)</div><div class='add'>+#define PPE_TB_CFG_KEEPALIVE_MASK		GENMASK(13, 12)</div><div class='add'>+#define PPE_TB_CFG_AGE_TCP_FIN_MASK		BIT(11)</div><div class='add'>+#define PPE_TB_CFG_AGE_UDP_MASK			BIT(10)</div><div class='add'>+#define PPE_TB_CFG_AGE_TCP_MASK			BIT(9)</div><div class='add'>+#define PPE_TB_CFG_AGE_UNBIND_MASK		BIT(8)</div><div class='add'>+#define PPE_TB_CFG_AGE_NON_L4_MASK		BIT(7)</div><div class='add'>+#define PPE_TB_CFG_AGE_PREBIND_MASK		BIT(6)</div><div class='add'>+#define PPE_TB_CFG_SEARCH_MISS_MASK		GENMASK(5, 4)</div><div class='add'>+#define PPE_TB_ENTRY_SIZE_MASK			BIT(3)</div><div class='add'>+#define PPE_DRAM_TB_NUM_ENTRY_MASK		GENMASK(2, 0)</div><div class='add'>+</div><div class='add'>+#define REG_PPE_TB_BASE(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x220)</div><div class='add'>+</div><div class='add'>+#define REG_PPE_BIND_RATE(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x228)</div><div class='add'>+#define PPE_BIND_RATE_L2B_BIND_MASK		GENMASK(31, 16)</div><div class='add'>+#define PPE_BIND_RATE_BIND_MASK			GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define REG_PPE_BIND_LIMIT0(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x22c)</div><div class='add'>+#define PPE_BIND_LIMIT0_HALF_MASK		GENMASK(29, 16)</div><div class='add'>+#define PPE_BIND_LIMIT0_QUARTER_MASK		GENMASK(13, 0)</div><div class='add'>+</div><div class='add'>+#define REG_PPE_BIND_LIMIT1(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x230)</div><div class='add'>+#define PPE_BIND_LIMIT1_NON_L4_MASK		GENMASK(23, 16)</div><div class='add'>+#define PPE_BIND_LIMIT1_FULL_MASK		GENMASK(13, 0)</div><div class='add'>+</div><div class='add'>+#define REG_PPE_BND_AGE0(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x23c)</div><div class='add'>+#define PPE_BIND_AGE0_DELTA_NON_L4		GENMASK(30, 16)</div><div class='add'>+#define PPE_BIND_AGE0_DELTA_UDP			GENMASK(14, 0)</div><div class='add'>+</div><div class='add'>+#define REG_PPE_UNBIND_AGE(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x238)</div><div class='add'>+#define PPE_UNBIND_AGE_MIN_PACKETS_MASK		GENMASK(31, 16)</div><div class='add'>+#define PPE_UNBIND_AGE_DELTA_MASK		GENMASK(7, 0)</div><div class='add'>+</div><div class='add'>+#define REG_PPE_BND_AGE1(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x240)</div><div class='add'>+#define PPE_BIND_AGE1_DELTA_TCP_FIN		GENMASK(30, 16)</div><div class='add'>+#define PPE_BIND_AGE1_DELTA_TCP			GENMASK(14, 0)</div><div class='add'>+</div><div class='add'>+#define REG_PPE_HASH_SEED(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x244)</div><div class='add'>+#define PPE_HASH_SEED				0x12345678</div><div class='add'>+</div><div class='add'>+#define REG_PPE_DFT_CPORT0(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x248)</div><div class='add'>+#define DFT_CPORT_MASK(_n)			GENMASK(3 + ((_n) &lt;&lt; 2), ((_n) &lt;&lt; 2))</div><div class='add'>+</div><div class='add'>+#define REG_PPE_DFT_CPORT1(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x24c)</div><div class='add'>+</div><div class='add'>+#define REG_PPE_TB_HASH_CFG(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x250)</div><div class='add'>+#define PPE_DRAM_HASH1_MODE_MASK		GENMASK(31, 28)</div><div class='add'>+#define PPE_DRAM_HASH1_EN_MASK			BIT(24)</div><div class='add'>+#define PPE_DRAM_HASH0_MODE_MASK		GENMASK(23, 20)</div><div class='add'>+#define PPE_DRAM_TABLE_EN_MASK			BIT(16)</div><div class='add'>+#define PPE_SRAM_HASH1_MODE_MASK		GENMASK(15, 12)</div><div class='add'>+#define PPE_SRAM_HASH1_EN_MASK			BIT(8)</div><div class='add'>+#define PPE_SRAM_HASH0_MODE_MASK		GENMASK(7, 4)</div><div class='add'>+#define PPE_SRAM_TABLE_EN_MASK			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_PPE_MTU_BASE(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x304)</div><div class='add'>+#define REG_PPE_MTU(_m, _n)			(REG_PPE_MTU_BASE(_m) + ((_n) &lt;&lt; 2))</div><div class='add'>+#define FP1_EGRESS_MTU_MASK			GENMASK(29, 16)</div><div class='add'>+#define FP0_EGRESS_MTU_MASK			GENMASK(13, 0)</div><div class='add'>+</div><div class='add'>+#define REG_PPE_RAM_CTRL(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x31c)</div><div class='add'>+#define PPE_SRAM_CTRL_ACK_MASK			BIT(31)</div><div class='add'>+#define PPE_SRAM_CTRL_DUAL_SUCESS_MASK		BIT(30)</div><div class='add'>+#define PPE_SRAM_CTRL_ENTRY_MASK		GENMASK(23, 8)</div><div class='add'>+#define PPE_SRAM_WR_DUAL_DIRECTION_MASK		BIT(2)</div><div class='add'>+#define PPE_SRAM_CTRL_WR_MASK			BIT(1)</div><div class='add'>+#define PPE_SRAM_CTRL_REQ_MASK			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_PPE_RAM_BASE(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x320)</div><div class='add'>+#define REG_PPE_RAM_ENTRY(_m, _n)		(REG_PPE_RAM_BASE(_m) + ((_n) &lt;&lt; 2))</div><div class='add'>+</div><div class='add'>+#define REG_UPDMEM_CTRL(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x370)</div><div class='add'>+#define PPE_UPDMEM_ACK_MASK			BIT(31)</div><div class='add'>+#define PPE_UPDMEM_ADDR_MASK			GENMASK(11, 8)</div><div class='add'>+#define PPE_UPDMEM_OFFSET_MASK			GENMASK(7, 4)</div><div class='add'>+#define PPE_UPDMEM_SEL_MASK			GENMASK(3, 2)</div><div class='add'>+#define PPE_UPDMEM_WR_MASK			BIT(1)</div><div class='add'>+#define PPE_UPDMEM_REQ_MASK			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_UPDMEM_DATA(_n)			(((_n) ? PPE2_BASE : PPE1_BASE) + 0x374)</div><div class='add'>+</div><div class='add'>+#define REG_IP_FRAG_FP			0x2010</div><div class='add'>+#define IP_ASSEMBLE_PORT_MASK		GENMASK(24, 21)</div><div class='add'>+#define IP_ASSEMBLE_NBQ_MASK		GENMASK(20, 16)</div><div class='add'>+#define IP_FRAGMENT_PORT_MASK		GENMASK(8, 5)</div><div class='add'>+#define IP_FRAGMENT_NBQ_MASK		GENMASK(4, 0)</div><div class='add'>+</div><div class='add'>+#define REG_MC_VLAN_EN			0x2100</div><div class='add'>+#define MC_VLAN_EN_MASK			BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_MC_VLAN_CFG			0x2104</div><div class='add'>+#define MC_VLAN_CFG_CMD_DONE_MASK	BIT(31)</div><div class='add'>+#define MC_VLAN_CFG_TABLE_ID_MASK	GENMASK(21, 16)</div><div class='add'>+#define MC_VLAN_CFG_PORT_ID_MASK	GENMASK(11, 8)</div><div class='add'>+#define MC_VLAN_CFG_TABLE_SEL_MASK	BIT(4)</div><div class='add'>+#define MC_VLAN_CFG_RW_MASK		BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_MC_VLAN_DATA		0x2108</div><div class='add'>+</div><div class='add'>+#define REG_SP_DFT_CPORT(_n)		(0x20e0 + ((_n) &lt;&lt; 2))</div><div class='add'>+#define SP_CPORT_DFT_MASK		GENMASK(2, 0)</div><div class='add'>+#define SP_CPORT_MASK(_n)		GENMASK(3 + ((_n) &lt;&lt; 2), ((_n) &lt;&lt; 2))</div><div class='add'>+</div><div class='add'>+#define REG_SRC_PORT_FC_MAP6		0x2298</div><div class='add'>+#define FC_ID_OF_SRC_PORT27_MASK	GENMASK(28, 24)</div><div class='add'>+#define FC_ID_OF_SRC_PORT26_MASK	GENMASK(20, 16)</div><div class='add'>+#define FC_ID_OF_SRC_PORT25_MASK	GENMASK(12, 8)</div><div class='add'>+#define FC_ID_OF_SRC_PORT24_MASK	GENMASK(4, 0)</div><div class='add'>+</div><div class='add'>+#define REG_CDM5_RX_OQ1_DROP_CNT	0x29d4</div><div class='add'>+</div><div class='add'>+/* QDMA */</div><div class='add'>+#define REG_QDMA_GLOBAL_CFG			0x0004</div><div class='add'>+#define GLOBAL_CFG_RX_2B_OFFSET_MASK		BIT(31)</div><div class='add'>+#define GLOBAL_CFG_DMA_PREFERENCE_MASK		GENMASK(30, 29)</div><div class='add'>+#define GLOBAL_CFG_CPU_TXR_RR_MASK		BIT(28)</div><div class='add'>+#define GLOBAL_CFG_DSCP_BYTE_SWAP_MASK		BIT(27)</div><div class='add'>+#define GLOBAL_CFG_PAYLOAD_BYTE_SWAP_MASK	BIT(26)</div><div class='add'>+#define GLOBAL_CFG_MULTICAST_MODIFY_FP_MASK	BIT(25)</div><div class='add'>+#define GLOBAL_CFG_OAM_MODIFY_MASK		BIT(24)</div><div class='add'>+#define GLOBAL_CFG_RESET_MASK			BIT(23)</div><div class='add'>+#define GLOBAL_CFG_RESET_DONE_MASK		BIT(22)</div><div class='add'>+#define GLOBAL_CFG_MULTICAST_EN_MASK		BIT(21)</div><div class='add'>+#define GLOBAL_CFG_IRQ1_EN_MASK			BIT(20)</div><div class='add'>+#define GLOBAL_CFG_IRQ0_EN_MASK			BIT(19)</div><div class='add'>+#define GLOBAL_CFG_LOOPCNT_EN_MASK		BIT(18)</div><div class='add'>+#define GLOBAL_CFG_RD_BYPASS_WR_MASK		BIT(17)</div><div class='add'>+#define GLOBAL_CFG_QDMA_LOOPBACK_MASK		BIT(16)</div><div class='add'>+#define GLOBAL_CFG_LPBK_RXQ_SEL_MASK		GENMASK(13, 8)</div><div class='add'>+#define GLOBAL_CFG_CHECK_DONE_MASK		BIT(7)</div><div class='add'>+#define GLOBAL_CFG_TX_WB_DONE_MASK		BIT(6)</div><div class='add'>+#define GLOBAL_CFG_MAX_ISSUE_NUM_MASK		GENMASK(5, 4)</div><div class='add'>+#define GLOBAL_CFG_RX_DMA_BUSY_MASK		BIT(3)</div><div class='add'>+#define GLOBAL_CFG_RX_DMA_EN_MASK		BIT(2)</div><div class='add'>+#define GLOBAL_CFG_TX_DMA_BUSY_MASK		BIT(1)</div><div class='add'>+#define GLOBAL_CFG_TX_DMA_EN_MASK		BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_FWD_DSCP_BASE			0x0010</div><div class='add'>+#define REG_FWD_BUF_BASE			0x0014</div><div class='add'>+</div><div class='add'>+#define REG_HW_FWD_DSCP_CFG			0x0018</div><div class='add'>+#define HW_FWD_DSCP_PAYLOAD_SIZE_MASK		GENMASK(29, 28)</div><div class='add'>+#define HW_FWD_DSCP_SCATTER_LEN_MASK		GENMASK(17, 16)</div><div class='add'>+#define HW_FWD_DSCP_MIN_SCATTER_LEN_MASK	GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define REG_INT_STATUS(_n)		\</div><div class='add'>+	(((_n) == 4) ? 0x0730 :		\</div><div class='add'>+	 ((_n) == 3) ? 0x0724 :		\</div><div class='add'>+	 ((_n) == 2) ? 0x0720 :		\</div><div class='add'>+	 ((_n) == 1) ? 0x0024 : 0x0020)</div><div class='add'>+</div><div class='add'>+#define REG_INT_ENABLE(_b, _n)		\</div><div class='add'>+	(((_n) == 4) ? 0x0750 + ((_b) &lt;&lt; 5) :	\</div><div class='add'>+	 ((_n) == 3) ? 0x0744 + ((_b) &lt;&lt; 5) :	\</div><div class='add'>+	 ((_n) == 2) ? 0x0740 + ((_b) &lt;&lt; 5) :	\</div><div class='add'>+	 ((_n) == 1) ? 0x002c + ((_b) &lt;&lt; 3) :	\</div><div class='add'>+		       0x0028 + ((_b) &lt;&lt; 3))</div><div class='add'>+</div><div class='add'>+/* QDMA_CSR_INT_ENABLE1 */</div><div class='add'>+#define RX15_COHERENT_INT_MASK		BIT(31)</div><div class='add'>+#define RX14_COHERENT_INT_MASK		BIT(30)</div><div class='add'>+#define RX13_COHERENT_INT_MASK		BIT(29)</div><div class='add'>+#define RX12_COHERENT_INT_MASK		BIT(28)</div><div class='add'>+#define RX11_COHERENT_INT_MASK		BIT(27)</div><div class='add'>+#define RX10_COHERENT_INT_MASK		BIT(26)</div><div class='add'>+#define RX9_COHERENT_INT_MASK		BIT(25)</div><div class='add'>+#define RX8_COHERENT_INT_MASK		BIT(24)</div><div class='add'>+#define RX7_COHERENT_INT_MASK		BIT(23)</div><div class='add'>+#define RX6_COHERENT_INT_MASK		BIT(22)</div><div class='add'>+#define RX5_COHERENT_INT_MASK		BIT(21)</div><div class='add'>+#define RX4_COHERENT_INT_MASK		BIT(20)</div><div class='add'>+#define RX3_COHERENT_INT_MASK		BIT(19)</div><div class='add'>+#define RX2_COHERENT_INT_MASK		BIT(18)</div><div class='add'>+#define RX1_COHERENT_INT_MASK		BIT(17)</div><div class='add'>+#define RX0_COHERENT_INT_MASK		BIT(16)</div><div class='add'>+#define TX7_COHERENT_INT_MASK		BIT(15)</div><div class='add'>+#define TX6_COHERENT_INT_MASK		BIT(14)</div><div class='add'>+#define TX5_COHERENT_INT_MASK		BIT(13)</div><div class='add'>+#define TX4_COHERENT_INT_MASK		BIT(12)</div><div class='add'>+#define TX3_COHERENT_INT_MASK		BIT(11)</div><div class='add'>+#define TX2_COHERENT_INT_MASK		BIT(10)</div><div class='add'>+#define TX1_COHERENT_INT_MASK		BIT(9)</div><div class='add'>+#define TX0_COHERENT_INT_MASK		BIT(8)</div><div class='add'>+#define CNT_OVER_FLOW_INT_MASK		BIT(7)</div><div class='add'>+#define IRQ1_FULL_INT_MASK		BIT(5)</div><div class='add'>+#define IRQ1_INT_MASK			BIT(4)</div><div class='add'>+#define HWFWD_DSCP_LOW_INT_MASK		BIT(3)</div><div class='add'>+#define HWFWD_DSCP_EMPTY_INT_MASK	BIT(2)</div><div class='add'>+#define IRQ0_FULL_INT_MASK		BIT(1)</div><div class='add'>+#define IRQ0_INT_MASK			BIT(0)</div><div class='add'>+</div><div class='add'>+#define RX_COHERENT_LOW_INT_MASK				\</div><div class='add'>+	(RX15_COHERENT_INT_MASK | RX14_COHERENT_INT_MASK |	\</div><div class='add'>+	 RX13_COHERENT_INT_MASK | RX12_COHERENT_INT_MASK |	\</div><div class='add'>+	 RX11_COHERENT_INT_MASK | RX10_COHERENT_INT_MASK |	\</div><div class='add'>+	 RX9_COHERENT_INT_MASK | RX8_COHERENT_INT_MASK |	\</div><div class='add'>+	 RX7_COHERENT_INT_MASK | RX6_COHERENT_INT_MASK |	\</div><div class='add'>+	 RX5_COHERENT_INT_MASK | RX4_COHERENT_INT_MASK |	\</div><div class='add'>+	 RX3_COHERENT_INT_MASK | RX2_COHERENT_INT_MASK |	\</div><div class='add'>+	 RX1_COHERENT_INT_MASK | RX0_COHERENT_INT_MASK)</div><div class='add'>+</div><div class='add'>+#define RX_COHERENT_LOW_OFFSET	__ffs(RX_COHERENT_LOW_INT_MASK)</div><div class='add'>+#define INT_RX0_MASK(_n)					\</div><div class='add'>+	(((_n) &lt;&lt; RX_COHERENT_LOW_OFFSET) &amp; RX_COHERENT_LOW_INT_MASK)</div><div class='add'>+</div><div class='add'>+#define TX_COHERENT_LOW_INT_MASK				\</div><div class='add'>+	(TX7_COHERENT_INT_MASK | TX6_COHERENT_INT_MASK |	\</div><div class='add'>+	 TX5_COHERENT_INT_MASK | TX4_COHERENT_INT_MASK |	\</div><div class='add'>+	 TX3_COHERENT_INT_MASK | TX2_COHERENT_INT_MASK |	\</div><div class='add'>+	 TX1_COHERENT_INT_MASK | TX0_COHERENT_INT_MASK)</div><div class='add'>+</div><div class='add'>+#define TX_DONE_INT_MASK(_n)					\</div><div class='add'>+	((_n) ? IRQ1_INT_MASK | IRQ1_FULL_INT_MASK		\</div><div class='add'>+	      : IRQ0_INT_MASK | IRQ0_FULL_INT_MASK)</div><div class='add'>+</div><div class='add'>+#define INT_TX_MASK						\</div><div class='add'>+	(IRQ1_INT_MASK | IRQ1_FULL_INT_MASK |			\</div><div class='add'>+	 IRQ0_INT_MASK | IRQ0_FULL_INT_MASK)</div><div class='add'>+</div><div class='add'>+/* QDMA_CSR_INT_ENABLE2 */</div><div class='add'>+#define RX15_NO_CPU_DSCP_INT_MASK	BIT(31)</div><div class='add'>+#define RX14_NO_CPU_DSCP_INT_MASK	BIT(30)</div><div class='add'>+#define RX13_NO_CPU_DSCP_INT_MASK	BIT(29)</div><div class='add'>+#define RX12_NO_CPU_DSCP_INT_MASK	BIT(28)</div><div class='add'>+#define RX11_NO_CPU_DSCP_INT_MASK	BIT(27)</div><div class='add'>+#define RX10_NO_CPU_DSCP_INT_MASK	BIT(26)</div><div class='add'>+#define RX9_NO_CPU_DSCP_INT_MASK	BIT(25)</div><div class='add'>+#define RX8_NO_CPU_DSCP_INT_MASK	BIT(24)</div><div class='add'>+#define RX7_NO_CPU_DSCP_INT_MASK	BIT(23)</div><div class='add'>+#define RX6_NO_CPU_DSCP_INT_MASK	BIT(22)</div><div class='add'>+#define RX5_NO_CPU_DSCP_INT_MASK	BIT(21)</div><div class='add'>+#define RX4_NO_CPU_DSCP_INT_MASK	BIT(20)</div><div class='add'>+#define RX3_NO_CPU_DSCP_INT_MASK	BIT(19)</div><div class='add'>+#define RX2_NO_CPU_DSCP_INT_MASK	BIT(18)</div><div class='add'>+#define RX1_NO_CPU_DSCP_INT_MASK	BIT(17)</div><div class='add'>+#define RX0_NO_CPU_DSCP_INT_MASK	BIT(16)</div><div class='add'>+#define RX15_DONE_INT_MASK		BIT(15)</div><div class='add'>+#define RX14_DONE_INT_MASK		BIT(14)</div><div class='add'>+#define RX13_DONE_INT_MASK		BIT(13)</div><div class='add'>+#define RX12_DONE_INT_MASK		BIT(12)</div><div class='add'>+#define RX11_DONE_INT_MASK		BIT(11)</div><div class='add'>+#define RX10_DONE_INT_MASK		BIT(10)</div><div class='add'>+#define RX9_DONE_INT_MASK		BIT(9)</div><div class='add'>+#define RX8_DONE_INT_MASK		BIT(8)</div><div class='add'>+#define RX7_DONE_INT_MASK		BIT(7)</div><div class='add'>+#define RX6_DONE_INT_MASK		BIT(6)</div><div class='add'>+#define RX5_DONE_INT_MASK		BIT(5)</div><div class='add'>+#define RX4_DONE_INT_MASK		BIT(4)</div><div class='add'>+#define RX3_DONE_INT_MASK		BIT(3)</div><div class='add'>+#define RX2_DONE_INT_MASK		BIT(2)</div><div class='add'>+#define RX1_DONE_INT_MASK		BIT(1)</div><div class='add'>+#define RX0_DONE_INT_MASK		BIT(0)</div><div class='add'>+</div><div class='add'>+#define RX_NO_CPU_DSCP_LOW_INT_MASK					\</div><div class='add'>+	(RX15_NO_CPU_DSCP_INT_MASK | RX14_NO_CPU_DSCP_INT_MASK |	\</div><div class='add'>+	 RX13_NO_CPU_DSCP_INT_MASK | RX12_NO_CPU_DSCP_INT_MASK |	\</div><div class='add'>+	 RX11_NO_CPU_DSCP_INT_MASK | RX10_NO_CPU_DSCP_INT_MASK |	\</div><div class='add'>+	 RX9_NO_CPU_DSCP_INT_MASK | RX8_NO_CPU_DSCP_INT_MASK |		\</div><div class='add'>+	 RX7_NO_CPU_DSCP_INT_MASK | RX6_NO_CPU_DSCP_INT_MASK |		\</div><div class='add'>+	 RX5_NO_CPU_DSCP_INT_MASK | RX4_NO_CPU_DSCP_INT_MASK |		\</div><div class='add'>+	 RX3_NO_CPU_DSCP_INT_MASK | RX2_NO_CPU_DSCP_INT_MASK |		\</div><div class='add'>+	 RX1_NO_CPU_DSCP_INT_MASK | RX0_NO_CPU_DSCP_INT_MASK)</div><div class='add'>+</div><div class='add'>+#define RX_DONE_LOW_INT_MASK				\</div><div class='add'>+	(RX15_DONE_INT_MASK | RX14_DONE_INT_MASK |	\</div><div class='add'>+	 RX13_DONE_INT_MASK | RX12_DONE_INT_MASK |	\</div><div class='add'>+	 RX11_DONE_INT_MASK | RX10_DONE_INT_MASK |	\</div><div class='add'>+	 RX9_DONE_INT_MASK | RX8_DONE_INT_MASK |	\</div><div class='add'>+	 RX7_DONE_INT_MASK | RX6_DONE_INT_MASK |	\</div><div class='add'>+	 RX5_DONE_INT_MASK | RX4_DONE_INT_MASK |	\</div><div class='add'>+	 RX3_DONE_INT_MASK | RX2_DONE_INT_MASK |	\</div><div class='add'>+	 RX1_DONE_INT_MASK | RX0_DONE_INT_MASK)</div><div class='add'>+</div><div class='add'>+#define RX_NO_CPU_DSCP_LOW_OFFSET	__ffs(RX_NO_CPU_DSCP_LOW_INT_MASK)</div><div class='add'>+#define INT_RX1_MASK(_n)							\</div><div class='add'>+	((((_n) &lt;&lt; RX_NO_CPU_DSCP_LOW_OFFSET) &amp; RX_NO_CPU_DSCP_LOW_INT_MASK) |	\</div><div class='add'>+	 (RX_DONE_LOW_INT_MASK &amp; (_n)))</div><div class='add'>+</div><div class='add'>+/* QDMA_CSR_INT_ENABLE3 */</div><div class='add'>+#define RX31_NO_CPU_DSCP_INT_MASK	BIT(31)</div><div class='add'>+#define RX30_NO_CPU_DSCP_INT_MASK	BIT(30)</div><div class='add'>+#define RX29_NO_CPU_DSCP_INT_MASK	BIT(29)</div><div class='add'>+#define RX28_NO_CPU_DSCP_INT_MASK	BIT(28)</div><div class='add'>+#define RX27_NO_CPU_DSCP_INT_MASK	BIT(27)</div><div class='add'>+#define RX26_NO_CPU_DSCP_INT_MASK	BIT(26)</div><div class='add'>+#define RX25_NO_CPU_DSCP_INT_MASK	BIT(25)</div><div class='add'>+#define RX24_NO_CPU_DSCP_INT_MASK	BIT(24)</div><div class='add'>+#define RX23_NO_CPU_DSCP_INT_MASK	BIT(23)</div><div class='add'>+#define RX22_NO_CPU_DSCP_INT_MASK	BIT(22)</div><div class='add'>+#define RX21_NO_CPU_DSCP_INT_MASK	BIT(21)</div><div class='add'>+#define RX20_NO_CPU_DSCP_INT_MASK	BIT(20)</div><div class='add'>+#define RX19_NO_CPU_DSCP_INT_MASK	BIT(19)</div><div class='add'>+#define RX18_NO_CPU_DSCP_INT_MASK	BIT(18)</div><div class='add'>+#define RX17_NO_CPU_DSCP_INT_MASK	BIT(17)</div><div class='add'>+#define RX16_NO_CPU_DSCP_INT_MASK	BIT(16)</div><div class='add'>+#define RX31_DONE_INT_MASK		BIT(15)</div><div class='add'>+#define RX30_DONE_INT_MASK		BIT(14)</div><div class='add'>+#define RX29_DONE_INT_MASK		BIT(13)</div><div class='add'>+#define RX28_DONE_INT_MASK		BIT(12)</div><div class='add'>+#define RX27_DONE_INT_MASK		BIT(11)</div><div class='add'>+#define RX26_DONE_INT_MASK		BIT(10)</div><div class='add'>+#define RX25_DONE_INT_MASK		BIT(9)</div><div class='add'>+#define RX24_DONE_INT_MASK		BIT(8)</div><div class='add'>+#define RX23_DONE_INT_MASK		BIT(7)</div><div class='add'>+#define RX22_DONE_INT_MASK		BIT(6)</div><div class='add'>+#define RX21_DONE_INT_MASK		BIT(5)</div><div class='add'>+#define RX20_DONE_INT_MASK		BIT(4)</div><div class='add'>+#define RX19_DONE_INT_MASK		BIT(3)</div><div class='add'>+#define RX18_DONE_INT_MASK		BIT(2)</div><div class='add'>+#define RX17_DONE_INT_MASK		BIT(1)</div><div class='add'>+#define RX16_DONE_INT_MASK		BIT(0)</div><div class='add'>+</div><div class='add'>+#define RX_NO_CPU_DSCP_HIGH_INT_MASK					\</div><div class='add'>+	(RX31_NO_CPU_DSCP_INT_MASK | RX30_NO_CPU_DSCP_INT_MASK |	\</div><div class='add'>+	 RX29_NO_CPU_DSCP_INT_MASK | RX28_NO_CPU_DSCP_INT_MASK |	\</div><div class='add'>+	 RX27_NO_CPU_DSCP_INT_MASK | RX26_NO_CPU_DSCP_INT_MASK |	\</div><div class='add'>+	 RX25_NO_CPU_DSCP_INT_MASK | RX24_NO_CPU_DSCP_INT_MASK |	\</div><div class='add'>+	 RX23_NO_CPU_DSCP_INT_MASK | RX22_NO_CPU_DSCP_INT_MASK |	\</div><div class='add'>+	 RX21_NO_CPU_DSCP_INT_MASK | RX20_NO_CPU_DSCP_INT_MASK |	\</div><div class='add'>+	 RX19_NO_CPU_DSCP_INT_MASK | RX18_NO_CPU_DSCP_INT_MASK |	\</div><div class='add'>+	 RX17_NO_CPU_DSCP_INT_MASK | RX16_NO_CPU_DSCP_INT_MASK)</div><div class='add'>+</div><div class='add'>+#define RX_DONE_HIGH_INT_MASK				\</div><div class='add'>+	(RX31_DONE_INT_MASK | RX30_DONE_INT_MASK |	\</div><div class='add'>+	 RX29_DONE_INT_MASK | RX28_DONE_INT_MASK |	\</div><div class='add'>+	 RX27_DONE_INT_MASK | RX26_DONE_INT_MASK |	\</div><div class='add'>+	 RX25_DONE_INT_MASK | RX24_DONE_INT_MASK |	\</div><div class='add'>+	 RX23_DONE_INT_MASK | RX22_DONE_INT_MASK |	\</div><div class='add'>+	 RX21_DONE_INT_MASK | RX20_DONE_INT_MASK |	\</div><div class='add'>+	 RX19_DONE_INT_MASK | RX18_DONE_INT_MASK |	\</div><div class='add'>+	 RX17_DONE_INT_MASK | RX16_DONE_INT_MASK)</div><div class='add'>+</div><div class='add'>+#define RX_DONE_HIGH_OFFSET	fls(RX_DONE_HIGH_INT_MASK)</div><div class='add'>+#define RX_DONE_INT_MASK	\</div><div class='add'>+	((RX_DONE_HIGH_INT_MASK &lt;&lt; RX_DONE_HIGH_OFFSET) | RX_DONE_LOW_INT_MASK)</div><div class='add'>+</div><div class='add'>+#define INT_RX2_MASK(_n)				\</div><div class='add'>+	((RX_NO_CPU_DSCP_HIGH_INT_MASK &amp; (_n)) |	\</div><div class='add'>+	 (((_n) &gt;&gt; RX_DONE_HIGH_OFFSET) &amp; RX_DONE_HIGH_INT_MASK))</div><div class='add'>+</div><div class='add'>+/* QDMA_CSR_INT_ENABLE4 */</div><div class='add'>+#define RX31_COHERENT_INT_MASK		BIT(31)</div><div class='add'>+#define RX30_COHERENT_INT_MASK		BIT(30)</div><div class='add'>+#define RX29_COHERENT_INT_MASK		BIT(29)</div><div class='add'>+#define RX28_COHERENT_INT_MASK		BIT(28)</div><div class='add'>+#define RX27_COHERENT_INT_MASK		BIT(27)</div><div class='add'>+#define RX26_COHERENT_INT_MASK		BIT(26)</div><div class='add'>+#define RX25_COHERENT_INT_MASK		BIT(25)</div><div class='add'>+#define RX24_COHERENT_INT_MASK		BIT(24)</div><div class='add'>+#define RX23_COHERENT_INT_MASK		BIT(23)</div><div class='add'>+#define RX22_COHERENT_INT_MASK		BIT(22)</div><div class='add'>+#define RX21_COHERENT_INT_MASK		BIT(21)</div><div class='add'>+#define RX20_COHERENT_INT_MASK		BIT(20)</div><div class='add'>+#define RX19_COHERENT_INT_MASK		BIT(19)</div><div class='add'>+#define RX18_COHERENT_INT_MASK		BIT(18)</div><div class='add'>+#define RX17_COHERENT_INT_MASK		BIT(17)</div><div class='add'>+#define RX16_COHERENT_INT_MASK		BIT(16)</div><div class='add'>+</div><div class='add'>+#define RX_COHERENT_HIGH_INT_MASK				\</div><div class='add'>+	(RX31_COHERENT_INT_MASK | RX30_COHERENT_INT_MASK |	\</div><div class='add'>+	 RX29_COHERENT_INT_MASK | RX28_COHERENT_INT_MASK |	\</div><div class='add'>+	 RX27_COHERENT_INT_MASK | RX26_COHERENT_INT_MASK |	\</div><div class='add'>+	 RX25_COHERENT_INT_MASK | RX24_COHERENT_INT_MASK |	\</div><div class='add'>+	 RX23_COHERENT_INT_MASK | RX22_COHERENT_INT_MASK |	\</div><div class='add'>+	 RX21_COHERENT_INT_MASK | RX20_COHERENT_INT_MASK |	\</div><div class='add'>+	 RX19_COHERENT_INT_MASK | RX18_COHERENT_INT_MASK |	\</div><div class='add'>+	 RX17_COHERENT_INT_MASK | RX16_COHERENT_INT_MASK)</div><div class='add'>+</div><div class='add'>+#define INT_RX3_MASK(_n)	(RX_COHERENT_HIGH_INT_MASK &amp; (_n))</div><div class='add'>+</div><div class='add'>+/* QDMA_CSR_INT_ENABLE5 */</div><div class='add'>+#define TX31_COHERENT_INT_MASK		BIT(31)</div><div class='add'>+#define TX30_COHERENT_INT_MASK		BIT(30)</div><div class='add'>+#define TX29_COHERENT_INT_MASK		BIT(29)</div><div class='add'>+#define TX28_COHERENT_INT_MASK		BIT(28)</div><div class='add'>+#define TX27_COHERENT_INT_MASK		BIT(27)</div><div class='add'>+#define TX26_COHERENT_INT_MASK		BIT(26)</div><div class='add'>+#define TX25_COHERENT_INT_MASK		BIT(25)</div><div class='add'>+#define TX24_COHERENT_INT_MASK		BIT(24)</div><div class='add'>+#define TX23_COHERENT_INT_MASK		BIT(23)</div><div class='add'>+#define TX22_COHERENT_INT_MASK		BIT(22)</div><div class='add'>+#define TX21_COHERENT_INT_MASK		BIT(21)</div><div class='add'>+#define TX20_COHERENT_INT_MASK		BIT(20)</div><div class='add'>+#define TX19_COHERENT_INT_MASK		BIT(19)</div><div class='add'>+#define TX18_COHERENT_INT_MASK		BIT(18)</div><div class='add'>+#define TX17_COHERENT_INT_MASK		BIT(17)</div><div class='add'>+#define TX16_COHERENT_INT_MASK		BIT(16)</div><div class='add'>+#define TX15_COHERENT_INT_MASK		BIT(15)</div><div class='add'>+#define TX14_COHERENT_INT_MASK		BIT(14)</div><div class='add'>+#define TX13_COHERENT_INT_MASK		BIT(13)</div><div class='add'>+#define TX12_COHERENT_INT_MASK		BIT(12)</div><div class='add'>+#define TX11_COHERENT_INT_MASK		BIT(11)</div><div class='add'>+#define TX10_COHERENT_INT_MASK		BIT(10)</div><div class='add'>+#define TX9_COHERENT_INT_MASK		BIT(9)</div><div class='add'>+#define TX8_COHERENT_INT_MASK		BIT(8)</div><div class='add'>+</div><div class='add'>+#define TX_COHERENT_HIGH_INT_MASK				\</div><div class='add'>+	(TX31_COHERENT_INT_MASK | TX30_COHERENT_INT_MASK |	\</div><div class='add'>+	 TX29_COHERENT_INT_MASK | TX28_COHERENT_INT_MASK |	\</div><div class='add'>+	 TX27_COHERENT_INT_MASK | TX26_COHERENT_INT_MASK |	\</div><div class='add'>+	 TX25_COHERENT_INT_MASK | TX24_COHERENT_INT_MASK |	\</div><div class='add'>+	 TX23_COHERENT_INT_MASK | TX22_COHERENT_INT_MASK |	\</div><div class='add'>+	 TX21_COHERENT_INT_MASK | TX20_COHERENT_INT_MASK |	\</div><div class='add'>+	 TX19_COHERENT_INT_MASK | TX18_COHERENT_INT_MASK |	\</div><div class='add'>+	 TX17_COHERENT_INT_MASK | TX16_COHERENT_INT_MASK |	\</div><div class='add'>+	 TX15_COHERENT_INT_MASK | TX14_COHERENT_INT_MASK |	\</div><div class='add'>+	 TX13_COHERENT_INT_MASK | TX12_COHERENT_INT_MASK |	\</div><div class='add'>+	 TX11_COHERENT_INT_MASK | TX10_COHERENT_INT_MASK |	\</div><div class='add'>+	 TX9_COHERENT_INT_MASK | TX8_COHERENT_INT_MASK)</div><div class='add'>+</div><div class='add'>+#define REG_TX_IRQ_BASE(_n)		((_n) ? 0x0048 : 0x0050)</div><div class='add'>+</div><div class='add'>+#define REG_TX_IRQ_CFG(_n)		((_n) ? 0x004c : 0x0054)</div><div class='add'>+#define TX_IRQ_THR_MASK			GENMASK(27, 16)</div><div class='add'>+#define TX_IRQ_DEPTH_MASK		GENMASK(11, 0)</div><div class='add'>+</div><div class='add'>+#define REG_IRQ_CLEAR_LEN(_n)		((_n) ? 0x0064 : 0x0058)</div><div class='add'>+#define IRQ_CLEAR_LEN_MASK		GENMASK(7, 0)</div><div class='add'>+</div><div class='add'>+#define REG_IRQ_STATUS(_n)		((_n) ? 0x0068 : 0x005c)</div><div class='add'>+#define IRQ_ENTRY_LEN_MASK		GENMASK(27, 16)</div><div class='add'>+#define IRQ_HEAD_IDX_MASK		GENMASK(11, 0)</div><div class='add'>+</div><div class='add'>+#define REG_TX_RING_BASE(_n)	\</div><div class='add'>+	(((_n) &lt; 8) ? 0x0100 + ((_n) &lt;&lt; 5) : 0x0b00 + (((_n) - 8) &lt;&lt; 5))</div><div class='add'>+</div><div class='add'>+#define REG_TX_RING_BLOCKING(_n)	\</div><div class='add'>+	(((_n) &lt; 8) ? 0x0104 + ((_n) &lt;&lt; 5) : 0x0b04 + (((_n) - 8) &lt;&lt; 5))</div><div class='add'>+</div><div class='add'>+#define TX_RING_IRQ_BLOCKING_MAP_MASK			BIT(6)</div><div class='add'>+#define TX_RING_IRQ_BLOCKING_CFG_MASK			BIT(4)</div><div class='add'>+#define TX_RING_IRQ_BLOCKING_TX_DROP_EN_MASK		BIT(2)</div><div class='add'>+#define TX_RING_IRQ_BLOCKING_MAX_TH_TXRING_EN_MASK	BIT(1)</div><div class='add'>+#define TX_RING_IRQ_BLOCKING_MIN_TH_TXRING_EN_MASK	BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_TX_CPU_IDX(_n)	\</div><div class='add'>+	(((_n) &lt; 8) ? 0x0108 + ((_n) &lt;&lt; 5) : 0x0b08 + (((_n) - 8) &lt;&lt; 5))</div><div class='add'>+</div><div class='add'>+#define TX_RING_CPU_IDX_MASK		GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define REG_TX_DMA_IDX(_n)	\</div><div class='add'>+	(((_n) &lt; 8) ? 0x010c + ((_n) &lt;&lt; 5) : 0x0b0c + (((_n) - 8) &lt;&lt; 5))</div><div class='add'>+</div><div class='add'>+#define TX_RING_DMA_IDX_MASK		GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define IRQ_RING_IDX_MASK		GENMASK(20, 16)</div><div class='add'>+#define IRQ_DESC_IDX_MASK		GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define REG_RX_RING_BASE(_n)	\</div><div class='add'>+	(((_n) &lt; 16) ? 0x0200 + ((_n) &lt;&lt; 5) : 0x0e00 + (((_n) - 16) &lt;&lt; 5))</div><div class='add'>+</div><div class='add'>+#define REG_RX_RING_SIZE(_n)	\</div><div class='add'>+	(((_n) &lt; 16) ? 0x0204 + ((_n) &lt;&lt; 5) : 0x0e04 + (((_n) - 16) &lt;&lt; 5))</div><div class='add'>+</div><div class='add'>+#define RX_RING_THR_MASK		GENMASK(31, 16)</div><div class='add'>+#define RX_RING_SIZE_MASK		GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define REG_RX_CPU_IDX(_n)	\</div><div class='add'>+	(((_n) &lt; 16) ? 0x0208 + ((_n) &lt;&lt; 5) : 0x0e08 + (((_n) - 16) &lt;&lt; 5))</div><div class='add'>+</div><div class='add'>+#define RX_RING_CPU_IDX_MASK		GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define REG_RX_DMA_IDX(_n)	\</div><div class='add'>+	(((_n) &lt; 16) ? 0x020c + ((_n) &lt;&lt; 5) : 0x0e0c + (((_n) - 16) &lt;&lt; 5))</div><div class='add'>+</div><div class='add'>+#define REG_RX_DELAY_INT_IDX(_n)	\</div><div class='add'>+	(((_n) &lt; 16) ? 0x0210 + ((_n) &lt;&lt; 5) : 0x0e10 + (((_n) - 16) &lt;&lt; 5))</div><div class='add'>+</div><div class='add'>+#define REG_RX_SCATTER_CFG(_n)	\</div><div class='add'>+	(((_n) &lt; 16) ? 0x0214 + ((_n) &lt;&lt; 5) : 0x0e14 + (((_n) - 16) &lt;&lt; 5))</div><div class='add'>+</div><div class='add'>+#define RX_DELAY_INT_MASK		GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define RX_RING_DMA_IDX_MASK		GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define RX_RING_SG_EN_MASK		BIT(0)</div><div class='add'>+</div><div class='add'>+#define REG_INGRESS_TRTCM_CFG		0x0070</div><div class='add'>+#define INGRESS_TRTCM_EN_MASK		BIT(31)</div><div class='add'>+#define INGRESS_TRTCM_MODE_MASK		BIT(30)</div><div class='add'>+#define INGRESS_SLOW_TICK_RATIO_MASK	GENMASK(29, 16)</div><div class='add'>+#define INGRESS_FAST_TICK_MASK		GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define REG_QUEUE_CLOSE_CFG(_n)		(0x00a0 + ((_n) &amp; 0xfc))</div><div class='add'>+#define TXQ_DISABLE_CHAN_QUEUE_MASK(_n, _m)	BIT((_m) + (((_n) &amp; 0x3) &lt;&lt; 3))</div><div class='add'>+</div><div class='add'>+#define REG_TXQ_DIS_CFG_BASE(_n)	((_n) ? 0x20a0 : 0x00a0)</div><div class='add'>+#define REG_TXQ_DIS_CFG(_n, _m)		(REG_TXQ_DIS_CFG_BASE((_n)) + (_m) &lt;&lt; 2)</div><div class='add'>+</div><div class='add'>+#define REG_CNTR_CFG(_n)		(0x0400 + ((_n) &lt;&lt; 3))</div><div class='add'>+#define CNTR_EN_MASK			BIT(31)</div><div class='add'>+#define CNTR_ALL_CHAN_EN_MASK		BIT(30)</div><div class='add'>+#define CNTR_ALL_QUEUE_EN_MASK		BIT(29)</div><div class='add'>+#define CNTR_ALL_DSCP_RING_EN_MASK	BIT(28)</div><div class='add'>+#define CNTR_SRC_MASK			GENMASK(27, 24)</div><div class='add'>+#define CNTR_DSCP_RING_MASK		GENMASK(20, 16)</div><div class='add'>+#define CNTR_CHAN_MASK			GENMASK(7, 3)</div><div class='add'>+#define CNTR_QUEUE_MASK			GENMASK(2, 0)</div><div class='add'>+</div><div class='add'>+#define REG_CNTR_VAL(_n)		(0x0404 + ((_n) &lt;&lt; 3))</div><div class='add'>+</div><div class='add'>+#define REG_LMGR_INIT_CFG		0x1000</div><div class='add'>+#define LMGR_INIT_START			BIT(31)</div><div class='add'>+#define LMGR_SRAM_MODE_MASK		BIT(30)</div><div class='add'>+#define HW_FWD_PKTSIZE_OVERHEAD_MASK	GENMASK(27, 20)</div><div class='add'>+#define HW_FWD_DESC_NUM_MASK		GENMASK(16, 0)</div><div class='add'>+</div><div class='add'>+#define REG_FWD_DSCP_LOW_THR		0x1004</div><div class='add'>+#define FWD_DSCP_LOW_THR_MASK		GENMASK(17, 0)</div><div class='add'>+</div><div class='add'>+#define REG_EGRESS_RATE_METER_CFG		0x100c</div><div class='add'>+#define EGRESS_RATE_METER_EN_MASK		BIT(31)</div><div class='add'>+#define EGRESS_RATE_METER_EQ_RATE_EN_MASK	BIT(17)</div><div class='add'>+#define EGRESS_RATE_METER_WINDOW_SZ_MASK	GENMASK(16, 12)</div><div class='add'>+#define EGRESS_RATE_METER_TIMESLICE_MASK	GENMASK(10, 0)</div><div class='add'>+</div><div class='add'>+#define REG_EGRESS_TRTCM_CFG		0x1010</div><div class='add'>+#define EGRESS_TRTCM_EN_MASK		BIT(31)</div><div class='add'>+#define EGRESS_TRTCM_MODE_MASK		BIT(30)</div><div class='add'>+#define EGRESS_SLOW_TICK_RATIO_MASK	GENMASK(29, 16)</div><div class='add'>+#define EGRESS_FAST_TICK_MASK		GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define TRTCM_PARAM_RW_MASK		BIT(31)</div><div class='add'>+#define TRTCM_PARAM_RW_DONE_MASK	BIT(30)</div><div class='add'>+#define TRTCM_PARAM_TYPE_MASK		GENMASK(29, 28)</div><div class='add'>+#define TRTCM_METER_GROUP_MASK		GENMASK(27, 26)</div><div class='add'>+#define TRTCM_PARAM_INDEX_MASK		GENMASK(23, 17)</div><div class='add'>+#define TRTCM_PARAM_RATE_TYPE_MASK	BIT(16)</div><div class='add'>+</div><div class='add'>+#define REG_TRTCM_CFG_PARAM(_n)		((_n) + 0x4)</div><div class='add'>+#define REG_TRTCM_DATA_LOW(_n)		((_n) + 0x8)</div><div class='add'>+#define REG_TRTCM_DATA_HIGH(_n)		((_n) + 0xc)</div><div class='add'>+</div><div class='add'>+#define RATE_LIMIT_PARAM_RW_MASK	BIT(31)</div><div class='add'>+#define RATE_LIMIT_PARAM_RW_DONE_MASK	BIT(30)</div><div class='add'>+#define RATE_LIMIT_PARAM_TYPE_MASK	GENMASK(29, 28)</div><div class='add'>+#define RATE_LIMIT_METER_GROUP_MASK	GENMASK(27, 26)</div><div class='add'>+#define RATE_LIMIT_PARAM_INDEX_MASK	GENMASK(23, 16)</div><div class='add'>+</div><div class='add'>+#define REG_TXWRR_MODE_CFG		0x1020</div><div class='add'>+#define TWRR_WEIGHT_SCALE_MASK		BIT(31)</div><div class='add'>+#define TWRR_WEIGHT_BASE_MASK		BIT(3)</div><div class='add'>+</div><div class='add'>+#define REG_TXWRR_WEIGHT_CFG		0x1024</div><div class='add'>+#define TWRR_RW_CMD_MASK		BIT(31)</div><div class='add'>+#define TWRR_RW_CMD_DONE		BIT(30)</div><div class='add'>+#define TWRR_CHAN_IDX_MASK		GENMASK(23, 19)</div><div class='add'>+#define TWRR_QUEUE_IDX_MASK		GENMASK(18, 16)</div><div class='add'>+#define TWRR_VALUE_MASK			GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define REG_PSE_BUF_USAGE_CFG		0x1028</div><div class='add'>+#define PSE_BUF_ESTIMATE_EN_MASK	BIT(29)</div><div class='add'>+</div><div class='add'>+#define REG_CHAN_QOS_MODE(_n)		(0x1040 + ((_n) &lt;&lt; 2))</div><div class='add'>+#define CHAN_QOS_MODE_MASK(_n)		GENMASK(2 + ((_n) &lt;&lt; 2), (_n) &lt;&lt; 2)</div><div class='add'>+</div><div class='add'>+#define REG_GLB_TRTCM_CFG		0x1080</div><div class='add'>+#define GLB_TRTCM_EN_MASK		BIT(31)</div><div class='add'>+#define GLB_TRTCM_MODE_MASK		BIT(30)</div><div class='add'>+#define GLB_SLOW_TICK_RATIO_MASK	GENMASK(29, 16)</div><div class='add'>+#define GLB_FAST_TICK_MASK		GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+#define REG_TXQ_CNGST_CFG		0x10a0</div><div class='add'>+#define TXQ_CNGST_DROP_EN		BIT(31)</div><div class='add'>+#define TXQ_CNGST_DEI_DROP_EN		BIT(30)</div><div class='add'>+</div><div class='add'>+#define REG_SLA_TRTCM_CFG		0x1150</div><div class='add'>+#define SLA_TRTCM_EN_MASK		BIT(31)</div><div class='add'>+#define SLA_TRTCM_MODE_MASK		BIT(30)</div><div class='add'>+#define SLA_SLOW_TICK_RATIO_MASK	GENMASK(29, 16)</div><div class='add'>+#define SLA_FAST_TICK_MASK		GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+/* CTRL */</div><div class='add'>+#define QDMA_DESC_DONE_MASK		BIT(31)</div><div class='add'>+#define QDMA_DESC_DROP_MASK		BIT(30) /* tx: drop - rx: overflow */</div><div class='add'>+#define QDMA_DESC_MORE_MASK		BIT(29) /* more SG elements */</div><div class='add'>+#define QDMA_DESC_DEI_MASK		BIT(25)</div><div class='add'>+#define QDMA_DESC_NO_DROP_MASK		BIT(24)</div><div class='add'>+#define QDMA_DESC_LEN_MASK		GENMASK(15, 0)</div><div class='add'>+/* DATA */</div><div class='add'>+#define QDMA_DESC_NEXT_ID_MASK		GENMASK(15, 0)</div><div class='add'>+/* TX MSG0 */</div><div class='add'>+#define QDMA_ETH_TXMSG_MIC_IDX_MASK	BIT(30)</div><div class='add'>+#define QDMA_ETH_TXMSG_SP_TAG_MASK	GENMASK(29, 14)</div><div class='add'>+#define QDMA_ETH_TXMSG_ICO_MASK		BIT(13)</div><div class='add'>+#define QDMA_ETH_TXMSG_UCO_MASK		BIT(12)</div><div class='add'>+#define QDMA_ETH_TXMSG_TCO_MASK		BIT(11)</div><div class='add'>+#define QDMA_ETH_TXMSG_TSO_MASK		BIT(10)</div><div class='add'>+#define QDMA_ETH_TXMSG_FAST_MASK	BIT(9)</div><div class='add'>+#define QDMA_ETH_TXMSG_OAM_MASK		BIT(8)</div><div class='add'>+#define QDMA_ETH_TXMSG_CHAN_MASK	GENMASK(7, 3)</div><div class='add'>+#define QDMA_ETH_TXMSG_QUEUE_MASK	GENMASK(2, 0)</div><div class='add'>+/* TX MSG1 */</div><div class='add'>+#define QDMA_ETH_TXMSG_NO_DROP		BIT(31)</div><div class='add'>+#define QDMA_ETH_TXMSG_METER_MASK	GENMASK(30, 24)	/* 0x7f no meters */</div><div class='add'>+#define QDMA_ETH_TXMSG_FPORT_MASK	GENMASK(23, 20)</div><div class='add'>+#define QDMA_ETH_TXMSG_NBOQ_MASK	GENMASK(19, 15)</div><div class='add'>+#define QDMA_ETH_TXMSG_HWF_MASK		BIT(14)</div><div class='add'>+#define QDMA_ETH_TXMSG_HOP_MASK		BIT(13)</div><div class='add'>+#define QDMA_ETH_TXMSG_PTP_MASK		BIT(12)</div><div class='add'>+#define QDMA_ETH_TXMSG_ACNT_G1_MASK	GENMASK(10, 6)	/* 0x1f do not count */</div><div class='add'>+#define QDMA_ETH_TXMSG_ACNT_G0_MASK	GENMASK(5, 0)	/* 0x3f do not count */</div><div class='add'>+</div><div class='add'>+/* RX MSG0 */</div><div class='add'>+#define QDMA_ETH_RXMSG_SPTAG		GENMASK(21, 14)</div><div class='add'>+/* RX MSG1 */</div><div class='add'>+#define QDMA_ETH_RXMSG_DEI_MASK		BIT(31)</div><div class='add'>+#define QDMA_ETH_RXMSG_IP6_MASK		BIT(30)</div><div class='add'>+#define QDMA_ETH_RXMSG_IP4_MASK		BIT(29)</div><div class='add'>+#define QDMA_ETH_RXMSG_IP4F_MASK	BIT(28)</div><div class='add'>+#define QDMA_ETH_RXMSG_L4_VALID_MASK	BIT(27)</div><div class='add'>+#define QDMA_ETH_RXMSG_L4F_MASK		BIT(26)</div><div class='add'>+#define QDMA_ETH_RXMSG_SPORT_MASK	GENMASK(25, 21)</div><div class='add'>+#define QDMA_ETH_RXMSG_CRSN_MASK	GENMASK(20, 16)</div><div class='add'>+#define QDMA_ETH_RXMSG_PPE_ENTRY_MASK	GENMASK(15, 0)</div><div class='add'>+</div><div class='add'>+struct airoha_qdma_desc {</div><div class='add'>+	__le32 rsv;</div><div class='add'>+	__le32 ctrl;</div><div class='add'>+	__le32 addr;</div><div class='add'>+	__le32 data;</div><div class='add'>+	__le32 msg0;</div><div class='add'>+	__le32 msg1;</div><div class='add'>+	__le32 msg2;</div><div class='add'>+	__le32 msg3;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* CTRL0 */</div><div class='add'>+#define QDMA_FWD_DESC_CTX_MASK		BIT(31)</div><div class='add'>+#define QDMA_FWD_DESC_RING_MASK		GENMASK(30, 28)</div><div class='add'>+#define QDMA_FWD_DESC_IDX_MASK		GENMASK(27, 16)</div><div class='add'>+#define QDMA_FWD_DESC_LEN_MASK		GENMASK(15, 0)</div><div class='add'>+/* CTRL1 */</div><div class='add'>+#define QDMA_FWD_DESC_FIRST_IDX_MASK	GENMASK(15, 0)</div><div class='add'>+/* CTRL2 */</div><div class='add'>+#define QDMA_FWD_DESC_MORE_PKT_NUM_MASK	GENMASK(2, 0)</div><div class='add'>+</div><div class='add'>+struct airoha_qdma_fwd_desc {</div><div class='add'>+	__le32 addr;</div><div class='add'>+	__le32 ctrl0;</div><div class='add'>+	__le32 ctrl1;</div><div class='add'>+	__le32 ctrl2;</div><div class='add'>+	__le32 msg0;</div><div class='add'>+	__le32 msg1;</div><div class='add'>+	__le32 rsv0;</div><div class='add'>+	__le32 rsv1;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif /* AIROHA_REGS_H */</div><div class='head'>diff --git a/drivers/net/ethernet/alacritech/Kconfig b/drivers/net/ethernet/alacritech/Kconfig<br/>new file mode 100644<br/>index 000000000000..5f285e18faf7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/alacritech/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/alacritech/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,29 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+config NET_VENDOR_ALACRITECH</div><div class='add'>+	bool "Alacritech devices"</div><div class='add'>+	default y</div><div class='add'>+	help</div><div class='add'>+	  If you have a network (Ethernet) card belonging to this class, say Y.</div><div class='add'>+</div><div class='add'>+	  Note that the answer to this question doesn't directly affect the</div><div class='add'>+	  kernel: saying N will just cause the configurator to skip all the</div><div class='add'>+	  questions about Alacritech devices. If you say Y, you will be asked</div><div class='add'>+	  for your specific device in the following questions.</div><div class='add'>+</div><div class='add'>+if NET_VENDOR_ALACRITECH</div><div class='add'>+</div><div class='add'>+config SLICOSS</div><div class='add'>+	tristate "Alacritech Slicoss support"</div><div class='add'>+	depends on PCI</div><div class='add'>+	select CRC32</div><div class='add'>+	help</div><div class='add'>+	  This driver supports Gigabit Ethernet adapters based on the</div><div class='add'>+	  Session Layer Interface (SLIC) technology by Alacritech.</div><div class='add'>+</div><div class='add'>+	  Supported are Mojave (1 port) and Oasis (1, 2 and 4 port) cards,</div><div class='add'>+	  both copper and fiber.</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose M here: the module</div><div class='add'>+	  will be called slicoss. This is recommended.</div><div class='add'>+</div><div class='add'>+endif # NET_VENDOR_ALACRITECH</div><div class='head'>diff --git a/drivers/net/ethernet/alacritech/Makefile b/drivers/net/ethernet/alacritech/Makefile<br/>new file mode 100644<br/>index 000000000000..4378aadf895b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/alacritech/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/alacritech/Makefile</a></div><div class='hunk'>@@ -0,0 +1,5 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+#</div><div class='add'>+# Makefile for the Alacritech Slicoss driver</div><div class='add'>+#</div><div class='add'>+obj-$(CONFIG_SLICOSS) += slicoss.o</div><div class='head'>diff --git a/drivers/net/ethernet/alacritech/slic.h b/drivers/net/ethernet/alacritech/slic.h<br/>new file mode 100644<br/>index 000000000000..82071d0e5f7f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/alacritech/slic.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/alacritech/slic.h</a></div><div class='hunk'>@@ -0,0 +1,573 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+</div><div class='add'>+#ifndef _SLIC_H</div><div class='add'>+#define _SLIC_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/spinlock_types.h&gt;</div><div class='add'>+#include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/list.h&gt;</div><div class='add'>+#include &lt;linux/u64_stats_sync.h&gt;</div><div class='add'>+</div><div class='add'>+#define SLIC_VGBSTAT_XPERR		0x40000000</div><div class='add'>+#define SLIC_VGBSTAT_XERRSHFT		25</div><div class='add'>+#define SLIC_VGBSTAT_XCSERR		0x23</div><div class='add'>+#define SLIC_VGBSTAT_XUFLOW		0x22</div><div class='add'>+#define SLIC_VGBSTAT_XHLEN		0x20</div><div class='add'>+#define SLIC_VGBSTAT_NETERR		0x01000000</div><div class='add'>+#define SLIC_VGBSTAT_NERRSHFT		16</div><div class='add'>+#define SLIC_VGBSTAT_NERRMSK		0x1ff</div><div class='add'>+#define SLIC_VGBSTAT_NCSERR		0x103</div><div class='add'>+#define SLIC_VGBSTAT_NUFLOW		0x102</div><div class='add'>+#define SLIC_VGBSTAT_NHLEN		0x100</div><div class='add'>+#define SLIC_VGBSTAT_LNKERR		0x00000080</div><div class='add'>+#define SLIC_VGBSTAT_LERRMSK		0xff</div><div class='add'>+#define SLIC_VGBSTAT_LDEARLY		0x86</div><div class='add'>+#define SLIC_VGBSTAT_LBOFLO		0x85</div><div class='add'>+#define SLIC_VGBSTAT_LCODERR		0x84</div><div class='add'>+#define SLIC_VGBSTAT_LDBLNBL		0x83</div><div class='add'>+#define SLIC_VGBSTAT_LCRCERR		0x82</div><div class='add'>+#define SLIC_VGBSTAT_LOFLO		0x81</div><div class='add'>+#define SLIC_VGBSTAT_LUFLO		0x80</div><div class='add'>+</div><div class='add'>+#define SLIC_IRHDDR_FLEN_MSK		0x0000ffff</div><div class='add'>+#define SLIC_IRHDDR_SVALID		0x80000000</div><div class='add'>+#define SLIC_IRHDDR_ERR			0x10000000</div><div class='add'>+</div><div class='add'>+#define SLIC_VRHSTAT_802OE		0x80000000</div><div class='add'>+#define SLIC_VRHSTAT_TPOFLO		0x10000000</div><div class='add'>+#define SLIC_VRHSTATB_802UE		0x80000000</div><div class='add'>+#define SLIC_VRHSTATB_RCVE		0x40000000</div><div class='add'>+#define SLIC_VRHSTATB_BUFF		0x20000000</div><div class='add'>+#define SLIC_VRHSTATB_CARRE		0x08000000</div><div class='add'>+#define SLIC_VRHSTATB_LONGE		0x02000000</div><div class='add'>+#define SLIC_VRHSTATB_PREA		0x01000000</div><div class='add'>+#define SLIC_VRHSTATB_CRC		0x00800000</div><div class='add'>+#define SLIC_VRHSTATB_DRBL		0x00400000</div><div class='add'>+#define SLIC_VRHSTATB_CODE		0x00200000</div><div class='add'>+#define SLIC_VRHSTATB_TPCSUM		0x00100000</div><div class='add'>+#define SLIC_VRHSTATB_TPHLEN		0x00080000</div><div class='add'>+#define SLIC_VRHSTATB_IPCSUM		0x00040000</div><div class='add'>+#define SLIC_VRHSTATB_IPLERR		0x00020000</div><div class='add'>+#define SLIC_VRHSTATB_IPHERR		0x00010000</div><div class='add'>+</div><div class='add'>+#define SLIC_CMD_XMT_REQ		0x01</div><div class='add'>+#define SLIC_CMD_TYPE_DUMB		3</div><div class='add'>+</div><div class='add'>+#define SLIC_RESET_MAGIC		0xDEAD</div><div class='add'>+#define SLIC_ICR_INT_OFF		0</div><div class='add'>+#define SLIC_ICR_INT_ON			1</div><div class='add'>+#define SLIC_ICR_INT_MASK		2</div><div class='add'>+</div><div class='add'>+#define SLIC_ISR_ERR			0x80000000</div><div class='add'>+#define SLIC_ISR_RCV			0x40000000</div><div class='add'>+#define SLIC_ISR_CMD			0x20000000</div><div class='add'>+#define SLIC_ISR_IO			0x60000000</div><div class='add'>+#define SLIC_ISR_UPC			0x10000000</div><div class='add'>+#define SLIC_ISR_LEVENT			0x08000000</div><div class='add'>+#define SLIC_ISR_RMISS			0x02000000</div><div class='add'>+#define SLIC_ISR_UPCERR			0x01000000</div><div class='add'>+#define SLIC_ISR_XDROP			0x00800000</div><div class='add'>+#define SLIC_ISR_UPCBSY			0x00020000</div><div class='add'>+</div><div class='add'>+#define SLIC_ISR_PING_MASK		0x00700000</div><div class='add'>+#define SLIC_ISR_UPCERR_MASK		(SLIC_ISR_UPCERR | SLIC_ISR_UPCBSY)</div><div class='add'>+#define SLIC_ISR_UPC_MASK		(SLIC_ISR_UPC | SLIC_ISR_UPCERR_MASK)</div><div class='add'>+#define SLIC_WCS_START			0x80000000</div><div class='add'>+#define SLIC_WCS_COMPARE		0x40000000</div><div class='add'>+#define SLIC_RCVWCS_BEGIN		0x40000000</div><div class='add'>+#define SLIC_RCVWCS_FINISH		0x80000000</div><div class='add'>+</div><div class='add'>+#define SLIC_MIICR_REG_16		0x00100000</div><div class='add'>+#define SLIC_MRV_REG16_XOVERON		0x0068</div><div class='add'>+</div><div class='add'>+#define SLIC_GIG_LINKUP			0x0001</div><div class='add'>+#define SLIC_GIG_FULLDUPLEX		0x0002</div><div class='add'>+#define SLIC_GIG_SPEED_MASK		0x000C</div><div class='add'>+#define SLIC_GIG_SPEED_1000		0x0008</div><div class='add'>+#define SLIC_GIG_SPEED_100		0x0004</div><div class='add'>+#define SLIC_GIG_SPEED_10		0x0000</div><div class='add'>+</div><div class='add'>+#define SLIC_GMCR_RESET			0x80000000</div><div class='add'>+#define SLIC_GMCR_GBIT			0x20000000</div><div class='add'>+#define SLIC_GMCR_FULLD			0x10000000</div><div class='add'>+#define SLIC_GMCR_GAPBB_SHIFT		14</div><div class='add'>+#define SLIC_GMCR_GAPR1_SHIFT		7</div><div class='add'>+#define SLIC_GMCR_GAPR2_SHIFT		0</div><div class='add'>+#define SLIC_GMCR_GAPBB_1000		0x60</div><div class='add'>+#define SLIC_GMCR_GAPR1_1000		0x2C</div><div class='add'>+#define SLIC_GMCR_GAPR2_1000		0x40</div><div class='add'>+#define SLIC_GMCR_GAPBB_100		0x70</div><div class='add'>+#define SLIC_GMCR_GAPR1_100		0x2C</div><div class='add'>+#define SLIC_GMCR_GAPR2_100		0x40</div><div class='add'>+</div><div class='add'>+#define SLIC_XCR_RESET			0x80000000</div><div class='add'>+#define SLIC_XCR_XMTEN			0x40000000</div><div class='add'>+#define SLIC_XCR_PAUSEEN		0x20000000</div><div class='add'>+#define SLIC_XCR_LOADRNG		0x10000000</div><div class='add'>+</div><div class='add'>+#define SLIC_GXCR_RESET			0x80000000</div><div class='add'>+#define SLIC_GXCR_XMTEN			0x40000000</div><div class='add'>+#define SLIC_GXCR_PAUSEEN		0x20000000</div><div class='add'>+</div><div class='add'>+#define SLIC_GRCR_RESET			0x80000000</div><div class='add'>+#define SLIC_GRCR_RCVEN			0x40000000</div><div class='add'>+#define SLIC_GRCR_RCVALL		0x20000000</div><div class='add'>+#define SLIC_GRCR_RCVBAD		0x10000000</div><div class='add'>+#define SLIC_GRCR_CTLEN			0x08000000</div><div class='add'>+#define SLIC_GRCR_ADDRAEN		0x02000000</div><div class='add'>+#define SLIC_GRCR_HASHSIZE_SHIFT	17</div><div class='add'>+#define SLIC_GRCR_HASHSIZE		14</div><div class='add'>+</div><div class='add'>+/* Reset Register */</div><div class='add'>+#define SLIC_REG_RESET			0x0000</div><div class='add'>+/* Interrupt Control Register */</div><div class='add'>+#define SLIC_REG_ICR			0x0008</div><div class='add'>+/* Interrupt status pointer */</div><div class='add'>+#define SLIC_REG_ISP			0x0010</div><div class='add'>+/* Interrupt status */</div><div class='add'>+#define SLIC_REG_ISR			0x0018</div><div class='add'>+/* Header buffer address reg</div><div class='add'>+ * 31-8 - phy addr of set of contiguous hdr buffers</div><div class='add'>+ *  7-0 - number of buffers passed</div><div class='add'>+ * Buffers are 256 bytes long on 256-byte boundaries.</div><div class='add'>+ */</div><div class='add'>+#define SLIC_REG_HBAR			0x0020</div><div class='add'>+/* Data buffer handle &amp; address reg</div><div class='add'>+ * 4 sets of registers; Buffers are 2K bytes long 2 per 4K page.</div><div class='add'>+ */</div><div class='add'>+#define SLIC_REG_DBAR			0x0028</div><div class='add'>+/* Xmt Cmd buf addr regs.</div><div class='add'>+ * 1 per XMT interface</div><div class='add'>+ * 31-5 - phy addr of host command buffer</div><div class='add'>+ *  4-0 - length of cmd in multiples of 32 bytes</div><div class='add'>+ * Buffers are 32 bytes up to 512 bytes long</div><div class='add'>+ */</div><div class='add'>+#define SLIC_REG_CBAR			0x0030</div><div class='add'>+/* Write control store */</div><div class='add'>+#define	SLIC_REG_WCS			0x0034</div><div class='add'>+/*Response buffer address reg.</div><div class='add'>+ * 31-8 - phy addr of set of contiguous response buffers</div><div class='add'>+ * 7-0 - number of buffers passed</div><div class='add'>+ * Buffers are 32 bytes long on 32-byte boundaries.</div><div class='add'>+ */</div><div class='add'>+#define	SLIC_REG_RBAR			0x0038</div><div class='add'>+/* Read statistics (UPR) */</div><div class='add'>+#define	SLIC_REG_RSTAT			0x0040</div><div class='add'>+/* Read link status */</div><div class='add'>+#define	SLIC_REG_LSTAT			0x0048</div><div class='add'>+/* Write Mac Config */</div><div class='add'>+#define	SLIC_REG_WMCFG			0x0050</div><div class='add'>+/* Write phy register */</div><div class='add'>+#define SLIC_REG_WPHY			0x0058</div><div class='add'>+/* Rcv Cmd buf addr reg */</div><div class='add'>+#define	SLIC_REG_RCBAR			0x0060</div><div class='add'>+/* Read SLIC Config*/</div><div class='add'>+#define SLIC_REG_RCONFIG		0x0068</div><div class='add'>+/* Interrupt aggregation time */</div><div class='add'>+#define SLIC_REG_INTAGG			0x0070</div><div class='add'>+/* Write XMIT config reg */</div><div class='add'>+#define	SLIC_REG_WXCFG			0x0078</div><div class='add'>+/* Write RCV config reg */</div><div class='add'>+#define	SLIC_REG_WRCFG			0x0080</div><div class='add'>+/* Write rcv addr a low */</div><div class='add'>+#define	SLIC_REG_WRADDRAL		0x0088</div><div class='add'>+/* Write rcv addr a high */</div><div class='add'>+#define	SLIC_REG_WRADDRAH		0x0090</div><div class='add'>+/* Write rcv addr b low */</div><div class='add'>+#define	SLIC_REG_WRADDRBL		0x0098</div><div class='add'>+/* Write rcv addr b high */</div><div class='add'>+#define	SLIC_REG_WRADDRBH		0x00a0</div><div class='add'>+/* Low bits of mcast mask */</div><div class='add'>+#define	SLIC_REG_MCASTLOW		0x00a8</div><div class='add'>+/* High bits of mcast mask */</div><div class='add'>+#define	SLIC_REG_MCASTHIGH		0x00b0</div><div class='add'>+/* Ping the card */</div><div class='add'>+#define SLIC_REG_PING			0x00b8</div><div class='add'>+/* Dump command */</div><div class='add'>+#define SLIC_REG_DUMP_CMD		0x00c0</div><div class='add'>+/* Dump data pointer */</div><div class='add'>+#define SLIC_REG_DUMP_DATA		0x00c8</div><div class='add'>+/* Read card's pci_status register */</div><div class='add'>+#define	SLIC_REG_PCISTATUS		0x00d0</div><div class='add'>+/* Write hostid field */</div><div class='add'>+#define SLIC_REG_WRHOSTID		0x00d8</div><div class='add'>+/* Put card in a low power state */</div><div class='add'>+#define SLIC_REG_LOW_POWER		0x00e0</div><div class='add'>+/* Force slic into quiescent state  before soft reset */</div><div class='add'>+#define SLIC_REG_QUIESCE		0x00e8</div><div class='add'>+/* Reset interface queues */</div><div class='add'>+#define SLIC_REG_RESET_IFACE		0x00f0</div><div class='add'>+/* Register is only written when it has changed.</div><div class='add'>+ * Bits 63-32 for host i/f addrs.</div><div class='add'>+ */</div><div class='add'>+#define SLIC_REG_ADDR_UPPER		0x00f8</div><div class='add'>+/* 64 bit Header buffer address reg */</div><div class='add'>+#define SLIC_REG_HBAR64			0x0100</div><div class='add'>+/* 64 bit Data buffer handle &amp; address reg */</div><div class='add'>+#define SLIC_REG_DBAR64			0x0108</div><div class='add'>+/* 64 bit Xmt Cmd buf addr regs. */</div><div class='add'>+#define SLIC_REG_CBAR64			0x0110</div><div class='add'>+/* 64 bit Response buffer address reg.*/</div><div class='add'>+#define SLIC_REG_RBAR64			0x0118</div><div class='add'>+/* 64 bit Rcv Cmd buf addr reg*/</div><div class='add'>+#define	SLIC_REG_RCBAR64		0x0120</div><div class='add'>+/* Read statistics (64 bit UPR) */</div><div class='add'>+#define	SLIC_REG_RSTAT64		0x0128</div><div class='add'>+/* Download Gigabit RCV sequencer ucode */</div><div class='add'>+#define SLIC_REG_RCV_WCS		0x0130</div><div class='add'>+/* Write VlanId field */</div><div class='add'>+#define SLIC_REG_WRVLANID		0x0138</div><div class='add'>+/* Read Transformer info */</div><div class='add'>+#define SLIC_REG_READ_XF_INFO		0x0140</div><div class='add'>+/* Write Transformer info */</div><div class='add'>+#define SLIC_REG_WRITE_XF_INFO		0x0148</div><div class='add'>+/* Write card ticks per second */</div><div class='add'>+#define SLIC_REG_TICKS_PER_SEC		0x0170</div><div class='add'>+#define SLIC_REG_HOSTID			0x1554</div><div class='add'>+</div><div class='add'>+#define PCI_VENDOR_ID_ALACRITECH		0x139A</div><div class='add'>+#define PCI_DEVICE_ID_ALACRITECH_MOJAVE		0x0005</div><div class='add'>+#define PCI_SUBDEVICE_ID_ALACRITECH_1000X1	0x0005</div><div class='add'>+#define PCI_SUBDEVICE_ID_ALACRITECH_1000X1_2	0x0006</div><div class='add'>+#define PCI_SUBDEVICE_ID_ALACRITECH_1000X1F	0x0007</div><div class='add'>+#define PCI_SUBDEVICE_ID_ALACRITECH_CICADA	0x0008</div><div class='add'>+#define PCI_SUBDEVICE_ID_ALACRITECH_SES1001T	0x2006</div><div class='add'>+#define PCI_SUBDEVICE_ID_ALACRITECH_SES1001F	0x2007</div><div class='add'>+#define PCI_DEVICE_ID_ALACRITECH_OASIS		0x0007</div><div class='add'>+#define PCI_SUBDEVICE_ID_ALACRITECH_SEN2002XT	0x000B</div><div class='add'>+#define PCI_SUBDEVICE_ID_ALACRITECH_SEN2002XF	0x000C</div><div class='add'>+#define PCI_SUBDEVICE_ID_ALACRITECH_SEN2001XT	0x000D</div><div class='add'>+#define PCI_SUBDEVICE_ID_ALACRITECH_SEN2001XF	0x000E</div><div class='add'>+#define PCI_SUBDEVICE_ID_ALACRITECH_SEN2104EF	0x000F</div><div class='add'>+#define PCI_SUBDEVICE_ID_ALACRITECH_SEN2104ET	0x0010</div><div class='add'>+#define PCI_SUBDEVICE_ID_ALACRITECH_SEN2102EF	0x0011</div><div class='add'>+#define PCI_SUBDEVICE_ID_ALACRITECH_SEN2102ET	0x0012</div><div class='add'>+</div><div class='add'>+/* Note: power of two required for number descriptors  */</div><div class='add'>+#define SLIC_NUM_RX_LES			256</div><div class='add'>+#define SLIC_RX_BUFF_SIZE		2048</div><div class='add'>+#define SLIC_RX_BUFF_ALIGN		256</div><div class='add'>+#define SLIC_RX_BUFF_HDR_SIZE		34</div><div class='add'>+#define SLIC_MAX_REQ_RX_DESCS		1</div><div class='add'>+</div><div class='add'>+#define SLIC_NUM_TX_DESCS		256</div><div class='add'>+#define SLIC_TX_DESC_ALIGN		32</div><div class='add'>+#define SLIC_MIN_TX_WAKEUP_DESCS	10</div><div class='add'>+#define SLIC_MAX_REQ_TX_DESCS		1</div><div class='add'>+#define SLIC_MAX_TX_COMPLETIONS		100</div><div class='add'>+</div><div class='add'>+#define SLIC_NUM_STAT_DESCS		128</div><div class='add'>+#define SLIC_STATS_DESC_ALIGN		256</div><div class='add'>+</div><div class='add'>+#define SLIC_NUM_STAT_DESC_ARRAYS	4</div><div class='add'>+#define SLIC_INVALID_STAT_DESC_IDX	0xffffffff</div><div class='add'>+</div><div class='add'>+#define SLIC_UPR_LSTAT			0</div><div class='add'>+#define SLIC_UPR_CONFIG			1</div><div class='add'>+</div><div class='add'>+#define SLIC_EEPROM_SIZE		128</div><div class='add'>+#define SLIC_EEPROM_MAGIC		0xa5a5</div><div class='add'>+</div><div class='add'>+#define SLIC_FIRMWARE_MOJAVE		"slicoss/gbdownload.sys"</div><div class='add'>+#define SLIC_FIRMWARE_OASIS		"slicoss/oasisdownload.sys"</div><div class='add'>+#define SLIC_RCV_FIRMWARE_MOJAVE	"slicoss/gbrcvucode.sys"</div><div class='add'>+#define SLIC_RCV_FIRMWARE_OASIS		"slicoss/oasisrcvucode.sys"</div><div class='add'>+#define SLIC_FIRMWARE_MIN_SIZE		64</div><div class='add'>+#define SLIC_FIRMWARE_MAX_SECTIONS	3</div><div class='add'>+</div><div class='add'>+#define SLIC_MODEL_MOJAVE		0</div><div class='add'>+#define SLIC_MODEL_OASIS		1</div><div class='add'>+</div><div class='add'>+#define SLIC_INC_STATS_COUNTER(st, counter)	\</div><div class='add'>+do {						\</div><div class='add'>+	u64_stats_update_begin(&amp;(st)-&gt;syncp);	\</div><div class='add'>+	(st)-&gt;counter++;			\</div><div class='add'>+	u64_stats_update_end(&amp;(st)-&gt;syncp);	\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+#define SLIC_GET_STATS_COUNTER(newst, st, counter)		\</div><div class='add'>+{								\</div><div class='add'>+	unsigned int start;					\</div><div class='add'>+	do {							\</div><div class='add'>+		start = u64_stats_fetch_begin(&amp;(st)-&gt;syncp);	\</div><div class='add'>+		newst = (st)-&gt;counter;				\</div><div class='add'>+	} while (u64_stats_fetch_retry(&amp;(st)-&gt;syncp, start));	\</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct slic_upr {</div><div class='add'>+	dma_addr_t paddr;</div><div class='add'>+	unsigned int type;</div><div class='add'>+	struct list_head list;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct slic_upr_list {</div><div class='add'>+	bool pending;</div><div class='add'>+	struct list_head list;</div><div class='add'>+	/* upr list lock */</div><div class='add'>+	spinlock_t lock;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SLIC EEPROM structure for Mojave */</div><div class='add'>+struct slic_mojave_eeprom {</div><div class='add'>+	__le16 id;		/* 00 EEPROM/FLASH Magic code 'A5A5'*/</div><div class='add'>+	__le16 eeprom_code_size;/* 01 Size of EEPROM Codes (bytes * 4)*/</div><div class='add'>+	__le16 flash_size;	/* 02 Flash size */</div><div class='add'>+	__le16 eeprom_size;	/* 03 EEPROM Size */</div><div class='add'>+	__le16 vendor_id;	/* 04 Vendor ID */</div><div class='add'>+	__le16 dev_id;		/* 05 Device ID */</div><div class='add'>+	u8 rev_id;		/* 06 Revision ID */</div><div class='add'>+	u8 class_code[3];	/* 07 Class Code */</div><div class='add'>+	u8 irqpin_dbg;		/* 08 Debug Interrupt pin */</div><div class='add'>+	u8 irqpin;		/*    Network Interrupt Pin */</div><div class='add'>+	u8 min_grant;		/* 09 Minimum grant */</div><div class='add'>+	u8 max_lat;		/*    Maximum Latency */</div><div class='add'>+	__le16 pci_stat;	/* 10 PCI Status */</div><div class='add'>+	__le16 sub_vendor_id;	/* 11 Subsystem Vendor Id */</div><div class='add'>+	__le16 sub_id;		/* 12 Subsystem ID */</div><div class='add'>+	__le16 dev_id_dbg;	/* 13 Debug Device Id */</div><div class='add'>+	__le16 ramrom;		/* 14 Dram/Rom function */</div><div class='add'>+	__le16 dram_size2pci;	/* 15 DRAM size to PCI (bytes * 64K) */</div><div class='add'>+	__le16 rom_size2pci;	/* 16 ROM extension size to PCI (bytes * 4k) */</div><div class='add'>+	u8 pad[2];		/* 17 Padding */</div><div class='add'>+	u8 freetime;		/* 18 FreeTime setting */</div><div class='add'>+	u8 ifctrl;		/* 10-bit interface control (Mojave only) */</div><div class='add'>+	__le16 dram_size;	/* 19 DRAM size (bytes * 64k) */</div><div class='add'>+	u8 mac[ETH_ALEN];	/* 20 MAC addresses */</div><div class='add'>+	u8 mac2[ETH_ALEN];</div><div class='add'>+	u8 pad2[6];</div><div class='add'>+	u16 dev_id2;		/* Device ID for 2nd PCI function */</div><div class='add'>+	u8 irqpin2;		/* Interrupt pin for 2nd PCI function */</div><div class='add'>+	u8 class_code2[3];	/* Class Code for 2nd PCI function */</div><div class='add'>+	u16 cfg_byte6;		/* Config Byte 6 */</div><div class='add'>+	u16 pme_cap;		/* Power Mgment capabilities */</div><div class='add'>+	u16 nwclk_ctrl;		/* NetworkClockControls */</div><div class='add'>+	u8 fru_format;		/* Alacritech FRU format type */</div><div class='add'>+	u8 fru_assembly[6];	/* Alacritech FRU information */</div><div class='add'>+	u8 fru_rev[2];</div><div class='add'>+	u8 fru_serial[14];</div><div class='add'>+	u8 fru_pad[3];</div><div class='add'>+	u8 oem_fru[28];		/* optional OEM FRU format type */</div><div class='add'>+	u8 pad3[4];		/* Pad to 128 bytes - includes 2 cksum bytes</div><div class='add'>+				 * (if OEM FRU info exists) and two unusable</div><div class='add'>+				 * bytes at the end</div><div class='add'>+				 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SLIC EEPROM structure for Oasis */</div><div class='add'>+struct slic_oasis_eeprom {</div><div class='add'>+	__le16 id;		/* 00 EEPROM/FLASH Magic code 'A5A5' */</div><div class='add'>+	__le16 eeprom_code_size;/* 01 Size of EEPROM Codes (bytes * 4)*/</div><div class='add'>+	__le16 spidev0_cfg;	/* 02 Flash Config for SPI device 0 */</div><div class='add'>+	__le16 spidev1_cfg;	/* 03 Flash Config for SPI device 1 */</div><div class='add'>+	__le16 vendor_id;	/* 04 Vendor ID */</div><div class='add'>+	__le16 dev_id;		/* 05 Device ID (function 0) */</div><div class='add'>+	u8 rev_id;		/* 06 Revision ID */</div><div class='add'>+	u8 class_code0[3];	/* 07 Class Code for PCI function 0 */</div><div class='add'>+	u8 irqpin1;		/* 08 Interrupt pin for PCI function 1*/</div><div class='add'>+	u8 class_code1[3];	/* 09 Class Code for PCI function 1 */</div><div class='add'>+	u8 irqpin2;		/* 10 Interrupt pin for PCI function 2*/</div><div class='add'>+	u8 irqpin0;		/*    Interrupt pin for PCI function 0*/</div><div class='add'>+	u8 min_grant;		/* 11 Minimum grant */</div><div class='add'>+	u8 max_lat;		/*    Maximum Latency */</div><div class='add'>+	__le16 sub_vendor_id;	/* 12 Subsystem Vendor Id */</div><div class='add'>+	__le16 sub_id;		/* 13 Subsystem ID */</div><div class='add'>+	__le16 flash_size;	/* 14 Flash size (bytes / 4K) */</div><div class='add'>+	__le16 dram_size2pci;	/* 15 DRAM size to PCI (bytes / 64K) */</div><div class='add'>+	__le16 rom_size2pci;	/* 16 Flash (ROM extension) size to PCI</div><div class='add'>+				 *   (bytes / 4K)</div><div class='add'>+				 */</div><div class='add'>+	__le16 dev_id1;		/* 17 Device Id (function 1) */</div><div class='add'>+	__le16 dev_id2;		/* 18 Device Id (function 2) */</div><div class='add'>+	__le16 dev_stat_cfg;	/* 19 Device Status Config Bytes 6-7 */</div><div class='add'>+	__le16 pme_cap;		/* 20 Power Mgment capabilities */</div><div class='add'>+	u8 msi_cap;		/* 21 MSI capabilities */</div><div class='add'>+	u8 clock_div;		/*    Clock divider */</div><div class='add'>+	__le16 pci_stat_lo;	/* 22 PCI Status bits 15:0 */</div><div class='add'>+	__le16 pci_stat_hi;	/* 23 PCI Status bits 31:16 */</div><div class='add'>+	__le16 dram_cfg_lo;	/* 24 DRAM Configuration bits 15:0 */</div><div class='add'>+	__le16 dram_cfg_hi;	/* 25 DRAM Configuration bits 31:16 */</div><div class='add'>+	__le16 dram_size;	/* 26 DRAM size (bytes / 64K) */</div><div class='add'>+	__le16 gpio_tbi_ctrl;	/* 27 GPIO/TBI controls for functions 1/0 */</div><div class='add'>+	__le16 eeprom_size;	/* 28 EEPROM Size */</div><div class='add'>+	u8 mac[ETH_ALEN];	/* 29 MAC addresses (2 ports) */</div><div class='add'>+	u8 mac2[ETH_ALEN];</div><div class='add'>+	u8 fru_format;		/* 35 Alacritech FRU format type */</div><div class='add'>+	u8 fru_assembly[6];	/* Alacritech FRU information */</div><div class='add'>+	u8 fru_rev[2];</div><div class='add'>+	u8 fru_serial[14];</div><div class='add'>+	u8 fru_pad[3];</div><div class='add'>+	u8 oem_fru[28];		/* optional OEM FRU information */</div><div class='add'>+	u8 pad[4];		/* Pad to 128 bytes - includes 2 checksum bytes</div><div class='add'>+				 * (if OEM FRU info exists) and two unusable</div><div class='add'>+				 * bytes at the end</div><div class='add'>+				 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct slic_stats {</div><div class='add'>+	u64 rx_packets;</div><div class='add'>+	u64 rx_bytes;</div><div class='add'>+	u64 rx_mcasts;</div><div class='add'>+	u64 rx_errors;</div><div class='add'>+	u64 tx_packets;</div><div class='add'>+	u64 tx_bytes;</div><div class='add'>+	/* HW STATS */</div><div class='add'>+	u64 rx_buff_miss;</div><div class='add'>+	u64 tx_dropped;</div><div class='add'>+	u64 irq_errs;</div><div class='add'>+	/* transport layer */</div><div class='add'>+	u64 rx_tpcsum;</div><div class='add'>+	u64 rx_tpoflow;</div><div class='add'>+	u64 rx_tphlen;</div><div class='add'>+	/* ip layer */</div><div class='add'>+	u64 rx_ipcsum;</div><div class='add'>+	u64 rx_iplen;</div><div class='add'>+	u64 rx_iphlen;</div><div class='add'>+	/* link layer */</div><div class='add'>+	u64 rx_early;</div><div class='add'>+	u64 rx_buffoflow;</div><div class='add'>+	u64 rx_lcode;</div><div class='add'>+	u64 rx_drbl;</div><div class='add'>+	u64 rx_crc;</div><div class='add'>+	u64 rx_oflow802;</div><div class='add'>+	u64 rx_uflow802;</div><div class='add'>+	/* oasis only */</div><div class='add'>+	u64 tx_carrier;</div><div class='add'>+	struct u64_stats_sync syncp;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct slic_shmem_data {</div><div class='add'>+	__le32 isr;</div><div class='add'>+	__le32 link;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct slic_shmem {</div><div class='add'>+	dma_addr_t isr_paddr;</div><div class='add'>+	dma_addr_t link_paddr;</div><div class='add'>+	struct slic_shmem_data *shmem_data;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct slic_rx_info_oasis {</div><div class='add'>+	__le32 frame_status;</div><div class='add'>+	__le32 frame_status_b;</div><div class='add'>+	__le32 time_stamp;</div><div class='add'>+	__le32 checksum;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct slic_rx_info_mojave {</div><div class='add'>+	__le32 frame_status;</div><div class='add'>+	__le16 byte_cnt;</div><div class='add'>+	__le16 tp_chksum;</div><div class='add'>+	__le16 ctx_hash;</div><div class='add'>+	__le16 mac_hash;</div><div class='add'>+	__le16 buff_lnk;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct slic_stat_desc {</div><div class='add'>+	__le32 hnd;</div><div class='add'>+	__u8 pad[8];</div><div class='add'>+	__le32 status;</div><div class='add'>+	__u8 pad2[16];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct slic_stat_queue {</div><div class='add'>+	struct slic_stat_desc *descs[SLIC_NUM_STAT_DESC_ARRAYS];</div><div class='add'>+	dma_addr_t paddr[SLIC_NUM_STAT_DESC_ARRAYS];</div><div class='add'>+	unsigned int addr_offset[SLIC_NUM_STAT_DESC_ARRAYS];</div><div class='add'>+	unsigned int active_array;</div><div class='add'>+	unsigned int len;</div><div class='add'>+	unsigned int done_idx;</div><div class='add'>+	size_t mem_size;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct slic_tx_desc {</div><div class='add'>+	__le32 hnd;</div><div class='add'>+	__le32 rsvd;</div><div class='add'>+	u8 cmd;</div><div class='add'>+	u8 flags;</div><div class='add'>+	__le16 rsvd2;</div><div class='add'>+	__le32 totlen;</div><div class='add'>+	__le32 paddrl;</div><div class='add'>+	__le32 paddrh;</div><div class='add'>+	__le32 len;</div><div class='add'>+	__le32 type;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct slic_tx_buffer {</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	DEFINE_DMA_UNMAP_ADDR(map_addr);</div><div class='add'>+	DEFINE_DMA_UNMAP_LEN(map_len);</div><div class='add'>+	struct slic_tx_desc *desc;</div><div class='add'>+	dma_addr_t desc_paddr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct slic_tx_queue {</div><div class='add'>+	struct dma_pool *dma_pool;</div><div class='add'>+	struct slic_tx_buffer *txbuffs;</div><div class='add'>+	unsigned int len;</div><div class='add'>+	unsigned int put_idx;</div><div class='add'>+	unsigned int done_idx;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct slic_rx_desc {</div><div class='add'>+	u8 pad[16];</div><div class='add'>+	__le32 buffer;</div><div class='add'>+	__le32 length;</div><div class='add'>+	__le32 status;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct slic_rx_buffer {</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	DEFINE_DMA_UNMAP_ADDR(map_addr);</div><div class='add'>+	DEFINE_DMA_UNMAP_LEN(map_len);</div><div class='add'>+	unsigned int addr_offset;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct slic_rx_queue {</div><div class='add'>+	struct slic_rx_buffer *rxbuffs;</div><div class='add'>+	unsigned int len;</div><div class='add'>+	unsigned int done_idx;</div><div class='add'>+	unsigned int put_idx;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct slic_device {</div><div class='add'>+	struct pci_dev *pdev;</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	void __iomem *regs;</div><div class='add'>+	/* upper address setting lock */</div><div class='add'>+	spinlock_t upper_lock;</div><div class='add'>+	struct slic_shmem shmem;</div><div class='add'>+	struct napi_struct napi;</div><div class='add'>+	struct slic_rx_queue rxq;</div><div class='add'>+	struct slic_tx_queue txq;</div><div class='add'>+	struct slic_stat_queue stq;</div><div class='add'>+	struct slic_stats stats;</div><div class='add'>+	struct slic_upr_list upr_list;</div><div class='add'>+	/* link configuration lock */</div><div class='add'>+	spinlock_t link_lock;</div><div class='add'>+	bool promisc;</div><div class='add'>+	int speed;</div><div class='add'>+	unsigned int duplex;</div><div class='add'>+	bool is_fiber;</div><div class='add'>+	unsigned char model;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline u32 slic_read(struct slic_device *sdev, unsigned int reg)</div><div class='add'>+{</div><div class='add'>+	return ioread32(sdev-&gt;regs + reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void slic_write(struct slic_device *sdev, unsigned int reg,</div><div class='add'>+			      u32 val)</div><div class='add'>+{</div><div class='add'>+	iowrite32(val, sdev-&gt;regs + reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void slic_flush_write(struct slic_device *sdev)</div><div class='add'>+{</div><div class='add'>+	(void)ioread32(sdev-&gt;regs + SLIC_REG_HOSTID);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* _SLIC_H */</div><div class='head'>diff --git a/drivers/net/ethernet/alacritech/slicoss.c b/drivers/net/ethernet/alacritech/slicoss.c<br/>new file mode 100644<br/>index 000000000000..f62851708d4f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/alacritech/slicoss.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/alacritech/slicoss.c</a></div><div class='hunk'>@@ -0,0 +1,1847 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/*</div><div class='add'>+ * Driver for Gigabit Ethernet adapters based on the Session Layer</div><div class='add'>+ * Interface (SLIC) technology by Alacritech. The driver does not</div><div class='add'>+ * support the hardware acceleration features provided by these cards.</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2016 Lino Sanfilippo &lt;LinoSanfilippo@gmx.de&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/if_ether.h&gt;</div><div class='add'>+#include &lt;linux/crc32.h&gt;</div><div class='add'>+#include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/mii.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/firmware.h&gt;</div><div class='add'>+#include &lt;linux/list.h&gt;</div><div class='add'>+#include &lt;linux/u64_stats_sync.h&gt;</div><div class='add'>+</div><div class='add'>+#include "slic.h"</div><div class='add'>+</div><div class='add'>+#define DRV_NAME			"slicoss"</div><div class='add'>+</div><div class='add'>+static const struct pci_device_id slic_id_tbl[] = {</div><div class='add'>+	{ PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH,</div><div class='add'>+		     PCI_DEVICE_ID_ALACRITECH_MOJAVE) },</div><div class='add'>+	{ PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH,</div><div class='add'>+		     PCI_DEVICE_ID_ALACRITECH_OASIS) },</div><div class='add'>+	{ 0 }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char slic_stats_strings[][ETH_GSTRING_LEN] = {</div><div class='add'>+	"rx_packets",</div><div class='add'>+	"rx_bytes",</div><div class='add'>+	"rx_multicasts",</div><div class='add'>+	"rx_errors",</div><div class='add'>+	"rx_buff_miss",</div><div class='add'>+	"rx_tp_csum",</div><div class='add'>+	"rx_tp_oflow",</div><div class='add'>+	"rx_tp_hlen",</div><div class='add'>+	"rx_ip_csum",</div><div class='add'>+	"rx_ip_len",</div><div class='add'>+	"rx_ip_hdr_len",</div><div class='add'>+	"rx_early",</div><div class='add'>+	"rx_buff_oflow",</div><div class='add'>+	"rx_lcode",</div><div class='add'>+	"rx_drbl",</div><div class='add'>+	"rx_crc",</div><div class='add'>+	"rx_oflow_802",</div><div class='add'>+	"rx_uflow_802",</div><div class='add'>+	"tx_packets",</div><div class='add'>+	"tx_bytes",</div><div class='add'>+	"tx_carrier",</div><div class='add'>+	"tx_dropped",</div><div class='add'>+	"irq_errs",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline int slic_next_queue_idx(unsigned int idx, unsigned int qlen)</div><div class='add'>+{</div><div class='add'>+	return (idx + 1) &amp; (qlen - 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int slic_get_free_queue_descs(unsigned int put_idx,</div><div class='add'>+					    unsigned int done_idx,</div><div class='add'>+					    unsigned int qlen)</div><div class='add'>+{</div><div class='add'>+	if (put_idx &gt;= done_idx)</div><div class='add'>+		return (qlen - (put_idx - done_idx) - 1);</div><div class='add'>+	return (done_idx - put_idx - 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int slic_next_compl_idx(struct slic_device *sdev)</div><div class='add'>+{</div><div class='add'>+	struct slic_stat_queue *stq = &amp;sdev-&gt;stq;</div><div class='add'>+	unsigned int active = stq-&gt;active_array;</div><div class='add'>+	struct slic_stat_desc *descs;</div><div class='add'>+	struct slic_stat_desc *stat;</div><div class='add'>+	unsigned int idx;</div><div class='add'>+</div><div class='add'>+	descs = stq-&gt;descs[active];</div><div class='add'>+	stat = &amp;descs[stq-&gt;done_idx];</div><div class='add'>+</div><div class='add'>+	if (!stat-&gt;status)</div><div class='add'>+		return SLIC_INVALID_STAT_DESC_IDX;</div><div class='add'>+</div><div class='add'>+	idx = (le32_to_cpu(stat-&gt;hnd) &amp; 0xffff) - 1;</div><div class='add'>+	/* reset desc */</div><div class='add'>+	stat-&gt;hnd = 0;</div><div class='add'>+	stat-&gt;status = 0;</div><div class='add'>+</div><div class='add'>+	stq-&gt;done_idx = slic_next_queue_idx(stq-&gt;done_idx, stq-&gt;len);</div><div class='add'>+	/* check for wraparound */</div><div class='add'>+	if (!stq-&gt;done_idx) {</div><div class='add'>+		dma_addr_t paddr = stq-&gt;paddr[active];</div><div class='add'>+</div><div class='add'>+		slic_write(sdev, SLIC_REG_RBAR, lower_32_bits(paddr) |</div><div class='add'>+						stq-&gt;len);</div><div class='add'>+		/* make sure new status descriptors are immediately available */</div><div class='add'>+		slic_flush_write(sdev);</div><div class='add'>+		active++;</div><div class='add'>+		active &amp;= (SLIC_NUM_STAT_DESC_ARRAYS - 1);</div><div class='add'>+		stq-&gt;active_array = active;</div><div class='add'>+	}</div><div class='add'>+	return idx;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int slic_get_free_tx_descs(struct slic_tx_queue *txq)</div><div class='add'>+{</div><div class='add'>+	/* ensure tail idx is updated */</div><div class='add'>+	smp_mb();</div><div class='add'>+	return slic_get_free_queue_descs(txq-&gt;put_idx, txq-&gt;done_idx, txq-&gt;len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int slic_get_free_rx_descs(struct slic_rx_queue *rxq)</div><div class='add'>+{</div><div class='add'>+	return slic_get_free_queue_descs(rxq-&gt;put_idx, rxq-&gt;done_idx, rxq-&gt;len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void slic_clear_upr_list(struct slic_upr_list *upr_list)</div><div class='add'>+{</div><div class='add'>+	struct slic_upr *upr;</div><div class='add'>+	struct slic_upr *tmp;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;upr_list-&gt;lock);</div><div class='add'>+	list_for_each_entry_safe(upr, tmp, &amp;upr_list-&gt;list, list) {</div><div class='add'>+		list_del(&amp;upr-&gt;list);</div><div class='add'>+		kfree(upr);</div><div class='add'>+	}</div><div class='add'>+	upr_list-&gt;pending = false;</div><div class='add'>+	spin_unlock_bh(&amp;upr_list-&gt;lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void slic_start_upr(struct slic_device *sdev, struct slic_upr *upr)</div><div class='add'>+{</div><div class='add'>+	u32 reg;</div><div class='add'>+</div><div class='add'>+	reg = (upr-&gt;type == SLIC_UPR_CONFIG) ? SLIC_REG_RCONFIG :</div><div class='add'>+					       SLIC_REG_LSTAT;</div><div class='add'>+	slic_write(sdev, reg, lower_32_bits(upr-&gt;paddr));</div><div class='add'>+	slic_flush_write(sdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void slic_queue_upr(struct slic_device *sdev, struct slic_upr *upr)</div><div class='add'>+{</div><div class='add'>+	struct slic_upr_list *upr_list = &amp;sdev-&gt;upr_list;</div><div class='add'>+	bool pending;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;upr_list-&gt;lock);</div><div class='add'>+	pending = upr_list-&gt;pending;</div><div class='add'>+	INIT_LIST_HEAD(&amp;upr-&gt;list);</div><div class='add'>+	list_add_tail(&amp;upr-&gt;list, &amp;upr_list-&gt;list);</div><div class='add'>+	upr_list-&gt;pending = true;</div><div class='add'>+	spin_unlock_bh(&amp;upr_list-&gt;lock);</div><div class='add'>+</div><div class='add'>+	if (!pending)</div><div class='add'>+		slic_start_upr(sdev, upr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct slic_upr *slic_dequeue_upr(struct slic_device *sdev)</div><div class='add'>+{</div><div class='add'>+	struct slic_upr_list *upr_list = &amp;sdev-&gt;upr_list;</div><div class='add'>+	struct slic_upr *next_upr = NULL;</div><div class='add'>+	struct slic_upr *upr = NULL;</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;upr_list-&gt;lock);</div><div class='add'>+	if (!list_empty(&amp;upr_list-&gt;list)) {</div><div class='add'>+		upr = list_first_entry(&amp;upr_list-&gt;list, struct slic_upr, list);</div><div class='add'>+		list_del(&amp;upr-&gt;list);</div><div class='add'>+</div><div class='add'>+		if (list_empty(&amp;upr_list-&gt;list))</div><div class='add'>+			upr_list-&gt;pending = false;</div><div class='add'>+		else</div><div class='add'>+			next_upr = list_first_entry(&amp;upr_list-&gt;list,</div><div class='add'>+						    struct slic_upr, list);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_bh(&amp;upr_list-&gt;lock);</div><div class='add'>+	/* trigger processing of the next upr in list */</div><div class='add'>+	if (next_upr)</div><div class='add'>+		slic_start_upr(sdev, next_upr);</div><div class='add'>+</div><div class='add'>+	return upr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int slic_new_upr(struct slic_device *sdev, unsigned int type,</div><div class='add'>+			dma_addr_t paddr)</div><div class='add'>+{</div><div class='add'>+	struct slic_upr *upr;</div><div class='add'>+</div><div class='add'>+	upr = kmalloc(sizeof(*upr), GFP_ATOMIC);</div><div class='add'>+	if (!upr)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	upr-&gt;type = type;</div><div class='add'>+	upr-&gt;paddr = paddr;</div><div class='add'>+</div><div class='add'>+	slic_queue_upr(sdev, upr);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void slic_set_mcast_bit(u64 *mcmask, unsigned char const *addr)</div><div class='add'>+{</div><div class='add'>+	u64 mask = *mcmask;</div><div class='add'>+	u8 crc;</div><div class='add'>+	/* Get the CRC polynomial for the mac address: we use bits 1-8 (lsb),</div><div class='add'>+	 * bitwise reversed, msb (= lsb bit 0 before bitrev) is automatically</div><div class='add'>+	 * discarded.</div><div class='add'>+	 */</div><div class='add'>+	crc = ether_crc(ETH_ALEN, addr) &gt;&gt; 23;</div><div class='add'>+	 /* we only have space on the SLIC for 64 entries */</div><div class='add'>+	crc &amp;= 0x3F;</div><div class='add'>+	mask |= (u64)1 &lt;&lt; crc;</div><div class='add'>+	*mcmask = mask;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* must be called with link_lock held */</div><div class='add'>+static void slic_configure_rcv(struct slic_device *sdev)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = SLIC_GRCR_RESET | SLIC_GRCR_ADDRAEN | SLIC_GRCR_RCVEN |</div><div class='add'>+	      SLIC_GRCR_HASHSIZE &lt;&lt; SLIC_GRCR_HASHSIZE_SHIFT | SLIC_GRCR_RCVBAD;</div><div class='add'>+</div><div class='add'>+	if (sdev-&gt;duplex == DUPLEX_FULL)</div><div class='add'>+		val |= SLIC_GRCR_CTLEN;</div><div class='add'>+</div><div class='add'>+	if (sdev-&gt;promisc)</div><div class='add'>+		val |= SLIC_GRCR_RCVALL;</div><div class='add'>+</div><div class='add'>+	slic_write(sdev, SLIC_REG_WRCFG, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* must be called with link_lock held */</div><div class='add'>+static void slic_configure_xmt(struct slic_device *sdev)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = SLIC_GXCR_RESET | SLIC_GXCR_XMTEN;</div><div class='add'>+</div><div class='add'>+	if (sdev-&gt;duplex == DUPLEX_FULL)</div><div class='add'>+		val |= SLIC_GXCR_PAUSEEN;</div><div class='add'>+</div><div class='add'>+	slic_write(sdev, SLIC_REG_WXCFG, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* must be called with link_lock held */</div><div class='add'>+static void slic_configure_mac(struct slic_device *sdev)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	if (sdev-&gt;speed == SPEED_1000) {</div><div class='add'>+		val = SLIC_GMCR_GAPBB_1000 &lt;&lt; SLIC_GMCR_GAPBB_SHIFT |</div><div class='add'>+		      SLIC_GMCR_GAPR1_1000 &lt;&lt; SLIC_GMCR_GAPR1_SHIFT |</div><div class='add'>+		      SLIC_GMCR_GAPR2_1000 &lt;&lt; SLIC_GMCR_GAPR2_SHIFT |</div><div class='add'>+		      SLIC_GMCR_GBIT; /* enable GMII */</div><div class='add'>+	} else {</div><div class='add'>+		val = SLIC_GMCR_GAPBB_100 &lt;&lt; SLIC_GMCR_GAPBB_SHIFT |</div><div class='add'>+		      SLIC_GMCR_GAPR1_100 &lt;&lt; SLIC_GMCR_GAPR1_SHIFT |</div><div class='add'>+		      SLIC_GMCR_GAPR2_100 &lt;&lt; SLIC_GMCR_GAPR2_SHIFT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (sdev-&gt;duplex == DUPLEX_FULL)</div><div class='add'>+		val |= SLIC_GMCR_FULLD;</div><div class='add'>+</div><div class='add'>+	slic_write(sdev, SLIC_REG_WMCFG, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void slic_configure_link_locked(struct slic_device *sdev, int speed,</div><div class='add'>+				       unsigned int duplex)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = sdev-&gt;netdev;</div><div class='add'>+</div><div class='add'>+	if (sdev-&gt;speed == speed &amp;&amp; sdev-&gt;duplex == duplex)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	sdev-&gt;speed = speed;</div><div class='add'>+	sdev-&gt;duplex = duplex;</div><div class='add'>+</div><div class='add'>+	if (sdev-&gt;speed == SPEED_UNKNOWN) {</div><div class='add'>+		if (netif_carrier_ok(dev))</div><div class='add'>+			netif_carrier_off(dev);</div><div class='add'>+	} else {</div><div class='add'>+		/* (re)configure link settings */</div><div class='add'>+		slic_configure_mac(sdev);</div><div class='add'>+		slic_configure_xmt(sdev);</div><div class='add'>+		slic_configure_rcv(sdev);</div><div class='add'>+		slic_flush_write(sdev);</div><div class='add'>+</div><div class='add'>+		if (!netif_carrier_ok(dev))</div><div class='add'>+			netif_carrier_on(dev);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void slic_configure_link(struct slic_device *sdev, int speed,</div><div class='add'>+				unsigned int duplex)</div><div class='add'>+{</div><div class='add'>+	spin_lock_bh(&amp;sdev-&gt;link_lock);</div><div class='add'>+	slic_configure_link_locked(sdev, speed, duplex);</div><div class='add'>+	spin_unlock_bh(&amp;sdev-&gt;link_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void slic_set_rx_mode(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct slic_device *sdev = netdev_priv(dev);</div><div class='add'>+	struct netdev_hw_addr *hwaddr;</div><div class='add'>+	bool set_promisc;</div><div class='add'>+	u64 mcmask;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;flags &amp; (IFF_PROMISC | IFF_ALLMULTI)) {</div><div class='add'>+		/* Turn on all multicast addresses. We have to do this for</div><div class='add'>+		 * promiscuous mode as well as ALLMCAST mode (it saves the</div><div class='add'>+		 * microcode from having to keep state about the MAC</div><div class='add'>+		 * configuration).</div><div class='add'>+		 */</div><div class='add'>+		mcmask = ~(u64)0;</div><div class='add'>+	} else  {</div><div class='add'>+		mcmask = 0;</div><div class='add'>+</div><div class='add'>+		netdev_for_each_mc_addr(hwaddr, dev) {</div><div class='add'>+			slic_set_mcast_bit(&amp;mcmask, hwaddr-&gt;addr);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	slic_write(sdev, SLIC_REG_MCASTLOW, lower_32_bits(mcmask));</div><div class='add'>+	slic_write(sdev, SLIC_REG_MCASTHIGH, upper_32_bits(mcmask));</div><div class='add'>+</div><div class='add'>+	set_promisc = !!(dev-&gt;flags &amp; IFF_PROMISC);</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;sdev-&gt;link_lock);</div><div class='add'>+	if (sdev-&gt;promisc != set_promisc) {</div><div class='add'>+		sdev-&gt;promisc = set_promisc;</div><div class='add'>+		slic_configure_rcv(sdev);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_bh(&amp;sdev-&gt;link_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void slic_xmit_complete(struct slic_device *sdev)</div><div class='add'>+{</div><div class='add'>+	struct slic_tx_queue *txq = &amp;sdev-&gt;txq;</div><div class='add'>+	struct net_device *dev = sdev-&gt;netdev;</div><div class='add'>+	struct slic_tx_buffer *buff;</div><div class='add'>+	unsigned int frames = 0;</div><div class='add'>+	unsigned int bytes = 0;</div><div class='add'>+	unsigned int idx;</div><div class='add'>+</div><div class='add'>+	/* Limit processing to SLIC_MAX_TX_COMPLETIONS frames to avoid that new</div><div class='add'>+	 * completions during processing keeps the loop running endlessly.</div><div class='add'>+	 */</div><div class='add'>+	do {</div><div class='add'>+		idx = slic_next_compl_idx(sdev);</div><div class='add'>+		if (idx == SLIC_INVALID_STAT_DESC_IDX)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		txq-&gt;done_idx = idx;</div><div class='add'>+		buff = &amp;txq-&gt;txbuffs[idx];</div><div class='add'>+</div><div class='add'>+		if (unlikely(!buff-&gt;skb)) {</div><div class='add'>+			netdev_warn(dev,</div><div class='add'>+				    "no skb found for desc idx %i\n", idx);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+		dma_unmap_single(&amp;sdev-&gt;pdev-&gt;dev,</div><div class='add'>+				 dma_unmap_addr(buff, map_addr),</div><div class='add'>+				 dma_unmap_len(buff, map_len), DMA_TO_DEVICE);</div><div class='add'>+</div><div class='add'>+		bytes += buff-&gt;skb-&gt;len;</div><div class='add'>+		frames++;</div><div class='add'>+</div><div class='add'>+		dev_kfree_skb_any(buff-&gt;skb);</div><div class='add'>+		buff-&gt;skb = NULL;</div><div class='add'>+	} while (frames &lt; SLIC_MAX_TX_COMPLETIONS);</div><div class='add'>+	/* make sure xmit sees the new value for done_idx */</div><div class='add'>+	smp_wmb();</div><div class='add'>+</div><div class='add'>+	u64_stats_update_begin(&amp;sdev-&gt;stats.syncp);</div><div class='add'>+	sdev-&gt;stats.tx_bytes += bytes;</div><div class='add'>+	sdev-&gt;stats.tx_packets += frames;</div><div class='add'>+	u64_stats_update_end(&amp;sdev-&gt;stats.syncp);</div><div class='add'>+</div><div class='add'>+	netif_tx_lock(dev);</div><div class='add'>+	if (netif_queue_stopped(dev) &amp;&amp;</div><div class='add'>+	    (slic_get_free_tx_descs(txq) &gt;= SLIC_MIN_TX_WAKEUP_DESCS))</div><div class='add'>+		netif_wake_queue(dev);</div><div class='add'>+	netif_tx_unlock(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void slic_refill_rx_queue(struct slic_device *sdev, gfp_t gfp)</div><div class='add'>+{</div><div class='add'>+	const unsigned int ALIGN_MASK = SLIC_RX_BUFF_ALIGN - 1;</div><div class='add'>+	unsigned int maplen = SLIC_RX_BUFF_SIZE;</div><div class='add'>+	struct slic_rx_queue *rxq = &amp;sdev-&gt;rxq;</div><div class='add'>+	struct net_device *dev = sdev-&gt;netdev;</div><div class='add'>+	struct slic_rx_buffer *buff;</div><div class='add'>+	struct slic_rx_desc *desc;</div><div class='add'>+	unsigned int misalign;</div><div class='add'>+	unsigned int offset;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	dma_addr_t paddr;</div><div class='add'>+</div><div class='add'>+	while (slic_get_free_rx_descs(rxq) &gt; SLIC_MAX_REQ_RX_DESCS) {</div><div class='add'>+		skb = alloc_skb(maplen + ALIGN_MASK, gfp);</div><div class='add'>+		if (!skb)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		paddr = dma_map_single(&amp;sdev-&gt;pdev-&gt;dev, skb-&gt;data, maplen,</div><div class='add'>+				       DMA_FROM_DEVICE);</div><div class='add'>+		if (dma_mapping_error(&amp;sdev-&gt;pdev-&gt;dev, paddr)) {</div><div class='add'>+			netdev_err(dev, "mapping rx packet failed\n");</div><div class='add'>+			/* drop skb */</div><div class='add'>+			dev_kfree_skb_any(skb);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		/* ensure head buffer descriptors are 256 byte aligned */</div><div class='add'>+		offset = 0;</div><div class='add'>+		misalign = paddr &amp; ALIGN_MASK;</div><div class='add'>+		if (misalign) {</div><div class='add'>+			offset = SLIC_RX_BUFF_ALIGN - misalign;</div><div class='add'>+			skb_reserve(skb, offset);</div><div class='add'>+		}</div><div class='add'>+		/* the HW expects dma chunks for descriptor + frame data */</div><div class='add'>+		desc = (struct slic_rx_desc *)skb-&gt;data;</div><div class='add'>+		/* temporarily sync descriptor for CPU to clear status */</div><div class='add'>+		dma_sync_single_for_cpu(&amp;sdev-&gt;pdev-&gt;dev, paddr,</div><div class='add'>+					offset + sizeof(*desc),</div><div class='add'>+					DMA_FROM_DEVICE);</div><div class='add'>+		desc-&gt;status = 0;</div><div class='add'>+		/* return it to HW again */</div><div class='add'>+		dma_sync_single_for_device(&amp;sdev-&gt;pdev-&gt;dev, paddr,</div><div class='add'>+					   offset + sizeof(*desc),</div><div class='add'>+					   DMA_FROM_DEVICE);</div><div class='add'>+</div><div class='add'>+		buff = &amp;rxq-&gt;rxbuffs[rxq-&gt;put_idx];</div><div class='add'>+		buff-&gt;skb = skb;</div><div class='add'>+		dma_unmap_addr_set(buff, map_addr, paddr);</div><div class='add'>+		dma_unmap_len_set(buff, map_len, maplen);</div><div class='add'>+		buff-&gt;addr_offset = offset;</div><div class='add'>+		/* complete write to descriptor before it is handed to HW */</div><div class='add'>+		wmb();</div><div class='add'>+		/* head buffer descriptors are placed immediately before skb */</div><div class='add'>+		slic_write(sdev, SLIC_REG_HBAR, lower_32_bits(paddr) + offset);</div><div class='add'>+		rxq-&gt;put_idx = slic_next_queue_idx(rxq-&gt;put_idx, rxq-&gt;len);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void slic_handle_frame_error(struct slic_device *sdev,</div><div class='add'>+				    struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct slic_stats *stats = &amp;sdev-&gt;stats;</div><div class='add'>+</div><div class='add'>+	if (sdev-&gt;model == SLIC_MODEL_OASIS) {</div><div class='add'>+		struct slic_rx_info_oasis *info;</div><div class='add'>+		u32 status_b;</div><div class='add'>+		u32 status;</div><div class='add'>+</div><div class='add'>+		info = (struct slic_rx_info_oasis *)skb-&gt;data;</div><div class='add'>+		status = le32_to_cpu(info-&gt;frame_status);</div><div class='add'>+		status_b = le32_to_cpu(info-&gt;frame_status_b);</div><div class='add'>+		/* transport layer */</div><div class='add'>+		if (status_b &amp; SLIC_VRHSTATB_TPCSUM)</div><div class='add'>+			SLIC_INC_STATS_COUNTER(stats, rx_tpcsum);</div><div class='add'>+		if (status &amp; SLIC_VRHSTAT_TPOFLO)</div><div class='add'>+			SLIC_INC_STATS_COUNTER(stats, rx_tpoflow);</div><div class='add'>+		if (status_b &amp; SLIC_VRHSTATB_TPHLEN)</div><div class='add'>+			SLIC_INC_STATS_COUNTER(stats, rx_tphlen);</div><div class='add'>+		/* ip layer */</div><div class='add'>+		if (status_b &amp; SLIC_VRHSTATB_IPCSUM)</div><div class='add'>+			SLIC_INC_STATS_COUNTER(stats, rx_ipcsum);</div><div class='add'>+		if (status_b &amp; SLIC_VRHSTATB_IPLERR)</div><div class='add'>+			SLIC_INC_STATS_COUNTER(stats, rx_iplen);</div><div class='add'>+		if (status_b &amp; SLIC_VRHSTATB_IPHERR)</div><div class='add'>+			SLIC_INC_STATS_COUNTER(stats, rx_iphlen);</div><div class='add'>+		/* link layer */</div><div class='add'>+		if (status_b &amp; SLIC_VRHSTATB_RCVE)</div><div class='add'>+			SLIC_INC_STATS_COUNTER(stats, rx_early);</div><div class='add'>+		if (status_b &amp; SLIC_VRHSTATB_BUFF)</div><div class='add'>+			SLIC_INC_STATS_COUNTER(stats, rx_buffoflow);</div><div class='add'>+		if (status_b &amp; SLIC_VRHSTATB_CODE)</div><div class='add'>+			SLIC_INC_STATS_COUNTER(stats, rx_lcode);</div><div class='add'>+		if (status_b &amp; SLIC_VRHSTATB_DRBL)</div><div class='add'>+			SLIC_INC_STATS_COUNTER(stats, rx_drbl);</div><div class='add'>+		if (status_b &amp; SLIC_VRHSTATB_CRC)</div><div class='add'>+			SLIC_INC_STATS_COUNTER(stats, rx_crc);</div><div class='add'>+		if (status &amp; SLIC_VRHSTAT_802OE)</div><div class='add'>+			SLIC_INC_STATS_COUNTER(stats, rx_oflow802);</div><div class='add'>+		if (status_b &amp; SLIC_VRHSTATB_802UE)</div><div class='add'>+			SLIC_INC_STATS_COUNTER(stats, rx_uflow802);</div><div class='add'>+		if (status_b &amp; SLIC_VRHSTATB_CARRE)</div><div class='add'>+			SLIC_INC_STATS_COUNTER(stats, tx_carrier);</div><div class='add'>+	} else { /* mojave */</div><div class='add'>+		struct slic_rx_info_mojave *info;</div><div class='add'>+		u32 status;</div><div class='add'>+</div><div class='add'>+		info = (struct slic_rx_info_mojave *)skb-&gt;data;</div><div class='add'>+		status = le32_to_cpu(info-&gt;frame_status);</div><div class='add'>+		/* transport layer */</div><div class='add'>+		if (status &amp; SLIC_VGBSTAT_XPERR) {</div><div class='add'>+			u32 xerr = status &gt;&gt; SLIC_VGBSTAT_XERRSHFT;</div><div class='add'>+</div><div class='add'>+			if (xerr == SLIC_VGBSTAT_XCSERR)</div><div class='add'>+				SLIC_INC_STATS_COUNTER(stats, rx_tpcsum);</div><div class='add'>+			if (xerr == SLIC_VGBSTAT_XUFLOW)</div><div class='add'>+				SLIC_INC_STATS_COUNTER(stats, rx_tpoflow);</div><div class='add'>+			if (xerr == SLIC_VGBSTAT_XHLEN)</div><div class='add'>+				SLIC_INC_STATS_COUNTER(stats, rx_tphlen);</div><div class='add'>+		}</div><div class='add'>+		/* ip layer */</div><div class='add'>+		if (status &amp; SLIC_VGBSTAT_NETERR) {</div><div class='add'>+			u32 nerr = status &gt;&gt; SLIC_VGBSTAT_NERRSHFT &amp;</div><div class='add'>+				   SLIC_VGBSTAT_NERRMSK;</div><div class='add'>+</div><div class='add'>+			if (nerr == SLIC_VGBSTAT_NCSERR)</div><div class='add'>+				SLIC_INC_STATS_COUNTER(stats, rx_ipcsum);</div><div class='add'>+			if (nerr == SLIC_VGBSTAT_NUFLOW)</div><div class='add'>+				SLIC_INC_STATS_COUNTER(stats, rx_iplen);</div><div class='add'>+			if (nerr == SLIC_VGBSTAT_NHLEN)</div><div class='add'>+				SLIC_INC_STATS_COUNTER(stats, rx_iphlen);</div><div class='add'>+		}</div><div class='add'>+		/* link layer */</div><div class='add'>+		if (status &amp; SLIC_VGBSTAT_LNKERR) {</div><div class='add'>+			u32 lerr = status &amp; SLIC_VGBSTAT_LERRMSK;</div><div class='add'>+</div><div class='add'>+			if (lerr == SLIC_VGBSTAT_LDEARLY)</div><div class='add'>+				SLIC_INC_STATS_COUNTER(stats, rx_early);</div><div class='add'>+			if (lerr == SLIC_VGBSTAT_LBOFLO)</div><div class='add'>+				SLIC_INC_STATS_COUNTER(stats, rx_buffoflow);</div><div class='add'>+			if (lerr == SLIC_VGBSTAT_LCODERR)</div><div class='add'>+				SLIC_INC_STATS_COUNTER(stats, rx_lcode);</div><div class='add'>+			if (lerr == SLIC_VGBSTAT_LDBLNBL)</div><div class='add'>+				SLIC_INC_STATS_COUNTER(stats, rx_drbl);</div><div class='add'>+			if (lerr == SLIC_VGBSTAT_LCRCERR)</div><div class='add'>+				SLIC_INC_STATS_COUNTER(stats, rx_crc);</div><div class='add'>+			if (lerr == SLIC_VGBSTAT_LOFLO)</div><div class='add'>+				SLIC_INC_STATS_COUNTER(stats, rx_oflow802);</div><div class='add'>+			if (lerr == SLIC_VGBSTAT_LUFLO)</div><div class='add'>+				SLIC_INC_STATS_COUNTER(stats, rx_uflow802);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	SLIC_INC_STATS_COUNTER(stats, rx_errors);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void slic_handle_receive(struct slic_device *sdev, unsigned int todo,</div><div class='add'>+				unsigned int *done)</div><div class='add'>+{</div><div class='add'>+	struct slic_rx_queue *rxq = &amp;sdev-&gt;rxq;</div><div class='add'>+	struct net_device *dev = sdev-&gt;netdev;</div><div class='add'>+	struct slic_rx_buffer *buff;</div><div class='add'>+	struct slic_rx_desc *desc;</div><div class='add'>+	unsigned int frames = 0;</div><div class='add'>+	unsigned int bytes = 0;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	u32 status;</div><div class='add'>+	u32 len;</div><div class='add'>+</div><div class='add'>+	while (todo &amp;&amp; (rxq-&gt;done_idx != rxq-&gt;put_idx)) {</div><div class='add'>+		buff = &amp;rxq-&gt;rxbuffs[rxq-&gt;done_idx];</div><div class='add'>+</div><div class='add'>+		skb = buff-&gt;skb;</div><div class='add'>+		if (!skb)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		desc = (struct slic_rx_desc *)skb-&gt;data;</div><div class='add'>+</div><div class='add'>+		dma_sync_single_for_cpu(&amp;sdev-&gt;pdev-&gt;dev,</div><div class='add'>+					dma_unmap_addr(buff, map_addr),</div><div class='add'>+					buff-&gt;addr_offset + sizeof(*desc),</div><div class='add'>+					DMA_FROM_DEVICE);</div><div class='add'>+</div><div class='add'>+		status = le32_to_cpu(desc-&gt;status);</div><div class='add'>+		if (!(status &amp; SLIC_IRHDDR_SVALID)) {</div><div class='add'>+			dma_sync_single_for_device(&amp;sdev-&gt;pdev-&gt;dev,</div><div class='add'>+						   dma_unmap_addr(buff,</div><div class='add'>+								  map_addr),</div><div class='add'>+						   buff-&gt;addr_offset +</div><div class='add'>+						   sizeof(*desc),</div><div class='add'>+						   DMA_FROM_DEVICE);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		buff-&gt;skb = NULL;</div><div class='add'>+</div><div class='add'>+		dma_unmap_single(&amp;sdev-&gt;pdev-&gt;dev,</div><div class='add'>+				 dma_unmap_addr(buff, map_addr),</div><div class='add'>+				 dma_unmap_len(buff, map_len),</div><div class='add'>+				 DMA_FROM_DEVICE);</div><div class='add'>+</div><div class='add'>+		/* skip rx descriptor that is placed before the frame data */</div><div class='add'>+		skb_reserve(skb, SLIC_RX_BUFF_HDR_SIZE);</div><div class='add'>+</div><div class='add'>+		if (unlikely(status &amp; SLIC_IRHDDR_ERR)) {</div><div class='add'>+			slic_handle_frame_error(sdev, skb);</div><div class='add'>+			dev_kfree_skb_any(skb);</div><div class='add'>+		} else {</div><div class='add'>+			struct ethhdr *eh = (struct ethhdr *)skb-&gt;data;</div><div class='add'>+</div><div class='add'>+			if (is_multicast_ether_addr(eh-&gt;h_dest))</div><div class='add'>+				SLIC_INC_STATS_COUNTER(&amp;sdev-&gt;stats, rx_mcasts);</div><div class='add'>+</div><div class='add'>+			len = le32_to_cpu(desc-&gt;length) &amp; SLIC_IRHDDR_FLEN_MSK;</div><div class='add'>+			skb_put(skb, len);</div><div class='add'>+			skb-&gt;protocol = eth_type_trans(skb, dev);</div><div class='add'>+			skb-&gt;ip_summed = CHECKSUM_UNNECESSARY;</div><div class='add'>+</div><div class='add'>+			napi_gro_receive(&amp;sdev-&gt;napi, skb);</div><div class='add'>+</div><div class='add'>+			bytes += len;</div><div class='add'>+			frames++;</div><div class='add'>+		}</div><div class='add'>+		rxq-&gt;done_idx = slic_next_queue_idx(rxq-&gt;done_idx, rxq-&gt;len);</div><div class='add'>+		todo--;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	u64_stats_update_begin(&amp;sdev-&gt;stats.syncp);</div><div class='add'>+	sdev-&gt;stats.rx_bytes += bytes;</div><div class='add'>+	sdev-&gt;stats.rx_packets += frames;</div><div class='add'>+	u64_stats_update_end(&amp;sdev-&gt;stats.syncp);</div><div class='add'>+</div><div class='add'>+	slic_refill_rx_queue(sdev, GFP_ATOMIC);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void slic_handle_link_irq(struct slic_device *sdev)</div><div class='add'>+{</div><div class='add'>+	struct slic_shmem *sm = &amp;sdev-&gt;shmem;</div><div class='add'>+	struct slic_shmem_data *sm_data = sm-&gt;shmem_data;</div><div class='add'>+	unsigned int duplex;</div><div class='add'>+	int speed;</div><div class='add'>+	u32 link;</div><div class='add'>+</div><div class='add'>+	link = le32_to_cpu(sm_data-&gt;link);</div><div class='add'>+</div><div class='add'>+	if (link &amp; SLIC_GIG_LINKUP) {</div><div class='add'>+		if (link &amp; SLIC_GIG_SPEED_1000)</div><div class='add'>+			speed = SPEED_1000;</div><div class='add'>+		else if (link &amp; SLIC_GIG_SPEED_100)</div><div class='add'>+			speed = SPEED_100;</div><div class='add'>+		else</div><div class='add'>+			speed = SPEED_10;</div><div class='add'>+</div><div class='add'>+		duplex = (link &amp; SLIC_GIG_FULLDUPLEX) ? DUPLEX_FULL :</div><div class='add'>+							DUPLEX_HALF;</div><div class='add'>+	} else {</div><div class='add'>+		duplex = DUPLEX_UNKNOWN;</div><div class='add'>+		speed = SPEED_UNKNOWN;</div><div class='add'>+	}</div><div class='add'>+	slic_configure_link(sdev, speed, duplex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void slic_handle_upr_irq(struct slic_device *sdev, u32 irqs)</div><div class='add'>+{</div><div class='add'>+	struct slic_upr *upr;</div><div class='add'>+</div><div class='add'>+	/* remove upr that caused this irq (always the first entry in list) */</div><div class='add'>+	upr = slic_dequeue_upr(sdev);</div><div class='add'>+	if (!upr) {</div><div class='add'>+		netdev_warn(sdev-&gt;netdev, "no upr found on list\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (upr-&gt;type == SLIC_UPR_LSTAT) {</div><div class='add'>+		if (unlikely(irqs &amp; SLIC_ISR_UPCERR_MASK)) {</div><div class='add'>+			/* try again */</div><div class='add'>+			slic_queue_upr(sdev, upr);</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+		slic_handle_link_irq(sdev);</div><div class='add'>+	}</div><div class='add'>+	kfree(upr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int slic_handle_link_change(struct slic_device *sdev)</div><div class='add'>+{</div><div class='add'>+	return slic_new_upr(sdev, SLIC_UPR_LSTAT, sdev-&gt;shmem.link_paddr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void slic_handle_err_irq(struct slic_device *sdev, u32 isr)</div><div class='add'>+{</div><div class='add'>+	struct slic_stats *stats = &amp;sdev-&gt;stats;</div><div class='add'>+</div><div class='add'>+	if (isr &amp; SLIC_ISR_RMISS)</div><div class='add'>+		SLIC_INC_STATS_COUNTER(stats, rx_buff_miss);</div><div class='add'>+	if (isr &amp; SLIC_ISR_XDROP)</div><div class='add'>+		SLIC_INC_STATS_COUNTER(stats, tx_dropped);</div><div class='add'>+	if (!(isr &amp; (SLIC_ISR_RMISS | SLIC_ISR_XDROP)))</div><div class='add'>+		SLIC_INC_STATS_COUNTER(stats, irq_errs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void slic_handle_irq(struct slic_device *sdev, u32 isr,</div><div class='add'>+			    unsigned int todo, unsigned int *done)</div><div class='add'>+{</div><div class='add'>+	if (isr &amp; SLIC_ISR_ERR)</div><div class='add'>+		slic_handle_err_irq(sdev, isr);</div><div class='add'>+</div><div class='add'>+	if (isr &amp; SLIC_ISR_LEVENT)</div><div class='add'>+		slic_handle_link_change(sdev);</div><div class='add'>+</div><div class='add'>+	if (isr &amp; SLIC_ISR_UPC_MASK)</div><div class='add'>+		slic_handle_upr_irq(sdev, isr);</div><div class='add'>+</div><div class='add'>+	if (isr &amp; SLIC_ISR_RCV)</div><div class='add'>+		slic_handle_receive(sdev, todo, done);</div><div class='add'>+</div><div class='add'>+	if (isr &amp; SLIC_ISR_CMD)</div><div class='add'>+		slic_xmit_complete(sdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int slic_poll(struct napi_struct *napi, int todo)</div><div class='add'>+{</div><div class='add'>+	struct slic_device *sdev = container_of(napi, struct slic_device, napi);</div><div class='add'>+	struct slic_shmem *sm = &amp;sdev-&gt;shmem;</div><div class='add'>+	struct slic_shmem_data *sm_data = sm-&gt;shmem_data;</div><div class='add'>+	u32 isr = le32_to_cpu(sm_data-&gt;isr);</div><div class='add'>+	int done = 0;</div><div class='add'>+</div><div class='add'>+	slic_handle_irq(sdev, isr, todo, &amp;done);</div><div class='add'>+</div><div class='add'>+	if (done &lt; todo) {</div><div class='add'>+		napi_complete_done(napi, done);</div><div class='add'>+		/* reenable irqs */</div><div class='add'>+		sm_data-&gt;isr = 0;</div><div class='add'>+		/* make sure sm_data-&gt;isr is cleard before irqs are reenabled */</div><div class='add'>+		wmb();</div><div class='add'>+		slic_write(sdev, SLIC_REG_ISR, 0);</div><div class='add'>+		slic_flush_write(sdev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return done;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t slic_irq(int irq, void *dev_id)</div><div class='add'>+{</div><div class='add'>+	struct slic_device *sdev = dev_id;</div><div class='add'>+	struct slic_shmem *sm = &amp;sdev-&gt;shmem;</div><div class='add'>+	struct slic_shmem_data *sm_data = sm-&gt;shmem_data;</div><div class='add'>+</div><div class='add'>+	slic_write(sdev, SLIC_REG_ICR, SLIC_ICR_INT_MASK);</div><div class='add'>+	slic_flush_write(sdev);</div><div class='add'>+	/* make sure sm_data-&gt;isr is read after ICR_INT_MASK is set */</div><div class='add'>+	wmb();</div><div class='add'>+</div><div class='add'>+	if (!sm_data-&gt;isr) {</div><div class='add'>+		dma_rmb();</div><div class='add'>+		/* spurious interrupt */</div><div class='add'>+		slic_write(sdev, SLIC_REG_ISR, 0);</div><div class='add'>+		slic_flush_write(sdev);</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	napi_schedule_irqoff(&amp;sdev-&gt;napi);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void slic_card_reset(struct slic_device *sdev)</div><div class='add'>+{</div><div class='add'>+	u16 cmd;</div><div class='add'>+</div><div class='add'>+	slic_write(sdev, SLIC_REG_RESET, SLIC_RESET_MAGIC);</div><div class='add'>+	/* flush write by means of config space */</div><div class='add'>+	pci_read_config_word(sdev-&gt;pdev, PCI_COMMAND, &amp;cmd);</div><div class='add'>+	mdelay(1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int slic_init_stat_queue(struct slic_device *sdev)</div><div class='add'>+{</div><div class='add'>+	const unsigned int DESC_ALIGN_MASK = SLIC_STATS_DESC_ALIGN - 1;</div><div class='add'>+	struct slic_stat_queue *stq = &amp;sdev-&gt;stq;</div><div class='add'>+	struct slic_stat_desc *descs;</div><div class='add'>+	unsigned int misalign;</div><div class='add'>+	unsigned int offset;</div><div class='add'>+	dma_addr_t paddr;</div><div class='add'>+	size_t size;</div><div class='add'>+	int err;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	stq-&gt;len = SLIC_NUM_STAT_DESCS;</div><div class='add'>+	stq-&gt;active_array = 0;</div><div class='add'>+	stq-&gt;done_idx = 0;</div><div class='add'>+</div><div class='add'>+	size = stq-&gt;len * sizeof(*descs) + DESC_ALIGN_MASK;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; SLIC_NUM_STAT_DESC_ARRAYS; i++) {</div><div class='add'>+		descs = dma_alloc_coherent(&amp;sdev-&gt;pdev-&gt;dev, size, &amp;paddr,</div><div class='add'>+					   GFP_KERNEL);</div><div class='add'>+		if (!descs) {</div><div class='add'>+			netdev_err(sdev-&gt;netdev,</div><div class='add'>+				   "failed to allocate status descriptors\n");</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto free_descs;</div><div class='add'>+		}</div><div class='add'>+		/* ensure correct alignment */</div><div class='add'>+		offset = 0;</div><div class='add'>+		misalign = paddr &amp; DESC_ALIGN_MASK;</div><div class='add'>+		if (misalign) {</div><div class='add'>+			offset = SLIC_STATS_DESC_ALIGN - misalign;</div><div class='add'>+			descs += offset;</div><div class='add'>+			paddr += offset;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		slic_write(sdev, SLIC_REG_RBAR, lower_32_bits(paddr) |</div><div class='add'>+						stq-&gt;len);</div><div class='add'>+		stq-&gt;descs[i] = descs;</div><div class='add'>+		stq-&gt;paddr[i] = paddr;</div><div class='add'>+		stq-&gt;addr_offset[i] = offset;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	stq-&gt;mem_size = size;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+free_descs:</div><div class='add'>+	while (i--) {</div><div class='add'>+		dma_free_coherent(&amp;sdev-&gt;pdev-&gt;dev, stq-&gt;mem_size,</div><div class='add'>+				  stq-&gt;descs[i] - stq-&gt;addr_offset[i],</div><div class='add'>+				  stq-&gt;paddr[i] - stq-&gt;addr_offset[i]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void slic_free_stat_queue(struct slic_device *sdev)</div><div class='add'>+{</div><div class='add'>+	struct slic_stat_queue *stq = &amp;sdev-&gt;stq;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; SLIC_NUM_STAT_DESC_ARRAYS; i++) {</div><div class='add'>+		dma_free_coherent(&amp;sdev-&gt;pdev-&gt;dev, stq-&gt;mem_size,</div><div class='add'>+				  stq-&gt;descs[i] - stq-&gt;addr_offset[i],</div><div class='add'>+				  stq-&gt;paddr[i] - stq-&gt;addr_offset[i]);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int slic_init_tx_queue(struct slic_device *sdev)</div><div class='add'>+{</div><div class='add'>+	struct slic_tx_queue *txq = &amp;sdev-&gt;txq;</div><div class='add'>+	struct slic_tx_buffer *buff;</div><div class='add'>+	struct slic_tx_desc *desc;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	txq-&gt;len = SLIC_NUM_TX_DESCS;</div><div class='add'>+	txq-&gt;put_idx = 0;</div><div class='add'>+	txq-&gt;done_idx = 0;</div><div class='add'>+</div><div class='add'>+	txq-&gt;txbuffs = kcalloc(txq-&gt;len, sizeof(*buff), GFP_KERNEL);</div><div class='add'>+	if (!txq-&gt;txbuffs)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	txq-&gt;dma_pool = dma_pool_create("slic_pool", &amp;sdev-&gt;pdev-&gt;dev,</div><div class='add'>+					sizeof(*desc), SLIC_TX_DESC_ALIGN,</div><div class='add'>+					4096);</div><div class='add'>+	if (!txq-&gt;dma_pool) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		netdev_err(sdev-&gt;netdev, "failed to create dma pool\n");</div><div class='add'>+		goto free_buffs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; txq-&gt;len; i++) {</div><div class='add'>+		buff = &amp;txq-&gt;txbuffs[i];</div><div class='add'>+		desc = dma_pool_zalloc(txq-&gt;dma_pool, GFP_KERNEL,</div><div class='add'>+				       &amp;buff-&gt;desc_paddr);</div><div class='add'>+		if (!desc) {</div><div class='add'>+			netdev_err(sdev-&gt;netdev,</div><div class='add'>+				   "failed to alloc pool chunk (%i)\n", i);</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto free_descs;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		desc-&gt;hnd = cpu_to_le32((u32)(i + 1));</div><div class='add'>+		desc-&gt;cmd = SLIC_CMD_XMT_REQ;</div><div class='add'>+		desc-&gt;flags = 0;</div><div class='add'>+		desc-&gt;type = cpu_to_le32(SLIC_CMD_TYPE_DUMB);</div><div class='add'>+		buff-&gt;desc = desc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+free_descs:</div><div class='add'>+	while (i--) {</div><div class='add'>+		buff = &amp;txq-&gt;txbuffs[i];</div><div class='add'>+		dma_pool_free(txq-&gt;dma_pool, buff-&gt;desc, buff-&gt;desc_paddr);</div><div class='add'>+	}</div><div class='add'>+	dma_pool_destroy(txq-&gt;dma_pool);</div><div class='add'>+</div><div class='add'>+free_buffs:</div><div class='add'>+	kfree(txq-&gt;txbuffs);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void slic_free_tx_queue(struct slic_device *sdev)</div><div class='add'>+{</div><div class='add'>+	struct slic_tx_queue *txq = &amp;sdev-&gt;txq;</div><div class='add'>+	struct slic_tx_buffer *buff;</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; txq-&gt;len; i++) {</div><div class='add'>+		buff = &amp;txq-&gt;txbuffs[i];</div><div class='add'>+		dma_pool_free(txq-&gt;dma_pool, buff-&gt;desc, buff-&gt;desc_paddr);</div><div class='add'>+		if (!buff-&gt;skb)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		dma_unmap_single(&amp;sdev-&gt;pdev-&gt;dev,</div><div class='add'>+				 dma_unmap_addr(buff, map_addr),</div><div class='add'>+				 dma_unmap_len(buff, map_len), DMA_TO_DEVICE);</div><div class='add'>+		consume_skb(buff-&gt;skb);</div><div class='add'>+	}</div><div class='add'>+	dma_pool_destroy(txq-&gt;dma_pool);</div><div class='add'>+</div><div class='add'>+	kfree(txq-&gt;txbuffs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int slic_init_rx_queue(struct slic_device *sdev)</div><div class='add'>+{</div><div class='add'>+	struct slic_rx_queue *rxq = &amp;sdev-&gt;rxq;</div><div class='add'>+	struct slic_rx_buffer *buff;</div><div class='add'>+</div><div class='add'>+	rxq-&gt;len = SLIC_NUM_RX_LES;</div><div class='add'>+	rxq-&gt;done_idx = 0;</div><div class='add'>+	rxq-&gt;put_idx = 0;</div><div class='add'>+</div><div class='add'>+	buff = kcalloc(rxq-&gt;len, sizeof(*buff), GFP_KERNEL);</div><div class='add'>+	if (!buff)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	rxq-&gt;rxbuffs = buff;</div><div class='add'>+	slic_refill_rx_queue(sdev, GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void slic_free_rx_queue(struct slic_device *sdev)</div><div class='add'>+{</div><div class='add'>+	struct slic_rx_queue *rxq = &amp;sdev-&gt;rxq;</div><div class='add'>+	struct slic_rx_buffer *buff;</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	/* free rx buffers */</div><div class='add'>+	for (i = 0; i &lt; rxq-&gt;len; i++) {</div><div class='add'>+		buff = &amp;rxq-&gt;rxbuffs[i];</div><div class='add'>+</div><div class='add'>+		if (!buff-&gt;skb)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		dma_unmap_single(&amp;sdev-&gt;pdev-&gt;dev,</div><div class='add'>+				 dma_unmap_addr(buff, map_addr),</div><div class='add'>+				 dma_unmap_len(buff, map_len),</div><div class='add'>+				 DMA_FROM_DEVICE);</div><div class='add'>+		consume_skb(buff-&gt;skb);</div><div class='add'>+	}</div><div class='add'>+	kfree(rxq-&gt;rxbuffs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void slic_set_link_autoneg(struct slic_device *sdev)</div><div class='add'>+{</div><div class='add'>+	unsigned int subid = sdev-&gt;pdev-&gt;subsystem_device;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	if (sdev-&gt;is_fiber) {</div><div class='add'>+		/* We've got a fiber gigabit interface, and register 4 is</div><div class='add'>+		 * different in fiber mode than in copper mode.</div><div class='add'>+		 */</div><div class='add'>+		/* advertise FD only @1000 Mb */</div><div class='add'>+		val = MII_ADVERTISE &lt;&lt; 16 | ADVERTISE_1000XFULL |</div><div class='add'>+		      ADVERTISE_1000XPAUSE | ADVERTISE_1000XPSE_ASYM;</div><div class='add'>+		/* enable PAUSE frames */</div><div class='add'>+		slic_write(sdev, SLIC_REG_WPHY, val);</div><div class='add'>+		/* reset phy, enable auto-neg  */</div><div class='add'>+		val = MII_BMCR &lt;&lt; 16 | BMCR_RESET | BMCR_ANENABLE |</div><div class='add'>+		      BMCR_ANRESTART;</div><div class='add'>+		slic_write(sdev, SLIC_REG_WPHY, val);</div><div class='add'>+	} else {	/* copper gigabit */</div><div class='add'>+		/* We've got a copper gigabit interface, and register 4 is</div><div class='add'>+		 * different in copper mode than in fiber mode.</div><div class='add'>+		 */</div><div class='add'>+		/* advertise 10/100 Mb modes   */</div><div class='add'>+		val = MII_ADVERTISE &lt;&lt; 16 | ADVERTISE_100FULL |</div><div class='add'>+		      ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF;</div><div class='add'>+		/* enable PAUSE frames  */</div><div class='add'>+		val |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;</div><div class='add'>+		/* required by the Cicada PHY  */</div><div class='add'>+		val |= ADVERTISE_CSMA;</div><div class='add'>+		slic_write(sdev, SLIC_REG_WPHY, val);</div><div class='add'>+</div><div class='add'>+		/* advertise FD only @1000 Mb  */</div><div class='add'>+		val = MII_CTRL1000 &lt;&lt; 16 | ADVERTISE_1000FULL;</div><div class='add'>+		slic_write(sdev, SLIC_REG_WPHY, val);</div><div class='add'>+</div><div class='add'>+		if (subid != PCI_SUBDEVICE_ID_ALACRITECH_CICADA) {</div><div class='add'>+			 /* if a Marvell PHY enable auto crossover */</div><div class='add'>+			val = SLIC_MIICR_REG_16 | SLIC_MRV_REG16_XOVERON;</div><div class='add'>+			slic_write(sdev, SLIC_REG_WPHY, val);</div><div class='add'>+</div><div class='add'>+			/* reset phy, enable auto-neg  */</div><div class='add'>+			val = MII_BMCR &lt;&lt; 16 | BMCR_RESET | BMCR_ANENABLE |</div><div class='add'>+			      BMCR_ANRESTART;</div><div class='add'>+			slic_write(sdev, SLIC_REG_WPHY, val);</div><div class='add'>+		} else {</div><div class='add'>+			/* enable and restart auto-neg (don't reset)  */</div><div class='add'>+			val = MII_BMCR &lt;&lt; 16 | BMCR_ANENABLE | BMCR_ANRESTART;</div><div class='add'>+			slic_write(sdev, SLIC_REG_WPHY, val);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void slic_set_mac_address(struct slic_device *sdev)</div><div class='add'>+{</div><div class='add'>+	const u8 *addr = sdev-&gt;netdev-&gt;dev_addr;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = addr[5] | addr[4] &lt;&lt; 8 | addr[3] &lt;&lt; 16 | addr[2] &lt;&lt; 24;</div><div class='add'>+</div><div class='add'>+	slic_write(sdev, SLIC_REG_WRADDRAL, val);</div><div class='add'>+	slic_write(sdev, SLIC_REG_WRADDRBL, val);</div><div class='add'>+</div><div class='add'>+	val = addr[0] &lt;&lt; 8 | addr[1];</div><div class='add'>+</div><div class='add'>+	slic_write(sdev, SLIC_REG_WRADDRAH, val);</div><div class='add'>+	slic_write(sdev, SLIC_REG_WRADDRBH, val);</div><div class='add'>+	slic_flush_write(sdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 slic_read_dword_from_firmware(const struct firmware *fw, int *offset)</div><div class='add'>+{</div><div class='add'>+	int idx = *offset;</div><div class='add'>+	__le32 val;</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;val, fw-&gt;data + *offset, sizeof(val));</div><div class='add'>+	idx += 4;</div><div class='add'>+	*offset = idx;</div><div class='add'>+</div><div class='add'>+	return le32_to_cpu(val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+MODULE_FIRMWARE(SLIC_RCV_FIRMWARE_MOJAVE);</div><div class='add'>+MODULE_FIRMWARE(SLIC_RCV_FIRMWARE_OASIS);</div><div class='add'>+</div><div class='add'>+static int slic_load_rcvseq_firmware(struct slic_device *sdev)</div><div class='add'>+{</div><div class='add'>+	const struct firmware *fw;</div><div class='add'>+	const char *file;</div><div class='add'>+	u32 codelen;</div><div class='add'>+	int idx = 0;</div><div class='add'>+	u32 instr;</div><div class='add'>+	u32 addr;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	file = (sdev-&gt;model == SLIC_MODEL_OASIS) ?  SLIC_RCV_FIRMWARE_OASIS :</div><div class='add'>+						    SLIC_RCV_FIRMWARE_MOJAVE;</div><div class='add'>+	err = request_firmware(&amp;fw, file, &amp;sdev-&gt;pdev-&gt;dev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;sdev-&gt;pdev-&gt;dev,</div><div class='add'>+			"failed to load receive sequencer firmware %s\n", file);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+	/* Do an initial sanity check concerning firmware size now. A further</div><div class='add'>+	 * check follows below.</div><div class='add'>+	 */</div><div class='add'>+	if (fw-&gt;size &lt; SLIC_FIRMWARE_MIN_SIZE) {</div><div class='add'>+		dev_err(&amp;sdev-&gt;pdev-&gt;dev,</div><div class='add'>+			"invalid firmware size %zu (min %u expected)\n",</div><div class='add'>+			fw-&gt;size, SLIC_FIRMWARE_MIN_SIZE);</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto release;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	codelen = slic_read_dword_from_firmware(fw, &amp;idx);</div><div class='add'>+</div><div class='add'>+	/* do another sanity check against firmware size */</div><div class='add'>+	if ((codelen + 4) &gt; fw-&gt;size) {</div><div class='add'>+		dev_err(&amp;sdev-&gt;pdev-&gt;dev,</div><div class='add'>+			"invalid rcv-sequencer firmware size %zu\n", fw-&gt;size);</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto release;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* download sequencer code to card */</div><div class='add'>+	slic_write(sdev, SLIC_REG_RCV_WCS, SLIC_RCVWCS_BEGIN);</div><div class='add'>+	for (addr = 0; addr &lt; codelen; addr++) {</div><div class='add'>+		__le32 val;</div><div class='add'>+		/* write out instruction address */</div><div class='add'>+		slic_write(sdev, SLIC_REG_RCV_WCS, addr);</div><div class='add'>+</div><div class='add'>+		instr = slic_read_dword_from_firmware(fw, &amp;idx);</div><div class='add'>+		/* write out the instruction data low addr */</div><div class='add'>+		slic_write(sdev, SLIC_REG_RCV_WCS, instr);</div><div class='add'>+</div><div class='add'>+		val = (__le32)fw-&gt;data[idx];</div><div class='add'>+		instr = le32_to_cpu(val);</div><div class='add'>+		idx++;</div><div class='add'>+		/* write out the instruction data high addr */</div><div class='add'>+		slic_write(sdev, SLIC_REG_RCV_WCS, instr);</div><div class='add'>+	}</div><div class='add'>+	/* finish download */</div><div class='add'>+	slic_write(sdev, SLIC_REG_RCV_WCS, SLIC_RCVWCS_FINISH);</div><div class='add'>+	slic_flush_write(sdev);</div><div class='add'>+release:</div><div class='add'>+	release_firmware(fw);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+MODULE_FIRMWARE(SLIC_FIRMWARE_MOJAVE);</div><div class='add'>+MODULE_FIRMWARE(SLIC_FIRMWARE_OASIS);</div><div class='add'>+</div><div class='add'>+static int slic_load_firmware(struct slic_device *sdev)</div><div class='add'>+{</div><div class='add'>+	u32 sectstart[SLIC_FIRMWARE_MAX_SECTIONS];</div><div class='add'>+	u32 sectsize[SLIC_FIRMWARE_MAX_SECTIONS];</div><div class='add'>+	const struct firmware *fw;</div><div class='add'>+	unsigned int datalen;</div><div class='add'>+	const char *file;</div><div class='add'>+	int code_start;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	u32 numsects;</div><div class='add'>+	int idx = 0;</div><div class='add'>+	u32 sect;</div><div class='add'>+	u32 instr;</div><div class='add'>+	u32 addr;</div><div class='add'>+	u32 base;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	file = (sdev-&gt;model == SLIC_MODEL_OASIS) ?  SLIC_FIRMWARE_OASIS :</div><div class='add'>+						    SLIC_FIRMWARE_MOJAVE;</div><div class='add'>+	err = request_firmware(&amp;fw, file, &amp;sdev-&gt;pdev-&gt;dev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;sdev-&gt;pdev-&gt;dev, "failed to load firmware %s\n", file);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+	/* Do an initial sanity check concerning firmware size now. A further</div><div class='add'>+	 * check follows below.</div><div class='add'>+	 */</div><div class='add'>+	if (fw-&gt;size &lt; SLIC_FIRMWARE_MIN_SIZE) {</div><div class='add'>+		dev_err(&amp;sdev-&gt;pdev-&gt;dev,</div><div class='add'>+			"invalid firmware size %zu (min is %u)\n", fw-&gt;size,</div><div class='add'>+			SLIC_FIRMWARE_MIN_SIZE);</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto release;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	numsects = slic_read_dword_from_firmware(fw, &amp;idx);</div><div class='add'>+	if (numsects == 0 || numsects &gt; SLIC_FIRMWARE_MAX_SECTIONS) {</div><div class='add'>+		dev_err(&amp;sdev-&gt;pdev-&gt;dev,</div><div class='add'>+			"invalid number of sections in firmware: %u", numsects);</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto release;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	datalen = numsects * 8 + 4;</div><div class='add'>+	for (i = 0; i &lt; numsects; i++) {</div><div class='add'>+		sectsize[i] = slic_read_dword_from_firmware(fw, &amp;idx);</div><div class='add'>+		datalen += sectsize[i];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* do another sanity check against firmware size */</div><div class='add'>+	if (datalen &gt; fw-&gt;size) {</div><div class='add'>+		dev_err(&amp;sdev-&gt;pdev-&gt;dev,</div><div class='add'>+			"invalid firmware size %zu (expected &gt;= %u)\n",</div><div class='add'>+			fw-&gt;size, datalen);</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto release;</div><div class='add'>+	}</div><div class='add'>+	/* get sections */</div><div class='add'>+	for (i = 0; i &lt; numsects; i++)</div><div class='add'>+		sectstart[i] = slic_read_dword_from_firmware(fw, &amp;idx);</div><div class='add'>+</div><div class='add'>+	code_start = idx;</div><div class='add'>+	instr = slic_read_dword_from_firmware(fw, &amp;idx);</div><div class='add'>+</div><div class='add'>+	for (sect = 0; sect &lt; numsects; sect++) {</div><div class='add'>+		unsigned int ssize = sectsize[sect] &gt;&gt; 3;</div><div class='add'>+</div><div class='add'>+		base = sectstart[sect];</div><div class='add'>+</div><div class='add'>+		for (addr = 0; addr &lt; ssize; addr++) {</div><div class='add'>+			/* write out instruction address */</div><div class='add'>+			slic_write(sdev, SLIC_REG_WCS, base + addr);</div><div class='add'>+			/* write out instruction to low addr */</div><div class='add'>+			slic_write(sdev, SLIC_REG_WCS, instr);</div><div class='add'>+			instr = slic_read_dword_from_firmware(fw, &amp;idx);</div><div class='add'>+			/* write out instruction to high addr */</div><div class='add'>+			slic_write(sdev, SLIC_REG_WCS, instr);</div><div class='add'>+			instr = slic_read_dword_from_firmware(fw, &amp;idx);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	idx = code_start;</div><div class='add'>+</div><div class='add'>+	for (sect = 0; sect &lt; numsects; sect++) {</div><div class='add'>+		unsigned int ssize = sectsize[sect] &gt;&gt; 3;</div><div class='add'>+</div><div class='add'>+		instr = slic_read_dword_from_firmware(fw, &amp;idx);</div><div class='add'>+		base = sectstart[sect];</div><div class='add'>+		if (base &lt; 0x8000)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		for (addr = 0; addr &lt; ssize; addr++) {</div><div class='add'>+			/* write out instruction address */</div><div class='add'>+			slic_write(sdev, SLIC_REG_WCS,</div><div class='add'>+				   SLIC_WCS_COMPARE | (base + addr));</div><div class='add'>+			/* write out instruction to low addr */</div><div class='add'>+			slic_write(sdev, SLIC_REG_WCS, instr);</div><div class='add'>+			instr = slic_read_dword_from_firmware(fw, &amp;idx);</div><div class='add'>+			/* write out instruction to high addr */</div><div class='add'>+			slic_write(sdev, SLIC_REG_WCS, instr);</div><div class='add'>+			instr = slic_read_dword_from_firmware(fw, &amp;idx);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	slic_flush_write(sdev);</div><div class='add'>+	mdelay(10);</div><div class='add'>+	/* everything OK, kick off the card */</div><div class='add'>+	slic_write(sdev, SLIC_REG_WCS, SLIC_WCS_START);</div><div class='add'>+	slic_flush_write(sdev);</div><div class='add'>+	/* wait long enough for ucode to init card and reach the mainloop */</div><div class='add'>+	mdelay(20);</div><div class='add'>+release:</div><div class='add'>+	release_firmware(fw);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int slic_init_shmem(struct slic_device *sdev)</div><div class='add'>+{</div><div class='add'>+	struct slic_shmem *sm = &amp;sdev-&gt;shmem;</div><div class='add'>+	struct slic_shmem_data *sm_data;</div><div class='add'>+	dma_addr_t paddr;</div><div class='add'>+</div><div class='add'>+	sm_data = dma_alloc_coherent(&amp;sdev-&gt;pdev-&gt;dev, sizeof(*sm_data),</div><div class='add'>+				     &amp;paddr, GFP_KERNEL);</div><div class='add'>+	if (!sm_data) {</div><div class='add'>+		dev_err(&amp;sdev-&gt;pdev-&gt;dev, "failed to allocate shared memory\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sm-&gt;shmem_data = sm_data;</div><div class='add'>+	sm-&gt;isr_paddr = paddr;</div><div class='add'>+	sm-&gt;link_paddr = paddr + offsetof(struct slic_shmem_data, link);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void slic_free_shmem(struct slic_device *sdev)</div><div class='add'>+{</div><div class='add'>+	struct slic_shmem *sm = &amp;sdev-&gt;shmem;</div><div class='add'>+	struct slic_shmem_data *sm_data = sm-&gt;shmem_data;</div><div class='add'>+</div><div class='add'>+	dma_free_coherent(&amp;sdev-&gt;pdev-&gt;dev, sizeof(*sm_data), sm_data,</div><div class='add'>+			  sm-&gt;isr_paddr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int slic_init_iface(struct slic_device *sdev)</div><div class='add'>+{</div><div class='add'>+	struct slic_shmem *sm = &amp;sdev-&gt;shmem;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	sdev-&gt;upr_list.pending = false;</div><div class='add'>+</div><div class='add'>+	err = slic_init_shmem(sdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(sdev-&gt;netdev, "failed to init shared memory\n");</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = slic_load_firmware(sdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(sdev-&gt;netdev, "failed to load firmware\n");</div><div class='add'>+		goto free_sm;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = slic_load_rcvseq_firmware(sdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(sdev-&gt;netdev,</div><div class='add'>+			   "failed to load firmware for receive sequencer\n");</div><div class='add'>+		goto free_sm;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	slic_write(sdev, SLIC_REG_ICR, SLIC_ICR_INT_OFF);</div><div class='add'>+	slic_flush_write(sdev);</div><div class='add'>+	mdelay(1);</div><div class='add'>+</div><div class='add'>+	err = slic_init_rx_queue(sdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(sdev-&gt;netdev, "failed to init rx queue: %u\n", err);</div><div class='add'>+		goto free_sm;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = slic_init_tx_queue(sdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(sdev-&gt;netdev, "failed to init tx queue: %u\n", err);</div><div class='add'>+		goto free_rxq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = slic_init_stat_queue(sdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(sdev-&gt;netdev, "failed to init status queue: %u\n",</div><div class='add'>+			   err);</div><div class='add'>+		goto free_txq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	slic_write(sdev, SLIC_REG_ISP, lower_32_bits(sm-&gt;isr_paddr));</div><div class='add'>+	napi_enable(&amp;sdev-&gt;napi);</div><div class='add'>+	/* disable irq mitigation */</div><div class='add'>+	slic_write(sdev, SLIC_REG_INTAGG, 0);</div><div class='add'>+	slic_write(sdev, SLIC_REG_ISR, 0);</div><div class='add'>+	slic_flush_write(sdev);</div><div class='add'>+</div><div class='add'>+	slic_set_mac_address(sdev);</div><div class='add'>+</div><div class='add'>+	spin_lock_bh(&amp;sdev-&gt;link_lock);</div><div class='add'>+	sdev-&gt;duplex = DUPLEX_UNKNOWN;</div><div class='add'>+	sdev-&gt;speed = SPEED_UNKNOWN;</div><div class='add'>+	spin_unlock_bh(&amp;sdev-&gt;link_lock);</div><div class='add'>+</div><div class='add'>+	slic_set_link_autoneg(sdev);</div><div class='add'>+</div><div class='add'>+	err = request_irq(sdev-&gt;pdev-&gt;irq, slic_irq, IRQF_SHARED, DRV_NAME,</div><div class='add'>+			  sdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(sdev-&gt;netdev, "failed to request irq: %u\n", err);</div><div class='add'>+		goto disable_napi;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	slic_write(sdev, SLIC_REG_ICR, SLIC_ICR_INT_ON);</div><div class='add'>+	slic_flush_write(sdev);</div><div class='add'>+	/* request initial link status */</div><div class='add'>+	err = slic_handle_link_change(sdev);</div><div class='add'>+	if (err)</div><div class='add'>+		netdev_warn(sdev-&gt;netdev,</div><div class='add'>+			    "failed to set initial link state: %u\n", err);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+disable_napi:</div><div class='add'>+	napi_disable(&amp;sdev-&gt;napi);</div><div class='add'>+	slic_free_stat_queue(sdev);</div><div class='add'>+free_txq:</div><div class='add'>+	slic_free_tx_queue(sdev);</div><div class='add'>+free_rxq:</div><div class='add'>+	slic_free_rx_queue(sdev);</div><div class='add'>+free_sm:</div><div class='add'>+	slic_free_shmem(sdev);</div><div class='add'>+	slic_card_reset(sdev);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int slic_open(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct slic_device *sdev = netdev_priv(dev);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	netif_carrier_off(dev);</div><div class='add'>+</div><div class='add'>+	err = slic_init_iface(sdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(dev, "failed to initialize interface: %i\n", err);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netif_start_queue(dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int slic_close(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct slic_device *sdev = netdev_priv(dev);</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(dev);</div><div class='add'>+</div><div class='add'>+	/* stop irq handling */</div><div class='add'>+	napi_disable(&amp;sdev-&gt;napi);</div><div class='add'>+	slic_write(sdev, SLIC_REG_ICR, SLIC_ICR_INT_OFF);</div><div class='add'>+	slic_write(sdev, SLIC_REG_ISR, 0);</div><div class='add'>+	slic_flush_write(sdev);</div><div class='add'>+</div><div class='add'>+	free_irq(sdev-&gt;pdev-&gt;irq, sdev);</div><div class='add'>+	/* turn off RCV and XMT and power down PHY */</div><div class='add'>+	val = SLIC_GXCR_RESET | SLIC_GXCR_PAUSEEN;</div><div class='add'>+	slic_write(sdev, SLIC_REG_WXCFG, val);</div><div class='add'>+</div><div class='add'>+	val = SLIC_GRCR_RESET | SLIC_GRCR_CTLEN | SLIC_GRCR_ADDRAEN |</div><div class='add'>+	      SLIC_GRCR_HASHSIZE &lt;&lt; SLIC_GRCR_HASHSIZE_SHIFT;</div><div class='add'>+	slic_write(sdev, SLIC_REG_WRCFG, val);</div><div class='add'>+</div><div class='add'>+	val = MII_BMCR &lt;&lt; 16 | BMCR_PDOWN;</div><div class='add'>+	slic_write(sdev, SLIC_REG_WPHY, val);</div><div class='add'>+	slic_flush_write(sdev);</div><div class='add'>+</div><div class='add'>+	slic_clear_upr_list(&amp;sdev-&gt;upr_list);</div><div class='add'>+	slic_write(sdev, SLIC_REG_QUIESCE, 0);</div><div class='add'>+</div><div class='add'>+	slic_free_stat_queue(sdev);</div><div class='add'>+	slic_free_tx_queue(sdev);</div><div class='add'>+	slic_free_rx_queue(sdev);</div><div class='add'>+	slic_free_shmem(sdev);</div><div class='add'>+</div><div class='add'>+	slic_card_reset(sdev);</div><div class='add'>+	netif_carrier_off(dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static netdev_tx_t slic_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct slic_device *sdev = netdev_priv(dev);</div><div class='add'>+	struct slic_tx_queue *txq = &amp;sdev-&gt;txq;</div><div class='add'>+	struct slic_tx_buffer *buff;</div><div class='add'>+	struct slic_tx_desc *desc;</div><div class='add'>+	dma_addr_t paddr;</div><div class='add'>+	u32 cbar_val;</div><div class='add'>+	u32 maplen;</div><div class='add'>+</div><div class='add'>+	if (unlikely(slic_get_free_tx_descs(txq) &lt; SLIC_MAX_REQ_TX_DESCS)) {</div><div class='add'>+		netdev_err(dev, "BUG! not enough tx LEs left: %u\n",</div><div class='add'>+			   slic_get_free_tx_descs(txq));</div><div class='add'>+		return NETDEV_TX_BUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	maplen = skb_headlen(skb);</div><div class='add'>+	paddr = dma_map_single(&amp;sdev-&gt;pdev-&gt;dev, skb-&gt;data, maplen,</div><div class='add'>+			       DMA_TO_DEVICE);</div><div class='add'>+	if (dma_mapping_error(&amp;sdev-&gt;pdev-&gt;dev, paddr)) {</div><div class='add'>+		netdev_err(dev, "failed to map tx buffer\n");</div><div class='add'>+		goto drop_skb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	buff = &amp;txq-&gt;txbuffs[txq-&gt;put_idx];</div><div class='add'>+	buff-&gt;skb = skb;</div><div class='add'>+	dma_unmap_addr_set(buff, map_addr, paddr);</div><div class='add'>+	dma_unmap_len_set(buff, map_len, maplen);</div><div class='add'>+</div><div class='add'>+	desc = buff-&gt;desc;</div><div class='add'>+	desc-&gt;totlen = cpu_to_le32(maplen);</div><div class='add'>+	desc-&gt;paddrl = cpu_to_le32(lower_32_bits(paddr));</div><div class='add'>+	desc-&gt;paddrh = cpu_to_le32(upper_32_bits(paddr));</div><div class='add'>+	desc-&gt;len = cpu_to_le32(maplen);</div><div class='add'>+</div><div class='add'>+	txq-&gt;put_idx = slic_next_queue_idx(txq-&gt;put_idx, txq-&gt;len);</div><div class='add'>+</div><div class='add'>+	cbar_val = lower_32_bits(buff-&gt;desc_paddr) | 1;</div><div class='add'>+	/* complete writes to RAM and DMA before hardware is informed */</div><div class='add'>+	wmb();</div><div class='add'>+</div><div class='add'>+	slic_write(sdev, SLIC_REG_CBAR, cbar_val);</div><div class='add'>+</div><div class='add'>+	if (slic_get_free_tx_descs(txq) &lt; SLIC_MAX_REQ_TX_DESCS)</div><div class='add'>+		netif_stop_queue(dev);</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+drop_skb:</div><div class='add'>+	dev_kfree_skb_any(skb);</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void slic_get_stats(struct net_device *dev,</div><div class='add'>+			   struct rtnl_link_stats64 *lst)</div><div class='add'>+{</div><div class='add'>+	struct slic_device *sdev = netdev_priv(dev);</div><div class='add'>+	struct slic_stats *stats = &amp;sdev-&gt;stats;</div><div class='add'>+</div><div class='add'>+	SLIC_GET_STATS_COUNTER(lst-&gt;rx_packets, stats, rx_packets);</div><div class='add'>+	SLIC_GET_STATS_COUNTER(lst-&gt;tx_packets, stats, tx_packets);</div><div class='add'>+	SLIC_GET_STATS_COUNTER(lst-&gt;rx_bytes, stats, rx_bytes);</div><div class='add'>+	SLIC_GET_STATS_COUNTER(lst-&gt;tx_bytes, stats, tx_bytes);</div><div class='add'>+	SLIC_GET_STATS_COUNTER(lst-&gt;rx_errors, stats, rx_errors);</div><div class='add'>+	SLIC_GET_STATS_COUNTER(lst-&gt;rx_dropped, stats, rx_buff_miss);</div><div class='add'>+	SLIC_GET_STATS_COUNTER(lst-&gt;tx_dropped, stats, tx_dropped);</div><div class='add'>+	SLIC_GET_STATS_COUNTER(lst-&gt;multicast, stats, rx_mcasts);</div><div class='add'>+	SLIC_GET_STATS_COUNTER(lst-&gt;rx_over_errors, stats, rx_buffoflow);</div><div class='add'>+	SLIC_GET_STATS_COUNTER(lst-&gt;rx_crc_errors, stats, rx_crc);</div><div class='add'>+	SLIC_GET_STATS_COUNTER(lst-&gt;rx_fifo_errors, stats, rx_oflow802);</div><div class='add'>+	SLIC_GET_STATS_COUNTER(lst-&gt;tx_carrier_errors, stats, tx_carrier);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int slic_get_sset_count(struct net_device *dev, int sset)</div><div class='add'>+{</div><div class='add'>+	switch (sset) {</div><div class='add'>+	case ETH_SS_STATS:</div><div class='add'>+		return ARRAY_SIZE(slic_stats_strings);</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void slic_get_ethtool_stats(struct net_device *dev,</div><div class='add'>+				   struct ethtool_stats *eth_stats, u64 *data)</div><div class='add'>+{</div><div class='add'>+	struct slic_device *sdev = netdev_priv(dev);</div><div class='add'>+	struct slic_stats *stats = &amp;sdev-&gt;stats;</div><div class='add'>+</div><div class='add'>+	SLIC_GET_STATS_COUNTER(data[0], stats, rx_packets);</div><div class='add'>+	SLIC_GET_STATS_COUNTER(data[1], stats, rx_bytes);</div><div class='add'>+	SLIC_GET_STATS_COUNTER(data[2], stats, rx_mcasts);</div><div class='add'>+	SLIC_GET_STATS_COUNTER(data[3], stats, rx_errors);</div><div class='add'>+	SLIC_GET_STATS_COUNTER(data[4], stats, rx_buff_miss);</div><div class='add'>+	SLIC_GET_STATS_COUNTER(data[5], stats, rx_tpcsum);</div><div class='add'>+	SLIC_GET_STATS_COUNTER(data[6], stats, rx_tpoflow);</div><div class='add'>+	SLIC_GET_STATS_COUNTER(data[7], stats, rx_tphlen);</div><div class='add'>+	SLIC_GET_STATS_COUNTER(data[8], stats, rx_ipcsum);</div><div class='add'>+	SLIC_GET_STATS_COUNTER(data[9], stats, rx_iplen);</div><div class='add'>+	SLIC_GET_STATS_COUNTER(data[10], stats, rx_iphlen);</div><div class='add'>+	SLIC_GET_STATS_COUNTER(data[11], stats, rx_early);</div><div class='add'>+	SLIC_GET_STATS_COUNTER(data[12], stats, rx_buffoflow);</div><div class='add'>+	SLIC_GET_STATS_COUNTER(data[13], stats, rx_lcode);</div><div class='add'>+	SLIC_GET_STATS_COUNTER(data[14], stats, rx_drbl);</div><div class='add'>+	SLIC_GET_STATS_COUNTER(data[15], stats, rx_crc);</div><div class='add'>+	SLIC_GET_STATS_COUNTER(data[16], stats, rx_oflow802);</div><div class='add'>+	SLIC_GET_STATS_COUNTER(data[17], stats, rx_uflow802);</div><div class='add'>+	SLIC_GET_STATS_COUNTER(data[18], stats, tx_packets);</div><div class='add'>+	SLIC_GET_STATS_COUNTER(data[19], stats, tx_bytes);</div><div class='add'>+	SLIC_GET_STATS_COUNTER(data[20], stats, tx_carrier);</div><div class='add'>+	SLIC_GET_STATS_COUNTER(data[21], stats, tx_dropped);</div><div class='add'>+	SLIC_GET_STATS_COUNTER(data[22], stats, irq_errs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void slic_get_strings(struct net_device *dev, u32 stringset, u8 *data)</div><div class='add'>+{</div><div class='add'>+	if (stringset == ETH_SS_STATS)</div><div class='add'>+		memcpy(data, slic_stats_strings, sizeof(slic_stats_strings));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void slic_get_drvinfo(struct net_device *dev,</div><div class='add'>+			     struct ethtool_drvinfo *info)</div><div class='add'>+{</div><div class='add'>+	struct slic_device *sdev = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	strscpy(info-&gt;driver, DRV_NAME, sizeof(info-&gt;driver));</div><div class='add'>+	strscpy(info-&gt;bus_info, pci_name(sdev-&gt;pdev), sizeof(info-&gt;bus_info));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops slic_ethtool_ops = {</div><div class='add'>+	.get_drvinfo		= slic_get_drvinfo,</div><div class='add'>+	.get_link		= ethtool_op_get_link,</div><div class='add'>+	.get_strings		= slic_get_strings,</div><div class='add'>+	.get_ethtool_stats	= slic_get_ethtool_stats,</div><div class='add'>+	.get_sset_count		= slic_get_sset_count,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops slic_netdev_ops = {</div><div class='add'>+	.ndo_open		= slic_open,</div><div class='add'>+	.ndo_stop		= slic_close,</div><div class='add'>+	.ndo_start_xmit		= slic_xmit,</div><div class='add'>+	.ndo_set_mac_address	= eth_mac_addr,</div><div class='add'>+	.ndo_get_stats64	= slic_get_stats,</div><div class='add'>+	.ndo_set_rx_mode	= slic_set_rx_mode,</div><div class='add'>+	.ndo_validate_addr	= eth_validate_addr,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static u16 slic_eeprom_csum(unsigned char *eeprom, unsigned int len)</div><div class='add'>+{</div><div class='add'>+	unsigned char *ptr = eeprom;</div><div class='add'>+	u32 csum = 0;</div><div class='add'>+	__le16 data;</div><div class='add'>+</div><div class='add'>+	while (len &gt; 1) {</div><div class='add'>+		memcpy(&amp;data, ptr, sizeof(data));</div><div class='add'>+		csum += le16_to_cpu(data);</div><div class='add'>+		ptr += 2;</div><div class='add'>+		len -= 2;</div><div class='add'>+	}</div><div class='add'>+	if (len &gt; 0)</div><div class='add'>+		csum += *(u8 *)ptr;</div><div class='add'>+	while (csum &gt;&gt; 16)</div><div class='add'>+		csum = (csum &amp; 0xFFFF) + ((csum &gt;&gt; 16) &amp; 0xFFFF);</div><div class='add'>+	return ~csum;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* check eeprom size, magic and checksum */</div><div class='add'>+static bool slic_eeprom_valid(unsigned char *eeprom, unsigned int size)</div><div class='add'>+{</div><div class='add'>+	const unsigned int MAX_SIZE = 128;</div><div class='add'>+	const unsigned int MIN_SIZE = 98;</div><div class='add'>+	__le16 magic;</div><div class='add'>+	__le16 csum;</div><div class='add'>+</div><div class='add'>+	if (size &lt; MIN_SIZE || size &gt; MAX_SIZE)</div><div class='add'>+		return false;</div><div class='add'>+	memcpy(&amp;magic, eeprom, sizeof(magic));</div><div class='add'>+	if (le16_to_cpu(magic) != SLIC_EEPROM_MAGIC)</div><div class='add'>+		return false;</div><div class='add'>+	/* cut checksum bytes */</div><div class='add'>+	size -= 2;</div><div class='add'>+	memcpy(&amp;csum, eeprom + size, sizeof(csum));</div><div class='add'>+</div><div class='add'>+	return (le16_to_cpu(csum) == slic_eeprom_csum(eeprom, size));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int slic_read_eeprom(struct slic_device *sdev)</div><div class='add'>+{</div><div class='add'>+	unsigned int devfn = PCI_FUNC(sdev-&gt;pdev-&gt;devfn);</div><div class='add'>+	struct slic_shmem *sm = &amp;sdev-&gt;shmem;</div><div class='add'>+	struct slic_shmem_data *sm_data = sm-&gt;shmem_data;</div><div class='add'>+	const unsigned int MAX_LOOPS = 5000;</div><div class='add'>+	unsigned int codesize;</div><div class='add'>+	unsigned char *eeprom;</div><div class='add'>+	struct slic_upr *upr;</div><div class='add'>+	unsigned int i = 0;</div><div class='add'>+	dma_addr_t paddr;</div><div class='add'>+	int err = 0;</div><div class='add'>+	u8 *mac[2];</div><div class='add'>+</div><div class='add'>+	eeprom = dma_alloc_coherent(&amp;sdev-&gt;pdev-&gt;dev, SLIC_EEPROM_SIZE,</div><div class='add'>+				    &amp;paddr, GFP_KERNEL);</div><div class='add'>+	if (!eeprom)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	slic_write(sdev, SLIC_REG_ICR, SLIC_ICR_INT_OFF);</div><div class='add'>+	/* setup ISP temporarily */</div><div class='add'>+	slic_write(sdev, SLIC_REG_ISP, lower_32_bits(sm-&gt;isr_paddr));</div><div class='add'>+</div><div class='add'>+	err = slic_new_upr(sdev, SLIC_UPR_CONFIG, paddr);</div><div class='add'>+	if (!err) {</div><div class='add'>+		for (i = 0; i &lt; MAX_LOOPS; i++) {</div><div class='add'>+			if (le32_to_cpu(sm_data-&gt;isr) &amp; SLIC_ISR_UPC)</div><div class='add'>+				break;</div><div class='add'>+			mdelay(1);</div><div class='add'>+		}</div><div class='add'>+		if (i == MAX_LOOPS) {</div><div class='add'>+			dev_err(&amp;sdev-&gt;pdev-&gt;dev,</div><div class='add'>+				"timed out while waiting for eeprom data\n");</div><div class='add'>+			err = -ETIMEDOUT;</div><div class='add'>+		}</div><div class='add'>+		upr = slic_dequeue_upr(sdev);</div><div class='add'>+		kfree(upr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	slic_write(sdev, SLIC_REG_ISP, 0);</div><div class='add'>+	slic_write(sdev, SLIC_REG_ISR, 0);</div><div class='add'>+	slic_flush_write(sdev);</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		goto free_eeprom;</div><div class='add'>+</div><div class='add'>+	if (sdev-&gt;model == SLIC_MODEL_OASIS) {</div><div class='add'>+		struct slic_oasis_eeprom *oee;</div><div class='add'>+</div><div class='add'>+		oee = (struct slic_oasis_eeprom *)eeprom;</div><div class='add'>+		mac[0] = oee-&gt;mac;</div><div class='add'>+		mac[1] = oee-&gt;mac2;</div><div class='add'>+		codesize = le16_to_cpu(oee-&gt;eeprom_code_size);</div><div class='add'>+	} else {</div><div class='add'>+		struct slic_mojave_eeprom *mee;</div><div class='add'>+</div><div class='add'>+		mee = (struct slic_mojave_eeprom *)eeprom;</div><div class='add'>+		mac[0] = mee-&gt;mac;</div><div class='add'>+		mac[1] = mee-&gt;mac2;</div><div class='add'>+		codesize = le16_to_cpu(mee-&gt;eeprom_code_size);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!slic_eeprom_valid(eeprom, codesize)) {</div><div class='add'>+		dev_err(&amp;sdev-&gt;pdev-&gt;dev, "invalid checksum in eeprom\n");</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto free_eeprom;</div><div class='add'>+	}</div><div class='add'>+	/* set mac address */</div><div class='add'>+	eth_hw_addr_set(sdev-&gt;netdev, mac[devfn]);</div><div class='add'>+free_eeprom:</div><div class='add'>+	dma_free_coherent(&amp;sdev-&gt;pdev-&gt;dev, SLIC_EEPROM_SIZE, eeprom, paddr);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int slic_init(struct slic_device *sdev)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;sdev-&gt;upper_lock);</div><div class='add'>+	spin_lock_init(&amp;sdev-&gt;link_lock);</div><div class='add'>+	INIT_LIST_HEAD(&amp;sdev-&gt;upr_list.list);</div><div class='add'>+	spin_lock_init(&amp;sdev-&gt;upr_list.lock);</div><div class='add'>+	u64_stats_init(&amp;sdev-&gt;stats.syncp);</div><div class='add'>+</div><div class='add'>+	slic_card_reset(sdev);</div><div class='add'>+</div><div class='add'>+	err = slic_load_firmware(sdev);</div><div class='add'>+	if (err)</div><div class='add'>+		return dev_err_probe(&amp;sdev-&gt;pdev-&gt;dev, err,</div><div class='add'>+			"failed to load firmware\n");</div><div class='add'>+</div><div class='add'>+	/* we need the shared memory to read EEPROM so set it up temporarily */</div><div class='add'>+	err = slic_init_shmem(sdev);</div><div class='add'>+	if (err)</div><div class='add'>+		return dev_err_probe(&amp;sdev-&gt;pdev-&gt;dev, err,</div><div class='add'>+			"failed to init shared memory\n");</div><div class='add'>+</div><div class='add'>+	err = slic_read_eeprom(sdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;sdev-&gt;pdev-&gt;dev, "failed to read eeprom\n");</div><div class='add'>+		goto free_sm;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	slic_card_reset(sdev);</div><div class='add'>+	slic_free_shmem(sdev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+free_sm:</div><div class='add'>+	slic_free_shmem(sdev);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool slic_is_fiber(unsigned short subdev)</div><div class='add'>+{</div><div class='add'>+	switch (subdev) {</div><div class='add'>+	/* Mojave */</div><div class='add'>+	case PCI_SUBDEVICE_ID_ALACRITECH_1000X1F:</div><div class='add'>+	case PCI_SUBDEVICE_ID_ALACRITECH_SES1001F: fallthrough;</div><div class='add'>+	/* Oasis */</div><div class='add'>+	case PCI_SUBDEVICE_ID_ALACRITECH_SEN2002XF:</div><div class='add'>+	case PCI_SUBDEVICE_ID_ALACRITECH_SEN2001XF:</div><div class='add'>+	case PCI_SUBDEVICE_ID_ALACRITECH_SEN2104EF:</div><div class='add'>+	case PCI_SUBDEVICE_ID_ALACRITECH_SEN2102EF:</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void slic_configure_pci(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	u16 old;</div><div class='add'>+	u16 cmd;</div><div class='add'>+</div><div class='add'>+	pci_read_config_word(pdev, PCI_COMMAND, &amp;old);</div><div class='add'>+</div><div class='add'>+	cmd = old | PCI_COMMAND_PARITY | PCI_COMMAND_SERR;</div><div class='add'>+	if (old != cmd)</div><div class='add'>+		pci_write_config_word(pdev, PCI_COMMAND, cmd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int slic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='add'>+{</div><div class='add'>+	struct slic_device *sdev;</div><div class='add'>+	struct net_device *dev;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = pci_enable_device(pdev);</div><div class='add'>+	if (err)</div><div class='add'>+		return dev_err_probe(&amp;pdev-&gt;dev, err,</div><div class='add'>+			"failed to enable PCI device\n");</div><div class='add'>+</div><div class='add'>+	pci_set_master(pdev);</div><div class='add'>+	pci_try_set_mwi(pdev);</div><div class='add'>+</div><div class='add'>+	slic_configure_pci(pdev);</div><div class='add'>+</div><div class='add'>+	err = dma_set_mask(&amp;pdev-&gt;dev, DMA_BIT_MASK(32));</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to setup DMA\n");</div><div class='add'>+		goto disable;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dma_set_coherent_mask(&amp;pdev-&gt;dev, DMA_BIT_MASK(32));</div><div class='add'>+</div><div class='add'>+	err = pci_request_regions(pdev, DRV_NAME);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to obtain PCI regions\n");</div><div class='add'>+		goto disable;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev = alloc_etherdev(sizeof(*sdev));</div><div class='add'>+	if (!dev) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to alloc ethernet device\n");</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto free_regions;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	SET_NETDEV_DEV(dev, &amp;pdev-&gt;dev);</div><div class='add'>+	pci_set_drvdata(pdev, dev);</div><div class='add'>+	dev-&gt;irq = pdev-&gt;irq;</div><div class='add'>+	dev-&gt;netdev_ops = &amp;slic_netdev_ops;</div><div class='add'>+	dev-&gt;hw_features = NETIF_F_RXCSUM;</div><div class='add'>+	dev-&gt;features |= dev-&gt;hw_features;</div><div class='add'>+</div><div class='add'>+	dev-&gt;ethtool_ops = &amp;slic_ethtool_ops;</div><div class='add'>+</div><div class='add'>+	sdev = netdev_priv(dev);</div><div class='add'>+	sdev-&gt;model = (pdev-&gt;device == PCI_DEVICE_ID_ALACRITECH_OASIS) ?</div><div class='add'>+		      SLIC_MODEL_OASIS : SLIC_MODEL_MOJAVE;</div><div class='add'>+	sdev-&gt;is_fiber = slic_is_fiber(pdev-&gt;subsystem_device);</div><div class='add'>+	sdev-&gt;pdev = pdev;</div><div class='add'>+	sdev-&gt;netdev = dev;</div><div class='add'>+	sdev-&gt;regs = ioremap(pci_resource_start(pdev, 0),</div><div class='add'>+				     pci_resource_len(pdev, 0));</div><div class='add'>+	if (!sdev-&gt;regs) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to map registers\n");</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto free_netdev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = slic_init(sdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to initialize driver\n");</div><div class='add'>+		goto unmap;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netif_napi_add(dev, &amp;sdev-&gt;napi, slic_poll);</div><div class='add'>+	netif_carrier_off(dev);</div><div class='add'>+</div><div class='add'>+	err = register_netdev(dev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to register net device: %i\n", err);</div><div class='add'>+		goto unmap;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+unmap:</div><div class='add'>+	iounmap(sdev-&gt;regs);</div><div class='add'>+free_netdev:</div><div class='add'>+	free_netdev(dev);</div><div class='add'>+free_regions:</div><div class='add'>+	pci_release_regions(pdev);</div><div class='add'>+disable:</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void slic_remove(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = pci_get_drvdata(pdev);</div><div class='add'>+	struct slic_device *sdev = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	unregister_netdev(dev);</div><div class='add'>+	iounmap(sdev-&gt;regs);</div><div class='add'>+	free_netdev(dev);</div><div class='add'>+	pci_release_regions(pdev);</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct pci_driver slic_driver = {</div><div class='add'>+	.name = DRV_NAME,</div><div class='add'>+	.id_table = slic_id_tbl,</div><div class='add'>+	.probe = slic_probe,</div><div class='add'>+	.remove = slic_remove,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_pci_driver(slic_driver);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("Alacritech non-accelerated SLIC driver");</div><div class='add'>+MODULE_AUTHOR("Lino Sanfilippo &lt;LinoSanfilippo@gmx.de&gt;");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/allwinner/Kconfig b/drivers/net/ethernet/allwinner/Kconfig<br/>index 47da7e7a5b6a..3e81059f8693 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/allwinner/Kconfig?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/allwinner/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/allwinner/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/allwinner/Kconfig</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> #</div><div class='ctx'> # Allwinner device configuration</div><div class='ctx'> #</div><div class='hunk'>@@ -7,7 +8,7 @@ config NET_VENDOR_ALLWINNER</div><div class='ctx'> 	default y</div><div class='ctx'> </div><div class='ctx'> 	depends on ARCH_SUNXI</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  If you have a network (Ethernet) card belonging to this</div><div class='ctx'> 	  class, say Y here.</div><div class='ctx'> </div><div class='hunk'>@@ -20,17 +21,17 @@ config NET_VENDOR_ALLWINNER</div><div class='ctx'> if NET_VENDOR_ALLWINNER</div><div class='ctx'> </div><div class='ctx'> config SUN4I_EMAC</div><div class='del'>-        tristate "Allwinner A10 EMAC support"</div><div class='add'>+	tristate "Allwinner A10 EMAC support"</div><div class='ctx'> 	depends on ARCH_SUNXI</div><div class='ctx'> 	depends on OF</div><div class='ctx'> 	select CRC32</div><div class='ctx'> 	select MII</div><div class='ctx'> 	select PHYLIB</div><div class='ctx'> 	select MDIO_SUN4I</div><div class='del'>-        ---help---</div><div class='del'>-          Support for Allwinner A10 EMAC ethernet driver.</div><div class='add'>+	help</div><div class='add'>+	  Support for Allwinner A10 EMAC ethernet driver.</div><div class='ctx'> </div><div class='del'>-          To compile this driver as a module, choose M here.  The module</div><div class='del'>-          will be called sun4i-emac.</div><div class='add'>+	  To compile this driver as a module, choose M here.  The module</div><div class='add'>+	  will be called sun4i-emac.</div><div class='ctx'> </div><div class='ctx'> endif # NET_VENDOR_ALLWINNER</div><div class='head'>diff --git a/drivers/net/ethernet/allwinner/Makefile b/drivers/net/ethernet/allwinner/Makefile<br/>index 03129f796514..ddd5a5079e8a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/allwinner/Makefile?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/allwinner/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/allwinner/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/allwinner/Makefile</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> #</div><div class='ctx'> # Makefile for the Allwinner device drivers.</div><div class='ctx'> #</div><div class='head'>diff --git a/drivers/net/ethernet/allwinner/sun4i-emac.c b/drivers/net/ethernet/allwinner/sun4i-emac.c<br/>index bab01c849165..2f516b950f4e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/allwinner/sun4i-emac.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/allwinner/sun4i-emac.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/allwinner/sun4i-emac.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/allwinner/sun4i-emac.c</a></div><div class='hunk'>@@ -28,14 +28,20 @@</div><div class='ctx'> #include &lt;linux/of_platform.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/soc/sunxi/sunxi_sram.h&gt;</div><div class='add'>+#include &lt;linux/dmaengine.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "sun4i-emac.h"</div><div class='ctx'> </div><div class='ctx'> #define DRV_NAME		"sun4i-emac"</div><div class='del'>-#define DRV_VERSION		"1.02"</div><div class='ctx'> </div><div class='ctx'> #define EMAC_MAX_FRAME_LEN	0x0600</div><div class='ctx'> </div><div class='add'>+#define EMAC_DEFAULT_MSG_ENABLE 0x0000</div><div class='add'>+static int debug = -1;     /* defaults above */;</div><div class='add'>+module_param(debug, int, 0);</div><div class='add'>+MODULE_PARM_DESC(debug, "debug message flags");</div><div class='add'>+</div><div class='ctx'> /* Transmit timeout, default 5 seconds. */</div><div class='ctx'> static int watchdog = 5000;</div><div class='ctx'> module_param(watchdog, int, 0400);</div><div class='hunk'>@@ -71,18 +77,26 @@ struct emac_board_info {</div><div class='ctx'> 	void __iomem		*membase;</div><div class='ctx'> 	u32			msg_enable;</div><div class='ctx'> 	struct net_device	*ndev;</div><div class='del'>-	struct sk_buff		*skb_last;</div><div class='ctx'> 	u16			tx_fifo_stat;</div><div class='ctx'> </div><div class='ctx'> 	int			emacrx_completed_flag;</div><div class='ctx'> </div><div class='del'>-	struct phy_device	*phy_dev;</div><div class='ctx'> 	struct device_node	*phy_node;</div><div class='ctx'> 	unsigned int		link;</div><div class='ctx'> 	unsigned int		speed;</div><div class='ctx'> 	unsigned int		duplex;</div><div class='ctx'> </div><div class='ctx'> 	phy_interface_t		phy_interface;</div><div class='add'>+	struct dma_chan	*rx_chan;</div><div class='add'>+	phys_addr_t emac_rx_fifo;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct emac_dma_req {</div><div class='add'>+	struct emac_board_info *db;</div><div class='add'>+	struct dma_async_tx_descriptor *desc;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	dma_addr_t rxbuf;</div><div class='add'>+	int count;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static void emac_update_speed(struct net_device *dev)</div><div class='hunk'>@@ -92,9 +106,9 @@ static void emac_update_speed(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	/* set EMAC SPEED, depend on PHY  */</div><div class='ctx'> 	reg_val = readl(db-&gt;membase + EMAC_MAC_SUPP_REG);</div><div class='del'>-	reg_val &amp;= ~(0x1 &lt;&lt; 8);</div><div class='add'>+	reg_val &amp;= ~EMAC_MAC_SUPP_100M;</div><div class='ctx'> 	if (db-&gt;speed == SPEED_100)</div><div class='del'>-		reg_val |= 1 &lt;&lt; 8;</div><div class='add'>+		reg_val |= EMAC_MAC_SUPP_100M;</div><div class='ctx'> 	writel(reg_val, db-&gt;membase + EMAC_MAC_SUPP_REG);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -114,7 +128,7 @@ static void emac_update_duplex(struct net_device *dev)</div><div class='ctx'> static void emac_handle_link_change(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct emac_board_info *db = netdev_priv(dev);</div><div class='del'>-	struct phy_device *phydev = db-&gt;phy_dev;</div><div class='add'>+	struct phy_device *phydev = dev-&gt;phydev;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int status_change = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -153,21 +167,21 @@ static void emac_handle_link_change(struct net_device *dev)</div><div class='ctx'> static int emac_mdio_probe(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct emac_board_info *db = netdev_priv(dev);</div><div class='add'>+	struct phy_device *phydev;</div><div class='ctx'> </div><div class='ctx'> 	/* to-do: PHY interrupts are currently not supported */</div><div class='ctx'> </div><div class='ctx'> 	/* attach the mac to the phy */</div><div class='del'>-	db-&gt;phy_dev = of_phy_connect(db-&gt;ndev, db-&gt;phy_node,</div><div class='del'>-				     &amp;emac_handle_link_change, 0,</div><div class='del'>-				     db-&gt;phy_interface);</div><div class='del'>-	if (!db-&gt;phy_dev) {</div><div class='add'>+	phydev = of_phy_connect(db-&gt;ndev, db-&gt;phy_node,</div><div class='add'>+				&amp;emac_handle_link_change, 0,</div><div class='add'>+				db-&gt;phy_interface);</div><div class='add'>+	if (!phydev) {</div><div class='ctx'> 		netdev_err(db-&gt;ndev, "could not find the PHY\n");</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* mask with MAC supported features */</div><div class='del'>-	db-&gt;phy_dev-&gt;supported &amp;= PHY_BASIC_FEATURES;</div><div class='del'>-	db-&gt;phy_dev-&gt;advertising = db-&gt;phy_dev-&gt;supported;</div><div class='add'>+	phy_set_max_speed(phydev, SPEED_100);</div><div class='ctx'> </div><div class='ctx'> 	db-&gt;link = 0;</div><div class='ctx'> 	db-&gt;speed = 0;</div><div class='hunk'>@@ -178,10 +192,7 @@ static int emac_mdio_probe(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> static void emac_mdio_remove(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct emac_board_info *db = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	phy_disconnect(db-&gt;phy_dev);</div><div class='del'>-	db-&gt;phy_dev = NULL;</div><div class='add'>+	phy_disconnect(dev-&gt;phydev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void emac_reset(struct emac_board_info *db)</div><div class='hunk'>@@ -205,56 +216,146 @@ static void emac_inblk_32bit(void __iomem *reg, void *data, int count)</div><div class='ctx'> 	readsl(reg, data, round_up(count, 4) / 4);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int emac_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)</div><div class='add'>+static struct emac_dma_req *</div><div class='add'>+emac_alloc_dma_req(struct emac_board_info *db,</div><div class='add'>+		   struct dma_async_tx_descriptor *desc, struct sk_buff *skb,</div><div class='add'>+		   dma_addr_t rxbuf, int count)</div><div class='ctx'> {</div><div class='del'>-	struct emac_board_info *dm = netdev_priv(dev);</div><div class='del'>-	struct phy_device *phydev = dm-&gt;phy_dev;</div><div class='add'>+	struct emac_dma_req *req;</div><div class='add'>+</div><div class='add'>+	req = kzalloc(sizeof(struct emac_dma_req), GFP_ATOMIC);</div><div class='add'>+	if (!req)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	req-&gt;db = db;</div><div class='add'>+	req-&gt;desc = desc;</div><div class='add'>+	req-&gt;skb = skb;</div><div class='add'>+	req-&gt;rxbuf = rxbuf;</div><div class='add'>+	req-&gt;count = count;</div><div class='add'>+	return req;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	if (!netif_running(dev))</div><div class='del'>-		return -EINVAL;</div><div class='add'>+static void emac_free_dma_req(struct emac_dma_req *req)</div><div class='add'>+{</div><div class='add'>+	kfree(req);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	if (!phydev)</div><div class='del'>-		return -ENODEV;</div><div class='add'>+static void emac_dma_done_callback(void *arg)</div><div class='add'>+{</div><div class='add'>+	struct emac_dma_req *req = arg;</div><div class='add'>+	struct emac_board_info *db = req-&gt;db;</div><div class='add'>+	struct sk_buff *skb = req-&gt;skb;</div><div class='add'>+	struct net_device *dev = db-&gt;ndev;</div><div class='add'>+	int rxlen = req-&gt;count;</div><div class='add'>+	u32 reg_val;</div><div class='add'>+</div><div class='add'>+	dma_unmap_single(db-&gt;dev, req-&gt;rxbuf, rxlen, DMA_FROM_DEVICE);</div><div class='add'>+</div><div class='add'>+	skb-&gt;protocol = eth_type_trans(skb, dev);</div><div class='add'>+	netif_rx(skb);</div><div class='add'>+	dev-&gt;stats.rx_bytes += rxlen;</div><div class='add'>+	/* Pass to upper layer */</div><div class='add'>+	dev-&gt;stats.rx_packets++;</div><div class='add'>+</div><div class='add'>+	/* re enable cpu receive */</div><div class='add'>+	reg_val = readl(db-&gt;membase + EMAC_RX_CTL_REG);</div><div class='add'>+	reg_val &amp;= ~EMAC_RX_CTL_DMA_EN;</div><div class='add'>+	writel(reg_val, db-&gt;membase + EMAC_RX_CTL_REG);</div><div class='add'>+</div><div class='add'>+	/* re enable interrupt */</div><div class='add'>+	reg_val = readl(db-&gt;membase + EMAC_INT_CTL_REG);</div><div class='add'>+	reg_val |= EMAC_INT_CTL_RX_EN;</div><div class='add'>+	writel(reg_val, db-&gt;membase + EMAC_INT_CTL_REG);</div><div class='ctx'> </div><div class='del'>-	return phy_mii_ioctl(phydev, rq, cmd);</div><div class='add'>+	db-&gt;emacrx_completed_flag = 1;</div><div class='add'>+	emac_free_dma_req(req);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int emac_dma_inblk_32bit(struct emac_board_info *db,</div><div class='add'>+		struct sk_buff *skb, void *rdptr, int count)</div><div class='add'>+{</div><div class='add'>+	struct dma_async_tx_descriptor *desc;</div><div class='add'>+	dma_cookie_t cookie;</div><div class='add'>+	dma_addr_t rxbuf;</div><div class='add'>+	struct emac_dma_req *req;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	rxbuf = dma_map_single(db-&gt;dev, rdptr, count, DMA_FROM_DEVICE);</div><div class='add'>+	ret = dma_mapping_error(db-&gt;dev, rxbuf);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(db-&gt;dev, "dma mapping error.\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	desc = dmaengine_prep_slave_single(db-&gt;rx_chan, rxbuf, count,</div><div class='add'>+					   DMA_DEV_TO_MEM,</div><div class='add'>+					   DMA_PREP_INTERRUPT | DMA_CTRL_ACK);</div><div class='add'>+	if (!desc) {</div><div class='add'>+		dev_err(db-&gt;dev, "prepare slave single failed\n");</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto prepare_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	req = emac_alloc_dma_req(db, desc, skb, rxbuf, count);</div><div class='add'>+	if (!req) {</div><div class='add'>+		dev_err(db-&gt;dev, "alloc emac dma req error.\n");</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto alloc_req_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	desc-&gt;callback_param = req;</div><div class='add'>+	desc-&gt;callback = emac_dma_done_callback;</div><div class='add'>+</div><div class='add'>+	cookie = dmaengine_submit(desc);</div><div class='add'>+	ret = dma_submit_error(cookie);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(db-&gt;dev, "dma submit error.\n");</div><div class='add'>+		goto submit_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dma_async_issue_pending(db-&gt;rx_chan);</div><div class='add'>+	return ret;</div><div class='add'>+</div><div class='add'>+submit_err:</div><div class='add'>+	emac_free_dma_req(req);</div><div class='add'>+</div><div class='add'>+alloc_req_err:</div><div class='add'>+	dmaengine_desc_free(desc);</div><div class='add'>+</div><div class='add'>+prepare_err:</div><div class='add'>+	dma_unmap_single(db-&gt;dev, rxbuf, count, DMA_FROM_DEVICE);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* ethtool ops */</div><div class='ctx'> static void emac_get_drvinfo(struct net_device *dev,</div><div class='ctx'> 			      struct ethtool_drvinfo *info)</div><div class='ctx'> {</div><div class='del'>-	strlcpy(info-&gt;driver, DRV_NAME, sizeof(DRV_NAME));</div><div class='del'>-	strlcpy(info-&gt;version, DRV_VERSION, sizeof(DRV_VERSION));</div><div class='del'>-	strlcpy(info-&gt;bus_info, dev_name(&amp;dev-&gt;dev), sizeof(info-&gt;bus_info));</div><div class='add'>+	strscpy(info-&gt;driver, DRV_NAME, sizeof(info-&gt;driver));</div><div class='add'>+	strscpy(info-&gt;bus_info, dev_name(&amp;dev-&gt;dev), sizeof(info-&gt;bus_info));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int emac_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)</div><div class='add'>+static u32 emac_get_msglevel(struct net_device *dev)</div><div class='ctx'> {</div><div class='del'>-	struct emac_board_info *dm = netdev_priv(dev);</div><div class='del'>-	struct phy_device *phydev = dm-&gt;phy_dev;</div><div class='del'>-</div><div class='del'>-	if (!phydev)</div><div class='del'>-		return -ENODEV;</div><div class='add'>+	struct emac_board_info *db = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	return phy_ethtool_gset(phydev, cmd);</div><div class='add'>+	return db-&gt;msg_enable;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int emac_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)</div><div class='add'>+static void emac_set_msglevel(struct net_device *dev, u32 value)</div><div class='ctx'> {</div><div class='del'>-	struct emac_board_info *dm = netdev_priv(dev);</div><div class='del'>-	struct phy_device *phydev = dm-&gt;phy_dev;</div><div class='del'>-</div><div class='del'>-	if (!phydev)</div><div class='del'>-		return -ENODEV;</div><div class='add'>+	struct emac_board_info *db = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	return phy_ethtool_sset(phydev, cmd);</div><div class='add'>+	db-&gt;msg_enable = value;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops emac_ethtool_ops = {</div><div class='ctx'> 	.get_drvinfo	= emac_get_drvinfo,</div><div class='del'>-	.get_settings	= emac_get_settings,</div><div class='del'>-	.set_settings	= emac_set_settings,</div><div class='ctx'> 	.get_link	= ethtool_op_get_link,</div><div class='add'>+	.get_link_ksettings = phy_ethtool_get_link_ksettings,</div><div class='add'>+	.set_link_ksettings = phy_ethtool_set_link_ksettings,</div><div class='add'>+	.get_msglevel	= emac_get_msglevel,</div><div class='add'>+	.set_msglevel	= emac_set_msglevel,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static unsigned int emac_setup(struct net_device *ndev)</div><div class='hunk'>@@ -328,7 +429,7 @@ static unsigned int emac_powerup(struct net_device *ndev)</div><div class='ctx'> 	/* initial EMAC */</div><div class='ctx'> 	/* flush RX FIFO */</div><div class='ctx'> 	reg_val = readl(db-&gt;membase + EMAC_RX_CTL_REG);</div><div class='del'>-	reg_val |= 0x8;</div><div class='add'>+	reg_val |= EMAC_RX_CTL_FLUSH_FIFO;</div><div class='ctx'> 	writel(reg_val, db-&gt;membase + EMAC_RX_CTL_REG);</div><div class='ctx'> 	udelay(1);</div><div class='ctx'> </div><div class='hunk'>@@ -340,8 +441,8 @@ static unsigned int emac_powerup(struct net_device *ndev)</div><div class='ctx'> </div><div class='ctx'> 	/* set MII clock */</div><div class='ctx'> 	reg_val = readl(db-&gt;membase + EMAC_MAC_MCFG_REG);</div><div class='del'>-	reg_val &amp;= (~(0xf &lt;&lt; 2));</div><div class='del'>-	reg_val |= (0xD &lt;&lt; 2);</div><div class='add'>+	reg_val &amp;= ~EMAC_MAC_MCFG_MII_CLKD_MASK;</div><div class='add'>+	reg_val |= EMAC_MAC_MCFG_MII_CLKD_72;</div><div class='ctx'> 	writel(reg_val, db-&gt;membase + EMAC_MAC_MCFG_REG);</div><div class='ctx'> </div><div class='ctx'> 	/* clear RX counter */</div><div class='hunk'>@@ -376,7 +477,7 @@ static int emac_set_mac_address(struct net_device *dev, void *p)</div><div class='ctx'> 	if (netif_running(dev))</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> </div><div class='del'>-	memcpy(dev-&gt;dev_addr, addr-&gt;sa_data, ETH_ALEN);</div><div class='add'>+	eth_hw_addr_set(dev, addr-&gt;sa_data);</div><div class='ctx'> </div><div class='ctx'> 	writel(dev-&gt;dev_addr[0] &lt;&lt; 16 | dev-&gt;dev_addr[1] &lt;&lt; 8 | dev-&gt;</div><div class='ctx'> 	       dev_addr[2], db-&gt;membase + EMAC_MAC_A1_REG);</div><div class='hunk'>@@ -405,14 +506,14 @@ static void emac_init_device(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	/* enable RX/TX0/RX Hlevel interrup */</div><div class='ctx'> 	reg_val = readl(db-&gt;membase + EMAC_INT_CTL_REG);</div><div class='del'>-	reg_val |= (0xf &lt;&lt; 0) | (0x01 &lt;&lt; 8);</div><div class='add'>+	reg_val |= (EMAC_INT_CTL_TX_EN | EMAC_INT_CTL_TX_ABRT_EN | EMAC_INT_CTL_RX_EN);</div><div class='ctx'> 	writel(reg_val, db-&gt;membase + EMAC_INT_CTL_REG);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;db-&gt;lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* Our watchdog timed out. Called by the networking layer */</div><div class='del'>-static void emac_timeout(struct net_device *dev)</div><div class='add'>+static void emac_timeout(struct net_device *dev, unsigned int txqueue)</div><div class='ctx'> {</div><div class='ctx'> 	struct emac_board_info *db = netdev_priv(dev);</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -427,7 +528,7 @@ static void emac_timeout(struct net_device *dev)</div><div class='ctx'> 	emac_reset(db);</div><div class='ctx'> 	emac_init_device(dev);</div><div class='ctx'> 	/* We can accept TX packets again */</div><div class='del'>-	dev-&gt;trans_start = jiffies;</div><div class='add'>+	netif_trans_update(dev);</div><div class='ctx'> 	netif_wake_queue(dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Restore previous register address */</div><div class='hunk'>@@ -437,7 +538,7 @@ static void emac_timeout(struct net_device *dev)</div><div class='ctx'> /* Hardware start transmission.</div><div class='ctx'>  * Send a packet to media from the upper layer.</div><div class='ctx'>  */</div><div class='del'>-static int emac_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='add'>+static netdev_tx_t emac_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct emac_board_info *db = netdev_priv(dev);</div><div class='ctx'> 	unsigned long channel;</div><div class='hunk'>@@ -445,7 +546,7 @@ static int emac_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	channel = db-&gt;tx_fifo_stat &amp; 3;</div><div class='ctx'> 	if (channel == 3)</div><div class='del'>-		return 1;</div><div class='add'>+		return NETDEV_TX_BUSY;</div><div class='ctx'> </div><div class='ctx'> 	channel = (channel == 1 ? 1 : 0);</div><div class='ctx'> </div><div class='hunk'>@@ -467,7 +568,7 @@ static int emac_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 		       db-&gt;membase + EMAC_TX_CTL0_REG);</div><div class='ctx'> </div><div class='ctx'> 		/* save the time stamp */</div><div class='del'>-		dev-&gt;trans_start = jiffies;</div><div class='add'>+		netif_trans_update(dev);</div><div class='ctx'> 	} else if (channel == 1) {</div><div class='ctx'> 		/* set TX len */</div><div class='ctx'> 		writel(skb-&gt;len, db-&gt;membase + EMAC_TX_PL1_REG);</div><div class='hunk'>@@ -476,7 +577,7 @@ static int emac_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 		       db-&gt;membase + EMAC_TX_CTL1_REG);</div><div class='ctx'> </div><div class='ctx'> 		/* save the time stamp */</div><div class='del'>-		dev-&gt;trans_start = jiffies;</div><div class='add'>+		netif_trans_update(dev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if ((db-&gt;tx_fifo_stat &amp; 3) == 3) {</div><div class='hunk'>@@ -519,7 +620,6 @@ static void emac_rx(struct net_device *dev)</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	u8 *rdptr;</div><div class='ctx'> 	bool good_packet;</div><div class='del'>-	static int rxlen_last;</div><div class='ctx'> 	unsigned int reg_val;</div><div class='ctx'> 	u32 rxhdr, rxstatus, rxcount, rxlen;</div><div class='ctx'> </div><div class='hunk'>@@ -534,26 +634,12 @@ static void emac_rx(struct net_device *dev)</div><div class='ctx'> 		if (netif_msg_rx_status(db))</div><div class='ctx'> 			dev_dbg(db-&gt;dev, "RXCount: %x\n", rxcount);</div><div class='ctx'> </div><div class='del'>-		if ((db-&gt;skb_last != NULL) &amp;&amp; (rxlen_last &gt; 0)) {</div><div class='del'>-			dev-&gt;stats.rx_bytes += rxlen_last;</div><div class='del'>-</div><div class='del'>-			/* Pass to upper layer */</div><div class='del'>-			db-&gt;skb_last-&gt;protocol = eth_type_trans(db-&gt;skb_last,</div><div class='del'>-								dev);</div><div class='del'>-			netif_rx(db-&gt;skb_last);</div><div class='del'>-			dev-&gt;stats.rx_packets++;</div><div class='del'>-			db-&gt;skb_last = NULL;</div><div class='del'>-			rxlen_last = 0;</div><div class='del'>-</div><div class='del'>-			reg_val = readl(db-&gt;membase + EMAC_RX_CTL_REG);</div><div class='del'>-			reg_val &amp;= ~EMAC_RX_CTL_DMA_EN;</div><div class='del'>-			writel(reg_val, db-&gt;membase + EMAC_RX_CTL_REG);</div><div class='del'>-		}</div><div class='del'>-</div><div class='ctx'> 		if (!rxcount) {</div><div class='ctx'> 			db-&gt;emacrx_completed_flag = 1;</div><div class='ctx'> 			reg_val = readl(db-&gt;membase + EMAC_INT_CTL_REG);</div><div class='del'>-			reg_val |= (0xf &lt;&lt; 0) | (0x01 &lt;&lt; 8);</div><div class='add'>+			reg_val |= (EMAC_INT_CTL_TX_EN |</div><div class='add'>+					EMAC_INT_CTL_TX_ABRT_EN |</div><div class='add'>+					EMAC_INT_CTL_RX_EN);</div><div class='ctx'> 			writel(reg_val, db-&gt;membase + EMAC_INT_CTL_REG);</div><div class='ctx'> </div><div class='ctx'> 			/* had one stuck? */</div><div class='hunk'>@@ -585,7 +671,9 @@ static void emac_rx(struct net_device *dev)</div><div class='ctx'> 			writel(reg_val | EMAC_CTL_RX_EN,</div><div class='ctx'> 			       db-&gt;membase + EMAC_CTL_REG);</div><div class='ctx'> 			reg_val = readl(db-&gt;membase + EMAC_INT_CTL_REG);</div><div class='del'>-			reg_val |= (0xf &lt;&lt; 0) | (0x01 &lt;&lt; 8);</div><div class='add'>+			reg_val |= (EMAC_INT_CTL_TX_EN |</div><div class='add'>+					EMAC_INT_CTL_TX_ABRT_EN |</div><div class='add'>+					EMAC_INT_CTL_RX_EN);</div><div class='ctx'> 			writel(reg_val, db-&gt;membase + EMAC_INT_CTL_REG);</div><div class='ctx'> </div><div class='ctx'> 			db-&gt;emacrx_completed_flag = 1;</div><div class='hunk'>@@ -596,8 +684,7 @@ static void emac_rx(struct net_device *dev)</div><div class='ctx'> 		/* A packet ready now  &amp; Get status/length */</div><div class='ctx'> 		good_packet = true;</div><div class='ctx'> </div><div class='del'>-		emac_inblk_32bit(db-&gt;membase + EMAC_RX_IO_DATA_REG,</div><div class='del'>-				&amp;rxhdr, sizeof(rxhdr));</div><div class='add'>+		rxhdr = readl(db-&gt;membase + EMAC_RX_IO_DATA_REG);</div><div class='ctx'> </div><div class='ctx'> 		if (netif_msg_rx_status(db))</div><div class='ctx'> 			dev_dbg(db-&gt;dev, "rxhdr: %x\n", *((int *)(&amp;rxhdr)));</div><div class='hunk'>@@ -638,12 +725,25 @@ static void emac_rx(struct net_device *dev)</div><div class='ctx'> 			if (!skb)</div><div class='ctx'> 				continue;</div><div class='ctx'> 			skb_reserve(skb, 2);</div><div class='del'>-			rdptr = (u8 *) skb_put(skb, rxlen - 4);</div><div class='add'>+			rdptr = skb_put(skb, rxlen - 4);</div><div class='ctx'> </div><div class='ctx'> 			/* Read received packet from RX SRAM */</div><div class='ctx'> 			if (netif_msg_rx_status(db))</div><div class='ctx'> 				dev_dbg(db-&gt;dev, "RxLen %x\n", rxlen);</div><div class='ctx'> </div><div class='add'>+			if (rxlen &gt;= dev-&gt;mtu &amp;&amp; db-&gt;rx_chan) {</div><div class='add'>+				reg_val = readl(db-&gt;membase + EMAC_RX_CTL_REG);</div><div class='add'>+				reg_val |= EMAC_RX_CTL_DMA_EN;</div><div class='add'>+				writel(reg_val, db-&gt;membase + EMAC_RX_CTL_REG);</div><div class='add'>+				if (!emac_dma_inblk_32bit(db, skb, rdptr, rxlen))</div><div class='add'>+					break;</div><div class='add'>+</div><div class='add'>+				/* re enable cpu receive. then try to receive by emac_inblk_32bit */</div><div class='add'>+				reg_val = readl(db-&gt;membase + EMAC_RX_CTL_REG);</div><div class='add'>+				reg_val &amp;= ~EMAC_RX_CTL_DMA_EN;</div><div class='add'>+				writel(reg_val, db-&gt;membase + EMAC_RX_CTL_REG);</div><div class='add'>+			}</div><div class='add'>+</div><div class='ctx'> 			emac_inblk_32bit(db-&gt;membase + EMAC_RX_IO_DATA_REG,</div><div class='ctx'> 					rdptr, rxlen);</div><div class='ctx'> 			dev-&gt;stats.rx_bytes += rxlen;</div><div class='hunk'>@@ -661,13 +761,11 @@ static irqreturn_t emac_interrupt(int irq, void *dev_id)</div><div class='ctx'> 	struct net_device *dev = dev_id;</div><div class='ctx'> 	struct emac_board_info *db = netdev_priv(dev);</div><div class='ctx'> 	int int_status;</div><div class='del'>-	unsigned long flags;</div><div class='ctx'> 	unsigned int reg_val;</div><div class='ctx'> </div><div class='ctx'> 	/* A real interrupt coming */</div><div class='ctx'> </div><div class='del'>-	/* holders of db-&gt;lock must always block IRQs */</div><div class='del'>-	spin_lock_irqsave(&amp;db-&gt;lock, flags);</div><div class='add'>+	spin_lock(&amp;db-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable all interrupts */</div><div class='ctx'> 	writel(0, db-&gt;membase + EMAC_INT_CTL_REG);</div><div class='hunk'>@@ -689,19 +787,24 @@ static irqreturn_t emac_interrupt(int irq, void *dev_id)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Transmit Interrupt check */</div><div class='del'>-	if (int_status &amp; (0x01 | 0x02))</div><div class='add'>+	if (int_status &amp; EMAC_INT_STA_TX_COMPLETE)</div><div class='ctx'> 		emac_tx_done(dev, db, int_status);</div><div class='ctx'> </div><div class='del'>-	if (int_status &amp; (0x04 | 0x08))</div><div class='add'>+	if (int_status &amp; EMAC_INT_STA_TX_ABRT)</div><div class='ctx'> 		netdev_info(dev, " ab : %x\n", int_status);</div><div class='ctx'> </div><div class='ctx'> 	/* Re-enable interrupt mask */</div><div class='ctx'> 	if (db-&gt;emacrx_completed_flag == 1) {</div><div class='ctx'> 		reg_val = readl(db-&gt;membase + EMAC_INT_CTL_REG);</div><div class='del'>-		reg_val |= (0xf &lt;&lt; 0) | (0x01 &lt;&lt; 8);</div><div class='add'>+		reg_val |= (EMAC_INT_CTL_TX_EN | EMAC_INT_CTL_TX_ABRT_EN | EMAC_INT_CTL_RX_EN);</div><div class='add'>+		writel(reg_val, db-&gt;membase + EMAC_INT_CTL_REG);</div><div class='add'>+	} else {</div><div class='add'>+		reg_val = readl(db-&gt;membase + EMAC_INT_CTL_REG);</div><div class='add'>+		reg_val |= (EMAC_INT_CTL_TX_EN | EMAC_INT_CTL_TX_ABRT_EN);</div><div class='ctx'> 		writel(reg_val, db-&gt;membase + EMAC_INT_CTL_REG);</div><div class='ctx'> 	}</div><div class='del'>-	spin_unlock_irqrestore(&amp;db-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	spin_unlock(&amp;db-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='hunk'>@@ -743,7 +846,7 @@ static int emac_open(struct net_device *dev)</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	phy_start(db-&gt;phy_dev);</div><div class='add'>+	phy_start(dev-&gt;phydev);</div><div class='ctx'> 	netif_start_queue(dev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -780,7 +883,7 @@ static int emac_stop(struct net_device *ndev)</div><div class='ctx'> 	netif_stop_queue(ndev);</div><div class='ctx'> 	netif_carrier_off(ndev);</div><div class='ctx'> </div><div class='del'>-	phy_stop(db-&gt;phy_dev);</div><div class='add'>+	phy_stop(ndev-&gt;phydev);</div><div class='ctx'> </div><div class='ctx'> 	emac_mdio_remove(ndev);</div><div class='ctx'> </div><div class='hunk'>@@ -797,8 +900,7 @@ static const struct net_device_ops emac_netdev_ops = {</div><div class='ctx'> 	.ndo_start_xmit		= emac_start_xmit,</div><div class='ctx'> 	.ndo_tx_timeout		= emac_timeout,</div><div class='ctx'> 	.ndo_set_rx_mode	= emac_set_rx_mode,</div><div class='del'>-	.ndo_do_ioctl		= emac_ioctl,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='add'>+	.ndo_eth_ioctl		= phy_do_ioctl_running,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> 	.ndo_set_mac_address	= emac_set_mac_address,</div><div class='ctx'> #ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='hunk'>@@ -806,6 +908,58 @@ static const struct net_device_ops emac_netdev_ops = {</div><div class='ctx'> #endif</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static int emac_configure_dma(struct emac_board_info *db)</div><div class='add'>+{</div><div class='add'>+	struct platform_device *pdev = db-&gt;pdev;</div><div class='add'>+	struct net_device *ndev = db-&gt;ndev;</div><div class='add'>+	struct dma_slave_config conf = {};</div><div class='add'>+	struct resource *regs;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='add'>+	if (!regs) {</div><div class='add'>+		netdev_err(ndev, "get io resource from device failed.\n");</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto out_clear_chan;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev_info(ndev, "get io resource from device: %pa, size = %u\n",</div><div class='add'>+		    &amp;regs-&gt;start, (unsigned int)resource_size(regs));</div><div class='add'>+	db-&gt;emac_rx_fifo = regs-&gt;start + EMAC_RX_IO_DATA_REG;</div><div class='add'>+</div><div class='add'>+	db-&gt;rx_chan = dma_request_chan(&amp;pdev-&gt;dev, "rx");</div><div class='add'>+	if (IS_ERR(db-&gt;rx_chan)) {</div><div class='add'>+		netdev_err(ndev,</div><div class='add'>+			   "failed to request dma channel. dma is disabled\n");</div><div class='add'>+		err = PTR_ERR(db-&gt;rx_chan);</div><div class='add'>+		goto out_clear_chan;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	conf.direction = DMA_DEV_TO_MEM;</div><div class='add'>+	conf.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;</div><div class='add'>+	conf.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;</div><div class='add'>+	conf.src_addr = db-&gt;emac_rx_fifo;</div><div class='add'>+	conf.dst_maxburst = 4;</div><div class='add'>+	conf.src_maxburst = 4;</div><div class='add'>+	conf.device_fc = false;</div><div class='add'>+</div><div class='add'>+	err = dmaengine_slave_config(db-&gt;rx_chan, &amp;conf);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(ndev, "config dma slave failed\n");</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto out_slave_configure_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+</div><div class='add'>+out_slave_configure_err:</div><div class='add'>+	dma_release_channel(db-&gt;rx_chan);</div><div class='add'>+</div><div class='add'>+out_clear_chan:</div><div class='add'>+	db-&gt;rx_chan = NULL;</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> /* Search EMAC board, allocate space and register it</div><div class='ctx'>  */</div><div class='ctx'> static int emac_probe(struct platform_device *pdev)</div><div class='hunk'>@@ -814,7 +968,6 @@ static int emac_probe(struct platform_device *pdev)</div><div class='ctx'> 	struct emac_board_info *db;</div><div class='ctx'> 	struct net_device *ndev;</div><div class='ctx'> 	int ret = 0;</div><div class='del'>-	const char *mac_addr;</div><div class='ctx'> </div><div class='ctx'> 	ndev = alloc_etherdev(sizeof(struct emac_board_info));</div><div class='ctx'> 	if (!ndev) {</div><div class='hunk'>@@ -825,11 +978,11 @@ static int emac_probe(struct platform_device *pdev)</div><div class='ctx'> 	SET_NETDEV_DEV(ndev, &amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	db = netdev_priv(ndev);</div><div class='del'>-	memset(db, 0, sizeof(*db));</div><div class='ctx'> </div><div class='ctx'> 	db-&gt;dev = &amp;pdev-&gt;dev;</div><div class='ctx'> 	db-&gt;ndev = ndev;</div><div class='ctx'> 	db-&gt;pdev = pdev;</div><div class='add'>+	db-&gt;msg_enable = netif_msg_init(debug, EMAC_DEFAULT_MSG_ENABLE);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_init(&amp;db-&gt;lock);</div><div class='ctx'> </div><div class='hunk'>@@ -846,31 +999,43 @@ static int emac_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (ndev-&gt;irq == -ENXIO) {</div><div class='ctx'> 		netdev_err(ndev, "No irq resource\n");</div><div class='ctx'> 		ret = ndev-&gt;irq;</div><div class='del'>-		goto out;</div><div class='add'>+		goto out_iounmap;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (emac_configure_dma(db))</div><div class='add'>+		netdev_info(ndev, "configure dma failed. disable dma.\n");</div><div class='add'>+</div><div class='ctx'> 	db-&gt;clk = devm_clk_get(&amp;pdev-&gt;dev, NULL);</div><div class='ctx'> 	if (IS_ERR(db-&gt;clk)) {</div><div class='ctx'> 		ret = PTR_ERR(db-&gt;clk);</div><div class='del'>-		goto out;</div><div class='add'>+		goto out_dispose_mapping;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	clk_prepare_enable(db-&gt;clk);</div><div class='add'>+	ret = clk_prepare_enable(db-&gt;clk);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Error couldn't enable clock (%d)\n", ret);</div><div class='add'>+		goto out_dispose_mapping;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	db-&gt;phy_node = of_parse_phandle(np, "phy", 0);</div><div class='add'>+	ret = sunxi_sram_claim(&amp;pdev-&gt;dev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Error couldn't map SRAM to device\n");</div><div class='add'>+		goto out_clk_disable_unprepare;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	db-&gt;phy_node = of_parse_phandle(np, "phy-handle", 0);</div><div class='add'>+	if (!db-&gt;phy_node)</div><div class='add'>+		db-&gt;phy_node = of_parse_phandle(np, "phy", 0);</div><div class='ctx'> 	if (!db-&gt;phy_node) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "no associated PHY\n");</div><div class='ctx'> 		ret = -ENODEV;</div><div class='del'>-		goto out;</div><div class='add'>+		goto out_release_sram;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Read MAC-address from DT */</div><div class='del'>-	mac_addr = of_get_mac_address(np);</div><div class='del'>-	if (mac_addr)</div><div class='del'>-		memcpy(ndev-&gt;dev_addr, mac_addr, ETH_ALEN);</div><div class='del'>-</div><div class='del'>-	/* Check if the MAC address is valid, if not get a random one */</div><div class='del'>-	if (!is_valid_ether_addr(ndev-&gt;dev_addr)) {</div><div class='add'>+	ret = of_get_ethdev_address(np, ndev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		/* if the MAC address is invalid get a random one */</div><div class='ctx'> 		eth_hw_addr_random(ndev);</div><div class='ctx'> 		dev_warn(&amp;pdev-&gt;dev, "using random MAC address %pM\n",</div><div class='ctx'> 			 ndev-&gt;dev_addr);</div><div class='hunk'>@@ -893,7 +1058,7 @@ static int emac_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Registering netdev failed!\n");</div><div class='ctx'> 		ret = -ENODEV;</div><div class='del'>-		goto out;</div><div class='add'>+		goto out_release_sram;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dev_info(&amp;pdev-&gt;dev, "%s: at %p, IRQ %d MAC: %pM\n",</div><div class='hunk'>@@ -901,6 +1066,15 @@ static int emac_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+out_release_sram:</div><div class='add'>+	sunxi_sram_release(&amp;pdev-&gt;dev);</div><div class='add'>+out_clk_disable_unprepare:</div><div class='add'>+	clk_disable_unprepare(db-&gt;clk);</div><div class='add'>+out_dispose_mapping:</div><div class='add'>+	irq_dispose_mapping(ndev-&gt;irq);</div><div class='add'>+	dma_release_channel(db-&gt;rx_chan);</div><div class='add'>+out_iounmap:</div><div class='add'>+	iounmap(db-&gt;membase);</div><div class='ctx'> out:</div><div class='ctx'> 	dev_err(db-&gt;dev, "not found (%d).\n", ret);</div><div class='ctx'> </div><div class='hunk'>@@ -909,15 +1083,24 @@ out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int emac_remove(struct platform_device *pdev)</div><div class='add'>+static void emac_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *ndev = platform_get_drvdata(pdev);</div><div class='add'>+	struct emac_board_info *db = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	if (db-&gt;rx_chan) {</div><div class='add'>+		dmaengine_terminate_all(db-&gt;rx_chan);</div><div class='add'>+		dma_release_channel(db-&gt;rx_chan);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	unregister_netdev(ndev);</div><div class='add'>+	sunxi_sram_release(&amp;pdev-&gt;dev);</div><div class='add'>+	clk_disable_unprepare(db-&gt;clk);</div><div class='add'>+	irq_dispose_mapping(ndev-&gt;irq);</div><div class='add'>+	iounmap(db-&gt;membase);</div><div class='ctx'> 	free_netdev(ndev);</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(&amp;pdev-&gt;dev, "released and freed device\n");</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int emac_suspend(struct platform_device *dev, pm_message_t state)</div><div class='head'>diff --git a/drivers/net/ethernet/allwinner/sun4i-emac.h b/drivers/net/ethernet/allwinner/sun4i-emac.h<br/>index 38c72d9ec600..90bd9ad77607 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/allwinner/sun4i-emac.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/allwinner/sun4i-emac.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/allwinner/sun4i-emac.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/allwinner/sun4i-emac.h</a></div><div class='hunk'>@@ -38,6 +38,7 @@</div><div class='ctx'> #define EMAC_RX_CTL_REG		(0x3c)</div><div class='ctx'> #define EMAC_RX_CTL_AUTO_DRQ_EN		(1 &lt;&lt; 1)</div><div class='ctx'> #define EMAC_RX_CTL_DMA_EN		(1 &lt;&lt; 2)</div><div class='add'>+#define EMAC_RX_CTL_FLUSH_FIFO		(1 &lt;&lt; 3)</div><div class='ctx'> #define EMAC_RX_CTL_PASS_ALL_EN		(1 &lt;&lt; 4)</div><div class='ctx'> #define EMAC_RX_CTL_PASS_CTL_EN		(1 &lt;&lt; 5)</div><div class='ctx'> #define EMAC_RX_CTL_PASS_CRC_ERR_EN	(1 &lt;&lt; 6)</div><div class='hunk'>@@ -61,7 +62,21 @@</div><div class='ctx'> #define EMAC_RX_IO_DATA_STATUS_OK	(1 &lt;&lt; 7)</div><div class='ctx'> #define EMAC_RX_FBC_REG		(0x50)</div><div class='ctx'> #define EMAC_INT_CTL_REG	(0x54)</div><div class='add'>+#define EMAC_INT_CTL_RX_EN	(1 &lt;&lt; 8)</div><div class='add'>+#define EMAC_INT_CTL_TX0_EN	(1)</div><div class='add'>+#define EMAC_INT_CTL_TX1_EN	(1 &lt;&lt; 1)</div><div class='add'>+#define EMAC_INT_CTL_TX_EN	(EMAC_INT_CTL_TX0_EN | EMAC_INT_CTL_TX1_EN)</div><div class='add'>+#define EMAC_INT_CTL_TX0_ABRT_EN	(0x1 &lt;&lt; 2)</div><div class='add'>+#define EMAC_INT_CTL_TX1_ABRT_EN	(0x1 &lt;&lt; 3)</div><div class='add'>+#define EMAC_INT_CTL_TX_ABRT_EN	(EMAC_INT_CTL_TX0_ABRT_EN | EMAC_INT_CTL_TX1_ABRT_EN)</div><div class='ctx'> #define EMAC_INT_STA_REG	(0x58)</div><div class='add'>+#define EMAC_INT_STA_TX0_COMPLETE	(0x1)</div><div class='add'>+#define EMAC_INT_STA_TX1_COMPLETE	(0x1 &lt;&lt; 1)</div><div class='add'>+#define EMAC_INT_STA_TX_COMPLETE	(EMAC_INT_STA_TX0_COMPLETE | EMAC_INT_STA_TX1_COMPLETE)</div><div class='add'>+#define EMAC_INT_STA_TX0_ABRT	(0x1 &lt;&lt; 2)</div><div class='add'>+#define EMAC_INT_STA_TX1_ABRT	(0x1 &lt;&lt; 3)</div><div class='add'>+#define EMAC_INT_STA_TX_ABRT	(EMAC_INT_STA_TX0_ABRT | EMAC_INT_STA_TX1_ABRT)</div><div class='add'>+#define EMAC_INT_STA_RX_COMPLETE	(0x1 &lt;&lt; 8)</div><div class='ctx'> #define EMAC_MAC_CTL0_REG	(0x5c)</div><div class='ctx'> #define EMAC_MAC_CTL0_RX_FLOW_CTL_EN	(1 &lt;&lt; 2)</div><div class='ctx'> #define EMAC_MAC_CTL0_TX_FLOW_CTL_EN	(1 &lt;&lt; 3)</div><div class='hunk'>@@ -87,8 +102,11 @@</div><div class='ctx'> #define EMAC_MAC_CLRT_RM		(0x0f)</div><div class='ctx'> #define EMAC_MAC_MAXF_REG	(0x70)</div><div class='ctx'> #define EMAC_MAC_SUPP_REG	(0x74)</div><div class='add'>+#define EMAC_MAC_SUPP_100M	(0x1 &lt;&lt; 8)</div><div class='ctx'> #define EMAC_MAC_TEST_REG	(0x78)</div><div class='ctx'> #define EMAC_MAC_MCFG_REG	(0x7c)</div><div class='add'>+#define EMAC_MAC_MCFG_MII_CLKD_MASK	(0xff &lt;&lt; 2)</div><div class='add'>+#define EMAC_MAC_MCFG_MII_CLKD_72	(0x0d &lt;&lt; 2)</div><div class='ctx'> #define EMAC_MAC_A0_REG		(0x98)</div><div class='ctx'> #define EMAC_MAC_A1_REG		(0x9c)</div><div class='ctx'> #define EMAC_MAC_A2_REG		(0xa0)</div><div class='head'>diff --git a/drivers/net/ethernet/alteon/Kconfig b/drivers/net/ethernet/alteon/Kconfig<br/>index e06ccab354b5..cfe1f3159d61 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/alteon/Kconfig?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/alteon/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/alteon/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/alteon/Kconfig</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> #</div><div class='ctx'> # Alteon network device configuration</div><div class='ctx'> #</div><div class='hunk'>@@ -6,7 +7,7 @@ config NET_VENDOR_ALTEON</div><div class='ctx'> 	bool "Alteon devices"</div><div class='ctx'> 	default y</div><div class='ctx'> 	depends on PCI</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  If you have a network (Ethernet) card belonging to this class, say Y.</div><div class='ctx'> </div><div class='ctx'> 	  Note that the answer to this question doesn't directly affect the</div><div class='hunk'>@@ -19,7 +20,7 @@ if NET_VENDOR_ALTEON</div><div class='ctx'> config ACENIC</div><div class='ctx'> 	tristate "Alteon AceNIC/3Com 3C985/NetGear GA620 Gigabit support"</div><div class='ctx'> 	depends on PCI</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  Say Y here if you have an Alteon AceNIC, 3Com 3C985(B), NetGear</div><div class='ctx'> 	  GA620, SGI Gigabit or Farallon PN9000-SX PCI Gigabit Ethernet</div><div class='ctx'> 	  adapter. The driver allows for using the Jumbo Frame option (9000</div><div class='hunk'>@@ -33,7 +34,7 @@ config ACENIC</div><div class='ctx'> config ACENIC_OMIT_TIGON_I</div><div class='ctx'> 	bool "Omit support for old Tigon I based AceNICs"</div><div class='ctx'> 	depends on ACENIC</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  Say Y here if you only have Tigon II based AceNICs and want to leave</div><div class='ctx'> 	  out support for the older Tigon I based cards which are no longer</div><div class='ctx'> 	  being sold (ie. the original Alteon AceNIC and 3Com 3C985 (non B</div><div class='head'>diff --git a/drivers/net/ethernet/alteon/Makefile b/drivers/net/ethernet/alteon/Makefile<br/>index a2ca173f2a50..be5225559b6d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/alteon/Makefile?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/alteon/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/alteon/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/alteon/Makefile</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> #</div><div class='ctx'> # Makefile for the Alteon network device drivers.</div><div class='ctx'> #</div><div class='head'>diff --git a/drivers/net/ethernet/alteon/acenic.c b/drivers/net/ethernet/alteon/acenic.c<br/>index b90a26b13fdf..9e6f91df2ba0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/alteon/acenic.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/alteon/acenic.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/alteon/acenic.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/alteon/acenic.c</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='ctx'> /*</div><div class='ctx'>  * acenic.c: Linux driver for the Alteon AceNIC Gigabit Ethernet card</div><div class='ctx'>  *           and other Tigon based cards.</div><div class='hunk'>@@ -12,11 +13,6 @@</div><div class='ctx'>  * about the driver. Send mail to linux-acenic-help@sunsite.auc.dk to</div><div class='ctx'>  * see how to subscribe.</div><div class='ctx'>  *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- *</div><div class='ctx'>  * Additional credits:</div><div class='ctx'>  *   Pete Wyckoff &lt;wyckoff@ca.sandia.gov&gt;: Initial Linux/Alpha and trace</div><div class='ctx'>  *       dump support. The trace dump support has not been</div><div class='hunk'>@@ -80,7 +76,7 @@</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/irq.h&gt;</div><div class='ctx'> #include &lt;asm/byteorder.h&gt;</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> #define DRV_NAME "acenic"</div><div class='hunk'>@@ -429,17 +425,19 @@ static const char version[] =</div><div class='ctx'>   "acenic.c: v0.92 08/05/2002  Jes Sorensen, linux-acenic@SunSITE.dk\n"</div><div class='ctx'>   "                            http://home.cern.ch/~jes/gige/acenic.html\n";</div><div class='ctx'> </div><div class='del'>-static int ace_get_settings(struct net_device *, struct ethtool_cmd *);</div><div class='del'>-static int ace_set_settings(struct net_device *, struct ethtool_cmd *);</div><div class='add'>+static int ace_get_link_ksettings(struct net_device *,</div><div class='add'>+				  struct ethtool_link_ksettings *);</div><div class='add'>+static int ace_set_link_ksettings(struct net_device *,</div><div class='add'>+				  const struct ethtool_link_ksettings *);</div><div class='ctx'> static void ace_get_drvinfo(struct net_device *, struct ethtool_drvinfo *);</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops ace_ethtool_ops = {</div><div class='del'>-	.get_settings = ace_get_settings,</div><div class='del'>-	.set_settings = ace_set_settings,</div><div class='ctx'> 	.get_drvinfo = ace_get_drvinfo,</div><div class='add'>+	.get_link_ksettings = ace_get_link_ksettings,</div><div class='add'>+	.set_link_ksettings = ace_set_link_ksettings,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static void ace_watchdog(struct net_device *dev);</div><div class='add'>+static void ace_watchdog(struct net_device *dev, unsigned int txqueue);</div><div class='ctx'> </div><div class='ctx'> static const struct net_device_ops ace_netdev_ops = {</div><div class='ctx'> 	.ndo_open		= ace_open,</div><div class='hunk'>@@ -467,6 +465,7 @@ static int acenic_probe_one(struct pci_dev *pdev,</div><div class='ctx'> 	SET_NETDEV_DEV(dev, &amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	ap = netdev_priv(dev);</div><div class='add'>+	ap-&gt;ndev = dev;</div><div class='ctx'> 	ap-&gt;pdev = pdev;</div><div class='ctx'> 	ap-&gt;name = pci_name(pdev);</div><div class='ctx'> </div><div class='hunk'>@@ -474,6 +473,8 @@ static int acenic_probe_one(struct pci_dev *pdev,</div><div class='ctx'> 	dev-&gt;features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX;</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;watchdog_timeo = 5*HZ;</div><div class='add'>+	dev-&gt;min_mtu = 0;</div><div class='add'>+	dev-&gt;max_mtu = ACE_JUMBO_MTU;</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;netdev_ops = &amp;ace_netdev_ops;</div><div class='ctx'> 	dev-&gt;ethtool_ops = &amp;ace_ethtool_ops;</div><div class='hunk'>@@ -547,6 +548,7 @@ static int acenic_probe_one(struct pci_dev *pdev,</div><div class='ctx'> 			       ap-&gt;name);</div><div class='ctx'> 			break;</div><div class='ctx'> 		}</div><div class='add'>+		fallthrough;</div><div class='ctx'> 	case PCI_VENDOR_ID_SGI:</div><div class='ctx'> 		printk(KERN_INFO "%s: SGI AceNIC ", ap-&gt;name);</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -587,8 +589,7 @@ static int acenic_probe_one(struct pci_dev *pdev,</div><div class='ctx'> 	}</div><div class='ctx'> 	ap-&gt;name = dev-&gt;name;</div><div class='ctx'> </div><div class='del'>-	if (ap-&gt;pci_using_dac)</div><div class='del'>-		dev-&gt;features |= NETIF_F_HIGHDMA;</div><div class='add'>+	dev-&gt;features |= NETIF_F_HIGHDMA;</div><div class='ctx'> </div><div class='ctx'> 	pci_set_drvdata(pdev, dev);</div><div class='ctx'> </div><div class='hunk'>@@ -641,9 +642,8 @@ static void acenic_remove_one(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> 			ringp = &amp;ap-&gt;skb-&gt;rx_std_skbuff[i];</div><div class='ctx'> 			mapping = dma_unmap_addr(ringp, mapping);</div><div class='del'>-			pci_unmap_page(ap-&gt;pdev, mapping,</div><div class='del'>-				       ACE_STD_BUFSIZE,</div><div class='del'>-				       PCI_DMA_FROMDEVICE);</div><div class='add'>+			dma_unmap_page(&amp;ap-&gt;pdev-&gt;dev, mapping,</div><div class='add'>+				       ACE_STD_BUFSIZE, DMA_FROM_DEVICE);</div><div class='ctx'> </div><div class='ctx'> 			ap-&gt;rx_std_ring[i].size = 0;</div><div class='ctx'> 			ap-&gt;skb-&gt;rx_std_skbuff[i].skb = NULL;</div><div class='hunk'>@@ -661,9 +661,9 @@ static void acenic_remove_one(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> 				ringp = &amp;ap-&gt;skb-&gt;rx_mini_skbuff[i];</div><div class='ctx'> 				mapping = dma_unmap_addr(ringp,mapping);</div><div class='del'>-				pci_unmap_page(ap-&gt;pdev, mapping,</div><div class='add'>+				dma_unmap_page(&amp;ap-&gt;pdev-&gt;dev, mapping,</div><div class='ctx'> 					       ACE_MINI_BUFSIZE,</div><div class='del'>-					       PCI_DMA_FROMDEVICE);</div><div class='add'>+					       DMA_FROM_DEVICE);</div><div class='ctx'> </div><div class='ctx'> 				ap-&gt;rx_mini_ring[i].size = 0;</div><div class='ctx'> 				ap-&gt;skb-&gt;rx_mini_skbuff[i].skb = NULL;</div><div class='hunk'>@@ -680,9 +680,8 @@ static void acenic_remove_one(struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> 			ringp = &amp;ap-&gt;skb-&gt;rx_jumbo_skbuff[i];</div><div class='ctx'> 			mapping = dma_unmap_addr(ringp, mapping);</div><div class='del'>-			pci_unmap_page(ap-&gt;pdev, mapping,</div><div class='del'>-				       ACE_JUMBO_BUFSIZE,</div><div class='del'>-				       PCI_DMA_FROMDEVICE);</div><div class='add'>+			dma_unmap_page(&amp;ap-&gt;pdev-&gt;dev, mapping,</div><div class='add'>+				       ACE_JUMBO_BUFSIZE, DMA_FROM_DEVICE);</div><div class='ctx'> </div><div class='ctx'> 			ap-&gt;rx_jumbo_ring[i].size = 0;</div><div class='ctx'> 			ap-&gt;skb-&gt;rx_jumbo_skbuff[i].skb = NULL;</div><div class='hunk'>@@ -712,8 +711,8 @@ static void ace_free_descriptors(struct net_device *dev)</div><div class='ctx'> 			 RX_JUMBO_RING_ENTRIES +</div><div class='ctx'> 			 RX_MINI_RING_ENTRIES +</div><div class='ctx'> 			 RX_RETURN_RING_ENTRIES));</div><div class='del'>-		pci_free_consistent(ap-&gt;pdev, size, ap-&gt;rx_std_ring,</div><div class='del'>-				    ap-&gt;rx_ring_base_dma);</div><div class='add'>+		dma_free_coherent(&amp;ap-&gt;pdev-&gt;dev, size, ap-&gt;rx_std_ring,</div><div class='add'>+				  ap-&gt;rx_ring_base_dma);</div><div class='ctx'> 		ap-&gt;rx_std_ring = NULL;</div><div class='ctx'> 		ap-&gt;rx_jumbo_ring = NULL;</div><div class='ctx'> 		ap-&gt;rx_mini_ring = NULL;</div><div class='hunk'>@@ -721,31 +720,30 @@ static void ace_free_descriptors(struct net_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> 	if (ap-&gt;evt_ring != NULL) {</div><div class='ctx'> 		size = (sizeof(struct event) * EVT_RING_ENTRIES);</div><div class='del'>-		pci_free_consistent(ap-&gt;pdev, size, ap-&gt;evt_ring,</div><div class='del'>-				    ap-&gt;evt_ring_dma);</div><div class='add'>+		dma_free_coherent(&amp;ap-&gt;pdev-&gt;dev, size, ap-&gt;evt_ring,</div><div class='add'>+				  ap-&gt;evt_ring_dma);</div><div class='ctx'> 		ap-&gt;evt_ring = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (ap-&gt;tx_ring != NULL &amp;&amp; !ACE_IS_TIGON_I(ap)) {</div><div class='ctx'> 		size = (sizeof(struct tx_desc) * MAX_TX_RING_ENTRIES);</div><div class='del'>-		pci_free_consistent(ap-&gt;pdev, size, ap-&gt;tx_ring,</div><div class='del'>-				    ap-&gt;tx_ring_dma);</div><div class='add'>+		dma_free_coherent(&amp;ap-&gt;pdev-&gt;dev, size, ap-&gt;tx_ring,</div><div class='add'>+				  ap-&gt;tx_ring_dma);</div><div class='ctx'> 	}</div><div class='ctx'> 	ap-&gt;tx_ring = NULL;</div><div class='ctx'> </div><div class='ctx'> 	if (ap-&gt;evt_prd != NULL) {</div><div class='del'>-		pci_free_consistent(ap-&gt;pdev, sizeof(u32),</div><div class='del'>-				    (void *)ap-&gt;evt_prd, ap-&gt;evt_prd_dma);</div><div class='add'>+		dma_free_coherent(&amp;ap-&gt;pdev-&gt;dev, sizeof(u32),</div><div class='add'>+				  (void *)ap-&gt;evt_prd, ap-&gt;evt_prd_dma);</div><div class='ctx'> 		ap-&gt;evt_prd = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (ap-&gt;rx_ret_prd != NULL) {</div><div class='del'>-		pci_free_consistent(ap-&gt;pdev, sizeof(u32),</div><div class='del'>-				    (void *)ap-&gt;rx_ret_prd,</div><div class='del'>-				    ap-&gt;rx_ret_prd_dma);</div><div class='add'>+		dma_free_coherent(&amp;ap-&gt;pdev-&gt;dev, sizeof(u32),</div><div class='add'>+				  (void *)ap-&gt;rx_ret_prd, ap-&gt;rx_ret_prd_dma);</div><div class='ctx'> 		ap-&gt;rx_ret_prd = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (ap-&gt;tx_csm != NULL) {</div><div class='del'>-		pci_free_consistent(ap-&gt;pdev, sizeof(u32),</div><div class='del'>-				    (void *)ap-&gt;tx_csm, ap-&gt;tx_csm_dma);</div><div class='add'>+		dma_free_coherent(&amp;ap-&gt;pdev-&gt;dev, sizeof(u32),</div><div class='add'>+				  (void *)ap-&gt;tx_csm, ap-&gt;tx_csm_dma);</div><div class='ctx'> 		ap-&gt;tx_csm = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -762,8 +760,8 @@ static int ace_allocate_descriptors(struct net_device *dev)</div><div class='ctx'> 		 RX_MINI_RING_ENTRIES +</div><div class='ctx'> 		 RX_RETURN_RING_ENTRIES));</div><div class='ctx'> </div><div class='del'>-	ap-&gt;rx_std_ring = pci_alloc_consistent(ap-&gt;pdev, size,</div><div class='del'>-					       &amp;ap-&gt;rx_ring_base_dma);</div><div class='add'>+	ap-&gt;rx_std_ring = dma_alloc_coherent(&amp;ap-&gt;pdev-&gt;dev, size,</div><div class='add'>+					     &amp;ap-&gt;rx_ring_base_dma, GFP_KERNEL);</div><div class='ctx'> 	if (ap-&gt;rx_std_ring == NULL)</div><div class='ctx'> 		goto fail;</div><div class='ctx'> </div><div class='hunk'>@@ -773,7 +771,8 @@ static int ace_allocate_descriptors(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	size = (sizeof(struct event) * EVT_RING_ENTRIES);</div><div class='ctx'> </div><div class='del'>-	ap-&gt;evt_ring = pci_alloc_consistent(ap-&gt;pdev, size, &amp;ap-&gt;evt_ring_dma);</div><div class='add'>+	ap-&gt;evt_ring = dma_alloc_coherent(&amp;ap-&gt;pdev-&gt;dev, size,</div><div class='add'>+					  &amp;ap-&gt;evt_ring_dma, GFP_KERNEL);</div><div class='ctx'> </div><div class='ctx'> 	if (ap-&gt;evt_ring == NULL)</div><div class='ctx'> 		goto fail;</div><div class='hunk'>@@ -785,25 +784,25 @@ static int ace_allocate_descriptors(struct net_device *dev)</div><div class='ctx'> 	if (!ACE_IS_TIGON_I(ap)) {</div><div class='ctx'> 		size = (sizeof(struct tx_desc) * MAX_TX_RING_ENTRIES);</div><div class='ctx'> </div><div class='del'>-		ap-&gt;tx_ring = pci_alloc_consistent(ap-&gt;pdev, size,</div><div class='del'>-						   &amp;ap-&gt;tx_ring_dma);</div><div class='add'>+		ap-&gt;tx_ring = dma_alloc_coherent(&amp;ap-&gt;pdev-&gt;dev, size,</div><div class='add'>+						 &amp;ap-&gt;tx_ring_dma, GFP_KERNEL);</div><div class='ctx'> </div><div class='ctx'> 		if (ap-&gt;tx_ring == NULL)</div><div class='ctx'> 			goto fail;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ap-&gt;evt_prd = pci_alloc_consistent(ap-&gt;pdev, sizeof(u32),</div><div class='del'>-					   &amp;ap-&gt;evt_prd_dma);</div><div class='add'>+	ap-&gt;evt_prd = dma_alloc_coherent(&amp;ap-&gt;pdev-&gt;dev, sizeof(u32),</div><div class='add'>+					 &amp;ap-&gt;evt_prd_dma, GFP_KERNEL);</div><div class='ctx'> 	if (ap-&gt;evt_prd == NULL)</div><div class='ctx'> 		goto fail;</div><div class='ctx'> </div><div class='del'>-	ap-&gt;rx_ret_prd = pci_alloc_consistent(ap-&gt;pdev, sizeof(u32),</div><div class='del'>-					      &amp;ap-&gt;rx_ret_prd_dma);</div><div class='add'>+	ap-&gt;rx_ret_prd = dma_alloc_coherent(&amp;ap-&gt;pdev-&gt;dev, sizeof(u32),</div><div class='add'>+					    &amp;ap-&gt;rx_ret_prd_dma, GFP_KERNEL);</div><div class='ctx'> 	if (ap-&gt;rx_ret_prd == NULL)</div><div class='ctx'> 		goto fail;</div><div class='ctx'> </div><div class='del'>-	ap-&gt;tx_csm = pci_alloc_consistent(ap-&gt;pdev, sizeof(u32),</div><div class='del'>-					  &amp;ap-&gt;tx_csm_dma);</div><div class='add'>+	ap-&gt;tx_csm = dma_alloc_coherent(&amp;ap-&gt;pdev-&gt;dev, sizeof(u32),</div><div class='add'>+					&amp;ap-&gt;tx_csm_dma, GFP_KERNEL);</div><div class='ctx'> 	if (ap-&gt;tx_csm == NULL)</div><div class='ctx'> 		goto fail;</div><div class='ctx'> </div><div class='hunk'>@@ -829,8 +828,8 @@ static void ace_init_cleanup(struct net_device *dev)</div><div class='ctx'> 	ace_free_descriptors(dev);</div><div class='ctx'> </div><div class='ctx'> 	if (ap-&gt;info)</div><div class='del'>-		pci_free_consistent(ap-&gt;pdev, sizeof(struct ace_info),</div><div class='del'>-				    ap-&gt;info, ap-&gt;info_dma);</div><div class='add'>+		dma_free_coherent(&amp;ap-&gt;pdev-&gt;dev, sizeof(struct ace_info),</div><div class='add'>+				  ap-&gt;info, ap-&gt;info_dma);</div><div class='ctx'> 	kfree(ap-&gt;skb);</div><div class='ctx'> 	kfree(ap-&gt;trace_buf);</div><div class='ctx'> </div><div class='hunk'>@@ -869,6 +868,7 @@ static int ace_init(struct net_device *dev)</div><div class='ctx'> 	int board_idx, ecode = 0;</div><div class='ctx'> 	short i;</div><div class='ctx'> 	unsigned char cache_size;</div><div class='add'>+	u8 addr[ETH_ALEN];</div><div class='ctx'> </div><div class='ctx'> 	ap = netdev_priv(dev);</div><div class='ctx'> 	regs = ap-&gt;regs;</div><div class='hunk'>@@ -988,12 +988,13 @@ static int ace_init(struct net_device *dev)</div><div class='ctx'> 	writel(mac1, &amp;regs-&gt;MacAddrHi);</div><div class='ctx'> 	writel(mac2, &amp;regs-&gt;MacAddrLo);</div><div class='ctx'> </div><div class='del'>-	dev-&gt;dev_addr[0] = (mac1 &gt;&gt; 8) &amp; 0xff;</div><div class='del'>-	dev-&gt;dev_addr[1] = mac1 &amp; 0xff;</div><div class='del'>-	dev-&gt;dev_addr[2] = (mac2 &gt;&gt; 24) &amp; 0xff;</div><div class='del'>-	dev-&gt;dev_addr[3] = (mac2 &gt;&gt; 16) &amp; 0xff;</div><div class='del'>-	dev-&gt;dev_addr[4] = (mac2 &gt;&gt; 8) &amp; 0xff;</div><div class='del'>-	dev-&gt;dev_addr[5] = mac2 &amp; 0xff;</div><div class='add'>+	addr[0] = (mac1 &gt;&gt; 8) &amp; 0xff;</div><div class='add'>+	addr[1] = mac1 &amp; 0xff;</div><div class='add'>+	addr[2] = (mac2 &gt;&gt; 24) &amp; 0xff;</div><div class='add'>+	addr[3] = (mac2 &gt;&gt; 16) &amp; 0xff;</div><div class='add'>+	addr[4] = (mac2 &gt;&gt; 8) &amp; 0xff;</div><div class='add'>+	addr[5] = mac2 &amp; 0xff;</div><div class='add'>+	eth_hw_addr_set(dev, addr);</div><div class='ctx'> </div><div class='ctx'> 	printk("MAC: %pM\n", dev-&gt;dev_addr);</div><div class='ctx'> </div><div class='hunk'>@@ -1128,11 +1129,7 @@ static int ace_init(struct net_device *dev)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Configure DMA attributes.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {</div><div class='del'>-		ap-&gt;pci_using_dac = 1;</div><div class='del'>-	} else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {</div><div class='del'>-		ap-&gt;pci_using_dac = 0;</div><div class='del'>-	} else {</div><div class='add'>+	if (dma_set_mask(&amp;pdev-&gt;dev, DMA_BIT_MASK(64))) {</div><div class='ctx'> 		ecode = -ENODEV;</div><div class='ctx'> 		goto init_error;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1142,8 +1139,8 @@ static int ace_init(struct net_device *dev)</div><div class='ctx'> 	 * and the control blocks for the transmit and receive rings</div><div class='ctx'> 	 * as they need to be setup once and for all.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!(info = pci_alloc_consistent(ap-&gt;pdev, sizeof(struct ace_info),</div><div class='del'>-					  &amp;ap-&gt;info_dma))) {</div><div class='add'>+	if (!(info = dma_alloc_coherent(&amp;ap-&gt;pdev-&gt;dev, sizeof(struct ace_info),</div><div class='add'>+					&amp;ap-&gt;info_dma, GFP_KERNEL))) {</div><div class='ctx'> 		ecode = -EAGAIN;</div><div class='ctx'> 		goto init_error;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1152,7 +1149,7 @@ static int ace_init(struct net_device *dev)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Get the memory for the skb rings.</div><div class='ctx'> 	 */</div><div class='del'>-	if (!(ap-&gt;skb = kmalloc(sizeof(struct ace_skb), GFP_KERNEL))) {</div><div class='add'>+	if (!(ap-&gt;skb = kzalloc(sizeof(struct ace_skb), GFP_KERNEL))) {</div><div class='ctx'> 		ecode = -EAGAIN;</div><div class='ctx'> 		goto init_error;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1173,9 +1170,6 @@ static int ace_init(struct net_device *dev)</div><div class='ctx'> 	ap-&gt;last_mini_rx = 0;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-	memset(ap-&gt;info, 0, sizeof(struct ace_info));</div><div class='del'>-	memset(ap-&gt;skb, 0, sizeof(struct ace_skb));</div><div class='del'>-</div><div class='ctx'> 	ecode = ace_load_firmware(dev);</div><div class='ctx'> 	if (ecode)</div><div class='ctx'> 		goto init_error;</div><div class='hunk'>@@ -1432,13 +1426,13 @@ static int ace_init(struct net_device *dev)</div><div class='ctx'> 	ace_set_txprd(regs, ap, 0);</div><div class='ctx'> 	writel(0, &amp;regs-&gt;RxRetCsm);</div><div class='ctx'> </div><div class='del'>-       /*</div><div class='del'>-	* Enable DMA engine now.</div><div class='del'>-	* If we do this sooner, Mckinley box pukes.</div><div class='del'>-	* I assume it's because Tigon II DMA engine wants to check</div><div class='del'>-	* *something* even before the CPU is started.</div><div class='del'>-	*/</div><div class='del'>-       writel(1, &amp;regs-&gt;AssistState);  /* enable DMA */</div><div class='add'>+	/*</div><div class='add'>+	 * Enable DMA engine now.</div><div class='add'>+	 * If we do this sooner, Mckinley box pukes.</div><div class='add'>+	 * I assume it's because Tigon II DMA engine wants to check</div><div class='add'>+	 * *something* even before the CPU is started.</div><div class='add'>+	 */</div><div class='add'>+	writel(1, &amp;regs-&gt;AssistState);  /* enable DMA */</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Start the NIC CPU</div><div class='hunk'>@@ -1541,7 +1535,7 @@ static void ace_set_rxtx_parms(struct net_device *dev, int jumbo)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-static void ace_watchdog(struct net_device *data)</div><div class='add'>+static void ace_watchdog(struct net_device *data, unsigned int txqueue)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = data;</div><div class='ctx'> 	struct ace_private *ap = netdev_priv(dev);</div><div class='hunk'>@@ -1566,10 +1560,10 @@ static void ace_watchdog(struct net_device *data)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-static void ace_tasklet(unsigned long arg)</div><div class='add'>+static void ace_bh_work(struct work_struct *work)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *dev = (struct net_device *) arg;</div><div class='del'>-	struct ace_private *ap = netdev_priv(dev);</div><div class='add'>+	struct ace_private *ap = from_work(ap, work, ace_bh_work);</div><div class='add'>+	struct net_device *dev = ap-&gt;ndev;</div><div class='ctx'> 	int cur_size;</div><div class='ctx'> </div><div class='ctx'> 	cur_size = atomic_read(&amp;ap-&gt;cur_rx_bufs);</div><div class='hunk'>@@ -1601,7 +1595,7 @@ static void ace_tasklet(unsigned long arg)</div><div class='ctx'> #endif</div><div class='ctx'> 		ace_load_jumbo_rx_ring(dev, RX_JUMBO_SIZE - cur_size);</div><div class='ctx'> 	}</div><div class='del'>-	ap-&gt;tasklet_pending = 0;</div><div class='add'>+	ap-&gt;bh_work_pending = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -1623,7 +1617,7 @@ static void ace_dump_trace(struct ace_private *ap)</div><div class='ctx'>  *</div><div class='ctx'>  * Loading rings is safe without holding the spin lock since this is</div><div class='ctx'>  * done only before the device is enabled, thus no interrupts are</div><div class='del'>- * generated and by the interrupt handler/tasklet handler.</div><div class='add'>+ * generated and by the interrupt handler/bh handler.</div><div class='ctx'>  */</div><div class='ctx'> static void ace_load_std_rx_ring(struct net_device *dev, int nr_bufs)</div><div class='ctx'> {</div><div class='hunk'>@@ -1645,10 +1639,10 @@ static void ace_load_std_rx_ring(struct net_device *dev, int nr_bufs)</div><div class='ctx'> 		if (!skb)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		mapping = pci_map_page(ap-&gt;pdev, virt_to_page(skb-&gt;data),</div><div class='add'>+		mapping = dma_map_page(&amp;ap-&gt;pdev-&gt;dev,</div><div class='add'>+				       virt_to_page(skb-&gt;data),</div><div class='ctx'> 				       offset_in_page(skb-&gt;data),</div><div class='del'>-				       ACE_STD_BUFSIZE,</div><div class='del'>-				       PCI_DMA_FROMDEVICE);</div><div class='add'>+				       ACE_STD_BUFSIZE, DMA_FROM_DEVICE);</div><div class='ctx'> 		ap-&gt;skb-&gt;rx_std_skbuff[idx].skb = skb;</div><div class='ctx'> 		dma_unmap_addr_set(&amp;ap-&gt;skb-&gt;rx_std_skbuff[idx],</div><div class='ctx'> 				   mapping, mapping);</div><div class='hunk'>@@ -1706,10 +1700,10 @@ static void ace_load_mini_rx_ring(struct net_device *dev, int nr_bufs)</div><div class='ctx'> 		if (!skb)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		mapping = pci_map_page(ap-&gt;pdev, virt_to_page(skb-&gt;data),</div><div class='add'>+		mapping = dma_map_page(&amp;ap-&gt;pdev-&gt;dev,</div><div class='add'>+				       virt_to_page(skb-&gt;data),</div><div class='ctx'> 				       offset_in_page(skb-&gt;data),</div><div class='del'>-				       ACE_MINI_BUFSIZE,</div><div class='del'>-				       PCI_DMA_FROMDEVICE);</div><div class='add'>+				       ACE_MINI_BUFSIZE, DMA_FROM_DEVICE);</div><div class='ctx'> 		ap-&gt;skb-&gt;rx_mini_skbuff[idx].skb = skb;</div><div class='ctx'> 		dma_unmap_addr_set(&amp;ap-&gt;skb-&gt;rx_mini_skbuff[idx],</div><div class='ctx'> 				   mapping, mapping);</div><div class='hunk'>@@ -1762,10 +1756,10 @@ static void ace_load_jumbo_rx_ring(struct net_device *dev, int nr_bufs)</div><div class='ctx'> 		if (!skb)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		mapping = pci_map_page(ap-&gt;pdev, virt_to_page(skb-&gt;data),</div><div class='add'>+		mapping = dma_map_page(&amp;ap-&gt;pdev-&gt;dev,</div><div class='add'>+				       virt_to_page(skb-&gt;data),</div><div class='ctx'> 				       offset_in_page(skb-&gt;data),</div><div class='del'>-				       ACE_JUMBO_BUFSIZE,</div><div class='del'>-				       PCI_DMA_FROMDEVICE);</div><div class='add'>+				       ACE_JUMBO_BUFSIZE, DMA_FROM_DEVICE);</div><div class='ctx'> 		ap-&gt;skb-&gt;rx_jumbo_skbuff[idx].skb = skb;</div><div class='ctx'> 		dma_unmap_addr_set(&amp;ap-&gt;skb-&gt;rx_jumbo_skbuff[idx],</div><div class='ctx'> 				   mapping, mapping);</div><div class='hunk'>@@ -1886,16 +1880,16 @@ static u32 ace_handle_event(struct net_device *dev, u32 evtcsm, u32 evtprd)</div><div class='ctx'> 				}</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>- 			if (ACE_IS_TIGON_I(ap)) {</div><div class='del'>- 				struct cmd cmd;</div><div class='del'>- 				cmd.evt = C_SET_RX_JUMBO_PRD_IDX;</div><div class='del'>- 				cmd.code = 0;</div><div class='del'>- 				cmd.idx = 0;</div><div class='del'>- 				ace_issue_cmd(ap-&gt;regs, &amp;cmd);</div><div class='del'>- 			} else {</div><div class='del'>- 				writel(0, &amp;((ap-&gt;regs)-&gt;RxJumboPrd));</div><div class='del'>- 				wmb();</div><div class='del'>- 			}</div><div class='add'>+			if (ACE_IS_TIGON_I(ap)) {</div><div class='add'>+				struct cmd cmd;</div><div class='add'>+				cmd.evt = C_SET_RX_JUMBO_PRD_IDX;</div><div class='add'>+				cmd.code = 0;</div><div class='add'>+				cmd.idx = 0;</div><div class='add'>+				ace_issue_cmd(ap-&gt;regs, &amp;cmd);</div><div class='add'>+			} else {</div><div class='add'>+				writel(0, &amp;((ap-&gt;regs)-&gt;RxJumboPrd));</div><div class='add'>+				wmb();</div><div class='add'>+			}</div><div class='ctx'> </div><div class='ctx'> 			ap-&gt;jumbo = 0;</div><div class='ctx'> 			ap-&gt;rx_jumbo_skbprd = 0;</div><div class='hunk'>@@ -1929,7 +1923,7 @@ static void ace_rx_int(struct net_device *dev, u32 rxretprd, u32 rxretcsm)</div><div class='ctx'> 	while (idx != rxretprd) {</div><div class='ctx'> 		struct ring_info *rip;</div><div class='ctx'> 		struct sk_buff *skb;</div><div class='del'>-		struct rx_desc *rxdesc, *retdesc;</div><div class='add'>+		struct rx_desc *retdesc;</div><div class='ctx'> 		u32 skbidx;</div><div class='ctx'> 		int bd_flags, desc_type, mapsize;</div><div class='ctx'> 		u16 csum;</div><div class='hunk'>@@ -1955,19 +1949,16 @@ static void ace_rx_int(struct net_device *dev, u32 rxretprd, u32 rxretcsm)</div><div class='ctx'> 		case 0:</div><div class='ctx'> 			rip = &amp;ap-&gt;skb-&gt;rx_std_skbuff[skbidx];</div><div class='ctx'> 			mapsize = ACE_STD_BUFSIZE;</div><div class='del'>-			rxdesc = &amp;ap-&gt;rx_std_ring[skbidx];</div><div class='ctx'> 			std_count++;</div><div class='ctx'> 			break;</div><div class='ctx'> 		case BD_FLG_JUMBO:</div><div class='ctx'> 			rip = &amp;ap-&gt;skb-&gt;rx_jumbo_skbuff[skbidx];</div><div class='ctx'> 			mapsize = ACE_JUMBO_BUFSIZE;</div><div class='del'>-			rxdesc = &amp;ap-&gt;rx_jumbo_ring[skbidx];</div><div class='ctx'> 			atomic_dec(&amp;ap-&gt;cur_jumbo_bufs);</div><div class='ctx'> 			break;</div><div class='ctx'> 		case BD_FLG_MINI:</div><div class='ctx'> 			rip = &amp;ap-&gt;skb-&gt;rx_mini_skbuff[skbidx];</div><div class='ctx'> 			mapsize = ACE_MINI_BUFSIZE;</div><div class='del'>-			rxdesc = &amp;ap-&gt;rx_mini_ring[skbidx];</div><div class='ctx'> 			mini_count++;</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='hunk'>@@ -1979,10 +1970,8 @@ static void ace_rx_int(struct net_device *dev, u32 rxretprd, u32 rxretcsm)</div><div class='ctx'> </div><div class='ctx'> 		skb = rip-&gt;skb;</div><div class='ctx'> 		rip-&gt;skb = NULL;</div><div class='del'>-		pci_unmap_page(ap-&gt;pdev,</div><div class='del'>-			       dma_unmap_addr(rip, mapping),</div><div class='del'>-			       mapsize,</div><div class='del'>-			       PCI_DMA_FROMDEVICE);</div><div class='add'>+		dma_unmap_page(&amp;ap-&gt;pdev-&gt;dev, dma_unmap_addr(rip, mapping),</div><div class='add'>+			       mapsize, DMA_FROM_DEVICE);</div><div class='ctx'> 		skb_put(skb, retdesc-&gt;size);</div><div class='ctx'> </div><div class='ctx'> 		/*</div><div class='hunk'>@@ -2048,16 +2037,17 @@ static inline void ace_tx_int(struct net_device *dev,</div><div class='ctx'> 		skb = info-&gt;skb;</div><div class='ctx'> </div><div class='ctx'> 		if (dma_unmap_len(info, maplen)) {</div><div class='del'>-			pci_unmap_page(ap-&gt;pdev, dma_unmap_addr(info, mapping),</div><div class='add'>+			dma_unmap_page(&amp;ap-&gt;pdev-&gt;dev,</div><div class='add'>+				       dma_unmap_addr(info, mapping),</div><div class='ctx'> 				       dma_unmap_len(info, maplen),</div><div class='del'>-				       PCI_DMA_TODEVICE);</div><div class='add'>+				       DMA_TO_DEVICE);</div><div class='ctx'> 			dma_unmap_len_set(info, maplen, 0);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (skb) {</div><div class='ctx'> 			dev-&gt;stats.tx_packets++;</div><div class='ctx'> 			dev-&gt;stats.tx_bytes += skb-&gt;len;</div><div class='del'>-			dev_kfree_skb_irq(skb);</div><div class='add'>+			dev_consume_skb_irq(skb);</div><div class='ctx'> 			info-&gt;skb = NULL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -2170,7 +2160,7 @@ static irqreturn_t ace_interrupt(int irq, void *dev_id)</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (netif_running(dev)) {</div><div class='ctx'> 		int cur_size;</div><div class='del'>-		int run_tasklet = 0;</div><div class='add'>+		int run_bh_work = 0;</div><div class='ctx'> </div><div class='ctx'> 		cur_size = atomic_read(&amp;ap-&gt;cur_rx_bufs);</div><div class='ctx'> 		if (cur_size &lt; RX_LOW_STD_THRES) {</div><div class='hunk'>@@ -2182,7 +2172,7 @@ static irqreturn_t ace_interrupt(int irq, void *dev_id)</div><div class='ctx'> 				ace_load_std_rx_ring(dev,</div><div class='ctx'> 						     RX_RING_SIZE - cur_size);</div><div class='ctx'> 			} else</div><div class='del'>-				run_tasklet = 1;</div><div class='add'>+				run_bh_work = 1;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (!ACE_IS_TIGON_I(ap)) {</div><div class='hunk'>@@ -2198,7 +2188,7 @@ static irqreturn_t ace_interrupt(int irq, void *dev_id)</div><div class='ctx'> 					ace_load_mini_rx_ring(dev,</div><div class='ctx'> 							      RX_MINI_SIZE - cur_size);</div><div class='ctx'> 				} else</div><div class='del'>-					run_tasklet = 1;</div><div class='add'>+					run_bh_work = 1;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='hunk'>@@ -2215,12 +2205,12 @@ static irqreturn_t ace_interrupt(int irq, void *dev_id)</div><div class='ctx'> 					ace_load_jumbo_rx_ring(dev,</div><div class='ctx'> 							       RX_JUMBO_SIZE - cur_size);</div><div class='ctx'> 				} else</div><div class='del'>-					run_tasklet = 1;</div><div class='add'>+					run_bh_work = 1;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='del'>-		if (run_tasklet &amp;&amp; !ap-&gt;tasklet_pending) {</div><div class='del'>-			ap-&gt;tasklet_pending = 1;</div><div class='del'>-			tasklet_schedule(&amp;ap-&gt;ace_tasklet);</div><div class='add'>+		if (run_bh_work &amp;&amp; !ap-&gt;bh_work_pending) {</div><div class='add'>+			ap-&gt;bh_work_pending = 1;</div><div class='add'>+			queue_work(system_bh_wq, &amp;ap-&gt;ace_bh_work);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -2277,7 +2267,7 @@ static int ace_open(struct net_device *dev)</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Setup the bottom half rx ring refill handler</div><div class='ctx'> 	 */</div><div class='del'>-	tasklet_init(&amp;ap-&gt;ace_tasklet, ace_tasklet, (unsigned long)dev);</div><div class='add'>+	INIT_WORK(&amp;ap-&gt;ace_bh_work, ace_bh_work);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2311,7 +2301,7 @@ static int ace_close(struct net_device *dev)</div><div class='ctx'> 	cmd.idx = 0;</div><div class='ctx'> 	ace_issue_cmd(regs, &amp;cmd);</div><div class='ctx'> </div><div class='del'>-	tasklet_kill(&amp;ap-&gt;ace_tasklet);</div><div class='add'>+	cancel_work_sync(&amp;ap-&gt;ace_bh_work);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Make sure one CPU is not processing packets while</div><div class='hunk'>@@ -2339,9 +2329,10 @@ static int ace_close(struct net_device *dev)</div><div class='ctx'> 			} else</div><div class='ctx'> 				memset(ap-&gt;tx_ring + i, 0,</div><div class='ctx'> 				       sizeof(struct tx_desc));</div><div class='del'>-			pci_unmap_page(ap-&gt;pdev, dma_unmap_addr(info, mapping),</div><div class='add'>+			dma_unmap_page(&amp;ap-&gt;pdev-&gt;dev,</div><div class='add'>+				       dma_unmap_addr(info, mapping),</div><div class='ctx'> 				       dma_unmap_len(info, maplen),</div><div class='del'>-				       PCI_DMA_TODEVICE);</div><div class='add'>+				       DMA_TO_DEVICE);</div><div class='ctx'> 			dma_unmap_len_set(info, maplen, 0);</div><div class='ctx'> 		}</div><div class='ctx'> 		if (skb) {</div><div class='hunk'>@@ -2371,9 +2362,9 @@ ace_map_tx_skb(struct ace_private *ap, struct sk_buff *skb,</div><div class='ctx'> 	dma_addr_t mapping;</div><div class='ctx'> 	struct tx_ring_info *info;</div><div class='ctx'> </div><div class='del'>-	mapping = pci_map_page(ap-&gt;pdev, virt_to_page(skb-&gt;data),</div><div class='del'>-			       offset_in_page(skb-&gt;data),</div><div class='del'>-			       skb-&gt;len, PCI_DMA_TODEVICE);</div><div class='add'>+	mapping = dma_map_page(&amp;ap-&gt;pdev-&gt;dev, virt_to_page(skb-&gt;data),</div><div class='add'>+			       offset_in_page(skb-&gt;data), skb-&gt;len,</div><div class='add'>+			       DMA_TO_DEVICE);</div><div class='ctx'> </div><div class='ctx'> 	info = ap-&gt;skb-&gt;tx_skbuff + idx;</div><div class='ctx'> 	info-&gt;skb = tail;</div><div class='hunk'>@@ -2444,7 +2435,7 @@ restart:</div><div class='ctx'> 	} else {</div><div class='ctx'> 		dma_addr_t mapping;</div><div class='ctx'> 		u32 vlan_tag = 0;</div><div class='del'>-		int i, len = 0;</div><div class='add'>+		int i;</div><div class='ctx'> </div><div class='ctx'> 		mapping = ace_map_tx_skb(ap, skb, NULL, idx);</div><div class='ctx'> 		flagsize = (skb_headlen(skb) &lt;&lt; 16);</div><div class='hunk'>@@ -2463,7 +2454,6 @@ restart:</div><div class='ctx'> 			const skb_frag_t *frag = &amp;skb_shinfo(skb)-&gt;frags[i];</div><div class='ctx'> 			struct tx_ring_info *info;</div><div class='ctx'> </div><div class='del'>-			len += skb_frag_size(frag);</div><div class='ctx'> 			info = ap-&gt;skb-&gt;tx_skbuff + idx;</div><div class='ctx'> 			desc = ap-&gt;tx_ring + idx;</div><div class='ctx'> </div><div class='hunk'>@@ -2495,9 +2485,9 @@ restart:</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>- 	wmb();</div><div class='del'>- 	ap-&gt;tx_prd = idx;</div><div class='del'>- 	ace_set_txprd(regs, ap, idx);</div><div class='add'>+	wmb();</div><div class='add'>+	ap-&gt;tx_prd = idx;</div><div class='add'>+	ace_set_txprd(regs, ap, idx);</div><div class='ctx'> </div><div class='ctx'> 	if (flagsize &amp; BD_FLG_COAL_NOW) {</div><div class='ctx'> 		netif_stop_queue(dev);</div><div class='hunk'>@@ -2548,11 +2538,8 @@ static int ace_change_mtu(struct net_device *dev, int new_mtu)</div><div class='ctx'> 	struct ace_private *ap = netdev_priv(dev);</div><div class='ctx'> 	struct ace_regs __iomem *regs = ap-&gt;regs;</div><div class='ctx'> </div><div class='del'>-	if (new_mtu &gt; ACE_JUMBO_MTU)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='ctx'> 	writel(new_mtu + ETH_HLEN + 4, &amp;regs-&gt;IfMtu);</div><div class='del'>-	dev-&gt;mtu = new_mtu;</div><div class='add'>+	WRITE_ONCE(dev-&gt;mtu, new_mtu);</div><div class='ctx'> </div><div class='ctx'> 	if (new_mtu &gt; ACE_STD_MTU) {</div><div class='ctx'> 		if (!(ap-&gt;jumbo)) {</div><div class='hunk'>@@ -2580,43 +2567,44 @@ static int ace_change_mtu(struct net_device *dev, int new_mtu)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ace_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)</div><div class='add'>+static int ace_get_link_ksettings(struct net_device *dev,</div><div class='add'>+				  struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct ace_private *ap = netdev_priv(dev);</div><div class='ctx'> 	struct ace_regs __iomem *regs = ap-&gt;regs;</div><div class='ctx'> 	u32 link;</div><div class='add'>+	u32 supported;</div><div class='add'>+</div><div class='add'>+	memset(cmd, 0, sizeof(struct ethtool_link_ksettings));</div><div class='ctx'> </div><div class='del'>-	memset(ecmd, 0, sizeof(struct ethtool_cmd));</div><div class='del'>-	ecmd-&gt;supported =</div><div class='del'>-		(SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |</div><div class='del'>-		 SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |</div><div class='del'>-		 SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full |</div><div class='del'>-		 SUPPORTED_Autoneg | SUPPORTED_FIBRE);</div><div class='add'>+	supported = (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |</div><div class='add'>+		     SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |</div><div class='add'>+		     SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full |</div><div class='add'>+		     SUPPORTED_Autoneg | SUPPORTED_FIBRE);</div><div class='ctx'> </div><div class='del'>-	ecmd-&gt;port = PORT_FIBRE;</div><div class='del'>-	ecmd-&gt;transceiver = XCVR_INTERNAL;</div><div class='add'>+	cmd-&gt;base.port = PORT_FIBRE;</div><div class='ctx'> </div><div class='ctx'> 	link = readl(&amp;regs-&gt;GigLnkState);</div><div class='del'>-	if (link &amp; LNK_1000MB)</div><div class='del'>-		ethtool_cmd_speed_set(ecmd, SPEED_1000);</div><div class='del'>-	else {</div><div class='add'>+	if (link &amp; LNK_1000MB) {</div><div class='add'>+		cmd-&gt;base.speed = SPEED_1000;</div><div class='add'>+	} else {</div><div class='ctx'> 		link = readl(&amp;regs-&gt;FastLnkState);</div><div class='ctx'> 		if (link &amp; LNK_100MB)</div><div class='del'>-			ethtool_cmd_speed_set(ecmd, SPEED_100);</div><div class='add'>+			cmd-&gt;base.speed = SPEED_100;</div><div class='ctx'> 		else if (link &amp; LNK_10MB)</div><div class='del'>-			ethtool_cmd_speed_set(ecmd, SPEED_10);</div><div class='add'>+			cmd-&gt;base.speed = SPEED_10;</div><div class='ctx'> 		else</div><div class='del'>-			ethtool_cmd_speed_set(ecmd, 0);</div><div class='add'>+			cmd-&gt;base.speed = 0;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (link &amp; LNK_FULL_DUPLEX)</div><div class='del'>-		ecmd-&gt;duplex = DUPLEX_FULL;</div><div class='add'>+		cmd-&gt;base.duplex = DUPLEX_FULL;</div><div class='ctx'> 	else</div><div class='del'>-		ecmd-&gt;duplex = DUPLEX_HALF;</div><div class='add'>+		cmd-&gt;base.duplex = DUPLEX_HALF;</div><div class='ctx'> </div><div class='ctx'> 	if (link &amp; LNK_NEGOTIATE)</div><div class='del'>-		ecmd-&gt;autoneg = AUTONEG_ENABLE;</div><div class='add'>+		cmd-&gt;base.autoneg = AUTONEG_ENABLE;</div><div class='ctx'> 	else</div><div class='del'>-		ecmd-&gt;autoneg = AUTONEG_DISABLE;</div><div class='add'>+		cmd-&gt;base.autoneg = AUTONEG_DISABLE;</div><div class='ctx'> </div><div class='ctx'> #if 0</div><div class='ctx'> 	/*</div><div class='hunk'>@@ -2627,13 +2615,15 @@ static int ace_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)</div><div class='ctx'> 	ecmd-&gt;txcoal = readl(&amp;regs-&gt;TuneTxCoalTicks);</div><div class='ctx'> 	ecmd-&gt;rxcoal = readl(&amp;regs-&gt;TuneRxCoalTicks);</div><div class='ctx'> #endif</div><div class='del'>-	ecmd-&gt;maxtxpkt = readl(&amp;regs-&gt;TuneMaxTxDesc);</div><div class='del'>-	ecmd-&gt;maxrxpkt = readl(&amp;regs-&gt;TuneMaxRxDesc);</div><div class='add'>+</div><div class='add'>+	ethtool_convert_legacy_u32_to_link_mode(cmd-&gt;link_modes.supported,</div><div class='add'>+						supported);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int ace_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)</div><div class='add'>+static int ace_set_link_ksettings(struct net_device *dev,</div><div class='add'>+				  const struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct ace_private *ap = netdev_priv(dev);</div><div class='ctx'> 	struct ace_regs __iomem *regs = ap-&gt;regs;</div><div class='hunk'>@@ -2656,11 +2646,11 @@ static int ace_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)</div><div class='ctx'> 		LNK_RX_FLOW_CTL_Y | LNK_NEG_FCTL;</div><div class='ctx'> 	if (!ACE_IS_TIGON_I(ap))</div><div class='ctx'> 		link |= LNK_TX_FLOW_CTL_Y;</div><div class='del'>-	if (ecmd-&gt;autoneg == AUTONEG_ENABLE)</div><div class='add'>+	if (cmd-&gt;base.autoneg == AUTONEG_ENABLE)</div><div class='ctx'> 		link |= LNK_NEGOTIATE;</div><div class='del'>-	if (ethtool_cmd_speed(ecmd) != speed) {</div><div class='add'>+	if (cmd-&gt;base.speed != speed) {</div><div class='ctx'> 		link &amp;= ~(LNK_1000MB | LNK_100MB | LNK_10MB);</div><div class='del'>-		switch (ethtool_cmd_speed(ecmd)) {</div><div class='add'>+		switch (cmd-&gt;base.speed) {</div><div class='ctx'> 		case SPEED_1000:</div><div class='ctx'> 			link |= LNK_1000MB;</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -2673,7 +2663,7 @@ static int ace_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (ecmd-&gt;duplex == DUPLEX_FULL)</div><div class='add'>+	if (cmd-&gt;base.duplex == DUPLEX_FULL)</div><div class='ctx'> 		link |= LNK_FULL_DUPLEX;</div><div class='ctx'> </div><div class='ctx'> 	if (link != ap-&gt;link) {</div><div class='hunk'>@@ -2700,13 +2690,12 @@ static void ace_get_drvinfo(struct net_device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct ace_private *ap = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	strlcpy(info-&gt;driver, "acenic", sizeof(info-&gt;driver));</div><div class='del'>-	snprintf(info-&gt;version, sizeof(info-&gt;version), "%i.%i.%i",</div><div class='del'>-		 ap-&gt;firmware_major, ap-&gt;firmware_minor,</div><div class='del'>-		 ap-&gt;firmware_fix);</div><div class='add'>+	strscpy(info-&gt;driver, "acenic", sizeof(info-&gt;driver));</div><div class='add'>+	snprintf(info-&gt;fw_version, sizeof(info-&gt;version), "%i.%i.%i",</div><div class='add'>+		 ap-&gt;firmware_major, ap-&gt;firmware_minor, ap-&gt;firmware_fix);</div><div class='ctx'> </div><div class='ctx'> 	if (ap-&gt;pdev)</div><div class='del'>-		strlcpy(info-&gt;bus_info, pci_name(ap-&gt;pdev),</div><div class='add'>+		strscpy(info-&gt;bus_info, pci_name(ap-&gt;pdev),</div><div class='ctx'> 			sizeof(info-&gt;bus_info));</div><div class='ctx'> </div><div class='ctx'> }</div><div class='hunk'>@@ -2719,15 +2708,15 @@ static int ace_set_mac_addr(struct net_device *dev, void *p)</div><div class='ctx'> 	struct ace_private *ap = netdev_priv(dev);</div><div class='ctx'> 	struct ace_regs __iomem *regs = ap-&gt;regs;</div><div class='ctx'> 	struct sockaddr *addr=p;</div><div class='del'>-	u8 *da;</div><div class='add'>+	const u8 *da;</div><div class='ctx'> 	struct cmd cmd;</div><div class='ctx'> </div><div class='ctx'> 	if(netif_running(dev))</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> </div><div class='del'>-	memcpy(dev-&gt;dev_addr, addr-&gt;sa_data,dev-&gt;addr_len);</div><div class='add'>+	eth_hw_addr_set(dev, addr-&gt;sa_data);</div><div class='ctx'> </div><div class='del'>-	da = (u8 *)dev-&gt;dev_addr;</div><div class='add'>+	da = (const u8 *)dev-&gt;dev_addr;</div><div class='ctx'> </div><div class='ctx'> 	writel(da[0] &lt;&lt; 8 | da[1], &amp;regs-&gt;MacAddrHi);</div><div class='ctx'> 	writel((da[2] &lt;&lt; 24) | (da[3] &lt;&lt; 16) | (da[4] &lt;&lt; 8) | da[5],</div><div class='head'>diff --git a/drivers/net/ethernet/alteon/acenic.h b/drivers/net/ethernet/alteon/acenic.h<br/>index 51c486cfbb8c..0e45a97b9c9b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/alteon/acenic.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/alteon/acenic.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/alteon/acenic.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/alteon/acenic.h</a></div><div class='hunk'>@@ -1,7 +1,8 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='ctx'> #ifndef _ACENIC_H_</div><div class='ctx'> #define _ACENIC_H_</div><div class='ctx'> #include &lt;linux/interrupt.h&gt;</div><div class='del'>-</div><div class='add'>+#include &lt;linux/workqueue.h&gt;</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Generate TX index update each time, when TX ring is closed.</div><div class='hunk'>@@ -632,6 +633,7 @@ struct ace_skb</div><div class='ctx'>  */</div><div class='ctx'> struct ace_private</div><div class='ctx'> {</div><div class='add'>+	struct net_device	*ndev;		/* backpointer */</div><div class='ctx'> 	struct ace_info		*info;</div><div class='ctx'> 	struct ace_regs	__iomem	*regs;		/* register base */</div><div class='ctx'> 	struct ace_skb		*skb;</div><div class='hunk'>@@ -665,8 +667,8 @@ struct ace_private</div><div class='ctx'> 	struct rx_desc		*rx_mini_ring;</div><div class='ctx'> 	struct rx_desc		*rx_return_ring;</div><div class='ctx'> </div><div class='del'>-	int			tasklet_pending, jumbo;</div><div class='del'>-	struct tasklet_struct	ace_tasklet;</div><div class='add'>+	int			bh_work_pending, jumbo;</div><div class='add'>+	struct work_struct	ace_bh_work;</div><div class='ctx'> </div><div class='ctx'> 	struct event		*evt_ring;</div><div class='ctx'> </div><div class='hunk'>@@ -690,7 +692,6 @@ struct ace_private</div><div class='ctx'> 				__attribute__ ((aligned (SMP_CACHE_BYTES)));</div><div class='ctx'> 	u32			last_tx, last_std_rx, last_mini_rx;</div><div class='ctx'> #endif</div><div class='del'>-	int			pci_using_dac;</div><div class='ctx'> 	u8			firmware_major;</div><div class='ctx'> 	u8			firmware_minor;</div><div class='ctx'> 	u8			firmware_fix;</div><div class='hunk'>@@ -775,7 +776,7 @@ static int ace_open(struct net_device *dev);</div><div class='ctx'> static netdev_tx_t ace_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 				  struct net_device *dev);</div><div class='ctx'> static int ace_close(struct net_device *dev);</div><div class='del'>-static void ace_tasklet(unsigned long dev);</div><div class='add'>+static void ace_bh_work(struct work_struct *work);</div><div class='ctx'> static void ace_dump_trace(struct ace_private *ap);</div><div class='ctx'> static void ace_set_multicast_list(struct net_device *dev);</div><div class='ctx'> static int ace_change_mtu(struct net_device *dev, int new_mtu);</div><div class='head'>diff --git a/drivers/net/ethernet/altera/Kconfig b/drivers/net/ethernet/altera/Kconfig<br/>index fdddba51473e..4ef819a9a1ad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/altera/Kconfig?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/altera/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/altera/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/altera/Kconfig</a></div><div class='hunk'>@@ -1,8 +1,14 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> config ALTERA_TSE</div><div class='ctx'> 	tristate "Altera Triple-Speed Ethernet MAC support"</div><div class='ctx'> 	depends on HAS_DMA</div><div class='add'>+	depends on HAS_IOMEM</div><div class='ctx'> 	select PHYLIB</div><div class='del'>-	---help---</div><div class='add'>+	select PHYLINK</div><div class='add'>+	select PCS_LYNX</div><div class='add'>+	select MDIO_REGMAP</div><div class='add'>+	select REGMAP_MMIO</div><div class='add'>+	help</div><div class='ctx'> 	  This driver supports the Altera Triple-Speed (TSE) Ethernet MAC.</div><div class='ctx'> </div><div class='ctx'> 	  To compile this driver as a module, choose M here. The module</div><div class='head'>diff --git a/drivers/net/ethernet/altera/Makefile b/drivers/net/ethernet/altera/Makefile<br/>index 3eff2fd3997e..a52db80aee9f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/altera/Makefile?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/altera/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/altera/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/altera/Makefile</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> #</div><div class='ctx'> # Makefile for the Altera device drivers.</div><div class='ctx'> #</div><div class='hunk'>@@ -5,4 +6,3 @@</div><div class='ctx'> obj-$(CONFIG_ALTERA_TSE) += altera_tse.o</div><div class='ctx'> altera_tse-objs := altera_tse_main.o altera_tse_ethtool.o \</div><div class='ctx'> altera_msgdma.o altera_sgdma.o altera_utils.o</div><div class='del'>-ccflags-y += -D__CHECK_ENDIAN__</div><div class='head'>diff --git a/drivers/net/ethernet/altera/altera_msgdma.c b/drivers/net/ethernet/altera/altera_msgdma.c<br/>index 0fb986ba3290..ac1efd08267a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/altera/altera_msgdma.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/altera/altera_msgdma.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/altera/altera_msgdma.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/altera/altera_msgdma.c</a></div><div class='hunk'>@@ -1,17 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /* Altera TSE SGDMA and MSGDMA Linux driver</div><div class='ctx'>  * Copyright (C) 2014 Altera Corporation. All rights reserved</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms and conditions of the GNU General Public License,</div><div class='del'>- * version 2, as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope it will be useful, but WITHOUT</div><div class='del'>- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or</div><div class='del'>- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for</div><div class='del'>- * more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License along with</div><div class='del'>- * this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='hunk'>@@ -145,7 +134,8 @@ u32 msgdma_tx_completions(struct altera_tse_private *priv)</div><div class='ctx'> 			&amp; 0xffff;</div><div class='ctx'> </div><div class='ctx'> 	if (inuse) { /* Tx FIFO is not empty */</div><div class='del'>-		ready = priv-&gt;tx_prod - priv-&gt;tx_cons - inuse - 1;</div><div class='add'>+		ready = max_t(int,</div><div class='add'>+			      priv-&gt;tx_prod - priv-&gt;tx_cons - inuse - 1, 0);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* Check for buffered last packet */</div><div class='ctx'> 		status = csrrd32(priv-&gt;tx_dma_csr, msgdma_csroffs(status));</div><div class='head'>diff --git a/drivers/net/ethernet/altera/altera_msgdma.h b/drivers/net/ethernet/altera/altera_msgdma.h<br/>index 42cf61c81057..9813fbfff4d3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/altera/altera_msgdma.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/altera/altera_msgdma.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/altera/altera_msgdma.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/altera/altera_msgdma.h</a></div><div class='hunk'>@@ -1,17 +1,6 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='ctx'> /* Altera TSE SGDMA and MSGDMA Linux driver</div><div class='ctx'>  * Copyright (C) 2014 Altera Corporation. All rights reserved</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms and conditions of the GNU General Public License,</div><div class='del'>- * version 2, as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope it will be useful, but WITHOUT</div><div class='del'>- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or</div><div class='del'>- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for</div><div class='del'>- * more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License along with</div><div class='del'>- * this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef __ALTERA_MSGDMA_H__</div><div class='head'>diff --git a/drivers/net/ethernet/altera/altera_msgdmahw.h b/drivers/net/ethernet/altera/altera_msgdmahw.h<br/>index 89cd11d86642..019f5a12630e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/altera/altera_msgdmahw.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/altera/altera_msgdmahw.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/altera/altera_msgdmahw.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/altera/altera_msgdmahw.h</a></div><div class='hunk'>@@ -1,17 +1,6 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='ctx'> /* Altera TSE SGDMA and MSGDMA Linux driver</div><div class='ctx'>  * Copyright (C) 2014 Altera Corporation. All rights reserved</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms and conditions of the GNU General Public License,</div><div class='del'>- * version 2, as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope it will be useful, but WITHOUT</div><div class='del'>- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or</div><div class='del'>- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for</div><div class='del'>- * more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License along with</div><div class='del'>- * this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef __ALTERA_MSGDMAHW_H__</div><div class='head'>diff --git a/drivers/net/ethernet/altera/altera_sgdma.c b/drivers/net/ethernet/altera/altera_sgdma.c<br/>index 580553d42d34..7f247ccbe6ba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/altera/altera_sgdma.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/altera/altera_sgdma.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/altera/altera_sgdma.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/altera/altera_sgdma.c</a></div><div class='hunk'>@@ -1,17 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /* Altera TSE SGDMA and MSGDMA Linux driver</div><div class='ctx'>  * Copyright (C) 2014 Altera Corporation. All rights reserved</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms and conditions of the GNU General Public License,</div><div class='del'>- * version 2, as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope it will be useful, but WITHOUT</div><div class='del'>- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or</div><div class='del'>- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for</div><div class='del'>- * more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License along with</div><div class='del'>- * this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/list.h&gt;</div><div class='hunk'>@@ -71,8 +60,6 @@ int sgdma_initialize(struct altera_tse_private *priv)</div><div class='ctx'> 		      SGDMA_CTRLREG_INTEN |</div><div class='ctx'> 		      SGDMA_CTRLREG_ILASTD;</div><div class='ctx'> </div><div class='del'>-	priv-&gt;sgdmadesclen = sizeof(struct sgdma_descrip);</div><div class='del'>-</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;priv-&gt;txlisthd);</div><div class='ctx'> 	INIT_LIST_HEAD(&amp;priv-&gt;rxlisthd);</div><div class='ctx'> </div><div class='hunk'>@@ -254,7 +241,7 @@ u32 sgdma_rx_status(struct altera_tse_private *priv)</div><div class='ctx'> 		unsigned int pktstatus = 0;</div><div class='ctx'> 		dma_sync_single_for_cpu(priv-&gt;device,</div><div class='ctx'> 					priv-&gt;rxdescphys,</div><div class='del'>-					priv-&gt;sgdmadesclen,</div><div class='add'>+					SGDMA_DESC_LEN,</div><div class='ctx'> 					DMA_FROM_DEVICE);</div><div class='ctx'> </div><div class='ctx'> 		pktlength = csrrd16(desc, sgdma_descroffs(bytes_xferred));</div><div class='hunk'>@@ -374,7 +361,7 @@ static int sgdma_async_read(struct altera_tse_private *priv)</div><div class='ctx'> </div><div class='ctx'> 		dma_sync_single_for_device(priv-&gt;device,</div><div class='ctx'> 					   priv-&gt;rxdescphys,</div><div class='del'>-					   priv-&gt;sgdmadesclen,</div><div class='add'>+					   SGDMA_DESC_LEN,</div><div class='ctx'> 					   DMA_TO_DEVICE);</div><div class='ctx'> </div><div class='ctx'> 		csrwr32(lower_32_bits(sgdma_rxphysaddr(priv, cdesc)),</div><div class='hunk'>@@ -402,7 +389,7 @@ static int sgdma_async_write(struct altera_tse_private *priv,</div><div class='ctx'> 	csrwr32(0x1f, priv-&gt;tx_dma_csr, sgdma_csroffs(status));</div><div class='ctx'> </div><div class='ctx'> 	dma_sync_single_for_device(priv-&gt;device, priv-&gt;txdescphys,</div><div class='del'>-				   priv-&gt;sgdmadesclen, DMA_TO_DEVICE);</div><div class='add'>+				   SGDMA_DESC_LEN, DMA_TO_DEVICE);</div><div class='ctx'> </div><div class='ctx'> 	csrwr32(lower_32_bits(sgdma_txphysaddr(priv, desc)),</div><div class='ctx'> 		priv-&gt;tx_dma_csr,</div><div class='hunk'>@@ -526,7 +513,7 @@ static int sgdma_txbusy(struct altera_tse_private *priv)</div><div class='ctx'> {</div><div class='ctx'> 	int delay = 0;</div><div class='ctx'> </div><div class='del'>-	/* if DMA is busy, wait for current transactino to finish */</div><div class='add'>+	/* if DMA is busy, wait for current transaction to finish */</div><div class='ctx'> 	while ((csrrd32(priv-&gt;tx_dma_csr, sgdma_csroffs(status))</div><div class='ctx'> 		&amp; SGDMA_STSREG_BUSY) &amp;&amp; (delay++ &lt; 100))</div><div class='ctx'> 		udelay(1);</div><div class='head'>diff --git a/drivers/net/ethernet/altera/altera_sgdma.h b/drivers/net/ethernet/altera/altera_sgdma.h<br/>index 584977e29ef9..08afe1c9994f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/altera/altera_sgdma.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/altera/altera_sgdma.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/altera/altera_sgdma.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/altera/altera_sgdma.h</a></div><div class='hunk'>@@ -1,17 +1,6 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='ctx'> /* Altera TSE SGDMA and MSGDMA Linux driver</div><div class='ctx'>  * Copyright (C) 2014 Altera Corporation. All rights reserved</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms and conditions of the GNU General Public License,</div><div class='del'>- * version 2, as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope it will be useful, but WITHOUT</div><div class='del'>- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or</div><div class='del'>- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for</div><div class='del'>- * more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License along with</div><div class='del'>- * this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef __ALTERA_SGDMA_H__</div><div class='head'>diff --git a/drivers/net/ethernet/altera/altera_sgdmahw.h b/drivers/net/ethernet/altera/altera_sgdmahw.h<br/>index 85bc33b218d9..3304518e2cbf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/altera/altera_sgdmahw.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/altera/altera_sgdmahw.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/altera/altera_sgdmahw.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/altera/altera_sgdmahw.h</a></div><div class='hunk'>@@ -1,17 +1,6 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='ctx'> /* Altera TSE SGDMA and MSGDMA Linux driver</div><div class='ctx'>  * Copyright (C) 2014 Altera Corporation. All rights reserved</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms and conditions of the GNU General Public License,</div><div class='del'>- * version 2, as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope it will be useful, but WITHOUT</div><div class='del'>- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or</div><div class='del'>- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for</div><div class='del'>- * more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License along with</div><div class='del'>- * this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef __ALTERA_SGDMAHW_H__</div><div class='hunk'>@@ -50,6 +39,7 @@ struct sgdma_descrip {</div><div class='ctx'> 	u8	control;</div><div class='ctx'> } __packed;</div><div class='ctx'> </div><div class='add'>+#define SGDMA_DESC_LEN	sizeof(struct sgdma_descrip)</div><div class='ctx'> </div><div class='ctx'> #define SGDMA_STATUS_ERR		BIT(0)</div><div class='ctx'> #define SGDMA_STATUS_LENGTH_ERR		BIT(1)</div><div class='head'>diff --git a/drivers/net/ethernet/altera/altera_tse.h b/drivers/net/ethernet/altera/altera_tse.h<br/>index 2adb24d4523c..e5a56bb989da 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/altera/altera_tse.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/altera/altera_tse.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/altera/altera_tse.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/altera/altera_tse.h</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='ctx'> /* Altera Triple-Speed Ethernet MAC driver</div><div class='ctx'>  * Copyright (C) 2008-2014 Altera Corporation. All rights reserved</div><div class='ctx'>  *</div><div class='hunk'>@@ -14,18 +15,6 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Original driver contributed by SLS.</div><div class='ctx'>  * Major updates contributed by GlobalLogic</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms and conditions of the GNU General Public License,</div><div class='del'>- * version 2, as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope it will be useful, but WITHOUT</div><div class='del'>- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or</div><div class='del'>- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for</div><div class='del'>- * more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License along with</div><div class='del'>- * this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef __ALTERA_TSE_H__</div><div class='hunk'>@@ -38,6 +27,7 @@</div><div class='ctx'> #include &lt;linux/list.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/phylink.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define ALTERA_TSE_SW_RESET_WATCHDOG_CNTR	10000</div><div class='ctx'> #define ALTERA_TSE_MAC_FIFO_WIDTH		4	/* TX/RX FIFO width in</div><div class='hunk'>@@ -411,9 +401,6 @@ struct altera_tse_private {</div><div class='ctx'> 	/* MAC address space */</div><div class='ctx'> 	struct altera_tse_mac __iomem *mac_dev;</div><div class='ctx'> </div><div class='del'>-	/* TSE Revision */</div><div class='del'>-	u32	revision;</div><div class='del'>-</div><div class='ctx'> 	/* mSGDMA Rx Dispatcher address space */</div><div class='ctx'> 	void __iomem *rx_dma_csr;</div><div class='ctx'> 	void __iomem *rx_dma_desc;</div><div class='hunk'>@@ -423,6 +410,9 @@ struct altera_tse_private {</div><div class='ctx'> 	void __iomem *tx_dma_csr;</div><div class='ctx'> 	void __iomem *tx_dma_desc;</div><div class='ctx'> </div><div class='add'>+	/* SGMII PCS address space */</div><div class='add'>+	void __iomem *pcs_base;</div><div class='add'>+</div><div class='ctx'> 	/* Rx buffers queue */</div><div class='ctx'> 	struct tse_buffer *rx_ring;</div><div class='ctx'> 	u32 rx_cons;</div><div class='hunk'>@@ -443,7 +433,6 @@ struct altera_tse_private {</div><div class='ctx'> 	/* RX/TX MAC FIFO configs */</div><div class='ctx'> 	u32 tx_fifo_depth;</div><div class='ctx'> 	u32 rx_fifo_depth;</div><div class='del'>-	u32 max_mtu;</div><div class='ctx'> </div><div class='ctx'> 	/* Hash filter settings */</div><div class='ctx'> 	u32 hash_filter;</div><div class='hunk'>@@ -458,7 +447,6 @@ struct altera_tse_private {</div><div class='ctx'> 	u32 rxctrlreg;</div><div class='ctx'> 	dma_addr_t rxdescphys;</div><div class='ctx'> 	dma_addr_t txdescphys;</div><div class='del'>-	size_t sgdmadesclen;</div><div class='ctx'> </div><div class='ctx'> 	struct list_head txlisthd;</div><div class='ctx'> 	struct list_head rxlisthd;</div><div class='hunk'>@@ -474,7 +462,6 @@ struct altera_tse_private {</div><div class='ctx'> 	int phy_addr;		/* PHY's MDIO address, -1 for autodetection */</div><div class='ctx'> 	phy_interface_t phy_iface;</div><div class='ctx'> 	struct mii_bus *mdio;</div><div class='del'>-	struct phy_device *phydev;</div><div class='ctx'> 	int oldspeed;</div><div class='ctx'> 	int oldduplex;</div><div class='ctx'> 	int oldlink;</div><div class='hunk'>@@ -482,7 +469,11 @@ struct altera_tse_private {</div><div class='ctx'> 	/* ethtool msglvl option */</div><div class='ctx'> 	u32 msg_enable;</div><div class='ctx'> </div><div class='del'>-	struct altera_dmaops *dmaops;</div><div class='add'>+	const struct altera_dmaops *dmaops;</div><div class='add'>+</div><div class='add'>+	struct phylink *phylink;</div><div class='add'>+	struct phylink_config phylink_config;</div><div class='add'>+	struct phylink_pcs *pcs;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Function prototypes</div><div class='head'>diff --git a/drivers/net/ethernet/altera/altera_tse_ethtool.c b/drivers/net/ethernet/altera/altera_tse_ethtool.c<br/>index be72e1e64525..81313c85833e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/altera/altera_tse_ethtool.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/altera/altera_tse_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/altera/altera_tse_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/altera/altera_tse_ethtool.c</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /* Ethtool support for Altera Triple-Speed Ethernet MAC driver</div><div class='ctx'>  * Copyright (C) 2008-2014 Altera Corporation. All rights reserved</div><div class='ctx'>  *</div><div class='hunk'>@@ -13,18 +14,6 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Original driver contributed by SLS.</div><div class='ctx'>  * Major updates contributed by GlobalLogic</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms and conditions of the GNU General Public License,</div><div class='del'>- * version 2, as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope it will be useful, but WITHOUT</div><div class='del'>- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or</div><div class='del'>- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for</div><div class='del'>- * more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License along with</div><div class='del'>- * this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/ethtool.h&gt;</div><div class='hunk'>@@ -78,7 +67,6 @@ static void tse_get_drvinfo(struct net_device *dev,</div><div class='ctx'> 	u32 rev = ioread32(&amp;priv-&gt;mac_dev-&gt;megacore_revision);</div><div class='ctx'> </div><div class='ctx'> 	strcpy(info-&gt;driver, "altera_tse");</div><div class='del'>-	strcpy(info-&gt;version, "v8.0");</div><div class='ctx'> 	snprintf(info-&gt;fw_version, ETHTOOL_FWVERS_LEN, "v%d.%d",</div><div class='ctx'> 		 rev &amp; 0xFFFF, (rev &amp; 0xFFFF0000) &gt;&gt; 16);</div><div class='ctx'> 	sprintf(info-&gt;bus_info, "platform");</div><div class='hunk'>@@ -211,9 +199,9 @@ static int tse_reglen(struct net_device *dev)</div><div class='ctx'> static void tse_get_regs(struct net_device *dev, struct ethtool_regs *regs,</div><div class='ctx'> 			 void *regbuf)</div><div class='ctx'> {</div><div class='del'>-	int i;</div><div class='ctx'> 	struct altera_tse_private *priv = netdev_priv(dev);</div><div class='ctx'> 	u32 *buf = regbuf;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	/* Set version to a known value, so ethtool knows</div><div class='ctx'> 	 * how to do any special formatting of this data.</div><div class='hunk'>@@ -233,26 +221,20 @@ static void tse_get_regs(struct net_device *dev, struct ethtool_regs *regs,</div><div class='ctx'> 		buf[i] = csrrd32(priv-&gt;mac_dev, i * 4);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tse_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)</div><div class='add'>+static int tse_ethtool_set_link_ksettings(struct net_device *dev,</div><div class='add'>+					  const struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct altera_tse_private *priv = netdev_priv(dev);</div><div class='del'>-	struct phy_device *phydev = priv-&gt;phydev;</div><div class='del'>-</div><div class='del'>-	if (phydev == NULL)</div><div class='del'>-		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	return phy_ethtool_gset(phydev, cmd);</div><div class='add'>+	return phylink_ethtool_ksettings_set(priv-&gt;phylink, cmd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int tse_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)</div><div class='add'>+static int tse_ethtool_get_link_ksettings(struct net_device *dev,</div><div class='add'>+					  struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct altera_tse_private *priv = netdev_priv(dev);</div><div class='del'>-	struct phy_device *phydev = priv-&gt;phydev;</div><div class='del'>-</div><div class='del'>-	if (phydev == NULL)</div><div class='del'>-		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	return phy_ethtool_sset(phydev, cmd);</div><div class='add'>+	return phylink_ethtool_ksettings_get(priv-&gt;phylink, cmd);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops tse_ethtool_ops = {</div><div class='hunk'>@@ -260,13 +242,14 @@ static const struct ethtool_ops tse_ethtool_ops = {</div><div class='ctx'> 	.get_regs_len = tse_reglen,</div><div class='ctx'> 	.get_regs = tse_get_regs,</div><div class='ctx'> 	.get_link = ethtool_op_get_link,</div><div class='del'>-	.get_settings = tse_get_settings,</div><div class='del'>-	.set_settings = tse_set_settings,</div><div class='ctx'> 	.get_strings = tse_gstrings,</div><div class='ctx'> 	.get_sset_count = tse_sset_count,</div><div class='ctx'> 	.get_ethtool_stats = tse_fill_stats,</div><div class='ctx'> 	.get_msglevel = tse_get_msglevel,</div><div class='ctx'> 	.set_msglevel = tse_set_msglevel,</div><div class='add'>+	.get_link_ksettings = tse_ethtool_get_link_ksettings,</div><div class='add'>+	.set_link_ksettings = tse_ethtool_set_link_ksettings,</div><div class='add'>+	.get_ts_info = ethtool_op_get_ts_info,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void altera_tse_set_ethtool_ops(struct net_device *netdev)</div><div class='head'>diff --git a/drivers/net/ethernet/altera/altera_tse_main.c b/drivers/net/ethernet/altera/altera_tse_main.c<br/>index da48e66377b5..ca55c5fd11df 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/altera/altera_tse_main.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/altera/altera_tse_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/altera/altera_tse_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/altera/altera_tse_main.c</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /* Altera Triple-Speed Ethernet MAC driver</div><div class='ctx'>  * Copyright (C) 2008-2014 Altera Corporation. All rights reserved</div><div class='ctx'>  *</div><div class='hunk'>@@ -14,18 +15,6 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Original driver contributed by SLS.</div><div class='ctx'>  * Major updates contributed by GlobalLogic</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms and conditions of the GNU General Public License,</div><div class='del'>- * version 2, as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope it will be useful, but WITHOUT</div><div class='del'>- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or</div><div class='del'>- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for</div><div class='del'>- * more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License along with</div><div class='del'>- * this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/atomic.h&gt;</div><div class='hunk'>@@ -37,13 +26,17 @@</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/mii.h&gt;</div><div class='add'>+#include &lt;linux/mdio/mdio-regmap.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/of_device.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/of_mdio.h&gt;</div><div class='ctx'> #include &lt;linux/of_net.h&gt;</div><div class='del'>-#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/pcs-lynx.h&gt;</div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='ctx'> #include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/property.h&gt;</div><div class='add'>+#include &lt;linux/regmap.h&gt;</div><div class='ctx'> #include &lt;linux/skbuff.h&gt;</div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -55,7 +48,7 @@</div><div class='ctx'> static atomic_t instance_count = ATOMIC_INIT(~0);</div><div class='ctx'> /* Module parameters */</div><div class='ctx'> static int debug = -1;</div><div class='del'>-module_param(debug, int, S_IRUGO | S_IWUSR);</div><div class='add'>+module_param(debug, int, 0644);</div><div class='ctx'> MODULE_PARM_DESC(debug, "Message Level (-1: default, 0: no output, 16: all)");</div><div class='ctx'> </div><div class='ctx'> static const u32 default_msg_level = (NETIF_MSG_DRV | NETIF_MSG_PROBE |</div><div class='hunk'>@@ -64,12 +57,12 @@ static const u32 default_msg_level = (NETIF_MSG_DRV | NETIF_MSG_PROBE |</div><div class='ctx'> </div><div class='ctx'> #define RX_DESCRIPTORS 64</div><div class='ctx'> static int dma_rx_num = RX_DESCRIPTORS;</div><div class='del'>-module_param(dma_rx_num, int, S_IRUGO | S_IWUSR);</div><div class='add'>+module_param(dma_rx_num, int, 0644);</div><div class='ctx'> MODULE_PARM_DESC(dma_rx_num, "Number of descriptors in the RX list");</div><div class='ctx'> </div><div class='ctx'> #define TX_DESCRIPTORS 64</div><div class='ctx'> static int dma_tx_num = TX_DESCRIPTORS;</div><div class='del'>-module_param(dma_tx_num, int, S_IRUGO | S_IWUSR);</div><div class='add'>+module_param(dma_tx_num, int, 0644);</div><div class='ctx'> MODULE_PARM_DESC(dma_tx_num, "Number of descriptors in the TX list");</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -82,15 +75,13 @@ MODULE_PARM_DESC(dma_tx_num, "Number of descriptors in the TX list");</div><div class='ctx'>  */</div><div class='ctx'> #define ALTERA_RXDMABUFFER_SIZE	2048</div><div class='ctx'> </div><div class='del'>-/* Allow network stack to resume queueing packets after we've</div><div class='add'>+/* Allow network stack to resume queuing packets after we've</div><div class='ctx'>  * finished transmitting at least 1/4 of the packets in the queue.</div><div class='ctx'>  */</div><div class='ctx'> #define TSE_TX_THRESH(x)	(x-&gt;tx_ring_size / 4)</div><div class='ctx'> </div><div class='ctx'> #define TXQUEUESTOP_THRESHHOLD	2</div><div class='ctx'> </div><div class='del'>-static const struct of_device_id altera_tse_ids[];</div><div class='del'>-</div><div class='ctx'> static inline u32 tse_tx_avail(struct altera_tse_private *priv)</div><div class='ctx'> {</div><div class='ctx'> 	return priv-&gt;tx_cons + priv-&gt;tx_ring_size - priv-&gt;tx_prod - 1;</div><div class='hunk'>@@ -130,11 +121,10 @@ static int altera_tse_mdio_write(struct mii_bus *bus, int mii_id, int regnum,</div><div class='ctx'> static int altera_tse_mdio_create(struct net_device *dev, unsigned int id)</div><div class='ctx'> {</div><div class='ctx'> 	struct altera_tse_private *priv = netdev_priv(dev);</div><div class='del'>-	int ret;</div><div class='del'>-	int i;</div><div class='ctx'> 	struct device_node *mdio_node = NULL;</div><div class='del'>-	struct mii_bus *mdio = NULL;</div><div class='ctx'> 	struct device_node *child_node = NULL;</div><div class='add'>+	struct mii_bus *mdio = NULL;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	for_each_child_of_node(priv-&gt;device-&gt;of_node, child_node) {</div><div class='ctx'> 		if (of_device_is_compatible(child_node, "altr,tse-mdio")) {</div><div class='hunk'>@@ -153,7 +143,8 @@ static int altera_tse_mdio_create(struct net_device *dev, unsigned int id)</div><div class='ctx'> 	mdio = mdiobus_alloc();</div><div class='ctx'> 	if (mdio == NULL) {</div><div class='ctx'> 		netdev_err(dev, "Error allocating MDIO bus\n");</div><div class='del'>-		return -ENOMEM;</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto put_node;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	mdio-&gt;name = ALTERA_TSE_RESOURCE_NAME;</div><div class='hunk'>@@ -161,14 +152,6 @@ static int altera_tse_mdio_create(struct net_device *dev, unsigned int id)</div><div class='ctx'> 	mdio-&gt;write = &amp;altera_tse_mdio_write;</div><div class='ctx'> 	snprintf(mdio-&gt;id, MII_BUS_ID_SIZE, "%s-%u", mdio-&gt;name, id);</div><div class='ctx'> </div><div class='del'>-	mdio-&gt;irq = kcalloc(PHY_MAX_ADDR, sizeof(int), GFP_KERNEL);</div><div class='del'>-	if (mdio-&gt;irq == NULL) {</div><div class='del'>-		ret = -ENOMEM;</div><div class='del'>-		goto out_free_mdio;</div><div class='del'>-	}</div><div class='del'>-	for (i = 0; i &lt; PHY_MAX_ADDR; i++)</div><div class='del'>-		mdio-&gt;irq[i] = PHY_POLL;</div><div class='del'>-</div><div class='ctx'> 	mdio-&gt;priv = dev;</div><div class='ctx'> 	mdio-&gt;parent = priv-&gt;device;</div><div class='ctx'> </div><div class='hunk'>@@ -176,19 +159,20 @@ static int altera_tse_mdio_create(struct net_device *dev, unsigned int id)</div><div class='ctx'> 	if (ret != 0) {</div><div class='ctx'> 		netdev_err(dev, "Cannot register MDIO bus %s\n",</div><div class='ctx'> 			   mdio-&gt;id);</div><div class='del'>-		goto out_free_mdio_irq;</div><div class='add'>+		goto out_free_mdio;</div><div class='ctx'> 	}</div><div class='add'>+	of_node_put(mdio_node);</div><div class='ctx'> </div><div class='ctx'> 	if (netif_msg_drv(priv))</div><div class='ctx'> 		netdev_info(dev, "MDIO bus %s: created\n", mdio-&gt;id);</div><div class='ctx'> </div><div class='ctx'> 	priv-&gt;mdio = mdio;</div><div class='ctx'> 	return 0;</div><div class='del'>-out_free_mdio_irq:</div><div class='del'>-	kfree(mdio-&gt;irq);</div><div class='ctx'> out_free_mdio:</div><div class='ctx'> 	mdiobus_free(mdio);</div><div class='ctx'> 	mdio = NULL;</div><div class='add'>+put_node:</div><div class='add'>+	of_node_put(mdio_node);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -204,7 +188,6 @@ static void altera_tse_mdio_destroy(struct net_device *dev)</div><div class='ctx'> 			    priv-&gt;mdio-&gt;id);</div><div class='ctx'> </div><div class='ctx'> 	mdiobus_unregister(priv-&gt;mdio);</div><div class='del'>-	kfree(priv-&gt;mdio-&gt;irq);</div><div class='ctx'> 	mdiobus_free(priv-&gt;mdio);</div><div class='ctx'> 	priv-&gt;mdio = NULL;</div><div class='ctx'> }</div><div class='hunk'>@@ -233,8 +216,8 @@ static int tse_init_rx_buffer(struct altera_tse_private *priv,</div><div class='ctx'> static void tse_free_rx_buffer(struct altera_tse_private *priv,</div><div class='ctx'> 			       struct tse_buffer *rxbuffer)</div><div class='ctx'> {</div><div class='del'>-	struct sk_buff *skb = rxbuffer-&gt;skb;</div><div class='ctx'> 	dma_addr_t dma_addr = rxbuffer-&gt;dma_addr;</div><div class='add'>+	struct sk_buff *skb = rxbuffer-&gt;skb;</div><div class='ctx'> </div><div class='ctx'> 	if (skb != NULL) {</div><div class='ctx'> 		if (dma_addr)</div><div class='hunk'>@@ -355,6 +338,7 @@ static inline void tse_rx_vlan(struct net_device *dev, struct sk_buff *skb)</div><div class='ctx'> {</div><div class='ctx'> 	struct ethhdr *eth_hdr;</div><div class='ctx'> 	u16 vid;</div><div class='add'>+</div><div class='ctx'> 	if ((dev-&gt;features &amp; NETIF_F_HW_VLAN_CTAG_RX) &amp;&amp;</div><div class='ctx'> 	    !__vlan_get_tag(skb, &amp;vid)) {</div><div class='ctx'> 		eth_hdr = (struct ethhdr *)skb-&gt;data;</div><div class='hunk'>@@ -368,10 +352,10 @@ static inline void tse_rx_vlan(struct net_device *dev, struct sk_buff *skb)</div><div class='ctx'>  */</div><div class='ctx'> static int tse_rx(struct altera_tse_private *priv, int limit)</div><div class='ctx'> {</div><div class='del'>-	unsigned int count = 0;</div><div class='add'>+	unsigned int entry = priv-&gt;rx_cons % priv-&gt;rx_ring_size;</div><div class='ctx'> 	unsigned int next_entry;</div><div class='add'>+	unsigned int count = 0;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='del'>-	unsigned int entry = priv-&gt;rx_cons % priv-&gt;rx_ring_size;</div><div class='ctx'> 	u32 rxstatus;</div><div class='ctx'> 	u16 pktlength;</div><div class='ctx'> 	u16 pktstatus;</div><div class='hunk'>@@ -391,7 +375,7 @@ static int tse_rx(struct altera_tse_private *priv, int limit)</div><div class='ctx'> 				   "RCV pktstatus %08X pktlength %08X\n",</div><div class='ctx'> 				   pktstatus, pktlength);</div><div class='ctx'> </div><div class='del'>-		/* DMA trasfer from TSE starts with 2 aditional bytes for</div><div class='add'>+		/* DMA transfer from TSE starts with 2 additional bytes for</div><div class='ctx'> 		 * IP payload alignment. Status returned by get_rx_status()</div><div class='ctx'> 		 * contains DMA transfer length. Packet is 2 bytes shorter.</div><div class='ctx'> 		 */</div><div class='hunk'>@@ -412,12 +396,6 @@ static int tse_rx(struct altera_tse_private *priv, int limit)</div><div class='ctx'> </div><div class='ctx'> 		skb_put(skb, pktlength);</div><div class='ctx'> </div><div class='del'>-		/* make cache consistent with receive packet buffer */</div><div class='del'>-		dma_sync_single_for_cpu(priv-&gt;device,</div><div class='del'>-					priv-&gt;rx_ring[entry].dma_addr,</div><div class='del'>-					priv-&gt;rx_ring[entry].len,</div><div class='del'>-					DMA_FROM_DEVICE);</div><div class='del'>-</div><div class='ctx'> 		dma_unmap_single(priv-&gt;device, priv-&gt;rx_ring[entry].dma_addr,</div><div class='ctx'> 				 priv-&gt;rx_ring[entry].len, DMA_FROM_DEVICE);</div><div class='ctx'> </div><div class='hunk'>@@ -451,10 +429,10 @@ static int tse_rx(struct altera_tse_private *priv, int limit)</div><div class='ctx'> static int tse_tx_complete(struct altera_tse_private *priv)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int txsize = priv-&gt;tx_ring_size;</div><div class='del'>-	u32 ready;</div><div class='del'>-	unsigned int entry;</div><div class='ctx'> 	struct tse_buffer *tx_buff;</div><div class='add'>+	unsigned int entry;</div><div class='ctx'> 	int txcomplete = 0;</div><div class='add'>+	u32 ready;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;priv-&gt;tx_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -481,7 +459,6 @@ static int tse_tx_complete(struct altera_tse_private *priv)</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(netif_queue_stopped(priv-&gt;dev) &amp;&amp;</div><div class='ctx'> 		     tse_tx_avail(priv) &gt; TSE_TX_THRESH(priv))) {</div><div class='del'>-		netif_tx_lock(priv-&gt;dev);</div><div class='ctx'> 		if (netif_queue_stopped(priv-&gt;dev) &amp;&amp;</div><div class='ctx'> 		    tse_tx_avail(priv) &gt; TSE_TX_THRESH(priv)) {</div><div class='ctx'> 			if (netif_msg_tx_done(priv))</div><div class='hunk'>@@ -489,7 +466,6 @@ static int tse_tx_complete(struct altera_tse_private *priv)</div><div class='ctx'> 					   __func__);</div><div class='ctx'> 			netif_wake_queue(priv-&gt;dev);</div><div class='ctx'> 		}</div><div class='del'>-		netif_tx_unlock(priv-&gt;dev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock(&amp;priv-&gt;tx_lock);</div><div class='hunk'>@@ -502,8 +478,8 @@ static int tse_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> {</div><div class='ctx'> 	struct altera_tse_private *priv =</div><div class='ctx'> 			container_of(napi, struct altera_tse_private, napi);</div><div class='del'>-	int rxcomplete = 0;</div><div class='ctx'> 	unsigned long int flags;</div><div class='add'>+	int rxcomplete = 0;</div><div class='ctx'> </div><div class='ctx'> 	tse_tx_complete(priv);</div><div class='ctx'> </div><div class='hunk'>@@ -511,8 +487,7 @@ static int tse_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> </div><div class='ctx'> 	if (rxcomplete &lt; budget) {</div><div class='ctx'> </div><div class='del'>-		napi_gro_flush(napi, false);</div><div class='del'>-		__napi_complete(napi);</div><div class='add'>+		napi_complete_done(napi, rxcomplete);</div><div class='ctx'> </div><div class='ctx'> 		netdev_dbg(priv-&gt;dev,</div><div class='ctx'> 			   "NAPI Complete, did %d packets with budget %d\n",</div><div class='hunk'>@@ -564,16 +539,16 @@ static irqreturn_t altera_isr(int irq, void *dev_id)</div><div class='ctx'>  * physically contiguous fragment starting at</div><div class='ctx'>  * skb-&gt;data, for length of skb_headlen(skb).</div><div class='ctx'>  */</div><div class='del'>-static int tse_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='add'>+static netdev_tx_t tse_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct altera_tse_private *priv = netdev_priv(dev);</div><div class='add'>+	unsigned int nopaged_len = skb_headlen(skb);</div><div class='ctx'> 	unsigned int txsize = priv-&gt;tx_ring_size;</div><div class='del'>-	unsigned int entry;</div><div class='del'>-	struct tse_buffer *buffer = NULL;</div><div class='ctx'> 	int nfrags = skb_shinfo(skb)-&gt;nr_frags;</div><div class='del'>-	unsigned int nopaged_len = skb_headlen(skb);</div><div class='del'>-	enum netdev_tx ret = NETDEV_TX_OK;</div><div class='add'>+	struct tse_buffer *buffer = NULL;</div><div class='add'>+	netdev_tx_t ret = NETDEV_TX_OK;</div><div class='ctx'> 	dma_addr_t dma_addr;</div><div class='add'>+	unsigned int entry;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_bh(&amp;priv-&gt;tx_lock);</div><div class='ctx'> </div><div class='hunk'>@@ -605,10 +580,6 @@ static int tse_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	buffer-&gt;dma_addr = dma_addr;</div><div class='ctx'> 	buffer-&gt;len = nopaged_len;</div><div class='ctx'> </div><div class='del'>-	/* Push data out of the cache hierarchy into main memory */</div><div class='del'>-	dma_sync_single_for_device(priv-&gt;device, buffer-&gt;dma_addr,</div><div class='del'>-				   buffer-&gt;len, DMA_TO_DEVICE);</div><div class='del'>-</div><div class='ctx'> 	priv-&gt;dmaops-&gt;tx_buffer(priv, buffer);</div><div class='ctx'> </div><div class='ctx'> 	skb_tx_timestamp(skb);</div><div class='hunk'>@@ -629,125 +600,16 @@ out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Called every time the controller might need to be made</div><div class='del'>- * aware of new link state.  The PHY code conveys this</div><div class='del'>- * information through variables in the phydev structure, and this</div><div class='del'>- * function converts those variables into the appropriate</div><div class='del'>- * register values, and can bring down the device if needed.</div><div class='del'>- */</div><div class='del'>-static void altera_tse_adjust_link(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct altera_tse_private *priv = netdev_priv(dev);</div><div class='del'>-	struct phy_device *phydev = priv-&gt;phydev;</div><div class='del'>-	int new_state = 0;</div><div class='del'>-</div><div class='del'>-	/* only change config if there is a link */</div><div class='del'>-	spin_lock(&amp;priv-&gt;mac_cfg_lock);</div><div class='del'>-	if (phydev-&gt;link) {</div><div class='del'>-		/* Read old config */</div><div class='del'>-		u32 cfg_reg = ioread32(&amp;priv-&gt;mac_dev-&gt;command_config);</div><div class='del'>-</div><div class='del'>-		/* Check duplex */</div><div class='del'>-		if (phydev-&gt;duplex != priv-&gt;oldduplex) {</div><div class='del'>-			new_state = 1;</div><div class='del'>-			if (!(phydev-&gt;duplex))</div><div class='del'>-				cfg_reg |= MAC_CMDCFG_HD_ENA;</div><div class='del'>-			else</div><div class='del'>-				cfg_reg &amp;= ~MAC_CMDCFG_HD_ENA;</div><div class='del'>-</div><div class='del'>-			netdev_dbg(priv-&gt;dev, "%s: Link duplex = 0x%x\n",</div><div class='del'>-				   dev-&gt;name, phydev-&gt;duplex);</div><div class='del'>-</div><div class='del'>-			priv-&gt;oldduplex = phydev-&gt;duplex;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* Check speed */</div><div class='del'>-		if (phydev-&gt;speed != priv-&gt;oldspeed) {</div><div class='del'>-			new_state = 1;</div><div class='del'>-			switch (phydev-&gt;speed) {</div><div class='del'>-			case 1000:</div><div class='del'>-				cfg_reg |= MAC_CMDCFG_ETH_SPEED;</div><div class='del'>-				cfg_reg &amp;= ~MAC_CMDCFG_ENA_10;</div><div class='del'>-				break;</div><div class='del'>-			case 100:</div><div class='del'>-				cfg_reg &amp;= ~MAC_CMDCFG_ETH_SPEED;</div><div class='del'>-				cfg_reg &amp;= ~MAC_CMDCFG_ENA_10;</div><div class='del'>-				break;</div><div class='del'>-			case 10:</div><div class='del'>-				cfg_reg &amp;= ~MAC_CMDCFG_ETH_SPEED;</div><div class='del'>-				cfg_reg |= MAC_CMDCFG_ENA_10;</div><div class='del'>-				break;</div><div class='del'>-			default:</div><div class='del'>-				if (netif_msg_link(priv))</div><div class='del'>-					netdev_warn(dev, "Speed (%d) is not 10/100/1000!\n",</div><div class='del'>-						    phydev-&gt;speed);</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-			priv-&gt;oldspeed = phydev-&gt;speed;</div><div class='del'>-		}</div><div class='del'>-		iowrite32(cfg_reg, &amp;priv-&gt;mac_dev-&gt;command_config);</div><div class='del'>-</div><div class='del'>-		if (!priv-&gt;oldlink) {</div><div class='del'>-			new_state = 1;</div><div class='del'>-			priv-&gt;oldlink = 1;</div><div class='del'>-		}</div><div class='del'>-	} else if (priv-&gt;oldlink) {</div><div class='del'>-		new_state = 1;</div><div class='del'>-		priv-&gt;oldlink = 0;</div><div class='del'>-		priv-&gt;oldspeed = 0;</div><div class='del'>-		priv-&gt;oldduplex = -1;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (new_state &amp;&amp; netif_msg_link(priv))</div><div class='del'>-		phy_print_status(phydev);</div><div class='del'>-</div><div class='del'>-	spin_unlock(&amp;priv-&gt;mac_cfg_lock);</div><div class='del'>-}</div><div class='del'>-static struct phy_device *connect_local_phy(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct altera_tse_private *priv = netdev_priv(dev);</div><div class='del'>-	struct phy_device *phydev = NULL;</div><div class='del'>-	char phy_id_fmt[MII_BUS_ID_SIZE + 3];</div><div class='del'>-</div><div class='del'>-	if (priv-&gt;phy_addr != POLL_PHY) {</div><div class='del'>-		snprintf(phy_id_fmt, MII_BUS_ID_SIZE + 3, PHY_ID_FMT,</div><div class='del'>-			 priv-&gt;mdio-&gt;id, priv-&gt;phy_addr);</div><div class='del'>-</div><div class='del'>-		netdev_dbg(dev, "trying to attach to %s\n", phy_id_fmt);</div><div class='del'>-</div><div class='del'>-		phydev = phy_connect(dev, phy_id_fmt, &amp;altera_tse_adjust_link,</div><div class='del'>-				     priv-&gt;phy_iface);</div><div class='del'>-		if (IS_ERR(phydev))</div><div class='del'>-			netdev_err(dev, "Could not attach to PHY\n");</div><div class='del'>-</div><div class='del'>-	} else {</div><div class='del'>-		int ret;</div><div class='del'>-		phydev = phy_find_first(priv-&gt;mdio);</div><div class='del'>-		if (phydev == NULL) {</div><div class='del'>-			netdev_err(dev, "No PHY found\n");</div><div class='del'>-			return phydev;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		ret = phy_connect_direct(dev, phydev, &amp;altera_tse_adjust_link,</div><div class='del'>-				priv-&gt;phy_iface);</div><div class='del'>-		if (ret != 0) {</div><div class='del'>-			netdev_err(dev, "Could not attach to PHY\n");</div><div class='del'>-			phydev = NULL;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return phydev;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int altera_tse_phy_get_addr_mdio_create(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct altera_tse_private *priv = netdev_priv(dev);</div><div class='ctx'> 	struct device_node *np = priv-&gt;device-&gt;of_node;</div><div class='del'>-	int ret = 0;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	priv-&gt;phy_iface = of_get_phy_mode(np);</div><div class='add'>+	ret = of_get_phy_mode(np, &amp;priv-&gt;phy_iface);</div><div class='ctx'> </div><div class='ctx'> 	/* Avoid get phy addr and create mdio if no phy is present */</div><div class='del'>-	if (!priv-&gt;phy_iface)</div><div class='add'>+	if (ret)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	/* try to get PHY address from device tree, use PHY autodetection if</div><div class='hunk'>@@ -776,93 +638,7 @@ static int altera_tse_phy_get_addr_mdio_create(struct net_device *dev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Initialize driver's PHY state, and attach to the PHY</div><div class='del'>- */</div><div class='del'>-static int init_phy(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct altera_tse_private *priv = netdev_priv(dev);</div><div class='del'>-	struct phy_device *phydev;</div><div class='del'>-	struct device_node *phynode;</div><div class='del'>-	bool fixed_link = false;</div><div class='del'>-	int rc = 0;</div><div class='del'>-</div><div class='del'>-	/* Avoid init phy in case of no phy present */</div><div class='del'>-	if (!priv-&gt;phy_iface)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	priv-&gt;oldlink = 0;</div><div class='del'>-	priv-&gt;oldspeed = 0;</div><div class='del'>-	priv-&gt;oldduplex = -1;</div><div class='del'>-</div><div class='del'>-	phynode = of_parse_phandle(priv-&gt;device-&gt;of_node, "phy-handle", 0);</div><div class='del'>-</div><div class='del'>-	if (!phynode) {</div><div class='del'>-		/* check if a fixed-link is defined in device-tree */</div><div class='del'>-		if (of_phy_is_fixed_link(priv-&gt;device-&gt;of_node)) {</div><div class='del'>-			rc = of_phy_register_fixed_link(priv-&gt;device-&gt;of_node);</div><div class='del'>-			if (rc &lt; 0) {</div><div class='del'>-				netdev_err(dev, "cannot register fixed PHY\n");</div><div class='del'>-				return rc;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			/* In the case of a fixed PHY, the DT node associated</div><div class='del'>-			 * to the PHY is the Ethernet MAC DT node.</div><div class='del'>-			 */</div><div class='del'>-			phynode = of_node_get(priv-&gt;device-&gt;of_node);</div><div class='del'>-			fixed_link = true;</div><div class='del'>-</div><div class='del'>-			netdev_dbg(dev, "fixed-link detected\n");</div><div class='del'>-			phydev = of_phy_connect(dev, phynode,</div><div class='del'>-						&amp;altera_tse_adjust_link,</div><div class='del'>-						0, priv-&gt;phy_iface);</div><div class='del'>-		} else {</div><div class='del'>-			netdev_dbg(dev, "no phy-handle found\n");</div><div class='del'>-			if (!priv-&gt;mdio) {</div><div class='del'>-				netdev_err(dev, "No phy-handle nor local mdio specified\n");</div><div class='del'>-				return -ENODEV;</div><div class='del'>-			}</div><div class='del'>-			phydev = connect_local_phy(dev);</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		netdev_dbg(dev, "phy-handle found\n");</div><div class='del'>-		phydev = of_phy_connect(dev, phynode,</div><div class='del'>-			&amp;altera_tse_adjust_link, 0, priv-&gt;phy_iface);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (!phydev) {</div><div class='del'>-		netdev_err(dev, "Could not find the PHY\n");</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Stop Advertising 1000BASE Capability if interface is not GMII</div><div class='del'>-	 * Note: Checkpatch throws CHECKs for the camel case defines below,</div><div class='del'>-	 * it's ok to ignore.</div><div class='del'>-	 */</div><div class='del'>-	if ((priv-&gt;phy_iface == PHY_INTERFACE_MODE_MII) ||</div><div class='del'>-	    (priv-&gt;phy_iface == PHY_INTERFACE_MODE_RMII))</div><div class='del'>-		phydev-&gt;advertising &amp;= ~(SUPPORTED_1000baseT_Half |</div><div class='del'>-					 SUPPORTED_1000baseT_Full);</div><div class='del'>-</div><div class='del'>-	/* Broken HW is sometimes missing the pull-up resistor on the</div><div class='del'>-	 * MDIO line, which results in reads to non-existent devices returning</div><div class='del'>-	 * 0 rather than 0xffff. Catch this here and treat 0 as a non-existent</div><div class='del'>-	 * device as well. If a fixed-link is used the phy_id is always 0.</div><div class='del'>-	 * Note: phydev-&gt;phy_id is the result of reading the UID PHY registers.</div><div class='del'>-	 */</div><div class='del'>-	if ((phydev-&gt;phy_id == 0) &amp;&amp; !fixed_link) {</div><div class='del'>-		netdev_err(dev, "Bad PHY UID 0x%08x\n", phydev-&gt;phy_id);</div><div class='del'>-		phy_disconnect(phydev);</div><div class='del'>-		return -ENODEV;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	netdev_dbg(dev, "attached to PHY %d UID 0x%08x Link = %d\n",</div><div class='del'>-		   phydev-&gt;addr, phydev-&gt;phy_id, phydev-&gt;link);</div><div class='del'>-</div><div class='del'>-	priv-&gt;phydev = phydev;</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void tse_update_mac_addr(struct altera_tse_private *priv, u8 *addr)</div><div class='add'>+static void tse_update_mac_addr(struct altera_tse_private *priv, const u8 *addr)</div><div class='ctx'> {</div><div class='ctx'> 	u32 msb;</div><div class='ctx'> 	u32 lsb;</div><div class='hunk'>@@ -1007,21 +783,12 @@ static void tse_set_mac(struct altera_tse_private *priv, bool enable)</div><div class='ctx'>  */</div><div class='ctx'> static int tse_change_mtu(struct net_device *dev, int new_mtu)</div><div class='ctx'> {</div><div class='del'>-	struct altera_tse_private *priv = netdev_priv(dev);</div><div class='del'>-	unsigned int max_mtu = priv-&gt;max_mtu;</div><div class='del'>-	unsigned int min_mtu = ETH_ZLEN + ETH_FCS_LEN;</div><div class='del'>-</div><div class='ctx'> 	if (netif_running(dev)) {</div><div class='ctx'> 		netdev_err(dev, "must be stopped to change its MTU\n");</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if ((new_mtu &lt; min_mtu) || (new_mtu &gt; max_mtu)) {</div><div class='del'>-		netdev_err(dev, "invalid MTU, max MTU is: %u\n", max_mtu);</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev-&gt;mtu = new_mtu;</div><div class='add'>+	WRITE_ONCE(dev-&gt;mtu, new_mtu);</div><div class='ctx'> 	netdev_update_features(dev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -1030,8 +797,8 @@ static int tse_change_mtu(struct net_device *dev, int new_mtu)</div><div class='ctx'> static void altera_tse_set_mcfilter(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct altera_tse_private *priv = netdev_priv(dev);</div><div class='del'>-	int i;</div><div class='ctx'> 	struct netdev_hw_addr *ha;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	/* clear the hash filter */</div><div class='ctx'> 	for (i = 0; i &lt; 64; i++)</div><div class='hunk'>@@ -1066,7 +833,7 @@ static void altera_tse_set_mcfilterall(struct net_device *dev)</div><div class='ctx'> 		csrwr32(1, priv-&gt;mac_dev, tse_csroffs(hash_table) + i * 4);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Set or clear the multicast filter for this adaptor</div><div class='add'>+/* Set or clear the multicast filter for this adapter</div><div class='ctx'>  */</div><div class='ctx'> static void tse_set_rx_mode_hashfilter(struct net_device *dev)</div><div class='ctx'> {</div><div class='hunk'>@@ -1086,7 +853,7 @@ static void tse_set_rx_mode_hashfilter(struct net_device *dev)</div><div class='ctx'> 	spin_unlock(&amp;priv-&gt;mac_cfg_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-/* Set or clear the multicast filter for this adaptor</div><div class='add'>+/* Set or clear the multicast filter for this adapter</div><div class='ctx'>  */</div><div class='ctx'> static void tse_set_rx_mode(struct net_device *dev)</div><div class='ctx'> {</div><div class='hunk'>@@ -1110,9 +877,9 @@ static void tse_set_rx_mode(struct net_device *dev)</div><div class='ctx'> static int tse_open(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct altera_tse_private *priv = netdev_priv(dev);</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> 	int i;</div><div class='del'>-	unsigned long int flags;</div><div class='ctx'> </div><div class='ctx'> 	/* Reset and configure TSE MAC and probe associated PHY */</div><div class='ctx'> 	ret = priv-&gt;dmaops-&gt;init_dma(priv);</div><div class='hunk'>@@ -1125,10 +892,8 @@ static int tse_open(struct net_device *dev)</div><div class='ctx'> 		netdev_warn(dev, "device MAC address %pM\n",</div><div class='ctx'> 			    dev-&gt;dev_addr);</div><div class='ctx'> </div><div class='del'>-	if ((priv-&gt;revision &lt; 0xd00) || (priv-&gt;revision &gt; 0xe00))</div><div class='del'>-		netdev_warn(dev, "TSE revision %x\n", priv-&gt;revision);</div><div class='del'>-</div><div class='ctx'> 	spin_lock(&amp;priv-&gt;mac_cfg_lock);</div><div class='add'>+</div><div class='ctx'> 	ret = reset_mac(priv);</div><div class='ctx'> 	/* Note that reset_mac will fail if the clocks are gated by the PHY</div><div class='ctx'> 	 * due to the PHY being put into isolation or power down mode.</div><div class='hunk'>@@ -1185,8 +950,12 @@ static int tse_open(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;priv-&gt;rxdma_irq_lock, flags);</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;phydev)</div><div class='del'>-		phy_start(priv-&gt;phydev);</div><div class='add'>+	ret = phylink_of_phy_connect(priv-&gt;phylink, priv-&gt;device-&gt;of_node, 0);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(dev, "could not connect phylink (%d)\n", ret);</div><div class='add'>+		goto tx_request_irq_error;</div><div class='add'>+	}</div><div class='add'>+	phylink_start(priv-&gt;phylink);</div><div class='ctx'> </div><div class='ctx'> 	napi_enable(&amp;priv-&gt;napi);</div><div class='ctx'> 	netif_start_queue(dev);</div><div class='hunk'>@@ -1214,13 +983,11 @@ phy_error:</div><div class='ctx'> static int tse_shutdown(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct altera_tse_private *priv = netdev_priv(dev);</div><div class='del'>-	int ret;</div><div class='ctx'> 	unsigned long int flags;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	/* Stop the PHY */</div><div class='del'>-	if (priv-&gt;phydev)</div><div class='del'>-		phy_stop(priv-&gt;phydev);</div><div class='del'>-</div><div class='add'>+	phylink_stop(priv-&gt;phylink);</div><div class='add'>+	phylink_disconnect_phy(priv-&gt;phylink);</div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='ctx'> 	napi_disable(&amp;priv-&gt;napi);</div><div class='ctx'> </div><div class='hunk'>@@ -1266,11 +1033,73 @@ static struct net_device_ops altera_tse_netdev_ops = {</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static void alt_tse_mac_config(struct phylink_config *config, unsigned int mode,</div><div class='add'>+			       const struct phylink_link_state *state)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = to_net_dev(config-&gt;dev);</div><div class='add'>+	struct altera_tse_private *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;priv-&gt;mac_cfg_lock);</div><div class='add'>+	reset_mac(priv);</div><div class='add'>+	tse_set_mac(priv, true);</div><div class='add'>+	spin_unlock(&amp;priv-&gt;mac_cfg_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void alt_tse_mac_link_down(struct phylink_config *config,</div><div class='add'>+				  unsigned int mode, phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void alt_tse_mac_link_up(struct phylink_config *config,</div><div class='add'>+				struct phy_device *phy, unsigned int mode,</div><div class='add'>+				phy_interface_t interface, int speed,</div><div class='add'>+				int duplex, bool tx_pause, bool rx_pause)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = to_net_dev(config-&gt;dev);</div><div class='add'>+	struct altera_tse_private *priv = netdev_priv(ndev);</div><div class='add'>+	u32 ctrl;</div><div class='add'>+</div><div class='add'>+	ctrl = csrrd32(priv-&gt;mac_dev, tse_csroffs(command_config));</div><div class='add'>+	ctrl &amp;= ~(MAC_CMDCFG_ENA_10 | MAC_CMDCFG_ETH_SPEED | MAC_CMDCFG_HD_ENA);</div><div class='add'>+</div><div class='add'>+	if (duplex == DUPLEX_HALF)</div><div class='add'>+		ctrl |= MAC_CMDCFG_HD_ENA;</div><div class='add'>+</div><div class='add'>+	if (speed == SPEED_1000)</div><div class='add'>+		ctrl |= MAC_CMDCFG_ETH_SPEED;</div><div class='add'>+	else if (speed == SPEED_10)</div><div class='add'>+		ctrl |= MAC_CMDCFG_ENA_10;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;priv-&gt;mac_cfg_lock);</div><div class='add'>+	csrwr32(ctrl, priv-&gt;mac_dev, tse_csroffs(command_config));</div><div class='add'>+	spin_unlock(&amp;priv-&gt;mac_cfg_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct phylink_pcs *alt_tse_select_pcs(struct phylink_config *config,</div><div class='add'>+					      phy_interface_t interface)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = to_net_dev(config-&gt;dev);</div><div class='add'>+	struct altera_tse_private *priv = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	if (interface == PHY_INTERFACE_MODE_SGMII ||</div><div class='add'>+	    interface == PHY_INTERFACE_MODE_1000BASEX)</div><div class='add'>+		return priv-&gt;pcs;</div><div class='add'>+	else</div><div class='add'>+		return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct phylink_mac_ops alt_tse_phylink_ops = {</div><div class='add'>+	.mac_config = alt_tse_mac_config,</div><div class='add'>+	.mac_link_down = alt_tse_mac_link_down,</div><div class='add'>+	.mac_link_up = alt_tse_mac_link_up,</div><div class='add'>+	.mac_select_pcs = alt_tse_select_pcs,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> static int request_and_map(struct platform_device *pdev, const char *name,</div><div class='ctx'> 			   struct resource **res, void __iomem **ptr)</div><div class='ctx'> {</div><div class='del'>-	struct resource *region;</div><div class='ctx'> 	struct device *device = &amp;pdev-&gt;dev;</div><div class='add'>+	struct resource *region;</div><div class='ctx'> </div><div class='ctx'> 	*res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name);</div><div class='ctx'> 	if (*res == NULL) {</div><div class='hunk'>@@ -1285,10 +1114,10 @@ static int request_and_map(struct platform_device *pdev, const char *name,</div><div class='ctx'> 		return -EBUSY;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	*ptr = devm_ioremap_nocache(device, region-&gt;start,</div><div class='add'>+	*ptr = devm_ioremap(device, region-&gt;start,</div><div class='ctx'> 				    resource_size(region));</div><div class='ctx'> 	if (*ptr == NULL) {</div><div class='del'>-		dev_err(device, "ioremap_nocache of %s failed!", name);</div><div class='add'>+		dev_err(device, "ioremap of %s failed!", name);</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -1299,14 +1128,18 @@ static int request_and_map(struct platform_device *pdev, const char *name,</div><div class='ctx'>  */</div><div class='ctx'> static int altera_tse_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *ndev;</div><div class='del'>-	int ret = -ENODEV;</div><div class='add'>+	struct regmap_config pcs_regmap_cfg;</div><div class='add'>+	struct altera_tse_private *priv;</div><div class='add'>+	struct mdio_regmap_config mrc;</div><div class='ctx'> 	struct resource *control_port;</div><div class='add'>+	struct regmap *pcs_regmap;</div><div class='ctx'> 	struct resource *dma_res;</div><div class='del'>-	struct altera_tse_private *priv;</div><div class='del'>-	const unsigned char *macaddr;</div><div class='add'>+	struct resource *pcs_res;</div><div class='add'>+	struct mii_bus *pcs_bus;</div><div class='add'>+	struct net_device *ndev;</div><div class='ctx'> 	void __iomem *descmap;</div><div class='del'>-	const struct of_device_id *of_id = NULL;</div><div class='add'>+	int ret = -ENODEV;</div><div class='add'>+	u32 revision;</div><div class='ctx'> </div><div class='ctx'> 	ndev = alloc_etherdev(sizeof(struct altera_tse_private));</div><div class='ctx'> 	if (!ndev) {</div><div class='hunk'>@@ -1315,17 +1148,14 @@ static int altera_tse_probe(struct platform_device *pdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	SET_NETDEV_DEV(ndev, &amp;pdev-&gt;dev);</div><div class='add'>+	platform_set_drvdata(pdev, ndev);</div><div class='ctx'> </div><div class='ctx'> 	priv = netdev_priv(ndev);</div><div class='ctx'> 	priv-&gt;device = &amp;pdev-&gt;dev;</div><div class='ctx'> 	priv-&gt;dev = ndev;</div><div class='ctx'> 	priv-&gt;msg_enable = netif_msg_init(debug, default_msg_level);</div><div class='ctx'> </div><div class='del'>-	of_id = of_match_device(altera_tse_ids, &amp;pdev-&gt;dev);</div><div class='del'>-</div><div class='del'>-	if (of_id)</div><div class='del'>-		priv-&gt;dmaops = (struct altera_dmaops *)of_id-&gt;data;</div><div class='del'>-</div><div class='add'>+	priv-&gt;dmaops = device_get_match_data(&amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> 	if (priv-&gt;dmaops &amp;&amp;</div><div class='ctx'> 	    priv-&gt;dmaops-&gt;altera_dtype == ALTERA_DTYPE_SGDMA) {</div><div class='hunk'>@@ -1351,11 +1181,13 @@ static int altera_tse_probe(struct platform_device *pdev)</div><div class='ctx'> 		if (upper_32_bits(priv-&gt;rxdescmem_busaddr)) {</div><div class='ctx'> 			dev_dbg(priv-&gt;device,</div><div class='ctx'> 				"SGDMA bus addresses greater than 32-bits\n");</div><div class='add'>+			ret = -EINVAL;</div><div class='ctx'> 			goto err_free_netdev;</div><div class='ctx'> 		}</div><div class='ctx'> 		if (upper_32_bits(priv-&gt;txdescmem_busaddr)) {</div><div class='ctx'> 			dev_dbg(priv-&gt;device,</div><div class='ctx'> 				"SGDMA bus addresses greater than 32-bits\n");</div><div class='add'>+			ret = -EINVAL;</div><div class='ctx'> 			goto err_free_netdev;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else if (priv-&gt;dmaops &amp;&amp;</div><div class='hunk'>@@ -1382,16 +1214,19 @@ static int altera_tse_probe(struct platform_device *pdev)</div><div class='ctx'> 		priv-&gt;rxdescmem_busaddr = dma_res-&gt;start;</div><div class='ctx'> </div><div class='ctx'> 	} else {</div><div class='add'>+		ret = -ENODEV;</div><div class='ctx'> 		goto err_free_netdev;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!dma_set_mask(priv-&gt;device, DMA_BIT_MASK(priv-&gt;dmaops-&gt;dmamask)))</div><div class='add'>+	if (!dma_set_mask(priv-&gt;device, DMA_BIT_MASK(priv-&gt;dmaops-&gt;dmamask))) {</div><div class='ctx'> 		dma_set_coherent_mask(priv-&gt;device,</div><div class='ctx'> 				      DMA_BIT_MASK(priv-&gt;dmaops-&gt;dmamask));</div><div class='del'>-	else if (!dma_set_mask(priv-&gt;device, DMA_BIT_MASK(32)))</div><div class='add'>+	} else if (!dma_set_mask(priv-&gt;device, DMA_BIT_MASK(32))) {</div><div class='ctx'> 		dma_set_coherent_mask(priv-&gt;device, DMA_BIT_MASK(32));</div><div class='del'>-	else</div><div class='add'>+	} else {</div><div class='add'>+		ret = -EIO;</div><div class='ctx'> 		goto err_free_netdev;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* MAC address space */</div><div class='ctx'> 	ret = request_and_map(pdev, "control_port", &amp;control_port,</div><div class='hunk'>@@ -1412,6 +1247,40 @@ static int altera_tse_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto err_free_netdev;</div><div class='ctx'> </div><div class='add'>+	memset(&amp;pcs_regmap_cfg, 0, sizeof(pcs_regmap_cfg));</div><div class='add'>+	memset(&amp;mrc, 0, sizeof(mrc));</div><div class='add'>+	/* SGMII PCS address space. The location can vary depending on how the</div><div class='add'>+	 * IP is integrated. We can have a resource dedicated to it at a specific</div><div class='add'>+	 * address space, but if it's not the case, we fallback to the mdiophy0</div><div class='add'>+	 * from the MAC's address space</div><div class='add'>+	 */</div><div class='add'>+	ret = request_and_map(pdev, "pcs", &amp;pcs_res, &amp;priv-&gt;pcs_base);</div><div class='add'>+	if (ret) {</div><div class='add'>+		/* If we can't find a dedicated resource for the PCS, fallback</div><div class='add'>+		 * to the internal PCS, that has a different address stride</div><div class='add'>+		 */</div><div class='add'>+		priv-&gt;pcs_base = priv-&gt;mac_dev + tse_csroffs(mdio_phy0);</div><div class='add'>+		pcs_regmap_cfg.reg_bits = 32;</div><div class='add'>+		/* Values are MDIO-like values, on 16 bits */</div><div class='add'>+		pcs_regmap_cfg.val_bits = 16;</div><div class='add'>+		pcs_regmap_cfg.reg_shift = REGMAP_UPSHIFT(2);</div><div class='add'>+	} else {</div><div class='add'>+		pcs_regmap_cfg.reg_bits = 16;</div><div class='add'>+		pcs_regmap_cfg.val_bits = 16;</div><div class='add'>+		pcs_regmap_cfg.reg_shift = REGMAP_UPSHIFT(1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Create a regmap for the PCS so that it can be used by the PCS driver */</div><div class='add'>+	pcs_regmap = devm_regmap_init_mmio(&amp;pdev-&gt;dev, priv-&gt;pcs_base,</div><div class='add'>+					   &amp;pcs_regmap_cfg);</div><div class='add'>+	if (IS_ERR(pcs_regmap)) {</div><div class='add'>+		ret = PTR_ERR(pcs_regmap);</div><div class='add'>+		goto err_free_netdev;</div><div class='add'>+	}</div><div class='add'>+	mrc.regmap = pcs_regmap;</div><div class='add'>+	mrc.parent = &amp;pdev-&gt;dev;</div><div class='add'>+	mrc.valid_addr = 0x0;</div><div class='add'>+	mrc.autoscan = false;</div><div class='ctx'> </div><div class='ctx'> 	/* Rx IRQ */</div><div class='ctx'> 	priv-&gt;rx_irq = platform_get_irq_byname(pdev, "rx_irq");</div><div class='hunk'>@@ -1459,15 +1328,16 @@ static int altera_tse_probe(struct platform_device *pdev)</div><div class='ctx'> 		of_property_read_bool(pdev-&gt;dev.of_node,</div><div class='ctx'> 				      "altr,has-supplementary-unicast");</div><div class='ctx'> </div><div class='add'>+	priv-&gt;dev-&gt;min_mtu = ETH_ZLEN + ETH_FCS_LEN;</div><div class='ctx'> 	/* Max MTU is 1500, ETH_DATA_LEN */</div><div class='del'>-	priv-&gt;max_mtu = ETH_DATA_LEN;</div><div class='add'>+	priv-&gt;dev-&gt;max_mtu = ETH_DATA_LEN;</div><div class='ctx'> </div><div class='ctx'> 	/* Get the max mtu from the device tree. Note that the</div><div class='ctx'> 	 * "max-frame-size" parameter is actually max mtu. Definition</div><div class='ctx'> 	 * in the ePAPR v1.1 spec and usage differ, so go with usage.</div><div class='ctx'> 	 */</div><div class='ctx'> 	of_property_read_u32(pdev-&gt;dev.of_node, "max-frame-size",</div><div class='del'>-			     &amp;priv-&gt;max_mtu);</div><div class='add'>+			     &amp;priv-&gt;dev-&gt;max_mtu);</div><div class='ctx'> </div><div class='ctx'> 	/* The DMA buffer size already accounts for an alignment bias</div><div class='ctx'> 	 * to avoid unaligned access exceptions for the NIOS processor,</div><div class='hunk'>@@ -1475,10 +1345,8 @@ static int altera_tse_probe(struct platform_device *pdev)</div><div class='ctx'> 	priv-&gt;rx_dma_buf_sz = ALTERA_RXDMABUFFER_SIZE;</div><div class='ctx'> </div><div class='ctx'> 	/* get default MAC address from device tree */</div><div class='del'>-	macaddr = of_get_mac_address(pdev-&gt;dev.of_node);</div><div class='del'>-	if (macaddr)</div><div class='del'>-		ether_addr_copy(ndev-&gt;dev_addr, macaddr);</div><div class='del'>-	else</div><div class='add'>+	ret = of_get_ethdev_address(pdev-&gt;dev.of_node, ndev);</div><div class='add'>+	if (ret)</div><div class='ctx'> 		eth_hw_addr_random(ndev);</div><div class='ctx'> </div><div class='ctx'> 	/* get phy addr and create mdio */</div><div class='hunk'>@@ -1512,39 +1380,73 @@ static int altera_tse_probe(struct platform_device *pdev)</div><div class='ctx'> 	ndev-&gt;features |= NETIF_F_HW_VLAN_CTAG_RX;</div><div class='ctx'> </div><div class='ctx'> 	/* setup NAPI interface */</div><div class='del'>-	netif_napi_add(ndev, &amp;priv-&gt;napi, tse_poll, NAPI_POLL_WEIGHT);</div><div class='add'>+	netif_napi_add(ndev, &amp;priv-&gt;napi, tse_poll);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_init(&amp;priv-&gt;mac_cfg_lock);</div><div class='ctx'> 	spin_lock_init(&amp;priv-&gt;tx_lock);</div><div class='ctx'> 	spin_lock_init(&amp;priv-&gt;rxdma_irq_lock);</div><div class='ctx'> </div><div class='add'>+	snprintf(mrc.name, MII_BUS_ID_SIZE, "%s-pcs-mii", dev_name(&amp;pdev-&gt;dev));</div><div class='add'>+	pcs_bus = devm_mdio_regmap_register(&amp;pdev-&gt;dev, &amp;mrc);</div><div class='add'>+	if (IS_ERR(pcs_bus)) {</div><div class='add'>+		ret = PTR_ERR(pcs_bus);</div><div class='add'>+		goto err_init_pcs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;pcs = lynx_pcs_create_mdiodev(pcs_bus, 0);</div><div class='add'>+	if (IS_ERR(priv-&gt;pcs)) {</div><div class='add'>+		ret = PTR_ERR(priv-&gt;pcs);</div><div class='add'>+		goto err_init_pcs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	priv-&gt;phylink_config.dev = &amp;ndev-&gt;dev;</div><div class='add'>+	priv-&gt;phylink_config.type = PHYLINK_NETDEV;</div><div class='add'>+	priv-&gt;phylink_config.mac_capabilities = MAC_SYM_PAUSE | MAC_10 |</div><div class='add'>+						MAC_100 | MAC_1000FD;</div><div class='add'>+</div><div class='add'>+	phy_interface_set_rgmii(priv-&gt;phylink_config.supported_interfaces);</div><div class='add'>+	__set_bit(PHY_INTERFACE_MODE_MII,</div><div class='add'>+		  priv-&gt;phylink_config.supported_interfaces);</div><div class='add'>+	__set_bit(PHY_INTERFACE_MODE_GMII,</div><div class='add'>+		  priv-&gt;phylink_config.supported_interfaces);</div><div class='add'>+	__set_bit(PHY_INTERFACE_MODE_SGMII,</div><div class='add'>+		  priv-&gt;phylink_config.supported_interfaces);</div><div class='add'>+	__set_bit(PHY_INTERFACE_MODE_1000BASEX,</div><div class='add'>+		  priv-&gt;phylink_config.supported_interfaces);</div><div class='add'>+</div><div class='add'>+	priv-&gt;phylink = phylink_create(&amp;priv-&gt;phylink_config,</div><div class='add'>+				       of_fwnode_handle(priv-&gt;device-&gt;of_node),</div><div class='add'>+				       priv-&gt;phy_iface, &amp;alt_tse_phylink_ops);</div><div class='add'>+	if (IS_ERR(priv-&gt;phylink)) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "failed to create phylink\n");</div><div class='add'>+		ret = PTR_ERR(priv-&gt;phylink);</div><div class='add'>+		goto err_init_phylink;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	ret = register_netdev(ndev);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "failed to register TSE net device\n");</div><div class='ctx'> 		goto err_register_netdev;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	platform_set_drvdata(pdev, ndev);</div><div class='add'>+	revision = ioread32(&amp;priv-&gt;mac_dev-&gt;megacore_revision);</div><div class='ctx'> </div><div class='del'>-	priv-&gt;revision = ioread32(&amp;priv-&gt;mac_dev-&gt;megacore_revision);</div><div class='add'>+	if (revision &lt; 0xd00 || revision &gt; 0xe00)</div><div class='add'>+		netdev_warn(ndev, "TSE revision %x\n", revision);</div><div class='ctx'> </div><div class='ctx'> 	if (netif_msg_probe(priv))</div><div class='ctx'> 		dev_info(&amp;pdev-&gt;dev, "Altera TSE MAC version %d.%d at 0x%08lx irq %d/%d\n",</div><div class='del'>-			 (priv-&gt;revision &gt;&gt; 8) &amp; 0xff,</div><div class='del'>-			 priv-&gt;revision &amp; 0xff,</div><div class='del'>-			 (unsigned long) control_port-&gt;start, priv-&gt;rx_irq,</div><div class='add'>+			 (revision &gt;&gt; 8) &amp; 0xff, revision &amp; 0xff,</div><div class='add'>+			 (unsigned long)control_port-&gt;start, priv-&gt;rx_irq,</div><div class='ctx'> 			 priv-&gt;tx_irq);</div><div class='ctx'> </div><div class='del'>-	ret = init_phy(ndev);</div><div class='del'>-	if (ret != 0) {</div><div class='del'>-		netdev_err(ndev, "Cannot attach to PHY (error: %d)\n", ret);</div><div class='del'>-		goto err_init_phy;</div><div class='del'>-	}</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-err_init_phy:</div><div class='del'>-	unregister_netdev(ndev);</div><div class='ctx'> err_register_netdev:</div><div class='add'>+	phylink_destroy(priv-&gt;phylink);</div><div class='add'>+err_init_phylink:</div><div class='add'>+	lynx_pcs_destroy(priv-&gt;pcs);</div><div class='add'>+err_init_pcs:</div><div class='ctx'> 	netif_napi_del(&amp;priv-&gt;napi);</div><div class='ctx'> 	altera_tse_mdio_destroy(ndev);</div><div class='ctx'> err_free_netdev:</div><div class='hunk'>@@ -1554,20 +1456,18 @@ err_free_netdev:</div><div class='ctx'> </div><div class='ctx'> /* Remove Altera TSE MAC device</div><div class='ctx'>  */</div><div class='del'>-static int altera_tse_remove(struct platform_device *pdev)</div><div class='add'>+static void altera_tse_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *ndev = platform_get_drvdata(pdev);</div><div class='ctx'> 	struct altera_tse_private *priv = netdev_priv(ndev);</div><div class='ctx'> </div><div class='del'>-	if (priv-&gt;phydev)</div><div class='del'>-		phy_disconnect(priv-&gt;phydev);</div><div class='del'>-</div><div class='ctx'> 	platform_set_drvdata(pdev, NULL);</div><div class='ctx'> 	altera_tse_mdio_destroy(ndev);</div><div class='ctx'> 	unregister_netdev(ndev);</div><div class='del'>-	free_netdev(ndev);</div><div class='add'>+	phylink_destroy(priv-&gt;phylink);</div><div class='add'>+	lynx_pcs_destroy(priv-&gt;pcs);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	free_netdev(ndev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct altera_dmaops altera_dtype_sgdma = {</div><div class='head'>diff --git a/drivers/net/ethernet/altera/altera_utils.c b/drivers/net/ethernet/altera/altera_utils.c<br/>index d7eeb1713ad2..e6a7fc9d8fb1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/altera/altera_utils.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/altera/altera_utils.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/altera/altera_utils.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/altera/altera_utils.c</a></div><div class='hunk'>@@ -1,17 +1,6 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /* Altera TSE SGDMA and MSGDMA Linux driver</div><div class='ctx'>  * Copyright (C) 2014 Altera Corporation. All rights reserved</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms and conditions of the GNU General Public License,</div><div class='del'>- * version 2, as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope it will be useful, but WITHOUT</div><div class='del'>- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or</div><div class='del'>- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for</div><div class='del'>- * more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License along with</div><div class='del'>- * this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include "altera_tse.h"</div><div class='head'>diff --git a/drivers/net/ethernet/altera/altera_utils.h b/drivers/net/ethernet/altera/altera_utils.h<br/>index baf100ccf587..3c2e32fb7389 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/altera/altera_utils.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/altera/altera_utils.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/altera/altera_utils.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/altera/altera_utils.h</a></div><div class='hunk'>@@ -1,24 +1,14 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='ctx'> /* Altera TSE SGDMA and MSGDMA Linux driver</div><div class='ctx'>  * Copyright (C) 2014 Altera Corporation. All rights reserved</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify it</div><div class='del'>- * under the terms and conditions of the GNU General Public License,</div><div class='del'>- * version 2, as published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope it will be useful, but WITHOUT</div><div class='del'>- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or</div><div class='del'>- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for</div><div class='del'>- * more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License along with</div><div class='del'>- * this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-</div><div class='ctx'> #ifndef __ALTERA_UTILS_H__</div><div class='ctx'> #define __ALTERA_UTILS_H__</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/compiler.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='ctx'> void tse_set_bit(void __iomem *ioaddr, size_t offs, u32 bit_mask);</div><div class='ctx'> void tse_clear_bit(void __iomem *ioaddr, size_t offs, u32 bit_mask);</div><div class='ctx'> int tse_bit_is_set(void __iomem *ioaddr, size_t offs, u32 bit_mask);</div><div class='head'>diff --git a/drivers/net/ethernet/amazon/Kconfig b/drivers/net/ethernet/amazon/Kconfig<br/>new file mode 100644<br/>index 000000000000..95dcc3969f0c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amazon/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,31 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+#</div><div class='add'>+# Amazon network device configuration</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+config NET_VENDOR_AMAZON</div><div class='add'>+	bool "Amazon Devices"</div><div class='add'>+	default y</div><div class='add'>+	help</div><div class='add'>+	  If you have a network (Ethernet) device belonging to this class, say Y.</div><div class='add'>+</div><div class='add'>+	  Note that the answer to this question doesn't directly affect the</div><div class='add'>+	  kernel: saying N will just cause the configurator to skip all</div><div class='add'>+	  the questions about Amazon devices. If you say Y, you will be asked</div><div class='add'>+	  for your specific device in the following questions.</div><div class='add'>+</div><div class='add'>+if NET_VENDOR_AMAZON</div><div class='add'>+</div><div class='add'>+config ENA_ETHERNET</div><div class='add'>+	tristate "Elastic Network Adapter (ENA) support"</div><div class='add'>+	depends on PCI_MSI &amp;&amp; !CPU_BIG_ENDIAN</div><div class='add'>+	depends on PTP_1588_CLOCK_OPTIONAL</div><div class='add'>+	select DIMLIB</div><div class='add'>+	select NET_DEVLINK</div><div class='add'>+	help</div><div class='add'>+	  This driver supports Elastic Network Adapter (ENA)"</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose M here.</div><div class='add'>+	  The module will be called ena.</div><div class='add'>+</div><div class='add'>+endif #NET_VENDOR_AMAZON</div><div class='head'>diff --git a/drivers/net/ethernet/amazon/Makefile b/drivers/net/ethernet/amazon/Makefile<br/>new file mode 100644<br/>index 000000000000..f614f23ec549<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amazon/Makefile</a></div><div class='hunk'>@@ -0,0 +1,6 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+#</div><div class='add'>+# Makefile for the Amazon network device drivers.</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_ENA_ETHERNET) += ena/</div><div class='head'>diff --git a/drivers/net/ethernet/amazon/ena/Makefile b/drivers/net/ethernet/amazon/ena/Makefile<br/>new file mode 100644<br/>index 000000000000..6d8036bc1823<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amazon/ena/Makefile</a></div><div class='hunk'>@@ -0,0 +1,8 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+#</div><div class='add'>+# Makefile for the Elastic Network Adapter (ENA) device drivers.</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_ENA_ETHERNET) += ena.o</div><div class='add'>+</div><div class='add'>+ena-y := ena_netdev.o ena_com.o ena_eth_com.o ena_ethtool.o ena_xdp.o ena_phc.o ena_devlink.o ena_debugfs.o</div><div class='head'>diff --git a/drivers/net/ethernet/amazon/ena/ena_admin_defs.h b/drivers/net/ethernet/amazon/ena/ena_admin_defs.h<br/>new file mode 100644<br/>index 000000000000..898ecd96b96a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_admin_defs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amazon/ena/ena_admin_defs.h</a></div><div class='hunk'>@@ -0,0 +1,1342 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015-2020 Amazon.com, Inc. or its affiliates. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+#ifndef _ENA_ADMIN_H_</div><div class='add'>+#define _ENA_ADMIN_H_</div><div class='add'>+</div><div class='add'>+#define ENA_ADMIN_RSS_KEY_PARTS              10</div><div class='add'>+</div><div class='add'>+#define ENA_ADMIN_CUSTOMER_METRICS_SUPPORT_MASK 0x3F</div><div class='add'>+#define ENA_ADMIN_CUSTOMER_METRICS_MIN_SUPPORT_MASK 0x1F</div><div class='add'>+</div><div class='add'>+ /* customer metrics - in correlation with</div><div class='add'>+  * ENA_ADMIN_CUSTOMER_METRICS_SUPPORT_MASK</div><div class='add'>+  */</div><div class='add'>+enum ena_admin_customer_metrics_id {</div><div class='add'>+	ENA_ADMIN_BW_IN_ALLOWANCE_EXCEEDED         = 0,</div><div class='add'>+	ENA_ADMIN_BW_OUT_ALLOWANCE_EXCEEDED        = 1,</div><div class='add'>+	ENA_ADMIN_PPS_ALLOWANCE_EXCEEDED           = 2,</div><div class='add'>+	ENA_ADMIN_CONNTRACK_ALLOWANCE_EXCEEDED     = 3,</div><div class='add'>+	ENA_ADMIN_LINKLOCAL_ALLOWANCE_EXCEEDED     = 4,</div><div class='add'>+	ENA_ADMIN_CONNTRACK_ALLOWANCE_AVAILABLE    = 5,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum ena_admin_aq_opcode {</div><div class='add'>+	ENA_ADMIN_CREATE_SQ                         = 1,</div><div class='add'>+	ENA_ADMIN_DESTROY_SQ                        = 2,</div><div class='add'>+	ENA_ADMIN_CREATE_CQ                         = 3,</div><div class='add'>+	ENA_ADMIN_DESTROY_CQ                        = 4,</div><div class='add'>+	ENA_ADMIN_GET_FEATURE                       = 8,</div><div class='add'>+	ENA_ADMIN_SET_FEATURE                       = 9,</div><div class='add'>+	ENA_ADMIN_GET_STATS                         = 11,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum ena_admin_aq_completion_status {</div><div class='add'>+	ENA_ADMIN_SUCCESS                           = 0,</div><div class='add'>+	ENA_ADMIN_RESOURCE_ALLOCATION_FAILURE       = 1,</div><div class='add'>+	ENA_ADMIN_BAD_OPCODE                        = 2,</div><div class='add'>+	ENA_ADMIN_UNSUPPORTED_OPCODE                = 3,</div><div class='add'>+	ENA_ADMIN_MALFORMED_REQUEST                 = 4,</div><div class='add'>+	/* Additional status is provided in ACQ entry extended_status */</div><div class='add'>+	ENA_ADMIN_ILLEGAL_PARAMETER                 = 5,</div><div class='add'>+	ENA_ADMIN_UNKNOWN_ERROR                     = 6,</div><div class='add'>+	ENA_ADMIN_RESOURCE_BUSY                     = 7,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* subcommands for the set/get feature admin commands */</div><div class='add'>+enum ena_admin_aq_feature_id {</div><div class='add'>+	ENA_ADMIN_DEVICE_ATTRIBUTES                 = 1,</div><div class='add'>+	ENA_ADMIN_MAX_QUEUES_NUM                    = 2,</div><div class='add'>+	ENA_ADMIN_HW_HINTS                          = 3,</div><div class='add'>+	ENA_ADMIN_LLQ                               = 4,</div><div class='add'>+	ENA_ADMIN_MAX_QUEUES_EXT                    = 7,</div><div class='add'>+	ENA_ADMIN_RSS_HASH_FUNCTION                 = 10,</div><div class='add'>+	ENA_ADMIN_STATELESS_OFFLOAD_CONFIG          = 11,</div><div class='add'>+	ENA_ADMIN_RSS_INDIRECTION_TABLE_CONFIG      = 12,</div><div class='add'>+	ENA_ADMIN_MTU                               = 14,</div><div class='add'>+	ENA_ADMIN_RSS_HASH_INPUT                    = 18,</div><div class='add'>+	ENA_ADMIN_INTERRUPT_MODERATION              = 20,</div><div class='add'>+	ENA_ADMIN_AENQ_CONFIG                       = 26,</div><div class='add'>+	ENA_ADMIN_LINK_CONFIG                       = 27,</div><div class='add'>+	ENA_ADMIN_HOST_ATTR_CONFIG                  = 28,</div><div class='add'>+	ENA_ADMIN_PHC_CONFIG                        = 29,</div><div class='add'>+	ENA_ADMIN_FEATURES_OPCODE_NUM               = 32,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* device capabilities */</div><div class='add'>+enum ena_admin_aq_caps_id {</div><div class='add'>+	ENA_ADMIN_ENI_STATS                         = 0,</div><div class='add'>+	/* ENA SRD customer metrics */</div><div class='add'>+	ENA_ADMIN_ENA_SRD_INFO                      = 1,</div><div class='add'>+	ENA_ADMIN_CUSTOMER_METRICS                  = 2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum ena_admin_placement_policy_type {</div><div class='add'>+	/* descriptors and headers are in host memory */</div><div class='add'>+	ENA_ADMIN_PLACEMENT_POLICY_HOST             = 1,</div><div class='add'>+	/* descriptors and headers are in device memory (a.k.a Low Latency</div><div class='add'>+	 * Queue)</div><div class='add'>+	 */</div><div class='add'>+	ENA_ADMIN_PLACEMENT_POLICY_DEV              = 3,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum ena_admin_link_types {</div><div class='add'>+	ENA_ADMIN_LINK_SPEED_1G                     = 0x1,</div><div class='add'>+	ENA_ADMIN_LINK_SPEED_2_HALF_G               = 0x2,</div><div class='add'>+	ENA_ADMIN_LINK_SPEED_5G                     = 0x4,</div><div class='add'>+	ENA_ADMIN_LINK_SPEED_10G                    = 0x8,</div><div class='add'>+	ENA_ADMIN_LINK_SPEED_25G                    = 0x10,</div><div class='add'>+	ENA_ADMIN_LINK_SPEED_40G                    = 0x20,</div><div class='add'>+	ENA_ADMIN_LINK_SPEED_50G                    = 0x40,</div><div class='add'>+	ENA_ADMIN_LINK_SPEED_100G                   = 0x80,</div><div class='add'>+	ENA_ADMIN_LINK_SPEED_200G                   = 0x100,</div><div class='add'>+	ENA_ADMIN_LINK_SPEED_400G                   = 0x200,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum ena_admin_completion_policy_type {</div><div class='add'>+	/* completion queue entry for each sq descriptor */</div><div class='add'>+	ENA_ADMIN_COMPLETION_POLICY_DESC            = 0,</div><div class='add'>+	/* completion queue entry upon request in sq descriptor */</div><div class='add'>+	ENA_ADMIN_COMPLETION_POLICY_DESC_ON_DEMAND  = 1,</div><div class='add'>+	/* current queue head pointer is updated in OS memory upon sq</div><div class='add'>+	 * descriptor request</div><div class='add'>+	 */</div><div class='add'>+	ENA_ADMIN_COMPLETION_POLICY_HEAD_ON_DEMAND  = 2,</div><div class='add'>+	/* current queue head pointer is updated in OS memory for each sq</div><div class='add'>+	 * descriptor</div><div class='add'>+	 */</div><div class='add'>+	ENA_ADMIN_COMPLETION_POLICY_HEAD            = 3,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* basic stats return ena_admin_basic_stats while extanded stats return a</div><div class='add'>+ * buffer (string format) with additional statistics per queue and per</div><div class='add'>+ * device id</div><div class='add'>+ */</div><div class='add'>+enum ena_admin_get_stats_type {</div><div class='add'>+	ENA_ADMIN_GET_STATS_TYPE_BASIC              = 0,</div><div class='add'>+	ENA_ADMIN_GET_STATS_TYPE_EXTENDED           = 1,</div><div class='add'>+	/* extra HW stats for specific network interface */</div><div class='add'>+	ENA_ADMIN_GET_STATS_TYPE_ENI                = 2,</div><div class='add'>+	/* extra HW stats for ENA SRD */</div><div class='add'>+	ENA_ADMIN_GET_STATS_TYPE_ENA_SRD            = 3,</div><div class='add'>+	ENA_ADMIN_GET_STATS_TYPE_CUSTOMER_METRICS   = 4,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum ena_admin_get_stats_scope {</div><div class='add'>+	ENA_ADMIN_SPECIFIC_QUEUE                    = 0,</div><div class='add'>+	ENA_ADMIN_ETH_TRAFFIC                       = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum ena_admin_phc_type {</div><div class='add'>+	ENA_ADMIN_PHC_TYPE_READLESS                 = 0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum ena_admin_phc_error_flags {</div><div class='add'>+	ENA_ADMIN_PHC_ERROR_FLAG_TIMESTAMP   = BIT(0),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* ENA SRD configuration for ENI */</div><div class='add'>+enum ena_admin_ena_srd_flags {</div><div class='add'>+	/* Feature enabled */</div><div class='add'>+	ENA_ADMIN_ENA_SRD_ENABLED                   = BIT(0),</div><div class='add'>+	/* UDP support enabled */</div><div class='add'>+	ENA_ADMIN_ENA_SRD_UDP_ENABLED               = BIT(1),</div><div class='add'>+	/* Bypass Rx UDP ordering */</div><div class='add'>+	ENA_ADMIN_ENA_SRD_UDP_ORDERING_BYPASS_ENABLED = BIT(2),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_aq_common_desc {</div><div class='add'>+	/* 11:0 : command_id</div><div class='add'>+	 * 15:12 : reserved12</div><div class='add'>+	 */</div><div class='add'>+	u16 command_id;</div><div class='add'>+</div><div class='add'>+	/* as appears in ena_admin_aq_opcode */</div><div class='add'>+	u8 opcode;</div><div class='add'>+</div><div class='add'>+	/* 0 : phase</div><div class='add'>+	 * 1 : ctrl_data - control buffer address valid</div><div class='add'>+	 * 2 : ctrl_data_indirect - control buffer address</div><div class='add'>+	 *    points to list of pages with addresses of control</div><div class='add'>+	 *    buffers</div><div class='add'>+	 * 7:3 : reserved3</div><div class='add'>+	 */</div><div class='add'>+	u8 flags;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* used in ena_admin_aq_entry. Can point directly to control data, or to a</div><div class='add'>+ * page list chunk. Used also at the end of indirect mode page list chunks,</div><div class='add'>+ * for chaining.</div><div class='add'>+ */</div><div class='add'>+struct ena_admin_ctrl_buff_info {</div><div class='add'>+	u32 length;</div><div class='add'>+</div><div class='add'>+	struct ena_common_mem_addr address;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_sq {</div><div class='add'>+	u16 sq_idx;</div><div class='add'>+</div><div class='add'>+	/* 4:0 : reserved</div><div class='add'>+	 * 7:5 : sq_direction - 0x1 - Tx; 0x2 - Rx</div><div class='add'>+	 */</div><div class='add'>+	u8 sq_identity;</div><div class='add'>+</div><div class='add'>+	u8 reserved1;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_aq_entry {</div><div class='add'>+	struct ena_admin_aq_common_desc aq_common_descriptor;</div><div class='add'>+</div><div class='add'>+	union {</div><div class='add'>+		u32 inline_data_w1[3];</div><div class='add'>+</div><div class='add'>+		struct ena_admin_ctrl_buff_info control_buffer;</div><div class='add'>+	} u;</div><div class='add'>+</div><div class='add'>+	u32 inline_data_w4[12];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_acq_common_desc {</div><div class='add'>+	/* command identifier to associate it with the aq descriptor</div><div class='add'>+	 * 11:0 : command_id</div><div class='add'>+	 * 15:12 : reserved12</div><div class='add'>+	 */</div><div class='add'>+	u16 command;</div><div class='add'>+</div><div class='add'>+	u8 status;</div><div class='add'>+</div><div class='add'>+	/* 0 : phase</div><div class='add'>+	 * 7:1 : reserved1</div><div class='add'>+	 */</div><div class='add'>+	u8 flags;</div><div class='add'>+</div><div class='add'>+	u16 extended_status;</div><div class='add'>+</div><div class='add'>+	/* indicates to the driver which AQ entry has been consumed by the</div><div class='add'>+	 * device and could be reused</div><div class='add'>+	 */</div><div class='add'>+	u16 sq_head_indx;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_acq_entry {</div><div class='add'>+	struct ena_admin_acq_common_desc acq_common_descriptor;</div><div class='add'>+</div><div class='add'>+	u32 response_specific_data[14];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_aq_create_sq_cmd {</div><div class='add'>+	struct ena_admin_aq_common_desc aq_common_descriptor;</div><div class='add'>+</div><div class='add'>+	/* 4:0 : reserved0_w1</div><div class='add'>+	 * 7:5 : sq_direction - 0x1 - Tx, 0x2 - Rx</div><div class='add'>+	 */</div><div class='add'>+	u8 sq_identity;</div><div class='add'>+</div><div class='add'>+	u8 reserved8_w1;</div><div class='add'>+</div><div class='add'>+	/* 3:0 : placement_policy - Describing where the SQ</div><div class='add'>+	 *    descriptor ring and the SQ packet headers reside:</div><div class='add'>+	 *    0x1 - descriptors and headers are in OS memory,</div><div class='add'>+	 *    0x3 - descriptors and headers in device memory</div><div class='add'>+	 *    (a.k.a Low Latency Queue)</div><div class='add'>+	 * 6:4 : completion_policy - Describing what policy</div><div class='add'>+	 *    to use for generation completion entry (cqe) in</div><div class='add'>+	 *    the CQ associated with this SQ: 0x0 - cqe for each</div><div class='add'>+	 *    sq descriptor, 0x1 - cqe upon request in sq</div><div class='add'>+	 *    descriptor, 0x2 - current queue head pointer is</div><div class='add'>+	 *    updated in OS memory upon sq descriptor request</div><div class='add'>+	 *    0x3 - current queue head pointer is updated in OS</div><div class='add'>+	 *    memory for each sq descriptor</div><div class='add'>+	 * 7 : reserved15_w1</div><div class='add'>+	 */</div><div class='add'>+	u8 sq_caps_2;</div><div class='add'>+</div><div class='add'>+	/* 0 : is_physically_contiguous - Described if the</div><div class='add'>+	 *    queue ring memory is allocated in physical</div><div class='add'>+	 *    contiguous pages or split.</div><div class='add'>+	 * 7:1 : reserved17_w1</div><div class='add'>+	 */</div><div class='add'>+	u8 sq_caps_3;</div><div class='add'>+</div><div class='add'>+	/* associated completion queue id. This CQ must be created prior to SQ</div><div class='add'>+	 * creation</div><div class='add'>+	 */</div><div class='add'>+	u16 cq_idx;</div><div class='add'>+</div><div class='add'>+	/* submission queue depth in entries */</div><div class='add'>+	u16 sq_depth;</div><div class='add'>+</div><div class='add'>+	/* SQ physical base address in OS memory. This field should not be</div><div class='add'>+	 * used for Low Latency queues. Has to be page aligned.</div><div class='add'>+	 */</div><div class='add'>+	struct ena_common_mem_addr sq_ba;</div><div class='add'>+</div><div class='add'>+	/* specifies queue head writeback location in OS memory. Valid if</div><div class='add'>+	 * completion_policy is set to completion_policy_head_on_demand or</div><div class='add'>+	 * completion_policy_head. Has to be cache aligned</div><div class='add'>+	 */</div><div class='add'>+	struct ena_common_mem_addr sq_head_writeback;</div><div class='add'>+</div><div class='add'>+	u32 reserved0_w7;</div><div class='add'>+</div><div class='add'>+	u32 reserved0_w8;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum ena_admin_sq_direction {</div><div class='add'>+	ENA_ADMIN_SQ_DIRECTION_TX                   = 1,</div><div class='add'>+	ENA_ADMIN_SQ_DIRECTION_RX                   = 2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_acq_create_sq_resp_desc {</div><div class='add'>+	struct ena_admin_acq_common_desc acq_common_desc;</div><div class='add'>+</div><div class='add'>+	u16 sq_idx;</div><div class='add'>+</div><div class='add'>+	u16 reserved;</div><div class='add'>+</div><div class='add'>+	/* queue doorbell address as an offset to PCIe MMIO REG BAR */</div><div class='add'>+	u32 sq_doorbell_offset;</div><div class='add'>+</div><div class='add'>+	/* low latency queue ring base address as an offset to PCIe MMIO</div><div class='add'>+	 * LLQ_MEM BAR</div><div class='add'>+	 */</div><div class='add'>+	u32 llq_descriptors_offset;</div><div class='add'>+</div><div class='add'>+	/* low latency queue headers' memory as an offset to PCIe MMIO</div><div class='add'>+	 * LLQ_MEM BAR</div><div class='add'>+	 */</div><div class='add'>+	u32 llq_headers_offset;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_aq_destroy_sq_cmd {</div><div class='add'>+	struct ena_admin_aq_common_desc aq_common_descriptor;</div><div class='add'>+</div><div class='add'>+	struct ena_admin_sq sq;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_acq_destroy_sq_resp_desc {</div><div class='add'>+	struct ena_admin_acq_common_desc acq_common_desc;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_aq_create_cq_cmd {</div><div class='add'>+	struct ena_admin_aq_common_desc aq_common_descriptor;</div><div class='add'>+</div><div class='add'>+	/* 4:0 : reserved5</div><div class='add'>+	 * 5 : interrupt_mode_enabled - if set, cq operates</div><div class='add'>+	 *    in interrupt mode, otherwise - polling</div><div class='add'>+	 * 7:6 : reserved6</div><div class='add'>+	 */</div><div class='add'>+	u8 cq_caps_1;</div><div class='add'>+</div><div class='add'>+	/* 4:0 : cq_entry_size_words - size of CQ entry in</div><div class='add'>+	 *    32-bit words, valid values: 4, 8.</div><div class='add'>+	 * 7:5 : reserved7</div><div class='add'>+	 */</div><div class='add'>+	u8 cq_caps_2;</div><div class='add'>+</div><div class='add'>+	/* completion queue depth in # of entries. must be power of 2 */</div><div class='add'>+	u16 cq_depth;</div><div class='add'>+</div><div class='add'>+	/* msix vector assigned to this cq */</div><div class='add'>+	u32 msix_vector;</div><div class='add'>+</div><div class='add'>+	/* cq physical base address in OS memory. CQ must be physically</div><div class='add'>+	 * contiguous</div><div class='add'>+	 */</div><div class='add'>+	struct ena_common_mem_addr cq_ba;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_acq_create_cq_resp_desc {</div><div class='add'>+	struct ena_admin_acq_common_desc acq_common_desc;</div><div class='add'>+</div><div class='add'>+	u16 cq_idx;</div><div class='add'>+</div><div class='add'>+	/* actual cq depth in number of entries */</div><div class='add'>+	u16 cq_actual_depth;</div><div class='add'>+</div><div class='add'>+	u32 numa_node_register_offset;</div><div class='add'>+</div><div class='add'>+	u32 cq_head_db_register_offset;</div><div class='add'>+</div><div class='add'>+	u32 cq_interrupt_unmask_register_offset;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_aq_destroy_cq_cmd {</div><div class='add'>+	struct ena_admin_aq_common_desc aq_common_descriptor;</div><div class='add'>+</div><div class='add'>+	u16 cq_idx;</div><div class='add'>+</div><div class='add'>+	u16 reserved1;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_acq_destroy_cq_resp_desc {</div><div class='add'>+	struct ena_admin_acq_common_desc acq_common_desc;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* ENA AQ Get Statistics command. Extended statistics are placed in control</div><div class='add'>+ * buffer pointed by AQ entry</div><div class='add'>+ */</div><div class='add'>+struct ena_admin_aq_get_stats_cmd {</div><div class='add'>+	struct ena_admin_aq_common_desc aq_common_descriptor;</div><div class='add'>+</div><div class='add'>+	union {</div><div class='add'>+		/* command specific inline data */</div><div class='add'>+		u32 inline_data_w1[3];</div><div class='add'>+</div><div class='add'>+		struct ena_admin_ctrl_buff_info control_buffer;</div><div class='add'>+	} u;</div><div class='add'>+</div><div class='add'>+	/* stats type as defined in enum ena_admin_get_stats_type */</div><div class='add'>+	u8 type;</div><div class='add'>+</div><div class='add'>+	/* stats scope defined in enum ena_admin_get_stats_scope */</div><div class='add'>+	u8 scope;</div><div class='add'>+</div><div class='add'>+	u16 reserved3;</div><div class='add'>+</div><div class='add'>+	/* queue id. used when scope is specific_queue */</div><div class='add'>+	u16 queue_idx;</div><div class='add'>+</div><div class='add'>+	/* device id, value 0xFFFF means mine. only privileged device can get</div><div class='add'>+	 * stats of other device</div><div class='add'>+	 */</div><div class='add'>+	u16 device_id;</div><div class='add'>+</div><div class='add'>+	/* a bitmap representing the requested metric values */</div><div class='add'>+	u64 requested_metrics;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Basic Statistics Command. */</div><div class='add'>+struct ena_admin_basic_stats {</div><div class='add'>+	u32 tx_bytes_low;</div><div class='add'>+</div><div class='add'>+	u32 tx_bytes_high;</div><div class='add'>+</div><div class='add'>+	u32 tx_pkts_low;</div><div class='add'>+</div><div class='add'>+	u32 tx_pkts_high;</div><div class='add'>+</div><div class='add'>+	u32 rx_bytes_low;</div><div class='add'>+</div><div class='add'>+	u32 rx_bytes_high;</div><div class='add'>+</div><div class='add'>+	u32 rx_pkts_low;</div><div class='add'>+</div><div class='add'>+	u32 rx_pkts_high;</div><div class='add'>+</div><div class='add'>+	u32 rx_drops_low;</div><div class='add'>+</div><div class='add'>+	u32 rx_drops_high;</div><div class='add'>+</div><div class='add'>+	u32 tx_drops_low;</div><div class='add'>+</div><div class='add'>+	u32 tx_drops_high;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* ENI Statistics Command. */</div><div class='add'>+struct ena_admin_eni_stats {</div><div class='add'>+	/* The number of packets shaped due to inbound aggregate BW</div><div class='add'>+	 * allowance being exceeded</div><div class='add'>+	 */</div><div class='add'>+	u64 bw_in_allowance_exceeded;</div><div class='add'>+</div><div class='add'>+	/* The number of packets shaped due to outbound aggregate BW</div><div class='add'>+	 * allowance being exceeded</div><div class='add'>+	 */</div><div class='add'>+	u64 bw_out_allowance_exceeded;</div><div class='add'>+</div><div class='add'>+	/* The number of packets shaped due to PPS allowance being exceeded */</div><div class='add'>+	u64 pps_allowance_exceeded;</div><div class='add'>+</div><div class='add'>+	/* The number of packets shaped due to connection tracking</div><div class='add'>+	 * allowance being exceeded and leading to failure in establishment</div><div class='add'>+	 * of new connections</div><div class='add'>+	 */</div><div class='add'>+	u64 conntrack_allowance_exceeded;</div><div class='add'>+</div><div class='add'>+	/* The number of packets shaped due to linklocal packet rate</div><div class='add'>+	 * allowance being exceeded</div><div class='add'>+	 */</div><div class='add'>+	u64 linklocal_allowance_exceeded;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_ena_srd_stats {</div><div class='add'>+	/* Number of packets transmitted over ENA SRD */</div><div class='add'>+	u64 ena_srd_tx_pkts;</div><div class='add'>+</div><div class='add'>+	/* Number of packets transmitted or could have been</div><div class='add'>+	 * transmitted over ENA SRD</div><div class='add'>+	 */</div><div class='add'>+	u64 ena_srd_eligible_tx_pkts;</div><div class='add'>+</div><div class='add'>+	/* Number of packets received over ENA SRD */</div><div class='add'>+	u64 ena_srd_rx_pkts;</div><div class='add'>+</div><div class='add'>+	/* Percentage of the ENA SRD resources that is in use */</div><div class='add'>+	u64 ena_srd_resource_utilization;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* ENA SRD Statistics Command */</div><div class='add'>+struct ena_admin_ena_srd_info {</div><div class='add'>+	/* ENA SRD configuration bitmap. See ena_admin_ena_srd_flags for</div><div class='add'>+	 * details</div><div class='add'>+	 */</div><div class='add'>+	u64 flags;</div><div class='add'>+</div><div class='add'>+	struct ena_admin_ena_srd_stats ena_srd_stats;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Customer Metrics Command. */</div><div class='add'>+struct ena_admin_customer_metrics {</div><div class='add'>+	/* A bitmap representing the reported customer metrics according to</div><div class='add'>+	 * the order they are reported</div><div class='add'>+	 */</div><div class='add'>+	u64 reported_metrics;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_acq_get_stats_resp {</div><div class='add'>+	struct ena_admin_acq_common_desc acq_common_desc;</div><div class='add'>+</div><div class='add'>+	union {</div><div class='add'>+		u64 raw[7];</div><div class='add'>+</div><div class='add'>+		struct ena_admin_basic_stats basic_stats;</div><div class='add'>+</div><div class='add'>+		struct ena_admin_eni_stats eni_stats;</div><div class='add'>+</div><div class='add'>+		struct ena_admin_ena_srd_info ena_srd_info;</div><div class='add'>+</div><div class='add'>+		struct ena_admin_customer_metrics customer_metrics;</div><div class='add'>+	} u;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_get_set_feature_common_desc {</div><div class='add'>+	/* 1:0 : select - 0x1 - current value; 0x3 - default</div><div class='add'>+	 *    value</div><div class='add'>+	 * 7:3 : reserved3</div><div class='add'>+	 */</div><div class='add'>+	u8 flags;</div><div class='add'>+</div><div class='add'>+	/* as appears in ena_admin_aq_feature_id */</div><div class='add'>+	u8 feature_id;</div><div class='add'>+</div><div class='add'>+	/* The driver specifies the max feature version it supports and the</div><div class='add'>+	 * device responds with the currently supported feature version. The</div><div class='add'>+	 * field is zero based</div><div class='add'>+	 */</div><div class='add'>+	u8 feature_version;</div><div class='add'>+</div><div class='add'>+	u8 reserved8;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_device_attr_feature_desc {</div><div class='add'>+	u32 impl_id;</div><div class='add'>+</div><div class='add'>+	u32 device_version;</div><div class='add'>+</div><div class='add'>+	/* bitmap of ena_admin_aq_feature_id, which represents supported</div><div class='add'>+	 * subcommands for the set/get feature admin commands.</div><div class='add'>+	 */</div><div class='add'>+	u32 supported_features;</div><div class='add'>+</div><div class='add'>+	/* bitmap of ena_admin_aq_caps_id, which represents device</div><div class='add'>+	 * capabilities.</div><div class='add'>+	 */</div><div class='add'>+	u32 capabilities;</div><div class='add'>+</div><div class='add'>+	/* Indicates how many bits are used physical address access. */</div><div class='add'>+	u32 phys_addr_width;</div><div class='add'>+</div><div class='add'>+	/* Indicates how many bits are used virtual address access. */</div><div class='add'>+	u32 virt_addr_width;</div><div class='add'>+</div><div class='add'>+	/* unicast MAC address (in Network byte order) */</div><div class='add'>+	u8 mac_addr[6];</div><div class='add'>+</div><div class='add'>+	u8 reserved7[2];</div><div class='add'>+</div><div class='add'>+	u32 max_mtu;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum ena_admin_llq_header_location {</div><div class='add'>+	/* header is in descriptor list */</div><div class='add'>+	ENA_ADMIN_INLINE_HEADER                     = 1,</div><div class='add'>+	/* header in a separate ring, implies 16B descriptor list entry */</div><div class='add'>+	ENA_ADMIN_HEADER_RING                       = 2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum ena_admin_llq_ring_entry_size {</div><div class='add'>+	ENA_ADMIN_LIST_ENTRY_SIZE_128B              = 1,</div><div class='add'>+	ENA_ADMIN_LIST_ENTRY_SIZE_192B              = 2,</div><div class='add'>+	ENA_ADMIN_LIST_ENTRY_SIZE_256B              = 4,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum ena_admin_llq_num_descs_before_header {</div><div class='add'>+	ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_0     = 0,</div><div class='add'>+	ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_1     = 1,</div><div class='add'>+	ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_2     = 2,</div><div class='add'>+	ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_4     = 4,</div><div class='add'>+	ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_8     = 8,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* packet descriptor list entry always starts with one or more descriptors,</div><div class='add'>+ * followed by a header. The rest of the descriptors are located in the</div><div class='add'>+ * beginning of the subsequent entry. Stride refers to how the rest of the</div><div class='add'>+ * descriptors are placed. This field is relevant only for inline header</div><div class='add'>+ * mode</div><div class='add'>+ */</div><div class='add'>+enum ena_admin_llq_stride_ctrl {</div><div class='add'>+	ENA_ADMIN_SINGLE_DESC_PER_ENTRY             = 1,</div><div class='add'>+	ENA_ADMIN_MULTIPLE_DESCS_PER_ENTRY          = 2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum ena_admin_accel_mode_feat {</div><div class='add'>+	ENA_ADMIN_DISABLE_META_CACHING              = 0,</div><div class='add'>+	ENA_ADMIN_LIMIT_TX_BURST                    = 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_accel_mode_get {</div><div class='add'>+	/* bit field of enum ena_admin_accel_mode_feat */</div><div class='add'>+	u16 supported_flags;</div><div class='add'>+</div><div class='add'>+	/* maximum burst size between two doorbells. The size is in bytes */</div><div class='add'>+	u16 max_tx_burst_size;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_accel_mode_set {</div><div class='add'>+	/* bit field of enum ena_admin_accel_mode_feat */</div><div class='add'>+	u16 enabled_flags;</div><div class='add'>+</div><div class='add'>+	u16 reserved;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_accel_mode_req {</div><div class='add'>+	union {</div><div class='add'>+		u32 raw[2];</div><div class='add'>+</div><div class='add'>+		struct ena_admin_accel_mode_get get;</div><div class='add'>+</div><div class='add'>+		struct ena_admin_accel_mode_set set;</div><div class='add'>+	} u;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_feature_llq_desc {</div><div class='add'>+	u32 max_llq_num;</div><div class='add'>+</div><div class='add'>+	u32 max_llq_depth;</div><div class='add'>+</div><div class='add'>+	/* specify the header locations the device supports. bitfield of enum</div><div class='add'>+	 * ena_admin_llq_header_location.</div><div class='add'>+	 */</div><div class='add'>+	u16 header_location_ctrl_supported;</div><div class='add'>+</div><div class='add'>+	/* the header location the driver selected to use. */</div><div class='add'>+	u16 header_location_ctrl_enabled;</div><div class='add'>+</div><div class='add'>+	/* if inline header is specified - this is the size of descriptor list</div><div class='add'>+	 * entry. If header in a separate ring is specified - this is the size</div><div class='add'>+	 * of header ring entry. bitfield of enum ena_admin_llq_ring_entry_size.</div><div class='add'>+	 * specify the entry sizes the device supports</div><div class='add'>+	 */</div><div class='add'>+	u16 entry_size_ctrl_supported;</div><div class='add'>+</div><div class='add'>+	/* the entry size the driver selected to use. */</div><div class='add'>+	u16 entry_size_ctrl_enabled;</div><div class='add'>+</div><div class='add'>+	/* valid only if inline header is specified. First entry associated with</div><div class='add'>+	 * the packet includes descriptors and header. Rest of the entries</div><div class='add'>+	 * occupied by descriptors. This parameter defines the max number of</div><div class='add'>+	 * descriptors precedding the header in the first entry. The field is</div><div class='add'>+	 * bitfield of enum ena_admin_llq_num_descs_before_header and specify</div><div class='add'>+	 * the values the device supports</div><div class='add'>+	 */</div><div class='add'>+	u16 desc_num_before_header_supported;</div><div class='add'>+</div><div class='add'>+	/* the desire field the driver selected to use */</div><div class='add'>+	u16 desc_num_before_header_enabled;</div><div class='add'>+</div><div class='add'>+	/* valid only if inline was chosen. bitfield of enum</div><div class='add'>+	 * ena_admin_llq_stride_ctrl</div><div class='add'>+	 */</div><div class='add'>+	u16 descriptors_stride_ctrl_supported;</div><div class='add'>+</div><div class='add'>+	/* the stride control the driver selected to use */</div><div class='add'>+	u16 descriptors_stride_ctrl_enabled;</div><div class='add'>+</div><div class='add'>+	/* reserved */</div><div class='add'>+	u32 reserved1;</div><div class='add'>+</div><div class='add'>+	/* accelerated low latency queues requirement. driver needs to</div><div class='add'>+	 * support those requirements in order to use accelerated llq</div><div class='add'>+	 */</div><div class='add'>+	struct ena_admin_accel_mode_req accel_mode;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_queue_ext_feature_fields {</div><div class='add'>+	u32 max_tx_sq_num;</div><div class='add'>+</div><div class='add'>+	u32 max_tx_cq_num;</div><div class='add'>+</div><div class='add'>+	u32 max_rx_sq_num;</div><div class='add'>+</div><div class='add'>+	u32 max_rx_cq_num;</div><div class='add'>+</div><div class='add'>+	u32 max_tx_sq_depth;</div><div class='add'>+</div><div class='add'>+	u32 max_tx_cq_depth;</div><div class='add'>+</div><div class='add'>+	u32 max_rx_sq_depth;</div><div class='add'>+</div><div class='add'>+	u32 max_rx_cq_depth;</div><div class='add'>+</div><div class='add'>+	u32 max_tx_header_size;</div><div class='add'>+</div><div class='add'>+	/* Maximum Descriptors number, including meta descriptor, allowed for a</div><div class='add'>+	 * single Tx packet</div><div class='add'>+	 */</div><div class='add'>+	u16 max_per_packet_tx_descs;</div><div class='add'>+</div><div class='add'>+	/* Maximum Descriptors number allowed for a single Rx packet */</div><div class='add'>+	u16 max_per_packet_rx_descs;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_queue_feature_desc {</div><div class='add'>+	u32 max_sq_num;</div><div class='add'>+</div><div class='add'>+	u32 max_sq_depth;</div><div class='add'>+</div><div class='add'>+	u32 max_cq_num;</div><div class='add'>+</div><div class='add'>+	u32 max_cq_depth;</div><div class='add'>+</div><div class='add'>+	u32 max_legacy_llq_num;</div><div class='add'>+</div><div class='add'>+	u32 max_legacy_llq_depth;</div><div class='add'>+</div><div class='add'>+	u32 max_header_size;</div><div class='add'>+</div><div class='add'>+	/* Maximum Descriptors number, including meta descriptor, allowed for a</div><div class='add'>+	 * single Tx packet</div><div class='add'>+	 */</div><div class='add'>+	u16 max_packet_tx_descs;</div><div class='add'>+</div><div class='add'>+	/* Maximum Descriptors number allowed for a single Rx packet */</div><div class='add'>+	u16 max_packet_rx_descs;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_set_feature_mtu_desc {</div><div class='add'>+	/* exclude L2 */</div><div class='add'>+	u32 mtu;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_set_feature_host_attr_desc {</div><div class='add'>+	/* host OS info base address in OS memory. host info is 4KB of</div><div class='add'>+	 * physically contiguous</div><div class='add'>+	 */</div><div class='add'>+	struct ena_common_mem_addr os_info_ba;</div><div class='add'>+</div><div class='add'>+	/* host debug area base address in OS memory. debug area must be</div><div class='add'>+	 * physically contiguous</div><div class='add'>+	 */</div><div class='add'>+	struct ena_common_mem_addr debug_ba;</div><div class='add'>+</div><div class='add'>+	/* debug area size */</div><div class='add'>+	u32 debug_area_size;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_feature_intr_moder_desc {</div><div class='add'>+	/* interrupt delay granularity in usec */</div><div class='add'>+	u16 intr_delay_resolution;</div><div class='add'>+</div><div class='add'>+	u16 reserved;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_get_feature_link_desc {</div><div class='add'>+	/* Link speed in Mb */</div><div class='add'>+	u32 speed;</div><div class='add'>+</div><div class='add'>+	/* bit field of enum ena_admin_link types */</div><div class='add'>+	u32 supported;</div><div class='add'>+</div><div class='add'>+	/* 0 : autoneg</div><div class='add'>+	 * 1 : duplex - Full Duplex</div><div class='add'>+	 * 31:2 : reserved2</div><div class='add'>+	 */</div><div class='add'>+	u32 flags;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_feature_aenq_desc {</div><div class='add'>+	/* bitmask for AENQ groups the device can report */</div><div class='add'>+	u32 supported_groups;</div><div class='add'>+</div><div class='add'>+	/* bitmask for AENQ groups to report */</div><div class='add'>+	u32 enabled_groups;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_feature_offload_desc {</div><div class='add'>+	/* 0 : TX_L3_csum_ipv4</div><div class='add'>+	 * 1 : TX_L4_ipv4_csum_part - The checksum field</div><div class='add'>+	 *    should be initialized with pseudo header checksum</div><div class='add'>+	 * 2 : TX_L4_ipv4_csum_full</div><div class='add'>+	 * 3 : TX_L4_ipv6_csum_part - The checksum field</div><div class='add'>+	 *    should be initialized with pseudo header checksum</div><div class='add'>+	 * 4 : TX_L4_ipv6_csum_full</div><div class='add'>+	 * 5 : tso_ipv4</div><div class='add'>+	 * 6 : tso_ipv6</div><div class='add'>+	 * 7 : tso_ecn</div><div class='add'>+	 */</div><div class='add'>+	u32 tx;</div><div class='add'>+</div><div class='add'>+	/* Receive side supported stateless offload</div><div class='add'>+	 * 0 : RX_L3_csum_ipv4 - IPv4 checksum</div><div class='add'>+	 * 1 : RX_L4_ipv4_csum - TCP/UDP/IPv4 checksum</div><div class='add'>+	 * 2 : RX_L4_ipv6_csum - TCP/UDP/IPv6 checksum</div><div class='add'>+	 * 3 : RX_hash - Hash calculation</div><div class='add'>+	 */</div><div class='add'>+	u32 rx_supported;</div><div class='add'>+</div><div class='add'>+	u32 rx_enabled;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum ena_admin_hash_functions {</div><div class='add'>+	ENA_ADMIN_TOEPLITZ                          = 1,</div><div class='add'>+	ENA_ADMIN_CRC32                             = 2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_feature_rss_flow_hash_control {</div><div class='add'>+	u32 key_parts;</div><div class='add'>+</div><div class='add'>+	u32 reserved;</div><div class='add'>+</div><div class='add'>+	u32 key[ENA_ADMIN_RSS_KEY_PARTS];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_feature_rss_flow_hash_function {</div><div class='add'>+	/* 7:0 : funcs - bitmask of ena_admin_hash_functions */</div><div class='add'>+	u32 supported_func;</div><div class='add'>+</div><div class='add'>+	/* 7:0 : selected_func - bitmask of</div><div class='add'>+	 *    ena_admin_hash_functions</div><div class='add'>+	 */</div><div class='add'>+	u32 selected_func;</div><div class='add'>+</div><div class='add'>+	/* initial value */</div><div class='add'>+	u32 init_val;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* RSS flow hash protocols */</div><div class='add'>+enum ena_admin_flow_hash_proto {</div><div class='add'>+	ENA_ADMIN_RSS_TCP4                          = 0,</div><div class='add'>+	ENA_ADMIN_RSS_UDP4                          = 1,</div><div class='add'>+	ENA_ADMIN_RSS_TCP6                          = 2,</div><div class='add'>+	ENA_ADMIN_RSS_UDP6                          = 3,</div><div class='add'>+	ENA_ADMIN_RSS_IP4                           = 4,</div><div class='add'>+	ENA_ADMIN_RSS_IP6                           = 5,</div><div class='add'>+	ENA_ADMIN_RSS_IP4_FRAG                      = 6,</div><div class='add'>+	ENA_ADMIN_RSS_NOT_IP                        = 7,</div><div class='add'>+	/* TCPv6 with extension header */</div><div class='add'>+	ENA_ADMIN_RSS_TCP6_EX                       = 8,</div><div class='add'>+	/* IPv6 with extension header */</div><div class='add'>+	ENA_ADMIN_RSS_IP6_EX                        = 9,</div><div class='add'>+	ENA_ADMIN_RSS_PROTO_NUM                     = 16,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* RSS flow hash fields */</div><div class='add'>+enum ena_admin_flow_hash_fields {</div><div class='add'>+	/* Ethernet Dest Addr */</div><div class='add'>+	ENA_ADMIN_RSS_L2_DA                         = BIT(0),</div><div class='add'>+	/* Ethernet Src Addr */</div><div class='add'>+	ENA_ADMIN_RSS_L2_SA                         = BIT(1),</div><div class='add'>+	/* ipv4/6 Dest Addr */</div><div class='add'>+	ENA_ADMIN_RSS_L3_DA                         = BIT(2),</div><div class='add'>+	/* ipv4/6 Src Addr */</div><div class='add'>+	ENA_ADMIN_RSS_L3_SA                         = BIT(3),</div><div class='add'>+	/* tcp/udp Dest Port */</div><div class='add'>+	ENA_ADMIN_RSS_L4_DP                         = BIT(4),</div><div class='add'>+	/* tcp/udp Src Port */</div><div class='add'>+	ENA_ADMIN_RSS_L4_SP                         = BIT(5),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_proto_input {</div><div class='add'>+	/* flow hash fields (bitwise according to ena_admin_flow_hash_fields) */</div><div class='add'>+	u16 fields;</div><div class='add'>+</div><div class='add'>+	u16 reserved2;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_feature_rss_hash_control {</div><div class='add'>+	struct ena_admin_proto_input supported_fields[ENA_ADMIN_RSS_PROTO_NUM];</div><div class='add'>+</div><div class='add'>+	struct ena_admin_proto_input selected_fields[ENA_ADMIN_RSS_PROTO_NUM];</div><div class='add'>+</div><div class='add'>+	struct ena_admin_proto_input reserved2[ENA_ADMIN_RSS_PROTO_NUM];</div><div class='add'>+</div><div class='add'>+	struct ena_admin_proto_input reserved3[ENA_ADMIN_RSS_PROTO_NUM];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_feature_rss_flow_hash_input {</div><div class='add'>+	/* supported hash input sorting</div><div class='add'>+	 * 1 : L3_sort - support swap L3 addresses if DA is</div><div class='add'>+	 *    smaller than SA</div><div class='add'>+	 * 2 : L4_sort - support swap L4 ports if DP smaller</div><div class='add'>+	 *    SP</div><div class='add'>+	 */</div><div class='add'>+	u16 supported_input_sort;</div><div class='add'>+</div><div class='add'>+	/* enabled hash input sorting</div><div class='add'>+	 * 1 : enable_L3_sort - enable swap L3 addresses if</div><div class='add'>+	 *    DA smaller than SA</div><div class='add'>+	 * 2 : enable_L4_sort - enable swap L4 ports if DP</div><div class='add'>+	 *    smaller than SP</div><div class='add'>+	 */</div><div class='add'>+	u16 enabled_input_sort;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum ena_admin_os_type {</div><div class='add'>+	ENA_ADMIN_OS_LINUX                          = 1,</div><div class='add'>+	ENA_ADMIN_OS_WIN                            = 2,</div><div class='add'>+	ENA_ADMIN_OS_DPDK                           = 3,</div><div class='add'>+	ENA_ADMIN_OS_FREEBSD                        = 4,</div><div class='add'>+	ENA_ADMIN_OS_IPXE                           = 5,</div><div class='add'>+	ENA_ADMIN_OS_ESXI                           = 6,</div><div class='add'>+	ENA_ADMIN_OS_GROUPS_NUM                     = 6,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_host_info {</div><div class='add'>+	/* defined in enum ena_admin_os_type */</div><div class='add'>+	u32 os_type;</div><div class='add'>+</div><div class='add'>+	/* os distribution string format */</div><div class='add'>+	u8 os_dist_str[128];</div><div class='add'>+</div><div class='add'>+	/* OS distribution numeric format */</div><div class='add'>+	u32 os_dist;</div><div class='add'>+</div><div class='add'>+	/* kernel version string format */</div><div class='add'>+	u8 kernel_ver_str[32];</div><div class='add'>+</div><div class='add'>+	/* Kernel version numeric format */</div><div class='add'>+	u32 kernel_ver;</div><div class='add'>+</div><div class='add'>+	/* 7:0 : major</div><div class='add'>+	 * 15:8 : minor</div><div class='add'>+	 * 23:16 : sub_minor</div><div class='add'>+	 * 31:24 : module_type</div><div class='add'>+	 */</div><div class='add'>+	u32 driver_version;</div><div class='add'>+</div><div class='add'>+	/* features bitmap */</div><div class='add'>+	u32 supported_network_features[2];</div><div class='add'>+</div><div class='add'>+	/* ENA spec version of driver */</div><div class='add'>+	u16 ena_spec_version;</div><div class='add'>+</div><div class='add'>+	/* ENA device's Bus, Device and Function</div><div class='add'>+	 * 2:0 : function</div><div class='add'>+	 * 7:3 : device</div><div class='add'>+	 * 15:8 : bus</div><div class='add'>+	 */</div><div class='add'>+	u16 bdf;</div><div class='add'>+</div><div class='add'>+	/* Number of CPUs */</div><div class='add'>+	u16 num_cpus;</div><div class='add'>+</div><div class='add'>+	u16 reserved;</div><div class='add'>+</div><div class='add'>+	/* 0 : reserved</div><div class='add'>+	 * 1 : rx_offset</div><div class='add'>+	 * 2 : interrupt_moderation</div><div class='add'>+	 * 3 : rx_buf_mirroring</div><div class='add'>+	 * 4 : rss_configurable_function_key</div><div class='add'>+	 * 5 : reserved</div><div class='add'>+	 * 6 : rx_page_reuse</div><div class='add'>+	 * 7 : reserved</div><div class='add'>+	 * 8 : phc</div><div class='add'>+	 * 31:9 : reserved</div><div class='add'>+	 */</div><div class='add'>+	u32 driver_supported_features;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_rss_ind_table_entry {</div><div class='add'>+	u16 cq_idx;</div><div class='add'>+</div><div class='add'>+	u16 reserved;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_feature_rss_ind_table {</div><div class='add'>+	/* min supported table size (2^min_size) */</div><div class='add'>+	u16 min_size;</div><div class='add'>+</div><div class='add'>+	/* max supported table size (2^max_size) */</div><div class='add'>+	u16 max_size;</div><div class='add'>+</div><div class='add'>+	/* table size (2^size) */</div><div class='add'>+	u16 size;</div><div class='add'>+</div><div class='add'>+	u16 reserved;</div><div class='add'>+</div><div class='add'>+	/* index of the inline entry. 0xFFFFFFFF means invalid */</div><div class='add'>+	u32 inline_index;</div><div class='add'>+</div><div class='add'>+	/* used for updating single entry, ignored when setting the entire</div><div class='add'>+	 * table through the control buffer.</div><div class='add'>+	 */</div><div class='add'>+	struct ena_admin_rss_ind_table_entry inline_entry;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* When hint value is 0, driver should use its own predefined value */</div><div class='add'>+struct ena_admin_ena_hw_hints {</div><div class='add'>+	/* value in ms */</div><div class='add'>+	u16 mmio_read_timeout;</div><div class='add'>+</div><div class='add'>+	/* value in ms */</div><div class='add'>+	u16 driver_watchdog_timeout;</div><div class='add'>+</div><div class='add'>+	/* Per packet tx completion timeout. value in ms */</div><div class='add'>+	u16 missing_tx_completion_timeout;</div><div class='add'>+</div><div class='add'>+	u16 missed_tx_completion_count_threshold_to_reset;</div><div class='add'>+</div><div class='add'>+	/* value in ms */</div><div class='add'>+	u16 admin_completion_tx_timeout;</div><div class='add'>+</div><div class='add'>+	u16 netdev_wd_timeout;</div><div class='add'>+</div><div class='add'>+	u16 max_tx_sgl_size;</div><div class='add'>+</div><div class='add'>+	u16 max_rx_sgl_size;</div><div class='add'>+</div><div class='add'>+	u16 reserved[8];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_get_feat_cmd {</div><div class='add'>+	struct ena_admin_aq_common_desc aq_common_descriptor;</div><div class='add'>+</div><div class='add'>+	struct ena_admin_ctrl_buff_info control_buffer;</div><div class='add'>+</div><div class='add'>+	struct ena_admin_get_set_feature_common_desc feat_common;</div><div class='add'>+</div><div class='add'>+	u32 raw[11];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_queue_ext_feature_desc {</div><div class='add'>+	/* version */</div><div class='add'>+	u8 version;</div><div class='add'>+</div><div class='add'>+	u8 reserved1[3];</div><div class='add'>+</div><div class='add'>+	union {</div><div class='add'>+		struct ena_admin_queue_ext_feature_fields max_queue_ext;</div><div class='add'>+</div><div class='add'>+		u32 raw[10];</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_feature_phc_desc {</div><div class='add'>+	/* PHC type as defined in enum ena_admin_get_phc_type,</div><div class='add'>+	 * used only for GET command.</div><div class='add'>+	 */</div><div class='add'>+	u8 type;</div><div class='add'>+</div><div class='add'>+	/* Reserved - MBZ */</div><div class='add'>+	u8 reserved1[3];</div><div class='add'>+</div><div class='add'>+	/* PHC doorbell address as an offset to PCIe MMIO REG BAR,</div><div class='add'>+	 * used only for GET command.</div><div class='add'>+	 */</div><div class='add'>+	u32 doorbell_offset;</div><div class='add'>+</div><div class='add'>+	/* Max time for valid PHC retrieval, passing this threshold will</div><div class='add'>+	 * fail the get-time request and block PHC requests for</div><div class='add'>+	 * block_timeout_usec, used only for GET command.</div><div class='add'>+	 */</div><div class='add'>+	u32 expire_timeout_usec;</div><div class='add'>+</div><div class='add'>+	/* PHC requests block period, blocking starts if PHC request expired</div><div class='add'>+	 * in order to prevent floods on busy device,</div><div class='add'>+	 * used only for GET command.</div><div class='add'>+	 */</div><div class='add'>+	u32 block_timeout_usec;</div><div class='add'>+</div><div class='add'>+	/* Shared PHC physical address (ena_admin_phc_resp),</div><div class='add'>+	 * used only for SET command.</div><div class='add'>+	 */</div><div class='add'>+	struct ena_common_mem_addr output_address;</div><div class='add'>+</div><div class='add'>+	/* Shared PHC Size (ena_admin_phc_resp),</div><div class='add'>+	 * used only for SET command.</div><div class='add'>+	 */</div><div class='add'>+	u32 output_length;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_get_feat_resp {</div><div class='add'>+	struct ena_admin_acq_common_desc acq_common_desc;</div><div class='add'>+</div><div class='add'>+	union {</div><div class='add'>+		u32 raw[14];</div><div class='add'>+</div><div class='add'>+		struct ena_admin_device_attr_feature_desc dev_attr;</div><div class='add'>+</div><div class='add'>+		struct ena_admin_feature_llq_desc llq;</div><div class='add'>+</div><div class='add'>+		struct ena_admin_queue_feature_desc max_queue;</div><div class='add'>+</div><div class='add'>+		struct ena_admin_queue_ext_feature_desc max_queue_ext;</div><div class='add'>+</div><div class='add'>+		struct ena_admin_feature_aenq_desc aenq;</div><div class='add'>+</div><div class='add'>+		struct ena_admin_get_feature_link_desc link;</div><div class='add'>+</div><div class='add'>+		struct ena_admin_feature_offload_desc offload;</div><div class='add'>+</div><div class='add'>+		struct ena_admin_feature_rss_flow_hash_function flow_hash_func;</div><div class='add'>+</div><div class='add'>+		struct ena_admin_feature_rss_flow_hash_input flow_hash_input;</div><div class='add'>+</div><div class='add'>+		struct ena_admin_feature_rss_ind_table ind_table;</div><div class='add'>+</div><div class='add'>+		struct ena_admin_feature_intr_moder_desc intr_moderation;</div><div class='add'>+</div><div class='add'>+		struct ena_admin_ena_hw_hints hw_hints;</div><div class='add'>+</div><div class='add'>+		struct ena_admin_feature_phc_desc phc;</div><div class='add'>+	} u;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_set_feat_cmd {</div><div class='add'>+	struct ena_admin_aq_common_desc aq_common_descriptor;</div><div class='add'>+</div><div class='add'>+	struct ena_admin_ctrl_buff_info control_buffer;</div><div class='add'>+</div><div class='add'>+	struct ena_admin_get_set_feature_common_desc feat_common;</div><div class='add'>+</div><div class='add'>+	union {</div><div class='add'>+		u32 raw[11];</div><div class='add'>+</div><div class='add'>+		/* mtu size */</div><div class='add'>+		struct ena_admin_set_feature_mtu_desc mtu;</div><div class='add'>+</div><div class='add'>+		/* host attributes */</div><div class='add'>+		struct ena_admin_set_feature_host_attr_desc host_attr;</div><div class='add'>+</div><div class='add'>+		/* AENQ configuration */</div><div class='add'>+		struct ena_admin_feature_aenq_desc aenq;</div><div class='add'>+</div><div class='add'>+		/* rss flow hash function */</div><div class='add'>+		struct ena_admin_feature_rss_flow_hash_function flow_hash_func;</div><div class='add'>+</div><div class='add'>+		/* rss flow hash input */</div><div class='add'>+		struct ena_admin_feature_rss_flow_hash_input flow_hash_input;</div><div class='add'>+</div><div class='add'>+		/* rss indirection table */</div><div class='add'>+		struct ena_admin_feature_rss_ind_table ind_table;</div><div class='add'>+</div><div class='add'>+		/* LLQ configuration */</div><div class='add'>+		struct ena_admin_feature_llq_desc llq;</div><div class='add'>+</div><div class='add'>+		/* PHC configuration */</div><div class='add'>+		struct ena_admin_feature_phc_desc phc;</div><div class='add'>+	} u;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_set_feat_resp {</div><div class='add'>+	struct ena_admin_acq_common_desc acq_common_desc;</div><div class='add'>+</div><div class='add'>+	union {</div><div class='add'>+		u32 raw[14];</div><div class='add'>+	} u;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_aenq_common_desc {</div><div class='add'>+	u16 group;</div><div class='add'>+</div><div class='add'>+	u16 syndrome;</div><div class='add'>+</div><div class='add'>+	/* 0 : phase</div><div class='add'>+	 * 7:1 : reserved - MBZ</div><div class='add'>+	 */</div><div class='add'>+	u8 flags;</div><div class='add'>+</div><div class='add'>+	u8 reserved1[3];</div><div class='add'>+</div><div class='add'>+	u32 timestamp_low;</div><div class='add'>+</div><div class='add'>+	u32 timestamp_high;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* asynchronous event notification groups */</div><div class='add'>+enum ena_admin_aenq_group {</div><div class='add'>+	ENA_ADMIN_LINK_CHANGE                       = 0,</div><div class='add'>+	ENA_ADMIN_FATAL_ERROR                       = 1,</div><div class='add'>+	ENA_ADMIN_WARNING                           = 2,</div><div class='add'>+	ENA_ADMIN_NOTIFICATION                      = 3,</div><div class='add'>+	ENA_ADMIN_KEEP_ALIVE                        = 4,</div><div class='add'>+	ENA_ADMIN_AENQ_GROUPS_NUM                   = 5,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum ena_admin_aenq_notification_syndrome {</div><div class='add'>+	ENA_ADMIN_UPDATE_HINTS                      = 2,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_aenq_entry {</div><div class='add'>+	struct ena_admin_aenq_common_desc aenq_common_desc;</div><div class='add'>+</div><div class='add'>+	/* command specific inline data */</div><div class='add'>+	u32 inline_data_w4[12];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_aenq_link_change_desc {</div><div class='add'>+	struct ena_admin_aenq_common_desc aenq_common_desc;</div><div class='add'>+</div><div class='add'>+	/* 0 : link_status */</div><div class='add'>+	u32 flags;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_aenq_keep_alive_desc {</div><div class='add'>+	struct ena_admin_aenq_common_desc aenq_common_desc;</div><div class='add'>+</div><div class='add'>+	u32 rx_drops_low;</div><div class='add'>+</div><div class='add'>+	u32 rx_drops_high;</div><div class='add'>+</div><div class='add'>+	u32 tx_drops_low;</div><div class='add'>+</div><div class='add'>+	u32 tx_drops_high;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_ena_mmio_req_read_less_resp {</div><div class='add'>+	u16 req_id;</div><div class='add'>+</div><div class='add'>+	u16 reg_off;</div><div class='add'>+</div><div class='add'>+	/* value is valid when poll is cleared */</div><div class='add'>+	u32 reg_val;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_admin_phc_resp {</div><div class='add'>+	/* Request Id, received from DB register */</div><div class='add'>+	u16 req_id;</div><div class='add'>+</div><div class='add'>+	u8 reserved1[6];</div><div class='add'>+</div><div class='add'>+	/* PHC timestamp (nsec) */</div><div class='add'>+	u64 timestamp;</div><div class='add'>+</div><div class='add'>+	u8 reserved2[12];</div><div class='add'>+</div><div class='add'>+	/* Bit field of enum ena_admin_phc_error_flags */</div><div class='add'>+	u32 error_flags;</div><div class='add'>+</div><div class='add'>+	u8 reserved3[32];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* aq_common_desc */</div><div class='add'>+#define ENA_ADMIN_AQ_COMMON_DESC_COMMAND_ID_MASK            GENMASK(11, 0)</div><div class='add'>+#define ENA_ADMIN_AQ_COMMON_DESC_PHASE_MASK                 BIT(0)</div><div class='add'>+#define ENA_ADMIN_AQ_COMMON_DESC_CTRL_DATA_SHIFT            1</div><div class='add'>+#define ENA_ADMIN_AQ_COMMON_DESC_CTRL_DATA_MASK             BIT(1)</div><div class='add'>+#define ENA_ADMIN_AQ_COMMON_DESC_CTRL_DATA_INDIRECT_SHIFT   2</div><div class='add'>+#define ENA_ADMIN_AQ_COMMON_DESC_CTRL_DATA_INDIRECT_MASK    BIT(2)</div><div class='add'>+</div><div class='add'>+/* sq */</div><div class='add'>+#define ENA_ADMIN_SQ_SQ_DIRECTION_SHIFT                     5</div><div class='add'>+#define ENA_ADMIN_SQ_SQ_DIRECTION_MASK                      GENMASK(7, 5)</div><div class='add'>+</div><div class='add'>+/* acq_common_desc */</div><div class='add'>+#define ENA_ADMIN_ACQ_COMMON_DESC_COMMAND_ID_MASK           GENMASK(11, 0)</div><div class='add'>+#define ENA_ADMIN_ACQ_COMMON_DESC_PHASE_MASK                BIT(0)</div><div class='add'>+</div><div class='add'>+/* aq_create_sq_cmd */</div><div class='add'>+#define ENA_ADMIN_AQ_CREATE_SQ_CMD_SQ_DIRECTION_SHIFT       5</div><div class='add'>+#define ENA_ADMIN_AQ_CREATE_SQ_CMD_SQ_DIRECTION_MASK        GENMASK(7, 5)</div><div class='add'>+#define ENA_ADMIN_AQ_CREATE_SQ_CMD_PLACEMENT_POLICY_MASK    GENMASK(3, 0)</div><div class='add'>+#define ENA_ADMIN_AQ_CREATE_SQ_CMD_COMPLETION_POLICY_SHIFT  4</div><div class='add'>+#define ENA_ADMIN_AQ_CREATE_SQ_CMD_COMPLETION_POLICY_MASK   GENMASK(6, 4)</div><div class='add'>+#define ENA_ADMIN_AQ_CREATE_SQ_CMD_IS_PHYSICALLY_CONTIGUOUS_MASK BIT(0)</div><div class='add'>+</div><div class='add'>+/* aq_create_cq_cmd */</div><div class='add'>+#define ENA_ADMIN_AQ_CREATE_CQ_CMD_INTERRUPT_MODE_ENABLED_SHIFT 5</div><div class='add'>+#define ENA_ADMIN_AQ_CREATE_CQ_CMD_INTERRUPT_MODE_ENABLED_MASK BIT(5)</div><div class='add'>+#define ENA_ADMIN_AQ_CREATE_CQ_CMD_CQ_ENTRY_SIZE_WORDS_MASK GENMASK(4, 0)</div><div class='add'>+</div><div class='add'>+/* get_set_feature_common_desc */</div><div class='add'>+#define ENA_ADMIN_GET_SET_FEATURE_COMMON_DESC_SELECT_MASK   GENMASK(1, 0)</div><div class='add'>+</div><div class='add'>+/* get_feature_link_desc */</div><div class='add'>+#define ENA_ADMIN_GET_FEATURE_LINK_DESC_AUTONEG_MASK        BIT(0)</div><div class='add'>+#define ENA_ADMIN_GET_FEATURE_LINK_DESC_DUPLEX_SHIFT        1</div><div class='add'>+#define ENA_ADMIN_GET_FEATURE_LINK_DESC_DUPLEX_MASK         BIT(1)</div><div class='add'>+</div><div class='add'>+/* feature_offload_desc */</div><div class='add'>+#define ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L3_CSUM_IPV4_MASK BIT(0)</div><div class='add'>+#define ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_SHIFT 1</div><div class='add'>+#define ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK BIT(1)</div><div class='add'>+#define ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_FULL_SHIFT 2</div><div class='add'>+#define ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_FULL_MASK BIT(2)</div><div class='add'>+#define ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_SHIFT 3</div><div class='add'>+#define ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_MASK BIT(3)</div><div class='add'>+#define ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_FULL_SHIFT 4</div><div class='add'>+#define ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_FULL_MASK BIT(4)</div><div class='add'>+#define ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_SHIFT       5</div><div class='add'>+#define ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_MASK        BIT(5)</div><div class='add'>+#define ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_SHIFT       6</div><div class='add'>+#define ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_MASK        BIT(6)</div><div class='add'>+#define ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_ECN_SHIFT        7</div><div class='add'>+#define ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_ECN_MASK         BIT(7)</div><div class='add'>+#define ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L3_CSUM_IPV4_MASK BIT(0)</div><div class='add'>+#define ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_SHIFT 1</div><div class='add'>+#define ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_MASK BIT(1)</div><div class='add'>+#define ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_SHIFT 2</div><div class='add'>+#define ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_MASK BIT(2)</div><div class='add'>+#define ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_HASH_SHIFT        3</div><div class='add'>+#define ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_HASH_MASK         BIT(3)</div><div class='add'>+</div><div class='add'>+/* feature_rss_flow_hash_function */</div><div class='add'>+#define ENA_ADMIN_FEATURE_RSS_FLOW_HASH_FUNCTION_FUNCS_MASK GENMASK(7, 0)</div><div class='add'>+#define ENA_ADMIN_FEATURE_RSS_FLOW_HASH_FUNCTION_SELECTED_FUNC_MASK GENMASK(7, 0)</div><div class='add'>+</div><div class='add'>+/* feature_rss_flow_hash_input */</div><div class='add'>+#define ENA_ADMIN_FEATURE_RSS_FLOW_HASH_INPUT_L3_SORT_SHIFT 1</div><div class='add'>+#define ENA_ADMIN_FEATURE_RSS_FLOW_HASH_INPUT_L3_SORT_MASK  BIT(1)</div><div class='add'>+#define ENA_ADMIN_FEATURE_RSS_FLOW_HASH_INPUT_L4_SORT_SHIFT 2</div><div class='add'>+#define ENA_ADMIN_FEATURE_RSS_FLOW_HASH_INPUT_L4_SORT_MASK  BIT(2)</div><div class='add'>+#define ENA_ADMIN_FEATURE_RSS_FLOW_HASH_INPUT_ENABLE_L3_SORT_SHIFT 1</div><div class='add'>+#define ENA_ADMIN_FEATURE_RSS_FLOW_HASH_INPUT_ENABLE_L3_SORT_MASK BIT(1)</div><div class='add'>+#define ENA_ADMIN_FEATURE_RSS_FLOW_HASH_INPUT_ENABLE_L4_SORT_SHIFT 2</div><div class='add'>+#define ENA_ADMIN_FEATURE_RSS_FLOW_HASH_INPUT_ENABLE_L4_SORT_MASK BIT(2)</div><div class='add'>+</div><div class='add'>+/* host_info */</div><div class='add'>+#define ENA_ADMIN_HOST_INFO_MAJOR_MASK                      GENMASK(7, 0)</div><div class='add'>+#define ENA_ADMIN_HOST_INFO_MINOR_SHIFT                     8</div><div class='add'>+#define ENA_ADMIN_HOST_INFO_MINOR_MASK                      GENMASK(15, 8)</div><div class='add'>+#define ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT                 16</div><div class='add'>+#define ENA_ADMIN_HOST_INFO_SUB_MINOR_MASK                  GENMASK(23, 16)</div><div class='add'>+#define ENA_ADMIN_HOST_INFO_MODULE_TYPE_SHIFT               24</div><div class='add'>+#define ENA_ADMIN_HOST_INFO_MODULE_TYPE_MASK                GENMASK(31, 24)</div><div class='add'>+#define ENA_ADMIN_HOST_INFO_FUNCTION_MASK                   GENMASK(2, 0)</div><div class='add'>+#define ENA_ADMIN_HOST_INFO_DEVICE_SHIFT                    3</div><div class='add'>+#define ENA_ADMIN_HOST_INFO_DEVICE_MASK                     GENMASK(7, 3)</div><div class='add'>+#define ENA_ADMIN_HOST_INFO_BUS_SHIFT                       8</div><div class='add'>+#define ENA_ADMIN_HOST_INFO_BUS_MASK                        GENMASK(15, 8)</div><div class='add'>+#define ENA_ADMIN_HOST_INFO_RX_OFFSET_SHIFT                 1</div><div class='add'>+#define ENA_ADMIN_HOST_INFO_RX_OFFSET_MASK                  BIT(1)</div><div class='add'>+#define ENA_ADMIN_HOST_INFO_INTERRUPT_MODERATION_SHIFT      2</div><div class='add'>+#define ENA_ADMIN_HOST_INFO_INTERRUPT_MODERATION_MASK       BIT(2)</div><div class='add'>+#define ENA_ADMIN_HOST_INFO_RX_BUF_MIRRORING_SHIFT          3</div><div class='add'>+#define ENA_ADMIN_HOST_INFO_RX_BUF_MIRRORING_MASK           BIT(3)</div><div class='add'>+#define ENA_ADMIN_HOST_INFO_RSS_CONFIGURABLE_FUNCTION_KEY_SHIFT 4</div><div class='add'>+#define ENA_ADMIN_HOST_INFO_RSS_CONFIGURABLE_FUNCTION_KEY_MASK BIT(4)</div><div class='add'>+#define ENA_ADMIN_HOST_INFO_RX_PAGE_REUSE_SHIFT             6</div><div class='add'>+#define ENA_ADMIN_HOST_INFO_RX_PAGE_REUSE_MASK              BIT(6)</div><div class='add'>+#define ENA_ADMIN_HOST_INFO_PHC_SHIFT                       8</div><div class='add'>+#define ENA_ADMIN_HOST_INFO_PHC_MASK                        BIT(8)</div><div class='add'>+</div><div class='add'>+/* aenq_common_desc */</div><div class='add'>+#define ENA_ADMIN_AENQ_COMMON_DESC_PHASE_MASK               BIT(0)</div><div class='add'>+</div><div class='add'>+/* aenq_link_change_desc */</div><div class='add'>+#define ENA_ADMIN_AENQ_LINK_CHANGE_DESC_LINK_STATUS_MASK    BIT(0)</div><div class='add'>+</div><div class='add'>+#endif /* _ENA_ADMIN_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/amazon/ena/ena_com.c b/drivers/net/ethernet/amazon/ena/ena_com.c<br/>new file mode 100644<br/>index 000000000000..e67b592e5697<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_com.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amazon/ena/ena_com.c</a></div><div class='hunk'>@@ -0,0 +1,3231 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015-2020 Amazon.com, Inc. or its affiliates. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "ena_com.h"</div><div class='add'>+</div><div class='add'>+/*****************************************************************************/</div><div class='add'>+/*****************************************************************************/</div><div class='add'>+</div><div class='add'>+/* Timeout in micro-sec */</div><div class='add'>+#define ADMIN_CMD_TIMEOUT_US (3000000)</div><div class='add'>+</div><div class='add'>+#define ENA_ASYNC_QUEUE_DEPTH 16</div><div class='add'>+#define ENA_ADMIN_QUEUE_DEPTH 32</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+#define ENA_CTRL_MAJOR		0</div><div class='add'>+#define ENA_CTRL_MINOR		0</div><div class='add'>+#define ENA_CTRL_SUB_MINOR	1</div><div class='add'>+</div><div class='add'>+#define MIN_ENA_CTRL_VER \</div><div class='add'>+	(((ENA_CTRL_MAJOR) &lt;&lt; \</div><div class='add'>+	(ENA_REGS_CONTROLLER_VERSION_MAJOR_VERSION_SHIFT)) | \</div><div class='add'>+	((ENA_CTRL_MINOR) &lt;&lt; \</div><div class='add'>+	(ENA_REGS_CONTROLLER_VERSION_MINOR_VERSION_SHIFT)) | \</div><div class='add'>+	(ENA_CTRL_SUB_MINOR))</div><div class='add'>+</div><div class='add'>+#define ENA_DMA_ADDR_TO_UINT32_LOW(x)	((u32)((u64)(x)))</div><div class='add'>+#define ENA_DMA_ADDR_TO_UINT32_HIGH(x)	((u32)(((u64)(x)) &gt;&gt; 32))</div><div class='add'>+</div><div class='add'>+#define ENA_MMIO_READ_TIMEOUT 0xFFFFFFFF</div><div class='add'>+</div><div class='add'>+#define ENA_COM_BOUNCE_BUFFER_CNTRL_CNT	4</div><div class='add'>+</div><div class='add'>+#define ENA_REGS_ADMIN_INTR_MASK 1</div><div class='add'>+</div><div class='add'>+#define ENA_MAX_BACKOFF_DELAY_EXP 16U</div><div class='add'>+</div><div class='add'>+#define ENA_MIN_ADMIN_POLL_US 100</div><div class='add'>+</div><div class='add'>+#define ENA_MAX_ADMIN_POLL_US 5000</div><div class='add'>+</div><div class='add'>+/* PHC definitions */</div><div class='add'>+#define ENA_PHC_DEFAULT_EXPIRE_TIMEOUT_USEC 10</div><div class='add'>+#define ENA_PHC_DEFAULT_BLOCK_TIMEOUT_USEC 1000</div><div class='add'>+#define ENA_PHC_REQ_ID_OFFSET 0xDEAD</div><div class='add'>+#define ENA_PHC_ERROR_FLAGS (ENA_ADMIN_PHC_ERROR_FLAG_TIMESTAMP)</div><div class='add'>+</div><div class='add'>+/*****************************************************************************/</div><div class='add'>+/*****************************************************************************/</div><div class='add'>+/*****************************************************************************/</div><div class='add'>+</div><div class='add'>+enum ena_cmd_status {</div><div class='add'>+	ENA_CMD_SUBMITTED,</div><div class='add'>+	ENA_CMD_COMPLETED,</div><div class='add'>+	/* Abort - canceled by the driver */</div><div class='add'>+	ENA_CMD_ABORTED,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_comp_ctx {</div><div class='add'>+	struct completion wait_event;</div><div class='add'>+	struct ena_admin_acq_entry *user_cqe;</div><div class='add'>+	u32 comp_size;</div><div class='add'>+	enum ena_cmd_status status;</div><div class='add'>+	/* status from the device */</div><div class='add'>+	u8 comp_status;</div><div class='add'>+	u8 cmd_opcode;</div><div class='add'>+	bool occupied;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_com_stats_ctx {</div><div class='add'>+	struct ena_admin_aq_get_stats_cmd get_cmd;</div><div class='add'>+	struct ena_admin_acq_get_stats_resp get_resp;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int ena_com_mem_addr_set(struct ena_com_dev *ena_dev,</div><div class='add'>+				       struct ena_common_mem_addr *ena_addr,</div><div class='add'>+				       dma_addr_t addr)</div><div class='add'>+{</div><div class='add'>+	if ((addr &amp; GENMASK_ULL(ena_dev-&gt;dma_addr_bits - 1, 0)) != addr) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device,</div><div class='add'>+			   "DMA address has more bits that the device supports\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ena_addr-&gt;mem_addr_low = lower_32_bits(addr);</div><div class='add'>+	ena_addr-&gt;mem_addr_high = (u16)upper_32_bits(addr);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_com_admin_init_sq(struct ena_com_admin_queue *admin_queue)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_dev *ena_dev = admin_queue-&gt;ena_dev;</div><div class='add'>+	struct ena_com_admin_sq *sq = &amp;admin_queue-&gt;sq;</div><div class='add'>+	u16 size = ADMIN_SQ_SIZE(admin_queue-&gt;q_depth);</div><div class='add'>+</div><div class='add'>+	sq-&gt;entries = dma_alloc_coherent(admin_queue-&gt;q_dmadev, size, &amp;sq-&gt;dma_addr, GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	if (!sq-&gt;entries) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Memory allocation failed\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sq-&gt;head = 0;</div><div class='add'>+	sq-&gt;tail = 0;</div><div class='add'>+	sq-&gt;phase = 1;</div><div class='add'>+</div><div class='add'>+	sq-&gt;db_addr = NULL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_com_admin_init_cq(struct ena_com_admin_queue *admin_queue)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_dev *ena_dev = admin_queue-&gt;ena_dev;</div><div class='add'>+	struct ena_com_admin_cq *cq = &amp;admin_queue-&gt;cq;</div><div class='add'>+	u16 size = ADMIN_CQ_SIZE(admin_queue-&gt;q_depth);</div><div class='add'>+</div><div class='add'>+	cq-&gt;entries = dma_alloc_coherent(admin_queue-&gt;q_dmadev, size, &amp;cq-&gt;dma_addr, GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	if (!cq-&gt;entries) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Memory allocation failed\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cq-&gt;head = 0;</div><div class='add'>+	cq-&gt;phase = 1;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_com_admin_init_aenq(struct ena_com_dev *ena_dev,</div><div class='add'>+				   struct ena_aenq_handlers *aenq_handlers)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_aenq *aenq = &amp;ena_dev-&gt;aenq;</div><div class='add'>+	u32 addr_low, addr_high, aenq_caps;</div><div class='add'>+	u16 size;</div><div class='add'>+</div><div class='add'>+	ena_dev-&gt;aenq.q_depth = ENA_ASYNC_QUEUE_DEPTH;</div><div class='add'>+	size = ADMIN_AENQ_SIZE(ENA_ASYNC_QUEUE_DEPTH);</div><div class='add'>+	aenq-&gt;entries = dma_alloc_coherent(ena_dev-&gt;dmadev, size, &amp;aenq-&gt;dma_addr, GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	if (!aenq-&gt;entries) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Memory allocation failed\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	aenq-&gt;head = aenq-&gt;q_depth;</div><div class='add'>+	aenq-&gt;phase = 1;</div><div class='add'>+</div><div class='add'>+	addr_low = ENA_DMA_ADDR_TO_UINT32_LOW(aenq-&gt;dma_addr);</div><div class='add'>+	addr_high = ENA_DMA_ADDR_TO_UINT32_HIGH(aenq-&gt;dma_addr);</div><div class='add'>+</div><div class='add'>+	writel(addr_low, ena_dev-&gt;reg_bar + ENA_REGS_AENQ_BASE_LO_OFF);</div><div class='add'>+	writel(addr_high, ena_dev-&gt;reg_bar + ENA_REGS_AENQ_BASE_HI_OFF);</div><div class='add'>+</div><div class='add'>+	aenq_caps = 0;</div><div class='add'>+	aenq_caps |= ena_dev-&gt;aenq.q_depth &amp; ENA_REGS_AENQ_CAPS_AENQ_DEPTH_MASK;</div><div class='add'>+	aenq_caps |=</div><div class='add'>+		(sizeof(struct ena_admin_aenq_entry) &lt;&lt; ENA_REGS_AENQ_CAPS_AENQ_ENTRY_SIZE_SHIFT) &amp;</div><div class='add'>+		ENA_REGS_AENQ_CAPS_AENQ_ENTRY_SIZE_MASK;</div><div class='add'>+	writel(aenq_caps, ena_dev-&gt;reg_bar + ENA_REGS_AENQ_CAPS_OFF);</div><div class='add'>+</div><div class='add'>+	if (unlikely(!aenq_handlers)) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "AENQ handlers pointer is NULL\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	aenq-&gt;aenq_handlers = aenq_handlers;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void comp_ctxt_release(struct ena_com_admin_queue *queue,</div><div class='add'>+				     struct ena_comp_ctx *comp_ctx)</div><div class='add'>+{</div><div class='add'>+	comp_ctx-&gt;occupied = false;</div><div class='add'>+	atomic_dec(&amp;queue-&gt;outstanding_cmds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct ena_comp_ctx *get_comp_ctxt(struct ena_com_admin_queue *admin_queue,</div><div class='add'>+					  u16 command_id, bool capture)</div><div class='add'>+{</div><div class='add'>+	if (unlikely(command_id &gt;= admin_queue-&gt;q_depth)) {</div><div class='add'>+		netdev_err(admin_queue-&gt;ena_dev-&gt;net_device,</div><div class='add'>+			   "Command id is larger than the queue size. cmd_id: %u queue size %d\n",</div><div class='add'>+			   command_id, admin_queue-&gt;q_depth);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (unlikely(!admin_queue-&gt;comp_ctx)) {</div><div class='add'>+		netdev_err(admin_queue-&gt;ena_dev-&gt;net_device, "Completion context is NULL\n");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (unlikely(admin_queue-&gt;comp_ctx[command_id].occupied &amp;&amp; capture)) {</div><div class='add'>+		netdev_err(admin_queue-&gt;ena_dev-&gt;net_device, "Completion context is occupied\n");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (capture) {</div><div class='add'>+		atomic_inc(&amp;admin_queue-&gt;outstanding_cmds);</div><div class='add'>+		admin_queue-&gt;comp_ctx[command_id].occupied = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return &amp;admin_queue-&gt;comp_ctx[command_id];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct ena_comp_ctx *__ena_com_submit_admin_cmd(struct ena_com_admin_queue *admin_queue,</div><div class='add'>+						       struct ena_admin_aq_entry *cmd,</div><div class='add'>+						       size_t cmd_size_in_bytes,</div><div class='add'>+						       struct ena_admin_acq_entry *comp,</div><div class='add'>+						       size_t comp_size_in_bytes)</div><div class='add'>+{</div><div class='add'>+	struct ena_comp_ctx *comp_ctx;</div><div class='add'>+	u16 tail_masked, cmd_id;</div><div class='add'>+	u16 queue_size_mask;</div><div class='add'>+	u16 cnt;</div><div class='add'>+</div><div class='add'>+	queue_size_mask = admin_queue-&gt;q_depth - 1;</div><div class='add'>+</div><div class='add'>+	tail_masked = admin_queue-&gt;sq.tail &amp; queue_size_mask;</div><div class='add'>+</div><div class='add'>+	/* In case of queue FULL */</div><div class='add'>+	cnt = (u16)atomic_read(&amp;admin_queue-&gt;outstanding_cmds);</div><div class='add'>+	if (cnt &gt;= admin_queue-&gt;q_depth) {</div><div class='add'>+		netdev_dbg(admin_queue-&gt;ena_dev-&gt;net_device, "Admin queue is full.\n");</div><div class='add'>+		admin_queue-&gt;stats.out_of_space++;</div><div class='add'>+		return ERR_PTR(-ENOSPC);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cmd_id = admin_queue-&gt;curr_cmd_id;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;aq_common_descriptor.flags |= admin_queue-&gt;sq.phase &amp;</div><div class='add'>+		ENA_ADMIN_AQ_COMMON_DESC_PHASE_MASK;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;aq_common_descriptor.command_id |= cmd_id &amp;</div><div class='add'>+		ENA_ADMIN_AQ_COMMON_DESC_COMMAND_ID_MASK;</div><div class='add'>+</div><div class='add'>+	comp_ctx = get_comp_ctxt(admin_queue, cmd_id, true);</div><div class='add'>+	if (unlikely(!comp_ctx))</div><div class='add'>+		return ERR_PTR(-EINVAL);</div><div class='add'>+</div><div class='add'>+	comp_ctx-&gt;status = ENA_CMD_SUBMITTED;</div><div class='add'>+	comp_ctx-&gt;comp_size = (u32)comp_size_in_bytes;</div><div class='add'>+	comp_ctx-&gt;user_cqe = comp;</div><div class='add'>+	comp_ctx-&gt;cmd_opcode = cmd-&gt;aq_common_descriptor.opcode;</div><div class='add'>+</div><div class='add'>+	reinit_completion(&amp;comp_ctx-&gt;wait_event);</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;admin_queue-&gt;sq.entries[tail_masked], cmd, cmd_size_in_bytes);</div><div class='add'>+</div><div class='add'>+	admin_queue-&gt;curr_cmd_id = (admin_queue-&gt;curr_cmd_id + 1) &amp;</div><div class='add'>+		queue_size_mask;</div><div class='add'>+</div><div class='add'>+	admin_queue-&gt;sq.tail++;</div><div class='add'>+	admin_queue-&gt;stats.submitted_cmd++;</div><div class='add'>+</div><div class='add'>+	if (unlikely((admin_queue-&gt;sq.tail &amp; queue_size_mask) == 0))</div><div class='add'>+		admin_queue-&gt;sq.phase = !admin_queue-&gt;sq.phase;</div><div class='add'>+</div><div class='add'>+	writel(admin_queue-&gt;sq.tail, admin_queue-&gt;sq.db_addr);</div><div class='add'>+</div><div class='add'>+	return comp_ctx;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_com_init_comp_ctxt(struct ena_com_admin_queue *admin_queue)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_dev *ena_dev = admin_queue-&gt;ena_dev;</div><div class='add'>+	size_t size = admin_queue-&gt;q_depth * sizeof(struct ena_comp_ctx);</div><div class='add'>+	struct ena_comp_ctx *comp_ctx;</div><div class='add'>+	u16 i;</div><div class='add'>+</div><div class='add'>+	admin_queue-&gt;comp_ctx = devm_kzalloc(admin_queue-&gt;q_dmadev, size, GFP_KERNEL);</div><div class='add'>+	if (unlikely(!admin_queue-&gt;comp_ctx)) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Memory allocation failed\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; admin_queue-&gt;q_depth; i++) {</div><div class='add'>+		comp_ctx = get_comp_ctxt(admin_queue, i, false);</div><div class='add'>+		if (comp_ctx)</div><div class='add'>+			init_completion(&amp;comp_ctx-&gt;wait_event);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct ena_comp_ctx *ena_com_submit_admin_cmd(struct ena_com_admin_queue *admin_queue,</div><div class='add'>+						     struct ena_admin_aq_entry *cmd,</div><div class='add'>+						     size_t cmd_size_in_bytes,</div><div class='add'>+						     struct ena_admin_acq_entry *comp,</div><div class='add'>+						     size_t comp_size_in_bytes)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags = 0;</div><div class='add'>+	struct ena_comp_ctx *comp_ctx;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;admin_queue-&gt;q_lock, flags);</div><div class='add'>+	if (unlikely(!admin_queue-&gt;running_state)) {</div><div class='add'>+		spin_unlock_irqrestore(&amp;admin_queue-&gt;q_lock, flags);</div><div class='add'>+		return ERR_PTR(-ENODEV);</div><div class='add'>+	}</div><div class='add'>+	comp_ctx = __ena_com_submit_admin_cmd(admin_queue, cmd,</div><div class='add'>+					      cmd_size_in_bytes,</div><div class='add'>+					      comp,</div><div class='add'>+					      comp_size_in_bytes);</div><div class='add'>+	if (IS_ERR(comp_ctx))</div><div class='add'>+		admin_queue-&gt;running_state = false;</div><div class='add'>+	spin_unlock_irqrestore(&amp;admin_queue-&gt;q_lock, flags);</div><div class='add'>+</div><div class='add'>+	return comp_ctx;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_com_init_io_sq(struct ena_com_dev *ena_dev,</div><div class='add'>+			      struct ena_com_create_io_ctx *ctx,</div><div class='add'>+			      struct ena_com_io_sq *io_sq)</div><div class='add'>+{</div><div class='add'>+	size_t size;</div><div class='add'>+</div><div class='add'>+	memset(&amp;io_sq-&gt;desc_addr, 0x0, sizeof(io_sq-&gt;desc_addr));</div><div class='add'>+</div><div class='add'>+	io_sq-&gt;dma_addr_bits = (u8)ena_dev-&gt;dma_addr_bits;</div><div class='add'>+	io_sq-&gt;desc_entry_size =</div><div class='add'>+		(io_sq-&gt;direction == ENA_COM_IO_QUEUE_DIRECTION_TX) ?</div><div class='add'>+		sizeof(struct ena_eth_io_tx_desc) :</div><div class='add'>+		sizeof(struct ena_eth_io_rx_desc);</div><div class='add'>+</div><div class='add'>+	size = io_sq-&gt;desc_entry_size * io_sq-&gt;q_depth;</div><div class='add'>+</div><div class='add'>+	if (io_sq-&gt;mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_HOST) {</div><div class='add'>+		io_sq-&gt;desc_addr.virt_addr =</div><div class='add'>+			dma_alloc_coherent(ena_dev-&gt;dmadev, size, &amp;io_sq-&gt;desc_addr.phys_addr,</div><div class='add'>+					   GFP_KERNEL);</div><div class='add'>+		if (!io_sq-&gt;desc_addr.virt_addr) {</div><div class='add'>+			io_sq-&gt;desc_addr.virt_addr =</div><div class='add'>+				dma_alloc_coherent(ena_dev-&gt;dmadev, size,</div><div class='add'>+						   &amp;io_sq-&gt;desc_addr.phys_addr, GFP_KERNEL);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!io_sq-&gt;desc_addr.virt_addr) {</div><div class='add'>+			netdev_err(ena_dev-&gt;net_device, "Memory allocation failed\n");</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (io_sq-&gt;mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) {</div><div class='add'>+		/* Allocate bounce buffers */</div><div class='add'>+		io_sq-&gt;bounce_buf_ctrl.buffer_size =</div><div class='add'>+			ena_dev-&gt;llq_info.desc_list_entry_size;</div><div class='add'>+		io_sq-&gt;bounce_buf_ctrl.buffers_num =</div><div class='add'>+			ENA_COM_BOUNCE_BUFFER_CNTRL_CNT;</div><div class='add'>+		io_sq-&gt;bounce_buf_ctrl.next_to_use = 0;</div><div class='add'>+</div><div class='add'>+		size = (size_t)io_sq-&gt;bounce_buf_ctrl.buffer_size *</div><div class='add'>+			io_sq-&gt;bounce_buf_ctrl.buffers_num;</div><div class='add'>+</div><div class='add'>+		io_sq-&gt;bounce_buf_ctrl.base_buffer = devm_kzalloc(ena_dev-&gt;dmadev, size, GFP_KERNEL);</div><div class='add'>+		if (!io_sq-&gt;bounce_buf_ctrl.base_buffer)</div><div class='add'>+			io_sq-&gt;bounce_buf_ctrl.base_buffer =</div><div class='add'>+				devm_kzalloc(ena_dev-&gt;dmadev, size, GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+		if (!io_sq-&gt;bounce_buf_ctrl.base_buffer) {</div><div class='add'>+			netdev_err(ena_dev-&gt;net_device, "Bounce buffer memory allocation failed\n");</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		memcpy(&amp;io_sq-&gt;llq_info, &amp;ena_dev-&gt;llq_info,</div><div class='add'>+		       sizeof(io_sq-&gt;llq_info));</div><div class='add'>+</div><div class='add'>+		/* Initiate the first bounce buffer */</div><div class='add'>+		io_sq-&gt;llq_buf_ctrl.curr_bounce_buf =</div><div class='add'>+			ena_com_get_next_bounce_buffer(&amp;io_sq-&gt;bounce_buf_ctrl);</div><div class='add'>+		memset(io_sq-&gt;llq_buf_ctrl.curr_bounce_buf,</div><div class='add'>+		       0x0, io_sq-&gt;llq_info.desc_list_entry_size);</div><div class='add'>+		io_sq-&gt;llq_buf_ctrl.descs_left_in_line =</div><div class='add'>+			io_sq-&gt;llq_info.descs_num_before_header;</div><div class='add'>+		io_sq-&gt;disable_meta_caching =</div><div class='add'>+			io_sq-&gt;llq_info.disable_meta_caching;</div><div class='add'>+</div><div class='add'>+		if (io_sq-&gt;llq_info.max_entries_in_tx_burst &gt; 0)</div><div class='add'>+			io_sq-&gt;entries_in_tx_burst_left =</div><div class='add'>+				io_sq-&gt;llq_info.max_entries_in_tx_burst;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	io_sq-&gt;tail = 0;</div><div class='add'>+	io_sq-&gt;next_to_comp = 0;</div><div class='add'>+	io_sq-&gt;phase = 1;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_com_init_io_cq(struct ena_com_dev *ena_dev,</div><div class='add'>+			      struct ena_com_create_io_ctx *ctx,</div><div class='add'>+			      struct ena_com_io_cq *io_cq)</div><div class='add'>+{</div><div class='add'>+	size_t size;</div><div class='add'>+</div><div class='add'>+	memset(&amp;io_cq-&gt;cdesc_addr, 0x0, sizeof(io_cq-&gt;cdesc_addr));</div><div class='add'>+</div><div class='add'>+	/* Use the basic completion descriptor for Rx */</div><div class='add'>+	io_cq-&gt;cdesc_entry_size_in_bytes =</div><div class='add'>+		(io_cq-&gt;direction == ENA_COM_IO_QUEUE_DIRECTION_TX) ?</div><div class='add'>+		sizeof(struct ena_eth_io_tx_cdesc) :</div><div class='add'>+		sizeof(struct ena_eth_io_rx_cdesc_base);</div><div class='add'>+</div><div class='add'>+	size = io_cq-&gt;cdesc_entry_size_in_bytes * io_cq-&gt;q_depth;</div><div class='add'>+</div><div class='add'>+	io_cq-&gt;cdesc_addr.virt_addr =</div><div class='add'>+		dma_alloc_coherent(ena_dev-&gt;dmadev, size, &amp;io_cq-&gt;cdesc_addr.phys_addr, GFP_KERNEL);</div><div class='add'>+	if (!io_cq-&gt;cdesc_addr.virt_addr) {</div><div class='add'>+		io_cq-&gt;cdesc_addr.virt_addr =</div><div class='add'>+			dma_alloc_coherent(ena_dev-&gt;dmadev, size, &amp;io_cq-&gt;cdesc_addr.phys_addr,</div><div class='add'>+					   GFP_KERNEL);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!io_cq-&gt;cdesc_addr.virt_addr) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Memory allocation failed\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	io_cq-&gt;phase = 1;</div><div class='add'>+	io_cq-&gt;head = 0;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_com_handle_single_admin_completion(struct ena_com_admin_queue *admin_queue,</div><div class='add'>+						   struct ena_admin_acq_entry *cqe)</div><div class='add'>+{</div><div class='add'>+	struct ena_comp_ctx *comp_ctx;</div><div class='add'>+	u16 cmd_id;</div><div class='add'>+</div><div class='add'>+	cmd_id = cqe-&gt;acq_common_descriptor.command &amp;</div><div class='add'>+		ENA_ADMIN_ACQ_COMMON_DESC_COMMAND_ID_MASK;</div><div class='add'>+</div><div class='add'>+	comp_ctx = get_comp_ctxt(admin_queue, cmd_id, false);</div><div class='add'>+	if (unlikely(!comp_ctx)) {</div><div class='add'>+		netdev_err(admin_queue-&gt;ena_dev-&gt;net_device,</div><div class='add'>+			   "comp_ctx is NULL. Changing the admin queue running state\n");</div><div class='add'>+		admin_queue-&gt;running_state = false;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	comp_ctx-&gt;status = ENA_CMD_COMPLETED;</div><div class='add'>+	comp_ctx-&gt;comp_status = cqe-&gt;acq_common_descriptor.status;</div><div class='add'>+</div><div class='add'>+	if (comp_ctx-&gt;user_cqe)</div><div class='add'>+		memcpy(comp_ctx-&gt;user_cqe, (void *)cqe, comp_ctx-&gt;comp_size);</div><div class='add'>+</div><div class='add'>+	if (!admin_queue-&gt;polling)</div><div class='add'>+		complete(&amp;comp_ctx-&gt;wait_event);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_com_handle_admin_completion(struct ena_com_admin_queue *admin_queue)</div><div class='add'>+{</div><div class='add'>+	struct ena_admin_acq_entry *cqe = NULL;</div><div class='add'>+	u16 comp_num = 0;</div><div class='add'>+	u16 head_masked;</div><div class='add'>+	u8 phase;</div><div class='add'>+</div><div class='add'>+	head_masked = admin_queue-&gt;cq.head &amp; (admin_queue-&gt;q_depth - 1);</div><div class='add'>+	phase = admin_queue-&gt;cq.phase;</div><div class='add'>+</div><div class='add'>+	cqe = &amp;admin_queue-&gt;cq.entries[head_masked];</div><div class='add'>+</div><div class='add'>+	/* Go over all the completions */</div><div class='add'>+	while ((READ_ONCE(cqe-&gt;acq_common_descriptor.flags) &amp;</div><div class='add'>+		ENA_ADMIN_ACQ_COMMON_DESC_PHASE_MASK) == phase) {</div><div class='add'>+		/* Do not read the rest of the completion entry before the</div><div class='add'>+		 * phase bit was validated</div><div class='add'>+		 */</div><div class='add'>+		dma_rmb();</div><div class='add'>+		ena_com_handle_single_admin_completion(admin_queue, cqe);</div><div class='add'>+</div><div class='add'>+		head_masked++;</div><div class='add'>+		comp_num++;</div><div class='add'>+		if (unlikely(head_masked == admin_queue-&gt;q_depth)) {</div><div class='add'>+			head_masked = 0;</div><div class='add'>+			phase = !phase;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		cqe = &amp;admin_queue-&gt;cq.entries[head_masked];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	admin_queue-&gt;cq.head += comp_num;</div><div class='add'>+	admin_queue-&gt;cq.phase = phase;</div><div class='add'>+	admin_queue-&gt;sq.head += comp_num;</div><div class='add'>+	admin_queue-&gt;stats.completed_cmd += comp_num;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_com_comp_status_to_errno(struct ena_com_admin_queue *admin_queue,</div><div class='add'>+					u8 comp_status)</div><div class='add'>+{</div><div class='add'>+	if (unlikely(comp_status != 0))</div><div class='add'>+		netdev_err(admin_queue-&gt;ena_dev-&gt;net_device, "Admin command failed[%u]\n",</div><div class='add'>+			   comp_status);</div><div class='add'>+</div><div class='add'>+	switch (comp_status) {</div><div class='add'>+	case ENA_ADMIN_SUCCESS:</div><div class='add'>+		return 0;</div><div class='add'>+	case ENA_ADMIN_RESOURCE_ALLOCATION_FAILURE:</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	case ENA_ADMIN_UNSUPPORTED_OPCODE:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	case ENA_ADMIN_BAD_OPCODE:</div><div class='add'>+	case ENA_ADMIN_MALFORMED_REQUEST:</div><div class='add'>+	case ENA_ADMIN_ILLEGAL_PARAMETER:</div><div class='add'>+	case ENA_ADMIN_UNKNOWN_ERROR:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	case ENA_ADMIN_RESOURCE_BUSY:</div><div class='add'>+		return -EAGAIN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_delay_exponential_backoff_us(u32 exp, u32 delay_us)</div><div class='add'>+{</div><div class='add'>+	exp = min_t(u32, exp, ENA_MAX_BACKOFF_DELAY_EXP);</div><div class='add'>+	delay_us = max_t(u32, ENA_MIN_ADMIN_POLL_US, delay_us);</div><div class='add'>+	delay_us = min_t(u32, delay_us * (1U &lt;&lt; exp), ENA_MAX_ADMIN_POLL_US);</div><div class='add'>+	usleep_range(delay_us, 2 * delay_us);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_com_wait_and_process_admin_cq_polling(struct ena_comp_ctx *comp_ctx,</div><div class='add'>+						     struct ena_com_admin_queue *admin_queue)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags = 0;</div><div class='add'>+	unsigned long timeout;</div><div class='add'>+	int ret;</div><div class='add'>+	u32 exp = 0;</div><div class='add'>+</div><div class='add'>+	timeout = jiffies + usecs_to_jiffies(admin_queue-&gt;completion_timeout);</div><div class='add'>+</div><div class='add'>+	while (1) {</div><div class='add'>+		spin_lock_irqsave(&amp;admin_queue-&gt;q_lock, flags);</div><div class='add'>+		ena_com_handle_admin_completion(admin_queue);</div><div class='add'>+		spin_unlock_irqrestore(&amp;admin_queue-&gt;q_lock, flags);</div><div class='add'>+</div><div class='add'>+		if (comp_ctx-&gt;status != ENA_CMD_SUBMITTED)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if (time_is_before_jiffies(timeout)) {</div><div class='add'>+			netdev_err(admin_queue-&gt;ena_dev-&gt;net_device,</div><div class='add'>+				   "Wait for completion (polling) timeout\n");</div><div class='add'>+			/* ENA didn't have any completion */</div><div class='add'>+			spin_lock_irqsave(&amp;admin_queue-&gt;q_lock, flags);</div><div class='add'>+			admin_queue-&gt;stats.no_completion++;</div><div class='add'>+			admin_queue-&gt;running_state = false;</div><div class='add'>+			spin_unlock_irqrestore(&amp;admin_queue-&gt;q_lock, flags);</div><div class='add'>+</div><div class='add'>+			ret = -ETIME;</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ena_delay_exponential_backoff_us(exp++,</div><div class='add'>+						 admin_queue-&gt;ena_dev-&gt;ena_min_poll_delay_us);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (unlikely(comp_ctx-&gt;status == ENA_CMD_ABORTED)) {</div><div class='add'>+		netdev_err(admin_queue-&gt;ena_dev-&gt;net_device, "Command was aborted\n");</div><div class='add'>+		spin_lock_irqsave(&amp;admin_queue-&gt;q_lock, flags);</div><div class='add'>+		admin_queue-&gt;stats.aborted_cmd++;</div><div class='add'>+		spin_unlock_irqrestore(&amp;admin_queue-&gt;q_lock, flags);</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	WARN(comp_ctx-&gt;status != ENA_CMD_COMPLETED, "Invalid comp status %d\n", comp_ctx-&gt;status);</div><div class='add'>+</div><div class='add'>+	ret = ena_com_comp_status_to_errno(admin_queue, comp_ctx-&gt;comp_status);</div><div class='add'>+err:</div><div class='add'>+	comp_ctxt_release(admin_queue, comp_ctx);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * Set the LLQ configurations of the firmware</div><div class='add'>+ *</div><div class='add'>+ * The driver provides only the enabled feature values to the device,</div><div class='add'>+ * which in turn, checks if they are supported.</div><div class='add'>+ */</div><div class='add'>+static int ena_com_set_llq(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_admin_queue *admin_queue;</div><div class='add'>+	struct ena_admin_set_feat_cmd cmd;</div><div class='add'>+	struct ena_admin_set_feat_resp resp;</div><div class='add'>+	struct ena_com_llq_info *llq_info = &amp;ena_dev-&gt;llq_info;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	memset(&amp;cmd, 0x0, sizeof(cmd));</div><div class='add'>+	admin_queue = &amp;ena_dev-&gt;admin_queue;</div><div class='add'>+</div><div class='add'>+	cmd.aq_common_descriptor.opcode = ENA_ADMIN_SET_FEATURE;</div><div class='add'>+	cmd.feat_common.feature_id = ENA_ADMIN_LLQ;</div><div class='add'>+</div><div class='add'>+	cmd.u.llq.header_location_ctrl_enabled = llq_info-&gt;header_location_ctrl;</div><div class='add'>+	cmd.u.llq.entry_size_ctrl_enabled = llq_info-&gt;desc_list_entry_size_ctrl;</div><div class='add'>+	cmd.u.llq.desc_num_before_header_enabled = llq_info-&gt;descs_num_before_header;</div><div class='add'>+	cmd.u.llq.descriptors_stride_ctrl_enabled = llq_info-&gt;desc_stride_ctrl;</div><div class='add'>+</div><div class='add'>+	cmd.u.llq.accel_mode.u.set.enabled_flags =</div><div class='add'>+		BIT(ENA_ADMIN_DISABLE_META_CACHING) |</div><div class='add'>+		BIT(ENA_ADMIN_LIMIT_TX_BURST);</div><div class='add'>+</div><div class='add'>+	ret = ena_com_execute_admin_command(admin_queue,</div><div class='add'>+					    (struct ena_admin_aq_entry *)&amp;cmd,</div><div class='add'>+					    sizeof(cmd),</div><div class='add'>+					    (struct ena_admin_acq_entry *)&amp;resp,</div><div class='add'>+					    sizeof(resp));</div><div class='add'>+</div><div class='add'>+	if (unlikely(ret))</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Failed to set LLQ configurations: %d\n", ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_com_config_llq_info(struct ena_com_dev *ena_dev,</div><div class='add'>+				   struct ena_admin_feature_llq_desc *llq_features,</div><div class='add'>+				   struct ena_llq_configurations *llq_default_cfg)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_llq_info *llq_info = &amp;ena_dev-&gt;llq_info;</div><div class='add'>+	struct ena_admin_accel_mode_get llq_accel_mode_get;</div><div class='add'>+	u16 supported_feat;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	memset(llq_info, 0, sizeof(*llq_info));</div><div class='add'>+</div><div class='add'>+	supported_feat = llq_features-&gt;header_location_ctrl_supported;</div><div class='add'>+</div><div class='add'>+	if (likely(supported_feat &amp; llq_default_cfg-&gt;llq_header_location)) {</div><div class='add'>+		llq_info-&gt;header_location_ctrl =</div><div class='add'>+			llq_default_cfg-&gt;llq_header_location;</div><div class='add'>+	} else {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device,</div><div class='add'>+			   "Invalid header location control, supported: 0x%x\n", supported_feat);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (likely(llq_info-&gt;header_location_ctrl == ENA_ADMIN_INLINE_HEADER)) {</div><div class='add'>+		supported_feat = llq_features-&gt;descriptors_stride_ctrl_supported;</div><div class='add'>+		if (likely(supported_feat &amp; llq_default_cfg-&gt;llq_stride_ctrl)) {</div><div class='add'>+			llq_info-&gt;desc_stride_ctrl = llq_default_cfg-&gt;llq_stride_ctrl;</div><div class='add'>+		} else	{</div><div class='add'>+			if (supported_feat &amp; ENA_ADMIN_MULTIPLE_DESCS_PER_ENTRY) {</div><div class='add'>+				llq_info-&gt;desc_stride_ctrl = ENA_ADMIN_MULTIPLE_DESCS_PER_ENTRY;</div><div class='add'>+			} else if (supported_feat &amp; ENA_ADMIN_SINGLE_DESC_PER_ENTRY) {</div><div class='add'>+				llq_info-&gt;desc_stride_ctrl = ENA_ADMIN_SINGLE_DESC_PER_ENTRY;</div><div class='add'>+			} else {</div><div class='add'>+				netdev_err(ena_dev-&gt;net_device,</div><div class='add'>+					   "Invalid desc_stride_ctrl, supported: 0x%x\n",</div><div class='add'>+					   supported_feat);</div><div class='add'>+				return -EINVAL;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			netdev_err(ena_dev-&gt;net_device,</div><div class='add'>+				   "Default llq stride ctrl is not supported, performing fallback, default: 0x%x, supported: 0x%x, used: 0x%x\n",</div><div class='add'>+				   llq_default_cfg-&gt;llq_stride_ctrl, supported_feat,</div><div class='add'>+				   llq_info-&gt;desc_stride_ctrl);</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		llq_info-&gt;desc_stride_ctrl = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	supported_feat = llq_features-&gt;entry_size_ctrl_supported;</div><div class='add'>+	if (likely(supported_feat &amp; llq_default_cfg-&gt;llq_ring_entry_size)) {</div><div class='add'>+		llq_info-&gt;desc_list_entry_size_ctrl = llq_default_cfg-&gt;llq_ring_entry_size;</div><div class='add'>+		llq_info-&gt;desc_list_entry_size = llq_default_cfg-&gt;llq_ring_entry_size_value;</div><div class='add'>+	} else {</div><div class='add'>+		if (supported_feat &amp; ENA_ADMIN_LIST_ENTRY_SIZE_128B) {</div><div class='add'>+			llq_info-&gt;desc_list_entry_size_ctrl = ENA_ADMIN_LIST_ENTRY_SIZE_128B;</div><div class='add'>+			llq_info-&gt;desc_list_entry_size = 128;</div><div class='add'>+		} else if (supported_feat &amp; ENA_ADMIN_LIST_ENTRY_SIZE_192B) {</div><div class='add'>+			llq_info-&gt;desc_list_entry_size_ctrl = ENA_ADMIN_LIST_ENTRY_SIZE_192B;</div><div class='add'>+			llq_info-&gt;desc_list_entry_size = 192;</div><div class='add'>+		} else if (supported_feat &amp; ENA_ADMIN_LIST_ENTRY_SIZE_256B) {</div><div class='add'>+			llq_info-&gt;desc_list_entry_size_ctrl = ENA_ADMIN_LIST_ENTRY_SIZE_256B;</div><div class='add'>+			llq_info-&gt;desc_list_entry_size = 256;</div><div class='add'>+		} else {</div><div class='add'>+			netdev_err(ena_dev-&gt;net_device,</div><div class='add'>+				   "Invalid entry_size_ctrl, supported: 0x%x\n", supported_feat);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device,</div><div class='add'>+			   "Default llq ring entry size is not supported, performing fallback, default: 0x%x, supported: 0x%x, used: 0x%x\n",</div><div class='add'>+			   llq_default_cfg-&gt;llq_ring_entry_size, supported_feat,</div><div class='add'>+			   llq_info-&gt;desc_list_entry_size);</div><div class='add'>+	}</div><div class='add'>+	if (unlikely(llq_info-&gt;desc_list_entry_size &amp; 0x7)) {</div><div class='add'>+		/* The desc list entry size should be whole multiply of 8</div><div class='add'>+		 * This requirement comes from __iowrite64_copy()</div><div class='add'>+		 */</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Illegal entry size %d\n",</div><div class='add'>+			   llq_info-&gt;desc_list_entry_size);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (llq_info-&gt;desc_stride_ctrl == ENA_ADMIN_MULTIPLE_DESCS_PER_ENTRY)</div><div class='add'>+		llq_info-&gt;descs_per_entry = llq_info-&gt;desc_list_entry_size /</div><div class='add'>+			sizeof(struct ena_eth_io_tx_desc);</div><div class='add'>+	else</div><div class='add'>+		llq_info-&gt;descs_per_entry = 1;</div><div class='add'>+</div><div class='add'>+	supported_feat = llq_features-&gt;desc_num_before_header_supported;</div><div class='add'>+	if (likely(supported_feat &amp; llq_default_cfg-&gt;llq_num_decs_before_header)) {</div><div class='add'>+		llq_info-&gt;descs_num_before_header = llq_default_cfg-&gt;llq_num_decs_before_header;</div><div class='add'>+	} else {</div><div class='add'>+		if (supported_feat &amp; ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_2) {</div><div class='add'>+			llq_info-&gt;descs_num_before_header = ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_2;</div><div class='add'>+		} else if (supported_feat &amp; ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_1) {</div><div class='add'>+			llq_info-&gt;descs_num_before_header = ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_1;</div><div class='add'>+		} else if (supported_feat &amp; ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_4) {</div><div class='add'>+			llq_info-&gt;descs_num_before_header = ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_4;</div><div class='add'>+		} else if (supported_feat &amp; ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_8) {</div><div class='add'>+			llq_info-&gt;descs_num_before_header = ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_8;</div><div class='add'>+		} else {</div><div class='add'>+			netdev_err(ena_dev-&gt;net_device,</div><div class='add'>+				   "Invalid descs_num_before_header, supported: 0x%x\n",</div><div class='add'>+				   supported_feat);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device,</div><div class='add'>+			   "Default llq num descs before header is not supported, performing fallback, default: 0x%x, supported: 0x%x, used: 0x%x\n",</div><div class='add'>+			   llq_default_cfg-&gt;llq_num_decs_before_header, supported_feat,</div><div class='add'>+			   llq_info-&gt;descs_num_before_header);</div><div class='add'>+	}</div><div class='add'>+	/* Check for accelerated queue supported */</div><div class='add'>+	llq_accel_mode_get = llq_features-&gt;accel_mode.u.get;</div><div class='add'>+</div><div class='add'>+	llq_info-&gt;disable_meta_caching =</div><div class='add'>+		!!(llq_accel_mode_get.supported_flags &amp;</div><div class='add'>+		   BIT(ENA_ADMIN_DISABLE_META_CACHING));</div><div class='add'>+</div><div class='add'>+	if (llq_accel_mode_get.supported_flags &amp; BIT(ENA_ADMIN_LIMIT_TX_BURST))</div><div class='add'>+		llq_info-&gt;max_entries_in_tx_burst =</div><div class='add'>+			llq_accel_mode_get.max_tx_burst_size /</div><div class='add'>+			llq_default_cfg-&gt;llq_ring_entry_size_value;</div><div class='add'>+</div><div class='add'>+	rc = ena_com_set_llq(ena_dev);</div><div class='add'>+	if (rc)</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Cannot set LLQ configuration: %d\n", rc);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_com_wait_and_process_admin_cq_interrupts(struct ena_comp_ctx *comp_ctx,</div><div class='add'>+							struct ena_com_admin_queue *admin_queue)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	wait_for_completion_timeout(&amp;comp_ctx-&gt;wait_event,</div><div class='add'>+				    usecs_to_jiffies(admin_queue-&gt;completion_timeout));</div><div class='add'>+</div><div class='add'>+	/* In case the command wasn't completed find out the root cause.</div><div class='add'>+	 * There might be 2 kinds of errors</div><div class='add'>+	 * 1) No completion (timeout reached)</div><div class='add'>+	 * 2) There is completion but the device didn't get any msi-x interrupt.</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely(comp_ctx-&gt;status == ENA_CMD_SUBMITTED)) {</div><div class='add'>+		spin_lock_irqsave(&amp;admin_queue-&gt;q_lock, flags);</div><div class='add'>+		ena_com_handle_admin_completion(admin_queue);</div><div class='add'>+		admin_queue-&gt;stats.no_completion++;</div><div class='add'>+		spin_unlock_irqrestore(&amp;admin_queue-&gt;q_lock, flags);</div><div class='add'>+</div><div class='add'>+		if (comp_ctx-&gt;status == ENA_CMD_COMPLETED) {</div><div class='add'>+			netdev_err(admin_queue-&gt;ena_dev-&gt;net_device,</div><div class='add'>+				   "The ena device sent a completion but the driver didn't receive a MSI-X interrupt (cmd %d)\n",</div><div class='add'>+				   comp_ctx-&gt;cmd_opcode);</div><div class='add'>+		} else {</div><div class='add'>+			netdev_err(admin_queue-&gt;ena_dev-&gt;net_device,</div><div class='add'>+				   "The ena device didn't send a completion for the admin cmd %d status %d\n",</div><div class='add'>+				   comp_ctx-&gt;cmd_opcode, comp_ctx-&gt;status);</div><div class='add'>+		}</div><div class='add'>+		admin_queue-&gt;running_state = false;</div><div class='add'>+		ret = -ETIME;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ena_com_comp_status_to_errno(admin_queue, comp_ctx-&gt;comp_status);</div><div class='add'>+err:</div><div class='add'>+	comp_ctxt_release(admin_queue, comp_ctx);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This method read the hardware device register through posting writes</div><div class='add'>+ * and waiting for response</div><div class='add'>+ * On timeout the function will return ENA_MMIO_READ_TIMEOUT</div><div class='add'>+ */</div><div class='add'>+static u32 ena_com_reg_bar_read32(struct ena_com_dev *ena_dev, u16 offset)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_mmio_read *mmio_read = &amp;ena_dev-&gt;mmio_read;</div><div class='add'>+	volatile struct ena_admin_ena_mmio_req_read_less_resp *read_resp =</div><div class='add'>+		mmio_read-&gt;read_resp;</div><div class='add'>+	u32 mmio_read_reg, ret, i;</div><div class='add'>+	unsigned long flags = 0;</div><div class='add'>+	u32 timeout = mmio_read-&gt;reg_read_to;</div><div class='add'>+</div><div class='add'>+	might_sleep();</div><div class='add'>+</div><div class='add'>+	if (timeout == 0)</div><div class='add'>+		timeout = ENA_REG_READ_TIMEOUT;</div><div class='add'>+</div><div class='add'>+	/* If readless is disabled, perform regular read */</div><div class='add'>+	if (!mmio_read-&gt;readless_supported)</div><div class='add'>+		return readl(ena_dev-&gt;reg_bar + offset);</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;mmio_read-&gt;lock, flags);</div><div class='add'>+	mmio_read-&gt;seq_num++;</div><div class='add'>+</div><div class='add'>+	read_resp-&gt;req_id = mmio_read-&gt;seq_num + 0xDEAD;</div><div class='add'>+	mmio_read_reg = (offset &lt;&lt; ENA_REGS_MMIO_REG_READ_REG_OFF_SHIFT) &amp;</div><div class='add'>+			ENA_REGS_MMIO_REG_READ_REG_OFF_MASK;</div><div class='add'>+	mmio_read_reg |= mmio_read-&gt;seq_num &amp;</div><div class='add'>+			ENA_REGS_MMIO_REG_READ_REQ_ID_MASK;</div><div class='add'>+</div><div class='add'>+	writel(mmio_read_reg, ena_dev-&gt;reg_bar + ENA_REGS_MMIO_REG_READ_OFF);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; timeout; i++) {</div><div class='add'>+		if (READ_ONCE(read_resp-&gt;req_id) == mmio_read-&gt;seq_num)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		udelay(1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (unlikely(i == timeout)) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device,</div><div class='add'>+			   "Reading reg failed for timeout. expected: req id[%u] offset[%u] actual: req id[%u] offset[%u]\n",</div><div class='add'>+			   mmio_read-&gt;seq_num, offset, read_resp-&gt;req_id, read_resp-&gt;reg_off);</div><div class='add'>+		ret = ENA_MMIO_READ_TIMEOUT;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (read_resp-&gt;reg_off != offset) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Read failure: wrong offset provided\n");</div><div class='add'>+		ret = ENA_MMIO_READ_TIMEOUT;</div><div class='add'>+	} else {</div><div class='add'>+		ret = read_resp-&gt;reg_val;</div><div class='add'>+	}</div><div class='add'>+err:</div><div class='add'>+	spin_unlock_irqrestore(&amp;mmio_read-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* There are two types to wait for completion.</div><div class='add'>+ * Polling mode - wait until the completion is available.</div><div class='add'>+ * Async mode - wait on wait queue until the completion is ready</div><div class='add'>+ * (or the timeout expired).</div><div class='add'>+ * It is expected that the IRQ called ena_com_handle_admin_completion</div><div class='add'>+ * to mark the completions.</div><div class='add'>+ */</div><div class='add'>+static int ena_com_wait_and_process_admin_cq(struct ena_comp_ctx *comp_ctx,</div><div class='add'>+					     struct ena_com_admin_queue *admin_queue)</div><div class='add'>+{</div><div class='add'>+	if (admin_queue-&gt;polling)</div><div class='add'>+		return ena_com_wait_and_process_admin_cq_polling(comp_ctx,</div><div class='add'>+								 admin_queue);</div><div class='add'>+</div><div class='add'>+	return ena_com_wait_and_process_admin_cq_interrupts(comp_ctx,</div><div class='add'>+							    admin_queue);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_com_destroy_io_sq(struct ena_com_dev *ena_dev,</div><div class='add'>+				 struct ena_com_io_sq *io_sq)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_admin_queue *admin_queue = &amp;ena_dev-&gt;admin_queue;</div><div class='add'>+	struct ena_admin_aq_destroy_sq_cmd destroy_cmd;</div><div class='add'>+	struct ena_admin_acq_destroy_sq_resp_desc destroy_resp;</div><div class='add'>+	u8 direction;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	memset(&amp;destroy_cmd, 0x0, sizeof(destroy_cmd));</div><div class='add'>+</div><div class='add'>+	if (io_sq-&gt;direction == ENA_COM_IO_QUEUE_DIRECTION_TX)</div><div class='add'>+		direction = ENA_ADMIN_SQ_DIRECTION_TX;</div><div class='add'>+	else</div><div class='add'>+		direction = ENA_ADMIN_SQ_DIRECTION_RX;</div><div class='add'>+</div><div class='add'>+	destroy_cmd.sq.sq_identity |= (direction &lt;&lt;</div><div class='add'>+		ENA_ADMIN_SQ_SQ_DIRECTION_SHIFT) &amp;</div><div class='add'>+		ENA_ADMIN_SQ_SQ_DIRECTION_MASK;</div><div class='add'>+</div><div class='add'>+	destroy_cmd.sq.sq_idx = io_sq-&gt;idx;</div><div class='add'>+	destroy_cmd.aq_common_descriptor.opcode = ENA_ADMIN_DESTROY_SQ;</div><div class='add'>+</div><div class='add'>+	ret = ena_com_execute_admin_command(admin_queue,</div><div class='add'>+					    (struct ena_admin_aq_entry *)&amp;destroy_cmd,</div><div class='add'>+					    sizeof(destroy_cmd),</div><div class='add'>+					    (struct ena_admin_acq_entry *)&amp;destroy_resp,</div><div class='add'>+					    sizeof(destroy_resp));</div><div class='add'>+</div><div class='add'>+	if (unlikely(ret &amp;&amp; (ret != -ENODEV)))</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Failed to destroy io sq error: %d\n", ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_com_io_queue_free(struct ena_com_dev *ena_dev,</div><div class='add'>+				  struct ena_com_io_sq *io_sq,</div><div class='add'>+				  struct ena_com_io_cq *io_cq)</div><div class='add'>+{</div><div class='add'>+	size_t size;</div><div class='add'>+</div><div class='add'>+	if (io_cq-&gt;cdesc_addr.virt_addr) {</div><div class='add'>+		size = io_cq-&gt;cdesc_entry_size_in_bytes * io_cq-&gt;q_depth;</div><div class='add'>+</div><div class='add'>+		dma_free_coherent(ena_dev-&gt;dmadev, size, io_cq-&gt;cdesc_addr.virt_addr,</div><div class='add'>+				  io_cq-&gt;cdesc_addr.phys_addr);</div><div class='add'>+</div><div class='add'>+		io_cq-&gt;cdesc_addr.virt_addr = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (io_sq-&gt;desc_addr.virt_addr) {</div><div class='add'>+		size = io_sq-&gt;desc_entry_size * io_sq-&gt;q_depth;</div><div class='add'>+</div><div class='add'>+		dma_free_coherent(ena_dev-&gt;dmadev, size, io_sq-&gt;desc_addr.virt_addr,</div><div class='add'>+				  io_sq-&gt;desc_addr.phys_addr);</div><div class='add'>+</div><div class='add'>+		io_sq-&gt;desc_addr.virt_addr = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (io_sq-&gt;bounce_buf_ctrl.base_buffer) {</div><div class='add'>+		devm_kfree(ena_dev-&gt;dmadev, io_sq-&gt;bounce_buf_ctrl.base_buffer);</div><div class='add'>+		io_sq-&gt;bounce_buf_ctrl.base_buffer = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int wait_for_reset_state(struct ena_com_dev *ena_dev, u32 timeout,</div><div class='add'>+				u16 exp_state)</div><div class='add'>+{</div><div class='add'>+	u32 val, exp = 0;</div><div class='add'>+	unsigned long timeout_stamp;</div><div class='add'>+</div><div class='add'>+	/* Convert timeout from resolution of 100ms to us resolution. */</div><div class='add'>+	timeout_stamp = jiffies + usecs_to_jiffies(100 * 1000 * timeout);</div><div class='add'>+</div><div class='add'>+	while (1) {</div><div class='add'>+		val = ena_com_reg_bar_read32(ena_dev, ENA_REGS_DEV_STS_OFF);</div><div class='add'>+</div><div class='add'>+		if (unlikely(val == ENA_MMIO_READ_TIMEOUT)) {</div><div class='add'>+			netdev_err(ena_dev-&gt;net_device, "Reg read timeout occurred\n");</div><div class='add'>+			return -ETIME;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if ((val &amp; ENA_REGS_DEV_STS_RESET_IN_PROGRESS_MASK) ==</div><div class='add'>+			exp_state)</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		if (time_is_before_jiffies(timeout_stamp))</div><div class='add'>+			return -ETIME;</div><div class='add'>+</div><div class='add'>+		ena_delay_exponential_backoff_us(exp++, ena_dev-&gt;ena_min_poll_delay_us);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool ena_com_check_supported_feature_id(struct ena_com_dev *ena_dev,</div><div class='add'>+					       enum ena_admin_aq_feature_id feature_id)</div><div class='add'>+{</div><div class='add'>+	u32 feature_mask = 1 &lt;&lt; feature_id;</div><div class='add'>+</div><div class='add'>+	/* Device attributes is always supported */</div><div class='add'>+	if ((feature_id != ENA_ADMIN_DEVICE_ATTRIBUTES) &amp;&amp;</div><div class='add'>+	    !(ena_dev-&gt;supported_features &amp; feature_mask))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_com_get_feature_ex(struct ena_com_dev *ena_dev,</div><div class='add'>+				  struct ena_admin_get_feat_resp *get_resp,</div><div class='add'>+				  enum ena_admin_aq_feature_id feature_id,</div><div class='add'>+				  dma_addr_t control_buf_dma_addr,</div><div class='add'>+				  u32 control_buff_size,</div><div class='add'>+				  u8 feature_ver)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_admin_queue *admin_queue;</div><div class='add'>+	struct ena_admin_get_feat_cmd get_cmd;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!ena_com_check_supported_feature_id(ena_dev, feature_id)) {</div><div class='add'>+		netdev_dbg(ena_dev-&gt;net_device, "Feature %d isn't supported\n", feature_id);</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memset(&amp;get_cmd, 0x0, sizeof(get_cmd));</div><div class='add'>+	admin_queue = &amp;ena_dev-&gt;admin_queue;</div><div class='add'>+</div><div class='add'>+	get_cmd.aq_common_descriptor.opcode = ENA_ADMIN_GET_FEATURE;</div><div class='add'>+</div><div class='add'>+	if (control_buff_size)</div><div class='add'>+		get_cmd.aq_common_descriptor.flags =</div><div class='add'>+			ENA_ADMIN_AQ_COMMON_DESC_CTRL_DATA_INDIRECT_MASK;</div><div class='add'>+	else</div><div class='add'>+		get_cmd.aq_common_descriptor.flags = 0;</div><div class='add'>+</div><div class='add'>+	ret = ena_com_mem_addr_set(ena_dev,</div><div class='add'>+				   &amp;get_cmd.control_buffer.address,</div><div class='add'>+				   control_buf_dma_addr);</div><div class='add'>+	if (unlikely(ret)) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Memory address set failed\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	get_cmd.control_buffer.length = control_buff_size;</div><div class='add'>+	get_cmd.feat_common.feature_version = feature_ver;</div><div class='add'>+	get_cmd.feat_common.feature_id = feature_id;</div><div class='add'>+</div><div class='add'>+	ret = ena_com_execute_admin_command(admin_queue,</div><div class='add'>+					    (struct ena_admin_aq_entry *)</div><div class='add'>+					    &amp;get_cmd,</div><div class='add'>+					    sizeof(get_cmd),</div><div class='add'>+					    (struct ena_admin_acq_entry *)</div><div class='add'>+					    get_resp,</div><div class='add'>+					    sizeof(*get_resp));</div><div class='add'>+</div><div class='add'>+	if (unlikely(ret))</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device,</div><div class='add'>+			   "Failed to submit get_feature command %d error: %d\n", feature_id, ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_com_get_feature(struct ena_com_dev *ena_dev,</div><div class='add'>+			       struct ena_admin_get_feat_resp *get_resp,</div><div class='add'>+			       enum ena_admin_aq_feature_id feature_id,</div><div class='add'>+			       u8 feature_ver)</div><div class='add'>+{</div><div class='add'>+	return ena_com_get_feature_ex(ena_dev,</div><div class='add'>+				      get_resp,</div><div class='add'>+				      feature_id,</div><div class='add'>+				      0,</div><div class='add'>+				      0,</div><div class='add'>+				      feature_ver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_get_current_hash_function(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	return ena_dev-&gt;rss.hash_func;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_com_hash_key_fill_default_key(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	struct ena_admin_feature_rss_flow_hash_control *hash_key =</div><div class='add'>+		(ena_dev-&gt;rss).hash_key;</div><div class='add'>+</div><div class='add'>+	netdev_rss_key_fill(&amp;hash_key-&gt;key, sizeof(hash_key-&gt;key));</div><div class='add'>+	/* The key buffer is stored in the device in an array of</div><div class='add'>+	 * uint32 elements.</div><div class='add'>+	 */</div><div class='add'>+	hash_key-&gt;key_parts = ENA_ADMIN_RSS_KEY_PARTS;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_com_hash_key_allocate(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	struct ena_rss *rss = &amp;ena_dev-&gt;rss;</div><div class='add'>+</div><div class='add'>+	if (!ena_com_check_supported_feature_id(ena_dev, ENA_ADMIN_RSS_HASH_FUNCTION))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	rss-&gt;hash_key = dma_alloc_coherent(ena_dev-&gt;dmadev, sizeof(*rss-&gt;hash_key),</div><div class='add'>+					   &amp;rss-&gt;hash_key_dma_addr, GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	if (unlikely(!rss-&gt;hash_key))</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_com_hash_key_destroy(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	struct ena_rss *rss = &amp;ena_dev-&gt;rss;</div><div class='add'>+</div><div class='add'>+	if (rss-&gt;hash_key)</div><div class='add'>+		dma_free_coherent(ena_dev-&gt;dmadev, sizeof(*rss-&gt;hash_key), rss-&gt;hash_key,</div><div class='add'>+				  rss-&gt;hash_key_dma_addr);</div><div class='add'>+	rss-&gt;hash_key = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_com_hash_ctrl_init(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	struct ena_rss *rss = &amp;ena_dev-&gt;rss;</div><div class='add'>+</div><div class='add'>+	rss-&gt;hash_ctrl = dma_alloc_coherent(ena_dev-&gt;dmadev, sizeof(*rss-&gt;hash_ctrl),</div><div class='add'>+					    &amp;rss-&gt;hash_ctrl_dma_addr, GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	if (unlikely(!rss-&gt;hash_ctrl))</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_com_hash_ctrl_destroy(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	struct ena_rss *rss = &amp;ena_dev-&gt;rss;</div><div class='add'>+</div><div class='add'>+	if (rss-&gt;hash_ctrl)</div><div class='add'>+		dma_free_coherent(ena_dev-&gt;dmadev, sizeof(*rss-&gt;hash_ctrl), rss-&gt;hash_ctrl,</div><div class='add'>+				  rss-&gt;hash_ctrl_dma_addr);</div><div class='add'>+	rss-&gt;hash_ctrl = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_com_indirect_table_allocate(struct ena_com_dev *ena_dev,</div><div class='add'>+					   u16 log_size)</div><div class='add'>+{</div><div class='add'>+	struct ena_rss *rss = &amp;ena_dev-&gt;rss;</div><div class='add'>+	struct ena_admin_get_feat_resp get_resp;</div><div class='add'>+	size_t tbl_size;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = ena_com_get_feature(ena_dev, &amp;get_resp,</div><div class='add'>+				  ENA_ADMIN_RSS_INDIRECTION_TABLE_CONFIG, 0);</div><div class='add'>+	if (unlikely(ret))</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if ((get_resp.u.ind_table.min_size &gt; log_size) ||</div><div class='add'>+	    (get_resp.u.ind_table.max_size &lt; log_size)) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device,</div><div class='add'>+			   "Indirect table size doesn't fit. requested size: %d while min is:%d and max %d\n",</div><div class='add'>+			   1 &lt;&lt; log_size, 1 &lt;&lt; get_resp.u.ind_table.min_size,</div><div class='add'>+			   1 &lt;&lt; get_resp.u.ind_table.max_size);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tbl_size = (1ULL &lt;&lt; log_size) *</div><div class='add'>+		sizeof(struct ena_admin_rss_ind_table_entry);</div><div class='add'>+</div><div class='add'>+	rss-&gt;rss_ind_tbl = dma_alloc_coherent(ena_dev-&gt;dmadev, tbl_size, &amp;rss-&gt;rss_ind_tbl_dma_addr,</div><div class='add'>+					      GFP_KERNEL);</div><div class='add'>+	if (unlikely(!rss-&gt;rss_ind_tbl))</div><div class='add'>+		goto mem_err1;</div><div class='add'>+</div><div class='add'>+	tbl_size = (1ULL &lt;&lt; log_size) * sizeof(u16);</div><div class='add'>+	rss-&gt;host_rss_ind_tbl = devm_kzalloc(ena_dev-&gt;dmadev, tbl_size, GFP_KERNEL);</div><div class='add'>+	if (unlikely(!rss-&gt;host_rss_ind_tbl))</div><div class='add'>+		goto mem_err2;</div><div class='add'>+</div><div class='add'>+	rss-&gt;tbl_log_size = log_size;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+mem_err2:</div><div class='add'>+	tbl_size = (1ULL &lt;&lt; log_size) *</div><div class='add'>+		sizeof(struct ena_admin_rss_ind_table_entry);</div><div class='add'>+</div><div class='add'>+	dma_free_coherent(ena_dev-&gt;dmadev, tbl_size, rss-&gt;rss_ind_tbl, rss-&gt;rss_ind_tbl_dma_addr);</div><div class='add'>+	rss-&gt;rss_ind_tbl = NULL;</div><div class='add'>+mem_err1:</div><div class='add'>+	rss-&gt;tbl_log_size = 0;</div><div class='add'>+	return -ENOMEM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_com_indirect_table_destroy(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	struct ena_rss *rss = &amp;ena_dev-&gt;rss;</div><div class='add'>+	size_t tbl_size = (1ULL &lt;&lt; rss-&gt;tbl_log_size) *</div><div class='add'>+		sizeof(struct ena_admin_rss_ind_table_entry);</div><div class='add'>+</div><div class='add'>+	if (rss-&gt;rss_ind_tbl)</div><div class='add'>+		dma_free_coherent(ena_dev-&gt;dmadev, tbl_size, rss-&gt;rss_ind_tbl,</div><div class='add'>+				  rss-&gt;rss_ind_tbl_dma_addr);</div><div class='add'>+	rss-&gt;rss_ind_tbl = NULL;</div><div class='add'>+</div><div class='add'>+	if (rss-&gt;host_rss_ind_tbl)</div><div class='add'>+		devm_kfree(ena_dev-&gt;dmadev, rss-&gt;host_rss_ind_tbl);</div><div class='add'>+	rss-&gt;host_rss_ind_tbl = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_com_create_io_sq(struct ena_com_dev *ena_dev,</div><div class='add'>+				struct ena_com_io_sq *io_sq, u16 cq_idx)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_admin_queue *admin_queue = &amp;ena_dev-&gt;admin_queue;</div><div class='add'>+	struct ena_admin_aq_create_sq_cmd create_cmd;</div><div class='add'>+	struct ena_admin_acq_create_sq_resp_desc cmd_completion;</div><div class='add'>+	u8 direction;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	memset(&amp;create_cmd, 0x0, sizeof(create_cmd));</div><div class='add'>+</div><div class='add'>+	create_cmd.aq_common_descriptor.opcode = ENA_ADMIN_CREATE_SQ;</div><div class='add'>+</div><div class='add'>+	if (io_sq-&gt;direction == ENA_COM_IO_QUEUE_DIRECTION_TX)</div><div class='add'>+		direction = ENA_ADMIN_SQ_DIRECTION_TX;</div><div class='add'>+	else</div><div class='add'>+		direction = ENA_ADMIN_SQ_DIRECTION_RX;</div><div class='add'>+</div><div class='add'>+	create_cmd.sq_identity |= (direction &lt;&lt;</div><div class='add'>+		ENA_ADMIN_AQ_CREATE_SQ_CMD_SQ_DIRECTION_SHIFT) &amp;</div><div class='add'>+		ENA_ADMIN_AQ_CREATE_SQ_CMD_SQ_DIRECTION_MASK;</div><div class='add'>+</div><div class='add'>+	create_cmd.sq_caps_2 |= io_sq-&gt;mem_queue_type &amp;</div><div class='add'>+		ENA_ADMIN_AQ_CREATE_SQ_CMD_PLACEMENT_POLICY_MASK;</div><div class='add'>+</div><div class='add'>+	create_cmd.sq_caps_2 |= (ENA_ADMIN_COMPLETION_POLICY_DESC &lt;&lt;</div><div class='add'>+		ENA_ADMIN_AQ_CREATE_SQ_CMD_COMPLETION_POLICY_SHIFT) &amp;</div><div class='add'>+		ENA_ADMIN_AQ_CREATE_SQ_CMD_COMPLETION_POLICY_MASK;</div><div class='add'>+</div><div class='add'>+	create_cmd.sq_caps_3 |=</div><div class='add'>+		ENA_ADMIN_AQ_CREATE_SQ_CMD_IS_PHYSICALLY_CONTIGUOUS_MASK;</div><div class='add'>+</div><div class='add'>+	create_cmd.cq_idx = cq_idx;</div><div class='add'>+	create_cmd.sq_depth = io_sq-&gt;q_depth;</div><div class='add'>+</div><div class='add'>+	if (io_sq-&gt;mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_HOST) {</div><div class='add'>+		ret = ena_com_mem_addr_set(ena_dev,</div><div class='add'>+					   &amp;create_cmd.sq_ba,</div><div class='add'>+					   io_sq-&gt;desc_addr.phys_addr);</div><div class='add'>+		if (unlikely(ret)) {</div><div class='add'>+			netdev_err(ena_dev-&gt;net_device, "Memory address set failed\n");</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ena_com_execute_admin_command(admin_queue,</div><div class='add'>+					    (struct ena_admin_aq_entry *)&amp;create_cmd,</div><div class='add'>+					    sizeof(create_cmd),</div><div class='add'>+					    (struct ena_admin_acq_entry *)&amp;cmd_completion,</div><div class='add'>+					    sizeof(cmd_completion));</div><div class='add'>+	if (unlikely(ret)) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Failed to create IO SQ. error: %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	io_sq-&gt;idx = cmd_completion.sq_idx;</div><div class='add'>+</div><div class='add'>+	io_sq-&gt;db_addr = (u32 __iomem *)((uintptr_t)ena_dev-&gt;reg_bar +</div><div class='add'>+		(uintptr_t)cmd_completion.sq_doorbell_offset);</div><div class='add'>+</div><div class='add'>+	if (io_sq-&gt;mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) {</div><div class='add'>+		io_sq-&gt;desc_addr.pbuf_dev_addr =</div><div class='add'>+			(u8 __iomem *)((uintptr_t)ena_dev-&gt;mem_bar +</div><div class='add'>+			cmd_completion.llq_descriptors_offset);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev_dbg(ena_dev-&gt;net_device, "Created sq[%u], depth[%u]\n", io_sq-&gt;idx, io_sq-&gt;q_depth);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_com_ind_tbl_convert_to_device(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	struct ena_rss *rss = &amp;ena_dev-&gt;rss;</div><div class='add'>+	struct ena_com_io_sq *io_sq;</div><div class='add'>+	u16 qid;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 1 &lt;&lt; rss-&gt;tbl_log_size; i++) {</div><div class='add'>+		qid = rss-&gt;host_rss_ind_tbl[i];</div><div class='add'>+		if (qid &gt;= ENA_TOTAL_NUM_QUEUES)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		io_sq = &amp;ena_dev-&gt;io_sq_queues[qid];</div><div class='add'>+</div><div class='add'>+		if (io_sq-&gt;direction != ENA_COM_IO_QUEUE_DIRECTION_RX)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		rss-&gt;rss_ind_tbl[i].cq_idx = io_sq-&gt;idx;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_com_update_intr_delay_resolution(struct ena_com_dev *ena_dev,</div><div class='add'>+						 u16 intr_delay_resolution)</div><div class='add'>+{</div><div class='add'>+	u16 prev_intr_delay_resolution = ena_dev-&gt;intr_delay_resolution;</div><div class='add'>+</div><div class='add'>+	if (unlikely(!intr_delay_resolution)) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device,</div><div class='add'>+			   "Illegal intr_delay_resolution provided. Going to use default 1 usec resolution\n");</div><div class='add'>+		intr_delay_resolution = ENA_DEFAULT_INTR_DELAY_RESOLUTION;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* update Rx */</div><div class='add'>+	ena_dev-&gt;intr_moder_rx_interval =</div><div class='add'>+		ena_dev-&gt;intr_moder_rx_interval *</div><div class='add'>+		prev_intr_delay_resolution /</div><div class='add'>+		intr_delay_resolution;</div><div class='add'>+</div><div class='add'>+	/* update Tx */</div><div class='add'>+	ena_dev-&gt;intr_moder_tx_interval =</div><div class='add'>+		ena_dev-&gt;intr_moder_tx_interval *</div><div class='add'>+		prev_intr_delay_resolution /</div><div class='add'>+		intr_delay_resolution;</div><div class='add'>+</div><div class='add'>+	ena_dev-&gt;intr_delay_resolution = intr_delay_resolution;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*****************************************************************************/</div><div class='add'>+/*******************************      API       ******************************/</div><div class='add'>+/*****************************************************************************/</div><div class='add'>+</div><div class='add'>+int ena_com_execute_admin_command(struct ena_com_admin_queue *admin_queue,</div><div class='add'>+				  struct ena_admin_aq_entry *cmd,</div><div class='add'>+				  size_t cmd_size,</div><div class='add'>+				  struct ena_admin_acq_entry *comp,</div><div class='add'>+				  size_t comp_size)</div><div class='add'>+{</div><div class='add'>+	struct ena_comp_ctx *comp_ctx;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	comp_ctx = ena_com_submit_admin_cmd(admin_queue, cmd, cmd_size,</div><div class='add'>+					    comp, comp_size);</div><div class='add'>+	if (IS_ERR(comp_ctx)) {</div><div class='add'>+		ret = PTR_ERR(comp_ctx);</div><div class='add'>+		if (ret == -ENODEV)</div><div class='add'>+			netdev_dbg(admin_queue-&gt;ena_dev-&gt;net_device,</div><div class='add'>+				   "Failed to submit command [%d]\n", ret);</div><div class='add'>+		else</div><div class='add'>+			netdev_err(admin_queue-&gt;ena_dev-&gt;net_device,</div><div class='add'>+				   "Failed to submit command [%d]\n", ret);</div><div class='add'>+</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ena_com_wait_and_process_admin_cq(comp_ctx, admin_queue);</div><div class='add'>+	if (unlikely(ret)) {</div><div class='add'>+		if (admin_queue-&gt;running_state)</div><div class='add'>+			netdev_err(admin_queue-&gt;ena_dev-&gt;net_device,</div><div class='add'>+				   "Failed to process command. ret = %d\n", ret);</div><div class='add'>+		else</div><div class='add'>+			netdev_dbg(admin_queue-&gt;ena_dev-&gt;net_device,</div><div class='add'>+				   "Failed to process command. ret = %d\n", ret);</div><div class='add'>+	}</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_create_io_cq(struct ena_com_dev *ena_dev,</div><div class='add'>+			 struct ena_com_io_cq *io_cq)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_admin_queue *admin_queue = &amp;ena_dev-&gt;admin_queue;</div><div class='add'>+	struct ena_admin_aq_create_cq_cmd create_cmd;</div><div class='add'>+	struct ena_admin_acq_create_cq_resp_desc cmd_completion;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	memset(&amp;create_cmd, 0x0, sizeof(create_cmd));</div><div class='add'>+</div><div class='add'>+	create_cmd.aq_common_descriptor.opcode = ENA_ADMIN_CREATE_CQ;</div><div class='add'>+</div><div class='add'>+	create_cmd.cq_caps_2 |= (io_cq-&gt;cdesc_entry_size_in_bytes / 4) &amp;</div><div class='add'>+		ENA_ADMIN_AQ_CREATE_CQ_CMD_CQ_ENTRY_SIZE_WORDS_MASK;</div><div class='add'>+	create_cmd.cq_caps_1 |=</div><div class='add'>+		ENA_ADMIN_AQ_CREATE_CQ_CMD_INTERRUPT_MODE_ENABLED_MASK;</div><div class='add'>+</div><div class='add'>+	create_cmd.msix_vector = io_cq-&gt;msix_vector;</div><div class='add'>+	create_cmd.cq_depth = io_cq-&gt;q_depth;</div><div class='add'>+</div><div class='add'>+	ret = ena_com_mem_addr_set(ena_dev,</div><div class='add'>+				   &amp;create_cmd.cq_ba,</div><div class='add'>+				   io_cq-&gt;cdesc_addr.phys_addr);</div><div class='add'>+	if (unlikely(ret)) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Memory address set failed\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ena_com_execute_admin_command(admin_queue,</div><div class='add'>+					    (struct ena_admin_aq_entry *)&amp;create_cmd,</div><div class='add'>+					    sizeof(create_cmd),</div><div class='add'>+					    (struct ena_admin_acq_entry *)&amp;cmd_completion,</div><div class='add'>+					    sizeof(cmd_completion));</div><div class='add'>+	if (unlikely(ret)) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Failed to create IO CQ. error: %d\n", ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	io_cq-&gt;idx = cmd_completion.cq_idx;</div><div class='add'>+</div><div class='add'>+	io_cq-&gt;unmask_reg = (u32 __iomem *)((uintptr_t)ena_dev-&gt;reg_bar +</div><div class='add'>+		cmd_completion.cq_interrupt_unmask_register_offset);</div><div class='add'>+</div><div class='add'>+	if (cmd_completion.numa_node_register_offset)</div><div class='add'>+		io_cq-&gt;numa_node_cfg_reg =</div><div class='add'>+			(u32 __iomem *)((uintptr_t)ena_dev-&gt;reg_bar +</div><div class='add'>+			cmd_completion.numa_node_register_offset);</div><div class='add'>+</div><div class='add'>+	netdev_dbg(ena_dev-&gt;net_device, "Created cq[%u], depth[%u]\n", io_cq-&gt;idx, io_cq-&gt;q_depth);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_get_io_handlers(struct ena_com_dev *ena_dev, u16 qid,</div><div class='add'>+			    struct ena_com_io_sq **io_sq,</div><div class='add'>+			    struct ena_com_io_cq **io_cq)</div><div class='add'>+{</div><div class='add'>+	if (qid &gt;= ENA_TOTAL_NUM_QUEUES) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Invalid queue number %d but the max is %d\n", qid,</div><div class='add'>+			   ENA_TOTAL_NUM_QUEUES);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*io_sq = &amp;ena_dev-&gt;io_sq_queues[qid];</div><div class='add'>+	*io_cq = &amp;ena_dev-&gt;io_cq_queues[qid];</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_com_abort_admin_commands(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_admin_queue *admin_queue = &amp;ena_dev-&gt;admin_queue;</div><div class='add'>+	struct ena_comp_ctx *comp_ctx;</div><div class='add'>+	u16 i;</div><div class='add'>+</div><div class='add'>+	if (!admin_queue-&gt;comp_ctx)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; admin_queue-&gt;q_depth; i++) {</div><div class='add'>+		comp_ctx = get_comp_ctxt(admin_queue, i, false);</div><div class='add'>+		if (unlikely(!comp_ctx))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		comp_ctx-&gt;status = ENA_CMD_ABORTED;</div><div class='add'>+</div><div class='add'>+		complete(&amp;comp_ctx-&gt;wait_event);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_com_wait_for_abort_completion(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_admin_queue *admin_queue = &amp;ena_dev-&gt;admin_queue;</div><div class='add'>+	unsigned long flags = 0;</div><div class='add'>+	u32 exp = 0;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;admin_queue-&gt;q_lock, flags);</div><div class='add'>+	while (atomic_read(&amp;admin_queue-&gt;outstanding_cmds) != 0) {</div><div class='add'>+		spin_unlock_irqrestore(&amp;admin_queue-&gt;q_lock, flags);</div><div class='add'>+		ena_delay_exponential_backoff_us(exp++, ena_dev-&gt;ena_min_poll_delay_us);</div><div class='add'>+		spin_lock_irqsave(&amp;admin_queue-&gt;q_lock, flags);</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;admin_queue-&gt;q_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_destroy_io_cq(struct ena_com_dev *ena_dev,</div><div class='add'>+			  struct ena_com_io_cq *io_cq)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_admin_queue *admin_queue = &amp;ena_dev-&gt;admin_queue;</div><div class='add'>+	struct ena_admin_aq_destroy_cq_cmd destroy_cmd;</div><div class='add'>+	struct ena_admin_acq_destroy_cq_resp_desc destroy_resp;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	memset(&amp;destroy_cmd, 0x0, sizeof(destroy_cmd));</div><div class='add'>+</div><div class='add'>+	destroy_cmd.cq_idx = io_cq-&gt;idx;</div><div class='add'>+	destroy_cmd.aq_common_descriptor.opcode = ENA_ADMIN_DESTROY_CQ;</div><div class='add'>+</div><div class='add'>+	ret = ena_com_execute_admin_command(admin_queue,</div><div class='add'>+					    (struct ena_admin_aq_entry *)&amp;destroy_cmd,</div><div class='add'>+					    sizeof(destroy_cmd),</div><div class='add'>+					    (struct ena_admin_acq_entry *)&amp;destroy_resp,</div><div class='add'>+					    sizeof(destroy_resp));</div><div class='add'>+</div><div class='add'>+	if (unlikely(ret &amp;&amp; (ret != -ENODEV)))</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Failed to destroy IO CQ. error: %d\n", ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool ena_com_get_admin_running_state(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	return ena_dev-&gt;admin_queue.running_state;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_com_set_admin_running_state(struct ena_com_dev *ena_dev, bool state)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_admin_queue *admin_queue = &amp;ena_dev-&gt;admin_queue;</div><div class='add'>+	unsigned long flags = 0;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;admin_queue-&gt;q_lock, flags);</div><div class='add'>+	ena_dev-&gt;admin_queue.running_state = state;</div><div class='add'>+	spin_unlock_irqrestore(&amp;admin_queue-&gt;q_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_com_admin_aenq_enable(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	u16 depth = ena_dev-&gt;aenq.q_depth;</div><div class='add'>+</div><div class='add'>+	WARN(ena_dev-&gt;aenq.head != depth, "Invalid AENQ state\n");</div><div class='add'>+</div><div class='add'>+	/* Init head_db to mark that all entries in the queue</div><div class='add'>+	 * are initially available</div><div class='add'>+	 */</div><div class='add'>+	writel(depth, ena_dev-&gt;reg_bar + ENA_REGS_AENQ_HEAD_DB_OFF);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_set_aenq_config(struct ena_com_dev *ena_dev, u32 groups_flag)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_admin_queue *admin_queue;</div><div class='add'>+	struct ena_admin_set_feat_cmd cmd;</div><div class='add'>+	struct ena_admin_set_feat_resp resp;</div><div class='add'>+	struct ena_admin_get_feat_resp get_resp;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = ena_com_get_feature(ena_dev, &amp;get_resp, ENA_ADMIN_AENQ_CONFIG, 0);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_info(ena_dev-&gt;dmadev, "Can't get aenq configuration\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((get_resp.u.aenq.supported_groups &amp; groups_flag) != groups_flag) {</div><div class='add'>+		netdev_warn(ena_dev-&gt;net_device,</div><div class='add'>+			    "Trying to set unsupported aenq events. supported flag: 0x%x asked flag: 0x%x\n",</div><div class='add'>+			    get_resp.u.aenq.supported_groups, groups_flag);</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memset(&amp;cmd, 0x0, sizeof(cmd));</div><div class='add'>+	admin_queue = &amp;ena_dev-&gt;admin_queue;</div><div class='add'>+</div><div class='add'>+	cmd.aq_common_descriptor.opcode = ENA_ADMIN_SET_FEATURE;</div><div class='add'>+	cmd.aq_common_descriptor.flags = 0;</div><div class='add'>+	cmd.feat_common.feature_id = ENA_ADMIN_AENQ_CONFIG;</div><div class='add'>+	cmd.u.aenq.enabled_groups = groups_flag;</div><div class='add'>+</div><div class='add'>+	ret = ena_com_execute_admin_command(admin_queue,</div><div class='add'>+					    (struct ena_admin_aq_entry *)&amp;cmd,</div><div class='add'>+					    sizeof(cmd),</div><div class='add'>+					    (struct ena_admin_acq_entry *)&amp;resp,</div><div class='add'>+					    sizeof(resp));</div><div class='add'>+</div><div class='add'>+	if (unlikely(ret))</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Failed to config AENQ ret: %d\n", ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_get_dma_width(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	u32 caps = ena_com_reg_bar_read32(ena_dev, ENA_REGS_CAPS_OFF);</div><div class='add'>+	u32 width;</div><div class='add'>+</div><div class='add'>+	if (unlikely(caps == ENA_MMIO_READ_TIMEOUT)) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Reg read timeout occurred\n");</div><div class='add'>+		return -ETIME;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	width = (caps &amp; ENA_REGS_CAPS_DMA_ADDR_WIDTH_MASK) &gt;&gt;</div><div class='add'>+		ENA_REGS_CAPS_DMA_ADDR_WIDTH_SHIFT;</div><div class='add'>+</div><div class='add'>+	netdev_dbg(ena_dev-&gt;net_device, "ENA dma width: %d\n", width);</div><div class='add'>+</div><div class='add'>+	if ((width &lt; 32) || width &gt; ENA_MAX_PHYS_ADDR_SIZE_BITS) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "DMA width illegal value: %d\n", width);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ena_dev-&gt;dma_addr_bits = width;</div><div class='add'>+</div><div class='add'>+	return width;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_validate_version(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	u32 ver;</div><div class='add'>+	u32 ctrl_ver;</div><div class='add'>+	u32 ctrl_ver_masked;</div><div class='add'>+</div><div class='add'>+	/* Make sure the ENA version and the controller version are at least</div><div class='add'>+	 * as the driver expects</div><div class='add'>+	 */</div><div class='add'>+	ver = ena_com_reg_bar_read32(ena_dev, ENA_REGS_VERSION_OFF);</div><div class='add'>+	ctrl_ver = ena_com_reg_bar_read32(ena_dev,</div><div class='add'>+					  ENA_REGS_CONTROLLER_VERSION_OFF);</div><div class='add'>+</div><div class='add'>+	if (unlikely((ver == ENA_MMIO_READ_TIMEOUT) || (ctrl_ver == ENA_MMIO_READ_TIMEOUT))) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Reg read timeout occurred\n");</div><div class='add'>+		return -ETIME;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_info(ena_dev-&gt;dmadev, "ENA device version: %d.%d\n",</div><div class='add'>+		 (ver &amp; ENA_REGS_VERSION_MAJOR_VERSION_MASK) &gt;&gt; ENA_REGS_VERSION_MAJOR_VERSION_SHIFT,</div><div class='add'>+		 ver &amp; ENA_REGS_VERSION_MINOR_VERSION_MASK);</div><div class='add'>+</div><div class='add'>+	dev_info(ena_dev-&gt;dmadev, "ENA controller version: %d.%d.%d implementation version %d\n",</div><div class='add'>+		 (ctrl_ver &amp; ENA_REGS_CONTROLLER_VERSION_MAJOR_VERSION_MASK) &gt;&gt;</div><div class='add'>+			 ENA_REGS_CONTROLLER_VERSION_MAJOR_VERSION_SHIFT,</div><div class='add'>+		 (ctrl_ver &amp; ENA_REGS_CONTROLLER_VERSION_MINOR_VERSION_MASK) &gt;&gt;</div><div class='add'>+			 ENA_REGS_CONTROLLER_VERSION_MINOR_VERSION_SHIFT,</div><div class='add'>+		 (ctrl_ver &amp; ENA_REGS_CONTROLLER_VERSION_SUBMINOR_VERSION_MASK),</div><div class='add'>+		 (ctrl_ver &amp; ENA_REGS_CONTROLLER_VERSION_IMPL_ID_MASK) &gt;&gt;</div><div class='add'>+			 ENA_REGS_CONTROLLER_VERSION_IMPL_ID_SHIFT);</div><div class='add'>+</div><div class='add'>+	ctrl_ver_masked =</div><div class='add'>+		(ctrl_ver &amp; ENA_REGS_CONTROLLER_VERSION_MAJOR_VERSION_MASK) |</div><div class='add'>+		(ctrl_ver &amp; ENA_REGS_CONTROLLER_VERSION_MINOR_VERSION_MASK) |</div><div class='add'>+		(ctrl_ver &amp; ENA_REGS_CONTROLLER_VERSION_SUBMINOR_VERSION_MASK);</div><div class='add'>+</div><div class='add'>+	/* Validate the ctrl version without the implementation ID */</div><div class='add'>+	if (ctrl_ver_masked &lt; MIN_ENA_CTRL_VER) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device,</div><div class='add'>+			   "ENA ctrl version is lower than the minimal ctrl version the driver supports\n");</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+ena_com_free_ena_admin_queue_comp_ctx(struct ena_com_dev *ena_dev,</div><div class='add'>+				      struct ena_com_admin_queue *admin_queue)</div><div class='add'>+</div><div class='add'>+{</div><div class='add'>+	if (!admin_queue-&gt;comp_ctx)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	devm_kfree(ena_dev-&gt;dmadev, admin_queue-&gt;comp_ctx);</div><div class='add'>+</div><div class='add'>+	admin_queue-&gt;comp_ctx = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_com_admin_destroy(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_admin_queue *admin_queue = &amp;ena_dev-&gt;admin_queue;</div><div class='add'>+	struct ena_com_admin_cq *cq = &amp;admin_queue-&gt;cq;</div><div class='add'>+	struct ena_com_admin_sq *sq = &amp;admin_queue-&gt;sq;</div><div class='add'>+	struct ena_com_aenq *aenq = &amp;ena_dev-&gt;aenq;</div><div class='add'>+	u16 size;</div><div class='add'>+</div><div class='add'>+	ena_com_free_ena_admin_queue_comp_ctx(ena_dev, admin_queue);</div><div class='add'>+</div><div class='add'>+	size = ADMIN_SQ_SIZE(admin_queue-&gt;q_depth);</div><div class='add'>+	if (sq-&gt;entries)</div><div class='add'>+		dma_free_coherent(ena_dev-&gt;dmadev, size, sq-&gt;entries, sq-&gt;dma_addr);</div><div class='add'>+	sq-&gt;entries = NULL;</div><div class='add'>+</div><div class='add'>+	size = ADMIN_CQ_SIZE(admin_queue-&gt;q_depth);</div><div class='add'>+	if (cq-&gt;entries)</div><div class='add'>+		dma_free_coherent(ena_dev-&gt;dmadev, size, cq-&gt;entries, cq-&gt;dma_addr);</div><div class='add'>+	cq-&gt;entries = NULL;</div><div class='add'>+</div><div class='add'>+	size = ADMIN_AENQ_SIZE(aenq-&gt;q_depth);</div><div class='add'>+	if (ena_dev-&gt;aenq.entries)</div><div class='add'>+		dma_free_coherent(ena_dev-&gt;dmadev, size, aenq-&gt;entries, aenq-&gt;dma_addr);</div><div class='add'>+	aenq-&gt;entries = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_com_set_admin_polling_mode(struct ena_com_dev *ena_dev, bool polling)</div><div class='add'>+{</div><div class='add'>+	u32 mask_value = 0;</div><div class='add'>+</div><div class='add'>+	if (polling)</div><div class='add'>+		mask_value = ENA_REGS_ADMIN_INTR_MASK;</div><div class='add'>+</div><div class='add'>+	writel(mask_value, ena_dev-&gt;reg_bar + ENA_REGS_INTR_MASK_OFF);</div><div class='add'>+	ena_dev-&gt;admin_queue.polling = polling;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool ena_com_phc_supported(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	return ena_com_check_supported_feature_id(ena_dev, ENA_ADMIN_PHC_CONFIG);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_phc_init(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_phc_info *phc = &amp;ena_dev-&gt;phc;</div><div class='add'>+</div><div class='add'>+	memset(phc, 0x0, sizeof(*phc));</div><div class='add'>+</div><div class='add'>+	/* Allocate shared mem used PHC timestamp retrieved from device */</div><div class='add'>+	phc-&gt;virt_addr = dma_alloc_coherent(ena_dev-&gt;dmadev,</div><div class='add'>+					    sizeof(*phc-&gt;virt_addr),</div><div class='add'>+					    &amp;phc-&gt;phys_addr,</div><div class='add'>+					    GFP_KERNEL);</div><div class='add'>+	if (unlikely(!phc-&gt;virt_addr))</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;phc-&gt;lock);</div><div class='add'>+</div><div class='add'>+	phc-&gt;virt_addr-&gt;req_id = 0;</div><div class='add'>+	phc-&gt;virt_addr-&gt;timestamp = 0;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_phc_config(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_phc_info *phc = &amp;ena_dev-&gt;phc;</div><div class='add'>+	struct ena_admin_get_feat_resp get_feat_resp;</div><div class='add'>+	struct ena_admin_set_feat_resp set_feat_resp;</div><div class='add'>+	struct ena_admin_set_feat_cmd set_feat_cmd;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	/* Get device PHC default configuration */</div><div class='add'>+	ret = ena_com_get_feature(ena_dev,</div><div class='add'>+				  &amp;get_feat_resp,</div><div class='add'>+				  ENA_ADMIN_PHC_CONFIG,</div><div class='add'>+				  0);</div><div class='add'>+	if (unlikely(ret)) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device,</div><div class='add'>+			   "Failed to get PHC feature configuration, error: %d\n",</div><div class='add'>+			   ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Supporting only readless PHC retrieval */</div><div class='add'>+	if (get_feat_resp.u.phc.type != ENA_ADMIN_PHC_TYPE_READLESS) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device,</div><div class='add'>+			   "Unsupported PHC type, error: %d\n",</div><div class='add'>+			   -EOPNOTSUPP);</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Update PHC doorbell offset according to device value,</div><div class='add'>+	 * used to write req_id to PHC bar</div><div class='add'>+	 */</div><div class='add'>+	phc-&gt;doorbell_offset = get_feat_resp.u.phc.doorbell_offset;</div><div class='add'>+</div><div class='add'>+	/* Update PHC expire timeout according to device</div><div class='add'>+	 * or default driver value</div><div class='add'>+	 */</div><div class='add'>+	phc-&gt;expire_timeout_usec = (get_feat_resp.u.phc.expire_timeout_usec) ?</div><div class='add'>+				    get_feat_resp.u.phc.expire_timeout_usec :</div><div class='add'>+				    ENA_PHC_DEFAULT_EXPIRE_TIMEOUT_USEC;</div><div class='add'>+</div><div class='add'>+	/* Update PHC block timeout according to device</div><div class='add'>+	 * or default driver value</div><div class='add'>+	 */</div><div class='add'>+	phc-&gt;block_timeout_usec = (get_feat_resp.u.phc.block_timeout_usec) ?</div><div class='add'>+				   get_feat_resp.u.phc.block_timeout_usec :</div><div class='add'>+				   ENA_PHC_DEFAULT_BLOCK_TIMEOUT_USEC;</div><div class='add'>+</div><div class='add'>+	/* Sanity check - expire timeout must not exceed block timeout */</div><div class='add'>+	if (phc-&gt;expire_timeout_usec &gt; phc-&gt;block_timeout_usec)</div><div class='add'>+		phc-&gt;expire_timeout_usec = phc-&gt;block_timeout_usec;</div><div class='add'>+</div><div class='add'>+	/* Prepare PHC feature command */</div><div class='add'>+	memset(&amp;set_feat_cmd, 0x0, sizeof(set_feat_cmd));</div><div class='add'>+	set_feat_cmd.aq_common_descriptor.opcode = ENA_ADMIN_SET_FEATURE;</div><div class='add'>+	set_feat_cmd.feat_common.feature_id = ENA_ADMIN_PHC_CONFIG;</div><div class='add'>+	set_feat_cmd.u.phc.output_length = sizeof(*phc-&gt;virt_addr);</div><div class='add'>+	ret = ena_com_mem_addr_set(ena_dev,</div><div class='add'>+				   &amp;set_feat_cmd.u.phc.output_address,</div><div class='add'>+				   phc-&gt;phys_addr);</div><div class='add'>+	if (unlikely(ret)) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device,</div><div class='add'>+			   "Failed setting PHC output address, error: %d\n",</div><div class='add'>+			   ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Send PHC feature command to the device */</div><div class='add'>+	ret = ena_com_execute_admin_command(&amp;ena_dev-&gt;admin_queue,</div><div class='add'>+					    (struct ena_admin_aq_entry *)&amp;set_feat_cmd,</div><div class='add'>+					    sizeof(set_feat_cmd),</div><div class='add'>+					    (struct ena_admin_acq_entry *)&amp;set_feat_resp,</div><div class='add'>+					    sizeof(set_feat_resp));</div><div class='add'>+</div><div class='add'>+	if (unlikely(ret)) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device,</div><div class='add'>+			   "Failed to enable PHC, error: %d\n",</div><div class='add'>+			   ret);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	phc-&gt;active = true;</div><div class='add'>+	netdev_dbg(ena_dev-&gt;net_device, "PHC is active in the device\n");</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_com_phc_destroy(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_phc_info *phc = &amp;ena_dev-&gt;phc;</div><div class='add'>+	unsigned long flags = 0;</div><div class='add'>+</div><div class='add'>+	/* In case PHC is not supported by the device, silently exiting */</div><div class='add'>+	if (!phc-&gt;virt_addr)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;phc-&gt;lock, flags);</div><div class='add'>+	phc-&gt;active = false;</div><div class='add'>+	spin_unlock_irqrestore(&amp;phc-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	dma_free_coherent(ena_dev-&gt;dmadev,</div><div class='add'>+			  sizeof(*phc-&gt;virt_addr),</div><div class='add'>+			  phc-&gt;virt_addr,</div><div class='add'>+			  phc-&gt;phys_addr);</div><div class='add'>+	phc-&gt;virt_addr = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_phc_get_timestamp(struct ena_com_dev *ena_dev, u64 *timestamp)</div><div class='add'>+{</div><div class='add'>+	volatile struct ena_admin_phc_resp *resp = ena_dev-&gt;phc.virt_addr;</div><div class='add'>+	const ktime_t zero_system_time = ktime_set(0, 0);</div><div class='add'>+	struct ena_com_phc_info *phc = &amp;ena_dev-&gt;phc;</div><div class='add'>+	ktime_t expire_time;</div><div class='add'>+	ktime_t block_time;</div><div class='add'>+	unsigned long flags = 0;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (!phc-&gt;active) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "PHC feature is not active in the device\n");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;phc-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	/* Check if PHC is in blocked state */</div><div class='add'>+	if (unlikely(ktime_compare(phc-&gt;system_time, zero_system_time))) {</div><div class='add'>+		/* Check if blocking time expired */</div><div class='add'>+		block_time = ktime_add_us(phc-&gt;system_time, phc-&gt;block_timeout_usec);</div><div class='add'>+		if (!ktime_after(ktime_get(), block_time)) {</div><div class='add'>+			/* PHC is still in blocked state, skip PHC request */</div><div class='add'>+			phc-&gt;stats.phc_skp++;</div><div class='add'>+			ret = -EBUSY;</div><div class='add'>+			goto skip;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* PHC is in active state, update statistics according</div><div class='add'>+		 * to req_id and error_flags</div><div class='add'>+		 */</div><div class='add'>+		if (READ_ONCE(resp-&gt;req_id) != phc-&gt;req_id) {</div><div class='add'>+			/* Device didn't update req_id during blocking time,</div><div class='add'>+			 * this indicates on a device error</div><div class='add'>+			 */</div><div class='add'>+			netdev_err(ena_dev-&gt;net_device,</div><div class='add'>+				   "PHC get time request 0x%x failed (device error)\n",</div><div class='add'>+				   phc-&gt;req_id);</div><div class='add'>+			phc-&gt;stats.phc_err_dv++;</div><div class='add'>+		} else if (resp-&gt;error_flags &amp; ENA_PHC_ERROR_FLAGS) {</div><div class='add'>+			/* Device updated req_id during blocking time but got</div><div class='add'>+			 * a PHC error, this occurs if device:</div><div class='add'>+			 * - exceeded the get time request limit</div><div class='add'>+			 * - received an invalid timestamp</div><div class='add'>+			 */</div><div class='add'>+			netdev_err(ena_dev-&gt;net_device,</div><div class='add'>+				   "PHC get time request 0x%x failed (error 0x%x)\n",</div><div class='add'>+				   phc-&gt;req_id,</div><div class='add'>+				   resp-&gt;error_flags);</div><div class='add'>+			phc-&gt;stats.phc_err_ts += !!(resp-&gt;error_flags &amp;</div><div class='add'>+				ENA_ADMIN_PHC_ERROR_FLAG_TIMESTAMP);</div><div class='add'>+		} else {</div><div class='add'>+			/* Device updated req_id during blocking time</div><div class='add'>+			 * with valid timestamp</div><div class='add'>+			 */</div><div class='add'>+			phc-&gt;stats.phc_exp++;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Setting relative timeouts */</div><div class='add'>+	phc-&gt;system_time = ktime_get();</div><div class='add'>+	block_time = ktime_add_us(phc-&gt;system_time, phc-&gt;block_timeout_usec);</div><div class='add'>+	expire_time = ktime_add_us(phc-&gt;system_time, phc-&gt;expire_timeout_usec);</div><div class='add'>+</div><div class='add'>+	/* We expect the device to return this req_id once</div><div class='add'>+	 * the new PHC timestamp is updated</div><div class='add'>+	 */</div><div class='add'>+	phc-&gt;req_id++;</div><div class='add'>+</div><div class='add'>+	/* Initialize PHC shared memory with different req_id value</div><div class='add'>+	 * to be able to identify once the device changes it to req_id</div><div class='add'>+	 */</div><div class='add'>+	resp-&gt;req_id = phc-&gt;req_id + ENA_PHC_REQ_ID_OFFSET;</div><div class='add'>+</div><div class='add'>+	/* Writing req_id to PHC bar */</div><div class='add'>+	writel(phc-&gt;req_id, ena_dev-&gt;reg_bar + phc-&gt;doorbell_offset);</div><div class='add'>+</div><div class='add'>+	/* Stalling until the device updates req_id */</div><div class='add'>+	while (1) {</div><div class='add'>+		if (unlikely(ktime_after(ktime_get(), expire_time))) {</div><div class='add'>+			/* Gave up waiting for updated req_id, PHC enters into</div><div class='add'>+			 * blocked state until passing blocking time,</div><div class='add'>+			 * during this time any get PHC timestamp will fail with</div><div class='add'>+			 * device busy error</div><div class='add'>+			 */</div><div class='add'>+			ret = -EBUSY;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Check if req_id was updated by the device */</div><div class='add'>+		if (READ_ONCE(resp-&gt;req_id) != phc-&gt;req_id) {</div><div class='add'>+			/* req_id was not updated by the device yet,</div><div class='add'>+			 * check again on next loop</div><div class='add'>+			 */</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* req_id was updated by the device which indicates that</div><div class='add'>+		 * PHC timestamp and error_flags are updated too,</div><div class='add'>+		 * checking errors before retrieving timestamp</div><div class='add'>+		 */</div><div class='add'>+		if (unlikely(resp-&gt;error_flags &amp; ENA_PHC_ERROR_FLAGS)) {</div><div class='add'>+			/* Retrieved invalid PHC timestamp, PHC enters into</div><div class='add'>+			 * blocked state until passing blocking time,</div><div class='add'>+			 * during this time any get PHC timestamp requests</div><div class='add'>+			 * will fail with device busy error</div><div class='add'>+			 */</div><div class='add'>+			ret = -EBUSY;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* PHC timestamp value is returned to the caller */</div><div class='add'>+		*timestamp = resp-&gt;timestamp;</div><div class='add'>+</div><div class='add'>+		/* Update statistic on valid PHC timestamp retrieval */</div><div class='add'>+		phc-&gt;stats.phc_cnt++;</div><div class='add'>+</div><div class='add'>+		/* This indicates PHC state is active */</div><div class='add'>+		phc-&gt;system_time = zero_system_time;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+skip:</div><div class='add'>+	spin_unlock_irqrestore(&amp;phc-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_mmio_reg_read_request_init(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_mmio_read *mmio_read = &amp;ena_dev-&gt;mmio_read;</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;mmio_read-&gt;lock);</div><div class='add'>+	mmio_read-&gt;read_resp = dma_alloc_coherent(ena_dev-&gt;dmadev, sizeof(*mmio_read-&gt;read_resp),</div><div class='add'>+						  &amp;mmio_read-&gt;read_resp_dma_addr, GFP_KERNEL);</div><div class='add'>+	if (unlikely(!mmio_read-&gt;read_resp))</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	ena_com_mmio_reg_read_request_write_dev_addr(ena_dev);</div><div class='add'>+</div><div class='add'>+	mmio_read-&gt;read_resp-&gt;req_id = 0x0;</div><div class='add'>+	mmio_read-&gt;seq_num = 0x0;</div><div class='add'>+	mmio_read-&gt;readless_supported = true;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+</div><div class='add'>+	return -ENOMEM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_com_set_mmio_read_mode(struct ena_com_dev *ena_dev, bool readless_supported)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_mmio_read *mmio_read = &amp;ena_dev-&gt;mmio_read;</div><div class='add'>+</div><div class='add'>+	mmio_read-&gt;readless_supported = readless_supported;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_com_mmio_reg_read_request_destroy(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_mmio_read *mmio_read = &amp;ena_dev-&gt;mmio_read;</div><div class='add'>+</div><div class='add'>+	writel(0x0, ena_dev-&gt;reg_bar + ENA_REGS_MMIO_RESP_LO_OFF);</div><div class='add'>+	writel(0x0, ena_dev-&gt;reg_bar + ENA_REGS_MMIO_RESP_HI_OFF);</div><div class='add'>+</div><div class='add'>+	dma_free_coherent(ena_dev-&gt;dmadev, sizeof(*mmio_read-&gt;read_resp), mmio_read-&gt;read_resp,</div><div class='add'>+			  mmio_read-&gt;read_resp_dma_addr);</div><div class='add'>+</div><div class='add'>+	mmio_read-&gt;read_resp = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_com_mmio_reg_read_request_write_dev_addr(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_mmio_read *mmio_read = &amp;ena_dev-&gt;mmio_read;</div><div class='add'>+	u32 addr_low, addr_high;</div><div class='add'>+</div><div class='add'>+	addr_low = ENA_DMA_ADDR_TO_UINT32_LOW(mmio_read-&gt;read_resp_dma_addr);</div><div class='add'>+	addr_high = ENA_DMA_ADDR_TO_UINT32_HIGH(mmio_read-&gt;read_resp_dma_addr);</div><div class='add'>+</div><div class='add'>+	writel(addr_low, ena_dev-&gt;reg_bar + ENA_REGS_MMIO_RESP_LO_OFF);</div><div class='add'>+	writel(addr_high, ena_dev-&gt;reg_bar + ENA_REGS_MMIO_RESP_HI_OFF);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_admin_init(struct ena_com_dev *ena_dev,</div><div class='add'>+		       struct ena_aenq_handlers *aenq_handlers)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_admin_queue *admin_queue = &amp;ena_dev-&gt;admin_queue;</div><div class='add'>+	u32 aq_caps, acq_caps, dev_sts, addr_low, addr_high;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	dev_sts = ena_com_reg_bar_read32(ena_dev, ENA_REGS_DEV_STS_OFF);</div><div class='add'>+</div><div class='add'>+	if (unlikely(dev_sts == ENA_MMIO_READ_TIMEOUT)) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Reg read timeout occurred\n");</div><div class='add'>+		return -ETIME;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!(dev_sts &amp; ENA_REGS_DEV_STS_READY_MASK)) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Device isn't ready, abort com init\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	admin_queue-&gt;q_depth = ENA_ADMIN_QUEUE_DEPTH;</div><div class='add'>+</div><div class='add'>+	admin_queue-&gt;q_dmadev = ena_dev-&gt;dmadev;</div><div class='add'>+	admin_queue-&gt;polling = false;</div><div class='add'>+	admin_queue-&gt;curr_cmd_id = 0;</div><div class='add'>+</div><div class='add'>+	atomic_set(&amp;admin_queue-&gt;outstanding_cmds, 0);</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;admin_queue-&gt;q_lock);</div><div class='add'>+</div><div class='add'>+	ret = ena_com_init_comp_ctxt(admin_queue);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	ret = ena_com_admin_init_sq(admin_queue);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	ret = ena_com_admin_init_cq(admin_queue);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	admin_queue-&gt;sq.db_addr = (u32 __iomem *)((uintptr_t)ena_dev-&gt;reg_bar +</div><div class='add'>+		ENA_REGS_AQ_DB_OFF);</div><div class='add'>+</div><div class='add'>+	addr_low = ENA_DMA_ADDR_TO_UINT32_LOW(admin_queue-&gt;sq.dma_addr);</div><div class='add'>+	addr_high = ENA_DMA_ADDR_TO_UINT32_HIGH(admin_queue-&gt;sq.dma_addr);</div><div class='add'>+</div><div class='add'>+	writel(addr_low, ena_dev-&gt;reg_bar + ENA_REGS_AQ_BASE_LO_OFF);</div><div class='add'>+	writel(addr_high, ena_dev-&gt;reg_bar + ENA_REGS_AQ_BASE_HI_OFF);</div><div class='add'>+</div><div class='add'>+	addr_low = ENA_DMA_ADDR_TO_UINT32_LOW(admin_queue-&gt;cq.dma_addr);</div><div class='add'>+	addr_high = ENA_DMA_ADDR_TO_UINT32_HIGH(admin_queue-&gt;cq.dma_addr);</div><div class='add'>+</div><div class='add'>+	writel(addr_low, ena_dev-&gt;reg_bar + ENA_REGS_ACQ_BASE_LO_OFF);</div><div class='add'>+	writel(addr_high, ena_dev-&gt;reg_bar + ENA_REGS_ACQ_BASE_HI_OFF);</div><div class='add'>+</div><div class='add'>+	aq_caps = 0;</div><div class='add'>+	aq_caps |= admin_queue-&gt;q_depth &amp; ENA_REGS_AQ_CAPS_AQ_DEPTH_MASK;</div><div class='add'>+	aq_caps |= (sizeof(struct ena_admin_aq_entry) &lt;&lt;</div><div class='add'>+			ENA_REGS_AQ_CAPS_AQ_ENTRY_SIZE_SHIFT) &amp;</div><div class='add'>+			ENA_REGS_AQ_CAPS_AQ_ENTRY_SIZE_MASK;</div><div class='add'>+</div><div class='add'>+	acq_caps = 0;</div><div class='add'>+	acq_caps |= admin_queue-&gt;q_depth &amp; ENA_REGS_ACQ_CAPS_ACQ_DEPTH_MASK;</div><div class='add'>+	acq_caps |= (sizeof(struct ena_admin_acq_entry) &lt;&lt;</div><div class='add'>+		ENA_REGS_ACQ_CAPS_ACQ_ENTRY_SIZE_SHIFT) &amp;</div><div class='add'>+		ENA_REGS_ACQ_CAPS_ACQ_ENTRY_SIZE_MASK;</div><div class='add'>+</div><div class='add'>+	writel(aq_caps, ena_dev-&gt;reg_bar + ENA_REGS_AQ_CAPS_OFF);</div><div class='add'>+	writel(acq_caps, ena_dev-&gt;reg_bar + ENA_REGS_ACQ_CAPS_OFF);</div><div class='add'>+	ret = ena_com_admin_init_aenq(ena_dev, aenq_handlers);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	admin_queue-&gt;ena_dev = ena_dev;</div><div class='add'>+	admin_queue-&gt;running_state = true;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+error:</div><div class='add'>+	ena_com_admin_destroy(ena_dev);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_create_io_queue(struct ena_com_dev *ena_dev,</div><div class='add'>+			    struct ena_com_create_io_ctx *ctx)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_io_sq *io_sq;</div><div class='add'>+	struct ena_com_io_cq *io_cq;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;qid &gt;= ENA_TOTAL_NUM_QUEUES) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Qid (%d) is bigger than max num of queues (%d)\n",</div><div class='add'>+			   ctx-&gt;qid, ENA_TOTAL_NUM_QUEUES);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	io_sq = &amp;ena_dev-&gt;io_sq_queues[ctx-&gt;qid];</div><div class='add'>+	io_cq = &amp;ena_dev-&gt;io_cq_queues[ctx-&gt;qid];</div><div class='add'>+</div><div class='add'>+	memset(io_sq, 0x0, sizeof(*io_sq));</div><div class='add'>+	memset(io_cq, 0x0, sizeof(*io_cq));</div><div class='add'>+</div><div class='add'>+	/* Init CQ */</div><div class='add'>+	io_cq-&gt;q_depth = ctx-&gt;queue_size;</div><div class='add'>+	io_cq-&gt;direction = ctx-&gt;direction;</div><div class='add'>+	io_cq-&gt;qid = ctx-&gt;qid;</div><div class='add'>+</div><div class='add'>+	io_cq-&gt;msix_vector = ctx-&gt;msix_vector;</div><div class='add'>+</div><div class='add'>+	io_sq-&gt;q_depth = ctx-&gt;queue_size;</div><div class='add'>+	io_sq-&gt;direction = ctx-&gt;direction;</div><div class='add'>+	io_sq-&gt;qid = ctx-&gt;qid;</div><div class='add'>+</div><div class='add'>+	io_sq-&gt;mem_queue_type = ctx-&gt;mem_queue_type;</div><div class='add'>+</div><div class='add'>+	if (ctx-&gt;direction == ENA_COM_IO_QUEUE_DIRECTION_TX)</div><div class='add'>+		/* header length is limited to 8 bits */</div><div class='add'>+		io_sq-&gt;tx_max_header_size = min_t(u32, ena_dev-&gt;tx_max_header_size, SZ_256);</div><div class='add'>+</div><div class='add'>+	ret = ena_com_init_io_sq(ena_dev, ctx, io_sq);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+	ret = ena_com_init_io_cq(ena_dev, ctx, io_cq);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	ret = ena_com_create_io_cq(ena_dev, io_cq);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto error;</div><div class='add'>+</div><div class='add'>+	ret = ena_com_create_io_sq(ena_dev, io_sq, io_cq-&gt;idx);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto destroy_io_cq;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+destroy_io_cq:</div><div class='add'>+	ena_com_destroy_io_cq(ena_dev, io_cq);</div><div class='add'>+error:</div><div class='add'>+	ena_com_io_queue_free(ena_dev, io_sq, io_cq);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_com_destroy_io_queue(struct ena_com_dev *ena_dev, u16 qid)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_io_sq *io_sq;</div><div class='add'>+	struct ena_com_io_cq *io_cq;</div><div class='add'>+</div><div class='add'>+	if (qid &gt;= ENA_TOTAL_NUM_QUEUES) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Qid (%d) is bigger than max num of queues (%d)\n",</div><div class='add'>+			   qid, ENA_TOTAL_NUM_QUEUES);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	io_sq = &amp;ena_dev-&gt;io_sq_queues[qid];</div><div class='add'>+	io_cq = &amp;ena_dev-&gt;io_cq_queues[qid];</div><div class='add'>+</div><div class='add'>+	ena_com_destroy_io_sq(ena_dev, io_sq);</div><div class='add'>+	ena_com_destroy_io_cq(ena_dev, io_cq);</div><div class='add'>+</div><div class='add'>+	ena_com_io_queue_free(ena_dev, io_sq, io_cq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_get_link_params(struct ena_com_dev *ena_dev,</div><div class='add'>+			    struct ena_admin_get_feat_resp *resp)</div><div class='add'>+{</div><div class='add'>+	return ena_com_get_feature(ena_dev, resp, ENA_ADMIN_LINK_CONFIG, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_get_dev_stats(struct ena_com_dev *ena_dev,</div><div class='add'>+			     struct ena_com_stats_ctx *ctx,</div><div class='add'>+			     enum ena_admin_get_stats_type type)</div><div class='add'>+{</div><div class='add'>+	struct ena_admin_acq_get_stats_resp *get_resp = &amp;ctx-&gt;get_resp;</div><div class='add'>+	struct ena_admin_aq_get_stats_cmd *get_cmd = &amp;ctx-&gt;get_cmd;</div><div class='add'>+	struct ena_com_admin_queue *admin_queue;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	admin_queue = &amp;ena_dev-&gt;admin_queue;</div><div class='add'>+</div><div class='add'>+	get_cmd-&gt;aq_common_descriptor.opcode = ENA_ADMIN_GET_STATS;</div><div class='add'>+	get_cmd-&gt;aq_common_descriptor.flags = 0;</div><div class='add'>+	get_cmd-&gt;type = type;</div><div class='add'>+</div><div class='add'>+	ret = ena_com_execute_admin_command(admin_queue,</div><div class='add'>+					    (struct ena_admin_aq_entry *)get_cmd,</div><div class='add'>+					    sizeof(*get_cmd),</div><div class='add'>+					    (struct ena_admin_acq_entry *)get_resp,</div><div class='add'>+					    sizeof(*get_resp));</div><div class='add'>+</div><div class='add'>+	if (unlikely(ret))</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Failed to get stats. error: %d\n", ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_com_set_supported_customer_metrics(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	struct ena_customer_metrics *customer_metrics;</div><div class='add'>+	struct ena_com_stats_ctx ctx;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	customer_metrics = &amp;ena_dev-&gt;customer_metrics;</div><div class='add'>+	if (!ena_com_get_cap(ena_dev, ENA_ADMIN_CUSTOMER_METRICS)) {</div><div class='add'>+		customer_metrics-&gt;supported_metrics = ENA_ADMIN_CUSTOMER_METRICS_MIN_SUPPORT_MASK;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memset(&amp;ctx, 0x0, sizeof(ctx));</div><div class='add'>+	ctx.get_cmd.requested_metrics = ENA_ADMIN_CUSTOMER_METRICS_SUPPORT_MASK;</div><div class='add'>+	ret = ena_get_dev_stats(ena_dev, &amp;ctx, ENA_ADMIN_GET_STATS_TYPE_CUSTOMER_METRICS);</div><div class='add'>+	if (likely(ret == 0))</div><div class='add'>+		customer_metrics-&gt;supported_metrics =</div><div class='add'>+			ctx.get_resp.u.customer_metrics.reported_metrics;</div><div class='add'>+	else</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device,</div><div class='add'>+			   "Failed to query customer metrics support. error: %d\n", ret);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_get_dev_attr_feat(struct ena_com_dev *ena_dev,</div><div class='add'>+			      struct ena_com_dev_get_features_ctx *get_feat_ctx)</div><div class='add'>+{</div><div class='add'>+	struct ena_admin_get_feat_resp get_resp;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = ena_com_get_feature(ena_dev, &amp;get_resp,</div><div class='add'>+				 ENA_ADMIN_DEVICE_ATTRIBUTES, 0);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;get_feat_ctx-&gt;dev_attr, &amp;get_resp.u.dev_attr,</div><div class='add'>+	       sizeof(get_resp.u.dev_attr));</div><div class='add'>+</div><div class='add'>+	ena_dev-&gt;supported_features = get_resp.u.dev_attr.supported_features;</div><div class='add'>+	ena_dev-&gt;capabilities = get_resp.u.dev_attr.capabilities;</div><div class='add'>+</div><div class='add'>+	if (ena_dev-&gt;supported_features &amp; BIT(ENA_ADMIN_MAX_QUEUES_EXT)) {</div><div class='add'>+		rc = ena_com_get_feature(ena_dev, &amp;get_resp,</div><div class='add'>+					 ENA_ADMIN_MAX_QUEUES_EXT,</div><div class='add'>+					 ENA_FEATURE_MAX_QUEUE_EXT_VER);</div><div class='add'>+		if (rc)</div><div class='add'>+			return rc;</div><div class='add'>+</div><div class='add'>+		if (get_resp.u.max_queue_ext.version != ENA_FEATURE_MAX_QUEUE_EXT_VER)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		memcpy(&amp;get_feat_ctx-&gt;max_queue_ext, &amp;get_resp.u.max_queue_ext,</div><div class='add'>+		       sizeof(get_resp.u.max_queue_ext));</div><div class='add'>+		ena_dev-&gt;tx_max_header_size =</div><div class='add'>+			get_resp.u.max_queue_ext.max_queue_ext.max_tx_header_size;</div><div class='add'>+	} else {</div><div class='add'>+		rc = ena_com_get_feature(ena_dev, &amp;get_resp,</div><div class='add'>+					 ENA_ADMIN_MAX_QUEUES_NUM, 0);</div><div class='add'>+		memcpy(&amp;get_feat_ctx-&gt;max_queues, &amp;get_resp.u.max_queue,</div><div class='add'>+		       sizeof(get_resp.u.max_queue));</div><div class='add'>+		ena_dev-&gt;tx_max_header_size =</div><div class='add'>+			get_resp.u.max_queue.max_header_size;</div><div class='add'>+</div><div class='add'>+		if (rc)</div><div class='add'>+			return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = ena_com_get_feature(ena_dev, &amp;get_resp,</div><div class='add'>+				 ENA_ADMIN_AENQ_CONFIG, 0);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;get_feat_ctx-&gt;aenq, &amp;get_resp.u.aenq,</div><div class='add'>+	       sizeof(get_resp.u.aenq));</div><div class='add'>+</div><div class='add'>+	rc = ena_com_get_feature(ena_dev, &amp;get_resp,</div><div class='add'>+				 ENA_ADMIN_STATELESS_OFFLOAD_CONFIG, 0);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;get_feat_ctx-&gt;offload, &amp;get_resp.u.offload,</div><div class='add'>+	       sizeof(get_resp.u.offload));</div><div class='add'>+</div><div class='add'>+	/* Driver hints isn't mandatory admin command. So in case the</div><div class='add'>+	 * command isn't supported set driver hints to 0</div><div class='add'>+	 */</div><div class='add'>+	rc = ena_com_get_feature(ena_dev, &amp;get_resp, ENA_ADMIN_HW_HINTS, 0);</div><div class='add'>+</div><div class='add'>+	if (!rc)</div><div class='add'>+		memcpy(&amp;get_feat_ctx-&gt;hw_hints, &amp;get_resp.u.hw_hints, sizeof(get_resp.u.hw_hints));</div><div class='add'>+	else if (rc == -EOPNOTSUPP)</div><div class='add'>+		memset(&amp;get_feat_ctx-&gt;hw_hints, 0x0, sizeof(get_feat_ctx-&gt;hw_hints));</div><div class='add'>+	else</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	rc = ena_com_get_feature(ena_dev, &amp;get_resp, ENA_ADMIN_LLQ, 0);</div><div class='add'>+	if (!rc)</div><div class='add'>+		memcpy(&amp;get_feat_ctx-&gt;llq, &amp;get_resp.u.llq, sizeof(get_resp.u.llq));</div><div class='add'>+	else if (rc == -EOPNOTSUPP)</div><div class='add'>+		memset(&amp;get_feat_ctx-&gt;llq, 0x0, sizeof(get_feat_ctx-&gt;llq));</div><div class='add'>+	else</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	ena_com_set_supported_customer_metrics(ena_dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_com_admin_q_comp_intr_handler(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	ena_com_handle_admin_completion(&amp;ena_dev-&gt;admin_queue);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ena_handle_specific_aenq_event:</div><div class='add'>+ * return the handler that is relevant to the specific event group</div><div class='add'>+ */</div><div class='add'>+static ena_aenq_handler ena_com_get_specific_aenq_cb(struct ena_com_dev *ena_dev,</div><div class='add'>+						     u16 group)</div><div class='add'>+{</div><div class='add'>+	struct ena_aenq_handlers *aenq_handlers = ena_dev-&gt;aenq.aenq_handlers;</div><div class='add'>+</div><div class='add'>+	if ((group &lt; ENA_MAX_HANDLERS) &amp;&amp; aenq_handlers-&gt;handlers[group])</div><div class='add'>+		return aenq_handlers-&gt;handlers[group];</div><div class='add'>+</div><div class='add'>+	return aenq_handlers-&gt;unimplemented_handler;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ena_aenq_intr_handler:</div><div class='add'>+ * handles the aenq incoming events.</div><div class='add'>+ * pop events from the queue and apply the specific handler</div><div class='add'>+ */</div><div class='add'>+void ena_com_aenq_intr_handler(struct ena_com_dev *ena_dev, void *data)</div><div class='add'>+{</div><div class='add'>+	struct ena_admin_aenq_entry *aenq_e;</div><div class='add'>+	struct ena_admin_aenq_common_desc *aenq_common;</div><div class='add'>+	struct ena_com_aenq *aenq  = &amp;ena_dev-&gt;aenq;</div><div class='add'>+	u64 timestamp;</div><div class='add'>+	ena_aenq_handler handler_cb;</div><div class='add'>+	u16 masked_head, processed = 0;</div><div class='add'>+	u8 phase;</div><div class='add'>+</div><div class='add'>+	masked_head = aenq-&gt;head &amp; (aenq-&gt;q_depth - 1);</div><div class='add'>+	phase = aenq-&gt;phase;</div><div class='add'>+	aenq_e = &amp;aenq-&gt;entries[masked_head]; /* Get first entry */</div><div class='add'>+	aenq_common = &amp;aenq_e-&gt;aenq_common_desc;</div><div class='add'>+</div><div class='add'>+	/* Go over all the events */</div><div class='add'>+	while ((READ_ONCE(aenq_common-&gt;flags) &amp; ENA_ADMIN_AENQ_COMMON_DESC_PHASE_MASK) == phase) {</div><div class='add'>+		/* Make sure the phase bit (ownership) is as expected before</div><div class='add'>+		 * reading the rest of the descriptor.</div><div class='add'>+		 */</div><div class='add'>+		dma_rmb();</div><div class='add'>+</div><div class='add'>+		timestamp = (u64)aenq_common-&gt;timestamp_low |</div><div class='add'>+			((u64)aenq_common-&gt;timestamp_high &lt;&lt; 32);</div><div class='add'>+</div><div class='add'>+		netdev_dbg(ena_dev-&gt;net_device, "AENQ! Group[%x] Syndrome[%x] timestamp: [%llus]\n",</div><div class='add'>+			   aenq_common-&gt;group, aenq_common-&gt;syndrome, timestamp);</div><div class='add'>+</div><div class='add'>+		/* Handle specific event*/</div><div class='add'>+		handler_cb = ena_com_get_specific_aenq_cb(ena_dev,</div><div class='add'>+							  aenq_common-&gt;group);</div><div class='add'>+		handler_cb(data, aenq_e); /* call the actual event handler*/</div><div class='add'>+</div><div class='add'>+		/* Get next event entry */</div><div class='add'>+		masked_head++;</div><div class='add'>+		processed++;</div><div class='add'>+</div><div class='add'>+		if (unlikely(masked_head == aenq-&gt;q_depth)) {</div><div class='add'>+			masked_head = 0;</div><div class='add'>+			phase = !phase;</div><div class='add'>+		}</div><div class='add'>+		aenq_e = &amp;aenq-&gt;entries[masked_head];</div><div class='add'>+		aenq_common = &amp;aenq_e-&gt;aenq_common_desc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	aenq-&gt;head += processed;</div><div class='add'>+	aenq-&gt;phase = phase;</div><div class='add'>+</div><div class='add'>+	/* Don't update aenq doorbell if there weren't any processed events */</div><div class='add'>+	if (!processed)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* write the aenq doorbell after all AENQ descriptors were read */</div><div class='add'>+	mb();</div><div class='add'>+	writel_relaxed((u32)aenq-&gt;head, ena_dev-&gt;reg_bar + ENA_REGS_AENQ_HEAD_DB_OFF);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_dev_reset(struct ena_com_dev *ena_dev,</div><div class='add'>+		      enum ena_regs_reset_reason_types reset_reason)</div><div class='add'>+{</div><div class='add'>+	u32 stat, timeout, cap, reset_val;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	stat = ena_com_reg_bar_read32(ena_dev, ENA_REGS_DEV_STS_OFF);</div><div class='add'>+	cap = ena_com_reg_bar_read32(ena_dev, ENA_REGS_CAPS_OFF);</div><div class='add'>+</div><div class='add'>+	if (unlikely((stat == ENA_MMIO_READ_TIMEOUT) || (cap == ENA_MMIO_READ_TIMEOUT))) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Reg read32 timeout occurred\n");</div><div class='add'>+		return -ETIME;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((stat &amp; ENA_REGS_DEV_STS_READY_MASK) == 0) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Device isn't ready, can't reset device\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	timeout = (cap &amp; ENA_REGS_CAPS_RESET_TIMEOUT_MASK) &gt;&gt;</div><div class='add'>+			ENA_REGS_CAPS_RESET_TIMEOUT_SHIFT;</div><div class='add'>+	if (timeout == 0) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Invalid timeout value\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* start reset */</div><div class='add'>+	reset_val = ENA_REGS_DEV_CTL_DEV_RESET_MASK;</div><div class='add'>+	reset_val |= (reset_reason &lt;&lt; ENA_REGS_DEV_CTL_RESET_REASON_SHIFT) &amp;</div><div class='add'>+		     ENA_REGS_DEV_CTL_RESET_REASON_MASK;</div><div class='add'>+	writel(reset_val, ena_dev-&gt;reg_bar + ENA_REGS_DEV_CTL_OFF);</div><div class='add'>+</div><div class='add'>+	/* Write again the MMIO read request address */</div><div class='add'>+	ena_com_mmio_reg_read_request_write_dev_addr(ena_dev);</div><div class='add'>+</div><div class='add'>+	rc = wait_for_reset_state(ena_dev, timeout,</div><div class='add'>+				  ENA_REGS_DEV_STS_RESET_IN_PROGRESS_MASK);</div><div class='add'>+	if (rc != 0) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Reset indication didn't turn on\n");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* reset done */</div><div class='add'>+	writel(0, ena_dev-&gt;reg_bar + ENA_REGS_DEV_CTL_OFF);</div><div class='add'>+	rc = wait_for_reset_state(ena_dev, timeout, 0);</div><div class='add'>+	if (rc != 0) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Reset indication didn't turn off\n");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	timeout = (cap &amp; ENA_REGS_CAPS_ADMIN_CMD_TO_MASK) &gt;&gt;</div><div class='add'>+		ENA_REGS_CAPS_ADMIN_CMD_TO_SHIFT;</div><div class='add'>+	if (timeout)</div><div class='add'>+		/* the resolution of timeout reg is 100ms */</div><div class='add'>+		ena_dev-&gt;admin_queue.completion_timeout = timeout * 100000;</div><div class='add'>+	else</div><div class='add'>+		ena_dev-&gt;admin_queue.completion_timeout = ADMIN_CMD_TIMEOUT_US;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_get_eni_stats(struct ena_com_dev *ena_dev,</div><div class='add'>+			  struct ena_admin_eni_stats *stats)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_stats_ctx ctx;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!ena_com_get_cap(ena_dev, ENA_ADMIN_ENI_STATS)) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Capability %d isn't supported\n",</div><div class='add'>+			   ENA_ADMIN_ENI_STATS);</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memset(&amp;ctx, 0x0, sizeof(ctx));</div><div class='add'>+	ret = ena_get_dev_stats(ena_dev, &amp;ctx, ENA_ADMIN_GET_STATS_TYPE_ENI);</div><div class='add'>+	if (likely(ret == 0))</div><div class='add'>+		memcpy(stats, &amp;ctx.get_resp.u.eni_stats,</div><div class='add'>+		       sizeof(ctx.get_resp.u.eni_stats));</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_get_ena_srd_info(struct ena_com_dev *ena_dev,</div><div class='add'>+			     struct ena_admin_ena_srd_info *info)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_stats_ctx ctx;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!ena_com_get_cap(ena_dev, ENA_ADMIN_ENA_SRD_INFO)) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Capability %d isn't supported\n",</div><div class='add'>+			   ENA_ADMIN_ENA_SRD_INFO);</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memset(&amp;ctx, 0x0, sizeof(ctx));</div><div class='add'>+	ret = ena_get_dev_stats(ena_dev, &amp;ctx, ENA_ADMIN_GET_STATS_TYPE_ENA_SRD);</div><div class='add'>+	if (likely(ret == 0))</div><div class='add'>+		memcpy(info, &amp;ctx.get_resp.u.ena_srd_info,</div><div class='add'>+		       sizeof(ctx.get_resp.u.ena_srd_info));</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_get_customer_metrics(struct ena_com_dev *ena_dev, char *buffer, u32 len)</div><div class='add'>+{</div><div class='add'>+	struct ena_admin_aq_get_stats_cmd *get_cmd;</div><div class='add'>+	struct ena_com_stats_ctx ctx;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (unlikely(len &gt; ena_dev-&gt;customer_metrics.buffer_len)) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device,</div><div class='add'>+			   "Invalid buffer size %u. The given buffer is too big.\n", len);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!ena_com_get_cap(ena_dev, ENA_ADMIN_CUSTOMER_METRICS)) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Capability %d not supported.\n",</div><div class='add'>+			   ENA_ADMIN_CUSTOMER_METRICS);</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!ena_dev-&gt;customer_metrics.supported_metrics) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "No supported customer metrics.\n");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	get_cmd = &amp;ctx.get_cmd;</div><div class='add'>+	memset(&amp;ctx, 0x0, sizeof(ctx));</div><div class='add'>+	ret = ena_com_mem_addr_set(ena_dev,</div><div class='add'>+				   &amp;get_cmd-&gt;u.control_buffer.address,</div><div class='add'>+				   ena_dev-&gt;customer_metrics.buffer_dma_addr);</div><div class='add'>+	if (unlikely(ret)) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Memory address set failed.\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	get_cmd-&gt;u.control_buffer.length = ena_dev-&gt;customer_metrics.buffer_len;</div><div class='add'>+	get_cmd-&gt;requested_metrics = ena_dev-&gt;customer_metrics.supported_metrics;</div><div class='add'>+	ret = ena_get_dev_stats(ena_dev, &amp;ctx, ENA_ADMIN_GET_STATS_TYPE_CUSTOMER_METRICS);</div><div class='add'>+	if (likely(ret == 0))</div><div class='add'>+		memcpy(buffer, ena_dev-&gt;customer_metrics.buffer_virt_addr, len);</div><div class='add'>+	else</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Failed to get customer metrics. error: %d\n", ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_set_dev_mtu(struct ena_com_dev *ena_dev, u32 mtu)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_admin_queue *admin_queue;</div><div class='add'>+	struct ena_admin_set_feat_cmd cmd;</div><div class='add'>+	struct ena_admin_set_feat_resp resp;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!ena_com_check_supported_feature_id(ena_dev, ENA_ADMIN_MTU)) {</div><div class='add'>+		netdev_dbg(ena_dev-&gt;net_device, "Feature %d isn't supported\n", ENA_ADMIN_MTU);</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memset(&amp;cmd, 0x0, sizeof(cmd));</div><div class='add'>+	admin_queue = &amp;ena_dev-&gt;admin_queue;</div><div class='add'>+</div><div class='add'>+	cmd.aq_common_descriptor.opcode = ENA_ADMIN_SET_FEATURE;</div><div class='add'>+	cmd.aq_common_descriptor.flags = 0;</div><div class='add'>+	cmd.feat_common.feature_id = ENA_ADMIN_MTU;</div><div class='add'>+	cmd.u.mtu.mtu = mtu;</div><div class='add'>+</div><div class='add'>+	ret = ena_com_execute_admin_command(admin_queue,</div><div class='add'>+					    (struct ena_admin_aq_entry *)&amp;cmd,</div><div class='add'>+					    sizeof(cmd),</div><div class='add'>+					    (struct ena_admin_acq_entry *)&amp;resp,</div><div class='add'>+					    sizeof(resp));</div><div class='add'>+</div><div class='add'>+	if (unlikely(ret))</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Failed to set mtu %d. error: %d\n", mtu, ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_set_hash_function(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_admin_queue *admin_queue = &amp;ena_dev-&gt;admin_queue;</div><div class='add'>+	struct ena_rss *rss = &amp;ena_dev-&gt;rss;</div><div class='add'>+	struct ena_admin_set_feat_cmd cmd;</div><div class='add'>+	struct ena_admin_set_feat_resp resp;</div><div class='add'>+	struct ena_admin_get_feat_resp get_resp;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!ena_com_check_supported_feature_id(ena_dev, ENA_ADMIN_RSS_HASH_FUNCTION)) {</div><div class='add'>+		netdev_dbg(ena_dev-&gt;net_device, "Feature %d isn't supported\n",</div><div class='add'>+			   ENA_ADMIN_RSS_HASH_FUNCTION);</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Validate hash function is supported */</div><div class='add'>+	ret = ena_com_get_feature(ena_dev, &amp;get_resp,</div><div class='add'>+				  ENA_ADMIN_RSS_HASH_FUNCTION, 0);</div><div class='add'>+	if (unlikely(ret))</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (!(get_resp.u.flow_hash_func.supported_func &amp; BIT(rss-&gt;hash_func))) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Func hash %d isn't supported by device, abort\n",</div><div class='add'>+			   rss-&gt;hash_func);</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memset(&amp;cmd, 0x0, sizeof(cmd));</div><div class='add'>+</div><div class='add'>+	cmd.aq_common_descriptor.opcode = ENA_ADMIN_SET_FEATURE;</div><div class='add'>+	cmd.aq_common_descriptor.flags =</div><div class='add'>+		ENA_ADMIN_AQ_COMMON_DESC_CTRL_DATA_INDIRECT_MASK;</div><div class='add'>+	cmd.feat_common.feature_id = ENA_ADMIN_RSS_HASH_FUNCTION;</div><div class='add'>+	cmd.u.flow_hash_func.init_val = rss-&gt;hash_init_val;</div><div class='add'>+	cmd.u.flow_hash_func.selected_func = 1 &lt;&lt; rss-&gt;hash_func;</div><div class='add'>+</div><div class='add'>+	ret = ena_com_mem_addr_set(ena_dev,</div><div class='add'>+				   &amp;cmd.control_buffer.address,</div><div class='add'>+				   rss-&gt;hash_key_dma_addr);</div><div class='add'>+	if (unlikely(ret)) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Memory address set failed\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cmd.control_buffer.length = sizeof(*rss-&gt;hash_key);</div><div class='add'>+</div><div class='add'>+	ret = ena_com_execute_admin_command(admin_queue,</div><div class='add'>+					    (struct ena_admin_aq_entry *)&amp;cmd,</div><div class='add'>+					    sizeof(cmd),</div><div class='add'>+					    (struct ena_admin_acq_entry *)&amp;resp,</div><div class='add'>+					    sizeof(resp));</div><div class='add'>+	if (unlikely(ret)) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Failed to set hash function %d. error: %d\n",</div><div class='add'>+			   rss-&gt;hash_func, ret);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_fill_hash_function(struct ena_com_dev *ena_dev,</div><div class='add'>+			       enum ena_admin_hash_functions func,</div><div class='add'>+			       const u8 *key, u16 key_len, u32 init_val)</div><div class='add'>+{</div><div class='add'>+	struct ena_admin_feature_rss_flow_hash_control *hash_key;</div><div class='add'>+	struct ena_admin_get_feat_resp get_resp;</div><div class='add'>+	enum ena_admin_hash_functions old_func;</div><div class='add'>+	struct ena_rss *rss = &amp;ena_dev-&gt;rss;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	hash_key = rss-&gt;hash_key;</div><div class='add'>+</div><div class='add'>+	/* Make sure size is a mult of DWs */</div><div class='add'>+	if (unlikely(key_len &amp; 0x3))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	rc = ena_com_get_feature_ex(ena_dev, &amp;get_resp,</div><div class='add'>+				    ENA_ADMIN_RSS_HASH_FUNCTION,</div><div class='add'>+				    rss-&gt;hash_key_dma_addr,</div><div class='add'>+				    sizeof(*rss-&gt;hash_key), 0);</div><div class='add'>+	if (unlikely(rc))</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	if (!(BIT(func) &amp; get_resp.u.flow_hash_func.supported_func)) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Flow hash function %d isn't supported\n", func);</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((func == ENA_ADMIN_TOEPLITZ) &amp;&amp; key) {</div><div class='add'>+		if (key_len != sizeof(hash_key-&gt;key)) {</div><div class='add'>+			netdev_err(ena_dev-&gt;net_device,</div><div class='add'>+				   "key len (%u) doesn't equal the supported size (%zu)\n", key_len,</div><div class='add'>+				   sizeof(hash_key-&gt;key));</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+		memcpy(hash_key-&gt;key, key, key_len);</div><div class='add'>+		hash_key-&gt;key_parts = key_len / sizeof(hash_key-&gt;key[0]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rss-&gt;hash_init_val = init_val;</div><div class='add'>+	old_func = rss-&gt;hash_func;</div><div class='add'>+	rss-&gt;hash_func = func;</div><div class='add'>+	rc = ena_com_set_hash_function(ena_dev);</div><div class='add'>+</div><div class='add'>+	/* Restore the old function */</div><div class='add'>+	if (unlikely(rc))</div><div class='add'>+		rss-&gt;hash_func = old_func;</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_get_hash_function(struct ena_com_dev *ena_dev,</div><div class='add'>+			      enum ena_admin_hash_functions *func)</div><div class='add'>+{</div><div class='add'>+	struct ena_rss *rss = &amp;ena_dev-&gt;rss;</div><div class='add'>+	struct ena_admin_get_feat_resp get_resp;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (unlikely(!func))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	rc = ena_com_get_feature_ex(ena_dev, &amp;get_resp,</div><div class='add'>+				    ENA_ADMIN_RSS_HASH_FUNCTION,</div><div class='add'>+				    rss-&gt;hash_key_dma_addr,</div><div class='add'>+				    sizeof(*rss-&gt;hash_key), 0);</div><div class='add'>+	if (unlikely(rc))</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	/* ffs() returns 1 in case the lsb is set */</div><div class='add'>+	rss-&gt;hash_func = ffs(get_resp.u.flow_hash_func.selected_func);</div><div class='add'>+	if (rss-&gt;hash_func)</div><div class='add'>+		rss-&gt;hash_func--;</div><div class='add'>+</div><div class='add'>+	*func = rss-&gt;hash_func;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_get_hash_key(struct ena_com_dev *ena_dev, u8 *key)</div><div class='add'>+{</div><div class='add'>+	struct ena_admin_feature_rss_flow_hash_control *hash_key =</div><div class='add'>+		ena_dev-&gt;rss.hash_key;</div><div class='add'>+</div><div class='add'>+	if (key)</div><div class='add'>+		memcpy(key, hash_key-&gt;key,</div><div class='add'>+		       (size_t)(hash_key-&gt;key_parts) * sizeof(hash_key-&gt;key[0]));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_get_hash_ctrl(struct ena_com_dev *ena_dev,</div><div class='add'>+			  enum ena_admin_flow_hash_proto proto,</div><div class='add'>+			  u16 *fields)</div><div class='add'>+{</div><div class='add'>+	struct ena_rss *rss = &amp;ena_dev-&gt;rss;</div><div class='add'>+	struct ena_admin_get_feat_resp get_resp;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = ena_com_get_feature_ex(ena_dev, &amp;get_resp,</div><div class='add'>+				    ENA_ADMIN_RSS_HASH_INPUT,</div><div class='add'>+				    rss-&gt;hash_ctrl_dma_addr,</div><div class='add'>+				    sizeof(*rss-&gt;hash_ctrl), 0);</div><div class='add'>+	if (unlikely(rc))</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	if (fields)</div><div class='add'>+		*fields = rss-&gt;hash_ctrl-&gt;selected_fields[proto].fields;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_set_hash_ctrl(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_admin_queue *admin_queue = &amp;ena_dev-&gt;admin_queue;</div><div class='add'>+	struct ena_rss *rss = &amp;ena_dev-&gt;rss;</div><div class='add'>+	struct ena_admin_feature_rss_hash_control *hash_ctrl = rss-&gt;hash_ctrl;</div><div class='add'>+	struct ena_admin_set_feat_cmd cmd;</div><div class='add'>+	struct ena_admin_set_feat_resp resp;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!ena_com_check_supported_feature_id(ena_dev, ENA_ADMIN_RSS_HASH_INPUT)) {</div><div class='add'>+		netdev_dbg(ena_dev-&gt;net_device, "Feature %d isn't supported\n",</div><div class='add'>+			   ENA_ADMIN_RSS_HASH_INPUT);</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memset(&amp;cmd, 0x0, sizeof(cmd));</div><div class='add'>+</div><div class='add'>+	cmd.aq_common_descriptor.opcode = ENA_ADMIN_SET_FEATURE;</div><div class='add'>+	cmd.aq_common_descriptor.flags =</div><div class='add'>+		ENA_ADMIN_AQ_COMMON_DESC_CTRL_DATA_INDIRECT_MASK;</div><div class='add'>+	cmd.feat_common.feature_id = ENA_ADMIN_RSS_HASH_INPUT;</div><div class='add'>+	cmd.u.flow_hash_input.enabled_input_sort =</div><div class='add'>+		ENA_ADMIN_FEATURE_RSS_FLOW_HASH_INPUT_L3_SORT_MASK |</div><div class='add'>+		ENA_ADMIN_FEATURE_RSS_FLOW_HASH_INPUT_L4_SORT_MASK;</div><div class='add'>+</div><div class='add'>+	ret = ena_com_mem_addr_set(ena_dev,</div><div class='add'>+				   &amp;cmd.control_buffer.address,</div><div class='add'>+				   rss-&gt;hash_ctrl_dma_addr);</div><div class='add'>+	if (unlikely(ret)) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Memory address set failed\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	cmd.control_buffer.length = sizeof(*hash_ctrl);</div><div class='add'>+</div><div class='add'>+	ret = ena_com_execute_admin_command(admin_queue,</div><div class='add'>+					    (struct ena_admin_aq_entry *)&amp;cmd,</div><div class='add'>+					    sizeof(cmd),</div><div class='add'>+					    (struct ena_admin_acq_entry *)&amp;resp,</div><div class='add'>+					    sizeof(resp));</div><div class='add'>+	if (unlikely(ret))</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Failed to set hash input. error: %d\n", ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_set_default_hash_ctrl(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	struct ena_rss *rss = &amp;ena_dev-&gt;rss;</div><div class='add'>+	struct ena_admin_feature_rss_hash_control *hash_ctrl =</div><div class='add'>+		rss-&gt;hash_ctrl;</div><div class='add'>+	u16 available_fields = 0;</div><div class='add'>+	int rc, i;</div><div class='add'>+</div><div class='add'>+	/* Get the supported hash input */</div><div class='add'>+	rc = ena_com_get_hash_ctrl(ena_dev, 0, NULL);</div><div class='add'>+	if (unlikely(rc))</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	hash_ctrl-&gt;selected_fields[ENA_ADMIN_RSS_TCP4].fields =</div><div class='add'>+		ENA_ADMIN_RSS_L3_SA | ENA_ADMIN_RSS_L3_DA |</div><div class='add'>+		ENA_ADMIN_RSS_L4_DP | ENA_ADMIN_RSS_L4_SP;</div><div class='add'>+</div><div class='add'>+	hash_ctrl-&gt;selected_fields[ENA_ADMIN_RSS_UDP4].fields =</div><div class='add'>+		ENA_ADMIN_RSS_L3_SA | ENA_ADMIN_RSS_L3_DA |</div><div class='add'>+		ENA_ADMIN_RSS_L4_DP | ENA_ADMIN_RSS_L4_SP;</div><div class='add'>+</div><div class='add'>+	hash_ctrl-&gt;selected_fields[ENA_ADMIN_RSS_TCP6].fields =</div><div class='add'>+		ENA_ADMIN_RSS_L3_SA | ENA_ADMIN_RSS_L3_DA |</div><div class='add'>+		ENA_ADMIN_RSS_L4_DP | ENA_ADMIN_RSS_L4_SP;</div><div class='add'>+</div><div class='add'>+	hash_ctrl-&gt;selected_fields[ENA_ADMIN_RSS_UDP6].fields =</div><div class='add'>+		ENA_ADMIN_RSS_L3_SA | ENA_ADMIN_RSS_L3_DA |</div><div class='add'>+		ENA_ADMIN_RSS_L4_DP | ENA_ADMIN_RSS_L4_SP;</div><div class='add'>+</div><div class='add'>+	hash_ctrl-&gt;selected_fields[ENA_ADMIN_RSS_IP4].fields =</div><div class='add'>+		ENA_ADMIN_RSS_L3_SA | ENA_ADMIN_RSS_L3_DA;</div><div class='add'>+</div><div class='add'>+	hash_ctrl-&gt;selected_fields[ENA_ADMIN_RSS_IP6].fields =</div><div class='add'>+		ENA_ADMIN_RSS_L3_SA | ENA_ADMIN_RSS_L3_DA;</div><div class='add'>+</div><div class='add'>+	hash_ctrl-&gt;selected_fields[ENA_ADMIN_RSS_IP4_FRAG].fields =</div><div class='add'>+		ENA_ADMIN_RSS_L3_SA | ENA_ADMIN_RSS_L3_DA;</div><div class='add'>+</div><div class='add'>+	hash_ctrl-&gt;selected_fields[ENA_ADMIN_RSS_NOT_IP].fields =</div><div class='add'>+		ENA_ADMIN_RSS_L2_DA | ENA_ADMIN_RSS_L2_SA;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ENA_ADMIN_RSS_PROTO_NUM; i++) {</div><div class='add'>+		available_fields = hash_ctrl-&gt;selected_fields[i].fields &amp;</div><div class='add'>+				hash_ctrl-&gt;supported_fields[i].fields;</div><div class='add'>+		if (available_fields != hash_ctrl-&gt;selected_fields[i].fields) {</div><div class='add'>+			netdev_err(ena_dev-&gt;net_device,</div><div class='add'>+				   "Hash control doesn't support all the desire configuration. proto %x supported %x selected %x\n",</div><div class='add'>+				   i, hash_ctrl-&gt;supported_fields[i].fields,</div><div class='add'>+				   hash_ctrl-&gt;selected_fields[i].fields);</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = ena_com_set_hash_ctrl(ena_dev);</div><div class='add'>+</div><div class='add'>+	/* In case of failure, restore the old hash ctrl */</div><div class='add'>+	if (unlikely(rc))</div><div class='add'>+		ena_com_get_hash_ctrl(ena_dev, 0, NULL);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_fill_hash_ctrl(struct ena_com_dev *ena_dev,</div><div class='add'>+			   enum ena_admin_flow_hash_proto proto,</div><div class='add'>+			   u16 hash_fields)</div><div class='add'>+{</div><div class='add'>+	struct ena_rss *rss = &amp;ena_dev-&gt;rss;</div><div class='add'>+	struct ena_admin_feature_rss_hash_control *hash_ctrl = rss-&gt;hash_ctrl;</div><div class='add'>+	u16 supported_fields;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (proto &gt;= ENA_ADMIN_RSS_PROTO_NUM) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Invalid proto num (%u)\n", proto);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Get the ctrl table */</div><div class='add'>+	rc = ena_com_get_hash_ctrl(ena_dev, proto, NULL);</div><div class='add'>+	if (unlikely(rc))</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	/* Make sure all the fields are supported */</div><div class='add'>+	supported_fields = hash_ctrl-&gt;supported_fields[proto].fields;</div><div class='add'>+	if ((hash_fields &amp; supported_fields) != hash_fields) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device,</div><div class='add'>+			   "Proto %d doesn't support the required fields %x. supports only: %x\n",</div><div class='add'>+			   proto, hash_fields, supported_fields);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hash_ctrl-&gt;selected_fields[proto].fields = hash_fields;</div><div class='add'>+</div><div class='add'>+	rc = ena_com_set_hash_ctrl(ena_dev);</div><div class='add'>+</div><div class='add'>+	/* In case of failure, restore the old hash ctrl */</div><div class='add'>+	if (unlikely(rc))</div><div class='add'>+		ena_com_get_hash_ctrl(ena_dev, 0, NULL);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_indirect_table_fill_entry(struct ena_com_dev *ena_dev,</div><div class='add'>+				      u16 entry_idx, u16 entry_value)</div><div class='add'>+{</div><div class='add'>+	struct ena_rss *rss = &amp;ena_dev-&gt;rss;</div><div class='add'>+</div><div class='add'>+	if (unlikely(entry_idx &gt;= (1 &lt;&lt; rss-&gt;tbl_log_size)))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (unlikely((entry_value &gt; ENA_TOTAL_NUM_QUEUES)))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	rss-&gt;host_rss_ind_tbl[entry_idx] = entry_value;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_indirect_table_set(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_admin_queue *admin_queue = &amp;ena_dev-&gt;admin_queue;</div><div class='add'>+	struct ena_rss *rss = &amp;ena_dev-&gt;rss;</div><div class='add'>+	struct ena_admin_set_feat_cmd cmd;</div><div class='add'>+	struct ena_admin_set_feat_resp resp;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!ena_com_check_supported_feature_id(ena_dev, ENA_ADMIN_RSS_INDIRECTION_TABLE_CONFIG)) {</div><div class='add'>+		netdev_dbg(ena_dev-&gt;net_device, "Feature %d isn't supported\n",</div><div class='add'>+			   ENA_ADMIN_RSS_INDIRECTION_TABLE_CONFIG);</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ena_com_ind_tbl_convert_to_device(ena_dev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device,</div><div class='add'>+			   "Failed to convert host indirection table to device table\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memset(&amp;cmd, 0x0, sizeof(cmd));</div><div class='add'>+</div><div class='add'>+	cmd.aq_common_descriptor.opcode = ENA_ADMIN_SET_FEATURE;</div><div class='add'>+	cmd.aq_common_descriptor.flags =</div><div class='add'>+		ENA_ADMIN_AQ_COMMON_DESC_CTRL_DATA_INDIRECT_MASK;</div><div class='add'>+	cmd.feat_common.feature_id = ENA_ADMIN_RSS_INDIRECTION_TABLE_CONFIG;</div><div class='add'>+	cmd.u.ind_table.size = rss-&gt;tbl_log_size;</div><div class='add'>+	cmd.u.ind_table.inline_index = 0xFFFFFFFF;</div><div class='add'>+</div><div class='add'>+	ret = ena_com_mem_addr_set(ena_dev,</div><div class='add'>+				   &amp;cmd.control_buffer.address,</div><div class='add'>+				   rss-&gt;rss_ind_tbl_dma_addr);</div><div class='add'>+	if (unlikely(ret)) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Memory address set failed\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cmd.control_buffer.length = (1ULL &lt;&lt; rss-&gt;tbl_log_size) *</div><div class='add'>+		sizeof(struct ena_admin_rss_ind_table_entry);</div><div class='add'>+</div><div class='add'>+	ret = ena_com_execute_admin_command(admin_queue,</div><div class='add'>+					    (struct ena_admin_aq_entry *)&amp;cmd,</div><div class='add'>+					    sizeof(cmd),</div><div class='add'>+					    (struct ena_admin_acq_entry *)&amp;resp,</div><div class='add'>+					    sizeof(resp));</div><div class='add'>+</div><div class='add'>+	if (unlikely(ret))</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Failed to set indirect table. error: %d\n", ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_indirect_table_get(struct ena_com_dev *ena_dev, u32 *ind_tbl)</div><div class='add'>+{</div><div class='add'>+	struct ena_rss *rss = &amp;ena_dev-&gt;rss;</div><div class='add'>+	struct ena_admin_get_feat_resp get_resp;</div><div class='add'>+	u32 tbl_size;</div><div class='add'>+	int i, rc;</div><div class='add'>+</div><div class='add'>+	tbl_size = (1ULL &lt;&lt; rss-&gt;tbl_log_size) *</div><div class='add'>+		sizeof(struct ena_admin_rss_ind_table_entry);</div><div class='add'>+</div><div class='add'>+	rc = ena_com_get_feature_ex(ena_dev, &amp;get_resp,</div><div class='add'>+				    ENA_ADMIN_RSS_INDIRECTION_TABLE_CONFIG,</div><div class='add'>+				    rss-&gt;rss_ind_tbl_dma_addr,</div><div class='add'>+				    tbl_size, 0);</div><div class='add'>+	if (unlikely(rc))</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	if (!ind_tbl)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; (1 &lt;&lt; rss-&gt;tbl_log_size); i++)</div><div class='add'>+		ind_tbl[i] = rss-&gt;host_rss_ind_tbl[i];</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_rss_init(struct ena_com_dev *ena_dev, u16 indr_tbl_log_size)</div><div class='add'>+{</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	memset(&amp;ena_dev-&gt;rss, 0x0, sizeof(ena_dev-&gt;rss));</div><div class='add'>+</div><div class='add'>+	rc = ena_com_indirect_table_allocate(ena_dev, indr_tbl_log_size);</div><div class='add'>+	if (unlikely(rc))</div><div class='add'>+		goto err_indr_tbl;</div><div class='add'>+</div><div class='add'>+	/* The following function might return unsupported in case the</div><div class='add'>+	 * device doesn't support setting the key / hash function. We can safely</div><div class='add'>+	 * ignore this error and have indirection table support only.</div><div class='add'>+	 */</div><div class='add'>+	rc = ena_com_hash_key_allocate(ena_dev);</div><div class='add'>+	if (likely(!rc))</div><div class='add'>+		ena_com_hash_key_fill_default_key(ena_dev);</div><div class='add'>+	else if (rc != -EOPNOTSUPP)</div><div class='add'>+		goto err_hash_key;</div><div class='add'>+</div><div class='add'>+	rc = ena_com_hash_ctrl_init(ena_dev);</div><div class='add'>+	if (unlikely(rc))</div><div class='add'>+		goto err_hash_ctrl;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_hash_ctrl:</div><div class='add'>+	ena_com_hash_key_destroy(ena_dev);</div><div class='add'>+err_hash_key:</div><div class='add'>+	ena_com_indirect_table_destroy(ena_dev);</div><div class='add'>+err_indr_tbl:</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_com_rss_destroy(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	ena_com_indirect_table_destroy(ena_dev);</div><div class='add'>+	ena_com_hash_key_destroy(ena_dev);</div><div class='add'>+	ena_com_hash_ctrl_destroy(ena_dev);</div><div class='add'>+</div><div class='add'>+	memset(&amp;ena_dev-&gt;rss, 0x0, sizeof(ena_dev-&gt;rss));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_allocate_host_info(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	struct ena_host_attribute *host_attr = &amp;ena_dev-&gt;host_attr;</div><div class='add'>+</div><div class='add'>+	host_attr-&gt;host_info = dma_alloc_coherent(ena_dev-&gt;dmadev, SZ_4K,</div><div class='add'>+						  &amp;host_attr-&gt;host_info_dma_addr, GFP_KERNEL);</div><div class='add'>+	if (unlikely(!host_attr-&gt;host_info))</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	host_attr-&gt;host_info-&gt;ena_spec_version = ((ENA_COMMON_SPEC_VERSION_MAJOR &lt;&lt;</div><div class='add'>+		ENA_REGS_VERSION_MAJOR_VERSION_SHIFT) |</div><div class='add'>+		(ENA_COMMON_SPEC_VERSION_MINOR));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_allocate_debug_area(struct ena_com_dev *ena_dev,</div><div class='add'>+				u32 debug_area_size)</div><div class='add'>+{</div><div class='add'>+	struct ena_host_attribute *host_attr = &amp;ena_dev-&gt;host_attr;</div><div class='add'>+</div><div class='add'>+	host_attr-&gt;debug_area_virt_addr =</div><div class='add'>+		dma_alloc_coherent(ena_dev-&gt;dmadev, debug_area_size,</div><div class='add'>+				   &amp;host_attr-&gt;debug_area_dma_addr, GFP_KERNEL);</div><div class='add'>+	if (unlikely(!host_attr-&gt;debug_area_virt_addr)) {</div><div class='add'>+		host_attr-&gt;debug_area_size = 0;</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	host_attr-&gt;debug_area_size = debug_area_size;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_allocate_customer_metrics_buffer(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	struct ena_customer_metrics *customer_metrics = &amp;ena_dev-&gt;customer_metrics;</div><div class='add'>+</div><div class='add'>+	customer_metrics-&gt;buffer_len = ENA_CUSTOMER_METRICS_BUFFER_SIZE;</div><div class='add'>+	customer_metrics-&gt;buffer_virt_addr = NULL;</div><div class='add'>+</div><div class='add'>+	customer_metrics-&gt;buffer_virt_addr =</div><div class='add'>+		dma_alloc_coherent(ena_dev-&gt;dmadev, customer_metrics-&gt;buffer_len,</div><div class='add'>+				   &amp;customer_metrics-&gt;buffer_dma_addr, GFP_KERNEL);</div><div class='add'>+	if (!customer_metrics-&gt;buffer_virt_addr) {</div><div class='add'>+		customer_metrics-&gt;buffer_len = 0;</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_com_delete_host_info(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	struct ena_host_attribute *host_attr = &amp;ena_dev-&gt;host_attr;</div><div class='add'>+</div><div class='add'>+	if (host_attr-&gt;host_info) {</div><div class='add'>+		dma_free_coherent(ena_dev-&gt;dmadev, SZ_4K, host_attr-&gt;host_info,</div><div class='add'>+				  host_attr-&gt;host_info_dma_addr);</div><div class='add'>+		host_attr-&gt;host_info = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_com_delete_debug_area(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	struct ena_host_attribute *host_attr = &amp;ena_dev-&gt;host_attr;</div><div class='add'>+</div><div class='add'>+	if (host_attr-&gt;debug_area_virt_addr) {</div><div class='add'>+		dma_free_coherent(ena_dev-&gt;dmadev, host_attr-&gt;debug_area_size,</div><div class='add'>+				  host_attr-&gt;debug_area_virt_addr, host_attr-&gt;debug_area_dma_addr);</div><div class='add'>+		host_attr-&gt;debug_area_virt_addr = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_com_delete_customer_metrics_buffer(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	struct ena_customer_metrics *customer_metrics = &amp;ena_dev-&gt;customer_metrics;</div><div class='add'>+</div><div class='add'>+	if (customer_metrics-&gt;buffer_virt_addr) {</div><div class='add'>+		dma_free_coherent(ena_dev-&gt;dmadev, customer_metrics-&gt;buffer_len,</div><div class='add'>+				  customer_metrics-&gt;buffer_virt_addr,</div><div class='add'>+				  customer_metrics-&gt;buffer_dma_addr);</div><div class='add'>+		customer_metrics-&gt;buffer_virt_addr = NULL;</div><div class='add'>+		customer_metrics-&gt;buffer_len = 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_set_host_attributes(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	struct ena_host_attribute *host_attr = &amp;ena_dev-&gt;host_attr;</div><div class='add'>+	struct ena_com_admin_queue *admin_queue;</div><div class='add'>+	struct ena_admin_set_feat_cmd cmd;</div><div class='add'>+	struct ena_admin_set_feat_resp resp;</div><div class='add'>+</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Host attribute config is called before ena_com_get_dev_attr_feat</div><div class='add'>+	 * so ena_com can't check if the feature is supported.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	memset(&amp;cmd, 0x0, sizeof(cmd));</div><div class='add'>+	admin_queue = &amp;ena_dev-&gt;admin_queue;</div><div class='add'>+</div><div class='add'>+	cmd.aq_common_descriptor.opcode = ENA_ADMIN_SET_FEATURE;</div><div class='add'>+	cmd.feat_common.feature_id = ENA_ADMIN_HOST_ATTR_CONFIG;</div><div class='add'>+</div><div class='add'>+	ret = ena_com_mem_addr_set(ena_dev,</div><div class='add'>+				   &amp;cmd.u.host_attr.debug_ba,</div><div class='add'>+				   host_attr-&gt;debug_area_dma_addr);</div><div class='add'>+	if (unlikely(ret)) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Memory address set failed\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = ena_com_mem_addr_set(ena_dev,</div><div class='add'>+				   &amp;cmd.u.host_attr.os_info_ba,</div><div class='add'>+				   host_attr-&gt;host_info_dma_addr);</div><div class='add'>+	if (unlikely(ret)) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Memory address set failed\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cmd.u.host_attr.debug_area_size = host_attr-&gt;debug_area_size;</div><div class='add'>+</div><div class='add'>+	ret = ena_com_execute_admin_command(admin_queue,</div><div class='add'>+					    (struct ena_admin_aq_entry *)&amp;cmd,</div><div class='add'>+					    sizeof(cmd),</div><div class='add'>+					    (struct ena_admin_acq_entry *)&amp;resp,</div><div class='add'>+					    sizeof(resp));</div><div class='add'>+</div><div class='add'>+	if (unlikely(ret))</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Failed to set host attributes: %d\n", ret);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Interrupt moderation */</div><div class='add'>+bool ena_com_interrupt_moderation_supported(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	return ena_com_check_supported_feature_id(ena_dev,</div><div class='add'>+						  ENA_ADMIN_INTERRUPT_MODERATION);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_com_update_nonadaptive_moderation_interval(struct ena_com_dev *ena_dev,</div><div class='add'>+							  u32 coalesce_usecs,</div><div class='add'>+							  u32 intr_delay_resolution,</div><div class='add'>+							  u32 *intr_moder_interval)</div><div class='add'>+{</div><div class='add'>+	if (!intr_delay_resolution) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "Illegal interrupt delay granularity value\n");</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*intr_moder_interval = coalesce_usecs / intr_delay_resolution;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_update_nonadaptive_moderation_interval_tx(struct ena_com_dev *ena_dev,</div><div class='add'>+						      u32 tx_coalesce_usecs)</div><div class='add'>+{</div><div class='add'>+	return ena_com_update_nonadaptive_moderation_interval(ena_dev,</div><div class='add'>+							      tx_coalesce_usecs,</div><div class='add'>+							      ena_dev-&gt;intr_delay_resolution,</div><div class='add'>+							      &amp;ena_dev-&gt;intr_moder_tx_interval);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_update_nonadaptive_moderation_interval_rx(struct ena_com_dev *ena_dev,</div><div class='add'>+						      u32 rx_coalesce_usecs)</div><div class='add'>+{</div><div class='add'>+	return ena_com_update_nonadaptive_moderation_interval(ena_dev,</div><div class='add'>+							      rx_coalesce_usecs,</div><div class='add'>+							      ena_dev-&gt;intr_delay_resolution,</div><div class='add'>+							      &amp;ena_dev-&gt;intr_moder_rx_interval);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_init_interrupt_moderation(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	struct ena_admin_get_feat_resp get_resp;</div><div class='add'>+	u16 delay_resolution;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = ena_com_get_feature(ena_dev, &amp;get_resp,</div><div class='add'>+				 ENA_ADMIN_INTERRUPT_MODERATION, 0);</div><div class='add'>+</div><div class='add'>+	if (rc) {</div><div class='add'>+		if (rc == -EOPNOTSUPP) {</div><div class='add'>+			netdev_dbg(ena_dev-&gt;net_device, "Feature %d isn't supported\n",</div><div class='add'>+				   ENA_ADMIN_INTERRUPT_MODERATION);</div><div class='add'>+			rc = 0;</div><div class='add'>+		} else {</div><div class='add'>+			netdev_err(ena_dev-&gt;net_device,</div><div class='add'>+				   "Failed to get interrupt moderation admin cmd. rc: %d\n", rc);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* no moderation supported, disable adaptive support */</div><div class='add'>+		ena_com_disable_adaptive_moderation(ena_dev);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* if moderation is supported by device we set adaptive moderation */</div><div class='add'>+	delay_resolution = get_resp.u.intr_moderation.intr_delay_resolution;</div><div class='add'>+	ena_com_update_intr_delay_resolution(ena_dev, delay_resolution);</div><div class='add'>+</div><div class='add'>+	/* Disable adaptive moderation by default - can be enabled later */</div><div class='add'>+	ena_com_disable_adaptive_moderation(ena_dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+unsigned int ena_com_get_nonadaptive_moderation_interval_tx(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	return ena_dev-&gt;intr_moder_tx_interval;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+unsigned int ena_com_get_nonadaptive_moderation_interval_rx(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	return ena_dev-&gt;intr_moder_rx_interval;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_config_dev_mode(struct ena_com_dev *ena_dev,</div><div class='add'>+			    struct ena_admin_feature_llq_desc *llq_features,</div><div class='add'>+			    struct ena_llq_configurations *llq_default_cfg)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_llq_info *llq_info = &amp;ena_dev-&gt;llq_info;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (!llq_features-&gt;max_llq_num) {</div><div class='add'>+		ena_dev-&gt;tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = ena_com_config_llq_info(ena_dev, llq_features, llq_default_cfg);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	ena_dev-&gt;tx_max_header_size = llq_info-&gt;desc_list_entry_size -</div><div class='add'>+		(llq_info-&gt;descs_num_before_header * sizeof(struct ena_eth_io_tx_desc));</div><div class='add'>+</div><div class='add'>+	if (unlikely(ena_dev-&gt;tx_max_header_size == 0)) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device, "The size of the LLQ entry is smaller than needed\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ena_dev-&gt;tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_DEV;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/amazon/ena/ena_com.h b/drivers/net/ethernet/amazon/ena/ena_com.h<br/>new file mode 100644<br/>index 000000000000..64df2c48c9a6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_com.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amazon/ena/ena_com.h</a></div><div class='hunk'>@@ -0,0 +1,1140 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015-2020 Amazon.com, Inc. or its affiliates. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef ENA_COM</div><div class='add'>+#define ENA_COM</div><div class='add'>+</div><div class='add'>+#include &lt;linux/compiler.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/dma-mapping.h&gt;</div><div class='add'>+#include &lt;linux/gfp.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/prefetch.h&gt;</div><div class='add'>+#include &lt;linux/sched.h&gt;</div><div class='add'>+#include &lt;linux/sizes.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/wait.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ena_common_defs.h"</div><div class='add'>+#include "ena_admin_defs.h"</div><div class='add'>+#include "ena_eth_io_defs.h"</div><div class='add'>+#include "ena_regs_defs.h"</div><div class='add'>+</div><div class='add'>+#undef pr_fmt</div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='add'>+#define ENA_MAX_NUM_IO_QUEUES 128U</div><div class='add'>+/* We need to queues for each IO (on for Tx and one for Rx) */</div><div class='add'>+#define ENA_TOTAL_NUM_QUEUES (2 * (ENA_MAX_NUM_IO_QUEUES))</div><div class='add'>+</div><div class='add'>+#define ENA_MAX_HANDLERS 256</div><div class='add'>+</div><div class='add'>+#define ENA_MAX_PHYS_ADDR_SIZE_BITS 48</div><div class='add'>+</div><div class='add'>+/* Unit in usec */</div><div class='add'>+#define ENA_REG_READ_TIMEOUT 200000</div><div class='add'>+</div><div class='add'>+#define ADMIN_SQ_SIZE(depth)	((depth) * sizeof(struct ena_admin_aq_entry))</div><div class='add'>+#define ADMIN_CQ_SIZE(depth)	((depth) * sizeof(struct ena_admin_acq_entry))</div><div class='add'>+#define ADMIN_AENQ_SIZE(depth)	((depth) * sizeof(struct ena_admin_aenq_entry))</div><div class='add'>+</div><div class='add'>+#define ENA_CUSTOMER_METRICS_BUFFER_SIZE 512</div><div class='add'>+</div><div class='add'>+/*****************************************************************************/</div><div class='add'>+/*****************************************************************************/</div><div class='add'>+/* ENA adaptive interrupt moderation settings */</div><div class='add'>+</div><div class='add'>+#define ENA_INTR_INITIAL_TX_INTERVAL_USECS 64</div><div class='add'>+#define ENA_INTR_INITIAL_RX_INTERVAL_USECS 20</div><div class='add'>+#define ENA_DEFAULT_INTR_DELAY_RESOLUTION 1</div><div class='add'>+</div><div class='add'>+#define ENA_HASH_KEY_SIZE 40</div><div class='add'>+</div><div class='add'>+#define ENA_HW_HINTS_NO_TIMEOUT	0xFFFF</div><div class='add'>+</div><div class='add'>+#define ENA_FEATURE_MAX_QUEUE_EXT_VER 1</div><div class='add'>+</div><div class='add'>+struct ena_llq_configurations {</div><div class='add'>+	enum ena_admin_llq_header_location llq_header_location;</div><div class='add'>+	enum ena_admin_llq_ring_entry_size llq_ring_entry_size;</div><div class='add'>+	enum ena_admin_llq_stride_ctrl  llq_stride_ctrl;</div><div class='add'>+	enum ena_admin_llq_num_descs_before_header llq_num_decs_before_header;</div><div class='add'>+	u16 llq_ring_entry_size_value;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum queue_direction {</div><div class='add'>+	ENA_COM_IO_QUEUE_DIRECTION_TX,</div><div class='add'>+	ENA_COM_IO_QUEUE_DIRECTION_RX</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_com_buf {</div><div class='add'>+	dma_addr_t paddr; /**&lt; Buffer physical address */</div><div class='add'>+	u16 len; /**&lt; Buffer length in bytes */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_com_rx_buf_info {</div><div class='add'>+	u16 len;</div><div class='add'>+	u16 req_id;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_com_io_desc_addr {</div><div class='add'>+	u8 __iomem *pbuf_dev_addr; /* LLQ address */</div><div class='add'>+	u8 *virt_addr;</div><div class='add'>+	dma_addr_t phys_addr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_com_tx_meta {</div><div class='add'>+	u16 mss;</div><div class='add'>+	u16 l3_hdr_len;</div><div class='add'>+	u16 l3_hdr_offset;</div><div class='add'>+	u16 l4_hdr_len; /* In words */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_com_llq_info {</div><div class='add'>+	u16 header_location_ctrl;</div><div class='add'>+	u16 desc_stride_ctrl;</div><div class='add'>+	u16 desc_list_entry_size_ctrl;</div><div class='add'>+	u16 desc_list_entry_size;</div><div class='add'>+	u16 descs_num_before_header;</div><div class='add'>+	u16 descs_per_entry;</div><div class='add'>+	u16 max_entries_in_tx_burst;</div><div class='add'>+	bool disable_meta_caching;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_com_io_cq {</div><div class='add'>+	struct ena_com_io_desc_addr cdesc_addr;</div><div class='add'>+</div><div class='add'>+	/* Interrupt unmask register */</div><div class='add'>+	u32 __iomem *unmask_reg;</div><div class='add'>+</div><div class='add'>+	/* numa configuration register (for TPH) */</div><div class='add'>+	u32 __iomem *numa_node_cfg_reg;</div><div class='add'>+</div><div class='add'>+	/* The value to write to the above register to unmask</div><div class='add'>+	 * the interrupt of this queue</div><div class='add'>+	 */</div><div class='add'>+	u32 msix_vector ____cacheline_aligned;</div><div class='add'>+</div><div class='add'>+	enum queue_direction direction;</div><div class='add'>+</div><div class='add'>+	/* holds the number of cdesc of the current packet */</div><div class='add'>+	u16 cur_rx_pkt_cdesc_count;</div><div class='add'>+	/* save the first cdesc idx of the current packet */</div><div class='add'>+	u16 cur_rx_pkt_cdesc_start_idx;</div><div class='add'>+</div><div class='add'>+	u16 q_depth;</div><div class='add'>+	/* Caller qid */</div><div class='add'>+	u16 qid;</div><div class='add'>+</div><div class='add'>+	/* Device queue index */</div><div class='add'>+	u16 idx;</div><div class='add'>+	u16 head;</div><div class='add'>+	u8 phase;</div><div class='add'>+	u8 cdesc_entry_size_in_bytes;</div><div class='add'>+</div><div class='add'>+} ____cacheline_aligned;</div><div class='add'>+</div><div class='add'>+struct ena_com_io_bounce_buffer_control {</div><div class='add'>+	u8 *base_buffer;</div><div class='add'>+	u16 next_to_use;</div><div class='add'>+	u16 buffer_size;</div><div class='add'>+	u16 buffers_num;  /* Must be a power of 2 */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* This struct is to keep tracking the current location of the next llq entry */</div><div class='add'>+struct ena_com_llq_pkt_ctrl {</div><div class='add'>+	u8 *curr_bounce_buf;</div><div class='add'>+	u16 idx;</div><div class='add'>+	u16 descs_left_in_line;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_com_io_sq {</div><div class='add'>+	struct ena_com_io_desc_addr desc_addr;</div><div class='add'>+</div><div class='add'>+	u32 __iomem *db_addr;</div><div class='add'>+</div><div class='add'>+	enum queue_direction direction;</div><div class='add'>+	enum ena_admin_placement_policy_type mem_queue_type;</div><div class='add'>+</div><div class='add'>+	bool disable_meta_caching;</div><div class='add'>+</div><div class='add'>+	u32 msix_vector;</div><div class='add'>+	struct ena_com_tx_meta cached_tx_meta;</div><div class='add'>+	struct ena_com_llq_info llq_info;</div><div class='add'>+	struct ena_com_llq_pkt_ctrl llq_buf_ctrl;</div><div class='add'>+	struct ena_com_io_bounce_buffer_control bounce_buf_ctrl;</div><div class='add'>+</div><div class='add'>+	u16 q_depth;</div><div class='add'>+	u16 qid;</div><div class='add'>+</div><div class='add'>+	u16 idx;</div><div class='add'>+	u16 tail;</div><div class='add'>+	u16 next_to_comp;</div><div class='add'>+	u16 llq_last_copy_tail;</div><div class='add'>+	u32 tx_max_header_size;</div><div class='add'>+	u8 phase;</div><div class='add'>+	u8 desc_entry_size;</div><div class='add'>+	u8 dma_addr_bits;</div><div class='add'>+	u16 entries_in_tx_burst_left;</div><div class='add'>+} ____cacheline_aligned;</div><div class='add'>+</div><div class='add'>+struct ena_com_admin_cq {</div><div class='add'>+	struct ena_admin_acq_entry *entries;</div><div class='add'>+	dma_addr_t dma_addr;</div><div class='add'>+</div><div class='add'>+	u16 head;</div><div class='add'>+	u8 phase;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_com_admin_sq {</div><div class='add'>+	struct ena_admin_aq_entry *entries;</div><div class='add'>+	dma_addr_t dma_addr;</div><div class='add'>+</div><div class='add'>+	u32 __iomem *db_addr;</div><div class='add'>+</div><div class='add'>+	u16 head;</div><div class='add'>+	u16 tail;</div><div class='add'>+	u8 phase;</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_com_stats_admin {</div><div class='add'>+	u64 aborted_cmd;</div><div class='add'>+	u64 submitted_cmd;</div><div class='add'>+	u64 completed_cmd;</div><div class='add'>+	u64 out_of_space;</div><div class='add'>+	u64 no_completion;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_com_stats_phc {</div><div class='add'>+	u64 phc_cnt;</div><div class='add'>+	u64 phc_exp;</div><div class='add'>+	u64 phc_skp;</div><div class='add'>+	u64 phc_err_dv;</div><div class='add'>+	u64 phc_err_ts;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_com_admin_queue {</div><div class='add'>+	void *q_dmadev;</div><div class='add'>+	struct ena_com_dev *ena_dev;</div><div class='add'>+	spinlock_t q_lock; /* spinlock for the admin queue */</div><div class='add'>+</div><div class='add'>+	struct ena_comp_ctx *comp_ctx;</div><div class='add'>+	u32 completion_timeout;</div><div class='add'>+	u16 q_depth;</div><div class='add'>+	struct ena_com_admin_cq cq;</div><div class='add'>+	struct ena_com_admin_sq sq;</div><div class='add'>+</div><div class='add'>+	/* Indicate if the admin queue should poll for completion */</div><div class='add'>+	bool polling;</div><div class='add'>+</div><div class='add'>+	u16 curr_cmd_id;</div><div class='add'>+</div><div class='add'>+	/* Indicate that the ena was initialized and can</div><div class='add'>+	 * process new admin commands</div><div class='add'>+	 */</div><div class='add'>+	bool running_state;</div><div class='add'>+</div><div class='add'>+	/* Count the number of outstanding admin commands */</div><div class='add'>+	atomic_t outstanding_cmds;</div><div class='add'>+</div><div class='add'>+	struct ena_com_stats_admin stats;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_aenq_handlers;</div><div class='add'>+</div><div class='add'>+struct ena_com_aenq {</div><div class='add'>+	u16 head;</div><div class='add'>+	u8 phase;</div><div class='add'>+	struct ena_admin_aenq_entry *entries;</div><div class='add'>+	dma_addr_t dma_addr;</div><div class='add'>+	u16 q_depth;</div><div class='add'>+	struct ena_aenq_handlers *aenq_handlers;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_com_mmio_read {</div><div class='add'>+	struct ena_admin_ena_mmio_req_read_less_resp *read_resp;</div><div class='add'>+	dma_addr_t read_resp_dma_addr;</div><div class='add'>+	u32 reg_read_to; /* in us */</div><div class='add'>+	u16 seq_num;</div><div class='add'>+	bool readless_supported;</div><div class='add'>+	/* spin lock to ensure a single outstanding read */</div><div class='add'>+	spinlock_t lock;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* PTP hardware clock (PHC) MMIO read data info */</div><div class='add'>+struct ena_com_phc_info {</div><div class='add'>+	/* Internal PHC statistics */</div><div class='add'>+	struct ena_com_stats_phc stats;</div><div class='add'>+</div><div class='add'>+	/* PHC shared memory - virtual address */</div><div class='add'>+	struct ena_admin_phc_resp *virt_addr;</div><div class='add'>+</div><div class='add'>+	/* System time of last PHC request */</div><div class='add'>+	ktime_t system_time;</div><div class='add'>+</div><div class='add'>+	/* Spin lock to ensure a single outstanding PHC read */</div><div class='add'>+	spinlock_t lock;</div><div class='add'>+</div><div class='add'>+	/* PHC doorbell address as an offset to PCIe MMIO REG BAR */</div><div class='add'>+	u32 doorbell_offset;</div><div class='add'>+</div><div class='add'>+	/* Shared memory read expire timeout (usec)</div><div class='add'>+	 * Max time for valid PHC retrieval, passing this threshold will fail</div><div class='add'>+	 * the get time request and block new PHC requests for block_timeout_usec</div><div class='add'>+	 * in order to prevent floods on busy device</div><div class='add'>+	 */</div><div class='add'>+	u32 expire_timeout_usec;</div><div class='add'>+</div><div class='add'>+	/* Shared memory read abort timeout (usec)</div><div class='add'>+	 * PHC requests block period, blocking starts once PHC request expired</div><div class='add'>+	 * in order to prevent floods on busy device,</div><div class='add'>+	 * any PHC requests during block period will be skipped</div><div class='add'>+	 */</div><div class='add'>+	u32 block_timeout_usec;</div><div class='add'>+</div><div class='add'>+	/* PHC shared memory - physical address */</div><div class='add'>+	dma_addr_t phys_addr;</div><div class='add'>+</div><div class='add'>+	/* Request id sent to the device */</div><div class='add'>+	u16 req_id;</div><div class='add'>+</div><div class='add'>+	/* True if PHC is active in the device */</div><div class='add'>+	bool active;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_rss {</div><div class='add'>+	/* Indirect table */</div><div class='add'>+	u16 *host_rss_ind_tbl;</div><div class='add'>+	struct ena_admin_rss_ind_table_entry *rss_ind_tbl;</div><div class='add'>+	dma_addr_t rss_ind_tbl_dma_addr;</div><div class='add'>+	u16 tbl_log_size;</div><div class='add'>+</div><div class='add'>+	/* Hash key */</div><div class='add'>+	enum ena_admin_hash_functions hash_func;</div><div class='add'>+	struct ena_admin_feature_rss_flow_hash_control *hash_key;</div><div class='add'>+	dma_addr_t hash_key_dma_addr;</div><div class='add'>+	u32 hash_init_val;</div><div class='add'>+</div><div class='add'>+	/* Flow Control */</div><div class='add'>+	struct ena_admin_feature_rss_hash_control *hash_ctrl;</div><div class='add'>+	dma_addr_t hash_ctrl_dma_addr;</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_customer_metrics {</div><div class='add'>+	/* in correlation with ENA_ADMIN_CUSTOMER_METRICS_SUPPORT_MASK</div><div class='add'>+	 * and ena_admin_customer_metrics_id</div><div class='add'>+	 */</div><div class='add'>+	u64 supported_metrics;</div><div class='add'>+	dma_addr_t buffer_dma_addr;</div><div class='add'>+	void *buffer_virt_addr;</div><div class='add'>+	u32 buffer_len;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_host_attribute {</div><div class='add'>+	/* Debug area */</div><div class='add'>+	u8 *debug_area_virt_addr;</div><div class='add'>+	dma_addr_t debug_area_dma_addr;</div><div class='add'>+	u32 debug_area_size;</div><div class='add'>+</div><div class='add'>+	/* Host information */</div><div class='add'>+	struct ena_admin_host_info *host_info;</div><div class='add'>+	dma_addr_t host_info_dma_addr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Each ena_dev is a PCI function. */</div><div class='add'>+struct ena_com_dev {</div><div class='add'>+	struct ena_com_admin_queue admin_queue;</div><div class='add'>+	struct ena_com_aenq aenq;</div><div class='add'>+	struct ena_com_io_cq io_cq_queues[ENA_TOTAL_NUM_QUEUES];</div><div class='add'>+	struct ena_com_io_sq io_sq_queues[ENA_TOTAL_NUM_QUEUES];</div><div class='add'>+	u8 __iomem *reg_bar;</div><div class='add'>+	void __iomem *mem_bar;</div><div class='add'>+	void *dmadev;</div><div class='add'>+	struct net_device *net_device;</div><div class='add'>+</div><div class='add'>+	enum ena_admin_placement_policy_type tx_mem_queue_type;</div><div class='add'>+	u32 tx_max_header_size;</div><div class='add'>+	u16 stats_func; /* Selected function for extended statistic dump */</div><div class='add'>+	u16 stats_queue; /* Selected queue for extended statistic dump */</div><div class='add'>+</div><div class='add'>+	u32 ena_min_poll_delay_us;</div><div class='add'>+</div><div class='add'>+	struct ena_com_mmio_read mmio_read;</div><div class='add'>+	struct ena_com_phc_info phc;</div><div class='add'>+</div><div class='add'>+	struct ena_rss rss;</div><div class='add'>+	u32 supported_features;</div><div class='add'>+	u32 capabilities;</div><div class='add'>+	u32 dma_addr_bits;</div><div class='add'>+</div><div class='add'>+	struct ena_host_attribute host_attr;</div><div class='add'>+	bool adaptive_coalescing;</div><div class='add'>+	u16 intr_delay_resolution;</div><div class='add'>+</div><div class='add'>+	/* interrupt moderation intervals are in usec divided by</div><div class='add'>+	 * intr_delay_resolution, which is supplied by the device.</div><div class='add'>+	 */</div><div class='add'>+	u32 intr_moder_tx_interval;</div><div class='add'>+	u32 intr_moder_rx_interval;</div><div class='add'>+</div><div class='add'>+	struct ena_intr_moder_entry *intr_moder_tbl;</div><div class='add'>+</div><div class='add'>+	struct ena_com_llq_info llq_info;</div><div class='add'>+</div><div class='add'>+	struct ena_customer_metrics customer_metrics;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_com_dev_get_features_ctx {</div><div class='add'>+	struct ena_admin_queue_feature_desc max_queues;</div><div class='add'>+	struct ena_admin_queue_ext_feature_desc max_queue_ext;</div><div class='add'>+	struct ena_admin_device_attr_feature_desc dev_attr;</div><div class='add'>+	struct ena_admin_feature_aenq_desc aenq;</div><div class='add'>+	struct ena_admin_feature_offload_desc offload;</div><div class='add'>+	struct ena_admin_ena_hw_hints hw_hints;</div><div class='add'>+	struct ena_admin_feature_llq_desc llq;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_com_create_io_ctx {</div><div class='add'>+	enum ena_admin_placement_policy_type mem_queue_type;</div><div class='add'>+	enum queue_direction direction;</div><div class='add'>+	int numa_node;</div><div class='add'>+	u32 msix_vector;</div><div class='add'>+	u16 queue_size;</div><div class='add'>+	u16 qid;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+typedef void (*ena_aenq_handler)(void *data,</div><div class='add'>+	struct ena_admin_aenq_entry *aenq_e);</div><div class='add'>+</div><div class='add'>+/* Holds aenq handlers. Indexed by AENQ event group */</div><div class='add'>+struct ena_aenq_handlers {</div><div class='add'>+	ena_aenq_handler handlers[ENA_MAX_HANDLERS];</div><div class='add'>+	ena_aenq_handler unimplemented_handler;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*****************************************************************************/</div><div class='add'>+/*****************************************************************************/</div><div class='add'>+</div><div class='add'>+/* ena_com_mmio_reg_read_request_init - Init the mmio reg read mechanism</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ *</div><div class='add'>+ * Initialize the register read mechanism.</div><div class='add'>+ *</div><div class='add'>+ * @note: This method must be the first stage in the initialization sequence.</div><div class='add'>+ *</div><div class='add'>+ * @return - 0 on success, negative value on failure.</div><div class='add'>+ */</div><div class='add'>+int ena_com_mmio_reg_read_request_init(struct ena_com_dev *ena_dev);</div><div class='add'>+</div><div class='add'>+/* ena_com_phc_init - Allocate and initialize PHC feature</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ * @note: This method assumes PHC is supported by the device</div><div class='add'>+ * @return - 0 on success, negative value on failure</div><div class='add'>+ */</div><div class='add'>+int ena_com_phc_init(struct ena_com_dev *ena_dev);</div><div class='add'>+</div><div class='add'>+/* ena_com_phc_supported - Return if PHC feature is supported by the device</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ * @note: This method must be called after getting supported features</div><div class='add'>+ * @return - supported or not</div><div class='add'>+ */</div><div class='add'>+bool ena_com_phc_supported(struct ena_com_dev *ena_dev);</div><div class='add'>+</div><div class='add'>+/* ena_com_phc_config - Configure PHC feature</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ * Configure PHC feature in driver and device</div><div class='add'>+ * @note: This method assumes PHC is supported by the device</div><div class='add'>+ * @return - 0 on success, negative value on failure</div><div class='add'>+ */</div><div class='add'>+int ena_com_phc_config(struct ena_com_dev *ena_dev);</div><div class='add'>+</div><div class='add'>+/* ena_com_phc_destroy - Destroy PHC feature</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ */</div><div class='add'>+void ena_com_phc_destroy(struct ena_com_dev *ena_dev);</div><div class='add'>+</div><div class='add'>+/* ena_com_phc_get_timestamp - Retrieve PHC timestamp</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ * @timestamp: Retrieved PHC timestamp</div><div class='add'>+ * @return - 0 on success, negative value on failure</div><div class='add'>+ */</div><div class='add'>+int ena_com_phc_get_timestamp(struct ena_com_dev *ena_dev, u64 *timestamp);</div><div class='add'>+</div><div class='add'>+/* ena_com_set_mmio_read_mode - Enable/disable the indirect mmio reg read mechanism</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ * @readless_supported: readless mode (enable/disable)</div><div class='add'>+ */</div><div class='add'>+void ena_com_set_mmio_read_mode(struct ena_com_dev *ena_dev,</div><div class='add'>+				bool readless_supported);</div><div class='add'>+</div><div class='add'>+/* ena_com_mmio_reg_read_request_write_dev_addr - Write the mmio reg read return</div><div class='add'>+ * value physical address.</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ */</div><div class='add'>+void ena_com_mmio_reg_read_request_write_dev_addr(struct ena_com_dev *ena_dev);</div><div class='add'>+</div><div class='add'>+/* ena_com_mmio_reg_read_request_destroy - Destroy the mmio reg read mechanism</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ */</div><div class='add'>+void ena_com_mmio_reg_read_request_destroy(struct ena_com_dev *ena_dev);</div><div class='add'>+</div><div class='add'>+/* ena_com_admin_init - Init the admin and the async queues</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ * @aenq_handlers: Those handlers to be called upon event.</div><div class='add'>+ *</div><div class='add'>+ * Initialize the admin submission and completion queues.</div><div class='add'>+ * Initialize the asynchronous events notification queues.</div><div class='add'>+ *</div><div class='add'>+ * @return - 0 on success, negative value on failure.</div><div class='add'>+ */</div><div class='add'>+int ena_com_admin_init(struct ena_com_dev *ena_dev,</div><div class='add'>+		       struct ena_aenq_handlers *aenq_handlers);</div><div class='add'>+</div><div class='add'>+/* ena_com_admin_destroy - Destroy the admin and the async events queues.</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ *</div><div class='add'>+ * @note: Before calling this method, the caller must validate that the device</div><div class='add'>+ * won't send any additional admin completions/aenq.</div><div class='add'>+ * To achieve that, a FLR is recommended.</div><div class='add'>+ */</div><div class='add'>+void ena_com_admin_destroy(struct ena_com_dev *ena_dev);</div><div class='add'>+</div><div class='add'>+/* ena_com_dev_reset - Perform device FLR to the device.</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ * @reset_reason: Specify what is the trigger for the reset in case of an error.</div><div class='add'>+ *</div><div class='add'>+ * @return - 0 on success, negative value on failure.</div><div class='add'>+ */</div><div class='add'>+int ena_com_dev_reset(struct ena_com_dev *ena_dev,</div><div class='add'>+		      enum ena_regs_reset_reason_types reset_reason);</div><div class='add'>+</div><div class='add'>+/* ena_com_create_io_queue - Create io queue.</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ * @ctx - create context structure</div><div class='add'>+ *</div><div class='add'>+ * Create the submission and the completion queues.</div><div class='add'>+ *</div><div class='add'>+ * @return - 0 on success, negative value on failure.</div><div class='add'>+ */</div><div class='add'>+int ena_com_create_io_queue(struct ena_com_dev *ena_dev,</div><div class='add'>+			    struct ena_com_create_io_ctx *ctx);</div><div class='add'>+</div><div class='add'>+/* ena_com_destroy_io_queue - Destroy IO queue with the queue id - qid.</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ * @qid - the caller virtual queue id.</div><div class='add'>+ */</div><div class='add'>+void ena_com_destroy_io_queue(struct ena_com_dev *ena_dev, u16 qid);</div><div class='add'>+</div><div class='add'>+/* ena_com_get_io_handlers - Return the io queue handlers</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ * @qid - the caller virtual queue id.</div><div class='add'>+ * @io_sq - IO submission queue handler</div><div class='add'>+ * @io_cq - IO completion queue handler.</div><div class='add'>+ *</div><div class='add'>+ * @return - 0 on success, negative value on failure.</div><div class='add'>+ */</div><div class='add'>+int ena_com_get_io_handlers(struct ena_com_dev *ena_dev, u16 qid,</div><div class='add'>+			    struct ena_com_io_sq **io_sq,</div><div class='add'>+			    struct ena_com_io_cq **io_cq);</div><div class='add'>+</div><div class='add'>+/* ena_com_admin_aenq_enable - ENAble asynchronous event notifications</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ *</div><div class='add'>+ * After this method, aenq event can be received via AENQ.</div><div class='add'>+ */</div><div class='add'>+void ena_com_admin_aenq_enable(struct ena_com_dev *ena_dev);</div><div class='add'>+</div><div class='add'>+/* ena_com_set_admin_running_state - Set the state of the admin queue</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ *</div><div class='add'>+ * Change the state of the admin queue (enable/disable)</div><div class='add'>+ */</div><div class='add'>+void ena_com_set_admin_running_state(struct ena_com_dev *ena_dev, bool state);</div><div class='add'>+</div><div class='add'>+/* ena_com_get_admin_running_state - Get the admin queue state</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ *</div><div class='add'>+ * Retrieve the state of the admin queue (enable/disable)</div><div class='add'>+ *</div><div class='add'>+ * @return - current polling mode (enable/disable)</div><div class='add'>+ */</div><div class='add'>+bool ena_com_get_admin_running_state(struct ena_com_dev *ena_dev);</div><div class='add'>+</div><div class='add'>+/* ena_com_set_admin_polling_mode - Set the admin completion queue polling mode</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ * @polling: ENAble/Disable polling mode</div><div class='add'>+ *</div><div class='add'>+ * Set the admin completion mode.</div><div class='add'>+ */</div><div class='add'>+void ena_com_set_admin_polling_mode(struct ena_com_dev *ena_dev, bool polling);</div><div class='add'>+</div><div class='add'>+/* ena_com_admin_q_comp_intr_handler - admin queue interrupt handler</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ *</div><div class='add'>+ * This method goes over the admin completion queue and wakes up all the pending</div><div class='add'>+ * threads that wait on the commands wait event.</div><div class='add'>+ *</div><div class='add'>+ * @note: Should be called after MSI-X interrupt.</div><div class='add'>+ */</div><div class='add'>+void ena_com_admin_q_comp_intr_handler(struct ena_com_dev *ena_dev);</div><div class='add'>+</div><div class='add'>+/* ena_com_aenq_intr_handler - AENQ interrupt handler</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ *</div><div class='add'>+ * This method goes over the async event notification queue and calls the proper</div><div class='add'>+ * aenq handler.</div><div class='add'>+ */</div><div class='add'>+void ena_com_aenq_intr_handler(struct ena_com_dev *ena_dev, void *data);</div><div class='add'>+</div><div class='add'>+/* ena_com_abort_admin_commands - Abort all the outstanding admin commands.</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ *</div><div class='add'>+ * This method aborts all the outstanding admin commands.</div><div class='add'>+ * The caller should then call ena_com_wait_for_abort_completion to make sure</div><div class='add'>+ * all the commands were completed.</div><div class='add'>+ */</div><div class='add'>+void ena_com_abort_admin_commands(struct ena_com_dev *ena_dev);</div><div class='add'>+</div><div class='add'>+/* ena_com_wait_for_abort_completion - Wait for admin commands abort.</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ *</div><div class='add'>+ * This method waits until all the outstanding admin commands are completed.</div><div class='add'>+ */</div><div class='add'>+void ena_com_wait_for_abort_completion(struct ena_com_dev *ena_dev);</div><div class='add'>+</div><div class='add'>+/* ena_com_validate_version - Validate the device parameters</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ *</div><div class='add'>+ * This method verifies the device parameters are the same as the saved</div><div class='add'>+ * parameters in ena_dev.</div><div class='add'>+ * This method is useful after device reset, to validate the device mac address</div><div class='add'>+ * and the device offloads are the same as before the reset.</div><div class='add'>+ *</div><div class='add'>+ * @return - 0 on success negative value otherwise.</div><div class='add'>+ */</div><div class='add'>+int ena_com_validate_version(struct ena_com_dev *ena_dev);</div><div class='add'>+</div><div class='add'>+/* ena_com_get_link_params - Retrieve physical link parameters.</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ * @resp: Link parameters</div><div class='add'>+ *</div><div class='add'>+ * Retrieve the physical link parameters,</div><div class='add'>+ * like speed, auto-negotiation and full duplex support.</div><div class='add'>+ *</div><div class='add'>+ * @return - 0 on Success negative value otherwise.</div><div class='add'>+ */</div><div class='add'>+int ena_com_get_link_params(struct ena_com_dev *ena_dev,</div><div class='add'>+			    struct ena_admin_get_feat_resp *resp);</div><div class='add'>+</div><div class='add'>+/* ena_com_get_dma_width - Retrieve physical dma address width the device</div><div class='add'>+ * supports.</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ *</div><div class='add'>+ * Retrieve the maximum physical address bits the device can handle.</div><div class='add'>+ *</div><div class='add'>+ * @return: &gt; 0 on Success and negative value otherwise.</div><div class='add'>+ */</div><div class='add'>+int ena_com_get_dma_width(struct ena_com_dev *ena_dev);</div><div class='add'>+</div><div class='add'>+/* ena_com_set_aenq_config - Set aenq groups configurations</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ * @groups flag: bit fields flags of enum ena_admin_aenq_group.</div><div class='add'>+ *</div><div class='add'>+ * Configure which aenq event group the driver would like to receive.</div><div class='add'>+ *</div><div class='add'>+ * @return: 0 on Success and negative value otherwise.</div><div class='add'>+ */</div><div class='add'>+int ena_com_set_aenq_config(struct ena_com_dev *ena_dev, u32 groups_flag);</div><div class='add'>+</div><div class='add'>+/* ena_com_get_dev_attr_feat - Get device features</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ * @get_feat_ctx: returned context that contain the get features.</div><div class='add'>+ *</div><div class='add'>+ * @return: 0 on Success and negative value otherwise.</div><div class='add'>+ */</div><div class='add'>+int ena_com_get_dev_attr_feat(struct ena_com_dev *ena_dev,</div><div class='add'>+			      struct ena_com_dev_get_features_ctx *get_feat_ctx);</div><div class='add'>+</div><div class='add'>+/* ena_com_get_eni_stats - Get extended network interface statistics</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ * @stats: stats return value</div><div class='add'>+ *</div><div class='add'>+ * @return: 0 on Success and negative value otherwise.</div><div class='add'>+ */</div><div class='add'>+int ena_com_get_eni_stats(struct ena_com_dev *ena_dev,</div><div class='add'>+			  struct ena_admin_eni_stats *stats);</div><div class='add'>+</div><div class='add'>+/* ena_com_get_ena_srd_info - Get ENA SRD network interface statistics</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ * @info: ena srd stats and flags</div><div class='add'>+ *</div><div class='add'>+ * @return: 0 on Success and negative value otherwise.</div><div class='add'>+ */</div><div class='add'>+int ena_com_get_ena_srd_info(struct ena_com_dev *ena_dev,</div><div class='add'>+			     struct ena_admin_ena_srd_info *info);</div><div class='add'>+</div><div class='add'>+/* ena_com_get_customer_metrics - Get customer metrics for network interface</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ * @buffer: buffer for returned customer metrics</div><div class='add'>+ * @len: size of the buffer</div><div class='add'>+ *</div><div class='add'>+ * @return: 0 on Success and negative value otherwise.</div><div class='add'>+ */</div><div class='add'>+int ena_com_get_customer_metrics(struct ena_com_dev *ena_dev, char *buffer, u32 len);</div><div class='add'>+</div><div class='add'>+/* ena_com_set_dev_mtu - Configure the device mtu.</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ * @mtu: mtu value</div><div class='add'>+ *</div><div class='add'>+ * @return: 0 on Success and negative value otherwise.</div><div class='add'>+ */</div><div class='add'>+int ena_com_set_dev_mtu(struct ena_com_dev *ena_dev, u32 mtu);</div><div class='add'>+</div><div class='add'>+/* ena_com_rss_init - Init RSS</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ * @log_size: indirection log size</div><div class='add'>+ *</div><div class='add'>+ * Allocate RSS/RFS resources.</div><div class='add'>+ * The caller then can configure rss using ena_com_set_hash_function,</div><div class='add'>+ * ena_com_set_hash_ctrl and ena_com_indirect_table_set.</div><div class='add'>+ *</div><div class='add'>+ * @return: 0 on Success and negative value otherwise.</div><div class='add'>+ */</div><div class='add'>+int ena_com_rss_init(struct ena_com_dev *ena_dev, u16 log_size);</div><div class='add'>+</div><div class='add'>+/* ena_com_rss_destroy - Destroy rss</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ *</div><div class='add'>+ * Free all the RSS/RFS resources.</div><div class='add'>+ */</div><div class='add'>+void ena_com_rss_destroy(struct ena_com_dev *ena_dev);</div><div class='add'>+</div><div class='add'>+/* ena_com_get_current_hash_function - Get RSS hash function</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ *</div><div class='add'>+ * Return the current hash function.</div><div class='add'>+ * @return: 0 or one of the ena_admin_hash_functions values.</div><div class='add'>+ */</div><div class='add'>+int ena_com_get_current_hash_function(struct ena_com_dev *ena_dev);</div><div class='add'>+</div><div class='add'>+/* ena_com_fill_hash_function - Fill RSS hash function</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ * @func: The hash function (Toeplitz or crc)</div><div class='add'>+ * @key: Hash key (for toeplitz hash)</div><div class='add'>+ * @key_len: key length (max length 10 DW)</div><div class='add'>+ * @init_val: initial value for the hash function</div><div class='add'>+ *</div><div class='add'>+ * Fill the ena_dev resources with the desire hash function, hash key, key_len</div><div class='add'>+ * and key initial value (if needed by the hash function).</div><div class='add'>+ * To flush the key into the device the caller should call</div><div class='add'>+ * ena_com_set_hash_function.</div><div class='add'>+ *</div><div class='add'>+ * @return: 0 on Success and negative value otherwise.</div><div class='add'>+ */</div><div class='add'>+int ena_com_fill_hash_function(struct ena_com_dev *ena_dev,</div><div class='add'>+			       enum ena_admin_hash_functions func,</div><div class='add'>+			       const u8 *key, u16 key_len, u32 init_val);</div><div class='add'>+</div><div class='add'>+/* ena_com_set_hash_function - Flush the hash function and it dependencies to</div><div class='add'>+ * the device.</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ *</div><div class='add'>+ * Flush the hash function and it dependencies (key, key length and</div><div class='add'>+ * initial value) if needed.</div><div class='add'>+ *</div><div class='add'>+ * @note: Prior to this method the caller should call ena_com_fill_hash_function</div><div class='add'>+ *</div><div class='add'>+ * @return: 0 on Success and negative value otherwise.</div><div class='add'>+ */</div><div class='add'>+int ena_com_set_hash_function(struct ena_com_dev *ena_dev);</div><div class='add'>+</div><div class='add'>+/* ena_com_get_hash_function - Retrieve the hash function from the device.</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ * @func: hash function</div><div class='add'>+ *</div><div class='add'>+ * Retrieve the hash function from the device.</div><div class='add'>+ *</div><div class='add'>+ * @note: If the caller called ena_com_fill_hash_function but didn't flush</div><div class='add'>+ * it to the device, the new configuration will be lost.</div><div class='add'>+ *</div><div class='add'>+ * @return: 0 on Success and negative value otherwise.</div><div class='add'>+ */</div><div class='add'>+int ena_com_get_hash_function(struct ena_com_dev *ena_dev,</div><div class='add'>+			      enum ena_admin_hash_functions *func);</div><div class='add'>+</div><div class='add'>+/* ena_com_get_hash_key - Retrieve the hash key</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ * @key: hash key</div><div class='add'>+ *</div><div class='add'>+ * Retrieve the hash key.</div><div class='add'>+ *</div><div class='add'>+ * @note: If the caller called ena_com_fill_hash_key but didn't flush</div><div class='add'>+ * it to the device, the new configuration will be lost.</div><div class='add'>+ *</div><div class='add'>+ * @return: 0 on Success and negative value otherwise.</div><div class='add'>+ */</div><div class='add'>+int ena_com_get_hash_key(struct ena_com_dev *ena_dev, u8 *key);</div><div class='add'>+/* ena_com_fill_hash_ctrl - Fill RSS hash control</div><div class='add'>+ * @ena_dev: ENA communication layer struct.</div><div class='add'>+ * @proto: The protocol to configure.</div><div class='add'>+ * @hash_fields: bit mask of ena_admin_flow_hash_fields</div><div class='add'>+ *</div><div class='add'>+ * Fill the ena_dev resources with the desire hash control (the ethernet</div><div class='add'>+ * fields that take part of the hash) for a specific protocol.</div><div class='add'>+ * To flush the hash control to the device, the caller should call</div><div class='add'>+ * ena_com_set_hash_ctrl.</div><div class='add'>+ *</div><div class='add'>+ * @return: 0 on Success and negative value otherwise.</div><div class='add'>+ */</div><div class='add'>+int ena_com_fill_hash_ctrl(struct ena_com_dev *ena_dev,</div><div class='add'>+			   enum ena_admin_flow_hash_proto proto,</div><div class='add'>+			   u16 hash_fields);</div><div class='add'>+</div><div class='add'>+/* ena_com_set_hash_ctrl - Flush the hash control resources to the device.</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ *</div><div class='add'>+ * Flush the hash control (the ethernet fields that take part of the hash)</div><div class='add'>+ *</div><div class='add'>+ * @note: Prior to this method the caller should call ena_com_fill_hash_ctrl.</div><div class='add'>+ *</div><div class='add'>+ * @return: 0 on Success and negative value otherwise.</div><div class='add'>+ */</div><div class='add'>+int ena_com_set_hash_ctrl(struct ena_com_dev *ena_dev);</div><div class='add'>+</div><div class='add'>+/* ena_com_get_hash_ctrl - Retrieve the hash control from the device.</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ * @proto: The protocol to retrieve.</div><div class='add'>+ * @fields: bit mask of ena_admin_flow_hash_fields.</div><div class='add'>+ *</div><div class='add'>+ * Retrieve the hash control from the device.</div><div class='add'>+ *</div><div class='add'>+ * @note: If the caller called ena_com_fill_hash_ctrl but didn't flush</div><div class='add'>+ * it to the device, the new configuration will be lost.</div><div class='add'>+ *</div><div class='add'>+ * @return: 0 on Success and negative value otherwise.</div><div class='add'>+ */</div><div class='add'>+int ena_com_get_hash_ctrl(struct ena_com_dev *ena_dev,</div><div class='add'>+			  enum ena_admin_flow_hash_proto proto,</div><div class='add'>+			  u16 *fields);</div><div class='add'>+</div><div class='add'>+/* ena_com_set_default_hash_ctrl - Set the hash control to a default</div><div class='add'>+ * configuration.</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ *</div><div class='add'>+ * Fill the ena_dev resources with the default hash control configuration.</div><div class='add'>+ * To flush the hash control to the device, the caller should call</div><div class='add'>+ * ena_com_set_hash_ctrl.</div><div class='add'>+ *</div><div class='add'>+ * @return: 0 on Success and negative value otherwise.</div><div class='add'>+ */</div><div class='add'>+int ena_com_set_default_hash_ctrl(struct ena_com_dev *ena_dev);</div><div class='add'>+</div><div class='add'>+/* ena_com_indirect_table_fill_entry - Fill a single entry in the RSS</div><div class='add'>+ * indirection table</div><div class='add'>+ * @ena_dev: ENA communication layer struct.</div><div class='add'>+ * @entry_idx - indirection table entry.</div><div class='add'>+ * @entry_value - redirection value</div><div class='add'>+ *</div><div class='add'>+ * Fill a single entry of the RSS indirection table in the ena_dev resources.</div><div class='add'>+ * To flush the indirection table to the device, the called should call</div><div class='add'>+ * ena_com_indirect_table_set.</div><div class='add'>+ *</div><div class='add'>+ * @return: 0 on Success and negative value otherwise.</div><div class='add'>+ */</div><div class='add'>+int ena_com_indirect_table_fill_entry(struct ena_com_dev *ena_dev,</div><div class='add'>+				      u16 entry_idx, u16 entry_value);</div><div class='add'>+</div><div class='add'>+/* ena_com_indirect_table_set - Flush the indirection table to the device.</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ *</div><div class='add'>+ * Flush the indirection hash control to the device.</div><div class='add'>+ * Prior to this method the caller should call ena_com_indirect_table_fill_entry</div><div class='add'>+ *</div><div class='add'>+ * @return: 0 on Success and negative value otherwise.</div><div class='add'>+ */</div><div class='add'>+int ena_com_indirect_table_set(struct ena_com_dev *ena_dev);</div><div class='add'>+</div><div class='add'>+/* ena_com_indirect_table_get - Retrieve the indirection table from the device.</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ * @ind_tbl: indirection table</div><div class='add'>+ *</div><div class='add'>+ * Retrieve the RSS indirection table from the device.</div><div class='add'>+ *</div><div class='add'>+ * @note: If the caller called ena_com_indirect_table_fill_entry but didn't flush</div><div class='add'>+ * it to the device, the new configuration will be lost.</div><div class='add'>+ *</div><div class='add'>+ * @return: 0 on Success and negative value otherwise.</div><div class='add'>+ */</div><div class='add'>+int ena_com_indirect_table_get(struct ena_com_dev *ena_dev, u32 *ind_tbl);</div><div class='add'>+</div><div class='add'>+/* ena_com_allocate_host_info - Allocate host info resources.</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ *</div><div class='add'>+ * @return: 0 on Success and negative value otherwise.</div><div class='add'>+ */</div><div class='add'>+int ena_com_allocate_host_info(struct ena_com_dev *ena_dev);</div><div class='add'>+</div><div class='add'>+/* ena_com_allocate_debug_area - Allocate debug area.</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ * @debug_area_size - debug area size.</div><div class='add'>+ *</div><div class='add'>+ * @return: 0 on Success and negative value otherwise.</div><div class='add'>+ */</div><div class='add'>+int ena_com_allocate_debug_area(struct ena_com_dev *ena_dev,</div><div class='add'>+				u32 debug_area_size);</div><div class='add'>+</div><div class='add'>+/* ena_com_allocate_customer_metrics_buffer - Allocate customer metrics resources.</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ *</div><div class='add'>+ * @return: 0 on Success and negative value otherwise.</div><div class='add'>+ */</div><div class='add'>+int ena_com_allocate_customer_metrics_buffer(struct ena_com_dev *ena_dev);</div><div class='add'>+</div><div class='add'>+/* ena_com_delete_debug_area - Free the debug area resources.</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ *</div><div class='add'>+ * Free the allocated debug area.</div><div class='add'>+ */</div><div class='add'>+void ena_com_delete_debug_area(struct ena_com_dev *ena_dev);</div><div class='add'>+</div><div class='add'>+/* ena_com_delete_host_info - Free the host info resources.</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ *</div><div class='add'>+ * Free the allocated host info.</div><div class='add'>+ */</div><div class='add'>+void ena_com_delete_host_info(struct ena_com_dev *ena_dev);</div><div class='add'>+</div><div class='add'>+/* ena_com_delete_customer_metrics_buffer - Free the customer metrics resources.</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ *</div><div class='add'>+ * Free the allocated customer metrics area.</div><div class='add'>+ */</div><div class='add'>+void ena_com_delete_customer_metrics_buffer(struct ena_com_dev *ena_dev);</div><div class='add'>+</div><div class='add'>+/* ena_com_set_host_attributes - Update the device with the host</div><div class='add'>+ * attributes (debug area and host info) base address.</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ *</div><div class='add'>+ * @return: 0 on Success and negative value otherwise.</div><div class='add'>+ */</div><div class='add'>+int ena_com_set_host_attributes(struct ena_com_dev *ena_dev);</div><div class='add'>+</div><div class='add'>+/* ena_com_create_io_cq - Create io completion queue.</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ * @io_cq - io completion queue handler</div><div class='add'>+</div><div class='add'>+ * Create IO completion queue.</div><div class='add'>+ *</div><div class='add'>+ * @return - 0 on success, negative value on failure.</div><div class='add'>+ */</div><div class='add'>+int ena_com_create_io_cq(struct ena_com_dev *ena_dev,</div><div class='add'>+			 struct ena_com_io_cq *io_cq);</div><div class='add'>+</div><div class='add'>+/* ena_com_destroy_io_cq - Destroy io completion queue.</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ * @io_cq - io completion queue handler</div><div class='add'>+</div><div class='add'>+ * Destroy IO completion queue.</div><div class='add'>+ *</div><div class='add'>+ * @return - 0 on success, negative value on failure.</div><div class='add'>+ */</div><div class='add'>+int ena_com_destroy_io_cq(struct ena_com_dev *ena_dev,</div><div class='add'>+			  struct ena_com_io_cq *io_cq);</div><div class='add'>+</div><div class='add'>+/* ena_com_execute_admin_command - Execute admin command</div><div class='add'>+ * @admin_queue: admin queue.</div><div class='add'>+ * @cmd: the admin command to execute.</div><div class='add'>+ * @cmd_size: the command size.</div><div class='add'>+ * @cmd_completion: command completion return value.</div><div class='add'>+ * @cmd_comp_size: command completion size.</div><div class='add'>+</div><div class='add'>+ * Submit an admin command and then wait until the device returns a</div><div class='add'>+ * completion.</div><div class='add'>+ * The completion will be copied into cmd_comp.</div><div class='add'>+ *</div><div class='add'>+ * @return - 0 on success, negative value on failure.</div><div class='add'>+ */</div><div class='add'>+int ena_com_execute_admin_command(struct ena_com_admin_queue *admin_queue,</div><div class='add'>+				  struct ena_admin_aq_entry *cmd,</div><div class='add'>+				  size_t cmd_size,</div><div class='add'>+				  struct ena_admin_acq_entry *cmd_comp,</div><div class='add'>+				  size_t cmd_comp_size);</div><div class='add'>+</div><div class='add'>+/* ena_com_init_interrupt_moderation - Init interrupt moderation</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ *</div><div class='add'>+ * @return - 0 on success, negative value on failure.</div><div class='add'>+ */</div><div class='add'>+int ena_com_init_interrupt_moderation(struct ena_com_dev *ena_dev);</div><div class='add'>+</div><div class='add'>+/* ena_com_interrupt_moderation_supported - Return if interrupt moderation</div><div class='add'>+ * capability is supported by the device.</div><div class='add'>+ *</div><div class='add'>+ * @return - supported or not.</div><div class='add'>+ */</div><div class='add'>+bool ena_com_interrupt_moderation_supported(struct ena_com_dev *ena_dev);</div><div class='add'>+</div><div class='add'>+/* ena_com_update_nonadaptive_moderation_interval_tx - Update the</div><div class='add'>+ * non-adaptive interval in Tx direction.</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ * @tx_coalesce_usecs: Interval in usec.</div><div class='add'>+ *</div><div class='add'>+ * @return - 0 on success, negative value on failure.</div><div class='add'>+ */</div><div class='add'>+int ena_com_update_nonadaptive_moderation_interval_tx(struct ena_com_dev *ena_dev,</div><div class='add'>+						      u32 tx_coalesce_usecs);</div><div class='add'>+</div><div class='add'>+/* ena_com_update_nonadaptive_moderation_interval_rx - Update the</div><div class='add'>+ * non-adaptive interval in Rx direction.</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ * @rx_coalesce_usecs: Interval in usec.</div><div class='add'>+ *</div><div class='add'>+ * @return - 0 on success, negative value on failure.</div><div class='add'>+ */</div><div class='add'>+int ena_com_update_nonadaptive_moderation_interval_rx(struct ena_com_dev *ena_dev,</div><div class='add'>+						      u32 rx_coalesce_usecs);</div><div class='add'>+</div><div class='add'>+/* ena_com_get_nonadaptive_moderation_interval_tx - Retrieve the</div><div class='add'>+ * non-adaptive interval in Tx direction.</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ *</div><div class='add'>+ * @return - interval in usec</div><div class='add'>+ */</div><div class='add'>+unsigned int ena_com_get_nonadaptive_moderation_interval_tx(struct ena_com_dev *ena_dev);</div><div class='add'>+</div><div class='add'>+/* ena_com_get_nonadaptive_moderation_interval_rx - Retrieve the</div><div class='add'>+ * non-adaptive interval in Rx direction.</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ *</div><div class='add'>+ * @return - interval in usec</div><div class='add'>+ */</div><div class='add'>+unsigned int ena_com_get_nonadaptive_moderation_interval_rx(struct ena_com_dev *ena_dev);</div><div class='add'>+</div><div class='add'>+/* ena_com_config_dev_mode - Configure the placement policy of the device.</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ * @llq_features: LLQ feature descriptor, retrieve via</div><div class='add'>+ *		   ena_com_get_dev_attr_feat.</div><div class='add'>+ * @ena_llq_config: The default driver LLQ parameters configurations</div><div class='add'>+ */</div><div class='add'>+int ena_com_config_dev_mode(struct ena_com_dev *ena_dev,</div><div class='add'>+			    struct ena_admin_feature_llq_desc *llq_features,</div><div class='add'>+			    struct ena_llq_configurations *llq_default_config);</div><div class='add'>+</div><div class='add'>+/* ena_com_io_sq_to_ena_dev - Extract ena_com_dev using contained field io_sq.</div><div class='add'>+ * @io_sq: IO submit queue struct</div><div class='add'>+ *</div><div class='add'>+ * @return - ena_com_dev struct extracted from io_sq</div><div class='add'>+ */</div><div class='add'>+static inline struct ena_com_dev *ena_com_io_sq_to_ena_dev(struct ena_com_io_sq *io_sq)</div><div class='add'>+{</div><div class='add'>+	return container_of(io_sq, struct ena_com_dev, io_sq_queues[io_sq-&gt;qid]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ena_com_io_cq_to_ena_dev - Extract ena_com_dev using contained field io_cq.</div><div class='add'>+ * @io_sq: IO submit queue struct</div><div class='add'>+ *</div><div class='add'>+ * @return - ena_com_dev struct extracted from io_sq</div><div class='add'>+ */</div><div class='add'>+static inline struct ena_com_dev *ena_com_io_cq_to_ena_dev(struct ena_com_io_cq *io_cq)</div><div class='add'>+{</div><div class='add'>+	return container_of(io_cq, struct ena_com_dev, io_cq_queues[io_cq-&gt;qid]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool ena_com_get_adaptive_moderation_enabled(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	return ena_dev-&gt;adaptive_coalescing;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ena_com_enable_adaptive_moderation(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	ena_dev-&gt;adaptive_coalescing = true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ena_com_disable_adaptive_moderation(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	ena_dev-&gt;adaptive_coalescing = false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ena_com_get_cap - query whether device supports a capability.</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ * @cap_id: enum value representing the capability</div><div class='add'>+ *</div><div class='add'>+ * @return - true if capability is supported or false otherwise</div><div class='add'>+ */</div><div class='add'>+static inline bool ena_com_get_cap(struct ena_com_dev *ena_dev,</div><div class='add'>+				   enum ena_admin_aq_caps_id cap_id)</div><div class='add'>+{</div><div class='add'>+	return !!(ena_dev-&gt;capabilities &amp; BIT(cap_id));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ena_com_get_customer_metric_support - query whether device supports a given customer metric.</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ * @metric_id: enum value representing the customer metric</div><div class='add'>+ *</div><div class='add'>+ * @return - true if customer metric is supported or false otherwise</div><div class='add'>+ */</div><div class='add'>+static inline bool ena_com_get_customer_metric_support(struct ena_com_dev *ena_dev,</div><div class='add'>+						       enum ena_admin_customer_metrics_id metric_id)</div><div class='add'>+{</div><div class='add'>+	return !!(ena_dev-&gt;customer_metrics.supported_metrics &amp; BIT(metric_id));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ena_com_get_customer_metric_count - return the number of supported customer metrics.</div><div class='add'>+ * @ena_dev: ENA communication layer struct</div><div class='add'>+ *</div><div class='add'>+ * @return - the number of supported customer metrics</div><div class='add'>+ */</div><div class='add'>+static inline int ena_com_get_customer_metric_count(struct ena_com_dev *ena_dev)</div><div class='add'>+{</div><div class='add'>+	return hweight64(ena_dev-&gt;customer_metrics.supported_metrics);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ena_com_update_intr_reg - Prepare interrupt register</div><div class='add'>+ * @intr_reg: interrupt register to update.</div><div class='add'>+ * @rx_delay_interval: Rx interval in usecs</div><div class='add'>+ * @tx_delay_interval: Tx interval in usecs</div><div class='add'>+ * @unmask: unmask enable/disable</div><div class='add'>+ *</div><div class='add'>+ * Prepare interrupt update register with the supplied parameters.</div><div class='add'>+ */</div><div class='add'>+static inline void ena_com_update_intr_reg(struct ena_eth_io_intr_reg *intr_reg,</div><div class='add'>+					   u32 rx_delay_interval,</div><div class='add'>+					   u32 tx_delay_interval,</div><div class='add'>+					   bool unmask)</div><div class='add'>+{</div><div class='add'>+	intr_reg-&gt;intr_control = 0;</div><div class='add'>+	intr_reg-&gt;intr_control |= rx_delay_interval &amp;</div><div class='add'>+		ENA_ETH_IO_INTR_REG_RX_INTR_DELAY_MASK;</div><div class='add'>+</div><div class='add'>+	intr_reg-&gt;intr_control |=</div><div class='add'>+		(tx_delay_interval &lt;&lt; ENA_ETH_IO_INTR_REG_TX_INTR_DELAY_SHIFT)</div><div class='add'>+		&amp; ENA_ETH_IO_INTR_REG_TX_INTR_DELAY_MASK;</div><div class='add'>+</div><div class='add'>+	if (unmask)</div><div class='add'>+		intr_reg-&gt;intr_control |= ENA_ETH_IO_INTR_REG_INTR_UNMASK_MASK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u8 *ena_com_get_next_bounce_buffer(struct ena_com_io_bounce_buffer_control *bounce_buf_ctrl)</div><div class='add'>+{</div><div class='add'>+	u16 size, buffers_num;</div><div class='add'>+	u8 *buf;</div><div class='add'>+</div><div class='add'>+	size = bounce_buf_ctrl-&gt;buffer_size;</div><div class='add'>+	buffers_num = bounce_buf_ctrl-&gt;buffers_num;</div><div class='add'>+</div><div class='add'>+	buf = bounce_buf_ctrl-&gt;base_buffer +</div><div class='add'>+		(bounce_buf_ctrl-&gt;next_to_use++ &amp; (buffers_num - 1)) * size;</div><div class='add'>+</div><div class='add'>+	prefetchw(bounce_buf_ctrl-&gt;base_buffer +</div><div class='add'>+		(bounce_buf_ctrl-&gt;next_to_use &amp; (buffers_num - 1)) * size);</div><div class='add'>+</div><div class='add'>+	return buf;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* !(ENA_COM) */</div><div class='head'>diff --git a/drivers/net/ethernet/amazon/ena/ena_common_defs.h b/drivers/net/ethernet/amazon/ena/ena_common_defs.h<br/>new file mode 100644<br/>index 000000000000..e210c8a81fc0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_common_defs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amazon/ena/ena_common_defs.h</a></div><div class='hunk'>@@ -0,0 +1,21 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015-2020 Amazon.com, Inc. or its affiliates. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+#ifndef _ENA_COMMON_H_</div><div class='add'>+#define _ENA_COMMON_H_</div><div class='add'>+</div><div class='add'>+#define ENA_COMMON_SPEC_VERSION_MAJOR        2</div><div class='add'>+#define ENA_COMMON_SPEC_VERSION_MINOR        0</div><div class='add'>+</div><div class='add'>+/* ENA operates with 48-bit memory addresses. ena_mem_addr_t */</div><div class='add'>+struct ena_common_mem_addr {</div><div class='add'>+	u32 mem_addr_low;</div><div class='add'>+</div><div class='add'>+	u16 mem_addr_high;</div><div class='add'>+</div><div class='add'>+	/* MBZ */</div><div class='add'>+	u16 reserved16;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif /* _ENA_COMMON_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/amazon/ena/ena_debugfs.c b/drivers/net/ethernet/amazon/ena/ena_debugfs.c<br/>new file mode 100644<br/>index 000000000000..46ed80986724<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_debugfs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amazon/ena/ena_debugfs.c</a></div><div class='hunk'>@@ -0,0 +1,62 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='add'>+/* Copyright (c) Amazon.com, Inc. or its affiliates.</div><div class='add'>+ * All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_DEBUG_FS</div><div class='add'>+</div><div class='add'>+#include &lt;linux/seq_file.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include "ena_debugfs.h"</div><div class='add'>+#include "ena_phc.h"</div><div class='add'>+</div><div class='add'>+static int phc_stats_show(struct seq_file *file, void *priv)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = file-&gt;private;</div><div class='add'>+</div><div class='add'>+	if (!ena_phc_is_active(adapter))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	seq_printf(file,</div><div class='add'>+		   "phc_cnt: %llu\n",</div><div class='add'>+		   adapter-&gt;ena_dev-&gt;phc.stats.phc_cnt);</div><div class='add'>+	seq_printf(file,</div><div class='add'>+		   "phc_exp: %llu\n",</div><div class='add'>+		   adapter-&gt;ena_dev-&gt;phc.stats.phc_exp);</div><div class='add'>+	seq_printf(file,</div><div class='add'>+		   "phc_skp: %llu\n",</div><div class='add'>+		   adapter-&gt;ena_dev-&gt;phc.stats.phc_skp);</div><div class='add'>+	seq_printf(file,</div><div class='add'>+		   "phc_err_dv: %llu\n",</div><div class='add'>+		   adapter-&gt;ena_dev-&gt;phc.stats.phc_err_dv);</div><div class='add'>+	seq_printf(file,</div><div class='add'>+		   "phc_err_ts: %llu\n",</div><div class='add'>+		   adapter-&gt;ena_dev-&gt;phc.stats.phc_err_ts);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+DEFINE_SHOW_ATTRIBUTE(phc_stats);</div><div class='add'>+</div><div class='add'>+void ena_debugfs_init(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	adapter-&gt;debugfs_base =</div><div class='add'>+		debugfs_create_dir(dev_name(&amp;adapter-&gt;pdev-&gt;dev), NULL);</div><div class='add'>+</div><div class='add'>+	debugfs_create_file("phc_stats",</div><div class='add'>+			    0400,</div><div class='add'>+			    adapter-&gt;debugfs_base,</div><div class='add'>+			    adapter,</div><div class='add'>+			    &amp;phc_stats_fops);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_debugfs_terminate(struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = netdev_priv(dev);</div><div class='add'>+</div><div class='add'>+	debugfs_remove_recursive(adapter-&gt;debugfs_base);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_DEBUG_FS */</div><div class='head'>diff --git a/drivers/net/ethernet/amazon/ena/ena_debugfs.h b/drivers/net/ethernet/amazon/ena/ena_debugfs.h<br/>new file mode 100644<br/>index 000000000000..dc61dd998867<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_debugfs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amazon/ena/ena_debugfs.h</a></div><div class='hunk'>@@ -0,0 +1,27 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='add'>+/* Copyright (c) Amazon.com, Inc. or its affiliates.</div><div class='add'>+ * All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __ENA_DEBUGFS_H__</div><div class='add'>+#define __ENA_DEBUGFS_H__</div><div class='add'>+</div><div class='add'>+#include &lt;linux/debugfs.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include "ena_netdev.h"</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_DEBUG_FS</div><div class='add'>+</div><div class='add'>+void ena_debugfs_init(struct net_device *dev);</div><div class='add'>+</div><div class='add'>+void ena_debugfs_terminate(struct net_device *dev);</div><div class='add'>+</div><div class='add'>+#else /* CONFIG_DEBUG_FS */</div><div class='add'>+</div><div class='add'>+static inline void ena_debugfs_init(struct net_device *dev) {}</div><div class='add'>+</div><div class='add'>+static inline void ena_debugfs_terminate(struct net_device *dev) {}</div><div class='add'>+</div><div class='add'>+#endif /* CONFIG_DEBUG_FS */</div><div class='add'>+</div><div class='add'>+#endif /* __ENA_DEBUGFS_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/amazon/ena/ena_devlink.c b/drivers/net/ethernet/amazon/ena/ena_devlink.c<br/>new file mode 100644<br/>index 000000000000..ac81c24016dd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_devlink.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amazon/ena/ena_devlink.c</a></div><div class='hunk'>@@ -0,0 +1,210 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='add'>+/* Copyright (c) Amazon.com, Inc. or its affiliates.</div><div class='add'>+ * All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "linux/pci.h"</div><div class='add'>+#include "ena_devlink.h"</div><div class='add'>+#include "ena_phc.h"</div><div class='add'>+</div><div class='add'>+static int ena_devlink_enable_phc_validate(struct devlink *devlink, u32 id,</div><div class='add'>+					   union devlink_param_value val,</div><div class='add'>+					   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = ENA_DEVLINK_PRIV(devlink);</div><div class='add'>+</div><div class='add'>+	if (!val.vbool)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (!ena_com_phc_supported(adapter-&gt;ena_dev)) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Device doesn't support PHC");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct devlink_param ena_devlink_params[] = {</div><div class='add'>+	DEVLINK_PARAM_GENERIC(ENABLE_PHC,</div><div class='add'>+			      BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),</div><div class='add'>+			      NULL,</div><div class='add'>+			      NULL,</div><div class='add'>+			      ena_devlink_enable_phc_validate),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void ena_devlink_params_get(struct devlink *devlink)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = ENA_DEVLINK_PRIV(devlink);</div><div class='add'>+	union devlink_param_value val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = devl_param_driverinit_value_get(devlink,</div><div class='add'>+					      DEVLINK_PARAM_GENERIC_ID_ENABLE_PHC,</div><div class='add'>+					      &amp;val);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(adapter-&gt;netdev, "Failed to query PHC param\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ena_phc_enable(adapter, val.vbool);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_devlink_disable_phc_param(struct devlink *devlink)</div><div class='add'>+{</div><div class='add'>+	union devlink_param_value value;</div><div class='add'>+</div><div class='add'>+	value.vbool = false;</div><div class='add'>+	devl_param_driverinit_value_set(devlink,</div><div class='add'>+					DEVLINK_PARAM_GENERIC_ID_ENABLE_PHC,</div><div class='add'>+					value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_devlink_port_register(struct devlink *devlink)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = ENA_DEVLINK_PRIV(devlink);</div><div class='add'>+	struct devlink_port_attrs attrs = {};</div><div class='add'>+</div><div class='add'>+	attrs.flavour = DEVLINK_PORT_FLAVOUR_PHYSICAL;</div><div class='add'>+	devlink_port_attrs_set(&amp;adapter-&gt;devlink_port, &amp;attrs);</div><div class='add'>+	devl_port_register(devlink, &amp;adapter-&gt;devlink_port, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_devlink_port_unregister(struct devlink *devlink)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = ENA_DEVLINK_PRIV(devlink);</div><div class='add'>+</div><div class='add'>+	devl_port_unregister(&amp;adapter-&gt;devlink_port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_devlink_reload_down(struct devlink *devlink,</div><div class='add'>+				   bool netns_change,</div><div class='add'>+				   enum devlink_reload_action action,</div><div class='add'>+				   enum devlink_reload_limit limit,</div><div class='add'>+				   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = ENA_DEVLINK_PRIV(devlink);</div><div class='add'>+</div><div class='add'>+	if (netns_change) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+				   "Namespace change is not supported");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ena_devlink_port_unregister(devlink);</div><div class='add'>+</div><div class='add'>+	rtnl_lock();</div><div class='add'>+	ena_destroy_device(adapter, false);</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_devlink_reload_up(struct devlink *devlink,</div><div class='add'>+				 enum devlink_reload_action action,</div><div class='add'>+				 enum devlink_reload_limit limit,</div><div class='add'>+				 u32 *actions_performed,</div><div class='add'>+				 struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = ENA_DEVLINK_PRIV(devlink);</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	rtnl_lock();</div><div class='add'>+	/* Check that no other routine initialized the device (e.g.</div><div class='add'>+	 * ena_fw_reset_device()). Also we're under devlink_mutex here,</div><div class='add'>+	 * so devlink isn't freed under our feet.</div><div class='add'>+	 */</div><div class='add'>+	if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &amp;adapter-&gt;flags))</div><div class='add'>+		err = ena_restore_device(adapter);</div><div class='add'>+</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+</div><div class='add'>+	ena_devlink_port_register(devlink);</div><div class='add'>+</div><div class='add'>+	if (!err)</div><div class='add'>+		*actions_performed = BIT(DEVLINK_RELOAD_ACTION_DRIVER_REINIT);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct devlink_ops ena_devlink_ops = {</div><div class='add'>+	.reload_actions = BIT(DEVLINK_RELOAD_ACTION_DRIVER_REINIT),</div><div class='add'>+	.reload_down	= ena_devlink_reload_down,</div><div class='add'>+	.reload_up	= ena_devlink_reload_up,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int ena_devlink_configure_params(struct devlink *devlink)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = ENA_DEVLINK_PRIV(devlink);</div><div class='add'>+	union devlink_param_value value;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = devlink_params_register(devlink, ena_devlink_params,</div><div class='add'>+				     ARRAY_SIZE(ena_devlink_params));</div><div class='add'>+	if (rc) {</div><div class='add'>+		netdev_err(adapter-&gt;netdev, "Failed to register devlink params\n");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	value.vbool = ena_phc_is_enabled(adapter);</div><div class='add'>+	devl_param_driverinit_value_set(devlink,</div><div class='add'>+					DEVLINK_PARAM_GENERIC_ID_ENABLE_PHC,</div><div class='add'>+					value);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct devlink *ena_devlink_alloc(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;adapter-&gt;pdev-&gt;dev;</div><div class='add'>+	struct devlink *devlink;</div><div class='add'>+</div><div class='add'>+	devlink = devlink_alloc(&amp;ena_devlink_ops,</div><div class='add'>+				sizeof(struct ena_adapter *),</div><div class='add'>+				dev);</div><div class='add'>+	if (!devlink) {</div><div class='add'>+		netdev_err(adapter-&gt;netdev,</div><div class='add'>+			   "Failed to allocate devlink struct\n");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ENA_DEVLINK_PRIV(devlink) = adapter;</div><div class='add'>+	adapter-&gt;devlink = devlink;</div><div class='add'>+</div><div class='add'>+	if (ena_devlink_configure_params(devlink))</div><div class='add'>+		goto free_devlink;</div><div class='add'>+</div><div class='add'>+	return devlink;</div><div class='add'>+</div><div class='add'>+free_devlink:</div><div class='add'>+	devlink_free(devlink);</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_devlink_configure_params_clean(struct devlink *devlink)</div><div class='add'>+{</div><div class='add'>+	devlink_params_unregister(devlink, ena_devlink_params,</div><div class='add'>+				  ARRAY_SIZE(ena_devlink_params));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_devlink_free(struct devlink *devlink)</div><div class='add'>+{</div><div class='add'>+	ena_devlink_configure_params_clean(devlink);</div><div class='add'>+</div><div class='add'>+	devlink_free(devlink);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_devlink_register(struct devlink *devlink, struct device *dev)</div><div class='add'>+{</div><div class='add'>+	devl_lock(devlink);</div><div class='add'>+	ena_devlink_port_register(devlink);</div><div class='add'>+	devl_register(devlink);</div><div class='add'>+	devl_unlock(devlink);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_devlink_unregister(struct devlink *devlink)</div><div class='add'>+{</div><div class='add'>+	devl_lock(devlink);</div><div class='add'>+	ena_devlink_port_unregister(devlink);</div><div class='add'>+	devl_unregister(devlink);</div><div class='add'>+	devl_unlock(devlink);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/amazon/ena/ena_devlink.h b/drivers/net/ethernet/amazon/ena/ena_devlink.h<br/>new file mode 100644<br/>index 000000000000..7a19ce4830d9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_devlink.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amazon/ena/ena_devlink.h</a></div><div class='hunk'>@@ -0,0 +1,21 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='add'>+/* Copyright (c) Amazon.com, Inc. or its affiliates.</div><div class='add'>+ * All rights reserved.</div><div class='add'>+ */</div><div class='add'>+#ifndef DEVLINK_H</div><div class='add'>+#define DEVLINK_H</div><div class='add'>+</div><div class='add'>+#include "ena_netdev.h"</div><div class='add'>+#include &lt;net/devlink.h&gt;</div><div class='add'>+</div><div class='add'>+#define ENA_DEVLINK_PRIV(devlink) \</div><div class='add'>+	(*(struct ena_adapter **)devlink_priv(devlink))</div><div class='add'>+</div><div class='add'>+struct devlink *ena_devlink_alloc(struct ena_adapter *adapter);</div><div class='add'>+void ena_devlink_free(struct devlink *devlink);</div><div class='add'>+void ena_devlink_register(struct devlink *devlink, struct device *dev);</div><div class='add'>+void ena_devlink_unregister(struct devlink *devlink);</div><div class='add'>+void ena_devlink_params_get(struct devlink *devlink);</div><div class='add'>+void ena_devlink_disable_phc_param(struct devlink *devlink);</div><div class='add'>+</div><div class='add'>+#endif /* DEVLINK_H */</div><div class='head'>diff --git a/drivers/net/ethernet/amazon/ena/ena_eth_com.c b/drivers/net/ethernet/amazon/ena/ena_eth_com.c<br/>new file mode 100644<br/>index 000000000000..4c6e07aa4bbb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_eth_com.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amazon/ena/ena_eth_com.c</a></div><div class='hunk'>@@ -0,0 +1,654 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015-2020 Amazon.com, Inc. or its affiliates. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "ena_eth_com.h"</div><div class='add'>+</div><div class='add'>+static struct ena_eth_io_rx_cdesc_base *ena_com_get_next_rx_cdesc(</div><div class='add'>+	struct ena_com_io_cq *io_cq)</div><div class='add'>+{</div><div class='add'>+	struct ena_eth_io_rx_cdesc_base *cdesc;</div><div class='add'>+	u16 expected_phase, head_masked;</div><div class='add'>+	u16 desc_phase;</div><div class='add'>+</div><div class='add'>+	head_masked = io_cq-&gt;head &amp; (io_cq-&gt;q_depth - 1);</div><div class='add'>+	expected_phase = io_cq-&gt;phase;</div><div class='add'>+</div><div class='add'>+	cdesc = (struct ena_eth_io_rx_cdesc_base *)(io_cq-&gt;cdesc_addr.virt_addr</div><div class='add'>+			+ (head_masked * io_cq-&gt;cdesc_entry_size_in_bytes));</div><div class='add'>+</div><div class='add'>+	desc_phase = (READ_ONCE(cdesc-&gt;status) &amp; ENA_ETH_IO_RX_CDESC_BASE_PHASE_MASK) &gt;&gt;</div><div class='add'>+		     ENA_ETH_IO_RX_CDESC_BASE_PHASE_SHIFT;</div><div class='add'>+</div><div class='add'>+	if (desc_phase != expected_phase)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	/* Make sure we read the rest of the descriptor after the phase bit</div><div class='add'>+	 * has been read</div><div class='add'>+	 */</div><div class='add'>+	dma_rmb();</div><div class='add'>+</div><div class='add'>+	return cdesc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void *get_sq_desc_regular_queue(struct ena_com_io_sq *io_sq)</div><div class='add'>+{</div><div class='add'>+	u16 tail_masked;</div><div class='add'>+	u32 offset;</div><div class='add'>+</div><div class='add'>+	tail_masked = io_sq-&gt;tail &amp; (io_sq-&gt;q_depth - 1);</div><div class='add'>+</div><div class='add'>+	offset = tail_masked * io_sq-&gt;desc_entry_size;</div><div class='add'>+</div><div class='add'>+	return (void *)((uintptr_t)io_sq-&gt;desc_addr.virt_addr + offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_com_write_bounce_buffer_to_dev(struct ena_com_io_sq *io_sq,</div><div class='add'>+						     u8 *bounce_buffer)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_llq_info *llq_info = &amp;io_sq-&gt;llq_info;</div><div class='add'>+</div><div class='add'>+	u16 dst_tail_mask;</div><div class='add'>+	u32 dst_offset;</div><div class='add'>+</div><div class='add'>+	dst_tail_mask = io_sq-&gt;tail &amp; (io_sq-&gt;q_depth - 1);</div><div class='add'>+	dst_offset = dst_tail_mask * llq_info-&gt;desc_list_entry_size;</div><div class='add'>+</div><div class='add'>+	if (is_llq_max_tx_burst_exists(io_sq)) {</div><div class='add'>+		if (unlikely(!io_sq-&gt;entries_in_tx_burst_left)) {</div><div class='add'>+			netdev_err(ena_com_io_sq_to_ena_dev(io_sq)-&gt;net_device,</div><div class='add'>+				   "Error: trying to send more packets than tx burst allows\n");</div><div class='add'>+			return -ENOSPC;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		io_sq-&gt;entries_in_tx_burst_left--;</div><div class='add'>+		netdev_dbg(ena_com_io_sq_to_ena_dev(io_sq)-&gt;net_device,</div><div class='add'>+			   "Decreasing entries_in_tx_burst_left of queue %d to %d\n", io_sq-&gt;qid,</div><div class='add'>+			   io_sq-&gt;entries_in_tx_burst_left);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Make sure everything was written into the bounce buffer before</div><div class='add'>+	 * writing the bounce buffer to the device</div><div class='add'>+	 */</div><div class='add'>+	wmb();</div><div class='add'>+</div><div class='add'>+	/* The line is completed. Copy it to dev */</div><div class='add'>+	__iowrite64_copy(io_sq-&gt;desc_addr.pbuf_dev_addr + dst_offset, bounce_buffer,</div><div class='add'>+			 (llq_info-&gt;desc_list_entry_size) / 8);</div><div class='add'>+</div><div class='add'>+	io_sq-&gt;tail++;</div><div class='add'>+</div><div class='add'>+	/* Switch phase bit in case of wrap around */</div><div class='add'>+	if (unlikely((io_sq-&gt;tail &amp; (io_sq-&gt;q_depth - 1)) == 0))</div><div class='add'>+		io_sq-&gt;phase ^= 1;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_com_write_header_to_bounce(struct ena_com_io_sq *io_sq,</div><div class='add'>+						 u8 *header_src,</div><div class='add'>+						 u16 header_len)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_llq_pkt_ctrl *pkt_ctrl = &amp;io_sq-&gt;llq_buf_ctrl;</div><div class='add'>+	struct ena_com_llq_info *llq_info = &amp;io_sq-&gt;llq_info;</div><div class='add'>+	u8 *bounce_buffer = pkt_ctrl-&gt;curr_bounce_buf;</div><div class='add'>+	u16 header_offset;</div><div class='add'>+</div><div class='add'>+	if (unlikely(io_sq-&gt;mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_HOST))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	header_offset =</div><div class='add'>+		llq_info-&gt;descs_num_before_header * io_sq-&gt;desc_entry_size;</div><div class='add'>+</div><div class='add'>+	if (unlikely((header_offset + header_len) &gt; llq_info-&gt;desc_list_entry_size)) {</div><div class='add'>+		netdev_err(ena_com_io_sq_to_ena_dev(io_sq)-&gt;net_device,</div><div class='add'>+			   "Trying to write header larger than llq entry can accommodate\n");</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (unlikely(!bounce_buffer)) {</div><div class='add'>+		netdev_err(ena_com_io_sq_to_ena_dev(io_sq)-&gt;net_device, "Bounce buffer is NULL\n");</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(bounce_buffer + header_offset, header_src, header_len);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void *get_sq_desc_llq(struct ena_com_io_sq *io_sq)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_llq_pkt_ctrl *pkt_ctrl = &amp;io_sq-&gt;llq_buf_ctrl;</div><div class='add'>+	u8 *bounce_buffer;</div><div class='add'>+	void *sq_desc;</div><div class='add'>+</div><div class='add'>+	bounce_buffer = pkt_ctrl-&gt;curr_bounce_buf;</div><div class='add'>+</div><div class='add'>+	if (unlikely(!bounce_buffer)) {</div><div class='add'>+		netdev_err(ena_com_io_sq_to_ena_dev(io_sq)-&gt;net_device, "Bounce buffer is NULL\n");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sq_desc = bounce_buffer + pkt_ctrl-&gt;idx * io_sq-&gt;desc_entry_size;</div><div class='add'>+	pkt_ctrl-&gt;idx++;</div><div class='add'>+	pkt_ctrl-&gt;descs_left_in_line--;</div><div class='add'>+</div><div class='add'>+	return sq_desc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_com_close_bounce_buffer(struct ena_com_io_sq *io_sq)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_llq_pkt_ctrl *pkt_ctrl = &amp;io_sq-&gt;llq_buf_ctrl;</div><div class='add'>+	struct ena_com_llq_info *llq_info = &amp;io_sq-&gt;llq_info;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (unlikely(io_sq-&gt;mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_HOST))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* bounce buffer was used, so write it and get a new one */</div><div class='add'>+	if (likely(pkt_ctrl-&gt;idx)) {</div><div class='add'>+		rc = ena_com_write_bounce_buffer_to_dev(io_sq,</div><div class='add'>+							pkt_ctrl-&gt;curr_bounce_buf);</div><div class='add'>+		if (unlikely(rc)) {</div><div class='add'>+			netdev_err(ena_com_io_sq_to_ena_dev(io_sq)-&gt;net_device,</div><div class='add'>+				   "Failed to write bounce buffer to device\n");</div><div class='add'>+			return rc;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		pkt_ctrl-&gt;curr_bounce_buf =</div><div class='add'>+			ena_com_get_next_bounce_buffer(&amp;io_sq-&gt;bounce_buf_ctrl);</div><div class='add'>+		memset(io_sq-&gt;llq_buf_ctrl.curr_bounce_buf,</div><div class='add'>+		       0x0, llq_info-&gt;desc_list_entry_size);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pkt_ctrl-&gt;idx = 0;</div><div class='add'>+	pkt_ctrl-&gt;descs_left_in_line = llq_info-&gt;descs_num_before_header;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void *get_sq_desc(struct ena_com_io_sq *io_sq)</div><div class='add'>+{</div><div class='add'>+	if (io_sq-&gt;mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)</div><div class='add'>+		return get_sq_desc_llq(io_sq);</div><div class='add'>+</div><div class='add'>+	return get_sq_desc_regular_queue(io_sq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_com_sq_update_llq_tail(struct ena_com_io_sq *io_sq)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_llq_pkt_ctrl *pkt_ctrl = &amp;io_sq-&gt;llq_buf_ctrl;</div><div class='add'>+	struct ena_com_llq_info *llq_info = &amp;io_sq-&gt;llq_info;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (!pkt_ctrl-&gt;descs_left_in_line) {</div><div class='add'>+		rc = ena_com_write_bounce_buffer_to_dev(io_sq,</div><div class='add'>+							pkt_ctrl-&gt;curr_bounce_buf);</div><div class='add'>+		if (unlikely(rc)) {</div><div class='add'>+			netdev_err(ena_com_io_sq_to_ena_dev(io_sq)-&gt;net_device,</div><div class='add'>+				   "Failed to write bounce buffer to device\n");</div><div class='add'>+			return rc;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		pkt_ctrl-&gt;curr_bounce_buf =</div><div class='add'>+			ena_com_get_next_bounce_buffer(&amp;io_sq-&gt;bounce_buf_ctrl);</div><div class='add'>+		memset(io_sq-&gt;llq_buf_ctrl.curr_bounce_buf,</div><div class='add'>+		       0x0, llq_info-&gt;desc_list_entry_size);</div><div class='add'>+</div><div class='add'>+		pkt_ctrl-&gt;idx = 0;</div><div class='add'>+		if (unlikely(llq_info-&gt;desc_stride_ctrl == ENA_ADMIN_SINGLE_DESC_PER_ENTRY))</div><div class='add'>+			pkt_ctrl-&gt;descs_left_in_line = 1;</div><div class='add'>+		else</div><div class='add'>+			pkt_ctrl-&gt;descs_left_in_line =</div><div class='add'>+			llq_info-&gt;desc_list_entry_size / io_sq-&gt;desc_entry_size;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_com_sq_update_tail(struct ena_com_io_sq *io_sq)</div><div class='add'>+{</div><div class='add'>+	if (io_sq-&gt;mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)</div><div class='add'>+		return ena_com_sq_update_llq_tail(io_sq);</div><div class='add'>+</div><div class='add'>+	io_sq-&gt;tail++;</div><div class='add'>+</div><div class='add'>+	/* Switch phase bit in case of wrap around */</div><div class='add'>+	if (unlikely((io_sq-&gt;tail &amp; (io_sq-&gt;q_depth - 1)) == 0))</div><div class='add'>+		io_sq-&gt;phase ^= 1;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct ena_eth_io_rx_cdesc_base *</div><div class='add'>+	ena_com_rx_cdesc_idx_to_ptr(struct ena_com_io_cq *io_cq, u16 idx)</div><div class='add'>+{</div><div class='add'>+	idx &amp;= (io_cq-&gt;q_depth - 1);</div><div class='add'>+	return (struct ena_eth_io_rx_cdesc_base *)</div><div class='add'>+		((uintptr_t)io_cq-&gt;cdesc_addr.virt_addr +</div><div class='add'>+		idx * io_cq-&gt;cdesc_entry_size_in_bytes);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_com_cdesc_rx_pkt_get(struct ena_com_io_cq *io_cq,</div><div class='add'>+				    u16 *first_cdesc_idx,</div><div class='add'>+				    u16 *num_descs)</div><div class='add'>+{</div><div class='add'>+	u16 count = io_cq-&gt;cur_rx_pkt_cdesc_count, head_masked;</div><div class='add'>+	struct ena_eth_io_rx_cdesc_base *cdesc;</div><div class='add'>+	u32 last = 0;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		u32 status;</div><div class='add'>+</div><div class='add'>+		cdesc = ena_com_get_next_rx_cdesc(io_cq);</div><div class='add'>+		if (!cdesc)</div><div class='add'>+			break;</div><div class='add'>+		status = READ_ONCE(cdesc-&gt;status);</div><div class='add'>+</div><div class='add'>+		ena_com_cq_inc_head(io_cq);</div><div class='add'>+		if (unlikely((status &amp; ENA_ETH_IO_RX_CDESC_BASE_FIRST_MASK) &gt;&gt;</div><div class='add'>+		    ENA_ETH_IO_RX_CDESC_BASE_FIRST_SHIFT &amp;&amp; count != 0)) {</div><div class='add'>+			struct ena_com_dev *dev = ena_com_io_cq_to_ena_dev(io_cq);</div><div class='add'>+</div><div class='add'>+			netdev_err(dev-&gt;net_device,</div><div class='add'>+				   "First bit is on in descriptor #%d on q_id: %d, req_id: %u\n",</div><div class='add'>+				   count, io_cq-&gt;qid, cdesc-&gt;req_id);</div><div class='add'>+			return -EFAULT;</div><div class='add'>+		}</div><div class='add'>+		count++;</div><div class='add'>+		last = (status &amp; ENA_ETH_IO_RX_CDESC_BASE_LAST_MASK) &gt;&gt;</div><div class='add'>+			ENA_ETH_IO_RX_CDESC_BASE_LAST_SHIFT;</div><div class='add'>+	} while (!last);</div><div class='add'>+</div><div class='add'>+	if (last) {</div><div class='add'>+		*first_cdesc_idx = io_cq-&gt;cur_rx_pkt_cdesc_start_idx;</div><div class='add'>+</div><div class='add'>+		head_masked = io_cq-&gt;head &amp; (io_cq-&gt;q_depth - 1);</div><div class='add'>+</div><div class='add'>+		*num_descs = count;</div><div class='add'>+		io_cq-&gt;cur_rx_pkt_cdesc_count = 0;</div><div class='add'>+		io_cq-&gt;cur_rx_pkt_cdesc_start_idx = head_masked;</div><div class='add'>+</div><div class='add'>+		netdev_dbg(ena_com_io_cq_to_ena_dev(io_cq)-&gt;net_device,</div><div class='add'>+			   "ENA q_id: %d packets were completed. first desc idx %u descs# %d\n",</div><div class='add'>+			   io_cq-&gt;qid, *first_cdesc_idx, count);</div><div class='add'>+	} else {</div><div class='add'>+		io_cq-&gt;cur_rx_pkt_cdesc_count = count;</div><div class='add'>+		*num_descs = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_com_create_meta(struct ena_com_io_sq *io_sq,</div><div class='add'>+			       struct ena_com_tx_meta *ena_meta)</div><div class='add'>+{</div><div class='add'>+	struct ena_eth_io_tx_meta_desc *meta_desc = NULL;</div><div class='add'>+</div><div class='add'>+	meta_desc = get_sq_desc(io_sq);</div><div class='add'>+	if (unlikely(!meta_desc))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	memset(meta_desc, 0x0, sizeof(struct ena_eth_io_tx_meta_desc));</div><div class='add'>+</div><div class='add'>+	meta_desc-&gt;len_ctrl |= ENA_ETH_IO_TX_META_DESC_META_DESC_MASK;</div><div class='add'>+</div><div class='add'>+	meta_desc-&gt;len_ctrl |= ENA_ETH_IO_TX_META_DESC_EXT_VALID_MASK;</div><div class='add'>+</div><div class='add'>+	/* bits 0-9 of the mss */</div><div class='add'>+	meta_desc-&gt;word2 |= ((u32)ena_meta-&gt;mss &lt;&lt;</div><div class='add'>+		ENA_ETH_IO_TX_META_DESC_MSS_LO_SHIFT) &amp;</div><div class='add'>+		ENA_ETH_IO_TX_META_DESC_MSS_LO_MASK;</div><div class='add'>+	/* bits 10-13 of the mss */</div><div class='add'>+	meta_desc-&gt;len_ctrl |= ((ena_meta-&gt;mss &gt;&gt; 10) &lt;&lt;</div><div class='add'>+		ENA_ETH_IO_TX_META_DESC_MSS_HI_SHIFT) &amp;</div><div class='add'>+		ENA_ETH_IO_TX_META_DESC_MSS_HI_MASK;</div><div class='add'>+</div><div class='add'>+	/* Extended meta desc */</div><div class='add'>+	meta_desc-&gt;len_ctrl |= ENA_ETH_IO_TX_META_DESC_ETH_META_TYPE_MASK;</div><div class='add'>+	meta_desc-&gt;len_ctrl |= ((u32)io_sq-&gt;phase &lt;&lt;</div><div class='add'>+		ENA_ETH_IO_TX_META_DESC_PHASE_SHIFT) &amp;</div><div class='add'>+		ENA_ETH_IO_TX_META_DESC_PHASE_MASK;</div><div class='add'>+</div><div class='add'>+	meta_desc-&gt;len_ctrl |= ENA_ETH_IO_TX_META_DESC_FIRST_MASK;</div><div class='add'>+	meta_desc-&gt;len_ctrl |= ENA_ETH_IO_TX_META_DESC_META_STORE_MASK;</div><div class='add'>+</div><div class='add'>+	meta_desc-&gt;word2 |= ena_meta-&gt;l3_hdr_len &amp;</div><div class='add'>+		ENA_ETH_IO_TX_META_DESC_L3_HDR_LEN_MASK;</div><div class='add'>+	meta_desc-&gt;word2 |= (ena_meta-&gt;l3_hdr_offset &lt;&lt;</div><div class='add'>+		ENA_ETH_IO_TX_META_DESC_L3_HDR_OFF_SHIFT) &amp;</div><div class='add'>+		ENA_ETH_IO_TX_META_DESC_L3_HDR_OFF_MASK;</div><div class='add'>+</div><div class='add'>+	meta_desc-&gt;word2 |= ((u32)ena_meta-&gt;l4_hdr_len &lt;&lt;</div><div class='add'>+		ENA_ETH_IO_TX_META_DESC_L4_HDR_LEN_IN_WORDS_SHIFT) &amp;</div><div class='add'>+		ENA_ETH_IO_TX_META_DESC_L4_HDR_LEN_IN_WORDS_MASK;</div><div class='add'>+</div><div class='add'>+	return ena_com_sq_update_tail(io_sq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_com_create_and_store_tx_meta_desc(struct ena_com_io_sq *io_sq,</div><div class='add'>+						 struct ena_com_tx_ctx *ena_tx_ctx,</div><div class='add'>+						 bool *have_meta)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_tx_meta *ena_meta = &amp;ena_tx_ctx-&gt;ena_meta;</div><div class='add'>+</div><div class='add'>+	/* When disable meta caching is set, don't bother to save the meta and</div><div class='add'>+	 * compare it to the stored version, just create the meta</div><div class='add'>+	 */</div><div class='add'>+	if (io_sq-&gt;disable_meta_caching) {</div><div class='add'>+		*have_meta = true;</div><div class='add'>+		return ena_com_create_meta(io_sq, ena_meta);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ena_com_meta_desc_changed(io_sq, ena_tx_ctx)) {</div><div class='add'>+		*have_meta = true;</div><div class='add'>+		/* Cache the meta desc */</div><div class='add'>+		memcpy(&amp;io_sq-&gt;cached_tx_meta, ena_meta,</div><div class='add'>+		       sizeof(struct ena_com_tx_meta));</div><div class='add'>+		return ena_com_create_meta(io_sq, ena_meta);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*have_meta = false;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_com_rx_set_flags(struct ena_com_io_cq *io_cq,</div><div class='add'>+				 struct ena_com_rx_ctx *ena_rx_ctx,</div><div class='add'>+				 struct ena_eth_io_rx_cdesc_base *cdesc)</div><div class='add'>+{</div><div class='add'>+	ena_rx_ctx-&gt;l3_proto = cdesc-&gt;status &amp;</div><div class='add'>+		ENA_ETH_IO_RX_CDESC_BASE_L3_PROTO_IDX_MASK;</div><div class='add'>+	ena_rx_ctx-&gt;l4_proto =</div><div class='add'>+		(cdesc-&gt;status &amp; ENA_ETH_IO_RX_CDESC_BASE_L4_PROTO_IDX_MASK) &gt;&gt;</div><div class='add'>+		ENA_ETH_IO_RX_CDESC_BASE_L4_PROTO_IDX_SHIFT;</div><div class='add'>+	ena_rx_ctx-&gt;l3_csum_err =</div><div class='add'>+		!!((cdesc-&gt;status &amp; ENA_ETH_IO_RX_CDESC_BASE_L3_CSUM_ERR_MASK) &gt;&gt;</div><div class='add'>+		ENA_ETH_IO_RX_CDESC_BASE_L3_CSUM_ERR_SHIFT);</div><div class='add'>+	ena_rx_ctx-&gt;l4_csum_err =</div><div class='add'>+		!!((cdesc-&gt;status &amp; ENA_ETH_IO_RX_CDESC_BASE_L4_CSUM_ERR_MASK) &gt;&gt;</div><div class='add'>+		ENA_ETH_IO_RX_CDESC_BASE_L4_CSUM_ERR_SHIFT);</div><div class='add'>+	ena_rx_ctx-&gt;l4_csum_checked =</div><div class='add'>+		!!((cdesc-&gt;status &amp; ENA_ETH_IO_RX_CDESC_BASE_L4_CSUM_CHECKED_MASK) &gt;&gt;</div><div class='add'>+		ENA_ETH_IO_RX_CDESC_BASE_L4_CSUM_CHECKED_SHIFT);</div><div class='add'>+	ena_rx_ctx-&gt;hash = cdesc-&gt;hash;</div><div class='add'>+	ena_rx_ctx-&gt;frag =</div><div class='add'>+		(cdesc-&gt;status &amp; ENA_ETH_IO_RX_CDESC_BASE_IPV4_FRAG_MASK) &gt;&gt;</div><div class='add'>+		ENA_ETH_IO_RX_CDESC_BASE_IPV4_FRAG_SHIFT;</div><div class='add'>+</div><div class='add'>+	netdev_dbg(ena_com_io_cq_to_ena_dev(io_cq)-&gt;net_device,</div><div class='add'>+		   "l3_proto %d l4_proto %d l3_csum_err %d l4_csum_err %d hash %d frag %d cdesc_status %x\n",</div><div class='add'>+		   ena_rx_ctx-&gt;l3_proto, ena_rx_ctx-&gt;l4_proto, ena_rx_ctx-&gt;l3_csum_err,</div><div class='add'>+		   ena_rx_ctx-&gt;l4_csum_err, ena_rx_ctx-&gt;hash, ena_rx_ctx-&gt;frag, cdesc-&gt;status);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*****************************************************************************/</div><div class='add'>+/*****************************     API      **********************************/</div><div class='add'>+/*****************************************************************************/</div><div class='add'>+</div><div class='add'>+int ena_com_prepare_tx(struct ena_com_io_sq *io_sq,</div><div class='add'>+		       struct ena_com_tx_ctx *ena_tx_ctx,</div><div class='add'>+		       int *nb_hw_desc)</div><div class='add'>+{</div><div class='add'>+	struct ena_eth_io_tx_desc *desc = NULL;</div><div class='add'>+	struct ena_com_buf *ena_bufs = ena_tx_ctx-&gt;ena_bufs;</div><div class='add'>+	void *buffer_to_push = ena_tx_ctx-&gt;push_header;</div><div class='add'>+	u16 header_len = ena_tx_ctx-&gt;header_len;</div><div class='add'>+	u16 num_bufs = ena_tx_ctx-&gt;num_bufs;</div><div class='add'>+	u16 start_tail = io_sq-&gt;tail;</div><div class='add'>+	int i, rc;</div><div class='add'>+	bool have_meta;</div><div class='add'>+	u64 addr_hi;</div><div class='add'>+</div><div class='add'>+	WARN(io_sq-&gt;direction != ENA_COM_IO_QUEUE_DIRECTION_TX, "wrong Q type");</div><div class='add'>+</div><div class='add'>+	/* num_bufs +1 for potential meta desc */</div><div class='add'>+	if (unlikely(!ena_com_sq_have_enough_space(io_sq, num_bufs + 1))) {</div><div class='add'>+		netdev_dbg(ena_com_io_sq_to_ena_dev(io_sq)-&gt;net_device,</div><div class='add'>+			   "Not enough space in the tx queue\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (unlikely(header_len &gt; io_sq-&gt;tx_max_header_size)) {</div><div class='add'>+		netdev_err(ena_com_io_sq_to_ena_dev(io_sq)-&gt;net_device,</div><div class='add'>+			   "Header size is too large %d max header: %d\n", header_len,</div><div class='add'>+			   io_sq-&gt;tx_max_header_size);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (unlikely(io_sq-&gt;mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV &amp;&amp; !buffer_to_push)) {</div><div class='add'>+		netdev_err(ena_com_io_sq_to_ena_dev(io_sq)-&gt;net_device,</div><div class='add'>+			   "Push header wasn't provided in LLQ mode\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = ena_com_write_header_to_bounce(io_sq, buffer_to_push, header_len);</div><div class='add'>+	if (unlikely(rc))</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	rc = ena_com_create_and_store_tx_meta_desc(io_sq, ena_tx_ctx, &amp;have_meta);</div><div class='add'>+	if (unlikely(rc)) {</div><div class='add'>+		netdev_err(ena_com_io_sq_to_ena_dev(io_sq)-&gt;net_device,</div><div class='add'>+			   "Failed to create and store tx meta desc\n");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* If the caller doesn't want to send packets */</div><div class='add'>+	if (unlikely(!num_bufs &amp;&amp; !header_len)) {</div><div class='add'>+		rc = ena_com_close_bounce_buffer(io_sq);</div><div class='add'>+		if (rc)</div><div class='add'>+			netdev_err(ena_com_io_sq_to_ena_dev(io_sq)-&gt;net_device,</div><div class='add'>+				   "Failed to write buffers to LLQ\n");</div><div class='add'>+		*nb_hw_desc = io_sq-&gt;tail - start_tail;</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	desc = get_sq_desc(io_sq);</div><div class='add'>+	if (unlikely(!desc))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	memset(desc, 0x0, sizeof(struct ena_eth_io_tx_desc));</div><div class='add'>+</div><div class='add'>+	/* Set first desc when we don't have meta descriptor */</div><div class='add'>+	if (!have_meta)</div><div class='add'>+		desc-&gt;len_ctrl |= ENA_ETH_IO_TX_DESC_FIRST_MASK;</div><div class='add'>+</div><div class='add'>+	desc-&gt;buff_addr_hi_hdr_sz |= ((u32)header_len &lt;&lt;</div><div class='add'>+		ENA_ETH_IO_TX_DESC_HEADER_LENGTH_SHIFT) &amp;</div><div class='add'>+		ENA_ETH_IO_TX_DESC_HEADER_LENGTH_MASK;</div><div class='add'>+	desc-&gt;len_ctrl |= ((u32)io_sq-&gt;phase &lt;&lt; ENA_ETH_IO_TX_DESC_PHASE_SHIFT) &amp;</div><div class='add'>+		ENA_ETH_IO_TX_DESC_PHASE_MASK;</div><div class='add'>+</div><div class='add'>+	desc-&gt;len_ctrl |= ENA_ETH_IO_TX_DESC_COMP_REQ_MASK;</div><div class='add'>+</div><div class='add'>+	/* Bits 0-9 */</div><div class='add'>+	desc-&gt;meta_ctrl |= ((u32)ena_tx_ctx-&gt;req_id &lt;&lt;</div><div class='add'>+		ENA_ETH_IO_TX_DESC_REQ_ID_LO_SHIFT) &amp;</div><div class='add'>+		ENA_ETH_IO_TX_DESC_REQ_ID_LO_MASK;</div><div class='add'>+</div><div class='add'>+	desc-&gt;meta_ctrl |= (ena_tx_ctx-&gt;df &lt;&lt;</div><div class='add'>+		ENA_ETH_IO_TX_DESC_DF_SHIFT) &amp;</div><div class='add'>+		ENA_ETH_IO_TX_DESC_DF_MASK;</div><div class='add'>+</div><div class='add'>+	/* Bits 10-15 */</div><div class='add'>+	desc-&gt;len_ctrl |= ((ena_tx_ctx-&gt;req_id &gt;&gt; 10) &lt;&lt;</div><div class='add'>+		ENA_ETH_IO_TX_DESC_REQ_ID_HI_SHIFT) &amp;</div><div class='add'>+		ENA_ETH_IO_TX_DESC_REQ_ID_HI_MASK;</div><div class='add'>+</div><div class='add'>+	if (ena_tx_ctx-&gt;meta_valid) {</div><div class='add'>+		desc-&gt;meta_ctrl |= (ena_tx_ctx-&gt;tso_enable &lt;&lt;</div><div class='add'>+			ENA_ETH_IO_TX_DESC_TSO_EN_SHIFT) &amp;</div><div class='add'>+			ENA_ETH_IO_TX_DESC_TSO_EN_MASK;</div><div class='add'>+		desc-&gt;meta_ctrl |= ena_tx_ctx-&gt;l3_proto &amp;</div><div class='add'>+			ENA_ETH_IO_TX_DESC_L3_PROTO_IDX_MASK;</div><div class='add'>+		desc-&gt;meta_ctrl |= (ena_tx_ctx-&gt;l4_proto &lt;&lt;</div><div class='add'>+			ENA_ETH_IO_TX_DESC_L4_PROTO_IDX_SHIFT) &amp;</div><div class='add'>+			ENA_ETH_IO_TX_DESC_L4_PROTO_IDX_MASK;</div><div class='add'>+		desc-&gt;meta_ctrl |= (ena_tx_ctx-&gt;l3_csum_enable &lt;&lt;</div><div class='add'>+			ENA_ETH_IO_TX_DESC_L3_CSUM_EN_SHIFT) &amp;</div><div class='add'>+			ENA_ETH_IO_TX_DESC_L3_CSUM_EN_MASK;</div><div class='add'>+		desc-&gt;meta_ctrl |= (ena_tx_ctx-&gt;l4_csum_enable &lt;&lt;</div><div class='add'>+			ENA_ETH_IO_TX_DESC_L4_CSUM_EN_SHIFT) &amp;</div><div class='add'>+			ENA_ETH_IO_TX_DESC_L4_CSUM_EN_MASK;</div><div class='add'>+		desc-&gt;meta_ctrl |= (ena_tx_ctx-&gt;l4_csum_partial &lt;&lt;</div><div class='add'>+			ENA_ETH_IO_TX_DESC_L4_CSUM_PARTIAL_SHIFT) &amp;</div><div class='add'>+			ENA_ETH_IO_TX_DESC_L4_CSUM_PARTIAL_MASK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_bufs; i++) {</div><div class='add'>+		/* The first desc share the same desc as the header */</div><div class='add'>+		if (likely(i != 0)) {</div><div class='add'>+			rc = ena_com_sq_update_tail(io_sq);</div><div class='add'>+			if (unlikely(rc)) {</div><div class='add'>+				netdev_err(ena_com_io_sq_to_ena_dev(io_sq)-&gt;net_device,</div><div class='add'>+					   "Failed to update sq tail\n");</div><div class='add'>+				return rc;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			desc = get_sq_desc(io_sq);</div><div class='add'>+			if (unlikely(!desc))</div><div class='add'>+				return -EFAULT;</div><div class='add'>+</div><div class='add'>+			memset(desc, 0x0, sizeof(struct ena_eth_io_tx_desc));</div><div class='add'>+</div><div class='add'>+			desc-&gt;len_ctrl |= ((u32)io_sq-&gt;phase &lt;&lt;</div><div class='add'>+				ENA_ETH_IO_TX_DESC_PHASE_SHIFT) &amp;</div><div class='add'>+				ENA_ETH_IO_TX_DESC_PHASE_MASK;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		desc-&gt;len_ctrl |= ena_bufs-&gt;len &amp;</div><div class='add'>+			ENA_ETH_IO_TX_DESC_LENGTH_MASK;</div><div class='add'>+</div><div class='add'>+		addr_hi = ((ena_bufs-&gt;paddr &amp;</div><div class='add'>+			GENMASK_ULL(io_sq-&gt;dma_addr_bits - 1, 32)) &gt;&gt; 32);</div><div class='add'>+</div><div class='add'>+		desc-&gt;buff_addr_lo = (u32)ena_bufs-&gt;paddr;</div><div class='add'>+		desc-&gt;buff_addr_hi_hdr_sz |= addr_hi &amp;</div><div class='add'>+			ENA_ETH_IO_TX_DESC_ADDR_HI_MASK;</div><div class='add'>+		ena_bufs++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* set the last desc indicator */</div><div class='add'>+	desc-&gt;len_ctrl |= ENA_ETH_IO_TX_DESC_LAST_MASK;</div><div class='add'>+</div><div class='add'>+	rc = ena_com_sq_update_tail(io_sq);</div><div class='add'>+	if (unlikely(rc)) {</div><div class='add'>+		netdev_err(ena_com_io_sq_to_ena_dev(io_sq)-&gt;net_device,</div><div class='add'>+			   "Failed to update sq tail of the last descriptor\n");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = ena_com_close_bounce_buffer(io_sq);</div><div class='add'>+</div><div class='add'>+	*nb_hw_desc = io_sq-&gt;tail - start_tail;</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_rx_pkt(struct ena_com_io_cq *io_cq,</div><div class='add'>+		   struct ena_com_io_sq *io_sq,</div><div class='add'>+		   struct ena_com_rx_ctx *ena_rx_ctx)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_rx_buf_info *ena_buf = &amp;ena_rx_ctx-&gt;ena_bufs[0];</div><div class='add'>+	struct ena_eth_io_rx_cdesc_base *cdesc = NULL;</div><div class='add'>+	u16 q_depth = io_cq-&gt;q_depth;</div><div class='add'>+	u16 cdesc_idx = 0;</div><div class='add'>+	u16 nb_hw_desc;</div><div class='add'>+	u16 i = 0;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	WARN(io_cq-&gt;direction != ENA_COM_IO_QUEUE_DIRECTION_RX, "wrong Q type");</div><div class='add'>+</div><div class='add'>+	rc = ena_com_cdesc_rx_pkt_get(io_cq, &amp;cdesc_idx, &amp;nb_hw_desc);</div><div class='add'>+	if (unlikely(rc != 0))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	if (nb_hw_desc == 0) {</div><div class='add'>+		ena_rx_ctx-&gt;descs = nb_hw_desc;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev_dbg(ena_com_io_cq_to_ena_dev(io_cq)-&gt;net_device,</div><div class='add'>+		   "Fetch rx packet: queue %d completed desc: %d\n", io_cq-&gt;qid, nb_hw_desc);</div><div class='add'>+</div><div class='add'>+	if (unlikely(nb_hw_desc &gt; ena_rx_ctx-&gt;max_bufs)) {</div><div class='add'>+		netdev_err(ena_com_io_cq_to_ena_dev(io_cq)-&gt;net_device,</div><div class='add'>+			   "Too many RX cdescs (%d) &gt; MAX(%d)\n", nb_hw_desc, ena_rx_ctx-&gt;max_bufs);</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cdesc = ena_com_rx_cdesc_idx_to_ptr(io_cq, cdesc_idx);</div><div class='add'>+	ena_rx_ctx-&gt;pkt_offset = cdesc-&gt;offset;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		ena_buf[i].len = cdesc-&gt;length;</div><div class='add'>+		ena_buf[i].req_id = cdesc-&gt;req_id;</div><div class='add'>+		if (unlikely(ena_buf[i].req_id &gt;= q_depth))</div><div class='add'>+			return -EIO;</div><div class='add'>+</div><div class='add'>+		if (++i &gt;= nb_hw_desc)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		cdesc = ena_com_rx_cdesc_idx_to_ptr(io_cq, cdesc_idx + i);</div><div class='add'>+</div><div class='add'>+	} while (1);</div><div class='add'>+</div><div class='add'>+	/* Update SQ head ptr */</div><div class='add'>+	io_sq-&gt;next_to_comp += nb_hw_desc;</div><div class='add'>+</div><div class='add'>+	netdev_dbg(ena_com_io_cq_to_ena_dev(io_cq)-&gt;net_device,</div><div class='add'>+		   "[%s][QID#%d] Updating SQ head to: %d\n", __func__, io_sq-&gt;qid,</div><div class='add'>+		   io_sq-&gt;next_to_comp);</div><div class='add'>+</div><div class='add'>+	/* Get rx flags from the last pkt */</div><div class='add'>+	ena_com_rx_set_flags(io_cq, ena_rx_ctx, cdesc);</div><div class='add'>+</div><div class='add'>+	ena_rx_ctx-&gt;descs = nb_hw_desc;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_com_add_single_rx_desc(struct ena_com_io_sq *io_sq,</div><div class='add'>+			       struct ena_com_buf *ena_buf,</div><div class='add'>+			       u16 req_id)</div><div class='add'>+{</div><div class='add'>+	struct ena_eth_io_rx_desc *desc;</div><div class='add'>+</div><div class='add'>+	WARN(io_sq-&gt;direction != ENA_COM_IO_QUEUE_DIRECTION_RX, "wrong Q type");</div><div class='add'>+</div><div class='add'>+	if (unlikely(!ena_com_sq_have_enough_space(io_sq, 1)))</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+</div><div class='add'>+	desc = get_sq_desc(io_sq);</div><div class='add'>+	if (unlikely(!desc))</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	memset(desc, 0x0, sizeof(struct ena_eth_io_rx_desc));</div><div class='add'>+</div><div class='add'>+	desc-&gt;length = ena_buf-&gt;len;</div><div class='add'>+</div><div class='add'>+	desc-&gt;ctrl = ENA_ETH_IO_RX_DESC_FIRST_MASK |</div><div class='add'>+		     ENA_ETH_IO_RX_DESC_LAST_MASK |</div><div class='add'>+		     ENA_ETH_IO_RX_DESC_COMP_REQ_MASK |</div><div class='add'>+		     (io_sq-&gt;phase &amp; ENA_ETH_IO_RX_DESC_PHASE_MASK);</div><div class='add'>+</div><div class='add'>+	desc-&gt;req_id = req_id;</div><div class='add'>+</div><div class='add'>+	netdev_dbg(ena_com_io_sq_to_ena_dev(io_sq)-&gt;net_device,</div><div class='add'>+		   "[%s] Adding single RX desc, Queue: %u, req_id: %u\n", __func__, io_sq-&gt;qid,</div><div class='add'>+		   req_id);</div><div class='add'>+</div><div class='add'>+	desc-&gt;buff_addr_lo = (u32)ena_buf-&gt;paddr;</div><div class='add'>+	desc-&gt;buff_addr_hi =</div><div class='add'>+		((ena_buf-&gt;paddr &amp; GENMASK_ULL(io_sq-&gt;dma_addr_bits - 1, 32)) &gt;&gt; 32);</div><div class='add'>+</div><div class='add'>+	return ena_com_sq_update_tail(io_sq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool ena_com_cq_empty(struct ena_com_io_cq *io_cq)</div><div class='add'>+{</div><div class='add'>+	struct ena_eth_io_rx_cdesc_base *cdesc;</div><div class='add'>+</div><div class='add'>+	cdesc = ena_com_get_next_rx_cdesc(io_cq);</div><div class='add'>+	if (cdesc)</div><div class='add'>+		return false;</div><div class='add'>+	else</div><div class='add'>+		return true;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/amazon/ena/ena_eth_com.h b/drivers/net/ethernet/amazon/ena/ena_eth_com.h<br/>new file mode 100644<br/>index 000000000000..449bc4960ccc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_eth_com.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amazon/ena/ena_eth_com.h</a></div><div class='hunk'>@@ -0,0 +1,236 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015-2020 Amazon.com, Inc. or its affiliates. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef ENA_ETH_COM_H_</div><div class='add'>+#define ENA_ETH_COM_H_</div><div class='add'>+</div><div class='add'>+#include "ena_com.h"</div><div class='add'>+</div><div class='add'>+/* we allow 2 DMA descriptors per LLQ entry */</div><div class='add'>+#define ENA_LLQ_ENTRY_DESC_CHUNK_SIZE	(2 * sizeof(struct ena_eth_io_tx_desc))</div><div class='add'>+#define ENA_LLQ_HEADER		(128UL - ENA_LLQ_ENTRY_DESC_CHUNK_SIZE)</div><div class='add'>+#define ENA_LLQ_LARGE_HEADER	(256UL - ENA_LLQ_ENTRY_DESC_CHUNK_SIZE)</div><div class='add'>+</div><div class='add'>+struct ena_com_tx_ctx {</div><div class='add'>+	struct ena_com_tx_meta ena_meta;</div><div class='add'>+	struct ena_com_buf *ena_bufs;</div><div class='add'>+	/* For LLQ, header buffer - pushed to the device mem space */</div><div class='add'>+	void *push_header;</div><div class='add'>+</div><div class='add'>+	enum ena_eth_io_l3_proto_index l3_proto;</div><div class='add'>+	enum ena_eth_io_l4_proto_index l4_proto;</div><div class='add'>+	u16 num_bufs;</div><div class='add'>+	u16 req_id;</div><div class='add'>+	/* For regular queue, indicate the size of the header</div><div class='add'>+	 * For LLQ, indicate the size of the pushed buffer</div><div class='add'>+	 */</div><div class='add'>+	u16 header_len;</div><div class='add'>+</div><div class='add'>+	u8 meta_valid;</div><div class='add'>+	u8 tso_enable;</div><div class='add'>+	u8 l3_csum_enable;</div><div class='add'>+	u8 l4_csum_enable;</div><div class='add'>+	u8 l4_csum_partial;</div><div class='add'>+	u8 df; /* Don't fragment */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_com_rx_ctx {</div><div class='add'>+	struct ena_com_rx_buf_info *ena_bufs;</div><div class='add'>+	enum ena_eth_io_l3_proto_index l3_proto;</div><div class='add'>+	enum ena_eth_io_l4_proto_index l4_proto;</div><div class='add'>+	bool l3_csum_err;</div><div class='add'>+	bool l4_csum_err;</div><div class='add'>+	u8 l4_csum_checked;</div><div class='add'>+	/* fragmented packet */</div><div class='add'>+	bool frag;</div><div class='add'>+	u32 hash;</div><div class='add'>+	u16 descs;</div><div class='add'>+	u16 max_bufs;</div><div class='add'>+	u8 pkt_offset;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int ena_com_prepare_tx(struct ena_com_io_sq *io_sq,</div><div class='add'>+		       struct ena_com_tx_ctx *ena_tx_ctx,</div><div class='add'>+		       int *nb_hw_desc);</div><div class='add'>+</div><div class='add'>+int ena_com_rx_pkt(struct ena_com_io_cq *io_cq,</div><div class='add'>+		   struct ena_com_io_sq *io_sq,</div><div class='add'>+		   struct ena_com_rx_ctx *ena_rx_ctx);</div><div class='add'>+</div><div class='add'>+int ena_com_add_single_rx_desc(struct ena_com_io_sq *io_sq,</div><div class='add'>+			       struct ena_com_buf *ena_buf,</div><div class='add'>+			       u16 req_id);</div><div class='add'>+</div><div class='add'>+bool ena_com_cq_empty(struct ena_com_io_cq *io_cq);</div><div class='add'>+</div><div class='add'>+static inline void ena_com_unmask_intr(struct ena_com_io_cq *io_cq,</div><div class='add'>+				       struct ena_eth_io_intr_reg *intr_reg)</div><div class='add'>+{</div><div class='add'>+	writel(intr_reg-&gt;intr_control, io_cq-&gt;unmask_reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ena_com_free_q_entries(struct ena_com_io_sq *io_sq)</div><div class='add'>+{</div><div class='add'>+	u16 tail, next_to_comp, cnt;</div><div class='add'>+</div><div class='add'>+	next_to_comp = io_sq-&gt;next_to_comp;</div><div class='add'>+	tail = io_sq-&gt;tail;</div><div class='add'>+	cnt = tail - next_to_comp;</div><div class='add'>+</div><div class='add'>+	return io_sq-&gt;q_depth - 1 - cnt;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Check if the submission queue has enough space to hold required_buffers */</div><div class='add'>+static inline bool ena_com_sq_have_enough_space(struct ena_com_io_sq *io_sq,</div><div class='add'>+						u16 required_buffers)</div><div class='add'>+{</div><div class='add'>+	int temp;</div><div class='add'>+</div><div class='add'>+	if (io_sq-&gt;mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_HOST)</div><div class='add'>+		return ena_com_free_q_entries(io_sq) &gt;= required_buffers;</div><div class='add'>+</div><div class='add'>+	/* This calculation doesn't need to be 100% accurate. So to reduce</div><div class='add'>+	 * the calculation overhead just Subtract 2 lines from the free descs</div><div class='add'>+	 * (one for the header line and one to compensate the devision</div><div class='add'>+	 * down calculation.</div><div class='add'>+	 */</div><div class='add'>+	temp = required_buffers / io_sq-&gt;llq_info.descs_per_entry + 2;</div><div class='add'>+</div><div class='add'>+	return ena_com_free_q_entries(io_sq) &gt; temp;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool ena_com_meta_desc_changed(struct ena_com_io_sq *io_sq,</div><div class='add'>+					     struct ena_com_tx_ctx *ena_tx_ctx)</div><div class='add'>+{</div><div class='add'>+	if (!ena_tx_ctx-&gt;meta_valid)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return !!memcmp(&amp;io_sq-&gt;cached_tx_meta,</div><div class='add'>+			&amp;ena_tx_ctx-&gt;ena_meta,</div><div class='add'>+			sizeof(struct ena_com_tx_meta));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool is_llq_max_tx_burst_exists(struct ena_com_io_sq *io_sq)</div><div class='add'>+{</div><div class='add'>+	return (io_sq-&gt;mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) &amp;&amp;</div><div class='add'>+	       io_sq-&gt;llq_info.max_entries_in_tx_burst &gt; 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool ena_com_is_doorbell_needed(struct ena_com_io_sq *io_sq,</div><div class='add'>+					      struct ena_com_tx_ctx *ena_tx_ctx)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_llq_info *llq_info;</div><div class='add'>+	int descs_after_first_entry;</div><div class='add'>+	int num_entries_needed = 1;</div><div class='add'>+	u16 num_descs;</div><div class='add'>+</div><div class='add'>+	if (!is_llq_max_tx_burst_exists(io_sq))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	llq_info = &amp;io_sq-&gt;llq_info;</div><div class='add'>+	num_descs = ena_tx_ctx-&gt;num_bufs;</div><div class='add'>+</div><div class='add'>+	if (llq_info-&gt;disable_meta_caching ||</div><div class='add'>+	    unlikely(ena_com_meta_desc_changed(io_sq, ena_tx_ctx)))</div><div class='add'>+		++num_descs;</div><div class='add'>+</div><div class='add'>+	if (num_descs &gt; llq_info-&gt;descs_num_before_header) {</div><div class='add'>+		descs_after_first_entry = num_descs - llq_info-&gt;descs_num_before_header;</div><div class='add'>+		num_entries_needed += DIV_ROUND_UP(descs_after_first_entry,</div><div class='add'>+						   llq_info-&gt;descs_per_entry);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netdev_dbg(ena_com_io_sq_to_ena_dev(io_sq)-&gt;net_device,</div><div class='add'>+		   "Queue: %d num_descs: %d num_entries_needed: %d\n", io_sq-&gt;qid, num_descs,</div><div class='add'>+		   num_entries_needed);</div><div class='add'>+</div><div class='add'>+	return num_entries_needed &gt; io_sq-&gt;entries_in_tx_burst_left;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ena_com_write_sq_doorbell(struct ena_com_io_sq *io_sq)</div><div class='add'>+{</div><div class='add'>+	u16 max_entries_in_tx_burst = io_sq-&gt;llq_info.max_entries_in_tx_burst;</div><div class='add'>+	u16 tail = io_sq-&gt;tail;</div><div class='add'>+</div><div class='add'>+	netdev_dbg(ena_com_io_sq_to_ena_dev(io_sq)-&gt;net_device,</div><div class='add'>+		   "Write submission queue doorbell for queue: %d tail: %d\n", io_sq-&gt;qid, tail);</div><div class='add'>+</div><div class='add'>+	writel(tail, io_sq-&gt;db_addr);</div><div class='add'>+</div><div class='add'>+	if (is_llq_max_tx_burst_exists(io_sq)) {</div><div class='add'>+		netdev_dbg(ena_com_io_sq_to_ena_dev(io_sq)-&gt;net_device,</div><div class='add'>+			   "Reset available entries in tx burst for queue %d to %d\n", io_sq-&gt;qid,</div><div class='add'>+			   max_entries_in_tx_burst);</div><div class='add'>+		io_sq-&gt;entries_in_tx_burst_left = max_entries_in_tx_burst;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ena_com_update_numa_node(struct ena_com_io_cq *io_cq,</div><div class='add'>+					    u8 numa_node)</div><div class='add'>+{</div><div class='add'>+	struct ena_eth_io_numa_node_cfg_reg numa_cfg;</div><div class='add'>+</div><div class='add'>+	if (!io_cq-&gt;numa_node_cfg_reg)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	numa_cfg.numa_cfg = (numa_node &amp; ENA_ETH_IO_NUMA_NODE_CFG_REG_NUMA_MASK)</div><div class='add'>+		| ENA_ETH_IO_NUMA_NODE_CFG_REG_ENABLED_MASK;</div><div class='add'>+</div><div class='add'>+	writel(numa_cfg.numa_cfg, io_cq-&gt;numa_node_cfg_reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ena_com_comp_ack(struct ena_com_io_sq *io_sq, u16 elem)</div><div class='add'>+{</div><div class='add'>+	io_sq-&gt;next_to_comp += elem;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ena_com_cq_inc_head(struct ena_com_io_cq *io_cq)</div><div class='add'>+{</div><div class='add'>+	io_cq-&gt;head++;</div><div class='add'>+</div><div class='add'>+	/* Switch phase bit in case of wrap around */</div><div class='add'>+	if (unlikely((io_cq-&gt;head &amp; (io_cq-&gt;q_depth - 1)) == 0))</div><div class='add'>+		io_cq-&gt;phase ^= 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ena_com_tx_comp_req_id_get(struct ena_com_io_cq *io_cq,</div><div class='add'>+					     u16 *req_id)</div><div class='add'>+{</div><div class='add'>+	u8 expected_phase, cdesc_phase;</div><div class='add'>+	struct ena_eth_io_tx_cdesc *cdesc;</div><div class='add'>+	u16 masked_head;</div><div class='add'>+</div><div class='add'>+	masked_head = io_cq-&gt;head &amp; (io_cq-&gt;q_depth - 1);</div><div class='add'>+	expected_phase = io_cq-&gt;phase;</div><div class='add'>+</div><div class='add'>+	cdesc = (struct ena_eth_io_tx_cdesc *)</div><div class='add'>+		((uintptr_t)io_cq-&gt;cdesc_addr.virt_addr +</div><div class='add'>+		(masked_head * io_cq-&gt;cdesc_entry_size_in_bytes));</div><div class='add'>+</div><div class='add'>+	/* When the current completion descriptor phase isn't the same as the</div><div class='add'>+	 * expected, it mean that the device still didn't update</div><div class='add'>+	 * this completion.</div><div class='add'>+	 */</div><div class='add'>+	cdesc_phase = READ_ONCE(cdesc-&gt;flags) &amp; ENA_ETH_IO_TX_CDESC_PHASE_MASK;</div><div class='add'>+	if (cdesc_phase != expected_phase)</div><div class='add'>+		return -EAGAIN;</div><div class='add'>+</div><div class='add'>+	dma_rmb();</div><div class='add'>+</div><div class='add'>+	*req_id = READ_ONCE(cdesc-&gt;req_id);</div><div class='add'>+	if (unlikely(*req_id &gt;= io_cq-&gt;q_depth)) {</div><div class='add'>+		netdev_err(ena_com_io_cq_to_ena_dev(io_cq)-&gt;net_device, "Invalid req id %d\n",</div><div class='add'>+			   cdesc-&gt;req_id);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ena_com_cq_inc_head(io_cq);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* ENA_ETH_COM_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/amazon/ena/ena_eth_io_defs.h b/drivers/net/ethernet/amazon/ena/ena_eth_io_defs.h<br/>new file mode 100644<br/>index 000000000000..332ac0d28ac7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_eth_io_defs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amazon/ena/ena_eth_io_defs.h</a></div><div class='hunk'>@@ -0,0 +1,390 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015-2020 Amazon.com, Inc. or its affiliates. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+#ifndef _ENA_ETH_IO_H_</div><div class='add'>+#define _ENA_ETH_IO_H_</div><div class='add'>+</div><div class='add'>+enum ena_eth_io_l3_proto_index {</div><div class='add'>+	ENA_ETH_IO_L3_PROTO_UNKNOWN                 = 0,</div><div class='add'>+	ENA_ETH_IO_L3_PROTO_IPV4                    = 8,</div><div class='add'>+	ENA_ETH_IO_L3_PROTO_IPV6                    = 11,</div><div class='add'>+	ENA_ETH_IO_L3_PROTO_FCOE                    = 21,</div><div class='add'>+	ENA_ETH_IO_L3_PROTO_ROCE                    = 22,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum ena_eth_io_l4_proto_index {</div><div class='add'>+	ENA_ETH_IO_L4_PROTO_UNKNOWN                 = 0,</div><div class='add'>+	ENA_ETH_IO_L4_PROTO_TCP                     = 12,</div><div class='add'>+	ENA_ETH_IO_L4_PROTO_UDP                     = 13,</div><div class='add'>+	ENA_ETH_IO_L4_PROTO_ROUTEABLE_ROCE          = 23,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_eth_io_tx_desc {</div><div class='add'>+	/* 15:0 : length - Buffer length in bytes, must</div><div class='add'>+	 *    include any packet trailers that the ENA supposed</div><div class='add'>+	 *    to update like End-to-End CRC, Authentication GMAC</div><div class='add'>+	 *    etc. This length must not include the</div><div class='add'>+	 *    'Push_Buffer' length. This length must not include</div><div class='add'>+	 *    the 4-byte added in the end for 802.3 Ethernet FCS</div><div class='add'>+	 * 21:16 : req_id_hi - Request ID[15:10]</div><div class='add'>+	 * 22 : reserved22 - MBZ</div><div class='add'>+	 * 23 : meta_desc - MBZ</div><div class='add'>+	 * 24 : phase</div><div class='add'>+	 * 25 : reserved1 - MBZ</div><div class='add'>+	 * 26 : first - Indicates first descriptor in</div><div class='add'>+	 *    transaction</div><div class='add'>+	 * 27 : last - Indicates last descriptor in</div><div class='add'>+	 *    transaction</div><div class='add'>+	 * 28 : comp_req - Indicates whether completion</div><div class='add'>+	 *    should be posted, after packet is transmitted.</div><div class='add'>+	 *    Valid only for first descriptor</div><div class='add'>+	 * 30:29 : reserved29 - MBZ</div><div class='add'>+	 * 31 : reserved31 - MBZ</div><div class='add'>+	 */</div><div class='add'>+	u32 len_ctrl;</div><div class='add'>+</div><div class='add'>+	/* 3:0 : l3_proto_idx - L3 protocol. This field</div><div class='add'>+	 *    required when l3_csum_en,l3_csum or tso_en are set.</div><div class='add'>+	 * 4 : DF - IPv4 DF, must be 0 if packet is IPv4 and</div><div class='add'>+	 *    DF flags of the IPv4 header is 0. Otherwise must</div><div class='add'>+	 *    be set to 1</div><div class='add'>+	 * 6:5 : reserved5</div><div class='add'>+	 * 7 : tso_en - Enable TSO, For TCP only.</div><div class='add'>+	 * 12:8 : l4_proto_idx - L4 protocol. This field need</div><div class='add'>+	 *    to be set when l4_csum_en or tso_en are set.</div><div class='add'>+	 * 13 : l3_csum_en - enable IPv4 header checksum.</div><div class='add'>+	 * 14 : l4_csum_en - enable TCP/UDP checksum.</div><div class='add'>+	 * 15 : ethernet_fcs_dis - when set, the controller</div><div class='add'>+	 *    will not append the 802.3 Ethernet Frame Check</div><div class='add'>+	 *    Sequence to the packet</div><div class='add'>+	 * 16 : reserved16</div><div class='add'>+	 * 17 : l4_csum_partial - L4 partial checksum. when</div><div class='add'>+	 *    set to 0, the ENA calculates the L4 checksum,</div><div class='add'>+	 *    where the Destination Address required for the</div><div class='add'>+	 *    TCP/UDP pseudo-header is taken from the actual</div><div class='add'>+	 *    packet L3 header. when set to 1, the ENA doesn't</div><div class='add'>+	 *    calculate the sum of the pseudo-header, instead,</div><div class='add'>+	 *    the checksum field of the L4 is used instead. When</div><div class='add'>+	 *    TSO enabled, the checksum of the pseudo-header</div><div class='add'>+	 *    must not include the tcp length field. L4 partial</div><div class='add'>+	 *    checksum should be used for IPv6 packet that</div><div class='add'>+	 *    contains Routing Headers.</div><div class='add'>+	 * 20:18 : reserved18 - MBZ</div><div class='add'>+	 * 21 : reserved21 - MBZ</div><div class='add'>+	 * 31:22 : req_id_lo - Request ID[9:0]</div><div class='add'>+	 */</div><div class='add'>+	u32 meta_ctrl;</div><div class='add'>+</div><div class='add'>+	u32 buff_addr_lo;</div><div class='add'>+</div><div class='add'>+	/* address high and header size</div><div class='add'>+	 * 15:0 : addr_hi - Buffer Pointer[47:32]</div><div class='add'>+	 * 23:16 : reserved16_w2</div><div class='add'>+	 * 31:24 : header_length - Header length. For Low</div><div class='add'>+	 *    Latency Queues, this fields indicates the number</div><div class='add'>+	 *    of bytes written to the headers' memory. For</div><div class='add'>+	 *    normal queues, if packet is TCP or UDP, and longer</div><div class='add'>+	 *    than max_header_size, then this field should be</div><div class='add'>+	 *    set to the sum of L4 header offset and L4 header</div><div class='add'>+	 *    size(without options), otherwise, this field</div><div class='add'>+	 *    should be set to 0. For both modes, this field</div><div class='add'>+	 *    must not exceed the max_header_size.</div><div class='add'>+	 *    max_header_size value is reported by the Max</div><div class='add'>+	 *    Queues Feature descriptor</div><div class='add'>+	 */</div><div class='add'>+	u32 buff_addr_hi_hdr_sz;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_eth_io_tx_meta_desc {</div><div class='add'>+	/* 9:0 : req_id_lo - Request ID[9:0]</div><div class='add'>+	 * 11:10 : reserved10 - MBZ</div><div class='add'>+	 * 12 : reserved12 - MBZ</div><div class='add'>+	 * 13 : reserved13 - MBZ</div><div class='add'>+	 * 14 : ext_valid - if set, offset fields in Word2</div><div class='add'>+	 *    are valid Also MSS High in Word 0 and bits [31:24]</div><div class='add'>+	 *    in Word 3</div><div class='add'>+	 * 15 : reserved15</div><div class='add'>+	 * 19:16 : mss_hi</div><div class='add'>+	 * 20 : eth_meta_type - 0: Tx Metadata Descriptor, 1:</div><div class='add'>+	 *    Extended Metadata Descriptor</div><div class='add'>+	 * 21 : meta_store - Store extended metadata in queue</div><div class='add'>+	 *    cache</div><div class='add'>+	 * 22 : reserved22 - MBZ</div><div class='add'>+	 * 23 : meta_desc - MBO</div><div class='add'>+	 * 24 : phase</div><div class='add'>+	 * 25 : reserved25 - MBZ</div><div class='add'>+	 * 26 : first - Indicates first descriptor in</div><div class='add'>+	 *    transaction</div><div class='add'>+	 * 27 : last - Indicates last descriptor in</div><div class='add'>+	 *    transaction</div><div class='add'>+	 * 28 : comp_req - Indicates whether completion</div><div class='add'>+	 *    should be posted, after packet is transmitted.</div><div class='add'>+	 *    Valid only for first descriptor</div><div class='add'>+	 * 30:29 : reserved29 - MBZ</div><div class='add'>+	 * 31 : reserved31 - MBZ</div><div class='add'>+	 */</div><div class='add'>+	u32 len_ctrl;</div><div class='add'>+</div><div class='add'>+	/* 5:0 : req_id_hi</div><div class='add'>+	 * 31:6 : reserved6 - MBZ</div><div class='add'>+	 */</div><div class='add'>+	u32 word1;</div><div class='add'>+</div><div class='add'>+	/* 7:0 : l3_hdr_len</div><div class='add'>+	 * 15:8 : l3_hdr_off</div><div class='add'>+	 * 21:16 : l4_hdr_len_in_words - counts the L4 header</div><div class='add'>+	 *    length in words. there is an explicit assumption</div><div class='add'>+	 *    that L4 header appears right after L3 header and</div><div class='add'>+	 *    L4 offset is based on l3_hdr_off+l3_hdr_len</div><div class='add'>+	 * 31:22 : mss_lo</div><div class='add'>+	 */</div><div class='add'>+	u32 word2;</div><div class='add'>+</div><div class='add'>+	u32 reserved;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_eth_io_tx_cdesc {</div><div class='add'>+	/* Request ID[15:0] */</div><div class='add'>+	u16 req_id;</div><div class='add'>+</div><div class='add'>+	u8 status;</div><div class='add'>+</div><div class='add'>+	/* flags</div><div class='add'>+	 * 0 : phase</div><div class='add'>+	 * 7:1 : reserved1</div><div class='add'>+	 */</div><div class='add'>+	u8 flags;</div><div class='add'>+</div><div class='add'>+	u16 sub_qid;</div><div class='add'>+</div><div class='add'>+	u16 sq_head_idx;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_eth_io_rx_desc {</div><div class='add'>+	/* In bytes. 0 means 64KB */</div><div class='add'>+	u16 length;</div><div class='add'>+</div><div class='add'>+	/* MBZ */</div><div class='add'>+	u8 reserved2;</div><div class='add'>+</div><div class='add'>+	/* 0 : phase</div><div class='add'>+	 * 1 : reserved1 - MBZ</div><div class='add'>+	 * 2 : first - Indicates first descriptor in</div><div class='add'>+	 *    transaction</div><div class='add'>+	 * 3 : last - Indicates last descriptor in transaction</div><div class='add'>+	 * 4 : comp_req</div><div class='add'>+	 * 5 : reserved5 - MBO</div><div class='add'>+	 * 7:6 : reserved6 - MBZ</div><div class='add'>+	 */</div><div class='add'>+	u8 ctrl;</div><div class='add'>+</div><div class='add'>+	u16 req_id;</div><div class='add'>+</div><div class='add'>+	/* MBZ */</div><div class='add'>+	u16 reserved6;</div><div class='add'>+</div><div class='add'>+	u32 buff_addr_lo;</div><div class='add'>+</div><div class='add'>+	u16 buff_addr_hi;</div><div class='add'>+</div><div class='add'>+	/* MBZ */</div><div class='add'>+	u16 reserved16_w3;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* 4-word format Note: all ethernet parsing information are valid only when</div><div class='add'>+ * last=1</div><div class='add'>+ */</div><div class='add'>+struct ena_eth_io_rx_cdesc_base {</div><div class='add'>+	/* 4:0 : l3_proto_idx</div><div class='add'>+	 * 6:5 : src_vlan_cnt</div><div class='add'>+	 * 7 : reserved7 - MBZ</div><div class='add'>+	 * 12:8 : l4_proto_idx</div><div class='add'>+	 * 13 : l3_csum_err - when set, either the L3</div><div class='add'>+	 *    checksum error detected, or, the controller didn't</div><div class='add'>+	 *    validate the checksum. This bit is valid only when</div><div class='add'>+	 *    l3_proto_idx indicates IPv4 packet</div><div class='add'>+	 * 14 : l4_csum_err - when set, either the L4</div><div class='add'>+	 *    checksum error detected, or, the controller didn't</div><div class='add'>+	 *    validate the checksum. This bit is valid only when</div><div class='add'>+	 *    l4_proto_idx indicates TCP/UDP packet, and,</div><div class='add'>+	 *    ipv4_frag is not set. This bit is valid only when</div><div class='add'>+	 *    l4_csum_checked below is set.</div><div class='add'>+	 * 15 : ipv4_frag - Indicates IPv4 fragmented packet</div><div class='add'>+	 * 16 : l4_csum_checked - L4 checksum was verified</div><div class='add'>+	 *    (could be OK or error), when cleared the status of</div><div class='add'>+	 *    checksum is unknown</div><div class='add'>+	 * 23:17 : reserved17 - MBZ</div><div class='add'>+	 * 24 : phase</div><div class='add'>+	 * 25 : l3_csum2 - second checksum engine result</div><div class='add'>+	 * 26 : first - Indicates first descriptor in</div><div class='add'>+	 *    transaction</div><div class='add'>+	 * 27 : last - Indicates last descriptor in</div><div class='add'>+	 *    transaction</div><div class='add'>+	 * 29:28 : reserved28</div><div class='add'>+	 * 30 : buffer - 0: Metadata descriptor. 1: Buffer</div><div class='add'>+	 *    Descriptor was used</div><div class='add'>+	 * 31 : reserved31</div><div class='add'>+	 */</div><div class='add'>+	u32 status;</div><div class='add'>+</div><div class='add'>+	u16 length;</div><div class='add'>+</div><div class='add'>+	u16 req_id;</div><div class='add'>+</div><div class='add'>+	/* 32-bit hash result */</div><div class='add'>+	u32 hash;</div><div class='add'>+</div><div class='add'>+	u16 sub_qid;</div><div class='add'>+</div><div class='add'>+	u8 offset;</div><div class='add'>+</div><div class='add'>+	u8 reserved;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* 8-word format */</div><div class='add'>+struct ena_eth_io_rx_cdesc_ext {</div><div class='add'>+	struct ena_eth_io_rx_cdesc_base base;</div><div class='add'>+</div><div class='add'>+	u32 buff_addr_lo;</div><div class='add'>+</div><div class='add'>+	u16 buff_addr_hi;</div><div class='add'>+</div><div class='add'>+	u16 reserved16;</div><div class='add'>+</div><div class='add'>+	u32 reserved_w6;</div><div class='add'>+</div><div class='add'>+	u32 reserved_w7;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_eth_io_intr_reg {</div><div class='add'>+	/* 14:0 : rx_intr_delay</div><div class='add'>+	 * 29:15 : tx_intr_delay</div><div class='add'>+	 * 30 : intr_unmask</div><div class='add'>+	 * 31 : reserved</div><div class='add'>+	 */</div><div class='add'>+	u32 intr_control;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_eth_io_numa_node_cfg_reg {</div><div class='add'>+	/* 7:0 : numa</div><div class='add'>+	 * 30:8 : reserved</div><div class='add'>+	 * 31 : enabled</div><div class='add'>+	 */</div><div class='add'>+	u32 numa_cfg;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* tx_desc */</div><div class='add'>+#define ENA_ETH_IO_TX_DESC_LENGTH_MASK                      GENMASK(15, 0)</div><div class='add'>+#define ENA_ETH_IO_TX_DESC_REQ_ID_HI_SHIFT                  16</div><div class='add'>+#define ENA_ETH_IO_TX_DESC_REQ_ID_HI_MASK                   GENMASK(21, 16)</div><div class='add'>+#define ENA_ETH_IO_TX_DESC_META_DESC_SHIFT                  23</div><div class='add'>+#define ENA_ETH_IO_TX_DESC_META_DESC_MASK                   BIT(23)</div><div class='add'>+#define ENA_ETH_IO_TX_DESC_PHASE_SHIFT                      24</div><div class='add'>+#define ENA_ETH_IO_TX_DESC_PHASE_MASK                       BIT(24)</div><div class='add'>+#define ENA_ETH_IO_TX_DESC_FIRST_SHIFT                      26</div><div class='add'>+#define ENA_ETH_IO_TX_DESC_FIRST_MASK                       BIT(26)</div><div class='add'>+#define ENA_ETH_IO_TX_DESC_LAST_SHIFT                       27</div><div class='add'>+#define ENA_ETH_IO_TX_DESC_LAST_MASK                        BIT(27)</div><div class='add'>+#define ENA_ETH_IO_TX_DESC_COMP_REQ_SHIFT                   28</div><div class='add'>+#define ENA_ETH_IO_TX_DESC_COMP_REQ_MASK                    BIT(28)</div><div class='add'>+#define ENA_ETH_IO_TX_DESC_L3_PROTO_IDX_MASK                GENMASK(3, 0)</div><div class='add'>+#define ENA_ETH_IO_TX_DESC_DF_SHIFT                         4</div><div class='add'>+#define ENA_ETH_IO_TX_DESC_DF_MASK                          BIT(4)</div><div class='add'>+#define ENA_ETH_IO_TX_DESC_TSO_EN_SHIFT                     7</div><div class='add'>+#define ENA_ETH_IO_TX_DESC_TSO_EN_MASK                      BIT(7)</div><div class='add'>+#define ENA_ETH_IO_TX_DESC_L4_PROTO_IDX_SHIFT               8</div><div class='add'>+#define ENA_ETH_IO_TX_DESC_L4_PROTO_IDX_MASK                GENMASK(12, 8)</div><div class='add'>+#define ENA_ETH_IO_TX_DESC_L3_CSUM_EN_SHIFT                 13</div><div class='add'>+#define ENA_ETH_IO_TX_DESC_L3_CSUM_EN_MASK                  BIT(13)</div><div class='add'>+#define ENA_ETH_IO_TX_DESC_L4_CSUM_EN_SHIFT                 14</div><div class='add'>+#define ENA_ETH_IO_TX_DESC_L4_CSUM_EN_MASK                  BIT(14)</div><div class='add'>+#define ENA_ETH_IO_TX_DESC_ETHERNET_FCS_DIS_SHIFT           15</div><div class='add'>+#define ENA_ETH_IO_TX_DESC_ETHERNET_FCS_DIS_MASK            BIT(15)</div><div class='add'>+#define ENA_ETH_IO_TX_DESC_L4_CSUM_PARTIAL_SHIFT            17</div><div class='add'>+#define ENA_ETH_IO_TX_DESC_L4_CSUM_PARTIAL_MASK             BIT(17)</div><div class='add'>+#define ENA_ETH_IO_TX_DESC_REQ_ID_LO_SHIFT                  22</div><div class='add'>+#define ENA_ETH_IO_TX_DESC_REQ_ID_LO_MASK                   GENMASK(31, 22)</div><div class='add'>+#define ENA_ETH_IO_TX_DESC_ADDR_HI_MASK                     GENMASK(15, 0)</div><div class='add'>+#define ENA_ETH_IO_TX_DESC_HEADER_LENGTH_SHIFT              24</div><div class='add'>+#define ENA_ETH_IO_TX_DESC_HEADER_LENGTH_MASK               GENMASK(31, 24)</div><div class='add'>+</div><div class='add'>+/* tx_meta_desc */</div><div class='add'>+#define ENA_ETH_IO_TX_META_DESC_REQ_ID_LO_MASK              GENMASK(9, 0)</div><div class='add'>+#define ENA_ETH_IO_TX_META_DESC_EXT_VALID_SHIFT             14</div><div class='add'>+#define ENA_ETH_IO_TX_META_DESC_EXT_VALID_MASK              BIT(14)</div><div class='add'>+#define ENA_ETH_IO_TX_META_DESC_MSS_HI_SHIFT                16</div><div class='add'>+#define ENA_ETH_IO_TX_META_DESC_MSS_HI_MASK                 GENMASK(19, 16)</div><div class='add'>+#define ENA_ETH_IO_TX_META_DESC_ETH_META_TYPE_SHIFT         20</div><div class='add'>+#define ENA_ETH_IO_TX_META_DESC_ETH_META_TYPE_MASK          BIT(20)</div><div class='add'>+#define ENA_ETH_IO_TX_META_DESC_META_STORE_SHIFT            21</div><div class='add'>+#define ENA_ETH_IO_TX_META_DESC_META_STORE_MASK             BIT(21)</div><div class='add'>+#define ENA_ETH_IO_TX_META_DESC_META_DESC_SHIFT             23</div><div class='add'>+#define ENA_ETH_IO_TX_META_DESC_META_DESC_MASK              BIT(23)</div><div class='add'>+#define ENA_ETH_IO_TX_META_DESC_PHASE_SHIFT                 24</div><div class='add'>+#define ENA_ETH_IO_TX_META_DESC_PHASE_MASK                  BIT(24)</div><div class='add'>+#define ENA_ETH_IO_TX_META_DESC_FIRST_SHIFT                 26</div><div class='add'>+#define ENA_ETH_IO_TX_META_DESC_FIRST_MASK                  BIT(26)</div><div class='add'>+#define ENA_ETH_IO_TX_META_DESC_LAST_SHIFT                  27</div><div class='add'>+#define ENA_ETH_IO_TX_META_DESC_LAST_MASK                   BIT(27)</div><div class='add'>+#define ENA_ETH_IO_TX_META_DESC_COMP_REQ_SHIFT              28</div><div class='add'>+#define ENA_ETH_IO_TX_META_DESC_COMP_REQ_MASK               BIT(28)</div><div class='add'>+#define ENA_ETH_IO_TX_META_DESC_REQ_ID_HI_MASK              GENMASK(5, 0)</div><div class='add'>+#define ENA_ETH_IO_TX_META_DESC_L3_HDR_LEN_MASK             GENMASK(7, 0)</div><div class='add'>+#define ENA_ETH_IO_TX_META_DESC_L3_HDR_OFF_SHIFT            8</div><div class='add'>+#define ENA_ETH_IO_TX_META_DESC_L3_HDR_OFF_MASK             GENMASK(15, 8)</div><div class='add'>+#define ENA_ETH_IO_TX_META_DESC_L4_HDR_LEN_IN_WORDS_SHIFT   16</div><div class='add'>+#define ENA_ETH_IO_TX_META_DESC_L4_HDR_LEN_IN_WORDS_MASK    GENMASK(21, 16)</div><div class='add'>+#define ENA_ETH_IO_TX_META_DESC_MSS_LO_SHIFT                22</div><div class='add'>+#define ENA_ETH_IO_TX_META_DESC_MSS_LO_MASK                 GENMASK(31, 22)</div><div class='add'>+</div><div class='add'>+/* tx_cdesc */</div><div class='add'>+#define ENA_ETH_IO_TX_CDESC_PHASE_MASK                      BIT(0)</div><div class='add'>+</div><div class='add'>+/* rx_desc */</div><div class='add'>+#define ENA_ETH_IO_RX_DESC_PHASE_MASK                       BIT(0)</div><div class='add'>+#define ENA_ETH_IO_RX_DESC_FIRST_SHIFT                      2</div><div class='add'>+#define ENA_ETH_IO_RX_DESC_FIRST_MASK                       BIT(2)</div><div class='add'>+#define ENA_ETH_IO_RX_DESC_LAST_SHIFT                       3</div><div class='add'>+#define ENA_ETH_IO_RX_DESC_LAST_MASK                        BIT(3)</div><div class='add'>+#define ENA_ETH_IO_RX_DESC_COMP_REQ_SHIFT                   4</div><div class='add'>+#define ENA_ETH_IO_RX_DESC_COMP_REQ_MASK                    BIT(4)</div><div class='add'>+</div><div class='add'>+/* rx_cdesc_base */</div><div class='add'>+#define ENA_ETH_IO_RX_CDESC_BASE_L3_PROTO_IDX_MASK          GENMASK(4, 0)</div><div class='add'>+#define ENA_ETH_IO_RX_CDESC_BASE_SRC_VLAN_CNT_SHIFT         5</div><div class='add'>+#define ENA_ETH_IO_RX_CDESC_BASE_SRC_VLAN_CNT_MASK          GENMASK(6, 5)</div><div class='add'>+#define ENA_ETH_IO_RX_CDESC_BASE_L4_PROTO_IDX_SHIFT         8</div><div class='add'>+#define ENA_ETH_IO_RX_CDESC_BASE_L4_PROTO_IDX_MASK          GENMASK(12, 8)</div><div class='add'>+#define ENA_ETH_IO_RX_CDESC_BASE_L3_CSUM_ERR_SHIFT          13</div><div class='add'>+#define ENA_ETH_IO_RX_CDESC_BASE_L3_CSUM_ERR_MASK           BIT(13)</div><div class='add'>+#define ENA_ETH_IO_RX_CDESC_BASE_L4_CSUM_ERR_SHIFT          14</div><div class='add'>+#define ENA_ETH_IO_RX_CDESC_BASE_L4_CSUM_ERR_MASK           BIT(14)</div><div class='add'>+#define ENA_ETH_IO_RX_CDESC_BASE_IPV4_FRAG_SHIFT            15</div><div class='add'>+#define ENA_ETH_IO_RX_CDESC_BASE_IPV4_FRAG_MASK             BIT(15)</div><div class='add'>+#define ENA_ETH_IO_RX_CDESC_BASE_L4_CSUM_CHECKED_SHIFT      16</div><div class='add'>+#define ENA_ETH_IO_RX_CDESC_BASE_L4_CSUM_CHECKED_MASK       BIT(16)</div><div class='add'>+#define ENA_ETH_IO_RX_CDESC_BASE_PHASE_SHIFT                24</div><div class='add'>+#define ENA_ETH_IO_RX_CDESC_BASE_PHASE_MASK                 BIT(24)</div><div class='add'>+#define ENA_ETH_IO_RX_CDESC_BASE_L3_CSUM2_SHIFT             25</div><div class='add'>+#define ENA_ETH_IO_RX_CDESC_BASE_L3_CSUM2_MASK              BIT(25)</div><div class='add'>+#define ENA_ETH_IO_RX_CDESC_BASE_FIRST_SHIFT                26</div><div class='add'>+#define ENA_ETH_IO_RX_CDESC_BASE_FIRST_MASK                 BIT(26)</div><div class='add'>+#define ENA_ETH_IO_RX_CDESC_BASE_LAST_SHIFT                 27</div><div class='add'>+#define ENA_ETH_IO_RX_CDESC_BASE_LAST_MASK                  BIT(27)</div><div class='add'>+#define ENA_ETH_IO_RX_CDESC_BASE_BUFFER_SHIFT               30</div><div class='add'>+#define ENA_ETH_IO_RX_CDESC_BASE_BUFFER_MASK                BIT(30)</div><div class='add'>+</div><div class='add'>+/* intr_reg */</div><div class='add'>+#define ENA_ETH_IO_INTR_REG_RX_INTR_DELAY_MASK              GENMASK(14, 0)</div><div class='add'>+#define ENA_ETH_IO_INTR_REG_TX_INTR_DELAY_SHIFT             15</div><div class='add'>+#define ENA_ETH_IO_INTR_REG_TX_INTR_DELAY_MASK              GENMASK(29, 15)</div><div class='add'>+#define ENA_ETH_IO_INTR_REG_INTR_UNMASK_SHIFT               30</div><div class='add'>+#define ENA_ETH_IO_INTR_REG_INTR_UNMASK_MASK                BIT(30)</div><div class='add'>+</div><div class='add'>+/* numa_node_cfg_reg */</div><div class='add'>+#define ENA_ETH_IO_NUMA_NODE_CFG_REG_NUMA_MASK              GENMASK(7, 0)</div><div class='add'>+#define ENA_ETH_IO_NUMA_NODE_CFG_REG_ENABLED_SHIFT          31</div><div class='add'>+#define ENA_ETH_IO_NUMA_NODE_CFG_REG_ENABLED_MASK           BIT(31)</div><div class='add'>+</div><div class='add'>+#endif /* _ENA_ETH_IO_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/amazon/ena/ena_ethtool.c b/drivers/net/ethernet/amazon/ena/ena_ethtool.c<br/>new file mode 100644<br/>index 000000000000..fe3479b84a1f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amazon/ena/ena_ethtool.c</a></div><div class='hunk'>@@ -0,0 +1,1180 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015-2020 Amazon.com, Inc. or its affiliates. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/net_tstamp.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ena_netdev.h"</div><div class='add'>+#include "ena_xdp.h"</div><div class='add'>+#include "ena_phc.h"</div><div class='add'>+</div><div class='add'>+struct ena_stats {</div><div class='add'>+	char name[ETH_GSTRING_LEN];</div><div class='add'>+	int stat_offset;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_hw_metrics {</div><div class='add'>+	char name[ETH_GSTRING_LEN];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ENA_STAT_ENA_COM_ENTRY(stat) { \</div><div class='add'>+	.name = #stat, \</div><div class='add'>+	.stat_offset = offsetof(struct ena_com_stats_admin, stat) / sizeof(u64) \</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define ENA_STAT_ENTRY(stat, stat_type) { \</div><div class='add'>+	.name = #stat, \</div><div class='add'>+	.stat_offset = offsetof(struct ena_stats_##stat_type, stat) / sizeof(u64) \</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define ENA_STAT_HW_ENTRY(stat, stat_type) { \</div><div class='add'>+	.name = #stat, \</div><div class='add'>+	.stat_offset = offsetof(struct ena_admin_##stat_type, stat) / sizeof(u64) \</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define ENA_STAT_RX_ENTRY(stat) \</div><div class='add'>+	ENA_STAT_ENTRY(stat, rx)</div><div class='add'>+</div><div class='add'>+#define ENA_STAT_TX_ENTRY(stat) \</div><div class='add'>+	ENA_STAT_ENTRY(stat, tx)</div><div class='add'>+</div><div class='add'>+#define ENA_STAT_GLOBAL_ENTRY(stat) \</div><div class='add'>+	ENA_STAT_ENTRY(stat, dev)</div><div class='add'>+</div><div class='add'>+#define ENA_STAT_ENI_ENTRY(stat) \</div><div class='add'>+	ENA_STAT_HW_ENTRY(stat, eni_stats)</div><div class='add'>+</div><div class='add'>+#define ENA_STAT_ENA_SRD_ENTRY(stat) \</div><div class='add'>+	ENA_STAT_HW_ENTRY(stat, ena_srd_stats)</div><div class='add'>+</div><div class='add'>+#define ENA_STAT_ENA_SRD_MODE_ENTRY(stat) { \</div><div class='add'>+	.name = #stat, \</div><div class='add'>+	.stat_offset = offsetof(struct ena_admin_ena_srd_info, flags) / sizeof(u64) \</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define ENA_METRIC_ENI_ENTRY(stat) { \</div><div class='add'>+	.name = #stat \</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ena_stats ena_stats_global_strings[] = {</div><div class='add'>+	ENA_STAT_GLOBAL_ENTRY(tx_timeout),</div><div class='add'>+	ENA_STAT_GLOBAL_ENTRY(suspend),</div><div class='add'>+	ENA_STAT_GLOBAL_ENTRY(resume),</div><div class='add'>+	ENA_STAT_GLOBAL_ENTRY(wd_expired),</div><div class='add'>+	ENA_STAT_GLOBAL_ENTRY(interface_up),</div><div class='add'>+	ENA_STAT_GLOBAL_ENTRY(interface_down),</div><div class='add'>+	ENA_STAT_GLOBAL_ENTRY(admin_q_pause),</div><div class='add'>+	ENA_STAT_GLOBAL_ENTRY(reset_fail),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* A partial list of hw stats. Used when admin command</div><div class='add'>+ * with type ENA_ADMIN_GET_STATS_TYPE_CUSTOMER_METRICS is not supported</div><div class='add'>+ */</div><div class='add'>+static const struct ena_stats ena_stats_eni_strings[] = {</div><div class='add'>+	ENA_STAT_ENI_ENTRY(bw_in_allowance_exceeded),</div><div class='add'>+	ENA_STAT_ENI_ENTRY(bw_out_allowance_exceeded),</div><div class='add'>+	ENA_STAT_ENI_ENTRY(pps_allowance_exceeded),</div><div class='add'>+	ENA_STAT_ENI_ENTRY(conntrack_allowance_exceeded),</div><div class='add'>+	ENA_STAT_ENI_ENTRY(linklocal_allowance_exceeded),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ena_hw_metrics ena_hw_stats_strings[] = {</div><div class='add'>+	ENA_METRIC_ENI_ENTRY(bw_in_allowance_exceeded),</div><div class='add'>+	ENA_METRIC_ENI_ENTRY(bw_out_allowance_exceeded),</div><div class='add'>+	ENA_METRIC_ENI_ENTRY(pps_allowance_exceeded),</div><div class='add'>+	ENA_METRIC_ENI_ENTRY(conntrack_allowance_exceeded),</div><div class='add'>+	ENA_METRIC_ENI_ENTRY(linklocal_allowance_exceeded),</div><div class='add'>+	ENA_METRIC_ENI_ENTRY(conntrack_allowance_available),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ena_stats ena_srd_info_strings[] = {</div><div class='add'>+	ENA_STAT_ENA_SRD_MODE_ENTRY(ena_srd_mode),</div><div class='add'>+	ENA_STAT_ENA_SRD_ENTRY(ena_srd_tx_pkts),</div><div class='add'>+	ENA_STAT_ENA_SRD_ENTRY(ena_srd_eligible_tx_pkts),</div><div class='add'>+	ENA_STAT_ENA_SRD_ENTRY(ena_srd_rx_pkts),</div><div class='add'>+	ENA_STAT_ENA_SRD_ENTRY(ena_srd_resource_utilization)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ena_stats ena_stats_tx_strings[] = {</div><div class='add'>+	ENA_STAT_TX_ENTRY(cnt),</div><div class='add'>+	ENA_STAT_TX_ENTRY(bytes),</div><div class='add'>+	ENA_STAT_TX_ENTRY(queue_stop),</div><div class='add'>+	ENA_STAT_TX_ENTRY(queue_wakeup),</div><div class='add'>+	ENA_STAT_TX_ENTRY(dma_mapping_err),</div><div class='add'>+	ENA_STAT_TX_ENTRY(linearize),</div><div class='add'>+	ENA_STAT_TX_ENTRY(linearize_failed),</div><div class='add'>+	ENA_STAT_TX_ENTRY(napi_comp),</div><div class='add'>+	ENA_STAT_TX_ENTRY(tx_poll),</div><div class='add'>+	ENA_STAT_TX_ENTRY(doorbells),</div><div class='add'>+	ENA_STAT_TX_ENTRY(prepare_ctx_err),</div><div class='add'>+	ENA_STAT_TX_ENTRY(bad_req_id),</div><div class='add'>+	ENA_STAT_TX_ENTRY(llq_buffer_copy),</div><div class='add'>+	ENA_STAT_TX_ENTRY(missed_tx),</div><div class='add'>+	ENA_STAT_TX_ENTRY(unmask_interrupt),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ena_stats ena_stats_rx_strings[] = {</div><div class='add'>+	ENA_STAT_RX_ENTRY(cnt),</div><div class='add'>+	ENA_STAT_RX_ENTRY(bytes),</div><div class='add'>+	ENA_STAT_RX_ENTRY(rx_copybreak_pkt),</div><div class='add'>+	ENA_STAT_RX_ENTRY(csum_good),</div><div class='add'>+	ENA_STAT_RX_ENTRY(refil_partial),</div><div class='add'>+	ENA_STAT_RX_ENTRY(csum_bad),</div><div class='add'>+	ENA_STAT_RX_ENTRY(page_alloc_fail),</div><div class='add'>+	ENA_STAT_RX_ENTRY(skb_alloc_fail),</div><div class='add'>+	ENA_STAT_RX_ENTRY(dma_mapping_err),</div><div class='add'>+	ENA_STAT_RX_ENTRY(bad_desc_num),</div><div class='add'>+	ENA_STAT_RX_ENTRY(bad_req_id),</div><div class='add'>+	ENA_STAT_RX_ENTRY(empty_rx_ring),</div><div class='add'>+	ENA_STAT_RX_ENTRY(csum_unchecked),</div><div class='add'>+	ENA_STAT_RX_ENTRY(xdp_aborted),</div><div class='add'>+	ENA_STAT_RX_ENTRY(xdp_drop),</div><div class='add'>+	ENA_STAT_RX_ENTRY(xdp_pass),</div><div class='add'>+	ENA_STAT_RX_ENTRY(xdp_tx),</div><div class='add'>+	ENA_STAT_RX_ENTRY(xdp_invalid),</div><div class='add'>+	ENA_STAT_RX_ENTRY(xdp_redirect),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct ena_stats ena_stats_ena_com_strings[] = {</div><div class='add'>+	ENA_STAT_ENA_COM_ENTRY(aborted_cmd),</div><div class='add'>+	ENA_STAT_ENA_COM_ENTRY(submitted_cmd),</div><div class='add'>+	ENA_STAT_ENA_COM_ENTRY(completed_cmd),</div><div class='add'>+	ENA_STAT_ENA_COM_ENTRY(out_of_space),</div><div class='add'>+	ENA_STAT_ENA_COM_ENTRY(no_completion),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ENA_STATS_ARRAY_GLOBAL		ARRAY_SIZE(ena_stats_global_strings)</div><div class='add'>+#define ENA_STATS_ARRAY_TX		ARRAY_SIZE(ena_stats_tx_strings)</div><div class='add'>+#define ENA_STATS_ARRAY_RX		ARRAY_SIZE(ena_stats_rx_strings)</div><div class='add'>+#define ENA_STATS_ARRAY_ENA_COM		ARRAY_SIZE(ena_stats_ena_com_strings)</div><div class='add'>+#define ENA_STATS_ARRAY_ENI		ARRAY_SIZE(ena_stats_eni_strings)</div><div class='add'>+#define ENA_STATS_ARRAY_ENA_SRD		ARRAY_SIZE(ena_srd_info_strings)</div><div class='add'>+#define ENA_METRICS_ARRAY_ENI		ARRAY_SIZE(ena_hw_stats_strings)</div><div class='add'>+</div><div class='add'>+static void ena_safe_update_stat(u64 *src, u64 *dst,</div><div class='add'>+				 struct u64_stats_sync *syncp)</div><div class='add'>+{</div><div class='add'>+	unsigned int start;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		start = u64_stats_fetch_begin(syncp);</div><div class='add'>+		*(dst) = *src;</div><div class='add'>+	} while (u64_stats_fetch_retry(syncp, start));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_metrics_stats(struct ena_adapter *adapter, u64 **data)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_dev *dev = adapter-&gt;ena_dev;</div><div class='add'>+	const struct ena_stats *ena_stats;</div><div class='add'>+	u64 *ptr;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (ena_com_get_cap(dev, ENA_ADMIN_CUSTOMER_METRICS)) {</div><div class='add'>+		u32 supported_metrics_count;</div><div class='add'>+		int len;</div><div class='add'>+</div><div class='add'>+		supported_metrics_count = ena_com_get_customer_metric_count(dev);</div><div class='add'>+		len = supported_metrics_count * sizeof(u64);</div><div class='add'>+</div><div class='add'>+		/* Fill the data buffer, and advance its pointer */</div><div class='add'>+		ena_com_get_customer_metrics(dev, (char *)(*data), len);</div><div class='add'>+		(*data) += supported_metrics_count;</div><div class='add'>+</div><div class='add'>+	} else if (ena_com_get_cap(dev, ENA_ADMIN_ENI_STATS)) {</div><div class='add'>+		ena_com_get_eni_stats(dev, &amp;adapter-&gt;eni_stats);</div><div class='add'>+		/* Updating regardless of rc - once we told ethtool how many stats we have</div><div class='add'>+		 * it will print that much stats. We can't leave holes in the stats</div><div class='add'>+		 */</div><div class='add'>+		for (i = 0; i &lt; ENA_STATS_ARRAY_ENI; i++) {</div><div class='add'>+			ena_stats = &amp;ena_stats_eni_strings[i];</div><div class='add'>+</div><div class='add'>+			ptr = (u64 *)&amp;adapter-&gt;eni_stats +</div><div class='add'>+				ena_stats-&gt;stat_offset;</div><div class='add'>+</div><div class='add'>+			ena_safe_update_stat(ptr, (*data)++, &amp;adapter-&gt;syncp);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ena_com_get_cap(dev, ENA_ADMIN_ENA_SRD_INFO)) {</div><div class='add'>+		ena_com_get_ena_srd_info(dev, &amp;adapter-&gt;ena_srd_info);</div><div class='add'>+		/* Get ENA SRD mode */</div><div class='add'>+		ptr = (u64 *)&amp;adapter-&gt;ena_srd_info;</div><div class='add'>+		ena_safe_update_stat(ptr, (*data)++, &amp;adapter-&gt;syncp);</div><div class='add'>+		for (i = 1; i &lt; ENA_STATS_ARRAY_ENA_SRD; i++) {</div><div class='add'>+			ena_stats = &amp;ena_srd_info_strings[i];</div><div class='add'>+			/* Wrapped within an outer struct - need to accommodate an</div><div class='add'>+			 * additional offset of the ENA SRD mode that was already processed</div><div class='add'>+			 */</div><div class='add'>+			ptr = (u64 *)&amp;adapter-&gt;ena_srd_info +</div><div class='add'>+				ena_stats-&gt;stat_offset + 1;</div><div class='add'>+</div><div class='add'>+			ena_safe_update_stat(ptr, (*data)++, &amp;adapter-&gt;syncp);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_queue_stats(struct ena_adapter *adapter, u64 **data)</div><div class='add'>+{</div><div class='add'>+	const struct ena_stats *ena_stats;</div><div class='add'>+	struct ena_ring *ring;</div><div class='add'>+</div><div class='add'>+	u64 *ptr;</div><div class='add'>+	int i, j;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; adapter-&gt;num_io_queues + adapter-&gt;xdp_num_queues; i++) {</div><div class='add'>+		/* Tx stats */</div><div class='add'>+		ring = &amp;adapter-&gt;tx_ring[i];</div><div class='add'>+</div><div class='add'>+		for (j = 0; j &lt; ENA_STATS_ARRAY_TX; j++) {</div><div class='add'>+			ena_stats = &amp;ena_stats_tx_strings[j];</div><div class='add'>+</div><div class='add'>+			ptr = (u64 *)&amp;ring-&gt;tx_stats + ena_stats-&gt;stat_offset;</div><div class='add'>+</div><div class='add'>+			ena_safe_update_stat(ptr, (*data)++, &amp;ring-&gt;syncp);</div><div class='add'>+		}</div><div class='add'>+		/* XDP TX queues don't have a RX queue counterpart */</div><div class='add'>+		if (!ENA_IS_XDP_INDEX(adapter, i)) {</div><div class='add'>+			/* Rx stats */</div><div class='add'>+			ring = &amp;adapter-&gt;rx_ring[i];</div><div class='add'>+</div><div class='add'>+			for (j = 0; j &lt; ENA_STATS_ARRAY_RX; j++) {</div><div class='add'>+				ena_stats = &amp;ena_stats_rx_strings[j];</div><div class='add'>+</div><div class='add'>+				ptr = (u64 *)&amp;ring-&gt;rx_stats +</div><div class='add'>+					ena_stats-&gt;stat_offset;</div><div class='add'>+</div><div class='add'>+				ena_safe_update_stat(ptr, (*data)++, &amp;ring-&gt;syncp);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_dev_admin_queue_stats(struct ena_adapter *adapter, u64 **data)</div><div class='add'>+{</div><div class='add'>+	const struct ena_stats *ena_stats;</div><div class='add'>+	u64 *ptr;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ENA_STATS_ARRAY_ENA_COM; i++) {</div><div class='add'>+		ena_stats = &amp;ena_stats_ena_com_strings[i];</div><div class='add'>+</div><div class='add'>+		ptr = (u64 *)&amp;adapter-&gt;ena_dev-&gt;admin_queue.stats +</div><div class='add'>+			ena_stats-&gt;stat_offset;</div><div class='add'>+</div><div class='add'>+		*(*data)++ = *ptr;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_get_stats(struct ena_adapter *adapter,</div><div class='add'>+			  u64 *data,</div><div class='add'>+			  bool hw_stats_needed)</div><div class='add'>+{</div><div class='add'>+	const struct ena_stats *ena_stats;</div><div class='add'>+	u64 *ptr;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ENA_STATS_ARRAY_GLOBAL; i++) {</div><div class='add'>+		ena_stats = &amp;ena_stats_global_strings[i];</div><div class='add'>+</div><div class='add'>+		ptr = (u64 *)&amp;adapter-&gt;dev_stats + ena_stats-&gt;stat_offset;</div><div class='add'>+</div><div class='add'>+		ena_safe_update_stat(ptr, data++, &amp;adapter-&gt;syncp);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (hw_stats_needed)</div><div class='add'>+		ena_metrics_stats(adapter, &amp;data);</div><div class='add'>+</div><div class='add'>+	ena_queue_stats(adapter, &amp;data);</div><div class='add'>+	ena_dev_admin_queue_stats(adapter, &amp;data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_get_ethtool_stats(struct net_device *netdev,</div><div class='add'>+				  struct ethtool_stats *stats,</div><div class='add'>+				  u64 *data)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	ena_get_stats(adapter, data, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_get_ts_info(struct net_device *netdev,</div><div class='add'>+			   struct kernel_ethtool_ts_info *info)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	info-&gt;so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE;</div><div class='add'>+</div><div class='add'>+	info-&gt;phc_index = ena_phc_get_index(adapter);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_get_sw_stats_count(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	return adapter-&gt;num_io_queues * (ENA_STATS_ARRAY_TX + ENA_STATS_ARRAY_RX)</div><div class='add'>+		+ adapter-&gt;xdp_num_queues * ENA_STATS_ARRAY_TX</div><div class='add'>+		+ ENA_STATS_ARRAY_GLOBAL + ENA_STATS_ARRAY_ENA_COM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_get_hw_stats_count(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_dev *dev = adapter-&gt;ena_dev;</div><div class='add'>+	int count;</div><div class='add'>+</div><div class='add'>+	count = ENA_STATS_ARRAY_ENA_SRD * ena_com_get_cap(dev, ENA_ADMIN_ENA_SRD_INFO);</div><div class='add'>+</div><div class='add'>+	if (ena_com_get_cap(dev, ENA_ADMIN_CUSTOMER_METRICS))</div><div class='add'>+		count += ena_com_get_customer_metric_count(dev);</div><div class='add'>+	else if (ena_com_get_cap(dev, ENA_ADMIN_ENI_STATS))</div><div class='add'>+		count += ENA_STATS_ARRAY_ENI;</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_get_sset_count(struct net_device *netdev, int sset)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	switch (sset) {</div><div class='add'>+	case ETH_SS_STATS:</div><div class='add'>+		return ena_get_sw_stats_count(adapter) +</div><div class='add'>+		       ena_get_hw_stats_count(adapter);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_metrics_stats_strings(struct ena_adapter *adapter, u8 **data)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_dev *dev = adapter-&gt;ena_dev;</div><div class='add'>+	const struct ena_hw_metrics *ena_metrics;</div><div class='add'>+	const struct ena_stats *ena_stats;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (ena_com_get_cap(dev, ENA_ADMIN_CUSTOMER_METRICS)) {</div><div class='add'>+		for (i = 0; i &lt; ENA_METRICS_ARRAY_ENI; i++) {</div><div class='add'>+			if (ena_com_get_customer_metric_support(dev, i)) {</div><div class='add'>+				ena_metrics = &amp;ena_hw_stats_strings[i];</div><div class='add'>+				ethtool_puts(data, ena_metrics-&gt;name);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	} else if (ena_com_get_cap(dev, ENA_ADMIN_ENI_STATS)) {</div><div class='add'>+		for (i = 0; i &lt; ENA_STATS_ARRAY_ENI; i++) {</div><div class='add'>+			ena_stats = &amp;ena_stats_eni_strings[i];</div><div class='add'>+			ethtool_puts(data, ena_stats-&gt;name);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ena_com_get_cap(dev, ENA_ADMIN_ENA_SRD_INFO)) {</div><div class='add'>+		for (i = 0; i &lt; ENA_STATS_ARRAY_ENA_SRD; i++) {</div><div class='add'>+			ena_stats = &amp;ena_srd_info_strings[i];</div><div class='add'>+			ethtool_puts(data, ena_stats-&gt;name);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_queue_strings(struct ena_adapter *adapter, u8 **data)</div><div class='add'>+{</div><div class='add'>+	const struct ena_stats *ena_stats;</div><div class='add'>+	bool is_xdp;</div><div class='add'>+	int i, j;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; adapter-&gt;num_io_queues + adapter-&gt;xdp_num_queues; i++) {</div><div class='add'>+		is_xdp = ENA_IS_XDP_INDEX(adapter, i);</div><div class='add'>+		/* Tx stats */</div><div class='add'>+		for (j = 0; j &lt; ENA_STATS_ARRAY_TX; j++) {</div><div class='add'>+			ena_stats = &amp;ena_stats_tx_strings[j];</div><div class='add'>+</div><div class='add'>+			ethtool_sprintf(data,</div><div class='add'>+					"queue_%u_%s_%s", i,</div><div class='add'>+					is_xdp ? "xdp_tx" : "tx",</div><div class='add'>+					ena_stats-&gt;name);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* In XDP there isn't an RX queue counterpart */</div><div class='add'>+		if (is_xdp)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		for (j = 0; j &lt; ENA_STATS_ARRAY_RX; j++) {</div><div class='add'>+			ena_stats = &amp;ena_stats_rx_strings[j];</div><div class='add'>+</div><div class='add'>+			ethtool_sprintf(data, "queue_%u_rx_%s", i, ena_stats-&gt;name);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_com_dev_strings(u8 **data)</div><div class='add'>+{</div><div class='add'>+	const struct ena_stats *ena_stats;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ENA_STATS_ARRAY_ENA_COM; i++) {</div><div class='add'>+		ena_stats = &amp;ena_stats_ena_com_strings[i];</div><div class='add'>+</div><div class='add'>+		ethtool_sprintf(data,</div><div class='add'>+				"ena_admin_q_%s", ena_stats-&gt;name);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_get_strings(struct ena_adapter *adapter,</div><div class='add'>+			    u8 *data,</div><div class='add'>+			    bool hw_stats_needed)</div><div class='add'>+{</div><div class='add'>+	const struct ena_stats *ena_stats;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ENA_STATS_ARRAY_GLOBAL; i++) {</div><div class='add'>+		ena_stats = &amp;ena_stats_global_strings[i];</div><div class='add'>+		ethtool_puts(&amp;data, ena_stats-&gt;name);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (hw_stats_needed)</div><div class='add'>+		ena_metrics_stats_strings(adapter, &amp;data);</div><div class='add'>+</div><div class='add'>+	ena_queue_strings(adapter, &amp;data);</div><div class='add'>+	ena_com_dev_strings(&amp;data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_get_ethtool_strings(struct net_device *netdev,</div><div class='add'>+				    u32 sset,</div><div class='add'>+				    u8 *data)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	switch (sset) {</div><div class='add'>+	case ETH_SS_STATS:</div><div class='add'>+		ena_get_strings(adapter, data, true);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_get_link_ksettings(struct net_device *netdev,</div><div class='add'>+				  struct ethtool_link_ksettings *link_ksettings)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ena_com_dev *ena_dev = adapter-&gt;ena_dev;</div><div class='add'>+	struct ena_admin_get_feature_link_desc *link;</div><div class='add'>+	struct ena_admin_get_feat_resp feat_resp;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = ena_com_get_link_params(ena_dev, &amp;feat_resp);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	link = &amp;feat_resp.u.link;</div><div class='add'>+	link_ksettings-&gt;base.speed = link-&gt;speed;</div><div class='add'>+</div><div class='add'>+	if (link-&gt;flags &amp; ENA_ADMIN_GET_FEATURE_LINK_DESC_AUTONEG_MASK) {</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(link_ksettings,</div><div class='add'>+						     supported, Autoneg);</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(link_ksettings,</div><div class='add'>+						     supported, Autoneg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	link_ksettings-&gt;base.autoneg =</div><div class='add'>+		(link-&gt;flags &amp; ENA_ADMIN_GET_FEATURE_LINK_DESC_AUTONEG_MASK) ?</div><div class='add'>+		AUTONEG_ENABLE : AUTONEG_DISABLE;</div><div class='add'>+</div><div class='add'>+	link_ksettings-&gt;base.duplex = DUPLEX_FULL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_get_coalesce(struct net_device *net_dev,</div><div class='add'>+			    struct ethtool_coalesce *coalesce,</div><div class='add'>+			    struct kernel_ethtool_coalesce *kernel_coal,</div><div class='add'>+			    struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = netdev_priv(net_dev);</div><div class='add'>+	struct ena_com_dev *ena_dev = adapter-&gt;ena_dev;</div><div class='add'>+</div><div class='add'>+	if (!ena_com_interrupt_moderation_supported(ena_dev))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	coalesce-&gt;tx_coalesce_usecs =</div><div class='add'>+		ena_com_get_nonadaptive_moderation_interval_tx(ena_dev) *</div><div class='add'>+			ena_dev-&gt;intr_delay_resolution;</div><div class='add'>+</div><div class='add'>+	coalesce-&gt;rx_coalesce_usecs =</div><div class='add'>+		ena_com_get_nonadaptive_moderation_interval_rx(ena_dev)</div><div class='add'>+		* ena_dev-&gt;intr_delay_resolution;</div><div class='add'>+</div><div class='add'>+	coalesce-&gt;use_adaptive_rx_coalesce =</div><div class='add'>+		ena_com_get_adaptive_moderation_enabled(ena_dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_update_tx_rings_nonadaptive_intr_moderation(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	unsigned int val;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	val = ena_com_get_nonadaptive_moderation_interval_tx(adapter-&gt;ena_dev);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; adapter-&gt;num_io_queues; i++)</div><div class='add'>+		adapter-&gt;tx_ring[i].smoothed_interval = val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_update_rx_rings_nonadaptive_intr_moderation(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	unsigned int val;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	val = ena_com_get_nonadaptive_moderation_interval_rx(adapter-&gt;ena_dev);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; adapter-&gt;num_io_queues; i++)</div><div class='add'>+		adapter-&gt;rx_ring[i].smoothed_interval = val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_set_coalesce(struct net_device *net_dev,</div><div class='add'>+			    struct ethtool_coalesce *coalesce,</div><div class='add'>+			    struct kernel_ethtool_coalesce *kernel_coal,</div><div class='add'>+			    struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = netdev_priv(net_dev);</div><div class='add'>+	struct ena_com_dev *ena_dev = adapter-&gt;ena_dev;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (!ena_com_interrupt_moderation_supported(ena_dev))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	rc = ena_com_update_nonadaptive_moderation_interval_tx(ena_dev,</div><div class='add'>+							       coalesce-&gt;tx_coalesce_usecs);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	ena_update_tx_rings_nonadaptive_intr_moderation(adapter);</div><div class='add'>+</div><div class='add'>+	rc = ena_com_update_nonadaptive_moderation_interval_rx(ena_dev,</div><div class='add'>+							       coalesce-&gt;rx_coalesce_usecs);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	ena_update_rx_rings_nonadaptive_intr_moderation(adapter);</div><div class='add'>+</div><div class='add'>+	if (coalesce-&gt;use_adaptive_rx_coalesce &amp;&amp;</div><div class='add'>+	    !ena_com_get_adaptive_moderation_enabled(ena_dev))</div><div class='add'>+		ena_com_enable_adaptive_moderation(ena_dev);</div><div class='add'>+</div><div class='add'>+	if (!coalesce-&gt;use_adaptive_rx_coalesce &amp;&amp;</div><div class='add'>+	    ena_com_get_adaptive_moderation_enabled(ena_dev))</div><div class='add'>+		ena_com_disable_adaptive_moderation(ena_dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 ena_get_msglevel(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	return adapter-&gt;msg_enable;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_set_msglevel(struct net_device *netdev, u32 value)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	adapter-&gt;msg_enable = value;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_get_drvinfo(struct net_device *dev,</div><div class='add'>+			    struct ethtool_drvinfo *info)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	ssize_t ret = 0;</div><div class='add'>+</div><div class='add'>+	ret = strscpy(info-&gt;driver, DRV_MODULE_NAME, sizeof(info-&gt;driver));</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		netif_dbg(adapter, drv, dev,</div><div class='add'>+			  "module name will be truncated, status = %zd\n", ret);</div><div class='add'>+</div><div class='add'>+	ret = strscpy(info-&gt;bus_info, pci_name(adapter-&gt;pdev),</div><div class='add'>+		      sizeof(info-&gt;bus_info));</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		netif_dbg(adapter, drv, dev,</div><div class='add'>+			  "bus info will be truncated, status = %zd\n", ret);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_get_ringparam(struct net_device *netdev,</div><div class='add'>+			      struct ethtool_ringparam *ring,</div><div class='add'>+			      struct kernel_ethtool_ringparam *kernel_ring,</div><div class='add'>+			      struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	ring-&gt;tx_max_pending = adapter-&gt;max_tx_ring_size;</div><div class='add'>+	ring-&gt;rx_max_pending = adapter-&gt;max_rx_ring_size;</div><div class='add'>+	if (adapter-&gt;ena_dev-&gt;tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) {</div><div class='add'>+		bool large_llq_supported = adapter-&gt;large_llq_header_supported;</div><div class='add'>+</div><div class='add'>+		kernel_ring-&gt;tx_push = true;</div><div class='add'>+		kernel_ring-&gt;tx_push_buf_len = adapter-&gt;ena_dev-&gt;tx_max_header_size;</div><div class='add'>+		if (large_llq_supported)</div><div class='add'>+			kernel_ring-&gt;tx_push_buf_max_len = ENA_LLQ_LARGE_HEADER;</div><div class='add'>+		else</div><div class='add'>+			kernel_ring-&gt;tx_push_buf_max_len = ENA_LLQ_HEADER;</div><div class='add'>+	} else {</div><div class='add'>+		kernel_ring-&gt;tx_push = false;</div><div class='add'>+		kernel_ring-&gt;tx_push_buf_max_len = 0;</div><div class='add'>+		kernel_ring-&gt;tx_push_buf_len = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ring-&gt;tx_pending = adapter-&gt;tx_ring[0].ring_size;</div><div class='add'>+	ring-&gt;rx_pending = adapter-&gt;rx_ring[0].ring_size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_set_ringparam(struct net_device *netdev,</div><div class='add'>+			     struct ethtool_ringparam *ring,</div><div class='add'>+			     struct kernel_ethtool_ringparam *kernel_ring,</div><div class='add'>+			     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	u32 new_tx_size, new_rx_size, new_tx_push_buf_len;</div><div class='add'>+	bool changed = false;</div><div class='add'>+</div><div class='add'>+	new_tx_size = ring-&gt;tx_pending &lt; ENA_MIN_RING_SIZE ?</div><div class='add'>+			ENA_MIN_RING_SIZE : ring-&gt;tx_pending;</div><div class='add'>+	new_tx_size = rounddown_pow_of_two(new_tx_size);</div><div class='add'>+</div><div class='add'>+	new_rx_size = ring-&gt;rx_pending &lt; ENA_MIN_RING_SIZE ?</div><div class='add'>+			ENA_MIN_RING_SIZE : ring-&gt;rx_pending;</div><div class='add'>+	new_rx_size = rounddown_pow_of_two(new_rx_size);</div><div class='add'>+</div><div class='add'>+	changed |= new_tx_size != adapter-&gt;requested_tx_ring_size ||</div><div class='add'>+		   new_rx_size != adapter-&gt;requested_rx_ring_size;</div><div class='add'>+</div><div class='add'>+	/* This value is ignored if LLQ is not supported */</div><div class='add'>+	new_tx_push_buf_len = adapter-&gt;ena_dev-&gt;tx_max_header_size;</div><div class='add'>+</div><div class='add'>+	if ((adapter-&gt;ena_dev-&gt;tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) !=</div><div class='add'>+	    kernel_ring-&gt;tx_push) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Push mode state cannot be modified");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Validate that the push buffer is supported on the underlying device */</div><div class='add'>+	if (kernel_ring-&gt;tx_push_buf_len) {</div><div class='add'>+		enum ena_admin_placement_policy_type placement;</div><div class='add'>+</div><div class='add'>+		new_tx_push_buf_len = kernel_ring-&gt;tx_push_buf_len;</div><div class='add'>+</div><div class='add'>+		placement = adapter-&gt;ena_dev-&gt;tx_mem_queue_type;</div><div class='add'>+		if (placement == ENA_ADMIN_PLACEMENT_POLICY_HOST)</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+		if (new_tx_push_buf_len != ENA_LLQ_HEADER &amp;&amp;</div><div class='add'>+		    new_tx_push_buf_len != ENA_LLQ_LARGE_HEADER) {</div><div class='add'>+			bool large_llq_sup = adapter-&gt;large_llq_header_supported;</div><div class='add'>+			char large_llq_size_str[40];</div><div class='add'>+</div><div class='add'>+			snprintf(large_llq_size_str, 40, ", %lu", ENA_LLQ_LARGE_HEADER);</div><div class='add'>+</div><div class='add'>+			NL_SET_ERR_MSG_FMT_MOD(extack,</div><div class='add'>+					       "Supported tx push buff values: [%lu%s]",</div><div class='add'>+					       ENA_LLQ_HEADER,</div><div class='add'>+					       large_llq_sup ? large_llq_size_str : "");</div><div class='add'>+</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		changed |= new_tx_push_buf_len != adapter-&gt;ena_dev-&gt;tx_max_header_size;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!changed)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return ena_update_queue_params(adapter, new_tx_size, new_rx_size,</div><div class='add'>+				       new_tx_push_buf_len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 ena_flow_hash_to_flow_type(u16 hash_fields)</div><div class='add'>+{</div><div class='add'>+	u32 data = 0;</div><div class='add'>+</div><div class='add'>+	if (hash_fields &amp; ENA_ADMIN_RSS_L2_DA)</div><div class='add'>+		data |= RXH_L2DA;</div><div class='add'>+</div><div class='add'>+	if (hash_fields &amp; ENA_ADMIN_RSS_L3_DA)</div><div class='add'>+		data |= RXH_IP_DST;</div><div class='add'>+</div><div class='add'>+	if (hash_fields &amp; ENA_ADMIN_RSS_L3_SA)</div><div class='add'>+		data |= RXH_IP_SRC;</div><div class='add'>+</div><div class='add'>+	if (hash_fields &amp; ENA_ADMIN_RSS_L4_DP)</div><div class='add'>+		data |= RXH_L4_B_2_3;</div><div class='add'>+</div><div class='add'>+	if (hash_fields &amp; ENA_ADMIN_RSS_L4_SP)</div><div class='add'>+		data |= RXH_L4_B_0_1;</div><div class='add'>+</div><div class='add'>+	return data;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 ena_flow_data_to_flow_hash(u32 hash_fields)</div><div class='add'>+{</div><div class='add'>+	u16 data = 0;</div><div class='add'>+</div><div class='add'>+	if (hash_fields &amp; RXH_L2DA)</div><div class='add'>+		data |= ENA_ADMIN_RSS_L2_DA;</div><div class='add'>+</div><div class='add'>+	if (hash_fields &amp; RXH_IP_DST)</div><div class='add'>+		data |= ENA_ADMIN_RSS_L3_DA;</div><div class='add'>+</div><div class='add'>+	if (hash_fields &amp; RXH_IP_SRC)</div><div class='add'>+		data |= ENA_ADMIN_RSS_L3_SA;</div><div class='add'>+</div><div class='add'>+	if (hash_fields &amp; RXH_L4_B_2_3)</div><div class='add'>+		data |= ENA_ADMIN_RSS_L4_DP;</div><div class='add'>+</div><div class='add'>+	if (hash_fields &amp; RXH_L4_B_0_1)</div><div class='add'>+		data |= ENA_ADMIN_RSS_L4_SP;</div><div class='add'>+</div><div class='add'>+	return data;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_get_rxfh_fields(struct net_device *netdev,</div><div class='add'>+			       struct ethtool_rxfh_fields *cmd)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ena_com_dev *ena_dev = adapter-&gt;ena_dev;</div><div class='add'>+	enum ena_admin_flow_hash_proto proto;</div><div class='add'>+	u16 hash_fields;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;data = 0;</div><div class='add'>+</div><div class='add'>+	switch (cmd-&gt;flow_type) {</div><div class='add'>+	case TCP_V4_FLOW:</div><div class='add'>+		proto = ENA_ADMIN_RSS_TCP4;</div><div class='add'>+		break;</div><div class='add'>+	case UDP_V4_FLOW:</div><div class='add'>+		proto = ENA_ADMIN_RSS_UDP4;</div><div class='add'>+		break;</div><div class='add'>+	case TCP_V6_FLOW:</div><div class='add'>+		proto = ENA_ADMIN_RSS_TCP6;</div><div class='add'>+		break;</div><div class='add'>+	case UDP_V6_FLOW:</div><div class='add'>+		proto = ENA_ADMIN_RSS_UDP6;</div><div class='add'>+		break;</div><div class='add'>+	case IPV4_FLOW:</div><div class='add'>+		proto = ENA_ADMIN_RSS_IP4;</div><div class='add'>+		break;</div><div class='add'>+	case IPV6_FLOW:</div><div class='add'>+		proto = ENA_ADMIN_RSS_IP6;</div><div class='add'>+		break;</div><div class='add'>+	case ETHER_FLOW:</div><div class='add'>+		proto = ENA_ADMIN_RSS_NOT_IP;</div><div class='add'>+		break;</div><div class='add'>+	case AH_V4_FLOW:</div><div class='add'>+	case ESP_V4_FLOW:</div><div class='add'>+	case AH_V6_FLOW:</div><div class='add'>+	case ESP_V6_FLOW:</div><div class='add'>+	case SCTP_V4_FLOW:</div><div class='add'>+	case AH_ESP_V4_FLOW:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = ena_com_get_hash_ctrl(ena_dev, proto, &amp;hash_fields);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;data = ena_flow_hash_to_flow_type(hash_fields);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_set_rxfh_fields(struct net_device *netdev,</div><div class='add'>+			       const struct ethtool_rxfh_fields *cmd,</div><div class='add'>+			       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ena_com_dev *ena_dev = adapter-&gt;ena_dev;</div><div class='add'>+	enum ena_admin_flow_hash_proto proto;</div><div class='add'>+	u16 hash_fields;</div><div class='add'>+</div><div class='add'>+	switch (cmd-&gt;flow_type) {</div><div class='add'>+	case TCP_V4_FLOW:</div><div class='add'>+		proto = ENA_ADMIN_RSS_TCP4;</div><div class='add'>+		break;</div><div class='add'>+	case UDP_V4_FLOW:</div><div class='add'>+		proto = ENA_ADMIN_RSS_UDP4;</div><div class='add'>+		break;</div><div class='add'>+	case TCP_V6_FLOW:</div><div class='add'>+		proto = ENA_ADMIN_RSS_TCP6;</div><div class='add'>+		break;</div><div class='add'>+	case UDP_V6_FLOW:</div><div class='add'>+		proto = ENA_ADMIN_RSS_UDP6;</div><div class='add'>+		break;</div><div class='add'>+	case IPV4_FLOW:</div><div class='add'>+		proto = ENA_ADMIN_RSS_IP4;</div><div class='add'>+		break;</div><div class='add'>+	case IPV6_FLOW:</div><div class='add'>+		proto = ENA_ADMIN_RSS_IP6;</div><div class='add'>+		break;</div><div class='add'>+	case ETHER_FLOW:</div><div class='add'>+		proto = ENA_ADMIN_RSS_NOT_IP;</div><div class='add'>+		break;</div><div class='add'>+	case AH_V4_FLOW:</div><div class='add'>+	case ESP_V4_FLOW:</div><div class='add'>+	case AH_V6_FLOW:</div><div class='add'>+	case ESP_V6_FLOW:</div><div class='add'>+	case SCTP_V4_FLOW:</div><div class='add'>+	case AH_ESP_V4_FLOW:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hash_fields = ena_flow_data_to_flow_hash(cmd-&gt;data);</div><div class='add'>+</div><div class='add'>+	return ena_com_fill_hash_ctrl(ena_dev, proto, hash_fields);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *info,</div><div class='add'>+			 u32 *rules)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	int rc = 0;</div><div class='add'>+</div><div class='add'>+	switch (info-&gt;cmd) {</div><div class='add'>+	case ETHTOOL_GRXRINGS:</div><div class='add'>+		info-&gt;data = adapter-&gt;num_io_queues;</div><div class='add'>+		rc = 0;</div><div class='add'>+		break;</div><div class='add'>+	case ETHTOOL_GRXCLSRLCNT:</div><div class='add'>+	case ETHTOOL_GRXCLSRULE:</div><div class='add'>+	case ETHTOOL_GRXCLSRLALL:</div><div class='add'>+	default:</div><div class='add'>+		netif_err(adapter, drv, netdev,</div><div class='add'>+			  "Command parameter %d is not supported\n", info-&gt;cmd);</div><div class='add'>+		rc = -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 ena_get_rxfh_indir_size(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	return ENA_RX_RSS_TABLE_SIZE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 ena_get_rxfh_key_size(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ena_rss *rss = &amp;adapter-&gt;ena_dev-&gt;rss;</div><div class='add'>+</div><div class='add'>+	return rss-&gt;hash_key ? ENA_HASH_KEY_SIZE : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_indirection_table_set(struct ena_adapter *adapter,</div><div class='add'>+				     const u32 *indir)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_dev *ena_dev = adapter-&gt;ena_dev;</div><div class='add'>+	int i, rc;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ENA_RX_RSS_TABLE_SIZE; i++) {</div><div class='add'>+		rc = ena_com_indirect_table_fill_entry(ena_dev,</div><div class='add'>+						       i,</div><div class='add'>+						       ENA_IO_RXQ_IDX(indir[i]));</div><div class='add'>+		if (unlikely(rc)) {</div><div class='add'>+			netif_err(adapter, drv, adapter-&gt;netdev,</div><div class='add'>+				  "Cannot fill indirect table (index is too large)\n");</div><div class='add'>+			return rc;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = ena_com_indirect_table_set(ena_dev);</div><div class='add'>+	if (rc) {</div><div class='add'>+		netif_err(adapter, drv, adapter-&gt;netdev,</div><div class='add'>+			  "Cannot set indirect table\n");</div><div class='add'>+		return rc == -EPERM ? -EOPNOTSUPP : rc;</div><div class='add'>+	}</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_indirection_table_get(struct ena_adapter *adapter, u32 *indir)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_dev *ena_dev = adapter-&gt;ena_dev;</div><div class='add'>+	int i, rc;</div><div class='add'>+</div><div class='add'>+	if (!indir)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	rc = ena_com_indirect_table_get(ena_dev, indir);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	/* Our internal representation of the indices is: even indices</div><div class='add'>+	 * for Tx and uneven indices for Rx. We need to convert the Rx</div><div class='add'>+	 * indices to be consecutive</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; ENA_RX_RSS_TABLE_SIZE; i++)</div><div class='add'>+		indir[i] = ENA_IO_RXQ_IDX_TO_COMBINED_IDX(indir[i]);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_get_rxfh(struct net_device *netdev,</div><div class='add'>+			struct ethtool_rxfh_param *rxfh)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	enum ena_admin_hash_functions ena_func;</div><div class='add'>+	u8 func;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = ena_indirection_table_get(adapter, rxfh-&gt;indir);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	/* We call this function in order to check if the device</div><div class='add'>+	 * supports getting/setting the hash function.</div><div class='add'>+	 */</div><div class='add'>+	rc = ena_com_get_hash_function(adapter-&gt;ena_dev, &amp;ena_func);</div><div class='add'>+	if (rc) {</div><div class='add'>+		if (rc == -EOPNOTSUPP)</div><div class='add'>+			rc = 0;</div><div class='add'>+</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = ena_com_get_hash_key(adapter-&gt;ena_dev, rxfh-&gt;key);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	switch (ena_func) {</div><div class='add'>+	case ENA_ADMIN_TOEPLITZ:</div><div class='add'>+		func = ETH_RSS_HASH_TOP;</div><div class='add'>+		break;</div><div class='add'>+	case ENA_ADMIN_CRC32:</div><div class='add'>+		func = ETH_RSS_HASH_CRC32;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		netif_err(adapter, drv, netdev,</div><div class='add'>+			  "Command parameter is not supported\n");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rxfh-&gt;hfunc = func;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_set_rxfh(struct net_device *netdev,</div><div class='add'>+			struct ethtool_rxfh_param *rxfh,</div><div class='add'>+			struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ena_com_dev *ena_dev = adapter-&gt;ena_dev;</div><div class='add'>+	enum ena_admin_hash_functions func = 0;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (rxfh-&gt;indir) {</div><div class='add'>+		rc = ena_indirection_table_set(adapter, rxfh-&gt;indir);</div><div class='add'>+		if (rc)</div><div class='add'>+			return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (rxfh-&gt;hfunc) {</div><div class='add'>+	case ETH_RSS_HASH_NO_CHANGE:</div><div class='add'>+		func = ena_com_get_current_hash_function(ena_dev);</div><div class='add'>+		break;</div><div class='add'>+	case ETH_RSS_HASH_TOP:</div><div class='add'>+		func = ENA_ADMIN_TOEPLITZ;</div><div class='add'>+		break;</div><div class='add'>+	case ETH_RSS_HASH_CRC32:</div><div class='add'>+		func = ENA_ADMIN_CRC32;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		netif_err(adapter, drv, netdev, "Unsupported hfunc %d\n",</div><div class='add'>+			  rxfh-&gt;hfunc);</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rxfh-&gt;key || func) {</div><div class='add'>+		rc = ena_com_fill_hash_function(ena_dev, func, rxfh-&gt;key,</div><div class='add'>+						ENA_HASH_KEY_SIZE,</div><div class='add'>+						0xFFFFFFFF);</div><div class='add'>+		if (unlikely(rc)) {</div><div class='add'>+			netif_err(adapter, drv, netdev, "Cannot fill key\n");</div><div class='add'>+			return rc == -EPERM ? -EOPNOTSUPP : rc;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_get_channels(struct net_device *netdev,</div><div class='add'>+			     struct ethtool_channels *channels)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	channels-&gt;max_combined = adapter-&gt;max_num_io_queues;</div><div class='add'>+	channels-&gt;combined_count = adapter-&gt;num_io_queues;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_set_channels(struct net_device *netdev,</div><div class='add'>+			    struct ethtool_channels *channels)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	u32 count = channels-&gt;combined_count;</div><div class='add'>+	/* The check for max value is already done in ethtool */</div><div class='add'>+	if (count &lt; ENA_MIN_NUM_IO_QUEUES)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!ena_xdp_legal_queue_count(adapter, count)) {</div><div class='add'>+		if (ena_xdp_present(adapter))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		xdp_clear_features_flag(netdev);</div><div class='add'>+	} else {</div><div class='add'>+		xdp_set_features_flag(netdev,</div><div class='add'>+				      NETDEV_XDP_ACT_BASIC |</div><div class='add'>+				      NETDEV_XDP_ACT_REDIRECT);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ena_update_queue_count(adapter, count);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_get_tunable(struct net_device *netdev,</div><div class='add'>+			   const struct ethtool_tunable *tuna, void *data)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	switch (tuna-&gt;id) {</div><div class='add'>+	case ETHTOOL_RX_COPYBREAK:</div><div class='add'>+		*(u32 *)data = adapter-&gt;rx_copybreak;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_set_tunable(struct net_device *netdev,</div><div class='add'>+			   const struct ethtool_tunable *tuna,</div><div class='add'>+			   const void *data)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	int ret = 0;</div><div class='add'>+	u32 len;</div><div class='add'>+</div><div class='add'>+	switch (tuna-&gt;id) {</div><div class='add'>+	case ETHTOOL_RX_COPYBREAK:</div><div class='add'>+		len = *(u32 *)data;</div><div class='add'>+		ret = ena_set_rx_copybreak(adapter, len);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops ena_ethtool_ops = {</div><div class='add'>+	.supported_coalesce_params = ETHTOOL_COALESCE_USECS |</div><div class='add'>+				     ETHTOOL_COALESCE_USE_ADAPTIVE_RX,</div><div class='add'>+	.supported_ring_params	= ETHTOOL_RING_USE_TX_PUSH_BUF_LEN |</div><div class='add'>+				  ETHTOOL_RING_USE_TX_PUSH,</div><div class='add'>+	.get_link_ksettings	= ena_get_link_ksettings,</div><div class='add'>+	.get_drvinfo		= ena_get_drvinfo,</div><div class='add'>+	.get_msglevel		= ena_get_msglevel,</div><div class='add'>+	.set_msglevel		= ena_set_msglevel,</div><div class='add'>+	.get_link		= ethtool_op_get_link,</div><div class='add'>+	.get_coalesce		= ena_get_coalesce,</div><div class='add'>+	.set_coalesce		= ena_set_coalesce,</div><div class='add'>+	.get_ringparam		= ena_get_ringparam,</div><div class='add'>+	.set_ringparam		= ena_set_ringparam,</div><div class='add'>+	.get_sset_count         = ena_get_sset_count,</div><div class='add'>+	.get_strings		= ena_get_ethtool_strings,</div><div class='add'>+	.get_ethtool_stats      = ena_get_ethtool_stats,</div><div class='add'>+	.get_rxnfc		= ena_get_rxnfc,</div><div class='add'>+	.get_rxfh_indir_size    = ena_get_rxfh_indir_size,</div><div class='add'>+	.get_rxfh_key_size	= ena_get_rxfh_key_size,</div><div class='add'>+	.get_rxfh		= ena_get_rxfh,</div><div class='add'>+	.set_rxfh		= ena_set_rxfh,</div><div class='add'>+	.get_rxfh_fields	= ena_get_rxfh_fields,</div><div class='add'>+	.set_rxfh_fields	= ena_set_rxfh_fields,</div><div class='add'>+	.get_channels		= ena_get_channels,</div><div class='add'>+	.set_channels		= ena_set_channels,</div><div class='add'>+	.get_tunable		= ena_get_tunable,</div><div class='add'>+	.set_tunable		= ena_set_tunable,</div><div class='add'>+	.get_ts_info		= ena_get_ts_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void ena_set_ethtool_ops(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	netdev-&gt;ethtool_ops = &amp;ena_ethtool_ops;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_dump_stats_ex(struct ena_adapter *adapter, u8 *buf)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = adapter-&gt;netdev;</div><div class='add'>+	u8 *strings_buf;</div><div class='add'>+	u64 *data_buf;</div><div class='add'>+	int strings_num;</div><div class='add'>+	int i, rc;</div><div class='add'>+</div><div class='add'>+	strings_num = ena_get_sw_stats_count(adapter);</div><div class='add'>+	if (strings_num &lt;= 0) {</div><div class='add'>+		netif_err(adapter, drv, netdev, "Can't get stats num\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	strings_buf = kcalloc(strings_num, ETH_GSTRING_LEN, GFP_ATOMIC);</div><div class='add'>+	if (!strings_buf) {</div><div class='add'>+		netif_err(adapter, drv, netdev,</div><div class='add'>+			  "Failed to allocate strings_buf\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	data_buf = kcalloc(strings_num, sizeof(u64), GFP_ATOMIC);</div><div class='add'>+	if (!data_buf) {</div><div class='add'>+		netif_err(adapter, drv, netdev,</div><div class='add'>+			  "Failed to allocate data buf\n");</div><div class='add'>+		kfree(strings_buf);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ena_get_strings(adapter, strings_buf, false);</div><div class='add'>+	ena_get_stats(adapter, data_buf, false);</div><div class='add'>+</div><div class='add'>+	/* If there is a buffer, dump stats, otherwise print them to dmesg */</div><div class='add'>+	if (buf)</div><div class='add'>+		for (i = 0; i &lt; strings_num; i++) {</div><div class='add'>+			rc = snprintf(buf, ETH_GSTRING_LEN + sizeof(u64),</div><div class='add'>+				      "%s %llu\n",</div><div class='add'>+				      strings_buf + i * ETH_GSTRING_LEN,</div><div class='add'>+				      data_buf[i]);</div><div class='add'>+			buf += rc;</div><div class='add'>+		}</div><div class='add'>+	else</div><div class='add'>+		for (i = 0; i &lt; strings_num; i++)</div><div class='add'>+			netif_err(adapter, drv, netdev, "%s: %llu\n",</div><div class='add'>+				  strings_buf + i * ETH_GSTRING_LEN,</div><div class='add'>+				  data_buf[i]);</div><div class='add'>+</div><div class='add'>+	kfree(strings_buf);</div><div class='add'>+	kfree(data_buf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_dump_stats_to_buf(struct ena_adapter *adapter, u8 *buf)</div><div class='add'>+{</div><div class='add'>+	if (!buf)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ena_dump_stats_ex(adapter, buf);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_dump_stats_to_dmesg(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	ena_dump_stats_ex(adapter, NULL);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/amazon/ena/ena_netdev.c b/drivers/net/ethernet/amazon/ena/ena_netdev.c<br/>new file mode 100644<br/>index 000000000000..92d149d4f091<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_netdev.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amazon/ena/ena_netdev.c</a></div><div class='hunk'>@@ -0,0 +1,4381 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015-2020 Amazon.com, Inc. or its affiliates. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/kernel.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/numa.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/utsname.h&gt;</div><div class='add'>+#include &lt;linux/version.h&gt;</div><div class='add'>+#include &lt;linux/vmalloc.h&gt;</div><div class='add'>+#include &lt;net/ip.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ena_netdev.h"</div><div class='add'>+#include "ena_pci_id_tbl.h"</div><div class='add'>+#include "ena_xdp.h"</div><div class='add'>+</div><div class='add'>+#include "ena_phc.h"</div><div class='add'>+</div><div class='add'>+#include "ena_devlink.h"</div><div class='add'>+</div><div class='add'>+#include "ena_debugfs.h"</div><div class='add'>+</div><div class='add'>+MODULE_AUTHOR("Amazon.com, Inc. or its affiliates");</div><div class='add'>+MODULE_DESCRIPTION(DEVICE_NAME);</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+</div><div class='add'>+/* Time in jiffies before concluding the transmitter is hung. */</div><div class='add'>+#define TX_TIMEOUT  (5 * HZ)</div><div class='add'>+</div><div class='add'>+#define ENA_MAX_RINGS min_t(unsigned int, ENA_MAX_NUM_IO_QUEUES, num_possible_cpus())</div><div class='add'>+</div><div class='add'>+#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | \</div><div class='add'>+		NETIF_MSG_IFDOWN | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR)</div><div class='add'>+</div><div class='add'>+static struct ena_aenq_handlers aenq_handlers;</div><div class='add'>+</div><div class='add'>+static struct workqueue_struct *ena_wq;</div><div class='add'>+</div><div class='add'>+MODULE_DEVICE_TABLE(pci, ena_pci_tbl);</div><div class='add'>+</div><div class='add'>+static int ena_rss_init_default(struct ena_adapter *adapter);</div><div class='add'>+static void check_for_admin_com_state(struct ena_adapter *adapter);</div><div class='add'>+</div><div class='add'>+static void ena_tx_timeout(struct net_device *dev, unsigned int txqueue)</div><div class='add'>+{</div><div class='add'>+	enum ena_regs_reset_reason_types reset_reason = ENA_REGS_RESET_OS_NETDEV_WD;</div><div class='add'>+	struct ena_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	unsigned int time_since_last_napi, threshold;</div><div class='add'>+	struct ena_ring *tx_ring;</div><div class='add'>+	int napi_scheduled;</div><div class='add'>+</div><div class='add'>+	if (txqueue &gt;= adapter-&gt;num_io_queues) {</div><div class='add'>+		netdev_err(dev, "TX timeout on invalid queue %u\n", txqueue);</div><div class='add'>+		goto schedule_reset;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	threshold = jiffies_to_usecs(dev-&gt;watchdog_timeo);</div><div class='add'>+	tx_ring = &amp;adapter-&gt;tx_ring[txqueue];</div><div class='add'>+</div><div class='add'>+	time_since_last_napi = jiffies_to_usecs(jiffies - tx_ring-&gt;tx_stats.last_napi_jiffies);</div><div class='add'>+	napi_scheduled = !!(tx_ring-&gt;napi-&gt;state &amp; NAPIF_STATE_SCHED);</div><div class='add'>+</div><div class='add'>+	netdev_err(dev,</div><div class='add'>+		   "TX q %d is paused for too long (threshold %u). Time since last napi %u usec. napi scheduled: %d\n",</div><div class='add'>+		   txqueue,</div><div class='add'>+		   threshold,</div><div class='add'>+		   time_since_last_napi,</div><div class='add'>+		   napi_scheduled);</div><div class='add'>+</div><div class='add'>+	if (threshold &lt; time_since_last_napi &amp;&amp; napi_scheduled) {</div><div class='add'>+		netdev_err(dev,</div><div class='add'>+			   "napi handler hasn't been called for a long time but is scheduled\n");</div><div class='add'>+		reset_reason = ENA_REGS_RESET_SUSPECTED_POLL_STARVATION;</div><div class='add'>+	}</div><div class='add'>+schedule_reset:</div><div class='add'>+	/* Change the state of the device to trigger reset</div><div class='add'>+	 * Check that we are not in the middle or a trigger already</div><div class='add'>+	 */</div><div class='add'>+	if (test_and_set_bit(ENA_FLAG_TRIGGER_RESET, &amp;adapter-&gt;flags))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ena_reset_device(adapter, reset_reason);</div><div class='add'>+	ena_increase_stat(&amp;adapter-&gt;dev_stats.tx_timeout, 1, &amp;adapter-&gt;syncp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void update_rx_ring_mtu(struct ena_adapter *adapter, int mtu)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; adapter-&gt;num_io_queues; i++)</div><div class='add'>+		adapter-&gt;rx_ring[i].mtu = mtu;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_change_mtu(struct net_device *dev, int new_mtu)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = ena_com_set_dev_mtu(adapter-&gt;ena_dev, new_mtu);</div><div class='add'>+	if (!ret) {</div><div class='add'>+		netif_dbg(adapter, drv, dev, "Set MTU to %d\n", new_mtu);</div><div class='add'>+		update_rx_ring_mtu(adapter, new_mtu);</div><div class='add'>+		WRITE_ONCE(dev-&gt;mtu, new_mtu);</div><div class='add'>+	} else {</div><div class='add'>+		netif_err(adapter, drv, dev, "Failed to set MTU to %d\n",</div><div class='add'>+			  new_mtu);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_xmit_common(struct ena_adapter *adapter,</div><div class='add'>+		    struct ena_ring *ring,</div><div class='add'>+		    struct ena_tx_buffer *tx_info,</div><div class='add'>+		    struct ena_com_tx_ctx *ena_tx_ctx,</div><div class='add'>+		    u16 next_to_use,</div><div class='add'>+		    u32 bytes)</div><div class='add'>+{</div><div class='add'>+	int rc, nb_hw_desc;</div><div class='add'>+</div><div class='add'>+	if (unlikely(ena_com_is_doorbell_needed(ring-&gt;ena_com_io_sq,</div><div class='add'>+						ena_tx_ctx))) {</div><div class='add'>+		netif_dbg(adapter, tx_queued, adapter-&gt;netdev,</div><div class='add'>+			  "llq tx max burst size of queue %d achieved, writing doorbell to send burst\n",</div><div class='add'>+			  ring-&gt;qid);</div><div class='add'>+		ena_ring_tx_doorbell(ring);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* prepare the packet's descriptors to dma engine */</div><div class='add'>+	rc = ena_com_prepare_tx(ring-&gt;ena_com_io_sq, ena_tx_ctx,</div><div class='add'>+				&amp;nb_hw_desc);</div><div class='add'>+</div><div class='add'>+	/* In case there isn't enough space in the queue for the packet,</div><div class='add'>+	 * we simply drop it. All other failure reasons of</div><div class='add'>+	 * ena_com_prepare_tx() are fatal and therefore require a device reset.</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely(rc)) {</div><div class='add'>+		netif_err(adapter, tx_queued, adapter-&gt;netdev,</div><div class='add'>+			  "Failed to prepare tx bufs\n");</div><div class='add'>+		ena_increase_stat(&amp;ring-&gt;tx_stats.prepare_ctx_err, 1, &amp;ring-&gt;syncp);</div><div class='add'>+		if (rc != -ENOMEM)</div><div class='add'>+			ena_reset_device(adapter, ENA_REGS_RESET_DRIVER_INVALID_STATE);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	u64_stats_update_begin(&amp;ring-&gt;syncp);</div><div class='add'>+	ring-&gt;tx_stats.cnt++;</div><div class='add'>+	ring-&gt;tx_stats.bytes += bytes;</div><div class='add'>+	u64_stats_update_end(&amp;ring-&gt;syncp);</div><div class='add'>+</div><div class='add'>+	tx_info-&gt;tx_descs = nb_hw_desc;</div><div class='add'>+	tx_info-&gt;total_tx_size = bytes;</div><div class='add'>+	tx_info-&gt;last_jiffies = jiffies;</div><div class='add'>+	tx_info-&gt;print_once = 0;</div><div class='add'>+</div><div class='add'>+	ring-&gt;next_to_use = ENA_TX_RING_IDX_NEXT(next_to_use,</div><div class='add'>+						 ring-&gt;ring_size);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_init_io_rings_common(struct ena_adapter *adapter,</div><div class='add'>+				     struct ena_ring *ring, u16 qid)</div><div class='add'>+{</div><div class='add'>+	ring-&gt;qid = qid;</div><div class='add'>+	ring-&gt;pdev = adapter-&gt;pdev;</div><div class='add'>+	ring-&gt;dev = &amp;adapter-&gt;pdev-&gt;dev;</div><div class='add'>+	ring-&gt;netdev = adapter-&gt;netdev;</div><div class='add'>+	ring-&gt;napi = &amp;adapter-&gt;ena_napi[qid].napi;</div><div class='add'>+	ring-&gt;adapter = adapter;</div><div class='add'>+	ring-&gt;ena_dev = adapter-&gt;ena_dev;</div><div class='add'>+	ring-&gt;per_napi_packets = 0;</div><div class='add'>+	ring-&gt;cpu = 0;</div><div class='add'>+	ring-&gt;numa_node = 0;</div><div class='add'>+	ring-&gt;no_interrupt_event_cnt = 0;</div><div class='add'>+	u64_stats_init(&amp;ring-&gt;syncp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_init_io_rings(struct ena_adapter *adapter,</div><div class='add'>+		       int first_index, int count)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_dev *ena_dev;</div><div class='add'>+	struct ena_ring *txr, *rxr;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	ena_dev = adapter-&gt;ena_dev;</div><div class='add'>+</div><div class='add'>+	for (i = first_index; i &lt; first_index + count; i++) {</div><div class='add'>+		txr = &amp;adapter-&gt;tx_ring[i];</div><div class='add'>+		rxr = &amp;adapter-&gt;rx_ring[i];</div><div class='add'>+</div><div class='add'>+		/* TX common ring state */</div><div class='add'>+		ena_init_io_rings_common(adapter, txr, i);</div><div class='add'>+</div><div class='add'>+		/* TX specific ring state */</div><div class='add'>+		txr-&gt;ring_size = adapter-&gt;requested_tx_ring_size;</div><div class='add'>+		txr-&gt;tx_max_header_size = ena_dev-&gt;tx_max_header_size;</div><div class='add'>+		txr-&gt;tx_mem_queue_type = ena_dev-&gt;tx_mem_queue_type;</div><div class='add'>+		txr-&gt;sgl_size = adapter-&gt;max_tx_sgl_size;</div><div class='add'>+		txr-&gt;smoothed_interval =</div><div class='add'>+			ena_com_get_nonadaptive_moderation_interval_tx(ena_dev);</div><div class='add'>+		txr-&gt;disable_meta_caching = adapter-&gt;disable_meta_caching;</div><div class='add'>+		spin_lock_init(&amp;txr-&gt;xdp_tx_lock);</div><div class='add'>+</div><div class='add'>+		/* Don't init RX queues for xdp queues */</div><div class='add'>+		if (!ENA_IS_XDP_INDEX(adapter, i)) {</div><div class='add'>+			/* RX common ring state */</div><div class='add'>+			ena_init_io_rings_common(adapter, rxr, i);</div><div class='add'>+</div><div class='add'>+			/* RX specific ring state */</div><div class='add'>+			rxr-&gt;ring_size = adapter-&gt;requested_rx_ring_size;</div><div class='add'>+			rxr-&gt;rx_copybreak = adapter-&gt;rx_copybreak;</div><div class='add'>+			rxr-&gt;sgl_size = adapter-&gt;max_rx_sgl_size;</div><div class='add'>+			rxr-&gt;smoothed_interval =</div><div class='add'>+				ena_com_get_nonadaptive_moderation_interval_rx(ena_dev);</div><div class='add'>+			rxr-&gt;empty_rx_queue = 0;</div><div class='add'>+			rxr-&gt;rx_headroom = NET_SKB_PAD;</div><div class='add'>+			adapter-&gt;ena_napi[i].dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE;</div><div class='add'>+			rxr-&gt;xdp_ring = &amp;adapter-&gt;tx_ring[i + adapter-&gt;num_io_queues];</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ena_setup_tx_resources - allocate I/O Tx resources (Descriptors)</div><div class='add'>+ * @adapter: network interface device structure</div><div class='add'>+ * @qid: queue index</div><div class='add'>+ *</div><div class='add'>+ * Return 0 on success, negative on failure</div><div class='add'>+ */</div><div class='add'>+static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid)</div><div class='add'>+{</div><div class='add'>+	struct ena_ring *tx_ring = &amp;adapter-&gt;tx_ring[qid];</div><div class='add'>+	struct ena_irq *ena_irq = &amp;adapter-&gt;irq_tbl[ENA_IO_IRQ_IDX(qid)];</div><div class='add'>+	int size, i, node;</div><div class='add'>+</div><div class='add'>+	if (tx_ring-&gt;tx_buffer_info) {</div><div class='add'>+		netif_err(adapter, ifup,</div><div class='add'>+			  adapter-&gt;netdev, "tx_buffer_info info is not NULL");</div><div class='add'>+		return -EEXIST;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	size = sizeof(struct ena_tx_buffer) * tx_ring-&gt;ring_size;</div><div class='add'>+	node = cpu_to_node(ena_irq-&gt;cpu);</div><div class='add'>+</div><div class='add'>+	tx_ring-&gt;tx_buffer_info = vzalloc_node(size, node);</div><div class='add'>+	if (!tx_ring-&gt;tx_buffer_info) {</div><div class='add'>+		tx_ring-&gt;tx_buffer_info = vzalloc(size);</div><div class='add'>+		if (!tx_ring-&gt;tx_buffer_info)</div><div class='add'>+			goto err_tx_buffer_info;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	size = sizeof(u16) * tx_ring-&gt;ring_size;</div><div class='add'>+	tx_ring-&gt;free_ids = vzalloc_node(size, node);</div><div class='add'>+	if (!tx_ring-&gt;free_ids) {</div><div class='add'>+		tx_ring-&gt;free_ids = vzalloc(size);</div><div class='add'>+		if (!tx_ring-&gt;free_ids)</div><div class='add'>+			goto err_tx_free_ids;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	size = tx_ring-&gt;tx_max_header_size;</div><div class='add'>+	tx_ring-&gt;push_buf_intermediate_buf = vzalloc_node(size, node);</div><div class='add'>+	if (!tx_ring-&gt;push_buf_intermediate_buf) {</div><div class='add'>+		tx_ring-&gt;push_buf_intermediate_buf = vzalloc(size);</div><div class='add'>+		if (!tx_ring-&gt;push_buf_intermediate_buf)</div><div class='add'>+			goto err_push_buf_intermediate_buf;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Req id ring for TX out of order completions */</div><div class='add'>+	for (i = 0; i &lt; tx_ring-&gt;ring_size; i++)</div><div class='add'>+		tx_ring-&gt;free_ids[i] = i;</div><div class='add'>+</div><div class='add'>+	/* Reset tx statistics */</div><div class='add'>+	memset(&amp;tx_ring-&gt;tx_stats, 0x0, sizeof(tx_ring-&gt;tx_stats));</div><div class='add'>+</div><div class='add'>+	tx_ring-&gt;next_to_use = 0;</div><div class='add'>+	tx_ring-&gt;next_to_clean = 0;</div><div class='add'>+	tx_ring-&gt;cpu = ena_irq-&gt;cpu;</div><div class='add'>+	tx_ring-&gt;numa_node = node;</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_push_buf_intermediate_buf:</div><div class='add'>+	vfree(tx_ring-&gt;free_ids);</div><div class='add'>+	tx_ring-&gt;free_ids = NULL;</div><div class='add'>+err_tx_free_ids:</div><div class='add'>+	vfree(tx_ring-&gt;tx_buffer_info);</div><div class='add'>+	tx_ring-&gt;tx_buffer_info = NULL;</div><div class='add'>+err_tx_buffer_info:</div><div class='add'>+	return -ENOMEM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ena_free_tx_resources - Free I/O Tx Resources per Queue</div><div class='add'>+ * @adapter: network interface device structure</div><div class='add'>+ * @qid: queue index</div><div class='add'>+ *</div><div class='add'>+ * Free all transmit software resources</div><div class='add'>+ */</div><div class='add'>+static void ena_free_tx_resources(struct ena_adapter *adapter, int qid)</div><div class='add'>+{</div><div class='add'>+	struct ena_ring *tx_ring = &amp;adapter-&gt;tx_ring[qid];</div><div class='add'>+</div><div class='add'>+	vfree(tx_ring-&gt;tx_buffer_info);</div><div class='add'>+	tx_ring-&gt;tx_buffer_info = NULL;</div><div class='add'>+</div><div class='add'>+	vfree(tx_ring-&gt;free_ids);</div><div class='add'>+	tx_ring-&gt;free_ids = NULL;</div><div class='add'>+</div><div class='add'>+	vfree(tx_ring-&gt;push_buf_intermediate_buf);</div><div class='add'>+	tx_ring-&gt;push_buf_intermediate_buf = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_setup_tx_resources_in_range(struct ena_adapter *adapter,</div><div class='add'>+				    int first_index, int count)</div><div class='add'>+{</div><div class='add'>+	int i, rc = 0;</div><div class='add'>+</div><div class='add'>+	for (i = first_index; i &lt; first_index + count; i++) {</div><div class='add'>+		rc = ena_setup_tx_resources(adapter, i);</div><div class='add'>+		if (rc)</div><div class='add'>+			goto err_setup_tx;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_setup_tx:</div><div class='add'>+</div><div class='add'>+	netif_err(adapter, ifup, adapter-&gt;netdev,</div><div class='add'>+		  "Tx queue %d: allocation failed\n", i);</div><div class='add'>+</div><div class='add'>+	/* rewind the index freeing the rings as we go */</div><div class='add'>+	while (first_index &lt; i--)</div><div class='add'>+		ena_free_tx_resources(adapter, i);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_free_all_io_tx_resources_in_range(struct ena_adapter *adapter,</div><div class='add'>+					   int first_index, int count)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = first_index; i &lt; first_index + count; i++)</div><div class='add'>+		ena_free_tx_resources(adapter, i);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ena_free_all_io_tx_resources - Free I/O Tx Resources for All Queues</div><div class='add'>+ * @adapter: board private structure</div><div class='add'>+ *</div><div class='add'>+ * Free all transmit software resources</div><div class='add'>+ */</div><div class='add'>+void ena_free_all_io_tx_resources(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	ena_free_all_io_tx_resources_in_range(adapter,</div><div class='add'>+					      0,</div><div class='add'>+					      adapter-&gt;xdp_num_queues +</div><div class='add'>+					      adapter-&gt;num_io_queues);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ena_setup_rx_resources - allocate I/O Rx resources (Descriptors)</div><div class='add'>+ * @adapter: network interface device structure</div><div class='add'>+ * @qid: queue index</div><div class='add'>+ *</div><div class='add'>+ * Returns 0 on success, negative on failure</div><div class='add'>+ */</div><div class='add'>+static int ena_setup_rx_resources(struct ena_adapter *adapter,</div><div class='add'>+				  u32 qid)</div><div class='add'>+{</div><div class='add'>+	struct ena_ring *rx_ring = &amp;adapter-&gt;rx_ring[qid];</div><div class='add'>+	struct ena_irq *ena_irq = &amp;adapter-&gt;irq_tbl[ENA_IO_IRQ_IDX(qid)];</div><div class='add'>+	int size, node, i;</div><div class='add'>+</div><div class='add'>+	if (rx_ring-&gt;rx_buffer_info) {</div><div class='add'>+		netif_err(adapter, ifup, adapter-&gt;netdev,</div><div class='add'>+			  "rx_buffer_info is not NULL");</div><div class='add'>+		return -EEXIST;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* alloc extra element so in rx path</div><div class='add'>+	 * we can always prefetch rx_info + 1</div><div class='add'>+	 */</div><div class='add'>+	size = sizeof(struct ena_rx_buffer) * (rx_ring-&gt;ring_size + 1);</div><div class='add'>+	node = cpu_to_node(ena_irq-&gt;cpu);</div><div class='add'>+</div><div class='add'>+	rx_ring-&gt;rx_buffer_info = vzalloc_node(size, node);</div><div class='add'>+	if (!rx_ring-&gt;rx_buffer_info) {</div><div class='add'>+		rx_ring-&gt;rx_buffer_info = vzalloc(size);</div><div class='add'>+		if (!rx_ring-&gt;rx_buffer_info)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	size = sizeof(u16) * rx_ring-&gt;ring_size;</div><div class='add'>+	rx_ring-&gt;free_ids = vzalloc_node(size, node);</div><div class='add'>+	if (!rx_ring-&gt;free_ids) {</div><div class='add'>+		rx_ring-&gt;free_ids = vzalloc(size);</div><div class='add'>+		if (!rx_ring-&gt;free_ids) {</div><div class='add'>+			vfree(rx_ring-&gt;rx_buffer_info);</div><div class='add'>+			rx_ring-&gt;rx_buffer_info = NULL;</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Req id ring for receiving RX pkts out of order */</div><div class='add'>+	for (i = 0; i &lt; rx_ring-&gt;ring_size; i++)</div><div class='add'>+		rx_ring-&gt;free_ids[i] = i;</div><div class='add'>+</div><div class='add'>+	/* Reset rx statistics */</div><div class='add'>+	memset(&amp;rx_ring-&gt;rx_stats, 0x0, sizeof(rx_ring-&gt;rx_stats));</div><div class='add'>+</div><div class='add'>+	rx_ring-&gt;next_to_clean = 0;</div><div class='add'>+	rx_ring-&gt;next_to_use = 0;</div><div class='add'>+	rx_ring-&gt;cpu = ena_irq-&gt;cpu;</div><div class='add'>+	rx_ring-&gt;numa_node = node;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ena_free_rx_resources - Free I/O Rx Resources</div><div class='add'>+ * @adapter: network interface device structure</div><div class='add'>+ * @qid: queue index</div><div class='add'>+ *</div><div class='add'>+ * Free all receive software resources</div><div class='add'>+ */</div><div class='add'>+static void ena_free_rx_resources(struct ena_adapter *adapter,</div><div class='add'>+				  u32 qid)</div><div class='add'>+{</div><div class='add'>+	struct ena_ring *rx_ring = &amp;adapter-&gt;rx_ring[qid];</div><div class='add'>+</div><div class='add'>+	vfree(rx_ring-&gt;rx_buffer_info);</div><div class='add'>+	rx_ring-&gt;rx_buffer_info = NULL;</div><div class='add'>+</div><div class='add'>+	vfree(rx_ring-&gt;free_ids);</div><div class='add'>+	rx_ring-&gt;free_ids = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ena_setup_all_rx_resources - allocate I/O Rx queues resources for all queues</div><div class='add'>+ * @adapter: board private structure</div><div class='add'>+ *</div><div class='add'>+ * Return 0 on success, negative on failure</div><div class='add'>+ */</div><div class='add'>+static int ena_setup_all_rx_resources(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	int i, rc = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; adapter-&gt;num_io_queues; i++) {</div><div class='add'>+		rc = ena_setup_rx_resources(adapter, i);</div><div class='add'>+		if (rc)</div><div class='add'>+			goto err_setup_rx;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_setup_rx:</div><div class='add'>+</div><div class='add'>+	netif_err(adapter, ifup, adapter-&gt;netdev,</div><div class='add'>+		  "Rx queue %d: allocation failed\n", i);</div><div class='add'>+</div><div class='add'>+	/* rewind the index freeing the rings as we go */</div><div class='add'>+	while (i--)</div><div class='add'>+		ena_free_rx_resources(adapter, i);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ena_free_all_io_rx_resources - Free I/O Rx Resources for All Queues</div><div class='add'>+ * @adapter: board private structure</div><div class='add'>+ *</div><div class='add'>+ * Free all receive software resources</div><div class='add'>+ */</div><div class='add'>+static void ena_free_all_io_rx_resources(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; adapter-&gt;num_io_queues; i++)</div><div class='add'>+		ena_free_rx_resources(adapter, i);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct page *ena_alloc_map_page(struct ena_ring *rx_ring,</div><div class='add'>+				       dma_addr_t *dma)</div><div class='add'>+{</div><div class='add'>+	struct page *page;</div><div class='add'>+</div><div class='add'>+	/* This would allocate the page on the same NUMA node the executing code</div><div class='add'>+	 * is running on.</div><div class='add'>+	 */</div><div class='add'>+	page = dev_alloc_page();</div><div class='add'>+	if (!page) {</div><div class='add'>+		ena_increase_stat(&amp;rx_ring-&gt;rx_stats.page_alloc_fail, 1, &amp;rx_ring-&gt;syncp);</div><div class='add'>+		return ERR_PTR(-ENOSPC);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* To enable NIC-side port-mirroring, AKA SPAN port,</div><div class='add'>+	 * we make the buffer readable from the nic as well</div><div class='add'>+	 */</div><div class='add'>+	*dma = dma_map_page(rx_ring-&gt;dev, page, 0, ENA_PAGE_SIZE,</div><div class='add'>+			    DMA_BIDIRECTIONAL);</div><div class='add'>+	if (unlikely(dma_mapping_error(rx_ring-&gt;dev, *dma))) {</div><div class='add'>+		ena_increase_stat(&amp;rx_ring-&gt;rx_stats.dma_mapping_err, 1,</div><div class='add'>+				  &amp;rx_ring-&gt;syncp);</div><div class='add'>+		__free_page(page);</div><div class='add'>+		return ERR_PTR(-EIO);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return page;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_alloc_rx_buffer(struct ena_ring *rx_ring,</div><div class='add'>+			       struct ena_rx_buffer *rx_info)</div><div class='add'>+{</div><div class='add'>+	int headroom = rx_ring-&gt;rx_headroom;</div><div class='add'>+	struct ena_com_buf *ena_buf;</div><div class='add'>+	struct page *page;</div><div class='add'>+	dma_addr_t dma;</div><div class='add'>+	int tailroom;</div><div class='add'>+</div><div class='add'>+	/* restore page offset value in case it has been changed by device */</div><div class='add'>+	rx_info-&gt;buf_offset = headroom;</div><div class='add'>+</div><div class='add'>+	/* if previous allocated page is not used */</div><div class='add'>+	if (unlikely(rx_info-&gt;page))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* We handle DMA here */</div><div class='add'>+	page = ena_alloc_map_page(rx_ring, &amp;dma);</div><div class='add'>+	if (IS_ERR(page))</div><div class='add'>+		return PTR_ERR(page);</div><div class='add'>+</div><div class='add'>+	netif_dbg(rx_ring-&gt;adapter, rx_status, rx_ring-&gt;netdev,</div><div class='add'>+		  "Allocate page %p, rx_info %p\n", page, rx_info);</div><div class='add'>+</div><div class='add'>+	tailroom = SKB_DATA_ALIGN(sizeof(struct skb_shared_info));</div><div class='add'>+</div><div class='add'>+	rx_info-&gt;page = page;</div><div class='add'>+	rx_info-&gt;dma_addr = dma;</div><div class='add'>+	rx_info-&gt;page_offset = 0;</div><div class='add'>+	ena_buf = &amp;rx_info-&gt;ena_buf;</div><div class='add'>+	ena_buf-&gt;paddr = dma + headroom;</div><div class='add'>+	ena_buf-&gt;len = ENA_PAGE_SIZE - headroom - tailroom;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_unmap_rx_buff_attrs(struct ena_ring *rx_ring,</div><div class='add'>+				    struct ena_rx_buffer *rx_info,</div><div class='add'>+				    unsigned long attrs)</div><div class='add'>+{</div><div class='add'>+	dma_unmap_page_attrs(rx_ring-&gt;dev, rx_info-&gt;dma_addr, ENA_PAGE_SIZE, DMA_BIDIRECTIONAL,</div><div class='add'>+			     attrs);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_free_rx_page(struct ena_ring *rx_ring,</div><div class='add'>+			     struct ena_rx_buffer *rx_info)</div><div class='add'>+{</div><div class='add'>+	struct page *page = rx_info-&gt;page;</div><div class='add'>+</div><div class='add'>+	if (unlikely(!page)) {</div><div class='add'>+		netif_warn(rx_ring-&gt;adapter, rx_err, rx_ring-&gt;netdev,</div><div class='add'>+			   "Trying to free unallocated buffer\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ena_unmap_rx_buff_attrs(rx_ring, rx_info, 0);</div><div class='add'>+</div><div class='add'>+	__free_page(page);</div><div class='add'>+	rx_info-&gt;page = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_refill_rx_bufs(struct ena_ring *rx_ring, u32 num)</div><div class='add'>+{</div><div class='add'>+	u16 next_to_use, req_id;</div><div class='add'>+	u32 i;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	next_to_use = rx_ring-&gt;next_to_use;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num; i++) {</div><div class='add'>+		struct ena_rx_buffer *rx_info;</div><div class='add'>+</div><div class='add'>+		req_id = rx_ring-&gt;free_ids[next_to_use];</div><div class='add'>+</div><div class='add'>+		rx_info = &amp;rx_ring-&gt;rx_buffer_info[req_id];</div><div class='add'>+</div><div class='add'>+		rc = ena_alloc_rx_buffer(rx_ring, rx_info);</div><div class='add'>+		if (unlikely(rc &lt; 0)) {</div><div class='add'>+			netif_warn(rx_ring-&gt;adapter, rx_err, rx_ring-&gt;netdev,</div><div class='add'>+				   "Failed to allocate buffer for rx queue %d\n",</div><div class='add'>+				   rx_ring-&gt;qid);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		rc = ena_com_add_single_rx_desc(rx_ring-&gt;ena_com_io_sq,</div><div class='add'>+						&amp;rx_info-&gt;ena_buf,</div><div class='add'>+						req_id);</div><div class='add'>+		if (unlikely(rc)) {</div><div class='add'>+			netif_warn(rx_ring-&gt;adapter, rx_status, rx_ring-&gt;netdev,</div><div class='add'>+				   "Failed to add buffer for rx queue %d\n",</div><div class='add'>+				   rx_ring-&gt;qid);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		next_to_use = ENA_RX_RING_IDX_NEXT(next_to_use,</div><div class='add'>+						   rx_ring-&gt;ring_size);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (unlikely(i &lt; num)) {</div><div class='add'>+		ena_increase_stat(&amp;rx_ring-&gt;rx_stats.refil_partial, 1,</div><div class='add'>+				  &amp;rx_ring-&gt;syncp);</div><div class='add'>+		netif_warn(rx_ring-&gt;adapter, rx_err, rx_ring-&gt;netdev,</div><div class='add'>+			   "Refilled rx qid %d with only %d buffers (from %d)\n",</div><div class='add'>+			   rx_ring-&gt;qid, i, num);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* ena_com_write_sq_doorbell issues a wmb() */</div><div class='add'>+	if (likely(i))</div><div class='add'>+		ena_com_write_sq_doorbell(rx_ring-&gt;ena_com_io_sq);</div><div class='add'>+</div><div class='add'>+	rx_ring-&gt;next_to_use = next_to_use;</div><div class='add'>+</div><div class='add'>+	return i;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_free_rx_bufs(struct ena_adapter *adapter,</div><div class='add'>+			     u32 qid)</div><div class='add'>+{</div><div class='add'>+	struct ena_ring *rx_ring = &amp;adapter-&gt;rx_ring[qid];</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; rx_ring-&gt;ring_size; i++) {</div><div class='add'>+		struct ena_rx_buffer *rx_info = &amp;rx_ring-&gt;rx_buffer_info[i];</div><div class='add'>+</div><div class='add'>+		if (rx_info-&gt;page)</div><div class='add'>+			ena_free_rx_page(rx_ring, rx_info);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ena_refill_all_rx_bufs - allocate all queues Rx buffers</div><div class='add'>+ * @adapter: board private structure</div><div class='add'>+ */</div><div class='add'>+static void ena_refill_all_rx_bufs(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct ena_ring *rx_ring;</div><div class='add'>+	int i, rc, bufs_num;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; adapter-&gt;num_io_queues; i++) {</div><div class='add'>+		rx_ring = &amp;adapter-&gt;rx_ring[i];</div><div class='add'>+		bufs_num = rx_ring-&gt;ring_size - 1;</div><div class='add'>+		rc = ena_refill_rx_bufs(rx_ring, bufs_num);</div><div class='add'>+</div><div class='add'>+		if (unlikely(rc != bufs_num))</div><div class='add'>+			netif_warn(rx_ring-&gt;adapter, rx_status, rx_ring-&gt;netdev,</div><div class='add'>+				   "Refilling Queue %d failed. allocated %d buffers from: %d\n",</div><div class='add'>+				   i, rc, bufs_num);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_free_all_rx_bufs(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; adapter-&gt;num_io_queues; i++)</div><div class='add'>+		ena_free_rx_bufs(adapter, i);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_unmap_tx_buff(struct ena_ring *tx_ring,</div><div class='add'>+		       struct ena_tx_buffer *tx_info)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_buf *ena_buf;</div><div class='add'>+	u32 cnt;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	ena_buf = tx_info-&gt;bufs;</div><div class='add'>+	cnt = tx_info-&gt;num_of_bufs;</div><div class='add'>+</div><div class='add'>+	if (unlikely(!cnt))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (tx_info-&gt;map_linear_data) {</div><div class='add'>+		dma_unmap_single(tx_ring-&gt;dev,</div><div class='add'>+				 dma_unmap_addr(ena_buf, paddr),</div><div class='add'>+				 dma_unmap_len(ena_buf, len),</div><div class='add'>+				 DMA_TO_DEVICE);</div><div class='add'>+		ena_buf++;</div><div class='add'>+		cnt--;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* unmap remaining mapped pages */</div><div class='add'>+	for (i = 0; i &lt; cnt; i++) {</div><div class='add'>+		dma_unmap_page(tx_ring-&gt;dev, dma_unmap_addr(ena_buf, paddr),</div><div class='add'>+			       dma_unmap_len(ena_buf, len), DMA_TO_DEVICE);</div><div class='add'>+		ena_buf++;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ena_free_tx_bufs - Free Tx Buffers per Queue</div><div class='add'>+ * @tx_ring: TX ring for which buffers be freed</div><div class='add'>+ */</div><div class='add'>+static void ena_free_tx_bufs(struct ena_ring *tx_ring)</div><div class='add'>+{</div><div class='add'>+	bool print_once = true;</div><div class='add'>+	bool is_xdp_ring;</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	is_xdp_ring = ENA_IS_XDP_INDEX(tx_ring-&gt;adapter, tx_ring-&gt;qid);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; tx_ring-&gt;ring_size; i++) {</div><div class='add'>+		struct ena_tx_buffer *tx_info = &amp;tx_ring-&gt;tx_buffer_info[i];</div><div class='add'>+</div><div class='add'>+		if (!tx_info-&gt;skb)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (print_once) {</div><div class='add'>+			netif_notice(tx_ring-&gt;adapter, ifdown, tx_ring-&gt;netdev,</div><div class='add'>+				     "Free uncompleted tx skb qid %d idx 0x%x\n",</div><div class='add'>+				     tx_ring-&gt;qid, i);</div><div class='add'>+			print_once = false;</div><div class='add'>+		} else {</div><div class='add'>+			netif_dbg(tx_ring-&gt;adapter, ifdown, tx_ring-&gt;netdev,</div><div class='add'>+				  "Free uncompleted tx skb qid %d idx 0x%x\n",</div><div class='add'>+				  tx_ring-&gt;qid, i);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ena_unmap_tx_buff(tx_ring, tx_info);</div><div class='add'>+</div><div class='add'>+		if (is_xdp_ring)</div><div class='add'>+			xdp_return_frame(tx_info-&gt;xdpf);</div><div class='add'>+		else</div><div class='add'>+			dev_kfree_skb_any(tx_info-&gt;skb);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!is_xdp_ring)</div><div class='add'>+		netdev_tx_reset_queue(netdev_get_tx_queue(tx_ring-&gt;netdev,</div><div class='add'>+							  tx_ring-&gt;qid));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_free_all_tx_bufs(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct ena_ring *tx_ring;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; adapter-&gt;num_io_queues + adapter-&gt;xdp_num_queues; i++) {</div><div class='add'>+		tx_ring = &amp;adapter-&gt;tx_ring[i];</div><div class='add'>+		ena_free_tx_bufs(tx_ring);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_destroy_all_tx_queues(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	u16 ena_qid;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; adapter-&gt;num_io_queues + adapter-&gt;xdp_num_queues; i++) {</div><div class='add'>+		ena_qid = ENA_IO_TXQ_IDX(i);</div><div class='add'>+		ena_com_destroy_io_queue(adapter-&gt;ena_dev, ena_qid);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_destroy_all_rx_queues(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	u16 ena_qid;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; adapter-&gt;num_io_queues; i++) {</div><div class='add'>+		ena_qid = ENA_IO_RXQ_IDX(i);</div><div class='add'>+		cancel_work_sync(&amp;adapter-&gt;ena_napi[i].dim.work);</div><div class='add'>+		ena_xdp_unregister_rxq_info(&amp;adapter-&gt;rx_ring[i]);</div><div class='add'>+		ena_com_destroy_io_queue(adapter-&gt;ena_dev, ena_qid);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_destroy_all_io_queues(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	ena_destroy_all_tx_queues(adapter);</div><div class='add'>+	ena_destroy_all_rx_queues(adapter);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int handle_invalid_req_id(struct ena_ring *ring, u16 req_id,</div><div class='add'>+			  struct ena_tx_buffer *tx_info, bool is_xdp)</div><div class='add'>+{</div><div class='add'>+	if (tx_info)</div><div class='add'>+		netif_err(ring-&gt;adapter,</div><div class='add'>+			  tx_done,</div><div class='add'>+			  ring-&gt;netdev,</div><div class='add'>+			  "tx_info doesn't have valid %s. qid %u req_id %u",</div><div class='add'>+			   is_xdp ? "xdp frame" : "skb", ring-&gt;qid, req_id);</div><div class='add'>+	else</div><div class='add'>+		netif_err(ring-&gt;adapter,</div><div class='add'>+			  tx_done,</div><div class='add'>+			  ring-&gt;netdev,</div><div class='add'>+			  "Invalid req_id %u in qid %u\n",</div><div class='add'>+			  req_id, ring-&gt;qid);</div><div class='add'>+</div><div class='add'>+	ena_increase_stat(&amp;ring-&gt;tx_stats.bad_req_id, 1, &amp;ring-&gt;syncp);</div><div class='add'>+	ena_reset_device(ring-&gt;adapter, ENA_REGS_RESET_INV_TX_REQ_ID);</div><div class='add'>+</div><div class='add'>+	return -EFAULT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int validate_tx_req_id(struct ena_ring *tx_ring, u16 req_id)</div><div class='add'>+{</div><div class='add'>+	struct ena_tx_buffer *tx_info;</div><div class='add'>+</div><div class='add'>+	tx_info = &amp;tx_ring-&gt;tx_buffer_info[req_id];</div><div class='add'>+	if (likely(tx_info-&gt;skb))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return handle_invalid_req_id(tx_ring, req_id, tx_info, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_clean_tx_irq(struct ena_ring *tx_ring, u32 budget)</div><div class='add'>+{</div><div class='add'>+	struct netdev_queue *txq;</div><div class='add'>+	bool above_thresh;</div><div class='add'>+	u32 tx_bytes = 0;</div><div class='add'>+	u32 total_done = 0;</div><div class='add'>+	u16 next_to_clean;</div><div class='add'>+	u16 req_id;</div><div class='add'>+	int tx_pkts = 0;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	next_to_clean = tx_ring-&gt;next_to_clean;</div><div class='add'>+	txq = netdev_get_tx_queue(tx_ring-&gt;netdev, tx_ring-&gt;qid);</div><div class='add'>+</div><div class='add'>+	while (tx_pkts &lt; budget) {</div><div class='add'>+		struct ena_tx_buffer *tx_info;</div><div class='add'>+		struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+		rc = ena_com_tx_comp_req_id_get(tx_ring-&gt;ena_com_io_cq,</div><div class='add'>+						&amp;req_id);</div><div class='add'>+		if (rc) {</div><div class='add'>+			if (unlikely(rc == -EINVAL))</div><div class='add'>+				handle_invalid_req_id(tx_ring, req_id, NULL, false);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* validate that the request id points to a valid skb */</div><div class='add'>+		rc = validate_tx_req_id(tx_ring, req_id);</div><div class='add'>+		if (rc)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		tx_info = &amp;tx_ring-&gt;tx_buffer_info[req_id];</div><div class='add'>+		skb = tx_info-&gt;skb;</div><div class='add'>+</div><div class='add'>+		/* prefetch skb_end_pointer() to speedup skb_shinfo(skb) */</div><div class='add'>+		prefetch(&amp;skb-&gt;end);</div><div class='add'>+</div><div class='add'>+		tx_info-&gt;skb = NULL;</div><div class='add'>+		tx_info-&gt;last_jiffies = 0;</div><div class='add'>+</div><div class='add'>+		ena_unmap_tx_buff(tx_ring, tx_info);</div><div class='add'>+</div><div class='add'>+		netif_dbg(tx_ring-&gt;adapter, tx_done, tx_ring-&gt;netdev,</div><div class='add'>+			  "tx_poll: q %d skb %p completed\n", tx_ring-&gt;qid,</div><div class='add'>+			  skb);</div><div class='add'>+</div><div class='add'>+		tx_bytes += tx_info-&gt;total_tx_size;</div><div class='add'>+		dev_kfree_skb(skb);</div><div class='add'>+		tx_pkts++;</div><div class='add'>+		total_done += tx_info-&gt;tx_descs;</div><div class='add'>+</div><div class='add'>+		tx_ring-&gt;free_ids[next_to_clean] = req_id;</div><div class='add'>+		next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean,</div><div class='add'>+						     tx_ring-&gt;ring_size);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tx_ring-&gt;next_to_clean = next_to_clean;</div><div class='add'>+	ena_com_comp_ack(tx_ring-&gt;ena_com_io_sq, total_done);</div><div class='add'>+</div><div class='add'>+	netdev_tx_completed_queue(txq, tx_pkts, tx_bytes);</div><div class='add'>+</div><div class='add'>+	netif_dbg(tx_ring-&gt;adapter, tx_done, tx_ring-&gt;netdev,</div><div class='add'>+		  "tx_poll: q %d done. total pkts: %d\n",</div><div class='add'>+		  tx_ring-&gt;qid, tx_pkts);</div><div class='add'>+</div><div class='add'>+	/* need to make the rings circular update visible to</div><div class='add'>+	 * ena_start_xmit() before checking for netif_queue_stopped().</div><div class='add'>+	 */</div><div class='add'>+	smp_mb();</div><div class='add'>+</div><div class='add'>+	above_thresh = ena_com_sq_have_enough_space(tx_ring-&gt;ena_com_io_sq,</div><div class='add'>+						    ENA_TX_WAKEUP_THRESH);</div><div class='add'>+	if (unlikely(netif_tx_queue_stopped(txq) &amp;&amp; above_thresh)) {</div><div class='add'>+		__netif_tx_lock(txq, smp_processor_id());</div><div class='add'>+		above_thresh =</div><div class='add'>+			ena_com_sq_have_enough_space(tx_ring-&gt;ena_com_io_sq,</div><div class='add'>+						     ENA_TX_WAKEUP_THRESH);</div><div class='add'>+		if (netif_tx_queue_stopped(txq) &amp;&amp; above_thresh &amp;&amp;</div><div class='add'>+		    test_bit(ENA_FLAG_DEV_UP, &amp;tx_ring-&gt;adapter-&gt;flags)) {</div><div class='add'>+			netif_tx_wake_queue(txq);</div><div class='add'>+			ena_increase_stat(&amp;tx_ring-&gt;tx_stats.queue_wakeup, 1,</div><div class='add'>+					  &amp;tx_ring-&gt;syncp);</div><div class='add'>+		}</div><div class='add'>+		__netif_tx_unlock(txq);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return tx_pkts;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct sk_buff *ena_alloc_skb(struct ena_ring *rx_ring, void *first_frag, u16 len)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	if (!first_frag)</div><div class='add'>+		skb = napi_alloc_skb(rx_ring-&gt;napi, len);</div><div class='add'>+	else</div><div class='add'>+		skb = napi_build_skb(first_frag, len);</div><div class='add'>+</div><div class='add'>+	if (unlikely(!skb)) {</div><div class='add'>+		ena_increase_stat(&amp;rx_ring-&gt;rx_stats.skb_alloc_fail, 1,</div><div class='add'>+				  &amp;rx_ring-&gt;syncp);</div><div class='add'>+</div><div class='add'>+		netif_dbg(rx_ring-&gt;adapter, rx_err, rx_ring-&gt;netdev,</div><div class='add'>+			  "Failed to allocate skb. first_frag %s\n",</div><div class='add'>+			  first_frag ? "provided" : "not provided");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return skb;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool ena_try_rx_buf_page_reuse(struct ena_rx_buffer *rx_info, u16 buf_len,</div><div class='add'>+				      u16 len, int pkt_offset)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_buf *ena_buf = &amp;rx_info-&gt;ena_buf;</div><div class='add'>+</div><div class='add'>+	/* More than ENA_MIN_RX_BUF_SIZE left in the reused buffer</div><div class='add'>+	 * for data + headroom + tailroom.</div><div class='add'>+	 */</div><div class='add'>+	if (SKB_DATA_ALIGN(len + pkt_offset) + ENA_MIN_RX_BUF_SIZE &lt;= ena_buf-&gt;len) {</div><div class='add'>+		page_ref_inc(rx_info-&gt;page);</div><div class='add'>+		rx_info-&gt;page_offset += buf_len;</div><div class='add'>+		ena_buf-&gt;paddr += buf_len;</div><div class='add'>+		ena_buf-&gt;len -= buf_len;</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct sk_buff *ena_rx_skb(struct ena_ring *rx_ring,</div><div class='add'>+				  struct ena_com_rx_buf_info *ena_bufs,</div><div class='add'>+				  u32 descs,</div><div class='add'>+				  u16 *next_to_clean)</div><div class='add'>+{</div><div class='add'>+	int tailroom = SKB_DATA_ALIGN(sizeof(struct skb_shared_info));</div><div class='add'>+	bool is_xdp_loaded = ena_xdp_present_ring(rx_ring);</div><div class='add'>+	struct ena_rx_buffer *rx_info;</div><div class='add'>+	struct ena_adapter *adapter;</div><div class='add'>+	int page_offset, pkt_offset;</div><div class='add'>+	dma_addr_t pre_reuse_paddr;</div><div class='add'>+	u16 len, req_id, buf = 0;</div><div class='add'>+	bool reuse_rx_buf_page;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	void *buf_addr;</div><div class='add'>+	int buf_offset;</div><div class='add'>+	u16 buf_len;</div><div class='add'>+</div><div class='add'>+	len = ena_bufs[buf].len;</div><div class='add'>+	req_id = ena_bufs[buf].req_id;</div><div class='add'>+</div><div class='add'>+	rx_info = &amp;rx_ring-&gt;rx_buffer_info[req_id];</div><div class='add'>+</div><div class='add'>+	if (unlikely(!rx_info-&gt;page)) {</div><div class='add'>+		adapter = rx_ring-&gt;adapter;</div><div class='add'>+		netif_err(adapter, rx_err, rx_ring-&gt;netdev,</div><div class='add'>+			  "Page is NULL. qid %u req_id %u\n", rx_ring-&gt;qid, req_id);</div><div class='add'>+		ena_increase_stat(&amp;rx_ring-&gt;rx_stats.bad_req_id, 1, &amp;rx_ring-&gt;syncp);</div><div class='add'>+		ena_reset_device(adapter, ENA_REGS_RESET_INV_RX_REQ_ID);</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netif_dbg(rx_ring-&gt;adapter, rx_status, rx_ring-&gt;netdev,</div><div class='add'>+		  "rx_info %p page %p\n",</div><div class='add'>+		  rx_info, rx_info-&gt;page);</div><div class='add'>+</div><div class='add'>+	buf_offset = rx_info-&gt;buf_offset;</div><div class='add'>+	pkt_offset = buf_offset - rx_ring-&gt;rx_headroom;</div><div class='add'>+	page_offset = rx_info-&gt;page_offset;</div><div class='add'>+	buf_addr = page_address(rx_info-&gt;page) + page_offset;</div><div class='add'>+</div><div class='add'>+	if (len &lt;= rx_ring-&gt;rx_copybreak) {</div><div class='add'>+		skb = ena_alloc_skb(rx_ring, NULL, len);</div><div class='add'>+		if (unlikely(!skb))</div><div class='add'>+			return NULL;</div><div class='add'>+</div><div class='add'>+		skb_copy_to_linear_data(skb, buf_addr + buf_offset, len);</div><div class='add'>+		dma_sync_single_for_device(rx_ring-&gt;dev,</div><div class='add'>+					   dma_unmap_addr(&amp;rx_info-&gt;ena_buf, paddr) + pkt_offset,</div><div class='add'>+					   len,</div><div class='add'>+					   DMA_FROM_DEVICE);</div><div class='add'>+</div><div class='add'>+		skb_put(skb, len);</div><div class='add'>+		netif_dbg(rx_ring-&gt;adapter, rx_status, rx_ring-&gt;netdev,</div><div class='add'>+			  "RX allocated small packet. len %d.\n", skb-&gt;len);</div><div class='add'>+		skb-&gt;protocol = eth_type_trans(skb, rx_ring-&gt;netdev);</div><div class='add'>+		rx_ring-&gt;free_ids[*next_to_clean] = req_id;</div><div class='add'>+		*next_to_clean = ENA_RX_RING_IDX_ADD(*next_to_clean, descs,</div><div class='add'>+						     rx_ring-&gt;ring_size);</div><div class='add'>+		return skb;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	buf_len = SKB_DATA_ALIGN(len + buf_offset + tailroom);</div><div class='add'>+</div><div class='add'>+	/* If XDP isn't loaded try to reuse part of the RX buffer */</div><div class='add'>+	reuse_rx_buf_page = !is_xdp_loaded &amp;&amp;</div><div class='add'>+			    ena_try_rx_buf_page_reuse(rx_info, buf_len, len, pkt_offset);</div><div class='add'>+</div><div class='add'>+	if (!reuse_rx_buf_page)</div><div class='add'>+		ena_unmap_rx_buff_attrs(rx_ring, rx_info, DMA_ATTR_SKIP_CPU_SYNC);</div><div class='add'>+</div><div class='add'>+	skb = ena_alloc_skb(rx_ring, buf_addr, buf_len);</div><div class='add'>+	if (unlikely(!skb))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	/* Populate skb's linear part */</div><div class='add'>+	skb_reserve(skb, buf_offset);</div><div class='add'>+	skb_put(skb, len);</div><div class='add'>+	skb-&gt;protocol = eth_type_trans(skb, rx_ring-&gt;netdev);</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		netif_dbg(rx_ring-&gt;adapter, rx_status, rx_ring-&gt;netdev,</div><div class='add'>+			  "RX skb updated. len %d. data_len %d\n",</div><div class='add'>+			  skb-&gt;len, skb-&gt;data_len);</div><div class='add'>+</div><div class='add'>+		if (!reuse_rx_buf_page)</div><div class='add'>+			rx_info-&gt;page = NULL;</div><div class='add'>+</div><div class='add'>+		rx_ring-&gt;free_ids[*next_to_clean] = req_id;</div><div class='add'>+		*next_to_clean =</div><div class='add'>+			ENA_RX_RING_IDX_NEXT(*next_to_clean,</div><div class='add'>+					     rx_ring-&gt;ring_size);</div><div class='add'>+		if (likely(--descs == 0))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		buf++;</div><div class='add'>+		len = ena_bufs[buf].len;</div><div class='add'>+		req_id = ena_bufs[buf].req_id;</div><div class='add'>+</div><div class='add'>+		rx_info = &amp;rx_ring-&gt;rx_buffer_info[req_id];</div><div class='add'>+</div><div class='add'>+		/* rx_info-&gt;buf_offset includes rx_ring-&gt;rx_headroom */</div><div class='add'>+		buf_offset = rx_info-&gt;buf_offset;</div><div class='add'>+		pkt_offset = buf_offset - rx_ring-&gt;rx_headroom;</div><div class='add'>+		buf_len = SKB_DATA_ALIGN(len + buf_offset + tailroom);</div><div class='add'>+		page_offset = rx_info-&gt;page_offset;</div><div class='add'>+</div><div class='add'>+		pre_reuse_paddr = dma_unmap_addr(&amp;rx_info-&gt;ena_buf, paddr);</div><div class='add'>+</div><div class='add'>+		reuse_rx_buf_page = !is_xdp_loaded &amp;&amp;</div><div class='add'>+				    ena_try_rx_buf_page_reuse(rx_info, buf_len, len, pkt_offset);</div><div class='add'>+</div><div class='add'>+		dma_sync_single_for_cpu(rx_ring-&gt;dev,</div><div class='add'>+					pre_reuse_paddr + pkt_offset,</div><div class='add'>+					len,</div><div class='add'>+					DMA_FROM_DEVICE);</div><div class='add'>+</div><div class='add'>+		if (!reuse_rx_buf_page)</div><div class='add'>+			ena_unmap_rx_buff_attrs(rx_ring, rx_info, DMA_ATTR_SKIP_CPU_SYNC);</div><div class='add'>+</div><div class='add'>+		skb_add_rx_frag(skb, skb_shinfo(skb)-&gt;nr_frags, rx_info-&gt;page,</div><div class='add'>+				page_offset + buf_offset, len, buf_len);</div><div class='add'>+</div><div class='add'>+	} while (1);</div><div class='add'>+</div><div class='add'>+	return skb;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ena_rx_checksum - indicate in skb if hw indicated a good cksum</div><div class='add'>+ * @adapter: structure containing adapter specific data</div><div class='add'>+ * @ena_rx_ctx: received packet context/metadata</div><div class='add'>+ * @skb: skb currently being received and modified</div><div class='add'>+ */</div><div class='add'>+static void ena_rx_checksum(struct ena_ring *rx_ring,</div><div class='add'>+				   struct ena_com_rx_ctx *ena_rx_ctx,</div><div class='add'>+				   struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	/* Rx csum disabled */</div><div class='add'>+	if (unlikely(!(rx_ring-&gt;netdev-&gt;features &amp; NETIF_F_RXCSUM))) {</div><div class='add'>+		skb-&gt;ip_summed = CHECKSUM_NONE;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* For fragmented packets the checksum isn't valid */</div><div class='add'>+	if (ena_rx_ctx-&gt;frag) {</div><div class='add'>+		skb-&gt;ip_summed = CHECKSUM_NONE;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* if IP and error */</div><div class='add'>+	if (unlikely((ena_rx_ctx-&gt;l3_proto == ENA_ETH_IO_L3_PROTO_IPV4) &amp;&amp;</div><div class='add'>+		     (ena_rx_ctx-&gt;l3_csum_err))) {</div><div class='add'>+		/* ipv4 checksum error */</div><div class='add'>+		skb-&gt;ip_summed = CHECKSUM_NONE;</div><div class='add'>+		ena_increase_stat(&amp;rx_ring-&gt;rx_stats.csum_bad, 1,</div><div class='add'>+				  &amp;rx_ring-&gt;syncp);</div><div class='add'>+		netif_dbg(rx_ring-&gt;adapter, rx_err, rx_ring-&gt;netdev,</div><div class='add'>+			  "RX IPv4 header checksum error\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* if TCP/UDP */</div><div class='add'>+	if (likely((ena_rx_ctx-&gt;l4_proto == ENA_ETH_IO_L4_PROTO_TCP) ||</div><div class='add'>+		   (ena_rx_ctx-&gt;l4_proto == ENA_ETH_IO_L4_PROTO_UDP))) {</div><div class='add'>+		if (unlikely(ena_rx_ctx-&gt;l4_csum_err)) {</div><div class='add'>+			/* TCP/UDP checksum error */</div><div class='add'>+			ena_increase_stat(&amp;rx_ring-&gt;rx_stats.csum_bad, 1,</div><div class='add'>+					  &amp;rx_ring-&gt;syncp);</div><div class='add'>+			netif_dbg(rx_ring-&gt;adapter, rx_err, rx_ring-&gt;netdev,</div><div class='add'>+				  "RX L4 checksum error\n");</div><div class='add'>+			skb-&gt;ip_summed = CHECKSUM_NONE;</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (likely(ena_rx_ctx-&gt;l4_csum_checked)) {</div><div class='add'>+			skb-&gt;ip_summed = CHECKSUM_UNNECESSARY;</div><div class='add'>+			ena_increase_stat(&amp;rx_ring-&gt;rx_stats.csum_good, 1,</div><div class='add'>+					  &amp;rx_ring-&gt;syncp);</div><div class='add'>+		} else {</div><div class='add'>+			ena_increase_stat(&amp;rx_ring-&gt;rx_stats.csum_unchecked, 1,</div><div class='add'>+					  &amp;rx_ring-&gt;syncp);</div><div class='add'>+			skb-&gt;ip_summed = CHECKSUM_NONE;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		skb-&gt;ip_summed = CHECKSUM_NONE;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_set_rx_hash(struct ena_ring *rx_ring,</div><div class='add'>+			    struct ena_com_rx_ctx *ena_rx_ctx,</div><div class='add'>+			    struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	enum pkt_hash_types hash_type;</div><div class='add'>+</div><div class='add'>+	if (likely(rx_ring-&gt;netdev-&gt;features &amp; NETIF_F_RXHASH)) {</div><div class='add'>+		if (likely((ena_rx_ctx-&gt;l4_proto == ENA_ETH_IO_L4_PROTO_TCP) ||</div><div class='add'>+			   (ena_rx_ctx-&gt;l4_proto == ENA_ETH_IO_L4_PROTO_UDP)))</div><div class='add'>+</div><div class='add'>+			hash_type = PKT_HASH_TYPE_L4;</div><div class='add'>+		else</div><div class='add'>+			hash_type = PKT_HASH_TYPE_NONE;</div><div class='add'>+</div><div class='add'>+		/* Override hash type if the packet is fragmented */</div><div class='add'>+		if (ena_rx_ctx-&gt;frag)</div><div class='add'>+			hash_type = PKT_HASH_TYPE_NONE;</div><div class='add'>+</div><div class='add'>+		skb_set_hash(skb, ena_rx_ctx-&gt;hash, hash_type);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_xdp_handle_buff(struct ena_ring *rx_ring, struct xdp_buff *xdp, u16 num_descs)</div><div class='add'>+{</div><div class='add'>+	struct ena_rx_buffer *rx_info;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* XDP multi-buffer packets not supported */</div><div class='add'>+	if (unlikely(num_descs &gt; 1)) {</div><div class='add'>+		netdev_err_once(rx_ring-&gt;adapter-&gt;netdev,</div><div class='add'>+				"xdp: dropped unsupported multi-buffer packets\n");</div><div class='add'>+		ena_increase_stat(&amp;rx_ring-&gt;rx_stats.xdp_drop, 1, &amp;rx_ring-&gt;syncp);</div><div class='add'>+		return ENA_XDP_DROP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rx_info = &amp;rx_ring-&gt;rx_buffer_info[rx_ring-&gt;ena_bufs[0].req_id];</div><div class='add'>+	xdp_prepare_buff(xdp, page_address(rx_info-&gt;page),</div><div class='add'>+			 rx_info-&gt;buf_offset,</div><div class='add'>+			 rx_ring-&gt;ena_bufs[0].len, false);</div><div class='add'>+</div><div class='add'>+	ret = ena_xdp_execute(rx_ring, xdp);</div><div class='add'>+</div><div class='add'>+	/* The xdp program might expand the headers */</div><div class='add'>+	if (ret == ENA_XDP_PASS) {</div><div class='add'>+		rx_info-&gt;buf_offset = xdp-&gt;data - xdp-&gt;data_hard_start;</div><div class='add'>+		rx_ring-&gt;ena_bufs[0].len = xdp-&gt;data_end - xdp-&gt;data;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ena_clean_rx_irq - Cleanup RX irq</div><div class='add'>+ * @rx_ring: RX ring to clean</div><div class='add'>+ * @napi: napi handler</div><div class='add'>+ * @budget: how many packets driver is allowed to clean</div><div class='add'>+ *</div><div class='add'>+ * Returns the number of cleaned buffers.</div><div class='add'>+ */</div><div class='add'>+static int ena_clean_rx_irq(struct ena_ring *rx_ring, struct napi_struct *napi,</div><div class='add'>+			    u32 budget)</div><div class='add'>+{</div><div class='add'>+	u16 next_to_clean = rx_ring-&gt;next_to_clean;</div><div class='add'>+	struct ena_com_rx_ctx ena_rx_ctx;</div><div class='add'>+	struct ena_rx_buffer *rx_info;</div><div class='add'>+	struct ena_adapter *adapter;</div><div class='add'>+	u32 res_budget, work_done;</div><div class='add'>+	int rx_copybreak_pkt = 0;</div><div class='add'>+	int refill_threshold;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	int refill_required;</div><div class='add'>+	struct xdp_buff xdp;</div><div class='add'>+	int xdp_flags = 0;</div><div class='add'>+	int total_len = 0;</div><div class='add'>+	int xdp_verdict;</div><div class='add'>+	u8 pkt_offset;</div><div class='add'>+	int rc = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	netif_dbg(rx_ring-&gt;adapter, rx_status, rx_ring-&gt;netdev,</div><div class='add'>+		  "%s qid %d\n", __func__, rx_ring-&gt;qid);</div><div class='add'>+	res_budget = budget;</div><div class='add'>+	xdp_init_buff(&amp;xdp, ENA_PAGE_SIZE, &amp;rx_ring-&gt;xdp_rxq);</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		xdp_verdict = ENA_XDP_PASS;</div><div class='add'>+		skb = NULL;</div><div class='add'>+		ena_rx_ctx.ena_bufs = rx_ring-&gt;ena_bufs;</div><div class='add'>+		ena_rx_ctx.max_bufs = rx_ring-&gt;sgl_size;</div><div class='add'>+		ena_rx_ctx.descs = 0;</div><div class='add'>+		ena_rx_ctx.pkt_offset = 0;</div><div class='add'>+		rc = ena_com_rx_pkt(rx_ring-&gt;ena_com_io_cq,</div><div class='add'>+				    rx_ring-&gt;ena_com_io_sq,</div><div class='add'>+				    &amp;ena_rx_ctx);</div><div class='add'>+		if (unlikely(rc))</div><div class='add'>+			goto error;</div><div class='add'>+</div><div class='add'>+		if (unlikely(ena_rx_ctx.descs == 0))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		/* First descriptor might have an offset set by the device */</div><div class='add'>+		rx_info = &amp;rx_ring-&gt;rx_buffer_info[rx_ring-&gt;ena_bufs[0].req_id];</div><div class='add'>+		pkt_offset = ena_rx_ctx.pkt_offset;</div><div class='add'>+		rx_info-&gt;buf_offset += pkt_offset;</div><div class='add'>+</div><div class='add'>+		netif_dbg(rx_ring-&gt;adapter, rx_status, rx_ring-&gt;netdev,</div><div class='add'>+			  "rx_poll: q %d got packet from ena. descs #: %d l3 proto %d l4 proto %d hash: %x\n",</div><div class='add'>+			  rx_ring-&gt;qid, ena_rx_ctx.descs, ena_rx_ctx.l3_proto,</div><div class='add'>+			  ena_rx_ctx.l4_proto, ena_rx_ctx.hash);</div><div class='add'>+</div><div class='add'>+		dma_sync_single_for_cpu(rx_ring-&gt;dev,</div><div class='add'>+					dma_unmap_addr(&amp;rx_info-&gt;ena_buf, paddr) + pkt_offset,</div><div class='add'>+					rx_ring-&gt;ena_bufs[0].len,</div><div class='add'>+					DMA_FROM_DEVICE);</div><div class='add'>+</div><div class='add'>+		if (ena_xdp_present_ring(rx_ring))</div><div class='add'>+			xdp_verdict = ena_xdp_handle_buff(rx_ring, &amp;xdp, ena_rx_ctx.descs);</div><div class='add'>+</div><div class='add'>+		/* allocate skb and fill it */</div><div class='add'>+		if (xdp_verdict == ENA_XDP_PASS)</div><div class='add'>+			skb = ena_rx_skb(rx_ring,</div><div class='add'>+					 rx_ring-&gt;ena_bufs,</div><div class='add'>+					 ena_rx_ctx.descs,</div><div class='add'>+					 &amp;next_to_clean);</div><div class='add'>+</div><div class='add'>+		if (unlikely(!skb)) {</div><div class='add'>+			for (i = 0; i &lt; ena_rx_ctx.descs; i++) {</div><div class='add'>+				int req_id = rx_ring-&gt;ena_bufs[i].req_id;</div><div class='add'>+</div><div class='add'>+				rx_ring-&gt;free_ids[next_to_clean] = req_id;</div><div class='add'>+				next_to_clean =</div><div class='add'>+					ENA_RX_RING_IDX_NEXT(next_to_clean,</div><div class='add'>+							     rx_ring-&gt;ring_size);</div><div class='add'>+</div><div class='add'>+				/* Packets was passed for transmission, unmap it</div><div class='add'>+				 * from RX side.</div><div class='add'>+				 */</div><div class='add'>+				if (xdp_verdict &amp; ENA_XDP_FORWARDED) {</div><div class='add'>+					ena_unmap_rx_buff_attrs(rx_ring,</div><div class='add'>+								&amp;rx_ring-&gt;rx_buffer_info[req_id],</div><div class='add'>+								DMA_ATTR_SKIP_CPU_SYNC);</div><div class='add'>+					rx_ring-&gt;rx_buffer_info[req_id].page = NULL;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+			if (xdp_verdict != ENA_XDP_PASS) {</div><div class='add'>+				xdp_flags |= xdp_verdict;</div><div class='add'>+				total_len += ena_rx_ctx.ena_bufs[0].len;</div><div class='add'>+				res_budget--;</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ena_rx_checksum(rx_ring, &amp;ena_rx_ctx, skb);</div><div class='add'>+</div><div class='add'>+		ena_set_rx_hash(rx_ring, &amp;ena_rx_ctx, skb);</div><div class='add'>+</div><div class='add'>+		skb_record_rx_queue(skb, rx_ring-&gt;qid);</div><div class='add'>+</div><div class='add'>+		if (rx_ring-&gt;ena_bufs[0].len &lt;= rx_ring-&gt;rx_copybreak)</div><div class='add'>+			rx_copybreak_pkt++;</div><div class='add'>+</div><div class='add'>+		total_len += skb-&gt;len;</div><div class='add'>+</div><div class='add'>+		napi_gro_receive(napi, skb);</div><div class='add'>+</div><div class='add'>+		res_budget--;</div><div class='add'>+	} while (likely(res_budget));</div><div class='add'>+</div><div class='add'>+	work_done = budget - res_budget;</div><div class='add'>+	rx_ring-&gt;per_napi_packets += work_done;</div><div class='add'>+	u64_stats_update_begin(&amp;rx_ring-&gt;syncp);</div><div class='add'>+	rx_ring-&gt;rx_stats.bytes += total_len;</div><div class='add'>+	rx_ring-&gt;rx_stats.cnt += work_done;</div><div class='add'>+	rx_ring-&gt;rx_stats.rx_copybreak_pkt += rx_copybreak_pkt;</div><div class='add'>+	u64_stats_update_end(&amp;rx_ring-&gt;syncp);</div><div class='add'>+</div><div class='add'>+	rx_ring-&gt;next_to_clean = next_to_clean;</div><div class='add'>+</div><div class='add'>+	refill_required = ena_com_free_q_entries(rx_ring-&gt;ena_com_io_sq);</div><div class='add'>+	refill_threshold =</div><div class='add'>+		min_t(int, rx_ring-&gt;ring_size / ENA_RX_REFILL_THRESH_DIVIDER,</div><div class='add'>+		      ENA_RX_REFILL_THRESH_PACKET);</div><div class='add'>+</div><div class='add'>+	/* Optimization, try to batch new rx buffers */</div><div class='add'>+	if (refill_required &gt; refill_threshold)</div><div class='add'>+		ena_refill_rx_bufs(rx_ring, refill_required);</div><div class='add'>+</div><div class='add'>+	if (xdp_flags &amp; ENA_XDP_REDIRECT)</div><div class='add'>+		xdp_do_flush();</div><div class='add'>+</div><div class='add'>+	return work_done;</div><div class='add'>+</div><div class='add'>+error:</div><div class='add'>+	if (xdp_flags &amp; ENA_XDP_REDIRECT)</div><div class='add'>+		xdp_do_flush();</div><div class='add'>+</div><div class='add'>+	adapter = netdev_priv(rx_ring-&gt;netdev);</div><div class='add'>+</div><div class='add'>+	if (rc == -ENOSPC) {</div><div class='add'>+		ena_increase_stat(&amp;rx_ring-&gt;rx_stats.bad_desc_num, 1, &amp;rx_ring-&gt;syncp);</div><div class='add'>+		ena_reset_device(adapter, ENA_REGS_RESET_TOO_MANY_RX_DESCS);</div><div class='add'>+	} else if (rc == -EFAULT) {</div><div class='add'>+		ena_reset_device(adapter, ENA_REGS_RESET_RX_DESCRIPTOR_MALFORMED);</div><div class='add'>+	} else {</div><div class='add'>+		ena_increase_stat(&amp;rx_ring-&gt;rx_stats.bad_req_id, 1,</div><div class='add'>+				  &amp;rx_ring-&gt;syncp);</div><div class='add'>+		ena_reset_device(adapter, ENA_REGS_RESET_INV_RX_REQ_ID);</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_dim_work(struct work_struct *w)</div><div class='add'>+{</div><div class='add'>+	struct dim *dim = container_of(w, struct dim, work);</div><div class='add'>+	struct dim_cq_moder cur_moder =</div><div class='add'>+		net_dim_get_rx_moderation(dim-&gt;mode, dim-&gt;profile_ix);</div><div class='add'>+	struct ena_napi *ena_napi = container_of(dim, struct ena_napi, dim);</div><div class='add'>+</div><div class='add'>+	ena_napi-&gt;rx_ring-&gt;smoothed_interval = cur_moder.usec;</div><div class='add'>+	dim-&gt;state = DIM_START_MEASURE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_adjust_adaptive_rx_intr_moderation(struct ena_napi *ena_napi)</div><div class='add'>+{</div><div class='add'>+	struct dim_sample dim_sample;</div><div class='add'>+	struct ena_ring *rx_ring = ena_napi-&gt;rx_ring;</div><div class='add'>+</div><div class='add'>+	if (!rx_ring-&gt;per_napi_packets)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	rx_ring-&gt;non_empty_napi_events++;</div><div class='add'>+</div><div class='add'>+	dim_update_sample(rx_ring-&gt;non_empty_napi_events,</div><div class='add'>+			  rx_ring-&gt;rx_stats.cnt,</div><div class='add'>+			  rx_ring-&gt;rx_stats.bytes,</div><div class='add'>+			  &amp;dim_sample);</div><div class='add'>+</div><div class='add'>+	net_dim(&amp;ena_napi-&gt;dim, &amp;dim_sample);</div><div class='add'>+</div><div class='add'>+	rx_ring-&gt;per_napi_packets = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_unmask_interrupt(struct ena_ring *tx_ring,</div><div class='add'>+			  struct ena_ring *rx_ring)</div><div class='add'>+{</div><div class='add'>+	u32 rx_interval = tx_ring-&gt;smoothed_interval;</div><div class='add'>+	struct ena_eth_io_intr_reg intr_reg;</div><div class='add'>+</div><div class='add'>+	/* Rx ring can be NULL when for XDP tx queues which don't have an</div><div class='add'>+	 * accompanying rx_ring pair.</div><div class='add'>+	 */</div><div class='add'>+	if (rx_ring)</div><div class='add'>+		rx_interval = ena_com_get_adaptive_moderation_enabled(rx_ring-&gt;ena_dev) ?</div><div class='add'>+			rx_ring-&gt;smoothed_interval :</div><div class='add'>+			ena_com_get_nonadaptive_moderation_interval_rx(rx_ring-&gt;ena_dev);</div><div class='add'>+</div><div class='add'>+	/* Update intr register: rx intr delay,</div><div class='add'>+	 * tx intr delay and interrupt unmask</div><div class='add'>+	 */</div><div class='add'>+	ena_com_update_intr_reg(&amp;intr_reg,</div><div class='add'>+				rx_interval,</div><div class='add'>+				tx_ring-&gt;smoothed_interval,</div><div class='add'>+				true);</div><div class='add'>+</div><div class='add'>+	ena_increase_stat(&amp;tx_ring-&gt;tx_stats.unmask_interrupt, 1,</div><div class='add'>+			  &amp;tx_ring-&gt;syncp);</div><div class='add'>+</div><div class='add'>+	/* It is a shared MSI-X.</div><div class='add'>+	 * Tx and Rx CQ have pointer to it.</div><div class='add'>+	 * So we use one of them to reach the intr reg</div><div class='add'>+	 * The Tx ring is used because the rx_ring is NULL for XDP queues</div><div class='add'>+	 */</div><div class='add'>+	ena_com_unmask_intr(tx_ring-&gt;ena_com_io_cq, &amp;intr_reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_update_ring_numa_node(struct ena_ring *tx_ring,</div><div class='add'>+			       struct ena_ring *rx_ring)</div><div class='add'>+{</div><div class='add'>+	int cpu = get_cpu();</div><div class='add'>+	int numa_node;</div><div class='add'>+</div><div class='add'>+	/* Check only one ring since the 2 rings are running on the same cpu */</div><div class='add'>+	if (likely(tx_ring-&gt;cpu == cpu))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	tx_ring-&gt;cpu = cpu;</div><div class='add'>+	if (rx_ring)</div><div class='add'>+		rx_ring-&gt;cpu = cpu;</div><div class='add'>+</div><div class='add'>+	numa_node = cpu_to_node(cpu);</div><div class='add'>+</div><div class='add'>+	if (likely(tx_ring-&gt;numa_node == numa_node))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	put_cpu();</div><div class='add'>+</div><div class='add'>+	if (numa_node != NUMA_NO_NODE) {</div><div class='add'>+		ena_com_update_numa_node(tx_ring-&gt;ena_com_io_cq, numa_node);</div><div class='add'>+		tx_ring-&gt;numa_node = numa_node;</div><div class='add'>+		if (rx_ring) {</div><div class='add'>+			rx_ring-&gt;numa_node = numa_node;</div><div class='add'>+			ena_com_update_numa_node(rx_ring-&gt;ena_com_io_cq,</div><div class='add'>+						 numa_node);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return;</div><div class='add'>+out:</div><div class='add'>+	put_cpu();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_io_poll(struct napi_struct *napi, int budget)</div><div class='add'>+{</div><div class='add'>+	struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi);</div><div class='add'>+	struct ena_ring *tx_ring, *rx_ring;</div><div class='add'>+	int tx_work_done;</div><div class='add'>+	int rx_work_done = 0;</div><div class='add'>+	int tx_budget;</div><div class='add'>+	int napi_comp_call = 0;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	tx_ring = ena_napi-&gt;tx_ring;</div><div class='add'>+	rx_ring = ena_napi-&gt;rx_ring;</div><div class='add'>+</div><div class='add'>+	tx_budget = tx_ring-&gt;ring_size / ENA_TX_POLL_BUDGET_DIVIDER;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(ENA_FLAG_DEV_UP, &amp;tx_ring-&gt;adapter-&gt;flags) ||</div><div class='add'>+	    test_bit(ENA_FLAG_TRIGGER_RESET, &amp;tx_ring-&gt;adapter-&gt;flags)) {</div><div class='add'>+		napi_complete_done(napi, 0);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tx_work_done = ena_clean_tx_irq(tx_ring, tx_budget);</div><div class='add'>+	/* On netpoll the budget is zero and the handler should only clean the</div><div class='add'>+	 * tx completions.</div><div class='add'>+	 */</div><div class='add'>+	if (likely(budget))</div><div class='add'>+		rx_work_done = ena_clean_rx_irq(rx_ring, napi, budget);</div><div class='add'>+</div><div class='add'>+	/* If the device is about to reset or down, avoid unmask</div><div class='add'>+	 * the interrupt and return 0 so NAPI won't reschedule</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &amp;tx_ring-&gt;adapter-&gt;flags) ||</div><div class='add'>+		     test_bit(ENA_FLAG_TRIGGER_RESET, &amp;tx_ring-&gt;adapter-&gt;flags))) {</div><div class='add'>+		napi_complete_done(napi, 0);</div><div class='add'>+		ret = 0;</div><div class='add'>+</div><div class='add'>+	} else if ((budget &gt; rx_work_done) &amp;&amp; (tx_budget &gt; tx_work_done)) {</div><div class='add'>+		napi_comp_call = 1;</div><div class='add'>+</div><div class='add'>+		/* Update numa and unmask the interrupt only when schedule</div><div class='add'>+		 * from the interrupt context (vs from sk_busy_loop)</div><div class='add'>+		 */</div><div class='add'>+		if (napi_complete_done(napi, rx_work_done) &amp;&amp;</div><div class='add'>+		    READ_ONCE(ena_napi-&gt;interrupts_masked)) {</div><div class='add'>+			smp_rmb(); /* make sure interrupts_masked is read */</div><div class='add'>+			WRITE_ONCE(ena_napi-&gt;interrupts_masked, false);</div><div class='add'>+			/* We apply adaptive moderation on Rx path only.</div><div class='add'>+			 * Tx uses static interrupt moderation.</div><div class='add'>+			 */</div><div class='add'>+			if (ena_com_get_adaptive_moderation_enabled(rx_ring-&gt;ena_dev))</div><div class='add'>+				ena_adjust_adaptive_rx_intr_moderation(ena_napi);</div><div class='add'>+</div><div class='add'>+			ena_update_ring_numa_node(tx_ring, rx_ring);</div><div class='add'>+			ena_unmask_interrupt(tx_ring, rx_ring);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = rx_work_done;</div><div class='add'>+	} else {</div><div class='add'>+		ret = budget;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	u64_stats_update_begin(&amp;tx_ring-&gt;syncp);</div><div class='add'>+	tx_ring-&gt;tx_stats.napi_comp += napi_comp_call;</div><div class='add'>+	tx_ring-&gt;tx_stats.tx_poll++;</div><div class='add'>+	u64_stats_update_end(&amp;tx_ring-&gt;syncp);</div><div class='add'>+</div><div class='add'>+	tx_ring-&gt;tx_stats.last_napi_jiffies = jiffies;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t ena_intr_msix_mgmnt(int irq, void *data)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = (struct ena_adapter *)data;</div><div class='add'>+</div><div class='add'>+	ena_com_admin_q_comp_intr_handler(adapter-&gt;ena_dev);</div><div class='add'>+</div><div class='add'>+	/* Don't call the aenq handler before probe is done */</div><div class='add'>+	if (likely(test_bit(ENA_FLAG_DEVICE_RUNNING, &amp;adapter-&gt;flags)))</div><div class='add'>+		ena_com_aenq_intr_handler(adapter-&gt;ena_dev, data);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ena_intr_msix_io - MSI-X Interrupt Handler for Tx/Rx</div><div class='add'>+ * @irq: interrupt number</div><div class='add'>+ * @data: pointer to a network interface private napi device structure</div><div class='add'>+ */</div><div class='add'>+static irqreturn_t ena_intr_msix_io(int irq, void *data)</div><div class='add'>+{</div><div class='add'>+	struct ena_napi *ena_napi = data;</div><div class='add'>+</div><div class='add'>+	/* Used to check HW health */</div><div class='add'>+	WRITE_ONCE(ena_napi-&gt;first_interrupt, true);</div><div class='add'>+</div><div class='add'>+	WRITE_ONCE(ena_napi-&gt;interrupts_masked, true);</div><div class='add'>+	smp_wmb(); /* write interrupts_masked before calling napi */</div><div class='add'>+</div><div class='add'>+	napi_schedule_irqoff(&amp;ena_napi-&gt;napi);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Reserve a single MSI-X vector for management (admin + aenq).</div><div class='add'>+ * plus reserve one vector for each potential io queue.</div><div class='add'>+ * the number of potential io queues is the minimum of what the device</div><div class='add'>+ * supports and the number of vCPUs.</div><div class='add'>+ */</div><div class='add'>+static int ena_enable_msix(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	int msix_vecs, irq_cnt;</div><div class='add'>+</div><div class='add'>+	if (test_bit(ENA_FLAG_MSIX_ENABLED, &amp;adapter-&gt;flags)) {</div><div class='add'>+		netif_err(adapter, probe, adapter-&gt;netdev,</div><div class='add'>+			  "Error, MSI-X is already enabled\n");</div><div class='add'>+		return -EPERM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Reserved the max msix vectors we might need */</div><div class='add'>+	msix_vecs = ENA_MAX_MSIX_VEC(adapter-&gt;max_num_io_queues);</div><div class='add'>+	netif_dbg(adapter, probe, adapter-&gt;netdev,</div><div class='add'>+		  "Trying to enable MSI-X, vectors %d\n", msix_vecs);</div><div class='add'>+</div><div class='add'>+	irq_cnt = pci_alloc_irq_vectors(adapter-&gt;pdev, ENA_MIN_MSIX_VEC,</div><div class='add'>+					msix_vecs, PCI_IRQ_MSIX);</div><div class='add'>+</div><div class='add'>+	if (irq_cnt &lt; 0) {</div><div class='add'>+		netif_err(adapter, probe, adapter-&gt;netdev,</div><div class='add'>+			  "Failed to enable MSI-X. irq_cnt %d\n", irq_cnt);</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (irq_cnt != msix_vecs) {</div><div class='add'>+		netif_notice(adapter, probe, adapter-&gt;netdev,</div><div class='add'>+			     "Enable only %d MSI-X (out of %d), reduce the number of queues\n",</div><div class='add'>+			     irq_cnt, msix_vecs);</div><div class='add'>+		adapter-&gt;num_io_queues = irq_cnt - ENA_ADMIN_MSIX_VEC;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (netif_enable_cpu_rmap(adapter-&gt;netdev, adapter-&gt;num_io_queues))</div><div class='add'>+		netif_warn(adapter, probe, adapter-&gt;netdev,</div><div class='add'>+			   "Failed to map IRQs to CPUs\n");</div><div class='add'>+</div><div class='add'>+	adapter-&gt;msix_vecs = irq_cnt;</div><div class='add'>+	set_bit(ENA_FLAG_MSIX_ENABLED, &amp;adapter-&gt;flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_setup_mgmnt_intr(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	u32 cpu;</div><div class='add'>+</div><div class='add'>+	snprintf(adapter-&gt;irq_tbl[ENA_MGMNT_IRQ_IDX].name,</div><div class='add'>+		 ENA_IRQNAME_SIZE, "ena-mgmnt@pci:%s",</div><div class='add'>+		 pci_name(adapter-&gt;pdev));</div><div class='add'>+	adapter-&gt;irq_tbl[ENA_MGMNT_IRQ_IDX].handler =</div><div class='add'>+		ena_intr_msix_mgmnt;</div><div class='add'>+	adapter-&gt;irq_tbl[ENA_MGMNT_IRQ_IDX].data = adapter;</div><div class='add'>+	adapter-&gt;irq_tbl[ENA_MGMNT_IRQ_IDX].vector =</div><div class='add'>+		pci_irq_vector(adapter-&gt;pdev, ENA_MGMNT_IRQ_IDX);</div><div class='add'>+	cpu = cpumask_first(cpu_online_mask);</div><div class='add'>+	adapter-&gt;irq_tbl[ENA_MGMNT_IRQ_IDX].cpu = cpu;</div><div class='add'>+	cpumask_set_cpu(cpu,</div><div class='add'>+			&amp;adapter-&gt;irq_tbl[ENA_MGMNT_IRQ_IDX].affinity_hint_mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_setup_io_intr(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	int irq_idx, i, cpu;</div><div class='add'>+	int io_queue_count;</div><div class='add'>+</div><div class='add'>+	netdev = adapter-&gt;netdev;</div><div class='add'>+	io_queue_count = adapter-&gt;num_io_queues + adapter-&gt;xdp_num_queues;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; io_queue_count; i++) {</div><div class='add'>+		irq_idx = ENA_IO_IRQ_IDX(i);</div><div class='add'>+		cpu = i % num_online_cpus();</div><div class='add'>+</div><div class='add'>+		snprintf(adapter-&gt;irq_tbl[irq_idx].name, ENA_IRQNAME_SIZE,</div><div class='add'>+			 "%s-Tx-Rx-%d", netdev-&gt;name, i);</div><div class='add'>+		adapter-&gt;irq_tbl[irq_idx].handler = ena_intr_msix_io;</div><div class='add'>+		adapter-&gt;irq_tbl[irq_idx].data = &amp;adapter-&gt;ena_napi[i];</div><div class='add'>+		adapter-&gt;irq_tbl[irq_idx].vector =</div><div class='add'>+			pci_irq_vector(adapter-&gt;pdev, irq_idx);</div><div class='add'>+		adapter-&gt;irq_tbl[irq_idx].cpu = cpu;</div><div class='add'>+</div><div class='add'>+		cpumask_set_cpu(cpu,</div><div class='add'>+				&amp;adapter-&gt;irq_tbl[irq_idx].affinity_hint_mask);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_request_mgmnt_irq(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags = 0;</div><div class='add'>+	struct ena_irq *irq;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	irq = &amp;adapter-&gt;irq_tbl[ENA_MGMNT_IRQ_IDX];</div><div class='add'>+	rc = request_irq(irq-&gt;vector, irq-&gt;handler, flags, irq-&gt;name,</div><div class='add'>+			 irq-&gt;data);</div><div class='add'>+	if (rc) {</div><div class='add'>+		netif_err(adapter, probe, adapter-&gt;netdev,</div><div class='add'>+			  "Failed to request admin irq\n");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netif_dbg(adapter, probe, adapter-&gt;netdev,</div><div class='add'>+		  "Set affinity hint of mgmnt irq.to 0x%lx (irq vector: %d)\n",</div><div class='add'>+		  irq-&gt;affinity_hint_mask.bits[0], irq-&gt;vector);</div><div class='add'>+</div><div class='add'>+	irq_set_affinity_hint(irq-&gt;vector, &amp;irq-&gt;affinity_hint_mask);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_request_io_irq(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	u32 io_queue_count = adapter-&gt;num_io_queues + adapter-&gt;xdp_num_queues;</div><div class='add'>+	int rc = 0, i, k, irq_idx;</div><div class='add'>+	unsigned long flags = 0;</div><div class='add'>+	struct ena_irq *irq;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(ENA_FLAG_MSIX_ENABLED, &amp;adapter-&gt;flags)) {</div><div class='add'>+		netif_err(adapter, ifup, adapter-&gt;netdev,</div><div class='add'>+			  "Failed to request I/O IRQ: MSI-X is not enabled\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = ENA_IO_IRQ_FIRST_IDX; i &lt; ENA_MAX_MSIX_VEC(io_queue_count); i++) {</div><div class='add'>+		irq = &amp;adapter-&gt;irq_tbl[i];</div><div class='add'>+		rc = request_irq(irq-&gt;vector, irq-&gt;handler, flags, irq-&gt;name,</div><div class='add'>+				 irq-&gt;data);</div><div class='add'>+		if (rc) {</div><div class='add'>+			netif_err(adapter, ifup, adapter-&gt;netdev,</div><div class='add'>+				  "Failed to request I/O IRQ. index %d rc %d\n",</div><div class='add'>+				   i, rc);</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		netif_dbg(adapter, ifup, adapter-&gt;netdev,</div><div class='add'>+			  "Set affinity hint of irq. index %d to 0x%lx (irq vector: %d)\n",</div><div class='add'>+			  i, irq-&gt;affinity_hint_mask.bits[0], irq-&gt;vector);</div><div class='add'>+</div><div class='add'>+		irq_set_affinity_hint(irq-&gt;vector, &amp;irq-&gt;affinity_hint_mask);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Now that IO IRQs have been successfully allocated map them to the</div><div class='add'>+	 * corresponding IO NAPI instance. Note that the mgmnt IRQ does not</div><div class='add'>+	 * have a NAPI, so care must be taken to correctly map IRQs to NAPIs.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; io_queue_count; i++) {</div><div class='add'>+		irq_idx = ENA_IO_IRQ_IDX(i);</div><div class='add'>+		irq = &amp;adapter-&gt;irq_tbl[irq_idx];</div><div class='add'>+		netif_napi_set_irq(&amp;adapter-&gt;ena_napi[i].napi, irq-&gt;vector);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	for (k = ENA_IO_IRQ_FIRST_IDX; k &lt; i; k++) {</div><div class='add'>+		irq = &amp;adapter-&gt;irq_tbl[k];</div><div class='add'>+		free_irq(irq-&gt;vector, irq-&gt;data);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_free_mgmnt_irq(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct ena_irq *irq;</div><div class='add'>+</div><div class='add'>+	irq = &amp;adapter-&gt;irq_tbl[ENA_MGMNT_IRQ_IDX];</div><div class='add'>+	synchronize_irq(irq-&gt;vector);</div><div class='add'>+	irq_set_affinity_hint(irq-&gt;vector, NULL);</div><div class='add'>+	free_irq(irq-&gt;vector, irq-&gt;data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_free_io_irq(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	u32 io_queue_count = adapter-&gt;num_io_queues + adapter-&gt;xdp_num_queues;</div><div class='add'>+	struct ena_irq *irq;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = ENA_IO_IRQ_FIRST_IDX; i &lt; ENA_MAX_MSIX_VEC(io_queue_count); i++) {</div><div class='add'>+		struct ena_napi *ena_napi;</div><div class='add'>+</div><div class='add'>+		irq = &amp;adapter-&gt;irq_tbl[i];</div><div class='add'>+		irq_set_affinity_hint(irq-&gt;vector, NULL);</div><div class='add'>+		ena_napi = irq-&gt;data;</div><div class='add'>+		netif_napi_set_irq(&amp;ena_napi-&gt;napi, -1);</div><div class='add'>+		free_irq(irq-&gt;vector, irq-&gt;data);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_disable_msix(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	if (test_and_clear_bit(ENA_FLAG_MSIX_ENABLED, &amp;adapter-&gt;flags))</div><div class='add'>+		pci_free_irq_vectors(adapter-&gt;pdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_disable_io_intr_sync(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	u32 io_queue_count = adapter-&gt;num_io_queues + adapter-&gt;xdp_num_queues;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!netif_running(adapter-&gt;netdev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = ENA_IO_IRQ_FIRST_IDX; i &lt; ENA_MAX_MSIX_VEC(io_queue_count); i++)</div><div class='add'>+		synchronize_irq(adapter-&gt;irq_tbl[i].vector);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_del_napi_in_range(struct ena_adapter *adapter,</div><div class='add'>+				  int first_index,</div><div class='add'>+				  int count)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = first_index; i &lt; first_index + count; i++) {</div><div class='add'>+		netif_napi_del(&amp;adapter-&gt;ena_napi[i].napi);</div><div class='add'>+</div><div class='add'>+		WARN_ON(ENA_IS_XDP_INDEX(adapter, i) &amp;&amp;</div><div class='add'>+			adapter-&gt;ena_napi[i].rx_ring);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_init_napi_in_range(struct ena_adapter *adapter,</div><div class='add'>+				   int first_index, int count)</div><div class='add'>+{</div><div class='add'>+	int (*napi_handler)(struct napi_struct *napi, int budget);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = first_index; i &lt; first_index + count; i++) {</div><div class='add'>+		struct ena_napi *napi = &amp;adapter-&gt;ena_napi[i];</div><div class='add'>+		struct ena_ring *rx_ring, *tx_ring;</div><div class='add'>+</div><div class='add'>+		memset(napi, 0, sizeof(*napi));</div><div class='add'>+</div><div class='add'>+		rx_ring = &amp;adapter-&gt;rx_ring[i];</div><div class='add'>+		tx_ring = &amp;adapter-&gt;tx_ring[i];</div><div class='add'>+</div><div class='add'>+		napi_handler = ena_io_poll;</div><div class='add'>+		if (ENA_IS_XDP_INDEX(adapter, i))</div><div class='add'>+			napi_handler = ena_xdp_io_poll;</div><div class='add'>+</div><div class='add'>+		netif_napi_add_config(adapter-&gt;netdev, &amp;napi-&gt;napi, napi_handler, i);</div><div class='add'>+</div><div class='add'>+		if (!ENA_IS_XDP_INDEX(adapter, i))</div><div class='add'>+			napi-&gt;rx_ring = rx_ring;</div><div class='add'>+</div><div class='add'>+		napi-&gt;tx_ring = tx_ring;</div><div class='add'>+		napi-&gt;qid = i;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_napi_disable_in_range(struct ena_adapter *adapter,</div><div class='add'>+				      int first_index,</div><div class='add'>+				      int count)</div><div class='add'>+{</div><div class='add'>+	struct napi_struct *napi;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = first_index; i &lt; first_index + count; i++) {</div><div class='add'>+		napi = &amp;adapter-&gt;ena_napi[i].napi;</div><div class='add'>+		if (!ENA_IS_XDP_INDEX(adapter, i)) {</div><div class='add'>+			/* This API is supported for non-XDP queues only */</div><div class='add'>+			netif_queue_set_napi(adapter-&gt;netdev, i,</div><div class='add'>+					     NETDEV_QUEUE_TYPE_TX, NULL);</div><div class='add'>+			netif_queue_set_napi(adapter-&gt;netdev, i,</div><div class='add'>+					     NETDEV_QUEUE_TYPE_RX, NULL);</div><div class='add'>+		}</div><div class='add'>+		napi_disable(napi);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_napi_enable_in_range(struct ena_adapter *adapter,</div><div class='add'>+				     int first_index,</div><div class='add'>+				     int count)</div><div class='add'>+{</div><div class='add'>+	struct napi_struct *napi;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = first_index; i &lt; first_index + count; i++) {</div><div class='add'>+		napi = &amp;adapter-&gt;ena_napi[i].napi;</div><div class='add'>+		napi_enable(napi);</div><div class='add'>+		if (!ENA_IS_XDP_INDEX(adapter, i)) {</div><div class='add'>+			/* This API is supported for non-XDP queues only */</div><div class='add'>+			netif_queue_set_napi(adapter-&gt;netdev, i,</div><div class='add'>+					     NETDEV_QUEUE_TYPE_RX, napi);</div><div class='add'>+			netif_queue_set_napi(adapter-&gt;netdev, i,</div><div class='add'>+					     NETDEV_QUEUE_TYPE_TX, napi);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Configure the Rx forwarding */</div><div class='add'>+static int ena_rss_configure(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_dev *ena_dev = adapter-&gt;ena_dev;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	/* In case the RSS table wasn't initialized by probe */</div><div class='add'>+	if (!ena_dev-&gt;rss.tbl_log_size) {</div><div class='add'>+		rc = ena_rss_init_default(adapter);</div><div class='add'>+		if (rc &amp;&amp; (rc != -EOPNOTSUPP)) {</div><div class='add'>+			netif_err(adapter, ifup, adapter-&gt;netdev, "Failed to init RSS rc: %d\n", rc);</div><div class='add'>+			return rc;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set indirect table */</div><div class='add'>+	rc = ena_com_indirect_table_set(ena_dev);</div><div class='add'>+	if (unlikely(rc &amp;&amp; rc != -EOPNOTSUPP))</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	/* Configure hash function (if supported) */</div><div class='add'>+	rc = ena_com_set_hash_function(ena_dev);</div><div class='add'>+	if (unlikely(rc &amp;&amp; (rc != -EOPNOTSUPP)))</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	/* Configure hash inputs (if supported) */</div><div class='add'>+	rc = ena_com_set_hash_ctrl(ena_dev);</div><div class='add'>+	if (unlikely(rc &amp;&amp; (rc != -EOPNOTSUPP)))</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_up_complete(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = ena_rss_configure(adapter);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	ena_change_mtu(adapter-&gt;netdev, adapter-&gt;netdev-&gt;mtu);</div><div class='add'>+</div><div class='add'>+	ena_refill_all_rx_bufs(adapter);</div><div class='add'>+</div><div class='add'>+	/* enable transmits */</div><div class='add'>+	netif_tx_start_all_queues(adapter-&gt;netdev);</div><div class='add'>+</div><div class='add'>+	ena_napi_enable_in_range(adapter,</div><div class='add'>+				 0,</div><div class='add'>+				 adapter-&gt;xdp_num_queues + adapter-&gt;num_io_queues);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_create_io_ctx ctx;</div><div class='add'>+	struct ena_com_dev *ena_dev;</div><div class='add'>+	struct ena_ring *tx_ring;</div><div class='add'>+	u32 msix_vector;</div><div class='add'>+	u16 ena_qid;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	ena_dev = adapter-&gt;ena_dev;</div><div class='add'>+</div><div class='add'>+	tx_ring = &amp;adapter-&gt;tx_ring[qid];</div><div class='add'>+	msix_vector = ENA_IO_IRQ_IDX(qid);</div><div class='add'>+	ena_qid = ENA_IO_TXQ_IDX(qid);</div><div class='add'>+</div><div class='add'>+	memset(&amp;ctx, 0x0, sizeof(ctx));</div><div class='add'>+</div><div class='add'>+	ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_TX;</div><div class='add'>+	ctx.qid = ena_qid;</div><div class='add'>+	ctx.mem_queue_type = ena_dev-&gt;tx_mem_queue_type;</div><div class='add'>+	ctx.msix_vector = msix_vector;</div><div class='add'>+	ctx.queue_size = tx_ring-&gt;ring_size;</div><div class='add'>+	ctx.numa_node = tx_ring-&gt;numa_node;</div><div class='add'>+</div><div class='add'>+	rc = ena_com_create_io_queue(ena_dev, &amp;ctx);</div><div class='add'>+	if (rc) {</div><div class='add'>+		netif_err(adapter, ifup, adapter-&gt;netdev,</div><div class='add'>+			  "Failed to create I/O TX queue num %d rc: %d\n",</div><div class='add'>+			  qid, rc);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = ena_com_get_io_handlers(ena_dev, ena_qid,</div><div class='add'>+				     &amp;tx_ring-&gt;ena_com_io_sq,</div><div class='add'>+				     &amp;tx_ring-&gt;ena_com_io_cq);</div><div class='add'>+	if (rc) {</div><div class='add'>+		netif_err(adapter, ifup, adapter-&gt;netdev,</div><div class='add'>+			  "Failed to get TX queue handlers. TX queue num %d rc: %d\n",</div><div class='add'>+			  qid, rc);</div><div class='add'>+		ena_com_destroy_io_queue(ena_dev, ena_qid);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ena_com_update_numa_node(tx_ring-&gt;ena_com_io_cq, ctx.numa_node);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_create_io_tx_queues_in_range(struct ena_adapter *adapter,</div><div class='add'>+				     int first_index, int count)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_dev *ena_dev = adapter-&gt;ena_dev;</div><div class='add'>+	int rc, i;</div><div class='add'>+</div><div class='add'>+	for (i = first_index; i &lt; first_index + count; i++) {</div><div class='add'>+		rc = ena_create_io_tx_queue(adapter, i);</div><div class='add'>+		if (rc)</div><div class='add'>+			goto create_err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+create_err:</div><div class='add'>+	while (i-- &gt; first_index)</div><div class='add'>+		ena_com_destroy_io_queue(ena_dev, ENA_IO_TXQ_IDX(i));</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_create_io_rx_queue(struct ena_adapter *adapter, int qid)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_dev *ena_dev;</div><div class='add'>+	struct ena_com_create_io_ctx ctx;</div><div class='add'>+	struct ena_ring *rx_ring;</div><div class='add'>+	u32 msix_vector;</div><div class='add'>+	u16 ena_qid;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	ena_dev = adapter-&gt;ena_dev;</div><div class='add'>+</div><div class='add'>+	rx_ring = &amp;adapter-&gt;rx_ring[qid];</div><div class='add'>+	msix_vector = ENA_IO_IRQ_IDX(qid);</div><div class='add'>+	ena_qid = ENA_IO_RXQ_IDX(qid);</div><div class='add'>+</div><div class='add'>+	memset(&amp;ctx, 0x0, sizeof(ctx));</div><div class='add'>+</div><div class='add'>+	ctx.qid = ena_qid;</div><div class='add'>+	ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_RX;</div><div class='add'>+	ctx.mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;</div><div class='add'>+	ctx.msix_vector = msix_vector;</div><div class='add'>+	ctx.queue_size = rx_ring-&gt;ring_size;</div><div class='add'>+	ctx.numa_node = rx_ring-&gt;numa_node;</div><div class='add'>+</div><div class='add'>+	rc = ena_com_create_io_queue(ena_dev, &amp;ctx);</div><div class='add'>+	if (rc) {</div><div class='add'>+		netif_err(adapter, ifup, adapter-&gt;netdev,</div><div class='add'>+			  "Failed to create I/O RX queue num %d rc: %d\n",</div><div class='add'>+			  qid, rc);</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = ena_com_get_io_handlers(ena_dev, ena_qid,</div><div class='add'>+				     &amp;rx_ring-&gt;ena_com_io_sq,</div><div class='add'>+				     &amp;rx_ring-&gt;ena_com_io_cq);</div><div class='add'>+	if (rc) {</div><div class='add'>+		netif_err(adapter, ifup, adapter-&gt;netdev,</div><div class='add'>+			  "Failed to get RX queue handlers. RX queue num %d rc: %d\n",</div><div class='add'>+			  qid, rc);</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ena_com_update_numa_node(rx_ring-&gt;ena_com_io_cq, ctx.numa_node);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+err:</div><div class='add'>+	ena_com_destroy_io_queue(ena_dev, ena_qid);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_create_all_io_rx_queues(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_dev *ena_dev = adapter-&gt;ena_dev;</div><div class='add'>+	int rc, i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; adapter-&gt;num_io_queues; i++) {</div><div class='add'>+		rc = ena_create_io_rx_queue(adapter, i);</div><div class='add'>+		if (rc)</div><div class='add'>+			goto create_err;</div><div class='add'>+		INIT_WORK(&amp;adapter-&gt;ena_napi[i].dim.work, ena_dim_work);</div><div class='add'>+</div><div class='add'>+		ena_xdp_register_rxq_info(&amp;adapter-&gt;rx_ring[i]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+create_err:</div><div class='add'>+	while (i--) {</div><div class='add'>+		ena_xdp_unregister_rxq_info(&amp;adapter-&gt;rx_ring[i]);</div><div class='add'>+		cancel_work_sync(&amp;adapter-&gt;ena_napi[i].dim.work);</div><div class='add'>+		ena_com_destroy_io_queue(ena_dev, ENA_IO_RXQ_IDX(i));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void set_io_rings_size(struct ena_adapter *adapter,</div><div class='add'>+			      int new_tx_size,</div><div class='add'>+			      int new_rx_size)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; adapter-&gt;num_io_queues; i++) {</div><div class='add'>+		adapter-&gt;tx_ring[i].ring_size = new_tx_size;</div><div class='add'>+		adapter-&gt;rx_ring[i].ring_size = new_rx_size;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This function allows queue allocation to backoff when the system is</div><div class='add'>+ * low on memory. If there is not enough memory to allocate io queues</div><div class='add'>+ * the driver will try to allocate smaller queues.</div><div class='add'>+ *</div><div class='add'>+ * The backoff algorithm is as follows:</div><div class='add'>+ *  1. Try to allocate TX and RX and if successful.</div><div class='add'>+ *  1.1. return success</div><div class='add'>+ *</div><div class='add'>+ *  2. Divide by 2 the size of the larger of RX and TX queues (or both if their size is the same).</div><div class='add'>+ *</div><div class='add'>+ *  3. If TX or RX is smaller than 256</div><div class='add'>+ *  3.1. return failure.</div><div class='add'>+ *  4. else</div><div class='add'>+ *  4.1. go back to 1.</div><div class='add'>+ */</div><div class='add'>+static int create_queues_with_size_backoff(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	int rc, cur_rx_ring_size, cur_tx_ring_size;</div><div class='add'>+	int new_rx_ring_size, new_tx_ring_size;</div><div class='add'>+</div><div class='add'>+	/* current queue sizes might be set to smaller than the requested</div><div class='add'>+	 * ones due to past queue allocation failures.</div><div class='add'>+	 */</div><div class='add'>+	set_io_rings_size(adapter, adapter-&gt;requested_tx_ring_size,</div><div class='add'>+			  adapter-&gt;requested_rx_ring_size);</div><div class='add'>+</div><div class='add'>+	while (1) {</div><div class='add'>+		if (ena_xdp_present(adapter)) {</div><div class='add'>+			rc = ena_setup_and_create_all_xdp_queues(adapter);</div><div class='add'>+</div><div class='add'>+			if (rc)</div><div class='add'>+				goto err_setup_tx;</div><div class='add'>+		}</div><div class='add'>+		rc = ena_setup_tx_resources_in_range(adapter,</div><div class='add'>+						     0,</div><div class='add'>+						     adapter-&gt;num_io_queues);</div><div class='add'>+		if (rc)</div><div class='add'>+			goto err_setup_tx;</div><div class='add'>+</div><div class='add'>+		rc = ena_create_io_tx_queues_in_range(adapter,</div><div class='add'>+						      0,</div><div class='add'>+						      adapter-&gt;num_io_queues);</div><div class='add'>+		if (rc)</div><div class='add'>+			goto err_create_tx_queues;</div><div class='add'>+</div><div class='add'>+		rc = ena_setup_all_rx_resources(adapter);</div><div class='add'>+		if (rc)</div><div class='add'>+			goto err_setup_rx;</div><div class='add'>+</div><div class='add'>+		rc = ena_create_all_io_rx_queues(adapter);</div><div class='add'>+		if (rc)</div><div class='add'>+			goto err_create_rx_queues;</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+err_create_rx_queues:</div><div class='add'>+		ena_free_all_io_rx_resources(adapter);</div><div class='add'>+err_setup_rx:</div><div class='add'>+		ena_destroy_all_tx_queues(adapter);</div><div class='add'>+err_create_tx_queues:</div><div class='add'>+		ena_free_all_io_tx_resources(adapter);</div><div class='add'>+err_setup_tx:</div><div class='add'>+		if (rc != -ENOMEM) {</div><div class='add'>+			netif_err(adapter, ifup, adapter-&gt;netdev,</div><div class='add'>+				  "Queue creation failed with error code %d\n",</div><div class='add'>+				  rc);</div><div class='add'>+			return rc;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		cur_tx_ring_size = adapter-&gt;tx_ring[0].ring_size;</div><div class='add'>+		cur_rx_ring_size = adapter-&gt;rx_ring[0].ring_size;</div><div class='add'>+</div><div class='add'>+		netif_err(adapter, ifup, adapter-&gt;netdev,</div><div class='add'>+			  "Not enough memory to create queues with sizes TX=%d, RX=%d\n",</div><div class='add'>+			  cur_tx_ring_size, cur_rx_ring_size);</div><div class='add'>+</div><div class='add'>+		new_tx_ring_size = cur_tx_ring_size;</div><div class='add'>+		new_rx_ring_size = cur_rx_ring_size;</div><div class='add'>+</div><div class='add'>+		/* Decrease the size of the larger queue, or</div><div class='add'>+		 * decrease both if they are the same size.</div><div class='add'>+		 */</div><div class='add'>+		if (cur_rx_ring_size &lt;= cur_tx_ring_size)</div><div class='add'>+			new_tx_ring_size = cur_tx_ring_size / 2;</div><div class='add'>+		if (cur_rx_ring_size &gt;= cur_tx_ring_size)</div><div class='add'>+			new_rx_ring_size = cur_rx_ring_size / 2;</div><div class='add'>+</div><div class='add'>+		if (new_tx_ring_size &lt; ENA_MIN_RING_SIZE ||</div><div class='add'>+		    new_rx_ring_size &lt; ENA_MIN_RING_SIZE) {</div><div class='add'>+			netif_err(adapter, ifup, adapter-&gt;netdev,</div><div class='add'>+				  "Queue creation failed with the smallest possible queue size of %d for both queues. Not retrying with smaller queues\n",</div><div class='add'>+				  ENA_MIN_RING_SIZE);</div><div class='add'>+			return rc;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		netif_err(adapter, ifup, adapter-&gt;netdev,</div><div class='add'>+			  "Retrying queue creation with sizes TX=%d, RX=%d\n",</div><div class='add'>+			  new_tx_ring_size,</div><div class='add'>+			  new_rx_ring_size);</div><div class='add'>+</div><div class='add'>+		set_io_rings_size(adapter, new_tx_ring_size,</div><div class='add'>+				  new_rx_ring_size);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_up(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	int io_queue_count, rc, i;</div><div class='add'>+</div><div class='add'>+	netif_dbg(adapter, ifup, adapter-&gt;netdev, "%s\n", __func__);</div><div class='add'>+</div><div class='add'>+	io_queue_count = adapter-&gt;num_io_queues + adapter-&gt;xdp_num_queues;</div><div class='add'>+	ena_setup_io_intr(adapter);</div><div class='add'>+</div><div class='add'>+	/* napi poll functions should be initialized before running</div><div class='add'>+	 * request_irq(), to handle a rare condition where there is a pending</div><div class='add'>+	 * interrupt, causing the ISR to fire immediately while the poll</div><div class='add'>+	 * function wasn't set yet, causing a null dereference</div><div class='add'>+	 */</div><div class='add'>+	ena_init_napi_in_range(adapter, 0, io_queue_count);</div><div class='add'>+</div><div class='add'>+	/* Enabling DIM needs to happen before enabling IRQs since DIM</div><div class='add'>+	 * is run from napi routine</div><div class='add'>+	 */</div><div class='add'>+	if (ena_com_interrupt_moderation_supported(adapter-&gt;ena_dev))</div><div class='add'>+		ena_com_enable_adaptive_moderation(adapter-&gt;ena_dev);</div><div class='add'>+</div><div class='add'>+	rc = ena_request_io_irq(adapter);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto err_req_irq;</div><div class='add'>+</div><div class='add'>+	rc = create_queues_with_size_backoff(adapter);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto err_create_queues_with_backoff;</div><div class='add'>+</div><div class='add'>+	rc = ena_up_complete(adapter);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto err_up;</div><div class='add'>+</div><div class='add'>+	if (test_bit(ENA_FLAG_LINK_UP, &amp;adapter-&gt;flags))</div><div class='add'>+		netif_carrier_on(adapter-&gt;netdev);</div><div class='add'>+</div><div class='add'>+	ena_increase_stat(&amp;adapter-&gt;dev_stats.interface_up, 1,</div><div class='add'>+			  &amp;adapter-&gt;syncp);</div><div class='add'>+</div><div class='add'>+	set_bit(ENA_FLAG_DEV_UP, &amp;adapter-&gt;flags);</div><div class='add'>+</div><div class='add'>+	/* Enable completion queues interrupt */</div><div class='add'>+	for (i = 0; i &lt; adapter-&gt;num_io_queues; i++)</div><div class='add'>+		ena_unmask_interrupt(&amp;adapter-&gt;tx_ring[i],</div><div class='add'>+				     &amp;adapter-&gt;rx_ring[i]);</div><div class='add'>+</div><div class='add'>+	/* schedule napi in case we had pending packets</div><div class='add'>+	 * from the last time we disable napi</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; io_queue_count; i++)</div><div class='add'>+		napi_schedule(&amp;adapter-&gt;ena_napi[i].napi);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+</div><div class='add'>+err_up:</div><div class='add'>+	ena_destroy_all_tx_queues(adapter);</div><div class='add'>+	ena_free_all_io_tx_resources(adapter);</div><div class='add'>+	ena_destroy_all_rx_queues(adapter);</div><div class='add'>+	ena_free_all_io_rx_resources(adapter);</div><div class='add'>+err_create_queues_with_backoff:</div><div class='add'>+	ena_free_io_irq(adapter);</div><div class='add'>+err_req_irq:</div><div class='add'>+	ena_del_napi_in_range(adapter, 0, io_queue_count);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_down(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	int io_queue_count = adapter-&gt;num_io_queues + adapter-&gt;xdp_num_queues;</div><div class='add'>+</div><div class='add'>+	netif_dbg(adapter, ifdown, adapter-&gt;netdev, "%s\n", __func__);</div><div class='add'>+</div><div class='add'>+	clear_bit(ENA_FLAG_DEV_UP, &amp;adapter-&gt;flags);</div><div class='add'>+</div><div class='add'>+	ena_increase_stat(&amp;adapter-&gt;dev_stats.interface_down, 1,</div><div class='add'>+			  &amp;adapter-&gt;syncp);</div><div class='add'>+</div><div class='add'>+	netif_carrier_off(adapter-&gt;netdev);</div><div class='add'>+	netif_tx_disable(adapter-&gt;netdev);</div><div class='add'>+</div><div class='add'>+	/* After this point the napi handler won't enable the tx queue */</div><div class='add'>+	ena_napi_disable_in_range(adapter, 0, io_queue_count);</div><div class='add'>+</div><div class='add'>+	if (test_bit(ENA_FLAG_TRIGGER_RESET, &amp;adapter-&gt;flags)) {</div><div class='add'>+		int rc;</div><div class='add'>+</div><div class='add'>+		rc = ena_com_dev_reset(adapter-&gt;ena_dev, adapter-&gt;reset_reason);</div><div class='add'>+		if (rc)</div><div class='add'>+			netif_err(adapter, ifdown, adapter-&gt;netdev,</div><div class='add'>+				  "Device reset failed\n");</div><div class='add'>+		/* stop submitting admin commands on a device that was reset */</div><div class='add'>+		ena_com_set_admin_running_state(adapter-&gt;ena_dev, false);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ena_destroy_all_io_queues(adapter);</div><div class='add'>+</div><div class='add'>+	ena_disable_io_intr_sync(adapter);</div><div class='add'>+	ena_free_io_irq(adapter);</div><div class='add'>+	ena_del_napi_in_range(adapter, 0, io_queue_count);</div><div class='add'>+</div><div class='add'>+	ena_free_all_tx_bufs(adapter);</div><div class='add'>+	ena_free_all_rx_bufs(adapter);</div><div class='add'>+	ena_free_all_io_tx_resources(adapter);</div><div class='add'>+	ena_free_all_io_rx_resources(adapter);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ena_open - Called when a network interface is made active</div><div class='add'>+ * @netdev: network interface device structure</div><div class='add'>+ *</div><div class='add'>+ * Returns 0 on success, negative value on failure</div><div class='add'>+ *</div><div class='add'>+ * The open entry point is called when a network interface is made</div><div class='add'>+ * active by the system (IFF_UP).  At this point all resources needed</div><div class='add'>+ * for transmit and receive operations are allocated, the interrupt</div><div class='add'>+ * handler is registered with the OS, the watchdog timer is started,</div><div class='add'>+ * and the stack is notified that the interface is ready.</div><div class='add'>+ */</div><div class='add'>+static int ena_open(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	/* Notify the stack of the actual queue counts. */</div><div class='add'>+	rc = netif_set_real_num_tx_queues(netdev, adapter-&gt;num_io_queues);</div><div class='add'>+	if (rc) {</div><div class='add'>+		netif_err(adapter, ifup, netdev, "Can't set num tx queues\n");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = netif_set_real_num_rx_queues(netdev, adapter-&gt;num_io_queues);</div><div class='add'>+	if (rc) {</div><div class='add'>+		netif_err(adapter, ifup, netdev, "Can't set num rx queues\n");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = ena_up(adapter);</div><div class='add'>+	if (rc)</div><div class='add'>+		return rc;</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ena_close - Disables a network interface</div><div class='add'>+ * @netdev: network interface device structure</div><div class='add'>+ *</div><div class='add'>+ * Returns 0, this is not allowed to fail</div><div class='add'>+ *</div><div class='add'>+ * The close entry point is called when an interface is de-activated</div><div class='add'>+ * by the OS.  The hardware is still under the drivers control, but</div><div class='add'>+ * needs to be disabled.  A global MAC reset is issued to stop the</div><div class='add'>+ * hardware, and all transmit and receive resources are freed.</div><div class='add'>+ */</div><div class='add'>+static int ena_close(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	netif_dbg(adapter, ifdown, netdev, "%s\n", __func__);</div><div class='add'>+</div><div class='add'>+	if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &amp;adapter-&gt;flags))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (test_bit(ENA_FLAG_DEV_UP, &amp;adapter-&gt;flags))</div><div class='add'>+		ena_down(adapter);</div><div class='add'>+</div><div class='add'>+	/* Check for device status and issue reset if needed*/</div><div class='add'>+	check_for_admin_com_state(adapter);</div><div class='add'>+	if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &amp;adapter-&gt;flags))) {</div><div class='add'>+		netif_err(adapter, ifdown, adapter-&gt;netdev,</div><div class='add'>+			  "Destroy failure, restarting device\n");</div><div class='add'>+		ena_dump_stats_to_dmesg(adapter);</div><div class='add'>+		/* rtnl lock already obtained in dev_ioctl() layer */</div><div class='add'>+		ena_destroy_device(adapter, false);</div><div class='add'>+		ena_restore_device(adapter);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_update_queue_params(struct ena_adapter *adapter,</div><div class='add'>+			    u32 new_tx_size,</div><div class='add'>+			    u32 new_rx_size,</div><div class='add'>+			    u32 new_llq_header_len)</div><div class='add'>+{</div><div class='add'>+	bool dev_was_up, large_llq_changed = false;</div><div class='add'>+	int rc = 0;</div><div class='add'>+</div><div class='add'>+	dev_was_up = test_bit(ENA_FLAG_DEV_UP, &amp;adapter-&gt;flags);</div><div class='add'>+	ena_close(adapter-&gt;netdev);</div><div class='add'>+	adapter-&gt;requested_tx_ring_size = new_tx_size;</div><div class='add'>+	adapter-&gt;requested_rx_ring_size = new_rx_size;</div><div class='add'>+	ena_init_io_rings(adapter,</div><div class='add'>+			  0,</div><div class='add'>+			  adapter-&gt;xdp_num_queues +</div><div class='add'>+			  adapter-&gt;num_io_queues);</div><div class='add'>+</div><div class='add'>+	large_llq_changed = adapter-&gt;ena_dev-&gt;tx_mem_queue_type ==</div><div class='add'>+			    ENA_ADMIN_PLACEMENT_POLICY_DEV;</div><div class='add'>+	large_llq_changed &amp;=</div><div class='add'>+		new_llq_header_len != adapter-&gt;ena_dev-&gt;tx_max_header_size;</div><div class='add'>+</div><div class='add'>+	/* a check that the configuration is valid is done by caller */</div><div class='add'>+	if (large_llq_changed) {</div><div class='add'>+		adapter-&gt;large_llq_header_enabled = !adapter-&gt;large_llq_header_enabled;</div><div class='add'>+</div><div class='add'>+		ena_destroy_device(adapter, false);</div><div class='add'>+		rc = ena_restore_device(adapter);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return dev_was_up &amp;&amp; !rc ? ena_up(adapter) : rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_set_rx_copybreak(struct ena_adapter *adapter, u32 rx_copybreak)</div><div class='add'>+{</div><div class='add'>+	struct ena_ring *rx_ring;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (rx_copybreak &gt; min_t(u16, adapter-&gt;netdev-&gt;mtu, ENA_PAGE_SIZE))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	adapter-&gt;rx_copybreak = rx_copybreak;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; adapter-&gt;num_io_queues; i++) {</div><div class='add'>+		rx_ring = &amp;adapter-&gt;rx_ring[i];</div><div class='add'>+		rx_ring-&gt;rx_copybreak = rx_copybreak;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_update_queue_count(struct ena_adapter *adapter, u32 new_channel_count)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_dev *ena_dev = adapter-&gt;ena_dev;</div><div class='add'>+	int prev_channel_count;</div><div class='add'>+	bool dev_was_up;</div><div class='add'>+</div><div class='add'>+	dev_was_up = test_bit(ENA_FLAG_DEV_UP, &amp;adapter-&gt;flags);</div><div class='add'>+	ena_close(adapter-&gt;netdev);</div><div class='add'>+	prev_channel_count = adapter-&gt;num_io_queues;</div><div class='add'>+	adapter-&gt;num_io_queues = new_channel_count;</div><div class='add'>+	if (ena_xdp_present(adapter) &amp;&amp;</div><div class='add'>+	    ena_xdp_allowed(adapter) == ENA_XDP_ALLOWED) {</div><div class='add'>+		adapter-&gt;xdp_first_ring = new_channel_count;</div><div class='add'>+		adapter-&gt;xdp_num_queues = new_channel_count;</div><div class='add'>+		if (prev_channel_count &gt; new_channel_count)</div><div class='add'>+			ena_xdp_exchange_program_rx_in_range(adapter,</div><div class='add'>+							     NULL,</div><div class='add'>+							     new_channel_count,</div><div class='add'>+							     prev_channel_count);</div><div class='add'>+		else</div><div class='add'>+			ena_xdp_exchange_program_rx_in_range(adapter,</div><div class='add'>+							     adapter-&gt;xdp_bpf_prog,</div><div class='add'>+							     prev_channel_count,</div><div class='add'>+							     new_channel_count);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* We need to destroy the rss table so that the indirection</div><div class='add'>+	 * table will be reinitialized by ena_up()</div><div class='add'>+	 */</div><div class='add'>+	ena_com_rss_destroy(ena_dev);</div><div class='add'>+	ena_init_io_rings(adapter,</div><div class='add'>+			  0,</div><div class='add'>+			  adapter-&gt;xdp_num_queues +</div><div class='add'>+			  adapter-&gt;num_io_queues);</div><div class='add'>+	return dev_was_up ? ena_open(adapter-&gt;netdev) : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_tx_csum(struct ena_com_tx_ctx *ena_tx_ctx,</div><div class='add'>+			struct sk_buff *skb,</div><div class='add'>+			bool disable_meta_caching)</div><div class='add'>+{</div><div class='add'>+	u32 mss = skb_shinfo(skb)-&gt;gso_size;</div><div class='add'>+	struct ena_com_tx_meta *ena_meta = &amp;ena_tx_ctx-&gt;ena_meta;</div><div class='add'>+	u8 l4_protocol = 0;</div><div class='add'>+</div><div class='add'>+	if ((skb-&gt;ip_summed == CHECKSUM_PARTIAL) || mss) {</div><div class='add'>+		ena_tx_ctx-&gt;l4_csum_enable = 1;</div><div class='add'>+		if (mss) {</div><div class='add'>+			ena_tx_ctx-&gt;tso_enable = 1;</div><div class='add'>+			ena_meta-&gt;l4_hdr_len = tcp_hdr(skb)-&gt;doff;</div><div class='add'>+			ena_tx_ctx-&gt;l4_csum_partial = 0;</div><div class='add'>+		} else {</div><div class='add'>+			ena_tx_ctx-&gt;tso_enable = 0;</div><div class='add'>+			ena_meta-&gt;l4_hdr_len = 0;</div><div class='add'>+			ena_tx_ctx-&gt;l4_csum_partial = 1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		switch (ip_hdr(skb)-&gt;version) {</div><div class='add'>+		case IPVERSION:</div><div class='add'>+			ena_tx_ctx-&gt;l3_proto = ENA_ETH_IO_L3_PROTO_IPV4;</div><div class='add'>+			if (ip_hdr(skb)-&gt;frag_off &amp; htons(IP_DF))</div><div class='add'>+				ena_tx_ctx-&gt;df = 1;</div><div class='add'>+			if (mss)</div><div class='add'>+				ena_tx_ctx-&gt;l3_csum_enable = 1;</div><div class='add'>+			l4_protocol = ip_hdr(skb)-&gt;protocol;</div><div class='add'>+			break;</div><div class='add'>+		case 6:</div><div class='add'>+			ena_tx_ctx-&gt;l3_proto = ENA_ETH_IO_L3_PROTO_IPV6;</div><div class='add'>+			l4_protocol = ipv6_hdr(skb)-&gt;nexthdr;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (l4_protocol == IPPROTO_TCP)</div><div class='add'>+			ena_tx_ctx-&gt;l4_proto = ENA_ETH_IO_L4_PROTO_TCP;</div><div class='add'>+		else</div><div class='add'>+			ena_tx_ctx-&gt;l4_proto = ENA_ETH_IO_L4_PROTO_UDP;</div><div class='add'>+</div><div class='add'>+		ena_meta-&gt;mss = mss;</div><div class='add'>+		ena_meta-&gt;l3_hdr_len = skb_network_header_len(skb);</div><div class='add'>+		ena_meta-&gt;l3_hdr_offset = skb_network_offset(skb);</div><div class='add'>+		ena_tx_ctx-&gt;meta_valid = 1;</div><div class='add'>+	} else if (disable_meta_caching) {</div><div class='add'>+		memset(ena_meta, 0, sizeof(*ena_meta));</div><div class='add'>+		ena_tx_ctx-&gt;meta_valid = 1;</div><div class='add'>+	} else {</div><div class='add'>+		ena_tx_ctx-&gt;meta_valid = 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_check_and_linearize_skb(struct ena_ring *tx_ring,</div><div class='add'>+				       struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	int num_frags, header_len, rc;</div><div class='add'>+</div><div class='add'>+	num_frags = skb_shinfo(skb)-&gt;nr_frags;</div><div class='add'>+	header_len = skb_headlen(skb);</div><div class='add'>+</div><div class='add'>+	if (num_frags &lt; tx_ring-&gt;sgl_size)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if ((num_frags == tx_ring-&gt;sgl_size) &amp;&amp;</div><div class='add'>+	    (header_len &lt; tx_ring-&gt;tx_max_header_size))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ena_increase_stat(&amp;tx_ring-&gt;tx_stats.linearize, 1, &amp;tx_ring-&gt;syncp);</div><div class='add'>+</div><div class='add'>+	rc = skb_linearize(skb);</div><div class='add'>+	if (unlikely(rc)) {</div><div class='add'>+		ena_increase_stat(&amp;tx_ring-&gt;tx_stats.linearize_failed, 1,</div><div class='add'>+				  &amp;tx_ring-&gt;syncp);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_tx_map_skb(struct ena_ring *tx_ring,</div><div class='add'>+			  struct ena_tx_buffer *tx_info,</div><div class='add'>+			  struct sk_buff *skb,</div><div class='add'>+			  void **push_hdr,</div><div class='add'>+			  u16 *header_len)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = tx_ring-&gt;adapter;</div><div class='add'>+	struct ena_com_buf *ena_buf;</div><div class='add'>+	dma_addr_t dma;</div><div class='add'>+	u32 skb_head_len, frag_len, last_frag;</div><div class='add'>+	u16 push_len = 0;</div><div class='add'>+	u16 delta = 0;</div><div class='add'>+	int i = 0;</div><div class='add'>+</div><div class='add'>+	skb_head_len = skb_headlen(skb);</div><div class='add'>+	tx_info-&gt;skb = skb;</div><div class='add'>+	ena_buf = tx_info-&gt;bufs;</div><div class='add'>+</div><div class='add'>+	if (tx_ring-&gt;tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) {</div><div class='add'>+		/* When the device is LLQ mode, the driver will copy</div><div class='add'>+		 * the header into the device memory space.</div><div class='add'>+		 * the ena_com layer assume the header is in a linear</div><div class='add'>+		 * memory space.</div><div class='add'>+		 * This assumption might be wrong since part of the header</div><div class='add'>+		 * can be in the fragmented buffers.</div><div class='add'>+		 * Use skb_header_pointer to make sure the header is in a</div><div class='add'>+		 * linear memory space.</div><div class='add'>+		 */</div><div class='add'>+</div><div class='add'>+		push_len = min_t(u32, skb-&gt;len, tx_ring-&gt;tx_max_header_size);</div><div class='add'>+		*push_hdr = skb_header_pointer(skb, 0, push_len,</div><div class='add'>+					       tx_ring-&gt;push_buf_intermediate_buf);</div><div class='add'>+		*header_len = push_len;</div><div class='add'>+		if (unlikely(skb-&gt;data != *push_hdr)) {</div><div class='add'>+			ena_increase_stat(&amp;tx_ring-&gt;tx_stats.llq_buffer_copy, 1,</div><div class='add'>+					  &amp;tx_ring-&gt;syncp);</div><div class='add'>+</div><div class='add'>+			delta = push_len - skb_head_len;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		*push_hdr = NULL;</div><div class='add'>+		*header_len = min_t(u32, skb_head_len,</div><div class='add'>+				    tx_ring-&gt;tx_max_header_size);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netif_dbg(adapter, tx_queued, adapter-&gt;netdev,</div><div class='add'>+		  "skb: %p header_buf-&gt;vaddr: %p push_len: %d\n", skb,</div><div class='add'>+		  *push_hdr, push_len);</div><div class='add'>+</div><div class='add'>+	if (skb_head_len &gt; push_len) {</div><div class='add'>+		dma = dma_map_single(tx_ring-&gt;dev, skb-&gt;data + push_len,</div><div class='add'>+				     skb_head_len - push_len, DMA_TO_DEVICE);</div><div class='add'>+		if (unlikely(dma_mapping_error(tx_ring-&gt;dev, dma)))</div><div class='add'>+			goto error_report_dma_error;</div><div class='add'>+</div><div class='add'>+		ena_buf-&gt;paddr = dma;</div><div class='add'>+		ena_buf-&gt;len = skb_head_len - push_len;</div><div class='add'>+</div><div class='add'>+		ena_buf++;</div><div class='add'>+		tx_info-&gt;num_of_bufs++;</div><div class='add'>+		tx_info-&gt;map_linear_data = 1;</div><div class='add'>+	} else {</div><div class='add'>+		tx_info-&gt;map_linear_data = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	last_frag = skb_shinfo(skb)-&gt;nr_frags;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; last_frag; i++) {</div><div class='add'>+		const skb_frag_t *frag = &amp;skb_shinfo(skb)-&gt;frags[i];</div><div class='add'>+</div><div class='add'>+		frag_len = skb_frag_size(frag);</div><div class='add'>+</div><div class='add'>+		if (unlikely(delta &gt;= frag_len)) {</div><div class='add'>+			delta -= frag_len;</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		dma = skb_frag_dma_map(tx_ring-&gt;dev, frag, delta,</div><div class='add'>+				       frag_len - delta, DMA_TO_DEVICE);</div><div class='add'>+		if (unlikely(dma_mapping_error(tx_ring-&gt;dev, dma)))</div><div class='add'>+			goto error_report_dma_error;</div><div class='add'>+</div><div class='add'>+		ena_buf-&gt;paddr = dma;</div><div class='add'>+		ena_buf-&gt;len = frag_len - delta;</div><div class='add'>+		ena_buf++;</div><div class='add'>+		tx_info-&gt;num_of_bufs++;</div><div class='add'>+		delta = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+error_report_dma_error:</div><div class='add'>+	ena_increase_stat(&amp;tx_ring-&gt;tx_stats.dma_mapping_err, 1,</div><div class='add'>+			  &amp;tx_ring-&gt;syncp);</div><div class='add'>+	netif_warn(adapter, tx_queued, adapter-&gt;netdev, "Failed to map skb\n");</div><div class='add'>+</div><div class='add'>+	tx_info-&gt;skb = NULL;</div><div class='add'>+</div><div class='add'>+	tx_info-&gt;num_of_bufs += i;</div><div class='add'>+	ena_unmap_tx_buff(tx_ring, tx_info);</div><div class='add'>+</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Called with netif_tx_lock. */</div><div class='add'>+static netdev_tx_t ena_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	struct ena_tx_buffer *tx_info;</div><div class='add'>+	struct ena_com_tx_ctx ena_tx_ctx;</div><div class='add'>+	struct ena_ring *tx_ring;</div><div class='add'>+	struct netdev_queue *txq;</div><div class='add'>+	void *push_hdr;</div><div class='add'>+	u16 next_to_use, req_id, header_len;</div><div class='add'>+	int qid, rc;</div><div class='add'>+</div><div class='add'>+	netif_dbg(adapter, tx_queued, dev, "%s skb %p\n", __func__, skb);</div><div class='add'>+	/*  Determine which tx ring we will be placed on */</div><div class='add'>+	qid = skb_get_queue_mapping(skb);</div><div class='add'>+	tx_ring = &amp;adapter-&gt;tx_ring[qid];</div><div class='add'>+	txq = netdev_get_tx_queue(dev, qid);</div><div class='add'>+</div><div class='add'>+	rc = ena_check_and_linearize_skb(tx_ring, skb);</div><div class='add'>+	if (unlikely(rc))</div><div class='add'>+		goto error_drop_packet;</div><div class='add'>+</div><div class='add'>+	next_to_use = tx_ring-&gt;next_to_use;</div><div class='add'>+	req_id = tx_ring-&gt;free_ids[next_to_use];</div><div class='add'>+	tx_info = &amp;tx_ring-&gt;tx_buffer_info[req_id];</div><div class='add'>+	tx_info-&gt;num_of_bufs = 0;</div><div class='add'>+</div><div class='add'>+	WARN(tx_info-&gt;skb, "SKB isn't NULL req_id %d\n", req_id);</div><div class='add'>+</div><div class='add'>+	rc = ena_tx_map_skb(tx_ring, tx_info, skb, &amp;push_hdr, &amp;header_len);</div><div class='add'>+	if (unlikely(rc))</div><div class='add'>+		goto error_drop_packet;</div><div class='add'>+</div><div class='add'>+	memset(&amp;ena_tx_ctx, 0x0, sizeof(struct ena_com_tx_ctx));</div><div class='add'>+	ena_tx_ctx.ena_bufs = tx_info-&gt;bufs;</div><div class='add'>+	ena_tx_ctx.push_header = push_hdr;</div><div class='add'>+	ena_tx_ctx.num_bufs = tx_info-&gt;num_of_bufs;</div><div class='add'>+	ena_tx_ctx.req_id = req_id;</div><div class='add'>+	ena_tx_ctx.header_len = header_len;</div><div class='add'>+</div><div class='add'>+	/* set flags and meta data */</div><div class='add'>+	ena_tx_csum(&amp;ena_tx_ctx, skb, tx_ring-&gt;disable_meta_caching);</div><div class='add'>+</div><div class='add'>+	rc = ena_xmit_common(adapter,</div><div class='add'>+			     tx_ring,</div><div class='add'>+			     tx_info,</div><div class='add'>+			     &amp;ena_tx_ctx,</div><div class='add'>+			     next_to_use,</div><div class='add'>+			     skb-&gt;len);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto error_unmap_dma;</div><div class='add'>+</div><div class='add'>+	netdev_tx_sent_queue(txq, skb-&gt;len);</div><div class='add'>+</div><div class='add'>+	/* stop the queue when no more space available, the packet can have up</div><div class='add'>+	 * to sgl_size + 2. one for the meta descriptor and one for header</div><div class='add'>+	 * (if the header is larger than tx_max_header_size).</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely(!ena_com_sq_have_enough_space(tx_ring-&gt;ena_com_io_sq,</div><div class='add'>+						   tx_ring-&gt;sgl_size + 2))) {</div><div class='add'>+		netif_dbg(adapter, tx_queued, dev, "%s stop queue %d\n",</div><div class='add'>+			  __func__, qid);</div><div class='add'>+</div><div class='add'>+		netif_tx_stop_queue(txq);</div><div class='add'>+		ena_increase_stat(&amp;tx_ring-&gt;tx_stats.queue_stop, 1,</div><div class='add'>+				  &amp;tx_ring-&gt;syncp);</div><div class='add'>+</div><div class='add'>+		/* There is a rare condition where this function decide to</div><div class='add'>+		 * stop the queue but meanwhile clean_tx_irq updates</div><div class='add'>+		 * next_to_completion and terminates.</div><div class='add'>+		 * The queue will remain stopped forever.</div><div class='add'>+		 * To solve this issue add a mb() to make sure that</div><div class='add'>+		 * netif_tx_stop_queue() write is vissible before checking if</div><div class='add'>+		 * there is additional space in the queue.</div><div class='add'>+		 */</div><div class='add'>+		smp_mb();</div><div class='add'>+</div><div class='add'>+		if (ena_com_sq_have_enough_space(tx_ring-&gt;ena_com_io_sq,</div><div class='add'>+						 ENA_TX_WAKEUP_THRESH)) {</div><div class='add'>+			netif_tx_wake_queue(txq);</div><div class='add'>+			ena_increase_stat(&amp;tx_ring-&gt;tx_stats.queue_wakeup, 1,</div><div class='add'>+					  &amp;tx_ring-&gt;syncp);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb_tx_timestamp(skb);</div><div class='add'>+</div><div class='add'>+	if (netif_xmit_stopped(txq) || !netdev_xmit_more())</div><div class='add'>+		/* trigger the dma engine. ena_ring_tx_doorbell()</div><div class='add'>+		 * calls a memory barrier inside it.</div><div class='add'>+		 */</div><div class='add'>+		ena_ring_tx_doorbell(tx_ring);</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+error_unmap_dma:</div><div class='add'>+	ena_unmap_tx_buff(tx_ring, tx_info);</div><div class='add'>+	tx_info-&gt;skb = NULL;</div><div class='add'>+</div><div class='add'>+error_drop_packet:</div><div class='add'>+	dev_kfree_skb(skb);</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_config_host_info(struct ena_com_dev *ena_dev, struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct ena_admin_host_info *host_info;</div><div class='add'>+	ssize_t ret;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	/* Allocate only the host info */</div><div class='add'>+	rc = ena_com_allocate_host_info(ena_dev);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(dev, "Cannot allocate host info\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	host_info = ena_dev-&gt;host_attr.host_info;</div><div class='add'>+</div><div class='add'>+	host_info-&gt;bdf = pci_dev_id(pdev);</div><div class='add'>+	host_info-&gt;os_type = ENA_ADMIN_OS_LINUX;</div><div class='add'>+	host_info-&gt;kernel_ver = LINUX_VERSION_CODE;</div><div class='add'>+	ret = strscpy(host_info-&gt;kernel_ver_str, utsname()-&gt;version,</div><div class='add'>+		      sizeof(host_info-&gt;kernel_ver_str));</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		dev_dbg(dev,</div><div class='add'>+			"kernel version string will be truncated, status = %zd\n", ret);</div><div class='add'>+</div><div class='add'>+	host_info-&gt;os_dist = 0;</div><div class='add'>+	ret = strscpy(host_info-&gt;os_dist_str, utsname()-&gt;release,</div><div class='add'>+		      sizeof(host_info-&gt;os_dist_str));</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		dev_dbg(dev,</div><div class='add'>+			"OS distribution string will be truncated, status = %zd\n", ret);</div><div class='add'>+</div><div class='add'>+	host_info-&gt;driver_version =</div><div class='add'>+		(DRV_MODULE_GEN_MAJOR) |</div><div class='add'>+		(DRV_MODULE_GEN_MINOR &lt;&lt; ENA_ADMIN_HOST_INFO_MINOR_SHIFT) |</div><div class='add'>+		(DRV_MODULE_GEN_SUBMINOR &lt;&lt; ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT) |</div><div class='add'>+		("K"[0] &lt;&lt; ENA_ADMIN_HOST_INFO_MODULE_TYPE_SHIFT);</div><div class='add'>+	host_info-&gt;num_cpus = num_online_cpus();</div><div class='add'>+</div><div class='add'>+	host_info-&gt;driver_supported_features =</div><div class='add'>+		ENA_ADMIN_HOST_INFO_RX_OFFSET_MASK |</div><div class='add'>+		ENA_ADMIN_HOST_INFO_INTERRUPT_MODERATION_MASK |</div><div class='add'>+		ENA_ADMIN_HOST_INFO_RX_BUF_MIRRORING_MASK |</div><div class='add'>+		ENA_ADMIN_HOST_INFO_RSS_CONFIGURABLE_FUNCTION_KEY_MASK |</div><div class='add'>+		ENA_ADMIN_HOST_INFO_RX_PAGE_REUSE_MASK |</div><div class='add'>+		ENA_ADMIN_HOST_INFO_PHC_MASK;</div><div class='add'>+</div><div class='add'>+	rc = ena_com_set_host_attributes(ena_dev);</div><div class='add'>+	if (rc) {</div><div class='add'>+		if (rc == -EOPNOTSUPP)</div><div class='add'>+			dev_warn(dev, "Cannot set host attributes\n");</div><div class='add'>+		else</div><div class='add'>+			dev_err(dev, "Cannot set host attributes\n");</div><div class='add'>+</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	ena_com_delete_host_info(ena_dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_config_debug_area(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	u32 debug_area_size;</div><div class='add'>+	int rc, ss_count;</div><div class='add'>+</div><div class='add'>+	ss_count = ena_get_sset_count(adapter-&gt;netdev, ETH_SS_STATS);</div><div class='add'>+	if (ss_count &lt;= 0) {</div><div class='add'>+		netif_err(adapter, drv, adapter-&gt;netdev,</div><div class='add'>+			  "SS count is negative\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* allocate 32 bytes for each string and 64bit for the value */</div><div class='add'>+	debug_area_size = ss_count * ETH_GSTRING_LEN + sizeof(u64) * ss_count;</div><div class='add'>+</div><div class='add'>+	rc = ena_com_allocate_debug_area(adapter-&gt;ena_dev, debug_area_size);</div><div class='add'>+	if (rc) {</div><div class='add'>+		netif_err(adapter, drv, adapter-&gt;netdev,</div><div class='add'>+			  "Cannot allocate debug area\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = ena_com_set_host_attributes(adapter-&gt;ena_dev);</div><div class='add'>+	if (rc) {</div><div class='add'>+		if (rc == -EOPNOTSUPP)</div><div class='add'>+			netif_warn(adapter, drv, adapter-&gt;netdev, "Cannot set host attributes\n");</div><div class='add'>+		else</div><div class='add'>+			netif_err(adapter, drv, adapter-&gt;netdev,</div><div class='add'>+				  "Cannot set host attributes\n");</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return;</div><div class='add'>+err:</div><div class='add'>+	ena_com_delete_debug_area(adapter-&gt;ena_dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_get_stats64(struct net_device *netdev,</div><div class='add'>+			    struct rtnl_link_stats64 *stats)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct ena_ring *rx_ring, *tx_ring;</div><div class='add'>+	u64 total_xdp_rx_drops = 0;</div><div class='add'>+	unsigned int start;</div><div class='add'>+	u64 rx_drops;</div><div class='add'>+	u64 tx_drops;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(ENA_FLAG_DEV_UP, &amp;adapter-&gt;flags))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; adapter-&gt;num_io_queues + adapter-&gt;xdp_num_queues; i++) {</div><div class='add'>+		u64 bytes, packets, xdp_rx_drops;</div><div class='add'>+</div><div class='add'>+		tx_ring = &amp;adapter-&gt;tx_ring[i];</div><div class='add'>+</div><div class='add'>+		do {</div><div class='add'>+			start = u64_stats_fetch_begin(&amp;tx_ring-&gt;syncp);</div><div class='add'>+			packets = tx_ring-&gt;tx_stats.cnt;</div><div class='add'>+			bytes = tx_ring-&gt;tx_stats.bytes;</div><div class='add'>+		} while (u64_stats_fetch_retry(&amp;tx_ring-&gt;syncp, start));</div><div class='add'>+</div><div class='add'>+		stats-&gt;tx_packets += packets;</div><div class='add'>+		stats-&gt;tx_bytes += bytes;</div><div class='add'>+</div><div class='add'>+		/* In XDP there isn't an RX queue counterpart */</div><div class='add'>+		if (ENA_IS_XDP_INDEX(adapter, i))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		rx_ring = &amp;adapter-&gt;rx_ring[i];</div><div class='add'>+</div><div class='add'>+		do {</div><div class='add'>+			start = u64_stats_fetch_begin(&amp;rx_ring-&gt;syncp);</div><div class='add'>+			packets = rx_ring-&gt;rx_stats.cnt;</div><div class='add'>+			bytes = rx_ring-&gt;rx_stats.bytes;</div><div class='add'>+			xdp_rx_drops = rx_ring-&gt;rx_stats.xdp_drop;</div><div class='add'>+		} while (u64_stats_fetch_retry(&amp;rx_ring-&gt;syncp, start));</div><div class='add'>+</div><div class='add'>+		stats-&gt;rx_packets += packets;</div><div class='add'>+		stats-&gt;rx_bytes += bytes;</div><div class='add'>+		total_xdp_rx_drops += xdp_rx_drops;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		start = u64_stats_fetch_begin(&amp;adapter-&gt;syncp);</div><div class='add'>+		rx_drops = adapter-&gt;dev_stats.rx_drops;</div><div class='add'>+		tx_drops = adapter-&gt;dev_stats.tx_drops;</div><div class='add'>+	} while (u64_stats_fetch_retry(&amp;adapter-&gt;syncp, start));</div><div class='add'>+</div><div class='add'>+	stats-&gt;rx_dropped = rx_drops + total_xdp_rx_drops;</div><div class='add'>+	stats-&gt;tx_dropped = tx_drops;</div><div class='add'>+</div><div class='add'>+	stats-&gt;multicast = 0;</div><div class='add'>+	stats-&gt;collisions = 0;</div><div class='add'>+</div><div class='add'>+	stats-&gt;rx_length_errors = 0;</div><div class='add'>+	stats-&gt;rx_crc_errors = 0;</div><div class='add'>+	stats-&gt;rx_frame_errors = 0;</div><div class='add'>+	stats-&gt;rx_fifo_errors = 0;</div><div class='add'>+	stats-&gt;rx_missed_errors = 0;</div><div class='add'>+	stats-&gt;tx_window_errors = 0;</div><div class='add'>+</div><div class='add'>+	stats-&gt;rx_errors = 0;</div><div class='add'>+	stats-&gt;tx_errors = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops ena_netdev_ops = {</div><div class='add'>+	.ndo_open		= ena_open,</div><div class='add'>+	.ndo_stop		= ena_close,</div><div class='add'>+	.ndo_start_xmit		= ena_start_xmit,</div><div class='add'>+	.ndo_get_stats64	= ena_get_stats64,</div><div class='add'>+	.ndo_tx_timeout		= ena_tx_timeout,</div><div class='add'>+	.ndo_change_mtu		= ena_change_mtu,</div><div class='add'>+	.ndo_validate_addr	= eth_validate_addr,</div><div class='add'>+	.ndo_bpf		= ena_xdp,</div><div class='add'>+	.ndo_xdp_xmit		= ena_xdp_xmit,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int ena_calc_io_queue_size(struct ena_adapter *adapter,</div><div class='add'>+				  struct ena_com_dev_get_features_ctx *get_feat_ctx)</div><div class='add'>+{</div><div class='add'>+	struct ena_admin_feature_llq_desc *llq = &amp;get_feat_ctx-&gt;llq;</div><div class='add'>+	struct ena_com_dev *ena_dev = adapter-&gt;ena_dev;</div><div class='add'>+	u32 tx_queue_size = ENA_DEFAULT_RING_SIZE;</div><div class='add'>+	u32 rx_queue_size = ENA_DEFAULT_RING_SIZE;</div><div class='add'>+	u32 max_tx_queue_size;</div><div class='add'>+	u32 max_rx_queue_size;</div><div class='add'>+</div><div class='add'>+	/* If this function is called after driver load, the ring sizes have already</div><div class='add'>+	 * been configured. Take it into account when recalculating ring size.</div><div class='add'>+	 */</div><div class='add'>+	if (adapter-&gt;tx_ring-&gt;ring_size)</div><div class='add'>+		tx_queue_size = adapter-&gt;tx_ring-&gt;ring_size;</div><div class='add'>+</div><div class='add'>+	if (adapter-&gt;rx_ring-&gt;ring_size)</div><div class='add'>+		rx_queue_size = adapter-&gt;rx_ring-&gt;ring_size;</div><div class='add'>+</div><div class='add'>+	if (ena_dev-&gt;supported_features &amp; BIT(ENA_ADMIN_MAX_QUEUES_EXT)) {</div><div class='add'>+		struct ena_admin_queue_ext_feature_fields *max_queue_ext =</div><div class='add'>+			&amp;get_feat_ctx-&gt;max_queue_ext.max_queue_ext;</div><div class='add'>+		max_rx_queue_size = min_t(u32, max_queue_ext-&gt;max_rx_cq_depth,</div><div class='add'>+					  max_queue_ext-&gt;max_rx_sq_depth);</div><div class='add'>+		max_tx_queue_size = max_queue_ext-&gt;max_tx_cq_depth;</div><div class='add'>+</div><div class='add'>+		if (ena_dev-&gt;tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)</div><div class='add'>+			max_tx_queue_size = min_t(u32, max_tx_queue_size,</div><div class='add'>+						  llq-&gt;max_llq_depth);</div><div class='add'>+		else</div><div class='add'>+			max_tx_queue_size = min_t(u32, max_tx_queue_size,</div><div class='add'>+						  max_queue_ext-&gt;max_tx_sq_depth);</div><div class='add'>+</div><div class='add'>+		adapter-&gt;max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,</div><div class='add'>+						 max_queue_ext-&gt;max_per_packet_tx_descs);</div><div class='add'>+		adapter-&gt;max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,</div><div class='add'>+						 max_queue_ext-&gt;max_per_packet_rx_descs);</div><div class='add'>+	} else {</div><div class='add'>+		struct ena_admin_queue_feature_desc *max_queues =</div><div class='add'>+			&amp;get_feat_ctx-&gt;max_queues;</div><div class='add'>+		max_rx_queue_size = min_t(u32, max_queues-&gt;max_cq_depth,</div><div class='add'>+					  max_queues-&gt;max_sq_depth);</div><div class='add'>+		max_tx_queue_size = max_queues-&gt;max_cq_depth;</div><div class='add'>+</div><div class='add'>+		if (ena_dev-&gt;tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)</div><div class='add'>+			max_tx_queue_size = min_t(u32, max_tx_queue_size,</div><div class='add'>+						  llq-&gt;max_llq_depth);</div><div class='add'>+		else</div><div class='add'>+			max_tx_queue_size = min_t(u32, max_tx_queue_size,</div><div class='add'>+						  max_queues-&gt;max_sq_depth);</div><div class='add'>+</div><div class='add'>+		adapter-&gt;max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,</div><div class='add'>+						 max_queues-&gt;max_packet_tx_descs);</div><div class='add'>+		adapter-&gt;max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,</div><div class='add'>+						 max_queues-&gt;max_packet_rx_descs);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	max_tx_queue_size = rounddown_pow_of_two(max_tx_queue_size);</div><div class='add'>+	max_rx_queue_size = rounddown_pow_of_two(max_rx_queue_size);</div><div class='add'>+</div><div class='add'>+	if (max_tx_queue_size &lt; ENA_MIN_RING_SIZE) {</div><div class='add'>+		netdev_err(adapter-&gt;netdev, "Device max TX queue size: %d &lt; minimum: %d\n",</div><div class='add'>+			   max_tx_queue_size, ENA_MIN_RING_SIZE);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (max_rx_queue_size &lt; ENA_MIN_RING_SIZE) {</div><div class='add'>+		netdev_err(adapter-&gt;netdev, "Device max RX queue size: %d &lt; minimum: %d\n",</div><div class='add'>+			   max_rx_queue_size, ENA_MIN_RING_SIZE);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* When forcing large headers, we multiply the entry size by 2, and therefore divide</div><div class='add'>+	 * the queue size by 2, leaving the amount of memory used by the queues unchanged.</div><div class='add'>+	 */</div><div class='add'>+	if (adapter-&gt;large_llq_header_enabled) {</div><div class='add'>+		if ((llq-&gt;entry_size_ctrl_supported &amp; ENA_ADMIN_LIST_ENTRY_SIZE_256B) &amp;&amp;</div><div class='add'>+		    ena_dev-&gt;tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) {</div><div class='add'>+			max_tx_queue_size /= 2;</div><div class='add'>+			dev_info(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='add'>+				 "Forcing large headers and decreasing maximum TX queue size to %d\n",</div><div class='add'>+				 max_tx_queue_size);</div><div class='add'>+		} else {</div><div class='add'>+			dev_err(&amp;adapter-&gt;pdev-&gt;dev,</div><div class='add'>+				"Forcing large headers failed: LLQ is disabled or device does not support large headers\n");</div><div class='add'>+</div><div class='add'>+			adapter-&gt;large_llq_header_enabled = false;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tx_queue_size = clamp_val(tx_queue_size, ENA_MIN_RING_SIZE,</div><div class='add'>+				  max_tx_queue_size);</div><div class='add'>+	rx_queue_size = clamp_val(rx_queue_size, ENA_MIN_RING_SIZE,</div><div class='add'>+				  max_rx_queue_size);</div><div class='add'>+</div><div class='add'>+	tx_queue_size = rounddown_pow_of_two(tx_queue_size);</div><div class='add'>+	rx_queue_size = rounddown_pow_of_two(rx_queue_size);</div><div class='add'>+</div><div class='add'>+	adapter-&gt;max_tx_ring_size  = max_tx_queue_size;</div><div class='add'>+	adapter-&gt;max_rx_ring_size = max_rx_queue_size;</div><div class='add'>+	adapter-&gt;requested_tx_ring_size = tx_queue_size;</div><div class='add'>+	adapter-&gt;requested_rx_ring_size = rx_queue_size;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_device_validate_params(struct ena_adapter *adapter,</div><div class='add'>+				      struct ena_com_dev_get_features_ctx *get_feat_ctx)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = adapter-&gt;netdev;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = ether_addr_equal(get_feat_ctx-&gt;dev_attr.mac_addr,</div><div class='add'>+			      adapter-&gt;mac_addr);</div><div class='add'>+	if (!rc) {</div><div class='add'>+		netif_err(adapter, drv, netdev,</div><div class='add'>+			  "Error, mac address are different\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (get_feat_ctx-&gt;dev_attr.max_mtu &lt; netdev-&gt;mtu) {</div><div class='add'>+		netif_err(adapter, drv, netdev,</div><div class='add'>+			  "Error, device max mtu is smaller than netdev MTU\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void set_default_llq_configurations(struct ena_adapter *adapter,</div><div class='add'>+					   struct ena_llq_configurations *llq_config,</div><div class='add'>+					   struct ena_admin_feature_llq_desc *llq)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_dev *ena_dev = adapter-&gt;ena_dev;</div><div class='add'>+</div><div class='add'>+	llq_config-&gt;llq_header_location = ENA_ADMIN_INLINE_HEADER;</div><div class='add'>+	llq_config-&gt;llq_stride_ctrl = ENA_ADMIN_MULTIPLE_DESCS_PER_ENTRY;</div><div class='add'>+	llq_config-&gt;llq_num_decs_before_header = ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_2;</div><div class='add'>+</div><div class='add'>+	adapter-&gt;large_llq_header_supported =</div><div class='add'>+		!!(ena_dev-&gt;supported_features &amp; BIT(ENA_ADMIN_LLQ));</div><div class='add'>+	adapter-&gt;large_llq_header_supported &amp;=</div><div class='add'>+		!!(llq-&gt;entry_size_ctrl_supported &amp;</div><div class='add'>+			ENA_ADMIN_LIST_ENTRY_SIZE_256B);</div><div class='add'>+</div><div class='add'>+	if ((llq-&gt;entry_size_ctrl_supported &amp; ENA_ADMIN_LIST_ENTRY_SIZE_256B) &amp;&amp;</div><div class='add'>+	    adapter-&gt;large_llq_header_enabled) {</div><div class='add'>+		llq_config-&gt;llq_ring_entry_size = ENA_ADMIN_LIST_ENTRY_SIZE_256B;</div><div class='add'>+		llq_config-&gt;llq_ring_entry_size_value = 256;</div><div class='add'>+	} else {</div><div class='add'>+		llq_config-&gt;llq_ring_entry_size = ENA_ADMIN_LIST_ENTRY_SIZE_128B;</div><div class='add'>+		llq_config-&gt;llq_ring_entry_size_value = 128;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_set_queues_placement_policy(struct pci_dev *pdev,</div><div class='add'>+					   struct ena_com_dev *ena_dev,</div><div class='add'>+					   struct ena_admin_feature_llq_desc *llq,</div><div class='add'>+					   struct ena_llq_configurations *llq_default_configurations)</div><div class='add'>+{</div><div class='add'>+	int rc;</div><div class='add'>+	u32 llq_feature_mask;</div><div class='add'>+</div><div class='add'>+	llq_feature_mask = 1 &lt;&lt; ENA_ADMIN_LLQ;</div><div class='add'>+	if (!(ena_dev-&gt;supported_features &amp; llq_feature_mask)) {</div><div class='add'>+		dev_warn(&amp;pdev-&gt;dev,</div><div class='add'>+			"LLQ is not supported Fallback to host mode policy.\n");</div><div class='add'>+		ena_dev-&gt;tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!ena_dev-&gt;mem_bar) {</div><div class='add'>+		netdev_err(ena_dev-&gt;net_device,</div><div class='add'>+			   "LLQ is advertised as supported but device doesn't expose mem bar\n");</div><div class='add'>+		ena_dev-&gt;tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = ena_com_config_dev_mode(ena_dev, llq, llq_default_configurations);</div><div class='add'>+	if (unlikely(rc)) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+			"Failed to configure the device mode.  Fallback to host mode policy.\n");</div><div class='add'>+		ena_dev-&gt;tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_map_llq_mem_bar(struct pci_dev *pdev, struct ena_com_dev *ena_dev,</div><div class='add'>+			       int bars)</div><div class='add'>+{</div><div class='add'>+	bool has_mem_bar = !!(bars &amp; BIT(ENA_MEM_BAR));</div><div class='add'>+</div><div class='add'>+	if (!has_mem_bar)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ena_dev-&gt;mem_bar = devm_ioremap_wc(&amp;pdev-&gt;dev,</div><div class='add'>+					   pci_resource_start(pdev, ENA_MEM_BAR),</div><div class='add'>+					   pci_resource_len(pdev, ENA_MEM_BAR));</div><div class='add'>+</div><div class='add'>+	if (!ena_dev-&gt;mem_bar)</div><div class='add'>+		return -EFAULT;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_device_init(struct ena_adapter *adapter, struct pci_dev *pdev,</div><div class='add'>+			   struct ena_com_dev_get_features_ctx *get_feat_ctx,</div><div class='add'>+			   bool *wd_state)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_dev *ena_dev = adapter-&gt;ena_dev;</div><div class='add'>+	struct net_device *netdev = adapter-&gt;netdev;</div><div class='add'>+	struct ena_llq_configurations llq_config;</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	bool readless_supported;</div><div class='add'>+	u32 aenq_groups;</div><div class='add'>+	int dma_width;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = ena_com_mmio_reg_read_request_init(ena_dev);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(dev, "Failed to init mmio read less\n");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* The PCIe configuration space revision id indicate if mmio reg</div><div class='add'>+	 * read is disabled</div><div class='add'>+	 */</div><div class='add'>+	readless_supported = !(pdev-&gt;revision &amp; ENA_MMIO_DISABLE_REG_READ);</div><div class='add'>+	ena_com_set_mmio_read_mode(ena_dev, readless_supported);</div><div class='add'>+</div><div class='add'>+	rc = ena_com_dev_reset(ena_dev, ENA_REGS_RESET_NORMAL);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(dev, "Can not reset device\n");</div><div class='add'>+		goto err_mmio_read_less;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = ena_com_validate_version(ena_dev);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(dev, "Device version is too low\n");</div><div class='add'>+		goto err_mmio_read_less;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dma_width = ena_com_get_dma_width(ena_dev);</div><div class='add'>+	if (dma_width &lt; 0) {</div><div class='add'>+		dev_err(dev, "Invalid dma width value %d", dma_width);</div><div class='add'>+		rc = dma_width;</div><div class='add'>+		goto err_mmio_read_less;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(dma_width));</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(dev, "dma_set_mask_and_coherent failed %d\n", rc);</div><div class='add'>+		goto err_mmio_read_less;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ena_devlink_params_get(adapter-&gt;devlink);</div><div class='add'>+</div><div class='add'>+	/* ENA admin level init */</div><div class='add'>+	rc = ena_com_admin_init(ena_dev, &amp;aenq_handlers);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(dev,</div><div class='add'>+			"Can not initialize ena admin queue with device\n");</div><div class='add'>+		goto err_mmio_read_less;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* To enable the msix interrupts the driver needs to know the number</div><div class='add'>+	 * of queues. So the driver uses polling mode to retrieve this</div><div class='add'>+	 * information</div><div class='add'>+	 */</div><div class='add'>+	ena_com_set_admin_polling_mode(ena_dev, true);</div><div class='add'>+</div><div class='add'>+	ena_config_host_info(ena_dev, pdev);</div><div class='add'>+</div><div class='add'>+	/* Get Device Attributes*/</div><div class='add'>+	rc = ena_com_get_dev_attr_feat(ena_dev, get_feat_ctx);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(dev, "Cannot get attribute for ena device rc=%d\n", rc);</div><div class='add'>+		goto err_admin_init;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Try to turn all the available aenq groups */</div><div class='add'>+	aenq_groups = BIT(ENA_ADMIN_LINK_CHANGE) |</div><div class='add'>+		BIT(ENA_ADMIN_FATAL_ERROR) |</div><div class='add'>+		BIT(ENA_ADMIN_WARNING) |</div><div class='add'>+		BIT(ENA_ADMIN_NOTIFICATION) |</div><div class='add'>+		BIT(ENA_ADMIN_KEEP_ALIVE);</div><div class='add'>+</div><div class='add'>+	aenq_groups &amp;= get_feat_ctx-&gt;aenq.supported_groups;</div><div class='add'>+</div><div class='add'>+	rc = ena_com_set_aenq_config(ena_dev, aenq_groups);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(dev, "Cannot configure aenq groups rc= %d\n", rc);</div><div class='add'>+		goto err_admin_init;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*wd_state = !!(aenq_groups &amp; BIT(ENA_ADMIN_KEEP_ALIVE));</div><div class='add'>+</div><div class='add'>+	set_default_llq_configurations(adapter, &amp;llq_config, &amp;get_feat_ctx-&gt;llq);</div><div class='add'>+</div><div class='add'>+	rc = ena_set_queues_placement_policy(pdev, ena_dev, &amp;get_feat_ctx-&gt;llq,</div><div class='add'>+					     &amp;llq_config);</div><div class='add'>+	if (rc) {</div><div class='add'>+		netdev_err(netdev, "Cannot set queues placement policy rc= %d\n", rc);</div><div class='add'>+		goto err_admin_init;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = ena_calc_io_queue_size(adapter, get_feat_ctx);</div><div class='add'>+	if (unlikely(rc))</div><div class='add'>+		goto err_admin_init;</div><div class='add'>+</div><div class='add'>+	rc = ena_phc_init(adapter);</div><div class='add'>+	if (unlikely(rc &amp;&amp; (rc != -EOPNOTSUPP)))</div><div class='add'>+		netdev_err(netdev, "Failed initializing PHC, error: %d\n", rc);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_admin_init:</div><div class='add'>+	ena_com_abort_admin_commands(ena_dev);</div><div class='add'>+	ena_com_wait_for_abort_completion(ena_dev);</div><div class='add'>+	ena_com_delete_host_info(ena_dev);</div><div class='add'>+	ena_com_admin_destroy(ena_dev);</div><div class='add'>+err_mmio_read_less:</div><div class='add'>+	ena_com_mmio_reg_read_request_destroy(ena_dev);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_dev *ena_dev = adapter-&gt;ena_dev;</div><div class='add'>+	struct device *dev = &amp;adapter-&gt;pdev-&gt;dev;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = ena_enable_msix(adapter);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(dev, "Can not reserve msix vectors\n");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ena_setup_mgmnt_intr(adapter);</div><div class='add'>+</div><div class='add'>+	rc = ena_request_mgmnt_irq(adapter);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(dev, "Can not setup management interrupts\n");</div><div class='add'>+		goto err_disable_msix;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ena_com_set_admin_polling_mode(ena_dev, false);</div><div class='add'>+</div><div class='add'>+	ena_com_admin_aenq_enable(ena_dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_disable_msix:</div><div class='add'>+	ena_disable_msix(adapter);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_destroy_device(struct ena_adapter *adapter, bool graceful)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = adapter-&gt;netdev;</div><div class='add'>+	struct ena_com_dev *ena_dev = adapter-&gt;ena_dev;</div><div class='add'>+	bool dev_up;</div><div class='add'>+	int rc = 0;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &amp;adapter-&gt;flags))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	netif_carrier_off(netdev);</div><div class='add'>+</div><div class='add'>+	timer_delete_sync(&amp;adapter-&gt;timer_service);</div><div class='add'>+</div><div class='add'>+	dev_up = test_bit(ENA_FLAG_DEV_UP, &amp;adapter-&gt;flags);</div><div class='add'>+	adapter-&gt;dev_up_before_reset = dev_up;</div><div class='add'>+	if (!graceful)</div><div class='add'>+		ena_com_set_admin_running_state(ena_dev, false);</div><div class='add'>+</div><div class='add'>+	if (dev_up)</div><div class='add'>+		ena_down(adapter);</div><div class='add'>+</div><div class='add'>+	/* Stop the device from sending AENQ events (in case reset flag is set</div><div class='add'>+	 *  and device is up, ena_down() already reset the device.</div><div class='add'>+	 */</div><div class='add'>+	if (!(test_bit(ENA_FLAG_TRIGGER_RESET, &amp;adapter-&gt;flags) &amp;&amp; dev_up))</div><div class='add'>+		rc = ena_com_dev_reset(adapter-&gt;ena_dev, adapter-&gt;reset_reason);</div><div class='add'>+</div><div class='add'>+	ena_free_mgmnt_irq(adapter);</div><div class='add'>+</div><div class='add'>+	ena_disable_msix(adapter);</div><div class='add'>+</div><div class='add'>+	ena_com_abort_admin_commands(ena_dev);</div><div class='add'>+</div><div class='add'>+	ena_com_wait_for_abort_completion(ena_dev);</div><div class='add'>+</div><div class='add'>+	ena_com_admin_destroy(ena_dev);</div><div class='add'>+</div><div class='add'>+	ena_phc_destroy(adapter);</div><div class='add'>+</div><div class='add'>+	ena_com_mmio_reg_read_request_destroy(ena_dev);</div><div class='add'>+</div><div class='add'>+	/* return reset reason to default value */</div><div class='add'>+	adapter-&gt;reset_reason = ENA_REGS_RESET_NORMAL;</div><div class='add'>+</div><div class='add'>+	clear_bit(ENA_FLAG_TRIGGER_RESET, &amp;adapter-&gt;flags);</div><div class='add'>+	clear_bit(ENA_FLAG_DEVICE_RUNNING, &amp;adapter-&gt;flags);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_restore_device(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_dev_get_features_ctx get_feat_ctx;</div><div class='add'>+	struct ena_com_dev *ena_dev = adapter-&gt;ena_dev;</div><div class='add'>+	struct pci_dev *pdev = adapter-&gt;pdev;</div><div class='add'>+	struct ena_ring *txr;</div><div class='add'>+	int rc, count, i;</div><div class='add'>+	bool wd_state;</div><div class='add'>+</div><div class='add'>+	set_bit(ENA_FLAG_ONGOING_RESET, &amp;adapter-&gt;flags);</div><div class='add'>+	rc = ena_device_init(adapter, adapter-&gt;pdev, &amp;get_feat_ctx, &amp;wd_state);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Can not initialize device\n");</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+	adapter-&gt;wd_state = wd_state;</div><div class='add'>+</div><div class='add'>+	count =  adapter-&gt;xdp_num_queues + adapter-&gt;num_io_queues;</div><div class='add'>+	for (i = 0 ; i &lt; count; i++) {</div><div class='add'>+		txr = &amp;adapter-&gt;tx_ring[i];</div><div class='add'>+		txr-&gt;tx_mem_queue_type = ena_dev-&gt;tx_mem_queue_type;</div><div class='add'>+		txr-&gt;tx_max_header_size = ena_dev-&gt;tx_max_header_size;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = ena_device_validate_params(adapter, &amp;get_feat_ctx);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Validation of device parameters failed\n");</div><div class='add'>+		goto err_device_destroy;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = ena_enable_msix_and_set_admin_interrupts(adapter);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Enable MSI-X failed\n");</div><div class='add'>+		goto err_device_destroy;</div><div class='add'>+	}</div><div class='add'>+	/* If the interface was up before the reset bring it up */</div><div class='add'>+	if (adapter-&gt;dev_up_before_reset) {</div><div class='add'>+		rc = ena_up(adapter);</div><div class='add'>+		if (rc) {</div><div class='add'>+			dev_err(&amp;pdev-&gt;dev, "Failed to create I/O queues\n");</div><div class='add'>+			goto err_disable_msix;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	set_bit(ENA_FLAG_DEVICE_RUNNING, &amp;adapter-&gt;flags);</div><div class='add'>+</div><div class='add'>+	clear_bit(ENA_FLAG_ONGOING_RESET, &amp;adapter-&gt;flags);</div><div class='add'>+	if (test_bit(ENA_FLAG_LINK_UP, &amp;adapter-&gt;flags))</div><div class='add'>+		netif_carrier_on(adapter-&gt;netdev);</div><div class='add'>+</div><div class='add'>+	mod_timer(&amp;adapter-&gt;timer_service, round_jiffies(jiffies + HZ));</div><div class='add'>+	adapter-&gt;last_keep_alive_jiffies = jiffies;</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+err_disable_msix:</div><div class='add'>+	ena_free_mgmnt_irq(adapter);</div><div class='add'>+	ena_disable_msix(adapter);</div><div class='add'>+err_device_destroy:</div><div class='add'>+	ena_com_abort_admin_commands(ena_dev);</div><div class='add'>+	ena_com_wait_for_abort_completion(ena_dev);</div><div class='add'>+	ena_com_admin_destroy(ena_dev);</div><div class='add'>+	ena_com_dev_reset(ena_dev, ENA_REGS_RESET_DRIVER_INVALID_STATE);</div><div class='add'>+	ena_phc_destroy(adapter);</div><div class='add'>+	ena_com_mmio_reg_read_request_destroy(ena_dev);</div><div class='add'>+err:</div><div class='add'>+	clear_bit(ENA_FLAG_DEVICE_RUNNING, &amp;adapter-&gt;flags);</div><div class='add'>+	clear_bit(ENA_FLAG_ONGOING_RESET, &amp;adapter-&gt;flags);</div><div class='add'>+	dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+		"Reset attempt failed. Can not reset the device\n");</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_fw_reset_device(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	int rc = 0;</div><div class='add'>+</div><div class='add'>+	struct ena_adapter *adapter =</div><div class='add'>+		container_of(work, struct ena_adapter, reset_task);</div><div class='add'>+</div><div class='add'>+	rtnl_lock();</div><div class='add'>+</div><div class='add'>+	if (likely(test_bit(ENA_FLAG_TRIGGER_RESET, &amp;adapter-&gt;flags))) {</div><div class='add'>+		rc |= ena_destroy_device(adapter, false);</div><div class='add'>+		rc |= ena_restore_device(adapter);</div><div class='add'>+		adapter-&gt;dev_stats.reset_fail += !!rc;</div><div class='add'>+</div><div class='add'>+		dev_err(&amp;adapter-&gt;pdev-&gt;dev, "Device reset completed successfully\n");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int check_for_rx_interrupt_queue(struct ena_adapter *adapter,</div><div class='add'>+					struct ena_ring *rx_ring)</div><div class='add'>+{</div><div class='add'>+	struct ena_napi *ena_napi = container_of(rx_ring-&gt;napi, struct ena_napi, napi);</div><div class='add'>+</div><div class='add'>+	if (likely(READ_ONCE(ena_napi-&gt;first_interrupt)))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (ena_com_cq_empty(rx_ring-&gt;ena_com_io_cq))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	rx_ring-&gt;no_interrupt_event_cnt++;</div><div class='add'>+</div><div class='add'>+	if (rx_ring-&gt;no_interrupt_event_cnt == ENA_MAX_NO_INTERRUPT_ITERATIONS) {</div><div class='add'>+		netif_err(adapter, rx_err, adapter-&gt;netdev,</div><div class='add'>+			  "Potential MSIX issue on Rx side Queue = %d. Reset the device\n",</div><div class='add'>+			  rx_ring-&gt;qid);</div><div class='add'>+</div><div class='add'>+		ena_reset_device(adapter, ENA_REGS_RESET_MISS_INTERRUPT);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int check_missing_comp_in_tx_queue(struct ena_adapter *adapter,</div><div class='add'>+					  struct ena_ring *tx_ring)</div><div class='add'>+{</div><div class='add'>+	struct ena_napi *ena_napi = container_of(tx_ring-&gt;napi, struct ena_napi, napi);</div><div class='add'>+	enum ena_regs_reset_reason_types reset_reason = ENA_REGS_RESET_MISS_TX_CMPL;</div><div class='add'>+	unsigned int time_since_last_napi;</div><div class='add'>+	unsigned int missing_tx_comp_to;</div><div class='add'>+	bool is_tx_comp_time_expired;</div><div class='add'>+	struct ena_tx_buffer *tx_buf;</div><div class='add'>+	unsigned long last_jiffies;</div><div class='add'>+	int napi_scheduled;</div><div class='add'>+	u32 missed_tx = 0;</div><div class='add'>+	int i, rc = 0;</div><div class='add'>+</div><div class='add'>+	missing_tx_comp_to = jiffies_to_msecs(adapter-&gt;missing_tx_completion_to);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; tx_ring-&gt;ring_size; i++) {</div><div class='add'>+		tx_buf = &amp;tx_ring-&gt;tx_buffer_info[i];</div><div class='add'>+		last_jiffies = tx_buf-&gt;last_jiffies;</div><div class='add'>+</div><div class='add'>+		if (last_jiffies == 0)</div><div class='add'>+			/* no pending Tx at this location */</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		is_tx_comp_time_expired = time_is_before_jiffies(last_jiffies +</div><div class='add'>+			 2 * adapter-&gt;missing_tx_completion_to);</div><div class='add'>+</div><div class='add'>+		if (unlikely(!READ_ONCE(ena_napi-&gt;first_interrupt) &amp;&amp; is_tx_comp_time_expired)) {</div><div class='add'>+			/* If after graceful period interrupt is still not</div><div class='add'>+			 * received, we schedule a reset</div><div class='add'>+			 */</div><div class='add'>+			netif_err(adapter, tx_err, adapter-&gt;netdev,</div><div class='add'>+				  "Potential MSIX issue on Tx side Queue = %d. Reset the device\n",</div><div class='add'>+				  tx_ring-&gt;qid);</div><div class='add'>+			ena_reset_device(adapter, ENA_REGS_RESET_MISS_INTERRUPT);</div><div class='add'>+			return -EIO;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		is_tx_comp_time_expired = time_is_before_jiffies(last_jiffies +</div><div class='add'>+			adapter-&gt;missing_tx_completion_to);</div><div class='add'>+</div><div class='add'>+		if (unlikely(is_tx_comp_time_expired)) {</div><div class='add'>+			time_since_last_napi =</div><div class='add'>+				jiffies_to_usecs(jiffies - tx_ring-&gt;tx_stats.last_napi_jiffies);</div><div class='add'>+			napi_scheduled = !!(ena_napi-&gt;napi.state &amp; NAPIF_STATE_SCHED);</div><div class='add'>+</div><div class='add'>+			if (missing_tx_comp_to &lt; time_since_last_napi &amp;&amp; napi_scheduled) {</div><div class='add'>+				/* We suspect napi isn't called because the</div><div class='add'>+				 * bottom half is not run. Require a bigger</div><div class='add'>+				 * timeout for these cases</div><div class='add'>+				 */</div><div class='add'>+				if (!time_is_before_jiffies(last_jiffies +</div><div class='add'>+					2 * adapter-&gt;missing_tx_completion_to))</div><div class='add'>+					continue;</div><div class='add'>+</div><div class='add'>+				reset_reason = ENA_REGS_RESET_SUSPECTED_POLL_STARVATION;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			missed_tx++;</div><div class='add'>+</div><div class='add'>+			if (tx_buf-&gt;print_once)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			netif_notice(adapter, tx_err, adapter-&gt;netdev,</div><div class='add'>+				     "TX hasn't completed, qid %d, index %d. %u usecs from last napi execution, napi scheduled: %d\n",</div><div class='add'>+				     tx_ring-&gt;qid, i, time_since_last_napi, napi_scheduled);</div><div class='add'>+</div><div class='add'>+			tx_buf-&gt;print_once = 1;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (unlikely(missed_tx &gt; adapter-&gt;missing_tx_completion_threshold)) {</div><div class='add'>+		netif_err(adapter, tx_err, adapter-&gt;netdev,</div><div class='add'>+			  "Lost TX completions are above the threshold (%d &gt; %d). Completion transmission timeout: %u.\n",</div><div class='add'>+			  missed_tx,</div><div class='add'>+			  adapter-&gt;missing_tx_completion_threshold,</div><div class='add'>+			  missing_tx_comp_to);</div><div class='add'>+		netif_err(adapter, tx_err, adapter-&gt;netdev,</div><div class='add'>+			  "Resetting the device\n");</div><div class='add'>+</div><div class='add'>+		ena_reset_device(adapter, reset_reason);</div><div class='add'>+		rc = -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ena_increase_stat(&amp;tx_ring-&gt;tx_stats.missed_tx, missed_tx,</div><div class='add'>+			  &amp;tx_ring-&gt;syncp);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void check_for_missing_completions(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct ena_ring *tx_ring;</div><div class='add'>+	struct ena_ring *rx_ring;</div><div class='add'>+	int qid, budget, rc;</div><div class='add'>+	int io_queue_count;</div><div class='add'>+</div><div class='add'>+	io_queue_count = adapter-&gt;xdp_num_queues + adapter-&gt;num_io_queues;</div><div class='add'>+</div><div class='add'>+	/* Make sure the driver doesn't turn the device in other process */</div><div class='add'>+	smp_rmb();</div><div class='add'>+</div><div class='add'>+	if (!test_bit(ENA_FLAG_DEV_UP, &amp;adapter-&gt;flags))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (test_bit(ENA_FLAG_TRIGGER_RESET, &amp;adapter-&gt;flags))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (adapter-&gt;missing_tx_completion_to == ENA_HW_HINTS_NO_TIMEOUT)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	budget = min_t(u32, io_queue_count, ENA_MONITORED_TX_QUEUES);</div><div class='add'>+</div><div class='add'>+	qid = adapter-&gt;last_monitored_tx_qid;</div><div class='add'>+</div><div class='add'>+	while (budget) {</div><div class='add'>+		qid = (qid + 1) % io_queue_count;</div><div class='add'>+</div><div class='add'>+		tx_ring = &amp;adapter-&gt;tx_ring[qid];</div><div class='add'>+		rx_ring = &amp;adapter-&gt;rx_ring[qid];</div><div class='add'>+</div><div class='add'>+		rc = check_missing_comp_in_tx_queue(adapter, tx_ring);</div><div class='add'>+		if (unlikely(rc))</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		rc =  !ENA_IS_XDP_INDEX(adapter, qid) ?</div><div class='add'>+			check_for_rx_interrupt_queue(adapter, rx_ring) : 0;</div><div class='add'>+		if (unlikely(rc))</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		budget--;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	adapter-&gt;last_monitored_tx_qid = qid;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* trigger napi schedule after 2 consecutive detections */</div><div class='add'>+#define EMPTY_RX_REFILL 2</div><div class='add'>+/* For the rare case where the device runs out of Rx descriptors and the</div><div class='add'>+ * napi handler failed to refill new Rx descriptors (due to a lack of memory</div><div class='add'>+ * for example).</div><div class='add'>+ * This case will lead to a deadlock:</div><div class='add'>+ * The device won't send interrupts since all the new Rx packets will be dropped</div><div class='add'>+ * The napi handler won't allocate new Rx descriptors so the device will be</div><div class='add'>+ * able to send new packets.</div><div class='add'>+ *</div><div class='add'>+ * This scenario can happen when the kernel's vm.min_free_kbytes is too small.</div><div class='add'>+ * It is recommended to have at least 512MB, with a minimum of 128MB for</div><div class='add'>+ * constrained environment).</div><div class='add'>+ *</div><div class='add'>+ * When such a situation is detected - Reschedule napi</div><div class='add'>+ */</div><div class='add'>+static void check_for_empty_rx_ring(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct ena_ring *rx_ring;</div><div class='add'>+	int i, refill_required;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(ENA_FLAG_DEV_UP, &amp;adapter-&gt;flags))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (test_bit(ENA_FLAG_TRIGGER_RESET, &amp;adapter-&gt;flags))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; adapter-&gt;num_io_queues; i++) {</div><div class='add'>+		rx_ring = &amp;adapter-&gt;rx_ring[i];</div><div class='add'>+</div><div class='add'>+		refill_required = ena_com_free_q_entries(rx_ring-&gt;ena_com_io_sq);</div><div class='add'>+		if (unlikely(refill_required == (rx_ring-&gt;ring_size - 1))) {</div><div class='add'>+			rx_ring-&gt;empty_rx_queue++;</div><div class='add'>+</div><div class='add'>+			if (rx_ring-&gt;empty_rx_queue &gt;= EMPTY_RX_REFILL) {</div><div class='add'>+				ena_increase_stat(&amp;rx_ring-&gt;rx_stats.empty_rx_ring, 1,</div><div class='add'>+						  &amp;rx_ring-&gt;syncp);</div><div class='add'>+</div><div class='add'>+				netif_err(adapter, drv, adapter-&gt;netdev,</div><div class='add'>+					  "Trigger refill for ring %d\n", i);</div><div class='add'>+</div><div class='add'>+				napi_schedule(rx_ring-&gt;napi);</div><div class='add'>+				rx_ring-&gt;empty_rx_queue = 0;</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			rx_ring-&gt;empty_rx_queue = 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Check for keep alive expiration */</div><div class='add'>+static void check_for_missing_keep_alive(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	unsigned long keep_alive_expired;</div><div class='add'>+</div><div class='add'>+	if (!adapter-&gt;wd_state)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (adapter-&gt;keep_alive_timeout == ENA_HW_HINTS_NO_TIMEOUT)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	keep_alive_expired = adapter-&gt;last_keep_alive_jiffies +</div><div class='add'>+			     adapter-&gt;keep_alive_timeout;</div><div class='add'>+	if (unlikely(time_is_before_jiffies(keep_alive_expired))) {</div><div class='add'>+		netif_err(adapter, drv, adapter-&gt;netdev,</div><div class='add'>+			  "Keep alive watchdog timeout.\n");</div><div class='add'>+		ena_increase_stat(&amp;adapter-&gt;dev_stats.wd_expired, 1,</div><div class='add'>+				  &amp;adapter-&gt;syncp);</div><div class='add'>+		ena_reset_device(adapter, ENA_REGS_RESET_KEEP_ALIVE_TO);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void check_for_admin_com_state(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	if (unlikely(!ena_com_get_admin_running_state(adapter-&gt;ena_dev))) {</div><div class='add'>+		netif_err(adapter, drv, adapter-&gt;netdev,</div><div class='add'>+			  "ENA admin queue is not in running state!\n");</div><div class='add'>+		ena_increase_stat(&amp;adapter-&gt;dev_stats.admin_q_pause, 1,</div><div class='add'>+				  &amp;adapter-&gt;syncp);</div><div class='add'>+		ena_reset_device(adapter, ENA_REGS_RESET_ADMIN_TO);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_update_hints(struct ena_adapter *adapter,</div><div class='add'>+			     struct ena_admin_ena_hw_hints *hints)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = adapter-&gt;netdev;</div><div class='add'>+</div><div class='add'>+	if (hints-&gt;admin_completion_tx_timeout)</div><div class='add'>+		adapter-&gt;ena_dev-&gt;admin_queue.completion_timeout =</div><div class='add'>+			hints-&gt;admin_completion_tx_timeout * 1000;</div><div class='add'>+</div><div class='add'>+	if (hints-&gt;mmio_read_timeout)</div><div class='add'>+		/* convert to usec */</div><div class='add'>+		adapter-&gt;ena_dev-&gt;mmio_read.reg_read_to =</div><div class='add'>+			hints-&gt;mmio_read_timeout * 1000;</div><div class='add'>+</div><div class='add'>+	if (hints-&gt;missed_tx_completion_count_threshold_to_reset)</div><div class='add'>+		adapter-&gt;missing_tx_completion_threshold =</div><div class='add'>+			hints-&gt;missed_tx_completion_count_threshold_to_reset;</div><div class='add'>+</div><div class='add'>+	if (hints-&gt;missing_tx_completion_timeout) {</div><div class='add'>+		if (hints-&gt;missing_tx_completion_timeout == ENA_HW_HINTS_NO_TIMEOUT)</div><div class='add'>+			adapter-&gt;missing_tx_completion_to = ENA_HW_HINTS_NO_TIMEOUT;</div><div class='add'>+		else</div><div class='add'>+			adapter-&gt;missing_tx_completion_to =</div><div class='add'>+				msecs_to_jiffies(hints-&gt;missing_tx_completion_timeout);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (hints-&gt;netdev_wd_timeout)</div><div class='add'>+		netdev-&gt;watchdog_timeo = msecs_to_jiffies(hints-&gt;netdev_wd_timeout);</div><div class='add'>+</div><div class='add'>+	if (hints-&gt;driver_watchdog_timeout) {</div><div class='add'>+		if (hints-&gt;driver_watchdog_timeout == ENA_HW_HINTS_NO_TIMEOUT)</div><div class='add'>+			adapter-&gt;keep_alive_timeout = ENA_HW_HINTS_NO_TIMEOUT;</div><div class='add'>+		else</div><div class='add'>+			adapter-&gt;keep_alive_timeout =</div><div class='add'>+				msecs_to_jiffies(hints-&gt;driver_watchdog_timeout);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_update_host_info(struct ena_admin_host_info *host_info,</div><div class='add'>+				 struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	host_info-&gt;supported_network_features[0] =</div><div class='add'>+		netdev-&gt;features &amp; GENMASK_ULL(31, 0);</div><div class='add'>+	host_info-&gt;supported_network_features[1] =</div><div class='add'>+		(netdev-&gt;features &amp; GENMASK_ULL(63, 32)) &gt;&gt; 32;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_timer_service(struct timer_list *t)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = timer_container_of(adapter, t,</div><div class='add'>+							 timer_service);</div><div class='add'>+	u8 *debug_area = adapter-&gt;ena_dev-&gt;host_attr.debug_area_virt_addr;</div><div class='add'>+	struct ena_admin_host_info *host_info =</div><div class='add'>+		adapter-&gt;ena_dev-&gt;host_attr.host_info;</div><div class='add'>+</div><div class='add'>+	check_for_missing_keep_alive(adapter);</div><div class='add'>+</div><div class='add'>+	check_for_admin_com_state(adapter);</div><div class='add'>+</div><div class='add'>+	check_for_missing_completions(adapter);</div><div class='add'>+</div><div class='add'>+	check_for_empty_rx_ring(adapter);</div><div class='add'>+</div><div class='add'>+	if (debug_area)</div><div class='add'>+		ena_dump_stats_to_buf(adapter, debug_area);</div><div class='add'>+</div><div class='add'>+	if (host_info)</div><div class='add'>+		ena_update_host_info(host_info, adapter-&gt;netdev);</div><div class='add'>+</div><div class='add'>+	if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &amp;adapter-&gt;flags))) {</div><div class='add'>+		netif_err(adapter, drv, adapter-&gt;netdev,</div><div class='add'>+			  "Trigger reset is on\n");</div><div class='add'>+		ena_dump_stats_to_dmesg(adapter);</div><div class='add'>+		queue_work(ena_wq, &amp;adapter-&gt;reset_task);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Reset the timer */</div><div class='add'>+	mod_timer(&amp;adapter-&gt;timer_service, round_jiffies(jiffies + HZ));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 ena_calc_max_io_queue_num(struct pci_dev *pdev,</div><div class='add'>+				     struct ena_com_dev *ena_dev,</div><div class='add'>+				     struct ena_com_dev_get_features_ctx *get_feat_ctx)</div><div class='add'>+{</div><div class='add'>+	u32 io_tx_sq_num, io_tx_cq_num, io_rx_num, max_num_io_queues;</div><div class='add'>+</div><div class='add'>+	if (ena_dev-&gt;supported_features &amp; BIT(ENA_ADMIN_MAX_QUEUES_EXT)) {</div><div class='add'>+		struct ena_admin_queue_ext_feature_fields *max_queue_ext =</div><div class='add'>+			&amp;get_feat_ctx-&gt;max_queue_ext.max_queue_ext;</div><div class='add'>+		io_rx_num = min_t(u32, max_queue_ext-&gt;max_rx_sq_num,</div><div class='add'>+				  max_queue_ext-&gt;max_rx_cq_num);</div><div class='add'>+</div><div class='add'>+		io_tx_sq_num = max_queue_ext-&gt;max_tx_sq_num;</div><div class='add'>+		io_tx_cq_num = max_queue_ext-&gt;max_tx_cq_num;</div><div class='add'>+	} else {</div><div class='add'>+		struct ena_admin_queue_feature_desc *max_queues =</div><div class='add'>+			&amp;get_feat_ctx-&gt;max_queues;</div><div class='add'>+		io_tx_sq_num = max_queues-&gt;max_sq_num;</div><div class='add'>+		io_tx_cq_num = max_queues-&gt;max_cq_num;</div><div class='add'>+		io_rx_num = min_t(u32, io_tx_sq_num, io_tx_cq_num);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* In case of LLQ use the llq fields for the tx SQ/CQ */</div><div class='add'>+	if (ena_dev-&gt;tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)</div><div class='add'>+		io_tx_sq_num = get_feat_ctx-&gt;llq.max_llq_num;</div><div class='add'>+</div><div class='add'>+	max_num_io_queues = min_t(u32, num_online_cpus(), ENA_MAX_NUM_IO_QUEUES);</div><div class='add'>+	max_num_io_queues = min_t(u32, max_num_io_queues, io_rx_num);</div><div class='add'>+	max_num_io_queues = min_t(u32, max_num_io_queues, io_tx_sq_num);</div><div class='add'>+	max_num_io_queues = min_t(u32, max_num_io_queues, io_tx_cq_num);</div><div class='add'>+	/* 1 IRQ for mgmnt and 1 IRQs for each IO direction */</div><div class='add'>+	max_num_io_queues = min_t(u32, max_num_io_queues, pci_msix_vec_count(pdev) - 1);</div><div class='add'>+</div><div class='add'>+	return max_num_io_queues;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_set_dev_offloads(struct ena_com_dev_get_features_ctx *feat,</div><div class='add'>+				 struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	netdev_features_t dev_features = 0;</div><div class='add'>+</div><div class='add'>+	/* Set offload features */</div><div class='add'>+	if (feat-&gt;offload.tx &amp;</div><div class='add'>+		ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK)</div><div class='add'>+		dev_features |= NETIF_F_IP_CSUM;</div><div class='add'>+</div><div class='add'>+	if (feat-&gt;offload.tx &amp;</div><div class='add'>+		ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_MASK)</div><div class='add'>+		dev_features |= NETIF_F_IPV6_CSUM;</div><div class='add'>+</div><div class='add'>+	if (feat-&gt;offload.tx &amp; ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_MASK)</div><div class='add'>+		dev_features |= NETIF_F_TSO;</div><div class='add'>+</div><div class='add'>+	if (feat-&gt;offload.tx &amp; ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_MASK)</div><div class='add'>+		dev_features |= NETIF_F_TSO6;</div><div class='add'>+</div><div class='add'>+	if (feat-&gt;offload.tx &amp; ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_ECN_MASK)</div><div class='add'>+		dev_features |= NETIF_F_TSO_ECN;</div><div class='add'>+</div><div class='add'>+	if (feat-&gt;offload.rx_supported &amp;</div><div class='add'>+		ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_MASK)</div><div class='add'>+		dev_features |= NETIF_F_RXCSUM;</div><div class='add'>+</div><div class='add'>+	if (feat-&gt;offload.rx_supported &amp;</div><div class='add'>+		ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_MASK)</div><div class='add'>+		dev_features |= NETIF_F_RXCSUM;</div><div class='add'>+</div><div class='add'>+	netdev-&gt;features =</div><div class='add'>+		dev_features |</div><div class='add'>+		NETIF_F_SG |</div><div class='add'>+		NETIF_F_RXHASH |</div><div class='add'>+		NETIF_F_HIGHDMA;</div><div class='add'>+</div><div class='add'>+	netdev-&gt;hw_features |= netdev-&gt;features;</div><div class='add'>+	netdev-&gt;vlan_features |= netdev-&gt;features;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_set_conf_feat_params(struct ena_adapter *adapter,</div><div class='add'>+				     struct ena_com_dev_get_features_ctx *feat)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = adapter-&gt;netdev;</div><div class='add'>+</div><div class='add'>+	/* Copy mac address */</div><div class='add'>+	if (!is_valid_ether_addr(feat-&gt;dev_attr.mac_addr)) {</div><div class='add'>+		eth_hw_addr_random(netdev);</div><div class='add'>+		ether_addr_copy(adapter-&gt;mac_addr, netdev-&gt;dev_addr);</div><div class='add'>+	} else {</div><div class='add'>+		ether_addr_copy(adapter-&gt;mac_addr, feat-&gt;dev_attr.mac_addr);</div><div class='add'>+		eth_hw_addr_set(netdev, adapter-&gt;mac_addr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set offload features */</div><div class='add'>+	ena_set_dev_offloads(feat, netdev);</div><div class='add'>+</div><div class='add'>+	adapter-&gt;max_mtu = feat-&gt;dev_attr.max_mtu;</div><div class='add'>+	netdev-&gt;max_mtu = adapter-&gt;max_mtu;</div><div class='add'>+	netdev-&gt;min_mtu = ENA_MIN_MTU;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_rss_init_default(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_dev *ena_dev = adapter-&gt;ena_dev;</div><div class='add'>+	struct device *dev = &amp;adapter-&gt;pdev-&gt;dev;</div><div class='add'>+	int rc, i;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	rc = ena_com_rss_init(ena_dev, ENA_RX_RSS_TABLE_LOG_SIZE);</div><div class='add'>+	if (unlikely(rc)) {</div><div class='add'>+		dev_err(dev, "Cannot init indirect table\n");</div><div class='add'>+		goto err_rss_init;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ENA_RX_RSS_TABLE_SIZE; i++) {</div><div class='add'>+		val = ethtool_rxfh_indir_default(i, adapter-&gt;num_io_queues);</div><div class='add'>+		rc = ena_com_indirect_table_fill_entry(ena_dev, i,</div><div class='add'>+						       ENA_IO_RXQ_IDX(val));</div><div class='add'>+		if (unlikely(rc)) {</div><div class='add'>+			dev_err(dev, "Cannot fill indirect table\n");</div><div class='add'>+			goto err_fill_indir;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = ena_com_fill_hash_function(ena_dev, ENA_ADMIN_TOEPLITZ, NULL, ENA_HASH_KEY_SIZE,</div><div class='add'>+					0xFFFFFFFF);</div><div class='add'>+	if (unlikely(rc &amp;&amp; (rc != -EOPNOTSUPP))) {</div><div class='add'>+		dev_err(dev, "Cannot fill hash function\n");</div><div class='add'>+		goto err_fill_indir;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = ena_com_set_default_hash_ctrl(ena_dev);</div><div class='add'>+	if (unlikely(rc &amp;&amp; (rc != -EOPNOTSUPP))) {</div><div class='add'>+		dev_err(dev, "Cannot fill hash control\n");</div><div class='add'>+		goto err_fill_indir;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_fill_indir:</div><div class='add'>+	ena_com_rss_destroy(ena_dev);</div><div class='add'>+err_rss_init:</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_release_bars(struct ena_com_dev *ena_dev, struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	int release_bars = pci_select_bars(pdev, IORESOURCE_MEM) &amp; ENA_BAR_MASK;</div><div class='add'>+</div><div class='add'>+	pci_release_selected_regions(pdev, release_bars);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ena_probe - Device Initialization Routine</div><div class='add'>+ * @pdev: PCI device information struct</div><div class='add'>+ * @ent: entry in ena_pci_tbl</div><div class='add'>+ *</div><div class='add'>+ * Returns 0 on success, negative on failure</div><div class='add'>+ *</div><div class='add'>+ * ena_probe initializes an adapter identified by a pci_dev structure.</div><div class='add'>+ * The OS initialization, configuring of the adapter private structure,</div><div class='add'>+ * and a hardware reset occur.</div><div class='add'>+ */</div><div class='add'>+static int ena_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_dev_get_features_ctx get_feat_ctx;</div><div class='add'>+	struct ena_com_dev *ena_dev = NULL;</div><div class='add'>+	struct ena_adapter *adapter;</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	static int adapters_found;</div><div class='add'>+	struct devlink *devlink;</div><div class='add'>+	u32 max_num_io_queues;</div><div class='add'>+	bool wd_state;</div><div class='add'>+	int bars, rc;</div><div class='add'>+</div><div class='add'>+	dev_dbg(&amp;pdev-&gt;dev, "%s\n", __func__);</div><div class='add'>+</div><div class='add'>+	rc = pci_enable_device_mem(pdev);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "pci_enable_device_mem() failed!\n");</div><div class='add'>+		return rc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = dma_set_mask_and_coherent(&amp;pdev-&gt;dev, DMA_BIT_MASK(ENA_MAX_PHYS_ADDR_SIZE_BITS));</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "dma_set_mask_and_coherent failed %d\n", rc);</div><div class='add'>+		goto err_disable_device;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pci_set_master(pdev);</div><div class='add'>+</div><div class='add'>+	ena_dev = vzalloc(sizeof(*ena_dev));</div><div class='add'>+	if (!ena_dev) {</div><div class='add'>+		rc = -ENOMEM;</div><div class='add'>+		goto err_disable_device;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	bars = pci_select_bars(pdev, IORESOURCE_MEM) &amp; ENA_BAR_MASK;</div><div class='add'>+	rc = pci_request_selected_regions(pdev, bars, DRV_MODULE_NAME);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "pci_request_selected_regions failed %d\n",</div><div class='add'>+			rc);</div><div class='add'>+		goto err_free_ena_dev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ena_dev-&gt;reg_bar = devm_ioremap(&amp;pdev-&gt;dev,</div><div class='add'>+					pci_resource_start(pdev, ENA_REG_BAR),</div><div class='add'>+					pci_resource_len(pdev, ENA_REG_BAR));</div><div class='add'>+	if (!ena_dev-&gt;reg_bar) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Failed to remap regs bar\n");</div><div class='add'>+		rc = -EFAULT;</div><div class='add'>+		goto err_free_region;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ena_dev-&gt;ena_min_poll_delay_us = ENA_ADMIN_POLL_DELAY_US;</div><div class='add'>+</div><div class='add'>+	ena_dev-&gt;dmadev = &amp;pdev-&gt;dev;</div><div class='add'>+</div><div class='add'>+	netdev = alloc_etherdev_mq(sizeof(struct ena_adapter), ENA_MAX_RINGS);</div><div class='add'>+	if (!netdev) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "alloc_etherdev_mq failed\n");</div><div class='add'>+		rc = -ENOMEM;</div><div class='add'>+		goto err_free_region;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	SET_NETDEV_DEV(netdev, &amp;pdev-&gt;dev);</div><div class='add'>+	adapter = netdev_priv(netdev);</div><div class='add'>+	adapter-&gt;ena_dev = ena_dev;</div><div class='add'>+	adapter-&gt;netdev = netdev;</div><div class='add'>+	adapter-&gt;pdev = pdev;</div><div class='add'>+	adapter-&gt;msg_enable = DEFAULT_MSG_ENABLE;</div><div class='add'>+</div><div class='add'>+	ena_dev-&gt;net_device = netdev;</div><div class='add'>+</div><div class='add'>+	pci_set_drvdata(pdev, adapter);</div><div class='add'>+</div><div class='add'>+	rc = ena_phc_alloc(adapter);</div><div class='add'>+	if (rc) {</div><div class='add'>+		netdev_err(netdev, "ena_phc_alloc failed\n");</div><div class='add'>+		goto err_netdev_destroy;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = ena_com_allocate_customer_metrics_buffer(ena_dev);</div><div class='add'>+	if (rc) {</div><div class='add'>+		netdev_err(netdev, "ena_com_allocate_customer_metrics_buffer failed\n");</div><div class='add'>+		goto err_free_phc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = ena_map_llq_mem_bar(pdev, ena_dev, bars);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "ENA LLQ bar mapping failed\n");</div><div class='add'>+		goto err_metrics_destroy;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Need to do this before ena_device_init */</div><div class='add'>+	devlink = ena_devlink_alloc(adapter);</div><div class='add'>+	if (!devlink) {</div><div class='add'>+		netdev_err(netdev, "ena_devlink_alloc failed\n");</div><div class='add'>+		rc = -ENOMEM;</div><div class='add'>+		goto err_metrics_destroy;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = ena_device_init(adapter, pdev, &amp;get_feat_ctx, &amp;wd_state);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "ENA device init failed\n");</div><div class='add'>+		if (rc == -ETIME)</div><div class='add'>+			rc = -EPROBE_DEFER;</div><div class='add'>+		goto ena_devlink_destroy;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Initial TX and RX interrupt delay. Assumes 1 usec granularity.</div><div class='add'>+	 * Updated during device initialization with the real granularity</div><div class='add'>+	 */</div><div class='add'>+	ena_dev-&gt;intr_moder_tx_interval = ENA_INTR_INITIAL_TX_INTERVAL_USECS;</div><div class='add'>+	ena_dev-&gt;intr_moder_rx_interval = ENA_INTR_INITIAL_RX_INTERVAL_USECS;</div><div class='add'>+	ena_dev-&gt;intr_delay_resolution = ENA_DEFAULT_INTR_DELAY_RESOLUTION;</div><div class='add'>+	max_num_io_queues = ena_calc_max_io_queue_num(pdev, ena_dev, &amp;get_feat_ctx);</div><div class='add'>+	if (unlikely(!max_num_io_queues)) {</div><div class='add'>+		rc = -EFAULT;</div><div class='add'>+		goto err_device_destroy;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ena_set_conf_feat_params(adapter, &amp;get_feat_ctx);</div><div class='add'>+</div><div class='add'>+	adapter-&gt;reset_reason = ENA_REGS_RESET_NORMAL;</div><div class='add'>+</div><div class='add'>+	adapter-&gt;num_io_queues = max_num_io_queues;</div><div class='add'>+	adapter-&gt;max_num_io_queues = max_num_io_queues;</div><div class='add'>+	adapter-&gt;last_monitored_tx_qid = 0;</div><div class='add'>+</div><div class='add'>+	adapter-&gt;xdp_first_ring = 0;</div><div class='add'>+	adapter-&gt;xdp_num_queues = 0;</div><div class='add'>+</div><div class='add'>+	adapter-&gt;rx_copybreak = ENA_DEFAULT_RX_COPYBREAK;</div><div class='add'>+	if (ena_dev-&gt;tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)</div><div class='add'>+		adapter-&gt;disable_meta_caching =</div><div class='add'>+			!!(get_feat_ctx.llq.accel_mode.u.get.supported_flags &amp;</div><div class='add'>+			   BIT(ENA_ADMIN_DISABLE_META_CACHING));</div><div class='add'>+</div><div class='add'>+	adapter-&gt;wd_state = wd_state;</div><div class='add'>+</div><div class='add'>+	snprintf(adapter-&gt;name, ENA_NAME_MAX_LEN, "ena_%d", adapters_found);</div><div class='add'>+</div><div class='add'>+	rc = ena_com_init_interrupt_moderation(adapter-&gt;ena_dev);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+			"Failed to query interrupt moderation feature\n");</div><div class='add'>+		goto err_device_destroy;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ena_init_io_rings(adapter,</div><div class='add'>+			  0,</div><div class='add'>+			  adapter-&gt;xdp_num_queues +</div><div class='add'>+			  adapter-&gt;num_io_queues);</div><div class='add'>+</div><div class='add'>+	netdev-&gt;netdev_ops = &amp;ena_netdev_ops;</div><div class='add'>+	netdev-&gt;watchdog_timeo = TX_TIMEOUT;</div><div class='add'>+	ena_set_ethtool_ops(netdev);</div><div class='add'>+</div><div class='add'>+	netdev-&gt;priv_flags |= IFF_UNICAST_FLT;</div><div class='add'>+</div><div class='add'>+	u64_stats_init(&amp;adapter-&gt;syncp);</div><div class='add'>+</div><div class='add'>+	rc = ena_enable_msix_and_set_admin_interrupts(adapter);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+			"Failed to enable and set the admin interrupts\n");</div><div class='add'>+		goto err_worker_destroy;</div><div class='add'>+	}</div><div class='add'>+	rc = ena_rss_init_default(adapter);</div><div class='add'>+	if (rc &amp;&amp; (rc != -EOPNOTSUPP)) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Cannot init RSS rc: %d\n", rc);</div><div class='add'>+		goto err_free_msix;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ena_config_debug_area(adapter);</div><div class='add'>+</div><div class='add'>+	if (ena_xdp_legal_queue_count(adapter, adapter-&gt;num_io_queues))</div><div class='add'>+		netdev-&gt;xdp_features = NETDEV_XDP_ACT_BASIC |</div><div class='add'>+				       NETDEV_XDP_ACT_REDIRECT;</div><div class='add'>+</div><div class='add'>+	memcpy(adapter-&gt;netdev-&gt;perm_addr, adapter-&gt;mac_addr, netdev-&gt;addr_len);</div><div class='add'>+</div><div class='add'>+	netif_carrier_off(netdev);</div><div class='add'>+</div><div class='add'>+	rc = register_netdev(netdev);</div><div class='add'>+	if (rc) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev, "Cannot register net device\n");</div><div class='add'>+		goto err_rss;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ena_debugfs_init(netdev);</div><div class='add'>+</div><div class='add'>+	INIT_WORK(&amp;adapter-&gt;reset_task, ena_fw_reset_device);</div><div class='add'>+</div><div class='add'>+	adapter-&gt;last_keep_alive_jiffies = jiffies;</div><div class='add'>+	adapter-&gt;keep_alive_timeout = ENA_DEVICE_KALIVE_TIMEOUT;</div><div class='add'>+	adapter-&gt;missing_tx_completion_to = TX_TIMEOUT;</div><div class='add'>+	adapter-&gt;missing_tx_completion_threshold = MAX_NUM_OF_TIMEOUTED_PACKETS;</div><div class='add'>+</div><div class='add'>+	ena_update_hints(adapter, &amp;get_feat_ctx.hw_hints);</div><div class='add'>+</div><div class='add'>+	timer_setup(&amp;adapter-&gt;timer_service, ena_timer_service, 0);</div><div class='add'>+	mod_timer(&amp;adapter-&gt;timer_service, round_jiffies(jiffies + HZ));</div><div class='add'>+</div><div class='add'>+	dev_info(&amp;pdev-&gt;dev,</div><div class='add'>+		 "%s found at mem %lx, mac addr %pM\n",</div><div class='add'>+		 DEVICE_NAME, (long)pci_resource_start(pdev, 0),</div><div class='add'>+		 netdev-&gt;dev_addr);</div><div class='add'>+</div><div class='add'>+	set_bit(ENA_FLAG_DEVICE_RUNNING, &amp;adapter-&gt;flags);</div><div class='add'>+</div><div class='add'>+	adapters_found++;</div><div class='add'>+</div><div class='add'>+	/* From this point, the devlink device is visible to users.</div><div class='add'>+	 * Perform the registration last to ensure that all the resources</div><div class='add'>+	 * are available and that the netdevice is registered.</div><div class='add'>+	 */</div><div class='add'>+	ena_devlink_register(devlink, &amp;pdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_rss:</div><div class='add'>+	ena_com_delete_debug_area(ena_dev);</div><div class='add'>+	ena_com_rss_destroy(ena_dev);</div><div class='add'>+err_free_msix:</div><div class='add'>+	ena_com_dev_reset(ena_dev, ENA_REGS_RESET_INIT_ERR);</div><div class='add'>+	/* stop submitting admin commands on a device that was reset */</div><div class='add'>+	ena_com_set_admin_running_state(ena_dev, false);</div><div class='add'>+	ena_free_mgmnt_irq(adapter);</div><div class='add'>+	ena_disable_msix(adapter);</div><div class='add'>+err_worker_destroy:</div><div class='add'>+	timer_delete(&amp;adapter-&gt;timer_service);</div><div class='add'>+err_device_destroy:</div><div class='add'>+	ena_com_delete_host_info(ena_dev);</div><div class='add'>+	ena_com_admin_destroy(ena_dev);</div><div class='add'>+ena_devlink_destroy:</div><div class='add'>+	ena_devlink_free(devlink);</div><div class='add'>+err_metrics_destroy:</div><div class='add'>+	ena_com_delete_customer_metrics_buffer(ena_dev);</div><div class='add'>+err_free_phc:</div><div class='add'>+	ena_phc_free(adapter);</div><div class='add'>+err_netdev_destroy:</div><div class='add'>+	free_netdev(netdev);</div><div class='add'>+err_free_region:</div><div class='add'>+	ena_release_bars(ena_dev, pdev);</div><div class='add'>+err_free_ena_dev:</div><div class='add'>+	vfree(ena_dev);</div><div class='add'>+err_disable_device:</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*****************************************************************************/</div><div class='add'>+</div><div class='add'>+/* __ena_shutoff - Helper used in both PCI remove/shutdown routines</div><div class='add'>+ * @pdev: PCI device information struct</div><div class='add'>+ * @shutdown: Is it a shutdown operation? If false, means it is a removal</div><div class='add'>+ *</div><div class='add'>+ * __ena_shutoff is a helper routine that does the real work on shutdown and</div><div class='add'>+ * removal paths; the difference between those paths is with regards to whether</div><div class='add'>+ * dettach or unregister the netdevice.</div><div class='add'>+ */</div><div class='add'>+static void __ena_shutoff(struct pci_dev *pdev, bool shutdown)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = pci_get_drvdata(pdev);</div><div class='add'>+	struct ena_com_dev *ena_dev;</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+</div><div class='add'>+	ena_dev = adapter-&gt;ena_dev;</div><div class='add'>+	netdev = adapter-&gt;netdev;</div><div class='add'>+</div><div class='add'>+	ena_debugfs_terminate(netdev);</div><div class='add'>+</div><div class='add'>+	/* Make sure timer and reset routine won't be called after</div><div class='add'>+	 * freeing device resources.</div><div class='add'>+	 */</div><div class='add'>+	timer_delete_sync(&amp;adapter-&gt;timer_service);</div><div class='add'>+	cancel_work_sync(&amp;adapter-&gt;reset_task);</div><div class='add'>+</div><div class='add'>+	rtnl_lock(); /* lock released inside the below if-else block */</div><div class='add'>+	adapter-&gt;reset_reason = ENA_REGS_RESET_SHUTDOWN;</div><div class='add'>+	ena_destroy_device(adapter, true);</div><div class='add'>+</div><div class='add'>+	ena_phc_free(adapter);</div><div class='add'>+</div><div class='add'>+	ena_devlink_unregister(adapter-&gt;devlink);</div><div class='add'>+	ena_devlink_free(adapter-&gt;devlink);</div><div class='add'>+</div><div class='add'>+	if (shutdown) {</div><div class='add'>+		netif_device_detach(netdev);</div><div class='add'>+		dev_close(netdev);</div><div class='add'>+		rtnl_unlock();</div><div class='add'>+	} else {</div><div class='add'>+		rtnl_unlock();</div><div class='add'>+		unregister_netdev(netdev);</div><div class='add'>+		free_netdev(netdev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ena_com_rss_destroy(ena_dev);</div><div class='add'>+</div><div class='add'>+	ena_com_delete_debug_area(ena_dev);</div><div class='add'>+</div><div class='add'>+	ena_com_delete_host_info(ena_dev);</div><div class='add'>+</div><div class='add'>+	ena_com_delete_customer_metrics_buffer(ena_dev);</div><div class='add'>+</div><div class='add'>+	ena_release_bars(ena_dev, pdev);</div><div class='add'>+</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+</div><div class='add'>+	vfree(ena_dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ena_remove - Device Removal Routine</div><div class='add'>+ * @pdev: PCI device information struct</div><div class='add'>+ *</div><div class='add'>+ * ena_remove is called by the PCI subsystem to alert the driver</div><div class='add'>+ * that it should release a PCI device.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static void ena_remove(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	__ena_shutoff(pdev, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ena_shutdown - Device Shutdown Routine</div><div class='add'>+ * @pdev: PCI device information struct</div><div class='add'>+ *</div><div class='add'>+ * ena_shutdown is called by the PCI subsystem to alert the driver that</div><div class='add'>+ * a shutdown/reboot (or kexec) is happening and device must be disabled.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+static void ena_shutdown(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	__ena_shutoff(pdev, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ena_suspend - PM suspend callback</div><div class='add'>+ * @dev_d: Device information struct</div><div class='add'>+ */</div><div class='add'>+static int __maybe_unused ena_suspend(struct device *dev_d)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = to_pci_dev(dev_d);</div><div class='add'>+	struct ena_adapter *adapter = pci_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	ena_increase_stat(&amp;adapter-&gt;dev_stats.suspend, 1, &amp;adapter-&gt;syncp);</div><div class='add'>+</div><div class='add'>+	rtnl_lock();</div><div class='add'>+	if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &amp;adapter-&gt;flags))) {</div><div class='add'>+		dev_err(&amp;pdev-&gt;dev,</div><div class='add'>+			"Ignoring device reset request as the device is being suspended\n");</div><div class='add'>+		clear_bit(ENA_FLAG_TRIGGER_RESET, &amp;adapter-&gt;flags);</div><div class='add'>+	}</div><div class='add'>+	ena_destroy_device(adapter, true);</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* ena_resume - PM resume callback</div><div class='add'>+ * @dev_d: Device information struct</div><div class='add'>+ */</div><div class='add'>+static int __maybe_unused ena_resume(struct device *dev_d)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = dev_get_drvdata(dev_d);</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	ena_increase_stat(&amp;adapter-&gt;dev_stats.resume, 1, &amp;adapter-&gt;syncp);</div><div class='add'>+</div><div class='add'>+	rtnl_lock();</div><div class='add'>+	rc = ena_restore_device(adapter);</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static SIMPLE_DEV_PM_OPS(ena_pm_ops, ena_suspend, ena_resume);</div><div class='add'>+</div><div class='add'>+static struct pci_driver ena_pci_driver = {</div><div class='add'>+	.name		= DRV_MODULE_NAME,</div><div class='add'>+	.id_table	= ena_pci_tbl,</div><div class='add'>+	.probe		= ena_probe,</div><div class='add'>+	.remove		= ena_remove,</div><div class='add'>+	.shutdown	= ena_shutdown,</div><div class='add'>+	.driver.pm	= &amp;ena_pm_ops,</div><div class='add'>+	.sriov_configure = pci_sriov_configure_simple,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init ena_init(void)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ena_wq = create_singlethread_workqueue(DRV_MODULE_NAME);</div><div class='add'>+	if (!ena_wq) {</div><div class='add'>+		pr_err("Failed to create workqueue\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = pci_register_driver(&amp;ena_pci_driver);</div><div class='add'>+	if (ret)</div><div class='add'>+		destroy_workqueue(ena_wq);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit ena_cleanup(void)</div><div class='add'>+{</div><div class='add'>+	pci_unregister_driver(&amp;ena_pci_driver);</div><div class='add'>+</div><div class='add'>+	if (ena_wq) {</div><div class='add'>+		destroy_workqueue(ena_wq);</div><div class='add'>+		ena_wq = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/******************************************************************************</div><div class='add'>+ ******************************** AENQ Handlers *******************************</div><div class='add'>+ *****************************************************************************/</div><div class='add'>+/* ena_update_on_link_change:</div><div class='add'>+ * Notify the network interface about the change in link status</div><div class='add'>+ */</div><div class='add'>+static void ena_update_on_link_change(void *adapter_data,</div><div class='add'>+				      struct ena_admin_aenq_entry *aenq_e)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;</div><div class='add'>+	struct ena_admin_aenq_link_change_desc *aenq_desc =</div><div class='add'>+		(struct ena_admin_aenq_link_change_desc *)aenq_e;</div><div class='add'>+	int status = aenq_desc-&gt;flags &amp;</div><div class='add'>+		ENA_ADMIN_AENQ_LINK_CHANGE_DESC_LINK_STATUS_MASK;</div><div class='add'>+</div><div class='add'>+	if (status) {</div><div class='add'>+		netif_dbg(adapter, ifup, adapter-&gt;netdev, "%s\n", __func__);</div><div class='add'>+		set_bit(ENA_FLAG_LINK_UP, &amp;adapter-&gt;flags);</div><div class='add'>+		if (!test_bit(ENA_FLAG_ONGOING_RESET, &amp;adapter-&gt;flags))</div><div class='add'>+			netif_carrier_on(adapter-&gt;netdev);</div><div class='add'>+	} else {</div><div class='add'>+		clear_bit(ENA_FLAG_LINK_UP, &amp;adapter-&gt;flags);</div><div class='add'>+		netif_carrier_off(adapter-&gt;netdev);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_keep_alive_wd(void *adapter_data,</div><div class='add'>+			      struct ena_admin_aenq_entry *aenq_e)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;</div><div class='add'>+	struct ena_admin_aenq_keep_alive_desc *desc;</div><div class='add'>+	u64 rx_drops;</div><div class='add'>+	u64 tx_drops;</div><div class='add'>+</div><div class='add'>+	desc = (struct ena_admin_aenq_keep_alive_desc *)aenq_e;</div><div class='add'>+	adapter-&gt;last_keep_alive_jiffies = jiffies;</div><div class='add'>+</div><div class='add'>+	rx_drops = ((u64)desc-&gt;rx_drops_high &lt;&lt; 32) | desc-&gt;rx_drops_low;</div><div class='add'>+	tx_drops = ((u64)desc-&gt;tx_drops_high &lt;&lt; 32) | desc-&gt;tx_drops_low;</div><div class='add'>+</div><div class='add'>+	u64_stats_update_begin(&amp;adapter-&gt;syncp);</div><div class='add'>+	/* These stats are accumulated by the device, so the counters indicate</div><div class='add'>+	 * all drops since last reset.</div><div class='add'>+	 */</div><div class='add'>+	adapter-&gt;dev_stats.rx_drops = rx_drops;</div><div class='add'>+	adapter-&gt;dev_stats.tx_drops = tx_drops;</div><div class='add'>+	u64_stats_update_end(&amp;adapter-&gt;syncp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_notification(void *adapter_data,</div><div class='add'>+			     struct ena_admin_aenq_entry *aenq_e)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;</div><div class='add'>+	struct ena_admin_ena_hw_hints *hints;</div><div class='add'>+</div><div class='add'>+	WARN(aenq_e-&gt;aenq_common_desc.group != ENA_ADMIN_NOTIFICATION,</div><div class='add'>+	     "Invalid group(%x) expected %x\n",</div><div class='add'>+	     aenq_e-&gt;aenq_common_desc.group,</div><div class='add'>+	     ENA_ADMIN_NOTIFICATION);</div><div class='add'>+</div><div class='add'>+	switch (aenq_e-&gt;aenq_common_desc.syndrome) {</div><div class='add'>+	case ENA_ADMIN_UPDATE_HINTS:</div><div class='add'>+		hints = (struct ena_admin_ena_hw_hints *)</div><div class='add'>+			(&amp;aenq_e-&gt;inline_data_w4);</div><div class='add'>+		ena_update_hints(adapter, hints);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		netif_err(adapter, drv, adapter-&gt;netdev,</div><div class='add'>+			  "Invalid aenq notification link state %d\n",</div><div class='add'>+			  aenq_e-&gt;aenq_common_desc.syndrome);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This handler will called for unknown event group or unimplemented handlers*/</div><div class='add'>+static void unimplemented_aenq_handler(void *data,</div><div class='add'>+				       struct ena_admin_aenq_entry *aenq_e)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = (struct ena_adapter *)data;</div><div class='add'>+</div><div class='add'>+	netif_err(adapter, drv, adapter-&gt;netdev,</div><div class='add'>+		  "Unknown event was received or event with unimplemented handler\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct ena_aenq_handlers aenq_handlers = {</div><div class='add'>+	.handlers = {</div><div class='add'>+		[ENA_ADMIN_LINK_CHANGE] = ena_update_on_link_change,</div><div class='add'>+		[ENA_ADMIN_NOTIFICATION] = ena_notification,</div><div class='add'>+		[ENA_ADMIN_KEEP_ALIVE] = ena_keep_alive_wd,</div><div class='add'>+	},</div><div class='add'>+	.unimplemented_handler = unimplemented_aenq_handler</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+module_init(ena_init);</div><div class='add'>+module_exit(ena_cleanup);</div><div class='head'>diff --git a/drivers/net/ethernet/amazon/ena/ena_netdev.h b/drivers/net/ethernet/amazon/ena/ena_netdev.h<br/>new file mode 100644<br/>index 000000000000..006f9a3acea6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_netdev.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amazon/ena/ena_netdev.h</a></div><div class='hunk'>@@ -0,0 +1,469 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015-2020 Amazon.com, Inc. or its affiliates. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef ENA_H</div><div class='add'>+#define ENA_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/bitops.h&gt;</div><div class='add'>+#include &lt;linux/dim.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/if_vlan.h&gt;</div><div class='add'>+#include &lt;linux/inetdevice.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/skbuff.h&gt;</div><div class='add'>+#include &lt;net/xdp.h&gt;</div><div class='add'>+#include &lt;uapi/linux/bpf.h&gt;</div><div class='add'>+#include &lt;net/devlink.h&gt;</div><div class='add'>+</div><div class='add'>+#include "ena_com.h"</div><div class='add'>+#include "ena_eth_com.h"</div><div class='add'>+</div><div class='add'>+#define DRV_MODULE_GEN_MAJOR	2</div><div class='add'>+#define DRV_MODULE_GEN_MINOR	1</div><div class='add'>+#define DRV_MODULE_GEN_SUBMINOR 0</div><div class='add'>+</div><div class='add'>+#define DRV_MODULE_NAME		"ena"</div><div class='add'>+</div><div class='add'>+#define DEVICE_NAME	"Elastic Network Adapter (ENA)"</div><div class='add'>+</div><div class='add'>+/* 1 for AENQ + ADMIN */</div><div class='add'>+#define ENA_ADMIN_MSIX_VEC		1</div><div class='add'>+#define ENA_MAX_MSIX_VEC(io_queues)	(ENA_ADMIN_MSIX_VEC + (io_queues))</div><div class='add'>+</div><div class='add'>+/* The ENA buffer length fields is 16 bit long. So when PAGE_SIZE == 64kB the</div><div class='add'>+ * driver passes 0.</div><div class='add'>+ * Since the max packet size the ENA handles is ~9kB limit the buffer length to</div><div class='add'>+ * 16kB.</div><div class='add'>+ */</div><div class='add'>+#if PAGE_SIZE &gt; SZ_16K</div><div class='add'>+#define ENA_PAGE_SIZE (_AC(SZ_16K, UL))</div><div class='add'>+#else</div><div class='add'>+#define ENA_PAGE_SIZE PAGE_SIZE</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#define ENA_MIN_MSIX_VEC		2</div><div class='add'>+</div><div class='add'>+#define ENA_REG_BAR			0</div><div class='add'>+#define ENA_MEM_BAR			2</div><div class='add'>+#define ENA_BAR_MASK (BIT(ENA_REG_BAR) | BIT(ENA_MEM_BAR))</div><div class='add'>+</div><div class='add'>+#define ENA_DEFAULT_RING_SIZE	(1024)</div><div class='add'>+#define ENA_MIN_RING_SIZE	(256)</div><div class='add'>+</div><div class='add'>+#define ENA_MIN_RX_BUF_SIZE (2048)</div><div class='add'>+</div><div class='add'>+#define ENA_MIN_NUM_IO_QUEUES	(1)</div><div class='add'>+</div><div class='add'>+#define ENA_TX_WAKEUP_THRESH		(MAX_SKB_FRAGS + 2)</div><div class='add'>+#define ENA_DEFAULT_RX_COPYBREAK	(256 - NET_IP_ALIGN)</div><div class='add'>+</div><div class='add'>+#define ENA_MIN_MTU		128</div><div class='add'>+</div><div class='add'>+#define ENA_NAME_MAX_LEN	20</div><div class='add'>+#define ENA_IRQNAME_SIZE	40</div><div class='add'>+</div><div class='add'>+#define ENA_PKT_MAX_BUFS	19</div><div class='add'>+</div><div class='add'>+#define ENA_RX_RSS_TABLE_LOG_SIZE  7</div><div class='add'>+#define ENA_RX_RSS_TABLE_SIZE	(1 &lt;&lt; ENA_RX_RSS_TABLE_LOG_SIZE)</div><div class='add'>+</div><div class='add'>+/* The number of tx packet completions that will be handled each NAPI poll</div><div class='add'>+ * cycle is ring_size / ENA_TX_POLL_BUDGET_DIVIDER.</div><div class='add'>+ */</div><div class='add'>+#define ENA_TX_POLL_BUDGET_DIVIDER	4</div><div class='add'>+</div><div class='add'>+/* Refill Rx queue when number of required descriptors is above</div><div class='add'>+ * QUEUE_SIZE / ENA_RX_REFILL_THRESH_DIVIDER or ENA_RX_REFILL_THRESH_PACKET</div><div class='add'>+ */</div><div class='add'>+#define ENA_RX_REFILL_THRESH_DIVIDER	8</div><div class='add'>+#define ENA_RX_REFILL_THRESH_PACKET	256</div><div class='add'>+</div><div class='add'>+/* Number of queues to check for missing queues per timer service */</div><div class='add'>+#define ENA_MONITORED_TX_QUEUES	4</div><div class='add'>+/* Max timeout packets before device reset */</div><div class='add'>+#define MAX_NUM_OF_TIMEOUTED_PACKETS 128</div><div class='add'>+</div><div class='add'>+#define ENA_TX_RING_IDX_NEXT(idx, ring_size) (((idx) + 1) &amp; ((ring_size) - 1))</div><div class='add'>+</div><div class='add'>+#define ENA_RX_RING_IDX_NEXT(idx, ring_size) (((idx) + 1) &amp; ((ring_size) - 1))</div><div class='add'>+#define ENA_RX_RING_IDX_ADD(idx, n, ring_size) \</div><div class='add'>+	(((idx) + (n)) &amp; ((ring_size) - 1))</div><div class='add'>+</div><div class='add'>+#define ENA_IO_TXQ_IDX(q)	(2 * (q))</div><div class='add'>+#define ENA_IO_RXQ_IDX(q)	(2 * (q) + 1)</div><div class='add'>+#define ENA_IO_TXQ_IDX_TO_COMBINED_IDX(q)	((q) / 2)</div><div class='add'>+#define ENA_IO_RXQ_IDX_TO_COMBINED_IDX(q)	(((q) - 1) / 2)</div><div class='add'>+</div><div class='add'>+#define ENA_MGMNT_IRQ_IDX		0</div><div class='add'>+#define ENA_IO_IRQ_FIRST_IDX		1</div><div class='add'>+#define ENA_IO_IRQ_IDX(q)		(ENA_IO_IRQ_FIRST_IDX + (q))</div><div class='add'>+</div><div class='add'>+#define ENA_ADMIN_POLL_DELAY_US 100</div><div class='add'>+</div><div class='add'>+/* ENA device should send keep alive msg every 1 sec.</div><div class='add'>+ * We wait for 6 sec just to be on the safe side.</div><div class='add'>+ */</div><div class='add'>+#define ENA_DEVICE_KALIVE_TIMEOUT	(6 * HZ)</div><div class='add'>+#define ENA_MAX_NO_INTERRUPT_ITERATIONS 3</div><div class='add'>+</div><div class='add'>+#define ENA_MMIO_DISABLE_REG_READ	BIT(0)</div><div class='add'>+</div><div class='add'>+struct ena_phc_info;</div><div class='add'>+</div><div class='add'>+struct ena_irq {</div><div class='add'>+	irq_handler_t handler;</div><div class='add'>+	void *data;</div><div class='add'>+	int cpu;</div><div class='add'>+	u32 vector;</div><div class='add'>+	cpumask_t affinity_hint_mask;</div><div class='add'>+	char name[ENA_IRQNAME_SIZE];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_napi {</div><div class='add'>+	u8 first_interrupt ____cacheline_aligned;</div><div class='add'>+	u8 interrupts_masked;</div><div class='add'>+	struct napi_struct napi;</div><div class='add'>+	struct ena_ring *tx_ring;</div><div class='add'>+	struct ena_ring *rx_ring;</div><div class='add'>+	u32 qid;</div><div class='add'>+	struct dim dim;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_tx_buffer {</div><div class='add'>+	union {</div><div class='add'>+		struct sk_buff *skb;</div><div class='add'>+		/* XDP buffer structure which is used for sending packets in</div><div class='add'>+		 * the xdp queues</div><div class='add'>+		 */</div><div class='add'>+		struct xdp_frame *xdpf;</div><div class='add'>+	};</div><div class='add'>+	/* num of ena desc for this specific skb</div><div class='add'>+	 * (includes data desc and metadata desc)</div><div class='add'>+	 */</div><div class='add'>+	u32 tx_descs;</div><div class='add'>+	/* num of buffers used by this skb */</div><div class='add'>+	u32 num_of_bufs;</div><div class='add'>+</div><div class='add'>+	/* Total size of all buffers in bytes */</div><div class='add'>+	u32 total_tx_size;</div><div class='add'>+</div><div class='add'>+	/* Indicate if bufs[0] map the linear data of the skb. */</div><div class='add'>+	u8 map_linear_data;</div><div class='add'>+</div><div class='add'>+	/* Used for detect missing tx packets to limit the number of prints */</div><div class='add'>+	u8 print_once;</div><div class='add'>+	/* Save the last jiffies to detect missing tx packets</div><div class='add'>+	 *</div><div class='add'>+	 * sets to non zero value on ena_start_xmit and set to zero on</div><div class='add'>+	 * napi and timer_Service_routine.</div><div class='add'>+	 *</div><div class='add'>+	 * while this value is not protected by lock,</div><div class='add'>+	 * a given packet is not expected to be handled by ena_start_xmit</div><div class='add'>+	 * and by napi/timer_service at the same time.</div><div class='add'>+	 */</div><div class='add'>+	unsigned long last_jiffies;</div><div class='add'>+	struct ena_com_buf bufs[ENA_PKT_MAX_BUFS];</div><div class='add'>+} ____cacheline_aligned;</div><div class='add'>+</div><div class='add'>+struct ena_rx_buffer {</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	struct page *page;</div><div class='add'>+	dma_addr_t dma_addr;</div><div class='add'>+	u32 page_offset;</div><div class='add'>+	u32 buf_offset;</div><div class='add'>+	struct ena_com_buf ena_buf;</div><div class='add'>+} ____cacheline_aligned;</div><div class='add'>+</div><div class='add'>+struct ena_stats_tx {</div><div class='add'>+	u64 cnt;</div><div class='add'>+	u64 bytes;</div><div class='add'>+	u64 queue_stop;</div><div class='add'>+	u64 prepare_ctx_err;</div><div class='add'>+	u64 queue_wakeup;</div><div class='add'>+	u64 dma_mapping_err;</div><div class='add'>+	u64 linearize;</div><div class='add'>+	u64 linearize_failed;</div><div class='add'>+	u64 napi_comp;</div><div class='add'>+	u64 tx_poll;</div><div class='add'>+	u64 doorbells;</div><div class='add'>+	u64 bad_req_id;</div><div class='add'>+	u64 llq_buffer_copy;</div><div class='add'>+	u64 missed_tx;</div><div class='add'>+	u64 unmask_interrupt;</div><div class='add'>+	u64 last_napi_jiffies;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_stats_rx {</div><div class='add'>+	u64 cnt;</div><div class='add'>+	u64 bytes;</div><div class='add'>+	u64 rx_copybreak_pkt;</div><div class='add'>+	u64 csum_good;</div><div class='add'>+	u64 refil_partial;</div><div class='add'>+	u64 csum_bad;</div><div class='add'>+	u64 page_alloc_fail;</div><div class='add'>+	u64 skb_alloc_fail;</div><div class='add'>+	u64 dma_mapping_err;</div><div class='add'>+	u64 bad_desc_num;</div><div class='add'>+	u64 bad_req_id;</div><div class='add'>+	u64 empty_rx_ring;</div><div class='add'>+	u64 csum_unchecked;</div><div class='add'>+	u64 xdp_aborted;</div><div class='add'>+	u64 xdp_drop;</div><div class='add'>+	u64 xdp_pass;</div><div class='add'>+	u64 xdp_tx;</div><div class='add'>+	u64 xdp_invalid;</div><div class='add'>+	u64 xdp_redirect;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ena_ring {</div><div class='add'>+	/* Holds the empty requests for TX/RX</div><div class='add'>+	 * out of order completions</div><div class='add'>+	 */</div><div class='add'>+	u16 *free_ids;</div><div class='add'>+</div><div class='add'>+	union {</div><div class='add'>+		struct ena_tx_buffer *tx_buffer_info;</div><div class='add'>+		struct ena_rx_buffer *rx_buffer_info;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* cache ptr to avoid using the adapter */</div><div class='add'>+	struct device *dev;</div><div class='add'>+	struct pci_dev *pdev;</div><div class='add'>+	struct napi_struct *napi;</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	struct ena_com_dev *ena_dev;</div><div class='add'>+	struct ena_adapter *adapter;</div><div class='add'>+	struct ena_com_io_cq *ena_com_io_cq;</div><div class='add'>+	struct ena_com_io_sq *ena_com_io_sq;</div><div class='add'>+	struct bpf_prog *xdp_bpf_prog;</div><div class='add'>+	struct xdp_rxq_info xdp_rxq;</div><div class='add'>+	spinlock_t xdp_tx_lock;	/* synchronize XDP TX/Redirect traffic */</div><div class='add'>+	/* Used for rx queues only to point to the xdp tx ring, to</div><div class='add'>+	 * which traffic should be redirected from this rx ring.</div><div class='add'>+	 */</div><div class='add'>+	struct ena_ring *xdp_ring;</div><div class='add'>+</div><div class='add'>+	u16 next_to_use;</div><div class='add'>+	u16 next_to_clean;</div><div class='add'>+	u16 rx_copybreak;</div><div class='add'>+	u16 rx_headroom;</div><div class='add'>+	u16 qid;</div><div class='add'>+	u16 mtu;</div><div class='add'>+	u16 sgl_size;</div><div class='add'>+</div><div class='add'>+	/* The maximum header length the device can handle */</div><div class='add'>+	u8 tx_max_header_size;</div><div class='add'>+</div><div class='add'>+	bool disable_meta_caching;</div><div class='add'>+	u16 no_interrupt_event_cnt;</div><div class='add'>+</div><div class='add'>+	/* cpu and NUMA for TPH */</div><div class='add'>+	int cpu;</div><div class='add'>+	int numa_node;</div><div class='add'>+</div><div class='add'>+	/* number of tx/rx_buffer_info's entries */</div><div class='add'>+	int ring_size;</div><div class='add'>+</div><div class='add'>+	enum ena_admin_placement_policy_type tx_mem_queue_type;</div><div class='add'>+</div><div class='add'>+	struct ena_com_rx_buf_info ena_bufs[ENA_PKT_MAX_BUFS];</div><div class='add'>+	u32  smoothed_interval;</div><div class='add'>+	u32  per_napi_packets;</div><div class='add'>+	u16 non_empty_napi_events;</div><div class='add'>+	struct u64_stats_sync syncp;</div><div class='add'>+	union {</div><div class='add'>+		struct ena_stats_tx tx_stats;</div><div class='add'>+		struct ena_stats_rx rx_stats;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	u8 *push_buf_intermediate_buf;</div><div class='add'>+	int empty_rx_queue;</div><div class='add'>+} ____cacheline_aligned;</div><div class='add'>+</div><div class='add'>+struct ena_stats_dev {</div><div class='add'>+	u64 tx_timeout;</div><div class='add'>+	u64 suspend;</div><div class='add'>+	u64 resume;</div><div class='add'>+	u64 wd_expired;</div><div class='add'>+	u64 interface_up;</div><div class='add'>+	u64 interface_down;</div><div class='add'>+	u64 admin_q_pause;</div><div class='add'>+	u64 rx_drops;</div><div class='add'>+	u64 tx_drops;</div><div class='add'>+	u64 reset_fail;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum ena_flags_t {</div><div class='add'>+	ENA_FLAG_DEVICE_RUNNING,</div><div class='add'>+	ENA_FLAG_DEV_UP,</div><div class='add'>+	ENA_FLAG_LINK_UP,</div><div class='add'>+	ENA_FLAG_MSIX_ENABLED,</div><div class='add'>+	ENA_FLAG_TRIGGER_RESET,</div><div class='add'>+	ENA_FLAG_ONGOING_RESET</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* adapter specific private data structure */</div><div class='add'>+struct ena_adapter {</div><div class='add'>+	struct ena_com_dev *ena_dev;</div><div class='add'>+	/* OS defined structs */</div><div class='add'>+	struct net_device *netdev;</div><div class='add'>+	struct pci_dev *pdev;</div><div class='add'>+</div><div class='add'>+	/* rx packets that shorter that this len will be copied to the skb</div><div class='add'>+	 * header</div><div class='add'>+	 */</div><div class='add'>+	u32 rx_copybreak;</div><div class='add'>+	u32 max_mtu;</div><div class='add'>+</div><div class='add'>+	u32 num_io_queues;</div><div class='add'>+	u32 max_num_io_queues;</div><div class='add'>+</div><div class='add'>+	int msix_vecs;</div><div class='add'>+</div><div class='add'>+	u32 missing_tx_completion_threshold;</div><div class='add'>+</div><div class='add'>+	u32 requested_tx_ring_size;</div><div class='add'>+	u32 requested_rx_ring_size;</div><div class='add'>+</div><div class='add'>+	u32 max_tx_ring_size;</div><div class='add'>+	u32 max_rx_ring_size;</div><div class='add'>+</div><div class='add'>+	u32 msg_enable;</div><div class='add'>+</div><div class='add'>+	/* large_llq_header_enabled is used for two purposes:</div><div class='add'>+	 * 1. Indicates that large LLQ has been requested.</div><div class='add'>+	 * 2. Indicates whether large LLQ is set or not after device</div><div class='add'>+	 *    initialization / configuration.</div><div class='add'>+	 */</div><div class='add'>+	bool large_llq_header_enabled;</div><div class='add'>+	bool large_llq_header_supported;</div><div class='add'>+</div><div class='add'>+	u16 max_tx_sgl_size;</div><div class='add'>+	u16 max_rx_sgl_size;</div><div class='add'>+</div><div class='add'>+	u8 mac_addr[ETH_ALEN];</div><div class='add'>+</div><div class='add'>+	unsigned long keep_alive_timeout;</div><div class='add'>+	unsigned long missing_tx_completion_to;</div><div class='add'>+</div><div class='add'>+	char name[ENA_NAME_MAX_LEN];</div><div class='add'>+</div><div class='add'>+	struct ena_phc_info *phc_info;</div><div class='add'>+</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	/* TX */</div><div class='add'>+	struct ena_ring tx_ring[ENA_MAX_NUM_IO_QUEUES]</div><div class='add'>+		____cacheline_aligned_in_smp;</div><div class='add'>+</div><div class='add'>+	/* RX */</div><div class='add'>+	struct ena_ring rx_ring[ENA_MAX_NUM_IO_QUEUES]</div><div class='add'>+		____cacheline_aligned_in_smp;</div><div class='add'>+</div><div class='add'>+	struct ena_napi ena_napi[ENA_MAX_NUM_IO_QUEUES];</div><div class='add'>+</div><div class='add'>+	struct ena_irq irq_tbl[ENA_MAX_MSIX_VEC(ENA_MAX_NUM_IO_QUEUES)];</div><div class='add'>+</div><div class='add'>+	/* timer service */</div><div class='add'>+	struct work_struct reset_task;</div><div class='add'>+	struct timer_list timer_service;</div><div class='add'>+</div><div class='add'>+	bool wd_state;</div><div class='add'>+	bool dev_up_before_reset;</div><div class='add'>+	bool disable_meta_caching;</div><div class='add'>+	unsigned long last_keep_alive_jiffies;</div><div class='add'>+</div><div class='add'>+	struct u64_stats_sync syncp;</div><div class='add'>+	struct ena_stats_dev dev_stats;</div><div class='add'>+	struct ena_admin_eni_stats eni_stats;</div><div class='add'>+	struct ena_admin_ena_srd_info ena_srd_info;</div><div class='add'>+</div><div class='add'>+	/* last queue index that was checked for uncompleted tx packets */</div><div class='add'>+	u32 last_monitored_tx_qid;</div><div class='add'>+</div><div class='add'>+	enum ena_regs_reset_reason_types reset_reason;</div><div class='add'>+</div><div class='add'>+	struct bpf_prog *xdp_bpf_prog;</div><div class='add'>+	u32 xdp_first_ring;</div><div class='add'>+	u32 xdp_num_queues;</div><div class='add'>+</div><div class='add'>+	struct devlink *devlink;</div><div class='add'>+	struct devlink_port devlink_port;</div><div class='add'>+#ifdef CONFIG_DEBUG_FS</div><div class='add'>+</div><div class='add'>+	struct dentry *debugfs_base;</div><div class='add'>+#endif /* CONFIG_DEBUG_FS */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void ena_set_ethtool_ops(struct net_device *netdev);</div><div class='add'>+</div><div class='add'>+void ena_dump_stats_to_dmesg(struct ena_adapter *adapter);</div><div class='add'>+</div><div class='add'>+void ena_dump_stats_to_buf(struct ena_adapter *adapter, u8 *buf);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+int ena_update_queue_params(struct ena_adapter *adapter,</div><div class='add'>+			    u32 new_tx_size,</div><div class='add'>+			    u32 new_rx_size,</div><div class='add'>+			    u32 new_llq_header_len);</div><div class='add'>+</div><div class='add'>+int ena_update_queue_count(struct ena_adapter *adapter, u32 new_channel_count);</div><div class='add'>+</div><div class='add'>+int ena_set_rx_copybreak(struct ena_adapter *adapter, u32 rx_copybreak);</div><div class='add'>+</div><div class='add'>+int ena_get_sset_count(struct net_device *netdev, int sset);</div><div class='add'>+</div><div class='add'>+static inline void ena_reset_device(struct ena_adapter *adapter,</div><div class='add'>+				    enum ena_regs_reset_reason_types reset_reason)</div><div class='add'>+{</div><div class='add'>+	adapter-&gt;reset_reason = reset_reason;</div><div class='add'>+	/* Make sure reset reason is set before triggering the reset */</div><div class='add'>+	smp_mb__before_atomic();</div><div class='add'>+	set_bit(ENA_FLAG_TRIGGER_RESET, &amp;adapter-&gt;flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_destroy_device(struct ena_adapter *adapter, bool graceful);</div><div class='add'>+int ena_restore_device(struct ena_adapter *adapter);</div><div class='add'>+int handle_invalid_req_id(struct ena_ring *ring, u16 req_id,</div><div class='add'>+			  struct ena_tx_buffer *tx_info, bool is_xdp);</div><div class='add'>+</div><div class='add'>+/* Increase a stat by cnt while holding syncp seqlock on 32bit machines */</div><div class='add'>+static inline void ena_increase_stat(u64 *statp, u64 cnt,</div><div class='add'>+				     struct u64_stats_sync *syncp)</div><div class='add'>+{</div><div class='add'>+	u64_stats_update_begin(syncp);</div><div class='add'>+	(*statp) += cnt;</div><div class='add'>+	u64_stats_update_end(syncp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void ena_ring_tx_doorbell(struct ena_ring *tx_ring)</div><div class='add'>+{</div><div class='add'>+	ena_com_write_sq_doorbell(tx_ring-&gt;ena_com_io_sq);</div><div class='add'>+	ena_increase_stat(&amp;tx_ring-&gt;tx_stats.doorbells, 1, &amp;tx_ring-&gt;syncp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_xmit_common(struct ena_adapter *adapter,</div><div class='add'>+		    struct ena_ring *ring,</div><div class='add'>+		    struct ena_tx_buffer *tx_info,</div><div class='add'>+		    struct ena_com_tx_ctx *ena_tx_ctx,</div><div class='add'>+		    u16 next_to_use,</div><div class='add'>+		    u32 bytes);</div><div class='add'>+void ena_unmap_tx_buff(struct ena_ring *tx_ring,</div><div class='add'>+		       struct ena_tx_buffer *tx_info);</div><div class='add'>+void ena_init_io_rings(struct ena_adapter *adapter,</div><div class='add'>+		       int first_index, int count);</div><div class='add'>+int ena_create_io_tx_queues_in_range(struct ena_adapter *adapter,</div><div class='add'>+				     int first_index, int count);</div><div class='add'>+int ena_setup_tx_resources_in_range(struct ena_adapter *adapter,</div><div class='add'>+				    int first_index, int count);</div><div class='add'>+void ena_free_all_io_tx_resources_in_range(struct ena_adapter *adapter,</div><div class='add'>+					   int first_index, int count);</div><div class='add'>+void ena_free_all_io_tx_resources(struct ena_adapter *adapter);</div><div class='add'>+void ena_down(struct ena_adapter *adapter);</div><div class='add'>+int ena_up(struct ena_adapter *adapter);</div><div class='add'>+void ena_unmask_interrupt(struct ena_ring *tx_ring, struct ena_ring *rx_ring);</div><div class='add'>+void ena_update_ring_numa_node(struct ena_ring *tx_ring,</div><div class='add'>+			       struct ena_ring *rx_ring);</div><div class='add'>+#endif /* !(ENA_H) */</div><div class='head'>diff --git a/drivers/net/ethernet/amazon/ena/ena_pci_id_tbl.h b/drivers/net/ethernet/amazon/ena/ena_pci_id_tbl.h<br/>new file mode 100644<br/>index 000000000000..3ecdf29160ca<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_pci_id_tbl.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amazon/ena/ena_pci_id_tbl.h</a></div><div class='hunk'>@@ -0,0 +1,45 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015-2020 Amazon.com, Inc. or its affiliates. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef ENA_PCI_ID_TBL_H_</div><div class='add'>+#define ENA_PCI_ID_TBL_H_</div><div class='add'>+</div><div class='add'>+#ifndef PCI_VENDOR_ID_AMAZON</div><div class='add'>+#define PCI_VENDOR_ID_AMAZON 0x1d0f</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef PCI_DEV_ID_ENA_PF</div><div class='add'>+#define PCI_DEV_ID_ENA_PF	0x0ec2</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef PCI_DEV_ID_ENA_LLQ_PF</div><div class='add'>+#define PCI_DEV_ID_ENA_LLQ_PF	0x1ec2</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef PCI_DEV_ID_ENA_VF</div><div class='add'>+#define PCI_DEV_ID_ENA_VF	0xec20</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef PCI_DEV_ID_ENA_LLQ_VF</div><div class='add'>+#define PCI_DEV_ID_ENA_LLQ_VF	0xec21</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef PCI_DEV_ID_ENA_RESRV0</div><div class='add'>+#define PCI_DEV_ID_ENA_RESRV0	0x0051</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#define ENA_PCI_ID_TABLE_ENTRY(devid) \</div><div class='add'>+	{PCI_DEVICE(PCI_VENDOR_ID_AMAZON, devid)},</div><div class='add'>+</div><div class='add'>+static const struct pci_device_id ena_pci_tbl[] = {</div><div class='add'>+	ENA_PCI_ID_TABLE_ENTRY(PCI_DEV_ID_ENA_RESRV0)</div><div class='add'>+	ENA_PCI_ID_TABLE_ENTRY(PCI_DEV_ID_ENA_PF)</div><div class='add'>+	ENA_PCI_ID_TABLE_ENTRY(PCI_DEV_ID_ENA_LLQ_PF)</div><div class='add'>+	ENA_PCI_ID_TABLE_ENTRY(PCI_DEV_ID_ENA_VF)</div><div class='add'>+	ENA_PCI_ID_TABLE_ENTRY(PCI_DEV_ID_ENA_LLQ_VF)</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif /* ENA_PCI_ID_TBL_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/amazon/ena/ena_phc.c b/drivers/net/ethernet/amazon/ena/ena_phc.c<br/>new file mode 100644<br/>index 000000000000..7867e893fd15<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_phc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amazon/ena/ena_phc.c</a></div><div class='hunk'>@@ -0,0 +1,233 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015-2022 Amazon.com, Inc. or its affiliates. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include "ena_netdev.h"</div><div class='add'>+#include "ena_phc.h"</div><div class='add'>+#include "ena_devlink.h"</div><div class='add'>+</div><div class='add'>+static int ena_phc_adjtime(struct ptp_clock_info *clock_info, s64 delta)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_phc_adjfine(struct ptp_clock_info *clock_info, long scaled_ppm)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_phc_feature_enable(struct ptp_clock_info *clock_info,</div><div class='add'>+				  struct ptp_clock_request *rq,</div><div class='add'>+				  int on)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_phc_gettimex64(struct ptp_clock_info *clock_info,</div><div class='add'>+			      struct timespec64 *ts,</div><div class='add'>+			      struct ptp_system_timestamp *sts)</div><div class='add'>+{</div><div class='add'>+	struct ena_phc_info *phc_info =</div><div class='add'>+		container_of(clock_info, struct ena_phc_info, clock_info);</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u64 timestamp_nsec;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;phc_info-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	ptp_read_system_prets(sts);</div><div class='add'>+</div><div class='add'>+	rc = ena_com_phc_get_timestamp(phc_info-&gt;adapter-&gt;ena_dev,</div><div class='add'>+				       &amp;timestamp_nsec);</div><div class='add'>+</div><div class='add'>+	ptp_read_system_postts(sts);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;phc_info-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	*ts = ns_to_timespec64(timestamp_nsec);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_phc_settime64(struct ptp_clock_info *clock_info,</div><div class='add'>+			     const struct timespec64 *ts)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct ptp_clock_info ena_ptp_clock_info = {</div><div class='add'>+	.owner		= THIS_MODULE,</div><div class='add'>+	.n_alarm	= 0,</div><div class='add'>+	.n_ext_ts	= 0,</div><div class='add'>+	.n_per_out	= 0,</div><div class='add'>+	.pps		= 0,</div><div class='add'>+	.adjtime	= ena_phc_adjtime,</div><div class='add'>+	.adjfine	= ena_phc_adjfine,</div><div class='add'>+	.gettimex64	= ena_phc_gettimex64,</div><div class='add'>+	.settime64	= ena_phc_settime64,</div><div class='add'>+	.enable		= ena_phc_feature_enable,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Enable/Disable PHC by the kernel, affects on the next init flow */</div><div class='add'>+void ena_phc_enable(struct ena_adapter *adapter, bool enable)</div><div class='add'>+{</div><div class='add'>+	struct ena_phc_info *phc_info = adapter-&gt;phc_info;</div><div class='add'>+</div><div class='add'>+	if (!phc_info) {</div><div class='add'>+		netdev_err(adapter-&gt;netdev, "phc_info is not allocated\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	phc_info-&gt;enabled = enable;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Check if PHC is enabled by the kernel */</div><div class='add'>+bool ena_phc_is_enabled(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct ena_phc_info *phc_info = adapter-&gt;phc_info;</div><div class='add'>+</div><div class='add'>+	return (phc_info &amp;&amp; phc_info-&gt;enabled);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* PHC is activated if ptp clock is registered in the kernel */</div><div class='add'>+bool ena_phc_is_active(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct ena_phc_info *phc_info = adapter-&gt;phc_info;</div><div class='add'>+</div><div class='add'>+	return (phc_info &amp;&amp; phc_info-&gt;clock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_phc_register(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = adapter-&gt;pdev;</div><div class='add'>+	struct ptp_clock_info *clock_info;</div><div class='add'>+	struct ena_phc_info *phc_info;</div><div class='add'>+	int rc = 0;</div><div class='add'>+</div><div class='add'>+	phc_info = adapter-&gt;phc_info;</div><div class='add'>+	clock_info = &amp;phc_info-&gt;clock_info;</div><div class='add'>+</div><div class='add'>+	/* PHC may already be registered in case of a reset */</div><div class='add'>+	if (ena_phc_is_active(adapter))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	phc_info-&gt;adapter = adapter;</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;phc_info-&gt;lock);</div><div class='add'>+</div><div class='add'>+	/* Fill the ptp_clock_info struct and register PTP clock */</div><div class='add'>+	*clock_info = ena_ptp_clock_info;</div><div class='add'>+	snprintf(clock_info-&gt;name,</div><div class='add'>+		 sizeof(clock_info-&gt;name),</div><div class='add'>+		 "ena-ptp-%02x",</div><div class='add'>+		 PCI_SLOT(pdev-&gt;devfn));</div><div class='add'>+</div><div class='add'>+	phc_info-&gt;clock = ptp_clock_register(clock_info, &amp;pdev-&gt;dev);</div><div class='add'>+	if (IS_ERR(phc_info-&gt;clock)) {</div><div class='add'>+		rc = PTR_ERR(phc_info-&gt;clock);</div><div class='add'>+		netdev_err(adapter-&gt;netdev, "Failed registering ptp clock, error: %d\n",</div><div class='add'>+			   rc);</div><div class='add'>+		phc_info-&gt;clock = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_phc_unregister(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct ena_phc_info *phc_info = adapter-&gt;phc_info;</div><div class='add'>+</div><div class='add'>+	/* During reset flow, PHC must stay registered</div><div class='add'>+	 * to keep kernel's PHC index</div><div class='add'>+	 */</div><div class='add'>+	if (ena_phc_is_active(adapter) &amp;&amp;</div><div class='add'>+	    !test_bit(ENA_FLAG_TRIGGER_RESET, &amp;adapter-&gt;flags)) {</div><div class='add'>+		ptp_clock_unregister(phc_info-&gt;clock);</div><div class='add'>+		phc_info-&gt;clock = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_phc_alloc(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	/* Allocate driver specific PHC info */</div><div class='add'>+	adapter-&gt;phc_info = vzalloc(sizeof(*adapter-&gt;phc_info));</div><div class='add'>+	if (unlikely(!adapter-&gt;phc_info)) {</div><div class='add'>+		netdev_err(adapter-&gt;netdev, "Failed to alloc phc_info\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_phc_free(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	if (adapter-&gt;phc_info) {</div><div class='add'>+		vfree(adapter-&gt;phc_info);</div><div class='add'>+		adapter-&gt;phc_info = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_phc_init(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_dev *ena_dev = adapter-&gt;ena_dev;</div><div class='add'>+	struct net_device *netdev = adapter-&gt;netdev;</div><div class='add'>+	int rc = -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	/* Validate PHC feature is supported in the device */</div><div class='add'>+	if (!ena_com_phc_supported(ena_dev)) {</div><div class='add'>+		netdev_dbg(netdev, "PHC feature is not supported by the device\n");</div><div class='add'>+		goto err_ena_com_phc_init;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Validate PHC feature is enabled by the kernel */</div><div class='add'>+	if (!ena_phc_is_enabled(adapter)) {</div><div class='add'>+		netdev_dbg(netdev, "PHC feature is not enabled by the kernel\n");</div><div class='add'>+		goto err_ena_com_phc_init;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Initialize device specific PHC info */</div><div class='add'>+	rc = ena_com_phc_init(ena_dev);</div><div class='add'>+	if (unlikely(rc)) {</div><div class='add'>+		netdev_err(netdev, "Failed to init phc, error: %d\n", rc);</div><div class='add'>+		goto err_ena_com_phc_init;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Configure PHC feature in driver and device */</div><div class='add'>+	rc = ena_com_phc_config(ena_dev);</div><div class='add'>+	if (unlikely(rc)) {</div><div class='add'>+		netdev_err(netdev, "Failed to config phc, error: %d\n", rc);</div><div class='add'>+		goto err_ena_com_phc_config;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Register to PTP class driver */</div><div class='add'>+	rc = ena_phc_register(adapter);</div><div class='add'>+	if (unlikely(rc)) {</div><div class='add'>+		netdev_err(netdev, "Failed to register phc, error: %d\n", rc);</div><div class='add'>+		goto err_ena_com_phc_config;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_ena_com_phc_config:</div><div class='add'>+	ena_com_phc_destroy(ena_dev);</div><div class='add'>+err_ena_com_phc_init:</div><div class='add'>+	ena_phc_enable(adapter, false);</div><div class='add'>+	ena_devlink_disable_phc_param(adapter-&gt;devlink);</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_phc_destroy(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	ena_phc_unregister(adapter);</div><div class='add'>+	ena_com_phc_destroy(adapter-&gt;ena_dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_phc_get_index(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	if (ena_phc_is_active(adapter))</div><div class='add'>+		return ptp_clock_index(adapter-&gt;phc_info-&gt;clock);</div><div class='add'>+</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/amazon/ena/ena_phc.h b/drivers/net/ethernet/amazon/ena/ena_phc.h<br/>new file mode 100644<br/>index 000000000000..7364fe714e44<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_phc.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amazon/ena/ena_phc.h</a></div><div class='hunk'>@@ -0,0 +1,37 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015-2022 Amazon.com, Inc. or its affiliates. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef ENA_PHC_H</div><div class='add'>+#define ENA_PHC_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/ptp_clock_kernel.h&gt;</div><div class='add'>+</div><div class='add'>+struct ena_phc_info {</div><div class='add'>+	/* PTP hardware capabilities */</div><div class='add'>+	struct ptp_clock_info clock_info;</div><div class='add'>+</div><div class='add'>+	/* Registered PTP clock device */</div><div class='add'>+	struct ptp_clock *clock;</div><div class='add'>+</div><div class='add'>+	/* Adapter specific private data structure */</div><div class='add'>+	struct ena_adapter *adapter;</div><div class='add'>+</div><div class='add'>+	/* PHC lock */</div><div class='add'>+	spinlock_t lock;</div><div class='add'>+</div><div class='add'>+	/* Enabled by kernel */</div><div class='add'>+	bool enabled;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void ena_phc_enable(struct ena_adapter *adapter, bool enable);</div><div class='add'>+bool ena_phc_is_enabled(struct ena_adapter *adapter);</div><div class='add'>+bool ena_phc_is_active(struct ena_adapter *adapter);</div><div class='add'>+int ena_phc_get_index(struct ena_adapter *adapter);</div><div class='add'>+int ena_phc_init(struct ena_adapter *adapter);</div><div class='add'>+void ena_phc_destroy(struct ena_adapter *adapter);</div><div class='add'>+int ena_phc_alloc(struct ena_adapter *adapter);</div><div class='add'>+void ena_phc_free(struct ena_adapter *adapter);</div><div class='add'>+</div><div class='add'>+#endif /* ENA_PHC_H */</div><div class='head'>diff --git a/drivers/net/ethernet/amazon/ena/ena_regs_defs.h b/drivers/net/ethernet/amazon/ena/ena_regs_defs.h<br/>new file mode 100644<br/>index 000000000000..51068dc1cc2a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_regs_defs.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amazon/ena/ena_regs_defs.h</a></div><div class='hunk'>@@ -0,0 +1,140 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015-2020 Amazon.com, Inc. or its affiliates. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+#ifndef _ENA_REGS_H_</div><div class='add'>+#define _ENA_REGS_H_</div><div class='add'>+</div><div class='add'>+enum ena_regs_reset_reason_types {</div><div class='add'>+	ENA_REGS_RESET_NORMAL                       = 0,</div><div class='add'>+	ENA_REGS_RESET_KEEP_ALIVE_TO                = 1,</div><div class='add'>+	ENA_REGS_RESET_ADMIN_TO                     = 2,</div><div class='add'>+	ENA_REGS_RESET_MISS_TX_CMPL                 = 3,</div><div class='add'>+	ENA_REGS_RESET_INV_RX_REQ_ID                = 4,</div><div class='add'>+	ENA_REGS_RESET_INV_TX_REQ_ID                = 5,</div><div class='add'>+	ENA_REGS_RESET_TOO_MANY_RX_DESCS            = 6,</div><div class='add'>+	ENA_REGS_RESET_INIT_ERR                     = 7,</div><div class='add'>+	ENA_REGS_RESET_DRIVER_INVALID_STATE         = 8,</div><div class='add'>+	ENA_REGS_RESET_OS_TRIGGER                   = 9,</div><div class='add'>+	ENA_REGS_RESET_OS_NETDEV_WD                 = 10,</div><div class='add'>+	ENA_REGS_RESET_SHUTDOWN                     = 11,</div><div class='add'>+	ENA_REGS_RESET_USER_TRIGGER                 = 12,</div><div class='add'>+	ENA_REGS_RESET_GENERIC                      = 13,</div><div class='add'>+	ENA_REGS_RESET_MISS_INTERRUPT               = 14,</div><div class='add'>+	ENA_REGS_RESET_SUSPECTED_POLL_STARVATION    = 15,</div><div class='add'>+	ENA_REGS_RESET_RX_DESCRIPTOR_MALFORMED	    = 16,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* ena_registers offsets */</div><div class='add'>+</div><div class='add'>+/* 0 base */</div><div class='add'>+#define ENA_REGS_VERSION_OFF                                0x0</div><div class='add'>+#define ENA_REGS_CONTROLLER_VERSION_OFF                     0x4</div><div class='add'>+#define ENA_REGS_CAPS_OFF                                   0x8</div><div class='add'>+#define ENA_REGS_CAPS_EXT_OFF                               0xc</div><div class='add'>+#define ENA_REGS_AQ_BASE_LO_OFF                             0x10</div><div class='add'>+#define ENA_REGS_AQ_BASE_HI_OFF                             0x14</div><div class='add'>+#define ENA_REGS_AQ_CAPS_OFF                                0x18</div><div class='add'>+#define ENA_REGS_ACQ_BASE_LO_OFF                            0x20</div><div class='add'>+#define ENA_REGS_ACQ_BASE_HI_OFF                            0x24</div><div class='add'>+#define ENA_REGS_ACQ_CAPS_OFF                               0x28</div><div class='add'>+#define ENA_REGS_AQ_DB_OFF                                  0x2c</div><div class='add'>+#define ENA_REGS_ACQ_TAIL_OFF                               0x30</div><div class='add'>+#define ENA_REGS_AENQ_CAPS_OFF                              0x34</div><div class='add'>+#define ENA_REGS_AENQ_BASE_LO_OFF                           0x38</div><div class='add'>+#define ENA_REGS_AENQ_BASE_HI_OFF                           0x3c</div><div class='add'>+#define ENA_REGS_AENQ_HEAD_DB_OFF                           0x40</div><div class='add'>+#define ENA_REGS_AENQ_TAIL_OFF                              0x44</div><div class='add'>+#define ENA_REGS_INTR_MASK_OFF                              0x4c</div><div class='add'>+#define ENA_REGS_DEV_CTL_OFF                                0x54</div><div class='add'>+#define ENA_REGS_DEV_STS_OFF                                0x58</div><div class='add'>+#define ENA_REGS_MMIO_REG_READ_OFF                          0x5c</div><div class='add'>+#define ENA_REGS_MMIO_RESP_LO_OFF                           0x60</div><div class='add'>+#define ENA_REGS_MMIO_RESP_HI_OFF                           0x64</div><div class='add'>+#define ENA_REGS_RSS_IND_ENTRY_UPDATE_OFF                   0x68</div><div class='add'>+</div><div class='add'>+/* phc_registers offsets */</div><div class='add'>+</div><div class='add'>+/* 100 base */</div><div class='add'>+#define ENA_REGS_PHC_DB_OFF                                 0x100</div><div class='add'>+</div><div class='add'>+/* version register */</div><div class='add'>+#define ENA_REGS_VERSION_MINOR_VERSION_MASK                 0xff</div><div class='add'>+#define ENA_REGS_VERSION_MAJOR_VERSION_SHIFT                8</div><div class='add'>+#define ENA_REGS_VERSION_MAJOR_VERSION_MASK                 0xff00</div><div class='add'>+</div><div class='add'>+/* controller_version register */</div><div class='add'>+#define ENA_REGS_CONTROLLER_VERSION_SUBMINOR_VERSION_MASK   0xff</div><div class='add'>+#define ENA_REGS_CONTROLLER_VERSION_MINOR_VERSION_SHIFT     8</div><div class='add'>+#define ENA_REGS_CONTROLLER_VERSION_MINOR_VERSION_MASK      0xff00</div><div class='add'>+#define ENA_REGS_CONTROLLER_VERSION_MAJOR_VERSION_SHIFT     16</div><div class='add'>+#define ENA_REGS_CONTROLLER_VERSION_MAJOR_VERSION_MASK      0xff0000</div><div class='add'>+#define ENA_REGS_CONTROLLER_VERSION_IMPL_ID_SHIFT           24</div><div class='add'>+#define ENA_REGS_CONTROLLER_VERSION_IMPL_ID_MASK            0xff000000</div><div class='add'>+</div><div class='add'>+/* caps register */</div><div class='add'>+#define ENA_REGS_CAPS_CONTIGUOUS_QUEUE_REQUIRED_MASK        0x1</div><div class='add'>+#define ENA_REGS_CAPS_RESET_TIMEOUT_SHIFT                   1</div><div class='add'>+#define ENA_REGS_CAPS_RESET_TIMEOUT_MASK                    0x3e</div><div class='add'>+#define ENA_REGS_CAPS_DMA_ADDR_WIDTH_SHIFT                  8</div><div class='add'>+#define ENA_REGS_CAPS_DMA_ADDR_WIDTH_MASK                   0xff00</div><div class='add'>+#define ENA_REGS_CAPS_ADMIN_CMD_TO_SHIFT                    16</div><div class='add'>+#define ENA_REGS_CAPS_ADMIN_CMD_TO_MASK                     0xf0000</div><div class='add'>+</div><div class='add'>+/* aq_caps register */</div><div class='add'>+#define ENA_REGS_AQ_CAPS_AQ_DEPTH_MASK                      0xffff</div><div class='add'>+#define ENA_REGS_AQ_CAPS_AQ_ENTRY_SIZE_SHIFT                16</div><div class='add'>+#define ENA_REGS_AQ_CAPS_AQ_ENTRY_SIZE_MASK                 0xffff0000</div><div class='add'>+</div><div class='add'>+/* acq_caps register */</div><div class='add'>+#define ENA_REGS_ACQ_CAPS_ACQ_DEPTH_MASK                    0xffff</div><div class='add'>+#define ENA_REGS_ACQ_CAPS_ACQ_ENTRY_SIZE_SHIFT              16</div><div class='add'>+#define ENA_REGS_ACQ_CAPS_ACQ_ENTRY_SIZE_MASK               0xffff0000</div><div class='add'>+</div><div class='add'>+/* aenq_caps register */</div><div class='add'>+#define ENA_REGS_AENQ_CAPS_AENQ_DEPTH_MASK                  0xffff</div><div class='add'>+#define ENA_REGS_AENQ_CAPS_AENQ_ENTRY_SIZE_SHIFT            16</div><div class='add'>+#define ENA_REGS_AENQ_CAPS_AENQ_ENTRY_SIZE_MASK             0xffff0000</div><div class='add'>+</div><div class='add'>+/* dev_ctl register */</div><div class='add'>+#define ENA_REGS_DEV_CTL_DEV_RESET_MASK                     0x1</div><div class='add'>+#define ENA_REGS_DEV_CTL_AQ_RESTART_SHIFT                   1</div><div class='add'>+#define ENA_REGS_DEV_CTL_AQ_RESTART_MASK                    0x2</div><div class='add'>+#define ENA_REGS_DEV_CTL_QUIESCENT_SHIFT                    2</div><div class='add'>+#define ENA_REGS_DEV_CTL_QUIESCENT_MASK                     0x4</div><div class='add'>+#define ENA_REGS_DEV_CTL_IO_RESUME_SHIFT                    3</div><div class='add'>+#define ENA_REGS_DEV_CTL_IO_RESUME_MASK                     0x8</div><div class='add'>+#define ENA_REGS_DEV_CTL_RESET_REASON_SHIFT                 28</div><div class='add'>+#define ENA_REGS_DEV_CTL_RESET_REASON_MASK                  0xf0000000</div><div class='add'>+</div><div class='add'>+/* dev_sts register */</div><div class='add'>+#define ENA_REGS_DEV_STS_READY_MASK                         0x1</div><div class='add'>+#define ENA_REGS_DEV_STS_AQ_RESTART_IN_PROGRESS_SHIFT       1</div><div class='add'>+#define ENA_REGS_DEV_STS_AQ_RESTART_IN_PROGRESS_MASK        0x2</div><div class='add'>+#define ENA_REGS_DEV_STS_AQ_RESTART_FINISHED_SHIFT          2</div><div class='add'>+#define ENA_REGS_DEV_STS_AQ_RESTART_FINISHED_MASK           0x4</div><div class='add'>+#define ENA_REGS_DEV_STS_RESET_IN_PROGRESS_SHIFT            3</div><div class='add'>+#define ENA_REGS_DEV_STS_RESET_IN_PROGRESS_MASK             0x8</div><div class='add'>+#define ENA_REGS_DEV_STS_RESET_FINISHED_SHIFT               4</div><div class='add'>+#define ENA_REGS_DEV_STS_RESET_FINISHED_MASK                0x10</div><div class='add'>+#define ENA_REGS_DEV_STS_FATAL_ERROR_SHIFT                  5</div><div class='add'>+#define ENA_REGS_DEV_STS_FATAL_ERROR_MASK                   0x20</div><div class='add'>+#define ENA_REGS_DEV_STS_QUIESCENT_STATE_IN_PROGRESS_SHIFT  6</div><div class='add'>+#define ENA_REGS_DEV_STS_QUIESCENT_STATE_IN_PROGRESS_MASK   0x40</div><div class='add'>+#define ENA_REGS_DEV_STS_QUIESCENT_STATE_ACHIEVED_SHIFT     7</div><div class='add'>+#define ENA_REGS_DEV_STS_QUIESCENT_STATE_ACHIEVED_MASK      0x80</div><div class='add'>+</div><div class='add'>+/* mmio_reg_read register */</div><div class='add'>+#define ENA_REGS_MMIO_REG_READ_REQ_ID_MASK                  0xffff</div><div class='add'>+#define ENA_REGS_MMIO_REG_READ_REG_OFF_SHIFT                16</div><div class='add'>+#define ENA_REGS_MMIO_REG_READ_REG_OFF_MASK                 0xffff0000</div><div class='add'>+</div><div class='add'>+/* rss_ind_entry_update register */</div><div class='add'>+#define ENA_REGS_RSS_IND_ENTRY_UPDATE_INDEX_MASK            0xffff</div><div class='add'>+#define ENA_REGS_RSS_IND_ENTRY_UPDATE_CQ_IDX_SHIFT          16</div><div class='add'>+#define ENA_REGS_RSS_IND_ENTRY_UPDATE_CQ_IDX_MASK           0xffff0000</div><div class='add'>+</div><div class='add'>+/* phc_db_req_id register */</div><div class='add'>+#define ENA_REGS_PHC_DB_REQ_ID_MASK                         0xffff</div><div class='add'>+</div><div class='add'>+#endif /* _ENA_REGS_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/amazon/ena/ena_xdp.c b/drivers/net/ethernet/amazon/ena/ena_xdp.c<br/>new file mode 100644<br/>index 000000000000..5b175e7e92a1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_xdp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amazon/ena/ena_xdp.c</a></div><div class='hunk'>@@ -0,0 +1,469 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015-2021 Amazon.com, Inc. or its affiliates. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "ena_xdp.h"</div><div class='add'>+</div><div class='add'>+static int validate_xdp_req_id(struct ena_ring *tx_ring, u16 req_id)</div><div class='add'>+{</div><div class='add'>+	struct ena_tx_buffer *tx_info;</div><div class='add'>+</div><div class='add'>+	tx_info = &amp;tx_ring-&gt;tx_buffer_info[req_id];</div><div class='add'>+	if (likely(tx_info-&gt;xdpf))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return handle_invalid_req_id(tx_ring, req_id, tx_info, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_xdp_tx_map_frame(struct ena_ring *tx_ring,</div><div class='add'>+				struct ena_tx_buffer *tx_info,</div><div class='add'>+				struct xdp_frame *xdpf,</div><div class='add'>+				struct ena_com_tx_ctx *ena_tx_ctx)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = tx_ring-&gt;adapter;</div><div class='add'>+	struct ena_com_buf *ena_buf;</div><div class='add'>+	int push_len = 0;</div><div class='add'>+	dma_addr_t dma;</div><div class='add'>+	void *data;</div><div class='add'>+	u32 size;</div><div class='add'>+</div><div class='add'>+	tx_info-&gt;xdpf = xdpf;</div><div class='add'>+	data = tx_info-&gt;xdpf-&gt;data;</div><div class='add'>+	size = tx_info-&gt;xdpf-&gt;len;</div><div class='add'>+</div><div class='add'>+	if (tx_ring-&gt;tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) {</div><div class='add'>+		/* Designate part of the packet for LLQ */</div><div class='add'>+		push_len = min_t(u32, size, tx_ring-&gt;tx_max_header_size);</div><div class='add'>+</div><div class='add'>+		ena_tx_ctx-&gt;push_header = data;</div><div class='add'>+</div><div class='add'>+		size -= push_len;</div><div class='add'>+		data += push_len;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ena_tx_ctx-&gt;header_len = push_len;</div><div class='add'>+</div><div class='add'>+	if (size &gt; 0) {</div><div class='add'>+		dma = dma_map_single(tx_ring-&gt;dev,</div><div class='add'>+				     data,</div><div class='add'>+				     size,</div><div class='add'>+				     DMA_TO_DEVICE);</div><div class='add'>+		if (unlikely(dma_mapping_error(tx_ring-&gt;dev, dma)))</div><div class='add'>+			goto error_report_dma_error;</div><div class='add'>+</div><div class='add'>+		tx_info-&gt;map_linear_data = 0;</div><div class='add'>+</div><div class='add'>+		ena_buf = tx_info-&gt;bufs;</div><div class='add'>+		ena_buf-&gt;paddr = dma;</div><div class='add'>+		ena_buf-&gt;len = size;</div><div class='add'>+</div><div class='add'>+		ena_tx_ctx-&gt;ena_bufs = ena_buf;</div><div class='add'>+		ena_tx_ctx-&gt;num_bufs = tx_info-&gt;num_of_bufs = 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+error_report_dma_error:</div><div class='add'>+	ena_increase_stat(&amp;tx_ring-&gt;tx_stats.dma_mapping_err, 1,</div><div class='add'>+			  &amp;tx_ring-&gt;syncp);</div><div class='add'>+	netif_warn(adapter, tx_queued, adapter-&gt;netdev, "Failed to map xdp buff\n");</div><div class='add'>+</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_xdp_xmit_frame(struct ena_ring *tx_ring,</div><div class='add'>+		       struct ena_adapter *adapter,</div><div class='add'>+		       struct xdp_frame *xdpf,</div><div class='add'>+		       int flags)</div><div class='add'>+{</div><div class='add'>+	struct ena_com_tx_ctx ena_tx_ctx = {};</div><div class='add'>+	struct ena_tx_buffer *tx_info;</div><div class='add'>+	u16 next_to_use, req_id;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	next_to_use = tx_ring-&gt;next_to_use;</div><div class='add'>+	req_id = tx_ring-&gt;free_ids[next_to_use];</div><div class='add'>+	tx_info = &amp;tx_ring-&gt;tx_buffer_info[req_id];</div><div class='add'>+	tx_info-&gt;num_of_bufs = 0;</div><div class='add'>+</div><div class='add'>+	rc = ena_xdp_tx_map_frame(tx_ring, tx_info, xdpf, &amp;ena_tx_ctx);</div><div class='add'>+	if (unlikely(rc))</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	ena_tx_ctx.req_id = req_id;</div><div class='add'>+</div><div class='add'>+	rc = ena_xmit_common(adapter,</div><div class='add'>+			     tx_ring,</div><div class='add'>+			     tx_info,</div><div class='add'>+			     &amp;ena_tx_ctx,</div><div class='add'>+			     next_to_use,</div><div class='add'>+			     xdpf-&gt;len);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto error_unmap_dma;</div><div class='add'>+</div><div class='add'>+	/* trigger the dma engine. ena_ring_tx_doorbell()</div><div class='add'>+	 * calls a memory barrier inside it.</div><div class='add'>+	 */</div><div class='add'>+	if (flags &amp; XDP_XMIT_FLUSH)</div><div class='add'>+		ena_ring_tx_doorbell(tx_ring);</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+</div><div class='add'>+error_unmap_dma:</div><div class='add'>+	ena_unmap_tx_buff(tx_ring, tx_info);</div><div class='add'>+err:</div><div class='add'>+	tx_info-&gt;xdpf = NULL;</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_xdp_xmit(struct net_device *dev, int n,</div><div class='add'>+		 struct xdp_frame **frames, u32 flags)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = netdev_priv(dev);</div><div class='add'>+	struct ena_ring *tx_ring;</div><div class='add'>+	int qid, i, nxmit = 0;</div><div class='add'>+</div><div class='add'>+	if (unlikely(flags &amp; ~XDP_XMIT_FLAGS_MASK))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(ENA_FLAG_DEV_UP, &amp;adapter-&gt;flags))</div><div class='add'>+		return -ENETDOWN;</div><div class='add'>+</div><div class='add'>+	/* We assume that all rings have the same XDP program */</div><div class='add'>+	if (!READ_ONCE(adapter-&gt;rx_ring-&gt;xdp_bpf_prog))</div><div class='add'>+		return -ENXIO;</div><div class='add'>+</div><div class='add'>+	qid = smp_processor_id() % adapter-&gt;xdp_num_queues;</div><div class='add'>+	qid += adapter-&gt;xdp_first_ring;</div><div class='add'>+	tx_ring = &amp;adapter-&gt;tx_ring[qid];</div><div class='add'>+</div><div class='add'>+	/* Other CPU ids might try to send thorugh this queue */</div><div class='add'>+	spin_lock(&amp;tx_ring-&gt;xdp_tx_lock);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; n; i++) {</div><div class='add'>+		if (ena_xdp_xmit_frame(tx_ring, adapter, frames[i], 0))</div><div class='add'>+			break;</div><div class='add'>+		nxmit++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Ring doorbell to make device aware of the packets */</div><div class='add'>+	if (flags &amp; XDP_XMIT_FLUSH)</div><div class='add'>+		ena_ring_tx_doorbell(tx_ring);</div><div class='add'>+</div><div class='add'>+	spin_unlock(&amp;tx_ring-&gt;xdp_tx_lock);</div><div class='add'>+</div><div class='add'>+	/* Return number of packets sent */</div><div class='add'>+	return nxmit;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_init_all_xdp_queues(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	adapter-&gt;xdp_first_ring = adapter-&gt;num_io_queues;</div><div class='add'>+	adapter-&gt;xdp_num_queues = adapter-&gt;num_io_queues;</div><div class='add'>+</div><div class='add'>+	ena_init_io_rings(adapter,</div><div class='add'>+			  adapter-&gt;xdp_first_ring,</div><div class='add'>+			  adapter-&gt;xdp_num_queues);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int ena_setup_and_create_all_xdp_queues(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	u32 xdp_first_ring = adapter-&gt;xdp_first_ring;</div><div class='add'>+	u32 xdp_num_queues = adapter-&gt;xdp_num_queues;</div><div class='add'>+	int rc = 0;</div><div class='add'>+</div><div class='add'>+	rc = ena_setup_tx_resources_in_range(adapter, xdp_first_ring, xdp_num_queues);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto setup_err;</div><div class='add'>+</div><div class='add'>+	rc = ena_create_io_tx_queues_in_range(adapter, xdp_first_ring, xdp_num_queues);</div><div class='add'>+	if (rc)</div><div class='add'>+		goto create_err;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+create_err:</div><div class='add'>+	ena_free_all_io_tx_resources_in_range(adapter, xdp_first_ring, xdp_num_queues);</div><div class='add'>+setup_err:</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Provides a way for both kernel and bpf-prog to know</div><div class='add'>+ * more about the RX-queue a given XDP frame arrived on.</div><div class='add'>+ */</div><div class='add'>+int ena_xdp_register_rxq_info(struct ena_ring *rx_ring)</div><div class='add'>+{</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	rc = xdp_rxq_info_reg(&amp;rx_ring-&gt;xdp_rxq, rx_ring-&gt;netdev, rx_ring-&gt;qid, 0);</div><div class='add'>+</div><div class='add'>+	netif_dbg(rx_ring-&gt;adapter, ifup, rx_ring-&gt;netdev, "Registering RX info for queue %d",</div><div class='add'>+		  rx_ring-&gt;qid);</div><div class='add'>+	if (rc) {</div><div class='add'>+		netif_err(rx_ring-&gt;adapter, ifup, rx_ring-&gt;netdev,</div><div class='add'>+			  "Failed to register xdp rx queue info. RX queue num %d rc: %d\n",</div><div class='add'>+			  rx_ring-&gt;qid, rc);</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rc = xdp_rxq_info_reg_mem_model(&amp;rx_ring-&gt;xdp_rxq, MEM_TYPE_PAGE_SHARED, NULL);</div><div class='add'>+</div><div class='add'>+	if (rc) {</div><div class='add'>+		netif_err(rx_ring-&gt;adapter, ifup, rx_ring-&gt;netdev,</div><div class='add'>+			  "Failed to register xdp rx queue info memory model. RX queue num %d rc: %d\n",</div><div class='add'>+			  rx_ring-&gt;qid, rc);</div><div class='add'>+		xdp_rxq_info_unreg(&amp;rx_ring-&gt;xdp_rxq);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_xdp_unregister_rxq_info(struct ena_ring *rx_ring)</div><div class='add'>+{</div><div class='add'>+	netif_dbg(rx_ring-&gt;adapter, ifdown, rx_ring-&gt;netdev,</div><div class='add'>+		  "Unregistering RX info for queue %d",</div><div class='add'>+		  rx_ring-&gt;qid);</div><div class='add'>+	xdp_rxq_info_unreg_mem_model(&amp;rx_ring-&gt;xdp_rxq);</div><div class='add'>+	xdp_rxq_info_unreg(&amp;rx_ring-&gt;xdp_rxq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void ena_xdp_exchange_program_rx_in_range(struct ena_adapter *adapter,</div><div class='add'>+					  struct bpf_prog *prog,</div><div class='add'>+					  int first, int count)</div><div class='add'>+{</div><div class='add'>+	struct bpf_prog *old_bpf_prog;</div><div class='add'>+	struct ena_ring *rx_ring;</div><div class='add'>+	int i = 0;</div><div class='add'>+</div><div class='add'>+	for (i = first; i &lt; count; i++) {</div><div class='add'>+		rx_ring = &amp;adapter-&gt;rx_ring[i];</div><div class='add'>+		old_bpf_prog = xchg(&amp;rx_ring-&gt;xdp_bpf_prog, prog);</div><div class='add'>+</div><div class='add'>+		if (!old_bpf_prog &amp;&amp; prog) {</div><div class='add'>+			rx_ring-&gt;rx_headroom = XDP_PACKET_HEADROOM;</div><div class='add'>+		} else if (old_bpf_prog &amp;&amp; !prog) {</div><div class='add'>+			rx_ring-&gt;rx_headroom = NET_SKB_PAD;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void ena_xdp_exchange_program(struct ena_adapter *adapter,</div><div class='add'>+				     struct bpf_prog *prog)</div><div class='add'>+{</div><div class='add'>+	struct bpf_prog *old_bpf_prog = xchg(&amp;adapter-&gt;xdp_bpf_prog, prog);</div><div class='add'>+</div><div class='add'>+	ena_xdp_exchange_program_rx_in_range(adapter,</div><div class='add'>+					     prog,</div><div class='add'>+					     0,</div><div class='add'>+					     adapter-&gt;num_io_queues);</div><div class='add'>+</div><div class='add'>+	if (old_bpf_prog)</div><div class='add'>+		bpf_prog_put(old_bpf_prog);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_destroy_and_free_all_xdp_queues(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	bool was_up;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	was_up = test_bit(ENA_FLAG_DEV_UP, &amp;adapter-&gt;flags);</div><div class='add'>+</div><div class='add'>+	if (was_up)</div><div class='add'>+		ena_down(adapter);</div><div class='add'>+</div><div class='add'>+	adapter-&gt;xdp_first_ring = 0;</div><div class='add'>+	adapter-&gt;xdp_num_queues = 0;</div><div class='add'>+	ena_xdp_exchange_program(adapter, NULL);</div><div class='add'>+	if (was_up) {</div><div class='add'>+		rc = ena_up(adapter);</div><div class='add'>+		if (rc)</div><div class='add'>+			return rc;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_xdp_set(struct net_device *netdev, struct netdev_bpf *bpf)</div><div class='add'>+{</div><div class='add'>+	struct ena_adapter *adapter = netdev_priv(netdev);</div><div class='add'>+	struct bpf_prog *prog = bpf-&gt;prog;</div><div class='add'>+	struct bpf_prog *old_bpf_prog;</div><div class='add'>+	int rc, prev_mtu;</div><div class='add'>+	bool is_up;</div><div class='add'>+</div><div class='add'>+	is_up = test_bit(ENA_FLAG_DEV_UP, &amp;adapter-&gt;flags);</div><div class='add'>+	rc = ena_xdp_allowed(adapter);</div><div class='add'>+	if (rc == ENA_XDP_ALLOWED) {</div><div class='add'>+		old_bpf_prog = adapter-&gt;xdp_bpf_prog;</div><div class='add'>+		if (prog) {</div><div class='add'>+			if (!is_up) {</div><div class='add'>+				ena_init_all_xdp_queues(adapter);</div><div class='add'>+			} else if (!old_bpf_prog) {</div><div class='add'>+				ena_down(adapter);</div><div class='add'>+				ena_init_all_xdp_queues(adapter);</div><div class='add'>+			}</div><div class='add'>+			ena_xdp_exchange_program(adapter, prog);</div><div class='add'>+</div><div class='add'>+			netif_dbg(adapter, drv, adapter-&gt;netdev, "Set a new XDP program\n");</div><div class='add'>+</div><div class='add'>+			if (is_up &amp;&amp; !old_bpf_prog) {</div><div class='add'>+				rc = ena_up(adapter);</div><div class='add'>+				if (rc)</div><div class='add'>+					return rc;</div><div class='add'>+			}</div><div class='add'>+			xdp_features_set_redirect_target(netdev, false);</div><div class='add'>+		} else if (old_bpf_prog) {</div><div class='add'>+			xdp_features_clear_redirect_target(netdev);</div><div class='add'>+			netif_dbg(adapter, drv, adapter-&gt;netdev, "Removing XDP program\n");</div><div class='add'>+</div><div class='add'>+			rc = ena_destroy_and_free_all_xdp_queues(adapter);</div><div class='add'>+			if (rc)</div><div class='add'>+				return rc;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		prev_mtu = netdev-&gt;max_mtu;</div><div class='add'>+		netdev-&gt;max_mtu = prog ? ENA_XDP_MAX_MTU : adapter-&gt;max_mtu;</div><div class='add'>+</div><div class='add'>+		if (!old_bpf_prog)</div><div class='add'>+			netif_info(adapter, drv, adapter-&gt;netdev,</div><div class='add'>+				   "XDP program is set, changing the max_mtu from %d to %d",</div><div class='add'>+				   prev_mtu, netdev-&gt;max_mtu);</div><div class='add'>+</div><div class='add'>+	} else if (rc == ENA_XDP_CURRENT_MTU_TOO_LARGE) {</div><div class='add'>+		netif_err(adapter, drv, adapter-&gt;netdev,</div><div class='add'>+			  "Failed to set xdp program, the current MTU (%d) is larger than the maximum allowed MTU (%lu) while xdp is on",</div><div class='add'>+			  netdev-&gt;mtu, ENA_XDP_MAX_MTU);</div><div class='add'>+		NL_SET_ERR_MSG_MOD(bpf-&gt;extack,</div><div class='add'>+				   "Failed to set xdp program, the current MTU is larger than the maximum allowed MTU. Check the dmesg for more info");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	} else if (rc == ENA_XDP_NO_ENOUGH_QUEUES) {</div><div class='add'>+		netif_err(adapter, drv, adapter-&gt;netdev,</div><div class='add'>+			  "Failed to set xdp program, the Rx/Tx channel count should be at most half of the maximum allowed channel count. The current queue count (%d), the maximal queue count (%d)\n",</div><div class='add'>+			  adapter-&gt;num_io_queues, adapter-&gt;max_num_io_queues);</div><div class='add'>+		NL_SET_ERR_MSG_MOD(bpf-&gt;extack,</div><div class='add'>+				   "Failed to set xdp program, there is no enough space for allocating XDP queues, Check the dmesg for more info");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This is the main xdp callback, it's used by the kernel to set/unset the xdp</div><div class='add'>+ * program as well as to query the current xdp program id.</div><div class='add'>+ */</div><div class='add'>+int ena_xdp(struct net_device *netdev, struct netdev_bpf *bpf)</div><div class='add'>+{</div><div class='add'>+	switch (bpf-&gt;command) {</div><div class='add'>+	case XDP_SETUP_PROG:</div><div class='add'>+		return ena_xdp_set(netdev, bpf);</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int ena_clean_xdp_irq(struct ena_ring *tx_ring, u32 budget)</div><div class='add'>+{</div><div class='add'>+	u32 total_done = 0;</div><div class='add'>+	u16 next_to_clean;</div><div class='add'>+	int tx_pkts = 0;</div><div class='add'>+	u16 req_id;</div><div class='add'>+	int rc;</div><div class='add'>+</div><div class='add'>+	if (unlikely(!tx_ring))</div><div class='add'>+		return 0;</div><div class='add'>+	next_to_clean = tx_ring-&gt;next_to_clean;</div><div class='add'>+</div><div class='add'>+	while (tx_pkts &lt; budget) {</div><div class='add'>+		struct ena_tx_buffer *tx_info;</div><div class='add'>+		struct xdp_frame *xdpf;</div><div class='add'>+</div><div class='add'>+		rc = ena_com_tx_comp_req_id_get(tx_ring-&gt;ena_com_io_cq,</div><div class='add'>+						&amp;req_id);</div><div class='add'>+		if (rc) {</div><div class='add'>+			if (unlikely(rc == -EINVAL))</div><div class='add'>+				handle_invalid_req_id(tx_ring, req_id, NULL, true);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* validate that the request id points to a valid xdp_frame */</div><div class='add'>+		rc = validate_xdp_req_id(tx_ring, req_id);</div><div class='add'>+		if (rc)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		tx_info = &amp;tx_ring-&gt;tx_buffer_info[req_id];</div><div class='add'>+</div><div class='add'>+		tx_info-&gt;last_jiffies = 0;</div><div class='add'>+</div><div class='add'>+		xdpf = tx_info-&gt;xdpf;</div><div class='add'>+		tx_info-&gt;xdpf = NULL;</div><div class='add'>+		ena_unmap_tx_buff(tx_ring, tx_info);</div><div class='add'>+		xdp_return_frame(xdpf);</div><div class='add'>+</div><div class='add'>+		tx_pkts++;</div><div class='add'>+		total_done += tx_info-&gt;tx_descs;</div><div class='add'>+		tx_ring-&gt;free_ids[next_to_clean] = req_id;</div><div class='add'>+		next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean,</div><div class='add'>+						     tx_ring-&gt;ring_size);</div><div class='add'>+</div><div class='add'>+		netif_dbg(tx_ring-&gt;adapter, tx_done, tx_ring-&gt;netdev,</div><div class='add'>+			  "tx_poll: q %d pkt #%d req_id %d\n", tx_ring-&gt;qid, tx_pkts, req_id);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	tx_ring-&gt;next_to_clean = next_to_clean;</div><div class='add'>+	ena_com_comp_ack(tx_ring-&gt;ena_com_io_sq, total_done);</div><div class='add'>+</div><div class='add'>+	netif_dbg(tx_ring-&gt;adapter, tx_done, tx_ring-&gt;netdev,</div><div class='add'>+		  "tx_poll: q %d done. total pkts: %d\n",</div><div class='add'>+		  tx_ring-&gt;qid, tx_pkts);</div><div class='add'>+</div><div class='add'>+	return tx_pkts;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* This is the XDP napi callback. XDP queues use a separate napi callback</div><div class='add'>+ * than Rx/Tx queues.</div><div class='add'>+ */</div><div class='add'>+int ena_xdp_io_poll(struct napi_struct *napi, int budget)</div><div class='add'>+{</div><div class='add'>+	struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi);</div><div class='add'>+	struct ena_ring *tx_ring;</div><div class='add'>+	u32 work_done;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	tx_ring = ena_napi-&gt;tx_ring;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(ENA_FLAG_DEV_UP, &amp;tx_ring-&gt;adapter-&gt;flags) ||</div><div class='add'>+	    test_bit(ENA_FLAG_TRIGGER_RESET, &amp;tx_ring-&gt;adapter-&gt;flags)) {</div><div class='add'>+		napi_complete_done(napi, 0);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	work_done = ena_clean_xdp_irq(tx_ring, budget);</div><div class='add'>+</div><div class='add'>+	/* If the device is about to reset or down, avoid unmask</div><div class='add'>+	 * the interrupt and return 0 so NAPI won't reschedule</div><div class='add'>+	 */</div><div class='add'>+	if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &amp;tx_ring-&gt;adapter-&gt;flags))) {</div><div class='add'>+		napi_complete_done(napi, 0);</div><div class='add'>+		ret = 0;</div><div class='add'>+	} else if (budget &gt; work_done) {</div><div class='add'>+		ena_increase_stat(&amp;tx_ring-&gt;tx_stats.napi_comp, 1,</div><div class='add'>+				  &amp;tx_ring-&gt;syncp);</div><div class='add'>+		if (napi_complete_done(napi, work_done))</div><div class='add'>+			ena_unmask_interrupt(tx_ring, NULL);</div><div class='add'>+</div><div class='add'>+		ena_update_ring_numa_node(tx_ring, NULL);</div><div class='add'>+		ret = work_done;</div><div class='add'>+	} else {</div><div class='add'>+		ret = budget;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	u64_stats_update_begin(&amp;tx_ring-&gt;syncp);</div><div class='add'>+	tx_ring-&gt;tx_stats.tx_poll++;</div><div class='add'>+	u64_stats_update_end(&amp;tx_ring-&gt;syncp);</div><div class='add'>+	tx_ring-&gt;tx_stats.last_napi_jiffies = jiffies;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/amazon/ena/ena_xdp.h b/drivers/net/ethernet/amazon/ena/ena_xdp.h<br/>new file mode 100644<br/>index 000000000000..cfd82728486a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amazon/ena/ena_xdp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amazon/ena/ena_xdp.h</a></div><div class='hunk'>@@ -0,0 +1,151 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */</div><div class='add'>+/*</div><div class='add'>+ * Copyright 2015-2021 Amazon.com, Inc. or its affiliates. All rights reserved.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef ENA_XDP_H</div><div class='add'>+#define ENA_XDP_H</div><div class='add'>+</div><div class='add'>+#include "ena_netdev.h"</div><div class='add'>+#include &lt;linux/bpf_trace.h&gt;</div><div class='add'>+</div><div class='add'>+/* The max MTU size is configured to be the ethernet frame size without</div><div class='add'>+ * the overhead of the ethernet header, which can have a VLAN header, and</div><div class='add'>+ * a frame check sequence (FCS).</div><div class='add'>+ * The buffer size we share with the device is defined to be ENA_PAGE_SIZE</div><div class='add'>+ */</div><div class='add'>+#define ENA_XDP_MAX_MTU (ENA_PAGE_SIZE - ETH_HLEN - ETH_FCS_LEN -	\</div><div class='add'>+			 VLAN_HLEN - XDP_PACKET_HEADROOM -		\</div><div class='add'>+			 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)))</div><div class='add'>+</div><div class='add'>+#define ENA_IS_XDP_INDEX(adapter, index) (((index) &gt;= (adapter)-&gt;xdp_first_ring) &amp;&amp; \</div><div class='add'>+	((index) &lt; (adapter)-&gt;xdp_first_ring + (adapter)-&gt;xdp_num_queues))</div><div class='add'>+</div><div class='add'>+enum ENA_XDP_ACTIONS {</div><div class='add'>+	ENA_XDP_PASS		= 0,</div><div class='add'>+	ENA_XDP_TX		= BIT(0),</div><div class='add'>+	ENA_XDP_REDIRECT	= BIT(1),</div><div class='add'>+	ENA_XDP_DROP		= BIT(2)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ENA_XDP_FORWARDED (ENA_XDP_TX | ENA_XDP_REDIRECT)</div><div class='add'>+</div><div class='add'>+int ena_setup_and_create_all_xdp_queues(struct ena_adapter *adapter);</div><div class='add'>+void ena_xdp_exchange_program_rx_in_range(struct ena_adapter *adapter,</div><div class='add'>+					  struct bpf_prog *prog,</div><div class='add'>+					  int first, int count);</div><div class='add'>+int ena_xdp_io_poll(struct napi_struct *napi, int budget);</div><div class='add'>+int ena_xdp_xmit_frame(struct ena_ring *tx_ring,</div><div class='add'>+		       struct ena_adapter *adapter,</div><div class='add'>+		       struct xdp_frame *xdpf,</div><div class='add'>+		       int flags);</div><div class='add'>+int ena_xdp_xmit(struct net_device *dev, int n,</div><div class='add'>+		 struct xdp_frame **frames, u32 flags);</div><div class='add'>+int ena_xdp(struct net_device *netdev, struct netdev_bpf *bpf);</div><div class='add'>+int ena_xdp_register_rxq_info(struct ena_ring *rx_ring);</div><div class='add'>+void ena_xdp_unregister_rxq_info(struct ena_ring *rx_ring);</div><div class='add'>+</div><div class='add'>+enum ena_xdp_errors_t {</div><div class='add'>+	ENA_XDP_ALLOWED = 0,</div><div class='add'>+	ENA_XDP_CURRENT_MTU_TOO_LARGE,</div><div class='add'>+	ENA_XDP_NO_ENOUGH_QUEUES,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline bool ena_xdp_present(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	return !!adapter-&gt;xdp_bpf_prog;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool ena_xdp_present_ring(struct ena_ring *ring)</div><div class='add'>+{</div><div class='add'>+	return !!ring-&gt;xdp_bpf_prog;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool ena_xdp_legal_queue_count(struct ena_adapter *adapter,</div><div class='add'>+					     u32 queues)</div><div class='add'>+{</div><div class='add'>+	return 2 * queues &lt;= adapter-&gt;max_num_io_queues;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline enum ena_xdp_errors_t ena_xdp_allowed(struct ena_adapter *adapter)</div><div class='add'>+{</div><div class='add'>+	enum ena_xdp_errors_t rc = ENA_XDP_ALLOWED;</div><div class='add'>+</div><div class='add'>+	if (adapter-&gt;netdev-&gt;mtu &gt; ENA_XDP_MAX_MTU)</div><div class='add'>+		rc = ENA_XDP_CURRENT_MTU_TOO_LARGE;</div><div class='add'>+	else if (!ena_xdp_legal_queue_count(adapter, adapter-&gt;num_io_queues))</div><div class='add'>+		rc = ENA_XDP_NO_ENOUGH_QUEUES;</div><div class='add'>+</div><div class='add'>+	return rc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int ena_xdp_execute(struct ena_ring *rx_ring, struct xdp_buff *xdp)</div><div class='add'>+{</div><div class='add'>+	u32 verdict = ENA_XDP_PASS;</div><div class='add'>+	struct bpf_prog *xdp_prog;</div><div class='add'>+	struct ena_ring *xdp_ring;</div><div class='add'>+	struct xdp_frame *xdpf;</div><div class='add'>+	u64 *xdp_stat;</div><div class='add'>+</div><div class='add'>+	xdp_prog = READ_ONCE(rx_ring-&gt;xdp_bpf_prog);</div><div class='add'>+</div><div class='add'>+	verdict = bpf_prog_run_xdp(xdp_prog, xdp);</div><div class='add'>+</div><div class='add'>+	switch (verdict) {</div><div class='add'>+	case XDP_TX:</div><div class='add'>+		xdpf = xdp_convert_buff_to_frame(xdp);</div><div class='add'>+		if (unlikely(!xdpf)) {</div><div class='add'>+			trace_xdp_exception(rx_ring-&gt;netdev, xdp_prog, verdict);</div><div class='add'>+			xdp_stat = &amp;rx_ring-&gt;rx_stats.xdp_aborted;</div><div class='add'>+			verdict = ENA_XDP_DROP;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Find xmit queue */</div><div class='add'>+		xdp_ring = rx_ring-&gt;xdp_ring;</div><div class='add'>+</div><div class='add'>+		/* The XDP queues are shared between XDP_TX and XDP_REDIRECT */</div><div class='add'>+		spin_lock(&amp;xdp_ring-&gt;xdp_tx_lock);</div><div class='add'>+</div><div class='add'>+		if (ena_xdp_xmit_frame(xdp_ring, rx_ring-&gt;adapter, xdpf,</div><div class='add'>+				       XDP_XMIT_FLUSH))</div><div class='add'>+			xdp_return_frame(xdpf);</div><div class='add'>+</div><div class='add'>+		spin_unlock(&amp;xdp_ring-&gt;xdp_tx_lock);</div><div class='add'>+		xdp_stat = &amp;rx_ring-&gt;rx_stats.xdp_tx;</div><div class='add'>+		verdict = ENA_XDP_TX;</div><div class='add'>+		break;</div><div class='add'>+	case XDP_REDIRECT:</div><div class='add'>+		if (likely(!xdp_do_redirect(rx_ring-&gt;netdev, xdp, xdp_prog))) {</div><div class='add'>+			xdp_stat = &amp;rx_ring-&gt;rx_stats.xdp_redirect;</div><div class='add'>+			verdict = ENA_XDP_REDIRECT;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		trace_xdp_exception(rx_ring-&gt;netdev, xdp_prog, verdict);</div><div class='add'>+		xdp_stat = &amp;rx_ring-&gt;rx_stats.xdp_aborted;</div><div class='add'>+		verdict = ENA_XDP_DROP;</div><div class='add'>+		break;</div><div class='add'>+	case XDP_ABORTED:</div><div class='add'>+		trace_xdp_exception(rx_ring-&gt;netdev, xdp_prog, verdict);</div><div class='add'>+		xdp_stat = &amp;rx_ring-&gt;rx_stats.xdp_aborted;</div><div class='add'>+		verdict = ENA_XDP_DROP;</div><div class='add'>+		break;</div><div class='add'>+	case XDP_DROP:</div><div class='add'>+		xdp_stat = &amp;rx_ring-&gt;rx_stats.xdp_drop;</div><div class='add'>+		verdict = ENA_XDP_DROP;</div><div class='add'>+		break;</div><div class='add'>+	case XDP_PASS:</div><div class='add'>+		xdp_stat = &amp;rx_ring-&gt;rx_stats.xdp_pass;</div><div class='add'>+		verdict = ENA_XDP_PASS;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		bpf_warn_invalid_xdp_action(rx_ring-&gt;netdev, xdp_prog, verdict);</div><div class='add'>+		xdp_stat = &amp;rx_ring-&gt;rx_stats.xdp_invalid;</div><div class='add'>+		verdict = ENA_XDP_DROP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ena_increase_stat(xdp_stat, 1, &amp;rx_ring-&gt;syncp);</div><div class='add'>+</div><div class='add'>+	return verdict;</div><div class='add'>+}</div><div class='add'>+#endif /* ENA_XDP_H */</div><div class='head'>diff --git a/drivers/net/ethernet/amd/7990.c b/drivers/net/ethernet/amd/7990.c<br/>index 98a10d555b79..27792a52b6cf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/7990.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/7990.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/7990.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/7990.c</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='ctx'>  * 7990.c -- LANCE ethernet IC generic routines.</div><div class='ctx'>  * This is an attempt to separate out the bits of various ethernet</div><div class='hunk'>@@ -27,6 +28,7 @@</div><div class='ctx'> #include &lt;linux/route.h&gt;</div><div class='ctx'> #include &lt;linux/string.h&gt;</div><div class='ctx'> #include &lt;linux/skbuff.h&gt;</div><div class='add'>+#include &lt;linux/pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/irq.h&gt;</div><div class='ctx'> /* Used for the temporal inet entries and routing */</div><div class='ctx'> #include &lt;linux/socket.h&gt;</div><div class='hunk'>@@ -34,7 +36,6 @@</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/dma.h&gt;</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='ctx'> #ifdef CONFIG_HP300</div><div class='ctx'> #include &lt;asm/blinken.h&gt;</div><div class='ctx'> #endif</div><div class='hunk'>@@ -45,14 +46,14 @@</div><div class='ctx'> #define WRITERDP(lp, x)	out_be16(lp-&gt;base + LANCE_RDP, (x))</div><div class='ctx'> #define READRDP(lp)	in_be16(lp-&gt;base + LANCE_RDP)</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_HPLANCE) || defined(CONFIG_HPLANCE_MODULE)</div><div class='add'>+#if IS_ENABLED(CONFIG_HPLANCE)</div><div class='ctx'> #include "hplance.h"</div><div class='ctx'> </div><div class='ctx'> #undef WRITERAP</div><div class='ctx'> #undef WRITERDP</div><div class='ctx'> #undef READRDP</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_MVME147_NET) || defined(CONFIG_MVME147_NET_MODULE)</div><div class='add'>+#if IS_ENABLED(CONFIG_MVME147_NET)</div><div class='ctx'> </div><div class='ctx'> /* Lossage Factor Nine, Mr Sulu. */</div><div class='ctx'> #define WRITERAP(lp, x)	(lp-&gt;writerap(lp, x))</div><div class='hunk'>@@ -86,7 +87,7 @@ static inline __u16 READRDP(struct lance_private *lp)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #endif</div><div class='del'>-#endif /* CONFIG_HPLANCE || CONFIG_HPLANCE_MODULE */</div><div class='add'>+#endif /* IS_ENABLED(CONFIG_HPLANCE) */</div><div class='ctx'> </div><div class='ctx'> /* debugging output macros, various flavours */</div><div class='ctx'> /* #define TEST_HITS */</div><div class='hunk'>@@ -260,7 +261,7 @@ static int lance_reset(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	load_csrs(lp);</div><div class='ctx'> 	lance_init_ring(dev);</div><div class='del'>-	dev-&gt;trans_start = jiffies; /* prevent tx timeout */</div><div class='add'>+	netif_trans_update(dev); /* prevent tx timeout */</div><div class='ctx'> 	status = init_restart_lance(lp);</div><div class='ctx'> #ifdef DEBUG_DRIVER</div><div class='ctx'> 	printk("Lance restart=%d\n", status);</div><div class='hunk'>@@ -526,16 +527,16 @@ int lance_close(struct net_device *dev)</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(lance_close);</div><div class='ctx'> </div><div class='del'>-void lance_tx_timeout(struct net_device *dev)</div><div class='add'>+void lance_tx_timeout(struct net_device *dev, unsigned int txqueue)</div><div class='ctx'> {</div><div class='ctx'> 	printk("lance_tx_timeout\n");</div><div class='ctx'> 	lance_reset(dev);</div><div class='del'>-	dev-&gt;trans_start = jiffies; /* prevent tx timeout */</div><div class='add'>+	netif_trans_update(dev); /* prevent tx timeout */</div><div class='ctx'> 	netif_wake_queue(dev);</div><div class='ctx'> }</div><div class='ctx'> EXPORT_SYMBOL_GPL(lance_tx_timeout);</div><div class='ctx'> </div><div class='del'>-int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='add'>+netdev_tx_t lance_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct lance_private *lp = netdev_priv(dev);</div><div class='ctx'> 	volatile struct lance_init_block *ib = lp-&gt;init_block;</div><div class='hunk'>@@ -543,11 +544,13 @@ int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	static int outs;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	if (!TX_BUFFS_AVAIL)</div><div class='del'>-		return NETDEV_TX_LOCKED;</div><div class='del'>-</div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='ctx'> </div><div class='add'>+	if (!TX_BUFFS_AVAIL) {</div><div class='add'>+		dev_consume_skb_any(skb);</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	skblen = skb-&gt;len;</div><div class='ctx'> </div><div class='ctx'> #ifdef DEBUG_DRIVER</div><div class='hunk'>@@ -661,6 +664,8 @@ void lance_poll(struct net_device *dev)</div><div class='ctx'> 	spin_unlock(&amp;lp-&gt;devlock);</div><div class='ctx'> 	lance_interrupt(dev-&gt;irq, dev);</div><div class='ctx'> }</div><div class='add'>+EXPORT_SYMBOL_GPL(lance_poll);</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+MODULE_DESCRIPTION("LANCE Ethernet IC generic routines");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/amd/7990.h b/drivers/net/ethernet/amd/7990.h<br/>index e9e0be313804..e53551daeea1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/7990.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/7990.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/7990.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/7990.h</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='ctx'> /*</div><div class='ctx'>  * 7990.h -- LANCE ethernet IC generic routines.</div><div class='ctx'>  * This is an attempt to separate out the bits of various ethernet</div><div class='hunk'>@@ -240,9 +241,9 @@ struct lance_private {</div><div class='ctx'> /* Now the prototypes we export */</div><div class='ctx'> int lance_open(struct net_device *dev);</div><div class='ctx'> int lance_close(struct net_device *dev);</div><div class='del'>-int lance_start_xmit(struct sk_buff *skb, struct net_device *dev);</div><div class='add'>+netdev_tx_t lance_start_xmit(struct sk_buff *skb, struct net_device *dev);</div><div class='ctx'> void lance_set_multicast(struct net_device *dev);</div><div class='del'>-void lance_tx_timeout(struct net_device *dev);</div><div class='add'>+void lance_tx_timeout(struct net_device *dev, unsigned int txqueue);</div><div class='ctx'> #ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='ctx'> void lance_poll(struct net_device *dev);</div><div class='ctx'> #endif</div><div class='head'>diff --git a/drivers/net/ethernet/amd/Kconfig b/drivers/net/ethernet/amd/Kconfig<br/>index afc62ea804fc..d54dca3074eb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/Kconfig?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/Kconfig</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> #</div><div class='ctx'> # AMD network device configuration</div><div class='ctx'> #</div><div class='hunk'>@@ -7,13 +8,13 @@ config NET_VENDOR_AMD</div><div class='ctx'> 	default y</div><div class='ctx'> 	depends on DIO || MACH_DECSTATION || MVME147 || ATARI || SUN3 || \</div><div class='ctx'> 		   SUN3X || SBUS || PCI || ZORRO || (ISA &amp;&amp; ISA_DMA_API) || \</div><div class='del'>-		   (ARM &amp;&amp; ARCH_EBSA110) || ISA || EISA || PCMCIA || ARM64</div><div class='del'>-	---help---</div><div class='add'>+		   ISA || EISA || PCMCIA || ARM64</div><div class='add'>+	help</div><div class='ctx'> 	  If you have a network (Ethernet) chipset belonging to this class,</div><div class='ctx'> 	  say Y.</div><div class='ctx'> </div><div class='ctx'> 	  Note that the answer to this question does not directly affect</div><div class='del'>-	  the kernel: saying N will just case the configurator to skip all</div><div class='add'>+	  the kernel: saying N will just cause the configurator to skip all</div><div class='ctx'> 	  the questions regarding AMD chipsets. If you say Y, you will be asked</div><div class='ctx'> 	  for your specific chipset/driver in the following questions.</div><div class='ctx'> </div><div class='hunk'>@@ -23,7 +24,7 @@ config A2065</div><div class='ctx'> 	tristate "A2065 support"</div><div class='ctx'> 	depends on ZORRO</div><div class='ctx'> 	select CRC32</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  If you have a Commodore A2065 Ethernet adapter, say Y. Otherwise,</div><div class='ctx'> 	  say N.</div><div class='ctx'> </div><div class='hunk'>@@ -35,7 +36,7 @@ config AMD8111_ETH</div><div class='ctx'> 	depends on PCI</div><div class='ctx'> 	select CRC32</div><div class='ctx'> 	select MII</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  If you have an AMD 8111-based PCI LANCE ethernet card,</div><div class='ctx'> 	  answer Y here.</div><div class='ctx'> </div><div class='hunk'>@@ -44,8 +45,9 @@ config AMD8111_ETH</div><div class='ctx'> </div><div class='ctx'> config LANCE</div><div class='ctx'> 	tristate "AMD LANCE and PCnet (AT1500 and NE2100) support"</div><div class='del'>-	depends on ISA &amp;&amp; ISA_DMA_API &amp;&amp; !ARM</div><div class='del'>-	---help---</div><div class='add'>+	depends on ISA &amp;&amp; ISA_DMA_API &amp;&amp; !ARM &amp;&amp; !PPC32</div><div class='add'>+	select NETDEV_LEGACY_INIT</div><div class='add'>+	help</div><div class='ctx'> 	  If you have a network (Ethernet) card of this type, say Y here.</div><div class='ctx'> 	  Some LinkSys cards are of this type.</div><div class='ctx'> </div><div class='hunk'>@@ -54,10 +56,10 @@ config LANCE</div><div class='ctx'> </div><div class='ctx'> config PCNET32</div><div class='ctx'> 	tristate "AMD PCnet32 PCI support"</div><div class='del'>-	depends on PCI</div><div class='add'>+	depends on PCI &amp;&amp; HAS_IOPORT</div><div class='ctx'> 	select CRC32</div><div class='ctx'> 	select MII</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  If you have a PCnet32 or PCnetPCI based network (Ethernet) card,</div><div class='ctx'> 	  answer Y here.</div><div class='ctx'> </div><div class='hunk'>@@ -67,25 +69,17 @@ config PCNET32</div><div class='ctx'> config ARIADNE</div><div class='ctx'> 	tristate "Ariadne support"</div><div class='ctx'> 	depends on ZORRO</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  If you have a Village Tronic Ariadne Ethernet adapter, say Y.</div><div class='ctx'> 	  Otherwise, say N.</div><div class='ctx'> </div><div class='ctx'> 	  To compile this driver as a module, choose M here: the module</div><div class='ctx'> 	  will be called ariadne.</div><div class='ctx'> </div><div class='del'>-config ARM_AM79C961A</div><div class='del'>-	bool "ARM EBSA110 AM79C961A support"</div><div class='del'>-	depends on ARM &amp;&amp; ARCH_EBSA110</div><div class='del'>-	select CRC32</div><div class='del'>-	---help---</div><div class='del'>-	  If you wish to compile a kernel for the EBSA-110, then you should</div><div class='del'>-	  always answer Y to this.</div><div class='del'>-</div><div class='ctx'> config ATARILANCE</div><div class='ctx'> 	tristate "Atari LANCE support"</div><div class='ctx'> 	depends on ATARI</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  Say Y to include support for several Atari Ethernet adapters based</div><div class='ctx'> 	  on the AMD LANCE chipset: RieblCard (with or without battery), or</div><div class='ctx'> 	  PAMCard VME (also the version by Rhotron, with different addresses).</div><div class='hunk'>@@ -94,16 +88,16 @@ config DECLANCE</div><div class='ctx'> 	tristate "DEC LANCE ethernet controller support"</div><div class='ctx'> 	depends on MACH_DECSTATION</div><div class='ctx'> 	select CRC32</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  This driver is for the series of Ethernet controllers produced by</div><div class='ctx'> 	  DEC (now Compaq) based on the AMD LANCE chipset, including the</div><div class='ctx'> 	  DEPCA series.  (This chipset is better known via the NE2100 cards.)</div><div class='ctx'> </div><div class='ctx'> config HPLANCE</div><div class='del'>-	bool "HP on-board LANCE support"</div><div class='add'>+	tristate "HP on-board LANCE support"</div><div class='ctx'> 	depends on DIO</div><div class='ctx'> 	select CRC32</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  If you want to use the builtin "LANCE" Ethernet controller on an</div><div class='ctx'> 	  HP300 machine, say Y here.</div><div class='ctx'> </div><div class='hunk'>@@ -112,7 +106,7 @@ config MIPS_AU1X00_ENET</div><div class='ctx'> 	depends on MIPS_ALCHEMY</div><div class='ctx'> 	select PHYLIB</div><div class='ctx'> 	select CRC32</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  If you have an Alchemy Semi AU1X00 based system</div><div class='ctx'> 	  say Y.  Otherwise, say N.</div><div class='ctx'> </div><div class='hunk'>@@ -120,7 +114,7 @@ config MVME147_NET</div><div class='ctx'> 	tristate "MVME147 (LANCE) Ethernet support"</div><div class='ctx'> 	depends on MVME147</div><div class='ctx'> 	select CRC32</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  Support for the on-board Ethernet interface on the Motorola MVME147</div><div class='ctx'> 	  single-board computer.  Say Y here to include the</div><div class='ctx'> 	  driver for this chip in your kernel.</div><div class='hunk'>@@ -128,7 +122,7 @@ config MVME147_NET</div><div class='ctx'> </div><div class='ctx'> config PCMCIA_NMCLAN</div><div class='ctx'> 	tristate "New Media PCMCIA support"</div><div class='del'>-	depends on PCMCIA</div><div class='add'>+	depends on PCMCIA &amp;&amp; HAS_IOPORT</div><div class='ctx'> 	help</div><div class='ctx'> 	  Say Y here if you intend to attach a New Media Ethernet or LiveWire</div><div class='ctx'> 	  PCMCIA (PC-card) Ethernet card to your computer.</div><div class='hunk'>@@ -136,19 +130,10 @@ config PCMCIA_NMCLAN</div><div class='ctx'> 	  To compile this driver as a module, choose M here: the module will be</div><div class='ctx'> 	  called nmclan_cs.  If unsure, say N.</div><div class='ctx'> </div><div class='del'>-config NI65</div><div class='del'>-	tristate "NI6510 support"</div><div class='del'>-	depends on ISA &amp;&amp; ISA_DMA_API &amp;&amp; !ARM</div><div class='del'>-	---help---</div><div class='del'>-	  If you have a network (Ethernet) card of this type, say Y here.</div><div class='del'>-</div><div class='del'>-	  To compile this driver as a module, choose M here. The module</div><div class='del'>-	  will be called ni65.</div><div class='del'>-</div><div class='ctx'> config SUN3LANCE</div><div class='ctx'> 	tristate "Sun3/Sun3x on-board LANCE support"</div><div class='ctx'> 	depends on (SUN3 || SUN3X)</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  Most Sun3 and Sun3x motherboards (including the 3/50, 3/60 and 3/80)</div><div class='ctx'> 	  featured an AMD LANCE 10Mbit Ethernet controller on board; say Y</div><div class='ctx'> 	  here to compile in the Linux driver for this and enable Ethernet.</div><div class='hunk'>@@ -162,7 +147,7 @@ config SUNLANCE</div><div class='ctx'> 	tristate "Sun LANCE support"</div><div class='ctx'> 	depends on SBUS</div><div class='ctx'> 	select CRC32</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  This driver supports the "le" interface present on all 32-bit Sparc</div><div class='ctx'> 	  systems, on some older Ultra systems and as an Sbus option.  These</div><div class='ctx'> 	  cards are based on the AMD LANCE chipset, which is better known</div><div class='hunk'>@@ -173,12 +158,15 @@ config SUNLANCE</div><div class='ctx'> </div><div class='ctx'> config AMD_XGBE</div><div class='ctx'> 	tristate "AMD 10GbE Ethernet driver"</div><div class='del'>-	depends on ((OF_NET &amp;&amp; OF_ADDRESS) || ACPI) &amp;&amp; HAS_IOMEM &amp;&amp; HAS_DMA</div><div class='del'>-	depends on ARM64 || COMPILE_TEST</div><div class='add'>+	depends on (OF_ADDRESS || ACPI || PCI) &amp;&amp; HAS_IOMEM</div><div class='add'>+	depends on X86 || ARM64 || COMPILE_TEST</div><div class='add'>+	depends on PTP_1588_CLOCK_OPTIONAL</div><div class='ctx'> 	select BITREVERSE</div><div class='ctx'> 	select CRC32</div><div class='del'>-	select PTP_1588_CLOCK</div><div class='del'>-	---help---</div><div class='add'>+	select PHYLIB</div><div class='add'>+	select AMD_XGBE_HAVE_ECC if X86</div><div class='add'>+	select NET_SELFTESTS</div><div class='add'>+	help</div><div class='ctx'> 	  This driver supports the AMD 10GbE Ethernet device found on an</div><div class='ctx'> 	  AMD SoC.</div><div class='ctx'> </div><div class='hunk'>@@ -189,10 +177,28 @@ config AMD_XGBE_DCB</div><div class='ctx'> 	bool "Data Center Bridging (DCB) support"</div><div class='ctx'> 	default n</div><div class='ctx'> 	depends on AMD_XGBE &amp;&amp; DCB</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  Say Y here to enable Data Center Bridging (DCB) support in the</div><div class='ctx'> 	  driver.</div><div class='ctx'> </div><div class='ctx'> 	  If unsure, say N.</div><div class='ctx'> </div><div class='add'>+config AMD_XGBE_HAVE_ECC</div><div class='add'>+	bool</div><div class='add'>+	default n</div><div class='add'>+</div><div class='add'>+config PDS_CORE</div><div class='add'>+	tristate "AMD/Pensando Data Systems Core Device Support"</div><div class='add'>+	depends on 64BIT &amp;&amp; PCI</div><div class='add'>+	select AUXILIARY_BUS</div><div class='add'>+	select NET_DEVLINK</div><div class='add'>+	help</div><div class='add'>+	  This enables the support for the AMD/Pensando Core device family of</div><div class='add'>+	  adapters.  More specific information on this driver can be</div><div class='add'>+	  found in</div><div class='add'>+	  &lt;file:Documentation/networking/device_drivers/ethernet/amd/pds_core.rst&gt;.</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose M here. The module</div><div class='add'>+	  will be called pds_core.</div><div class='add'>+</div><div class='ctx'> endif # NET_VENDOR_AMD</div><div class='head'>diff --git a/drivers/net/ethernet/amd/Makefile b/drivers/net/ethernet/amd/Makefile<br/>index a38a2dce3eb3..2dcfb84731e1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/Makefile?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/Makefile</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> #</div><div class='ctx'> # Makefile for the AMD network device drivers.</div><div class='ctx'> #</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_A2065) += a2065.o</div><div class='ctx'> obj-$(CONFIG_AMD8111_ETH) += amd8111e.o</div><div class='del'>-obj-$(CONFIG_ARM_AM79C961A) += am79c961a.o</div><div class='ctx'> obj-$(CONFIG_ARIADNE) += ariadne.o</div><div class='ctx'> obj-$(CONFIG_ATARILANCE) += atarilance.o</div><div class='ctx'> obj-$(CONFIG_DECLANCE) += declance.o</div><div class='hunk'>@@ -13,8 +13,8 @@ obj-$(CONFIG_LANCE) += lance.o</div><div class='ctx'> obj-$(CONFIG_MIPS_AU1X00_ENET) += au1000_eth.o</div><div class='ctx'> obj-$(CONFIG_MVME147_NET) += mvme147.o 7990.o</div><div class='ctx'> obj-$(CONFIG_PCMCIA_NMCLAN) += nmclan_cs.o</div><div class='del'>-obj-$(CONFIG_NI65) += ni65.o</div><div class='ctx'> obj-$(CONFIG_PCNET32) += pcnet32.o</div><div class='ctx'> obj-$(CONFIG_SUN3LANCE) += sun3lance.o</div><div class='ctx'> obj-$(CONFIG_SUNLANCE) += sunlance.o</div><div class='ctx'> obj-$(CONFIG_AMD_XGBE) += xgbe/</div><div class='add'>+obj-$(CONFIG_PDS_CORE) += pds_core/</div><div class='head'>diff --git a/drivers/net/ethernet/amd/a2065.c b/drivers/net/ethernet/amd/a2065.c<br/>index 56139184b801..ce9445425045 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/a2065.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/a2065.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/a2065.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/a2065.c</a></div><div class='hunk'>@@ -118,11 +118,8 @@ struct lance_private {</div><div class='ctx'> 	int auto_select;	      /* cable-selection by carrier */</div><div class='ctx'> 	unsigned short busmaster_regval;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_SUNLANCE</div><div class='del'>-	struct Linux_SBus_DMA *ledma; /* if set this points to ledma and arch=4m */</div><div class='del'>-	int burst_sizes;	      /* ledma SBus burst sizes */</div><div class='del'>-#endif</div><div class='ctx'> 	struct timer_list         multicast_timer;</div><div class='add'>+	struct net_device	  *dev;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define LANCE_ADDR(x) ((int)(x) &amp; ~0xff000000)</div><div class='hunk'>@@ -489,7 +486,7 @@ static int lance_close(struct net_device *dev)</div><div class='ctx'> 	volatile struct lance_regs *ll = lp-&gt;ll;</div><div class='ctx'> </div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='del'>-	del_timer_sync(&amp;lp-&gt;multicast_timer);</div><div class='add'>+	timer_delete_sync(&amp;lp-&gt;multicast_timer);</div><div class='ctx'> </div><div class='ctx'> 	/* Stop the card */</div><div class='ctx'> 	ll-&gt;rap = LE_CSR0;</div><div class='hunk'>@@ -512,7 +509,7 @@ static inline int lance_reset(struct net_device *dev)</div><div class='ctx'> 	load_csrs(lp);</div><div class='ctx'> </div><div class='ctx'> 	lance_init_ring(dev);</div><div class='del'>-	dev-&gt;trans_start = jiffies; /* prevent tx timeout */</div><div class='add'>+	netif_trans_update(dev); /* prevent tx timeout */</div><div class='ctx'> 	netif_start_queue(dev);</div><div class='ctx'> </div><div class='ctx'> 	status = init_restart_lance(lp);</div><div class='hunk'>@@ -521,7 +518,7 @@ static inline int lance_reset(struct net_device *dev)</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void lance_tx_timeout(struct net_device *dev)</div><div class='add'>+static void lance_tx_timeout(struct net_device *dev, unsigned int txqueue)</div><div class='ctx'> {</div><div class='ctx'> 	struct lance_private *lp = netdev_priv(dev);</div><div class='ctx'> 	volatile struct lance_regs *ll = lp-&gt;ll;</div><div class='hunk'>@@ -547,16 +544,13 @@ static netdev_tx_t lance_start_xmit(struct sk_buff *skb,</div><div class='ctx'> </div><div class='ctx'> 	local_irq_save(flags);</div><div class='ctx'> </div><div class='del'>-	if (!lance_tx_buffs_avail(lp)) {</div><div class='del'>-		local_irq_restore(flags);</div><div class='del'>-		return NETDEV_TX_LOCKED;</div><div class='del'>-	}</div><div class='add'>+	if (!lance_tx_buffs_avail(lp))</div><div class='add'>+		goto out_free;</div><div class='ctx'> </div><div class='del'>-#ifdef DEBUG</div><div class='ctx'> 	/* dump the packet */</div><div class='del'>-	print_hex_dump(KERN_DEBUG, "skb-&gt;data: ", DUMP_PREFIX_NONE,</div><div class='del'>-		       16, 1, skb-&gt;data, 64, true);</div><div class='del'>-#endif</div><div class='add'>+	print_hex_dump_debug("skb-&gt;data: ", DUMP_PREFIX_NONE, 16, 1, skb-&gt;data,</div><div class='add'>+			     64, true);</div><div class='add'>+</div><div class='ctx'> 	entry = lp-&gt;tx_new &amp; lp-&gt;tx_ring_mod_mask;</div><div class='ctx'> 	ib-&gt;btx_ring[entry].length = (-skblen) | 0xf000;</div><div class='ctx'> 	ib-&gt;btx_ring[entry].misc = 0;</div><div class='hunk'>@@ -573,6 +567,7 @@ static netdev_tx_t lance_start_xmit(struct sk_buff *skb,</div><div class='ctx'> </div><div class='ctx'> 	/* Kick the lance: transmit now */</div><div class='ctx'> 	ll-&gt;rdp = LE_C0_INEA | LE_C0_TDMD;</div><div class='add'>+ out_free:</div><div class='ctx'> 	dev_kfree_skb(skb);</div><div class='ctx'> </div><div class='ctx'> 	local_irq_restore(flags);</div><div class='hunk'>@@ -639,12 +634,19 @@ static void lance_set_multicast(struct net_device *dev)</div><div class='ctx'> 	netif_wake_queue(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void lance_set_multicast_retry(struct timer_list *t)</div><div class='add'>+{</div><div class='add'>+	struct lance_private *lp = timer_container_of(lp, t, multicast_timer);</div><div class='add'>+</div><div class='add'>+	lance_set_multicast(lp-&gt;dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int a2065_init_one(struct zorro_dev *z,</div><div class='ctx'> 			  const struct zorro_device_id *ent);</div><div class='ctx'> static void a2065_remove_one(struct zorro_dev *z);</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-static struct zorro_device_id a2065_zorro_tbl[] = {</div><div class='add'>+static const struct zorro_device_id a2065_zorro_tbl[] = {</div><div class='ctx'> 	{ ZORRO_PROD_CBM_A2065_1 },</div><div class='ctx'> 	{ ZORRO_PROD_CBM_A2065_2 },</div><div class='ctx'> 	{ ZORRO_PROD_AMERISTAR_A2065 },</div><div class='hunk'>@@ -666,7 +668,6 @@ static const struct net_device_ops lance_netdev_ops = {</div><div class='ctx'> 	.ndo_tx_timeout		= lance_tx_timeout,</div><div class='ctx'> 	.ndo_set_rx_mode	= lance_set_multicast,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='ctx'> 	.ndo_set_mac_address	= eth_mac_addr,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -679,6 +680,7 @@ static int a2065_init_one(struct zorro_dev *z,</div><div class='ctx'> 	unsigned long base_addr = board + A2065_LANCE;</div><div class='ctx'> 	unsigned long mem_start = board + A2065_RAM;</div><div class='ctx'> 	struct resource *r1, *r2;</div><div class='add'>+	u8 addr[ETH_ALEN];</div><div class='ctx'> 	u32 serial;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -693,7 +695,7 @@ static int a2065_init_one(struct zorro_dev *z,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dev = alloc_etherdev(sizeof(struct lance_private));</div><div class='del'>-	if (dev == NULL) {</div><div class='add'>+	if (!dev) {</div><div class='ctx'> 		release_mem_region(base_addr, sizeof(struct lance_regs));</div><div class='ctx'> 		release_mem_region(mem_start, A2065_RAM_SIZE);</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -705,17 +707,18 @@ static int a2065_init_one(struct zorro_dev *z,</div><div class='ctx'> 	r2-&gt;name = dev-&gt;name;</div><div class='ctx'> </div><div class='ctx'> 	serial = be32_to_cpu(z-&gt;rom.er_SerialNumber);</div><div class='del'>-	dev-&gt;dev_addr[0] = 0x00;</div><div class='add'>+	addr[0] = 0x00;</div><div class='ctx'> 	if (z-&gt;id != ZORRO_PROD_AMERISTAR_A2065) {	/* Commodore */</div><div class='del'>-		dev-&gt;dev_addr[1] = 0x80;</div><div class='del'>-		dev-&gt;dev_addr[2] = 0x10;</div><div class='add'>+		addr[1] = 0x80;</div><div class='add'>+		addr[2] = 0x10;</div><div class='ctx'> 	} else {					/* Ameristar */</div><div class='del'>-		dev-&gt;dev_addr[1] = 0x00;</div><div class='del'>-		dev-&gt;dev_addr[2] = 0x9f;</div><div class='add'>+		addr[1] = 0x00;</div><div class='add'>+		addr[2] = 0x9f;</div><div class='ctx'> 	}</div><div class='del'>-	dev-&gt;dev_addr[3] = (serial &gt;&gt; 16) &amp; 0xff;</div><div class='del'>-	dev-&gt;dev_addr[4] = (serial &gt;&gt; 8) &amp; 0xff;</div><div class='del'>-	dev-&gt;dev_addr[5] = serial &amp; 0xff;</div><div class='add'>+	addr[3] = (serial &gt;&gt; 16) &amp; 0xff;</div><div class='add'>+	addr[4] = (serial &gt;&gt; 8) &amp; 0xff;</div><div class='add'>+	addr[5] = serial &amp; 0xff;</div><div class='add'>+	eth_hw_addr_set(dev, addr);</div><div class='ctx'> 	dev-&gt;base_addr = (unsigned long)ZTWO_VADDR(base_addr);</div><div class='ctx'> 	dev-&gt;mem_start = (unsigned long)ZTWO_VADDR(mem_start);</div><div class='ctx'> 	dev-&gt;mem_end = dev-&gt;mem_start + A2065_RAM_SIZE;</div><div class='hunk'>@@ -730,15 +733,13 @@ static int a2065_init_one(struct zorro_dev *z,</div><div class='ctx'> 	priv-&gt;lance_log_tx_bufs = LANCE_LOG_TX_BUFFERS;</div><div class='ctx'> 	priv-&gt;rx_ring_mod_mask = RX_RING_MOD_MASK;</div><div class='ctx'> 	priv-&gt;tx_ring_mod_mask = TX_RING_MOD_MASK;</div><div class='add'>+	priv-&gt;dev = dev;</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;netdev_ops = &amp;lance_netdev_ops;</div><div class='ctx'> 	dev-&gt;watchdog_timeo = 5*HZ;</div><div class='ctx'> 	dev-&gt;dma = 0;</div><div class='ctx'> </div><div class='del'>-	init_timer(&amp;priv-&gt;multicast_timer);</div><div class='del'>-	priv-&gt;multicast_timer.data = (unsigned long) dev;</div><div class='del'>-	priv-&gt;multicast_timer.function =</div><div class='del'>-		(void (*)(unsigned long))lance_set_multicast;</div><div class='add'>+	timer_setup(&amp;priv-&gt;multicast_timer, lance_set_multicast_retry, 0);</div><div class='ctx'> </div><div class='ctx'> 	err = register_netdev(dev);</div><div class='ctx'> 	if (err) {</div><div class='hunk'>@@ -780,4 +781,5 @@ static void __exit a2065_cleanup_module(void)</div><div class='ctx'> module_init(a2065_init_module);</div><div class='ctx'> module_exit(a2065_cleanup_module);</div><div class='ctx'> </div><div class='add'>+MODULE_DESCRIPTION("Commodore A2065 Ethernet driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/amd/am79c961a.c b/drivers/net/ethernet/amd/am79c961a.c<br/>deleted file mode 100644<br/>index 87e727b921dc..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/am79c961a.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/am79c961a.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,768 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- *  linux/drivers/net/ethernet/amd/am79c961a.c</div><div class='del'>- *</div><div class='del'>- *  by Russell King &lt;rmk@arm.linux.org.uk&gt; 1995-2001.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- * Derived from various things including skeleton.c</div><div class='del'>- *</div><div class='del'>- * This is a special driver for the am79c961A Lance chip used in the</div><div class='del'>- * Intel (formally Digital Equipment Corp) EBSA110 platform.  Please</div><div class='del'>- * note that this can not be built as a module (it doesn't make sense).</div><div class='del'>- */</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/types.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/etherdevice.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/crc32.h&gt;</div><div class='del'>-#include &lt;linux/bitops.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='del'>-#include &lt;linux/io.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;mach/hardware.h&gt;</div><div class='del'>-</div><div class='del'>-#define TX_BUFFERS 15</div><div class='del'>-#define RX_BUFFERS 25</div><div class='del'>-</div><div class='del'>-#include "am79c961a.h"</div><div class='del'>-</div><div class='del'>-static irqreturn_t</div><div class='del'>-am79c961_interrupt (int irq, void *dev_id);</div><div class='del'>-</div><div class='del'>-static unsigned int net_debug = NET_DEBUG;</div><div class='del'>-</div><div class='del'>-static const char version[] =</div><div class='del'>-	"am79c961 ethernet driver (C) 1995-2001 Russell King v0.04\n";</div><div class='del'>-</div><div class='del'>-/* --------------------------------------------------------------------------- */</div><div class='del'>-</div><div class='del'>-#ifdef __arm__</div><div class='del'>-static void write_rreg(u_long base, u_int reg, u_int val)</div><div class='del'>-{</div><div class='del'>-	asm volatile(</div><div class='del'>-	"str%?h	%1, [%2]	@ NET_RAP\n\t"</div><div class='del'>-	"str%?h	%0, [%2, #-4]	@ NET_RDP"</div><div class='del'>-	:</div><div class='del'>-	: "r" (val), "r" (reg), "r" (ISAIO_BASE + 0x0464));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned short read_rreg(u_long base_addr, u_int reg)</div><div class='del'>-{</div><div class='del'>-	unsigned short v;</div><div class='del'>-	asm volatile(</div><div class='del'>-	"str%?h	%1, [%2]	@ NET_RAP\n\t"</div><div class='del'>-	"ldr%?h	%0, [%2, #-4]	@ NET_RDP"</div><div class='del'>-	: "=r" (v)</div><div class='del'>-	: "r" (reg), "r" (ISAIO_BASE + 0x0464));</div><div class='del'>-	return v;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline void write_ireg(u_long base, u_int reg, u_int val)</div><div class='del'>-{</div><div class='del'>-	asm volatile(</div><div class='del'>-	"str%?h	%1, [%2]	@ NET_RAP\n\t"</div><div class='del'>-	"str%?h	%0, [%2, #8]	@ NET_IDP"</div><div class='del'>-	:</div><div class='del'>-	: "r" (val), "r" (reg), "r" (ISAIO_BASE + 0x0464));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static inline unsigned short read_ireg(u_long base_addr, u_int reg)</div><div class='del'>-{</div><div class='del'>-	u_short v;</div><div class='del'>-	asm volatile(</div><div class='del'>-	"str%?h	%1, [%2]	@ NAT_RAP\n\t"</div><div class='del'>-	"ldr%?h	%0, [%2, #8]	@ NET_IDP\n\t"</div><div class='del'>-	: "=r" (v)</div><div class='del'>-	: "r" (reg), "r" (ISAIO_BASE + 0x0464));</div><div class='del'>-	return v;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define am_writeword(dev,off,val) __raw_writew(val, ISAMEM_BASE + ((off) &lt;&lt; 1))</div><div class='del'>-#define am_readword(dev,off)      __raw_readw(ISAMEM_BASE + ((off) &lt;&lt; 1))</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-am_writebuffer(struct net_device *dev, u_int offset, unsigned char *buf, unsigned int length)</div><div class='del'>-{</div><div class='del'>-	offset = ISAMEM_BASE + (offset &lt;&lt; 1);</div><div class='del'>-	length = (length + 1) &amp; ~1;</div><div class='del'>-	if ((int)buf &amp; 2) {</div><div class='del'>-		asm volatile("str%?h	%2, [%0], #4"</div><div class='del'>-		 : "=&amp;r" (offset) : "0" (offset), "r" (buf[0] | (buf[1] &lt;&lt; 8)));</div><div class='del'>-		buf += 2;</div><div class='del'>-		length -= 2;</div><div class='del'>-	}</div><div class='del'>-	while (length &gt; 8) {</div><div class='del'>-		register unsigned int tmp asm("r2"), tmp2 asm("r3");</div><div class='del'>-		asm volatile(</div><div class='del'>-			"ldm%?ia	%0!, {%1, %2}"</div><div class='del'>-			: "+r" (buf), "=&amp;r" (tmp), "=&amp;r" (tmp2));</div><div class='del'>-		length -= 8;</div><div class='del'>-		asm volatile(</div><div class='del'>-			"str%?h	%1, [%0], #4\n\t"</div><div class='del'>-			"mov%?	%1, %1, lsr #16\n\t"</div><div class='del'>-			"str%?h	%1, [%0], #4\n\t"</div><div class='del'>-			"str%?h	%2, [%0], #4\n\t"</div><div class='del'>-			"mov%?	%2, %2, lsr #16\n\t"</div><div class='del'>-			"str%?h	%2, [%0], #4"</div><div class='del'>-		: "+r" (offset), "=&amp;r" (tmp), "=&amp;r" (tmp2));</div><div class='del'>-	}</div><div class='del'>-	while (length &gt; 0) {</div><div class='del'>-		asm volatile("str%?h	%2, [%0], #4"</div><div class='del'>-		 : "=&amp;r" (offset) : "0" (offset), "r" (buf[0] | (buf[1] &lt;&lt; 8)));</div><div class='del'>-		buf += 2;</div><div class='del'>-		length -= 2;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-am_readbuffer(struct net_device *dev, u_int offset, unsigned char *buf, unsigned int length)</div><div class='del'>-{</div><div class='del'>-	offset = ISAMEM_BASE + (offset &lt;&lt; 1);</div><div class='del'>-	length = (length + 1) &amp; ~1;</div><div class='del'>-	if ((int)buf &amp; 2) {</div><div class='del'>-		unsigned int tmp;</div><div class='del'>-		asm volatile(</div><div class='del'>-			"ldr%?h	%2, [%0], #4\n\t"</div><div class='del'>-			"str%?b	%2, [%1], #1\n\t"</div><div class='del'>-			"mov%?	%2, %2, lsr #8\n\t"</div><div class='del'>-			"str%?b	%2, [%1], #1"</div><div class='del'>-		: "=&amp;r" (offset), "=&amp;r" (buf), "=r" (tmp): "0" (offset), "1" (buf));</div><div class='del'>-		length -= 2;</div><div class='del'>-	}</div><div class='del'>-	while (length &gt; 8) {</div><div class='del'>-		register unsigned int tmp asm("r2"), tmp2 asm("r3"), tmp3;</div><div class='del'>-		asm volatile(</div><div class='del'>-			"ldr%?h	%2, [%0], #4\n\t"</div><div class='del'>-			"ldr%?h	%4, [%0], #4\n\t"</div><div class='del'>-			"ldr%?h	%3, [%0], #4\n\t"</div><div class='del'>-			"orr%?	%2, %2, %4, lsl #16\n\t"</div><div class='del'>-			"ldr%?h	%4, [%0], #4\n\t"</div><div class='del'>-			"orr%?	%3, %3, %4, lsl #16\n\t"</div><div class='del'>-			"stm%?ia	%1!, {%2, %3}"</div><div class='del'>-		: "=&amp;r" (offset), "=&amp;r" (buf), "=r" (tmp), "=r" (tmp2), "=r" (tmp3)</div><div class='del'>-		: "0" (offset), "1" (buf));</div><div class='del'>-		length -= 8;</div><div class='del'>-	}</div><div class='del'>-	while (length &gt; 0) {</div><div class='del'>-		unsigned int tmp;</div><div class='del'>-		asm volatile(</div><div class='del'>-			"ldr%?h	%2, [%0], #4\n\t"</div><div class='del'>-			"str%?b	%2, [%1], #1\n\t"</div><div class='del'>-			"mov%?	%2, %2, lsr #8\n\t"</div><div class='del'>-			"str%?b	%2, [%1], #1"</div><div class='del'>-		: "=&amp;r" (offset), "=&amp;r" (buf), "=r" (tmp) : "0" (offset), "1" (buf));</div><div class='del'>-		length -= 2;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-#else</div><div class='del'>-#error Not compatible</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static int</div><div class='del'>-am79c961_ramtest(struct net_device *dev, unsigned int val)</div><div class='del'>-{</div><div class='del'>-	unsigned char *buffer = kmalloc (65536, GFP_KERNEL);</div><div class='del'>-	int i, error = 0, errorcount = 0;</div><div class='del'>-</div><div class='del'>-	if (!buffer)</div><div class='del'>-		return 0;</div><div class='del'>-	memset (buffer, val, 65536);</div><div class='del'>-	am_writebuffer(dev, 0, buffer, 65536);</div><div class='del'>-	memset (buffer, val ^ 255, 65536);</div><div class='del'>-	am_readbuffer(dev, 0, buffer, 65536);</div><div class='del'>-	for (i = 0; i &lt; 65536; i++) {</div><div class='del'>-		if (buffer[i] != val &amp;&amp; !error) {</div><div class='del'>-			printk ("%s: buffer error (%02X %02X) %05X - ", dev-&gt;name, val, buffer[i], i);</div><div class='del'>-			error = 1;</div><div class='del'>-			errorcount ++;</div><div class='del'>-		} else if (error &amp;&amp; buffer[i] == val) {</div><div class='del'>-			printk ("%05X\n", i);</div><div class='del'>-			error = 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	if (error)</div><div class='del'>-		printk ("10000\n");</div><div class='del'>-	kfree (buffer);</div><div class='del'>-	return errorcount;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void am79c961_mc_hash(char *addr, u16 *hash)</div><div class='del'>-{</div><div class='del'>-	int idx, bit;</div><div class='del'>-	u32 crc;</div><div class='del'>-</div><div class='del'>-	crc = ether_crc_le(ETH_ALEN, addr);</div><div class='del'>-</div><div class='del'>-	idx = crc &gt;&gt; 30;</div><div class='del'>-	bit = (crc &gt;&gt; 26) &amp; 15;</div><div class='del'>-</div><div class='del'>-	hash[idx] |= 1 &lt;&lt; bit;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned int am79c961_get_rx_mode(struct net_device *dev, u16 *hash)</div><div class='del'>-{</div><div class='del'>-	unsigned int mode = MODE_PORT_10BT;</div><div class='del'>-</div><div class='del'>-	if (dev-&gt;flags &amp; IFF_PROMISC) {</div><div class='del'>-		mode |= MODE_PROMISC;</div><div class='del'>-		memset(hash, 0xff, 4 * sizeof(*hash));</div><div class='del'>-	} else if (dev-&gt;flags &amp; IFF_ALLMULTI) {</div><div class='del'>-		memset(hash, 0xff, 4 * sizeof(*hash));</div><div class='del'>-	} else {</div><div class='del'>-		struct netdev_hw_addr *ha;</div><div class='del'>-</div><div class='del'>-		memset(hash, 0, 4 * sizeof(*hash));</div><div class='del'>-</div><div class='del'>-		netdev_for_each_mc_addr(ha, dev)</div><div class='del'>-			am79c961_mc_hash(ha-&gt;addr, hash);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return mode;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void</div><div class='del'>-am79c961_init_for_open(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct dev_priv *priv = netdev_priv(dev);</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	unsigned char *p;</div><div class='del'>-	u_int hdr_addr, first_free_addr;</div><div class='del'>-	u16 multi_hash[4], mode = am79c961_get_rx_mode(dev, multi_hash);</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Stop the chip.</div><div class='del'>-	 */</div><div class='del'>-	spin_lock_irqsave(&amp;priv-&gt;chip_lock, flags);</div><div class='del'>-	write_rreg (dev-&gt;base_addr, CSR0, CSR0_BABL|CSR0_CERR|CSR0_MISS|CSR0_MERR|CSR0_TINT|CSR0_RINT|CSR0_STOP);</div><div class='del'>-	spin_unlock_irqrestore(&amp;priv-&gt;chip_lock, flags);</div><div class='del'>-</div><div class='del'>-	write_ireg (dev-&gt;base_addr, 5, 0x00a0); /* Receive address LED */</div><div class='del'>-	write_ireg (dev-&gt;base_addr, 6, 0x0081); /* Collision LED */</div><div class='del'>-	write_ireg (dev-&gt;base_addr, 7, 0x0090); /* XMIT LED */</div><div class='del'>-	write_ireg (dev-&gt;base_addr, 2, 0x0000); /* MODE register selects media */</div><div class='del'>-</div><div class='del'>-	for (i = LADRL; i &lt;= LADRH; i++)</div><div class='del'>-		write_rreg (dev-&gt;base_addr, i, multi_hash[i - LADRL]);</div><div class='del'>-</div><div class='del'>-	for (i = PADRL, p = dev-&gt;dev_addr; i &lt;= PADRH; i++, p += 2)</div><div class='del'>-		write_rreg (dev-&gt;base_addr, i, p[0] | (p[1] &lt;&lt; 8));</div><div class='del'>-</div><div class='del'>-	write_rreg (dev-&gt;base_addr, MODE, mode);</div><div class='del'>-	write_rreg (dev-&gt;base_addr, POLLINT, 0);</div><div class='del'>-	write_rreg (dev-&gt;base_addr, SIZERXR, -RX_BUFFERS);</div><div class='del'>-	write_rreg (dev-&gt;base_addr, SIZETXR, -TX_BUFFERS);</div><div class='del'>-</div><div class='del'>-	first_free_addr = RX_BUFFERS * 8 + TX_BUFFERS * 8 + 16;</div><div class='del'>-	hdr_addr = 0;</div><div class='del'>-</div><div class='del'>-	priv-&gt;rxhead = 0;</div><div class='del'>-	priv-&gt;rxtail = 0;</div><div class='del'>-	priv-&gt;rxhdr = hdr_addr;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; RX_BUFFERS; i++) {</div><div class='del'>-		priv-&gt;rxbuffer[i] = first_free_addr;</div><div class='del'>-		am_writeword (dev, hdr_addr, first_free_addr);</div><div class='del'>-		am_writeword (dev, hdr_addr + 2, RMD_OWN);</div><div class='del'>-		am_writeword (dev, hdr_addr + 4, (-1600));</div><div class='del'>-		am_writeword (dev, hdr_addr + 6, 0);</div><div class='del'>-		first_free_addr += 1600;</div><div class='del'>-		hdr_addr += 8;</div><div class='del'>-	}</div><div class='del'>-	priv-&gt;txhead = 0;</div><div class='del'>-	priv-&gt;txtail = 0;</div><div class='del'>-	priv-&gt;txhdr = hdr_addr;</div><div class='del'>-	for (i = 0; i &lt; TX_BUFFERS; i++) {</div><div class='del'>-		priv-&gt;txbuffer[i] = first_free_addr;</div><div class='del'>-		am_writeword (dev, hdr_addr, first_free_addr);</div><div class='del'>-		am_writeword (dev, hdr_addr + 2, TMD_STP|TMD_ENP);</div><div class='del'>-		am_writeword (dev, hdr_addr + 4, 0xf000);</div><div class='del'>-		am_writeword (dev, hdr_addr + 6, 0);</div><div class='del'>-		first_free_addr += 1600;</div><div class='del'>-		hdr_addr += 8;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	write_rreg (dev-&gt;base_addr, BASERXL, priv-&gt;rxhdr);</div><div class='del'>-	write_rreg (dev-&gt;base_addr, BASERXH, 0);</div><div class='del'>-	write_rreg (dev-&gt;base_addr, BASETXL, priv-&gt;txhdr);</div><div class='del'>-	write_rreg (dev-&gt;base_addr, BASERXH, 0);</div><div class='del'>-	write_rreg (dev-&gt;base_addr, CSR0, CSR0_STOP);</div><div class='del'>-	write_rreg (dev-&gt;base_addr, CSR3, CSR3_IDONM|CSR3_BABLM|CSR3_DXSUFLO);</div><div class='del'>-	write_rreg (dev-&gt;base_addr, CSR4, CSR4_APAD_XMIT|CSR4_MFCOM|CSR4_RCVCCOM|CSR4_TXSTRTM|CSR4_JABM);</div><div class='del'>-	write_rreg (dev-&gt;base_addr, CSR0, CSR0_IENA|CSR0_STRT);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void am79c961_timer(unsigned long data)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = (struct net_device *)data;</div><div class='del'>-	struct dev_priv *priv = netdev_priv(dev);</div><div class='del'>-	unsigned int lnkstat, carrier;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;priv-&gt;chip_lock, flags);</div><div class='del'>-	lnkstat = read_ireg(dev-&gt;base_addr, ISALED0) &amp; ISALED0_LNKST;</div><div class='del'>-	spin_unlock_irqrestore(&amp;priv-&gt;chip_lock, flags);</div><div class='del'>-	carrier = netif_carrier_ok(dev);</div><div class='del'>-</div><div class='del'>-	if (lnkstat &amp;&amp; !carrier) {</div><div class='del'>-		netif_carrier_on(dev);</div><div class='del'>-		printk("%s: link up\n", dev-&gt;name);</div><div class='del'>-	} else if (!lnkstat &amp;&amp; carrier) {</div><div class='del'>-		netif_carrier_off(dev);</div><div class='del'>-		printk("%s: link down\n", dev-&gt;name);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	mod_timer(&amp;priv-&gt;timer, jiffies + msecs_to_jiffies(500));</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Open/initialize the board.</div><div class='del'>- */</div><div class='del'>-static int</div><div class='del'>-am79c961_open(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct dev_priv *priv = netdev_priv(dev);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	ret = request_irq(dev-&gt;irq, am79c961_interrupt, 0, dev-&gt;name, dev);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='del'>-</div><div class='del'>-	am79c961_init_for_open(dev);</div><div class='del'>-</div><div class='del'>-	netif_carrier_off(dev);</div><div class='del'>-</div><div class='del'>-	priv-&gt;timer.expires = jiffies;</div><div class='del'>-	add_timer(&amp;priv-&gt;timer);</div><div class='del'>-</div><div class='del'>-	netif_start_queue(dev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * The inverse routine to am79c961_open().</div><div class='del'>- */</div><div class='del'>-static int</div><div class='del'>-am79c961_close(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct dev_priv *priv = netdev_priv(dev);</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	del_timer_sync(&amp;priv-&gt;timer);</div><div class='del'>-</div><div class='del'>-	netif_stop_queue(dev);</div><div class='del'>-	netif_carrier_off(dev);</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;priv-&gt;chip_lock, flags);</div><div class='del'>-	write_rreg (dev-&gt;base_addr, CSR0, CSR0_STOP);</div><div class='del'>-	write_rreg (dev-&gt;base_addr, CSR3, CSR3_MASKALL);</div><div class='del'>-	spin_unlock_irqrestore(&amp;priv-&gt;chip_lock, flags);</div><div class='del'>-</div><div class='del'>-	free_irq (dev-&gt;irq, dev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Set or clear promiscuous/multicast mode filter for this adapter.</div><div class='del'>- */</div><div class='del'>-static void am79c961_setmulticastlist (struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct dev_priv *priv = netdev_priv(dev);</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	u16 multi_hash[4], mode = am79c961_get_rx_mode(dev, multi_hash);</div><div class='del'>-	int i, stopped;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;priv-&gt;chip_lock, flags);</div><div class='del'>-</div><div class='del'>-	stopped = read_rreg(dev-&gt;base_addr, CSR0) &amp; CSR0_STOP;</div><div class='del'>-</div><div class='del'>-	if (!stopped) {</div><div class='del'>-		/*</div><div class='del'>-		 * Put the chip into suspend mode</div><div class='del'>-		 */</div><div class='del'>-		write_rreg(dev-&gt;base_addr, CTRL1, CTRL1_SPND);</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Spin waiting for chip to report suspend mode</div><div class='del'>-		 */</div><div class='del'>-		while ((read_rreg(dev-&gt;base_addr, CTRL1) &amp; CTRL1_SPND) == 0) {</div><div class='del'>-			spin_unlock_irqrestore(&amp;priv-&gt;chip_lock, flags);</div><div class='del'>-			nop();</div><div class='del'>-			spin_lock_irqsave(&amp;priv-&gt;chip_lock, flags);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Update the multicast hash table</div><div class='del'>-	 */</div><div class='del'>-	for (i = 0; i &lt; ARRAY_SIZE(multi_hash); i++)</div><div class='del'>-		write_rreg(dev-&gt;base_addr, i + LADRL, multi_hash[i]);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Write the mode register</div><div class='del'>-	 */</div><div class='del'>-	write_rreg(dev-&gt;base_addr, MODE, mode);</div><div class='del'>-</div><div class='del'>-	if (!stopped) {</div><div class='del'>-		/*</div><div class='del'>-		 * Put the chip back into running mode</div><div class='del'>-		 */</div><div class='del'>-		write_rreg(dev-&gt;base_addr, CTRL1, 0);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	spin_unlock_irqrestore(&amp;priv-&gt;chip_lock, flags);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void am79c961_timeout(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	printk(KERN_WARNING "%s: transmit timed out, network cable problem?\n",</div><div class='del'>-		dev-&gt;name);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * ought to do some setup of the tx side here</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	netif_wake_queue(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Transmit a packet</div><div class='del'>- */</div><div class='del'>-static int</div><div class='del'>-am79c961_sendpacket(struct sk_buff *skb, struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct dev_priv *priv = netdev_priv(dev);</div><div class='del'>-	unsigned int hdraddr, bufaddr;</div><div class='del'>-	unsigned int head;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	head = priv-&gt;txhead;</div><div class='del'>-	hdraddr = priv-&gt;txhdr + (head &lt;&lt; 3);</div><div class='del'>-	bufaddr = priv-&gt;txbuffer[head];</div><div class='del'>-	head += 1;</div><div class='del'>-	if (head &gt;= TX_BUFFERS)</div><div class='del'>-		head = 0;</div><div class='del'>-</div><div class='del'>-	am_writebuffer (dev, bufaddr, skb-&gt;data, skb-&gt;len);</div><div class='del'>-	am_writeword (dev, hdraddr + 4, -skb-&gt;len);</div><div class='del'>-	am_writeword (dev, hdraddr + 2, TMD_OWN|TMD_STP|TMD_ENP);</div><div class='del'>-	priv-&gt;txhead = head;</div><div class='del'>-</div><div class='del'>-	spin_lock_irqsave(&amp;priv-&gt;chip_lock, flags);</div><div class='del'>-	write_rreg (dev-&gt;base_addr, CSR0, CSR0_TDMD|CSR0_IENA);</div><div class='del'>-	spin_unlock_irqrestore(&amp;priv-&gt;chip_lock, flags);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * If the next packet is owned by the ethernet device,</div><div class='del'>-	 * then the tx ring is full and we can't add another</div><div class='del'>-	 * packet.</div><div class='del'>-	 */</div><div class='del'>-	if (am_readword(dev, priv-&gt;txhdr + (priv-&gt;txhead &lt;&lt; 3) + 2) &amp; TMD_OWN)</div><div class='del'>-		netif_stop_queue(dev);</div><div class='del'>-</div><div class='del'>-	dev_consume_skb_any(skb);</div><div class='del'>-</div><div class='del'>-	return NETDEV_TX_OK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * If we have a good packet(s), get it/them out of the buffers.</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-am79c961_rx(struct net_device *dev, struct dev_priv *priv)</div><div class='del'>-{</div><div class='del'>-	do {</div><div class='del'>-		struct sk_buff *skb;</div><div class='del'>-		u_int hdraddr;</div><div class='del'>-		u_int pktaddr;</div><div class='del'>-		u_int status;</div><div class='del'>-		int len;</div><div class='del'>-</div><div class='del'>-		hdraddr = priv-&gt;rxhdr + (priv-&gt;rxtail &lt;&lt; 3);</div><div class='del'>-		pktaddr = priv-&gt;rxbuffer[priv-&gt;rxtail];</div><div class='del'>-</div><div class='del'>-		status = am_readword (dev, hdraddr + 2);</div><div class='del'>-		if (status &amp; RMD_OWN) /* do we own it? */</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		priv-&gt;rxtail ++;</div><div class='del'>-		if (priv-&gt;rxtail &gt;= RX_BUFFERS)</div><div class='del'>-			priv-&gt;rxtail = 0;</div><div class='del'>-</div><div class='del'>-		if ((status &amp; (RMD_ERR|RMD_STP|RMD_ENP)) != (RMD_STP|RMD_ENP)) {</div><div class='del'>-			am_writeword (dev, hdraddr + 2, RMD_OWN);</div><div class='del'>-			dev-&gt;stats.rx_errors++;</div><div class='del'>-			if (status &amp; RMD_ERR) {</div><div class='del'>-				if (status &amp; RMD_FRAM)</div><div class='del'>-					dev-&gt;stats.rx_frame_errors++;</div><div class='del'>-				if (status &amp; RMD_CRC)</div><div class='del'>-					dev-&gt;stats.rx_crc_errors++;</div><div class='del'>-			} else if (status &amp; RMD_STP)</div><div class='del'>-				dev-&gt;stats.rx_length_errors++;</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		len = am_readword(dev, hdraddr + 6);</div><div class='del'>-		skb = netdev_alloc_skb(dev, len + 2);</div><div class='del'>-</div><div class='del'>-		if (skb) {</div><div class='del'>-			skb_reserve(skb, 2);</div><div class='del'>-</div><div class='del'>-			am_readbuffer(dev, pktaddr, skb_put(skb, len), len);</div><div class='del'>-			am_writeword(dev, hdraddr + 2, RMD_OWN);</div><div class='del'>-			skb-&gt;protocol = eth_type_trans(skb, dev);</div><div class='del'>-			netif_rx(skb);</div><div class='del'>-			dev-&gt;stats.rx_bytes += len;</div><div class='del'>-			dev-&gt;stats.rx_packets++;</div><div class='del'>-		} else {</div><div class='del'>-			am_writeword (dev, hdraddr + 2, RMD_OWN);</div><div class='del'>-			dev-&gt;stats.rx_dropped++;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	} while (1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Update stats for the transmitted packet</div><div class='del'>- */</div><div class='del'>-static void</div><div class='del'>-am79c961_tx(struct net_device *dev, struct dev_priv *priv)</div><div class='del'>-{</div><div class='del'>-	do {</div><div class='del'>-		short len;</div><div class='del'>-		u_int hdraddr;</div><div class='del'>-		u_int status;</div><div class='del'>-</div><div class='del'>-		hdraddr = priv-&gt;txhdr + (priv-&gt;txtail &lt;&lt; 3);</div><div class='del'>-		status = am_readword (dev, hdraddr + 2);</div><div class='del'>-		if (status &amp; TMD_OWN)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		priv-&gt;txtail ++;</div><div class='del'>-		if (priv-&gt;txtail &gt;= TX_BUFFERS)</div><div class='del'>-			priv-&gt;txtail = 0;</div><div class='del'>-</div><div class='del'>-		if (status &amp; TMD_ERR) {</div><div class='del'>-			u_int status2;</div><div class='del'>-</div><div class='del'>-			dev-&gt;stats.tx_errors++;</div><div class='del'>-</div><div class='del'>-			status2 = am_readword (dev, hdraddr + 6);</div><div class='del'>-</div><div class='del'>-			/*</div><div class='del'>-			 * Clear the error byte</div><div class='del'>-			 */</div><div class='del'>-			am_writeword (dev, hdraddr + 6, 0);</div><div class='del'>-</div><div class='del'>-			if (status2 &amp; TST_RTRY)</div><div class='del'>-				dev-&gt;stats.collisions += 16;</div><div class='del'>-			if (status2 &amp; TST_LCOL)</div><div class='del'>-				dev-&gt;stats.tx_window_errors++;</div><div class='del'>-			if (status2 &amp; TST_LCAR)</div><div class='del'>-				dev-&gt;stats.tx_carrier_errors++;</div><div class='del'>-			if (status2 &amp; TST_UFLO)</div><div class='del'>-				dev-&gt;stats.tx_fifo_errors++;</div><div class='del'>-			continue;</div><div class='del'>-		}</div><div class='del'>-		dev-&gt;stats.tx_packets++;</div><div class='del'>-		len = am_readword (dev, hdraddr + 4);</div><div class='del'>-		dev-&gt;stats.tx_bytes += -len;</div><div class='del'>-	} while (priv-&gt;txtail != priv-&gt;txhead);</div><div class='del'>-</div><div class='del'>-	netif_wake_queue(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static irqreturn_t</div><div class='del'>-am79c961_interrupt(int irq, void *dev_id)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = (struct net_device *)dev_id;</div><div class='del'>-	struct dev_priv *priv = netdev_priv(dev);</div><div class='del'>-	u_int status, n = 100;</div><div class='del'>-	int handled = 0;</div><div class='del'>-</div><div class='del'>-	do {</div><div class='del'>-		status = read_rreg(dev-&gt;base_addr, CSR0);</div><div class='del'>-		write_rreg(dev-&gt;base_addr, CSR0, status &amp;</div><div class='del'>-			   (CSR0_IENA|CSR0_TINT|CSR0_RINT|</div><div class='del'>-			    CSR0_MERR|CSR0_MISS|CSR0_CERR|CSR0_BABL));</div><div class='del'>-</div><div class='del'>-		if (status &amp; CSR0_RINT) {</div><div class='del'>-			handled = 1;</div><div class='del'>-			am79c961_rx(dev, priv);</div><div class='del'>-		}</div><div class='del'>-		if (status &amp; CSR0_TINT) {</div><div class='del'>-			handled = 1;</div><div class='del'>-			am79c961_tx(dev, priv);</div><div class='del'>-		}</div><div class='del'>-		if (status &amp; CSR0_MISS) {</div><div class='del'>-			handled = 1;</div><div class='del'>-			dev-&gt;stats.rx_dropped++;</div><div class='del'>-		}</div><div class='del'>-		if (status &amp; CSR0_CERR) {</div><div class='del'>-			handled = 1;</div><div class='del'>-			mod_timer(&amp;priv-&gt;timer, jiffies);</div><div class='del'>-		}</div><div class='del'>-	} while (--n &amp;&amp; status &amp; (CSR0_RINT | CSR0_TINT));</div><div class='del'>-</div><div class='del'>-	return IRQ_RETVAL(handled);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='del'>-static void am79c961_poll_controller(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='del'>-	local_irq_save(flags);</div><div class='del'>-	am79c961_interrupt(dev-&gt;irq, dev);</div><div class='del'>-	local_irq_restore(flags);</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Initialise the chip.  Note that we always expect</div><div class='del'>- * to be entered with interrupts enabled.</div><div class='del'>- */</div><div class='del'>-static int</div><div class='del'>-am79c961_hw_init(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct dev_priv *priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	spin_lock_irq(&amp;priv-&gt;chip_lock);</div><div class='del'>-	write_rreg (dev-&gt;base_addr, CSR0, CSR0_STOP);</div><div class='del'>-	write_rreg (dev-&gt;base_addr, CSR3, CSR3_MASKALL);</div><div class='del'>-	spin_unlock_irq(&amp;priv-&gt;chip_lock);</div><div class='del'>-</div><div class='del'>-	am79c961_ramtest(dev, 0x66);</div><div class='del'>-	am79c961_ramtest(dev, 0x99);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __init am79c961_banner(void)</div><div class='del'>-{</div><div class='del'>-	static unsigned version_printed;</div><div class='del'>-</div><div class='del'>-	if (net_debug &amp;&amp; version_printed++ == 0)</div><div class='del'>-		printk(KERN_INFO "%s", version);</div><div class='del'>-}</div><div class='del'>-static const struct net_device_ops am79c961_netdev_ops = {</div><div class='del'>-	.ndo_open		= am79c961_open,</div><div class='del'>-	.ndo_stop		= am79c961_close,</div><div class='del'>-	.ndo_start_xmit		= am79c961_sendpacket,</div><div class='del'>-	.ndo_set_rx_mode	= am79c961_setmulticastlist,</div><div class='del'>-	.ndo_tx_timeout		= am79c961_timeout,</div><div class='del'>-	.ndo_validate_addr	= eth_validate_addr,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='del'>-	.ndo_set_mac_address	= eth_mac_addr,</div><div class='del'>-#ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='del'>-	.ndo_poll_controller	= am79c961_poll_controller,</div><div class='del'>-#endif</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int am79c961_probe(struct platform_device *pdev)</div><div class='del'>-{</div><div class='del'>-	struct resource *res;</div><div class='del'>-	struct net_device *dev;</div><div class='del'>-	struct dev_priv *priv;</div><div class='del'>-	int i, ret;</div><div class='del'>-</div><div class='del'>-	res = platform_get_resource(pdev, IORESOURCE_IO, 0);</div><div class='del'>-	if (!res)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	dev = alloc_etherdev(sizeof(struct dev_priv));</div><div class='del'>-	ret = -ENOMEM;</div><div class='del'>-	if (!dev)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	SET_NETDEV_DEV(dev, &amp;pdev-&gt;dev);</div><div class='del'>-</div><div class='del'>-	priv = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Fixed address and IRQ lines here.</div><div class='del'>-	 * The PNP initialisation should have been</div><div class='del'>-	 * done by the ether bootp loader.</div><div class='del'>-	 */</div><div class='del'>-	dev-&gt;base_addr = res-&gt;start;</div><div class='del'>-	ret = platform_get_irq(pdev, 0);</div><div class='del'>-</div><div class='del'>-	if (ret &lt; 0) {</div><div class='del'>-		ret = -ENODEV;</div><div class='del'>-		goto nodev;</div><div class='del'>-	}</div><div class='del'>-	dev-&gt;irq = ret;</div><div class='del'>-</div><div class='del'>-	ret = -ENODEV;</div><div class='del'>-	if (!request_region(dev-&gt;base_addr, 0x18, dev-&gt;name))</div><div class='del'>-		goto nodev;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Reset the device.</div><div class='del'>-	 */</div><div class='del'>-	inb(dev-&gt;base_addr + NET_RESET);</div><div class='del'>-	udelay(5);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * Check the manufacturer part of the</div><div class='del'>-	 * ether address.</div><div class='del'>-	 */</div><div class='del'>-	if (inb(dev-&gt;base_addr) != 0x08 ||</div><div class='del'>-	    inb(dev-&gt;base_addr + 2) != 0x00 ||</div><div class='del'>-	    inb(dev-&gt;base_addr + 4) != 0x2b)</div><div class='del'>-	    	goto release;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; 6; i++)</div><div class='del'>-		dev-&gt;dev_addr[i] = inb(dev-&gt;base_addr + i * 2) &amp; 0xff;</div><div class='del'>-</div><div class='del'>-	am79c961_banner();</div><div class='del'>-</div><div class='del'>-	spin_lock_init(&amp;priv-&gt;chip_lock);</div><div class='del'>-	init_timer(&amp;priv-&gt;timer);</div><div class='del'>-	priv-&gt;timer.data = (unsigned long)dev;</div><div class='del'>-	priv-&gt;timer.function = am79c961_timer;</div><div class='del'>-</div><div class='del'>-	if (am79c961_hw_init(dev))</div><div class='del'>-		goto release;</div><div class='del'>-</div><div class='del'>-	dev-&gt;netdev_ops = &amp;am79c961_netdev_ops;</div><div class='del'>-</div><div class='del'>-	ret = register_netdev(dev);</div><div class='del'>-	if (ret == 0) {</div><div class='del'>-		printk(KERN_INFO "%s: ether address %pM\n",</div><div class='del'>-		       dev-&gt;name, dev-&gt;dev_addr);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-release:</div><div class='del'>-	release_region(dev-&gt;base_addr, 0x18);</div><div class='del'>-nodev:</div><div class='del'>-	free_netdev(dev);</div><div class='del'>-out:</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct platform_driver am79c961_driver = {</div><div class='del'>-	.probe		= am79c961_probe,</div><div class='del'>-	.driver		= {</div><div class='del'>-		.name	= "am79c961",</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int __init am79c961_init(void)</div><div class='del'>-{</div><div class='del'>-	return platform_driver_register(&amp;am79c961_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-__initcall(am79c961_init);</div><div class='head'>diff --git a/drivers/net/ethernet/amd/am79c961a.h b/drivers/net/ethernet/amd/am79c961a.h<br/>deleted file mode 100644<br/>index 9f384b79507b..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/am79c961a.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/am79c961a.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,145 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * linux/drivers/net/ethernet/amd/am79c961a.h</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License version 2 as</div><div class='del'>- * published by the Free Software Foundation.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#ifndef _LINUX_am79c961a_H</div><div class='del'>-#define _LINUX_am79c961a_H</div><div class='del'>-</div><div class='del'>-/* use 0 for production, 1 for verification, &gt;2 for debug. debug flags: */</div><div class='del'>-#define DEBUG_TX	 2</div><div class='del'>-#define DEBUG_RX	 4</div><div class='del'>-#define DEBUG_INT	 8</div><div class='del'>-#define DEBUG_IC	16</div><div class='del'>-#ifndef NET_DEBUG</div><div class='del'>-#define NET_DEBUG 	0</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#define NET_UID		0</div><div class='del'>-#define NET_RDP		0x10</div><div class='del'>-#define NET_RAP		0x12</div><div class='del'>-#define NET_RESET	0x14</div><div class='del'>-#define NET_IDP		0x16</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * RAP registers</div><div class='del'>- */</div><div class='del'>-#define CSR0		0</div><div class='del'>-#define CSR0_INIT	0x0001</div><div class='del'>-#define CSR0_STRT	0x0002</div><div class='del'>-#define CSR0_STOP	0x0004</div><div class='del'>-#define CSR0_TDMD	0x0008</div><div class='del'>-#define CSR0_TXON	0x0010</div><div class='del'>-#define CSR0_RXON	0x0020</div><div class='del'>-#define CSR0_IENA	0x0040</div><div class='del'>-#define CSR0_INTR	0x0080</div><div class='del'>-#define CSR0_IDON	0x0100</div><div class='del'>-#define CSR0_TINT	0x0200</div><div class='del'>-#define CSR0_RINT	0x0400</div><div class='del'>-#define CSR0_MERR	0x0800</div><div class='del'>-#define CSR0_MISS	0x1000</div><div class='del'>-#define CSR0_CERR	0x2000</div><div class='del'>-#define CSR0_BABL	0x4000</div><div class='del'>-#define CSR0_ERR	0x8000</div><div class='del'>-</div><div class='del'>-#define CSR3		3</div><div class='del'>-#define CSR3_EMBA	0x0008</div><div class='del'>-#define CSR3_DXMT2PD	0x0010</div><div class='del'>-#define CSR3_LAPPEN	0x0020</div><div class='del'>-#define CSR3_DXSUFLO	0x0040</div><div class='del'>-#define CSR3_IDONM	0x0100</div><div class='del'>-#define CSR3_TINTM	0x0200</div><div class='del'>-#define CSR3_RINTM	0x0400</div><div class='del'>-#define CSR3_MERRM	0x0800</div><div class='del'>-#define CSR3_MISSM	0x1000</div><div class='del'>-#define CSR3_BABLM	0x4000</div><div class='del'>-#define CSR3_MASKALL	0x5F00</div><div class='del'>-</div><div class='del'>-#define CSR4		4</div><div class='del'>-#define CSR4_JABM	0x0001</div><div class='del'>-#define CSR4_JAB	0x0002</div><div class='del'>-#define CSR4_TXSTRTM	0x0004</div><div class='del'>-#define CSR4_TXSTRT	0x0008</div><div class='del'>-#define CSR4_RCVCCOM	0x0010</div><div class='del'>-#define CSR4_RCVCCO	0x0020</div><div class='del'>-#define CSR4_MFCOM	0x0100</div><div class='del'>-#define CSR4_MFCO	0x0200</div><div class='del'>-#define CSR4_ASTRP_RCV	0x0400</div><div class='del'>-#define CSR4_APAD_XMIT	0x0800</div><div class='del'>-</div><div class='del'>-#define CTRL1		5</div><div class='del'>-#define CTRL1_SPND	0x0001</div><div class='del'>-</div><div class='del'>-#define LADRL		8</div><div class='del'>-#define LADRM1		9</div><div class='del'>-#define LADRM2		10</div><div class='del'>-#define LADRH		11</div><div class='del'>-#define PADRL		12</div><div class='del'>-#define PADRM		13</div><div class='del'>-#define PADRH		14</div><div class='del'>-</div><div class='del'>-#define MODE		15</div><div class='del'>-#define MODE_DISRX	0x0001</div><div class='del'>-#define MODE_DISTX	0x0002</div><div class='del'>-#define MODE_LOOP	0x0004</div><div class='del'>-#define MODE_DTCRC	0x0008</div><div class='del'>-#define MODE_COLL	0x0010</div><div class='del'>-#define MODE_DRETRY	0x0020</div><div class='del'>-#define MODE_INTLOOP	0x0040</div><div class='del'>-#define MODE_PORT_AUI	0x0000</div><div class='del'>-#define MODE_PORT_10BT	0x0080</div><div class='del'>-#define MODE_DRXPA	0x2000</div><div class='del'>-#define MODE_DRXBA	0x4000</div><div class='del'>-#define MODE_PROMISC	0x8000</div><div class='del'>-</div><div class='del'>-#define BASERXL		24</div><div class='del'>-#define BASERXH		25</div><div class='del'>-#define BASETXL		30</div><div class='del'>-#define BASETXH		31</div><div class='del'>-</div><div class='del'>-#define POLLINT		47</div><div class='del'>-</div><div class='del'>-#define SIZERXR		76</div><div class='del'>-#define SIZETXR		78</div><div class='del'>-</div><div class='del'>-#define CSR_MFC		112</div><div class='del'>-</div><div class='del'>-#define RMD_ENP		0x0100</div><div class='del'>-#define RMD_STP		0x0200</div><div class='del'>-#define RMD_CRC		0x0800</div><div class='del'>-#define RMD_FRAM	0x2000</div><div class='del'>-#define RMD_ERR		0x4000</div><div class='del'>-#define RMD_OWN		0x8000</div><div class='del'>-</div><div class='del'>-#define TMD_ENP		0x0100</div><div class='del'>-#define TMD_STP		0x0200</div><div class='del'>-#define TMD_MORE	0x1000</div><div class='del'>-#define TMD_ERR		0x4000</div><div class='del'>-#define TMD_OWN		0x8000</div><div class='del'>-</div><div class='del'>-#define TST_RTRY	0x0400</div><div class='del'>-#define TST_LCAR	0x0800</div><div class='del'>-#define TST_LCOL	0x1000</div><div class='del'>-#define TST_UFLO	0x4000</div><div class='del'>-#define TST_BUFF	0x8000</div><div class='del'>-</div><div class='del'>-#define ISALED0		0x0004</div><div class='del'>-#define ISALED0_LNKST	0x8000</div><div class='del'>-</div><div class='del'>-struct dev_priv {</div><div class='del'>-    unsigned long	rxbuffer[RX_BUFFERS];</div><div class='del'>-    unsigned long	txbuffer[TX_BUFFERS];</div><div class='del'>-    unsigned char	txhead;</div><div class='del'>-    unsigned char	txtail;</div><div class='del'>-    unsigned char	rxhead;</div><div class='del'>-    unsigned char	rxtail;</div><div class='del'>-    unsigned long	rxhdr;</div><div class='del'>-    unsigned long	txhdr;</div><div class='del'>-    spinlock_t		chip_lock;</div><div class='del'>-    struct timer_list	timer;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-#endif</div><div class='head'>diff --git a/drivers/net/ethernet/amd/amd8111e.c b/drivers/net/ethernet/amd/amd8111e.c<br/>index 94960055fa1f..76e8c13d5985 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/amd8111e.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/amd8111e.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/amd8111e.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/amd8111e.c</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='ctx'> </div><div class='ctx'> /* Advanced  Micro Devices Inc. AMD8111E Linux Network Driver</div><div class='ctx'>  * Copyright (C) 2004 Advanced Micro Devices</div><div class='ctx'>  *</div><div class='del'>- *</div><div class='ctx'>  * Copyright 2001,2002 Jeff Garzik &lt;jgarzik@mandrakesoft.com&gt; [ 8139cp.c,tg3.c ]</div><div class='ctx'>  * Copyright (C) 2001, 2002 David S. Miller (davem@redhat.com)[ tg3.c]</div><div class='ctx'>  * Copyright 1996-1999 Thomas Bogendoerfer [ pcnet32.c ]</div><div class='hunk'>@@ -12,19 +12,6 @@</div><div class='ctx'>  * Carsten Langgaard, carstenl@mips.com [ pcnet32.c ]</div><div class='ctx'>  * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.</div><div class='ctx'>  *</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'> </div><div class='ctx'> Module Name:</div><div class='ctx'> </div><div class='hunk'>@@ -32,14 +19,14 @@ Module Name:</div><div class='ctx'> </div><div class='ctx'> Abstract:</div><div class='ctx'> </div><div class='del'>- 	 AMD8111 based 10/100 Ethernet Controller Driver.</div><div class='add'>+	 AMD8111 based 10/100 Ethernet Controller Driver.</div><div class='ctx'> </div><div class='ctx'> Environment:</div><div class='ctx'> </div><div class='ctx'> 	Kernel Mode</div><div class='ctx'> </div><div class='ctx'> Revision History:</div><div class='del'>- 	3.0.0</div><div class='add'>+	3.0.0</div><div class='ctx'> 	   Initial Revision.</div><div class='ctx'> 	3.0.1</div><div class='ctx'> 	 1. Dynamic interrupt coalescing.</div><div class='hunk'>@@ -56,7 +43,7 @@ Revision History:</div><div class='ctx'> 	3.0.4 12/09/2003</div><div class='ctx'> 	 1. Added set_mac_address routine for bonding driver support.</div><div class='ctx'> 	 2. Tested the driver for bonding support</div><div class='del'>-	 3. Bug fix: Fixed mismach in actual receive buffer lenth and lenth</div><div class='add'>+	 3. Bug fix: Fixed mismach in actual receive buffer length and length</div><div class='ctx'> 	    indicated to the h/w.</div><div class='ctx'> 	 4. Modified amd8111e_rx() routine to receive all the received packets</div><div class='ctx'> 	    in the first interrupt.</div><div class='hunk'>@@ -87,9 +74,9 @@ Revision History:</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/byteorder.h&gt;</div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> </div><div class='del'>-#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)</div><div class='add'>+#if IS_ENABLED(CONFIG_VLAN_8021Q)</div><div class='ctx'> #define AMD8111E_VLAN_TAG_USED 1</div><div class='ctx'> #else</div><div class='ctx'> #define AMD8111E_VLAN_TAG_USED 0</div><div class='hunk'>@@ -97,9 +84,8 @@ Revision History:</div><div class='ctx'> </div><div class='ctx'> #include "amd8111e.h"</div><div class='ctx'> #define MODULE_NAME	"amd8111e"</div><div class='del'>-#define MODULE_VERS	"3.0.7"</div><div class='ctx'> MODULE_AUTHOR("Advanced Micro Devices, Inc.");</div><div class='del'>-MODULE_DESCRIPTION ("AMD8111 based 10/100 Ethernet Controller. Driver Version "MODULE_VERS);</div><div class='add'>+MODULE_DESCRIPTION("AMD8111 based 10/100 Ethernet Controller.");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> module_param_array(speed_duplex, int, NULL, 0);</div><div class='ctx'> MODULE_PARM_DESC(speed_duplex, "Set device speed and duplex modes, 0: Auto Negotiate, 1: 10Mbps Half Duplex, 2: 10Mbps Full Duplex, 3: 100Mbps Half Duplex, 4: 100Mbps Full Duplex");</div><div class='hunk'>@@ -114,19 +100,19 @@ static int amd8111e_read_phy(struct amd8111e_priv *lp,</div><div class='ctx'> {</div><div class='ctx'> 	void __iomem *mmio = lp-&gt;mmio;</div><div class='ctx'> 	unsigned int reg_val;</div><div class='del'>-	unsigned int repeat= REPEAT_CNT;</div><div class='add'>+	unsigned int repeat = REPEAT_CNT;</div><div class='ctx'> </div><div class='ctx'> 	reg_val = readl(mmio + PHY_ACCESS);</div><div class='ctx'> 	while (reg_val &amp; PHY_CMD_ACTIVE)</div><div class='del'>-		reg_val = readl( mmio + PHY_ACCESS );</div><div class='add'>+		reg_val = readl(mmio + PHY_ACCESS);</div><div class='ctx'> </div><div class='del'>-	writel( PHY_RD_CMD | ((phy_id &amp; 0x1f) &lt;&lt; 21) |</div><div class='del'>-			   ((reg &amp; 0x1f) &lt;&lt; 16),  mmio +PHY_ACCESS);</div><div class='del'>-	do{</div><div class='add'>+	writel(PHY_RD_CMD | ((phy_id &amp; 0x1f) &lt;&lt; 21) |</div><div class='add'>+			   ((reg &amp; 0x1f) &lt;&lt; 16), mmio + PHY_ACCESS);</div><div class='add'>+	do {</div><div class='ctx'> 		reg_val = readl(mmio + PHY_ACCESS);</div><div class='ctx'> 		udelay(30);  /* It takes 30 us to read/write data */</div><div class='ctx'> 	} while (--repeat &amp;&amp; (reg_val &amp; PHY_CMD_ACTIVE));</div><div class='del'>-	if(reg_val &amp; PHY_RD_ERR)</div><div class='add'>+	if (reg_val &amp; PHY_RD_ERR)</div><div class='ctx'> 		goto err_phy_read;</div><div class='ctx'> </div><div class='ctx'> 	*val = reg_val &amp; 0xffff;</div><div class='hunk'>@@ -147,17 +133,17 @@ static int amd8111e_write_phy(struct amd8111e_priv *lp,</div><div class='ctx'> </div><div class='ctx'> 	reg_val = readl(mmio + PHY_ACCESS);</div><div class='ctx'> 	while (reg_val &amp; PHY_CMD_ACTIVE)</div><div class='del'>-		reg_val = readl( mmio + PHY_ACCESS );</div><div class='add'>+		reg_val = readl(mmio + PHY_ACCESS);</div><div class='ctx'> </div><div class='del'>-	writel( PHY_WR_CMD | ((phy_id &amp; 0x1f) &lt;&lt; 21) |</div><div class='add'>+	writel(PHY_WR_CMD | ((phy_id &amp; 0x1f) &lt;&lt; 21) |</div><div class='ctx'> 			   ((reg &amp; 0x1f) &lt;&lt; 16)|val, mmio + PHY_ACCESS);</div><div class='ctx'> </div><div class='del'>-	do{</div><div class='add'>+	do {</div><div class='ctx'> 		reg_val = readl(mmio + PHY_ACCESS);</div><div class='ctx'> 		udelay(30);  /* It takes 30 us to read/write the data */</div><div class='ctx'> 	} while (--repeat &amp;&amp; (reg_val &amp; PHY_CMD_ACTIVE));</div><div class='ctx'> </div><div class='del'>-	if(reg_val &amp; PHY_RD_ERR)</div><div class='add'>+	if (reg_val &amp; PHY_RD_ERR)</div><div class='ctx'> 		goto err_phy_write;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -173,7 +159,7 @@ static int amd8111e_mdio_read(struct net_device *dev, int phy_id, int reg_num)</div><div class='ctx'> 	struct amd8111e_priv *lp = netdev_priv(dev);</div><div class='ctx'> 	unsigned int reg_val;</div><div class='ctx'> </div><div class='del'>-	amd8111e_read_phy(lp,phy_id,reg_num,&amp;reg_val);</div><div class='add'>+	amd8111e_read_phy(lp, phy_id, reg_num, &amp;reg_val);</div><div class='ctx'> 	return reg_val;</div><div class='ctx'> </div><div class='ctx'> }</div><div class='hunk'>@@ -193,30 +179,29 @@ static void amd8111e_mdio_write(struct net_device *dev,</div><div class='ctx'> static void amd8111e_set_ext_phy(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct amd8111e_priv *lp = netdev_priv(dev);</div><div class='del'>-	u32 bmcr,advert,tmp;</div><div class='add'>+	u32 bmcr, advert, tmp;</div><div class='ctx'> </div><div class='ctx'> 	/* Determine mii register values to set the speed */</div><div class='ctx'> 	advert = amd8111e_mdio_read(dev, lp-&gt;ext_phy_addr, MII_ADVERTISE);</div><div class='ctx'> 	tmp = advert &amp; ~(ADVERTISE_ALL | ADVERTISE_100BASE4);</div><div class='del'>-	switch (lp-&gt;ext_phy_option){</div><div class='del'>-</div><div class='del'>-		default:</div><div class='del'>-		case SPEED_AUTONEG: /* advertise all values */</div><div class='del'>-			tmp |= ( ADVERTISE_10HALF|ADVERTISE_10FULL|</div><div class='del'>-				ADVERTISE_100HALF|ADVERTISE_100FULL) ;</div><div class='del'>-			break;</div><div class='del'>-		case SPEED10_HALF:</div><div class='del'>-			tmp |= ADVERTISE_10HALF;</div><div class='del'>-			break;</div><div class='del'>-		case SPEED10_FULL:</div><div class='del'>-			tmp |= ADVERTISE_10FULL;</div><div class='del'>-			break;</div><div class='del'>-		case SPEED100_HALF:</div><div class='del'>-			tmp |= ADVERTISE_100HALF;</div><div class='del'>-			break;</div><div class='del'>-		case SPEED100_FULL:</div><div class='del'>-			tmp |= ADVERTISE_100FULL;</div><div class='del'>-			break;</div><div class='add'>+	switch (lp-&gt;ext_phy_option) {</div><div class='add'>+	default:</div><div class='add'>+	case SPEED_AUTONEG: /* advertise all values */</div><div class='add'>+		tmp |= (ADVERTISE_10HALF | ADVERTISE_10FULL |</div><div class='add'>+			ADVERTISE_100HALF | ADVERTISE_100FULL);</div><div class='add'>+		break;</div><div class='add'>+	case SPEED10_HALF:</div><div class='add'>+		tmp |= ADVERTISE_10HALF;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED10_FULL:</div><div class='add'>+		tmp |= ADVERTISE_10FULL;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED100_HALF:</div><div class='add'>+		tmp |= ADVERTISE_100HALF;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED100_FULL:</div><div class='add'>+		tmp |= ADVERTISE_100FULL;</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if(advert != tmp)</div><div class='hunk'>@@ -238,20 +223,23 @@ static int amd8111e_free_skbs(struct net_device *dev)</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	/* Freeing transmit skbs */</div><div class='del'>-	for(i = 0; i &lt; NUM_TX_BUFFERS; i++){</div><div class='del'>-		if(lp-&gt;tx_skbuff[i]){</div><div class='del'>-			pci_unmap_single(lp-&gt;pci_dev,lp-&gt;tx_dma_addr[i],					lp-&gt;tx_skbuff[i]-&gt;len,PCI_DMA_TODEVICE);</div><div class='del'>-			dev_kfree_skb (lp-&gt;tx_skbuff[i]);</div><div class='add'>+	for (i = 0; i &lt; NUM_TX_BUFFERS; i++) {</div><div class='add'>+		if (lp-&gt;tx_skbuff[i]) {</div><div class='add'>+			dma_unmap_single(&amp;lp-&gt;pci_dev-&gt;dev,</div><div class='add'>+					 lp-&gt;tx_dma_addr[i],</div><div class='add'>+					 lp-&gt;tx_skbuff[i]-&gt;len, DMA_TO_DEVICE);</div><div class='add'>+			dev_kfree_skb(lp-&gt;tx_skbuff[i]);</div><div class='ctx'> 			lp-&gt;tx_skbuff[i] = NULL;</div><div class='ctx'> 			lp-&gt;tx_dma_addr[i] = 0;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Freeing previously allocated receive buffers */</div><div class='del'>-	for (i = 0; i &lt; NUM_RX_BUFFERS; i++){</div><div class='add'>+	for (i = 0; i &lt; NUM_RX_BUFFERS; i++) {</div><div class='ctx'> 		rx_skbuff = lp-&gt;rx_skbuff[i];</div><div class='del'>-		if(rx_skbuff != NULL){</div><div class='del'>-			pci_unmap_single(lp-&gt;pci_dev,lp-&gt;rx_dma_addr[i],</div><div class='del'>-				  lp-&gt;rx_buff_len - 2,PCI_DMA_FROMDEVICE);</div><div class='add'>+		if (rx_skbuff) {</div><div class='add'>+			dma_unmap_single(&amp;lp-&gt;pci_dev-&gt;dev,</div><div class='add'>+					 lp-&gt;rx_dma_addr[i],</div><div class='add'>+					 lp-&gt;rx_buff_len - 2, DMA_FROM_DEVICE);</div><div class='ctx'> 			dev_kfree_skb(lp-&gt;rx_skbuff[i]);</div><div class='ctx'> 			lp-&gt;rx_skbuff[i] = NULL;</div><div class='ctx'> 			lp-&gt;rx_dma_addr[i] = 0;</div><div class='hunk'>@@ -269,13 +257,13 @@ static inline void amd8111e_set_rx_buff_len(struct net_device *dev)</div><div class='ctx'> 	struct amd8111e_priv *lp = netdev_priv(dev);</div><div class='ctx'> 	unsigned int mtu = dev-&gt;mtu;</div><div class='ctx'> </div><div class='del'>-	if (mtu &gt; ETH_DATA_LEN){</div><div class='add'>+	if (mtu &gt; ETH_DATA_LEN) {</div><div class='ctx'> 		/* MTU + ethernet header + FCS</div><div class='ctx'> 		 * + optional VLAN tag + skb reserve space 2</div><div class='ctx'> 		 */</div><div class='ctx'> 		lp-&gt;rx_buff_len = mtu + ETH_HLEN + 10;</div><div class='ctx'> 		lp-&gt;options |= OPTION_JUMBO_ENABLE;</div><div class='del'>-	} else{</div><div class='add'>+	} else {</div><div class='ctx'> 		lp-&gt;rx_buff_len = PKT_BUFF_SZ;</div><div class='ctx'> 		lp-&gt;options &amp;= ~OPTION_JUMBO_ENABLE;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -296,25 +284,25 @@ static int amd8111e_init_ring(struct net_device *dev)</div><div class='ctx'> 	lp-&gt;tx_ring_idx = 0;</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-	if(lp-&gt;opened)</div><div class='add'>+	if (lp-&gt;opened)</div><div class='ctx'> 		/* Free previously allocated transmit and receive skbs */</div><div class='ctx'> 		amd8111e_free_skbs(dev);</div><div class='ctx'> </div><div class='del'>-	else{</div><div class='del'>-		 /* allocate the tx and rx descriptors */</div><div class='del'>-	     	if((lp-&gt;tx_ring = pci_alloc_consistent(lp-&gt;pci_dev,</div><div class='del'>-			sizeof(struct amd8111e_tx_dr)*NUM_TX_RING_DR,</div><div class='del'>-			&amp;lp-&gt;tx_ring_dma_addr)) == NULL)</div><div class='del'>-</div><div class='add'>+	else {</div><div class='add'>+		/* allocate the tx and rx descriptors */</div><div class='add'>+		lp-&gt;tx_ring = dma_alloc_coherent(&amp;lp-&gt;pci_dev-&gt;dev,</div><div class='add'>+			sizeof(struct amd8111e_tx_dr) * NUM_TX_RING_DR,</div><div class='add'>+			&amp;lp-&gt;tx_ring_dma_addr, GFP_ATOMIC);</div><div class='add'>+		if (!lp-&gt;tx_ring)</div><div class='ctx'> 			goto err_no_mem;</div><div class='ctx'> </div><div class='del'>-	     	if((lp-&gt;rx_ring = pci_alloc_consistent(lp-&gt;pci_dev,</div><div class='del'>-			sizeof(struct amd8111e_rx_dr)*NUM_RX_RING_DR,</div><div class='del'>-			&amp;lp-&gt;rx_ring_dma_addr)) == NULL)</div><div class='del'>-</div><div class='add'>+		lp-&gt;rx_ring = dma_alloc_coherent(&amp;lp-&gt;pci_dev-&gt;dev,</div><div class='add'>+			sizeof(struct amd8111e_rx_dr) * NUM_RX_RING_DR,</div><div class='add'>+			&amp;lp-&gt;rx_ring_dma_addr, GFP_ATOMIC);</div><div class='add'>+		if (!lp-&gt;rx_ring)</div><div class='ctx'> 			goto err_free_tx_ring;</div><div class='del'>-</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	/* Set new receive buff size */</div><div class='ctx'> 	amd8111e_set_rx_buff_len(dev);</div><div class='ctx'> </div><div class='hunk'>@@ -323,17 +311,19 @@ static int amd8111e_init_ring(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 		lp-&gt;rx_skbuff[i] = netdev_alloc_skb(dev, lp-&gt;rx_buff_len);</div><div class='ctx'> 		if (!lp-&gt;rx_skbuff[i]) {</div><div class='del'>-				/* Release previos allocated skbs */</div><div class='del'>-				for(--i; i &gt;= 0 ;i--)</div><div class='del'>-					dev_kfree_skb(lp-&gt;rx_skbuff[i]);</div><div class='del'>-				goto err_free_rx_ring;</div><div class='add'>+			/* Release previos allocated skbs */</div><div class='add'>+			for (--i; i &gt;= 0; i--)</div><div class='add'>+				dev_kfree_skb(lp-&gt;rx_skbuff[i]);</div><div class='add'>+			goto err_free_rx_ring;</div><div class='ctx'> 		}</div><div class='del'>-		skb_reserve(lp-&gt;rx_skbuff[i],2);</div><div class='add'>+		skb_reserve(lp-&gt;rx_skbuff[i], 2);</div><div class='ctx'> 	}</div><div class='ctx'>         /* Initilaizing receive descriptors */</div><div class='ctx'> 	for (i = 0; i &lt; NUM_RX_BUFFERS; i++) {</div><div class='del'>-		lp-&gt;rx_dma_addr[i] = pci_map_single(lp-&gt;pci_dev,</div><div class='del'>-			lp-&gt;rx_skbuff[i]-&gt;data,lp-&gt;rx_buff_len-2, PCI_DMA_FROMDEVICE);</div><div class='add'>+		lp-&gt;rx_dma_addr[i] = dma_map_single(&amp;lp-&gt;pci_dev-&gt;dev,</div><div class='add'>+						    lp-&gt;rx_skbuff[i]-&gt;data,</div><div class='add'>+						    lp-&gt;rx_buff_len - 2,</div><div class='add'>+						    DMA_FROM_DEVICE);</div><div class='ctx'> </div><div class='ctx'> 		lp-&gt;rx_ring[i].buff_phy_addr = cpu_to_le32(lp-&gt;rx_dma_addr[i]);</div><div class='ctx'> 		lp-&gt;rx_ring[i].buff_count = cpu_to_le16(lp-&gt;rx_buff_len-2);</div><div class='hunk'>@@ -352,15 +342,15 @@ static int amd8111e_init_ring(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> err_free_rx_ring:</div><div class='ctx'> </div><div class='del'>-	pci_free_consistent(lp-&gt;pci_dev,</div><div class='del'>-		sizeof(struct amd8111e_rx_dr)*NUM_RX_RING_DR,lp-&gt;rx_ring,</div><div class='del'>-		lp-&gt;rx_ring_dma_addr);</div><div class='add'>+	dma_free_coherent(&amp;lp-&gt;pci_dev-&gt;dev,</div><div class='add'>+			  sizeof(struct amd8111e_rx_dr) * NUM_RX_RING_DR,</div><div class='add'>+			  lp-&gt;rx_ring, lp-&gt;rx_ring_dma_addr);</div><div class='ctx'> </div><div class='ctx'> err_free_tx_ring:</div><div class='ctx'> </div><div class='del'>-	pci_free_consistent(lp-&gt;pci_dev,</div><div class='del'>-		 sizeof(struct amd8111e_tx_dr)*NUM_TX_RING_DR,lp-&gt;tx_ring,</div><div class='del'>-		 lp-&gt;tx_ring_dma_addr);</div><div class='add'>+	dma_free_coherent(&amp;lp-&gt;pci_dev-&gt;dev,</div><div class='add'>+			  sizeof(struct amd8111e_tx_dr) * NUM_TX_RING_DR,</div><div class='add'>+			  lp-&gt;tx_ring, lp-&gt;tx_ring_dma_addr);</div><div class='ctx'> </div><div class='ctx'> err_no_mem:</div><div class='ctx'> 	return -ENOMEM;</div><div class='hunk'>@@ -384,40 +374,40 @@ static int amd8111e_set_coalesce(struct net_device *dev, enum coal_mode cmod)</div><div class='ctx'> 		case RX_INTR_COAL :</div><div class='ctx'> 			timeout = coal_conf-&gt;rx_timeout;</div><div class='ctx'> 			event_count = coal_conf-&gt;rx_event_count;</div><div class='del'>-			if( timeout &gt; MAX_TIMEOUT ||</div><div class='del'>-					event_count &gt; MAX_EVENT_COUNT )</div><div class='add'>+			if (timeout &gt; MAX_TIMEOUT ||</div><div class='add'>+			    event_count &gt; MAX_EVENT_COUNT)</div><div class='ctx'> 				return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 			timeout = timeout * DELAY_TIMER_CONV;</div><div class='ctx'> 			writel(VAL0|STINTEN, mmio+INTEN0);</div><div class='del'>-			writel((u32)DLY_INT_A_R0|( event_count&lt;&lt; 16 )|timeout,</div><div class='del'>-							mmio+DLY_INT_A);</div><div class='add'>+			writel((u32)DLY_INT_A_R0 | (event_count &lt;&lt; 16) |</div><div class='add'>+				timeout, mmio + DLY_INT_A);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		case TX_INTR_COAL :</div><div class='add'>+		case TX_INTR_COAL:</div><div class='ctx'> 			timeout = coal_conf-&gt;tx_timeout;</div><div class='ctx'> 			event_count = coal_conf-&gt;tx_event_count;</div><div class='del'>-			if( timeout &gt; MAX_TIMEOUT ||</div><div class='del'>-					event_count &gt; MAX_EVENT_COUNT )</div><div class='add'>+			if (timeout &gt; MAX_TIMEOUT ||</div><div class='add'>+			    event_count &gt; MAX_EVENT_COUNT)</div><div class='ctx'> 				return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 			timeout = timeout * DELAY_TIMER_CONV;</div><div class='del'>-			writel(VAL0|STINTEN,mmio+INTEN0);</div><div class='del'>-			writel((u32)DLY_INT_B_T0|( event_count&lt;&lt; 16 )|timeout,</div><div class='del'>-							 mmio+DLY_INT_B);</div><div class='add'>+			writel(VAL0 | STINTEN, mmio + INTEN0);</div><div class='add'>+			writel((u32)DLY_INT_B_T0 | (event_count &lt;&lt; 16) |</div><div class='add'>+				timeout, mmio + DLY_INT_B);</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		case DISABLE_COAL:</div><div class='del'>-			writel(0,mmio+STVAL);</div><div class='del'>-			writel(STINTEN, mmio+INTEN0);</div><div class='del'>-			writel(0, mmio +DLY_INT_B);</div><div class='del'>-			writel(0, mmio+DLY_INT_A);</div><div class='add'>+			writel(0, mmio + STVAL);</div><div class='add'>+			writel(STINTEN, mmio + INTEN0);</div><div class='add'>+			writel(0, mmio + DLY_INT_B);</div><div class='add'>+			writel(0, mmio + DLY_INT_A);</div><div class='ctx'> 			break;</div><div class='ctx'> 		 case ENABLE_COAL:</div><div class='ctx'> 		       /* Start the timer */</div><div class='del'>-			writel((u32)SOFT_TIMER_FREQ, mmio+STVAL); /*  0.5 sec */</div><div class='del'>-			writel(VAL0|STINTEN, mmio+INTEN0);</div><div class='add'>+			writel((u32)SOFT_TIMER_FREQ, mmio + STVAL); /* 0.5 sec */</div><div class='add'>+			writel(VAL0 | STINTEN, mmio + INTEN0);</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -432,67 +422,67 @@ static int amd8111e_restart(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct amd8111e_priv *lp = netdev_priv(dev);</div><div class='ctx'> 	void __iomem *mmio = lp-&gt;mmio;</div><div class='del'>-	int i,reg_val;</div><div class='add'>+	int i, reg_val;</div><div class='ctx'> </div><div class='ctx'> 	/* stop the chip */</div><div class='del'>-	 writel(RUN, mmio + CMD0);</div><div class='add'>+	writel(RUN, mmio + CMD0);</div><div class='ctx'> </div><div class='del'>-	if(amd8111e_init_ring(dev))</div><div class='add'>+	if (amd8111e_init_ring(dev))</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	/* enable the port manager and set auto negotiation always */</div><div class='del'>-	writel((u32) VAL1|EN_PMGR, mmio + CMD3 );</div><div class='del'>-	writel((u32)XPHYANE|XPHYRST , mmio + CTRL2);</div><div class='add'>+	writel((u32)VAL1 | EN_PMGR, mmio + CMD3);</div><div class='add'>+	writel((u32)XPHYANE | XPHYRST, mmio + CTRL2);</div><div class='ctx'> </div><div class='ctx'> 	amd8111e_set_ext_phy(dev);</div><div class='ctx'> </div><div class='ctx'> 	/* set control registers */</div><div class='ctx'> 	reg_val = readl(mmio + CTRL1);</div><div class='ctx'> 	reg_val &amp;= ~XMTSP_MASK;</div><div class='del'>-	writel( reg_val| XMTSP_128 | CACHE_ALIGN, mmio + CTRL1 );</div><div class='add'>+	writel(reg_val | XMTSP_128 | CACHE_ALIGN, mmio + CTRL1);</div><div class='ctx'> </div><div class='ctx'> 	/* enable interrupt */</div><div class='del'>-	writel( APINT5EN | APINT4EN | APINT3EN | APINT2EN | APINT1EN |</div><div class='add'>+	writel(APINT5EN | APINT4EN | APINT3EN | APINT2EN | APINT1EN |</div><div class='ctx'> 		APINT0EN | MIIPDTINTEN | MCCIINTEN | MCCINTEN | MREINTEN |</div><div class='ctx'> 		SPNDINTEN | MPINTEN | SINTEN | STINTEN, mmio + INTEN0);</div><div class='ctx'> </div><div class='ctx'> 	writel(VAL3 | LCINTEN | VAL1 | TINTEN0 | VAL0 | RINTEN0, mmio + INTEN0);</div><div class='ctx'> </div><div class='ctx'> 	/* initialize tx and rx ring base addresses */</div><div class='del'>-	writel((u32)lp-&gt;tx_ring_dma_addr,mmio + XMT_RING_BASE_ADDR0);</div><div class='del'>-	writel((u32)lp-&gt;rx_ring_dma_addr,mmio+ RCV_RING_BASE_ADDR0);</div><div class='add'>+	writel((u32)lp-&gt;tx_ring_dma_addr, mmio + XMT_RING_BASE_ADDR0);</div><div class='add'>+	writel((u32)lp-&gt;rx_ring_dma_addr, mmio + RCV_RING_BASE_ADDR0);</div><div class='ctx'> </div><div class='ctx'> 	writew((u32)NUM_TX_RING_DR, mmio + XMT_RING_LEN0);</div><div class='ctx'> 	writew((u16)NUM_RX_RING_DR, mmio + RCV_RING_LEN0);</div><div class='ctx'> </div><div class='ctx'> 	/* set default IPG to 96 */</div><div class='del'>-	writew((u32)DEFAULT_IPG,mmio+IPG);</div><div class='add'>+	writew((u32)DEFAULT_IPG, mmio + IPG);</div><div class='ctx'> 	writew((u32)(DEFAULT_IPG-IFS1_DELTA), mmio + IFS1);</div><div class='ctx'> </div><div class='del'>-	if(lp-&gt;options &amp; OPTION_JUMBO_ENABLE){</div><div class='add'>+	if (lp-&gt;options &amp; OPTION_JUMBO_ENABLE) {</div><div class='ctx'> 		writel((u32)VAL2|JUMBO, mmio + CMD3);</div><div class='ctx'> 		/* Reset REX_UFLO */</div><div class='del'>-		writel( REX_UFLO, mmio + CMD2);</div><div class='add'>+		writel(REX_UFLO, mmio + CMD2);</div><div class='ctx'> 		/* Should not set REX_UFLO for jumbo frames */</div><div class='del'>-		writel( VAL0 | APAD_XMT|REX_RTRY , mmio + CMD2);</div><div class='del'>-	}else{</div><div class='del'>-		writel( VAL0 | APAD_XMT | REX_RTRY|REX_UFLO, mmio + CMD2);</div><div class='add'>+		writel(VAL0 | APAD_XMT | REX_RTRY, mmio + CMD2);</div><div class='add'>+	} else {</div><div class='add'>+		writel(VAL0 | APAD_XMT | REX_RTRY | REX_UFLO, mmio + CMD2);</div><div class='ctx'> 		writel((u32)JUMBO, mmio + CMD3);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> #if AMD8111E_VLAN_TAG_USED</div><div class='del'>-	writel((u32) VAL2|VSIZE|VL_TAG_DEL, mmio + CMD3);</div><div class='add'>+	writel((u32)VAL2 | VSIZE | VL_TAG_DEL, mmio + CMD3);</div><div class='ctx'> #endif</div><div class='del'>-	writel( VAL0 | APAD_XMT | REX_RTRY, mmio + CMD2 );</div><div class='add'>+	writel(VAL0 | APAD_XMT | REX_RTRY, mmio + CMD2);</div><div class='ctx'> </div><div class='ctx'> 	/* Setting the MAC address to the device */</div><div class='ctx'> 	for (i = 0; i &lt; ETH_ALEN; i++)</div><div class='del'>-		writeb( dev-&gt;dev_addr[i], mmio + PADR + i );</div><div class='add'>+		writeb(dev-&gt;dev_addr[i], mmio + PADR + i);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable interrupt coalesce */</div><div class='del'>-	if(lp-&gt;options &amp; OPTION_INTR_COAL_ENABLE){</div><div class='add'>+	if (lp-&gt;options &amp; OPTION_INTR_COAL_ENABLE) {</div><div class='ctx'> 		netdev_info(dev, "Interrupt Coalescing Enabled.\n");</div><div class='del'>-		amd8111e_set_coalesce(dev,ENABLE_COAL);</div><div class='add'>+		amd8111e_set_coalesce(dev, ENABLE_COAL);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* set RUN bit to start the chip */</div><div class='hunk'>@@ -508,11 +498,11 @@ static int amd8111e_restart(struct net_device *dev)</div><div class='ctx'> static void amd8111e_init_hw_default(struct amd8111e_priv *lp)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int reg_val;</div><div class='del'>-	unsigned int logic_filter[2] ={0,};</div><div class='add'>+	unsigned int logic_filter[2] = {0,};</div><div class='ctx'> 	void __iomem *mmio = lp-&gt;mmio;</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-        /* stop the chip */</div><div class='add'>+	/* stop the chip */</div><div class='ctx'> 	writel(RUN, mmio + CMD0);</div><div class='ctx'> </div><div class='ctx'> 	/* AUTOPOLL0 Register *//*TBD default value is 8100 in FPS */</div><div class='hunk'>@@ -528,13 +518,13 @@ static void amd8111e_init_hw_default(struct amd8111e_priv *lp)</div><div class='ctx'> 	writel(0, mmio + XMT_RING_BASE_ADDR3);</div><div class='ctx'> </div><div class='ctx'> 	/* Clear CMD0  */</div><div class='del'>-	writel(CMD0_CLEAR,mmio + CMD0);</div><div class='add'>+	writel(CMD0_CLEAR, mmio + CMD0);</div><div class='ctx'> </div><div class='ctx'> 	/* Clear CMD2 */</div><div class='del'>-	writel(CMD2_CLEAR, mmio +CMD2);</div><div class='add'>+	writel(CMD2_CLEAR, mmio + CMD2);</div><div class='ctx'> </div><div class='ctx'> 	/* Clear CMD7 */</div><div class='del'>-	writel(CMD7_CLEAR , mmio + CMD7);</div><div class='add'>+	writel(CMD7_CLEAR, mmio + CMD7);</div><div class='ctx'> </div><div class='ctx'> 	/* Clear DLY_INT_A and DLY_INT_B */</div><div class='ctx'> 	writel(0x0, mmio + DLY_INT_A);</div><div class='hunk'>@@ -551,16 +541,16 @@ static void amd8111e_init_hw_default(struct amd8111e_priv *lp)</div><div class='ctx'> 	writel(0x0, mmio + STVAL);</div><div class='ctx'> </div><div class='ctx'> 	/* Clear INTEN0 */</div><div class='del'>-	writel( INTEN0_CLEAR, mmio + INTEN0);</div><div class='add'>+	writel(INTEN0_CLEAR, mmio + INTEN0);</div><div class='ctx'> </div><div class='ctx'> 	/* Clear LADRF */</div><div class='del'>-	writel(0x0 , mmio + LADRF);</div><div class='add'>+	writel(0x0, mmio + LADRF);</div><div class='ctx'> </div><div class='ctx'> 	/* Set SRAM_SIZE &amp; SRAM_BOUNDARY registers  */</div><div class='del'>-	writel( 0x80010,mmio + SRAM_SIZE);</div><div class='add'>+	writel(0x80010, mmio + SRAM_SIZE);</div><div class='ctx'> </div><div class='ctx'> 	/* Clear RCV_RING0_LEN */</div><div class='del'>-	writel(0x0, mmio +  RCV_RING_LEN0);</div><div class='add'>+	writel(0x0, mmio + RCV_RING_LEN0);</div><div class='ctx'> </div><div class='ctx'> 	/* Clear XMT_RING0/1/2/3_LEN */</div><div class='ctx'> 	writel(0x0, mmio +  XMT_RING_LEN0);</div><div class='hunk'>@@ -580,10 +570,10 @@ static void amd8111e_init_hw_default(struct amd8111e_priv *lp)</div><div class='ctx'> 	/* SRAM_SIZE register */</div><div class='ctx'> 	reg_val = readl(mmio + SRAM_SIZE);</div><div class='ctx'> </div><div class='del'>-	if(lp-&gt;options &amp; OPTION_JUMBO_ENABLE)</div><div class='del'>-		writel( VAL2|JUMBO, mmio + CMD3);</div><div class='add'>+	if (lp-&gt;options &amp; OPTION_JUMBO_ENABLE)</div><div class='add'>+		writel(VAL2 | JUMBO, mmio + CMD3);</div><div class='ctx'> #if AMD8111E_VLAN_TAG_USED</div><div class='del'>-	writel(VAL2|VSIZE|VL_TAG_DEL, mmio + CMD3 );</div><div class='add'>+	writel(VAL2 | VSIZE | VL_TAG_DEL, mmio + CMD3);</div><div class='ctx'> #endif</div><div class='ctx'> 	/* Set default value to CTRL1 Register */</div><div class='ctx'> 	writel(CTRL1_DEFAULT, mmio + CTRL1);</div><div class='hunk'>@@ -625,17 +615,17 @@ static void amd8111e_stop_chip(struct amd8111e_priv *lp)</div><div class='ctx'> static void amd8111e_free_ring(struct amd8111e_priv *lp)</div><div class='ctx'> {</div><div class='ctx'> 	/* Free transmit and receive descriptor rings */</div><div class='del'>-	if(lp-&gt;rx_ring){</div><div class='del'>-		pci_free_consistent(lp-&gt;pci_dev,</div><div class='del'>-			sizeof(struct amd8111e_rx_dr)*NUM_RX_RING_DR,</div><div class='del'>-			lp-&gt;rx_ring, lp-&gt;rx_ring_dma_addr);</div><div class='add'>+	if (lp-&gt;rx_ring) {</div><div class='add'>+		dma_free_coherent(&amp;lp-&gt;pci_dev-&gt;dev,</div><div class='add'>+				  sizeof(struct amd8111e_rx_dr) * NUM_RX_RING_DR,</div><div class='add'>+				  lp-&gt;rx_ring, lp-&gt;rx_ring_dma_addr);</div><div class='ctx'> 		lp-&gt;rx_ring = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if(lp-&gt;tx_ring){</div><div class='del'>-		pci_free_consistent(lp-&gt;pci_dev,</div><div class='del'>-			sizeof(struct amd8111e_tx_dr)*NUM_TX_RING_DR,</div><div class='del'>-			lp-&gt;tx_ring, lp-&gt;tx_ring_dma_addr);</div><div class='add'>+	if (lp-&gt;tx_ring) {</div><div class='add'>+		dma_free_coherent(&amp;lp-&gt;pci_dev-&gt;dev,</div><div class='add'>+				  sizeof(struct amd8111e_tx_dr) * NUM_TX_RING_DR,</div><div class='add'>+				  lp-&gt;tx_ring, lp-&gt;tx_ring_dma_addr);</div><div class='ctx'> </div><div class='ctx'> 		lp-&gt;tx_ring = NULL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -649,24 +639,25 @@ static void amd8111e_free_ring(struct amd8111e_priv *lp)</div><div class='ctx'> static int amd8111e_tx(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct amd8111e_priv *lp = netdev_priv(dev);</div><div class='del'>-	int tx_index = lp-&gt;tx_complete_idx &amp; TX_RING_DR_MOD_MASK;</div><div class='add'>+	int tx_index;</div><div class='ctx'> 	int status;</div><div class='ctx'> 	/* Complete all the transmit packet */</div><div class='del'>-	while (lp-&gt;tx_complete_idx != lp-&gt;tx_idx){</div><div class='add'>+	while (lp-&gt;tx_complete_idx != lp-&gt;tx_idx) {</div><div class='ctx'> 		tx_index =  lp-&gt;tx_complete_idx &amp; TX_RING_DR_MOD_MASK;</div><div class='ctx'> 		status = le16_to_cpu(lp-&gt;tx_ring[tx_index].tx_flags);</div><div class='ctx'> </div><div class='del'>-		if(status &amp; OWN_BIT)</div><div class='add'>+		if (status &amp; OWN_BIT)</div><div class='ctx'> 			break;	/* It still hasn't been Txed */</div><div class='ctx'> </div><div class='ctx'> 		lp-&gt;tx_ring[tx_index].buff_phy_addr = 0;</div><div class='ctx'> </div><div class='ctx'> 		/* We must free the original skb */</div><div class='ctx'> 		if (lp-&gt;tx_skbuff[tx_index]) {</div><div class='del'>-			pci_unmap_single(lp-&gt;pci_dev, lp-&gt;tx_dma_addr[tx_index],</div><div class='del'>-				  	lp-&gt;tx_skbuff[tx_index]-&gt;len,</div><div class='del'>-					PCI_DMA_TODEVICE);</div><div class='del'>-			dev_kfree_skb_irq (lp-&gt;tx_skbuff[tx_index]);</div><div class='add'>+			dma_unmap_single(&amp;lp-&gt;pci_dev-&gt;dev,</div><div class='add'>+					 lp-&gt;tx_dma_addr[tx_index],</div><div class='add'>+					 lp-&gt;tx_skbuff[tx_index]-&gt;len,</div><div class='add'>+					 DMA_TO_DEVICE);</div><div class='add'>+			dev_consume_skb_irq(lp-&gt;tx_skbuff[tx_index]);</div><div class='ctx'> 			lp-&gt;tx_skbuff[tx_index] = NULL;</div><div class='ctx'> 			lp-&gt;tx_dma_addr[tx_index] = 0;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -677,10 +668,10 @@ static int amd8111e_tx(struct net_device *dev)</div><div class='ctx'> 			le16_to_cpu(lp-&gt;tx_ring[tx_index].buff_count);</div><div class='ctx'> </div><div class='ctx'> 		if (netif_queue_stopped(dev) &amp;&amp;</div><div class='del'>-			lp-&gt;tx_complete_idx &gt; lp-&gt;tx_idx - NUM_TX_BUFFERS +2){</div><div class='add'>+			lp-&gt;tx_complete_idx &gt; lp-&gt;tx_idx - NUM_TX_BUFFERS + 2) {</div><div class='ctx'> 			/* The ring is no longer full, clear tbusy. */</div><div class='ctx'> 			/* lp-&gt;tx_full = 0; */</div><div class='del'>-			netif_wake_queue (dev);</div><div class='add'>+			netif_wake_queue(dev);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -693,127 +684,107 @@ static int amd8111e_rx_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 	struct net_device *dev = lp-&gt;amd8111e_net_dev;</div><div class='ctx'> 	int rx_index = lp-&gt;rx_idx &amp; RX_RING_DR_MOD_MASK;</div><div class='ctx'> 	void __iomem *mmio = lp-&gt;mmio;</div><div class='del'>-	struct sk_buff *skb,*new_skb;</div><div class='add'>+	struct sk_buff *skb, *new_skb;</div><div class='ctx'> 	int min_pkt_len, status;</div><div class='del'>-	unsigned int intr0;</div><div class='ctx'> 	int num_rx_pkt = 0;</div><div class='ctx'> 	short pkt_len;</div><div class='ctx'> #if AMD8111E_VLAN_TAG_USED</div><div class='ctx'> 	short vtag;</div><div class='ctx'> #endif</div><div class='del'>-	int rx_pkt_limit = budget;</div><div class='del'>-	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	if (rx_pkt_limit &lt;= 0)</div><div class='del'>-		goto rx_not_empty;</div><div class='add'>+	while (num_rx_pkt &lt; budget) {</div><div class='add'>+		status = le16_to_cpu(lp-&gt;rx_ring[rx_index].rx_flags);</div><div class='add'>+		if (status &amp; OWN_BIT)</div><div class='add'>+			break;</div><div class='ctx'> </div><div class='del'>-	do{</div><div class='del'>-		/* process receive packets until we use the quota.</div><div class='del'>-		 * If we own the next entry, it's a new packet. Send it up.</div><div class='add'>+		/* There is a tricky error noted by John Murphy,</div><div class='add'>+		 * &lt;murf@perftech.com&gt; to Russ Nelson: Even with</div><div class='add'>+		 * full-sized * buffers it's possible for a</div><div class='add'>+		 * jabber packet to use two buffers, with only</div><div class='add'>+		 * the last correctly noting the error.</div><div class='ctx'> 		 */</div><div class='del'>-		while(1) {</div><div class='del'>-			status = le16_to_cpu(lp-&gt;rx_ring[rx_index].rx_flags);</div><div class='del'>-			if (status &amp; OWN_BIT)</div><div class='del'>-				break;</div><div class='del'>-</div><div class='del'>-			/* There is a tricky error noted by John Murphy,</div><div class='del'>-			 * &lt;murf@perftech.com&gt; to Russ Nelson: Even with</div><div class='del'>-			 * full-sized * buffers it's possible for a</div><div class='del'>-			 * jabber packet to use two buffers, with only</div><div class='del'>-			 * the last correctly noting the error.</div><div class='del'>-			 */</div><div class='del'>-			if(status &amp; ERR_BIT) {</div><div class='del'>-				/* resetting flags */</div><div class='del'>-				lp-&gt;rx_ring[rx_index].rx_flags &amp;= RESET_RX_FLAGS;</div><div class='del'>-				goto err_next_pkt;</div><div class='del'>-			}</div><div class='del'>-			/* check for STP and ENP */</div><div class='del'>-			if(!((status &amp; STP_BIT) &amp;&amp; (status &amp; ENP_BIT))){</div><div class='del'>-				/* resetting flags */</div><div class='del'>-				lp-&gt;rx_ring[rx_index].rx_flags &amp;= RESET_RX_FLAGS;</div><div class='del'>-				goto err_next_pkt;</div><div class='del'>-			}</div><div class='del'>-			pkt_len = le16_to_cpu(lp-&gt;rx_ring[rx_index].msg_count) - 4;</div><div class='add'>+		if (status &amp; ERR_BIT) {</div><div class='add'>+			/* resetting flags */</div><div class='add'>+			lp-&gt;rx_ring[rx_index].rx_flags &amp;= RESET_RX_FLAGS;</div><div class='add'>+			goto err_next_pkt;</div><div class='add'>+		}</div><div class='add'>+		/* check for STP and ENP */</div><div class='add'>+		if (!((status &amp; STP_BIT) &amp;&amp; (status &amp; ENP_BIT))) {</div><div class='add'>+			/* resetting flags */</div><div class='add'>+			lp-&gt;rx_ring[rx_index].rx_flags &amp;= RESET_RX_FLAGS;</div><div class='add'>+			goto err_next_pkt;</div><div class='add'>+		}</div><div class='add'>+		pkt_len = le16_to_cpu(lp-&gt;rx_ring[rx_index].msg_count) - 4;</div><div class='ctx'> </div><div class='ctx'> #if AMD8111E_VLAN_TAG_USED</div><div class='del'>-			vtag = status &amp; TT_MASK;</div><div class='del'>-			/*MAC will strip vlan tag*/</div><div class='del'>-			if (vtag != 0)</div><div class='del'>-				min_pkt_len =MIN_PKT_LEN - 4;</div><div class='add'>+		vtag = status &amp; TT_MASK;</div><div class='add'>+		/* MAC will strip vlan tag */</div><div class='add'>+		if (vtag != 0)</div><div class='add'>+			min_pkt_len = MIN_PKT_LEN - 4;</div><div class='ctx'> 			else</div><div class='ctx'> #endif</div><div class='del'>-				min_pkt_len =MIN_PKT_LEN;</div><div class='add'>+			min_pkt_len = MIN_PKT_LEN;</div><div class='ctx'> </div><div class='del'>-			if (pkt_len &lt; min_pkt_len) {</div><div class='del'>-				lp-&gt;rx_ring[rx_index].rx_flags &amp;= RESET_RX_FLAGS;</div><div class='del'>-				lp-&gt;drv_rx_errors++;</div><div class='del'>-				goto err_next_pkt;</div><div class='del'>-			}</div><div class='del'>-			if(--rx_pkt_limit &lt; 0)</div><div class='del'>-				goto rx_not_empty;</div><div class='del'>-			new_skb = netdev_alloc_skb(dev, lp-&gt;rx_buff_len);</div><div class='del'>-			if (!new_skb) {</div><div class='del'>-				/* if allocation fail,</div><div class='del'>-				 * ignore that pkt and go to next one</div><div class='del'>-				 */</div><div class='del'>-				lp-&gt;rx_ring[rx_index].rx_flags &amp;= RESET_RX_FLAGS;</div><div class='del'>-				lp-&gt;drv_rx_errors++;</div><div class='del'>-				goto err_next_pkt;</div><div class='del'>-			}</div><div class='add'>+		if (pkt_len &lt; min_pkt_len) {</div><div class='add'>+			lp-&gt;rx_ring[rx_index].rx_flags &amp;= RESET_RX_FLAGS;</div><div class='add'>+			lp-&gt;drv_rx_errors++;</div><div class='add'>+			goto err_next_pkt;</div><div class='add'>+		}</div><div class='add'>+		new_skb = netdev_alloc_skb(dev, lp-&gt;rx_buff_len);</div><div class='add'>+		if (!new_skb) {</div><div class='add'>+			/* if allocation fail,</div><div class='add'>+			 * ignore that pkt and go to next one</div><div class='add'>+			 */</div><div class='add'>+			lp-&gt;rx_ring[rx_index].rx_flags &amp;= RESET_RX_FLAGS;</div><div class='add'>+			lp-&gt;drv_rx_errors++;</div><div class='add'>+			goto err_next_pkt;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-			skb_reserve(new_skb, 2);</div><div class='del'>-			skb = lp-&gt;rx_skbuff[rx_index];</div><div class='del'>-			pci_unmap_single(lp-&gt;pci_dev,lp-&gt;rx_dma_addr[rx_index],</div><div class='del'>-					 lp-&gt;rx_buff_len-2, PCI_DMA_FROMDEVICE);</div><div class='del'>-			skb_put(skb, pkt_len);</div><div class='del'>-			lp-&gt;rx_skbuff[rx_index] = new_skb;</div><div class='del'>-			lp-&gt;rx_dma_addr[rx_index] = pci_map_single(lp-&gt;pci_dev,</div><div class='del'>-								   new_skb-&gt;data,</div><div class='del'>-								   lp-&gt;rx_buff_len-2,</div><div class='del'>-								   PCI_DMA_FROMDEVICE);</div><div class='add'>+		skb_reserve(new_skb, 2);</div><div class='add'>+		skb = lp-&gt;rx_skbuff[rx_index];</div><div class='add'>+		dma_unmap_single(&amp;lp-&gt;pci_dev-&gt;dev, lp-&gt;rx_dma_addr[rx_index],</div><div class='add'>+				 lp-&gt;rx_buff_len - 2, DMA_FROM_DEVICE);</div><div class='add'>+		skb_put(skb, pkt_len);</div><div class='add'>+		lp-&gt;rx_skbuff[rx_index] = new_skb;</div><div class='add'>+		lp-&gt;rx_dma_addr[rx_index] = dma_map_single(&amp;lp-&gt;pci_dev-&gt;dev,</div><div class='add'>+							   new_skb-&gt;data,</div><div class='add'>+							   lp-&gt;rx_buff_len - 2,</div><div class='add'>+							   DMA_FROM_DEVICE);</div><div class='ctx'> </div><div class='del'>-			skb-&gt;protocol = eth_type_trans(skb, dev);</div><div class='add'>+		skb-&gt;protocol = eth_type_trans(skb, dev);</div><div class='ctx'> </div><div class='ctx'> #if AMD8111E_VLAN_TAG_USED</div><div class='del'>-			if (vtag == TT_VLAN_TAGGED){</div><div class='del'>-				u16 vlan_tag = le16_to_cpu(lp-&gt;rx_ring[rx_index].tag_ctrl_info);</div><div class='del'>-				__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag);</div><div class='del'>-			}</div><div class='del'>-#endif</div><div class='del'>-			netif_receive_skb(skb);</div><div class='del'>-			/*COAL update rx coalescing parameters*/</div><div class='del'>-			lp-&gt;coal_conf.rx_packets++;</div><div class='del'>-			lp-&gt;coal_conf.rx_bytes += pkt_len;</div><div class='del'>-			num_rx_pkt++;</div><div class='del'>-</div><div class='del'>-		err_next_pkt:</div><div class='del'>-			lp-&gt;rx_ring[rx_index].buff_phy_addr</div><div class='del'>-				= cpu_to_le32(lp-&gt;rx_dma_addr[rx_index]);</div><div class='del'>-			lp-&gt;rx_ring[rx_index].buff_count =</div><div class='del'>-				cpu_to_le16(lp-&gt;rx_buff_len-2);</div><div class='del'>-			wmb();</div><div class='del'>-			lp-&gt;rx_ring[rx_index].rx_flags |= cpu_to_le16(OWN_BIT);</div><div class='del'>-			rx_index = (++lp-&gt;rx_idx) &amp; RX_RING_DR_MOD_MASK;</div><div class='add'>+		if (vtag == TT_VLAN_TAGGED) {</div><div class='add'>+			u16 vlan_tag = le16_to_cpu(lp-&gt;rx_ring[rx_index].tag_ctrl_info);</div><div class='add'>+			__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag);</div><div class='ctx'> 		}</div><div class='del'>-		/* Check the interrupt status register for more packets in the</div><div class='del'>-		 * mean time. Process them since we have not used up our quota.</div><div class='del'>-		 */</div><div class='del'>-		intr0 = readl(mmio + INT0);</div><div class='del'>-		/*Ack receive packets */</div><div class='del'>-		writel(intr0 &amp; RINT0,mmio + INT0);</div><div class='add'>+#endif</div><div class='add'>+		napi_gro_receive(napi, skb);</div><div class='add'>+		/* COAL update rx coalescing parameters */</div><div class='add'>+		lp-&gt;coal_conf.rx_packets++;</div><div class='add'>+		lp-&gt;coal_conf.rx_bytes += pkt_len;</div><div class='add'>+		num_rx_pkt++;</div><div class='add'>+</div><div class='add'>+err_next_pkt:</div><div class='add'>+		lp-&gt;rx_ring[rx_index].buff_phy_addr</div><div class='add'>+			= cpu_to_le32(lp-&gt;rx_dma_addr[rx_index]);</div><div class='add'>+		lp-&gt;rx_ring[rx_index].buff_count =</div><div class='add'>+			cpu_to_le16(lp-&gt;rx_buff_len-2);</div><div class='add'>+		wmb();</div><div class='add'>+		lp-&gt;rx_ring[rx_index].rx_flags |= cpu_to_le16(OWN_BIT);</div><div class='add'>+		rx_index = (++lp-&gt;rx_idx) &amp; RX_RING_DR_MOD_MASK;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	} while(intr0 &amp; RINT0);</div><div class='add'>+	if (num_rx_pkt &lt; budget &amp;&amp; napi_complete_done(napi, num_rx_pkt)) {</div><div class='add'>+		unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	if (rx_pkt_limit &gt; 0) {</div><div class='ctx'> 		/* Receive descriptor is empty now */</div><div class='ctx'> 		spin_lock_irqsave(&amp;lp-&gt;lock, flags);</div><div class='del'>-		__napi_complete(napi);</div><div class='ctx'> 		writel(VAL0|RINTEN0, mmio + INTEN0);</div><div class='ctx'> 		writel(VAL2 | RDMD0, mmio + CMD0);</div><div class='ctx'> 		spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-rx_not_empty:</div><div class='ctx'> 	return num_rx_pkt;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -821,25 +792,25 @@ rx_not_empty:</div><div class='ctx'> static int amd8111e_link_change(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct amd8111e_priv *lp = netdev_priv(dev);</div><div class='del'>-	int status0,speed;</div><div class='add'>+	int status0, speed;</div><div class='ctx'> </div><div class='ctx'> 	/* read the link change */</div><div class='del'>-     	status0 = readl(lp-&gt;mmio + STAT0);</div><div class='add'>+	status0 = readl(lp-&gt;mmio + STAT0);</div><div class='ctx'> </div><div class='del'>-	if(status0 &amp; LINK_STATS){</div><div class='del'>-		if(status0 &amp; AUTONEG_COMPLETE)</div><div class='add'>+	if (status0 &amp; LINK_STATS) {</div><div class='add'>+		if (status0 &amp; AUTONEG_COMPLETE)</div><div class='ctx'> 			lp-&gt;link_config.autoneg = AUTONEG_ENABLE;</div><div class='ctx'> 		else</div><div class='ctx'> 			lp-&gt;link_config.autoneg = AUTONEG_DISABLE;</div><div class='ctx'> </div><div class='del'>-		if(status0 &amp; FULL_DPLX)</div><div class='add'>+		if (status0 &amp; FULL_DPLX)</div><div class='ctx'> 			lp-&gt;link_config.duplex = DUPLEX_FULL;</div><div class='ctx'> 		else</div><div class='ctx'> 			lp-&gt;link_config.duplex = DUPLEX_HALF;</div><div class='ctx'> 		speed = (status0 &amp; SPEED_MASK) &gt;&gt; 7;</div><div class='del'>-		if(speed == PHY_SPEED_10)</div><div class='add'>+		if (speed == PHY_SPEED_10)</div><div class='ctx'> 			lp-&gt;link_config.speed = SPEED_10;</div><div class='del'>-		else if(speed == PHY_SPEED_100)</div><div class='add'>+		else if (speed == PHY_SPEED_100)</div><div class='ctx'> 			lp-&gt;link_config.speed = SPEED_100;</div><div class='ctx'> </div><div class='ctx'> 		netdev_info(dev, "Link is Up. Speed is %s Mbps %s Duplex\n",</div><div class='hunk'>@@ -849,8 +820,7 @@ static int amd8111e_link_change(struct net_device *dev)</div><div class='ctx'> 							"Full" : "Half");</div><div class='ctx'> </div><div class='ctx'> 		netif_carrier_on(dev);</div><div class='del'>-	}</div><div class='del'>-	else{</div><div class='add'>+	} else {</div><div class='ctx'> 		lp-&gt;link_config.speed = SPEED_INVALID;</div><div class='ctx'> 		lp-&gt;link_config.duplex = DUPLEX_INVALID;</div><div class='ctx'> 		lp-&gt;link_config.autoneg = AUTONEG_INVALID;</div><div class='hunk'>@@ -868,7 +838,7 @@ static int amd8111e_read_mib(void __iomem *mmio, u8 MIB_COUNTER)</div><div class='ctx'> 	unsigned  int data;</div><div class='ctx'> 	unsigned int repeat = REPEAT_CNT;</div><div class='ctx'> </div><div class='del'>-	writew( MIB_RD_CMD | MIB_COUNTER, mmio + MIB_ADDR);</div><div class='add'>+	writew(MIB_RD_CMD | MIB_COUNTER, mmio + MIB_ADDR);</div><div class='ctx'> 	do {</div><div class='ctx'> 		status = readw(mmio + MIB_ADDR);</div><div class='ctx'> 		udelay(2);	/* controller takes MAX 2 us to get mib data */</div><div class='hunk'>@@ -891,7 +861,7 @@ static struct net_device_stats *amd8111e_get_stats(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	if (!lp-&gt;opened)</div><div class='ctx'> 		return new_stats;</div><div class='del'>-	spin_lock_irqsave (&amp;lp-&gt;lock, flags);</div><div class='add'>+	spin_lock_irqsave(&amp;lp-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	/* stats.rx_packets */</div><div class='ctx'> 	new_stats-&gt;rx_packets = amd8111e_read_mib(mmio, rcv_broadcast_pkts)+</div><div class='hunk'>@@ -971,7 +941,7 @@ static struct net_device_stats *amd8111e_get_stats(struct net_device *dev)</div><div class='ctx'> 	/* Reset the mibs for collecting new statistics */</div><div class='ctx'> 	/* writew(MIB_CLEAR, mmio + MIB_ADDR);*/</div><div class='ctx'> </div><div class='del'>-	spin_unlock_irqrestore (&amp;lp-&gt;lock, flags);</div><div class='add'>+	spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	return new_stats;</div><div class='ctx'> }</div><div class='hunk'>@@ -1002,108 +972,98 @@ static int amd8111e_calc_coalesce(struct net_device *dev)</div><div class='ctx'> 	rx_data_rate = coal_conf-&gt;rx_bytes - coal_conf-&gt;rx_prev_bytes;</div><div class='ctx'> 	coal_conf-&gt;rx_prev_bytes =  coal_conf-&gt;rx_bytes;</div><div class='ctx'> </div><div class='del'>-	if(rx_pkt_rate &lt; 800){</div><div class='del'>-		if(coal_conf-&gt;rx_coal_type != NO_COALESCE){</div><div class='add'>+	if (rx_pkt_rate &lt; 800) {</div><div class='add'>+		if (coal_conf-&gt;rx_coal_type != NO_COALESCE) {</div><div class='ctx'> </div><div class='ctx'> 			coal_conf-&gt;rx_timeout = 0x0;</div><div class='ctx'> 			coal_conf-&gt;rx_event_count = 0;</div><div class='del'>-			amd8111e_set_coalesce(dev,RX_INTR_COAL);</div><div class='add'>+			amd8111e_set_coalesce(dev, RX_INTR_COAL);</div><div class='ctx'> 			coal_conf-&gt;rx_coal_type = NO_COALESCE;</div><div class='ctx'> 		}</div><div class='del'>-	}</div><div class='del'>-	else{</div><div class='add'>+	} else {</div><div class='ctx'> </div><div class='ctx'> 		rx_pkt_size = rx_data_rate/rx_pkt_rate;</div><div class='del'>-		if (rx_pkt_size &lt; 128){</div><div class='del'>-			if(coal_conf-&gt;rx_coal_type != NO_COALESCE){</div><div class='add'>+		if (rx_pkt_size &lt; 128) {</div><div class='add'>+			if (coal_conf-&gt;rx_coal_type != NO_COALESCE) {</div><div class='ctx'> </div><div class='ctx'> 				coal_conf-&gt;rx_timeout = 0;</div><div class='ctx'> 				coal_conf-&gt;rx_event_count = 0;</div><div class='del'>-				amd8111e_set_coalesce(dev,RX_INTR_COAL);</div><div class='add'>+				amd8111e_set_coalesce(dev, RX_INTR_COAL);</div><div class='ctx'> 				coal_conf-&gt;rx_coal_type = NO_COALESCE;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-		}</div><div class='del'>-		else if ( (rx_pkt_size &gt;= 128) &amp;&amp; (rx_pkt_size &lt; 512) ){</div><div class='add'>+		} else if ((rx_pkt_size &gt;= 128) &amp;&amp; (rx_pkt_size &lt; 512)) {</div><div class='ctx'> </div><div class='del'>-			if(coal_conf-&gt;rx_coal_type !=  LOW_COALESCE){</div><div class='add'>+			if (coal_conf-&gt;rx_coal_type !=  LOW_COALESCE) {</div><div class='ctx'> 				coal_conf-&gt;rx_timeout = 1;</div><div class='ctx'> 				coal_conf-&gt;rx_event_count = 4;</div><div class='del'>-				amd8111e_set_coalesce(dev,RX_INTR_COAL);</div><div class='add'>+				amd8111e_set_coalesce(dev, RX_INTR_COAL);</div><div class='ctx'> 				coal_conf-&gt;rx_coal_type = LOW_COALESCE;</div><div class='ctx'> 			}</div><div class='del'>-		}</div><div class='del'>-		else if ((rx_pkt_size &gt;= 512) &amp;&amp; (rx_pkt_size &lt; 1024)){</div><div class='add'>+		} else if ((rx_pkt_size &gt;= 512) &amp;&amp; (rx_pkt_size &lt; 1024)) {</div><div class='ctx'> </div><div class='del'>-			if(coal_conf-&gt;rx_coal_type !=  MEDIUM_COALESCE){</div><div class='add'>+			if (coal_conf-&gt;rx_coal_type != MEDIUM_COALESCE) {</div><div class='ctx'> 				coal_conf-&gt;rx_timeout = 1;</div><div class='ctx'> 				coal_conf-&gt;rx_event_count = 4;</div><div class='del'>-				amd8111e_set_coalesce(dev,RX_INTR_COAL);</div><div class='add'>+				amd8111e_set_coalesce(dev, RX_INTR_COAL);</div><div class='ctx'> 				coal_conf-&gt;rx_coal_type = MEDIUM_COALESCE;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-		}</div><div class='del'>-		else if(rx_pkt_size &gt;= 1024){</div><div class='del'>-			if(coal_conf-&gt;rx_coal_type !=  HIGH_COALESCE){</div><div class='add'>+		} else if (rx_pkt_size &gt;= 1024) {</div><div class='add'>+</div><div class='add'>+			if (coal_conf-&gt;rx_coal_type !=  HIGH_COALESCE) {</div><div class='ctx'> 				coal_conf-&gt;rx_timeout = 2;</div><div class='ctx'> 				coal_conf-&gt;rx_event_count = 3;</div><div class='del'>-				amd8111e_set_coalesce(dev,RX_INTR_COAL);</div><div class='add'>+				amd8111e_set_coalesce(dev, RX_INTR_COAL);</div><div class='ctx'> 				coal_conf-&gt;rx_coal_type = HIGH_COALESCE;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-    	/* NOW FOR TX INTR COALESC */</div><div class='del'>-	if(tx_pkt_rate &lt; 800){</div><div class='del'>-		if(coal_conf-&gt;tx_coal_type != NO_COALESCE){</div><div class='add'>+	/* NOW FOR TX INTR COALESC */</div><div class='add'>+	if (tx_pkt_rate &lt; 800) {</div><div class='add'>+		if (coal_conf-&gt;tx_coal_type != NO_COALESCE) {</div><div class='ctx'> </div><div class='ctx'> 			coal_conf-&gt;tx_timeout = 0x0;</div><div class='ctx'> 			coal_conf-&gt;tx_event_count = 0;</div><div class='del'>-			amd8111e_set_coalesce(dev,TX_INTR_COAL);</div><div class='add'>+			amd8111e_set_coalesce(dev, TX_INTR_COAL);</div><div class='ctx'> 			coal_conf-&gt;tx_coal_type = NO_COALESCE;</div><div class='ctx'> 		}</div><div class='del'>-	}</div><div class='del'>-	else{</div><div class='add'>+	} else {</div><div class='ctx'> </div><div class='ctx'> 		tx_pkt_size = tx_data_rate/tx_pkt_rate;</div><div class='del'>-		if (tx_pkt_size &lt; 128){</div><div class='add'>+		if (tx_pkt_size &lt; 128) {</div><div class='ctx'> </div><div class='del'>-			if(coal_conf-&gt;tx_coal_type != NO_COALESCE){</div><div class='add'>+			if (coal_conf-&gt;tx_coal_type != NO_COALESCE) {</div><div class='ctx'> </div><div class='ctx'> 				coal_conf-&gt;tx_timeout = 0;</div><div class='ctx'> 				coal_conf-&gt;tx_event_count = 0;</div><div class='del'>-				amd8111e_set_coalesce(dev,TX_INTR_COAL);</div><div class='add'>+				amd8111e_set_coalesce(dev, TX_INTR_COAL);</div><div class='ctx'> 				coal_conf-&gt;tx_coal_type = NO_COALESCE;</div><div class='ctx'> 			}</div><div class='ctx'> </div><div class='del'>-		}</div><div class='del'>-		else if ( (tx_pkt_size &gt;= 128) &amp;&amp; (tx_pkt_size &lt; 512) ){</div><div class='add'>+		} else if ((tx_pkt_size &gt;= 128) &amp;&amp; (tx_pkt_size &lt; 512)) {</div><div class='ctx'> </div><div class='del'>-			if(coal_conf-&gt;tx_coal_type !=  LOW_COALESCE){</div><div class='add'>+			if (coal_conf-&gt;tx_coal_type != LOW_COALESCE) {</div><div class='ctx'> 				coal_conf-&gt;tx_timeout = 1;</div><div class='ctx'> 				coal_conf-&gt;tx_event_count = 2;</div><div class='del'>-				amd8111e_set_coalesce(dev,TX_INTR_COAL);</div><div class='add'>+				amd8111e_set_coalesce(dev, TX_INTR_COAL);</div><div class='ctx'> 				coal_conf-&gt;tx_coal_type = LOW_COALESCE;</div><div class='ctx'> </div><div class='ctx'> 			}</div><div class='del'>-		}</div><div class='del'>-		else if ((tx_pkt_size &gt;= 512) &amp;&amp; (tx_pkt_size &lt; 1024)){</div><div class='add'>+		} else if ((tx_pkt_size &gt;= 512) &amp;&amp; (tx_pkt_size &lt; 1024)) {</div><div class='ctx'> </div><div class='del'>-			if(coal_conf-&gt;tx_coal_type !=  MEDIUM_COALESCE){</div><div class='add'>+			if (coal_conf-&gt;tx_coal_type != MEDIUM_COALESCE) {</div><div class='ctx'> 				coal_conf-&gt;tx_timeout = 2;</div><div class='ctx'> 				coal_conf-&gt;tx_event_count = 5;</div><div class='del'>-				amd8111e_set_coalesce(dev,TX_INTR_COAL);</div><div class='add'>+				amd8111e_set_coalesce(dev, TX_INTR_COAL);</div><div class='ctx'> 				coal_conf-&gt;tx_coal_type = MEDIUM_COALESCE;</div><div class='ctx'> 			}</div><div class='del'>-</div><div class='del'>-		}</div><div class='del'>-		else if(tx_pkt_size &gt;= 1024){</div><div class='del'>-			if (tx_pkt_size &gt;= 1024){</div><div class='del'>-				if(coal_conf-&gt;tx_coal_type !=  HIGH_COALESCE){</div><div class='del'>-					coal_conf-&gt;tx_timeout = 4;</div><div class='del'>-					coal_conf-&gt;tx_event_count = 8;</div><div class='del'>-					amd8111e_set_coalesce(dev,TX_INTR_COAL);</div><div class='del'>-					coal_conf-&gt;tx_coal_type = HIGH_COALESCE;</div><div class='del'>-				}</div><div class='add'>+		} else if (tx_pkt_size &gt;= 1024) {</div><div class='add'>+			if (coal_conf-&gt;tx_coal_type != HIGH_COALESCE) {</div><div class='add'>+				coal_conf-&gt;tx_timeout = 4;</div><div class='add'>+				coal_conf-&gt;tx_event_count = 8;</div><div class='add'>+				amd8111e_set_coalesce(dev, TX_INTR_COAL);</div><div class='add'>+				coal_conf-&gt;tx_coal_type = HIGH_COALESCE;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1123,7 +1083,7 @@ static irqreturn_t amd8111e_interrupt(int irq, void *dev_id)</div><div class='ctx'> 	unsigned int intr0, intren0;</div><div class='ctx'> 	unsigned int handled = 1;</div><div class='ctx'> </div><div class='del'>-	if(unlikely(dev == NULL))</div><div class='add'>+	if (unlikely(!dev))</div><div class='ctx'> 		return IRQ_NONE;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock(&amp;lp-&gt;lock);</div><div class='hunk'>@@ -1137,7 +1097,7 @@ static irqreturn_t amd8111e_interrupt(int irq, void *dev_id)</div><div class='ctx'> </div><div class='ctx'> 	/* Process all the INT event until INTR bit is clear. */</div><div class='ctx'> </div><div class='del'>-	if (!(intr0 &amp; INTR)){</div><div class='add'>+	if (!(intr0 &amp; INTR)) {</div><div class='ctx'> 		handled = 0;</div><div class='ctx'> 		goto err_no_interrupt;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1148,7 +1108,7 @@ static irqreturn_t amd8111e_interrupt(int irq, void *dev_id)</div><div class='ctx'> 	/* Check if Receive Interrupt has occurred. */</div><div class='ctx'> 	if (intr0 &amp; RINT0) {</div><div class='ctx'> 		if (napi_schedule_prep(&amp;lp-&gt;napi)) {</div><div class='del'>-			/* Disable receive interupts */</div><div class='add'>+			/* Disable receive interrupts */</div><div class='ctx'> 			writel(RINTEN0, mmio + INTEN0);</div><div class='ctx'> 			/* Schedule a polling routine */</div><div class='ctx'> 			__napi_schedule(&amp;lp-&gt;napi);</div><div class='hunk'>@@ -1172,7 +1132,7 @@ static irqreturn_t amd8111e_interrupt(int irq, void *dev_id)</div><div class='ctx'> 		amd8111e_calc_coalesce(dev);</div><div class='ctx'> </div><div class='ctx'> err_no_interrupt:</div><div class='del'>-	writel( VAL0 | INTREN,mmio + CMD0);</div><div class='add'>+	writel(VAL0 | INTREN, mmio + CMD0);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock(&amp;lp-&gt;lock);</div><div class='ctx'> </div><div class='hunk'>@@ -1212,8 +1172,8 @@ static int amd8111e_close(struct net_device *dev)</div><div class='ctx'> 	netif_carrier_off(lp-&gt;amd8111e_net_dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Delete ipg timer */</div><div class='del'>-	if(lp-&gt;options &amp; OPTION_DYN_IPG_ENABLE)</div><div class='del'>-		del_timer_sync(&amp;lp-&gt;ipg_data.ipg_timer);</div><div class='add'>+	if (lp-&gt;options &amp; OPTION_DYN_IPG_ENABLE)</div><div class='add'>+		timer_delete_sync(&amp;lp-&gt;ipg_data.ipg_timer);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irq(&amp;lp-&gt;lock);</div><div class='ctx'> 	free_irq(dev-&gt;irq, dev);</div><div class='hunk'>@@ -1232,8 +1192,8 @@ static int amd8111e_open(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct amd8111e_priv *lp = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	if(dev-&gt;irq ==0 || request_irq(dev-&gt;irq, amd8111e_interrupt, IRQF_SHARED,</div><div class='del'>-					 dev-&gt;name, dev))</div><div class='add'>+	if (dev-&gt;irq == 0 || request_irq(dev-&gt;irq, amd8111e_interrupt,</div><div class='add'>+					 IRQF_SHARED, dev-&gt;name, dev))</div><div class='ctx'> 		return -EAGAIN;</div><div class='ctx'> </div><div class='ctx'> 	napi_enable(&amp;lp-&gt;napi);</div><div class='hunk'>@@ -1242,7 +1202,7 @@ static int amd8111e_open(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	amd8111e_init_hw_default(lp);</div><div class='ctx'> </div><div class='del'>-	if(amd8111e_restart(dev)){</div><div class='add'>+	if (amd8111e_restart(dev)) {</div><div class='ctx'> 		spin_unlock_irq(&amp;lp-&gt;lock);</div><div class='ctx'> 		napi_disable(&amp;lp-&gt;napi);</div><div class='ctx'> 		if (dev-&gt;irq)</div><div class='hunk'>@@ -1250,7 +1210,7 @@ static int amd8111e_open(struct net_device *dev)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> 	/* Start ipg timer */</div><div class='del'>-	if(lp-&gt;options &amp; OPTION_DYN_IPG_ENABLE){</div><div class='add'>+	if (lp-&gt;options &amp; OPTION_DYN_IPG_ENABLE) {</div><div class='ctx'> 		add_timer(&amp;lp-&gt;ipg_data.ipg_timer);</div><div class='ctx'> 		netdev_info(dev, "Dynamic IPG Enabled\n");</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1308,7 +1268,8 @@ static netdev_tx_t amd8111e_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 	}</div><div class='ctx'> #endif</div><div class='ctx'> 	lp-&gt;tx_dma_addr[tx_index] =</div><div class='del'>-	    pci_map_single(lp-&gt;pci_dev, skb-&gt;data, skb-&gt;len, PCI_DMA_TODEVICE);</div><div class='add'>+	    dma_map_single(&amp;lp-&gt;pci_dev-&gt;dev, skb-&gt;data, skb-&gt;len,</div><div class='add'>+			   DMA_TO_DEVICE);</div><div class='ctx'> 	lp-&gt;tx_ring[tx_index].buff_phy_addr =</div><div class='ctx'> 	    cpu_to_le32(lp-&gt;tx_dma_addr[tx_index]);</div><div class='ctx'> </div><div class='hunk'>@@ -1320,10 +1281,10 @@ static netdev_tx_t amd8111e_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 	lp-&gt;tx_idx++;</div><div class='ctx'> </div><div class='ctx'> 	/* Trigger an immediate send poll. */</div><div class='del'>-	writel( VAL1 | TDMD0, lp-&gt;mmio + CMD0);</div><div class='del'>-	writel( VAL2 | RDMD0,lp-&gt;mmio + CMD0);</div><div class='add'>+	writel(VAL1 | TDMD0, lp-&gt;mmio + CMD0);</div><div class='add'>+	writel(VAL2 | RDMD0, lp-&gt;mmio + CMD0);</div><div class='ctx'> </div><div class='del'>-	if(amd8111e_tx_queue_avail(lp) &lt; 0){</div><div class='add'>+	if (amd8111e_tx_queue_avail(lp) &lt; 0) {</div><div class='ctx'> 		netif_stop_queue(dev);</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);</div><div class='hunk'>@@ -1357,15 +1318,15 @@ static void amd8111e_set_multicast_list(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct netdev_hw_addr *ha;</div><div class='ctx'> 	struct amd8111e_priv *lp = netdev_priv(dev);</div><div class='del'>-	u32 mc_filter[2] ;</div><div class='add'>+	u32 mc_filter[2];</div><div class='ctx'> 	int bit_num;</div><div class='ctx'> </div><div class='del'>-	if(dev-&gt;flags &amp; IFF_PROMISC){</div><div class='del'>-		writel( VAL2 | PROM, lp-&gt;mmio + CMD2);</div><div class='add'>+	if (dev-&gt;flags &amp; IFF_PROMISC) {</div><div class='add'>+		writel(VAL2 | PROM, lp-&gt;mmio + CMD2);</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	else</div><div class='del'>-		writel( PROM, lp-&gt;mmio + CMD2);</div><div class='add'>+		writel(PROM, lp-&gt;mmio + CMD2);</div><div class='ctx'> 	if (dev-&gt;flags &amp; IFF_ALLMULTI ||</div><div class='ctx'> 	    netdev_mc_count(dev) &gt; MAX_FILTER_SIZE) {</div><div class='ctx'> 		/* get all multicast packet */</div><div class='hunk'>@@ -1402,11 +1363,10 @@ static void amd8111e_get_drvinfo(struct net_device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct amd8111e_priv *lp = netdev_priv(dev);</div><div class='ctx'> 	struct pci_dev *pci_dev = lp-&gt;pci_dev;</div><div class='del'>-	strlcpy(info-&gt;driver, MODULE_NAME, sizeof(info-&gt;driver));</div><div class='del'>-	strlcpy(info-&gt;version, MODULE_VERS, sizeof(info-&gt;version));</div><div class='add'>+	strscpy(info-&gt;driver, MODULE_NAME, sizeof(info-&gt;driver));</div><div class='ctx'> 	snprintf(info-&gt;fw_version, sizeof(info-&gt;fw_version),</div><div class='ctx'> 		"%u", chip_version);</div><div class='del'>-	strlcpy(info-&gt;bus_info, pci_name(pci_dev), sizeof(info-&gt;bus_info));</div><div class='add'>+	strscpy(info-&gt;bus_info, pci_name(pci_dev), sizeof(info-&gt;bus_info));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int amd8111e_get_regs_len(struct net_device *dev)</div><div class='hunk'>@@ -1421,21 +1381,23 @@ static void amd8111e_get_regs(struct net_device *dev, struct ethtool_regs *regs,</div><div class='ctx'> 	amd8111e_read_regs(lp, buf);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int amd8111e_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)</div><div class='add'>+static int amd8111e_get_link_ksettings(struct net_device *dev,</div><div class='add'>+				       struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct amd8111e_priv *lp = netdev_priv(dev);</div><div class='ctx'> 	spin_lock_irq(&amp;lp-&gt;lock);</div><div class='del'>-	mii_ethtool_gset(&amp;lp-&gt;mii_if, ecmd);</div><div class='add'>+	mii_ethtool_get_link_ksettings(&amp;lp-&gt;mii_if, cmd);</div><div class='ctx'> 	spin_unlock_irq(&amp;lp-&gt;lock);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int amd8111e_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)</div><div class='add'>+static int amd8111e_set_link_ksettings(struct net_device *dev,</div><div class='add'>+				       const struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct amd8111e_priv *lp = netdev_priv(dev);</div><div class='ctx'> 	int res;</div><div class='ctx'> 	spin_lock_irq(&amp;lp-&gt;lock);</div><div class='del'>-	res = mii_ethtool_sset(&amp;lp-&gt;mii_if, ecmd);</div><div class='add'>+	res = mii_ethtool_set_link_ksettings(&amp;lp-&gt;mii_if, cmd);</div><div class='ctx'> 	spin_unlock_irq(&amp;lp-&gt;lock);</div><div class='ctx'> 	return res;</div><div class='ctx'> }</div><div class='hunk'>@@ -1469,7 +1431,7 @@ static int amd8111e_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol_</div><div class='ctx'> 	if (wol_info-&gt;wolopts &amp; WAKE_MAGIC)</div><div class='ctx'> 		lp-&gt;options |=</div><div class='ctx'> 			(OPTION_WOL_ENABLE | OPTION_WAKE_MAGIC_ENABLE);</div><div class='del'>-	else if(wol_info-&gt;wolopts &amp; WAKE_PHY)</div><div class='add'>+	else if (wol_info-&gt;wolopts &amp; WAKE_PHY)</div><div class='ctx'> 		lp-&gt;options |=</div><div class='ctx'> 			(OPTION_WOL_ENABLE | OPTION_WAKE_PHY_ENABLE);</div><div class='ctx'> 	else</div><div class='hunk'>@@ -1482,30 +1444,30 @@ static const struct ethtool_ops ops = {</div><div class='ctx'> 	.get_drvinfo = amd8111e_get_drvinfo,</div><div class='ctx'> 	.get_regs_len = amd8111e_get_regs_len,</div><div class='ctx'> 	.get_regs = amd8111e_get_regs,</div><div class='del'>-	.get_settings = amd8111e_get_settings,</div><div class='del'>-	.set_settings = amd8111e_set_settings,</div><div class='ctx'> 	.nway_reset = amd8111e_nway_reset,</div><div class='ctx'> 	.get_link = amd8111e_get_link,</div><div class='ctx'> 	.get_wol = amd8111e_get_wol,</div><div class='ctx'> 	.set_wol = amd8111e_set_wol,</div><div class='add'>+	.get_link_ksettings = amd8111e_get_link_ksettings,</div><div class='add'>+	.set_link_ksettings = amd8111e_set_link_ksettings,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* This function handles all the  ethtool ioctls. It gives driver info,</div><div class='ctx'>  * gets/sets driver speed, gets memory mapped register values, forces</div><div class='ctx'>  * auto negotiation, sets/gets WOL options for ethtool application.</div><div class='ctx'>  */</div><div class='del'>-static int amd8111e_ioctl(struct net_device *dev , struct ifreq *ifr, int cmd)</div><div class='add'>+static int amd8111e_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct mii_ioctl_data *data = if_mii(ifr);</div><div class='ctx'> 	struct amd8111e_priv *lp = netdev_priv(dev);</div><div class='ctx'> 	int err;</div><div class='ctx'> 	u32 mii_regval;</div><div class='ctx'> </div><div class='del'>-	switch(cmd) {</div><div class='add'>+	switch (cmd) {</div><div class='ctx'> 	case SIOCGMIIPHY:</div><div class='ctx'> 		data-&gt;phy_id = lp-&gt;ext_phy_addr;</div><div class='ctx'> </div><div class='del'>-	/* fallthru */</div><div class='add'>+		fallthrough;</div><div class='ctx'> 	case SIOCGMIIREG:</div><div class='ctx'> </div><div class='ctx'> 		spin_lock_irq(&amp;lp-&gt;lock);</div><div class='hunk'>@@ -1537,11 +1499,11 @@ static int amd8111e_set_mac_address(struct net_device *dev, void *p)</div><div class='ctx'> 	int i;</div><div class='ctx'> 	struct sockaddr *addr = p;</div><div class='ctx'> </div><div class='del'>-	memcpy(dev-&gt;dev_addr, addr-&gt;sa_data, dev-&gt;addr_len);</div><div class='add'>+	eth_hw_addr_set(dev, addr-&gt;sa_data);</div><div class='ctx'> 	spin_lock_irq(&amp;lp-&gt;lock);</div><div class='ctx'> 	/* Setting the MAC address to the device */</div><div class='ctx'> 	for (i = 0; i &lt; ETH_ALEN; i++)</div><div class='del'>-		writeb( dev-&gt;dev_addr[i], lp-&gt;mmio + PADR + i );</div><div class='add'>+		writeb(dev-&gt;dev_addr[i], lp-&gt;mmio + PADR + i);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irq(&amp;lp-&gt;lock);</div><div class='ctx'> </div><div class='hunk'>@@ -1556,35 +1518,32 @@ static int amd8111e_change_mtu(struct net_device *dev, int new_mtu)</div><div class='ctx'> 	struct amd8111e_priv *lp = netdev_priv(dev);</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if ((new_mtu &lt; AMD8111E_MIN_MTU) || (new_mtu &gt; AMD8111E_MAX_MTU))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='ctx'> 	if (!netif_running(dev)) {</div><div class='ctx'> 		/* new_mtu will be used</div><div class='del'>-		 * when device starts netxt time</div><div class='add'>+		 * when device starts next time</div><div class='ctx'> 		 */</div><div class='del'>-		dev-&gt;mtu = new_mtu;</div><div class='add'>+		WRITE_ONCE(dev-&gt;mtu, new_mtu);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irq(&amp;lp-&gt;lock);</div><div class='ctx'> </div><div class='del'>-        /* stop the chip */</div><div class='add'>+	/* stop the chip */</div><div class='ctx'> 	writel(RUN, lp-&gt;mmio + CMD0);</div><div class='ctx'> </div><div class='del'>-	dev-&gt;mtu = new_mtu;</div><div class='add'>+	WRITE_ONCE(dev-&gt;mtu, new_mtu);</div><div class='ctx'> </div><div class='ctx'> 	err = amd8111e_restart(dev);</div><div class='ctx'> 	spin_unlock_irq(&amp;lp-&gt;lock);</div><div class='del'>-	if(!err)</div><div class='add'>+	if (!err)</div><div class='ctx'> 		netif_start_queue(dev);</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int amd8111e_enable_magicpkt(struct amd8111e_priv *lp)</div><div class='ctx'> {</div><div class='del'>-	writel( VAL1|MPPLBA, lp-&gt;mmio + CMD3);</div><div class='del'>-	writel( VAL0|MPEN_SW, lp-&gt;mmio + CMD7);</div><div class='add'>+	writel(VAL1 | MPPLBA, lp-&gt;mmio + CMD3);</div><div class='add'>+	writel(VAL0 | MPEN_SW, lp-&gt;mmio + CMD7);</div><div class='ctx'> </div><div class='ctx'> 	/* To eliminate PCI posting bug */</div><div class='ctx'> 	readl(lp-&gt;mmio + CMD7);</div><div class='hunk'>@@ -1594,8 +1553,8 @@ static int amd8111e_enable_magicpkt(struct amd8111e_priv *lp)</div><div class='ctx'> static int amd8111e_enable_link_change(struct amd8111e_priv *lp)</div><div class='ctx'> {</div><div class='ctx'> </div><div class='del'>-	/* Adapter is already stoped/suspended/interrupt-disabled */</div><div class='del'>-	writel(VAL0|LCMODE_SW,lp-&gt;mmio + CMD7);</div><div class='add'>+	/* Adapter is already stopped/suspended/interrupt-disabled */</div><div class='add'>+	writel(VAL0 | LCMODE_SW, lp-&gt;mmio + CMD7);</div><div class='ctx'> </div><div class='ctx'> 	/* To eliminate PCI posting bug */</div><div class='ctx'> 	readl(lp-&gt;mmio + CMD7);</div><div class='hunk'>@@ -1607,7 +1566,7 @@ static int amd8111e_enable_link_change(struct amd8111e_priv *lp)</div><div class='ctx'>  * failed or the interface is locked up. This function will reinitialize</div><div class='ctx'>  * the hardware.</div><div class='ctx'>  */</div><div class='del'>-static void amd8111e_tx_timeout(struct net_device *dev)</div><div class='add'>+static void amd8111e_tx_timeout(struct net_device *dev, unsigned int txqueue)</div><div class='ctx'> {</div><div class='ctx'> 	struct amd8111e_priv *lp = netdev_priv(dev);</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -1617,12 +1576,13 @@ static void amd8111e_tx_timeout(struct net_device *dev)</div><div class='ctx'> 	spin_lock_irq(&amp;lp-&gt;lock);</div><div class='ctx'> 	err = amd8111e_restart(dev);</div><div class='ctx'> 	spin_unlock_irq(&amp;lp-&gt;lock);</div><div class='del'>-	if(!err)</div><div class='add'>+	if (!err)</div><div class='ctx'> 		netif_wake_queue(dev);</div><div class='ctx'> }</div><div class='del'>-static int amd8111e_suspend(struct pci_dev *pci_dev, pm_message_t state)</div><div class='add'>+</div><div class='add'>+static int __maybe_unused amd8111e_suspend(struct device *dev_d)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *dev = pci_get_drvdata(pci_dev);</div><div class='add'>+	struct net_device *dev = dev_get_drvdata(dev_d);</div><div class='ctx'> 	struct amd8111e_priv *lp = netdev_priv(dev);</div><div class='ctx'> </div><div class='ctx'> 	if (!netif_running(dev))</div><div class='hunk'>@@ -1637,52 +1597,41 @@ static int amd8111e_suspend(struct pci_dev *pci_dev, pm_message_t state)</div><div class='ctx'> </div><div class='ctx'> 	/* stop chip */</div><div class='ctx'> 	spin_lock_irq(&amp;lp-&gt;lock);</div><div class='del'>-	if(lp-&gt;options &amp; OPTION_DYN_IPG_ENABLE)</div><div class='del'>-		del_timer_sync(&amp;lp-&gt;ipg_data.ipg_timer);</div><div class='add'>+	if (lp-&gt;options &amp; OPTION_DYN_IPG_ENABLE)</div><div class='add'>+		timer_delete_sync(&amp;lp-&gt;ipg_data.ipg_timer);</div><div class='ctx'> 	amd8111e_stop_chip(lp);</div><div class='ctx'> 	spin_unlock_irq(&amp;lp-&gt;lock);</div><div class='ctx'> </div><div class='del'>-	if(lp-&gt;options &amp; OPTION_WOL_ENABLE){</div><div class='add'>+	if (lp-&gt;options &amp; OPTION_WOL_ENABLE) {</div><div class='ctx'> 		 /* enable wol */</div><div class='del'>-		if(lp-&gt;options &amp; OPTION_WAKE_MAGIC_ENABLE)</div><div class='add'>+		if (lp-&gt;options &amp; OPTION_WAKE_MAGIC_ENABLE)</div><div class='ctx'> 			amd8111e_enable_magicpkt(lp);</div><div class='del'>-		if(lp-&gt;options &amp; OPTION_WAKE_PHY_ENABLE)</div><div class='add'>+		if (lp-&gt;options &amp; OPTION_WAKE_PHY_ENABLE)</div><div class='ctx'> 			amd8111e_enable_link_change(lp);</div><div class='ctx'> </div><div class='del'>-		pci_enable_wake(pci_dev, PCI_D3hot, 1);</div><div class='del'>-		pci_enable_wake(pci_dev, PCI_D3cold, 1);</div><div class='add'>+		device_set_wakeup_enable(dev_d, 1);</div><div class='ctx'> </div><div class='add'>+	} else {</div><div class='add'>+		device_set_wakeup_enable(dev_d, 0);</div><div class='ctx'> 	}</div><div class='del'>-	else{</div><div class='del'>-		pci_enable_wake(pci_dev, PCI_D3hot, 0);</div><div class='del'>-		pci_enable_wake(pci_dev, PCI_D3cold, 0);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pci_save_state(pci_dev);</div><div class='del'>-	pci_set_power_state(pci_dev, PCI_D3hot);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-static int amd8111e_resume(struct pci_dev *pci_dev)</div><div class='add'>+</div><div class='add'>+static int __maybe_unused amd8111e_resume(struct device *dev_d)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *dev = pci_get_drvdata(pci_dev);</div><div class='add'>+	struct net_device *dev = dev_get_drvdata(dev_d);</div><div class='ctx'> 	struct amd8111e_priv *lp = netdev_priv(dev);</div><div class='ctx'> </div><div class='ctx'> 	if (!netif_running(dev))</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	pci_set_power_state(pci_dev, PCI_D0);</div><div class='del'>-	pci_restore_state(pci_dev);</div><div class='del'>-</div><div class='del'>-	pci_enable_wake(pci_dev, PCI_D3hot, 0);</div><div class='del'>-	pci_enable_wake(pci_dev, PCI_D3cold, 0); /* D3 cold */</div><div class='del'>-</div><div class='ctx'> 	netif_device_attach(dev);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irq(&amp;lp-&gt;lock);</div><div class='ctx'> 	amd8111e_restart(dev);</div><div class='ctx'> 	/* Restart ipg timer */</div><div class='del'>-	if(lp-&gt;options &amp; OPTION_DYN_IPG_ENABLE)</div><div class='add'>+	if (lp-&gt;options &amp; OPTION_DYN_IPG_ENABLE)</div><div class='ctx'> 		mod_timer(&amp;lp-&gt;ipg_data.ipg_timer,</div><div class='ctx'> 				jiffies + IPG_CONVERGE_JIFFIES);</div><div class='ctx'> 	spin_unlock_irq(&amp;lp-&gt;lock);</div><div class='hunk'>@@ -1690,23 +1639,24 @@ static int amd8111e_resume(struct pci_dev *pci_dev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void amd8111e_config_ipg(struct net_device *dev)</div><div class='add'>+static void amd8111e_config_ipg(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct amd8111e_priv *lp = netdev_priv(dev);</div><div class='add'>+	struct amd8111e_priv *lp = timer_container_of(lp, t,</div><div class='add'>+						      ipg_data.ipg_timer);</div><div class='ctx'> 	struct ipg_info *ipg_data = &amp;lp-&gt;ipg_data;</div><div class='ctx'> 	void __iomem *mmio = lp-&gt;mmio;</div><div class='ctx'> 	unsigned int prev_col_cnt = ipg_data-&gt;col_cnt;</div><div class='ctx'> 	unsigned int total_col_cnt;</div><div class='ctx'> 	unsigned int tmp_ipg;</div><div class='ctx'> </div><div class='del'>-	if(lp-&gt;link_config.duplex == DUPLEX_FULL){</div><div class='add'>+	if (lp-&gt;link_config.duplex == DUPLEX_FULL) {</div><div class='ctx'> 		ipg_data-&gt;ipg = DEFAULT_IPG;</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if(ipg_data-&gt;ipg_state == SSTATE){</div><div class='add'>+	if (ipg_data-&gt;ipg_state == SSTATE) {</div><div class='ctx'> </div><div class='del'>-		if(ipg_data-&gt;timer_tick == IPG_STABLE_TIME){</div><div class='add'>+		if (ipg_data-&gt;timer_tick == IPG_STABLE_TIME) {</div><div class='ctx'> </div><div class='ctx'> 			ipg_data-&gt;timer_tick = 0;</div><div class='ctx'> 			ipg_data-&gt;ipg = MIN_IPG - IPG_STEP;</div><div class='hunk'>@@ -1718,7 +1668,7 @@ static void amd8111e_config_ipg(struct net_device *dev)</div><div class='ctx'> 			ipg_data-&gt;timer_tick++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if(ipg_data-&gt;ipg_state == CSTATE){</div><div class='add'>+	if (ipg_data-&gt;ipg_state == CSTATE) {</div><div class='ctx'> </div><div class='ctx'> 		/* Get the current collision count */</div><div class='ctx'> </div><div class='hunk'>@@ -1726,10 +1676,10 @@ static void amd8111e_config_ipg(struct net_device *dev)</div><div class='ctx'> 				amd8111e_read_mib(mmio, xmt_collisions);</div><div class='ctx'> </div><div class='ctx'> 		if ((total_col_cnt - prev_col_cnt) &lt;</div><div class='del'>-				(ipg_data-&gt;diff_col_cnt)){</div><div class='add'>+				(ipg_data-&gt;diff_col_cnt)) {</div><div class='ctx'> </div><div class='ctx'> 			ipg_data-&gt;diff_col_cnt =</div><div class='del'>-				total_col_cnt - prev_col_cnt ;</div><div class='add'>+				total_col_cnt - prev_col_cnt;</div><div class='ctx'> </div><div class='ctx'> 			ipg_data-&gt;ipg = ipg_data-&gt;current_ipg;</div><div class='ctx'> 		}</div><div class='hunk'>@@ -1738,14 +1688,14 @@ static void amd8111e_config_ipg(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 		if (ipg_data-&gt;current_ipg &lt;= MAX_IPG)</div><div class='ctx'> 			tmp_ipg = ipg_data-&gt;current_ipg;</div><div class='del'>-		else{</div><div class='add'>+		else {</div><div class='ctx'> 			tmp_ipg = ipg_data-&gt;ipg;</div><div class='ctx'> 			ipg_data-&gt;ipg_state = SSTATE;</div><div class='ctx'> 		}</div><div class='ctx'> 		writew((u32)tmp_ipg, mmio + IPG);</div><div class='ctx'> 		writew((u32)(tmp_ipg - IFS1_DELTA), mmio + IFS1);</div><div class='ctx'> 	}</div><div class='del'>-	 mod_timer(&amp;lp-&gt;ipg_data.ipg_timer, jiffies + IPG_CONVERGE_JIFFIES);</div><div class='add'>+	mod_timer(&amp;lp-&gt;ipg_data.ipg_timer, jiffies + IPG_CONVERGE_JIFFIES);</div><div class='ctx'> 	return;</div><div class='ctx'> </div><div class='ctx'> }</div><div class='hunk'>@@ -1779,7 +1729,7 @@ static const struct net_device_ops amd8111e_netdev_ops = {</div><div class='ctx'> 	.ndo_set_rx_mode	= amd8111e_set_multicast_list,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> 	.ndo_set_mac_address	= amd8111e_set_mac_address,</div><div class='del'>-	.ndo_do_ioctl		= amd8111e_ioctl,</div><div class='add'>+	.ndo_eth_ioctl		= amd8111e_ioctl,</div><div class='ctx'> 	.ndo_change_mtu		= amd8111e_change_mtu,</div><div class='ctx'> #ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='ctx'> 	.ndo_poll_controller	 = amd8111e_poll,</div><div class='hunk'>@@ -1790,24 +1740,25 @@ static int amd8111e_probe_one(struct pci_dev *pdev,</div><div class='ctx'> 				  const struct pci_device_id *ent)</div><div class='ctx'> {</div><div class='ctx'> 	int err, i;</div><div class='del'>-	unsigned long reg_addr,reg_len;</div><div class='add'>+	unsigned long reg_addr, reg_len;</div><div class='ctx'> 	struct amd8111e_priv *lp;</div><div class='ctx'> 	struct net_device *dev;</div><div class='add'>+	u8 addr[ETH_ALEN];</div><div class='ctx'> </div><div class='ctx'> 	err = pci_enable_device(pdev);</div><div class='del'>-	if(err){</div><div class='add'>+	if (err) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Cannot enable new PCI device\n");</div><div class='ctx'> 		return err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if(!(pci_resource_flags(pdev, 0) &amp; IORESOURCE_MEM)){</div><div class='add'>+	if (!(pci_resource_flags(pdev, 0) &amp; IORESOURCE_MEM)) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Cannot find PCI base address\n");</div><div class='ctx'> 		err = -ENODEV;</div><div class='ctx'> 		goto err_disable_pdev;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	err = pci_request_regions(pdev, MODULE_NAME);</div><div class='del'>-	if(err){</div><div class='add'>+	if (err) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "Cannot obtain PCI resources\n");</div><div class='ctx'> 		goto err_disable_pdev;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1822,7 +1773,7 @@ static int amd8111e_probe_one(struct pci_dev *pdev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize DMA */</div><div class='del'>-	if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) &lt; 0) {</div><div class='add'>+	if (dma_set_mask(&amp;pdev-&gt;dev, DMA_BIT_MASK(32)) &lt; 0) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "DMA not supported\n");</div><div class='ctx'> 		err = -ENODEV;</div><div class='ctx'> 		goto err_free_reg;</div><div class='hunk'>@@ -1840,13 +1791,12 @@ static int amd8111e_probe_one(struct pci_dev *pdev,</div><div class='ctx'> 	SET_NETDEV_DEV(dev, &amp;pdev-&gt;dev);</div><div class='ctx'> </div><div class='ctx'> #if AMD8111E_VLAN_TAG_USED</div><div class='del'>-	dev-&gt;features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX ;</div><div class='add'>+	dev-&gt;features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX;</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='ctx'> 	lp = netdev_priv(dev);</div><div class='ctx'> 	lp-&gt;pci_dev = pdev;</div><div class='ctx'> 	lp-&gt;amd8111e_net_dev = dev;</div><div class='del'>-	lp-&gt;pm_cap = pdev-&gt;pm_cap;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_init(&amp;lp-&gt;lock);</div><div class='ctx'> </div><div class='hunk'>@@ -1859,26 +1809,26 @@ static int amd8111e_probe_one(struct pci_dev *pdev,</div><div class='ctx'> </div><div class='ctx'> 	/* Initializing MAC address */</div><div class='ctx'> 	for (i = 0; i &lt; ETH_ALEN; i++)</div><div class='del'>-		dev-&gt;dev_addr[i] = readb(lp-&gt;mmio + PADR + i);</div><div class='add'>+		addr[i] = readb(lp-&gt;mmio + PADR + i);</div><div class='add'>+	eth_hw_addr_set(dev, addr);</div><div class='ctx'> </div><div class='ctx'> 	/* Setting user defined parametrs */</div><div class='ctx'> 	lp-&gt;ext_phy_option = speed_duplex[card_idx];</div><div class='del'>-	if(coalesce[card_idx])</div><div class='add'>+	if (coalesce[card_idx])</div><div class='ctx'> 		lp-&gt;options |= OPTION_INTR_COAL_ENABLE;</div><div class='del'>-	if(dynamic_ipg[card_idx++])</div><div class='add'>+	if (dynamic_ipg[card_idx++])</div><div class='ctx'> 		lp-&gt;options |= OPTION_DYN_IPG_ENABLE;</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 	/* Initialize driver entry points */</div><div class='ctx'> 	dev-&gt;netdev_ops = &amp;amd8111e_netdev_ops;</div><div class='ctx'> 	dev-&gt;ethtool_ops = &amp;ops;</div><div class='del'>-	dev-&gt;irq =pdev-&gt;irq;</div><div class='add'>+	dev-&gt;irq = pdev-&gt;irq;</div><div class='ctx'> 	dev-&gt;watchdog_timeo = AMD8111E_TX_TIMEOUT;</div><div class='del'>-	netif_napi_add(dev, &amp;lp-&gt;napi, amd8111e_rx_poll, 32);</div><div class='add'>+	dev-&gt;min_mtu = AMD8111E_MIN_MTU;</div><div class='add'>+	dev-&gt;max_mtu = AMD8111E_MAX_MTU;</div><div class='add'>+	netif_napi_add_weight(dev, &amp;lp-&gt;napi, amd8111e_rx_poll, 32);</div><div class='ctx'> </div><div class='del'>-#if AMD8111E_VLAN_TAG_USED</div><div class='del'>-	dev-&gt;features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX;</div><div class='del'>-#endif</div><div class='ctx'> 	/* Probe the external PHY */</div><div class='ctx'> 	amd8111e_probe_ext_phy(dev);</div><div class='ctx'> </div><div class='hunk'>@@ -1901,10 +1851,8 @@ static int amd8111e_probe_one(struct pci_dev *pdev,</div><div class='ctx'> 	pci_set_drvdata(pdev, dev);</div><div class='ctx'> </div><div class='ctx'> 	/* Initialize software ipg timer */</div><div class='del'>-	if(lp-&gt;options &amp; OPTION_DYN_IPG_ENABLE){</div><div class='del'>-		init_timer(&amp;lp-&gt;ipg_data.ipg_timer);</div><div class='del'>-		lp-&gt;ipg_data.ipg_timer.data = (unsigned long) dev;</div><div class='del'>-		lp-&gt;ipg_data.ipg_timer.function = (void *)&amp;amd8111e_config_ipg;</div><div class='add'>+	if (lp-&gt;options &amp; OPTION_DYN_IPG_ENABLE) {</div><div class='add'>+		timer_setup(&amp;lp-&gt;ipg_data.ipg_timer, amd8111e_config_ipg, 0);</div><div class='ctx'> 		lp-&gt;ipg_data.ipg_timer.expires = jiffies +</div><div class='ctx'> 						 IPG_CONVERGE_JIFFIES;</div><div class='ctx'> 		lp-&gt;ipg_data.ipg = DEFAULT_IPG;</div><div class='hunk'>@@ -1912,8 +1860,7 @@ static int amd8111e_probe_one(struct pci_dev *pdev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/*  display driver and device information */</div><div class='del'>-    	chip_version = (readl(lp-&gt;mmio + CHIPID) &amp; 0xf0000000)&gt;&gt;28;</div><div class='del'>-	dev_info(&amp;pdev-&gt;dev, "AMD-8111e Driver Version: %s\n", MODULE_VERS);</div><div class='add'>+	chip_version = (readl(lp-&gt;mmio + CHIPID) &amp; 0xf0000000) &gt;&gt; 28;</div><div class='ctx'> 	dev_info(&amp;pdev-&gt;dev, "[ Rev %x ] PCI 10/100BaseT Ethernet %pM\n",</div><div class='ctx'> 		 chip_version, dev-&gt;dev_addr);</div><div class='ctx'> 	if (lp-&gt;ext_phy_id)</div><div class='hunk'>@@ -1922,7 +1869,7 @@ static int amd8111e_probe_one(struct pci_dev *pdev,</div><div class='ctx'> 	else</div><div class='ctx'> 		dev_info(&amp;pdev-&gt;dev, "Couldn't detect MII PHY, assuming address 0x01\n");</div><div class='ctx'> </div><div class='del'>-    	return 0;</div><div class='add'>+	return 0;</div><div class='ctx'> </div><div class='ctx'> err_free_dev:</div><div class='ctx'> 	free_netdev(dev);</div><div class='hunk'>@@ -1959,13 +1906,14 @@ static const struct pci_device_id amd8111e_pci_tbl[] = {</div><div class='ctx'> };</div><div class='ctx'> MODULE_DEVICE_TABLE(pci, amd8111e_pci_tbl);</div><div class='ctx'> </div><div class='add'>+static SIMPLE_DEV_PM_OPS(amd8111e_pm_ops, amd8111e_suspend, amd8111e_resume);</div><div class='add'>+</div><div class='ctx'> static struct pci_driver amd8111e_driver = {</div><div class='del'>-	.name   	= MODULE_NAME,</div><div class='add'>+	.name		= MODULE_NAME,</div><div class='ctx'> 	.id_table	= amd8111e_pci_tbl,</div><div class='ctx'> 	.probe		= amd8111e_probe_one,</div><div class='ctx'> 	.remove		= amd8111e_remove_one,</div><div class='del'>-	.suspend	= amd8111e_suspend,</div><div class='del'>-	.resume		= amd8111e_resume</div><div class='add'>+	.driver.pm	= &amp;amd8111e_pm_ops</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_pci_driver(amd8111e_driver);</div><div class='head'>diff --git a/drivers/net/ethernet/amd/amd8111e.h b/drivers/net/ethernet/amd/amd8111e.h<br/>index 7cdb18512407..e4ee4c28800c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/amd8111e.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/amd8111e.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/amd8111e.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/amd8111e.h</a></div><div class='hunk'>@@ -1,19 +1,8 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='ctx'> /*</div><div class='ctx'>  * Advanced  Micro Devices Inc. AMD8111E Linux Network Driver</div><div class='ctx'>  * Copyright (C) 2003 Advanced Micro Devices</div><div class='ctx'>  *</div><div class='del'>- * This program is free software; you can redistribute it and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation; either version 2 of the License, or</div><div class='del'>- * (at your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program; if not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'> </div><div class='ctx'> Module Name:</div><div class='ctx'> </div><div class='hunk'>@@ -21,14 +10,14 @@ Module Name:</div><div class='ctx'> </div><div class='ctx'> Abstract:</div><div class='ctx'> </div><div class='del'>- 	 AMD8111 based 10/100 Ethernet Controller driver definitions.</div><div class='add'>+	 AMD8111 based 10/100 Ethernet Controller driver definitions.</div><div class='ctx'> </div><div class='ctx'> Environment:</div><div class='ctx'> </div><div class='ctx'> 	Kernel Mode</div><div class='ctx'> </div><div class='ctx'> Revision History:</div><div class='del'>- 	3.0.0</div><div class='add'>+	3.0.0</div><div class='ctx'> 	   Initial Revision.</div><div class='ctx'> 	3.0.1</div><div class='ctx'> */</div><div class='hunk'>@@ -48,7 +37,7 @@ eg., if the value 10011010b is written into the least significant byte of a comm</div><div class='ctx'> /* 32 bit registers */</div><div class='ctx'> </div><div class='ctx'> #define  ASF_STAT		0x00	/* ASF status register */</div><div class='del'>-#define CHIPID			0x04	/* Chip ID regsiter */</div><div class='add'>+#define CHIPID			0x04	/* Chip ID register */</div><div class='ctx'> #define	MIB_DATA		0x10	/* MIB data register */</div><div class='ctx'> #define MIB_ADDR		0x14	/* MIB address register */</div><div class='ctx'> #define STAT0			0x30	/* Status0 register */</div><div class='hunk'>@@ -561,7 +550,6 @@ typedef enum {</div><div class='ctx'> </div><div class='ctx'> /* Driver definitions */</div><div class='ctx'> </div><div class='del'>-#define	 PCI_VENDOR_ID_AMD		0x1022</div><div class='ctx'> #define  PCI_DEVICE_ID_AMD8111E_7462	0x7462</div><div class='ctx'> </div><div class='ctx'> #define MAX_UNITS			8 /* Maximum number of devices possible */</div><div class='hunk'>@@ -611,7 +599,7 @@ typedef enum {</div><div class='ctx'> #define CSTATE  1</div><div class='ctx'> #define SSTATE  2</div><div class='ctx'> </div><div class='del'>-/* Assume contoller gets data 10 times the maximum processing time */</div><div class='add'>+/* Assume controller gets data 10 times the maximum processing time */</div><div class='ctx'> #define  REPEAT_CNT			10</div><div class='ctx'> </div><div class='ctx'> /* amd8111e descriptor flag definitions */</div><div class='hunk'>@@ -648,7 +636,7 @@ typedef enum {</div><div class='ctx'> /* driver ioctl parameters */</div><div class='ctx'> #define AMD8111E_REG_DUMP_LEN	 13*sizeof(u32)</div><div class='ctx'> </div><div class='del'>-/* amd8111e desriptor format */</div><div class='add'>+/* amd8111e descriptor format */</div><div class='ctx'> </div><div class='ctx'> struct amd8111e_tx_dr{</div><div class='ctx'> </div><div class='hunk'>@@ -703,7 +691,7 @@ enum coal_type{</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum coal_mode{</div><div class='del'>-       	RX_INTR_COAL,</div><div class='add'>+	RX_INTR_COAL,</div><div class='ctx'> 	TX_INTR_COAL,</div><div class='ctx'> 	DISABLE_COAL,</div><div class='ctx'> 	ENABLE_COAL,</div><div class='hunk'>@@ -775,7 +763,6 @@ struct amd8111e_priv{</div><div class='ctx'> 	u32 ext_phy_id;</div><div class='ctx'> </div><div class='ctx'> 	struct amd8111e_link_config link_config;</div><div class='del'>-	int pm_cap;</div><div class='ctx'> </div><div class='ctx'> 	struct net_device *next;</div><div class='ctx'> 	int mii;</div><div class='head'>diff --git a/drivers/net/ethernet/amd/ariadne.c b/drivers/net/ethernet/amd/ariadne.c<br/>index 968b7bfac8fc..fa201da567ed 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/ariadne.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/ariadne.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/ariadne.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/ariadne.c</a></div><div class='hunk'>@@ -193,7 +193,7 @@ static int ariadne_rx(struct net_device *dev)</div><div class='ctx'> 			struct sk_buff *skb;</div><div class='ctx'> </div><div class='ctx'> 			skb = netdev_alloc_skb(dev, pkt_len + 2);</div><div class='del'>-			if (skb == NULL) {</div><div class='add'>+			if (!skb) {</div><div class='ctx'> 				for (i = 0; i &lt; RX_RING_SIZE; i++)</div><div class='ctx'> 					if (lowb(priv-&gt;rx_ring[(entry + i) % RX_RING_SIZE]-&gt;RMD1) &amp; RF_OWN)</div><div class='ctx'> 						break;</div><div class='hunk'>@@ -441,11 +441,11 @@ static int ariadne_open(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	/* Set the Ethernet Hardware Address */</div><div class='ctx'> 	lance-&gt;RAP = CSR12;		/* Physical Address Register, PADR[15:0] */</div><div class='del'>-	lance-&gt;RDP = ((u_short *)&amp;dev-&gt;dev_addr[0])[0];</div><div class='add'>+	lance-&gt;RDP = ((const u_short *)&amp;dev-&gt;dev_addr[0])[0];</div><div class='ctx'> 	lance-&gt;RAP = CSR13;		/* Physical Address Register, PADR[31:16] */</div><div class='del'>-	lance-&gt;RDP = ((u_short *)&amp;dev-&gt;dev_addr[0])[1];</div><div class='add'>+	lance-&gt;RDP = ((const u_short *)&amp;dev-&gt;dev_addr[0])[1];</div><div class='ctx'> 	lance-&gt;RAP = CSR14;		/* Physical Address Register, PADR[47:32] */</div><div class='del'>-	lance-&gt;RDP = ((u_short *)&amp;dev-&gt;dev_addr[0])[2];</div><div class='add'>+	lance-&gt;RDP = ((const u_short *)&amp;dev-&gt;dev_addr[0])[2];</div><div class='ctx'> </div><div class='ctx'> 	/* Set the Init Block Mode */</div><div class='ctx'> 	lance-&gt;RAP = CSR15;		/* Mode Register */</div><div class='hunk'>@@ -530,7 +530,7 @@ static inline void ariadne_reset(struct net_device *dev)</div><div class='ctx'> 	netif_start_queue(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void ariadne_tx_timeout(struct net_device *dev)</div><div class='add'>+static void ariadne_tx_timeout(struct net_device *dev, unsigned int txqueue)</div><div class='ctx'> {</div><div class='ctx'> 	volatile struct Am79C960 *lance = (struct Am79C960 *)dev-&gt;base_addr;</div><div class='ctx'> </div><div class='hunk'>@@ -692,7 +692,7 @@ static void ariadne_remove_one(struct zorro_dev *z)</div><div class='ctx'> 	free_netdev(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct zorro_device_id ariadne_zorro_tbl[] = {</div><div class='add'>+static const struct zorro_device_id ariadne_zorro_tbl[] = {</div><div class='ctx'> 	{ ZORRO_PROD_VILLAGE_TRONIC_ARIADNE },</div><div class='ctx'> 	{ 0 }</div><div class='ctx'> };</div><div class='hunk'>@@ -706,7 +706,6 @@ static const struct net_device_ops ariadne_netdev_ops = {</div><div class='ctx'> 	.ndo_get_stats		= ariadne_get_stats,</div><div class='ctx'> 	.ndo_set_rx_mode	= set_multicast_list,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='ctx'> 	.ndo_set_mac_address	= eth_mac_addr,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -718,6 +717,7 @@ static int ariadne_init_one(struct zorro_dev *z,</div><div class='ctx'> 	unsigned long mem_start = board + ARIADNE_RAM;</div><div class='ctx'> 	struct resource *r1, *r2;</div><div class='ctx'> 	struct net_device *dev;</div><div class='add'>+	u8 addr[ETH_ALEN];</div><div class='ctx'> 	u32 serial;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='hunk'>@@ -731,7 +731,7 @@ static int ariadne_init_one(struct zorro_dev *z,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	dev = alloc_etherdev(sizeof(struct ariadne_private));</div><div class='del'>-	if (dev == NULL) {</div><div class='add'>+	if (!dev) {</div><div class='ctx'> 		release_mem_region(base_addr, sizeof(struct Am79C960));</div><div class='ctx'> 		release_mem_region(mem_start, ARIADNE_RAM_SIZE);</div><div class='ctx'> 		return -ENOMEM;</div><div class='hunk'>@@ -741,12 +741,13 @@ static int ariadne_init_one(struct zorro_dev *z,</div><div class='ctx'> 	r2-&gt;name = dev-&gt;name;</div><div class='ctx'> </div><div class='ctx'> 	serial = be32_to_cpu(z-&gt;rom.er_SerialNumber);</div><div class='del'>-	dev-&gt;dev_addr[0] = 0x00;</div><div class='del'>-	dev-&gt;dev_addr[1] = 0x60;</div><div class='del'>-	dev-&gt;dev_addr[2] = 0x30;</div><div class='del'>-	dev-&gt;dev_addr[3] = (serial &gt;&gt; 16) &amp; 0xff;</div><div class='del'>-	dev-&gt;dev_addr[4] = (serial &gt;&gt; 8) &amp; 0xff;</div><div class='del'>-	dev-&gt;dev_addr[5] = serial &amp; 0xff;</div><div class='add'>+	addr[0] = 0x00;</div><div class='add'>+	addr[1] = 0x60;</div><div class='add'>+	addr[2] = 0x30;</div><div class='add'>+	addr[3] = (serial &gt;&gt; 16) &amp; 0xff;</div><div class='add'>+	addr[4] = (serial &gt;&gt; 8) &amp; 0xff;</div><div class='add'>+	addr[5] = serial &amp; 0xff;</div><div class='add'>+	eth_hw_addr_set(dev, addr);</div><div class='ctx'> 	dev-&gt;base_addr = (unsigned long)ZTWO_VADDR(base_addr);</div><div class='ctx'> 	dev-&gt;mem_start = (unsigned long)ZTWO_VADDR(mem_start);</div><div class='ctx'> 	dev-&gt;mem_end = dev-&gt;mem_start + ARIADNE_RAM_SIZE;</div><div class='hunk'>@@ -789,4 +790,5 @@ static void __exit ariadne_cleanup_module(void)</div><div class='ctx'> module_init(ariadne_init_module);</div><div class='ctx'> module_exit(ariadne_cleanup_module);</div><div class='ctx'> </div><div class='add'>+MODULE_DESCRIPTION("Ariadne Ethernet Driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/amd/atarilance.c b/drivers/net/ethernet/amd/atarilance.c<br/>index b10964e8cb54..8c8cc7d0f42d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/atarilance.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/atarilance.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/atarilance.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/atarilance.c</a></div><div class='hunk'>@@ -42,8 +42,8 @@</div><div class='ctx'> </div><div class='ctx'> */</div><div class='ctx'> </div><div class='del'>-static char version[] = "atarilance.c: v1.3 04/04/96 "</div><div class='del'>-					   "Roman.Hodek@informatik.uni-erlangen.de\n";</div><div class='add'>+static const char version[] = "atarilance.c: v1.3 04/04/96 "</div><div class='add'>+			      "Roman.Hodek@informatik.uni-erlangen.de\n";</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='hunk'>@@ -79,6 +79,7 @@ static int lance_debug = 1;</div><div class='ctx'> #endif</div><div class='ctx'> module_param(lance_debug, int, 0);</div><div class='ctx'> MODULE_PARM_DESC(lance_debug, "atarilance debug level (0-3)");</div><div class='add'>+MODULE_DESCRIPTION("Atari LANCE Ethernet driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='ctx'> /* Print debug messages on probing? */</div><div class='hunk'>@@ -156,7 +157,7 @@ struct lance_memory {</div><div class='ctx'> 	struct lance_init_block	init;</div><div class='ctx'> 	struct lance_tx_head	tx_head[TX_RING_SIZE];</div><div class='ctx'> 	struct lance_rx_head	rx_head[RX_RING_SIZE];</div><div class='del'>-	char					packet_area[0];	/* packet data follow after the</div><div class='add'>+	char					packet_area[];	/* packet data follow after the</div><div class='ctx'> 											 * init block and the ring</div><div class='ctx'> 											 * descriptors and are located</div><div class='ctx'> 											 * at runtime */</div><div class='hunk'>@@ -339,13 +340,14 @@ static unsigned long lance_probe1( struct net_device *dev, struct lance_addr</div><div class='ctx'>                                    *init_rec );</div><div class='ctx'> static int lance_open( struct net_device *dev );</div><div class='ctx'> static void lance_init_ring( struct net_device *dev );</div><div class='del'>-static int lance_start_xmit( struct sk_buff *skb, struct net_device *dev );</div><div class='add'>+static netdev_tx_t lance_start_xmit(struct sk_buff *skb,</div><div class='add'>+				    struct net_device *dev);</div><div class='ctx'> static irqreturn_t lance_interrupt( int irq, void *dev_id );</div><div class='ctx'> static int lance_rx( struct net_device *dev );</div><div class='ctx'> static int lance_close( struct net_device *dev );</div><div class='ctx'> static void set_multicast_list( struct net_device *dev );</div><div class='ctx'> static int lance_set_mac_address( struct net_device *dev, void *addr );</div><div class='del'>-static void lance_tx_timeout (struct net_device *dev);</div><div class='add'>+static void lance_tx_timeout (struct net_device *dev, unsigned int txqueue);</div><div class='ctx'> </div><div class='ctx'> /************************* End of Prototypes **************************/</div><div class='ctx'> </div><div class='hunk'>@@ -366,7 +368,7 @@ static void *slow_memcpy( void *dst, const void *src, size_t len )</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-struct net_device * __init atarilance_probe(int unit)</div><div class='add'>+static struct net_device * __init atarilance_probe(void)</div><div class='ctx'> {</div><div class='ctx'> 	int i;</div><div class='ctx'> 	static int found;</div><div class='hunk'>@@ -381,10 +383,6 @@ struct net_device * __init atarilance_probe(int unit)</div><div class='ctx'> 	dev = alloc_etherdev(sizeof(struct lance_private));</div><div class='ctx'> 	if (!dev)</div><div class='ctx'> 		return ERR_PTR(-ENOMEM);</div><div class='del'>-	if (unit &gt;= 0) {</div><div class='del'>-		sprintf(dev-&gt;name, "eth%d", unit);</div><div class='del'>-		netdev_boot_setup_check(dev);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	for( i = 0; i &lt; N_LANCE_ADDR; ++i ) {</div><div class='ctx'> 		if (lance_probe1( dev, &amp;lance_addr_list[i] )) {</div><div class='hunk'>@@ -460,7 +458,6 @@ static const struct net_device_ops lance_netdev_ops = {</div><div class='ctx'> 	.ndo_set_mac_address	= lance_set_mac_address,</div><div class='ctx'> 	.ndo_tx_timeout		= lance_tx_timeout,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static unsigned long __init lance_probe1( struct net_device *dev,</div><div class='hunk'>@@ -475,6 +472,7 @@ static unsigned long __init lance_probe1( struct net_device *dev,</div><div class='ctx'> 	int 					i;</div><div class='ctx'> 	static int 				did_version;</div><div class='ctx'> 	unsigned short			save1, save2;</div><div class='add'>+	u8 addr[ETH_ALEN];</div><div class='ctx'> </div><div class='ctx'> 	PROBE_PRINT(( "Probing for Lance card at mem %#lx io %#lx\n",</div><div class='ctx'> 				  (long)memaddr, (long)ioaddr ));</div><div class='hunk'>@@ -584,19 +582,21 @@ static unsigned long __init lance_probe1( struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	/* Get the ethernet address */</div><div class='ctx'> 	switch( lp-&gt;cardtype ) {</div><div class='del'>-	  case OLD_RIEBL:</div><div class='add'>+	case OLD_RIEBL:</div><div class='ctx'> 		/* No ethernet address! (Set some default address) */</div><div class='del'>-		memcpy(dev-&gt;dev_addr, OldRieblDefHwaddr, ETH_ALEN);</div><div class='add'>+		eth_hw_addr_set(dev, OldRieblDefHwaddr);</div><div class='ctx'> 		break;</div><div class='del'>-	  case NEW_RIEBL:</div><div class='del'>-		lp-&gt;memcpy_f(dev-&gt;dev_addr, RIEBL_HWADDR_ADDR, ETH_ALEN);</div><div class='add'>+	case NEW_RIEBL:</div><div class='add'>+		lp-&gt;memcpy_f(addr, RIEBL_HWADDR_ADDR, ETH_ALEN);</div><div class='add'>+		eth_hw_addr_set(dev, addr);</div><div class='ctx'> 		break;</div><div class='del'>-	  case PAM_CARD:</div><div class='add'>+	case PAM_CARD:</div><div class='ctx'> 		i = IO-&gt;eeprom;</div><div class='ctx'> 		for( i = 0; i &lt; 6; ++i )</div><div class='del'>-			dev-&gt;dev_addr[i] =</div><div class='add'>+			addr[i] =</div><div class='ctx'> 				((((unsigned short *)MEM)[i*2] &amp; 0x0f) &lt;&lt; 4) |</div><div class='ctx'> 				((((unsigned short *)MEM)[i*2+1] &amp; 0x0f));</div><div class='add'>+		eth_hw_addr_set(dev, addr);</div><div class='ctx'> 		i = IO-&gt;mem;</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -706,7 +706,7 @@ static void lance_init_ring( struct net_device *dev )</div><div class='ctx'> 		CHECK_OFFSET(offset);</div><div class='ctx'> 		MEM-&gt;tx_head[i].base = offset;</div><div class='ctx'> 		MEM-&gt;tx_head[i].flag = TMD1_OWN_HOST;</div><div class='del'>- 		MEM-&gt;tx_head[i].base_hi = 0;</div><div class='add'>+		MEM-&gt;tx_head[i].base_hi = 0;</div><div class='ctx'> 		MEM-&gt;tx_head[i].length = 0;</div><div class='ctx'> 		MEM-&gt;tx_head[i].misc = 0;</div><div class='ctx'> 		offset += PKT_BUF_SZ;</div><div class='hunk'>@@ -727,7 +727,7 @@ static void lance_init_ring( struct net_device *dev )</div><div class='ctx'> /* XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-static void lance_tx_timeout (struct net_device *dev)</div><div class='add'>+static void lance_tx_timeout (struct net_device *dev, unsigned int txqueue)</div><div class='ctx'> {</div><div class='ctx'> 	struct lance_private *lp = netdev_priv(dev);</div><div class='ctx'> 	struct lance_ioreg	 *IO = lp-&gt;iobase;</div><div class='hunk'>@@ -764,13 +764,14 @@ static void lance_tx_timeout (struct net_device *dev)</div><div class='ctx'> 	/* lance_restart, essentially */</div><div class='ctx'> 	lance_init_ring(dev);</div><div class='ctx'> 	REGA( CSR0 ) = CSR0_INEA | CSR0_INIT | CSR0_STRT;</div><div class='del'>-	dev-&gt;trans_start = jiffies; /* prevent tx timeout */</div><div class='add'>+	netif_trans_update(dev); /* prevent tx timeout */</div><div class='ctx'> 	netif_wake_queue(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /* XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */</div><div class='ctx'> </div><div class='del'>-static int lance_start_xmit( struct sk_buff *skb, struct net_device *dev )</div><div class='add'>+static netdev_tx_t</div><div class='add'>+lance_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct lance_private *lp = netdev_priv(dev);</div><div class='ctx'> 	struct lance_ioreg	 *IO = lp-&gt;iobase;</div><div class='hunk'>@@ -824,7 +825,7 @@ static int lance_start_xmit( struct sk_buff *skb, struct net_device *dev )</div><div class='ctx'> 	lp-&gt;memcpy_f( PKTBUF_ADDR(head), (void *)skb-&gt;data, skb-&gt;len );</div><div class='ctx'> 	head-&gt;flag = TMD1_OWN_CHIP | TMD1_ENP | TMD1_STP;</div><div class='ctx'> 	dev-&gt;stats.tx_bytes += skb-&gt;len;</div><div class='del'>-	dev_kfree_skb( skb );</div><div class='add'>+	dev_consume_skb_irq(skb);</div><div class='ctx'> 	lp-&gt;cur_tx++;</div><div class='ctx'> 	while( lp-&gt;cur_tx &gt;= TX_RING_SIZE &amp;&amp; lp-&gt;dirty_tx &gt;= TX_RING_SIZE ) {</div><div class='ctx'> 		lp-&gt;cur_tx -= TX_RING_SIZE;</div><div class='hunk'>@@ -854,7 +855,7 @@ static irqreturn_t lance_interrupt( int irq, void *dev_id )</div><div class='ctx'> 	int csr0, boguscnt = 10;</div><div class='ctx'> 	int handled = 0;</div><div class='ctx'> </div><div class='del'>-	if (dev == NULL) {</div><div class='add'>+	if (!dev) {</div><div class='ctx'> 		DPRINTK( 1, ( "lance_interrupt(): interrupt for unknown device.\n" ));</div><div class='ctx'> 		return IRQ_NONE;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -995,7 +996,7 @@ static int lance_rx( struct net_device *dev )</div><div class='ctx'> 			}</div><div class='ctx'> 			else {</div><div class='ctx'> 				skb = netdev_alloc_skb(dev, pkt_len + 2);</div><div class='del'>-				if (skb == NULL) {</div><div class='add'>+				if (!skb) {</div><div class='ctx'> 					for( i = 0; i &lt; RX_RING_SIZE; i++ )</div><div class='ctx'> 						if (MEM-&gt;rx_head[(entry+i) &amp; RX_RING_MOD_MASK].flag &amp;</div><div class='ctx'> 							RMD1_OWN_CHIP)</div><div class='hunk'>@@ -1013,13 +1014,9 @@ static int lance_rx( struct net_device *dev )</div><div class='ctx'> 					u_char *data = PKTBUF_ADDR(head);</div><div class='ctx'> </div><div class='ctx'> 					printk(KERN_DEBUG "%s: RX pkt type 0x%04x from %pM to %pM "</div><div class='del'>-						   "data %02x %02x %02x %02x %02x %02x %02x %02x "</div><div class='del'>-						   "len %d\n",</div><div class='add'>+						   "data %8ph len %d\n",</div><div class='ctx'> 						   dev-&gt;name, ((u_short *)data)[6],</div><div class='del'>-						   &amp;data[6], data,</div><div class='del'>-						   data[15], data[16], data[17], data[18],</div><div class='del'>-						   data[19], data[20], data[21], data[22],</div><div class='del'>-						   pkt_len);</div><div class='add'>+						   &amp;data[6], data, &amp;data[15], pkt_len);</div><div class='ctx'> 				}</div><div class='ctx'> </div><div class='ctx'> 				skb_reserve( skb, 2 );	/* 16 byte align */</div><div class='hunk'>@@ -1130,7 +1127,7 @@ static int lance_set_mac_address( struct net_device *dev, void *addr )</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	memcpy( dev-&gt;dev_addr, saddr-&gt;sa_data, dev-&gt;addr_len );</div><div class='add'>+	eth_hw_addr_set(dev, saddr-&gt;sa_data);</div><div class='ctx'> 	for( i = 0; i &lt; 6; i++ )</div><div class='ctx'> 		MEM-&gt;init.hwaddr[i] = dev-&gt;dev_addr[i^1]; /* &lt;- 16 bit swap! */</div><div class='ctx'> 	lp-&gt;memcpy_f( RIEBL_HWADDR_ADDR, dev-&gt;dev_addr, 6 );</div><div class='hunk'>@@ -1140,13 +1137,11 @@ static int lance_set_mac_address( struct net_device *dev, void *addr )</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-#ifdef MODULE</div><div class='ctx'> static struct net_device *atarilance_dev;</div><div class='ctx'> </div><div class='ctx'> static int __init atarilance_module_init(void)</div><div class='ctx'> {</div><div class='del'>-	atarilance_dev = atarilance_probe(-1);</div><div class='add'>+	atarilance_dev = atarilance_probe();</div><div class='ctx'> 	return PTR_ERR_OR_ZERO(atarilance_dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1158,12 +1153,3 @@ static void __exit atarilance_module_exit(void)</div><div class='ctx'> }</div><div class='ctx'> module_init(atarilance_module_init);</div><div class='ctx'> module_exit(atarilance_module_exit);</div><div class='del'>-#endif /* MODULE */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Local variables:</div><div class='del'>- *  c-indent-level: 4</div><div class='del'>- *  tab-width: 4</div><div class='del'>- * End:</div><div class='del'>- */</div><div class='head'>diff --git a/drivers/net/ethernet/amd/au1000_eth.c b/drivers/net/ethernet/amd/au1000_eth.c<br/>index cb367cc59e0b..9d35ac348ebe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/au1000_eth.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/au1000_eth.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/au1000_eth.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/au1000_eth.c</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='ctx'>  *</div><div class='ctx'>  * Alchemy Au1x00 ethernet driver</div><div class='hunk'>@@ -14,24 +15,6 @@</div><div class='ctx'>  *</div><div class='ctx'>  * Author: MontaVista Software, Inc.</div><div class='ctx'>  *		ppopov@mvista.com or source@mvista.com</div><div class='del'>- *</div><div class='del'>- * ########################################################################</div><div class='del'>- *</div><div class='del'>- *  This program is free software; you can distribute it and/or modify it</div><div class='del'>- *  under the terms of the GNU General Public License (Version 2) as</div><div class='del'>- *  published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *  This program is distributed in the hope it will be useful, but WITHOUT</div><div class='del'>- *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or</div><div class='del'>- *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License</div><div class='del'>- *  for more details.</div><div class='del'>- *</div><div class='del'>- *  You should have received a copy of the GNU General Public License along</div><div class='del'>- *  with this program; if not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='del'>- *</div><div class='del'>- * ########################################################################</div><div class='del'>- *</div><div class='del'>- *</div><div class='ctx'>  */</div><div class='ctx'> #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='ctx'> </div><div class='hunk'>@@ -80,14 +63,12 @@ static int au1000_debug = 3;</div><div class='ctx'> 				NETIF_MSG_LINK)</div><div class='ctx'> </div><div class='ctx'> #define DRV_NAME	"au1000_eth"</div><div class='del'>-#define DRV_VERSION	"1.7"</div><div class='ctx'> #define DRV_AUTHOR	"Pete Popov &lt;ppopov@embeddedalley.com&gt;"</div><div class='ctx'> #define DRV_DESC	"Au1xxx on-chip Ethernet driver"</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR(DRV_AUTHOR);</div><div class='ctx'> MODULE_DESCRIPTION(DRV_DESC);</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='del'>-MODULE_VERSION(DRV_VERSION);</div><div class='ctx'> </div><div class='ctx'> /* AU1000 MAC registers and bits */</div><div class='ctx'> #define MAC_CONTROL		0x0</div><div class='hunk'>@@ -260,7 +241,6 @@ MODULE_VERSION(DRV_VERSION);</div><div class='ctx'>  * ps: make sure the used irqs are configured properly in the board</div><div class='ctx'>  * specific irq-map</div><div class='ctx'>  */</div><div class='del'>-</div><div class='ctx'> static void au1000_enable_mac(struct net_device *dev, int force_reset)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -344,9 +324,6 @@ static void au1000_mdio_write(struct net_device *dev, int phy_addr,</div><div class='ctx'> </div><div class='ctx'> static int au1000_mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)</div><div class='ctx'> {</div><div class='del'>-	/* WARNING: bus-&gt;phy_map[phy_addr].attached_dev == dev does</div><div class='del'>-	 * _NOT_ hold (e.g. when PHY is accessed through other MAC's MII bus)</div><div class='del'>-	 */</div><div class='ctx'> 	struct net_device *const dev = bus-&gt;priv;</div><div class='ctx'> </div><div class='ctx'> 	/* make sure the MAC associated with this</div><div class='hunk'>@@ -415,13 +392,13 @@ static void</div><div class='ctx'> au1000_adjust_link(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct au1000_private *aup = netdev_priv(dev);</div><div class='del'>-	struct phy_device *phydev = aup-&gt;phy_dev;</div><div class='add'>+	struct phy_device *phydev = dev-&gt;phydev;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	u32 reg;</div><div class='ctx'> </div><div class='ctx'> 	int status_change = 0;</div><div class='ctx'> </div><div class='del'>-	BUG_ON(!aup-&gt;phy_dev);</div><div class='add'>+	BUG_ON(!phydev);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;aup-&gt;lock, flags);</div><div class='ctx'> </div><div class='hunk'>@@ -502,7 +479,7 @@ static int au1000_mii_probe(struct net_device *dev)</div><div class='ctx'> 		BUG_ON(aup-&gt;mac_id &lt; 0 || aup-&gt;mac_id &gt; 1);</div><div class='ctx'> </div><div class='ctx'> 		if (aup-&gt;phy_addr)</div><div class='del'>-			phydev = aup-&gt;mii_bus-&gt;phy_map[aup-&gt;phy_addr];</div><div class='add'>+			phydev = mdiobus_get_phy(aup-&gt;mii_bus, aup-&gt;phy_addr);</div><div class='ctx'> 		else</div><div class='ctx'> 			netdev_info(dev, "using PHY-less setup\n");</div><div class='ctx'> 		return 0;</div><div class='hunk'>@@ -512,8 +489,8 @@ static int au1000_mii_probe(struct net_device *dev)</div><div class='ctx'> 	 * on the current MAC's MII bus</div><div class='ctx'> 	 */</div><div class='ctx'> 	for (phy_addr = 0; phy_addr &lt; PHY_MAX_ADDR; phy_addr++)</div><div class='del'>-		if (aup-&gt;mii_bus-&gt;phy_map[phy_addr]) {</div><div class='del'>-			phydev = aup-&gt;mii_bus-&gt;phy_map[phy_addr];</div><div class='add'>+		if (mdiobus_get_phy(aup-&gt;mii_bus, phy_addr)) {</div><div class='add'>+			phydev = mdiobus_get_phy(aup-&gt;mii_bus, phy_addr);</div><div class='ctx'> 			if (!aup-&gt;phy_search_highest_addr)</div><div class='ctx'> 				/* break out with first one found */</div><div class='ctx'> 				break;</div><div class='hunk'>@@ -531,7 +508,8 @@ static int au1000_mii_probe(struct net_device *dev)</div><div class='ctx'> 			 */</div><div class='ctx'> 			for (phy_addr = 0; phy_addr &lt; PHY_MAX_ADDR; phy_addr++) {</div><div class='ctx'> 				struct phy_device *const tmp_phydev =</div><div class='del'>-					aup-&gt;mii_bus-&gt;phy_map[phy_addr];</div><div class='add'>+					mdiobus_get_phy(aup-&gt;mii_bus,</div><div class='add'>+							phy_addr);</div><div class='ctx'> </div><div class='ctx'> 				if (aup-&gt;mac_id == 1)</div><div class='ctx'> 					break;</div><div class='hunk'>@@ -558,7 +536,7 @@ static int au1000_mii_probe(struct net_device *dev)</div><div class='ctx'> 	/* now we are supposed to have a proper phydev, to attach to... */</div><div class='ctx'> 	BUG_ON(phydev-&gt;attached_dev);</div><div class='ctx'> </div><div class='del'>-	phydev = phy_connect(dev, dev_name(&amp;phydev-&gt;dev),</div><div class='add'>+	phydev = phy_connect(dev, phydev_name(phydev),</div><div class='ctx'> 			     &amp;au1000_adjust_link, PHY_INTERFACE_MODE_MII);</div><div class='ctx'> </div><div class='ctx'> 	if (IS_ERR(phydev)) {</div><div class='hunk'>@@ -566,31 +544,17 @@ static int au1000_mii_probe(struct net_device *dev)</div><div class='ctx'> 		return PTR_ERR(phydev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* mask with MAC supported features */</div><div class='del'>-	phydev-&gt;supported &amp;= (SUPPORTED_10baseT_Half</div><div class='del'>-			      | SUPPORTED_10baseT_Full</div><div class='del'>-			      | SUPPORTED_100baseT_Half</div><div class='del'>-			      | SUPPORTED_100baseT_Full</div><div class='del'>-			      | SUPPORTED_Autoneg</div><div class='del'>-			      /* | SUPPORTED_Pause | SUPPORTED_Asym_Pause */</div><div class='del'>-			      | SUPPORTED_MII</div><div class='del'>-			      | SUPPORTED_TP);</div><div class='del'>-</div><div class='del'>-	phydev-&gt;advertising = phydev-&gt;supported;</div><div class='add'>+	phy_set_max_speed(phydev, SPEED_100);</div><div class='ctx'> </div><div class='ctx'> 	aup-&gt;old_link = 0;</div><div class='ctx'> 	aup-&gt;old_speed = 0;</div><div class='ctx'> 	aup-&gt;old_duplex = -1;</div><div class='del'>-	aup-&gt;phy_dev = phydev;</div><div class='ctx'> </div><div class='del'>-	netdev_info(dev, "attached PHY driver [%s] "</div><div class='del'>-	       "(mii_bus:phy_addr=%s, irq=%d)\n",</div><div class='del'>-	       phydev-&gt;drv-&gt;name, dev_name(&amp;phydev-&gt;dev), phydev-&gt;irq);</div><div class='add'>+	phy_attached_info(phydev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Buffer allocation/deallocation routines. The buffer descriptor returned</div><div class='ctx'>  * has the virtual and dma address of a buffer suitable for</div><div class='hunk'>@@ -607,7 +571,7 @@ static struct db_dest *au1000_GetFreeDB(struct au1000_private *aup)</div><div class='ctx'> 	return pDB;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void au1000_ReleaseDB(struct au1000_private *aup, struct db_dest *pDB)</div><div class='add'>+static void au1000_ReleaseDB(struct au1000_private *aup, struct db_dest *pDB)</div><div class='ctx'> {</div><div class='ctx'> 	struct db_dest *pDBfree = aup-&gt;pDBfree;</div><div class='ctx'> 	if (pDBfree)</div><div class='hunk'>@@ -681,40 +645,14 @@ au1000_setup_hw_rings(struct au1000_private *aup, void __iomem *tx_base)</div><div class='ctx'> /*</div><div class='ctx'>  * ethtool operations</div><div class='ctx'>  */</div><div class='del'>-</div><div class='del'>-static int au1000_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)</div><div class='del'>-{</div><div class='del'>-	struct au1000_private *aup = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	if (aup-&gt;phy_dev)</div><div class='del'>-		return phy_ethtool_gset(aup-&gt;phy_dev, cmd);</div><div class='del'>-</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int au1000_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)</div><div class='del'>-{</div><div class='del'>-	struct au1000_private *aup = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	if (!capable(CAP_NET_ADMIN))</div><div class='del'>-		return -EPERM;</div><div class='del'>-</div><div class='del'>-	if (aup-&gt;phy_dev)</div><div class='del'>-		return phy_ethtool_sset(aup-&gt;phy_dev, cmd);</div><div class='del'>-</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void</div><div class='ctx'> au1000_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)</div><div class='ctx'> {</div><div class='ctx'> 	struct au1000_private *aup = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	strlcpy(info-&gt;driver, DRV_NAME, sizeof(info-&gt;driver));</div><div class='del'>-	strlcpy(info-&gt;version, DRV_VERSION, sizeof(info-&gt;version));</div><div class='add'>+	strscpy(info-&gt;driver, DRV_NAME, sizeof(info-&gt;driver));</div><div class='ctx'> 	snprintf(info-&gt;bus_info, sizeof(info-&gt;bus_info), "%s %d", DRV_NAME,</div><div class='ctx'> 		 aup-&gt;mac_id);</div><div class='del'>-	info-&gt;regdump_len = 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void au1000_set_msglevel(struct net_device *dev, u32 value)</div><div class='hunk'>@@ -730,15 +668,14 @@ static u32 au1000_get_msglevel(struct net_device *dev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops au1000_ethtool_ops = {</div><div class='del'>-	.get_settings = au1000_get_settings,</div><div class='del'>-	.set_settings = au1000_set_settings,</div><div class='ctx'> 	.get_drvinfo = au1000_get_drvinfo,</div><div class='ctx'> 	.get_link = ethtool_op_get_link,</div><div class='ctx'> 	.get_msglevel = au1000_get_msglevel,</div><div class='ctx'> 	.set_msglevel = au1000_set_msglevel,</div><div class='add'>+	.get_link_ksettings = phy_ethtool_get_link_ksettings,</div><div class='add'>+	.set_link_ksettings = phy_ethtool_set_link_ksettings,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Initialize the interface.</div><div class='ctx'>  *</div><div class='hunk'>@@ -783,8 +720,8 @@ static int au1000_init(struct net_device *dev)</div><div class='ctx'> #ifndef CONFIG_CPU_LITTLE_ENDIAN</div><div class='ctx'> 	control |= MAC_BIG_ENDIAN;</div><div class='ctx'> #endif</div><div class='del'>-	if (aup-&gt;phy_dev) {</div><div class='del'>-		if (aup-&gt;phy_dev-&gt;link &amp;&amp; (DUPLEX_FULL == aup-&gt;phy_dev-&gt;duplex))</div><div class='add'>+	if (dev-&gt;phydev) {</div><div class='add'>+		if (dev-&gt;phydev-&gt;link &amp;&amp; (DUPLEX_FULL == dev-&gt;phydev-&gt;duplex))</div><div class='ctx'> 			control |= MAC_FULL_DUPLEX;</div><div class='ctx'> 		else</div><div class='ctx'> 			control |= MAC_DISABLE_RX_OWN;</div><div class='hunk'>@@ -849,7 +786,7 @@ static int au1000_rx(struct net_device *dev)</div><div class='ctx'> 			frmlen = (status &amp; RX_FRAME_LEN_MASK);</div><div class='ctx'> 			frmlen -= 4; /* Remove FCS */</div><div class='ctx'> 			skb = netdev_alloc_skb(dev, frmlen + 2);</div><div class='del'>-			if (skb == NULL) {</div><div class='add'>+			if (!skb) {</div><div class='ctx'> 				dev-&gt;stats.rx_dropped++;</div><div class='ctx'> 				continue;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -883,7 +820,7 @@ static int au1000_rx(struct net_device *dev)</div><div class='ctx'> 				pr_cont("\n");</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='del'>-		prxd-&gt;buff_stat = (u32)(pDB-&gt;dma_addr | RX_DMA_ENABLE);</div><div class='add'>+		prxd-&gt;buff_stat = lower_32_bits(pDB-&gt;dma_addr) | RX_DMA_ENABLE;</div><div class='ctx'> 		aup-&gt;rx_head = (aup-&gt;rx_head + 1) &amp; (NUM_RX_DMA - 1);</div><div class='ctx'> 		wmb(); /* drain writebuffer */</div><div class='ctx'> </div><div class='hunk'>@@ -896,11 +833,10 @@ static int au1000_rx(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> static void au1000_update_tx_stats(struct net_device *dev, u32 status)</div><div class='ctx'> {</div><div class='del'>-	struct au1000_private *aup = netdev_priv(dev);</div><div class='ctx'> 	struct net_device_stats *ps = &amp;dev-&gt;stats;</div><div class='ctx'> </div><div class='ctx'> 	if (status &amp; TX_FRAME_ABORTED) {</div><div class='del'>-		if (!aup-&gt;phy_dev || (DUPLEX_FULL == aup-&gt;phy_dev-&gt;duplex)) {</div><div class='add'>+		if (!dev-&gt;phydev || (DUPLEX_FULL == dev-&gt;phydev-&gt;duplex)) {</div><div class='ctx'> 			if (status &amp; (TX_JAB_TIMEOUT | TX_UNDERRUN)) {</div><div class='ctx'> 				/* any other tx errors are only valid</div><div class='ctx'> 				 * in half duplex mode</div><div class='hunk'>@@ -980,11 +916,8 @@ static int au1000_open(struct net_device *dev)</div><div class='ctx'> 		return retval;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (aup-&gt;phy_dev) {</div><div class='del'>-		/* cause the PHY state machine to schedule a link state check */</div><div class='del'>-		aup-&gt;phy_dev-&gt;state = PHY_CHANGELINK;</div><div class='del'>-		phy_start(aup-&gt;phy_dev);</div><div class='del'>-	}</div><div class='add'>+	if (dev-&gt;phydev)</div><div class='add'>+		phy_start(dev-&gt;phydev);</div><div class='ctx'> </div><div class='ctx'> 	netif_start_queue(dev);</div><div class='ctx'> </div><div class='hunk'>@@ -1000,8 +933,8 @@ static int au1000_close(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	netif_dbg(aup, drv, dev, "close: dev=%p\n", dev);</div><div class='ctx'> </div><div class='del'>-	if (aup-&gt;phy_dev)</div><div class='del'>-		phy_stop(aup-&gt;phy_dev);</div><div class='add'>+	if (dev-&gt;phydev)</div><div class='add'>+		phy_stop(dev-&gt;phydev);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;aup-&gt;lock, flags);</div><div class='ctx'> </div><div class='hunk'>@@ -1063,7 +996,7 @@ static netdev_tx_t au1000_tx(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	ps-&gt;tx_packets++;</div><div class='ctx'> 	ps-&gt;tx_bytes += ptxd-&gt;len;</div><div class='ctx'> </div><div class='del'>-	ptxd-&gt;buff_stat = pDB-&gt;dma_addr | TX_DMA_ENABLE;</div><div class='add'>+	ptxd-&gt;buff_stat = lower_32_bits(pDB-&gt;dma_addr) | TX_DMA_ENABLE;</div><div class='ctx'> 	wmb(); /* drain writebuffer */</div><div class='ctx'> 	dev_kfree_skb(skb);</div><div class='ctx'> 	aup-&gt;tx_head = (aup-&gt;tx_head + 1) &amp; (NUM_TX_DMA - 1);</div><div class='hunk'>@@ -1074,12 +1007,12 @@ static netdev_tx_t au1000_tx(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'>  * The Tx ring has been full longer than the watchdog timeout</div><div class='ctx'>  * value. The transmitter must be hung?</div><div class='ctx'>  */</div><div class='del'>-static void au1000_tx_timeout(struct net_device *dev)</div><div class='add'>+static void au1000_tx_timeout(struct net_device *dev, unsigned int txqueue)</div><div class='ctx'> {</div><div class='ctx'> 	netdev_err(dev, "au1000_tx_timeout: dev=%p\n", dev);</div><div class='ctx'> 	au1000_reset_mac(dev);</div><div class='ctx'> 	au1000_init(dev);</div><div class='del'>-	dev-&gt;trans_start = jiffies; /* prevent tx timeout */</div><div class='add'>+	netif_trans_update(dev); /* prevent tx timeout */</div><div class='ctx'> 	netif_wake_queue(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1113,29 +1046,15 @@ static void au1000_multicast_list(struct net_device *dev)</div><div class='ctx'> 	writel(reg, &amp;aup-&gt;mac-&gt;control);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int au1000_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)</div><div class='del'>-{</div><div class='del'>-	struct au1000_private *aup = netdev_priv(dev);</div><div class='del'>-</div><div class='del'>-	if (!netif_running(dev))</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	if (!aup-&gt;phy_dev)</div><div class='del'>-		return -EINVAL; /* PHY not controllable */</div><div class='del'>-</div><div class='del'>-	return phy_mii_ioctl(aup-&gt;phy_dev, rq, cmd);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static const struct net_device_ops au1000_netdev_ops = {</div><div class='ctx'> 	.ndo_open		= au1000_open,</div><div class='ctx'> 	.ndo_stop		= au1000_close,</div><div class='ctx'> 	.ndo_start_xmit		= au1000_tx,</div><div class='ctx'> 	.ndo_set_rx_mode	= au1000_multicast_list,</div><div class='del'>-	.ndo_do_ioctl		= au1000_ioctl,</div><div class='add'>+	.ndo_eth_ioctl		= phy_do_ioctl_running,</div><div class='ctx'> 	.ndo_tx_timeout		= au1000_tx_timeout,</div><div class='ctx'> 	.ndo_set_mac_address	= eth_mac_addr,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> static int au1000_probe(struct platform_device *pdev)</div><div class='hunk'>@@ -1163,7 +1082,6 @@ static int au1000_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	irq = platform_get_irq(pdev, 0);</div><div class='ctx'> 	if (irq &lt; 0) {</div><div class='del'>-		dev_err(&amp;pdev-&gt;dev, "failed to retrieve IRQ\n");</div><div class='ctx'> 		err = -ENODEV;</div><div class='ctx'> 		goto out;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1213,9 +1131,9 @@ static int au1000_probe(struct platform_device *pdev)</div><div class='ctx'> 	/* Allocate the data buffers</div><div class='ctx'> 	 * Snooping works fine with eth on all au1xxx</div><div class='ctx'> 	 */</div><div class='del'>-	aup-&gt;vaddr = (u32)dma_alloc_noncoherent(NULL, MAX_BUF_SIZE *</div><div class='del'>-						(NUM_TX_BUFFS + NUM_RX_BUFFS),</div><div class='del'>-						&amp;aup-&gt;dma_addr,	0);</div><div class='add'>+	aup-&gt;vaddr = dma_alloc_coherent(&amp;pdev-&gt;dev, MAX_BUF_SIZE *</div><div class='add'>+					(NUM_TX_BUFFS + NUM_RX_BUFFS),</div><div class='add'>+					&amp;aup-&gt;dma_addr, 0);</div><div class='ctx'> 	if (!aup-&gt;vaddr) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "failed to allocate data buffers\n");</div><div class='ctx'> 		err = -ENOMEM;</div><div class='hunk'>@@ -1224,7 +1142,7 @@ static int au1000_probe(struct platform_device *pdev)</div><div class='ctx'> </div><div class='ctx'> 	/* aup-&gt;mac is the base address of the MAC's registers */</div><div class='ctx'> 	aup-&gt;mac = (struct mac_reg *)</div><div class='del'>-			ioremap_nocache(base-&gt;start, resource_size(base));</div><div class='add'>+			ioremap(base-&gt;start, resource_size(base));</div><div class='ctx'> 	if (!aup-&gt;mac) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "failed to ioremap MAC registers\n");</div><div class='ctx'> 		err = -ENXIO;</div><div class='hunk'>@@ -1232,7 +1150,7 @@ static int au1000_probe(struct platform_device *pdev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Setup some variables for quick register address access */</div><div class='del'>-	aup-&gt;enable = (u32 *)ioremap_nocache(macen-&gt;start,</div><div class='add'>+	aup-&gt;enable = (u32 *)ioremap(macen-&gt;start,</div><div class='ctx'> 						resource_size(macen));</div><div class='ctx'> 	if (!aup-&gt;enable) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "failed to ioremap MAC enable register\n");</div><div class='hunk'>@@ -1241,7 +1159,7 @@ static int au1000_probe(struct platform_device *pdev)</div><div class='ctx'> 	}</div><div class='ctx'> 	aup-&gt;mac_id = pdev-&gt;id;</div><div class='ctx'> </div><div class='del'>-	aup-&gt;macdma = ioremap_nocache(macdma-&gt;start, resource_size(macdma));</div><div class='add'>+	aup-&gt;macdma = ioremap(macdma-&gt;start, resource_size(macdma));</div><div class='ctx'> 	if (!aup-&gt;macdma) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "failed to ioremap MACDMA registers\n");</div><div class='ctx'> 		err = -ENXIO;</div><div class='hunk'>@@ -1260,7 +1178,7 @@ static int au1000_probe(struct platform_device *pdev)</div><div class='ctx'> 		aup-&gt;phy1_search_mac0 = 1;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (is_valid_ether_addr(pd-&gt;mac)) {</div><div class='del'>-			memcpy(dev-&gt;dev_addr, pd-&gt;mac, ETH_ALEN);</div><div class='add'>+			eth_hw_addr_set(dev, pd-&gt;mac);</div><div class='ctx'> 		} else {</div><div class='ctx'> 			/* Set a random MAC since no valid provided by platform_data. */</div><div class='ctx'> 			eth_hw_addr_random(dev);</div><div class='hunk'>@@ -1274,14 +1192,14 @@ static int au1000_probe(struct platform_device *pdev)</div><div class='ctx'> 		aup-&gt;phy_irq = pd-&gt;phy_irq;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (aup-&gt;phy_busid &amp;&amp; aup-&gt;phy_busid &gt; 0) {</div><div class='add'>+	if (aup-&gt;phy_busid &gt; 0) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "MAC0-associated PHY attached 2nd MACs MII bus not supported yet\n");</div><div class='ctx'> 		err = -ENODEV;</div><div class='ctx'> 		goto err_mdiobus_alloc;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	aup-&gt;mii_bus = mdiobus_alloc();</div><div class='del'>-	if (aup-&gt;mii_bus == NULL) {</div><div class='add'>+	if (!aup-&gt;mii_bus) {</div><div class='ctx'> 		dev_err(&amp;pdev-&gt;dev, "failed to allocate mdiobus structure\n");</div><div class='ctx'> 		err = -ENOMEM;</div><div class='ctx'> 		goto err_mdiobus_alloc;</div><div class='hunk'>@@ -1294,14 +1212,7 @@ static int au1000_probe(struct platform_device *pdev)</div><div class='ctx'> 	aup-&gt;mii_bus-&gt;name = "au1000_eth_mii";</div><div class='ctx'> 	snprintf(aup-&gt;mii_bus-&gt;id, MII_BUS_ID_SIZE, "%s-%x",</div><div class='ctx'> 		pdev-&gt;name, aup-&gt;mac_id);</div><div class='del'>-	aup-&gt;mii_bus-&gt;irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);</div><div class='del'>-	if (aup-&gt;mii_bus-&gt;irq == NULL) {</div><div class='del'>-		err = -ENOMEM;</div><div class='del'>-		goto err_out;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; PHY_MAX_ADDR; ++i)</div><div class='del'>-		aup-&gt;mii_bus-&gt;irq[i] = PHY_POLL;</div><div class='ctx'> 	/* if known, set corresponding PHY IRQs */</div><div class='ctx'> 	if (aup-&gt;phy_static_config)</div><div class='ctx'> 		if (aup-&gt;phy_irq &amp;&amp; aup-&gt;phy_busid == aup-&gt;mac_id)</div><div class='hunk'>@@ -1323,8 +1234,8 @@ static int au1000_probe(struct platform_device *pdev)</div><div class='ctx'> 	for (i = 0; i &lt; (NUM_TX_BUFFS+NUM_RX_BUFFS); i++) {</div><div class='ctx'> 		pDB-&gt;pnext = pDBfree;</div><div class='ctx'> 		pDBfree = pDB;</div><div class='del'>-		pDB-&gt;vaddr = (u32 *)((unsigned)aup-&gt;vaddr + MAX_BUF_SIZE*i);</div><div class='del'>-		pDB-&gt;dma_addr = (dma_addr_t)virt_to_bus(pDB-&gt;vaddr);</div><div class='add'>+		pDB-&gt;vaddr = aup-&gt;vaddr + MAX_BUF_SIZE * i;</div><div class='add'>+		pDB-&gt;dma_addr = aup-&gt;dma_addr + MAX_BUF_SIZE * i;</div><div class='ctx'> 		pDB++;</div><div class='ctx'> 	}</div><div class='ctx'> 	aup-&gt;pDBfree = pDBfree;</div><div class='hunk'>@@ -1335,17 +1246,16 @@ static int au1000_probe(struct platform_device *pdev)</div><div class='ctx'> 		if (!pDB)</div><div class='ctx'> 			goto err_out;</div><div class='ctx'> </div><div class='del'>-		aup-&gt;rx_dma_ring[i]-&gt;buff_stat = (unsigned)pDB-&gt;dma_addr;</div><div class='add'>+		aup-&gt;rx_dma_ring[i]-&gt;buff_stat = lower_32_bits(pDB-&gt;dma_addr);</div><div class='ctx'> 		aup-&gt;rx_db_inuse[i] = pDB;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	err = -ENODEV;</div><div class='ctx'> 	for (i = 0; i &lt; NUM_TX_DMA; i++) {</div><div class='ctx'> 		pDB = au1000_GetFreeDB(aup);</div><div class='ctx'> 		if (!pDB)</div><div class='ctx'> 			goto err_out;</div><div class='ctx'> </div><div class='del'>-		aup-&gt;tx_dma_ring[i]-&gt;buff_stat = (unsigned)pDB-&gt;dma_addr;</div><div class='add'>+		aup-&gt;tx_dma_ring[i]-&gt;buff_stat = lower_32_bits(pDB-&gt;dma_addr);</div><div class='ctx'> 		aup-&gt;tx_dma_ring[i]-&gt;len = 0;</div><div class='ctx'> 		aup-&gt;tx_db_inuse[i] = pDB;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1371,12 +1281,10 @@ static int au1000_probe(struct platform_device *pdev)</div><div class='ctx'> 	netdev_info(dev, "Au1xx0 Ethernet found at 0x%lx, irq %d\n",</div><div class='ctx'> 			(unsigned long)base-&gt;start, irq);</div><div class='ctx'> </div><div class='del'>-	pr_info_once("%s version %s %s\n", DRV_NAME, DRV_VERSION, DRV_AUTHOR);</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_out:</div><div class='del'>-	if (aup-&gt;mii_bus != NULL)</div><div class='add'>+	if (aup-&gt;mii_bus)</div><div class='ctx'> 		mdiobus_unregister(aup-&gt;mii_bus);</div><div class='ctx'> </div><div class='ctx'> 	/* here we should have a valid dev plus aup-&gt; register addresses</div><div class='hunk'>@@ -1401,8 +1309,8 @@ err_remap3:</div><div class='ctx'> err_remap2:</div><div class='ctx'> 	iounmap(aup-&gt;mac);</div><div class='ctx'> err_remap1:</div><div class='del'>-	dma_free_noncoherent(NULL, MAX_BUF_SIZE * (NUM_TX_BUFFS + NUM_RX_BUFFS),</div><div class='del'>-			     (void *)aup-&gt;vaddr, aup-&gt;dma_addr);</div><div class='add'>+	dma_free_coherent(&amp;pdev-&gt;dev, MAX_BUF_SIZE * (NUM_TX_BUFFS + NUM_RX_BUFFS),</div><div class='add'>+			  aup-&gt;vaddr, aup-&gt;dma_addr);</div><div class='ctx'> err_vaddr:</div><div class='ctx'> 	free_netdev(dev);</div><div class='ctx'> err_alloc:</div><div class='hunk'>@@ -1415,7 +1323,7 @@ out:</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int au1000_remove(struct platform_device *pdev)</div><div class='add'>+static void au1000_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = platform_get_drvdata(pdev);</div><div class='ctx'> 	struct au1000_private *aup = netdev_priv(dev);</div><div class='hunk'>@@ -1434,9 +1342,8 @@ static int au1000_remove(struct platform_device *pdev)</div><div class='ctx'> 		if (aup-&gt;tx_db_inuse[i])</div><div class='ctx'> 			au1000_ReleaseDB(aup, aup-&gt;tx_db_inuse[i]);</div><div class='ctx'> </div><div class='del'>-	dma_free_noncoherent(NULL, MAX_BUF_SIZE *</div><div class='del'>-			(NUM_TX_BUFFS + NUM_RX_BUFFS),</div><div class='del'>-			(void *)aup-&gt;vaddr, aup-&gt;dma_addr);</div><div class='add'>+	dma_free_coherent(&amp;pdev-&gt;dev, MAX_BUF_SIZE * (NUM_TX_BUFFS + NUM_RX_BUFFS),</div><div class='add'>+			  aup-&gt;vaddr, aup-&gt;dma_addr);</div><div class='ctx'> </div><div class='ctx'> 	iounmap(aup-&gt;macdma);</div><div class='ctx'> 	iounmap(aup-&gt;mac);</div><div class='hunk'>@@ -1452,8 +1359,6 @@ static int au1000_remove(struct platform_device *pdev)</div><div class='ctx'> 	release_mem_region(macen-&gt;start, resource_size(macen));</div><div class='ctx'> </div><div class='ctx'> 	free_netdev(dev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver au1000_eth_driver = {</div><div class='head'>diff --git a/drivers/net/ethernet/amd/au1000_eth.h b/drivers/net/ethernet/amd/au1000_eth.h<br/>index ca53024f017f..2489c2f4fd8a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/au1000_eth.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/au1000_eth.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/au1000_eth.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/au1000_eth.h</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='ctx'> /*</div><div class='ctx'>  *</div><div class='ctx'>  * Alchemy Au1x00 ethernet driver include file</div><div class='hunk'>@@ -5,24 +6,6 @@</div><div class='ctx'>  * Author: Pete Popov &lt;ppopov@mvista.com&gt;</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright 2001 MontaVista Software Inc.</div><div class='del'>- *</div><div class='del'>- * ########################################################################</div><div class='del'>- *</div><div class='del'>- *  This program is free software; you can distribute it and/or modify it</div><div class='del'>- *  under the terms of the GNU General Public License (Version 2) as</div><div class='del'>- *  published by the Free Software Foundation.</div><div class='del'>- *</div><div class='del'>- *  This program is distributed in the hope it will be useful, but WITHOUT</div><div class='del'>- *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or</div><div class='del'>- *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License</div><div class='del'>- *  for more details.</div><div class='del'>- *</div><div class='del'>- *  You should have received a copy of the GNU General Public License along</div><div class='del'>- *  with this program; if not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='del'>- *</div><div class='del'>- * ########################################################################</div><div class='del'>- *</div><div class='del'>- *</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -106,7 +89,6 @@ struct au1000_private {</div><div class='ctx'> 	int old_speed;</div><div class='ctx'> 	int old_duplex;</div><div class='ctx'> </div><div class='del'>-	struct phy_device *phy_dev;</div><div class='ctx'> 	struct mii_bus *mii_bus;</div><div class='ctx'> </div><div class='ctx'> 	/* PHY configuration */</div><div class='hunk'>@@ -124,8 +106,8 @@ struct au1000_private {</div><div class='ctx'> 	struct mac_reg *mac;  /* mac registers                      */</div><div class='ctx'> 	u32 *enable;     /* address of MAC Enable Register     */</div><div class='ctx'> 	void __iomem *macdma;	/* base of MAC DMA port */</div><div class='del'>-	u32 vaddr;                /* virtual address of rx/tx buffers   */</div><div class='del'>-	dma_addr_t dma_addr;      /* dma address of rx/tx buffers       */</div><div class='add'>+	void *vaddr;		/* virtual address of rx/tx buffers   */</div><div class='add'>+	dma_addr_t dma_addr;	/* dma address of rx/tx buffers       */</div><div class='ctx'> </div><div class='ctx'> 	spinlock_t lock;       /* Serialise access to device */</div><div class='ctx'> </div><div class='head'>diff --git a/drivers/net/ethernet/amd/declance.c b/drivers/net/ethernet/amd/declance.c<br/>index b584b78237df..8d05a0c5f2d5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/declance.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/declance.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/declance.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/declance.c</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='ctx'>  *    Lance ethernet driver for the MIPS processor based</div><div class='ctx'>  *      DECstation family</div><div class='hunk'>@@ -72,7 +73,7 @@</div><div class='ctx'> #include &lt;asm/dec/machtype.h&gt;</div><div class='ctx'> #include &lt;asm/dec/system.h&gt;</div><div class='ctx'> </div><div class='del'>-static char version[] =</div><div class='add'>+static const char version[] =</div><div class='ctx'> "declance.c: v0.011 by Linux MIPS DECstation task force\n";</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("Linux MIPS DECstation task force");</div><div class='hunk'>@@ -260,6 +261,7 @@ struct lance_private {</div><div class='ctx'> 	unsigned short busmaster_regval;</div><div class='ctx'> </div><div class='ctx'> 	struct timer_list       multicast_timer;</div><div class='add'>+	struct net_device	*dev;</div><div class='ctx'> </div><div class='ctx'> 	/* Pointers to the ring buffers as seen from the CPU */</div><div class='ctx'> 	char *rx_buf_ptr_cpu[RX_RING_SIZE];</div><div class='hunk'>@@ -606,7 +608,7 @@ static int lance_rx(struct net_device *dev)</div><div class='ctx'> 			len = (*rds_ptr(rd, mblength, lp-&gt;type) &amp; 0xfff) - 4;</div><div class='ctx'> 			skb = netdev_alloc_skb(dev, len + 2);</div><div class='ctx'> </div><div class='del'>-			if (skb == 0) {</div><div class='add'>+			if (!skb) {</div><div class='ctx'> 				dev-&gt;stats.rx_dropped++;</div><div class='ctx'> 				*rds_ptr(rd, mblength, lp-&gt;type) = 0;</div><div class='ctx'> 				*rds_ptr(rd, rmd1, lp-&gt;type) =</div><div class='hunk'>@@ -840,7 +842,7 @@ static int lance_close(struct net_device *dev)</div><div class='ctx'> 	volatile struct lance_regs *ll = lp-&gt;ll;</div><div class='ctx'> </div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='del'>-	del_timer_sync(&amp;lp-&gt;multicast_timer);</div><div class='add'>+	timer_delete_sync(&amp;lp-&gt;multicast_timer);</div><div class='ctx'> </div><div class='ctx'> 	/* Stop the card */</div><div class='ctx'> 	writereg(&amp;ll-&gt;rap, LE_CSR0);</div><div class='hunk'>@@ -877,12 +879,12 @@ static inline int lance_reset(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	lance_init_ring(dev);</div><div class='ctx'> 	load_csrs(lp);</div><div class='del'>-	dev-&gt;trans_start = jiffies; /* prevent tx timeout */</div><div class='add'>+	netif_trans_update(dev); /* prevent tx timeout */</div><div class='ctx'> 	status = init_restart_lance(lp);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void lance_tx_timeout(struct net_device *dev)</div><div class='add'>+static void lance_tx_timeout(struct net_device *dev, unsigned int txqueue)</div><div class='ctx'> {</div><div class='ctx'> 	struct lance_private *lp = netdev_priv(dev);</div><div class='ctx'> 	volatile struct lance_regs *ll = lp-&gt;ll;</div><div class='hunk'>@@ -893,7 +895,7 @@ static void lance_tx_timeout(struct net_device *dev)</div><div class='ctx'> 	netif_wake_queue(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='add'>+static netdev_tx_t lance_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct lance_private *lp = netdev_priv(dev);</div><div class='ctx'> 	volatile struct lance_regs *ll = lp-&gt;ll;</div><div class='hunk'>@@ -935,7 +937,7 @@ static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	dev_kfree_skb(skb);</div><div class='ctx'> </div><div class='del'>- 	return NETDEV_TX_OK;</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void lance_load_multicast(struct net_device *dev)</div><div class='hunk'>@@ -1000,9 +1002,10 @@ static void lance_set_multicast(struct net_device *dev)</div><div class='ctx'> 	netif_wake_queue(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void lance_set_multicast_retry(unsigned long _opaque)</div><div class='add'>+static void lance_set_multicast_retry(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *dev = (struct net_device *) _opaque;</div><div class='add'>+	struct lance_private *lp = timer_container_of(lp, t, multicast_timer);</div><div class='add'>+	struct net_device *dev = lp-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 	lance_set_multicast(dev);</div><div class='ctx'> }</div><div class='hunk'>@@ -1013,7 +1016,6 @@ static const struct net_device_ops lance_netdev_ops = {</div><div class='ctx'> 	.ndo_start_xmit		= lance_start_xmit,</div><div class='ctx'> 	.ndo_tx_timeout		= lance_tx_timeout,</div><div class='ctx'> 	.ndo_set_rx_mode	= lance_set_multicast,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> 	.ndo_set_mac_address	= eth_mac_addr,</div><div class='ctx'> };</div><div class='hunk'>@@ -1030,6 +1032,8 @@ static int dec_lance_probe(struct device *bdev, const int type)</div><div class='ctx'> 	int i, ret;</div><div class='ctx'> 	unsigned long esar_base;</div><div class='ctx'> 	unsigned char *esar;</div><div class='add'>+	u8 addr[ETH_ALEN];</div><div class='add'>+	const char *desc;</div><div class='ctx'> </div><div class='ctx'> 	if (dec_lance_debug &amp;&amp; version_printed++ == 0)</div><div class='ctx'> 		printk(version);</div><div class='hunk'>@@ -1215,19 +1219,21 @@ static int dec_lance_probe(struct device *bdev, const int type)</div><div class='ctx'> 	 */</div><div class='ctx'> 	switch (type) {</div><div class='ctx'> 	case ASIC_LANCE:</div><div class='del'>-		printk("%s: IOASIC onboard LANCE", name);</div><div class='add'>+		desc = "IOASIC onboard LANCE";</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PMAD_LANCE:</div><div class='del'>-		printk("%s: PMAD-AA", name);</div><div class='add'>+		desc = "PMAD-AA";</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PMAX_LANCE:</div><div class='del'>-		printk("%s: PMAX onboard LANCE", name);</div><div class='add'>+		desc = "PMAX onboard LANCE";</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> 	for (i = 0; i &lt; 6; i++)</div><div class='del'>-		dev-&gt;dev_addr[i] = esar[i * 4];</div><div class='add'>+		addr[i] = esar[i * 4];</div><div class='add'>+	eth_hw_addr_set(dev, addr);</div><div class='ctx'> </div><div class='del'>-	printk(", addr = %pM, irq = %d\n", dev-&gt;dev_addr, dev-&gt;irq);</div><div class='add'>+	printk("%s: %s, addr = %pM, irq = %d\n",</div><div class='add'>+	       name, desc, dev-&gt;dev_addr, dev-&gt;irq);</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;netdev_ops = &amp;lance_netdev_ops;</div><div class='ctx'> 	dev-&gt;watchdog_timeo = 5*HZ;</div><div class='hunk'>@@ -1247,9 +1253,9 @@ static int dec_lance_probe(struct device *bdev, const int type)</div><div class='ctx'> 	 * can occur from interrupts (ex. IPv6).  So we</div><div class='ctx'> 	 * use a timer to try again later when necessary. -DaveM</div><div class='ctx'> 	 */</div><div class='del'>-	init_timer(&amp;lp-&gt;multicast_timer);</div><div class='del'>-	lp-&gt;multicast_timer.data = (unsigned long) dev;</div><div class='del'>-	lp-&gt;multicast_timer.function = lance_set_multicast_retry;</div><div class='add'>+	lp-&gt;dev = dev;</div><div class='add'>+	timer_setup(&amp;lp-&gt;multicast_timer, lance_set_multicast_retry, 0);</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> 	ret = register_netdev(dev);</div><div class='ctx'> 	if (ret) {</div><div class='hunk'>@@ -1277,18 +1283,6 @@ err_out:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __exit dec_lance_remove(struct device *bdev)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = dev_get_drvdata(bdev);</div><div class='del'>-	resource_size_t start, len;</div><div class='del'>-</div><div class='del'>-	unregister_netdev(dev);</div><div class='del'>-	start = to_tc_dev(bdev)-&gt;resource.start;</div><div class='del'>-	len = to_tc_dev(bdev)-&gt;resource.end - start + 1;</div><div class='del'>-	release_mem_region(start, len);</div><div class='del'>-	free_netdev(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /* Find all the lance cards on the system and initialize them */</div><div class='ctx'> static int __init dec_lance_platform_probe(void)</div><div class='ctx'> {</div><div class='hunk'>@@ -1321,7 +1315,7 @@ static void __exit dec_lance_platform_remove(void)</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_TC</div><div class='ctx'> static int dec_lance_tc_probe(struct device *dev);</div><div class='del'>-static int __exit dec_lance_tc_remove(struct device *dev);</div><div class='add'>+static int dec_lance_tc_remove(struct device *dev);</div><div class='ctx'> </div><div class='ctx'> static const struct tc_device_id dec_lance_tc_table[] = {</div><div class='ctx'> 	{ "DEC     ", "PMAD-AA " },</div><div class='hunk'>@@ -1335,7 +1329,7 @@ static struct tc_driver dec_lance_tc_driver = {</div><div class='ctx'> 		.name	= "declance",</div><div class='ctx'> 		.bus	= &amp;tc_bus_type,</div><div class='ctx'> 		.probe	= dec_lance_tc_probe,</div><div class='del'>-		.remove	= __exit_p(dec_lance_tc_remove),</div><div class='add'>+		.remove	= dec_lance_tc_remove,</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1347,7 +1341,19 @@ static int dec_lance_tc_probe(struct device *dev)</div><div class='ctx'>         return status;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __exit dec_lance_tc_remove(struct device *dev)</div><div class='add'>+static void dec_lance_remove(struct device *bdev)</div><div class='add'>+{</div><div class='add'>+	struct net_device *dev = dev_get_drvdata(bdev);</div><div class='add'>+	resource_size_t start, len;</div><div class='add'>+</div><div class='add'>+	unregister_netdev(dev);</div><div class='add'>+	start = to_tc_dev(bdev)-&gt;resource.start;</div><div class='add'>+	len = to_tc_dev(bdev)-&gt;resource.end - start + 1;</div><div class='add'>+	release_mem_region(start, len);</div><div class='add'>+	free_netdev(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int dec_lance_tc_remove(struct device *dev)</div><div class='ctx'> {</div><div class='ctx'>         put_device(dev);</div><div class='ctx'>         dec_lance_remove(dev);</div><div class='head'>diff --git a/drivers/net/ethernet/amd/hplance.c b/drivers/net/ethernet/amd/hplance.c<br/>index 6c9de117ffc6..df42294530cb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/hplance.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/hplance.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/hplance.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/hplance.c</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /* hplance.c  : the  Linux/hp300/lance ethernet driver</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 05/1998 Peter Maydell &lt;pmaydell@chiark.greenend.org.uk&gt;</div><div class='hunk'>@@ -14,6 +15,7 @@</div><div class='ctx'> #include &lt;linux/delay.h&gt;</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/pgtable.h&gt;</div><div class='ctx'> /* Used for the temporal inet entries and routing */</div><div class='ctx'> #include &lt;linux/socket.h&gt;</div><div class='ctx'> #include &lt;linux/route.h&gt;</div><div class='hunk'>@@ -23,7 +25,6 @@</div><div class='ctx'> #include &lt;linux/skbuff.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "hplance.h"</div><div class='ctx'> </div><div class='hunk'>@@ -72,7 +73,6 @@ static const struct net_device_ops hplance_netdev_ops = {</div><div class='ctx'> 	.ndo_stop		= hplance_close,</div><div class='ctx'> 	.ndo_start_xmit		= lance_start_xmit,</div><div class='ctx'> 	.ndo_set_rx_mode	= lance_set_multicast,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> 	.ndo_set_mac_address	= eth_mac_addr,</div><div class='ctx'> #ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='hunk'>@@ -129,6 +129,7 @@ static void hplance_init(struct net_device *dev, struct dio_dev *d)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long va = (d-&gt;resource.start + DIO_VIRADDRBASE);</div><div class='ctx'> 	struct hplance_private *lp;</div><div class='add'>+	u8 addr[ETH_ALEN];</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	/* reset the board */</div><div class='hunk'>@@ -144,9 +145,10 @@ static void hplance_init(struct net_device *dev, struct dio_dev *d)</div><div class='ctx'> 		/* The NVRAM holds our ethernet address, one nibble per byte,</div><div class='ctx'> 		 * at bytes NVRAMOFF+1,3,5,7,9...</div><div class='ctx'> 		 */</div><div class='del'>-		dev-&gt;dev_addr[i] = ((in_8(va + HPLANCE_NVRAMOFF + i*4 + 1) &amp; 0xF) &lt;&lt; 4)</div><div class='add'>+		addr[i] = ((in_8(va + HPLANCE_NVRAMOFF + i*4 + 1) &amp; 0xF) &lt;&lt; 4)</div><div class='ctx'> 			| (in_8(va + HPLANCE_NVRAMOFF + i*4 + 3) &amp; 0xF);</div><div class='ctx'> 	}</div><div class='add'>+	eth_hw_addr_set(dev, addr);</div><div class='ctx'> </div><div class='ctx'> 	lp = netdev_priv(dev);</div><div class='ctx'> 	lp-&gt;lance.name = d-&gt;name;</div><div class='hunk'>@@ -170,6 +172,7 @@ static void hplance_init(struct net_device *dev, struct dio_dev *d)</div><div class='ctx'> static void hplance_writerap(void *priv, unsigned short value)</div><div class='ctx'> {</div><div class='ctx'> 	struct lance_private *lp = (struct lance_private *)priv;</div><div class='add'>+</div><div class='ctx'> 	do {</div><div class='ctx'> 		out_be16(lp-&gt;base + HPLANCE_REGOFF + LANCE_RAP, value);</div><div class='ctx'> 	} while ((in_8(lp-&gt;base + HPLANCE_STATUS) &amp; LE_ACK) == 0);</div><div class='hunk'>@@ -178,6 +181,7 @@ static void hplance_writerap(void *priv, unsigned short value)</div><div class='ctx'> static void hplance_writerdp(void *priv, unsigned short value)</div><div class='ctx'> {</div><div class='ctx'> 	struct lance_private *lp = (struct lance_private *)priv;</div><div class='add'>+</div><div class='ctx'> 	do {</div><div class='ctx'> 		out_be16(lp-&gt;base + HPLANCE_REGOFF + LANCE_RDP, value);</div><div class='ctx'> 	} while ((in_8(lp-&gt;base + HPLANCE_STATUS) &amp; LE_ACK) == 0);</div><div class='hunk'>@@ -187,6 +191,7 @@ static unsigned short hplance_readrdp(void *priv)</div><div class='ctx'> {</div><div class='ctx'> 	struct lance_private *lp = (struct lance_private *)priv;</div><div class='ctx'> 	__u16 value;</div><div class='add'>+</div><div class='ctx'> 	do {</div><div class='ctx'> 		value = in_be16(lp-&gt;base + HPLANCE_REGOFF + LANCE_RDP);</div><div class='ctx'> 	} while ((in_8(lp-&gt;base + HPLANCE_STATUS) &amp; LE_ACK) == 0);</div><div class='hunk'>@@ -229,4 +234,5 @@ static void __exit hplance_cleanup_module(void)</div><div class='ctx'> module_init(hplance_init_module);</div><div class='ctx'> module_exit(hplance_cleanup_module);</div><div class='ctx'> </div><div class='add'>+MODULE_DESCRIPTION("HP300 on-board LANCE Ethernet driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/amd/hplance.h b/drivers/net/ethernet/amd/hplance.h<br/>index 04aee9e0376a..bc845a2c60c1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/hplance.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/hplance.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/hplance.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/hplance.h</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='ctx'> /* Random defines and structures for the HP Lance driver.</div><div class='ctx'>  * Copyright (C) 05/1998 Peter Maydell &lt;pmaydell@chiark.greenend.org.uk&gt;</div><div class='ctx'>  * Based on the Sun Lance driver and the NetBSD HP Lance driver</div><div class='head'>diff --git a/drivers/net/ethernet/amd/lance.c b/drivers/net/ethernet/amd/lance.c<br/>index 256f590f6bb1..b1e6620ad41d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/lance.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/lance.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/lance.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/lance.c</a></div><div class='hunk'>@@ -59,6 +59,7 @@ static const char version[] = "lance.c:v1.16 2006/11/09 dplatt@3do.com, becker@c</div><div class='ctx'> #include &lt;linux/skbuff.h&gt;</div><div class='ctx'> #include &lt;linux/mm.h&gt;</div><div class='ctx'> #include &lt;linux/bitops.h&gt;</div><div class='add'>+#include &lt;net/Space.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/dma.h&gt;</div><div class='hunk'>@@ -306,7 +307,7 @@ static irqreturn_t lance_interrupt(int irq, void *dev_id);</div><div class='ctx'> static int lance_close(struct net_device *dev);</div><div class='ctx'> static struct net_device_stats *lance_get_stats(struct net_device *dev);</div><div class='ctx'> static void set_multicast_list(struct net_device *dev);</div><div class='del'>-static void lance_tx_timeout (struct net_device *dev);</div><div class='add'>+static void lance_tx_timeout (struct net_device *dev, unsigned int txqueue);</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -318,16 +319,16 @@ static int io[MAX_CARDS];</div><div class='ctx'> static int dma[MAX_CARDS];</div><div class='ctx'> static int irq[MAX_CARDS];</div><div class='ctx'> </div><div class='del'>-module_param_array(io, int, NULL, 0);</div><div class='del'>-module_param_array(dma, int, NULL, 0);</div><div class='del'>-module_param_array(irq, int, NULL, 0);</div><div class='add'>+module_param_hw_array(io, int, ioport, NULL, 0);</div><div class='add'>+module_param_hw_array(dma, int, dma, NULL, 0);</div><div class='add'>+module_param_hw_array(irq, int, irq, NULL, 0);</div><div class='ctx'> module_param(lance_debug, int, 0);</div><div class='ctx'> MODULE_PARM_DESC(io, "LANCE/PCnet I/O base address(es),required");</div><div class='ctx'> MODULE_PARM_DESC(dma, "LANCE/PCnet ISA DMA channel (ignored for some devices)");</div><div class='ctx'> MODULE_PARM_DESC(irq, "LANCE/PCnet IRQ number (ignored for some devices)");</div><div class='ctx'> MODULE_PARM_DESC(lance_debug, "LANCE/PCnet debug level (0-7)");</div><div class='ctx'> </div><div class='del'>-int __init init_module(void)</div><div class='add'>+static int __init lance_init_module(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev;</div><div class='ctx'> 	int this_dev, found = 0;</div><div class='hunk'>@@ -356,6 +357,7 @@ int __init init_module(void)</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	return -ENXIO;</div><div class='ctx'> }</div><div class='add'>+module_init(lance_init_module);</div><div class='ctx'> </div><div class='ctx'> static void cleanup_card(struct net_device *dev)</div><div class='ctx'> {</div><div class='hunk'>@@ -368,7 +370,7 @@ static void cleanup_card(struct net_device *dev)</div><div class='ctx'> 	kfree(lp);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-void __exit cleanup_module(void)</div><div class='add'>+static void __exit lance_cleanup_module(void)</div><div class='ctx'> {</div><div class='ctx'> 	int this_dev;</div><div class='ctx'> </div><div class='hunk'>@@ -381,7 +383,9 @@ void __exit cleanup_module(void)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='add'>+module_exit(lance_cleanup_module);</div><div class='ctx'> #endif /* MODULE */</div><div class='add'>+MODULE_DESCRIPTION("AMD LANCE/PCnet Ethernet driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -461,7 +465,6 @@ static const struct net_device_ops lance_netdev_ops = {</div><div class='ctx'> 	.ndo_get_stats		= lance_get_stats,</div><div class='ctx'> 	.ndo_set_rx_mode	= set_multicast_list,</div><div class='ctx'> 	.ndo_tx_timeout		= lance_tx_timeout,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='ctx'> 	.ndo_set_mac_address 	= eth_mac_addr,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> };</div><div class='hunk'>@@ -479,6 +482,7 @@ static int __init lance_probe1(struct net_device *dev, int ioaddr, int irq, int</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int err = -ENOMEM;</div><div class='ctx'> 	void __iomem *bios;</div><div class='add'>+	u8 addr[ETH_ALEN];</div><div class='ctx'> </div><div class='ctx'> 	/* First we look for special cases.</div><div class='ctx'> 	   Check for HP's on-board ethernet by looking for 'HP' in the BIOS.</div><div class='hunk'>@@ -540,25 +544,26 @@ static int __init lance_probe1(struct net_device *dev, int ioaddr, int irq, int</div><div class='ctx'> 	/* There is a 16 byte station address PROM at the base address.</div><div class='ctx'> 	   The first six bytes are the station address. */</div><div class='ctx'> 	for (i = 0; i &lt; 6; i++)</div><div class='del'>-		dev-&gt;dev_addr[i] = inb(ioaddr + i);</div><div class='add'>+		addr[i] = inb(ioaddr + i);</div><div class='add'>+	eth_hw_addr_set(dev, addr);</div><div class='ctx'> 	printk("%pM", dev-&gt;dev_addr);</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;base_addr = ioaddr;</div><div class='ctx'> 	/* Make certain the data structures used by the LANCE are aligned and DMAble. */</div><div class='ctx'> </div><div class='ctx'> 	lp = kzalloc(sizeof(*lp), GFP_DMA | GFP_KERNEL);</div><div class='del'>-	if(lp==NULL)</div><div class='del'>-		return -ENODEV;</div><div class='add'>+	if (!lp)</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> 	if (lance_debug &gt; 6) printk(" (#0x%05lx)", (unsigned long)lp);</div><div class='ctx'> 	dev-&gt;ml_priv = lp;</div><div class='ctx'> 	lp-&gt;name = chipname;</div><div class='del'>-	lp-&gt;rx_buffs = (unsigned long)kmalloc(PKT_BUF_SZ*RX_RING_SIZE,</div><div class='del'>-						  GFP_DMA | GFP_KERNEL);</div><div class='add'>+	lp-&gt;rx_buffs = (unsigned long)kmalloc_array(RX_RING_SIZE, PKT_BUF_SZ,</div><div class='add'>+						    GFP_DMA | GFP_KERNEL);</div><div class='ctx'> 	if (!lp-&gt;rx_buffs)</div><div class='ctx'> 		goto out_lp;</div><div class='ctx'> 	if (lance_need_isa_bounce_buffers) {</div><div class='del'>-		lp-&gt;tx_bounce_buffs = kmalloc(PKT_BUF_SZ*TX_RING_SIZE,</div><div class='del'>-						  GFP_DMA | GFP_KERNEL);</div><div class='add'>+		lp-&gt;tx_bounce_buffs = kmalloc_array(TX_RING_SIZE, PKT_BUF_SZ,</div><div class='add'>+						    GFP_DMA | GFP_KERNEL);</div><div class='ctx'> 		if (!lp-&gt;tx_bounce_buffs)</div><div class='ctx'> 			goto out_rx;</div><div class='ctx'> 	} else</div><div class='hunk'>@@ -781,7 +786,7 @@ lance_open(struct net_device *dev)</div><div class='ctx'> 		outw(0x0002, ioaddr+LANCE_ADDR);</div><div class='ctx'> 		/* Only touch autoselect bit. */</div><div class='ctx'> 		outw(inw(ioaddr+LANCE_BUS_IF) | 0x0002, ioaddr+LANCE_BUS_IF);</div><div class='del'>- 	}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (lance_debug &gt; 1)</div><div class='ctx'> 		printk("%s: lance_open() irq %d dma %d tx/rx rings %#x/%#x init %#x.\n",</div><div class='hunk'>@@ -813,7 +818,7 @@ lance_open(struct net_device *dev)</div><div class='ctx'> 	 * We used to clear the InitDone bit, 0x0100, here but Mark Stockton</div><div class='ctx'> 	 * reports that doing so triggers a bug in the '974.</div><div class='ctx'> 	 */</div><div class='del'>- 	outw(0x0042, ioaddr+LANCE_DATA);</div><div class='add'>+	outw(0x0042, ioaddr+LANCE_DATA);</div><div class='ctx'> </div><div class='ctx'> 	if (lance_debug &gt; 2)</div><div class='ctx'> 		printk("%s: LANCE open after %d ticks, init block %#x csr0 %4.4x.\n",</div><div class='hunk'>@@ -877,7 +882,7 @@ lance_init_ring(struct net_device *dev, gfp_t gfp)</div><div class='ctx'> 			rx_buff = skb-&gt;data;</div><div class='ctx'> 		else</div><div class='ctx'> 			rx_buff = kmalloc(PKT_BUF_SZ, GFP_DMA | gfp);</div><div class='del'>-		if (rx_buff == NULL)</div><div class='add'>+		if (!rx_buff)</div><div class='ctx'> 			lp-&gt;rx_ring[i].base = 0;</div><div class='ctx'> 		else</div><div class='ctx'> 			lp-&gt;rx_ring[i].base = (u32)isa_virt_to_bus(rx_buff) | 0x80000000;</div><div class='hunk'>@@ -914,7 +919,7 @@ lance_restart(struct net_device *dev, unsigned int csr0_bits, int must_reinit)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-static void lance_tx_timeout (struct net_device *dev)</div><div class='add'>+static void lance_tx_timeout (struct net_device *dev, unsigned int txqueue)</div><div class='ctx'> {</div><div class='ctx'> 	struct lance_private *lp = (struct lance_private *) dev-&gt;ml_priv;</div><div class='ctx'> 	int ioaddr = dev-&gt;base_addr;</div><div class='hunk'>@@ -943,7 +948,7 @@ static void lance_tx_timeout (struct net_device *dev)</div><div class='ctx'> #endif</div><div class='ctx'> 	lance_restart (dev, 0x0043, 1);</div><div class='ctx'> </div><div class='del'>-	dev-&gt;trans_start = jiffies; /* prevent tx timeout */</div><div class='add'>+	netif_trans_update(dev); /* prevent tx timeout */</div><div class='ctx'> 	netif_wake_queue (dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -998,7 +1003,7 @@ static netdev_tx_t lance_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 		skb_copy_from_linear_data(skb, &amp;lp-&gt;tx_bounce_buffs[entry], skb-&gt;len);</div><div class='ctx'> 		lp-&gt;tx_ring[entry].base =</div><div class='ctx'> 			((u32)isa_virt_to_bus((lp-&gt;tx_bounce_buffs + entry)) &amp; 0xffffff) | 0x83000000;</div><div class='del'>-		dev_kfree_skb(skb);</div><div class='add'>+		dev_consume_skb_irq(skb);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		lp-&gt;tx_skbuff[entry] = skb;</div><div class='ctx'> 		lp-&gt;tx_ring[entry].base = ((u32)isa_virt_to_bus(skb-&gt;data) &amp; 0xffffff) | 0x83000000;</div><div class='hunk'>@@ -1085,7 +1090,7 @@ static irqreturn_t lance_interrupt(int irq, void *dev_id)</div><div class='ctx'> 				/* We must free the original skb if it's not a data-only copy</div><div class='ctx'> 				   in the bounce buffer. */</div><div class='ctx'> 				if (lp-&gt;tx_skbuff[entry]) {</div><div class='del'>-					dev_kfree_skb_irq(lp-&gt;tx_skbuff[entry]);</div><div class='add'>+					dev_consume_skb_irq(lp-&gt;tx_skbuff[entry]);</div><div class='ctx'> 					lp-&gt;tx_skbuff[entry] = NULL;</div><div class='ctx'> 				}</div><div class='ctx'> 				dirty_tx++;</div><div class='hunk'>@@ -1183,7 +1188,7 @@ lance_rx(struct net_device *dev)</div><div class='ctx'> 			else</div><div class='ctx'> 			{</div><div class='ctx'> 				skb = dev_alloc_skb(pkt_len+2);</div><div class='del'>-				if (skb == NULL)</div><div class='add'>+				if (!skb)</div><div class='ctx'> 				{</div><div class='ctx'> 					printk("%s: Memory squeeze, deferring packet.\n", dev-&gt;name);</div><div class='ctx'> 					for (i=0; i &lt; RX_RING_SIZE; i++)</div><div class='head'>diff --git a/drivers/net/ethernet/amd/mvme147.c b/drivers/net/ethernet/amd/mvme147.c<br/>index 0660ac5846bb..f19b04b92fa9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/mvme147.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/mvme147.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/mvme147.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/mvme147.c</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /* mvme147.c  : the  Linux/mvme147/lance ethernet driver</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 05/1998 Peter Maydell &lt;pmaydell@chiark.greenend.org.uk&gt;</div><div class='hunk'>@@ -15,6 +16,7 @@</div><div class='ctx'> #include &lt;linux/init.h&gt;</div><div class='ctx'> #include &lt;linux/errno.h&gt;</div><div class='ctx'> #include &lt;linux/gfp.h&gt;</div><div class='add'>+#include &lt;linux/pgtable.h&gt;</div><div class='ctx'> /* Used for the temporal inet entries and routing */</div><div class='ctx'> #include &lt;linux/socket.h&gt;</div><div class='ctx'> #include &lt;linux/route.h&gt;</div><div class='hunk'>@@ -23,7 +25,6 @@</div><div class='ctx'> #include &lt;linux/skbuff.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/mvme147hw.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* We have 32K of RAM for the init block and buffers. This places</div><div class='hunk'>@@ -62,18 +63,18 @@ static const struct net_device_ops lance_netdev_ops = {</div><div class='ctx'> 	.ndo_start_xmit		= lance_start_xmit,</div><div class='ctx'> 	.ndo_set_rx_mode	= lance_set_multicast,</div><div class='ctx'> 	.ndo_tx_timeout		= lance_tx_timeout,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> 	.ndo_set_mac_address	= eth_mac_addr,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Initialise the one and only on-board 7990 */</div><div class='del'>-struct net_device * __init mvme147lance_probe(int unit)</div><div class='add'>+static struct net_device * __init mvme147lance_probe(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev;</div><div class='ctx'> 	static int called;</div><div class='ctx'> 	static const char name[] = "MVME147 LANCE";</div><div class='ctx'> 	struct m147lance_private *lp;</div><div class='add'>+	u8 macaddr[ETH_ALEN];</div><div class='ctx'> 	u_long *addr;</div><div class='ctx'> 	u_long address;</div><div class='ctx'> 	int err;</div><div class='hunk'>@@ -86,9 +87,6 @@ struct net_device * __init mvme147lance_probe(int unit)</div><div class='ctx'> 	if (!dev)</div><div class='ctx'> 		return ERR_PTR(-ENOMEM);</div><div class='ctx'> </div><div class='del'>-	if (unit &gt;= 0)</div><div class='del'>-		sprintf(dev-&gt;name, "eth%d", unit);</div><div class='del'>-</div><div class='ctx'> 	/* Fill the dev fields */</div><div class='ctx'> 	dev-&gt;base_addr = (unsigned long)MVME147_LANCE_BASE;</div><div class='ctx'> 	dev-&gt;netdev_ops = &amp;lance_netdev_ops;</div><div class='hunk'>@@ -96,19 +94,16 @@ struct net_device * __init mvme147lance_probe(int unit)</div><div class='ctx'> </div><div class='ctx'> 	addr = (u_long *)ETHERNET_ADDRESS;</div><div class='ctx'> 	address = *addr;</div><div class='del'>-	dev-&gt;dev_addr[0] = 0x08;</div><div class='del'>-	dev-&gt;dev_addr[1] = 0x00;</div><div class='del'>-	dev-&gt;dev_addr[2] = 0x3e;</div><div class='add'>+	macaddr[0] = 0x08;</div><div class='add'>+	macaddr[1] = 0x00;</div><div class='add'>+	macaddr[2] = 0x3e;</div><div class='ctx'> 	address = address &gt;&gt; 8;</div><div class='del'>-	dev-&gt;dev_addr[5] = address&amp;0xff;</div><div class='add'>+	macaddr[5] = address&amp;0xff;</div><div class='ctx'> 	address = address &gt;&gt; 8;</div><div class='del'>-	dev-&gt;dev_addr[4] = address&amp;0xff;</div><div class='add'>+	macaddr[4] = address&amp;0xff;</div><div class='ctx'> 	address = address &gt;&gt; 8;</div><div class='del'>-	dev-&gt;dev_addr[3] = address&amp;0xff;</div><div class='del'>-</div><div class='del'>-	printk("%s: MVME147 at 0x%08lx, irq %d, Hardware Address %pM\n",</div><div class='del'>-	       dev-&gt;name, dev-&gt;base_addr, MVME147_LANCE_IRQ,</div><div class='del'>-	       dev-&gt;dev_addr);</div><div class='add'>+	macaddr[3] = address&amp;0xff;</div><div class='add'>+	eth_hw_addr_set(dev, macaddr);</div><div class='ctx'> </div><div class='ctx'> 	lp = netdev_priv(dev);</div><div class='ctx'> 	lp-&gt;ram = __get_dma_pages(GFP_ATOMIC, 3);	/* 32K */</div><div class='hunk'>@@ -139,6 +134,9 @@ struct net_device * __init mvme147lance_probe(int unit)</div><div class='ctx'> 		return ERR_PTR(err);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	netdev_info(dev, "MVME147 at 0x%08lx, irq %d, Hardware Address %pM\n",</div><div class='add'>+		    dev-&gt;base_addr, MVME147_LANCE_IRQ, dev-&gt;dev_addr);</div><div class='add'>+</div><div class='ctx'> 	return dev;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -179,22 +177,22 @@ static int m147lance_close(struct net_device *dev)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef MODULE</div><div class='add'>+MODULE_DESCRIPTION("MVME147 LANCE Ethernet driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='ctx'> static struct net_device *dev_mvme147_lance;</div><div class='del'>-int __init init_module(void)</div><div class='add'>+static int __init m147lance_init(void)</div><div class='ctx'> {</div><div class='del'>-	dev_mvme147_lance = mvme147lance_probe(-1);</div><div class='add'>+	dev_mvme147_lance = mvme147lance_probe();</div><div class='ctx'> 	return PTR_ERR_OR_ZERO(dev_mvme147_lance);</div><div class='ctx'> }</div><div class='add'>+module_init(m147lance_init);</div><div class='ctx'> </div><div class='del'>-void __exit cleanup_module(void)</div><div class='add'>+static void __exit m147lance_exit(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct m147lance_private *lp = netdev_priv(dev_mvme147_lance);</div><div class='ctx'> 	unregister_netdev(dev_mvme147_lance);</div><div class='ctx'> 	free_pages(lp-&gt;ram, 3);</div><div class='ctx'> 	free_netdev(dev_mvme147_lance);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-#endif /* MODULE */</div><div class='add'>+module_exit(m147lance_exit);</div><div class='head'>diff --git a/drivers/net/ethernet/amd/ni65.c b/drivers/net/ethernet/amd/ni65.c<br/>deleted file mode 100644<br/>index 1cf33addd15e..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/ni65.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/ni65.c</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,1252 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * ni6510 (am7990 'lance' chip) driver for Linux-net-3</div><div class='del'>- * BETAcode v0.71 (96/09/29) for 2.0.0 (or later)</div><div class='del'>- * copyrights (c) 1994,1995,1996 by M.Hipp</div><div class='del'>- *</div><div class='del'>- * This driver can handle the old ni6510 board and the newer ni6510</div><div class='del'>- * EtherBlaster. (probably it also works with every full NE2100</div><div class='del'>- * compatible card)</div><div class='del'>- *</div><div class='del'>- * driver probes: io: 0x360,0x300,0x320,0x340 / dma: 3,5,6,7</div><div class='del'>- *</div><div class='del'>- * This is an extension to the Linux operating system, and is covered by the</div><div class='del'>- * same GNU General Public License that covers the Linux-kernel.</div><div class='del'>- *</div><div class='del'>- * comments/bugs/suggestions can be sent to:</div><div class='del'>- *   Michael Hipp</div><div class='del'>- *   email: hippm@informatik.uni-tuebingen.de</div><div class='del'>- *</div><div class='del'>- * sources:</div><div class='del'>- *   some things are from the 'ni6510-packet-driver for dos by Russ Nelson'</div><div class='del'>- *   and from the original drivers by D.Becker</div><div class='del'>- *</div><div class='del'>- * known problems:</div><div class='del'>- *   - on some PCI boards (including my own) the card/board/ISA-bridge has</div><div class='del'>- *     problems with bus master DMA. This results in lotsa overruns.</div><div class='del'>- *     It may help to '#define RCV_PARANOIA_CHECK' or try to #undef</div><div class='del'>- *     the XMT and RCV_VIA_SKB option .. this reduces driver performance.</div><div class='del'>- *     Or just play with your BIOS options to optimize ISA-DMA access.</div><div class='del'>- *     Maybe you also wanna play with the LOW_PERFORAMCE and MID_PERFORMANCE</div><div class='del'>- *     defines -&gt; please report me your experience then</div><div class='del'>- *   - Harald reported for ASUS SP3G mainboards, that you should use</div><div class='del'>- *     the 'optimal settings' from the user's manual on page 3-12!</div><div class='del'>- *</div><div class='del'>- * credits:</div><div class='del'>- *   thanx to Jason Sullivan for sending me a ni6510 card!</div><div class='del'>- *   lot of debug runs with ASUS SP3G Boards (Intel Saturn) by Harald Koenig</div><div class='del'>- *</div><div class='del'>- * simple performance test: (486DX-33/Ni6510-EB receives from 486DX4-100/Ni6510-EB)</div><div class='del'>- *    average: FTP -&gt; 8384421 bytes received in 8.5 seconds</div><div class='del'>- *           (no RCV_VIA_SKB,no XMT_VIA_SKB,PARANOIA_CHECK,4 XMIT BUFS, 8 RCV_BUFFS)</div><div class='del'>- *    peak: FTP -&gt; 8384421 bytes received in 7.5 seconds</div><div class='del'>- *           (RCV_VIA_SKB,XMT_VIA_SKB,no PARANOIA_CHECK,1(!) XMIT BUF, 16 RCV BUFFS)</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * 99.Jun.8: added support for /proc/net/dev byte count for xosview (HK)</div><div class='del'>- * 96.Sept.29: virt_to_bus stuff added for new memory modell</div><div class='del'>- * 96.April.29: Added Harald Koenig's Patches (MH)</div><div class='del'>- * 96.April.13: enhanced error handling .. more tests (MH)</div><div class='del'>- * 96.April.5/6: a lot of performance tests. Got it stable now (hopefully) (MH)</div><div class='del'>- * 96.April.1: (no joke ;) .. added EtherBlaster and Module support (MH)</div><div class='del'>- * 96.Feb.19: fixed a few bugs .. cleanups .. tested for 1.3.66 (MH)</div><div class='del'>- *            hopefully no more 16MB limit</div><div class='del'>- *</div><div class='del'>- * 95.Nov.18: multicast tweaked (AC).</div><div class='del'>- *</div><div class='del'>- * 94.Aug.22: changes in xmit_intr (ack more than one xmitted-packet), ni65_send_packet (p-&gt;lock) (MH)</div><div class='del'>- *</div><div class='del'>- * 94.July.16: fixed bugs in recv_skb and skb-alloc stuff  (MH)</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#include &lt;linux/kernel.h&gt;</div><div class='del'>-#include &lt;linux/string.h&gt;</div><div class='del'>-#include &lt;linux/errno.h&gt;</div><div class='del'>-#include &lt;linux/ioport.h&gt;</div><div class='del'>-#include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;linux/interrupt.h&gt;</div><div class='del'>-#include &lt;linux/delay.h&gt;</div><div class='del'>-#include &lt;linux/init.h&gt;</div><div class='del'>-#include &lt;linux/netdevice.h&gt;</div><div class='del'>-#include &lt;linux/etherdevice.h&gt;</div><div class='del'>-#include &lt;linux/skbuff.h&gt;</div><div class='del'>-#include &lt;linux/module.h&gt;</div><div class='del'>-#include &lt;linux/bitops.h&gt;</div><div class='del'>-</div><div class='del'>-#include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/dma.h&gt;</div><div class='del'>-</div><div class='del'>-#include "ni65.h"</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * the current setting allows an acceptable performance</div><div class='del'>- * for 'RCV_PARANOIA_CHECK' read the 'known problems' part in</div><div class='del'>- * the header of this file</div><div class='del'>- * 'invert' the defines for max. performance. This may cause DMA problems</div><div class='del'>- * on some boards (e.g on my ASUS SP3G)</div><div class='del'>- */</div><div class='del'>-#undef XMT_VIA_SKB</div><div class='del'>-#undef RCV_VIA_SKB</div><div class='del'>-#define RCV_PARANOIA_CHECK</div><div class='del'>-</div><div class='del'>-#define MID_PERFORMANCE</div><div class='del'>-</div><div class='del'>-#if   defined( LOW_PERFORMANCE )</div><div class='del'>- static int isa0=7,isa1=7,csr80=0x0c10;</div><div class='del'>-#elif defined( MID_PERFORMANCE )</div><div class='del'>- static int isa0=5,isa1=5,csr80=0x2810;</div><div class='del'>-#else	/* high performance */</div><div class='del'>- static int isa0=4,isa1=4,csr80=0x0017;</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * a few card/vendor specific defines</div><div class='del'>- */</div><div class='del'>-#define NI65_ID0    0x00</div><div class='del'>-#define NI65_ID1    0x55</div><div class='del'>-#define NI65_EB_ID0 0x52</div><div class='del'>-#define NI65_EB_ID1 0x44</div><div class='del'>-#define NE2100_ID0  0x57</div><div class='del'>-#define NE2100_ID1  0x57</div><div class='del'>-</div><div class='del'>-#define PORT p-&gt;cmdr_addr</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * buffer configuration</div><div class='del'>- */</div><div class='del'>-#if 1</div><div class='del'>-#define RMDNUM 16</div><div class='del'>-#define RMDNUMMASK 0x80000000</div><div class='del'>-#else</div><div class='del'>-#define RMDNUM 8</div><div class='del'>-#define RMDNUMMASK 0x60000000 /* log2(RMDNUM)&lt;&lt;29 */</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#if 0</div><div class='del'>-#define TMDNUM 1</div><div class='del'>-#define TMDNUMMASK 0x00000000</div><div class='del'>-#else</div><div class='del'>-#define TMDNUM 4</div><div class='del'>-#define TMDNUMMASK 0x40000000 /* log2(TMDNUM)&lt;&lt;29 */</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-/* slightly oversized */</div><div class='del'>-#define R_BUF_SIZE 1544</div><div class='del'>-#define T_BUF_SIZE 1544</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * lance register defines</div><div class='del'>- */</div><div class='del'>-#define L_DATAREG 0x00</div><div class='del'>-#define L_ADDRREG 0x02</div><div class='del'>-#define L_RESET   0x04</div><div class='del'>-#define L_CONFIG  0x05</div><div class='del'>-#define L_BUSIF   0x06</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * to access the lance/am7990-regs, you have to write</div><div class='del'>- * reg-number into L_ADDRREG, then you can access it using L_DATAREG</div><div class='del'>- */</div><div class='del'>-#define CSR0  0x00</div><div class='del'>-#define CSR1  0x01</div><div class='del'>-#define CSR2  0x02</div><div class='del'>-#define CSR3  0x03</div><div class='del'>-</div><div class='del'>-#define INIT_RING_BEFORE_START	0x1</div><div class='del'>-#define FULL_RESET_ON_ERROR	0x2</div><div class='del'>-</div><div class='del'>-#if 0</div><div class='del'>-#define writereg(val,reg) {outw(reg,PORT+L_ADDRREG);inw(PORT+L_ADDRREG); \</div><div class='del'>-                           outw(val,PORT+L_DATAREG);inw(PORT+L_DATAREG);}</div><div class='del'>-#define readreg(reg) (outw(reg,PORT+L_ADDRREG),inw(PORT+L_ADDRREG),\</div><div class='del'>-                       inw(PORT+L_DATAREG))</div><div class='del'>-#if 0</div><div class='del'>-#define writedatareg(val) {outw(val,PORT+L_DATAREG);inw(PORT+L_DATAREG);}</div><div class='del'>-#else</div><div class='del'>-#define writedatareg(val) {  writereg(val,CSR0); }</div><div class='del'>-#endif</div><div class='del'>-#else</div><div class='del'>-#define writereg(val,reg) {outw(reg,PORT+L_ADDRREG);outw(val,PORT+L_DATAREG);}</div><div class='del'>-#define readreg(reg) (outw(reg,PORT+L_ADDRREG),inw(PORT+L_DATAREG))</div><div class='del'>-#define writedatareg(val) { writereg(val,CSR0); }</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-static unsigned char ni_vendor[] = { 0x02,0x07,0x01 };</div><div class='del'>-</div><div class='del'>-static struct card {</div><div class='del'>-	unsigned char id0,id1;</div><div class='del'>-	short id_offset;</div><div class='del'>-	short total_size;</div><div class='del'>-	short cmd_offset;</div><div class='del'>-	short addr_offset;</div><div class='del'>-	unsigned char *vendor_id;</div><div class='del'>-	char *cardname;</div><div class='del'>-	unsigned long config;</div><div class='del'>-} cards[] = {</div><div class='del'>-	{</div><div class='del'>-		.id0	     = NI65_ID0,</div><div class='del'>-		.id1	     = NI65_ID1,</div><div class='del'>-		.id_offset   = 0x0e,</div><div class='del'>-		.total_size  = 0x10,</div><div class='del'>-		.cmd_offset  = 0x0,</div><div class='del'>-		.addr_offset = 0x8,</div><div class='del'>-		.vendor_id   = ni_vendor,</div><div class='del'>-		.cardname    = "ni6510",</div><div class='del'>-		.config	     = 0x1,</div><div class='del'>-       	},</div><div class='del'>-	{</div><div class='del'>-		.id0	     = NI65_EB_ID0,</div><div class='del'>-		.id1	     = NI65_EB_ID1,</div><div class='del'>-		.id_offset   = 0x0e,</div><div class='del'>-		.total_size  = 0x18,</div><div class='del'>-		.cmd_offset  = 0x10,</div><div class='del'>-		.addr_offset = 0x0,</div><div class='del'>-		.vendor_id   = ni_vendor,</div><div class='del'>-		.cardname    = "ni6510 EtherBlaster",</div><div class='del'>-		.config	     = 0x2,</div><div class='del'>-       	},</div><div class='del'>-	{</div><div class='del'>-		.id0	     = NE2100_ID0,</div><div class='del'>-		.id1	     = NE2100_ID1,</div><div class='del'>-		.id_offset   = 0x0e,</div><div class='del'>-		.total_size  = 0x18,</div><div class='del'>-		.cmd_offset  = 0x10,</div><div class='del'>-		.addr_offset = 0x0,</div><div class='del'>-		.vendor_id   = NULL,</div><div class='del'>-		.cardname    = "generic NE2100",</div><div class='del'>-		.config	     = 0x0,</div><div class='del'>-	},</div><div class='del'>-};</div><div class='del'>-#define NUM_CARDS 3</div><div class='del'>-</div><div class='del'>-struct priv</div><div class='del'>-{</div><div class='del'>-	struct rmd rmdhead[RMDNUM];</div><div class='del'>-	struct tmd tmdhead[TMDNUM];</div><div class='del'>-	struct init_block ib;</div><div class='del'>-	int rmdnum;</div><div class='del'>-	int tmdnum,tmdlast;</div><div class='del'>-#ifdef RCV_VIA_SKB</div><div class='del'>-	struct sk_buff *recv_skb[RMDNUM];</div><div class='del'>-#else</div><div class='del'>-	void *recvbounce[RMDNUM];</div><div class='del'>-#endif</div><div class='del'>-#ifdef XMT_VIA_SKB</div><div class='del'>-	struct sk_buff *tmd_skb[TMDNUM];</div><div class='del'>-#endif</div><div class='del'>-	void *tmdbounce[TMDNUM];</div><div class='del'>-	int tmdbouncenum;</div><div class='del'>-	int lock,xmit_queued;</div><div class='del'>-</div><div class='del'>-	void *self;</div><div class='del'>-	int cmdr_addr;</div><div class='del'>-	int cardno;</div><div class='del'>-	int features;</div><div class='del'>-	spinlock_t ring_lock;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static int  ni65_probe1(struct net_device *dev,int);</div><div class='del'>-static irqreturn_t ni65_interrupt(int irq, void * dev_id);</div><div class='del'>-static void ni65_recv_intr(struct net_device *dev,int);</div><div class='del'>-static void ni65_xmit_intr(struct net_device *dev,int);</div><div class='del'>-static int  ni65_open(struct net_device *dev);</div><div class='del'>-static int  ni65_lance_reinit(struct net_device *dev);</div><div class='del'>-static void ni65_init_lance(struct priv *p,unsigned char*,int,int);</div><div class='del'>-static netdev_tx_t ni65_send_packet(struct sk_buff *skb,</div><div class='del'>-				    struct net_device *dev);</div><div class='del'>-static void  ni65_timeout(struct net_device *dev);</div><div class='del'>-static int  ni65_close(struct net_device *dev);</div><div class='del'>-static int  ni65_alloc_buffer(struct net_device *dev);</div><div class='del'>-static void ni65_free_buffer(struct priv *p);</div><div class='del'>-static void set_multicast_list(struct net_device *dev);</div><div class='del'>-</div><div class='del'>-static int irqtab[] __initdata = { 9,12,15,5 }; /* irq config-translate */</div><div class='del'>-static int dmatab[] __initdata = { 0,3,5,6,7 }; /* dma config-translate and autodetect */</div><div class='del'>-</div><div class='del'>-static int debuglevel = 1;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * set 'performance' registers .. we must STOP lance for that</div><div class='del'>- */</div><div class='del'>-static void ni65_set_performance(struct priv *p)</div><div class='del'>-{</div><div class='del'>-	writereg(CSR0_STOP | CSR0_CLRALL,CSR0); /* STOP */</div><div class='del'>-</div><div class='del'>-	if( !(cards[p-&gt;cardno].config &amp; 0x02) )</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	outw(80,PORT+L_ADDRREG);</div><div class='del'>-	if(inw(PORT+L_ADDRREG) != 80)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	writereg( (csr80 &amp; 0x3fff) ,80); /* FIFO watermarks */</div><div class='del'>-	outw(0,PORT+L_ADDRREG);</div><div class='del'>-	outw((short)isa0,PORT+L_BUSIF); /* write ISA 0: DMA_R : isa0 * 50ns */</div><div class='del'>-	outw(1,PORT+L_ADDRREG);</div><div class='del'>-	outw((short)isa1,PORT+L_BUSIF); /* write ISA 1: DMA_W : isa1 * 50ns	*/</div><div class='del'>-</div><div class='del'>-	outw(CSR0,PORT+L_ADDRREG);	/* switch back to CSR0 */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * open interface (up)</div><div class='del'>- */</div><div class='del'>-static int ni65_open(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct priv *p = dev-&gt;ml_priv;</div><div class='del'>-	int irqval = request_irq(dev-&gt;irq, ni65_interrupt,0,</div><div class='del'>-                        cards[p-&gt;cardno].cardname,dev);</div><div class='del'>-	if (irqval) {</div><div class='del'>-		printk(KERN_ERR "%s: unable to get IRQ %d (irqval=%d).\n",</div><div class='del'>-		          dev-&gt;name,dev-&gt;irq, irqval);</div><div class='del'>-		return -EAGAIN;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if(ni65_lance_reinit(dev))</div><div class='del'>-	{</div><div class='del'>-		netif_start_queue(dev);</div><div class='del'>-		return 0;</div><div class='del'>-	}</div><div class='del'>-	else</div><div class='del'>-	{</div><div class='del'>-		free_irq(dev-&gt;irq,dev);</div><div class='del'>-		return -EAGAIN;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * close interface (down)</div><div class='del'>- */</div><div class='del'>-static int ni65_close(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct priv *p = dev-&gt;ml_priv;</div><div class='del'>-</div><div class='del'>-	netif_stop_queue(dev);</div><div class='del'>-</div><div class='del'>-	outw(inw(PORT+L_RESET),PORT+L_RESET); /* that's the hard way */</div><div class='del'>-</div><div class='del'>-#ifdef XMT_VIA_SKB</div><div class='del'>-	{</div><div class='del'>-		int i;</div><div class='del'>-		for(i=0;i&lt;TMDNUM;i++)</div><div class='del'>-		{</div><div class='del'>-			if(p-&gt;tmd_skb[i]) {</div><div class='del'>-				dev_kfree_skb(p-&gt;tmd_skb[i]);</div><div class='del'>-				p-&gt;tmd_skb[i] = NULL;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='del'>-	free_irq(dev-&gt;irq,dev);</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void cleanup_card(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct priv *p = dev-&gt;ml_priv;</div><div class='del'>-	disable_dma(dev-&gt;dma);</div><div class='del'>-	free_dma(dev-&gt;dma);</div><div class='del'>-	release_region(dev-&gt;base_addr, cards[p-&gt;cardno].total_size);</div><div class='del'>-	ni65_free_buffer(p);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/* set: io,irq,dma or set it when calling insmod */</div><div class='del'>-static int irq;</div><div class='del'>-static int io;</div><div class='del'>-static int dma;</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Probe The Card (not the lance-chip)</div><div class='del'>- */</div><div class='del'>-struct net_device * __init ni65_probe(int unit)</div><div class='del'>-{</div><div class='del'>-	struct net_device *dev = alloc_etherdev(0);</div><div class='del'>-	static const int ports[] = { 0x360, 0x300, 0x320, 0x340, 0 };</div><div class='del'>-	const int *port;</div><div class='del'>-	int err = 0;</div><div class='del'>-</div><div class='del'>-	if (!dev)</div><div class='del'>-		return ERR_PTR(-ENOMEM);</div><div class='del'>-</div><div class='del'>-	if (unit &gt;= 0) {</div><div class='del'>-		sprintf(dev-&gt;name, "eth%d", unit);</div><div class='del'>-		netdev_boot_setup_check(dev);</div><div class='del'>-		irq = dev-&gt;irq;</div><div class='del'>-		dma = dev-&gt;dma;</div><div class='del'>-	} else {</div><div class='del'>-		dev-&gt;base_addr = io;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (dev-&gt;base_addr &gt; 0x1ff) { /* Check a single specified location. */</div><div class='del'>-		err = ni65_probe1(dev, dev-&gt;base_addr);</div><div class='del'>-	} else if (dev-&gt;base_addr &gt; 0) { /* Don't probe at all. */</div><div class='del'>-		err = -ENXIO;</div><div class='del'>-	} else {</div><div class='del'>-		for (port = ports; *port &amp;&amp; ni65_probe1(dev, *port); port++)</div><div class='del'>-			;</div><div class='del'>-		if (!*port)</div><div class='del'>-			err = -ENODEV;</div><div class='del'>-	}</div><div class='del'>-	if (err)</div><div class='del'>-		goto out;</div><div class='del'>-</div><div class='del'>-	err = register_netdev(dev);</div><div class='del'>-	if (err)</div><div class='del'>-		goto out1;</div><div class='del'>-	return dev;</div><div class='del'>-out1:</div><div class='del'>-	cleanup_card(dev);</div><div class='del'>-out:</div><div class='del'>-	free_netdev(dev);</div><div class='del'>-	return ERR_PTR(err);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static const struct net_device_ops ni65_netdev_ops = {</div><div class='del'>-	.ndo_open		= ni65_open,</div><div class='del'>-	.ndo_stop		= ni65_close,</div><div class='del'>-	.ndo_start_xmit		= ni65_send_packet,</div><div class='del'>-	.ndo_tx_timeout		= ni65_timeout,</div><div class='del'>-	.ndo_set_rx_mode	= set_multicast_list,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='del'>-	.ndo_set_mac_address 	= eth_mac_addr,</div><div class='del'>-	.ndo_validate_addr	= eth_validate_addr,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * this is the real card probe ..</div><div class='del'>- */</div><div class='del'>-static int __init ni65_probe1(struct net_device *dev,int ioaddr)</div><div class='del'>-{</div><div class='del'>-	int i,j;</div><div class='del'>-	struct priv *p;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	dev-&gt;irq = irq;</div><div class='del'>-	dev-&gt;dma = dma;</div><div class='del'>-</div><div class='del'>-	for(i=0;i&lt;NUM_CARDS;i++) {</div><div class='del'>-		if(!request_region(ioaddr, cards[i].total_size, cards[i].cardname))</div><div class='del'>-			continue;</div><div class='del'>-		if(cards[i].id_offset &gt;= 0) {</div><div class='del'>-			if(inb(ioaddr+cards[i].id_offset+0) != cards[i].id0 ||</div><div class='del'>-				 inb(ioaddr+cards[i].id_offset+1) != cards[i].id1) {</div><div class='del'>-				 release_region(ioaddr, cards[i].total_size);</div><div class='del'>-				 continue;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		if(cards[i].vendor_id) {</div><div class='del'>-			for(j=0;j&lt;3;j++)</div><div class='del'>-				if(inb(ioaddr+cards[i].addr_offset+j) != cards[i].vendor_id[j]) {</div><div class='del'>-					release_region(ioaddr, cards[i].total_size);</div><div class='del'>-					continue;</div><div class='del'>-			  }</div><div class='del'>-		}</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-	if(i == NUM_CARDS)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	for(j=0;j&lt;6;j++)</div><div class='del'>-		dev-&gt;dev_addr[j] = inb(ioaddr+cards[i].addr_offset+j);</div><div class='del'>-</div><div class='del'>-	if( (j=ni65_alloc_buffer(dev)) &lt; 0) {</div><div class='del'>-		release_region(ioaddr, cards[i].total_size);</div><div class='del'>-		return j;</div><div class='del'>-	}</div><div class='del'>-	p = dev-&gt;ml_priv;</div><div class='del'>-	p-&gt;cmdr_addr = ioaddr + cards[i].cmd_offset;</div><div class='del'>-	p-&gt;cardno = i;</div><div class='del'>-	spin_lock_init(&amp;p-&gt;ring_lock);</div><div class='del'>-</div><div class='del'>-	printk(KERN_INFO "%s: %s found at %#3x, ", dev-&gt;name, cards[p-&gt;cardno].cardname , ioaddr);</div><div class='del'>-</div><div class='del'>-	outw(inw(PORT+L_RESET),PORT+L_RESET); /* first: reset the card */</div><div class='del'>-	if( (j=readreg(CSR0)) != 0x4) {</div><div class='del'>-		 printk("failed.\n");</div><div class='del'>-		 printk(KERN_ERR "%s: Can't RESET card: %04x\n", dev-&gt;name, j);</div><div class='del'>-		 ni65_free_buffer(p);</div><div class='del'>-		 release_region(ioaddr, cards[p-&gt;cardno].total_size);</div><div class='del'>-		 return -EAGAIN;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	outw(88,PORT+L_ADDRREG);</div><div class='del'>-	if(inw(PORT+L_ADDRREG) == 88) {</div><div class='del'>-		unsigned long v;</div><div class='del'>-		v = inw(PORT+L_DATAREG);</div><div class='del'>-		v &lt;&lt;= 16;</div><div class='del'>-		outw(89,PORT+L_ADDRREG);</div><div class='del'>-		v |= inw(PORT+L_DATAREG);</div><div class='del'>-		printk("Version %#08lx, ",v);</div><div class='del'>-		p-&gt;features = INIT_RING_BEFORE_START;</div><div class='del'>-	}</div><div class='del'>-	else {</div><div class='del'>-		printk("ancient LANCE, ");</div><div class='del'>-		p-&gt;features = 0x0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if(test_bit(0,&amp;cards[i].config)) {</div><div class='del'>-		dev-&gt;irq = irqtab[(inw(ioaddr+L_CONFIG)&gt;&gt;2)&amp;3];</div><div class='del'>-		dev-&gt;dma = dmatab[inw(ioaddr+L_CONFIG)&amp;3];</div><div class='del'>-		printk("IRQ %d (from card), DMA %d (from card).\n",dev-&gt;irq,dev-&gt;dma);</div><div class='del'>-	}</div><div class='del'>-	else {</div><div class='del'>-		if(dev-&gt;dma == 0) {</div><div class='del'>-		/* 'stuck test' from lance.c */</div><div class='del'>-			unsigned long dma_channels =</div><div class='del'>-				((inb(DMA1_STAT_REG) &gt;&gt; 4) &amp; 0x0f)</div><div class='del'>-				| (inb(DMA2_STAT_REG) &amp; 0xf0);</div><div class='del'>-			for(i=1;i&lt;5;i++) {</div><div class='del'>-				int dma = dmatab[i];</div><div class='del'>-				if(test_bit(dma,&amp;dma_channels) || request_dma(dma,"ni6510"))</div><div class='del'>-					continue;</div><div class='del'>-</div><div class='del'>-				flags=claim_dma_lock();</div><div class='del'>-				disable_dma(dma);</div><div class='del'>-				set_dma_mode(dma,DMA_MODE_CASCADE);</div><div class='del'>-				enable_dma(dma);</div><div class='del'>-				release_dma_lock(flags);</div><div class='del'>-</div><div class='del'>-				ni65_init_lance(p,dev-&gt;dev_addr,0,0); /* trigger memory access */</div><div class='del'>-</div><div class='del'>-				flags=claim_dma_lock();</div><div class='del'>-				disable_dma(dma);</div><div class='del'>-				free_dma(dma);</div><div class='del'>-				release_dma_lock(flags);</div><div class='del'>-</div><div class='del'>-				if(readreg(CSR0) &amp; CSR0_IDON)</div><div class='del'>-					break;</div><div class='del'>-			}</div><div class='del'>-			if(i == 5) {</div><div class='del'>-				printk("failed.\n");</div><div class='del'>-				printk(KERN_ERR "%s: Can't detect DMA channel!\n", dev-&gt;name);</div><div class='del'>-				ni65_free_buffer(p);</div><div class='del'>-				release_region(ioaddr, cards[p-&gt;cardno].total_size);</div><div class='del'>-				return -EAGAIN;</div><div class='del'>-			}</div><div class='del'>-			dev-&gt;dma = dmatab[i];</div><div class='del'>-			printk("DMA %d (autodetected), ",dev-&gt;dma);</div><div class='del'>-		}</div><div class='del'>-		else</div><div class='del'>-			printk("DMA %d (assigned), ",dev-&gt;dma);</div><div class='del'>-</div><div class='del'>-		if(dev-&gt;irq &lt; 2)</div><div class='del'>-		{</div><div class='del'>-			unsigned long irq_mask;</div><div class='del'>-</div><div class='del'>-			ni65_init_lance(p,dev-&gt;dev_addr,0,0);</div><div class='del'>-			irq_mask = probe_irq_on();</div><div class='del'>-			writereg(CSR0_INIT|CSR0_INEA,CSR0); /* trigger interrupt */</div><div class='del'>-			msleep(20);</div><div class='del'>-			dev-&gt;irq = probe_irq_off(irq_mask);</div><div class='del'>-			if(!dev-&gt;irq)</div><div class='del'>-			{</div><div class='del'>-				printk("Failed to detect IRQ line!\n");</div><div class='del'>-				ni65_free_buffer(p);</div><div class='del'>-				release_region(ioaddr, cards[p-&gt;cardno].total_size);</div><div class='del'>-				return -EAGAIN;</div><div class='del'>-			}</div><div class='del'>-			printk("IRQ %d (autodetected).\n",dev-&gt;irq);</div><div class='del'>-		}</div><div class='del'>-		else</div><div class='del'>-			printk("IRQ %d (assigned).\n",dev-&gt;irq);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if(request_dma(dev-&gt;dma, cards[p-&gt;cardno].cardname ) != 0)</div><div class='del'>-	{</div><div class='del'>-		printk(KERN_ERR "%s: Can't request dma-channel %d\n",dev-&gt;name,(int) dev-&gt;dma);</div><div class='del'>-		ni65_free_buffer(p);</div><div class='del'>-		release_region(ioaddr, cards[p-&gt;cardno].total_size);</div><div class='del'>-		return -EAGAIN;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev-&gt;base_addr = ioaddr;</div><div class='del'>-	dev-&gt;netdev_ops = &amp;ni65_netdev_ops;</div><div class='del'>-	dev-&gt;watchdog_timeo	= HZ/2;</div><div class='del'>-</div><div class='del'>-	return 0; /* everything is OK */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * set lance register and trigger init</div><div class='del'>- */</div><div class='del'>-static void ni65_init_lance(struct priv *p,unsigned char *daddr,int filter,int mode)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	u32 pib;</div><div class='del'>-</div><div class='del'>-	writereg(CSR0_CLRALL|CSR0_STOP,CSR0);</div><div class='del'>-</div><div class='del'>-	for(i=0;i&lt;6;i++)</div><div class='del'>-		p-&gt;ib.eaddr[i] = daddr[i];</div><div class='del'>-</div><div class='del'>-	for(i=0;i&lt;8;i++)</div><div class='del'>-		p-&gt;ib.filter[i] = filter;</div><div class='del'>-	p-&gt;ib.mode = mode;</div><div class='del'>-</div><div class='del'>-	p-&gt;ib.trp = (u32) isa_virt_to_bus(p-&gt;tmdhead) | TMDNUMMASK;</div><div class='del'>-	p-&gt;ib.rrp = (u32) isa_virt_to_bus(p-&gt;rmdhead) | RMDNUMMASK;</div><div class='del'>-	writereg(0,CSR3);	/* busmaster/no word-swap */</div><div class='del'>-	pib = (u32) isa_virt_to_bus(&amp;p-&gt;ib);</div><div class='del'>-	writereg(pib &amp; 0xffff,CSR1);</div><div class='del'>-	writereg(pib &gt;&gt; 16,CSR2);</div><div class='del'>-</div><div class='del'>-	writereg(CSR0_INIT,CSR0); /* this changes L_ADDRREG to CSR0 */</div><div class='del'>-</div><div class='del'>-	for(i=0;i&lt;32;i++)</div><div class='del'>-	{</div><div class='del'>-		mdelay(4);</div><div class='del'>-		if(inw(PORT+L_DATAREG) &amp; (CSR0_IDON | CSR0_MERR) )</div><div class='del'>-			break; /* init ok ? */</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * allocate memory area and check the 16MB border</div><div class='del'>- */</div><div class='del'>-static void *ni65_alloc_mem(struct net_device *dev,char *what,int size,int type)</div><div class='del'>-{</div><div class='del'>-	struct sk_buff *skb=NULL;</div><div class='del'>-	unsigned char *ptr;</div><div class='del'>-	void *ret;</div><div class='del'>-</div><div class='del'>-	if(type) {</div><div class='del'>-		ret = skb = alloc_skb(2+16+size,GFP_KERNEL|GFP_DMA);</div><div class='del'>-		if(!skb) {</div><div class='del'>-			printk(KERN_WARNING "%s: unable to allocate %s memory.\n",dev-&gt;name,what);</div><div class='del'>-			return NULL;</div><div class='del'>-		}</div><div class='del'>-		skb_reserve(skb,2+16);</div><div class='del'>-		skb_put(skb,R_BUF_SIZE);	 /* grab the whole space .. (not necessary) */</div><div class='del'>-		ptr = skb-&gt;data;</div><div class='del'>-	}</div><div class='del'>-	else {</div><div class='del'>-		ret = ptr = kmalloc(T_BUF_SIZE,GFP_KERNEL | GFP_DMA);</div><div class='del'>-		if(!ret)</div><div class='del'>-			return NULL;</div><div class='del'>-	}</div><div class='del'>-	if( (u32) virt_to_phys(ptr+size) &gt; 0x1000000) {</div><div class='del'>-		printk(KERN_WARNING "%s: unable to allocate %s memory in lower 16MB!\n",dev-&gt;name,what);</div><div class='del'>-		if(type)</div><div class='del'>-			kfree_skb(skb);</div><div class='del'>-		else</div><div class='del'>-			kfree(ptr);</div><div class='del'>-		return NULL;</div><div class='del'>-	}</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * allocate all memory structures .. send/recv buffers etc ...</div><div class='del'>- */</div><div class='del'>-static int ni65_alloc_buffer(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	unsigned char *ptr;</div><div class='del'>-	struct priv *p;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * we need 8-aligned memory ..</div><div class='del'>-	 */</div><div class='del'>-	ptr = ni65_alloc_mem(dev,"BUFFER",sizeof(struct priv)+8,0);</div><div class='del'>-	if(!ptr)</div><div class='del'>-		return -ENOMEM;</div><div class='del'>-</div><div class='del'>-	p = dev-&gt;ml_priv = (struct priv *) (((unsigned long) ptr + 7) &amp; ~0x7);</div><div class='del'>-	memset((char *)p, 0, sizeof(struct priv));</div><div class='del'>-	p-&gt;self = ptr;</div><div class='del'>-</div><div class='del'>-	for(i=0;i&lt;TMDNUM;i++)</div><div class='del'>-	{</div><div class='del'>-#ifdef XMT_VIA_SKB</div><div class='del'>-		p-&gt;tmd_skb[i] = NULL;</div><div class='del'>-#endif</div><div class='del'>-		p-&gt;tmdbounce[i] = ni65_alloc_mem(dev,"XMIT",T_BUF_SIZE,0);</div><div class='del'>-		if(!p-&gt;tmdbounce[i]) {</div><div class='del'>-			ni65_free_buffer(p);</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for(i=0;i&lt;RMDNUM;i++)</div><div class='del'>-	{</div><div class='del'>-#ifdef RCV_VIA_SKB</div><div class='del'>-		p-&gt;recv_skb[i] = ni65_alloc_mem(dev,"RECV",R_BUF_SIZE,1);</div><div class='del'>-		if(!p-&gt;recv_skb[i]) {</div><div class='del'>-			ni65_free_buffer(p);</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-		}</div><div class='del'>-#else</div><div class='del'>-		p-&gt;recvbounce[i] = ni65_alloc_mem(dev,"RECV",R_BUF_SIZE,0);</div><div class='del'>-		if(!p-&gt;recvbounce[i]) {</div><div class='del'>-			ni65_free_buffer(p);</div><div class='del'>-			return -ENOMEM;</div><div class='del'>-		}</div><div class='del'>-#endif</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0; /* everything is OK */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * free buffers and private struct</div><div class='del'>- */</div><div class='del'>-static void ni65_free_buffer(struct priv *p)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	if(!p)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	for(i=0;i&lt;TMDNUM;i++) {</div><div class='del'>-		kfree(p-&gt;tmdbounce[i]);</div><div class='del'>-#ifdef XMT_VIA_SKB</div><div class='del'>-		if(p-&gt;tmd_skb[i])</div><div class='del'>-			dev_kfree_skb(p-&gt;tmd_skb[i]);</div><div class='del'>-#endif</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	for(i=0;i&lt;RMDNUM;i++)</div><div class='del'>-	{</div><div class='del'>-#ifdef RCV_VIA_SKB</div><div class='del'>-		if(p-&gt;recv_skb[i])</div><div class='del'>-			dev_kfree_skb(p-&gt;recv_skb[i]);</div><div class='del'>-#else</div><div class='del'>-		kfree(p-&gt;recvbounce[i]);</div><div class='del'>-#endif</div><div class='del'>-	}</div><div class='del'>-	kfree(p-&gt;self);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * stop and (re)start lance .. e.g after an error</div><div class='del'>- */</div><div class='del'>-static void ni65_stop_start(struct net_device *dev,struct priv *p)</div><div class='del'>-{</div><div class='del'>-	int csr0 = CSR0_INEA;</div><div class='del'>-</div><div class='del'>-	writedatareg(CSR0_STOP);</div><div class='del'>-</div><div class='del'>-	if(debuglevel &gt; 1)</div><div class='del'>-		printk(KERN_DEBUG "ni65_stop_start\n");</div><div class='del'>-</div><div class='del'>-	if(p-&gt;features &amp; INIT_RING_BEFORE_START) {</div><div class='del'>-		int i;</div><div class='del'>-#ifdef XMT_VIA_SKB</div><div class='del'>-		struct sk_buff *skb_save[TMDNUM];</div><div class='del'>-#endif</div><div class='del'>-		unsigned long buffer[TMDNUM];</div><div class='del'>-		short blen[TMDNUM];</div><div class='del'>-</div><div class='del'>-		if(p-&gt;xmit_queued) {</div><div class='del'>-			while(1) {</div><div class='del'>-				if((p-&gt;tmdhead[p-&gt;tmdlast].u.s.status &amp; XMIT_OWN))</div><div class='del'>-					break;</div><div class='del'>-				p-&gt;tmdlast = (p-&gt;tmdlast + 1) &amp; (TMDNUM-1);</div><div class='del'>-				if(p-&gt;tmdlast == p-&gt;tmdnum)</div><div class='del'>-					break;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		for(i=0;i&lt;TMDNUM;i++) {</div><div class='del'>-			struct tmd *tmdp = p-&gt;tmdhead + i;</div><div class='del'>-#ifdef XMT_VIA_SKB</div><div class='del'>-			skb_save[i] = p-&gt;tmd_skb[i];</div><div class='del'>-#endif</div><div class='del'>-			buffer[i] = (u32) isa_bus_to_virt(tmdp-&gt;u.buffer);</div><div class='del'>-			blen[i] = tmdp-&gt;blen;</div><div class='del'>-			tmdp-&gt;u.s.status = 0x0;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		for(i=0;i&lt;RMDNUM;i++) {</div><div class='del'>-			struct rmd *rmdp = p-&gt;rmdhead + i;</div><div class='del'>-			rmdp-&gt;u.s.status = RCV_OWN;</div><div class='del'>-		}</div><div class='del'>-		p-&gt;tmdnum = p-&gt;xmit_queued = 0;</div><div class='del'>-		writedatareg(CSR0_STRT | csr0);</div><div class='del'>-</div><div class='del'>-		for(i=0;i&lt;TMDNUM;i++) {</div><div class='del'>-			int num = (i + p-&gt;tmdlast) &amp; (TMDNUM-1);</div><div class='del'>-			p-&gt;tmdhead[i].u.buffer = (u32) isa_virt_to_bus((char *)buffer[num]); /* status is part of buffer field */</div><div class='del'>-			p-&gt;tmdhead[i].blen = blen[num];</div><div class='del'>-			if(p-&gt;tmdhead[i].u.s.status &amp; XMIT_OWN) {</div><div class='del'>-				 p-&gt;tmdnum = (p-&gt;tmdnum + 1) &amp; (TMDNUM-1);</div><div class='del'>-				 p-&gt;xmit_queued = 1;</div><div class='del'>-	 writedatareg(CSR0_TDMD | CSR0_INEA | csr0);</div><div class='del'>-			}</div><div class='del'>-#ifdef XMT_VIA_SKB</div><div class='del'>-			p-&gt;tmd_skb[i] = skb_save[num];</div><div class='del'>-#endif</div><div class='del'>-		}</div><div class='del'>-		p-&gt;rmdnum = p-&gt;tmdlast = 0;</div><div class='del'>-		if(!p-&gt;lock)</div><div class='del'>-			if (p-&gt;tmdnum || !p-&gt;xmit_queued)</div><div class='del'>-				netif_wake_queue(dev);</div><div class='del'>-		dev-&gt;trans_start = jiffies; /* prevent tx timeout */</div><div class='del'>-	}</div><div class='del'>-	else</div><div class='del'>-		writedatareg(CSR0_STRT | csr0);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * init lance (write init-values .. init-buffers) (open-helper)</div><div class='del'>- */</div><div class='del'>-static int ni65_lance_reinit(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	 int i;</div><div class='del'>-	 struct priv *p = dev-&gt;ml_priv;</div><div class='del'>-	 unsigned long flags;</div><div class='del'>-</div><div class='del'>-	 p-&gt;lock = 0;</div><div class='del'>-	 p-&gt;xmit_queued = 0;</div><div class='del'>-</div><div class='del'>-	 flags=claim_dma_lock();</div><div class='del'>-	 disable_dma(dev-&gt;dma); /* I've never worked with dma, but we do it like the packetdriver */</div><div class='del'>-	 set_dma_mode(dev-&gt;dma,DMA_MODE_CASCADE);</div><div class='del'>-	 enable_dma(dev-&gt;dma);</div><div class='del'>-	 release_dma_lock(flags);</div><div class='del'>-</div><div class='del'>-	 outw(inw(PORT+L_RESET),PORT+L_RESET); /* first: reset the card */</div><div class='del'>-	 if( (i=readreg(CSR0) ) != 0x4)</div><div class='del'>-	 {</div><div class='del'>-		 printk(KERN_ERR "%s: can't RESET %s card: %04x\n",dev-&gt;name,</div><div class='del'>-							cards[p-&gt;cardno].cardname,(int) i);</div><div class='del'>-		 flags=claim_dma_lock();</div><div class='del'>-		 disable_dma(dev-&gt;dma);</div><div class='del'>-		 release_dma_lock(flags);</div><div class='del'>-		 return 0;</div><div class='del'>-	 }</div><div class='del'>-</div><div class='del'>-	 p-&gt;rmdnum = p-&gt;tmdnum = p-&gt;tmdlast = p-&gt;tmdbouncenum = 0;</div><div class='del'>-	 for(i=0;i&lt;TMDNUM;i++)</div><div class='del'>-	 {</div><div class='del'>-		 struct tmd *tmdp = p-&gt;tmdhead + i;</div><div class='del'>-#ifdef XMT_VIA_SKB</div><div class='del'>-		 if(p-&gt;tmd_skb[i]) {</div><div class='del'>-			 dev_kfree_skb(p-&gt;tmd_skb[i]);</div><div class='del'>-			 p-&gt;tmd_skb[i] = NULL;</div><div class='del'>-		 }</div><div class='del'>-#endif</div><div class='del'>-		 tmdp-&gt;u.buffer = 0x0;</div><div class='del'>-		 tmdp-&gt;u.s.status = XMIT_START | XMIT_END;</div><div class='del'>-		 tmdp-&gt;blen = tmdp-&gt;status2 = 0;</div><div class='del'>-	 }</div><div class='del'>-</div><div class='del'>-	 for(i=0;i&lt;RMDNUM;i++)</div><div class='del'>-	 {</div><div class='del'>-		 struct rmd *rmdp = p-&gt;rmdhead + i;</div><div class='del'>-#ifdef RCV_VIA_SKB</div><div class='del'>-		 rmdp-&gt;u.buffer = (u32) isa_virt_to_bus(p-&gt;recv_skb[i]-&gt;data);</div><div class='del'>-#else</div><div class='del'>-		 rmdp-&gt;u.buffer = (u32) isa_virt_to_bus(p-&gt;recvbounce[i]);</div><div class='del'>-#endif</div><div class='del'>-		 rmdp-&gt;blen = -(R_BUF_SIZE-8);</div><div class='del'>-		 rmdp-&gt;mlen = 0;</div><div class='del'>-		 rmdp-&gt;u.s.status = RCV_OWN;</div><div class='del'>-	 }</div><div class='del'>-</div><div class='del'>-	 if(dev-&gt;flags &amp; IFF_PROMISC)</div><div class='del'>-		 ni65_init_lance(p,dev-&gt;dev_addr,0x00,M_PROM);</div><div class='del'>-	 else if (netdev_mc_count(dev) || dev-&gt;flags &amp; IFF_ALLMULTI)</div><div class='del'>-		 ni65_init_lance(p,dev-&gt;dev_addr,0xff,0x0);</div><div class='del'>-	 else</div><div class='del'>-		 ni65_init_lance(p,dev-&gt;dev_addr,0x00,0x00);</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * ni65_set_lance_mem() sets L_ADDRREG to CSR0</div><div class='del'>-	 * NOW, WE WILL NEVER CHANGE THE L_ADDRREG, CSR0 IS ALWAYS SELECTED</div><div class='del'>-	 */</div><div class='del'>-</div><div class='del'>-	 if(inw(PORT+L_DATAREG) &amp; CSR0_IDON)	{</div><div class='del'>-		 ni65_set_performance(p);</div><div class='del'>-					 /* init OK: start lance , enable interrupts */</div><div class='del'>-		 writedatareg(CSR0_CLRALL | CSR0_INEA | CSR0_STRT);</div><div class='del'>-		 return 1; /* -&gt;OK */</div><div class='del'>-	 }</div><div class='del'>-	 printk(KERN_ERR "%s: can't init lance, status: %04x\n",dev-&gt;name,(int) inw(PORT+L_DATAREG));</div><div class='del'>-	 flags=claim_dma_lock();</div><div class='del'>-	 disable_dma(dev-&gt;dma);</div><div class='del'>-	 release_dma_lock(flags);</div><div class='del'>-	 return 0; /* -&gt;Error */</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * interrupt handler</div><div class='del'>- */</div><div class='del'>-static irqreturn_t ni65_interrupt(int irq, void * dev_id)</div><div class='del'>-{</div><div class='del'>-	int csr0 = 0;</div><div class='del'>-	struct net_device *dev = dev_id;</div><div class='del'>-	struct priv *p;</div><div class='del'>-	int bcnt = 32;</div><div class='del'>-</div><div class='del'>-	p = dev-&gt;ml_priv;</div><div class='del'>-</div><div class='del'>-	spin_lock(&amp;p-&gt;ring_lock);</div><div class='del'>-</div><div class='del'>-	while(--bcnt) {</div><div class='del'>-		csr0 = inw(PORT+L_DATAREG);</div><div class='del'>-</div><div class='del'>-#if 0</div><div class='del'>-		writedatareg( (csr0 &amp; CSR0_CLRALL) ); /* ack interrupts, disable int. */</div><div class='del'>-#else</div><div class='del'>-		writedatareg( (csr0 &amp; CSR0_CLRALL) | CSR0_INEA ); /* ack interrupts, interrupts enabled */</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-		if(!(csr0 &amp; (CSR0_ERR | CSR0_RINT | CSR0_TINT)))</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		if(csr0 &amp; CSR0_RINT) /* RECV-int? */</div><div class='del'>-			ni65_recv_intr(dev,csr0);</div><div class='del'>-		if(csr0 &amp; CSR0_TINT) /* XMIT-int? */</div><div class='del'>-			ni65_xmit_intr(dev,csr0);</div><div class='del'>-</div><div class='del'>-		if(csr0 &amp; CSR0_ERR)</div><div class='del'>-		{</div><div class='del'>-			if(debuglevel &gt; 1)</div><div class='del'>-				printk(KERN_ERR "%s: general error: %04x.\n",dev-&gt;name,csr0);</div><div class='del'>-			if(csr0 &amp; CSR0_BABL)</div><div class='del'>-				dev-&gt;stats.tx_errors++;</div><div class='del'>-			if(csr0 &amp; CSR0_MISS) {</div><div class='del'>-				int i;</div><div class='del'>-				for(i=0;i&lt;RMDNUM;i++)</div><div class='del'>-					printk("%02x ",p-&gt;rmdhead[i].u.s.status);</div><div class='del'>-				printk("\n");</div><div class='del'>-				dev-&gt;stats.rx_errors++;</div><div class='del'>-			}</div><div class='del'>-			if(csr0 &amp; CSR0_MERR) {</div><div class='del'>-				if(debuglevel &gt; 1)</div><div class='del'>-					printk(KERN_ERR "%s: Ooops .. memory error: %04x.\n",dev-&gt;name,csr0);</div><div class='del'>-				ni65_stop_start(dev,p);</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-#ifdef RCV_PARANOIA_CHECK</div><div class='del'>-{</div><div class='del'>- int j;</div><div class='del'>- for(j=0;j&lt;RMDNUM;j++)</div><div class='del'>- {</div><div class='del'>-	int i, num2;</div><div class='del'>-	for(i=RMDNUM-1;i&gt;0;i--) {</div><div class='del'>-		 num2 = (p-&gt;rmdnum + i) &amp; (RMDNUM-1);</div><div class='del'>-		 if(!(p-&gt;rmdhead[num2].u.s.status &amp; RCV_OWN))</div><div class='del'>-				break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if(i) {</div><div class='del'>-		int k, num1;</div><div class='del'>-		for(k=0;k&lt;RMDNUM;k++) {</div><div class='del'>-			num1 = (p-&gt;rmdnum + k) &amp; (RMDNUM-1);</div><div class='del'>-			if(!(p-&gt;rmdhead[num1].u.s.status &amp; RCV_OWN))</div><div class='del'>-				break;</div><div class='del'>-		}</div><div class='del'>-		if(!k)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		if(debuglevel &gt; 0)</div><div class='del'>-		{</div><div class='del'>-			char buf[256],*buf1;</div><div class='del'>-			buf1 = buf;</div><div class='del'>-			for(k=0;k&lt;RMDNUM;k++) {</div><div class='del'>-				sprintf(buf1,"%02x ",(p-&gt;rmdhead[k].u.s.status)); /* &amp; RCV_OWN) ); */</div><div class='del'>-				buf1 += 3;</div><div class='del'>-			}</div><div class='del'>-			*buf1 = 0;</div><div class='del'>-			printk(KERN_ERR "%s: Ooops, receive ring corrupted %2d %2d | %s\n",dev-&gt;name,p-&gt;rmdnum,i,buf);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		p-&gt;rmdnum = num1;</div><div class='del'>-		ni65_recv_intr(dev,csr0);</div><div class='del'>-		if((p-&gt;rmdhead[num2].u.s.status &amp; RCV_OWN))</div><div class='del'>-			break;	/* ok, we are 'in sync' again */</div><div class='del'>-	}</div><div class='del'>-	else</div><div class='del'>-		break;</div><div class='del'>- }</div><div class='del'>-}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-	if( (csr0 &amp; (CSR0_RXON | CSR0_TXON)) != (CSR0_RXON | CSR0_TXON) ) {</div><div class='del'>-		printk(KERN_DEBUG "%s: RX or TX was offline -&gt; restart\n",dev-&gt;name);</div><div class='del'>-		ni65_stop_start(dev,p);</div><div class='del'>-	}</div><div class='del'>-	else</div><div class='del'>-		writedatareg(CSR0_INEA);</div><div class='del'>-</div><div class='del'>-	spin_unlock(&amp;p-&gt;ring_lock);</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * We have received an Xmit-Interrupt ..</div><div class='del'>- * send a new packet if necessary</div><div class='del'>- */</div><div class='del'>-static void ni65_xmit_intr(struct net_device *dev,int csr0)</div><div class='del'>-{</div><div class='del'>-	struct priv *p = dev-&gt;ml_priv;</div><div class='del'>-</div><div class='del'>-	while(p-&gt;xmit_queued)</div><div class='del'>-	{</div><div class='del'>-		struct tmd *tmdp = p-&gt;tmdhead + p-&gt;tmdlast;</div><div class='del'>-		int tmdstat = tmdp-&gt;u.s.status;</div><div class='del'>-</div><div class='del'>-		if(tmdstat &amp; XMIT_OWN)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		if(tmdstat &amp; XMIT_ERR)</div><div class='del'>-		{</div><div class='del'>-#if 0</div><div class='del'>-			if(tmdp-&gt;status2 &amp; XMIT_TDRMASK &amp;&amp; debuglevel &gt; 3)</div><div class='del'>-				printk(KERN_ERR "%s: tdr-problems (e.g. no resistor)\n",dev-&gt;name);</div><div class='del'>-#endif</div><div class='del'>-		 /* checking some errors */</div><div class='del'>-			if(tmdp-&gt;status2 &amp; XMIT_RTRY)</div><div class='del'>-				dev-&gt;stats.tx_aborted_errors++;</div><div class='del'>-			if(tmdp-&gt;status2 &amp; XMIT_LCAR)</div><div class='del'>-				dev-&gt;stats.tx_carrier_errors++;</div><div class='del'>-			if(tmdp-&gt;status2 &amp; (XMIT_BUFF | XMIT_UFLO )) {</div><div class='del'>-		/* this stops the xmitter */</div><div class='del'>-				dev-&gt;stats.tx_fifo_errors++;</div><div class='del'>-				if(debuglevel &gt; 0)</div><div class='del'>-					printk(KERN_ERR "%s: Xmit FIFO/BUFF error\n",dev-&gt;name);</div><div class='del'>-				if(p-&gt;features &amp; INIT_RING_BEFORE_START) {</div><div class='del'>-					tmdp-&gt;u.s.status = XMIT_OWN | XMIT_START | XMIT_END;	/* test: resend this frame */</div><div class='del'>-					ni65_stop_start(dev,p);</div><div class='del'>-					break;	/* no more Xmit processing .. */</div><div class='del'>-				}</div><div class='del'>-				else</div><div class='del'>-				 ni65_stop_start(dev,p);</div><div class='del'>-			}</div><div class='del'>-			if(debuglevel &gt; 2)</div><div class='del'>-				printk(KERN_ERR "%s: xmit-error: %04x %02x-%04x\n",dev-&gt;name,csr0,(int) tmdstat,(int) tmdp-&gt;status2);</div><div class='del'>-			if(!(csr0 &amp; CSR0_BABL)) /* don't count errors twice */</div><div class='del'>-				dev-&gt;stats.tx_errors++;</div><div class='del'>-			tmdp-&gt;status2 = 0;</div><div class='del'>-		}</div><div class='del'>-		else {</div><div class='del'>-			dev-&gt;stats.tx_bytes -= (short)(tmdp-&gt;blen);</div><div class='del'>-			dev-&gt;stats.tx_packets++;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-#ifdef XMT_VIA_SKB</div><div class='del'>-		if(p-&gt;tmd_skb[p-&gt;tmdlast]) {</div><div class='del'>-			 dev_kfree_skb_irq(p-&gt;tmd_skb[p-&gt;tmdlast]);</div><div class='del'>-			 p-&gt;tmd_skb[p-&gt;tmdlast] = NULL;</div><div class='del'>-		}</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-		p-&gt;tmdlast = (p-&gt;tmdlast + 1) &amp; (TMDNUM-1);</div><div class='del'>-		if(p-&gt;tmdlast == p-&gt;tmdnum)</div><div class='del'>-			p-&gt;xmit_queued = 0;</div><div class='del'>-	}</div><div class='del'>-	netif_wake_queue(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * We have received a packet</div><div class='del'>- */</div><div class='del'>-static void ni65_recv_intr(struct net_device *dev,int csr0)</div><div class='del'>-{</div><div class='del'>-	struct rmd *rmdp;</div><div class='del'>-	int rmdstat,len;</div><div class='del'>-	int cnt=0;</div><div class='del'>-	struct priv *p = dev-&gt;ml_priv;</div><div class='del'>-</div><div class='del'>-	rmdp = p-&gt;rmdhead + p-&gt;rmdnum;</div><div class='del'>-	while(!( (rmdstat = rmdp-&gt;u.s.status) &amp; RCV_OWN))</div><div class='del'>-	{</div><div class='del'>-		cnt++;</div><div class='del'>-		if( (rmdstat &amp; (RCV_START | RCV_END | RCV_ERR)) != (RCV_START | RCV_END) ) /* error or oversized? */</div><div class='del'>-		{</div><div class='del'>-			if(!(rmdstat &amp; RCV_ERR)) {</div><div class='del'>-				if(rmdstat &amp; RCV_START)</div><div class='del'>-				{</div><div class='del'>-					dev-&gt;stats.rx_length_errors++;</div><div class='del'>-					printk(KERN_ERR "%s: recv, packet too long: %d\n",dev-&gt;name,rmdp-&gt;mlen &amp; 0x0fff);</div><div class='del'>-				}</div><div class='del'>-			}</div><div class='del'>-			else {</div><div class='del'>-				if(debuglevel &gt; 2)</div><div class='del'>-					printk(KERN_ERR "%s: receive-error: %04x, lance-status: %04x/%04x\n",</div><div class='del'>-									dev-&gt;name,(int) rmdstat,csr0,(int) inw(PORT+L_DATAREG) );</div><div class='del'>-				if(rmdstat &amp; RCV_FRAM)</div><div class='del'>-					dev-&gt;stats.rx_frame_errors++;</div><div class='del'>-				if(rmdstat &amp; RCV_OFLO)</div><div class='del'>-					dev-&gt;stats.rx_over_errors++;</div><div class='del'>-				if(rmdstat &amp; RCV_CRC)</div><div class='del'>-					dev-&gt;stats.rx_crc_errors++;</div><div class='del'>-				if(rmdstat &amp; RCV_BUF_ERR)</div><div class='del'>-					dev-&gt;stats.rx_fifo_errors++;</div><div class='del'>-			}</div><div class='del'>-			if(!(csr0 &amp; CSR0_MISS)) /* don't count errors twice */</div><div class='del'>-				dev-&gt;stats.rx_errors++;</div><div class='del'>-		}</div><div class='del'>-		else if( (len = (rmdp-&gt;mlen &amp; 0x0fff) - 4) &gt;= 60)</div><div class='del'>-		{</div><div class='del'>-#ifdef RCV_VIA_SKB</div><div class='del'>-			struct sk_buff *skb = alloc_skb(R_BUF_SIZE+2+16,GFP_ATOMIC);</div><div class='del'>-			if (skb)</div><div class='del'>-				skb_reserve(skb,16);</div><div class='del'>-#else</div><div class='del'>-			struct sk_buff *skb = netdev_alloc_skb(dev, len + 2);</div><div class='del'>-#endif</div><div class='del'>-			if(skb)</div><div class='del'>-			{</div><div class='del'>-				skb_reserve(skb,2);</div><div class='del'>-#ifdef RCV_VIA_SKB</div><div class='del'>-				if( (unsigned long) (skb-&gt;data + R_BUF_SIZE) &gt; 0x1000000) {</div><div class='del'>-					skb_put(skb,len);</div><div class='del'>-					skb_copy_to_linear_data(skb, (unsigned char *)(p-&gt;recv_skb[p-&gt;rmdnum]-&gt;data),len);</div><div class='del'>-				}</div><div class='del'>-				else {</div><div class='del'>-					struct sk_buff *skb1 = p-&gt;recv_skb[p-&gt;rmdnum];</div><div class='del'>-					skb_put(skb,R_BUF_SIZE);</div><div class='del'>-					p-&gt;recv_skb[p-&gt;rmdnum] = skb;</div><div class='del'>-					rmdp-&gt;u.buffer = (u32) isa_virt_to_bus(skb-&gt;data);</div><div class='del'>-					skb = skb1;</div><div class='del'>-					skb_trim(skb,len);</div><div class='del'>-				}</div><div class='del'>-#else</div><div class='del'>-				skb_put(skb,len);</div><div class='del'>-				skb_copy_to_linear_data(skb, (unsigned char *) p-&gt;recvbounce[p-&gt;rmdnum],len);</div><div class='del'>-#endif</div><div class='del'>-				dev-&gt;stats.rx_packets++;</div><div class='del'>-				dev-&gt;stats.rx_bytes += len;</div><div class='del'>-				skb-&gt;protocol=eth_type_trans(skb,dev);</div><div class='del'>-				netif_rx(skb);</div><div class='del'>-			}</div><div class='del'>-			else</div><div class='del'>-			{</div><div class='del'>-				printk(KERN_ERR "%s: can't alloc new sk_buff\n",dev-&gt;name);</div><div class='del'>-				dev-&gt;stats.rx_dropped++;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-		else {</div><div class='del'>-			printk(KERN_INFO "%s: received runt packet\n",dev-&gt;name);</div><div class='del'>-			dev-&gt;stats.rx_errors++;</div><div class='del'>-		}</div><div class='del'>-		rmdp-&gt;blen = -(R_BUF_SIZE-8);</div><div class='del'>-		rmdp-&gt;mlen = 0;</div><div class='del'>-		rmdp-&gt;u.s.status = RCV_OWN; /* change owner */</div><div class='del'>-		p-&gt;rmdnum = (p-&gt;rmdnum + 1) &amp; (RMDNUM-1);</div><div class='del'>-		rmdp = p-&gt;rmdhead + p-&gt;rmdnum;</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * kick xmitter ..</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static void ni65_timeout(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-	struct priv *p = dev-&gt;ml_priv;</div><div class='del'>-</div><div class='del'>-	printk(KERN_ERR "%s: xmitter timed out, try to restart!\n",dev-&gt;name);</div><div class='del'>-	for(i=0;i&lt;TMDNUM;i++)</div><div class='del'>-		printk("%02x ",p-&gt;tmdhead[i].u.s.status);</div><div class='del'>-	printk("\n");</div><div class='del'>-	ni65_lance_reinit(dev);</div><div class='del'>-	dev-&gt;trans_start = jiffies; /* prevent tx timeout */</div><div class='del'>-	netif_wake_queue(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *	Send a packet</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-static netdev_tx_t ni65_send_packet(struct sk_buff *skb,</div><div class='del'>-				    struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	struct priv *p = dev-&gt;ml_priv;</div><div class='del'>-</div><div class='del'>-	netif_stop_queue(dev);</div><div class='del'>-</div><div class='del'>-	if (test_and_set_bit(0, (void*)&amp;p-&gt;lock)) {</div><div class='del'>-		printk(KERN_ERR "%s: Queue was locked.\n", dev-&gt;name);</div><div class='del'>-		return NETDEV_TX_BUSY;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	{</div><div class='del'>-		short len = ETH_ZLEN &lt; skb-&gt;len ? skb-&gt;len : ETH_ZLEN;</div><div class='del'>-		struct tmd *tmdp;</div><div class='del'>-		unsigned long flags;</div><div class='del'>-</div><div class='del'>-#ifdef XMT_VIA_SKB</div><div class='del'>-		if( (unsigned long) (skb-&gt;data + skb-&gt;len) &gt; 0x1000000) {</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-			skb_copy_from_linear_data(skb, p-&gt;tmdbounce[p-&gt;tmdbouncenum],</div><div class='del'>-				      skb-&gt;len &gt; T_BUF_SIZE ? T_BUF_SIZE :</div><div class='del'>-							      skb-&gt;len);</div><div class='del'>-			if (len &gt; skb-&gt;len)</div><div class='del'>-				memset((char *)p-&gt;tmdbounce[p-&gt;tmdbouncenum]+skb-&gt;len, 0, len-skb-&gt;len);</div><div class='del'>-			dev_kfree_skb (skb);</div><div class='del'>-</div><div class='del'>-			spin_lock_irqsave(&amp;p-&gt;ring_lock, flags);</div><div class='del'>-			tmdp = p-&gt;tmdhead + p-&gt;tmdnum;</div><div class='del'>-			tmdp-&gt;u.buffer = (u32) isa_virt_to_bus(p-&gt;tmdbounce[p-&gt;tmdbouncenum]);</div><div class='del'>-			p-&gt;tmdbouncenum = (p-&gt;tmdbouncenum + 1) &amp; (TMDNUM - 1);</div><div class='del'>-</div><div class='del'>-#ifdef XMT_VIA_SKB</div><div class='del'>-		}</div><div class='del'>-		else {</div><div class='del'>-			spin_lock_irqsave(&amp;p-&gt;ring_lock, flags);</div><div class='del'>-</div><div class='del'>-			tmdp = p-&gt;tmdhead + p-&gt;tmdnum;</div><div class='del'>-			tmdp-&gt;u.buffer = (u32) isa_virt_to_bus(skb-&gt;data);</div><div class='del'>-			p-&gt;tmd_skb[p-&gt;tmdnum] = skb;</div><div class='del'>-		}</div><div class='del'>-#endif</div><div class='del'>-		tmdp-&gt;blen = -len;</div><div class='del'>-</div><div class='del'>-		tmdp-&gt;u.s.status = XMIT_OWN | XMIT_START | XMIT_END;</div><div class='del'>-		writedatareg(CSR0_TDMD | CSR0_INEA); /* enable xmit &amp; interrupt */</div><div class='del'>-</div><div class='del'>-		p-&gt;xmit_queued = 1;</div><div class='del'>-		p-&gt;tmdnum = (p-&gt;tmdnum + 1) &amp; (TMDNUM-1);</div><div class='del'>-</div><div class='del'>-		if(p-&gt;tmdnum != p-&gt;tmdlast)</div><div class='del'>-			netif_wake_queue(dev);</div><div class='del'>-</div><div class='del'>-		p-&gt;lock = 0;</div><div class='del'>-</div><div class='del'>-		spin_unlock_irqrestore(&amp;p-&gt;ring_lock, flags);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return NETDEV_TX_OK;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void set_multicast_list(struct net_device *dev)</div><div class='del'>-{</div><div class='del'>-	if(!ni65_lance_reinit(dev))</div><div class='del'>-		printk(KERN_ERR "%s: Can't switch card into MC mode!\n",dev-&gt;name);</div><div class='del'>-	netif_wake_queue(dev);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#ifdef MODULE</div><div class='del'>-static struct net_device *dev_ni65;</div><div class='del'>-</div><div class='del'>-module_param(irq, int, 0);</div><div class='del'>-module_param(io, int, 0);</div><div class='del'>-module_param(dma, int, 0);</div><div class='del'>-MODULE_PARM_DESC(irq, "ni6510 IRQ number (ignored for some cards)");</div><div class='del'>-MODULE_PARM_DESC(io, "ni6510 I/O base address");</div><div class='del'>-MODULE_PARM_DESC(dma, "ni6510 ISA DMA channel (ignored for some cards)");</div><div class='del'>-</div><div class='del'>-int __init init_module(void)</div><div class='del'>-{</div><div class='del'>- 	dev_ni65 = ni65_probe(-1);</div><div class='del'>-	return PTR_ERR_OR_ZERO(dev_ni65);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-void __exit cleanup_module(void)</div><div class='del'>-{</div><div class='del'>- 	unregister_netdev(dev_ni65);</div><div class='del'>- 	cleanup_card(dev_ni65);</div><div class='del'>- 	free_netdev(dev_ni65);</div><div class='del'>-}</div><div class='del'>-#endif /* MODULE */</div><div class='del'>-</div><div class='del'>-MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/amd/ni65.h b/drivers/net/ethernet/amd/ni65.h<br/>deleted file mode 100644<br/>index e6217e35edf0..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/ni65.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/ni65.h</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,121 +0,0 @@</div><div class='del'>-/* am7990 (lance) definitions</div><div class='del'>- *</div><div class='del'>- * This is an extension to the Linux operating system, and is covered by</div><div class='del'>- * same GNU General Public License that covers that work.</div><div class='del'>- *</div><div class='del'>- * Michael Hipp</div><div class='del'>- * email: mhipp@student.uni-tuebingen.de</div><div class='del'>- *</div><div class='del'>- * sources: (mail me or ask archie if you need them)</div><div class='del'>- *    crynwr-packet-driver</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * 	Control and Status Register 0 (CSR0) bit definitions</div><div class='del'>- * (R=Readable) (W=Writeable) (S=Set on write) (C-Clear on write)</div><div class='del'>- *</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define CSR0_ERR	0x8000	/* Error summary (R) */</div><div class='del'>-#define CSR0_BABL	0x4000	/* Babble transmitter timeout error (RC) */</div><div class='del'>-#define CSR0_CERR	0x2000	/* Collision Error (RC) */</div><div class='del'>-#define CSR0_MISS	0x1000	/* Missed packet (RC) */</div><div class='del'>-#define CSR0_MERR	0x0800	/* Memory Error (RC) */</div><div class='del'>-#define CSR0_RINT	0x0400	/* Receiver Interrupt (RC) */</div><div class='del'>-#define CSR0_TINT       0x0200	/* Transmit Interrupt (RC) */</div><div class='del'>-#define CSR0_IDON	0x0100	/* Initialization Done (RC) */</div><div class='del'>-#define CSR0_INTR	0x0080	/* Interrupt Flag (R) */</div><div class='del'>-#define CSR0_INEA	0x0040	/* Interrupt Enable (RW) */</div><div class='del'>-#define CSR0_RXON	0x0020	/* Receiver on (R) */</div><div class='del'>-#define CSR0_TXON	0x0010	/* Transmitter on (R) */</div><div class='del'>-#define CSR0_TDMD	0x0008	/* Transmit Demand (RS) */</div><div class='del'>-#define CSR0_STOP	0x0004	/* Stop (RS) */</div><div class='del'>-#define CSR0_STRT	0x0002	/* Start (RS) */</div><div class='del'>-#define CSR0_INIT	0x0001	/* Initialize (RS) */</div><div class='del'>-</div><div class='del'>-#define CSR0_CLRALL    0x7f00	/* mask for all clearable bits */</div><div class='del'>-/*</div><div class='del'>- *	Initialization Block  Mode operation Bit Definitions.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define M_PROM		0x8000	/* Promiscuous Mode */</div><div class='del'>-#define M_INTL		0x0040	/* Internal Loopback */</div><div class='del'>-#define M_DRTY		0x0020	/* Disable Retry */</div><div class='del'>-#define M_COLL		0x0010	/* Force Collision */</div><div class='del'>-#define M_DTCR		0x0008	/* Disable Transmit CRC) */</div><div class='del'>-#define M_LOOP		0x0004	/* Loopback */</div><div class='del'>-#define M_DTX		0x0002	/* Disable the Transmitter */</div><div class='del'>-#define M_DRX		0x0001	/* Disable the Receiver */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * 	Receive message descriptor bit definitions.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define RCV_OWN		0x80	/* owner bit 0 = host, 1 = lance */</div><div class='del'>-#define RCV_ERR		0x40	/* Error Summary */</div><div class='del'>-#define RCV_FRAM	0x20	/* Framing Error */</div><div class='del'>-#define RCV_OFLO	0x10	/* Overflow Error */</div><div class='del'>-#define RCV_CRC		0x08	/* CRC Error */</div><div class='del'>-#define RCV_BUF_ERR	0x04	/* Buffer Error */</div><div class='del'>-#define RCV_START	0x02	/* Start of Packet */</div><div class='del'>-#define RCV_END		0x01	/* End of Packet */</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- *	Transmit  message descriptor bit definitions.</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define XMIT_OWN	0x80	/* owner bit 0 = host, 1 = lance */</div><div class='del'>-#define XMIT_ERR	0x40	/* Error Summary */</div><div class='del'>-#define XMIT_RETRY	0x10	/* more the 1 retry needed to Xmit */</div><div class='del'>-#define XMIT_1_RETRY	0x08	/* one retry needed to Xmit */</div><div class='del'>-#define XMIT_DEF	0x04	/* Deferred */</div><div class='del'>-#define XMIT_START	0x02	/* Start of Packet */</div><div class='del'>-#define XMIT_END	0x01	/* End of Packet */</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * transmit status (2) (valid if XMIT_ERR == 1)</div><div class='del'>- */</div><div class='del'>-</div><div class='del'>-#define XMIT_TDRMASK    0x03ff	/* time-domain-reflectometer-value */</div><div class='del'>-#define XMIT_RTRY 	0x0400	/* Failed after 16 retransmissions  */</div><div class='del'>-#define XMIT_LCAR 	0x0800	/* Loss of Carrier */</div><div class='del'>-#define XMIT_LCOL 	0x1000	/* Late collision */</div><div class='del'>-#define XMIT_RESERV 	0x2000	/* Reserved */</div><div class='del'>-#define XMIT_UFLO 	0x4000	/* Underflow (late memory) */</div><div class='del'>-#define XMIT_BUFF 	0x8000	/* Buffering error (no ENP) */</div><div class='del'>-</div><div class='del'>-struct init_block {</div><div class='del'>-	unsigned short mode;</div><div class='del'>-	unsigned char eaddr[6];</div><div class='del'>-	unsigned char filter[8];</div><div class='del'>-	/* bit 29-31: number of rmd's (power of 2) */</div><div class='del'>-	u32 rrp;		/* receive ring pointer (align 8) */</div><div class='del'>-	/* bit 29-31: number of tmd's (power of 2) */</div><div class='del'>-	u32 trp;		/* transmit ring pointer (align 8) */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct rmd {			/* Receive Message Descriptor */</div><div class='del'>-	union {</div><div class='del'>-		volatile u32 buffer;</div><div class='del'>-		struct {</div><div class='del'>-			volatile unsigned char dummy[3];</div><div class='del'>-			volatile unsigned char status;</div><div class='del'>-		} s;</div><div class='del'>-	} u;</div><div class='del'>-	volatile short blen;</div><div class='del'>-	volatile unsigned short mlen;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-struct tmd {</div><div class='del'>-	union {</div><div class='del'>-		volatile u32 buffer;</div><div class='del'>-		struct {</div><div class='del'>-			volatile unsigned char dummy[3];</div><div class='del'>-			volatile unsigned char status;</div><div class='del'>-		} s;</div><div class='del'>-	} u;</div><div class='del'>-	volatile unsigned short blen;</div><div class='del'>-	volatile unsigned short status2;</div><div class='del'>-};</div><div class='head'>diff --git a/drivers/net/ethernet/amd/nmclan_cs.c b/drivers/net/ethernet/amd/nmclan_cs.c<br/>index 27245efe9f50..37054a670407 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/nmclan_cs.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/nmclan_cs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/nmclan_cs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/nmclan_cs.c</a></div><div class='hunk'>@@ -114,8 +114,6 @@ Log: nmclan_cs.c,v</div><div class='ctx'> #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='ctx'> </div><div class='ctx'> #define DRV_NAME	"nmclan_cs"</div><div class='del'>-#define DRV_VERSION	"0.16"</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> /* ----------------------------------------------------------------------------</div><div class='ctx'> Conditional Compilation Options</div><div class='hunk'>@@ -151,7 +149,7 @@ Include Files</div><div class='ctx'> #include &lt;pcmcia/cistpl.h&gt;</div><div class='ctx'> #include &lt;pcmcia/ds.h&gt;</div><div class='ctx'> </div><div class='del'>-#include &lt;asm/uaccess.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> </div><div class='ctx'> /* ----------------------------------------------------------------------------</div><div class='hunk'>@@ -359,7 +357,6 @@ typedef struct _mace_statistics {</div><div class='ctx'> </div><div class='ctx'> typedef struct _mace_private {</div><div class='ctx'> 	struct pcmcia_device	*p_dev;</div><div class='del'>-    struct net_device_stats linux_stats; /* Linux statistics counters */</div><div class='ctx'>     mace_statistics mace_stats; /* MACE chip statistics counters */</div><div class='ctx'> </div><div class='ctx'>     /* restore_multicast_list() state variables */</div><div class='hunk'>@@ -368,7 +365,7 @@ typedef struct _mace_private {</div><div class='ctx'> </div><div class='ctx'>     char tx_free_frames; /* Number of free transmit frame buffers */</div><div class='ctx'>     char tx_irq_disabled; /* MACE TX interrupt disabled */</div><div class='del'>-    </div><div class='add'>+</div><div class='ctx'>     spinlock_t bank_lock; /* Must be held if you step off bank 0 */</div><div class='ctx'> } mace_private;</div><div class='ctx'> </div><div class='hunk'>@@ -408,7 +405,7 @@ static int mace_open(struct net_device *dev);</div><div class='ctx'> static int mace_close(struct net_device *dev);</div><div class='ctx'> static netdev_tx_t mace_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 					 struct net_device *dev);</div><div class='del'>-static void mace_tx_timeout(struct net_device *dev);</div><div class='add'>+static void mace_tx_timeout(struct net_device *dev, unsigned int txqueue);</div><div class='ctx'> static irqreturn_t mace_interrupt(int irq, void *dev_id);</div><div class='ctx'> static struct net_device_stats *mace_get_stats(struct net_device *dev);</div><div class='ctx'> static int mace_rx(struct net_device *dev, unsigned char RxCnt);</div><div class='hunk'>@@ -427,7 +424,6 @@ static const struct net_device_ops mace_netdev_ops = {</div><div class='ctx'> 	.ndo_set_config		= mace_config,</div><div class='ctx'> 	.ndo_get_stats		= mace_get_stats,</div><div class='ctx'> 	.ndo_set_rx_mode	= set_multicast_list,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='ctx'> 	.ndo_set_mac_address 	= eth_mac_addr,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> };</div><div class='hunk'>@@ -446,7 +442,7 @@ static int nmclan_probe(struct pcmcia_device *link)</div><div class='ctx'>     lp = netdev_priv(dev);</div><div class='ctx'>     lp-&gt;p_dev = link;</div><div class='ctx'>     link-&gt;priv = dev;</div><div class='del'>-    </div><div class='add'>+</div><div class='ctx'>     spin_lock_init(&amp;lp-&gt;bank_lock);</div><div class='ctx'>     link-&gt;resource[0]-&gt;end = 32;</div><div class='ctx'>     link-&gt;resource[0]-&gt;flags |= IO_DATA_PATH_WIDTH_AUTO;</div><div class='hunk'>@@ -489,10 +485,10 @@ static int mace_read(mace_private *lp, unsigned int ioaddr, int reg)</div><div class='ctx'>   unsigned long flags;</div><div class='ctx'> </div><div class='ctx'>   switch (reg &gt;&gt; 4) {</div><div class='del'>-    case 0: /* register 0-15 */</div><div class='add'>+  case 0: /* register 0-15 */</div><div class='ctx'>       data = inb(ioaddr + AM2150_MACE_BASE + reg);</div><div class='ctx'>       break;</div><div class='del'>-    case 1: /* register 16-31 */</div><div class='add'>+  case 1: /* register 16-31 */</div><div class='ctx'>       spin_lock_irqsave(&amp;lp-&gt;bank_lock, flags);</div><div class='ctx'>       MACEBANK(1);</div><div class='ctx'>       data = inb(ioaddr + AM2150_MACE_BASE + (reg &amp; 0x0F));</div><div class='hunk'>@@ -516,10 +512,10 @@ static void mace_write(mace_private *lp, unsigned int ioaddr, int reg,</div><div class='ctx'>   unsigned long flags;</div><div class='ctx'> </div><div class='ctx'>   switch (reg &gt;&gt; 4) {</div><div class='del'>-    case 0: /* register 0-15 */</div><div class='add'>+  case 0: /* register 0-15 */</div><div class='ctx'>       outb(data &amp; 0xFF, ioaddr + AM2150_MACE_BASE + reg);</div><div class='ctx'>       break;</div><div class='del'>-    case 1: /* register 16-31 */</div><div class='add'>+  case 1: /* register 16-31 */</div><div class='ctx'>       spin_lock_irqsave(&amp;lp-&gt;bank_lock, flags);</div><div class='ctx'>       MACEBANK(1);</div><div class='ctx'>       outb(data &amp; 0xFF, ioaddr + AM2150_MACE_BASE + (reg &amp; 0x0F));</div><div class='hunk'>@@ -533,7 +529,8 @@ static void mace_write(mace_private *lp, unsigned int ioaddr, int reg,</div><div class='ctx'> mace_init</div><div class='ctx'> 	Resets the MACE chip.</div><div class='ctx'> ---------------------------------------------------------------------------- */</div><div class='del'>-static int mace_init(mace_private *lp, unsigned int ioaddr, char *enet_addr)</div><div class='add'>+static int mace_init(mace_private *lp, unsigned int ioaddr,</div><div class='add'>+		     const char *enet_addr)</div><div class='ctx'> {</div><div class='ctx'>   int i;</div><div class='ctx'>   int ct = 0;</div><div class='hunk'>@@ -545,7 +542,7 @@ static int mace_init(mace_private *lp, unsigned int ioaddr, char *enet_addr)</div><div class='ctx'>     if(++ct &gt; 500)</div><div class='ctx'>     {</div><div class='ctx'> 	pr_err("reset failed, card removed?\n");</div><div class='del'>-    	return -1;</div><div class='add'>+	return -1;</div><div class='ctx'>     }</div><div class='ctx'>     udelay(1);</div><div class='ctx'>   }</div><div class='hunk'>@@ -570,13 +567,13 @@ static int mace_init(mace_private *lp, unsigned int ioaddr, char *enet_addr)</div><div class='ctx'>    * Or just set ASEL in PHYCC below!</div><div class='ctx'>    */</div><div class='ctx'>   switch (if_port) {</div><div class='del'>-    case 1:</div><div class='add'>+  case 1:</div><div class='ctx'>       mace_write(lp, ioaddr, MACE_PLSCC, 0x02);</div><div class='ctx'>       break;</div><div class='del'>-    case 2:</div><div class='add'>+  case 2:</div><div class='ctx'>       mace_write(lp, ioaddr, MACE_PLSCC, 0x00);</div><div class='ctx'>       break;</div><div class='del'>-    default:</div><div class='add'>+  default:</div><div class='ctx'>       mace_write(lp, ioaddr, MACE_PHYCC, /* ASEL */ 4);</div><div class='ctx'>       /* ASEL Auto Select.  When set, the PORTSEL[1-0] bits are overridden,</div><div class='ctx'> 	 and the MACE device will automatically select the operating media</div><div class='hunk'>@@ -589,11 +586,11 @@ static int mace_init(mace_private *lp, unsigned int ioaddr, char *enet_addr)</div><div class='ctx'>   ct = 0;</div><div class='ctx'>   while (mace_read(lp, ioaddr, MACE_IAC) &amp; MACE_IAC_ADDRCHG)</div><div class='ctx'>   {</div><div class='del'>-  	if(++ ct &gt; 500)</div><div class='del'>-  	{</div><div class='add'>+	if(++ ct &gt; 500)</div><div class='add'>+	{</div><div class='ctx'> 		pr_err("ADDRCHG timeout, card removed?\n");</div><div class='del'>-  		return -1;</div><div class='del'>-  	}</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='ctx'>   }</div><div class='ctx'>   /* Set PADR register */</div><div class='ctx'>   for (i = 0; i &lt; ETH_ALEN; i++)</div><div class='hunk'>@@ -639,7 +636,7 @@ static int nmclan_config(struct pcmcia_device *link)</div><div class='ctx'> 	  kfree(buf);</div><div class='ctx'> 	  goto failed;</div><div class='ctx'>   }</div><div class='del'>-  memcpy(dev-&gt;dev_addr, buf, ETH_ALEN);</div><div class='add'>+  eth_hw_addr_set(dev, buf);</div><div class='ctx'>   kfree(buf);</div><div class='ctx'> </div><div class='ctx'>   /* Verify configuration by reading the MACE ID. */</div><div class='hunk'>@@ -654,12 +651,12 @@ static int nmclan_config(struct pcmcia_device *link)</div><div class='ctx'>     } else {</div><div class='ctx'>       pr_notice("mace id not found: %x %x should be 0x40 0x?9\n",</div><div class='ctx'> 		sig[0], sig[1]);</div><div class='del'>-      return -ENODEV;</div><div class='add'>+      goto failed;</div><div class='ctx'>     }</div><div class='ctx'>   }</div><div class='ctx'> </div><div class='ctx'>   if(mace_init(lp, ioaddr, dev-&gt;dev_addr) == -1)</div><div class='del'>-  	goto failed;</div><div class='add'>+	goto failed;</div><div class='ctx'> </div><div class='ctx'>   /* The if_port symbol can be set when the module is loaded */</div><div class='ctx'>   if (if_port &lt;= 2)</div><div class='hunk'>@@ -763,7 +760,7 @@ static int mace_config(struct net_device *dev, struct ifmap *map)</div><div class='ctx'> {</div><div class='ctx'>   if ((map-&gt;port != (u_char)(-1)) &amp;&amp; (map-&gt;port != dev-&gt;if_port)) {</div><div class='ctx'>     if (map-&gt;port &lt;= 2) {</div><div class='del'>-      dev-&gt;if_port = map-&gt;port;</div><div class='add'>+      WRITE_ONCE(dev-&gt;if_port, map-&gt;port);</div><div class='ctx'>       netdev_info(dev, "switched to %s port\n", if_names[dev-&gt;if_port]);</div><div class='ctx'>     } else</div><div class='ctx'>       return -EINVAL;</div><div class='hunk'>@@ -818,8 +815,7 @@ static int mace_close(struct net_device *dev)</div><div class='ctx'> static void netdev_get_drvinfo(struct net_device *dev,</div><div class='ctx'> 			       struct ethtool_drvinfo *info)</div><div class='ctx'> {</div><div class='del'>-	strlcpy(info-&gt;driver, DRV_NAME, sizeof(info-&gt;driver));</div><div class='del'>-	strlcpy(info-&gt;version, DRV_VERSION, sizeof(info-&gt;version));</div><div class='add'>+	strscpy(info-&gt;driver, DRV_NAME, sizeof(info-&gt;driver));</div><div class='ctx'> 	snprintf(info-&gt;bus_info, sizeof(info-&gt;bus_info),</div><div class='ctx'> 		"PCMCIA 0x%lx", dev-&gt;base_addr);</div><div class='ctx'> }</div><div class='hunk'>@@ -839,7 +835,7 @@ mace_start_xmit</div><div class='ctx'> 	failed, put skb back into a list."</div><div class='ctx'> ---------------------------------------------------------------------------- */</div><div class='ctx'> </div><div class='del'>-static void mace_tx_timeout(struct net_device *dev)</div><div class='add'>+static void mace_tx_timeout(struct net_device *dev, unsigned int txqueue)</div><div class='ctx'> {</div><div class='ctx'>   mace_private *lp = netdev_priv(dev);</div><div class='ctx'>   struct pcmcia_device *link = lp-&gt;p_dev;</div><div class='hunk'>@@ -851,7 +847,7 @@ static void mace_tx_timeout(struct net_device *dev)</div><div class='ctx'> #else /* #if RESET_ON_TIMEOUT */</div><div class='ctx'>   pr_cont("NOT resetting card\n");</div><div class='ctx'> #endif /* #if RESET_ON_TIMEOUT */</div><div class='del'>-  dev-&gt;trans_start = jiffies; /* prevent tx timeout */</div><div class='add'>+  netif_trans_update(dev); /* prevent tx timeout */</div><div class='ctx'>   netif_wake_queue(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -880,7 +876,7 @@ static netdev_tx_t mace_start_xmit(struct sk_buff *skb,</div><div class='ctx'>        service a transmit interrupt while we are in here.</div><div class='ctx'>     */</div><div class='ctx'> </div><div class='del'>-    lp-&gt;linux_stats.tx_bytes += skb-&gt;len;</div><div class='add'>+    dev-&gt;stats.tx_bytes += skb-&gt;len;</div><div class='ctx'>     lp-&gt;tx_free_frames--;</div><div class='ctx'> </div><div class='ctx'>     /* WARNING: Write the _exact_ number of bytes written in the header! */</div><div class='hunk'>@@ -922,7 +918,7 @@ static irqreturn_t mace_interrupt(int irq, void *dev_id)</div><div class='ctx'>   int status;</div><div class='ctx'>   int IntrCnt = MACE_MAX_IR_ITERATIONS;</div><div class='ctx'> </div><div class='del'>-  if (dev == NULL) {</div><div class='add'>+  if (!dev) {</div><div class='ctx'>     pr_debug("mace_interrupt(): irq 0x%X for unknown device.\n",</div><div class='ctx'> 	  irq);</div><div class='ctx'>     return IRQ_NONE;</div><div class='hunk'>@@ -968,7 +964,7 @@ static irqreturn_t mace_interrupt(int irq, void *dev_id)</div><div class='ctx'> </div><div class='ctx'>       fifofc = inb(ioaddr + AM2150_MACE_BASE + MACE_FIFOFC);</div><div class='ctx'>       if ((fifofc &amp; MACE_FIFOFC_XMTFC)==0) {</div><div class='del'>-	lp-&gt;linux_stats.tx_errors++;</div><div class='add'>+	dev-&gt;stats.tx_errors++;</div><div class='ctx'> 	outb(0xFF, ioaddr + AM2150_XMT_SKIP);</div><div class='ctx'>       }</div><div class='ctx'> </div><div class='hunk'>@@ -1017,7 +1013,7 @@ static irqreturn_t mace_interrupt(int irq, void *dev_id)</div><div class='ctx'> </div><div class='ctx'>       } /* if (xmtfs &amp; MACE_XMTFS_XMTSV) */</div><div class='ctx'> </div><div class='del'>-      lp-&gt;linux_stats.tx_packets++;</div><div class='add'>+      dev-&gt;stats.tx_packets++;</div><div class='ctx'>       lp-&gt;tx_free_frames++;</div><div class='ctx'>       netif_wake_queue(dev);</div><div class='ctx'>     } /* if (status &amp; MACE_IR_XMTINT) */</div><div class='hunk'>@@ -1078,7 +1074,7 @@ static int mace_rx(struct net_device *dev, unsigned char RxCnt)</div><div class='ctx'> 	  " 0x%X.\n", dev-&gt;name, rx_framecnt, rx_status);</div><div class='ctx'> </div><div class='ctx'>     if (rx_status &amp; MACE_RCVFS_RCVSTS) { /* Error, update stats. */</div><div class='del'>-      lp-&gt;linux_stats.rx_errors++;</div><div class='add'>+      dev-&gt;stats.rx_errors++;</div><div class='ctx'>       if (rx_status &amp; MACE_RCVFS_OFLO) {</div><div class='ctx'>         lp-&gt;mace_stats.oflo++;</div><div class='ctx'>       }</div><div class='hunk'>@@ -1106,23 +1102,23 @@ static int mace_rx(struct net_device *dev, unsigned char RxCnt)</div><div class='ctx'> </div><div class='ctx'>       skb = netdev_alloc_skb(dev, pkt_len + 2);</div><div class='ctx'> </div><div class='del'>-      if (skb != NULL) {</div><div class='add'>+      if (skb) {</div><div class='ctx'> 	skb_reserve(skb, 2);</div><div class='ctx'> 	insw(ioaddr + AM2150_RCV, skb_put(skb, pkt_len), pkt_len&gt;&gt;1);</div><div class='ctx'> 	if (pkt_len &amp; 1)</div><div class='ctx'> 	    *(skb_tail_pointer(skb) - 1) = inb(ioaddr + AM2150_RCV);</div><div class='ctx'> 	skb-&gt;protocol = eth_type_trans(skb, dev);</div><div class='del'>-	</div><div class='add'>+</div><div class='ctx'> 	netif_rx(skb); /* Send the packet to the upper (protocol) layers. */</div><div class='ctx'> </div><div class='del'>-	lp-&gt;linux_stats.rx_packets++;</div><div class='del'>-	lp-&gt;linux_stats.rx_bytes += pkt_len;</div><div class='add'>+	dev-&gt;stats.rx_packets++;</div><div class='add'>+	dev-&gt;stats.rx_bytes += pkt_len;</div><div class='ctx'> 	outb(0xFF, ioaddr + AM2150_RCV_NEXT); /* skip to next frame */</div><div class='ctx'> 	continue;</div><div class='ctx'>       } else {</div><div class='ctx'> 	pr_debug("%s: couldn't allocate a sk_buff of size"</div><div class='ctx'> 	      " %d.\n", dev-&gt;name, pkt_len);</div><div class='del'>-	lp-&gt;linux_stats.rx_dropped++;</div><div class='add'>+	dev-&gt;stats.rx_dropped++;</div><div class='ctx'>       }</div><div class='ctx'>     }</div><div class='ctx'>     outb(0xFF, ioaddr + AM2150_RCV_NEXT); /* skip to next frame */</div><div class='hunk'>@@ -1232,13 +1228,13 @@ static void update_stats(unsigned int ioaddr, struct net_device *dev)</div><div class='ctx'>   lp-&gt;mace_stats.rntpc += mace_read(lp, ioaddr, MACE_RNTPC);</div><div class='ctx'>   lp-&gt;mace_stats.mpc += mace_read(lp, ioaddr, MACE_MPC);</div><div class='ctx'>   /* At this point, mace_stats is fully updated for this call.</div><div class='del'>-     We may now update the linux_stats. */</div><div class='add'>+     We may now update the netdev stats. */</div><div class='ctx'> </div><div class='del'>-  /* The MACE has no equivalent for linux_stats field which are commented</div><div class='add'>+  /* The MACE has no equivalent for netdev stats field which are commented</div><div class='ctx'>      out. */</div><div class='ctx'> </div><div class='del'>-  /* lp-&gt;linux_stats.multicast; */</div><div class='del'>-  lp-&gt;linux_stats.collisions = </div><div class='add'>+  /* dev-&gt;stats.multicast; */</div><div class='add'>+  dev-&gt;stats.collisions =</div><div class='ctx'>     lp-&gt;mace_stats.rcvcco * 256 + lp-&gt;mace_stats.rcvcc;</div><div class='ctx'>     /* Collision: The MACE may retry sending a packet 15 times</div><div class='ctx'>        before giving up.  The retry count is in XMTRC.</div><div class='hunk'>@@ -1246,22 +1242,22 @@ static void update_stats(unsigned int ioaddr, struct net_device *dev)</div><div class='ctx'>        If so, why doesn't the RCVCC record these collisions? */</div><div class='ctx'> </div><div class='ctx'>   /* detailed rx_errors: */</div><div class='del'>-  lp-&gt;linux_stats.rx_length_errors = </div><div class='add'>+  dev-&gt;stats.rx_length_errors =</div><div class='ctx'>     lp-&gt;mace_stats.rntpco * 256 + lp-&gt;mace_stats.rntpc;</div><div class='del'>-  /* lp-&gt;linux_stats.rx_over_errors */</div><div class='del'>-  lp-&gt;linux_stats.rx_crc_errors = lp-&gt;mace_stats.fcs;</div><div class='del'>-  lp-&gt;linux_stats.rx_frame_errors = lp-&gt;mace_stats.fram;</div><div class='del'>-  lp-&gt;linux_stats.rx_fifo_errors = lp-&gt;mace_stats.oflo;</div><div class='del'>-  lp-&gt;linux_stats.rx_missed_errors = </div><div class='add'>+  /* dev-&gt;stats.rx_over_errors */</div><div class='add'>+  dev-&gt;stats.rx_crc_errors = lp-&gt;mace_stats.fcs;</div><div class='add'>+  dev-&gt;stats.rx_frame_errors = lp-&gt;mace_stats.fram;</div><div class='add'>+  dev-&gt;stats.rx_fifo_errors = lp-&gt;mace_stats.oflo;</div><div class='add'>+  dev-&gt;stats.rx_missed_errors =</div><div class='ctx'>     lp-&gt;mace_stats.mpco * 256 + lp-&gt;mace_stats.mpc;</div><div class='ctx'> </div><div class='ctx'>   /* detailed tx_errors */</div><div class='del'>-  lp-&gt;linux_stats.tx_aborted_errors = lp-&gt;mace_stats.rtry;</div><div class='del'>-  lp-&gt;linux_stats.tx_carrier_errors = lp-&gt;mace_stats.lcar;</div><div class='add'>+  dev-&gt;stats.tx_aborted_errors = lp-&gt;mace_stats.rtry;</div><div class='add'>+  dev-&gt;stats.tx_carrier_errors = lp-&gt;mace_stats.lcar;</div><div class='ctx'>     /* LCAR usually results from bad cabling. */</div><div class='del'>-  lp-&gt;linux_stats.tx_fifo_errors = lp-&gt;mace_stats.uflo;</div><div class='del'>-  lp-&gt;linux_stats.tx_heartbeat_errors = lp-&gt;mace_stats.cerr;</div><div class='del'>-  /* lp-&gt;linux_stats.tx_window_errors; */</div><div class='add'>+  dev-&gt;stats.tx_fifo_errors = lp-&gt;mace_stats.uflo;</div><div class='add'>+  dev-&gt;stats.tx_heartbeat_errors = lp-&gt;mace_stats.cerr;</div><div class='add'>+  /* dev-&gt;stats.tx_window_errors; */</div><div class='ctx'> } /* update_stats */</div><div class='ctx'> </div><div class='ctx'> /* ----------------------------------------------------------------------------</div><div class='hunk'>@@ -1275,10 +1271,10 @@ static struct net_device_stats *mace_get_stats(struct net_device *dev)</div><div class='ctx'>   update_stats(dev-&gt;base_addr, dev);</div><div class='ctx'> </div><div class='ctx'>   pr_debug("%s: updating the statistics.\n", dev-&gt;name);</div><div class='del'>-  pr_linux_stats(&amp;lp-&gt;linux_stats);</div><div class='add'>+  pr_linux_stats(&amp;dev-&gt;stats);</div><div class='ctx'>   pr_mace_stats(&amp;lp-&gt;mace_stats);</div><div class='ctx'> </div><div class='del'>-  return &amp;lp-&gt;linux_stats;</div><div class='add'>+  return &amp;dev-&gt;stats;</div><div class='ctx'> } /* net_device_stats */</div><div class='ctx'> </div><div class='ctx'> /* ----------------------------------------------------------------------------</div><div class='head'>diff --git a/drivers/net/ethernet/amd/pcnet32.c b/drivers/net/ethernet/amd/pcnet32.c<br/>index bc8b04f42882..9eaefa0f5e80 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/pcnet32.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/pcnet32.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/pcnet32.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/pcnet32.c</a></div><div class='hunk'>@@ -24,13 +24,9 @@</div><div class='ctx'> #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='ctx'> </div><div class='ctx'> #define DRV_NAME	"pcnet32"</div><div class='del'>-#define DRV_VERSION	"1.35"</div><div class='ctx'> #define DRV_RELDATE	"21.Apr.2008"</div><div class='ctx'> #define PFX		DRV_NAME ": "</div><div class='ctx'> </div><div class='del'>-static const char *const version =</div><div class='del'>-    DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " tsbogend@alpha.franken.de\n";</div><div class='del'>-</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/kernel.h&gt;</div><div class='ctx'> #include &lt;linux/sched.h&gt;</div><div class='hunk'>@@ -254,7 +250,7 @@ struct pcnet32_access {</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * The first field of pcnet32_private is read by the ethernet device</div><div class='del'>- * so the structure should be allocated using pci_alloc_consistent().</div><div class='add'>+ * so the structure should be allocated using dma_alloc_coherent().</div><div class='ctx'>  */</div><div class='ctx'> struct pcnet32_private {</div><div class='ctx'> 	struct pcnet32_init_block *init_block;</div><div class='hunk'>@@ -262,7 +258,7 @@ struct pcnet32_private {</div><div class='ctx'> 	struct pcnet32_rx_head	*rx_ring;</div><div class='ctx'> 	struct pcnet32_tx_head	*tx_ring;</div><div class='ctx'> 	dma_addr_t		init_dma_addr;/* DMA address of beginning of the init block,</div><div class='del'>-				   returned by pci_alloc_consistent */</div><div class='add'>+				   returned by dma_alloc_coherent */</div><div class='ctx'> 	struct pci_dev		*pci_dev;</div><div class='ctx'> 	const char		*name;</div><div class='ctx'> 	/* The saved address of a sent-in-place packet/buffer, for skfree(). */</div><div class='hunk'>@@ -291,7 +287,10 @@ struct pcnet32_private {</div><div class='ctx'> 	int			options;</div><div class='ctx'> 	unsigned int		shared_irq:1,	/* shared irq possible */</div><div class='ctx'> 				dxsuflo:1,   /* disable transmit stop on uflo */</div><div class='del'>-				mii:1;		/* mii port available */</div><div class='add'>+				mii:1,		/* mii port available */</div><div class='add'>+				autoneg:1,	/* autoneg enabled */</div><div class='add'>+				port_tp:1,	/* port set to TP */</div><div class='add'>+				fdx:1;		/* full duplex enabled */</div><div class='ctx'> 	struct net_device	*next;</div><div class='ctx'> 	struct mii_if_info	mii_if;</div><div class='ctx'> 	struct timer_list	watchdog_timer;</div><div class='hunk'>@@ -311,14 +310,14 @@ static int pcnet32_open(struct net_device *);</div><div class='ctx'> static int pcnet32_init_ring(struct net_device *);</div><div class='ctx'> static netdev_tx_t pcnet32_start_xmit(struct sk_buff *,</div><div class='ctx'> 				      struct net_device *);</div><div class='del'>-static void pcnet32_tx_timeout(struct net_device *dev);</div><div class='add'>+static void pcnet32_tx_timeout(struct net_device *dev, unsigned int txqueue);</div><div class='ctx'> static irqreturn_t pcnet32_interrupt(int, void *);</div><div class='ctx'> static int pcnet32_close(struct net_device *);</div><div class='ctx'> static struct net_device_stats *pcnet32_get_stats(struct net_device *);</div><div class='ctx'> static void pcnet32_load_multicast(struct net_device *dev);</div><div class='ctx'> static void pcnet32_set_multicast_list(struct net_device *);</div><div class='ctx'> static int pcnet32_ioctl(struct net_device *, struct ifreq *, int);</div><div class='del'>-static void pcnet32_watchdog(struct net_device *);</div><div class='add'>+static void pcnet32_watchdog(struct timer_list *);</div><div class='ctx'> static int mdio_read(struct net_device *dev, int phy_id, int reg_num);</div><div class='ctx'> static void mdio_write(struct net_device *dev, int phy_id, int reg_num,</div><div class='ctx'> 		       int val);</div><div class='hunk'>@@ -448,7 +447,7 @@ static void pcnet32_netif_stop(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct pcnet32_private *lp = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	dev-&gt;trans_start = jiffies; /* prevent tx timeout */</div><div class='add'>+	netif_trans_update(dev); /* prevent tx timeout */</div><div class='ctx'> 	napi_disable(&amp;lp-&gt;napi);</div><div class='ctx'> 	netif_tx_disable(dev);</div><div class='ctx'> }</div><div class='hunk'>@@ -463,7 +462,7 @@ static void pcnet32_netif_start(struct net_device *dev)</div><div class='ctx'> 	val = lp-&gt;a-&gt;read_csr(ioaddr, CSR3);</div><div class='ctx'> 	val &amp;= 0x00ff;</div><div class='ctx'> 	lp-&gt;a-&gt;write_csr(ioaddr, CSR3, val);</div><div class='del'>-	napi_enable(&amp;lp-&gt;napi);</div><div class='add'>+	napi_enable_locked(&amp;lp-&gt;napi);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -486,10 +485,10 @@ static void pcnet32_realloc_tx_ring(struct net_device *dev,</div><div class='ctx'> 	pcnet32_purge_tx_ring(dev);</div><div class='ctx'> </div><div class='ctx'> 	new_tx_ring =</div><div class='del'>-		pci_zalloc_consistent(lp-&gt;pci_dev,</div><div class='del'>-				      sizeof(struct pcnet32_tx_head) * entries,</div><div class='del'>-				      &amp;new_ring_dma_addr);</div><div class='del'>-	if (new_tx_ring == NULL)</div><div class='add'>+		dma_alloc_coherent(&amp;lp-&gt;pci_dev-&gt;dev,</div><div class='add'>+				   sizeof(struct pcnet32_tx_head) * entries,</div><div class='add'>+				   &amp;new_ring_dma_addr, GFP_ATOMIC);</div><div class='add'>+	if (!new_tx_ring)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	new_dma_addr_list = kcalloc(entries, sizeof(dma_addr_t), GFP_ATOMIC);</div><div class='hunk'>@@ -502,9 +501,9 @@ static void pcnet32_realloc_tx_ring(struct net_device *dev,</div><div class='ctx'> </div><div class='ctx'> 	kfree(lp-&gt;tx_skbuff);</div><div class='ctx'> 	kfree(lp-&gt;tx_dma_addr);</div><div class='del'>-	pci_free_consistent(lp-&gt;pci_dev,</div><div class='del'>-			    sizeof(struct pcnet32_tx_head) * lp-&gt;tx_ring_size,</div><div class='del'>-			    lp-&gt;tx_ring, lp-&gt;tx_ring_dma_addr);</div><div class='add'>+	dma_free_coherent(&amp;lp-&gt;pci_dev-&gt;dev,</div><div class='add'>+			  sizeof(struct pcnet32_tx_head) * lp-&gt;tx_ring_size,</div><div class='add'>+			  lp-&gt;tx_ring, lp-&gt;tx_ring_dma_addr);</div><div class='ctx'> </div><div class='ctx'> 	lp-&gt;tx_ring_size = entries;</div><div class='ctx'> 	lp-&gt;tx_mod_mask = lp-&gt;tx_ring_size - 1;</div><div class='hunk'>@@ -518,10 +517,9 @@ static void pcnet32_realloc_tx_ring(struct net_device *dev,</div><div class='ctx'> free_new_lists:</div><div class='ctx'> 	kfree(new_dma_addr_list);</div><div class='ctx'> free_new_tx_ring:</div><div class='del'>-	pci_free_consistent(lp-&gt;pci_dev,</div><div class='del'>-			    sizeof(struct pcnet32_tx_head) * entries,</div><div class='del'>-			    new_tx_ring,</div><div class='del'>-			    new_ring_dma_addr);</div><div class='add'>+	dma_free_coherent(&amp;lp-&gt;pci_dev-&gt;dev,</div><div class='add'>+			  sizeof(struct pcnet32_tx_head) * entries,</div><div class='add'>+			  new_tx_ring, new_ring_dma_addr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -546,10 +544,10 @@ static void pcnet32_realloc_rx_ring(struct net_device *dev,</div><div class='ctx'> 	unsigned int entries = BIT(size);</div><div class='ctx'> </div><div class='ctx'> 	new_rx_ring =</div><div class='del'>-		pci_zalloc_consistent(lp-&gt;pci_dev,</div><div class='del'>-				      sizeof(struct pcnet32_rx_head) * entries,</div><div class='del'>-				      &amp;new_ring_dma_addr);</div><div class='del'>-	if (new_rx_ring == NULL)</div><div class='add'>+		dma_alloc_coherent(&amp;lp-&gt;pci_dev-&gt;dev,</div><div class='add'>+				   sizeof(struct pcnet32_rx_head) * entries,</div><div class='add'>+				   &amp;new_ring_dma_addr, GFP_ATOMIC);</div><div class='add'>+	if (!new_rx_ring)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='ctx'> 	new_dma_addr_list = kcalloc(entries, sizeof(dma_addr_t), GFP_ATOMIC);</div><div class='hunk'>@@ -581,10 +579,9 @@ static void pcnet32_realloc_rx_ring(struct net_device *dev,</div><div class='ctx'> 		skb_reserve(rx_skbuff, NET_IP_ALIGN);</div><div class='ctx'> </div><div class='ctx'> 		new_dma_addr_list[new] =</div><div class='del'>-			    pci_map_single(lp-&gt;pci_dev, rx_skbuff-&gt;data,</div><div class='del'>-					   PKT_BUF_SIZE, PCI_DMA_FROMDEVICE);</div><div class='del'>-		if (pci_dma_mapping_error(lp-&gt;pci_dev,</div><div class='del'>-					  new_dma_addr_list[new])) {</div><div class='add'>+			    dma_map_single(&amp;lp-&gt;pci_dev-&gt;dev, rx_skbuff-&gt;data,</div><div class='add'>+					   PKT_BUF_SIZE, DMA_FROM_DEVICE);</div><div class='add'>+		if (dma_mapping_error(&amp;lp-&gt;pci_dev-&gt;dev, new_dma_addr_list[new])) {</div><div class='ctx'> 			netif_err(lp, drv, dev, "%s dma mapping failed\n",</div><div class='ctx'> 				  __func__);</div><div class='ctx'> 			dev_kfree_skb(new_skb_list[new]);</div><div class='hunk'>@@ -597,22 +594,20 @@ static void pcnet32_realloc_rx_ring(struct net_device *dev,</div><div class='ctx'> 	/* and free any unneeded buffers */</div><div class='ctx'> 	for (; new &lt; lp-&gt;rx_ring_size; new++) {</div><div class='ctx'> 		if (lp-&gt;rx_skbuff[new]) {</div><div class='del'>-			if (!pci_dma_mapping_error(lp-&gt;pci_dev,</div><div class='del'>-						   lp-&gt;rx_dma_addr[new]))</div><div class='del'>-				pci_unmap_single(lp-&gt;pci_dev,</div><div class='add'>+			if (!dma_mapping_error(&amp;lp-&gt;pci_dev-&gt;dev, lp-&gt;rx_dma_addr[new]))</div><div class='add'>+				dma_unmap_single(&amp;lp-&gt;pci_dev-&gt;dev,</div><div class='ctx'> 						 lp-&gt;rx_dma_addr[new],</div><div class='ctx'> 						 PKT_BUF_SIZE,</div><div class='del'>-						 PCI_DMA_FROMDEVICE);</div><div class='add'>+						 DMA_FROM_DEVICE);</div><div class='ctx'> 			dev_kfree_skb(lp-&gt;rx_skbuff[new]);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	kfree(lp-&gt;rx_skbuff);</div><div class='ctx'> 	kfree(lp-&gt;rx_dma_addr);</div><div class='del'>-	pci_free_consistent(lp-&gt;pci_dev,</div><div class='del'>-			    sizeof(struct pcnet32_rx_head) *</div><div class='del'>-			    lp-&gt;rx_ring_size, lp-&gt;rx_ring,</div><div class='del'>-			    lp-&gt;rx_ring_dma_addr);</div><div class='add'>+	dma_free_coherent(&amp;lp-&gt;pci_dev-&gt;dev,</div><div class='add'>+			  sizeof(struct pcnet32_rx_head) * lp-&gt;rx_ring_size,</div><div class='add'>+			  lp-&gt;rx_ring, lp-&gt;rx_ring_dma_addr);</div><div class='ctx'> </div><div class='ctx'> 	lp-&gt;rx_ring_size = entries;</div><div class='ctx'> 	lp-&gt;rx_mod_mask = lp-&gt;rx_ring_size - 1;</div><div class='hunk'>@@ -626,12 +621,11 @@ static void pcnet32_realloc_rx_ring(struct net_device *dev,</div><div class='ctx'> free_all_new:</div><div class='ctx'> 	while (--new &gt;= lp-&gt;rx_ring_size) {</div><div class='ctx'> 		if (new_skb_list[new]) {</div><div class='del'>-			if (!pci_dma_mapping_error(lp-&gt;pci_dev,</div><div class='del'>-						   new_dma_addr_list[new]))</div><div class='del'>-				pci_unmap_single(lp-&gt;pci_dev,</div><div class='add'>+			if (!dma_mapping_error(&amp;lp-&gt;pci_dev-&gt;dev, new_dma_addr_list[new]))</div><div class='add'>+				dma_unmap_single(&amp;lp-&gt;pci_dev-&gt;dev,</div><div class='ctx'> 						 new_dma_addr_list[new],</div><div class='ctx'> 						 PKT_BUF_SIZE,</div><div class='del'>-						 PCI_DMA_FROMDEVICE);</div><div class='add'>+						 DMA_FROM_DEVICE);</div><div class='ctx'> 			dev_kfree_skb(new_skb_list[new]);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -639,10 +633,9 @@ free_all_new:</div><div class='ctx'> free_new_lists:</div><div class='ctx'> 	kfree(new_dma_addr_list);</div><div class='ctx'> free_new_rx_ring:</div><div class='del'>-	pci_free_consistent(lp-&gt;pci_dev,</div><div class='del'>-			    sizeof(struct pcnet32_rx_head) * entries,</div><div class='del'>-			    new_rx_ring,</div><div class='del'>-			    new_ring_dma_addr);</div><div class='add'>+	dma_free_coherent(&amp;lp-&gt;pci_dev-&gt;dev,</div><div class='add'>+			  sizeof(struct pcnet32_rx_head) * entries,</div><div class='add'>+			  new_rx_ring, new_ring_dma_addr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void pcnet32_purge_rx_ring(struct net_device *dev)</div><div class='hunk'>@@ -655,12 +648,11 @@ static void pcnet32_purge_rx_ring(struct net_device *dev)</div><div class='ctx'> 		lp-&gt;rx_ring[i].status = 0;	/* CPU owns buffer */</div><div class='ctx'> 		wmb();		/* Make sure adapter sees owner change */</div><div class='ctx'> 		if (lp-&gt;rx_skbuff[i]) {</div><div class='del'>-			if (!pci_dma_mapping_error(lp-&gt;pci_dev,</div><div class='del'>-						   lp-&gt;rx_dma_addr[i]))</div><div class='del'>-				pci_unmap_single(lp-&gt;pci_dev,</div><div class='add'>+			if (!dma_mapping_error(&amp;lp-&gt;pci_dev-&gt;dev, lp-&gt;rx_dma_addr[i]))</div><div class='add'>+				dma_unmap_single(&amp;lp-&gt;pci_dev-&gt;dev,</div><div class='ctx'> 						 lp-&gt;rx_dma_addr[i],</div><div class='ctx'> 						 PKT_BUF_SIZE,</div><div class='del'>-						 PCI_DMA_FROMDEVICE);</div><div class='add'>+						 DMA_FROM_DEVICE);</div><div class='ctx'> 			dev_kfree_skb_any(lp-&gt;rx_skbuff[i]);</div><div class='ctx'> 		}</div><div class='ctx'> 		lp-&gt;rx_skbuff[i] = NULL;</div><div class='hunk'>@@ -677,32 +669,126 @@ static void pcnet32_poll_controller(struct net_device *dev)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-static int pcnet32_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)</div><div class='add'>+/*</div><div class='add'>+ * lp-&gt;lock must be held.</div><div class='add'>+ */</div><div class='add'>+static int pcnet32_suspend(struct net_device *dev, unsigned long *flags,</div><div class='add'>+			   int can_sleep)</div><div class='add'>+{</div><div class='add'>+	int csr5;</div><div class='add'>+	struct pcnet32_private *lp = netdev_priv(dev);</div><div class='add'>+	const struct pcnet32_access *a = lp-&gt;a;</div><div class='add'>+	ulong ioaddr = dev-&gt;base_addr;</div><div class='add'>+	int ticks;</div><div class='add'>+</div><div class='add'>+	/* really old chips have to be stopped. */</div><div class='add'>+	if (lp-&gt;chip_version &lt; PCNET32_79C970A)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* set SUSPEND (SPND) - CSR5 bit 0 */</div><div class='add'>+	csr5 = a-&gt;read_csr(ioaddr, CSR5);</div><div class='add'>+	a-&gt;write_csr(ioaddr, CSR5, csr5 | CSR5_SUSPEND);</div><div class='add'>+</div><div class='add'>+	/* poll waiting for bit to be set */</div><div class='add'>+	ticks = 0;</div><div class='add'>+	while (!(a-&gt;read_csr(ioaddr, CSR5) &amp; CSR5_SUSPEND)) {</div><div class='add'>+		spin_unlock_irqrestore(&amp;lp-&gt;lock, *flags);</div><div class='add'>+		if (can_sleep)</div><div class='add'>+			msleep(1);</div><div class='add'>+		else</div><div class='add'>+			mdelay(1);</div><div class='add'>+		spin_lock_irqsave(&amp;lp-&gt;lock, *flags);</div><div class='add'>+		ticks++;</div><div class='add'>+		if (ticks &gt; 200) {</div><div class='add'>+			netif_printk(lp, hw, KERN_DEBUG, dev,</div><div class='add'>+				     "Error getting into suspend!\n");</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pcnet32_clr_suspend(struct pcnet32_private *lp, ulong ioaddr)</div><div class='add'>+{</div><div class='add'>+	int csr5 = lp-&gt;a-&gt;read_csr(ioaddr, CSR5);</div><div class='add'>+	/* clear SUSPEND (SPND) - CSR5 bit 0 */</div><div class='add'>+	lp-&gt;a-&gt;write_csr(ioaddr, CSR5, csr5 &amp; ~CSR5_SUSPEND);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pcnet32_get_link_ksettings(struct net_device *dev,</div><div class='add'>+				      struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct pcnet32_private *lp = netdev_priv(dev);</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-	int r = -EOPNOTSUPP;</div><div class='ctx'> </div><div class='add'>+	spin_lock_irqsave(&amp;lp-&gt;lock, flags);</div><div class='ctx'> 	if (lp-&gt;mii) {</div><div class='del'>-		spin_lock_irqsave(&amp;lp-&gt;lock, flags);</div><div class='del'>-		mii_ethtool_gset(&amp;lp-&gt;mii_if, cmd);</div><div class='del'>-		spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);</div><div class='del'>-		r = 0;</div><div class='add'>+		mii_ethtool_get_link_ksettings(&amp;lp-&gt;mii_if, cmd);</div><div class='add'>+	} else if (lp-&gt;chip_version == PCNET32_79C970A) {</div><div class='add'>+		if (lp-&gt;autoneg) {</div><div class='add'>+			cmd-&gt;base.autoneg = AUTONEG_ENABLE;</div><div class='add'>+			if (lp-&gt;a-&gt;read_bcr(dev-&gt;base_addr, 4) == 0xc0)</div><div class='add'>+				cmd-&gt;base.port = PORT_AUI;</div><div class='add'>+			else</div><div class='add'>+				cmd-&gt;base.port = PORT_TP;</div><div class='add'>+		} else {</div><div class='add'>+			cmd-&gt;base.autoneg = AUTONEG_DISABLE;</div><div class='add'>+			cmd-&gt;base.port = lp-&gt;port_tp ? PORT_TP : PORT_AUI;</div><div class='add'>+		}</div><div class='add'>+		cmd-&gt;base.duplex = lp-&gt;fdx ? DUPLEX_FULL : DUPLEX_HALF;</div><div class='add'>+		cmd-&gt;base.speed = SPEED_10;</div><div class='add'>+		ethtool_convert_legacy_u32_to_link_mode(</div><div class='add'>+						cmd-&gt;link_modes.supported,</div><div class='add'>+						SUPPORTED_TP | SUPPORTED_AUI);</div><div class='ctx'> 	}</div><div class='del'>-	return r;</div><div class='add'>+	spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pcnet32_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)</div><div class='add'>+static int pcnet32_set_link_ksettings(struct net_device *dev,</div><div class='add'>+				      const struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct pcnet32_private *lp = netdev_priv(dev);</div><div class='add'>+	ulong ioaddr = dev-&gt;base_addr;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> 	int r = -EOPNOTSUPP;</div><div class='add'>+	int suspended, bcr2, bcr9, csr15;</div><div class='ctx'> </div><div class='add'>+	spin_lock_irqsave(&amp;lp-&gt;lock, flags);</div><div class='ctx'> 	if (lp-&gt;mii) {</div><div class='del'>-		spin_lock_irqsave(&amp;lp-&gt;lock, flags);</div><div class='del'>-		r = mii_ethtool_sset(&amp;lp-&gt;mii_if, cmd);</div><div class='del'>-		spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);</div><div class='add'>+		r = mii_ethtool_set_link_ksettings(&amp;lp-&gt;mii_if, cmd);</div><div class='add'>+	} else if (lp-&gt;chip_version == PCNET32_79C970A) {</div><div class='add'>+		suspended = pcnet32_suspend(dev, &amp;flags, 0);</div><div class='add'>+		if (!suspended)</div><div class='add'>+			lp-&gt;a-&gt;write_csr(ioaddr, CSR0, CSR0_STOP);</div><div class='add'>+</div><div class='add'>+		lp-&gt;autoneg = cmd-&gt;base.autoneg == AUTONEG_ENABLE;</div><div class='add'>+		bcr2 = lp-&gt;a-&gt;read_bcr(ioaddr, 2);</div><div class='add'>+		if (cmd-&gt;base.autoneg == AUTONEG_ENABLE) {</div><div class='add'>+			lp-&gt;a-&gt;write_bcr(ioaddr, 2, bcr2 | 0x0002);</div><div class='add'>+		} else {</div><div class='add'>+			lp-&gt;a-&gt;write_bcr(ioaddr, 2, bcr2 &amp; ~0x0002);</div><div class='add'>+</div><div class='add'>+			lp-&gt;port_tp = cmd-&gt;base.port == PORT_TP;</div><div class='add'>+			csr15 = lp-&gt;a-&gt;read_csr(ioaddr, CSR15) &amp; ~0x0180;</div><div class='add'>+			if (cmd-&gt;base.port == PORT_TP)</div><div class='add'>+				csr15 |= 0x0080;</div><div class='add'>+			lp-&gt;a-&gt;write_csr(ioaddr, CSR15, csr15);</div><div class='add'>+			lp-&gt;init_block-&gt;mode = cpu_to_le16(csr15);</div><div class='add'>+</div><div class='add'>+			lp-&gt;fdx = cmd-&gt;base.duplex == DUPLEX_FULL;</div><div class='add'>+			bcr9 = lp-&gt;a-&gt;read_bcr(ioaddr, 9) &amp; ~0x0003;</div><div class='add'>+			if (cmd-&gt;base.duplex == DUPLEX_FULL)</div><div class='add'>+				bcr9 |= 0x0003;</div><div class='add'>+			lp-&gt;a-&gt;write_bcr(ioaddr, 9, bcr9);</div><div class='add'>+		}</div><div class='add'>+		if (suspended)</div><div class='add'>+			pcnet32_clr_suspend(lp, ioaddr);</div><div class='add'>+		else if (netif_running(dev))</div><div class='add'>+			pcnet32_restart(dev, CSR0_NORMAL);</div><div class='add'>+		r = 0;</div><div class='ctx'> 	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);</div><div class='ctx'> 	return r;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -711,10 +797,9 @@ static void pcnet32_get_drvinfo(struct net_device *dev,</div><div class='ctx'> {</div><div class='ctx'> 	struct pcnet32_private *lp = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	strlcpy(info-&gt;driver, DRV_NAME, sizeof(info-&gt;driver));</div><div class='del'>-	strlcpy(info-&gt;version, DRV_VERSION, sizeof(info-&gt;version));</div><div class='add'>+	strscpy(info-&gt;driver, DRV_NAME, sizeof(info-&gt;driver));</div><div class='ctx'> 	if (lp-&gt;pci_dev)</div><div class='del'>-		strlcpy(info-&gt;bus_info, pci_name(lp-&gt;pci_dev),</div><div class='add'>+		strscpy(info-&gt;bus_info, pci_name(lp-&gt;pci_dev),</div><div class='ctx'> 			sizeof(info-&gt;bus_info));</div><div class='ctx'> 	else</div><div class='ctx'> 		snprintf(info-&gt;bus_info, sizeof(info-&gt;bus_info),</div><div class='hunk'>@@ -730,7 +815,14 @@ static u32 pcnet32_get_link(struct net_device *dev)</div><div class='ctx'> 	spin_lock_irqsave(&amp;lp-&gt;lock, flags);</div><div class='ctx'> 	if (lp-&gt;mii) {</div><div class='ctx'> 		r = mii_link_ok(&amp;lp-&gt;mii_if);</div><div class='del'>-	} else if (lp-&gt;chip_version &gt;= PCNET32_79C970A) {</div><div class='add'>+	} else if (lp-&gt;chip_version == PCNET32_79C970A) {</div><div class='add'>+		ulong ioaddr = dev-&gt;base_addr;	/* card base I/O address */</div><div class='add'>+		/* only read link if port is set to TP */</div><div class='add'>+		if (!lp-&gt;autoneg &amp;&amp; lp-&gt;port_tp)</div><div class='add'>+			r = (lp-&gt;a-&gt;read_bcr(ioaddr, 4) != 0xc0);</div><div class='add'>+		else /* link always up for AUI port or port auto select */</div><div class='add'>+			r = 1;</div><div class='add'>+	} else if (lp-&gt;chip_version &gt; PCNET32_79C970A) {</div><div class='ctx'> 		ulong ioaddr = dev-&gt;base_addr;	/* card base I/O address */</div><div class='ctx'> 		r = (lp-&gt;a-&gt;read_bcr(ioaddr, 4) != 0xc0);</div><div class='ctx'> 	} else {	/* can not detect link on really old chips */</div><div class='hunk'>@@ -768,7 +860,9 @@ static int pcnet32_nway_reset(struct net_device *dev)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void pcnet32_get_ringparam(struct net_device *dev,</div><div class='del'>-				  struct ethtool_ringparam *ering)</div><div class='add'>+				  struct ethtool_ringparam *ering,</div><div class='add'>+				  struct kernel_ethtool_ringparam *kernel_ering,</div><div class='add'>+				  struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct pcnet32_private *lp = netdev_priv(dev);</div><div class='ctx'> </div><div class='hunk'>@@ -779,7 +873,9 @@ static void pcnet32_get_ringparam(struct net_device *dev,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int pcnet32_set_ringparam(struct net_device *dev,</div><div class='del'>-				 struct ethtool_ringparam *ering)</div><div class='add'>+				 struct ethtool_ringparam *ering,</div><div class='add'>+				 struct kernel_ethtool_ringparam *kernel_ering,</div><div class='add'>+				 struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct pcnet32_private *lp = netdev_priv(dev);</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -793,6 +889,7 @@ static int pcnet32_set_ringparam(struct net_device *dev,</div><div class='ctx'> 	if (netif_running(dev))</div><div class='ctx'> 		pcnet32_netif_stop(dev);</div><div class='ctx'> </div><div class='add'>+	netdev_lock(dev);</div><div class='ctx'> 	spin_lock_irqsave(&amp;lp-&gt;lock, flags);</div><div class='ctx'> 	lp-&gt;a-&gt;write_csr(ioaddr, CSR0, CSR0_STOP);	/* stop the chip */</div><div class='ctx'> </div><div class='hunk'>@@ -824,6 +921,7 @@ static int pcnet32_set_ringparam(struct net_device *dev,</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);</div><div class='add'>+	netdev_unlock(dev);</div><div class='ctx'> </div><div class='ctx'> 	netif_info(lp, drv, dev, "Ring Param Settings: RX: %d, TX: %d\n",</div><div class='ctx'> 		   lp-&gt;rx_ring_size, lp-&gt;tx_ring_size);</div><div class='hunk'>@@ -889,6 +987,7 @@ static int pcnet32_loopback_test(struct net_device *dev, uint64_t * data1)</div><div class='ctx'> 	if (netif_running(dev))</div><div class='ctx'> 		pcnet32_netif_stop(dev);</div><div class='ctx'> </div><div class='add'>+	netdev_lock(dev);</div><div class='ctx'> 	spin_lock_irqsave(&amp;lp-&gt;lock, flags);</div><div class='ctx'> 	lp-&gt;a-&gt;write_csr(ioaddr, CSR0, CSR0_STOP);	/* stop the chip */</div><div class='ctx'> </div><div class='hunk'>@@ -937,9 +1036,9 @@ static int pcnet32_loopback_test(struct net_device *dev, uint64_t * data1)</div><div class='ctx'> 			*packet++ = i;</div><div class='ctx'> </div><div class='ctx'> 		lp-&gt;tx_dma_addr[x] =</div><div class='del'>-			pci_map_single(lp-&gt;pci_dev, skb-&gt;data, skb-&gt;len,</div><div class='del'>-				       PCI_DMA_TODEVICE);</div><div class='del'>-		if (pci_dma_mapping_error(lp-&gt;pci_dev, lp-&gt;tx_dma_addr[x])) {</div><div class='add'>+			dma_map_single(&amp;lp-&gt;pci_dev-&gt;dev, skb-&gt;data, skb-&gt;len,</div><div class='add'>+				       DMA_TO_DEVICE);</div><div class='add'>+		if (dma_mapping_error(&amp;lp-&gt;pci_dev-&gt;dev, lp-&gt;tx_dma_addr[x])) {</div><div class='ctx'> 			netif_printk(lp, hw, KERN_DEBUG, dev,</div><div class='ctx'> 				     "DMA mapping error at line: %d!\n",</div><div class='ctx'> 				     __LINE__);</div><div class='hunk'>@@ -1026,6 +1125,7 @@ clean_up:</div><div class='ctx'> 		lp-&gt;a-&gt;write_bcr(ioaddr, 20, 4);	/* return to 16bit mode */</div><div class='ctx'> 	}</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);</div><div class='add'>+	netdev_unlock(dev);</div><div class='ctx'> </div><div class='ctx'> 	return rc;</div><div class='ctx'> }				/* end pcnet32_loopback_test  */</div><div class='hunk'>@@ -1068,45 +1168,6 @@ static int pcnet32_set_phys_id(struct net_device *dev,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='del'>- * lp-&gt;lock must be held.</div><div class='del'>- */</div><div class='del'>-static int pcnet32_suspend(struct net_device *dev, unsigned long *flags,</div><div class='del'>-		int can_sleep)</div><div class='del'>-{</div><div class='del'>-	int csr5;</div><div class='del'>-	struct pcnet32_private *lp = netdev_priv(dev);</div><div class='del'>-	const struct pcnet32_access *a = lp-&gt;a;</div><div class='del'>-	ulong ioaddr = dev-&gt;base_addr;</div><div class='del'>-	int ticks;</div><div class='del'>-</div><div class='del'>-	/* really old chips have to be stopped. */</div><div class='del'>-	if (lp-&gt;chip_version &lt; PCNET32_79C970A)</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	/* set SUSPEND (SPND) - CSR5 bit 0 */</div><div class='del'>-	csr5 = a-&gt;read_csr(ioaddr, CSR5);</div><div class='del'>-	a-&gt;write_csr(ioaddr, CSR5, csr5 | CSR5_SUSPEND);</div><div class='del'>-</div><div class='del'>-	/* poll waiting for bit to be set */</div><div class='del'>-	ticks = 0;</div><div class='del'>-	while (!(a-&gt;read_csr(ioaddr, CSR5) &amp; CSR5_SUSPEND)) {</div><div class='del'>-		spin_unlock_irqrestore(&amp;lp-&gt;lock, *flags);</div><div class='del'>-		if (can_sleep)</div><div class='del'>-			msleep(1);</div><div class='del'>-		else</div><div class='del'>-			mdelay(1);</div><div class='del'>-		spin_lock_irqsave(&amp;lp-&gt;lock, *flags);</div><div class='del'>-		ticks++;</div><div class='del'>-		if (ticks &gt; 200) {</div><div class='del'>-			netif_printk(lp, hw, KERN_DEBUG, dev,</div><div class='del'>-				     "Error getting into suspend!\n");</div><div class='del'>-			return 0;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	return 1;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-/*</div><div class='ctx'>  * process one receive descriptor entry</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='hunk'>@@ -1166,21 +1227,21 @@ static void pcnet32_rx_entry(struct net_device *dev,</div><div class='ctx'> 		 */</div><div class='ctx'> 		if (newskb) {</div><div class='ctx'> 			skb_reserve(newskb, NET_IP_ALIGN);</div><div class='del'>-			new_dma_addr = pci_map_single(lp-&gt;pci_dev,</div><div class='add'>+			new_dma_addr = dma_map_single(&amp;lp-&gt;pci_dev-&gt;dev,</div><div class='ctx'> 						      newskb-&gt;data,</div><div class='ctx'> 						      PKT_BUF_SIZE,</div><div class='del'>-						      PCI_DMA_FROMDEVICE);</div><div class='del'>-			if (pci_dma_mapping_error(lp-&gt;pci_dev, new_dma_addr)) {</div><div class='add'>+						      DMA_FROM_DEVICE);</div><div class='add'>+			if (dma_mapping_error(&amp;lp-&gt;pci_dev-&gt;dev, new_dma_addr)) {</div><div class='ctx'> 				netif_err(lp, rx_err, dev,</div><div class='ctx'> 					  "DMA mapping error.\n");</div><div class='ctx'> 				dev_kfree_skb(newskb);</div><div class='ctx'> 				skb = NULL;</div><div class='ctx'> 			} else {</div><div class='ctx'> 				skb = lp-&gt;rx_skbuff[entry];</div><div class='del'>-				pci_unmap_single(lp-&gt;pci_dev,</div><div class='add'>+				dma_unmap_single(&amp;lp-&gt;pci_dev-&gt;dev,</div><div class='ctx'> 						 lp-&gt;rx_dma_addr[entry],</div><div class='ctx'> 						 PKT_BUF_SIZE,</div><div class='del'>-						 PCI_DMA_FROMDEVICE);</div><div class='add'>+						 DMA_FROM_DEVICE);</div><div class='ctx'> 				skb_put(skb, pkt_len);</div><div class='ctx'> 				lp-&gt;rx_skbuff[entry] = newskb;</div><div class='ctx'> 				lp-&gt;rx_dma_addr[entry] = new_dma_addr;</div><div class='hunk'>@@ -1192,24 +1253,22 @@ static void pcnet32_rx_entry(struct net_device *dev,</div><div class='ctx'> 	} else</div><div class='ctx'> 		skb = netdev_alloc_skb(dev, pkt_len + NET_IP_ALIGN);</div><div class='ctx'> </div><div class='del'>-	if (skb == NULL) {</div><div class='add'>+	if (!skb) {</div><div class='ctx'> 		dev-&gt;stats.rx_dropped++;</div><div class='ctx'> 		return;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (!rx_in_place) {</div><div class='ctx'> 		skb_reserve(skb, NET_IP_ALIGN);</div><div class='ctx'> 		skb_put(skb, pkt_len);	/* Make room */</div><div class='del'>-		pci_dma_sync_single_for_cpu(lp-&gt;pci_dev,</div><div class='del'>-					    lp-&gt;rx_dma_addr[entry],</div><div class='del'>-					    pkt_len,</div><div class='del'>-					    PCI_DMA_FROMDEVICE);</div><div class='add'>+		dma_sync_single_for_cpu(&amp;lp-&gt;pci_dev-&gt;dev,</div><div class='add'>+					lp-&gt;rx_dma_addr[entry], pkt_len,</div><div class='add'>+					DMA_FROM_DEVICE);</div><div class='ctx'> 		skb_copy_to_linear_data(skb,</div><div class='ctx'> 				 (unsigned char *)(lp-&gt;rx_skbuff[entry]-&gt;data),</div><div class='ctx'> 				 pkt_len);</div><div class='del'>-		pci_dma_sync_single_for_device(lp-&gt;pci_dev,</div><div class='del'>-					       lp-&gt;rx_dma_addr[entry],</div><div class='del'>-					       pkt_len,</div><div class='del'>-					       PCI_DMA_FROMDEVICE);</div><div class='add'>+		dma_sync_single_for_device(&amp;lp-&gt;pci_dev-&gt;dev,</div><div class='add'>+					   lp-&gt;rx_dma_addr[entry], pkt_len,</div><div class='add'>+					   DMA_FROM_DEVICE);</div><div class='ctx'> 	}</div><div class='ctx'> 	dev-&gt;stats.rx_bytes += skb-&gt;len;</div><div class='ctx'> 	skb-&gt;protocol = eth_type_trans(skb, dev);</div><div class='hunk'>@@ -1298,10 +1357,10 @@ static int pcnet32_tx(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 		/* We must free the original skb */</div><div class='ctx'> 		if (lp-&gt;tx_skbuff[entry]) {</div><div class='del'>-			pci_unmap_single(lp-&gt;pci_dev,</div><div class='add'>+			dma_unmap_single(&amp;lp-&gt;pci_dev-&gt;dev,</div><div class='ctx'> 					 lp-&gt;tx_dma_addr[entry],</div><div class='del'>-					 lp-&gt;tx_skbuff[entry]-&gt;</div><div class='del'>-					 len, PCI_DMA_TODEVICE);</div><div class='add'>+					 lp-&gt;tx_skbuff[entry]-&gt;len,</div><div class='add'>+					 DMA_TO_DEVICE);</div><div class='ctx'> 			dev_kfree_skb_any(lp-&gt;tx_skbuff[entry]);</div><div class='ctx'> 			lp-&gt;tx_skbuff[entry] = NULL;</div><div class='ctx'> 			lp-&gt;tx_dma_addr[entry] = 0;</div><div class='hunk'>@@ -1348,13 +1407,8 @@ static int pcnet32_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 		pcnet32_restart(dev, CSR0_START);</div><div class='ctx'> 		netif_wake_queue(dev);</div><div class='ctx'> 	}</div><div class='del'>-	spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);</div><div class='del'>-</div><div class='del'>-	if (work_done &lt; budget) {</div><div class='del'>-		spin_lock_irqsave(&amp;lp-&gt;lock, flags);</div><div class='del'>-</div><div class='del'>-		__napi_complete(napi);</div><div class='ctx'> </div><div class='add'>+	if (work_done &lt; budget &amp;&amp; napi_complete_done(napi, work_done)) {</div><div class='ctx'> 		/* clear interrupt masks */</div><div class='ctx'> 		val = lp-&gt;a-&gt;read_csr(ioaddr, CSR3);</div><div class='ctx'> 		val &amp;= 0x00ff;</div><div class='hunk'>@@ -1362,9 +1416,9 @@ static int pcnet32_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> </div><div class='ctx'> 		/* Set interrupt enable. */</div><div class='ctx'> 		lp-&gt;a-&gt;write_csr(ioaddr, CSR0, CSR0_INTEN);</div><div class='del'>-</div><div class='del'>-		spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);</div><div class='ctx'> 	return work_done;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1428,20 +1482,13 @@ static void pcnet32_get_regs(struct net_device *dev, struct ethtool_regs *regs,</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!(csr0 &amp; CSR0_STOP)) {	/* If not stopped */</div><div class='del'>-		int csr5;</div><div class='del'>-</div><div class='del'>-		/* clear SUSPEND (SPND) - CSR5 bit 0 */</div><div class='del'>-		csr5 = a-&gt;read_csr(ioaddr, CSR5);</div><div class='del'>-		a-&gt;write_csr(ioaddr, CSR5, csr5 &amp; (~CSR5_SUSPEND));</div><div class='del'>-	}</div><div class='add'>+	if (!(csr0 &amp; CSR0_STOP))	/* If not stopped */</div><div class='add'>+		pcnet32_clr_suspend(lp, ioaddr);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops pcnet32_ethtool_ops = {</div><div class='del'>-	.get_settings		= pcnet32_get_settings,</div><div class='del'>-	.set_settings		= pcnet32_set_settings,</div><div class='ctx'> 	.get_drvinfo		= pcnet32_get_drvinfo,</div><div class='ctx'> 	.get_msglevel		= pcnet32_get_msglevel,</div><div class='ctx'> 	.set_msglevel		= pcnet32_set_msglevel,</div><div class='hunk'>@@ -1455,6 +1502,8 @@ static const struct ethtool_ops pcnet32_ethtool_ops = {</div><div class='ctx'> 	.get_regs_len		= pcnet32_get_regs_len,</div><div class='ctx'> 	.get_regs		= pcnet32_get_regs,</div><div class='ctx'> 	.get_sset_count		= pcnet32_get_sset_count,</div><div class='add'>+	.get_link_ksettings	= pcnet32_get_link_ksettings,</div><div class='add'>+	.set_link_ksettings	= pcnet32_set_link_ksettings,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* only probes for non-PCI devices, the rest are handled by</div><div class='hunk'>@@ -1493,25 +1542,31 @@ pcnet32_probe_pci(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='ctx'> 	}</div><div class='ctx'> 	pci_set_master(pdev);</div><div class='ctx'> </div><div class='del'>-	ioaddr = pci_resource_start(pdev, 0);</div><div class='del'>-	if (!ioaddr) {</div><div class='add'>+	if (!pci_resource_len(pdev, 0)) {</div><div class='ctx'> 		if (pcnet32_debug &amp; NETIF_MSG_PROBE)</div><div class='ctx'> 			pr_err("card has no PCI IO resources, aborting\n");</div><div class='del'>-		return -ENODEV;</div><div class='add'>+		err = -ENODEV;</div><div class='add'>+		goto err_disable_dev;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (!pci_dma_supported(pdev, PCNET32_DMA_MASK)) {</div><div class='add'>+	err = dma_set_mask(&amp;pdev-&gt;dev, PCNET32_DMA_MASK);</div><div class='add'>+	if (err) {</div><div class='ctx'> 		if (pcnet32_debug &amp; NETIF_MSG_PROBE)</div><div class='ctx'> 			pr_err("architecture does not support 32bit PCI busmaster DMA\n");</div><div class='del'>-		return -ENODEV;</div><div class='add'>+		goto err_disable_dev;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	ioaddr = pci_resource_start(pdev, 0);</div><div class='ctx'> 	if (!request_region(ioaddr, PCNET32_TOTAL_SIZE, "pcnet32_probe_pci")) {</div><div class='ctx'> 		if (pcnet32_debug &amp; NETIF_MSG_PROBE)</div><div class='ctx'> 			pr_err("io address range already allocated\n");</div><div class='del'>-		return -EBUSY;</div><div class='add'>+		err = -EBUSY;</div><div class='add'>+		goto err_disable_dev;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	err = pcnet32_probe1(ioaddr, 1, pdev);</div><div class='add'>+</div><div class='add'>+err_disable_dev:</div><div class='ctx'> 	if (err &lt; 0)</div><div class='ctx'> 		pci_disable_device(pdev);</div><div class='ctx'> </div><div class='hunk'>@@ -1525,8 +1580,7 @@ static const struct net_device_ops pcnet32_netdev_ops = {</div><div class='ctx'> 	.ndo_tx_timeout		= pcnet32_tx_timeout,</div><div class='ctx'> 	.ndo_get_stats		= pcnet32_get_stats,</div><div class='ctx'> 	.ndo_set_rx_mode	= pcnet32_set_multicast_list,</div><div class='del'>-	.ndo_do_ioctl		= pcnet32_ioctl,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='add'>+	.ndo_eth_ioctl		= pcnet32_ioctl,</div><div class='ctx'> 	.ndo_set_mac_address 	= eth_mac_addr,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> #ifdef CONFIG_NET_POLL_CONTROLLER</div><div class='hunk'>@@ -1549,6 +1603,7 @@ pcnet32_probe1(unsigned long ioaddr, int shared, struct pci_dev *pdev)</div><div class='ctx'> 	struct net_device *dev;</div><div class='ctx'> 	const struct pcnet32_access *a = NULL;</div><div class='ctx'> 	u8 promaddr[ETH_ALEN];</div><div class='add'>+	u8 addr[ETH_ALEN];</div><div class='ctx'> 	int ret = -ENODEV;</div><div class='ctx'> </div><div class='ctx'> 	/* reset the chip */</div><div class='hunk'>@@ -1714,9 +1769,10 @@ pcnet32_probe1(unsigned long ioaddr, int shared, struct pci_dev *pdev)</div><div class='ctx'> 		unsigned int val;</div><div class='ctx'> 		val = a-&gt;read_csr(ioaddr, i + 12) &amp; 0x0ffff;</div><div class='ctx'> 		/* There may be endianness issues here. */</div><div class='del'>-		dev-&gt;dev_addr[2 * i] = val &amp; 0x0ff;</div><div class='del'>-		dev-&gt;dev_addr[2 * i + 1] = (val &gt;&gt; 8) &amp; 0x0ff;</div><div class='add'>+		addr[2 * i] = val &amp; 0x0ff;</div><div class='add'>+		addr[2 * i + 1] = (val &gt;&gt; 8) &amp; 0x0ff;</div><div class='ctx'> 	}</div><div class='add'>+	eth_hw_addr_set(dev, addr);</div><div class='ctx'> </div><div class='ctx'> 	/* read PROM address and compare with CSR address */</div><div class='ctx'> 	for (i = 0; i &lt; ETH_ALEN; i++)</div><div class='hunk'>@@ -1729,13 +1785,16 @@ pcnet32_probe1(unsigned long ioaddr, int shared, struct pci_dev *pdev)</div><div class='ctx'> 				pr_cont(" warning: CSR address invalid,\n");</div><div class='ctx'> 				pr_info("    using instead PROM address of");</div><div class='ctx'> 			}</div><div class='del'>-			memcpy(dev-&gt;dev_addr, promaddr, ETH_ALEN);</div><div class='add'>+			eth_hw_addr_set(dev, promaddr);</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* if the ethernet address is not valid, force to 00:00:00:00:00:00 */</div><div class='del'>-	if (!is_valid_ether_addr(dev-&gt;dev_addr))</div><div class='del'>-		eth_zero_addr(dev-&gt;dev_addr);</div><div class='add'>+	if (!is_valid_ether_addr(dev-&gt;dev_addr)) {</div><div class='add'>+		static const u8 zero_addr[ETH_ALEN] = {};</div><div class='add'>+</div><div class='add'>+		eth_hw_addr_set(dev, zero_addr);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (pcnet32_debug &amp; NETIF_MSG_PROBE) {</div><div class='ctx'> 		pr_cont(" %pM", dev-&gt;dev_addr);</div><div class='hunk'>@@ -1780,12 +1839,13 @@ pcnet32_probe1(unsigned long ioaddr, int shared, struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> 	dev-&gt;base_addr = ioaddr;</div><div class='ctx'> 	lp = netdev_priv(dev);</div><div class='del'>-	/* pci_alloc_consistent returns page-aligned memory, so we do not have to check the alignment */</div><div class='del'>-	lp-&gt;init_block = pci_alloc_consistent(pdev, sizeof(*lp-&gt;init_block),</div><div class='del'>-					      &amp;lp-&gt;init_dma_addr);</div><div class='add'>+	/* dma_alloc_coherent returns page-aligned memory, so we do not have to check the alignment */</div><div class='add'>+	lp-&gt;init_block = dma_alloc_coherent(&amp;pdev-&gt;dev,</div><div class='add'>+					    sizeof(*lp-&gt;init_block),</div><div class='add'>+					    &amp;lp-&gt;init_dma_addr, GFP_KERNEL);</div><div class='ctx'> 	if (!lp-&gt;init_block) {</div><div class='ctx'> 		if (pcnet32_debug &amp; NETIF_MSG_PROBE)</div><div class='del'>-			pr_err("Consistent memory allocation failed\n");</div><div class='add'>+			pr_err("Coherent memory allocation failed\n");</div><div class='ctx'> 		ret = -ENOMEM;</div><div class='ctx'> 		goto err_free_netdev;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1815,6 +1875,9 @@ pcnet32_probe1(unsigned long ioaddr, int shared, struct pci_dev *pdev)</div><div class='ctx'> 		lp-&gt;options = PCNET32_PORT_ASEL;</div><div class='ctx'> 	else</div><div class='ctx'> 		lp-&gt;options = options_mapping[options[cards_found]];</div><div class='add'>+	/* force default port to TP on 79C970A so link detection can work */</div><div class='add'>+	if (lp-&gt;chip_version == PCNET32_79C970A)</div><div class='add'>+		lp-&gt;options = PCNET32_PORT_10BT;</div><div class='ctx'> 	lp-&gt;mii_if.dev = dev;</div><div class='ctx'> 	lp-&gt;mii_if.mdio_read = mdio_read;</div><div class='ctx'> 	lp-&gt;mii_if.mdio_write = mdio_write;</div><div class='hunk'>@@ -1822,7 +1885,8 @@ pcnet32_probe1(unsigned long ioaddr, int shared, struct pci_dev *pdev)</div><div class='ctx'> 	/* napi.weight is used in both the napi and non-napi cases */</div><div class='ctx'> 	lp-&gt;napi.weight = lp-&gt;rx_ring_size / 2;</div><div class='ctx'> </div><div class='del'>-	netif_napi_add(dev, &amp;lp-&gt;napi, pcnet32_poll, lp-&gt;rx_ring_size / 2);</div><div class='add'>+	netif_napi_add_weight(dev, &amp;lp-&gt;napi, pcnet32_poll,</div><div class='add'>+			      lp-&gt;rx_ring_size / 2);</div><div class='ctx'> </div><div class='ctx'> 	if (fdx &amp;&amp; !(lp-&gt;options &amp; PCNET32_PORT_ASEL) &amp;&amp;</div><div class='ctx'> 	    ((cards_found &gt;= MAX_UNITS) || full_duplex[cards_found]))</div><div class='hunk'>@@ -1912,9 +1976,7 @@ pcnet32_probe1(unsigned long ioaddr, int shared, struct pci_dev *pdev)</div><div class='ctx'> 			lp-&gt;options |= PCNET32_PORT_MII;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	init_timer(&amp;lp-&gt;watchdog_timer);</div><div class='del'>-	lp-&gt;watchdog_timer.data = (unsigned long)dev;</div><div class='del'>-	lp-&gt;watchdog_timer.function = (void *)&amp;pcnet32_watchdog;</div><div class='add'>+	timer_setup(&amp;lp-&gt;watchdog_timer, pcnet32_watchdog, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* The PCNET32-specific entries in the device structure. */</div><div class='ctx'> 	dev-&gt;netdev_ops = &amp;pcnet32_netdev_ops;</div><div class='hunk'>@@ -1943,8 +2005,8 @@ pcnet32_probe1(unsigned long ioaddr, int shared, struct pci_dev *pdev)</div><div class='ctx'> </div><div class='ctx'> err_free_ring:</div><div class='ctx'> 	pcnet32_free_ring(dev);</div><div class='del'>-	pci_free_consistent(lp-&gt;pci_dev, sizeof(*lp-&gt;init_block),</div><div class='del'>-			    lp-&gt;init_block, lp-&gt;init_dma_addr);</div><div class='add'>+	dma_free_coherent(&amp;lp-&gt;pci_dev-&gt;dev, sizeof(*lp-&gt;init_block),</div><div class='add'>+			  lp-&gt;init_block, lp-&gt;init_dma_addr);</div><div class='ctx'> err_free_netdev:</div><div class='ctx'> 	free_netdev(dev);</div><div class='ctx'> err_release_region:</div><div class='hunk'>@@ -1957,41 +2019,39 @@ static int pcnet32_alloc_ring(struct net_device *dev, const char *name)</div><div class='ctx'> {</div><div class='ctx'> 	struct pcnet32_private *lp = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	lp-&gt;tx_ring = pci_alloc_consistent(lp-&gt;pci_dev,</div><div class='del'>-					   sizeof(struct pcnet32_tx_head) *</div><div class='del'>-					   lp-&gt;tx_ring_size,</div><div class='del'>-					   &amp;lp-&gt;tx_ring_dma_addr);</div><div class='del'>-	if (lp-&gt;tx_ring == NULL) {</div><div class='del'>-		netif_err(lp, drv, dev, "Consistent memory allocation failed\n");</div><div class='add'>+	lp-&gt;tx_ring = dma_alloc_coherent(&amp;lp-&gt;pci_dev-&gt;dev,</div><div class='add'>+					 sizeof(struct pcnet32_tx_head) * lp-&gt;tx_ring_size,</div><div class='add'>+					 &amp;lp-&gt;tx_ring_dma_addr, GFP_KERNEL);</div><div class='add'>+	if (!lp-&gt;tx_ring) {</div><div class='add'>+		netif_err(lp, drv, dev, "Coherent memory allocation failed\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	lp-&gt;rx_ring = pci_alloc_consistent(lp-&gt;pci_dev,</div><div class='del'>-					   sizeof(struct pcnet32_rx_head) *</div><div class='del'>-					   lp-&gt;rx_ring_size,</div><div class='del'>-					   &amp;lp-&gt;rx_ring_dma_addr);</div><div class='del'>-	if (lp-&gt;rx_ring == NULL) {</div><div class='del'>-		netif_err(lp, drv, dev, "Consistent memory allocation failed\n");</div><div class='add'>+	lp-&gt;rx_ring = dma_alloc_coherent(&amp;lp-&gt;pci_dev-&gt;dev,</div><div class='add'>+					 sizeof(struct pcnet32_rx_head) * lp-&gt;rx_ring_size,</div><div class='add'>+					 &amp;lp-&gt;rx_ring_dma_addr, GFP_KERNEL);</div><div class='add'>+	if (!lp-&gt;rx_ring) {</div><div class='add'>+		netif_err(lp, drv, dev, "Coherent memory allocation failed\n");</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	lp-&gt;tx_dma_addr = kcalloc(lp-&gt;tx_ring_size, sizeof(dma_addr_t),</div><div class='del'>-				  GFP_ATOMIC);</div><div class='add'>+				  GFP_KERNEL);</div><div class='ctx'> 	if (!lp-&gt;tx_dma_addr)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	lp-&gt;rx_dma_addr = kcalloc(lp-&gt;rx_ring_size, sizeof(dma_addr_t),</div><div class='del'>-				  GFP_ATOMIC);</div><div class='add'>+				  GFP_KERNEL);</div><div class='ctx'> 	if (!lp-&gt;rx_dma_addr)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	lp-&gt;tx_skbuff = kcalloc(lp-&gt;tx_ring_size, sizeof(struct sk_buff *),</div><div class='del'>-				GFP_ATOMIC);</div><div class='add'>+				GFP_KERNEL);</div><div class='ctx'> 	if (!lp-&gt;tx_skbuff)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	lp-&gt;rx_skbuff = kcalloc(lp-&gt;rx_ring_size, sizeof(struct sk_buff *),</div><div class='del'>-				GFP_ATOMIC);</div><div class='add'>+				GFP_KERNEL);</div><div class='ctx'> 	if (!lp-&gt;rx_skbuff)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -2015,18 +2075,16 @@ static void pcnet32_free_ring(struct net_device *dev)</div><div class='ctx'> 	lp-&gt;rx_dma_addr = NULL;</div><div class='ctx'> </div><div class='ctx'> 	if (lp-&gt;tx_ring) {</div><div class='del'>-		pci_free_consistent(lp-&gt;pci_dev,</div><div class='del'>-				    sizeof(struct pcnet32_tx_head) *</div><div class='del'>-				    lp-&gt;tx_ring_size, lp-&gt;tx_ring,</div><div class='del'>-				    lp-&gt;tx_ring_dma_addr);</div><div class='add'>+		dma_free_coherent(&amp;lp-&gt;pci_dev-&gt;dev,</div><div class='add'>+				  sizeof(struct pcnet32_tx_head) * lp-&gt;tx_ring_size,</div><div class='add'>+				  lp-&gt;tx_ring, lp-&gt;tx_ring_dma_addr);</div><div class='ctx'> 		lp-&gt;tx_ring = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (lp-&gt;rx_ring) {</div><div class='del'>-		pci_free_consistent(lp-&gt;pci_dev,</div><div class='del'>-				    sizeof(struct pcnet32_rx_head) *</div><div class='del'>-				    lp-&gt;rx_ring_size, lp-&gt;rx_ring,</div><div class='del'>-				    lp-&gt;rx_ring_dma_addr);</div><div class='add'>+		dma_free_coherent(&amp;lp-&gt;pci_dev-&gt;dev,</div><div class='add'>+				  sizeof(struct pcnet32_rx_head) * lp-&gt;rx_ring_size,</div><div class='add'>+				  lp-&gt;rx_ring, lp-&gt;rx_ring_dma_addr);</div><div class='ctx'> 		lp-&gt;rx_ring = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -2047,6 +2105,7 @@ static int pcnet32_open(struct net_device *dev)</div><div class='ctx'> 		return -EAGAIN;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	netdev_lock(dev);</div><div class='ctx'> 	spin_lock_irqsave(&amp;lp-&gt;lock, flags);</div><div class='ctx'> 	/* Check for a valid station address */</div><div class='ctx'> 	if (!is_valid_ether_addr(dev-&gt;dev_addr)) {</div><div class='hunk'>@@ -2066,6 +2125,10 @@ static int pcnet32_open(struct net_device *dev)</div><div class='ctx'> 		     (u32) (lp-&gt;rx_ring_dma_addr),</div><div class='ctx'> 		     (u32) (lp-&gt;init_dma_addr));</div><div class='ctx'> </div><div class='add'>+	lp-&gt;autoneg = !!(lp-&gt;options &amp; PCNET32_PORT_ASEL);</div><div class='add'>+	lp-&gt;port_tp = !!(lp-&gt;options &amp; PCNET32_PORT_10BT);</div><div class='add'>+	lp-&gt;fdx = !!(lp-&gt;options &amp; PCNET32_PORT_FD);</div><div class='add'>+</div><div class='ctx'> 	/* set/reset autoselect bit */</div><div class='ctx'> 	val = lp-&gt;a-&gt;read_bcr(ioaddr, 2) &amp; ~2;</div><div class='ctx'> 	if (lp-&gt;options &amp; PCNET32_PORT_ASEL)</div><div class='hunk'>@@ -2208,7 +2271,7 @@ static int pcnet32_open(struct net_device *dev)</div><div class='ctx'> 		goto err_free_ring;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	napi_enable(&amp;lp-&gt;napi);</div><div class='add'>+	napi_enable_locked(&amp;lp-&gt;napi);</div><div class='ctx'> </div><div class='ctx'> 	/* Re-initialize the PCNET32, and start it when done. */</div><div class='ctx'> 	lp-&gt;a-&gt;write_csr(ioaddr, 1, (lp-&gt;init_dma_addr &amp; 0xffff));</div><div class='hunk'>@@ -2242,6 +2305,7 @@ static int pcnet32_open(struct net_device *dev)</div><div class='ctx'> 		     lp-&gt;a-&gt;read_csr(ioaddr, CSR0));</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);</div><div class='add'>+	netdev_unlock(dev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;		/* Always succeed */</div><div class='ctx'> </div><div class='hunk'>@@ -2257,6 +2321,7 @@ err_free_ring:</div><div class='ctx'> </div><div class='ctx'> err_free_irq:</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);</div><div class='add'>+	netdev_unlock(dev);</div><div class='ctx'> 	free_irq(dev-&gt;irq, dev);</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='hunk'>@@ -2283,12 +2348,11 @@ static void pcnet32_purge_tx_ring(struct net_device *dev)</div><div class='ctx'> 		lp-&gt;tx_ring[i].status = 0;	/* CPU owns buffer */</div><div class='ctx'> 		wmb();		/* Make sure adapter sees owner change */</div><div class='ctx'> 		if (lp-&gt;tx_skbuff[i]) {</div><div class='del'>-			if (!pci_dma_mapping_error(lp-&gt;pci_dev,</div><div class='del'>-						   lp-&gt;tx_dma_addr[i]))</div><div class='del'>-				pci_unmap_single(lp-&gt;pci_dev,</div><div class='add'>+			if (!dma_mapping_error(&amp;lp-&gt;pci_dev-&gt;dev, lp-&gt;tx_dma_addr[i]))</div><div class='add'>+				dma_unmap_single(&amp;lp-&gt;pci_dev-&gt;dev,</div><div class='ctx'> 						 lp-&gt;tx_dma_addr[i],</div><div class='ctx'> 						 lp-&gt;tx_skbuff[i]-&gt;len,</div><div class='del'>-						 PCI_DMA_TODEVICE);</div><div class='add'>+						 DMA_TO_DEVICE);</div><div class='ctx'> 			dev_kfree_skb_any(lp-&gt;tx_skbuff[i]);</div><div class='ctx'> 		}</div><div class='ctx'> 		lp-&gt;tx_skbuff[i] = NULL;</div><div class='hunk'>@@ -2308,7 +2372,7 @@ static int pcnet32_init_ring(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; lp-&gt;rx_ring_size; i++) {</div><div class='ctx'> 		struct sk_buff *rx_skbuff = lp-&gt;rx_skbuff[i];</div><div class='del'>-		if (rx_skbuff == NULL) {</div><div class='add'>+		if (!rx_skbuff) {</div><div class='ctx'> 			lp-&gt;rx_skbuff[i] = netdev_alloc_skb(dev, PKT_BUF_SKB);</div><div class='ctx'> 			rx_skbuff = lp-&gt;rx_skbuff[i];</div><div class='ctx'> 			if (!rx_skbuff) {</div><div class='hunk'>@@ -2323,10 +2387,9 @@ static int pcnet32_init_ring(struct net_device *dev)</div><div class='ctx'> 		rmb();</div><div class='ctx'> 		if (lp-&gt;rx_dma_addr[i] == 0) {</div><div class='ctx'> 			lp-&gt;rx_dma_addr[i] =</div><div class='del'>-			    pci_map_single(lp-&gt;pci_dev, rx_skbuff-&gt;data,</div><div class='del'>-					   PKT_BUF_SIZE, PCI_DMA_FROMDEVICE);</div><div class='del'>-			if (pci_dma_mapping_error(lp-&gt;pci_dev,</div><div class='del'>-						  lp-&gt;rx_dma_addr[i])) {</div><div class='add'>+			    dma_map_single(&amp;lp-&gt;pci_dev-&gt;dev, rx_skbuff-&gt;data,</div><div class='add'>+					   PKT_BUF_SIZE, DMA_FROM_DEVICE);</div><div class='add'>+			if (dma_mapping_error(&amp;lp-&gt;pci_dev-&gt;dev, lp-&gt;rx_dma_addr[i])) {</div><div class='ctx'> 				/* there is not much we can do at this point */</div><div class='ctx'> 				netif_err(lp, drv, dev,</div><div class='ctx'> 					  "%s pci dma mapping error\n",</div><div class='hunk'>@@ -2391,7 +2454,7 @@ static void pcnet32_restart(struct net_device *dev, unsigned int csr0_bits)</div><div class='ctx'> 	lp-&gt;a-&gt;write_csr(ioaddr, CSR0, csr0_bits);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void pcnet32_tx_timeout(struct net_device *dev)</div><div class='add'>+static void pcnet32_tx_timeout(struct net_device *dev, unsigned int txqueue)</div><div class='ctx'> {</div><div class='ctx'> 	struct pcnet32_private *lp = netdev_priv(dev);</div><div class='ctx'> 	unsigned long ioaddr = dev-&gt;base_addr, flags;</div><div class='hunk'>@@ -2425,7 +2488,7 @@ static void pcnet32_tx_timeout(struct net_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> 	pcnet32_restart(dev, CSR0_NORMAL);</div><div class='ctx'> </div><div class='del'>-	dev-&gt;trans_start = jiffies; /* prevent tx timeout */</div><div class='add'>+	netif_trans_update(dev); /* prevent tx timeout */</div><div class='ctx'> 	netif_wake_queue(dev);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;lp-&gt;lock, flags);</div><div class='hunk'>@@ -2464,8 +2527,9 @@ static netdev_tx_t pcnet32_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 	lp-&gt;tx_ring[entry].misc = 0x00000000;</div><div class='ctx'> </div><div class='ctx'> 	lp-&gt;tx_dma_addr[entry] =</div><div class='del'>-	    pci_map_single(lp-&gt;pci_dev, skb-&gt;data, skb-&gt;len, PCI_DMA_TODEVICE);</div><div class='del'>-	if (pci_dma_mapping_error(lp-&gt;pci_dev, lp-&gt;tx_dma_addr[entry])) {</div><div class='add'>+	    dma_map_single(&amp;lp-&gt;pci_dev-&gt;dev, skb-&gt;data, skb-&gt;len,</div><div class='add'>+			   DMA_TO_DEVICE);</div><div class='add'>+	if (dma_mapping_error(&amp;lp-&gt;pci_dev-&gt;dev, lp-&gt;tx_dma_addr[entry])) {</div><div class='ctx'> 		dev_kfree_skb_any(skb);</div><div class='ctx'> 		dev-&gt;stats.tx_dropped++;</div><div class='ctx'> 		goto drop_packet;</div><div class='hunk'>@@ -2566,7 +2630,7 @@ static int pcnet32_close(struct net_device *dev)</div><div class='ctx'> 	struct pcnet32_private *lp = netdev_priv(dev);</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;lp-&gt;watchdog_timer);</div><div class='add'>+	timer_delete_sync(&amp;lp-&gt;watchdog_timer);</div><div class='ctx'> </div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='ctx'> 	napi_disable(&amp;lp-&gt;napi);</div><div class='hunk'>@@ -2678,10 +2742,7 @@ static void pcnet32_set_multicast_list(struct net_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (suspended) {</div><div class='del'>-		int csr5;</div><div class='del'>-		/* clear SUSPEND (SPND) - CSR5 bit 0 */</div><div class='del'>-		csr5 = lp-&gt;a-&gt;read_csr(ioaddr, CSR5);</div><div class='del'>-		lp-&gt;a-&gt;write_csr(ioaddr, CSR5, csr5 &amp; (~CSR5_SUSPEND));</div><div class='add'>+		pcnet32_clr_suspend(lp, ioaddr);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		lp-&gt;a-&gt;write_csr(ioaddr, CSR0, CSR0_STOP);</div><div class='ctx'> 		pcnet32_restart(dev, CSR0_NORMAL);</div><div class='hunk'>@@ -2792,6 +2853,13 @@ static void pcnet32_check_media(struct net_device *dev, int verbose)</div><div class='ctx'> </div><div class='ctx'> 	if (lp-&gt;mii) {</div><div class='ctx'> 		curr_link = mii_link_ok(&amp;lp-&gt;mii_if);</div><div class='add'>+	} else if (lp-&gt;chip_version == PCNET32_79C970A) {</div><div class='add'>+		ulong ioaddr = dev-&gt;base_addr;	/* card base I/O address */</div><div class='add'>+		/* only read link if port is set to TP */</div><div class='add'>+		if (!lp-&gt;autoneg &amp;&amp; lp-&gt;port_tp)</div><div class='add'>+			curr_link = (lp-&gt;a-&gt;read_bcr(ioaddr, 4) != 0xc0);</div><div class='add'>+		else /* link always up for AUI port or port auto select */</div><div class='add'>+			curr_link = 1;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		ulong ioaddr = dev-&gt;base_addr;	/* card base I/O address */</div><div class='ctx'> 		curr_link = (lp-&gt;a-&gt;read_bcr(ioaddr, 4) != 0xc0);</div><div class='hunk'>@@ -2802,8 +2870,7 @@ static void pcnet32_check_media(struct net_device *dev, int verbose)</div><div class='ctx'> 			netif_info(lp, link, dev, "link down\n");</div><div class='ctx'> 		}</div><div class='ctx'> 		if (lp-&gt;phycount &gt; 1) {</div><div class='del'>-			curr_link = pcnet32_check_otherphy(dev);</div><div class='del'>-			prev_link = 0;</div><div class='add'>+			pcnet32_check_otherphy(dev);</div><div class='ctx'> 		}</div><div class='ctx'> 	} else if (verbose || !prev_link) {</div><div class='ctx'> 		netif_carrier_on(dev);</div><div class='hunk'>@@ -2836,9 +2903,10 @@ static void pcnet32_check_media(struct net_device *dev, int verbose)</div><div class='ctx'>  * Could possibly be changed to use mii_check_media instead.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static void pcnet32_watchdog(struct net_device *dev)</div><div class='add'>+static void pcnet32_watchdog(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct pcnet32_private *lp = netdev_priv(dev);</div><div class='add'>+	struct pcnet32_private *lp = timer_container_of(lp, t, watchdog_timer);</div><div class='add'>+	struct net_device *dev = lp-&gt;dev;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='ctx'> 	/* Print the link status if it has changed */</div><div class='hunk'>@@ -2849,30 +2917,27 @@ static void pcnet32_watchdog(struct net_device *dev)</div><div class='ctx'> 	mod_timer(&amp;lp-&gt;watchdog_timer, round_jiffies(PCNET32_WATCHDOG_TIMEOUT));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pcnet32_pm_suspend(struct pci_dev *pdev, pm_message_t state)</div><div class='add'>+static int __maybe_unused pcnet32_pm_suspend(struct device *device_d)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *dev = pci_get_drvdata(pdev);</div><div class='add'>+	struct net_device *dev = dev_get_drvdata(device_d);</div><div class='ctx'> </div><div class='ctx'> 	if (netif_running(dev)) {</div><div class='ctx'> 		netif_device_detach(dev);</div><div class='ctx'> 		pcnet32_close(dev);</div><div class='ctx'> 	}</div><div class='del'>-	pci_save_state(pdev);</div><div class='del'>-	pci_set_power_state(pdev, pci_choose_state(pdev, state));</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int pcnet32_pm_resume(struct pci_dev *pdev)</div><div class='add'>+static int __maybe_unused pcnet32_pm_resume(struct device *device_d)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *dev = pci_get_drvdata(pdev);</div><div class='del'>-</div><div class='del'>-	pci_set_power_state(pdev, PCI_D0);</div><div class='del'>-	pci_restore_state(pdev);</div><div class='add'>+	struct net_device *dev = dev_get_drvdata(device_d);</div><div class='ctx'> </div><div class='ctx'> 	if (netif_running(dev)) {</div><div class='ctx'> 		pcnet32_open(dev);</div><div class='ctx'> 		netif_device_attach(dev);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2886,20 +2951,23 @@ static void pcnet32_remove_one(struct pci_dev *pdev)</div><div class='ctx'> 		unregister_netdev(dev);</div><div class='ctx'> 		pcnet32_free_ring(dev);</div><div class='ctx'> 		release_region(dev-&gt;base_addr, PCNET32_TOTAL_SIZE);</div><div class='del'>-		pci_free_consistent(lp-&gt;pci_dev, sizeof(*lp-&gt;init_block),</div><div class='del'>-				    lp-&gt;init_block, lp-&gt;init_dma_addr);</div><div class='add'>+		dma_free_coherent(&amp;lp-&gt;pci_dev-&gt;dev, sizeof(*lp-&gt;init_block),</div><div class='add'>+				  lp-&gt;init_block, lp-&gt;init_dma_addr);</div><div class='ctx'> 		free_netdev(dev);</div><div class='ctx'> 		pci_disable_device(pdev);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static SIMPLE_DEV_PM_OPS(pcnet32_pm_ops, pcnet32_pm_suspend, pcnet32_pm_resume);</div><div class='add'>+</div><div class='ctx'> static struct pci_driver pcnet32_driver = {</div><div class='ctx'> 	.name = DRV_NAME,</div><div class='ctx'> 	.probe = pcnet32_probe_pci,</div><div class='ctx'> 	.remove = pcnet32_remove_one,</div><div class='ctx'> 	.id_table = pcnet32_pci_tbl,</div><div class='del'>-	.suspend = pcnet32_pm_suspend,</div><div class='del'>-	.resume = pcnet32_pm_resume,</div><div class='add'>+	.driver = {</div><div class='add'>+		.pm = &amp;pcnet32_pm_ops,</div><div class='add'>+	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* An additional parameter that may be passed in... */</div><div class='hunk'>@@ -2937,8 +3005,6 @@ MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='ctx'> static int __init pcnet32_init_module(void)</div><div class='ctx'> {</div><div class='del'>-	pr_info("%s", version);</div><div class='del'>-</div><div class='ctx'> 	pcnet32_debug = netif_msg_init(debug, PCNET32_MSG_DEFAULT);</div><div class='ctx'> </div><div class='ctx'> 	if ((tx_start_pt &gt;= 0) &amp;&amp; (tx_start_pt &lt;= 3))</div><div class='hunk'>@@ -2968,8 +3034,8 @@ static void __exit pcnet32_cleanup_module(void)</div><div class='ctx'> 		unregister_netdev(pcnet32_dev);</div><div class='ctx'> 		pcnet32_free_ring(pcnet32_dev);</div><div class='ctx'> 		release_region(pcnet32_dev-&gt;base_addr, PCNET32_TOTAL_SIZE);</div><div class='del'>-		pci_free_consistent(lp-&gt;pci_dev, sizeof(*lp-&gt;init_block),</div><div class='del'>-				    lp-&gt;init_block, lp-&gt;init_dma_addr);</div><div class='add'>+		dma_free_coherent(&amp;lp-&gt;pci_dev-&gt;dev, sizeof(*lp-&gt;init_block),</div><div class='add'>+				  lp-&gt;init_block, lp-&gt;init_dma_addr);</div><div class='ctx'> 		free_netdev(pcnet32_dev);</div><div class='ctx'> 		pcnet32_dev = next_dev;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2980,10 +3046,3 @@ static void __exit pcnet32_cleanup_module(void)</div><div class='ctx'> </div><div class='ctx'> module_init(pcnet32_init_module);</div><div class='ctx'> module_exit(pcnet32_cleanup_module);</div><div class='del'>-</div><div class='del'>-/*</div><div class='del'>- * Local variables:</div><div class='del'>- *  c-indent-level: 4</div><div class='del'>- *  tab-width: 8</div><div class='del'>- * End:</div><div class='del'>- */</div><div class='head'>diff --git a/drivers/net/ethernet/amd/pds_core/Makefile b/drivers/net/ethernet/amd/pds_core/Makefile<br/>new file mode 100644<br/>index 000000000000..8239742e681f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/pds_core/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/pds_core/Makefile</a></div><div class='hunk'>@@ -0,0 +1,13 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+# Copyright (c) 2023 Advanced Micro Devices, Inc.</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_PDS_CORE) := pds_core.o</div><div class='add'>+</div><div class='add'>+pds_core-y := main.o \</div><div class='add'>+	      devlink.o \</div><div class='add'>+	      auxbus.o \</div><div class='add'>+	      dev.o \</div><div class='add'>+	      adminq.o \</div><div class='add'>+	      core.o \</div><div class='add'>+	      debugfs.o \</div><div class='add'>+	      fw.o</div><div class='head'>diff --git a/drivers/net/ethernet/amd/pds_core/adminq.c b/drivers/net/ethernet/amd/pds_core/adminq.c<br/>new file mode 100644<br/>index 000000000000..097bb092bdb8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/pds_core/adminq.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/pds_core/adminq.c</a></div><div class='hunk'>@@ -0,0 +1,310 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright(c) 2023 Advanced Micro Devices, Inc */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/dynamic_debug.h&gt;</div><div class='add'>+</div><div class='add'>+#include "core.h"</div><div class='add'>+</div><div class='add'>+static int pdsc_process_notifyq(struct pdsc_qcq *qcq)</div><div class='add'>+{</div><div class='add'>+	union pds_core_notifyq_comp *comp;</div><div class='add'>+	struct pdsc *pdsc = qcq-&gt;pdsc;</div><div class='add'>+	struct pdsc_cq *cq = &amp;qcq-&gt;cq;</div><div class='add'>+	struct pdsc_cq_info *cq_info;</div><div class='add'>+	int nq_work = 0;</div><div class='add'>+	u64 eid;</div><div class='add'>+</div><div class='add'>+	cq_info = &amp;cq-&gt;info[cq-&gt;tail_idx];</div><div class='add'>+	comp = cq_info-&gt;comp;</div><div class='add'>+	eid = le64_to_cpu(comp-&gt;event.eid);</div><div class='add'>+	while (eid &gt; pdsc-&gt;last_eid) {</div><div class='add'>+		u16 ecode = le16_to_cpu(comp-&gt;event.ecode);</div><div class='add'>+</div><div class='add'>+		switch (ecode) {</div><div class='add'>+		case PDS_EVENT_LINK_CHANGE:</div><div class='add'>+			dev_info(pdsc-&gt;dev, "NotifyQ LINK_CHANGE ecode %d eid %lld\n",</div><div class='add'>+				 ecode, eid);</div><div class='add'>+			pdsc_notify(PDS_EVENT_LINK_CHANGE, comp);</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case PDS_EVENT_RESET:</div><div class='add'>+			dev_info(pdsc-&gt;dev, "NotifyQ RESET ecode %d eid %lld\n",</div><div class='add'>+				 ecode, eid);</div><div class='add'>+			pdsc_notify(PDS_EVENT_RESET, comp);</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case PDS_EVENT_XCVR:</div><div class='add'>+			dev_info(pdsc-&gt;dev, "NotifyQ XCVR ecode %d eid %lld\n",</div><div class='add'>+				 ecode, eid);</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		default:</div><div class='add'>+			dev_info(pdsc-&gt;dev, "NotifyQ ecode %d eid %lld\n",</div><div class='add'>+				 ecode, eid);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		pdsc-&gt;last_eid = eid;</div><div class='add'>+		cq-&gt;tail_idx = (cq-&gt;tail_idx + 1) &amp; (cq-&gt;num_descs - 1);</div><div class='add'>+		cq_info = &amp;cq-&gt;info[cq-&gt;tail_idx];</div><div class='add'>+		comp = cq_info-&gt;comp;</div><div class='add'>+		eid = le64_to_cpu(comp-&gt;event.eid);</div><div class='add'>+</div><div class='add'>+		nq_work++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	qcq-&gt;accum_work += nq_work;</div><div class='add'>+</div><div class='add'>+	return nq_work;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool pdsc_adminq_inc_if_up(struct pdsc *pdsc)</div><div class='add'>+{</div><div class='add'>+	if (pdsc-&gt;state &amp; BIT_ULL(PDSC_S_STOPPING_DRIVER) ||</div><div class='add'>+	    pdsc-&gt;state &amp; BIT_ULL(PDSC_S_FW_DEAD))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return refcount_inc_not_zero(&amp;pdsc-&gt;adminq_refcnt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void pdsc_process_adminq(struct pdsc_qcq *qcq)</div><div class='add'>+{</div><div class='add'>+	union pds_core_adminq_comp *comp;</div><div class='add'>+	struct pdsc_queue *q = &amp;qcq-&gt;q;</div><div class='add'>+	struct pdsc *pdsc = qcq-&gt;pdsc;</div><div class='add'>+	struct pdsc_cq *cq = &amp;qcq-&gt;cq;</div><div class='add'>+	struct pdsc_q_info *q_info;</div><div class='add'>+	unsigned long irqflags;</div><div class='add'>+	int nq_work = 0;</div><div class='add'>+	int aq_work = 0;</div><div class='add'>+</div><div class='add'>+	/* Don't process AdminQ when it's not up */</div><div class='add'>+	if (!pdsc_adminq_inc_if_up(pdsc)) {</div><div class='add'>+		dev_err(pdsc-&gt;dev, "%s: called while adminq is unavailable\n",</div><div class='add'>+			__func__);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Check for NotifyQ event */</div><div class='add'>+	nq_work = pdsc_process_notifyq(&amp;pdsc-&gt;notifyqcq);</div><div class='add'>+</div><div class='add'>+	/* Check for empty queue, which can happen if the interrupt was</div><div class='add'>+	 * for a NotifyQ event and there are no new AdminQ completions.</div><div class='add'>+	 */</div><div class='add'>+	if (q-&gt;tail_idx == q-&gt;head_idx)</div><div class='add'>+		goto credits;</div><div class='add'>+</div><div class='add'>+	/* Find the first completion to clean,</div><div class='add'>+	 * run the callback in the related q_info,</div><div class='add'>+	 * and continue while we still match done color</div><div class='add'>+	 */</div><div class='add'>+	spin_lock_irqsave(&amp;pdsc-&gt;adminq_lock, irqflags);</div><div class='add'>+	comp = cq-&gt;info[cq-&gt;tail_idx].comp;</div><div class='add'>+	while (pdsc_color_match(comp-&gt;color, cq-&gt;done_color)) {</div><div class='add'>+		q_info = &amp;q-&gt;info[q-&gt;tail_idx];</div><div class='add'>+		q-&gt;tail_idx = (q-&gt;tail_idx + 1) &amp; (q-&gt;num_descs - 1);</div><div class='add'>+</div><div class='add'>+		if (!completion_done(&amp;q_info-&gt;completion)) {</div><div class='add'>+			memcpy(q_info-&gt;dest, comp, sizeof(*comp));</div><div class='add'>+			complete(&amp;q_info-&gt;completion);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (cq-&gt;tail_idx == cq-&gt;num_descs - 1)</div><div class='add'>+			cq-&gt;done_color = !cq-&gt;done_color;</div><div class='add'>+		cq-&gt;tail_idx = (cq-&gt;tail_idx + 1) &amp; (cq-&gt;num_descs - 1);</div><div class='add'>+		comp = cq-&gt;info[cq-&gt;tail_idx].comp;</div><div class='add'>+</div><div class='add'>+		aq_work++;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;pdsc-&gt;adminq_lock, irqflags);</div><div class='add'>+</div><div class='add'>+	qcq-&gt;accum_work += aq_work;</div><div class='add'>+</div><div class='add'>+credits:</div><div class='add'>+	/* Return the interrupt credits, one for each completion */</div><div class='add'>+	pds_core_intr_credits(&amp;pdsc-&gt;intr_ctrl[qcq-&gt;intx],</div><div class='add'>+			      nq_work + aq_work,</div><div class='add'>+			      PDS_CORE_INTR_CRED_REARM);</div><div class='add'>+	refcount_dec(&amp;pdsc-&gt;adminq_refcnt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void pdsc_work_thread(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct pdsc_qcq *qcq = container_of(work, struct pdsc_qcq, work);</div><div class='add'>+</div><div class='add'>+	pdsc_process_adminq(qcq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+irqreturn_t pdsc_adminq_isr(int irq, void *data)</div><div class='add'>+{</div><div class='add'>+	struct pdsc *pdsc = data;</div><div class='add'>+	struct pdsc_qcq *qcq;</div><div class='add'>+</div><div class='add'>+	/* Don't process AdminQ when it's not up */</div><div class='add'>+	if (!pdsc_adminq_inc_if_up(pdsc)) {</div><div class='add'>+		dev_err(pdsc-&gt;dev, "%s: called while adminq is unavailable\n",</div><div class='add'>+			__func__);</div><div class='add'>+		return IRQ_HANDLED;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	qcq = &amp;pdsc-&gt;adminqcq;</div><div class='add'>+	queue_work(pdsc-&gt;wq, &amp;qcq-&gt;work);</div><div class='add'>+	refcount_dec(&amp;pdsc-&gt;adminq_refcnt);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __pdsc_adminq_post(struct pdsc *pdsc,</div><div class='add'>+			      struct pdsc_qcq *qcq,</div><div class='add'>+			      union pds_core_adminq_cmd *cmd,</div><div class='add'>+			      union pds_core_adminq_comp *comp)</div><div class='add'>+{</div><div class='add'>+	struct pdsc_queue *q = &amp;qcq-&gt;q;</div><div class='add'>+	struct pdsc_q_info *q_info;</div><div class='add'>+	unsigned long irqflags;</div><div class='add'>+	unsigned int avail;</div><div class='add'>+	int index;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;pdsc-&gt;adminq_lock, irqflags);</div><div class='add'>+</div><div class='add'>+	/* Check for space in the queue */</div><div class='add'>+	avail = q-&gt;tail_idx;</div><div class='add'>+	if (q-&gt;head_idx &gt;= avail)</div><div class='add'>+		avail += q-&gt;num_descs - q-&gt;head_idx - 1;</div><div class='add'>+	else</div><div class='add'>+		avail -= q-&gt;head_idx + 1;</div><div class='add'>+	if (!avail) {</div><div class='add'>+		ret = -ENOSPC;</div><div class='add'>+		goto err_out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Check that the FW is running */</div><div class='add'>+	if (!pdsc_is_fw_running(pdsc)) {</div><div class='add'>+		if (pdsc-&gt;info_regs) {</div><div class='add'>+			u8 fw_status =</div><div class='add'>+				ioread8(&amp;pdsc-&gt;info_regs-&gt;fw_status);</div><div class='add'>+</div><div class='add'>+			dev_info(pdsc-&gt;dev, "%s: post failed - fw not running %#02x:\n",</div><div class='add'>+				 __func__, fw_status);</div><div class='add'>+		} else {</div><div class='add'>+			dev_info(pdsc-&gt;dev, "%s: post failed - BARs not setup\n",</div><div class='add'>+				 __func__);</div><div class='add'>+		}</div><div class='add'>+		ret = -ENXIO;</div><div class='add'>+</div><div class='add'>+		goto err_out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Post the request */</div><div class='add'>+	index = q-&gt;head_idx;</div><div class='add'>+	q_info = &amp;q-&gt;info[index];</div><div class='add'>+	q_info-&gt;dest = comp;</div><div class='add'>+	memcpy(q_info-&gt;desc, cmd, sizeof(*cmd));</div><div class='add'>+	reinit_completion(&amp;q_info-&gt;completion);</div><div class='add'>+</div><div class='add'>+	dev_dbg(pdsc-&gt;dev, "head_idx %d tail_idx %d\n",</div><div class='add'>+		q-&gt;head_idx, q-&gt;tail_idx);</div><div class='add'>+	dev_dbg(pdsc-&gt;dev, "post admin queue command:\n");</div><div class='add'>+	dynamic_hex_dump("cmd ", DUMP_PREFIX_OFFSET, 16, 1,</div><div class='add'>+			 cmd, sizeof(*cmd), true);</div><div class='add'>+</div><div class='add'>+	q-&gt;head_idx = (q-&gt;head_idx + 1) &amp; (q-&gt;num_descs - 1);</div><div class='add'>+</div><div class='add'>+	pds_core_dbell_ring(pdsc-&gt;kern_dbpage,</div><div class='add'>+			    q-&gt;hw_type, q-&gt;dbval | q-&gt;head_idx);</div><div class='add'>+	ret = index;</div><div class='add'>+</div><div class='add'>+err_out_unlock:</div><div class='add'>+	spin_unlock_irqrestore(&amp;pdsc-&gt;adminq_lock, irqflags);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int pdsc_adminq_post(struct pdsc *pdsc,</div><div class='add'>+		     union pds_core_adminq_cmd *cmd,</div><div class='add'>+		     union pds_core_adminq_comp *comp,</div><div class='add'>+		     bool fast_poll)</div><div class='add'>+{</div><div class='add'>+	unsigned long poll_interval = 200;</div><div class='add'>+	unsigned long poll_jiffies;</div><div class='add'>+	unsigned long time_limit;</div><div class='add'>+	unsigned long time_start;</div><div class='add'>+	unsigned long time_done;</div><div class='add'>+	unsigned long remaining;</div><div class='add'>+	struct completion *wc;</div><div class='add'>+	int err = 0;</div><div class='add'>+	int index;</div><div class='add'>+</div><div class='add'>+	if (!pdsc_adminq_inc_if_up(pdsc)) {</div><div class='add'>+		dev_dbg(pdsc-&gt;dev, "%s: preventing adminq cmd %u\n",</div><div class='add'>+			__func__, cmd-&gt;opcode);</div><div class='add'>+		return -ENXIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	index = __pdsc_adminq_post(pdsc, &amp;pdsc-&gt;adminqcq, cmd, comp);</div><div class='add'>+	if (index &lt; 0) {</div><div class='add'>+		err = index;</div><div class='add'>+		goto err_out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	wc = &amp;pdsc-&gt;adminqcq.q.info[index].completion;</div><div class='add'>+	time_start = jiffies;</div><div class='add'>+	time_limit = time_start + HZ * pdsc-&gt;devcmd_timeout;</div><div class='add'>+	do {</div><div class='add'>+		/* Timeslice the actual wait to catch IO errors etc early */</div><div class='add'>+		poll_jiffies = usecs_to_jiffies(poll_interval);</div><div class='add'>+		remaining = wait_for_completion_timeout(wc, poll_jiffies);</div><div class='add'>+		if (remaining)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		if (!pdsc_is_fw_running(pdsc)) {</div><div class='add'>+			if (pdsc-&gt;info_regs) {</div><div class='add'>+				u8 fw_status =</div><div class='add'>+					ioread8(&amp;pdsc-&gt;info_regs-&gt;fw_status);</div><div class='add'>+</div><div class='add'>+				dev_dbg(pdsc-&gt;dev, "%s: post wait failed - fw not running %#02x:\n",</div><div class='add'>+					__func__, fw_status);</div><div class='add'>+			} else {</div><div class='add'>+				dev_dbg(pdsc-&gt;dev, "%s: post wait failed - BARs not setup\n",</div><div class='add'>+					__func__);</div><div class='add'>+			}</div><div class='add'>+			err = -ENXIO;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* When fast_poll is not requested, prevent aggressive polling</div><div class='add'>+		 * on failures due to timeouts by doing exponential back off.</div><div class='add'>+		 */</div><div class='add'>+		if (!fast_poll &amp;&amp; poll_interval &lt; PDSC_ADMINQ_MAX_POLL_INTERVAL)</div><div class='add'>+			poll_interval &lt;&lt;= 1;</div><div class='add'>+	} while (time_before(jiffies, time_limit));</div><div class='add'>+	time_done = jiffies;</div><div class='add'>+	dev_dbg(pdsc-&gt;dev, "%s: elapsed %d msecs\n",</div><div class='add'>+		__func__, jiffies_to_msecs(time_done - time_start));</div><div class='add'>+</div><div class='add'>+	/* Check the results and clear an un-completed timeout */</div><div class='add'>+	if (time_after_eq(time_done, time_limit) &amp;&amp; !completion_done(wc)) {</div><div class='add'>+		err = -ETIMEDOUT;</div><div class='add'>+		complete(wc);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(pdsc-&gt;dev, "read admin queue completion idx %d:\n", index);</div><div class='add'>+	dynamic_hex_dump("comp ", DUMP_PREFIX_OFFSET, 16, 1,</div><div class='add'>+			 comp, sizeof(*comp), true);</div><div class='add'>+</div><div class='add'>+	if (remaining &amp;&amp; comp-&gt;status)</div><div class='add'>+		err = pdsc_err_to_errno(comp-&gt;status);</div><div class='add'>+</div><div class='add'>+err_out:</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_dbg(pdsc-&gt;dev, "%s: opcode %d status %d err %pe\n",</div><div class='add'>+			__func__, cmd-&gt;opcode, comp-&gt;status, ERR_PTR(err));</div><div class='add'>+		if (err == -ENXIO || err == -ETIMEDOUT)</div><div class='add'>+			queue_work(pdsc-&gt;wq, &amp;pdsc-&gt;health_work);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	refcount_dec(&amp;pdsc-&gt;adminq_refcnt);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(pdsc_adminq_post);</div><div class='head'>diff --git a/drivers/net/ethernet/amd/pds_core/auxbus.c b/drivers/net/ethernet/amd/pds_core/auxbus.c<br/>new file mode 100644<br/>index 000000000000..92f359f2b449<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/pds_core/auxbus.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/pds_core/auxbus.c</a></div><div class='hunk'>@@ -0,0 +1,256 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright(c) 2023 Advanced Micro Devices, Inc */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+</div><div class='add'>+#include "core.h"</div><div class='add'>+#include &lt;linux/pds/pds_auxbus.h&gt;</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * pds_client_register - Link the client to the firmware</div><div class='add'>+ * @pf:		ptr to the PF driver's private data struct</div><div class='add'>+ * @devname:	name that includes service into, e.g. pds_core.vDPA</div><div class='add'>+ *</div><div class='add'>+ * Return: positive client ID (ci) on success, or</div><div class='add'>+ *         negative for error</div><div class='add'>+ */</div><div class='add'>+int pds_client_register(struct pdsc *pf, char *devname)</div><div class='add'>+{</div><div class='add'>+	union pds_core_adminq_comp comp = {};</div><div class='add'>+	union pds_core_adminq_cmd cmd = {};</div><div class='add'>+	int err;</div><div class='add'>+	u16 ci;</div><div class='add'>+</div><div class='add'>+	cmd.client_reg.opcode = PDS_AQ_CMD_CLIENT_REG;</div><div class='add'>+	strscpy(cmd.client_reg.devname, devname,</div><div class='add'>+		sizeof(cmd.client_reg.devname));</div><div class='add'>+</div><div class='add'>+	err = pdsc_adminq_post(pf, &amp;cmd, &amp;comp, false);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_info(pf-&gt;dev, "register dev_name %s with DSC failed, status %d: %pe\n",</div><div class='add'>+			 devname, comp.status, ERR_PTR(err));</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ci = le16_to_cpu(comp.client_reg.client_id);</div><div class='add'>+	if (!ci) {</div><div class='add'>+		dev_err(pf-&gt;dev, "%s: device returned null client_id\n",</div><div class='add'>+			__func__);</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_dbg(pf-&gt;dev, "%s: device returned client_id %d for %s\n",</div><div class='add'>+		__func__, ci, devname);</div><div class='add'>+</div><div class='add'>+	return ci;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(pds_client_register);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * pds_client_unregister - Unlink the client from the firmware</div><div class='add'>+ * @pf:		ptr to the PF driver's private data struct</div><div class='add'>+ * @client_id:	id returned from pds_client_register()</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or</div><div class='add'>+ *         negative for error</div><div class='add'>+ */</div><div class='add'>+int pds_client_unregister(struct pdsc *pf, u16 client_id)</div><div class='add'>+{</div><div class='add'>+	union pds_core_adminq_comp comp = {};</div><div class='add'>+	union pds_core_adminq_cmd cmd = {};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	cmd.client_unreg.opcode = PDS_AQ_CMD_CLIENT_UNREG;</div><div class='add'>+	cmd.client_unreg.client_id = cpu_to_le16(client_id);</div><div class='add'>+</div><div class='add'>+	err = pdsc_adminq_post(pf, &amp;cmd, &amp;comp, false);</div><div class='add'>+	if (err)</div><div class='add'>+		dev_info(pf-&gt;dev, "unregister client_id %d failed, status %d: %pe\n",</div><div class='add'>+			 client_id, comp.status, ERR_PTR(err));</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(pds_client_unregister);</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * pds_client_adminq_cmd - Process an adminq request for the client</div><div class='add'>+ * @padev:   ptr to the client device</div><div class='add'>+ * @req:     ptr to buffer with request</div><div class='add'>+ * @req_len: length of actual struct used for request</div><div class='add'>+ * @resp:    ptr to buffer where answer is to be copied</div><div class='add'>+ * @flags:   optional flags from pds_core_adminq_flags</div><div class='add'>+ *</div><div class='add'>+ * Return: 0 on success, or</div><div class='add'>+ *         negative for error</div><div class='add'>+ *</div><div class='add'>+ * Client sends pointers to request and response buffers</div><div class='add'>+ * Core copies request data into pds_core_client_request_cmd</div><div class='add'>+ * Core sets other fields as needed</div><div class='add'>+ * Core posts to AdminQ</div><div class='add'>+ * Core copies completion data into response buffer</div><div class='add'>+ */</div><div class='add'>+int pds_client_adminq_cmd(struct pds_auxiliary_dev *padev,</div><div class='add'>+			  union pds_core_adminq_cmd *req,</div><div class='add'>+			  size_t req_len,</div><div class='add'>+			  union pds_core_adminq_comp *resp,</div><div class='add'>+			  u64 flags)</div><div class='add'>+{</div><div class='add'>+	union pds_core_adminq_cmd cmd = {};</div><div class='add'>+	struct pci_dev *pf_pdev;</div><div class='add'>+	struct pdsc *pf;</div><div class='add'>+	size_t cp_len;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	pf_pdev = pci_physfn(padev-&gt;vf_pdev);</div><div class='add'>+	pf = pci_get_drvdata(pf_pdev);</div><div class='add'>+</div><div class='add'>+	dev_dbg(pf-&gt;dev, "%s: %s opcode %d\n",</div><div class='add'>+		__func__, dev_name(&amp;padev-&gt;aux_dev.dev), req-&gt;opcode);</div><div class='add'>+</div><div class='add'>+	/* Wrap the client's request */</div><div class='add'>+	cmd.client_request.opcode = PDS_AQ_CMD_CLIENT_CMD;</div><div class='add'>+	cmd.client_request.client_id = cpu_to_le16(padev-&gt;client_id);</div><div class='add'>+	cp_len = min_t(size_t, req_len, sizeof(cmd.client_request.client_cmd));</div><div class='add'>+	memcpy(cmd.client_request.client_cmd, req, cp_len);</div><div class='add'>+</div><div class='add'>+	err = pdsc_adminq_post(pf, &amp;cmd, resp,</div><div class='add'>+			       !!(flags &amp; PDS_AQ_FLAG_FASTPOLL));</div><div class='add'>+	if (err &amp;&amp; err != -EAGAIN)</div><div class='add'>+		dev_info(pf-&gt;dev, "client admin cmd failed: %pe\n",</div><div class='add'>+			 ERR_PTR(err));</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(pds_client_adminq_cmd);</div><div class='add'>+</div><div class='add'>+static void pdsc_auxbus_dev_release(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct pds_auxiliary_dev *padev =</div><div class='add'>+		container_of(dev, struct pds_auxiliary_dev, aux_dev.dev);</div><div class='add'>+</div><div class='add'>+	kfree(padev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct pds_auxiliary_dev *pdsc_auxbus_dev_register(struct pdsc *cf,</div><div class='add'>+							  struct pdsc *pf,</div><div class='add'>+							  u16 client_id,</div><div class='add'>+							  char *name)</div><div class='add'>+{</div><div class='add'>+	struct auxiliary_device *aux_dev;</div><div class='add'>+	struct pds_auxiliary_dev *padev;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	padev = kzalloc(sizeof(*padev), GFP_KERNEL);</div><div class='add'>+	if (!padev)</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='add'>+</div><div class='add'>+	padev-&gt;vf_pdev = cf-&gt;pdev;</div><div class='add'>+	padev-&gt;client_id = client_id;</div><div class='add'>+</div><div class='add'>+	aux_dev = &amp;padev-&gt;aux_dev;</div><div class='add'>+	aux_dev-&gt;name = name;</div><div class='add'>+	aux_dev-&gt;id = cf-&gt;uid;</div><div class='add'>+	aux_dev-&gt;dev.parent = cf-&gt;dev;</div><div class='add'>+	aux_dev-&gt;dev.release = pdsc_auxbus_dev_release;</div><div class='add'>+</div><div class='add'>+	err = auxiliary_device_init(aux_dev);</div><div class='add'>+	if (err &lt; 0) {</div><div class='add'>+		dev_warn(cf-&gt;dev, "auxiliary_device_init of %s failed: %pe\n",</div><div class='add'>+			 name, ERR_PTR(err));</div><div class='add'>+		kfree(padev);</div><div class='add'>+		return ERR_PTR(err);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = auxiliary_device_add(aux_dev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_warn(cf-&gt;dev, "auxiliary_device_add of %s failed: %pe\n",</div><div class='add'>+			 name, ERR_PTR(err));</div><div class='add'>+		auxiliary_device_uninit(aux_dev);</div><div class='add'>+		return ERR_PTR(err);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return padev;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void pdsc_auxbus_dev_del(struct pdsc *cf, struct pdsc *pf,</div><div class='add'>+			 struct pds_auxiliary_dev **pd_ptr)</div><div class='add'>+{</div><div class='add'>+	struct pds_auxiliary_dev *padev;</div><div class='add'>+</div><div class='add'>+	if (!*pd_ptr)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pf-&gt;config_lock);</div><div class='add'>+</div><div class='add'>+	padev = *pd_ptr;</div><div class='add'>+	pds_client_unregister(pf, padev-&gt;client_id);</div><div class='add'>+	auxiliary_device_delete(&amp;padev-&gt;aux_dev);</div><div class='add'>+	auxiliary_device_uninit(&amp;padev-&gt;aux_dev);</div><div class='add'>+	*pd_ptr = NULL;</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;pf-&gt;config_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int pdsc_auxbus_dev_add(struct pdsc *cf, struct pdsc *pf,</div><div class='add'>+			enum pds_core_vif_types vt,</div><div class='add'>+			struct pds_auxiliary_dev **pd_ptr)</div><div class='add'>+{</div><div class='add'>+	struct pds_auxiliary_dev *padev;</div><div class='add'>+	char devname[PDS_DEVNAME_LEN];</div><div class='add'>+	unsigned long mask;</div><div class='add'>+	u16 vt_support;</div><div class='add'>+	int client_id;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (!cf)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	if (vt &gt;= PDS_DEV_TYPE_MAX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pf-&gt;config_lock);</div><div class='add'>+</div><div class='add'>+	mask = BIT_ULL(PDSC_S_FW_DEAD) |</div><div class='add'>+	       BIT_ULL(PDSC_S_STOPPING_DRIVER);</div><div class='add'>+	if (cf-&gt;state &amp; mask) {</div><div class='add'>+		dev_err(pf-&gt;dev, "%s: can't add dev, VF client in bad state %#lx\n",</div><div class='add'>+			__func__, cf-&gt;state);</div><div class='add'>+		err = -ENXIO;</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Verify that the type is supported and enabled.  It is not</div><div class='add'>+	 * an error if the firmware doesn't support the feature, the</div><div class='add'>+	 * driver just won't set up an auxiliary_device for it.</div><div class='add'>+	 */</div><div class='add'>+	vt_support = !!le16_to_cpu(pf-&gt;dev_ident.vif_types[vt]);</div><div class='add'>+	if (!(vt_support &amp;&amp;</div><div class='add'>+	      pf-&gt;viftype_status[vt].supported &amp;&amp;</div><div class='add'>+	      pf-&gt;viftype_status[vt].enabled))</div><div class='add'>+		goto out_unlock;</div><div class='add'>+</div><div class='add'>+	/* Need to register with FW and get the client_id before</div><div class='add'>+	 * creating the aux device so that the aux client can run</div><div class='add'>+	 * adminq commands as part its probe</div><div class='add'>+	 */</div><div class='add'>+	snprintf(devname, sizeof(devname), "%s.%s.%d",</div><div class='add'>+		 PDS_CORE_DRV_NAME, pf-&gt;viftype_status[vt].name, cf-&gt;uid);</div><div class='add'>+	client_id = pds_client_register(pf, devname);</div><div class='add'>+	if (client_id &lt; 0) {</div><div class='add'>+		err = client_id;</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	padev = pdsc_auxbus_dev_register(cf, pf, client_id,</div><div class='add'>+					 pf-&gt;viftype_status[vt].name);</div><div class='add'>+	if (IS_ERR(padev)) {</div><div class='add'>+		pds_client_unregister(pf, client_id);</div><div class='add'>+		err = PTR_ERR(padev);</div><div class='add'>+		goto out_unlock;</div><div class='add'>+	}</div><div class='add'>+	*pd_ptr = padev;</div><div class='add'>+</div><div class='add'>+out_unlock:</div><div class='add'>+	mutex_unlock(&amp;pf-&gt;config_lock);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/amd/pds_core/core.c b/drivers/net/ethernet/amd/pds_core/core.c<br/>new file mode 100644<br/>index 000000000000..076dfe2910c7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/pds_core/core.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/pds_core/core.c</a></div><div class='hunk'>@@ -0,0 +1,661 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright(c) 2023 Advanced Micro Devices, Inc */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/vmalloc.h&gt;</div><div class='add'>+</div><div class='add'>+#include "core.h"</div><div class='add'>+</div><div class='add'>+static BLOCKING_NOTIFIER_HEAD(pds_notify_chain);</div><div class='add'>+</div><div class='add'>+int pdsc_register_notify(struct notifier_block *nb)</div><div class='add'>+{</div><div class='add'>+	return blocking_notifier_chain_register(&amp;pds_notify_chain, nb);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(pdsc_register_notify);</div><div class='add'>+</div><div class='add'>+void pdsc_unregister_notify(struct notifier_block *nb)</div><div class='add'>+{</div><div class='add'>+	blocking_notifier_chain_unregister(&amp;pds_notify_chain, nb);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(pdsc_unregister_notify);</div><div class='add'>+</div><div class='add'>+void pdsc_notify(unsigned long event, void *data)</div><div class='add'>+{</div><div class='add'>+	blocking_notifier_call_chain(&amp;pds_notify_chain, event, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void pdsc_intr_free(struct pdsc *pdsc, int index)</div><div class='add'>+{</div><div class='add'>+	struct pdsc_intr_info *intr_info;</div><div class='add'>+</div><div class='add'>+	if (index &gt;= pdsc-&gt;nintrs || index &lt; 0) {</div><div class='add'>+		WARN(true, "bad intr index %d\n", index);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	intr_info = &amp;pdsc-&gt;intr_info[index];</div><div class='add'>+	if (!intr_info-&gt;vector)</div><div class='add'>+		return;</div><div class='add'>+	dev_dbg(pdsc-&gt;dev, "%s: idx %d vec %d name %s\n",</div><div class='add'>+		__func__, index, intr_info-&gt;vector, intr_info-&gt;name);</div><div class='add'>+</div><div class='add'>+	pds_core_intr_mask(&amp;pdsc-&gt;intr_ctrl[index], PDS_CORE_INTR_MASK_SET);</div><div class='add'>+	pds_core_intr_clean(&amp;pdsc-&gt;intr_ctrl[index]);</div><div class='add'>+</div><div class='add'>+	free_irq(intr_info-&gt;vector, intr_info-&gt;data);</div><div class='add'>+</div><div class='add'>+	memset(intr_info, 0, sizeof(*intr_info));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int pdsc_intr_alloc(struct pdsc *pdsc, char *name,</div><div class='add'>+		    irq_handler_t handler, void *data)</div><div class='add'>+{</div><div class='add'>+	struct pdsc_intr_info *intr_info;</div><div class='add'>+	unsigned int index;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Find the first available interrupt */</div><div class='add'>+	for (index = 0; index &lt; pdsc-&gt;nintrs; index++)</div><div class='add'>+		if (!pdsc-&gt;intr_info[index].vector)</div><div class='add'>+			break;</div><div class='add'>+	if (index &gt;= pdsc-&gt;nintrs) {</div><div class='add'>+		dev_warn(pdsc-&gt;dev, "%s: no intr, index=%d nintrs=%d\n",</div><div class='add'>+			 __func__, index, pdsc-&gt;nintrs);</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pds_core_intr_clean_flags(&amp;pdsc-&gt;intr_ctrl[index],</div><div class='add'>+				  PDS_CORE_INTR_CRED_RESET_COALESCE);</div><div class='add'>+</div><div class='add'>+	intr_info = &amp;pdsc-&gt;intr_info[index];</div><div class='add'>+</div><div class='add'>+	intr_info-&gt;index = index;</div><div class='add'>+	intr_info-&gt;data = data;</div><div class='add'>+	strscpy(intr_info-&gt;name, name, sizeof(intr_info-&gt;name));</div><div class='add'>+</div><div class='add'>+	/* Get the OS vector number for the interrupt */</div><div class='add'>+	err = pci_irq_vector(pdsc-&gt;pdev, index);</div><div class='add'>+	if (err &lt; 0) {</div><div class='add'>+		dev_err(pdsc-&gt;dev, "failed to get intr vector index %d: %pe\n",</div><div class='add'>+			index, ERR_PTR(err));</div><div class='add'>+		goto err_out_free_intr;</div><div class='add'>+	}</div><div class='add'>+	intr_info-&gt;vector = err;</div><div class='add'>+</div><div class='add'>+	/* Init the device's intr mask */</div><div class='add'>+	pds_core_intr_clean(&amp;pdsc-&gt;intr_ctrl[index]);</div><div class='add'>+	pds_core_intr_mask_assert(&amp;pdsc-&gt;intr_ctrl[index], 1);</div><div class='add'>+	pds_core_intr_mask(&amp;pdsc-&gt;intr_ctrl[index], PDS_CORE_INTR_MASK_SET);</div><div class='add'>+</div><div class='add'>+	/* Register the isr with a name */</div><div class='add'>+	err = request_irq(intr_info-&gt;vector, handler, 0, intr_info-&gt;name, data);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(pdsc-&gt;dev, "failed to get intr irq vector %d: %pe\n",</div><div class='add'>+			intr_info-&gt;vector, ERR_PTR(err));</div><div class='add'>+		goto err_out_free_intr;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return index;</div><div class='add'>+</div><div class='add'>+err_out_free_intr:</div><div class='add'>+	pdsc_intr_free(pdsc, index);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pdsc_qcq_intr_free(struct pdsc *pdsc, struct pdsc_qcq *qcq)</div><div class='add'>+{</div><div class='add'>+	if (!(qcq-&gt;flags &amp; PDS_CORE_QCQ_F_INTR) ||</div><div class='add'>+	    qcq-&gt;intx == PDS_CORE_INTR_INDEX_NOT_ASSIGNED)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	pdsc_intr_free(pdsc, qcq-&gt;intx);</div><div class='add'>+	qcq-&gt;intx = PDS_CORE_INTR_INDEX_NOT_ASSIGNED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pdsc_qcq_intr_alloc(struct pdsc *pdsc, struct pdsc_qcq *qcq)</div><div class='add'>+{</div><div class='add'>+	char name[PDSC_INTR_NAME_MAX_SZ];</div><div class='add'>+	int index;</div><div class='add'>+</div><div class='add'>+	if (!(qcq-&gt;flags &amp; PDS_CORE_QCQ_F_INTR)) {</div><div class='add'>+		qcq-&gt;intx = PDS_CORE_INTR_INDEX_NOT_ASSIGNED;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	snprintf(name, sizeof(name), "%s-%d-%s",</div><div class='add'>+		 PDS_CORE_DRV_NAME, pdsc-&gt;pdev-&gt;bus-&gt;number, qcq-&gt;q.name);</div><div class='add'>+	index = pdsc_intr_alloc(pdsc, name, pdsc_adminq_isr, pdsc);</div><div class='add'>+	if (index &lt; 0)</div><div class='add'>+		return index;</div><div class='add'>+	qcq-&gt;intx = index;</div><div class='add'>+	qcq-&gt;cq.bound_intr = &amp;pdsc-&gt;intr_info[index];</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void pdsc_qcq_free(struct pdsc *pdsc, struct pdsc_qcq *qcq)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = pdsc-&gt;dev;</div><div class='add'>+</div><div class='add'>+	if (!(qcq &amp;&amp; qcq-&gt;pdsc))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	pdsc_debugfs_del_qcq(qcq);</div><div class='add'>+</div><div class='add'>+	pdsc_qcq_intr_free(pdsc, qcq);</div><div class='add'>+</div><div class='add'>+	if (qcq-&gt;q_base)</div><div class='add'>+		dma_free_coherent(dev, qcq-&gt;q_size,</div><div class='add'>+				  qcq-&gt;q_base, qcq-&gt;q_base_pa);</div><div class='add'>+</div><div class='add'>+	if (qcq-&gt;cq_base)</div><div class='add'>+		dma_free_coherent(dev, qcq-&gt;cq_size,</div><div class='add'>+				  qcq-&gt;cq_base, qcq-&gt;cq_base_pa);</div><div class='add'>+</div><div class='add'>+	vfree(qcq-&gt;cq.info);</div><div class='add'>+	vfree(qcq-&gt;q.info);</div><div class='add'>+</div><div class='add'>+	memset(qcq, 0, sizeof(*qcq));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pdsc_q_map(struct pdsc_queue *q, void *base, dma_addr_t base_pa)</div><div class='add'>+{</div><div class='add'>+	struct pdsc_q_info *cur;</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	q-&gt;base = base;</div><div class='add'>+	q-&gt;base_pa = base_pa;</div><div class='add'>+</div><div class='add'>+	for (i = 0, cur = q-&gt;info; i &lt; q-&gt;num_descs; i++, cur++) {</div><div class='add'>+		cur-&gt;desc = base + (i * q-&gt;desc_size);</div><div class='add'>+		init_completion(&amp;cur-&gt;completion);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pdsc_cq_map(struct pdsc_cq *cq, void *base, dma_addr_t base_pa)</div><div class='add'>+{</div><div class='add'>+	struct pdsc_cq_info *cur;</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	cq-&gt;base = base;</div><div class='add'>+	cq-&gt;base_pa = base_pa;</div><div class='add'>+</div><div class='add'>+	for (i = 0, cur = cq-&gt;info; i &lt; cq-&gt;num_descs; i++, cur++)</div><div class='add'>+		cur-&gt;comp = base + (i * cq-&gt;desc_size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int pdsc_qcq_alloc(struct pdsc *pdsc, unsigned int type, unsigned int index,</div><div class='add'>+		   const char *name, unsigned int flags, unsigned int num_descs,</div><div class='add'>+		   unsigned int desc_size, unsigned int cq_desc_size,</div><div class='add'>+		   unsigned int pid, struct pdsc_qcq *qcq)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = pdsc-&gt;dev;</div><div class='add'>+	void *q_base, *cq_base;</div><div class='add'>+	dma_addr_t cq_base_pa;</div><div class='add'>+	dma_addr_t q_base_pa;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	qcq-&gt;q.info = vcalloc(num_descs, sizeof(*qcq-&gt;q.info));</div><div class='add'>+	if (!qcq-&gt;q.info) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto err_out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	qcq-&gt;pdsc = pdsc;</div><div class='add'>+	qcq-&gt;flags = flags;</div><div class='add'>+	INIT_WORK(&amp;qcq-&gt;work, pdsc_work_thread);</div><div class='add'>+</div><div class='add'>+	qcq-&gt;q.type = type;</div><div class='add'>+	qcq-&gt;q.index = index;</div><div class='add'>+	qcq-&gt;q.num_descs = num_descs;</div><div class='add'>+	qcq-&gt;q.desc_size = desc_size;</div><div class='add'>+	qcq-&gt;q.tail_idx = 0;</div><div class='add'>+	qcq-&gt;q.head_idx = 0;</div><div class='add'>+	qcq-&gt;q.pid = pid;</div><div class='add'>+	snprintf(qcq-&gt;q.name, sizeof(qcq-&gt;q.name), "%s%u", name, index);</div><div class='add'>+</div><div class='add'>+	err = pdsc_qcq_intr_alloc(pdsc, qcq);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_out_free_q_info;</div><div class='add'>+</div><div class='add'>+	qcq-&gt;cq.info = vcalloc(num_descs, sizeof(*qcq-&gt;cq.info));</div><div class='add'>+	if (!qcq-&gt;cq.info) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto err_out_free_irq;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	qcq-&gt;cq.num_descs = num_descs;</div><div class='add'>+	qcq-&gt;cq.desc_size = cq_desc_size;</div><div class='add'>+	qcq-&gt;cq.tail_idx = 0;</div><div class='add'>+	qcq-&gt;cq.done_color = 1;</div><div class='add'>+</div><div class='add'>+	if (flags &amp; PDS_CORE_QCQ_F_NOTIFYQ) {</div><div class='add'>+		/* q &amp; cq need to be contiguous in case of notifyq */</div><div class='add'>+		qcq-&gt;q_size = PDS_PAGE_SIZE +</div><div class='add'>+			      ALIGN(num_descs * desc_size, PDS_PAGE_SIZE) +</div><div class='add'>+			      ALIGN(num_descs * cq_desc_size, PDS_PAGE_SIZE);</div><div class='add'>+		qcq-&gt;q_base = dma_alloc_coherent(dev,</div><div class='add'>+						 qcq-&gt;q_size + qcq-&gt;cq_size,</div><div class='add'>+						 &amp;qcq-&gt;q_base_pa,</div><div class='add'>+						 GFP_KERNEL);</div><div class='add'>+		if (!qcq-&gt;q_base) {</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto err_out_free_cq_info;</div><div class='add'>+		}</div><div class='add'>+		q_base = PTR_ALIGN(qcq-&gt;q_base, PDS_PAGE_SIZE);</div><div class='add'>+		q_base_pa = ALIGN(qcq-&gt;q_base_pa, PDS_PAGE_SIZE);</div><div class='add'>+		pdsc_q_map(&amp;qcq-&gt;q, q_base, q_base_pa);</div><div class='add'>+</div><div class='add'>+		cq_base = PTR_ALIGN(q_base +</div><div class='add'>+				    ALIGN(num_descs * desc_size, PDS_PAGE_SIZE),</div><div class='add'>+				    PDS_PAGE_SIZE);</div><div class='add'>+		cq_base_pa = ALIGN(qcq-&gt;q_base_pa +</div><div class='add'>+				   ALIGN(num_descs * desc_size, PDS_PAGE_SIZE),</div><div class='add'>+				   PDS_PAGE_SIZE);</div><div class='add'>+</div><div class='add'>+	} else {</div><div class='add'>+		/* q DMA descriptors */</div><div class='add'>+		qcq-&gt;q_size = PDS_PAGE_SIZE + (num_descs * desc_size);</div><div class='add'>+		qcq-&gt;q_base = dma_alloc_coherent(dev, qcq-&gt;q_size,</div><div class='add'>+						 &amp;qcq-&gt;q_base_pa,</div><div class='add'>+						 GFP_KERNEL);</div><div class='add'>+		if (!qcq-&gt;q_base) {</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto err_out_free_cq_info;</div><div class='add'>+		}</div><div class='add'>+		q_base = PTR_ALIGN(qcq-&gt;q_base, PDS_PAGE_SIZE);</div><div class='add'>+		q_base_pa = ALIGN(qcq-&gt;q_base_pa, PDS_PAGE_SIZE);</div><div class='add'>+		pdsc_q_map(&amp;qcq-&gt;q, q_base, q_base_pa);</div><div class='add'>+</div><div class='add'>+		/* cq DMA descriptors */</div><div class='add'>+		qcq-&gt;cq_size = PDS_PAGE_SIZE + (num_descs * cq_desc_size);</div><div class='add'>+		qcq-&gt;cq_base = dma_alloc_coherent(dev, qcq-&gt;cq_size,</div><div class='add'>+						  &amp;qcq-&gt;cq_base_pa,</div><div class='add'>+						  GFP_KERNEL);</div><div class='add'>+		if (!qcq-&gt;cq_base) {</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto err_out_free_q;</div><div class='add'>+		}</div><div class='add'>+		cq_base = PTR_ALIGN(qcq-&gt;cq_base, PDS_PAGE_SIZE);</div><div class='add'>+		cq_base_pa = ALIGN(qcq-&gt;cq_base_pa, PDS_PAGE_SIZE);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pdsc_cq_map(&amp;qcq-&gt;cq, cq_base, cq_base_pa);</div><div class='add'>+	qcq-&gt;cq.bound_q = &amp;qcq-&gt;q;</div><div class='add'>+</div><div class='add'>+	pdsc_debugfs_add_qcq(pdsc, qcq);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_out_free_q:</div><div class='add'>+	dma_free_coherent(dev, qcq-&gt;q_size, qcq-&gt;q_base, qcq-&gt;q_base_pa);</div><div class='add'>+err_out_free_cq_info:</div><div class='add'>+	vfree(qcq-&gt;cq.info);</div><div class='add'>+err_out_free_irq:</div><div class='add'>+	pdsc_qcq_intr_free(pdsc, qcq);</div><div class='add'>+err_out_free_q_info:</div><div class='add'>+	vfree(qcq-&gt;q.info);</div><div class='add'>+	memset(qcq, 0, sizeof(*qcq));</div><div class='add'>+err_out:</div><div class='add'>+	dev_err(dev, "qcq alloc of %s%d failed %d\n", name, index, err);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pdsc_core_uninit(struct pdsc *pdsc)</div><div class='add'>+{</div><div class='add'>+	pdsc_qcq_free(pdsc, &amp;pdsc-&gt;notifyqcq);</div><div class='add'>+	pdsc_qcq_free(pdsc, &amp;pdsc-&gt;adminqcq);</div><div class='add'>+</div><div class='add'>+	if (pdsc-&gt;kern_dbpage) {</div><div class='add'>+		iounmap(pdsc-&gt;kern_dbpage);</div><div class='add'>+		pdsc-&gt;kern_dbpage = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pdsc_core_init(struct pdsc *pdsc)</div><div class='add'>+{</div><div class='add'>+	union pds_core_dev_comp comp = {};</div><div class='add'>+	union pds_core_dev_cmd cmd = {</div><div class='add'>+		.init.opcode = PDS_CORE_CMD_INIT,</div><div class='add'>+	};</div><div class='add'>+	struct pds_core_dev_init_data_out cido;</div><div class='add'>+	struct pds_core_dev_init_data_in cidi;</div><div class='add'>+	u32 dbid_count;</div><div class='add'>+	u32 dbpage_num;</div><div class='add'>+	int numdescs;</div><div class='add'>+	size_t sz;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	numdescs = PDSC_ADMINQ_MAX_LENGTH;</div><div class='add'>+	err = pdsc_qcq_alloc(pdsc, PDS_CORE_QTYPE_ADMINQ, 0, "adminq",</div><div class='add'>+			     PDS_CORE_QCQ_F_CORE | PDS_CORE_QCQ_F_INTR,</div><div class='add'>+			     numdescs,</div><div class='add'>+			     sizeof(union pds_core_adminq_cmd),</div><div class='add'>+			     sizeof(union pds_core_adminq_comp),</div><div class='add'>+			     0, &amp;pdsc-&gt;adminqcq);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = pdsc_qcq_alloc(pdsc, PDS_CORE_QTYPE_NOTIFYQ, 0, "notifyq",</div><div class='add'>+			     PDS_CORE_QCQ_F_NOTIFYQ,</div><div class='add'>+			     PDSC_NOTIFYQ_LENGTH,</div><div class='add'>+			     sizeof(struct pds_core_notifyq_cmd),</div><div class='add'>+			     sizeof(union pds_core_notifyq_comp),</div><div class='add'>+			     0, &amp;pdsc-&gt;notifyqcq);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_out_uninit;</div><div class='add'>+</div><div class='add'>+	cidi.adminq_q_base = cpu_to_le64(pdsc-&gt;adminqcq.q_base_pa);</div><div class='add'>+	cidi.adminq_cq_base = cpu_to_le64(pdsc-&gt;adminqcq.cq_base_pa);</div><div class='add'>+	cidi.notifyq_cq_base = cpu_to_le64(pdsc-&gt;notifyqcq.cq.base_pa);</div><div class='add'>+	cidi.flags = cpu_to_le32(PDS_CORE_QINIT_F_IRQ | PDS_CORE_QINIT_F_ENA);</div><div class='add'>+	cidi.intr_index = cpu_to_le16(pdsc-&gt;adminqcq.intx);</div><div class='add'>+	cidi.adminq_ring_size = ilog2(pdsc-&gt;adminqcq.q.num_descs);</div><div class='add'>+	cidi.notifyq_ring_size = ilog2(pdsc-&gt;notifyqcq.q.num_descs);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pdsc-&gt;devcmd_lock);</div><div class='add'>+</div><div class='add'>+	sz = min_t(size_t, sizeof(cidi), sizeof(pdsc-&gt;cmd_regs-&gt;data));</div><div class='add'>+	memcpy_toio(&amp;pdsc-&gt;cmd_regs-&gt;data, &amp;cidi, sz);</div><div class='add'>+</div><div class='add'>+	err = pdsc_devcmd_locked(pdsc, &amp;cmd, &amp;comp, pdsc-&gt;devcmd_timeout);</div><div class='add'>+	if (!err) {</div><div class='add'>+		sz = min_t(size_t, sizeof(cido), sizeof(pdsc-&gt;cmd_regs-&gt;data));</div><div class='add'>+		memcpy_fromio(&amp;cido, &amp;pdsc-&gt;cmd_regs-&gt;data, sz);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;pdsc-&gt;devcmd_lock);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(pdsc-&gt;dev, "Device init command failed: %pe\n",</div><div class='add'>+			ERR_PTR(err));</div><div class='add'>+		goto err_out_uninit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pdsc-&gt;hw_index = le32_to_cpu(cido.core_hw_index);</div><div class='add'>+</div><div class='add'>+	dbid_count = le32_to_cpu(pdsc-&gt;dev_ident.ndbpgs_per_lif);</div><div class='add'>+	dbpage_num = pdsc-&gt;hw_index * dbid_count;</div><div class='add'>+	pdsc-&gt;kern_dbpage = pdsc_map_dbpage(pdsc, dbpage_num);</div><div class='add'>+	if (!pdsc-&gt;kern_dbpage) {</div><div class='add'>+		dev_err(pdsc-&gt;dev, "Cannot map dbpage, aborting\n");</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto err_out_uninit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pdsc-&gt;adminqcq.q.hw_type = cido.adminq_hw_type;</div><div class='add'>+	pdsc-&gt;adminqcq.q.hw_index = le32_to_cpu(cido.adminq_hw_index);</div><div class='add'>+	pdsc-&gt;adminqcq.q.dbval = PDS_CORE_DBELL_QID(pdsc-&gt;adminqcq.q.hw_index);</div><div class='add'>+</div><div class='add'>+	pdsc-&gt;notifyqcq.q.hw_type = cido.notifyq_hw_type;</div><div class='add'>+	pdsc-&gt;notifyqcq.q.hw_index = le32_to_cpu(cido.notifyq_hw_index);</div><div class='add'>+	pdsc-&gt;notifyqcq.q.dbval = PDS_CORE_DBELL_QID(pdsc-&gt;notifyqcq.q.hw_index);</div><div class='add'>+</div><div class='add'>+	pdsc-&gt;last_eid = 0;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_out_uninit:</div><div class='add'>+	pdsc_core_uninit(pdsc);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct pdsc_viftype pdsc_viftype_defaults[] = {</div><div class='add'>+	[PDS_DEV_TYPE_FWCTL] = { .name = PDS_DEV_TYPE_FWCTL_STR,</div><div class='add'>+				 .enabled = true,</div><div class='add'>+				 .vif_id = PDS_DEV_TYPE_FWCTL,</div><div class='add'>+				 .dl_id = -1 },</div><div class='add'>+	[PDS_DEV_TYPE_VDPA] = { .name = PDS_DEV_TYPE_VDPA_STR,</div><div class='add'>+				.vif_id = PDS_DEV_TYPE_VDPA,</div><div class='add'>+				.dl_id = DEVLINK_PARAM_GENERIC_ID_ENABLE_VNET },</div><div class='add'>+	[PDS_DEV_TYPE_MAX] = {}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int pdsc_viftypes_init(struct pdsc *pdsc)</div><div class='add'>+{</div><div class='add'>+	enum pds_core_vif_types vt;</div><div class='add'>+</div><div class='add'>+	pdsc-&gt;viftype_status = kcalloc(ARRAY_SIZE(pdsc_viftype_defaults),</div><div class='add'>+				       sizeof(*pdsc-&gt;viftype_status),</div><div class='add'>+				       GFP_KERNEL);</div><div class='add'>+	if (!pdsc-&gt;viftype_status)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	for (vt = 0; vt &lt; PDS_DEV_TYPE_MAX; vt++) {</div><div class='add'>+		bool vt_support;</div><div class='add'>+</div><div class='add'>+		if (!pdsc_viftype_defaults[vt].name)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* Grab the defaults */</div><div class='add'>+		pdsc-&gt;viftype_status[vt] = pdsc_viftype_defaults[vt];</div><div class='add'>+</div><div class='add'>+		/* See what the Core device has for support */</div><div class='add'>+		vt_support = !!le16_to_cpu(pdsc-&gt;dev_ident.vif_types[vt]);</div><div class='add'>+</div><div class='add'>+		dev_dbg(pdsc-&gt;dev, "VIF %s is %ssupported\n",</div><div class='add'>+			pdsc-&gt;viftype_status[vt].name,</div><div class='add'>+			vt_support ? "" : "not ");</div><div class='add'>+</div><div class='add'>+		pdsc-&gt;viftype_status[vt].supported = vt_support;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int pdsc_setup(struct pdsc *pdsc, bool init)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = pdsc_dev_init(pdsc);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Set up the Core with the AdminQ and NotifyQ info */</div><div class='add'>+	err = pdsc_core_init(pdsc);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_out_teardown;</div><div class='add'>+</div><div class='add'>+	/* Set up the VIFs */</div><div class='add'>+	if (init) {</div><div class='add'>+		err = pdsc_viftypes_init(pdsc);</div><div class='add'>+		if (err)</div><div class='add'>+			goto err_out_teardown;</div><div class='add'>+</div><div class='add'>+		pdsc_debugfs_add_viftype(pdsc);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	refcount_set(&amp;pdsc-&gt;adminq_refcnt, 1);</div><div class='add'>+	clear_bit(PDSC_S_FW_DEAD, &amp;pdsc-&gt;state);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_out_teardown:</div><div class='add'>+	pdsc_teardown(pdsc, init);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void pdsc_teardown(struct pdsc *pdsc, bool removing)</div><div class='add'>+{</div><div class='add'>+	if (!pdsc-&gt;pdev-&gt;is_virtfn)</div><div class='add'>+		pdsc_devcmd_reset(pdsc);</div><div class='add'>+	if (pdsc-&gt;adminqcq.work.func)</div><div class='add'>+		cancel_work_sync(&amp;pdsc-&gt;adminqcq.work);</div><div class='add'>+</div><div class='add'>+	pdsc_core_uninit(pdsc);</div><div class='add'>+</div><div class='add'>+	if (removing) {</div><div class='add'>+		kfree(pdsc-&gt;viftype_status);</div><div class='add'>+		pdsc-&gt;viftype_status = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pdsc_dev_uninit(pdsc);</div><div class='add'>+</div><div class='add'>+	set_bit(PDSC_S_FW_DEAD, &amp;pdsc-&gt;state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int pdsc_start(struct pdsc *pdsc)</div><div class='add'>+{</div><div class='add'>+	pds_core_intr_mask(&amp;pdsc-&gt;intr_ctrl[pdsc-&gt;adminqcq.intx],</div><div class='add'>+			   PDS_CORE_INTR_MASK_CLEAR);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void pdsc_stop(struct pdsc *pdsc)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!pdsc-&gt;intr_info)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Mask interrupts that are in use */</div><div class='add'>+	for (i = 0; i &lt; pdsc-&gt;nintrs; i++)</div><div class='add'>+		if (pdsc-&gt;intr_info[i].vector)</div><div class='add'>+			pds_core_intr_mask(&amp;pdsc-&gt;intr_ctrl[i],</div><div class='add'>+					   PDS_CORE_INTR_MASK_SET);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pdsc_adminq_wait_and_dec_once_unused(struct pdsc *pdsc)</div><div class='add'>+{</div><div class='add'>+	/* The driver initializes the adminq_refcnt to 1 when the adminq is</div><div class='add'>+	 * allocated and ready for use. Other users/requesters will increment</div><div class='add'>+	 * the refcnt while in use. If the refcnt is down to 1 then the adminq</div><div class='add'>+	 * is not in use and the refcnt can be cleared and adminq freed. Before</div><div class='add'>+	 * calling this function the driver will set PDSC_S_FW_DEAD, which</div><div class='add'>+	 * prevent subsequent attempts to use the adminq and increment the</div><div class='add'>+	 * refcnt to fail. This guarantees that this function will eventually</div><div class='add'>+	 * exit.</div><div class='add'>+	 */</div><div class='add'>+	while (!refcount_dec_if_one(&amp;pdsc-&gt;adminq_refcnt)) {</div><div class='add'>+		dev_dbg_ratelimited(pdsc-&gt;dev, "%s: adminq in use\n",</div><div class='add'>+				    __func__);</div><div class='add'>+		cpu_relax();</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void pdsc_fw_down(struct pdsc *pdsc)</div><div class='add'>+{</div><div class='add'>+	union pds_core_notifyq_comp reset_event = {</div><div class='add'>+		.reset.ecode = cpu_to_le16(PDS_EVENT_RESET),</div><div class='add'>+		.reset.state = 0,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	if (test_and_set_bit(PDSC_S_FW_DEAD, &amp;pdsc-&gt;state)) {</div><div class='add'>+		dev_warn(pdsc-&gt;dev, "%s: already happening\n", __func__);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pdsc-&gt;pdev-&gt;is_virtfn)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	pdsc_adminq_wait_and_dec_once_unused(pdsc);</div><div class='add'>+</div><div class='add'>+	/* Notify clients of fw_down */</div><div class='add'>+	if (pdsc-&gt;fw_reporter)</div><div class='add'>+		devlink_health_report(pdsc-&gt;fw_reporter, "FW down reported", pdsc);</div><div class='add'>+	pdsc_notify(PDS_EVENT_RESET, &amp;reset_event);</div><div class='add'>+</div><div class='add'>+	pdsc_stop(pdsc);</div><div class='add'>+	pdsc_teardown(pdsc, PDSC_TEARDOWN_RECOVERY);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void pdsc_fw_up(struct pdsc *pdsc)</div><div class='add'>+{</div><div class='add'>+	union pds_core_notifyq_comp reset_event = {</div><div class='add'>+		.reset.ecode = cpu_to_le16(PDS_EVENT_RESET),</div><div class='add'>+		.reset.state = 1,</div><div class='add'>+	};</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!test_bit(PDSC_S_FW_DEAD, &amp;pdsc-&gt;state)) {</div><div class='add'>+		dev_err(pdsc-&gt;dev, "%s: fw not dead\n", __func__);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pdsc-&gt;pdev-&gt;is_virtfn) {</div><div class='add'>+		clear_bit(PDSC_S_FW_DEAD, &amp;pdsc-&gt;state);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = pdsc_setup(pdsc, PDSC_SETUP_RECOVERY);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_out;</div><div class='add'>+</div><div class='add'>+	err = pdsc_start(pdsc);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_out;</div><div class='add'>+</div><div class='add'>+	/* Notify clients of fw_up */</div><div class='add'>+	pdsc-&gt;fw_recoveries++;</div><div class='add'>+	if (pdsc-&gt;fw_reporter)</div><div class='add'>+		devlink_health_reporter_state_update(pdsc-&gt;fw_reporter,</div><div class='add'>+						     DEVLINK_HEALTH_REPORTER_STATE_HEALTHY);</div><div class='add'>+	pdsc_notify(PDS_EVENT_RESET, &amp;reset_event);</div><div class='add'>+</div><div class='add'>+	return;</div><div class='add'>+</div><div class='add'>+err_out:</div><div class='add'>+	pdsc_teardown(pdsc, PDSC_TEARDOWN_RECOVERY);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void pdsc_pci_reset_thread(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct pdsc *pdsc = container_of(work, struct pdsc, pci_reset_work);</div><div class='add'>+	struct pci_dev *pdev = pdsc-&gt;pdev;</div><div class='add'>+</div><div class='add'>+	pci_dev_get(pdev);</div><div class='add'>+	pci_reset_function(pdev);</div><div class='add'>+	pci_dev_put(pdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pdsc_check_pci_health(struct pdsc *pdsc)</div><div class='add'>+{</div><div class='add'>+	u8 fw_status;</div><div class='add'>+</div><div class='add'>+	/* some sort of teardown already in progress */</div><div class='add'>+	if (!pdsc-&gt;info_regs)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	fw_status = ioread8(&amp;pdsc-&gt;info_regs-&gt;fw_status);</div><div class='add'>+</div><div class='add'>+	/* is PCI broken? */</div><div class='add'>+	if (fw_status != PDS_RC_BAD_PCI)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* prevent deadlock between pdsc_reset_prepare and pdsc_health_thread */</div><div class='add'>+	queue_work(pdsc-&gt;wq, &amp;pdsc-&gt;pci_reset_work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void pdsc_health_thread(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct pdsc *pdsc = container_of(work, struct pdsc, health_work);</div><div class='add'>+	unsigned long mask;</div><div class='add'>+	bool healthy;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pdsc-&gt;config_lock);</div><div class='add'>+</div><div class='add'>+	/* Don't do a check when in a transition state */</div><div class='add'>+	mask = BIT_ULL(PDSC_S_INITING_DRIVER) |</div><div class='add'>+	       BIT_ULL(PDSC_S_STOPPING_DRIVER);</div><div class='add'>+	if (pdsc-&gt;state &amp; mask)</div><div class='add'>+		goto out_unlock;</div><div class='add'>+</div><div class='add'>+	healthy = pdsc_is_fw_good(pdsc);</div><div class='add'>+	dev_dbg(pdsc-&gt;dev, "%s: health %d fw_status %#02x fw_heartbeat %d\n",</div><div class='add'>+		__func__, healthy, pdsc-&gt;fw_status, pdsc-&gt;last_hb);</div><div class='add'>+</div><div class='add'>+	if (test_bit(PDSC_S_FW_DEAD, &amp;pdsc-&gt;state)) {</div><div class='add'>+		if (healthy)</div><div class='add'>+			pdsc_fw_up(pdsc);</div><div class='add'>+	} else {</div><div class='add'>+		if (!healthy)</div><div class='add'>+			pdsc_fw_down(pdsc);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pdsc_check_pci_health(pdsc);</div><div class='add'>+</div><div class='add'>+	pdsc-&gt;fw_generation = pdsc-&gt;fw_status &amp; PDS_CORE_FW_STS_F_GENERATION;</div><div class='add'>+</div><div class='add'>+out_unlock:</div><div class='add'>+	mutex_unlock(&amp;pdsc-&gt;config_lock);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/amd/pds_core/core.h b/drivers/net/ethernet/amd/pds_core/core.h<br/>new file mode 100644<br/>index 000000000000..4a6b35c84dab<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/pds_core/core.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/pds_core/core.h</a></div><div class='hunk'>@@ -0,0 +1,325 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0 */</div><div class='add'>+/* Copyright(c) 2023 Advanced Micro Devices, Inc */</div><div class='add'>+</div><div class='add'>+#ifndef _PDSC_H_</div><div class='add'>+#define _PDSC_H_</div><div class='add'>+</div><div class='add'>+#include &lt;linux/debugfs.h&gt;</div><div class='add'>+#include &lt;net/devlink.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/pds/pds_common.h&gt;</div><div class='add'>+#include &lt;linux/pds/pds_core_if.h&gt;</div><div class='add'>+#include &lt;linux/pds/pds_adminq.h&gt;</div><div class='add'>+#include &lt;linux/pds/pds_intr.h&gt;</div><div class='add'>+</div><div class='add'>+#define PDSC_DRV_DESCRIPTION	"AMD/Pensando Core Driver"</div><div class='add'>+</div><div class='add'>+#define PDSC_WATCHDOG_SECS	5</div><div class='add'>+#define PDSC_QUEUE_NAME_MAX_SZ  16</div><div class='add'>+#define PDSC_ADMINQ_MAX_LENGTH	16	/* must be a power of two */</div><div class='add'>+#define PDSC_NOTIFYQ_LENGTH	64	/* must be a power of two */</div><div class='add'>+#define PDSC_TEARDOWN_RECOVERY	false</div><div class='add'>+#define PDSC_TEARDOWN_REMOVING	true</div><div class='add'>+#define PDSC_SETUP_RECOVERY	false</div><div class='add'>+#define PDSC_SETUP_INIT		true</div><div class='add'>+</div><div class='add'>+struct pdsc_dev_bar {</div><div class='add'>+	void __iomem *vaddr;</div><div class='add'>+	phys_addr_t bus_addr;</div><div class='add'>+	unsigned long len;</div><div class='add'>+	int res_index;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct pdsc;</div><div class='add'>+</div><div class='add'>+struct pdsc_vf {</div><div class='add'>+	struct pds_auxiliary_dev *padev;</div><div class='add'>+	struct pdsc *vf;</div><div class='add'>+	u16     index;</div><div class='add'>+	__le16  vif_types[PDS_DEV_TYPE_MAX];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct pdsc_devinfo {</div><div class='add'>+	u8 asic_type;</div><div class='add'>+	u8 asic_rev;</div><div class='add'>+	char fw_version[PDS_CORE_DEVINFO_FWVERS_BUFLEN + 1];</div><div class='add'>+	char serial_num[PDS_CORE_DEVINFO_SERIAL_BUFLEN + 1];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct pdsc_queue {</div><div class='add'>+	struct pdsc_q_info *info;</div><div class='add'>+	u64 dbval;</div><div class='add'>+	u16 head_idx;</div><div class='add'>+	u16 tail_idx;</div><div class='add'>+	u8 hw_type;</div><div class='add'>+	unsigned int index;</div><div class='add'>+	unsigned int num_descs;</div><div class='add'>+	u64 dbell_count;</div><div class='add'>+	u64 features;</div><div class='add'>+	unsigned int type;</div><div class='add'>+	unsigned int hw_index;</div><div class='add'>+	union {</div><div class='add'>+		void *base;</div><div class='add'>+		struct pds_core_admin_cmd *adminq;</div><div class='add'>+	};</div><div class='add'>+	dma_addr_t base_pa;	/* must be page aligned */</div><div class='add'>+	unsigned int desc_size;</div><div class='add'>+	unsigned int pid;</div><div class='add'>+	char name[PDSC_QUEUE_NAME_MAX_SZ];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define PDSC_INTR_NAME_MAX_SZ		32</div><div class='add'>+</div><div class='add'>+struct pdsc_intr_info {</div><div class='add'>+	char name[PDSC_INTR_NAME_MAX_SZ];</div><div class='add'>+	unsigned int index;</div><div class='add'>+	unsigned int vector;</div><div class='add'>+	void *data;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct pdsc_cq_info {</div><div class='add'>+	void *comp;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct pdsc_buf_info {</div><div class='add'>+	struct page *page;</div><div class='add'>+	dma_addr_t dma_addr;</div><div class='add'>+	u32 page_offset;</div><div class='add'>+	u32 len;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct pdsc_q_info {</div><div class='add'>+	union {</div><div class='add'>+		void *desc;</div><div class='add'>+		struct pdsc_admin_cmd *adminq_desc;</div><div class='add'>+	};</div><div class='add'>+	unsigned int bytes;</div><div class='add'>+	unsigned int nbufs;</div><div class='add'>+	struct pdsc_buf_info bufs[PDS_CORE_MAX_FRAGS];</div><div class='add'>+	struct completion completion;</div><div class='add'>+	void *dest;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct pdsc_cq {</div><div class='add'>+	struct pdsc_cq_info *info;</div><div class='add'>+	struct pdsc_queue *bound_q;</div><div class='add'>+	struct pdsc_intr_info *bound_intr;</div><div class='add'>+	u16 tail_idx;</div><div class='add'>+	bool done_color;</div><div class='add'>+	unsigned int num_descs;</div><div class='add'>+	unsigned int desc_size;</div><div class='add'>+	void *base;</div><div class='add'>+	dma_addr_t base_pa;	/* must be page aligned */</div><div class='add'>+} ____cacheline_aligned_in_smp;</div><div class='add'>+</div><div class='add'>+struct pdsc_qcq {</div><div class='add'>+	struct pdsc *pdsc;</div><div class='add'>+	void *q_base;</div><div class='add'>+	dma_addr_t q_base_pa;	/* might not be page aligned */</div><div class='add'>+	void *cq_base;</div><div class='add'>+	dma_addr_t cq_base_pa;	/* might not be page aligned */</div><div class='add'>+	u32 q_size;</div><div class='add'>+	u32 cq_size;</div><div class='add'>+	bool armed;</div><div class='add'>+	unsigned int flags;</div><div class='add'>+</div><div class='add'>+	struct work_struct work;</div><div class='add'>+	struct pdsc_queue q;</div><div class='add'>+	struct pdsc_cq cq;</div><div class='add'>+	int intx;</div><div class='add'>+</div><div class='add'>+	u32 accum_work;</div><div class='add'>+	struct dentry *dentry;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct pdsc_viftype {</div><div class='add'>+	char *name;</div><div class='add'>+	bool supported;</div><div class='add'>+	bool enabled;</div><div class='add'>+	int dl_id;</div><div class='add'>+	int vif_id;</div><div class='add'>+	struct pds_auxiliary_dev *padev;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* No state flags set means we are in a steady running state */</div><div class='add'>+enum pdsc_state_flags {</div><div class='add'>+	PDSC_S_FW_DEAD,		    /* stopped, wait on startup or recovery */</div><div class='add'>+	PDSC_S_INITING_DRIVER,	    /* initial startup from probe */</div><div class='add'>+	PDSC_S_STOPPING_DRIVER,	    /* driver remove */</div><div class='add'>+</div><div class='add'>+	/* leave this as last */</div><div class='add'>+	PDSC_S_STATE_SIZE</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct pdsc {</div><div class='add'>+	struct pci_dev *pdev;</div><div class='add'>+	struct dentry *dentry;</div><div class='add'>+	struct device *dev;</div><div class='add'>+	struct pdsc_dev_bar bars[PDS_CORE_BARS_MAX];</div><div class='add'>+	struct pds_auxiliary_dev *padev;</div><div class='add'>+	struct pdsc_vf *vfs;</div><div class='add'>+	int num_vfs;</div><div class='add'>+	int vf_id;</div><div class='add'>+	int hw_index;</div><div class='add'>+	int uid;</div><div class='add'>+</div><div class='add'>+	unsigned long state;</div><div class='add'>+	u8 fw_status;</div><div class='add'>+	u8 fw_generation;</div><div class='add'>+	unsigned long last_fw_time;</div><div class='add'>+	u32 last_hb;</div><div class='add'>+	struct timer_list wdtimer;</div><div class='add'>+	unsigned int wdtimer_period;</div><div class='add'>+	struct work_struct health_work;</div><div class='add'>+	struct devlink_health_reporter *fw_reporter;</div><div class='add'>+	u32 fw_recoveries;</div><div class='add'>+</div><div class='add'>+	struct pdsc_devinfo dev_info;</div><div class='add'>+	struct pds_core_dev_identity dev_ident;</div><div class='add'>+	unsigned int nintrs;</div><div class='add'>+	struct pdsc_intr_info *intr_info;	/* array of nintrs elements */</div><div class='add'>+</div><div class='add'>+	struct workqueue_struct *wq;</div><div class='add'>+</div><div class='add'>+	unsigned int devcmd_timeout;</div><div class='add'>+	struct mutex devcmd_lock;	/* lock for dev_cmd operations */</div><div class='add'>+	struct mutex config_lock;	/* lock for configuration operations */</div><div class='add'>+	spinlock_t adminq_lock;		/* lock for adminq operations */</div><div class='add'>+	refcount_t adminq_refcnt;</div><div class='add'>+	struct pds_core_dev_info_regs __iomem *info_regs;</div><div class='add'>+	struct pds_core_dev_cmd_regs __iomem *cmd_regs;</div><div class='add'>+	struct pds_core_intr __iomem *intr_ctrl;</div><div class='add'>+	u64 __iomem *intr_status;</div><div class='add'>+	u64 __iomem *db_pages;</div><div class='add'>+	dma_addr_t phy_db_pages;</div><div class='add'>+	u64 __iomem *kern_dbpage;</div><div class='add'>+</div><div class='add'>+	struct pdsc_qcq adminqcq;</div><div class='add'>+	struct pdsc_qcq notifyqcq;</div><div class='add'>+	u64 last_eid;</div><div class='add'>+	struct pdsc_viftype *viftype_status;</div><div class='add'>+	struct work_struct pci_reset_work;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/** enum pds_core_dbell_bits - bitwise composition of dbell values.</div><div class='add'>+ *</div><div class='add'>+ * @PDS_CORE_DBELL_QID_MASK:	unshifted mask of valid queue id bits.</div><div class='add'>+ * @PDS_CORE_DBELL_QID_SHIFT:	queue id shift amount in dbell value.</div><div class='add'>+ * @PDS_CORE_DBELL_QID:		macro to build QID component of dbell value.</div><div class='add'>+ *</div><div class='add'>+ * @PDS_CORE_DBELL_RING_MASK:	unshifted mask of valid ring bits.</div><div class='add'>+ * @PDS_CORE_DBELL_RING_SHIFT:	ring shift amount in dbell value.</div><div class='add'>+ * @PDS_CORE_DBELL_RING:	macro to build ring component of dbell value.</div><div class='add'>+ *</div><div class='add'>+ * @PDS_CORE_DBELL_RING_0:	ring zero dbell component value.</div><div class='add'>+ * @PDS_CORE_DBELL_RING_1:	ring one dbell component value.</div><div class='add'>+ * @PDS_CORE_DBELL_RING_2:	ring two dbell component value.</div><div class='add'>+ * @PDS_CORE_DBELL_RING_3:	ring three dbell component value.</div><div class='add'>+ *</div><div class='add'>+ * @PDS_CORE_DBELL_INDEX_MASK:	bit mask of valid index bits, no shift needed.</div><div class='add'>+ */</div><div class='add'>+enum pds_core_dbell_bits {</div><div class='add'>+	PDS_CORE_DBELL_QID_MASK		= 0xffffff,</div><div class='add'>+	PDS_CORE_DBELL_QID_SHIFT		= 24,</div><div class='add'>+</div><div class='add'>+#define PDS_CORE_DBELL_QID(n) \</div><div class='add'>+	(((u64)(n) &amp; PDS_CORE_DBELL_QID_MASK) &lt;&lt; PDS_CORE_DBELL_QID_SHIFT)</div><div class='add'>+</div><div class='add'>+	PDS_CORE_DBELL_RING_MASK		= 0x7,</div><div class='add'>+	PDS_CORE_DBELL_RING_SHIFT		= 16,</div><div class='add'>+</div><div class='add'>+#define PDS_CORE_DBELL_RING(n) \</div><div class='add'>+	(((u64)(n) &amp; PDS_CORE_DBELL_RING_MASK) &lt;&lt; PDS_CORE_DBELL_RING_SHIFT)</div><div class='add'>+</div><div class='add'>+	PDS_CORE_DBELL_RING_0		= 0,</div><div class='add'>+	PDS_CORE_DBELL_RING_1		= PDS_CORE_DBELL_RING(1),</div><div class='add'>+	PDS_CORE_DBELL_RING_2		= PDS_CORE_DBELL_RING(2),</div><div class='add'>+	PDS_CORE_DBELL_RING_3		= PDS_CORE_DBELL_RING(3),</div><div class='add'>+</div><div class='add'>+	PDS_CORE_DBELL_INDEX_MASK		= 0xffff,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline void pds_core_dbell_ring(u64 __iomem *db_page,</div><div class='add'>+				       enum pds_core_logical_qtype qtype,</div><div class='add'>+				       u64 val)</div><div class='add'>+{</div><div class='add'>+	writeq(val, &amp;db_page[qtype]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int pdsc_fw_reporter_diagnose(struct devlink_health_reporter *reporter,</div><div class='add'>+			      struct devlink_fmsg *fmsg,</div><div class='add'>+			      struct netlink_ext_ack *extack);</div><div class='add'>+int pdsc_dl_info_get(struct devlink *dl, struct devlink_info_req *req,</div><div class='add'>+		     struct netlink_ext_ack *extack);</div><div class='add'>+int pdsc_dl_flash_update(struct devlink *dl,</div><div class='add'>+			 struct devlink_flash_update_params *params,</div><div class='add'>+			 struct netlink_ext_ack *extack);</div><div class='add'>+int pdsc_dl_enable_get(struct devlink *dl, u32 id,</div><div class='add'>+		       struct devlink_param_gset_ctx *ctx,</div><div class='add'>+		       struct netlink_ext_ack *extack);</div><div class='add'>+int pdsc_dl_enable_set(struct devlink *dl, u32 id,</div><div class='add'>+		       struct devlink_param_gset_ctx *ctx,</div><div class='add'>+		       struct netlink_ext_ack *extack);</div><div class='add'>+int pdsc_dl_enable_validate(struct devlink *dl, u32 id,</div><div class='add'>+			    union devlink_param_value val,</div><div class='add'>+			    struct netlink_ext_ack *extack);</div><div class='add'>+</div><div class='add'>+void __iomem *pdsc_map_dbpage(struct pdsc *pdsc, int page_num);</div><div class='add'>+</div><div class='add'>+void pdsc_debugfs_create(void);</div><div class='add'>+void pdsc_debugfs_destroy(void);</div><div class='add'>+void pdsc_debugfs_add_dev(struct pdsc *pdsc);</div><div class='add'>+void pdsc_debugfs_del_dev(struct pdsc *pdsc);</div><div class='add'>+void pdsc_debugfs_add_ident(struct pdsc *pdsc);</div><div class='add'>+void pdsc_debugfs_add_viftype(struct pdsc *pdsc);</div><div class='add'>+void pdsc_debugfs_add_irqs(struct pdsc *pdsc);</div><div class='add'>+void pdsc_debugfs_add_qcq(struct pdsc *pdsc, struct pdsc_qcq *qcq);</div><div class='add'>+void pdsc_debugfs_del_qcq(struct pdsc_qcq *qcq);</div><div class='add'>+</div><div class='add'>+int pdsc_err_to_errno(enum pds_core_status_code code);</div><div class='add'>+bool pdsc_is_fw_running(struct pdsc *pdsc);</div><div class='add'>+bool pdsc_is_fw_good(struct pdsc *pdsc);</div><div class='add'>+int pdsc_devcmd(struct pdsc *pdsc, union pds_core_dev_cmd *cmd,</div><div class='add'>+		union pds_core_dev_comp *comp, int max_seconds);</div><div class='add'>+int pdsc_devcmd_locked(struct pdsc *pdsc, union pds_core_dev_cmd *cmd,</div><div class='add'>+		       union pds_core_dev_comp *comp, int max_seconds);</div><div class='add'>+int pdsc_devcmd_init(struct pdsc *pdsc);</div><div class='add'>+int pdsc_devcmd_reset(struct pdsc *pdsc);</div><div class='add'>+int pdsc_dev_init(struct pdsc *pdsc);</div><div class='add'>+void pdsc_dev_uninit(struct pdsc *pdsc);</div><div class='add'>+</div><div class='add'>+int pdsc_intr_alloc(struct pdsc *pdsc, char *name,</div><div class='add'>+		    irq_handler_t handler, void *data);</div><div class='add'>+void pdsc_intr_free(struct pdsc *pdsc, int index);</div><div class='add'>+void pdsc_qcq_free(struct pdsc *pdsc, struct pdsc_qcq *qcq);</div><div class='add'>+int pdsc_qcq_alloc(struct pdsc *pdsc, unsigned int type, unsigned int index,</div><div class='add'>+		   const char *name, unsigned int flags, unsigned int num_descs,</div><div class='add'>+		   unsigned int desc_size, unsigned int cq_desc_size,</div><div class='add'>+		   unsigned int pid, struct pdsc_qcq *qcq);</div><div class='add'>+int pdsc_setup(struct pdsc *pdsc, bool init);</div><div class='add'>+void pdsc_teardown(struct pdsc *pdsc, bool removing);</div><div class='add'>+int pdsc_start(struct pdsc *pdsc);</div><div class='add'>+void pdsc_stop(struct pdsc *pdsc);</div><div class='add'>+void pdsc_health_thread(struct work_struct *work);</div><div class='add'>+</div><div class='add'>+int pdsc_register_notify(struct notifier_block *nb);</div><div class='add'>+void pdsc_unregister_notify(struct notifier_block *nb);</div><div class='add'>+void pdsc_notify(unsigned long event, void *data);</div><div class='add'>+int pdsc_auxbus_dev_add(struct pdsc *cf, struct pdsc *pf,</div><div class='add'>+			enum pds_core_vif_types vt,</div><div class='add'>+			struct pds_auxiliary_dev **pd_ptr);</div><div class='add'>+void pdsc_auxbus_dev_del(struct pdsc *cf, struct pdsc *pf,</div><div class='add'>+			 struct pds_auxiliary_dev **pd_ptr);</div><div class='add'>+</div><div class='add'>+void pdsc_process_adminq(struct pdsc_qcq *qcq);</div><div class='add'>+void pdsc_work_thread(struct work_struct *work);</div><div class='add'>+irqreturn_t pdsc_adminq_isr(int irq, void *data);</div><div class='add'>+</div><div class='add'>+int pdsc_firmware_update(struct pdsc *pdsc, const struct firmware *fw,</div><div class='add'>+			 struct netlink_ext_ack *extack);</div><div class='add'>+</div><div class='add'>+void pdsc_fw_down(struct pdsc *pdsc);</div><div class='add'>+void pdsc_fw_up(struct pdsc *pdsc);</div><div class='add'>+void pdsc_pci_reset_thread(struct work_struct *work);</div><div class='add'>+</div><div class='add'>+#endif /* _PDSC_H_ */</div><div class='head'>diff --git a/drivers/net/ethernet/amd/pds_core/debugfs.c b/drivers/net/ethernet/amd/pds_core/debugfs.c<br/>new file mode 100644<br/>index 000000000000..04c5e3abd8d7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/pds_core/debugfs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/pds_core/debugfs.c</a></div><div class='hunk'>@@ -0,0 +1,175 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright(c) 2023 Advanced Micro Devices, Inc */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+</div><div class='add'>+#include "core.h"</div><div class='add'>+</div><div class='add'>+static struct dentry *pdsc_dir;</div><div class='add'>+</div><div class='add'>+void pdsc_debugfs_create(void)</div><div class='add'>+{</div><div class='add'>+	pdsc_dir = debugfs_create_dir(PDS_CORE_DRV_NAME, NULL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void pdsc_debugfs_destroy(void)</div><div class='add'>+{</div><div class='add'>+	debugfs_remove_recursive(pdsc_dir);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void pdsc_debugfs_add_dev(struct pdsc *pdsc)</div><div class='add'>+{</div><div class='add'>+	pdsc-&gt;dentry = debugfs_create_dir(pci_name(pdsc-&gt;pdev), pdsc_dir);</div><div class='add'>+</div><div class='add'>+	debugfs_create_ulong("state", 0400, pdsc-&gt;dentry, &amp;pdsc-&gt;state);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void pdsc_debugfs_del_dev(struct pdsc *pdsc)</div><div class='add'>+{</div><div class='add'>+	debugfs_remove_recursive(pdsc-&gt;dentry);</div><div class='add'>+	pdsc-&gt;dentry = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int identity_show(struct seq_file *seq, void *v)</div><div class='add'>+{</div><div class='add'>+	struct pds_core_dev_identity *ident;</div><div class='add'>+	struct pdsc *pdsc = seq-&gt;private;</div><div class='add'>+	int vt;</div><div class='add'>+</div><div class='add'>+	ident = &amp;pdsc-&gt;dev_ident;</div><div class='add'>+</div><div class='add'>+	seq_printf(seq, "fw_heartbeat:     0x%x\n",</div><div class='add'>+		   ioread32(&amp;pdsc-&gt;info_regs-&gt;fw_heartbeat));</div><div class='add'>+</div><div class='add'>+	seq_printf(seq, "nlifs:            %d\n",</div><div class='add'>+		   le32_to_cpu(ident-&gt;nlifs));</div><div class='add'>+	seq_printf(seq, "nintrs:           %d\n",</div><div class='add'>+		   le32_to_cpu(ident-&gt;nintrs));</div><div class='add'>+	seq_printf(seq, "ndbpgs_per_lif:   %d\n",</div><div class='add'>+		   le32_to_cpu(ident-&gt;ndbpgs_per_lif));</div><div class='add'>+	seq_printf(seq, "intr_coal_mult:   %d\n",</div><div class='add'>+		   le32_to_cpu(ident-&gt;intr_coal_mult));</div><div class='add'>+	seq_printf(seq, "intr_coal_div:    %d\n",</div><div class='add'>+		   le32_to_cpu(ident-&gt;intr_coal_div));</div><div class='add'>+</div><div class='add'>+	seq_puts(seq, "vif_types:        ");</div><div class='add'>+	for (vt = 0; vt &lt; PDS_DEV_TYPE_MAX; vt++)</div><div class='add'>+		seq_printf(seq, "%d ",</div><div class='add'>+			   le16_to_cpu(pdsc-&gt;dev_ident.vif_types[vt]));</div><div class='add'>+	seq_puts(seq, "\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+DEFINE_SHOW_ATTRIBUTE(identity);</div><div class='add'>+</div><div class='add'>+void pdsc_debugfs_add_ident(struct pdsc *pdsc)</div><div class='add'>+{</div><div class='add'>+	/* This file will already exist in the reset flow */</div><div class='add'>+	if (debugfs_lookup("identity", pdsc-&gt;dentry))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	debugfs_create_file("identity", 0400, pdsc-&gt;dentry,</div><div class='add'>+			    pdsc, &amp;identity_fops);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int viftype_show(struct seq_file *seq, void *v)</div><div class='add'>+{</div><div class='add'>+	struct pdsc *pdsc = seq-&gt;private;</div><div class='add'>+	int vt;</div><div class='add'>+</div><div class='add'>+	for (vt = 0; vt &lt; PDS_DEV_TYPE_MAX; vt++) {</div><div class='add'>+		if (!pdsc-&gt;viftype_status[vt].name)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		seq_printf(seq, "%s\t%d supported %d enabled\n",</div><div class='add'>+			   pdsc-&gt;viftype_status[vt].name,</div><div class='add'>+			   pdsc-&gt;viftype_status[vt].supported,</div><div class='add'>+			   pdsc-&gt;viftype_status[vt].enabled);</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+DEFINE_SHOW_ATTRIBUTE(viftype);</div><div class='add'>+</div><div class='add'>+void pdsc_debugfs_add_viftype(struct pdsc *pdsc)</div><div class='add'>+{</div><div class='add'>+	debugfs_create_file("viftypes", 0400, pdsc-&gt;dentry,</div><div class='add'>+			    pdsc, &amp;viftype_fops);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct debugfs_reg32 intr_ctrl_regs[] = {</div><div class='add'>+	{ .name = "coal_init", .offset = 0, },</div><div class='add'>+	{ .name = "mask", .offset = 4, },</div><div class='add'>+	{ .name = "credits", .offset = 8, },</div><div class='add'>+	{ .name = "mask_on_assert", .offset = 12, },</div><div class='add'>+	{ .name = "coal_timer", .offset = 16, },</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void pdsc_debugfs_add_qcq(struct pdsc *pdsc, struct pdsc_qcq *qcq)</div><div class='add'>+{</div><div class='add'>+	struct dentry *qcq_dentry, *q_dentry, *cq_dentry, *intr_dentry;</div><div class='add'>+	struct debugfs_regset32 *intr_ctrl_regset;</div><div class='add'>+	struct pdsc_queue *q = &amp;qcq-&gt;q;</div><div class='add'>+	struct pdsc_cq *cq = &amp;qcq-&gt;cq;</div><div class='add'>+</div><div class='add'>+	qcq_dentry = debugfs_create_dir(q-&gt;name, pdsc-&gt;dentry);</div><div class='add'>+	if (IS_ERR(qcq_dentry))</div><div class='add'>+		return;</div><div class='add'>+	qcq-&gt;dentry = qcq_dentry;</div><div class='add'>+</div><div class='add'>+	debugfs_create_x64("q_base_pa", 0400, qcq_dentry, &amp;qcq-&gt;q_base_pa);</div><div class='add'>+	debugfs_create_x32("q_size", 0400, qcq_dentry, &amp;qcq-&gt;q_size);</div><div class='add'>+	debugfs_create_x64("cq_base_pa", 0400, qcq_dentry, &amp;qcq-&gt;cq_base_pa);</div><div class='add'>+	debugfs_create_x32("cq_size", 0400, qcq_dentry, &amp;qcq-&gt;cq_size);</div><div class='add'>+	debugfs_create_x32("accum_work", 0400, qcq_dentry, &amp;qcq-&gt;accum_work);</div><div class='add'>+</div><div class='add'>+	q_dentry = debugfs_create_dir("q", qcq-&gt;dentry);</div><div class='add'>+	if (IS_ERR(q_dentry))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	debugfs_create_u32("index", 0400, q_dentry, &amp;q-&gt;index);</div><div class='add'>+	debugfs_create_u32("num_descs", 0400, q_dentry, &amp;q-&gt;num_descs);</div><div class='add'>+	debugfs_create_u32("desc_size", 0400, q_dentry, &amp;q-&gt;desc_size);</div><div class='add'>+	debugfs_create_u32("pid", 0400, q_dentry, &amp;q-&gt;pid);</div><div class='add'>+</div><div class='add'>+	debugfs_create_u16("tail", 0400, q_dentry, &amp;q-&gt;tail_idx);</div><div class='add'>+	debugfs_create_u16("head", 0400, q_dentry, &amp;q-&gt;head_idx);</div><div class='add'>+</div><div class='add'>+	cq_dentry = debugfs_create_dir("cq", qcq-&gt;dentry);</div><div class='add'>+	if (IS_ERR(cq_dentry))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	debugfs_create_x64("base_pa", 0400, cq_dentry, &amp;cq-&gt;base_pa);</div><div class='add'>+	debugfs_create_u32("num_descs", 0400, cq_dentry, &amp;cq-&gt;num_descs);</div><div class='add'>+	debugfs_create_u32("desc_size", 0400, cq_dentry, &amp;cq-&gt;desc_size);</div><div class='add'>+	debugfs_create_bool("done_color", 0400, cq_dentry, &amp;cq-&gt;done_color);</div><div class='add'>+	debugfs_create_u16("tail", 0400, cq_dentry, &amp;cq-&gt;tail_idx);</div><div class='add'>+</div><div class='add'>+	if (qcq-&gt;flags &amp; PDS_CORE_QCQ_F_INTR) {</div><div class='add'>+		struct pdsc_intr_info *intr = &amp;pdsc-&gt;intr_info[qcq-&gt;intx];</div><div class='add'>+</div><div class='add'>+		intr_dentry = debugfs_create_dir("intr", qcq-&gt;dentry);</div><div class='add'>+		if (IS_ERR(intr_dentry))</div><div class='add'>+			return;</div><div class='add'>+</div><div class='add'>+		debugfs_create_u32("index", 0400, intr_dentry, &amp;intr-&gt;index);</div><div class='add'>+		debugfs_create_u32("vector", 0400, intr_dentry, &amp;intr-&gt;vector);</div><div class='add'>+</div><div class='add'>+		intr_ctrl_regset = devm_kzalloc(pdsc-&gt;dev,</div><div class='add'>+						sizeof(*intr_ctrl_regset),</div><div class='add'>+						GFP_KERNEL);</div><div class='add'>+		if (!intr_ctrl_regset)</div><div class='add'>+			return;</div><div class='add'>+		intr_ctrl_regset-&gt;regs = intr_ctrl_regs;</div><div class='add'>+		intr_ctrl_regset-&gt;nregs = ARRAY_SIZE(intr_ctrl_regs);</div><div class='add'>+		intr_ctrl_regset-&gt;base = &amp;pdsc-&gt;intr_ctrl[intr-&gt;index];</div><div class='add'>+</div><div class='add'>+		debugfs_create_regset32("intr_ctrl", 0400, intr_dentry,</div><div class='add'>+					intr_ctrl_regset);</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void pdsc_debugfs_del_qcq(struct pdsc_qcq *qcq)</div><div class='add'>+{</div><div class='add'>+	debugfs_remove_recursive(qcq-&gt;dentry);</div><div class='add'>+	qcq-&gt;dentry = NULL;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/amd/pds_core/dev.c b/drivers/net/ethernet/amd/pds_core/dev.c<br/>new file mode 100644<br/>index 000000000000..495ef4ef8c10<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/pds_core/dev.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/pds_core/dev.c</a></div><div class='hunk'>@@ -0,0 +1,382 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright(c) 2023 Advanced Micro Devices, Inc */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/errno.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/utsname.h&gt;</div><div class='add'>+</div><div class='add'>+#include "core.h"</div><div class='add'>+</div><div class='add'>+int pdsc_err_to_errno(enum pds_core_status_code code)</div><div class='add'>+{</div><div class='add'>+	switch (code) {</div><div class='add'>+	case PDS_RC_SUCCESS:</div><div class='add'>+		return 0;</div><div class='add'>+	case PDS_RC_EVERSION:</div><div class='add'>+	case PDS_RC_EQTYPE:</div><div class='add'>+	case PDS_RC_EQID:</div><div class='add'>+	case PDS_RC_EINVAL:</div><div class='add'>+	case PDS_RC_ENOSUPP:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	case PDS_RC_EPERM:</div><div class='add'>+		return -EPERM;</div><div class='add'>+	case PDS_RC_ENOENT:</div><div class='add'>+		return -ENOENT;</div><div class='add'>+	case PDS_RC_EAGAIN:</div><div class='add'>+		return -EAGAIN;</div><div class='add'>+	case PDS_RC_ENOMEM:</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	case PDS_RC_EFAULT:</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	case PDS_RC_EBUSY:</div><div class='add'>+		return -EBUSY;</div><div class='add'>+	case PDS_RC_EEXIST:</div><div class='add'>+		return -EEXIST;</div><div class='add'>+	case PDS_RC_EVFID:</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	case PDS_RC_ECLIENT:</div><div class='add'>+		return -ECHILD;</div><div class='add'>+	case PDS_RC_ENOSPC:</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+	case PDS_RC_ERANGE:</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	case PDS_RC_BAD_ADDR:</div><div class='add'>+		return -EFAULT;</div><div class='add'>+	case PDS_RC_BAD_PCI:</div><div class='add'>+		return -ENXIO;</div><div class='add'>+	case PDS_RC_EOPCODE:</div><div class='add'>+	case PDS_RC_EINTR:</div><div class='add'>+	case PDS_RC_DEV_CMD:</div><div class='add'>+	case PDS_RC_ERROR:</div><div class='add'>+	case PDS_RC_ERDMA:</div><div class='add'>+	case PDS_RC_EIO:</div><div class='add'>+	default:</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool pdsc_is_fw_running(struct pdsc *pdsc)</div><div class='add'>+{</div><div class='add'>+	if (!pdsc-&gt;info_regs)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	pdsc-&gt;fw_status = ioread8(&amp;pdsc-&gt;info_regs-&gt;fw_status);</div><div class='add'>+	pdsc-&gt;last_fw_time = jiffies;</div><div class='add'>+	pdsc-&gt;last_hb = ioread32(&amp;pdsc-&gt;info_regs-&gt;fw_heartbeat);</div><div class='add'>+</div><div class='add'>+	/* Firmware is useful only if the running bit is set and</div><div class='add'>+	 * fw_status != 0xff (bad PCI read)</div><div class='add'>+	 */</div><div class='add'>+	return (pdsc-&gt;fw_status != PDS_RC_BAD_PCI) &amp;&amp;</div><div class='add'>+		(pdsc-&gt;fw_status &amp; PDS_CORE_FW_STS_F_RUNNING);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool pdsc_is_fw_good(struct pdsc *pdsc)</div><div class='add'>+{</div><div class='add'>+	bool fw_running = pdsc_is_fw_running(pdsc);</div><div class='add'>+	u8 gen;</div><div class='add'>+</div><div class='add'>+	/* Make sure to update the cached fw_status by calling</div><div class='add'>+	 * pdsc_is_fw_running() before getting the generation</div><div class='add'>+	 */</div><div class='add'>+	gen = pdsc-&gt;fw_status &amp; PDS_CORE_FW_STS_F_GENERATION;</div><div class='add'>+</div><div class='add'>+	return fw_running &amp;&amp; gen == pdsc-&gt;fw_generation;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u8 pdsc_devcmd_status(struct pdsc *pdsc)</div><div class='add'>+{</div><div class='add'>+	return ioread8(&amp;pdsc-&gt;cmd_regs-&gt;comp.status);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool pdsc_devcmd_done(struct pdsc *pdsc)</div><div class='add'>+{</div><div class='add'>+	return ioread32(&amp;pdsc-&gt;cmd_regs-&gt;done) &amp; PDS_CORE_DEV_CMD_DONE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pdsc_devcmd_dbell(struct pdsc *pdsc)</div><div class='add'>+{</div><div class='add'>+	iowrite32(0, &amp;pdsc-&gt;cmd_regs-&gt;done);</div><div class='add'>+	iowrite32(1, &amp;pdsc-&gt;cmd_regs-&gt;doorbell);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pdsc_devcmd_clean(struct pdsc *pdsc)</div><div class='add'>+{</div><div class='add'>+	iowrite32(0, &amp;pdsc-&gt;cmd_regs-&gt;doorbell);</div><div class='add'>+	memset_io(&amp;pdsc-&gt;cmd_regs-&gt;cmd, 0, sizeof(pdsc-&gt;cmd_regs-&gt;cmd));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char *pdsc_devcmd_str(int opcode)</div><div class='add'>+{</div><div class='add'>+	switch (opcode) {</div><div class='add'>+	case PDS_CORE_CMD_NOP:</div><div class='add'>+		return "PDS_CORE_CMD_NOP";</div><div class='add'>+	case PDS_CORE_CMD_IDENTIFY:</div><div class='add'>+		return "PDS_CORE_CMD_IDENTIFY";</div><div class='add'>+	case PDS_CORE_CMD_RESET:</div><div class='add'>+		return "PDS_CORE_CMD_RESET";</div><div class='add'>+	case PDS_CORE_CMD_INIT:</div><div class='add'>+		return "PDS_CORE_CMD_INIT";</div><div class='add'>+	case PDS_CORE_CMD_FW_DOWNLOAD:</div><div class='add'>+		return "PDS_CORE_CMD_FW_DOWNLOAD";</div><div class='add'>+	case PDS_CORE_CMD_FW_CONTROL:</div><div class='add'>+		return "PDS_CORE_CMD_FW_CONTROL";</div><div class='add'>+	default:</div><div class='add'>+		return "PDS_CORE_CMD_UNKNOWN";</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pdsc_devcmd_wait(struct pdsc *pdsc, u8 opcode, int max_seconds)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = pdsc-&gt;dev;</div><div class='add'>+	unsigned long start_time;</div><div class='add'>+	unsigned long max_wait;</div><div class='add'>+	unsigned long duration;</div><div class='add'>+	int timeout = 0;</div><div class='add'>+	bool running;</div><div class='add'>+	int done = 0;</div><div class='add'>+	int err = 0;</div><div class='add'>+	int status;</div><div class='add'>+</div><div class='add'>+	start_time = jiffies;</div><div class='add'>+	max_wait = start_time + (max_seconds * HZ);</div><div class='add'>+</div><div class='add'>+	while (!done &amp;&amp; !timeout) {</div><div class='add'>+		running = pdsc_is_fw_running(pdsc);</div><div class='add'>+		if (!running)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		done = pdsc_devcmd_done(pdsc);</div><div class='add'>+		if (done)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		timeout = time_after(jiffies, max_wait);</div><div class='add'>+		if (timeout)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		usleep_range(100, 200);</div><div class='add'>+	}</div><div class='add'>+	duration = jiffies - start_time;</div><div class='add'>+</div><div class='add'>+	if (done &amp;&amp; duration &gt; HZ)</div><div class='add'>+		dev_dbg(dev, "DEVCMD %d %s after %ld secs\n",</div><div class='add'>+			opcode, pdsc_devcmd_str(opcode), duration / HZ);</div><div class='add'>+</div><div class='add'>+	if ((!done || timeout) &amp;&amp; running) {</div><div class='add'>+		dev_err(dev, "DEVCMD %d %s timeout, done %d timeout %d max_seconds=%d\n",</div><div class='add'>+			opcode, pdsc_devcmd_str(opcode), done, timeout,</div><div class='add'>+			max_seconds);</div><div class='add'>+		err = -ETIMEDOUT;</div><div class='add'>+		pdsc_devcmd_clean(pdsc);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	status = pdsc_devcmd_status(pdsc);</div><div class='add'>+	err = pdsc_err_to_errno(status);</div><div class='add'>+	if (err &amp;&amp; err != -EAGAIN)</div><div class='add'>+		dev_err(dev, "DEVCMD %d %s failed, status=%d err %d %pe\n",</div><div class='add'>+			opcode, pdsc_devcmd_str(opcode), status, err,</div><div class='add'>+			ERR_PTR(err));</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int pdsc_devcmd_locked(struct pdsc *pdsc, union pds_core_dev_cmd *cmd,</div><div class='add'>+		       union pds_core_dev_comp *comp, int max_seconds)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!pdsc-&gt;cmd_regs)</div><div class='add'>+		return -ENXIO;</div><div class='add'>+</div><div class='add'>+	memcpy_toio(&amp;pdsc-&gt;cmd_regs-&gt;cmd, cmd, sizeof(*cmd));</div><div class='add'>+	pdsc_devcmd_dbell(pdsc);</div><div class='add'>+	err = pdsc_devcmd_wait(pdsc, cmd-&gt;opcode, max_seconds);</div><div class='add'>+</div><div class='add'>+	if ((err == -ENXIO || err == -ETIMEDOUT) &amp;&amp; pdsc-&gt;wq)</div><div class='add'>+		queue_work(pdsc-&gt;wq, &amp;pdsc-&gt;health_work);</div><div class='add'>+	else</div><div class='add'>+		memcpy_fromio(comp, &amp;pdsc-&gt;cmd_regs-&gt;comp, sizeof(*comp));</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int pdsc_devcmd(struct pdsc *pdsc, union pds_core_dev_cmd *cmd,</div><div class='add'>+		union pds_core_dev_comp *comp, int max_seconds)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pdsc-&gt;devcmd_lock);</div><div class='add'>+	err = pdsc_devcmd_locked(pdsc, cmd, comp, max_seconds);</div><div class='add'>+	mutex_unlock(&amp;pdsc-&gt;devcmd_lock);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int pdsc_devcmd_init(struct pdsc *pdsc)</div><div class='add'>+{</div><div class='add'>+	union pds_core_dev_comp comp = {};</div><div class='add'>+	union pds_core_dev_cmd cmd = {</div><div class='add'>+		.opcode = PDS_CORE_CMD_INIT,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return pdsc_devcmd(pdsc, &amp;cmd, &amp;comp, pdsc-&gt;devcmd_timeout);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int pdsc_devcmd_reset(struct pdsc *pdsc)</div><div class='add'>+{</div><div class='add'>+	union pds_core_dev_comp comp = {};</div><div class='add'>+	union pds_core_dev_cmd cmd = {</div><div class='add'>+		.reset.opcode = PDS_CORE_CMD_RESET,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	if (!pdsc_is_fw_running(pdsc))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return pdsc_devcmd(pdsc, &amp;cmd, &amp;comp, pdsc-&gt;devcmd_timeout);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pdsc_devcmd_identify_locked(struct pdsc *pdsc)</div><div class='add'>+{</div><div class='add'>+	union pds_core_dev_comp comp = {};</div><div class='add'>+	union pds_core_dev_cmd cmd = {</div><div class='add'>+		.identify.opcode = PDS_CORE_CMD_IDENTIFY,</div><div class='add'>+		.identify.ver = PDS_CORE_IDENTITY_VERSION_1,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	return pdsc_devcmd_locked(pdsc, &amp;cmd, &amp;comp, pdsc-&gt;devcmd_timeout);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pdsc_init_devinfo(struct pdsc *pdsc)</div><div class='add'>+{</div><div class='add'>+	pdsc-&gt;dev_info.asic_type = ioread8(&amp;pdsc-&gt;info_regs-&gt;asic_type);</div><div class='add'>+	pdsc-&gt;dev_info.asic_rev = ioread8(&amp;pdsc-&gt;info_regs-&gt;asic_rev);</div><div class='add'>+	pdsc-&gt;fw_generation = PDS_CORE_FW_STS_F_GENERATION &amp;</div><div class='add'>+			      ioread8(&amp;pdsc-&gt;info_regs-&gt;fw_status);</div><div class='add'>+</div><div class='add'>+	memcpy_fromio(pdsc-&gt;dev_info.fw_version,</div><div class='add'>+		      pdsc-&gt;info_regs-&gt;fw_version,</div><div class='add'>+		      PDS_CORE_DEVINFO_FWVERS_BUFLEN);</div><div class='add'>+	pdsc-&gt;dev_info.fw_version[PDS_CORE_DEVINFO_FWVERS_BUFLEN] = 0;</div><div class='add'>+</div><div class='add'>+	memcpy_fromio(pdsc-&gt;dev_info.serial_num,</div><div class='add'>+		      pdsc-&gt;info_regs-&gt;serial_num,</div><div class='add'>+		      PDS_CORE_DEVINFO_SERIAL_BUFLEN);</div><div class='add'>+	pdsc-&gt;dev_info.serial_num[PDS_CORE_DEVINFO_SERIAL_BUFLEN] = 0;</div><div class='add'>+</div><div class='add'>+	dev_dbg(pdsc-&gt;dev, "fw_version %s\n", pdsc-&gt;dev_info.fw_version);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pdsc_identify(struct pdsc *pdsc)</div><div class='add'>+{</div><div class='add'>+	struct pds_core_drv_identity drv = {};</div><div class='add'>+	size_t sz;</div><div class='add'>+	int err;</div><div class='add'>+	int n;</div><div class='add'>+</div><div class='add'>+	drv.drv_type = cpu_to_le32(PDS_DRIVER_LINUX);</div><div class='add'>+	/* Catching the return quiets a Wformat-truncation complaint */</div><div class='add'>+	n = snprintf(drv.driver_ver_str, sizeof(drv.driver_ver_str),</div><div class='add'>+		     "%s %s", PDS_CORE_DRV_NAME, utsname()-&gt;release);</div><div class='add'>+	if (n &gt; sizeof(drv.driver_ver_str))</div><div class='add'>+		dev_dbg(pdsc-&gt;dev, "release name truncated, don't care\n");</div><div class='add'>+</div><div class='add'>+	/* Next let's get some info about the device</div><div class='add'>+	 * We use the devcmd_lock at this level in order to</div><div class='add'>+	 * get safe access to the cmd_regs-&gt;data before anyone</div><div class='add'>+	 * else can mess it up</div><div class='add'>+	 */</div><div class='add'>+	mutex_lock(&amp;pdsc-&gt;devcmd_lock);</div><div class='add'>+</div><div class='add'>+	sz = min_t(size_t, sizeof(drv), sizeof(pdsc-&gt;cmd_regs-&gt;data));</div><div class='add'>+	memcpy_toio(&amp;pdsc-&gt;cmd_regs-&gt;data, &amp;drv, sz);</div><div class='add'>+</div><div class='add'>+	err = pdsc_devcmd_identify_locked(pdsc);</div><div class='add'>+	if (!err) {</div><div class='add'>+		sz = min_t(size_t, sizeof(pdsc-&gt;dev_ident),</div><div class='add'>+			   sizeof(pdsc-&gt;cmd_regs-&gt;data));</div><div class='add'>+		memcpy_fromio(&amp;pdsc-&gt;dev_ident, &amp;pdsc-&gt;cmd_regs-&gt;data, sz);</div><div class='add'>+	}</div><div class='add'>+	mutex_unlock(&amp;pdsc-&gt;devcmd_lock);</div><div class='add'>+</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(pdsc-&gt;dev, "Cannot identify device: %pe\n",</div><div class='add'>+			ERR_PTR(err));</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (isprint(pdsc-&gt;dev_info.fw_version[0]) &amp;&amp;</div><div class='add'>+	    isascii(pdsc-&gt;dev_info.fw_version[0]))</div><div class='add'>+		dev_info(pdsc-&gt;dev, "FW: %.*s\n",</div><div class='add'>+			 (int)(sizeof(pdsc-&gt;dev_info.fw_version) - 1),</div><div class='add'>+			 pdsc-&gt;dev_info.fw_version);</div><div class='add'>+	else</div><div class='add'>+		dev_info(pdsc-&gt;dev, "FW: (invalid string) 0x%02x 0x%02x 0x%02x 0x%02x ...\n",</div><div class='add'>+			 (u8)pdsc-&gt;dev_info.fw_version[0],</div><div class='add'>+			 (u8)pdsc-&gt;dev_info.fw_version[1],</div><div class='add'>+			 (u8)pdsc-&gt;dev_info.fw_version[2],</div><div class='add'>+			 (u8)pdsc-&gt;dev_info.fw_version[3]);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void pdsc_dev_uninit(struct pdsc *pdsc)</div><div class='add'>+{</div><div class='add'>+	if (pdsc-&gt;intr_info) {</div><div class='add'>+		int i;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; pdsc-&gt;nintrs; i++)</div><div class='add'>+			pdsc_intr_free(pdsc, i);</div><div class='add'>+</div><div class='add'>+		kfree(pdsc-&gt;intr_info);</div><div class='add'>+		pdsc-&gt;intr_info = NULL;</div><div class='add'>+		pdsc-&gt;nintrs = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pci_free_irq_vectors(pdsc-&gt;pdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int pdsc_dev_init(struct pdsc *pdsc)</div><div class='add'>+{</div><div class='add'>+	unsigned int nintrs;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Initial init and reset of device */</div><div class='add'>+	pdsc_init_devinfo(pdsc);</div><div class='add'>+	pdsc-&gt;devcmd_timeout = PDS_CORE_DEVCMD_TIMEOUT;</div><div class='add'>+</div><div class='add'>+	err = pdsc_devcmd_reset(pdsc);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = pdsc_identify(pdsc);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	pdsc_debugfs_add_ident(pdsc);</div><div class='add'>+</div><div class='add'>+	/* Now we can reserve interrupts */</div><div class='add'>+	nintrs = le32_to_cpu(pdsc-&gt;dev_ident.nintrs);</div><div class='add'>+	nintrs = min_t(unsigned int, num_online_cpus(), nintrs);</div><div class='add'>+</div><div class='add'>+	/* Get intr_info struct array for tracking */</div><div class='add'>+	pdsc-&gt;intr_info = kcalloc(nintrs, sizeof(*pdsc-&gt;intr_info), GFP_KERNEL);</div><div class='add'>+	if (!pdsc-&gt;intr_info)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	err = pci_alloc_irq_vectors(pdsc-&gt;pdev, nintrs, nintrs, PCI_IRQ_MSIX);</div><div class='add'>+	if (err != nintrs) {</div><div class='add'>+		dev_err(pdsc-&gt;dev, "Can't get %d intrs from OS: %pe\n",</div><div class='add'>+			nintrs, ERR_PTR(err));</div><div class='add'>+		err = -ENOSPC;</div><div class='add'>+		goto err_out;</div><div class='add'>+	}</div><div class='add'>+	pdsc-&gt;nintrs = nintrs;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_out:</div><div class='add'>+	kfree(pdsc-&gt;intr_info);</div><div class='add'>+	pdsc-&gt;intr_info = NULL;</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/amd/pds_core/devlink.c b/drivers/net/ethernet/amd/pds_core/devlink.c<br/>new file mode 100644<br/>index 000000000000..b576be626a29<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/pds_core/devlink.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/pds_core/devlink.c</a></div><div class='hunk'>@@ -0,0 +1,179 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright(c) 2023 Advanced Micro Devices, Inc */</div><div class='add'>+</div><div class='add'>+#include "core.h"</div><div class='add'>+#include &lt;linux/pds/pds_auxbus.h&gt;</div><div class='add'>+</div><div class='add'>+static struct</div><div class='add'>+pdsc_viftype *pdsc_dl_find_viftype_by_id(struct pdsc *pdsc,</div><div class='add'>+					 enum devlink_param_type dl_id)</div><div class='add'>+{</div><div class='add'>+	int vt;</div><div class='add'>+</div><div class='add'>+	if (!pdsc-&gt;viftype_status)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	for (vt = 0; vt &lt; PDS_DEV_TYPE_MAX; vt++) {</div><div class='add'>+		if (pdsc-&gt;viftype_status[vt].dl_id == dl_id)</div><div class='add'>+			return &amp;pdsc-&gt;viftype_status[vt];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int pdsc_dl_enable_get(struct devlink *dl, u32 id,</div><div class='add'>+		       struct devlink_param_gset_ctx *ctx,</div><div class='add'>+		       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct pdsc *pdsc = devlink_priv(dl);</div><div class='add'>+	struct pdsc_viftype *vt_entry;</div><div class='add'>+</div><div class='add'>+	vt_entry = pdsc_dl_find_viftype_by_id(pdsc, id);</div><div class='add'>+	if (!vt_entry)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	ctx-&gt;val.vbool = vt_entry-&gt;enabled;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int pdsc_dl_enable_set(struct devlink *dl, u32 id,</div><div class='add'>+		       struct devlink_param_gset_ctx *ctx,</div><div class='add'>+		       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct pdsc *pdsc = devlink_priv(dl);</div><div class='add'>+	struct pdsc_viftype *vt_entry;</div><div class='add'>+	int err = 0;</div><div class='add'>+	int vf_id;</div><div class='add'>+</div><div class='add'>+	vt_entry = pdsc_dl_find_viftype_by_id(pdsc, id);</div><div class='add'>+	if (!vt_entry || !vt_entry-&gt;supported)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (vt_entry-&gt;enabled == ctx-&gt;val.vbool)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	vt_entry-&gt;enabled = ctx-&gt;val.vbool;</div><div class='add'>+	for (vf_id = 0; vf_id &lt; pdsc-&gt;num_vfs; vf_id++) {</div><div class='add'>+		struct pdsc *vf = pdsc-&gt;vfs[vf_id].vf;</div><div class='add'>+</div><div class='add'>+		if (ctx-&gt;val.vbool)</div><div class='add'>+			err = pdsc_auxbus_dev_add(vf, pdsc, vt_entry-&gt;vif_id,</div><div class='add'>+						  &amp;pdsc-&gt;vfs[vf_id].padev);</div><div class='add'>+		else</div><div class='add'>+			pdsc_auxbus_dev_del(vf, pdsc, &amp;pdsc-&gt;vfs[vf_id].padev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int pdsc_dl_enable_validate(struct devlink *dl, u32 id,</div><div class='add'>+			    union devlink_param_value val,</div><div class='add'>+			    struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct pdsc *pdsc = devlink_priv(dl);</div><div class='add'>+	struct pdsc_viftype *vt_entry;</div><div class='add'>+</div><div class='add'>+	vt_entry = pdsc_dl_find_viftype_by_id(pdsc, id);</div><div class='add'>+	if (!vt_entry || !vt_entry-&gt;supported)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (!pdsc-&gt;viftype_status[vt_entry-&gt;vif_id].supported)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int pdsc_dl_flash_update(struct devlink *dl,</div><div class='add'>+			 struct devlink_flash_update_params *params,</div><div class='add'>+			 struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct pdsc *pdsc = devlink_priv(dl);</div><div class='add'>+</div><div class='add'>+	return pdsc_firmware_update(pdsc, params-&gt;fw, extack);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static char *fw_slotnames[] = {</div><div class='add'>+	"fw.goldfw",</div><div class='add'>+	"fw.mainfwa",</div><div class='add'>+	"fw.mainfwb",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int pdsc_dl_info_get(struct devlink *dl, struct devlink_info_req *req,</div><div class='add'>+		     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	union pds_core_dev_cmd cmd = {</div><div class='add'>+		.fw_control.opcode = PDS_CORE_CMD_FW_CONTROL,</div><div class='add'>+		.fw_control.oper = PDS_CORE_FW_GET_LIST,</div><div class='add'>+	};</div><div class='add'>+	struct pds_core_fw_list_info fw_list = {};</div><div class='add'>+	struct pdsc *pdsc = devlink_priv(dl);</div><div class='add'>+	union pds_core_dev_comp comp;</div><div class='add'>+	char buf[32];</div><div class='add'>+	int listlen;</div><div class='add'>+	int err;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pdsc-&gt;devcmd_lock);</div><div class='add'>+	err = pdsc_devcmd_locked(pdsc, &amp;cmd, &amp;comp, pdsc-&gt;devcmd_timeout * 2);</div><div class='add'>+	if (!err)</div><div class='add'>+		memcpy_fromio(&amp;fw_list, pdsc-&gt;cmd_regs-&gt;data, sizeof(fw_list));</div><div class='add'>+	mutex_unlock(&amp;pdsc-&gt;devcmd_lock);</div><div class='add'>+</div><div class='add'>+	listlen = min(fw_list.num_fw_slots, ARRAY_SIZE(fw_list.fw_names));</div><div class='add'>+	for (i = 0; i &lt; listlen; i++) {</div><div class='add'>+		if (i &lt; ARRAY_SIZE(fw_slotnames))</div><div class='add'>+			strscpy(buf, fw_slotnames[i], sizeof(buf));</div><div class='add'>+		else</div><div class='add'>+			snprintf(buf, sizeof(buf), "fw.slot_%d", i);</div><div class='add'>+		err = devlink_info_version_stored_put(req, buf,</div><div class='add'>+						      fw_list.fw_names[i].fw_version);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = devlink_info_version_running_put(req,</div><div class='add'>+					       DEVLINK_INFO_VERSION_GENERIC_FW,</div><div class='add'>+					       pdsc-&gt;dev_info.fw_version);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	snprintf(buf, sizeof(buf), "0x%x", pdsc-&gt;dev_info.asic_type);</div><div class='add'>+	err = devlink_info_version_fixed_put(req,</div><div class='add'>+					     DEVLINK_INFO_VERSION_GENERIC_ASIC_ID,</div><div class='add'>+					     buf);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	snprintf(buf, sizeof(buf), "0x%x", pdsc-&gt;dev_info.asic_rev);</div><div class='add'>+	err = devlink_info_version_fixed_put(req,</div><div class='add'>+					     DEVLINK_INFO_VERSION_GENERIC_ASIC_REV,</div><div class='add'>+					     buf);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return devlink_info_serial_number_put(req, pdsc-&gt;dev_info.serial_num);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int pdsc_fw_reporter_diagnose(struct devlink_health_reporter *reporter,</div><div class='add'>+			      struct devlink_fmsg *fmsg,</div><div class='add'>+			      struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct pdsc *pdsc = devlink_health_reporter_priv(reporter);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pdsc-&gt;config_lock);</div><div class='add'>+	if (test_bit(PDSC_S_FW_DEAD, &amp;pdsc-&gt;state))</div><div class='add'>+		devlink_fmsg_string_pair_put(fmsg, "Status", "dead");</div><div class='add'>+	else if (!pdsc_is_fw_good(pdsc))</div><div class='add'>+		devlink_fmsg_string_pair_put(fmsg, "Status", "unhealthy");</div><div class='add'>+	else</div><div class='add'>+		devlink_fmsg_string_pair_put(fmsg, "Status", "healthy");</div><div class='add'>+	mutex_unlock(&amp;pdsc-&gt;config_lock);</div><div class='add'>+</div><div class='add'>+	devlink_fmsg_u32_pair_put(fmsg, "State",</div><div class='add'>+				  pdsc-&gt;fw_status &amp; ~PDS_CORE_FW_STS_F_GENERATION);</div><div class='add'>+	devlink_fmsg_u32_pair_put(fmsg, "Generation", pdsc-&gt;fw_generation &gt;&gt; 4);</div><div class='add'>+	devlink_fmsg_u32_pair_put(fmsg, "Recoveries", pdsc-&gt;fw_recoveries);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/amd/pds_core/fw.c b/drivers/net/ethernet/amd/pds_core/fw.c<br/>new file mode 100644<br/>index 000000000000..fa626719e68d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/pds_core/fw.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/pds_core/fw.c</a></div><div class='hunk'>@@ -0,0 +1,197 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright(c) 2023 Advanced Micro Devices, Inc */</div><div class='add'>+</div><div class='add'>+#include "core.h"</div><div class='add'>+</div><div class='add'>+/* The worst case wait for the install activity is about 25 minutes when</div><div class='add'>+ * installing a new CPLD, which is very seldom.  Normal is about 30-35</div><div class='add'>+ * seconds.  Since the driver can't tell if a CPLD update will happen we</div><div class='add'>+ * set the timeout for the ugly case.</div><div class='add'>+ */</div><div class='add'>+#define PDSC_FW_INSTALL_TIMEOUT	(25 * 60)</div><div class='add'>+#define PDSC_FW_SELECT_TIMEOUT	30</div><div class='add'>+</div><div class='add'>+/* Number of periodic log updates during fw file download */</div><div class='add'>+#define PDSC_FW_INTERVAL_FRACTION	32</div><div class='add'>+</div><div class='add'>+static int pdsc_devcmd_fw_download_locked(struct pdsc *pdsc, u64 addr,</div><div class='add'>+					  u32 offset, u32 length)</div><div class='add'>+{</div><div class='add'>+	union pds_core_dev_cmd cmd = {</div><div class='add'>+		.fw_download.opcode = PDS_CORE_CMD_FW_DOWNLOAD,</div><div class='add'>+		.fw_download.offset = cpu_to_le32(offset),</div><div class='add'>+		.fw_download.addr = cpu_to_le64(addr),</div><div class='add'>+		.fw_download.length = cpu_to_le32(length),</div><div class='add'>+	};</div><div class='add'>+	union pds_core_dev_comp comp;</div><div class='add'>+</div><div class='add'>+	return pdsc_devcmd_locked(pdsc, &amp;cmd, &amp;comp, pdsc-&gt;devcmd_timeout);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pdsc_devcmd_fw_install(struct pdsc *pdsc)</div><div class='add'>+{</div><div class='add'>+	union pds_core_dev_cmd cmd = {</div><div class='add'>+		.fw_control.opcode = PDS_CORE_CMD_FW_CONTROL,</div><div class='add'>+		.fw_control.oper = PDS_CORE_FW_INSTALL_ASYNC</div><div class='add'>+	};</div><div class='add'>+	union pds_core_dev_comp comp;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = pdsc_devcmd(pdsc, &amp;cmd, &amp;comp, pdsc-&gt;devcmd_timeout);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return comp.fw_control.slot;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pdsc_devcmd_fw_activate(struct pdsc *pdsc,</div><div class='add'>+				   enum pds_core_fw_slot slot)</div><div class='add'>+{</div><div class='add'>+	union pds_core_dev_cmd cmd = {</div><div class='add'>+		.fw_control.opcode = PDS_CORE_CMD_FW_CONTROL,</div><div class='add'>+		.fw_control.oper = PDS_CORE_FW_ACTIVATE_ASYNC,</div><div class='add'>+		.fw_control.slot = slot</div><div class='add'>+	};</div><div class='add'>+	union pds_core_dev_comp comp;</div><div class='add'>+</div><div class='add'>+	return pdsc_devcmd(pdsc, &amp;cmd, &amp;comp, pdsc-&gt;devcmd_timeout);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pdsc_fw_status_long_wait(struct pdsc *pdsc,</div><div class='add'>+				    const char *label,</div><div class='add'>+				    unsigned long timeout,</div><div class='add'>+				    u8 fw_cmd,</div><div class='add'>+				    struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	union pds_core_dev_cmd cmd = {</div><div class='add'>+		.fw_control.opcode = PDS_CORE_CMD_FW_CONTROL,</div><div class='add'>+		.fw_control.oper = fw_cmd,</div><div class='add'>+	};</div><div class='add'>+	union pds_core_dev_comp comp;</div><div class='add'>+	unsigned long start_time;</div><div class='add'>+	unsigned long end_time;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Ping on the status of the long running async install</div><div class='add'>+	 * command.  We get EAGAIN while the command is still</div><div class='add'>+	 * running, else we get the final command status.</div><div class='add'>+	 */</div><div class='add'>+	start_time = jiffies;</div><div class='add'>+	end_time = start_time + (timeout * HZ);</div><div class='add'>+	do {</div><div class='add'>+		err = pdsc_devcmd(pdsc, &amp;cmd, &amp;comp, pdsc-&gt;devcmd_timeout);</div><div class='add'>+		msleep(20);</div><div class='add'>+	} while (time_before(jiffies, end_time) &amp;&amp;</div><div class='add'>+		 (err == -EAGAIN || err == -ETIMEDOUT));</div><div class='add'>+</div><div class='add'>+	if (err == -EAGAIN || err == -ETIMEDOUT) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Firmware wait timed out");</div><div class='add'>+		dev_err(pdsc-&gt;dev, "DEV_CMD firmware wait %s timed out\n",</div><div class='add'>+			label);</div><div class='add'>+	} else if (err) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Firmware wait failed");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int pdsc_firmware_update(struct pdsc *pdsc, const struct firmware *fw,</div><div class='add'>+			 struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	u32 buf_sz, copy_sz, offset;</div><div class='add'>+	struct devlink *dl;</div><div class='add'>+	int next_interval;</div><div class='add'>+	u64 data_addr;</div><div class='add'>+	int err = 0;</div><div class='add'>+	int fw_slot;</div><div class='add'>+</div><div class='add'>+	dev_info(pdsc-&gt;dev, "Installing firmware\n");</div><div class='add'>+</div><div class='add'>+	if (!pdsc-&gt;cmd_regs)</div><div class='add'>+		return -ENXIO;</div><div class='add'>+</div><div class='add'>+	dl = priv_to_devlink(pdsc);</div><div class='add'>+	devlink_flash_update_status_notify(dl, "Preparing to flash",</div><div class='add'>+					   NULL, 0, 0);</div><div class='add'>+</div><div class='add'>+	buf_sz = sizeof(pdsc-&gt;cmd_regs-&gt;data);</div><div class='add'>+</div><div class='add'>+	dev_dbg(pdsc-&gt;dev,</div><div class='add'>+		"downloading firmware - size %d part_sz %d nparts %lu\n",</div><div class='add'>+		(int)fw-&gt;size, buf_sz, DIV_ROUND_UP(fw-&gt;size, buf_sz));</div><div class='add'>+</div><div class='add'>+	offset = 0;</div><div class='add'>+	next_interval = 0;</div><div class='add'>+	data_addr = offsetof(struct pds_core_dev_cmd_regs, data);</div><div class='add'>+	while (offset &lt; fw-&gt;size) {</div><div class='add'>+		if (offset &gt;= next_interval) {</div><div class='add'>+			devlink_flash_update_status_notify(dl, "Downloading",</div><div class='add'>+							   NULL, offset,</div><div class='add'>+							   fw-&gt;size);</div><div class='add'>+			next_interval = offset +</div><div class='add'>+					(fw-&gt;size / PDSC_FW_INTERVAL_FRACTION);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		copy_sz = min_t(unsigned int, buf_sz, fw-&gt;size - offset);</div><div class='add'>+		mutex_lock(&amp;pdsc-&gt;devcmd_lock);</div><div class='add'>+		memcpy_toio(&amp;pdsc-&gt;cmd_regs-&gt;data, fw-&gt;data + offset, copy_sz);</div><div class='add'>+		err = pdsc_devcmd_fw_download_locked(pdsc, data_addr,</div><div class='add'>+						     offset, copy_sz);</div><div class='add'>+		mutex_unlock(&amp;pdsc-&gt;devcmd_lock);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(pdsc-&gt;dev,</div><div class='add'>+				"download failed offset 0x%x addr 0x%llx len 0x%x: %pe\n",</div><div class='add'>+				offset, data_addr, copy_sz, ERR_PTR(err));</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack, "Segment download failed");</div><div class='add'>+			goto err_out;</div><div class='add'>+		}</div><div class='add'>+		offset += copy_sz;</div><div class='add'>+	}</div><div class='add'>+	devlink_flash_update_status_notify(dl, "Downloading", NULL,</div><div class='add'>+					   fw-&gt;size, fw-&gt;size);</div><div class='add'>+</div><div class='add'>+	devlink_flash_update_timeout_notify(dl, "Installing", NULL,</div><div class='add'>+					    PDSC_FW_INSTALL_TIMEOUT);</div><div class='add'>+</div><div class='add'>+	fw_slot = pdsc_devcmd_fw_install(pdsc);</div><div class='add'>+	if (fw_slot &lt; 0) {</div><div class='add'>+		err = fw_slot;</div><div class='add'>+		dev_err(pdsc-&gt;dev, "install failed: %pe\n", ERR_PTR(err));</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Failed to start firmware install");</div><div class='add'>+		goto err_out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = pdsc_fw_status_long_wait(pdsc, "Installing",</div><div class='add'>+				       PDSC_FW_INSTALL_TIMEOUT,</div><div class='add'>+				       PDS_CORE_FW_INSTALL_STATUS,</div><div class='add'>+				       extack);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_out;</div><div class='add'>+</div><div class='add'>+	devlink_flash_update_timeout_notify(dl, "Selecting", NULL,</div><div class='add'>+					    PDSC_FW_SELECT_TIMEOUT);</div><div class='add'>+</div><div class='add'>+	err = pdsc_devcmd_fw_activate(pdsc, fw_slot);</div><div class='add'>+	if (err) {</div><div class='add'>+		NL_SET_ERR_MSG_MOD(extack, "Failed to start firmware select");</div><div class='add'>+		goto err_out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = pdsc_fw_status_long_wait(pdsc, "Selecting",</div><div class='add'>+				       PDSC_FW_SELECT_TIMEOUT,</div><div class='add'>+				       PDS_CORE_FW_ACTIVATE_STATUS,</div><div class='add'>+				       extack);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_out;</div><div class='add'>+</div><div class='add'>+	dev_info(pdsc-&gt;dev, "Firmware update completed, slot %d\n", fw_slot);</div><div class='add'>+</div><div class='add'>+err_out:</div><div class='add'>+	if (err)</div><div class='add'>+		devlink_flash_update_status_notify(dl, "Flash failed",</div><div class='add'>+						   NULL, 0, 0);</div><div class='add'>+	else</div><div class='add'>+		devlink_flash_update_status_notify(dl, "Flash done",</div><div class='add'>+						   NULL, 0, 0);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/amd/pds_core/main.c b/drivers/net/ethernet/amd/pds_core/main.c<br/>new file mode 100644<br/>index 000000000000..c7a2eff57632<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/pds_core/main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/pds_core/main.c</a></div><div class='hunk'>@@ -0,0 +1,609 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0</div><div class='add'>+/* Copyright(c) 2023 Advanced Micro Devices, Inc */</div><div class='add'>+</div><div class='add'>+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='add'>+</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+</div><div class='add'>+#include &lt;linux/pds/pds_common.h&gt;</div><div class='add'>+</div><div class='add'>+#include "core.h"</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION(PDSC_DRV_DESCRIPTION);</div><div class='add'>+MODULE_AUTHOR("Advanced Micro Devices, Inc");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='add'>+</div><div class='add'>+/* Supported devices */</div><div class='add'>+static const struct pci_device_id pdsc_id_table[] = {</div><div class='add'>+	{ PCI_VDEVICE(PENSANDO, PCI_DEVICE_ID_PENSANDO_CORE_PF) },</div><div class='add'>+	{ PCI_VDEVICE(PENSANDO, PCI_DEVICE_ID_PENSANDO_VDPA_VF) },</div><div class='add'>+	{ 0, }	/* end of table */</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(pci, pdsc_id_table);</div><div class='add'>+</div><div class='add'>+static void pdsc_wdtimer_cb(struct timer_list *t)</div><div class='add'>+{</div><div class='add'>+	struct pdsc *pdsc = timer_container_of(pdsc, t, wdtimer);</div><div class='add'>+</div><div class='add'>+	dev_dbg(pdsc-&gt;dev, "%s: jiffies %ld\n", __func__, jiffies);</div><div class='add'>+	mod_timer(&amp;pdsc-&gt;wdtimer,</div><div class='add'>+		  round_jiffies(jiffies + pdsc-&gt;wdtimer_period));</div><div class='add'>+</div><div class='add'>+	queue_work(pdsc-&gt;wq, &amp;pdsc-&gt;health_work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pdsc_unmap_bars(struct pdsc *pdsc)</div><div class='add'>+{</div><div class='add'>+	struct pdsc_dev_bar *bars = pdsc-&gt;bars;</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	pdsc-&gt;info_regs = NULL;</div><div class='add'>+	pdsc-&gt;cmd_regs = NULL;</div><div class='add'>+	pdsc-&gt;intr_status = NULL;</div><div class='add'>+	pdsc-&gt;intr_ctrl = NULL;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; PDS_CORE_BARS_MAX; i++) {</div><div class='add'>+		if (bars[i].vaddr)</div><div class='add'>+			pci_iounmap(pdsc-&gt;pdev, bars[i].vaddr);</div><div class='add'>+		bars[i].vaddr = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pdsc_map_bars(struct pdsc *pdsc)</div><div class='add'>+{</div><div class='add'>+	struct pdsc_dev_bar *bar = pdsc-&gt;bars;</div><div class='add'>+	struct pci_dev *pdev = pdsc-&gt;pdev;</div><div class='add'>+	struct device *dev = pdsc-&gt;dev;</div><div class='add'>+	struct pdsc_dev_bar *bars;</div><div class='add'>+	unsigned int i, j;</div><div class='add'>+	int num_bars = 0;</div><div class='add'>+	int err;</div><div class='add'>+	u32 sig;</div><div class='add'>+</div><div class='add'>+	bars = pdsc-&gt;bars;</div><div class='add'>+</div><div class='add'>+	/* Since the PCI interface in the hardware is configurable,</div><div class='add'>+	 * we need to poke into all the bars to find the set we're</div><div class='add'>+	 * expecting.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0, j = 0; i &lt; PDS_CORE_BARS_MAX; i++) {</div><div class='add'>+		if (!(pci_resource_flags(pdev, i) &amp; IORESOURCE_MEM))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		bars[j].len = pci_resource_len(pdev, i);</div><div class='add'>+		bars[j].bus_addr = pci_resource_start(pdev, i);</div><div class='add'>+		bars[j].res_index = i;</div><div class='add'>+</div><div class='add'>+		/* only map the whole bar 0 */</div><div class='add'>+		if (j &gt; 0) {</div><div class='add'>+			bars[j].vaddr = NULL;</div><div class='add'>+		} else {</div><div class='add'>+			bars[j].vaddr = pci_iomap(pdev, i, bars[j].len);</div><div class='add'>+			if (!bars[j].vaddr) {</div><div class='add'>+				dev_err(dev, "Cannot map BAR %d, aborting\n", i);</div><div class='add'>+				return -ENODEV;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		j++;</div><div class='add'>+	}</div><div class='add'>+	num_bars = j;</div><div class='add'>+</div><div class='add'>+	/* BAR0: dev_cmd and interrupts */</div><div class='add'>+	if (num_bars &lt; 1) {</div><div class='add'>+		dev_err(dev, "No bars found\n");</div><div class='add'>+		err = -EFAULT;</div><div class='add'>+		goto err_out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (bar-&gt;len &lt; PDS_CORE_BAR0_SIZE) {</div><div class='add'>+		dev_err(dev, "Resource bar size %lu too small\n", bar-&gt;len);</div><div class='add'>+		err = -EFAULT;</div><div class='add'>+		goto err_out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pdsc-&gt;info_regs = bar-&gt;vaddr + PDS_CORE_BAR0_DEV_INFO_REGS_OFFSET;</div><div class='add'>+	pdsc-&gt;cmd_regs = bar-&gt;vaddr + PDS_CORE_BAR0_DEV_CMD_REGS_OFFSET;</div><div class='add'>+	pdsc-&gt;intr_status = bar-&gt;vaddr + PDS_CORE_BAR0_INTR_STATUS_OFFSET;</div><div class='add'>+	pdsc-&gt;intr_ctrl = bar-&gt;vaddr + PDS_CORE_BAR0_INTR_CTRL_OFFSET;</div><div class='add'>+</div><div class='add'>+	sig = ioread32(&amp;pdsc-&gt;info_regs-&gt;signature);</div><div class='add'>+	if (sig != PDS_CORE_DEV_INFO_SIGNATURE) {</div><div class='add'>+		dev_err(dev, "Incompatible firmware signature %x", sig);</div><div class='add'>+		err = -EFAULT;</div><div class='add'>+		goto err_out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* BAR1: doorbells */</div><div class='add'>+	bar++;</div><div class='add'>+	if (num_bars &lt; 2) {</div><div class='add'>+		dev_err(dev, "Doorbell bar missing\n");</div><div class='add'>+		err = -EFAULT;</div><div class='add'>+		goto err_out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pdsc-&gt;db_pages = bar-&gt;vaddr;</div><div class='add'>+	pdsc-&gt;phy_db_pages = bar-&gt;bus_addr;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_out:</div><div class='add'>+	pdsc_unmap_bars(pdsc);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void __iomem *pdsc_map_dbpage(struct pdsc *pdsc, int page_num)</div><div class='add'>+{</div><div class='add'>+	return pci_iomap_range(pdsc-&gt;pdev,</div><div class='add'>+			       pdsc-&gt;bars[PDS_CORE_PCI_BAR_DBELL].res_index,</div><div class='add'>+			       (u64)page_num &lt;&lt; PAGE_SHIFT, PAGE_SIZE);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pdsc_sriov_configure(struct pci_dev *pdev, int num_vfs)</div><div class='add'>+{</div><div class='add'>+	struct pdsc *pdsc = pci_get_drvdata(pdev);</div><div class='add'>+	struct device *dev = pdsc-&gt;dev;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (num_vfs &gt; 0) {</div><div class='add'>+		pdsc-&gt;vfs = kcalloc(num_vfs, sizeof(struct pdsc_vf),</div><div class='add'>+				    GFP_KERNEL);</div><div class='add'>+		if (!pdsc-&gt;vfs)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		pdsc-&gt;num_vfs = num_vfs;</div><div class='add'>+</div><div class='add'>+		ret = pci_enable_sriov(pdev, num_vfs);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(dev, "Cannot enable SRIOV: %pe\n",</div><div class='add'>+				ERR_PTR(ret));</div><div class='add'>+			goto no_vfs;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		return num_vfs;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+no_vfs:</div><div class='add'>+	pci_disable_sriov(pdev);</div><div class='add'>+</div><div class='add'>+	kfree(pdsc-&gt;vfs);</div><div class='add'>+	pdsc-&gt;vfs = NULL;</div><div class='add'>+	pdsc-&gt;num_vfs = 0;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int pdsc_init_vf(struct pdsc *vf)</div><div class='add'>+{</div><div class='add'>+	struct devlink *dl;</div><div class='add'>+	struct pdsc *pf;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	pf = pdsc_get_pf_struct(vf-&gt;pdev);</div><div class='add'>+	if (IS_ERR_OR_NULL(pf))</div><div class='add'>+		return PTR_ERR(pf) ?: -1;</div><div class='add'>+</div><div class='add'>+	vf-&gt;vf_id = pci_iov_vf_id(vf-&gt;pdev);</div><div class='add'>+</div><div class='add'>+	dl = priv_to_devlink(vf);</div><div class='add'>+	devl_lock(dl);</div><div class='add'>+	devl_register(dl);</div><div class='add'>+	devl_unlock(dl);</div><div class='add'>+</div><div class='add'>+	pf-&gt;vfs[vf-&gt;vf_id].vf = vf;</div><div class='add'>+	err = pdsc_auxbus_dev_add(vf, pf, PDS_DEV_TYPE_VDPA,</div><div class='add'>+				  &amp;pf-&gt;vfs[vf-&gt;vf_id].padev);</div><div class='add'>+	if (err) {</div><div class='add'>+		devl_lock(dl);</div><div class='add'>+		devl_unregister(dl);</div><div class='add'>+		devl_unlock(dl);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct devlink_health_reporter_ops pdsc_fw_reporter_ops = {</div><div class='add'>+	.name = "fw",</div><div class='add'>+	.diagnose = pdsc_fw_reporter_diagnose,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct devlink_param pdsc_dl_params[] = {</div><div class='add'>+	DEVLINK_PARAM_GENERIC(ENABLE_VNET,</div><div class='add'>+			      BIT(DEVLINK_PARAM_CMODE_RUNTIME),</div><div class='add'>+			      pdsc_dl_enable_get,</div><div class='add'>+			      pdsc_dl_enable_set,</div><div class='add'>+			      pdsc_dl_enable_validate),</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define PDSC_WQ_NAME_LEN 24</div><div class='add'>+</div><div class='add'>+static int pdsc_init_pf(struct pdsc *pdsc)</div><div class='add'>+{</div><div class='add'>+	struct devlink_health_reporter *hr;</div><div class='add'>+	char wq_name[PDSC_WQ_NAME_LEN];</div><div class='add'>+	struct devlink *dl;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	pcie_print_link_status(pdsc-&gt;pdev);</div><div class='add'>+</div><div class='add'>+	err = pci_request_regions(pdsc-&gt;pdev, PDS_CORE_DRV_NAME);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(pdsc-&gt;dev, "Cannot request PCI regions: %pe\n",</div><div class='add'>+			ERR_PTR(err));</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = pdsc_map_bars(pdsc);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_out_release_regions;</div><div class='add'>+</div><div class='add'>+	/* General workqueue and timer, but don't start timer yet */</div><div class='add'>+	snprintf(wq_name, sizeof(wq_name), "%s.%d", PDS_CORE_DRV_NAME, pdsc-&gt;uid);</div><div class='add'>+	pdsc-&gt;wq = create_singlethread_workqueue(wq_name);</div><div class='add'>+	INIT_WORK(&amp;pdsc-&gt;health_work, pdsc_health_thread);</div><div class='add'>+	INIT_WORK(&amp;pdsc-&gt;pci_reset_work, pdsc_pci_reset_thread);</div><div class='add'>+	timer_setup(&amp;pdsc-&gt;wdtimer, pdsc_wdtimer_cb, 0);</div><div class='add'>+	pdsc-&gt;wdtimer_period = PDSC_WATCHDOG_SECS * HZ;</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;pdsc-&gt;devcmd_lock);</div><div class='add'>+	mutex_init(&amp;pdsc-&gt;config_lock);</div><div class='add'>+	spin_lock_init(&amp;pdsc-&gt;adminq_lock);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pdsc-&gt;config_lock);</div><div class='add'>+	set_bit(PDSC_S_FW_DEAD, &amp;pdsc-&gt;state);</div><div class='add'>+</div><div class='add'>+	err = pdsc_setup(pdsc, PDSC_SETUP_INIT);</div><div class='add'>+	if (err) {</div><div class='add'>+		mutex_unlock(&amp;pdsc-&gt;config_lock);</div><div class='add'>+		goto err_out_unmap_bars;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = pdsc_start(pdsc);</div><div class='add'>+	if (err) {</div><div class='add'>+		mutex_unlock(&amp;pdsc-&gt;config_lock);</div><div class='add'>+		goto err_out_teardown;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;pdsc-&gt;config_lock);</div><div class='add'>+</div><div class='add'>+	err = pdsc_auxbus_dev_add(pdsc, pdsc, PDS_DEV_TYPE_FWCTL, &amp;pdsc-&gt;padev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_out_stop;</div><div class='add'>+</div><div class='add'>+	dl = priv_to_devlink(pdsc);</div><div class='add'>+	devl_lock(dl);</div><div class='add'>+	err = devl_params_register(dl, pdsc_dl_params,</div><div class='add'>+				   ARRAY_SIZE(pdsc_dl_params));</div><div class='add'>+	if (err) {</div><div class='add'>+		devl_unlock(dl);</div><div class='add'>+		dev_warn(pdsc-&gt;dev, "Failed to register devlink params: %pe\n",</div><div class='add'>+			 ERR_PTR(err));</div><div class='add'>+		goto err_out_del_dev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hr = devl_health_reporter_create(dl, &amp;pdsc_fw_reporter_ops, pdsc);</div><div class='add'>+	if (IS_ERR(hr)) {</div><div class='add'>+		devl_unlock(dl);</div><div class='add'>+		dev_warn(pdsc-&gt;dev, "Failed to create fw reporter: %pe\n", hr);</div><div class='add'>+		err = PTR_ERR(hr);</div><div class='add'>+		goto err_out_unreg_params;</div><div class='add'>+	}</div><div class='add'>+	pdsc-&gt;fw_reporter = hr;</div><div class='add'>+</div><div class='add'>+	devl_register(dl);</div><div class='add'>+	devl_unlock(dl);</div><div class='add'>+</div><div class='add'>+	/* Lastly, start the health check timer */</div><div class='add'>+	mod_timer(&amp;pdsc-&gt;wdtimer, round_jiffies(jiffies + pdsc-&gt;wdtimer_period));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_out_unreg_params:</div><div class='add'>+	devlink_params_unregister(dl, pdsc_dl_params,</div><div class='add'>+				  ARRAY_SIZE(pdsc_dl_params));</div><div class='add'>+err_out_del_dev:</div><div class='add'>+	pdsc_auxbus_dev_del(pdsc, pdsc, &amp;pdsc-&gt;padev);</div><div class='add'>+err_out_stop:</div><div class='add'>+	pdsc_stop(pdsc);</div><div class='add'>+err_out_teardown:</div><div class='add'>+	pdsc_teardown(pdsc, PDSC_TEARDOWN_REMOVING);</div><div class='add'>+err_out_unmap_bars:</div><div class='add'>+	timer_shutdown_sync(&amp;pdsc-&gt;wdtimer);</div><div class='add'>+	if (pdsc-&gt;wq)</div><div class='add'>+		destroy_workqueue(pdsc-&gt;wq);</div><div class='add'>+	mutex_destroy(&amp;pdsc-&gt;config_lock);</div><div class='add'>+	mutex_destroy(&amp;pdsc-&gt;devcmd_lock);</div><div class='add'>+	pci_free_irq_vectors(pdsc-&gt;pdev);</div><div class='add'>+	pdsc_unmap_bars(pdsc);</div><div class='add'>+err_out_release_regions:</div><div class='add'>+	pci_release_regions(pdsc-&gt;pdev);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct devlink_ops pdsc_dl_ops = {</div><div class='add'>+	.info_get	= pdsc_dl_info_get,</div><div class='add'>+	.flash_update	= pdsc_dl_flash_update,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct devlink_ops pdsc_dl_vf_ops = {</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static DEFINE_IDA(pdsc_ida);</div><div class='add'>+</div><div class='add'>+static int pdsc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	const struct devlink_ops *ops;</div><div class='add'>+	struct devlink *dl;</div><div class='add'>+	struct pdsc *pdsc;</div><div class='add'>+	bool is_pf;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	is_pf = !pdev-&gt;is_virtfn;</div><div class='add'>+	ops = is_pf ? &amp;pdsc_dl_ops : &amp;pdsc_dl_vf_ops;</div><div class='add'>+	dl = devlink_alloc(ops, sizeof(struct pdsc), dev);</div><div class='add'>+	if (!dl)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	pdsc = devlink_priv(dl);</div><div class='add'>+</div><div class='add'>+	pdsc-&gt;pdev = pdev;</div><div class='add'>+	pdsc-&gt;dev = &amp;pdev-&gt;dev;</div><div class='add'>+	set_bit(PDSC_S_INITING_DRIVER, &amp;pdsc-&gt;state);</div><div class='add'>+	pci_set_drvdata(pdev, pdsc);</div><div class='add'>+	pdsc_debugfs_add_dev(pdsc);</div><div class='add'>+</div><div class='add'>+	err = ida_alloc(&amp;pdsc_ida, GFP_KERNEL);</div><div class='add'>+	if (err &lt; 0) {</div><div class='add'>+		dev_err(pdsc-&gt;dev, "%s: id alloc failed: %pe\n",</div><div class='add'>+			__func__, ERR_PTR(err));</div><div class='add'>+		goto err_out_free_devlink;</div><div class='add'>+	}</div><div class='add'>+	pdsc-&gt;uid = err;</div><div class='add'>+</div><div class='add'>+	/* Query system for DMA addressing limitation for the device. */</div><div class='add'>+	err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(PDS_CORE_ADDR_LEN));</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "Unable to obtain 64-bit DMA for consistent allocations, aborting: %pe\n",</div><div class='add'>+			ERR_PTR(err));</div><div class='add'>+		goto err_out_free_ida;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = pci_enable_device(pdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "Cannot enable PCI device: %pe\n", ERR_PTR(err));</div><div class='add'>+		goto err_out_free_ida;</div><div class='add'>+	}</div><div class='add'>+	pci_set_master(pdev);</div><div class='add'>+</div><div class='add'>+	if (is_pf)</div><div class='add'>+		err = pdsc_init_pf(pdsc);</div><div class='add'>+	else</div><div class='add'>+		err = pdsc_init_vf(pdsc);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "Cannot init device: %pe\n", ERR_PTR(err));</div><div class='add'>+		goto err_out_disable_device;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	clear_bit(PDSC_S_INITING_DRIVER, &amp;pdsc-&gt;state);</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_out_disable_device:</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+err_out_free_ida:</div><div class='add'>+	ida_free(&amp;pdsc_ida, pdsc-&gt;uid);</div><div class='add'>+err_out_free_devlink:</div><div class='add'>+	pdsc_debugfs_del_dev(pdsc);</div><div class='add'>+	devlink_free(dl);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pdsc_remove(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct pdsc *pdsc = pci_get_drvdata(pdev);</div><div class='add'>+	struct devlink *dl;</div><div class='add'>+</div><div class='add'>+	/* Unhook the registrations first to be sure there</div><div class='add'>+	 * are no requests while we're stopping.</div><div class='add'>+	 */</div><div class='add'>+	dl = priv_to_devlink(pdsc);</div><div class='add'>+	devl_lock(dl);</div><div class='add'>+	devl_unregister(dl);</div><div class='add'>+	if (!pdev-&gt;is_virtfn) {</div><div class='add'>+		if (pdsc-&gt;fw_reporter) {</div><div class='add'>+			devl_health_reporter_destroy(pdsc-&gt;fw_reporter);</div><div class='add'>+			pdsc-&gt;fw_reporter = NULL;</div><div class='add'>+		}</div><div class='add'>+		devl_params_unregister(dl, pdsc_dl_params,</div><div class='add'>+				       ARRAY_SIZE(pdsc_dl_params));</div><div class='add'>+	}</div><div class='add'>+	devl_unlock(dl);</div><div class='add'>+</div><div class='add'>+	if (pdev-&gt;is_virtfn) {</div><div class='add'>+		struct pdsc *pf;</div><div class='add'>+</div><div class='add'>+		pf = pdsc_get_pf_struct(pdsc-&gt;pdev);</div><div class='add'>+		if (!IS_ERR(pf)) {</div><div class='add'>+			pdsc_auxbus_dev_del(pdsc, pf, &amp;pf-&gt;vfs[pdsc-&gt;vf_id].padev);</div><div class='add'>+			pf-&gt;vfs[pdsc-&gt;vf_id].vf = NULL;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		/* Remove the VFs and their aux_bus connections before other</div><div class='add'>+		 * cleanup so that the clients can use the AdminQ to cleanly</div><div class='add'>+		 * shut themselves down.</div><div class='add'>+		 */</div><div class='add'>+		pdsc_sriov_configure(pdev, 0);</div><div class='add'>+		pdsc_auxbus_dev_del(pdsc, pdsc, &amp;pdsc-&gt;padev);</div><div class='add'>+</div><div class='add'>+		timer_shutdown_sync(&amp;pdsc-&gt;wdtimer);</div><div class='add'>+		if (pdsc-&gt;wq)</div><div class='add'>+			destroy_workqueue(pdsc-&gt;wq);</div><div class='add'>+</div><div class='add'>+		mutex_lock(&amp;pdsc-&gt;config_lock);</div><div class='add'>+		set_bit(PDSC_S_STOPPING_DRIVER, &amp;pdsc-&gt;state);</div><div class='add'>+</div><div class='add'>+		pdsc_stop(pdsc);</div><div class='add'>+		pdsc_teardown(pdsc, PDSC_TEARDOWN_REMOVING);</div><div class='add'>+		mutex_unlock(&amp;pdsc-&gt;config_lock);</div><div class='add'>+		mutex_destroy(&amp;pdsc-&gt;config_lock);</div><div class='add'>+		mutex_destroy(&amp;pdsc-&gt;devcmd_lock);</div><div class='add'>+</div><div class='add'>+		pdsc_unmap_bars(pdsc);</div><div class='add'>+		pci_release_regions(pdev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+</div><div class='add'>+	ida_free(&amp;pdsc_ida, pdsc-&gt;uid);</div><div class='add'>+	pdsc_debugfs_del_dev(pdsc);</div><div class='add'>+	devlink_free(dl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pdsc_stop_health_thread(struct pdsc *pdsc)</div><div class='add'>+{</div><div class='add'>+	if (pdsc-&gt;pdev-&gt;is_virtfn)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	timer_shutdown_sync(&amp;pdsc-&gt;wdtimer);</div><div class='add'>+	if (pdsc-&gt;health_work.func)</div><div class='add'>+		cancel_work_sync(&amp;pdsc-&gt;health_work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pdsc_restart_health_thread(struct pdsc *pdsc)</div><div class='add'>+{</div><div class='add'>+	if (pdsc-&gt;pdev-&gt;is_virtfn)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	timer_setup(&amp;pdsc-&gt;wdtimer, pdsc_wdtimer_cb, 0);</div><div class='add'>+	mod_timer(&amp;pdsc-&gt;wdtimer, jiffies + 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pdsc_reset_prepare(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct pdsc *pdsc = pci_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	pdsc_stop_health_thread(pdsc);</div><div class='add'>+	pdsc_fw_down(pdsc);</div><div class='add'>+</div><div class='add'>+	if (pdev-&gt;is_virtfn) {</div><div class='add'>+		struct pdsc *pf;</div><div class='add'>+</div><div class='add'>+		pf = pdsc_get_pf_struct(pdsc-&gt;pdev);</div><div class='add'>+		if (!IS_ERR(pf))</div><div class='add'>+			pdsc_auxbus_dev_del(pdsc, pf,</div><div class='add'>+					    &amp;pf-&gt;vfs[pdsc-&gt;vf_id].padev);</div><div class='add'>+	} else {</div><div class='add'>+		pdsc_auxbus_dev_del(pdsc, pdsc, &amp;pdsc-&gt;padev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pdsc_unmap_bars(pdsc);</div><div class='add'>+	pci_release_regions(pdev);</div><div class='add'>+	if (pci_is_enabled(pdev))</div><div class='add'>+		pci_disable_device(pdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pdsc_reset_done(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct pdsc *pdsc = pci_get_drvdata(pdev);</div><div class='add'>+	struct device *dev = pdsc-&gt;dev;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = pci_enable_device(pdev);</div><div class='add'>+	if (err) {</div><div class='add'>+		dev_err(dev, "Cannot enable PCI device: %pe\n", ERR_PTR(err));</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	pci_set_master(pdev);</div><div class='add'>+</div><div class='add'>+	if (!pdev-&gt;is_virtfn) {</div><div class='add'>+		pcie_print_link_status(pdsc-&gt;pdev);</div><div class='add'>+</div><div class='add'>+		err = pci_request_regions(pdsc-&gt;pdev, PDS_CORE_DRV_NAME);</div><div class='add'>+		if (err) {</div><div class='add'>+			dev_err(pdsc-&gt;dev, "Cannot request PCI regions: %pe\n",</div><div class='add'>+				ERR_PTR(err));</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = pdsc_map_bars(pdsc);</div><div class='add'>+		if (err)</div><div class='add'>+			return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pdsc_fw_up(pdsc);</div><div class='add'>+	pdsc_restart_health_thread(pdsc);</div><div class='add'>+</div><div class='add'>+	if (pdev-&gt;is_virtfn) {</div><div class='add'>+		struct pdsc *pf;</div><div class='add'>+</div><div class='add'>+		pf = pdsc_get_pf_struct(pdsc-&gt;pdev);</div><div class='add'>+		if (!IS_ERR(pf))</div><div class='add'>+			pdsc_auxbus_dev_add(pdsc, pf, PDS_DEV_TYPE_VDPA,</div><div class='add'>+					    &amp;pf-&gt;vfs[pdsc-&gt;vf_id].padev);</div><div class='add'>+	} else {</div><div class='add'>+		pdsc_auxbus_dev_add(pdsc, pdsc, PDS_DEV_TYPE_FWCTL,</div><div class='add'>+				    &amp;pdsc-&gt;padev);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static pci_ers_result_t pdsc_pci_error_detected(struct pci_dev *pdev,</div><div class='add'>+						pci_channel_state_t error)</div><div class='add'>+{</div><div class='add'>+	if (error == pci_channel_io_frozen) {</div><div class='add'>+		pdsc_reset_prepare(pdev);</div><div class='add'>+		return PCI_ERS_RESULT_NEED_RESET;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return PCI_ERS_RESULT_NONE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void pdsc_pci_error_resume(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct pdsc *pdsc = pci_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	if (test_bit(PDSC_S_FW_DEAD, &amp;pdsc-&gt;state))</div><div class='add'>+		pci_reset_function_locked(pdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct pci_error_handlers pdsc_err_handler = {</div><div class='add'>+	/* FLR handling */</div><div class='add'>+	.reset_prepare      = pdsc_reset_prepare,</div><div class='add'>+	.reset_done         = pdsc_reset_done,</div><div class='add'>+</div><div class='add'>+	/* AER handling */</div><div class='add'>+	.error_detected     = pdsc_pci_error_detected,</div><div class='add'>+	.resume             = pdsc_pci_error_resume,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct pci_driver pdsc_driver = {</div><div class='add'>+	.name = PDS_CORE_DRV_NAME,</div><div class='add'>+	.id_table = pdsc_id_table,</div><div class='add'>+	.probe = pdsc_probe,</div><div class='add'>+	.remove = pdsc_remove,</div><div class='add'>+	.sriov_configure = pdsc_sriov_configure,</div><div class='add'>+	.err_handler = &amp;pdsc_err_handler,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void *pdsc_get_pf_struct(struct pci_dev *vf_pdev)</div><div class='add'>+{</div><div class='add'>+	return pci_iov_get_pf_drvdata(vf_pdev, &amp;pdsc_driver);</div><div class='add'>+}</div><div class='add'>+EXPORT_SYMBOL_GPL(pdsc_get_pf_struct);</div><div class='add'>+</div><div class='add'>+static int __init pdsc_init_module(void)</div><div class='add'>+{</div><div class='add'>+	if (strcmp(KBUILD_MODNAME, PDS_CORE_DRV_NAME))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	pdsc_debugfs_create();</div><div class='add'>+	return pci_register_driver(&amp;pdsc_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit pdsc_cleanup_module(void)</div><div class='add'>+{</div><div class='add'>+	pci_unregister_driver(&amp;pdsc_driver);</div><div class='add'>+	pdsc_debugfs_destroy();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(pdsc_init_module);</div><div class='add'>+module_exit(pdsc_cleanup_module);</div><div class='head'>diff --git a/drivers/net/ethernet/amd/sun3lance.c b/drivers/net/ethernet/amd/sun3lance.c<br/>index 3d8c6b2cdea4..c60df4a21158 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/sun3lance.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/sun3lance.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/sun3lance.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/sun3lance.c</a></div><div class='hunk'>@@ -21,7 +21,8 @@</div><div class='ctx'> </div><div class='ctx'> */</div><div class='ctx'> </div><div class='del'>-static char *version = "sun3lance.c: v1.2 1/12/2001  Sam Creasey (sammy@sammy.net)\n";</div><div class='add'>+static const char version[] =</div><div class='add'>+"sun3lance.c: v1.2 1/12/2001  Sam Creasey (sammy@sammy.net)\n";</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/stddef.h&gt;</div><div class='hunk'>@@ -36,12 +37,12 @@ static char *version = "sun3lance.c: v1.2 1/12/2001  Sam Creasey (sammy@sammy.ne</div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='ctx'> #include &lt;linux/skbuff.h&gt;</div><div class='ctx'> #include &lt;linux/bitops.h&gt;</div><div class='add'>+#include &lt;linux/pgtable.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/cacheflush.h&gt;</div><div class='ctx'> #include &lt;asm/setup.h&gt;</div><div class='ctx'> #include &lt;asm/irq.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/dvma.h&gt;</div><div class='ctx'> #include &lt;asm/idprom.h&gt;</div><div class='ctx'> #include &lt;asm/machines.h&gt;</div><div class='hunk'>@@ -73,6 +74,7 @@ static int lance_debug = 1;</div><div class='ctx'> #endif</div><div class='ctx'> module_param(lance_debug, int, 0);</div><div class='ctx'> MODULE_PARM_DESC(lance_debug, "SUN3 Lance debug level (0-3)");</div><div class='add'>+MODULE_DESCRIPTION("Sun3/Sun3x on-board LANCE Ethernet driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='ctx'> </div><div class='ctx'> #define	DPRINTK(n,a) \</div><div class='hunk'>@@ -149,7 +151,7 @@ struct lance_memory {</div><div class='ctx'> struct lance_private {</div><div class='ctx'> 	volatile unsigned short	*iobase;</div><div class='ctx'> 	struct lance_memory	*mem;</div><div class='del'>-     	int new_rx, new_tx;	/* The next free ring entry */</div><div class='add'>+	int new_rx, new_tx;	/* The next free ring entry */</div><div class='ctx'> 	int old_tx, old_rx;     /* ring entry to be processed */</div><div class='ctx'> /* These two must be longs for set_bit() */</div><div class='ctx'> 	long	    tx_full;</div><div class='hunk'>@@ -235,7 +237,8 @@ struct lance_private {</div><div class='ctx'> static int lance_probe( struct net_device *dev);</div><div class='ctx'> static int lance_open( struct net_device *dev );</div><div class='ctx'> static void lance_init_ring( struct net_device *dev );</div><div class='del'>-static int lance_start_xmit( struct sk_buff *skb, struct net_device *dev );</div><div class='add'>+static netdev_tx_t lance_start_xmit(struct sk_buff *skb,</div><div class='add'>+				    struct net_device *dev);</div><div class='ctx'> static irqreturn_t lance_interrupt( int irq, void *dev_id);</div><div class='ctx'> static int lance_rx( struct net_device *dev );</div><div class='ctx'> static int lance_close( struct net_device *dev );</div><div class='hunk'>@@ -243,7 +246,7 @@ static void set_multicast_list( struct net_device *dev );</div><div class='ctx'> </div><div class='ctx'> /************************* End of Prototypes **************************/</div><div class='ctx'> </div><div class='del'>-struct net_device * __init sun3lance_probe(int unit)</div><div class='add'>+static struct net_device * __init sun3lance_probe(void)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev;</div><div class='ctx'> 	static int found;</div><div class='hunk'>@@ -270,10 +273,6 @@ struct net_device * __init sun3lance_probe(int unit)</div><div class='ctx'> 	dev = alloc_etherdev(sizeof(struct lance_private));</div><div class='ctx'> 	if (!dev)</div><div class='ctx'> 		return ERR_PTR(-ENOMEM);</div><div class='del'>-	if (unit &gt;= 0) {</div><div class='del'>-		sprintf(dev-&gt;name, "eth%d", unit);</div><div class='del'>-		netdev_boot_setup_check(dev);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	if (!lance_probe(dev))</div><div class='ctx'> 		goto out;</div><div class='hunk'>@@ -299,7 +298,6 @@ static const struct net_device_ops lance_netdev_ops = {</div><div class='ctx'> 	.ndo_start_xmit		= lance_start_xmit,</div><div class='ctx'> 	.ndo_set_rx_mode	= set_multicast_list,</div><div class='ctx'> 	.ndo_set_mac_address	= NULL,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -308,7 +306,6 @@ static int __init lance_probe( struct net_device *dev)</div><div class='ctx'> 	unsigned long ioaddr;</div><div class='ctx'> </div><div class='ctx'> 	struct lance_private	*lp;</div><div class='del'>-	int 			i;</div><div class='ctx'> 	static int 		did_version;</div><div class='ctx'> 	volatile unsigned short *ioaddr_probe;</div><div class='ctx'> 	unsigned short tmp1, tmp2;</div><div class='hunk'>@@ -345,7 +342,7 @@ static int __init lance_probe( struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	/* XXX - leak? */</div><div class='ctx'> 	MEM = dvma_malloc_align(sizeof(struct lance_memory), 0x10000);</div><div class='del'>-	if (MEM == NULL) {</div><div class='add'>+	if (!MEM) {</div><div class='ctx'> #ifdef CONFIG_SUN3</div><div class='ctx'> 		iounmap((void __iomem *)ioaddr);</div><div class='ctx'> #endif</div><div class='hunk'>@@ -376,8 +373,7 @@ static int __init lance_probe( struct net_device *dev)</div><div class='ctx'> 		   dev-&gt;irq);</div><div class='ctx'> </div><div class='ctx'> 	/* copy in the ethernet address from the prom */</div><div class='del'>-	for(i = 0; i &lt; 6 ; i++)</div><div class='del'>-	     dev-&gt;dev_addr[i] = idprom-&gt;id_ethaddr[i];</div><div class='add'>+	eth_hw_addr_set(dev, idprom-&gt;id_ethaddr);</div><div class='ctx'> </div><div class='ctx'> 	/* tell the card it's ether address, bytes swapped */</div><div class='ctx'> 	MEM-&gt;init.hwaddr[0] = dev-&gt;dev_addr[1];</div><div class='hunk'>@@ -464,7 +460,7 @@ static void lance_init_ring( struct net_device *dev )</div><div class='ctx'> 	for( i = 0; i &lt; TX_RING_SIZE; i++ ) {</div><div class='ctx'> 		MEM-&gt;tx_head[i].base = dvma_vtob(MEM-&gt;tx_data[i]);</div><div class='ctx'> 		MEM-&gt;tx_head[i].flag = 0;</div><div class='del'>- 		MEM-&gt;tx_head[i].base_hi =</div><div class='add'>+		MEM-&gt;tx_head[i].base_hi =</div><div class='ctx'> 			(dvma_vtob(MEM-&gt;tx_data[i])) &gt;&gt;16;</div><div class='ctx'> 		MEM-&gt;tx_head[i].length = 0;</div><div class='ctx'> 		MEM-&gt;tx_head[i].misc = 0;</div><div class='hunk'>@@ -511,7 +507,8 @@ static void lance_init_ring( struct net_device *dev )</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-static int lance_start_xmit( struct sk_buff *skb, struct net_device *dev )</div><div class='add'>+static netdev_tx_t</div><div class='add'>+lance_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct lance_private *lp = netdev_priv(dev);</div><div class='ctx'> 	int entry, len;</div><div class='hunk'>@@ -579,8 +576,8 @@ static int lance_start_xmit( struct sk_buff *skb, struct net_device *dev )</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	AREG = CSR0;</div><div class='del'>-  	DPRINTK( 2, ( "%s: lance_start_xmit() called, csr0 %4.4x.\n",</div><div class='del'>-  				  dev-&gt;name, DREG ));</div><div class='add'>+	DPRINTK( 2, ( "%s: lance_start_xmit() called, csr0 %4.4x.\n",</div><div class='add'>+				  dev-&gt;name, DREG ));</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_SUN3X</div><div class='ctx'> 	/* this weirdness doesn't appear on sun3... */</div><div class='hunk'>@@ -634,8 +631,8 @@ static int lance_start_xmit( struct sk_buff *skb, struct net_device *dev )</div><div class='ctx'> 	/* Trigger an immediate send poll. */</div><div class='ctx'> 	REGA(CSR0) = CSR0_INEA | CSR0_TDMD | CSR0_STRT;</div><div class='ctx'> 	AREG = CSR0;</div><div class='del'>-  	DPRINTK( 2, ( "%s: lance_start_xmit() exiting, csr0 %4.4x.\n",</div><div class='del'>-  				  dev-&gt;name, DREG ));</div><div class='add'>+	DPRINTK( 2, ( "%s: lance_start_xmit() exiting, csr0 %4.4x.\n",</div><div class='add'>+				  dev-&gt;name, DREG ));</div><div class='ctx'> 	dev_kfree_skb(skb);</div><div class='ctx'> </div><div class='ctx'> 	lp-&gt;lock = 0;</div><div class='hunk'>@@ -655,16 +652,6 @@ static irqreturn_t lance_interrupt( int irq, void *dev_id)</div><div class='ctx'> 	struct net_device *dev = dev_id;</div><div class='ctx'> 	struct lance_private *lp = netdev_priv(dev);</div><div class='ctx'> 	int csr0;</div><div class='del'>-	static int in_interrupt;</div><div class='del'>-</div><div class='del'>-	if (dev == NULL) {</div><div class='del'>-		DPRINTK( 1, ( "lance_interrupt(): invalid dev_id\n" ));</div><div class='del'>-		return IRQ_NONE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (in_interrupt)</div><div class='del'>-		DPRINTK( 2, ( "%s: Re-entering the interrupt handler.\n", dev-&gt;name ));</div><div class='del'>-	in_interrupt = 1;</div><div class='ctx'> </div><div class='ctx'>  still_more:</div><div class='ctx'> 	flush_cache_all();</div><div class='hunk'>@@ -772,7 +759,6 @@ static irqreturn_t lance_interrupt( int irq, void *dev_id)</div><div class='ctx'> </div><div class='ctx'> 	DPRINTK( 2, ( "%s: exiting interrupt, csr0=%#04x.\n",</div><div class='ctx'> 				  dev-&gt;name, DREG ));</div><div class='del'>-	in_interrupt = 0;</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -811,7 +797,7 @@ static int lance_rx( struct net_device *dev )</div><div class='ctx'> 			}</div><div class='ctx'> 			else {</div><div class='ctx'> 				skb = netdev_alloc_skb(dev, pkt_len + 2);</div><div class='del'>-				if (skb == NULL) {</div><div class='add'>+				if (!skb) {</div><div class='ctx'> 					dev-&gt;stats.rx_dropped++;</div><div class='ctx'> 					head-&gt;msg_length = 0;</div><div class='ctx'> 					head-&gt;flag |= RMD1_OWN_CHIP;</div><div class='hunk'>@@ -933,17 +919,16 @@ static void set_multicast_list( struct net_device *dev )</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-#ifdef MODULE</div><div class='del'>-</div><div class='ctx'> static struct net_device *sun3lance_dev;</div><div class='ctx'> </div><div class='del'>-int __init init_module(void)</div><div class='add'>+static int __init sun3lance_init(void)</div><div class='ctx'> {</div><div class='del'>-	sun3lance_dev = sun3lance_probe(-1);</div><div class='add'>+	sun3lance_dev = sun3lance_probe();</div><div class='ctx'> 	return PTR_ERR_OR_ZERO(sun3lance_dev);</div><div class='ctx'> }</div><div class='add'>+module_init(sun3lance_init);</div><div class='ctx'> </div><div class='del'>-void __exit cleanup_module(void)</div><div class='add'>+static void __exit sun3lance_cleanup(void)</div><div class='ctx'> {</div><div class='ctx'> 	unregister_netdev(sun3lance_dev);</div><div class='ctx'> #ifdef CONFIG_SUN3</div><div class='hunk'>@@ -951,6 +936,4 @@ void __exit cleanup_module(void)</div><div class='ctx'> #endif</div><div class='ctx'> 	free_netdev(sun3lance_dev);</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-#endif /* MODULE */</div><div class='del'>-</div><div class='add'>+module_exit(sun3lance_cleanup);</div><div class='head'>diff --git a/drivers/net/ethernet/amd/sunlance.c b/drivers/net/ethernet/amd/sunlance.c<br/>index 7847638bdd22..0b273327f5a6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/sunlance.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/sunlance.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/sunlance.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/sunlance.c</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /* $Id: sunlance.c,v 1.112 2002/01/15 06:48:55 davem Exp $</div><div class='ctx'>  * lance.c: Linux/Sparc/Lance driver</div><div class='ctx'>  *</div><div class='hunk'>@@ -91,12 +92,12 @@ static char lancestr[] = "LANCE";</div><div class='ctx'> #include &lt;linux/bitops.h&gt;</div><div class='ctx'> #include &lt;linux/dma-mapping.h&gt;</div><div class='ctx'> #include &lt;linux/of.h&gt;</div><div class='del'>-#include &lt;linux/of_device.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/gfp.h&gt;</div><div class='add'>+#include &lt;linux/pgtable.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/dma.h&gt;</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/byteorder.h&gt;	/* Used by the checksum routines */</div><div class='ctx'> #include &lt;asm/idprom.h&gt;</div><div class='ctx'> #include &lt;asm/prom.h&gt;</div><div class='hunk'>@@ -104,14 +105,9 @@ static char lancestr[] = "LANCE";</div><div class='ctx'> #include &lt;asm/irq.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define DRV_NAME	"sunlance"</div><div class='del'>-#define DRV_VERSION	"2.02"</div><div class='ctx'> #define DRV_RELDATE	"8/24/03"</div><div class='ctx'> #define DRV_AUTHOR	"Miguel de Icaza (miguel@nuclecu.unam.mx)"</div><div class='ctx'> </div><div class='del'>-static char version[] =</div><div class='del'>-	DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " " DRV_AUTHOR "\n";</div><div class='del'>-</div><div class='del'>-MODULE_VERSION(DRV_VERSION);</div><div class='ctx'> MODULE_AUTHOR(DRV_AUTHOR);</div><div class='ctx'> MODULE_DESCRIPTION("Sun Lance ethernet driver");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='hunk'>@@ -534,7 +530,7 @@ static void lance_rx_dvma(struct net_device *dev)</div><div class='ctx'> 			len = (rd-&gt;mblength &amp; 0xfff) - 4;</div><div class='ctx'> 			skb = netdev_alloc_skb(dev, len + 2);</div><div class='ctx'> </div><div class='del'>-			if (skb == NULL) {</div><div class='add'>+			if (!skb) {</div><div class='ctx'> 				dev-&gt;stats.rx_dropped++;</div><div class='ctx'> 				rd-&gt;mblength = 0;</div><div class='ctx'> 				rd-&gt;rmd1_bits = LE_R1_OWN;</div><div class='hunk'>@@ -704,7 +700,7 @@ static void lance_rx_pio(struct net_device *dev)</div><div class='ctx'> 			len = (sbus_readw(&amp;rd-&gt;mblength) &amp; 0xfff) - 4;</div><div class='ctx'> 			skb = netdev_alloc_skb(dev, len + 2);</div><div class='ctx'> </div><div class='del'>-			if (skb == NULL) {</div><div class='add'>+			if (!skb) {</div><div class='ctx'> 				dev-&gt;stats.rx_dropped++;</div><div class='ctx'> 				sbus_writew(0, &amp;rd-&gt;mblength);</div><div class='ctx'> 				sbus_writeb(LE_R1_OWN, &amp;rd-&gt;rmd1_bits);</div><div class='hunk'>@@ -967,7 +963,7 @@ static int lance_close(struct net_device *dev)</div><div class='ctx'> 	struct lance_private *lp = netdev_priv(dev);</div><div class='ctx'> </div><div class='ctx'> 	netif_stop_queue(dev);</div><div class='del'>-	del_timer_sync(&amp;lp-&gt;multicast_timer);</div><div class='add'>+	timer_delete_sync(&amp;lp-&gt;multicast_timer);</div><div class='ctx'> </div><div class='ctx'> 	STOP_LANCE(lp);</div><div class='ctx'> </div><div class='hunk'>@@ -997,7 +993,7 @@ static int lance_reset(struct net_device *dev)</div><div class='ctx'> 	}</div><div class='ctx'> 	lp-&gt;init_ring(dev);</div><div class='ctx'> 	load_csrs(lp);</div><div class='del'>-	dev-&gt;trans_start = jiffies; /* prevent tx timeout */</div><div class='add'>+	netif_trans_update(dev); /* prevent tx timeout */</div><div class='ctx'> 	status = init_restart_lance(lp);</div><div class='ctx'> 	return status;</div><div class='ctx'> }</div><div class='hunk'>@@ -1096,7 +1092,7 @@ static void lance_piozero(void __iomem *dest, int len)</div><div class='ctx'> 		sbus_writeb(0, piobuf);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void lance_tx_timeout(struct net_device *dev)</div><div class='add'>+static void lance_tx_timeout(struct net_device *dev, unsigned int txqueue)</div><div class='ctx'> {</div><div class='ctx'> 	struct lance_private *lp = netdev_priv(dev);</div><div class='ctx'> </div><div class='hunk'>@@ -1106,7 +1102,7 @@ static void lance_tx_timeout(struct net_device *dev)</div><div class='ctx'> 	netif_wake_queue(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='add'>+static netdev_tx_t lance_start_xmit(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct lance_private *lp = netdev_priv(dev);</div><div class='ctx'> 	int entry, skblen, len;</div><div class='hunk'>@@ -1248,9 +1244,10 @@ static void lance_set_multicast(struct net_device *dev)</div><div class='ctx'> 	netif_wake_queue(dev);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void lance_set_multicast_retry(unsigned long _opaque)</div><div class='add'>+static void lance_set_multicast_retry(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *dev = (struct net_device *) _opaque;</div><div class='add'>+	struct lance_private *lp = timer_container_of(lp, t, multicast_timer);</div><div class='add'>+	struct net_device *dev = lp-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 	lance_set_multicast(dev);</div><div class='ctx'> }</div><div class='hunk'>@@ -1279,8 +1276,7 @@ static void lance_free_hwresources(struct lance_private *lp)</div><div class='ctx'> /* Ethtool support... */</div><div class='ctx'> static void sparc_lance_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)</div><div class='ctx'> {</div><div class='del'>-	strlcpy(info-&gt;driver, "sunlance", sizeof(info-&gt;driver));</div><div class='del'>-	strlcpy(info-&gt;version, "2.02", sizeof(info-&gt;version));</div><div class='add'>+	strscpy(info-&gt;driver, "sunlance", sizeof(info-&gt;driver));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops sparc_lance_ethtool_ops = {</div><div class='hunk'>@@ -1294,7 +1290,6 @@ static const struct net_device_ops sparc_lance_ops = {</div><div class='ctx'> 	.ndo_start_xmit		= lance_start_xmit,</div><div class='ctx'> 	.ndo_set_rx_mode	= lance_set_multicast,</div><div class='ctx'> 	.ndo_tx_timeout		= lance_tx_timeout,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='ctx'> 	.ndo_set_mac_address	= eth_mac_addr,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> };</div><div class='hunk'>@@ -1304,10 +1299,8 @@ static int sparc_lance_probe_one(struct platform_device *op,</div><div class='ctx'> 				 struct platform_device *lebuffer)</div><div class='ctx'> {</div><div class='ctx'> 	struct device_node *dp = op-&gt;dev.of_node;</div><div class='del'>-	static unsigned version_printed;</div><div class='ctx'> 	struct lance_private *lp;</div><div class='ctx'> 	struct net_device *dev;</div><div class='del'>-	int    i;</div><div class='ctx'> </div><div class='ctx'> 	dev = alloc_etherdev(sizeof(struct lance_private) + 8);</div><div class='ctx'> 	if (!dev)</div><div class='hunk'>@@ -1315,17 +1308,13 @@ static int sparc_lance_probe_one(struct platform_device *op,</div><div class='ctx'> </div><div class='ctx'> 	lp = netdev_priv(dev);</div><div class='ctx'> </div><div class='del'>-	if (sparc_lance_debug &amp;&amp; version_printed++ == 0)</div><div class='del'>-		printk (KERN_INFO "%s", version);</div><div class='del'>-</div><div class='ctx'> 	spin_lock_init(&amp;lp-&gt;lock);</div><div class='ctx'> </div><div class='ctx'> 	/* Copy the IDPROM ethernet address to the device structure, later we</div><div class='ctx'> 	 * will copy the address in the device structure to the lance</div><div class='ctx'> 	 * initialization block.</div><div class='ctx'> 	 */</div><div class='del'>-	for (i = 0; i &lt; 6; i++)</div><div class='del'>-		dev-&gt;dev_addr[i] = idprom-&gt;id_ethaddr[i];</div><div class='add'>+	eth_hw_addr_set(dev, idprom-&gt;id_ethaddr);</div><div class='ctx'> </div><div class='ctx'> 	/* Get the IO region */</div><div class='ctx'> 	lp-&gt;lregs = of_ioremap(&amp;op-&gt;resource[0], 0,</div><div class='hunk'>@@ -1419,7 +1408,7 @@ static int sparc_lance_probe_one(struct platform_device *op,</div><div class='ctx'> </div><div class='ctx'> 			prop = of_get_property(nd, "tpe-link-test?", NULL);</div><div class='ctx'> 			if (!prop)</div><div class='del'>-				goto no_link_test;</div><div class='add'>+				goto node_put;</div><div class='ctx'> </div><div class='ctx'> 			if (strcmp(prop, "true")) {</div><div class='ctx'> 				printk(KERN_NOTICE "SunLance: warning: overriding option "</div><div class='hunk'>@@ -1428,6 +1417,8 @@ static int sparc_lance_probe_one(struct platform_device *op,</div><div class='ctx'> 				       "to ecd@skynet.be\n");</div><div class='ctx'> 				auxio_set_lte(AUXIO_LTE_ON);</div><div class='ctx'> 			}</div><div class='add'>+node_put:</div><div class='add'>+			of_node_put(nd);</div><div class='ctx'> no_link_test:</div><div class='ctx'> 			lp-&gt;auto_select = 1;</div><div class='ctx'> 			lp-&gt;tpe = 0;</div><div class='hunk'>@@ -1460,9 +1451,7 @@ no_link_test:</div><div class='ctx'> 	 * can occur from interrupts (ex. IPv6).  So we</div><div class='ctx'> 	 * use a timer to try again later when necessary. -DaveM</div><div class='ctx'> 	 */</div><div class='del'>-	init_timer(&amp;lp-&gt;multicast_timer);</div><div class='del'>-	lp-&gt;multicast_timer.data = (unsigned long) dev;</div><div class='del'>-	lp-&gt;multicast_timer.function = lance_set_multicast_retry;</div><div class='add'>+	timer_setup(&amp;lp-&gt;multicast_timer, lance_set_multicast_retry, 0);</div><div class='ctx'> </div><div class='ctx'> 	if (register_netdev(dev)) {</div><div class='ctx'> 		printk(KERN_ERR "SunLance: Cannot register device.\n");</div><div class='hunk'>@@ -1488,9 +1477,9 @@ static int sunlance_sbus_probe(struct platform_device *op)</div><div class='ctx'> 	struct device_node *parent_dp = parent-&gt;dev.of_node;</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='del'>-	if (!strcmp(parent_dp-&gt;name, "ledma")) {</div><div class='add'>+	if (of_node_name_eq(parent_dp, "ledma")) {</div><div class='ctx'> 		err = sparc_lance_probe_one(op, parent, NULL);</div><div class='del'>-	} else if (!strcmp(parent_dp-&gt;name, "lebuffer")) {</div><div class='add'>+	} else if (of_node_name_eq(parent_dp, "lebuffer")) {</div><div class='ctx'> 		err = sparc_lance_probe_one(op, NULL, parent);</div><div class='ctx'> 	} else</div><div class='ctx'> 		err = sparc_lance_probe_one(op, NULL, NULL);</div><div class='hunk'>@@ -1498,7 +1487,7 @@ static int sunlance_sbus_probe(struct platform_device *op)</div><div class='ctx'> 	return err;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int sunlance_sbus_remove(struct platform_device *op)</div><div class='add'>+static void sunlance_sbus_remove(struct platform_device *op)</div><div class='ctx'> {</div><div class='ctx'> 	struct lance_private *lp = platform_get_drvdata(op);</div><div class='ctx'> 	struct net_device *net_dev = lp-&gt;dev;</div><div class='hunk'>@@ -1508,8 +1497,6 @@ static int sunlance_sbus_remove(struct platform_device *op)</div><div class='ctx'> 	lance_free_hwresources(lp);</div><div class='ctx'> </div><div class='ctx'> 	free_netdev(net_dev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id sunlance_sbus_match[] = {</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/Makefile b/drivers/net/ethernet/amd/xgbe/Makefile<br/>index 171a7e68048d..5992f7fd4d9b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/Makefile?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/xgbe/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/Makefile</a></div><div class='hunk'>@@ -1,8 +1,12 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> obj-$(CONFIG_AMD_XGBE) += amd-xgbe.o</div><div class='ctx'> </div><div class='ctx'> amd-xgbe-objs := xgbe-main.o xgbe-drv.o xgbe-dev.o \</div><div class='ctx'> 		 xgbe-desc.o xgbe-ethtool.o xgbe-mdio.o \</div><div class='del'>-		 xgbe-ptp.o</div><div class='add'>+		 xgbe-hwtstamp.o xgbe-ptp.o xgbe-pps.o \</div><div class='add'>+		 xgbe-i2c.o xgbe-phy-v1.o xgbe-phy-v2.o \</div><div class='add'>+		 xgbe-platform.o xgbe-selftest.o</div><div class='ctx'> </div><div class='add'>+amd-xgbe-$(CONFIG_PCI) += xgbe-pci.o</div><div class='ctx'> amd-xgbe-$(CONFIG_AMD_XGBE_DCB) += xgbe-dcb.o</div><div class='ctx'> amd-xgbe-$(CONFIG_DEBUG_FS) += xgbe-debugfs.o</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-common.h b/drivers/net/ethernet/amd/xgbe/xgbe-common.h<br/>index b6fa89102526..62b01de93db4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-common.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/xgbe/xgbe-common.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-common.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe-common.h</a></div><div class='hunk'>@@ -1,117 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='ctx'> /*</div><div class='del'>- * AMD 10Gb Ethernet driver</div><div class='del'>- *</div><div class='del'>- * This file is available to you under your choice of the following two</div><div class='del'>- * licenses:</div><div class='del'>- *</div><div class='del'>- * License 1: GPLv2</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014 Advanced Micro Devices, Inc.</div><div class='del'>- *</div><div class='del'>- * This file is free software; you may copy, redistribute and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation, either version 2 of the License, or (at</div><div class='del'>- * your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This file is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- * License 2: Modified BSD</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014 Advanced Micro Devices, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * Redistribution and use in source and binary forms, with or without</div><div class='del'>- * modification, are permitted provided that the following conditions are met:</div><div class='del'>- *     * Redistributions of source code must retain the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer.</div><div class='del'>- *     * Redistributions in binary form must reproduce the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer in the</div><div class='del'>- *       documentation and/or other materials provided with the distribution.</div><div class='del'>- *     * Neither the name of Advanced Micro Devices, Inc. nor the</div><div class='del'>- *       names of its contributors may be used to endorse or promote products</div><div class='del'>- *       derived from this software without specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"</div><div class='del'>- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE</div><div class='del'>- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE</div><div class='del'>- * ARE DISCLAIMED. IN NO EVENT SHALL &lt;COPYRIGHT HOLDER&gt; BE LIABLE FOR ANY</div><div class='del'>- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES</div><div class='del'>- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;</div><div class='del'>- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND</div><div class='del'>- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='del'>- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF</div><div class='del'>- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef __XGBE_COMMON_H__</div><div class='hunk'>@@ -123,52 +14,46 @@</div><div class='ctx'> #define DMA_ISR				0x3008</div><div class='ctx'> #define DMA_AXIARCR			0x3010</div><div class='ctx'> #define DMA_AXIAWCR			0x3018</div><div class='add'>+#define DMA_AXIAWARCR			0x301c</div><div class='ctx'> #define DMA_DSR0			0x3020</div><div class='ctx'> #define DMA_DSR1			0x3024</div><div class='add'>+#define DMA_TXEDMACR			0x3040</div><div class='add'>+#define DMA_RXEDMACR			0x3044</div><div class='ctx'> </div><div class='ctx'> /* DMA register entry bit positions and sizes */</div><div class='del'>-#define DMA_AXIARCR_DRC_INDEX		0</div><div class='del'>-#define DMA_AXIARCR_DRC_WIDTH		4</div><div class='del'>-#define DMA_AXIARCR_DRD_INDEX		4</div><div class='del'>-#define DMA_AXIARCR_DRD_WIDTH		2</div><div class='del'>-#define DMA_AXIARCR_TEC_INDEX		8</div><div class='del'>-#define DMA_AXIARCR_TEC_WIDTH		4</div><div class='del'>-#define DMA_AXIARCR_TED_INDEX		12</div><div class='del'>-#define DMA_AXIARCR_TED_WIDTH		2</div><div class='del'>-#define DMA_AXIARCR_THC_INDEX		16</div><div class='del'>-#define DMA_AXIARCR_THC_WIDTH		4</div><div class='del'>-#define DMA_AXIARCR_THD_INDEX		20</div><div class='del'>-#define DMA_AXIARCR_THD_WIDTH		2</div><div class='del'>-#define DMA_AXIAWCR_DWC_INDEX		0</div><div class='del'>-#define DMA_AXIAWCR_DWC_WIDTH		4</div><div class='del'>-#define DMA_AXIAWCR_DWD_INDEX		4</div><div class='del'>-#define DMA_AXIAWCR_DWD_WIDTH		2</div><div class='del'>-#define DMA_AXIAWCR_RPC_INDEX		8</div><div class='del'>-#define DMA_AXIAWCR_RPC_WIDTH		4</div><div class='del'>-#define DMA_AXIAWCR_RPD_INDEX		12</div><div class='del'>-#define DMA_AXIAWCR_RPD_WIDTH		2</div><div class='del'>-#define DMA_AXIAWCR_RHC_INDEX		16</div><div class='del'>-#define DMA_AXIAWCR_RHC_WIDTH		4</div><div class='del'>-#define DMA_AXIAWCR_RHD_INDEX		20</div><div class='del'>-#define DMA_AXIAWCR_RHD_WIDTH		2</div><div class='del'>-#define DMA_AXIAWCR_TDC_INDEX		24</div><div class='del'>-#define DMA_AXIAWCR_TDC_WIDTH		4</div><div class='del'>-#define DMA_AXIAWCR_TDD_INDEX		28</div><div class='del'>-#define DMA_AXIAWCR_TDD_WIDTH		2</div><div class='ctx'> #define DMA_ISR_MACIS_INDEX		17</div><div class='ctx'> #define DMA_ISR_MACIS_WIDTH		1</div><div class='ctx'> #define DMA_ISR_MTLIS_INDEX		16</div><div class='ctx'> #define DMA_ISR_MTLIS_WIDTH		1</div><div class='add'>+#define DMA_MR_INTM_INDEX		12</div><div class='add'>+#define DMA_MR_INTM_WIDTH		2</div><div class='ctx'> #define DMA_MR_SWR_INDEX		0</div><div class='ctx'> #define DMA_MR_SWR_WIDTH		1</div><div class='add'>+#define DMA_RXEDMACR_RDPS_INDEX		0</div><div class='add'>+#define DMA_RXEDMACR_RDPS_WIDTH		3</div><div class='add'>+#define DMA_SBMR_AAL_INDEX		12</div><div class='add'>+#define DMA_SBMR_AAL_WIDTH		1</div><div class='ctx'> #define DMA_SBMR_EAME_INDEX		11</div><div class='ctx'> #define DMA_SBMR_EAME_WIDTH		1</div><div class='del'>-#define DMA_SBMR_BLEN_256_INDEX		7</div><div class='del'>-#define DMA_SBMR_BLEN_256_WIDTH		1</div><div class='add'>+#define DMA_SBMR_BLEN_INDEX		1</div><div class='add'>+#define DMA_SBMR_BLEN_WIDTH		7</div><div class='add'>+#define DMA_SBMR_RD_OSR_LMT_INDEX	16</div><div class='add'>+#define DMA_SBMR_RD_OSR_LMT_WIDTH	6</div><div class='ctx'> #define DMA_SBMR_UNDEF_INDEX		0</div><div class='ctx'> #define DMA_SBMR_UNDEF_WIDTH		1</div><div class='add'>+#define DMA_SBMR_WR_OSR_LMT_INDEX	24</div><div class='add'>+#define DMA_SBMR_WR_OSR_LMT_WIDTH	6</div><div class='add'>+#define DMA_TXEDMACR_TDPS_INDEX		0</div><div class='add'>+#define DMA_TXEDMACR_TDPS_WIDTH		3</div><div class='ctx'> </div><div class='ctx'> /* DMA register values */</div><div class='add'>+#define DMA_SBMR_BLEN_256		256</div><div class='add'>+#define DMA_SBMR_BLEN_128		128</div><div class='add'>+#define DMA_SBMR_BLEN_64		64</div><div class='add'>+#define DMA_SBMR_BLEN_32		32</div><div class='add'>+#define DMA_SBMR_BLEN_16		16</div><div class='add'>+#define DMA_SBMR_BLEN_8			8</div><div class='add'>+#define DMA_SBMR_BLEN_4			4</div><div class='ctx'> #define DMA_DSR_RPS_WIDTH		4</div><div class='ctx'> #define DMA_DSR_TPS_WIDTH		4</div><div class='ctx'> #define DMA_DSR_Q_WIDTH			(DMA_DSR_RPS_WIDTH + DMA_DSR_TPS_WIDTH)</div><div class='hunk'>@@ -216,11 +101,15 @@</div><div class='ctx'> #define DMA_CH_CR_PBLX8_WIDTH		1</div><div class='ctx'> #define DMA_CH_CR_SPH_INDEX		24</div><div class='ctx'> #define DMA_CH_CR_SPH_WIDTH		1</div><div class='del'>-#define DMA_CH_IER_AIE_INDEX		15</div><div class='add'>+#define DMA_CH_IER_AIE20_INDEX		15</div><div class='add'>+#define DMA_CH_IER_AIE20_WIDTH		1</div><div class='add'>+#define DMA_CH_IER_AIE_INDEX		14</div><div class='ctx'> #define DMA_CH_IER_AIE_WIDTH		1</div><div class='ctx'> #define DMA_CH_IER_FBEE_INDEX		12</div><div class='ctx'> #define DMA_CH_IER_FBEE_WIDTH		1</div><div class='del'>-#define DMA_CH_IER_NIE_INDEX		16</div><div class='add'>+#define DMA_CH_IER_NIE20_INDEX		16</div><div class='add'>+#define DMA_CH_IER_NIE20_WIDTH		1</div><div class='add'>+#define DMA_CH_IER_NIE_INDEX		15</div><div class='ctx'> #define DMA_CH_IER_NIE_WIDTH		1</div><div class='ctx'> #define DMA_CH_IER_RBUE_INDEX		7</div><div class='ctx'> #define DMA_CH_IER_RBUE_WIDTH		1</div><div class='hunk'>@@ -304,11 +193,17 @@</div><div class='ctx'> #define MAC_RWKPFR			0x00c4</div><div class='ctx'> #define MAC_LPICSR			0x00d0</div><div class='ctx'> #define MAC_LPITCR			0x00d4</div><div class='add'>+#define MAC_TIR				0x00e0</div><div class='ctx'> #define MAC_VR				0x0110</div><div class='ctx'> #define MAC_DR				0x0114</div><div class='ctx'> #define MAC_HWF0R			0x011c</div><div class='ctx'> #define MAC_HWF1R			0x0120</div><div class='ctx'> #define MAC_HWF2R			0x0124</div><div class='add'>+#define MAC_MDIOSCAR			0x0200</div><div class='add'>+#define MAC_MDIOSCCDR			0x0204</div><div class='add'>+#define MAC_MDIOISR			0x0214</div><div class='add'>+#define MAC_MDIOIER			0x0218</div><div class='add'>+#define MAC_MDIOCL22R			0x0220</div><div class='ctx'> #define MAC_GPIOCR			0x0278</div><div class='ctx'> #define MAC_GPIOSR			0x027c</div><div class='ctx'> #define MAC_MACA0HR			0x0300</div><div class='hunk'>@@ -328,7 +223,15 @@</div><div class='ctx'> #define MAC_TSSR			0x0d20</div><div class='ctx'> #define MAC_TXSNR			0x0d30</div><div class='ctx'> #define MAC_TXSSR			0x0d34</div><div class='del'>-</div><div class='add'>+#define MAC_TICNR                       0x0d58</div><div class='add'>+#define MAC_TICSNR                      0x0d5C</div><div class='add'>+#define MAC_TECNR                       0x0d60</div><div class='add'>+#define MAC_TECSNR                      0x0d64</div><div class='add'>+#define MAC_PPSCR			0x0d70</div><div class='add'>+#define MAC_PPS0_TTSR			0x0d80</div><div class='add'>+#define MAC_PPS0_TTNSR			0x0d84</div><div class='add'>+#define MAC_PPS0_INTERVAL		0x0d88</div><div class='add'>+#define MAC_PPS0_WIDTH			0x0d8C</div><div class='ctx'> #define MAC_QTFCR_INC			4</div><div class='ctx'> #define MAC_MACA_INC			4</div><div class='ctx'> #define MAC_HTR_INC			4</div><div class='hunk'>@@ -336,6 +239,18 @@</div><div class='ctx'> #define MAC_RQC2_INC			4</div><div class='ctx'> #define MAC_RQC2_Q_PER_REG		4</div><div class='ctx'> </div><div class='add'>+/* PPS helpers */</div><div class='add'>+#define PPSEN0				BIT(4)</div><div class='add'>+#define MAC_PPSx_TTSR(x)		((MAC_PPS0_TTSR) + ((x) * 0x10))</div><div class='add'>+#define MAC_PPSx_TTNSR(x)		((MAC_PPS0_TTNSR) + ((x) * 0x10))</div><div class='add'>+#define MAC_PPSx_INTERVAL(x)		((MAC_PPS0_INTERVAL) + ((x) * 0x10))</div><div class='add'>+#define MAC_PPSx_WIDTH(x)		((MAC_PPS0_WIDTH) + ((x) * 0x10))</div><div class='add'>+#define PPS_MAXIDX(x)			((((x) + 1) * 8) - 1)</div><div class='add'>+#define PPS_MINIDX(x)			((x) * 8)</div><div class='add'>+#define XGBE_PPSCMD_STOP		0x5</div><div class='add'>+#define XGBE_PPSCMD_START		0x2</div><div class='add'>+#define XGBE_PPSTARGET_PULSE		0x2</div><div class='add'>+</div><div class='ctx'> /* MAC register entry bit positions and sizes */</div><div class='ctx'> #define MAC_HWF0R_ADDMACADRSEL_INDEX	18</div><div class='ctx'> #define MAC_HWF0R_ADDMACADRSEL_WIDTH	5</div><div class='hunk'>@@ -365,6 +280,8 @@</div><div class='ctx'> #define MAC_HWF0R_TXCOESEL_WIDTH	1</div><div class='ctx'> #define MAC_HWF0R_VLHASH_INDEX		4</div><div class='ctx'> #define MAC_HWF0R_VLHASH_WIDTH		1</div><div class='add'>+#define MAC_HWF0R_VXN_INDEX		29</div><div class='add'>+#define MAC_HWF0R_VXN_WIDTH		1</div><div class='ctx'> #define MAC_HWF1R_ADDR64_INDEX		14</div><div class='ctx'> #define MAC_HWF1R_ADDR64_WIDTH		2</div><div class='ctx'> #define MAC_HWF1R_ADVTHWORD_INDEX	13</div><div class='hunk'>@@ -409,10 +326,32 @@</div><div class='ctx'> #define MAC_ISR_MMCTXIS_WIDTH		1</div><div class='ctx'> #define MAC_ISR_PMTIS_INDEX		4</div><div class='ctx'> #define MAC_ISR_PMTIS_WIDTH		1</div><div class='add'>+#define MAC_ISR_SMI_INDEX		1</div><div class='add'>+#define MAC_ISR_SMI_WIDTH		1</div><div class='ctx'> #define MAC_ISR_TSIS_INDEX		12</div><div class='ctx'> #define MAC_ISR_TSIS_WIDTH		1</div><div class='ctx'> #define MAC_MACA1HR_AE_INDEX		31</div><div class='ctx'> #define MAC_MACA1HR_AE_WIDTH		1</div><div class='add'>+#define MAC_MDIOIER_SNGLCOMPIE_INDEX	12</div><div class='add'>+#define MAC_MDIOIER_SNGLCOMPIE_WIDTH	1</div><div class='add'>+#define MAC_MDIOISR_SNGLCOMPINT_INDEX	12</div><div class='add'>+#define MAC_MDIOISR_SNGLCOMPINT_WIDTH	1</div><div class='add'>+#define MAC_MDIOSCAR_DA_INDEX		21</div><div class='add'>+#define MAC_MDIOSCAR_DA_WIDTH		5</div><div class='add'>+#define MAC_MDIOSCAR_PA_INDEX		16</div><div class='add'>+#define MAC_MDIOSCAR_PA_WIDTH		5</div><div class='add'>+#define MAC_MDIOSCAR_RA_INDEX		0</div><div class='add'>+#define MAC_MDIOSCAR_RA_WIDTH		16</div><div class='add'>+#define MAC_MDIOSCCDR_BUSY_INDEX	22</div><div class='add'>+#define MAC_MDIOSCCDR_BUSY_WIDTH	1</div><div class='add'>+#define MAC_MDIOSCCDR_CMD_INDEX		16</div><div class='add'>+#define MAC_MDIOSCCDR_CMD_WIDTH		2</div><div class='add'>+#define MAC_MDIOSCCDR_CR_INDEX		19</div><div class='add'>+#define MAC_MDIOSCCDR_CR_WIDTH		3</div><div class='add'>+#define MAC_MDIOSCCDR_DATA_INDEX	0</div><div class='add'>+#define MAC_MDIOSCCDR_DATA_WIDTH	16</div><div class='add'>+#define MAC_MDIOSCCDR_SADDR_INDEX	18</div><div class='add'>+#define MAC_MDIOSCCDR_SADDR_WIDTH	1</div><div class='ctx'> #define MAC_PFR_HMC_INDEX		2</div><div class='ctx'> #define MAC_PFR_HMC_WIDTH		1</div><div class='ctx'> #define MAC_PFR_HPF_INDEX		10</div><div class='hunk'>@@ -425,6 +364,8 @@</div><div class='ctx'> #define MAC_PFR_PR_WIDTH		1</div><div class='ctx'> #define MAC_PFR_VTFE_INDEX		16</div><div class='ctx'> #define MAC_PFR_VTFE_WIDTH		1</div><div class='add'>+#define MAC_PFR_VUCC_INDEX		22</div><div class='add'>+#define MAC_PFR_VUCC_WIDTH		1</div><div class='ctx'> #define MAC_PMTCSR_MGKPKTEN_INDEX	1</div><div class='ctx'> #define MAC_PMTCSR_MGKPKTEN_WIDTH	1</div><div class='ctx'> #define MAC_PMTCSR_PWRDWN_INDEX		0</div><div class='hunk'>@@ -443,6 +384,10 @@</div><div class='ctx'> #define MAC_RCR_CST_WIDTH		1</div><div class='ctx'> #define MAC_RCR_DCRCC_INDEX		3</div><div class='ctx'> #define MAC_RCR_DCRCC_WIDTH		1</div><div class='add'>+#define MAC_RCR_GPSLCE_INDEX		6</div><div class='add'>+#define MAC_RCR_GPSLCE_WIDTH		1</div><div class='add'>+#define MAC_RCR_WD_INDEX		7</div><div class='add'>+#define MAC_RCR_WD_WIDTH		1</div><div class='ctx'> #define MAC_RCR_HDSMS_INDEX		12</div><div class='ctx'> #define MAC_RCR_HDSMS_WIDTH		3</div><div class='ctx'> #define MAC_RCR_IPC_INDEX		9</div><div class='hunk'>@@ -453,6 +398,8 @@</div><div class='ctx'> #define MAC_RCR_LM_WIDTH		1</div><div class='ctx'> #define MAC_RCR_RE_INDEX		0</div><div class='ctx'> #define MAC_RCR_RE_WIDTH		1</div><div class='add'>+#define MAC_RCR_GPSL_INDEX		16</div><div class='add'>+#define MAC_RCR_GPSL_WIDTH		14</div><div class='ctx'> #define MAC_RFCR_PFCE_INDEX		8</div><div class='ctx'> #define MAC_RFCR_PFCE_WIDTH		1</div><div class='ctx'> #define MAC_RFCR_RFE_INDEX		0</div><div class='hunk'>@@ -487,12 +434,22 @@</div><div class='ctx'> #define MAC_TCR_SS_WIDTH		2</div><div class='ctx'> #define MAC_TCR_TE_INDEX		0</div><div class='ctx'> #define MAC_TCR_TE_WIDTH		1</div><div class='add'>+#define MAC_TCR_VNE_INDEX		24</div><div class='add'>+#define MAC_TCR_VNE_WIDTH		1</div><div class='add'>+#define MAC_TCR_VNM_INDEX		25</div><div class='add'>+#define MAC_TCR_VNM_WIDTH		1</div><div class='add'>+#define MAC_TCR_JD_INDEX		16</div><div class='add'>+#define MAC_TCR_JD_WIDTH		1</div><div class='add'>+#define MAC_TIR_TNID_INDEX		0</div><div class='add'>+#define MAC_TIR_TNID_WIDTH		16</div><div class='ctx'> #define MAC_TSCR_AV8021ASMEN_INDEX	28</div><div class='ctx'> #define MAC_TSCR_AV8021ASMEN_WIDTH	1</div><div class='ctx'> #define MAC_TSCR_SNAPTYPSEL_INDEX	16</div><div class='ctx'> #define MAC_TSCR_SNAPTYPSEL_WIDTH	2</div><div class='ctx'> #define MAC_TSCR_TSADDREG_INDEX		5</div><div class='ctx'> #define MAC_TSCR_TSADDREG_WIDTH		1</div><div class='add'>+#define MAC_TSCR_TSUPDT_INDEX		3</div><div class='add'>+#define MAC_TSCR_TSUPDT_WIDTH		1</div><div class='ctx'> #define MAC_TSCR_TSCFUPDT_INDEX		1</div><div class='ctx'> #define MAC_TSCR_TSCFUPDT_WIDTH		1</div><div class='ctx'> #define MAC_TSCR_TSCTRLSSR_INDEX	9</div><div class='hunk'>@@ -521,6 +478,10 @@</div><div class='ctx'> #define MAC_TSSR_TXTSC_WIDTH		1</div><div class='ctx'> #define MAC_TXSNR_TXTSSTSMIS_INDEX	31</div><div class='ctx'> #define MAC_TXSNR_TXTSSTSMIS_WIDTH	1</div><div class='add'>+#define MAC_TICSNR_TSICSNS_INDEX	8</div><div class='add'>+#define MAC_TICSNR_TSICSNS_WIDTH	8</div><div class='add'>+#define MAC_TECSNR_TSECSNS_INDEX	8</div><div class='add'>+#define MAC_TECSNR_TSECSNS_WIDTH	8</div><div class='ctx'> #define MAC_VLANHTR_VLHT_INDEX		0</div><div class='ctx'> #define MAC_VLANHTR_VLHT_WIDTH		16</div><div class='ctx'> #define MAC_VLANIR_VLTI_INDEX		20</div><div class='hunk'>@@ -551,8 +512,10 @@</div><div class='ctx'> #define MAC_VR_SNPSVER_WIDTH		8</div><div class='ctx'> #define MAC_VR_USERVER_INDEX		16</div><div class='ctx'> #define MAC_VR_USERVER_WIDTH		8</div><div class='add'>+#define MAC_PPSx_TTNSR_TRGTBUSY0_INDEX	31</div><div class='add'>+#define MAC_PPSx_TTNSR_TRGTBUSY0_WIDTH	1</div><div class='ctx'> </div><div class='del'>-/* MMC register offsets */</div><div class='add'>+ /* MMC register offsets */</div><div class='ctx'> #define MMC_CR				0x0800</div><div class='ctx'> #define MMC_RISR			0x0804</div><div class='ctx'> #define MMC_TISR			0x0808</div><div class='hunk'>@@ -768,12 +731,16 @@</div><div class='ctx'> #define MTL_Q_TQDR			0x08</div><div class='ctx'> #define MTL_Q_RQOMR			0x40</div><div class='ctx'> #define MTL_Q_RQMPOCR			0x44</div><div class='del'>-#define MTL_Q_RQDR			0x4c</div><div class='add'>+#define MTL_Q_RQDR			0x48</div><div class='ctx'> #define MTL_Q_RQFCR			0x50</div><div class='ctx'> #define MTL_Q_IER			0x70</div><div class='ctx'> #define MTL_Q_ISR			0x74</div><div class='ctx'> </div><div class='ctx'> /* MTL queue register entry bit positions and sizes */</div><div class='add'>+#define MTL_Q_RQDR_PRXQ_INDEX		16</div><div class='add'>+#define MTL_Q_RQDR_PRXQ_WIDTH		14</div><div class='add'>+#define MTL_Q_RQDR_RXQSTS_INDEX		4</div><div class='add'>+#define MTL_Q_RQDR_RXQSTS_WIDTH		2</div><div class='ctx'> #define MTL_Q_RQFCR_RFA_INDEX		1</div><div class='ctx'> #define MTL_Q_RQFCR_RFA_WIDTH		6</div><div class='ctx'> #define MTL_Q_RQFCR_RFD_INDEX		17</div><div class='hunk'>@@ -786,6 +753,10 @@</div><div class='ctx'> #define MTL_Q_RQOMR_RSF_WIDTH		1</div><div class='ctx'> #define MTL_Q_RQOMR_RTC_INDEX		0</div><div class='ctx'> #define MTL_Q_RQOMR_RTC_WIDTH		2</div><div class='add'>+#define MTL_Q_TQDR_TRCSTS_INDEX		1</div><div class='add'>+#define MTL_Q_TQDR_TRCSTS_WIDTH		2</div><div class='add'>+#define MTL_Q_TQDR_TXQSTS_INDEX		4</div><div class='add'>+#define MTL_Q_TQDR_TXQSTS_WIDTH		1</div><div class='ctx'> #define MTL_Q_TQOMR_FTQ_INDEX		0</div><div class='ctx'> #define MTL_Q_TQOMR_FTQ_WIDTH		1</div><div class='ctx'> #define MTL_Q_TQOMR_Q2TCMAP_INDEX	8</div><div class='hunk'>@@ -848,14 +819,25 @@</div><div class='ctx'> #define MTL_TSA_SP			0x00</div><div class='ctx'> #define MTL_TSA_ETS			0x02</div><div class='ctx'> </div><div class='del'>-/* PCS MMD select register offset</div><div class='del'>- *  The MMD select register is used for accessing PCS registers</div><div class='del'>- *  when the underlying APB3 interface is using indirect addressing.</div><div class='del'>- *  Indirect addressing requires accessing registers in two phases,</div><div class='del'>- *  an address phase and a data phase.  The address phases requires</div><div class='del'>- *  writing an address selection value to the MMD select regiesters.</div><div class='del'>- */</div><div class='del'>-#define PCS_MMD_SELECT			0xff</div><div class='add'>+/* PCS register offsets */</div><div class='add'>+#define PCS_V1_WINDOW_SELECT		0x03fc</div><div class='add'>+#define PCS_V2_WINDOW_DEF		0x9060</div><div class='add'>+#define PCS_V2_WINDOW_SELECT		0x9064</div><div class='add'>+#define PCS_V2_RV_WINDOW_DEF		0x1060</div><div class='add'>+#define PCS_V2_RV_WINDOW_SELECT		0x1064</div><div class='add'>+#define PCS_V2_YC_WINDOW_DEF		0x18060</div><div class='add'>+#define PCS_V2_YC_WINDOW_SELECT		0x18064</div><div class='add'>+#define PCS_V3_RN_WINDOW_DEF		0xf8078</div><div class='add'>+#define PCS_V3_RN_WINDOW_SELECT		0xf807c</div><div class='add'>+</div><div class='add'>+#define PCS_RN_SMN_BASE_ADDR		0x11e00000</div><div class='add'>+#define PCS_RN_PORT_ADDR_SIZE		0x100000</div><div class='add'>+</div><div class='add'>+/* PCS register entry bit positions and sizes */</div><div class='add'>+#define PCS_V2_WINDOW_DEF_OFFSET_INDEX	6</div><div class='add'>+#define PCS_V2_WINDOW_DEF_OFFSET_WIDTH	14</div><div class='add'>+#define PCS_V2_WINDOW_DEF_SIZE_INDEX	2</div><div class='add'>+#define PCS_V2_WINDOW_DEF_SIZE_WIDTH	4</div><div class='ctx'> </div><div class='ctx'> /* SerDes integration register offsets */</div><div class='ctx'> #define SIR0_KR_RT_1			0x002c</div><div class='hunk'>@@ -899,6 +881,199 @@</div><div class='ctx'> #define RXTX_REG129_RXDFE_CONFIG_INDEX	14</div><div class='ctx'> #define RXTX_REG129_RXDFE_CONFIG_WIDTH	2</div><div class='ctx'> </div><div class='add'>+/* MAC Control register offsets */</div><div class='add'>+#define XP_PROP_0			0x0000</div><div class='add'>+#define XP_PROP_1			0x0004</div><div class='add'>+#define XP_PROP_2			0x0008</div><div class='add'>+#define XP_PROP_3			0x000c</div><div class='add'>+#define XP_PROP_4			0x0010</div><div class='add'>+#define XP_PROP_5			0x0014</div><div class='add'>+#define XP_MAC_ADDR_LO			0x0020</div><div class='add'>+#define XP_MAC_ADDR_HI			0x0024</div><div class='add'>+#define XP_ECC_ISR			0x0030</div><div class='add'>+#define XP_ECC_IER			0x0034</div><div class='add'>+#define XP_ECC_CNT0			0x003c</div><div class='add'>+#define XP_ECC_CNT1			0x0040</div><div class='add'>+#define XP_DRIVER_INT_REQ		0x0060</div><div class='add'>+#define XP_DRIVER_INT_RO		0x0064</div><div class='add'>+#define XP_DRIVER_SCRATCH_0		0x0068</div><div class='add'>+#define XP_DRIVER_SCRATCH_1		0x006c</div><div class='add'>+#define XP_INT_REISSUE_EN		0x0074</div><div class='add'>+#define XP_INT_EN			0x0078</div><div class='add'>+#define XP_I2C_MUTEX			0x0080</div><div class='add'>+#define XP_MDIO_MUTEX			0x0084</div><div class='add'>+</div><div class='add'>+/* MAC Control register entry bit positions and sizes */</div><div class='add'>+#define XP_DRIVER_INT_REQ_REQUEST_INDEX		0</div><div class='add'>+#define XP_DRIVER_INT_REQ_REQUEST_WIDTH		1</div><div class='add'>+#define XP_DRIVER_INT_RO_STATUS_INDEX		0</div><div class='add'>+#define XP_DRIVER_INT_RO_STATUS_WIDTH		1</div><div class='add'>+#define XP_DRIVER_SCRATCH_0_COMMAND_INDEX	0</div><div class='add'>+#define XP_DRIVER_SCRATCH_0_COMMAND_WIDTH	8</div><div class='add'>+#define XP_DRIVER_SCRATCH_0_SUB_COMMAND_INDEX	8</div><div class='add'>+#define XP_DRIVER_SCRATCH_0_SUB_COMMAND_WIDTH	8</div><div class='add'>+#define XP_ECC_CNT0_RX_DED_INDEX		24</div><div class='add'>+#define XP_ECC_CNT0_RX_DED_WIDTH		8</div><div class='add'>+#define XP_ECC_CNT0_RX_SEC_INDEX		16</div><div class='add'>+#define XP_ECC_CNT0_RX_SEC_WIDTH		8</div><div class='add'>+#define XP_ECC_CNT0_TX_DED_INDEX		8</div><div class='add'>+#define XP_ECC_CNT0_TX_DED_WIDTH		8</div><div class='add'>+#define XP_ECC_CNT0_TX_SEC_INDEX		0</div><div class='add'>+#define XP_ECC_CNT0_TX_SEC_WIDTH		8</div><div class='add'>+#define XP_ECC_CNT1_DESC_DED_INDEX		8</div><div class='add'>+#define XP_ECC_CNT1_DESC_DED_WIDTH		8</div><div class='add'>+#define XP_ECC_CNT1_DESC_SEC_INDEX		0</div><div class='add'>+#define XP_ECC_CNT1_DESC_SEC_WIDTH		8</div><div class='add'>+#define XP_ECC_IER_DESC_DED_INDEX		5</div><div class='add'>+#define XP_ECC_IER_DESC_DED_WIDTH		1</div><div class='add'>+#define XP_ECC_IER_DESC_SEC_INDEX		4</div><div class='add'>+#define XP_ECC_IER_DESC_SEC_WIDTH		1</div><div class='add'>+#define XP_ECC_IER_RX_DED_INDEX			3</div><div class='add'>+#define XP_ECC_IER_RX_DED_WIDTH			1</div><div class='add'>+#define XP_ECC_IER_RX_SEC_INDEX			2</div><div class='add'>+#define XP_ECC_IER_RX_SEC_WIDTH			1</div><div class='add'>+#define XP_ECC_IER_TX_DED_INDEX			1</div><div class='add'>+#define XP_ECC_IER_TX_DED_WIDTH			1</div><div class='add'>+#define XP_ECC_IER_TX_SEC_INDEX			0</div><div class='add'>+#define XP_ECC_IER_TX_SEC_WIDTH			1</div><div class='add'>+#define XP_ECC_ISR_DESC_DED_INDEX		5</div><div class='add'>+#define XP_ECC_ISR_DESC_DED_WIDTH		1</div><div class='add'>+#define XP_ECC_ISR_DESC_SEC_INDEX		4</div><div class='add'>+#define XP_ECC_ISR_DESC_SEC_WIDTH		1</div><div class='add'>+#define XP_ECC_ISR_RX_DED_INDEX			3</div><div class='add'>+#define XP_ECC_ISR_RX_DED_WIDTH			1</div><div class='add'>+#define XP_ECC_ISR_RX_SEC_INDEX			2</div><div class='add'>+#define XP_ECC_ISR_RX_SEC_WIDTH			1</div><div class='add'>+#define XP_ECC_ISR_TX_DED_INDEX			1</div><div class='add'>+#define XP_ECC_ISR_TX_DED_WIDTH			1</div><div class='add'>+#define XP_ECC_ISR_TX_SEC_INDEX			0</div><div class='add'>+#define XP_ECC_ISR_TX_SEC_WIDTH			1</div><div class='add'>+#define XP_I2C_MUTEX_BUSY_INDEX			31</div><div class='add'>+#define XP_I2C_MUTEX_BUSY_WIDTH			1</div><div class='add'>+#define XP_I2C_MUTEX_ID_INDEX			29</div><div class='add'>+#define XP_I2C_MUTEX_ID_WIDTH			2</div><div class='add'>+#define XP_I2C_MUTEX_ACTIVE_INDEX		0</div><div class='add'>+#define XP_I2C_MUTEX_ACTIVE_WIDTH		1</div><div class='add'>+#define XP_MAC_ADDR_HI_VALID_INDEX		31</div><div class='add'>+#define XP_MAC_ADDR_HI_VALID_WIDTH		1</div><div class='add'>+#define XP_PROP_0_CONN_TYPE_INDEX		28</div><div class='add'>+#define XP_PROP_0_CONN_TYPE_WIDTH		3</div><div class='add'>+#define XP_PROP_0_MDIO_ADDR_INDEX		16</div><div class='add'>+#define XP_PROP_0_MDIO_ADDR_WIDTH		5</div><div class='add'>+#define XP_PROP_0_PORT_ID_INDEX			0</div><div class='add'>+#define XP_PROP_0_PORT_ID_WIDTH			8</div><div class='add'>+#define XP_PROP_0_PORT_MODE_INDEX		8</div><div class='add'>+#define XP_PROP_0_PORT_MODE_WIDTH		4</div><div class='add'>+#define XP_PROP_0_PORT_SPEEDS_INDEX		22</div><div class='add'>+#define XP_PROP_0_PORT_SPEEDS_WIDTH		5</div><div class='add'>+#define XP_PROP_1_MAX_RX_DMA_INDEX		24</div><div class='add'>+#define XP_PROP_1_MAX_RX_DMA_WIDTH		5</div><div class='add'>+#define XP_PROP_1_MAX_RX_QUEUES_INDEX		8</div><div class='add'>+#define XP_PROP_1_MAX_RX_QUEUES_WIDTH		5</div><div class='add'>+#define XP_PROP_1_MAX_TX_DMA_INDEX		16</div><div class='add'>+#define XP_PROP_1_MAX_TX_DMA_WIDTH		5</div><div class='add'>+#define XP_PROP_1_MAX_TX_QUEUES_INDEX		0</div><div class='add'>+#define XP_PROP_1_MAX_TX_QUEUES_WIDTH		5</div><div class='add'>+#define XP_PROP_2_RX_FIFO_SIZE_INDEX		16</div><div class='add'>+#define XP_PROP_2_RX_FIFO_SIZE_WIDTH		16</div><div class='add'>+#define XP_PROP_2_TX_FIFO_SIZE_INDEX		0</div><div class='add'>+#define XP_PROP_2_TX_FIFO_SIZE_WIDTH		16</div><div class='add'>+#define XP_PROP_3_GPIO_MASK_INDEX		28</div><div class='add'>+#define XP_PROP_3_GPIO_MASK_WIDTH		4</div><div class='add'>+#define XP_PROP_3_GPIO_MOD_ABS_INDEX		20</div><div class='add'>+#define XP_PROP_3_GPIO_MOD_ABS_WIDTH		4</div><div class='add'>+#define XP_PROP_3_GPIO_RATE_SELECT_INDEX	16</div><div class='add'>+#define XP_PROP_3_GPIO_RATE_SELECT_WIDTH	4</div><div class='add'>+#define XP_PROP_3_GPIO_RX_LOS_INDEX		24</div><div class='add'>+#define XP_PROP_3_GPIO_RX_LOS_WIDTH		4</div><div class='add'>+#define XP_PROP_3_GPIO_TX_FAULT_INDEX		12</div><div class='add'>+#define XP_PROP_3_GPIO_TX_FAULT_WIDTH		4</div><div class='add'>+#define XP_PROP_3_GPIO_ADDR_INDEX		8</div><div class='add'>+#define XP_PROP_3_GPIO_ADDR_WIDTH		3</div><div class='add'>+#define XP_PROP_3_MDIO_RESET_INDEX		0</div><div class='add'>+#define XP_PROP_3_MDIO_RESET_WIDTH		2</div><div class='add'>+#define XP_PROP_3_MDIO_RESET_I2C_ADDR_INDEX	8</div><div class='add'>+#define XP_PROP_3_MDIO_RESET_I2C_ADDR_WIDTH	3</div><div class='add'>+#define XP_PROP_3_MDIO_RESET_I2C_GPIO_INDEX	12</div><div class='add'>+#define XP_PROP_3_MDIO_RESET_I2C_GPIO_WIDTH	4</div><div class='add'>+#define XP_PROP_3_MDIO_RESET_INT_GPIO_INDEX	4</div><div class='add'>+#define XP_PROP_3_MDIO_RESET_INT_GPIO_WIDTH	2</div><div class='add'>+#define XP_PROP_4_MUX_ADDR_HI_INDEX		8</div><div class='add'>+#define XP_PROP_4_MUX_ADDR_HI_WIDTH		5</div><div class='add'>+#define XP_PROP_4_MUX_ADDR_LO_INDEX		0</div><div class='add'>+#define XP_PROP_4_MUX_ADDR_LO_WIDTH		3</div><div class='add'>+#define XP_PROP_4_MUX_CHAN_INDEX		4</div><div class='add'>+#define XP_PROP_4_MUX_CHAN_WIDTH		3</div><div class='add'>+#define XP_PROP_4_REDRV_ADDR_INDEX		16</div><div class='add'>+#define XP_PROP_4_REDRV_ADDR_WIDTH		7</div><div class='add'>+#define XP_PROP_4_REDRV_IF_INDEX		23</div><div class='add'>+#define XP_PROP_4_REDRV_IF_WIDTH		1</div><div class='add'>+#define XP_PROP_4_REDRV_LANE_INDEX		24</div><div class='add'>+#define XP_PROP_4_REDRV_LANE_WIDTH		3</div><div class='add'>+#define XP_PROP_4_REDRV_MODEL_INDEX		28</div><div class='add'>+#define XP_PROP_4_REDRV_MODEL_WIDTH		3</div><div class='add'>+#define XP_PROP_4_REDRV_PRESENT_INDEX		31</div><div class='add'>+#define XP_PROP_4_REDRV_PRESENT_WIDTH		1</div><div class='add'>+</div><div class='add'>+/* I2C Control register offsets */</div><div class='add'>+#define IC_CON					0x0000</div><div class='add'>+#define IC_TAR					0x0004</div><div class='add'>+#define IC_DATA_CMD				0x0010</div><div class='add'>+#define IC_INTR_STAT				0x002c</div><div class='add'>+#define IC_INTR_MASK				0x0030</div><div class='add'>+#define IC_RAW_INTR_STAT			0x0034</div><div class='add'>+#define IC_CLR_INTR				0x0040</div><div class='add'>+#define IC_CLR_TX_ABRT				0x0054</div><div class='add'>+#define IC_CLR_STOP_DET				0x0060</div><div class='add'>+#define IC_ENABLE				0x006c</div><div class='add'>+#define IC_TXFLR				0x0074</div><div class='add'>+#define IC_RXFLR				0x0078</div><div class='add'>+#define IC_TX_ABRT_SOURCE			0x0080</div><div class='add'>+#define IC_ENABLE_STATUS			0x009c</div><div class='add'>+#define IC_COMP_PARAM_1				0x00f4</div><div class='add'>+</div><div class='add'>+/* I2C Control register entry bit positions and sizes */</div><div class='add'>+#define IC_COMP_PARAM_1_MAX_SPEED_MODE_INDEX	2</div><div class='add'>+#define IC_COMP_PARAM_1_MAX_SPEED_MODE_WIDTH	2</div><div class='add'>+#define IC_COMP_PARAM_1_RX_BUFFER_DEPTH_INDEX	8</div><div class='add'>+#define IC_COMP_PARAM_1_RX_BUFFER_DEPTH_WIDTH	8</div><div class='add'>+#define IC_COMP_PARAM_1_TX_BUFFER_DEPTH_INDEX	16</div><div class='add'>+#define IC_COMP_PARAM_1_TX_BUFFER_DEPTH_WIDTH	8</div><div class='add'>+#define IC_CON_MASTER_MODE_INDEX		0</div><div class='add'>+#define IC_CON_MASTER_MODE_WIDTH		1</div><div class='add'>+#define IC_CON_RESTART_EN_INDEX			5</div><div class='add'>+#define IC_CON_RESTART_EN_WIDTH			1</div><div class='add'>+#define IC_CON_RX_FIFO_FULL_HOLD_INDEX		9</div><div class='add'>+#define IC_CON_RX_FIFO_FULL_HOLD_WIDTH		1</div><div class='add'>+#define IC_CON_SLAVE_DISABLE_INDEX		6</div><div class='add'>+#define IC_CON_SLAVE_DISABLE_WIDTH		1</div><div class='add'>+#define IC_CON_SPEED_INDEX			1</div><div class='add'>+#define IC_CON_SPEED_WIDTH			2</div><div class='add'>+#define IC_DATA_CMD_CMD_INDEX			8</div><div class='add'>+#define IC_DATA_CMD_CMD_WIDTH			1</div><div class='add'>+#define IC_DATA_CMD_STOP_INDEX			9</div><div class='add'>+#define IC_DATA_CMD_STOP_WIDTH			1</div><div class='add'>+#define IC_ENABLE_ABORT_INDEX			1</div><div class='add'>+#define IC_ENABLE_ABORT_WIDTH			1</div><div class='add'>+#define IC_ENABLE_EN_INDEX			0</div><div class='add'>+#define IC_ENABLE_EN_WIDTH			1</div><div class='add'>+#define IC_ENABLE_STATUS_EN_INDEX		0</div><div class='add'>+#define IC_ENABLE_STATUS_EN_WIDTH		1</div><div class='add'>+#define IC_INTR_MASK_TX_EMPTY_INDEX		4</div><div class='add'>+#define IC_INTR_MASK_TX_EMPTY_WIDTH		1</div><div class='add'>+#define IC_RAW_INTR_STAT_RX_FULL_INDEX		2</div><div class='add'>+#define IC_RAW_INTR_STAT_RX_FULL_WIDTH		1</div><div class='add'>+#define IC_RAW_INTR_STAT_STOP_DET_INDEX		9</div><div class='add'>+#define IC_RAW_INTR_STAT_STOP_DET_WIDTH		1</div><div class='add'>+#define IC_RAW_INTR_STAT_TX_ABRT_INDEX		6</div><div class='add'>+#define IC_RAW_INTR_STAT_TX_ABRT_WIDTH		1</div><div class='add'>+#define IC_RAW_INTR_STAT_TX_EMPTY_INDEX		4</div><div class='add'>+#define IC_RAW_INTR_STAT_TX_EMPTY_WIDTH		1</div><div class='add'>+</div><div class='add'>+/* I2C Control register value */</div><div class='add'>+#define IC_TX_ABRT_7B_ADDR_NOACK		0x0001</div><div class='add'>+#define IC_TX_ABRT_ARB_LOST			0x1000</div><div class='add'>+</div><div class='ctx'> /* Descriptor/Packet entry bit positions and sizes */</div><div class='ctx'> #define RX_PACKET_ERRORS_CRC_INDEX		2</div><div class='ctx'> #define RX_PACKET_ERRORS_CRC_WIDTH		1</div><div class='hunk'>@@ -913,8 +1088,8 @@</div><div class='ctx'> #define RX_PACKET_ATTRIBUTES_CSUM_DONE_WIDTH	1</div><div class='ctx'> #define RX_PACKET_ATTRIBUTES_VLAN_CTAG_INDEX	1</div><div class='ctx'> #define RX_PACKET_ATTRIBUTES_VLAN_CTAG_WIDTH	1</div><div class='del'>-#define RX_PACKET_ATTRIBUTES_INCOMPLETE_INDEX	2</div><div class='del'>-#define RX_PACKET_ATTRIBUTES_INCOMPLETE_WIDTH	1</div><div class='add'>+#define RX_PACKET_ATTRIBUTES_LAST_INDEX		2</div><div class='add'>+#define RX_PACKET_ATTRIBUTES_LAST_WIDTH		1</div><div class='ctx'> #define RX_PACKET_ATTRIBUTES_CONTEXT_NEXT_INDEX	3</div><div class='ctx'> #define RX_PACKET_ATTRIBUTES_CONTEXT_NEXT_WIDTH	1</div><div class='ctx'> #define RX_PACKET_ATTRIBUTES_CONTEXT_INDEX	4</div><div class='hunk'>@@ -923,11 +1098,19 @@</div><div class='ctx'> #define RX_PACKET_ATTRIBUTES_RX_TSTAMP_WIDTH	1</div><div class='ctx'> #define RX_PACKET_ATTRIBUTES_RSS_HASH_INDEX	6</div><div class='ctx'> #define RX_PACKET_ATTRIBUTES_RSS_HASH_WIDTH	1</div><div class='add'>+#define RX_PACKET_ATTRIBUTES_FIRST_INDEX	7</div><div class='add'>+#define RX_PACKET_ATTRIBUTES_FIRST_WIDTH	1</div><div class='add'>+#define RX_PACKET_ATTRIBUTES_TNP_INDEX		8</div><div class='add'>+#define RX_PACKET_ATTRIBUTES_TNP_WIDTH		1</div><div class='add'>+#define RX_PACKET_ATTRIBUTES_TNPCSUM_DONE_INDEX	9</div><div class='add'>+#define RX_PACKET_ATTRIBUTES_TNPCSUM_DONE_WIDTH	1</div><div class='ctx'> </div><div class='ctx'> #define RX_NORMAL_DESC0_OVT_INDEX		0</div><div class='ctx'> #define RX_NORMAL_DESC0_OVT_WIDTH		16</div><div class='ctx'> #define RX_NORMAL_DESC2_HL_INDEX		0</div><div class='ctx'> #define RX_NORMAL_DESC2_HL_WIDTH		10</div><div class='add'>+#define RX_NORMAL_DESC2_TNP_INDEX		11</div><div class='add'>+#define RX_NORMAL_DESC2_TNP_WIDTH		1</div><div class='ctx'> #define RX_NORMAL_DESC3_CDA_INDEX		27</div><div class='ctx'> #define RX_NORMAL_DESC3_CDA_WIDTH		1</div><div class='ctx'> #define RX_NORMAL_DESC3_CTXT_INDEX		30</div><div class='hunk'>@@ -954,9 +1137,11 @@</div><div class='ctx'> #define RX_DESC3_L34T_IPV4_TCP			1</div><div class='ctx'> #define RX_DESC3_L34T_IPV4_UDP			2</div><div class='ctx'> #define RX_DESC3_L34T_IPV4_ICMP			3</div><div class='add'>+#define RX_DESC3_L34T_IPV4_UNKNOWN		7</div><div class='ctx'> #define RX_DESC3_L34T_IPV6_TCP			9</div><div class='ctx'> #define RX_DESC3_L34T_IPV6_UDP			10</div><div class='ctx'> #define RX_DESC3_L34T_IPV6_ICMP			11</div><div class='add'>+#define RX_DESC3_L34T_IPV6_UNKNOWN		15</div><div class='ctx'> </div><div class='ctx'> #define RX_CONTEXT_DESC3_TSA_INDEX		4</div><div class='ctx'> #define RX_CONTEXT_DESC3_TSA_WIDTH		1</div><div class='hunk'>@@ -971,6 +1156,8 @@</div><div class='ctx'> #define TX_PACKET_ATTRIBUTES_VLAN_CTAG_WIDTH	1</div><div class='ctx'> #define TX_PACKET_ATTRIBUTES_PTP_INDEX		3</div><div class='ctx'> #define TX_PACKET_ATTRIBUTES_PTP_WIDTH		1</div><div class='add'>+#define TX_PACKET_ATTRIBUTES_VXLAN_INDEX	4</div><div class='add'>+#define TX_PACKET_ATTRIBUTES_VXLAN_WIDTH	1</div><div class='ctx'> </div><div class='ctx'> #define TX_CONTEXT_DESC2_MSS_INDEX		0</div><div class='ctx'> #define TX_CONTEXT_DESC2_MSS_WIDTH		15</div><div class='hunk'>@@ -1011,8 +1198,11 @@</div><div class='ctx'> #define TX_NORMAL_DESC3_TCPPL_WIDTH		18</div><div class='ctx'> #define TX_NORMAL_DESC3_TSE_INDEX		18</div><div class='ctx'> #define TX_NORMAL_DESC3_TSE_WIDTH		1</div><div class='add'>+#define TX_NORMAL_DESC3_VNP_INDEX		23</div><div class='add'>+#define TX_NORMAL_DESC3_VNP_WIDTH		3</div><div class='ctx'> </div><div class='ctx'> #define TX_NORMAL_DESC2_VLAN_INSERT		0x2</div><div class='add'>+#define TX_NORMAL_DESC3_VXLAN_PACKET		0x3</div><div class='ctx'> </div><div class='ctx'> /* MDIO undefined or vendor specific registers */</div><div class='ctx'> #ifndef MDIO_PMA_10GBR_PMD_CTRL</div><div class='hunk'>@@ -1023,6 +1213,34 @@</div><div class='ctx'> #define MDIO_PMA_10GBR_FECCTRL		0x00ab</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifndef MDIO_PMA_RX_CTRL1</div><div class='add'>+#define MDIO_PMA_RX_CTRL1		0x8051</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef MDIO_PMA_RX_LSTS</div><div class='add'>+#define MDIO_PMA_RX_LSTS		0x018020</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef MDIO_PMA_RX_EQ_CTRL4</div><div class='add'>+#define MDIO_PMA_RX_EQ_CTRL4		0x0001805C</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef MDIO_PMA_MP_MISC_STS</div><div class='add'>+#define MDIO_PMA_MP_MISC_STS		0x0078</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef MDIO_PMA_PHY_RX_EQ_CEU</div><div class='add'>+#define MDIO_PMA_PHY_RX_EQ_CEU		0x1800E</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef MDIO_PCS_DIG_CTRL</div><div class='add'>+#define MDIO_PCS_DIG_CTRL		0x8000</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef MDIO_PCS_DIGITAL_STAT</div><div class='add'>+#define MDIO_PCS_DIGITAL_STAT		0x8010</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #ifndef MDIO_AN_XNP</div><div class='ctx'> #define MDIO_AN_XNP			0x0016</div><div class='ctx'> #endif</div><div class='hunk'>@@ -1043,11 +1261,58 @@</div><div class='ctx'> #define MDIO_AN_INT			0x8002</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifndef MDIO_VEND2_AN_ADVERTISE</div><div class='add'>+#define MDIO_VEND2_AN_ADVERTISE		0x0004</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef MDIO_VEND2_AN_LP_ABILITY</div><div class='add'>+#define MDIO_VEND2_AN_LP_ABILITY	0x0005</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef MDIO_VEND2_AN_CTRL</div><div class='add'>+#define MDIO_VEND2_AN_CTRL		0x8001</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef MDIO_VEND2_AN_STAT</div><div class='add'>+#define MDIO_VEND2_AN_STAT		0x8002</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef MDIO_VEND2_PMA_CDR_CONTROL</div><div class='add'>+#define MDIO_VEND2_PMA_CDR_CONTROL	0x8056</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef MDIO_VEND2_PMA_MISC_CTRL0</div><div class='add'>+#define MDIO_VEND2_PMA_MISC_CTRL0	0x8090</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> #ifndef MDIO_CTRL1_SPEED1G</div><div class='ctx'> #define MDIO_CTRL1_SPEED1G		(MDIO_CTRL1_SPEED10G &amp; ~BMCR_SPEED100)</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='add'>+#ifndef MDIO_VEND2_CTRL1_AN_ENABLE</div><div class='add'>+#define MDIO_VEND2_CTRL1_AN_ENABLE	BIT(12)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef MDIO_VEND2_CTRL1_AN_RESTART</div><div class='add'>+#define MDIO_VEND2_CTRL1_AN_RESTART	BIT(9)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef MDIO_VEND2_CTRL1_SS6</div><div class='add'>+#define MDIO_VEND2_CTRL1_SS6		BIT(6)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#ifndef MDIO_VEND2_CTRL1_SS13</div><div class='add'>+#define MDIO_VEND2_CTRL1_SS13		BIT(13)</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#define XGBE_VEND2_MAC_AUTO_SW		BIT(9)</div><div class='add'>+</div><div class='ctx'> /* MDIO mask values */</div><div class='add'>+#define XGBE_AN_CL73_INT_CMPLT		BIT(0)</div><div class='add'>+#define XGBE_AN_CL73_INC_LINK		BIT(1)</div><div class='add'>+#define XGBE_AN_CL73_PG_RCV		BIT(2)</div><div class='add'>+#define XGBE_AN_CL73_INT_MASK		0x07</div><div class='add'>+</div><div class='ctx'> #define XGBE_XNP_MCF_NULL_MESSAGE	0x001</div><div class='ctx'> #define XGBE_XNP_ACK_PROCESSED		BIT(12)</div><div class='ctx'> #define XGBE_XNP_MP_FORMATTED		BIT(13)</div><div class='hunk'>@@ -1056,6 +1321,56 @@</div><div class='ctx'> #define XGBE_KR_TRAINING_START		BIT(0)</div><div class='ctx'> #define XGBE_KR_TRAINING_ENABLE		BIT(1)</div><div class='ctx'> </div><div class='add'>+#define XGBE_PCS_CL37_BP		BIT(12)</div><div class='add'>+#define XGBE_PCS_PSEQ_STATE_MASK	0x1c</div><div class='add'>+#define XGBE_PCS_PSEQ_STATE_POWER_GOOD	0x10</div><div class='add'>+</div><div class='add'>+#define XGBE_AN_CL37_INT_CMPLT		BIT(0)</div><div class='add'>+#define XGBE_AN_CL37_INT_MASK		0x01</div><div class='add'>+</div><div class='add'>+#define XGBE_AN_CL37_HD_MASK		0x40</div><div class='add'>+#define XGBE_AN_CL37_FD_MASK		0x20</div><div class='add'>+</div><div class='add'>+#define XGBE_AN_CL37_PCS_MODE_MASK	0x06</div><div class='add'>+#define XGBE_AN_CL37_PCS_MODE_BASEX	0x00</div><div class='add'>+#define XGBE_AN_CL37_PCS_MODE_SGMII	0x04</div><div class='add'>+#define XGBE_AN_CL37_TX_CONFIG_MASK	0x08</div><div class='add'>+#define XGBE_AN_CL37_MII_CTRL_8BIT	0x0100</div><div class='add'>+</div><div class='add'>+#define XGBE_PMA_CDR_TRACK_EN_MASK	0x01</div><div class='add'>+#define XGBE_PMA_CDR_TRACK_EN_OFF	0x00</div><div class='add'>+#define XGBE_PMA_CDR_TRACK_EN_ON	0x01</div><div class='add'>+</div><div class='add'>+#define XGBE_PMA_RX_RST_0_MASK		BIT(4)</div><div class='add'>+#define XGBE_PMA_RX_RST_0_RESET_ON	0x10</div><div class='add'>+#define XGBE_PMA_RX_RST_0_RESET_OFF	0x00</div><div class='add'>+</div><div class='add'>+#define XGBE_PMA_RX_SIG_DET_0_MASK	BIT(4)</div><div class='add'>+#define XGBE_PMA_RX_SIG_DET_0_ENABLE	BIT(4)</div><div class='add'>+#define XGBE_PMA_RX_SIG_DET_0_DISABLE	0x0000</div><div class='add'>+</div><div class='add'>+#define XGBE_PMA_RX_VALID_0_MASK	BIT(12)</div><div class='add'>+#define XGBE_PMA_RX_VALID_0_ENABLE	BIT(12)</div><div class='add'>+#define XGBE_PMA_RX_VALID_0_DISABLE	0x0000</div><div class='add'>+</div><div class='add'>+#define XGBE_PMA_RX_AD_REQ_MASK		BIT(12)</div><div class='add'>+#define XGBE_PMA_RX_AD_REQ_ENABLE	BIT(12)</div><div class='add'>+#define XGBE_PMA_RX_AD_REQ_DISABLE	0x0000</div><div class='add'>+</div><div class='add'>+#define XGBE_PMA_RX_ADPT_ACK_MASK	BIT(12)</div><div class='add'>+#define XGBE_PMA_RX_ADPT_ACK		BIT(12)</div><div class='add'>+</div><div class='add'>+#define XGBE_PMA_CFF_UPDTM1_VLD		BIT(8)</div><div class='add'>+#define XGBE_PMA_CFF_UPDT0_VLD		BIT(9)</div><div class='add'>+#define XGBE_PMA_CFF_UPDT1_VLD		BIT(10)</div><div class='add'>+#define XGBE_PMA_CFF_UPDT_MASK		(XGBE_PMA_CFF_UPDTM1_VLD |\</div><div class='add'>+					 XGBE_PMA_CFF_UPDT0_VLD | \</div><div class='add'>+					 XGBE_PMA_CFF_UPDT1_VLD)</div><div class='add'>+</div><div class='add'>+#define XGBE_PMA_PLL_CTRL_MASK		BIT(15)</div><div class='add'>+#define XGBE_PMA_PLL_CTRL_ENABLE	BIT(15)</div><div class='add'>+#define XGBE_PMA_PLL_CTRL_DISABLE	0x0000</div><div class='add'>+</div><div class='ctx'> /* Bit setting and getting macros</div><div class='ctx'>  *  The get macro will extract the current bit field value from within</div><div class='ctx'>  *  the variable</div><div class='hunk'>@@ -1191,12 +1506,28 @@ do {									\</div><div class='ctx'> /* Macros for building, reading or writing register values or bits</div><div class='ctx'>  * within the register values of XPCS registers.</div><div class='ctx'>  */</div><div class='del'>-#define XPCS_IOWRITE(_pdata, _off, _val)				\</div><div class='add'>+#define XPCS_GET_BITS(_var, _prefix, _field)				\</div><div class='add'>+	GET_BITS((_var),                                                \</div><div class='add'>+		 _prefix##_##_field##_INDEX,                            \</div><div class='add'>+		 _prefix##_##_field##_WIDTH)</div><div class='add'>+</div><div class='add'>+#define XPCS_SET_BITS(_var, _prefix, _field, _val)                      \</div><div class='add'>+	SET_BITS((_var),                                                \</div><div class='add'>+		 _prefix##_##_field##_INDEX,                            \</div><div class='add'>+		 _prefix##_##_field##_WIDTH, (_val))</div><div class='add'>+</div><div class='add'>+#define XPCS32_IOWRITE(_pdata, _off, _val)				\</div><div class='ctx'> 	iowrite32(_val, (_pdata)-&gt;xpcs_regs + (_off))</div><div class='ctx'> </div><div class='del'>-#define XPCS_IOREAD(_pdata, _off)					\</div><div class='add'>+#define XPCS32_IOREAD(_pdata, _off)					\</div><div class='ctx'> 	ioread32((_pdata)-&gt;xpcs_regs + (_off))</div><div class='ctx'> </div><div class='add'>+#define XPCS16_IOWRITE(_pdata, _off, _val)				\</div><div class='add'>+	iowrite16(_val, (_pdata)-&gt;xpcs_regs + (_off))</div><div class='add'>+</div><div class='add'>+#define XPCS16_IOREAD(_pdata, _off)					\</div><div class='add'>+	ioread16((_pdata)-&gt;xpcs_regs + (_off))</div><div class='add'>+</div><div class='ctx'> /* Macros for building, reading or writing register values or bits</div><div class='ctx'>  * within the register values of SerDes integration registers.</div><div class='ctx'>  */</div><div class='hunk'>@@ -1274,20 +1605,87 @@ do {									\</div><div class='ctx'> } while (0)</div><div class='ctx'> </div><div class='ctx'> /* Macros for building, reading or writing register values or bits</div><div class='del'>- * using MDIO.  Different from above because of the use of standardized</div><div class='del'>- * Linux include values.  No shifting is performed with the bit</div><div class='del'>- * operations, everything works on mask values.</div><div class='add'>+ * within the register values of MAC Control registers.</div><div class='add'>+ */</div><div class='add'>+#define XP_GET_BITS(_var, _prefix, _field)				\</div><div class='add'>+	GET_BITS((_var),						\</div><div class='add'>+		 _prefix##_##_field##_INDEX,				\</div><div class='add'>+		 _prefix##_##_field##_WIDTH)</div><div class='add'>+</div><div class='add'>+#define XP_SET_BITS(_var, _prefix, _field, _val)			\</div><div class='add'>+	SET_BITS((_var),						\</div><div class='add'>+		 _prefix##_##_field##_INDEX,				\</div><div class='add'>+		 _prefix##_##_field##_WIDTH, (_val))</div><div class='add'>+</div><div class='add'>+#define XP_IOREAD(_pdata, _reg)						\</div><div class='add'>+	ioread32((_pdata)-&gt;xprop_regs + (_reg))</div><div class='add'>+</div><div class='add'>+#define XP_IOREAD_BITS(_pdata, _reg, _field)				\</div><div class='add'>+	GET_BITS(XP_IOREAD((_pdata), (_reg)),				\</div><div class='add'>+		 _reg##_##_field##_INDEX,				\</div><div class='add'>+		 _reg##_##_field##_WIDTH)</div><div class='add'>+</div><div class='add'>+#define XP_IOWRITE(_pdata, _reg, _val)					\</div><div class='add'>+	iowrite32((_val), (_pdata)-&gt;xprop_regs + (_reg))</div><div class='add'>+</div><div class='add'>+#define XP_IOWRITE_BITS(_pdata, _reg, _field, _val)			\</div><div class='add'>+do {									\</div><div class='add'>+	u32 reg_val = XP_IOREAD((_pdata), (_reg));			\</div><div class='add'>+	SET_BITS(reg_val,						\</div><div class='add'>+		 _reg##_##_field##_INDEX,				\</div><div class='add'>+		 _reg##_##_field##_WIDTH, (_val));			\</div><div class='add'>+	XP_IOWRITE((_pdata), (_reg), reg_val);				\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+/* Macros for building, reading or writing register values or bits</div><div class='add'>+ * within the register values of I2C Control registers.</div><div class='ctx'>  */</div><div class='add'>+#define XI2C_GET_BITS(_var, _prefix, _field)				\</div><div class='add'>+	GET_BITS((_var),						\</div><div class='add'>+		 _prefix##_##_field##_INDEX,				\</div><div class='add'>+		 _prefix##_##_field##_WIDTH)</div><div class='add'>+</div><div class='add'>+#define XI2C_SET_BITS(_var, _prefix, _field, _val)			\</div><div class='add'>+	SET_BITS((_var),						\</div><div class='add'>+		 _prefix##_##_field##_INDEX,				\</div><div class='add'>+		 _prefix##_##_field##_WIDTH, (_val))</div><div class='add'>+</div><div class='add'>+#define XI2C_IOREAD(_pdata, _reg)					\</div><div class='add'>+	ioread32((_pdata)-&gt;xi2c_regs + (_reg))</div><div class='add'>+</div><div class='add'>+#define XI2C_IOREAD_BITS(_pdata, _reg, _field)				\</div><div class='add'>+	GET_BITS(XI2C_IOREAD((_pdata), (_reg)),				\</div><div class='add'>+		 _reg##_##_field##_INDEX,				\</div><div class='add'>+		 _reg##_##_field##_WIDTH)</div><div class='add'>+</div><div class='add'>+#define XI2C_IOWRITE(_pdata, _reg, _val)				\</div><div class='add'>+	iowrite32((_val), (_pdata)-&gt;xi2c_regs + (_reg))</div><div class='add'>+</div><div class='add'>+#define XI2C_IOWRITE_BITS(_pdata, _reg, _field, _val)			\</div><div class='add'>+do {									\</div><div class='add'>+	u32 reg_val = XI2C_IOREAD((_pdata), (_reg));			\</div><div class='add'>+	SET_BITS(reg_val,						\</div><div class='add'>+		 _reg##_##_field##_INDEX,				\</div><div class='add'>+		 _reg##_##_field##_WIDTH, (_val));			\</div><div class='add'>+	XI2C_IOWRITE((_pdata), (_reg), reg_val);			\</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+/* Macros for building, reading or writing register values or bits</div><div class='add'>+ * using MDIO.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define XGBE_ADDR_C45 BIT(30)</div><div class='add'>+</div><div class='ctx'> #define XMDIO_READ(_pdata, _mmd, _reg)					\</div><div class='ctx'> 	((_pdata)-&gt;hw_if.read_mmd_regs((_pdata), 0,			\</div><div class='del'>-		MII_ADDR_C45 | (_mmd &lt;&lt; 16) | ((_reg) &amp; 0xffff)))</div><div class='add'>+		XGBE_ADDR_C45 | (_mmd &lt;&lt; 16) | ((_reg) &amp; 0xffff)))</div><div class='ctx'> </div><div class='ctx'> #define XMDIO_READ_BITS(_pdata, _mmd, _reg, _mask)			\</div><div class='ctx'> 	(XMDIO_READ((_pdata), _mmd, _reg) &amp; _mask)</div><div class='ctx'> </div><div class='ctx'> #define XMDIO_WRITE(_pdata, _mmd, _reg, _val)				\</div><div class='ctx'> 	((_pdata)-&gt;hw_if.write_mmd_regs((_pdata), 0,			\</div><div class='del'>-		MII_ADDR_C45 | (_mmd &lt;&lt; 16) | ((_reg) &amp; 0xffff), (_val)))</div><div class='add'>+		XGBE_ADDR_C45 | (_mmd &lt;&lt; 16) | ((_reg) &amp; 0xffff), (_val)))</div><div class='ctx'> </div><div class='ctx'> #define XMDIO_WRITE_BITS(_pdata, _mmd, _reg, _mask, _val)		\</div><div class='ctx'> do {									\</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-dcb.c b/drivers/net/ethernet/amd/xgbe/xgbe-dcb.c<br/>index a6b9899e285f..1474df5544fa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-dcb.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/xgbe/xgbe-dcb.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-dcb.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe-dcb.c</a></div><div class='hunk'>@@ -1,117 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='ctx'> /*</div><div class='del'>- * AMD 10Gb Ethernet driver</div><div class='del'>- *</div><div class='del'>- * This file is available to you under your choice of the following two</div><div class='del'>- * licenses:</div><div class='del'>- *</div><div class='del'>- * License 1: GPLv2</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014 Advanced Micro Devices, Inc.</div><div class='del'>- *</div><div class='del'>- * This file is free software; you may copy, redistribute and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation, either version 2 of the License, or (at</div><div class='del'>- * your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This file is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- * License 2: Modified BSD</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014 Advanced Micro Devices, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * Redistribution and use in source and binary forms, with or without</div><div class='del'>- * modification, are permitted provided that the following conditions are met:</div><div class='del'>- *     * Redistributions of source code must retain the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer.</div><div class='del'>- *     * Redistributions in binary form must reproduce the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer in the</div><div class='del'>- *       documentation and/or other materials provided with the distribution.</div><div class='del'>- *     * Neither the name of Advanced Micro Devices, Inc. nor the</div><div class='del'>- *       names of its contributors may be used to endorse or promote products</div><div class='del'>- *       derived from this software without specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"</div><div class='del'>- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE</div><div class='del'>- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE</div><div class='del'>- * ARE DISCLAIMED. IN NO EVENT SHALL &lt;COPYRIGHT HOLDER&gt; BE LIABLE FOR ANY</div><div class='del'>- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES</div><div class='del'>- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;</div><div class='del'>- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND</div><div class='del'>- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='del'>- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF</div><div class='del'>- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='hunk'>@@ -146,6 +37,7 @@ static int xgbe_dcb_ieee_setets(struct net_device *netdev,</div><div class='ctx'> {</div><div class='ctx'> 	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='ctx'> 	unsigned int i, tc_ets, tc_ets_weight;</div><div class='add'>+	u8 max_tc = 0;</div><div class='ctx'> </div><div class='ctx'> 	tc_ets = 0;</div><div class='ctx'> 	tc_ets_weight = 0;</div><div class='hunk'>@@ -157,12 +49,9 @@ static int xgbe_dcb_ieee_setets(struct net_device *netdev,</div><div class='ctx'> 		netif_dbg(pdata, drv, netdev, "PRIO%u: TC=%hhu\n", i,</div><div class='ctx'> 			  ets-&gt;prio_tc[i]);</div><div class='ctx'> </div><div class='del'>-		if ((ets-&gt;tc_tx_bw[i] || ets-&gt;tc_tsa[i]) &amp;&amp;</div><div class='del'>-		    (i &gt;= pdata-&gt;hw_feat.tc_cnt))</div><div class='del'>-				return -EINVAL;</div><div class='del'>-</div><div class='del'>-		if (ets-&gt;prio_tc[i] &gt;= pdata-&gt;hw_feat.tc_cnt)</div><div class='del'>-			return -EINVAL;</div><div class='add'>+		max_tc = max_t(u8, max_tc, ets-&gt;prio_tc[i]);</div><div class='add'>+		if ((ets-&gt;tc_tx_bw[i] || ets-&gt;tc_tsa[i]))</div><div class='add'>+			max_tc = max_t(u8, max_tc, i);</div><div class='ctx'> </div><div class='ctx'> 		switch (ets-&gt;tc_tsa[i]) {</div><div class='ctx'> 		case IEEE_8021QAZ_TSA_STRICT:</div><div class='hunk'>@@ -171,15 +60,28 @@ static int xgbe_dcb_ieee_setets(struct net_device *netdev,</div><div class='ctx'> 			tc_ets = 1;</div><div class='ctx'> 			tc_ets_weight += ets-&gt;tc_tx_bw[i];</div><div class='ctx'> 			break;</div><div class='del'>-</div><div class='ctx'> 		default:</div><div class='add'>+			netif_err(pdata, drv, netdev,</div><div class='add'>+				  "unsupported TSA algorithm (%hhu)\n",</div><div class='add'>+				  ets-&gt;tc_tsa[i]);</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Check maximum traffic class requested */</div><div class='add'>+	if (max_tc &gt;= pdata-&gt;hw_feat.tc_cnt) {</div><div class='add'>+		netif_err(pdata, drv, netdev,</div><div class='add'>+			  "exceeded number of supported traffic classes\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Weights must add up to 100% */</div><div class='del'>-	if (tc_ets &amp;&amp; (tc_ets_weight != 100))</div><div class='add'>+	if (tc_ets &amp;&amp; (tc_ets_weight != 100)) {</div><div class='add'>+		netif_err(pdata, drv, netdev,</div><div class='add'>+			  "sum of ETS algorithm weights is not 100 (%u)\n",</div><div class='add'>+			  tc_ets_weight);</div><div class='ctx'> 		return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (!pdata-&gt;ets) {</div><div class='ctx'> 		pdata-&gt;ets = devm_kzalloc(pdata-&gt;dev, sizeof(*pdata-&gt;ets),</div><div class='hunk'>@@ -188,6 +90,7 @@ static int xgbe_dcb_ieee_setets(struct net_device *netdev,</div><div class='ctx'> 			return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	pdata-&gt;num_tcs = max_tc + 1;</div><div class='ctx'> 	memcpy(pdata-&gt;ets, ets, sizeof(*pdata-&gt;ets));</div><div class='ctx'> </div><div class='ctx'> 	pdata-&gt;hw_if.config_dcb_tc(pdata);</div><div class='hunk'>@@ -218,9 +121,16 @@ static int xgbe_dcb_ieee_setpfc(struct net_device *netdev,</div><div class='ctx'> 	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='ctx'> </div><div class='ctx'> 	netif_dbg(pdata, drv, netdev,</div><div class='del'>-		  "cap=%hhu, en=%#hhx, mbc=%hhu, delay=%hhu\n",</div><div class='add'>+		  "cap=%d, en=%#x, mbc=%d, delay=%d\n",</div><div class='ctx'> 		  pfc-&gt;pfc_cap, pfc-&gt;pfc_en, pfc-&gt;mbc, pfc-&gt;delay);</div><div class='ctx'> </div><div class='add'>+	/* Check PFC for supported number of traffic classes */</div><div class='add'>+	if (pfc-&gt;pfc_en &amp; ~((1 &lt;&lt; pdata-&gt;hw_feat.tc_cnt) - 1)) {</div><div class='add'>+		netif_err(pdata, drv, netdev,</div><div class='add'>+			  "PFC requested for unsupported traffic class\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (!pdata-&gt;pfc) {</div><div class='ctx'> 		pdata-&gt;pfc = devm_kzalloc(pdata-&gt;dev, sizeof(*pdata-&gt;pfc),</div><div class='ctx'> 					  GFP_KERNEL);</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-debugfs.c b/drivers/net/ethernet/amd/xgbe/xgbe-debugfs.c<br/>index 2c063b60db4b..d9157c4acde9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-debugfs.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/xgbe/xgbe-debugfs.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-debugfs.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe-debugfs.c</a></div><div class='hunk'>@@ -1,117 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='ctx'> /*</div><div class='del'>- * AMD 10Gb Ethernet driver</div><div class='del'>- *</div><div class='del'>- * This file is available to you under your choice of the following two</div><div class='del'>- * licenses:</div><div class='del'>- *</div><div class='del'>- * License 1: GPLv2</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014 Advanced Micro Devices, Inc.</div><div class='del'>- *</div><div class='del'>- * This file is free software; you may copy, redistribute and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation, either version 2 of the License, or (at</div><div class='del'>- * your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This file is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- * License 2: Modified BSD</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014 Advanced Micro Devices, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * Redistribution and use in source and binary forms, with or without</div><div class='del'>- * modification, are permitted provided that the following conditions are met:</div><div class='del'>- *     * Redistributions of source code must retain the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer.</div><div class='del'>- *     * Redistributions in binary form must reproduce the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer in the</div><div class='del'>- *       documentation and/or other materials provided with the distribution.</div><div class='del'>- *     * Neither the name of Advanced Micro Devices, Inc. nor the</div><div class='del'>- *       names of its contributors may be used to endorse or promote products</div><div class='del'>- *       derived from this software without specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"</div><div class='del'>- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE</div><div class='del'>- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE</div><div class='del'>- * ARE DISCLAIMED. IN NO EVENT SHALL &lt;COPYRIGHT HOLDER&gt; BE LIABLE FOR ANY</div><div class='del'>- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES</div><div class='del'>- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;</div><div class='del'>- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND</div><div class='del'>- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='del'>- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF</div><div class='del'>- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/debugfs.h&gt;</div><div class='hunk'>@@ -153,7 +44,7 @@ static ssize_t xgbe_common_write(const char __user *buffer, size_t count,</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (*ppos != 0)</div><div class='del'>-		return 0;</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> </div><div class='ctx'> 	if (count &gt;= sizeof(workarea))</div><div class='ctx'> 		return -ENOSPC;</div><div class='hunk'>@@ -316,9 +207,128 @@ static const struct file_operations xpcs_reg_value_fops = {</div><div class='ctx'> 	.write = xpcs_reg_value_write,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static ssize_t xprop_reg_addr_read(struct file *filp, char __user *buffer,</div><div class='add'>+				   size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = filp-&gt;private_data;</div><div class='add'>+</div><div class='add'>+	return xgbe_common_read(buffer, count, ppos, pdata-&gt;debugfs_xprop_reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t xprop_reg_addr_write(struct file *filp,</div><div class='add'>+				    const char __user *buffer,</div><div class='add'>+				    size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = filp-&gt;private_data;</div><div class='add'>+</div><div class='add'>+	return xgbe_common_write(buffer, count, ppos,</div><div class='add'>+				 &amp;pdata-&gt;debugfs_xprop_reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t xprop_reg_value_read(struct file *filp, char __user *buffer,</div><div class='add'>+				    size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = filp-&gt;private_data;</div><div class='add'>+	unsigned int value;</div><div class='add'>+</div><div class='add'>+	value = XP_IOREAD(pdata, pdata-&gt;debugfs_xprop_reg);</div><div class='add'>+</div><div class='add'>+	return xgbe_common_read(buffer, count, ppos, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t xprop_reg_value_write(struct file *filp,</div><div class='add'>+				     const char __user *buffer,</div><div class='add'>+				     size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = filp-&gt;private_data;</div><div class='add'>+	unsigned int value;</div><div class='add'>+	ssize_t len;</div><div class='add'>+</div><div class='add'>+	len = xgbe_common_write(buffer, count, ppos, &amp;value);</div><div class='add'>+	if (len &lt; 0)</div><div class='add'>+		return len;</div><div class='add'>+</div><div class='add'>+	XP_IOWRITE(pdata, pdata-&gt;debugfs_xprop_reg, value);</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations xprop_reg_addr_fops = {</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+	.open = simple_open,</div><div class='add'>+	.read =  xprop_reg_addr_read,</div><div class='add'>+	.write = xprop_reg_addr_write,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct file_operations xprop_reg_value_fops = {</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+	.open = simple_open,</div><div class='add'>+	.read =  xprop_reg_value_read,</div><div class='add'>+	.write = xprop_reg_value_write,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static ssize_t xi2c_reg_addr_read(struct file *filp, char __user *buffer,</div><div class='add'>+				  size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = filp-&gt;private_data;</div><div class='add'>+</div><div class='add'>+	return xgbe_common_read(buffer, count, ppos, pdata-&gt;debugfs_xi2c_reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t xi2c_reg_addr_write(struct file *filp,</div><div class='add'>+				   const char __user *buffer,</div><div class='add'>+				   size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = filp-&gt;private_data;</div><div class='add'>+</div><div class='add'>+	return xgbe_common_write(buffer, count, ppos,</div><div class='add'>+				 &amp;pdata-&gt;debugfs_xi2c_reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t xi2c_reg_value_read(struct file *filp, char __user *buffer,</div><div class='add'>+				   size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = filp-&gt;private_data;</div><div class='add'>+	unsigned int value;</div><div class='add'>+</div><div class='add'>+	value = XI2C_IOREAD(pdata, pdata-&gt;debugfs_xi2c_reg);</div><div class='add'>+</div><div class='add'>+	return xgbe_common_read(buffer, count, ppos, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static ssize_t xi2c_reg_value_write(struct file *filp,</div><div class='add'>+				    const char __user *buffer,</div><div class='add'>+				    size_t count, loff_t *ppos)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = filp-&gt;private_data;</div><div class='add'>+	unsigned int value;</div><div class='add'>+	ssize_t len;</div><div class='add'>+</div><div class='add'>+	len = xgbe_common_write(buffer, count, ppos, &amp;value);</div><div class='add'>+	if (len &lt; 0)</div><div class='add'>+		return len;</div><div class='add'>+</div><div class='add'>+	XI2C_IOWRITE(pdata, pdata-&gt;debugfs_xi2c_reg, value);</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct file_operations xi2c_reg_addr_fops = {</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+	.open = simple_open,</div><div class='add'>+	.read =  xi2c_reg_addr_read,</div><div class='add'>+	.write = xi2c_reg_addr_write,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct file_operations xi2c_reg_value_fops = {</div><div class='add'>+	.owner = THIS_MODULE,</div><div class='add'>+	.open = simple_open,</div><div class='add'>+	.read =  xi2c_reg_value_read,</div><div class='add'>+	.write = xi2c_reg_value_write,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> void xgbe_debugfs_init(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	struct dentry *pfile;</div><div class='ctx'> 	char *buf;</div><div class='ctx'> </div><div class='ctx'> 	/* Set defaults */</div><div class='hunk'>@@ -327,41 +337,53 @@ void xgbe_debugfs_init(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	pdata-&gt;debugfs_xpcs_reg = 0;</div><div class='ctx'> </div><div class='ctx'> 	buf = kasprintf(GFP_KERNEL, "amd-xgbe-%s", pdata-&gt;netdev-&gt;name);</div><div class='del'>-	pdata-&gt;xgbe_debugfs = debugfs_create_dir(buf, NULL);</div><div class='del'>-	if (!pdata-&gt;xgbe_debugfs) {</div><div class='del'>-		netdev_err(pdata-&gt;netdev, "debugfs_create_dir failed\n");</div><div class='add'>+	if (!buf)</div><div class='ctx'> 		return;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	pfile = debugfs_create_file("xgmac_register", 0600,</div><div class='del'>-				    pdata-&gt;xgbe_debugfs, pdata,</div><div class='del'>-				    &amp;xgmac_reg_addr_fops);</div><div class='del'>-	if (!pfile)</div><div class='del'>-		netdev_err(pdata-&gt;netdev, "debugfs_create_file failed\n");</div><div class='add'>+	pdata-&gt;xgbe_debugfs = debugfs_create_dir(buf, NULL);</div><div class='ctx'> </div><div class='del'>-	pfile = debugfs_create_file("xgmac_register_value", 0600,</div><div class='del'>-				    pdata-&gt;xgbe_debugfs, pdata,</div><div class='del'>-				    &amp;xgmac_reg_value_fops);</div><div class='del'>-	if (!pfile)</div><div class='del'>-		netdev_err(pdata-&gt;netdev, "debugfs_create_file failed\n");</div><div class='add'>+	debugfs_create_file("xgmac_register", 0600, pdata-&gt;xgbe_debugfs, pdata,</div><div class='add'>+			    &amp;xgmac_reg_addr_fops);</div><div class='ctx'> </div><div class='del'>-	pfile = debugfs_create_file("xpcs_mmd", 0600,</div><div class='del'>-				    pdata-&gt;xgbe_debugfs, pdata,</div><div class='del'>-				    &amp;xpcs_mmd_fops);</div><div class='del'>-	if (!pfile)</div><div class='del'>-		netdev_err(pdata-&gt;netdev, "debugfs_create_file failed\n");</div><div class='add'>+	debugfs_create_file("xgmac_register_value", 0600, pdata-&gt;xgbe_debugfs,</div><div class='add'>+			    pdata, &amp;xgmac_reg_value_fops);</div><div class='add'>+</div><div class='add'>+	debugfs_create_file("xpcs_mmd", 0600, pdata-&gt;xgbe_debugfs, pdata,</div><div class='add'>+			    &amp;xpcs_mmd_fops);</div><div class='add'>+</div><div class='add'>+	debugfs_create_file("xpcs_register", 0600, pdata-&gt;xgbe_debugfs, pdata,</div><div class='add'>+			    &amp;xpcs_reg_addr_fops);</div><div class='add'>+</div><div class='add'>+	debugfs_create_file("xpcs_register_value", 0600, pdata-&gt;xgbe_debugfs,</div><div class='add'>+			    pdata, &amp;xpcs_reg_value_fops);</div><div class='ctx'> </div><div class='del'>-	pfile = debugfs_create_file("xpcs_register", 0600,</div><div class='add'>+	if (pdata-&gt;xprop_regs) {</div><div class='add'>+		debugfs_create_file("xprop_register", 0600, pdata-&gt;xgbe_debugfs,</div><div class='add'>+				    pdata, &amp;xprop_reg_addr_fops);</div><div class='add'>+</div><div class='add'>+		debugfs_create_file("xprop_register_value", 0600,</div><div class='ctx'> 				    pdata-&gt;xgbe_debugfs, pdata,</div><div class='del'>-				    &amp;xpcs_reg_addr_fops);</div><div class='del'>-	if (!pfile)</div><div class='del'>-		netdev_err(pdata-&gt;netdev, "debugfs_create_file failed\n");</div><div class='add'>+				    &amp;xprop_reg_value_fops);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;xi2c_regs) {</div><div class='add'>+		debugfs_create_file("xi2c_register", 0600, pdata-&gt;xgbe_debugfs,</div><div class='add'>+				    pdata, &amp;xi2c_reg_addr_fops);</div><div class='ctx'> </div><div class='del'>-	pfile = debugfs_create_file("xpcs_register_value", 0600,</div><div class='add'>+		debugfs_create_file("xi2c_register_value", 0600,</div><div class='ctx'> 				    pdata-&gt;xgbe_debugfs, pdata,</div><div class='del'>-				    &amp;xpcs_reg_value_fops);</div><div class='del'>-	if (!pfile)</div><div class='del'>-		netdev_err(pdata-&gt;netdev, "debugfs_create_file failed\n");</div><div class='add'>+				    &amp;xi2c_reg_value_fops);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;vdata-&gt;an_cdr_workaround) {</div><div class='add'>+		debugfs_create_bool("an_cdr_workaround", 0600,</div><div class='add'>+				    pdata-&gt;xgbe_debugfs,</div><div class='add'>+				    &amp;pdata-&gt;debugfs_an_cdr_workaround);</div><div class='add'>+</div><div class='add'>+		debugfs_create_bool("an_cdr_track_early", 0600,</div><div class='add'>+				    pdata-&gt;xgbe_debugfs,</div><div class='add'>+				    &amp;pdata-&gt;debugfs_an_cdr_track_early);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	kfree(buf);</div><div class='ctx'> }</div><div class='hunk'>@@ -371,3 +393,9 @@ void xgbe_debugfs_exit(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	debugfs_remove_recursive(pdata-&gt;xgbe_debugfs);</div><div class='ctx'> 	pdata-&gt;xgbe_debugfs = NULL;</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+void xgbe_debugfs_rename(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	debugfs_change_name(pdata-&gt;xgbe_debugfs,</div><div class='add'>+			    "amd-xgbe-%s", pdata-&gt;netdev-&gt;name);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-desc.c b/drivers/net/ethernet/amd/xgbe/xgbe-desc.c<br/>index b3bc87fe3764..7c8a19988a52 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-desc.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/xgbe/xgbe-desc.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-desc.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe-desc.c</a></div><div class='hunk'>@@ -1,117 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='ctx'> /*</div><div class='del'>- * AMD 10Gb Ethernet driver</div><div class='del'>- *</div><div class='del'>- * This file is available to you under your choice of the following two</div><div class='del'>- * licenses:</div><div class='del'>- *</div><div class='del'>- * License 1: GPLv2</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014 Advanced Micro Devices, Inc.</div><div class='del'>- *</div><div class='del'>- * This file is free software; you may copy, redistribute and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation, either version 2 of the License, or (at</div><div class='del'>- * your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This file is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- * License 2: Modified BSD</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014 Advanced Micro Devices, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * Redistribution and use in source and binary forms, with or without</div><div class='del'>- * modification, are permitted provided that the following conditions are met:</div><div class='del'>- *     * Redistributions of source code must retain the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer.</div><div class='del'>- *     * Redistributions in binary form must reproduce the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer in the</div><div class='del'>- *       documentation and/or other materials provided with the distribution.</div><div class='del'>- *     * Neither the name of Advanced Micro Devices, Inc. nor the</div><div class='del'>- *       names of its contributors may be used to endorse or promote products</div><div class='del'>- *       derived from this software without specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"</div><div class='del'>- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE</div><div class='del'>- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE</div><div class='del'>- * ARE DISCLAIMED. IN NO EVENT SHALL &lt;COPYRIGHT HOLDER&gt; BE LIABLE FOR ANY</div><div class='del'>- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES</div><div class='del'>- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;</div><div class='del'>- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND</div><div class='del'>- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='del'>- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF</div><div class='del'>- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include "xgbe.h"</div><div class='hunk'>@@ -176,8 +67,8 @@ static void xgbe_free_ring_resources(struct xgbe_prv_data *pdata)</div><div class='ctx'> </div><div class='ctx'> 	DBGPR("--&gt;xgbe_free_ring_resources\n");</div><div class='ctx'> </div><div class='del'>-	channel = pdata-&gt;channel;</div><div class='del'>-	for (i = 0; i &lt; pdata-&gt;channel_count; i++, channel++) {</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;channel_count; i++) {</div><div class='add'>+		channel = pdata-&gt;channel[i];</div><div class='ctx'> 		xgbe_free_ring(pdata, channel-&gt;tx_ring);</div><div class='ctx'> 		xgbe_free_ring(pdata, channel-&gt;rx_ring);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -185,34 +76,60 @@ static void xgbe_free_ring_resources(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	DBGPR("&lt;--xgbe_free_ring_resources\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void *xgbe_alloc_node(size_t size, int node)</div><div class='add'>+{</div><div class='add'>+	void *mem;</div><div class='add'>+</div><div class='add'>+	mem = kzalloc_node(size, GFP_KERNEL, node);</div><div class='add'>+	if (!mem)</div><div class='add'>+		mem = kzalloc(size, GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	return mem;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void *xgbe_dma_alloc_node(struct device *dev, size_t size,</div><div class='add'>+				 dma_addr_t *dma, int node)</div><div class='add'>+{</div><div class='add'>+	void *mem;</div><div class='add'>+	int cur_node = dev_to_node(dev);</div><div class='add'>+</div><div class='add'>+	set_dev_node(dev, node);</div><div class='add'>+	mem = dma_alloc_coherent(dev, size, dma, GFP_KERNEL);</div><div class='add'>+	set_dev_node(dev, cur_node);</div><div class='add'>+</div><div class='add'>+	if (!mem)</div><div class='add'>+		mem = dma_alloc_coherent(dev, size, dma, GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	return mem;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int xgbe_init_ring(struct xgbe_prv_data *pdata,</div><div class='ctx'> 			  struct xgbe_ring *ring, unsigned int rdesc_count)</div><div class='ctx'> {</div><div class='del'>-	DBGPR("--&gt;xgbe_init_ring\n");</div><div class='add'>+	size_t size;</div><div class='ctx'> </div><div class='ctx'> 	if (!ring)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='ctx'> 	/* Descriptors */</div><div class='add'>+	size = rdesc_count * sizeof(struct xgbe_ring_desc);</div><div class='add'>+</div><div class='ctx'> 	ring-&gt;rdesc_count = rdesc_count;</div><div class='del'>-	ring-&gt;rdesc = dma_alloc_coherent(pdata-&gt;dev,</div><div class='del'>-					 (sizeof(struct xgbe_ring_desc) *</div><div class='del'>-					  rdesc_count), &amp;ring-&gt;rdesc_dma,</div><div class='del'>-					 GFP_KERNEL);</div><div class='add'>+	ring-&gt;rdesc = xgbe_dma_alloc_node(pdata-&gt;dev, size, &amp;ring-&gt;rdesc_dma,</div><div class='add'>+					  ring-&gt;node);</div><div class='ctx'> 	if (!ring-&gt;rdesc)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	/* Descriptor information */</div><div class='del'>-	ring-&gt;rdata = kcalloc(rdesc_count, sizeof(struct xgbe_ring_data),</div><div class='del'>-			      GFP_KERNEL);</div><div class='add'>+	size = rdesc_count * sizeof(struct xgbe_ring_data);</div><div class='add'>+</div><div class='add'>+	ring-&gt;rdata = xgbe_alloc_node(size, ring-&gt;node);</div><div class='ctx'> 	if (!ring-&gt;rdata)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	netif_dbg(pdata, drv, pdata-&gt;netdev,</div><div class='del'>-		  "rdesc=%p, rdesc_dma=%pad, rdata=%p\n",</div><div class='del'>-		  ring-&gt;rdesc, &amp;ring-&gt;rdesc_dma, ring-&gt;rdata);</div><div class='del'>-</div><div class='del'>-	DBGPR("&lt;--xgbe_init_ring\n");</div><div class='add'>+		  "rdesc=%p, rdesc_dma=%pad, rdata=%p, node=%d\n",</div><div class='add'>+		  ring-&gt;rdesc, &amp;ring-&gt;rdesc_dma, ring-&gt;rdata, ring-&gt;node);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -223,10 +140,8 @@ static int xgbe_alloc_ring_resources(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	DBGPR("--&gt;xgbe_alloc_ring_resources\n");</div><div class='del'>-</div><div class='del'>-	channel = pdata-&gt;channel;</div><div class='del'>-	for (i = 0; i &lt; pdata-&gt;channel_count; i++, channel++) {</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;channel_count; i++) {</div><div class='add'>+		channel = pdata-&gt;channel[i];</div><div class='ctx'> 		netif_dbg(pdata, drv, pdata-&gt;netdev, "%s - Tx ring:\n",</div><div class='ctx'> 			  channel-&gt;name);</div><div class='ctx'> </div><div class='hunk'>@@ -250,8 +165,6 @@ static int xgbe_alloc_ring_resources(struct xgbe_prv_data *pdata)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	DBGPR("&lt;--xgbe_alloc_ring_resources\n");</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='ctx'> err_ring:</div><div class='hunk'>@@ -261,31 +174,42 @@ err_ring:</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int xgbe_alloc_pages(struct xgbe_prv_data *pdata,</div><div class='del'>-			    struct xgbe_page_alloc *pa, gfp_t gfp, int order)</div><div class='add'>+			    struct xgbe_page_alloc *pa, int alloc_order,</div><div class='add'>+			    int node)</div><div class='ctx'> {</div><div class='ctx'> 	struct page *pages = NULL;</div><div class='ctx'> 	dma_addr_t pages_dma;</div><div class='del'>-	int ret;</div><div class='add'>+	gfp_t gfp;</div><div class='add'>+	int order;</div><div class='add'>+</div><div class='add'>+again:</div><div class='add'>+	order = alloc_order;</div><div class='ctx'> </div><div class='ctx'> 	/* Try to obtain pages, decreasing order if necessary */</div><div class='del'>-	gfp |= __GFP_COLD | __GFP_COMP | __GFP_NOWARN;</div><div class='add'>+	gfp = GFP_ATOMIC | __GFP_COMP | __GFP_NOWARN;</div><div class='ctx'> 	while (order &gt;= 0) {</div><div class='del'>-		pages = alloc_pages(gfp, order);</div><div class='add'>+		pages = alloc_pages_node(node, gfp, order);</div><div class='ctx'> 		if (pages)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		order--;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	/* If we couldn't get local pages, try getting from anywhere */</div><div class='add'>+	if (!pages &amp;&amp; (node != NUMA_NO_NODE)) {</div><div class='add'>+		node = NUMA_NO_NODE;</div><div class='add'>+		goto again;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (!pages)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	/* Map the pages */</div><div class='ctx'> 	pages_dma = dma_map_page(pdata-&gt;dev, pages, 0,</div><div class='ctx'> 				 PAGE_SIZE &lt;&lt; order, DMA_FROM_DEVICE);</div><div class='del'>-	ret = dma_mapping_error(pdata-&gt;dev, pages_dma);</div><div class='del'>-	if (ret) {</div><div class='add'>+	if (dma_mapping_error(pdata-&gt;dev, pages_dma)) {</div><div class='ctx'> 		put_page(pages);</div><div class='del'>-		return ret;</div><div class='add'>+		return -ENOMEM;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	pa-&gt;pages = pages;</div><div class='hunk'>@@ -324,25 +248,29 @@ static int xgbe_map_rx_buffer(struct xgbe_prv_data *pdata,</div><div class='ctx'> 			      struct xgbe_ring *ring,</div><div class='ctx'> 			      struct xgbe_ring_data *rdata)</div><div class='ctx'> {</div><div class='del'>-	int order, ret;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	if (!ring-&gt;rx_hdr_pa.pages) {</div><div class='del'>-		ret = xgbe_alloc_pages(pdata, &amp;ring-&gt;rx_hdr_pa, GFP_ATOMIC, 0);</div><div class='add'>+		ret = xgbe_alloc_pages(pdata, &amp;ring-&gt;rx_hdr_pa, 0, ring-&gt;node);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (!ring-&gt;rx_buf_pa.pages) {</div><div class='del'>-		order = max_t(int, PAGE_ALLOC_COSTLY_ORDER - 1, 0);</div><div class='del'>-		ret = xgbe_alloc_pages(pdata, &amp;ring-&gt;rx_buf_pa, GFP_ATOMIC,</div><div class='del'>-				       order);</div><div class='add'>+		ret = xgbe_alloc_pages(pdata, &amp;ring-&gt;rx_buf_pa,</div><div class='add'>+				       PAGE_ALLOC_COSTLY_ORDER, ring-&gt;node);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Set up the header page info */</div><div class='del'>-	xgbe_set_buffer_data(&amp;rdata-&gt;rx.hdr, &amp;ring-&gt;rx_hdr_pa,</div><div class='del'>-			     XGBE_SKB_ALLOC_SIZE);</div><div class='add'>+	if (pdata-&gt;netdev-&gt;features &amp; NETIF_F_RXCSUM) {</div><div class='add'>+		xgbe_set_buffer_data(&amp;rdata-&gt;rx.hdr, &amp;ring-&gt;rx_hdr_pa,</div><div class='add'>+				     XGBE_SKB_ALLOC_SIZE);</div><div class='add'>+	} else {</div><div class='add'>+		xgbe_set_buffer_data(&amp;rdata-&gt;rx.hdr, &amp;ring-&gt;rx_hdr_pa,</div><div class='add'>+				     pdata-&gt;rx_buf_size);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Set up the buffer page info */</div><div class='ctx'> 	xgbe_set_buffer_data(&amp;rdata-&gt;rx.buf, &amp;ring-&gt;rx_buf_pa,</div><div class='hunk'>@@ -363,8 +291,8 @@ static void xgbe_wrapper_tx_descriptor_init(struct xgbe_prv_data *pdata)</div><div class='ctx'> </div><div class='ctx'> 	DBGPR("--&gt;xgbe_wrapper_tx_descriptor_init\n");</div><div class='ctx'> </div><div class='del'>-	channel = pdata-&gt;channel;</div><div class='del'>-	for (i = 0; i &lt; pdata-&gt;channel_count; i++, channel++) {</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;channel_count; i++) {</div><div class='add'>+		channel = pdata-&gt;channel[i];</div><div class='ctx'> 		ring = channel-&gt;tx_ring;</div><div class='ctx'> 		if (!ring)</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -404,8 +332,8 @@ static void xgbe_wrapper_rx_descriptor_init(struct xgbe_prv_data *pdata)</div><div class='ctx'> </div><div class='ctx'> 	DBGPR("--&gt;xgbe_wrapper_rx_descriptor_init\n");</div><div class='ctx'> </div><div class='del'>-	channel = pdata-&gt;channel;</div><div class='del'>-	for (i = 0; i &lt; pdata-&gt;channel_count; i++, channel++) {</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;channel_count; i++) {</div><div class='add'>+		channel = pdata-&gt;channel[i];</div><div class='ctx'> 		ring = channel-&gt;rx_ring;</div><div class='ctx'> 		if (!ring)</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -494,7 +422,7 @@ static int xgbe_map_tx_skb(struct xgbe_channel *channel, struct sk_buff *skb)</div><div class='ctx'> 	struct xgbe_ring *ring = channel-&gt;tx_ring;</div><div class='ctx'> 	struct xgbe_ring_data *rdata;</div><div class='ctx'> 	struct xgbe_packet_data *packet;</div><div class='del'>-	struct skb_frag_struct *frag;</div><div class='add'>+	skb_frag_t *frag;</div><div class='ctx'> 	dma_addr_t skb_dma;</div><div class='ctx'> 	unsigned int start_index, cur_index;</div><div class='ctx'> 	unsigned int offset, tso, vlan, datalen, len;</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-dev.c b/drivers/net/ethernet/amd/xgbe/xgbe-dev.c<br/>index a4473d8ff4fa..b646ae575e6a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-dev.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/xgbe/xgbe-dev.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-dev.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe-dev.c</a></div><div class='hunk'>@@ -1,117 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='ctx'> /*</div><div class='del'>- * AMD 10Gb Ethernet driver</div><div class='del'>- *</div><div class='del'>- * This file is available to you under your choice of the following two</div><div class='del'>- * licenses:</div><div class='del'>- *</div><div class='del'>- * License 1: GPLv2</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014 Advanced Micro Devices, Inc.</div><div class='del'>- *</div><div class='del'>- * This file is free software; you may copy, redistribute and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation, either version 2 of the License, or (at</div><div class='del'>- * your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This file is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- * License 2: Modified BSD</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014 Advanced Micro Devices, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * Redistribution and use in source and binary forms, with or without</div><div class='del'>- * modification, are permitted provided that the following conditions are met:</div><div class='del'>- *     * Redistributions of source code must retain the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer.</div><div class='del'>- *     * Redistributions in binary form must reproduce the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer in the</div><div class='del'>- *       documentation and/or other materials provided with the distribution.</div><div class='del'>- *     * Neither the name of Advanced Micro Devices, Inc. nor the</div><div class='del'>- *       names of its contributors may be used to endorse or promote products</div><div class='del'>- *       derived from this software without specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"</div><div class='del'>- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE</div><div class='del'>- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE</div><div class='del'>- * ARE DISCLAIMED. IN NO EVENT SHALL &lt;COPYRIGHT HOLDER&gt; BE LIABLE FOR ANY</div><div class='del'>- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES</div><div class='del'>- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;</div><div class='del'>- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND</div><div class='del'>- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='del'>- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF</div><div class='del'>- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='hunk'>@@ -119,9 +10,17 @@</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/bitrev.h&gt;</div><div class='ctx'> #include &lt;linux/crc32.h&gt;</div><div class='add'>+#include &lt;linux/crc32poly.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "xgbe.h"</div><div class='ctx'> #include "xgbe-common.h"</div><div class='add'>+#include "xgbe-smn.h"</div><div class='add'>+</div><div class='add'>+static inline unsigned int xgbe_get_max_frame(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	return pdata-&gt;netdev-&gt;mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static unsigned int xgbe_usec_to_riwt(struct xgbe_prv_data *pdata,</div><div class='ctx'> 				      unsigned int usec)</div><div class='hunk'>@@ -169,58 +68,30 @@ static unsigned int xgbe_riwt_to_usec(struct xgbe_prv_data *pdata,</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgbe_config_pblx8(struct xgbe_prv_data *pdata)</div><div class='del'>-{</div><div class='del'>-	struct xgbe_channel *channel;</div><div class='del'>-	unsigned int i;</div><div class='del'>-</div><div class='del'>-	channel = pdata-&gt;channel;</div><div class='del'>-	for (i = 0; i &lt; pdata-&gt;channel_count; i++, channel++)</div><div class='del'>-		XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_CR, PBLX8,</div><div class='del'>-				       pdata-&gt;pblx8);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int xgbe_get_tx_pbl_val(struct xgbe_prv_data *pdata)</div><div class='del'>-{</div><div class='del'>-	return XGMAC_DMA_IOREAD_BITS(pdata-&gt;channel, DMA_CH_TCR, PBL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int xgbe_config_tx_pbl_val(struct xgbe_prv_data *pdata)</div><div class='add'>+static int xgbe_config_pbl_val(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	struct xgbe_channel *channel;</div><div class='add'>+	unsigned int pblx8, pbl;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='del'>-	channel = pdata-&gt;channel;</div><div class='del'>-	for (i = 0; i &lt; pdata-&gt;channel_count; i++, channel++) {</div><div class='del'>-		if (!channel-&gt;tx_ring)</div><div class='del'>-			break;</div><div class='add'>+	pblx8 = DMA_PBL_X8_DISABLE;</div><div class='add'>+	pbl = pdata-&gt;pbl;</div><div class='ctx'> </div><div class='del'>-		XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_TCR, PBL,</div><div class='del'>-				       pdata-&gt;tx_pbl);</div><div class='add'>+	if (pdata-&gt;pbl &gt; 32) {</div><div class='add'>+		pblx8 = DMA_PBL_X8_ENABLE;</div><div class='add'>+		pbl &gt;&gt;= 3;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int xgbe_get_rx_pbl_val(struct xgbe_prv_data *pdata)</div><div class='del'>-{</div><div class='del'>-	return XGMAC_DMA_IOREAD_BITS(pdata-&gt;channel, DMA_CH_RCR, PBL);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int xgbe_config_rx_pbl_val(struct xgbe_prv_data *pdata)</div><div class='del'>-{</div><div class='del'>-	struct xgbe_channel *channel;</div><div class='del'>-	unsigned int i;</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;channel_count; i++) {</div><div class='add'>+		XGMAC_DMA_IOWRITE_BITS(pdata-&gt;channel[i], DMA_CH_CR, PBLX8,</div><div class='add'>+				       pblx8);</div><div class='ctx'> </div><div class='del'>-	channel = pdata-&gt;channel;</div><div class='del'>-	for (i = 0; i &lt; pdata-&gt;channel_count; i++, channel++) {</div><div class='del'>-		if (!channel-&gt;rx_ring)</div><div class='del'>-			break;</div><div class='add'>+		if (pdata-&gt;channel[i]-&gt;tx_ring)</div><div class='add'>+			XGMAC_DMA_IOWRITE_BITS(pdata-&gt;channel[i], DMA_CH_TCR,</div><div class='add'>+					       PBL, pbl);</div><div class='ctx'> </div><div class='del'>-		XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_RCR, PBL,</div><div class='del'>-				       pdata-&gt;rx_pbl);</div><div class='add'>+		if (pdata-&gt;channel[i]-&gt;rx_ring)</div><div class='add'>+			XGMAC_DMA_IOWRITE_BITS(pdata-&gt;channel[i], DMA_CH_RCR,</div><div class='add'>+					       PBL, pbl);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -228,15 +99,13 @@ static int xgbe_config_rx_pbl_val(struct xgbe_prv_data *pdata)</div><div class='ctx'> </div><div class='ctx'> static int xgbe_config_osp_mode(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	struct xgbe_channel *channel;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='del'>-	channel = pdata-&gt;channel;</div><div class='del'>-	for (i = 0; i &lt; pdata-&gt;channel_count; i++, channel++) {</div><div class='del'>-		if (!channel-&gt;tx_ring)</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;channel_count; i++) {</div><div class='add'>+		if (!pdata-&gt;channel[i]-&gt;tx_ring)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_TCR, OSP,</div><div class='add'>+		XGMAC_DMA_IOWRITE_BITS(pdata-&gt;channel[i], DMA_CH_TCR, OSP,</div><div class='ctx'> 				       pdata-&gt;tx_osp_mode);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -287,15 +156,13 @@ static int xgbe_config_tx_threshold(struct xgbe_prv_data *pdata,</div><div class='ctx'> </div><div class='ctx'> static int xgbe_config_rx_coalesce(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	struct xgbe_channel *channel;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='del'>-	channel = pdata-&gt;channel;</div><div class='del'>-	for (i = 0; i &lt; pdata-&gt;channel_count; i++, channel++) {</div><div class='del'>-		if (!channel-&gt;rx_ring)</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;channel_count; i++) {</div><div class='add'>+		if (!pdata-&gt;channel[i]-&gt;rx_ring)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_RIWT, RWT,</div><div class='add'>+		XGMAC_DMA_IOWRITE_BITS(pdata-&gt;channel[i], DMA_CH_RIWT, RWT,</div><div class='ctx'> 				       pdata-&gt;rx_riwt);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -309,47 +176,55 @@ static int xgbe_config_tx_coalesce(struct xgbe_prv_data *pdata)</div><div class='ctx'> </div><div class='ctx'> static void xgbe_config_rx_buffer_size(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	struct xgbe_channel *channel;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='del'>-	channel = pdata-&gt;channel;</div><div class='del'>-	for (i = 0; i &lt; pdata-&gt;channel_count; i++, channel++) {</div><div class='del'>-		if (!channel-&gt;rx_ring)</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;channel_count; i++) {</div><div class='add'>+		if (!pdata-&gt;channel[i]-&gt;rx_ring)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_RCR, RBSZ,</div><div class='add'>+		XGMAC_DMA_IOWRITE_BITS(pdata-&gt;channel[i], DMA_CH_RCR, RBSZ,</div><div class='ctx'> 				       pdata-&gt;rx_buf_size);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgbe_config_tso_mode(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	struct xgbe_channel *channel;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='del'>-	channel = pdata-&gt;channel;</div><div class='del'>-	for (i = 0; i &lt; pdata-&gt;channel_count; i++, channel++) {</div><div class='del'>-		if (!channel-&gt;tx_ring)</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;channel_count; i++) {</div><div class='add'>+		if (!pdata-&gt;channel[i]-&gt;tx_ring)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_TCR, TSE, 1);</div><div class='add'>+		XGMAC_DMA_IOWRITE_BITS(pdata-&gt;channel[i], DMA_CH_TCR, TSE, 1);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgbe_config_sph_mode(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	struct xgbe_channel *channel;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='del'>-	channel = pdata-&gt;channel;</div><div class='del'>-	for (i = 0; i &lt; pdata-&gt;channel_count; i++, channel++) {</div><div class='del'>-		if (!channel-&gt;rx_ring)</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;channel_count; i++) {</div><div class='add'>+		if (!pdata-&gt;channel[i]-&gt;rx_ring)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_CR, SPH, 1);</div><div class='add'>+		XGMAC_DMA_IOWRITE_BITS(pdata-&gt;channel[i], DMA_CH_CR, SPH, 1);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	XGMAC_IOWRITE_BITS(pdata, MAC_RCR, HDSMS, XGBE_SPH_HDSMS_SIZE);</div><div class='add'>+	pdata-&gt;sph = true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_disable_sph_mode(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;channel_count; i++) {</div><div class='add'>+		if (!pdata-&gt;channel[i]-&gt;rx_ring)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		XGMAC_DMA_IOWRITE_BITS(pdata-&gt;channel[i], DMA_CH_CR, SPH, 0);</div><div class='add'>+	}</div><div class='add'>+	pdata-&gt;sph = false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int xgbe_write_rss_reg(struct xgbe_prv_data *pdata, unsigned int type,</div><div class='hunk'>@@ -491,19 +366,93 @@ static void xgbe_config_rss(struct xgbe_prv_data *pdata)</div><div class='ctx'> 			   "error configuring RSS, RSS disabled\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool xgbe_is_pfc_queue(struct xgbe_prv_data *pdata,</div><div class='add'>+			      unsigned int queue)</div><div class='add'>+{</div><div class='add'>+	unsigned int prio, tc;</div><div class='add'>+</div><div class='add'>+	for (prio = 0; prio &lt; IEEE_8021QAZ_MAX_TCS; prio++) {</div><div class='add'>+		/* Does this queue handle the priority? */</div><div class='add'>+		if (pdata-&gt;prio2q_map[prio] != queue)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		/* Get the Traffic Class for this priority */</div><div class='add'>+		tc = pdata-&gt;ets-&gt;prio_tc[prio];</div><div class='add'>+</div><div class='add'>+		/* Check if PFC is enabled for this traffic class */</div><div class='add'>+		if (pdata-&gt;pfc-&gt;pfc_en &amp; (1 &lt;&lt; tc))</div><div class='add'>+			return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_set_vxlan_id(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	/* Program the VXLAN port */</div><div class='add'>+	XGMAC_IOWRITE_BITS(pdata, MAC_TIR, TNID, pdata-&gt;vxlan_port);</div><div class='add'>+</div><div class='add'>+	netif_dbg(pdata, drv, pdata-&gt;netdev, "VXLAN tunnel id set to %hx\n",</div><div class='add'>+		  pdata-&gt;vxlan_port);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_enable_vxlan(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	if (!pdata-&gt;hw_feat.vxn)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Program the VXLAN port */</div><div class='add'>+	xgbe_set_vxlan_id(pdata);</div><div class='add'>+</div><div class='add'>+	/* Allow for IPv6/UDP zero-checksum VXLAN packets */</div><div class='add'>+	XGMAC_IOWRITE_BITS(pdata, MAC_PFR, VUCC, 1);</div><div class='add'>+</div><div class='add'>+	/* Enable VXLAN tunneling mode */</div><div class='add'>+	XGMAC_IOWRITE_BITS(pdata, MAC_TCR, VNM, 0);</div><div class='add'>+	XGMAC_IOWRITE_BITS(pdata, MAC_TCR, VNE, 1);</div><div class='add'>+</div><div class='add'>+	netif_dbg(pdata, drv, pdata-&gt;netdev, "VXLAN acceleration enabled\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_disable_vxlan(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	if (!pdata-&gt;hw_feat.vxn)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Disable tunneling mode */</div><div class='add'>+	XGMAC_IOWRITE_BITS(pdata, MAC_TCR, VNE, 0);</div><div class='add'>+</div><div class='add'>+	/* Clear IPv6/UDP zero-checksum VXLAN packets setting */</div><div class='add'>+	XGMAC_IOWRITE_BITS(pdata, MAC_PFR, VUCC, 0);</div><div class='add'>+</div><div class='add'>+	/* Clear the VXLAN port */</div><div class='add'>+	XGMAC_IOWRITE_BITS(pdata, MAC_TIR, TNID, 0);</div><div class='add'>+</div><div class='add'>+	netif_dbg(pdata, drv, pdata-&gt;netdev, "VXLAN acceleration disabled\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int xgbe_get_fc_queue_count(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	unsigned int max_q_count = XGMAC_MAX_FLOW_CONTROL_QUEUES;</div><div class='add'>+</div><div class='add'>+	/* From MAC ver 30H the TFCR is per priority, instead of per queue */</div><div class='add'>+	if (XGMAC_GET_BITS(pdata-&gt;hw_feat.version, MAC_VR, SNPSVER) &gt;= 0x30)</div><div class='add'>+		return max_q_count;</div><div class='add'>+	else</div><div class='add'>+		return min_t(unsigned int, pdata-&gt;tx_q_count, max_q_count);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int xgbe_disable_tx_flow_control(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	unsigned int max_q_count, q_count;</div><div class='ctx'> 	unsigned int reg, reg_val;</div><div class='del'>-	unsigned int i;</div><div class='add'>+	unsigned int i, q_count;</div><div class='ctx'> </div><div class='ctx'> 	/* Clear MTL flow control */</div><div class='ctx'> 	for (i = 0; i &lt; pdata-&gt;rx_q_count; i++)</div><div class='ctx'> 		XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQOMR, EHFC, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* Clear MAC flow control */</div><div class='del'>-	max_q_count = XGMAC_MAX_FLOW_CONTROL_QUEUES;</div><div class='del'>-	q_count = min_t(unsigned int, pdata-&gt;tx_q_count, max_q_count);</div><div class='add'>+	q_count = xgbe_get_fc_queue_count(pdata);</div><div class='ctx'> 	reg = MAC_Q0TFCR;</div><div class='ctx'> 	for (i = 0; i &lt; q_count; i++) {</div><div class='ctx'> 		reg_val = XGMAC_IOREAD(pdata, reg);</div><div class='hunk'>@@ -518,17 +467,34 @@ static int xgbe_disable_tx_flow_control(struct xgbe_prv_data *pdata)</div><div class='ctx'> </div><div class='ctx'> static int xgbe_enable_tx_flow_control(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	unsigned int max_q_count, q_count;</div><div class='add'>+	struct ieee_pfc *pfc = pdata-&gt;pfc;</div><div class='add'>+	struct ieee_ets *ets = pdata-&gt;ets;</div><div class='ctx'> 	unsigned int reg, reg_val;</div><div class='del'>-	unsigned int i;</div><div class='add'>+	unsigned int i, q_count;</div><div class='ctx'> </div><div class='ctx'> 	/* Set MTL flow control */</div><div class='del'>-	for (i = 0; i &lt; pdata-&gt;rx_q_count; i++)</div><div class='del'>-		XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQOMR, EHFC, 1);</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;rx_q_count; i++) {</div><div class='add'>+		unsigned int ehfc = 0;</div><div class='add'>+</div><div class='add'>+		if (pdata-&gt;rx_rfd[i]) {</div><div class='add'>+			/* Flow control thresholds are established */</div><div class='add'>+			if (pfc &amp;&amp; ets) {</div><div class='add'>+				if (xgbe_is_pfc_queue(pdata, i))</div><div class='add'>+					ehfc = 1;</div><div class='add'>+			} else {</div><div class='add'>+				ehfc = 1;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQOMR, EHFC, ehfc);</div><div class='add'>+</div><div class='add'>+		netif_dbg(pdata, drv, pdata-&gt;netdev,</div><div class='add'>+			  "flow control %s for RXq%u\n",</div><div class='add'>+			  ehfc ? "enabled" : "disabled", i);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Set MAC flow control */</div><div class='del'>-	max_q_count = XGMAC_MAX_FLOW_CONTROL_QUEUES;</div><div class='del'>-	q_count = min_t(unsigned int, pdata-&gt;tx_q_count, max_q_count);</div><div class='add'>+	q_count = xgbe_get_fc_queue_count(pdata);</div><div class='ctx'> 	reg = MAC_Q0TFCR;</div><div class='ctx'> 	for (i = 0; i &lt; q_count; i++) {</div><div class='ctx'> 		reg_val = XGMAC_IOREAD(pdata, reg);</div><div class='hunk'>@@ -598,47 +564,63 @@ static void xgbe_config_flow_control(struct xgbe_prv_data *pdata)</div><div class='ctx'> static void xgbe_enable_dma_interrupts(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgbe_channel *channel;</div><div class='del'>-	unsigned int dma_ch_isr, dma_ch_ier;</div><div class='del'>-	unsigned int i;</div><div class='add'>+	unsigned int i, ver;</div><div class='add'>+</div><div class='add'>+	/* Set the interrupt mode if supported */</div><div class='add'>+	if (pdata-&gt;channel_irq_mode)</div><div class='add'>+		XGMAC_IOWRITE_BITS(pdata, DMA_MR, INTM,</div><div class='add'>+				   pdata-&gt;channel_irq_mode);</div><div class='add'>+</div><div class='add'>+	ver = XGMAC_GET_BITS(pdata-&gt;hw_feat.version, MAC_VR, SNPSVER);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;channel_count; i++) {</div><div class='add'>+		channel = pdata-&gt;channel[i];</div><div class='ctx'> </div><div class='del'>-	channel = pdata-&gt;channel;</div><div class='del'>-	for (i = 0; i &lt; pdata-&gt;channel_count; i++, channel++) {</div><div class='ctx'> 		/* Clear all the interrupts which are set */</div><div class='del'>-		dma_ch_isr = XGMAC_DMA_IOREAD(channel, DMA_CH_SR);</div><div class='del'>-		XGMAC_DMA_IOWRITE(channel, DMA_CH_SR, dma_ch_isr);</div><div class='add'>+		XGMAC_DMA_IOWRITE(channel, DMA_CH_SR,</div><div class='add'>+				  XGMAC_DMA_IOREAD(channel, DMA_CH_SR));</div><div class='ctx'> </div><div class='ctx'> 		/* Clear all interrupt enable bits */</div><div class='del'>-		dma_ch_ier = 0;</div><div class='add'>+		channel-&gt;curr_ier = 0;</div><div class='ctx'> </div><div class='ctx'> 		/* Enable following interrupts</div><div class='ctx'> 		 *   NIE  - Normal Interrupt Summary Enable</div><div class='ctx'> 		 *   AIE  - Abnormal Interrupt Summary Enable</div><div class='ctx'> 		 *   FBEE - Fatal Bus Error Enable</div><div class='ctx'> 		 */</div><div class='del'>-		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, NIE, 1);</div><div class='del'>-		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, AIE, 1);</div><div class='del'>-		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, FBEE, 1);</div><div class='add'>+		if (ver &lt; 0x21) {</div><div class='add'>+			XGMAC_SET_BITS(channel-&gt;curr_ier, DMA_CH_IER, NIE20, 1);</div><div class='add'>+			XGMAC_SET_BITS(channel-&gt;curr_ier, DMA_CH_IER, AIE20, 1);</div><div class='add'>+		} else {</div><div class='add'>+			XGMAC_SET_BITS(channel-&gt;curr_ier, DMA_CH_IER, NIE, 1);</div><div class='add'>+			XGMAC_SET_BITS(channel-&gt;curr_ier, DMA_CH_IER, AIE, 1);</div><div class='add'>+		}</div><div class='add'>+		XGMAC_SET_BITS(channel-&gt;curr_ier, DMA_CH_IER, FBEE, 1);</div><div class='ctx'> </div><div class='ctx'> 		if (channel-&gt;tx_ring) {</div><div class='ctx'> 			/* Enable the following Tx interrupts</div><div class='ctx'> 			 *   TIE  - Transmit Interrupt Enable (unless using</div><div class='del'>-			 *          per channel interrupts)</div><div class='add'>+			 *          per channel interrupts in edge triggered</div><div class='add'>+			 *          mode)</div><div class='ctx'> 			 */</div><div class='del'>-			if (!pdata-&gt;per_channel_irq)</div><div class='del'>-				XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TIE, 1);</div><div class='add'>+			if (!pdata-&gt;per_channel_irq || pdata-&gt;channel_irq_mode)</div><div class='add'>+				XGMAC_SET_BITS(channel-&gt;curr_ier,</div><div class='add'>+					       DMA_CH_IER, TIE, 1);</div><div class='ctx'> 		}</div><div class='ctx'> 		if (channel-&gt;rx_ring) {</div><div class='ctx'> 			/* Enable following Rx interrupts</div><div class='ctx'> 			 *   RBUE - Receive Buffer Unavailable Enable</div><div class='ctx'> 			 *   RIE  - Receive Interrupt Enable (unless using</div><div class='del'>-			 *          per channel interrupts)</div><div class='add'>+			 *          per channel interrupts in edge triggered</div><div class='add'>+			 *          mode)</div><div class='ctx'> 			 */</div><div class='del'>-			XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RBUE, 1);</div><div class='del'>-			if (!pdata-&gt;per_channel_irq)</div><div class='del'>-				XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RIE, 1);</div><div class='add'>+			XGMAC_SET_BITS(channel-&gt;curr_ier, DMA_CH_IER, RBUE, 1);</div><div class='add'>+			if (!pdata-&gt;per_channel_irq || pdata-&gt;channel_irq_mode)</div><div class='add'>+				XGMAC_SET_BITS(channel-&gt;curr_ier,</div><div class='add'>+					       DMA_CH_IER, RIE, 1);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		XGMAC_DMA_IOWRITE(channel, DMA_CH_IER, dma_ch_ier);</div><div class='add'>+		XGMAC_DMA_IOWRITE(channel, DMA_CH_IER, channel-&gt;curr_ier);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -670,34 +652,199 @@ static void xgbe_enable_mac_interrupts(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	/* Enable all counter interrupts */</div><div class='ctx'> 	XGMAC_IOWRITE_BITS(pdata, MMC_RIER, ALL_INTERRUPTS, 0xffffffff);</div><div class='ctx'> 	XGMAC_IOWRITE_BITS(pdata, MMC_TIER, ALL_INTERRUPTS, 0xffffffff);</div><div class='add'>+</div><div class='add'>+	/* Enable MDIO single command completion interrupt */</div><div class='add'>+	XGMAC_IOWRITE_BITS(pdata, MAC_MDIOIER, SNGLCOMPIE, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgbe_set_gmii_speed(struct xgbe_prv_data *pdata)</div><div class='add'>+static void xgbe_enable_ecc_interrupts(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	if (XGMAC_IOREAD_BITS(pdata, MAC_TCR, SS) == 0x3)</div><div class='del'>-		return 0;</div><div class='add'>+	unsigned int ecc_isr, ecc_ier = 0;</div><div class='add'>+</div><div class='add'>+	if (!pdata-&gt;vdata-&gt;ecc_support)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Clear all the interrupts which are set */</div><div class='add'>+	ecc_isr = XP_IOREAD(pdata, XP_ECC_ISR);</div><div class='add'>+	XP_IOWRITE(pdata, XP_ECC_ISR, ecc_isr);</div><div class='add'>+</div><div class='add'>+	/* Enable ECC interrupts */</div><div class='add'>+	XP_SET_BITS(ecc_ier, XP_ECC_IER, TX_DED, 1);</div><div class='add'>+	XP_SET_BITS(ecc_ier, XP_ECC_IER, TX_SEC, 1);</div><div class='add'>+	XP_SET_BITS(ecc_ier, XP_ECC_IER, RX_DED, 1);</div><div class='add'>+	XP_SET_BITS(ecc_ier, XP_ECC_IER, RX_SEC, 1);</div><div class='add'>+	XP_SET_BITS(ecc_ier, XP_ECC_IER, DESC_DED, 1);</div><div class='add'>+	XP_SET_BITS(ecc_ier, XP_ECC_IER, DESC_SEC, 1);</div><div class='add'>+</div><div class='add'>+	XP_IOWRITE(pdata, XP_ECC_IER, ecc_ier);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_disable_ecc_ded(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	unsigned int ecc_ier;</div><div class='add'>+</div><div class='add'>+	ecc_ier = XP_IOREAD(pdata, XP_ECC_IER);</div><div class='add'>+</div><div class='add'>+	/* Disable ECC DED interrupts */</div><div class='add'>+	XP_SET_BITS(ecc_ier, XP_ECC_IER, TX_DED, 0);</div><div class='add'>+	XP_SET_BITS(ecc_ier, XP_ECC_IER, RX_DED, 0);</div><div class='add'>+	XP_SET_BITS(ecc_ier, XP_ECC_IER, DESC_DED, 0);</div><div class='add'>+</div><div class='add'>+	XP_IOWRITE(pdata, XP_ECC_IER, ecc_ier);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_disable_ecc_sec(struct xgbe_prv_data *pdata,</div><div class='add'>+				 enum xgbe_ecc_sec sec)</div><div class='add'>+{</div><div class='add'>+	unsigned int ecc_ier;</div><div class='add'>+</div><div class='add'>+	ecc_ier = XP_IOREAD(pdata, XP_ECC_IER);</div><div class='add'>+</div><div class='add'>+	/* Disable ECC SEC interrupt */</div><div class='add'>+	switch (sec) {</div><div class='add'>+	case XGBE_ECC_SEC_TX:</div><div class='add'>+	XP_SET_BITS(ecc_ier, XP_ECC_IER, TX_SEC, 0);</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_ECC_SEC_RX:</div><div class='add'>+	XP_SET_BITS(ecc_ier, XP_ECC_IER, RX_SEC, 0);</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_ECC_SEC_DESC:</div><div class='add'>+	XP_SET_BITS(ecc_ier, XP_ECC_IER, DESC_SEC, 0);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	XP_IOWRITE(pdata, XP_ECC_IER, ecc_ier);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_set_speed(struct xgbe_prv_data *pdata, int speed)</div><div class='add'>+{</div><div class='add'>+	unsigned int ss;</div><div class='add'>+</div><div class='add'>+	switch (speed) {</div><div class='add'>+	case SPEED_10:</div><div class='add'>+		ss = 0x07;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_1000:</div><div class='add'>+		ss = 0x03;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_2500:</div><div class='add'>+		ss = 0x02;</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_10000:</div><div class='add'>+		ss = 0x00;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	XGMAC_IOWRITE_BITS(pdata, MAC_TCR, SS, 0x3);</div><div class='add'>+	if (XGMAC_IOREAD_BITS(pdata, MAC_TCR, SS) != ss)</div><div class='add'>+		XGMAC_IOWRITE_BITS(pdata, MAC_TCR, SS, ss);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgbe_set_gmii_2500_speed(struct xgbe_prv_data *pdata)</div><div class='add'>+static int xgbe_enable_rx_vlan_stripping(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	if (XGMAC_IOREAD_BITS(pdata, MAC_TCR, SS) == 0x2)</div><div class='del'>-		return 0;</div><div class='add'>+	/* Put the VLAN tag in the Rx descriptor */</div><div class='add'>+	XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, EVLRXS, 1);</div><div class='add'>+</div><div class='add'>+	/* Don't check the VLAN type */</div><div class='add'>+	XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, DOVLTC, 1);</div><div class='add'>+</div><div class='add'>+	/* Check only C-TAG (0x8100) packets */</div><div class='add'>+	XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, ERSVLM, 0);</div><div class='add'>+</div><div class='add'>+	/* Don't consider an S-TAG (0x88A8) packet as a VLAN packet */</div><div class='add'>+	XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, ESVL, 0);</div><div class='ctx'> </div><div class='del'>-	XGMAC_IOWRITE_BITS(pdata, MAC_TCR, SS, 0x2);</div><div class='add'>+	/* Enable VLAN tag stripping */</div><div class='add'>+	XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, EVLS, 0x3);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgbe_set_xgmii_speed(struct xgbe_prv_data *pdata)</div><div class='add'>+static int xgbe_disable_rx_vlan_stripping(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	if (XGMAC_IOREAD_BITS(pdata, MAC_TCR, SS) == 0)</div><div class='del'>-		return 0;</div><div class='add'>+	XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, EVLS, 0);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_enable_rx_vlan_filtering(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	/* Enable VLAN filtering */</div><div class='add'>+	XGMAC_IOWRITE_BITS(pdata, MAC_PFR, VTFE, 1);</div><div class='ctx'> </div><div class='del'>-	XGMAC_IOWRITE_BITS(pdata, MAC_TCR, SS, 0);</div><div class='add'>+	/* Enable VLAN Hash Table filtering */</div><div class='add'>+	XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, VTHM, 1);</div><div class='add'>+</div><div class='add'>+	/* Disable VLAN tag inverse matching */</div><div class='add'>+	XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, VTIM, 0);</div><div class='add'>+</div><div class='add'>+	/* Only filter on the lower 12-bits of the VLAN tag */</div><div class='add'>+	XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, ETV, 1);</div><div class='add'>+</div><div class='add'>+	/* In order for the VLAN Hash Table filtering to be effective,</div><div class='add'>+	 * the VLAN tag identifier in the VLAN Tag Register must not</div><div class='add'>+	 * be zero.  Set the VLAN tag identifier to "1" to enable the</div><div class='add'>+	 * VLAN Hash Table filtering.  This implies that a VLAN tag of</div><div class='add'>+	 * 1 will always pass filtering.</div><div class='add'>+	 */</div><div class='add'>+	XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, VL, 1);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_disable_rx_vlan_filtering(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	/* Disable VLAN filtering */</div><div class='add'>+	XGMAC_IOWRITE_BITS(pdata, MAC_PFR, VTFE, 0);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 xgbe_vid_crc32_le(__le16 vid_le)</div><div class='add'>+{</div><div class='add'>+	u32 crc = ~0;</div><div class='add'>+	u32 temp = 0;</div><div class='add'>+	unsigned char *data = (unsigned char *)&amp;vid_le;</div><div class='add'>+	unsigned char data_byte = 0;</div><div class='add'>+	int i, bits;</div><div class='add'>+</div><div class='add'>+	bits = get_bitmask_order(VLAN_VID_MASK);</div><div class='add'>+	for (i = 0; i &lt; bits; i++) {</div><div class='add'>+		if ((i % 8) == 0)</div><div class='add'>+			data_byte = data[i / 8];</div><div class='add'>+</div><div class='add'>+		temp = ((crc &amp; 1) ^ data_byte) &amp; 1;</div><div class='add'>+		crc &gt;&gt;= 1;</div><div class='add'>+		data_byte &gt;&gt;= 1;</div><div class='add'>+</div><div class='add'>+		if (temp)</div><div class='add'>+			crc ^= CRC32_POLY_LE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return crc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_update_vlan_hash_table(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	u32 crc;</div><div class='add'>+	u16 vid;</div><div class='add'>+	__le16 vid_le;</div><div class='add'>+	u16 vlan_hash_table = 0;</div><div class='add'>+</div><div class='add'>+	/* Generate the VLAN Hash Table value */</div><div class='add'>+	for_each_set_bit(vid, pdata-&gt;active_vlans, VLAN_N_VID) {</div><div class='add'>+		/* Get the CRC32 value of the VLAN ID */</div><div class='add'>+		vid_le = cpu_to_le16(vid);</div><div class='add'>+		crc = bitrev32(~xgbe_vid_crc32_le(vid_le)) &gt;&gt; 28;</div><div class='add'>+</div><div class='add'>+		vlan_hash_table |= (1 &lt;&lt; crc);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set the VLAN Hash Table filtering register */</div><div class='add'>+	XGMAC_IOWRITE_BITS(pdata, MAC_VLANHTR, VLHT, vlan_hash_table);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -714,6 +861,14 @@ static int xgbe_set_promiscuous_mode(struct xgbe_prv_data *pdata,</div><div class='ctx'> 		  enable ? "entering" : "leaving");</div><div class='ctx'> 	XGMAC_IOWRITE_BITS(pdata, MAC_PFR, PR, val);</div><div class='ctx'> </div><div class='add'>+	/* Hardware will still perform VLAN filtering in promiscuous mode */</div><div class='add'>+	if (enable) {</div><div class='add'>+		xgbe_disable_rx_vlan_filtering(pdata);</div><div class='add'>+	} else {</div><div class='add'>+		if (pdata-&gt;netdev-&gt;features &amp; NETIF_F_HW_VLAN_CTAG_FILTER)</div><div class='add'>+			xgbe_enable_rx_vlan_filtering(pdata);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -842,7 +997,7 @@ static int xgbe_add_mac_addresses(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgbe_set_mac_address(struct xgbe_prv_data *pdata, u8 *addr)</div><div class='add'>+static int xgbe_set_mac_address(struct xgbe_prv_data *pdata, const u8 *addr)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int mac_addr_hi, mac_addr_lo;</div><div class='ctx'> </div><div class='hunk'>@@ -872,16 +1027,184 @@ static int xgbe_config_rx_mode(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgbe_read_mmd_regs(struct xgbe_prv_data *pdata, int prtad,</div><div class='del'>-			      int mmd_reg)</div><div class='add'>+static int xgbe_clr_gpio(struct xgbe_prv_data *pdata, unsigned int gpio)</div><div class='add'>+{</div><div class='add'>+	unsigned int reg;</div><div class='add'>+</div><div class='add'>+	if (gpio &gt; 15)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	reg = XGMAC_IOREAD(pdata, MAC_GPIOSR);</div><div class='add'>+</div><div class='add'>+	reg &amp;= ~(1 &lt;&lt; (gpio + 16));</div><div class='add'>+	XGMAC_IOWRITE(pdata, MAC_GPIOSR, reg);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_set_gpio(struct xgbe_prv_data *pdata, unsigned int gpio)</div><div class='add'>+{</div><div class='add'>+	unsigned int reg;</div><div class='add'>+</div><div class='add'>+	if (gpio &gt; 15)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	reg = XGMAC_IOREAD(pdata, MAC_GPIOSR);</div><div class='add'>+</div><div class='add'>+	reg |= (1 &lt;&lt; (gpio + 16));</div><div class='add'>+	XGMAC_IOWRITE(pdata, MAC_GPIOSR, reg);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int xgbe_get_mmd_address(struct xgbe_prv_data *pdata,</div><div class='add'>+					 int mmd_reg)</div><div class='add'>+{</div><div class='add'>+	return (mmd_reg &amp; XGBE_ADDR_C45) ?</div><div class='add'>+		mmd_reg &amp; ~XGBE_ADDR_C45 :</div><div class='add'>+		(pdata-&gt;mdio_mmd &lt;&lt; 16) | (mmd_reg &amp; 0xffff);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_get_pcs_index_and_offset(struct xgbe_prv_data *pdata,</div><div class='add'>+					  unsigned int mmd_address,</div><div class='add'>+					  unsigned int *index,</div><div class='add'>+					  unsigned int *offset)</div><div class='add'>+{</div><div class='add'>+	/* The PCS registers are accessed using mmio. The underlying</div><div class='add'>+	 * management interface uses indirect addressing to access the MMD</div><div class='add'>+	 * register sets. This requires accessing of the PCS register in two</div><div class='add'>+	 * phases, an address phase and a data phase.</div><div class='add'>+	 *</div><div class='add'>+	 * The mmio interface is based on 16-bit offsets and values. All</div><div class='add'>+	 * register offsets must therefore be adjusted by left shifting the</div><div class='add'>+	 * offset 1 bit and reading 16 bits of data.</div><div class='add'>+	 */</div><div class='add'>+	mmd_address &lt;&lt;= 1;</div><div class='add'>+	*index = mmd_address &amp; ~pdata-&gt;xpcs_window_mask;</div><div class='add'>+	*offset = pdata-&gt;xpcs_window + (mmd_address &amp; pdata-&gt;xpcs_window_mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_read_mmd_regs_v3(struct xgbe_prv_data *pdata, int prtad,</div><div class='add'>+				 int mmd_reg)</div><div class='add'>+{</div><div class='add'>+	unsigned int mmd_address, index, offset;</div><div class='add'>+	u32 smn_address;</div><div class='add'>+	int mmd_data;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mmd_address = xgbe_get_mmd_address(pdata, mmd_reg);</div><div class='add'>+</div><div class='add'>+	xgbe_get_pcs_index_and_offset(pdata, mmd_address, &amp;index, &amp;offset);</div><div class='add'>+</div><div class='add'>+	smn_address = pdata-&gt;smn_base + pdata-&gt;xpcs_window_sel_reg;</div><div class='add'>+	ret = amd_smn_write(0, smn_address, index);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = amd_smn_read(0, pdata-&gt;smn_base + offset, &amp;mmd_data);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	mmd_data = (offset % 4) ? FIELD_GET(XGBE_GEN_HI_MASK, mmd_data) :</div><div class='add'>+				  FIELD_GET(XGBE_GEN_LO_MASK, mmd_data);</div><div class='add'>+</div><div class='add'>+	return mmd_data;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_write_mmd_regs_v3(struct xgbe_prv_data *pdata, int prtad,</div><div class='add'>+				   int mmd_reg, int mmd_data)</div><div class='ctx'> {</div><div class='add'>+	unsigned int pci_mmd_data, hi_mask, lo_mask;</div><div class='add'>+	unsigned int mmd_address, index, offset;</div><div class='add'>+	struct pci_dev *dev;</div><div class='add'>+	u32 smn_address;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	dev = pdata-&gt;pcidev;</div><div class='add'>+	mmd_address = xgbe_get_mmd_address(pdata, mmd_reg);</div><div class='add'>+</div><div class='add'>+	xgbe_get_pcs_index_and_offset(pdata, mmd_address, &amp;index, &amp;offset);</div><div class='add'>+</div><div class='add'>+	smn_address = pdata-&gt;smn_base + pdata-&gt;xpcs_window_sel_reg;</div><div class='add'>+	ret = amd_smn_write(0, smn_address, index);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pci_err(dev, "Failed to write data 0x%x\n", index);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = amd_smn_read(0, pdata-&gt;smn_base + offset, &amp;pci_mmd_data);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pci_err(dev, "Failed to read data\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (offset % 4) {</div><div class='add'>+		hi_mask = FIELD_PREP(XGBE_GEN_HI_MASK, mmd_data);</div><div class='add'>+		lo_mask = FIELD_GET(XGBE_GEN_LO_MASK, pci_mmd_data);</div><div class='add'>+	} else {</div><div class='add'>+		hi_mask = FIELD_PREP(XGBE_GEN_HI_MASK,</div><div class='add'>+				     FIELD_GET(XGBE_GEN_HI_MASK, pci_mmd_data));</div><div class='add'>+		lo_mask = FIELD_GET(XGBE_GEN_LO_MASK, mmd_data);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pci_mmd_data = hi_mask | lo_mask;</div><div class='add'>+</div><div class='add'>+	ret = amd_smn_write(0, smn_address, index);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pci_err(dev, "Failed to write data 0x%x\n", index);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = amd_smn_write(0, (pdata-&gt;smn_base + offset), pci_mmd_data);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pci_err(dev, "Failed to write data 0x%x\n", pci_mmd_data);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_read_mmd_regs_v2(struct xgbe_prv_data *pdata, int prtad,</div><div class='add'>+				 int mmd_reg)</div><div class='add'>+{</div><div class='add'>+	unsigned int mmd_address, index, offset;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int mmd_data;</div><div class='add'>+</div><div class='add'>+	mmd_address = xgbe_get_mmd_address(pdata, mmd_reg);</div><div class='add'>+</div><div class='add'>+	xgbe_get_pcs_index_and_offset(pdata, mmd_address, &amp;index, &amp;offset);</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;pdata-&gt;xpcs_lock, flags);</div><div class='add'>+	XPCS32_IOWRITE(pdata, pdata-&gt;xpcs_window_sel_reg, index);</div><div class='add'>+	mmd_data = XPCS16_IOREAD(pdata, offset);</div><div class='add'>+	spin_unlock_irqrestore(&amp;pdata-&gt;xpcs_lock, flags);</div><div class='add'>+</div><div class='add'>+	return mmd_data;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_write_mmd_regs_v2(struct xgbe_prv_data *pdata, int prtad,</div><div class='add'>+				   int mmd_reg, int mmd_data)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	unsigned int mmd_address, index, offset;</div><div class='add'>+</div><div class='add'>+	mmd_address = xgbe_get_mmd_address(pdata, mmd_reg);</div><div class='add'>+</div><div class='add'>+	xgbe_get_pcs_index_and_offset(pdata, mmd_address, &amp;index, &amp;offset);</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;pdata-&gt;xpcs_lock, flags);</div><div class='add'>+	XPCS32_IOWRITE(pdata, pdata-&gt;xpcs_window_sel_reg, index);</div><div class='add'>+	XPCS16_IOWRITE(pdata, offset, mmd_data);</div><div class='add'>+	spin_unlock_irqrestore(&amp;pdata-&gt;xpcs_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_read_mmd_regs_v1(struct xgbe_prv_data *pdata, int prtad,</div><div class='add'>+				 int mmd_reg)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> 	unsigned int mmd_address;</div><div class='ctx'> 	int mmd_data;</div><div class='ctx'> </div><div class='del'>-	if (mmd_reg &amp; MII_ADDR_C45)</div><div class='del'>-		mmd_address = mmd_reg &amp; ~MII_ADDR_C45;</div><div class='del'>-	else</div><div class='del'>-		mmd_address = (pdata-&gt;mdio_mmd &lt;&lt; 16) | (mmd_reg &amp; 0xffff);</div><div class='add'>+	mmd_address = xgbe_get_mmd_address(pdata, mmd_reg);</div><div class='ctx'> </div><div class='ctx'> 	/* The PCS registers are accessed using mmio. The underlying APB3</div><div class='ctx'> 	 * management interface uses indirect addressing to access the MMD</div><div class='hunk'>@@ -892,23 +1215,21 @@ static int xgbe_read_mmd_regs(struct xgbe_prv_data *pdata, int prtad,</div><div class='ctx'> 	 * register offsets must therefore be adjusted by left shifting the</div><div class='ctx'> 	 * offset 2 bits and reading 32 bits of data.</div><div class='ctx'> 	 */</div><div class='del'>-	mutex_lock(&amp;pdata-&gt;xpcs_mutex);</div><div class='del'>-	XPCS_IOWRITE(pdata, PCS_MMD_SELECT &lt;&lt; 2, mmd_address &gt;&gt; 8);</div><div class='del'>-	mmd_data = XPCS_IOREAD(pdata, (mmd_address &amp; 0xff) &lt;&lt; 2);</div><div class='del'>-	mutex_unlock(&amp;pdata-&gt;xpcs_mutex);</div><div class='add'>+	spin_lock_irqsave(&amp;pdata-&gt;xpcs_lock, flags);</div><div class='add'>+	XPCS32_IOWRITE(pdata, PCS_V1_WINDOW_SELECT, mmd_address &gt;&gt; 8);</div><div class='add'>+	mmd_data = XPCS32_IOREAD(pdata, (mmd_address &amp; 0xff) &lt;&lt; 2);</div><div class='add'>+	spin_unlock_irqrestore(&amp;pdata-&gt;xpcs_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	return mmd_data;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xgbe_write_mmd_regs(struct xgbe_prv_data *pdata, int prtad,</div><div class='del'>-				int mmd_reg, int mmd_data)</div><div class='add'>+static void xgbe_write_mmd_regs_v1(struct xgbe_prv_data *pdata, int prtad,</div><div class='add'>+				   int mmd_reg, int mmd_data)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int mmd_address;</div><div class='add'>+	unsigned long flags;</div><div class='ctx'> </div><div class='del'>-	if (mmd_reg &amp; MII_ADDR_C45)</div><div class='del'>-		mmd_address = mmd_reg &amp; ~MII_ADDR_C45;</div><div class='del'>-	else</div><div class='del'>-		mmd_address = (pdata-&gt;mdio_mmd &lt;&lt; 16) | (mmd_reg &amp; 0xffff);</div><div class='add'>+	mmd_address = xgbe_get_mmd_address(pdata, mmd_reg);</div><div class='ctx'> </div><div class='ctx'> 	/* The PCS registers are accessed using mmio. The underlying APB3</div><div class='ctx'> 	 * management interface uses indirect addressing to access the MMD</div><div class='hunk'>@@ -917,139 +1238,191 @@ static void xgbe_write_mmd_regs(struct xgbe_prv_data *pdata, int prtad,</div><div class='ctx'> 	 *</div><div class='ctx'> 	 * The mmio interface is based on 32-bit offsets and values. All</div><div class='ctx'> 	 * register offsets must therefore be adjusted by left shifting the</div><div class='del'>-	 * offset 2 bits and reading 32 bits of data.</div><div class='add'>+	 * offset 2 bits and writing 32 bits of data.</div><div class='ctx'> 	 */</div><div class='del'>-	mutex_lock(&amp;pdata-&gt;xpcs_mutex);</div><div class='del'>-	XPCS_IOWRITE(pdata, PCS_MMD_SELECT &lt;&lt; 2, mmd_address &gt;&gt; 8);</div><div class='del'>-	XPCS_IOWRITE(pdata, (mmd_address &amp; 0xff) &lt;&lt; 2, mmd_data);</div><div class='del'>-	mutex_unlock(&amp;pdata-&gt;xpcs_mutex);</div><div class='add'>+	spin_lock_irqsave(&amp;pdata-&gt;xpcs_lock, flags);</div><div class='add'>+	XPCS32_IOWRITE(pdata, PCS_V1_WINDOW_SELECT, mmd_address &gt;&gt; 8);</div><div class='add'>+	XPCS32_IOWRITE(pdata, (mmd_address &amp; 0xff) &lt;&lt; 2, mmd_data);</div><div class='add'>+	spin_unlock_irqrestore(&amp;pdata-&gt;xpcs_lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgbe_tx_complete(struct xgbe_ring_desc *rdesc)</div><div class='add'>+static int xgbe_read_mmd_regs(struct xgbe_prv_data *pdata, int prtad,</div><div class='add'>+			      int mmd_reg)</div><div class='ctx'> {</div><div class='del'>-	return !XGMAC_GET_BITS_LE(rdesc-&gt;desc3, TX_NORMAL_DESC3, OWN);</div><div class='add'>+	switch (pdata-&gt;vdata-&gt;xpcs_access) {</div><div class='add'>+	case XGBE_XPCS_ACCESS_V1:</div><div class='add'>+		return xgbe_read_mmd_regs_v1(pdata, prtad, mmd_reg);</div><div class='add'>+</div><div class='add'>+	case XGBE_XPCS_ACCESS_V2:</div><div class='add'>+	default:</div><div class='add'>+		return xgbe_read_mmd_regs_v2(pdata, prtad, mmd_reg);</div><div class='add'>+</div><div class='add'>+	case XGBE_XPCS_ACCESS_V3:</div><div class='add'>+		return xgbe_read_mmd_regs_v3(pdata, prtad, mmd_reg);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgbe_disable_rx_csum(struct xgbe_prv_data *pdata)</div><div class='add'>+static void xgbe_write_mmd_regs(struct xgbe_prv_data *pdata, int prtad,</div><div class='add'>+				int mmd_reg, int mmd_data)</div><div class='ctx'> {</div><div class='del'>-	XGMAC_IOWRITE_BITS(pdata, MAC_RCR, IPC, 0);</div><div class='add'>+	switch (pdata-&gt;vdata-&gt;xpcs_access) {</div><div class='add'>+	case XGBE_XPCS_ACCESS_V1:</div><div class='add'>+		return xgbe_write_mmd_regs_v1(pdata, prtad, mmd_reg, mmd_data);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	case XGBE_XPCS_ACCESS_V3:</div><div class='add'>+		return xgbe_write_mmd_regs_v3(pdata, prtad, mmd_reg, mmd_data);</div><div class='add'>+</div><div class='add'>+	case XGBE_XPCS_ACCESS_V2:</div><div class='add'>+	default:</div><div class='add'>+		return xgbe_write_mmd_regs_v2(pdata, prtad, mmd_reg, mmd_data);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgbe_enable_rx_csum(struct xgbe_prv_data *pdata)</div><div class='add'>+static unsigned int xgbe_create_mdio_sca_c22(int port, int reg)</div><div class='ctx'> {</div><div class='del'>-	XGMAC_IOWRITE_BITS(pdata, MAC_RCR, IPC, 1);</div><div class='add'>+	unsigned int mdio_sca;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	mdio_sca = 0;</div><div class='add'>+	XGMAC_SET_BITS(mdio_sca, MAC_MDIOSCAR, RA, reg);</div><div class='add'>+	XGMAC_SET_BITS(mdio_sca, MAC_MDIOSCAR, PA, port);</div><div class='add'>+</div><div class='add'>+	return mdio_sca;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgbe_enable_rx_vlan_stripping(struct xgbe_prv_data *pdata)</div><div class='add'>+static unsigned int xgbe_create_mdio_sca_c45(int port, unsigned int da, int reg)</div><div class='ctx'> {</div><div class='del'>-	/* Put the VLAN tag in the Rx descriptor */</div><div class='del'>-	XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, EVLRXS, 1);</div><div class='add'>+	unsigned int mdio_sca;</div><div class='ctx'> </div><div class='del'>-	/* Don't check the VLAN type */</div><div class='del'>-	XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, DOVLTC, 1);</div><div class='add'>+	mdio_sca = 0;</div><div class='add'>+	XGMAC_SET_BITS(mdio_sca, MAC_MDIOSCAR, RA, reg);</div><div class='add'>+	XGMAC_SET_BITS(mdio_sca, MAC_MDIOSCAR, PA, port);</div><div class='add'>+	XGMAC_SET_BITS(mdio_sca, MAC_MDIOSCAR, DA, da);</div><div class='ctx'> </div><div class='del'>-	/* Check only C-TAG (0x8100) packets */</div><div class='del'>-	XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, ERSVLM, 0);</div><div class='add'>+	return mdio_sca;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	/* Don't consider an S-TAG (0x88A8) packet as a VLAN packet */</div><div class='del'>-	XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, ESVL, 0);</div><div class='add'>+static int xgbe_write_ext_mii_regs(struct xgbe_prv_data *pdata,</div><div class='add'>+				   unsigned int mdio_sca, u16 val)</div><div class='add'>+{</div><div class='add'>+	unsigned int mdio_sccd;</div><div class='ctx'> </div><div class='del'>-	/* Enable VLAN tag stripping */</div><div class='del'>-	XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, EVLS, 0x3);</div><div class='add'>+	reinit_completion(&amp;pdata-&gt;mdio_complete);</div><div class='add'>+</div><div class='add'>+	XGMAC_IOWRITE(pdata, MAC_MDIOSCAR, mdio_sca);</div><div class='add'>+</div><div class='add'>+	mdio_sccd = 0;</div><div class='add'>+	XGMAC_SET_BITS(mdio_sccd, MAC_MDIOSCCDR, DATA, val);</div><div class='add'>+	XGMAC_SET_BITS(mdio_sccd, MAC_MDIOSCCDR, CMD, 1);</div><div class='add'>+	XGMAC_SET_BITS(mdio_sccd, MAC_MDIOSCCDR, BUSY, 1);</div><div class='add'>+	XGMAC_IOWRITE(pdata, MAC_MDIOSCCDR, mdio_sccd);</div><div class='add'>+</div><div class='add'>+	if (!wait_for_completion_timeout(&amp;pdata-&gt;mdio_complete, HZ)) {</div><div class='add'>+		netdev_err(pdata-&gt;netdev, "mdio write operation timed out\n");</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgbe_disable_rx_vlan_stripping(struct xgbe_prv_data *pdata)</div><div class='add'>+static int xgbe_write_ext_mii_regs_c22(struct xgbe_prv_data *pdata, int addr,</div><div class='add'>+				       int reg, u16 val)</div><div class='ctx'> {</div><div class='del'>-	XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, EVLS, 0);</div><div class='add'>+	unsigned int mdio_sca;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	mdio_sca = xgbe_create_mdio_sca_c22(addr, reg);</div><div class='add'>+</div><div class='add'>+	return xgbe_write_ext_mii_regs(pdata, mdio_sca, val);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgbe_enable_rx_vlan_filtering(struct xgbe_prv_data *pdata)</div><div class='add'>+static int xgbe_write_ext_mii_regs_c45(struct xgbe_prv_data *pdata, int addr,</div><div class='add'>+				       int devad, int reg, u16 val)</div><div class='ctx'> {</div><div class='del'>-	/* Enable VLAN filtering */</div><div class='del'>-	XGMAC_IOWRITE_BITS(pdata, MAC_PFR, VTFE, 1);</div><div class='add'>+	unsigned int mdio_sca;</div><div class='ctx'> </div><div class='del'>-	/* Enable VLAN Hash Table filtering */</div><div class='del'>-	XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, VTHM, 1);</div><div class='add'>+	mdio_sca = xgbe_create_mdio_sca_c45(addr, devad, reg);</div><div class='ctx'> </div><div class='del'>-	/* Disable VLAN tag inverse matching */</div><div class='del'>-	XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, VTIM, 0);</div><div class='add'>+	return xgbe_write_ext_mii_regs(pdata, mdio_sca, val);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	/* Only filter on the lower 12-bits of the VLAN tag */</div><div class='del'>-	XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, ETV, 1);</div><div class='add'>+static int xgbe_read_ext_mii_regs(struct xgbe_prv_data *pdata,</div><div class='add'>+				  unsigned int mdio_sca)</div><div class='add'>+{</div><div class='add'>+	unsigned int mdio_sccd;</div><div class='ctx'> </div><div class='del'>-	/* In order for the VLAN Hash Table filtering to be effective,</div><div class='del'>-	 * the VLAN tag identifier in the VLAN Tag Register must not</div><div class='del'>-	 * be zero.  Set the VLAN tag identifier to "1" to enable the</div><div class='del'>-	 * VLAN Hash Table filtering.  This implies that a VLAN tag of</div><div class='del'>-	 * 1 will always pass filtering.</div><div class='del'>-	 */</div><div class='del'>-	XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, VL, 1);</div><div class='add'>+	reinit_completion(&amp;pdata-&gt;mdio_complete);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	XGMAC_IOWRITE(pdata, MAC_MDIOSCAR, mdio_sca);</div><div class='add'>+</div><div class='add'>+	mdio_sccd = 0;</div><div class='add'>+	XGMAC_SET_BITS(mdio_sccd, MAC_MDIOSCCDR, CMD, 3);</div><div class='add'>+	XGMAC_SET_BITS(mdio_sccd, MAC_MDIOSCCDR, BUSY, 1);</div><div class='add'>+	XGMAC_IOWRITE(pdata, MAC_MDIOSCCDR, mdio_sccd);</div><div class='add'>+</div><div class='add'>+	if (!wait_for_completion_timeout(&amp;pdata-&gt;mdio_complete, HZ)) {</div><div class='add'>+		netdev_err(pdata-&gt;netdev, "mdio read operation timed out\n");</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return XGMAC_IOREAD_BITS(pdata, MAC_MDIOSCCDR, DATA);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgbe_disable_rx_vlan_filtering(struct xgbe_prv_data *pdata)</div><div class='add'>+static int xgbe_read_ext_mii_regs_c22(struct xgbe_prv_data *pdata, int addr,</div><div class='add'>+				      int reg)</div><div class='ctx'> {</div><div class='del'>-	/* Disable VLAN filtering */</div><div class='del'>-	XGMAC_IOWRITE_BITS(pdata, MAC_PFR, VTFE, 0);</div><div class='add'>+	unsigned int mdio_sca;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	mdio_sca = xgbe_create_mdio_sca_c22(addr, reg);</div><div class='add'>+</div><div class='add'>+	return xgbe_read_ext_mii_regs(pdata, mdio_sca);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifndef CRCPOLY_LE</div><div class='del'>-#define CRCPOLY_LE 0xedb88320</div><div class='del'>-#endif</div><div class='del'>-static u32 xgbe_vid_crc32_le(__le16 vid_le)</div><div class='add'>+static int xgbe_read_ext_mii_regs_c45(struct xgbe_prv_data *pdata, int addr,</div><div class='add'>+				      int devad, int reg)</div><div class='ctx'> {</div><div class='del'>-	u32 poly = CRCPOLY_LE;</div><div class='del'>-	u32 crc = ~0;</div><div class='del'>-	u32 temp = 0;</div><div class='del'>-	unsigned char *data = (unsigned char *)&amp;vid_le;</div><div class='del'>-	unsigned char data_byte = 0;</div><div class='del'>-	int i, bits;</div><div class='add'>+	unsigned int mdio_sca;</div><div class='ctx'> </div><div class='del'>-	bits = get_bitmask_order(VLAN_VID_MASK);</div><div class='del'>-	for (i = 0; i &lt; bits; i++) {</div><div class='del'>-		if ((i % 8) == 0)</div><div class='del'>-			data_byte = data[i / 8];</div><div class='add'>+	mdio_sca = xgbe_create_mdio_sca_c45(addr, devad, reg);</div><div class='ctx'> </div><div class='del'>-		temp = ((crc &amp; 1) ^ data_byte) &amp; 1;</div><div class='del'>-		crc &gt;&gt;= 1;</div><div class='del'>-		data_byte &gt;&gt;= 1;</div><div class='add'>+	return xgbe_read_ext_mii_regs(pdata, mdio_sca);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		if (temp)</div><div class='del'>-			crc ^= poly;</div><div class='add'>+static int xgbe_set_ext_mii_mode(struct xgbe_prv_data *pdata, unsigned int port,</div><div class='add'>+				 enum xgbe_mdio_mode mode)</div><div class='add'>+{</div><div class='add'>+	unsigned int reg_val = XGMAC_IOREAD(pdata, MAC_MDIOCL22R);</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case XGBE_MDIO_MODE_CL22:</div><div class='add'>+		if (port &gt; XGMAC_MAX_C22_PORT)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		reg_val |= (1 &lt;&lt; port);</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_MDIO_MODE_CL45:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return crc;</div><div class='add'>+	XGMAC_IOWRITE(pdata, MAC_MDIOCL22R, reg_val);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgbe_update_vlan_hash_table(struct xgbe_prv_data *pdata)</div><div class='add'>+static int xgbe_tx_complete(struct xgbe_ring_desc *rdesc)</div><div class='ctx'> {</div><div class='del'>-	u32 crc;</div><div class='del'>-	u16 vid;</div><div class='del'>-	__le16 vid_le;</div><div class='del'>-	u16 vlan_hash_table = 0;</div><div class='add'>+	return !XGMAC_GET_BITS_LE(rdesc-&gt;desc3, TX_NORMAL_DESC3, OWN);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	/* Generate the VLAN Hash Table value */</div><div class='del'>-	for_each_set_bit(vid, pdata-&gt;active_vlans, VLAN_N_VID) {</div><div class='del'>-		/* Get the CRC32 value of the VLAN ID */</div><div class='del'>-		vid_le = cpu_to_le16(vid);</div><div class='del'>-		crc = bitrev32(~xgbe_vid_crc32_le(vid_le)) &gt;&gt; 28;</div><div class='add'>+static int xgbe_disable_rx_csum(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	XGMAC_IOWRITE_BITS(pdata, MAC_RCR, IPC, 0);</div><div class='ctx'> </div><div class='del'>-		vlan_hash_table |= (1 &lt;&lt; crc);</div><div class='del'>-	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	/* Set the VLAN Hash Table filtering register */</div><div class='del'>-	XGMAC_IOWRITE_BITS(pdata, MAC_VLANHTR, VLHT, vlan_hash_table);</div><div class='add'>+static int xgbe_enable_rx_csum(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	XGMAC_IOWRITE_BITS(pdata, MAC_RCR, IPC, 1);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1187,183 +1560,6 @@ static void xgbe_rx_desc_init(struct xgbe_channel *channel)</div><div class='ctx'> 	DBGPR("&lt;--rx_desc_init\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xgbe_update_tstamp_addend(struct xgbe_prv_data *pdata,</div><div class='del'>-				      unsigned int addend)</div><div class='del'>-{</div><div class='del'>-	/* Set the addend register value and tell the device */</div><div class='del'>-	XGMAC_IOWRITE(pdata, MAC_TSAR, addend);</div><div class='del'>-	XGMAC_IOWRITE_BITS(pdata, MAC_TSCR, TSADDREG, 1);</div><div class='del'>-</div><div class='del'>-	/* Wait for addend update to complete */</div><div class='del'>-	while (XGMAC_IOREAD_BITS(pdata, MAC_TSCR, TSADDREG))</div><div class='del'>-		udelay(5);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void xgbe_set_tstamp_time(struct xgbe_prv_data *pdata, unsigned int sec,</div><div class='del'>-				 unsigned int nsec)</div><div class='del'>-{</div><div class='del'>-	/* Set the time values and tell the device */</div><div class='del'>-	XGMAC_IOWRITE(pdata, MAC_STSUR, sec);</div><div class='del'>-	XGMAC_IOWRITE(pdata, MAC_STNUR, nsec);</div><div class='del'>-	XGMAC_IOWRITE_BITS(pdata, MAC_TSCR, TSINIT, 1);</div><div class='del'>-</div><div class='del'>-	/* Wait for time update to complete */</div><div class='del'>-	while (XGMAC_IOREAD_BITS(pdata, MAC_TSCR, TSINIT))</div><div class='del'>-		udelay(5);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u64 xgbe_get_tstamp_time(struct xgbe_prv_data *pdata)</div><div class='del'>-{</div><div class='del'>-	u64 nsec;</div><div class='del'>-</div><div class='del'>-	nsec = XGMAC_IOREAD(pdata, MAC_STSR);</div><div class='del'>-	nsec *= NSEC_PER_SEC;</div><div class='del'>-	nsec += XGMAC_IOREAD(pdata, MAC_STNR);</div><div class='del'>-</div><div class='del'>-	return nsec;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u64 xgbe_get_tx_tstamp(struct xgbe_prv_data *pdata)</div><div class='del'>-{</div><div class='del'>-	unsigned int tx_snr;</div><div class='del'>-	u64 nsec;</div><div class='del'>-</div><div class='del'>-	tx_snr = XGMAC_IOREAD(pdata, MAC_TXSNR);</div><div class='del'>-	if (XGMAC_GET_BITS(tx_snr, MAC_TXSNR, TXTSSTSMIS))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	nsec = XGMAC_IOREAD(pdata, MAC_TXSSR);</div><div class='del'>-	nsec *= NSEC_PER_SEC;</div><div class='del'>-	nsec += tx_snr;</div><div class='del'>-</div><div class='del'>-	return nsec;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void xgbe_get_rx_tstamp(struct xgbe_packet_data *packet,</div><div class='del'>-			       struct xgbe_ring_desc *rdesc)</div><div class='del'>-{</div><div class='del'>-	u64 nsec;</div><div class='del'>-</div><div class='del'>-	if (XGMAC_GET_BITS_LE(rdesc-&gt;desc3, RX_CONTEXT_DESC3, TSA) &amp;&amp;</div><div class='del'>-	    !XGMAC_GET_BITS_LE(rdesc-&gt;desc3, RX_CONTEXT_DESC3, TSD)) {</div><div class='del'>-		nsec = le32_to_cpu(rdesc-&gt;desc1);</div><div class='del'>-		nsec &lt;&lt;= 32;</div><div class='del'>-		nsec |= le32_to_cpu(rdesc-&gt;desc0);</div><div class='del'>-		if (nsec != 0xffffffffffffffffULL) {</div><div class='del'>-			packet-&gt;rx_tstamp = nsec;</div><div class='del'>-			XGMAC_SET_BITS(packet-&gt;attributes, RX_PACKET_ATTRIBUTES,</div><div class='del'>-				       RX_TSTAMP, 1);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int xgbe_config_tstamp(struct xgbe_prv_data *pdata,</div><div class='del'>-			      unsigned int mac_tscr)</div><div class='del'>-{</div><div class='del'>-	/* Set one nano-second accuracy */</div><div class='del'>-	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSCTRLSSR, 1);</div><div class='del'>-</div><div class='del'>-	/* Set fine timestamp update */</div><div class='del'>-	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSCFUPDT, 1);</div><div class='del'>-</div><div class='del'>-	/* Overwrite earlier timestamps */</div><div class='del'>-	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TXTSSTSM, 1);</div><div class='del'>-</div><div class='del'>-	XGMAC_IOWRITE(pdata, MAC_TSCR, mac_tscr);</div><div class='del'>-</div><div class='del'>-	/* Exit if timestamping is not enabled */</div><div class='del'>-	if (!XGMAC_GET_BITS(mac_tscr, MAC_TSCR, TSENA))</div><div class='del'>-		return 0;</div><div class='del'>-</div><div class='del'>-	/* Initialize time registers */</div><div class='del'>-	XGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SSINC, XGBE_TSTAMP_SSINC);</div><div class='del'>-	XGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SNSINC, XGBE_TSTAMP_SNSINC);</div><div class='del'>-	xgbe_update_tstamp_addend(pdata, pdata-&gt;tstamp_addend);</div><div class='del'>-	xgbe_set_tstamp_time(pdata, 0, 0);</div><div class='del'>-</div><div class='del'>-	/* Initialize the timecounter */</div><div class='del'>-	timecounter_init(&amp;pdata-&gt;tstamp_tc, &amp;pdata-&gt;tstamp_cc,</div><div class='del'>-			 ktime_to_ns(ktime_get_real()));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void xgbe_config_dcb_tc(struct xgbe_prv_data *pdata)</div><div class='del'>-{</div><div class='del'>-	struct ieee_ets *ets = pdata-&gt;ets;</div><div class='del'>-	unsigned int total_weight, min_weight, weight;</div><div class='del'>-	unsigned int i;</div><div class='del'>-</div><div class='del'>-	if (!ets)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	/* Set Tx to deficit weighted round robin scheduling algorithm (when</div><div class='del'>-	 * traffic class is using ETS algorithm)</div><div class='del'>-	 */</div><div class='del'>-	XGMAC_IOWRITE_BITS(pdata, MTL_OMR, ETSALG, MTL_ETSALG_DWRR);</div><div class='del'>-</div><div class='del'>-	/* Set Traffic Class algorithms */</div><div class='del'>-	total_weight = pdata-&gt;netdev-&gt;mtu * pdata-&gt;hw_feat.tc_cnt;</div><div class='del'>-	min_weight = total_weight / 100;</div><div class='del'>-	if (!min_weight)</div><div class='del'>-		min_weight = 1;</div><div class='del'>-</div><div class='del'>-	for (i = 0; i &lt; pdata-&gt;hw_feat.tc_cnt; i++) {</div><div class='del'>-		switch (ets-&gt;tc_tsa[i]) {</div><div class='del'>-		case IEEE_8021QAZ_TSA_STRICT:</div><div class='del'>-			netif_dbg(pdata, drv, pdata-&gt;netdev,</div><div class='del'>-				  "TC%u using SP\n", i);</div><div class='del'>-			XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_TC_ETSCR, TSA,</div><div class='del'>-					       MTL_TSA_SP);</div><div class='del'>-			break;</div><div class='del'>-		case IEEE_8021QAZ_TSA_ETS:</div><div class='del'>-			weight = total_weight * ets-&gt;tc_tx_bw[i] / 100;</div><div class='del'>-			weight = clamp(weight, min_weight, total_weight);</div><div class='del'>-</div><div class='del'>-			netif_dbg(pdata, drv, pdata-&gt;netdev,</div><div class='del'>-				  "TC%u using DWRR (weight %u)\n", i, weight);</div><div class='del'>-			XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_TC_ETSCR, TSA,</div><div class='del'>-					       MTL_TSA_ETS);</div><div class='del'>-			XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_TC_QWR, QW,</div><div class='del'>-					       weight);</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void xgbe_config_dcb_pfc(struct xgbe_prv_data *pdata)</div><div class='del'>-{</div><div class='del'>-	struct ieee_pfc *pfc = pdata-&gt;pfc;</div><div class='del'>-	struct ieee_ets *ets = pdata-&gt;ets;</div><div class='del'>-	unsigned int mask, reg, reg_val;</div><div class='del'>-	unsigned int tc, prio;</div><div class='del'>-</div><div class='del'>-	if (!pfc || !ets)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	for (tc = 0; tc &lt; pdata-&gt;hw_feat.tc_cnt; tc++) {</div><div class='del'>-		mask = 0;</div><div class='del'>-		for (prio = 0; prio &lt; IEEE_8021QAZ_MAX_TCS; prio++) {</div><div class='del'>-			if ((pfc-&gt;pfc_en &amp; (1 &lt;&lt; prio)) &amp;&amp;</div><div class='del'>-			    (ets-&gt;prio_tc[prio] == tc))</div><div class='del'>-				mask |= (1 &lt;&lt; prio);</div><div class='del'>-		}</div><div class='del'>-		mask &amp;= 0xff;</div><div class='del'>-</div><div class='del'>-		netif_dbg(pdata, drv, pdata-&gt;netdev, "TC%u PFC mask=%#x\n",</div><div class='del'>-			  tc, mask);</div><div class='del'>-		reg = MTL_TCPM0R + (MTL_TCPM_INC * (tc / MTL_TCPM_TC_PER_REG));</div><div class='del'>-		reg_val = XGMAC_IOREAD(pdata, reg);</div><div class='del'>-</div><div class='del'>-		reg_val &amp;= ~(0xff &lt;&lt; ((tc % MTL_TCPM_TC_PER_REG) &lt;&lt; 3));</div><div class='del'>-		reg_val |= (mask &lt;&lt; ((tc % MTL_TCPM_TC_PER_REG) &lt;&lt; 3));</div><div class='del'>-</div><div class='del'>-		XGMAC_IOWRITE(pdata, reg, reg_val);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	xgbe_config_flow_control(pdata);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static void xgbe_tx_start_xmit(struct xgbe_channel *channel,</div><div class='ctx'> 			       struct xgbe_ring *ring)</div><div class='ctx'> {</div><div class='hunk'>@@ -1396,7 +1592,8 @@ static void xgbe_dev_xmit(struct xgbe_channel *channel)</div><div class='ctx'> 	struct xgbe_ring_data *rdata;</div><div class='ctx'> 	struct xgbe_ring_desc *rdesc;</div><div class='ctx'> 	struct xgbe_packet_data *packet = &amp;ring-&gt;packet_data;</div><div class='del'>-	unsigned int csum, tso, vlan;</div><div class='add'>+	unsigned int tx_packets, tx_bytes;</div><div class='add'>+	unsigned int csum, tso, vlan, vxlan;</div><div class='ctx'> 	unsigned int tso_context, vlan_context;</div><div class='ctx'> 	unsigned int tx_set_ic;</div><div class='ctx'> 	int start_index = ring-&gt;cur;</div><div class='hunk'>@@ -1405,12 +1602,17 @@ static void xgbe_dev_xmit(struct xgbe_channel *channel)</div><div class='ctx'> </div><div class='ctx'> 	DBGPR("--&gt;xgbe_dev_xmit\n");</div><div class='ctx'> </div><div class='add'>+	tx_packets = packet-&gt;tx_packets;</div><div class='add'>+	tx_bytes = packet-&gt;tx_bytes;</div><div class='add'>+</div><div class='ctx'> 	csum = XGMAC_GET_BITS(packet-&gt;attributes, TX_PACKET_ATTRIBUTES,</div><div class='ctx'> 			      CSUM_ENABLE);</div><div class='ctx'> 	tso = XGMAC_GET_BITS(packet-&gt;attributes, TX_PACKET_ATTRIBUTES,</div><div class='ctx'> 			     TSO_ENABLE);</div><div class='ctx'> 	vlan = XGMAC_GET_BITS(packet-&gt;attributes, TX_PACKET_ATTRIBUTES,</div><div class='ctx'> 			      VLAN_CTAG);</div><div class='add'>+	vxlan = XGMAC_GET_BITS(packet-&gt;attributes, TX_PACKET_ATTRIBUTES,</div><div class='add'>+			       VXLAN);</div><div class='ctx'> </div><div class='ctx'> 	if (tso &amp;&amp; (packet-&gt;mss != ring-&gt;tx.cur_mss))</div><div class='ctx'> 		tso_context = 1;</div><div class='hunk'>@@ -1432,13 +1634,12 @@ static void xgbe_dev_xmit(struct xgbe_channel *channel)</div><div class='ctx'> 	 *     - Addition of Tx frame count to the frame count since the</div><div class='ctx'> 	 *       last interrupt was set does not exceed the frame count setting</div><div class='ctx'> 	 */</div><div class='del'>-	ring-&gt;coalesce_count += packet-&gt;tx_packets;</div><div class='add'>+	ring-&gt;coalesce_count += tx_packets;</div><div class='ctx'> 	if (!pdata-&gt;tx_frames)</div><div class='ctx'> 		tx_set_ic = 0;</div><div class='del'>-	else if (packet-&gt;tx_packets &gt; pdata-&gt;tx_frames)</div><div class='add'>+	else if (tx_packets &gt; pdata-&gt;tx_frames)</div><div class='ctx'> 		tx_set_ic = 1;</div><div class='del'>-	else if ((ring-&gt;coalesce_count % pdata-&gt;tx_frames) &lt;</div><div class='del'>-		 packet-&gt;tx_packets)</div><div class='add'>+	else if ((ring-&gt;coalesce_count % pdata-&gt;tx_frames) &lt; tx_packets)</div><div class='ctx'> 		tx_set_ic = 1;</div><div class='ctx'> 	else</div><div class='ctx'> 		tx_set_ic = 0;</div><div class='hunk'>@@ -1528,7 +1729,7 @@ static void xgbe_dev_xmit(struct xgbe_channel *channel)</div><div class='ctx'> 		XGMAC_SET_BITS_LE(rdesc-&gt;desc3, TX_NORMAL_DESC3, TCPHDRLEN,</div><div class='ctx'> 				  packet-&gt;tcp_header_len / 4);</div><div class='ctx'> </div><div class='del'>-		pdata-&gt;ext_stats.tx_tso_packets++;</div><div class='add'>+		pdata-&gt;ext_stats.tx_tso_packets += tx_packets;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		/* Enable CRC and Pad Insertion */</div><div class='ctx'> 		XGMAC_SET_BITS_LE(rdesc-&gt;desc3, TX_NORMAL_DESC3, CPC, 0);</div><div class='hunk'>@@ -1543,6 +1744,13 @@ static void xgbe_dev_xmit(struct xgbe_channel *channel)</div><div class='ctx'> 				  packet-&gt;length);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (vxlan) {</div><div class='add'>+		XGMAC_SET_BITS_LE(rdesc-&gt;desc3, TX_NORMAL_DESC3, VNP,</div><div class='add'>+				  TX_NORMAL_DESC3_VXLAN_PACKET);</div><div class='add'>+</div><div class='add'>+		pdata-&gt;ext_stats.tx_vxlan_packets += packet-&gt;tx_packets;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	for (i = cur_index - start_index + 1; i &lt; packet-&gt;rdesc_count; i++) {</div><div class='ctx'> 		cur_index++;</div><div class='ctx'> 		rdata = XGBE_GET_DESC_DATA(ring, cur_index);</div><div class='hunk'>@@ -1576,8 +1784,11 @@ static void xgbe_dev_xmit(struct xgbe_channel *channel)</div><div class='ctx'> 		XGMAC_SET_BITS_LE(rdesc-&gt;desc2, TX_NORMAL_DESC2, IC, 1);</div><div class='ctx'> </div><div class='ctx'> 	/* Save the Tx info to report back during cleanup */</div><div class='del'>-	rdata-&gt;tx.packets = packet-&gt;tx_packets;</div><div class='del'>-	rdata-&gt;tx.bytes = packet-&gt;tx_bytes;</div><div class='add'>+	rdata-&gt;tx.packets = tx_packets;</div><div class='add'>+	rdata-&gt;tx.bytes = tx_bytes;</div><div class='add'>+</div><div class='add'>+	pdata-&gt;ext_stats.txq_packets[channel-&gt;queue_index] += tx_packets;</div><div class='add'>+	pdata-&gt;ext_stats.txq_bytes[channel-&gt;queue_index] += tx_bytes;</div><div class='ctx'> </div><div class='ctx'> 	/* In case the Tx DMA engine is running, make sure everything</div><div class='ctx'> 	 * is written to the descriptor(s) before setting the OWN bit</div><div class='hunk'>@@ -1595,10 +1806,10 @@ static void xgbe_dev_xmit(struct xgbe_channel *channel)</div><div class='ctx'> 				  packet-&gt;rdesc_count, 1);</div><div class='ctx'> </div><div class='ctx'> 	/* Make sure ownership is written to the descriptor */</div><div class='del'>-	dma_wmb();</div><div class='add'>+	smp_wmb();</div><div class='ctx'> </div><div class='ctx'> 	ring-&gt;cur = cur_index + 1;</div><div class='del'>-	if (!packet-&gt;skb-&gt;xmit_more ||</div><div class='add'>+	if (!netdev_xmit_more() ||</div><div class='ctx'> 	    netif_xmit_stopped(netdev_get_tx_queue(pdata-&gt;netdev,</div><div class='ctx'> 						   channel-&gt;queue_index)))</div><div class='ctx'> 		xgbe_tx_start_xmit(channel, ring);</div><div class='hunk'>@@ -1658,10 +1869,15 @@ static int xgbe_dev_read(struct xgbe_channel *channel)</div><div class='ctx'> </div><div class='ctx'> 	/* Get the header length */</div><div class='ctx'> 	if (XGMAC_GET_BITS_LE(rdesc-&gt;desc3, RX_NORMAL_DESC3, FD)) {</div><div class='add'>+		XGMAC_SET_BITS(packet-&gt;attributes, RX_PACKET_ATTRIBUTES,</div><div class='add'>+			       FIRST, 1);</div><div class='ctx'> 		rdata-&gt;rx.hdr_len = XGMAC_GET_BITS_LE(rdesc-&gt;desc2,</div><div class='ctx'> 						      RX_NORMAL_DESC2, HL);</div><div class='ctx'> 		if (rdata-&gt;rx.hdr_len)</div><div class='ctx'> 			pdata-&gt;ext_stats.rx_split_header_packets++;</div><div class='add'>+	} else {</div><div class='add'>+		XGMAC_SET_BITS(packet-&gt;attributes, RX_PACKET_ATTRIBUTES,</div><div class='add'>+			       FIRST, 0);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Get the RSS hash */</div><div class='hunk'>@@ -1684,24 +1900,40 @@ static int xgbe_dev_read(struct xgbe_channel *channel)</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Get the packet length */</div><div class='del'>-	rdata-&gt;rx.len = XGMAC_GET_BITS_LE(rdesc-&gt;desc3, RX_NORMAL_DESC3, PL);</div><div class='del'>-</div><div class='del'>-	if (!XGMAC_GET_BITS_LE(rdesc-&gt;desc3, RX_NORMAL_DESC3, LD)) {</div><div class='del'>-		/* Not all the data has been transferred for this packet */</div><div class='del'>-		XGMAC_SET_BITS(packet-&gt;attributes, RX_PACKET_ATTRIBUTES,</div><div class='del'>-			       INCOMPLETE, 1);</div><div class='add'>+	/* Not all the data has been transferred for this packet */</div><div class='add'>+	if (!XGMAC_GET_BITS_LE(rdesc-&gt;desc3, RX_NORMAL_DESC3, LD))</div><div class='ctx'> 		return 0;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='ctx'> 	/* This is the last of the data for this packet */</div><div class='ctx'> 	XGMAC_SET_BITS(packet-&gt;attributes, RX_PACKET_ATTRIBUTES,</div><div class='del'>-		       INCOMPLETE, 0);</div><div class='add'>+		       LAST, 1);</div><div class='add'>+</div><div class='add'>+	/* Get the packet length */</div><div class='add'>+	rdata-&gt;rx.len = XGMAC_GET_BITS_LE(rdesc-&gt;desc3, RX_NORMAL_DESC3, PL);</div><div class='ctx'> </div><div class='ctx'> 	/* Set checksum done indicator as appropriate */</div><div class='del'>-	if (netdev-&gt;features &amp; NETIF_F_RXCSUM)</div><div class='add'>+	if (netdev-&gt;features &amp; NETIF_F_RXCSUM) {</div><div class='ctx'> 		XGMAC_SET_BITS(packet-&gt;attributes, RX_PACKET_ATTRIBUTES,</div><div class='ctx'> 			       CSUM_DONE, 1);</div><div class='add'>+		XGMAC_SET_BITS(packet-&gt;attributes, RX_PACKET_ATTRIBUTES,</div><div class='add'>+			       TNPCSUM_DONE, 1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set the tunneled packet indicator */</div><div class='add'>+	if (XGMAC_GET_BITS_LE(rdesc-&gt;desc2, RX_NORMAL_DESC2, TNP)) {</div><div class='add'>+		XGMAC_SET_BITS(packet-&gt;attributes, RX_PACKET_ATTRIBUTES,</div><div class='add'>+			       TNP, 1);</div><div class='add'>+		pdata-&gt;ext_stats.rx_vxlan_packets++;</div><div class='add'>+</div><div class='add'>+		l34t = XGMAC_GET_BITS_LE(rdesc-&gt;desc3, RX_NORMAL_DESC3, L34T);</div><div class='add'>+		switch (l34t) {</div><div class='add'>+		case RX_DESC3_L34T_IPV4_UNKNOWN:</div><div class='add'>+		case RX_DESC3_L34T_IPV6_UNKNOWN:</div><div class='add'>+			XGMAC_SET_BITS(packet-&gt;attributes, RX_PACKET_ATTRIBUTES,</div><div class='add'>+				       TNPCSUM_DONE, 0);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Check for errors (only valid in last descriptor) */</div><div class='ctx'> 	err = XGMAC_GET_BITS_LE(rdesc-&gt;desc3, RX_NORMAL_DESC3, ES);</div><div class='hunk'>@@ -1721,14 +1953,30 @@ static int xgbe_dev_read(struct xgbe_channel *channel)</div><div class='ctx'> 				  packet-&gt;vlan_ctag);</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='del'>-		if ((etlt == 0x05) || (etlt == 0x06))</div><div class='add'>+		unsigned int tnp = XGMAC_GET_BITS(packet-&gt;attributes,</div><div class='add'>+						  RX_PACKET_ATTRIBUTES, TNP);</div><div class='add'>+</div><div class='add'>+		if ((etlt == 0x05) || (etlt == 0x06)) {</div><div class='ctx'> 			XGMAC_SET_BITS(packet-&gt;attributes, RX_PACKET_ATTRIBUTES,</div><div class='ctx'> 				       CSUM_DONE, 0);</div><div class='del'>-		else</div><div class='add'>+			XGMAC_SET_BITS(packet-&gt;attributes, RX_PACKET_ATTRIBUTES,</div><div class='add'>+				       TNPCSUM_DONE, 0);</div><div class='add'>+			pdata-&gt;ext_stats.rx_csum_errors++;</div><div class='add'>+		} else if (tnp &amp;&amp; ((etlt == 0x09) || (etlt == 0x0a))) {</div><div class='add'>+			XGMAC_SET_BITS(packet-&gt;attributes, RX_PACKET_ATTRIBUTES,</div><div class='add'>+				       CSUM_DONE, 0);</div><div class='add'>+			XGMAC_SET_BITS(packet-&gt;attributes, RX_PACKET_ATTRIBUTES,</div><div class='add'>+				       TNPCSUM_DONE, 0);</div><div class='add'>+			pdata-&gt;ext_stats.rx_vxlan_csum_errors++;</div><div class='add'>+		} else {</div><div class='ctx'> 			XGMAC_SET_BITS(packet-&gt;errors, RX_PACKET_ERRORS,</div><div class='ctx'> 				       FRAME, 1);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	pdata-&gt;ext_stats.rxq_packets[channel-&gt;queue_index]++;</div><div class='add'>+	pdata-&gt;ext_stats.rxq_bytes[channel-&gt;queue_index] += rdata-&gt;rx.len;</div><div class='add'>+</div><div class='ctx'> 	DBGPR("&lt;--xgbe_dev_read: %s - descriptor=%u (cur=%d)\n", channel-&gt;name,</div><div class='ctx'> 	      ring-&gt;cur &amp; (ring-&gt;rdesc_count - 1), ring-&gt;cur);</div><div class='ctx'> </div><div class='hunk'>@@ -1750,44 +1998,40 @@ static int xgbe_is_last_desc(struct xgbe_ring_desc *rdesc)</div><div class='ctx'> static int xgbe_enable_int(struct xgbe_channel *channel,</div><div class='ctx'> 			   enum xgbe_int int_id)</div><div class='ctx'> {</div><div class='del'>-	unsigned int dma_ch_ier;</div><div class='del'>-</div><div class='del'>-	dma_ch_ier = XGMAC_DMA_IOREAD(channel, DMA_CH_IER);</div><div class='del'>-</div><div class='ctx'> 	switch (int_id) {</div><div class='ctx'> 	case XGMAC_INT_DMA_CH_SR_TI:</div><div class='del'>-		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TIE, 1);</div><div class='add'>+		XGMAC_SET_BITS(channel-&gt;curr_ier, DMA_CH_IER, TIE, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case XGMAC_INT_DMA_CH_SR_TPS:</div><div class='del'>-		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TXSE, 1);</div><div class='add'>+		XGMAC_SET_BITS(channel-&gt;curr_ier, DMA_CH_IER, TXSE, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case XGMAC_INT_DMA_CH_SR_TBU:</div><div class='del'>-		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TBUE, 1);</div><div class='add'>+		XGMAC_SET_BITS(channel-&gt;curr_ier, DMA_CH_IER, TBUE, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case XGMAC_INT_DMA_CH_SR_RI:</div><div class='del'>-		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RIE, 1);</div><div class='add'>+		XGMAC_SET_BITS(channel-&gt;curr_ier, DMA_CH_IER, RIE, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case XGMAC_INT_DMA_CH_SR_RBU:</div><div class='del'>-		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RBUE, 1);</div><div class='add'>+		XGMAC_SET_BITS(channel-&gt;curr_ier, DMA_CH_IER, RBUE, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case XGMAC_INT_DMA_CH_SR_RPS:</div><div class='del'>-		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RSE, 1);</div><div class='add'>+		XGMAC_SET_BITS(channel-&gt;curr_ier, DMA_CH_IER, RSE, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case XGMAC_INT_DMA_CH_SR_TI_RI:</div><div class='del'>-		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TIE, 1);</div><div class='del'>-		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RIE, 1);</div><div class='add'>+		XGMAC_SET_BITS(channel-&gt;curr_ier, DMA_CH_IER, TIE, 1);</div><div class='add'>+		XGMAC_SET_BITS(channel-&gt;curr_ier, DMA_CH_IER, RIE, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case XGMAC_INT_DMA_CH_SR_FBE:</div><div class='del'>-		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, FBEE, 1);</div><div class='add'>+		XGMAC_SET_BITS(channel-&gt;curr_ier, DMA_CH_IER, FBEE, 1);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case XGMAC_INT_DMA_ALL:</div><div class='del'>-		dma_ch_ier |= channel-&gt;saved_ier;</div><div class='add'>+		channel-&gt;curr_ier |= channel-&gt;saved_ier;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	XGMAC_DMA_IOWRITE(channel, DMA_CH_IER, dma_ch_ier);</div><div class='add'>+	XGMAC_DMA_IOWRITE(channel, DMA_CH_IER, channel-&gt;curr_ier);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1795,50 +2039,46 @@ static int xgbe_enable_int(struct xgbe_channel *channel,</div><div class='ctx'> static int xgbe_disable_int(struct xgbe_channel *channel,</div><div class='ctx'> 			    enum xgbe_int int_id)</div><div class='ctx'> {</div><div class='del'>-	unsigned int dma_ch_ier;</div><div class='del'>-</div><div class='del'>-	dma_ch_ier = XGMAC_DMA_IOREAD(channel, DMA_CH_IER);</div><div class='del'>-</div><div class='ctx'> 	switch (int_id) {</div><div class='ctx'> 	case XGMAC_INT_DMA_CH_SR_TI:</div><div class='del'>-		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TIE, 0);</div><div class='add'>+		XGMAC_SET_BITS(channel-&gt;curr_ier, DMA_CH_IER, TIE, 0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case XGMAC_INT_DMA_CH_SR_TPS:</div><div class='del'>-		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TXSE, 0);</div><div class='add'>+		XGMAC_SET_BITS(channel-&gt;curr_ier, DMA_CH_IER, TXSE, 0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case XGMAC_INT_DMA_CH_SR_TBU:</div><div class='del'>-		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TBUE, 0);</div><div class='add'>+		XGMAC_SET_BITS(channel-&gt;curr_ier, DMA_CH_IER, TBUE, 0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case XGMAC_INT_DMA_CH_SR_RI:</div><div class='del'>-		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RIE, 0);</div><div class='add'>+		XGMAC_SET_BITS(channel-&gt;curr_ier, DMA_CH_IER, RIE, 0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case XGMAC_INT_DMA_CH_SR_RBU:</div><div class='del'>-		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RBUE, 0);</div><div class='add'>+		XGMAC_SET_BITS(channel-&gt;curr_ier, DMA_CH_IER, RBUE, 0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case XGMAC_INT_DMA_CH_SR_RPS:</div><div class='del'>-		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RSE, 0);</div><div class='add'>+		XGMAC_SET_BITS(channel-&gt;curr_ier, DMA_CH_IER, RSE, 0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case XGMAC_INT_DMA_CH_SR_TI_RI:</div><div class='del'>-		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, TIE, 0);</div><div class='del'>-		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, RIE, 0);</div><div class='add'>+		XGMAC_SET_BITS(channel-&gt;curr_ier, DMA_CH_IER, TIE, 0);</div><div class='add'>+		XGMAC_SET_BITS(channel-&gt;curr_ier, DMA_CH_IER, RIE, 0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case XGMAC_INT_DMA_CH_SR_FBE:</div><div class='del'>-		XGMAC_SET_BITS(dma_ch_ier, DMA_CH_IER, FBEE, 0);</div><div class='add'>+		XGMAC_SET_BITS(channel-&gt;curr_ier, DMA_CH_IER, FBEE, 0);</div><div class='ctx'> 		break;</div><div class='ctx'> 	case XGMAC_INT_DMA_ALL:</div><div class='del'>-		channel-&gt;saved_ier = dma_ch_ier &amp; XGBE_DMA_INTERRUPT_MASK;</div><div class='del'>-		dma_ch_ier &amp;= ~XGBE_DMA_INTERRUPT_MASK;</div><div class='add'>+		channel-&gt;saved_ier = channel-&gt;curr_ier;</div><div class='add'>+		channel-&gt;curr_ier = 0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -1;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	XGMAC_DMA_IOWRITE(channel, DMA_CH_IER, dma_ch_ier);</div><div class='add'>+	XGMAC_DMA_IOWRITE(channel, DMA_CH_IER, channel-&gt;curr_ier);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgbe_exit(struct xgbe_prv_data *pdata)</div><div class='add'>+static int __xgbe_exit(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int count = 2000;</div><div class='ctx'> </div><div class='hunk'>@@ -1849,7 +2089,7 @@ static int xgbe_exit(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	usleep_range(10, 15);</div><div class='ctx'> </div><div class='ctx'> 	/* Poll Until Poll Condition */</div><div class='del'>-	while (count-- &amp;&amp; XGMAC_IOREAD_BITS(pdata, DMA_MR, SWR))</div><div class='add'>+	while (--count &amp;&amp; XGMAC_IOREAD_BITS(pdata, DMA_MR, SWR))</div><div class='ctx'> 		usleep_range(500, 600);</div><div class='ctx'> </div><div class='ctx'> 	if (!count)</div><div class='hunk'>@@ -1860,6 +2100,20 @@ static int xgbe_exit(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int xgbe_exit(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* To guard against possible incorrectly generated interrupts,</div><div class='add'>+	 * issue the software reset twice.</div><div class='add'>+	 */</div><div class='add'>+	ret = __xgbe_exit(pdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return __xgbe_exit(pdata);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int xgbe_flush_tx_queues(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int i, count;</div><div class='hunk'>@@ -1873,7 +2127,7 @@ static int xgbe_flush_tx_queues(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	/* Poll Until Poll Condition */</div><div class='ctx'> 	for (i = 0; i &lt; pdata-&gt;tx_q_count; i++) {</div><div class='ctx'> 		count = 2000;</div><div class='del'>-		while (count-- &amp;&amp; XGMAC_MTL_IOREAD_BITS(pdata, i,</div><div class='add'>+		while (--count &amp;&amp; XGMAC_MTL_IOREAD_BITS(pdata, i,</div><div class='ctx'> 							MTL_Q_TQOMR, FTQ))</div><div class='ctx'> 			usleep_range(500, 600);</div><div class='ctx'> </div><div class='hunk'>@@ -1886,37 +2140,38 @@ static int xgbe_flush_tx_queues(struct xgbe_prv_data *pdata)</div><div class='ctx'> </div><div class='ctx'> static void xgbe_config_dma_bus(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='add'>+	unsigned int sbmr;</div><div class='add'>+</div><div class='add'>+	sbmr = XGMAC_IOREAD(pdata, DMA_SBMR);</div><div class='add'>+</div><div class='ctx'> 	/* Set enhanced addressing mode */</div><div class='del'>-	XGMAC_IOWRITE_BITS(pdata, DMA_SBMR, EAME, 1);</div><div class='add'>+	XGMAC_SET_BITS(sbmr, DMA_SBMR, EAME, 1);</div><div class='ctx'> </div><div class='ctx'> 	/* Set the System Bus mode */</div><div class='del'>-	XGMAC_IOWRITE_BITS(pdata, DMA_SBMR, UNDEF, 1);</div><div class='del'>-	XGMAC_IOWRITE_BITS(pdata, DMA_SBMR, BLEN_256, 1);</div><div class='add'>+	XGMAC_SET_BITS(sbmr, DMA_SBMR, UNDEF, 1);</div><div class='add'>+	XGMAC_SET_BITS(sbmr, DMA_SBMR, BLEN, pdata-&gt;blen &gt;&gt; 2);</div><div class='add'>+	XGMAC_SET_BITS(sbmr, DMA_SBMR, AAL, pdata-&gt;aal);</div><div class='add'>+	XGMAC_SET_BITS(sbmr, DMA_SBMR, RD_OSR_LMT, pdata-&gt;rd_osr_limit - 1);</div><div class='add'>+	XGMAC_SET_BITS(sbmr, DMA_SBMR, WR_OSR_LMT, pdata-&gt;wr_osr_limit - 1);</div><div class='add'>+</div><div class='add'>+	XGMAC_IOWRITE(pdata, DMA_SBMR, sbmr);</div><div class='add'>+</div><div class='add'>+	/* Set descriptor fetching threshold */</div><div class='add'>+	if (pdata-&gt;vdata-&gt;tx_desc_prefetch)</div><div class='add'>+		XGMAC_IOWRITE_BITS(pdata, DMA_TXEDMACR, TDPS,</div><div class='add'>+				   pdata-&gt;vdata-&gt;tx_desc_prefetch);</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;vdata-&gt;rx_desc_prefetch)</div><div class='add'>+		XGMAC_IOWRITE_BITS(pdata, DMA_RXEDMACR, RDPS,</div><div class='add'>+				   pdata-&gt;vdata-&gt;rx_desc_prefetch);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgbe_config_dma_cache(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	unsigned int arcache, awcache;</div><div class='del'>-</div><div class='del'>-	arcache = 0;</div><div class='del'>-	XGMAC_SET_BITS(arcache, DMA_AXIARCR, DRC, pdata-&gt;arcache);</div><div class='del'>-	XGMAC_SET_BITS(arcache, DMA_AXIARCR, DRD, pdata-&gt;axdomain);</div><div class='del'>-	XGMAC_SET_BITS(arcache, DMA_AXIARCR, TEC, pdata-&gt;arcache);</div><div class='del'>-	XGMAC_SET_BITS(arcache, DMA_AXIARCR, TED, pdata-&gt;axdomain);</div><div class='del'>-	XGMAC_SET_BITS(arcache, DMA_AXIARCR, THC, pdata-&gt;arcache);</div><div class='del'>-	XGMAC_SET_BITS(arcache, DMA_AXIARCR, THD, pdata-&gt;axdomain);</div><div class='del'>-	XGMAC_IOWRITE(pdata, DMA_AXIARCR, arcache);</div><div class='del'>-</div><div class='del'>-	awcache = 0;</div><div class='del'>-	XGMAC_SET_BITS(awcache, DMA_AXIAWCR, DWC, pdata-&gt;awcache);</div><div class='del'>-	XGMAC_SET_BITS(awcache, DMA_AXIAWCR, DWD, pdata-&gt;axdomain);</div><div class='del'>-	XGMAC_SET_BITS(awcache, DMA_AXIAWCR, RPC, pdata-&gt;awcache);</div><div class='del'>-	XGMAC_SET_BITS(awcache, DMA_AXIAWCR, RPD, pdata-&gt;axdomain);</div><div class='del'>-	XGMAC_SET_BITS(awcache, DMA_AXIAWCR, RHC, pdata-&gt;awcache);</div><div class='del'>-	XGMAC_SET_BITS(awcache, DMA_AXIAWCR, RHD, pdata-&gt;axdomain);</div><div class='del'>-	XGMAC_SET_BITS(awcache, DMA_AXIAWCR, TDC, pdata-&gt;awcache);</div><div class='del'>-	XGMAC_SET_BITS(awcache, DMA_AXIAWCR, TDD, pdata-&gt;axdomain);</div><div class='del'>-	XGMAC_IOWRITE(pdata, DMA_AXIAWCR, awcache);</div><div class='add'>+	XGMAC_IOWRITE(pdata, DMA_AXIARCR, pdata-&gt;arcr);</div><div class='add'>+	XGMAC_IOWRITE(pdata, DMA_AXIAWCR, pdata-&gt;awcr);</div><div class='add'>+	if (pdata-&gt;awarcr)</div><div class='add'>+		XGMAC_IOWRITE(pdata, DMA_AXIAWARCR, pdata-&gt;awarcr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgbe_config_mtl_mode(struct xgbe_prv_data *pdata)</div><div class='hunk'>@@ -1937,114 +2192,331 @@ static void xgbe_config_mtl_mode(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	XGMAC_IOWRITE_BITS(pdata, MTL_OMR, RAA, MTL_RAA_SP);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static unsigned int xgbe_calculate_per_queue_fifo(unsigned int fifo_size,</div><div class='del'>-						  unsigned int queue_count)</div><div class='add'>+static void xgbe_queue_flow_control_threshold(struct xgbe_prv_data *pdata,</div><div class='add'>+					      unsigned int queue,</div><div class='add'>+					      unsigned int q_fifo_size)</div><div class='ctx'> {</div><div class='del'>-	unsigned int q_fifo_size = 0;</div><div class='del'>-	enum xgbe_mtl_fifo_size p_fifo = XGMAC_MTL_FIFO_SIZE_256;</div><div class='add'>+	unsigned int frame_fifo_size;</div><div class='add'>+	unsigned int rfa, rfd;</div><div class='ctx'> </div><div class='del'>-	/* Calculate Tx/Rx fifo share per queue */</div><div class='del'>-	switch (fifo_size) {</div><div class='del'>-	case 0:</div><div class='del'>-		q_fifo_size = XGBE_FIFO_SIZE_B(128);</div><div class='del'>-		break;</div><div class='del'>-	case 1:</div><div class='del'>-		q_fifo_size = XGBE_FIFO_SIZE_B(256);</div><div class='del'>-		break;</div><div class='del'>-	case 2:</div><div class='del'>-		q_fifo_size = XGBE_FIFO_SIZE_B(512);</div><div class='del'>-		break;</div><div class='del'>-	case 3:</div><div class='del'>-		q_fifo_size = XGBE_FIFO_SIZE_KB(1);</div><div class='del'>-		break;</div><div class='del'>-	case 4:</div><div class='del'>-		q_fifo_size = XGBE_FIFO_SIZE_KB(2);</div><div class='del'>-		break;</div><div class='del'>-	case 5:</div><div class='del'>-		q_fifo_size = XGBE_FIFO_SIZE_KB(4);</div><div class='del'>-		break;</div><div class='del'>-	case 6:</div><div class='del'>-		q_fifo_size = XGBE_FIFO_SIZE_KB(8);</div><div class='del'>-		break;</div><div class='del'>-	case 7:</div><div class='del'>-		q_fifo_size = XGBE_FIFO_SIZE_KB(16);</div><div class='del'>-		break;</div><div class='del'>-	case 8:</div><div class='del'>-		q_fifo_size = XGBE_FIFO_SIZE_KB(32);</div><div class='del'>-		break;</div><div class='del'>-	case 9:</div><div class='del'>-		q_fifo_size = XGBE_FIFO_SIZE_KB(64);</div><div class='del'>-		break;</div><div class='del'>-	case 10:</div><div class='del'>-		q_fifo_size = XGBE_FIFO_SIZE_KB(128);</div><div class='del'>-		break;</div><div class='del'>-	case 11:</div><div class='del'>-		q_fifo_size = XGBE_FIFO_SIZE_KB(256);</div><div class='del'>-		break;</div><div class='add'>+	frame_fifo_size = XGMAC_FLOW_CONTROL_ALIGN(xgbe_get_max_frame(pdata));</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;pfcq[queue] &amp;&amp; (q_fifo_size &gt; pdata-&gt;pfc_rfa)) {</div><div class='add'>+		/* PFC is active for this queue */</div><div class='add'>+		rfa = pdata-&gt;pfc_rfa;</div><div class='add'>+		rfd = rfa + frame_fifo_size;</div><div class='add'>+		if (rfd &gt; XGMAC_FLOW_CONTROL_MAX)</div><div class='add'>+			rfd = XGMAC_FLOW_CONTROL_MAX;</div><div class='add'>+		if (rfa &gt;= XGMAC_FLOW_CONTROL_MAX)</div><div class='add'>+			rfa = XGMAC_FLOW_CONTROL_MAX - XGMAC_FLOW_CONTROL_UNIT;</div><div class='add'>+	} else {</div><div class='add'>+		/* This path deals with just maximum frame sizes which are</div><div class='add'>+		 * limited to a jumbo frame of 9,000 (plus headers, etc.)</div><div class='add'>+		 * so we can never exceed the maximum allowable RFA/RFD</div><div class='add'>+		 * values.</div><div class='add'>+		 */</div><div class='add'>+		if (q_fifo_size &lt;= 2048) {</div><div class='add'>+			/* rx_rfd to zero to signal no flow control */</div><div class='add'>+			pdata-&gt;rx_rfa[queue] = 0;</div><div class='add'>+			pdata-&gt;rx_rfd[queue] = 0;</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (q_fifo_size &lt;= 4096) {</div><div class='add'>+			/* Between 2048 and 4096 */</div><div class='add'>+			pdata-&gt;rx_rfa[queue] = 0;	/* Full - 1024 bytes */</div><div class='add'>+			pdata-&gt;rx_rfd[queue] = 1;	/* Full - 1536 bytes */</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (q_fifo_size &lt;= frame_fifo_size) {</div><div class='add'>+			/* Between 4096 and max-frame */</div><div class='add'>+			pdata-&gt;rx_rfa[queue] = 2;	/* Full - 2048 bytes */</div><div class='add'>+			pdata-&gt;rx_rfd[queue] = 5;	/* Full - 3584 bytes */</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (q_fifo_size &lt;= (frame_fifo_size * 3)) {</div><div class='add'>+			/* Between max-frame and 3 max-frames,</div><div class='add'>+			 * trigger if we get just over a frame of data and</div><div class='add'>+			 * resume when we have just under half a frame left.</div><div class='add'>+			 */</div><div class='add'>+			rfa = q_fifo_size - frame_fifo_size;</div><div class='add'>+			rfd = rfa + (frame_fifo_size / 2);</div><div class='add'>+		} else {</div><div class='add'>+			/* Above 3 max-frames - trigger when just over</div><div class='add'>+			 * 2 frames of space available</div><div class='add'>+			 */</div><div class='add'>+			rfa = frame_fifo_size * 2;</div><div class='add'>+			rfa += XGMAC_FLOW_CONTROL_UNIT;</div><div class='add'>+			rfd = rfa + frame_fifo_size;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pdata-&gt;rx_rfa[queue] = XGMAC_FLOW_CONTROL_VALUE(rfa);</div><div class='add'>+	pdata-&gt;rx_rfd[queue] = XGMAC_FLOW_CONTROL_VALUE(rfd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_calculate_flow_control_threshold(struct xgbe_prv_data *pdata,</div><div class='add'>+						  unsigned int *fifo)</div><div class='add'>+{</div><div class='add'>+	unsigned int q_fifo_size;</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;rx_q_count; i++) {</div><div class='add'>+		q_fifo_size = (fifo[i] + 1) * XGMAC_FIFO_UNIT;</div><div class='add'>+</div><div class='add'>+		xgbe_queue_flow_control_threshold(pdata, i, q_fifo_size);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_config_flow_control_threshold(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;rx_q_count; i++) {</div><div class='add'>+		XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQFCR, RFA,</div><div class='add'>+				       pdata-&gt;rx_rfa[i]);</div><div class='add'>+		XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQFCR, RFD,</div><div class='add'>+				       pdata-&gt;rx_rfd[i]);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int xgbe_get_tx_fifo_size(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	/* The configured value may not be the actual amount of fifo RAM */</div><div class='add'>+	return min_t(unsigned int, pdata-&gt;tx_max_fifo_size,</div><div class='add'>+		     pdata-&gt;hw_feat.tx_fifo_size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int xgbe_get_rx_fifo_size(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	/* The configured value may not be the actual amount of fifo RAM */</div><div class='add'>+	return min_t(unsigned int, pdata-&gt;rx_max_fifo_size,</div><div class='add'>+		     pdata-&gt;hw_feat.rx_fifo_size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_calculate_equal_fifo(unsigned int fifo_size,</div><div class='add'>+				      unsigned int queue_count,</div><div class='add'>+				      unsigned int *fifo)</div><div class='add'>+{</div><div class='add'>+	unsigned int q_fifo_size;</div><div class='add'>+	unsigned int p_fifo;</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	q_fifo_size = fifo_size / queue_count;</div><div class='add'>+</div><div class='add'>+	/* Calculate the fifo setting by dividing the queue's fifo size</div><div class='add'>+	 * by the fifo allocation increment (with 0 representing the</div><div class='add'>+	 * base allocation increment so decrement the result by 1).</div><div class='add'>+	 */</div><div class='add'>+	p_fifo = q_fifo_size / XGMAC_FIFO_UNIT;</div><div class='add'>+	if (p_fifo)</div><div class='add'>+		p_fifo--;</div><div class='add'>+</div><div class='add'>+	/* Distribute the fifo equally amongst the queues */</div><div class='add'>+	for (i = 0; i &lt; queue_count; i++)</div><div class='add'>+		fifo[i] = p_fifo;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int xgbe_set_nonprio_fifos(unsigned int fifo_size,</div><div class='add'>+					   unsigned int queue_count,</div><div class='add'>+					   unsigned int *fifo)</div><div class='add'>+{</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	BUILD_BUG_ON_NOT_POWER_OF_2(XGMAC_FIFO_MIN_ALLOC);</div><div class='add'>+</div><div class='add'>+	if (queue_count &lt;= IEEE_8021QAZ_MAX_TCS)</div><div class='add'>+		return fifo_size;</div><div class='add'>+</div><div class='add'>+	/* Rx queues 9 and up are for specialized packets,</div><div class='add'>+	 * such as PTP or DCB control packets, etc. and</div><div class='add'>+	 * don't require a large fifo</div><div class='add'>+	 */</div><div class='add'>+	for (i = IEEE_8021QAZ_MAX_TCS; i &lt; queue_count; i++) {</div><div class='add'>+		fifo[i] = (XGMAC_FIFO_MIN_ALLOC / XGMAC_FIFO_UNIT) - 1;</div><div class='add'>+		fifo_size -= XGMAC_FIFO_MIN_ALLOC;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return fifo_size;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int xgbe_get_pfc_delay(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	unsigned int delay;</div><div class='add'>+</div><div class='add'>+	/* If a delay has been provided, use that */</div><div class='add'>+	if (pdata-&gt;pfc-&gt;delay)</div><div class='add'>+		return pdata-&gt;pfc-&gt;delay / 8;</div><div class='add'>+</div><div class='add'>+	/* Allow for two maximum size frames */</div><div class='add'>+	delay = xgbe_get_max_frame(pdata);</div><div class='add'>+	delay += XGMAC_ETH_PREAMBLE;</div><div class='add'>+	delay *= 2;</div><div class='add'>+</div><div class='add'>+	/* Allow for PFC frame */</div><div class='add'>+	delay += XGMAC_PFC_DATA_LEN;</div><div class='add'>+	delay += ETH_HLEN + ETH_FCS_LEN;</div><div class='add'>+	delay += XGMAC_ETH_PREAMBLE;</div><div class='add'>+</div><div class='add'>+	/* Allow for miscellaneous delays (LPI exit, cable, etc.) */</div><div class='add'>+	delay += XGMAC_PFC_DELAYS;</div><div class='add'>+</div><div class='add'>+	return delay;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int xgbe_get_pfc_queues(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	unsigned int count, prio_queues;</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	if (!pdata-&gt;pfc-&gt;pfc_en)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	count = 0;</div><div class='add'>+	prio_queues = XGMAC_PRIO_QUEUES(pdata-&gt;rx_q_count);</div><div class='add'>+	for (i = 0; i &lt; prio_queues; i++) {</div><div class='add'>+		if (!xgbe_is_pfc_queue(pdata, i))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		pdata-&gt;pfcq[i] = 1;</div><div class='add'>+		count++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_calculate_dcb_fifo(struct xgbe_prv_data *pdata,</div><div class='add'>+				    unsigned int fifo_size,</div><div class='add'>+				    unsigned int *fifo)</div><div class='add'>+{</div><div class='add'>+	unsigned int q_fifo_size, rem_fifo, addn_fifo;</div><div class='add'>+	unsigned int prio_queues;</div><div class='add'>+	unsigned int pfc_count;</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	q_fifo_size = XGMAC_FIFO_ALIGN(xgbe_get_max_frame(pdata));</div><div class='add'>+	prio_queues = XGMAC_PRIO_QUEUES(pdata-&gt;rx_q_count);</div><div class='add'>+	pfc_count = xgbe_get_pfc_queues(pdata);</div><div class='add'>+</div><div class='add'>+	if (!pfc_count || ((q_fifo_size * prio_queues) &gt; fifo_size)) {</div><div class='add'>+		/* No traffic classes with PFC enabled or can't do lossless */</div><div class='add'>+		xgbe_calculate_equal_fifo(fifo_size, prio_queues, fifo);</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Calculate how much fifo we have to play with */</div><div class='add'>+	rem_fifo = fifo_size - (q_fifo_size * prio_queues);</div><div class='add'>+</div><div class='add'>+	/* Calculate how much more than base fifo PFC needs, which also</div><div class='add'>+	 * becomes the threshold activation point (RFA)</div><div class='add'>+	 */</div><div class='add'>+	pdata-&gt;pfc_rfa = xgbe_get_pfc_delay(pdata);</div><div class='add'>+	pdata-&gt;pfc_rfa = XGMAC_FLOW_CONTROL_ALIGN(pdata-&gt;pfc_rfa);</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;pfc_rfa &gt; q_fifo_size) {</div><div class='add'>+		addn_fifo = pdata-&gt;pfc_rfa - q_fifo_size;</div><div class='add'>+		addn_fifo = XGMAC_FIFO_ALIGN(addn_fifo);</div><div class='add'>+	} else {</div><div class='add'>+		addn_fifo = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Calculate DCB fifo settings:</div><div class='add'>+	 *   - distribute remaining fifo between the VLAN priority</div><div class='add'>+	 *     queues based on traffic class PFC enablement and overall</div><div class='add'>+	 *     priority (0 is lowest priority, so start at highest)</div><div class='add'>+	 */</div><div class='add'>+	i = prio_queues;</div><div class='add'>+	while (i &gt; 0) {</div><div class='add'>+		i--;</div><div class='add'>+</div><div class='add'>+		fifo[i] = (q_fifo_size / XGMAC_FIFO_UNIT) - 1;</div><div class='add'>+</div><div class='add'>+		if (!pdata-&gt;pfcq[i] || !addn_fifo)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (addn_fifo &gt; rem_fifo) {</div><div class='add'>+			netdev_warn(pdata-&gt;netdev,</div><div class='add'>+				    "RXq%u cannot set needed fifo size\n", i);</div><div class='add'>+			if (!rem_fifo)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			addn_fifo = rem_fifo;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		fifo[i] += (addn_fifo / XGMAC_FIFO_UNIT);</div><div class='add'>+		rem_fifo -= addn_fifo;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* The configured value is not the actual amount of fifo RAM */</div><div class='del'>-	q_fifo_size = min_t(unsigned int, XGBE_FIFO_MAX, q_fifo_size);</div><div class='del'>-</div><div class='del'>-	q_fifo_size = q_fifo_size / queue_count;</div><div class='del'>-</div><div class='del'>-	/* Set the queue fifo size programmable value */</div><div class='del'>-	if (q_fifo_size &gt;= XGBE_FIFO_SIZE_KB(256))</div><div class='del'>-		p_fifo = XGMAC_MTL_FIFO_SIZE_256K;</div><div class='del'>-	else if (q_fifo_size &gt;= XGBE_FIFO_SIZE_KB(128))</div><div class='del'>-		p_fifo = XGMAC_MTL_FIFO_SIZE_128K;</div><div class='del'>-	else if (q_fifo_size &gt;= XGBE_FIFO_SIZE_KB(64))</div><div class='del'>-		p_fifo = XGMAC_MTL_FIFO_SIZE_64K;</div><div class='del'>-	else if (q_fifo_size &gt;= XGBE_FIFO_SIZE_KB(32))</div><div class='del'>-		p_fifo = XGMAC_MTL_FIFO_SIZE_32K;</div><div class='del'>-	else if (q_fifo_size &gt;= XGBE_FIFO_SIZE_KB(16))</div><div class='del'>-		p_fifo = XGMAC_MTL_FIFO_SIZE_16K;</div><div class='del'>-	else if (q_fifo_size &gt;= XGBE_FIFO_SIZE_KB(8))</div><div class='del'>-		p_fifo = XGMAC_MTL_FIFO_SIZE_8K;</div><div class='del'>-	else if (q_fifo_size &gt;= XGBE_FIFO_SIZE_KB(4))</div><div class='del'>-		p_fifo = XGMAC_MTL_FIFO_SIZE_4K;</div><div class='del'>-	else if (q_fifo_size &gt;= XGBE_FIFO_SIZE_KB(2))</div><div class='del'>-		p_fifo = XGMAC_MTL_FIFO_SIZE_2K;</div><div class='del'>-	else if (q_fifo_size &gt;= XGBE_FIFO_SIZE_KB(1))</div><div class='del'>-		p_fifo = XGMAC_MTL_FIFO_SIZE_1K;</div><div class='del'>-	else if (q_fifo_size &gt;= XGBE_FIFO_SIZE_B(512))</div><div class='del'>-		p_fifo = XGMAC_MTL_FIFO_SIZE_512;</div><div class='del'>-	else if (q_fifo_size &gt;= XGBE_FIFO_SIZE_B(256))</div><div class='del'>-		p_fifo = XGMAC_MTL_FIFO_SIZE_256;</div><div class='del'>-</div><div class='del'>-	return p_fifo;</div><div class='add'>+	if (rem_fifo) {</div><div class='add'>+		unsigned int inc_fifo = rem_fifo / prio_queues;</div><div class='add'>+</div><div class='add'>+		/* Distribute remaining fifo across queues */</div><div class='add'>+		for (i = 0; i &lt; prio_queues; i++)</div><div class='add'>+			fifo[i] += (inc_fifo / XGMAC_FIFO_UNIT);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgbe_config_tx_fifo_size(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	enum xgbe_mtl_fifo_size fifo_size;</div><div class='add'>+	unsigned int fifo_size;</div><div class='add'>+	unsigned int fifo[XGBE_MAX_QUEUES];</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='del'>-	fifo_size = xgbe_calculate_per_queue_fifo(pdata-&gt;hw_feat.tx_fifo_size,</div><div class='del'>-						  pdata-&gt;tx_q_count);</div><div class='add'>+	fifo_size = xgbe_get_tx_fifo_size(pdata);</div><div class='add'>+</div><div class='add'>+	xgbe_calculate_equal_fifo(fifo_size, pdata-&gt;tx_q_count, fifo);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; pdata-&gt;tx_q_count; i++)</div><div class='del'>-		XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_TQOMR, TQS, fifo_size);</div><div class='add'>+		XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_TQOMR, TQS, fifo[i]);</div><div class='ctx'> </div><div class='ctx'> 	netif_info(pdata, drv, pdata-&gt;netdev,</div><div class='ctx'> 		   "%d Tx hardware queues, %d byte fifo per queue\n",</div><div class='del'>-		   pdata-&gt;tx_q_count, ((fifo_size + 1) * 256));</div><div class='add'>+		   pdata-&gt;tx_q_count, ((fifo[0] + 1) * XGMAC_FIFO_UNIT));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgbe_config_rx_fifo_size(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	enum xgbe_mtl_fifo_size fifo_size;</div><div class='add'>+	unsigned int fifo_size;</div><div class='add'>+	unsigned int fifo[XGBE_MAX_QUEUES];</div><div class='add'>+	unsigned int prio_queues;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='del'>-	fifo_size = xgbe_calculate_per_queue_fifo(pdata-&gt;hw_feat.rx_fifo_size,</div><div class='del'>-						  pdata-&gt;rx_q_count);</div><div class='add'>+	/* Clear any DCB related fifo/queue information */</div><div class='add'>+	memset(pdata-&gt;pfcq, 0, sizeof(pdata-&gt;pfcq));</div><div class='add'>+	pdata-&gt;pfc_rfa = 0;</div><div class='add'>+</div><div class='add'>+	fifo_size = xgbe_get_rx_fifo_size(pdata);</div><div class='add'>+	prio_queues = XGMAC_PRIO_QUEUES(pdata-&gt;rx_q_count);</div><div class='add'>+</div><div class='add'>+	/* Assign a minimum fifo to the non-VLAN priority queues */</div><div class='add'>+	fifo_size = xgbe_set_nonprio_fifos(fifo_size, pdata-&gt;rx_q_count, fifo);</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;pfc &amp;&amp; pdata-&gt;ets)</div><div class='add'>+		xgbe_calculate_dcb_fifo(pdata, fifo_size, fifo);</div><div class='add'>+	else</div><div class='add'>+		xgbe_calculate_equal_fifo(fifo_size, prio_queues, fifo);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; pdata-&gt;rx_q_count; i++)</div><div class='del'>-		XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQOMR, RQS, fifo_size);</div><div class='add'>+		XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQOMR, RQS, fifo[i]);</div><div class='ctx'> </div><div class='del'>-	netif_info(pdata, drv, pdata-&gt;netdev,</div><div class='del'>-		   "%d Rx hardware queues, %d byte fifo per queue\n",</div><div class='del'>-		   pdata-&gt;rx_q_count, ((fifo_size + 1) * 256));</div><div class='add'>+	xgbe_calculate_flow_control_threshold(pdata, fifo);</div><div class='add'>+	xgbe_config_flow_control_threshold(pdata);</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;pfc &amp;&amp; pdata-&gt;ets &amp;&amp; pdata-&gt;pfc-&gt;pfc_en) {</div><div class='add'>+		netif_info(pdata, drv, pdata-&gt;netdev,</div><div class='add'>+			   "%u Rx hardware queues\n", pdata-&gt;rx_q_count);</div><div class='add'>+		for (i = 0; i &lt; pdata-&gt;rx_q_count; i++)</div><div class='add'>+			netif_info(pdata, drv, pdata-&gt;netdev,</div><div class='add'>+				   "RxQ%u, %u byte fifo queue\n", i,</div><div class='add'>+				   ((fifo[i] + 1) * XGMAC_FIFO_UNIT));</div><div class='add'>+	} else {</div><div class='add'>+		netif_info(pdata, drv, pdata-&gt;netdev,</div><div class='add'>+			   "%u Rx hardware queues, %u byte fifo per queue\n",</div><div class='add'>+			   pdata-&gt;rx_q_count,</div><div class='add'>+			   ((fifo[0] + 1) * XGMAC_FIFO_UNIT));</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgbe_config_queue_mapping(struct xgbe_prv_data *pdata)</div><div class='hunk'>@@ -2080,8 +2552,7 @@ static void xgbe_config_queue_mapping(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Map the 8 VLAN priority values to available MTL Rx queues */</div><div class='del'>-	prio_queues = min_t(unsigned int, IEEE_8021QAZ_MAX_TCS,</div><div class='del'>-			    pdata-&gt;rx_q_count);</div><div class='add'>+	prio_queues = XGMAC_PRIO_QUEUES(pdata-&gt;rx_q_count);</div><div class='ctx'> 	ppq = IEEE_8021QAZ_MAX_TCS / prio_queues;</div><div class='ctx'> 	ppq_extra = IEEE_8021QAZ_MAX_TCS % prio_queues;</div><div class='ctx'> </div><div class='hunk'>@@ -2129,16 +2600,120 @@ static void xgbe_config_queue_mapping(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xgbe_config_flow_control_threshold(struct xgbe_prv_data *pdata)</div><div class='add'>+static void xgbe_config_tc(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	unsigned int i;</div><div class='add'>+	unsigned int offset, queue, prio;</div><div class='add'>+	u8 i;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; pdata-&gt;rx_q_count; i++) {</div><div class='del'>-		/* Activate flow control when less than 4k left in fifo */</div><div class='del'>-		XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQFCR, RFA, 2);</div><div class='add'>+	netdev_reset_tc(pdata-&gt;netdev);</div><div class='add'>+	if (!pdata-&gt;num_tcs)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	netdev_set_num_tc(pdata-&gt;netdev, pdata-&gt;num_tcs);</div><div class='add'>+</div><div class='add'>+	for (i = 0, queue = 0, offset = 0; i &lt; pdata-&gt;num_tcs; i++) {</div><div class='add'>+		while ((queue &lt; pdata-&gt;tx_q_count) &amp;&amp;</div><div class='add'>+		       (pdata-&gt;q2tc_map[queue] == i))</div><div class='add'>+			queue++;</div><div class='add'>+</div><div class='add'>+		netif_dbg(pdata, drv, pdata-&gt;netdev, "TC%u using TXq%u-%u\n",</div><div class='add'>+			  i, offset, queue - 1);</div><div class='add'>+		netdev_set_tc_queue(pdata-&gt;netdev, i, queue - offset, offset);</div><div class='add'>+		offset = queue;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!pdata-&gt;ets)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (prio = 0; prio &lt; IEEE_8021QAZ_MAX_TCS; prio++)</div><div class='add'>+		netdev_set_prio_tc_map(pdata-&gt;netdev, prio,</div><div class='add'>+				       pdata-&gt;ets-&gt;prio_tc[prio]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_config_dcb_tc(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct ieee_ets *ets = pdata-&gt;ets;</div><div class='add'>+	unsigned int total_weight, min_weight, weight;</div><div class='add'>+	unsigned int mask, reg, reg_val;</div><div class='add'>+	unsigned int i, prio;</div><div class='add'>+</div><div class='add'>+	if (!ets)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Set Tx to deficit weighted round robin scheduling algorithm (when</div><div class='add'>+	 * traffic class is using ETS algorithm)</div><div class='add'>+	 */</div><div class='add'>+	XGMAC_IOWRITE_BITS(pdata, MTL_OMR, ETSALG, MTL_ETSALG_DWRR);</div><div class='add'>+</div><div class='add'>+	/* Set Traffic Class algorithms */</div><div class='add'>+	total_weight = pdata-&gt;netdev-&gt;mtu * pdata-&gt;hw_feat.tc_cnt;</div><div class='add'>+	min_weight = total_weight / 100;</div><div class='add'>+	if (!min_weight)</div><div class='add'>+		min_weight = 1;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;hw_feat.tc_cnt; i++) {</div><div class='add'>+		/* Map the priorities to the traffic class */</div><div class='add'>+		mask = 0;</div><div class='add'>+		for (prio = 0; prio &lt; IEEE_8021QAZ_MAX_TCS; prio++) {</div><div class='add'>+			if (ets-&gt;prio_tc[prio] == i)</div><div class='add'>+				mask |= (1 &lt;&lt; prio);</div><div class='add'>+		}</div><div class='add'>+		mask &amp;= 0xff;</div><div class='add'>+</div><div class='add'>+		netif_dbg(pdata, drv, pdata-&gt;netdev, "TC%u PRIO mask=%#x\n",</div><div class='add'>+			  i, mask);</div><div class='add'>+		reg = MTL_TCPM0R + (MTL_TCPM_INC * (i / MTL_TCPM_TC_PER_REG));</div><div class='add'>+		reg_val = XGMAC_IOREAD(pdata, reg);</div><div class='add'>+</div><div class='add'>+		reg_val &amp;= ~(0xff &lt;&lt; ((i % MTL_TCPM_TC_PER_REG) &lt;&lt; 3));</div><div class='add'>+		reg_val |= (mask &lt;&lt; ((i % MTL_TCPM_TC_PER_REG) &lt;&lt; 3));</div><div class='add'>+</div><div class='add'>+		XGMAC_IOWRITE(pdata, reg, reg_val);</div><div class='add'>+</div><div class='add'>+		/* Set the traffic class algorithm */</div><div class='add'>+		switch (ets-&gt;tc_tsa[i]) {</div><div class='add'>+		case IEEE_8021QAZ_TSA_STRICT:</div><div class='add'>+			netif_dbg(pdata, drv, pdata-&gt;netdev,</div><div class='add'>+				  "TC%u using SP\n", i);</div><div class='add'>+			XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_TC_ETSCR, TSA,</div><div class='add'>+					       MTL_TSA_SP);</div><div class='add'>+			break;</div><div class='add'>+		case IEEE_8021QAZ_TSA_ETS:</div><div class='add'>+			weight = total_weight * ets-&gt;tc_tx_bw[i] / 100;</div><div class='add'>+			weight = clamp(weight, min_weight, total_weight);</div><div class='add'>+</div><div class='add'>+			netif_dbg(pdata, drv, pdata-&gt;netdev,</div><div class='add'>+				  "TC%u using DWRR (weight %u)\n", i, weight);</div><div class='add'>+			XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_TC_ETSCR, TSA,</div><div class='add'>+					       MTL_TSA_ETS);</div><div class='add'>+			XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_TC_QWR, QW,</div><div class='add'>+					       weight);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	xgbe_config_tc(pdata);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_config_dcb_pfc(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	if (!test_bit(XGBE_DOWN, &amp;pdata-&gt;dev_state)) {</div><div class='add'>+		/* Just stop the Tx queues while Rx fifo is changed */</div><div class='add'>+		netif_tx_stop_all_queues(pdata-&gt;netdev);</div><div class='add'>+</div><div class='add'>+		/* Suspend Rx so that fifo's can be adjusted */</div><div class='add'>+		pdata-&gt;hw_if.disable_rx(pdata);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	xgbe_config_rx_fifo_size(pdata);</div><div class='add'>+	xgbe_config_flow_control(pdata);</div><div class='ctx'> </div><div class='del'>-		/* De-activate flow control when more than 6k left in fifo */</div><div class='del'>-		XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQFCR, RFD, 4);</div><div class='add'>+	if (!test_bit(XGBE_DOWN, &amp;pdata-&gt;dev_state)) {</div><div class='add'>+		/* Resume Rx */</div><div class='add'>+		pdata-&gt;hw_if.enable_rx(pdata);</div><div class='add'>+</div><div class='add'>+		/* Resume Tx queues */</div><div class='add'>+		netif_tx_start_all_queues(pdata-&gt;netdev);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2158,26 +2733,24 @@ static void xgbe_config_jumbo_enable(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int val;</div><div class='ctx'> </div><div class='del'>-	val = (pdata-&gt;netdev-&gt;mtu &gt; XGMAC_STD_PACKET_MTU) ? 1 : 0;</div><div class='del'>-</div><div class='del'>-	XGMAC_IOWRITE_BITS(pdata, MAC_RCR, JE, val);</div><div class='add'>+	if (pdata-&gt;netdev-&gt;mtu &gt; XGMAC_JUMBO_PACKET_MTU) {</div><div class='add'>+		XGMAC_IOWRITE_BITS(pdata, MAC_RCR, GPSL,</div><div class='add'>+				   XGMAC_GIANT_PACKET_MTU);</div><div class='add'>+		XGMAC_IOWRITE_BITS(pdata, MAC_RCR, WD, 1);</div><div class='add'>+		XGMAC_IOWRITE_BITS(pdata, MAC_TCR, JD, 1);</div><div class='add'>+		XGMAC_IOWRITE_BITS(pdata, MAC_RCR, GPSLCE, 1);</div><div class='add'>+	} else {</div><div class='add'>+		val = pdata-&gt;netdev-&gt;mtu &gt; XGMAC_STD_PACKET_MTU ? 1 : 0;</div><div class='add'>+		XGMAC_IOWRITE_BITS(pdata, MAC_RCR, GPSLCE, 0);</div><div class='add'>+		XGMAC_IOWRITE_BITS(pdata, MAC_RCR, WD, 0);</div><div class='add'>+		XGMAC_IOWRITE_BITS(pdata, MAC_TCR, JD, 0);</div><div class='add'>+		XGMAC_IOWRITE_BITS(pdata, MAC_RCR, JE, val);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgbe_config_mac_speed(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	switch (pdata-&gt;phy_speed) {</div><div class='del'>-	case SPEED_10000:</div><div class='del'>-		xgbe_set_xgmii_speed(pdata);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case SPEED_2500:</div><div class='del'>-		xgbe_set_gmii_2500_speed(pdata);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case SPEED_1000:</div><div class='del'>-		xgbe_set_gmii_speed(pdata);</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='add'>+	xgbe_set_speed(pdata, pdata-&gt;phy_speed);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgbe_config_checksum_offload(struct xgbe_prv_data *pdata)</div><div class='hunk'>@@ -2213,18 +2786,34 @@ static u64 xgbe_mmc_read(struct xgbe_prv_data *pdata, unsigned int reg_lo)</div><div class='ctx'> 	bool read_hi;</div><div class='ctx'> 	u64 val;</div><div class='ctx'> </div><div class='del'>-	switch (reg_lo) {</div><div class='del'>-	/* These registers are always 64 bit */</div><div class='del'>-	case MMC_TXOCTETCOUNT_GB_LO:</div><div class='del'>-	case MMC_TXOCTETCOUNT_G_LO:</div><div class='del'>-	case MMC_RXOCTETCOUNT_GB_LO:</div><div class='del'>-	case MMC_RXOCTETCOUNT_G_LO:</div><div class='del'>-		read_hi = true;</div><div class='del'>-		break;</div><div class='add'>+	if (pdata-&gt;vdata-&gt;mmc_64bit) {</div><div class='add'>+		switch (reg_lo) {</div><div class='add'>+		/* These registers are always 32 bit */</div><div class='add'>+		case MMC_RXRUNTERROR:</div><div class='add'>+		case MMC_RXJABBERERROR:</div><div class='add'>+		case MMC_RXUNDERSIZE_G:</div><div class='add'>+		case MMC_RXOVERSIZE_G:</div><div class='add'>+		case MMC_RXWATCHDOGERROR:</div><div class='add'>+			read_hi = false;</div><div class='add'>+			break;</div><div class='ctx'> </div><div class='del'>-	default:</div><div class='del'>-		read_hi = false;</div><div class='del'>-	};</div><div class='add'>+		default:</div><div class='add'>+			read_hi = true;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		switch (reg_lo) {</div><div class='add'>+		/* These registers are always 64 bit */</div><div class='add'>+		case MMC_TXOCTETCOUNT_GB_LO:</div><div class='add'>+		case MMC_TXOCTETCOUNT_G_LO:</div><div class='add'>+		case MMC_RXOCTETCOUNT_GB_LO:</div><div class='add'>+		case MMC_RXOCTETCOUNT_G_LO:</div><div class='add'>+			read_hi = true;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		default:</div><div class='add'>+			read_hi = false;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	val = XGMAC_IOREAD(pdata, reg_lo);</div><div class='ctx'> </div><div class='hunk'>@@ -2553,20 +3142,48 @@ static void xgbe_config_mmc(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	XGMAC_IOWRITE_BITS(pdata, MMC_CR, CR, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void xgbe_txq_prepare_tx_stop(struct xgbe_prv_data *pdata,</div><div class='add'>+				     unsigned int queue)</div><div class='add'>+{</div><div class='add'>+	unsigned int tx_status;</div><div class='add'>+	unsigned long tx_timeout;</div><div class='add'>+</div><div class='add'>+	/* The Tx engine cannot be stopped if it is actively processing</div><div class='add'>+	 * packets. Wait for the Tx queue to empty the Tx fifo.  Don't</div><div class='add'>+	 * wait forever though...</div><div class='add'>+	 */</div><div class='add'>+	tx_timeout = jiffies + (XGBE_DMA_STOP_TIMEOUT * HZ);</div><div class='add'>+	while (time_before(jiffies, tx_timeout)) {</div><div class='add'>+		tx_status = XGMAC_MTL_IOREAD(pdata, queue, MTL_Q_TQDR);</div><div class='add'>+		if ((XGMAC_GET_BITS(tx_status, MTL_Q_TQDR, TRCSTS) != 1) &amp;&amp;</div><div class='add'>+		    (XGMAC_GET_BITS(tx_status, MTL_Q_TQDR, TXQSTS) == 0))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		usleep_range(500, 1000);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!time_before(jiffies, tx_timeout))</div><div class='add'>+		netdev_info(pdata-&gt;netdev,</div><div class='add'>+			    "timed out waiting for Tx queue %u to empty\n",</div><div class='add'>+			    queue);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void xgbe_prepare_tx_stop(struct xgbe_prv_data *pdata,</div><div class='del'>-				 struct xgbe_channel *channel)</div><div class='add'>+				 unsigned int queue)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int tx_dsr, tx_pos, tx_qidx;</div><div class='ctx'> 	unsigned int tx_status;</div><div class='ctx'> 	unsigned long tx_timeout;</div><div class='ctx'> </div><div class='add'>+	if (XGMAC_GET_BITS(pdata-&gt;hw_feat.version, MAC_VR, SNPSVER) &gt; 0x20)</div><div class='add'>+		return xgbe_txq_prepare_tx_stop(pdata, queue);</div><div class='add'>+</div><div class='ctx'> 	/* Calculate the status register to read and the position within */</div><div class='del'>-	if (channel-&gt;queue_index &lt; DMA_DSRX_FIRST_QUEUE) {</div><div class='add'>+	if (queue &lt; DMA_DSRX_FIRST_QUEUE) {</div><div class='ctx'> 		tx_dsr = DMA_DSR0;</div><div class='del'>-		tx_pos = (channel-&gt;queue_index * DMA_DSR_Q_WIDTH) +</div><div class='del'>-			 DMA_DSR0_TPS_START;</div><div class='add'>+		tx_pos = (queue * DMA_DSR_Q_WIDTH) + DMA_DSR0_TPS_START;</div><div class='ctx'> 	} else {</div><div class='del'>-		tx_qidx = channel-&gt;queue_index - DMA_DSRX_FIRST_QUEUE;</div><div class='add'>+		tx_qidx = queue - DMA_DSRX_FIRST_QUEUE;</div><div class='ctx'> </div><div class='ctx'> 		tx_dsr = DMA_DSR1 + ((tx_qidx / DMA_DSRX_QPR) * DMA_DSRX_INC);</div><div class='ctx'> 		tx_pos = ((tx_qidx % DMA_DSRX_QPR) * DMA_DSR_Q_WIDTH) +</div><div class='hunk'>@@ -2591,21 +3208,19 @@ static void xgbe_prepare_tx_stop(struct xgbe_prv_data *pdata,</div><div class='ctx'> 	if (!time_before(jiffies, tx_timeout))</div><div class='ctx'> 		netdev_info(pdata-&gt;netdev,</div><div class='ctx'> 			    "timed out waiting for Tx DMA channel %u to stop\n",</div><div class='del'>-			    channel-&gt;queue_index);</div><div class='add'>+			    queue);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgbe_enable_tx(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	struct xgbe_channel *channel;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 	/* Enable each Tx DMA channel */</div><div class='del'>-	channel = pdata-&gt;channel;</div><div class='del'>-	for (i = 0; i &lt; pdata-&gt;channel_count; i++, channel++) {</div><div class='del'>-		if (!channel-&gt;tx_ring)</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;channel_count; i++) {</div><div class='add'>+		if (!pdata-&gt;channel[i]-&gt;tx_ring)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_TCR, ST, 1);</div><div class='add'>+		XGMAC_DMA_IOWRITE_BITS(pdata-&gt;channel[i], DMA_CH_TCR, ST, 1);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Enable each Tx queue */</div><div class='hunk'>@@ -2619,17 +3234,11 @@ static void xgbe_enable_tx(struct xgbe_prv_data *pdata)</div><div class='ctx'> </div><div class='ctx'> static void xgbe_disable_tx(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	struct xgbe_channel *channel;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 	/* Prepare for Tx DMA channel stop */</div><div class='del'>-	channel = pdata-&gt;channel;</div><div class='del'>-	for (i = 0; i &lt; pdata-&gt;channel_count; i++, channel++) {</div><div class='del'>-		if (!channel-&gt;tx_ring)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		xgbe_prepare_tx_stop(pdata, channel);</div><div class='del'>-	}</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;tx_q_count; i++)</div><div class='add'>+		xgbe_prepare_tx_stop(pdata, i);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable MAC Tx */</div><div class='ctx'> 	XGMAC_IOWRITE_BITS(pdata, MAC_TCR, TE, 0);</div><div class='hunk'>@@ -2639,27 +3248,50 @@ static void xgbe_disable_tx(struct xgbe_prv_data *pdata)</div><div class='ctx'> 		XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_TQOMR, TXQEN, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable each Tx DMA channel */</div><div class='del'>-	channel = pdata-&gt;channel;</div><div class='del'>-	for (i = 0; i &lt; pdata-&gt;channel_count; i++, channel++) {</div><div class='del'>-		if (!channel-&gt;tx_ring)</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;channel_count; i++) {</div><div class='add'>+		if (!pdata-&gt;channel[i]-&gt;tx_ring)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		XGMAC_DMA_IOWRITE_BITS(pdata-&gt;channel[i], DMA_CH_TCR, ST, 0);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_prepare_rx_stop(struct xgbe_prv_data *pdata,</div><div class='add'>+				 unsigned int queue)</div><div class='add'>+{</div><div class='add'>+	unsigned int rx_status;</div><div class='add'>+	unsigned long rx_timeout;</div><div class='add'>+</div><div class='add'>+	/* The Rx engine cannot be stopped if it is actively processing</div><div class='add'>+	 * packets. Wait for the Rx queue to empty the Rx fifo.  Don't</div><div class='add'>+	 * wait forever though...</div><div class='add'>+	 */</div><div class='add'>+	rx_timeout = jiffies + (XGBE_DMA_STOP_TIMEOUT * HZ);</div><div class='add'>+	while (time_before(jiffies, rx_timeout)) {</div><div class='add'>+		rx_status = XGMAC_MTL_IOREAD(pdata, queue, MTL_Q_RQDR);</div><div class='add'>+		if ((XGMAC_GET_BITS(rx_status, MTL_Q_RQDR, PRXQ) == 0) &amp;&amp;</div><div class='add'>+		    (XGMAC_GET_BITS(rx_status, MTL_Q_RQDR, RXQSTS) == 0))</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_TCR, ST, 0);</div><div class='add'>+		usleep_range(500, 1000);</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	if (!time_before(jiffies, rx_timeout))</div><div class='add'>+		netdev_info(pdata-&gt;netdev,</div><div class='add'>+			    "timed out waiting for Rx queue %u to empty\n",</div><div class='add'>+			    queue);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgbe_enable_rx(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	struct xgbe_channel *channel;</div><div class='ctx'> 	unsigned int reg_val, i;</div><div class='ctx'> </div><div class='ctx'> 	/* Enable each Rx DMA channel */</div><div class='del'>-	channel = pdata-&gt;channel;</div><div class='del'>-	for (i = 0; i &lt; pdata-&gt;channel_count; i++, channel++) {</div><div class='del'>-		if (!channel-&gt;rx_ring)</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;channel_count; i++) {</div><div class='add'>+		if (!pdata-&gt;channel[i]-&gt;rx_ring)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_RCR, SR, 1);</div><div class='add'>+		XGMAC_DMA_IOWRITE_BITS(pdata-&gt;channel[i], DMA_CH_RCR, SR, 1);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Enable each Rx queue */</div><div class='hunk'>@@ -2677,7 +3309,6 @@ static void xgbe_enable_rx(struct xgbe_prv_data *pdata)</div><div class='ctx'> </div><div class='ctx'> static void xgbe_disable_rx(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	struct xgbe_channel *channel;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 	/* Disable MAC Rx */</div><div class='hunk'>@@ -2686,31 +3317,32 @@ static void xgbe_disable_rx(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	XGMAC_IOWRITE_BITS(pdata, MAC_RCR, ACS, 0);</div><div class='ctx'> 	XGMAC_IOWRITE_BITS(pdata, MAC_RCR, RE, 0);</div><div class='ctx'> </div><div class='add'>+	/* Prepare for Rx DMA channel stop */</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;rx_q_count; i++)</div><div class='add'>+		xgbe_prepare_rx_stop(pdata, i);</div><div class='add'>+</div><div class='ctx'> 	/* Disable each Rx queue */</div><div class='ctx'> 	XGMAC_IOWRITE(pdata, MAC_RQC0R, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable each Rx DMA channel */</div><div class='del'>-	channel = pdata-&gt;channel;</div><div class='del'>-	for (i = 0; i &lt; pdata-&gt;channel_count; i++, channel++) {</div><div class='del'>-		if (!channel-&gt;rx_ring)</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;channel_count; i++) {</div><div class='add'>+		if (!pdata-&gt;channel[i]-&gt;rx_ring)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_RCR, SR, 0);</div><div class='add'>+		XGMAC_DMA_IOWRITE_BITS(pdata-&gt;channel[i], DMA_CH_RCR, SR, 0);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgbe_powerup_tx(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	struct xgbe_channel *channel;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 	/* Enable each Tx DMA channel */</div><div class='del'>-	channel = pdata-&gt;channel;</div><div class='del'>-	for (i = 0; i &lt; pdata-&gt;channel_count; i++, channel++) {</div><div class='del'>-		if (!channel-&gt;tx_ring)</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;channel_count; i++) {</div><div class='add'>+		if (!pdata-&gt;channel[i]-&gt;tx_ring)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_TCR, ST, 1);</div><div class='add'>+		XGMAC_DMA_IOWRITE_BITS(pdata-&gt;channel[i], DMA_CH_TCR, ST, 1);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Enable MAC Tx */</div><div class='hunk'>@@ -2719,58 +3351,47 @@ static void xgbe_powerup_tx(struct xgbe_prv_data *pdata)</div><div class='ctx'> </div><div class='ctx'> static void xgbe_powerdown_tx(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	struct xgbe_channel *channel;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 	/* Prepare for Tx DMA channel stop */</div><div class='del'>-	channel = pdata-&gt;channel;</div><div class='del'>-	for (i = 0; i &lt; pdata-&gt;channel_count; i++, channel++) {</div><div class='del'>-		if (!channel-&gt;tx_ring)</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		xgbe_prepare_tx_stop(pdata, channel);</div><div class='del'>-	}</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;tx_q_count; i++)</div><div class='add'>+		xgbe_prepare_tx_stop(pdata, i);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable MAC Tx */</div><div class='ctx'> 	XGMAC_IOWRITE_BITS(pdata, MAC_TCR, TE, 0);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable each Tx DMA channel */</div><div class='del'>-	channel = pdata-&gt;channel;</div><div class='del'>-	for (i = 0; i &lt; pdata-&gt;channel_count; i++, channel++) {</div><div class='del'>-		if (!channel-&gt;tx_ring)</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;channel_count; i++) {</div><div class='add'>+		if (!pdata-&gt;channel[i]-&gt;tx_ring)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_TCR, ST, 0);</div><div class='add'>+		XGMAC_DMA_IOWRITE_BITS(pdata-&gt;channel[i], DMA_CH_TCR, ST, 0);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgbe_powerup_rx(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	struct xgbe_channel *channel;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 	/* Enable each Rx DMA channel */</div><div class='del'>-	channel = pdata-&gt;channel;</div><div class='del'>-	for (i = 0; i &lt; pdata-&gt;channel_count; i++, channel++) {</div><div class='del'>-		if (!channel-&gt;rx_ring)</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;channel_count; i++) {</div><div class='add'>+		if (!pdata-&gt;channel[i]-&gt;rx_ring)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_RCR, SR, 1);</div><div class='add'>+		XGMAC_DMA_IOWRITE_BITS(pdata-&gt;channel[i], DMA_CH_RCR, SR, 1);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgbe_powerdown_rx(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	struct xgbe_channel *channel;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 	/* Disable each Rx DMA channel */</div><div class='del'>-	channel = pdata-&gt;channel;</div><div class='del'>-	for (i = 0; i &lt; pdata-&gt;channel_count; i++, channel++) {</div><div class='del'>-		if (!channel-&gt;rx_ring)</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;channel_count; i++) {</div><div class='add'>+		if (!pdata-&gt;channel[i]-&gt;rx_ring)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		XGMAC_DMA_IOWRITE_BITS(channel, DMA_CH_RCR, SR, 0);</div><div class='add'>+		XGMAC_DMA_IOWRITE_BITS(pdata-&gt;channel[i], DMA_CH_RCR, SR, 0);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2783,8 +3404,10 @@ static int xgbe_init(struct xgbe_prv_data *pdata)</div><div class='ctx'> </div><div class='ctx'> 	/* Flush Tx queues */</div><div class='ctx'> 	ret = xgbe_flush_tx_queues(pdata);</div><div class='del'>-	if (ret)</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(pdata-&gt;netdev, "error flushing TX queues\n");</div><div class='ctx'> 		return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Initialize DMA related features</div><div class='hunk'>@@ -2792,15 +3415,17 @@ static int xgbe_init(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	xgbe_config_dma_bus(pdata);</div><div class='ctx'> 	xgbe_config_dma_cache(pdata);</div><div class='ctx'> 	xgbe_config_osp_mode(pdata);</div><div class='del'>-	xgbe_config_pblx8(pdata);</div><div class='del'>-	xgbe_config_tx_pbl_val(pdata);</div><div class='del'>-	xgbe_config_rx_pbl_val(pdata);</div><div class='add'>+	xgbe_config_pbl_val(pdata);</div><div class='ctx'> 	xgbe_config_rx_coalesce(pdata);</div><div class='ctx'> 	xgbe_config_tx_coalesce(pdata);</div><div class='ctx'> 	xgbe_config_rx_buffer_size(pdata);</div><div class='ctx'> 	xgbe_config_tso_mode(pdata);</div><div class='del'>-	xgbe_config_sph_mode(pdata);</div><div class='del'>-	xgbe_config_rss(pdata);</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;netdev-&gt;features &amp; NETIF_F_RXCSUM) {</div><div class='add'>+		xgbe_config_sph_mode(pdata);</div><div class='add'>+		xgbe_config_rss(pdata);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	desc_if-&gt;wrapper_tx_desc_init(pdata);</div><div class='ctx'> 	desc_if-&gt;wrapper_rx_desc_init(pdata);</div><div class='ctx'> 	xgbe_enable_dma_interrupts(pdata);</div><div class='hunk'>@@ -2816,12 +3441,10 @@ static int xgbe_init(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	xgbe_config_rx_threshold(pdata, pdata-&gt;rx_threshold);</div><div class='ctx'> 	xgbe_config_tx_fifo_size(pdata);</div><div class='ctx'> 	xgbe_config_rx_fifo_size(pdata);</div><div class='del'>-	xgbe_config_flow_control_threshold(pdata);</div><div class='ctx'> 	/*TODO: Error Packet and undersized good Packet forwarding enable</div><div class='ctx'> 		(FEP and FUP)</div><div class='ctx'> 	 */</div><div class='ctx'> 	xgbe_config_dcb_tc(pdata);</div><div class='del'>-	xgbe_config_dcb_pfc(pdata);</div><div class='ctx'> 	xgbe_enable_mtl_interrupts(pdata);</div><div class='ctx'> </div><div class='ctx'> 	/*</div><div class='hunk'>@@ -2837,6 +3460,11 @@ static int xgbe_init(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	xgbe_config_mmc(pdata);</div><div class='ctx'> 	xgbe_enable_mac_interrupts(pdata);</div><div class='ctx'> </div><div class='add'>+	/*</div><div class='add'>+	 * Initialize ECC related features</div><div class='add'>+	 */</div><div class='add'>+	xgbe_enable_ecc_interrupts(pdata);</div><div class='add'>+</div><div class='ctx'> 	DBGPR("&lt;--xgbe_init\n");</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -2863,9 +3491,16 @@ void xgbe_init_function_ptrs_dev(struct xgbe_hw_if *hw_if)</div><div class='ctx'> 	hw_if-&gt;read_mmd_regs = xgbe_read_mmd_regs;</div><div class='ctx'> 	hw_if-&gt;write_mmd_regs = xgbe_write_mmd_regs;</div><div class='ctx'> </div><div class='del'>-	hw_if-&gt;set_gmii_speed = xgbe_set_gmii_speed;</div><div class='del'>-	hw_if-&gt;set_gmii_2500_speed = xgbe_set_gmii_2500_speed;</div><div class='del'>-	hw_if-&gt;set_xgmii_speed = xgbe_set_xgmii_speed;</div><div class='add'>+	hw_if-&gt;set_speed = xgbe_set_speed;</div><div class='add'>+</div><div class='add'>+	hw_if-&gt;set_ext_mii_mode = xgbe_set_ext_mii_mode;</div><div class='add'>+	hw_if-&gt;read_ext_mii_regs_c22 = xgbe_read_ext_mii_regs_c22;</div><div class='add'>+	hw_if-&gt;write_ext_mii_regs_c22 = xgbe_write_ext_mii_regs_c22;</div><div class='add'>+	hw_if-&gt;read_ext_mii_regs_c45 = xgbe_read_ext_mii_regs_c45;</div><div class='add'>+	hw_if-&gt;write_ext_mii_regs_c45 = xgbe_write_ext_mii_regs_c45;</div><div class='add'>+</div><div class='add'>+	hw_if-&gt;set_gpio = xgbe_set_gpio;</div><div class='add'>+	hw_if-&gt;clr_gpio = xgbe_clr_gpio;</div><div class='ctx'> </div><div class='ctx'> 	hw_if-&gt;enable_tx = xgbe_enable_tx;</div><div class='ctx'> 	hw_if-&gt;disable_tx = xgbe_disable_tx;</div><div class='hunk'>@@ -2914,26 +3549,13 @@ void xgbe_init_function_ptrs_dev(struct xgbe_hw_if *hw_if)</div><div class='ctx'> 	/* For TX DMA Operating on Second Frame config */</div><div class='ctx'> 	hw_if-&gt;config_osp_mode = xgbe_config_osp_mode;</div><div class='ctx'> </div><div class='del'>-	/* For RX and TX PBL config */</div><div class='del'>-	hw_if-&gt;config_rx_pbl_val = xgbe_config_rx_pbl_val;</div><div class='del'>-	hw_if-&gt;get_rx_pbl_val = xgbe_get_rx_pbl_val;</div><div class='del'>-	hw_if-&gt;config_tx_pbl_val = xgbe_config_tx_pbl_val;</div><div class='del'>-	hw_if-&gt;get_tx_pbl_val = xgbe_get_tx_pbl_val;</div><div class='del'>-	hw_if-&gt;config_pblx8 = xgbe_config_pblx8;</div><div class='del'>-</div><div class='ctx'> 	/* For MMC statistics support */</div><div class='ctx'> 	hw_if-&gt;tx_mmc_int = xgbe_tx_mmc_int;</div><div class='ctx'> 	hw_if-&gt;rx_mmc_int = xgbe_rx_mmc_int;</div><div class='ctx'> 	hw_if-&gt;read_mmc_stats = xgbe_read_mmc_stats;</div><div class='ctx'> </div><div class='del'>-	/* For PTP config */</div><div class='del'>-	hw_if-&gt;config_tstamp = xgbe_config_tstamp;</div><div class='del'>-	hw_if-&gt;update_tstamp_addend = xgbe_update_tstamp_addend;</div><div class='del'>-	hw_if-&gt;set_tstamp_time = xgbe_set_tstamp_time;</div><div class='del'>-	hw_if-&gt;get_tstamp_time = xgbe_get_tstamp_time;</div><div class='del'>-	hw_if-&gt;get_tx_tstamp = xgbe_get_tx_tstamp;</div><div class='del'>-</div><div class='ctx'> 	/* For Data Center Bridging config */</div><div class='add'>+	hw_if-&gt;config_tc = xgbe_config_tc;</div><div class='ctx'> 	hw_if-&gt;config_dcb_tc = xgbe_config_dcb_tc;</div><div class='ctx'> 	hw_if-&gt;config_dcb_pfc = xgbe_config_dcb_pfc;</div><div class='ctx'> </div><div class='hunk'>@@ -2943,5 +3565,35 @@ void xgbe_init_function_ptrs_dev(struct xgbe_hw_if *hw_if)</div><div class='ctx'> 	hw_if-&gt;set_rss_hash_key = xgbe_set_rss_hash_key;</div><div class='ctx'> 	hw_if-&gt;set_rss_lookup_table = xgbe_set_rss_lookup_table;</div><div class='ctx'> </div><div class='add'>+	/* For ECC */</div><div class='add'>+	hw_if-&gt;disable_ecc_ded = xgbe_disable_ecc_ded;</div><div class='add'>+	hw_if-&gt;disable_ecc_sec = xgbe_disable_ecc_sec;</div><div class='add'>+</div><div class='add'>+	/* For VXLAN */</div><div class='add'>+	hw_if-&gt;enable_vxlan = xgbe_enable_vxlan;</div><div class='add'>+	hw_if-&gt;disable_vxlan = xgbe_disable_vxlan;</div><div class='add'>+	hw_if-&gt;set_vxlan_id = xgbe_set_vxlan_id;</div><div class='add'>+</div><div class='add'>+	/* For Split Header*/</div><div class='add'>+	hw_if-&gt;enable_sph = xgbe_config_sph_mode;</div><div class='add'>+	hw_if-&gt;disable_sph = xgbe_disable_sph_mode;</div><div class='add'>+</div><div class='ctx'> 	DBGPR("&lt;--xgbe_init_function_ptrs\n");</div><div class='ctx'> }</div><div class='add'>+</div><div class='add'>+int xgbe_enable_mac_loopback(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	/* Enable MAC loopback mode */</div><div class='add'>+	XGMAC_IOWRITE_BITS(pdata, MAC_RCR, LM, 1);</div><div class='add'>+</div><div class='add'>+	/* Wait for loopback to stabilize */</div><div class='add'>+	usleep_range(10, 15);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void xgbe_disable_mac_loopback(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	/* Disable MAC loopback mode */</div><div class='add'>+	XGMAC_IOWRITE_BITS(pdata, MAC_RCR, LM, 0);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-drv.c b/drivers/net/ethernet/amd/xgbe/xgbe-drv.c<br/>index aae9d5ecd182..3ddd896d6987 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-drv.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/xgbe/xgbe-drv.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-drv.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe-drv.c</a></div><div class='hunk'>@@ -1,223 +1,154 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='ctx'> /*</div><div class='del'>- * AMD 10Gb Ethernet driver</div><div class='del'>- *</div><div class='del'>- * This file is available to you under your choice of the following two</div><div class='del'>- * licenses:</div><div class='del'>- *</div><div class='del'>- * License 1: GPLv2</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014 Advanced Micro Devices, Inc.</div><div class='del'>- *</div><div class='del'>- * This file is free software; you may copy, redistribute and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation, either version 2 of the License, or (at</div><div class='del'>- * your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This file is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- * License 2: Modified BSD</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014 Advanced Micro Devices, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * Redistribution and use in source and binary forms, with or without</div><div class='del'>- * modification, are permitted provided that the following conditions are met:</div><div class='del'>- *     * Redistributions of source code must retain the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer.</div><div class='del'>- *     * Redistributions in binary form must reproduce the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer in the</div><div class='del'>- *       documentation and/or other materials provided with the distribution.</div><div class='del'>- *     * Neither the name of Advanced Micro Devices, Inc. nor the</div><div class='del'>- *       names of its contributors may be used to endorse or promote products</div><div class='del'>- *       derived from this software without specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"</div><div class='del'>- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE</div><div class='del'>- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE</div><div class='del'>- * ARE DISCLAIMED. IN NO EVENT SHALL &lt;COPYRIGHT HOLDER&gt; BE LIABLE FOR ANY</div><div class='del'>- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES</div><div class='del'>- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;</div><div class='del'>- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND</div><div class='del'>- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='del'>- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF</div><div class='del'>- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;linux/tcp.h&gt;</div><div class='ctx'> #include &lt;linux/if_vlan.h&gt;</div><div class='del'>-#include &lt;net/busy_poll.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/if_ether.h&gt;</div><div class='ctx'> #include &lt;linux/net_tstamp.h&gt;</div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;net/vxlan.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "xgbe.h"</div><div class='ctx'> #include "xgbe-common.h"</div><div class='ctx'> </div><div class='add'>+static unsigned int ecc_sec_info_threshold = 10;</div><div class='add'>+static unsigned int ecc_sec_warn_threshold = 10000;</div><div class='add'>+static unsigned int ecc_sec_period = 600;</div><div class='add'>+static unsigned int ecc_ded_threshold = 2;</div><div class='add'>+static unsigned int ecc_ded_period = 600;</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_AMD_XGBE_HAVE_ECC</div><div class='add'>+/* Only expose the ECC parameters if supported */</div><div class='add'>+module_param(ecc_sec_info_threshold, uint, 0644);</div><div class='add'>+MODULE_PARM_DESC(ecc_sec_info_threshold,</div><div class='add'>+		 " ECC corrected error informational threshold setting");</div><div class='add'>+</div><div class='add'>+module_param(ecc_sec_warn_threshold, uint, 0644);</div><div class='add'>+MODULE_PARM_DESC(ecc_sec_warn_threshold,</div><div class='add'>+		 " ECC corrected error warning threshold setting");</div><div class='add'>+</div><div class='add'>+module_param(ecc_sec_period, uint, 0644);</div><div class='add'>+MODULE_PARM_DESC(ecc_sec_period, " ECC corrected error period (in seconds)");</div><div class='add'>+</div><div class='add'>+module_param(ecc_ded_threshold, uint, 0644);</div><div class='add'>+MODULE_PARM_DESC(ecc_ded_threshold, " ECC detected error threshold setting");</div><div class='add'>+</div><div class='add'>+module_param(ecc_ded_period, uint, 0644);</div><div class='add'>+MODULE_PARM_DESC(ecc_ded_period, " ECC detected error period (in seconds)");</div><div class='add'>+#endif</div><div class='add'>+</div><div class='ctx'> static int xgbe_one_poll(struct napi_struct *, int);</div><div class='ctx'> static int xgbe_all_poll(struct napi_struct *, int);</div><div class='add'>+static void xgbe_stop(struct xgbe_prv_data *);</div><div class='add'>+</div><div class='add'>+static void *xgbe_alloc_node(size_t size, int node)</div><div class='add'>+{</div><div class='add'>+	void *mem;</div><div class='add'>+</div><div class='add'>+	mem = kzalloc_node(size, GFP_KERNEL, node);</div><div class='add'>+	if (!mem)</div><div class='add'>+		mem = kzalloc(size, GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	return mem;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_free_channels(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(pdata-&gt;channel); i++) {</div><div class='add'>+		if (!pdata-&gt;channel[i])</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		kfree(pdata-&gt;channel[i]-&gt;rx_ring);</div><div class='add'>+		kfree(pdata-&gt;channel[i]-&gt;tx_ring);</div><div class='add'>+		kfree(pdata-&gt;channel[i]);</div><div class='add'>+</div><div class='add'>+		pdata-&gt;channel[i] = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pdata-&gt;channel_count = 0;</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static int xgbe_alloc_channels(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	struct xgbe_channel *channel_mem, *channel;</div><div class='del'>-	struct xgbe_ring *tx_ring, *rx_ring;</div><div class='add'>+	struct xgbe_channel *channel;</div><div class='add'>+	struct xgbe_ring *ring;</div><div class='ctx'> 	unsigned int count, i;</div><div class='del'>-	int ret = -ENOMEM;</div><div class='add'>+	unsigned int cpu;</div><div class='add'>+	int node;</div><div class='ctx'> </div><div class='ctx'> 	count = max_t(unsigned int, pdata-&gt;tx_ring_count, pdata-&gt;rx_ring_count);</div><div class='add'>+	for (i = 0; i &lt; count; i++) {</div><div class='add'>+		/* Attempt to use a CPU on the node the device is on */</div><div class='add'>+		cpu = cpumask_local_spread(i, dev_to_node(pdata-&gt;dev));</div><div class='ctx'> </div><div class='del'>-	channel_mem = kcalloc(count, sizeof(struct xgbe_channel), GFP_KERNEL);</div><div class='del'>-	if (!channel_mem)</div><div class='del'>-		goto err_channel;</div><div class='add'>+		/* Set the allocation node based on the returned CPU */</div><div class='add'>+		node = cpu_to_node(cpu);</div><div class='ctx'> </div><div class='del'>-	tx_ring = kcalloc(pdata-&gt;tx_ring_count, sizeof(struct xgbe_ring),</div><div class='del'>-			  GFP_KERNEL);</div><div class='del'>-	if (!tx_ring)</div><div class='del'>-		goto err_tx_ring;</div><div class='add'>+		channel = xgbe_alloc_node(sizeof(*channel), node);</div><div class='add'>+		if (!channel)</div><div class='add'>+			goto err_mem;</div><div class='add'>+		pdata-&gt;channel[i] = channel;</div><div class='ctx'> </div><div class='del'>-	rx_ring = kcalloc(pdata-&gt;rx_ring_count, sizeof(struct xgbe_ring),</div><div class='del'>-			  GFP_KERNEL);</div><div class='del'>-	if (!rx_ring)</div><div class='del'>-		goto err_rx_ring;</div><div class='del'>-</div><div class='del'>-	for (i = 0, channel = channel_mem; i &lt; count; i++, channel++) {</div><div class='del'>-		snprintf(channel-&gt;name, sizeof(channel-&gt;name), "channel-%d", i);</div><div class='add'>+		snprintf(channel-&gt;name, sizeof(channel-&gt;name), "channel-%u", i);</div><div class='ctx'> 		channel-&gt;pdata = pdata;</div><div class='ctx'> 		channel-&gt;queue_index = i;</div><div class='ctx'> 		channel-&gt;dma_regs = pdata-&gt;xgmac_regs + DMA_CH_BASE +</div><div class='ctx'> 				    (DMA_CH_INC * i);</div><div class='add'>+		channel-&gt;node = node;</div><div class='add'>+		cpumask_set_cpu(cpu, &amp;channel-&gt;affinity_mask);</div><div class='ctx'> </div><div class='del'>-		if (pdata-&gt;per_channel_irq) {</div><div class='del'>-			/* Get the DMA interrupt (offset 1) */</div><div class='del'>-			ret = platform_get_irq(pdata-&gt;pdev, i + 1);</div><div class='del'>-			if (ret &lt; 0) {</div><div class='del'>-				netdev_err(pdata-&gt;netdev,</div><div class='del'>-					   "platform_get_irq %u failed\n",</div><div class='del'>-					   i + 1);</div><div class='del'>-				goto err_irq;</div><div class='del'>-			}</div><div class='del'>-</div><div class='del'>-			channel-&gt;dma_irq = ret;</div><div class='del'>-		}</div><div class='add'>+		if (pdata-&gt;per_channel_irq)</div><div class='add'>+			channel-&gt;dma_irq = pdata-&gt;channel_irq[i];</div><div class='ctx'> </div><div class='ctx'> 		if (i &lt; pdata-&gt;tx_ring_count) {</div><div class='del'>-			spin_lock_init(&amp;tx_ring-&gt;lock);</div><div class='del'>-			channel-&gt;tx_ring = tx_ring++;</div><div class='add'>+			ring = xgbe_alloc_node(sizeof(*ring), node);</div><div class='add'>+			if (!ring)</div><div class='add'>+				goto err_mem;</div><div class='add'>+</div><div class='add'>+			spin_lock_init(&amp;ring-&gt;lock);</div><div class='add'>+			ring-&gt;node = node;</div><div class='add'>+</div><div class='add'>+			channel-&gt;tx_ring = ring;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (i &lt; pdata-&gt;rx_ring_count) {</div><div class='del'>-			spin_lock_init(&amp;rx_ring-&gt;lock);</div><div class='del'>-			channel-&gt;rx_ring = rx_ring++;</div><div class='add'>+			ring = xgbe_alloc_node(sizeof(*ring), node);</div><div class='add'>+			if (!ring)</div><div class='add'>+				goto err_mem;</div><div class='add'>+</div><div class='add'>+			spin_lock_init(&amp;ring-&gt;lock);</div><div class='add'>+			ring-&gt;node = node;</div><div class='add'>+</div><div class='add'>+			channel-&gt;rx_ring = ring;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		netif_dbg(pdata, drv, pdata-&gt;netdev,</div><div class='add'>+			  "%s: cpu=%u, node=%d\n", channel-&gt;name, cpu, node);</div><div class='add'>+</div><div class='add'>+		netif_dbg(pdata, drv, pdata-&gt;netdev,</div><div class='ctx'> 			  "%s: dma_regs=%p, dma_irq=%d, tx=%p, rx=%p\n",</div><div class='ctx'> 			  channel-&gt;name, channel-&gt;dma_regs, channel-&gt;dma_irq,</div><div class='ctx'> 			  channel-&gt;tx_ring, channel-&gt;rx_ring);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pdata-&gt;channel = channel_mem;</div><div class='ctx'> 	pdata-&gt;channel_count = count;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-err_irq:</div><div class='del'>-	kfree(rx_ring);</div><div class='del'>-</div><div class='del'>-err_rx_ring:</div><div class='del'>-	kfree(tx_ring);</div><div class='del'>-</div><div class='del'>-err_tx_ring:</div><div class='del'>-	kfree(channel_mem);</div><div class='del'>-</div><div class='del'>-err_channel:</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void xgbe_free_channels(struct xgbe_prv_data *pdata)</div><div class='del'>-{</div><div class='del'>-	if (!pdata-&gt;channel)</div><div class='del'>-		return;</div><div class='del'>-</div><div class='del'>-	kfree(pdata-&gt;channel-&gt;rx_ring);</div><div class='del'>-	kfree(pdata-&gt;channel-&gt;tx_ring);</div><div class='del'>-	kfree(pdata-&gt;channel);</div><div class='add'>+err_mem:</div><div class='add'>+	xgbe_free_channels(pdata);</div><div class='ctx'> </div><div class='del'>-	pdata-&gt;channel = NULL;</div><div class='del'>-	pdata-&gt;channel_count = 0;</div><div class='add'>+	return -ENOMEM;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static inline unsigned int xgbe_tx_avail_desc(struct xgbe_ring *ring)</div><div class='hunk'>@@ -257,11 +188,6 @@ static int xgbe_calc_rx_buf_size(struct net_device *netdev, unsigned int mtu)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int rx_buf_size;</div><div class='ctx'> </div><div class='del'>-	if (mtu &gt; XGMAC_JUMBO_PACKET_MTU) {</div><div class='del'>-		netdev_alert(netdev, "MTU exceeds maximum supported value\n");</div><div class='del'>-		return -EINVAL;</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> 	rx_buf_size = mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;</div><div class='ctx'> 	rx_buf_size = clamp_val(rx_buf_size, XGBE_RX_MIN_BUF_SIZE, PAGE_SIZE);</div><div class='ctx'> </div><div class='hunk'>@@ -271,57 +197,181 @@ static int xgbe_calc_rx_buf_size(struct net_device *netdev, unsigned int mtu)</div><div class='ctx'> 	return rx_buf_size;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xgbe_enable_rx_tx_ints(struct xgbe_prv_data *pdata)</div><div class='add'>+static void xgbe_enable_rx_tx_int(struct xgbe_prv_data *pdata,</div><div class='add'>+				  struct xgbe_channel *channel)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgbe_hw_if *hw_if = &amp;pdata-&gt;hw_if;</div><div class='del'>-	struct xgbe_channel *channel;</div><div class='ctx'> 	enum xgbe_int int_id;</div><div class='del'>-	unsigned int i;</div><div class='ctx'> </div><div class='del'>-	channel = pdata-&gt;channel;</div><div class='del'>-	for (i = 0; i &lt; pdata-&gt;channel_count; i++, channel++) {</div><div class='del'>-		if (channel-&gt;tx_ring &amp;&amp; channel-&gt;rx_ring)</div><div class='del'>-			int_id = XGMAC_INT_DMA_CH_SR_TI_RI;</div><div class='del'>-		else if (channel-&gt;tx_ring)</div><div class='del'>-			int_id = XGMAC_INT_DMA_CH_SR_TI;</div><div class='del'>-		else if (channel-&gt;rx_ring)</div><div class='del'>-			int_id = XGMAC_INT_DMA_CH_SR_RI;</div><div class='del'>-		else</div><div class='del'>-			continue;</div><div class='add'>+	if (channel-&gt;tx_ring &amp;&amp; channel-&gt;rx_ring)</div><div class='add'>+		int_id = XGMAC_INT_DMA_CH_SR_TI_RI;</div><div class='add'>+	else if (channel-&gt;tx_ring)</div><div class='add'>+		int_id = XGMAC_INT_DMA_CH_SR_TI;</div><div class='add'>+	else if (channel-&gt;rx_ring)</div><div class='add'>+		int_id = XGMAC_INT_DMA_CH_SR_RI;</div><div class='add'>+	else</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-		hw_if-&gt;enable_int(channel, int_id);</div><div class='del'>-	}</div><div class='add'>+	hw_if-&gt;enable_int(channel, int_id);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xgbe_disable_rx_tx_ints(struct xgbe_prv_data *pdata)</div><div class='add'>+static void xgbe_enable_rx_tx_ints(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;channel_count; i++)</div><div class='add'>+		xgbe_enable_rx_tx_int(pdata, pdata-&gt;channel[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_disable_rx_tx_int(struct xgbe_prv_data *pdata,</div><div class='add'>+				   struct xgbe_channel *channel)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgbe_hw_if *hw_if = &amp;pdata-&gt;hw_if;</div><div class='del'>-	struct xgbe_channel *channel;</div><div class='ctx'> 	enum xgbe_int int_id;</div><div class='add'>+</div><div class='add'>+	if (channel-&gt;tx_ring &amp;&amp; channel-&gt;rx_ring)</div><div class='add'>+		int_id = XGMAC_INT_DMA_CH_SR_TI_RI;</div><div class='add'>+	else if (channel-&gt;tx_ring)</div><div class='add'>+		int_id = XGMAC_INT_DMA_CH_SR_TI;</div><div class='add'>+	else if (channel-&gt;rx_ring)</div><div class='add'>+		int_id = XGMAC_INT_DMA_CH_SR_RI;</div><div class='add'>+	else</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	hw_if-&gt;disable_int(channel, int_id);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_disable_rx_tx_ints(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='del'>-	channel = pdata-&gt;channel;</div><div class='del'>-	for (i = 0; i &lt; pdata-&gt;channel_count; i++, channel++) {</div><div class='del'>-		if (channel-&gt;tx_ring &amp;&amp; channel-&gt;rx_ring)</div><div class='del'>-			int_id = XGMAC_INT_DMA_CH_SR_TI_RI;</div><div class='del'>-		else if (channel-&gt;tx_ring)</div><div class='del'>-			int_id = XGMAC_INT_DMA_CH_SR_TI;</div><div class='del'>-		else if (channel-&gt;rx_ring)</div><div class='del'>-			int_id = XGMAC_INT_DMA_CH_SR_RI;</div><div class='del'>-		else</div><div class='del'>-			continue;</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;channel_count; i++)</div><div class='add'>+		xgbe_disable_rx_tx_int(pdata, pdata-&gt;channel[i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool xgbe_ecc_sec(struct xgbe_prv_data *pdata, unsigned long *period,</div><div class='add'>+			 unsigned int *count, const char *area)</div><div class='add'>+{</div><div class='add'>+	if (time_before(jiffies, *period)) {</div><div class='add'>+		(*count)++;</div><div class='add'>+	} else {</div><div class='add'>+		*period = jiffies + (ecc_sec_period * HZ);</div><div class='add'>+		*count = 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (*count &gt; ecc_sec_info_threshold)</div><div class='add'>+		dev_warn_once(pdata-&gt;dev,</div><div class='add'>+			      "%s ECC corrected errors exceed informational threshold\n",</div><div class='add'>+			      area);</div><div class='ctx'> </div><div class='del'>-		hw_if-&gt;disable_int(channel, int_id);</div><div class='add'>+	if (*count &gt; ecc_sec_warn_threshold) {</div><div class='add'>+		dev_warn_once(pdata-&gt;dev,</div><div class='add'>+			      "%s ECC corrected errors exceed warning threshold\n",</div><div class='add'>+			      area);</div><div class='add'>+		return true;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static irqreturn_t xgbe_isr(int irq, void *data)</div><div class='add'>+static bool xgbe_ecc_ded(struct xgbe_prv_data *pdata, unsigned long *period,</div><div class='add'>+			 unsigned int *count, const char *area)</div><div class='add'>+{</div><div class='add'>+	if (time_before(jiffies, *period)) {</div><div class='add'>+		(*count)++;</div><div class='add'>+	} else {</div><div class='add'>+		*period = jiffies + (ecc_ded_period * HZ);</div><div class='add'>+		*count = 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (*count &gt; ecc_ded_threshold) {</div><div class='add'>+		netdev_alert(pdata-&gt;netdev,</div><div class='add'>+			     "%s ECC detected errors exceed threshold\n",</div><div class='add'>+			     area);</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_ecc_isr_bh_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = from_work(pdata, work, ecc_bh_work);</div><div class='add'>+	unsigned int ecc_isr;</div><div class='add'>+	bool stop = false;</div><div class='add'>+</div><div class='add'>+	/* Mask status with only the interrupts we care about */</div><div class='add'>+	ecc_isr = XP_IOREAD(pdata, XP_ECC_ISR);</div><div class='add'>+	ecc_isr &amp;= XP_IOREAD(pdata, XP_ECC_IER);</div><div class='add'>+	netif_dbg(pdata, intr, pdata-&gt;netdev, "ECC_ISR=%#010x\n", ecc_isr);</div><div class='add'>+</div><div class='add'>+	if (XP_GET_BITS(ecc_isr, XP_ECC_ISR, TX_DED)) {</div><div class='add'>+		stop |= xgbe_ecc_ded(pdata, &amp;pdata-&gt;tx_ded_period,</div><div class='add'>+				     &amp;pdata-&gt;tx_ded_count, "TX fifo");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (XP_GET_BITS(ecc_isr, XP_ECC_ISR, RX_DED)) {</div><div class='add'>+		stop |= xgbe_ecc_ded(pdata, &amp;pdata-&gt;rx_ded_period,</div><div class='add'>+				     &amp;pdata-&gt;rx_ded_count, "RX fifo");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (XP_GET_BITS(ecc_isr, XP_ECC_ISR, DESC_DED)) {</div><div class='add'>+		stop |= xgbe_ecc_ded(pdata, &amp;pdata-&gt;desc_ded_period,</div><div class='add'>+				     &amp;pdata-&gt;desc_ded_count,</div><div class='add'>+				     "descriptor cache");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (stop) {</div><div class='add'>+		pdata-&gt;hw_if.disable_ecc_ded(pdata);</div><div class='add'>+		schedule_work(&amp;pdata-&gt;stopdev_work);</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (XP_GET_BITS(ecc_isr, XP_ECC_ISR, TX_SEC)) {</div><div class='add'>+		if (xgbe_ecc_sec(pdata, &amp;pdata-&gt;tx_sec_period,</div><div class='add'>+				 &amp;pdata-&gt;tx_sec_count, "TX fifo"))</div><div class='add'>+			pdata-&gt;hw_if.disable_ecc_sec(pdata, XGBE_ECC_SEC_TX);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (XP_GET_BITS(ecc_isr, XP_ECC_ISR, RX_SEC))</div><div class='add'>+		if (xgbe_ecc_sec(pdata, &amp;pdata-&gt;rx_sec_period,</div><div class='add'>+				 &amp;pdata-&gt;rx_sec_count, "RX fifo"))</div><div class='add'>+			pdata-&gt;hw_if.disable_ecc_sec(pdata, XGBE_ECC_SEC_RX);</div><div class='add'>+</div><div class='add'>+	if (XP_GET_BITS(ecc_isr, XP_ECC_ISR, DESC_SEC))</div><div class='add'>+		if (xgbe_ecc_sec(pdata, &amp;pdata-&gt;desc_sec_period,</div><div class='add'>+				 &amp;pdata-&gt;desc_sec_count, "descriptor cache"))</div><div class='add'>+			pdata-&gt;hw_if.disable_ecc_sec(pdata, XGBE_ECC_SEC_DESC);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	/* Clear all ECC interrupts */</div><div class='add'>+	XP_IOWRITE(pdata, XP_ECC_ISR, ecc_isr);</div><div class='add'>+</div><div class='add'>+	/* Reissue interrupt if status is not clear */</div><div class='add'>+	if (pdata-&gt;vdata-&gt;irq_reissue_support)</div><div class='add'>+		XP_IOWRITE(pdata, XP_INT_REISSUE_EN, 1 &lt;&lt; 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t xgbe_ecc_isr(int irq, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgbe_prv_data *pdata = data;</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;isr_as_bh_work)</div><div class='add'>+		queue_work(system_bh_wq, &amp;pdata-&gt;ecc_bh_work);</div><div class='add'>+	else</div><div class='add'>+		xgbe_ecc_isr_bh_work(&amp;pdata-&gt;ecc_bh_work);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_isr_bh_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = from_work(pdata, work, dev_bh_work);</div><div class='add'>+	unsigned int mac_isr, mac_tssr, mac_mdioisr;</div><div class='ctx'> 	struct xgbe_hw_if *hw_if = &amp;pdata-&gt;hw_if;</div><div class='del'>-	struct xgbe_channel *channel;</div><div class='add'>+	bool per_ch_irq, ti, ri, rbu, fbe;</div><div class='ctx'> 	unsigned int dma_isr, dma_ch_isr;</div><div class='del'>-	unsigned int mac_isr, mac_tssr;</div><div class='add'>+	struct xgbe_channel *channel;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 	/* The DMA interrupt status register also reports MAC and MTL</div><div class='hunk'>@@ -335,42 +385,85 @@ static irqreturn_t xgbe_isr(int irq, void *data)</div><div class='ctx'> 	netif_dbg(pdata, intr, pdata-&gt;netdev, "DMA_ISR=%#010x\n", dma_isr);</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; pdata-&gt;channel_count; i++) {</div><div class='add'>+		bool schedule_napi = false;</div><div class='add'>+		struct napi_struct *napi;</div><div class='add'>+</div><div class='ctx'> 		if (!(dma_isr &amp; (1 &lt;&lt; i)))</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='del'>-		channel = pdata-&gt;channel + i;</div><div class='add'>+		channel = pdata-&gt;channel[i];</div><div class='ctx'> </div><div class='ctx'> 		dma_ch_isr = XGMAC_DMA_IOREAD(channel, DMA_CH_SR);</div><div class='add'>+</div><div class='add'>+		/* Precompute flags once */</div><div class='add'>+		ti  = !!XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, TI);</div><div class='add'>+		ri  = !!XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, RI);</div><div class='add'>+		rbu = !!XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, RBU);</div><div class='add'>+		fbe = !!XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, FBE);</div><div class='add'>+</div><div class='ctx'> 		netif_dbg(pdata, intr, pdata-&gt;netdev, "DMA_CH%u_ISR=%#010x\n",</div><div class='ctx'> 			  i, dma_ch_isr);</div><div class='ctx'> </div><div class='del'>-		/* The TI or RI interrupt bits may still be set even if using</div><div class='del'>-		 * per channel DMA interrupts. Check to be sure those are not</div><div class='del'>-		 * enabled before using the private data napi structure.</div><div class='add'>+		per_ch_irq = pdata-&gt;per_channel_irq;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * Decide which NAPI to use and whether to schedule:</div><div class='add'>+		 * - When not using per-channel IRQs: schedule on global NAPI</div><div class='add'>+		 *   if TI or RI are set.</div><div class='add'>+		 * - RBU should also trigger NAPI (either per-channel or global)</div><div class='add'>+		 *   to allow refill.</div><div class='ctx'> 		 */</div><div class='del'>-		if (!pdata-&gt;per_channel_irq &amp;&amp;</div><div class='del'>-		    (XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, TI) ||</div><div class='del'>-		     XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, RI))) {</div><div class='del'>-			if (napi_schedule_prep(&amp;pdata-&gt;napi)) {</div><div class='del'>-				/* Disable Tx and Rx interrupts */</div><div class='del'>-				xgbe_disable_rx_tx_ints(pdata);</div><div class='add'>+		if (!per_ch_irq &amp;&amp; (ti || ri))</div><div class='add'>+			schedule_napi = true;</div><div class='add'>+</div><div class='add'>+		if (rbu) {</div><div class='add'>+			schedule_napi = true;</div><div class='add'>+			pdata-&gt;ext_stats.rx_buffer_unavailable++;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		napi = per_ch_irq ? &amp;channel-&gt;napi : &amp;pdata-&gt;napi;</div><div class='ctx'> </div><div class='del'>-				/* Turn on polling */</div><div class='del'>-				__napi_schedule(&amp;pdata-&gt;napi);</div><div class='add'>+		if (schedule_napi &amp;&amp; napi_schedule_prep(napi)) {</div><div class='add'>+			/* Disable interrupts appropriately before polling */</div><div class='add'>+			if (per_ch_irq) {</div><div class='add'>+				if (pdata-&gt;channel_irq_mode)</div><div class='add'>+					xgbe_disable_rx_tx_int(pdata, channel);</div><div class='add'>+				else</div><div class='add'>+					disable_irq_nosync(channel-&gt;dma_irq);</div><div class='add'>+			} else {</div><div class='add'>+				xgbe_disable_rx_tx_ints(pdata);</div><div class='ctx'> 			}</div><div class='add'>+</div><div class='add'>+			/* Turn on polling */</div><div class='add'>+			__napi_schedule(napi);</div><div class='add'>+		} else {</div><div class='add'>+			/*</div><div class='add'>+			 * Don't clear Rx/Tx status if doing per-channel DMA</div><div class='add'>+			 * interrupts; those bits will be serviced/cleared by</div><div class='add'>+			 * the per-channel ISR/NAPI. In non-per-channel mode</div><div class='add'>+			 * when we're not scheduling NAPI here, ensure we don't</div><div class='add'>+			 * accidentally clear TI/RI in HW: zero them in the</div><div class='add'>+			 * local copy so that the eventual write-back does not</div><div class='add'>+			 * clear TI/RI.</div><div class='add'>+			 */</div><div class='add'>+			XGMAC_SET_BITS(dma_ch_isr, DMA_CH_SR, TI, 0);</div><div class='add'>+			XGMAC_SET_BITS(dma_ch_isr, DMA_CH_SR, RI, 0);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Restart the device on a Fatal Bus Error */</div><div class='del'>-		if (XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, FBE))</div><div class='add'>+		if (fbe)</div><div class='ctx'> 			schedule_work(&amp;pdata-&gt;restart_work);</div><div class='ctx'> </div><div class='del'>-		/* Clear all interrupt signals */</div><div class='add'>+		/* Clear interrupt signals */</div><div class='ctx'> 		XGMAC_DMA_IOWRITE(channel, DMA_CH_SR, dma_ch_isr);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (XGMAC_GET_BITS(dma_isr, DMA_ISR, MACIS)) {</div><div class='ctx'> 		mac_isr = XGMAC_IOREAD(pdata, MAC_ISR);</div><div class='ctx'> </div><div class='add'>+		netif_dbg(pdata, intr, pdata-&gt;netdev, "MAC_ISR=%#010x\n",</div><div class='add'>+			  mac_isr);</div><div class='add'>+</div><div class='ctx'> 		if (XGMAC_GET_BITS(mac_isr, MAC_ISR, MMCTXIS))</div><div class='ctx'> 			hw_if-&gt;tx_mmc_int(pdata);</div><div class='ctx'> </div><div class='hunk'>@@ -380,40 +473,100 @@ static irqreturn_t xgbe_isr(int irq, void *data)</div><div class='ctx'> 		if (XGMAC_GET_BITS(mac_isr, MAC_ISR, TSIS)) {</div><div class='ctx'> 			mac_tssr = XGMAC_IOREAD(pdata, MAC_TSSR);</div><div class='ctx'> </div><div class='add'>+			netif_dbg(pdata, intr, pdata-&gt;netdev,</div><div class='add'>+				  "MAC_TSSR=%#010x\n", mac_tssr);</div><div class='add'>+</div><div class='ctx'> 			if (XGMAC_GET_BITS(mac_tssr, MAC_TSSR, TXTSC)) {</div><div class='ctx'> 				/* Read Tx Timestamp to clear interrupt */</div><div class='ctx'> 				pdata-&gt;tx_tstamp =</div><div class='del'>-					hw_if-&gt;get_tx_tstamp(pdata);</div><div class='del'>-				schedule_work(&amp;pdata-&gt;tx_tstamp_work);</div><div class='add'>+					xgbe_get_tx_tstamp(pdata);</div><div class='add'>+				queue_work(pdata-&gt;dev_workqueue,</div><div class='add'>+					   &amp;pdata-&gt;tx_tstamp_work);</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		if (XGMAC_GET_BITS(mac_isr, MAC_ISR, SMI)) {</div><div class='add'>+			mac_mdioisr = XGMAC_IOREAD(pdata, MAC_MDIOISR);</div><div class='add'>+</div><div class='add'>+			netif_dbg(pdata, intr, pdata-&gt;netdev,</div><div class='add'>+				  "MAC_MDIOISR=%#010x\n", mac_mdioisr);</div><div class='add'>+</div><div class='add'>+			if (XGMAC_GET_BITS(mac_mdioisr, MAC_MDIOISR,</div><div class='add'>+					   SNGLCOMPINT))</div><div class='add'>+				complete(&amp;pdata-&gt;mdio_complete);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> isr_done:</div><div class='add'>+	/* If there is not a separate AN irq, handle it here */</div><div class='add'>+	if (pdata-&gt;dev_irq == pdata-&gt;an_irq)</div><div class='add'>+		pdata-&gt;phy_if.an_isr(pdata);</div><div class='add'>+</div><div class='add'>+	/* If there is not a separate ECC irq, handle it here */</div><div class='add'>+	if (pdata-&gt;vdata-&gt;ecc_support &amp;&amp; (pdata-&gt;dev_irq == pdata-&gt;ecc_irq))</div><div class='add'>+		xgbe_ecc_isr_bh_work(&amp;pdata-&gt;ecc_bh_work);</div><div class='add'>+</div><div class='add'>+	/* If there is not a separate I2C irq, handle it here */</div><div class='add'>+	if (pdata-&gt;vdata-&gt;i2c_support &amp;&amp; (pdata-&gt;dev_irq == pdata-&gt;i2c_irq))</div><div class='add'>+		pdata-&gt;i2c_if.i2c_isr(pdata);</div><div class='add'>+</div><div class='add'>+	/* Reissue interrupt if status is not clear */</div><div class='add'>+	if (pdata-&gt;vdata-&gt;irq_reissue_support) {</div><div class='add'>+		unsigned int reissue_mask;</div><div class='add'>+</div><div class='add'>+		reissue_mask = 1 &lt;&lt; 0;</div><div class='add'>+		if (!pdata-&gt;per_channel_irq)</div><div class='add'>+			reissue_mask |= 0xffff &lt;&lt; 4;</div><div class='add'>+</div><div class='add'>+		XP_IOWRITE(pdata, XP_INT_REISSUE_EN, reissue_mask);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t xgbe_isr(int irq, void *data)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = data;</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;isr_as_bh_work)</div><div class='add'>+		queue_work(system_bh_wq, &amp;pdata-&gt;dev_bh_work);</div><div class='add'>+	else</div><div class='add'>+		xgbe_isr_bh_work(&amp;pdata-&gt;dev_bh_work);</div><div class='add'>+</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static irqreturn_t xgbe_dma_isr(int irq, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgbe_channel *channel = data;</div><div class='add'>+	struct xgbe_prv_data *pdata = channel-&gt;pdata;</div><div class='add'>+	unsigned int dma_status;</div><div class='ctx'> </div><div class='ctx'> 	/* Per channel DMA interrupts are enabled, so we use the per</div><div class='ctx'> 	 * channel napi structure and not the private data napi structure</div><div class='ctx'> 	 */</div><div class='ctx'> 	if (napi_schedule_prep(&amp;channel-&gt;napi)) {</div><div class='ctx'> 		/* Disable Tx and Rx interrupts */</div><div class='del'>-		disable_irq_nosync(channel-&gt;dma_irq);</div><div class='add'>+		if (pdata-&gt;channel_irq_mode)</div><div class='add'>+			xgbe_disable_rx_tx_int(pdata, channel);</div><div class='add'>+		else</div><div class='add'>+			disable_irq_nosync(channel-&gt;dma_irq);</div><div class='ctx'> </div><div class='ctx'> 		/* Turn on polling */</div><div class='del'>-		__napi_schedule(&amp;channel-&gt;napi);</div><div class='add'>+		__napi_schedule_irqoff(&amp;channel-&gt;napi);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Clear Tx/Rx signals */</div><div class='add'>+	dma_status = 0;</div><div class='add'>+	XGMAC_SET_BITS(dma_status, DMA_CH_SR, TI, 1);</div><div class='add'>+	XGMAC_SET_BITS(dma_status, DMA_CH_SR, RI, 1);</div><div class='add'>+	XGMAC_DMA_IOWRITE(channel, DMA_CH_SR, dma_status);</div><div class='add'>+</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xgbe_tx_timer(unsigned long data)</div><div class='add'>+static void xgbe_tx_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct xgbe_channel *channel = (struct xgbe_channel *)data;</div><div class='add'>+	struct xgbe_channel *channel = timer_container_of(channel, t,</div><div class='add'>+							  tx_timer);</div><div class='ctx'> 	struct xgbe_prv_data *pdata = channel-&gt;pdata;</div><div class='ctx'> 	struct napi_struct *napi;</div><div class='ctx'> </div><div class='hunk'>@@ -424,7 +577,10 @@ static void xgbe_tx_timer(unsigned long data)</div><div class='ctx'> 	if (napi_schedule_prep(napi)) {</div><div class='ctx'> 		/* Disable Tx and Rx interrupts */</div><div class='ctx'> 		if (pdata-&gt;per_channel_irq)</div><div class='del'>-			disable_irq_nosync(channel-&gt;dma_irq);</div><div class='add'>+			if (pdata-&gt;channel_irq_mode)</div><div class='add'>+				xgbe_disable_rx_tx_int(pdata, channel);</div><div class='add'>+			else</div><div class='add'>+				disable_irq_nosync(channel-&gt;dma_irq);</div><div class='ctx'> 		else</div><div class='ctx'> 			xgbe_disable_rx_tx_ints(pdata);</div><div class='ctx'> </div><div class='hunk'>@@ -446,13 +602,28 @@ static void xgbe_service(struct work_struct *work)</div><div class='ctx'> 	pdata-&gt;phy_if.phy_status(pdata);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xgbe_service_timer(unsigned long data)</div><div class='add'>+static void xgbe_service_timer(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct xgbe_prv_data *pdata = (struct xgbe_prv_data *)data;</div><div class='add'>+	struct xgbe_prv_data *pdata = timer_container_of(pdata, t,</div><div class='add'>+							 service_timer);</div><div class='add'>+	struct xgbe_channel *channel;</div><div class='add'>+	unsigned int i;</div><div class='ctx'> </div><div class='del'>-	schedule_work(&amp;pdata-&gt;service_work);</div><div class='add'>+	queue_work(pdata-&gt;dev_workqueue, &amp;pdata-&gt;service_work);</div><div class='ctx'> </div><div class='ctx'> 	mod_timer(&amp;pdata-&gt;service_timer, jiffies + HZ);</div><div class='add'>+</div><div class='add'>+	if (!pdata-&gt;tx_usecs)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;channel_count; i++) {</div><div class='add'>+		channel = pdata-&gt;channel[i];</div><div class='add'>+		if (!channel-&gt;tx_ring || channel-&gt;tx_timer_active)</div><div class='add'>+			break;</div><div class='add'>+		channel-&gt;tx_timer_active = 1;</div><div class='add'>+		mod_timer(&amp;channel-&gt;tx_timer,</div><div class='add'>+			  jiffies + usecs_to_jiffies(pdata-&gt;tx_usecs));</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgbe_init_timers(struct xgbe_prv_data *pdata)</div><div class='hunk'>@@ -460,16 +631,14 @@ static void xgbe_init_timers(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	struct xgbe_channel *channel;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='del'>-	setup_timer(&amp;pdata-&gt;service_timer, xgbe_service_timer,</div><div class='del'>-		    (unsigned long)pdata);</div><div class='add'>+	timer_setup(&amp;pdata-&gt;service_timer, xgbe_service_timer, 0);</div><div class='ctx'> </div><div class='del'>-	channel = pdata-&gt;channel;</div><div class='del'>-	for (i = 0; i &lt; pdata-&gt;channel_count; i++, channel++) {</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;channel_count; i++) {</div><div class='add'>+		channel = pdata-&gt;channel[i];</div><div class='ctx'> 		if (!channel-&gt;tx_ring)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		setup_timer(&amp;channel-&gt;tx_timer, xgbe_tx_timer,</div><div class='del'>-			    (unsigned long)channel);</div><div class='add'>+		timer_setup(&amp;channel-&gt;tx_timer, xgbe_tx_timer, 0);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -483,14 +652,16 @@ static void xgbe_stop_timers(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	struct xgbe_channel *channel;</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='del'>-	del_timer_sync(&amp;pdata-&gt;service_timer);</div><div class='add'>+	timer_delete_sync(&amp;pdata-&gt;service_timer);</div><div class='ctx'> </div><div class='del'>-	channel = pdata-&gt;channel;</div><div class='del'>-	for (i = 0; i &lt; pdata-&gt;channel_count; i++, channel++) {</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;channel_count; i++) {</div><div class='add'>+		channel = pdata-&gt;channel[i];</div><div class='ctx'> 		if (!channel-&gt;tx_ring)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='del'>-		del_timer_sync(&amp;channel-&gt;tx_timer);</div><div class='add'>+		/* Deactivate the Tx timer */</div><div class='add'>+		timer_delete_sync(&amp;channel-&gt;tx_timer);</div><div class='add'>+		channel-&gt;tx_timer_active = 0;</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -499,8 +670,6 @@ void xgbe_get_all_hw_features(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	unsigned int mac_hfr0, mac_hfr1, mac_hfr2;</div><div class='ctx'> 	struct xgbe_hw_features *hw_feat = &amp;pdata-&gt;hw_feat;</div><div class='ctx'> </div><div class='del'>-	DBGPR("--&gt;xgbe_get_all_hw_features\n");</div><div class='del'>-</div><div class='ctx'> 	mac_hfr0 = XGMAC_IOREAD(pdata, MAC_HWF0R);</div><div class='ctx'> 	mac_hfr1 = XGMAC_IOREAD(pdata, MAC_HWF1R);</div><div class='ctx'> 	mac_hfr2 = XGMAC_IOREAD(pdata, MAC_HWF2R);</div><div class='hunk'>@@ -525,6 +694,7 @@ void xgbe_get_all_hw_features(struct xgbe_prv_data *pdata)</div><div class='ctx'> 					      ADDMACADRSEL);</div><div class='ctx'> 	hw_feat-&gt;ts_src      = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, TSSTSSEL);</div><div class='ctx'> 	hw_feat-&gt;sa_vlan_ins = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, SAVLANINS);</div><div class='add'>+	hw_feat-&gt;vxn         = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, VXN);</div><div class='ctx'> </div><div class='ctx'> 	/* Hardware feature register 1 */</div><div class='ctx'> 	hw_feat-&gt;rx_fifo_size  = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R,</div><div class='hunk'>@@ -552,6 +722,21 @@ void xgbe_get_all_hw_features(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	hw_feat-&gt;pps_out_num  = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, PPSOUTNUM);</div><div class='ctx'> 	hw_feat-&gt;aux_snap_num = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, AUXSNAPNUM);</div><div class='ctx'> </div><div class='add'>+	/* Sanity check and warn if hardware reports more than supported */</div><div class='add'>+	if (hw_feat-&gt;pps_out_num &gt; XGBE_MAX_PPS_OUT) {</div><div class='add'>+		dev_warn(pdata-&gt;dev,</div><div class='add'>+			 "Hardware reports %u PPS outputs, limiting to %u\n",</div><div class='add'>+			 hw_feat-&gt;pps_out_num, XGBE_MAX_PPS_OUT);</div><div class='add'>+		hw_feat-&gt;pps_out_num = XGBE_MAX_PPS_OUT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (hw_feat-&gt;aux_snap_num &gt; XGBE_MAX_AUX_SNAP) {</div><div class='add'>+		dev_warn(pdata-&gt;dev,</div><div class='add'>+			 "Hardware reports %u aux snapshot inputs, limiting to %u\n",</div><div class='add'>+			 hw_feat-&gt;aux_snap_num, XGBE_MAX_AUX_SNAP);</div><div class='add'>+		hw_feat-&gt;aux_snap_num = XGBE_MAX_AUX_SNAP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Translate the Hash Table size into actual number */</div><div class='ctx'> 	switch (hw_feat-&gt;hash_table_size) {</div><div class='ctx'> 	case 0:</div><div class='hunk'>@@ -591,7 +776,123 @@ void xgbe_get_all_hw_features(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	hw_feat-&gt;tx_ch_cnt++;</div><div class='ctx'> 	hw_feat-&gt;tc_cnt++;</div><div class='ctx'> </div><div class='del'>-	DBGPR("&lt;--xgbe_get_all_hw_features\n");</div><div class='add'>+	/* Translate the fifo sizes into actual numbers */</div><div class='add'>+	hw_feat-&gt;rx_fifo_size = 1 &lt;&lt; (hw_feat-&gt;rx_fifo_size + 7);</div><div class='add'>+	hw_feat-&gt;tx_fifo_size = 1 &lt;&lt; (hw_feat-&gt;tx_fifo_size + 7);</div><div class='add'>+</div><div class='add'>+	if (netif_msg_probe(pdata)) {</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "Hardware features:\n");</div><div class='add'>+</div><div class='add'>+		/* Hardware feature register 0 */</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "  1GbE support              : %s\n",</div><div class='add'>+			hw_feat-&gt;gmii ? "yes" : "no");</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "  VLAN hash filter          : %s\n",</div><div class='add'>+			hw_feat-&gt;vlhash ? "yes" : "no");</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "  MDIO interface            : %s\n",</div><div class='add'>+			hw_feat-&gt;sma ? "yes" : "no");</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "  Wake-up packet support    : %s\n",</div><div class='add'>+			hw_feat-&gt;rwk ? "yes" : "no");</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "  Magic packet support      : %s\n",</div><div class='add'>+			hw_feat-&gt;mgk ? "yes" : "no");</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "  Management counters       : %s\n",</div><div class='add'>+			hw_feat-&gt;mmc ? "yes" : "no");</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "  ARP offload               : %s\n",</div><div class='add'>+			hw_feat-&gt;aoe ? "yes" : "no");</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "  IEEE 1588-2008 Timestamp  : %s\n",</div><div class='add'>+			hw_feat-&gt;ts ? "yes" : "no");</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "  Energy Efficient Ethernet : %s\n",</div><div class='add'>+			hw_feat-&gt;eee ? "yes" : "no");</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "  TX checksum offload       : %s\n",</div><div class='add'>+			hw_feat-&gt;tx_coe ? "yes" : "no");</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "  RX checksum offload       : %s\n",</div><div class='add'>+			hw_feat-&gt;rx_coe ? "yes" : "no");</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "  Additional MAC addresses  : %u\n",</div><div class='add'>+			hw_feat-&gt;addn_mac);</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "  Timestamp source          : %s\n",</div><div class='add'>+			(hw_feat-&gt;ts_src == 1) ? "internal" :</div><div class='add'>+			(hw_feat-&gt;ts_src == 2) ? "external" :</div><div class='add'>+			(hw_feat-&gt;ts_src == 3) ? "internal/external" : "n/a");</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "  SA/VLAN insertion         : %s\n",</div><div class='add'>+			hw_feat-&gt;sa_vlan_ins ? "yes" : "no");</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "  VXLAN/NVGRE support       : %s\n",</div><div class='add'>+			hw_feat-&gt;vxn ? "yes" : "no");</div><div class='add'>+</div><div class='add'>+		/* Hardware feature register 1 */</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "  RX fifo size              : %u\n",</div><div class='add'>+			hw_feat-&gt;rx_fifo_size);</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "  TX fifo size              : %u\n",</div><div class='add'>+			hw_feat-&gt;tx_fifo_size);</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "  IEEE 1588 high word       : %s\n",</div><div class='add'>+			hw_feat-&gt;adv_ts_hi ? "yes" : "no");</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "  DMA width                 : %u\n",</div><div class='add'>+			hw_feat-&gt;dma_width);</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "  Data Center Bridging      : %s\n",</div><div class='add'>+			hw_feat-&gt;dcb ? "yes" : "no");</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "  Split header              : %s\n",</div><div class='add'>+			hw_feat-&gt;sph ? "yes" : "no");</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "  TCP Segmentation Offload  : %s\n",</div><div class='add'>+			hw_feat-&gt;tso ? "yes" : "no");</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "  Debug memory interface    : %s\n",</div><div class='add'>+			hw_feat-&gt;dma_debug ? "yes" : "no");</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "  Receive Side Scaling      : %s\n",</div><div class='add'>+			hw_feat-&gt;rss ? "yes" : "no");</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "  Traffic Class count       : %u\n",</div><div class='add'>+			hw_feat-&gt;tc_cnt);</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "  Hash table size           : %u\n",</div><div class='add'>+			hw_feat-&gt;hash_table_size);</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "  L3/L4 Filters             : %u\n",</div><div class='add'>+			hw_feat-&gt;l3l4_filter_num);</div><div class='add'>+</div><div class='add'>+		/* Hardware feature register 2 */</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "  RX queue count            : %u\n",</div><div class='add'>+			hw_feat-&gt;rx_q_cnt);</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "  TX queue count            : %u\n",</div><div class='add'>+			hw_feat-&gt;tx_q_cnt);</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "  RX DMA channel count      : %u\n",</div><div class='add'>+			hw_feat-&gt;rx_ch_cnt);</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "  TX DMA channel count      : %u\n",</div><div class='add'>+			hw_feat-&gt;rx_ch_cnt);</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "  PPS outputs               : %u\n",</div><div class='add'>+			hw_feat-&gt;pps_out_num);</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "  Auxiliary snapshot inputs : %u\n",</div><div class='add'>+			hw_feat-&gt;aux_snap_num);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_vxlan_set_port(struct net_device *netdev, unsigned int table,</div><div class='add'>+			       unsigned int entry, struct udp_tunnel_info *ti)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	pdata-&gt;vxlan_port = be16_to_cpu(ti-&gt;port);</div><div class='add'>+	pdata-&gt;hw_if.enable_vxlan(pdata);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_vxlan_unset_port(struct net_device *netdev, unsigned int table,</div><div class='add'>+				 unsigned int entry, struct udp_tunnel_info *ti)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	pdata-&gt;hw_if.disable_vxlan(pdata);</div><div class='add'>+	pdata-&gt;vxlan_port = 0;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct udp_tunnel_nic_info xgbe_udp_tunnels = {</div><div class='add'>+	.set_port	= xgbe_vxlan_set_port,</div><div class='add'>+	.unset_port	= xgbe_vxlan_unset_port,</div><div class='add'>+	.flags		= UDP_TUNNEL_NIC_INFO_OPEN_ONLY,</div><div class='add'>+	.tables		= {</div><div class='add'>+		{ .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN, },</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct udp_tunnel_nic_info *xgbe_get_udp_tunnel_info(void)</div><div class='add'>+{</div><div class='add'>+	return &amp;xgbe_udp_tunnels;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgbe_napi_enable(struct xgbe_prv_data *pdata, unsigned int add)</div><div class='hunk'>@@ -600,18 +901,18 @@ static void xgbe_napi_enable(struct xgbe_prv_data *pdata, unsigned int add)</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 	if (pdata-&gt;per_channel_irq) {</div><div class='del'>-		channel = pdata-&gt;channel;</div><div class='del'>-		for (i = 0; i &lt; pdata-&gt;channel_count; i++, channel++) {</div><div class='add'>+		for (i = 0; i &lt; pdata-&gt;channel_count; i++) {</div><div class='add'>+			channel = pdata-&gt;channel[i];</div><div class='ctx'> 			if (add)</div><div class='ctx'> 				netif_napi_add(pdata-&gt;netdev, &amp;channel-&gt;napi,</div><div class='del'>-					       xgbe_one_poll, NAPI_POLL_WEIGHT);</div><div class='add'>+					       xgbe_one_poll);</div><div class='ctx'> </div><div class='ctx'> 			napi_enable(&amp;channel-&gt;napi);</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (add)</div><div class='ctx'> 			netif_napi_add(pdata-&gt;netdev, &amp;pdata-&gt;napi,</div><div class='del'>-				       xgbe_all_poll, NAPI_POLL_WEIGHT);</div><div class='add'>+				       xgbe_all_poll);</div><div class='ctx'> </div><div class='ctx'> 		napi_enable(&amp;pdata-&gt;napi);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -623,8 +924,8 @@ static void xgbe_napi_disable(struct xgbe_prv_data *pdata, unsigned int del)</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 	if (pdata-&gt;per_channel_irq) {</div><div class='del'>-		channel = pdata-&gt;channel;</div><div class='del'>-		for (i = 0; i &lt; pdata-&gt;channel_count; i++, channel++) {</div><div class='add'>+		for (i = 0; i &lt; pdata-&gt;channel_count; i++) {</div><div class='add'>+			channel = pdata-&gt;channel[i];</div><div class='ctx'> 			napi_disable(&amp;channel-&gt;napi);</div><div class='ctx'> </div><div class='ctx'> 			if (del)</div><div class='hunk'>@@ -645,19 +946,32 @@ static int xgbe_request_irqs(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='add'>+	INIT_WORK(&amp;pdata-&gt;dev_bh_work, xgbe_isr_bh_work);</div><div class='add'>+	INIT_WORK(&amp;pdata-&gt;ecc_bh_work, xgbe_ecc_isr_bh_work);</div><div class='add'>+</div><div class='ctx'> 	ret = devm_request_irq(pdata-&gt;dev, pdata-&gt;dev_irq, xgbe_isr, 0,</div><div class='del'>-			       netdev-&gt;name, pdata);</div><div class='add'>+			       netdev_name(netdev), pdata);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		netdev_alert(netdev, "error requesting irq %d\n",</div><div class='ctx'> 			     pdata-&gt;dev_irq);</div><div class='ctx'> 		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	if (pdata-&gt;vdata-&gt;ecc_support &amp;&amp; (pdata-&gt;dev_irq != pdata-&gt;ecc_irq)) {</div><div class='add'>+		ret = devm_request_irq(pdata-&gt;dev, pdata-&gt;ecc_irq, xgbe_ecc_isr,</div><div class='add'>+				       0, pdata-&gt;ecc_name, pdata);</div><div class='add'>+		if (ret) {</div><div class='add'>+			netdev_alert(netdev, "error requesting ecc irq %d\n",</div><div class='add'>+				     pdata-&gt;ecc_irq);</div><div class='add'>+			goto err_dev_irq;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (!pdata-&gt;per_channel_irq)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	channel = pdata-&gt;channel;</div><div class='del'>-	for (i = 0; i &lt; pdata-&gt;channel_count; i++, channel++) {</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;channel_count; i++) {</div><div class='add'>+		channel = pdata-&gt;channel[i];</div><div class='ctx'> 		snprintf(channel-&gt;dma_irq_name,</div><div class='ctx'> 			 sizeof(channel-&gt;dma_irq_name) - 1,</div><div class='ctx'> 			 "%s-TxRx-%u", netdev_name(netdev),</div><div class='hunk'>@@ -669,17 +983,28 @@ static int xgbe_request_irqs(struct xgbe_prv_data *pdata)</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			netdev_alert(netdev, "error requesting irq %d\n",</div><div class='ctx'> 				     channel-&gt;dma_irq);</div><div class='del'>-			goto err_irq;</div><div class='add'>+			goto err_dma_irq;</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		irq_set_affinity_hint(channel-&gt;dma_irq,</div><div class='add'>+				      &amp;channel-&gt;affinity_mask);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-err_irq:</div><div class='add'>+err_dma_irq:</div><div class='ctx'> 	/* Using an unsigned int, 'i' will go to UINT_MAX and exit */</div><div class='del'>-	for (i--, channel--; i &lt; pdata-&gt;channel_count; i--, channel--)</div><div class='add'>+	for (i--; i &lt; pdata-&gt;channel_count; i--) {</div><div class='add'>+		channel = pdata-&gt;channel[i];</div><div class='add'>+</div><div class='add'>+		irq_set_affinity_hint(channel-&gt;dma_irq, NULL);</div><div class='ctx'> 		devm_free_irq(pdata-&gt;dev, channel-&gt;dma_irq, channel);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;vdata-&gt;ecc_support &amp;&amp; (pdata-&gt;dev_irq != pdata-&gt;ecc_irq))</div><div class='add'>+		devm_free_irq(pdata-&gt;dev, pdata-&gt;ecc_irq, pdata);</div><div class='ctx'> </div><div class='add'>+err_dev_irq:</div><div class='ctx'> 	devm_free_irq(pdata-&gt;dev, pdata-&gt;dev_irq, pdata);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -692,12 +1017,21 @@ static void xgbe_free_irqs(struct xgbe_prv_data *pdata)</div><div class='ctx'> </div><div class='ctx'> 	devm_free_irq(pdata-&gt;dev, pdata-&gt;dev_irq, pdata);</div><div class='ctx'> </div><div class='add'>+	cancel_work_sync(&amp;pdata-&gt;dev_bh_work);</div><div class='add'>+	cancel_work_sync(&amp;pdata-&gt;ecc_bh_work);</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;vdata-&gt;ecc_support &amp;&amp; (pdata-&gt;dev_irq != pdata-&gt;ecc_irq))</div><div class='add'>+		devm_free_irq(pdata-&gt;dev, pdata-&gt;ecc_irq, pdata);</div><div class='add'>+</div><div class='ctx'> 	if (!pdata-&gt;per_channel_irq)</div><div class='ctx'> 		return;</div><div class='ctx'> </div><div class='del'>-	channel = pdata-&gt;channel;</div><div class='del'>-	for (i = 0; i &lt; pdata-&gt;channel_count; i++, channel++)</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;channel_count; i++) {</div><div class='add'>+		channel = pdata-&gt;channel[i];</div><div class='add'>+</div><div class='add'>+		irq_set_affinity_hint(channel-&gt;dma_irq, NULL);</div><div class='ctx'> 		devm_free_irq(pdata-&gt;dev, channel-&gt;dma_irq, channel);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void xgbe_init_tx_coalesce(struct xgbe_prv_data *pdata)</div><div class='hunk'>@@ -732,16 +1066,14 @@ void xgbe_init_rx_coalesce(struct xgbe_prv_data *pdata)</div><div class='ctx'> static void xgbe_free_tx_data(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgbe_desc_if *desc_if = &amp;pdata-&gt;desc_if;</div><div class='del'>-	struct xgbe_channel *channel;</div><div class='ctx'> 	struct xgbe_ring *ring;</div><div class='ctx'> 	struct xgbe_ring_data *rdata;</div><div class='ctx'> 	unsigned int i, j;</div><div class='ctx'> </div><div class='ctx'> 	DBGPR("--&gt;xgbe_free_tx_data\n");</div><div class='ctx'> </div><div class='del'>-	channel = pdata-&gt;channel;</div><div class='del'>-	for (i = 0; i &lt; pdata-&gt;channel_count; i++, channel++) {</div><div class='del'>-		ring = channel-&gt;tx_ring;</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;channel_count; i++) {</div><div class='add'>+		ring = pdata-&gt;channel[i]-&gt;tx_ring;</div><div class='ctx'> 		if (!ring)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='hunk'>@@ -757,16 +1089,14 @@ static void xgbe_free_tx_data(struct xgbe_prv_data *pdata)</div><div class='ctx'> static void xgbe_free_rx_data(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgbe_desc_if *desc_if = &amp;pdata-&gt;desc_if;</div><div class='del'>-	struct xgbe_channel *channel;</div><div class='ctx'> 	struct xgbe_ring *ring;</div><div class='ctx'> 	struct xgbe_ring_data *rdata;</div><div class='ctx'> 	unsigned int i, j;</div><div class='ctx'> </div><div class='ctx'> 	DBGPR("--&gt;xgbe_free_rx_data\n");</div><div class='ctx'> </div><div class='del'>-	channel = pdata-&gt;channel;</div><div class='del'>-	for (i = 0; i &lt; pdata-&gt;channel_count; i++, channel++) {</div><div class='del'>-		ring = channel-&gt;rx_ring;</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;channel_count; i++) {</div><div class='add'>+		ring = pdata-&gt;channel[i]-&gt;rx_ring;</div><div class='ctx'> 		if (!ring)</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='hunk'>@@ -779,9 +1109,8 @@ static void xgbe_free_rx_data(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	DBGPR("&lt;--xgbe_free_rx_data\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgbe_phy_init(struct xgbe_prv_data *pdata)</div><div class='add'>+static int xgbe_phy_reset(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	pdata-&gt;phy_link = -1;</div><div class='ctx'> 	pdata-&gt;phy_speed = SPEED_UNKNOWN;</div><div class='ctx'> </div><div class='ctx'> 	return pdata-&gt;phy_if.phy_reset(pdata);</div><div class='hunk'>@@ -864,20 +1193,87 @@ int xgbe_powerup(struct net_device *netdev, unsigned int caller)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void xgbe_free_memory(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_desc_if *desc_if = &amp;pdata-&gt;desc_if;</div><div class='add'>+</div><div class='add'>+	/* Free the ring descriptors and buffers */</div><div class='add'>+	desc_if-&gt;free_ring_resources(pdata);</div><div class='add'>+</div><div class='add'>+	/* Free the channel and ring structures */</div><div class='add'>+	xgbe_free_channels(pdata);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_alloc_memory(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_desc_if *desc_if = &amp;pdata-&gt;desc_if;</div><div class='add'>+	struct net_device *netdev = pdata-&gt;netdev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;new_tx_ring_count) {</div><div class='add'>+		pdata-&gt;tx_ring_count = pdata-&gt;new_tx_ring_count;</div><div class='add'>+		pdata-&gt;tx_q_count = pdata-&gt;tx_ring_count;</div><div class='add'>+		pdata-&gt;new_tx_ring_count = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;new_rx_ring_count) {</div><div class='add'>+		pdata-&gt;rx_ring_count = pdata-&gt;new_rx_ring_count;</div><div class='add'>+		pdata-&gt;new_rx_ring_count = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Calculate the Rx buffer size before allocating rings */</div><div class='add'>+	pdata-&gt;rx_buf_size = xgbe_calc_rx_buf_size(netdev, netdev-&gt;mtu);</div><div class='add'>+</div><div class='add'>+	/* Allocate the channel and ring structures */</div><div class='add'>+	ret = xgbe_alloc_channels(pdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Allocate the ring descriptors and buffers */</div><div class='add'>+	ret = desc_if-&gt;alloc_ring_resources(pdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_channels;</div><div class='add'>+</div><div class='add'>+	/* Initialize the service and Tx timers */</div><div class='add'>+	xgbe_init_timers(pdata);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_channels:</div><div class='add'>+	xgbe_free_memory(pdata);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int xgbe_start(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgbe_hw_if *hw_if = &amp;pdata-&gt;hw_if;</div><div class='ctx'> 	struct xgbe_phy_if *phy_if = &amp;pdata-&gt;phy_if;</div><div class='ctx'> 	struct net_device *netdev = pdata-&gt;netdev;</div><div class='add'>+	unsigned int i;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	DBGPR("--&gt;xgbe_start\n");</div><div class='add'>+	/* Set the number of queues */</div><div class='add'>+	ret = netif_set_real_num_tx_queues(netdev, pdata-&gt;tx_ring_count);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(netdev, "error setting real tx queue count\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	hw_if-&gt;init(pdata);</div><div class='add'>+	ret = netif_set_real_num_rx_queues(netdev, pdata-&gt;rx_ring_count);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(netdev, "error setting real rx queue count\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	ret = phy_if-&gt;phy_start(pdata);</div><div class='add'>+	/* Set RSS lookup table data for programming */</div><div class='add'>+	for (i = 0; i &lt; XGBE_RSS_MAX_TABLE_SIZE; i++)</div><div class='add'>+		XGMAC_SET_BITS(pdata-&gt;rss_table[i], MAC_RSSDR, DMCH,</div><div class='add'>+			       i % pdata-&gt;rx_ring_count);</div><div class='add'>+</div><div class='add'>+	ret = hw_if-&gt;init(pdata);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto err_phy;</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	xgbe_napi_enable(pdata, 1);</div><div class='ctx'> </div><div class='hunk'>@@ -885,24 +1281,39 @@ static int xgbe_start(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		goto err_napi;</div><div class='ctx'> </div><div class='add'>+	ret = phy_if-&gt;phy_start(pdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_irqs;</div><div class='add'>+</div><div class='ctx'> 	hw_if-&gt;enable_tx(pdata);</div><div class='ctx'> 	hw_if-&gt;enable_rx(pdata);</div><div class='ctx'> </div><div class='add'>+	udp_tunnel_nic_reset_ntf(netdev);</div><div class='add'>+</div><div class='add'>+	/* Reset the phy settings */</div><div class='add'>+	ret = xgbe_phy_reset(pdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_txrx;</div><div class='add'>+</div><div class='ctx'> 	netif_tx_start_all_queues(netdev);</div><div class='ctx'> </div><div class='ctx'> 	xgbe_start_timers(pdata);</div><div class='del'>-	schedule_work(&amp;pdata-&gt;service_work);</div><div class='add'>+	queue_work(pdata-&gt;dev_workqueue, &amp;pdata-&gt;service_work);</div><div class='ctx'> </div><div class='del'>-	DBGPR("&lt;--xgbe_start\n");</div><div class='add'>+	clear_bit(XGBE_STOPPED, &amp;pdata-&gt;dev_state);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='add'>+err_txrx:</div><div class='add'>+	hw_if-&gt;disable_rx(pdata);</div><div class='add'>+	hw_if-&gt;disable_tx(pdata);</div><div class='add'>+</div><div class='add'>+err_irqs:</div><div class='add'>+	xgbe_free_irqs(pdata);</div><div class='add'>+</div><div class='ctx'> err_napi:</div><div class='ctx'> 	xgbe_napi_disable(pdata, 1);</div><div class='ctx'> </div><div class='del'>-	phy_if-&gt;phy_stop(pdata);</div><div class='del'>-</div><div class='del'>-err_phy:</div><div class='ctx'> 	hw_if-&gt;exit(pdata);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='hunk'>@@ -919,24 +1330,30 @@ static void xgbe_stop(struct xgbe_prv_data *pdata)</div><div class='ctx'> </div><div class='ctx'> 	DBGPR("--&gt;xgbe_stop\n");</div><div class='ctx'> </div><div class='add'>+	if (test_bit(XGBE_STOPPED, &amp;pdata-&gt;dev_state))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	netif_tx_stop_all_queues(netdev);</div><div class='add'>+	netif_carrier_off(pdata-&gt;netdev);</div><div class='ctx'> </div><div class='ctx'> 	xgbe_stop_timers(pdata);</div><div class='ctx'> 	flush_workqueue(pdata-&gt;dev_workqueue);</div><div class='ctx'> </div><div class='add'>+	xgbe_vxlan_unset_port(netdev, 0, 0, NULL);</div><div class='add'>+</div><div class='ctx'> 	hw_if-&gt;disable_tx(pdata);</div><div class='ctx'> 	hw_if-&gt;disable_rx(pdata);</div><div class='ctx'> </div><div class='add'>+	phy_if-&gt;phy_stop(pdata);</div><div class='add'>+</div><div class='ctx'> 	xgbe_free_irqs(pdata);</div><div class='ctx'> </div><div class='ctx'> 	xgbe_napi_disable(pdata, 1);</div><div class='ctx'> </div><div class='del'>-	phy_if-&gt;phy_stop(pdata);</div><div class='del'>-</div><div class='ctx'> 	hw_if-&gt;exit(pdata);</div><div class='ctx'> </div><div class='del'>-	channel = pdata-&gt;channel;</div><div class='del'>-	for (i = 0; i &lt; pdata-&gt;channel_count; i++, channel++) {</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;channel_count; i++) {</div><div class='add'>+		channel = pdata-&gt;channel[i];</div><div class='ctx'> 		if (!channel-&gt;tx_ring)</div><div class='ctx'> 			continue;</div><div class='ctx'> </div><div class='hunk'>@@ -944,229 +1361,68 @@ static void xgbe_stop(struct xgbe_prv_data *pdata)</div><div class='ctx'> 		netdev_tx_reset_queue(txq);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	set_bit(XGBE_STOPPED, &amp;pdata-&gt;dev_state);</div><div class='add'>+</div><div class='ctx'> 	DBGPR("&lt;--xgbe_stop\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xgbe_restart_dev(struct xgbe_prv_data *pdata)</div><div class='add'>+static void xgbe_stopdev(struct work_struct *work)</div><div class='ctx'> {</div><div class='del'>-	DBGPR("--&gt;xgbe_restart_dev\n");</div><div class='add'>+	struct xgbe_prv_data *pdata = container_of(work,</div><div class='add'>+						   struct xgbe_prv_data,</div><div class='add'>+						   stopdev_work);</div><div class='ctx'> </div><div class='del'>-	/* If not running, "restart" will happen on open */</div><div class='del'>-	if (!netif_running(pdata-&gt;netdev))</div><div class='del'>-		return;</div><div class='add'>+	rtnl_lock();</div><div class='ctx'> </div><div class='ctx'> 	xgbe_stop(pdata);</div><div class='ctx'> </div><div class='ctx'> 	xgbe_free_tx_data(pdata);</div><div class='ctx'> 	xgbe_free_rx_data(pdata);</div><div class='ctx'> </div><div class='del'>-	xgbe_start(pdata);</div><div class='add'>+	rtnl_unlock();</div><div class='ctx'> </div><div class='del'>-	DBGPR("&lt;--xgbe_restart_dev\n");</div><div class='add'>+	netdev_alert(pdata-&gt;netdev, "device stopped\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xgbe_restart(struct work_struct *work)</div><div class='add'>+void xgbe_full_restart_dev(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	struct xgbe_prv_data *pdata = container_of(work,</div><div class='del'>-						   struct xgbe_prv_data,</div><div class='del'>-						   restart_work);</div><div class='add'>+	/* If not running, "restart" will happen on open */</div><div class='add'>+	if (!netif_running(pdata-&gt;netdev))</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	rtnl_lock();</div><div class='add'>+	xgbe_stop(pdata);</div><div class='ctx'> </div><div class='del'>-	xgbe_restart_dev(pdata);</div><div class='add'>+	xgbe_free_memory(pdata);</div><div class='add'>+	xgbe_alloc_memory(pdata);</div><div class='ctx'> </div><div class='del'>-	rtnl_unlock();</div><div class='add'>+	xgbe_start(pdata);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xgbe_tx_tstamp(struct work_struct *work)</div><div class='add'>+void xgbe_restart_dev(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	struct xgbe_prv_data *pdata = container_of(work,</div><div class='del'>-						   struct xgbe_prv_data,</div><div class='del'>-						   tx_tstamp_work);</div><div class='del'>-	struct skb_shared_hwtstamps hwtstamps;</div><div class='del'>-	u64 nsec;</div><div class='del'>-	unsigned long flags;</div><div class='del'>-</div><div class='del'>-	if (pdata-&gt;tx_tstamp) {</div><div class='del'>-		nsec = timecounter_cyc2time(&amp;pdata-&gt;tstamp_tc,</div><div class='del'>-					    pdata-&gt;tx_tstamp);</div><div class='del'>-</div><div class='del'>-		memset(&amp;hwtstamps, 0, sizeof(hwtstamps));</div><div class='del'>-		hwtstamps.hwtstamp = ns_to_ktime(nsec);</div><div class='del'>-		skb_tstamp_tx(pdata-&gt;tx_tstamp_skb, &amp;hwtstamps);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	dev_kfree_skb_any(pdata-&gt;tx_tstamp_skb);</div><div class='add'>+	/* If not running, "restart" will happen on open */</div><div class='add'>+	if (!netif_running(pdata-&gt;netdev))</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	spin_lock_irqsave(&amp;pdata-&gt;tstamp_lock, flags);</div><div class='del'>-	pdata-&gt;tx_tstamp_skb = NULL;</div><div class='del'>-	spin_unlock_irqrestore(&amp;pdata-&gt;tstamp_lock, flags);</div><div class='del'>-}</div><div class='add'>+	xgbe_stop(pdata);</div><div class='ctx'> </div><div class='del'>-static int xgbe_get_hwtstamp_settings(struct xgbe_prv_data *pdata,</div><div class='del'>-				      struct ifreq *ifreq)</div><div class='del'>-{</div><div class='del'>-	if (copy_to_user(ifreq-&gt;ifr_data, &amp;pdata-&gt;tstamp_config,</div><div class='del'>-			 sizeof(pdata-&gt;tstamp_config)))</div><div class='del'>-		return -EFAULT;</div><div class='add'>+	xgbe_free_tx_data(pdata);</div><div class='add'>+	xgbe_free_rx_data(pdata);</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	xgbe_start(pdata);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgbe_set_hwtstamp_settings(struct xgbe_prv_data *pdata,</div><div class='del'>-				      struct ifreq *ifreq)</div><div class='add'>+static void xgbe_restart(struct work_struct *work)</div><div class='ctx'> {</div><div class='del'>-	struct hwtstamp_config config;</div><div class='del'>-	unsigned int mac_tscr;</div><div class='del'>-</div><div class='del'>-	if (copy_from_user(&amp;config, ifreq-&gt;ifr_data, sizeof(config)))</div><div class='del'>-		return -EFAULT;</div><div class='del'>-</div><div class='del'>-	if (config.flags)</div><div class='del'>-		return -EINVAL;</div><div class='del'>-</div><div class='del'>-	mac_tscr = 0;</div><div class='del'>-</div><div class='del'>-	switch (config.tx_type) {</div><div class='del'>-	case HWTSTAMP_TX_OFF:</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case HWTSTAMP_TX_ON:</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		return -ERANGE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	switch (config.rx_filter) {</div><div class='del'>-	case HWTSTAMP_FILTER_NONE:</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case HWTSTAMP_FILTER_ALL:</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENALL, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	/* PTP v2, UDP, any kind of event packet */</div><div class='del'>-	case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);</div><div class='del'>-	/* PTP v1, UDP, any kind of event packet */</div><div class='del'>-	case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, SNAPTYPSEL, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	/* PTP v2, UDP, Sync packet */</div><div class='del'>-	case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);</div><div class='del'>-	/* PTP v1, UDP, Sync packet */</div><div class='del'>-	case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	/* PTP v2, UDP, Delay_req packet */</div><div class='del'>-	case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);</div><div class='del'>-	/* PTP v1, UDP, Delay_req packet */</div><div class='del'>-	case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSMSTRENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	/* 802.AS1, Ethernet, any kind of event packet */</div><div class='del'>-	case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, AV8021ASMEN, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, SNAPTYPSEL, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	/* 802.AS1, Ethernet, Sync packet */</div><div class='del'>-	case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, AV8021ASMEN, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	/* 802.AS1, Ethernet, Delay_req packet */</div><div class='del'>-	case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, AV8021ASMEN, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSMSTRENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	/* PTP v2/802.AS1, any layer, any kind of event packet */</div><div class='del'>-	case HWTSTAMP_FILTER_PTP_V2_EVENT:</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, SNAPTYPSEL, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	/* PTP v2/802.AS1, any layer, Sync packet */</div><div class='del'>-	case HWTSTAMP_FILTER_PTP_V2_SYNC:</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	/* PTP v2/802.AS1, any layer, Delay_req packet */</div><div class='del'>-	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSMSTRENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);</div><div class='del'>-		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		return -ERANGE;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pdata-&gt;hw_if.config_tstamp(pdata, mac_tscr);</div><div class='del'>-</div><div class='del'>-	memcpy(&amp;pdata-&gt;tstamp_config, &amp;config, sizeof(config));</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='add'>+	struct xgbe_prv_data *pdata = container_of(work,</div><div class='add'>+						   struct xgbe_prv_data,</div><div class='add'>+						   restart_work);</div><div class='ctx'> </div><div class='del'>-static void xgbe_prep_tx_tstamp(struct xgbe_prv_data *pdata,</div><div class='del'>-				struct sk_buff *skb,</div><div class='del'>-				struct xgbe_packet_data *packet)</div><div class='del'>-{</div><div class='del'>-	unsigned long flags;</div><div class='add'>+	rtnl_lock();</div><div class='ctx'> </div><div class='del'>-	if (XGMAC_GET_BITS(packet-&gt;attributes, TX_PACKET_ATTRIBUTES, PTP)) {</div><div class='del'>-		spin_lock_irqsave(&amp;pdata-&gt;tstamp_lock, flags);</div><div class='del'>-		if (pdata-&gt;tx_tstamp_skb) {</div><div class='del'>-			/* Another timestamp in progress, ignore this one */</div><div class='del'>-			XGMAC_SET_BITS(packet-&gt;attributes,</div><div class='del'>-				       TX_PACKET_ATTRIBUTES, PTP, 0);</div><div class='del'>-		} else {</div><div class='del'>-			pdata-&gt;tx_tstamp_skb = skb_get(skb);</div><div class='del'>-			skb_shinfo(skb)-&gt;tx_flags |= SKBTX_IN_PROGRESS;</div><div class='del'>-		}</div><div class='del'>-		spin_unlock_irqrestore(&amp;pdata-&gt;tstamp_lock, flags);</div><div class='del'>-	}</div><div class='add'>+	xgbe_restart_dev(pdata);</div><div class='ctx'> </div><div class='del'>-	if (!XGMAC_GET_BITS(packet-&gt;attributes, TX_PACKET_ATTRIBUTES, PTP))</div><div class='del'>-		skb_tx_timestamp(skb);</div><div class='add'>+	rtnl_unlock();</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgbe_prep_vlan(struct sk_buff *skb, struct xgbe_packet_data *packet)</div><div class='hunk'>@@ -1187,10 +1443,16 @@ static int xgbe_prep_tso(struct sk_buff *skb, struct xgbe_packet_data *packet)</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	packet-&gt;header_len = skb_transport_offset(skb) + tcp_hdrlen(skb);</div><div class='del'>-	packet-&gt;tcp_header_len = tcp_hdrlen(skb);</div><div class='add'>+	if (XGMAC_GET_BITS(packet-&gt;attributes, TX_PACKET_ATTRIBUTES, VXLAN)) {</div><div class='add'>+		packet-&gt;header_len = skb_inner_tcp_all_headers(skb);</div><div class='add'>+		packet-&gt;tcp_header_len = inner_tcp_hdrlen(skb);</div><div class='add'>+	} else {</div><div class='add'>+		packet-&gt;header_len = skb_tcp_all_headers(skb);</div><div class='add'>+		packet-&gt;tcp_header_len = tcp_hdrlen(skb);</div><div class='add'>+	}</div><div class='ctx'> 	packet-&gt;tcp_payload_len = skb-&gt;len - packet-&gt;header_len;</div><div class='ctx'> 	packet-&gt;mss = skb_shinfo(skb)-&gt;gso_size;</div><div class='add'>+</div><div class='ctx'> 	DBGPR("  packet-&gt;header_len=%u\n", packet-&gt;header_len);</div><div class='ctx'> 	DBGPR("  packet-&gt;tcp_header_len=%u, packet-&gt;tcp_payload_len=%u\n",</div><div class='ctx'> 	      packet-&gt;tcp_header_len, packet-&gt;tcp_payload_len);</div><div class='hunk'>@@ -1205,6 +1467,38 @@ static int xgbe_prep_tso(struct sk_buff *skb, struct xgbe_packet_data *packet)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool xgbe_is_vxlan(struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	if (!skb-&gt;encapsulation)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (skb-&gt;ip_summed != CHECKSUM_PARTIAL)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	switch (skb-&gt;protocol) {</div><div class='add'>+	case htons(ETH_P_IP):</div><div class='add'>+		if (ip_hdr(skb)-&gt;protocol != IPPROTO_UDP)</div><div class='add'>+			return false;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case htons(ETH_P_IPV6):</div><div class='add'>+		if (ipv6_hdr(skb)-&gt;nexthdr != IPPROTO_UDP)</div><div class='add'>+			return false;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (skb-&gt;inner_protocol_type != ENCAP_TYPE_ETHER ||</div><div class='add'>+	    skb-&gt;inner_protocol != htons(ETH_P_TEB) ||</div><div class='add'>+	    (skb_inner_mac_header(skb) - skb_transport_header(skb) !=</div><div class='add'>+	     sizeof(struct udphdr) + sizeof(struct vxlanhdr)))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int xgbe_is_tso(struct sk_buff *skb)</div><div class='ctx'> {</div><div class='ctx'> 	if (skb-&gt;ip_summed != CHECKSUM_PARTIAL)</div><div class='hunk'>@@ -1222,7 +1516,7 @@ static void xgbe_packet_info(struct xgbe_prv_data *pdata,</div><div class='ctx'> 			     struct xgbe_ring *ring, struct sk_buff *skb,</div><div class='ctx'> 			     struct xgbe_packet_data *packet)</div><div class='ctx'> {</div><div class='del'>-	struct skb_frag_struct *frag;</div><div class='add'>+	skb_frag_t *frag;</div><div class='ctx'> 	unsigned int context_desc;</div><div class='ctx'> 	unsigned int len;</div><div class='ctx'> 	unsigned int i;</div><div class='hunk'>@@ -1253,6 +1547,10 @@ static void xgbe_packet_info(struct xgbe_prv_data *pdata,</div><div class='ctx'> 		XGMAC_SET_BITS(packet-&gt;attributes, TX_PACKET_ATTRIBUTES,</div><div class='ctx'> 			       CSUM_ENABLE, 1);</div><div class='ctx'> </div><div class='add'>+	if (xgbe_is_vxlan(skb))</div><div class='add'>+		XGMAC_SET_BITS(packet-&gt;attributes, TX_PACKET_ATTRIBUTES,</div><div class='add'>+			       VXLAN, 1);</div><div class='add'>+</div><div class='ctx'> 	if (skb_vlan_tag_present(skb)) {</div><div class='ctx'> 		/* VLAN requires an extra descriptor if tag is different */</div><div class='ctx'> 		if (skb_vlan_tag_get(skb) != ring-&gt;tx.cur_vlan_ctag)</div><div class='hunk'>@@ -1288,21 +1586,39 @@ static void xgbe_packet_info(struct xgbe_prv_data *pdata,</div><div class='ctx'> static int xgbe_open(struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='del'>-	struct xgbe_desc_if *desc_if = &amp;pdata-&gt;desc_if;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	DBGPR("--&gt;xgbe_open\n");</div><div class='add'>+	/* Create the various names based on netdev name */</div><div class='add'>+	snprintf(pdata-&gt;an_name, sizeof(pdata-&gt;an_name) - 1, "%s-pcs",</div><div class='add'>+		 netdev_name(netdev));</div><div class='ctx'> </div><div class='del'>-	/* Initialize the phy */</div><div class='del'>-	ret = xgbe_phy_init(pdata);</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='add'>+	snprintf(pdata-&gt;ecc_name, sizeof(pdata-&gt;ecc_name) - 1, "%s-ecc",</div><div class='add'>+		 netdev_name(netdev));</div><div class='add'>+</div><div class='add'>+	snprintf(pdata-&gt;i2c_name, sizeof(pdata-&gt;i2c_name) - 1, "%s-i2c",</div><div class='add'>+		 netdev_name(netdev));</div><div class='add'>+</div><div class='add'>+	/* Create workqueues */</div><div class='add'>+	pdata-&gt;dev_workqueue =</div><div class='add'>+		create_singlethread_workqueue(netdev_name(netdev));</div><div class='add'>+	if (!pdata-&gt;dev_workqueue) {</div><div class='add'>+		netdev_err(netdev, "device workqueue creation failed\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pdata-&gt;an_workqueue =</div><div class='add'>+		create_singlethread_workqueue(pdata-&gt;an_name);</div><div class='add'>+	if (!pdata-&gt;an_workqueue) {</div><div class='add'>+		netdev_err(netdev, "phy workqueue creation failed\n");</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err_dev_wq;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Enable the clocks */</div><div class='ctx'> 	ret = clk_prepare_enable(pdata-&gt;sysclk);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		netdev_alert(netdev, "dma clk_prepare_enable failed\n");</div><div class='del'>-		return ret;</div><div class='add'>+		goto err_an_wq;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = clk_prepare_enable(pdata-&gt;ptpclk);</div><div class='hunk'>@@ -1311,42 +1627,28 @@ static int xgbe_open(struct net_device *netdev)</div><div class='ctx'> 		goto err_sysclk;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Calculate the Rx buffer size before allocating rings */</div><div class='del'>-	ret = xgbe_calc_rx_buf_size(netdev, netdev-&gt;mtu);</div><div class='del'>-	if (ret &lt; 0)</div><div class='del'>-		goto err_ptpclk;</div><div class='del'>-	pdata-&gt;rx_buf_size = ret;</div><div class='del'>-</div><div class='del'>-	/* Allocate the channel and ring structures */</div><div class='del'>-	ret = xgbe_alloc_channels(pdata);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto err_ptpclk;</div><div class='del'>-</div><div class='del'>-	/* Allocate the ring descriptors and buffers */</div><div class='del'>-	ret = desc_if-&gt;alloc_ring_resources(pdata);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto err_channels;</div><div class='del'>-</div><div class='ctx'> 	INIT_WORK(&amp;pdata-&gt;service_work, xgbe_service);</div><div class='ctx'> 	INIT_WORK(&amp;pdata-&gt;restart_work, xgbe_restart);</div><div class='add'>+	INIT_WORK(&amp;pdata-&gt;stopdev_work, xgbe_stopdev);</div><div class='ctx'> 	INIT_WORK(&amp;pdata-&gt;tx_tstamp_work, xgbe_tx_tstamp);</div><div class='del'>-	xgbe_init_timers(pdata);</div><div class='add'>+</div><div class='add'>+	/* Initialize PTP timestamping and clock. */</div><div class='add'>+	xgbe_init_ptp(pdata);</div><div class='add'>+</div><div class='add'>+	ret = xgbe_alloc_memory(pdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_ptpclk;</div><div class='ctx'> </div><div class='ctx'> 	ret = xgbe_start(pdata);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto err_rings;</div><div class='add'>+		goto err_mem;</div><div class='ctx'> </div><div class='ctx'> 	clear_bit(XGBE_DOWN, &amp;pdata-&gt;dev_state);</div><div class='ctx'> </div><div class='del'>-	DBGPR("&lt;--xgbe_open\n");</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='del'>-err_rings:</div><div class='del'>-	desc_if-&gt;free_ring_resources(pdata);</div><div class='del'>-</div><div class='del'>-err_channels:</div><div class='del'>-	xgbe_free_channels(pdata);</div><div class='add'>+err_mem:</div><div class='add'>+	xgbe_free_memory(pdata);</div><div class='ctx'> </div><div class='ctx'> err_ptpclk:</div><div class='ctx'> 	clk_disable_unprepare(pdata-&gt;ptpclk);</div><div class='hunk'>@@ -1354,37 +1656,38 @@ err_ptpclk:</div><div class='ctx'> err_sysclk:</div><div class='ctx'> 	clk_disable_unprepare(pdata-&gt;sysclk);</div><div class='ctx'> </div><div class='add'>+err_an_wq:</div><div class='add'>+	destroy_workqueue(pdata-&gt;an_workqueue);</div><div class='add'>+</div><div class='add'>+err_dev_wq:</div><div class='add'>+	destroy_workqueue(pdata-&gt;dev_workqueue);</div><div class='add'>+</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int xgbe_close(struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='del'>-	struct xgbe_desc_if *desc_if = &amp;pdata-&gt;desc_if;</div><div class='del'>-</div><div class='del'>-	DBGPR("--&gt;xgbe_close\n");</div><div class='ctx'> </div><div class='ctx'> 	/* Stop the device */</div><div class='ctx'> 	xgbe_stop(pdata);</div><div class='ctx'> </div><div class='del'>-	/* Free the ring descriptors and buffers */</div><div class='del'>-	desc_if-&gt;free_ring_resources(pdata);</div><div class='del'>-</div><div class='del'>-	/* Free the channel and ring structures */</div><div class='del'>-	xgbe_free_channels(pdata);</div><div class='add'>+	xgbe_free_memory(pdata);</div><div class='ctx'> </div><div class='ctx'> 	/* Disable the clocks */</div><div class='ctx'> 	clk_disable_unprepare(pdata-&gt;ptpclk);</div><div class='ctx'> 	clk_disable_unprepare(pdata-&gt;sysclk);</div><div class='ctx'> </div><div class='del'>-	set_bit(XGBE_DOWN, &amp;pdata-&gt;dev_state);</div><div class='add'>+	destroy_workqueue(pdata-&gt;an_workqueue);</div><div class='add'>+</div><div class='add'>+	destroy_workqueue(pdata-&gt;dev_workqueue);</div><div class='ctx'> </div><div class='del'>-	DBGPR("&lt;--xgbe_close\n");</div><div class='add'>+	set_bit(XGBE_DOWN, &amp;pdata-&gt;dev_state);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgbe_xmit(struct sk_buff *skb, struct net_device *netdev)</div><div class='add'>+static netdev_tx_t xgbe_xmit(struct sk_buff *skb, struct net_device *netdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='ctx'> 	struct xgbe_hw_if *hw_if = &amp;pdata-&gt;hw_if;</div><div class='hunk'>@@ -1393,11 +1696,11 @@ static int xgbe_xmit(struct sk_buff *skb, struct net_device *netdev)</div><div class='ctx'> 	struct xgbe_ring *ring;</div><div class='ctx'> 	struct xgbe_packet_data *packet;</div><div class='ctx'> 	struct netdev_queue *txq;</div><div class='del'>-	int ret;</div><div class='add'>+	netdev_tx_t ret;</div><div class='ctx'> </div><div class='ctx'> 	DBGPR("--&gt;xgbe_xmit: skb-&gt;len = %d\n", skb-&gt;len);</div><div class='ctx'> </div><div class='del'>-	channel = pdata-&gt;channel + skb-&gt;queue_mapping;</div><div class='add'>+	channel = pdata-&gt;channel[skb-&gt;queue_mapping];</div><div class='ctx'> 	txq = netdev_get_tx_queue(netdev, channel-&gt;queue_index);</div><div class='ctx'> 	ring = channel-&gt;tx_ring;</div><div class='ctx'> 	packet = &amp;ring-&gt;packet_data;</div><div class='hunk'>@@ -1477,7 +1780,7 @@ static int xgbe_set_mac_address(struct net_device *netdev, void *addr)</div><div class='ctx'> 	if (!is_valid_ether_addr(saddr-&gt;sa_data))</div><div class='ctx'> 		return -EADDRNOTAVAIL;</div><div class='ctx'> </div><div class='del'>-	memcpy(netdev-&gt;dev_addr, saddr-&gt;sa_data, netdev-&gt;addr_len);</div><div class='add'>+	eth_hw_addr_set(netdev, saddr-&gt;sa_data);</div><div class='ctx'> </div><div class='ctx'> 	hw_if-&gt;set_mac_address(pdata, netdev-&gt;dev_addr);</div><div class='ctx'> </div><div class='hunk'>@@ -1486,27 +1789,6 @@ static int xgbe_set_mac_address(struct net_device *netdev, void *addr)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgbe_ioctl(struct net_device *netdev, struct ifreq *ifreq, int cmd)</div><div class='del'>-{</div><div class='del'>-	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	switch (cmd) {</div><div class='del'>-	case SIOCGHWTSTAMP:</div><div class='del'>-		ret = xgbe_get_hwtstamp_settings(pdata, ifreq);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case SIOCSHWTSTAMP:</div><div class='del'>-		ret = xgbe_set_hwtstamp_settings(pdata, ifreq);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	default:</div><div class='del'>-		ret = -EOPNOTSUPP;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static int xgbe_change_mtu(struct net_device *netdev, int mtu)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='hunk'>@@ -1519,7 +1801,7 @@ static int xgbe_change_mtu(struct net_device *netdev, int mtu)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='ctx'> 	pdata-&gt;rx_buf_size = ret;</div><div class='del'>-	netdev-&gt;mtu = mtu;</div><div class='add'>+	WRITE_ONCE(netdev-&gt;mtu, mtu);</div><div class='ctx'> </div><div class='ctx'> 	xgbe_restart_dev(pdata);</div><div class='ctx'> </div><div class='hunk'>@@ -1528,7 +1810,7 @@ static int xgbe_change_mtu(struct net_device *netdev, int mtu)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xgbe_tx_timeout(struct net_device *netdev)</div><div class='add'>+static void xgbe_tx_timeout(struct net_device *netdev, unsigned int txqueue)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='ctx'> </div><div class='hunk'>@@ -1536,8 +1818,8 @@ static void xgbe_tx_timeout(struct net_device *netdev)</div><div class='ctx'> 	schedule_work(&amp;pdata-&gt;restart_work);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct rtnl_link_stats64 *xgbe_get_stats64(struct net_device *netdev,</div><div class='del'>-						  struct rtnl_link_stats64 *s)</div><div class='add'>+static void xgbe_get_stats64(struct net_device *netdev,</div><div class='add'>+			     struct rtnl_link_stats64 *s)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='ctx'> 	struct xgbe_mmc_stats *pstats = &amp;pdata-&gt;mmc_stats;</div><div class='hunk'>@@ -1563,8 +1845,6 @@ static struct rtnl_link_stats64 *xgbe_get_stats64(struct net_device *netdev,</div><div class='ctx'> 	s-&gt;tx_dropped = netdev-&gt;stats.tx_dropped;</div><div class='ctx'> </div><div class='ctx'> 	DBGPR("&lt;--%s\n", __func__);</div><div class='del'>-</div><div class='del'>-	return s;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int xgbe_vlan_rx_add_vid(struct net_device *netdev, __be16 proto,</div><div class='hunk'>@@ -1609,9 +1889,10 @@ static void xgbe_poll_controller(struct net_device *netdev)</div><div class='ctx'> 	DBGPR("--&gt;xgbe_poll_controller\n");</div><div class='ctx'> </div><div class='ctx'> 	if (pdata-&gt;per_channel_irq) {</div><div class='del'>-		channel = pdata-&gt;channel;</div><div class='del'>-		for (i = 0; i &lt; pdata-&gt;channel_count; i++, channel++)</div><div class='add'>+		for (i = 0; i &lt; pdata-&gt;channel_count; i++) {</div><div class='add'>+			channel = pdata-&gt;channel[i];</div><div class='ctx'> 			xgbe_dma_isr(channel-&gt;dma_irq, channel);</div><div class='add'>+		}</div><div class='ctx'> 	} else {</div><div class='ctx'> 		disable_irq(pdata-&gt;dev_irq);</div><div class='ctx'> 		xgbe_isr(pdata-&gt;dev_irq, pdata);</div><div class='hunk'>@@ -1622,32 +1903,69 @@ static void xgbe_poll_controller(struct net_device *netdev)</div><div class='ctx'> }</div><div class='ctx'> #endif /* End CONFIG_NET_POLL_CONTROLLER */</div><div class='ctx'> </div><div class='del'>-static int xgbe_setup_tc(struct net_device *netdev, u8 tc)</div><div class='add'>+static int xgbe_setup_tc(struct net_device *netdev, enum tc_setup_type type,</div><div class='add'>+			 void *type_data)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='del'>-	unsigned int offset, queue;</div><div class='del'>-	u8 i;</div><div class='add'>+	struct tc_mqprio_qopt *mqprio = type_data;</div><div class='add'>+	u8 tc;</div><div class='ctx'> </div><div class='del'>-	if (tc &amp;&amp; (tc != pdata-&gt;hw_feat.tc_cnt))</div><div class='add'>+	if (type != TC_SETUP_QDISC_MQPRIO)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	mqprio-&gt;hw = TC_MQPRIO_HW_OFFLOAD_TCS;</div><div class='add'>+	tc = mqprio-&gt;num_tc;</div><div class='add'>+</div><div class='add'>+	if (tc &gt; pdata-&gt;hw_feat.tc_cnt)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	if (tc) {</div><div class='del'>-		netdev_set_num_tc(netdev, tc);</div><div class='del'>-		for (i = 0, queue = 0, offset = 0; i &lt; tc; i++) {</div><div class='del'>-			while ((queue &lt; pdata-&gt;tx_q_count) &amp;&amp;</div><div class='del'>-			       (pdata-&gt;q2tc_map[queue] == i))</div><div class='del'>-				queue++;</div><div class='del'>-</div><div class='del'>-			netif_dbg(pdata, drv, netdev, "TC%u using TXq%u-%u\n",</div><div class='del'>-				  i, offset, queue - 1);</div><div class='del'>-			netdev_set_tc_queue(netdev, i, queue - offset, offset);</div><div class='del'>-			offset = queue;</div><div class='add'>+	pdata-&gt;num_tcs = tc;</div><div class='add'>+	pdata-&gt;hw_if.config_tc(pdata);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static netdev_features_t xgbe_fix_features(struct net_device *netdev,</div><div class='add'>+					   netdev_features_t features)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='add'>+	netdev_features_t vxlan_base;</div><div class='add'>+</div><div class='add'>+	vxlan_base = NETIF_F_GSO_UDP_TUNNEL | NETIF_F_RX_UDP_TUNNEL_PORT;</div><div class='add'>+</div><div class='add'>+	if (!pdata-&gt;hw_feat.vxn)</div><div class='add'>+		return features;</div><div class='add'>+</div><div class='add'>+	/* VXLAN CSUM requires VXLAN base */</div><div class='add'>+	if ((features &amp; NETIF_F_GSO_UDP_TUNNEL_CSUM) &amp;&amp;</div><div class='add'>+	    !(features &amp; NETIF_F_GSO_UDP_TUNNEL)) {</div><div class='add'>+		netdev_notice(netdev,</div><div class='add'>+			      "forcing tx udp tunnel support\n");</div><div class='add'>+		features |= NETIF_F_GSO_UDP_TUNNEL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Can't do one without doing the other */</div><div class='add'>+	if ((features &amp; vxlan_base) != vxlan_base) {</div><div class='add'>+		netdev_notice(netdev,</div><div class='add'>+			      "forcing both tx and rx udp tunnel support\n");</div><div class='add'>+		features |= vxlan_base;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (features &amp; (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM)) {</div><div class='add'>+		if (!(features &amp; NETIF_F_GSO_UDP_TUNNEL_CSUM)) {</div><div class='add'>+			netdev_notice(netdev,</div><div class='add'>+				      "forcing tx udp tunnel checksumming on\n");</div><div class='add'>+			features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;</div><div class='ctx'> 		}</div><div class='ctx'> 	} else {</div><div class='del'>-		netdev_reset_tc(netdev);</div><div class='add'>+		if (features &amp; NETIF_F_GSO_UDP_TUNNEL_CSUM) {</div><div class='add'>+			netdev_notice(netdev,</div><div class='add'>+				      "forcing tx udp tunnel checksumming off\n");</div><div class='add'>+			features &amp;= ~NETIF_F_GSO_UDP_TUNNEL_CSUM;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return features;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int xgbe_set_features(struct net_device *netdev,</div><div class='hunk'>@@ -1670,10 +1988,17 @@ static int xgbe_set_features(struct net_device *netdev,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	if ((features &amp; NETIF_F_RXCSUM) &amp;&amp; !rxcsum)</div><div class='add'>+	if ((features &amp; NETIF_F_RXCSUM) &amp;&amp; !rxcsum) {</div><div class='add'>+		hw_if-&gt;enable_sph(pdata);</div><div class='add'>+		hw_if-&gt;enable_vxlan(pdata);</div><div class='ctx'> 		hw_if-&gt;enable_rx_csum(pdata);</div><div class='del'>-	else if (!(features &amp; NETIF_F_RXCSUM) &amp;&amp; rxcsum)</div><div class='add'>+		schedule_work(&amp;pdata-&gt;restart_work);</div><div class='add'>+	} else if (!(features &amp; NETIF_F_RXCSUM) &amp;&amp; rxcsum) {</div><div class='add'>+		hw_if-&gt;disable_sph(pdata);</div><div class='add'>+		hw_if-&gt;disable_vxlan(pdata);</div><div class='ctx'> 		hw_if-&gt;disable_rx_csum(pdata);</div><div class='add'>+		schedule_work(&amp;pdata-&gt;restart_work);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if ((features &amp; NETIF_F_HW_VLAN_CTAG_RX) &amp;&amp; !rxvlan)</div><div class='ctx'> 		hw_if-&gt;enable_rx_vlan_stripping(pdata);</div><div class='hunk'>@@ -1692,6 +2017,16 @@ static int xgbe_set_features(struct net_device *netdev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static netdev_features_t xgbe_features_check(struct sk_buff *skb,</div><div class='add'>+					     struct net_device *netdev,</div><div class='add'>+					     netdev_features_t features)</div><div class='add'>+{</div><div class='add'>+	features = vlan_features_check(skb, features);</div><div class='add'>+	features = vxlan_features_check(skb, features);</div><div class='add'>+</div><div class='add'>+	return features;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct net_device_ops xgbe_netdev_ops = {</div><div class='ctx'> 	.ndo_open		= xgbe_open,</div><div class='ctx'> 	.ndo_stop		= xgbe_close,</div><div class='hunk'>@@ -1699,7 +2034,6 @@ static const struct net_device_ops xgbe_netdev_ops = {</div><div class='ctx'> 	.ndo_set_rx_mode	= xgbe_set_rx_mode,</div><div class='ctx'> 	.ndo_set_mac_address	= xgbe_set_mac_address,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='del'>-	.ndo_do_ioctl		= xgbe_ioctl,</div><div class='ctx'> 	.ndo_change_mtu		= xgbe_change_mtu,</div><div class='ctx'> 	.ndo_tx_timeout		= xgbe_tx_timeout,</div><div class='ctx'> 	.ndo_get_stats64	= xgbe_get_stats64,</div><div class='hunk'>@@ -1709,12 +2043,16 @@ static const struct net_device_ops xgbe_netdev_ops = {</div><div class='ctx'> 	.ndo_poll_controller	= xgbe_poll_controller,</div><div class='ctx'> #endif</div><div class='ctx'> 	.ndo_setup_tc		= xgbe_setup_tc,</div><div class='add'>+	.ndo_fix_features	= xgbe_fix_features,</div><div class='ctx'> 	.ndo_set_features	= xgbe_set_features,</div><div class='add'>+	.ndo_features_check	= xgbe_features_check,</div><div class='add'>+	.ndo_hwtstamp_get	= xgbe_get_hwtstamp_settings,</div><div class='add'>+	.ndo_hwtstamp_set	= xgbe_set_hwtstamp_settings,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct net_device_ops *xgbe_get_netdev_ops(void)</div><div class='add'>+const struct net_device_ops *xgbe_get_netdev_ops(void)</div><div class='ctx'> {</div><div class='del'>-	return (struct net_device_ops *)&amp;xgbe_netdev_ops;</div><div class='add'>+	return &amp;xgbe_netdev_ops;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgbe_rx_refresh(struct xgbe_channel *channel)</div><div class='hunk'>@@ -1756,13 +2094,12 @@ static struct sk_buff *xgbe_create_skb(struct xgbe_prv_data *pdata,</div><div class='ctx'> {</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	u8 *packet;</div><div class='del'>-	unsigned int copy_len;</div><div class='ctx'> </div><div class='ctx'> 	skb = napi_alloc_skb(napi, rdata-&gt;rx.hdr.dma_len);</div><div class='ctx'> 	if (!skb)</div><div class='ctx'> 		return NULL;</div><div class='ctx'> </div><div class='del'>-	/* Start with the header buffer which may contain just the header</div><div class='add'>+	/* Pull in the header buffer which may contain just the header</div><div class='ctx'> 	 * or the header plus data</div><div class='ctx'> 	 */</div><div class='ctx'> 	dma_sync_single_range_for_cpu(pdata-&gt;dev, rdata-&gt;rx.hdr.dma_base,</div><div class='hunk'>@@ -1771,30 +2108,49 @@ static struct sk_buff *xgbe_create_skb(struct xgbe_prv_data *pdata,</div><div class='ctx'> </div><div class='ctx'> 	packet = page_address(rdata-&gt;rx.hdr.pa.pages) +</div><div class='ctx'> 		 rdata-&gt;rx.hdr.pa.pages_offset;</div><div class='del'>-	copy_len = (rdata-&gt;rx.hdr_len) ? rdata-&gt;rx.hdr_len : len;</div><div class='del'>-	copy_len = min(rdata-&gt;rx.hdr.dma_len, copy_len);</div><div class='del'>-	skb_copy_to_linear_data(skb, packet, copy_len);</div><div class='del'>-	skb_put(skb, copy_len);</div><div class='del'>-</div><div class='del'>-	len -= copy_len;</div><div class='del'>-	if (len) {</div><div class='del'>-		/* Add the remaining data as a frag */</div><div class='del'>-		dma_sync_single_range_for_cpu(pdata-&gt;dev,</div><div class='del'>-					      rdata-&gt;rx.buf.dma_base,</div><div class='del'>-					      rdata-&gt;rx.buf.dma_off,</div><div class='del'>-					      rdata-&gt;rx.buf.dma_len,</div><div class='del'>-					      DMA_FROM_DEVICE);</div><div class='del'>-</div><div class='del'>-		skb_add_rx_frag(skb, skb_shinfo(skb)-&gt;nr_frags,</div><div class='del'>-				rdata-&gt;rx.buf.pa.pages,</div><div class='del'>-				rdata-&gt;rx.buf.pa.pages_offset,</div><div class='del'>-				len, rdata-&gt;rx.buf.dma_len);</div><div class='del'>-		rdata-&gt;rx.buf.pa.pages = NULL;</div><div class='del'>-	}</div><div class='add'>+	skb_copy_to_linear_data(skb, packet, len);</div><div class='add'>+	skb_put(skb, len);</div><div class='ctx'> </div><div class='ctx'> 	return skb;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static unsigned int xgbe_rx_buf1_len(struct xgbe_ring_data *rdata,</div><div class='add'>+				     struct xgbe_packet_data *packet)</div><div class='add'>+{</div><div class='add'>+	/* Always zero if not the first descriptor */</div><div class='add'>+	if (!XGMAC_GET_BITS(packet-&gt;attributes, RX_PACKET_ATTRIBUTES, FIRST))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* First descriptor with split header, return header length */</div><div class='add'>+	if (rdata-&gt;rx.hdr_len)</div><div class='add'>+		return rdata-&gt;rx.hdr_len;</div><div class='add'>+</div><div class='add'>+	/* First descriptor but not the last descriptor and no split header,</div><div class='add'>+	 * so the full buffer was used</div><div class='add'>+	 */</div><div class='add'>+	if (!XGMAC_GET_BITS(packet-&gt;attributes, RX_PACKET_ATTRIBUTES, LAST))</div><div class='add'>+		return rdata-&gt;rx.hdr.dma_len;</div><div class='add'>+</div><div class='add'>+	/* First descriptor and last descriptor and no split header, so</div><div class='add'>+	 * calculate how much of the buffer was used</div><div class='add'>+	 */</div><div class='add'>+	return min_t(unsigned int, rdata-&gt;rx.hdr.dma_len, rdata-&gt;rx.len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int xgbe_rx_buf2_len(struct xgbe_ring_data *rdata,</div><div class='add'>+				     struct xgbe_packet_data *packet,</div><div class='add'>+				     unsigned int len)</div><div class='add'>+{</div><div class='add'>+	/* Always the full buffer if not the last descriptor */</div><div class='add'>+	if (!XGMAC_GET_BITS(packet-&gt;attributes, RX_PACKET_ATTRIBUTES, LAST))</div><div class='add'>+		return rdata-&gt;rx.buf.dma_len;</div><div class='add'>+</div><div class='add'>+	/* Last descriptor so calculate how much of the buffer was used</div><div class='add'>+	 * for the last bit of data</div><div class='add'>+	 */</div><div class='add'>+	return rdata-&gt;rx.len - len;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int xgbe_tx_poll(struct xgbe_channel *channel)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgbe_prv_data *pdata = channel-&gt;pdata;</div><div class='hunk'>@@ -1807,6 +2163,7 @@ static int xgbe_tx_poll(struct xgbe_channel *channel)</div><div class='ctx'> 	struct netdev_queue *txq;</div><div class='ctx'> 	int processed = 0;</div><div class='ctx'> 	unsigned int tx_packets = 0, tx_bytes = 0;</div><div class='add'>+	unsigned int cur;</div><div class='ctx'> </div><div class='ctx'> 	DBGPR("--&gt;xgbe_tx_poll\n");</div><div class='ctx'> </div><div class='hunk'>@@ -1814,10 +2171,15 @@ static int xgbe_tx_poll(struct xgbe_channel *channel)</div><div class='ctx'> 	if (!ring)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='add'>+	cur = ring-&gt;cur;</div><div class='add'>+</div><div class='add'>+	/* Be sure we get ring-&gt;cur before accessing descriptor data */</div><div class='add'>+	smp_rmb();</div><div class='add'>+</div><div class='ctx'> 	txq = netdev_get_tx_queue(netdev, channel-&gt;queue_index);</div><div class='ctx'> </div><div class='ctx'> 	while ((processed &lt; XGBE_TX_DESC_MAX_PROC) &amp;&amp;</div><div class='del'>-	       (ring-&gt;dirty != ring-&gt;cur)) {</div><div class='add'>+	       (ring-&gt;dirty != cur)) {</div><div class='ctx'> 		rdata = XGBE_GET_DESC_DATA(ring, ring-&gt;dirty);</div><div class='ctx'> 		rdesc = rdata-&gt;rdesc;</div><div class='ctx'> </div><div class='hunk'>@@ -1871,8 +2233,8 @@ static int xgbe_rx_poll(struct xgbe_channel *channel, int budget)</div><div class='ctx'> 	struct napi_struct *napi;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	struct skb_shared_hwtstamps *hwtstamps;</div><div class='del'>-	unsigned int incomplete, error, context_next, context;</div><div class='del'>-	unsigned int len, rdesc_len, max_len;</div><div class='add'>+	unsigned int last, error, context_next, context;</div><div class='add'>+	unsigned int len, buf1_len, buf2_len, max_len;</div><div class='ctx'> 	unsigned int received = 0;</div><div class='ctx'> 	int packet_count = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -1882,7 +2244,7 @@ static int xgbe_rx_poll(struct xgbe_channel *channel, int budget)</div><div class='ctx'> 	if (!ring)</div><div class='ctx'> 		return 0;</div><div class='ctx'> </div><div class='del'>-	incomplete = 0;</div><div class='add'>+	last = 0;</div><div class='ctx'> 	context_next = 0;</div><div class='ctx'> </div><div class='ctx'> 	napi = (pdata-&gt;per_channel_irq) ? &amp;channel-&gt;napi : &amp;pdata-&gt;napi;</div><div class='hunk'>@@ -1916,9 +2278,8 @@ read_again:</div><div class='ctx'> 		received++;</div><div class='ctx'> 		ring-&gt;cur++;</div><div class='ctx'> </div><div class='del'>-		incomplete = XGMAC_GET_BITS(packet-&gt;attributes,</div><div class='del'>-					    RX_PACKET_ATTRIBUTES,</div><div class='del'>-					    INCOMPLETE);</div><div class='add'>+		last = XGMAC_GET_BITS(packet-&gt;attributes, RX_PACKET_ATTRIBUTES,</div><div class='add'>+				      LAST);</div><div class='ctx'> 		context_next = XGMAC_GET_BITS(packet-&gt;attributes,</div><div class='ctx'> 					      RX_PACKET_ATTRIBUTES,</div><div class='ctx'> 					      CONTEXT_NEXT);</div><div class='hunk'>@@ -1927,7 +2288,7 @@ read_again:</div><div class='ctx'> 					 CONTEXT);</div><div class='ctx'> </div><div class='ctx'> 		/* Earlier error, just drain the remaining data */</div><div class='del'>-		if ((incomplete || context_next) &amp;&amp; error)</div><div class='add'>+		if ((!last || context_next) &amp;&amp; error)</div><div class='ctx'> 			goto read_again;</div><div class='ctx'> </div><div class='ctx'> 		if (error || packet-&gt;errors) {</div><div class='hunk'>@@ -1939,16 +2300,30 @@ read_again:</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (!context) {</div><div class='del'>-			/* Length is cumulative, get this descriptor's length */</div><div class='del'>-			rdesc_len = rdata-&gt;rx.len - len;</div><div class='del'>-			len += rdesc_len;</div><div class='add'>+			/* Get the data length in the descriptor buffers */</div><div class='add'>+			buf1_len = xgbe_rx_buf1_len(rdata, packet);</div><div class='add'>+			len += buf1_len;</div><div class='add'>+			buf2_len = xgbe_rx_buf2_len(rdata, packet, len);</div><div class='add'>+			len += buf2_len;</div><div class='add'>+</div><div class='add'>+			if (buf2_len &gt; rdata-&gt;rx.buf.dma_len) {</div><div class='add'>+				/* Hardware inconsistency within the descriptors</div><div class='add'>+				 * that has resulted in a length underflow.</div><div class='add'>+				 */</div><div class='add'>+				error = 1;</div><div class='add'>+				goto skip_data;</div><div class='add'>+			}</div><div class='ctx'> </div><div class='del'>-			if (rdesc_len &amp;&amp; !skb) {</div><div class='add'>+			if (!skb) {</div><div class='ctx'> 				skb = xgbe_create_skb(pdata, napi, rdata,</div><div class='del'>-						      rdesc_len);</div><div class='del'>-				if (!skb)</div><div class='add'>+						      buf1_len);</div><div class='add'>+				if (!skb) {</div><div class='ctx'> 					error = 1;</div><div class='del'>-			} else if (rdesc_len) {</div><div class='add'>+					goto skip_data;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (buf2_len) {</div><div class='ctx'> 				dma_sync_single_range_for_cpu(pdata-&gt;dev,</div><div class='ctx'> 							rdata-&gt;rx.buf.dma_base,</div><div class='ctx'> 							rdata-&gt;rx.buf.dma_off,</div><div class='hunk'>@@ -1958,17 +2333,20 @@ read_again:</div><div class='ctx'> 				skb_add_rx_frag(skb, skb_shinfo(skb)-&gt;nr_frags,</div><div class='ctx'> 						rdata-&gt;rx.buf.pa.pages,</div><div class='ctx'> 						rdata-&gt;rx.buf.pa.pages_offset,</div><div class='del'>-						rdesc_len,</div><div class='add'>+						buf2_len,</div><div class='ctx'> 						rdata-&gt;rx.buf.dma_len);</div><div class='ctx'> 				rdata-&gt;rx.buf.pa.pages = NULL;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (incomplete || context_next)</div><div class='add'>+skip_data:</div><div class='add'>+		if (!last || context_next)</div><div class='ctx'> 			goto read_again;</div><div class='ctx'> </div><div class='del'>-		if (!skb)</div><div class='add'>+		if (!skb || error) {</div><div class='add'>+			dev_kfree_skb(skb);</div><div class='ctx'> 			goto next_packet;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> 		/* Be sure we don't exceed the configured MTU */</div><div class='ctx'> 		max_len = netdev-&gt;mtu + ETH_HLEN;</div><div class='hunk'>@@ -1992,18 +2370,23 @@ read_again:</div><div class='ctx'> 			skb-&gt;ip_summed = CHECKSUM_UNNECESSARY;</div><div class='ctx'> </div><div class='ctx'> 		if (XGMAC_GET_BITS(packet-&gt;attributes,</div><div class='add'>+				   RX_PACKET_ATTRIBUTES, TNP)) {</div><div class='add'>+			skb-&gt;encapsulation = 1;</div><div class='add'>+</div><div class='add'>+			if (XGMAC_GET_BITS(packet-&gt;attributes,</div><div class='add'>+					   RX_PACKET_ATTRIBUTES, TNPCSUM_DONE))</div><div class='add'>+				skb-&gt;csum_level = 1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (XGMAC_GET_BITS(packet-&gt;attributes,</div><div class='ctx'> 				   RX_PACKET_ATTRIBUTES, VLAN_CTAG))</div><div class='ctx'> 			__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),</div><div class='ctx'> 					       packet-&gt;vlan_ctag);</div><div class='ctx'> </div><div class='ctx'> 		if (XGMAC_GET_BITS(packet-&gt;attributes,</div><div class='ctx'> 				   RX_PACKET_ATTRIBUTES, RX_TSTAMP)) {</div><div class='del'>-			u64 nsec;</div><div class='del'>-</div><div class='del'>-			nsec = timecounter_cyc2time(&amp;pdata-&gt;tstamp_tc,</div><div class='del'>-						    packet-&gt;rx_tstamp);</div><div class='ctx'> 			hwtstamps = skb_hwtstamps(skb);</div><div class='del'>-			hwtstamps-&gt;hwtstamp = ns_to_ktime(nsec);</div><div class='add'>+			hwtstamps-&gt;hwtstamp = ns_to_ktime(packet-&gt;rx_tstamp);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (XGMAC_GET_BITS(packet-&gt;attributes,</div><div class='hunk'>@@ -2014,7 +2397,6 @@ read_again:</div><div class='ctx'> 		skb-&gt;dev = netdev;</div><div class='ctx'> 		skb-&gt;protocol = eth_type_trans(skb, netdev);</div><div class='ctx'> 		skb_record_rx_queue(skb, channel-&gt;queue_index);</div><div class='del'>-		skb_mark_napi_id(skb, napi);</div><div class='ctx'> </div><div class='ctx'> 		napi_gro_receive(napi, skb);</div><div class='ctx'> </div><div class='hunk'>@@ -2023,7 +2405,7 @@ next_packet:</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Check if we need to save state before leaving */</div><div class='del'>-	if (received &amp;&amp; (incomplete || context_next)) {</div><div class='add'>+	if (received &amp;&amp; (!last || context_next)) {</div><div class='ctx'> 		rdata = XGBE_GET_DESC_DATA(ring, ring-&gt;cur);</div><div class='ctx'> 		rdata-&gt;state_saved = 1;</div><div class='ctx'> 		rdata-&gt;state.skb = skb;</div><div class='hunk'>@@ -2040,6 +2422,7 @@ static int xgbe_one_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgbe_channel *channel = container_of(napi, struct xgbe_channel,</div><div class='ctx'> 						    napi);</div><div class='add'>+	struct xgbe_prv_data *pdata = channel-&gt;pdata;</div><div class='ctx'> 	int processed = 0;</div><div class='ctx'> </div><div class='ctx'> 	DBGPR("--&gt;xgbe_one_poll: budget=%d\n", budget);</div><div class='hunk'>@@ -2051,12 +2434,12 @@ static int xgbe_one_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 	processed = xgbe_rx_poll(channel, budget);</div><div class='ctx'> </div><div class='ctx'> 	/* If we processed everything, we are done */</div><div class='del'>-	if (processed &lt; budget) {</div><div class='del'>-		/* Turn off polling */</div><div class='del'>-		napi_complete(napi);</div><div class='del'>-</div><div class='add'>+	if ((processed &lt; budget) &amp;&amp; napi_complete_done(napi, processed)) {</div><div class='ctx'> 		/* Enable Tx and Rx interrupts */</div><div class='del'>-		enable_irq(channel-&gt;dma_irq);</div><div class='add'>+		if (pdata-&gt;channel_irq_mode)</div><div class='add'>+			xgbe_enable_rx_tx_int(pdata, channel);</div><div class='add'>+		else</div><div class='add'>+			enable_irq(channel-&gt;dma_irq);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	DBGPR("&lt;--xgbe_one_poll: received = %d\n", processed);</div><div class='hunk'>@@ -2080,8 +2463,9 @@ static int xgbe_all_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 	do {</div><div class='ctx'> 		last_processed = processed;</div><div class='ctx'> </div><div class='del'>-		channel = pdata-&gt;channel;</div><div class='del'>-		for (i = 0; i &lt; pdata-&gt;channel_count; i++, channel++) {</div><div class='add'>+		for (i = 0; i &lt; pdata-&gt;channel_count; i++) {</div><div class='add'>+			channel = pdata-&gt;channel[i];</div><div class='add'>+</div><div class='ctx'> 			/* Cleanup Tx ring first */</div><div class='ctx'> 			xgbe_tx_poll(channel);</div><div class='ctx'> </div><div class='hunk'>@@ -2093,10 +2477,7 @@ static int xgbe_all_poll(struct napi_struct *napi, int budget)</div><div class='ctx'> 	} while ((processed &lt; budget) &amp;&amp; (processed != last_processed));</div><div class='ctx'> </div><div class='ctx'> 	/* If we processed everything, we are done */</div><div class='del'>-	if (processed &lt; budget) {</div><div class='del'>-		/* Turn off polling */</div><div class='del'>-		napi_complete(napi);</div><div class='del'>-</div><div class='add'>+	if ((processed &lt; budget) &amp;&amp; napi_complete_done(napi, processed)) {</div><div class='ctx'> 		/* Enable Tx and Rx interrupts */</div><div class='ctx'> 		xgbe_enable_rx_tx_ints(pdata);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -2143,9 +2524,8 @@ void xgbe_dump_rx_desc(struct xgbe_prv_data *pdata, struct xgbe_ring *ring,</div><div class='ctx'> void xgbe_print_pkt(struct net_device *netdev, struct sk_buff *skb, bool tx_rx)</div><div class='ctx'> {</div><div class='ctx'> 	struct ethhdr *eth = (struct ethhdr *)skb-&gt;data;</div><div class='del'>-	unsigned char *buf = skb-&gt;data;</div><div class='ctx'> 	unsigned char buffer[128];</div><div class='del'>-	unsigned int i, j;</div><div class='add'>+	unsigned int i;</div><div class='ctx'> </div><div class='ctx'> 	netdev_dbg(netdev, "\n************** SKB dump ****************\n");</div><div class='ctx'> </div><div class='hunk'>@@ -2154,24 +2534,15 @@ void xgbe_print_pkt(struct net_device *netdev, struct sk_buff *skb, bool tx_rx)</div><div class='ctx'> </div><div class='ctx'> 	netdev_dbg(netdev, "Dst MAC addr: %pM\n", eth-&gt;h_dest);</div><div class='ctx'> 	netdev_dbg(netdev, "Src MAC addr: %pM\n", eth-&gt;h_source);</div><div class='del'>-	netdev_dbg(netdev, "Protocol: %#06hx\n", ntohs(eth-&gt;h_proto));</div><div class='del'>-</div><div class='del'>-	for (i = 0, j = 0; i &lt; skb-&gt;len;) {</div><div class='del'>-		j += snprintf(buffer + j, sizeof(buffer) - j, "%02hhx",</div><div class='del'>-			      buf[i++]);</div><div class='del'>-</div><div class='del'>-		if ((i % 32) == 0) {</div><div class='del'>-			netdev_dbg(netdev, "  %#06x: %s\n", i - 32, buffer);</div><div class='del'>-			j = 0;</div><div class='del'>-		} else if ((i % 16) == 0) {</div><div class='del'>-			buffer[j++] = ' ';</div><div class='del'>-			buffer[j++] = ' ';</div><div class='del'>-		} else if ((i % 4) == 0) {</div><div class='del'>-			buffer[j++] = ' ';</div><div class='del'>-		}</div><div class='add'>+	netdev_dbg(netdev, "Protocol: %#06x\n", ntohs(eth-&gt;h_proto));</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; skb-&gt;len; i += 32) {</div><div class='add'>+		unsigned int len = min(skb-&gt;len - i, 32U);</div><div class='add'>+</div><div class='add'>+		hex_dump_to_buffer(&amp;skb-&gt;data[i], len, 32, 1,</div><div class='add'>+				   buffer, sizeof(buffer), false);</div><div class='add'>+		netdev_dbg(netdev, "  %#06x: %s\n", i, buffer);</div><div class='ctx'> 	}</div><div class='del'>-	if (i % 32)</div><div class='del'>-		netdev_dbg(netdev, "  %#06x: %s\n", i - (i % 32), buffer);</div><div class='ctx'> </div><div class='ctx'> 	netdev_dbg(netdev, "\n************** SKB dump ****************\n");</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c b/drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c<br/>index 59e090e95c0e..0d19b09497a0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c</a></div><div class='hunk'>@@ -1,117 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='ctx'> /*</div><div class='del'>- * AMD 10Gb Ethernet driver</div><div class='del'>- *</div><div class='del'>- * This file is available to you under your choice of the following two</div><div class='del'>- * licenses:</div><div class='del'>- *</div><div class='del'>- * License 1: GPLv2</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014 Advanced Micro Devices, Inc.</div><div class='del'>- *</div><div class='del'>- * This file is free software; you may copy, redistribute and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation, either version 2 of the License, or (at</div><div class='del'>- * your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This file is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- * License 2: Modified BSD</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014 Advanced Micro Devices, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * Redistribution and use in source and binary forms, with or without</div><div class='del'>- * modification, are permitted provided that the following conditions are met:</div><div class='del'>- *     * Redistributions of source code must retain the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer.</div><div class='del'>- *     * Redistributions in binary form must reproduce the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer in the</div><div class='del'>- *       documentation and/or other materials provided with the distribution.</div><div class='del'>- *     * Neither the name of Advanced Micro Devices, Inc. nor the</div><div class='del'>- *       names of its contributors may be used to endorse or promote products</div><div class='del'>- *       derived from this software without specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"</div><div class='del'>- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE</div><div class='del'>- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE</div><div class='del'>- * ARE DISCLAIMED. IN NO EVENT SHALL &lt;COPYRIGHT HOLDER&gt; BE LIABLE FOR ANY</div><div class='del'>- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES</div><div class='del'>- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;</div><div class='del'>- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND</div><div class='del'>- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='del'>- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF</div><div class='del'>- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='hunk'>@@ -129,13 +20,13 @@ struct xgbe_stats {</div><div class='ctx'> </div><div class='ctx'> #define XGMAC_MMC_STAT(_string, _var)				\</div><div class='ctx'> 	{ _string,						\</div><div class='del'>-	  FIELD_SIZEOF(struct xgbe_mmc_stats, _var),		\</div><div class='add'>+	  sizeof_field(struct xgbe_mmc_stats, _var),		\</div><div class='ctx'> 	  offsetof(struct xgbe_prv_data, mmc_stats._var),	\</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> #define XGMAC_EXT_STAT(_string, _var)				\</div><div class='ctx'> 	{ _string,						\</div><div class='del'>-	  FIELD_SIZEOF(struct xgbe_ext_stats, _var),		\</div><div class='add'>+	  sizeof_field(struct xgbe_ext_stats, _var),		\</div><div class='ctx'> 	  offsetof(struct xgbe_prv_data, ext_stats._var),	\</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -146,6 +37,7 @@ static const struct xgbe_stats xgbe_gstring_stats[] = {</div><div class='ctx'> 	XGMAC_MMC_STAT("tx_broadcast_packets", txbroadcastframes_gb),</div><div class='ctx'> 	XGMAC_MMC_STAT("tx_multicast_packets", txmulticastframes_gb),</div><div class='ctx'> 	XGMAC_MMC_STAT("tx_vlan_packets", txvlanframes_g),</div><div class='add'>+	XGMAC_EXT_STAT("tx_vxlan_packets", tx_vxlan_packets),</div><div class='ctx'> 	XGMAC_EXT_STAT("tx_tso_packets", tx_tso_packets),</div><div class='ctx'> 	XGMAC_MMC_STAT("tx_64_byte_packets", tx64octets_gb),</div><div class='ctx'> 	XGMAC_MMC_STAT("tx_65_to_127_byte_packets", tx65to127octets_gb),</div><div class='hunk'>@@ -162,6 +54,7 @@ static const struct xgbe_stats xgbe_gstring_stats[] = {</div><div class='ctx'> 	XGMAC_MMC_STAT("rx_broadcast_packets", rxbroadcastframes_g),</div><div class='ctx'> 	XGMAC_MMC_STAT("rx_multicast_packets", rxmulticastframes_g),</div><div class='ctx'> 	XGMAC_MMC_STAT("rx_vlan_packets", rxvlanframes_gb),</div><div class='add'>+	XGMAC_EXT_STAT("rx_vxlan_packets", rx_vxlan_packets),</div><div class='ctx'> 	XGMAC_MMC_STAT("rx_64_byte_packets", rx64octets_gb),</div><div class='ctx'> 	XGMAC_MMC_STAT("rx_65_to_127_byte_packets", rx65to127octets_gb),</div><div class='ctx'> 	XGMAC_MMC_STAT("rx_128_to_255_byte_packets", rx128to255octets_gb),</div><div class='hunk'>@@ -177,29 +70,40 @@ static const struct xgbe_stats xgbe_gstring_stats[] = {</div><div class='ctx'> 	XGMAC_MMC_STAT("rx_out_of_range_errors", rxoutofrangetype),</div><div class='ctx'> 	XGMAC_MMC_STAT("rx_fifo_overflow_errors", rxfifooverflow),</div><div class='ctx'> 	XGMAC_MMC_STAT("rx_watchdog_errors", rxwatchdogerror),</div><div class='add'>+	XGMAC_EXT_STAT("rx_csum_errors", rx_csum_errors),</div><div class='add'>+	XGMAC_EXT_STAT("rx_vxlan_csum_errors", rx_vxlan_csum_errors),</div><div class='ctx'> 	XGMAC_MMC_STAT("rx_pause_frames", rxpauseframes),</div><div class='ctx'> 	XGMAC_EXT_STAT("rx_split_header_packets", rx_split_header_packets),</div><div class='add'>+	XGMAC_EXT_STAT("rx_buffer_unavailable", rx_buffer_unavailable),</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #define XGBE_STATS_COUNT	ARRAY_SIZE(xgbe_gstring_stats)</div><div class='ctx'> </div><div class='ctx'> static void xgbe_get_strings(struct net_device *netdev, u32 stringset, u8 *data)</div><div class='ctx'> {</div><div class='add'>+	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	DBGPR("--&gt;%s\n", __func__);</div><div class='del'>-</div><div class='ctx'> 	switch (stringset) {</div><div class='add'>+	case ETH_SS_TEST:</div><div class='add'>+		xgbe_selftest_get_strings(pdata, data);</div><div class='add'>+		break;</div><div class='ctx'> 	case ETH_SS_STATS:</div><div class='del'>-		for (i = 0; i &lt; XGBE_STATS_COUNT; i++) {</div><div class='del'>-			memcpy(data, xgbe_gstring_stats[i].stat_string,</div><div class='del'>-			       ETH_GSTRING_LEN);</div><div class='del'>-			data += ETH_GSTRING_LEN;</div><div class='add'>+		for (i = 0; i &lt; XGBE_STATS_COUNT; i++)</div><div class='add'>+			ethtool_puts(&amp;data, xgbe_gstring_stats[i].stat_string);</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; pdata-&gt;tx_ring_count; i++) {</div><div class='add'>+			ethtool_sprintf(&amp;data, "txq_%u_packets", i);</div><div class='add'>+			ethtool_sprintf(&amp;data, "txq_%u_bytes", i);</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; pdata-&gt;rx_ring_count; i++) {</div><div class='add'>+			ethtool_sprintf(&amp;data, "rxq_%u_packets", i);</div><div class='add'>+			ethtool_sprintf(&amp;data, "rxq_%u_bytes", i);</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	DBGPR("&lt;--%s\n", __func__);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgbe_get_ethtool_stats(struct net_device *netdev,</div><div class='hunk'>@@ -209,34 +113,40 @@ static void xgbe_get_ethtool_stats(struct net_device *netdev,</div><div class='ctx'> 	u8 *stat;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='del'>-	DBGPR("--&gt;%s\n", __func__);</div><div class='del'>-</div><div class='ctx'> 	pdata-&gt;hw_if.read_mmc_stats(pdata);</div><div class='ctx'> 	for (i = 0; i &lt; XGBE_STATS_COUNT; i++) {</div><div class='ctx'> 		stat = (u8 *)pdata + xgbe_gstring_stats[i].stat_offset;</div><div class='ctx'> 		*data++ = *(u64 *)stat;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	DBGPR("&lt;--%s\n", __func__);</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;tx_ring_count; i++) {</div><div class='add'>+		*data++ = pdata-&gt;ext_stats.txq_packets[i];</div><div class='add'>+		*data++ = pdata-&gt;ext_stats.txq_bytes[i];</div><div class='add'>+	}</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;rx_ring_count; i++) {</div><div class='add'>+		*data++ = pdata-&gt;ext_stats.rxq_packets[i];</div><div class='add'>+		*data++ = pdata-&gt;ext_stats.rxq_bytes[i];</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int xgbe_get_sset_count(struct net_device *netdev, int stringset)</div><div class='ctx'> {</div><div class='add'>+	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	DBGPR("--&gt;%s\n", __func__);</div><div class='del'>-</div><div class='ctx'> 	switch (stringset) {</div><div class='add'>+	case ETH_SS_TEST:</div><div class='add'>+		ret = xgbe_selftest_get_count(pdata);</div><div class='add'>+		break;</div><div class='ctx'> 	case ETH_SS_STATS:</div><div class='del'>-		ret = XGBE_STATS_COUNT;</div><div class='add'>+		ret = XGBE_STATS_COUNT +</div><div class='add'>+		      (pdata-&gt;tx_ring_count * 2) +</div><div class='add'>+		      (pdata-&gt;rx_ring_count * 2);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='ctx'> 		ret = -EOPNOTSUPP;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	DBGPR("&lt;--%s\n", __func__);</div><div class='del'>-</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -245,129 +155,142 @@ static void xgbe_get_pauseparam(struct net_device *netdev,</div><div class='ctx'> {</div><div class='ctx'> 	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='ctx'> </div><div class='del'>-	DBGPR("--&gt;xgbe_get_pauseparam\n");</div><div class='del'>-</div><div class='ctx'> 	pause-&gt;autoneg = pdata-&gt;phy.pause_autoneg;</div><div class='ctx'> 	pause-&gt;tx_pause = pdata-&gt;phy.tx_pause;</div><div class='ctx'> 	pause-&gt;rx_pause = pdata-&gt;phy.rx_pause;</div><div class='del'>-</div><div class='del'>-	DBGPR("&lt;--xgbe_get_pauseparam\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int xgbe_set_pauseparam(struct net_device *netdev,</div><div class='ctx'> 			       struct ethtool_pauseparam *pause)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='add'>+	struct ethtool_link_ksettings *lks = &amp;pdata-&gt;phy.lks;</div><div class='ctx'> 	int ret = 0;</div><div class='ctx'> </div><div class='del'>-	DBGPR("--&gt;xgbe_set_pauseparam\n");</div><div class='del'>-</div><div class='del'>-	DBGPR("  autoneg = %d, tx_pause = %d, rx_pause = %d\n",</div><div class='del'>-	      pause-&gt;autoneg, pause-&gt;tx_pause, pause-&gt;rx_pause);</div><div class='del'>-</div><div class='del'>-	if (pause-&gt;autoneg &amp;&amp; (pdata-&gt;phy.autoneg != AUTONEG_ENABLE))</div><div class='add'>+	if (pause-&gt;autoneg &amp;&amp; (pdata-&gt;phy.autoneg != AUTONEG_ENABLE)) {</div><div class='add'>+		netdev_err(netdev,</div><div class='add'>+			   "autoneg disabled, pause autoneg not available\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	pdata-&gt;phy.pause_autoneg = pause-&gt;autoneg;</div><div class='ctx'> 	pdata-&gt;phy.tx_pause = pause-&gt;tx_pause;</div><div class='ctx'> 	pdata-&gt;phy.rx_pause = pause-&gt;rx_pause;</div><div class='ctx'> </div><div class='del'>-	pdata-&gt;phy.advertising &amp;= ~ADVERTISED_Pause;</div><div class='del'>-	pdata-&gt;phy.advertising &amp;= ~ADVERTISED_Asym_Pause;</div><div class='add'>+	XGBE_CLR_ADV(lks, Pause);</div><div class='add'>+	XGBE_CLR_ADV(lks, Asym_Pause);</div><div class='ctx'> </div><div class='ctx'> 	if (pause-&gt;rx_pause) {</div><div class='del'>-		pdata-&gt;phy.advertising |= ADVERTISED_Pause;</div><div class='del'>-		pdata-&gt;phy.advertising |= ADVERTISED_Asym_Pause;</div><div class='add'>+		XGBE_SET_ADV(lks, Pause);</div><div class='add'>+		XGBE_SET_ADV(lks, Asym_Pause);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (pause-&gt;tx_pause)</div><div class='del'>-		pdata-&gt;phy.advertising ^= ADVERTISED_Asym_Pause;</div><div class='add'>+	if (pause-&gt;tx_pause) {</div><div class='add'>+		/* Equivalent to XOR of Asym_Pause */</div><div class='add'>+		if (XGBE_ADV(lks, Asym_Pause))</div><div class='add'>+			XGBE_CLR_ADV(lks, Asym_Pause);</div><div class='add'>+		else</div><div class='add'>+			XGBE_SET_ADV(lks, Asym_Pause);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (netif_running(netdev))</div><div class='ctx'> 		ret = pdata-&gt;phy_if.phy_config_aneg(pdata);</div><div class='ctx'> </div><div class='del'>-	DBGPR("&lt;--xgbe_set_pauseparam\n");</div><div class='del'>-</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgbe_get_settings(struct net_device *netdev,</div><div class='del'>-			     struct ethtool_cmd *cmd)</div><div class='add'>+static int xgbe_get_link_ksettings(struct net_device *netdev,</div><div class='add'>+				   struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='add'>+	struct ethtool_link_ksettings *lks = &amp;pdata-&gt;phy.lks;</div><div class='ctx'> </div><div class='del'>-	DBGPR("--&gt;xgbe_get_settings\n");</div><div class='del'>-</div><div class='del'>-	cmd-&gt;phy_address = pdata-&gt;phy.address;</div><div class='add'>+	cmd-&gt;base.phy_address = pdata-&gt;phy.address;</div><div class='ctx'> </div><div class='del'>-	cmd-&gt;supported = pdata-&gt;phy.supported;</div><div class='del'>-	cmd-&gt;advertising = pdata-&gt;phy.advertising;</div><div class='del'>-	cmd-&gt;lp_advertising = pdata-&gt;phy.lp_advertising;</div><div class='del'>-</div><div class='del'>-	cmd-&gt;autoneg = pdata-&gt;phy.autoneg;</div><div class='del'>-	ethtool_cmd_speed_set(cmd, pdata-&gt;phy.speed);</div><div class='del'>-	cmd-&gt;duplex = pdata-&gt;phy.duplex;</div><div class='add'>+	if (netif_carrier_ok(netdev)) {</div><div class='add'>+		cmd-&gt;base.speed = pdata-&gt;phy.speed;</div><div class='add'>+		cmd-&gt;base.duplex = pdata-&gt;phy.duplex;</div><div class='add'>+	} else {</div><div class='add'>+		cmd-&gt;base.speed = SPEED_UNKNOWN;</div><div class='add'>+		cmd-&gt;base.duplex = DUPLEX_UNKNOWN;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	cmd-&gt;port = PORT_NONE;</div><div class='del'>-	cmd-&gt;transceiver = XCVR_INTERNAL;</div><div class='add'>+	cmd-&gt;base.autoneg = pdata-&gt;phy.autoneg;</div><div class='add'>+	cmd-&gt;base.port = PORT_NONE;</div><div class='ctx'> </div><div class='del'>-	DBGPR("&lt;--xgbe_get_settings\n");</div><div class='add'>+	XGBE_LM_COPY(cmd, supported, lks, supported);</div><div class='add'>+	XGBE_LM_COPY(cmd, advertising, lks, advertising);</div><div class='add'>+	XGBE_LM_COPY(cmd, lp_advertising, lks, lp_advertising);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgbe_set_settings(struct net_device *netdev,</div><div class='del'>-			     struct ethtool_cmd *cmd)</div><div class='add'>+static int xgbe_set_link_ksettings(struct net_device *netdev,</div><div class='add'>+				   const struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='add'>+	struct ethtool_link_ksettings *lks = &amp;pdata-&gt;phy.lks;</div><div class='add'>+	__ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);</div><div class='ctx'> 	u32 speed;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	DBGPR("--&gt;xgbe_set_settings\n");</div><div class='add'>+	speed = cmd-&gt;base.speed;</div><div class='ctx'> </div><div class='del'>-	speed = ethtool_cmd_speed(cmd);</div><div class='del'>-</div><div class='del'>-	if (cmd-&gt;phy_address != pdata-&gt;phy.address)</div><div class='add'>+	if (cmd-&gt;base.phy_address != pdata-&gt;phy.address) {</div><div class='add'>+		netdev_err(netdev, "invalid phy address %hhu\n",</div><div class='add'>+			   cmd-&gt;base.phy_address);</div><div class='ctx'> 		return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if ((cmd-&gt;autoneg != AUTONEG_ENABLE) &amp;&amp;</div><div class='del'>-	    (cmd-&gt;autoneg != AUTONEG_DISABLE))</div><div class='add'>+	if ((cmd-&gt;base.autoneg != AUTONEG_ENABLE) &amp;&amp;</div><div class='add'>+	    (cmd-&gt;base.autoneg != AUTONEG_DISABLE)) {</div><div class='add'>+		netdev_err(netdev, "unsupported autoneg %hhu\n",</div><div class='add'>+			   cmd-&gt;base.autoneg);</div><div class='ctx'> 		return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (cmd-&gt;autoneg == AUTONEG_DISABLE) {</div><div class='del'>-		switch (speed) {</div><div class='del'>-		case SPEED_10000:</div><div class='del'>-		case SPEED_2500:</div><div class='del'>-		case SPEED_1000:</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='add'>+	if (cmd-&gt;base.autoneg == AUTONEG_DISABLE) {</div><div class='add'>+		if (!pdata-&gt;phy_if.phy_valid_speed(pdata, speed)) {</div><div class='add'>+			netdev_err(netdev, "unsupported speed %u\n", speed);</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		if (cmd-&gt;duplex != DUPLEX_FULL)</div><div class='add'>+		if (cmd-&gt;base.duplex != DUPLEX_FULL) {</div><div class='add'>+			netdev_err(netdev, "unsupported duplex %hhu\n",</div><div class='add'>+				   cmd-&gt;base.duplex);</div><div class='ctx'> 			return -EINVAL;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	cmd-&gt;advertising &amp;= pdata-&gt;phy.supported;</div><div class='del'>-	if ((cmd-&gt;autoneg == AUTONEG_ENABLE) &amp;&amp; !cmd-&gt;advertising)</div><div class='add'>+	netif_dbg(pdata, link, netdev,</div><div class='add'>+		  "requested advertisement 0x%*pb, phy supported 0x%*pb\n",</div><div class='add'>+		  __ETHTOOL_LINK_MODE_MASK_NBITS, cmd-&gt;link_modes.advertising,</div><div class='add'>+		  __ETHTOOL_LINK_MODE_MASK_NBITS, lks-&gt;link_modes.supported);</div><div class='add'>+</div><div class='add'>+	linkmode_and(advertising, cmd-&gt;link_modes.advertising,</div><div class='add'>+		     lks-&gt;link_modes.supported);</div><div class='add'>+</div><div class='add'>+	if ((cmd-&gt;base.autoneg == AUTONEG_ENABLE) &amp;&amp;</div><div class='add'>+	    bitmap_empty(advertising, __ETHTOOL_LINK_MODE_MASK_NBITS)) {</div><div class='add'>+		netdev_err(netdev,</div><div class='add'>+			   "unsupported requested advertisement\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	ret = 0;</div><div class='del'>-	pdata-&gt;phy.autoneg = cmd-&gt;autoneg;</div><div class='add'>+	pdata-&gt;phy.autoneg = cmd-&gt;base.autoneg;</div><div class='ctx'> 	pdata-&gt;phy.speed = speed;</div><div class='del'>-	pdata-&gt;phy.duplex = cmd-&gt;duplex;</div><div class='del'>-	pdata-&gt;phy.advertising = cmd-&gt;advertising;</div><div class='add'>+	pdata-&gt;phy.duplex = cmd-&gt;base.duplex;</div><div class='add'>+	linkmode_copy(lks-&gt;link_modes.advertising, advertising);</div><div class='ctx'> </div><div class='del'>-	if (cmd-&gt;autoneg == AUTONEG_ENABLE)</div><div class='del'>-		pdata-&gt;phy.advertising |= ADVERTISED_Autoneg;</div><div class='add'>+	if (cmd-&gt;base.autoneg == AUTONEG_ENABLE)</div><div class='add'>+		XGBE_SET_ADV(lks, Autoneg);</div><div class='ctx'> 	else</div><div class='del'>-		pdata-&gt;phy.advertising &amp;= ~ADVERTISED_Autoneg;</div><div class='add'>+		XGBE_CLR_ADV(lks, Autoneg);</div><div class='ctx'> </div><div class='ctx'> 	if (netif_running(netdev))</div><div class='ctx'> 		ret = pdata-&gt;phy_if.phy_config_aneg(pdata);</div><div class='ctx'> </div><div class='del'>-	DBGPR("&lt;--xgbe_set_settings\n");</div><div class='del'>-</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -377,67 +300,57 @@ static void xgbe_get_drvinfo(struct net_device *netdev,</div><div class='ctx'> 	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='ctx'> 	struct xgbe_hw_features *hw_feat = &amp;pdata-&gt;hw_feat;</div><div class='ctx'> </div><div class='del'>-	strlcpy(drvinfo-&gt;driver, XGBE_DRV_NAME, sizeof(drvinfo-&gt;driver));</div><div class='del'>-	strlcpy(drvinfo-&gt;version, XGBE_DRV_VERSION, sizeof(drvinfo-&gt;version));</div><div class='del'>-	strlcpy(drvinfo-&gt;bus_info, dev_name(pdata-&gt;dev),</div><div class='add'>+	strscpy(drvinfo-&gt;driver, XGBE_DRV_NAME, sizeof(drvinfo-&gt;driver));</div><div class='add'>+	strscpy(drvinfo-&gt;bus_info, dev_name(pdata-&gt;dev),</div><div class='ctx'> 		sizeof(drvinfo-&gt;bus_info));</div><div class='ctx'> 	snprintf(drvinfo-&gt;fw_version, sizeof(drvinfo-&gt;fw_version), "%d.%d.%d",</div><div class='ctx'> 		 XGMAC_GET_BITS(hw_feat-&gt;version, MAC_VR, USERVER),</div><div class='ctx'> 		 XGMAC_GET_BITS(hw_feat-&gt;version, MAC_VR, DEVID),</div><div class='ctx'> 		 XGMAC_GET_BITS(hw_feat-&gt;version, MAC_VR, SNPSVER));</div><div class='del'>-	drvinfo-&gt;n_stats = XGBE_STATS_COUNT;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgbe_get_coalesce(struct net_device *netdev,</div><div class='del'>-			     struct ethtool_coalesce *ec)</div><div class='add'>+static u32 xgbe_get_msglevel(struct net_device *netdev)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	return pdata-&gt;msg_enable;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_set_msglevel(struct net_device *netdev, u32 msglevel)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='ctx'> </div><div class='del'>-	DBGPR("--&gt;xgbe_get_coalesce\n");</div><div class='add'>+	pdata-&gt;msg_enable = msglevel;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_get_coalesce(struct net_device *netdev,</div><div class='add'>+			     struct ethtool_coalesce *ec,</div><div class='add'>+			     struct kernel_ethtool_coalesce *kernel_coal,</div><div class='add'>+			     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='ctx'> </div><div class='ctx'> 	memset(ec, 0, sizeof(struct ethtool_coalesce));</div><div class='ctx'> </div><div class='ctx'> 	ec-&gt;rx_coalesce_usecs = pdata-&gt;rx_usecs;</div><div class='ctx'> 	ec-&gt;rx_max_coalesced_frames = pdata-&gt;rx_frames;</div><div class='ctx'> </div><div class='add'>+	ec-&gt;tx_coalesce_usecs = pdata-&gt;tx_usecs;</div><div class='ctx'> 	ec-&gt;tx_max_coalesced_frames = pdata-&gt;tx_frames;</div><div class='ctx'> </div><div class='del'>-	DBGPR("&lt;--xgbe_get_coalesce\n");</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int xgbe_set_coalesce(struct net_device *netdev,</div><div class='del'>-			     struct ethtool_coalesce *ec)</div><div class='add'>+			     struct ethtool_coalesce *ec,</div><div class='add'>+			     struct kernel_ethtool_coalesce *kernel_coal,</div><div class='add'>+			     struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='ctx'> 	struct xgbe_hw_if *hw_if = &amp;pdata-&gt;hw_if;</div><div class='ctx'> 	unsigned int rx_frames, rx_riwt, rx_usecs;</div><div class='del'>-	unsigned int tx_frames;</div><div class='del'>-</div><div class='del'>-	DBGPR("--&gt;xgbe_set_coalesce\n");</div><div class='del'>-</div><div class='del'>-	/* Check for not supported parameters  */</div><div class='del'>-	if ((ec-&gt;rx_coalesce_usecs_irq) ||</div><div class='del'>-	    (ec-&gt;rx_max_coalesced_frames_irq) ||</div><div class='del'>-	    (ec-&gt;tx_coalesce_usecs) ||</div><div class='del'>-	    (ec-&gt;tx_coalesce_usecs_irq) ||</div><div class='del'>-	    (ec-&gt;tx_max_coalesced_frames_irq) ||</div><div class='del'>-	    (ec-&gt;stats_block_coalesce_usecs) ||</div><div class='del'>-	    (ec-&gt;use_adaptive_rx_coalesce) ||</div><div class='del'>-	    (ec-&gt;use_adaptive_tx_coalesce) ||</div><div class='del'>-	    (ec-&gt;pkt_rate_low) ||</div><div class='del'>-	    (ec-&gt;rx_coalesce_usecs_low) ||</div><div class='del'>-	    (ec-&gt;rx_max_coalesced_frames_low) ||</div><div class='del'>-	    (ec-&gt;tx_coalesce_usecs_low) ||</div><div class='del'>-	    (ec-&gt;tx_max_coalesced_frames_low) ||</div><div class='del'>-	    (ec-&gt;pkt_rate_high) ||</div><div class='del'>-	    (ec-&gt;rx_coalesce_usecs_high) ||</div><div class='del'>-	    (ec-&gt;rx_max_coalesced_frames_high) ||</div><div class='del'>-	    (ec-&gt;tx_coalesce_usecs_high) ||</div><div class='del'>-	    (ec-&gt;tx_max_coalesced_frames_high) ||</div><div class='del'>-	    (ec-&gt;rate_sample_interval))</div><div class='del'>-		return -EOPNOTSUPP;</div><div class='add'>+	unsigned int tx_frames, tx_usecs;</div><div class='add'>+	unsigned int jiffy_us = jiffies_to_usecs(1);</div><div class='ctx'> </div><div class='ctx'> 	rx_riwt = hw_if-&gt;usec_to_riwt(pdata, ec-&gt;rx_coalesce_usecs);</div><div class='ctx'> 	rx_usecs = ec-&gt;rx_coalesce_usecs;</div><div class='hunk'>@@ -449,35 +362,55 @@ static int xgbe_set_coalesce(struct net_device *netdev,</div><div class='ctx'> </div><div class='ctx'> 	/* Check the bounds of values for Rx */</div><div class='ctx'> 	if (rx_riwt &gt; XGMAC_MAX_DMA_RIWT) {</div><div class='del'>-		netdev_alert(netdev, "rx-usec is limited to %d usecs\n",</div><div class='del'>-			     hw_if-&gt;riwt_to_usec(pdata, XGMAC_MAX_DMA_RIWT));</div><div class='add'>+		netdev_err(netdev, "rx-usec is limited to %d usecs\n",</div><div class='add'>+			   hw_if-&gt;riwt_to_usec(pdata, XGMAC_MAX_DMA_RIWT));</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> 	if (rx_frames &gt; pdata-&gt;rx_desc_count) {</div><div class='del'>-		netdev_alert(netdev, "rx-frames is limited to %d frames\n",</div><div class='del'>-			     pdata-&gt;rx_desc_count);</div><div class='add'>+		netdev_err(netdev, "rx-frames is limited to %d frames\n",</div><div class='add'>+			   pdata-&gt;rx_desc_count);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	tx_usecs = ec-&gt;tx_coalesce_usecs;</div><div class='ctx'> 	tx_frames = ec-&gt;tx_max_coalesced_frames;</div><div class='ctx'> </div><div class='ctx'> 	/* Check the bounds of values for Tx */</div><div class='add'>+	if (!tx_usecs) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(extack,</div><div class='add'>+				       "tx-usecs must not be 0");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (tx_usecs &gt; XGMAC_MAX_COAL_TX_TICK) {</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(extack, "tx-usecs is limited to %d usec",</div><div class='add'>+				       XGMAC_MAX_COAL_TX_TICK);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='ctx'> 	if (tx_frames &gt; pdata-&gt;tx_desc_count) {</div><div class='del'>-		netdev_alert(netdev, "tx-frames is limited to %d frames\n",</div><div class='del'>-			     pdata-&gt;tx_desc_count);</div><div class='add'>+		netdev_err(netdev, "tx-frames is limited to %d frames\n",</div><div class='add'>+			   pdata-&gt;tx_desc_count);</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	/* Round tx-usecs to nearest multiple of jiffy granularity */</div><div class='add'>+	if (tx_usecs % jiffy_us) {</div><div class='add'>+		tx_usecs = rounddown(tx_usecs, jiffy_us);</div><div class='add'>+		if (!tx_usecs)</div><div class='add'>+			tx_usecs = jiffy_us;</div><div class='add'>+		NL_SET_ERR_MSG_FMT_MOD(extack,</div><div class='add'>+				       "tx-usecs rounded to %u usec due to jiffy granularity (%u usec)",</div><div class='add'>+				       tx_usecs, jiffy_us);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	pdata-&gt;rx_riwt = rx_riwt;</div><div class='ctx'> 	pdata-&gt;rx_usecs = rx_usecs;</div><div class='ctx'> 	pdata-&gt;rx_frames = rx_frames;</div><div class='ctx'> 	hw_if-&gt;config_rx_coalesce(pdata);</div><div class='ctx'> </div><div class='add'>+	pdata-&gt;tx_usecs = tx_usecs;</div><div class='ctx'> 	pdata-&gt;tx_frames = tx_frames;</div><div class='ctx'> 	hw_if-&gt;config_tx_coalesce(pdata);</div><div class='ctx'> </div><div class='del'>-	DBGPR("&lt;--xgbe_set_coalesce\n");</div><div class='del'>-</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -511,45 +444,48 @@ static u32 xgbe_get_rxfh_indir_size(struct net_device *netdev)</div><div class='ctx'> 	return ARRAY_SIZE(pdata-&gt;rss_table);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgbe_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,</div><div class='del'>-			 u8 *hfunc)</div><div class='add'>+static int xgbe_get_rxfh(struct net_device *netdev,</div><div class='add'>+			 struct ethtool_rxfh_param *rxfh)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='ctx'> 	unsigned int i;</div><div class='ctx'> </div><div class='del'>-	if (indir) {</div><div class='add'>+	if (rxfh-&gt;indir) {</div><div class='ctx'> 		for (i = 0; i &lt; ARRAY_SIZE(pdata-&gt;rss_table); i++)</div><div class='del'>-			indir[i] = XGMAC_GET_BITS(pdata-&gt;rss_table[i],</div><div class='del'>-						  MAC_RSSDR, DMCH);</div><div class='add'>+			rxfh-&gt;indir[i] = XGMAC_GET_BITS(pdata-&gt;rss_table[i],</div><div class='add'>+							MAC_RSSDR, DMCH);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (key)</div><div class='del'>-		memcpy(key, pdata-&gt;rss_key, sizeof(pdata-&gt;rss_key));</div><div class='add'>+	if (rxfh-&gt;key)</div><div class='add'>+		memcpy(rxfh-&gt;key, pdata-&gt;rss_key, sizeof(pdata-&gt;rss_key));</div><div class='ctx'> </div><div class='del'>-	if (hfunc)</div><div class='del'>-		*hfunc = ETH_RSS_HASH_TOP;</div><div class='add'>+	rxfh-&gt;hfunc = ETH_RSS_HASH_TOP;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgbe_set_rxfh(struct net_device *netdev, const u32 *indir,</div><div class='del'>-			 const u8 *key, const u8 hfunc)</div><div class='add'>+static int xgbe_set_rxfh(struct net_device *netdev,</div><div class='add'>+			 struct ethtool_rxfh_param *rxfh,</div><div class='add'>+			 struct netlink_ext_ack *extack)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='ctx'> 	struct xgbe_hw_if *hw_if = &amp;pdata-&gt;hw_if;</div><div class='del'>-	unsigned int ret;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	if (hfunc != ETH_RSS_HASH_NO_CHANGE &amp;&amp; hfunc != ETH_RSS_HASH_TOP)</div><div class='add'>+	if (rxfh-&gt;hfunc != ETH_RSS_HASH_NO_CHANGE &amp;&amp;</div><div class='add'>+	    rxfh-&gt;hfunc != ETH_RSS_HASH_TOP) {</div><div class='add'>+		netdev_err(netdev, "unsupported hash function\n");</div><div class='ctx'> 		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (indir) {</div><div class='del'>-		ret = hw_if-&gt;set_rss_lookup_table(pdata, indir);</div><div class='add'>+	if (rxfh-&gt;indir) {</div><div class='add'>+		ret = hw_if-&gt;set_rss_lookup_table(pdata, rxfh-&gt;indir);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (key) {</div><div class='del'>-		ret = hw_if-&gt;set_rss_hash_key(pdata, key);</div><div class='add'>+	if (rxfh-&gt;key) {</div><div class='add'>+		ret = hw_if-&gt;set_rss_hash_key(pdata, rxfh-&gt;key);</div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			return ret;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -558,21 +494,17 @@ static int xgbe_set_rxfh(struct net_device *netdev, const u32 *indir,</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int xgbe_get_ts_info(struct net_device *netdev,</div><div class='del'>-			    struct ethtool_ts_info *ts_info)</div><div class='add'>+			    struct kernel_ethtool_ts_info *ts_info)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='ctx'> </div><div class='ctx'> 	ts_info-&gt;so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |</div><div class='del'>-				   SOF_TIMESTAMPING_RX_SOFTWARE |</div><div class='del'>-				   SOF_TIMESTAMPING_SOFTWARE |</div><div class='ctx'> 				   SOF_TIMESTAMPING_TX_HARDWARE |</div><div class='ctx'> 				   SOF_TIMESTAMPING_RX_HARDWARE |</div><div class='ctx'> 				   SOF_TIMESTAMPING_RAW_HARDWARE;</div><div class='ctx'> </div><div class='ctx'> 	if (pdata-&gt;ptp_clock)</div><div class='ctx'> 		ts_info-&gt;phc_index = ptp_clock_index(pdata-&gt;ptp_clock);</div><div class='del'>-	else</div><div class='del'>-		ts_info-&gt;phc_index = -1;</div><div class='ctx'> </div><div class='ctx'> 	ts_info-&gt;tx_types = (1 &lt;&lt; HWTSTAMP_TX_OFF) | (1 &lt;&lt; HWTSTAMP_TX_ON);</div><div class='ctx'> 	ts_info-&gt;rx_filters = (1 &lt;&lt; HWTSTAMP_FILTER_NONE) |</div><div class='hunk'>@@ -590,10 +522,228 @@ static int xgbe_get_ts_info(struct net_device *netdev,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int xgbe_get_module_info(struct net_device *netdev,</div><div class='add'>+				struct ethtool_modinfo *modinfo)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	return pdata-&gt;phy_if.module_info(pdata, modinfo);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_get_module_eeprom(struct net_device *netdev,</div><div class='add'>+				  struct ethtool_eeprom *eeprom, u8 *data)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	return pdata-&gt;phy_if.module_eeprom(pdata, eeprom, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+xgbe_get_ringparam(struct net_device *netdev,</div><div class='add'>+		   struct ethtool_ringparam *ringparam,</div><div class='add'>+		   struct kernel_ethtool_ringparam *kernel_ringparam,</div><div class='add'>+		   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	ringparam-&gt;rx_max_pending = XGBE_RX_DESC_CNT_MAX;</div><div class='add'>+	ringparam-&gt;tx_max_pending = XGBE_TX_DESC_CNT_MAX;</div><div class='add'>+	ringparam-&gt;rx_pending = pdata-&gt;rx_desc_count;</div><div class='add'>+	ringparam-&gt;tx_pending = pdata-&gt;tx_desc_count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_set_ringparam(struct net_device *netdev,</div><div class='add'>+			      struct ethtool_ringparam *ringparam,</div><div class='add'>+			      struct kernel_ethtool_ringparam *kernel_ringparam,</div><div class='add'>+			      struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='add'>+	unsigned int rx, tx;</div><div class='add'>+</div><div class='add'>+	if (ringparam-&gt;rx_mini_pending || ringparam-&gt;rx_jumbo_pending) {</div><div class='add'>+		netdev_err(netdev, "unsupported ring parameter\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((ringparam-&gt;rx_pending &lt; XGBE_RX_DESC_CNT_MIN) ||</div><div class='add'>+	    (ringparam-&gt;rx_pending &gt; XGBE_RX_DESC_CNT_MAX)) {</div><div class='add'>+		netdev_err(netdev,</div><div class='add'>+			   "rx ring parameter must be between %u and %u\n",</div><div class='add'>+			   XGBE_RX_DESC_CNT_MIN, XGBE_RX_DESC_CNT_MAX);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((ringparam-&gt;tx_pending &lt; XGBE_TX_DESC_CNT_MIN) ||</div><div class='add'>+	    (ringparam-&gt;tx_pending &gt; XGBE_TX_DESC_CNT_MAX)) {</div><div class='add'>+		netdev_err(netdev,</div><div class='add'>+			   "tx ring parameter must be between %u and %u\n",</div><div class='add'>+			   XGBE_TX_DESC_CNT_MIN, XGBE_TX_DESC_CNT_MAX);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rx = __rounddown_pow_of_two(ringparam-&gt;rx_pending);</div><div class='add'>+	if (rx != ringparam-&gt;rx_pending)</div><div class='add'>+		netdev_notice(netdev,</div><div class='add'>+			      "rx ring parameter rounded to power of two: %u\n",</div><div class='add'>+			      rx);</div><div class='add'>+</div><div class='add'>+	tx = __rounddown_pow_of_two(ringparam-&gt;tx_pending);</div><div class='add'>+	if (tx != ringparam-&gt;tx_pending)</div><div class='add'>+		netdev_notice(netdev,</div><div class='add'>+			      "tx ring parameter rounded to power of two: %u\n",</div><div class='add'>+			      tx);</div><div class='add'>+</div><div class='add'>+	if ((rx == pdata-&gt;rx_desc_count) &amp;&amp;</div><div class='add'>+	    (tx == pdata-&gt;tx_desc_count))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	pdata-&gt;rx_desc_count = rx;</div><div class='add'>+	pdata-&gt;tx_desc_count = tx;</div><div class='add'>+</div><div class='add'>+	xgbe_restart_dev(pdata);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_get_channels(struct net_device *netdev,</div><div class='add'>+			      struct ethtool_channels *channels)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='add'>+	unsigned int rx, tx, combined;</div><div class='add'>+</div><div class='add'>+	/* Calculate maximums allowed:</div><div class='add'>+	 *   - Take into account the number of available IRQs</div><div class='add'>+	 *   - Do not take into account the number of online CPUs so that</div><div class='add'>+	 *     the user can over-subscribe if desired</div><div class='add'>+	 *   - Tx is additionally limited by the number of hardware queues</div><div class='add'>+	 */</div><div class='add'>+	rx = min(pdata-&gt;hw_feat.rx_ch_cnt, pdata-&gt;rx_max_channel_count);</div><div class='add'>+	rx = min(rx, pdata-&gt;channel_irq_count);</div><div class='add'>+	tx = min(pdata-&gt;hw_feat.tx_ch_cnt, pdata-&gt;tx_max_channel_count);</div><div class='add'>+	tx = min(tx, pdata-&gt;channel_irq_count);</div><div class='add'>+	tx = min(tx, pdata-&gt;tx_max_q_count);</div><div class='add'>+</div><div class='add'>+	combined = min(rx, tx);</div><div class='add'>+</div><div class='add'>+	channels-&gt;max_combined = combined;</div><div class='add'>+	channels-&gt;max_rx = rx ? rx - 1 : 0;</div><div class='add'>+	channels-&gt;max_tx = tx ? tx - 1 : 0;</div><div class='add'>+</div><div class='add'>+	/* Get current settings based on device state */</div><div class='add'>+	rx = pdata-&gt;new_rx_ring_count ? : pdata-&gt;rx_ring_count;</div><div class='add'>+	tx = pdata-&gt;new_tx_ring_count ? : pdata-&gt;tx_ring_count;</div><div class='add'>+</div><div class='add'>+	combined = min(rx, tx);</div><div class='add'>+	rx -= combined;</div><div class='add'>+	tx -= combined;</div><div class='add'>+</div><div class='add'>+	channels-&gt;combined_count = combined;</div><div class='add'>+	channels-&gt;rx_count = rx;</div><div class='add'>+	channels-&gt;tx_count = tx;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_print_set_channels_input(struct net_device *netdev,</div><div class='add'>+					  struct ethtool_channels *channels)</div><div class='add'>+{</div><div class='add'>+	netdev_err(netdev, "channel inputs: combined=%u, rx-only=%u, tx-only=%u\n",</div><div class='add'>+		   channels-&gt;combined_count, channels-&gt;rx_count,</div><div class='add'>+		   channels-&gt;tx_count);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_set_channels(struct net_device *netdev,</div><div class='add'>+			     struct ethtool_channels *channels)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='add'>+	unsigned int rx, rx_curr, tx, tx_curr, combined;</div><div class='add'>+</div><div class='add'>+	/* Calculate maximums allowed:</div><div class='add'>+	 *   - Take into account the number of available IRQs</div><div class='add'>+	 *   - Do not take into account the number of online CPUs so that</div><div class='add'>+	 *     the user can over-subscribe if desired</div><div class='add'>+	 *   - Tx is additionally limited by the number of hardware queues</div><div class='add'>+	 */</div><div class='add'>+	rx = min(pdata-&gt;hw_feat.rx_ch_cnt, pdata-&gt;rx_max_channel_count);</div><div class='add'>+	rx = min(rx, pdata-&gt;channel_irq_count);</div><div class='add'>+	tx = min(pdata-&gt;hw_feat.tx_ch_cnt, pdata-&gt;tx_max_channel_count);</div><div class='add'>+	tx = min(tx, pdata-&gt;tx_max_q_count);</div><div class='add'>+	tx = min(tx, pdata-&gt;channel_irq_count);</div><div class='add'>+</div><div class='add'>+	combined = min(rx, tx);</div><div class='add'>+</div><div class='add'>+	/* Should not be setting other count */</div><div class='add'>+	if (channels-&gt;other_count) {</div><div class='add'>+		netdev_err(netdev,</div><div class='add'>+			   "other channel count must be zero\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Require at least one Combined (Rx and Tx) channel */</div><div class='add'>+	if (!channels-&gt;combined_count) {</div><div class='add'>+		netdev_err(netdev,</div><div class='add'>+			   "at least one combined Rx/Tx channel is required\n");</div><div class='add'>+		xgbe_print_set_channels_input(netdev, channels);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Check combined channels */</div><div class='add'>+	if (channels-&gt;combined_count &gt; combined) {</div><div class='add'>+		netdev_err(netdev,</div><div class='add'>+			   "combined channel count cannot exceed %u\n",</div><div class='add'>+			   combined);</div><div class='add'>+		xgbe_print_set_channels_input(netdev, channels);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Can have some Rx-only or Tx-only channels, but not both */</div><div class='add'>+	if (channels-&gt;rx_count &amp;&amp; channels-&gt;tx_count) {</div><div class='add'>+		netdev_err(netdev,</div><div class='add'>+			   "cannot specify both Rx-only and Tx-only channels\n");</div><div class='add'>+		xgbe_print_set_channels_input(netdev, channels);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Check that we don't exceed the maximum number of channels */</div><div class='add'>+	if ((channels-&gt;combined_count + channels-&gt;rx_count) &gt; rx) {</div><div class='add'>+		netdev_err(netdev,</div><div class='add'>+			   "total Rx channels (%u) requested exceeds maximum available (%u)\n",</div><div class='add'>+			   channels-&gt;combined_count + channels-&gt;rx_count, rx);</div><div class='add'>+		xgbe_print_set_channels_input(netdev, channels);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((channels-&gt;combined_count + channels-&gt;tx_count) &gt; tx) {</div><div class='add'>+		netdev_err(netdev,</div><div class='add'>+			   "total Tx channels (%u) requested exceeds maximum available (%u)\n",</div><div class='add'>+			   channels-&gt;combined_count + channels-&gt;tx_count, tx);</div><div class='add'>+		xgbe_print_set_channels_input(netdev, channels);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rx = channels-&gt;combined_count + channels-&gt;rx_count;</div><div class='add'>+	tx = channels-&gt;combined_count + channels-&gt;tx_count;</div><div class='add'>+</div><div class='add'>+	rx_curr = pdata-&gt;new_rx_ring_count ? : pdata-&gt;rx_ring_count;</div><div class='add'>+	tx_curr = pdata-&gt;new_tx_ring_count ? : pdata-&gt;tx_ring_count;</div><div class='add'>+</div><div class='add'>+	if ((rx == rx_curr) &amp;&amp; (tx == tx_curr))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	pdata-&gt;new_rx_ring_count = rx;</div><div class='add'>+	pdata-&gt;new_tx_ring_count = tx;</div><div class='add'>+</div><div class='add'>+	xgbe_full_restart_dev(pdata);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct ethtool_ops xgbe_ethtool_ops = {</div><div class='del'>-	.get_settings = xgbe_get_settings,</div><div class='del'>-	.set_settings = xgbe_set_settings,</div><div class='add'>+	.supported_coalesce_params = ETHTOOL_COALESCE_USECS |</div><div class='add'>+				     ETHTOOL_COALESCE_MAX_FRAMES,</div><div class='ctx'> 	.get_drvinfo = xgbe_get_drvinfo,</div><div class='add'>+	.get_msglevel = xgbe_get_msglevel,</div><div class='add'>+	.set_msglevel = xgbe_set_msglevel,</div><div class='ctx'> 	.get_link = ethtool_op_get_link,</div><div class='ctx'> 	.get_coalesce = xgbe_get_coalesce,</div><div class='ctx'> 	.set_coalesce = xgbe_set_coalesce,</div><div class='hunk'>@@ -608,9 +758,18 @@ static const struct ethtool_ops xgbe_ethtool_ops = {</div><div class='ctx'> 	.get_rxfh = xgbe_get_rxfh,</div><div class='ctx'> 	.set_rxfh = xgbe_set_rxfh,</div><div class='ctx'> 	.get_ts_info = xgbe_get_ts_info,</div><div class='add'>+	.get_link_ksettings = xgbe_get_link_ksettings,</div><div class='add'>+	.set_link_ksettings = xgbe_set_link_ksettings,</div><div class='add'>+	.get_module_info = xgbe_get_module_info,</div><div class='add'>+	.get_module_eeprom = xgbe_get_module_eeprom,</div><div class='add'>+	.get_ringparam = xgbe_get_ringparam,</div><div class='add'>+	.set_ringparam = xgbe_set_ringparam,</div><div class='add'>+	.get_channels = xgbe_get_channels,</div><div class='add'>+	.set_channels = xgbe_set_channels,</div><div class='add'>+	.self_test = xgbe_selftest_run,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct ethtool_ops *xgbe_get_ethtool_ops(void)</div><div class='add'>+const struct ethtool_ops *xgbe_get_ethtool_ops(void)</div><div class='ctx'> {</div><div class='del'>-	return (struct ethtool_ops *)&amp;xgbe_ethtool_ops;</div><div class='add'>+	return &amp;xgbe_ethtool_ops;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-hwtstamp.c b/drivers/net/ethernet/amd/xgbe/xgbe-hwtstamp.c<br/>new file mode 100644<br/>index 000000000000..0127988e10be<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-hwtstamp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe-hwtstamp.c</a></div><div class='hunk'>@@ -0,0 +1,399 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='add'>+ *</div><div class='add'>+ * Author: Raju Rangoju &lt;Raju.Rangoju@amd.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "xgbe.h"</div><div class='add'>+#include "xgbe-common.h"</div><div class='add'>+</div><div class='add'>+void xgbe_update_tstamp_time(struct xgbe_prv_data *pdata,</div><div class='add'>+			     unsigned int sec, unsigned int nsec)</div><div class='add'>+{</div><div class='add'>+	int count;</div><div class='add'>+</div><div class='add'>+	/* Set the time values and tell the device */</div><div class='add'>+	XGMAC_IOWRITE(pdata, MAC_STSUR, sec);</div><div class='add'>+	XGMAC_IOWRITE(pdata, MAC_STNUR, nsec);</div><div class='add'>+</div><div class='add'>+	/* issue command to update the system time value */</div><div class='add'>+	XGMAC_IOWRITE(pdata, MAC_TSCR,</div><div class='add'>+		      XGMAC_IOREAD(pdata, MAC_TSCR) |</div><div class='add'>+		      (1 &lt;&lt; MAC_TSCR_TSUPDT_INDEX));</div><div class='add'>+</div><div class='add'>+	/* Wait for the time adjust/update to complete */</div><div class='add'>+	count = 10000;</div><div class='add'>+	while (--count &amp;&amp; XGMAC_IOREAD_BITS(pdata, MAC_TSCR, TSUPDT))</div><div class='add'>+		udelay(5);</div><div class='add'>+</div><div class='add'>+	if (count &lt; 0)</div><div class='add'>+		netdev_err(pdata-&gt;netdev,</div><div class='add'>+			   "timed out updating system timestamp\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void xgbe_update_tstamp_addend(struct xgbe_prv_data *pdata,</div><div class='add'>+			       unsigned int addend)</div><div class='add'>+{</div><div class='add'>+	unsigned int count = 10000;</div><div class='add'>+</div><div class='add'>+	/* Set the addend register value and tell the device */</div><div class='add'>+	XGMAC_IOWRITE(pdata, MAC_TSAR, addend);</div><div class='add'>+	XGMAC_IOWRITE_BITS(pdata, MAC_TSCR, TSADDREG, 1);</div><div class='add'>+</div><div class='add'>+	/* Wait for addend update to complete */</div><div class='add'>+	while (--count &amp;&amp; XGMAC_IOREAD_BITS(pdata, MAC_TSCR, TSADDREG))</div><div class='add'>+		udelay(5);</div><div class='add'>+</div><div class='add'>+	if (!count)</div><div class='add'>+		netdev_err(pdata-&gt;netdev,</div><div class='add'>+			   "timed out updating timestamp addend register\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void xgbe_set_tstamp_time(struct xgbe_prv_data *pdata, unsigned int sec,</div><div class='add'>+			  unsigned int nsec)</div><div class='add'>+{</div><div class='add'>+	unsigned int count = 10000;</div><div class='add'>+</div><div class='add'>+	/* Set the time values and tell the device */</div><div class='add'>+	XGMAC_IOWRITE(pdata, MAC_STSUR, sec);</div><div class='add'>+	XGMAC_IOWRITE(pdata, MAC_STNUR, nsec);</div><div class='add'>+	XGMAC_IOWRITE_BITS(pdata, MAC_TSCR, TSINIT, 1);</div><div class='add'>+</div><div class='add'>+	/* Wait for time update to complete */</div><div class='add'>+	while (--count &amp;&amp; XGMAC_IOREAD_BITS(pdata, MAC_TSCR, TSINIT))</div><div class='add'>+		udelay(5);</div><div class='add'>+</div><div class='add'>+	if (!count)</div><div class='add'>+		netdev_err(pdata-&gt;netdev, "timed out initializing timestamp\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u64 xgbe_get_tstamp_time(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	u64 nsec;</div><div class='add'>+</div><div class='add'>+	nsec = XGMAC_IOREAD(pdata, MAC_STSR);</div><div class='add'>+	nsec *= NSEC_PER_SEC;</div><div class='add'>+	nsec += XGMAC_IOREAD(pdata, MAC_STNR);</div><div class='add'>+</div><div class='add'>+	return nsec;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u64 xgbe_get_tx_tstamp(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	unsigned int tx_snr, tx_ssr;</div><div class='add'>+	u64 nsec;</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;vdata-&gt;tx_tstamp_workaround) {</div><div class='add'>+		tx_snr = XGMAC_IOREAD(pdata, MAC_TXSNR);</div><div class='add'>+		tx_ssr = XGMAC_IOREAD(pdata, MAC_TXSSR);</div><div class='add'>+	} else {</div><div class='add'>+		tx_ssr = XGMAC_IOREAD(pdata, MAC_TXSSR);</div><div class='add'>+		tx_snr = XGMAC_IOREAD(pdata, MAC_TXSNR);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (XGMAC_GET_BITS(tx_snr, MAC_TXSNR, TXTSSTSMIS))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	nsec = tx_ssr;</div><div class='add'>+	nsec *= NSEC_PER_SEC;</div><div class='add'>+	nsec += tx_snr;</div><div class='add'>+</div><div class='add'>+	return nsec;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void xgbe_get_rx_tstamp(struct xgbe_packet_data *packet,</div><div class='add'>+			struct xgbe_ring_desc *rdesc)</div><div class='add'>+{</div><div class='add'>+	u64 nsec;</div><div class='add'>+</div><div class='add'>+	if (XGMAC_GET_BITS_LE(rdesc-&gt;desc3, RX_CONTEXT_DESC3, TSA) &amp;&amp;</div><div class='add'>+	    !XGMAC_GET_BITS_LE(rdesc-&gt;desc3, RX_CONTEXT_DESC3, TSD)) {</div><div class='add'>+		nsec = le32_to_cpu(rdesc-&gt;desc1);</div><div class='add'>+		nsec *= NSEC_PER_SEC;</div><div class='add'>+		nsec += le32_to_cpu(rdesc-&gt;desc0);</div><div class='add'>+		if (nsec != 0xffffffffffffffffULL) {</div><div class='add'>+			packet-&gt;rx_tstamp = nsec;</div><div class='add'>+			XGMAC_SET_BITS(packet-&gt;attributes, RX_PACKET_ATTRIBUTES,</div><div class='add'>+				       RX_TSTAMP, 1);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void xgbe_config_tstamp(struct xgbe_prv_data *pdata, unsigned int mac_tscr)</div><div class='add'>+{</div><div class='add'>+	unsigned int value = 0;</div><div class='add'>+</div><div class='add'>+	value = XGMAC_IOREAD(pdata, MAC_TSCR);</div><div class='add'>+	value |= mac_tscr;</div><div class='add'>+	XGMAC_IOWRITE(pdata, MAC_TSCR, value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void xgbe_tx_tstamp(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = container_of(work,</div><div class='add'>+						   struct xgbe_prv_data,</div><div class='add'>+						   tx_tstamp_work);</div><div class='add'>+	struct skb_shared_hwtstamps hwtstamps;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;pdata-&gt;tstamp_lock, flags);</div><div class='add'>+	if (!pdata-&gt;tx_tstamp_skb)</div><div class='add'>+		goto unlock;</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;tx_tstamp) {</div><div class='add'>+		memset(&amp;hwtstamps, 0, sizeof(hwtstamps));</div><div class='add'>+		hwtstamps.hwtstamp = ns_to_ktime(pdata-&gt;tx_tstamp);</div><div class='add'>+		skb_tstamp_tx(pdata-&gt;tx_tstamp_skb, &amp;hwtstamps);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dev_kfree_skb_any(pdata-&gt;tx_tstamp_skb);</div><div class='add'>+</div><div class='add'>+	pdata-&gt;tx_tstamp_skb = NULL;</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	spin_unlock_irqrestore(&amp;pdata-&gt;tstamp_lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int xgbe_get_hwtstamp_settings(struct net_device *netdev,</div><div class='add'>+			       struct kernel_hwtstamp_config *config)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	*config = pdata-&gt;tstamp_config;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int xgbe_set_hwtstamp_settings(struct net_device *netdev,</div><div class='add'>+			       struct kernel_hwtstamp_config *config,</div><div class='add'>+			       struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='add'>+	unsigned int mac_tscr = 0;</div><div class='add'>+</div><div class='add'>+	switch (config-&gt;tx_type) {</div><div class='add'>+	case HWTSTAMP_TX_OFF:</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case HWTSTAMP_TX_ON:</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (config-&gt;rx_filter) {</div><div class='add'>+	case HWTSTAMP_FILTER_NONE:</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case HWTSTAMP_FILTER_NTP_ALL:</div><div class='add'>+	case HWTSTAMP_FILTER_ALL:</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENALL, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+		/* PTP v2, UDP, any kind of event packet */</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);</div><div class='add'>+		fallthrough;    /* to PTP v1, UDP, any kind of event packet */</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, SNAPTYPSEL, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='add'>+		break;</div><div class='add'>+		/* PTP v2, UDP, Sync packet */</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);</div><div class='add'>+		fallthrough;    /* to PTP v1, UDP, Sync packet */</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+		/* PTP v2, UDP, Delay_req packet */</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);</div><div class='add'>+		fallthrough;    /* to PTP v1, UDP, Delay_req packet */</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSMSTRENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+		/* 802.AS1, Ethernet, any kind of event packet */</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, AV8021ASMEN, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, SNAPTYPSEL, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+		/* 802.AS1, Ethernet, Sync packet */</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, AV8021ASMEN, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+		/* 802.AS1, Ethernet, Delay_req packet */</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, AV8021ASMEN, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSMSTRENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+		/* PTP v2/802.AS1, any layer, any kind of event packet */</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_EVENT:</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, SNAPTYPSEL, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+		/* PTP v2/802.AS1, any layer, Sync packet */</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_SYNC:</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+		/* PTP v2/802.AS1, any layer, Delay_req packet */</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSMSTRENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);</div><div class='add'>+		XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	xgbe_config_tstamp(pdata, mac_tscr);</div><div class='add'>+</div><div class='add'>+	pdata-&gt;tstamp_config = *config;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void xgbe_prep_tx_tstamp(struct xgbe_prv_data *pdata,</div><div class='add'>+			 struct sk_buff *skb,</div><div class='add'>+			 struct xgbe_packet_data *packet)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	if (XGMAC_GET_BITS(packet-&gt;attributes, TX_PACKET_ATTRIBUTES, PTP)) {</div><div class='add'>+		spin_lock_irqsave(&amp;pdata-&gt;tstamp_lock, flags);</div><div class='add'>+		if (pdata-&gt;tx_tstamp_skb) {</div><div class='add'>+			/* Another timestamp in progress, ignore this one */</div><div class='add'>+			XGMAC_SET_BITS(packet-&gt;attributes,</div><div class='add'>+				       TX_PACKET_ATTRIBUTES, PTP, 0);</div><div class='add'>+		} else {</div><div class='add'>+			pdata-&gt;tx_tstamp_skb = skb_get(skb);</div><div class='add'>+			skb_shinfo(skb)-&gt;tx_flags |= SKBTX_IN_PROGRESS;</div><div class='add'>+		}</div><div class='add'>+		spin_unlock_irqrestore(&amp;pdata-&gt;tstamp_lock, flags);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	skb_tx_timestamp(skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int xgbe_init_ptp(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	unsigned int mac_tscr = 0;</div><div class='add'>+	struct timespec64 now;</div><div class='add'>+	u64 dividend;</div><div class='add'>+</div><div class='add'>+	/* Register Settings to be done based on the link speed. */</div><div class='add'>+	switch (pdata-&gt;phy.speed) {</div><div class='add'>+	case SPEED_1000:</div><div class='add'>+		XGMAC_IOWRITE(pdata, MAC_TICNR, MAC_TICNR_1G_INITVAL);</div><div class='add'>+		XGMAC_IOWRITE(pdata, MAC_TECNR, MAC_TECNR_1G_INITVAL);</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_2500:</div><div class='add'>+	case SPEED_10000:</div><div class='add'>+		XGMAC_IOWRITE_BITS(pdata, MAC_TICSNR, TSICSNS,</div><div class='add'>+				   MAC_TICSNR_10G_INITVAL);</div><div class='add'>+		XGMAC_IOWRITE(pdata, MAC_TECNR, MAC_TECNR_10G_INITVAL);</div><div class='add'>+		XGMAC_IOWRITE_BITS(pdata, MAC_TECSNR, TSECSNS,</div><div class='add'>+				   MAC_TECSNR_10G_INITVAL);</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_UNKNOWN:</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Enable IEEE1588 PTP clock. */</div><div class='add'>+	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);</div><div class='add'>+</div><div class='add'>+	/* Overwrite earlier timestamps */</div><div class='add'>+	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TXTSSTSM, 1);</div><div class='add'>+</div><div class='add'>+	/* Set one nano-second accuracy */</div><div class='add'>+	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSCTRLSSR, 1);</div><div class='add'>+</div><div class='add'>+	/* Set fine timestamp update */</div><div class='add'>+	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSCFUPDT, 1);</div><div class='add'>+</div><div class='add'>+	xgbe_config_tstamp(pdata, mac_tscr);</div><div class='add'>+</div><div class='add'>+	/* Exit if timestamping is not enabled */</div><div class='add'>+	if (!XGMAC_GET_BITS(mac_tscr, MAC_TSCR, TSENA))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;vdata-&gt;tstamp_ptp_clock_freq) {</div><div class='add'>+		/* Initialize time registers based on</div><div class='add'>+		 * 125MHz PTP Clock Frequency</div><div class='add'>+		 */</div><div class='add'>+		XGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SSINC,</div><div class='add'>+				   XGBE_V2_TSTAMP_SSINC);</div><div class='add'>+		XGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SNSINC,</div><div class='add'>+				   XGBE_V2_TSTAMP_SNSINC);</div><div class='add'>+	} else {</div><div class='add'>+		/* Initialize time registers based on</div><div class='add'>+		 * 50MHz PTP Clock Frequency</div><div class='add'>+		 */</div><div class='add'>+		XGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SSINC, XGBE_TSTAMP_SSINC);</div><div class='add'>+		XGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SNSINC, XGBE_TSTAMP_SNSINC);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Calculate the addend:</div><div class='add'>+	 *   addend = 2^32 / (PTP ref clock / (PTP clock based on SSINC))</div><div class='add'>+	 *          = (2^32 * (PTP clock based on SSINC)) / PTP ref clock</div><div class='add'>+	 */</div><div class='add'>+	if (pdata-&gt;vdata-&gt;tstamp_ptp_clock_freq)</div><div class='add'>+		dividend = XGBE_V2_PTP_ACT_CLK_FREQ;</div><div class='add'>+	else</div><div class='add'>+		dividend = XGBE_PTP_ACT_CLK_FREQ;</div><div class='add'>+</div><div class='add'>+	dividend = (u64)(dividend &lt;&lt; 32);</div><div class='add'>+	pdata-&gt;tstamp_addend = div_u64(dividend, pdata-&gt;ptpclk_rate);</div><div class='add'>+</div><div class='add'>+	xgbe_update_tstamp_addend(pdata, pdata-&gt;tstamp_addend);</div><div class='add'>+</div><div class='add'>+	dma_wmb();</div><div class='add'>+	/* initialize system time */</div><div class='add'>+	ktime_get_real_ts64(&amp;now);</div><div class='add'>+</div><div class='add'>+	/* lower 32 bits of tv_sec are safe until y2106 */</div><div class='add'>+	xgbe_set_tstamp_time(pdata, (u32)now.tv_sec, now.tv_nsec);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-i2c.c b/drivers/net/ethernet/amd/xgbe/xgbe-i2c.c<br/>new file mode 100644<br/>index 000000000000..65eb7b577b65<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-i2c.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe-i2c.c</a></div><div class='hunk'>@@ -0,0 +1,405 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/kmod.h&gt;</div><div class='add'>+#include &lt;linux/delay.h&gt;</div><div class='add'>+#include &lt;linux/completion.h&gt;</div><div class='add'>+#include &lt;linux/mutex.h&gt;</div><div class='add'>+</div><div class='add'>+#include "xgbe.h"</div><div class='add'>+#include "xgbe-common.h"</div><div class='add'>+</div><div class='add'>+#define XGBE_ABORT_COUNT	500</div><div class='add'>+#define XGBE_DISABLE_COUNT	1000</div><div class='add'>+</div><div class='add'>+#define XGBE_STD_SPEED		1</div><div class='add'>+</div><div class='add'>+#define XGBE_INTR_RX_FULL	BIT(IC_RAW_INTR_STAT_RX_FULL_INDEX)</div><div class='add'>+#define XGBE_INTR_TX_EMPTY	BIT(IC_RAW_INTR_STAT_TX_EMPTY_INDEX)</div><div class='add'>+#define XGBE_INTR_TX_ABRT	BIT(IC_RAW_INTR_STAT_TX_ABRT_INDEX)</div><div class='add'>+#define XGBE_INTR_STOP_DET	BIT(IC_RAW_INTR_STAT_STOP_DET_INDEX)</div><div class='add'>+#define XGBE_DEFAULT_INT_MASK	(XGBE_INTR_RX_FULL  |	\</div><div class='add'>+				 XGBE_INTR_TX_EMPTY |	\</div><div class='add'>+				 XGBE_INTR_TX_ABRT  |	\</div><div class='add'>+				 XGBE_INTR_STOP_DET)</div><div class='add'>+</div><div class='add'>+#define XGBE_I2C_READ		BIT(8)</div><div class='add'>+#define XGBE_I2C_STOP		BIT(9)</div><div class='add'>+</div><div class='add'>+static int xgbe_i2c_abort(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	unsigned int wait = XGBE_ABORT_COUNT;</div><div class='add'>+</div><div class='add'>+	/* Must be enabled to recognize the abort request */</div><div class='add'>+	XI2C_IOWRITE_BITS(pdata, IC_ENABLE, EN, 1);</div><div class='add'>+</div><div class='add'>+	/* Issue the abort */</div><div class='add'>+	XI2C_IOWRITE_BITS(pdata, IC_ENABLE, ABORT, 1);</div><div class='add'>+</div><div class='add'>+	while (wait--) {</div><div class='add'>+		if (!XI2C_IOREAD_BITS(pdata, IC_ENABLE, ABORT))</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		usleep_range(500, 600);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EBUSY;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_i2c_set_enable(struct xgbe_prv_data *pdata, bool enable)</div><div class='add'>+{</div><div class='add'>+	unsigned int wait = XGBE_DISABLE_COUNT;</div><div class='add'>+	unsigned int mode = enable ? 1 : 0;</div><div class='add'>+</div><div class='add'>+	while (wait--) {</div><div class='add'>+		XI2C_IOWRITE_BITS(pdata, IC_ENABLE, EN, mode);</div><div class='add'>+		if (XI2C_IOREAD_BITS(pdata, IC_ENABLE_STATUS, EN) == mode)</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		usleep_range(100, 110);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -EBUSY;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_i2c_disable(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = xgbe_i2c_set_enable(pdata, false);</div><div class='add'>+	if (ret) {</div><div class='add'>+		/* Disable failed, try an abort */</div><div class='add'>+		ret = xgbe_i2c_abort(pdata);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		/* Abort succeeded, try to disable again */</div><div class='add'>+		ret = xgbe_i2c_set_enable(pdata, false);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_i2c_enable(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	return xgbe_i2c_set_enable(pdata, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_i2c_clear_all_interrupts(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	XI2C_IOREAD(pdata, IC_CLR_INTR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_i2c_disable_interrupts(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	XI2C_IOWRITE(pdata, IC_INTR_MASK, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_i2c_enable_interrupts(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	XI2C_IOWRITE(pdata, IC_INTR_MASK, XGBE_DEFAULT_INT_MASK);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_i2c_write(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_i2c_op_state *state = &amp;pdata-&gt;i2c.op_state;</div><div class='add'>+	unsigned int tx_slots;</div><div class='add'>+	unsigned int cmd;</div><div class='add'>+</div><div class='add'>+	/* Configured to never receive Rx overflows, so fill up Tx fifo */</div><div class='add'>+	tx_slots = pdata-&gt;i2c.tx_fifo_size - XI2C_IOREAD(pdata, IC_TXFLR);</div><div class='add'>+	while (tx_slots &amp;&amp; state-&gt;tx_len) {</div><div class='add'>+		if (state-&gt;op-&gt;cmd == XGBE_I2C_CMD_READ)</div><div class='add'>+			cmd = XGBE_I2C_READ;</div><div class='add'>+		else</div><div class='add'>+			cmd = *state-&gt;tx_buf++;</div><div class='add'>+</div><div class='add'>+		if (state-&gt;tx_len == 1)</div><div class='add'>+			XI2C_SET_BITS(cmd, IC_DATA_CMD, STOP, 1);</div><div class='add'>+</div><div class='add'>+		XI2C_IOWRITE(pdata, IC_DATA_CMD, cmd);</div><div class='add'>+</div><div class='add'>+		tx_slots--;</div><div class='add'>+		state-&gt;tx_len--;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* No more Tx operations, so ignore TX_EMPTY and return */</div><div class='add'>+	if (!state-&gt;tx_len)</div><div class='add'>+		XI2C_IOWRITE_BITS(pdata, IC_INTR_MASK, TX_EMPTY, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_i2c_read(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_i2c_op_state *state = &amp;pdata-&gt;i2c.op_state;</div><div class='add'>+	unsigned int rx_slots;</div><div class='add'>+</div><div class='add'>+	/* Anything to be read? */</div><div class='add'>+	if (state-&gt;op-&gt;cmd != XGBE_I2C_CMD_READ)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	rx_slots = XI2C_IOREAD(pdata, IC_RXFLR);</div><div class='add'>+	while (rx_slots &amp;&amp; state-&gt;rx_len) {</div><div class='add'>+		*state-&gt;rx_buf++ = XI2C_IOREAD(pdata, IC_DATA_CMD);</div><div class='add'>+		state-&gt;rx_len--;</div><div class='add'>+		rx_slots--;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_i2c_clear_isr_interrupts(struct xgbe_prv_data *pdata,</div><div class='add'>+					  unsigned int isr)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_i2c_op_state *state = &amp;pdata-&gt;i2c.op_state;</div><div class='add'>+</div><div class='add'>+	if (isr &amp; XGBE_INTR_TX_ABRT) {</div><div class='add'>+		state-&gt;tx_abort_source = XI2C_IOREAD(pdata, IC_TX_ABRT_SOURCE);</div><div class='add'>+		XI2C_IOREAD(pdata, IC_CLR_TX_ABRT);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (isr &amp; XGBE_INTR_STOP_DET)</div><div class='add'>+		XI2C_IOREAD(pdata, IC_CLR_STOP_DET);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_i2c_isr_bh_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = from_work(pdata, work, i2c_bh_work);</div><div class='add'>+	struct xgbe_i2c_op_state *state = &amp;pdata-&gt;i2c.op_state;</div><div class='add'>+	unsigned int isr;</div><div class='add'>+</div><div class='add'>+	isr = XI2C_IOREAD(pdata, IC_RAW_INTR_STAT);</div><div class='add'>+	if (!isr)</div><div class='add'>+		goto reissue_check;</div><div class='add'>+</div><div class='add'>+	netif_dbg(pdata, intr, pdata-&gt;netdev,</div><div class='add'>+		  "I2C interrupt received: status=%#010x\n", isr);</div><div class='add'>+</div><div class='add'>+	xgbe_i2c_clear_isr_interrupts(pdata, isr);</div><div class='add'>+</div><div class='add'>+	if (isr &amp; XGBE_INTR_TX_ABRT) {</div><div class='add'>+		netif_dbg(pdata, link, pdata-&gt;netdev,</div><div class='add'>+			  "I2C TX_ABRT received (%#010x) for target %#04x\n",</div><div class='add'>+			  state-&gt;tx_abort_source, state-&gt;op-&gt;target);</div><div class='add'>+</div><div class='add'>+		xgbe_i2c_disable_interrupts(pdata);</div><div class='add'>+</div><div class='add'>+		state-&gt;ret = -EIO;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Check for data in the Rx fifo */</div><div class='add'>+	xgbe_i2c_read(pdata);</div><div class='add'>+</div><div class='add'>+	/* Fill up the Tx fifo next */</div><div class='add'>+	xgbe_i2c_write(pdata);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	/* Complete on an error or STOP condition */</div><div class='add'>+	if (state-&gt;ret || XI2C_GET_BITS(isr, IC_RAW_INTR_STAT, STOP_DET))</div><div class='add'>+		complete(&amp;pdata-&gt;i2c_complete);</div><div class='add'>+</div><div class='add'>+reissue_check:</div><div class='add'>+	/* Reissue interrupt if status is not clear */</div><div class='add'>+	if (pdata-&gt;vdata-&gt;irq_reissue_support)</div><div class='add'>+		XP_IOWRITE(pdata, XP_INT_REISSUE_EN, 1 &lt;&lt; 2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t xgbe_i2c_isr(int irq, void *data)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = (struct xgbe_prv_data *)data;</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;isr_as_bh_work)</div><div class='add'>+		queue_work(system_bh_wq, &amp;pdata-&gt;i2c_bh_work);</div><div class='add'>+	else</div><div class='add'>+		xgbe_i2c_isr_bh_work(&amp;pdata-&gt;i2c_bh_work);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_i2c_set_mode(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	unsigned int reg;</div><div class='add'>+</div><div class='add'>+	reg = XI2C_IOREAD(pdata, IC_CON);</div><div class='add'>+	XI2C_SET_BITS(reg, IC_CON, MASTER_MODE, 1);</div><div class='add'>+	XI2C_SET_BITS(reg, IC_CON, SLAVE_DISABLE, 1);</div><div class='add'>+	XI2C_SET_BITS(reg, IC_CON, RESTART_EN, 1);</div><div class='add'>+	XI2C_SET_BITS(reg, IC_CON, SPEED, XGBE_STD_SPEED);</div><div class='add'>+	XI2C_SET_BITS(reg, IC_CON, RX_FIFO_FULL_HOLD, 1);</div><div class='add'>+	XI2C_IOWRITE(pdata, IC_CON, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_i2c_get_features(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_i2c *i2c = &amp;pdata-&gt;i2c;</div><div class='add'>+	unsigned int reg;</div><div class='add'>+</div><div class='add'>+	reg = XI2C_IOREAD(pdata, IC_COMP_PARAM_1);</div><div class='add'>+	i2c-&gt;max_speed_mode = XI2C_GET_BITS(reg, IC_COMP_PARAM_1,</div><div class='add'>+					    MAX_SPEED_MODE);</div><div class='add'>+	i2c-&gt;rx_fifo_size = XI2C_GET_BITS(reg, IC_COMP_PARAM_1,</div><div class='add'>+					  RX_BUFFER_DEPTH);</div><div class='add'>+	i2c-&gt;tx_fifo_size = XI2C_GET_BITS(reg, IC_COMP_PARAM_1,</div><div class='add'>+					  TX_BUFFER_DEPTH);</div><div class='add'>+</div><div class='add'>+	if (netif_msg_probe(pdata))</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "I2C features: %s=%u, %s=%u, %s=%u\n",</div><div class='add'>+			"MAX_SPEED_MODE", i2c-&gt;max_speed_mode,</div><div class='add'>+			"RX_BUFFER_DEPTH", i2c-&gt;rx_fifo_size,</div><div class='add'>+			"TX_BUFFER_DEPTH", i2c-&gt;tx_fifo_size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_i2c_set_target(struct xgbe_prv_data *pdata, unsigned int addr)</div><div class='add'>+{</div><div class='add'>+	XI2C_IOWRITE(pdata, IC_TAR, addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t xgbe_i2c_combined_isr(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	xgbe_i2c_isr_bh_work(&amp;pdata-&gt;i2c_bh_work);</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_i2c_xfer(struct xgbe_prv_data *pdata, struct xgbe_i2c_op *op)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_i2c_op_state *state = &amp;pdata-&gt;i2c.op_state;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pdata-&gt;i2c_mutex);</div><div class='add'>+</div><div class='add'>+	reinit_completion(&amp;pdata-&gt;i2c_complete);</div><div class='add'>+</div><div class='add'>+	ret = xgbe_i2c_disable(pdata);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(pdata-&gt;netdev, "failed to disable i2c master\n");</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	xgbe_i2c_set_target(pdata, op-&gt;target);</div><div class='add'>+</div><div class='add'>+	memset(state, 0, sizeof(*state));</div><div class='add'>+	state-&gt;op = op;</div><div class='add'>+	state-&gt;tx_len = op-&gt;len;</div><div class='add'>+	state-&gt;tx_buf = op-&gt;buf;</div><div class='add'>+	state-&gt;rx_len = op-&gt;len;</div><div class='add'>+	state-&gt;rx_buf = op-&gt;buf;</div><div class='add'>+</div><div class='add'>+	xgbe_i2c_clear_all_interrupts(pdata);</div><div class='add'>+	ret = xgbe_i2c_enable(pdata);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(pdata-&gt;netdev, "failed to enable i2c master\n");</div><div class='add'>+		goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Enabling the interrupts will cause the TX FIFO empty interrupt to</div><div class='add'>+	 * fire and begin to process the command via the ISR.</div><div class='add'>+	 */</div><div class='add'>+	xgbe_i2c_enable_interrupts(pdata);</div><div class='add'>+</div><div class='add'>+	if (!wait_for_completion_timeout(&amp;pdata-&gt;i2c_complete, HZ)) {</div><div class='add'>+		netdev_err(pdata-&gt;netdev, "i2c operation timed out\n");</div><div class='add'>+		ret = -ETIMEDOUT;</div><div class='add'>+		goto disable;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = state-&gt;ret;</div><div class='add'>+	if (ret) {</div><div class='add'>+		if (state-&gt;tx_abort_source &amp; IC_TX_ABRT_7B_ADDR_NOACK)</div><div class='add'>+			ret = -ENOTCONN;</div><div class='add'>+		else if (state-&gt;tx_abort_source &amp; IC_TX_ABRT_ARB_LOST)</div><div class='add'>+			ret = -EAGAIN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+disable:</div><div class='add'>+	xgbe_i2c_disable_interrupts(pdata);</div><div class='add'>+	xgbe_i2c_disable(pdata);</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	mutex_unlock(&amp;pdata-&gt;i2c_mutex);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_i2c_stop(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	if (!pdata-&gt;i2c.started)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	netif_dbg(pdata, link, pdata-&gt;netdev, "stopping I2C\n");</div><div class='add'>+</div><div class='add'>+	pdata-&gt;i2c.started = 0;</div><div class='add'>+</div><div class='add'>+	xgbe_i2c_disable_interrupts(pdata);</div><div class='add'>+	xgbe_i2c_disable(pdata);</div><div class='add'>+	xgbe_i2c_clear_all_interrupts(pdata);</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;dev_irq != pdata-&gt;i2c_irq) {</div><div class='add'>+		devm_free_irq(pdata-&gt;dev, pdata-&gt;i2c_irq, pdata);</div><div class='add'>+		cancel_work_sync(&amp;pdata-&gt;i2c_bh_work);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_i2c_start(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;i2c.started)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	netif_dbg(pdata, link, pdata-&gt;netdev, "starting I2C\n");</div><div class='add'>+</div><div class='add'>+	/* If we have a separate I2C irq, enable it */</div><div class='add'>+	if (pdata-&gt;dev_irq != pdata-&gt;i2c_irq) {</div><div class='add'>+		INIT_WORK(&amp;pdata-&gt;i2c_bh_work, xgbe_i2c_isr_bh_work);</div><div class='add'>+</div><div class='add'>+		ret = devm_request_irq(pdata-&gt;dev, pdata-&gt;i2c_irq,</div><div class='add'>+				       xgbe_i2c_isr, 0, pdata-&gt;i2c_name,</div><div class='add'>+				       pdata);</div><div class='add'>+		if (ret) {</div><div class='add'>+			netdev_err(pdata-&gt;netdev, "i2c irq request failed\n");</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pdata-&gt;i2c.started = 1;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_i2c_init(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	xgbe_i2c_disable_interrupts(pdata);</div><div class='add'>+</div><div class='add'>+	ret = xgbe_i2c_disable(pdata);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(pdata-&gt;dev, "failed to disable i2c master\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	xgbe_i2c_get_features(pdata);</div><div class='add'>+</div><div class='add'>+	xgbe_i2c_set_mode(pdata);</div><div class='add'>+</div><div class='add'>+	xgbe_i2c_clear_all_interrupts(pdata);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void xgbe_init_function_ptrs_i2c(struct xgbe_i2c_if *i2c_if)</div><div class='add'>+{</div><div class='add'>+	i2c_if-&gt;i2c_init		= xgbe_i2c_init;</div><div class='add'>+</div><div class='add'>+	i2c_if-&gt;i2c_start		= xgbe_i2c_start;</div><div class='add'>+	i2c_if-&gt;i2c_stop		= xgbe_i2c_stop;</div><div class='add'>+</div><div class='add'>+	i2c_if-&gt;i2c_xfer		= xgbe_i2c_xfer;</div><div class='add'>+</div><div class='add'>+	i2c_if-&gt;i2c_isr			= xgbe_i2c_combined_isr;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-main.c b/drivers/net/ethernet/amd/xgbe/xgbe-main.c<br/>index e83bd76abce6..d1f0419edb23 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-main.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/xgbe/xgbe-main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe-main.c</a></div><div class='hunk'>@@ -1,198 +1,46 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='ctx'> /*</div><div class='del'>- * AMD 10Gb Ethernet driver</div><div class='del'>- *</div><div class='del'>- * This file is available to you under your choice of the following two</div><div class='del'>- * licenses:</div><div class='del'>- *</div><div class='del'>- * License 1: GPLv2</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014 Advanced Micro Devices, Inc.</div><div class='del'>- *</div><div class='del'>- * This file is free software; you may copy, redistribute and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation, either version 2 of the License, or (at</div><div class='del'>- * your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This file is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- * License 2: Modified BSD</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014 Advanced Micro Devices, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * Redistribution and use in source and binary forms, with or without</div><div class='del'>- * modification, are permitted provided that the following conditions are met:</div><div class='del'>- *     * Redistributions of source code must retain the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer.</div><div class='del'>- *     * Redistributions in binary form must reproduce the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer in the</div><div class='del'>- *       documentation and/or other materials provided with the distribution.</div><div class='del'>- *     * Neither the name of Advanced Micro Devices, Inc. nor the</div><div class='del'>- *       names of its contributors may be used to endorse or promote products</div><div class='del'>- *       derived from this software without specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"</div><div class='del'>- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE</div><div class='del'>- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE</div><div class='del'>- * ARE DISCLAIMED. IN NO EVENT SHALL &lt;COPYRIGHT HOLDER&gt; BE LIABLE FOR ANY</div><div class='del'>- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES</div><div class='del'>- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;</div><div class='del'>- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND</div><div class='del'>- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='del'>- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF</div><div class='del'>- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/device.h&gt;</div><div class='del'>-#include &lt;linux/platform_device.h&gt;</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;linux/netdevice.h&gt;</div><div class='ctx'> #include &lt;linux/etherdevice.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/of.h&gt;</div><div class='del'>-#include &lt;linux/of_net.h&gt;</div><div class='del'>-#include &lt;linux/of_address.h&gt;</div><div class='del'>-#include &lt;linux/of_platform.h&gt;</div><div class='del'>-#include &lt;linux/clk.h&gt;</div><div class='del'>-#include &lt;linux/property.h&gt;</div><div class='del'>-#include &lt;linux/acpi.h&gt;</div><div class='del'>-#include &lt;linux/mdio.h&gt;</div><div class='add'>+#include &lt;linux/notifier.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "xgbe.h"</div><div class='ctx'> #include "xgbe-common.h"</div><div class='ctx'> </div><div class='ctx'> MODULE_AUTHOR("Tom Lendacky &lt;thomas.lendacky@amd.com&gt;");</div><div class='ctx'> MODULE_LICENSE("Dual BSD/GPL");</div><div class='del'>-MODULE_VERSION(XGBE_DRV_VERSION);</div><div class='ctx'> MODULE_DESCRIPTION(XGBE_DRV_DESC);</div><div class='ctx'> </div><div class='ctx'> static int debug = -1;</div><div class='del'>-module_param(debug, int, S_IWUSR | S_IRUGO);</div><div class='add'>+module_param(debug, int, 0644);</div><div class='ctx'> MODULE_PARM_DESC(debug, " Network interface message level setting");</div><div class='ctx'> </div><div class='ctx'> static const u32 default_msg_level = (NETIF_MSG_LINK | NETIF_MSG_IFDOWN |</div><div class='ctx'> 				      NETIF_MSG_IFUP);</div><div class='ctx'> </div><div class='del'>-static const u32 xgbe_serdes_blwc[] = {</div><div class='del'>-	XGBE_SPEED_1000_BLWC,</div><div class='del'>-	XGBE_SPEED_2500_BLWC,</div><div class='del'>-	XGBE_SPEED_10000_BLWC,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const u32 xgbe_serdes_cdr_rate[] = {</div><div class='del'>-	XGBE_SPEED_1000_CDR,</div><div class='del'>-	XGBE_SPEED_2500_CDR,</div><div class='del'>-	XGBE_SPEED_10000_CDR,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const u32 xgbe_serdes_pq_skew[] = {</div><div class='del'>-	XGBE_SPEED_1000_PQ,</div><div class='del'>-	XGBE_SPEED_2500_PQ,</div><div class='del'>-	XGBE_SPEED_10000_PQ,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const u32 xgbe_serdes_tx_amp[] = {</div><div class='del'>-	XGBE_SPEED_1000_TXAMP,</div><div class='del'>-	XGBE_SPEED_2500_TXAMP,</div><div class='del'>-	XGBE_SPEED_10000_TXAMP,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const u32 xgbe_serdes_dfe_tap_cfg[] = {</div><div class='del'>-	XGBE_SPEED_1000_DFE_TAP_CONFIG,</div><div class='del'>-	XGBE_SPEED_2500_DFE_TAP_CONFIG,</div><div class='del'>-	XGBE_SPEED_10000_DFE_TAP_CONFIG,</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static const u32 xgbe_serdes_dfe_tap_ena[] = {</div><div class='del'>-	XGBE_SPEED_1000_DFE_TAP_ENABLE,</div><div class='del'>-	XGBE_SPEED_2500_DFE_TAP_ENABLE,</div><div class='del'>-	XGBE_SPEED_10000_DFE_TAP_ENABLE,</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> static void xgbe_default_config(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	DBGPR("--&gt;xgbe_default_config\n");</div><div class='ctx'> </div><div class='del'>-	pdata-&gt;pblx8 = DMA_PBL_X8_ENABLE;</div><div class='add'>+	pdata-&gt;blen = DMA_SBMR_BLEN_64;</div><div class='add'>+	pdata-&gt;pbl = DMA_PBL_128;</div><div class='add'>+	pdata-&gt;aal = 1;</div><div class='add'>+	pdata-&gt;rd_osr_limit = 8;</div><div class='add'>+	pdata-&gt;wr_osr_limit = 8;</div><div class='ctx'> 	pdata-&gt;tx_sf_mode = MTL_TSF_ENABLE;</div><div class='ctx'> 	pdata-&gt;tx_threshold = MTL_TX_THRESHOLD_64;</div><div class='del'>-	pdata-&gt;tx_pbl = DMA_PBL_16;</div><div class='ctx'> 	pdata-&gt;tx_osp_mode = DMA_OSP_ENABLE;</div><div class='ctx'> 	pdata-&gt;rx_sf_mode = MTL_RSF_DISABLE;</div><div class='ctx'> 	pdata-&gt;rx_threshold = MTL_RX_THRESHOLD_64;</div><div class='del'>-	pdata-&gt;rx_pbl = DMA_PBL_16;</div><div class='ctx'> 	pdata-&gt;pause_autoneg = 1;</div><div class='ctx'> 	pdata-&gt;tx_pause = 1;</div><div class='ctx'> 	pdata-&gt;rx_pause = 1;</div><div class='hunk'>@@ -206,448 +54,126 @@ static void xgbe_init_all_fptrs(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	xgbe_init_function_ptrs_dev(&amp;pdata-&gt;hw_if);</div><div class='ctx'> 	xgbe_init_function_ptrs_phy(&amp;pdata-&gt;phy_if);</div><div class='add'>+	xgbe_init_function_ptrs_i2c(&amp;pdata-&gt;i2c_if);</div><div class='ctx'> 	xgbe_init_function_ptrs_desc(&amp;pdata-&gt;desc_if);</div><div class='del'>-}</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_ACPI</div><div class='del'>-static int xgbe_acpi_support(struct xgbe_prv_data *pdata)</div><div class='del'>-{</div><div class='del'>-	struct device *dev = pdata-&gt;dev;</div><div class='del'>-	u32 property;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	/* Obtain the system clock setting */</div><div class='del'>-	ret = device_property_read_u32(dev, XGBE_ACPI_DMA_FREQ, &amp;property);</div><div class='del'>-	if (ret) {</div><div class='del'>-		dev_err(dev, "unable to obtain %s property\n",</div><div class='del'>-			XGBE_ACPI_DMA_FREQ);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-	pdata-&gt;sysclk_rate = property;</div><div class='del'>-</div><div class='del'>-	/* Obtain the PTP clock setting */</div><div class='del'>-	ret = device_property_read_u32(dev, XGBE_ACPI_PTP_FREQ, &amp;property);</div><div class='del'>-	if (ret) {</div><div class='del'>-		dev_err(dev, "unable to obtain %s property\n",</div><div class='del'>-			XGBE_ACPI_PTP_FREQ);</div><div class='del'>-		return ret;</div><div class='del'>-	}</div><div class='del'>-	pdata-&gt;ptpclk_rate = property;</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	pdata-&gt;vdata-&gt;init_function_ptrs_phy_impl(&amp;pdata-&gt;phy_if);</div><div class='ctx'> }</div><div class='del'>-#else   /* CONFIG_ACPI */</div><div class='del'>-static int xgbe_acpi_support(struct xgbe_prv_data *pdata)</div><div class='del'>-{</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-#endif  /* CONFIG_ACPI */</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_OF</div><div class='del'>-static int xgbe_of_support(struct xgbe_prv_data *pdata)</div><div class='del'>-{</div><div class='del'>-	struct device *dev = pdata-&gt;dev;</div><div class='del'>-</div><div class='del'>-	/* Obtain the system clock setting */</div><div class='del'>-	pdata-&gt;sysclk = devm_clk_get(dev, XGBE_DMA_CLOCK);</div><div class='del'>-	if (IS_ERR(pdata-&gt;sysclk)) {</div><div class='del'>-		dev_err(dev, "dma devm_clk_get failed\n");</div><div class='del'>-		return PTR_ERR(pdata-&gt;sysclk);</div><div class='del'>-	}</div><div class='del'>-	pdata-&gt;sysclk_rate = clk_get_rate(pdata-&gt;sysclk);</div><div class='del'>-</div><div class='del'>-	/* Obtain the PTP clock setting */</div><div class='del'>-	pdata-&gt;ptpclk = devm_clk_get(dev, XGBE_PTP_CLOCK);</div><div class='del'>-	if (IS_ERR(pdata-&gt;ptpclk)) {</div><div class='del'>-		dev_err(dev, "ptp devm_clk_get failed\n");</div><div class='del'>-		return PTR_ERR(pdata-&gt;ptpclk);</div><div class='del'>-	}</div><div class='del'>-	pdata-&gt;ptpclk_rate = clk_get_rate(pdata-&gt;ptpclk);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct platform_device *xgbe_of_get_phy_pdev(struct xgbe_prv_data *pdata)</div><div class='del'>-{</div><div class='del'>-	struct device *dev = pdata-&gt;dev;</div><div class='del'>-	struct device_node *phy_node;</div><div class='del'>-	struct platform_device *phy_pdev;</div><div class='del'>-</div><div class='del'>-	phy_node = of_parse_phandle(dev-&gt;of_node, "phy-handle", 0);</div><div class='del'>-	if (phy_node) {</div><div class='del'>-		/* Old style device tree:</div><div class='del'>-		 *   The XGBE and PHY resources are separate</div><div class='del'>-		 */</div><div class='del'>-		phy_pdev = of_find_device_by_node(phy_node);</div><div class='del'>-		of_node_put(phy_node);</div><div class='del'>-	} else {</div><div class='del'>-		/* New style device tree:</div><div class='del'>-		 *   The XGBE and PHY resources are grouped together with</div><div class='del'>-		 *   the PHY resources listed last</div><div class='del'>-		 */</div><div class='del'>-		get_device(dev);</div><div class='del'>-		phy_pdev = pdata-&gt;pdev;</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	return phy_pdev;</div><div class='del'>-}</div><div class='del'>-#else   /* CONFIG_OF */</div><div class='del'>-static int xgbe_of_support(struct xgbe_prv_data *pdata)</div><div class='del'>-{</div><div class='del'>-	return -EINVAL;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct platform_device *xgbe_of_get_phy_pdev(struct xgbe_prv_data *pdata)</div><div class='del'>-{</div><div class='del'>-	return NULL;</div><div class='del'>-}</div><div class='del'>-#endif  /* CONFIG_OF */</div><div class='del'>-</div><div class='del'>-static unsigned int xgbe_resource_count(struct platform_device *pdev,</div><div class='del'>-					unsigned int type)</div><div class='del'>-{</div><div class='del'>-	unsigned int count;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	for (i = 0, count = 0; i &lt; pdev-&gt;num_resources; i++) {</div><div class='del'>-		struct resource *res = &amp;pdev-&gt;resource[i];</div><div class='del'>-</div><div class='del'>-		if (type == resource_type(res))</div><div class='del'>-			count++;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return count;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static struct platform_device *xgbe_get_phy_pdev(struct xgbe_prv_data *pdata)</div><div class='del'>-{</div><div class='del'>-	struct platform_device *phy_pdev;</div><div class='del'>-</div><div class='del'>-	if (pdata-&gt;use_acpi) {</div><div class='del'>-		get_device(pdata-&gt;dev);</div><div class='del'>-		phy_pdev = pdata-&gt;pdev;</div><div class='del'>-	} else {</div><div class='del'>-		phy_pdev = xgbe_of_get_phy_pdev(pdata);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return phy_pdev;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int xgbe_probe(struct platform_device *pdev)</div><div class='add'>+struct xgbe_prv_data *xgbe_alloc_pdata(struct device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgbe_prv_data *pdata;</div><div class='ctx'> 	struct net_device *netdev;</div><div class='del'>-	struct device *dev = &amp;pdev-&gt;dev, *phy_dev;</div><div class='del'>-	struct platform_device *phy_pdev;</div><div class='del'>-	struct resource *res;</div><div class='del'>-	const char *phy_mode;</div><div class='del'>-	unsigned int i, phy_memnum, phy_irqnum;</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	DBGPR("--&gt; xgbe_probe\n");</div><div class='ctx'> </div><div class='ctx'> 	netdev = alloc_etherdev_mq(sizeof(struct xgbe_prv_data),</div><div class='ctx'> 				   XGBE_MAX_DMA_CHANNELS);</div><div class='ctx'> 	if (!netdev) {</div><div class='del'>-		dev_err(dev, "alloc_etherdev failed\n");</div><div class='del'>-		ret = -ENOMEM;</div><div class='del'>-		goto err_alloc;</div><div class='add'>+		dev_err(dev, "alloc_etherdev_mq failed\n");</div><div class='add'>+		return ERR_PTR(-ENOMEM);</div><div class='ctx'> 	}</div><div class='ctx'> 	SET_NETDEV_DEV(netdev, dev);</div><div class='ctx'> 	pdata = netdev_priv(netdev);</div><div class='ctx'> 	pdata-&gt;netdev = netdev;</div><div class='del'>-	pdata-&gt;pdev = pdev;</div><div class='del'>-	pdata-&gt;adev = ACPI_COMPANION(dev);</div><div class='ctx'> 	pdata-&gt;dev = dev;</div><div class='del'>-	platform_set_drvdata(pdev, netdev);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_init(&amp;pdata-&gt;lock);</div><div class='del'>-	mutex_init(&amp;pdata-&gt;xpcs_mutex);</div><div class='add'>+	spin_lock_init(&amp;pdata-&gt;xpcs_lock);</div><div class='ctx'> 	mutex_init(&amp;pdata-&gt;rss_mutex);</div><div class='ctx'> 	spin_lock_init(&amp;pdata-&gt;tstamp_lock);</div><div class='add'>+	mutex_init(&amp;pdata-&gt;i2c_mutex);</div><div class='add'>+	init_completion(&amp;pdata-&gt;i2c_complete);</div><div class='add'>+	init_completion(&amp;pdata-&gt;mdio_complete);</div><div class='ctx'> </div><div class='ctx'> 	pdata-&gt;msg_enable = netif_msg_init(debug, default_msg_level);</div><div class='ctx'> </div><div class='ctx'> 	set_bit(XGBE_DOWN, &amp;pdata-&gt;dev_state);</div><div class='add'>+	set_bit(XGBE_STOPPED, &amp;pdata-&gt;dev_state);</div><div class='ctx'> </div><div class='del'>-	/* Check if we should use ACPI or DT */</div><div class='del'>-	pdata-&gt;use_acpi = (!pdata-&gt;adev || acpi_disabled) ? 0 : 1;</div><div class='del'>-</div><div class='del'>-	phy_pdev = xgbe_get_phy_pdev(pdata);</div><div class='del'>-	if (!phy_pdev) {</div><div class='del'>-		dev_err(dev, "unable to obtain phy device\n");</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		goto err_phydev;</div><div class='del'>-	}</div><div class='del'>-	phy_dev = &amp;phy_pdev-&gt;dev;</div><div class='del'>-</div><div class='del'>-	if (pdev == phy_pdev) {</div><div class='del'>-		/* New style device tree or ACPI:</div><div class='del'>-		 *   The XGBE and PHY resources are grouped together with</div><div class='del'>-		 *   the PHY resources listed last</div><div class='del'>-		 */</div><div class='del'>-		phy_memnum = xgbe_resource_count(pdev, IORESOURCE_MEM) - 3;</div><div class='del'>-		phy_irqnum = xgbe_resource_count(pdev, IORESOURCE_IRQ) - 1;</div><div class='del'>-	} else {</div><div class='del'>-		/* Old style device tree:</div><div class='del'>-		 *   The XGBE and PHY resources are separate</div><div class='del'>-		 */</div><div class='del'>-		phy_memnum = 0;</div><div class='del'>-		phy_irqnum = 0;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Set and validate the number of descriptors for a ring */</div><div class='del'>-	BUILD_BUG_ON_NOT_POWER_OF_2(XGBE_TX_DESC_CNT);</div><div class='del'>-	pdata-&gt;tx_desc_count = XGBE_TX_DESC_CNT;</div><div class='del'>-	if (pdata-&gt;tx_desc_count &amp; (pdata-&gt;tx_desc_count - 1)) {</div><div class='del'>-		dev_err(dev, "tx descriptor count (%d) is not valid\n",</div><div class='del'>-			pdata-&gt;tx_desc_count);</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		goto err_io;</div><div class='del'>-	}</div><div class='del'>-	BUILD_BUG_ON_NOT_POWER_OF_2(XGBE_RX_DESC_CNT);</div><div class='del'>-	pdata-&gt;rx_desc_count = XGBE_RX_DESC_CNT;</div><div class='del'>-	if (pdata-&gt;rx_desc_count &amp; (pdata-&gt;rx_desc_count - 1)) {</div><div class='del'>-		dev_err(dev, "rx descriptor count (%d) is not valid\n",</div><div class='del'>-			pdata-&gt;rx_desc_count);</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		goto err_io;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Obtain the mmio areas for the device */</div><div class='del'>-	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='del'>-	pdata-&gt;xgmac_regs = devm_ioremap_resource(dev, res);</div><div class='del'>-	if (IS_ERR(pdata-&gt;xgmac_regs)) {</div><div class='del'>-		dev_err(dev, "xgmac ioremap failed\n");</div><div class='del'>-		ret = PTR_ERR(pdata-&gt;xgmac_regs);</div><div class='del'>-		goto err_io;</div><div class='del'>-	}</div><div class='del'>-	if (netif_msg_probe(pdata))</div><div class='del'>-		dev_dbg(dev, "xgmac_regs = %p\n", pdata-&gt;xgmac_regs);</div><div class='del'>-</div><div class='del'>-	res = platform_get_resource(pdev, IORESOURCE_MEM, 1);</div><div class='del'>-	pdata-&gt;xpcs_regs = devm_ioremap_resource(dev, res);</div><div class='del'>-	if (IS_ERR(pdata-&gt;xpcs_regs)) {</div><div class='del'>-		dev_err(dev, "xpcs ioremap failed\n");</div><div class='del'>-		ret = PTR_ERR(pdata-&gt;xpcs_regs);</div><div class='del'>-		goto err_io;</div><div class='del'>-	}</div><div class='del'>-	if (netif_msg_probe(pdata))</div><div class='del'>-		dev_dbg(dev, "xpcs_regs  = %p\n", pdata-&gt;xpcs_regs);</div><div class='del'>-</div><div class='del'>-	res = platform_get_resource(phy_pdev, IORESOURCE_MEM, phy_memnum++);</div><div class='del'>-	pdata-&gt;rxtx_regs = devm_ioremap_resource(dev, res);</div><div class='del'>-	if (IS_ERR(pdata-&gt;rxtx_regs)) {</div><div class='del'>-		dev_err(dev, "rxtx ioremap failed\n");</div><div class='del'>-		ret = PTR_ERR(pdata-&gt;rxtx_regs);</div><div class='del'>-		goto err_io;</div><div class='del'>-	}</div><div class='del'>-	if (netif_msg_probe(pdata))</div><div class='del'>-		dev_dbg(dev, "rxtx_regs  = %p\n", pdata-&gt;rxtx_regs);</div><div class='del'>-</div><div class='del'>-	res = platform_get_resource(phy_pdev, IORESOURCE_MEM, phy_memnum++);</div><div class='del'>-	pdata-&gt;sir0_regs = devm_ioremap_resource(dev, res);</div><div class='del'>-	if (IS_ERR(pdata-&gt;sir0_regs)) {</div><div class='del'>-		dev_err(dev, "sir0 ioremap failed\n");</div><div class='del'>-		ret = PTR_ERR(pdata-&gt;sir0_regs);</div><div class='del'>-		goto err_io;</div><div class='del'>-	}</div><div class='del'>-	if (netif_msg_probe(pdata))</div><div class='del'>-		dev_dbg(dev, "sir0_regs  = %p\n", pdata-&gt;sir0_regs);</div><div class='del'>-</div><div class='del'>-	res = platform_get_resource(phy_pdev, IORESOURCE_MEM, phy_memnum++);</div><div class='del'>-	pdata-&gt;sir1_regs = devm_ioremap_resource(dev, res);</div><div class='del'>-	if (IS_ERR(pdata-&gt;sir1_regs)) {</div><div class='del'>-		dev_err(dev, "sir1 ioremap failed\n");</div><div class='del'>-		ret = PTR_ERR(pdata-&gt;sir1_regs);</div><div class='del'>-		goto err_io;</div><div class='del'>-	}</div><div class='del'>-	if (netif_msg_probe(pdata))</div><div class='del'>-		dev_dbg(dev, "sir1_regs  = %p\n", pdata-&gt;sir1_regs);</div><div class='del'>-</div><div class='del'>-	/* Retrieve the MAC address */</div><div class='del'>-	ret = device_property_read_u8_array(dev, XGBE_MAC_ADDR_PROPERTY,</div><div class='del'>-					    pdata-&gt;mac_addr,</div><div class='del'>-					    sizeof(pdata-&gt;mac_addr));</div><div class='del'>-	if (ret || !is_valid_ether_addr(pdata-&gt;mac_addr)) {</div><div class='del'>-		dev_err(dev, "invalid %s property\n", XGBE_MAC_ADDR_PROPERTY);</div><div class='del'>-		if (!ret)</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-		goto err_io;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Retrieve the PHY mode - it must be "xgmii" */</div><div class='del'>-	ret = device_property_read_string(dev, XGBE_PHY_MODE_PROPERTY,</div><div class='del'>-					  &amp;phy_mode);</div><div class='del'>-	if (ret || strcmp(phy_mode, phy_modes(PHY_INTERFACE_MODE_XGMII))) {</div><div class='del'>-		dev_err(dev, "invalid %s property\n", XGBE_PHY_MODE_PROPERTY);</div><div class='del'>-		if (!ret)</div><div class='del'>-			ret = -EINVAL;</div><div class='del'>-		goto err_io;</div><div class='del'>-	}</div><div class='del'>-	pdata-&gt;phy_mode = PHY_INTERFACE_MODE_XGMII;</div><div class='add'>+	return pdata;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	/* Check for per channel interrupt support */</div><div class='del'>-	if (device_property_present(dev, XGBE_DMA_IRQS_PROPERTY))</div><div class='del'>-		pdata-&gt;per_channel_irq = 1;</div><div class='add'>+void xgbe_free_pdata(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = pdata-&gt;netdev;</div><div class='ctx'> </div><div class='del'>-	/* Retrieve the PHY speedset */</div><div class='del'>-	ret = device_property_read_u32(phy_dev, XGBE_SPEEDSET_PROPERTY,</div><div class='del'>-				       &amp;pdata-&gt;speed_set);</div><div class='del'>-	if (ret) {</div><div class='del'>-		dev_err(dev, "invalid %s property\n", XGBE_SPEEDSET_PROPERTY);</div><div class='del'>-		goto err_io;</div><div class='del'>-	}</div><div class='add'>+	free_netdev(netdev);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	switch (pdata-&gt;speed_set) {</div><div class='del'>-	case XGBE_SPEEDSET_1000_10000:</div><div class='del'>-	case XGBE_SPEEDSET_2500_10000:</div><div class='del'>-		break;</div><div class='del'>-	default:</div><div class='del'>-		dev_err(dev, "invalid %s property\n", XGBE_SPEEDSET_PROPERTY);</div><div class='del'>-		ret = -EINVAL;</div><div class='del'>-		goto err_io;</div><div class='del'>-	}</div><div class='add'>+void xgbe_set_counts(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	/* Set all the function pointers */</div><div class='add'>+	xgbe_init_all_fptrs(pdata);</div><div class='ctx'> </div><div class='del'>-	/* Retrieve the PHY configuration properties */</div><div class='del'>-	if (device_property_present(phy_dev, XGBE_BLWC_PROPERTY)) {</div><div class='del'>-		ret = device_property_read_u32_array(phy_dev,</div><div class='del'>-						     XGBE_BLWC_PROPERTY,</div><div class='del'>-						     pdata-&gt;serdes_blwc,</div><div class='del'>-						     XGBE_SPEEDS);</div><div class='del'>-		if (ret) {</div><div class='del'>-			dev_err(dev, "invalid %s property\n",</div><div class='del'>-				XGBE_BLWC_PROPERTY);</div><div class='del'>-			goto err_io;</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		memcpy(pdata-&gt;serdes_blwc, xgbe_serdes_blwc,</div><div class='del'>-		       sizeof(pdata-&gt;serdes_blwc));</div><div class='del'>-	}</div><div class='add'>+	/* Populate the hardware features */</div><div class='add'>+	xgbe_get_all_hw_features(pdata);</div><div class='ctx'> </div><div class='del'>-	if (device_property_present(phy_dev, XGBE_CDR_RATE_PROPERTY)) {</div><div class='del'>-		ret = device_property_read_u32_array(phy_dev,</div><div class='del'>-						     XGBE_CDR_RATE_PROPERTY,</div><div class='del'>-						     pdata-&gt;serdes_cdr_rate,</div><div class='del'>-						     XGBE_SPEEDS);</div><div class='del'>-		if (ret) {</div><div class='del'>-			dev_err(dev, "invalid %s property\n",</div><div class='del'>-				XGBE_CDR_RATE_PROPERTY);</div><div class='del'>-			goto err_io;</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		memcpy(pdata-&gt;serdes_cdr_rate, xgbe_serdes_cdr_rate,</div><div class='del'>-		       sizeof(pdata-&gt;serdes_cdr_rate));</div><div class='del'>-	}</div><div class='add'>+	/* Set default max values if not provided */</div><div class='add'>+	if (!pdata-&gt;tx_max_channel_count)</div><div class='add'>+		pdata-&gt;tx_max_channel_count = pdata-&gt;hw_feat.tx_ch_cnt;</div><div class='add'>+	if (!pdata-&gt;rx_max_channel_count)</div><div class='add'>+		pdata-&gt;rx_max_channel_count = pdata-&gt;hw_feat.rx_ch_cnt;</div><div class='ctx'> </div><div class='del'>-	if (device_property_present(phy_dev, XGBE_PQ_SKEW_PROPERTY)) {</div><div class='del'>-		ret = device_property_read_u32_array(phy_dev,</div><div class='del'>-						     XGBE_PQ_SKEW_PROPERTY,</div><div class='del'>-						     pdata-&gt;serdes_pq_skew,</div><div class='del'>-						     XGBE_SPEEDS);</div><div class='del'>-		if (ret) {</div><div class='del'>-			dev_err(dev, "invalid %s property\n",</div><div class='del'>-				XGBE_PQ_SKEW_PROPERTY);</div><div class='del'>-			goto err_io;</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		memcpy(pdata-&gt;serdes_pq_skew, xgbe_serdes_pq_skew,</div><div class='del'>-		       sizeof(pdata-&gt;serdes_pq_skew));</div><div class='del'>-	}</div><div class='add'>+	if (!pdata-&gt;tx_max_q_count)</div><div class='add'>+		pdata-&gt;tx_max_q_count = pdata-&gt;hw_feat.tx_q_cnt;</div><div class='add'>+	if (!pdata-&gt;rx_max_q_count)</div><div class='add'>+		pdata-&gt;rx_max_q_count = pdata-&gt;hw_feat.rx_q_cnt;</div><div class='ctx'> </div><div class='del'>-	if (device_property_present(phy_dev, XGBE_TX_AMP_PROPERTY)) {</div><div class='del'>-		ret = device_property_read_u32_array(phy_dev,</div><div class='del'>-						     XGBE_TX_AMP_PROPERTY,</div><div class='del'>-						     pdata-&gt;serdes_tx_amp,</div><div class='del'>-						     XGBE_SPEEDS);</div><div class='del'>-		if (ret) {</div><div class='del'>-			dev_err(dev, "invalid %s property\n",</div><div class='del'>-				XGBE_TX_AMP_PROPERTY);</div><div class='del'>-			goto err_io;</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		memcpy(pdata-&gt;serdes_tx_amp, xgbe_serdes_tx_amp,</div><div class='del'>-		       sizeof(pdata-&gt;serdes_tx_amp));</div><div class='del'>-	}</div><div class='add'>+	/* Calculate the number of Tx and Rx rings to be created</div><div class='add'>+	 *  -Tx (DMA) Channels map 1-to-1 to Tx Queues so set</div><div class='add'>+	 *   the number of Tx queues to the number of Tx channels</div><div class='add'>+	 *   enabled</div><div class='add'>+	 *  -Rx (DMA) Channels do not map 1-to-1 so use the actual</div><div class='add'>+	 *   number of Rx queues or maximum allowed</div><div class='add'>+	 */</div><div class='add'>+	pdata-&gt;tx_ring_count = min_t(unsigned int, num_online_cpus(),</div><div class='add'>+				     pdata-&gt;hw_feat.tx_ch_cnt);</div><div class='add'>+	pdata-&gt;tx_ring_count = min_t(unsigned int, pdata-&gt;tx_ring_count,</div><div class='add'>+				     pdata-&gt;tx_max_channel_count);</div><div class='add'>+	pdata-&gt;tx_ring_count = min_t(unsigned int, pdata-&gt;tx_ring_count,</div><div class='add'>+				     pdata-&gt;tx_max_q_count);</div><div class='ctx'> </div><div class='del'>-	if (device_property_present(phy_dev, XGBE_DFE_CFG_PROPERTY)) {</div><div class='del'>-		ret = device_property_read_u32_array(phy_dev,</div><div class='del'>-						     XGBE_DFE_CFG_PROPERTY,</div><div class='del'>-						     pdata-&gt;serdes_dfe_tap_cfg,</div><div class='del'>-						     XGBE_SPEEDS);</div><div class='del'>-		if (ret) {</div><div class='del'>-			dev_err(dev, "invalid %s property\n",</div><div class='del'>-				XGBE_DFE_CFG_PROPERTY);</div><div class='del'>-			goto err_io;</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		memcpy(pdata-&gt;serdes_dfe_tap_cfg, xgbe_serdes_dfe_tap_cfg,</div><div class='del'>-		       sizeof(pdata-&gt;serdes_dfe_tap_cfg));</div><div class='del'>-	}</div><div class='add'>+	pdata-&gt;tx_q_count = pdata-&gt;tx_ring_count;</div><div class='ctx'> </div><div class='del'>-	if (device_property_present(phy_dev, XGBE_DFE_ENA_PROPERTY)) {</div><div class='del'>-		ret = device_property_read_u32_array(phy_dev,</div><div class='del'>-						     XGBE_DFE_ENA_PROPERTY,</div><div class='del'>-						     pdata-&gt;serdes_dfe_tap_ena,</div><div class='del'>-						     XGBE_SPEEDS);</div><div class='del'>-		if (ret) {</div><div class='del'>-			dev_err(dev, "invalid %s property\n",</div><div class='del'>-				XGBE_DFE_ENA_PROPERTY);</div><div class='del'>-			goto err_io;</div><div class='del'>-		}</div><div class='del'>-	} else {</div><div class='del'>-		memcpy(pdata-&gt;serdes_dfe_tap_ena, xgbe_serdes_dfe_tap_ena,</div><div class='del'>-		       sizeof(pdata-&gt;serdes_dfe_tap_ena));</div><div class='del'>-	}</div><div class='add'>+	pdata-&gt;rx_ring_count = min_t(unsigned int, num_online_cpus(),</div><div class='add'>+				     pdata-&gt;hw_feat.rx_ch_cnt);</div><div class='add'>+	pdata-&gt;rx_ring_count = min_t(unsigned int, pdata-&gt;rx_ring_count,</div><div class='add'>+				     pdata-&gt;rx_max_channel_count);</div><div class='ctx'> </div><div class='del'>-	/* Obtain device settings unique to ACPI/OF */</div><div class='del'>-	if (pdata-&gt;use_acpi)</div><div class='del'>-		ret = xgbe_acpi_support(pdata);</div><div class='del'>-	else</div><div class='del'>-		ret = xgbe_of_support(pdata);</div><div class='del'>-	if (ret)</div><div class='del'>-		goto err_io;</div><div class='del'>-</div><div class='del'>-	/* Set the DMA coherency values */</div><div class='del'>-	pdata-&gt;coherent = device_dma_is_coherent(pdata-&gt;dev);</div><div class='del'>-	if (pdata-&gt;coherent) {</div><div class='del'>-		pdata-&gt;axdomain = XGBE_DMA_OS_AXDOMAIN;</div><div class='del'>-		pdata-&gt;arcache = XGBE_DMA_OS_ARCACHE;</div><div class='del'>-		pdata-&gt;awcache = XGBE_DMA_OS_AWCACHE;</div><div class='del'>-	} else {</div><div class='del'>-		pdata-&gt;axdomain = XGBE_DMA_SYS_AXDOMAIN;</div><div class='del'>-		pdata-&gt;arcache = XGBE_DMA_SYS_ARCACHE;</div><div class='del'>-		pdata-&gt;awcache = XGBE_DMA_SYS_AWCACHE;</div><div class='del'>-	}</div><div class='add'>+	pdata-&gt;rx_q_count = min_t(unsigned int, pdata-&gt;hw_feat.rx_q_cnt,</div><div class='add'>+				  pdata-&gt;rx_max_q_count);</div><div class='ctx'> </div><div class='del'>-	/* Get the device interrupt */</div><div class='del'>-	ret = platform_get_irq(pdev, 0);</div><div class='del'>-	if (ret &lt; 0) {</div><div class='del'>-		dev_err(dev, "platform_get_irq 0 failed\n");</div><div class='del'>-		goto err_io;</div><div class='add'>+	if (netif_msg_probe(pdata)) {</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "TX/RX DMA channel count = %u/%u\n",</div><div class='add'>+			pdata-&gt;tx_ring_count, pdata-&gt;rx_ring_count);</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "TX/RX hardware queue count = %u/%u\n",</div><div class='add'>+			pdata-&gt;tx_q_count, pdata-&gt;rx_q_count);</div><div class='ctx'> 	}</div><div class='del'>-	pdata-&gt;dev_irq = ret;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	/* Get the auto-negotiation interrupt */</div><div class='del'>-	ret = platform_get_irq(phy_pdev, phy_irqnum++);</div><div class='del'>-	if (ret &lt; 0) {</div><div class='del'>-		dev_err(dev, "platform_get_irq phy 0 failed\n");</div><div class='del'>-		goto err_io;</div><div class='del'>-	}</div><div class='del'>-	pdata-&gt;an_irq = ret;</div><div class='add'>+int xgbe_config_netdev(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct net_device *netdev = pdata-&gt;netdev;</div><div class='add'>+	struct device *dev = pdata-&gt;dev;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	netdev-&gt;irq = pdata-&gt;dev_irq;</div><div class='ctx'> 	netdev-&gt;base_addr = (unsigned long)pdata-&gt;xgmac_regs;</div><div class='del'>-	memcpy(netdev-&gt;dev_addr, pdata-&gt;mac_addr, netdev-&gt;addr_len);</div><div class='add'>+	eth_hw_addr_set(netdev, pdata-&gt;mac_addr);</div><div class='ctx'> </div><div class='del'>-	/* Set all the function pointers */</div><div class='del'>-	xgbe_init_all_fptrs(pdata);</div><div class='add'>+	/* Initialize ECC timestamps */</div><div class='add'>+	pdata-&gt;tx_sec_period = jiffies;</div><div class='add'>+	pdata-&gt;tx_ded_period = jiffies;</div><div class='add'>+	pdata-&gt;rx_sec_period = jiffies;</div><div class='add'>+	pdata-&gt;rx_ded_period = jiffies;</div><div class='add'>+	pdata-&gt;desc_sec_period = jiffies;</div><div class='add'>+	pdata-&gt;desc_ded_period = jiffies;</div><div class='ctx'> </div><div class='ctx'> 	/* Issue software reset to device */</div><div class='del'>-	pdata-&gt;hw_if.exit(pdata);</div><div class='del'>-</div><div class='del'>-	/* Populate the hardware features */</div><div class='del'>-	xgbe_get_all_hw_features(pdata);</div><div class='add'>+	ret = pdata-&gt;hw_if.exit(pdata);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "software reset failed\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Set default configuration data */</div><div class='ctx'> 	xgbe_default_config(pdata);</div><div class='hunk'>@@ -657,48 +183,47 @@ static int xgbe_probe(struct platform_device *pdev)</div><div class='ctx'> 					DMA_BIT_MASK(pdata-&gt;hw_feat.dma_width));</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(dev, "dma_set_mask_and_coherent failed\n");</div><div class='del'>-		goto err_io;</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Calculate the number of Tx and Rx rings to be created</div><div class='del'>-	 *  -Tx (DMA) Channels map 1-to-1 to Tx Queues so set</div><div class='del'>-	 *   the number of Tx queues to the number of Tx channels</div><div class='del'>-	 *   enabled</div><div class='del'>-	 *  -Rx (DMA) Channels do not map 1-to-1 so use the actual</div><div class='del'>-	 *   number of Rx queues</div><div class='del'>-	 */</div><div class='del'>-	pdata-&gt;tx_ring_count = min_t(unsigned int, num_online_cpus(),</div><div class='del'>-				     pdata-&gt;hw_feat.tx_ch_cnt);</div><div class='del'>-	pdata-&gt;tx_q_count = pdata-&gt;tx_ring_count;</div><div class='del'>-	ret = netif_set_real_num_tx_queues(netdev, pdata-&gt;tx_ring_count);</div><div class='del'>-	if (ret) {</div><div class='del'>-		dev_err(dev, "error setting real tx queue count\n");</div><div class='del'>-		goto err_io;</div><div class='del'>-	}</div><div class='add'>+	/* Set default max values if not provided */</div><div class='add'>+	if (!pdata-&gt;tx_max_fifo_size)</div><div class='add'>+		pdata-&gt;tx_max_fifo_size = pdata-&gt;hw_feat.tx_fifo_size;</div><div class='add'>+	if (!pdata-&gt;rx_max_fifo_size)</div><div class='add'>+		pdata-&gt;rx_max_fifo_size = pdata-&gt;hw_feat.rx_fifo_size;</div><div class='ctx'> </div><div class='del'>-	pdata-&gt;rx_ring_count = min_t(unsigned int,</div><div class='del'>-				     netif_get_num_default_rss_queues(),</div><div class='del'>-				     pdata-&gt;hw_feat.rx_ch_cnt);</div><div class='del'>-	pdata-&gt;rx_q_count = pdata-&gt;hw_feat.rx_q_cnt;</div><div class='del'>-	ret = netif_set_real_num_rx_queues(netdev, pdata-&gt;rx_ring_count);</div><div class='del'>-	if (ret) {</div><div class='del'>-		dev_err(dev, "error setting real rx queue count\n");</div><div class='del'>-		goto err_io;</div><div class='add'>+	/* Set and validate the number of descriptors for a ring */</div><div class='add'>+	BUILD_BUG_ON_NOT_POWER_OF_2(XGBE_TX_DESC_CNT);</div><div class='add'>+	pdata-&gt;tx_desc_count = XGBE_TX_DESC_CNT;</div><div class='add'>+</div><div class='add'>+	BUILD_BUG_ON_NOT_POWER_OF_2(XGBE_RX_DESC_CNT);</div><div class='add'>+	pdata-&gt;rx_desc_count = XGBE_RX_DESC_CNT;</div><div class='add'>+</div><div class='add'>+	/* Adjust the number of queues based on interrupts assigned */</div><div class='add'>+	if (pdata-&gt;channel_irq_count) {</div><div class='add'>+		pdata-&gt;tx_ring_count = min_t(unsigned int, pdata-&gt;tx_ring_count,</div><div class='add'>+					     pdata-&gt;channel_irq_count);</div><div class='add'>+		pdata-&gt;rx_ring_count = min_t(unsigned int, pdata-&gt;rx_ring_count,</div><div class='add'>+					     pdata-&gt;channel_irq_count);</div><div class='add'>+</div><div class='add'>+		if (netif_msg_probe(pdata))</div><div class='add'>+			dev_dbg(pdata-&gt;dev,</div><div class='add'>+				"adjusted TX/RX DMA channel count = %u/%u\n",</div><div class='add'>+				pdata-&gt;tx_ring_count, pdata-&gt;rx_ring_count);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Initialize RSS hash key and lookup table */</div><div class='add'>+	/* Initialize RSS hash key */</div><div class='ctx'> 	netdev_rss_key_fill(pdata-&gt;rss_key, sizeof(pdata-&gt;rss_key));</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; XGBE_RSS_MAX_TABLE_SIZE; i++)</div><div class='del'>-		XGMAC_SET_BITS(pdata-&gt;rss_table[i], MAC_RSSDR, DMCH,</div><div class='del'>-			       i % pdata-&gt;rx_ring_count);</div><div class='del'>-</div><div class='ctx'> 	XGMAC_SET_BITS(pdata-&gt;rss_options, MAC_RSSCR, IP2TE, 1);</div><div class='ctx'> 	XGMAC_SET_BITS(pdata-&gt;rss_options, MAC_RSSCR, TCP4TE, 1);</div><div class='ctx'> 	XGMAC_SET_BITS(pdata-&gt;rss_options, MAC_RSSCR, UDP4TE, 1);</div><div class='ctx'> </div><div class='ctx'> 	/* Call MDIO/PHY initialization routine */</div><div class='del'>-	pdata-&gt;phy_if.phy_init(pdata);</div><div class='add'>+	pdata-&gt;debugfs_an_cdr_workaround = pdata-&gt;vdata-&gt;an_cdr_workaround;</div><div class='add'>+	ret = pdata-&gt;phy_if.phy_init(pdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Set device operations */</div><div class='ctx'> 	netdev-&gt;netdev_ops = xgbe_get_netdev_ops();</div><div class='hunk'>@@ -722,6 +247,23 @@ static int xgbe_probe(struct platform_device *pdev)</div><div class='ctx'> 	if (pdata-&gt;hw_feat.rss)</div><div class='ctx'> 		netdev-&gt;hw_features |= NETIF_F_RXHASH;</div><div class='ctx'> </div><div class='add'>+	if (pdata-&gt;hw_feat.vxn) {</div><div class='add'>+		netdev-&gt;hw_enc_features = NETIF_F_SG |</div><div class='add'>+					  NETIF_F_IP_CSUM |</div><div class='add'>+					  NETIF_F_IPV6_CSUM |</div><div class='add'>+					  NETIF_F_RXCSUM |</div><div class='add'>+					  NETIF_F_TSO |</div><div class='add'>+					  NETIF_F_TSO6 |</div><div class='add'>+					  NETIF_F_GRO |</div><div class='add'>+					  NETIF_F_GSO_UDP_TUNNEL |</div><div class='add'>+					  NETIF_F_GSO_UDP_TUNNEL_CSUM;</div><div class='add'>+</div><div class='add'>+		netdev-&gt;hw_features |= NETIF_F_GSO_UDP_TUNNEL |</div><div class='add'>+				       NETIF_F_GSO_UDP_TUNNEL_CSUM;</div><div class='add'>+</div><div class='add'>+		netdev-&gt;udp_tunnel_nic_info = xgbe_get_udp_tunnel_info();</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	netdev-&gt;vlan_features |= NETIF_F_SG |</div><div class='ctx'> 				 NETIF_F_IP_CSUM |</div><div class='ctx'> 				 NETIF_F_IPV6_CSUM |</div><div class='hunk'>@@ -732,6 +274,8 @@ static int xgbe_probe(struct platform_device *pdev)</div><div class='ctx'> 	pdata-&gt;netdev_features = netdev-&gt;features;</div><div class='ctx'> </div><div class='ctx'> 	netdev-&gt;priv_flags |= IFF_UNICAST_FLT;</div><div class='add'>+	netdev-&gt;min_mtu = 0;</div><div class='add'>+	netdev-&gt;max_mtu = XGMAC_GIANT_PACKET_MTU - XGBE_ETH_FRAME_HDR;</div><div class='ctx'> </div><div class='ctx'> 	/* Use default watchdog timeout */</div><div class='ctx'> 	netdev-&gt;watchdog_timeo = 0;</div><div class='hunk'>@@ -743,160 +287,95 @@ static int xgbe_probe(struct platform_device *pdev)</div><div class='ctx'> 	ret = register_netdev(netdev);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		dev_err(dev, "net device registration failed\n");</div><div class='del'>-		goto err_io;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Create the PHY/ANEG name based on netdev name */</div><div class='del'>-	snprintf(pdata-&gt;an_name, sizeof(pdata-&gt;an_name) - 1, "%s-pcs",</div><div class='del'>-		 netdev_name(netdev));</div><div class='del'>-</div><div class='del'>-	/* Create workqueues */</div><div class='del'>-	pdata-&gt;dev_workqueue =</div><div class='del'>-		create_singlethread_workqueue(netdev_name(netdev));</div><div class='del'>-	if (!pdata-&gt;dev_workqueue) {</div><div class='del'>-		netdev_err(netdev, "device workqueue creation failed\n");</div><div class='del'>-		ret = -ENOMEM;</div><div class='del'>-		goto err_netdev;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pdata-&gt;an_workqueue =</div><div class='del'>-		create_singlethread_workqueue(pdata-&gt;an_name);</div><div class='del'>-	if (!pdata-&gt;an_workqueue) {</div><div class='del'>-		netdev_err(netdev, "phy workqueue creation failed\n");</div><div class='del'>-		ret = -ENOMEM;</div><div class='del'>-		goto err_wq;</div><div class='add'>+		return ret;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	xgbe_ptp_register(pdata);</div><div class='add'>+	if (IS_REACHABLE(CONFIG_PTP_1588_CLOCK))</div><div class='add'>+		xgbe_ptp_register(pdata);</div><div class='ctx'> </div><div class='ctx'> 	xgbe_debugfs_init(pdata);</div><div class='ctx'> </div><div class='del'>-	platform_device_put(phy_pdev);</div><div class='del'>-</div><div class='del'>-	netdev_notice(netdev, "net device enabled\n");</div><div class='del'>-</div><div class='del'>-	DBGPR("&lt;-- xgbe_probe\n");</div><div class='add'>+	netif_dbg(pdata, drv, pdata-&gt;netdev, "%u Tx software queues\n",</div><div class='add'>+		  pdata-&gt;tx_ring_count);</div><div class='add'>+	netif_dbg(pdata, drv, pdata-&gt;netdev, "%u Rx software queues\n",</div><div class='add'>+		  pdata-&gt;rx_ring_count);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='del'>-</div><div class='del'>-err_wq:</div><div class='del'>-	destroy_workqueue(pdata-&gt;dev_workqueue);</div><div class='del'>-</div><div class='del'>-err_netdev:</div><div class='del'>-	unregister_netdev(netdev);</div><div class='del'>-</div><div class='del'>-err_io:</div><div class='del'>-	platform_device_put(phy_pdev);</div><div class='del'>-</div><div class='del'>-err_phydev:</div><div class='del'>-	free_netdev(netdev);</div><div class='del'>-</div><div class='del'>-err_alloc:</div><div class='del'>-	dev_notice(dev, "net device not enabled\n");</div><div class='del'>-</div><div class='del'>-	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgbe_remove(struct platform_device *pdev)</div><div class='add'>+void xgbe_deconfig_netdev(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *netdev = platform_get_drvdata(pdev);</div><div class='del'>-	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='del'>-</div><div class='del'>-	DBGPR("--&gt;xgbe_remove\n");</div><div class='add'>+	struct net_device *netdev = pdata-&gt;netdev;</div><div class='ctx'> </div><div class='ctx'> 	xgbe_debugfs_exit(pdata);</div><div class='ctx'> </div><div class='del'>-	xgbe_ptp_unregister(pdata);</div><div class='del'>-</div><div class='del'>-	flush_workqueue(pdata-&gt;an_workqueue);</div><div class='del'>-	destroy_workqueue(pdata-&gt;an_workqueue);</div><div class='del'>-</div><div class='del'>-	flush_workqueue(pdata-&gt;dev_workqueue);</div><div class='del'>-	destroy_workqueue(pdata-&gt;dev_workqueue);</div><div class='add'>+	if (IS_REACHABLE(CONFIG_PTP_1588_CLOCK))</div><div class='add'>+		xgbe_ptp_unregister(pdata);</div><div class='ctx'> </div><div class='ctx'> 	unregister_netdev(netdev);</div><div class='ctx'> </div><div class='del'>-	free_netdev(netdev);</div><div class='del'>-</div><div class='del'>-	DBGPR("&lt;--xgbe_remove\n");</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='add'>+	pdata-&gt;phy_if.phy_exit(pdata);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_PM</div><div class='del'>-static int xgbe_suspend(struct device *dev)</div><div class='add'>+static int xgbe_netdev_event(struct notifier_block *nb, unsigned long event,</div><div class='add'>+			     void *data)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *netdev = dev_get_drvdata(dev);</div><div class='add'>+	struct net_device *netdev = netdev_notifier_info_to_dev(data);</div><div class='ctx'> 	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='del'>-	int ret = 0;</div><div class='del'>-</div><div class='del'>-	DBGPR("--&gt;xgbe_suspend\n");</div><div class='ctx'> </div><div class='del'>-	if (netif_running(netdev))</div><div class='del'>-		ret = xgbe_powerdown(netdev, XGMAC_DRIVER_CONTEXT);</div><div class='add'>+	if (netdev-&gt;netdev_ops != xgbe_get_netdev_ops())</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='del'>-	pdata-&gt;lpm_ctrl = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1);</div><div class='del'>-	pdata-&gt;lpm_ctrl |= MDIO_CTRL1_LPOWER;</div><div class='del'>-	XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, pdata-&gt;lpm_ctrl);</div><div class='add'>+	switch (event) {</div><div class='add'>+	case NETDEV_CHANGENAME:</div><div class='add'>+		xgbe_debugfs_rename(pdata);</div><div class='add'>+		break;</div><div class='ctx'> </div><div class='del'>-	DBGPR("&lt;--xgbe_suspend\n");</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+out:</div><div class='add'>+	return NOTIFY_DONE;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgbe_resume(struct device *dev)</div><div class='add'>+static struct notifier_block xgbe_netdev_notifier = {</div><div class='add'>+	.notifier_call = xgbe_netdev_event,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init xgbe_mod_init(void)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *netdev = dev_get_drvdata(dev);</div><div class='del'>-	struct xgbe_prv_data *pdata = netdev_priv(netdev);</div><div class='del'>-	int ret = 0;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	DBGPR("--&gt;xgbe_resume\n");</div><div class='add'>+	ret = register_netdevice_notifier(&amp;xgbe_netdev_notifier);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-	pdata-&gt;lpm_ctrl &amp;= ~MDIO_CTRL1_LPOWER;</div><div class='del'>-	XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, pdata-&gt;lpm_ctrl);</div><div class='add'>+	ret = xgbe_platform_init();</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_platform_init;</div><div class='ctx'> </div><div class='del'>-	if (netif_running(netdev))</div><div class='del'>-		ret = xgbe_powerup(netdev, XGMAC_DRIVER_CONTEXT);</div><div class='add'>+	ret = xgbe_pci_init();</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_pci_init;</div><div class='ctx'> </div><div class='del'>-	DBGPR("&lt;--xgbe_resume\n");</div><div class='add'>+	return 0;</div><div class='ctx'> </div><div class='add'>+err_pci_init:</div><div class='add'>+	xgbe_platform_exit();</div><div class='add'>+err_platform_init:</div><div class='add'>+	unregister_netdevice_notifier(&amp;xgbe_netdev_notifier);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='del'>-#endif /* CONFIG_PM */</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_ACPI</div><div class='del'>-static const struct acpi_device_id xgbe_acpi_match[] = {</div><div class='del'>-	{ "AMDI8001", 0 },</div><div class='del'>-	{},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-MODULE_DEVICE_TABLE(acpi, xgbe_acpi_match);</div><div class='del'>-#endif</div><div class='del'>-</div><div class='del'>-#ifdef CONFIG_OF</div><div class='del'>-static const struct of_device_id xgbe_of_match[] = {</div><div class='del'>-	{ .compatible = "amd,xgbe-seattle-v1a", },</div><div class='del'>-	{},</div><div class='del'>-};</div><div class='ctx'> </div><div class='del'>-MODULE_DEVICE_TABLE(of, xgbe_of_match);</div><div class='del'>-#endif</div><div class='add'>+static void __exit xgbe_mod_exit(void)</div><div class='add'>+{</div><div class='add'>+	xgbe_pci_exit();</div><div class='ctx'> </div><div class='del'>-static SIMPLE_DEV_PM_OPS(xgbe_pm_ops, xgbe_suspend, xgbe_resume);</div><div class='add'>+	xgbe_platform_exit();</div><div class='ctx'> </div><div class='del'>-static struct platform_driver xgbe_driver = {</div><div class='del'>-	.driver = {</div><div class='del'>-		.name = "amd-xgbe",</div><div class='del'>-#ifdef CONFIG_ACPI</div><div class='del'>-		.acpi_match_table = xgbe_acpi_match,</div><div class='del'>-#endif</div><div class='del'>-#ifdef CONFIG_OF</div><div class='del'>-		.of_match_table = xgbe_of_match,</div><div class='del'>-#endif</div><div class='del'>-		.pm = &amp;xgbe_pm_ops,</div><div class='del'>-	},</div><div class='del'>-	.probe = xgbe_probe,</div><div class='del'>-	.remove = xgbe_remove,</div><div class='del'>-};</div><div class='add'>+	unregister_netdevice_notifier(&amp;xgbe_netdev_notifier);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-module_platform_driver(xgbe_driver);</div><div class='add'>+module_init(xgbe_mod_init);</div><div class='add'>+module_exit(xgbe_mod_exit);</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c b/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c<br/>index 9088c3a35a20..7675bb98f029 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/xgbe/xgbe-mdio.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe-mdio.c</a></div><div class='hunk'>@@ -1,119 +1,11 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='ctx'> /*</div><div class='del'>- * AMD 10Gb Ethernet driver</div><div class='del'>- *</div><div class='del'>- * This file is available to you under your choice of the following two</div><div class='del'>- * licenses:</div><div class='del'>- *</div><div class='del'>- * License 1: GPLv2</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014 Advanced Micro Devices, Inc.</div><div class='del'>- *</div><div class='del'>- * This file is free software; you may copy, redistribute and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation, either version 2 of the License, or (at</div><div class='del'>- * your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This file is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- * License 2: Modified BSD</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014 Advanced Micro Devices, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * Redistribution and use in source and binary forms, with or without</div><div class='del'>- * modification, are permitted provided that the following conditions are met:</div><div class='del'>- *     * Redistributions of source code must retain the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer.</div><div class='del'>- *     * Redistributions in binary form must reproduce the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer in the</div><div class='del'>- *       documentation and/or other materials provided with the distribution.</div><div class='del'>- *     * Neither the name of Advanced Micro Devices, Inc. nor the</div><div class='del'>- *       names of its contributors may be used to endorse or promote products</div><div class='del'>- *       derived from this software without specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"</div><div class='del'>- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE</div><div class='del'>- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE</div><div class='del'>- * ARE DISCLAIMED. IN NO EVENT SHALL &lt;COPYRIGHT HOLDER&gt; BE LIABLE FOR ANY</div><div class='del'>- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES</div><div class='del'>- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;</div><div class='del'>- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND</div><div class='del'>- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='del'>- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF</div><div class='del'>- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;linux/kmod.h&gt;</div><div class='ctx'> #include &lt;linux/mdio.h&gt;</div><div class='hunk'>@@ -125,306 +17,288 @@</div><div class='ctx'> #include "xgbe.h"</div><div class='ctx'> #include "xgbe-common.h"</div><div class='ctx'> </div><div class='del'>-static void xgbe_an_enable_kr_training(struct xgbe_prv_data *pdata)</div><div class='add'>+static int xgbe_phy_module_eeprom(struct xgbe_prv_data *pdata,</div><div class='add'>+				  struct ethtool_eeprom *eeprom, u8 *data)</div><div class='ctx'> {</div><div class='del'>-	unsigned int reg;</div><div class='del'>-</div><div class='del'>-	reg = XMDIO_READ(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL);</div><div class='add'>+	if (!pdata-&gt;phy_if.phy_impl.module_eeprom)</div><div class='add'>+		return -ENXIO;</div><div class='ctx'> </div><div class='del'>-	reg |= XGBE_KR_TRAINING_ENABLE;</div><div class='del'>-	XMDIO_WRITE(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL, reg);</div><div class='add'>+	return pdata-&gt;phy_if.phy_impl.module_eeprom(pdata, eeprom, data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xgbe_an_disable_kr_training(struct xgbe_prv_data *pdata)</div><div class='add'>+static int xgbe_phy_module_info(struct xgbe_prv_data *pdata,</div><div class='add'>+				struct ethtool_modinfo *modinfo)</div><div class='ctx'> {</div><div class='del'>-	unsigned int reg;</div><div class='del'>-</div><div class='del'>-	reg = XMDIO_READ(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL);</div><div class='add'>+	if (!pdata-&gt;phy_if.phy_impl.module_info)</div><div class='add'>+		return -ENXIO;</div><div class='ctx'> </div><div class='del'>-	reg &amp;= ~XGBE_KR_TRAINING_ENABLE;</div><div class='del'>-	XMDIO_WRITE(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL, reg);</div><div class='add'>+	return pdata-&gt;phy_if.phy_impl.module_info(pdata, modinfo);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xgbe_pcs_power_cycle(struct xgbe_prv_data *pdata)</div><div class='add'>+static void xgbe_an37_clear_interrupts(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	unsigned int reg;</div><div class='add'>+	int reg;</div><div class='ctx'> </div><div class='del'>-	reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1);</div><div class='add'>+	reg = XMDIO_READ(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_STAT);</div><div class='add'>+	reg &amp;= ~XGBE_AN_CL37_INT_MASK;</div><div class='add'>+	XMDIO_WRITE(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_STAT, reg);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	reg |= MDIO_CTRL1_LPOWER;</div><div class='del'>-	XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, reg);</div><div class='add'>+static void xgbe_an37_disable_interrupts(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	int reg;</div><div class='ctx'> </div><div class='del'>-	usleep_range(75, 100);</div><div class='add'>+	reg = XMDIO_READ(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_CTRL);</div><div class='add'>+	reg &amp;= ~XGBE_AN_CL37_INT_MASK;</div><div class='add'>+	XMDIO_WRITE(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_CTRL, reg);</div><div class='ctx'> </div><div class='del'>-	reg &amp;= ~MDIO_CTRL1_LPOWER;</div><div class='del'>-	XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, reg);</div><div class='add'>+	reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_PCS_DIG_CTRL);</div><div class='add'>+	reg &amp;= ~XGBE_PCS_CL37_BP;</div><div class='add'>+	XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_PCS_DIG_CTRL, reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xgbe_serdes_start_ratechange(struct xgbe_prv_data *pdata)</div><div class='add'>+static void xgbe_an37_enable_interrupts(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	/* Assert Rx and Tx ratechange */</div><div class='del'>-	XSIR1_IOWRITE_BITS(pdata, SIR1_SPEED, RATECHANGE, 1);</div><div class='add'>+	int reg;</div><div class='add'>+</div><div class='add'>+	reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_PCS_DIG_CTRL);</div><div class='add'>+	reg |= XGBE_PCS_CL37_BP;</div><div class='add'>+	XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_PCS_DIG_CTRL, reg);</div><div class='add'>+</div><div class='add'>+	reg = XMDIO_READ(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_CTRL);</div><div class='add'>+	reg |= XGBE_AN_CL37_INT_MASK;</div><div class='add'>+	XMDIO_WRITE(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_CTRL, reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xgbe_serdes_complete_ratechange(struct xgbe_prv_data *pdata)</div><div class='add'>+static void xgbe_an73_clear_interrupts(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	unsigned int wait;</div><div class='del'>-	u16 status;</div><div class='add'>+	XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_INT, 0);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	/* Release Rx and Tx ratechange */</div><div class='del'>-	XSIR1_IOWRITE_BITS(pdata, SIR1_SPEED, RATECHANGE, 0);</div><div class='add'>+static void xgbe_an73_disable_interrupts(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_INTMASK, 0);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	/* Wait for Rx and Tx ready */</div><div class='del'>-	wait = XGBE_RATECHANGE_COUNT;</div><div class='del'>-	while (wait--) {</div><div class='del'>-		usleep_range(50, 75);</div><div class='add'>+static void xgbe_an73_enable_interrupts(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_INTMASK, XGBE_AN_CL73_INT_MASK);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-		status = XSIR0_IOREAD(pdata, SIR0_STATUS);</div><div class='del'>-		if (XSIR_GET_BITS(status, SIR0_STATUS, RX_READY) &amp;&amp;</div><div class='del'>-		    XSIR_GET_BITS(status, SIR0_STATUS, TX_READY))</div><div class='del'>-			goto rx_reset;</div><div class='add'>+static void xgbe_an_enable_interrupts(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	switch (pdata-&gt;an_mode) {</div><div class='add'>+	case XGBE_AN_MODE_CL73:</div><div class='add'>+	case XGBE_AN_MODE_CL73_REDRV:</div><div class='add'>+		xgbe_an73_enable_interrupts(pdata);</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_AN_MODE_CL37:</div><div class='add'>+	case XGBE_AN_MODE_CL37_SGMII:</div><div class='add'>+		xgbe_an37_enable_interrupts(pdata);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='ctx'> 	}</div><div class='del'>-</div><div class='del'>-	netif_dbg(pdata, link, pdata-&gt;netdev, "SerDes rx/tx not ready (%#hx)\n",</div><div class='del'>-		  status);</div><div class='del'>-</div><div class='del'>-rx_reset:</div><div class='del'>-	/* Perform Rx reset for the DFE changes */</div><div class='del'>-	XRXTX_IOWRITE_BITS(pdata, RXTX_REG6, RESETB_RXD, 0);</div><div class='del'>-	XRXTX_IOWRITE_BITS(pdata, RXTX_REG6, RESETB_RXD, 1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xgbe_xgmii_mode(struct xgbe_prv_data *pdata)</div><div class='add'>+static void xgbe_an_clear_interrupts_all(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	unsigned int reg;</div><div class='del'>-</div><div class='del'>-	/* Enable KR training */</div><div class='del'>-	xgbe_an_enable_kr_training(pdata);</div><div class='add'>+	xgbe_an73_clear_interrupts(pdata);</div><div class='add'>+	xgbe_an37_clear_interrupts(pdata);</div><div class='add'>+}</div><div class='ctx'> </div><div class='add'>+static void xgbe_kr_mode(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='ctx'> 	/* Set MAC to 10G speed */</div><div class='del'>-	pdata-&gt;hw_if.set_xgmii_speed(pdata);</div><div class='del'>-</div><div class='del'>-	/* Set PCS to KR/10G speed */</div><div class='del'>-	reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL2);</div><div class='del'>-	reg &amp;= ~MDIO_PCS_CTRL2_TYPE;</div><div class='del'>-	reg |= MDIO_PCS_CTRL2_10GBR;</div><div class='del'>-	XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL2, reg);</div><div class='del'>-</div><div class='del'>-	reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1);</div><div class='del'>-	reg &amp;= ~MDIO_CTRL1_SPEEDSEL;</div><div class='del'>-	reg |= MDIO_CTRL1_SPEED10G;</div><div class='del'>-	XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, reg);</div><div class='del'>-</div><div class='del'>-	xgbe_pcs_power_cycle(pdata);</div><div class='del'>-</div><div class='del'>-	/* Set SerDes to 10G speed */</div><div class='del'>-	xgbe_serdes_start_ratechange(pdata);</div><div class='del'>-</div><div class='del'>-	XSIR1_IOWRITE_BITS(pdata, SIR1_SPEED, DATARATE, XGBE_SPEED_10000_RATE);</div><div class='del'>-	XSIR1_IOWRITE_BITS(pdata, SIR1_SPEED, WORDMODE, XGBE_SPEED_10000_WORD);</div><div class='del'>-	XSIR1_IOWRITE_BITS(pdata, SIR1_SPEED, PLLSEL, XGBE_SPEED_10000_PLL);</div><div class='del'>-</div><div class='del'>-	XSIR1_IOWRITE_BITS(pdata, SIR1_SPEED, CDR_RATE,</div><div class='del'>-			   pdata-&gt;serdes_cdr_rate[XGBE_SPEED_10000]);</div><div class='del'>-	XSIR1_IOWRITE_BITS(pdata, SIR1_SPEED, TXAMP,</div><div class='del'>-			   pdata-&gt;serdes_tx_amp[XGBE_SPEED_10000]);</div><div class='del'>-	XRXTX_IOWRITE_BITS(pdata, RXTX_REG20, BLWC_ENA,</div><div class='del'>-			   pdata-&gt;serdes_blwc[XGBE_SPEED_10000]);</div><div class='del'>-	XRXTX_IOWRITE_BITS(pdata, RXTX_REG114, PQ_REG,</div><div class='del'>-			   pdata-&gt;serdes_pq_skew[XGBE_SPEED_10000]);</div><div class='del'>-	XRXTX_IOWRITE_BITS(pdata, RXTX_REG129, RXDFE_CONFIG,</div><div class='del'>-			   pdata-&gt;serdes_dfe_tap_cfg[XGBE_SPEED_10000]);</div><div class='del'>-	XRXTX_IOWRITE(pdata, RXTX_REG22,</div><div class='del'>-		      pdata-&gt;serdes_dfe_tap_ena[XGBE_SPEED_10000]);</div><div class='del'>-</div><div class='del'>-	xgbe_serdes_complete_ratechange(pdata);</div><div class='add'>+	pdata-&gt;hw_if.set_speed(pdata, SPEED_10000);</div><div class='ctx'> </div><div class='del'>-	netif_dbg(pdata, link, pdata-&gt;netdev, "10GbE KR mode set\n");</div><div class='add'>+	/* Call PHY implementation support to complete rate change */</div><div class='add'>+	pdata-&gt;phy_if.phy_impl.set_mode(pdata, XGBE_MODE_KR);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xgbe_gmii_2500_mode(struct xgbe_prv_data *pdata)</div><div class='add'>+static void xgbe_kx_2500_mode(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	unsigned int reg;</div><div class='del'>-</div><div class='del'>-	/* Disable KR training */</div><div class='del'>-	xgbe_an_disable_kr_training(pdata);</div><div class='del'>-</div><div class='ctx'> 	/* Set MAC to 2.5G speed */</div><div class='del'>-	pdata-&gt;hw_if.set_gmii_2500_speed(pdata);</div><div class='del'>-</div><div class='del'>-	/* Set PCS to KX/1G speed */</div><div class='del'>-	reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL2);</div><div class='del'>-	reg &amp;= ~MDIO_PCS_CTRL2_TYPE;</div><div class='del'>-	reg |= MDIO_PCS_CTRL2_10GBX;</div><div class='del'>-	XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL2, reg);</div><div class='add'>+	pdata-&gt;hw_if.set_speed(pdata, SPEED_2500);</div><div class='ctx'> </div><div class='del'>-	reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1);</div><div class='del'>-	reg &amp;= ~MDIO_CTRL1_SPEEDSEL;</div><div class='del'>-	reg |= MDIO_CTRL1_SPEED1G;</div><div class='del'>-	XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, reg);</div><div class='del'>-</div><div class='del'>-	xgbe_pcs_power_cycle(pdata);</div><div class='add'>+	/* Call PHY implementation support to complete rate change */</div><div class='add'>+	pdata-&gt;phy_if.phy_impl.set_mode(pdata, XGBE_MODE_KX_2500);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	/* Set SerDes to 2.5G speed */</div><div class='del'>-	xgbe_serdes_start_ratechange(pdata);</div><div class='add'>+static void xgbe_kx_1000_mode(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	/* Set MAC to 1G speed */</div><div class='add'>+	pdata-&gt;hw_if.set_speed(pdata, SPEED_1000);</div><div class='ctx'> </div><div class='del'>-	XSIR1_IOWRITE_BITS(pdata, SIR1_SPEED, DATARATE, XGBE_SPEED_2500_RATE);</div><div class='del'>-	XSIR1_IOWRITE_BITS(pdata, SIR1_SPEED, WORDMODE, XGBE_SPEED_2500_WORD);</div><div class='del'>-	XSIR1_IOWRITE_BITS(pdata, SIR1_SPEED, PLLSEL, XGBE_SPEED_2500_PLL);</div><div class='add'>+	/* Call PHY implementation support to complete rate change */</div><div class='add'>+	pdata-&gt;phy_if.phy_impl.set_mode(pdata, XGBE_MODE_KX_1000);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	XSIR1_IOWRITE_BITS(pdata, SIR1_SPEED, CDR_RATE,</div><div class='del'>-			   pdata-&gt;serdes_cdr_rate[XGBE_SPEED_2500]);</div><div class='del'>-	XSIR1_IOWRITE_BITS(pdata, SIR1_SPEED, TXAMP,</div><div class='del'>-			   pdata-&gt;serdes_tx_amp[XGBE_SPEED_2500]);</div><div class='del'>-	XRXTX_IOWRITE_BITS(pdata, RXTX_REG20, BLWC_ENA,</div><div class='del'>-			   pdata-&gt;serdes_blwc[XGBE_SPEED_2500]);</div><div class='del'>-	XRXTX_IOWRITE_BITS(pdata, RXTX_REG114, PQ_REG,</div><div class='del'>-			   pdata-&gt;serdes_pq_skew[XGBE_SPEED_2500]);</div><div class='del'>-	XRXTX_IOWRITE_BITS(pdata, RXTX_REG129, RXDFE_CONFIG,</div><div class='del'>-			   pdata-&gt;serdes_dfe_tap_cfg[XGBE_SPEED_2500]);</div><div class='del'>-	XRXTX_IOWRITE(pdata, RXTX_REG22,</div><div class='del'>-		      pdata-&gt;serdes_dfe_tap_ena[XGBE_SPEED_2500]);</div><div class='add'>+static void xgbe_sfi_mode(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	/* If a KR re-driver is present, change to KR mode instead */</div><div class='add'>+	if (pdata-&gt;kr_redrv)</div><div class='add'>+		return xgbe_kr_mode(pdata);</div><div class='ctx'> </div><div class='del'>-	xgbe_serdes_complete_ratechange(pdata);</div><div class='add'>+	/* Set MAC to 10G speed */</div><div class='add'>+	pdata-&gt;hw_if.set_speed(pdata, SPEED_10000);</div><div class='ctx'> </div><div class='del'>-	netif_dbg(pdata, link, pdata-&gt;netdev, "2.5GbE KX mode set\n");</div><div class='add'>+	/* Call PHY implementation support to complete rate change */</div><div class='add'>+	pdata-&gt;phy_if.phy_impl.set_mode(pdata, XGBE_MODE_SFI);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xgbe_gmii_mode(struct xgbe_prv_data *pdata)</div><div class='add'>+static void xgbe_x_mode(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	unsigned int reg;</div><div class='del'>-</div><div class='del'>-	/* Disable KR training */</div><div class='del'>-	xgbe_an_disable_kr_training(pdata);</div><div class='del'>-</div><div class='ctx'> 	/* Set MAC to 1G speed */</div><div class='del'>-	pdata-&gt;hw_if.set_gmii_speed(pdata);</div><div class='del'>-</div><div class='del'>-	/* Set PCS to KX/1G speed */</div><div class='del'>-	reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL2);</div><div class='del'>-	reg &amp;= ~MDIO_PCS_CTRL2_TYPE;</div><div class='del'>-	reg |= MDIO_PCS_CTRL2_10GBX;</div><div class='del'>-	XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL2, reg);</div><div class='add'>+	pdata-&gt;hw_if.set_speed(pdata, SPEED_1000);</div><div class='ctx'> </div><div class='del'>-	reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1);</div><div class='del'>-	reg &amp;= ~MDIO_CTRL1_SPEEDSEL;</div><div class='del'>-	reg |= MDIO_CTRL1_SPEED1G;</div><div class='del'>-	XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, reg);</div><div class='add'>+	/* Call PHY implementation support to complete rate change */</div><div class='add'>+	pdata-&gt;phy_if.phy_impl.set_mode(pdata, XGBE_MODE_X);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	xgbe_pcs_power_cycle(pdata);</div><div class='add'>+static void xgbe_sgmii_1000_mode(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	/* Set MAC to 1G speed */</div><div class='add'>+	pdata-&gt;hw_if.set_speed(pdata, SPEED_1000);</div><div class='ctx'> </div><div class='del'>-	/* Set SerDes to 1G speed */</div><div class='del'>-	xgbe_serdes_start_ratechange(pdata);</div><div class='add'>+	/* Call PHY implementation support to complete rate change */</div><div class='add'>+	pdata-&gt;phy_if.phy_impl.set_mode(pdata, XGBE_MODE_SGMII_1000);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	XSIR1_IOWRITE_BITS(pdata, SIR1_SPEED, DATARATE, XGBE_SPEED_1000_RATE);</div><div class='del'>-	XSIR1_IOWRITE_BITS(pdata, SIR1_SPEED, WORDMODE, XGBE_SPEED_1000_WORD);</div><div class='del'>-	XSIR1_IOWRITE_BITS(pdata, SIR1_SPEED, PLLSEL, XGBE_SPEED_1000_PLL);</div><div class='add'>+static void xgbe_sgmii_10_mode(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	/* Set MAC to 10M speed */</div><div class='add'>+	pdata-&gt;hw_if.set_speed(pdata, SPEED_10);</div><div class='ctx'> </div><div class='del'>-	XSIR1_IOWRITE_BITS(pdata, SIR1_SPEED, CDR_RATE,</div><div class='del'>-			   pdata-&gt;serdes_cdr_rate[XGBE_SPEED_1000]);</div><div class='del'>-	XSIR1_IOWRITE_BITS(pdata, SIR1_SPEED, TXAMP,</div><div class='del'>-			   pdata-&gt;serdes_tx_amp[XGBE_SPEED_1000]);</div><div class='del'>-	XRXTX_IOWRITE_BITS(pdata, RXTX_REG20, BLWC_ENA,</div><div class='del'>-			   pdata-&gt;serdes_blwc[XGBE_SPEED_1000]);</div><div class='del'>-	XRXTX_IOWRITE_BITS(pdata, RXTX_REG114, PQ_REG,</div><div class='del'>-			   pdata-&gt;serdes_pq_skew[XGBE_SPEED_1000]);</div><div class='del'>-	XRXTX_IOWRITE_BITS(pdata, RXTX_REG129, RXDFE_CONFIG,</div><div class='del'>-			   pdata-&gt;serdes_dfe_tap_cfg[XGBE_SPEED_1000]);</div><div class='del'>-	XRXTX_IOWRITE(pdata, RXTX_REG22,</div><div class='del'>-		      pdata-&gt;serdes_dfe_tap_ena[XGBE_SPEED_1000]);</div><div class='add'>+	/* Call PHY implementation support to complete rate change */</div><div class='add'>+	pdata-&gt;phy_if.phy_impl.set_mode(pdata, XGBE_MODE_SGMII_10);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	xgbe_serdes_complete_ratechange(pdata);</div><div class='add'>+static void xgbe_sgmii_100_mode(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	/* Set MAC to 1G speed */</div><div class='add'>+	pdata-&gt;hw_if.set_speed(pdata, SPEED_1000);</div><div class='ctx'> </div><div class='del'>-	netif_dbg(pdata, link, pdata-&gt;netdev, "1GbE KX mode set\n");</div><div class='add'>+	/* Call PHY implementation support to complete rate change */</div><div class='add'>+	pdata-&gt;phy_if.phy_impl.set_mode(pdata, XGBE_MODE_SGMII_100);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xgbe_cur_mode(struct xgbe_prv_data *pdata,</div><div class='del'>-			  enum xgbe_mode *mode)</div><div class='add'>+static enum xgbe_mode xgbe_cur_mode(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	unsigned int reg;</div><div class='del'>-</div><div class='del'>-	reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL2);</div><div class='del'>-	if ((reg &amp; MDIO_PCS_CTRL2_TYPE) == MDIO_PCS_CTRL2_10GBR)</div><div class='del'>-		*mode = XGBE_MODE_KR;</div><div class='del'>-	else</div><div class='del'>-		*mode = XGBE_MODE_KX;</div><div class='add'>+	return pdata-&gt;phy_if.phy_impl.cur_mode(pdata);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static bool xgbe_in_kr_mode(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	enum xgbe_mode mode;</div><div class='del'>-</div><div class='del'>-	xgbe_cur_mode(pdata, &amp;mode);</div><div class='add'>+	return (xgbe_cur_mode(pdata) == XGBE_MODE_KR);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	return (mode == XGBE_MODE_KR);</div><div class='add'>+static void xgbe_change_mode(struct xgbe_prv_data *pdata,</div><div class='add'>+			     enum xgbe_mode mode)</div><div class='add'>+{</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case XGBE_MODE_KX_1000:</div><div class='add'>+		xgbe_kx_1000_mode(pdata);</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_MODE_KX_2500:</div><div class='add'>+		xgbe_kx_2500_mode(pdata);</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_MODE_KR:</div><div class='add'>+		xgbe_kr_mode(pdata);</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_MODE_SGMII_10:</div><div class='add'>+		xgbe_sgmii_10_mode(pdata);</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_MODE_SGMII_100:</div><div class='add'>+		xgbe_sgmii_100_mode(pdata);</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_MODE_SGMII_1000:</div><div class='add'>+		xgbe_sgmii_1000_mode(pdata);</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_MODE_X:</div><div class='add'>+		xgbe_x_mode(pdata);</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_MODE_SFI:</div><div class='add'>+		xgbe_sfi_mode(pdata);</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_MODE_UNKNOWN:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		netif_dbg(pdata, link, pdata-&gt;netdev,</div><div class='add'>+			  "invalid operation mode requested (%u)\n", mode);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgbe_switch_mode(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	/* If we are in KR switch to KX, and vice-versa */</div><div class='del'>-	if (xgbe_in_kr_mode(pdata)) {</div><div class='del'>-		if (pdata-&gt;speed_set == XGBE_SPEEDSET_1000_10000)</div><div class='del'>-			xgbe_gmii_mode(pdata);</div><div class='del'>-		else</div><div class='del'>-			xgbe_gmii_2500_mode(pdata);</div><div class='del'>-	} else {</div><div class='del'>-		xgbe_xgmii_mode(pdata);</div><div class='del'>-	}</div><div class='add'>+	xgbe_change_mode(pdata, pdata-&gt;phy_if.phy_impl.switch_mode(pdata));</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xgbe_set_mode(struct xgbe_prv_data *pdata,</div><div class='add'>+static bool xgbe_set_mode(struct xgbe_prv_data *pdata,</div><div class='ctx'> 			  enum xgbe_mode mode)</div><div class='ctx'> {</div><div class='del'>-	enum xgbe_mode cur_mode;</div><div class='add'>+	if (mode == xgbe_cur_mode(pdata))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	xgbe_change_mode(pdata, mode);</div><div class='ctx'> </div><div class='del'>-	xgbe_cur_mode(pdata, &amp;cur_mode);</div><div class='del'>-	if (mode != cur_mode)</div><div class='del'>-		xgbe_switch_mode(pdata);</div><div class='add'>+	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool xgbe_use_xgmii_mode(struct xgbe_prv_data *pdata)</div><div class='add'>+static bool xgbe_use_mode(struct xgbe_prv_data *pdata,</div><div class='add'>+			  enum xgbe_mode mode)</div><div class='ctx'> {</div><div class='del'>-	if (pdata-&gt;phy.autoneg == AUTONEG_ENABLE) {</div><div class='del'>-		if (pdata-&gt;phy.advertising &amp; ADVERTISED_10000baseKR_Full)</div><div class='del'>-			return true;</div><div class='del'>-	} else {</div><div class='del'>-		if (pdata-&gt;phy.speed == SPEED_10000)</div><div class='del'>-			return true;</div><div class='del'>-	}</div><div class='add'>+	return pdata-&gt;phy_if.phy_impl.use_mode(pdata, mode);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_an37_set(struct xgbe_prv_data *pdata, bool enable,</div><div class='add'>+			  bool restart)</div><div class='add'>+{</div><div class='add'>+	unsigned int reg;</div><div class='add'>+</div><div class='add'>+	reg = XMDIO_READ(pdata, MDIO_MMD_VEND2, MDIO_CTRL1);</div><div class='add'>+	reg &amp;= ~MDIO_VEND2_CTRL1_AN_ENABLE;</div><div class='add'>+</div><div class='add'>+	if (enable)</div><div class='add'>+		reg |= MDIO_VEND2_CTRL1_AN_ENABLE;</div><div class='add'>+</div><div class='add'>+	if (restart)</div><div class='add'>+		reg |= MDIO_VEND2_CTRL1_AN_RESTART;</div><div class='add'>+</div><div class='add'>+	XMDIO_WRITE(pdata, MDIO_MMD_VEND2, MDIO_CTRL1, reg);</div><div class='ctx'> </div><div class='del'>-	return false;</div><div class='add'>+	reg = XMDIO_READ(pdata, MDIO_MMD_VEND2, MDIO_PCS_DIG_CTRL);</div><div class='add'>+	reg |= XGBE_VEND2_MAC_AUTO_SW;</div><div class='add'>+	XMDIO_WRITE(pdata, MDIO_MMD_VEND2, MDIO_PCS_DIG_CTRL, reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool xgbe_use_gmii_2500_mode(struct xgbe_prv_data *pdata)</div><div class='add'>+static void xgbe_an37_restart(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	if (pdata-&gt;phy.autoneg == AUTONEG_ENABLE) {</div><div class='del'>-		if (pdata-&gt;phy.advertising &amp; ADVERTISED_2500baseX_Full)</div><div class='del'>-			return true;</div><div class='del'>-	} else {</div><div class='del'>-		if (pdata-&gt;phy.speed == SPEED_2500)</div><div class='del'>-			return true;</div><div class='del'>-	}</div><div class='add'>+	xgbe_an37_enable_interrupts(pdata);</div><div class='add'>+	xgbe_an37_set(pdata, true, true);</div><div class='ctx'> </div><div class='del'>-	return false;</div><div class='add'>+	netif_dbg(pdata, link, pdata-&gt;netdev, "CL37 AN enabled/restarted\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool xgbe_use_gmii_mode(struct xgbe_prv_data *pdata)</div><div class='add'>+static void xgbe_an37_disable(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	if (pdata-&gt;phy.autoneg == AUTONEG_ENABLE) {</div><div class='del'>-		if (pdata-&gt;phy.advertising &amp; ADVERTISED_1000baseKX_Full)</div><div class='del'>-			return true;</div><div class='del'>-	} else {</div><div class='del'>-		if (pdata-&gt;phy.speed == SPEED_1000)</div><div class='del'>-			return true;</div><div class='del'>-	}</div><div class='add'>+	xgbe_an37_set(pdata, false, false);</div><div class='add'>+	xgbe_an37_disable_interrupts(pdata);</div><div class='ctx'> </div><div class='del'>-	return false;</div><div class='add'>+	netif_dbg(pdata, link, pdata-&gt;netdev, "CL37 AN disabled\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xgbe_set_an(struct xgbe_prv_data *pdata, bool enable, bool restart)</div><div class='add'>+static void xgbe_an73_set(struct xgbe_prv_data *pdata, bool enable,</div><div class='add'>+			  bool restart)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int reg;</div><div class='ctx'> </div><div class='add'>+	/* Disable KR training for now */</div><div class='add'>+	reg = XMDIO_READ(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL);</div><div class='add'>+	reg &amp;= ~XGBE_KR_TRAINING_ENABLE;</div><div class='add'>+	XMDIO_WRITE(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL, reg);</div><div class='add'>+</div><div class='add'>+	/* Update AN settings */</div><div class='ctx'> 	reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_CTRL1);</div><div class='ctx'> 	reg &amp;= ~MDIO_AN_CTRL1_ENABLE;</div><div class='ctx'> </div><div class='hunk'>@@ -437,22 +311,70 @@ static void xgbe_set_an(struct xgbe_prv_data *pdata, bool enable, bool restart)</div><div class='ctx'> 	XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_CTRL1, reg);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xgbe_restart_an(struct xgbe_prv_data *pdata)</div><div class='add'>+static void xgbe_an73_restart(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	xgbe_set_an(pdata, true, true);</div><div class='add'>+	xgbe_an73_enable_interrupts(pdata);</div><div class='add'>+	xgbe_an73_set(pdata, true, true);</div><div class='add'>+</div><div class='add'>+	netif_dbg(pdata, link, pdata-&gt;netdev, "CL73 AN enabled/restarted\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_an73_disable(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	xgbe_an73_set(pdata, false, false);</div><div class='add'>+	xgbe_an73_disable_interrupts(pdata);</div><div class='add'>+</div><div class='add'>+	pdata-&gt;an_start = 0;</div><div class='ctx'> </div><div class='del'>-	netif_dbg(pdata, link, pdata-&gt;netdev, "AN enabled/restarted\n");</div><div class='add'>+	netif_dbg(pdata, link, pdata-&gt;netdev, "CL73 AN disabled\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xgbe_disable_an(struct xgbe_prv_data *pdata)</div><div class='add'>+static void xgbe_an_restart(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	xgbe_set_an(pdata, false, false);</div><div class='add'>+	if (pdata-&gt;phy_if.phy_impl.an_pre)</div><div class='add'>+		pdata-&gt;phy_if.phy_impl.an_pre(pdata);</div><div class='ctx'> </div><div class='del'>-	netif_dbg(pdata, link, pdata-&gt;netdev, "AN disabled\n");</div><div class='add'>+	switch (pdata-&gt;an_mode) {</div><div class='add'>+	case XGBE_AN_MODE_CL73:</div><div class='add'>+	case XGBE_AN_MODE_CL73_REDRV:</div><div class='add'>+		xgbe_an73_restart(pdata);</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_AN_MODE_CL37:</div><div class='add'>+	case XGBE_AN_MODE_CL37_SGMII:</div><div class='add'>+		xgbe_an37_restart(pdata);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static enum xgbe_an xgbe_an_tx_training(struct xgbe_prv_data *pdata,</div><div class='del'>-					enum xgbe_rx *state)</div><div class='add'>+static void xgbe_an_disable(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	if (pdata-&gt;phy_if.phy_impl.an_post)</div><div class='add'>+		pdata-&gt;phy_if.phy_impl.an_post(pdata);</div><div class='add'>+</div><div class='add'>+	switch (pdata-&gt;an_mode) {</div><div class='add'>+	case XGBE_AN_MODE_CL73:</div><div class='add'>+	case XGBE_AN_MODE_CL73_REDRV:</div><div class='add'>+		xgbe_an73_disable(pdata);</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_AN_MODE_CL37:</div><div class='add'>+	case XGBE_AN_MODE_CL37_SGMII:</div><div class='add'>+		xgbe_an37_disable(pdata);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_an_disable_all(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	xgbe_an73_disable(pdata);</div><div class='add'>+	xgbe_an37_disable(pdata);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum xgbe_an xgbe_an73_tx_training(struct xgbe_prv_data *pdata,</div><div class='add'>+					  enum xgbe_rx *state)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int ad_reg, lp_reg, reg;</div><div class='ctx'> </div><div class='hunk'>@@ -474,25 +396,26 @@ static enum xgbe_an xgbe_an_tx_training(struct xgbe_prv_data *pdata,</div><div class='ctx'> 	XMDIO_WRITE(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_FECCTRL, reg);</div><div class='ctx'> </div><div class='ctx'> 	/* Start KR training */</div><div class='del'>-	reg = XMDIO_READ(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL);</div><div class='del'>-	if (reg &amp; XGBE_KR_TRAINING_ENABLE) {</div><div class='del'>-		XSIR0_IOWRITE_BITS(pdata, SIR0_KR_RT_1, RESET, 1);</div><div class='add'>+	if (pdata-&gt;phy_if.phy_impl.kr_training_pre)</div><div class='add'>+		pdata-&gt;phy_if.phy_impl.kr_training_pre(pdata);</div><div class='ctx'> </div><div class='del'>-		reg |= XGBE_KR_TRAINING_START;</div><div class='del'>-		XMDIO_WRITE(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL,</div><div class='del'>-			    reg);</div><div class='add'>+	reg = XMDIO_READ(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL);</div><div class='add'>+	reg |= XGBE_KR_TRAINING_ENABLE;</div><div class='add'>+	reg |= XGBE_KR_TRAINING_START;</div><div class='add'>+	XMDIO_WRITE(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL, reg);</div><div class='add'>+	pdata-&gt;kr_start_time = jiffies;</div><div class='ctx'> </div><div class='del'>-		XSIR0_IOWRITE_BITS(pdata, SIR0_KR_RT_1, RESET, 0);</div><div class='add'>+	netif_dbg(pdata, link, pdata-&gt;netdev,</div><div class='add'>+		  "KR training initiated\n");</div><div class='ctx'> </div><div class='del'>-		netif_dbg(pdata, link, pdata-&gt;netdev,</div><div class='del'>-			  "KR training initiated\n");</div><div class='del'>-	}</div><div class='add'>+	if (pdata-&gt;phy_if.phy_impl.kr_training_post)</div><div class='add'>+		pdata-&gt;phy_if.phy_impl.kr_training_post(pdata);</div><div class='ctx'> </div><div class='ctx'> 	return XGBE_AN_PAGE_RECEIVED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static enum xgbe_an xgbe_an_tx_xnp(struct xgbe_prv_data *pdata,</div><div class='del'>-				   enum xgbe_rx *state)</div><div class='add'>+static enum xgbe_an xgbe_an73_tx_xnp(struct xgbe_prv_data *pdata,</div><div class='add'>+				     enum xgbe_rx *state)</div><div class='ctx'> {</div><div class='ctx'> 	u16 msg;</div><div class='ctx'> </div><div class='hunk'>@@ -508,8 +431,8 @@ static enum xgbe_an xgbe_an_tx_xnp(struct xgbe_prv_data *pdata,</div><div class='ctx'> 	return XGBE_AN_PAGE_RECEIVED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static enum xgbe_an xgbe_an_rx_bpa(struct xgbe_prv_data *pdata,</div><div class='del'>-				   enum xgbe_rx *state)</div><div class='add'>+static enum xgbe_an xgbe_an73_rx_bpa(struct xgbe_prv_data *pdata,</div><div class='add'>+				     enum xgbe_rx *state)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int link_support;</div><div class='ctx'> 	unsigned int reg, ad_reg, lp_reg;</div><div class='hunk'>@@ -528,12 +451,12 @@ static enum xgbe_an xgbe_an_rx_bpa(struct xgbe_prv_data *pdata,</div><div class='ctx'> </div><div class='ctx'> 	return ((ad_reg &amp; XGBE_XNP_NP_EXCHANGE) ||</div><div class='ctx'> 		(lp_reg &amp; XGBE_XNP_NP_EXCHANGE))</div><div class='del'>-	       ? xgbe_an_tx_xnp(pdata, state)</div><div class='del'>-	       : xgbe_an_tx_training(pdata, state);</div><div class='add'>+	       ? xgbe_an73_tx_xnp(pdata, state)</div><div class='add'>+	       : xgbe_an73_tx_training(pdata, state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static enum xgbe_an xgbe_an_rx_xnp(struct xgbe_prv_data *pdata,</div><div class='del'>-				   enum xgbe_rx *state)</div><div class='add'>+static enum xgbe_an xgbe_an73_rx_xnp(struct xgbe_prv_data *pdata,</div><div class='add'>+				     enum xgbe_rx *state)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned int ad_reg, lp_reg;</div><div class='ctx'> </div><div class='hunk'>@@ -543,11 +466,11 @@ static enum xgbe_an xgbe_an_rx_xnp(struct xgbe_prv_data *pdata,</div><div class='ctx'> </div><div class='ctx'> 	return ((ad_reg &amp; XGBE_XNP_NP_EXCHANGE) ||</div><div class='ctx'> 		(lp_reg &amp; XGBE_XNP_NP_EXCHANGE))</div><div class='del'>-	       ? xgbe_an_tx_xnp(pdata, state)</div><div class='del'>-	       : xgbe_an_tx_training(pdata, state);</div><div class='add'>+	       ? xgbe_an73_tx_xnp(pdata, state)</div><div class='add'>+	       : xgbe_an73_tx_training(pdata, state);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static enum xgbe_an xgbe_an_page_received(struct xgbe_prv_data *pdata)</div><div class='add'>+static enum xgbe_an xgbe_an73_page_received(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	enum xgbe_rx *state;</div><div class='ctx'> 	unsigned long an_timeout;</div><div class='hunk'>@@ -566,20 +489,20 @@ static enum xgbe_an xgbe_an_page_received(struct xgbe_prv_data *pdata)</div><div class='ctx'> 			pdata-&gt;an_start = jiffies;</div><div class='ctx'> </div><div class='ctx'> 			netif_dbg(pdata, link, pdata-&gt;netdev,</div><div class='del'>-				  "AN timed out, resetting state\n");</div><div class='add'>+				  "CL73 AN timed out, resetting state\n");</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	state = xgbe_in_kr_mode(pdata) ? &amp;pdata-&gt;kr_state</div><div class='del'>-					   : &amp;pdata-&gt;kx_state;</div><div class='add'>+				       : &amp;pdata-&gt;kx_state;</div><div class='ctx'> </div><div class='ctx'> 	switch (*state) {</div><div class='ctx'> 	case XGBE_RX_BPA:</div><div class='del'>-		ret = xgbe_an_rx_bpa(pdata, state);</div><div class='add'>+		ret = xgbe_an73_rx_bpa(pdata, state);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case XGBE_RX_XNP:</div><div class='del'>-		ret = xgbe_an_rx_xnp(pdata, state);</div><div class='add'>+		ret = xgbe_an73_rx_xnp(pdata, state);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	default:</div><div class='hunk'>@@ -589,14 +512,16 @@ static enum xgbe_an xgbe_an_page_received(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static enum xgbe_an xgbe_an_incompat_link(struct xgbe_prv_data *pdata)</div><div class='add'>+static enum xgbe_an xgbe_an73_incompat_link(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='add'>+	struct ethtool_link_ksettings *lks = &amp;pdata-&gt;phy.lks;</div><div class='add'>+</div><div class='ctx'> 	/* Be sure we aren't looping trying to negotiate */</div><div class='ctx'> 	if (xgbe_in_kr_mode(pdata)) {</div><div class='ctx'> 		pdata-&gt;kr_state = XGBE_RX_ERROR;</div><div class='ctx'> </div><div class='del'>-		if (!(pdata-&gt;phy.advertising &amp; ADVERTISED_1000baseKX_Full) &amp;&amp;</div><div class='del'>-		    !(pdata-&gt;phy.advertising &amp; ADVERTISED_2500baseX_Full))</div><div class='add'>+		if (!XGBE_ADV(lks, 1000baseKX_Full) &amp;&amp;</div><div class='add'>+		    !XGBE_ADV(lks, 2500baseX_Full))</div><div class='ctx'> 			return XGBE_AN_NO_LINK;</div><div class='ctx'> </div><div class='ctx'> 		if (pdata-&gt;kx_state != XGBE_RX_BPA)</div><div class='hunk'>@@ -604,32 +529,110 @@ static enum xgbe_an xgbe_an_incompat_link(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	} else {</div><div class='ctx'> 		pdata-&gt;kx_state = XGBE_RX_ERROR;</div><div class='ctx'> </div><div class='del'>-		if (!(pdata-&gt;phy.advertising &amp; ADVERTISED_10000baseKR_Full))</div><div class='add'>+		if (!XGBE_ADV(lks, 10000baseKR_Full))</div><div class='ctx'> 			return XGBE_AN_NO_LINK;</div><div class='ctx'> </div><div class='ctx'> 		if (pdata-&gt;kr_state != XGBE_RX_BPA)</div><div class='ctx'> 			return XGBE_AN_NO_LINK;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	xgbe_disable_an(pdata);</div><div class='add'>+	xgbe_an_disable(pdata);</div><div class='ctx'> </div><div class='ctx'> 	xgbe_switch_mode(pdata);</div><div class='ctx'> </div><div class='del'>-	xgbe_restart_an(pdata);</div><div class='add'>+	pdata-&gt;an_result = XGBE_AN_READY;</div><div class='add'>+</div><div class='add'>+	xgbe_an_restart(pdata);</div><div class='ctx'> </div><div class='ctx'> 	return XGBE_AN_INCOMPAT_LINK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void xgbe_an37_isr(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	unsigned int reg;</div><div class='add'>+</div><div class='add'>+	/* Disable AN interrupts */</div><div class='add'>+	xgbe_an37_disable_interrupts(pdata);</div><div class='add'>+</div><div class='add'>+	/* Save the interrupt(s) that fired */</div><div class='add'>+	reg = XMDIO_READ(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_STAT);</div><div class='add'>+	pdata-&gt;an_int = reg &amp; XGBE_AN_CL37_INT_MASK;</div><div class='add'>+	pdata-&gt;an_status = reg &amp; ~XGBE_AN_CL37_INT_MASK;</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;an_int) {</div><div class='add'>+		/* Clear the interrupt(s) that fired and process them */</div><div class='add'>+		reg &amp;= ~XGBE_AN_CL37_INT_MASK;</div><div class='add'>+		XMDIO_WRITE(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_STAT, reg);</div><div class='add'>+</div><div class='add'>+		queue_work(pdata-&gt;an_workqueue, &amp;pdata-&gt;an_irq_work);</div><div class='add'>+	} else {</div><div class='add'>+		/* Enable AN interrupts */</div><div class='add'>+		xgbe_an37_enable_interrupts(pdata);</div><div class='add'>+</div><div class='add'>+		/* Reissue interrupt if status is not clear */</div><div class='add'>+		if (pdata-&gt;vdata-&gt;irq_reissue_support)</div><div class='add'>+			XP_IOWRITE(pdata, XP_INT_REISSUE_EN, 1 &lt;&lt; 3);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_an73_isr(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	/* Disable AN interrupts */</div><div class='add'>+	xgbe_an73_disable_interrupts(pdata);</div><div class='add'>+</div><div class='add'>+	/* Save the interrupt(s) that fired */</div><div class='add'>+	pdata-&gt;an_int = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_INT);</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;an_int) {</div><div class='add'>+		/* Clear the interrupt(s) that fired and process them */</div><div class='add'>+		XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_INT, ~pdata-&gt;an_int);</div><div class='add'>+</div><div class='add'>+		queue_work(pdata-&gt;an_workqueue, &amp;pdata-&gt;an_irq_work);</div><div class='add'>+	} else {</div><div class='add'>+		/* Enable AN interrupts */</div><div class='add'>+		xgbe_an73_enable_interrupts(pdata);</div><div class='add'>+</div><div class='add'>+		/* Reissue interrupt if status is not clear */</div><div class='add'>+		if (pdata-&gt;vdata-&gt;irq_reissue_support)</div><div class='add'>+			XP_IOWRITE(pdata, XP_INT_REISSUE_EN, 1 &lt;&lt; 3);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_an_isr_bh_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = from_work(pdata, work, an_bh_work);</div><div class='add'>+</div><div class='add'>+	netif_dbg(pdata, intr, pdata-&gt;netdev, "AN interrupt received\n");</div><div class='add'>+</div><div class='add'>+	switch (pdata-&gt;an_mode) {</div><div class='add'>+	case XGBE_AN_MODE_CL73:</div><div class='add'>+	case XGBE_AN_MODE_CL73_REDRV:</div><div class='add'>+		xgbe_an73_isr(pdata);</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_AN_MODE_CL37:</div><div class='add'>+	case XGBE_AN_MODE_CL37_SGMII:</div><div class='add'>+		xgbe_an37_isr(pdata);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static irqreturn_t xgbe_an_isr(int irq, void *data)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgbe_prv_data *pdata = (struct xgbe_prv_data *)data;</div><div class='ctx'> </div><div class='del'>-	netif_dbg(pdata, intr, pdata-&gt;netdev, "AN interrupt received\n");</div><div class='add'>+	if (pdata-&gt;isr_as_bh_work)</div><div class='add'>+		queue_work(system_bh_wq, &amp;pdata-&gt;an_bh_work);</div><div class='add'>+	else</div><div class='add'>+		xgbe_an_isr_bh_work(&amp;pdata-&gt;an_bh_work);</div><div class='ctx'> </div><div class='del'>-	/* Interrupt reason must be read and cleared outside of IRQ context */</div><div class='del'>-	disable_irq_nosync(pdata-&gt;an_irq);</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	queue_work(pdata-&gt;an_workqueue, &amp;pdata-&gt;an_irq_work);</div><div class='add'>+static irqreturn_t xgbe_an_combined_isr(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	xgbe_an_isr_bh_work(&amp;pdata-&gt;an_bh_work);</div><div class='ctx'> </div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='hunk'>@@ -667,44 +670,90 @@ static const char *xgbe_state_as_string(enum xgbe_an state)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xgbe_an_state_machine(struct work_struct *work)</div><div class='add'>+static void xgbe_an37_state_machine(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	struct xgbe_prv_data *pdata = container_of(work,</div><div class='del'>-						   struct xgbe_prv_data,</div><div class='del'>-						   an_work);</div><div class='ctx'> 	enum xgbe_an cur_state = pdata-&gt;an_state;</div><div class='del'>-	unsigned int int_reg, int_mask;</div><div class='ctx'> </div><div class='del'>-	mutex_lock(&amp;pdata-&gt;an_mutex);</div><div class='add'>+	if (!pdata-&gt;an_int)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	/* Read the interrupt */</div><div class='del'>-	int_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_INT);</div><div class='del'>-	if (!int_reg)</div><div class='del'>-		goto out;</div><div class='add'>+	if (pdata-&gt;an_int &amp; XGBE_AN_CL37_INT_CMPLT) {</div><div class='add'>+		pdata-&gt;an_state = XGBE_AN_COMPLETE;</div><div class='add'>+		pdata-&gt;an_int &amp;= ~XGBE_AN_CL37_INT_CMPLT;</div><div class='add'>+</div><div class='add'>+		/* If SGMII is enabled, check the link status */</div><div class='add'>+		if ((pdata-&gt;an_mode == XGBE_AN_MODE_CL37_SGMII) &amp;&amp;</div><div class='add'>+		    !(pdata-&gt;an_status &amp; XGBE_SGMII_AN_LINK_STATUS))</div><div class='add'>+			pdata-&gt;an_state = XGBE_AN_NO_LINK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netif_dbg(pdata, link, pdata-&gt;netdev, "CL37 AN %s\n",</div><div class='add'>+		  xgbe_state_as_string(pdata-&gt;an_state));</div><div class='add'>+</div><div class='add'>+	cur_state = pdata-&gt;an_state;</div><div class='add'>+</div><div class='add'>+	switch (pdata-&gt;an_state) {</div><div class='add'>+	case XGBE_AN_READY:</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case XGBE_AN_COMPLETE:</div><div class='add'>+		netif_dbg(pdata, link, pdata-&gt;netdev,</div><div class='add'>+			  "Auto negotiation successful\n");</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case XGBE_AN_NO_LINK:</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		pdata-&gt;an_state = XGBE_AN_ERROR;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;an_state == XGBE_AN_ERROR) {</div><div class='add'>+		netdev_err(pdata-&gt;netdev,</div><div class='add'>+			   "error during auto-negotiation, state=%u\n",</div><div class='add'>+			   cur_state);</div><div class='add'>+</div><div class='add'>+		pdata-&gt;an_int = 0;</div><div class='add'>+		xgbe_an37_clear_interrupts(pdata);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;an_state &gt;= XGBE_AN_COMPLETE) {</div><div class='add'>+		pdata-&gt;an_result = pdata-&gt;an_state;</div><div class='add'>+		pdata-&gt;an_state = XGBE_AN_READY;</div><div class='add'>+</div><div class='add'>+		if (pdata-&gt;phy_if.phy_impl.an_post)</div><div class='add'>+			pdata-&gt;phy_if.phy_impl.an_post(pdata);</div><div class='add'>+</div><div class='add'>+		netif_dbg(pdata, link, pdata-&gt;netdev, "CL37 AN result: %s\n",</div><div class='add'>+			  xgbe_state_as_string(pdata-&gt;an_result));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	xgbe_an37_enable_interrupts(pdata);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_an73_state_machine(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	enum xgbe_an cur_state = pdata-&gt;an_state;</div><div class='add'>+</div><div class='add'>+	if (!pdata-&gt;an_int)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='ctx'> next_int:</div><div class='del'>-	if (int_reg &amp; XGBE_AN_PG_RCV) {</div><div class='add'>+	if (pdata-&gt;an_int &amp; XGBE_AN_CL73_PG_RCV) {</div><div class='ctx'> 		pdata-&gt;an_state = XGBE_AN_PAGE_RECEIVED;</div><div class='del'>-		int_mask = XGBE_AN_PG_RCV;</div><div class='del'>-	} else if (int_reg &amp; XGBE_AN_INC_LINK) {</div><div class='add'>+		pdata-&gt;an_int &amp;= ~XGBE_AN_CL73_PG_RCV;</div><div class='add'>+	} else if (pdata-&gt;an_int &amp; XGBE_AN_CL73_INC_LINK) {</div><div class='ctx'> 		pdata-&gt;an_state = XGBE_AN_INCOMPAT_LINK;</div><div class='del'>-		int_mask = XGBE_AN_INC_LINK;</div><div class='del'>-	} else if (int_reg &amp; XGBE_AN_INT_CMPLT) {</div><div class='add'>+		pdata-&gt;an_int &amp;= ~XGBE_AN_CL73_INC_LINK;</div><div class='add'>+	} else if (pdata-&gt;an_int &amp; XGBE_AN_CL73_INT_CMPLT) {</div><div class='ctx'> 		pdata-&gt;an_state = XGBE_AN_COMPLETE;</div><div class='del'>-		int_mask = XGBE_AN_INT_CMPLT;</div><div class='add'>+		pdata-&gt;an_int &amp;= ~XGBE_AN_CL73_INT_CMPLT;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		pdata-&gt;an_state = XGBE_AN_ERROR;</div><div class='del'>-		int_mask = 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Clear the interrupt to be processed */</div><div class='del'>-	int_reg &amp;= ~int_mask;</div><div class='del'>-	XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_INT, int_reg);</div><div class='del'>-</div><div class='del'>-	pdata-&gt;an_result = pdata-&gt;an_state;</div><div class='del'>-</div><div class='ctx'> again:</div><div class='del'>-	netif_dbg(pdata, link, pdata-&gt;netdev, "AN %s\n",</div><div class='add'>+	netif_dbg(pdata, link, pdata-&gt;netdev, "CL73 AN %s\n",</div><div class='ctx'> 		  xgbe_state_as_string(pdata-&gt;an_state));</div><div class='ctx'> </div><div class='ctx'> 	cur_state = pdata-&gt;an_state;</div><div class='hunk'>@@ -715,14 +764,14 @@ again:</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case XGBE_AN_PAGE_RECEIVED:</div><div class='del'>-		pdata-&gt;an_state = xgbe_an_page_received(pdata);</div><div class='add'>+		pdata-&gt;an_state = xgbe_an73_page_received(pdata);</div><div class='ctx'> 		pdata-&gt;an_supported++;</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case XGBE_AN_INCOMPAT_LINK:</div><div class='ctx'> 		pdata-&gt;an_supported = 0;</div><div class='ctx'> 		pdata-&gt;parallel_detect = 0;</div><div class='del'>-		pdata-&gt;an_state = xgbe_an_incompat_link(pdata);</div><div class='add'>+		pdata-&gt;an_state = xgbe_an73_incompat_link(pdata);</div><div class='ctx'> 		break;</div><div class='ctx'> </div><div class='ctx'> 	case XGBE_AN_COMPLETE:</div><div class='hunk'>@@ -740,15 +789,15 @@ again:</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (pdata-&gt;an_state == XGBE_AN_NO_LINK) {</div><div class='del'>-		int_reg = 0;</div><div class='del'>-		XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_INT, 0);</div><div class='add'>+		pdata-&gt;an_int = 0;</div><div class='add'>+		xgbe_an73_clear_interrupts(pdata);</div><div class='ctx'> 	} else if (pdata-&gt;an_state == XGBE_AN_ERROR) {</div><div class='ctx'> 		netdev_err(pdata-&gt;netdev,</div><div class='ctx'> 			   "error during auto-negotiation, state=%u\n",</div><div class='ctx'> 			   cur_state);</div><div class='ctx'> </div><div class='del'>-		int_reg = 0;</div><div class='del'>-		XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_INT, 0);</div><div class='add'>+		pdata-&gt;an_int = 0;</div><div class='add'>+		xgbe_an73_clear_interrupts(pdata);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (pdata-&gt;an_state &gt;= XGBE_AN_COMPLETE) {</div><div class='hunk'>@@ -758,29 +807,114 @@ again:</div><div class='ctx'> 		pdata-&gt;kx_state = XGBE_RX_BPA;</div><div class='ctx'> 		pdata-&gt;an_start = 0;</div><div class='ctx'> </div><div class='del'>-		netif_dbg(pdata, link, pdata-&gt;netdev, "AN result: %s\n",</div><div class='add'>+		if (pdata-&gt;phy_if.phy_impl.an_post)</div><div class='add'>+			pdata-&gt;phy_if.phy_impl.an_post(pdata);</div><div class='add'>+</div><div class='add'>+		netif_dbg(pdata, link, pdata-&gt;netdev, "CL73 AN result: %s\n",</div><div class='ctx'> 			  xgbe_state_as_string(pdata-&gt;an_result));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (cur_state != pdata-&gt;an_state)</div><div class='ctx'> 		goto again;</div><div class='ctx'> </div><div class='del'>-	if (int_reg)</div><div class='add'>+	if (pdata-&gt;an_int)</div><div class='ctx'> 		goto next_int;</div><div class='ctx'> </div><div class='del'>-out:</div><div class='del'>-	enable_irq(pdata-&gt;an_irq);</div><div class='add'>+	xgbe_an73_enable_interrupts(pdata);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_an_state_machine(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = container_of(work,</div><div class='add'>+						   struct xgbe_prv_data,</div><div class='add'>+						   an_work);</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pdata-&gt;an_mutex);</div><div class='add'>+</div><div class='add'>+	switch (pdata-&gt;an_mode) {</div><div class='add'>+	case XGBE_AN_MODE_CL73:</div><div class='add'>+	case XGBE_AN_MODE_CL73_REDRV:</div><div class='add'>+		xgbe_an73_state_machine(pdata);</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_AN_MODE_CL37:</div><div class='add'>+	case XGBE_AN_MODE_CL37_SGMII:</div><div class='add'>+		xgbe_an37_state_machine(pdata);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Reissue interrupt if status is not clear */</div><div class='add'>+	if (pdata-&gt;vdata-&gt;irq_reissue_support)</div><div class='add'>+		XP_IOWRITE(pdata, XP_INT_REISSUE_EN, 1 &lt;&lt; 3);</div><div class='ctx'> </div><div class='ctx'> 	mutex_unlock(&amp;pdata-&gt;an_mutex);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xgbe_an_init(struct xgbe_prv_data *pdata)</div><div class='add'>+static void xgbe_an37_init(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct ethtool_link_ksettings lks;</div><div class='add'>+	unsigned int reg;</div><div class='add'>+</div><div class='add'>+	pdata-&gt;phy_if.phy_impl.an_advertising(pdata, &amp;lks);</div><div class='add'>+</div><div class='add'>+	/* Set up Advertisement register */</div><div class='add'>+	reg = XMDIO_READ(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_ADVERTISE);</div><div class='add'>+	if (XGBE_ADV(&amp;lks, Pause))</div><div class='add'>+		reg |= 0x100;</div><div class='add'>+	else</div><div class='add'>+		reg &amp;= ~0x100;</div><div class='add'>+</div><div class='add'>+	if (XGBE_ADV(&amp;lks, Asym_Pause))</div><div class='add'>+		reg |= 0x80;</div><div class='add'>+	else</div><div class='add'>+		reg &amp;= ~0x80;</div><div class='add'>+</div><div class='add'>+	/* Full duplex, but not half */</div><div class='add'>+	reg |= XGBE_AN_CL37_FD_MASK;</div><div class='add'>+	reg &amp;= ~XGBE_AN_CL37_HD_MASK;</div><div class='add'>+</div><div class='add'>+	XMDIO_WRITE(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_ADVERTISE, reg);</div><div class='add'>+</div><div class='add'>+	/* Set up the Control register */</div><div class='add'>+	reg = XMDIO_READ(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_CTRL);</div><div class='add'>+	reg &amp;= ~XGBE_AN_CL37_TX_CONFIG_MASK;</div><div class='add'>+	reg &amp;= ~XGBE_AN_CL37_PCS_MODE_MASK;</div><div class='add'>+</div><div class='add'>+	switch (pdata-&gt;an_mode) {</div><div class='add'>+	case XGBE_AN_MODE_CL37:</div><div class='add'>+		reg |= XGBE_AN_CL37_PCS_MODE_BASEX;</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_AN_MODE_CL37_SGMII:</div><div class='add'>+		reg |= XGBE_AN_CL37_PCS_MODE_SGMII;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	reg |= XGBE_AN_CL37_MII_CTRL_8BIT;</div><div class='add'>+</div><div class='add'>+	XMDIO_WRITE(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_CTRL, reg);</div><div class='add'>+</div><div class='add'>+	netif_dbg(pdata, link, pdata-&gt;netdev, "CL37 AN (%s) initialized\n",</div><div class='add'>+		  (pdata-&gt;an_mode == XGBE_AN_MODE_CL37) ? "BaseX" : "SGMII");</div><div class='add'>+</div><div class='add'>+	reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_CTRL1);</div><div class='add'>+	reg &amp;= ~MDIO_AN_CTRL1_ENABLE;</div><div class='add'>+	XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_CTRL1, reg);</div><div class='add'>+</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_an73_init(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='add'>+	struct ethtool_link_ksettings lks;</div><div class='ctx'> 	unsigned int reg;</div><div class='ctx'> </div><div class='add'>+	pdata-&gt;phy_if.phy_impl.an_advertising(pdata, &amp;lks);</div><div class='add'>+</div><div class='ctx'> 	/* Set up Advertisement register 3 first */</div><div class='ctx'> 	reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 2);</div><div class='del'>-	if (pdata-&gt;phy.advertising &amp; ADVERTISED_10000baseR_FEC)</div><div class='add'>+	if (XGBE_ADV(&amp;lks, 10000baseR_FEC))</div><div class='ctx'> 		reg |= 0xc000;</div><div class='ctx'> 	else</div><div class='ctx'> 		reg &amp;= ~0xc000;</div><div class='hunk'>@@ -789,13 +923,13 @@ static void xgbe_an_init(struct xgbe_prv_data *pdata)</div><div class='ctx'> </div><div class='ctx'> 	/* Set up Advertisement register 2 next */</div><div class='ctx'> 	reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 1);</div><div class='del'>-	if (pdata-&gt;phy.advertising &amp; ADVERTISED_10000baseKR_Full)</div><div class='add'>+	if (XGBE_ADV(&amp;lks, 10000baseKR_Full))</div><div class='ctx'> 		reg |= 0x80;</div><div class='ctx'> 	else</div><div class='ctx'> 		reg &amp;= ~0x80;</div><div class='ctx'> </div><div class='del'>-	if ((pdata-&gt;phy.advertising &amp; ADVERTISED_1000baseKX_Full) ||</div><div class='del'>-	    (pdata-&gt;phy.advertising &amp; ADVERTISED_2500baseX_Full))</div><div class='add'>+	if (XGBE_ADV(&amp;lks, 1000baseKX_Full) ||</div><div class='add'>+	    XGBE_ADV(&amp;lks, 2500baseX_Full))</div><div class='ctx'> 		reg |= 0x20;</div><div class='ctx'> 	else</div><div class='ctx'> 		reg &amp;= ~0x20;</div><div class='hunk'>@@ -804,12 +938,12 @@ static void xgbe_an_init(struct xgbe_prv_data *pdata)</div><div class='ctx'> </div><div class='ctx'> 	/* Set up Advertisement register 1 last */</div><div class='ctx'> 	reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE);</div><div class='del'>-	if (pdata-&gt;phy.advertising &amp; ADVERTISED_Pause)</div><div class='add'>+	if (XGBE_ADV(&amp;lks, Pause))</div><div class='ctx'> 		reg |= 0x400;</div><div class='ctx'> 	else</div><div class='ctx'> 		reg &amp;= ~0x400;</div><div class='ctx'> </div><div class='del'>-	if (pdata-&gt;phy.advertising &amp; ADVERTISED_Asym_Pause)</div><div class='add'>+	if (XGBE_ADV(&amp;lks, Asym_Pause))</div><div class='ctx'> 		reg |= 0x800;</div><div class='ctx'> 	else</div><div class='ctx'> 		reg &amp;= ~0x800;</div><div class='hunk'>@@ -819,7 +953,25 @@ static void xgbe_an_init(struct xgbe_prv_data *pdata)</div><div class='ctx'> </div><div class='ctx'> 	XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE, reg);</div><div class='ctx'> </div><div class='del'>-	netif_dbg(pdata, link, pdata-&gt;netdev, "AN initialized\n");</div><div class='add'>+	netif_dbg(pdata, link, pdata-&gt;netdev, "CL73 AN initialized\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_an_init(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	/* Set up advertisement registers based on current settings */</div><div class='add'>+	pdata-&gt;an_mode = pdata-&gt;phy_if.phy_impl.an_mode(pdata);</div><div class='add'>+	switch (pdata-&gt;an_mode) {</div><div class='add'>+	case XGBE_AN_MODE_CL73:</div><div class='add'>+	case XGBE_AN_MODE_CL73_REDRV:</div><div class='add'>+		xgbe_an73_init(pdata);</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_AN_MODE_CL37:</div><div class='add'>+	case XGBE_AN_MODE_CL37_SGMII:</div><div class='add'>+		xgbe_an37_init(pdata);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const char *xgbe_phy_fc_string(struct xgbe_prv_data *pdata)</div><div class='hunk'>@@ -837,6 +989,10 @@ static const char *xgbe_phy_fc_string(struct xgbe_prv_data *pdata)</div><div class='ctx'> static const char *xgbe_phy_speed_string(int speed)</div><div class='ctx'> {</div><div class='ctx'> 	switch (speed) {</div><div class='add'>+	case SPEED_10:</div><div class='add'>+		return "10Mbps";</div><div class='add'>+	case SPEED_100:</div><div class='add'>+		return "100Mbps";</div><div class='ctx'> 	case SPEED_1000:</div><div class='ctx'> 		return "1Gbps";</div><div class='ctx'> 	case SPEED_2500:</div><div class='hunk'>@@ -872,14 +1028,14 @@ static void xgbe_phy_adjust_link(struct xgbe_prv_data *pdata)</div><div class='ctx'> </div><div class='ctx'> 		if (pdata-&gt;tx_pause != pdata-&gt;phy.tx_pause) {</div><div class='ctx'> 			new_state = 1;</div><div class='del'>-			pdata-&gt;hw_if.config_tx_flow_control(pdata);</div><div class='ctx'> 			pdata-&gt;tx_pause = pdata-&gt;phy.tx_pause;</div><div class='add'>+			pdata-&gt;hw_if.config_tx_flow_control(pdata);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		if (pdata-&gt;rx_pause != pdata-&gt;phy.rx_pause) {</div><div class='ctx'> 			new_state = 1;</div><div class='del'>-			pdata-&gt;hw_if.config_rx_flow_control(pdata);</div><div class='ctx'> 			pdata-&gt;rx_pause = pdata-&gt;phy.rx_pause;</div><div class='add'>+			pdata-&gt;hw_if.config_rx_flow_control(pdata);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='ctx'> 		/* Speed support */</div><div class='hunk'>@@ -902,24 +1058,33 @@ static void xgbe_phy_adjust_link(struct xgbe_prv_data *pdata)</div><div class='ctx'> 		xgbe_phy_print_status(pdata);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static bool xgbe_phy_valid_speed(struct xgbe_prv_data *pdata, int speed)</div><div class='add'>+{</div><div class='add'>+	return pdata-&gt;phy_if.phy_impl.valid_speed(pdata, speed);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int xgbe_phy_config_fixed(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='add'>+	enum xgbe_mode mode;</div><div class='add'>+</div><div class='ctx'> 	netif_dbg(pdata, link, pdata-&gt;netdev, "fixed PHY configuration\n");</div><div class='ctx'> </div><div class='ctx'> 	/* Disable auto-negotiation */</div><div class='del'>-	xgbe_disable_an(pdata);</div><div class='del'>-</div><div class='del'>-	/* Validate/Set specified speed */</div><div class='del'>-	switch (pdata-&gt;phy.speed) {</div><div class='del'>-	case SPEED_10000:</div><div class='del'>-		xgbe_set_mode(pdata, XGBE_MODE_KR);</div><div class='del'>-		break;</div><div class='del'>-</div><div class='del'>-	case SPEED_2500:</div><div class='del'>-	case SPEED_1000:</div><div class='del'>-		xgbe_set_mode(pdata, XGBE_MODE_KX);</div><div class='add'>+	xgbe_an_disable(pdata);</div><div class='add'>+</div><div class='add'>+	/* Set specified mode for specified speed */</div><div class='add'>+	mode = pdata-&gt;phy_if.phy_impl.get_mode(pdata, pdata-&gt;phy.speed);</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case XGBE_MODE_KX_1000:</div><div class='add'>+	case XGBE_MODE_KX_2500:</div><div class='add'>+	case XGBE_MODE_KR:</div><div class='add'>+	case XGBE_MODE_SGMII_10:</div><div class='add'>+	case XGBE_MODE_SGMII_100:</div><div class='add'>+	case XGBE_MODE_SGMII_1000:</div><div class='add'>+	case XGBE_MODE_X:</div><div class='add'>+	case XGBE_MODE_SFI:</div><div class='ctx'> 		break;</div><div class='del'>-</div><div class='add'>+	case XGBE_MODE_UNKNOWN:</div><div class='ctx'> 	default:</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -928,38 +1093,79 @@ static int xgbe_phy_config_fixed(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	if (pdata-&gt;phy.duplex != DUPLEX_FULL)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='add'>+	/* Force the mode change for SFI in Fixed PHY config.</div><div class='add'>+	 * Fixed PHY configs needs PLL to be enabled while doing mode set.</div><div class='add'>+	 * When the SFP module isn't connected during boot, driver assumes</div><div class='add'>+	 * AN is ON and attempts autonegotiation. However, if the connected</div><div class='add'>+	 * SFP comes up in Fixed PHY config, the link will not come up as</div><div class='add'>+	 * PLL isn't enabled while the initial mode set command is issued.</div><div class='add'>+	 * So, force the mode change for SFI in Fixed PHY configuration to</div><div class='add'>+	 * fix link issues.</div><div class='add'>+	 */</div><div class='add'>+	if (mode == XGBE_MODE_SFI)</div><div class='add'>+		xgbe_change_mode(pdata, mode);</div><div class='add'>+	else</div><div class='add'>+		xgbe_set_mode(pdata, mode);</div><div class='add'>+</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int __xgbe_phy_config_aneg(struct xgbe_prv_data *pdata)</div><div class='add'>+static int __xgbe_phy_config_aneg(struct xgbe_prv_data *pdata, bool set_mode)</div><div class='ctx'> {</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;pdata-&gt;an_mutex);</div><div class='add'>+</div><div class='ctx'> 	set_bit(XGBE_LINK_INIT, &amp;pdata-&gt;dev_state);</div><div class='ctx'> 	pdata-&gt;link_check = jiffies;</div><div class='ctx'> </div><div class='del'>-	if (pdata-&gt;phy.autoneg != AUTONEG_ENABLE)</div><div class='del'>-		return xgbe_phy_config_fixed(pdata);</div><div class='add'>+	ret = pdata-&gt;phy_if.phy_impl.an_config(pdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto out;</div><div class='ctx'> </div><div class='del'>-	netif_dbg(pdata, link, pdata-&gt;netdev, "AN PHY configuration\n");</div><div class='add'>+	if (pdata-&gt;phy.autoneg != AUTONEG_ENABLE) {</div><div class='add'>+		ret = xgbe_phy_config_fixed(pdata);</div><div class='add'>+		if (ret || !pdata-&gt;kr_redrv)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		netif_dbg(pdata, link, pdata-&gt;netdev, "AN redriver support\n");</div><div class='add'>+	} else {</div><div class='add'>+		netif_dbg(pdata, link, pdata-&gt;netdev, "AN PHY configuration\n");</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	/* Disable auto-negotiation interrupt */</div><div class='ctx'> 	disable_irq(pdata-&gt;an_irq);</div><div class='ctx'> </div><div class='del'>-	/* Start auto-negotiation in a supported mode */</div><div class='del'>-	if (pdata-&gt;phy.advertising &amp; ADVERTISED_10000baseKR_Full) {</div><div class='del'>-		xgbe_set_mode(pdata, XGBE_MODE_KR);</div><div class='del'>-	} else if ((pdata-&gt;phy.advertising &amp; ADVERTISED_1000baseKX_Full) ||</div><div class='del'>-		   (pdata-&gt;phy.advertising &amp; ADVERTISED_2500baseX_Full)) {</div><div class='del'>-		xgbe_set_mode(pdata, XGBE_MODE_KX);</div><div class='del'>-	} else {</div><div class='del'>-		enable_irq(pdata-&gt;an_irq);</div><div class='del'>-		return -EINVAL;</div><div class='add'>+	if (set_mode) {</div><div class='add'>+		/* Start auto-negotiation in a supported mode */</div><div class='add'>+		if (xgbe_use_mode(pdata, XGBE_MODE_KR)) {</div><div class='add'>+			xgbe_set_mode(pdata, XGBE_MODE_KR);</div><div class='add'>+		} else if (xgbe_use_mode(pdata, XGBE_MODE_KX_2500)) {</div><div class='add'>+			xgbe_set_mode(pdata, XGBE_MODE_KX_2500);</div><div class='add'>+		} else if (xgbe_use_mode(pdata, XGBE_MODE_KX_1000)) {</div><div class='add'>+			xgbe_set_mode(pdata, XGBE_MODE_KX_1000);</div><div class='add'>+		} else if (xgbe_use_mode(pdata, XGBE_MODE_SFI)) {</div><div class='add'>+			xgbe_set_mode(pdata, XGBE_MODE_SFI);</div><div class='add'>+		} else if (xgbe_use_mode(pdata, XGBE_MODE_X)) {</div><div class='add'>+			xgbe_set_mode(pdata, XGBE_MODE_X);</div><div class='add'>+		} else if (xgbe_use_mode(pdata, XGBE_MODE_SGMII_1000)) {</div><div class='add'>+			xgbe_set_mode(pdata, XGBE_MODE_SGMII_1000);</div><div class='add'>+		} else if (xgbe_use_mode(pdata, XGBE_MODE_SGMII_100)) {</div><div class='add'>+			xgbe_set_mode(pdata, XGBE_MODE_SGMII_100);</div><div class='add'>+		} else if (xgbe_use_mode(pdata, XGBE_MODE_SGMII_10)) {</div><div class='add'>+			xgbe_set_mode(pdata, XGBE_MODE_SGMII_10);</div><div class='add'>+		} else {</div><div class='add'>+			enable_irq(pdata-&gt;an_irq);</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Disable and stop any in progress auto-negotiation */</div><div class='del'>-	xgbe_disable_an(pdata);</div><div class='add'>+	xgbe_an_disable_all(pdata);</div><div class='ctx'> </div><div class='ctx'> 	/* Clear any auto-negotitation interrupts */</div><div class='del'>-	XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_INT, 0);</div><div class='add'>+	xgbe_an_clear_interrupts_all(pdata);</div><div class='ctx'> </div><div class='ctx'> 	pdata-&gt;an_result = XGBE_AN_READY;</div><div class='ctx'> 	pdata-&gt;an_state = XGBE_AN_READY;</div><div class='hunk'>@@ -969,22 +1175,10 @@ static int __xgbe_phy_config_aneg(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	/* Re-enable auto-negotiation interrupt */</div><div class='ctx'> 	enable_irq(pdata-&gt;an_irq);</div><div class='ctx'> </div><div class='del'>-	/* Set up advertisement registers based on current settings */</div><div class='ctx'> 	xgbe_an_init(pdata);</div><div class='add'>+	xgbe_an_restart(pdata);</div><div class='ctx'> </div><div class='del'>-	/* Enable and start auto-negotiation */</div><div class='del'>-	xgbe_restart_an(pdata);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int xgbe_phy_config_aneg(struct xgbe_prv_data *pdata)</div><div class='del'>-{</div><div class='del'>-	int ret;</div><div class='del'>-</div><div class='del'>-	mutex_lock(&amp;pdata-&gt;an_mutex);</div><div class='del'>-</div><div class='del'>-	ret = __xgbe_phy_config_aneg(pdata);</div><div class='add'>+out:</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		set_bit(XGBE_LINK_ERR, &amp;pdata-&gt;dev_state);</div><div class='ctx'> 	else</div><div class='hunk'>@@ -995,6 +1189,16 @@ static int xgbe_phy_config_aneg(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int xgbe_phy_config_aneg(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	return __xgbe_phy_config_aneg(pdata, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_reconfig_aneg(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	return __xgbe_phy_config_aneg(pdata, false);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static bool xgbe_phy_aneg_done(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	return (pdata-&gt;an_result == XGBE_AN_COMPLETE);</div><div class='hunk'>@@ -1003,120 +1207,94 @@ static bool xgbe_phy_aneg_done(struct xgbe_prv_data *pdata)</div><div class='ctx'> static void xgbe_check_link_timeout(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	unsigned long link_timeout;</div><div class='add'>+	unsigned long kr_time;</div><div class='add'>+	int wait;</div><div class='ctx'> </div><div class='ctx'> 	link_timeout = pdata-&gt;link_check + (XGBE_LINK_TIMEOUT * HZ);</div><div class='ctx'> 	if (time_after(jiffies, link_timeout)) {</div><div class='add'>+		if ((xgbe_cur_mode(pdata) == XGBE_MODE_KR) &amp;&amp;</div><div class='add'>+		    pdata-&gt;phy.autoneg == AUTONEG_ENABLE) {</div><div class='add'>+			/* AN restart should not happen while KR training is in progress.</div><div class='add'>+			 * The while loop ensures no AN restart during KR training,</div><div class='add'>+			 * waits up to 500ms and AN restart is triggered only if KR</div><div class='add'>+			 * training is failed.</div><div class='add'>+			 */</div><div class='add'>+			wait = XGBE_KR_TRAINING_WAIT_ITER;</div><div class='add'>+			while (wait--) {</div><div class='add'>+				kr_time = pdata-&gt;kr_start_time +</div><div class='add'>+					  msecs_to_jiffies(XGBE_AN_MS_TIMEOUT);</div><div class='add'>+				if (time_after(jiffies, kr_time))</div><div class='add'>+					break;</div><div class='add'>+				/* AN restart is not required, if AN result is COMPLETE */</div><div class='add'>+				if (pdata-&gt;an_result == XGBE_AN_COMPLETE)</div><div class='add'>+					return;</div><div class='add'>+				usleep_range(10000, 11000);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='ctx'> 		netif_dbg(pdata, link, pdata-&gt;netdev, "AN link timeout\n");</div><div class='ctx'> 		xgbe_phy_config_aneg(pdata);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xgbe_phy_status_force(struct xgbe_prv_data *pdata)</div><div class='add'>+static enum xgbe_mode xgbe_phy_status_aneg(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	if (xgbe_in_kr_mode(pdata)) {</div><div class='del'>-		pdata-&gt;phy.speed = SPEED_10000;</div><div class='del'>-	} else {</div><div class='del'>-		switch (pdata-&gt;speed_set) {</div><div class='del'>-		case XGBE_SPEEDSET_1000_10000:</div><div class='del'>-			pdata-&gt;phy.speed = SPEED_1000;</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		case XGBE_SPEEDSET_2500_10000:</div><div class='del'>-			pdata-&gt;phy.speed = SPEED_2500;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-	pdata-&gt;phy.duplex = DUPLEX_FULL;</div><div class='add'>+	return pdata-&gt;phy_if.phy_impl.an_outcome(pdata);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xgbe_phy_status_aneg(struct xgbe_prv_data *pdata)</div><div class='add'>+static bool xgbe_phy_status_result(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	unsigned int ad_reg, lp_reg;</div><div class='add'>+	struct ethtool_link_ksettings *lks = &amp;pdata-&gt;phy.lks;</div><div class='add'>+	enum xgbe_mode mode;</div><div class='ctx'> </div><div class='del'>-	pdata-&gt;phy.lp_advertising = 0;</div><div class='add'>+	XGBE_ZERO_LP_ADV(lks);</div><div class='ctx'> </div><div class='ctx'> 	if ((pdata-&gt;phy.autoneg != AUTONEG_ENABLE) || pdata-&gt;parallel_detect)</div><div class='del'>-		return xgbe_phy_status_force(pdata);</div><div class='del'>-</div><div class='del'>-	pdata-&gt;phy.lp_advertising |= ADVERTISED_Autoneg;</div><div class='del'>-	pdata-&gt;phy.lp_advertising |= ADVERTISED_Backplane;</div><div class='del'>-</div><div class='del'>-	/* Compare Advertisement and Link Partner register 1 */</div><div class='del'>-	ad_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE);</div><div class='del'>-	lp_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_LPA);</div><div class='del'>-	if (lp_reg &amp; 0x400)</div><div class='del'>-		pdata-&gt;phy.lp_advertising |= ADVERTISED_Pause;</div><div class='del'>-	if (lp_reg &amp; 0x800)</div><div class='del'>-		pdata-&gt;phy.lp_advertising |= ADVERTISED_Asym_Pause;</div><div class='del'>-</div><div class='del'>-	if (pdata-&gt;phy.pause_autoneg) {</div><div class='del'>-		/* Set flow control based on auto-negotiation result */</div><div class='del'>-		pdata-&gt;phy.tx_pause = 0;</div><div class='del'>-		pdata-&gt;phy.rx_pause = 0;</div><div class='del'>-</div><div class='del'>-		if (ad_reg &amp; lp_reg &amp; 0x400) {</div><div class='del'>-			pdata-&gt;phy.tx_pause = 1;</div><div class='del'>-			pdata-&gt;phy.rx_pause = 1;</div><div class='del'>-		} else if (ad_reg &amp; lp_reg &amp; 0x800) {</div><div class='del'>-			if (ad_reg &amp; 0x400)</div><div class='del'>-				pdata-&gt;phy.rx_pause = 1;</div><div class='del'>-			else if (lp_reg &amp; 0x400)</div><div class='del'>-				pdata-&gt;phy.tx_pause = 1;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Compare Advertisement and Link Partner register 2 */</div><div class='del'>-	ad_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 1);</div><div class='del'>-	lp_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_LPA + 1);</div><div class='del'>-	if (lp_reg &amp; 0x80)</div><div class='del'>-		pdata-&gt;phy.lp_advertising |= ADVERTISED_10000baseKR_Full;</div><div class='del'>-	if (lp_reg &amp; 0x20) {</div><div class='del'>-		switch (pdata-&gt;speed_set) {</div><div class='del'>-		case XGBE_SPEEDSET_1000_10000:</div><div class='del'>-			pdata-&gt;phy.lp_advertising |= ADVERTISED_1000baseKX_Full;</div><div class='del'>-			break;</div><div class='del'>-		case XGBE_SPEEDSET_2500_10000:</div><div class='del'>-			pdata-&gt;phy.lp_advertising |= ADVERTISED_2500baseX_Full;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+		mode = xgbe_cur_mode(pdata);</div><div class='add'>+	else</div><div class='add'>+		mode = xgbe_phy_status_aneg(pdata);</div><div class='ctx'> </div><div class='del'>-	ad_reg &amp;= lp_reg;</div><div class='del'>-	if (ad_reg &amp; 0x80) {</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case XGBE_MODE_SGMII_10:</div><div class='add'>+		pdata-&gt;phy.speed = SPEED_10;</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_MODE_SGMII_100:</div><div class='add'>+		pdata-&gt;phy.speed = SPEED_100;</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_MODE_X:</div><div class='add'>+	case XGBE_MODE_KX_1000:</div><div class='add'>+	case XGBE_MODE_SGMII_1000:</div><div class='add'>+		pdata-&gt;phy.speed = SPEED_1000;</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_MODE_KX_2500:</div><div class='add'>+		pdata-&gt;phy.speed = SPEED_2500;</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_MODE_KR:</div><div class='add'>+	case XGBE_MODE_SFI:</div><div class='ctx'> 		pdata-&gt;phy.speed = SPEED_10000;</div><div class='del'>-		xgbe_set_mode(pdata, XGBE_MODE_KR);</div><div class='del'>-	} else if (ad_reg &amp; 0x20) {</div><div class='del'>-		switch (pdata-&gt;speed_set) {</div><div class='del'>-		case XGBE_SPEEDSET_1000_10000:</div><div class='del'>-			pdata-&gt;phy.speed = SPEED_1000;</div><div class='del'>-			break;</div><div class='del'>-</div><div class='del'>-		case XGBE_SPEEDSET_2500_10000:</div><div class='del'>-			pdata-&gt;phy.speed = SPEED_2500;</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		xgbe_set_mode(pdata, XGBE_MODE_KX);</div><div class='del'>-	} else {</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_MODE_UNKNOWN:</div><div class='add'>+	default:</div><div class='ctx'> 		pdata-&gt;phy.speed = SPEED_UNKNOWN;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Compare Advertisement and Link Partner register 3 */</div><div class='del'>-	ad_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 2);</div><div class='del'>-	lp_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_LPA + 2);</div><div class='del'>-	if (lp_reg &amp; 0xc000)</div><div class='del'>-		pdata-&gt;phy.lp_advertising |= ADVERTISED_10000baseR_FEC;</div><div class='del'>-</div><div class='ctx'> 	pdata-&gt;phy.duplex = DUPLEX_FULL;</div><div class='add'>+</div><div class='add'>+	if (!xgbe_set_mode(pdata, mode))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;an_again)</div><div class='add'>+		xgbe_phy_reconfig_aneg(pdata);</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgbe_phy_status(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	unsigned int reg, link_aneg;</div><div class='add'>+	unsigned int link_aneg;</div><div class='add'>+	int an_restart;</div><div class='ctx'> </div><div class='ctx'> 	if (test_bit(XGBE_LINK_ERR, &amp;pdata-&gt;dev_state)) {</div><div class='del'>-		if (test_and_clear_bit(XGBE_LINK, &amp;pdata-&gt;dev_state))</div><div class='del'>-			netif_carrier_off(pdata-&gt;netdev);</div><div class='add'>+		netif_carrier_off(pdata-&gt;netdev);</div><div class='ctx'> </div><div class='ctx'> 		pdata-&gt;phy.link = 0;</div><div class='ctx'> 		goto adjust_link;</div><div class='hunk'>@@ -1124,12 +1302,16 @@ static void xgbe_phy_status(struct xgbe_prv_data *pdata)</div><div class='ctx'> </div><div class='ctx'> 	link_aneg = (pdata-&gt;phy.autoneg == AUTONEG_ENABLE);</div><div class='ctx'> </div><div class='del'>-	/* Get the link status. Link status is latched low, so read</div><div class='del'>-	 * once to clear and then read again to get current state</div><div class='del'>-	 */</div><div class='del'>-	reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1);</div><div class='del'>-	reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1);</div><div class='del'>-	pdata-&gt;phy.link = (reg &amp; MDIO_STAT1_LSTATUS) ? 1 : 0;</div><div class='add'>+	pdata-&gt;phy.link = pdata-&gt;phy_if.phy_impl.link_status(pdata,</div><div class='add'>+							     &amp;an_restart);</div><div class='add'>+	/* bail out if the link status register read fails */</div><div class='add'>+	if (pdata-&gt;phy.link &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (an_restart) {</div><div class='add'>+		xgbe_phy_config_aneg(pdata);</div><div class='add'>+		goto adjust_link;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (pdata-&gt;phy.link) {</div><div class='ctx'> 		if (link_aneg &amp;&amp; !xgbe_phy_aneg_done(pdata)) {</div><div class='hunk'>@@ -1137,15 +1319,13 @@ static void xgbe_phy_status(struct xgbe_prv_data *pdata)</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		xgbe_phy_status_aneg(pdata);</div><div class='add'>+		if (xgbe_phy_status_result(pdata))</div><div class='add'>+			return;</div><div class='ctx'> </div><div class='ctx'> 		if (test_bit(XGBE_LINK_INIT, &amp;pdata-&gt;dev_state))</div><div class='ctx'> 			clear_bit(XGBE_LINK_INIT, &amp;pdata-&gt;dev_state);</div><div class='ctx'> </div><div class='del'>-		if (!test_bit(XGBE_LINK, &amp;pdata-&gt;dev_state)) {</div><div class='del'>-			set_bit(XGBE_LINK, &amp;pdata-&gt;dev_state);</div><div class='del'>-			netif_carrier_on(pdata-&gt;netdev);</div><div class='del'>-		}</div><div class='add'>+		netif_carrier_on(pdata-&gt;netdev);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		if (test_bit(XGBE_LINK_INIT, &amp;pdata-&gt;dev_state)) {</div><div class='ctx'> 			xgbe_check_link_timeout(pdata);</div><div class='hunk'>@@ -1154,12 +1334,9 @@ static void xgbe_phy_status(struct xgbe_prv_data *pdata)</div><div class='ctx'> 				return;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		xgbe_phy_status_aneg(pdata);</div><div class='add'>+		xgbe_phy_status_result(pdata);</div><div class='ctx'> </div><div class='del'>-		if (test_bit(XGBE_LINK, &amp;pdata-&gt;dev_state)) {</div><div class='del'>-			clear_bit(XGBE_LINK, &amp;pdata-&gt;dev_state);</div><div class='del'>-			netif_carrier_off(pdata-&gt;netdev);</div><div class='del'>-		}</div><div class='add'>+		netif_carrier_off(pdata-&gt;netdev);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> adjust_link:</div><div class='hunk'>@@ -1170,17 +1347,23 @@ static void xgbe_phy_stop(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	netif_dbg(pdata, link, pdata-&gt;netdev, "stopping PHY\n");</div><div class='ctx'> </div><div class='add'>+	if (!pdata-&gt;phy_started)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Indicate the PHY is down */</div><div class='add'>+	pdata-&gt;phy_started = 0;</div><div class='add'>+</div><div class='ctx'> 	/* Disable auto-negotiation */</div><div class='del'>-	xgbe_disable_an(pdata);</div><div class='add'>+	xgbe_an_disable_all(pdata);</div><div class='ctx'> </div><div class='del'>-	/* Disable auto-negotiation interrupts */</div><div class='del'>-	XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_INTMASK, 0);</div><div class='add'>+	if (pdata-&gt;dev_irq != pdata-&gt;an_irq) {</div><div class='add'>+		devm_free_irq(pdata-&gt;dev, pdata-&gt;an_irq, pdata);</div><div class='add'>+		cancel_work_sync(&amp;pdata-&gt;an_bh_work);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	devm_free_irq(pdata-&gt;dev, pdata-&gt;an_irq, pdata);</div><div class='add'>+	pdata-&gt;phy_if.phy_impl.stop(pdata);</div><div class='ctx'> </div><div class='ctx'> 	pdata-&gt;phy.link = 0;</div><div class='del'>-	if (test_and_clear_bit(XGBE_LINK, &amp;pdata-&gt;dev_state))</div><div class='del'>-		netif_carrier_off(pdata-&gt;netdev);</div><div class='ctx'> </div><div class='ctx'> 	xgbe_phy_adjust_link(pdata);</div><div class='ctx'> }</div><div class='hunk'>@@ -1192,64 +1375,78 @@ static int xgbe_phy_start(struct xgbe_prv_data *pdata)</div><div class='ctx'> </div><div class='ctx'> 	netif_dbg(pdata, link, pdata-&gt;netdev, "starting PHY\n");</div><div class='ctx'> </div><div class='del'>-	ret = devm_request_irq(pdata-&gt;dev, pdata-&gt;an_irq,</div><div class='del'>-			       xgbe_an_isr, 0, pdata-&gt;an_name,</div><div class='del'>-			       pdata);</div><div class='del'>-	if (ret) {</div><div class='del'>-		netdev_err(netdev, "phy irq request failed\n");</div><div class='add'>+	ret = pdata-&gt;phy_if.phy_impl.start(pdata);</div><div class='add'>+	if (ret)</div><div class='ctx'> 		return ret;</div><div class='add'>+</div><div class='add'>+	/* If we have a separate AN irq, enable it */</div><div class='add'>+	if (pdata-&gt;dev_irq != pdata-&gt;an_irq) {</div><div class='add'>+		INIT_WORK(&amp;pdata-&gt;an_bh_work, xgbe_an_isr_bh_work);</div><div class='add'>+</div><div class='add'>+		ret = devm_request_irq(pdata-&gt;dev, pdata-&gt;an_irq,</div><div class='add'>+				       xgbe_an_isr, 0, pdata-&gt;an_name,</div><div class='add'>+				       pdata);</div><div class='add'>+		if (ret) {</div><div class='add'>+			netdev_err(netdev, "phy irq request failed\n");</div><div class='add'>+			goto err_stop;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Set initial mode - call the mode setting routines</div><div class='ctx'> 	 * directly to insure we are properly configured</div><div class='ctx'> 	 */</div><div class='del'>-	if (xgbe_use_xgmii_mode(pdata)) {</div><div class='del'>-		xgbe_xgmii_mode(pdata);</div><div class='del'>-	} else if (xgbe_use_gmii_mode(pdata)) {</div><div class='del'>-		xgbe_gmii_mode(pdata);</div><div class='del'>-	} else if (xgbe_use_gmii_2500_mode(pdata)) {</div><div class='del'>-		xgbe_gmii_2500_mode(pdata);</div><div class='add'>+	if (xgbe_use_mode(pdata, XGBE_MODE_KR)) {</div><div class='add'>+		xgbe_kr_mode(pdata);</div><div class='add'>+	} else if (xgbe_use_mode(pdata, XGBE_MODE_KX_2500)) {</div><div class='add'>+		xgbe_kx_2500_mode(pdata);</div><div class='add'>+	} else if (xgbe_use_mode(pdata, XGBE_MODE_KX_1000)) {</div><div class='add'>+		xgbe_kx_1000_mode(pdata);</div><div class='add'>+	} else if (xgbe_use_mode(pdata, XGBE_MODE_SFI)) {</div><div class='add'>+		xgbe_sfi_mode(pdata);</div><div class='add'>+	} else if (xgbe_use_mode(pdata, XGBE_MODE_X)) {</div><div class='add'>+		xgbe_x_mode(pdata);</div><div class='add'>+	} else if (xgbe_use_mode(pdata, XGBE_MODE_SGMII_1000)) {</div><div class='add'>+		xgbe_sgmii_1000_mode(pdata);</div><div class='add'>+	} else if (xgbe_use_mode(pdata, XGBE_MODE_SGMII_100)) {</div><div class='add'>+		xgbe_sgmii_100_mode(pdata);</div><div class='add'>+	} else if (xgbe_use_mode(pdata, XGBE_MODE_SGMII_10)) {</div><div class='add'>+		xgbe_sgmii_10_mode(pdata);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		ret = -EINVAL;</div><div class='ctx'> 		goto err_irq;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/* Set up advertisement registers based on current settings */</div><div class='del'>-	xgbe_an_init(pdata);</div><div class='add'>+	/* Indicate the PHY is up and running */</div><div class='add'>+	pdata-&gt;phy_started = 1;</div><div class='ctx'> </div><div class='del'>-	/* Enable auto-negotiation interrupts */</div><div class='del'>-	XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_INTMASK, 0x07);</div><div class='add'>+	xgbe_an_init(pdata);</div><div class='add'>+	xgbe_an_enable_interrupts(pdata);</div><div class='ctx'> </div><div class='ctx'> 	return xgbe_phy_config_aneg(pdata);</div><div class='ctx'> </div><div class='ctx'> err_irq:</div><div class='del'>-	devm_free_irq(pdata-&gt;dev, pdata-&gt;an_irq, pdata);</div><div class='add'>+	if (pdata-&gt;dev_irq != pdata-&gt;an_irq)</div><div class='add'>+		devm_free_irq(pdata-&gt;dev, pdata-&gt;an_irq, pdata);</div><div class='add'>+</div><div class='add'>+err_stop:</div><div class='add'>+	pdata-&gt;phy_if.phy_impl.stop(pdata);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int xgbe_phy_reset(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='del'>-	unsigned int count, reg;</div><div class='del'>-</div><div class='del'>-	reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1);</div><div class='del'>-	reg |= MDIO_CTRL1_RESET;</div><div class='del'>-	XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, reg);</div><div class='del'>-</div><div class='del'>-	count = 50;</div><div class='del'>-	do {</div><div class='del'>-		msleep(20);</div><div class='del'>-		reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1);</div><div class='del'>-	} while ((reg &amp; MDIO_CTRL1_RESET) &amp;&amp; --count);</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='del'>-	if (reg &amp; MDIO_CTRL1_RESET)</div><div class='del'>-		return -ETIMEDOUT;</div><div class='add'>+	ret = pdata-&gt;phy_if.phy_impl.reset(pdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='ctx'> 	/* Disable auto-negotiation for now */</div><div class='del'>-	xgbe_disable_an(pdata);</div><div class='add'>+	xgbe_an_disable_all(pdata);</div><div class='ctx'> </div><div class='ctx'> 	/* Clear auto-negotiation interrupts */</div><div class='del'>-	XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_AN_INT, 0);</div><div class='add'>+	xgbe_an_clear_interrupts_all(pdata);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -1260,75 +1457,105 @@ static void xgbe_dump_phy_registers(struct xgbe_prv_data *pdata)</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(dev, "\n************* PHY Reg dump **********************\n");</div><div class='ctx'> </div><div class='del'>-	dev_dbg(dev, "PCS Control Reg (%#04x) = %#04x\n", MDIO_CTRL1,</div><div class='add'>+	dev_dbg(dev, "PCS Control Reg (%#06x) = %#06x\n", MDIO_CTRL1,</div><div class='ctx'> 		XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1));</div><div class='del'>-	dev_dbg(dev, "PCS Status Reg (%#04x) = %#04x\n", MDIO_STAT1,</div><div class='add'>+	dev_dbg(dev, "PCS Status Reg (%#06x) = %#06x\n", MDIO_STAT1,</div><div class='ctx'> 		XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1));</div><div class='del'>-	dev_dbg(dev, "Phy Id (PHYS ID 1 %#04x)= %#04x\n", MDIO_DEVID1,</div><div class='add'>+	dev_dbg(dev, "Phy Id (PHYS ID 1 %#06x)= %#06x\n", MDIO_DEVID1,</div><div class='ctx'> 		XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_DEVID1));</div><div class='del'>-	dev_dbg(dev, "Phy Id (PHYS ID 2 %#04x)= %#04x\n", MDIO_DEVID2,</div><div class='add'>+	dev_dbg(dev, "Phy Id (PHYS ID 2 %#06x)= %#06x\n", MDIO_DEVID2,</div><div class='ctx'> 		XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_DEVID2));</div><div class='del'>-	dev_dbg(dev, "Devices in Package (%#04x)= %#04x\n", MDIO_DEVS1,</div><div class='add'>+	dev_dbg(dev, "Devices in Package (%#06x)= %#06x\n", MDIO_DEVS1,</div><div class='ctx'> 		XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_DEVS1));</div><div class='del'>-	dev_dbg(dev, "Devices in Package (%#04x)= %#04x\n", MDIO_DEVS2,</div><div class='add'>+	dev_dbg(dev, "Devices in Package (%#06x)= %#06x\n", MDIO_DEVS2,</div><div class='ctx'> 		XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_DEVS2));</div><div class='ctx'> </div><div class='del'>-	dev_dbg(dev, "Auto-Neg Control Reg (%#04x) = %#04x\n", MDIO_CTRL1,</div><div class='add'>+	dev_dbg(dev, "Auto-Neg Control Reg (%#06x) = %#06x\n", MDIO_CTRL1,</div><div class='ctx'> 		XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_CTRL1));</div><div class='del'>-	dev_dbg(dev, "Auto-Neg Status Reg (%#04x) = %#04x\n", MDIO_STAT1,</div><div class='add'>+	dev_dbg(dev, "Auto-Neg Status Reg (%#06x) = %#06x\n", MDIO_STAT1,</div><div class='ctx'> 		XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_STAT1));</div><div class='del'>-	dev_dbg(dev, "Auto-Neg Ad Reg 1 (%#04x) = %#04x\n",</div><div class='add'>+	dev_dbg(dev, "Auto-Neg Ad Reg 1 (%#06x) = %#06x\n",</div><div class='ctx'> 		MDIO_AN_ADVERTISE,</div><div class='ctx'> 		XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE));</div><div class='del'>-	dev_dbg(dev, "Auto-Neg Ad Reg 2 (%#04x) = %#04x\n",</div><div class='add'>+	dev_dbg(dev, "Auto-Neg Ad Reg 2 (%#06x) = %#06x\n",</div><div class='ctx'> 		MDIO_AN_ADVERTISE + 1,</div><div class='ctx'> 		XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 1));</div><div class='del'>-	dev_dbg(dev, "Auto-Neg Ad Reg 3 (%#04x) = %#04x\n",</div><div class='add'>+	dev_dbg(dev, "Auto-Neg Ad Reg 3 (%#06x) = %#06x\n",</div><div class='ctx'> 		MDIO_AN_ADVERTISE + 2,</div><div class='ctx'> 		XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 2));</div><div class='del'>-	dev_dbg(dev, "Auto-Neg Completion Reg (%#04x) = %#04x\n",</div><div class='add'>+	dev_dbg(dev, "Auto-Neg Completion Reg (%#06x) = %#06x\n",</div><div class='ctx'> 		MDIO_AN_COMP_STAT,</div><div class='ctx'> 		XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_COMP_STAT));</div><div class='ctx'> </div><div class='ctx'> 	dev_dbg(dev, "\n*************************************************\n");</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xgbe_phy_init(struct xgbe_prv_data *pdata)</div><div class='add'>+static int xgbe_phy_best_advertised_speed(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct ethtool_link_ksettings *lks = &amp;pdata-&gt;phy.lks;</div><div class='add'>+</div><div class='add'>+	if (XGBE_ADV(lks, 10000baseKR_Full))</div><div class='add'>+		return SPEED_10000;</div><div class='add'>+	else if (XGBE_ADV(lks, 10000baseT_Full))</div><div class='add'>+		return SPEED_10000;</div><div class='add'>+	else if (XGBE_ADV(lks, 2500baseX_Full))</div><div class='add'>+		return SPEED_2500;</div><div class='add'>+	else if (XGBE_ADV(lks, 2500baseT_Full))</div><div class='add'>+		return SPEED_2500;</div><div class='add'>+	else if (XGBE_ADV(lks, 1000baseKX_Full))</div><div class='add'>+		return SPEED_1000;</div><div class='add'>+	else if (XGBE_ADV(lks, 1000baseT_Full))</div><div class='add'>+		return SPEED_1000;</div><div class='add'>+	else if (XGBE_ADV(lks, 100baseT_Full))</div><div class='add'>+		return SPEED_100;</div><div class='add'>+	else if (XGBE_ADV(lks, 10baseT_Full))</div><div class='add'>+		return SPEED_10;</div><div class='add'>+</div><div class='add'>+	return SPEED_UNKNOWN;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_exit(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	pdata-&gt;phy_if.phy_impl.exit(pdata);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_init(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='add'>+	struct ethtool_link_ksettings *lks = &amp;pdata-&gt;phy.lks;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='ctx'> 	mutex_init(&amp;pdata-&gt;an_mutex);</div><div class='ctx'> 	INIT_WORK(&amp;pdata-&gt;an_irq_work, xgbe_an_irq_work);</div><div class='ctx'> 	INIT_WORK(&amp;pdata-&gt;an_work, xgbe_an_state_machine);</div><div class='ctx'> 	pdata-&gt;mdio_mmd = MDIO_MMD_PCS;</div><div class='ctx'> </div><div class='del'>-	/* Initialize supported features */</div><div class='del'>-	pdata-&gt;phy.supported = SUPPORTED_Autoneg;</div><div class='del'>-	pdata-&gt;phy.supported |= SUPPORTED_Pause | SUPPORTED_Asym_Pause;</div><div class='del'>-	pdata-&gt;phy.supported |= SUPPORTED_Backplane;</div><div class='del'>-	pdata-&gt;phy.supported |= SUPPORTED_10000baseKR_Full;</div><div class='del'>-	switch (pdata-&gt;speed_set) {</div><div class='del'>-	case XGBE_SPEEDSET_1000_10000:</div><div class='del'>-		pdata-&gt;phy.supported |= SUPPORTED_1000baseKX_Full;</div><div class='del'>-		break;</div><div class='del'>-	case XGBE_SPEEDSET_2500_10000:</div><div class='del'>-		pdata-&gt;phy.supported |= SUPPORTED_2500baseX_Full;</div><div class='del'>-		break;</div><div class='del'>-	}</div><div class='del'>-</div><div class='add'>+	/* Check for FEC support */</div><div class='ctx'> 	pdata-&gt;fec_ability = XMDIO_READ(pdata, MDIO_MMD_PMAPMD,</div><div class='ctx'> 					MDIO_PMA_10GBR_FECABLE);</div><div class='ctx'> 	pdata-&gt;fec_ability &amp;= (MDIO_PMA_10GBR_FECABLE_ABLE |</div><div class='ctx'> 			       MDIO_PMA_10GBR_FECABLE_ERRABLE);</div><div class='del'>-	if (pdata-&gt;fec_ability &amp; MDIO_PMA_10GBR_FECABLE_ABLE)</div><div class='del'>-		pdata-&gt;phy.supported |= SUPPORTED_10000baseR_FEC;</div><div class='ctx'> </div><div class='del'>-	pdata-&gt;phy.advertising = pdata-&gt;phy.supported;</div><div class='add'>+	/* Setup the phy (including supported features) */</div><div class='add'>+	ret = pdata-&gt;phy_if.phy_impl.init(pdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Copy supported link modes to advertising link modes */</div><div class='add'>+	XGBE_LM_COPY(lks, advertising, lks, supported);</div><div class='ctx'> </div><div class='ctx'> 	pdata-&gt;phy.address = 0;</div><div class='ctx'> </div><div class='del'>-	pdata-&gt;phy.autoneg = AUTONEG_ENABLE;</div><div class='del'>-	pdata-&gt;phy.speed = SPEED_UNKNOWN;</div><div class='del'>-	pdata-&gt;phy.duplex = DUPLEX_UNKNOWN;</div><div class='add'>+	if (XGBE_ADV(lks, Autoneg)) {</div><div class='add'>+		pdata-&gt;phy.autoneg = AUTONEG_ENABLE;</div><div class='add'>+		pdata-&gt;phy.speed = SPEED_UNKNOWN;</div><div class='add'>+		pdata-&gt;phy.duplex = DUPLEX_UNKNOWN;</div><div class='add'>+	} else {</div><div class='add'>+		pdata-&gt;phy.autoneg = AUTONEG_DISABLE;</div><div class='add'>+		pdata-&gt;phy.speed = xgbe_phy_best_advertised_speed(pdata);</div><div class='add'>+		pdata-&gt;phy.duplex = DUPLEX_FULL;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='add'>+	pdata-&gt;phy_link = 0;</div><div class='ctx'> 	pdata-&gt;phy.link = 0;</div><div class='ctx'> </div><div class='ctx'> 	pdata-&gt;phy.pause_autoneg = pdata-&gt;pause_autoneg;</div><div class='hunk'>@@ -1336,24 +1563,32 @@ static void xgbe_phy_init(struct xgbe_prv_data *pdata)</div><div class='ctx'> 	pdata-&gt;phy.rx_pause = pdata-&gt;rx_pause;</div><div class='ctx'> </div><div class='ctx'> 	/* Fix up Flow Control advertising */</div><div class='del'>-	pdata-&gt;phy.advertising &amp;= ~ADVERTISED_Pause;</div><div class='del'>-	pdata-&gt;phy.advertising &amp;= ~ADVERTISED_Asym_Pause;</div><div class='add'>+	XGBE_CLR_ADV(lks, Pause);</div><div class='add'>+	XGBE_CLR_ADV(lks, Asym_Pause);</div><div class='ctx'> </div><div class='ctx'> 	if (pdata-&gt;rx_pause) {</div><div class='del'>-		pdata-&gt;phy.advertising |= ADVERTISED_Pause;</div><div class='del'>-		pdata-&gt;phy.advertising |= ADVERTISED_Asym_Pause;</div><div class='add'>+		XGBE_SET_ADV(lks, Pause);</div><div class='add'>+		XGBE_SET_ADV(lks, Asym_Pause);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (pdata-&gt;tx_pause)</div><div class='del'>-		pdata-&gt;phy.advertising ^= ADVERTISED_Asym_Pause;</div><div class='add'>+	if (pdata-&gt;tx_pause) {</div><div class='add'>+		/* Equivalent to XOR of Asym_Pause */</div><div class='add'>+		if (XGBE_ADV(lks, Asym_Pause))</div><div class='add'>+			XGBE_CLR_ADV(lks, Asym_Pause);</div><div class='add'>+		else</div><div class='add'>+			XGBE_SET_ADV(lks, Asym_Pause);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	if (netif_msg_drv(pdata))</div><div class='ctx'> 		xgbe_dump_phy_registers(pdata);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void xgbe_init_function_ptrs_phy(struct xgbe_phy_if *phy_if)</div><div class='ctx'> {</div><div class='ctx'> 	phy_if-&gt;phy_init        = xgbe_phy_init;</div><div class='add'>+	phy_if-&gt;phy_exit        = xgbe_phy_exit;</div><div class='ctx'> </div><div class='ctx'> 	phy_if-&gt;phy_reset       = xgbe_phy_reset;</div><div class='ctx'> 	phy_if-&gt;phy_start       = xgbe_phy_start;</div><div class='hunk'>@@ -1361,4 +1596,11 @@ void xgbe_init_function_ptrs_phy(struct xgbe_phy_if *phy_if)</div><div class='ctx'> </div><div class='ctx'> 	phy_if-&gt;phy_status      = xgbe_phy_status;</div><div class='ctx'> 	phy_if-&gt;phy_config_aneg = xgbe_phy_config_aneg;</div><div class='add'>+</div><div class='add'>+	phy_if-&gt;phy_valid_speed = xgbe_phy_valid_speed;</div><div class='add'>+</div><div class='add'>+	phy_if-&gt;an_isr          = xgbe_an_combined_isr;</div><div class='add'>+</div><div class='add'>+	phy_if-&gt;module_info     = xgbe_phy_module_info;</div><div class='add'>+	phy_if-&gt;module_eeprom   = xgbe_phy_module_eeprom;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-pci.c b/drivers/net/ethernet/amd/xgbe/xgbe-pci.c<br/>new file mode 100644<br/>index 000000000000..e3e1dca9856a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-pci.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe-pci.c</a></div><div class='hunk'>@@ -0,0 +1,476 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/log2.h&gt;</div><div class='add'>+#include "xgbe-smn.h"</div><div class='add'>+</div><div class='add'>+#include "xgbe.h"</div><div class='add'>+#include "xgbe-common.h"</div><div class='add'>+</div><div class='add'>+static int xgbe_config_multi_msi(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	unsigned int vector_count;</div><div class='add'>+	unsigned int i, j;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	vector_count = XGBE_MSI_BASE_COUNT;</div><div class='add'>+	vector_count += max(pdata-&gt;rx_ring_count,</div><div class='add'>+			    pdata-&gt;tx_ring_count);</div><div class='add'>+</div><div class='add'>+	ret = pci_alloc_irq_vectors(pdata-&gt;pcidev, XGBE_MSI_MIN_COUNT,</div><div class='add'>+				    vector_count, PCI_IRQ_MSI | PCI_IRQ_MSIX);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_info(pdata-&gt;dev, "multi MSI/MSI-X enablement failed\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pdata-&gt;isr_as_bh_work = 1;</div><div class='add'>+	pdata-&gt;irq_count = ret;</div><div class='add'>+</div><div class='add'>+	pdata-&gt;dev_irq = pci_irq_vector(pdata-&gt;pcidev, 0);</div><div class='add'>+	pdata-&gt;ecc_irq = pci_irq_vector(pdata-&gt;pcidev, 1);</div><div class='add'>+	pdata-&gt;i2c_irq = pci_irq_vector(pdata-&gt;pcidev, 2);</div><div class='add'>+	pdata-&gt;an_irq = pci_irq_vector(pdata-&gt;pcidev, 3);</div><div class='add'>+</div><div class='add'>+	for (i = XGBE_MSI_BASE_COUNT, j = 0; i &lt; ret; i++, j++)</div><div class='add'>+		pdata-&gt;channel_irq[j] = pci_irq_vector(pdata-&gt;pcidev, i);</div><div class='add'>+	pdata-&gt;channel_irq_count = j;</div><div class='add'>+</div><div class='add'>+	pdata-&gt;per_channel_irq = 1;</div><div class='add'>+	pdata-&gt;channel_irq_mode = XGBE_IRQ_MODE_LEVEL;</div><div class='add'>+</div><div class='add'>+	if (netif_msg_probe(pdata))</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "multi %s interrupts enabled\n",</div><div class='add'>+			pdata-&gt;pcidev-&gt;msix_enabled ? "MSI-X" : "MSI");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_config_irqs(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = xgbe_config_multi_msi(pdata);</div><div class='add'>+	if (!ret)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	ret = pci_alloc_irq_vectors(pdata-&gt;pcidev, 1, 1,</div><div class='add'>+				    PCI_IRQ_INTX | PCI_IRQ_MSI);</div><div class='add'>+	if (ret &lt; 0) {</div><div class='add'>+		dev_info(pdata-&gt;dev, "single IRQ enablement failed\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pdata-&gt;isr_as_bh_work = pdata-&gt;pcidev-&gt;msi_enabled ? 1 : 0;</div><div class='add'>+	pdata-&gt;irq_count = 1;</div><div class='add'>+	pdata-&gt;channel_irq_count = 1;</div><div class='add'>+</div><div class='add'>+	pdata-&gt;dev_irq = pci_irq_vector(pdata-&gt;pcidev, 0);</div><div class='add'>+	pdata-&gt;ecc_irq = pci_irq_vector(pdata-&gt;pcidev, 0);</div><div class='add'>+	pdata-&gt;i2c_irq = pci_irq_vector(pdata-&gt;pcidev, 0);</div><div class='add'>+	pdata-&gt;an_irq = pci_irq_vector(pdata-&gt;pcidev, 0);</div><div class='add'>+</div><div class='add'>+	if (netif_msg_probe(pdata))</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "single %s interrupt enabled\n",</div><div class='add'>+			pdata-&gt;pcidev-&gt;msi_enabled ?  "MSI" : "legacy");</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	if (netif_msg_probe(pdata)) {</div><div class='add'>+		unsigned int i;</div><div class='add'>+</div><div class='add'>+		dev_dbg(pdata-&gt;dev, " dev irq=%d\n", pdata-&gt;dev_irq);</div><div class='add'>+		dev_dbg(pdata-&gt;dev, " ecc irq=%d\n", pdata-&gt;ecc_irq);</div><div class='add'>+		dev_dbg(pdata-&gt;dev, " i2c irq=%d\n", pdata-&gt;i2c_irq);</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "  an irq=%d\n", pdata-&gt;an_irq);</div><div class='add'>+		for (i = 0; i &lt; pdata-&gt;channel_irq_count; i++)</div><div class='add'>+			dev_dbg(pdata-&gt;dev, " dma%u irq=%d\n",</div><div class='add'>+				i, pdata-&gt;channel_irq[i]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)</div><div class='add'>+{</div><div class='add'>+	void __iomem * const *iomap_table;</div><div class='add'>+	unsigned int port_addr_size, reg;</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct xgbe_prv_data *pdata;</div><div class='add'>+	unsigned int ma_lo, ma_hi;</div><div class='add'>+	struct pci_dev *rdev;</div><div class='add'>+	int bar_mask, ret;</div><div class='add'>+	u32 address;</div><div class='add'>+</div><div class='add'>+	pdata = xgbe_alloc_pdata(dev);</div><div class='add'>+	if (IS_ERR(pdata)) {</div><div class='add'>+		ret = PTR_ERR(pdata);</div><div class='add'>+		goto err_alloc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pdata-&gt;pcidev = pdev;</div><div class='add'>+	pci_set_drvdata(pdev, pdata);</div><div class='add'>+</div><div class='add'>+	/* Get the version data */</div><div class='add'>+	pdata-&gt;vdata = (struct xgbe_version_data *)id-&gt;driver_data;</div><div class='add'>+</div><div class='add'>+	ret = pcim_enable_device(pdev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "pcim_enable_device failed\n");</div><div class='add'>+		goto err_pci_enable;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Obtain the mmio areas for the device */</div><div class='add'>+	bar_mask = pci_select_bars(pdev, IORESOURCE_MEM);</div><div class='add'>+	ret = pcim_iomap_regions(pdev, bar_mask, XGBE_DRV_NAME);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "pcim_iomap_regions failed\n");</div><div class='add'>+		goto err_pci_enable;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	iomap_table = pcim_iomap_table(pdev);</div><div class='add'>+	if (!iomap_table) {</div><div class='add'>+		dev_err(dev, "pcim_iomap_table failed\n");</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err_pci_enable;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pdata-&gt;xgmac_regs = iomap_table[XGBE_XGMAC_BAR];</div><div class='add'>+	if (!pdata-&gt;xgmac_regs) {</div><div class='add'>+		dev_err(dev, "xgmac ioremap failed\n");</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err_pci_enable;</div><div class='add'>+	}</div><div class='add'>+	pdata-&gt;xprop_regs = pdata-&gt;xgmac_regs + XGBE_MAC_PROP_OFFSET;</div><div class='add'>+	pdata-&gt;xi2c_regs = pdata-&gt;xgmac_regs + XGBE_I2C_CTRL_OFFSET;</div><div class='add'>+	if (netif_msg_probe(pdata)) {</div><div class='add'>+		dev_dbg(dev, "xgmac_regs = %p\n", pdata-&gt;xgmac_regs);</div><div class='add'>+		dev_dbg(dev, "xprop_regs = %p\n", pdata-&gt;xprop_regs);</div><div class='add'>+		dev_dbg(dev, "xi2c_regs  = %p\n", pdata-&gt;xi2c_regs);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pdata-&gt;xpcs_regs = iomap_table[XGBE_XPCS_BAR];</div><div class='add'>+	if (!pdata-&gt;xpcs_regs) {</div><div class='add'>+		dev_err(dev, "xpcs ioremap failed\n");</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto err_pci_enable;</div><div class='add'>+	}</div><div class='add'>+	if (netif_msg_probe(pdata))</div><div class='add'>+		dev_dbg(dev, "xpcs_regs  = %p\n", pdata-&gt;xpcs_regs);</div><div class='add'>+</div><div class='add'>+	/* Set the PCS indirect addressing definition registers */</div><div class='add'>+	rdev = pci_get_domain_bus_and_slot(0, 0, PCI_DEVFN(0, 0));</div><div class='add'>+	if (rdev &amp;&amp; rdev-&gt;vendor == PCI_VENDOR_ID_AMD) {</div><div class='add'>+		switch (rdev-&gt;device) {</div><div class='add'>+		case XGBE_RV_PCI_DEVICE_ID:</div><div class='add'>+			pdata-&gt;xpcs_window_def_reg = PCS_V2_RV_WINDOW_DEF;</div><div class='add'>+			pdata-&gt;xpcs_window_sel_reg = PCS_V2_RV_WINDOW_SELECT;</div><div class='add'>+			break;</div><div class='add'>+		case XGBE_YC_PCI_DEVICE_ID:</div><div class='add'>+			pdata-&gt;xpcs_window_def_reg = PCS_V2_YC_WINDOW_DEF;</div><div class='add'>+			pdata-&gt;xpcs_window_sel_reg = PCS_V2_YC_WINDOW_SELECT;</div><div class='add'>+</div><div class='add'>+			/* Yellow Carp devices do not need cdr workaround */</div><div class='add'>+			pdata-&gt;vdata-&gt;an_cdr_workaround = 0;</div><div class='add'>+</div><div class='add'>+			/* Yellow Carp devices do not need rrc */</div><div class='add'>+			pdata-&gt;vdata-&gt;enable_rrc = 0;</div><div class='add'>+			break;</div><div class='add'>+		case XGBE_RN_PCI_DEVICE_ID:</div><div class='add'>+			pdata-&gt;xpcs_window_def_reg = PCS_V3_RN_WINDOW_DEF;</div><div class='add'>+			pdata-&gt;xpcs_window_sel_reg = PCS_V3_RN_WINDOW_SELECT;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			pdata-&gt;xpcs_window_def_reg = PCS_V2_WINDOW_DEF;</div><div class='add'>+			pdata-&gt;xpcs_window_sel_reg = PCS_V2_WINDOW_SELECT;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		pdata-&gt;xpcs_window_def_reg = PCS_V2_WINDOW_DEF;</div><div class='add'>+		pdata-&gt;xpcs_window_sel_reg = PCS_V2_WINDOW_SELECT;</div><div class='add'>+	}</div><div class='add'>+	pci_dev_put(rdev);</div><div class='add'>+</div><div class='add'>+	/* Configure the PCS indirect addressing support */</div><div class='add'>+	if (pdata-&gt;vdata-&gt;xpcs_access == XGBE_XPCS_ACCESS_V3) {</div><div class='add'>+		reg = XP_IOREAD(pdata, XP_PROP_0);</div><div class='add'>+		port_addr_size = PCS_RN_PORT_ADDR_SIZE *</div><div class='add'>+				 XP_GET_BITS(reg, XP_PROP_0, PORT_ID);</div><div class='add'>+		pdata-&gt;smn_base = PCS_RN_SMN_BASE_ADDR + port_addr_size;</div><div class='add'>+</div><div class='add'>+		address = pdata-&gt;smn_base + (pdata-&gt;xpcs_window_def_reg);</div><div class='add'>+		ret = amd_smn_read(0, address, &amp;reg);</div><div class='add'>+		if (ret) {</div><div class='add'>+			pci_err(pdata-&gt;pcidev, "Failed to read data\n");</div><div class='add'>+			goto err_pci_enable;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		reg = XPCS32_IOREAD(pdata, pdata-&gt;xpcs_window_def_reg);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pdata-&gt;xpcs_window = XPCS_GET_BITS(reg, PCS_V2_WINDOW_DEF, OFFSET);</div><div class='add'>+	pdata-&gt;xpcs_window &lt;&lt;= 6;</div><div class='add'>+	pdata-&gt;xpcs_window_size = XPCS_GET_BITS(reg, PCS_V2_WINDOW_DEF, SIZE);</div><div class='add'>+	pdata-&gt;xpcs_window_size = 1 &lt;&lt; (pdata-&gt;xpcs_window_size + 7);</div><div class='add'>+	pdata-&gt;xpcs_window_mask = pdata-&gt;xpcs_window_size - 1;</div><div class='add'>+	if (netif_msg_probe(pdata)) {</div><div class='add'>+		dev_dbg(dev, "xpcs window def  = %#010x\n",</div><div class='add'>+			pdata-&gt;xpcs_window_def_reg);</div><div class='add'>+		dev_dbg(dev, "xpcs window sel  = %#010x\n",</div><div class='add'>+			pdata-&gt;xpcs_window_sel_reg);</div><div class='add'>+		dev_dbg(dev, "xpcs window      = %#010x\n",</div><div class='add'>+			pdata-&gt;xpcs_window);</div><div class='add'>+		dev_dbg(dev, "xpcs window size = %#010x\n",</div><div class='add'>+			pdata-&gt;xpcs_window_size);</div><div class='add'>+		dev_dbg(dev, "xpcs window mask = %#010x\n",</div><div class='add'>+			pdata-&gt;xpcs_window_mask);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pci_set_master(pdev);</div><div class='add'>+</div><div class='add'>+	/* Enable all interrupts in the hardware */</div><div class='add'>+	XP_IOWRITE(pdata, XP_INT_EN, 0x1fffff);</div><div class='add'>+</div><div class='add'>+	/* Retrieve the MAC address */</div><div class='add'>+	ma_lo = XP_IOREAD(pdata, XP_MAC_ADDR_LO);</div><div class='add'>+	ma_hi = XP_IOREAD(pdata, XP_MAC_ADDR_HI);</div><div class='add'>+	pdata-&gt;mac_addr[0] = ma_lo &amp; 0xff;</div><div class='add'>+	pdata-&gt;mac_addr[1] = (ma_lo &gt;&gt; 8) &amp; 0xff;</div><div class='add'>+	pdata-&gt;mac_addr[2] = (ma_lo &gt;&gt; 16) &amp; 0xff;</div><div class='add'>+	pdata-&gt;mac_addr[3] = (ma_lo &gt;&gt; 24) &amp; 0xff;</div><div class='add'>+	pdata-&gt;mac_addr[4] = ma_hi &amp; 0xff;</div><div class='add'>+	pdata-&gt;mac_addr[5] = (ma_hi &gt;&gt; 8) &amp; 0xff;</div><div class='add'>+	if (!XP_GET_BITS(ma_hi, XP_MAC_ADDR_HI, VALID) ||</div><div class='add'>+	    !is_valid_ether_addr(pdata-&gt;mac_addr)) {</div><div class='add'>+		dev_err(dev, "invalid mac address\n");</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto err_pci_enable;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Clock settings */</div><div class='add'>+	pdata-&gt;sysclk_rate = XGBE_V2_DMA_CLOCK_FREQ;</div><div class='add'>+	pdata-&gt;ptpclk_rate = XGBE_V2_PTP_CLOCK_FREQ;</div><div class='add'>+</div><div class='add'>+	/* Set the DMA coherency values */</div><div class='add'>+	pdata-&gt;coherent = 1;</div><div class='add'>+	pdata-&gt;arcr = XGBE_DMA_PCI_ARCR;</div><div class='add'>+	pdata-&gt;awcr = XGBE_DMA_PCI_AWCR;</div><div class='add'>+	pdata-&gt;awarcr = XGBE_DMA_PCI_AWARCR;</div><div class='add'>+</div><div class='add'>+	/* Read the port property registers */</div><div class='add'>+	pdata-&gt;pp0 = XP_IOREAD(pdata, XP_PROP_0);</div><div class='add'>+	pdata-&gt;pp1 = XP_IOREAD(pdata, XP_PROP_1);</div><div class='add'>+	pdata-&gt;pp2 = XP_IOREAD(pdata, XP_PROP_2);</div><div class='add'>+	pdata-&gt;pp3 = XP_IOREAD(pdata, XP_PROP_3);</div><div class='add'>+	pdata-&gt;pp4 = XP_IOREAD(pdata, XP_PROP_4);</div><div class='add'>+	if (netif_msg_probe(pdata)) {</div><div class='add'>+		dev_dbg(dev, "port property 0 = %#010x\n", pdata-&gt;pp0);</div><div class='add'>+		dev_dbg(dev, "port property 1 = %#010x\n", pdata-&gt;pp1);</div><div class='add'>+		dev_dbg(dev, "port property 2 = %#010x\n", pdata-&gt;pp2);</div><div class='add'>+		dev_dbg(dev, "port property 3 = %#010x\n", pdata-&gt;pp3);</div><div class='add'>+		dev_dbg(dev, "port property 4 = %#010x\n", pdata-&gt;pp4);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set the maximum channels and queues */</div><div class='add'>+	pdata-&gt;tx_max_channel_count = XP_GET_BITS(pdata-&gt;pp1, XP_PROP_1,</div><div class='add'>+						  MAX_TX_DMA);</div><div class='add'>+	pdata-&gt;rx_max_channel_count = XP_GET_BITS(pdata-&gt;pp1, XP_PROP_1,</div><div class='add'>+						  MAX_RX_DMA);</div><div class='add'>+	pdata-&gt;tx_max_q_count = XP_GET_BITS(pdata-&gt;pp1, XP_PROP_1,</div><div class='add'>+					    MAX_TX_QUEUES);</div><div class='add'>+	pdata-&gt;rx_max_q_count = XP_GET_BITS(pdata-&gt;pp1, XP_PROP_1,</div><div class='add'>+					    MAX_RX_QUEUES);</div><div class='add'>+	if (netif_msg_probe(pdata)) {</div><div class='add'>+		dev_dbg(dev, "max tx/rx channel count = %u/%u\n",</div><div class='add'>+			pdata-&gt;tx_max_channel_count,</div><div class='add'>+			pdata-&gt;rx_max_channel_count);</div><div class='add'>+		dev_dbg(dev, "max tx/rx hw queue count = %u/%u\n",</div><div class='add'>+			pdata-&gt;tx_max_q_count, pdata-&gt;rx_max_q_count);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set the hardware channel and queue counts */</div><div class='add'>+	xgbe_set_counts(pdata);</div><div class='add'>+</div><div class='add'>+	/* Set the maximum fifo amounts */</div><div class='add'>+	pdata-&gt;tx_max_fifo_size = XP_GET_BITS(pdata-&gt;pp2, XP_PROP_2,</div><div class='add'>+					      TX_FIFO_SIZE);</div><div class='add'>+	pdata-&gt;tx_max_fifo_size *= 16384;</div><div class='add'>+	pdata-&gt;tx_max_fifo_size = min(pdata-&gt;tx_max_fifo_size,</div><div class='add'>+				      pdata-&gt;vdata-&gt;tx_max_fifo_size);</div><div class='add'>+	pdata-&gt;rx_max_fifo_size = XP_GET_BITS(pdata-&gt;pp2, XP_PROP_2,</div><div class='add'>+					      RX_FIFO_SIZE);</div><div class='add'>+	pdata-&gt;rx_max_fifo_size *= 16384;</div><div class='add'>+	pdata-&gt;rx_max_fifo_size = min(pdata-&gt;rx_max_fifo_size,</div><div class='add'>+				      pdata-&gt;vdata-&gt;rx_max_fifo_size);</div><div class='add'>+	if (netif_msg_probe(pdata))</div><div class='add'>+		dev_dbg(dev, "max tx/rx max fifo size = %u/%u\n",</div><div class='add'>+			pdata-&gt;tx_max_fifo_size, pdata-&gt;rx_max_fifo_size);</div><div class='add'>+</div><div class='add'>+	/* Configure interrupt support */</div><div class='add'>+	ret = xgbe_config_irqs(pdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_pci_enable;</div><div class='add'>+</div><div class='add'>+	/* Configure the netdev resource */</div><div class='add'>+	ret = xgbe_config_netdev(pdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_irq_vectors;</div><div class='add'>+</div><div class='add'>+	netdev_notice(pdata-&gt;netdev, "net device enabled\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_irq_vectors:</div><div class='add'>+	pci_free_irq_vectors(pdata-&gt;pcidev);</div><div class='add'>+</div><div class='add'>+err_pci_enable:</div><div class='add'>+	xgbe_free_pdata(pdata);</div><div class='add'>+</div><div class='add'>+err_alloc:</div><div class='add'>+	dev_notice(dev, "net device not enabled\n");</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_pci_remove(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = pci_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	xgbe_deconfig_netdev(pdata);</div><div class='add'>+</div><div class='add'>+	pci_free_irq_vectors(pdata-&gt;pcidev);</div><div class='add'>+</div><div class='add'>+	/* Disable all interrupts in the hardware */</div><div class='add'>+	XP_IOWRITE(pdata, XP_INT_EN, 0x0);</div><div class='add'>+</div><div class='add'>+	xgbe_free_pdata(pdata);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __maybe_unused xgbe_pci_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = dev_get_drvdata(dev);</div><div class='add'>+	struct net_device *netdev = pdata-&gt;netdev;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (netif_running(netdev))</div><div class='add'>+		ret = xgbe_powerdown(netdev, XGMAC_DRIVER_CONTEXT);</div><div class='add'>+</div><div class='add'>+	pdata-&gt;lpm_ctrl = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1);</div><div class='add'>+	pdata-&gt;lpm_ctrl |= MDIO_CTRL1_LPOWER;</div><div class='add'>+	XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, pdata-&gt;lpm_ctrl);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __maybe_unused xgbe_pci_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = dev_get_drvdata(dev);</div><div class='add'>+	struct net_device *netdev = pdata-&gt;netdev;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	XP_IOWRITE(pdata, XP_INT_EN, 0x1fffff);</div><div class='add'>+</div><div class='add'>+	pdata-&gt;lpm_ctrl &amp;= ~MDIO_CTRL1_LPOWER;</div><div class='add'>+	XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, pdata-&gt;lpm_ctrl);</div><div class='add'>+</div><div class='add'>+	if (netif_running(netdev)) {</div><div class='add'>+		ret = xgbe_powerup(netdev, XGMAC_DRIVER_CONTEXT);</div><div class='add'>+</div><div class='add'>+		/* Schedule a restart in case the link or phy state changed</div><div class='add'>+		 * while we were powered down.</div><div class='add'>+		 */</div><div class='add'>+		schedule_work(&amp;pdata-&gt;restart_work);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct xgbe_version_data xgbe_v3 = {</div><div class='add'>+	.init_function_ptrs_phy_impl	= xgbe_init_function_ptrs_phy_v2,</div><div class='add'>+	.xpcs_access			= XGBE_XPCS_ACCESS_V3,</div><div class='add'>+	.mmc_64bit			= 1,</div><div class='add'>+	.tx_max_fifo_size		= 65536,</div><div class='add'>+	.rx_max_fifo_size		= 65536,</div><div class='add'>+	.tx_tstamp_workaround		= 1,</div><div class='add'>+	.ecc_support			= 1,</div><div class='add'>+	.i2c_support			= 1,</div><div class='add'>+	.irq_reissue_support		= 1,</div><div class='add'>+	.tx_desc_prefetch		= 5,</div><div class='add'>+	.rx_desc_prefetch		= 5,</div><div class='add'>+	.an_cdr_workaround		= 0,</div><div class='add'>+	.enable_rrc			= 0,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct xgbe_version_data xgbe_v2a = {</div><div class='add'>+	.init_function_ptrs_phy_impl	= xgbe_init_function_ptrs_phy_v2,</div><div class='add'>+	.xpcs_access			= XGBE_XPCS_ACCESS_V2,</div><div class='add'>+	.mmc_64bit			= 1,</div><div class='add'>+	.tx_max_fifo_size		= 229376,</div><div class='add'>+	.rx_max_fifo_size		= 229376,</div><div class='add'>+	.tx_tstamp_workaround		= 1,</div><div class='add'>+	.tstamp_ptp_clock_freq		= 1,</div><div class='add'>+	.ecc_support			= 1,</div><div class='add'>+	.i2c_support			= 1,</div><div class='add'>+	.irq_reissue_support		= 1,</div><div class='add'>+	.tx_desc_prefetch		= 5,</div><div class='add'>+	.rx_desc_prefetch		= 5,</div><div class='add'>+	.an_cdr_workaround		= 1,</div><div class='add'>+	.enable_rrc			= 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct xgbe_version_data xgbe_v2b = {</div><div class='add'>+	.init_function_ptrs_phy_impl	= xgbe_init_function_ptrs_phy_v2,</div><div class='add'>+	.xpcs_access			= XGBE_XPCS_ACCESS_V2,</div><div class='add'>+	.mmc_64bit			= 1,</div><div class='add'>+	.tx_max_fifo_size		= 65536,</div><div class='add'>+	.rx_max_fifo_size		= 65536,</div><div class='add'>+	.tx_tstamp_workaround		= 1,</div><div class='add'>+	.tstamp_ptp_clock_freq		= 1,</div><div class='add'>+	.ecc_support			= 1,</div><div class='add'>+	.i2c_support			= 1,</div><div class='add'>+	.irq_reissue_support		= 1,</div><div class='add'>+	.tx_desc_prefetch		= 5,</div><div class='add'>+	.rx_desc_prefetch		= 5,</div><div class='add'>+	.an_cdr_workaround		= 1,</div><div class='add'>+	.enable_rrc			= 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct pci_device_id xgbe_pci_table[] = {</div><div class='add'>+	{ PCI_VDEVICE(AMD, 0x1458),</div><div class='add'>+	  .driver_data = (kernel_ulong_t)&amp;xgbe_v2a },</div><div class='add'>+	{ PCI_VDEVICE(AMD, 0x1459),</div><div class='add'>+	  .driver_data = (kernel_ulong_t)&amp;xgbe_v2b },</div><div class='add'>+	{ PCI_VDEVICE(AMD, 0x1641),</div><div class='add'>+	  .driver_data = (kernel_ulong_t)&amp;xgbe_v3 },</div><div class='add'>+	/* Last entry must be zero */</div><div class='add'>+	{ 0, }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(pci, xgbe_pci_table);</div><div class='add'>+</div><div class='add'>+static SIMPLE_DEV_PM_OPS(xgbe_pci_pm_ops, xgbe_pci_suspend, xgbe_pci_resume);</div><div class='add'>+</div><div class='add'>+static struct pci_driver xgbe_driver = {</div><div class='add'>+	.name = XGBE_DRV_NAME,</div><div class='add'>+	.id_table = xgbe_pci_table,</div><div class='add'>+	.probe = xgbe_pci_probe,</div><div class='add'>+	.remove = xgbe_pci_remove,</div><div class='add'>+	.driver = {</div><div class='add'>+		.pm = &amp;xgbe_pci_pm_ops,</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int xgbe_pci_init(void)</div><div class='add'>+{</div><div class='add'>+	return pci_register_driver(&amp;xgbe_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void xgbe_pci_exit(void)</div><div class='add'>+{</div><div class='add'>+	pci_unregister_driver(&amp;xgbe_driver);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v1.c b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v1.c<br/>new file mode 100644<br/>index 000000000000..2e6b8ffe785c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-phy-v1.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe-phy-v1.c</a></div><div class='hunk'>@@ -0,0 +1,744 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/kmod.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/property.h&gt;</div><div class='add'>+#include &lt;linux/mdio.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+</div><div class='add'>+#include "xgbe.h"</div><div class='add'>+#include "xgbe-common.h"</div><div class='add'>+</div><div class='add'>+#define XGBE_BLWC_PROPERTY		"amd,serdes-blwc"</div><div class='add'>+#define XGBE_CDR_RATE_PROPERTY		"amd,serdes-cdr-rate"</div><div class='add'>+#define XGBE_PQ_SKEW_PROPERTY		"amd,serdes-pq-skew"</div><div class='add'>+#define XGBE_TX_AMP_PROPERTY		"amd,serdes-tx-amp"</div><div class='add'>+#define XGBE_DFE_CFG_PROPERTY		"amd,serdes-dfe-tap-config"</div><div class='add'>+#define XGBE_DFE_ENA_PROPERTY		"amd,serdes-dfe-tap-enable"</div><div class='add'>+</div><div class='add'>+/* Default SerDes settings */</div><div class='add'>+#define XGBE_SPEED_1000_BLWC		1</div><div class='add'>+#define XGBE_SPEED_1000_CDR		0x2</div><div class='add'>+#define XGBE_SPEED_1000_PLL		0x0</div><div class='add'>+#define XGBE_SPEED_1000_PQ		0xa</div><div class='add'>+#define XGBE_SPEED_1000_RATE		0x3</div><div class='add'>+#define XGBE_SPEED_1000_TXAMP		0xf</div><div class='add'>+#define XGBE_SPEED_1000_WORD		0x1</div><div class='add'>+#define XGBE_SPEED_1000_DFE_TAP_CONFIG	0x3</div><div class='add'>+#define XGBE_SPEED_1000_DFE_TAP_ENABLE	0x0</div><div class='add'>+</div><div class='add'>+#define XGBE_SPEED_2500_BLWC		1</div><div class='add'>+#define XGBE_SPEED_2500_CDR		0x2</div><div class='add'>+#define XGBE_SPEED_2500_PLL		0x0</div><div class='add'>+#define XGBE_SPEED_2500_PQ		0xa</div><div class='add'>+#define XGBE_SPEED_2500_RATE		0x1</div><div class='add'>+#define XGBE_SPEED_2500_TXAMP		0xf</div><div class='add'>+#define XGBE_SPEED_2500_WORD		0x1</div><div class='add'>+#define XGBE_SPEED_2500_DFE_TAP_CONFIG	0x3</div><div class='add'>+#define XGBE_SPEED_2500_DFE_TAP_ENABLE	0x0</div><div class='add'>+</div><div class='add'>+#define XGBE_SPEED_10000_BLWC		0</div><div class='add'>+#define XGBE_SPEED_10000_CDR		0x7</div><div class='add'>+#define XGBE_SPEED_10000_PLL		0x1</div><div class='add'>+#define XGBE_SPEED_10000_PQ		0x12</div><div class='add'>+#define XGBE_SPEED_10000_RATE		0x0</div><div class='add'>+#define XGBE_SPEED_10000_TXAMP		0xa</div><div class='add'>+#define XGBE_SPEED_10000_WORD		0x7</div><div class='add'>+#define XGBE_SPEED_10000_DFE_TAP_CONFIG	0x1</div><div class='add'>+#define XGBE_SPEED_10000_DFE_TAP_ENABLE	0x7f</div><div class='add'>+</div><div class='add'>+/* Rate-change complete wait/retry count */</div><div class='add'>+#define XGBE_RATECHANGE_COUNT		500</div><div class='add'>+</div><div class='add'>+static const u32 xgbe_phy_blwc[] = {</div><div class='add'>+	XGBE_SPEED_1000_BLWC,</div><div class='add'>+	XGBE_SPEED_2500_BLWC,</div><div class='add'>+	XGBE_SPEED_10000_BLWC,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 xgbe_phy_cdr_rate[] = {</div><div class='add'>+	XGBE_SPEED_1000_CDR,</div><div class='add'>+	XGBE_SPEED_2500_CDR,</div><div class='add'>+	XGBE_SPEED_10000_CDR,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 xgbe_phy_pq_skew[] = {</div><div class='add'>+	XGBE_SPEED_1000_PQ,</div><div class='add'>+	XGBE_SPEED_2500_PQ,</div><div class='add'>+	XGBE_SPEED_10000_PQ,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 xgbe_phy_tx_amp[] = {</div><div class='add'>+	XGBE_SPEED_1000_TXAMP,</div><div class='add'>+	XGBE_SPEED_2500_TXAMP,</div><div class='add'>+	XGBE_SPEED_10000_TXAMP,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 xgbe_phy_dfe_tap_cfg[] = {</div><div class='add'>+	XGBE_SPEED_1000_DFE_TAP_CONFIG,</div><div class='add'>+	XGBE_SPEED_2500_DFE_TAP_CONFIG,</div><div class='add'>+	XGBE_SPEED_10000_DFE_TAP_CONFIG,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const u32 xgbe_phy_dfe_tap_ena[] = {</div><div class='add'>+	XGBE_SPEED_1000_DFE_TAP_ENABLE,</div><div class='add'>+	XGBE_SPEED_2500_DFE_TAP_ENABLE,</div><div class='add'>+	XGBE_SPEED_10000_DFE_TAP_ENABLE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct xgbe_phy_data {</div><div class='add'>+	/* 1000/10000 vs 2500/10000 indicator */</div><div class='add'>+	unsigned int speed_set;</div><div class='add'>+</div><div class='add'>+	/* SerDes UEFI configurable settings.</div><div class='add'>+	 *   Switching between modes/speeds requires new values for some</div><div class='add'>+	 *   SerDes settings.  The values can be supplied as device</div><div class='add'>+	 *   properties in array format.  The first array entry is for</div><div class='add'>+	 *   1GbE, second for 2.5GbE and third for 10GbE</div><div class='add'>+	 */</div><div class='add'>+	u32 blwc[XGBE_SPEEDS];</div><div class='add'>+	u32 cdr_rate[XGBE_SPEEDS];</div><div class='add'>+	u32 pq_skew[XGBE_SPEEDS];</div><div class='add'>+	u32 tx_amp[XGBE_SPEEDS];</div><div class='add'>+	u32 dfe_tap_cfg[XGBE_SPEEDS];</div><div class='add'>+	u32 dfe_tap_ena[XGBE_SPEEDS];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_kr_training_pre(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+		XSIR0_IOWRITE_BITS(pdata, SIR0_KR_RT_1, RESET, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_kr_training_post(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+		XSIR0_IOWRITE_BITS(pdata, SIR0_KR_RT_1, RESET, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum xgbe_mode xgbe_phy_an_outcome(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct ethtool_link_ksettings *lks = &amp;pdata-&gt;phy.lks;</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	enum xgbe_mode mode;</div><div class='add'>+	unsigned int ad_reg, lp_reg;</div><div class='add'>+</div><div class='add'>+	XGBE_SET_LP_ADV(lks, Autoneg);</div><div class='add'>+	XGBE_SET_LP_ADV(lks, Backplane);</div><div class='add'>+</div><div class='add'>+	/* Compare Advertisement and Link Partner register 1 */</div><div class='add'>+	ad_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE);</div><div class='add'>+	lp_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_LPA);</div><div class='add'>+	if (lp_reg &amp; 0x400)</div><div class='add'>+		XGBE_SET_LP_ADV(lks, Pause);</div><div class='add'>+	if (lp_reg &amp; 0x800)</div><div class='add'>+		XGBE_SET_LP_ADV(lks, Asym_Pause);</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;phy.pause_autoneg) {</div><div class='add'>+		/* Set flow control based on auto-negotiation result */</div><div class='add'>+		pdata-&gt;phy.tx_pause = 0;</div><div class='add'>+		pdata-&gt;phy.rx_pause = 0;</div><div class='add'>+</div><div class='add'>+		if (ad_reg &amp; lp_reg &amp; 0x400) {</div><div class='add'>+			pdata-&gt;phy.tx_pause = 1;</div><div class='add'>+			pdata-&gt;phy.rx_pause = 1;</div><div class='add'>+		} else if (ad_reg &amp; lp_reg &amp; 0x800) {</div><div class='add'>+			if (ad_reg &amp; 0x400)</div><div class='add'>+				pdata-&gt;phy.rx_pause = 1;</div><div class='add'>+			else if (lp_reg &amp; 0x400)</div><div class='add'>+				pdata-&gt;phy.tx_pause = 1;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Compare Advertisement and Link Partner register 2 */</div><div class='add'>+	ad_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 1);</div><div class='add'>+	lp_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_LPA + 1);</div><div class='add'>+	if (lp_reg &amp; 0x80)</div><div class='add'>+		XGBE_SET_LP_ADV(lks, 10000baseKR_Full);</div><div class='add'>+	if (lp_reg &amp; 0x20) {</div><div class='add'>+		if (phy_data-&gt;speed_set == XGBE_SPEEDSET_2500_10000)</div><div class='add'>+			XGBE_SET_LP_ADV(lks, 2500baseX_Full);</div><div class='add'>+		else</div><div class='add'>+			XGBE_SET_LP_ADV(lks, 1000baseKX_Full);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ad_reg &amp;= lp_reg;</div><div class='add'>+	if (ad_reg &amp; 0x80) {</div><div class='add'>+		mode = XGBE_MODE_KR;</div><div class='add'>+	} else if (ad_reg &amp; 0x20) {</div><div class='add'>+		if (phy_data-&gt;speed_set == XGBE_SPEEDSET_2500_10000)</div><div class='add'>+			mode = XGBE_MODE_KX_2500;</div><div class='add'>+		else</div><div class='add'>+			mode = XGBE_MODE_KX_1000;</div><div class='add'>+	} else {</div><div class='add'>+		mode = XGBE_MODE_UNKNOWN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Compare Advertisement and Link Partner register 3 */</div><div class='add'>+	ad_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 2);</div><div class='add'>+	lp_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_LPA + 2);</div><div class='add'>+	if (lp_reg &amp; 0xc000)</div><div class='add'>+		XGBE_SET_LP_ADV(lks, 10000baseR_FEC);</div><div class='add'>+</div><div class='add'>+	return mode;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_an_advertising(struct xgbe_prv_data *pdata,</div><div class='add'>+				    struct ethtool_link_ksettings *dlks)</div><div class='add'>+{</div><div class='add'>+	struct ethtool_link_ksettings *slks = &amp;pdata-&gt;phy.lks;</div><div class='add'>+</div><div class='add'>+	XGBE_LM_COPY(dlks, advertising, slks, advertising);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_an_config(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	/* Nothing uniquely required for an configuration */</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum xgbe_an_mode xgbe_phy_an_mode(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	return XGBE_AN_MODE_CL73;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_pcs_power_cycle(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	unsigned int reg;</div><div class='add'>+</div><div class='add'>+	reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1);</div><div class='add'>+</div><div class='add'>+	reg |= MDIO_CTRL1_LPOWER;</div><div class='add'>+	XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, reg);</div><div class='add'>+</div><div class='add'>+	usleep_range(75, 100);</div><div class='add'>+</div><div class='add'>+	reg &amp;= ~MDIO_CTRL1_LPOWER;</div><div class='add'>+	XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_start_ratechange(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	/* Assert Rx and Tx ratechange */</div><div class='add'>+	XSIR1_IOWRITE_BITS(pdata, SIR1_SPEED, RATECHANGE, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_complete_ratechange(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	unsigned int wait;</div><div class='add'>+	u16 status;</div><div class='add'>+</div><div class='add'>+	/* Release Rx and Tx ratechange */</div><div class='add'>+	XSIR1_IOWRITE_BITS(pdata, SIR1_SPEED, RATECHANGE, 0);</div><div class='add'>+</div><div class='add'>+	/* Wait for Rx and Tx ready */</div><div class='add'>+	wait = XGBE_RATECHANGE_COUNT;</div><div class='add'>+	while (wait--) {</div><div class='add'>+		usleep_range(50, 75);</div><div class='add'>+</div><div class='add'>+		status = XSIR0_IOREAD(pdata, SIR0_STATUS);</div><div class='add'>+		if (XSIR_GET_BITS(status, SIR0_STATUS, RX_READY) &amp;&amp;</div><div class='add'>+		    XSIR_GET_BITS(status, SIR0_STATUS, TX_READY))</div><div class='add'>+			goto rx_reset;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netif_dbg(pdata, link, pdata-&gt;netdev, "SerDes rx/tx not ready (%#hx)\n",</div><div class='add'>+		  status);</div><div class='add'>+</div><div class='add'>+rx_reset:</div><div class='add'>+	/* Perform Rx reset for the DFE changes */</div><div class='add'>+	XRXTX_IOWRITE_BITS(pdata, RXTX_REG6, RESETB_RXD, 0);</div><div class='add'>+	XRXTX_IOWRITE_BITS(pdata, RXTX_REG6, RESETB_RXD, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_kr_mode(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	unsigned int reg;</div><div class='add'>+</div><div class='add'>+	/* Set PCS to KR/10G speed */</div><div class='add'>+	reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL2);</div><div class='add'>+	reg &amp;= ~MDIO_PCS_CTRL2_TYPE;</div><div class='add'>+	reg |= MDIO_PCS_CTRL2_10GBR;</div><div class='add'>+	XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL2, reg);</div><div class='add'>+</div><div class='add'>+	reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1);</div><div class='add'>+	reg &amp;= ~MDIO_CTRL1_SPEEDSEL;</div><div class='add'>+	reg |= MDIO_CTRL1_SPEED10G;</div><div class='add'>+	XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, reg);</div><div class='add'>+</div><div class='add'>+	xgbe_phy_pcs_power_cycle(pdata);</div><div class='add'>+</div><div class='add'>+	/* Set SerDes to 10G speed */</div><div class='add'>+	xgbe_phy_start_ratechange(pdata);</div><div class='add'>+</div><div class='add'>+	XSIR1_IOWRITE_BITS(pdata, SIR1_SPEED, DATARATE, XGBE_SPEED_10000_RATE);</div><div class='add'>+	XSIR1_IOWRITE_BITS(pdata, SIR1_SPEED, WORDMODE, XGBE_SPEED_10000_WORD);</div><div class='add'>+	XSIR1_IOWRITE_BITS(pdata, SIR1_SPEED, PLLSEL, XGBE_SPEED_10000_PLL);</div><div class='add'>+</div><div class='add'>+	XSIR1_IOWRITE_BITS(pdata, SIR1_SPEED, CDR_RATE,</div><div class='add'>+			   phy_data-&gt;cdr_rate[XGBE_SPEED_10000]);</div><div class='add'>+	XSIR1_IOWRITE_BITS(pdata, SIR1_SPEED, TXAMP,</div><div class='add'>+			   phy_data-&gt;tx_amp[XGBE_SPEED_10000]);</div><div class='add'>+	XRXTX_IOWRITE_BITS(pdata, RXTX_REG20, BLWC_ENA,</div><div class='add'>+			   phy_data-&gt;blwc[XGBE_SPEED_10000]);</div><div class='add'>+	XRXTX_IOWRITE_BITS(pdata, RXTX_REG114, PQ_REG,</div><div class='add'>+			   phy_data-&gt;pq_skew[XGBE_SPEED_10000]);</div><div class='add'>+	XRXTX_IOWRITE_BITS(pdata, RXTX_REG129, RXDFE_CONFIG,</div><div class='add'>+			   phy_data-&gt;dfe_tap_cfg[XGBE_SPEED_10000]);</div><div class='add'>+	XRXTX_IOWRITE(pdata, RXTX_REG22,</div><div class='add'>+		      phy_data-&gt;dfe_tap_ena[XGBE_SPEED_10000]);</div><div class='add'>+</div><div class='add'>+	xgbe_phy_complete_ratechange(pdata);</div><div class='add'>+</div><div class='add'>+	netif_dbg(pdata, link, pdata-&gt;netdev, "10GbE KR mode set\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_kx_2500_mode(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	unsigned int reg;</div><div class='add'>+</div><div class='add'>+	/* Set PCS to KX/1G speed */</div><div class='add'>+	reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL2);</div><div class='add'>+	reg &amp;= ~MDIO_PCS_CTRL2_TYPE;</div><div class='add'>+	reg |= MDIO_PCS_CTRL2_10GBX;</div><div class='add'>+	XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL2, reg);</div><div class='add'>+</div><div class='add'>+	reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1);</div><div class='add'>+	reg &amp;= ~MDIO_CTRL1_SPEEDSEL;</div><div class='add'>+	reg |= MDIO_CTRL1_SPEED1G;</div><div class='add'>+	XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, reg);</div><div class='add'>+</div><div class='add'>+	xgbe_phy_pcs_power_cycle(pdata);</div><div class='add'>+</div><div class='add'>+	/* Set SerDes to 2.5G speed */</div><div class='add'>+	xgbe_phy_start_ratechange(pdata);</div><div class='add'>+</div><div class='add'>+	XSIR1_IOWRITE_BITS(pdata, SIR1_SPEED, DATARATE, XGBE_SPEED_2500_RATE);</div><div class='add'>+	XSIR1_IOWRITE_BITS(pdata, SIR1_SPEED, WORDMODE, XGBE_SPEED_2500_WORD);</div><div class='add'>+	XSIR1_IOWRITE_BITS(pdata, SIR1_SPEED, PLLSEL, XGBE_SPEED_2500_PLL);</div><div class='add'>+</div><div class='add'>+	XSIR1_IOWRITE_BITS(pdata, SIR1_SPEED, CDR_RATE,</div><div class='add'>+			   phy_data-&gt;cdr_rate[XGBE_SPEED_2500]);</div><div class='add'>+	XSIR1_IOWRITE_BITS(pdata, SIR1_SPEED, TXAMP,</div><div class='add'>+			   phy_data-&gt;tx_amp[XGBE_SPEED_2500]);</div><div class='add'>+	XRXTX_IOWRITE_BITS(pdata, RXTX_REG20, BLWC_ENA,</div><div class='add'>+			   phy_data-&gt;blwc[XGBE_SPEED_2500]);</div><div class='add'>+	XRXTX_IOWRITE_BITS(pdata, RXTX_REG114, PQ_REG,</div><div class='add'>+			   phy_data-&gt;pq_skew[XGBE_SPEED_2500]);</div><div class='add'>+	XRXTX_IOWRITE_BITS(pdata, RXTX_REG129, RXDFE_CONFIG,</div><div class='add'>+			   phy_data-&gt;dfe_tap_cfg[XGBE_SPEED_2500]);</div><div class='add'>+	XRXTX_IOWRITE(pdata, RXTX_REG22,</div><div class='add'>+		      phy_data-&gt;dfe_tap_ena[XGBE_SPEED_2500]);</div><div class='add'>+</div><div class='add'>+	xgbe_phy_complete_ratechange(pdata);</div><div class='add'>+</div><div class='add'>+	netif_dbg(pdata, link, pdata-&gt;netdev, "2.5GbE KX mode set\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_kx_1000_mode(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	unsigned int reg;</div><div class='add'>+</div><div class='add'>+	/* Set PCS to KX/1G speed */</div><div class='add'>+	reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL2);</div><div class='add'>+	reg &amp;= ~MDIO_PCS_CTRL2_TYPE;</div><div class='add'>+	reg |= MDIO_PCS_CTRL2_10GBX;</div><div class='add'>+	XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL2, reg);</div><div class='add'>+</div><div class='add'>+	reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1);</div><div class='add'>+	reg &amp;= ~MDIO_CTRL1_SPEEDSEL;</div><div class='add'>+	reg |= MDIO_CTRL1_SPEED1G;</div><div class='add'>+	XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, reg);</div><div class='add'>+</div><div class='add'>+	xgbe_phy_pcs_power_cycle(pdata);</div><div class='add'>+</div><div class='add'>+	/* Set SerDes to 1G speed */</div><div class='add'>+	xgbe_phy_start_ratechange(pdata);</div><div class='add'>+</div><div class='add'>+	XSIR1_IOWRITE_BITS(pdata, SIR1_SPEED, DATARATE, XGBE_SPEED_1000_RATE);</div><div class='add'>+	XSIR1_IOWRITE_BITS(pdata, SIR1_SPEED, WORDMODE, XGBE_SPEED_1000_WORD);</div><div class='add'>+	XSIR1_IOWRITE_BITS(pdata, SIR1_SPEED, PLLSEL, XGBE_SPEED_1000_PLL);</div><div class='add'>+</div><div class='add'>+	XSIR1_IOWRITE_BITS(pdata, SIR1_SPEED, CDR_RATE,</div><div class='add'>+			   phy_data-&gt;cdr_rate[XGBE_SPEED_1000]);</div><div class='add'>+	XSIR1_IOWRITE_BITS(pdata, SIR1_SPEED, TXAMP,</div><div class='add'>+			   phy_data-&gt;tx_amp[XGBE_SPEED_1000]);</div><div class='add'>+	XRXTX_IOWRITE_BITS(pdata, RXTX_REG20, BLWC_ENA,</div><div class='add'>+			   phy_data-&gt;blwc[XGBE_SPEED_1000]);</div><div class='add'>+	XRXTX_IOWRITE_BITS(pdata, RXTX_REG114, PQ_REG,</div><div class='add'>+			   phy_data-&gt;pq_skew[XGBE_SPEED_1000]);</div><div class='add'>+	XRXTX_IOWRITE_BITS(pdata, RXTX_REG129, RXDFE_CONFIG,</div><div class='add'>+			   phy_data-&gt;dfe_tap_cfg[XGBE_SPEED_1000]);</div><div class='add'>+	XRXTX_IOWRITE(pdata, RXTX_REG22,</div><div class='add'>+		      phy_data-&gt;dfe_tap_ena[XGBE_SPEED_1000]);</div><div class='add'>+</div><div class='add'>+	xgbe_phy_complete_ratechange(pdata);</div><div class='add'>+</div><div class='add'>+	netif_dbg(pdata, link, pdata-&gt;netdev, "1GbE KX mode set\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum xgbe_mode xgbe_phy_cur_mode(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	enum xgbe_mode mode;</div><div class='add'>+	unsigned int reg;</div><div class='add'>+</div><div class='add'>+	reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL2);</div><div class='add'>+	reg &amp;= MDIO_PCS_CTRL2_TYPE;</div><div class='add'>+</div><div class='add'>+	if (reg == MDIO_PCS_CTRL2_10GBR) {</div><div class='add'>+		mode = XGBE_MODE_KR;</div><div class='add'>+	} else {</div><div class='add'>+		if (phy_data-&gt;speed_set == XGBE_SPEEDSET_2500_10000)</div><div class='add'>+			mode = XGBE_MODE_KX_2500;</div><div class='add'>+		else</div><div class='add'>+			mode = XGBE_MODE_KX_1000;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return mode;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum xgbe_mode xgbe_phy_switch_mode(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	enum xgbe_mode mode;</div><div class='add'>+</div><div class='add'>+	/* If we are in KR switch to KX, and vice-versa */</div><div class='add'>+	if (xgbe_phy_cur_mode(pdata) == XGBE_MODE_KR) {</div><div class='add'>+		if (phy_data-&gt;speed_set == XGBE_SPEEDSET_2500_10000)</div><div class='add'>+			mode = XGBE_MODE_KX_2500;</div><div class='add'>+		else</div><div class='add'>+			mode = XGBE_MODE_KX_1000;</div><div class='add'>+	} else {</div><div class='add'>+		mode = XGBE_MODE_KR;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return mode;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum xgbe_mode xgbe_phy_get_mode(struct xgbe_prv_data *pdata,</div><div class='add'>+					int speed)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+</div><div class='add'>+	switch (speed) {</div><div class='add'>+	case SPEED_1000:</div><div class='add'>+		return (phy_data-&gt;speed_set == XGBE_SPEEDSET_1000_10000)</div><div class='add'>+			? XGBE_MODE_KX_1000 : XGBE_MODE_UNKNOWN;</div><div class='add'>+	case SPEED_2500:</div><div class='add'>+		return (phy_data-&gt;speed_set == XGBE_SPEEDSET_2500_10000)</div><div class='add'>+			? XGBE_MODE_KX_2500 : XGBE_MODE_UNKNOWN;</div><div class='add'>+	case SPEED_10000:</div><div class='add'>+		return XGBE_MODE_KR;</div><div class='add'>+	default:</div><div class='add'>+		return XGBE_MODE_UNKNOWN;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_set_mode(struct xgbe_prv_data *pdata, enum xgbe_mode mode)</div><div class='add'>+{</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case XGBE_MODE_KX_1000:</div><div class='add'>+		xgbe_phy_kx_1000_mode(pdata);</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_MODE_KX_2500:</div><div class='add'>+		xgbe_phy_kx_2500_mode(pdata);</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_MODE_KR:</div><div class='add'>+		xgbe_phy_kr_mode(pdata);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool xgbe_phy_check_mode(struct xgbe_prv_data *pdata,</div><div class='add'>+				enum xgbe_mode mode, bool advert)</div><div class='add'>+{</div><div class='add'>+	if (pdata-&gt;phy.autoneg == AUTONEG_ENABLE) {</div><div class='add'>+		return advert;</div><div class='add'>+	} else {</div><div class='add'>+		enum xgbe_mode cur_mode;</div><div class='add'>+</div><div class='add'>+		cur_mode = xgbe_phy_get_mode(pdata, pdata-&gt;phy.speed);</div><div class='add'>+		if (cur_mode == mode)</div><div class='add'>+			return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool xgbe_phy_use_mode(struct xgbe_prv_data *pdata, enum xgbe_mode mode)</div><div class='add'>+{</div><div class='add'>+	struct ethtool_link_ksettings *lks = &amp;pdata-&gt;phy.lks;</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case XGBE_MODE_KX_1000:</div><div class='add'>+		return xgbe_phy_check_mode(pdata, mode,</div><div class='add'>+					   XGBE_ADV(lks, 1000baseKX_Full));</div><div class='add'>+	case XGBE_MODE_KX_2500:</div><div class='add'>+		return xgbe_phy_check_mode(pdata, mode,</div><div class='add'>+					   XGBE_ADV(lks, 2500baseX_Full));</div><div class='add'>+	case XGBE_MODE_KR:</div><div class='add'>+		return xgbe_phy_check_mode(pdata, mode,</div><div class='add'>+					   XGBE_ADV(lks, 10000baseKR_Full));</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool xgbe_phy_valid_speed(struct xgbe_prv_data *pdata, int speed)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+</div><div class='add'>+	switch (speed) {</div><div class='add'>+	case SPEED_1000:</div><div class='add'>+		if (phy_data-&gt;speed_set != XGBE_SPEEDSET_1000_10000)</div><div class='add'>+			return false;</div><div class='add'>+		return true;</div><div class='add'>+	case SPEED_2500:</div><div class='add'>+		if (phy_data-&gt;speed_set != XGBE_SPEEDSET_2500_10000)</div><div class='add'>+			return false;</div><div class='add'>+		return true;</div><div class='add'>+	case SPEED_10000:</div><div class='add'>+		return true;</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_link_status(struct xgbe_prv_data *pdata, int *an_restart)</div><div class='add'>+{</div><div class='add'>+	unsigned int reg;</div><div class='add'>+</div><div class='add'>+	*an_restart = 0;</div><div class='add'>+</div><div class='add'>+	/* Link status is latched low, so read once to clear</div><div class='add'>+	 * and then read again to get current state</div><div class='add'>+	 */</div><div class='add'>+	reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1);</div><div class='add'>+	reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1);</div><div class='add'>+</div><div class='add'>+	return (reg &amp; MDIO_STAT1_LSTATUS) ? 1 : 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_stop(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	/* Nothing uniquely required for stop */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_start(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	/* Nothing uniquely required for start */</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_reset(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	unsigned int reg, count;</div><div class='add'>+</div><div class='add'>+	/* Perform a software reset of the PCS */</div><div class='add'>+	reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1);</div><div class='add'>+	reg |= MDIO_CTRL1_RESET;</div><div class='add'>+	XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, reg);</div><div class='add'>+</div><div class='add'>+	count = 50;</div><div class='add'>+	do {</div><div class='add'>+		msleep(20);</div><div class='add'>+		reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1);</div><div class='add'>+	} while ((reg &amp; MDIO_CTRL1_RESET) &amp;&amp; --count);</div><div class='add'>+</div><div class='add'>+	if (reg &amp; MDIO_CTRL1_RESET)</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_exit(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	/* Nothing uniquely required for exit */</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_init(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct ethtool_link_ksettings *lks = &amp;pdata-&gt;phy.lks;</div><div class='add'>+	struct xgbe_phy_data *phy_data;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	phy_data = devm_kzalloc(pdata-&gt;dev, sizeof(*phy_data), GFP_KERNEL);</div><div class='add'>+	if (!phy_data)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	/* Retrieve the PHY speedset */</div><div class='add'>+	ret = device_property_read_u32(pdata-&gt;phy_dev, XGBE_SPEEDSET_PROPERTY,</div><div class='add'>+				       &amp;phy_data-&gt;speed_set);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(pdata-&gt;dev, "invalid %s property\n",</div><div class='add'>+			XGBE_SPEEDSET_PROPERTY);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (phy_data-&gt;speed_set) {</div><div class='add'>+	case XGBE_SPEEDSET_1000_10000:</div><div class='add'>+	case XGBE_SPEEDSET_2500_10000:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(pdata-&gt;dev, "invalid %s property\n",</div><div class='add'>+			XGBE_SPEEDSET_PROPERTY);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Retrieve the PHY configuration properties */</div><div class='add'>+	if (device_property_present(pdata-&gt;phy_dev, XGBE_BLWC_PROPERTY)) {</div><div class='add'>+		ret = device_property_read_u32_array(pdata-&gt;phy_dev,</div><div class='add'>+						     XGBE_BLWC_PROPERTY,</div><div class='add'>+						     phy_data-&gt;blwc,</div><div class='add'>+						     XGBE_SPEEDS);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(pdata-&gt;dev, "invalid %s property\n",</div><div class='add'>+				XGBE_BLWC_PROPERTY);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		memcpy(phy_data-&gt;blwc, xgbe_phy_blwc,</div><div class='add'>+		       sizeof(phy_data-&gt;blwc));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (device_property_present(pdata-&gt;phy_dev, XGBE_CDR_RATE_PROPERTY)) {</div><div class='add'>+		ret = device_property_read_u32_array(pdata-&gt;phy_dev,</div><div class='add'>+						     XGBE_CDR_RATE_PROPERTY,</div><div class='add'>+						     phy_data-&gt;cdr_rate,</div><div class='add'>+						     XGBE_SPEEDS);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(pdata-&gt;dev, "invalid %s property\n",</div><div class='add'>+				XGBE_CDR_RATE_PROPERTY);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		memcpy(phy_data-&gt;cdr_rate, xgbe_phy_cdr_rate,</div><div class='add'>+		       sizeof(phy_data-&gt;cdr_rate));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (device_property_present(pdata-&gt;phy_dev, XGBE_PQ_SKEW_PROPERTY)) {</div><div class='add'>+		ret = device_property_read_u32_array(pdata-&gt;phy_dev,</div><div class='add'>+						     XGBE_PQ_SKEW_PROPERTY,</div><div class='add'>+						     phy_data-&gt;pq_skew,</div><div class='add'>+						     XGBE_SPEEDS);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(pdata-&gt;dev, "invalid %s property\n",</div><div class='add'>+				XGBE_PQ_SKEW_PROPERTY);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		memcpy(phy_data-&gt;pq_skew, xgbe_phy_pq_skew,</div><div class='add'>+		       sizeof(phy_data-&gt;pq_skew));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (device_property_present(pdata-&gt;phy_dev, XGBE_TX_AMP_PROPERTY)) {</div><div class='add'>+		ret = device_property_read_u32_array(pdata-&gt;phy_dev,</div><div class='add'>+						     XGBE_TX_AMP_PROPERTY,</div><div class='add'>+						     phy_data-&gt;tx_amp,</div><div class='add'>+						     XGBE_SPEEDS);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(pdata-&gt;dev, "invalid %s property\n",</div><div class='add'>+				XGBE_TX_AMP_PROPERTY);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		memcpy(phy_data-&gt;tx_amp, xgbe_phy_tx_amp,</div><div class='add'>+		       sizeof(phy_data-&gt;tx_amp));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (device_property_present(pdata-&gt;phy_dev, XGBE_DFE_CFG_PROPERTY)) {</div><div class='add'>+		ret = device_property_read_u32_array(pdata-&gt;phy_dev,</div><div class='add'>+						     XGBE_DFE_CFG_PROPERTY,</div><div class='add'>+						     phy_data-&gt;dfe_tap_cfg,</div><div class='add'>+						     XGBE_SPEEDS);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(pdata-&gt;dev, "invalid %s property\n",</div><div class='add'>+				XGBE_DFE_CFG_PROPERTY);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		memcpy(phy_data-&gt;dfe_tap_cfg, xgbe_phy_dfe_tap_cfg,</div><div class='add'>+		       sizeof(phy_data-&gt;dfe_tap_cfg));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (device_property_present(pdata-&gt;phy_dev, XGBE_DFE_ENA_PROPERTY)) {</div><div class='add'>+		ret = device_property_read_u32_array(pdata-&gt;phy_dev,</div><div class='add'>+						     XGBE_DFE_ENA_PROPERTY,</div><div class='add'>+						     phy_data-&gt;dfe_tap_ena,</div><div class='add'>+						     XGBE_SPEEDS);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(pdata-&gt;dev, "invalid %s property\n",</div><div class='add'>+				XGBE_DFE_ENA_PROPERTY);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		memcpy(phy_data-&gt;dfe_tap_ena, xgbe_phy_dfe_tap_ena,</div><div class='add'>+		       sizeof(phy_data-&gt;dfe_tap_ena));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Initialize supported features */</div><div class='add'>+	XGBE_ZERO_SUP(lks);</div><div class='add'>+	XGBE_SET_SUP(lks, Autoneg);</div><div class='add'>+	XGBE_SET_SUP(lks, Pause);</div><div class='add'>+	XGBE_SET_SUP(lks, Asym_Pause);</div><div class='add'>+	XGBE_SET_SUP(lks, Backplane);</div><div class='add'>+	XGBE_SET_SUP(lks, 10000baseKR_Full);</div><div class='add'>+	switch (phy_data-&gt;speed_set) {</div><div class='add'>+	case XGBE_SPEEDSET_1000_10000:</div><div class='add'>+		XGBE_SET_SUP(lks, 1000baseKX_Full);</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_SPEEDSET_2500_10000:</div><div class='add'>+		XGBE_SET_SUP(lks, 2500baseX_Full);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;fec_ability &amp; MDIO_PMA_10GBR_FECABLE_ABLE)</div><div class='add'>+		XGBE_SET_SUP(lks, 10000baseR_FEC);</div><div class='add'>+</div><div class='add'>+	pdata-&gt;phy_data = phy_data;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void xgbe_init_function_ptrs_phy_v1(struct xgbe_phy_if *phy_if)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_impl_if *phy_impl = &amp;phy_if-&gt;phy_impl;</div><div class='add'>+</div><div class='add'>+	phy_impl-&gt;init			= xgbe_phy_init;</div><div class='add'>+	phy_impl-&gt;exit			= xgbe_phy_exit;</div><div class='add'>+</div><div class='add'>+	phy_impl-&gt;reset			= xgbe_phy_reset;</div><div class='add'>+	phy_impl-&gt;start			= xgbe_phy_start;</div><div class='add'>+	phy_impl-&gt;stop			= xgbe_phy_stop;</div><div class='add'>+</div><div class='add'>+	phy_impl-&gt;link_status		= xgbe_phy_link_status;</div><div class='add'>+</div><div class='add'>+	phy_impl-&gt;valid_speed		= xgbe_phy_valid_speed;</div><div class='add'>+</div><div class='add'>+	phy_impl-&gt;use_mode		= xgbe_phy_use_mode;</div><div class='add'>+	phy_impl-&gt;set_mode		= xgbe_phy_set_mode;</div><div class='add'>+	phy_impl-&gt;get_mode		= xgbe_phy_get_mode;</div><div class='add'>+	phy_impl-&gt;switch_mode		= xgbe_phy_switch_mode;</div><div class='add'>+	phy_impl-&gt;cur_mode		= xgbe_phy_cur_mode;</div><div class='add'>+</div><div class='add'>+	phy_impl-&gt;an_mode		= xgbe_phy_an_mode;</div><div class='add'>+</div><div class='add'>+	phy_impl-&gt;an_config		= xgbe_phy_an_config;</div><div class='add'>+</div><div class='add'>+	phy_impl-&gt;an_advertising	= xgbe_phy_an_advertising;</div><div class='add'>+</div><div class='add'>+	phy_impl-&gt;an_outcome		= xgbe_phy_an_outcome;</div><div class='add'>+</div><div class='add'>+	phy_impl-&gt;kr_training_pre	= xgbe_phy_kr_training_pre;</div><div class='add'>+	phy_impl-&gt;kr_training_post	= xgbe_phy_kr_training_post;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c<br/>new file mode 100644<br/>index 000000000000..a68757e8fd22<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c</a></div><div class='hunk'>@@ -0,0 +1,3679 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/kmod.h&gt;</div><div class='add'>+#include &lt;linux/mdio.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+</div><div class='add'>+#include "xgbe.h"</div><div class='add'>+#include "xgbe-common.h"</div><div class='add'>+</div><div class='add'>+#define XGBE_PHY_PORT_SPEED_10		BIT(0)</div><div class='add'>+#define XGBE_PHY_PORT_SPEED_100		BIT(1)</div><div class='add'>+#define XGBE_PHY_PORT_SPEED_1000	BIT(2)</div><div class='add'>+#define XGBE_PHY_PORT_SPEED_2500	BIT(3)</div><div class='add'>+#define XGBE_PHY_PORT_SPEED_10000	BIT(4)</div><div class='add'>+</div><div class='add'>+#define XGBE_MUTEX_RELEASE		0x80000000</div><div class='add'>+</div><div class='add'>+#define XGBE_SFP_DIRECT			7</div><div class='add'>+</div><div class='add'>+/* I2C target addresses */</div><div class='add'>+#define XGBE_SFP_SERIAL_ID_ADDRESS	0x50</div><div class='add'>+#define XGBE_SFP_DIAG_INFO_ADDRESS	0x51</div><div class='add'>+#define XGBE_SFP_PHY_ADDRESS		0x56</div><div class='add'>+#define XGBE_GPIO_ADDRESS_PCA9555	0x20</div><div class='add'>+</div><div class='add'>+/* SFP sideband signal indicators */</div><div class='add'>+#define XGBE_GPIO_NO_TX_FAULT		BIT(0)</div><div class='add'>+#define XGBE_GPIO_NO_RATE_SELECT	BIT(1)</div><div class='add'>+#define XGBE_GPIO_NO_MOD_ABSENT		BIT(2)</div><div class='add'>+#define XGBE_GPIO_NO_RX_LOS		BIT(3)</div><div class='add'>+</div><div class='add'>+/* Rate-change complete wait/retry count */</div><div class='add'>+#define XGBE_RATECHANGE_COUNT		500</div><div class='add'>+</div><div class='add'>+/* CDR delay values for KR support (in usec) */</div><div class='add'>+#define XGBE_CDR_DELAY_INIT		10000</div><div class='add'>+#define XGBE_CDR_DELAY_INC		10000</div><div class='add'>+#define XGBE_CDR_DELAY_MAX		100000</div><div class='add'>+</div><div class='add'>+/* RRC frequency during link status check */</div><div class='add'>+#define XGBE_RRC_FREQUENCY		10</div><div class='add'>+</div><div class='add'>+enum xgbe_port_mode {</div><div class='add'>+	XGBE_PORT_MODE_RSVD = 0,</div><div class='add'>+	XGBE_PORT_MODE_BACKPLANE,</div><div class='add'>+	XGBE_PORT_MODE_BACKPLANE_2500,</div><div class='add'>+	XGBE_PORT_MODE_1000BASE_T,</div><div class='add'>+	XGBE_PORT_MODE_1000BASE_X,</div><div class='add'>+	XGBE_PORT_MODE_NBASE_T,</div><div class='add'>+	XGBE_PORT_MODE_10GBASE_T,</div><div class='add'>+	XGBE_PORT_MODE_10GBASE_R,</div><div class='add'>+	XGBE_PORT_MODE_SFP,</div><div class='add'>+	XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG,</div><div class='add'>+	XGBE_PORT_MODE_MAX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum xgbe_conn_type {</div><div class='add'>+	XGBE_CONN_TYPE_NONE = 0,</div><div class='add'>+	XGBE_CONN_TYPE_SFP,</div><div class='add'>+	XGBE_CONN_TYPE_MDIO,</div><div class='add'>+	XGBE_CONN_TYPE_RSVD1,</div><div class='add'>+	XGBE_CONN_TYPE_BACKPLANE,</div><div class='add'>+	XGBE_CONN_TYPE_MAX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SFP/SFP+ related definitions */</div><div class='add'>+enum xgbe_sfp_comm {</div><div class='add'>+	XGBE_SFP_COMM_DIRECT = 0,</div><div class='add'>+	XGBE_SFP_COMM_PCA9545,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum xgbe_sfp_cable {</div><div class='add'>+	XGBE_SFP_CABLE_UNKNOWN = 0,</div><div class='add'>+	XGBE_SFP_CABLE_ACTIVE,</div><div class='add'>+	XGBE_SFP_CABLE_PASSIVE,</div><div class='add'>+	XGBE_SFP_CABLE_FIBER,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum xgbe_sfp_base {</div><div class='add'>+	XGBE_SFP_BASE_UNKNOWN = 0,</div><div class='add'>+	XGBE_SFP_BASE_1000_T,</div><div class='add'>+	XGBE_SFP_BASE_1000_SX,</div><div class='add'>+	XGBE_SFP_BASE_1000_LX,</div><div class='add'>+	XGBE_SFP_BASE_1000_CX,</div><div class='add'>+	XGBE_SFP_BASE_10000_SR,</div><div class='add'>+	XGBE_SFP_BASE_10000_LR,</div><div class='add'>+	XGBE_SFP_BASE_10000_LRM,</div><div class='add'>+	XGBE_SFP_BASE_10000_ER,</div><div class='add'>+	XGBE_SFP_BASE_10000_CR,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum xgbe_sfp_speed {</div><div class='add'>+	XGBE_SFP_SPEED_UNKNOWN = 0,</div><div class='add'>+	XGBE_SFP_SPEED_100_1000,</div><div class='add'>+	XGBE_SFP_SPEED_1000,</div><div class='add'>+	XGBE_SFP_SPEED_10000,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* SFP Serial ID Base ID values relative to an offset of 0 */</div><div class='add'>+#define XGBE_SFP_BASE_ID			0</div><div class='add'>+#define XGBE_SFP_ID_SFP				0x03</div><div class='add'>+</div><div class='add'>+#define XGBE_SFP_BASE_EXT_ID			1</div><div class='add'>+#define XGBE_SFP_EXT_ID_SFP			0x04</div><div class='add'>+</div><div class='add'>+#define XGBE_SFP_BASE_10GBE_CC			3</div><div class='add'>+#define XGBE_SFP_BASE_10GBE_CC_SR		BIT(4)</div><div class='add'>+#define XGBE_SFP_BASE_10GBE_CC_LR		BIT(5)</div><div class='add'>+#define XGBE_SFP_BASE_10GBE_CC_LRM		BIT(6)</div><div class='add'>+#define XGBE_SFP_BASE_10GBE_CC_ER		BIT(7)</div><div class='add'>+</div><div class='add'>+#define XGBE_SFP_BASE_1GBE_CC			6</div><div class='add'>+#define XGBE_SFP_BASE_1GBE_CC_SX		BIT(0)</div><div class='add'>+#define XGBE_SFP_BASE_1GBE_CC_LX		BIT(1)</div><div class='add'>+#define XGBE_SFP_BASE_1GBE_CC_CX		BIT(2)</div><div class='add'>+#define XGBE_SFP_BASE_1GBE_CC_T			BIT(3)</div><div class='add'>+</div><div class='add'>+#define XGBE_SFP_BASE_CABLE			8</div><div class='add'>+#define XGBE_SFP_BASE_CABLE_PASSIVE		BIT(2)</div><div class='add'>+#define XGBE_SFP_BASE_CABLE_ACTIVE		BIT(3)</div><div class='add'>+</div><div class='add'>+#define XGBE_SFP_BASE_BR			12</div><div class='add'>+#define XGBE_SFP_BASE_BR_1GBE_MIN		0x0a</div><div class='add'>+#define XGBE_SFP_BASE_BR_10GBE_MIN		0x64</div><div class='add'>+</div><div class='add'>+#define XGBE_SFP_BASE_CU_CABLE_LEN		18</div><div class='add'>+</div><div class='add'>+#define XGBE_SFP_BASE_VENDOR_NAME		20</div><div class='add'>+#define XGBE_SFP_BASE_VENDOR_NAME_LEN		16</div><div class='add'>+#define XGBE_SFP_BASE_VENDOR_PN			40</div><div class='add'>+#define XGBE_SFP_BASE_VENDOR_PN_LEN		16</div><div class='add'>+#define XGBE_SFP_BASE_VENDOR_REV		56</div><div class='add'>+#define XGBE_SFP_BASE_VENDOR_REV_LEN		4</div><div class='add'>+</div><div class='add'>+#define XGBE_SFP_BASE_CC			63</div><div class='add'>+</div><div class='add'>+/* SFP Serial ID Extended ID values relative to an offset of 64 */</div><div class='add'>+#define XGBE_SFP_BASE_VENDOR_SN			4</div><div class='add'>+#define XGBE_SFP_BASE_VENDOR_SN_LEN		16</div><div class='add'>+</div><div class='add'>+#define XGBE_SFP_EXTD_OPT1			1</div><div class='add'>+#define XGBE_SFP_EXTD_OPT1_RX_LOS		BIT(1)</div><div class='add'>+#define XGBE_SFP_EXTD_OPT1_TX_FAULT		BIT(3)</div><div class='add'>+</div><div class='add'>+#define XGBE_SFP_EXTD_DIAG			28</div><div class='add'>+#define XGBE_SFP_EXTD_DIAG_ADDR_CHANGE		BIT(2)</div><div class='add'>+</div><div class='add'>+#define XGBE_SFP_EXTD_SFF_8472			30</div><div class='add'>+</div><div class='add'>+#define XGBE_SFP_EXTD_CC			31</div><div class='add'>+</div><div class='add'>+struct xgbe_sfp_eeprom {</div><div class='add'>+	u8 base[64];</div><div class='add'>+	u8 extd[32];</div><div class='add'>+	u8 vendor[32];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define XGBE_SFP_DIAGS_SUPPORTED(_x)			\</div><div class='add'>+	((_x)-&gt;extd[XGBE_SFP_EXTD_SFF_8472] &amp;&amp;		\</div><div class='add'>+	 !((_x)-&gt;extd[XGBE_SFP_EXTD_DIAG] &amp; XGBE_SFP_EXTD_DIAG_ADDR_CHANGE))</div><div class='add'>+</div><div class='add'>+#define XGBE_SFP_EEPROM_BASE_LEN	256</div><div class='add'>+#define XGBE_SFP_EEPROM_DIAG_LEN	256</div><div class='add'>+#define XGBE_SFP_EEPROM_MAX		(XGBE_SFP_EEPROM_BASE_LEN +	\</div><div class='add'>+					 XGBE_SFP_EEPROM_DIAG_LEN)</div><div class='add'>+</div><div class='add'>+#define XGBE_BEL_FUSE_VENDOR	"BEL-FUSE        "</div><div class='add'>+#define XGBE_BEL_FUSE_PARTNO	"1GBT-SFP06      "</div><div class='add'>+</div><div class='add'>+#define XGBE_MOLEX_VENDOR	"Molex Inc.      "</div><div class='add'>+</div><div class='add'>+struct xgbe_sfp_ascii {</div><div class='add'>+	union {</div><div class='add'>+		char vendor[XGBE_SFP_BASE_VENDOR_NAME_LEN + 1];</div><div class='add'>+		char partno[XGBE_SFP_BASE_VENDOR_PN_LEN + 1];</div><div class='add'>+		char rev[XGBE_SFP_BASE_VENDOR_REV_LEN + 1];</div><div class='add'>+		char serno[XGBE_SFP_BASE_VENDOR_SN_LEN + 1];</div><div class='add'>+	} u;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* MDIO PHY reset types */</div><div class='add'>+enum xgbe_mdio_reset {</div><div class='add'>+	XGBE_MDIO_RESET_NONE = 0,</div><div class='add'>+	XGBE_MDIO_RESET_I2C_GPIO,</div><div class='add'>+	XGBE_MDIO_RESET_INT_GPIO,</div><div class='add'>+	XGBE_MDIO_RESET_MAX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Re-driver related definitions */</div><div class='add'>+enum xgbe_phy_redrv_if {</div><div class='add'>+	XGBE_PHY_REDRV_IF_MDIO = 0,</div><div class='add'>+	XGBE_PHY_REDRV_IF_I2C,</div><div class='add'>+	XGBE_PHY_REDRV_IF_MAX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum xgbe_phy_redrv_model {</div><div class='add'>+	XGBE_PHY_REDRV_MODEL_4223 = 0,</div><div class='add'>+	XGBE_PHY_REDRV_MODEL_4227,</div><div class='add'>+	XGBE_PHY_REDRV_MODEL_MAX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum xgbe_phy_redrv_mode {</div><div class='add'>+	XGBE_PHY_REDRV_MODE_CX = 5,</div><div class='add'>+	XGBE_PHY_REDRV_MODE_SR = 9,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define XGBE_PHY_REDRV_MODE_REG	0x12b0</div><div class='add'>+</div><div class='add'>+/* PHY related configuration information */</div><div class='add'>+struct xgbe_phy_data {</div><div class='add'>+	enum xgbe_port_mode port_mode;</div><div class='add'>+</div><div class='add'>+	unsigned int port_id;</div><div class='add'>+</div><div class='add'>+	unsigned int port_speeds;</div><div class='add'>+</div><div class='add'>+	enum xgbe_conn_type conn_type;</div><div class='add'>+</div><div class='add'>+	enum xgbe_mode cur_mode;</div><div class='add'>+	enum xgbe_mode start_mode;</div><div class='add'>+</div><div class='add'>+	unsigned int rrc_count;</div><div class='add'>+</div><div class='add'>+	unsigned int mdio_addr;</div><div class='add'>+</div><div class='add'>+	/* SFP Support */</div><div class='add'>+	enum xgbe_sfp_comm sfp_comm;</div><div class='add'>+	unsigned int sfp_mux_address;</div><div class='add'>+	unsigned int sfp_mux_channel;</div><div class='add'>+</div><div class='add'>+	unsigned int sfp_gpio_address;</div><div class='add'>+	unsigned int sfp_gpio_mask;</div><div class='add'>+	unsigned int sfp_gpio_inputs;</div><div class='add'>+	unsigned int sfp_gpio_rx_los;</div><div class='add'>+	unsigned int sfp_gpio_tx_fault;</div><div class='add'>+	unsigned int sfp_gpio_mod_absent;</div><div class='add'>+	unsigned int sfp_gpio_rate_select;</div><div class='add'>+</div><div class='add'>+	unsigned int sfp_rx_los;</div><div class='add'>+	unsigned int sfp_tx_fault;</div><div class='add'>+	unsigned int sfp_mod_absent;</div><div class='add'>+	unsigned int sfp_changed;</div><div class='add'>+	unsigned int sfp_phy_avail;</div><div class='add'>+	unsigned int sfp_cable_len;</div><div class='add'>+	enum xgbe_sfp_base sfp_base;</div><div class='add'>+	enum xgbe_sfp_cable sfp_cable;</div><div class='add'>+	enum xgbe_sfp_speed sfp_speed;</div><div class='add'>+	struct xgbe_sfp_eeprom sfp_eeprom;</div><div class='add'>+</div><div class='add'>+	/* External PHY support */</div><div class='add'>+	enum xgbe_mdio_mode phydev_mode;</div><div class='add'>+	struct mii_bus *mii;</div><div class='add'>+	struct phy_device *phydev;</div><div class='add'>+	enum xgbe_mdio_reset mdio_reset;</div><div class='add'>+	unsigned int mdio_reset_addr;</div><div class='add'>+	unsigned int mdio_reset_gpio;</div><div class='add'>+</div><div class='add'>+	/* Re-driver support */</div><div class='add'>+	unsigned int redrv;</div><div class='add'>+	unsigned int redrv_if;</div><div class='add'>+	unsigned int redrv_addr;</div><div class='add'>+	unsigned int redrv_lane;</div><div class='add'>+	unsigned int redrv_model;</div><div class='add'>+</div><div class='add'>+	/* KR AN support */</div><div class='add'>+	unsigned int phy_cdr_notrack;</div><div class='add'>+	unsigned int phy_cdr_delay;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* I2C, MDIO and GPIO lines are muxed, so only one device at a time */</div><div class='add'>+static DEFINE_MUTEX(xgbe_phy_comm_lock);</div><div class='add'>+</div><div class='add'>+static enum xgbe_an_mode xgbe_phy_an_mode(struct xgbe_prv_data *pdata);</div><div class='add'>+static void xgbe_phy_rrc(struct xgbe_prv_data *pdata);</div><div class='add'>+static void xgbe_phy_perform_ratechange(struct xgbe_prv_data *pdata,</div><div class='add'>+					enum xgbe_mb_cmd cmd,</div><div class='add'>+					enum xgbe_mb_subcmd sub_cmd);</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_i2c_xfer(struct xgbe_prv_data *pdata,</div><div class='add'>+			     struct xgbe_i2c_op *i2c_op)</div><div class='add'>+{</div><div class='add'>+	return pdata-&gt;i2c_if.i2c_xfer(pdata, i2c_op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_redrv_write(struct xgbe_prv_data *pdata, unsigned int reg,</div><div class='add'>+				unsigned int val)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	struct xgbe_i2c_op i2c_op;</div><div class='add'>+	__be16 *redrv_val;</div><div class='add'>+	u8 redrv_data[5], csum;</div><div class='add'>+	unsigned int i, retry;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* High byte of register contains read/write indicator */</div><div class='add'>+	redrv_data[0] = ((reg &gt;&gt; 8) &amp; 0xff) &lt;&lt; 1;</div><div class='add'>+	redrv_data[1] = reg &amp; 0xff;</div><div class='add'>+	redrv_val = (__be16 *)&amp;redrv_data[2];</div><div class='add'>+	*redrv_val = cpu_to_be16(val);</div><div class='add'>+</div><div class='add'>+	/* Calculate 1 byte checksum */</div><div class='add'>+	csum = 0;</div><div class='add'>+	for (i = 0; i &lt; 4; i++) {</div><div class='add'>+		csum += redrv_data[i];</div><div class='add'>+		if (redrv_data[i] &gt; csum)</div><div class='add'>+			csum++;</div><div class='add'>+	}</div><div class='add'>+	redrv_data[4] = ~csum;</div><div class='add'>+</div><div class='add'>+	retry = 1;</div><div class='add'>+again1:</div><div class='add'>+	i2c_op.cmd = XGBE_I2C_CMD_WRITE;</div><div class='add'>+	i2c_op.target = phy_data-&gt;redrv_addr;</div><div class='add'>+	i2c_op.len = sizeof(redrv_data);</div><div class='add'>+	i2c_op.buf = redrv_data;</div><div class='add'>+	ret = xgbe_phy_i2c_xfer(pdata, &amp;i2c_op);</div><div class='add'>+	if (ret) {</div><div class='add'>+		if ((ret == -EAGAIN) &amp;&amp; retry--)</div><div class='add'>+			goto again1;</div><div class='add'>+</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	retry = 1;</div><div class='add'>+again2:</div><div class='add'>+	i2c_op.cmd = XGBE_I2C_CMD_READ;</div><div class='add'>+	i2c_op.target = phy_data-&gt;redrv_addr;</div><div class='add'>+	i2c_op.len = 1;</div><div class='add'>+	i2c_op.buf = redrv_data;</div><div class='add'>+	ret = xgbe_phy_i2c_xfer(pdata, &amp;i2c_op);</div><div class='add'>+	if (ret) {</div><div class='add'>+		if ((ret == -EAGAIN) &amp;&amp; retry--)</div><div class='add'>+			goto again2;</div><div class='add'>+</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (redrv_data[0] != 0xff) {</div><div class='add'>+		netif_dbg(pdata, drv, pdata-&gt;netdev,</div><div class='add'>+			  "Redriver write checksum error\n");</div><div class='add'>+		ret = -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_i2c_write(struct xgbe_prv_data *pdata, unsigned int target,</div><div class='add'>+			      void *val, unsigned int val_len)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_i2c_op i2c_op;</div><div class='add'>+	int retry, ret;</div><div class='add'>+</div><div class='add'>+	retry = 1;</div><div class='add'>+again:</div><div class='add'>+	/* Write the specfied register */</div><div class='add'>+	i2c_op.cmd = XGBE_I2C_CMD_WRITE;</div><div class='add'>+	i2c_op.target = target;</div><div class='add'>+	i2c_op.len = val_len;</div><div class='add'>+	i2c_op.buf = val;</div><div class='add'>+	ret = xgbe_phy_i2c_xfer(pdata, &amp;i2c_op);</div><div class='add'>+	if ((ret == -EAGAIN) &amp;&amp; retry--)</div><div class='add'>+		goto again;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_i2c_read(struct xgbe_prv_data *pdata, unsigned int target,</div><div class='add'>+			     void *reg, unsigned int reg_len,</div><div class='add'>+			     void *val, unsigned int val_len)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_i2c_op i2c_op;</div><div class='add'>+	int retry, ret;</div><div class='add'>+</div><div class='add'>+	retry = 1;</div><div class='add'>+again1:</div><div class='add'>+	/* Set the specified register to read */</div><div class='add'>+	i2c_op.cmd = XGBE_I2C_CMD_WRITE;</div><div class='add'>+	i2c_op.target = target;</div><div class='add'>+	i2c_op.len = reg_len;</div><div class='add'>+	i2c_op.buf = reg;</div><div class='add'>+	ret = xgbe_phy_i2c_xfer(pdata, &amp;i2c_op);</div><div class='add'>+	if (ret) {</div><div class='add'>+		if ((ret == -EAGAIN) &amp;&amp; retry--)</div><div class='add'>+			goto again1;</div><div class='add'>+</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	retry = 1;</div><div class='add'>+again2:</div><div class='add'>+	/* Read the specfied register */</div><div class='add'>+	i2c_op.cmd = XGBE_I2C_CMD_READ;</div><div class='add'>+	i2c_op.target = target;</div><div class='add'>+	i2c_op.len = val_len;</div><div class='add'>+	i2c_op.buf = val;</div><div class='add'>+	ret = xgbe_phy_i2c_xfer(pdata, &amp;i2c_op);</div><div class='add'>+	if ((ret == -EAGAIN) &amp;&amp; retry--)</div><div class='add'>+		goto again2;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_sfp_put_mux(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	struct xgbe_i2c_op i2c_op;</div><div class='add'>+	u8 mux_channel;</div><div class='add'>+</div><div class='add'>+	if (phy_data-&gt;sfp_comm == XGBE_SFP_COMM_DIRECT)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Select no mux channels */</div><div class='add'>+	mux_channel = 0;</div><div class='add'>+	i2c_op.cmd = XGBE_I2C_CMD_WRITE;</div><div class='add'>+	i2c_op.target = phy_data-&gt;sfp_mux_address;</div><div class='add'>+	i2c_op.len = sizeof(mux_channel);</div><div class='add'>+	i2c_op.buf = &amp;mux_channel;</div><div class='add'>+</div><div class='add'>+	return xgbe_phy_i2c_xfer(pdata, &amp;i2c_op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_sfp_get_mux(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	struct xgbe_i2c_op i2c_op;</div><div class='add'>+	u8 mux_channel;</div><div class='add'>+</div><div class='add'>+	if (phy_data-&gt;sfp_comm == XGBE_SFP_COMM_DIRECT)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Select desired mux channel */</div><div class='add'>+	mux_channel = 1 &lt;&lt; phy_data-&gt;sfp_mux_channel;</div><div class='add'>+	i2c_op.cmd = XGBE_I2C_CMD_WRITE;</div><div class='add'>+	i2c_op.target = phy_data-&gt;sfp_mux_address;</div><div class='add'>+	i2c_op.len = sizeof(mux_channel);</div><div class='add'>+	i2c_op.buf = &amp;mux_channel;</div><div class='add'>+</div><div class='add'>+	return xgbe_phy_i2c_xfer(pdata, &amp;i2c_op);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_put_comm_ownership(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	mutex_unlock(&amp;xgbe_phy_comm_lock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_get_comm_ownership(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	unsigned long timeout;</div><div class='add'>+	unsigned int mutex_id;</div><div class='add'>+</div><div class='add'>+	/* The I2C and MDIO/GPIO bus is multiplexed between multiple devices,</div><div class='add'>+	 * the driver needs to take the software mutex and then the hardware</div><div class='add'>+	 * mutexes before being able to use the busses.</div><div class='add'>+	 */</div><div class='add'>+	mutex_lock(&amp;xgbe_phy_comm_lock);</div><div class='add'>+</div><div class='add'>+	/* Clear the mutexes */</div><div class='add'>+	XP_IOWRITE(pdata, XP_I2C_MUTEX, XGBE_MUTEX_RELEASE);</div><div class='add'>+	XP_IOWRITE(pdata, XP_MDIO_MUTEX, XGBE_MUTEX_RELEASE);</div><div class='add'>+</div><div class='add'>+	/* Mutex formats are the same for I2C and MDIO/GPIO */</div><div class='add'>+	mutex_id = 0;</div><div class='add'>+	XP_SET_BITS(mutex_id, XP_I2C_MUTEX, ID, phy_data-&gt;port_id);</div><div class='add'>+	XP_SET_BITS(mutex_id, XP_I2C_MUTEX, ACTIVE, 1);</div><div class='add'>+</div><div class='add'>+	timeout = jiffies + (5 * HZ);</div><div class='add'>+	while (time_before(jiffies, timeout)) {</div><div class='add'>+		/* Must be all zeroes in order to obtain the mutex */</div><div class='add'>+		if (XP_IOREAD(pdata, XP_I2C_MUTEX) ||</div><div class='add'>+		    XP_IOREAD(pdata, XP_MDIO_MUTEX)) {</div><div class='add'>+			usleep_range(100, 200);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Obtain the mutex */</div><div class='add'>+		XP_IOWRITE(pdata, XP_I2C_MUTEX, mutex_id);</div><div class='add'>+		XP_IOWRITE(pdata, XP_MDIO_MUTEX, mutex_id);</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;xgbe_phy_comm_lock);</div><div class='add'>+</div><div class='add'>+	netdev_err(pdata-&gt;netdev, "unable to obtain hardware mutexes\n");</div><div class='add'>+</div><div class='add'>+	return -ETIMEDOUT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_mdio_mii_write_c22(struct xgbe_prv_data *pdata, int addr,</div><div class='add'>+				       int reg, u16 val)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+</div><div class='add'>+	if (phy_data-&gt;phydev_mode != XGBE_MDIO_MODE_CL22)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return pdata-&gt;hw_if.write_ext_mii_regs_c22(pdata, addr, reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_mdio_mii_write_c45(struct xgbe_prv_data *pdata, int addr,</div><div class='add'>+				       int devad, int reg, u16 val)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+</div><div class='add'>+	if (phy_data-&gt;phydev_mode != XGBE_MDIO_MODE_CL45)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return pdata-&gt;hw_if.write_ext_mii_regs_c45(pdata, addr, devad,</div><div class='add'>+						   reg, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_i2c_mii_write(struct xgbe_prv_data *pdata, int reg, u16 val)</div><div class='add'>+{</div><div class='add'>+	__be16 *mii_val;</div><div class='add'>+	u8 mii_data[3];</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = xgbe_phy_sfp_get_mux(pdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	mii_data[0] = reg &amp; 0xff;</div><div class='add'>+	mii_val = (__be16 *)&amp;mii_data[1];</div><div class='add'>+	*mii_val = cpu_to_be16(val);</div><div class='add'>+</div><div class='add'>+	ret = xgbe_phy_i2c_write(pdata, XGBE_SFP_PHY_ADDRESS,</div><div class='add'>+				 mii_data, sizeof(mii_data));</div><div class='add'>+</div><div class='add'>+	xgbe_phy_sfp_put_mux(pdata);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_mii_write_c22(struct mii_bus *mii, int addr, int reg,</div><div class='add'>+				  u16 val)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = mii-&gt;priv;</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = xgbe_phy_get_comm_ownership(pdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (phy_data-&gt;conn_type == XGBE_CONN_TYPE_SFP)</div><div class='add'>+		ret = xgbe_phy_i2c_mii_write(pdata, reg, val);</div><div class='add'>+	else if (phy_data-&gt;conn_type &amp; XGBE_CONN_TYPE_MDIO)</div><div class='add'>+		ret = xgbe_phy_mdio_mii_write_c22(pdata, addr, reg, val);</div><div class='add'>+	else</div><div class='add'>+		ret = -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	xgbe_phy_put_comm_ownership(pdata);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_mii_write_c45(struct mii_bus *mii, int addr, int devad,</div><div class='add'>+				  int reg, u16 val)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = mii-&gt;priv;</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = xgbe_phy_get_comm_ownership(pdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (phy_data-&gt;conn_type == XGBE_CONN_TYPE_SFP)</div><div class='add'>+		ret = -EOPNOTSUPP;</div><div class='add'>+	else if (phy_data-&gt;conn_type &amp; XGBE_CONN_TYPE_MDIO)</div><div class='add'>+		ret = xgbe_phy_mdio_mii_write_c45(pdata, addr, devad, reg, val);</div><div class='add'>+	else</div><div class='add'>+		ret = -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	xgbe_phy_put_comm_ownership(pdata);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_mdio_mii_read_c22(struct xgbe_prv_data *pdata, int addr,</div><div class='add'>+				      int reg)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+</div><div class='add'>+	if (phy_data-&gt;phydev_mode != XGBE_MDIO_MODE_CL22)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return pdata-&gt;hw_if.read_ext_mii_regs_c22(pdata, addr, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_mdio_mii_read_c45(struct xgbe_prv_data *pdata, int addr,</div><div class='add'>+				      int devad, int reg)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+</div><div class='add'>+	if (phy_data-&gt;phydev_mode != XGBE_MDIO_MODE_CL45)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return pdata-&gt;hw_if.read_ext_mii_regs_c45(pdata, addr, devad, reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_i2c_mii_read(struct xgbe_prv_data *pdata, int reg)</div><div class='add'>+{</div><div class='add'>+	__be16 mii_val;</div><div class='add'>+	u8 mii_reg;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = xgbe_phy_sfp_get_mux(pdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	mii_reg = reg;</div><div class='add'>+	ret = xgbe_phy_i2c_read(pdata, XGBE_SFP_PHY_ADDRESS,</div><div class='add'>+				&amp;mii_reg, sizeof(mii_reg),</div><div class='add'>+				&amp;mii_val, sizeof(mii_val));</div><div class='add'>+	if (!ret)</div><div class='add'>+		ret = be16_to_cpu(mii_val);</div><div class='add'>+</div><div class='add'>+	xgbe_phy_sfp_put_mux(pdata);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_mii_read_c22(struct mii_bus *mii, int addr, int reg)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = mii-&gt;priv;</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = xgbe_phy_get_comm_ownership(pdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (phy_data-&gt;conn_type == XGBE_CONN_TYPE_SFP)</div><div class='add'>+		ret = xgbe_phy_i2c_mii_read(pdata, reg);</div><div class='add'>+	else if (phy_data-&gt;conn_type &amp; XGBE_CONN_TYPE_MDIO)</div><div class='add'>+		ret = xgbe_phy_mdio_mii_read_c22(pdata, addr, reg);</div><div class='add'>+	else</div><div class='add'>+		ret = -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	xgbe_phy_put_comm_ownership(pdata);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_mii_read_c45(struct mii_bus *mii, int addr, int devad,</div><div class='add'>+				 int reg)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = mii-&gt;priv;</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = xgbe_phy_get_comm_ownership(pdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (phy_data-&gt;conn_type == XGBE_CONN_TYPE_SFP)</div><div class='add'>+		ret = -EOPNOTSUPP;</div><div class='add'>+	else if (phy_data-&gt;conn_type &amp; XGBE_CONN_TYPE_MDIO)</div><div class='add'>+		ret = xgbe_phy_mdio_mii_read_c45(pdata, addr, devad, reg);</div><div class='add'>+	else</div><div class='add'>+		ret = -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	xgbe_phy_put_comm_ownership(pdata);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_sfp_phy_settings(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct ethtool_link_ksettings *lks = &amp;pdata-&gt;phy.lks;</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+</div><div class='add'>+	if (!phy_data-&gt;sfp_mod_absent &amp;&amp; !phy_data-&gt;sfp_changed)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	XGBE_ZERO_SUP(lks);</div><div class='add'>+</div><div class='add'>+	if (phy_data-&gt;sfp_mod_absent) {</div><div class='add'>+		pdata-&gt;phy.speed = SPEED_UNKNOWN;</div><div class='add'>+		pdata-&gt;phy.duplex = DUPLEX_UNKNOWN;</div><div class='add'>+		pdata-&gt;phy.autoneg = AUTONEG_ENABLE;</div><div class='add'>+		pdata-&gt;phy.pause_autoneg = AUTONEG_ENABLE;</div><div class='add'>+</div><div class='add'>+		XGBE_SET_SUP(lks, Autoneg);</div><div class='add'>+		XGBE_SET_SUP(lks, Pause);</div><div class='add'>+		XGBE_SET_SUP(lks, Asym_Pause);</div><div class='add'>+		XGBE_SET_SUP(lks, TP);</div><div class='add'>+		XGBE_SET_SUP(lks, FIBRE);</div><div class='add'>+</div><div class='add'>+		XGBE_LM_COPY(lks, advertising, lks, supported);</div><div class='add'>+</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (phy_data-&gt;sfp_base) {</div><div class='add'>+	case XGBE_SFP_BASE_1000_T:</div><div class='add'>+	case XGBE_SFP_BASE_1000_SX:</div><div class='add'>+	case XGBE_SFP_BASE_1000_LX:</div><div class='add'>+	case XGBE_SFP_BASE_1000_CX:</div><div class='add'>+		pdata-&gt;phy.speed = SPEED_UNKNOWN;</div><div class='add'>+		pdata-&gt;phy.duplex = DUPLEX_UNKNOWN;</div><div class='add'>+		pdata-&gt;phy.autoneg = AUTONEG_ENABLE;</div><div class='add'>+		pdata-&gt;phy.pause_autoneg = AUTONEG_ENABLE;</div><div class='add'>+		XGBE_SET_SUP(lks, Autoneg);</div><div class='add'>+		XGBE_SET_SUP(lks, Pause);</div><div class='add'>+		XGBE_SET_SUP(lks, Asym_Pause);</div><div class='add'>+		if (phy_data-&gt;sfp_base == XGBE_SFP_BASE_1000_T) {</div><div class='add'>+			if (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_10)</div><div class='add'>+				XGBE_SET_SUP(lks, 10baseT_Full);</div><div class='add'>+			if (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_100)</div><div class='add'>+				XGBE_SET_SUP(lks, 100baseT_Full);</div><div class='add'>+			if (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_1000)</div><div class='add'>+				XGBE_SET_SUP(lks, 1000baseT_Full);</div><div class='add'>+		} else {</div><div class='add'>+			if (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_1000)</div><div class='add'>+				XGBE_SET_SUP(lks, 1000baseX_Full);</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_SFP_BASE_10000_SR:</div><div class='add'>+	case XGBE_SFP_BASE_10000_LR:</div><div class='add'>+	case XGBE_SFP_BASE_10000_LRM:</div><div class='add'>+	case XGBE_SFP_BASE_10000_ER:</div><div class='add'>+	case XGBE_SFP_BASE_10000_CR:</div><div class='add'>+		pdata-&gt;phy.speed = SPEED_10000;</div><div class='add'>+		pdata-&gt;phy.duplex = DUPLEX_FULL;</div><div class='add'>+		pdata-&gt;phy.autoneg = AUTONEG_DISABLE;</div><div class='add'>+		pdata-&gt;phy.pause_autoneg = AUTONEG_DISABLE;</div><div class='add'>+		if (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_10000) {</div><div class='add'>+			switch (phy_data-&gt;sfp_base) {</div><div class='add'>+			case XGBE_SFP_BASE_10000_SR:</div><div class='add'>+				XGBE_SET_SUP(lks, 10000baseSR_Full);</div><div class='add'>+				break;</div><div class='add'>+			case XGBE_SFP_BASE_10000_LR:</div><div class='add'>+				XGBE_SET_SUP(lks, 10000baseLR_Full);</div><div class='add'>+				break;</div><div class='add'>+			case XGBE_SFP_BASE_10000_LRM:</div><div class='add'>+				XGBE_SET_SUP(lks, 10000baseLRM_Full);</div><div class='add'>+				break;</div><div class='add'>+			case XGBE_SFP_BASE_10000_ER:</div><div class='add'>+				XGBE_SET_SUP(lks, 10000baseER_Full);</div><div class='add'>+				break;</div><div class='add'>+			case XGBE_SFP_BASE_10000_CR:</div><div class='add'>+				XGBE_SET_SUP(lks, 10000baseCR_Full);</div><div class='add'>+				break;</div><div class='add'>+			default:</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		pdata-&gt;phy.speed = SPEED_UNKNOWN;</div><div class='add'>+		pdata-&gt;phy.duplex = DUPLEX_UNKNOWN;</div><div class='add'>+		pdata-&gt;phy.autoneg = AUTONEG_DISABLE;</div><div class='add'>+		pdata-&gt;phy.pause_autoneg = AUTONEG_DISABLE;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (phy_data-&gt;sfp_base) {</div><div class='add'>+	case XGBE_SFP_BASE_1000_T:</div><div class='add'>+	case XGBE_SFP_BASE_1000_CX:</div><div class='add'>+	case XGBE_SFP_BASE_10000_CR:</div><div class='add'>+		XGBE_SET_SUP(lks, TP);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		XGBE_SET_SUP(lks, FIBRE);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	XGBE_LM_COPY(lks, advertising, lks, supported);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool xgbe_phy_sfp_bit_rate(struct xgbe_sfp_eeprom *sfp_eeprom,</div><div class='add'>+				  enum xgbe_sfp_speed sfp_speed)</div><div class='add'>+{</div><div class='add'>+	u8 *sfp_base, min;</div><div class='add'>+</div><div class='add'>+	sfp_base = sfp_eeprom-&gt;base;</div><div class='add'>+</div><div class='add'>+	switch (sfp_speed) {</div><div class='add'>+	case XGBE_SFP_SPEED_1000:</div><div class='add'>+		min = XGBE_SFP_BASE_BR_1GBE_MIN;</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_SFP_SPEED_10000:</div><div class='add'>+		min = XGBE_SFP_BASE_BR_10GBE_MIN;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return sfp_base[XGBE_SFP_BASE_BR] &gt;= min;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_free_phy_device(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+</div><div class='add'>+	if (phy_data-&gt;phydev) {</div><div class='add'>+		phy_detach(phy_data-&gt;phydev);</div><div class='add'>+		phy_device_remove(phy_data-&gt;phydev);</div><div class='add'>+		phy_device_free(phy_data-&gt;phydev);</div><div class='add'>+		phy_data-&gt;phydev = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool xgbe_phy_finisar_phy_quirks(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	unsigned int phy_id = phy_data-&gt;phydev-&gt;phy_id;</div><div class='add'>+</div><div class='add'>+	if (phy_data-&gt;port_mode != XGBE_PORT_MODE_SFP)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if ((phy_id &amp; 0xfffffff0) != 0x01ff0cc0)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* Enable Base-T AN */</div><div class='add'>+	phy_write(phy_data-&gt;phydev, 0x16, 0x0001);</div><div class='add'>+	phy_write(phy_data-&gt;phydev, 0x00, 0x9140);</div><div class='add'>+	phy_write(phy_data-&gt;phydev, 0x16, 0x0000);</div><div class='add'>+</div><div class='add'>+	/* Enable SGMII at 100Base-T/1000Base-T Full Duplex */</div><div class='add'>+	phy_write(phy_data-&gt;phydev, 0x1b, 0x9084);</div><div class='add'>+	phy_write(phy_data-&gt;phydev, 0x09, 0x0e00);</div><div class='add'>+	phy_write(phy_data-&gt;phydev, 0x00, 0x8140);</div><div class='add'>+	phy_write(phy_data-&gt;phydev, 0x04, 0x0d01);</div><div class='add'>+	phy_write(phy_data-&gt;phydev, 0x00, 0x9140);</div><div class='add'>+</div><div class='add'>+	linkmode_copy(phy_data-&gt;phydev-&gt;supported, PHY_GBIT_FEATURES);</div><div class='add'>+</div><div class='add'>+	phy_support_asym_pause(phy_data-&gt;phydev);</div><div class='add'>+</div><div class='add'>+	netif_dbg(pdata, drv, pdata-&gt;netdev,</div><div class='add'>+		  "Finisar PHY quirk in place\n");</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool xgbe_phy_belfuse_phy_quirks(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	struct xgbe_sfp_eeprom *sfp_eeprom = &amp;phy_data-&gt;sfp_eeprom;</div><div class='add'>+	unsigned int phy_id = phy_data-&gt;phydev-&gt;phy_id;</div><div class='add'>+	int reg;</div><div class='add'>+</div><div class='add'>+	if (phy_data-&gt;port_mode != XGBE_PORT_MODE_SFP)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (memcmp(&amp;sfp_eeprom-&gt;base[XGBE_SFP_BASE_VENDOR_NAME],</div><div class='add'>+		   XGBE_BEL_FUSE_VENDOR, XGBE_SFP_BASE_VENDOR_NAME_LEN))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* For Bel-Fuse, use the extra AN flag */</div><div class='add'>+	pdata-&gt;an_again = 1;</div><div class='add'>+</div><div class='add'>+	if (memcmp(&amp;sfp_eeprom-&gt;base[XGBE_SFP_BASE_VENDOR_PN],</div><div class='add'>+		   XGBE_BEL_FUSE_PARTNO, XGBE_SFP_BASE_VENDOR_PN_LEN))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if ((phy_id &amp; 0xfffffff0) != 0x03625d10)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* Reset PHY - wait for self-clearing reset bit to clear */</div><div class='add'>+	genphy_soft_reset(phy_data-&gt;phydev);</div><div class='add'>+</div><div class='add'>+	/* Disable RGMII mode */</div><div class='add'>+	phy_write(phy_data-&gt;phydev, 0x18, 0x7007);</div><div class='add'>+	reg = phy_read(phy_data-&gt;phydev, 0x18);</div><div class='add'>+	phy_write(phy_data-&gt;phydev, 0x18, reg &amp; ~0x0080);</div><div class='add'>+</div><div class='add'>+	/* Enable fiber register bank */</div><div class='add'>+	phy_write(phy_data-&gt;phydev, 0x1c, 0x7c00);</div><div class='add'>+	reg = phy_read(phy_data-&gt;phydev, 0x1c);</div><div class='add'>+	reg &amp;= 0x03ff;</div><div class='add'>+	reg &amp;= ~0x0001;</div><div class='add'>+	phy_write(phy_data-&gt;phydev, 0x1c, 0x8000 | 0x7c00 | reg | 0x0001);</div><div class='add'>+</div><div class='add'>+	/* Power down SerDes */</div><div class='add'>+	reg = phy_read(phy_data-&gt;phydev, 0x00);</div><div class='add'>+	phy_write(phy_data-&gt;phydev, 0x00, reg | 0x00800);</div><div class='add'>+</div><div class='add'>+	/* Configure SGMII-to-Copper mode */</div><div class='add'>+	phy_write(phy_data-&gt;phydev, 0x1c, 0x7c00);</div><div class='add'>+	reg = phy_read(phy_data-&gt;phydev, 0x1c);</div><div class='add'>+	reg &amp;= 0x03ff;</div><div class='add'>+	reg &amp;= ~0x0006;</div><div class='add'>+	phy_write(phy_data-&gt;phydev, 0x1c, 0x8000 | 0x7c00 | reg | 0x0004);</div><div class='add'>+</div><div class='add'>+	/* Power up SerDes */</div><div class='add'>+	reg = phy_read(phy_data-&gt;phydev, 0x00);</div><div class='add'>+	phy_write(phy_data-&gt;phydev, 0x00, reg &amp; ~0x00800);</div><div class='add'>+</div><div class='add'>+	/* Enable copper register bank */</div><div class='add'>+	phy_write(phy_data-&gt;phydev, 0x1c, 0x7c00);</div><div class='add'>+	reg = phy_read(phy_data-&gt;phydev, 0x1c);</div><div class='add'>+	reg &amp;= 0x03ff;</div><div class='add'>+	reg &amp;= ~0x0001;</div><div class='add'>+	phy_write(phy_data-&gt;phydev, 0x1c, 0x8000 | 0x7c00 | reg);</div><div class='add'>+</div><div class='add'>+	/* Power up SerDes */</div><div class='add'>+	reg = phy_read(phy_data-&gt;phydev, 0x00);</div><div class='add'>+	phy_write(phy_data-&gt;phydev, 0x00, reg &amp; ~0x00800);</div><div class='add'>+</div><div class='add'>+	linkmode_copy(phy_data-&gt;phydev-&gt;supported, PHY_GBIT_FEATURES);</div><div class='add'>+	phy_support_asym_pause(phy_data-&gt;phydev);</div><div class='add'>+</div><div class='add'>+	netif_dbg(pdata, drv, pdata-&gt;netdev,</div><div class='add'>+		  "BelFuse PHY quirk in place\n");</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_external_phy_quirks(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	if (xgbe_phy_belfuse_phy_quirks(pdata))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (xgbe_phy_finisar_phy_quirks(pdata))</div><div class='add'>+		return;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_find_phy_device(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct ethtool_link_ksettings *lks = &amp;pdata-&gt;phy.lks;</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	struct phy_device *phydev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* If we already have a PHY, just return */</div><div class='add'>+	if (phy_data-&gt;phydev)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Clear the extra AN flag */</div><div class='add'>+	pdata-&gt;an_again = 0;</div><div class='add'>+</div><div class='add'>+	/* Check for the use of an external PHY */</div><div class='add'>+	if (phy_data-&gt;phydev_mode == XGBE_MDIO_MODE_NONE)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* For SFP, only use an external PHY if available */</div><div class='add'>+	if ((phy_data-&gt;port_mode == XGBE_PORT_MODE_SFP) &amp;&amp;</div><div class='add'>+	    !phy_data-&gt;sfp_phy_avail)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Set the proper MDIO mode for the PHY */</div><div class='add'>+	ret = pdata-&gt;hw_if.set_ext_mii_mode(pdata, phy_data-&gt;mdio_addr,</div><div class='add'>+					    phy_data-&gt;phydev_mode);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(pdata-&gt;netdev,</div><div class='add'>+			   "mdio port/clause not compatible (%u/%u)\n",</div><div class='add'>+			   phy_data-&gt;mdio_addr, phy_data-&gt;phydev_mode);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Create and connect to the PHY device */</div><div class='add'>+	phydev = get_phy_device(phy_data-&gt;mii, phy_data-&gt;mdio_addr,</div><div class='add'>+				(phy_data-&gt;phydev_mode == XGBE_MDIO_MODE_CL45));</div><div class='add'>+	if (IS_ERR(phydev)) {</div><div class='add'>+		netdev_err(pdata-&gt;netdev, "get_phy_device failed\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+	netif_dbg(pdata, drv, pdata-&gt;netdev, "external PHY id is %#010x\n",</div><div class='add'>+		  phydev-&gt;phy_id);</div><div class='add'>+</div><div class='add'>+	/*TODO: If c45, add request_module based on one of the MMD ids? */</div><div class='add'>+</div><div class='add'>+	ret = phy_device_register(phydev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(pdata-&gt;netdev, "phy_device_register failed\n");</div><div class='add'>+		phy_device_free(phydev);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = phy_attach_direct(pdata-&gt;netdev, phydev, phydev-&gt;dev_flags,</div><div class='add'>+				PHY_INTERFACE_MODE_SGMII);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(pdata-&gt;netdev, "phy_attach_direct failed\n");</div><div class='add'>+		phy_device_remove(phydev);</div><div class='add'>+		phy_device_free(phydev);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	phy_data-&gt;phydev = phydev;</div><div class='add'>+	phy_data-&gt;phydev-&gt;mac_managed_pm = true;</div><div class='add'>+</div><div class='add'>+	xgbe_phy_external_phy_quirks(pdata);</div><div class='add'>+</div><div class='add'>+	linkmode_and(phydev-&gt;advertising, phydev-&gt;advertising,</div><div class='add'>+		     lks-&gt;link_modes.advertising);</div><div class='add'>+</div><div class='add'>+	phy_start_aneg(phy_data-&gt;phydev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_sfp_external_phy(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!phy_data-&gt;sfp_changed)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	phy_data-&gt;sfp_phy_avail = 0;</div><div class='add'>+</div><div class='add'>+	if (phy_data-&gt;sfp_base != XGBE_SFP_BASE_1000_T)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Check access to the PHY by reading CTRL1 */</div><div class='add'>+	ret = xgbe_phy_i2c_mii_read(pdata, MII_BMCR);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Successfully accessed the PHY */</div><div class='add'>+	phy_data-&gt;sfp_phy_avail = 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool xgbe_phy_check_sfp_rx_los(struct xgbe_phy_data *phy_data)</div><div class='add'>+{</div><div class='add'>+	u8 *sfp_extd = phy_data-&gt;sfp_eeprom.extd;</div><div class='add'>+</div><div class='add'>+	if (!(sfp_extd[XGBE_SFP_EXTD_OPT1] &amp; XGBE_SFP_EXTD_OPT1_RX_LOS))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (phy_data-&gt;sfp_gpio_mask &amp; XGBE_GPIO_NO_RX_LOS)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (phy_data-&gt;sfp_gpio_inputs &amp; (1 &lt;&lt; phy_data-&gt;sfp_gpio_rx_los))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool xgbe_phy_check_sfp_tx_fault(struct xgbe_phy_data *phy_data)</div><div class='add'>+{</div><div class='add'>+	u8 *sfp_extd = phy_data-&gt;sfp_eeprom.extd;</div><div class='add'>+</div><div class='add'>+	if (!(sfp_extd[XGBE_SFP_EXTD_OPT1] &amp; XGBE_SFP_EXTD_OPT1_TX_FAULT))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (phy_data-&gt;sfp_gpio_mask &amp; XGBE_GPIO_NO_TX_FAULT)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (phy_data-&gt;sfp_gpio_inputs &amp; (1 &lt;&lt; phy_data-&gt;sfp_gpio_tx_fault))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool xgbe_phy_check_sfp_mod_absent(struct xgbe_phy_data *phy_data)</div><div class='add'>+{</div><div class='add'>+	if (phy_data-&gt;sfp_gpio_mask &amp; XGBE_GPIO_NO_MOD_ABSENT)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (phy_data-&gt;sfp_gpio_inputs &amp; (1 &lt;&lt; phy_data-&gt;sfp_gpio_mod_absent))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_sfp_parse_eeprom(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	struct xgbe_sfp_eeprom *sfp_eeprom = &amp;phy_data-&gt;sfp_eeprom;</div><div class='add'>+	u8 *sfp_base;</div><div class='add'>+</div><div class='add'>+	sfp_base = sfp_eeprom-&gt;base;</div><div class='add'>+</div><div class='add'>+	if (sfp_base[XGBE_SFP_BASE_ID] != XGBE_SFP_ID_SFP)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (sfp_base[XGBE_SFP_BASE_EXT_ID] != XGBE_SFP_EXT_ID_SFP)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Update transceiver signals (eeprom extd/options) */</div><div class='add'>+	phy_data-&gt;sfp_tx_fault = xgbe_phy_check_sfp_tx_fault(phy_data);</div><div class='add'>+	phy_data-&gt;sfp_rx_los = xgbe_phy_check_sfp_rx_los(phy_data);</div><div class='add'>+</div><div class='add'>+	/* Assume FIBER cable unless told otherwise */</div><div class='add'>+	if (sfp_base[XGBE_SFP_BASE_CABLE] &amp; XGBE_SFP_BASE_CABLE_PASSIVE) {</div><div class='add'>+		phy_data-&gt;sfp_cable = XGBE_SFP_CABLE_PASSIVE;</div><div class='add'>+		phy_data-&gt;sfp_cable_len = sfp_base[XGBE_SFP_BASE_CU_CABLE_LEN];</div><div class='add'>+	} else if (sfp_base[XGBE_SFP_BASE_CABLE] &amp; XGBE_SFP_BASE_CABLE_ACTIVE) {</div><div class='add'>+		phy_data-&gt;sfp_cable = XGBE_SFP_CABLE_ACTIVE;</div><div class='add'>+	} else {</div><div class='add'>+		phy_data-&gt;sfp_cable = XGBE_SFP_CABLE_FIBER;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Determine the type of SFP */</div><div class='add'>+	if (phy_data-&gt;sfp_cable != XGBE_SFP_CABLE_FIBER &amp;&amp;</div><div class='add'>+	    xgbe_phy_sfp_bit_rate(sfp_eeprom, XGBE_SFP_SPEED_10000))</div><div class='add'>+		phy_data-&gt;sfp_base = XGBE_SFP_BASE_10000_CR;</div><div class='add'>+	else if (sfp_base[XGBE_SFP_BASE_10GBE_CC] &amp; XGBE_SFP_BASE_10GBE_CC_SR)</div><div class='add'>+		phy_data-&gt;sfp_base = XGBE_SFP_BASE_10000_SR;</div><div class='add'>+	else if (sfp_base[XGBE_SFP_BASE_10GBE_CC] &amp; XGBE_SFP_BASE_10GBE_CC_LR)</div><div class='add'>+		phy_data-&gt;sfp_base = XGBE_SFP_BASE_10000_LR;</div><div class='add'>+	else if (sfp_base[XGBE_SFP_BASE_10GBE_CC] &amp; XGBE_SFP_BASE_10GBE_CC_LRM)</div><div class='add'>+		phy_data-&gt;sfp_base = XGBE_SFP_BASE_10000_LRM;</div><div class='add'>+	else if (sfp_base[XGBE_SFP_BASE_10GBE_CC] &amp; XGBE_SFP_BASE_10GBE_CC_ER)</div><div class='add'>+		phy_data-&gt;sfp_base = XGBE_SFP_BASE_10000_ER;</div><div class='add'>+	else if (sfp_base[XGBE_SFP_BASE_1GBE_CC] &amp; XGBE_SFP_BASE_1GBE_CC_SX)</div><div class='add'>+		phy_data-&gt;sfp_base = XGBE_SFP_BASE_1000_SX;</div><div class='add'>+	else if (sfp_base[XGBE_SFP_BASE_1GBE_CC] &amp; XGBE_SFP_BASE_1GBE_CC_LX)</div><div class='add'>+		phy_data-&gt;sfp_base = XGBE_SFP_BASE_1000_LX;</div><div class='add'>+	else if (sfp_base[XGBE_SFP_BASE_1GBE_CC] &amp; XGBE_SFP_BASE_1GBE_CC_CX)</div><div class='add'>+		phy_data-&gt;sfp_base = XGBE_SFP_BASE_1000_CX;</div><div class='add'>+	else if (sfp_base[XGBE_SFP_BASE_1GBE_CC] &amp; XGBE_SFP_BASE_1GBE_CC_T)</div><div class='add'>+		phy_data-&gt;sfp_base = XGBE_SFP_BASE_1000_T;</div><div class='add'>+</div><div class='add'>+	switch (phy_data-&gt;sfp_base) {</div><div class='add'>+	case XGBE_SFP_BASE_1000_T:</div><div class='add'>+		phy_data-&gt;sfp_speed = XGBE_SFP_SPEED_100_1000;</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_SFP_BASE_1000_SX:</div><div class='add'>+	case XGBE_SFP_BASE_1000_LX:</div><div class='add'>+	case XGBE_SFP_BASE_1000_CX:</div><div class='add'>+		phy_data-&gt;sfp_speed = XGBE_SFP_SPEED_1000;</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_SFP_BASE_10000_SR:</div><div class='add'>+	case XGBE_SFP_BASE_10000_LR:</div><div class='add'>+	case XGBE_SFP_BASE_10000_LRM:</div><div class='add'>+	case XGBE_SFP_BASE_10000_ER:</div><div class='add'>+	case XGBE_SFP_BASE_10000_CR:</div><div class='add'>+		phy_data-&gt;sfp_speed = XGBE_SFP_SPEED_10000;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_sfp_eeprom_info(struct xgbe_prv_data *pdata,</div><div class='add'>+				     struct xgbe_sfp_eeprom *sfp_eeprom)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_sfp_ascii sfp_ascii;</div><div class='add'>+	char *sfp_data = (char *)&amp;sfp_ascii;</div><div class='add'>+</div><div class='add'>+	netif_dbg(pdata, drv, pdata-&gt;netdev, "SFP detected:\n");</div><div class='add'>+	memcpy(sfp_data, &amp;sfp_eeprom-&gt;base[XGBE_SFP_BASE_VENDOR_NAME],</div><div class='add'>+	       XGBE_SFP_BASE_VENDOR_NAME_LEN);</div><div class='add'>+	sfp_data[XGBE_SFP_BASE_VENDOR_NAME_LEN] = '\0';</div><div class='add'>+	netif_dbg(pdata, drv, pdata-&gt;netdev, "  vendor:         %s\n",</div><div class='add'>+		  sfp_data);</div><div class='add'>+</div><div class='add'>+	memcpy(sfp_data, &amp;sfp_eeprom-&gt;base[XGBE_SFP_BASE_VENDOR_PN],</div><div class='add'>+	       XGBE_SFP_BASE_VENDOR_PN_LEN);</div><div class='add'>+	sfp_data[XGBE_SFP_BASE_VENDOR_PN_LEN] = '\0';</div><div class='add'>+	netif_dbg(pdata, drv, pdata-&gt;netdev, "  part number:    %s\n",</div><div class='add'>+		  sfp_data);</div><div class='add'>+</div><div class='add'>+	memcpy(sfp_data, &amp;sfp_eeprom-&gt;base[XGBE_SFP_BASE_VENDOR_REV],</div><div class='add'>+	       XGBE_SFP_BASE_VENDOR_REV_LEN);</div><div class='add'>+	sfp_data[XGBE_SFP_BASE_VENDOR_REV_LEN] = '\0';</div><div class='add'>+	netif_dbg(pdata, drv, pdata-&gt;netdev, "  revision level: %s\n",</div><div class='add'>+		  sfp_data);</div><div class='add'>+</div><div class='add'>+	memcpy(sfp_data, &amp;sfp_eeprom-&gt;extd[XGBE_SFP_BASE_VENDOR_SN],</div><div class='add'>+	       XGBE_SFP_BASE_VENDOR_SN_LEN);</div><div class='add'>+	sfp_data[XGBE_SFP_BASE_VENDOR_SN_LEN] = '\0';</div><div class='add'>+	netif_dbg(pdata, drv, pdata-&gt;netdev, "  serial number:  %s\n",</div><div class='add'>+		  sfp_data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool xgbe_phy_sfp_verify_eeprom(u8 cc_in, u8 *buf, unsigned int len)</div><div class='add'>+{</div><div class='add'>+	u8 cc;</div><div class='add'>+</div><div class='add'>+	for (cc = 0; len; buf++, len--)</div><div class='add'>+		cc += *buf;</div><div class='add'>+</div><div class='add'>+	return cc == cc_in;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_sfp_read_eeprom(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	struct xgbe_sfp_eeprom sfp_eeprom;</div><div class='add'>+	u8 eeprom_addr;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = xgbe_phy_sfp_get_mux(pdata);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err_once(pdata-&gt;dev, "%s: I2C error setting SFP MUX\n",</div><div class='add'>+			     netdev_name(pdata-&gt;netdev));</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Read the SFP serial ID eeprom */</div><div class='add'>+	eeprom_addr = 0;</div><div class='add'>+	ret = xgbe_phy_i2c_read(pdata, XGBE_SFP_SERIAL_ID_ADDRESS,</div><div class='add'>+				&amp;eeprom_addr, sizeof(eeprom_addr),</div><div class='add'>+				&amp;sfp_eeprom, sizeof(sfp_eeprom));</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err_once(pdata-&gt;dev, "%s: I2C error reading SFP EEPROM\n",</div><div class='add'>+			     netdev_name(pdata-&gt;netdev));</div><div class='add'>+		goto put;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Validate the contents read */</div><div class='add'>+	if (!xgbe_phy_sfp_verify_eeprom(sfp_eeprom.base[XGBE_SFP_BASE_CC],</div><div class='add'>+					sfp_eeprom.base,</div><div class='add'>+					sizeof(sfp_eeprom.base) - 1)) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto put;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!xgbe_phy_sfp_verify_eeprom(sfp_eeprom.extd[XGBE_SFP_EXTD_CC],</div><div class='add'>+					sfp_eeprom.extd,</div><div class='add'>+					sizeof(sfp_eeprom.extd) - 1)) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto put;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Check for an added or changed SFP */</div><div class='add'>+	if (memcmp(&amp;phy_data-&gt;sfp_eeprom, &amp;sfp_eeprom, sizeof(sfp_eeprom))) {</div><div class='add'>+		phy_data-&gt;sfp_changed = 1;</div><div class='add'>+</div><div class='add'>+		if (netif_msg_drv(pdata))</div><div class='add'>+			xgbe_phy_sfp_eeprom_info(pdata, &amp;sfp_eeprom);</div><div class='add'>+</div><div class='add'>+		memcpy(&amp;phy_data-&gt;sfp_eeprom, &amp;sfp_eeprom, sizeof(sfp_eeprom));</div><div class='add'>+</div><div class='add'>+		xgbe_phy_free_phy_device(pdata);</div><div class='add'>+	} else {</div><div class='add'>+		phy_data-&gt;sfp_changed = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+put:</div><div class='add'>+	xgbe_phy_sfp_put_mux(pdata);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_sfp_signals(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	u8 gpio_reg, gpio_ports[2];</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Read the input port registers */</div><div class='add'>+	gpio_reg = 0;</div><div class='add'>+	ret = xgbe_phy_i2c_read(pdata, phy_data-&gt;sfp_gpio_address,</div><div class='add'>+				&amp;gpio_reg, sizeof(gpio_reg),</div><div class='add'>+				gpio_ports, sizeof(gpio_ports));</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err_once(pdata-&gt;dev, "%s: I2C error reading SFP GPIOs\n",</div><div class='add'>+			     netdev_name(pdata-&gt;netdev));</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	phy_data-&gt;sfp_gpio_inputs = (gpio_ports[1] &lt;&lt; 8) | gpio_ports[0];</div><div class='add'>+</div><div class='add'>+	phy_data-&gt;sfp_mod_absent = xgbe_phy_check_sfp_mod_absent(phy_data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_sfp_mod_absent(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+</div><div class='add'>+	xgbe_phy_free_phy_device(pdata);</div><div class='add'>+</div><div class='add'>+	phy_data-&gt;sfp_mod_absent = 1;</div><div class='add'>+	phy_data-&gt;sfp_phy_avail = 0;</div><div class='add'>+	memset(&amp;phy_data-&gt;sfp_eeprom, 0, sizeof(phy_data-&gt;sfp_eeprom));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_sfp_reset(struct xgbe_phy_data *phy_data)</div><div class='add'>+{</div><div class='add'>+	phy_data-&gt;sfp_rx_los = 0;</div><div class='add'>+	phy_data-&gt;sfp_tx_fault = 0;</div><div class='add'>+	phy_data-&gt;sfp_mod_absent = 1;</div><div class='add'>+	phy_data-&gt;sfp_base = XGBE_SFP_BASE_UNKNOWN;</div><div class='add'>+	phy_data-&gt;sfp_cable = XGBE_SFP_CABLE_UNKNOWN;</div><div class='add'>+	phy_data-&gt;sfp_speed = XGBE_SFP_SPEED_UNKNOWN;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_sfp_detect(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Reset the SFP signals and info */</div><div class='add'>+	xgbe_phy_sfp_reset(phy_data);</div><div class='add'>+</div><div class='add'>+	ret = xgbe_phy_get_comm_ownership(pdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* Read the SFP signals and check for module presence */</div><div class='add'>+	xgbe_phy_sfp_signals(pdata);</div><div class='add'>+	if (phy_data-&gt;sfp_mod_absent) {</div><div class='add'>+		xgbe_phy_sfp_mod_absent(pdata);</div><div class='add'>+		goto put;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = xgbe_phy_sfp_read_eeprom(pdata);</div><div class='add'>+	if (ret) {</div><div class='add'>+		/* Treat any error as if there isn't an SFP plugged in */</div><div class='add'>+		xgbe_phy_sfp_reset(phy_data);</div><div class='add'>+		xgbe_phy_sfp_mod_absent(pdata);</div><div class='add'>+		goto put;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	xgbe_phy_sfp_parse_eeprom(pdata);</div><div class='add'>+</div><div class='add'>+	xgbe_phy_sfp_external_phy(pdata);</div><div class='add'>+</div><div class='add'>+put:</div><div class='add'>+	xgbe_phy_sfp_phy_settings(pdata);</div><div class='add'>+</div><div class='add'>+	xgbe_phy_put_comm_ownership(pdata);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_module_eeprom(struct xgbe_prv_data *pdata,</div><div class='add'>+				  struct ethtool_eeprom *eeprom, u8 *data)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	u8 eeprom_addr, eeprom_data[XGBE_SFP_EEPROM_MAX];</div><div class='add'>+	struct xgbe_sfp_eeprom *sfp_eeprom;</div><div class='add'>+	unsigned int i, j, rem;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	rem = eeprom-&gt;len;</div><div class='add'>+</div><div class='add'>+	if (!eeprom-&gt;len) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((eeprom-&gt;offset + eeprom-&gt;len) &gt; XGBE_SFP_EEPROM_MAX) {</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (phy_data-&gt;port_mode != XGBE_PORT_MODE_SFP) {</div><div class='add'>+		ret = -ENXIO;</div><div class='add'>+		goto done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!netif_running(pdata-&gt;netdev)) {</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		goto done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (phy_data-&gt;sfp_mod_absent) {</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		goto done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = xgbe_phy_get_comm_ownership(pdata);</div><div class='add'>+	if (ret) {</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		goto done;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = xgbe_phy_sfp_get_mux(pdata);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(pdata-&gt;netdev, "I2C error setting SFP MUX\n");</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		goto put_own;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Read the SFP serial ID eeprom */</div><div class='add'>+	eeprom_addr = 0;</div><div class='add'>+	ret = xgbe_phy_i2c_read(pdata, XGBE_SFP_SERIAL_ID_ADDRESS,</div><div class='add'>+				&amp;eeprom_addr, sizeof(eeprom_addr),</div><div class='add'>+				eeprom_data, XGBE_SFP_EEPROM_BASE_LEN);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(pdata-&gt;netdev,</div><div class='add'>+			   "I2C error reading SFP EEPROM\n");</div><div class='add'>+		ret = -EIO;</div><div class='add'>+		goto put_mux;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sfp_eeprom = (struct xgbe_sfp_eeprom *)eeprom_data;</div><div class='add'>+</div><div class='add'>+	if (XGBE_SFP_DIAGS_SUPPORTED(sfp_eeprom)) {</div><div class='add'>+		/* Read the SFP diagnostic eeprom */</div><div class='add'>+		eeprom_addr = 0;</div><div class='add'>+		ret = xgbe_phy_i2c_read(pdata, XGBE_SFP_DIAG_INFO_ADDRESS,</div><div class='add'>+					&amp;eeprom_addr, sizeof(eeprom_addr),</div><div class='add'>+					eeprom_data + XGBE_SFP_EEPROM_BASE_LEN,</div><div class='add'>+					XGBE_SFP_EEPROM_DIAG_LEN);</div><div class='add'>+		if (ret) {</div><div class='add'>+			netdev_err(pdata-&gt;netdev,</div><div class='add'>+				   "I2C error reading SFP DIAGS\n");</div><div class='add'>+			ret = -EIO;</div><div class='add'>+			goto put_mux;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0, j = eeprom-&gt;offset; i &lt; eeprom-&gt;len; i++, j++) {</div><div class='add'>+		if ((j &gt;= XGBE_SFP_EEPROM_BASE_LEN) &amp;&amp;</div><div class='add'>+		    !XGBE_SFP_DIAGS_SUPPORTED(sfp_eeprom))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		data[i] = eeprom_data[j];</div><div class='add'>+		rem--;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+put_mux:</div><div class='add'>+	xgbe_phy_sfp_put_mux(pdata);</div><div class='add'>+</div><div class='add'>+put_own:</div><div class='add'>+	xgbe_phy_put_comm_ownership(pdata);</div><div class='add'>+</div><div class='add'>+done:</div><div class='add'>+	eeprom-&gt;len -= rem;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_module_info(struct xgbe_prv_data *pdata,</div><div class='add'>+				struct ethtool_modinfo *modinfo)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+</div><div class='add'>+	if (phy_data-&gt;port_mode != XGBE_PORT_MODE_SFP)</div><div class='add'>+		return -ENXIO;</div><div class='add'>+</div><div class='add'>+	if (!netif_running(pdata-&gt;netdev))</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	if (phy_data-&gt;sfp_mod_absent)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	if (XGBE_SFP_DIAGS_SUPPORTED(&amp;phy_data-&gt;sfp_eeprom)) {</div><div class='add'>+		modinfo-&gt;type = ETH_MODULE_SFF_8472;</div><div class='add'>+		modinfo-&gt;eeprom_len = ETH_MODULE_SFF_8472_LEN;</div><div class='add'>+	} else {</div><div class='add'>+		modinfo-&gt;type = ETH_MODULE_SFF_8079;</div><div class='add'>+		modinfo-&gt;eeprom_len = ETH_MODULE_SFF_8079_LEN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_phydev_flowctrl(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct ethtool_link_ksettings *lks = &amp;pdata-&gt;phy.lks;</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	u16 lcl_adv = 0, rmt_adv = 0;</div><div class='add'>+	u8 fc;</div><div class='add'>+</div><div class='add'>+	pdata-&gt;phy.tx_pause = 0;</div><div class='add'>+	pdata-&gt;phy.rx_pause = 0;</div><div class='add'>+</div><div class='add'>+	if (!phy_data-&gt;phydev)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	lcl_adv = linkmode_adv_to_lcl_adv_t(phy_data-&gt;phydev-&gt;advertising);</div><div class='add'>+</div><div class='add'>+	if (phy_data-&gt;phydev-&gt;pause) {</div><div class='add'>+		XGBE_SET_LP_ADV(lks, Pause);</div><div class='add'>+		rmt_adv |= LPA_PAUSE_CAP;</div><div class='add'>+	}</div><div class='add'>+	if (phy_data-&gt;phydev-&gt;asym_pause) {</div><div class='add'>+		XGBE_SET_LP_ADV(lks, Asym_Pause);</div><div class='add'>+		rmt_adv |= LPA_PAUSE_ASYM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	fc = mii_resolve_flowctrl_fdx(lcl_adv, rmt_adv);</div><div class='add'>+	if (fc &amp; FLOW_CTRL_TX)</div><div class='add'>+		pdata-&gt;phy.tx_pause = 1;</div><div class='add'>+	if (fc &amp; FLOW_CTRL_RX)</div><div class='add'>+		pdata-&gt;phy.rx_pause = 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum xgbe_mode xgbe_phy_an37_sgmii_outcome(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct ethtool_link_ksettings *lks = &amp;pdata-&gt;phy.lks;</div><div class='add'>+	enum xgbe_mode mode;</div><div class='add'>+</div><div class='add'>+	XGBE_SET_LP_ADV(lks, Autoneg);</div><div class='add'>+	XGBE_SET_LP_ADV(lks, TP);</div><div class='add'>+</div><div class='add'>+	/* Use external PHY to determine flow control */</div><div class='add'>+	if (pdata-&gt;phy.pause_autoneg)</div><div class='add'>+		xgbe_phy_phydev_flowctrl(pdata);</div><div class='add'>+</div><div class='add'>+	switch (pdata-&gt;an_status &amp; XGBE_SGMII_AN_LINK_SPEED) {</div><div class='add'>+	case XGBE_SGMII_AN_LINK_SPEED_10:</div><div class='add'>+		if (pdata-&gt;an_status &amp; XGBE_SGMII_AN_LINK_DUPLEX) {</div><div class='add'>+			XGBE_SET_LP_ADV(lks, 10baseT_Full);</div><div class='add'>+			mode = XGBE_MODE_SGMII_10;</div><div class='add'>+		} else {</div><div class='add'>+			/* Half-duplex not supported */</div><div class='add'>+			XGBE_SET_LP_ADV(lks, 10baseT_Half);</div><div class='add'>+			mode = XGBE_MODE_UNKNOWN;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_SGMII_AN_LINK_SPEED_100:</div><div class='add'>+		if (pdata-&gt;an_status &amp; XGBE_SGMII_AN_LINK_DUPLEX) {</div><div class='add'>+			XGBE_SET_LP_ADV(lks, 100baseT_Full);</div><div class='add'>+			mode = XGBE_MODE_SGMII_100;</div><div class='add'>+		} else {</div><div class='add'>+			/* Half-duplex not supported */</div><div class='add'>+			XGBE_SET_LP_ADV(lks, 100baseT_Half);</div><div class='add'>+			mode = XGBE_MODE_UNKNOWN;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_SGMII_AN_LINK_SPEED_1000:</div><div class='add'>+		if (pdata-&gt;an_status &amp; XGBE_SGMII_AN_LINK_DUPLEX) {</div><div class='add'>+			XGBE_SET_LP_ADV(lks, 1000baseT_Full);</div><div class='add'>+			mode = XGBE_MODE_SGMII_1000;</div><div class='add'>+		} else {</div><div class='add'>+			/* Half-duplex not supported */</div><div class='add'>+			XGBE_SET_LP_ADV(lks, 1000baseT_Half);</div><div class='add'>+			mode = XGBE_MODE_UNKNOWN;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		mode = XGBE_MODE_UNKNOWN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return mode;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum xgbe_mode xgbe_phy_an37_outcome(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct ethtool_link_ksettings *lks = &amp;pdata-&gt;phy.lks;</div><div class='add'>+	enum xgbe_mode mode;</div><div class='add'>+	unsigned int ad_reg, lp_reg;</div><div class='add'>+</div><div class='add'>+	XGBE_SET_LP_ADV(lks, Autoneg);</div><div class='add'>+	XGBE_SET_LP_ADV(lks, FIBRE);</div><div class='add'>+</div><div class='add'>+	/* Compare Advertisement and Link Partner register */</div><div class='add'>+	ad_reg = XMDIO_READ(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_ADVERTISE);</div><div class='add'>+	lp_reg = XMDIO_READ(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_LP_ABILITY);</div><div class='add'>+	if (lp_reg &amp; 0x100)</div><div class='add'>+		XGBE_SET_LP_ADV(lks, Pause);</div><div class='add'>+	if (lp_reg &amp; 0x80)</div><div class='add'>+		XGBE_SET_LP_ADV(lks, Asym_Pause);</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;phy.pause_autoneg) {</div><div class='add'>+		/* Set flow control based on auto-negotiation result */</div><div class='add'>+		pdata-&gt;phy.tx_pause = 0;</div><div class='add'>+		pdata-&gt;phy.rx_pause = 0;</div><div class='add'>+</div><div class='add'>+		if (ad_reg &amp; lp_reg &amp; 0x100) {</div><div class='add'>+			pdata-&gt;phy.tx_pause = 1;</div><div class='add'>+			pdata-&gt;phy.rx_pause = 1;</div><div class='add'>+		} else if (ad_reg &amp; lp_reg &amp; 0x80) {</div><div class='add'>+			if (ad_reg &amp; 0x100)</div><div class='add'>+				pdata-&gt;phy.rx_pause = 1;</div><div class='add'>+			else if (lp_reg &amp; 0x100)</div><div class='add'>+				pdata-&gt;phy.tx_pause = 1;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (lp_reg &amp; 0x20)</div><div class='add'>+		XGBE_SET_LP_ADV(lks, 1000baseX_Full);</div><div class='add'>+</div><div class='add'>+	/* Half duplex is not supported */</div><div class='add'>+	ad_reg &amp;= lp_reg;</div><div class='add'>+	mode = (ad_reg &amp; 0x20) ? XGBE_MODE_X : XGBE_MODE_UNKNOWN;</div><div class='add'>+</div><div class='add'>+	return mode;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum xgbe_mode xgbe_phy_an73_redrv_outcome(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct ethtool_link_ksettings *lks = &amp;pdata-&gt;phy.lks;</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	enum xgbe_mode mode;</div><div class='add'>+	unsigned int ad_reg, lp_reg;</div><div class='add'>+</div><div class='add'>+	XGBE_SET_LP_ADV(lks, Autoneg);</div><div class='add'>+	XGBE_SET_LP_ADV(lks, Backplane);</div><div class='add'>+</div><div class='add'>+	/* Use external PHY to determine flow control */</div><div class='add'>+	if (pdata-&gt;phy.pause_autoneg)</div><div class='add'>+		xgbe_phy_phydev_flowctrl(pdata);</div><div class='add'>+</div><div class='add'>+	/* Compare Advertisement and Link Partner register 2 */</div><div class='add'>+	ad_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 1);</div><div class='add'>+	lp_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_LPA + 1);</div><div class='add'>+	if (lp_reg &amp; 0x80)</div><div class='add'>+		XGBE_SET_LP_ADV(lks, 10000baseKR_Full);</div><div class='add'>+	if (lp_reg &amp; 0x20)</div><div class='add'>+		XGBE_SET_LP_ADV(lks, 1000baseKX_Full);</div><div class='add'>+</div><div class='add'>+	ad_reg &amp;= lp_reg;</div><div class='add'>+	if (ad_reg &amp; 0x80) {</div><div class='add'>+		switch (phy_data-&gt;port_mode) {</div><div class='add'>+		case XGBE_PORT_MODE_BACKPLANE:</div><div class='add'>+		case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:</div><div class='add'>+			mode = XGBE_MODE_KR;</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			mode = XGBE_MODE_SFI;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	} else if (ad_reg &amp; 0x20) {</div><div class='add'>+		switch (phy_data-&gt;port_mode) {</div><div class='add'>+		case XGBE_PORT_MODE_BACKPLANE:</div><div class='add'>+		case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:</div><div class='add'>+			mode = XGBE_MODE_KX_1000;</div><div class='add'>+			break;</div><div class='add'>+		case XGBE_PORT_MODE_1000BASE_X:</div><div class='add'>+			mode = XGBE_MODE_X;</div><div class='add'>+			break;</div><div class='add'>+		case XGBE_PORT_MODE_SFP:</div><div class='add'>+			switch (phy_data-&gt;sfp_base) {</div><div class='add'>+			case XGBE_SFP_BASE_1000_T:</div><div class='add'>+				if (phy_data-&gt;phydev &amp;&amp;</div><div class='add'>+				    (phy_data-&gt;phydev-&gt;speed == SPEED_10))</div><div class='add'>+					mode = XGBE_MODE_SGMII_10;</div><div class='add'>+				else if (phy_data-&gt;phydev &amp;&amp;</div><div class='add'>+					 (phy_data-&gt;phydev-&gt;speed == SPEED_100))</div><div class='add'>+					mode = XGBE_MODE_SGMII_100;</div><div class='add'>+				else</div><div class='add'>+					mode = XGBE_MODE_SGMII_1000;</div><div class='add'>+				break;</div><div class='add'>+			case XGBE_SFP_BASE_1000_SX:</div><div class='add'>+			case XGBE_SFP_BASE_1000_LX:</div><div class='add'>+			case XGBE_SFP_BASE_1000_CX:</div><div class='add'>+			default:</div><div class='add'>+				mode = XGBE_MODE_X;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			if (phy_data-&gt;phydev &amp;&amp;</div><div class='add'>+			    (phy_data-&gt;phydev-&gt;speed == SPEED_10))</div><div class='add'>+				mode = XGBE_MODE_SGMII_10;</div><div class='add'>+			else if (phy_data-&gt;phydev &amp;&amp;</div><div class='add'>+				 (phy_data-&gt;phydev-&gt;speed == SPEED_100))</div><div class='add'>+				mode = XGBE_MODE_SGMII_100;</div><div class='add'>+			else</div><div class='add'>+				mode = XGBE_MODE_SGMII_1000;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		mode = XGBE_MODE_UNKNOWN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Compare Advertisement and Link Partner register 3 */</div><div class='add'>+	ad_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 2);</div><div class='add'>+	lp_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_LPA + 2);</div><div class='add'>+	if (lp_reg &amp; 0xc000)</div><div class='add'>+		XGBE_SET_LP_ADV(lks, 10000baseR_FEC);</div><div class='add'>+</div><div class='add'>+	return mode;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum xgbe_mode xgbe_phy_an73_outcome(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct ethtool_link_ksettings *lks = &amp;pdata-&gt;phy.lks;</div><div class='add'>+	enum xgbe_mode mode;</div><div class='add'>+	unsigned int ad_reg, lp_reg;</div><div class='add'>+</div><div class='add'>+	XGBE_SET_LP_ADV(lks, Autoneg);</div><div class='add'>+	XGBE_SET_LP_ADV(lks, Backplane);</div><div class='add'>+</div><div class='add'>+	/* Compare Advertisement and Link Partner register 1 */</div><div class='add'>+	ad_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE);</div><div class='add'>+	lp_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_LPA);</div><div class='add'>+	if (lp_reg &amp; 0x400)</div><div class='add'>+		XGBE_SET_LP_ADV(lks, Pause);</div><div class='add'>+	if (lp_reg &amp; 0x800)</div><div class='add'>+		XGBE_SET_LP_ADV(lks, Asym_Pause);</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;phy.pause_autoneg) {</div><div class='add'>+		/* Set flow control based on auto-negotiation result */</div><div class='add'>+		pdata-&gt;phy.tx_pause = 0;</div><div class='add'>+		pdata-&gt;phy.rx_pause = 0;</div><div class='add'>+</div><div class='add'>+		if (ad_reg &amp; lp_reg &amp; 0x400) {</div><div class='add'>+			pdata-&gt;phy.tx_pause = 1;</div><div class='add'>+			pdata-&gt;phy.rx_pause = 1;</div><div class='add'>+		} else if (ad_reg &amp; lp_reg &amp; 0x800) {</div><div class='add'>+			if (ad_reg &amp; 0x400)</div><div class='add'>+				pdata-&gt;phy.rx_pause = 1;</div><div class='add'>+			else if (lp_reg &amp; 0x400)</div><div class='add'>+				pdata-&gt;phy.tx_pause = 1;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Compare Advertisement and Link Partner register 2 */</div><div class='add'>+	ad_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 1);</div><div class='add'>+	lp_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_LPA + 1);</div><div class='add'>+	if (lp_reg &amp; 0x80)</div><div class='add'>+		XGBE_SET_LP_ADV(lks, 10000baseKR_Full);</div><div class='add'>+	if (lp_reg &amp; 0x20)</div><div class='add'>+		XGBE_SET_LP_ADV(lks, 1000baseKX_Full);</div><div class='add'>+</div><div class='add'>+	ad_reg &amp;= lp_reg;</div><div class='add'>+	if (ad_reg &amp; 0x80)</div><div class='add'>+		mode = XGBE_MODE_KR;</div><div class='add'>+	else if (ad_reg &amp; 0x20)</div><div class='add'>+		mode = XGBE_MODE_KX_1000;</div><div class='add'>+	else</div><div class='add'>+		mode = XGBE_MODE_UNKNOWN;</div><div class='add'>+</div><div class='add'>+	/* Compare Advertisement and Link Partner register 3 */</div><div class='add'>+	ad_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 2);</div><div class='add'>+	lp_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_LPA + 2);</div><div class='add'>+	if (lp_reg &amp; 0xc000)</div><div class='add'>+		XGBE_SET_LP_ADV(lks, 10000baseR_FEC);</div><div class='add'>+</div><div class='add'>+	return mode;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum xgbe_mode xgbe_phy_an_outcome(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	switch (pdata-&gt;an_mode) {</div><div class='add'>+	case XGBE_AN_MODE_CL73:</div><div class='add'>+		return xgbe_phy_an73_outcome(pdata);</div><div class='add'>+	case XGBE_AN_MODE_CL73_REDRV:</div><div class='add'>+		return xgbe_phy_an73_redrv_outcome(pdata);</div><div class='add'>+	case XGBE_AN_MODE_CL37:</div><div class='add'>+		return xgbe_phy_an37_outcome(pdata);</div><div class='add'>+	case XGBE_AN_MODE_CL37_SGMII:</div><div class='add'>+		return xgbe_phy_an37_sgmii_outcome(pdata);</div><div class='add'>+	default:</div><div class='add'>+		return XGBE_MODE_UNKNOWN;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_an_advertising(struct xgbe_prv_data *pdata,</div><div class='add'>+				    struct ethtool_link_ksettings *dlks)</div><div class='add'>+{</div><div class='add'>+	struct ethtool_link_ksettings *slks = &amp;pdata-&gt;phy.lks;</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+</div><div class='add'>+	XGBE_LM_COPY(dlks, advertising, slks, advertising);</div><div class='add'>+</div><div class='add'>+	/* Without a re-driver, just return current advertising */</div><div class='add'>+	if (!phy_data-&gt;redrv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	/* With the KR re-driver we need to advertise a single speed */</div><div class='add'>+	XGBE_CLR_ADV(dlks, 1000baseKX_Full);</div><div class='add'>+	XGBE_CLR_ADV(dlks, 10000baseKR_Full);</div><div class='add'>+</div><div class='add'>+	/* Advertise FEC support is present */</div><div class='add'>+	if (pdata-&gt;fec_ability &amp; MDIO_PMA_10GBR_FECABLE_ABLE)</div><div class='add'>+		XGBE_SET_ADV(dlks, 10000baseR_FEC);</div><div class='add'>+</div><div class='add'>+	switch (phy_data-&gt;port_mode) {</div><div class='add'>+	case XGBE_PORT_MODE_BACKPLANE:</div><div class='add'>+	case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:</div><div class='add'>+		XGBE_SET_ADV(dlks, 10000baseKR_Full);</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_PORT_MODE_BACKPLANE_2500:</div><div class='add'>+		XGBE_SET_ADV(dlks, 1000baseKX_Full);</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_PORT_MODE_1000BASE_T:</div><div class='add'>+	case XGBE_PORT_MODE_1000BASE_X:</div><div class='add'>+	case XGBE_PORT_MODE_NBASE_T:</div><div class='add'>+		XGBE_SET_ADV(dlks, 1000baseKX_Full);</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_PORT_MODE_10GBASE_T:</div><div class='add'>+		if (phy_data-&gt;phydev &amp;&amp;</div><div class='add'>+		    (phy_data-&gt;phydev-&gt;speed == SPEED_10000))</div><div class='add'>+			XGBE_SET_ADV(dlks, 10000baseKR_Full);</div><div class='add'>+		else if (phy_data-&gt;phydev &amp;&amp;</div><div class='add'>+			 (phy_data-&gt;phydev-&gt;speed == SPEED_2500))</div><div class='add'>+			XGBE_SET_ADV(dlks, 2500baseX_Full);</div><div class='add'>+		else</div><div class='add'>+			XGBE_SET_ADV(dlks, 1000baseKX_Full);</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_PORT_MODE_10GBASE_R:</div><div class='add'>+		XGBE_SET_ADV(dlks, 10000baseKR_Full);</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_PORT_MODE_SFP:</div><div class='add'>+		switch (phy_data-&gt;sfp_base) {</div><div class='add'>+		case XGBE_SFP_BASE_1000_T:</div><div class='add'>+		case XGBE_SFP_BASE_1000_SX:</div><div class='add'>+		case XGBE_SFP_BASE_1000_LX:</div><div class='add'>+		case XGBE_SFP_BASE_1000_CX:</div><div class='add'>+			XGBE_SET_ADV(dlks, 1000baseKX_Full);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			XGBE_SET_ADV(dlks, 10000baseKR_Full);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		XGBE_SET_ADV(dlks, 10000baseKR_Full);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_an_config(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct ethtool_link_ksettings *lks = &amp;pdata-&gt;phy.lks;</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = xgbe_phy_find_phy_device(pdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (!phy_data-&gt;phydev)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	phy_data-&gt;phydev-&gt;autoneg = pdata-&gt;phy.autoneg;</div><div class='add'>+	linkmode_and(phy_data-&gt;phydev-&gt;advertising,</div><div class='add'>+		     phy_data-&gt;phydev-&gt;supported,</div><div class='add'>+		     lks-&gt;link_modes.advertising);</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;phy.autoneg != AUTONEG_ENABLE) {</div><div class='add'>+		phy_data-&gt;phydev-&gt;speed = pdata-&gt;phy.speed;</div><div class='add'>+		phy_data-&gt;phydev-&gt;duplex = pdata-&gt;phy.duplex;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = phy_start_aneg(phy_data-&gt;phydev);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum xgbe_an_mode xgbe_phy_an_sfp_mode(struct xgbe_phy_data *phy_data)</div><div class='add'>+{</div><div class='add'>+	switch (phy_data-&gt;sfp_base) {</div><div class='add'>+	case XGBE_SFP_BASE_1000_T:</div><div class='add'>+		return XGBE_AN_MODE_CL37_SGMII;</div><div class='add'>+	case XGBE_SFP_BASE_1000_SX:</div><div class='add'>+	case XGBE_SFP_BASE_1000_LX:</div><div class='add'>+	case XGBE_SFP_BASE_1000_CX:</div><div class='add'>+		return XGBE_AN_MODE_CL37;</div><div class='add'>+	default:</div><div class='add'>+		return XGBE_AN_MODE_NONE;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum xgbe_an_mode xgbe_phy_an_mode(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+</div><div class='add'>+	/* A KR re-driver will always require CL73 AN */</div><div class='add'>+	if (phy_data-&gt;redrv)</div><div class='add'>+		return XGBE_AN_MODE_CL73_REDRV;</div><div class='add'>+</div><div class='add'>+	switch (phy_data-&gt;port_mode) {</div><div class='add'>+	case XGBE_PORT_MODE_BACKPLANE:</div><div class='add'>+		return XGBE_AN_MODE_CL73;</div><div class='add'>+	case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:</div><div class='add'>+	case XGBE_PORT_MODE_BACKPLANE_2500:</div><div class='add'>+		return XGBE_AN_MODE_NONE;</div><div class='add'>+	case XGBE_PORT_MODE_1000BASE_T:</div><div class='add'>+		return XGBE_AN_MODE_CL37_SGMII;</div><div class='add'>+	case XGBE_PORT_MODE_1000BASE_X:</div><div class='add'>+		return XGBE_AN_MODE_CL37;</div><div class='add'>+	case XGBE_PORT_MODE_NBASE_T:</div><div class='add'>+		return XGBE_AN_MODE_CL37_SGMII;</div><div class='add'>+	case XGBE_PORT_MODE_10GBASE_T:</div><div class='add'>+		return XGBE_AN_MODE_CL73;</div><div class='add'>+	case XGBE_PORT_MODE_10GBASE_R:</div><div class='add'>+		return XGBE_AN_MODE_NONE;</div><div class='add'>+	case XGBE_PORT_MODE_SFP:</div><div class='add'>+		return xgbe_phy_an_sfp_mode(phy_data);</div><div class='add'>+	default:</div><div class='add'>+		return XGBE_AN_MODE_NONE;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_set_redrv_mode_mdio(struct xgbe_prv_data *pdata,</div><div class='add'>+					enum xgbe_phy_redrv_mode mode)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	u16 redrv_reg, redrv_val;</div><div class='add'>+</div><div class='add'>+	redrv_reg = XGBE_PHY_REDRV_MODE_REG + (phy_data-&gt;redrv_lane * 0x1000);</div><div class='add'>+	redrv_val = (u16)mode;</div><div class='add'>+</div><div class='add'>+	return pdata-&gt;hw_if.write_ext_mii_regs_c22(pdata, phy_data-&gt;redrv_addr,</div><div class='add'>+						   redrv_reg, redrv_val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_set_redrv_mode_i2c(struct xgbe_prv_data *pdata,</div><div class='add'>+				       enum xgbe_phy_redrv_mode mode)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	unsigned int redrv_reg;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Calculate the register to write */</div><div class='add'>+	redrv_reg = XGBE_PHY_REDRV_MODE_REG + (phy_data-&gt;redrv_lane * 0x1000);</div><div class='add'>+</div><div class='add'>+	ret = xgbe_phy_redrv_write(pdata, redrv_reg, mode);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_set_redrv_mode(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	enum xgbe_phy_redrv_mode mode;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!phy_data-&gt;redrv)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mode = XGBE_PHY_REDRV_MODE_CX;</div><div class='add'>+	if ((phy_data-&gt;port_mode == XGBE_PORT_MODE_SFP) &amp;&amp;</div><div class='add'>+	    (phy_data-&gt;sfp_base != XGBE_SFP_BASE_1000_CX) &amp;&amp;</div><div class='add'>+	    (phy_data-&gt;sfp_base != XGBE_SFP_BASE_10000_CR))</div><div class='add'>+		mode = XGBE_PHY_REDRV_MODE_SR;</div><div class='add'>+</div><div class='add'>+	ret = xgbe_phy_get_comm_ownership(pdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (phy_data-&gt;redrv_if)</div><div class='add'>+		xgbe_phy_set_redrv_mode_i2c(pdata, mode);</div><div class='add'>+	else</div><div class='add'>+		xgbe_phy_set_redrv_mode_mdio(pdata, mode);</div><div class='add'>+</div><div class='add'>+	xgbe_phy_put_comm_ownership(pdata);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define MAX_RX_ADAPT_RETRIES		1</div><div class='add'>+#define XGBE_PMA_RX_VAL_SIG_MASK	(XGBE_PMA_RX_SIG_DET_0_MASK | \</div><div class='add'>+					 XGBE_PMA_RX_VALID_0_MASK)</div><div class='add'>+</div><div class='add'>+static void xgbe_set_rx_adap_mode(struct xgbe_prv_data *pdata,</div><div class='add'>+				  enum xgbe_mode mode)</div><div class='add'>+{</div><div class='add'>+	if (pdata-&gt;rx_adapt_retries++ &gt;= MAX_RX_ADAPT_RETRIES) {</div><div class='add'>+		pdata-&gt;rx_adapt_retries = 0;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	xgbe_phy_perform_ratechange(pdata,</div><div class='add'>+				    mode == XGBE_MODE_KR ?</div><div class='add'>+				    XGBE_MB_CMD_SET_10G_KR :</div><div class='add'>+				    XGBE_MB_CMD_SET_10G_SFI,</div><div class='add'>+				    XGBE_MB_SUBCMD_RX_ADAP);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_rx_adaptation(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	unsigned int reg;</div><div class='add'>+</div><div class='add'>+	/* step 2: force PCS to send RX_ADAPT Req to PHY */</div><div class='add'>+	XMDIO_WRITE_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_RX_EQ_CTRL4,</div><div class='add'>+			 XGBE_PMA_RX_AD_REQ_MASK, XGBE_PMA_RX_AD_REQ_ENABLE);</div><div class='add'>+</div><div class='add'>+	/* Step 3: Wait for RX_ADAPT ACK from the PHY */</div><div class='add'>+	msleep(200);</div><div class='add'>+</div><div class='add'>+	/* Software polls for coefficient update command (given by local PHY) */</div><div class='add'>+	reg = XMDIO_READ(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_PHY_RX_EQ_CEU);</div><div class='add'>+</div><div class='add'>+	/* Clear the RX_AD_REQ bit */</div><div class='add'>+	XMDIO_WRITE_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_RX_EQ_CTRL4,</div><div class='add'>+			 XGBE_PMA_RX_AD_REQ_MASK, XGBE_PMA_RX_AD_REQ_DISABLE);</div><div class='add'>+</div><div class='add'>+	/* Check if coefficient update command is set */</div><div class='add'>+	if ((reg &amp; XGBE_PMA_CFF_UPDT_MASK) != XGBE_PMA_CFF_UPDT_MASK)</div><div class='add'>+		goto set_mode;</div><div class='add'>+</div><div class='add'>+	/* Step 4: Check for Block lock */</div><div class='add'>+</div><div class='add'>+	/* Link status is latched low, so read once to clear</div><div class='add'>+	 * and then read again to get current state</div><div class='add'>+	 */</div><div class='add'>+	reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1);</div><div class='add'>+	reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1);</div><div class='add'>+	if (reg &amp; MDIO_STAT1_LSTATUS) {</div><div class='add'>+		/* If the block lock is found, update the helpers</div><div class='add'>+		 * and declare the link up</div><div class='add'>+		 */</div><div class='add'>+		netif_dbg(pdata, link, pdata-&gt;netdev, "Block_lock done");</div><div class='add'>+		pdata-&gt;rx_adapt_done = true;</div><div class='add'>+		pdata-&gt;mode_set = false;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+set_mode:</div><div class='add'>+	xgbe_set_rx_adap_mode(pdata, phy_data-&gt;cur_mode);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_rx_adaptation(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	unsigned int reg;</div><div class='add'>+</div><div class='add'>+rx_adapt_reinit:</div><div class='add'>+	reg = XMDIO_READ_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_RX_LSTS,</div><div class='add'>+			      XGBE_PMA_RX_VAL_SIG_MASK);</div><div class='add'>+</div><div class='add'>+	/* step 1: Check for RX_VALID &amp;&amp; LF_SIGDET */</div><div class='add'>+	if ((reg &amp; XGBE_PMA_RX_VAL_SIG_MASK) != XGBE_PMA_RX_VAL_SIG_MASK) {</div><div class='add'>+		netif_dbg(pdata, link, pdata-&gt;netdev,</div><div class='add'>+			  "RX_VALID or LF_SIGDET is unset, issue rrc");</div><div class='add'>+		xgbe_phy_rrc(pdata);</div><div class='add'>+		if (pdata-&gt;rx_adapt_retries++ &gt;= MAX_RX_ADAPT_RETRIES) {</div><div class='add'>+			pdata-&gt;rx_adapt_retries = 0;</div><div class='add'>+			return;</div><div class='add'>+		}</div><div class='add'>+		goto rx_adapt_reinit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* perform rx adaptation */</div><div class='add'>+	xgbe_rx_adaptation(pdata);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_rx_reset(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	int reg;</div><div class='add'>+</div><div class='add'>+	reg = XMDIO_READ_BITS(pdata, MDIO_MMD_PCS, MDIO_PCS_DIGITAL_STAT,</div><div class='add'>+			      XGBE_PCS_PSEQ_STATE_MASK);</div><div class='add'>+	if (reg == XGBE_PCS_PSEQ_STATE_POWER_GOOD) {</div><div class='add'>+		/* Mailbox command timed out, reset of RX block is required.</div><div class='add'>+		 * This can be done by asseting the reset bit and wait for</div><div class='add'>+		 * its compeletion.</div><div class='add'>+		 */</div><div class='add'>+		XMDIO_WRITE_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_RX_CTRL1,</div><div class='add'>+				 XGBE_PMA_RX_RST_0_MASK, XGBE_PMA_RX_RST_0_RESET_ON);</div><div class='add'>+		ndelay(20);</div><div class='add'>+		XMDIO_WRITE_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_RX_CTRL1,</div><div class='add'>+				 XGBE_PMA_RX_RST_0_MASK, XGBE_PMA_RX_RST_0_RESET_OFF);</div><div class='add'>+		usleep_range(40, 50);</div><div class='add'>+		netif_err(pdata, link, pdata-&gt;netdev, "firmware mailbox reset performed\n");</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_pll_ctrl(struct xgbe_prv_data *pdata, bool enable)</div><div class='add'>+{</div><div class='add'>+	/* PLL_CTRL feature needs to be enabled for fixed PHY modes (Non-Autoneg) only */</div><div class='add'>+	if (pdata-&gt;phy.autoneg != AUTONEG_DISABLE)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	XMDIO_WRITE_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_VEND2_PMA_MISC_CTRL0,</div><div class='add'>+			 XGBE_PMA_PLL_CTRL_MASK,</div><div class='add'>+			 enable ? XGBE_PMA_PLL_CTRL_ENABLE</div><div class='add'>+				: XGBE_PMA_PLL_CTRL_DISABLE);</div><div class='add'>+</div><div class='add'>+	/* Wait for command to complete */</div><div class='add'>+	usleep_range(100, 200);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_perform_ratechange(struct xgbe_prv_data *pdata,</div><div class='add'>+					enum xgbe_mb_cmd cmd, enum xgbe_mb_subcmd sub_cmd)</div><div class='add'>+{</div><div class='add'>+	unsigned int s0 = 0;</div><div class='add'>+	unsigned int wait;</div><div class='add'>+</div><div class='add'>+	/* Disable PLL re-initialization during FW command processing */</div><div class='add'>+	xgbe_phy_pll_ctrl(pdata, false);</div><div class='add'>+</div><div class='add'>+	/* Log if a previous command did not complete */</div><div class='add'>+	if (XP_IOREAD_BITS(pdata, XP_DRIVER_INT_RO, STATUS)) {</div><div class='add'>+		netif_dbg(pdata, link, pdata-&gt;netdev,</div><div class='add'>+			  "firmware mailbox not ready for command\n");</div><div class='add'>+		xgbe_phy_rx_reset(pdata);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Construct the command */</div><div class='add'>+	XP_SET_BITS(s0, XP_DRIVER_SCRATCH_0, COMMAND, cmd);</div><div class='add'>+	XP_SET_BITS(s0, XP_DRIVER_SCRATCH_0, SUB_COMMAND, sub_cmd);</div><div class='add'>+</div><div class='add'>+	/* Issue the command */</div><div class='add'>+	XP_IOWRITE(pdata, XP_DRIVER_SCRATCH_0, s0);</div><div class='add'>+	XP_IOWRITE(pdata, XP_DRIVER_SCRATCH_1, 0);</div><div class='add'>+	XP_IOWRITE_BITS(pdata, XP_DRIVER_INT_REQ, REQUEST, 1);</div><div class='add'>+</div><div class='add'>+	/* Wait for command to complete */</div><div class='add'>+	wait = XGBE_RATECHANGE_COUNT;</div><div class='add'>+	while (wait--) {</div><div class='add'>+		if (!XP_IOREAD_BITS(pdata, XP_DRIVER_INT_RO, STATUS))</div><div class='add'>+			goto do_rx_adaptation;</div><div class='add'>+</div><div class='add'>+		usleep_range(1000, 2000);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netif_dbg(pdata, link, pdata-&gt;netdev,</div><div class='add'>+		  "firmware mailbox command did not complete\n");</div><div class='add'>+</div><div class='add'>+	/* Reset on error */</div><div class='add'>+	xgbe_phy_rx_reset(pdata);</div><div class='add'>+	goto reenable_pll;</div><div class='add'>+</div><div class='add'>+do_rx_adaptation:</div><div class='add'>+	if (pdata-&gt;en_rx_adap &amp;&amp; sub_cmd == XGBE_MB_SUBCMD_RX_ADAP &amp;&amp;</div><div class='add'>+	    (cmd == XGBE_MB_CMD_SET_10G_KR || cmd == XGBE_MB_CMD_SET_10G_SFI)) {</div><div class='add'>+		netif_dbg(pdata, link, pdata-&gt;netdev,</div><div class='add'>+			  "Enabling RX adaptation\n");</div><div class='add'>+		pdata-&gt;mode_set = true;</div><div class='add'>+		xgbe_phy_rx_adaptation(pdata);</div><div class='add'>+		/* return from here to avoid enabling PLL ctrl</div><div class='add'>+		 * during adaptation phase</div><div class='add'>+		 */</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+reenable_pll:</div><div class='add'>+	/* Enable PLL re-initialization, not needed for PHY Power Off and RRC cmds */</div><div class='add'>+	if (cmd != XGBE_MB_CMD_POWER_OFF &amp;&amp;</div><div class='add'>+	    cmd != XGBE_MB_CMD_RRC)</div><div class='add'>+		xgbe_phy_pll_ctrl(pdata, true);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_rrc(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	/* Receiver Reset Cycle */</div><div class='add'>+	xgbe_phy_perform_ratechange(pdata, XGBE_MB_CMD_RRC, XGBE_MB_SUBCMD_NONE);</div><div class='add'>+</div><div class='add'>+	netif_dbg(pdata, link, pdata-&gt;netdev, "receiver reset complete\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_power_off(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+</div><div class='add'>+	/* Power off */</div><div class='add'>+	xgbe_phy_perform_ratechange(pdata, XGBE_MB_CMD_POWER_OFF, XGBE_MB_SUBCMD_NONE);</div><div class='add'>+</div><div class='add'>+	phy_data-&gt;cur_mode = XGBE_MODE_UNKNOWN;</div><div class='add'>+</div><div class='add'>+	netif_dbg(pdata, link, pdata-&gt;netdev, "phy powered off\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool enable_rx_adap(struct xgbe_prv_data *pdata, enum xgbe_mode mode)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	unsigned int ver;</div><div class='add'>+</div><div class='add'>+	/* Rx-Adaptation is not supported on older platforms(&lt; 0x30H) */</div><div class='add'>+	ver = XGMAC_GET_BITS(pdata-&gt;hw_feat.version, MAC_VR, SNPSVER);</div><div class='add'>+	if (ver &lt; 0x30)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* Re-driver models 4223 &amp;&amp; 4227 do not support Rx-Adaptation */</div><div class='add'>+	if (phy_data-&gt;redrv &amp;&amp;</div><div class='add'>+	    (phy_data-&gt;redrv_model == XGBE_PHY_REDRV_MODEL_4223 ||</div><div class='add'>+	     phy_data-&gt;redrv_model == XGBE_PHY_REDRV_MODEL_4227))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	/* 10G KR mode with AN does not support Rx-Adaptation */</div><div class='add'>+	if (mode == XGBE_MODE_KR &amp;&amp;</div><div class='add'>+	    phy_data-&gt;port_mode != XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	pdata-&gt;en_rx_adap = 1;</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_sfi_mode(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+</div><div class='add'>+	xgbe_phy_set_redrv_mode(pdata);</div><div class='add'>+</div><div class='add'>+	/* 10G/SFI */</div><div class='add'>+	if (phy_data-&gt;sfp_cable != XGBE_SFP_CABLE_PASSIVE) {</div><div class='add'>+		pdata-&gt;en_rx_adap = 0;</div><div class='add'>+		xgbe_phy_perform_ratechange(pdata, XGBE_MB_CMD_SET_10G_SFI, XGBE_MB_SUBCMD_ACTIVE);</div><div class='add'>+	} else if ((phy_data-&gt;sfp_cable == XGBE_SFP_CABLE_PASSIVE) &amp;&amp;</div><div class='add'>+		   (enable_rx_adap(pdata, XGBE_MODE_SFI))) {</div><div class='add'>+		xgbe_phy_perform_ratechange(pdata, XGBE_MB_CMD_SET_10G_SFI,</div><div class='add'>+					    XGBE_MB_SUBCMD_RX_ADAP);</div><div class='add'>+	} else {</div><div class='add'>+		if (phy_data-&gt;sfp_cable_len &lt;= 1)</div><div class='add'>+			xgbe_phy_perform_ratechange(pdata, XGBE_MB_CMD_SET_10G_SFI,</div><div class='add'>+						    XGBE_MB_SUBCMD_PASSIVE_1M);</div><div class='add'>+		else if (phy_data-&gt;sfp_cable_len &lt;= 3)</div><div class='add'>+			xgbe_phy_perform_ratechange(pdata, XGBE_MB_CMD_SET_10G_SFI,</div><div class='add'>+						    XGBE_MB_SUBCMD_PASSIVE_3M);</div><div class='add'>+		else</div><div class='add'>+			xgbe_phy_perform_ratechange(pdata, XGBE_MB_CMD_SET_10G_SFI,</div><div class='add'>+						    XGBE_MB_SUBCMD_PASSIVE_OTHER);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	phy_data-&gt;cur_mode = XGBE_MODE_SFI;</div><div class='add'>+</div><div class='add'>+	netif_dbg(pdata, link, pdata-&gt;netdev, "10GbE SFI mode set\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_x_mode(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+</div><div class='add'>+	xgbe_phy_set_redrv_mode(pdata);</div><div class='add'>+</div><div class='add'>+	/* 1G/X */</div><div class='add'>+	xgbe_phy_perform_ratechange(pdata, XGBE_MB_CMD_SET_1G, XGBE_MB_SUBCMD_1G_KX);</div><div class='add'>+</div><div class='add'>+	phy_data-&gt;cur_mode = XGBE_MODE_X;</div><div class='add'>+</div><div class='add'>+	netif_dbg(pdata, link, pdata-&gt;netdev, "1GbE X mode set\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_sgmii_1000_mode(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+</div><div class='add'>+	xgbe_phy_set_redrv_mode(pdata);</div><div class='add'>+</div><div class='add'>+	/* 1G/SGMII */</div><div class='add'>+	xgbe_phy_perform_ratechange(pdata, XGBE_MB_CMD_SET_1G, XGBE_MB_SUBCMD_1G_SGMII);</div><div class='add'>+</div><div class='add'>+	phy_data-&gt;cur_mode = XGBE_MODE_SGMII_1000;</div><div class='add'>+</div><div class='add'>+	netif_dbg(pdata, link, pdata-&gt;netdev, "1GbE SGMII mode set\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_sgmii_100_mode(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+</div><div class='add'>+	xgbe_phy_set_redrv_mode(pdata);</div><div class='add'>+</div><div class='add'>+	/* 100M/SGMII */</div><div class='add'>+	xgbe_phy_perform_ratechange(pdata, XGBE_MB_CMD_SET_1G, XGBE_MB_SUBCMD_100MBITS);</div><div class='add'>+</div><div class='add'>+	phy_data-&gt;cur_mode = XGBE_MODE_SGMII_100;</div><div class='add'>+</div><div class='add'>+	netif_dbg(pdata, link, pdata-&gt;netdev, "100MbE SGMII mode set\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_sgmii_10_mode(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+</div><div class='add'>+	xgbe_phy_set_redrv_mode(pdata);</div><div class='add'>+</div><div class='add'>+	/* 10M/SGMII */</div><div class='add'>+	xgbe_phy_perform_ratechange(pdata, XGBE_MB_CMD_SET_1G, XGBE_MB_SUBCMD_10MBITS);</div><div class='add'>+</div><div class='add'>+	phy_data-&gt;cur_mode = XGBE_MODE_SGMII_10;</div><div class='add'>+</div><div class='add'>+	netif_dbg(pdata, link, pdata-&gt;netdev, "10MbE SGMII mode set\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_kr_mode(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+</div><div class='add'>+	xgbe_phy_set_redrv_mode(pdata);</div><div class='add'>+</div><div class='add'>+	/* 10G/KR */</div><div class='add'>+	if (enable_rx_adap(pdata, XGBE_MODE_KR))</div><div class='add'>+		xgbe_phy_perform_ratechange(pdata, XGBE_MB_CMD_SET_10G_KR,</div><div class='add'>+					    XGBE_MB_SUBCMD_RX_ADAP);</div><div class='add'>+	else</div><div class='add'>+		xgbe_phy_perform_ratechange(pdata, XGBE_MB_CMD_SET_10G_KR,</div><div class='add'>+					    XGBE_MB_SUBCMD_NONE);</div><div class='add'>+</div><div class='add'>+	phy_data-&gt;cur_mode = XGBE_MODE_KR;</div><div class='add'>+</div><div class='add'>+	netif_dbg(pdata, link, pdata-&gt;netdev, "10GbE KR mode set\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_kx_2500_mode(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+</div><div class='add'>+	xgbe_phy_set_redrv_mode(pdata);</div><div class='add'>+</div><div class='add'>+	/* 2.5G/KX */</div><div class='add'>+	xgbe_phy_perform_ratechange(pdata, XGBE_MB_CMD_SET_2_5G, XGBE_MB_SUBCMD_NONE);</div><div class='add'>+</div><div class='add'>+	phy_data-&gt;cur_mode = XGBE_MODE_KX_2500;</div><div class='add'>+</div><div class='add'>+	netif_dbg(pdata, link, pdata-&gt;netdev, "2.5GbE KX mode set\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_kx_1000_mode(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+</div><div class='add'>+	xgbe_phy_set_redrv_mode(pdata);</div><div class='add'>+</div><div class='add'>+	/* 1G/KX */</div><div class='add'>+	xgbe_phy_perform_ratechange(pdata, XGBE_MB_CMD_SET_1G, XGBE_MB_SUBCMD_1G_KX);</div><div class='add'>+</div><div class='add'>+	phy_data-&gt;cur_mode = XGBE_MODE_KX_1000;</div><div class='add'>+</div><div class='add'>+	netif_dbg(pdata, link, pdata-&gt;netdev, "1GbE KX mode set\n");</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum xgbe_mode xgbe_phy_cur_mode(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+</div><div class='add'>+	return phy_data-&gt;cur_mode;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum xgbe_mode xgbe_phy_switch_baset_mode(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+</div><div class='add'>+	/* No switching if not 10GBase-T */</div><div class='add'>+	if (phy_data-&gt;port_mode != XGBE_PORT_MODE_10GBASE_T)</div><div class='add'>+		return xgbe_phy_cur_mode(pdata);</div><div class='add'>+</div><div class='add'>+	switch (xgbe_phy_cur_mode(pdata)) {</div><div class='add'>+	case XGBE_MODE_SGMII_10:</div><div class='add'>+	case XGBE_MODE_SGMII_100:</div><div class='add'>+	case XGBE_MODE_SGMII_1000:</div><div class='add'>+		return XGBE_MODE_KR;</div><div class='add'>+	case XGBE_MODE_KX_2500:</div><div class='add'>+		return XGBE_MODE_SGMII_1000;</div><div class='add'>+	case XGBE_MODE_KR:</div><div class='add'>+	default:</div><div class='add'>+		return XGBE_MODE_KX_2500;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum xgbe_mode xgbe_phy_switch_bp_2500_mode(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	return XGBE_MODE_KX_2500;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum xgbe_mode xgbe_phy_switch_bp_mode(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	/* If we are in KR switch to KX, and vice-versa */</div><div class='add'>+	switch (xgbe_phy_cur_mode(pdata)) {</div><div class='add'>+	case XGBE_MODE_KX_1000:</div><div class='add'>+		return XGBE_MODE_KR;</div><div class='add'>+	case XGBE_MODE_KR:</div><div class='add'>+	default:</div><div class='add'>+		return XGBE_MODE_KX_1000;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum xgbe_mode xgbe_phy_switch_mode(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+</div><div class='add'>+	switch (phy_data-&gt;port_mode) {</div><div class='add'>+	case XGBE_PORT_MODE_BACKPLANE:</div><div class='add'>+	case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:</div><div class='add'>+		return xgbe_phy_switch_bp_mode(pdata);</div><div class='add'>+	case XGBE_PORT_MODE_BACKPLANE_2500:</div><div class='add'>+		return xgbe_phy_switch_bp_2500_mode(pdata);</div><div class='add'>+	case XGBE_PORT_MODE_1000BASE_T:</div><div class='add'>+	case XGBE_PORT_MODE_NBASE_T:</div><div class='add'>+	case XGBE_PORT_MODE_10GBASE_T:</div><div class='add'>+		return xgbe_phy_switch_baset_mode(pdata);</div><div class='add'>+	case XGBE_PORT_MODE_1000BASE_X:</div><div class='add'>+	case XGBE_PORT_MODE_10GBASE_R:</div><div class='add'>+	case XGBE_PORT_MODE_SFP:</div><div class='add'>+		/* No switching, so just return current mode */</div><div class='add'>+		return xgbe_phy_cur_mode(pdata);</div><div class='add'>+	default:</div><div class='add'>+		return XGBE_MODE_UNKNOWN;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum xgbe_mode xgbe_phy_get_basex_mode(struct xgbe_phy_data *phy_data,</div><div class='add'>+					      int speed)</div><div class='add'>+{</div><div class='add'>+	switch (speed) {</div><div class='add'>+	case SPEED_1000:</div><div class='add'>+		return XGBE_MODE_X;</div><div class='add'>+	case SPEED_10000:</div><div class='add'>+		return XGBE_MODE_KR;</div><div class='add'>+	default:</div><div class='add'>+		return XGBE_MODE_UNKNOWN;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum xgbe_mode xgbe_phy_get_baset_mode(struct xgbe_phy_data *phy_data,</div><div class='add'>+					      int speed)</div><div class='add'>+{</div><div class='add'>+	switch (speed) {</div><div class='add'>+	case SPEED_10:</div><div class='add'>+		return XGBE_MODE_SGMII_10;</div><div class='add'>+	case SPEED_100:</div><div class='add'>+		return XGBE_MODE_SGMII_100;</div><div class='add'>+	case SPEED_1000:</div><div class='add'>+		return XGBE_MODE_SGMII_1000;</div><div class='add'>+	case SPEED_2500:</div><div class='add'>+		return XGBE_MODE_KX_2500;</div><div class='add'>+	case SPEED_10000:</div><div class='add'>+		return XGBE_MODE_KR;</div><div class='add'>+	default:</div><div class='add'>+		return XGBE_MODE_UNKNOWN;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum xgbe_mode xgbe_phy_get_sfp_mode(struct xgbe_phy_data *phy_data,</div><div class='add'>+					    int speed)</div><div class='add'>+{</div><div class='add'>+	switch (speed) {</div><div class='add'>+	case SPEED_10:</div><div class='add'>+		return XGBE_MODE_SGMII_10;</div><div class='add'>+	case SPEED_100:</div><div class='add'>+		return XGBE_MODE_SGMII_100;</div><div class='add'>+	case SPEED_1000:</div><div class='add'>+		if (phy_data-&gt;sfp_base == XGBE_SFP_BASE_1000_T)</div><div class='add'>+			return XGBE_MODE_SGMII_1000;</div><div class='add'>+		else</div><div class='add'>+			return XGBE_MODE_X;</div><div class='add'>+	case SPEED_10000:</div><div class='add'>+	case SPEED_UNKNOWN:</div><div class='add'>+		return XGBE_MODE_SFI;</div><div class='add'>+	default:</div><div class='add'>+		return XGBE_MODE_UNKNOWN;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum xgbe_mode xgbe_phy_get_bp_2500_mode(int speed)</div><div class='add'>+{</div><div class='add'>+	switch (speed) {</div><div class='add'>+	case SPEED_2500:</div><div class='add'>+		return XGBE_MODE_KX_2500;</div><div class='add'>+	default:</div><div class='add'>+		return XGBE_MODE_UNKNOWN;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum xgbe_mode xgbe_phy_get_bp_mode(int speed)</div><div class='add'>+{</div><div class='add'>+	switch (speed) {</div><div class='add'>+	case SPEED_1000:</div><div class='add'>+		return XGBE_MODE_KX_1000;</div><div class='add'>+	case SPEED_10000:</div><div class='add'>+		return XGBE_MODE_KR;</div><div class='add'>+	default:</div><div class='add'>+		return XGBE_MODE_UNKNOWN;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum xgbe_mode xgbe_phy_get_mode(struct xgbe_prv_data *pdata,</div><div class='add'>+					int speed)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+</div><div class='add'>+	switch (phy_data-&gt;port_mode) {</div><div class='add'>+	case XGBE_PORT_MODE_BACKPLANE:</div><div class='add'>+	case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:</div><div class='add'>+		return xgbe_phy_get_bp_mode(speed);</div><div class='add'>+	case XGBE_PORT_MODE_BACKPLANE_2500:</div><div class='add'>+		return xgbe_phy_get_bp_2500_mode(speed);</div><div class='add'>+	case XGBE_PORT_MODE_1000BASE_T:</div><div class='add'>+	case XGBE_PORT_MODE_NBASE_T:</div><div class='add'>+	case XGBE_PORT_MODE_10GBASE_T:</div><div class='add'>+		return xgbe_phy_get_baset_mode(phy_data, speed);</div><div class='add'>+	case XGBE_PORT_MODE_1000BASE_X:</div><div class='add'>+	case XGBE_PORT_MODE_10GBASE_R:</div><div class='add'>+		return xgbe_phy_get_basex_mode(phy_data, speed);</div><div class='add'>+	case XGBE_PORT_MODE_SFP:</div><div class='add'>+		return xgbe_phy_get_sfp_mode(phy_data, speed);</div><div class='add'>+	default:</div><div class='add'>+		return XGBE_MODE_UNKNOWN;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_set_mode(struct xgbe_prv_data *pdata, enum xgbe_mode mode)</div><div class='add'>+{</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case XGBE_MODE_KX_1000:</div><div class='add'>+		xgbe_phy_kx_1000_mode(pdata);</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_MODE_KX_2500:</div><div class='add'>+		xgbe_phy_kx_2500_mode(pdata);</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_MODE_KR:</div><div class='add'>+		xgbe_phy_kr_mode(pdata);</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_MODE_SGMII_10:</div><div class='add'>+		xgbe_phy_sgmii_10_mode(pdata);</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_MODE_SGMII_100:</div><div class='add'>+		xgbe_phy_sgmii_100_mode(pdata);</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_MODE_SGMII_1000:</div><div class='add'>+		xgbe_phy_sgmii_1000_mode(pdata);</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_MODE_X:</div><div class='add'>+		xgbe_phy_x_mode(pdata);</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_MODE_SFI:</div><div class='add'>+		xgbe_phy_sfi_mode(pdata);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool xgbe_phy_check_mode(struct xgbe_prv_data *pdata,</div><div class='add'>+				enum xgbe_mode mode, bool advert)</div><div class='add'>+{</div><div class='add'>+	if (pdata-&gt;phy.autoneg == AUTONEG_ENABLE) {</div><div class='add'>+		return advert;</div><div class='add'>+	} else {</div><div class='add'>+		enum xgbe_mode cur_mode;</div><div class='add'>+</div><div class='add'>+		cur_mode = xgbe_phy_get_mode(pdata, pdata-&gt;phy.speed);</div><div class='add'>+		if (cur_mode == mode)</div><div class='add'>+			return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool xgbe_phy_use_basex_mode(struct xgbe_prv_data *pdata,</div><div class='add'>+				    enum xgbe_mode mode)</div><div class='add'>+{</div><div class='add'>+	struct ethtool_link_ksettings *lks = &amp;pdata-&gt;phy.lks;</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case XGBE_MODE_X:</div><div class='add'>+		return xgbe_phy_check_mode(pdata, mode,</div><div class='add'>+					   XGBE_ADV(lks, 1000baseX_Full));</div><div class='add'>+	case XGBE_MODE_KR:</div><div class='add'>+		return xgbe_phy_check_mode(pdata, mode,</div><div class='add'>+					   XGBE_ADV(lks, 10000baseKR_Full));</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool xgbe_phy_use_baset_mode(struct xgbe_prv_data *pdata,</div><div class='add'>+				    enum xgbe_mode mode)</div><div class='add'>+{</div><div class='add'>+	struct ethtool_link_ksettings *lks = &amp;pdata-&gt;phy.lks;</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case XGBE_MODE_SGMII_10:</div><div class='add'>+		return xgbe_phy_check_mode(pdata, mode,</div><div class='add'>+					   XGBE_ADV(lks, 10baseT_Full));</div><div class='add'>+	case XGBE_MODE_SGMII_100:</div><div class='add'>+		return xgbe_phy_check_mode(pdata, mode,</div><div class='add'>+					   XGBE_ADV(lks, 100baseT_Full));</div><div class='add'>+	case XGBE_MODE_SGMII_1000:</div><div class='add'>+		return xgbe_phy_check_mode(pdata, mode,</div><div class='add'>+					   XGBE_ADV(lks, 1000baseT_Full));</div><div class='add'>+	case XGBE_MODE_KX_2500:</div><div class='add'>+		return xgbe_phy_check_mode(pdata, mode,</div><div class='add'>+					   XGBE_ADV(lks, 2500baseT_Full));</div><div class='add'>+	case XGBE_MODE_KR:</div><div class='add'>+		return xgbe_phy_check_mode(pdata, mode,</div><div class='add'>+					   XGBE_ADV(lks, 10000baseT_Full));</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool xgbe_phy_use_sfp_mode(struct xgbe_prv_data *pdata,</div><div class='add'>+				  enum xgbe_mode mode)</div><div class='add'>+{</div><div class='add'>+	struct ethtool_link_ksettings *lks = &amp;pdata-&gt;phy.lks;</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case XGBE_MODE_X:</div><div class='add'>+		if (phy_data-&gt;sfp_base == XGBE_SFP_BASE_1000_T)</div><div class='add'>+			return false;</div><div class='add'>+		return xgbe_phy_check_mode(pdata, mode,</div><div class='add'>+					   XGBE_ADV(lks, 1000baseX_Full));</div><div class='add'>+	case XGBE_MODE_SGMII_10:</div><div class='add'>+		if (phy_data-&gt;sfp_base != XGBE_SFP_BASE_1000_T)</div><div class='add'>+			return false;</div><div class='add'>+		return xgbe_phy_check_mode(pdata, mode,</div><div class='add'>+					   XGBE_ADV(lks, 10baseT_Full));</div><div class='add'>+	case XGBE_MODE_SGMII_100:</div><div class='add'>+		if (phy_data-&gt;sfp_base != XGBE_SFP_BASE_1000_T)</div><div class='add'>+			return false;</div><div class='add'>+		return xgbe_phy_check_mode(pdata, mode,</div><div class='add'>+					   XGBE_ADV(lks, 100baseT_Full));</div><div class='add'>+	case XGBE_MODE_SGMII_1000:</div><div class='add'>+		if (phy_data-&gt;sfp_base != XGBE_SFP_BASE_1000_T)</div><div class='add'>+			return false;</div><div class='add'>+		return xgbe_phy_check_mode(pdata, mode,</div><div class='add'>+					   XGBE_ADV(lks, 1000baseT_Full));</div><div class='add'>+	case XGBE_MODE_SFI:</div><div class='add'>+		if (phy_data-&gt;sfp_mod_absent)</div><div class='add'>+			return true;</div><div class='add'>+		return xgbe_phy_check_mode(pdata, mode,</div><div class='add'>+					   XGBE_ADV(lks, 10000baseSR_Full)  ||</div><div class='add'>+					   XGBE_ADV(lks, 10000baseLR_Full)  ||</div><div class='add'>+					   XGBE_ADV(lks, 10000baseLRM_Full) ||</div><div class='add'>+					   XGBE_ADV(lks, 10000baseER_Full)  ||</div><div class='add'>+					   XGBE_ADV(lks, 10000baseCR_Full));</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool xgbe_phy_use_bp_2500_mode(struct xgbe_prv_data *pdata,</div><div class='add'>+				      enum xgbe_mode mode)</div><div class='add'>+{</div><div class='add'>+	struct ethtool_link_ksettings *lks = &amp;pdata-&gt;phy.lks;</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case XGBE_MODE_KX_2500:</div><div class='add'>+		return xgbe_phy_check_mode(pdata, mode,</div><div class='add'>+					   XGBE_ADV(lks, 2500baseX_Full));</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool xgbe_phy_use_bp_mode(struct xgbe_prv_data *pdata,</div><div class='add'>+				 enum xgbe_mode mode)</div><div class='add'>+{</div><div class='add'>+	struct ethtool_link_ksettings *lks = &amp;pdata-&gt;phy.lks;</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case XGBE_MODE_KX_1000:</div><div class='add'>+		return xgbe_phy_check_mode(pdata, mode,</div><div class='add'>+					   XGBE_ADV(lks, 1000baseKX_Full));</div><div class='add'>+	case XGBE_MODE_KR:</div><div class='add'>+		return xgbe_phy_check_mode(pdata, mode,</div><div class='add'>+					   XGBE_ADV(lks, 10000baseKR_Full));</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool xgbe_phy_use_mode(struct xgbe_prv_data *pdata, enum xgbe_mode mode)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+</div><div class='add'>+	switch (phy_data-&gt;port_mode) {</div><div class='add'>+	case XGBE_PORT_MODE_BACKPLANE:</div><div class='add'>+	case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:</div><div class='add'>+		return xgbe_phy_use_bp_mode(pdata, mode);</div><div class='add'>+	case XGBE_PORT_MODE_BACKPLANE_2500:</div><div class='add'>+		return xgbe_phy_use_bp_2500_mode(pdata, mode);</div><div class='add'>+	case XGBE_PORT_MODE_1000BASE_T:</div><div class='add'>+	case XGBE_PORT_MODE_NBASE_T:</div><div class='add'>+	case XGBE_PORT_MODE_10GBASE_T:</div><div class='add'>+		return xgbe_phy_use_baset_mode(pdata, mode);</div><div class='add'>+	case XGBE_PORT_MODE_1000BASE_X:</div><div class='add'>+	case XGBE_PORT_MODE_10GBASE_R:</div><div class='add'>+		return xgbe_phy_use_basex_mode(pdata, mode);</div><div class='add'>+	case XGBE_PORT_MODE_SFP:</div><div class='add'>+		return xgbe_phy_use_sfp_mode(pdata, mode);</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool xgbe_phy_valid_speed_basex_mode(struct xgbe_phy_data *phy_data,</div><div class='add'>+					    int speed)</div><div class='add'>+{</div><div class='add'>+	switch (speed) {</div><div class='add'>+	case SPEED_1000:</div><div class='add'>+		return (phy_data-&gt;port_mode == XGBE_PORT_MODE_1000BASE_X);</div><div class='add'>+	case SPEED_10000:</div><div class='add'>+		return (phy_data-&gt;port_mode == XGBE_PORT_MODE_10GBASE_R);</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool xgbe_phy_valid_speed_baset_mode(struct xgbe_prv_data *pdata,</div><div class='add'>+					    int speed)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	unsigned int ver;</div><div class='add'>+</div><div class='add'>+	switch (speed) {</div><div class='add'>+	case SPEED_10:</div><div class='add'>+		/* Supported in ver 21H and ver &gt;= 30H */</div><div class='add'>+		ver = XGMAC_GET_BITS(pdata-&gt;hw_feat.version, MAC_VR, SNPSVER);</div><div class='add'>+		return (ver == 0x21 || ver &gt;= 0x30);</div><div class='add'>+	case SPEED_100:</div><div class='add'>+	case SPEED_1000:</div><div class='add'>+		return true;</div><div class='add'>+	case SPEED_2500:</div><div class='add'>+		return ((phy_data-&gt;port_mode == XGBE_PORT_MODE_10GBASE_T) ||</div><div class='add'>+			(phy_data-&gt;port_mode == XGBE_PORT_MODE_NBASE_T));</div><div class='add'>+	case SPEED_10000:</div><div class='add'>+		return (phy_data-&gt;port_mode == XGBE_PORT_MODE_10GBASE_T);</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool xgbe_phy_valid_speed_sfp_mode(struct xgbe_prv_data *pdata,</div><div class='add'>+					  int speed)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	unsigned int ver;</div><div class='add'>+</div><div class='add'>+	switch (speed) {</div><div class='add'>+	case SPEED_10:</div><div class='add'>+		/* Supported in ver 21H and ver &gt;= 30H */</div><div class='add'>+		ver = XGMAC_GET_BITS(pdata-&gt;hw_feat.version, MAC_VR, SNPSVER);</div><div class='add'>+		return ((ver == 0x21 || ver &gt;= 0x30) &amp;&amp;</div><div class='add'>+			(phy_data-&gt;sfp_speed == XGBE_SFP_SPEED_100_1000));</div><div class='add'>+	case SPEED_100:</div><div class='add'>+		return (phy_data-&gt;sfp_speed == XGBE_SFP_SPEED_100_1000);</div><div class='add'>+	case SPEED_1000:</div><div class='add'>+		return ((phy_data-&gt;sfp_speed == XGBE_SFP_SPEED_100_1000) ||</div><div class='add'>+			(phy_data-&gt;sfp_speed == XGBE_SFP_SPEED_1000));</div><div class='add'>+	case SPEED_10000:</div><div class='add'>+		return (phy_data-&gt;sfp_speed == XGBE_SFP_SPEED_10000);</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool xgbe_phy_valid_speed_bp_2500_mode(int speed)</div><div class='add'>+{</div><div class='add'>+	switch (speed) {</div><div class='add'>+	case SPEED_2500:</div><div class='add'>+		return true;</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool xgbe_phy_valid_speed_bp_mode(int speed)</div><div class='add'>+{</div><div class='add'>+	switch (speed) {</div><div class='add'>+	case SPEED_1000:</div><div class='add'>+	case SPEED_10000:</div><div class='add'>+		return true;</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool xgbe_phy_valid_speed(struct xgbe_prv_data *pdata, int speed)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+</div><div class='add'>+	switch (phy_data-&gt;port_mode) {</div><div class='add'>+	case XGBE_PORT_MODE_BACKPLANE:</div><div class='add'>+	case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:</div><div class='add'>+		return xgbe_phy_valid_speed_bp_mode(speed);</div><div class='add'>+	case XGBE_PORT_MODE_BACKPLANE_2500:</div><div class='add'>+		return xgbe_phy_valid_speed_bp_2500_mode(speed);</div><div class='add'>+	case XGBE_PORT_MODE_1000BASE_T:</div><div class='add'>+	case XGBE_PORT_MODE_NBASE_T:</div><div class='add'>+	case XGBE_PORT_MODE_10GBASE_T:</div><div class='add'>+		return xgbe_phy_valid_speed_baset_mode(pdata, speed);</div><div class='add'>+	case XGBE_PORT_MODE_1000BASE_X:</div><div class='add'>+	case XGBE_PORT_MODE_10GBASE_R:</div><div class='add'>+		return xgbe_phy_valid_speed_basex_mode(phy_data, speed);</div><div class='add'>+	case XGBE_PORT_MODE_SFP:</div><div class='add'>+		return xgbe_phy_valid_speed_sfp_mode(pdata, speed);</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_link_status(struct xgbe_prv_data *pdata, int *an_restart)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	int reg, ret;</div><div class='add'>+</div><div class='add'>+	*an_restart = 0;</div><div class='add'>+</div><div class='add'>+	if (phy_data-&gt;port_mode == XGBE_PORT_MODE_SFP) {</div><div class='add'>+		/* Check SFP signals */</div><div class='add'>+		xgbe_phy_sfp_detect(pdata);</div><div class='add'>+</div><div class='add'>+		if (phy_data-&gt;sfp_changed) {</div><div class='add'>+			*an_restart = 1;</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (phy_data-&gt;sfp_mod_absent || phy_data-&gt;sfp_rx_los) {</div><div class='add'>+			if (pdata-&gt;en_rx_adap)</div><div class='add'>+				pdata-&gt;rx_adapt_done = false;</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (phy_data-&gt;phydev) {</div><div class='add'>+		/* Check external PHY */</div><div class='add'>+		ret = phy_read_status(phy_data-&gt;phydev);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		if ((pdata-&gt;phy.autoneg == AUTONEG_ENABLE) &amp;&amp;</div><div class='add'>+		    !phy_aneg_done(phy_data-&gt;phydev))</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		if (!phy_data-&gt;phydev-&gt;link)</div><div class='add'>+			return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1);</div><div class='add'>+	if (reg &lt; 0)</div><div class='add'>+		return reg;</div><div class='add'>+</div><div class='add'>+	/* Link status is latched low so that momentary link drops</div><div class='add'>+	 * can be detected. If link was already down read again</div><div class='add'>+	 * to get the latest state.</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	if (!pdata-&gt;phy.link &amp;&amp; !(reg &amp; MDIO_STAT1_LSTATUS)) {</div><div class='add'>+		reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1);</div><div class='add'>+		if (reg &lt; 0)</div><div class='add'>+			return reg;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;en_rx_adap) {</div><div class='add'>+		/* if the link is available and adaptation is done,</div><div class='add'>+		 * declare link up</div><div class='add'>+		 */</div><div class='add'>+		if ((reg &amp; MDIO_STAT1_LSTATUS) &amp;&amp; pdata-&gt;rx_adapt_done)</div><div class='add'>+			return 1;</div><div class='add'>+		/* If either link is not available or adaptation is not done,</div><div class='add'>+		 * retrigger the adaptation logic. (if the mode is not set,</div><div class='add'>+		 * then issue mailbox command first)</div><div class='add'>+		 */</div><div class='add'>+		if (pdata-&gt;mode_set) {</div><div class='add'>+			xgbe_phy_rx_adaptation(pdata);</div><div class='add'>+		} else {</div><div class='add'>+			pdata-&gt;rx_adapt_done = false;</div><div class='add'>+			xgbe_phy_set_mode(pdata, phy_data-&gt;cur_mode);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (pdata-&gt;rx_adapt_done)</div><div class='add'>+			return 1;</div><div class='add'>+	} else if (reg &amp; MDIO_STAT1_LSTATUS)</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;phy.autoneg == AUTONEG_ENABLE &amp;&amp;</div><div class='add'>+	    phy_data-&gt;port_mode == XGBE_PORT_MODE_BACKPLANE) {</div><div class='add'>+		if (!test_bit(XGBE_LINK_INIT, &amp;pdata-&gt;dev_state)) {</div><div class='add'>+			netif_carrier_off(pdata-&gt;netdev);</div><div class='add'>+			*an_restart = 1;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* No link, attempt a receiver reset cycle */</div><div class='add'>+	if (pdata-&gt;vdata-&gt;enable_rrc &amp;&amp; phy_data-&gt;rrc_count++ &gt; XGBE_RRC_FREQUENCY) {</div><div class='add'>+		phy_data-&gt;rrc_count = 0;</div><div class='add'>+		xgbe_phy_rrc(pdata);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_sfp_gpio_setup(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+</div><div class='add'>+	phy_data-&gt;sfp_gpio_address = XGBE_GPIO_ADDRESS_PCA9555 +</div><div class='add'>+				     XP_GET_BITS(pdata-&gt;pp3, XP_PROP_3,</div><div class='add'>+						 GPIO_ADDR);</div><div class='add'>+</div><div class='add'>+	phy_data-&gt;sfp_gpio_mask = XP_GET_BITS(pdata-&gt;pp3, XP_PROP_3,</div><div class='add'>+					      GPIO_MASK);</div><div class='add'>+</div><div class='add'>+	phy_data-&gt;sfp_gpio_rx_los = XP_GET_BITS(pdata-&gt;pp3, XP_PROP_3,</div><div class='add'>+						GPIO_RX_LOS);</div><div class='add'>+	phy_data-&gt;sfp_gpio_tx_fault = XP_GET_BITS(pdata-&gt;pp3, XP_PROP_3,</div><div class='add'>+						  GPIO_TX_FAULT);</div><div class='add'>+	phy_data-&gt;sfp_gpio_mod_absent = XP_GET_BITS(pdata-&gt;pp3, XP_PROP_3,</div><div class='add'>+						    GPIO_MOD_ABS);</div><div class='add'>+	phy_data-&gt;sfp_gpio_rate_select = XP_GET_BITS(pdata-&gt;pp3, XP_PROP_3,</div><div class='add'>+						     GPIO_RATE_SELECT);</div><div class='add'>+</div><div class='add'>+	if (netif_msg_probe(pdata)) {</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "SFP: gpio_address=%#x\n",</div><div class='add'>+			phy_data-&gt;sfp_gpio_address);</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "SFP: gpio_mask=%#x\n",</div><div class='add'>+			phy_data-&gt;sfp_gpio_mask);</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "SFP: gpio_rx_los=%u\n",</div><div class='add'>+			phy_data-&gt;sfp_gpio_rx_los);</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "SFP: gpio_tx_fault=%u\n",</div><div class='add'>+			phy_data-&gt;sfp_gpio_tx_fault);</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "SFP: gpio_mod_absent=%u\n",</div><div class='add'>+			phy_data-&gt;sfp_gpio_mod_absent);</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "SFP: gpio_rate_select=%u\n",</div><div class='add'>+			phy_data-&gt;sfp_gpio_rate_select);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_sfp_comm_setup(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	unsigned int mux_addr_hi, mux_addr_lo;</div><div class='add'>+</div><div class='add'>+	mux_addr_hi = XP_GET_BITS(pdata-&gt;pp4, XP_PROP_4, MUX_ADDR_HI);</div><div class='add'>+	mux_addr_lo = XP_GET_BITS(pdata-&gt;pp4, XP_PROP_4, MUX_ADDR_LO);</div><div class='add'>+	if (mux_addr_lo == XGBE_SFP_DIRECT)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	phy_data-&gt;sfp_comm = XGBE_SFP_COMM_PCA9545;</div><div class='add'>+	phy_data-&gt;sfp_mux_address = (mux_addr_hi &lt;&lt; 2) + mux_addr_lo;</div><div class='add'>+	phy_data-&gt;sfp_mux_channel = XP_GET_BITS(pdata-&gt;pp4, XP_PROP_4,</div><div class='add'>+						MUX_CHAN);</div><div class='add'>+</div><div class='add'>+	if (netif_msg_probe(pdata)) {</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "SFP: mux_address=%#x\n",</div><div class='add'>+			phy_data-&gt;sfp_mux_address);</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "SFP: mux_channel=%u\n",</div><div class='add'>+			phy_data-&gt;sfp_mux_channel);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_sfp_setup(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	xgbe_phy_sfp_comm_setup(pdata);</div><div class='add'>+	xgbe_phy_sfp_gpio_setup(pdata);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_int_mdio_reset(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = pdata-&gt;hw_if.set_gpio(pdata, phy_data-&gt;mdio_reset_gpio);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = pdata-&gt;hw_if.clr_gpio(pdata, phy_data-&gt;mdio_reset_gpio);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_i2c_mdio_reset(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	u8 gpio_reg, gpio_ports[2], gpio_data[3];</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Read the output port registers */</div><div class='add'>+	gpio_reg = 2;</div><div class='add'>+	ret = xgbe_phy_i2c_read(pdata, phy_data-&gt;mdio_reset_addr,</div><div class='add'>+				&amp;gpio_reg, sizeof(gpio_reg),</div><div class='add'>+				gpio_ports, sizeof(gpio_ports));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Prepare to write the GPIO data */</div><div class='add'>+	gpio_data[0] = 2;</div><div class='add'>+	gpio_data[1] = gpio_ports[0];</div><div class='add'>+	gpio_data[2] = gpio_ports[1];</div><div class='add'>+</div><div class='add'>+	/* Set the GPIO pin */</div><div class='add'>+	if (phy_data-&gt;mdio_reset_gpio &lt; 8)</div><div class='add'>+		gpio_data[1] |= (1 &lt;&lt; (phy_data-&gt;mdio_reset_gpio % 8));</div><div class='add'>+	else</div><div class='add'>+		gpio_data[2] |= (1 &lt;&lt; (phy_data-&gt;mdio_reset_gpio % 8));</div><div class='add'>+</div><div class='add'>+	/* Write the output port registers */</div><div class='add'>+	ret = xgbe_phy_i2c_write(pdata, phy_data-&gt;mdio_reset_addr,</div><div class='add'>+				 gpio_data, sizeof(gpio_data));</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Clear the GPIO pin */</div><div class='add'>+	if (phy_data-&gt;mdio_reset_gpio &lt; 8)</div><div class='add'>+		gpio_data[1] &amp;= ~(1 &lt;&lt; (phy_data-&gt;mdio_reset_gpio % 8));</div><div class='add'>+	else</div><div class='add'>+		gpio_data[2] &amp;= ~(1 &lt;&lt; (phy_data-&gt;mdio_reset_gpio % 8));</div><div class='add'>+</div><div class='add'>+	/* Write the output port registers */</div><div class='add'>+	ret = xgbe_phy_i2c_write(pdata, phy_data-&gt;mdio_reset_addr,</div><div class='add'>+				 gpio_data, sizeof(gpio_data));</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_mdio_reset(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (phy_data-&gt;conn_type != XGBE_CONN_TYPE_MDIO)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ret = xgbe_phy_get_comm_ownership(pdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (phy_data-&gt;mdio_reset == XGBE_MDIO_RESET_I2C_GPIO)</div><div class='add'>+		ret = xgbe_phy_i2c_mdio_reset(pdata);</div><div class='add'>+	else if (phy_data-&gt;mdio_reset == XGBE_MDIO_RESET_INT_GPIO)</div><div class='add'>+		ret = xgbe_phy_int_mdio_reset(pdata);</div><div class='add'>+</div><div class='add'>+	xgbe_phy_put_comm_ownership(pdata);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool xgbe_phy_redrv_error(struct xgbe_phy_data *phy_data)</div><div class='add'>+{</div><div class='add'>+	if (!phy_data-&gt;redrv)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	if (phy_data-&gt;redrv_if &gt;= XGBE_PHY_REDRV_IF_MAX)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	switch (phy_data-&gt;redrv_model) {</div><div class='add'>+	case XGBE_PHY_REDRV_MODEL_4223:</div><div class='add'>+		if (phy_data-&gt;redrv_lane &gt; 3)</div><div class='add'>+			return true;</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_PHY_REDRV_MODEL_4227:</div><div class='add'>+		if (phy_data-&gt;redrv_lane &gt; 1)</div><div class='add'>+			return true;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_mdio_reset_setup(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+</div><div class='add'>+	if (phy_data-&gt;conn_type != XGBE_CONN_TYPE_MDIO)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	phy_data-&gt;mdio_reset = XP_GET_BITS(pdata-&gt;pp3, XP_PROP_3, MDIO_RESET);</div><div class='add'>+	switch (phy_data-&gt;mdio_reset) {</div><div class='add'>+	case XGBE_MDIO_RESET_NONE:</div><div class='add'>+	case XGBE_MDIO_RESET_I2C_GPIO:</div><div class='add'>+	case XGBE_MDIO_RESET_INT_GPIO:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		dev_err(pdata-&gt;dev, "unsupported MDIO reset (%#x)\n",</div><div class='add'>+			phy_data-&gt;mdio_reset);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (phy_data-&gt;mdio_reset == XGBE_MDIO_RESET_I2C_GPIO) {</div><div class='add'>+		phy_data-&gt;mdio_reset_addr = XGBE_GPIO_ADDRESS_PCA9555 +</div><div class='add'>+					    XP_GET_BITS(pdata-&gt;pp3, XP_PROP_3,</div><div class='add'>+							MDIO_RESET_I2C_ADDR);</div><div class='add'>+		phy_data-&gt;mdio_reset_gpio = XP_GET_BITS(pdata-&gt;pp3, XP_PROP_3,</div><div class='add'>+							MDIO_RESET_I2C_GPIO);</div><div class='add'>+	} else if (phy_data-&gt;mdio_reset == XGBE_MDIO_RESET_INT_GPIO) {</div><div class='add'>+		phy_data-&gt;mdio_reset_gpio = XP_GET_BITS(pdata-&gt;pp3, XP_PROP_3,</div><div class='add'>+							MDIO_RESET_INT_GPIO);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool xgbe_phy_port_mode_mismatch(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	unsigned int ver;</div><div class='add'>+</div><div class='add'>+	/* 10 Mbps speed is supported in ver 21H and ver &gt;= 30H */</div><div class='add'>+	ver = XGMAC_GET_BITS(pdata-&gt;hw_feat.version, MAC_VR, SNPSVER);</div><div class='add'>+	if ((ver &lt; 0x30 &amp;&amp; ver != 0x21) &amp;&amp; (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_10))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	switch (phy_data-&gt;port_mode) {</div><div class='add'>+	case XGBE_PORT_MODE_BACKPLANE:</div><div class='add'>+	case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:</div><div class='add'>+		if ((phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_1000) ||</div><div class='add'>+		    (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_10000))</div><div class='add'>+			return false;</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_PORT_MODE_BACKPLANE_2500:</div><div class='add'>+		if (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_2500)</div><div class='add'>+			return false;</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_PORT_MODE_1000BASE_T:</div><div class='add'>+		if ((phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_10) ||</div><div class='add'>+		    (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_100) ||</div><div class='add'>+		    (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_1000))</div><div class='add'>+			return false;</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_PORT_MODE_1000BASE_X:</div><div class='add'>+		if (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_1000)</div><div class='add'>+			return false;</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_PORT_MODE_NBASE_T:</div><div class='add'>+		if ((phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_10) ||</div><div class='add'>+		    (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_100) ||</div><div class='add'>+		    (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_1000) ||</div><div class='add'>+		    (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_2500))</div><div class='add'>+			return false;</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_PORT_MODE_10GBASE_T:</div><div class='add'>+		if ((phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_10) ||</div><div class='add'>+		    (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_100) ||</div><div class='add'>+		    (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_1000) ||</div><div class='add'>+		    (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_2500) ||</div><div class='add'>+		    (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_10000))</div><div class='add'>+			return false;</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_PORT_MODE_10GBASE_R:</div><div class='add'>+		if (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_10000)</div><div class='add'>+			return false;</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_PORT_MODE_SFP:</div><div class='add'>+		if ((phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_10) ||</div><div class='add'>+		    (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_100) ||</div><div class='add'>+		    (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_1000) ||</div><div class='add'>+		    (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_10000))</div><div class='add'>+			return false;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool xgbe_phy_conn_type_mismatch(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+</div><div class='add'>+	switch (phy_data-&gt;port_mode) {</div><div class='add'>+	case XGBE_PORT_MODE_BACKPLANE:</div><div class='add'>+	case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:</div><div class='add'>+	case XGBE_PORT_MODE_BACKPLANE_2500:</div><div class='add'>+		if (phy_data-&gt;conn_type == XGBE_CONN_TYPE_BACKPLANE)</div><div class='add'>+			return false;</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_PORT_MODE_1000BASE_T:</div><div class='add'>+	case XGBE_PORT_MODE_1000BASE_X:</div><div class='add'>+	case XGBE_PORT_MODE_NBASE_T:</div><div class='add'>+	case XGBE_PORT_MODE_10GBASE_T:</div><div class='add'>+	case XGBE_PORT_MODE_10GBASE_R:</div><div class='add'>+		if (phy_data-&gt;conn_type == XGBE_CONN_TYPE_MDIO)</div><div class='add'>+			return false;</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_PORT_MODE_SFP:</div><div class='add'>+		if (phy_data-&gt;conn_type == XGBE_CONN_TYPE_SFP)</div><div class='add'>+			return false;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool xgbe_phy_port_enabled(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	if (!XP_GET_BITS(pdata-&gt;pp0, XP_PROP_0, PORT_SPEEDS))</div><div class='add'>+		return false;</div><div class='add'>+	if (!XP_GET_BITS(pdata-&gt;pp0, XP_PROP_0, CONN_TYPE))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_cdr_track(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+</div><div class='add'>+	if (!pdata-&gt;debugfs_an_cdr_workaround)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!phy_data-&gt;phy_cdr_notrack)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	usleep_range(phy_data-&gt;phy_cdr_delay,</div><div class='add'>+		     phy_data-&gt;phy_cdr_delay + 500);</div><div class='add'>+</div><div class='add'>+	XMDIO_WRITE_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_VEND2_PMA_CDR_CONTROL,</div><div class='add'>+			 XGBE_PMA_CDR_TRACK_EN_MASK,</div><div class='add'>+			 XGBE_PMA_CDR_TRACK_EN_ON);</div><div class='add'>+</div><div class='add'>+	phy_data-&gt;phy_cdr_notrack = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_cdr_notrack(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+</div><div class='add'>+	if (!pdata-&gt;debugfs_an_cdr_workaround)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (phy_data-&gt;phy_cdr_notrack)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	XMDIO_WRITE_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_VEND2_PMA_CDR_CONTROL,</div><div class='add'>+			 XGBE_PMA_CDR_TRACK_EN_MASK,</div><div class='add'>+			 XGBE_PMA_CDR_TRACK_EN_OFF);</div><div class='add'>+</div><div class='add'>+	xgbe_phy_rrc(pdata);</div><div class='add'>+</div><div class='add'>+	phy_data-&gt;phy_cdr_notrack = 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_kr_training_post(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	if (!pdata-&gt;debugfs_an_cdr_track_early)</div><div class='add'>+		xgbe_phy_cdr_track(pdata);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_kr_training_pre(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	if (pdata-&gt;debugfs_an_cdr_track_early)</div><div class='add'>+		xgbe_phy_cdr_track(pdata);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_an_post(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+</div><div class='add'>+	switch (pdata-&gt;an_mode) {</div><div class='add'>+	case XGBE_AN_MODE_CL73:</div><div class='add'>+	case XGBE_AN_MODE_CL73_REDRV:</div><div class='add'>+		if (phy_data-&gt;cur_mode != XGBE_MODE_KR)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		xgbe_phy_cdr_track(pdata);</div><div class='add'>+</div><div class='add'>+		switch (pdata-&gt;an_result) {</div><div class='add'>+		case XGBE_AN_READY:</div><div class='add'>+		case XGBE_AN_COMPLETE:</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			if (phy_data-&gt;phy_cdr_delay &lt; XGBE_CDR_DELAY_MAX)</div><div class='add'>+				phy_data-&gt;phy_cdr_delay += XGBE_CDR_DELAY_INC;</div><div class='add'>+			else</div><div class='add'>+				phy_data-&gt;phy_cdr_delay = XGBE_CDR_DELAY_INIT;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_an_pre(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+</div><div class='add'>+	switch (pdata-&gt;an_mode) {</div><div class='add'>+	case XGBE_AN_MODE_CL73:</div><div class='add'>+	case XGBE_AN_MODE_CL73_REDRV:</div><div class='add'>+		if (phy_data-&gt;cur_mode != XGBE_MODE_KR)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		xgbe_phy_cdr_notrack(pdata);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_stop(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+</div><div class='add'>+	/* If we have an external PHY, free it */</div><div class='add'>+	xgbe_phy_free_phy_device(pdata);</div><div class='add'>+</div><div class='add'>+	/* Reset SFP data */</div><div class='add'>+	xgbe_phy_sfp_reset(phy_data);</div><div class='add'>+	xgbe_phy_sfp_mod_absent(pdata);</div><div class='add'>+</div><div class='add'>+	/* Reset CDR support */</div><div class='add'>+	xgbe_phy_cdr_track(pdata);</div><div class='add'>+</div><div class='add'>+	/* Power off the PHY */</div><div class='add'>+	xgbe_phy_power_off(pdata);</div><div class='add'>+</div><div class='add'>+	/* Stop the I2C controller */</div><div class='add'>+	pdata-&gt;i2c_if.i2c_stop(pdata);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_start(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Start the I2C controller */</div><div class='add'>+	ret = pdata-&gt;i2c_if.i2c_start(pdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Set the proper MDIO mode for the re-driver */</div><div class='add'>+	if (phy_data-&gt;redrv &amp;&amp; !phy_data-&gt;redrv_if) {</div><div class='add'>+		ret = pdata-&gt;hw_if.set_ext_mii_mode(pdata, phy_data-&gt;redrv_addr,</div><div class='add'>+						    XGBE_MDIO_MODE_CL22);</div><div class='add'>+		if (ret) {</div><div class='add'>+			netdev_err(pdata-&gt;netdev,</div><div class='add'>+				   "redriver mdio port not compatible (%u)\n",</div><div class='add'>+				   phy_data-&gt;redrv_addr);</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Start in highest supported mode */</div><div class='add'>+	xgbe_phy_set_mode(pdata, phy_data-&gt;start_mode);</div><div class='add'>+</div><div class='add'>+	/* Reset CDR support */</div><div class='add'>+	xgbe_phy_cdr_track(pdata);</div><div class='add'>+</div><div class='add'>+	/* After starting the I2C controller, we can check for an SFP */</div><div class='add'>+	switch (phy_data-&gt;port_mode) {</div><div class='add'>+	case XGBE_PORT_MODE_SFP:</div><div class='add'>+		xgbe_phy_sfp_detect(pdata);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* If we have an external PHY, start it */</div><div class='add'>+	ret = xgbe_phy_find_phy_device(pdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_i2c;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_i2c:</div><div class='add'>+	pdata-&gt;i2c_if.i2c_stop(pdata);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_reset(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+	enum xgbe_mode cur_mode;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Reset by power cycling the PHY */</div><div class='add'>+	cur_mode = phy_data-&gt;cur_mode;</div><div class='add'>+	xgbe_phy_power_off(pdata);</div><div class='add'>+	xgbe_phy_set_mode(pdata, cur_mode);</div><div class='add'>+</div><div class='add'>+	if (!phy_data-&gt;phydev)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Reset the external PHY */</div><div class='add'>+	ret = xgbe_phy_mdio_reset(pdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return phy_init_hw(phy_data-&gt;phydev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_phy_exit(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_data *phy_data = pdata-&gt;phy_data;</div><div class='add'>+</div><div class='add'>+	/* Unregister for driving external PHYs */</div><div class='add'>+	mdiobus_unregister(phy_data-&gt;mii);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_phy_init(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct ethtool_link_ksettings *lks = &amp;pdata-&gt;phy.lks;</div><div class='add'>+	struct xgbe_phy_data *phy_data;</div><div class='add'>+	struct mii_bus *mii;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Check if enabled */</div><div class='add'>+	if (!xgbe_phy_port_enabled(pdata)) {</div><div class='add'>+		dev_info(pdata-&gt;dev, "device is not enabled\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Initialize the I2C controller */</div><div class='add'>+	ret = pdata-&gt;i2c_if.i2c_init(pdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	phy_data = devm_kzalloc(pdata-&gt;dev, sizeof(*phy_data), GFP_KERNEL);</div><div class='add'>+	if (!phy_data)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	pdata-&gt;phy_data = phy_data;</div><div class='add'>+</div><div class='add'>+	phy_data-&gt;port_mode = XP_GET_BITS(pdata-&gt;pp0, XP_PROP_0, PORT_MODE);</div><div class='add'>+	phy_data-&gt;port_id = XP_GET_BITS(pdata-&gt;pp0, XP_PROP_0, PORT_ID);</div><div class='add'>+	phy_data-&gt;port_speeds = XP_GET_BITS(pdata-&gt;pp0, XP_PROP_0, PORT_SPEEDS);</div><div class='add'>+	phy_data-&gt;conn_type = XP_GET_BITS(pdata-&gt;pp0, XP_PROP_0, CONN_TYPE);</div><div class='add'>+	phy_data-&gt;mdio_addr = XP_GET_BITS(pdata-&gt;pp0, XP_PROP_0, MDIO_ADDR);</div><div class='add'>+	if (netif_msg_probe(pdata)) {</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "port mode=%u\n", phy_data-&gt;port_mode);</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "port id=%u\n", phy_data-&gt;port_id);</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "port speeds=%#x\n", phy_data-&gt;port_speeds);</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "conn type=%u\n", phy_data-&gt;conn_type);</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "mdio addr=%u\n", phy_data-&gt;mdio_addr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	phy_data-&gt;redrv = XP_GET_BITS(pdata-&gt;pp4, XP_PROP_4, REDRV_PRESENT);</div><div class='add'>+	phy_data-&gt;redrv_if = XP_GET_BITS(pdata-&gt;pp4, XP_PROP_4, REDRV_IF);</div><div class='add'>+	phy_data-&gt;redrv_addr = XP_GET_BITS(pdata-&gt;pp4, XP_PROP_4, REDRV_ADDR);</div><div class='add'>+	phy_data-&gt;redrv_lane = XP_GET_BITS(pdata-&gt;pp4, XP_PROP_4, REDRV_LANE);</div><div class='add'>+	phy_data-&gt;redrv_model = XP_GET_BITS(pdata-&gt;pp4, XP_PROP_4, REDRV_MODEL);</div><div class='add'>+	if (phy_data-&gt;redrv &amp;&amp; netif_msg_probe(pdata)) {</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "redrv present\n");</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "redrv i/f=%u\n", phy_data-&gt;redrv_if);</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "redrv addr=%#x\n", phy_data-&gt;redrv_addr);</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "redrv lane=%u\n", phy_data-&gt;redrv_lane);</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "redrv model=%u\n", phy_data-&gt;redrv_model);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Validate the connection requested */</div><div class='add'>+	if (xgbe_phy_conn_type_mismatch(pdata)) {</div><div class='add'>+		dev_err(pdata-&gt;dev, "phy mode/connection mismatch (%#x/%#x)\n",</div><div class='add'>+			phy_data-&gt;port_mode, phy_data-&gt;conn_type);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Validate the mode requested */</div><div class='add'>+	if (xgbe_phy_port_mode_mismatch(pdata)) {</div><div class='add'>+		dev_err(pdata-&gt;dev, "phy mode/speed mismatch (%#x/%#x)\n",</div><div class='add'>+			phy_data-&gt;port_mode, phy_data-&gt;port_speeds);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Check for and validate MDIO reset support */</div><div class='add'>+	ret = xgbe_phy_mdio_reset_setup(pdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Validate the re-driver information */</div><div class='add'>+	if (xgbe_phy_redrv_error(phy_data)) {</div><div class='add'>+		dev_err(pdata-&gt;dev, "phy re-driver settings error\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	pdata-&gt;kr_redrv = phy_data-&gt;redrv;</div><div class='add'>+</div><div class='add'>+	/* Indicate current mode is unknown */</div><div class='add'>+	phy_data-&gt;cur_mode = XGBE_MODE_UNKNOWN;</div><div class='add'>+</div><div class='add'>+	/* Initialize supported features */</div><div class='add'>+	XGBE_ZERO_SUP(lks);</div><div class='add'>+</div><div class='add'>+	switch (phy_data-&gt;port_mode) {</div><div class='add'>+	/* Backplane support */</div><div class='add'>+	case XGBE_PORT_MODE_BACKPLANE:</div><div class='add'>+		XGBE_SET_SUP(lks, Autoneg);</div><div class='add'>+		fallthrough;</div><div class='add'>+	case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:</div><div class='add'>+		XGBE_SET_SUP(lks, Pause);</div><div class='add'>+		XGBE_SET_SUP(lks, Asym_Pause);</div><div class='add'>+		XGBE_SET_SUP(lks, Backplane);</div><div class='add'>+		if (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_1000) {</div><div class='add'>+			XGBE_SET_SUP(lks, 1000baseKX_Full);</div><div class='add'>+			phy_data-&gt;start_mode = XGBE_MODE_KX_1000;</div><div class='add'>+		}</div><div class='add'>+		if (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_10000) {</div><div class='add'>+			XGBE_SET_SUP(lks, 10000baseKR_Full);</div><div class='add'>+			if (pdata-&gt;fec_ability &amp; MDIO_PMA_10GBR_FECABLE_ABLE)</div><div class='add'>+				XGBE_SET_SUP(lks, 10000baseR_FEC);</div><div class='add'>+			phy_data-&gt;start_mode = XGBE_MODE_KR;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		phy_data-&gt;phydev_mode = XGBE_MDIO_MODE_NONE;</div><div class='add'>+		break;</div><div class='add'>+	case XGBE_PORT_MODE_BACKPLANE_2500:</div><div class='add'>+		XGBE_SET_SUP(lks, Pause);</div><div class='add'>+		XGBE_SET_SUP(lks, Asym_Pause);</div><div class='add'>+		XGBE_SET_SUP(lks, Backplane);</div><div class='add'>+		XGBE_SET_SUP(lks, 2500baseX_Full);</div><div class='add'>+		phy_data-&gt;start_mode = XGBE_MODE_KX_2500;</div><div class='add'>+</div><div class='add'>+		phy_data-&gt;phydev_mode = XGBE_MDIO_MODE_NONE;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	/* MDIO 1GBase-T support */</div><div class='add'>+	case XGBE_PORT_MODE_1000BASE_T:</div><div class='add'>+		XGBE_SET_SUP(lks, Autoneg);</div><div class='add'>+		XGBE_SET_SUP(lks, Pause);</div><div class='add'>+		XGBE_SET_SUP(lks, Asym_Pause);</div><div class='add'>+		XGBE_SET_SUP(lks, TP);</div><div class='add'>+		if (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_10) {</div><div class='add'>+			XGBE_SET_SUP(lks, 10baseT_Full);</div><div class='add'>+			phy_data-&gt;start_mode = XGBE_MODE_SGMII_10;</div><div class='add'>+		}</div><div class='add'>+		if (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_100) {</div><div class='add'>+			XGBE_SET_SUP(lks, 100baseT_Full);</div><div class='add'>+			phy_data-&gt;start_mode = XGBE_MODE_SGMII_100;</div><div class='add'>+		}</div><div class='add'>+		if (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_1000) {</div><div class='add'>+			XGBE_SET_SUP(lks, 1000baseT_Full);</div><div class='add'>+			phy_data-&gt;start_mode = XGBE_MODE_SGMII_1000;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		phy_data-&gt;phydev_mode = XGBE_MDIO_MODE_CL22;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	/* MDIO Base-X support */</div><div class='add'>+	case XGBE_PORT_MODE_1000BASE_X:</div><div class='add'>+		XGBE_SET_SUP(lks, Autoneg);</div><div class='add'>+		XGBE_SET_SUP(lks, Pause);</div><div class='add'>+		XGBE_SET_SUP(lks, Asym_Pause);</div><div class='add'>+		XGBE_SET_SUP(lks, FIBRE);</div><div class='add'>+		XGBE_SET_SUP(lks, 1000baseX_Full);</div><div class='add'>+		phy_data-&gt;start_mode = XGBE_MODE_X;</div><div class='add'>+</div><div class='add'>+		phy_data-&gt;phydev_mode = XGBE_MDIO_MODE_CL22;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	/* MDIO NBase-T support */</div><div class='add'>+	case XGBE_PORT_MODE_NBASE_T:</div><div class='add'>+		XGBE_SET_SUP(lks, Autoneg);</div><div class='add'>+		XGBE_SET_SUP(lks, Pause);</div><div class='add'>+		XGBE_SET_SUP(lks, Asym_Pause);</div><div class='add'>+		XGBE_SET_SUP(lks, TP);</div><div class='add'>+		if (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_10) {</div><div class='add'>+			XGBE_SET_SUP(lks, 10baseT_Full);</div><div class='add'>+			phy_data-&gt;start_mode = XGBE_MODE_SGMII_10;</div><div class='add'>+		}</div><div class='add'>+		if (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_100) {</div><div class='add'>+			XGBE_SET_SUP(lks, 100baseT_Full);</div><div class='add'>+			phy_data-&gt;start_mode = XGBE_MODE_SGMII_100;</div><div class='add'>+		}</div><div class='add'>+		if (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_1000) {</div><div class='add'>+			XGBE_SET_SUP(lks, 1000baseT_Full);</div><div class='add'>+			phy_data-&gt;start_mode = XGBE_MODE_SGMII_1000;</div><div class='add'>+		}</div><div class='add'>+		if (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_2500) {</div><div class='add'>+			XGBE_SET_SUP(lks, 2500baseT_Full);</div><div class='add'>+			phy_data-&gt;start_mode = XGBE_MODE_KX_2500;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		phy_data-&gt;phydev_mode = XGBE_MDIO_MODE_CL45;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	/* 10GBase-T support */</div><div class='add'>+	case XGBE_PORT_MODE_10GBASE_T:</div><div class='add'>+		XGBE_SET_SUP(lks, Autoneg);</div><div class='add'>+		XGBE_SET_SUP(lks, Pause);</div><div class='add'>+		XGBE_SET_SUP(lks, Asym_Pause);</div><div class='add'>+		XGBE_SET_SUP(lks, TP);</div><div class='add'>+		if (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_10) {</div><div class='add'>+			XGBE_SET_SUP(lks, 10baseT_Full);</div><div class='add'>+			phy_data-&gt;start_mode = XGBE_MODE_SGMII_10;</div><div class='add'>+		}</div><div class='add'>+		if (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_100) {</div><div class='add'>+			XGBE_SET_SUP(lks, 100baseT_Full);</div><div class='add'>+			phy_data-&gt;start_mode = XGBE_MODE_SGMII_100;</div><div class='add'>+		}</div><div class='add'>+		if (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_1000) {</div><div class='add'>+			XGBE_SET_SUP(lks, 1000baseT_Full);</div><div class='add'>+			phy_data-&gt;start_mode = XGBE_MODE_SGMII_1000;</div><div class='add'>+		}</div><div class='add'>+		if (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_2500) {</div><div class='add'>+			XGBE_SET_SUP(lks, 2500baseT_Full);</div><div class='add'>+			phy_data-&gt;start_mode = XGBE_MODE_KX_2500;</div><div class='add'>+		}</div><div class='add'>+		if (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_10000) {</div><div class='add'>+			XGBE_SET_SUP(lks, 10000baseT_Full);</div><div class='add'>+			phy_data-&gt;start_mode = XGBE_MODE_KR;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		phy_data-&gt;phydev_mode = XGBE_MDIO_MODE_CL45;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	/* 10GBase-R support */</div><div class='add'>+	case XGBE_PORT_MODE_10GBASE_R:</div><div class='add'>+		XGBE_SET_SUP(lks, Autoneg);</div><div class='add'>+		XGBE_SET_SUP(lks, Pause);</div><div class='add'>+		XGBE_SET_SUP(lks, Asym_Pause);</div><div class='add'>+		XGBE_SET_SUP(lks, FIBRE);</div><div class='add'>+		XGBE_SET_SUP(lks, 10000baseSR_Full);</div><div class='add'>+		XGBE_SET_SUP(lks, 10000baseLR_Full);</div><div class='add'>+		XGBE_SET_SUP(lks, 10000baseLRM_Full);</div><div class='add'>+		XGBE_SET_SUP(lks, 10000baseER_Full);</div><div class='add'>+		if (pdata-&gt;fec_ability &amp; MDIO_PMA_10GBR_FECABLE_ABLE)</div><div class='add'>+			XGBE_SET_SUP(lks, 10000baseR_FEC);</div><div class='add'>+		phy_data-&gt;start_mode = XGBE_MODE_SFI;</div><div class='add'>+</div><div class='add'>+		phy_data-&gt;phydev_mode = XGBE_MDIO_MODE_NONE;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	/* SFP support */</div><div class='add'>+	case XGBE_PORT_MODE_SFP:</div><div class='add'>+		XGBE_SET_SUP(lks, Autoneg);</div><div class='add'>+		XGBE_SET_SUP(lks, Pause);</div><div class='add'>+		XGBE_SET_SUP(lks, Asym_Pause);</div><div class='add'>+		XGBE_SET_SUP(lks, TP);</div><div class='add'>+		XGBE_SET_SUP(lks, FIBRE);</div><div class='add'>+		if (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_10)</div><div class='add'>+			phy_data-&gt;start_mode = XGBE_MODE_SGMII_10;</div><div class='add'>+		if (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_100)</div><div class='add'>+			phy_data-&gt;start_mode = XGBE_MODE_SGMII_100;</div><div class='add'>+		if (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_1000)</div><div class='add'>+			phy_data-&gt;start_mode = XGBE_MODE_SGMII_1000;</div><div class='add'>+		if (phy_data-&gt;port_speeds &amp; XGBE_PHY_PORT_SPEED_10000)</div><div class='add'>+			phy_data-&gt;start_mode = XGBE_MODE_SFI;</div><div class='add'>+</div><div class='add'>+		phy_data-&gt;phydev_mode = XGBE_MDIO_MODE_CL22;</div><div class='add'>+</div><div class='add'>+		xgbe_phy_sfp_setup(pdata);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (netif_msg_probe(pdata))</div><div class='add'>+		dev_dbg(pdata-&gt;dev, "phy supported=0x%*pb\n",</div><div class='add'>+			__ETHTOOL_LINK_MODE_MASK_NBITS,</div><div class='add'>+			lks-&gt;link_modes.supported);</div><div class='add'>+</div><div class='add'>+	if ((phy_data-&gt;conn_type &amp; XGBE_CONN_TYPE_MDIO) &amp;&amp;</div><div class='add'>+	    (phy_data-&gt;phydev_mode != XGBE_MDIO_MODE_NONE)) {</div><div class='add'>+		ret = pdata-&gt;hw_if.set_ext_mii_mode(pdata, phy_data-&gt;mdio_addr,</div><div class='add'>+						    phy_data-&gt;phydev_mode);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(pdata-&gt;dev,</div><div class='add'>+				"mdio port/clause not compatible (%d/%u)\n",</div><div class='add'>+				phy_data-&gt;mdio_addr, phy_data-&gt;phydev_mode);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (phy_data-&gt;redrv &amp;&amp; !phy_data-&gt;redrv_if) {</div><div class='add'>+		ret = pdata-&gt;hw_if.set_ext_mii_mode(pdata, phy_data-&gt;redrv_addr,</div><div class='add'>+						    XGBE_MDIO_MODE_CL22);</div><div class='add'>+		if (ret) {</div><div class='add'>+			dev_err(pdata-&gt;dev,</div><div class='add'>+				"redriver mdio port not compatible (%u)\n",</div><div class='add'>+				phy_data-&gt;redrv_addr);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	phy_data-&gt;phy_cdr_delay = XGBE_CDR_DELAY_INIT;</div><div class='add'>+</div><div class='add'>+	/* Register for driving external PHYs */</div><div class='add'>+	mii = devm_mdiobus_alloc(pdata-&gt;dev);</div><div class='add'>+	if (!mii) {</div><div class='add'>+		dev_err(pdata-&gt;dev, "mdiobus_alloc failed\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mii-&gt;priv = pdata;</div><div class='add'>+	mii-&gt;name = "amd-xgbe-mii";</div><div class='add'>+	mii-&gt;read = xgbe_phy_mii_read_c22;</div><div class='add'>+	mii-&gt;write = xgbe_phy_mii_write_c22;</div><div class='add'>+	mii-&gt;read_c45 = xgbe_phy_mii_read_c45;</div><div class='add'>+	mii-&gt;write_c45 = xgbe_phy_mii_write_c45;</div><div class='add'>+	mii-&gt;parent = pdata-&gt;dev;</div><div class='add'>+	mii-&gt;phy_mask = ~0;</div><div class='add'>+	snprintf(mii-&gt;id, sizeof(mii-&gt;id), "%s", dev_name(pdata-&gt;dev));</div><div class='add'>+	ret = mdiobus_register(mii);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(pdata-&gt;dev, "mdiobus_register failed\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	phy_data-&gt;mii = mii;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void xgbe_init_function_ptrs_phy_v2(struct xgbe_phy_if *phy_if)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_phy_impl_if *phy_impl = &amp;phy_if-&gt;phy_impl;</div><div class='add'>+</div><div class='add'>+	phy_impl-&gt;init			= xgbe_phy_init;</div><div class='add'>+	phy_impl-&gt;exit			= xgbe_phy_exit;</div><div class='add'>+</div><div class='add'>+	phy_impl-&gt;reset			= xgbe_phy_reset;</div><div class='add'>+	phy_impl-&gt;start			= xgbe_phy_start;</div><div class='add'>+	phy_impl-&gt;stop			= xgbe_phy_stop;</div><div class='add'>+</div><div class='add'>+	phy_impl-&gt;link_status		= xgbe_phy_link_status;</div><div class='add'>+</div><div class='add'>+	phy_impl-&gt;valid_speed		= xgbe_phy_valid_speed;</div><div class='add'>+</div><div class='add'>+	phy_impl-&gt;use_mode		= xgbe_phy_use_mode;</div><div class='add'>+	phy_impl-&gt;set_mode		= xgbe_phy_set_mode;</div><div class='add'>+	phy_impl-&gt;get_mode		= xgbe_phy_get_mode;</div><div class='add'>+	phy_impl-&gt;switch_mode		= xgbe_phy_switch_mode;</div><div class='add'>+	phy_impl-&gt;cur_mode		= xgbe_phy_cur_mode;</div><div class='add'>+</div><div class='add'>+	phy_impl-&gt;an_mode		= xgbe_phy_an_mode;</div><div class='add'>+</div><div class='add'>+	phy_impl-&gt;an_config		= xgbe_phy_an_config;</div><div class='add'>+</div><div class='add'>+	phy_impl-&gt;an_advertising	= xgbe_phy_an_advertising;</div><div class='add'>+</div><div class='add'>+	phy_impl-&gt;an_outcome		= xgbe_phy_an_outcome;</div><div class='add'>+</div><div class='add'>+	phy_impl-&gt;an_pre		= xgbe_phy_an_pre;</div><div class='add'>+	phy_impl-&gt;an_post		= xgbe_phy_an_post;</div><div class='add'>+</div><div class='add'>+	phy_impl-&gt;kr_training_pre	= xgbe_phy_kr_training_pre;</div><div class='add'>+	phy_impl-&gt;kr_training_post	= xgbe_phy_kr_training_post;</div><div class='add'>+</div><div class='add'>+	phy_impl-&gt;module_info		= xgbe_phy_module_info;</div><div class='add'>+	phy_impl-&gt;module_eeprom		= xgbe_phy_module_eeprom;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-platform.c b/drivers/net/ethernet/amd/xgbe/xgbe-platform.c<br/>new file mode 100644<br/>index 000000000000..47d53e59ccf6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-platform.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe-platform.c</a></div><div class='hunk'>@@ -0,0 +1,470 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/device.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/spinlock.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='add'>+#include &lt;linux/of_net.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/property.h&gt;</div><div class='add'>+#include &lt;linux/acpi.h&gt;</div><div class='add'>+#include &lt;linux/mdio.h&gt;</div><div class='add'>+</div><div class='add'>+#include "xgbe.h"</div><div class='add'>+#include "xgbe-common.h"</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_ACPI</div><div class='add'>+static int xgbe_acpi_support(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = pdata-&gt;dev;</div><div class='add'>+	u32 property;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Obtain the system clock setting */</div><div class='add'>+	ret = device_property_read_u32(dev, XGBE_ACPI_DMA_FREQ, &amp;property);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "unable to obtain %s property\n",</div><div class='add'>+			XGBE_ACPI_DMA_FREQ);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	pdata-&gt;sysclk_rate = property;</div><div class='add'>+</div><div class='add'>+	/* Obtain the PTP clock setting */</div><div class='add'>+	ret = device_property_read_u32(dev, XGBE_ACPI_PTP_FREQ, &amp;property);</div><div class='add'>+	if (ret) {</div><div class='add'>+		dev_err(dev, "unable to obtain %s property\n",</div><div class='add'>+			XGBE_ACPI_PTP_FREQ);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+	pdata-&gt;ptpclk_rate = property;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#else   /* CONFIG_ACPI */</div><div class='add'>+static int xgbe_acpi_support(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+#endif  /* CONFIG_ACPI */</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_OF</div><div class='add'>+static int xgbe_of_support(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = pdata-&gt;dev;</div><div class='add'>+</div><div class='add'>+	/* Obtain the system clock setting */</div><div class='add'>+	pdata-&gt;sysclk = devm_clk_get(dev, XGBE_DMA_CLOCK);</div><div class='add'>+	if (IS_ERR(pdata-&gt;sysclk)) {</div><div class='add'>+		dev_err(dev, "dma devm_clk_get failed\n");</div><div class='add'>+		return PTR_ERR(pdata-&gt;sysclk);</div><div class='add'>+	}</div><div class='add'>+	pdata-&gt;sysclk_rate = clk_get_rate(pdata-&gt;sysclk);</div><div class='add'>+</div><div class='add'>+	/* Obtain the PTP clock setting */</div><div class='add'>+	pdata-&gt;ptpclk = devm_clk_get(dev, XGBE_PTP_CLOCK);</div><div class='add'>+	if (IS_ERR(pdata-&gt;ptpclk)) {</div><div class='add'>+		dev_err(dev, "ptp devm_clk_get failed\n");</div><div class='add'>+		return PTR_ERR(pdata-&gt;ptpclk);</div><div class='add'>+	}</div><div class='add'>+	pdata-&gt;ptpclk_rate = clk_get_rate(pdata-&gt;ptpclk);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_device *xgbe_of_get_phy_pdev(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = pdata-&gt;dev;</div><div class='add'>+	struct device_node *phy_node;</div><div class='add'>+	struct platform_device *phy_pdev;</div><div class='add'>+</div><div class='add'>+	phy_node = of_parse_phandle(dev-&gt;of_node, "phy-handle", 0);</div><div class='add'>+	if (phy_node) {</div><div class='add'>+		/* Old style device tree:</div><div class='add'>+		 *   The XGBE and PHY resources are separate</div><div class='add'>+		 */</div><div class='add'>+		phy_pdev = of_find_device_by_node(phy_node);</div><div class='add'>+		of_node_put(phy_node);</div><div class='add'>+	} else {</div><div class='add'>+		/* New style device tree:</div><div class='add'>+		 *   The XGBE and PHY resources are grouped together with</div><div class='add'>+		 *   the PHY resources listed last</div><div class='add'>+		 */</div><div class='add'>+		get_device(dev);</div><div class='add'>+		phy_pdev = pdata-&gt;platdev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return phy_pdev;</div><div class='add'>+}</div><div class='add'>+#else   /* CONFIG_OF */</div><div class='add'>+static int xgbe_of_support(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_device *xgbe_of_get_phy_pdev(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+#endif  /* CONFIG_OF */</div><div class='add'>+</div><div class='add'>+static unsigned int xgbe_resource_count(struct platform_device *pdev,</div><div class='add'>+					unsigned int type)</div><div class='add'>+{</div><div class='add'>+	unsigned int count;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0, count = 0; i &lt; pdev-&gt;num_resources; i++) {</div><div class='add'>+		struct resource *res = &amp;pdev-&gt;resource[i];</div><div class='add'>+</div><div class='add'>+		if (type == resource_type(res))</div><div class='add'>+			count++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct platform_device *xgbe_get_phy_pdev(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct platform_device *phy_pdev;</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;use_acpi) {</div><div class='add'>+		get_device(pdata-&gt;dev);</div><div class='add'>+		phy_pdev = pdata-&gt;platdev;</div><div class='add'>+	} else {</div><div class='add'>+		phy_pdev = xgbe_of_get_phy_pdev(pdata);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return phy_pdev;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_platform_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata;</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct platform_device *phy_pdev;</div><div class='add'>+	const char *phy_mode;</div><div class='add'>+	unsigned int phy_memnum, phy_irqnum;</div><div class='add'>+	unsigned int dma_irqnum, dma_irqend;</div><div class='add'>+	enum dev_dma_attr attr;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	pdata = xgbe_alloc_pdata(dev);</div><div class='add'>+	if (IS_ERR(pdata)) {</div><div class='add'>+		ret = PTR_ERR(pdata);</div><div class='add'>+		goto err_alloc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pdata-&gt;platdev = pdev;</div><div class='add'>+	pdata-&gt;adev = ACPI_COMPANION(dev);</div><div class='add'>+	platform_set_drvdata(pdev, pdata);</div><div class='add'>+</div><div class='add'>+	/* Check if we should use ACPI or DT */</div><div class='add'>+	pdata-&gt;use_acpi = dev-&gt;of_node ? 0 : 1;</div><div class='add'>+</div><div class='add'>+	/* Get the version data */</div><div class='add'>+	pdata-&gt;vdata = (struct xgbe_version_data *)device_get_match_data(dev);</div><div class='add'>+</div><div class='add'>+	phy_pdev = xgbe_get_phy_pdev(pdata);</div><div class='add'>+	if (!phy_pdev) {</div><div class='add'>+		dev_err(dev, "unable to obtain phy device\n");</div><div class='add'>+		ret = -EINVAL;</div><div class='add'>+		goto err_phydev;</div><div class='add'>+	}</div><div class='add'>+	pdata-&gt;phy_platdev = phy_pdev;</div><div class='add'>+	pdata-&gt;phy_dev = &amp;phy_pdev-&gt;dev;</div><div class='add'>+</div><div class='add'>+	if (pdev == phy_pdev) {</div><div class='add'>+		/* New style device tree or ACPI:</div><div class='add'>+		 *   The XGBE and PHY resources are grouped together with</div><div class='add'>+		 *   the PHY resources listed last</div><div class='add'>+		 */</div><div class='add'>+		phy_memnum = xgbe_resource_count(pdev, IORESOURCE_MEM) - 3;</div><div class='add'>+		phy_irqnum = platform_irq_count(pdev) - 1;</div><div class='add'>+		dma_irqnum = 1;</div><div class='add'>+		dma_irqend = phy_irqnum;</div><div class='add'>+	} else {</div><div class='add'>+		/* Old style device tree:</div><div class='add'>+		 *   The XGBE and PHY resources are separate</div><div class='add'>+		 */</div><div class='add'>+		phy_memnum = 0;</div><div class='add'>+		phy_irqnum = 0;</div><div class='add'>+		dma_irqnum = 1;</div><div class='add'>+		dma_irqend = platform_irq_count(pdev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Obtain the mmio areas for the device */</div><div class='add'>+	pdata-&gt;xgmac_regs = devm_platform_ioremap_resource(pdev, 0);</div><div class='add'>+	if (IS_ERR(pdata-&gt;xgmac_regs)) {</div><div class='add'>+		dev_err(dev, "xgmac ioremap failed\n");</div><div class='add'>+		ret = PTR_ERR(pdata-&gt;xgmac_regs);</div><div class='add'>+		goto err_io;</div><div class='add'>+	}</div><div class='add'>+	if (netif_msg_probe(pdata))</div><div class='add'>+		dev_dbg(dev, "xgmac_regs = %p\n", pdata-&gt;xgmac_regs);</div><div class='add'>+</div><div class='add'>+	pdata-&gt;xpcs_regs = devm_platform_ioremap_resource(pdev, 1);</div><div class='add'>+	if (IS_ERR(pdata-&gt;xpcs_regs)) {</div><div class='add'>+		dev_err(dev, "xpcs ioremap failed\n");</div><div class='add'>+		ret = PTR_ERR(pdata-&gt;xpcs_regs);</div><div class='add'>+		goto err_io;</div><div class='add'>+	}</div><div class='add'>+	if (netif_msg_probe(pdata))</div><div class='add'>+		dev_dbg(dev, "xpcs_regs  = %p\n", pdata-&gt;xpcs_regs);</div><div class='add'>+</div><div class='add'>+	pdata-&gt;rxtx_regs = devm_platform_ioremap_resource(phy_pdev,</div><div class='add'>+							  phy_memnum++);</div><div class='add'>+	if (IS_ERR(pdata-&gt;rxtx_regs)) {</div><div class='add'>+		dev_err(dev, "rxtx ioremap failed\n");</div><div class='add'>+		ret = PTR_ERR(pdata-&gt;rxtx_regs);</div><div class='add'>+		goto err_io;</div><div class='add'>+	}</div><div class='add'>+	if (netif_msg_probe(pdata))</div><div class='add'>+		dev_dbg(dev, "rxtx_regs  = %p\n", pdata-&gt;rxtx_regs);</div><div class='add'>+</div><div class='add'>+	pdata-&gt;sir0_regs = devm_platform_ioremap_resource(phy_pdev,</div><div class='add'>+							  phy_memnum++);</div><div class='add'>+	if (IS_ERR(pdata-&gt;sir0_regs)) {</div><div class='add'>+		dev_err(dev, "sir0 ioremap failed\n");</div><div class='add'>+		ret = PTR_ERR(pdata-&gt;sir0_regs);</div><div class='add'>+		goto err_io;</div><div class='add'>+	}</div><div class='add'>+	if (netif_msg_probe(pdata))</div><div class='add'>+		dev_dbg(dev, "sir0_regs  = %p\n", pdata-&gt;sir0_regs);</div><div class='add'>+</div><div class='add'>+	pdata-&gt;sir1_regs = devm_platform_ioremap_resource(phy_pdev,</div><div class='add'>+							  phy_memnum++);</div><div class='add'>+	if (IS_ERR(pdata-&gt;sir1_regs)) {</div><div class='add'>+		dev_err(dev, "sir1 ioremap failed\n");</div><div class='add'>+		ret = PTR_ERR(pdata-&gt;sir1_regs);</div><div class='add'>+		goto err_io;</div><div class='add'>+	}</div><div class='add'>+	if (netif_msg_probe(pdata))</div><div class='add'>+		dev_dbg(dev, "sir1_regs  = %p\n", pdata-&gt;sir1_regs);</div><div class='add'>+</div><div class='add'>+	/* Retrieve the MAC address */</div><div class='add'>+	ret = device_property_read_u8_array(dev, XGBE_MAC_ADDR_PROPERTY,</div><div class='add'>+					    pdata-&gt;mac_addr,</div><div class='add'>+					    sizeof(pdata-&gt;mac_addr));</div><div class='add'>+	if (ret || !is_valid_ether_addr(pdata-&gt;mac_addr)) {</div><div class='add'>+		dev_err(dev, "invalid %s property\n", XGBE_MAC_ADDR_PROPERTY);</div><div class='add'>+		if (!ret)</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+		goto err_io;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Retrieve the PHY mode - it must be "xgmii" */</div><div class='add'>+	ret = device_property_read_string(dev, XGBE_PHY_MODE_PROPERTY,</div><div class='add'>+					  &amp;phy_mode);</div><div class='add'>+	if (ret || strcmp(phy_mode, phy_modes(PHY_INTERFACE_MODE_XGMII))) {</div><div class='add'>+		dev_err(dev, "invalid %s property\n", XGBE_PHY_MODE_PROPERTY);</div><div class='add'>+		if (!ret)</div><div class='add'>+			ret = -EINVAL;</div><div class='add'>+		goto err_io;</div><div class='add'>+	}</div><div class='add'>+	pdata-&gt;phy_mode = PHY_INTERFACE_MODE_XGMII;</div><div class='add'>+</div><div class='add'>+	/* Check for per channel interrupt support */</div><div class='add'>+	if (device_property_present(dev, XGBE_DMA_IRQS_PROPERTY)) {</div><div class='add'>+		pdata-&gt;per_channel_irq = 1;</div><div class='add'>+		pdata-&gt;channel_irq_mode = XGBE_IRQ_MODE_EDGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Obtain device settings unique to ACPI/OF */</div><div class='add'>+	if (pdata-&gt;use_acpi)</div><div class='add'>+		ret = xgbe_acpi_support(pdata);</div><div class='add'>+	else</div><div class='add'>+		ret = xgbe_of_support(pdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_io;</div><div class='add'>+</div><div class='add'>+	/* Set the DMA coherency values */</div><div class='add'>+	attr = device_get_dma_attr(dev);</div><div class='add'>+	if (attr == DEV_DMA_NOT_SUPPORTED) {</div><div class='add'>+		dev_err(dev, "DMA is not supported");</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto err_io;</div><div class='add'>+	}</div><div class='add'>+	pdata-&gt;coherent = (attr == DEV_DMA_COHERENT);</div><div class='add'>+	if (pdata-&gt;coherent) {</div><div class='add'>+		pdata-&gt;arcr = XGBE_DMA_OS_ARCR;</div><div class='add'>+		pdata-&gt;awcr = XGBE_DMA_OS_AWCR;</div><div class='add'>+	} else {</div><div class='add'>+		pdata-&gt;arcr = XGBE_DMA_SYS_ARCR;</div><div class='add'>+		pdata-&gt;awcr = XGBE_DMA_SYS_AWCR;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Set the maximum fifo amounts */</div><div class='add'>+	pdata-&gt;tx_max_fifo_size = pdata-&gt;vdata-&gt;tx_max_fifo_size;</div><div class='add'>+	pdata-&gt;rx_max_fifo_size = pdata-&gt;vdata-&gt;rx_max_fifo_size;</div><div class='add'>+</div><div class='add'>+	/* Set the hardware channel and queue counts */</div><div class='add'>+	xgbe_set_counts(pdata);</div><div class='add'>+</div><div class='add'>+	/* Always have XGMAC and XPCS (auto-negotiation) interrupts */</div><div class='add'>+	pdata-&gt;irq_count = 2;</div><div class='add'>+</div><div class='add'>+	/* Get the device interrupt */</div><div class='add'>+	ret = platform_get_irq(pdev, 0);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err_io;</div><div class='add'>+	pdata-&gt;dev_irq = ret;</div><div class='add'>+</div><div class='add'>+	/* Get the per channel DMA interrupts */</div><div class='add'>+	if (pdata-&gt;per_channel_irq) {</div><div class='add'>+		unsigned int i, max = ARRAY_SIZE(pdata-&gt;channel_irq);</div><div class='add'>+</div><div class='add'>+		for (i = 0; (i &lt; max) &amp;&amp; (dma_irqnum &lt; dma_irqend); i++) {</div><div class='add'>+			ret = platform_get_irq(pdata-&gt;platdev, dma_irqnum++);</div><div class='add'>+			if (ret &lt; 0)</div><div class='add'>+				goto err_io;</div><div class='add'>+</div><div class='add'>+			pdata-&gt;channel_irq[i] = ret;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		pdata-&gt;channel_irq_count = max;</div><div class='add'>+</div><div class='add'>+		pdata-&gt;irq_count += max;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Get the auto-negotiation interrupt */</div><div class='add'>+	ret = platform_get_irq(phy_pdev, phy_irqnum++);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		goto err_io;</div><div class='add'>+	pdata-&gt;an_irq = ret;</div><div class='add'>+</div><div class='add'>+	/* Configure the netdev resource */</div><div class='add'>+	ret = xgbe_config_netdev(pdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err_io;</div><div class='add'>+</div><div class='add'>+	netdev_notice(pdata-&gt;netdev, "net device enabled\n");</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_io:</div><div class='add'>+	platform_device_put(phy_pdev);</div><div class='add'>+</div><div class='add'>+err_phydev:</div><div class='add'>+	xgbe_free_pdata(pdata);</div><div class='add'>+</div><div class='add'>+err_alloc:</div><div class='add'>+	dev_notice(dev, "net device not enabled\n");</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgbe_platform_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = platform_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	xgbe_deconfig_netdev(pdata);</div><div class='add'>+</div><div class='add'>+	platform_device_put(pdata-&gt;phy_platdev);</div><div class='add'>+</div><div class='add'>+	xgbe_free_pdata(pdata);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PM_SLEEP</div><div class='add'>+static int xgbe_platform_suspend(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = dev_get_drvdata(dev);</div><div class='add'>+	struct net_device *netdev = pdata-&gt;netdev;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	DBGPR("--&gt;xgbe_suspend\n");</div><div class='add'>+</div><div class='add'>+	if (netif_running(netdev))</div><div class='add'>+		ret = xgbe_powerdown(netdev, XGMAC_DRIVER_CONTEXT);</div><div class='add'>+</div><div class='add'>+	pdata-&gt;lpm_ctrl = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1);</div><div class='add'>+	pdata-&gt;lpm_ctrl |= MDIO_CTRL1_LPOWER;</div><div class='add'>+	XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, pdata-&gt;lpm_ctrl);</div><div class='add'>+</div><div class='add'>+	DBGPR("&lt;--xgbe_suspend\n");</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_platform_resume(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = dev_get_drvdata(dev);</div><div class='add'>+	struct net_device *netdev = pdata-&gt;netdev;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	DBGPR("--&gt;xgbe_resume\n");</div><div class='add'>+</div><div class='add'>+	pdata-&gt;lpm_ctrl &amp;= ~MDIO_CTRL1_LPOWER;</div><div class='add'>+	XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, pdata-&gt;lpm_ctrl);</div><div class='add'>+</div><div class='add'>+	if (netif_running(netdev)) {</div><div class='add'>+		ret = xgbe_powerup(netdev, XGMAC_DRIVER_CONTEXT);</div><div class='add'>+</div><div class='add'>+		/* Schedule a restart in case the link or phy state changed</div><div class='add'>+		 * while we were powered down.</div><div class='add'>+		 */</div><div class='add'>+		schedule_work(&amp;pdata-&gt;restart_work);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	DBGPR("&lt;--xgbe_resume\n");</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+#endif /* CONFIG_PM_SLEEP */</div><div class='add'>+</div><div class='add'>+static const struct xgbe_version_data xgbe_v1 = {</div><div class='add'>+	.init_function_ptrs_phy_impl	= xgbe_init_function_ptrs_phy_v1,</div><div class='add'>+	.xpcs_access			= XGBE_XPCS_ACCESS_V1,</div><div class='add'>+	.tx_max_fifo_size		= 81920,</div><div class='add'>+	.rx_max_fifo_size		= 81920,</div><div class='add'>+	.tx_tstamp_workaround		= 1,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct acpi_device_id xgbe_acpi_match[] = {</div><div class='add'>+	{ .id = "AMDI8001",</div><div class='add'>+	  .driver_data = (kernel_ulong_t)&amp;xgbe_v1 },</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+MODULE_DEVICE_TABLE(acpi, xgbe_acpi_match);</div><div class='add'>+</div><div class='add'>+static const struct of_device_id xgbe_of_match[] = {</div><div class='add'>+	{ .compatible = "amd,xgbe-seattle-v1a",</div><div class='add'>+	  .data = &amp;xgbe_v1 },</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+MODULE_DEVICE_TABLE(of, xgbe_of_match);</div><div class='add'>+</div><div class='add'>+static SIMPLE_DEV_PM_OPS(xgbe_platform_pm_ops,</div><div class='add'>+			 xgbe_platform_suspend, xgbe_platform_resume);</div><div class='add'>+</div><div class='add'>+static struct platform_driver xgbe_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		.name = XGBE_DRV_NAME,</div><div class='add'>+		.acpi_match_table = xgbe_acpi_match,</div><div class='add'>+		.of_match_table = xgbe_of_match,</div><div class='add'>+		.pm = &amp;xgbe_platform_pm_ops,</div><div class='add'>+	},</div><div class='add'>+	.probe = xgbe_platform_probe,</div><div class='add'>+	.remove = xgbe_platform_remove,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int xgbe_platform_init(void)</div><div class='add'>+{</div><div class='add'>+	return platform_driver_register(&amp;xgbe_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void xgbe_platform_exit(void)</div><div class='add'>+{</div><div class='add'>+	platform_driver_unregister(&amp;xgbe_driver);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-pps.c b/drivers/net/ethernet/amd/xgbe/xgbe-pps.c<br/>new file mode 100644<br/>index 000000000000..6d03ae7ab36f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-pps.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe-pps.c</a></div><div class='hunk'>@@ -0,0 +1,74 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='add'>+ *</div><div class='add'>+ * Author: Raju Rangoju &lt;Raju.Rangoju@amd.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "xgbe.h"</div><div class='add'>+#include "xgbe-common.h"</div><div class='add'>+</div><div class='add'>+static u32 get_pps_mask(unsigned int x)</div><div class='add'>+{</div><div class='add'>+	return GENMASK(PPS_MAXIDX(x), PPS_MINIDX(x));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 get_pps_cmd(unsigned int x, u32 val)</div><div class='add'>+{</div><div class='add'>+	return (val &amp; GENMASK(3, 0)) &lt;&lt; PPS_MINIDX(x);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 get_target_mode_sel(unsigned int x, u32 val)</div><div class='add'>+{</div><div class='add'>+	return (val &amp; GENMASK(1, 0)) &lt;&lt; (PPS_MAXIDX(x) - 2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int xgbe_pps_config(struct xgbe_prv_data *pdata,</div><div class='add'>+		    struct xgbe_pps_config *cfg, int index, bool on)</div><div class='add'>+{</div><div class='add'>+	unsigned int ppscr = 0;</div><div class='add'>+	unsigned int tnsec;</div><div class='add'>+	u64 period;</div><div class='add'>+</div><div class='add'>+	/* Check if target time register is busy */</div><div class='add'>+	tnsec = XGMAC_IOREAD(pdata, MAC_PPSx_TTNSR(index));</div><div class='add'>+	if (XGMAC_GET_BITS(tnsec, MAC_PPSx_TTNSR, TRGTBUSY0))</div><div class='add'>+		return -EBUSY;</div><div class='add'>+</div><div class='add'>+	ppscr = XGMAC_IOREAD(pdata, MAC_PPSCR);</div><div class='add'>+	ppscr &amp;= ~get_pps_mask(index);</div><div class='add'>+</div><div class='add'>+	if (!on) {</div><div class='add'>+		/* Disable PPS output */</div><div class='add'>+		ppscr |= get_pps_cmd(index, XGBE_PPSCMD_STOP);</div><div class='add'>+		ppscr |= PPSEN0;</div><div class='add'>+		XGMAC_IOWRITE(pdata, MAC_PPSCR, ppscr);</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Configure start time */</div><div class='add'>+	XGMAC_IOWRITE(pdata, MAC_PPSx_TTSR(index), cfg-&gt;start.tv_sec);</div><div class='add'>+	XGMAC_IOWRITE(pdata, MAC_PPSx_TTNSR(index), cfg-&gt;start.tv_nsec);</div><div class='add'>+</div><div class='add'>+	period = cfg-&gt;period.tv_sec * NSEC_PER_SEC + cfg-&gt;period.tv_nsec;</div><div class='add'>+	period = div_u64(period, XGBE_V2_TSTAMP_SSINC);</div><div class='add'>+</div><div class='add'>+	if (period &lt; 4)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* Configure interval and pulse width (50% duty cycle) */</div><div class='add'>+	XGMAC_IOWRITE(pdata, MAC_PPSx_INTERVAL(index), period - 1);</div><div class='add'>+	XGMAC_IOWRITE(pdata, MAC_PPSx_WIDTH(index), (period &gt;&gt; 1) - 1);</div><div class='add'>+</div><div class='add'>+	/* Enable PPS with pulse train mode */</div><div class='add'>+	ppscr |= get_pps_cmd(index, XGBE_PPSCMD_START);</div><div class='add'>+	ppscr |= get_target_mode_sel(index, XGBE_PPSTARGET_PULSE);</div><div class='add'>+	ppscr |= PPSEN0;</div><div class='add'>+</div><div class='add'>+	XGMAC_IOWRITE(pdata, MAC_PPSCR, ppscr);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-ptp.c b/drivers/net/ethernet/amd/xgbe/xgbe-ptp.c<br/>index b03e4f58d02e..0e0b8ec3b504 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-ptp.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/xgbe/xgbe-ptp.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe-ptp.c</a></div><div class='hunk'>@@ -1,117 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='ctx'> /*</div><div class='del'>- * AMD 10Gb Ethernet driver</div><div class='del'>- *</div><div class='del'>- * This file is available to you under your choice of the following two</div><div class='del'>- * licenses:</div><div class='del'>- *</div><div class='del'>- * License 1: GPLv2</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014 Advanced Micro Devices, Inc.</div><div class='del'>- *</div><div class='del'>- * This file is free software; you may copy, redistribute and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation, either version 2 of the License, or (at</div><div class='del'>- * your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This file is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- * License 2: Modified BSD</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014 Advanced Micro Devices, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * Redistribution and use in source and binary forms, with or without</div><div class='del'>- * modification, are permitted provided that the following conditions are met:</div><div class='del'>- *     * Redistributions of source code must retain the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer.</div><div class='del'>- *     * Redistributions in binary form must reproduce the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer in the</div><div class='del'>- *       documentation and/or other materials provided with the distribution.</div><div class='del'>- *     * Neither the name of Advanced Micro Devices, Inc. nor the</div><div class='del'>- *       names of its contributors may be used to endorse or promote products</div><div class='del'>- *       derived from this software without specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"</div><div class='del'>- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE</div><div class='del'>- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE</div><div class='del'>- * ARE DISCLAIMED. IN NO EVENT SHALL &lt;COPYRIGHT HOLDER&gt; BE LIABLE FOR ANY</div><div class='del'>- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES</div><div class='del'>- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;</div><div class='del'>- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND</div><div class='del'>- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='del'>- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF</div><div class='del'>- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='hunk'>@@ -122,43 +13,19 @@</div><div class='ctx'> #include "xgbe.h"</div><div class='ctx'> #include "xgbe-common.h"</div><div class='ctx'> </div><div class='del'>-static cycle_t xgbe_cc_read(const struct cyclecounter *cc)</div><div class='del'>-{</div><div class='del'>-	struct xgbe_prv_data *pdata = container_of(cc,</div><div class='del'>-						   struct xgbe_prv_data,</div><div class='del'>-						   tstamp_cc);</div><div class='del'>-	u64 nsec;</div><div class='del'>-</div><div class='del'>-	nsec = pdata-&gt;hw_if.get_tstamp_time(pdata);</div><div class='del'>-</div><div class='del'>-	return nsec;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int xgbe_adjfreq(struct ptp_clock_info *info, s32 delta)</div><div class='add'>+static int xgbe_adjfine(struct ptp_clock_info *info, long scaled_ppm)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgbe_prv_data *pdata = container_of(info,</div><div class='ctx'> 						   struct xgbe_prv_data,</div><div class='ctx'> 						   ptp_clock_info);</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-	u64 adjust;</div><div class='del'>-	u32 addend, diff;</div><div class='del'>-	unsigned int neg_adjust = 0;</div><div class='add'>+	u64 addend;</div><div class='ctx'> </div><div class='del'>-	if (delta &lt; 0) {</div><div class='del'>-		neg_adjust = 1;</div><div class='del'>-		delta = -delta;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	adjust = pdata-&gt;tstamp_addend;</div><div class='del'>-	adjust *= delta;</div><div class='del'>-	diff = div_u64(adjust, 1000000000UL);</div><div class='del'>-</div><div class='del'>-	addend = (neg_adjust) ? pdata-&gt;tstamp_addend - diff :</div><div class='del'>-				pdata-&gt;tstamp_addend + diff;</div><div class='add'>+	addend = adjust_by_scaled_ppm(pdata-&gt;tstamp_addend, scaled_ppm);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;pdata-&gt;tstamp_lock, flags);</div><div class='ctx'> </div><div class='del'>-	pdata-&gt;hw_if.update_tstamp_addend(pdata, addend);</div><div class='add'>+	xgbe_update_tstamp_addend(pdata, addend);</div><div class='ctx'> </div><div class='ctx'> 	spin_unlock_irqrestore(&amp;pdata-&gt;tstamp_lock, flags);</div><div class='ctx'> </div><div class='hunk'>@@ -170,16 +37,39 @@ static int xgbe_adjtime(struct ptp_clock_info *info, s64 delta)</div><div class='ctx'> 	struct xgbe_prv_data *pdata = container_of(info,</div><div class='ctx'> 						   struct xgbe_prv_data,</div><div class='ctx'> 						   ptp_clock_info);</div><div class='add'>+	unsigned int neg_adjust = 0;</div><div class='add'>+	unsigned int sec, nsec;</div><div class='add'>+	u32 quotient, reminder;</div><div class='ctx'> 	unsigned long flags;</div><div class='ctx'> </div><div class='add'>+	if (delta &lt; 0) {</div><div class='add'>+		neg_adjust = 1;</div><div class='add'>+		delta = -delta;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	quotient = div_u64_rem(delta, 1000000000ULL, &amp;reminder);</div><div class='add'>+	sec = quotient;</div><div class='add'>+	nsec = reminder;</div><div class='add'>+</div><div class='add'>+	/* Negative adjustment for Hw timer register. */</div><div class='add'>+	if (neg_adjust) {</div><div class='add'>+		sec = -sec;</div><div class='add'>+		if (XGMAC_IOREAD_BITS(pdata, MAC_TSCR, TSCTRLSSR))</div><div class='add'>+			nsec = (1000000000UL - nsec);</div><div class='add'>+		else</div><div class='add'>+			nsec = (0x80000000UL - nsec);</div><div class='add'>+	}</div><div class='add'>+	nsec = (neg_adjust &lt;&lt; 31) | nsec;</div><div class='add'>+</div><div class='ctx'> 	spin_lock_irqsave(&amp;pdata-&gt;tstamp_lock, flags);</div><div class='del'>-	timecounter_adjtime(&amp;pdata-&gt;tstamp_tc, delta);</div><div class='add'>+	xgbe_update_tstamp_time(pdata, sec, nsec);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;pdata-&gt;tstamp_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgbe_gettime(struct ptp_clock_info *info, struct timespec64 *ts)</div><div class='add'>+static int xgbe_gettimex(struct ptp_clock_info *info, struct timespec64 *ts,</div><div class='add'>+			 struct ptp_system_timestamp *sts)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgbe_prv_data *pdata = container_of(info,</div><div class='ctx'> 						   struct xgbe_prv_data,</div><div class='hunk'>@@ -188,9 +78,9 @@ static int xgbe_gettime(struct ptp_clock_info *info, struct timespec64 *ts)</div><div class='ctx'> 	u64 nsec;</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;pdata-&gt;tstamp_lock, flags);</div><div class='del'>-</div><div class='del'>-	nsec = timecounter_read(&amp;pdata-&gt;tstamp_tc);</div><div class='del'>-</div><div class='add'>+	ptp_read_system_prets(sts);</div><div class='add'>+	nsec = xgbe_get_tstamp_time(pdata);</div><div class='add'>+	ptp_read_system_postts(sts);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;pdata-&gt;tstamp_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	*ts = ns_to_timespec64(nsec);</div><div class='hunk'>@@ -205,14 +95,9 @@ static int xgbe_settime(struct ptp_clock_info *info,</div><div class='ctx'> 						   struct xgbe_prv_data,</div><div class='ctx'> 						   ptp_clock_info);</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-	u64 nsec;</div><div class='del'>-</div><div class='del'>-	nsec = timespec64_to_ns(ts);</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;pdata-&gt;tstamp_lock, flags);</div><div class='del'>-</div><div class='del'>-	timecounter_init(&amp;pdata-&gt;tstamp_tc, &amp;pdata-&gt;tstamp_cc, nsec);</div><div class='del'>-</div><div class='add'>+	xgbe_set_tstamp_time(pdata, ts-&gt;tv_sec, ts-&gt;tv_nsec);</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;pdata-&gt;tstamp_lock, flags);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='hunk'>@@ -221,24 +106,46 @@ static int xgbe_settime(struct ptp_clock_info *info,</div><div class='ctx'> static int xgbe_enable(struct ptp_clock_info *info,</div><div class='ctx'> 		       struct ptp_clock_request *request, int on)</div><div class='ctx'> {</div><div class='del'>-	return -EOPNOTSUPP;</div><div class='add'>+	struct xgbe_prv_data *pdata = container_of(info, struct xgbe_prv_data,</div><div class='add'>+						   ptp_clock_info);</div><div class='add'>+	struct xgbe_pps_config *pps_cfg;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	dev_dbg(pdata-&gt;dev, "rq-&gt;type %d on %d\n", request-&gt;type, on);</div><div class='add'>+</div><div class='add'>+	if (request-&gt;type != PTP_CLK_REQ_PEROUT)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	pps_cfg = &amp;pdata-&gt;pps[request-&gt;perout.index];</div><div class='add'>+</div><div class='add'>+	pps_cfg-&gt;start.tv_sec = request-&gt;perout.start.sec;</div><div class='add'>+	pps_cfg-&gt;start.tv_nsec = request-&gt;perout.start.nsec;</div><div class='add'>+	pps_cfg-&gt;period.tv_sec = request-&gt;perout.period.sec;</div><div class='add'>+	pps_cfg-&gt;period.tv_nsec = request-&gt;perout.period.nsec;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;pdata-&gt;tstamp_lock, flags);</div><div class='add'>+	ret = xgbe_pps_config(pdata, pps_cfg, request-&gt;perout.index, on);</div><div class='add'>+	spin_unlock_irqrestore(&amp;pdata-&gt;tstamp_lock, flags);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void xgbe_ptp_register(struct xgbe_prv_data *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	struct ptp_clock_info *info = &amp;pdata-&gt;ptp_clock_info;</div><div class='ctx'> 	struct ptp_clock *clock;</div><div class='del'>-	struct cyclecounter *cc = &amp;pdata-&gt;tstamp_cc;</div><div class='del'>-	u64 dividend;</div><div class='ctx'> </div><div class='ctx'> 	snprintf(info-&gt;name, sizeof(info-&gt;name), "%s",</div><div class='ctx'> 		 netdev_name(pdata-&gt;netdev));</div><div class='ctx'> 	info-&gt;owner = THIS_MODULE;</div><div class='ctx'> 	info-&gt;max_adj = pdata-&gt;ptpclk_rate;</div><div class='del'>-	info-&gt;adjfreq = xgbe_adjfreq;</div><div class='add'>+	info-&gt;adjfine = xgbe_adjfine;</div><div class='ctx'> 	info-&gt;adjtime = xgbe_adjtime;</div><div class='del'>-	info-&gt;gettime64 = xgbe_gettime;</div><div class='add'>+	info-&gt;gettimex64 = xgbe_gettimex;</div><div class='ctx'> 	info-&gt;settime64 = xgbe_settime;</div><div class='add'>+	info-&gt;n_per_out = pdata-&gt;hw_feat.pps_out_num;</div><div class='add'>+	info-&gt;n_ext_ts = pdata-&gt;hw_feat.aux_snap_num;</div><div class='ctx'> 	info-&gt;enable = xgbe_enable;</div><div class='ctx'> </div><div class='ctx'> 	clock = ptp_clock_register(info, pdata-&gt;dev);</div><div class='hunk'>@@ -249,25 +156,8 @@ void xgbe_ptp_register(struct xgbe_prv_data *pdata)</div><div class='ctx'> </div><div class='ctx'> 	pdata-&gt;ptp_clock = clock;</div><div class='ctx'> </div><div class='del'>-	/* Calculate the addend:</div><div class='del'>-	 *   addend = 2^32 / (PTP ref clock / 50Mhz)</div><div class='del'>-	 *          = (2^32 * 50Mhz) / PTP ref clock</div><div class='del'>-	 */</div><div class='del'>-	dividend = 50000000;</div><div class='del'>-	dividend &lt;&lt;= 32;</div><div class='del'>-	pdata-&gt;tstamp_addend = div_u64(dividend, pdata-&gt;ptpclk_rate);</div><div class='del'>-</div><div class='del'>-	/* Setup the timecounter */</div><div class='del'>-	cc-&gt;read = xgbe_cc_read;</div><div class='del'>-	cc-&gt;mask = CLOCKSOURCE_MASK(64);</div><div class='del'>-	cc-&gt;mult = 1;</div><div class='del'>-	cc-&gt;shift = 0;</div><div class='del'>-</div><div class='del'>-	timecounter_init(&amp;pdata-&gt;tstamp_tc, &amp;pdata-&gt;tstamp_cc,</div><div class='del'>-			 ktime_to_ns(ktime_get_real()));</div><div class='del'>-</div><div class='ctx'> 	/* Disable all timestamping to start */</div><div class='del'>-	XGMAC_IOWRITE(pdata, MAC_TCR, 0);</div><div class='add'>+	XGMAC_IOWRITE(pdata, MAC_TSCR, 0);</div><div class='ctx'> 	pdata-&gt;tstamp_config.tx_type = HWTSTAMP_TX_OFF;</div><div class='ctx'> 	pdata-&gt;tstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;</div><div class='ctx'> }</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-selftest.c b/drivers/net/ethernet/amd/xgbe/xgbe-selftest.c<br/>new file mode 100644<br/>index 000000000000..55e5e467facd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-selftest.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe-selftest.c</a></div><div class='hunk'>@@ -0,0 +1,346 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='add'>+ *</div><div class='add'>+ * Author: Raju Rangoju &lt;Raju.Rangoju@amd.com&gt;</div><div class='add'>+ */</div><div class='add'>+#include &lt;linux/crc32.h&gt;</div><div class='add'>+#include &lt;linux/ip.h&gt;</div><div class='add'>+#include &lt;linux/udp.h&gt;</div><div class='add'>+#include &lt;net/tcp.h&gt;</div><div class='add'>+#include &lt;net/udp.h&gt;</div><div class='add'>+#include &lt;net/checksum.h&gt;</div><div class='add'>+#include &lt;net/selftests.h&gt;</div><div class='add'>+</div><div class='add'>+#include "xgbe.h"</div><div class='add'>+#include "xgbe-common.h"</div><div class='add'>+</div><div class='add'>+#define XGBE_LOOPBACK_NONE	0</div><div class='add'>+#define XGBE_LOOPBACK_MAC	1</div><div class='add'>+#define XGBE_LOOPBACK_PHY	2</div><div class='add'>+</div><div class='add'>+struct xgbe_test {</div><div class='add'>+	char name[ETH_GSTRING_LEN];</div><div class='add'>+	int lb;</div><div class='add'>+	int (*fn)(struct xgbe_prv_data *pdata);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static u8 xgbe_test_id;</div><div class='add'>+</div><div class='add'>+static int xgbe_test_loopback_validate(struct sk_buff *skb,</div><div class='add'>+				       struct net_device *ndev,</div><div class='add'>+				       struct packet_type *pt,</div><div class='add'>+				       struct net_device *orig_ndev)</div><div class='add'>+{</div><div class='add'>+	struct net_test_priv *tdata = pt-&gt;af_packet_priv;</div><div class='add'>+	const unsigned char *dst = tdata-&gt;packet-&gt;dst;</div><div class='add'>+	const unsigned char *src = tdata-&gt;packet-&gt;src;</div><div class='add'>+	struct netsfhdr *hdr;</div><div class='add'>+	struct ethhdr *eh;</div><div class='add'>+	struct tcphdr *th;</div><div class='add'>+	struct udphdr *uh;</div><div class='add'>+	struct iphdr *ih;</div><div class='add'>+	int eat;</div><div class='add'>+</div><div class='add'>+	skb = skb_unshare(skb, GFP_ATOMIC);</div><div class='add'>+	if (!skb)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	eat = (skb-&gt;tail + skb-&gt;data_len) - skb-&gt;end;</div><div class='add'>+	if (eat &gt; 0 &amp;&amp; skb_shared(skb)) {</div><div class='add'>+		skb = skb_share_check(skb, GFP_ATOMIC);</div><div class='add'>+		if (!skb)</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (skb_linearize(skb))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	if (skb_headlen(skb) &lt; (NET_TEST_PKT_SIZE - ETH_HLEN))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	eh = (struct ethhdr *)skb_mac_header(skb);</div><div class='add'>+	if (dst) {</div><div class='add'>+		if (!ether_addr_equal_unaligned(eh-&gt;h_dest, dst))</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+	if (src) {</div><div class='add'>+		if (!ether_addr_equal_unaligned(eh-&gt;h_source, src))</div><div class='add'>+			goto out;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ih = ip_hdr(skb);</div><div class='add'>+</div><div class='add'>+	if (tdata-&gt;packet-&gt;tcp) {</div><div class='add'>+		if (ih-&gt;protocol != IPPROTO_TCP)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		th = (struct tcphdr *)((u8 *)ih + 4 * ih-&gt;ihl);</div><div class='add'>+		if (th-&gt;dest != htons(tdata-&gt;packet-&gt;dport))</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		hdr = (struct netsfhdr *)((u8 *)th + sizeof(*th));</div><div class='add'>+	} else {</div><div class='add'>+		if (ih-&gt;protocol != IPPROTO_UDP)</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		uh = (struct udphdr *)((u8 *)ih + 4 * ih-&gt;ihl);</div><div class='add'>+		if (uh-&gt;dest != htons(tdata-&gt;packet-&gt;dport))</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		hdr = (struct netsfhdr *)((u8 *)uh + sizeof(*uh));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (hdr-&gt;magic != cpu_to_be64(NET_TEST_PKT_MAGIC))</div><div class='add'>+		goto out;</div><div class='add'>+	if (tdata-&gt;packet-&gt;id != hdr-&gt;id)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	tdata-&gt;ok = true;</div><div class='add'>+	complete(&amp;tdata-&gt;comp);</div><div class='add'>+out:</div><div class='add'>+	kfree_skb(skb);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __xgbe_test_loopback(struct xgbe_prv_data *pdata,</div><div class='add'>+				struct net_packet_attrs *attr)</div><div class='add'>+{</div><div class='add'>+	struct net_test_priv *tdata;</div><div class='add'>+	struct sk_buff *skb = NULL;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	tdata = kzalloc(sizeof(*tdata), GFP_KERNEL);</div><div class='add'>+	if (!tdata)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	tdata-&gt;ok = false;</div><div class='add'>+	init_completion(&amp;tdata-&gt;comp);</div><div class='add'>+</div><div class='add'>+	tdata-&gt;pt.type = htons(ETH_P_IP);</div><div class='add'>+	tdata-&gt;pt.func = xgbe_test_loopback_validate;</div><div class='add'>+	tdata-&gt;pt.dev = pdata-&gt;netdev;</div><div class='add'>+	tdata-&gt;pt.af_packet_priv = tdata;</div><div class='add'>+	tdata-&gt;packet = attr;</div><div class='add'>+</div><div class='add'>+	dev_add_pack(&amp;tdata-&gt;pt);</div><div class='add'>+</div><div class='add'>+	skb = net_test_get_skb(pdata-&gt;netdev, xgbe_test_id, attr);</div><div class='add'>+	if (!skb) {</div><div class='add'>+		ret = -ENOMEM;</div><div class='add'>+		goto cleanup;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	xgbe_test_id++;</div><div class='add'>+	ret = dev_direct_xmit(skb, attr-&gt;queue_mapping);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto cleanup;</div><div class='add'>+</div><div class='add'>+	if (!attr-&gt;timeout)</div><div class='add'>+		attr-&gt;timeout = NET_LB_TIMEOUT;</div><div class='add'>+</div><div class='add'>+	wait_for_completion_timeout(&amp;tdata-&gt;comp, attr-&gt;timeout);</div><div class='add'>+	ret = tdata-&gt;ok ? 0 : -ETIMEDOUT;</div><div class='add'>+</div><div class='add'>+	if (ret)</div><div class='add'>+		netdev_err(pdata-&gt;netdev, "Response timedout: ret %d\n", ret);</div><div class='add'>+cleanup:</div><div class='add'>+	dev_remove_pack(&amp;tdata-&gt;pt);</div><div class='add'>+	kfree(tdata);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_test_mac_loopback(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct net_packet_attrs attr = {};</div><div class='add'>+</div><div class='add'>+	attr.dst = pdata-&gt;netdev-&gt;dev_addr;</div><div class='add'>+	return __xgbe_test_loopback(pdata, &amp;attr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_test_phy_loopback(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct net_packet_attrs attr = {};</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!pdata-&gt;netdev-&gt;phydev) {</div><div class='add'>+		netdev_err(pdata-&gt;netdev, "phydev not found: cannot start PHY loopback test\n");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = phy_loopback(pdata-&gt;netdev-&gt;phydev, true, 0);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	attr.dst = pdata-&gt;netdev-&gt;dev_addr;</div><div class='add'>+	ret = __xgbe_test_loopback(pdata, &amp;attr);</div><div class='add'>+</div><div class='add'>+	phy_loopback(pdata-&gt;netdev-&gt;phydev, false, 0);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_test_sph(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct net_packet_attrs attr = {};</div><div class='add'>+	unsigned long cnt_end, cnt_start;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	cnt_start = pdata-&gt;ext_stats.rx_split_header_packets;</div><div class='add'>+</div><div class='add'>+	if (!pdata-&gt;sph) {</div><div class='add'>+		netdev_err(pdata-&gt;netdev, "Split Header not enabled\n");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* UDP test */</div><div class='add'>+	attr.dst = pdata-&gt;netdev-&gt;dev_addr;</div><div class='add'>+	attr.tcp = false;</div><div class='add'>+</div><div class='add'>+	ret = __xgbe_test_loopback(pdata, &amp;attr);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	cnt_end = pdata-&gt;ext_stats.rx_split_header_packets;</div><div class='add'>+	if (cnt_end &lt;= cnt_start)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* TCP test */</div><div class='add'>+	cnt_start = cnt_end;</div><div class='add'>+</div><div class='add'>+	attr.dst = pdata-&gt;netdev-&gt;dev_addr;</div><div class='add'>+	attr.tcp = true;</div><div class='add'>+</div><div class='add'>+	ret = __xgbe_test_loopback(pdata, &amp;attr);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	cnt_end = pdata-&gt;ext_stats.rx_split_header_packets;</div><div class='add'>+	if (cnt_end &lt;= cnt_start)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgbe_test_jumbo(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	struct net_packet_attrs attr = {};</div><div class='add'>+	int size = pdata-&gt;rx_buf_size;</div><div class='add'>+</div><div class='add'>+	attr.dst = pdata-&gt;netdev-&gt;dev_addr;</div><div class='add'>+	attr.max_size = size - ETH_FCS_LEN;</div><div class='add'>+</div><div class='add'>+	return __xgbe_test_loopback(pdata, &amp;attr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct xgbe_test xgbe_selftests[] = {</div><div class='add'>+	{</div><div class='add'>+		.name = "MAC Loopback   ",</div><div class='add'>+		.lb = XGBE_LOOPBACK_MAC,</div><div class='add'>+		.fn = xgbe_test_mac_loopback,</div><div class='add'>+	}, {</div><div class='add'>+		.name = "PHY Loopback   ",</div><div class='add'>+		.lb = XGBE_LOOPBACK_NONE,</div><div class='add'>+		.fn = xgbe_test_phy_loopback,</div><div class='add'>+	}, {</div><div class='add'>+		.name = "Split Header   ",</div><div class='add'>+		.lb = XGBE_LOOPBACK_PHY,</div><div class='add'>+		.fn = xgbe_test_sph,</div><div class='add'>+	}, {</div><div class='add'>+		.name = "Jumbo Frame    ",</div><div class='add'>+		.lb = XGBE_LOOPBACK_PHY,</div><div class='add'>+		.fn = xgbe_test_jumbo,</div><div class='add'>+	},</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void xgbe_selftest_run(struct net_device *dev,</div><div class='add'>+		       struct ethtool_test *etest, u64 *buf)</div><div class='add'>+{</div><div class='add'>+	struct xgbe_prv_data *pdata = netdev_priv(dev);</div><div class='add'>+	int count = xgbe_selftest_get_count(pdata);</div><div class='add'>+	int i, ret;</div><div class='add'>+</div><div class='add'>+	memset(buf, 0, sizeof(*buf) * count);</div><div class='add'>+	xgbe_test_id = 0;</div><div class='add'>+</div><div class='add'>+	if (etest-&gt;flags != ETH_TEST_FL_OFFLINE) {</div><div class='add'>+		netdev_err(pdata-&gt;netdev, "Only offline tests are supported\n");</div><div class='add'>+		etest-&gt;flags |= ETH_TEST_FL_FAILED;</div><div class='add'>+		return;</div><div class='add'>+	} else if (!netif_carrier_ok(dev)) {</div><div class='add'>+		netdev_err(pdata-&gt;netdev,</div><div class='add'>+			   "Invalid link, cannot execute tests\n");</div><div class='add'>+		etest-&gt;flags |= ETH_TEST_FL_FAILED;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Wait for queues drain */</div><div class='add'>+	msleep(200);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; count; i++) {</div><div class='add'>+		ret = 0;</div><div class='add'>+</div><div class='add'>+		switch (xgbe_selftests[i].lb) {</div><div class='add'>+		case XGBE_LOOPBACK_PHY:</div><div class='add'>+			ret = -EOPNOTSUPP;</div><div class='add'>+			if (dev-&gt;phydev)</div><div class='add'>+				ret = phy_loopback(dev-&gt;phydev, true, 0);</div><div class='add'>+			if (!ret)</div><div class='add'>+				break;</div><div class='add'>+			fallthrough;</div><div class='add'>+		case XGBE_LOOPBACK_MAC:</div><div class='add'>+			ret = xgbe_enable_mac_loopback(pdata);</div><div class='add'>+			break;</div><div class='add'>+		case XGBE_LOOPBACK_NONE:</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			ret = -EOPNOTSUPP;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * First tests will always be MAC / PHY loopback.</div><div class='add'>+		 * If any of them is not supported we abort earlier.</div><div class='add'>+		 */</div><div class='add'>+		if (ret) {</div><div class='add'>+			netdev_err(pdata-&gt;netdev, "Loopback not supported\n");</div><div class='add'>+			etest-&gt;flags |= ETH_TEST_FL_FAILED;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ret = xgbe_selftests[i].fn(pdata);</div><div class='add'>+		if (ret &amp;&amp; (ret != -EOPNOTSUPP))</div><div class='add'>+			etest-&gt;flags |= ETH_TEST_FL_FAILED;</div><div class='add'>+		buf[i] = ret;</div><div class='add'>+</div><div class='add'>+		switch (xgbe_selftests[i].lb) {</div><div class='add'>+		case XGBE_LOOPBACK_PHY:</div><div class='add'>+			ret = -EOPNOTSUPP;</div><div class='add'>+			if (dev-&gt;phydev)</div><div class='add'>+				ret = phy_loopback(dev-&gt;phydev, false, 0);</div><div class='add'>+			if (!ret)</div><div class='add'>+				break;</div><div class='add'>+			fallthrough;</div><div class='add'>+		case XGBE_LOOPBACK_MAC:</div><div class='add'>+			xgbe_disable_mac_loopback(pdata);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void xgbe_selftest_get_strings(struct xgbe_prv_data *pdata, u8 *data)</div><div class='add'>+{</div><div class='add'>+	u8 *p = data;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; xgbe_selftest_get_count(pdata); i++)</div><div class='add'>+		ethtool_puts(&amp;p, xgbe_selftests[i].name);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int xgbe_selftest_get_count(struct xgbe_prv_data *pdata)</div><div class='add'>+{</div><div class='add'>+	return ARRAY_SIZE(xgbe_selftests);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-smn.h b/drivers/net/ethernet/amd/xgbe/xgbe-smn.h<br/>new file mode 100644<br/>index 000000000000..c6ae127ced03<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe-smn.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe-smn.h</a></div><div class='hunk'>@@ -0,0 +1,30 @@</div><div class='add'>+/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) */</div><div class='add'>+/*</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='add'>+ *</div><div class='add'>+ * Author: Raju Rangoju &lt;Raju.Rangoju@amd.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __SMN_H__</div><div class='add'>+#define __SMN_H__</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_AMD_NB</div><div class='add'>+</div><div class='add'>+#include &lt;asm/amd/nb.h&gt;</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+</div><div class='add'>+static inline int amd_smn_write(u16 node, u32 address, u32 value)</div><div class='add'>+{</div><div class='add'>+	return -ENODEV;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int amd_smn_read(u16 node, u32 address, u32 *value)</div><div class='add'>+{</div><div class='add'>+	return -ENODEV;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/amd/xgbe/xgbe.h b/drivers/net/ethernet/amd/xgbe/xgbe.h<br/>index 717ce21b6077..03ef0f548483 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/amd/xgbe/xgbe.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/amd/xgbe/xgbe.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/amd/xgbe/xgbe.h</a></div><div class='hunk'>@@ -1,117 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)</div><div class='ctx'> /*</div><div class='del'>- * AMD 10Gb Ethernet driver</div><div class='del'>- *</div><div class='del'>- * This file is available to you under your choice of the following two</div><div class='del'>- * licenses:</div><div class='del'>- *</div><div class='del'>- * License 1: GPLv2</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014 Advanced Micro Devices, Inc.</div><div class='del'>- *</div><div class='del'>- * This file is free software; you may copy, redistribute and/or modify</div><div class='del'>- * it under the terms of the GNU General Public License as published by</div><div class='del'>- * the Free Software Foundation, either version 2 of the License, or (at</div><div class='del'>- * your option) any later version.</div><div class='del'>- *</div><div class='del'>- * This file is distributed in the hope that it will be useful, but</div><div class='del'>- * WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU</div><div class='del'>- * General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- *</div><div class='del'>- * License 2: Modified BSD</div><div class='del'>- *</div><div class='del'>- * Copyright (c) 2014 Advanced Micro Devices, Inc.</div><div class='del'>- * All rights reserved.</div><div class='del'>- *</div><div class='del'>- * Redistribution and use in source and binary forms, with or without</div><div class='del'>- * modification, are permitted provided that the following conditions are met:</div><div class='del'>- *     * Redistributions of source code must retain the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer.</div><div class='del'>- *     * Redistributions in binary form must reproduce the above copyright</div><div class='del'>- *       notice, this list of conditions and the following disclaimer in the</div><div class='del'>- *       documentation and/or other materials provided with the distribution.</div><div class='del'>- *     * Neither the name of Advanced Micro Devices, Inc. nor the</div><div class='del'>- *       names of its contributors may be used to endorse or promote products</div><div class='del'>- *       derived from this software without specific prior written permission.</div><div class='del'>- *</div><div class='del'>- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"</div><div class='del'>- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE</div><div class='del'>- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE</div><div class='del'>- * ARE DISCLAIMED. IN NO EVENT SHALL &lt;COPYRIGHT HOLDER&gt; BE LIABLE FOR ANY</div><div class='del'>- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES</div><div class='del'>- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;</div><div class='del'>- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND</div><div class='del'>- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</div><div class='del'>- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF</div><div class='del'>- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</div><div class='del'>- *</div><div class='del'>- * This file incorporates work covered by the following copyright and</div><div class='del'>- * permission notice:</div><div class='del'>- *     The Synopsys DWC ETHER XGMAC Software Driver and documentation</div><div class='del'>- *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,</div><div class='del'>- *     Inc. unless otherwise expressly agreed to in writing between Synopsys</div><div class='del'>- *     and you.</div><div class='del'>- *</div><div class='del'>- *     The Software IS NOT an item of Licensed Software or Licensed Product</div><div class='del'>- *     under any End User Software License Agreement or Agreement for Licensed</div><div class='del'>- *     Product with Synopsys or any supplement thereto.  Permission is hereby</div><div class='del'>- *     granted, free of charge, to any person obtaining a copy of this software</div><div class='del'>- *     annotated with this license and the Software, to deal in the Software</div><div class='del'>- *     without restriction, including without limitation the rights to use,</div><div class='del'>- *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies</div><div class='del'>- *     of the Software, and to permit persons to whom the Software is furnished</div><div class='del'>- *     to do so, subject to the following conditions:</div><div class='del'>- *</div><div class='del'>- *     The above copyright notice and this permission notice shall be included</div><div class='del'>- *     in all copies or substantial portions of the Software.</div><div class='del'>- *</div><div class='del'>- *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"</div><div class='del'>- *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED</div><div class='del'>- *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A</div><div class='del'>- *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS</div><div class='del'>- *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR</div><div class='del'>- *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF</div><div class='del'>- *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS</div><div class='del'>- *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN</div><div class='del'>- *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)</div><div class='del'>- *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF</div><div class='del'>- *     THE POSSIBILITY OF SUCH DAMAGE.</div><div class='add'>+ * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.</div><div class='add'>+ * Copyright (c) 2014, Synopsys, Inc.</div><div class='add'>+ * All rights reserved</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef __XGBE_H__</div><div class='hunk'>@@ -127,9 +18,14 @@</div><div class='ctx'> #include &lt;linux/timecounter.h&gt;</div><div class='ctx'> #include &lt;linux/net_tstamp.h&gt;</div><div class='ctx'> #include &lt;net/dcbnl.h&gt;</div><div class='add'>+#include &lt;linux/completion.h&gt;</div><div class='add'>+#include &lt;linux/cpumask.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/dcache.h&gt;</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/list.h&gt;</div><div class='ctx'> </div><div class='ctx'> #define XGBE_DRV_NAME		"amd-xgbe"</div><div class='del'>-#define XGBE_DRV_VERSION	"1.0.2"</div><div class='ctx'> #define XGBE_DRV_DESC		"AMD 10 Gigabit Ethernet Driver"</div><div class='ctx'> </div><div class='ctx'> /* Descriptor related defines */</div><div class='hunk'>@@ -138,10 +34,16 @@</div><div class='ctx'> #define XGBE_TX_DESC_MAX_PROC	(XGBE_TX_DESC_CNT &gt;&gt; 1)</div><div class='ctx'> #define XGBE_RX_DESC_CNT	512</div><div class='ctx'> </div><div class='add'>+#define XGBE_TX_DESC_CNT_MIN	64</div><div class='add'>+#define XGBE_TX_DESC_CNT_MAX	4096</div><div class='add'>+#define XGBE_RX_DESC_CNT_MIN	64</div><div class='add'>+#define XGBE_RX_DESC_CNT_MAX	4096</div><div class='add'>+</div><div class='ctx'> #define XGBE_TX_MAX_BUF_SIZE	(0x3fff &amp; ~(64 - 1))</div><div class='ctx'> </div><div class='del'>-/* Descriptors required for maximum contigous TSO/GSO packet */</div><div class='del'>-#define XGBE_TX_MAX_SPLIT	((GSO_MAX_SIZE / XGBE_TX_MAX_BUF_SIZE) + 1)</div><div class='add'>+/* Descriptors required for maximum contiguous TSO/GSO packet */</div><div class='add'>+#define XGBE_TX_MAX_SPLIT	\</div><div class='add'>+	((GSO_LEGACY_MAX_SIZE / XGBE_TX_MAX_BUF_SIZE) + 1)</div><div class='ctx'> </div><div class='ctx'> /* Maximum possible descriptors needed for an SKB:</div><div class='ctx'>  * - Maximum number of SKB frags</div><div class='hunk'>@@ -158,37 +60,46 @@</div><div class='ctx'> </div><div class='ctx'> #define XGBE_MAX_DMA_CHANNELS	16</div><div class='ctx'> #define XGBE_MAX_QUEUES		16</div><div class='del'>-#define XGBE_DMA_STOP_TIMEOUT	5</div><div class='add'>+#define XGBE_PRIORITY_QUEUES	8</div><div class='add'>+#define XGBE_DMA_STOP_TIMEOUT	1</div><div class='ctx'> </div><div class='ctx'> /* DMA cache settings - Outer sharable, write-back, write-allocate */</div><div class='del'>-#define XGBE_DMA_OS_AXDOMAIN	0x2</div><div class='del'>-#define XGBE_DMA_OS_ARCACHE	0xb</div><div class='del'>-#define XGBE_DMA_OS_AWCACHE	0xf</div><div class='add'>+#define XGBE_DMA_OS_ARCR	0x002b2b2b</div><div class='add'>+#define XGBE_DMA_OS_AWCR	0x2f2f2f2f</div><div class='ctx'> </div><div class='ctx'> /* DMA cache settings - System, no caches used */</div><div class='del'>-#define XGBE_DMA_SYS_AXDOMAIN	0x3</div><div class='del'>-#define XGBE_DMA_SYS_ARCACHE	0x0</div><div class='del'>-#define XGBE_DMA_SYS_AWCACHE	0x0</div><div class='add'>+#define XGBE_DMA_SYS_ARCR	0x00303030</div><div class='add'>+#define XGBE_DMA_SYS_AWCR	0x30303030</div><div class='add'>+</div><div class='add'>+/* DMA cache settings - PCI device */</div><div class='add'>+#define XGBE_DMA_PCI_ARCR	0x000f0f0f</div><div class='add'>+#define XGBE_DMA_PCI_AWCR	0x0f0f0f0f</div><div class='add'>+#define XGBE_DMA_PCI_AWARCR	0x00000f0f</div><div class='ctx'> </div><div class='del'>-#define XGBE_DMA_INTERRUPT_MASK	0x31c7</div><div class='add'>+/* DMA channel interrupt modes */</div><div class='add'>+#define XGBE_IRQ_MODE_EDGE	0</div><div class='add'>+#define XGBE_IRQ_MODE_LEVEL	1</div><div class='ctx'> </div><div class='add'>+#define XGBE_ETH_FRAME_HDR	(ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN)</div><div class='ctx'> #define XGMAC_MIN_PACKET	60</div><div class='ctx'> #define XGMAC_STD_PACKET_MTU	1500</div><div class='ctx'> #define XGMAC_MAX_STD_PACKET	1518</div><div class='ctx'> #define XGMAC_JUMBO_PACKET_MTU	9000</div><div class='ctx'> #define XGMAC_MAX_JUMBO_PACKET	9018</div><div class='add'>+#define XGMAC_GIANT_PACKET_MTU	16368</div><div class='add'>+#define XGMAC_ETH_PREAMBLE	(12 + 8)	/* Inter-frame gap + preamble */</div><div class='add'>+</div><div class='add'>+#define XGMAC_PFC_DATA_LEN	46</div><div class='add'>+#define XGMAC_PFC_DELAYS	14000</div><div class='add'>+</div><div class='add'>+#define XGMAC_PRIO_QUEUES(_cnt)					\</div><div class='add'>+	min_t(unsigned int, IEEE_8021QAZ_MAX_TCS, (_cnt))</div><div class='ctx'> </div><div class='ctx'> /* Common property names */</div><div class='ctx'> #define XGBE_MAC_ADDR_PROPERTY	"mac-address"</div><div class='ctx'> #define XGBE_PHY_MODE_PROPERTY	"phy-mode"</div><div class='ctx'> #define XGBE_DMA_IRQS_PROPERTY	"amd,per-channel-interrupt"</div><div class='ctx'> #define XGBE_SPEEDSET_PROPERTY	"amd,speed-set"</div><div class='del'>-#define XGBE_BLWC_PROPERTY	"amd,serdes-blwc"</div><div class='del'>-#define XGBE_CDR_RATE_PROPERTY	"amd,serdes-cdr-rate"</div><div class='del'>-#define XGBE_PQ_SKEW_PROPERTY	"amd,serdes-pq-skew"</div><div class='del'>-#define XGBE_TX_AMP_PROPERTY	"amd,serdes-tx-amp"</div><div class='del'>-#define XGBE_DFE_CFG_PROPERTY	"amd,serdes-dfe-tap-config"</div><div class='del'>-#define XGBE_DFE_ENA_PROPERTY	"amd,serdes-dfe-tap-enable"</div><div class='ctx'> </div><div class='ctx'> /* Device-tree clock names */</div><div class='ctx'> #define XGBE_DMA_CLOCK		"dma_clk"</div><div class='hunk'>@@ -198,19 +109,53 @@</div><div class='ctx'> #define XGBE_ACPI_DMA_FREQ	"amd,dma-freq"</div><div class='ctx'> #define XGBE_ACPI_PTP_FREQ	"amd,ptp-freq"</div><div class='ctx'> </div><div class='add'>+/* PCI BAR mapping */</div><div class='add'>+#define XGBE_XGMAC_BAR		0</div><div class='add'>+#define XGBE_XPCS_BAR		1</div><div class='add'>+#define XGBE_MAC_PROP_OFFSET	0x1d000</div><div class='add'>+#define XGBE_I2C_CTRL_OFFSET	0x1e000</div><div class='add'>+</div><div class='add'>+/* PCI MSI/MSIx support */</div><div class='add'>+#define XGBE_MSI_BASE_COUNT	4</div><div class='add'>+#define XGBE_MSI_MIN_COUNT	(XGBE_MSI_BASE_COUNT + 1)</div><div class='add'>+</div><div class='add'>+/* Initial PTP register values based on Link Speed. */</div><div class='add'>+#define MAC_TICNR_1G_INITVAL	0x10</div><div class='add'>+#define MAC_TECNR_1G_INITVAL	0x28</div><div class='add'>+</div><div class='add'>+#define MAC_TICSNR_10G_INITVAL	0x33</div><div class='add'>+#define MAC_TECNR_10G_INITVAL	0x14</div><div class='add'>+#define MAC_TECSNR_10G_INITVAL	0xCC</div><div class='add'>+</div><div class='add'>+/* PCI clock frequencies */</div><div class='add'>+#define XGBE_V2_DMA_CLOCK_FREQ	500000000	/* 500 MHz */</div><div class='add'>+#define XGBE_V2_PTP_CLOCK_FREQ	125000000	/* 125 MHz */</div><div class='add'>+</div><div class='ctx'> /* Timestamp support - values based on 50MHz PTP clock</div><div class='ctx'>  *   50MHz =&gt; 20 nsec</div><div class='ctx'>  */</div><div class='ctx'> #define XGBE_TSTAMP_SSINC	20</div><div class='ctx'> #define XGBE_TSTAMP_SNSINC	0</div><div class='add'>+#define XGBE_PTP_ACT_CLK_FREQ	500000000</div><div class='add'>+</div><div class='add'>+#define XGBE_V2_TSTAMP_SSINC	0xA</div><div class='add'>+#define XGBE_V2_TSTAMP_SNSINC	0</div><div class='add'>+#define XGBE_V2_PTP_ACT_CLK_FREQ	1000000000</div><div class='add'>+</div><div class='add'>+/* Define maximum supported values */</div><div class='add'>+#define XGBE_MAX_PPS_OUT	4</div><div class='add'>+#define XGBE_MAX_AUX_SNAP	4</div><div class='ctx'> </div><div class='ctx'> /* Driver PMT macros */</div><div class='ctx'> #define XGMAC_DRIVER_CONTEXT	1</div><div class='ctx'> #define XGMAC_IOCTL_CONTEXT	2</div><div class='ctx'> </div><div class='del'>-#define XGBE_FIFO_MAX		81920</div><div class='del'>-#define XGBE_FIFO_SIZE_B(x)	(x)</div><div class='del'>-#define XGBE_FIFO_SIZE_KB(x)	(x * 1024)</div><div class='add'>+#define XGMAC_FIFO_MIN_ALLOC	2048</div><div class='add'>+#define XGMAC_FIFO_UNIT		256</div><div class='add'>+#define XGMAC_FIFO_ALIGN(_x)				\</div><div class='add'>+	(((_x) + XGMAC_FIFO_UNIT - 1) &amp; ~(XGMAC_FIFO_UNIT - 1))</div><div class='add'>+#define XGMAC_FIFO_FC_OFF	2048</div><div class='add'>+#define XGMAC_FIFO_FC_MIN	4096</div><div class='ctx'> </div><div class='ctx'> #define XGBE_TC_MIN_QUANTUM	10</div><div class='ctx'> </div><div class='hunk'>@@ -227,6 +172,7 @@</div><div class='ctx'> /* Default coalescing parameters */</div><div class='ctx'> #define XGMAC_INIT_DMA_TX_USECS		1000</div><div class='ctx'> #define XGMAC_INIT_DMA_TX_FRAMES	25</div><div class='add'>+#define XGMAC_MAX_COAL_TX_TICK		100000</div><div class='ctx'> </div><div class='ctx'> #define XGMAC_MAX_DMA_RIWT		0xff</div><div class='ctx'> #define XGMAC_INIT_DMA_RX_USECS		30</div><div class='hunk'>@@ -235,6 +181,14 @@</div><div class='ctx'> /* Flow control queue count */</div><div class='ctx'> #define XGMAC_MAX_FLOW_CONTROL_QUEUES	8</div><div class='ctx'> </div><div class='add'>+/* Flow control threshold units */</div><div class='add'>+#define XGMAC_FLOW_CONTROL_UNIT		512</div><div class='add'>+#define XGMAC_FLOW_CONTROL_ALIGN(_x)				\</div><div class='add'>+	(((_x) + XGMAC_FLOW_CONTROL_UNIT - 1) &amp; ~(XGMAC_FLOW_CONTROL_UNIT - 1))</div><div class='add'>+#define XGMAC_FLOW_CONTROL_VALUE(_x)				\</div><div class='add'>+	(((_x) &lt; 1024) ? 0 : ((_x) / XGMAC_FLOW_CONTROL_UNIT) - 2)</div><div class='add'>+#define XGMAC_FLOW_CONTROL_MAX		33280</div><div class='add'>+</div><div class='ctx'> /* Maximum MAC address hash table size (256 bits = 8 bytes) */</div><div class='ctx'> #define XGBE_MAC_HASH_TABLE_SIZE	8</div><div class='ctx'> </div><div class='hunk'>@@ -246,46 +200,72 @@</div><div class='ctx'> </div><div class='ctx'> /* Auto-negotiation */</div><div class='ctx'> #define XGBE_AN_MS_TIMEOUT		500</div><div class='del'>-#define XGBE_LINK_TIMEOUT		10</div><div class='del'>-</div><div class='del'>-#define XGBE_AN_INT_CMPLT		0x01</div><div class='del'>-#define XGBE_AN_INC_LINK		0x02</div><div class='del'>-#define XGBE_AN_PG_RCV			0x04</div><div class='del'>-#define XGBE_AN_INT_MASK		0x07</div><div class='del'>-</div><div class='del'>-/* Rate-change complete wait/retry count */</div><div class='del'>-#define XGBE_RATECHANGE_COUNT		500</div><div class='del'>-</div><div class='del'>-/* Default SerDes settings */</div><div class='del'>-#define XGBE_SPEED_10000_BLWC		0</div><div class='del'>-#define XGBE_SPEED_10000_CDR		0x7</div><div class='del'>-#define XGBE_SPEED_10000_PLL		0x1</div><div class='del'>-#define XGBE_SPEED_10000_PQ		0x12</div><div class='del'>-#define XGBE_SPEED_10000_RATE		0x0</div><div class='del'>-#define XGBE_SPEED_10000_TXAMP		0xa</div><div class='del'>-#define XGBE_SPEED_10000_WORD		0x7</div><div class='del'>-#define XGBE_SPEED_10000_DFE_TAP_CONFIG	0x1</div><div class='del'>-#define XGBE_SPEED_10000_DFE_TAP_ENABLE	0x7f</div><div class='del'>-</div><div class='del'>-#define XGBE_SPEED_2500_BLWC		1</div><div class='del'>-#define XGBE_SPEED_2500_CDR		0x2</div><div class='del'>-#define XGBE_SPEED_2500_PLL		0x0</div><div class='del'>-#define XGBE_SPEED_2500_PQ		0xa</div><div class='del'>-#define XGBE_SPEED_2500_RATE		0x1</div><div class='del'>-#define XGBE_SPEED_2500_TXAMP		0xf</div><div class='del'>-#define XGBE_SPEED_2500_WORD		0x1</div><div class='del'>-#define XGBE_SPEED_2500_DFE_TAP_CONFIG	0x3</div><div class='del'>-#define XGBE_SPEED_2500_DFE_TAP_ENABLE	0x0</div><div class='del'>-</div><div class='del'>-#define XGBE_SPEED_1000_BLWC		1</div><div class='del'>-#define XGBE_SPEED_1000_CDR		0x2</div><div class='del'>-#define XGBE_SPEED_1000_PLL		0x0</div><div class='del'>-#define XGBE_SPEED_1000_PQ		0xa</div><div class='del'>-#define XGBE_SPEED_1000_RATE		0x3</div><div class='del'>-#define XGBE_SPEED_1000_TXAMP		0xf</div><div class='del'>-#define XGBE_SPEED_1000_WORD		0x1</div><div class='del'>-#define XGBE_SPEED_1000_DFE_TAP_CONFIG	0x3</div><div class='del'>-#define XGBE_SPEED_1000_DFE_TAP_ENABLE	0x0</div><div class='add'>+#define XGBE_LINK_TIMEOUT		5</div><div class='add'>+#define XGBE_KR_TRAINING_WAIT_ITER	50</div><div class='add'>+</div><div class='add'>+#define XGBE_SGMII_AN_LINK_DUPLEX	BIT(1)</div><div class='add'>+#define XGBE_SGMII_AN_LINK_SPEED	(BIT(2) | BIT(3))</div><div class='add'>+#define XGBE_SGMII_AN_LINK_SPEED_10	0x00</div><div class='add'>+#define XGBE_SGMII_AN_LINK_SPEED_100	0x04</div><div class='add'>+#define XGBE_SGMII_AN_LINK_SPEED_1000	0x08</div><div class='add'>+#define XGBE_SGMII_AN_LINK_STATUS	BIT(4)</div><div class='add'>+</div><div class='add'>+/* ECC correctable error notification window (seconds) */</div><div class='add'>+#define XGBE_ECC_LIMIT			60</div><div class='add'>+</div><div class='add'>+/* MDIO port types */</div><div class='add'>+#define XGMAC_MAX_C22_PORT		3</div><div class='add'>+</div><div class='add'>+/* Link mode bit operations */</div><div class='add'>+#define XGBE_ZERO_SUP(_ls)		\</div><div class='add'>+	ethtool_link_ksettings_zero_link_mode((_ls), supported)</div><div class='add'>+</div><div class='add'>+#define XGBE_SET_SUP(_ls, _mode)	\</div><div class='add'>+	ethtool_link_ksettings_add_link_mode((_ls), supported, _mode)</div><div class='add'>+</div><div class='add'>+#define XGBE_CLR_SUP(_ls, _mode)	\</div><div class='add'>+	ethtool_link_ksettings_del_link_mode((_ls), supported, _mode)</div><div class='add'>+</div><div class='add'>+#define XGBE_IS_SUP(_ls, _mode)	\</div><div class='add'>+	ethtool_link_ksettings_test_link_mode((_ls), supported, _mode)</div><div class='add'>+</div><div class='add'>+#define XGBE_ZERO_ADV(_ls)		\</div><div class='add'>+	ethtool_link_ksettings_zero_link_mode((_ls), advertising)</div><div class='add'>+</div><div class='add'>+#define XGBE_SET_ADV(_ls, _mode)	\</div><div class='add'>+	ethtool_link_ksettings_add_link_mode((_ls), advertising, _mode)</div><div class='add'>+</div><div class='add'>+#define XGBE_CLR_ADV(_ls, _mode)	\</div><div class='add'>+	ethtool_link_ksettings_del_link_mode((_ls), advertising, _mode)</div><div class='add'>+</div><div class='add'>+#define XGBE_ADV(_ls, _mode)		\</div><div class='add'>+	ethtool_link_ksettings_test_link_mode((_ls), advertising, _mode)</div><div class='add'>+</div><div class='add'>+#define XGBE_ZERO_LP_ADV(_ls)		\</div><div class='add'>+	ethtool_link_ksettings_zero_link_mode((_ls), lp_advertising)</div><div class='add'>+</div><div class='add'>+#define XGBE_SET_LP_ADV(_ls, _mode)	\</div><div class='add'>+	ethtool_link_ksettings_add_link_mode((_ls), lp_advertising, _mode)</div><div class='add'>+</div><div class='add'>+#define XGBE_CLR_LP_ADV(_ls, _mode)	\</div><div class='add'>+	ethtool_link_ksettings_del_link_mode((_ls), lp_advertising, _mode)</div><div class='add'>+</div><div class='add'>+#define XGBE_LP_ADV(_ls, _mode)		\</div><div class='add'>+	ethtool_link_ksettings_test_link_mode((_ls), lp_advertising, _mode)</div><div class='add'>+</div><div class='add'>+#define XGBE_LM_COPY(_dst, _dname, _src, _sname)	\</div><div class='add'>+	bitmap_copy((_dst)-&gt;link_modes._dname,		\</div><div class='add'>+		    (_src)-&gt;link_modes._sname,		\</div><div class='add'>+		    __ETHTOOL_LINK_MODE_MASK_NBITS)</div><div class='add'>+</div><div class='add'>+/* XGBE PCI device id */</div><div class='add'>+#define XGBE_RV_PCI_DEVICE_ID	0x15d0</div><div class='add'>+#define XGBE_YC_PCI_DEVICE_ID	0x14b5</div><div class='add'>+#define XGBE_RN_PCI_DEVICE_ID	0x1630</div><div class='add'>+</div><div class='add'>+ /* Generic low and high masks */</div><div class='add'>+#define XGBE_GEN_HI_MASK	GENMASK(31, 16)</div><div class='add'>+#define XGBE_GEN_LO_MASK	GENMASK(15, 0)</div><div class='ctx'> </div><div class='ctx'> struct xgbe_prv_data;</div><div class='ctx'> </div><div class='hunk'>@@ -359,7 +339,7 @@ struct xgbe_rx_ring_data {</div><div class='ctx'> </div><div class='ctx'> /* Structure used to hold information related to the descriptor</div><div class='ctx'>  * and the packet associated with the descriptor (always use</div><div class='del'>- * use the XGBE_GET_DESC_DATA macro to access this data from the ring)</div><div class='add'>+ * the XGBE_GET_DESC_DATA macro to access this data from the ring)</div><div class='ctx'>  */</div><div class='ctx'> struct xgbe_ring_data {</div><div class='ctx'> 	struct xgbe_ring_desc *rdesc;	/* Virtual address of descriptor */</div><div class='hunk'>@@ -407,6 +387,7 @@ struct xgbe_ring {</div><div class='ctx'> 	/* Page allocation for RX buffers */</div><div class='ctx'> 	struct xgbe_page_alloc rx_hdr_pa;</div><div class='ctx'> 	struct xgbe_page_alloc rx_buf_pa;</div><div class='add'>+	int node;</div><div class='ctx'> </div><div class='ctx'> 	/* Ring index values</div><div class='ctx'> 	 *  cur   - Tx: index of descriptor to be used for current transfer</div><div class='hunk'>@@ -434,7 +415,7 @@ struct xgbe_ring {</div><div class='ctx'>  * a DMA channel.</div><div class='ctx'>  */</div><div class='ctx'> struct xgbe_channel {</div><div class='del'>-	char name[16];</div><div class='add'>+	char name[20];</div><div class='ctx'> </div><div class='ctx'> 	/* Address of private data area for device */</div><div class='ctx'> 	struct xgbe_prv_data *pdata;</div><div class='hunk'>@@ -450,6 +431,8 @@ struct xgbe_channel {</div><div class='ctx'> 	/* Netdev related settings */</div><div class='ctx'> 	struct napi_struct napi;</div><div class='ctx'> </div><div class='add'>+	/* Per channel interrupt enablement tracker */</div><div class='add'>+	unsigned int curr_ier;</div><div class='ctx'> 	unsigned int saved_ier;</div><div class='ctx'> </div><div class='ctx'> 	unsigned int tx_timer_active;</div><div class='hunk'>@@ -457,13 +440,16 @@ struct xgbe_channel {</div><div class='ctx'> </div><div class='ctx'> 	struct xgbe_ring *tx_ring;</div><div class='ctx'> 	struct xgbe_ring *rx_ring;</div><div class='add'>+</div><div class='add'>+	int node;</div><div class='add'>+	cpumask_t affinity_mask;</div><div class='ctx'> } ____cacheline_aligned;</div><div class='ctx'> </div><div class='ctx'> enum xgbe_state {</div><div class='ctx'> 	XGBE_DOWN,</div><div class='del'>-	XGBE_LINK,</div><div class='ctx'> 	XGBE_LINK_INIT,</div><div class='ctx'> 	XGBE_LINK_ERR,</div><div class='add'>+	XGBE_STOPPED,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum xgbe_int {</div><div class='hunk'>@@ -483,18 +469,10 @@ enum xgbe_int_state {</div><div class='ctx'> 	XGMAC_INT_STATE_RESTORE,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-enum xgbe_mtl_fifo_size {</div><div class='del'>-	XGMAC_MTL_FIFO_SIZE_256  = 0x00,</div><div class='del'>-	XGMAC_MTL_FIFO_SIZE_512  = 0x01,</div><div class='del'>-	XGMAC_MTL_FIFO_SIZE_1K   = 0x03,</div><div class='del'>-	XGMAC_MTL_FIFO_SIZE_2K   = 0x07,</div><div class='del'>-	XGMAC_MTL_FIFO_SIZE_4K   = 0x0f,</div><div class='del'>-	XGMAC_MTL_FIFO_SIZE_8K   = 0x1f,</div><div class='del'>-	XGMAC_MTL_FIFO_SIZE_16K  = 0x3f,</div><div class='del'>-	XGMAC_MTL_FIFO_SIZE_32K  = 0x7f,</div><div class='del'>-	XGMAC_MTL_FIFO_SIZE_64K  = 0xff,</div><div class='del'>-	XGMAC_MTL_FIFO_SIZE_128K = 0x1ff,</div><div class='del'>-	XGMAC_MTL_FIFO_SIZE_256K = 0x3ff,</div><div class='add'>+enum xgbe_ecc_sec {</div><div class='add'>+	XGBE_ECC_SEC_TX,</div><div class='add'>+	XGBE_ECC_SEC_RX,</div><div class='add'>+	XGBE_ECC_SEC_DESC,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum xgbe_speed {</div><div class='hunk'>@@ -504,6 +482,20 @@ enum xgbe_speed {</div><div class='ctx'> 	XGBE_SPEEDS,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+enum xgbe_xpcs_access {</div><div class='add'>+	XGBE_XPCS_ACCESS_V1 = 0,</div><div class='add'>+	XGBE_XPCS_ACCESS_V2,</div><div class='add'>+	XGBE_XPCS_ACCESS_V3,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum xgbe_an_mode {</div><div class='add'>+	XGBE_AN_MODE_CL73 = 0,</div><div class='add'>+	XGBE_AN_MODE_CL73_REDRV,</div><div class='add'>+	XGBE_AN_MODE_CL37,</div><div class='add'>+	XGBE_AN_MODE_CL37_SGMII,</div><div class='add'>+	XGBE_AN_MODE_NONE,</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> enum xgbe_an {</div><div class='ctx'> 	XGBE_AN_READY = 0,</div><div class='ctx'> 	XGBE_AN_PAGE_RECEIVED,</div><div class='hunk'>@@ -521,8 +513,15 @@ enum xgbe_rx {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum xgbe_mode {</div><div class='del'>-	XGBE_MODE_KR = 0,</div><div class='del'>-	XGBE_MODE_KX,</div><div class='add'>+	XGBE_MODE_KX_1000 = 0,</div><div class='add'>+	XGBE_MODE_KX_2500,</div><div class='add'>+	XGBE_MODE_KR,</div><div class='add'>+	XGBE_MODE_X,</div><div class='add'>+	XGBE_MODE_SGMII_10,</div><div class='add'>+	XGBE_MODE_SGMII_100,</div><div class='add'>+	XGBE_MODE_SGMII_1000,</div><div class='add'>+	XGBE_MODE_SFI,</div><div class='add'>+	XGBE_MODE_UNKNOWN,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> enum xgbe_speedset {</div><div class='hunk'>@@ -530,10 +529,40 @@ enum xgbe_speedset {</div><div class='ctx'> 	XGBE_SPEEDSET_2500_10000,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+enum xgbe_mdio_mode {</div><div class='add'>+	XGBE_MDIO_MODE_NONE = 0,</div><div class='add'>+	XGBE_MDIO_MODE_CL22,</div><div class='add'>+	XGBE_MDIO_MODE_CL45,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum xgbe_mb_cmd {</div><div class='add'>+	XGBE_MB_CMD_POWER_OFF = 0,</div><div class='add'>+	XGBE_MB_CMD_SET_1G,</div><div class='add'>+	XGBE_MB_CMD_SET_2_5G,</div><div class='add'>+	XGBE_MB_CMD_SET_10G_SFI,</div><div class='add'>+	XGBE_MB_CMD_SET_10G_KR,</div><div class='add'>+	XGBE_MB_CMD_RRC</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum xgbe_mb_subcmd {</div><div class='add'>+	XGBE_MB_SUBCMD_NONE = 0,</div><div class='add'>+	XGBE_MB_SUBCMD_RX_ADAP,</div><div class='add'>+</div><div class='add'>+	/* 10GbE SFP subcommands */</div><div class='add'>+	XGBE_MB_SUBCMD_ACTIVE = 0,</div><div class='add'>+	XGBE_MB_SUBCMD_PASSIVE_1M,</div><div class='add'>+	XGBE_MB_SUBCMD_PASSIVE_3M,</div><div class='add'>+	XGBE_MB_SUBCMD_PASSIVE_OTHER,</div><div class='add'>+</div><div class='add'>+	/* 1GbE Mode subcommands */</div><div class='add'>+	XGBE_MB_SUBCMD_10MBITS = 0,</div><div class='add'>+	XGBE_MB_SUBCMD_100MBITS,</div><div class='add'>+	XGBE_MB_SUBCMD_1G_SGMII,</div><div class='add'>+	XGBE_MB_SUBCMD_1G_KX</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct xgbe_phy {</div><div class='del'>-	u32 supported;</div><div class='del'>-	u32 advertising;</div><div class='del'>-	u32 lp_advertising;</div><div class='add'>+	struct ethtool_link_ksettings lks;</div><div class='ctx'> </div><div class='ctx'> 	int address;</div><div class='ctx'> </div><div class='hunk'>@@ -548,6 +577,43 @@ struct xgbe_phy {</div><div class='ctx'> 	int rx_pause;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+enum xgbe_i2c_cmd {</div><div class='add'>+	XGBE_I2C_CMD_READ = 0,</div><div class='add'>+	XGBE_I2C_CMD_WRITE,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct xgbe_i2c_op {</div><div class='add'>+	enum xgbe_i2c_cmd cmd;</div><div class='add'>+</div><div class='add'>+	unsigned int target;</div><div class='add'>+</div><div class='add'>+	void *buf;</div><div class='add'>+	unsigned int len;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct xgbe_i2c_op_state {</div><div class='add'>+	struct xgbe_i2c_op *op;</div><div class='add'>+</div><div class='add'>+	unsigned int tx_len;</div><div class='add'>+	unsigned char *tx_buf;</div><div class='add'>+</div><div class='add'>+	unsigned int rx_len;</div><div class='add'>+	unsigned char *rx_buf;</div><div class='add'>+</div><div class='add'>+	unsigned int tx_abort_source;</div><div class='add'>+</div><div class='add'>+	int ret;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct xgbe_i2c {</div><div class='add'>+	unsigned int started;</div><div class='add'>+	unsigned int max_speed_mode;</div><div class='add'>+	unsigned int rx_fifo_size;</div><div class='add'>+	unsigned int tx_fifo_size;</div><div class='add'>+</div><div class='add'>+	struct xgbe_i2c_op_state op_state;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct xgbe_mmc_stats {</div><div class='ctx'> 	/* Tx Stats */</div><div class='ctx'> 	u64 txoctetcount_gb;</div><div class='hunk'>@@ -598,12 +664,28 @@ struct xgbe_mmc_stats {</div><div class='ctx'> struct xgbe_ext_stats {</div><div class='ctx'> 	u64 tx_tso_packets;</div><div class='ctx'> 	u64 rx_split_header_packets;</div><div class='add'>+	u64 rx_buffer_unavailable;</div><div class='add'>+</div><div class='add'>+	u64 txq_packets[XGBE_MAX_DMA_CHANNELS];</div><div class='add'>+	u64 txq_bytes[XGBE_MAX_DMA_CHANNELS];</div><div class='add'>+	u64 rxq_packets[XGBE_MAX_DMA_CHANNELS];</div><div class='add'>+	u64 rxq_bytes[XGBE_MAX_DMA_CHANNELS];</div><div class='add'>+</div><div class='add'>+	u64 tx_vxlan_packets;</div><div class='add'>+	u64 rx_vxlan_packets;</div><div class='add'>+	u64 rx_csum_errors;</div><div class='add'>+	u64 rx_vxlan_csum_errors;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct xgbe_pps_config {</div><div class='add'>+	struct timespec64 start;</div><div class='add'>+	struct timespec64 period;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct xgbe_hw_if {</div><div class='ctx'> 	int (*tx_complete)(struct xgbe_ring_desc *);</div><div class='ctx'> </div><div class='del'>-	int (*set_mac_address)(struct xgbe_prv_data *, u8 *addr);</div><div class='add'>+	int (*set_mac_address)(struct xgbe_prv_data *, const u8 *addr);</div><div class='ctx'> 	int (*config_rx_mode)(struct xgbe_prv_data *);</div><div class='ctx'> </div><div class='ctx'> 	int (*enable_rx_csum)(struct xgbe_prv_data *);</div><div class='hunk'>@@ -617,9 +699,18 @@ struct xgbe_hw_if {</div><div class='ctx'> </div><div class='ctx'> 	int (*read_mmd_regs)(struct xgbe_prv_data *, int, int);</div><div class='ctx'> 	void (*write_mmd_regs)(struct xgbe_prv_data *, int, int, int);</div><div class='del'>-	int (*set_gmii_speed)(struct xgbe_prv_data *);</div><div class='del'>-	int (*set_gmii_2500_speed)(struct xgbe_prv_data *);</div><div class='del'>-	int (*set_xgmii_speed)(struct xgbe_prv_data *);</div><div class='add'>+	int (*set_speed)(struct xgbe_prv_data *, int);</div><div class='add'>+</div><div class='add'>+	int (*set_ext_mii_mode)(struct xgbe_prv_data *, unsigned int,</div><div class='add'>+				enum xgbe_mdio_mode);</div><div class='add'>+	int (*read_ext_mii_regs_c22)(struct xgbe_prv_data *, int, int);</div><div class='add'>+	int (*write_ext_mii_regs_c22)(struct xgbe_prv_data *, int, int, u16);</div><div class='add'>+	int (*read_ext_mii_regs_c45)(struct xgbe_prv_data *, int, int, int);</div><div class='add'>+	int (*write_ext_mii_regs_c45)(struct xgbe_prv_data *, int, int, int,</div><div class='add'>+				      u16);</div><div class='add'>+</div><div class='add'>+	int (*set_gpio)(struct xgbe_prv_data *, unsigned int);</div><div class='add'>+	int (*clr_gpio)(struct xgbe_prv_data *, unsigned int);</div><div class='ctx'> </div><div class='ctx'> 	void (*enable_tx)(struct xgbe_prv_data *);</div><div class='ctx'> 	void (*disable_tx)(struct xgbe_prv_data *);</div><div class='hunk'>@@ -668,27 +759,13 @@ struct xgbe_hw_if {</div><div class='ctx'> 	/* For TX DMA Operate on Second Frame config */</div><div class='ctx'> 	int (*config_osp_mode)(struct xgbe_prv_data *);</div><div class='ctx'> </div><div class='del'>-	/* For RX and TX PBL config */</div><div class='del'>-	int (*config_rx_pbl_val)(struct xgbe_prv_data *);</div><div class='del'>-	int (*get_rx_pbl_val)(struct xgbe_prv_data *);</div><div class='del'>-	int (*config_tx_pbl_val)(struct xgbe_prv_data *);</div><div class='del'>-	int (*get_tx_pbl_val)(struct xgbe_prv_data *);</div><div class='del'>-	int (*config_pblx8)(struct xgbe_prv_data *);</div><div class='del'>-</div><div class='ctx'> 	/* For MMC statistics */</div><div class='ctx'> 	void (*rx_mmc_int)(struct xgbe_prv_data *);</div><div class='ctx'> 	void (*tx_mmc_int)(struct xgbe_prv_data *);</div><div class='ctx'> 	void (*read_mmc_stats)(struct xgbe_prv_data *);</div><div class='ctx'> </div><div class='del'>-	/* For Timestamp config */</div><div class='del'>-	int (*config_tstamp)(struct xgbe_prv_data *, unsigned int);</div><div class='del'>-	void (*update_tstamp_addend)(struct xgbe_prv_data *, unsigned int);</div><div class='del'>-	void (*set_tstamp_time)(struct xgbe_prv_data *, unsigned int sec,</div><div class='del'>-				unsigned int nsec);</div><div class='del'>-	u64 (*get_tstamp_time)(struct xgbe_prv_data *);</div><div class='del'>-	u64 (*get_tx_tstamp)(struct xgbe_prv_data *);</div><div class='del'>-</div><div class='ctx'> 	/* For Data Center Bridging config */</div><div class='add'>+	void (*config_tc)(struct xgbe_prv_data *);</div><div class='ctx'> 	void (*config_dcb_tc)(struct xgbe_prv_data *);</div><div class='ctx'> 	void (*config_dcb_pfc)(struct xgbe_prv_data *);</div><div class='ctx'> </div><div class='hunk'>@@ -697,11 +774,87 @@ struct xgbe_hw_if {</div><div class='ctx'> 	int (*disable_rss)(struct xgbe_prv_data *);</div><div class='ctx'> 	int (*set_rss_hash_key)(struct xgbe_prv_data *, const u8 *);</div><div class='ctx'> 	int (*set_rss_lookup_table)(struct xgbe_prv_data *, const u32 *);</div><div class='add'>+</div><div class='add'>+	/* For ECC */</div><div class='add'>+	void (*disable_ecc_ded)(struct xgbe_prv_data *);</div><div class='add'>+	void (*disable_ecc_sec)(struct xgbe_prv_data *, enum xgbe_ecc_sec);</div><div class='add'>+</div><div class='add'>+	/* For VXLAN */</div><div class='add'>+	void (*enable_vxlan)(struct xgbe_prv_data *);</div><div class='add'>+	void (*disable_vxlan)(struct xgbe_prv_data *);</div><div class='add'>+	void (*set_vxlan_id)(struct xgbe_prv_data *);</div><div class='add'>+</div><div class='add'>+	/* For Split Header */</div><div class='add'>+	void (*enable_sph)(struct xgbe_prv_data *pdata);</div><div class='add'>+	void (*disable_sph)(struct xgbe_prv_data *pdata);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* This structure represents implementation specific routines for an</div><div class='add'>+ * implementation of a PHY. All routines are required unless noted below.</div><div class='add'>+ *   Optional routines:</div><div class='add'>+ *     an_pre, an_post</div><div class='add'>+ *     kr_training_pre, kr_training_post</div><div class='add'>+ *     module_info, module_eeprom</div><div class='add'>+ */</div><div class='add'>+struct xgbe_phy_impl_if {</div><div class='add'>+	/* Perform Setup/teardown actions */</div><div class='add'>+	int (*init)(struct xgbe_prv_data *);</div><div class='add'>+	void (*exit)(struct xgbe_prv_data *);</div><div class='add'>+</div><div class='add'>+	/* Perform start/stop specific actions */</div><div class='add'>+	int (*reset)(struct xgbe_prv_data *);</div><div class='add'>+	int (*start)(struct xgbe_prv_data *);</div><div class='add'>+	void (*stop)(struct xgbe_prv_data *);</div><div class='add'>+</div><div class='add'>+	/* Return the link status */</div><div class='add'>+	int (*link_status)(struct xgbe_prv_data *, int *);</div><div class='add'>+</div><div class='add'>+	/* Indicate if a particular speed is valid */</div><div class='add'>+	bool (*valid_speed)(struct xgbe_prv_data *, int);</div><div class='add'>+</div><div class='add'>+	/* Check if the specified mode can/should be used */</div><div class='add'>+	bool (*use_mode)(struct xgbe_prv_data *, enum xgbe_mode);</div><div class='add'>+	/* Switch the PHY into various modes */</div><div class='add'>+	void (*set_mode)(struct xgbe_prv_data *, enum xgbe_mode);</div><div class='add'>+	/* Retrieve mode needed for a specific speed */</div><div class='add'>+	enum xgbe_mode (*get_mode)(struct xgbe_prv_data *, int);</div><div class='add'>+	/* Retrieve new/next mode when trying to auto-negotiate */</div><div class='add'>+	enum xgbe_mode (*switch_mode)(struct xgbe_prv_data *);</div><div class='add'>+	/* Retrieve current mode */</div><div class='add'>+	enum xgbe_mode (*cur_mode)(struct xgbe_prv_data *);</div><div class='add'>+</div><div class='add'>+	/* Retrieve current auto-negotiation mode */</div><div class='add'>+	enum xgbe_an_mode (*an_mode)(struct xgbe_prv_data *);</div><div class='add'>+</div><div class='add'>+	/* Configure auto-negotiation settings */</div><div class='add'>+	int (*an_config)(struct xgbe_prv_data *);</div><div class='add'>+</div><div class='add'>+	/* Set/override auto-negotiation advertisement settings */</div><div class='add'>+	void (*an_advertising)(struct xgbe_prv_data *,</div><div class='add'>+			       struct ethtool_link_ksettings *);</div><div class='add'>+</div><div class='add'>+	/* Process results of auto-negotiation */</div><div class='add'>+	enum xgbe_mode (*an_outcome)(struct xgbe_prv_data *);</div><div class='add'>+</div><div class='add'>+	/* Pre/Post auto-negotiation support */</div><div class='add'>+	void (*an_pre)(struct xgbe_prv_data *);</div><div class='add'>+	void (*an_post)(struct xgbe_prv_data *);</div><div class='add'>+</div><div class='add'>+	/* Pre/Post KR training enablement support */</div><div class='add'>+	void (*kr_training_pre)(struct xgbe_prv_data *);</div><div class='add'>+	void (*kr_training_post)(struct xgbe_prv_data *);</div><div class='add'>+</div><div class='add'>+	/* SFP module related info */</div><div class='add'>+	int (*module_info)(struct xgbe_prv_data *pdata,</div><div class='add'>+			   struct ethtool_modinfo *modinfo);</div><div class='add'>+	int (*module_eeprom)(struct xgbe_prv_data *pdata,</div><div class='add'>+			     struct ethtool_eeprom *eeprom, u8 *data);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct xgbe_phy_if {</div><div class='del'>-	/* For initial PHY setup */</div><div class='del'>-	void (*phy_init)(struct xgbe_prv_data *);</div><div class='add'>+	/* For PHY setup/teardown */</div><div class='add'>+	int (*phy_init)(struct xgbe_prv_data *);</div><div class='add'>+	void (*phy_exit)(struct xgbe_prv_data *);</div><div class='ctx'> </div><div class='ctx'> 	/* For PHY support when setting device up/down */</div><div class='ctx'> 	int (*phy_reset)(struct xgbe_prv_data *);</div><div class='hunk'>@@ -711,6 +864,36 @@ struct xgbe_phy_if {</div><div class='ctx'> 	/* For PHY support while device is up */</div><div class='ctx'> 	void (*phy_status)(struct xgbe_prv_data *);</div><div class='ctx'> 	int (*phy_config_aneg)(struct xgbe_prv_data *);</div><div class='add'>+</div><div class='add'>+	/* For PHY settings validation */</div><div class='add'>+	bool (*phy_valid_speed)(struct xgbe_prv_data *, int);</div><div class='add'>+</div><div class='add'>+	/* For single interrupt support */</div><div class='add'>+	irqreturn_t (*an_isr)(struct xgbe_prv_data *);</div><div class='add'>+</div><div class='add'>+	/* For ethtool PHY support */</div><div class='add'>+	int (*module_info)(struct xgbe_prv_data *pdata,</div><div class='add'>+			   struct ethtool_modinfo *modinfo);</div><div class='add'>+	int (*module_eeprom)(struct xgbe_prv_data *pdata,</div><div class='add'>+			     struct ethtool_eeprom *eeprom, u8 *data);</div><div class='add'>+</div><div class='add'>+	/* PHY implementation specific services */</div><div class='add'>+	struct xgbe_phy_impl_if phy_impl;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct xgbe_i2c_if {</div><div class='add'>+	/* For initial I2C setup */</div><div class='add'>+	int (*i2c_init)(struct xgbe_prv_data *);</div><div class='add'>+</div><div class='add'>+	/* For I2C support when setting device up/down */</div><div class='add'>+	int (*i2c_start)(struct xgbe_prv_data *);</div><div class='add'>+	void (*i2c_stop)(struct xgbe_prv_data *);</div><div class='add'>+</div><div class='add'>+	/* For performing I2C operations */</div><div class='add'>+	int (*i2c_xfer)(struct xgbe_prv_data *, struct xgbe_i2c_op *);</div><div class='add'>+</div><div class='add'>+	/* For single interrupt support */</div><div class='add'>+	irqreturn_t (*i2c_isr)(struct xgbe_prv_data *);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct xgbe_desc_if {</div><div class='hunk'>@@ -746,6 +929,7 @@ struct xgbe_hw_features {</div><div class='ctx'> 	unsigned int addn_mac;		/* Additional MAC Addresses */</div><div class='ctx'> 	unsigned int ts_src;		/* Timestamp Source */</div><div class='ctx'> 	unsigned int sa_vlan_ins;	/* Source Address or VLAN Insertion */</div><div class='add'>+	unsigned int vxn;		/* VXLAN/NVGRE */</div><div class='ctx'> </div><div class='ctx'> 	/* HW Feature Register1 */</div><div class='ctx'> 	unsigned int rx_fifo_size;	/* MTL Receive FIFO Size */</div><div class='hunk'>@@ -770,11 +954,35 @@ struct xgbe_hw_features {</div><div class='ctx'> 	unsigned int aux_snap_num;	/* Number of Aux snapshot inputs */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+struct xgbe_version_data {</div><div class='add'>+	void (*init_function_ptrs_phy_impl)(struct xgbe_phy_if *);</div><div class='add'>+	enum xgbe_xpcs_access xpcs_access;</div><div class='add'>+	unsigned int mmc_64bit;</div><div class='add'>+	unsigned int tx_max_fifo_size;</div><div class='add'>+	unsigned int rx_max_fifo_size;</div><div class='add'>+	unsigned int tx_tstamp_workaround;</div><div class='add'>+	unsigned int tstamp_ptp_clock_freq;</div><div class='add'>+	unsigned int ecc_support;</div><div class='add'>+	unsigned int i2c_support;</div><div class='add'>+	unsigned int irq_reissue_support;</div><div class='add'>+	unsigned int tx_desc_prefetch;</div><div class='add'>+	unsigned int rx_desc_prefetch;</div><div class='add'>+	unsigned int an_cdr_workaround;</div><div class='add'>+	unsigned int enable_rrc;</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> struct xgbe_prv_data {</div><div class='ctx'> 	struct net_device *netdev;</div><div class='del'>-	struct platform_device *pdev;</div><div class='add'>+	struct pci_dev *pcidev;</div><div class='add'>+	struct platform_device *platdev;</div><div class='ctx'> 	struct acpi_device *adev;</div><div class='ctx'> 	struct device *dev;</div><div class='add'>+	struct platform_device *phy_platdev;</div><div class='add'>+	struct device *phy_dev;</div><div class='add'>+	unsigned int smn_base;</div><div class='add'>+</div><div class='add'>+	/* Version related data */</div><div class='add'>+	struct xgbe_version_data *vdata;</div><div class='ctx'> </div><div class='ctx'> 	/* ACPI or DT flag */</div><div class='ctx'> 	unsigned int use_acpi;</div><div class='hunk'>@@ -785,12 +993,26 @@ struct xgbe_prv_data {</div><div class='ctx'> 	void __iomem *rxtx_regs;	/* SerDes Rx/Tx CSRs */</div><div class='ctx'> 	void __iomem *sir0_regs;	/* SerDes integration registers (1/2) */</div><div class='ctx'> 	void __iomem *sir1_regs;	/* SerDes integration registers (2/2) */</div><div class='add'>+	void __iomem *xprop_regs;	/* XGBE property registers */</div><div class='add'>+	void __iomem *xi2c_regs;	/* XGBE I2C CSRs */</div><div class='add'>+</div><div class='add'>+	/* Port property registers */</div><div class='add'>+	unsigned int pp0;</div><div class='add'>+	unsigned int pp1;</div><div class='add'>+	unsigned int pp2;</div><div class='add'>+	unsigned int pp3;</div><div class='add'>+	unsigned int pp4;</div><div class='ctx'> </div><div class='ctx'> 	/* Overall device lock */</div><div class='ctx'> 	spinlock_t lock;</div><div class='ctx'> </div><div class='del'>-	/* XPCS indirect addressing mutex */</div><div class='del'>-	struct mutex xpcs_mutex;</div><div class='add'>+	/* XPCS indirect addressing lock */</div><div class='add'>+	spinlock_t xpcs_lock;</div><div class='add'>+	unsigned int xpcs_window_def_reg;</div><div class='add'>+	unsigned int xpcs_window_sel_reg;</div><div class='add'>+	unsigned int xpcs_window;</div><div class='add'>+	unsigned int xpcs_window_size;</div><div class='add'>+	unsigned int xpcs_window_mask;</div><div class='ctx'> </div><div class='ctx'> 	/* RSS addressing mutex */</div><div class='ctx'> 	struct mutex rss_mutex;</div><div class='hunk'>@@ -798,18 +1020,43 @@ struct xgbe_prv_data {</div><div class='ctx'> 	/* Flags representing xgbe_state */</div><div class='ctx'> 	unsigned long dev_state;</div><div class='ctx'> </div><div class='add'>+	/* ECC support */</div><div class='add'>+	unsigned long tx_sec_period;</div><div class='add'>+	unsigned long tx_ded_period;</div><div class='add'>+	unsigned long rx_sec_period;</div><div class='add'>+	unsigned long rx_ded_period;</div><div class='add'>+	unsigned long desc_sec_period;</div><div class='add'>+	unsigned long desc_ded_period;</div><div class='add'>+</div><div class='add'>+	unsigned int tx_sec_count;</div><div class='add'>+	unsigned int tx_ded_count;</div><div class='add'>+	unsigned int rx_sec_count;</div><div class='add'>+	unsigned int rx_ded_count;</div><div class='add'>+	unsigned int desc_ded_count;</div><div class='add'>+	unsigned int desc_sec_count;</div><div class='add'>+</div><div class='ctx'> 	int dev_irq;</div><div class='add'>+	int ecc_irq;</div><div class='add'>+	int i2c_irq;</div><div class='add'>+	int channel_irq[XGBE_MAX_DMA_CHANNELS];</div><div class='add'>+</div><div class='ctx'> 	unsigned int per_channel_irq;</div><div class='add'>+	unsigned int irq_count;</div><div class='add'>+	unsigned int channel_irq_count;</div><div class='add'>+	unsigned int channel_irq_mode;</div><div class='add'>+</div><div class='add'>+	char ecc_name[IFNAMSIZ + 32];</div><div class='ctx'> </div><div class='ctx'> 	struct xgbe_hw_if hw_if;</div><div class='ctx'> 	struct xgbe_phy_if phy_if;</div><div class='ctx'> 	struct xgbe_desc_if desc_if;</div><div class='add'>+	struct xgbe_i2c_if i2c_if;</div><div class='ctx'> </div><div class='ctx'> 	/* AXI DMA settings */</div><div class='ctx'> 	unsigned int coherent;</div><div class='del'>-	unsigned int axdomain;</div><div class='del'>-	unsigned int arcache;</div><div class='del'>-	unsigned int awcache;</div><div class='add'>+	unsigned int arcr;</div><div class='add'>+	unsigned int awcr;</div><div class='add'>+	unsigned int awarcr;</div><div class='ctx'> </div><div class='ctx'> 	/* Service routine support */</div><div class='ctx'> 	struct workqueue_struct *dev_workqueue;</div><div class='hunk'>@@ -817,29 +1064,40 @@ struct xgbe_prv_data {</div><div class='ctx'> 	struct timer_list service_timer;</div><div class='ctx'> </div><div class='ctx'> 	/* Rings for Tx/Rx on a DMA channel */</div><div class='del'>-	struct xgbe_channel *channel;</div><div class='add'>+	struct xgbe_channel *channel[XGBE_MAX_DMA_CHANNELS];</div><div class='add'>+	unsigned int tx_max_channel_count;</div><div class='add'>+	unsigned int rx_max_channel_count;</div><div class='ctx'> 	unsigned int channel_count;</div><div class='ctx'> 	unsigned int tx_ring_count;</div><div class='ctx'> 	unsigned int tx_desc_count;</div><div class='ctx'> 	unsigned int rx_ring_count;</div><div class='ctx'> 	unsigned int rx_desc_count;</div><div class='ctx'> </div><div class='add'>+	unsigned int new_tx_ring_count;</div><div class='add'>+	unsigned int new_rx_ring_count;</div><div class='add'>+</div><div class='add'>+	unsigned int tx_max_q_count;</div><div class='add'>+	unsigned int rx_max_q_count;</div><div class='ctx'> 	unsigned int tx_q_count;</div><div class='ctx'> 	unsigned int rx_q_count;</div><div class='ctx'> </div><div class='ctx'> 	/* Tx/Rx common settings */</div><div class='del'>-	unsigned int pblx8;</div><div class='add'>+	unsigned int blen;</div><div class='add'>+	unsigned int pbl;</div><div class='add'>+	unsigned int aal;</div><div class='add'>+	unsigned int rd_osr_limit;</div><div class='add'>+	unsigned int wr_osr_limit;</div><div class='ctx'> </div><div class='ctx'> 	/* Tx settings */</div><div class='ctx'> 	unsigned int tx_sf_mode;</div><div class='ctx'> 	unsigned int tx_threshold;</div><div class='del'>-	unsigned int tx_pbl;</div><div class='ctx'> 	unsigned int tx_osp_mode;</div><div class='add'>+	unsigned int tx_max_fifo_size;</div><div class='ctx'> </div><div class='ctx'> 	/* Rx settings */</div><div class='ctx'> 	unsigned int rx_sf_mode;</div><div class='ctx'> 	unsigned int rx_threshold;</div><div class='del'>-	unsigned int rx_pbl;</div><div class='add'>+	unsigned int rx_max_fifo_size;</div><div class='ctx'> </div><div class='ctx'> 	/* Tx coalescing settings */</div><div class='ctx'> 	unsigned int tx_usecs;</div><div class='hunk'>@@ -857,12 +1115,17 @@ struct xgbe_prv_data {</div><div class='ctx'> 	unsigned int pause_autoneg;</div><div class='ctx'> 	unsigned int tx_pause;</div><div class='ctx'> 	unsigned int rx_pause;</div><div class='add'>+	unsigned int rx_rfa[XGBE_MAX_QUEUES];</div><div class='add'>+	unsigned int rx_rfd[XGBE_MAX_QUEUES];</div><div class='ctx'> </div><div class='ctx'> 	/* Receive Side Scaling settings */</div><div class='ctx'> 	u8 rss_key[XGBE_RSS_HASH_KEY_SIZE];</div><div class='ctx'> 	u32 rss_table[XGBE_RSS_MAX_TABLE_SIZE];</div><div class='ctx'> 	u32 rss_options;</div><div class='ctx'> </div><div class='add'>+	/* VXLAN settings */</div><div class='add'>+	u16 vxlan_port;</div><div class='add'>+</div><div class='ctx'> 	/* Netdev related settings */</div><div class='ctx'> 	unsigned char mac_addr[ETH_ALEN];</div><div class='ctx'> 	netdev_features_t netdev_features;</div><div class='hunk'>@@ -883,25 +1146,30 @@ struct xgbe_prv_data {</div><div class='ctx'> 	spinlock_t tstamp_lock;</div><div class='ctx'> 	struct ptp_clock_info ptp_clock_info;</div><div class='ctx'> 	struct ptp_clock *ptp_clock;</div><div class='del'>-	struct hwtstamp_config tstamp_config;</div><div class='del'>-	struct cyclecounter tstamp_cc;</div><div class='del'>-	struct timecounter tstamp_tc;</div><div class='add'>+	struct kernel_hwtstamp_config tstamp_config;</div><div class='ctx'> 	unsigned int tstamp_addend;</div><div class='ctx'> 	struct work_struct tx_tstamp_work;</div><div class='ctx'> 	struct sk_buff *tx_tstamp_skb;</div><div class='ctx'> 	u64 tx_tstamp;</div><div class='ctx'> </div><div class='add'>+	/* Pulse Per Second output */</div><div class='add'>+	struct xgbe_pps_config pps[XGBE_MAX_PPS_OUT];</div><div class='add'>+</div><div class='ctx'> 	/* DCB support */</div><div class='ctx'> 	struct ieee_ets *ets;</div><div class='ctx'> 	struct ieee_pfc *pfc;</div><div class='ctx'> 	unsigned int q2tc_map[XGBE_MAX_QUEUES];</div><div class='ctx'> 	unsigned int prio2q_map[IEEE_8021QAZ_MAX_TCS];</div><div class='add'>+	unsigned int pfcq[XGBE_MAX_QUEUES];</div><div class='add'>+	unsigned int pfc_rfa;</div><div class='add'>+	u8 num_tcs;</div><div class='ctx'> </div><div class='ctx'> 	/* Hardware features of the device */</div><div class='ctx'> 	struct xgbe_hw_features hw_feat;</div><div class='ctx'> </div><div class='del'>-	/* Device restart work structure */</div><div class='add'>+	/* Device work structures */</div><div class='ctx'> 	struct work_struct restart_work;</div><div class='add'>+	struct work_struct stopdev_work;</div><div class='ctx'> </div><div class='ctx'> 	/* Keeps track of power mode */</div><div class='ctx'> 	unsigned int power_down;</div><div class='hunk'>@@ -915,9 +1183,14 @@ struct xgbe_prv_data {</div><div class='ctx'> 	int phy_speed;</div><div class='ctx'> </div><div class='ctx'> 	/* MDIO/PHY related settings */</div><div class='add'>+	unsigned int phy_started;</div><div class='add'>+	void *phy_data;</div><div class='ctx'> 	struct xgbe_phy phy;</div><div class='ctx'> 	int mdio_mmd;</div><div class='ctx'> 	unsigned long link_check;</div><div class='add'>+	struct completion mdio_complete;</div><div class='add'>+</div><div class='add'>+	unsigned int kr_redrv;</div><div class='ctx'> </div><div class='ctx'> 	char an_name[IFNAMSIZ + 32];</div><div class='ctx'> 	struct workqueue_struct *an_workqueue;</div><div class='hunk'>@@ -925,52 +1198,84 @@ struct xgbe_prv_data {</div><div class='ctx'> 	int an_irq;</div><div class='ctx'> 	struct work_struct an_irq_work;</div><div class='ctx'> </div><div class='del'>-	unsigned int speed_set;</div><div class='del'>-</div><div class='del'>-	/* SerDes UEFI configurable settings.</div><div class='del'>-	 *   Switching between modes/speeds requires new values for some</div><div class='del'>-	 *   SerDes settings.  The values can be supplied as device</div><div class='del'>-	 *   properties in array format.  The first array entry is for</div><div class='del'>-	 *   1GbE, second for 2.5GbE and third for 10GbE</div><div class='del'>-	 */</div><div class='del'>-	u32 serdes_blwc[XGBE_SPEEDS];</div><div class='del'>-	u32 serdes_cdr_rate[XGBE_SPEEDS];</div><div class='del'>-	u32 serdes_pq_skew[XGBE_SPEEDS];</div><div class='del'>-	u32 serdes_tx_amp[XGBE_SPEEDS];</div><div class='del'>-	u32 serdes_dfe_tap_cfg[XGBE_SPEEDS];</div><div class='del'>-	u32 serdes_dfe_tap_ena[XGBE_SPEEDS];</div><div class='del'>-</div><div class='ctx'> 	/* Auto-negotiation state machine support */</div><div class='add'>+	unsigned int an_int;</div><div class='add'>+	unsigned int an_status;</div><div class='ctx'> 	struct mutex an_mutex;</div><div class='ctx'> 	enum xgbe_an an_result;</div><div class='ctx'> 	enum xgbe_an an_state;</div><div class='ctx'> 	enum xgbe_rx kr_state;</div><div class='ctx'> 	enum xgbe_rx kx_state;</div><div class='ctx'> 	struct work_struct an_work;</div><div class='add'>+	unsigned int an_again;</div><div class='ctx'> 	unsigned int an_supported;</div><div class='ctx'> 	unsigned int parallel_detect;</div><div class='ctx'> 	unsigned int fec_ability;</div><div class='ctx'> 	unsigned long an_start;</div><div class='add'>+	unsigned long kr_start_time;</div><div class='add'>+	enum xgbe_an_mode an_mode;</div><div class='add'>+</div><div class='add'>+	/* I2C support */</div><div class='add'>+	struct xgbe_i2c i2c;</div><div class='add'>+	struct mutex i2c_mutex;</div><div class='add'>+	struct completion i2c_complete;</div><div class='add'>+	char i2c_name[IFNAMSIZ + 32];</div><div class='ctx'> </div><div class='ctx'> 	unsigned int lpm_ctrl;		/* CTRL1 for resume */</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_DEBUG_FS</div><div class='add'>+	unsigned int isr_as_bh_work;</div><div class='add'>+	struct work_struct dev_bh_work;</div><div class='add'>+	struct work_struct ecc_bh_work;</div><div class='add'>+	struct work_struct i2c_bh_work;</div><div class='add'>+	struct work_struct an_bh_work;</div><div class='add'>+</div><div class='ctx'> 	struct dentry *xgbe_debugfs;</div><div class='ctx'> </div><div class='ctx'> 	unsigned int debugfs_xgmac_reg;</div><div class='ctx'> </div><div class='ctx'> 	unsigned int debugfs_xpcs_mmd;</div><div class='ctx'> 	unsigned int debugfs_xpcs_reg;</div><div class='del'>-#endif</div><div class='add'>+</div><div class='add'>+	unsigned int debugfs_xprop_reg;</div><div class='add'>+</div><div class='add'>+	unsigned int debugfs_xi2c_reg;</div><div class='add'>+</div><div class='add'>+	bool debugfs_an_cdr_workaround;</div><div class='add'>+	bool debugfs_an_cdr_track_early;</div><div class='add'>+	bool en_rx_adap;</div><div class='add'>+	int rx_adapt_retries;</div><div class='add'>+	bool rx_adapt_done;</div><div class='add'>+	bool mode_set;</div><div class='add'>+	bool sph;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* Function prototypes*/</div><div class='add'>+struct xgbe_prv_data *xgbe_alloc_pdata(struct device *);</div><div class='add'>+void xgbe_free_pdata(struct xgbe_prv_data *);</div><div class='add'>+void xgbe_set_counts(struct xgbe_prv_data *);</div><div class='add'>+int xgbe_config_netdev(struct xgbe_prv_data *);</div><div class='add'>+void xgbe_deconfig_netdev(struct xgbe_prv_data *);</div><div class='add'>+</div><div class='add'>+int xgbe_platform_init(void);</div><div class='add'>+void xgbe_platform_exit(void);</div><div class='add'>+#ifdef CONFIG_PCI</div><div class='add'>+int xgbe_pci_init(void);</div><div class='add'>+void xgbe_pci_exit(void);</div><div class='add'>+#else</div><div class='add'>+static inline int xgbe_pci_init(void) { return 0; }</div><div class='add'>+static inline void xgbe_pci_exit(void) { }</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='ctx'> void xgbe_init_function_ptrs_dev(struct xgbe_hw_if *);</div><div class='ctx'> void xgbe_init_function_ptrs_phy(struct xgbe_phy_if *);</div><div class='add'>+void xgbe_init_function_ptrs_phy_v1(struct xgbe_phy_if *);</div><div class='add'>+void xgbe_init_function_ptrs_phy_v2(struct xgbe_phy_if *);</div><div class='ctx'> void xgbe_init_function_ptrs_desc(struct xgbe_desc_if *);</div><div class='del'>-struct net_device_ops *xgbe_get_netdev_ops(void);</div><div class='del'>-struct ethtool_ops *xgbe_get_ethtool_ops(void);</div><div class='add'>+void xgbe_init_function_ptrs_i2c(struct xgbe_i2c_if *);</div><div class='add'>+const struct net_device_ops *xgbe_get_netdev_ops(void);</div><div class='add'>+const struct ethtool_ops *xgbe_get_ethtool_ops(void);</div><div class='add'>+const struct udp_tunnel_nic_info *xgbe_get_udp_tunnel_info(void);</div><div class='add'>+</div><div class='ctx'> #ifdef CONFIG_AMD_XGBE_DCB</div><div class='ctx'> const struct dcbnl_rtnl_ops *xgbe_get_dcbnl_ops(void);</div><div class='ctx'> #endif</div><div class='hunk'>@@ -987,13 +1292,55 @@ int xgbe_powerup(struct net_device *, unsigned int);</div><div class='ctx'> int xgbe_powerdown(struct net_device *, unsigned int);</div><div class='ctx'> void xgbe_init_rx_coalesce(struct xgbe_prv_data *);</div><div class='ctx'> void xgbe_init_tx_coalesce(struct xgbe_prv_data *);</div><div class='add'>+void xgbe_restart_dev(struct xgbe_prv_data *pdata);</div><div class='add'>+void xgbe_full_restart_dev(struct xgbe_prv_data *pdata);</div><div class='add'>+</div><div class='add'>+/* For Timestamp config */</div><div class='add'>+void xgbe_config_tstamp(struct xgbe_prv_data *pdata, unsigned int mac_tscr);</div><div class='add'>+u64 xgbe_get_tstamp_time(struct xgbe_prv_data *pdata);</div><div class='add'>+u64 xgbe_get_tx_tstamp(struct xgbe_prv_data *pdata);</div><div class='add'>+void xgbe_get_rx_tstamp(struct xgbe_packet_data *packet,</div><div class='add'>+			struct xgbe_ring_desc *rdesc);</div><div class='add'>+void xgbe_get_rx_tstamp(struct xgbe_packet_data *packet,</div><div class='add'>+			struct xgbe_ring_desc *rdesc);</div><div class='add'>+void xgbe_update_tstamp_addend(struct xgbe_prv_data *pdata,</div><div class='add'>+			       unsigned int addend);</div><div class='add'>+void xgbe_set_tstamp_time(struct xgbe_prv_data *pdata, unsigned int sec,</div><div class='add'>+			  unsigned int nsec);</div><div class='add'>+void xgbe_tx_tstamp(struct work_struct *work);</div><div class='add'>+int xgbe_get_hwtstamp_settings(struct net_device *netdev,</div><div class='add'>+			       struct kernel_hwtstamp_config *config);</div><div class='add'>+int xgbe_set_hwtstamp_settings(struct net_device *netdev,</div><div class='add'>+			       struct kernel_hwtstamp_config *config,</div><div class='add'>+			       struct netlink_ext_ack *extack);</div><div class='add'>+void xgbe_prep_tx_tstamp(struct xgbe_prv_data *pdata,</div><div class='add'>+			 struct sk_buff *skb,</div><div class='add'>+			 struct xgbe_packet_data *packet);</div><div class='add'>+int xgbe_init_ptp(struct xgbe_prv_data *pdata);</div><div class='add'>+void xgbe_update_tstamp_time(struct xgbe_prv_data *pdata, unsigned int sec,</div><div class='add'>+			     unsigned int nsec);</div><div class='add'>+</div><div class='add'>+int xgbe_pps_config(struct xgbe_prv_data *pdata, struct xgbe_pps_config *cfg,</div><div class='add'>+		    int index, bool on);</div><div class='add'>+</div><div class='add'>+/* Selftest functions */</div><div class='add'>+void xgbe_selftest_run(struct net_device *dev,</div><div class='add'>+		       struct ethtool_test *etest, u64 *buf);</div><div class='add'>+void xgbe_selftest_get_strings(struct xgbe_prv_data *pdata, u8 *data);</div><div class='add'>+int xgbe_selftest_get_count(struct xgbe_prv_data *pdata);</div><div class='add'>+</div><div class='add'>+/* Loopback control */</div><div class='add'>+int xgbe_enable_mac_loopback(struct xgbe_prv_data *pdata);</div><div class='add'>+void xgbe_disable_mac_loopback(struct xgbe_prv_data *pdata);</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_DEBUG_FS</div><div class='ctx'> void xgbe_debugfs_init(struct xgbe_prv_data *);</div><div class='ctx'> void xgbe_debugfs_exit(struct xgbe_prv_data *);</div><div class='add'>+void xgbe_debugfs_rename(struct xgbe_prv_data *pdata);</div><div class='ctx'> #else</div><div class='ctx'> static inline void xgbe_debugfs_init(struct xgbe_prv_data *pdata) {}</div><div class='ctx'> static inline void xgbe_debugfs_exit(struct xgbe_prv_data *pdata) {}</div><div class='add'>+static inline void xgbe_debugfs_rename(struct xgbe_prv_data *pdata) {}</div><div class='ctx'> #endif /* CONFIG_DEBUG_FS */</div><div class='ctx'> </div><div class='ctx'> /* NOTE: Uncomment for function trace log messages in KERNEL LOG */</div><div class='head'>diff --git a/drivers/net/ethernet/apm/Kconfig b/drivers/net/ethernet/apm/Kconfig<br/>index ec63d706d464..a893ef0e9c49 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/Kconfig?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apm/Kconfig</a></div><div class='hunk'>@@ -1 +1,3 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> source "drivers/net/ethernet/apm/xgene/Kconfig"</div><div class='add'>+source "drivers/net/ethernet/apm/xgene-v2/Kconfig"</div><div class='head'>diff --git a/drivers/net/ethernet/apm/Makefile b/drivers/net/ethernet/apm/Makefile<br/>index 65ce32ad1b2c..cc8af97241fb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/Makefile?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apm/Makefile</a></div><div class='hunk'>@@ -1,5 +1,7 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> #</div><div class='ctx'> # Makefile for APM X-GENE Ethernet driver.</div><div class='ctx'> #</div><div class='ctx'> </div><div class='ctx'> obj-$(CONFIG_NET_XGENE) += xgene/</div><div class='add'>+obj-$(CONFIG_NET_XGENE_V2) += xgene-v2/</div><div class='head'>diff --git a/drivers/net/ethernet/apm/xgene-v2/Kconfig b/drivers/net/ethernet/apm/xgene-v2/Kconfig<br/>new file mode 100644<br/>index 000000000000..2274af912fb3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene-v2/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apm/xgene-v2/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+config NET_XGENE_V2</div><div class='add'>+	tristate "APM X-Gene SoC Ethernet-v2 Driver"</div><div class='add'>+	depends on ARCH_XGENE || COMPILE_TEST</div><div class='add'>+	help</div><div class='add'>+	  This is the Ethernet driver for the on-chip ethernet interface</div><div class='add'>+	  which uses a linked list of DMA descriptor architecture (v2) for</div><div class='add'>+	  APM X-Gene SoCs.</div><div class='add'>+</div><div class='add'>+	  To compile this driver as a module, choose M here. This module will</div><div class='add'>+	  be called xgene-enet-v2.</div><div class='head'>diff --git a/drivers/net/ethernet/apm/xgene-v2/Makefile b/drivers/net/ethernet/apm/xgene-v2/Makefile<br/>new file mode 100644<br/>index 000000000000..fdde3b668acd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene-v2/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apm/xgene-v2/Makefile</a></div><div class='hunk'>@@ -0,0 +1,7 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+#</div><div class='add'>+# Makefile for APM X-Gene Ethernet v2 driver</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+xgene-enet-v2-objs := main.o mac.o enet.o ring.o mdio.o ethtool.o</div><div class='add'>+obj-$(CONFIG_NET_XGENE_V2) += xgene-enet-v2.o</div><div class='head'>diff --git a/drivers/net/ethernet/apm/xgene-v2/enet.c b/drivers/net/ethernet/apm/xgene-v2/enet.c<br/>new file mode 100644<br/>index 000000000000..a8c6b379df82<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene-v2/enet.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apm/xgene-v2/enet.c</a></div><div class='hunk'>@@ -0,0 +1,71 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Applied Micro X-Gene SoC Ethernet v2 Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2017, Applied Micro Circuits Corporation</div><div class='add'>+ * Author(s): Iyappan Subramanian &lt;isubramanian@apm.com&gt;</div><div class='add'>+ *	      Keyur Chudgar &lt;kchudgar@apm.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "main.h"</div><div class='add'>+</div><div class='add'>+void xge_wr_csr(struct xge_pdata *pdata, u32 offset, u32 val)</div><div class='add'>+{</div><div class='add'>+	void __iomem *addr = pdata-&gt;resources.base_addr + offset;</div><div class='add'>+</div><div class='add'>+	iowrite32(val, addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 xge_rd_csr(struct xge_pdata *pdata, u32 offset)</div><div class='add'>+{</div><div class='add'>+	void __iomem *addr = pdata-&gt;resources.base_addr + offset;</div><div class='add'>+</div><div class='add'>+	return ioread32(addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int xge_port_reset(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct xge_pdata *pdata = netdev_priv(ndev);</div><div class='add'>+	struct device *dev = &amp;pdata-&gt;pdev-&gt;dev;</div><div class='add'>+	u32 data, wait = 10;</div><div class='add'>+</div><div class='add'>+	xge_wr_csr(pdata, ENET_CLKEN, 0x3);</div><div class='add'>+	xge_wr_csr(pdata, ENET_SRST, 0xf);</div><div class='add'>+	xge_wr_csr(pdata, ENET_SRST, 0);</div><div class='add'>+	xge_wr_csr(pdata, CFG_MEM_RAM_SHUTDOWN, 1);</div><div class='add'>+	xge_wr_csr(pdata, CFG_MEM_RAM_SHUTDOWN, 0);</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		usleep_range(100, 110);</div><div class='add'>+		data = xge_rd_csr(pdata, BLOCK_MEM_RDY);</div><div class='add'>+	} while (data != MEM_RDY &amp;&amp; wait--);</div><div class='add'>+</div><div class='add'>+	if (data != MEM_RDY) {</div><div class='add'>+		dev_err(dev, "ECC init failed: %x\n", data);</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	xge_wr_csr(pdata, ENET_SHIM, DEVM_ARAUX_COH | DEVM_AWAUX_COH);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xge_traffic_resume(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct xge_pdata *pdata = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	xge_wr_csr(pdata, CFG_FORCE_LINK_STATUS_EN, 1);</div><div class='add'>+	xge_wr_csr(pdata, FORCE_LINK_STATUS, 1);</div><div class='add'>+</div><div class='add'>+	xge_wr_csr(pdata, CFG_LINK_AGGR_RESUME, 1);</div><div class='add'>+	xge_wr_csr(pdata, RX_DV_GATE_REG, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void xge_port_init(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct xge_pdata *pdata = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	pdata-&gt;phy_speed = SPEED_1000;</div><div class='add'>+	xge_mac_init(pdata);</div><div class='add'>+	xge_traffic_resume(ndev);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/apm/xgene-v2/enet.h b/drivers/net/ethernet/apm/xgene-v2/enet.h<br/>new file mode 100644<br/>index 000000000000..15cbd0ca1e9a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene-v2/enet.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apm/xgene-v2/enet.h</a></div><div class='hunk'>@@ -0,0 +1,33 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+/*</div><div class='add'>+ * Applied Micro X-Gene SoC Ethernet v2 Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2017, Applied Micro Circuits Corporation</div><div class='add'>+ * Author(s): Iyappan Subramanian &lt;isubramanian@apm.com&gt;</div><div class='add'>+ *	      Keyur Chudgar &lt;kchudgar@apm.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __XGENE_ENET_V2_ENET_H__</div><div class='add'>+#define __XGENE_ENET_V2_ENET_H__</div><div class='add'>+</div><div class='add'>+#define ENET_CLKEN		0xc008</div><div class='add'>+#define ENET_SRST		0xc000</div><div class='add'>+#define ENET_SHIM		0xc010</div><div class='add'>+#define CFG_MEM_RAM_SHUTDOWN	0xd070</div><div class='add'>+#define BLOCK_MEM_RDY		0xd074</div><div class='add'>+</div><div class='add'>+#define MEM_RDY			0xffffffff</div><div class='add'>+#define DEVM_ARAUX_COH		BIT(19)</div><div class='add'>+#define DEVM_AWAUX_COH		BIT(3)</div><div class='add'>+</div><div class='add'>+#define CFG_FORCE_LINK_STATUS_EN	0x229c</div><div class='add'>+#define FORCE_LINK_STATUS		0x22a0</div><div class='add'>+#define CFG_LINK_AGGR_RESUME		0x27c8</div><div class='add'>+#define RX_DV_GATE_REG			0x2dfc</div><div class='add'>+</div><div class='add'>+void xge_wr_csr(struct xge_pdata *pdata, u32 offset, u32 val);</div><div class='add'>+u32 xge_rd_csr(struct xge_pdata *pdata, u32 offset);</div><div class='add'>+int xge_port_reset(struct net_device *ndev);</div><div class='add'>+void xge_port_init(struct net_device *ndev);</div><div class='add'>+</div><div class='add'>+#endif  /* __XGENE_ENET_V2_ENET__H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/apm/xgene-v2/ethtool.c b/drivers/net/ethernet/apm/xgene-v2/ethtool.c<br/>new file mode 100644<br/>index 000000000000..b78d1a99fe81<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene-v2/ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apm/xgene-v2/ethtool.c</a></div><div class='hunk'>@@ -0,0 +1,175 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Applied Micro X-Gene SoC Ethernet v2 Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2017, Applied Micro Circuits Corporation</div><div class='add'>+ * Author(s): Iyappan Subramanian &lt;isubramanian@apm.com&gt;</div><div class='add'>+ *	      Keyur Chudgar &lt;kchudgar@apm.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "main.h"</div><div class='add'>+</div><div class='add'>+#define XGE_STAT(m)		{ #m, offsetof(struct xge_pdata, stats.m) }</div><div class='add'>+#define XGE_EXTD_STAT(m, n)					\</div><div class='add'>+	{							\</div><div class='add'>+		#m,						\</div><div class='add'>+		n,						\</div><div class='add'>+		0						\</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+static const struct xge_gstrings_stats gstrings_stats[] = {</div><div class='add'>+	XGE_STAT(rx_packets),</div><div class='add'>+	XGE_STAT(tx_packets),</div><div class='add'>+	XGE_STAT(rx_bytes),</div><div class='add'>+	XGE_STAT(tx_bytes),</div><div class='add'>+	XGE_STAT(rx_errors)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct xge_gstrings_extd_stats gstrings_extd_stats[] = {</div><div class='add'>+	XGE_EXTD_STAT(tx_rx_64b_frame_cntr, TR64),</div><div class='add'>+	XGE_EXTD_STAT(tx_rx_127b_frame_cntr, TR127),</div><div class='add'>+	XGE_EXTD_STAT(tx_rx_255b_frame_cntr, TR255),</div><div class='add'>+	XGE_EXTD_STAT(tx_rx_511b_frame_cntr, TR511),</div><div class='add'>+	XGE_EXTD_STAT(tx_rx_1023b_frame_cntr, TR1K),</div><div class='add'>+	XGE_EXTD_STAT(tx_rx_1518b_frame_cntr, TRMAX),</div><div class='add'>+	XGE_EXTD_STAT(tx_rx_1522b_frame_cntr, TRMGV),</div><div class='add'>+	XGE_EXTD_STAT(rx_fcs_error_cntr, RFCS),</div><div class='add'>+	XGE_EXTD_STAT(rx_multicast_pkt_cntr, RMCA),</div><div class='add'>+	XGE_EXTD_STAT(rx_broadcast_pkt_cntr, RBCA),</div><div class='add'>+	XGE_EXTD_STAT(rx_ctrl_frame_pkt_cntr, RXCF),</div><div class='add'>+	XGE_EXTD_STAT(rx_pause_frame_pkt_cntr, RXPF),</div><div class='add'>+	XGE_EXTD_STAT(rx_unk_opcode_cntr, RXUO),</div><div class='add'>+	XGE_EXTD_STAT(rx_align_err_cntr, RALN),</div><div class='add'>+	XGE_EXTD_STAT(rx_frame_len_err_cntr, RFLR),</div><div class='add'>+	XGE_EXTD_STAT(rx_code_err_cntr, RCDE),</div><div class='add'>+	XGE_EXTD_STAT(rx_carrier_sense_err_cntr, RCSE),</div><div class='add'>+	XGE_EXTD_STAT(rx_undersize_pkt_cntr, RUND),</div><div class='add'>+	XGE_EXTD_STAT(rx_oversize_pkt_cntr, ROVR),</div><div class='add'>+	XGE_EXTD_STAT(rx_fragments_cntr, RFRG),</div><div class='add'>+	XGE_EXTD_STAT(rx_jabber_cntr, RJBR),</div><div class='add'>+	XGE_EXTD_STAT(rx_dropped_pkt_cntr, RDRP),</div><div class='add'>+	XGE_EXTD_STAT(tx_multicast_pkt_cntr, TMCA),</div><div class='add'>+	XGE_EXTD_STAT(tx_broadcast_pkt_cntr, TBCA),</div><div class='add'>+	XGE_EXTD_STAT(tx_pause_ctrl_frame_cntr, TXPF),</div><div class='add'>+	XGE_EXTD_STAT(tx_defer_pkt_cntr, TDFR),</div><div class='add'>+	XGE_EXTD_STAT(tx_excv_defer_pkt_cntr, TEDF),</div><div class='add'>+	XGE_EXTD_STAT(tx_single_col_pkt_cntr, TSCL),</div><div class='add'>+	XGE_EXTD_STAT(tx_multi_col_pkt_cntr, TMCL),</div><div class='add'>+	XGE_EXTD_STAT(tx_late_col_pkt_cntr, TLCL),</div><div class='add'>+	XGE_EXTD_STAT(tx_excv_col_pkt_cntr, TXCL),</div><div class='add'>+	XGE_EXTD_STAT(tx_total_col_cntr, TNCL),</div><div class='add'>+	XGE_EXTD_STAT(tx_pause_frames_hnrd_cntr, TPFH),</div><div class='add'>+	XGE_EXTD_STAT(tx_drop_frame_cntr, TDRP),</div><div class='add'>+	XGE_EXTD_STAT(tx_jabber_frame_cntr, TJBR),</div><div class='add'>+	XGE_EXTD_STAT(tx_fcs_error_cntr, TFCS),</div><div class='add'>+	XGE_EXTD_STAT(tx_ctrl_frame_cntr, TXCF),</div><div class='add'>+	XGE_EXTD_STAT(tx_oversize_frame_cntr, TOVR),</div><div class='add'>+	XGE_EXTD_STAT(tx_undersize_frame_cntr, TUND),</div><div class='add'>+	XGE_EXTD_STAT(tx_fragments_cntr, TFRG)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define XGE_STATS_LEN		ARRAY_SIZE(gstrings_stats)</div><div class='add'>+#define XGE_EXTD_STATS_LEN	ARRAY_SIZE(gstrings_extd_stats)</div><div class='add'>+</div><div class='add'>+static void xge_mac_get_extd_stats(struct xge_pdata *pdata)</div><div class='add'>+{</div><div class='add'>+	u32 data;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; XGE_EXTD_STATS_LEN; i++) {</div><div class='add'>+		data = xge_rd_csr(pdata, gstrings_extd_stats[i].addr);</div><div class='add'>+		gstrings_extd_stats[i].value += data;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xge_get_drvinfo(struct net_device *ndev,</div><div class='add'>+			    struct ethtool_drvinfo *info)</div><div class='add'>+{</div><div class='add'>+	struct xge_pdata *pdata = netdev_priv(ndev);</div><div class='add'>+	struct platform_device *pdev = pdata-&gt;pdev;</div><div class='add'>+</div><div class='add'>+	strcpy(info-&gt;driver, "xgene-enet-v2");</div><div class='add'>+	sprintf(info-&gt;bus_info, "%s", pdev-&gt;name);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xge_get_strings(struct net_device *ndev, u32 stringset, u8 *data)</div><div class='add'>+{</div><div class='add'>+	u8 *p = data;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (stringset != ETH_SS_STATS)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; XGE_STATS_LEN; i++) {</div><div class='add'>+		memcpy(p, gstrings_stats[i].name, ETH_GSTRING_LEN);</div><div class='add'>+		p += ETH_GSTRING_LEN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; XGE_EXTD_STATS_LEN; i++) {</div><div class='add'>+		memcpy(p, gstrings_extd_stats[i].name, ETH_GSTRING_LEN);</div><div class='add'>+		p += ETH_GSTRING_LEN;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xge_get_sset_count(struct net_device *ndev, int sset)</div><div class='add'>+{</div><div class='add'>+	if (sset != ETH_SS_STATS)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return XGE_STATS_LEN + XGE_EXTD_STATS_LEN;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xge_get_ethtool_stats(struct net_device *ndev,</div><div class='add'>+				  struct ethtool_stats *dummy,</div><div class='add'>+				  u64 *data)</div><div class='add'>+{</div><div class='add'>+	void *pdata = netdev_priv(ndev);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; XGE_STATS_LEN; i++)</div><div class='add'>+		*data++ = *(u64 *)(pdata + gstrings_stats[i].offset);</div><div class='add'>+</div><div class='add'>+	xge_mac_get_extd_stats(pdata);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; XGE_EXTD_STATS_LEN; i++)</div><div class='add'>+		*data++ = gstrings_extd_stats[i].value;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xge_get_link_ksettings(struct net_device *ndev,</div><div class='add'>+				  struct ethtool_link_ksettings *cmd)</div><div class='add'>+{</div><div class='add'>+	struct phy_device *phydev = ndev-&gt;phydev;</div><div class='add'>+</div><div class='add'>+	if (!phydev)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	phy_ethtool_ksettings_get(phydev, cmd);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xge_set_link_ksettings(struct net_device *ndev,</div><div class='add'>+				  const struct ethtool_link_ksettings *cmd)</div><div class='add'>+{</div><div class='add'>+	struct phy_device *phydev = ndev-&gt;phydev;</div><div class='add'>+</div><div class='add'>+	if (!phydev)</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	return phy_ethtool_ksettings_set(phydev, cmd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct ethtool_ops xge_ethtool_ops = {</div><div class='add'>+	.get_drvinfo = xge_get_drvinfo,</div><div class='add'>+	.get_link = ethtool_op_get_link,</div><div class='add'>+	.get_strings = xge_get_strings,</div><div class='add'>+	.get_sset_count = xge_get_sset_count,</div><div class='add'>+	.get_ethtool_stats = xge_get_ethtool_stats,</div><div class='add'>+	.get_link_ksettings = xge_get_link_ksettings,</div><div class='add'>+	.set_link_ksettings = xge_set_link_ksettings,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void xge_set_ethtool_ops(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	ndev-&gt;ethtool_ops = &amp;xge_ethtool_ops;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/apm/xgene-v2/ethtool.h b/drivers/net/ethernet/apm/xgene-v2/ethtool.h<br/>new file mode 100644<br/>index 000000000000..8263b4aca6fe<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene-v2/ethtool.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apm/xgene-v2/ethtool.h</a></div><div class='hunk'>@@ -0,0 +1,66 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+/*</div><div class='add'>+ * Applied Micro X-Gene SoC Ethernet v2 Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2017, Applied Micro Circuits Corporation</div><div class='add'>+ * Author(s): Iyappan Subramanian &lt;isubramanian@apm.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __XGENE_ENET_V2_ETHTOOL_H__</div><div class='add'>+#define __XGENE_ENET_V2_ETHTOOL_H__</div><div class='add'>+</div><div class='add'>+struct xge_gstrings_stats {</div><div class='add'>+	char name[ETH_GSTRING_LEN];</div><div class='add'>+	int offset;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct xge_gstrings_extd_stats {</div><div class='add'>+	char name[ETH_GSTRING_LEN];</div><div class='add'>+	u32 addr;</div><div class='add'>+	u32 value;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define TR64			0xa080</div><div class='add'>+#define TR127			0xa084</div><div class='add'>+#define TR255			0xa088</div><div class='add'>+#define TR511			0xa08c</div><div class='add'>+#define TR1K			0xa090</div><div class='add'>+#define TRMAX			0xa094</div><div class='add'>+#define TRMGV			0xa098</div><div class='add'>+#define RFCS			0xa0a4</div><div class='add'>+#define RMCA			0xa0a8</div><div class='add'>+#define RBCA			0xa0ac</div><div class='add'>+#define RXCF			0xa0b0</div><div class='add'>+#define RXPF			0xa0b4</div><div class='add'>+#define RXUO			0xa0b8</div><div class='add'>+#define RALN			0xa0bc</div><div class='add'>+#define RFLR			0xa0c0</div><div class='add'>+#define RCDE			0xa0c4</div><div class='add'>+#define RCSE			0xa0c8</div><div class='add'>+#define RUND			0xa0cc</div><div class='add'>+#define ROVR			0xa0d0</div><div class='add'>+#define RFRG			0xa0d4</div><div class='add'>+#define RJBR			0xa0d8</div><div class='add'>+#define RDRP			0xa0dc</div><div class='add'>+#define TMCA			0xa0e8</div><div class='add'>+#define TBCA			0xa0ec</div><div class='add'>+#define TXPF			0xa0f0</div><div class='add'>+#define TDFR			0xa0f4</div><div class='add'>+#define TEDF			0xa0f8</div><div class='add'>+#define TSCL			0xa0fc</div><div class='add'>+#define TMCL			0xa100</div><div class='add'>+#define TLCL			0xa104</div><div class='add'>+#define TXCL			0xa108</div><div class='add'>+#define TNCL			0xa10c</div><div class='add'>+#define TPFH			0xa110</div><div class='add'>+#define TDRP			0xa114</div><div class='add'>+#define TJBR			0xa118</div><div class='add'>+#define TFCS			0xa11c</div><div class='add'>+#define TXCF			0xa120</div><div class='add'>+#define TOVR			0xa124</div><div class='add'>+#define TUND			0xa128</div><div class='add'>+#define TFRG			0xa12c</div><div class='add'>+</div><div class='add'>+void xge_set_ethtool_ops(struct net_device *ndev);</div><div class='add'>+</div><div class='add'>+#endif  /* __XGENE_ENET_V2_ETHTOOL_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/apm/xgene-v2/mac.c b/drivers/net/ethernet/apm/xgene-v2/mac.c<br/>new file mode 100644<br/>index 000000000000..6423e22e05b2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene-v2/mac.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apm/xgene-v2/mac.c</a></div><div class='hunk'>@@ -0,0 +1,104 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Applied Micro X-Gene SoC Ethernet v2 Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2017, Applied Micro Circuits Corporation</div><div class='add'>+ * Author(s): Iyappan Subramanian &lt;isubramanian@apm.com&gt;</div><div class='add'>+ *	      Keyur Chudgar &lt;kchudgar@apm.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "main.h"</div><div class='add'>+</div><div class='add'>+void xge_mac_reset(struct xge_pdata *pdata)</div><div class='add'>+{</div><div class='add'>+	xge_wr_csr(pdata, MAC_CONFIG_1, SOFT_RESET);</div><div class='add'>+	xge_wr_csr(pdata, MAC_CONFIG_1, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void xge_mac_set_speed(struct xge_pdata *pdata)</div><div class='add'>+{</div><div class='add'>+	u32 icm0, icm2, ecm0, mc2;</div><div class='add'>+	u32 intf_ctrl, rgmii;</div><div class='add'>+</div><div class='add'>+	icm0 = xge_rd_csr(pdata, ICM_CONFIG0_REG_0);</div><div class='add'>+	icm2 = xge_rd_csr(pdata, ICM_CONFIG2_REG_0);</div><div class='add'>+	ecm0 = xge_rd_csr(pdata, ECM_CONFIG0_REG_0);</div><div class='add'>+	rgmii = xge_rd_csr(pdata, RGMII_REG_0);</div><div class='add'>+	mc2 = xge_rd_csr(pdata, MAC_CONFIG_2);</div><div class='add'>+	intf_ctrl = xge_rd_csr(pdata, INTERFACE_CONTROL);</div><div class='add'>+	icm2 |= CFG_WAITASYNCRD_EN;</div><div class='add'>+</div><div class='add'>+	switch (pdata-&gt;phy_speed) {</div><div class='add'>+	case SPEED_10:</div><div class='add'>+		SET_REG_BITS(&amp;mc2, INTF_MODE, 1);</div><div class='add'>+		SET_REG_BITS(&amp;intf_ctrl, HD_MODE, 0);</div><div class='add'>+		SET_REG_BITS(&amp;icm0, CFG_MACMODE, 0);</div><div class='add'>+		SET_REG_BITS(&amp;icm2, CFG_WAITASYNCRD, 500);</div><div class='add'>+		SET_REG_BIT(&amp;rgmii, CFG_SPEED_125, 0);</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_100:</div><div class='add'>+		SET_REG_BITS(&amp;mc2, INTF_MODE, 1);</div><div class='add'>+		SET_REG_BITS(&amp;intf_ctrl, HD_MODE, 1);</div><div class='add'>+		SET_REG_BITS(&amp;icm0, CFG_MACMODE, 1);</div><div class='add'>+		SET_REG_BITS(&amp;icm2, CFG_WAITASYNCRD, 80);</div><div class='add'>+		SET_REG_BIT(&amp;rgmii, CFG_SPEED_125, 0);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		SET_REG_BITS(&amp;mc2, INTF_MODE, 2);</div><div class='add'>+		SET_REG_BITS(&amp;intf_ctrl, HD_MODE, 2);</div><div class='add'>+		SET_REG_BITS(&amp;icm0, CFG_MACMODE, 2);</div><div class='add'>+		SET_REG_BITS(&amp;icm2, CFG_WAITASYNCRD, 16);</div><div class='add'>+		SET_REG_BIT(&amp;rgmii, CFG_SPEED_125, 1);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mc2 |= FULL_DUPLEX | CRC_EN | PAD_CRC;</div><div class='add'>+	SET_REG_BITS(&amp;ecm0, CFG_WFIFOFULLTHR, 0x32);</div><div class='add'>+</div><div class='add'>+	xge_wr_csr(pdata, MAC_CONFIG_2, mc2);</div><div class='add'>+	xge_wr_csr(pdata, INTERFACE_CONTROL, intf_ctrl);</div><div class='add'>+	xge_wr_csr(pdata, RGMII_REG_0, rgmii);</div><div class='add'>+	xge_wr_csr(pdata, ICM_CONFIG0_REG_0, icm0);</div><div class='add'>+	xge_wr_csr(pdata, ICM_CONFIG2_REG_0, icm2);</div><div class='add'>+	xge_wr_csr(pdata, ECM_CONFIG0_REG_0, ecm0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void xge_mac_set_station_addr(struct xge_pdata *pdata)</div><div class='add'>+{</div><div class='add'>+	const u8 *dev_addr = pdata-&gt;ndev-&gt;dev_addr;</div><div class='add'>+	u32 addr0, addr1;</div><div class='add'>+</div><div class='add'>+	addr0 = (dev_addr[3] &lt;&lt; 24) | (dev_addr[2] &lt;&lt; 16) |</div><div class='add'>+		(dev_addr[1] &lt;&lt; 8) | dev_addr[0];</div><div class='add'>+	addr1 = (dev_addr[5] &lt;&lt; 24) | (dev_addr[4] &lt;&lt; 16);</div><div class='add'>+</div><div class='add'>+	xge_wr_csr(pdata, STATION_ADDR0, addr0);</div><div class='add'>+	xge_wr_csr(pdata, STATION_ADDR1, addr1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void xge_mac_init(struct xge_pdata *pdata)</div><div class='add'>+{</div><div class='add'>+	xge_mac_reset(pdata);</div><div class='add'>+	xge_mac_set_speed(pdata);</div><div class='add'>+	xge_mac_set_station_addr(pdata);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void xge_mac_enable(struct xge_pdata *pdata)</div><div class='add'>+{</div><div class='add'>+	u32 data;</div><div class='add'>+</div><div class='add'>+	data = xge_rd_csr(pdata, MAC_CONFIG_1);</div><div class='add'>+	data |= TX_EN | RX_EN;</div><div class='add'>+	xge_wr_csr(pdata, MAC_CONFIG_1, data);</div><div class='add'>+</div><div class='add'>+	data = xge_rd_csr(pdata, MAC_CONFIG_1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void xge_mac_disable(struct xge_pdata *pdata)</div><div class='add'>+{</div><div class='add'>+	u32 data;</div><div class='add'>+</div><div class='add'>+	data = xge_rd_csr(pdata, MAC_CONFIG_1);</div><div class='add'>+	data &amp;= ~(TX_EN | RX_EN);</div><div class='add'>+	xge_wr_csr(pdata, MAC_CONFIG_1, data);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/apm/xgene-v2/mac.h b/drivers/net/ethernet/apm/xgene-v2/mac.h<br/>new file mode 100644<br/>index 000000000000..7392f606687b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene-v2/mac.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apm/xgene-v2/mac.h</a></div><div class='hunk'>@@ -0,0 +1,95 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+/*</div><div class='add'>+ * Applied Micro X-Gene SoC Ethernet v2 Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2017, Applied Micro Circuits Corporation</div><div class='add'>+ * Author(s): Iyappan Subramanian &lt;isubramanian@apm.com&gt;</div><div class='add'>+ *	      Keyur Chudgar &lt;kchudgar@apm.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __XGENE_ENET_V2_MAC_H__</div><div class='add'>+#define __XGENE_ENET_V2_MAC_H__</div><div class='add'>+</div><div class='add'>+/* Register offsets */</div><div class='add'>+#define MAC_CONFIG_1		0xa000</div><div class='add'>+#define MAC_CONFIG_2		0xa004</div><div class='add'>+#define MII_MGMT_CONFIG		0xa020</div><div class='add'>+#define MII_MGMT_COMMAND	0xa024</div><div class='add'>+#define MII_MGMT_ADDRESS	0xa028</div><div class='add'>+#define MII_MGMT_CONTROL	0xa02c</div><div class='add'>+#define MII_MGMT_STATUS		0xa030</div><div class='add'>+#define MII_MGMT_INDICATORS	0xa034</div><div class='add'>+#define INTERFACE_CONTROL	0xa038</div><div class='add'>+#define STATION_ADDR0		0xa040</div><div class='add'>+#define STATION_ADDR1		0xa044</div><div class='add'>+</div><div class='add'>+#define RGMII_REG_0		0x27e0</div><div class='add'>+#define ICM_CONFIG0_REG_0	0x2c00</div><div class='add'>+#define ICM_CONFIG2_REG_0	0x2c08</div><div class='add'>+#define ECM_CONFIG0_REG_0	0x2d00</div><div class='add'>+</div><div class='add'>+/* Register fields */</div><div class='add'>+#define SOFT_RESET		BIT(31)</div><div class='add'>+#define TX_EN			BIT(0)</div><div class='add'>+#define RX_EN			BIT(2)</div><div class='add'>+#define PAD_CRC			BIT(2)</div><div class='add'>+#define CRC_EN			BIT(1)</div><div class='add'>+#define FULL_DUPLEX		BIT(0)</div><div class='add'>+</div><div class='add'>+#define INTF_MODE_POS		8</div><div class='add'>+#define INTF_MODE_LEN		2</div><div class='add'>+#define HD_MODE_POS		25</div><div class='add'>+#define HD_MODE_LEN		2</div><div class='add'>+#define CFG_MACMODE_POS		18</div><div class='add'>+#define CFG_MACMODE_LEN		2</div><div class='add'>+#define CFG_WAITASYNCRD_POS	0</div><div class='add'>+#define CFG_WAITASYNCRD_LEN	16</div><div class='add'>+#define CFG_SPEED_125_POS	24</div><div class='add'>+#define CFG_WFIFOFULLTHR_POS	0</div><div class='add'>+#define CFG_WFIFOFULLTHR_LEN	7</div><div class='add'>+#define MGMT_CLOCK_SEL_POS	0</div><div class='add'>+#define MGMT_CLOCK_SEL_LEN	3</div><div class='add'>+#define PHY_ADDR_POS		8</div><div class='add'>+#define PHY_ADDR_LEN		5</div><div class='add'>+#define REG_ADDR_POS		0</div><div class='add'>+#define REG_ADDR_LEN		5</div><div class='add'>+#define MII_MGMT_BUSY		BIT(0)</div><div class='add'>+#define MII_READ_CYCLE		BIT(0)</div><div class='add'>+#define CFG_WAITASYNCRD_EN	BIT(16)</div><div class='add'>+</div><div class='add'>+static inline void xgene_set_reg_bits(u32 *var, int pos, int len, u32 val)</div><div class='add'>+{</div><div class='add'>+	u32 mask = GENMASK(pos + len, pos);</div><div class='add'>+</div><div class='add'>+	*var &amp;= ~mask;</div><div class='add'>+	*var |= ((val &lt;&lt; pos) &amp; mask);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u32 xgene_get_reg_bits(u32 var, int pos, int len)</div><div class='add'>+{</div><div class='add'>+	u32 mask = GENMASK(pos + len, pos);</div><div class='add'>+</div><div class='add'>+	return (var &amp; mask) &gt;&gt; pos;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define SET_REG_BITS(var, field, val)					\</div><div class='add'>+	xgene_set_reg_bits(var, field ## _POS, field ## _LEN, val)</div><div class='add'>+</div><div class='add'>+#define SET_REG_BIT(var, field, val)					\</div><div class='add'>+	xgene_set_reg_bits(var, field ## _POS, 1, val)</div><div class='add'>+</div><div class='add'>+#define GET_REG_BITS(var, field)					\</div><div class='add'>+	xgene_get_reg_bits(var, field ## _POS, field ## _LEN)</div><div class='add'>+</div><div class='add'>+#define GET_REG_BIT(var, field)		((var) &amp; (field))</div><div class='add'>+</div><div class='add'>+struct xge_pdata;</div><div class='add'>+</div><div class='add'>+void xge_mac_reset(struct xge_pdata *pdata);</div><div class='add'>+void xge_mac_set_speed(struct xge_pdata *pdata);</div><div class='add'>+void xge_mac_enable(struct xge_pdata *pdata);</div><div class='add'>+void xge_mac_disable(struct xge_pdata *pdata);</div><div class='add'>+void xge_mac_init(struct xge_pdata *pdata);</div><div class='add'>+void xge_mac_set_station_addr(struct xge_pdata *pdata);</div><div class='add'>+</div><div class='add'>+#endif /* __XGENE_ENET_V2_MAC_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/apm/xgene-v2/main.c b/drivers/net/ethernet/apm/xgene-v2/main.c<br/>new file mode 100644<br/>index 000000000000..d7ca847d44c7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene-v2/main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apm/xgene-v2/main.c</a></div><div class='hunk'>@@ -0,0 +1,742 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Applied Micro X-Gene SoC Ethernet v2 Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2017, Applied Micro Circuits Corporation</div><div class='add'>+ * Author(s): Iyappan Subramanian &lt;isubramanian@apm.com&gt;</div><div class='add'>+ *	      Keyur Chudgar &lt;kchudgar@apm.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "main.h"</div><div class='add'>+</div><div class='add'>+static int xge_get_resources(struct xge_pdata *pdata)</div><div class='add'>+{</div><div class='add'>+	struct platform_device *pdev;</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	int phy_mode, ret = 0;</div><div class='add'>+	struct resource *res;</div><div class='add'>+	struct device *dev;</div><div class='add'>+</div><div class='add'>+	pdev = pdata-&gt;pdev;</div><div class='add'>+	dev = &amp;pdev-&gt;dev;</div><div class='add'>+	ndev = pdata-&gt;ndev;</div><div class='add'>+</div><div class='add'>+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);</div><div class='add'>+	if (!res) {</div><div class='add'>+		dev_err(dev, "Resource enet_csr not defined\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pdata-&gt;resources.base_addr = devm_ioremap(dev, res-&gt;start,</div><div class='add'>+						  resource_size(res));</div><div class='add'>+	if (!pdata-&gt;resources.base_addr) {</div><div class='add'>+		dev_err(dev, "Unable to retrieve ENET Port CSR region\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (device_get_ethdev_address(dev, ndev))</div><div class='add'>+		eth_hw_addr_random(ndev);</div><div class='add'>+</div><div class='add'>+	memcpy(ndev-&gt;perm_addr, ndev-&gt;dev_addr, ndev-&gt;addr_len);</div><div class='add'>+</div><div class='add'>+	phy_mode = device_get_phy_mode(dev);</div><div class='add'>+	if (phy_mode &lt; 0) {</div><div class='add'>+		dev_err(dev, "Unable to get phy-connection-type\n");</div><div class='add'>+		return phy_mode;</div><div class='add'>+	}</div><div class='add'>+	pdata-&gt;resources.phy_mode = phy_mode;</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;resources.phy_mode != PHY_INTERFACE_MODE_RGMII) {</div><div class='add'>+		dev_err(dev, "Incorrect phy-connection-type specified\n");</div><div class='add'>+		return -ENODEV;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = platform_get_irq(pdev, 0);</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+	pdata-&gt;resources.irq = ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xge_refill_buffers(struct net_device *ndev, u32 nbuf)</div><div class='add'>+{</div><div class='add'>+	struct xge_pdata *pdata = netdev_priv(ndev);</div><div class='add'>+	struct xge_desc_ring *ring = pdata-&gt;rx_ring;</div><div class='add'>+	const u8 slots = XGENE_ENET_NUM_DESC - 1;</div><div class='add'>+	struct device *dev = &amp;pdata-&gt;pdev-&gt;dev;</div><div class='add'>+	struct xge_raw_desc *raw_desc;</div><div class='add'>+	u64 addr_lo, addr_hi;</div><div class='add'>+	u8 tail = ring-&gt;tail;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	dma_addr_t dma_addr;</div><div class='add'>+	u16 len;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; nbuf; i++) {</div><div class='add'>+		raw_desc = &amp;ring-&gt;raw_desc[tail];</div><div class='add'>+</div><div class='add'>+		len = XGENE_ENET_STD_MTU;</div><div class='add'>+		skb = netdev_alloc_skb(ndev, len);</div><div class='add'>+		if (unlikely(!skb))</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		dma_addr = dma_map_single(dev, skb-&gt;data, len, DMA_FROM_DEVICE);</div><div class='add'>+		if (dma_mapping_error(dev, dma_addr)) {</div><div class='add'>+			netdev_err(ndev, "DMA mapping error\n");</div><div class='add'>+			dev_kfree_skb_any(skb);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ring-&gt;pkt_info[tail].skb = skb;</div><div class='add'>+		ring-&gt;pkt_info[tail].dma_addr = dma_addr;</div><div class='add'>+</div><div class='add'>+		addr_hi = GET_BITS(NEXT_DESC_ADDRH, le64_to_cpu(raw_desc-&gt;m1));</div><div class='add'>+		addr_lo = GET_BITS(NEXT_DESC_ADDRL, le64_to_cpu(raw_desc-&gt;m1));</div><div class='add'>+		raw_desc-&gt;m1 = cpu_to_le64(SET_BITS(NEXT_DESC_ADDRL, addr_lo) |</div><div class='add'>+					   SET_BITS(NEXT_DESC_ADDRH, addr_hi) |</div><div class='add'>+					   SET_BITS(PKT_ADDRH,</div><div class='add'>+						    upper_32_bits(dma_addr)));</div><div class='add'>+</div><div class='add'>+		dma_wmb();</div><div class='add'>+		raw_desc-&gt;m0 = cpu_to_le64(SET_BITS(PKT_ADDRL, dma_addr) |</div><div class='add'>+					   SET_BITS(E, 1));</div><div class='add'>+		tail = (tail + 1) &amp; slots;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ring-&gt;tail = tail;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xge_init_hw(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct xge_pdata *pdata = netdev_priv(ndev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = xge_port_reset(ndev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	xge_port_init(ndev);</div><div class='add'>+	pdata-&gt;nbufs = NUM_BUFS;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t xge_irq(const int irq, void *data)</div><div class='add'>+{</div><div class='add'>+	struct xge_pdata *pdata = data;</div><div class='add'>+</div><div class='add'>+	if (napi_schedule_prep(&amp;pdata-&gt;napi)) {</div><div class='add'>+		xge_intr_disable(pdata);</div><div class='add'>+		__napi_schedule(&amp;pdata-&gt;napi);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xge_request_irq(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct xge_pdata *pdata = netdev_priv(ndev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	snprintf(pdata-&gt;irq_name, IRQ_ID_SIZE, "%s", ndev-&gt;name);</div><div class='add'>+</div><div class='add'>+	ret = request_irq(pdata-&gt;resources.irq, xge_irq, 0, pdata-&gt;irq_name,</div><div class='add'>+			  pdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		netdev_err(ndev, "Failed to request irq %s\n", pdata-&gt;irq_name);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xge_free_irq(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct xge_pdata *pdata = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	free_irq(pdata-&gt;resources.irq, pdata);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool is_tx_slot_available(struct xge_raw_desc *raw_desc)</div><div class='add'>+{</div><div class='add'>+	if (GET_BITS(E, le64_to_cpu(raw_desc-&gt;m0)) &amp;&amp;</div><div class='add'>+	    (GET_BITS(PKT_SIZE, le64_to_cpu(raw_desc-&gt;m0)) == SLOT_EMPTY))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static netdev_tx_t xge_start_xmit(struct sk_buff *skb, struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct xge_pdata *pdata = netdev_priv(ndev);</div><div class='add'>+	struct device *dev = &amp;pdata-&gt;pdev-&gt;dev;</div><div class='add'>+	struct xge_desc_ring *tx_ring;</div><div class='add'>+	struct xge_raw_desc *raw_desc;</div><div class='add'>+	static dma_addr_t dma_addr;</div><div class='add'>+	u64 addr_lo, addr_hi;</div><div class='add'>+	void *pkt_buf;</div><div class='add'>+	u8 tail;</div><div class='add'>+	u16 len;</div><div class='add'>+</div><div class='add'>+	tx_ring = pdata-&gt;tx_ring;</div><div class='add'>+	tail = tx_ring-&gt;tail;</div><div class='add'>+	len = skb_headlen(skb);</div><div class='add'>+	raw_desc = &amp;tx_ring-&gt;raw_desc[tail];</div><div class='add'>+</div><div class='add'>+	if (!is_tx_slot_available(raw_desc)) {</div><div class='add'>+		netif_stop_queue(ndev);</div><div class='add'>+		return NETDEV_TX_BUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Packet buffers should be 64B aligned */</div><div class='add'>+	pkt_buf = dma_alloc_coherent(dev, XGENE_ENET_STD_MTU, &amp;dma_addr,</div><div class='add'>+				     GFP_ATOMIC);</div><div class='add'>+	if (unlikely(!pkt_buf)) {</div><div class='add'>+		dev_kfree_skb_any(skb);</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+	}</div><div class='add'>+	memcpy(pkt_buf, skb-&gt;data, len);</div><div class='add'>+</div><div class='add'>+	addr_hi = GET_BITS(NEXT_DESC_ADDRH, le64_to_cpu(raw_desc-&gt;m1));</div><div class='add'>+	addr_lo = GET_BITS(NEXT_DESC_ADDRL, le64_to_cpu(raw_desc-&gt;m1));</div><div class='add'>+	raw_desc-&gt;m1 = cpu_to_le64(SET_BITS(NEXT_DESC_ADDRL, addr_lo) |</div><div class='add'>+				   SET_BITS(NEXT_DESC_ADDRH, addr_hi) |</div><div class='add'>+				   SET_BITS(PKT_ADDRH,</div><div class='add'>+					    upper_32_bits(dma_addr)));</div><div class='add'>+</div><div class='add'>+	tx_ring-&gt;pkt_info[tail].skb = skb;</div><div class='add'>+	tx_ring-&gt;pkt_info[tail].dma_addr = dma_addr;</div><div class='add'>+	tx_ring-&gt;pkt_info[tail].pkt_buf = pkt_buf;</div><div class='add'>+</div><div class='add'>+	dma_wmb();</div><div class='add'>+</div><div class='add'>+	raw_desc-&gt;m0 = cpu_to_le64(SET_BITS(PKT_ADDRL, dma_addr) |</div><div class='add'>+				   SET_BITS(PKT_SIZE, len) |</div><div class='add'>+				   SET_BITS(E, 0));</div><div class='add'>+	skb_tx_timestamp(skb);</div><div class='add'>+	xge_wr_csr(pdata, DMATXCTRL, 1);</div><div class='add'>+</div><div class='add'>+	tx_ring-&gt;tail = (tail + 1) &amp; (XGENE_ENET_NUM_DESC - 1);</div><div class='add'>+</div><div class='add'>+	return NETDEV_TX_OK;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool is_tx_hw_done(struct xge_raw_desc *raw_desc)</div><div class='add'>+{</div><div class='add'>+	if (GET_BITS(E, le64_to_cpu(raw_desc-&gt;m0)) &amp;&amp;</div><div class='add'>+	    !GET_BITS(PKT_SIZE, le64_to_cpu(raw_desc-&gt;m0)))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xge_txc_poll(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct xge_pdata *pdata = netdev_priv(ndev);</div><div class='add'>+	struct device *dev = &amp;pdata-&gt;pdev-&gt;dev;</div><div class='add'>+	struct xge_desc_ring *tx_ring;</div><div class='add'>+	struct xge_raw_desc *raw_desc;</div><div class='add'>+	dma_addr_t dma_addr;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	void *pkt_buf;</div><div class='add'>+	u32 data;</div><div class='add'>+	u8 head;</div><div class='add'>+</div><div class='add'>+	tx_ring = pdata-&gt;tx_ring;</div><div class='add'>+	head = tx_ring-&gt;head;</div><div class='add'>+</div><div class='add'>+	data = xge_rd_csr(pdata, DMATXSTATUS);</div><div class='add'>+	if (!GET_BITS(TXPKTCOUNT, data))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	while (1) {</div><div class='add'>+		raw_desc = &amp;tx_ring-&gt;raw_desc[head];</div><div class='add'>+</div><div class='add'>+		if (!is_tx_hw_done(raw_desc))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		dma_rmb();</div><div class='add'>+</div><div class='add'>+		skb = tx_ring-&gt;pkt_info[head].skb;</div><div class='add'>+		dma_addr = tx_ring-&gt;pkt_info[head].dma_addr;</div><div class='add'>+		pkt_buf = tx_ring-&gt;pkt_info[head].pkt_buf;</div><div class='add'>+		pdata-&gt;stats.tx_packets++;</div><div class='add'>+		pdata-&gt;stats.tx_bytes += skb-&gt;len;</div><div class='add'>+		dma_free_coherent(dev, XGENE_ENET_STD_MTU, pkt_buf, dma_addr);</div><div class='add'>+		dev_kfree_skb_any(skb);</div><div class='add'>+</div><div class='add'>+		/* clear pktstart address and pktsize */</div><div class='add'>+		raw_desc-&gt;m0 = cpu_to_le64(SET_BITS(E, 1) |</div><div class='add'>+					   SET_BITS(PKT_SIZE, SLOT_EMPTY));</div><div class='add'>+		xge_wr_csr(pdata, DMATXSTATUS, 1);</div><div class='add'>+</div><div class='add'>+		head = (head + 1) &amp; (XGENE_ENET_NUM_DESC - 1);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (netif_queue_stopped(ndev))</div><div class='add'>+		netif_wake_queue(ndev);</div><div class='add'>+</div><div class='add'>+	tx_ring-&gt;head = head;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xge_rx_poll(struct net_device *ndev, unsigned int budget)</div><div class='add'>+{</div><div class='add'>+	struct xge_pdata *pdata = netdev_priv(ndev);</div><div class='add'>+	struct device *dev = &amp;pdata-&gt;pdev-&gt;dev;</div><div class='add'>+	struct xge_desc_ring *rx_ring;</div><div class='add'>+	struct xge_raw_desc *raw_desc;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	dma_addr_t dma_addr;</div><div class='add'>+	int processed = 0;</div><div class='add'>+	u8 head, rx_error;</div><div class='add'>+	int i, ret;</div><div class='add'>+	u32 data;</div><div class='add'>+	u16 len;</div><div class='add'>+</div><div class='add'>+	rx_ring = pdata-&gt;rx_ring;</div><div class='add'>+	head = rx_ring-&gt;head;</div><div class='add'>+</div><div class='add'>+	data = xge_rd_csr(pdata, DMARXSTATUS);</div><div class='add'>+	if (!GET_BITS(RXPKTCOUNT, data))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; budget; i++) {</div><div class='add'>+		raw_desc = &amp;rx_ring-&gt;raw_desc[head];</div><div class='add'>+</div><div class='add'>+		if (GET_BITS(E, le64_to_cpu(raw_desc-&gt;m0)))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		dma_rmb();</div><div class='add'>+</div><div class='add'>+		skb = rx_ring-&gt;pkt_info[head].skb;</div><div class='add'>+		rx_ring-&gt;pkt_info[head].skb = NULL;</div><div class='add'>+		dma_addr = rx_ring-&gt;pkt_info[head].dma_addr;</div><div class='add'>+		len = GET_BITS(PKT_SIZE, le64_to_cpu(raw_desc-&gt;m0));</div><div class='add'>+		dma_unmap_single(dev, dma_addr, XGENE_ENET_STD_MTU,</div><div class='add'>+				 DMA_FROM_DEVICE);</div><div class='add'>+</div><div class='add'>+		rx_error = GET_BITS(D, le64_to_cpu(raw_desc-&gt;m2));</div><div class='add'>+		if (unlikely(rx_error)) {</div><div class='add'>+			pdata-&gt;stats.rx_errors++;</div><div class='add'>+			dev_kfree_skb_any(skb);</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		skb_put(skb, len);</div><div class='add'>+		skb-&gt;protocol = eth_type_trans(skb, ndev);</div><div class='add'>+</div><div class='add'>+		pdata-&gt;stats.rx_packets++;</div><div class='add'>+		pdata-&gt;stats.rx_bytes += len;</div><div class='add'>+		napi_gro_receive(&amp;pdata-&gt;napi, skb);</div><div class='add'>+out:</div><div class='add'>+		ret = xge_refill_buffers(ndev, 1);</div><div class='add'>+		xge_wr_csr(pdata, DMARXSTATUS, 1);</div><div class='add'>+		xge_wr_csr(pdata, DMARXCTRL, 1);</div><div class='add'>+</div><div class='add'>+		if (ret)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		head = (head + 1) &amp; (XGENE_ENET_NUM_DESC - 1);</div><div class='add'>+		processed++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rx_ring-&gt;head = head;</div><div class='add'>+</div><div class='add'>+	return processed;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xge_delete_desc_ring(struct net_device *ndev,</div><div class='add'>+				 struct xge_desc_ring *ring)</div><div class='add'>+{</div><div class='add'>+	struct xge_pdata *pdata = netdev_priv(ndev);</div><div class='add'>+	struct device *dev = &amp;pdata-&gt;pdev-&gt;dev;</div><div class='add'>+	u16 size;</div><div class='add'>+</div><div class='add'>+	if (!ring)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	size = XGENE_ENET_DESC_SIZE * XGENE_ENET_NUM_DESC;</div><div class='add'>+	if (ring-&gt;desc_addr)</div><div class='add'>+		dma_free_coherent(dev, size, ring-&gt;desc_addr, ring-&gt;dma_addr);</div><div class='add'>+</div><div class='add'>+	kfree(ring-&gt;pkt_info);</div><div class='add'>+	kfree(ring);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xge_free_buffers(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct xge_pdata *pdata = netdev_priv(ndev);</div><div class='add'>+	struct xge_desc_ring *ring = pdata-&gt;rx_ring;</div><div class='add'>+	struct device *dev = &amp;pdata-&gt;pdev-&gt;dev;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	dma_addr_t dma_addr;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; XGENE_ENET_NUM_DESC; i++) {</div><div class='add'>+		skb = ring-&gt;pkt_info[i].skb;</div><div class='add'>+		dma_addr = ring-&gt;pkt_info[i].dma_addr;</div><div class='add'>+</div><div class='add'>+		if (!skb)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		dma_unmap_single(dev, dma_addr, XGENE_ENET_STD_MTU,</div><div class='add'>+				 DMA_FROM_DEVICE);</div><div class='add'>+		dev_kfree_skb_any(skb);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xge_delete_desc_rings(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct xge_pdata *pdata = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	xge_txc_poll(ndev);</div><div class='add'>+	xge_delete_desc_ring(ndev, pdata-&gt;tx_ring);</div><div class='add'>+</div><div class='add'>+	xge_rx_poll(ndev, 64);</div><div class='add'>+	xge_free_buffers(ndev);</div><div class='add'>+	xge_delete_desc_ring(ndev, pdata-&gt;rx_ring);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct xge_desc_ring *xge_create_desc_ring(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct xge_pdata *pdata = netdev_priv(ndev);</div><div class='add'>+	struct device *dev = &amp;pdata-&gt;pdev-&gt;dev;</div><div class='add'>+	struct xge_desc_ring *ring;</div><div class='add'>+	u16 size;</div><div class='add'>+</div><div class='add'>+	ring = kzalloc(sizeof(*ring), GFP_KERNEL);</div><div class='add'>+	if (!ring)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	ring-&gt;ndev = ndev;</div><div class='add'>+</div><div class='add'>+	size = XGENE_ENET_DESC_SIZE * XGENE_ENET_NUM_DESC;</div><div class='add'>+	ring-&gt;desc_addr = dma_alloc_coherent(dev, size, &amp;ring-&gt;dma_addr,</div><div class='add'>+					     GFP_KERNEL);</div><div class='add'>+	if (!ring-&gt;desc_addr)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	ring-&gt;pkt_info = kcalloc(XGENE_ENET_NUM_DESC, sizeof(*ring-&gt;pkt_info),</div><div class='add'>+				 GFP_KERNEL);</div><div class='add'>+	if (!ring-&gt;pkt_info)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	xge_setup_desc(ring);</div><div class='add'>+</div><div class='add'>+	return ring;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	xge_delete_desc_ring(ndev, ring);</div><div class='add'>+</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xge_create_desc_rings(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct xge_pdata *pdata = netdev_priv(ndev);</div><div class='add'>+	struct xge_desc_ring *ring;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* create tx ring */</div><div class='add'>+	ring = xge_create_desc_ring(ndev);</div><div class='add'>+	if (!ring)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	pdata-&gt;tx_ring = ring;</div><div class='add'>+	xge_update_tx_desc_addr(pdata);</div><div class='add'>+</div><div class='add'>+	/* create rx ring */</div><div class='add'>+	ring = xge_create_desc_ring(ndev);</div><div class='add'>+	if (!ring)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	pdata-&gt;rx_ring = ring;</div><div class='add'>+	xge_update_rx_desc_addr(pdata);</div><div class='add'>+</div><div class='add'>+	ret = xge_refill_buffers(ndev, XGENE_ENET_NUM_DESC);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+err:</div><div class='add'>+	xge_delete_desc_rings(ndev);</div><div class='add'>+</div><div class='add'>+	return -ENOMEM;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xge_open(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct xge_pdata *pdata = netdev_priv(ndev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = xge_create_desc_rings(ndev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	napi_enable(&amp;pdata-&gt;napi);</div><div class='add'>+	ret = xge_request_irq(ndev);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	xge_intr_enable(pdata);</div><div class='add'>+	xge_wr_csr(pdata, DMARXCTRL, 1);</div><div class='add'>+</div><div class='add'>+	phy_start(ndev-&gt;phydev);</div><div class='add'>+	xge_mac_enable(pdata);</div><div class='add'>+	netif_start_queue(ndev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xge_close(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct xge_pdata *pdata = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(ndev);</div><div class='add'>+	xge_mac_disable(pdata);</div><div class='add'>+	phy_stop(ndev-&gt;phydev);</div><div class='add'>+</div><div class='add'>+	xge_intr_disable(pdata);</div><div class='add'>+	xge_free_irq(ndev);</div><div class='add'>+	napi_disable(&amp;pdata-&gt;napi);</div><div class='add'>+	xge_delete_desc_rings(ndev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xge_napi(struct napi_struct *napi, const int budget)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = napi-&gt;dev;</div><div class='add'>+	struct xge_pdata *pdata;</div><div class='add'>+	int processed;</div><div class='add'>+</div><div class='add'>+	pdata = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	xge_txc_poll(ndev);</div><div class='add'>+	processed = xge_rx_poll(ndev, budget);</div><div class='add'>+</div><div class='add'>+	if (processed &lt; budget) {</div><div class='add'>+		napi_complete_done(napi, processed);</div><div class='add'>+		xge_intr_enable(pdata);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return processed;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xge_set_mac_addr(struct net_device *ndev, void *addr)</div><div class='add'>+{</div><div class='add'>+	struct xge_pdata *pdata = netdev_priv(ndev);</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = eth_mac_addr(ndev, addr);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	xge_mac_set_station_addr(pdata);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool is_tx_pending(struct xge_raw_desc *raw_desc)</div><div class='add'>+{</div><div class='add'>+	if (!GET_BITS(E, le64_to_cpu(raw_desc-&gt;m0)))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xge_free_pending_skb(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct xge_pdata *pdata = netdev_priv(ndev);</div><div class='add'>+	struct device *dev = &amp;pdata-&gt;pdev-&gt;dev;</div><div class='add'>+	struct xge_desc_ring *tx_ring;</div><div class='add'>+	struct xge_raw_desc *raw_desc;</div><div class='add'>+	dma_addr_t dma_addr;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	void *pkt_buf;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	tx_ring = pdata-&gt;tx_ring;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; XGENE_ENET_NUM_DESC; i++) {</div><div class='add'>+		raw_desc = &amp;tx_ring-&gt;raw_desc[i];</div><div class='add'>+</div><div class='add'>+		if (!is_tx_pending(raw_desc))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		skb = tx_ring-&gt;pkt_info[i].skb;</div><div class='add'>+		dma_addr = tx_ring-&gt;pkt_info[i].dma_addr;</div><div class='add'>+		pkt_buf = tx_ring-&gt;pkt_info[i].pkt_buf;</div><div class='add'>+		dma_free_coherent(dev, XGENE_ENET_STD_MTU, pkt_buf, dma_addr);</div><div class='add'>+		dev_kfree_skb_any(skb);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xge_timeout(struct net_device *ndev, unsigned int txqueue)</div><div class='add'>+{</div><div class='add'>+	struct xge_pdata *pdata = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	rtnl_lock();</div><div class='add'>+</div><div class='add'>+	if (!netif_running(ndev))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	netif_stop_queue(ndev);</div><div class='add'>+	xge_intr_disable(pdata);</div><div class='add'>+	napi_disable(&amp;pdata-&gt;napi);</div><div class='add'>+</div><div class='add'>+	xge_wr_csr(pdata, DMATXCTRL, 0);</div><div class='add'>+	xge_txc_poll(ndev);</div><div class='add'>+	xge_free_pending_skb(ndev);</div><div class='add'>+	xge_wr_csr(pdata, DMATXSTATUS, ~0U);</div><div class='add'>+</div><div class='add'>+	xge_setup_desc(pdata-&gt;tx_ring);</div><div class='add'>+	xge_update_tx_desc_addr(pdata);</div><div class='add'>+	xge_mac_init(pdata);</div><div class='add'>+</div><div class='add'>+	napi_enable(&amp;pdata-&gt;napi);</div><div class='add'>+	xge_intr_enable(pdata);</div><div class='add'>+	xge_mac_enable(pdata);</div><div class='add'>+	netif_start_queue(ndev);</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xge_get_stats64(struct net_device *ndev,</div><div class='add'>+			    struct rtnl_link_stats64 *storage)</div><div class='add'>+{</div><div class='add'>+	struct xge_pdata *pdata = netdev_priv(ndev);</div><div class='add'>+	struct xge_stats *stats = &amp;pdata-&gt;stats;</div><div class='add'>+</div><div class='add'>+	storage-&gt;tx_packets += stats-&gt;tx_packets;</div><div class='add'>+	storage-&gt;tx_bytes += stats-&gt;tx_bytes;</div><div class='add'>+</div><div class='add'>+	storage-&gt;rx_packets += stats-&gt;rx_packets;</div><div class='add'>+	storage-&gt;rx_bytes += stats-&gt;rx_bytes;</div><div class='add'>+	storage-&gt;rx_errors += stats-&gt;rx_errors;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops xgene_ndev_ops = {</div><div class='add'>+	.ndo_open = xge_open,</div><div class='add'>+	.ndo_stop = xge_close,</div><div class='add'>+	.ndo_start_xmit = xge_start_xmit,</div><div class='add'>+	.ndo_set_mac_address = xge_set_mac_addr,</div><div class='add'>+	.ndo_tx_timeout = xge_timeout,</div><div class='add'>+	.ndo_get_stats64 = xge_get_stats64,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int xge_probe(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;pdev-&gt;dev;</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	struct xge_pdata *pdata;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ndev = alloc_etherdev(sizeof(*pdata));</div><div class='add'>+	if (!ndev)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	pdata = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	pdata-&gt;pdev = pdev;</div><div class='add'>+	pdata-&gt;ndev = ndev;</div><div class='add'>+	SET_NETDEV_DEV(ndev, dev);</div><div class='add'>+	platform_set_drvdata(pdev, pdata);</div><div class='add'>+	ndev-&gt;netdev_ops = &amp;xgene_ndev_ops;</div><div class='add'>+</div><div class='add'>+	ndev-&gt;features |= NETIF_F_GSO |</div><div class='add'>+			  NETIF_F_GRO;</div><div class='add'>+</div><div class='add'>+	ret = xge_get_resources(pdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	ndev-&gt;hw_features = ndev-&gt;features;</div><div class='add'>+	xge_set_ethtool_ops(ndev);</div><div class='add'>+</div><div class='add'>+	ret = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(64));</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(ndev, "No usable DMA configuration\n");</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = xge_init_hw(ndev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	ret = xge_mdio_config(ndev);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	netif_napi_add(ndev, &amp;pdata-&gt;napi, xge_napi);</div><div class='add'>+</div><div class='add'>+	ret = register_netdev(ndev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(ndev, "Failed to register netdev\n");</div><div class='add'>+		goto err_mdio_remove;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_mdio_remove:</div><div class='add'>+	xge_mdio_remove(ndev);</div><div class='add'>+err:</div><div class='add'>+	free_netdev(ndev);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xge_remove(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct xge_pdata *pdata;</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+</div><div class='add'>+	pdata = platform_get_drvdata(pdev);</div><div class='add'>+	ndev = pdata-&gt;ndev;</div><div class='add'>+</div><div class='add'>+	rtnl_lock();</div><div class='add'>+	if (netif_running(ndev))</div><div class='add'>+		dev_close(ndev);</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+</div><div class='add'>+	xge_mdio_remove(ndev);</div><div class='add'>+	unregister_netdev(ndev);</div><div class='add'>+	free_netdev(ndev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xge_shutdown(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct xge_pdata *pdata;</div><div class='add'>+</div><div class='add'>+	pdata = platform_get_drvdata(pdev);</div><div class='add'>+	if (!pdata)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!pdata-&gt;ndev)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	xge_remove(pdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct acpi_device_id xge_acpi_match[] = {</div><div class='add'>+	{ "APMC0D80" },</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(acpi, xge_acpi_match);</div><div class='add'>+</div><div class='add'>+static struct platform_driver xge_driver = {</div><div class='add'>+	.driver = {</div><div class='add'>+		   .name = "xgene-enet-v2",</div><div class='add'>+		   .acpi_match_table = xge_acpi_match,</div><div class='add'>+	},</div><div class='add'>+	.probe = xge_probe,</div><div class='add'>+	.remove = xge_remove,</div><div class='add'>+	.shutdown = xge_shutdown,</div><div class='add'>+};</div><div class='add'>+module_platform_driver(xge_driver);</div><div class='add'>+</div><div class='add'>+MODULE_DESCRIPTION("APM X-Gene SoC Ethernet v2 driver");</div><div class='add'>+MODULE_AUTHOR("Iyappan Subramanian &lt;isubramanian@apm.com&gt;");</div><div class='add'>+MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/apm/xgene-v2/main.h b/drivers/net/ethernet/apm/xgene-v2/main.h<br/>new file mode 100644<br/>index 000000000000..7be6f83e22fe<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene-v2/main.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apm/xgene-v2/main.h</a></div><div class='hunk'>@@ -0,0 +1,68 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+/*</div><div class='add'>+ * Applied Micro X-Gene SoC Ethernet v2 Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2017, Applied Micro Circuits Corporation</div><div class='add'>+ * Author(s): Iyappan Subramanian &lt;isubramanian@apm.com&gt;</div><div class='add'>+ *	      Keyur Chudgar &lt;kchudgar@apm.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __XGENE_ENET_V2_MAIN_H__</div><div class='add'>+#define __XGENE_ENET_V2_MAIN_H__</div><div class='add'>+</div><div class='add'>+#include &lt;linux/acpi.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/efi.h&gt;</div><div class='add'>+#include &lt;linux/if_vlan.h&gt;</div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/of_net.h&gt;</div><div class='add'>+#include &lt;linux/of_mdio.h&gt;</div><div class='add'>+#include &lt;linux/prefetch.h&gt;</div><div class='add'>+#include &lt;linux/phy.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;net/ip.h&gt;</div><div class='add'>+#include "mac.h"</div><div class='add'>+#include "enet.h"</div><div class='add'>+#include "ring.h"</div><div class='add'>+#include "ethtool.h"</div><div class='add'>+</div><div class='add'>+#define XGENE_ENET_STD_MTU	1536</div><div class='add'>+#define XGENE_ENET_MIN_FRAME	60</div><div class='add'>+#define IRQ_ID_SIZE             16</div><div class='add'>+</div><div class='add'>+struct xge_resource {</div><div class='add'>+	void __iomem *base_addr;</div><div class='add'>+	int phy_mode;</div><div class='add'>+	u32 irq;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct xge_stats {</div><div class='add'>+	u64 tx_packets;</div><div class='add'>+	u64 tx_bytes;</div><div class='add'>+	u64 rx_packets;</div><div class='add'>+	u64 rx_bytes;</div><div class='add'>+	u64 rx_errors;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* ethernet private data */</div><div class='add'>+struct xge_pdata {</div><div class='add'>+	struct xge_resource resources;</div><div class='add'>+	struct xge_desc_ring *tx_ring;</div><div class='add'>+	struct xge_desc_ring *rx_ring;</div><div class='add'>+	struct platform_device *pdev;</div><div class='add'>+	char irq_name[IRQ_ID_SIZE];</div><div class='add'>+	struct mii_bus *mdio_bus;</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	struct napi_struct napi;</div><div class='add'>+	struct xge_stats stats;</div><div class='add'>+	int phy_speed;</div><div class='add'>+	u8 nbufs;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int xge_mdio_config(struct net_device *ndev);</div><div class='add'>+void xge_mdio_remove(struct net_device *ndev);</div><div class='add'>+</div><div class='add'>+#endif /* __XGENE_ENET_V2_MAIN_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/apm/xgene-v2/mdio.c b/drivers/net/ethernet/apm/xgene-v2/mdio.c<br/>new file mode 100644<br/>index 000000000000..6a17045a5f62<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene-v2/mdio.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apm/xgene-v2/mdio.c</a></div><div class='hunk'>@@ -0,0 +1,152 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Applied Micro X-Gene SoC Ethernet v2 Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2017, Applied Micro Circuits Corporation</div><div class='add'>+ * Author(s): Iyappan Subramanian &lt;isubramanian@apm.com&gt;</div><div class='add'>+ *	      Keyur Chudgar &lt;kchudgar@apm.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "main.h"</div><div class='add'>+</div><div class='add'>+static int xge_mdio_write(struct mii_bus *bus, int phy_id, int reg, u16 data)</div><div class='add'>+{</div><div class='add'>+	struct xge_pdata *pdata = bus-&gt;priv;</div><div class='add'>+	u32 done, val = 0;</div><div class='add'>+	u8 wait = 10;</div><div class='add'>+</div><div class='add'>+	SET_REG_BITS(&amp;val, PHY_ADDR, phy_id);</div><div class='add'>+	SET_REG_BITS(&amp;val, REG_ADDR, reg);</div><div class='add'>+	xge_wr_csr(pdata, MII_MGMT_ADDRESS, val);</div><div class='add'>+</div><div class='add'>+	xge_wr_csr(pdata, MII_MGMT_CONTROL, data);</div><div class='add'>+	do {</div><div class='add'>+		usleep_range(5, 10);</div><div class='add'>+		done = xge_rd_csr(pdata, MII_MGMT_INDICATORS);</div><div class='add'>+	} while ((done &amp; MII_MGMT_BUSY) &amp;&amp; wait--);</div><div class='add'>+</div><div class='add'>+	if (done &amp; MII_MGMT_BUSY) {</div><div class='add'>+		dev_err(&amp;bus-&gt;dev, "MII_MGMT write failed\n");</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xge_mdio_read(struct mii_bus *bus, int phy_id, int reg)</div><div class='add'>+{</div><div class='add'>+	struct xge_pdata *pdata = bus-&gt;priv;</div><div class='add'>+	u32 data, done, val = 0;</div><div class='add'>+	u8 wait = 10;</div><div class='add'>+</div><div class='add'>+	SET_REG_BITS(&amp;val, PHY_ADDR, phy_id);</div><div class='add'>+	SET_REG_BITS(&amp;val, REG_ADDR, reg);</div><div class='add'>+	xge_wr_csr(pdata, MII_MGMT_ADDRESS, val);</div><div class='add'>+</div><div class='add'>+	xge_wr_csr(pdata, MII_MGMT_COMMAND, MII_READ_CYCLE);</div><div class='add'>+	do {</div><div class='add'>+		usleep_range(5, 10);</div><div class='add'>+		done = xge_rd_csr(pdata, MII_MGMT_INDICATORS);</div><div class='add'>+	} while ((done &amp; MII_MGMT_BUSY) &amp;&amp; wait--);</div><div class='add'>+</div><div class='add'>+	if (done &amp; MII_MGMT_BUSY) {</div><div class='add'>+		dev_err(&amp;bus-&gt;dev, "MII_MGMT read failed\n");</div><div class='add'>+		return -ETIMEDOUT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	data = xge_rd_csr(pdata, MII_MGMT_STATUS);</div><div class='add'>+	xge_wr_csr(pdata, MII_MGMT_COMMAND, 0);</div><div class='add'>+</div><div class='add'>+	return data;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xge_adjust_link(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct xge_pdata *pdata = netdev_priv(ndev);</div><div class='add'>+	struct phy_device *phydev = ndev-&gt;phydev;</div><div class='add'>+</div><div class='add'>+	if (phydev-&gt;link) {</div><div class='add'>+		if (pdata-&gt;phy_speed != phydev-&gt;speed) {</div><div class='add'>+			pdata-&gt;phy_speed = phydev-&gt;speed;</div><div class='add'>+			xge_mac_set_speed(pdata);</div><div class='add'>+			xge_mac_enable(pdata);</div><div class='add'>+			phy_print_status(phydev);</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		if (pdata-&gt;phy_speed != SPEED_UNKNOWN) {</div><div class='add'>+			pdata-&gt;phy_speed = SPEED_UNKNOWN;</div><div class='add'>+			xge_mac_disable(pdata);</div><div class='add'>+			phy_print_status(phydev);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void xge_mdio_remove(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct xge_pdata *pdata = netdev_priv(ndev);</div><div class='add'>+	struct mii_bus *mdio_bus = pdata-&gt;mdio_bus;</div><div class='add'>+</div><div class='add'>+	if (ndev-&gt;phydev)</div><div class='add'>+		phy_disconnect(ndev-&gt;phydev);</div><div class='add'>+</div><div class='add'>+	if (mdio_bus-&gt;state == MDIOBUS_REGISTERED)</div><div class='add'>+		mdiobus_unregister(mdio_bus);</div><div class='add'>+</div><div class='add'>+	mdiobus_free(mdio_bus);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int xge_mdio_config(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct xge_pdata *pdata = netdev_priv(ndev);</div><div class='add'>+	struct device *dev = &amp;pdata-&gt;pdev-&gt;dev;</div><div class='add'>+	struct mii_bus *mdio_bus;</div><div class='add'>+	struct phy_device *phydev;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	mdio_bus = mdiobus_alloc();</div><div class='add'>+	if (!mdio_bus)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	mdio_bus-&gt;name = "APM X-Gene Ethernet (v2) MDIO Bus";</div><div class='add'>+	mdio_bus-&gt;read = xge_mdio_read;</div><div class='add'>+	mdio_bus-&gt;write = xge_mdio_write;</div><div class='add'>+	mdio_bus-&gt;priv = pdata;</div><div class='add'>+	mdio_bus-&gt;parent = dev;</div><div class='add'>+	snprintf(mdio_bus-&gt;id, MII_BUS_ID_SIZE, "%s-mii", dev_name(dev));</div><div class='add'>+	pdata-&gt;mdio_bus = mdio_bus;</div><div class='add'>+</div><div class='add'>+	mdio_bus-&gt;phy_mask = 0x1;</div><div class='add'>+	ret = mdiobus_register(mdio_bus);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err;</div><div class='add'>+</div><div class='add'>+	phydev = phy_find_first(mdio_bus);</div><div class='add'>+	if (!phydev) {</div><div class='add'>+		dev_err(dev, "no PHY found\n");</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+	phydev = phy_connect(ndev, phydev_name(phydev),</div><div class='add'>+			     &amp;xge_adjust_link,</div><div class='add'>+			     pdata-&gt;resources.phy_mode);</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(phydev)) {</div><div class='add'>+		netdev_err(ndev, "Could not attach to PHY\n");</div><div class='add'>+		ret = PTR_ERR(phydev);</div><div class='add'>+		goto err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_10baseT_Half_BIT);</div><div class='add'>+	phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_10baseT_Full_BIT);</div><div class='add'>+	phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_100baseT_Half_BIT);</div><div class='add'>+	phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_100baseT_Full_BIT);</div><div class='add'>+	phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_1000baseT_Half_BIT);</div><div class='add'>+</div><div class='add'>+	pdata-&gt;phy_speed = SPEED_UNKNOWN;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+err:</div><div class='add'>+	xge_mdio_remove(ndev);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/apm/xgene-v2/ring.c b/drivers/net/ethernet/apm/xgene-v2/ring.c<br/>new file mode 100644<br/>index 000000000000..fbea4bc438a9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene-v2/ring.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apm/xgene-v2/ring.c</a></div><div class='hunk'>@@ -0,0 +1,69 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/*</div><div class='add'>+ * Applied Micro X-Gene SoC Ethernet v2 Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2017, Applied Micro Circuits Corporation</div><div class='add'>+ * Author(s): Iyappan Subramanian &lt;isubramanian@apm.com&gt;</div><div class='add'>+ *	      Keyur Chudgar &lt;kchudgar@apm.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "main.h"</div><div class='add'>+</div><div class='add'>+/* create circular linked list of descriptors */</div><div class='add'>+void xge_setup_desc(struct xge_desc_ring *ring)</div><div class='add'>+{</div><div class='add'>+	struct xge_raw_desc *raw_desc;</div><div class='add'>+	dma_addr_t dma_h, next_dma;</div><div class='add'>+	u16 offset;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; XGENE_ENET_NUM_DESC; i++) {</div><div class='add'>+		raw_desc = &amp;ring-&gt;raw_desc[i];</div><div class='add'>+</div><div class='add'>+		offset = (i + 1) &amp; (XGENE_ENET_NUM_DESC - 1);</div><div class='add'>+		next_dma = ring-&gt;dma_addr + (offset * XGENE_ENET_DESC_SIZE);</div><div class='add'>+</div><div class='add'>+		raw_desc-&gt;m0 = cpu_to_le64(SET_BITS(E, 1) |</div><div class='add'>+					   SET_BITS(PKT_SIZE, SLOT_EMPTY));</div><div class='add'>+		dma_h = upper_32_bits(next_dma);</div><div class='add'>+		raw_desc-&gt;m1 = cpu_to_le64(SET_BITS(NEXT_DESC_ADDRL, next_dma) |</div><div class='add'>+					   SET_BITS(NEXT_DESC_ADDRH, dma_h));</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void xge_update_tx_desc_addr(struct xge_pdata *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xge_desc_ring *ring = pdata-&gt;tx_ring;</div><div class='add'>+	dma_addr_t dma_addr = ring-&gt;dma_addr;</div><div class='add'>+</div><div class='add'>+	xge_wr_csr(pdata, DMATXDESCL, dma_addr);</div><div class='add'>+	xge_wr_csr(pdata, DMATXDESCH, upper_32_bits(dma_addr));</div><div class='add'>+</div><div class='add'>+	ring-&gt;head = 0;</div><div class='add'>+	ring-&gt;tail = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void xge_update_rx_desc_addr(struct xge_pdata *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xge_desc_ring *ring = pdata-&gt;rx_ring;</div><div class='add'>+	dma_addr_t dma_addr = ring-&gt;dma_addr;</div><div class='add'>+</div><div class='add'>+	xge_wr_csr(pdata, DMARXDESCL, dma_addr);</div><div class='add'>+	xge_wr_csr(pdata, DMARXDESCH, upper_32_bits(dma_addr));</div><div class='add'>+</div><div class='add'>+	ring-&gt;head = 0;</div><div class='add'>+	ring-&gt;tail = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void xge_intr_enable(struct xge_pdata *pdata)</div><div class='add'>+{</div><div class='add'>+	u32 data;</div><div class='add'>+</div><div class='add'>+	data = RX_PKT_RCVD | TX_PKT_SENT;</div><div class='add'>+	xge_wr_csr(pdata, DMAINTRMASK, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void xge_intr_disable(struct xge_pdata *pdata)</div><div class='add'>+{</div><div class='add'>+	xge_wr_csr(pdata, DMAINTRMASK, 0);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/apm/xgene-v2/ring.h b/drivers/net/ethernet/apm/xgene-v2/ring.h<br/>new file mode 100644<br/>index 000000000000..2fd25553d5d3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene-v2/ring.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apm/xgene-v2/ring.h</a></div><div class='hunk'>@@ -0,0 +1,107 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+/*</div><div class='add'>+ * Applied Micro X-Gene SoC Ethernet v2 Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2017, Applied Micro Circuits Corporation</div><div class='add'>+ * Author(s): Iyappan Subramanian &lt;isubramanian@apm.com&gt;</div><div class='add'>+ *	      Keyur Chudgar &lt;kchudgar@apm.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __XGENE_ENET_V2_RING_H__</div><div class='add'>+#define __XGENE_ENET_V2_RING_H__</div><div class='add'>+</div><div class='add'>+#define XGENE_ENET_DESC_SIZE	64</div><div class='add'>+#define XGENE_ENET_NUM_DESC	256</div><div class='add'>+#define NUM_BUFS		8</div><div class='add'>+#define SLOT_EMPTY		0xfff</div><div class='add'>+</div><div class='add'>+#define DMATXCTRL		0xa180</div><div class='add'>+#define DMATXDESCL		0xa184</div><div class='add'>+#define DMATXDESCH		0xa1a0</div><div class='add'>+#define DMATXSTATUS		0xa188</div><div class='add'>+#define DMARXCTRL		0xa18c</div><div class='add'>+#define DMARXDESCL		0xa190</div><div class='add'>+#define DMARXDESCH		0xa1a4</div><div class='add'>+#define DMARXSTATUS		0xa194</div><div class='add'>+#define DMAINTRMASK		0xa198</div><div class='add'>+#define DMAINTERRUPT		0xa19c</div><div class='add'>+</div><div class='add'>+#define D_POS			62</div><div class='add'>+#define D_LEN			2</div><div class='add'>+#define E_POS			63</div><div class='add'>+#define E_LEN			1</div><div class='add'>+#define PKT_ADDRL_POS		0</div><div class='add'>+#define PKT_ADDRL_LEN		32</div><div class='add'>+#define PKT_ADDRH_POS		32</div><div class='add'>+#define PKT_ADDRH_LEN		10</div><div class='add'>+#define PKT_SIZE_POS		32</div><div class='add'>+#define PKT_SIZE_LEN		12</div><div class='add'>+#define NEXT_DESC_ADDRL_POS	0</div><div class='add'>+#define NEXT_DESC_ADDRL_LEN	32</div><div class='add'>+#define NEXT_DESC_ADDRH_POS	48</div><div class='add'>+#define NEXT_DESC_ADDRH_LEN	10</div><div class='add'>+</div><div class='add'>+#define TXPKTCOUNT_POS		16</div><div class='add'>+#define TXPKTCOUNT_LEN		8</div><div class='add'>+#define RXPKTCOUNT_POS		16</div><div class='add'>+#define RXPKTCOUNT_LEN		8</div><div class='add'>+</div><div class='add'>+#define TX_PKT_SENT		BIT(0)</div><div class='add'>+#define TX_BUS_ERROR		BIT(3)</div><div class='add'>+#define RX_PKT_RCVD		BIT(4)</div><div class='add'>+#define RX_BUS_ERROR		BIT(7)</div><div class='add'>+#define RXSTATUS_RXPKTRCVD	BIT(0)</div><div class='add'>+</div><div class='add'>+struct xge_raw_desc {</div><div class='add'>+	__le64 m0;</div><div class='add'>+	__le64 m1;</div><div class='add'>+	__le64 m2;</div><div class='add'>+	__le64 m3;</div><div class='add'>+	__le64 m4;</div><div class='add'>+	__le64 m5;</div><div class='add'>+	__le64 m6;</div><div class='add'>+	__le64 m7;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct pkt_info {</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+	dma_addr_t dma_addr;</div><div class='add'>+	void *pkt_buf;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* software context of a descriptor ring */</div><div class='add'>+struct xge_desc_ring {</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	dma_addr_t dma_addr;</div><div class='add'>+	u8 head;</div><div class='add'>+	u8 tail;</div><div class='add'>+	union {</div><div class='add'>+		void *desc_addr;</div><div class='add'>+		struct xge_raw_desc *raw_desc;</div><div class='add'>+	};</div><div class='add'>+	struct pkt_info (*pkt_info);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline u64 xge_set_desc_bits(int pos, int len, u64 val)</div><div class='add'>+{</div><div class='add'>+	return (val &amp; ((1ULL &lt;&lt; len) - 1)) &lt;&lt; pos;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u64 xge_get_desc_bits(int pos, int len, u64 src)</div><div class='add'>+{</div><div class='add'>+	return (src &gt;&gt; pos) &amp; ((1ULL &lt;&lt; len) - 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define SET_BITS(field, val) \</div><div class='add'>+		xge_set_desc_bits(field ## _POS, field ## _LEN, val)</div><div class='add'>+</div><div class='add'>+#define GET_BITS(field, src) \</div><div class='add'>+		xge_get_desc_bits(field ## _POS, field ## _LEN, src)</div><div class='add'>+</div><div class='add'>+void xge_setup_desc(struct xge_desc_ring *ring);</div><div class='add'>+void xge_update_tx_desc_addr(struct xge_pdata *pdata);</div><div class='add'>+void xge_update_rx_desc_addr(struct xge_pdata *pdata);</div><div class='add'>+void xge_intr_enable(struct xge_pdata *pdata);</div><div class='add'>+void xge_intr_disable(struct xge_pdata *pdata);</div><div class='add'>+</div><div class='add'>+#endif  /* __XGENE_ENET_V2_RING_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/apm/xgene/Kconfig b/drivers/net/ethernet/apm/xgene/Kconfig<br/>index 19e38afbc5ee..7bdfe78427df 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene/Kconfig?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apm/xgene/Kconfig</a></div><div class='hunk'>@@ -1,8 +1,10 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> config NET_XGENE</div><div class='ctx'> 	tristate "APM X-Gene SoC Ethernet Driver"</div><div class='del'>-	depends on HAS_DMA</div><div class='ctx'> 	depends on ARCH_XGENE || COMPILE_TEST</div><div class='ctx'> 	select PHYLIB</div><div class='add'>+	select MDIO_XGENE</div><div class='add'>+	select GPIOLIB</div><div class='ctx'> 	help</div><div class='ctx'> 	  This is the Ethernet driver for the on-chip ethernet interface on the</div><div class='ctx'> 	  APM X-Gene SoC.</div><div class='head'>diff --git a/drivers/net/ethernet/apm/xgene/Makefile b/drivers/net/ethernet/apm/xgene/Makefile<br/>index 700b5abe5de5..6d1314757d3c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene/Makefile?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apm/xgene/Makefile</a></div><div class='hunk'>@@ -1,7 +1,9 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> #</div><div class='ctx'> # Makefile for APM X-Gene Ethernet Driver.</div><div class='ctx'> #</div><div class='ctx'> </div><div class='ctx'> xgene-enet-objs := xgene_enet_hw.o xgene_enet_sgmac.o xgene_enet_xgmac.o \</div><div class='del'>-		   xgene_enet_main.o xgene_enet_ring2.o xgene_enet_ethtool.o</div><div class='add'>+		   xgene_enet_main.o xgene_enet_ring2.o xgene_enet_ethtool.o \</div><div class='add'>+		   xgene_enet_cle.o</div><div class='ctx'> obj-$(CONFIG_NET_XGENE) += xgene-enet.o</div><div class='head'>diff --git a/drivers/net/ethernet/apm/xgene/xgene_enet_cle.c b/drivers/net/ethernet/apm/xgene/xgene_enet_cle.c<br/>new file mode 100644<br/>index 000000000000..de5464322311<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene/xgene_enet_cle.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apm/xgene/xgene_enet_cle.c</a></div><div class='hunk'>@@ -0,0 +1,822 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+/* Applied Micro X-Gene SoC Ethernet Classifier structures</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2016, Applied Micro Circuits Corporation</div><div class='add'>+ * Authors: Khuong Dinh &lt;kdinh@apm.com&gt;</div><div class='add'>+ *          Tanmay Inamdar &lt;tinamdar@apm.com&gt;</div><div class='add'>+ *          Iyappan Subramanian &lt;isubramanian@apm.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "xgene_enet_main.h"</div><div class='add'>+</div><div class='add'>+/* interfaces to convert structures to HW recognized bit formats */</div><div class='add'>+static void xgene_cle_sband_to_hw(u8 frag, enum xgene_cle_prot_version ver,</div><div class='add'>+				  enum xgene_cle_prot_type type, u32 len,</div><div class='add'>+				  u32 *reg)</div><div class='add'>+{</div><div class='add'>+	*reg =  SET_VAL(SB_IPFRAG, frag) |</div><div class='add'>+		SET_VAL(SB_IPPROT, type) |</div><div class='add'>+		SET_VAL(SB_IPVER, ver) |</div><div class='add'>+		SET_VAL(SB_HDRLEN, len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgene_cle_idt_to_hw(struct xgene_enet_pdata *pdata,</div><div class='add'>+				u32 dstqid, u32 fpsel,</div><div class='add'>+				u32 nfpsel, u32 *idt_reg)</div><div class='add'>+{</div><div class='add'>+	if (pdata-&gt;enet_id == XGENE_ENET1) {</div><div class='add'>+		*idt_reg = SET_VAL(IDT_DSTQID, dstqid) |</div><div class='add'>+			   SET_VAL(IDT_FPSEL1, fpsel)  |</div><div class='add'>+			   SET_VAL(IDT_NFPSEL1, nfpsel);</div><div class='add'>+	} else {</div><div class='add'>+		*idt_reg = SET_VAL(IDT_DSTQID, dstqid) |</div><div class='add'>+			   SET_VAL(IDT_FPSEL, fpsel)   |</div><div class='add'>+			   SET_VAL(IDT_NFPSEL, nfpsel);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgene_cle_dbptr_to_hw(struct xgene_enet_pdata *pdata,</div><div class='add'>+				  struct xgene_cle_dbptr *dbptr, u32 *buf)</div><div class='add'>+{</div><div class='add'>+	buf[0] = SET_VAL(CLE_DROP, dbptr-&gt;drop);</div><div class='add'>+	buf[4] = SET_VAL(CLE_FPSEL, dbptr-&gt;fpsel) |</div><div class='add'>+		 SET_VAL(CLE_NFPSEL, dbptr-&gt;nxtfpsel) |</div><div class='add'>+		 SET_VAL(CLE_DSTQIDL, dbptr-&gt;dstqid);</div><div class='add'>+</div><div class='add'>+	buf[5] = SET_VAL(CLE_DSTQIDH, (u32)dbptr-&gt;dstqid &gt;&gt; CLE_DSTQIDL_LEN) |</div><div class='add'>+		 SET_VAL(CLE_PRIORITY, dbptr-&gt;cle_priority);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgene_cle_kn_to_hw(struct xgene_cle_ptree_kn *kn, u32 *buf)</div><div class='add'>+{</div><div class='add'>+	u32 i, j = 0;</div><div class='add'>+	u32 data;</div><div class='add'>+</div><div class='add'>+	buf[j++] = SET_VAL(CLE_TYPE, kn-&gt;node_type);</div><div class='add'>+	for (i = 0; i &lt; kn-&gt;num_keys; i++) {</div><div class='add'>+		struct xgene_cle_ptree_key *key = &amp;kn-&gt;key[i];</div><div class='add'>+</div><div class='add'>+		if (!(i % 2)) {</div><div class='add'>+			buf[j] = SET_VAL(CLE_KN_PRIO, key-&gt;priority) |</div><div class='add'>+				 SET_VAL(CLE_KN_RPTR, key-&gt;result_pointer);</div><div class='add'>+		} else {</div><div class='add'>+			data = SET_VAL(CLE_KN_PRIO, key-&gt;priority) |</div><div class='add'>+			       SET_VAL(CLE_KN_RPTR, key-&gt;result_pointer);</div><div class='add'>+			buf[j++] |= (data &lt;&lt; 16);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgene_cle_dn_to_hw(const struct xgene_cle_ptree_ewdn *dn,</div><div class='add'>+			       u32 *buf, u32 jb)</div><div class='add'>+{</div><div class='add'>+	const struct xgene_cle_ptree_branch *br;</div><div class='add'>+	u32 i, j = 0;</div><div class='add'>+	u32 npp;</div><div class='add'>+</div><div class='add'>+	buf[j++] = SET_VAL(CLE_DN_TYPE, dn-&gt;node_type) |</div><div class='add'>+		   SET_VAL(CLE_DN_LASTN, dn-&gt;last_node) |</div><div class='add'>+		   SET_VAL(CLE_DN_HLS, dn-&gt;hdr_len_store) |</div><div class='add'>+		   SET_VAL(CLE_DN_EXT, dn-&gt;hdr_extn) |</div><div class='add'>+		   SET_VAL(CLE_DN_BSTOR, dn-&gt;byte_store) |</div><div class='add'>+		   SET_VAL(CLE_DN_SBSTOR, dn-&gt;search_byte_store) |</div><div class='add'>+		   SET_VAL(CLE_DN_RPTR, dn-&gt;result_pointer);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; dn-&gt;num_branches; i++) {</div><div class='add'>+		br = &amp;dn-&gt;branch[i];</div><div class='add'>+		npp = br-&gt;next_packet_pointer;</div><div class='add'>+</div><div class='add'>+		if ((br-&gt;jump_rel == JMP_ABS) &amp;&amp; (npp &lt; CLE_PKTRAM_SIZE))</div><div class='add'>+			npp += jb;</div><div class='add'>+</div><div class='add'>+		buf[j++] = SET_VAL(CLE_BR_VALID, br-&gt;valid) |</div><div class='add'>+			   SET_VAL(CLE_BR_NPPTR, npp) |</div><div class='add'>+			   SET_VAL(CLE_BR_JB, br-&gt;jump_bw) |</div><div class='add'>+			   SET_VAL(CLE_BR_JR, br-&gt;jump_rel) |</div><div class='add'>+			   SET_VAL(CLE_BR_OP, br-&gt;operation) |</div><div class='add'>+			   SET_VAL(CLE_BR_NNODE, br-&gt;next_node) |</div><div class='add'>+			   SET_VAL(CLE_BR_NBR, br-&gt;next_branch);</div><div class='add'>+</div><div class='add'>+		buf[j++] = SET_VAL(CLE_BR_DATA, br-&gt;data) |</div><div class='add'>+			   SET_VAL(CLE_BR_MASK, br-&gt;mask);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgene_cle_poll_cmd_done(void __iomem *base,</div><div class='add'>+				   enum xgene_cle_cmd_type cmd)</div><div class='add'>+{</div><div class='add'>+	u32 status, loop = 10;</div><div class='add'>+	int ret = -EBUSY;</div><div class='add'>+</div><div class='add'>+	while (loop--) {</div><div class='add'>+		status = ioread32(base + INDCMD_STATUS);</div><div class='add'>+		if (status &amp; cmd) {</div><div class='add'>+			ret = 0;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+		usleep_range(1000, 2000);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgene_cle_dram_wr(struct xgene_enet_cle *cle, u32 *data, u8 nregs,</div><div class='add'>+			     u32 index, enum xgene_cle_dram_type type,</div><div class='add'>+			     enum xgene_cle_cmd_type cmd)</div><div class='add'>+{</div><div class='add'>+	enum xgene_cle_parser parser = cle-&gt;active_parser;</div><div class='add'>+	void __iomem *base = cle-&gt;base;</div><div class='add'>+	u32 i, j, ind_addr;</div><div class='add'>+	u8 port, nparsers;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	/* PTREE_RAM onwards, DRAM regions are common for all parsers */</div><div class='add'>+	nparsers = (type &gt;= PTREE_RAM) ? 1 : cle-&gt;parsers;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; nparsers; i++) {</div><div class='add'>+		port = i;</div><div class='add'>+		if ((type &lt; PTREE_RAM) &amp;&amp; (parser != PARSER_ALL))</div><div class='add'>+			port = parser;</div><div class='add'>+</div><div class='add'>+		ind_addr = XGENE_CLE_DRAM(type + (port * 4)) | index;</div><div class='add'>+		iowrite32(ind_addr, base + INDADDR);</div><div class='add'>+		for (j = 0; j &lt; nregs; j++)</div><div class='add'>+			iowrite32(data[j], base + DATA_RAM0 + (j * 4));</div><div class='add'>+		iowrite32(cmd, base + INDCMD);</div><div class='add'>+</div><div class='add'>+		ret = xgene_cle_poll_cmd_done(base, cmd);</div><div class='add'>+		if (ret)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgene_cle_enable_ptree(struct xgene_enet_pdata *pdata,</div><div class='add'>+				   struct xgene_enet_cle *cle)</div><div class='add'>+{</div><div class='add'>+	struct xgene_cle_ptree *ptree = &amp;cle-&gt;ptree;</div><div class='add'>+	void __iomem *addr, *base = cle-&gt;base;</div><div class='add'>+	u32 offset = CLE_PORT_OFFSET;</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	/* 1G port has to advance 4 bytes and 10G has to advance 8 bytes */</div><div class='add'>+	ptree-&gt;start_pkt += cle-&gt;jump_bytes;</div><div class='add'>+	for (i = 0; i &lt; cle-&gt;parsers; i++) {</div><div class='add'>+		if (cle-&gt;active_parser != PARSER_ALL)</div><div class='add'>+			addr = base + cle-&gt;active_parser * offset;</div><div class='add'>+		else</div><div class='add'>+			addr = base + (i * offset);</div><div class='add'>+</div><div class='add'>+		iowrite32(ptree-&gt;start_node &amp; 0x3fff, addr + SNPTR0);</div><div class='add'>+		iowrite32(ptree-&gt;start_pkt &amp; 0x1ff, addr + SPPTR0);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgene_cle_setup_dbptr(struct xgene_enet_pdata *pdata,</div><div class='add'>+				 struct xgene_enet_cle *cle)</div><div class='add'>+{</div><div class='add'>+	struct xgene_cle_ptree *ptree = &amp;cle-&gt;ptree;</div><div class='add'>+	u32 buf[CLE_DRAM_REGS];</div><div class='add'>+	u32 i;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	memset(buf, 0, sizeof(buf));</div><div class='add'>+	for (i = 0; i &lt; ptree-&gt;num_dbptr; i++) {</div><div class='add'>+		xgene_cle_dbptr_to_hw(pdata, &amp;ptree-&gt;dbptr[i], buf);</div><div class='add'>+		ret = xgene_cle_dram_wr(cle, buf, 6, i + ptree-&gt;start_dbptr,</div><div class='add'>+					DB_RAM,	CLE_CMD_WR);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct xgene_cle_ptree_ewdn xgene_init_ptree_dn[] = {</div><div class='add'>+	{</div><div class='add'>+		/* PKT_TYPE_NODE */</div><div class='add'>+		.node_type = EWDN,</div><div class='add'>+		.last_node = 0,</div><div class='add'>+		.hdr_len_store = 1,</div><div class='add'>+		.hdr_extn = NO_BYTE,</div><div class='add'>+		.byte_store = NO_BYTE,</div><div class='add'>+		.search_byte_store = NO_BYTE,</div><div class='add'>+		.result_pointer = DB_RES_DROP,</div><div class='add'>+		.num_branches = 2,</div><div class='add'>+		.branch = {</div><div class='add'>+			{</div><div class='add'>+				/* IPV4 */</div><div class='add'>+				.valid = 1,</div><div class='add'>+				.next_packet_pointer = 22,</div><div class='add'>+				.jump_bw = JMP_FW,</div><div class='add'>+				.jump_rel = JMP_ABS,</div><div class='add'>+				.operation = EQT,</div><div class='add'>+				.next_node = PKT_PROT_NODE,</div><div class='add'>+				.next_branch = 0,</div><div class='add'>+				.data = 0x8,</div><div class='add'>+				.mask = 0x0</div><div class='add'>+			},</div><div class='add'>+			{</div><div class='add'>+				.valid = 0,</div><div class='add'>+				.next_packet_pointer = 262,</div><div class='add'>+				.jump_bw = JMP_FW,</div><div class='add'>+				.jump_rel = JMP_ABS,</div><div class='add'>+				.operation = EQT,</div><div class='add'>+				.next_node = LAST_NODE,</div><div class='add'>+				.next_branch = 0,</div><div class='add'>+				.data = 0x0,</div><div class='add'>+				.mask = 0xffff</div><div class='add'>+			}</div><div class='add'>+		},</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		/* PKT_PROT_NODE */</div><div class='add'>+		.node_type = EWDN,</div><div class='add'>+		.last_node = 0,</div><div class='add'>+		.hdr_len_store = 1,</div><div class='add'>+		.hdr_extn = NO_BYTE,</div><div class='add'>+		.byte_store = NO_BYTE,</div><div class='add'>+		.search_byte_store = NO_BYTE,</div><div class='add'>+		.result_pointer = DB_RES_DROP,</div><div class='add'>+		.num_branches = 3,</div><div class='add'>+		.branch = {</div><div class='add'>+			{</div><div class='add'>+				/* TCP */</div><div class='add'>+				.valid = 1,</div><div class='add'>+				.next_packet_pointer = 26,</div><div class='add'>+				.jump_bw = JMP_FW,</div><div class='add'>+				.jump_rel = JMP_ABS,</div><div class='add'>+				.operation = EQT,</div><div class='add'>+				.next_node = RSS_IPV4_TCP_NODE,</div><div class='add'>+				.next_branch = 0,</div><div class='add'>+				.data = 0x0600,</div><div class='add'>+				.mask = 0x00ff</div><div class='add'>+			},</div><div class='add'>+			{</div><div class='add'>+				/* UDP */</div><div class='add'>+				.valid = 1,</div><div class='add'>+				.next_packet_pointer = 26,</div><div class='add'>+				.jump_bw = JMP_FW,</div><div class='add'>+				.jump_rel = JMP_ABS,</div><div class='add'>+				.operation = EQT,</div><div class='add'>+				.next_node = RSS_IPV4_UDP_NODE,</div><div class='add'>+				.next_branch = 0,</div><div class='add'>+				.data = 0x1100,</div><div class='add'>+				.mask = 0x00ff</div><div class='add'>+			},</div><div class='add'>+			{</div><div class='add'>+				.valid = 0,</div><div class='add'>+				.next_packet_pointer = 26,</div><div class='add'>+				.jump_bw = JMP_FW,</div><div class='add'>+				.jump_rel = JMP_ABS,</div><div class='add'>+				.operation = EQT,</div><div class='add'>+				.next_node = RSS_IPV4_OTHERS_NODE,</div><div class='add'>+				.next_branch = 0,</div><div class='add'>+				.data = 0x0,</div><div class='add'>+				.mask = 0xffff</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		/* RSS_IPV4_TCP_NODE */</div><div class='add'>+		.node_type = EWDN,</div><div class='add'>+		.last_node = 0,</div><div class='add'>+		.hdr_len_store = 1,</div><div class='add'>+		.hdr_extn = NO_BYTE,</div><div class='add'>+		.byte_store = NO_BYTE,</div><div class='add'>+		.search_byte_store = BOTH_BYTES,</div><div class='add'>+		.result_pointer = DB_RES_DROP,</div><div class='add'>+		.num_branches = 6,</div><div class='add'>+		.branch = {</div><div class='add'>+			{</div><div class='add'>+				/* SRC IPV4 B01 */</div><div class='add'>+				.valid = 0,</div><div class='add'>+				.next_packet_pointer = 28,</div><div class='add'>+				.jump_bw = JMP_FW,</div><div class='add'>+				.jump_rel = JMP_ABS,</div><div class='add'>+				.operation = EQT,</div><div class='add'>+				.next_node = RSS_IPV4_TCP_NODE,</div><div class='add'>+				.next_branch = 1,</div><div class='add'>+				.data = 0x0,</div><div class='add'>+				.mask = 0xffff</div><div class='add'>+			},</div><div class='add'>+			{</div><div class='add'>+				/* SRC IPV4 B23 */</div><div class='add'>+				.valid = 0,</div><div class='add'>+				.next_packet_pointer = 30,</div><div class='add'>+				.jump_bw = JMP_FW,</div><div class='add'>+				.jump_rel = JMP_ABS,</div><div class='add'>+				.operation = EQT,</div><div class='add'>+				.next_node = RSS_IPV4_TCP_NODE,</div><div class='add'>+				.next_branch = 2,</div><div class='add'>+				.data = 0x0,</div><div class='add'>+				.mask = 0xffff</div><div class='add'>+			},</div><div class='add'>+			{</div><div class='add'>+				/* DST IPV4 B01 */</div><div class='add'>+				.valid = 0,</div><div class='add'>+				.next_packet_pointer = 32,</div><div class='add'>+				.jump_bw = JMP_FW,</div><div class='add'>+				.jump_rel = JMP_ABS,</div><div class='add'>+				.operation = EQT,</div><div class='add'>+				.next_node = RSS_IPV4_TCP_NODE,</div><div class='add'>+				.next_branch = 3,</div><div class='add'>+				.data = 0x0,</div><div class='add'>+				.mask = 0xffff</div><div class='add'>+			},</div><div class='add'>+			{</div><div class='add'>+				/* DST IPV4 B23 */</div><div class='add'>+				.valid = 0,</div><div class='add'>+				.next_packet_pointer = 34,</div><div class='add'>+				.jump_bw = JMP_FW,</div><div class='add'>+				.jump_rel = JMP_ABS,</div><div class='add'>+				.operation = EQT,</div><div class='add'>+				.next_node = RSS_IPV4_TCP_NODE,</div><div class='add'>+				.next_branch = 4,</div><div class='add'>+				.data = 0x0,</div><div class='add'>+				.mask = 0xffff</div><div class='add'>+			},</div><div class='add'>+			{</div><div class='add'>+				/* TCP SRC Port */</div><div class='add'>+				.valid = 0,</div><div class='add'>+				.next_packet_pointer = 36,</div><div class='add'>+				.jump_bw = JMP_FW,</div><div class='add'>+				.jump_rel = JMP_ABS,</div><div class='add'>+				.operation = EQT,</div><div class='add'>+				.next_node = RSS_IPV4_TCP_NODE,</div><div class='add'>+				.next_branch = 5,</div><div class='add'>+				.data = 0x0,</div><div class='add'>+				.mask = 0xffff</div><div class='add'>+			},</div><div class='add'>+			{</div><div class='add'>+				/* TCP DST Port */</div><div class='add'>+				.valid = 0,</div><div class='add'>+				.next_packet_pointer = 256,</div><div class='add'>+				.jump_bw = JMP_FW,</div><div class='add'>+				.jump_rel = JMP_ABS,</div><div class='add'>+				.operation = EQT,</div><div class='add'>+				.next_node = LAST_NODE,</div><div class='add'>+				.next_branch = 0,</div><div class='add'>+				.data = 0x0,</div><div class='add'>+				.mask = 0xffff</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		/* RSS_IPV4_UDP_NODE */</div><div class='add'>+		.node_type = EWDN,</div><div class='add'>+		.last_node = 0,</div><div class='add'>+		.hdr_len_store = 1,</div><div class='add'>+		.hdr_extn = NO_BYTE,</div><div class='add'>+		.byte_store = NO_BYTE,</div><div class='add'>+		.search_byte_store = BOTH_BYTES,</div><div class='add'>+		.result_pointer = DB_RES_DROP,</div><div class='add'>+		.num_branches = 6,</div><div class='add'>+		.branch = {</div><div class='add'>+			{</div><div class='add'>+				/* SRC IPV4 B01 */</div><div class='add'>+				.valid = 0,</div><div class='add'>+				.next_packet_pointer = 28,</div><div class='add'>+				.jump_bw = JMP_FW,</div><div class='add'>+				.jump_rel = JMP_ABS,</div><div class='add'>+				.operation = EQT,</div><div class='add'>+				.next_node = RSS_IPV4_UDP_NODE,</div><div class='add'>+				.next_branch = 1,</div><div class='add'>+				.data = 0x0,</div><div class='add'>+				.mask = 0xffff</div><div class='add'>+			},</div><div class='add'>+			{</div><div class='add'>+				/* SRC IPV4 B23 */</div><div class='add'>+				.valid = 0,</div><div class='add'>+				.next_packet_pointer = 30,</div><div class='add'>+				.jump_bw = JMP_FW,</div><div class='add'>+				.jump_rel = JMP_ABS,</div><div class='add'>+				.operation = EQT,</div><div class='add'>+				.next_node = RSS_IPV4_UDP_NODE,</div><div class='add'>+				.next_branch = 2,</div><div class='add'>+				.data = 0x0,</div><div class='add'>+				.mask = 0xffff</div><div class='add'>+			},</div><div class='add'>+			{</div><div class='add'>+				/* DST IPV4 B01 */</div><div class='add'>+				.valid = 0,</div><div class='add'>+				.next_packet_pointer = 32,</div><div class='add'>+				.jump_bw = JMP_FW,</div><div class='add'>+				.jump_rel = JMP_ABS,</div><div class='add'>+				.operation = EQT,</div><div class='add'>+				.next_node = RSS_IPV4_UDP_NODE,</div><div class='add'>+				.next_branch = 3,</div><div class='add'>+				.data = 0x0,</div><div class='add'>+				.mask = 0xffff</div><div class='add'>+			},</div><div class='add'>+			{</div><div class='add'>+				/* DST IPV4 B23 */</div><div class='add'>+				.valid = 0,</div><div class='add'>+				.next_packet_pointer = 34,</div><div class='add'>+				.jump_bw = JMP_FW,</div><div class='add'>+				.jump_rel = JMP_ABS,</div><div class='add'>+				.operation = EQT,</div><div class='add'>+				.next_node = RSS_IPV4_UDP_NODE,</div><div class='add'>+				.next_branch = 4,</div><div class='add'>+				.data = 0x0,</div><div class='add'>+				.mask = 0xffff</div><div class='add'>+			},</div><div class='add'>+			{</div><div class='add'>+				/* TCP SRC Port */</div><div class='add'>+				.valid = 0,</div><div class='add'>+				.next_packet_pointer = 36,</div><div class='add'>+				.jump_bw = JMP_FW,</div><div class='add'>+				.jump_rel = JMP_ABS,</div><div class='add'>+				.operation = EQT,</div><div class='add'>+				.next_node = RSS_IPV4_UDP_NODE,</div><div class='add'>+				.next_branch = 5,</div><div class='add'>+				.data = 0x0,</div><div class='add'>+				.mask = 0xffff</div><div class='add'>+			},</div><div class='add'>+			{</div><div class='add'>+				/* TCP DST Port */</div><div class='add'>+				.valid = 0,</div><div class='add'>+				.next_packet_pointer = 258,</div><div class='add'>+				.jump_bw = JMP_FW,</div><div class='add'>+				.jump_rel = JMP_ABS,</div><div class='add'>+				.operation = EQT,</div><div class='add'>+				.next_node = LAST_NODE,</div><div class='add'>+				.next_branch = 0,</div><div class='add'>+				.data = 0x0,</div><div class='add'>+				.mask = 0xffff</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	},</div><div class='add'>+	{</div><div class='add'>+		/* RSS_IPV4_OTHERS_NODE */</div><div class='add'>+		.node_type = EWDN,</div><div class='add'>+		.last_node = 0,</div><div class='add'>+		.hdr_len_store = 1,</div><div class='add'>+		.hdr_extn = NO_BYTE,</div><div class='add'>+		.byte_store = NO_BYTE,</div><div class='add'>+		.search_byte_store = BOTH_BYTES,</div><div class='add'>+		.result_pointer = DB_RES_DROP,</div><div class='add'>+		.num_branches = 6,</div><div class='add'>+		.branch = {</div><div class='add'>+			{</div><div class='add'>+				/* SRC IPV4 B01 */</div><div class='add'>+				.valid = 0,</div><div class='add'>+				.next_packet_pointer = 28,</div><div class='add'>+				.jump_bw = JMP_FW,</div><div class='add'>+				.jump_rel = JMP_ABS,</div><div class='add'>+				.operation = EQT,</div><div class='add'>+				.next_node = RSS_IPV4_OTHERS_NODE,</div><div class='add'>+				.next_branch = 1,</div><div class='add'>+				.data = 0x0,</div><div class='add'>+				.mask = 0xffff</div><div class='add'>+			},</div><div class='add'>+			{</div><div class='add'>+				/* SRC IPV4 B23 */</div><div class='add'>+				.valid = 0,</div><div class='add'>+				.next_packet_pointer = 30,</div><div class='add'>+				.jump_bw = JMP_FW,</div><div class='add'>+				.jump_rel = JMP_ABS,</div><div class='add'>+				.operation = EQT,</div><div class='add'>+				.next_node = RSS_IPV4_OTHERS_NODE,</div><div class='add'>+				.next_branch = 2,</div><div class='add'>+				.data = 0x0,</div><div class='add'>+				.mask = 0xffff</div><div class='add'>+			},</div><div class='add'>+			{</div><div class='add'>+				/* DST IPV4 B01 */</div><div class='add'>+				.valid = 0,</div><div class='add'>+				.next_packet_pointer = 32,</div><div class='add'>+				.jump_bw = JMP_FW,</div><div class='add'>+				.jump_rel = JMP_ABS,</div><div class='add'>+				.operation = EQT,</div><div class='add'>+				.next_node = RSS_IPV4_OTHERS_NODE,</div><div class='add'>+				.next_branch = 3,</div><div class='add'>+				.data = 0x0,</div><div class='add'>+				.mask = 0xffff</div><div class='add'>+			},</div><div class='add'>+			{</div><div class='add'>+				/* DST IPV4 B23 */</div><div class='add'>+				.valid = 0,</div><div class='add'>+				.next_packet_pointer = 34,</div><div class='add'>+				.jump_bw = JMP_FW,</div><div class='add'>+				.jump_rel = JMP_ABS,</div><div class='add'>+				.operation = EQT,</div><div class='add'>+				.next_node = RSS_IPV4_OTHERS_NODE,</div><div class='add'>+				.next_branch = 4,</div><div class='add'>+				.data = 0x0,</div><div class='add'>+				.mask = 0xffff</div><div class='add'>+			},</div><div class='add'>+			{</div><div class='add'>+				/* TCP SRC Port */</div><div class='add'>+				.valid = 0,</div><div class='add'>+				.next_packet_pointer = 36,</div><div class='add'>+				.jump_bw = JMP_FW,</div><div class='add'>+				.jump_rel = JMP_ABS,</div><div class='add'>+				.operation = EQT,</div><div class='add'>+				.next_node = RSS_IPV4_OTHERS_NODE,</div><div class='add'>+				.next_branch = 5,</div><div class='add'>+				.data = 0x0,</div><div class='add'>+				.mask = 0xffff</div><div class='add'>+			},</div><div class='add'>+			{</div><div class='add'>+				/* TCP DST Port */</div><div class='add'>+				.valid = 0,</div><div class='add'>+				.next_packet_pointer = 260,</div><div class='add'>+				.jump_bw = JMP_FW,</div><div class='add'>+				.jump_rel = JMP_ABS,</div><div class='add'>+				.operation = EQT,</div><div class='add'>+				.next_node = LAST_NODE,</div><div class='add'>+				.next_branch = 0,</div><div class='add'>+				.data = 0x0,</div><div class='add'>+				.mask = 0xffff</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	},</div><div class='add'>+</div><div class='add'>+	{</div><div class='add'>+		/* LAST NODE */</div><div class='add'>+		.node_type = EWDN,</div><div class='add'>+		.last_node = 1,</div><div class='add'>+		.hdr_len_store = 1,</div><div class='add'>+		.hdr_extn = NO_BYTE,</div><div class='add'>+		.byte_store = NO_BYTE,</div><div class='add'>+		.search_byte_store = NO_BYTE,</div><div class='add'>+		.result_pointer = DB_RES_DROP,</div><div class='add'>+		.num_branches = 1,</div><div class='add'>+		.branch = {</div><div class='add'>+			{</div><div class='add'>+				.valid = 0,</div><div class='add'>+				.next_packet_pointer = 0,</div><div class='add'>+				.jump_bw = JMP_FW,</div><div class='add'>+				.jump_rel = JMP_ABS,</div><div class='add'>+				.operation = EQT,</div><div class='add'>+				.next_node = MAX_NODES,</div><div class='add'>+				.next_branch = 0,</div><div class='add'>+				.data = 0,</div><div class='add'>+				.mask = 0xffff</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int xgene_cle_setup_node(struct xgene_enet_pdata *pdata,</div><div class='add'>+				struct xgene_enet_cle *cle)</div><div class='add'>+{</div><div class='add'>+	struct xgene_cle_ptree *ptree = &amp;cle-&gt;ptree;</div><div class='add'>+	const struct xgene_cle_ptree_ewdn *dn = xgene_init_ptree_dn;</div><div class='add'>+	int num_dn = ARRAY_SIZE(xgene_init_ptree_dn);</div><div class='add'>+	struct xgene_cle_ptree_kn *kn = ptree-&gt;kn;</div><div class='add'>+	u32 buf[CLE_DRAM_REGS];</div><div class='add'>+	int i, j, ret;</div><div class='add'>+</div><div class='add'>+	memset(buf, 0, sizeof(buf));</div><div class='add'>+	for (i = 0; i &lt; num_dn; i++) {</div><div class='add'>+		xgene_cle_dn_to_hw(&amp;dn[i], buf, cle-&gt;jump_bytes);</div><div class='add'>+		ret = xgene_cle_dram_wr(cle, buf, 17, i + ptree-&gt;start_node,</div><div class='add'>+					PTREE_RAM, CLE_CMD_WR);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* continue node index for key node */</div><div class='add'>+	memset(buf, 0, sizeof(buf));</div><div class='add'>+	for (j = i; j &lt; (ptree-&gt;num_kn + num_dn); j++) {</div><div class='add'>+		xgene_cle_kn_to_hw(&amp;kn[j - num_dn], buf);</div><div class='add'>+		ret = xgene_cle_dram_wr(cle, buf, 17, j + ptree-&gt;start_node,</div><div class='add'>+					PTREE_RAM, CLE_CMD_WR);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgene_cle_setup_ptree(struct xgene_enet_pdata *pdata,</div><div class='add'>+				 struct xgene_enet_cle *cle)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = xgene_cle_setup_node(pdata, cle);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = xgene_cle_setup_dbptr(pdata, cle);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	xgene_cle_enable_ptree(pdata, cle);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgene_cle_setup_def_dbptr(struct xgene_enet_pdata *pdata,</div><div class='add'>+				      struct xgene_enet_cle *enet_cle,</div><div class='add'>+				      struct xgene_cle_dbptr *dbptr,</div><div class='add'>+				      u32 index, u8 priority)</div><div class='add'>+{</div><div class='add'>+	void __iomem *base = enet_cle-&gt;base;</div><div class='add'>+	void __iomem *base_addr;</div><div class='add'>+	u32 buf[CLE_DRAM_REGS];</div><div class='add'>+	u32 def_cls, offset;</div><div class='add'>+	u32 i, j;</div><div class='add'>+</div><div class='add'>+	memset(buf, 0, sizeof(buf));</div><div class='add'>+	xgene_cle_dbptr_to_hw(pdata, dbptr, buf);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; enet_cle-&gt;parsers; i++) {</div><div class='add'>+		if (enet_cle-&gt;active_parser != PARSER_ALL) {</div><div class='add'>+			offset = enet_cle-&gt;active_parser *</div><div class='add'>+				CLE_PORT_OFFSET;</div><div class='add'>+		} else {</div><div class='add'>+			offset = i * CLE_PORT_OFFSET;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		base_addr = base + DFCLSRESDB00 + offset;</div><div class='add'>+		for (j = 0; j &lt; 6; j++)</div><div class='add'>+			iowrite32(buf[j], base_addr + (j * 4));</div><div class='add'>+</div><div class='add'>+		def_cls = ((priority &amp; 0x7) &lt;&lt; 10) | (index &amp; 0x3ff);</div><div class='add'>+		iowrite32(def_cls, base + DFCLSRESDBPTR0 + offset);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgene_cle_set_rss_sband(struct xgene_enet_cle *cle)</div><div class='add'>+{</div><div class='add'>+	u32 idx = CLE_PKTRAM_SIZE / sizeof(u32);</div><div class='add'>+	u32 mac_hdr_len = ETH_HLEN;</div><div class='add'>+	u32 sband, reg = 0;</div><div class='add'>+	u32 ipv4_ihl = 5;</div><div class='add'>+	u32 hdr_len;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* Sideband: IPV4/TCP packets */</div><div class='add'>+	hdr_len = (mac_hdr_len &lt;&lt; 5) | ipv4_ihl;</div><div class='add'>+	xgene_cle_sband_to_hw(0, XGENE_CLE_IPV4, XGENE_CLE_TCP, hdr_len, &amp;reg);</div><div class='add'>+	sband = reg;</div><div class='add'>+</div><div class='add'>+	/* Sideband: IPv4/UDP packets */</div><div class='add'>+	hdr_len = (mac_hdr_len &lt;&lt; 5) | ipv4_ihl;</div><div class='add'>+	xgene_cle_sband_to_hw(1, XGENE_CLE_IPV4, XGENE_CLE_UDP, hdr_len, &amp;reg);</div><div class='add'>+	sband |= (reg &lt;&lt; 16);</div><div class='add'>+</div><div class='add'>+	ret = xgene_cle_dram_wr(cle, &amp;sband, 1, idx, PKT_RAM, CLE_CMD_WR);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* Sideband: IPv4/RAW packets */</div><div class='add'>+	hdr_len = (mac_hdr_len &lt;&lt; 5) | ipv4_ihl;</div><div class='add'>+	xgene_cle_sband_to_hw(0, XGENE_CLE_IPV4, XGENE_CLE_OTHER,</div><div class='add'>+			      hdr_len, &amp;reg);</div><div class='add'>+	sband = reg;</div><div class='add'>+</div><div class='add'>+	/* Sideband: Ethernet II/RAW packets */</div><div class='add'>+	hdr_len = (mac_hdr_len &lt;&lt; 5);</div><div class='add'>+	xgene_cle_sband_to_hw(0, XGENE_CLE_IPV4, XGENE_CLE_OTHER,</div><div class='add'>+			      hdr_len, &amp;reg);</div><div class='add'>+	sband |= (reg &lt;&lt; 16);</div><div class='add'>+</div><div class='add'>+	ret = xgene_cle_dram_wr(cle, &amp;sband, 1, idx + 1, PKT_RAM, CLE_CMD_WR);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgene_cle_set_rss_skeys(struct xgene_enet_cle *cle)</div><div class='add'>+{</div><div class='add'>+	u32 secret_key_ipv4[4];  /* 16 Bytes*/</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	get_random_bytes(secret_key_ipv4, 16);</div><div class='add'>+	ret = xgene_cle_dram_wr(cle, secret_key_ipv4, 4, 0,</div><div class='add'>+				RSS_IPV4_HASH_SKEY, CLE_CMD_WR);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgene_cle_set_rss_idt(struct xgene_enet_pdata *pdata)</div><div class='add'>+{</div><div class='add'>+	u32 fpsel, dstqid, nfpsel, idt_reg, idx;</div><div class='add'>+	int i, ret = 0;</div><div class='add'>+	u16 pool_id;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; XGENE_CLE_IDT_ENTRIES; i++) {</div><div class='add'>+		idx = i % pdata-&gt;rxq_cnt;</div><div class='add'>+		pool_id = pdata-&gt;rx_ring[idx]-&gt;buf_pool-&gt;id;</div><div class='add'>+		fpsel = xgene_enet_get_fpsel(pool_id);</div><div class='add'>+		dstqid = xgene_enet_dst_ring_num(pdata-&gt;rx_ring[idx]);</div><div class='add'>+		nfpsel = 0;</div><div class='add'>+		if (pdata-&gt;rx_ring[idx]-&gt;page_pool) {</div><div class='add'>+			pool_id = pdata-&gt;rx_ring[idx]-&gt;page_pool-&gt;id;</div><div class='add'>+			nfpsel = xgene_enet_get_fpsel(pool_id);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		idt_reg = 0;</div><div class='add'>+		xgene_cle_idt_to_hw(pdata, dstqid, fpsel, nfpsel, &amp;idt_reg);</div><div class='add'>+		ret = xgene_cle_dram_wr(&amp;pdata-&gt;cle, &amp;idt_reg, 1, i,</div><div class='add'>+					RSS_IDT, CLE_CMD_WR);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = xgene_cle_set_rss_skeys(&amp;pdata-&gt;cle);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgene_cle_setup_rss(struct xgene_enet_pdata *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgene_enet_cle *cle = &amp;pdata-&gt;cle;</div><div class='add'>+	void __iomem *base = cle-&gt;base;</div><div class='add'>+	u32 offset, val = 0;</div><div class='add'>+	int i, ret = 0;</div><div class='add'>+</div><div class='add'>+	offset = CLE_PORT_OFFSET;</div><div class='add'>+	for (i = 0; i &lt; cle-&gt;parsers; i++) {</div><div class='add'>+		if (cle-&gt;active_parser != PARSER_ALL)</div><div class='add'>+			offset = cle-&gt;active_parser * CLE_PORT_OFFSET;</div><div class='add'>+		else</div><div class='add'>+			offset = i * CLE_PORT_OFFSET;</div><div class='add'>+</div><div class='add'>+		/* enable RSS */</div><div class='add'>+		val = (RSS_IPV4_12B &lt;&lt; 1) | 0x1;</div><div class='add'>+		writel(val, base + RSS_CTRL0 + offset);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* setup sideband data */</div><div class='add'>+	ret = xgene_cle_set_rss_sband(cle);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* setup indirection table */</div><div class='add'>+	ret = xgene_cle_set_rss_idt(pdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgene_enet_cle_init(struct xgene_enet_pdata *pdata)</div><div class='add'>+{</div><div class='add'>+	struct xgene_enet_cle *enet_cle = &amp;pdata-&gt;cle;</div><div class='add'>+	u32 def_qid, def_fpsel, def_nxtfpsel, pool_id;</div><div class='add'>+	struct xgene_cle_dbptr dbptr[DB_MAX_PTRS];</div><div class='add'>+	struct xgene_cle_ptree *ptree;</div><div class='add'>+	struct xgene_cle_ptree_kn kn;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;phy_mode != PHY_INTERFACE_MODE_XGMII)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ptree = &amp;enet_cle-&gt;ptree;</div><div class='add'>+	ptree-&gt;start_pkt = 12; /* Ethertype */</div><div class='add'>+</div><div class='add'>+	ret = xgene_cle_setup_rss(pdata);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(pdata-&gt;ndev, "RSS initialization failed\n");</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	def_qid = xgene_enet_dst_ring_num(pdata-&gt;rx_ring[0]);</div><div class='add'>+	pool_id = pdata-&gt;rx_ring[0]-&gt;buf_pool-&gt;id;</div><div class='add'>+	def_fpsel = xgene_enet_get_fpsel(pool_id);</div><div class='add'>+	def_nxtfpsel = 0;</div><div class='add'>+	if (pdata-&gt;rx_ring[0]-&gt;page_pool) {</div><div class='add'>+		pool_id = pdata-&gt;rx_ring[0]-&gt;page_pool-&gt;id;</div><div class='add'>+		def_nxtfpsel = xgene_enet_get_fpsel(pool_id);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memset(dbptr, 0, sizeof(struct xgene_cle_dbptr) * DB_MAX_PTRS);</div><div class='add'>+	dbptr[DB_RES_ACCEPT].fpsel =  def_fpsel;</div><div class='add'>+	dbptr[DB_RES_ACCEPT].nxtfpsel = def_nxtfpsel;</div><div class='add'>+	dbptr[DB_RES_ACCEPT].dstqid = def_qid;</div><div class='add'>+	dbptr[DB_RES_ACCEPT].cle_priority = 1;</div><div class='add'>+</div><div class='add'>+	dbptr[DB_RES_DEF].fpsel = def_fpsel;</div><div class='add'>+	dbptr[DB_RES_DEF].nxtfpsel = def_nxtfpsel;</div><div class='add'>+	dbptr[DB_RES_DEF].dstqid = def_qid;</div><div class='add'>+	dbptr[DB_RES_DEF].cle_priority = 7;</div><div class='add'>+	xgene_cle_setup_def_dbptr(pdata, enet_cle, &amp;dbptr[DB_RES_DEF],</div><div class='add'>+				  DB_RES_ACCEPT, 7);</div><div class='add'>+</div><div class='add'>+	dbptr[DB_RES_DROP].drop = 1;</div><div class='add'>+</div><div class='add'>+	memset(&amp;kn, 0, sizeof(kn));</div><div class='add'>+	kn.node_type = KN;</div><div class='add'>+	kn.num_keys = 1;</div><div class='add'>+	kn.key[0].priority = 0;</div><div class='add'>+	kn.key[0].result_pointer = DB_RES_ACCEPT;</div><div class='add'>+</div><div class='add'>+	ptree-&gt;kn = &amp;kn;</div><div class='add'>+	ptree-&gt;dbptr = dbptr;</div><div class='add'>+	ptree-&gt;num_kn = 1;</div><div class='add'>+	ptree-&gt;num_dbptr = DB_MAX_PTRS;</div><div class='add'>+</div><div class='add'>+	return xgene_cle_setup_ptree(pdata, enet_cle);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct xgene_cle_ops xgene_cle3in_ops = {</div><div class='add'>+	.cle_init = xgene_enet_cle_init,</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/net/ethernet/apm/xgene/xgene_enet_cle.h b/drivers/net/ethernet/apm/xgene/xgene_enet_cle.h<br/>new file mode 100644<br/>index 000000000000..bc05cbcf4403<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene/xgene_enet_cle.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apm/xgene/xgene_enet_cle.h</a></div><div class='hunk'>@@ -0,0 +1,290 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='add'>+/* Applied Micro X-Gene SoC Ethernet Classifier structures</div><div class='add'>+ *</div><div class='add'>+ * Copyright (c) 2016, Applied Micro Circuits Corporation</div><div class='add'>+ * Authors: Khuong Dinh &lt;kdinh@apm.com&gt;</div><div class='add'>+ *          Tanmay Inamdar &lt;tinamdar@apm.com&gt;</div><div class='add'>+ *          Iyappan Subramanian &lt;isubramanian@apm.com&gt;</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef __XGENE_ENET_CLE_H__</div><div class='add'>+#define __XGENE_ENET_CLE_H__</div><div class='add'>+</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/random.h&gt;</div><div class='add'>+</div><div class='add'>+/* Register offsets */</div><div class='add'>+#define INDADDR			0x04</div><div class='add'>+#define INDCMD			0x08</div><div class='add'>+#define INDCMD_STATUS		0x0c</div><div class='add'>+#define DATA_RAM0		0x10</div><div class='add'>+#define SNPTR0			0x0100</div><div class='add'>+#define SPPTR0			0x0104</div><div class='add'>+#define DFCLSRESDBPTR0		0x0108</div><div class='add'>+#define DFCLSRESDB00		0x010c</div><div class='add'>+#define RSS_CTRL0		0x0000013c</div><div class='add'>+</div><div class='add'>+#define CLE_CMD_TO		10	/* ms */</div><div class='add'>+#define CLE_PKTRAM_SIZE		256	/* bytes */</div><div class='add'>+#define CLE_PORT_OFFSET		0x200</div><div class='add'>+#define CLE_DRAM_REGS		17</div><div class='add'>+</div><div class='add'>+#define CLE_DN_TYPE_LEN		2</div><div class='add'>+#define CLE_DN_TYPE_POS		0</div><div class='add'>+#define CLE_DN_LASTN_LEN	1</div><div class='add'>+#define CLE_DN_LASTN_POS	2</div><div class='add'>+#define CLE_DN_HLS_LEN		1</div><div class='add'>+#define CLE_DN_HLS_POS		3</div><div class='add'>+#define CLE_DN_EXT_LEN		2</div><div class='add'>+#define	CLE_DN_EXT_POS		4</div><div class='add'>+#define CLE_DN_BSTOR_LEN	2</div><div class='add'>+#define CLE_DN_BSTOR_POS	6</div><div class='add'>+#define CLE_DN_SBSTOR_LEN	2</div><div class='add'>+#define CLE_DN_SBSTOR_POS	8</div><div class='add'>+#define CLE_DN_RPTR_LEN		12</div><div class='add'>+#define CLE_DN_RPTR_POS		12</div><div class='add'>+</div><div class='add'>+#define CLE_BR_VALID_LEN	1</div><div class='add'>+#define CLE_BR_VALID_POS	0</div><div class='add'>+#define CLE_BR_NPPTR_LEN	9</div><div class='add'>+#define CLE_BR_NPPTR_POS	1</div><div class='add'>+#define CLE_BR_JB_LEN		1</div><div class='add'>+#define CLE_BR_JB_POS		10</div><div class='add'>+#define CLE_BR_JR_LEN		1</div><div class='add'>+#define CLE_BR_JR_POS		11</div><div class='add'>+#define CLE_BR_OP_LEN		3</div><div class='add'>+#define CLE_BR_OP_POS		12</div><div class='add'>+#define CLE_BR_NNODE_LEN	9</div><div class='add'>+#define CLE_BR_NNODE_POS	15</div><div class='add'>+#define CLE_BR_NBR_LEN		5</div><div class='add'>+#define CLE_BR_NBR_POS		24</div><div class='add'>+</div><div class='add'>+#define CLE_BR_DATA_LEN		16</div><div class='add'>+#define CLE_BR_DATA_POS		0</div><div class='add'>+#define CLE_BR_MASK_LEN		16</div><div class='add'>+#define CLE_BR_MASK_POS		16</div><div class='add'>+</div><div class='add'>+#define CLE_KN_PRIO_POS		0</div><div class='add'>+#define CLE_KN_PRIO_LEN		3</div><div class='add'>+#define CLE_KN_RPTR_POS		3</div><div class='add'>+#define CLE_KN_RPTR_LEN		10</div><div class='add'>+#define CLE_TYPE_POS		0</div><div class='add'>+#define CLE_TYPE_LEN		2</div><div class='add'>+</div><div class='add'>+#define CLE_DROP_POS		28</div><div class='add'>+#define CLE_DROP_LEN		1</div><div class='add'>+#define CLE_DSTQIDL_POS		25</div><div class='add'>+#define CLE_DSTQIDL_LEN		7</div><div class='add'>+#define CLE_DSTQIDH_POS		0</div><div class='add'>+#define CLE_DSTQIDH_LEN		5</div><div class='add'>+#define CLE_FPSEL_POS		21</div><div class='add'>+#define CLE_FPSEL_LEN		4</div><div class='add'>+#define CLE_NFPSEL_POS		17</div><div class='add'>+#define CLE_NFPSEL_LEN		4</div><div class='add'>+#define CLE_PRIORITY_POS	5</div><div class='add'>+#define CLE_PRIORITY_LEN	3</div><div class='add'>+</div><div class='add'>+#define JMP_ABS			0</div><div class='add'>+#define JMP_REL			1</div><div class='add'>+#define JMP_FW			0</div><div class='add'>+#define JMP_BW			1</div><div class='add'>+</div><div class='add'>+enum xgene_cle_ptree_nodes {</div><div class='add'>+	PKT_TYPE_NODE,</div><div class='add'>+	PKT_PROT_NODE,</div><div class='add'>+	RSS_IPV4_TCP_NODE,</div><div class='add'>+	RSS_IPV4_UDP_NODE,</div><div class='add'>+	RSS_IPV4_OTHERS_NODE,</div><div class='add'>+	LAST_NODE,</div><div class='add'>+	MAX_NODES</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum xgene_cle_byte_store {</div><div class='add'>+	NO_BYTE,</div><div class='add'>+	FIRST_BYTE,</div><div class='add'>+	SECOND_BYTE,</div><div class='add'>+	BOTH_BYTES</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Preclassification operation types */</div><div class='add'>+enum xgene_cle_node_type {</div><div class='add'>+	INV,</div><div class='add'>+	KN,</div><div class='add'>+	EWDN,</div><div class='add'>+	RES_NODE</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Preclassification operation types */</div><div class='add'>+enum xgene_cle_op_type {</div><div class='add'>+	EQT,</div><div class='add'>+	NEQT,</div><div class='add'>+	LTEQT,</div><div class='add'>+	GTEQT,</div><div class='add'>+	AND,</div><div class='add'>+	NAND</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum xgene_cle_parser {</div><div class='add'>+	PARSER0,</div><div class='add'>+	PARSER1,</div><div class='add'>+	PARSER2,</div><div class='add'>+	PARSER_ALL</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define XGENE_CLE_DRAM(type)	(((type) &amp; 0xf) &lt;&lt; 28)</div><div class='add'>+enum xgene_cle_dram_type {</div><div class='add'>+	PKT_RAM,</div><div class='add'>+	RSS_IDT,</div><div class='add'>+	RSS_IPV4_HASH_SKEY,</div><div class='add'>+	PTREE_RAM = 0xc,</div><div class='add'>+	AVL_RAM,</div><div class='add'>+	DB_RAM</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum xgene_cle_cmd_type {</div><div class='add'>+	CLE_CMD_WR = 1,</div><div class='add'>+	CLE_CMD_RD = 2,</div><div class='add'>+	CLE_CMD_AVL_ADD = 8,</div><div class='add'>+	CLE_CMD_AVL_DEL = 16,</div><div class='add'>+	CLE_CMD_AVL_SRCH = 32</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum xgene_cle_ipv4_rss_hashtype {</div><div class='add'>+	RSS_IPV4_8B,</div><div class='add'>+	RSS_IPV4_12B,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum xgene_cle_prot_type {</div><div class='add'>+	XGENE_CLE_TCP,</div><div class='add'>+	XGENE_CLE_UDP,</div><div class='add'>+	XGENE_CLE_ESP,</div><div class='add'>+	XGENE_CLE_OTHER</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum xgene_cle_prot_version {</div><div class='add'>+	XGENE_CLE_IPV4,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum xgene_cle_ptree_dbptrs {</div><div class='add'>+	DB_RES_DROP,</div><div class='add'>+	DB_RES_DEF,</div><div class='add'>+	DB_RES_ACCEPT,</div><div class='add'>+	DB_MAX_PTRS</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* RSS sideband signal info */</div><div class='add'>+#define SB_IPFRAG_POS	0</div><div class='add'>+#define SB_IPFRAG_LEN	1</div><div class='add'>+#define SB_IPPROT_POS	1</div><div class='add'>+#define SB_IPPROT_LEN	2</div><div class='add'>+#define SB_IPVER_POS	3</div><div class='add'>+#define SB_IPVER_LEN	1</div><div class='add'>+#define SB_HDRLEN_POS	4</div><div class='add'>+#define SB_HDRLEN_LEN	12</div><div class='add'>+</div><div class='add'>+/* RSS indirection table */</div><div class='add'>+#define XGENE_CLE_IDT_ENTRIES	128</div><div class='add'>+#define IDT_DSTQID_POS		0</div><div class='add'>+#define IDT_DSTQID_LEN		12</div><div class='add'>+#define IDT_FPSEL_POS		12</div><div class='add'>+#define IDT_FPSEL_LEN		5</div><div class='add'>+#define IDT_NFPSEL_POS		17</div><div class='add'>+#define IDT_NFPSEL_LEN		5</div><div class='add'>+#define IDT_FPSEL1_POS		12</div><div class='add'>+#define IDT_FPSEL1_LEN		4</div><div class='add'>+#define IDT_NFPSEL1_POS		16</div><div class='add'>+#define IDT_NFPSEL1_LEN		4</div><div class='add'>+</div><div class='add'>+struct xgene_cle_ptree_branch {</div><div class='add'>+	bool valid;</div><div class='add'>+	u16 next_packet_pointer;</div><div class='add'>+	bool jump_bw;</div><div class='add'>+	bool jump_rel;</div><div class='add'>+	u8 operation;</div><div class='add'>+	u16 next_node;</div><div class='add'>+	u8 next_branch;</div><div class='add'>+	u16 data;</div><div class='add'>+	u16 mask;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct xgene_cle_ptree_ewdn {</div><div class='add'>+	u8 node_type;</div><div class='add'>+	bool last_node;</div><div class='add'>+	bool hdr_len_store;</div><div class='add'>+	u8 hdr_extn;</div><div class='add'>+	u8 byte_store;</div><div class='add'>+	u8 search_byte_store;</div><div class='add'>+	u16 result_pointer;</div><div class='add'>+	u8 num_branches;</div><div class='add'>+	struct xgene_cle_ptree_branch branch[6];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct xgene_cle_ptree_key {</div><div class='add'>+	u8 priority;</div><div class='add'>+	u16 result_pointer;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct xgene_cle_ptree_kn {</div><div class='add'>+	u8 node_type;</div><div class='add'>+	u8 num_keys;</div><div class='add'>+	struct xgene_cle_ptree_key key[32];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct xgene_cle_dbptr {</div><div class='add'>+	u8 split_boundary;</div><div class='add'>+	u8 mirror_nxtfpsel;</div><div class='add'>+	u8 mirror_fpsel;</div><div class='add'>+	u16 mirror_dstqid;</div><div class='add'>+	u8 drop;</div><div class='add'>+	u8 mirror;</div><div class='add'>+	u8 hdr_data_split;</div><div class='add'>+	u64 hopinfomsbs;</div><div class='add'>+	u8 DR;</div><div class='add'>+	u8 HR;</div><div class='add'>+	u64 hopinfomlsbs;</div><div class='add'>+	u16 h0enq_num;</div><div class='add'>+	u8 h0fpsel;</div><div class='add'>+	u8 nxtfpsel;</div><div class='add'>+	u8 fpsel;</div><div class='add'>+	u16 dstqid;</div><div class='add'>+	u8 cle_priority;</div><div class='add'>+	u8 cle_flowgroup;</div><div class='add'>+	u8 cle_perflow;</div><div class='add'>+	u8 cle_insert_timestamp;</div><div class='add'>+	u8 stash;</div><div class='add'>+	u8 in;</div><div class='add'>+	u8 perprioen;</div><div class='add'>+	u8 perflowgroupen;</div><div class='add'>+	u8 perflowen;</div><div class='add'>+	u8 selhash;</div><div class='add'>+	u8 selhdrext;</div><div class='add'>+	u8 mirror_nxtfpsel_msb;</div><div class='add'>+	u8 mirror_fpsel_msb;</div><div class='add'>+	u8 hfpsel_msb;</div><div class='add'>+	u8 nxtfpsel_msb;</div><div class='add'>+	u8 fpsel_msb;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct xgene_cle_ptree {</div><div class='add'>+	struct xgene_cle_ptree_kn *kn;</div><div class='add'>+	struct xgene_cle_dbptr *dbptr;</div><div class='add'>+	u32 num_kn;</div><div class='add'>+	u32 num_dbptr;</div><div class='add'>+	u32 start_node;</div><div class='add'>+	u32 start_pkt;</div><div class='add'>+	u32 start_dbptr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct xgene_enet_cle {</div><div class='add'>+	void __iomem *base;</div><div class='add'>+	struct xgene_cle_ptree ptree;</div><div class='add'>+	enum xgene_cle_parser active_parser;</div><div class='add'>+	u32 parsers;</div><div class='add'>+	u32 max_nodes;</div><div class='add'>+	u32 max_dbptrs;</div><div class='add'>+	u32 jump_bytes;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+extern const struct xgene_cle_ops xgene_cle3in_ops;</div><div class='add'>+</div><div class='add'>+#endif /* __XGENE_ENET_CLE_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/apm/xgene/xgene_enet_ethtool.c b/drivers/net/ethernet/apm/xgene/xgene_enet_ethtool.c<br/>index 416d6ebfc2ce..ada70425b48c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene/xgene_enet_ethtool.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene/xgene_enet_ethtool.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene/xgene_enet_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apm/xgene/xgene_enet_ethtool.c</a></div><div class='hunk'>@@ -1,20 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='ctx'> /* Applied Micro X-Gene SoC Ethernet Driver</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (c) 2014, Applied Micro Circuits Corporation</div><div class='ctx'>  * Authors: Iyappan Subramanian &lt;isubramanian@apm.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute  it and/or modify it</div><div class='del'>- * under  the terms of  the GNU General  Public License as published by the</div><div class='del'>- * Free Software Foundation;  either version 2 of the  License, or (at your</div><div class='del'>- * option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include &lt;linux/ethtool.h&gt;</div><div class='hunk'>@@ -23,9 +11,17 @@</div><div class='ctx'> struct xgene_gstrings_stats {</div><div class='ctx'> 	char name[ETH_GSTRING_LEN];</div><div class='ctx'> 	int offset;</div><div class='add'>+	u32 addr;</div><div class='add'>+	u32 mask;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-#define XGENE_STAT(m) { #m, offsetof(struct xgene_enet_pdata, stats.m) }</div><div class='add'>+#define XGENE_STAT(m) { #m, offsetof(struct rtnl_link_stats64, m) }</div><div class='add'>+#define XGENE_EXTD_STAT(s, a, m)		\</div><div class='add'>+		{			\</div><div class='add'>+		.name = #s,		\</div><div class='add'>+		.addr = a ## _ADDR,	\</div><div class='add'>+		.mask = m		\</div><div class='add'>+		}</div><div class='ctx'> </div><div class='ctx'> static const struct xgene_gstrings_stats gstrings_stats[] = {</div><div class='ctx'> 	XGENE_STAT(rx_packets),</div><div class='hunk'>@@ -40,7 +36,65 @@ static const struct xgene_gstrings_stats gstrings_stats[] = {</div><div class='ctx'> 	XGENE_STAT(rx_fifo_errors)</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+static const struct xgene_gstrings_stats gstrings_extd_stats[] = {</div><div class='add'>+	XGENE_EXTD_STAT(tx_rx_64b_frame_cntr, TR64, 31),</div><div class='add'>+	XGENE_EXTD_STAT(tx_rx_127b_frame_cntr, TR127, 31),</div><div class='add'>+	XGENE_EXTD_STAT(tx_rx_255b_frame_cntr, TR255, 31),</div><div class='add'>+	XGENE_EXTD_STAT(tx_rx_511b_frame_cntr, TR511, 31),</div><div class='add'>+	XGENE_EXTD_STAT(tx_rx_1023b_frame_cntr, TR1K, 31),</div><div class='add'>+	XGENE_EXTD_STAT(tx_rx_1518b_frame_cntr, TRMAX, 31),</div><div class='add'>+	XGENE_EXTD_STAT(tx_rx_1522b_frame_cntr, TRMGV, 31),</div><div class='add'>+	XGENE_EXTD_STAT(rx_fcs_error_cntr, RFCS, 16),</div><div class='add'>+	XGENE_EXTD_STAT(rx_multicast_pkt_cntr, RMCA, 31),</div><div class='add'>+	XGENE_EXTD_STAT(rx_broadcast_pkt_cntr, RBCA, 31),</div><div class='add'>+	XGENE_EXTD_STAT(rx_ctrl_frame_pkt_cntr, RXCF, 16),</div><div class='add'>+	XGENE_EXTD_STAT(rx_pause_frame_pkt_cntr, RXPF, 16),</div><div class='add'>+	XGENE_EXTD_STAT(rx_unk_opcode_cntr, RXUO, 16),</div><div class='add'>+	XGENE_EXTD_STAT(rx_align_err_cntr, RALN, 16),</div><div class='add'>+	XGENE_EXTD_STAT(rx_frame_len_err_cntr, RFLR, 16),</div><div class='add'>+	XGENE_EXTD_STAT(rx_frame_len_err_recov_cntr, DUMP, 0),</div><div class='add'>+	XGENE_EXTD_STAT(rx_code_err_cntr, RCDE, 16),</div><div class='add'>+	XGENE_EXTD_STAT(rx_carrier_sense_err_cntr, RCSE, 16),</div><div class='add'>+	XGENE_EXTD_STAT(rx_undersize_pkt_cntr, RUND, 16),</div><div class='add'>+	XGENE_EXTD_STAT(rx_oversize_pkt_cntr, ROVR, 16),</div><div class='add'>+	XGENE_EXTD_STAT(rx_fragments_cntr, RFRG, 16),</div><div class='add'>+	XGENE_EXTD_STAT(rx_jabber_cntr, RJBR, 16),</div><div class='add'>+	XGENE_EXTD_STAT(rx_jabber_recov_cntr, DUMP, 0),</div><div class='add'>+	XGENE_EXTD_STAT(rx_dropped_pkt_cntr, RDRP, 16),</div><div class='add'>+	XGENE_EXTD_STAT(rx_overrun_cntr, DUMP, 0),</div><div class='add'>+	XGENE_EXTD_STAT(tx_multicast_pkt_cntr, TMCA, 31),</div><div class='add'>+	XGENE_EXTD_STAT(tx_broadcast_pkt_cntr, TBCA, 31),</div><div class='add'>+	XGENE_EXTD_STAT(tx_pause_ctrl_frame_cntr, TXPF, 16),</div><div class='add'>+	XGENE_EXTD_STAT(tx_defer_pkt_cntr, TDFR, 31),</div><div class='add'>+	XGENE_EXTD_STAT(tx_excv_defer_pkt_cntr, TEDF, 31),</div><div class='add'>+	XGENE_EXTD_STAT(tx_single_col_pkt_cntr, TSCL, 31),</div><div class='add'>+	XGENE_EXTD_STAT(tx_multi_col_pkt_cntr, TMCL, 31),</div><div class='add'>+	XGENE_EXTD_STAT(tx_late_col_pkt_cntr, TLCL, 31),</div><div class='add'>+	XGENE_EXTD_STAT(tx_excv_col_pkt_cntr, TXCL, 31),</div><div class='add'>+	XGENE_EXTD_STAT(tx_total_col_cntr, TNCL, 31),</div><div class='add'>+	XGENE_EXTD_STAT(tx_pause_frames_hnrd_cntr, TPFH, 16),</div><div class='add'>+	XGENE_EXTD_STAT(tx_drop_frame_cntr, TDRP, 16),</div><div class='add'>+	XGENE_EXTD_STAT(tx_jabber_frame_cntr, TJBR, 12),</div><div class='add'>+	XGENE_EXTD_STAT(tx_fcs_error_cntr, TFCS, 12),</div><div class='add'>+	XGENE_EXTD_STAT(tx_ctrl_frame_cntr, TXCF, 12),</div><div class='add'>+	XGENE_EXTD_STAT(tx_oversize_frame_cntr, TOVR, 12),</div><div class='add'>+	XGENE_EXTD_STAT(tx_undersize_frame_cntr, TUND, 12),</div><div class='add'>+	XGENE_EXTD_STAT(tx_fragments_cntr, TFRG, 12),</div><div class='add'>+	XGENE_EXTD_STAT(tx_underrun_cntr, DUMP, 0)</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> #define XGENE_STATS_LEN		ARRAY_SIZE(gstrings_stats)</div><div class='add'>+#define XGENE_EXTD_STATS_LEN	ARRAY_SIZE(gstrings_extd_stats)</div><div class='add'>+#define RFCS_IDX		7</div><div class='add'>+#define RALN_IDX		13</div><div class='add'>+#define RFLR_IDX		14</div><div class='add'>+#define FALSE_RFLR_IDX		15</div><div class='add'>+#define RUND_IDX		18</div><div class='add'>+#define FALSE_RJBR_IDX		22</div><div class='add'>+#define RX_OVERRUN_IDX		24</div><div class='add'>+#define TFCS_IDX		38</div><div class='add'>+#define TFRG_IDX		42</div><div class='add'>+#define TX_UNDERRUN_IDX		43</div><div class='ctx'> </div><div class='ctx'> static void xgene_get_drvinfo(struct net_device *ndev,</div><div class='ctx'> 			      struct ethtool_drvinfo *info)</div><div class='hunk'>@@ -49,53 +103,84 @@ static void xgene_get_drvinfo(struct net_device *ndev,</div><div class='ctx'> 	struct platform_device *pdev = pdata-&gt;pdev;</div><div class='ctx'> </div><div class='ctx'> 	strcpy(info-&gt;driver, "xgene_enet");</div><div class='del'>-	strcpy(info-&gt;version, XGENE_DRV_VERSION);</div><div class='del'>-	snprintf(info-&gt;fw_version, ETHTOOL_FWVERS_LEN, "N/A");</div><div class='ctx'> 	sprintf(info-&gt;bus_info, "%s", pdev-&gt;name);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgene_get_settings(struct net_device *ndev, struct ethtool_cmd *cmd)</div><div class='add'>+static int xgene_get_link_ksettings(struct net_device *ndev,</div><div class='add'>+				    struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgene_enet_pdata *pdata = netdev_priv(ndev);</div><div class='del'>-	struct phy_device *phydev = pdata-&gt;phy_dev;</div><div class='add'>+	struct phy_device *phydev = ndev-&gt;phydev;</div><div class='add'>+	u32 supported;</div><div class='ctx'> </div><div class='del'>-	if (pdata-&gt;phy_mode == PHY_INTERFACE_MODE_RGMII) {</div><div class='add'>+	if (phy_interface_mode_is_rgmii(pdata-&gt;phy_mode)) {</div><div class='ctx'> 		if (phydev == NULL)</div><div class='ctx'> 			return -ENODEV;</div><div class='ctx'> </div><div class='del'>-		return phy_ethtool_gset(phydev, cmd);</div><div class='add'>+		phy_ethtool_ksettings_get(phydev, cmd);</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='ctx'> 	} else if (pdata-&gt;phy_mode == PHY_INTERFACE_MODE_SGMII) {</div><div class='del'>-		cmd-&gt;supported = SUPPORTED_1000baseT_Full |</div><div class='del'>-				 SUPPORTED_Autoneg | SUPPORTED_MII;</div><div class='del'>-		cmd-&gt;advertising = cmd-&gt;supported;</div><div class='del'>-		ethtool_cmd_speed_set(cmd, SPEED_1000);</div><div class='del'>-		cmd-&gt;duplex = DUPLEX_FULL;</div><div class='del'>-		cmd-&gt;port = PORT_MII;</div><div class='del'>-		cmd-&gt;transceiver = XCVR_INTERNAL;</div><div class='del'>-		cmd-&gt;autoneg = AUTONEG_ENABLE;</div><div class='add'>+		if (pdata-&gt;mdio_driver) {</div><div class='add'>+			if (!phydev)</div><div class='add'>+				return -ENODEV;</div><div class='add'>+</div><div class='add'>+			phy_ethtool_ksettings_get(phydev, cmd);</div><div class='add'>+</div><div class='add'>+			return 0;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		supported = SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg |</div><div class='add'>+			SUPPORTED_MII;</div><div class='add'>+		ethtool_convert_legacy_u32_to_link_mode(</div><div class='add'>+			cmd-&gt;link_modes.supported,</div><div class='add'>+			supported);</div><div class='add'>+		ethtool_convert_legacy_u32_to_link_mode(</div><div class='add'>+			cmd-&gt;link_modes.advertising,</div><div class='add'>+			supported);</div><div class='add'>+</div><div class='add'>+		cmd-&gt;base.speed = SPEED_1000;</div><div class='add'>+		cmd-&gt;base.duplex = DUPLEX_FULL;</div><div class='add'>+		cmd-&gt;base.port = PORT_MII;</div><div class='add'>+		cmd-&gt;base.autoneg = AUTONEG_ENABLE;</div><div class='ctx'> 	} else {</div><div class='del'>-		cmd-&gt;supported = SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE;</div><div class='del'>-		cmd-&gt;advertising = cmd-&gt;supported;</div><div class='del'>-		ethtool_cmd_speed_set(cmd, SPEED_10000);</div><div class='del'>-		cmd-&gt;duplex = DUPLEX_FULL;</div><div class='del'>-		cmd-&gt;port = PORT_FIBRE;</div><div class='del'>-		cmd-&gt;transceiver = XCVR_INTERNAL;</div><div class='del'>-		cmd-&gt;autoneg = AUTONEG_DISABLE;</div><div class='add'>+		supported = SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE;</div><div class='add'>+		ethtool_convert_legacy_u32_to_link_mode(</div><div class='add'>+			cmd-&gt;link_modes.supported,</div><div class='add'>+			supported);</div><div class='add'>+		ethtool_convert_legacy_u32_to_link_mode(</div><div class='add'>+			cmd-&gt;link_modes.advertising,</div><div class='add'>+			supported);</div><div class='add'>+</div><div class='add'>+		cmd-&gt;base.speed = SPEED_10000;</div><div class='add'>+		cmd-&gt;base.duplex = DUPLEX_FULL;</div><div class='add'>+		cmd-&gt;base.port = PORT_FIBRE;</div><div class='add'>+		cmd-&gt;base.autoneg = AUTONEG_DISABLE;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgene_set_settings(struct net_device *ndev, struct ethtool_cmd *cmd)</div><div class='add'>+static int xgene_set_link_ksettings(struct net_device *ndev,</div><div class='add'>+				    const struct ethtool_link_ksettings *cmd)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgene_enet_pdata *pdata = netdev_priv(ndev);</div><div class='del'>-	struct phy_device *phydev = pdata-&gt;phy_dev;</div><div class='add'>+	struct phy_device *phydev = ndev-&gt;phydev;</div><div class='ctx'> </div><div class='del'>-	if (pdata-&gt;phy_mode == PHY_INTERFACE_MODE_RGMII) {</div><div class='del'>-		if (phydev == NULL)</div><div class='add'>+	if (phy_interface_mode_is_rgmii(pdata-&gt;phy_mode)) {</div><div class='add'>+		if (!phydev)</div><div class='ctx'> 			return -ENODEV;</div><div class='ctx'> </div><div class='del'>-		return phy_ethtool_sset(phydev, cmd);</div><div class='add'>+		return phy_ethtool_ksettings_set(phydev, cmd);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;phy_mode == PHY_INTERFACE_MODE_SGMII) {</div><div class='add'>+		if (pdata-&gt;mdio_driver) {</div><div class='add'>+			if (!phydev)</div><div class='add'>+				return -ENODEV;</div><div class='add'>+</div><div class='add'>+			return phy_ethtool_ksettings_set(phydev, cmd);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return -EINVAL;</div><div class='hunk'>@@ -113,6 +198,11 @@ static void xgene_get_strings(struct net_device *ndev, u32 stringset, u8 *data)</div><div class='ctx'> 		memcpy(p, gstrings_stats[i].name, ETH_GSTRING_LEN);</div><div class='ctx'> 		p += ETH_GSTRING_LEN;</div><div class='ctx'> 	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; XGENE_EXTD_STATS_LEN; i++) {</div><div class='add'>+		memcpy(p, gstrings_extd_stats[i].name, ETH_GSTRING_LEN);</div><div class='add'>+		p += ETH_GSTRING_LEN;</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int xgene_get_sset_count(struct net_device *ndev, int sset)</div><div class='hunk'>@@ -120,28 +210,131 @@ static int xgene_get_sset_count(struct net_device *ndev, int sset)</div><div class='ctx'> 	if (sset != ETH_SS_STATS)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	return XGENE_STATS_LEN;</div><div class='add'>+	return XGENE_STATS_LEN + XGENE_EXTD_STATS_LEN;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgene_get_extd_stats(struct xgene_enet_pdata *pdata)</div><div class='add'>+{</div><div class='add'>+	u32 rx_drop, tx_drop;</div><div class='add'>+	u32 mask, tmp;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; XGENE_EXTD_STATS_LEN; i++) {</div><div class='add'>+		tmp = xgene_enet_rd_stat(pdata, gstrings_extd_stats[i].addr);</div><div class='add'>+		if (gstrings_extd_stats[i].mask) {</div><div class='add'>+			mask = GENMASK(gstrings_extd_stats[i].mask - 1, 0);</div><div class='add'>+			pdata-&gt;extd_stats[i] += (tmp &amp; mask);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;phy_mode == PHY_INTERFACE_MODE_XGMII) {</div><div class='add'>+		/* Errata 10GE_10 - SW should intepret RALN as 0 */</div><div class='add'>+		pdata-&gt;extd_stats[RALN_IDX] = 0;</div><div class='add'>+	} else {</div><div class='add'>+		/* Errata ENET_15 - Fixes RFCS, RFLR, TFCS counter */</div><div class='add'>+		pdata-&gt;extd_stats[RFCS_IDX] -= pdata-&gt;extd_stats[RALN_IDX];</div><div class='add'>+		pdata-&gt;extd_stats[RFLR_IDX] -= pdata-&gt;extd_stats[RUND_IDX];</div><div class='add'>+		pdata-&gt;extd_stats[TFCS_IDX] -= pdata-&gt;extd_stats[TFRG_IDX];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pdata-&gt;mac_ops-&gt;get_drop_cnt(pdata, &amp;rx_drop, &amp;tx_drop);</div><div class='add'>+	pdata-&gt;extd_stats[RX_OVERRUN_IDX] += rx_drop;</div><div class='add'>+	pdata-&gt;extd_stats[TX_UNDERRUN_IDX] += tx_drop;</div><div class='add'>+</div><div class='add'>+	/* Errata 10GE_8 -  Update Frame recovered from Errata 10GE_8/ENET_11 */</div><div class='add'>+	pdata-&gt;extd_stats[FALSE_RFLR_IDX] = pdata-&gt;false_rflr;</div><div class='add'>+	/* Errata ENET_15 - Jabber Frame recov'ed from Errata 10GE_10/ENET_15 */</div><div class='add'>+	pdata-&gt;extd_stats[FALSE_RJBR_IDX] = pdata-&gt;vlan_rjbr;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int xgene_extd_stats_init(struct xgene_enet_pdata *pdata)</div><div class='add'>+{</div><div class='add'>+	pdata-&gt;extd_stats = devm_kmalloc_array(&amp;pdata-&gt;pdev-&gt;dev,</div><div class='add'>+			XGENE_EXTD_STATS_LEN, sizeof(u64), GFP_KERNEL);</div><div class='add'>+	if (!pdata-&gt;extd_stats)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	xgene_get_extd_stats(pdata);</div><div class='add'>+	memset(pdata-&gt;extd_stats, 0, XGENE_EXTD_STATS_LEN * sizeof(u64));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgene_get_ethtool_stats(struct net_device *ndev,</div><div class='ctx'> 				    struct ethtool_stats *dummy,</div><div class='ctx'> 				    u64 *data)</div><div class='ctx'> {</div><div class='del'>-	void *pdata = netdev_priv(ndev);</div><div class='add'>+	struct xgene_enet_pdata *pdata = netdev_priv(ndev);</div><div class='add'>+	struct rtnl_link_stats64 stats;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='add'>+	dev_get_stats(ndev, &amp;stats);</div><div class='ctx'> 	for (i = 0; i &lt; XGENE_STATS_LEN; i++)</div><div class='del'>-		*data++ = *(u64 *)(pdata + gstrings_stats[i].offset);</div><div class='add'>+		data[i] = *(u64 *)((char *)&amp;stats + gstrings_stats[i].offset);</div><div class='add'>+</div><div class='add'>+	xgene_get_extd_stats(pdata);</div><div class='add'>+	for (i = 0; i &lt; XGENE_EXTD_STATS_LEN; i++)</div><div class='add'>+		data[i + XGENE_STATS_LEN] = pdata-&gt;extd_stats[i];</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgene_get_pauseparam(struct net_device *ndev,</div><div class='add'>+				 struct ethtool_pauseparam *pp)</div><div class='add'>+{</div><div class='add'>+	struct xgene_enet_pdata *pdata = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	pp-&gt;autoneg = pdata-&gt;pause_autoneg;</div><div class='add'>+	pp-&gt;tx_pause = pdata-&gt;tx_pause;</div><div class='add'>+	pp-&gt;rx_pause = pdata-&gt;rx_pause;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgene_set_pauseparam(struct net_device *ndev,</div><div class='add'>+				struct ethtool_pauseparam *pp)</div><div class='add'>+{</div><div class='add'>+	struct xgene_enet_pdata *pdata = netdev_priv(ndev);</div><div class='add'>+	struct phy_device *phydev = ndev-&gt;phydev;</div><div class='add'>+</div><div class='add'>+	if (phy_interface_mode_is_rgmii(pdata-&gt;phy_mode) ||</div><div class='add'>+	    pdata-&gt;phy_mode == PHY_INTERFACE_MODE_SGMII) {</div><div class='add'>+		if (!phydev)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		if (!phy_validate_pause(phydev, pp))</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		pdata-&gt;pause_autoneg = pp-&gt;autoneg;</div><div class='add'>+		pdata-&gt;tx_pause = pp-&gt;tx_pause;</div><div class='add'>+		pdata-&gt;rx_pause = pp-&gt;rx_pause;</div><div class='add'>+</div><div class='add'>+		phy_set_asym_pause(phydev, pp-&gt;rx_pause,  pp-&gt;tx_pause);</div><div class='add'>+</div><div class='add'>+		if (!pp-&gt;autoneg) {</div><div class='add'>+			pdata-&gt;mac_ops-&gt;flowctl_tx(pdata, pdata-&gt;tx_pause);</div><div class='add'>+			pdata-&gt;mac_ops-&gt;flowctl_rx(pdata, pdata-&gt;rx_pause);</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		if (pp-&gt;autoneg)</div><div class='add'>+			return -EINVAL;</div><div class='add'>+</div><div class='add'>+		pdata-&gt;tx_pause = pp-&gt;tx_pause;</div><div class='add'>+		pdata-&gt;rx_pause = pp-&gt;rx_pause;</div><div class='add'>+</div><div class='add'>+		pdata-&gt;mac_ops-&gt;flowctl_tx(pdata, pdata-&gt;tx_pause);</div><div class='add'>+		pdata-&gt;mac_ops-&gt;flowctl_rx(pdata, pdata-&gt;rx_pause);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct ethtool_ops xgene_ethtool_ops = {</div><div class='ctx'> 	.get_drvinfo = xgene_get_drvinfo,</div><div class='del'>-	.get_settings = xgene_get_settings,</div><div class='del'>-	.set_settings = xgene_set_settings,</div><div class='ctx'> 	.get_link = ethtool_op_get_link,</div><div class='ctx'> 	.get_strings = xgene_get_strings,</div><div class='ctx'> 	.get_sset_count = xgene_get_sset_count,</div><div class='del'>-	.get_ethtool_stats = xgene_get_ethtool_stats</div><div class='add'>+	.get_ethtool_stats = xgene_get_ethtool_stats,</div><div class='add'>+	.get_link_ksettings = xgene_get_link_ksettings,</div><div class='add'>+	.set_link_ksettings = xgene_set_link_ksettings,</div><div class='add'>+	.get_pauseparam = xgene_get_pauseparam,</div><div class='add'>+	.set_pauseparam = xgene_set_pauseparam</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> void xgene_enet_set_ethtool_ops(struct net_device *ndev)</div><div class='head'>diff --git a/drivers/net/ethernet/apm/xgene/xgene_enet_hw.c b/drivers/net/ethernet/apm/xgene/xgene_enet_hw.c<br/>index a626c4315a89..b854b6b42d77 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene/xgene_enet_hw.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene/xgene_enet_hw.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene/xgene_enet_hw.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apm/xgene/xgene_enet_hw.c</a></div><div class='hunk'>@@ -1,22 +1,10 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='ctx'> /* Applied Micro X-Gene SoC Ethernet Driver</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (c) 2014, Applied Micro Circuits Corporation</div><div class='ctx'>  * Authors: Iyappan Subramanian &lt;isubramanian@apm.com&gt;</div><div class='ctx'>  *	    Ravi Patel &lt;rapatel@apm.com&gt;</div><div class='ctx'>  *	    Keyur Chudgar &lt;kchudgar@apm.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute  it and/or modify it</div><div class='del'>- * under  the terms of  the GNU General  Public License as published by the</div><div class='del'>- * Free Software Foundation;  either version 2 of the  License, or (at your</div><div class='del'>- * option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include "xgene_enet_main.h"</div><div class='hunk'>@@ -107,7 +95,8 @@ static void xgene_enet_set_ring_state(struct xgene_enet_desc_ring *ring)</div><div class='ctx'> {</div><div class='ctx'> 	xgene_enet_ring_set_type(ring);</div><div class='ctx'> </div><div class='del'>-	if (xgene_enet_ring_owner(ring-&gt;id) == RING_OWNER_ETH0)</div><div class='add'>+	if (xgene_enet_ring_owner(ring-&gt;id) == RING_OWNER_ETH0 ||</div><div class='add'>+	    xgene_enet_ring_owner(ring-&gt;id) == RING_OWNER_ETH1)</div><div class='ctx'> 		xgene_enet_ring_set_recombbuf(ring);</div><div class='ctx'> </div><div class='ctx'> 	xgene_enet_ring_init(ring);</div><div class='hunk'>@@ -204,30 +193,27 @@ static u32 xgene_enet_ring_len(struct xgene_enet_desc_ring *ring)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void xgene_enet_parse_error(struct xgene_enet_desc_ring *ring,</div><div class='del'>-			    struct xgene_enet_pdata *pdata,</div><div class='ctx'> 			    enum xgene_enet_err_code status)</div><div class='ctx'> {</div><div class='del'>-	struct rtnl_link_stats64 *stats = &amp;pdata-&gt;stats;</div><div class='del'>-</div><div class='ctx'> 	switch (status) {</div><div class='ctx'> 	case INGRESS_CRC:</div><div class='del'>-		stats-&gt;rx_crc_errors++;</div><div class='add'>+		ring-&gt;rx_crc_errors++;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case INGRESS_CHECKSUM:</div><div class='ctx'> 	case INGRESS_CHECKSUM_COMPUTE:</div><div class='del'>-		stats-&gt;rx_errors++;</div><div class='add'>+		ring-&gt;rx_errors++;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case INGRESS_TRUNC_FRAME:</div><div class='del'>-		stats-&gt;rx_frame_errors++;</div><div class='add'>+		ring-&gt;rx_frame_errors++;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case INGRESS_PKT_LEN:</div><div class='del'>-		stats-&gt;rx_length_errors++;</div><div class='add'>+		ring-&gt;rx_length_errors++;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case INGRESS_PKT_UNDER:</div><div class='del'>-		stats-&gt;rx_frame_errors++;</div><div class='add'>+		ring-&gt;rx_frame_errors++;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case INGRESS_FIFO_OVERRUN:</div><div class='del'>-		stats-&gt;rx_fifo_errors++;</div><div class='add'>+		ring-&gt;rx_fifo_errors++;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		break;</div><div class='hunk'>@@ -266,42 +252,39 @@ static void xgene_enet_wr_mcx_csr(struct xgene_enet_pdata *pdata,</div><div class='ctx'> 	iowrite32(val, addr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool xgene_enet_wr_indirect(void __iomem *addr, void __iomem *wr,</div><div class='del'>-				   void __iomem *cmd, void __iomem *cmd_done,</div><div class='del'>-				   u32 wr_addr, u32 wr_data)</div><div class='add'>+void xgene_enet_wr_mac(struct xgene_enet_pdata *pdata, u32 wr_addr, u32 wr_data)</div><div class='ctx'> {</div><div class='del'>-	u32 done;</div><div class='add'>+	void __iomem *addr, *wr, *cmd, *cmd_done;</div><div class='add'>+	struct net_device *ndev = pdata-&gt;ndev;</div><div class='ctx'> 	u8 wait = 10;</div><div class='add'>+	u32 done;</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;mdio_driver &amp;&amp; ndev-&gt;phydev &amp;&amp;</div><div class='add'>+	    phy_interface_mode_is_rgmii(pdata-&gt;phy_mode)) {</div><div class='add'>+		struct mii_bus *bus = ndev-&gt;phydev-&gt;mdio.bus;</div><div class='add'>+</div><div class='add'>+		return xgene_mdio_wr_mac(bus-&gt;priv, wr_addr, wr_data);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='add'>+	addr = pdata-&gt;mcx_mac_addr + MAC_ADDR_REG_OFFSET;</div><div class='add'>+	wr = pdata-&gt;mcx_mac_addr + MAC_WRITE_REG_OFFSET;</div><div class='add'>+	cmd = pdata-&gt;mcx_mac_addr + MAC_COMMAND_REG_OFFSET;</div><div class='add'>+	cmd_done = pdata-&gt;mcx_mac_addr + MAC_COMMAND_DONE_REG_OFFSET;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;pdata-&gt;mac_lock);</div><div class='ctx'> 	iowrite32(wr_addr, addr);</div><div class='ctx'> 	iowrite32(wr_data, wr);</div><div class='ctx'> 	iowrite32(XGENE_ENET_WR_CMD, cmd);</div><div class='ctx'> </div><div class='del'>-	/* wait for write command to complete */</div><div class='ctx'> 	while (!(done = ioread32(cmd_done)) &amp;&amp; wait--)</div><div class='ctx'> 		udelay(1);</div><div class='ctx'> </div><div class='ctx'> 	if (!done)</div><div class='del'>-		return false;</div><div class='add'>+		netdev_err(ndev, "mac write failed, addr: %04x data: %08x\n",</div><div class='add'>+			   wr_addr, wr_data);</div><div class='ctx'> </div><div class='ctx'> 	iowrite32(0, cmd);</div><div class='del'>-</div><div class='del'>-	return true;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void xgene_enet_wr_mcx_mac(struct xgene_enet_pdata *pdata,</div><div class='del'>-				  u32 wr_addr, u32 wr_data)</div><div class='del'>-{</div><div class='del'>-	void __iomem *addr, *wr, *cmd, *cmd_done;</div><div class='del'>-</div><div class='del'>-	addr = pdata-&gt;mcx_mac_addr + MAC_ADDR_REG_OFFSET;</div><div class='del'>-	wr = pdata-&gt;mcx_mac_addr + MAC_WRITE_REG_OFFSET;</div><div class='del'>-	cmd = pdata-&gt;mcx_mac_addr + MAC_COMMAND_REG_OFFSET;</div><div class='del'>-	cmd_done = pdata-&gt;mcx_mac_addr + MAC_COMMAND_DONE_REG_OFFSET;</div><div class='del'>-</div><div class='del'>-	if (!xgene_enet_wr_indirect(addr, wr, cmd, cmd_done, wr_addr, wr_data))</div><div class='del'>-		netdev_err(pdata-&gt;ndev, "MCX mac write failed, addr: %04x\n",</div><div class='del'>-			   wr_addr);</div><div class='add'>+	spin_unlock(&amp;pdata-&gt;mac_lock);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgene_enet_rd_csr(struct xgene_enet_pdata *pdata,</div><div class='hunk'>@@ -328,108 +311,82 @@ static void xgene_enet_rd_mcx_csr(struct xgene_enet_pdata *pdata,</div><div class='ctx'> 	*val = ioread32(addr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool xgene_enet_rd_indirect(void __iomem *addr, void __iomem *rd,</div><div class='del'>-				   void __iomem *cmd, void __iomem *cmd_done,</div><div class='del'>-				   u32 rd_addr, u32 *rd_data)</div><div class='add'>+u32 xgene_enet_rd_mac(struct xgene_enet_pdata *pdata, u32 rd_addr)</div><div class='ctx'> {</div><div class='del'>-	u32 done;</div><div class='add'>+	void __iomem *addr, *rd, *cmd, *cmd_done;</div><div class='add'>+	struct net_device *ndev = pdata-&gt;ndev;</div><div class='add'>+	u32 done, rd_data;</div><div class='ctx'> 	u8 wait = 10;</div><div class='ctx'> </div><div class='add'>+	if (pdata-&gt;mdio_driver &amp;&amp; ndev-&gt;phydev &amp;&amp;</div><div class='add'>+	    phy_interface_mode_is_rgmii(pdata-&gt;phy_mode)) {</div><div class='add'>+		struct mii_bus *bus = ndev-&gt;phydev-&gt;mdio.bus;</div><div class='add'>+</div><div class='add'>+		return xgene_mdio_rd_mac(bus-&gt;priv, rd_addr);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	addr = pdata-&gt;mcx_mac_addr + MAC_ADDR_REG_OFFSET;</div><div class='add'>+	rd = pdata-&gt;mcx_mac_addr + MAC_READ_REG_OFFSET;</div><div class='add'>+	cmd = pdata-&gt;mcx_mac_addr + MAC_COMMAND_REG_OFFSET;</div><div class='add'>+	cmd_done = pdata-&gt;mcx_mac_addr + MAC_COMMAND_DONE_REG_OFFSET;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;pdata-&gt;mac_lock);</div><div class='ctx'> 	iowrite32(rd_addr, addr);</div><div class='ctx'> 	iowrite32(XGENE_ENET_RD_CMD, cmd);</div><div class='ctx'> </div><div class='del'>-	/* wait for read command to complete */</div><div class='ctx'> 	while (!(done = ioread32(cmd_done)) &amp;&amp; wait--)</div><div class='ctx'> 		udelay(1);</div><div class='ctx'> </div><div class='ctx'> 	if (!done)</div><div class='del'>-		return false;</div><div class='add'>+		netdev_err(ndev, "mac read failed, addr: %04x\n", rd_addr);</div><div class='ctx'> </div><div class='del'>-	*rd_data = ioread32(rd);</div><div class='add'>+	rd_data = ioread32(rd);</div><div class='ctx'> 	iowrite32(0, cmd);</div><div class='add'>+	spin_unlock(&amp;pdata-&gt;mac_lock);</div><div class='ctx'> </div><div class='del'>-	return true;</div><div class='add'>+	return rd_data;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xgene_enet_rd_mcx_mac(struct xgene_enet_pdata *pdata,</div><div class='del'>-				  u32 rd_addr, u32 *rd_data)</div><div class='add'>+u32 xgene_enet_rd_stat(struct xgene_enet_pdata *pdata, u32 rd_addr)</div><div class='ctx'> {</div><div class='ctx'> 	void __iomem *addr, *rd, *cmd, *cmd_done;</div><div class='del'>-</div><div class='del'>-	addr = pdata-&gt;mcx_mac_addr + MAC_ADDR_REG_OFFSET;</div><div class='del'>-	rd = pdata-&gt;mcx_mac_addr + MAC_READ_REG_OFFSET;</div><div class='del'>-	cmd = pdata-&gt;mcx_mac_addr + MAC_COMMAND_REG_OFFSET;</div><div class='del'>-	cmd_done = pdata-&gt;mcx_mac_addr + MAC_COMMAND_DONE_REG_OFFSET;</div><div class='del'>-</div><div class='del'>-	if (!xgene_enet_rd_indirect(addr, rd, cmd, cmd_done, rd_addr, rd_data))</div><div class='del'>-		netdev_err(pdata-&gt;ndev, "MCX mac read failed, addr: %04x\n",</div><div class='del'>-			   rd_addr);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static int xgene_mii_phy_write(struct xgene_enet_pdata *pdata, int phy_id,</div><div class='del'>-			       u32 reg, u16 data)</div><div class='del'>-{</div><div class='del'>-	u32 addr = 0, wr_data = 0;</div><div class='del'>-	u32 done;</div><div class='add'>+	u32 done, rd_data;</div><div class='ctx'> 	u8 wait = 10;</div><div class='ctx'> </div><div class='del'>-	PHY_ADDR_SET(&amp;addr, phy_id);</div><div class='del'>-	REG_ADDR_SET(&amp;addr, reg);</div><div class='del'>-	xgene_enet_wr_mcx_mac(pdata, MII_MGMT_ADDRESS_ADDR, addr);</div><div class='del'>-</div><div class='del'>-	PHY_CONTROL_SET(&amp;wr_data, data);</div><div class='del'>-	xgene_enet_wr_mcx_mac(pdata, MII_MGMT_CONTROL_ADDR, wr_data);</div><div class='del'>-	do {</div><div class='del'>-		usleep_range(5, 10);</div><div class='del'>-		xgene_enet_rd_mcx_mac(pdata, MII_MGMT_INDICATORS_ADDR, &amp;done);</div><div class='del'>-	} while ((done &amp; BUSY_MASK) &amp;&amp; wait--);</div><div class='del'>-</div><div class='del'>-	if (done &amp; BUSY_MASK) {</div><div class='del'>-		netdev_err(pdata-&gt;ndev, "MII_MGMT write failed\n");</div><div class='del'>-		return -EBUSY;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='add'>+	addr = pdata-&gt;mcx_stats_addr + STAT_ADDR_REG_OFFSET;</div><div class='add'>+	rd = pdata-&gt;mcx_stats_addr + STAT_READ_REG_OFFSET;</div><div class='add'>+	cmd = pdata-&gt;mcx_stats_addr + STAT_COMMAND_REG_OFFSET;</div><div class='add'>+	cmd_done = pdata-&gt;mcx_stats_addr + STAT_COMMAND_DONE_REG_OFFSET;</div><div class='ctx'> </div><div class='del'>-static int xgene_mii_phy_read(struct xgene_enet_pdata *pdata,</div><div class='del'>-			      u8 phy_id, u32 reg)</div><div class='del'>-{</div><div class='del'>-	u32 addr = 0;</div><div class='del'>-	u32 data, done;</div><div class='del'>-	u8 wait = 10;</div><div class='add'>+	spin_lock(&amp;pdata-&gt;stats_lock);</div><div class='add'>+	iowrite32(rd_addr, addr);</div><div class='add'>+	iowrite32(XGENE_ENET_RD_CMD, cmd);</div><div class='ctx'> </div><div class='del'>-	PHY_ADDR_SET(&amp;addr, phy_id);</div><div class='del'>-	REG_ADDR_SET(&amp;addr, reg);</div><div class='del'>-	xgene_enet_wr_mcx_mac(pdata, MII_MGMT_ADDRESS_ADDR, addr);</div><div class='del'>-	xgene_enet_wr_mcx_mac(pdata, MII_MGMT_COMMAND_ADDR, READ_CYCLE_MASK);</div><div class='del'>-	do {</div><div class='del'>-		usleep_range(5, 10);</div><div class='del'>-		xgene_enet_rd_mcx_mac(pdata, MII_MGMT_INDICATORS_ADDR, &amp;done);</div><div class='del'>-	} while ((done &amp; BUSY_MASK) &amp;&amp; wait--);</div><div class='add'>+	while (!(done = ioread32(cmd_done)) &amp;&amp; wait--)</div><div class='add'>+		udelay(1);</div><div class='ctx'> </div><div class='del'>-	if (done &amp; BUSY_MASK) {</div><div class='del'>-		netdev_err(pdata-&gt;ndev, "MII_MGMT read failed\n");</div><div class='del'>-		return -EBUSY;</div><div class='del'>-	}</div><div class='add'>+	if (!done)</div><div class='add'>+		netdev_err(pdata-&gt;ndev, "mac stats read failed, addr: %04x\n",</div><div class='add'>+			   rd_addr);</div><div class='ctx'> </div><div class='del'>-	xgene_enet_rd_mcx_mac(pdata, MII_MGMT_STATUS_ADDR, &amp;data);</div><div class='del'>-	xgene_enet_wr_mcx_mac(pdata, MII_MGMT_COMMAND_ADDR, 0);</div><div class='add'>+	rd_data = ioread32(rd);</div><div class='add'>+	iowrite32(0, cmd);</div><div class='add'>+	spin_unlock(&amp;pdata-&gt;stats_lock);</div><div class='ctx'> </div><div class='del'>-	return data;</div><div class='add'>+	return rd_data;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgene_gmac_set_mac_addr(struct xgene_enet_pdata *pdata)</div><div class='ctx'> {</div><div class='add'>+	const u8 *dev_addr = pdata-&gt;ndev-&gt;dev_addr;</div><div class='ctx'> 	u32 addr0, addr1;</div><div class='del'>-	u8 *dev_addr = pdata-&gt;ndev-&gt;dev_addr;</div><div class='ctx'> </div><div class='ctx'> 	addr0 = (dev_addr[3] &lt;&lt; 24) | (dev_addr[2] &lt;&lt; 16) |</div><div class='ctx'> 		(dev_addr[1] &lt;&lt; 8) | dev_addr[0];</div><div class='ctx'> 	addr1 = (dev_addr[5] &lt;&lt; 24) | (dev_addr[4] &lt;&lt; 16);</div><div class='ctx'> </div><div class='del'>-	xgene_enet_wr_mcx_mac(pdata, STATION_ADDR0_ADDR, addr0);</div><div class='del'>-	xgene_enet_wr_mcx_mac(pdata, STATION_ADDR1_ADDR, addr1);</div><div class='add'>+	xgene_enet_wr_mac(pdata, STATION_ADDR0_ADDR, addr0);</div><div class='add'>+	xgene_enet_wr_mac(pdata, STATION_ADDR1_ADDR, addr1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int xgene_enet_ecc_init(struct xgene_enet_pdata *pdata)</div><div class='hunk'>@@ -454,33 +411,65 @@ static int xgene_enet_ecc_init(struct xgene_enet_pdata *pdata)</div><div class='ctx'> </div><div class='ctx'> static void xgene_gmac_reset(struct xgene_enet_pdata *pdata)</div><div class='ctx'> {</div><div class='del'>-	xgene_enet_wr_mcx_mac(pdata, MAC_CONFIG_1_ADDR, SOFT_RESET1);</div><div class='del'>-	xgene_enet_wr_mcx_mac(pdata, MAC_CONFIG_1_ADDR, 0);</div><div class='add'>+	xgene_enet_wr_mac(pdata, MAC_CONFIG_1_ADDR, SOFT_RESET1);</div><div class='add'>+	xgene_enet_wr_mac(pdata, MAC_CONFIG_1_ADDR, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xgene_gmac_init(struct xgene_enet_pdata *pdata)</div><div class='add'>+static void xgene_enet_configure_clock(struct xgene_enet_pdata *pdata)</div><div class='ctx'> {</div><div class='del'>-	u32 value, mc2;</div><div class='del'>-	u32 intf_ctl, rgmii;</div><div class='del'>-	u32 icm0, icm2;</div><div class='add'>+	struct device *dev = &amp;pdata-&gt;pdev-&gt;dev;</div><div class='ctx'> </div><div class='del'>-	xgene_gmac_reset(pdata);</div><div class='add'>+	if (dev-&gt;of_node) {</div><div class='add'>+		struct clk *parent = clk_get_parent(pdata-&gt;clk);</div><div class='add'>+		long rate = rgmii_clock(pdata-&gt;phy_speed);</div><div class='add'>+</div><div class='add'>+		if (rate &lt; 0)</div><div class='add'>+			rate = 125000000;</div><div class='add'>+</div><div class='add'>+		clk_set_rate(parent, rate);</div><div class='add'>+	}</div><div class='add'>+#ifdef CONFIG_ACPI</div><div class='add'>+	else {</div><div class='add'>+		switch (pdata-&gt;phy_speed) {</div><div class='add'>+		case SPEED_10:</div><div class='add'>+			acpi_evaluate_object(ACPI_HANDLE(dev),</div><div class='add'>+					     "S10", NULL, NULL);</div><div class='add'>+			break;</div><div class='add'>+		case SPEED_100:</div><div class='add'>+			acpi_evaluate_object(ACPI_HANDLE(dev),</div><div class='add'>+					     "S100", NULL, NULL);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			acpi_evaluate_object(ACPI_HANDLE(dev),</div><div class='add'>+					     "S1G", NULL, NULL);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgene_gmac_set_speed(struct xgene_enet_pdata *pdata)</div><div class='add'>+{</div><div class='add'>+	u32 icm0, icm2, mc2;</div><div class='add'>+	u32 intf_ctl, rgmii, value;</div><div class='ctx'> </div><div class='ctx'> 	xgene_enet_rd_mcx_csr(pdata, ICM_CONFIG0_REG_0_ADDR, &amp;icm0);</div><div class='ctx'> 	xgene_enet_rd_mcx_csr(pdata, ICM_CONFIG2_REG_0_ADDR, &amp;icm2);</div><div class='del'>-	xgene_enet_rd_mcx_mac(pdata, MAC_CONFIG_2_ADDR, &amp;mc2);</div><div class='del'>-	xgene_enet_rd_mcx_mac(pdata, INTERFACE_CONTROL_ADDR, &amp;intf_ctl);</div><div class='add'>+	mc2 = xgene_enet_rd_mac(pdata, MAC_CONFIG_2_ADDR);</div><div class='add'>+	intf_ctl = xgene_enet_rd_mac(pdata, INTERFACE_CONTROL_ADDR);</div><div class='ctx'> 	xgene_enet_rd_csr(pdata, RGMII_REG_0_ADDR, &amp;rgmii);</div><div class='ctx'> </div><div class='ctx'> 	switch (pdata-&gt;phy_speed) {</div><div class='ctx'> 	case SPEED_10:</div><div class='ctx'> 		ENET_INTERFACE_MODE2_SET(&amp;mc2, 1);</div><div class='add'>+		intf_ctl &amp;= ~(ENET_LHD_MODE | ENET_GHD_MODE);</div><div class='ctx'> 		CFG_MACMODE_SET(&amp;icm0, 0);</div><div class='ctx'> 		CFG_WAITASYNCRD_SET(&amp;icm2, 500);</div><div class='ctx'> 		rgmii &amp;= ~CFG_SPEED_1250;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case SPEED_100:</div><div class='ctx'> 		ENET_INTERFACE_MODE2_SET(&amp;mc2, 1);</div><div class='add'>+		intf_ctl &amp;= ~ENET_GHD_MODE;</div><div class='ctx'> 		intf_ctl |= ENET_LHD_MODE;</div><div class='ctx'> 		CFG_MACMODE_SET(&amp;icm0, 1);</div><div class='ctx'> 		CFG_WAITASYNCRD_SET(&amp;icm2, 80);</div><div class='hunk'>@@ -488,24 +477,94 @@ static void xgene_gmac_init(struct xgene_enet_pdata *pdata)</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		ENET_INTERFACE_MODE2_SET(&amp;mc2, 2);</div><div class='add'>+		intf_ctl &amp;= ~ENET_LHD_MODE;</div><div class='ctx'> 		intf_ctl |= ENET_GHD_MODE;</div><div class='del'>-		CFG_TXCLK_MUXSEL0_SET(&amp;rgmii, 4);</div><div class='add'>+		CFG_MACMODE_SET(&amp;icm0, 2);</div><div class='add'>+		CFG_WAITASYNCRD_SET(&amp;icm2, 0);</div><div class='add'>+		CFG_TXCLK_MUXSEL0_SET(&amp;rgmii, pdata-&gt;tx_delay);</div><div class='add'>+		CFG_RXCLK_MUXSEL0_SET(&amp;rgmii, pdata-&gt;rx_delay);</div><div class='add'>+		rgmii |= CFG_SPEED_1250;</div><div class='add'>+</div><div class='ctx'> 		xgene_enet_rd_csr(pdata, DEBUG_REG_ADDR, &amp;value);</div><div class='ctx'> 		value |= CFG_BYPASS_UNISEC_TX | CFG_BYPASS_UNISEC_RX;</div><div class='ctx'> 		xgene_enet_wr_csr(pdata, DEBUG_REG_ADDR, value);</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	mc2 |= FULL_DUPLEX2;</div><div class='del'>-	xgene_enet_wr_mcx_mac(pdata, MAC_CONFIG_2_ADDR, mc2);</div><div class='del'>-	xgene_enet_wr_mcx_mac(pdata, INTERFACE_CONTROL_ADDR, intf_ctl);</div><div class='add'>+	mc2 |= FULL_DUPLEX2 | PAD_CRC | LENGTH_CHK;</div><div class='add'>+	xgene_enet_wr_mac(pdata, MAC_CONFIG_2_ADDR, mc2);</div><div class='add'>+	xgene_enet_wr_mac(pdata, INTERFACE_CONTROL_ADDR, intf_ctl);</div><div class='add'>+	xgene_enet_wr_csr(pdata, RGMII_REG_0_ADDR, rgmii);</div><div class='add'>+	xgene_enet_configure_clock(pdata);</div><div class='add'>+</div><div class='add'>+	xgene_enet_wr_mcx_csr(pdata, ICM_CONFIG0_REG_0_ADDR, icm0);</div><div class='add'>+	xgene_enet_wr_mcx_csr(pdata, ICM_CONFIG2_REG_0_ADDR, icm2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgene_enet_set_frame_size(struct xgene_enet_pdata *pdata, int size)</div><div class='add'>+{</div><div class='add'>+	xgene_enet_wr_mac(pdata, MAX_FRAME_LEN_ADDR, size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgene_gmac_enable_tx_pause(struct xgene_enet_pdata *pdata,</div><div class='add'>+				       bool enable)</div><div class='add'>+{</div><div class='add'>+	u32 data;</div><div class='add'>+</div><div class='add'>+	xgene_enet_rd_mcx_csr(pdata, CSR_ECM_CFG_0_ADDR, &amp;data);</div><div class='add'>+</div><div class='add'>+	if (enable)</div><div class='add'>+		data |= MULTI_DPF_AUTOCTRL | PAUSE_XON_EN;</div><div class='add'>+	else</div><div class='add'>+		data &amp;= ~(MULTI_DPF_AUTOCTRL | PAUSE_XON_EN);</div><div class='ctx'> </div><div class='add'>+	xgene_enet_wr_mcx_csr(pdata, CSR_ECM_CFG_0_ADDR, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgene_gmac_flowctl_tx(struct xgene_enet_pdata *pdata, bool enable)</div><div class='add'>+{</div><div class='add'>+	u32 data;</div><div class='add'>+</div><div class='add'>+	data = xgene_enet_rd_mac(pdata, MAC_CONFIG_1_ADDR);</div><div class='add'>+</div><div class='add'>+	if (enable)</div><div class='add'>+		data |= TX_FLOW_EN;</div><div class='add'>+	else</div><div class='add'>+		data &amp;= ~TX_FLOW_EN;</div><div class='add'>+</div><div class='add'>+	xgene_enet_wr_mac(pdata, MAC_CONFIG_1_ADDR, data);</div><div class='add'>+</div><div class='add'>+	pdata-&gt;mac_ops-&gt;enable_tx_pause(pdata, enable);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgene_gmac_flowctl_rx(struct xgene_enet_pdata *pdata, bool enable)</div><div class='add'>+{</div><div class='add'>+	u32 data;</div><div class='add'>+</div><div class='add'>+	data = xgene_enet_rd_mac(pdata, MAC_CONFIG_1_ADDR);</div><div class='add'>+</div><div class='add'>+	if (enable)</div><div class='add'>+		data |= RX_FLOW_EN;</div><div class='add'>+	else</div><div class='add'>+		data &amp;= ~RX_FLOW_EN;</div><div class='add'>+</div><div class='add'>+	xgene_enet_wr_mac(pdata, MAC_CONFIG_1_ADDR, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgene_gmac_init(struct xgene_enet_pdata *pdata)</div><div class='add'>+{</div><div class='add'>+	u32 value;</div><div class='add'>+</div><div class='add'>+	if (!pdata-&gt;mdio_driver)</div><div class='add'>+		xgene_gmac_reset(pdata);</div><div class='add'>+</div><div class='add'>+	xgene_gmac_set_speed(pdata);</div><div class='ctx'> 	xgene_gmac_set_mac_addr(pdata);</div><div class='ctx'> </div><div class='ctx'> 	/* Adjust MDC clock frequency */</div><div class='del'>-	xgene_enet_rd_mcx_mac(pdata, MII_MGMT_CONFIG_ADDR, &amp;value);</div><div class='add'>+	value = xgene_enet_rd_mac(pdata, MII_MGMT_CONFIG_ADDR);</div><div class='ctx'> 	MGMT_CLOCK_SEL_SET(&amp;value, 7);</div><div class='del'>-	xgene_enet_wr_mcx_mac(pdata, MII_MGMT_CONFIG_ADDR, value);</div><div class='add'>+	xgene_enet_wr_mac(pdata, MII_MGMT_CONFIG_ADDR, value);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable drop if bufpool not available */</div><div class='ctx'> 	xgene_enet_rd_csr(pdata, RSIF_CONFIG_REG_ADDR, &amp;value);</div><div class='hunk'>@@ -514,14 +573,21 @@ static void xgene_gmac_init(struct xgene_enet_pdata *pdata)</div><div class='ctx'> </div><div class='ctx'> 	/* Rtype should be copied from FP */</div><div class='ctx'> 	xgene_enet_wr_csr(pdata, RSIF_RAM_DBG_REG0_ADDR, 0);</div><div class='del'>-	xgene_enet_wr_csr(pdata, RGMII_REG_0_ADDR, rgmii);</div><div class='add'>+</div><div class='add'>+	/* Configure HW pause frame generation */</div><div class='add'>+	xgene_enet_rd_mcx_csr(pdata, CSR_MULTI_DPF0_ADDR, &amp;value);</div><div class='add'>+	value = (DEF_QUANTA &lt;&lt; 16) | (value &amp; 0xFFFF);</div><div class='add'>+	xgene_enet_wr_mcx_csr(pdata, CSR_MULTI_DPF0_ADDR, value);</div><div class='add'>+</div><div class='add'>+	xgene_enet_wr_csr(pdata, RXBUF_PAUSE_THRESH, DEF_PAUSE_THRES);</div><div class='add'>+	xgene_enet_wr_csr(pdata, RXBUF_PAUSE_OFF_THRESH, DEF_PAUSE_OFF_THRES);</div><div class='add'>+</div><div class='add'>+	xgene_gmac_flowctl_tx(pdata, pdata-&gt;tx_pause);</div><div class='add'>+	xgene_gmac_flowctl_rx(pdata, pdata-&gt;rx_pause);</div><div class='ctx'> </div><div class='ctx'> 	/* Rx-Tx traffic resume */</div><div class='ctx'> 	xgene_enet_wr_csr(pdata, CFG_LINK_AGGR_RESUME_0_ADDR, TX_PORT0);</div><div class='ctx'> </div><div class='del'>-	xgene_enet_wr_mcx_csr(pdata, ICM_CONFIG0_REG_0_ADDR, icm0);</div><div class='del'>-	xgene_enet_wr_mcx_csr(pdata, ICM_CONFIG2_REG_0_ADDR, icm2);</div><div class='del'>-</div><div class='ctx'> 	xgene_enet_rd_mcx_csr(pdata, RX_DV_GATE_REG_0_ADDR, &amp;value);</div><div class='ctx'> 	value &amp;= ~TX_DV_GATE_EN0;</div><div class='ctx'> 	value &amp;= ~RX_DV_GATE_EN0;</div><div class='hunk'>@@ -531,6 +597,18 @@ static void xgene_gmac_init(struct xgene_enet_pdata *pdata)</div><div class='ctx'> 	xgene_enet_wr_csr(pdata, CFG_BYPASS_ADDR, RESUME_TX);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void xgene_gmac_get_drop_cnt(struct xgene_enet_pdata *pdata,</div><div class='add'>+				    u32 *rx, u32 *tx)</div><div class='add'>+{</div><div class='add'>+	u32 count;</div><div class='add'>+</div><div class='add'>+	xgene_enet_rd_mcx_csr(pdata, ICM_ECM_DROP_COUNT_REG0_ADDR, &amp;count);</div><div class='add'>+	*rx = ICM_DROP_COUNT(count);</div><div class='add'>+	*tx = ECM_DROP_COUNT(count);</div><div class='add'>+	/* Errata: 10GE_4 - Fix ICM_ECM_DROP_COUNT not clear-on-read */</div><div class='add'>+	xgene_enet_rd_mcx_csr(pdata, ECM_CONFIG0_REG_0_ADDR, &amp;count);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void xgene_enet_config_ring_if_assoc(struct xgene_enet_pdata *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	u32 val = 0xffffffff;</div><div class='hunk'>@@ -542,21 +620,25 @@ static void xgene_enet_config_ring_if_assoc(struct xgene_enet_pdata *pdata)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgene_enet_cle_bypass(struct xgene_enet_pdata *pdata,</div><div class='del'>-				  u32 dst_ring_num, u16 bufpool_id)</div><div class='add'>+				  u32 dst_ring_num, u16 bufpool_id,</div><div class='add'>+				  u16 nxtbufpool_id)</div><div class='ctx'> {</div><div class='ctx'> 	u32 cb;</div><div class='del'>-	u32 fpsel;</div><div class='add'>+	u32 fpsel, nxtfpsel;</div><div class='ctx'> </div><div class='del'>-	fpsel = xgene_enet_ring_bufnum(bufpool_id) - 0x20;</div><div class='add'>+	fpsel = xgene_enet_get_fpsel(bufpool_id);</div><div class='add'>+	nxtfpsel = xgene_enet_get_fpsel(nxtbufpool_id);</div><div class='ctx'> </div><div class='ctx'> 	xgene_enet_rd_csr(pdata, CLE_BYPASS_REG0_0_ADDR, &amp;cb);</div><div class='ctx'> 	cb |= CFG_CLE_BYPASS_EN0;</div><div class='ctx'> 	CFG_CLE_IP_PROTOCOL0_SET(&amp;cb, 3);</div><div class='add'>+	CFG_CLE_IP_HDR_LEN_SET(&amp;cb, 0);</div><div class='ctx'> 	xgene_enet_wr_csr(pdata, CLE_BYPASS_REG0_0_ADDR, cb);</div><div class='ctx'> </div><div class='ctx'> 	xgene_enet_rd_csr(pdata, CLE_BYPASS_REG1_0_ADDR, &amp;cb);</div><div class='ctx'> 	CFG_CLE_DSTQID0_SET(&amp;cb, dst_ring_num);</div><div class='ctx'> 	CFG_CLE_FPSEL0_SET(&amp;cb, fpsel);</div><div class='add'>+	CFG_CLE_NXTFPSEL0_SET(&amp;cb, nxtfpsel);</div><div class='ctx'> 	xgene_enet_wr_csr(pdata, CLE_BYPASS_REG1_0_ADDR, cb);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -564,32 +646,32 @@ static void xgene_gmac_rx_enable(struct xgene_enet_pdata *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	u32 data;</div><div class='ctx'> </div><div class='del'>-	xgene_enet_rd_mcx_mac(pdata, MAC_CONFIG_1_ADDR, &amp;data);</div><div class='del'>-	xgene_enet_wr_mcx_mac(pdata, MAC_CONFIG_1_ADDR, data | RX_EN);</div><div class='add'>+	data = xgene_enet_rd_mac(pdata, MAC_CONFIG_1_ADDR);</div><div class='add'>+	xgene_enet_wr_mac(pdata, MAC_CONFIG_1_ADDR, data | RX_EN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgene_gmac_tx_enable(struct xgene_enet_pdata *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	u32 data;</div><div class='ctx'> </div><div class='del'>-	xgene_enet_rd_mcx_mac(pdata, MAC_CONFIG_1_ADDR, &amp;data);</div><div class='del'>-	xgene_enet_wr_mcx_mac(pdata, MAC_CONFIG_1_ADDR, data | TX_EN);</div><div class='add'>+	data = xgene_enet_rd_mac(pdata, MAC_CONFIG_1_ADDR);</div><div class='add'>+	xgene_enet_wr_mac(pdata, MAC_CONFIG_1_ADDR, data | TX_EN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgene_gmac_rx_disable(struct xgene_enet_pdata *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	u32 data;</div><div class='ctx'> </div><div class='del'>-	xgene_enet_rd_mcx_mac(pdata, MAC_CONFIG_1_ADDR, &amp;data);</div><div class='del'>-	xgene_enet_wr_mcx_mac(pdata, MAC_CONFIG_1_ADDR, data &amp; ~RX_EN);</div><div class='add'>+	data = xgene_enet_rd_mac(pdata, MAC_CONFIG_1_ADDR);</div><div class='add'>+	xgene_enet_wr_mac(pdata, MAC_CONFIG_1_ADDR, data &amp; ~RX_EN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgene_gmac_tx_disable(struct xgene_enet_pdata *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	u32 data;</div><div class='ctx'> </div><div class='del'>-	xgene_enet_rd_mcx_mac(pdata, MAC_CONFIG_1_ADDR, &amp;data);</div><div class='del'>-	xgene_enet_wr_mcx_mac(pdata, MAC_CONFIG_1_ADDR, data &amp; ~TX_EN);</div><div class='add'>+	data = xgene_enet_rd_mac(pdata, MAC_CONFIG_1_ADDR);</div><div class='add'>+	xgene_enet_wr_mac(pdata, MAC_CONFIG_1_ADDR, data &amp; ~TX_EN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> bool xgene_ring_mgr_init(struct xgene_enet_pdata *p)</div><div class='hunk'>@@ -605,107 +687,200 @@ bool xgene_ring_mgr_init(struct xgene_enet_pdata *p)</div><div class='ctx'> </div><div class='ctx'> static int xgene_enet_reset(struct xgene_enet_pdata *pdata)</div><div class='ctx'> {</div><div class='del'>-	u32 val;</div><div class='add'>+	struct device *dev = &amp;pdata-&gt;pdev-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 	if (!xgene_ring_mgr_init(pdata))</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	if (!IS_ERR(pdata-&gt;clk)) {</div><div class='add'>+	if (pdata-&gt;mdio_driver) {</div><div class='add'>+		xgene_enet_config_ring_if_assoc(pdata);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;of_node) {</div><div class='ctx'> 		clk_prepare_enable(pdata-&gt;clk);</div><div class='add'>+		udelay(5);</div><div class='ctx'> 		clk_disable_unprepare(pdata-&gt;clk);</div><div class='add'>+		udelay(5);</div><div class='ctx'> 		clk_prepare_enable(pdata-&gt;clk);</div><div class='del'>-		xgene_enet_ecc_init(pdata);</div><div class='add'>+		udelay(5);</div><div class='add'>+	} else {</div><div class='add'>+#ifdef CONFIG_ACPI</div><div class='add'>+		acpi_status status;</div><div class='add'>+</div><div class='add'>+		status = acpi_evaluate_object(ACPI_HANDLE(&amp;pdata-&gt;pdev-&gt;dev),</div><div class='add'>+					      "_RST", NULL, NULL);</div><div class='add'>+		if (ACPI_FAILURE(status)) {</div><div class='add'>+			acpi_evaluate_object(ACPI_HANDLE(&amp;pdata-&gt;pdev-&gt;dev),</div><div class='add'>+					     "_INI", NULL, NULL);</div><div class='add'>+		}</div><div class='add'>+#endif</div><div class='ctx'> 	}</div><div class='del'>-	xgene_enet_config_ring_if_assoc(pdata);</div><div class='ctx'> </div><div class='del'>-	/* Enable auto-incr for scanning */</div><div class='del'>-	xgene_enet_rd_mcx_mac(pdata, MII_MGMT_CONFIG_ADDR, &amp;val);</div><div class='del'>-	val |= SCAN_AUTO_INCR;</div><div class='del'>-	MGMT_CLOCK_SEL_SET(&amp;val, 1);</div><div class='del'>-	xgene_enet_wr_mcx_mac(pdata, MII_MGMT_CONFIG_ADDR, val);</div><div class='add'>+	xgene_enet_ecc_init(pdata);</div><div class='add'>+	xgene_enet_config_ring_if_assoc(pdata);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xgene_gport_shutdown(struct xgene_enet_pdata *pdata)</div><div class='add'>+static void xgene_enet_clear(struct xgene_enet_pdata *pdata,</div><div class='add'>+			     struct xgene_enet_desc_ring *ring)</div><div class='ctx'> {</div><div class='del'>-	if (!IS_ERR(pdata-&gt;clk))</div><div class='del'>-		clk_disable_unprepare(pdata-&gt;clk);</div><div class='add'>+	u32 addr, data;</div><div class='add'>+</div><div class='add'>+	if (xgene_enet_is_bufpool(ring-&gt;id)) {</div><div class='add'>+		addr = ENET_CFGSSQMIFPRESET_ADDR;</div><div class='add'>+		data = BIT(xgene_enet_get_fpsel(ring-&gt;id));</div><div class='add'>+	} else {</div><div class='add'>+		addr = ENET_CFGSSQMIWQRESET_ADDR;</div><div class='add'>+		data = BIT(xgene_enet_ring_bufnum(ring-&gt;id));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	xgene_enet_wr_ring_if(pdata, addr, data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgene_enet_mdio_read(struct mii_bus *bus, int mii_id, int regnum)</div><div class='add'>+static void xgene_gport_shutdown(struct xgene_enet_pdata *pdata)</div><div class='ctx'> {</div><div class='del'>-	struct xgene_enet_pdata *pdata = bus-&gt;priv;</div><div class='del'>-	u32 val;</div><div class='del'>-</div><div class='del'>-	val = xgene_mii_phy_read(pdata, mii_id, regnum);</div><div class='del'>-	netdev_dbg(pdata-&gt;ndev, "mdio_rd: bus=%d reg=%d val=%x\n",</div><div class='del'>-		   mii_id, regnum, val);</div><div class='add'>+	struct device *dev = &amp;pdata-&gt;pdev-&gt;dev;</div><div class='ctx'> </div><div class='del'>-	return val;</div><div class='add'>+	if (dev-&gt;of_node) {</div><div class='add'>+		if (!IS_ERR(pdata-&gt;clk))</div><div class='add'>+			clk_disable_unprepare(pdata-&gt;clk);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgene_enet_mdio_write(struct mii_bus *bus, int mii_id, int regnum,</div><div class='del'>-				 u16 val)</div><div class='add'>+static u32 xgene_enet_flowctrl_cfg(struct net_device *ndev)</div><div class='ctx'> {</div><div class='del'>-	struct xgene_enet_pdata *pdata = bus-&gt;priv;</div><div class='add'>+	struct xgene_enet_pdata *pdata = netdev_priv(ndev);</div><div class='add'>+	struct phy_device *phydev = ndev-&gt;phydev;</div><div class='add'>+	u16 lcladv, rmtadv = 0;</div><div class='add'>+	u32 rx_pause, tx_pause;</div><div class='add'>+	u8 flowctl = 0;</div><div class='add'>+</div><div class='add'>+	if (!phydev-&gt;duplex || !pdata-&gt;pause_autoneg)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;tx_pause)</div><div class='add'>+		flowctl |= FLOW_CTRL_TX;</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;rx_pause)</div><div class='add'>+		flowctl |= FLOW_CTRL_RX;</div><div class='add'>+</div><div class='add'>+	lcladv = mii_advertise_flowctrl(flowctl);</div><div class='ctx'> </div><div class='del'>-	netdev_dbg(pdata-&gt;ndev, "mdio_wr: bus=%d reg=%d val=%x\n",</div><div class='del'>-		   mii_id, regnum, val);</div><div class='del'>-	return xgene_mii_phy_write(pdata, mii_id, regnum, val);</div><div class='add'>+	if (phydev-&gt;pause)</div><div class='add'>+		rmtadv = LPA_PAUSE_CAP;</div><div class='add'>+</div><div class='add'>+	if (phydev-&gt;asym_pause)</div><div class='add'>+		rmtadv |= LPA_PAUSE_ASYM;</div><div class='add'>+</div><div class='add'>+	flowctl = mii_resolve_flowctrl_fdx(lcladv, rmtadv);</div><div class='add'>+	tx_pause = !!(flowctl &amp; FLOW_CTRL_TX);</div><div class='add'>+	rx_pause = !!(flowctl &amp; FLOW_CTRL_RX);</div><div class='add'>+</div><div class='add'>+	if (tx_pause != pdata-&gt;tx_pause) {</div><div class='add'>+		pdata-&gt;tx_pause = tx_pause;</div><div class='add'>+		pdata-&gt;mac_ops-&gt;flowctl_tx(pdata, pdata-&gt;tx_pause);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rx_pause != pdata-&gt;rx_pause) {</div><div class='add'>+		pdata-&gt;rx_pause = rx_pause;</div><div class='add'>+		pdata-&gt;mac_ops-&gt;flowctl_rx(pdata, pdata-&gt;rx_pause);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgene_enet_adjust_link(struct net_device *ndev)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgene_enet_pdata *pdata = netdev_priv(ndev);</div><div class='del'>-	struct phy_device *phydev = pdata-&gt;phy_dev;</div><div class='add'>+	const struct xgene_mac_ops *mac_ops = pdata-&gt;mac_ops;</div><div class='add'>+	struct phy_device *phydev = ndev-&gt;phydev;</div><div class='ctx'> </div><div class='ctx'> 	if (phydev-&gt;link) {</div><div class='ctx'> 		if (pdata-&gt;phy_speed != phydev-&gt;speed) {</div><div class='ctx'> 			pdata-&gt;phy_speed = phydev-&gt;speed;</div><div class='del'>-			xgene_gmac_init(pdata);</div><div class='del'>-			xgene_gmac_rx_enable(pdata);</div><div class='del'>-			xgene_gmac_tx_enable(pdata);</div><div class='add'>+			mac_ops-&gt;set_speed(pdata);</div><div class='add'>+			mac_ops-&gt;rx_enable(pdata);</div><div class='add'>+			mac_ops-&gt;tx_enable(pdata);</div><div class='ctx'> 			phy_print_status(phydev);</div><div class='ctx'> 		}</div><div class='add'>+</div><div class='add'>+		xgene_enet_flowctrl_cfg(ndev);</div><div class='ctx'> 	} else {</div><div class='del'>-		xgene_gmac_rx_disable(pdata);</div><div class='del'>-		xgene_gmac_tx_disable(pdata);</div><div class='add'>+		mac_ops-&gt;rx_disable(pdata);</div><div class='add'>+		mac_ops-&gt;tx_disable(pdata);</div><div class='ctx'> 		pdata-&gt;phy_speed = SPEED_UNKNOWN;</div><div class='ctx'> 		phy_print_status(phydev);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgene_enet_phy_connect(struct net_device *ndev)</div><div class='add'>+#ifdef CONFIG_ACPI</div><div class='add'>+static struct acpi_device *acpi_phy_find_device(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct fwnode_reference_args args;</div><div class='add'>+	struct fwnode_handle *fw_node;</div><div class='add'>+	int status;</div><div class='add'>+</div><div class='add'>+	fw_node = acpi_fwnode_handle(ACPI_COMPANION(dev));</div><div class='add'>+	status = acpi_node_get_property_reference(fw_node, "phy-handle", 0,</div><div class='add'>+						  &amp;args);</div><div class='add'>+	if (ACPI_FAILURE(status) || !is_acpi_device_node(args.fwnode)) {</div><div class='add'>+		dev_dbg(dev, "No matching phy in ACPI table\n");</div><div class='add'>+		return NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return to_acpi_device_node(args.fwnode);</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+int xgene_enet_phy_connect(struct net_device *ndev)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgene_enet_pdata *pdata = netdev_priv(ndev);</div><div class='del'>-	struct device_node *phy_np;</div><div class='add'>+	struct device_node *np;</div><div class='ctx'> 	struct phy_device *phy_dev;</div><div class='ctx'> 	struct device *dev = &amp;pdata-&gt;pdev-&gt;dev;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;of_node) {</div><div class='del'>-		phy_np = of_parse_phandle(dev-&gt;of_node, "phy-handle", 0);</div><div class='del'>-		if (!phy_np) {</div><div class='del'>-			netdev_dbg(ndev, "No phy-handle found in DT\n");</div><div class='del'>-			return -ENODEV;</div><div class='add'>+		for (i = 0 ; i &lt; 2; i++) {</div><div class='add'>+			np = of_parse_phandle(dev-&gt;of_node, "phy-handle", i);</div><div class='add'>+			phy_dev = of_phy_connect(ndev, np,</div><div class='add'>+						 &amp;xgene_enet_adjust_link,</div><div class='add'>+						 0, pdata-&gt;phy_mode);</div><div class='add'>+			of_node_put(np);</div><div class='add'>+			if (phy_dev)</div><div class='add'>+				break;</div><div class='ctx'> 		}</div><div class='del'>-		pdata-&gt;phy_dev = of_phy_find_device(phy_np);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	phy_dev = pdata-&gt;phy_dev;</div><div class='ctx'> </div><div class='del'>-	if (!phy_dev ||</div><div class='del'>-	    phy_connect_direct(ndev, phy_dev, &amp;xgene_enet_adjust_link,</div><div class='del'>-			       pdata-&gt;phy_mode)) {</div><div class='del'>-		netdev_err(ndev, "Could not connect to PHY\n");</div><div class='del'>-		return  -ENODEV;</div><div class='add'>+		if (!phy_dev) {</div><div class='add'>+			netdev_err(ndev, "Could not connect to PHY\n");</div><div class='add'>+			return -ENODEV;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+#ifdef CONFIG_ACPI</div><div class='add'>+		struct acpi_device *adev = acpi_phy_find_device(dev);</div><div class='add'>+		if (adev)</div><div class='add'>+			phy_dev = adev-&gt;driver_data;</div><div class='add'>+		else</div><div class='add'>+			phy_dev = NULL;</div><div class='add'>+</div><div class='add'>+		if (!phy_dev ||</div><div class='add'>+		    phy_connect_direct(ndev, phy_dev, &amp;xgene_enet_adjust_link,</div><div class='add'>+				       pdata-&gt;phy_mode)) {</div><div class='add'>+			netdev_err(ndev, "Could not connect to PHY\n");</div><div class='add'>+			return  -ENODEV;</div><div class='add'>+		}</div><div class='add'>+#else</div><div class='add'>+		return -ENODEV;</div><div class='add'>+#endif</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	pdata-&gt;phy_speed = SPEED_UNKNOWN;</div><div class='del'>-	phy_dev-&gt;supported &amp;= ~SUPPORTED_10baseT_Half &amp;</div><div class='del'>-			      ~SUPPORTED_100baseT_Half &amp;</div><div class='del'>-			      ~SUPPORTED_1000baseT_Half;</div><div class='del'>-	phy_dev-&gt;advertising = phy_dev-&gt;supported;</div><div class='add'>+	phy_remove_link_mode(phy_dev, ETHTOOL_LINK_MODE_10baseT_Half_BIT);</div><div class='add'>+	phy_remove_link_mode(phy_dev, ETHTOOL_LINK_MODE_100baseT_Half_BIT);</div><div class='add'>+	phy_remove_link_mode(phy_dev, ETHTOOL_LINK_MODE_1000baseT_Half_BIT);</div><div class='add'>+	phy_support_asym_pause(phy_dev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -718,8 +893,8 @@ static int xgene_mdiobus_register(struct xgene_enet_pdata *pdata,</div><div class='ctx'> 	struct phy_device *phy;</div><div class='ctx'> 	struct device_node *child_np;</div><div class='ctx'> 	struct device_node *mdio_np = NULL;</div><div class='add'>+	u32 phy_addr;</div><div class='ctx'> 	int ret;</div><div class='del'>-	u32 phy_id;</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;of_node) {</div><div class='ctx'> 		for_each_child_of_node(dev-&gt;of_node, child_np) {</div><div class='hunk'>@@ -746,22 +921,16 @@ static int xgene_mdiobus_register(struct xgene_enet_pdata *pdata,</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='ctx'> </div><div class='del'>-	ret = device_property_read_u32(dev, "phy-channel", &amp;phy_id);</div><div class='add'>+	ret = device_property_read_u32(dev, "phy-channel", &amp;phy_addr);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		ret = device_property_read_u32(dev, "phy-addr", &amp;phy_id);</div><div class='add'>+		ret = device_property_read_u32(dev, "phy-addr", &amp;phy_addr);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> </div><div class='del'>-	phy = get_phy_device(mdio, phy_id, false);</div><div class='del'>-	if (!phy || IS_ERR(phy))</div><div class='add'>+	phy = xgene_enet_phy_register(mdio, phy_addr);</div><div class='add'>+	if (!phy)</div><div class='ctx'> 		return -EIO;</div><div class='ctx'> </div><div class='del'>-	ret = phy_device_register(phy);</div><div class='del'>-	if (ret)</div><div class='del'>-		phy_device_free(phy);</div><div class='del'>-	else</div><div class='del'>-		pdata-&gt;phy_dev = phy;</div><div class='del'>-</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -776,13 +945,13 @@ int xgene_enet_mdio_config(struct xgene_enet_pdata *pdata)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='ctx'> 	mdio_bus-&gt;name = "APM X-Gene MDIO bus";</div><div class='del'>-	mdio_bus-&gt;read = xgene_enet_mdio_read;</div><div class='del'>-	mdio_bus-&gt;write = xgene_enet_mdio_write;</div><div class='add'>+	mdio_bus-&gt;read = xgene_mdio_rgmii_read;</div><div class='add'>+	mdio_bus-&gt;write = xgene_mdio_rgmii_write;</div><div class='ctx'> 	snprintf(mdio_bus-&gt;id, MII_BUS_ID_SIZE, "%s-%s", "xgene-mii",</div><div class='ctx'> 		 ndev-&gt;name);</div><div class='ctx'> </div><div class='del'>-	mdio_bus-&gt;priv = pdata;</div><div class='del'>-	mdio_bus-&gt;parent = &amp;ndev-&gt;dev;</div><div class='add'>+	mdio_bus-&gt;priv = (void __force *)pdata-&gt;mcx_mac_addr;</div><div class='add'>+	mdio_bus-&gt;parent = &amp;pdata-&gt;pdev-&gt;dev;</div><div class='ctx'> </div><div class='ctx'> 	ret = xgene_mdiobus_register(pdata, mdio_bus);</div><div class='ctx'> 	if (ret) {</div><div class='hunk'>@@ -799,25 +968,45 @@ int xgene_enet_mdio_config(struct xgene_enet_pdata *pdata)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+void xgene_enet_phy_disconnect(struct xgene_enet_pdata *pdata)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = pdata-&gt;ndev;</div><div class='add'>+</div><div class='add'>+	if (ndev-&gt;phydev)</div><div class='add'>+		phy_disconnect(ndev-&gt;phydev);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> void xgene_enet_mdio_remove(struct xgene_enet_pdata *pdata)</div><div class='ctx'> {</div><div class='add'>+	struct net_device *ndev = pdata-&gt;ndev;</div><div class='add'>+</div><div class='add'>+	if (ndev-&gt;phydev)</div><div class='add'>+		phy_disconnect(ndev-&gt;phydev);</div><div class='add'>+</div><div class='ctx'> 	mdiobus_unregister(pdata-&gt;mdio_bus);</div><div class='ctx'> 	mdiobus_free(pdata-&gt;mdio_bus);</div><div class='ctx'> 	pdata-&gt;mdio_bus = NULL;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct xgene_mac_ops xgene_gmac_ops = {</div><div class='add'>+const struct xgene_mac_ops xgene_gmac_ops = {</div><div class='ctx'> 	.init = xgene_gmac_init,</div><div class='ctx'> 	.reset = xgene_gmac_reset,</div><div class='ctx'> 	.rx_enable = xgene_gmac_rx_enable,</div><div class='ctx'> 	.tx_enable = xgene_gmac_tx_enable,</div><div class='ctx'> 	.rx_disable = xgene_gmac_rx_disable,</div><div class='ctx'> 	.tx_disable = xgene_gmac_tx_disable,</div><div class='add'>+	.get_drop_cnt = xgene_gmac_get_drop_cnt,</div><div class='add'>+	.set_speed = xgene_gmac_set_speed,</div><div class='ctx'> 	.set_mac_addr = xgene_gmac_set_mac_addr,</div><div class='add'>+	.set_framesize = xgene_enet_set_frame_size,</div><div class='add'>+	.enable_tx_pause = xgene_gmac_enable_tx_pause,</div><div class='add'>+	.flowctl_tx     = xgene_gmac_flowctl_tx,</div><div class='add'>+	.flowctl_rx     = xgene_gmac_flowctl_rx,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct xgene_port_ops xgene_gport_ops = {</div><div class='add'>+const struct xgene_port_ops xgene_gport_ops = {</div><div class='ctx'> 	.reset = xgene_enet_reset,</div><div class='add'>+	.clear = xgene_enet_clear,</div><div class='ctx'> 	.cle_bypass = xgene_enet_cle_bypass,</div><div class='ctx'> 	.shutdown = xgene_gport_shutdown,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/ethernet/apm/xgene/xgene_enet_hw.h b/drivers/net/ethernet/apm/xgene/xgene_enet_hw.h<br/>index 541bed056012..2f534f9d4416 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene/xgene_enet_hw.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene/xgene_enet_hw.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene/xgene_enet_hw.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apm/xgene/xgene_enet_hw.h</a></div><div class='hunk'>@@ -1,22 +1,10 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='ctx'> /* Applied Micro X-Gene SoC Ethernet Driver</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (c) 2014, Applied Micro Circuits Corporation</div><div class='ctx'>  * Authors: Iyappan Subramanian &lt;isubramanian@apm.com&gt;</div><div class='ctx'>  *	    Ravi Patel &lt;rapatel@apm.com&gt;</div><div class='ctx'>  *	    Keyur Chudgar &lt;kchudgar@apm.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute  it and/or modify it</div><div class='del'>- * under  the terms of  the GNU General  Public License as published by the</div><div class='del'>- * Free Software Foundation;  either version 2 of the  License, or (at your</div><div class='del'>- * option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef __XGENE_ENET_HW_H__</div><div class='hunk'>@@ -54,6 +42,13 @@ enum xgene_enet_rm {</div><div class='ctx'> #define IS_BUFFER_POOL		BIT(20)</div><div class='ctx'> #define PREFETCH_BUF_EN		BIT(21)</div><div class='ctx'> #define CSR_RING_ID_BUF		0x000c</div><div class='add'>+#define CSR_PBM_COAL		0x0014</div><div class='add'>+#define CSR_PBM_CTICK0		0x0018</div><div class='add'>+#define CSR_PBM_CTICK1		0x001c</div><div class='add'>+#define CSR_PBM_CTICK2		0x0020</div><div class='add'>+#define CSR_PBM_CTICK3		0x0024</div><div class='add'>+#define CSR_THRESHOLD0_SET1	0x0030</div><div class='add'>+#define CSR_THRESHOLD1_SET1	0x0034</div><div class='ctx'> #define CSR_RING_NE_INT_MODE	0x017c</div><div class='ctx'> #define CSR_RING_CONFIG		0x006c</div><div class='ctx'> #define CSR_RING_WR_BASE	0x0070</div><div class='hunk'>@@ -81,7 +76,7 @@ enum xgene_enet_rm {</div><div class='ctx'> #define RINGADDRL_POS		5</div><div class='ctx'> #define RINGADDRL_LEN		27</div><div class='ctx'> #define RINGADDRH_POS		0</div><div class='del'>-#define RINGADDRH_LEN		6</div><div class='add'>+#define RINGADDRH_LEN		7</div><div class='ctx'> #define RINGSIZE_POS		23</div><div class='ctx'> #define RINGSIZE_LEN		3</div><div class='ctx'> #define RINGTYPE_POS		19</div><div class='hunk'>@@ -89,9 +84,9 @@ enum xgene_enet_rm {</div><div class='ctx'> #define RINGMODE_POS		20</div><div class='ctx'> #define RINGMODE_LEN		3</div><div class='ctx'> #define RECOMTIMEOUTL_POS	28</div><div class='del'>-#define RECOMTIMEOUTL_LEN	3</div><div class='add'>+#define RECOMTIMEOUTL_LEN	4</div><div class='ctx'> #define RECOMTIMEOUTH_POS	0</div><div class='del'>-#define RECOMTIMEOUTH_LEN	2</div><div class='add'>+#define RECOMTIMEOUTH_LEN	3</div><div class='ctx'> #define NUMMSGSINQ_POS		1</div><div class='ctx'> #define NUMMSGSINQ_LEN		16</div><div class='ctx'> #define ACCEPTLERR		BIT(19)</div><div class='hunk'>@@ -99,12 +94,16 @@ enum xgene_enet_rm {</div><div class='ctx'> #define RECOMBBUF		BIT(27)</div><div class='ctx'> </div><div class='ctx'> #define MAC_OFFSET			0x30</div><div class='add'>+#define OFFSET_4			0x04</div><div class='add'>+#define OFFSET_8			0x08</div><div class='ctx'> </div><div class='ctx'> #define BLOCK_ETH_CSR_OFFSET		0x2000</div><div class='add'>+#define BLOCK_ETH_CLE_CSR_OFFSET	0x6000</div><div class='ctx'> #define BLOCK_ETH_RING_IF_OFFSET	0x9000</div><div class='ctx'> #define BLOCK_ETH_CLKRST_CSR_OFFSET	0xc000</div><div class='ctx'> #define BLOCK_ETH_DIAG_CSR_OFFSET	0xD000</div><div class='ctx'> #define BLOCK_ETH_MAC_OFFSET		0x0000</div><div class='add'>+#define BLOCK_ETH_STATS_OFFSET		0x0000</div><div class='ctx'> #define BLOCK_ETH_MAC_CSR_OFFSET	0x2800</div><div class='ctx'> </div><div class='ctx'> #define CLKEN_ADDR			0xc208</div><div class='hunk'>@@ -116,6 +115,18 @@ enum xgene_enet_rm {</div><div class='ctx'> #define MAC_READ_REG_OFFSET		0x0c</div><div class='ctx'> #define MAC_COMMAND_DONE_REG_OFFSET	0x10</div><div class='ctx'> </div><div class='add'>+#define STAT_ADDR_REG_OFFSET            0x14</div><div class='add'>+#define STAT_COMMAND_REG_OFFSET         0x18</div><div class='add'>+#define STAT_WRITE_REG_OFFSET           0x1c</div><div class='add'>+#define STAT_READ_REG_OFFSET            0x20</div><div class='add'>+#define STAT_COMMAND_DONE_REG_OFFSET    0x24</div><div class='add'>+</div><div class='add'>+#define PCS_ADDR_REG_OFFSET		0x00</div><div class='add'>+#define PCS_COMMAND_REG_OFFSET		0x04</div><div class='add'>+#define PCS_WRITE_REG_OFFSET		0x08</div><div class='add'>+#define PCS_READ_REG_OFFSET		0x0c</div><div class='add'>+#define PCS_COMMAND_DONE_REG_OFFSET	0x10</div><div class='add'>+</div><div class='ctx'> #define MII_MGMT_CONFIG_ADDR		0x20</div><div class='ctx'> #define MII_MGMT_COMMAND_ADDR		0x24</div><div class='ctx'> #define MII_MGMT_ADDRESS_ADDR		0x28</div><div class='hunk'>@@ -144,20 +155,41 @@ enum xgene_enet_rm {</div><div class='ctx'> #define CFG_BYPASS_UNISEC_RX		BIT(1)</div><div class='ctx'> #define CFG_CLE_BYPASS_EN0		BIT(31)</div><div class='ctx'> #define CFG_TXCLK_MUXSEL0_SET(dst, val)	xgene_set_bits(dst, val, 29, 3)</div><div class='add'>+#define CFG_RXCLK_MUXSEL0_SET(dst, val)	xgene_set_bits(dst, val, 26, 3)</div><div class='ctx'> </div><div class='ctx'> #define CFG_CLE_IP_PROTOCOL0_SET(dst, val)	xgene_set_bits(dst, val, 16, 2)</div><div class='add'>+#define CFG_CLE_IP_HDR_LEN_SET(dst, val)	xgene_set_bits(dst, val, 8, 5)</div><div class='ctx'> #define CFG_CLE_DSTQID0_SET(dst, val)		xgene_set_bits(dst, val, 0, 12)</div><div class='ctx'> #define CFG_CLE_FPSEL0_SET(dst, val)		xgene_set_bits(dst, val, 16, 4)</div><div class='add'>+#define CFG_CLE_NXTFPSEL0_SET(dst, val)		xgene_set_bits(dst, val, 20, 4)</div><div class='ctx'> #define CFG_MACMODE_SET(dst, val)		xgene_set_bits(dst, val, 18, 2)</div><div class='ctx'> #define CFG_WAITASYNCRD_SET(dst, val)		xgene_set_bits(dst, val, 0, 16)</div><div class='del'>-#define CFG_CLE_DSTQID0(val)		(val &amp; GENMASK(11, 0))</div><div class='del'>-#define CFG_CLE_FPSEL0(val)		((val &lt;&lt; 16) &amp; GENMASK(19, 16))</div><div class='add'>+#define CFG_CLE_DSTQID0(val)		((val) &amp; GENMASK(11, 0))</div><div class='add'>+#define CFG_CLE_FPSEL0(val)		(((val) &lt;&lt; 16) &amp; GENMASK(19, 16))</div><div class='add'>+#define CSR_ECM_CFG_0_ADDR		0x0220</div><div class='add'>+#define CSR_ECM_CFG_1_ADDR		0x0224</div><div class='add'>+#define CSR_MULTI_DPF0_ADDR		0x0230</div><div class='add'>+#define RXBUF_PAUSE_THRESH		0x0534</div><div class='add'>+#define RXBUF_PAUSE_OFF_THRESH		0x0540</div><div class='add'>+#define DEF_PAUSE_THRES			0x7d</div><div class='add'>+#define DEF_PAUSE_OFF_THRES		0x6d</div><div class='add'>+#define DEF_QUANTA			0x8000</div><div class='add'>+#define NORM_PAUSE_OPCODE		0x0001</div><div class='add'>+#define PAUSE_XON_EN			BIT(30)</div><div class='add'>+#define MULTI_DPF_AUTOCTRL		BIT(28)</div><div class='add'>+#define CFG_CLE_NXTFPSEL0(val)		(((val) &lt;&lt; 20) &amp; GENMASK(23, 20))</div><div class='ctx'> #define ICM_CONFIG0_REG_0_ADDR		0x0400</div><div class='ctx'> #define ICM_CONFIG2_REG_0_ADDR		0x0410</div><div class='add'>+#define ECM_CONFIG0_REG_0_ADDR		0x0500</div><div class='add'>+#define ECM_CONFIG0_REG_1_ADDR		0x0504</div><div class='add'>+#define ICM_ECM_DROP_COUNT_REG0_ADDR	0x0508</div><div class='add'>+#define ICM_ECM_DROP_COUNT_REG1_ADDR	0x050c</div><div class='ctx'> #define RX_DV_GATE_REG_0_ADDR		0x05fc</div><div class='ctx'> #define TX_DV_GATE_EN0			BIT(2)</div><div class='ctx'> #define RX_DV_GATE_EN0			BIT(1)</div><div class='ctx'> #define RESUME_RX0			BIT(0)</div><div class='add'>+#define ENET_CFGSSQMIFPRESET_ADDR		0x14</div><div class='add'>+#define ENET_CFGSSQMIWQRESET_ADDR		0x1c</div><div class='ctx'> #define ENET_CFGSSQMIWQASSOC_ADDR		0xe0</div><div class='ctx'> #define ENET_CFGSSQMIFPQASSOC_ADDR		0xdc</div><div class='ctx'> #define ENET_CFGSSQMIQMLITEFPQASSOC_ADDR	0xf0</div><div class='hunk'>@@ -177,15 +209,60 @@ enum xgene_enet_rm {</div><div class='ctx'> #define SOFT_RESET1			BIT(31)</div><div class='ctx'> #define TX_EN				BIT(0)</div><div class='ctx'> #define RX_EN				BIT(2)</div><div class='add'>+#define TX_FLOW_EN			BIT(4)</div><div class='add'>+#define RX_FLOW_EN			BIT(5)</div><div class='ctx'> #define ENET_LHD_MODE			BIT(25)</div><div class='ctx'> #define ENET_GHD_MODE			BIT(26)</div><div class='ctx'> #define FULL_DUPLEX2			BIT(0)</div><div class='del'>-#define SCAN_AUTO_INCR			BIT(5)</div><div class='del'>-#define TBYT_ADDR			0x38</div><div class='del'>-#define TPKT_ADDR			0x39</div><div class='del'>-#define TDRP_ADDR			0x45</div><div class='del'>-#define TFCS_ADDR			0x47</div><div class='del'>-#define TUND_ADDR			0x4a</div><div class='add'>+#define PAD_CRC				BIT(2)</div><div class='add'>+#define LENGTH_CHK			BIT(4)</div><div class='add'>+</div><div class='add'>+#define TR64_ADDR	0x20</div><div class='add'>+#define TR127_ADDR	0x21</div><div class='add'>+#define TR255_ADDR	0x22</div><div class='add'>+#define TR511_ADDR	0x23</div><div class='add'>+#define TR1K_ADDR	0x24</div><div class='add'>+#define TRMAX_ADDR	0x25</div><div class='add'>+#define TRMGV_ADDR	0x26</div><div class='add'>+</div><div class='add'>+#define RFCS_ADDR	0x29</div><div class='add'>+#define RMCA_ADDR	0x2a</div><div class='add'>+#define RBCA_ADDR	0x2b</div><div class='add'>+#define RXCF_ADDR	0x2c</div><div class='add'>+#define RXPF_ADDR	0x2d</div><div class='add'>+#define RXUO_ADDR	0x2e</div><div class='add'>+#define RALN_ADDR	0x2f</div><div class='add'>+#define RFLR_ADDR	0x30</div><div class='add'>+#define RCDE_ADDR	0x31</div><div class='add'>+#define RCSE_ADDR	0x32</div><div class='add'>+#define RUND_ADDR	0x33</div><div class='add'>+#define ROVR_ADDR	0x34</div><div class='add'>+#define RFRG_ADDR	0x35</div><div class='add'>+#define RJBR_ADDR	0x36</div><div class='add'>+#define RDRP_ADDR	0x37</div><div class='add'>+</div><div class='add'>+#define TMCA_ADDR	0x3a</div><div class='add'>+#define TBCA_ADDR	0x3b</div><div class='add'>+#define TXPF_ADDR	0x3c</div><div class='add'>+#define TDFR_ADDR	0x3d</div><div class='add'>+#define TEDF_ADDR	0x3e</div><div class='add'>+#define TSCL_ADDR	0x3f</div><div class='add'>+#define TMCL_ADDR	0x40</div><div class='add'>+#define TLCL_ADDR	0x41</div><div class='add'>+#define TXCL_ADDR	0x42</div><div class='add'>+#define TNCL_ADDR	0x43</div><div class='add'>+#define TPFH_ADDR	0x44</div><div class='add'>+#define TDRP_ADDR	0x45</div><div class='add'>+#define TJBR_ADDR	0x46</div><div class='add'>+#define TFCS_ADDR	0x47</div><div class='add'>+#define TXCF_ADDR	0x48</div><div class='add'>+#define TOVR_ADDR	0x49</div><div class='add'>+#define TUND_ADDR	0x4a</div><div class='add'>+#define TFRG_ADDR	0x4b</div><div class='add'>+#define DUMP_ADDR	0x27</div><div class='add'>+</div><div class='add'>+#define ECM_DROP_COUNT(src)	xgene_get_bits(src, 0, 15)</div><div class='add'>+#define ICM_DROP_COUNT(src)	xgene_get_bits(src, 16, 31)</div><div class='ctx'> </div><div class='ctx'> #define TSO_IPPROTO_TCP			1</div><div class='ctx'> </div><div class='hunk'>@@ -193,12 +270,18 @@ enum xgene_enet_rm {</div><div class='ctx'> #define USERINFO_LEN			32</div><div class='ctx'> #define FPQNUM_POS			32</div><div class='ctx'> #define FPQNUM_LEN			12</div><div class='add'>+#define ELERR_POS                       46</div><div class='add'>+#define ELERR_LEN                       2</div><div class='add'>+#define NV_POS				50</div><div class='add'>+#define NV_LEN				1</div><div class='add'>+#define LL_POS				51</div><div class='add'>+#define LL_LEN				1</div><div class='ctx'> #define LERR_POS			60</div><div class='ctx'> #define LERR_LEN			3</div><div class='ctx'> #define STASH_POS			52</div><div class='ctx'> #define STASH_LEN			2</div><div class='ctx'> #define BUFDATALEN_POS			48</div><div class='del'>-#define BUFDATALEN_LEN			12</div><div class='add'>+#define BUFDATALEN_LEN			15</div><div class='ctx'> #define DATAADDR_POS			0</div><div class='ctx'> #define DATAADDR_LEN			42</div><div class='ctx'> #define COHERENT_POS			63</div><div class='hunk'>@@ -213,11 +296,28 @@ enum xgene_enet_rm {</div><div class='ctx'> #define TCPHDR_LEN			6</div><div class='ctx'> #define IPHDR_POS			6</div><div class='ctx'> #define IPHDR_LEN			6</div><div class='add'>+#define MSS_POS				20</div><div class='add'>+#define MSS_LEN				2</div><div class='ctx'> #define EC_POS				22	/* Enable checksum */</div><div class='ctx'> #define EC_LEN				1</div><div class='add'>+#define ET_POS				23	/* Enable TSO */</div><div class='ctx'> #define IS_POS				24	/* IP protocol select */</div><div class='ctx'> #define IS_LEN				1</div><div class='ctx'> #define TYPE_ETH_WORK_MESSAGE_POS	44</div><div class='add'>+#define LL_BYTES_MSB_POS		56</div><div class='add'>+#define LL_BYTES_MSB_LEN		8</div><div class='add'>+#define LL_BYTES_LSB_POS		48</div><div class='add'>+#define LL_BYTES_LSB_LEN		12</div><div class='add'>+#define LL_LEN_POS			48</div><div class='add'>+#define LL_LEN_LEN			8</div><div class='add'>+#define DATALEN_MASK			GENMASK(11, 0)</div><div class='add'>+</div><div class='add'>+#define LAST_BUFFER			(0x7800ULL &lt;&lt; BUFDATALEN_POS)</div><div class='add'>+</div><div class='add'>+#define TSO_MSS0_POS			0</div><div class='add'>+#define TSO_MSS0_LEN			14</div><div class='add'>+#define TSO_MSS1_POS			16</div><div class='add'>+#define TSO_MSS1_LEN			14</div><div class='ctx'> </div><div class='ctx'> struct xgene_enet_raw_desc {</div><div class='ctx'> 	__le64 m0;</div><div class='hunk'>@@ -273,11 +373,6 @@ enum xgene_enet_ring_bufnum {</div><div class='ctx'> 	RING_BUFNUM_INVALID</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-enum xgene_enet_cmd {</div><div class='del'>-	XGENE_ENET_WR_CMD = BIT(31),</div><div class='del'>-	XGENE_ENET_RD_CMD = BIT(30)</div><div class='del'>-};</div><div class='del'>-</div><div class='ctx'> enum xgene_enet_err_code {</div><div class='ctx'> 	HBF_READ_DATA = 3,</div><div class='ctx'> 	HBF_LL_READ = 4,</div><div class='hunk'>@@ -308,6 +403,14 @@ static inline bool xgene_enet_is_bufpool(u16 id)</div><div class='ctx'> 	return ((id &amp; RING_BUFNUM_MASK) &gt;= 0x20) ? true : false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static inline u8 xgene_enet_get_fpsel(u16 id)</div><div class='add'>+{</div><div class='add'>+	if (xgene_enet_is_bufpool(id))</div><div class='add'>+		return xgene_enet_ring_bufnum(id) - RING_BUFNUM_BUFPOOL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static inline u16 xgene_enet_get_numslots(u16 id, u32 size)</div><div class='ctx'> {</div><div class='ctx'> 	bool is_bufpool = xgene_enet_is_bufpool(id);</div><div class='hunk'>@@ -317,15 +420,19 @@ static inline u16 xgene_enet_get_numslots(u16 id, u32 size)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void xgene_enet_parse_error(struct xgene_enet_desc_ring *ring,</div><div class='del'>-			    struct xgene_enet_pdata *pdata,</div><div class='ctx'> 			    enum xgene_enet_err_code status);</div><div class='del'>-</div><div class='ctx'> int xgene_enet_mdio_config(struct xgene_enet_pdata *pdata);</div><div class='ctx'> void xgene_enet_mdio_remove(struct xgene_enet_pdata *pdata);</div><div class='ctx'> bool xgene_ring_mgr_init(struct xgene_enet_pdata *p);</div><div class='del'>-</div><div class='del'>-extern struct xgene_mac_ops xgene_gmac_ops;</div><div class='del'>-extern struct xgene_port_ops xgene_gport_ops;</div><div class='add'>+int xgene_enet_phy_connect(struct net_device *ndev);</div><div class='add'>+void xgene_enet_phy_disconnect(struct xgene_enet_pdata *pdata);</div><div class='add'>+u32 xgene_enet_rd_mac(struct xgene_enet_pdata *pdata, u32 rd_addr);</div><div class='add'>+void xgene_enet_wr_mac(struct xgene_enet_pdata *pdata, u32 wr_addr,</div><div class='add'>+		       u32 wr_data);</div><div class='add'>+u32 xgene_enet_rd_stat(struct xgene_enet_pdata *pdata, u32 rd_addr);</div><div class='add'>+</div><div class='add'>+extern const struct xgene_mac_ops xgene_gmac_ops;</div><div class='add'>+extern const struct xgene_port_ops xgene_gport_ops;</div><div class='ctx'> extern struct xgene_ring_ops xgene_ring1_ops;</div><div class='ctx'> </div><div class='ctx'> #endif /* __XGENE_ENET_HW_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/apm/xgene/xgene_enet_main.c b/drivers/net/ethernet/apm/xgene/xgene_enet_main.c<br/>index 299eb4315fe6..3b2951030a38 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene/xgene_enet_main.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene/xgene_enet_main.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene/xgene_enet_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apm/xgene/xgene_enet_main.c</a></div><div class='hunk'>@@ -1,24 +1,13 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='ctx'> /* Applied Micro X-Gene SoC Ethernet Driver</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (c) 2014, Applied Micro Circuits Corporation</div><div class='ctx'>  * Authors: Iyappan Subramanian &lt;isubramanian@apm.com&gt;</div><div class='ctx'>  *	    Ravi Patel &lt;rapatel@apm.com&gt;</div><div class='ctx'>  *	    Keyur Chudgar &lt;kchudgar@apm.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute  it and/or modify it</div><div class='del'>- * under  the terms of  the GNU General  Public License as published by the</div><div class='del'>- * Free Software Foundation;  either version 2 of the  License, or (at your</div><div class='del'>- * option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/gpio.h&gt;</div><div class='ctx'> #include "xgene_enet_main.h"</div><div class='ctx'> #include "xgene_enet_hw.h"</div><div class='ctx'> #include "xgene_enet_sgmac.h"</div><div class='hunk'>@@ -28,14 +17,14 @@</div><div class='ctx'> #define RES_RING_CSR	1</div><div class='ctx'> #define RES_RING_CMD	2</div><div class='ctx'> </div><div class='del'>-static const struct of_device_id xgene_enet_of_match[];</div><div class='del'>-static const struct acpi_device_id xgene_enet_acpi_match[];</div><div class='del'>-</div><div class='ctx'> static void xgene_enet_init_bufpool(struct xgene_enet_desc_ring *buf_pool)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgene_enet_raw_desc16 *raw_desc;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='add'>+	if (!buf_pool)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='ctx'> 	for (i = 0; i &lt; buf_pool-&gt;slots; i++) {</div><div class='ctx'> 		raw_desc = &amp;buf_pool-&gt;raw_desc16[i];</div><div class='ctx'> </div><div class='hunk'>@@ -46,6 +35,86 @@ static void xgene_enet_init_bufpool(struct xgene_enet_desc_ring *buf_pool)</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u16 xgene_enet_get_data_len(u64 bufdatalen)</div><div class='add'>+{</div><div class='add'>+	u16 hw_len, mask;</div><div class='add'>+</div><div class='add'>+	hw_len = GET_VAL(BUFDATALEN, bufdatalen);</div><div class='add'>+</div><div class='add'>+	if (unlikely(hw_len == 0x7800)) {</div><div class='add'>+		return 0;</div><div class='add'>+	} else if (!(hw_len &amp; BIT(14))) {</div><div class='add'>+		mask = GENMASK(13, 0);</div><div class='add'>+		return (hw_len &amp; mask) ? (hw_len &amp; mask) : SIZE_16K;</div><div class='add'>+	} else if (!(hw_len &amp; GENMASK(13, 12))) {</div><div class='add'>+		mask = GENMASK(11, 0);</div><div class='add'>+		return (hw_len &amp; mask) ? (hw_len &amp; mask) : SIZE_4K;</div><div class='add'>+	} else {</div><div class='add'>+		mask = GENMASK(11, 0);</div><div class='add'>+		return (hw_len &amp; mask) ? (hw_len &amp; mask) : SIZE_2K;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 xgene_enet_set_data_len(u32 size)</div><div class='add'>+{</div><div class='add'>+	u16 hw_len;</div><div class='add'>+</div><div class='add'>+	hw_len =  (size == SIZE_4K) ? BIT(14) : 0;</div><div class='add'>+</div><div class='add'>+	return hw_len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgene_enet_refill_pagepool(struct xgene_enet_desc_ring *buf_pool,</div><div class='add'>+				      u32 nbuf)</div><div class='add'>+{</div><div class='add'>+	struct xgene_enet_raw_desc16 *raw_desc;</div><div class='add'>+	struct xgene_enet_pdata *pdata;</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	dma_addr_t dma_addr;</div><div class='add'>+	struct device *dev;</div><div class='add'>+	struct page *page;</div><div class='add'>+	u32 slots, tail;</div><div class='add'>+	u16 hw_len;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (unlikely(!buf_pool))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ndev = buf_pool-&gt;ndev;</div><div class='add'>+	pdata = netdev_priv(ndev);</div><div class='add'>+	dev = ndev_to_dev(ndev);</div><div class='add'>+	slots = buf_pool-&gt;slots - 1;</div><div class='add'>+	tail = buf_pool-&gt;tail;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; nbuf; i++) {</div><div class='add'>+		raw_desc = &amp;buf_pool-&gt;raw_desc16[tail];</div><div class='add'>+</div><div class='add'>+		page = dev_alloc_page();</div><div class='add'>+		if (unlikely(!page))</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		dma_addr = dma_map_page(dev, page, 0,</div><div class='add'>+					PAGE_SIZE, DMA_FROM_DEVICE);</div><div class='add'>+		if (unlikely(dma_mapping_error(dev, dma_addr))) {</div><div class='add'>+			put_page(page);</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		hw_len = xgene_enet_set_data_len(PAGE_SIZE);</div><div class='add'>+		raw_desc-&gt;m1 = cpu_to_le64(SET_VAL(DATAADDR, dma_addr) |</div><div class='add'>+					   SET_VAL(BUFDATALEN, hw_len) |</div><div class='add'>+					   SET_BIT(COHERENT));</div><div class='add'>+</div><div class='add'>+		buf_pool-&gt;frag_page[tail] = page;</div><div class='add'>+		tail = (tail + 1) &amp; slots;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pdata-&gt;ring_ops-&gt;wr_cmd(buf_pool, nbuf);</div><div class='add'>+	buf_pool-&gt;tail = tail;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int xgene_enet_refill_bufpool(struct xgene_enet_desc_ring *buf_pool,</div><div class='ctx'> 				     u32 nbuf)</div><div class='ctx'> {</div><div class='hunk'>@@ -63,8 +132,9 @@ static int xgene_enet_refill_bufpool(struct xgene_enet_desc_ring *buf_pool,</div><div class='ctx'> 	ndev = buf_pool-&gt;ndev;</div><div class='ctx'> 	dev = ndev_to_dev(buf_pool-&gt;ndev);</div><div class='ctx'> 	pdata = netdev_priv(ndev);</div><div class='add'>+</div><div class='ctx'> 	bufdatalen = BUF_LEN_CODE_2K | (SKB_BUFFER_SIZE &amp; GENMASK(11, 0));</div><div class='del'>-	len = XGENE_ENET_MAX_MTU;</div><div class='add'>+	len = XGENE_ENET_STD_MTU;</div><div class='ctx'> </div><div class='ctx'> 	for (i = 0; i &lt; nbuf; i++) {</div><div class='ctx'> 		raw_desc = &amp;buf_pool-&gt;raw_desc16[tail];</div><div class='hunk'>@@ -72,7 +142,6 @@ static int xgene_enet_refill_bufpool(struct xgene_enet_desc_ring *buf_pool,</div><div class='ctx'> 		skb = netdev_alloc_skb_ip_align(ndev, len);</div><div class='ctx'> 		if (unlikely(!skb))</div><div class='ctx'> 			return -ENOMEM;</div><div class='del'>-		buf_pool-&gt;rx_skb[tail] = skb;</div><div class='ctx'> </div><div class='ctx'> 		dma_addr = dma_map_single(dev, skb-&gt;data, len, DMA_FROM_DEVICE);</div><div class='ctx'> 		if (dma_mapping_error(dev, dma_addr)) {</div><div class='hunk'>@@ -81,6 +150,8 @@ static int xgene_enet_refill_bufpool(struct xgene_enet_desc_ring *buf_pool,</div><div class='ctx'> 			return -EINVAL;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='add'>+		buf_pool-&gt;rx_skb[tail] = skb;</div><div class='add'>+</div><div class='ctx'> 		raw_desc-&gt;m1 = cpu_to_le64(SET_VAL(DATAADDR, dma_addr) |</div><div class='ctx'> 					   SET_VAL(BUFDATALEN, bufdatalen) |</div><div class='ctx'> 					   SET_BIT(COHERENT));</div><div class='hunk'>@@ -93,13 +164,6 @@ static int xgene_enet_refill_bufpool(struct xgene_enet_desc_ring *buf_pool,</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u16 xgene_enet_dst_ring_num(struct xgene_enet_desc_ring *ring)</div><div class='del'>-{</div><div class='del'>-	struct xgene_enet_pdata *pdata = netdev_priv(ring-&gt;ndev);</div><div class='del'>-</div><div class='del'>-	return ((u16)pdata-&gt;rm &lt;&lt; 10) | ring-&gt;num;</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static u8 xgene_enet_hdr_len(const void *data)</div><div class='ctx'> {</div><div class='ctx'> 	const struct ethhdr *eth = data;</div><div class='hunk'>@@ -109,25 +173,41 @@ static u8 xgene_enet_hdr_len(const void *data)</div><div class='ctx'> </div><div class='ctx'> static void xgene_enet_delete_bufpool(struct xgene_enet_desc_ring *buf_pool)</div><div class='ctx'> {</div><div class='del'>-	struct xgene_enet_pdata *pdata = netdev_priv(buf_pool-&gt;ndev);</div><div class='add'>+	struct device *dev = ndev_to_dev(buf_pool-&gt;ndev);</div><div class='ctx'> 	struct xgene_enet_raw_desc16 *raw_desc;</div><div class='del'>-	u32 slots = buf_pool-&gt;slots - 1;</div><div class='del'>-	u32 tail = buf_pool-&gt;tail;</div><div class='del'>-	u32 userinfo;</div><div class='del'>-	int i, len;</div><div class='add'>+	dma_addr_t dma_addr;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	len = pdata-&gt;ring_ops-&gt;len(buf_pool);</div><div class='del'>-	for (i = 0; i &lt; len; i++) {</div><div class='del'>-		tail = (tail - 1) &amp; slots;</div><div class='del'>-		raw_desc = &amp;buf_pool-&gt;raw_desc16[tail];</div><div class='add'>+	/* Free up the buffers held by hardware */</div><div class='add'>+	for (i = 0; i &lt; buf_pool-&gt;slots; i++) {</div><div class='add'>+		if (buf_pool-&gt;rx_skb[i]) {</div><div class='add'>+			dev_kfree_skb_any(buf_pool-&gt;rx_skb[i]);</div><div class='ctx'> </div><div class='del'>-		/* Hardware stores descriptor in little endian format */</div><div class='del'>-		userinfo = GET_VAL(USERINFO, le64_to_cpu(raw_desc-&gt;m0));</div><div class='del'>-		dev_kfree_skb_any(buf_pool-&gt;rx_skb[userinfo]);</div><div class='add'>+			raw_desc = &amp;buf_pool-&gt;raw_desc16[i];</div><div class='add'>+			dma_addr = GET_VAL(DATAADDR, le64_to_cpu(raw_desc-&gt;m1));</div><div class='add'>+			dma_unmap_single(dev, dma_addr, XGENE_ENET_MAX_MTU,</div><div class='add'>+					 DMA_FROM_DEVICE);</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	pdata-&gt;ring_ops-&gt;wr_cmd(buf_pool, -len);</div><div class='del'>-	buf_pool-&gt;tail = tail;</div><div class='add'>+static void xgene_enet_delete_pagepool(struct xgene_enet_desc_ring *buf_pool)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = ndev_to_dev(buf_pool-&gt;ndev);</div><div class='add'>+	dma_addr_t dma_addr;</div><div class='add'>+	struct page *page;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Free up the buffers held by hardware */</div><div class='add'>+	for (i = 0; i &lt; buf_pool-&gt;slots; i++) {</div><div class='add'>+		page = buf_pool-&gt;frag_page[i];</div><div class='add'>+		if (page) {</div><div class='add'>+			dma_addr = buf_pool-&gt;frag_dma_addr[i];</div><div class='add'>+			dma_unmap_page(dev, dma_addr, PAGE_SIZE,</div><div class='add'>+				       DMA_FROM_DEVICE);</div><div class='add'>+			put_page(page);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static irqreturn_t xgene_enet_rx_irq(const int irq, void *data)</div><div class='hunk'>@@ -145,46 +225,96 @@ static irqreturn_t xgene_enet_rx_irq(const int irq, void *data)</div><div class='ctx'> static int xgene_enet_tx_completion(struct xgene_enet_desc_ring *cp_ring,</div><div class='ctx'> 				    struct xgene_enet_raw_desc *raw_desc)</div><div class='ctx'> {</div><div class='add'>+	struct xgene_enet_pdata *pdata = netdev_priv(cp_ring-&gt;ndev);</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='ctx'> 	struct device *dev;</div><div class='add'>+	skb_frag_t *frag;</div><div class='add'>+	dma_addr_t *frag_dma_addr;</div><div class='ctx'> 	u16 skb_index;</div><div class='add'>+	u8 mss_index;</div><div class='ctx'> 	u8 status;</div><div class='del'>-	int ret = 0;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	skb_index = GET_VAL(USERINFO, le64_to_cpu(raw_desc-&gt;m0));</div><div class='ctx'> 	skb = cp_ring-&gt;cp_skb[skb_index];</div><div class='add'>+	frag_dma_addr = &amp;cp_ring-&gt;frag_dma_addr[skb_index * MAX_SKB_FRAGS];</div><div class='ctx'> </div><div class='ctx'> 	dev = ndev_to_dev(cp_ring-&gt;ndev);</div><div class='ctx'> 	dma_unmap_single(dev, GET_VAL(DATAADDR, le64_to_cpu(raw_desc-&gt;m1)),</div><div class='del'>-			 GET_VAL(BUFDATALEN, le64_to_cpu(raw_desc-&gt;m1)),</div><div class='add'>+			 skb_headlen(skb),</div><div class='ctx'> 			 DMA_TO_DEVICE);</div><div class='ctx'> </div><div class='add'>+	for (i = 0; i &lt; skb_shinfo(skb)-&gt;nr_frags; i++) {</div><div class='add'>+		frag = &amp;skb_shinfo(skb)-&gt;frags[i];</div><div class='add'>+		dma_unmap_page(dev, frag_dma_addr[i], skb_frag_size(frag),</div><div class='add'>+			       DMA_TO_DEVICE);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (GET_BIT(ET, le64_to_cpu(raw_desc-&gt;m3))) {</div><div class='add'>+		mss_index = GET_VAL(MSS, le64_to_cpu(raw_desc-&gt;m3));</div><div class='add'>+		spin_lock(&amp;pdata-&gt;mss_lock);</div><div class='add'>+		pdata-&gt;mss_refcnt[mss_index]--;</div><div class='add'>+		spin_unlock(&amp;pdata-&gt;mss_lock);</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	/* Checking for error */</div><div class='ctx'> 	status = GET_VAL(LERR, le64_to_cpu(raw_desc-&gt;m0));</div><div class='ctx'> 	if (unlikely(status &gt; 2)) {</div><div class='del'>-		xgene_enet_parse_error(cp_ring, netdev_priv(cp_ring-&gt;ndev),</div><div class='del'>-				       status);</div><div class='del'>-		ret = -EIO;</div><div class='add'>+		cp_ring-&gt;tx_dropped++;</div><div class='add'>+		cp_ring-&gt;tx_errors++;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (likely(skb)) {</div><div class='ctx'> 		dev_kfree_skb_any(skb);</div><div class='ctx'> 	} else {</div><div class='ctx'> 		netdev_err(cp_ring-&gt;ndev, "completion skb is NULL\n");</div><div class='del'>-		ret = -EIO;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgene_enet_setup_mss(struct net_device *ndev, u32 mss)</div><div class='add'>+{</div><div class='add'>+	struct xgene_enet_pdata *pdata = netdev_priv(ndev);</div><div class='add'>+	int mss_index = -EBUSY;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	spin_lock(&amp;pdata-&gt;mss_lock);</div><div class='add'>+</div><div class='add'>+	/* Reuse the slot if MSS matches */</div><div class='add'>+	for (i = 0; mss_index &lt; 0 &amp;&amp; i &lt; NUM_MSS_REG; i++) {</div><div class='add'>+		if (pdata-&gt;mss[i] == mss) {</div><div class='add'>+			pdata-&gt;mss_refcnt[i]++;</div><div class='add'>+			mss_index = i;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Overwrite the slot with ref_count = 0 */</div><div class='add'>+	for (i = 0; mss_index &lt; 0 &amp;&amp; i &lt; NUM_MSS_REG; i++) {</div><div class='add'>+		if (!pdata-&gt;mss_refcnt[i]) {</div><div class='add'>+			pdata-&gt;mss_refcnt[i]++;</div><div class='add'>+			pdata-&gt;mac_ops-&gt;set_mss(pdata, mss, i);</div><div class='add'>+			pdata-&gt;mss[i] = mss;</div><div class='add'>+			mss_index = i;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_unlock(&amp;pdata-&gt;mss_lock);</div><div class='add'>+</div><div class='add'>+	return mss_index;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u64 xgene_enet_work_msg(struct sk_buff *skb)</div><div class='add'>+static int xgene_enet_work_msg(struct sk_buff *skb, u64 *hopinfo)</div><div class='ctx'> {</div><div class='add'>+	struct net_device *ndev = skb-&gt;dev;</div><div class='ctx'> 	struct iphdr *iph;</div><div class='del'>-	u8 l3hlen, l4hlen = 0;</div><div class='del'>-	u8 csum_enable = 0;</div><div class='del'>-	u8 proto = 0;</div><div class='del'>-	u8 ethhdr;</div><div class='del'>-	u64 hopinfo;</div><div class='add'>+	u8 l3hlen = 0, l4hlen = 0;</div><div class='add'>+	u8 ethhdr, proto = 0, csum_enable = 0;</div><div class='add'>+	u32 hdr_len, mss = 0;</div><div class='add'>+	u32 i, len, nr_frags;</div><div class='add'>+	int mss_index;</div><div class='add'>+</div><div class='add'>+	ethhdr = xgene_enet_hdr_len(skb-&gt;data);</div><div class='ctx'> </div><div class='ctx'> 	if (unlikely(skb-&gt;protocol != htons(ETH_P_IP)) &amp;&amp;</div><div class='ctx'> 	    unlikely(skb-&gt;protocol != htons(ETH_P_8021Q)))</div><div class='hunk'>@@ -201,146 +331,442 @@ static u64 xgene_enet_work_msg(struct sk_buff *skb)</div><div class='ctx'> 		l4hlen = tcp_hdrlen(skb) &gt;&gt; 2;</div><div class='ctx'> 		csum_enable = 1;</div><div class='ctx'> 		proto = TSO_IPPROTO_TCP;</div><div class='add'>+		if (ndev-&gt;features &amp; NETIF_F_TSO) {</div><div class='add'>+			hdr_len = ethhdr + ip_hdrlen(skb) + tcp_hdrlen(skb);</div><div class='add'>+			mss = skb_shinfo(skb)-&gt;gso_size;</div><div class='add'>+</div><div class='add'>+			if (skb_is_nonlinear(skb)) {</div><div class='add'>+				len = skb_headlen(skb);</div><div class='add'>+				nr_frags = skb_shinfo(skb)-&gt;nr_frags;</div><div class='add'>+</div><div class='add'>+				for (i = 0; i &lt; 2 &amp;&amp; i &lt; nr_frags; i++)</div><div class='add'>+					len += skb_frag_size(</div><div class='add'>+						&amp;skb_shinfo(skb)-&gt;frags[i]);</div><div class='add'>+</div><div class='add'>+				/* HW requires header must reside in 3 buffer */</div><div class='add'>+				if (unlikely(hdr_len &gt; len)) {</div><div class='add'>+					if (skb_linearize(skb))</div><div class='add'>+						return 0;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (!mss || ((skb-&gt;len - hdr_len) &lt;= mss))</div><div class='add'>+				goto out;</div><div class='add'>+</div><div class='add'>+			mss_index = xgene_enet_setup_mss(ndev, mss);</div><div class='add'>+			if (unlikely(mss_index &lt; 0))</div><div class='add'>+				return -EBUSY;</div><div class='add'>+</div><div class='add'>+			*hopinfo |= SET_BIT(ET) | SET_VAL(MSS, mss_index);</div><div class='add'>+		}</div><div class='ctx'> 	} else if (iph-&gt;protocol == IPPROTO_UDP) {</div><div class='ctx'> 		l4hlen = UDP_HDR_SIZE;</div><div class='ctx'> 		csum_enable = 1;</div><div class='ctx'> 	}</div><div class='ctx'> out:</div><div class='ctx'> 	l3hlen = ip_hdrlen(skb) &gt;&gt; 2;</div><div class='del'>-	ethhdr = xgene_enet_hdr_len(skb-&gt;data);</div><div class='del'>-	hopinfo = SET_VAL(TCPHDR, l4hlen) |</div><div class='del'>-		  SET_VAL(IPHDR, l3hlen) |</div><div class='del'>-		  SET_VAL(ETHHDR, ethhdr) |</div><div class='del'>-		  SET_VAL(EC, csum_enable) |</div><div class='del'>-		  SET_VAL(IS, proto) |</div><div class='del'>-		  SET_BIT(IC) |</div><div class='del'>-		  SET_BIT(TYPE_ETH_WORK_MESSAGE);</div><div class='del'>-</div><div class='del'>-	return hopinfo;</div><div class='add'>+	*hopinfo |= SET_VAL(TCPHDR, l4hlen) |</div><div class='add'>+		    SET_VAL(IPHDR, l3hlen) |</div><div class='add'>+		    SET_VAL(ETHHDR, ethhdr) |</div><div class='add'>+		    SET_VAL(EC, csum_enable) |</div><div class='add'>+		    SET_VAL(IS, proto) |</div><div class='add'>+		    SET_BIT(IC) |</div><div class='add'>+		    SET_BIT(TYPE_ETH_WORK_MESSAGE);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 xgene_enet_encode_len(u16 len)</div><div class='add'>+{</div><div class='add'>+	return (len == BUFLEN_16K) ? 0 : len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgene_set_addr_len(__le64 *desc, u32 idx, dma_addr_t addr, u32 len)</div><div class='add'>+{</div><div class='add'>+	desc[idx ^ 1] = cpu_to_le64(SET_VAL(DATAADDR, addr) |</div><div class='add'>+				    SET_VAL(BUFDATALEN, len));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static __le64 *xgene_enet_get_exp_bufs(struct xgene_enet_desc_ring *ring)</div><div class='add'>+{</div><div class='add'>+	__le64 *exp_bufs;</div><div class='add'>+</div><div class='add'>+	exp_bufs = &amp;ring-&gt;exp_bufs[ring-&gt;exp_buf_tail * MAX_EXP_BUFFS];</div><div class='add'>+	memset(exp_bufs, 0, sizeof(__le64) * MAX_EXP_BUFFS);</div><div class='add'>+	ring-&gt;exp_buf_tail = (ring-&gt;exp_buf_tail + 1) &amp; ((ring-&gt;slots / 2) - 1);</div><div class='add'>+</div><div class='add'>+	return exp_bufs;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static dma_addr_t *xgene_get_frag_dma_array(struct xgene_enet_desc_ring *ring)</div><div class='add'>+{</div><div class='add'>+	return &amp;ring-&gt;cp_ring-&gt;frag_dma_addr[ring-&gt;tail * MAX_SKB_FRAGS];</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int xgene_enet_setup_tx_desc(struct xgene_enet_desc_ring *tx_ring,</div><div class='ctx'> 				    struct sk_buff *skb)</div><div class='ctx'> {</div><div class='ctx'> 	struct device *dev = ndev_to_dev(tx_ring-&gt;ndev);</div><div class='add'>+	struct xgene_enet_pdata *pdata = netdev_priv(tx_ring-&gt;ndev);</div><div class='ctx'> 	struct xgene_enet_raw_desc *raw_desc;</div><div class='del'>-	dma_addr_t dma_addr;</div><div class='add'>+	__le64 *exp_desc = NULL, *exp_bufs = NULL;</div><div class='add'>+	dma_addr_t dma_addr, pbuf_addr, *frag_dma_addr;</div><div class='add'>+	skb_frag_t *frag;</div><div class='ctx'> 	u16 tail = tx_ring-&gt;tail;</div><div class='del'>-	u64 hopinfo;</div><div class='add'>+	u64 hopinfo = 0;</div><div class='add'>+	u32 len, hw_len;</div><div class='add'>+	u8 ll = 0, nv = 0, idx = 0;</div><div class='add'>+	bool split = false;</div><div class='add'>+	u32 size, offset, ell_bytes = 0;</div><div class='add'>+	u32 i, fidx, nr_frags, count = 1;</div><div class='add'>+	int ret;</div><div class='ctx'> </div><div class='ctx'> 	raw_desc = &amp;tx_ring-&gt;raw_desc[tail];</div><div class='add'>+	tail = (tail + 1) &amp; (tx_ring-&gt;slots - 1);</div><div class='ctx'> 	memset(raw_desc, 0, sizeof(struct xgene_enet_raw_desc));</div><div class='ctx'> </div><div class='del'>-	dma_addr = dma_map_single(dev, skb-&gt;data, skb-&gt;len, DMA_TO_DEVICE);</div><div class='add'>+	ret = xgene_enet_work_msg(skb, &amp;hopinfo);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	raw_desc-&gt;m3 = cpu_to_le64(SET_VAL(HENQNUM, tx_ring-&gt;dst_ring_num) |</div><div class='add'>+				   hopinfo);</div><div class='add'>+</div><div class='add'>+	len = skb_headlen(skb);</div><div class='add'>+	hw_len = xgene_enet_encode_len(len);</div><div class='add'>+</div><div class='add'>+	dma_addr = dma_map_single(dev, skb-&gt;data, len, DMA_TO_DEVICE);</div><div class='ctx'> 	if (dma_mapping_error(dev, dma_addr)) {</div><div class='ctx'> 		netdev_err(tx_ring-&gt;ndev, "DMA mapping error\n");</div><div class='ctx'> 		return -EINVAL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* Hardware expects descriptor in little endian format */</div><div class='del'>-	raw_desc-&gt;m0 = cpu_to_le64(tail);</div><div class='ctx'> 	raw_desc-&gt;m1 = cpu_to_le64(SET_VAL(DATAADDR, dma_addr) |</div><div class='del'>-				   SET_VAL(BUFDATALEN, skb-&gt;len) |</div><div class='add'>+				   SET_VAL(BUFDATALEN, hw_len) |</div><div class='ctx'> 				   SET_BIT(COHERENT));</div><div class='del'>-	hopinfo = xgene_enet_work_msg(skb);</div><div class='del'>-	raw_desc-&gt;m3 = cpu_to_le64(SET_VAL(HENQNUM, tx_ring-&gt;dst_ring_num) |</div><div class='del'>-				   hopinfo);</div><div class='del'>-	tx_ring-&gt;cp_ring-&gt;cp_skb[tail] = skb;</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	if (!skb_is_nonlinear(skb))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	/* scatter gather */</div><div class='add'>+	nv = 1;</div><div class='add'>+	exp_desc = (void *)&amp;tx_ring-&gt;raw_desc[tail];</div><div class='add'>+	tail = (tail + 1) &amp; (tx_ring-&gt;slots - 1);</div><div class='add'>+	memset(exp_desc, 0, sizeof(struct xgene_enet_raw_desc));</div><div class='add'>+</div><div class='add'>+	nr_frags = skb_shinfo(skb)-&gt;nr_frags;</div><div class='add'>+	for (i = nr_frags; i &lt; 4 ; i++)</div><div class='add'>+		exp_desc[i ^ 1] = cpu_to_le64(LAST_BUFFER);</div><div class='add'>+</div><div class='add'>+	frag_dma_addr = xgene_get_frag_dma_array(tx_ring);</div><div class='add'>+</div><div class='add'>+	for (i = 0, fidx = 0; split || (fidx &lt; nr_frags); i++) {</div><div class='add'>+		if (!split) {</div><div class='add'>+			frag = &amp;skb_shinfo(skb)-&gt;frags[fidx];</div><div class='add'>+			size = skb_frag_size(frag);</div><div class='add'>+			offset = 0;</div><div class='add'>+</div><div class='add'>+			pbuf_addr = skb_frag_dma_map(dev, frag, 0, size,</div><div class='add'>+						     DMA_TO_DEVICE);</div><div class='add'>+			if (dma_mapping_error(dev, pbuf_addr))</div><div class='add'>+				return -EINVAL;</div><div class='add'>+</div><div class='add'>+			frag_dma_addr[fidx] = pbuf_addr;</div><div class='add'>+			fidx++;</div><div class='add'>+</div><div class='add'>+			if (size &gt; BUFLEN_16K)</div><div class='add'>+				split = true;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (size &gt; BUFLEN_16K) {</div><div class='add'>+			len = BUFLEN_16K;</div><div class='add'>+			size -= BUFLEN_16K;</div><div class='add'>+		} else {</div><div class='add'>+			len = size;</div><div class='add'>+			split = false;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		dma_addr = pbuf_addr + offset;</div><div class='add'>+		hw_len = xgene_enet_encode_len(len);</div><div class='add'>+</div><div class='add'>+		switch (i) {</div><div class='add'>+		case 0:</div><div class='add'>+		case 1:</div><div class='add'>+		case 2:</div><div class='add'>+			xgene_set_addr_len(exp_desc, i, dma_addr, hw_len);</div><div class='add'>+			break;</div><div class='add'>+		case 3:</div><div class='add'>+			if (split || (fidx != nr_frags)) {</div><div class='add'>+				exp_bufs = xgene_enet_get_exp_bufs(tx_ring);</div><div class='add'>+				xgene_set_addr_len(exp_bufs, idx, dma_addr,</div><div class='add'>+						   hw_len);</div><div class='add'>+				idx++;</div><div class='add'>+				ell_bytes += len;</div><div class='add'>+			} else {</div><div class='add'>+				xgene_set_addr_len(exp_desc, i, dma_addr,</div><div class='add'>+						   hw_len);</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			xgene_set_addr_len(exp_bufs, idx, dma_addr, hw_len);</div><div class='add'>+			idx++;</div><div class='add'>+			ell_bytes += len;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (split)</div><div class='add'>+			offset += BUFLEN_16K;</div><div class='add'>+	}</div><div class='add'>+	count++;</div><div class='add'>+</div><div class='add'>+	if (idx) {</div><div class='add'>+		ll = 1;</div><div class='add'>+		dma_addr = dma_map_single(dev, exp_bufs,</div><div class='add'>+					  sizeof(u64) * MAX_EXP_BUFFS,</div><div class='add'>+					  DMA_TO_DEVICE);</div><div class='add'>+		if (dma_mapping_error(dev, dma_addr)) {</div><div class='add'>+			dev_kfree_skb_any(skb);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+		i = ell_bytes &gt;&gt; LL_BYTES_LSB_LEN;</div><div class='add'>+		exp_desc[2] = cpu_to_le64(SET_VAL(DATAADDR, dma_addr) |</div><div class='add'>+					  SET_VAL(LL_BYTES_MSB, i) |</div><div class='add'>+					  SET_VAL(LL_LEN, idx));</div><div class='add'>+		raw_desc-&gt;m2 = cpu_to_le64(SET_VAL(LL_BYTES_LSB, ell_bytes));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	raw_desc-&gt;m0 = cpu_to_le64(SET_VAL(LL, ll) | SET_VAL(NV, nv) |</div><div class='add'>+				   SET_VAL(USERINFO, tx_ring-&gt;tail));</div><div class='add'>+	tx_ring-&gt;cp_ring-&gt;cp_skb[tx_ring-&gt;tail] = skb;</div><div class='add'>+	pdata-&gt;tx_level[tx_ring-&gt;cp_ring-&gt;index] += count;</div><div class='add'>+	tx_ring-&gt;tail = tail;</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static netdev_tx_t xgene_enet_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 					 struct net_device *ndev)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgene_enet_pdata *pdata = netdev_priv(ndev);</div><div class='del'>-	struct xgene_enet_desc_ring *tx_ring = pdata-&gt;tx_ring;</div><div class='del'>-	struct xgene_enet_desc_ring *cp_ring = tx_ring-&gt;cp_ring;</div><div class='del'>-	u32 tx_level, cq_level;</div><div class='del'>-</div><div class='del'>-	tx_level = pdata-&gt;ring_ops-&gt;len(tx_ring);</div><div class='del'>-	cq_level = pdata-&gt;ring_ops-&gt;len(cp_ring);</div><div class='del'>-	if (unlikely(tx_level &gt; pdata-&gt;tx_qcnt_hi ||</div><div class='del'>-		     cq_level &gt; pdata-&gt;cp_qcnt_hi)) {</div><div class='del'>-		netif_stop_queue(ndev);</div><div class='add'>+	struct xgene_enet_desc_ring *tx_ring;</div><div class='add'>+	int index = skb-&gt;queue_mapping;</div><div class='add'>+	u32 tx_level = pdata-&gt;tx_level[index];</div><div class='add'>+	int count;</div><div class='add'>+</div><div class='add'>+	tx_ring = pdata-&gt;tx_ring[index];</div><div class='add'>+	if (tx_level &lt; pdata-&gt;txc_level[index])</div><div class='add'>+		tx_level += ((typeof(pdata-&gt;tx_level[index]))~0U);</div><div class='add'>+</div><div class='add'>+	if ((tx_level - pdata-&gt;txc_level[index]) &gt; pdata-&gt;tx_qcnt_hi) {</div><div class='add'>+		netif_stop_subqueue(ndev, index);</div><div class='ctx'> 		return NETDEV_TX_BUSY;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (xgene_enet_setup_tx_desc(tx_ring, skb)) {</div><div class='add'>+	if (skb_padto(skb, XGENE_MIN_ENET_FRAME_SIZE))</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+	count = xgene_enet_setup_tx_desc(tx_ring, skb);</div><div class='add'>+	if (count == -EBUSY)</div><div class='add'>+		return NETDEV_TX_BUSY;</div><div class='add'>+</div><div class='add'>+	if (count &lt;= 0) {</div><div class='ctx'> 		dev_kfree_skb_any(skb);</div><div class='ctx'> 		return NETDEV_TX_OK;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pdata-&gt;ring_ops-&gt;wr_cmd(tx_ring, 1);</div><div class='ctx'> 	skb_tx_timestamp(skb);</div><div class='del'>-	tx_ring-&gt;tail = (tx_ring-&gt;tail + 1) &amp; (tx_ring-&gt;slots - 1);</div><div class='ctx'> </div><div class='del'>-	pdata-&gt;stats.tx_packets++;</div><div class='del'>-	pdata-&gt;stats.tx_bytes += skb-&gt;len;</div><div class='add'>+	tx_ring-&gt;tx_packets++;</div><div class='add'>+	tx_ring-&gt;tx_bytes += skb-&gt;len;</div><div class='ctx'> </div><div class='add'>+	pdata-&gt;ring_ops-&gt;wr_cmd(tx_ring, count);</div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xgene_enet_skip_csum(struct sk_buff *skb)</div><div class='add'>+static void xgene_enet_rx_csum(struct sk_buff *skb)</div><div class='ctx'> {</div><div class='add'>+	struct net_device *ndev = skb-&gt;dev;</div><div class='ctx'> 	struct iphdr *iph = ip_hdr(skb);</div><div class='ctx'> </div><div class='del'>-	if (!ip_is_fragment(iph) ||</div><div class='del'>-	    (iph-&gt;protocol != IPPROTO_TCP &amp;&amp; iph-&gt;protocol != IPPROTO_UDP)) {</div><div class='del'>-		skb-&gt;ip_summed = CHECKSUM_UNNECESSARY;</div><div class='add'>+	if (!(ndev-&gt;features &amp; NETIF_F_RXCSUM))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (skb-&gt;protocol != htons(ETH_P_IP))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (ip_is_fragment(iph))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (iph-&gt;protocol != IPPROTO_TCP &amp;&amp; iph-&gt;protocol != IPPROTO_UDP)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	skb-&gt;ip_summed = CHECKSUM_UNNECESSARY;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgene_enet_free_pagepool(struct xgene_enet_desc_ring *buf_pool,</div><div class='add'>+				     struct xgene_enet_raw_desc *raw_desc,</div><div class='add'>+				     struct xgene_enet_raw_desc *exp_desc)</div><div class='add'>+{</div><div class='add'>+	__le64 *desc = (void *)exp_desc;</div><div class='add'>+	dma_addr_t dma_addr;</div><div class='add'>+	struct device *dev;</div><div class='add'>+	struct page *page;</div><div class='add'>+	u16 slots, head;</div><div class='add'>+	u32 frag_size;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!buf_pool || !raw_desc || !exp_desc ||</div><div class='add'>+	    (!GET_VAL(NV, le64_to_cpu(raw_desc-&gt;m0))))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	dev = ndev_to_dev(buf_pool-&gt;ndev);</div><div class='add'>+	slots = buf_pool-&gt;slots - 1;</div><div class='add'>+	head = buf_pool-&gt;head;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 4; i++) {</div><div class='add'>+		frag_size = xgene_enet_get_data_len(le64_to_cpu(desc[i ^ 1]));</div><div class='add'>+		if (!frag_size)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		dma_addr = GET_VAL(DATAADDR, le64_to_cpu(desc[i ^ 1]));</div><div class='add'>+		dma_unmap_page(dev, dma_addr, PAGE_SIZE, DMA_FROM_DEVICE);</div><div class='add'>+</div><div class='add'>+		page = buf_pool-&gt;frag_page[head];</div><div class='add'>+		put_page(page);</div><div class='add'>+</div><div class='add'>+		buf_pool-&gt;frag_page[head] = NULL;</div><div class='add'>+		head = (head + 1) &amp; slots;</div><div class='ctx'> 	}</div><div class='add'>+	buf_pool-&gt;head = head;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Errata 10GE_10 and ENET_15 - Fix duplicated HW statistic counters */</div><div class='add'>+static bool xgene_enet_errata_10GE_10(struct sk_buff *skb, u32 len, u8 status)</div><div class='add'>+{</div><div class='add'>+	if (status == INGRESS_CRC &amp;&amp;</div><div class='add'>+	    len &gt;= (ETHER_STD_PACKET + 1) &amp;&amp;</div><div class='add'>+	    len &lt;= (ETHER_STD_PACKET + 4) &amp;&amp;</div><div class='add'>+	    skb-&gt;protocol == htons(ETH_P_8021Q))</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Errata 10GE_8 and ENET_11 - allow packet with length &lt;=64B */</div><div class='add'>+static bool xgene_enet_errata_10GE_8(struct sk_buff *skb, u32 len, u8 status)</div><div class='add'>+{</div><div class='add'>+	if (status == INGRESS_PKT_LEN &amp;&amp; len == ETHER_MIN_PACKET) {</div><div class='add'>+		if (ntohs(eth_hdr(skb)-&gt;h_proto) &lt; 46)</div><div class='add'>+			return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int xgene_enet_rx_frame(struct xgene_enet_desc_ring *rx_ring,</div><div class='del'>-			       struct xgene_enet_raw_desc *raw_desc)</div><div class='add'>+			       struct xgene_enet_raw_desc *raw_desc,</div><div class='add'>+			       struct xgene_enet_raw_desc *exp_desc)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *ndev;</div><div class='add'>+	struct xgene_enet_desc_ring *buf_pool, *page_pool;</div><div class='add'>+	u32 datalen, frag_size, skb_index;</div><div class='ctx'> 	struct xgene_enet_pdata *pdata;</div><div class='del'>-	struct device *dev;</div><div class='del'>-	struct xgene_enet_desc_ring *buf_pool;</div><div class='del'>-	u32 datalen, skb_index;</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	dma_addr_t dma_addr;</div><div class='ctx'> 	struct sk_buff *skb;</div><div class='add'>+	struct device *dev;</div><div class='add'>+	struct page *page;</div><div class='add'>+	u16 slots, head;</div><div class='add'>+	int i, ret = 0;</div><div class='add'>+	__le64 *desc;</div><div class='ctx'> 	u8 status;</div><div class='del'>-	int ret = 0;</div><div class='add'>+	bool nv;</div><div class='ctx'> </div><div class='ctx'> 	ndev = rx_ring-&gt;ndev;</div><div class='ctx'> 	pdata = netdev_priv(ndev);</div><div class='ctx'> 	dev = ndev_to_dev(rx_ring-&gt;ndev);</div><div class='ctx'> 	buf_pool = rx_ring-&gt;buf_pool;</div><div class='add'>+	page_pool = rx_ring-&gt;page_pool;</div><div class='ctx'> </div><div class='ctx'> 	dma_unmap_single(dev, GET_VAL(DATAADDR, le64_to_cpu(raw_desc-&gt;m1)),</div><div class='del'>-			 XGENE_ENET_MAX_MTU, DMA_FROM_DEVICE);</div><div class='add'>+			 XGENE_ENET_STD_MTU, DMA_FROM_DEVICE);</div><div class='ctx'> 	skb_index = GET_VAL(USERINFO, le64_to_cpu(raw_desc-&gt;m0));</div><div class='ctx'> 	skb = buf_pool-&gt;rx_skb[skb_index];</div><div class='add'>+	buf_pool-&gt;rx_skb[skb_index] = NULL;</div><div class='ctx'> </div><div class='del'>-	/* checking for error */</div><div class='del'>-	status = GET_VAL(LERR, le64_to_cpu(raw_desc-&gt;m0));</div><div class='del'>-	if (unlikely(status &gt; 2)) {</div><div class='del'>-		dev_kfree_skb_any(skb);</div><div class='del'>-		xgene_enet_parse_error(rx_ring, netdev_priv(rx_ring-&gt;ndev),</div><div class='del'>-				       status);</div><div class='del'>-		pdata-&gt;stats.rx_dropped++;</div><div class='del'>-		ret = -EIO;</div><div class='del'>-		goto out;</div><div class='del'>-	}</div><div class='add'>+	datalen = xgene_enet_get_data_len(le64_to_cpu(raw_desc-&gt;m1));</div><div class='ctx'> </div><div class='ctx'> 	/* strip off CRC as HW isn't doing this */</div><div class='del'>-	datalen = GET_VAL(BUFDATALEN, le64_to_cpu(raw_desc-&gt;m1));</div><div class='del'>-	datalen -= 4;</div><div class='del'>-	prefetch(skb-&gt;data - NET_IP_ALIGN);</div><div class='del'>-	skb_put(skb, datalen);</div><div class='add'>+	nv = GET_VAL(NV, le64_to_cpu(raw_desc-&gt;m0));</div><div class='add'>+	if (!nv)</div><div class='add'>+		datalen -= 4;</div><div class='ctx'> </div><div class='del'>-	skb_checksum_none_assert(skb);</div><div class='add'>+	skb_put(skb, datalen);</div><div class='add'>+	prefetch(skb-&gt;data - NET_IP_ALIGN);</div><div class='ctx'> 	skb-&gt;protocol = eth_type_trans(skb, ndev);</div><div class='del'>-	if (likely((ndev-&gt;features &amp; NETIF_F_IP_CSUM) &amp;&amp;</div><div class='del'>-		   skb-&gt;protocol == htons(ETH_P_IP))) {</div><div class='del'>-		xgene_enet_skip_csum(skb);</div><div class='add'>+</div><div class='add'>+	/* checking for error */</div><div class='add'>+	status = (GET_VAL(ELERR, le64_to_cpu(raw_desc-&gt;m0)) &lt;&lt; LERR_LEN) |</div><div class='add'>+		  GET_VAL(LERR, le64_to_cpu(raw_desc-&gt;m0));</div><div class='add'>+	if (unlikely(status)) {</div><div class='add'>+		if (xgene_enet_errata_10GE_8(skb, datalen, status)) {</div><div class='add'>+			pdata-&gt;false_rflr++;</div><div class='add'>+		} else if (xgene_enet_errata_10GE_10(skb, datalen, status)) {</div><div class='add'>+			pdata-&gt;vlan_rjbr++;</div><div class='add'>+		} else {</div><div class='add'>+			dev_kfree_skb_any(skb);</div><div class='add'>+			xgene_enet_free_pagepool(page_pool, raw_desc, exp_desc);</div><div class='add'>+			xgene_enet_parse_error(rx_ring, status);</div><div class='add'>+			rx_ring-&gt;rx_dropped++;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	pdata-&gt;stats.rx_packets++;</div><div class='del'>-	pdata-&gt;stats.rx_bytes += datalen;</div><div class='add'>+	if (!nv)</div><div class='add'>+		goto skip_jumbo;</div><div class='add'>+</div><div class='add'>+	slots = page_pool-&gt;slots - 1;</div><div class='add'>+	head = page_pool-&gt;head;</div><div class='add'>+	desc = (void *)exp_desc;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 4; i++) {</div><div class='add'>+		frag_size = xgene_enet_get_data_len(le64_to_cpu(desc[i ^ 1]));</div><div class='add'>+		if (!frag_size)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		dma_addr = GET_VAL(DATAADDR, le64_to_cpu(desc[i ^ 1]));</div><div class='add'>+		dma_unmap_page(dev, dma_addr, PAGE_SIZE, DMA_FROM_DEVICE);</div><div class='add'>+</div><div class='add'>+		page = page_pool-&gt;frag_page[head];</div><div class='add'>+		skb_add_rx_frag(skb, skb_shinfo(skb)-&gt;nr_frags, page, 0,</div><div class='add'>+				frag_size, PAGE_SIZE);</div><div class='add'>+</div><div class='add'>+		datalen += frag_size;</div><div class='add'>+</div><div class='add'>+		page_pool-&gt;frag_page[head] = NULL;</div><div class='add'>+		head = (head + 1) &amp; slots;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	page_pool-&gt;head = head;</div><div class='add'>+	rx_ring-&gt;npagepool -= skb_shinfo(skb)-&gt;nr_frags;</div><div class='add'>+</div><div class='add'>+skip_jumbo:</div><div class='add'>+	skb_checksum_none_assert(skb);</div><div class='add'>+	xgene_enet_rx_csum(skb);</div><div class='add'>+</div><div class='add'>+	rx_ring-&gt;rx_packets++;</div><div class='add'>+	rx_ring-&gt;rx_bytes += datalen;</div><div class='ctx'> 	napi_gro_receive(&amp;rx_ring-&gt;napi, skb);</div><div class='add'>+</div><div class='ctx'> out:</div><div class='add'>+	if (rx_ring-&gt;npagepool &lt;= 0) {</div><div class='add'>+		ret = xgene_enet_refill_pagepool(page_pool, NUM_NXTBUFPOOL);</div><div class='add'>+		rx_ring-&gt;npagepool = NUM_NXTBUFPOOL;</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	if (--rx_ring-&gt;nbufpool == 0) {</div><div class='ctx'> 		ret = xgene_enet_refill_bufpool(buf_pool, NUM_BUFPOOL);</div><div class='ctx'> 		rx_ring-&gt;nbufpool = NUM_BUFPOOL;</div><div class='hunk'>@@ -357,27 +783,52 @@ static bool is_rx_desc(struct xgene_enet_raw_desc *raw_desc)</div><div class='ctx'> static int xgene_enet_process_ring(struct xgene_enet_desc_ring *ring,</div><div class='ctx'> 				   int budget)</div><div class='ctx'> {</div><div class='del'>-	struct xgene_enet_pdata *pdata = netdev_priv(ring-&gt;ndev);</div><div class='del'>-	struct xgene_enet_raw_desc *raw_desc;</div><div class='add'>+	struct net_device *ndev = ring-&gt;ndev;</div><div class='add'>+	struct xgene_enet_pdata *pdata = netdev_priv(ndev);</div><div class='add'>+	struct xgene_enet_raw_desc *raw_desc, *exp_desc;</div><div class='ctx'> 	u16 head = ring-&gt;head;</div><div class='ctx'> 	u16 slots = ring-&gt;slots - 1;</div><div class='del'>-	int ret, count = 0;</div><div class='add'>+	int ret, desc_count, count = 0, processed = 0;</div><div class='add'>+	bool is_completion;</div><div class='ctx'> </div><div class='ctx'> 	do {</div><div class='ctx'> 		raw_desc = &amp;ring-&gt;raw_desc[head];</div><div class='add'>+		desc_count = 0;</div><div class='add'>+		is_completion = false;</div><div class='add'>+		exp_desc = NULL;</div><div class='ctx'> 		if (unlikely(xgene_enet_is_desc_slot_empty(raw_desc)))</div><div class='ctx'> 			break;</div><div class='ctx'> </div><div class='ctx'> 		/* read fpqnum field after dataaddr field */</div><div class='ctx'> 		dma_rmb();</div><div class='del'>-		if (is_rx_desc(raw_desc))</div><div class='del'>-			ret = xgene_enet_rx_frame(ring, raw_desc);</div><div class='del'>-		else</div><div class='add'>+		if (GET_BIT(NV, le64_to_cpu(raw_desc-&gt;m0))) {</div><div class='add'>+			head = (head + 1) &amp; slots;</div><div class='add'>+			exp_desc = &amp;ring-&gt;raw_desc[head];</div><div class='add'>+</div><div class='add'>+			if (unlikely(xgene_enet_is_desc_slot_empty(exp_desc))) {</div><div class='add'>+				head = (head - 1) &amp; slots;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+			dma_rmb();</div><div class='add'>+			count++;</div><div class='add'>+			desc_count++;</div><div class='add'>+		}</div><div class='add'>+		if (is_rx_desc(raw_desc)) {</div><div class='add'>+			ret = xgene_enet_rx_frame(ring, raw_desc, exp_desc);</div><div class='add'>+		} else {</div><div class='ctx'> 			ret = xgene_enet_tx_completion(ring, raw_desc);</div><div class='add'>+			is_completion = true;</div><div class='add'>+		}</div><div class='ctx'> 		xgene_enet_mark_desc_slot_empty(raw_desc);</div><div class='add'>+		if (exp_desc)</div><div class='add'>+			xgene_enet_mark_desc_slot_empty(exp_desc);</div><div class='ctx'> </div><div class='ctx'> 		head = (head + 1) &amp; slots;</div><div class='ctx'> 		count++;</div><div class='add'>+		desc_count++;</div><div class='add'>+		processed++;</div><div class='add'>+		if (is_completion)</div><div class='add'>+			pdata-&gt;txc_level[ring-&gt;index] += desc_count;</div><div class='ctx'> </div><div class='ctx'> 		if (ret)</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -387,13 +838,11 @@ static int xgene_enet_process_ring(struct xgene_enet_desc_ring *ring,</div><div class='ctx'> 		pdata-&gt;ring_ops-&gt;wr_cmd(ring, -count);</div><div class='ctx'> 		ring-&gt;head = head;</div><div class='ctx'> </div><div class='del'>-		if (netif_queue_stopped(ring-&gt;ndev)) {</div><div class='del'>-			if (pdata-&gt;ring_ops-&gt;len(ring) &lt; pdata-&gt;cp_qcnt_low)</div><div class='del'>-				netif_wake_queue(ring-&gt;ndev);</div><div class='del'>-		}</div><div class='add'>+		if (__netif_subqueue_stopped(ndev, ring-&gt;index))</div><div class='add'>+			netif_start_subqueue(ndev, ring-&gt;index);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return count;</div><div class='add'>+	return processed;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int xgene_enet_napi(struct napi_struct *napi, const int budget)</div><div class='hunk'>@@ -405,18 +854,50 @@ static int xgene_enet_napi(struct napi_struct *napi, const int budget)</div><div class='ctx'> 	processed = xgene_enet_process_ring(ring, budget);</div><div class='ctx'> </div><div class='ctx'> 	if (processed != budget) {</div><div class='del'>-		napi_complete(napi);</div><div class='add'>+		napi_complete_done(napi, processed);</div><div class='ctx'> 		enable_irq(ring-&gt;irq);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	return processed;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xgene_enet_timeout(struct net_device *ndev)</div><div class='add'>+static void xgene_enet_timeout(struct net_device *ndev, unsigned int txqueue)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgene_enet_pdata *pdata = netdev_priv(ndev);</div><div class='add'>+	struct netdev_queue *txq;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	pdata-&gt;mac_ops-&gt;reset(pdata);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;txq_cnt; i++) {</div><div class='add'>+		txq = netdev_get_tx_queue(ndev, i);</div><div class='add'>+		txq_trans_cond_update(txq);</div><div class='add'>+		netif_tx_start_queue(txq);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgene_enet_set_irq_name(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct xgene_enet_pdata *pdata = netdev_priv(ndev);</div><div class='add'>+	struct xgene_enet_desc_ring *ring;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;rxq_cnt; i++) {</div><div class='add'>+		ring = pdata-&gt;rx_ring[i];</div><div class='add'>+		if (!pdata-&gt;cq_cnt) {</div><div class='add'>+			snprintf(ring-&gt;irq_name, IRQ_ID_SIZE, "%s-rx-txc",</div><div class='add'>+				 ndev-&gt;name);</div><div class='add'>+		} else {</div><div class='add'>+			snprintf(ring-&gt;irq_name, IRQ_ID_SIZE, "%s-rx-%d",</div><div class='add'>+				 ndev-&gt;name, i);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;cq_cnt; i++) {</div><div class='add'>+		ring = pdata-&gt;tx_ring[i]-&gt;cp_ring;</div><div class='add'>+		snprintf(ring-&gt;irq_name, IRQ_ID_SIZE, "%s-txc-%d",</div><div class='add'>+			 ndev-&gt;name, i);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int xgene_enet_register_irq(struct net_device *ndev)</div><div class='hunk'>@@ -424,18 +905,25 @@ static int xgene_enet_register_irq(struct net_device *ndev)</div><div class='ctx'> 	struct xgene_enet_pdata *pdata = netdev_priv(ndev);</div><div class='ctx'> 	struct device *dev = ndev_to_dev(ndev);</div><div class='ctx'> 	struct xgene_enet_desc_ring *ring;</div><div class='del'>-	int ret;</div><div class='add'>+	int ret = 0, i;</div><div class='ctx'> </div><div class='del'>-	ring = pdata-&gt;rx_ring;</div><div class='del'>-	ret = devm_request_irq(dev, ring-&gt;irq, xgene_enet_rx_irq,</div><div class='del'>-			       IRQF_SHARED, ring-&gt;irq_name, ring);</div><div class='del'>-	if (ret)</div><div class='del'>-		netdev_err(ndev, "Failed to request irq %s\n", ring-&gt;irq_name);</div><div class='add'>+	xgene_enet_set_irq_name(ndev);</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;rxq_cnt; i++) {</div><div class='add'>+		ring = pdata-&gt;rx_ring[i];</div><div class='add'>+		irq_set_status_flags(ring-&gt;irq, IRQ_DISABLE_UNLAZY);</div><div class='add'>+		ret = devm_request_irq(dev, ring-&gt;irq, xgene_enet_rx_irq,</div><div class='add'>+				       0, ring-&gt;irq_name, ring);</div><div class='add'>+		if (ret) {</div><div class='add'>+			netdev_err(ndev, "Failed to request irq %s\n",</div><div class='add'>+				   ring-&gt;irq_name);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (pdata-&gt;cq_cnt) {</div><div class='del'>-		ring = pdata-&gt;tx_ring-&gt;cp_ring;</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;cq_cnt; i++) {</div><div class='add'>+		ring = pdata-&gt;tx_ring[i]-&gt;cp_ring;</div><div class='add'>+		irq_set_status_flags(ring-&gt;irq, IRQ_DISABLE_UNLAZY);</div><div class='ctx'> 		ret = devm_request_irq(dev, ring-&gt;irq, xgene_enet_rx_irq,</div><div class='del'>-				       IRQF_SHARED, ring-&gt;irq_name, ring);</div><div class='add'>+				       0, ring-&gt;irq_name, ring);</div><div class='ctx'> 		if (ret) {</div><div class='ctx'> 			netdev_err(ndev, "Failed to request irq %s\n",</div><div class='ctx'> 				   ring-&gt;irq_name);</div><div class='hunk'>@@ -448,27 +936,38 @@ static int xgene_enet_register_irq(struct net_device *ndev)</div><div class='ctx'> static void xgene_enet_free_irq(struct net_device *ndev)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgene_enet_pdata *pdata;</div><div class='add'>+	struct xgene_enet_desc_ring *ring;</div><div class='ctx'> 	struct device *dev;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='ctx'> 	pdata = netdev_priv(ndev);</div><div class='ctx'> 	dev = ndev_to_dev(ndev);</div><div class='del'>-	devm_free_irq(dev, pdata-&gt;rx_ring-&gt;irq, pdata-&gt;rx_ring);</div><div class='ctx'> </div><div class='del'>-	if (pdata-&gt;cq_cnt) {</div><div class='del'>-		devm_free_irq(dev, pdata-&gt;tx_ring-&gt;cp_ring-&gt;irq,</div><div class='del'>-			      pdata-&gt;tx_ring-&gt;cp_ring);</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;rxq_cnt; i++) {</div><div class='add'>+		ring = pdata-&gt;rx_ring[i];</div><div class='add'>+		irq_clear_status_flags(ring-&gt;irq, IRQ_DISABLE_UNLAZY);</div><div class='add'>+		devm_free_irq(dev, ring-&gt;irq, ring);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;cq_cnt; i++) {</div><div class='add'>+		ring = pdata-&gt;tx_ring[i]-&gt;cp_ring;</div><div class='add'>+		irq_clear_status_flags(ring-&gt;irq, IRQ_DISABLE_UNLAZY);</div><div class='add'>+		devm_free_irq(dev, ring-&gt;irq, ring);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgene_enet_napi_enable(struct xgene_enet_pdata *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	struct napi_struct *napi;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	napi = &amp;pdata-&gt;rx_ring-&gt;napi;</div><div class='del'>-	napi_enable(napi);</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;rxq_cnt; i++) {</div><div class='add'>+		napi = &amp;pdata-&gt;rx_ring[i]-&gt;napi;</div><div class='add'>+		napi_enable(napi);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (pdata-&gt;cq_cnt) {</div><div class='del'>-		napi = &amp;pdata-&gt;tx_ring-&gt;cp_ring-&gt;napi;</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;cq_cnt; i++) {</div><div class='add'>+		napi = &amp;pdata-&gt;tx_ring[i]-&gt;cp_ring-&gt;napi;</div><div class='ctx'> 		napi_enable(napi);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -476,12 +975,15 @@ static void xgene_enet_napi_enable(struct xgene_enet_pdata *pdata)</div><div class='ctx'> static void xgene_enet_napi_disable(struct xgene_enet_pdata *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	struct napi_struct *napi;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	napi = &amp;pdata-&gt;rx_ring-&gt;napi;</div><div class='del'>-	napi_disable(napi);</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;rxq_cnt; i++) {</div><div class='add'>+		napi = &amp;pdata-&gt;rx_ring[i]-&gt;napi;</div><div class='add'>+		napi_disable(napi);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (pdata-&gt;cq_cnt) {</div><div class='del'>-		napi = &amp;pdata-&gt;tx_ring-&gt;cp_ring-&gt;napi;</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;cq_cnt; i++) {</div><div class='add'>+		napi = &amp;pdata-&gt;tx_ring[i]-&gt;cp_ring-&gt;napi;</div><div class='ctx'> 		napi_disable(napi);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='hunk'>@@ -489,24 +991,34 @@ static void xgene_enet_napi_disable(struct xgene_enet_pdata *pdata)</div><div class='ctx'> static int xgene_enet_open(struct net_device *ndev)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgene_enet_pdata *pdata = netdev_priv(ndev);</div><div class='del'>-	struct xgene_mac_ops *mac_ops = pdata-&gt;mac_ops;</div><div class='add'>+	const struct xgene_mac_ops *mac_ops = pdata-&gt;mac_ops;</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	mac_ops-&gt;tx_enable(pdata);</div><div class='del'>-	mac_ops-&gt;rx_enable(pdata);</div><div class='add'>+	ret = netif_set_real_num_tx_queues(ndev, pdata-&gt;txq_cnt);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='ctx'> </div><div class='del'>-	ret = xgene_enet_register_irq(ndev);</div><div class='add'>+	ret = netif_set_real_num_rx_queues(ndev, pdata-&gt;rxq_cnt);</div><div class='ctx'> 	if (ret)</div><div class='ctx'> 		return ret;</div><div class='add'>+</div><div class='ctx'> 	xgene_enet_napi_enable(pdata);</div><div class='add'>+	ret = xgene_enet_register_irq(ndev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		xgene_enet_napi_disable(pdata);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (pdata-&gt;phy_mode == PHY_INTERFACE_MODE_RGMII)</div><div class='del'>-		phy_start(pdata-&gt;phy_dev);</div><div class='del'>-	else</div><div class='add'>+	if (ndev-&gt;phydev) {</div><div class='add'>+		phy_start(ndev-&gt;phydev);</div><div class='add'>+	} else {</div><div class='ctx'> 		schedule_delayed_work(&amp;pdata-&gt;link_work, PHY_POLL_LINK_OFF);</div><div class='add'>+		netif_carrier_off(ndev);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	netif_carrier_off(ndev);</div><div class='del'>-	netif_start_queue(ndev);</div><div class='add'>+	mac_ops-&gt;tx_enable(pdata);</div><div class='add'>+	mac_ops-&gt;rx_enable(pdata);</div><div class='add'>+	netif_tx_start_all_queues(ndev);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='hunk'>@@ -514,25 +1026,25 @@ static int xgene_enet_open(struct net_device *ndev)</div><div class='ctx'> static int xgene_enet_close(struct net_device *ndev)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgene_enet_pdata *pdata = netdev_priv(ndev);</div><div class='del'>-	struct xgene_mac_ops *mac_ops = pdata-&gt;mac_ops;</div><div class='add'>+	const struct xgene_mac_ops *mac_ops = pdata-&gt;mac_ops;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	netif_stop_queue(ndev);</div><div class='add'>+	netif_tx_stop_all_queues(ndev);</div><div class='add'>+	mac_ops-&gt;tx_disable(pdata);</div><div class='add'>+	mac_ops-&gt;rx_disable(pdata);</div><div class='ctx'> </div><div class='del'>-	if (pdata-&gt;phy_mode == PHY_INTERFACE_MODE_RGMII)</div><div class='del'>-		phy_stop(pdata-&gt;phy_dev);</div><div class='add'>+	if (ndev-&gt;phydev)</div><div class='add'>+		phy_stop(ndev-&gt;phydev);</div><div class='ctx'> 	else</div><div class='ctx'> 		cancel_delayed_work_sync(&amp;pdata-&gt;link_work);</div><div class='ctx'> </div><div class='del'>-	xgene_enet_napi_disable(pdata);</div><div class='ctx'> 	xgene_enet_free_irq(ndev);</div><div class='del'>-	xgene_enet_process_ring(pdata-&gt;rx_ring, -1);</div><div class='del'>-</div><div class='del'>-	mac_ops-&gt;tx_disable(pdata);</div><div class='del'>-	mac_ops-&gt;rx_disable(pdata);</div><div class='add'>+	xgene_enet_napi_disable(pdata);</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;rxq_cnt; i++)</div><div class='add'>+		xgene_enet_process_ring(pdata-&gt;rx_ring[i], -1);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='del'>-</div><div class='ctx'> static void xgene_enet_delete_ring(struct xgene_enet_desc_ring *ring)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgene_enet_pdata *pdata;</div><div class='hunk'>@@ -542,24 +1054,46 @@ static void xgene_enet_delete_ring(struct xgene_enet_desc_ring *ring)</div><div class='ctx'> 	dev = ndev_to_dev(ring-&gt;ndev);</div><div class='ctx'> </div><div class='ctx'> 	pdata-&gt;ring_ops-&gt;clear(ring);</div><div class='del'>-	dma_free_coherent(dev, ring-&gt;size, ring-&gt;desc_addr, ring-&gt;dma);</div><div class='add'>+	dmam_free_coherent(dev, ring-&gt;size, ring-&gt;desc_addr, ring-&gt;dma);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgene_enet_delete_desc_rings(struct xgene_enet_pdata *pdata)</div><div class='ctx'> {</div><div class='del'>-	struct xgene_enet_desc_ring *buf_pool;</div><div class='add'>+	struct xgene_enet_desc_ring *buf_pool, *page_pool;</div><div class='add'>+	struct xgene_enet_desc_ring *ring;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;txq_cnt; i++) {</div><div class='add'>+		ring = pdata-&gt;tx_ring[i];</div><div class='add'>+		if (ring) {</div><div class='add'>+			xgene_enet_delete_ring(ring);</div><div class='add'>+			pdata-&gt;port_ops-&gt;clear(pdata, ring);</div><div class='add'>+			if (pdata-&gt;cq_cnt)</div><div class='add'>+				xgene_enet_delete_ring(ring-&gt;cp_ring);</div><div class='add'>+			pdata-&gt;tx_ring[i] = NULL;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-	if (pdata-&gt;tx_ring) {</div><div class='del'>-		xgene_enet_delete_ring(pdata-&gt;tx_ring);</div><div class='del'>-		pdata-&gt;tx_ring = NULL;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	if (pdata-&gt;rx_ring) {</div><div class='del'>-		buf_pool = pdata-&gt;rx_ring-&gt;buf_pool;</div><div class='del'>-		xgene_enet_delete_bufpool(buf_pool);</div><div class='del'>-		xgene_enet_delete_ring(buf_pool);</div><div class='del'>-		xgene_enet_delete_ring(pdata-&gt;rx_ring);</div><div class='del'>-		pdata-&gt;rx_ring = NULL;</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;rxq_cnt; i++) {</div><div class='add'>+		ring = pdata-&gt;rx_ring[i];</div><div class='add'>+		if (ring) {</div><div class='add'>+			page_pool = ring-&gt;page_pool;</div><div class='add'>+			if (page_pool) {</div><div class='add'>+				xgene_enet_delete_pagepool(page_pool);</div><div class='add'>+				xgene_enet_delete_ring(page_pool);</div><div class='add'>+				pdata-&gt;port_ops-&gt;clear(pdata, page_pool);</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			buf_pool = ring-&gt;buf_pool;</div><div class='add'>+			xgene_enet_delete_bufpool(buf_pool);</div><div class='add'>+			xgene_enet_delete_ring(buf_pool);</div><div class='add'>+			pdata-&gt;port_ops-&gt;clear(pdata, buf_pool);</div><div class='add'>+</div><div class='add'>+			xgene_enet_delete_ring(ring);</div><div class='add'>+			pdata-&gt;rx_ring[i] = NULL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -605,33 +1139,56 @@ static void xgene_enet_free_desc_ring(struct xgene_enet_desc_ring *ring)</div><div class='ctx'> </div><div class='ctx'> 	if (ring-&gt;desc_addr) {</div><div class='ctx'> 		pdata-&gt;ring_ops-&gt;clear(ring);</div><div class='del'>-		dma_free_coherent(dev, ring-&gt;size, ring-&gt;desc_addr, ring-&gt;dma);</div><div class='add'>+		dmam_free_coherent(dev, ring-&gt;size, ring-&gt;desc_addr, ring-&gt;dma);</div><div class='ctx'> 	}</div><div class='ctx'> 	devm_kfree(dev, ring);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgene_enet_free_desc_rings(struct xgene_enet_pdata *pdata)</div><div class='ctx'> {</div><div class='add'>+	struct xgene_enet_desc_ring *page_pool;</div><div class='ctx'> 	struct device *dev = &amp;pdata-&gt;pdev-&gt;dev;</div><div class='ctx'> 	struct xgene_enet_desc_ring *ring;</div><div class='add'>+	void *p;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;txq_cnt; i++) {</div><div class='add'>+		ring = pdata-&gt;tx_ring[i];</div><div class='add'>+		if (ring) {</div><div class='add'>+			if (ring-&gt;cp_ring &amp;&amp; ring-&gt;cp_ring-&gt;cp_skb)</div><div class='add'>+				devm_kfree(dev, ring-&gt;cp_ring-&gt;cp_skb);</div><div class='ctx'> </div><div class='del'>-	ring = pdata-&gt;tx_ring;</div><div class='del'>-	if (ring) {</div><div class='del'>-		if (ring-&gt;cp_ring &amp;&amp; ring-&gt;cp_ring-&gt;cp_skb)</div><div class='del'>-			devm_kfree(dev, ring-&gt;cp_ring-&gt;cp_skb);</div><div class='del'>-		if (ring-&gt;cp_ring &amp;&amp; pdata-&gt;cq_cnt)</div><div class='del'>-			xgene_enet_free_desc_ring(ring-&gt;cp_ring);</div><div class='del'>-		xgene_enet_free_desc_ring(ring);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	ring = pdata-&gt;rx_ring;</div><div class='del'>-	if (ring) {</div><div class='del'>-		if (ring-&gt;buf_pool) {</div><div class='del'>-			if (ring-&gt;buf_pool-&gt;rx_skb)</div><div class='del'>-				devm_kfree(dev, ring-&gt;buf_pool-&gt;rx_skb);</div><div class='del'>-			xgene_enet_free_desc_ring(ring-&gt;buf_pool);</div><div class='add'>+			if (ring-&gt;cp_ring &amp;&amp; pdata-&gt;cq_cnt)</div><div class='add'>+				xgene_enet_free_desc_ring(ring-&gt;cp_ring);</div><div class='add'>+</div><div class='add'>+			xgene_enet_free_desc_ring(ring);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;rxq_cnt; i++) {</div><div class='add'>+		ring = pdata-&gt;rx_ring[i];</div><div class='add'>+		if (ring) {</div><div class='add'>+			if (ring-&gt;buf_pool) {</div><div class='add'>+				if (ring-&gt;buf_pool-&gt;rx_skb)</div><div class='add'>+					devm_kfree(dev, ring-&gt;buf_pool-&gt;rx_skb);</div><div class='add'>+</div><div class='add'>+				xgene_enet_free_desc_ring(ring-&gt;buf_pool);</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			page_pool = ring-&gt;page_pool;</div><div class='add'>+			if (page_pool) {</div><div class='add'>+				p = page_pool-&gt;frag_page;</div><div class='add'>+				if (p)</div><div class='add'>+					devm_kfree(dev, p);</div><div class='add'>+</div><div class='add'>+				p = page_pool-&gt;frag_dma_addr;</div><div class='add'>+				if (p)</div><div class='add'>+					devm_kfree(dev, p);</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			xgene_enet_free_desc_ring(ring);</div><div class='ctx'> 		}</div><div class='del'>-		xgene_enet_free_desc_ring(ring);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -658,9 +1215,10 @@ static struct xgene_enet_desc_ring *xgene_enet_create_desc_ring(</div><div class='ctx'> 			struct net_device *ndev, u32 ring_num,</div><div class='ctx'> 			enum xgene_enet_ring_cfgsize cfgsize, u32 ring_id)</div><div class='ctx'> {</div><div class='del'>-	struct xgene_enet_desc_ring *ring;</div><div class='ctx'> 	struct xgene_enet_pdata *pdata = netdev_priv(ndev);</div><div class='ctx'> 	struct device *dev = ndev_to_dev(ndev);</div><div class='add'>+	struct xgene_enet_desc_ring *ring;</div><div class='add'>+	void *irq_mbox_addr;</div><div class='ctx'> 	int size;</div><div class='ctx'> </div><div class='ctx'> 	size = xgene_enet_get_ring_size(dev, cfgsize);</div><div class='hunk'>@@ -677,8 +1235,8 @@ static struct xgene_enet_desc_ring *xgene_enet_create_desc_ring(</div><div class='ctx'> 	ring-&gt;cfgsize = cfgsize;</div><div class='ctx'> 	ring-&gt;id = ring_id;</div><div class='ctx'> </div><div class='del'>-	ring-&gt;desc_addr = dma_zalloc_coherent(dev, size, &amp;ring-&gt;dma,</div><div class='del'>-					      GFP_KERNEL);</div><div class='add'>+	ring-&gt;desc_addr = dmam_alloc_coherent(dev, size, &amp;ring-&gt;dma,</div><div class='add'>+					      GFP_KERNEL | __GFP_ZERO);</div><div class='ctx'> 	if (!ring-&gt;desc_addr) {</div><div class='ctx'> 		devm_kfree(dev, ring);</div><div class='ctx'> 		return NULL;</div><div class='hunk'>@@ -686,14 +1244,16 @@ static struct xgene_enet_desc_ring *xgene_enet_create_desc_ring(</div><div class='ctx'> 	ring-&gt;size = size;</div><div class='ctx'> </div><div class='ctx'> 	if (is_irq_mbox_required(pdata, ring)) {</div><div class='del'>-		ring-&gt;irq_mbox_addr = dma_zalloc_coherent(dev, INTR_MBOX_SIZE,</div><div class='del'>-				&amp;ring-&gt;irq_mbox_dma, GFP_KERNEL);</div><div class='del'>-		if (!ring-&gt;irq_mbox_addr) {</div><div class='del'>-			dma_free_coherent(dev, size, ring-&gt;desc_addr,</div><div class='del'>-					  ring-&gt;dma);</div><div class='add'>+		irq_mbox_addr = dmam_alloc_coherent(dev, INTR_MBOX_SIZE,</div><div class='add'>+						    &amp;ring-&gt;irq_mbox_dma,</div><div class='add'>+						    GFP_KERNEL | __GFP_ZERO);</div><div class='add'>+		if (!irq_mbox_addr) {</div><div class='add'>+			dmam_free_coherent(dev, size, ring-&gt;desc_addr,</div><div class='add'>+					   ring-&gt;dma);</div><div class='ctx'> 			devm_kfree(dev, ring);</div><div class='ctx'> 			return NULL;</div><div class='ctx'> 		}</div><div class='add'>+		ring-&gt;irq_mbox_addr = irq_mbox_addr;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ring-&gt;cmd_base = xgene_enet_ring_cmd_base(pdata, ring);</div><div class='hunk'>@@ -731,99 +1291,176 @@ static enum xgene_ring_owner xgene_derive_ring_owner(struct xgene_enet_pdata *p)</div><div class='ctx'> 	return owner;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static u8 xgene_start_cpu_bufnum(struct xgene_enet_pdata *pdata)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;pdata-&gt;pdev-&gt;dev;</div><div class='add'>+	u32 cpu_bufnum;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = device_property_read_u32(dev, "channel", &amp;cpu_bufnum);</div><div class='add'>+</div><div class='add'>+	return (!ret) ? cpu_bufnum : pdata-&gt;cpu_bufnum;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static int xgene_enet_create_desc_rings(struct net_device *ndev)</div><div class='ctx'> {</div><div class='del'>-	struct xgene_enet_pdata *pdata = netdev_priv(ndev);</div><div class='del'>-	struct device *dev = ndev_to_dev(ndev);</div><div class='ctx'> 	struct xgene_enet_desc_ring *rx_ring, *tx_ring, *cp_ring;</div><div class='add'>+	struct xgene_enet_pdata *pdata = netdev_priv(ndev);</div><div class='add'>+	struct xgene_enet_desc_ring *page_pool = NULL;</div><div class='ctx'> 	struct xgene_enet_desc_ring *buf_pool = NULL;</div><div class='del'>-	enum xgene_ring_owner owner;</div><div class='del'>-	u8 cpu_bufnum = pdata-&gt;cpu_bufnum;</div><div class='add'>+	struct device *dev = ndev_to_dev(ndev);</div><div class='ctx'> 	u8 eth_bufnum = pdata-&gt;eth_bufnum;</div><div class='ctx'> 	u8 bp_bufnum = pdata-&gt;bp_bufnum;</div><div class='ctx'> 	u16 ring_num = pdata-&gt;ring_num;</div><div class='del'>-	u16 ring_id;</div><div class='del'>-	int ret;</div><div class='add'>+	enum xgene_ring_owner owner;</div><div class='add'>+	dma_addr_t dma_exp_bufs;</div><div class='add'>+	u16 ring_id, slots;</div><div class='add'>+	__le64 *exp_bufs;</div><div class='add'>+	int i, ret, size;</div><div class='add'>+	u8 cpu_bufnum;</div><div class='ctx'> </div><div class='del'>-	/* allocate rx descriptor ring */</div><div class='del'>-	owner = xgene_derive_ring_owner(pdata);</div><div class='del'>-	ring_id = xgene_enet_get_ring_id(RING_OWNER_CPU, cpu_bufnum++);</div><div class='del'>-	rx_ring = xgene_enet_create_desc_ring(ndev, ring_num++,</div><div class='del'>-					      RING_CFGSIZE_16KB, ring_id);</div><div class='del'>-	if (!rx_ring) {</div><div class='del'>-		ret = -ENOMEM;</div><div class='del'>-		goto err;</div><div class='del'>-	}</div><div class='add'>+	cpu_bufnum = xgene_start_cpu_bufnum(pdata);</div><div class='ctx'> </div><div class='del'>-	/* allocate buffer pool for receiving packets */</div><div class='del'>-	owner = xgene_derive_ring_owner(pdata);</div><div class='del'>-	ring_id = xgene_enet_get_ring_id(owner, bp_bufnum++);</div><div class='del'>-	buf_pool = xgene_enet_create_desc_ring(ndev, ring_num++,</div><div class='del'>-					       RING_CFGSIZE_2KB, ring_id);</div><div class='del'>-	if (!buf_pool) {</div><div class='del'>-		ret = -ENOMEM;</div><div class='del'>-		goto err;</div><div class='del'>-	}</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;rxq_cnt; i++) {</div><div class='add'>+		/* allocate rx descriptor ring */</div><div class='add'>+		owner = xgene_derive_ring_owner(pdata);</div><div class='add'>+		ring_id = xgene_enet_get_ring_id(RING_OWNER_CPU, cpu_bufnum++);</div><div class='add'>+		rx_ring = xgene_enet_create_desc_ring(ndev, ring_num++,</div><div class='add'>+						      RING_CFGSIZE_16KB,</div><div class='add'>+						      ring_id);</div><div class='add'>+		if (!rx_ring) {</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-	rx_ring-&gt;nbufpool = NUM_BUFPOOL;</div><div class='del'>-	rx_ring-&gt;buf_pool = buf_pool;</div><div class='del'>-	rx_ring-&gt;irq = pdata-&gt;rx_irq;</div><div class='del'>-	if (!pdata-&gt;cq_cnt) {</div><div class='del'>-		snprintf(rx_ring-&gt;irq_name, IRQ_ID_SIZE, "%s-rx-txc",</div><div class='del'>-			 ndev-&gt;name);</div><div class='del'>-	} else {</div><div class='del'>-		snprintf(rx_ring-&gt;irq_name, IRQ_ID_SIZE, "%s-rx", ndev-&gt;name);</div><div class='del'>-	}</div><div class='del'>-	buf_pool-&gt;rx_skb = devm_kcalloc(dev, buf_pool-&gt;slots,</div><div class='del'>-					sizeof(struct sk_buff *), GFP_KERNEL);</div><div class='del'>-	if (!buf_pool-&gt;rx_skb) {</div><div class='del'>-		ret = -ENOMEM;</div><div class='del'>-		goto err;</div><div class='del'>-	}</div><div class='add'>+		/* allocate buffer pool for receiving packets */</div><div class='add'>+		owner = xgene_derive_ring_owner(pdata);</div><div class='add'>+		ring_id = xgene_enet_get_ring_id(owner, bp_bufnum++);</div><div class='add'>+		buf_pool = xgene_enet_create_desc_ring(ndev, ring_num++,</div><div class='add'>+						       RING_CFGSIZE_16KB,</div><div class='add'>+						       ring_id);</div><div class='add'>+		if (!buf_pool) {</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		rx_ring-&gt;nbufpool = NUM_BUFPOOL;</div><div class='add'>+		rx_ring-&gt;npagepool = NUM_NXTBUFPOOL;</div><div class='add'>+		rx_ring-&gt;irq = pdata-&gt;irqs[i];</div><div class='add'>+		buf_pool-&gt;rx_skb = devm_kcalloc(dev, buf_pool-&gt;slots,</div><div class='add'>+						sizeof(struct sk_buff *),</div><div class='add'>+						GFP_KERNEL);</div><div class='add'>+		if (!buf_pool-&gt;rx_skb) {</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-	buf_pool-&gt;dst_ring_num = xgene_enet_dst_ring_num(buf_pool);</div><div class='del'>-	rx_ring-&gt;buf_pool = buf_pool;</div><div class='del'>-	pdata-&gt;rx_ring = rx_ring;</div><div class='add'>+		buf_pool-&gt;dst_ring_num = xgene_enet_dst_ring_num(buf_pool);</div><div class='add'>+		rx_ring-&gt;buf_pool = buf_pool;</div><div class='add'>+		pdata-&gt;rx_ring[i] = rx_ring;</div><div class='ctx'> </div><div class='del'>-	/* allocate tx descriptor ring */</div><div class='del'>-	owner = xgene_derive_ring_owner(pdata);</div><div class='del'>-	ring_id = xgene_enet_get_ring_id(owner, eth_bufnum++);</div><div class='del'>-	tx_ring = xgene_enet_create_desc_ring(ndev, ring_num++,</div><div class='del'>-					      RING_CFGSIZE_16KB, ring_id);</div><div class='del'>-	if (!tx_ring) {</div><div class='del'>-		ret = -ENOMEM;</div><div class='del'>-		goto err;</div><div class='add'>+		if ((pdata-&gt;enet_id == XGENE_ENET1 &amp;&amp;  pdata-&gt;rxq_cnt &gt; 4) ||</div><div class='add'>+		    (pdata-&gt;enet_id == XGENE_ENET2 &amp;&amp;  pdata-&gt;rxq_cnt &gt; 16)) {</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* allocate next buffer pool for jumbo packets */</div><div class='add'>+		owner = xgene_derive_ring_owner(pdata);</div><div class='add'>+		ring_id = xgene_enet_get_ring_id(owner, bp_bufnum++);</div><div class='add'>+		page_pool = xgene_enet_create_desc_ring(ndev, ring_num++,</div><div class='add'>+							RING_CFGSIZE_16KB,</div><div class='add'>+							ring_id);</div><div class='add'>+		if (!page_pool) {</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		slots = page_pool-&gt;slots;</div><div class='add'>+		page_pool-&gt;frag_page = devm_kcalloc(dev, slots,</div><div class='add'>+						    sizeof(struct page *),</div><div class='add'>+						    GFP_KERNEL);</div><div class='add'>+		if (!page_pool-&gt;frag_page) {</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		page_pool-&gt;frag_dma_addr = devm_kcalloc(dev, slots,</div><div class='add'>+							sizeof(dma_addr_t),</div><div class='add'>+							GFP_KERNEL);</div><div class='add'>+		if (!page_pool-&gt;frag_dma_addr) {</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		page_pool-&gt;dst_ring_num = xgene_enet_dst_ring_num(page_pool);</div><div class='add'>+		rx_ring-&gt;page_pool = page_pool;</div><div class='ctx'> 	}</div><div class='del'>-	pdata-&gt;tx_ring = tx_ring;</div><div class='ctx'> </div><div class='del'>-	if (!pdata-&gt;cq_cnt) {</div><div class='del'>-		cp_ring = pdata-&gt;rx_ring;</div><div class='del'>-	} else {</div><div class='del'>-		/* allocate tx completion descriptor ring */</div><div class='del'>-		ring_id = xgene_enet_get_ring_id(RING_OWNER_CPU, cpu_bufnum++);</div><div class='del'>-		cp_ring = xgene_enet_create_desc_ring(ndev, ring_num++,</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;txq_cnt; i++) {</div><div class='add'>+		/* allocate tx descriptor ring */</div><div class='add'>+		owner = xgene_derive_ring_owner(pdata);</div><div class='add'>+		ring_id = xgene_enet_get_ring_id(owner, eth_bufnum++);</div><div class='add'>+		tx_ring = xgene_enet_create_desc_ring(ndev, ring_num++,</div><div class='ctx'> 						      RING_CFGSIZE_16KB,</div><div class='ctx'> 						      ring_id);</div><div class='del'>-		if (!cp_ring) {</div><div class='add'>+		if (!tx_ring) {</div><div class='ctx'> 			ret = -ENOMEM;</div><div class='ctx'> 			goto err;</div><div class='ctx'> 		}</div><div class='del'>-		cp_ring-&gt;irq = pdata-&gt;txc_irq;</div><div class='del'>-		snprintf(cp_ring-&gt;irq_name, IRQ_ID_SIZE, "%s-txc", ndev-&gt;name);</div><div class='del'>-	}</div><div class='ctx'> </div><div class='del'>-	cp_ring-&gt;cp_skb = devm_kcalloc(dev, tx_ring-&gt;slots,</div><div class='del'>-				       sizeof(struct sk_buff *), GFP_KERNEL);</div><div class='del'>-	if (!cp_ring-&gt;cp_skb) {</div><div class='del'>-		ret = -ENOMEM;</div><div class='del'>-		goto err;</div><div class='add'>+		size = (tx_ring-&gt;slots / 2) * sizeof(__le64) * MAX_EXP_BUFFS;</div><div class='add'>+		exp_bufs = dmam_alloc_coherent(dev, size, &amp;dma_exp_bufs,</div><div class='add'>+					       GFP_KERNEL | __GFP_ZERO);</div><div class='add'>+		if (!exp_bufs) {</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+		tx_ring-&gt;exp_bufs = exp_bufs;</div><div class='add'>+</div><div class='add'>+		pdata-&gt;tx_ring[i] = tx_ring;</div><div class='add'>+</div><div class='add'>+		if (!pdata-&gt;cq_cnt) {</div><div class='add'>+			cp_ring = pdata-&gt;rx_ring[i];</div><div class='add'>+		} else {</div><div class='add'>+			/* allocate tx completion descriptor ring */</div><div class='add'>+			ring_id = xgene_enet_get_ring_id(RING_OWNER_CPU,</div><div class='add'>+							 cpu_bufnum++);</div><div class='add'>+			cp_ring = xgene_enet_create_desc_ring(ndev, ring_num++,</div><div class='add'>+							      RING_CFGSIZE_16KB,</div><div class='add'>+							      ring_id);</div><div class='add'>+			if (!cp_ring) {</div><div class='add'>+				ret = -ENOMEM;</div><div class='add'>+				goto err;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			cp_ring-&gt;irq = pdata-&gt;irqs[pdata-&gt;rxq_cnt + i];</div><div class='add'>+			cp_ring-&gt;index = i;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		cp_ring-&gt;cp_skb = devm_kcalloc(dev, tx_ring-&gt;slots,</div><div class='add'>+					       sizeof(struct sk_buff *),</div><div class='add'>+					       GFP_KERNEL);</div><div class='add'>+		if (!cp_ring-&gt;cp_skb) {</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		size = sizeof(dma_addr_t) * MAX_SKB_FRAGS;</div><div class='add'>+		cp_ring-&gt;frag_dma_addr = devm_kcalloc(dev, tx_ring-&gt;slots,</div><div class='add'>+						      size, GFP_KERNEL);</div><div class='add'>+		if (!cp_ring-&gt;frag_dma_addr) {</div><div class='add'>+			devm_kfree(dev, cp_ring-&gt;cp_skb);</div><div class='add'>+			ret = -ENOMEM;</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		tx_ring-&gt;cp_ring = cp_ring;</div><div class='add'>+		tx_ring-&gt;dst_ring_num = xgene_enet_dst_ring_num(cp_ring);</div><div class='ctx'> 	}</div><div class='del'>-	pdata-&gt;tx_ring-&gt;cp_ring = cp_ring;</div><div class='del'>-	pdata-&gt;tx_ring-&gt;dst_ring_num = xgene_enet_dst_ring_num(cp_ring);</div><div class='ctx'> </div><div class='del'>-	pdata-&gt;tx_qcnt_hi = pdata-&gt;tx_ring-&gt;slots / 2;</div><div class='del'>-	pdata-&gt;cp_qcnt_hi = pdata-&gt;rx_ring-&gt;slots / 2;</div><div class='del'>-	pdata-&gt;cp_qcnt_low = pdata-&gt;cp_qcnt_hi / 2;</div><div class='add'>+	if (pdata-&gt;ring_ops-&gt;coalesce)</div><div class='add'>+		pdata-&gt;ring_ops-&gt;coalesce(pdata-&gt;tx_ring[0]);</div><div class='add'>+	pdata-&gt;tx_qcnt_hi = pdata-&gt;tx_ring[0]-&gt;slots - 128;</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> </div><div class='hunk'>@@ -832,20 +1469,41 @@ err:</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static struct rtnl_link_stats64 *xgene_enet_get_stats64(</div><div class='add'>+static void xgene_enet_get_stats64(</div><div class='ctx'> 			struct net_device *ndev,</div><div class='del'>-			struct rtnl_link_stats64 *storage)</div><div class='add'>+			struct rtnl_link_stats64 *stats)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgene_enet_pdata *pdata = netdev_priv(ndev);</div><div class='del'>-	struct rtnl_link_stats64 *stats = &amp;pdata-&gt;stats;</div><div class='add'>+	struct xgene_enet_desc_ring *ring;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	stats-&gt;rx_errors += stats-&gt;rx_length_errors +</div><div class='del'>-			    stats-&gt;rx_crc_errors +</div><div class='del'>-			    stats-&gt;rx_frame_errors +</div><div class='del'>-			    stats-&gt;rx_fifo_errors;</div><div class='del'>-	memcpy(storage, &amp;pdata-&gt;stats, sizeof(struct rtnl_link_stats64));</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;txq_cnt; i++) {</div><div class='add'>+		ring = pdata-&gt;tx_ring[i];</div><div class='add'>+		if (ring) {</div><div class='add'>+			stats-&gt;tx_packets += ring-&gt;tx_packets;</div><div class='add'>+			stats-&gt;tx_bytes += ring-&gt;tx_bytes;</div><div class='add'>+			stats-&gt;tx_dropped += ring-&gt;tx_dropped;</div><div class='add'>+			stats-&gt;tx_errors += ring-&gt;tx_errors;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	return storage;</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;rxq_cnt; i++) {</div><div class='add'>+		ring = pdata-&gt;rx_ring[i];</div><div class='add'>+		if (ring) {</div><div class='add'>+			stats-&gt;rx_packets += ring-&gt;rx_packets;</div><div class='add'>+			stats-&gt;rx_bytes += ring-&gt;rx_bytes;</div><div class='add'>+			stats-&gt;rx_dropped += ring-&gt;rx_dropped;</div><div class='add'>+			stats-&gt;rx_errors += ring-&gt;rx_errors +</div><div class='add'>+				ring-&gt;rx_length_errors +</div><div class='add'>+				ring-&gt;rx_crc_errors +</div><div class='add'>+				ring-&gt;rx_frame_errors +</div><div class='add'>+				ring-&gt;rx_fifo_errors;</div><div class='add'>+			stats-&gt;rx_length_errors += ring-&gt;rx_length_errors;</div><div class='add'>+			stats-&gt;rx_crc_errors += ring-&gt;rx_crc_errors;</div><div class='add'>+			stats-&gt;rx_frame_errors += ring-&gt;rx_frame_errors;</div><div class='add'>+			stats-&gt;rx_fifo_errors += ring-&gt;rx_fifo_errors;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int xgene_enet_set_mac_address(struct net_device *ndev, void *addr)</div><div class='hunk'>@@ -861,18 +1519,36 @@ static int xgene_enet_set_mac_address(struct net_device *ndev, void *addr)</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static int xgene_change_mtu(struct net_device *ndev, int new_mtu)</div><div class='add'>+{</div><div class='add'>+	struct xgene_enet_pdata *pdata = netdev_priv(ndev);</div><div class='add'>+	int frame_size;</div><div class='add'>+</div><div class='add'>+	if (!netif_running(ndev))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	frame_size = (new_mtu &gt; ETH_DATA_LEN) ? (new_mtu + 18) : 0x600;</div><div class='add'>+</div><div class='add'>+	xgene_enet_close(ndev);</div><div class='add'>+	WRITE_ONCE(ndev-&gt;mtu, new_mtu);</div><div class='add'>+	pdata-&gt;mac_ops-&gt;set_framesize(pdata, frame_size);</div><div class='add'>+	xgene_enet_open(ndev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static const struct net_device_ops xgene_ndev_ops = {</div><div class='ctx'> 	.ndo_open = xgene_enet_open,</div><div class='ctx'> 	.ndo_stop = xgene_enet_close,</div><div class='ctx'> 	.ndo_start_xmit = xgene_enet_start_xmit,</div><div class='ctx'> 	.ndo_tx_timeout = xgene_enet_timeout,</div><div class='ctx'> 	.ndo_get_stats64 = xgene_enet_get_stats64,</div><div class='del'>-	.ndo_change_mtu = eth_change_mtu,</div><div class='add'>+	.ndo_change_mtu = xgene_change_mtu,</div><div class='ctx'> 	.ndo_set_mac_address = xgene_enet_set_mac_address,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> #ifdef CONFIG_ACPI</div><div class='del'>-static int xgene_get_port_id_acpi(struct device *dev,</div><div class='add'>+static void xgene_get_port_id_acpi(struct device *dev,</div><div class='ctx'> 				  struct xgene_enet_pdata *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	acpi_status status;</div><div class='hunk'>@@ -885,59 +1561,122 @@ static int xgene_get_port_id_acpi(struct device *dev,</div><div class='ctx'> 		pdata-&gt;port_id = temp;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return 0;</div><div class='add'>+	return;</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-static int xgene_get_port_id_dt(struct device *dev, struct xgene_enet_pdata *pdata)</div><div class='add'>+static void xgene_get_port_id_dt(struct device *dev, struct xgene_enet_pdata *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	u32 id = 0;</div><div class='del'>-	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = of_property_read_u32(dev-&gt;of_node, "port-id", &amp;id);</div><div class='add'>+	of_property_read_u32(dev-&gt;of_node, "port-id", &amp;id);</div><div class='add'>+</div><div class='add'>+	pdata-&gt;port_id = id &amp; BIT(0);</div><div class='add'>+</div><div class='add'>+	return;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgene_get_tx_delay(struct xgene_enet_pdata *pdata)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;pdata-&gt;pdev-&gt;dev;</div><div class='add'>+	int delay, ret;</div><div class='add'>+</div><div class='add'>+	ret = device_property_read_u32(dev, "tx-delay", &amp;delay);</div><div class='ctx'> 	if (ret) {</div><div class='del'>-		pdata-&gt;port_id = 0;</div><div class='del'>-		ret = 0;</div><div class='del'>-	} else {</div><div class='del'>-		pdata-&gt;port_id = id &amp; BIT(0);</div><div class='add'>+		pdata-&gt;tx_delay = 4;</div><div class='add'>+		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	if (delay &lt; 0 || delay &gt; 7) {</div><div class='add'>+		dev_err(dev, "Invalid tx-delay specified\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pdata-&gt;tx_delay = delay;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgene_get_rx_delay(struct xgene_enet_pdata *pdata)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;pdata-&gt;pdev-&gt;dev;</div><div class='add'>+	int delay, ret;</div><div class='add'>+</div><div class='add'>+	ret = device_property_read_u32(dev, "rx-delay", &amp;delay);</div><div class='add'>+	if (ret) {</div><div class='add'>+		pdata-&gt;rx_delay = 2;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (delay &lt; 0 || delay &gt; 7) {</div><div class='add'>+		dev_err(dev, "Invalid rx-delay specified\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pdata-&gt;rx_delay = delay;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgene_get_mac_address(struct device *dev,</div><div class='del'>-				 unsigned char *addr)</div><div class='add'>+static int xgene_enet_get_irqs(struct xgene_enet_pdata *pdata)</div><div class='add'>+{</div><div class='add'>+	struct platform_device *pdev = pdata-&gt;pdev;</div><div class='add'>+	int i, ret, max_irqs;</div><div class='add'>+</div><div class='add'>+	if (phy_interface_mode_is_rgmii(pdata-&gt;phy_mode))</div><div class='add'>+		max_irqs = 1;</div><div class='add'>+	else if (pdata-&gt;phy_mode == PHY_INTERFACE_MODE_SGMII)</div><div class='add'>+		max_irqs = 2;</div><div class='add'>+	else</div><div class='add'>+		max_irqs = XGENE_MAX_ENET_IRQ;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; max_irqs; i++) {</div><div class='add'>+		ret = platform_get_irq(pdev, i);</div><div class='add'>+		if (ret &lt; 0) {</div><div class='add'>+			if (pdata-&gt;phy_mode == PHY_INTERFACE_MODE_XGMII) {</div><div class='add'>+				max_irqs = i;</div><div class='add'>+				pdata-&gt;rxq_cnt = max_irqs / 2;</div><div class='add'>+				pdata-&gt;txq_cnt = max_irqs / 2;</div><div class='add'>+				pdata-&gt;cq_cnt = max_irqs / 2;</div><div class='add'>+				break;</div><div class='add'>+			}</div><div class='add'>+			return ret;</div><div class='add'>+		}</div><div class='add'>+		pdata-&gt;irqs[i] = ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgene_enet_check_phy_handle(struct xgene_enet_pdata *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ret = device_property_read_u8_array(dev, "local-mac-address", addr, 6);</div><div class='del'>-	if (ret)</div><div class='del'>-		ret = device_property_read_u8_array(dev, "mac-address",</div><div class='del'>-						    addr, 6);</div><div class='del'>-	if (ret)</div><div class='del'>-		return -ENODEV;</div><div class='add'>+	if (pdata-&gt;phy_mode == PHY_INTERFACE_MODE_XGMII)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!IS_ENABLED(CONFIG_MDIO_XGENE))</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	return ETH_ALEN;</div><div class='add'>+	ret = xgene_enet_phy_connect(pdata-&gt;ndev);</div><div class='add'>+	if (!ret)</div><div class='add'>+		pdata-&gt;mdio_driver = true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgene_get_phy_mode(struct device *dev)</div><div class='add'>+static void xgene_enet_gpiod_get(struct xgene_enet_pdata *pdata)</div><div class='ctx'> {</div><div class='del'>-	int i, ret;</div><div class='del'>-	char *modestr;</div><div class='add'>+	struct device *dev = &amp;pdata-&gt;pdev-&gt;dev;</div><div class='ctx'> </div><div class='del'>-	ret = device_property_read_string(dev, "phy-connection-type",</div><div class='del'>-					  (const char **)&amp;modestr);</div><div class='del'>-	if (ret)</div><div class='del'>-		ret = device_property_read_string(dev, "phy-mode",</div><div class='del'>-						  (const char **)&amp;modestr);</div><div class='del'>-	if (ret)</div><div class='del'>-		return -ENODEV;</div><div class='add'>+	pdata-&gt;sfp_gpio_en = false;</div><div class='add'>+	if (pdata-&gt;phy_mode != PHY_INTERFACE_MODE_XGMII ||</div><div class='add'>+	    (!device_property_present(dev, "sfp-gpios") &amp;&amp;</div><div class='add'>+	     !device_property_present(dev, "rxlos-gpios")))</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; PHY_INTERFACE_MODE_MAX; i++) {</div><div class='del'>-		if (!strcasecmp(modestr, phy_modes(i)))</div><div class='del'>-			return i;</div><div class='del'>-	}</div><div class='del'>-	return -ENODEV;</div><div class='add'>+	pdata-&gt;sfp_gpio_en = true;</div><div class='add'>+	pdata-&gt;sfp_rdy = gpiod_get(dev, "rxlos", GPIOD_IN);</div><div class='add'>+	if (IS_ERR(pdata-&gt;sfp_rdy))</div><div class='add'>+		pdata-&gt;sfp_rdy = gpiod_get(dev, "sfp", GPIOD_IN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int xgene_enet_get_resources(struct xgene_enet_pdata *pdata)</div><div class='hunk'>@@ -990,55 +1729,55 @@ static int xgene_enet_get_resources(struct xgene_enet_pdata *pdata)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (dev-&gt;of_node)</div><div class='del'>-		ret = xgene_get_port_id_dt(dev, pdata);</div><div class='add'>+		xgene_get_port_id_dt(dev, pdata);</div><div class='ctx'> #ifdef CONFIG_ACPI</div><div class='ctx'> 	else</div><div class='del'>-		ret = xgene_get_port_id_acpi(dev, pdata);</div><div class='add'>+		xgene_get_port_id_acpi(dev, pdata);</div><div class='ctx'> #endif</div><div class='del'>-	if (ret)</div><div class='del'>-		return ret;</div><div class='ctx'> </div><div class='del'>-	if (xgene_get_mac_address(dev, ndev-&gt;dev_addr) != ETH_ALEN)</div><div class='add'>+	if (device_get_ethdev_address(dev, ndev))</div><div class='ctx'> 		eth_hw_addr_random(ndev);</div><div class='ctx'> </div><div class='ctx'> 	memcpy(ndev-&gt;perm_addr, ndev-&gt;dev_addr, ndev-&gt;addr_len);</div><div class='ctx'> </div><div class='del'>-	pdata-&gt;phy_mode = xgene_get_phy_mode(dev);</div><div class='add'>+	pdata-&gt;phy_mode = device_get_phy_mode(dev);</div><div class='ctx'> 	if (pdata-&gt;phy_mode &lt; 0) {</div><div class='ctx'> 		dev_err(dev, "Unable to get phy-connection-type\n");</div><div class='ctx'> 		return pdata-&gt;phy_mode;</div><div class='ctx'> 	}</div><div class='del'>-	if (pdata-&gt;phy_mode != PHY_INTERFACE_MODE_RGMII &amp;&amp;</div><div class='add'>+	if (!phy_interface_mode_is_rgmii(pdata-&gt;phy_mode) &amp;&amp;</div><div class='ctx'> 	    pdata-&gt;phy_mode != PHY_INTERFACE_MODE_SGMII &amp;&amp;</div><div class='ctx'> 	    pdata-&gt;phy_mode != PHY_INTERFACE_MODE_XGMII) {</div><div class='ctx'> 		dev_err(dev, "Incorrect phy-connection-type specified\n");</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	ret = platform_get_irq(pdev, 0);</div><div class='del'>-	if (ret &lt;= 0) {</div><div class='del'>-		dev_err(dev, "Unable to get ENET Rx IRQ\n");</div><div class='del'>-		ret = ret ? : -ENXIO;</div><div class='add'>+	ret = xgene_get_tx_delay(pdata);</div><div class='add'>+	if (ret)</div><div class='ctx'> 		return ret;</div><div class='del'>-	}</div><div class='del'>-	pdata-&gt;rx_irq = ret;</div><div class='ctx'> </div><div class='del'>-	if (pdata-&gt;phy_mode != PHY_INTERFACE_MODE_RGMII) {</div><div class='del'>-		ret = platform_get_irq(pdev, 1);</div><div class='del'>-		if (ret &lt;= 0) {</div><div class='del'>-			pdata-&gt;cq_cnt = 0;</div><div class='del'>-			dev_info(dev, "Unable to get Tx completion IRQ,"</div><div class='del'>-				 "using Rx IRQ instead\n");</div><div class='del'>-		} else {</div><div class='del'>-			pdata-&gt;cq_cnt = XGENE_MAX_TXC_RINGS;</div><div class='del'>-			pdata-&gt;txc_irq = ret;</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='add'>+	ret = xgene_get_rx_delay(pdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = xgene_enet_get_irqs(pdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	xgene_enet_gpiod_get(pdata);</div><div class='ctx'> </div><div class='ctx'> 	pdata-&gt;clk = devm_clk_get(&amp;pdev-&gt;dev, NULL);</div><div class='ctx'> 	if (IS_ERR(pdata-&gt;clk)) {</div><div class='del'>-		/* Firmware may have set up the clock already. */</div><div class='del'>-		dev_info(dev, "clocks have been setup already\n");</div><div class='add'>+		if (pdata-&gt;phy_mode != PHY_INTERFACE_MODE_SGMII) {</div><div class='add'>+			/* Abort if the clock is defined but couldn't be</div><div class='add'>+			 * retrived. Always abort if the clock is missing on</div><div class='add'>+			 * DT system as the driver can't cope with this case.</div><div class='add'>+			 */</div><div class='add'>+			if (PTR_ERR(pdata-&gt;clk) != -ENOENT || dev-&gt;of_node)</div><div class='add'>+				return PTR_ERR(pdata-&gt;clk);</div><div class='add'>+			/* Firmware may have set up the clock already. */</div><div class='add'>+			dev_info(dev, "clocks have been setup already\n");</div><div class='add'>+		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (pdata-&gt;phy_mode != PHY_INTERFACE_MODE_XGMII)</div><div class='hunk'>@@ -1046,18 +1785,23 @@ static int xgene_enet_get_resources(struct xgene_enet_pdata *pdata)</div><div class='ctx'> 	else</div><div class='ctx'> 		base_addr = pdata-&gt;base_addr;</div><div class='ctx'> 	pdata-&gt;eth_csr_addr = base_addr + BLOCK_ETH_CSR_OFFSET;</div><div class='add'>+	pdata-&gt;cle.base = base_addr + BLOCK_ETH_CLE_CSR_OFFSET;</div><div class='ctx'> 	pdata-&gt;eth_ring_if_addr = base_addr + BLOCK_ETH_RING_IF_OFFSET;</div><div class='ctx'> 	pdata-&gt;eth_diag_csr_addr = base_addr + BLOCK_ETH_DIAG_CSR_OFFSET;</div><div class='del'>-	if (pdata-&gt;phy_mode == PHY_INTERFACE_MODE_RGMII ||</div><div class='add'>+	if (phy_interface_mode_is_rgmii(pdata-&gt;phy_mode) ||</div><div class='ctx'> 	    pdata-&gt;phy_mode == PHY_INTERFACE_MODE_SGMII) {</div><div class='ctx'> 		pdata-&gt;mcx_mac_addr = pdata-&gt;base_addr + BLOCK_ETH_MAC_OFFSET;</div><div class='add'>+		pdata-&gt;mcx_stats_addr =</div><div class='add'>+			pdata-&gt;base_addr + BLOCK_ETH_STATS_OFFSET;</div><div class='ctx'> 		offset = (pdata-&gt;enet_id == XGENE_ENET1) ?</div><div class='ctx'> 			  BLOCK_ETH_MAC_CSR_OFFSET :</div><div class='ctx'> 			  X2_BLOCK_ETH_MAC_CSR_OFFSET;</div><div class='ctx'> 		pdata-&gt;mcx_mac_csr_addr = base_addr + offset;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		pdata-&gt;mcx_mac_addr = base_addr + BLOCK_AXG_MAC_OFFSET;</div><div class='add'>+		pdata-&gt;mcx_stats_addr = base_addr + BLOCK_AXG_STATS_OFFSET;</div><div class='ctx'> 		pdata-&gt;mcx_mac_csr_addr = base_addr + BLOCK_AXG_MAC_CSR_OFFSET;</div><div class='add'>+		pdata-&gt;pcs_addr = base_addr + BLOCK_PCS_OFFSET;</div><div class='ctx'> 	}</div><div class='ctx'> 	pdata-&gt;rx_buff_cnt = NUM_PKT_BUF;</div><div class='ctx'> </div><div class='hunk'>@@ -1066,10 +1810,13 @@ static int xgene_enet_get_resources(struct xgene_enet_pdata *pdata)</div><div class='ctx'> </div><div class='ctx'> static int xgene_enet_init_hw(struct xgene_enet_pdata *pdata)</div><div class='ctx'> {</div><div class='add'>+	struct xgene_enet_cle *enet_cle = &amp;pdata-&gt;cle;</div><div class='add'>+	struct xgene_enet_desc_ring *page_pool;</div><div class='ctx'> 	struct net_device *ndev = pdata-&gt;ndev;</div><div class='ctx'> 	struct xgene_enet_desc_ring *buf_pool;</div><div class='del'>-	u16 dst_ring_num;</div><div class='del'>-	int ret;</div><div class='add'>+	u16 dst_ring_num, ring_id;</div><div class='add'>+	int i, ret;</div><div class='add'>+	u32 count;</div><div class='ctx'> </div><div class='ctx'> 	ret = pdata-&gt;port_ops-&gt;reset(pdata);</div><div class='ctx'> 	if (ret)</div><div class='hunk'>@@ -1082,54 +1829,122 @@ static int xgene_enet_init_hw(struct xgene_enet_pdata *pdata)</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	/* setup buffer pool */</div><div class='del'>-	buf_pool = pdata-&gt;rx_ring-&gt;buf_pool;</div><div class='del'>-	xgene_enet_init_bufpool(buf_pool);</div><div class='del'>-	ret = xgene_enet_refill_bufpool(buf_pool, pdata-&gt;rx_buff_cnt);</div><div class='del'>-	if (ret) {</div><div class='del'>-		xgene_enet_delete_desc_rings(pdata);</div><div class='del'>-		return ret;</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;rxq_cnt; i++) {</div><div class='add'>+		buf_pool = pdata-&gt;rx_ring[i]-&gt;buf_pool;</div><div class='add'>+		xgene_enet_init_bufpool(buf_pool);</div><div class='add'>+		page_pool = pdata-&gt;rx_ring[i]-&gt;page_pool;</div><div class='add'>+		xgene_enet_init_bufpool(page_pool);</div><div class='add'>+</div><div class='add'>+		count = pdata-&gt;rx_buff_cnt;</div><div class='add'>+		ret = xgene_enet_refill_bufpool(buf_pool, count);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='add'>+		ret = xgene_enet_refill_pagepool(page_pool, count);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto err;</div><div class='add'>+</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	dst_ring_num = xgene_enet_dst_ring_num(pdata-&gt;rx_ring);</div><div class='del'>-	pdata-&gt;port_ops-&gt;cle_bypass(pdata, dst_ring_num, buf_pool-&gt;id);</div><div class='add'>+	dst_ring_num = xgene_enet_dst_ring_num(pdata-&gt;rx_ring[0]);</div><div class='add'>+	buf_pool = pdata-&gt;rx_ring[0]-&gt;buf_pool;</div><div class='add'>+	if (pdata-&gt;phy_mode == PHY_INTERFACE_MODE_XGMII) {</div><div class='add'>+		/* Initialize and Enable  PreClassifier Tree */</div><div class='add'>+		enet_cle-&gt;max_nodes = 512;</div><div class='add'>+		enet_cle-&gt;max_dbptrs = 1024;</div><div class='add'>+		enet_cle-&gt;parsers = 3;</div><div class='add'>+		enet_cle-&gt;active_parser = PARSER_ALL;</div><div class='add'>+		enet_cle-&gt;ptree.start_node = 0;</div><div class='add'>+		enet_cle-&gt;ptree.start_dbptr = 0;</div><div class='add'>+		enet_cle-&gt;jump_bytes = 8;</div><div class='add'>+		ret = pdata-&gt;cle_ops-&gt;cle_init(pdata);</div><div class='add'>+		if (ret) {</div><div class='add'>+			netdev_err(ndev, "Preclass Tree init error\n");</div><div class='add'>+			goto err;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+	} else {</div><div class='add'>+		dst_ring_num = xgene_enet_dst_ring_num(pdata-&gt;rx_ring[0]);</div><div class='add'>+		buf_pool = pdata-&gt;rx_ring[0]-&gt;buf_pool;</div><div class='add'>+		page_pool = pdata-&gt;rx_ring[0]-&gt;page_pool;</div><div class='add'>+		ring_id = (page_pool) ? page_pool-&gt;id : 0;</div><div class='add'>+		pdata-&gt;port_ops-&gt;cle_bypass(pdata, dst_ring_num,</div><div class='add'>+					    buf_pool-&gt;id, ring_id);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ndev-&gt;max_mtu = XGENE_ENET_MAX_MTU;</div><div class='add'>+	pdata-&gt;phy_speed = SPEED_UNKNOWN;</div><div class='ctx'> 	pdata-&gt;mac_ops-&gt;init(pdata);</div><div class='ctx'> </div><div class='ctx'> 	return ret;</div><div class='add'>+</div><div class='add'>+err:</div><div class='add'>+	xgene_enet_delete_desc_rings(pdata);</div><div class='add'>+	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgene_enet_setup_ops(struct xgene_enet_pdata *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	switch (pdata-&gt;phy_mode) {</div><div class='ctx'> 	case PHY_INTERFACE_MODE_RGMII:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_ID:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_RXID:</div><div class='add'>+	case PHY_INTERFACE_MODE_RGMII_TXID:</div><div class='ctx'> 		pdata-&gt;mac_ops = &amp;xgene_gmac_ops;</div><div class='ctx'> 		pdata-&gt;port_ops = &amp;xgene_gport_ops;</div><div class='ctx'> 		pdata-&gt;rm = RM3;</div><div class='add'>+		pdata-&gt;rxq_cnt = 1;</div><div class='add'>+		pdata-&gt;txq_cnt = 1;</div><div class='add'>+		pdata-&gt;cq_cnt = 0;</div><div class='ctx'> 		break;</div><div class='ctx'> 	case PHY_INTERFACE_MODE_SGMII:</div><div class='ctx'> 		pdata-&gt;mac_ops = &amp;xgene_sgmac_ops;</div><div class='ctx'> 		pdata-&gt;port_ops = &amp;xgene_sgport_ops;</div><div class='ctx'> 		pdata-&gt;rm = RM1;</div><div class='add'>+		pdata-&gt;rxq_cnt = 1;</div><div class='add'>+		pdata-&gt;txq_cnt = 1;</div><div class='add'>+		pdata-&gt;cq_cnt = 1;</div><div class='ctx'> 		break;</div><div class='ctx'> 	default:</div><div class='ctx'> 		pdata-&gt;mac_ops = &amp;xgene_xgmac_ops;</div><div class='ctx'> 		pdata-&gt;port_ops = &amp;xgene_xgport_ops;</div><div class='add'>+		pdata-&gt;cle_ops = &amp;xgene_cle3in_ops;</div><div class='ctx'> 		pdata-&gt;rm = RM0;</div><div class='add'>+		if (!pdata-&gt;rxq_cnt) {</div><div class='add'>+			pdata-&gt;rxq_cnt = XGENE_NUM_RX_RING;</div><div class='add'>+			pdata-&gt;txq_cnt = XGENE_NUM_TX_RING;</div><div class='add'>+			pdata-&gt;cq_cnt = XGENE_NUM_TXC_RING;</div><div class='add'>+		}</div><div class='ctx'> 		break;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	if (pdata-&gt;enet_id == XGENE_ENET1) {</div><div class='ctx'> 		switch (pdata-&gt;port_id) {</div><div class='ctx'> 		case 0:</div><div class='del'>-			pdata-&gt;cpu_bufnum = START_CPU_BUFNUM_0;</div><div class='del'>-			pdata-&gt;eth_bufnum = START_ETH_BUFNUM_0;</div><div class='del'>-			pdata-&gt;bp_bufnum = START_BP_BUFNUM_0;</div><div class='del'>-			pdata-&gt;ring_num = START_RING_NUM_0;</div><div class='add'>+			if (pdata-&gt;phy_mode == PHY_INTERFACE_MODE_XGMII) {</div><div class='add'>+				pdata-&gt;cpu_bufnum = X2_START_CPU_BUFNUM_0;</div><div class='add'>+				pdata-&gt;eth_bufnum = X2_START_ETH_BUFNUM_0;</div><div class='add'>+				pdata-&gt;bp_bufnum = X2_START_BP_BUFNUM_0;</div><div class='add'>+				pdata-&gt;ring_num = START_RING_NUM_0;</div><div class='add'>+			} else {</div><div class='add'>+				pdata-&gt;cpu_bufnum = START_CPU_BUFNUM_0;</div><div class='add'>+				pdata-&gt;eth_bufnum = START_ETH_BUFNUM_0;</div><div class='add'>+				pdata-&gt;bp_bufnum = START_BP_BUFNUM_0;</div><div class='add'>+				pdata-&gt;ring_num = START_RING_NUM_0;</div><div class='add'>+			}</div><div class='ctx'> 			break;</div><div class='ctx'> 		case 1:</div><div class='del'>-			pdata-&gt;cpu_bufnum = START_CPU_BUFNUM_1;</div><div class='del'>-			pdata-&gt;eth_bufnum = START_ETH_BUFNUM_1;</div><div class='del'>-			pdata-&gt;bp_bufnum = START_BP_BUFNUM_1;</div><div class='del'>-			pdata-&gt;ring_num = START_RING_NUM_1;</div><div class='add'>+			if (pdata-&gt;phy_mode == PHY_INTERFACE_MODE_XGMII) {</div><div class='add'>+				pdata-&gt;cpu_bufnum = XG_START_CPU_BUFNUM_1;</div><div class='add'>+				pdata-&gt;eth_bufnum = XG_START_ETH_BUFNUM_1;</div><div class='add'>+				pdata-&gt;bp_bufnum = XG_START_BP_BUFNUM_1;</div><div class='add'>+				pdata-&gt;ring_num = XG_START_RING_NUM_1;</div><div class='add'>+			} else {</div><div class='add'>+				pdata-&gt;cpu_bufnum = START_CPU_BUFNUM_1;</div><div class='add'>+				pdata-&gt;eth_bufnum = START_ETH_BUFNUM_1;</div><div class='add'>+				pdata-&gt;bp_bufnum = START_BP_BUFNUM_1;</div><div class='add'>+				pdata-&gt;ring_num = START_RING_NUM_1;</div><div class='add'>+			}</div><div class='ctx'> 			break;</div><div class='ctx'> 		default:</div><div class='ctx'> 			break;</div><div class='hunk'>@@ -1160,40 +1975,53 @@ static void xgene_enet_setup_ops(struct xgene_enet_pdata *pdata)</div><div class='ctx'> static void xgene_enet_napi_add(struct xgene_enet_pdata *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	struct napi_struct *napi;</div><div class='add'>+	int i;</div><div class='ctx'> </div><div class='del'>-	napi = &amp;pdata-&gt;rx_ring-&gt;napi;</div><div class='del'>-	netif_napi_add(pdata-&gt;ndev, napi, xgene_enet_napi, NAPI_POLL_WEIGHT);</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;rxq_cnt; i++) {</div><div class='add'>+		napi = &amp;pdata-&gt;rx_ring[i]-&gt;napi;</div><div class='add'>+		netif_napi_add(pdata-&gt;ndev, napi, xgene_enet_napi);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	if (pdata-&gt;cq_cnt) {</div><div class='del'>-		napi = &amp;pdata-&gt;tx_ring-&gt;cp_ring-&gt;napi;</div><div class='del'>-		netif_napi_add(pdata-&gt;ndev, napi, xgene_enet_napi,</div><div class='del'>-			       NAPI_POLL_WEIGHT);</div><div class='add'>+	for (i = 0; i &lt; pdata-&gt;cq_cnt; i++) {</div><div class='add'>+		napi = &amp;pdata-&gt;tx_ring[i]-&gt;cp_ring-&gt;napi;</div><div class='add'>+		netif_napi_add(pdata-&gt;ndev, napi, xgene_enet_napi);</div><div class='ctx'> 	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xgene_enet_napi_del(struct xgene_enet_pdata *pdata)</div><div class='del'>-{</div><div class='del'>-	struct napi_struct *napi;</div><div class='add'>+#ifdef CONFIG_ACPI</div><div class='add'>+static const struct acpi_device_id xgene_enet_acpi_match[] = {</div><div class='add'>+	{ "APMC0D05", XGENE_ENET1},</div><div class='add'>+	{ "APMC0D30", XGENE_ENET1},</div><div class='add'>+	{ "APMC0D31", XGENE_ENET1},</div><div class='add'>+	{ "APMC0D3F", XGENE_ENET1},</div><div class='add'>+	{ "APMC0D26", XGENE_ENET2},</div><div class='add'>+	{ "APMC0D25", XGENE_ENET2},</div><div class='add'>+	{ }</div><div class='add'>+};</div><div class='add'>+MODULE_DEVICE_TABLE(acpi, xgene_enet_acpi_match);</div><div class='add'>+#endif</div><div class='ctx'> </div><div class='del'>-	napi = &amp;pdata-&gt;rx_ring-&gt;napi;</div><div class='del'>-	netif_napi_del(napi);</div><div class='add'>+static const struct of_device_id xgene_enet_of_match[] = {</div><div class='add'>+	{.compatible = "apm,xgene-enet",    .data = (void *)XGENE_ENET1},</div><div class='add'>+	{.compatible = "apm,xgene1-sgenet", .data = (void *)XGENE_ENET1},</div><div class='add'>+	{.compatible = "apm,xgene1-xgenet", .data = (void *)XGENE_ENET1},</div><div class='add'>+	{.compatible = "apm,xgene2-sgenet", .data = (void *)XGENE_ENET2},</div><div class='add'>+	{.compatible = "apm,xgene2-xgenet", .data = (void *)XGENE_ENET2},</div><div class='add'>+	{},</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-	if (pdata-&gt;cq_cnt) {</div><div class='del'>-		napi = &amp;pdata-&gt;tx_ring-&gt;cp_ring-&gt;napi;</div><div class='del'>-		netif_napi_del(napi);</div><div class='del'>-	}</div><div class='del'>-}</div><div class='add'>+MODULE_DEVICE_TABLE(of, xgene_enet_of_match);</div><div class='ctx'> </div><div class='ctx'> static int xgene_enet_probe(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *ndev;</div><div class='ctx'> 	struct xgene_enet_pdata *pdata;</div><div class='ctx'> 	struct device *dev = &amp;pdev-&gt;dev;</div><div class='del'>-	struct xgene_mac_ops *mac_ops;</div><div class='del'>-	const struct of_device_id *of_id;</div><div class='add'>+	void (*link_state)(struct work_struct *);</div><div class='ctx'> 	int ret;</div><div class='ctx'> </div><div class='del'>-	ndev = alloc_etherdev(sizeof(struct xgene_enet_pdata));</div><div class='add'>+	ndev = alloc_etherdev_mqs(sizeof(struct xgene_enet_pdata),</div><div class='add'>+				  XGENE_NUM_TX_RING, XGENE_NUM_RX_RING);</div><div class='ctx'> 	if (!ndev)</div><div class='ctx'> 		return -ENOMEM;</div><div class='ctx'> </div><div class='hunk'>@@ -1207,24 +2035,13 @@ static int xgene_enet_probe(struct platform_device *pdev)</div><div class='ctx'> 	xgene_enet_set_ethtool_ops(ndev);</div><div class='ctx'> 	ndev-&gt;features |= NETIF_F_IP_CSUM |</div><div class='ctx'> 			  NETIF_F_GSO |</div><div class='del'>-			  NETIF_F_GRO;</div><div class='add'>+			  NETIF_F_GRO |</div><div class='add'>+			  NETIF_F_SG;</div><div class='ctx'> </div><div class='del'>-	of_id = of_match_device(xgene_enet_of_match, &amp;pdev-&gt;dev);</div><div class='del'>-	if (of_id) {</div><div class='del'>-		pdata-&gt;enet_id = (enum xgene_enet_id)of_id-&gt;data;</div><div class='del'>-	}</div><div class='del'>-#ifdef CONFIG_ACPI</div><div class='del'>-	else {</div><div class='del'>-		const struct acpi_device_id *acpi_id;</div><div class='del'>-</div><div class='del'>-		acpi_id = acpi_match_device(xgene_enet_acpi_match, &amp;pdev-&gt;dev);</div><div class='del'>-		if (acpi_id)</div><div class='del'>-			pdata-&gt;enet_id = (enum xgene_enet_id) acpi_id-&gt;driver_data;</div><div class='del'>-	}</div><div class='del'>-#endif</div><div class='add'>+	pdata-&gt;enet_id = (enum xgene_enet_id)device_get_match_data(&amp;pdev-&gt;dev);</div><div class='ctx'> 	if (!pdata-&gt;enet_id) {</div><div class='del'>-		free_netdev(ndev);</div><div class='del'>-		return -ENODEV;</div><div class='add'>+		ret = -ENODEV;</div><div class='add'>+		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	ret = xgene_enet_get_resources(pdata);</div><div class='hunk'>@@ -1232,12 +2049,13 @@ static int xgene_enet_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto err;</div><div class='ctx'> </div><div class='ctx'> 	xgene_enet_setup_ops(pdata);</div><div class='add'>+	spin_lock_init(&amp;pdata-&gt;mac_lock);</div><div class='ctx'> </div><div class='del'>-	ret = register_netdev(ndev);</div><div class='del'>-	if (ret) {</div><div class='del'>-		netdev_err(ndev, "Failed to register netdev\n");</div><div class='del'>-		goto err;</div><div class='add'>+	if (pdata-&gt;phy_mode == PHY_INTERFACE_MODE_XGMII) {</div><div class='add'>+		ndev-&gt;features |= NETIF_F_TSO | NETIF_F_RXCSUM;</div><div class='add'>+		spin_lock_init(&amp;pdata-&gt;mss_lock);</div><div class='ctx'> 	}</div><div class='add'>+	ndev-&gt;hw_features = ndev-&gt;features;</div><div class='ctx'> </div><div class='ctx'> 	ret = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(64));</div><div class='ctx'> 	if (ret) {</div><div class='hunk'>@@ -1245,86 +2063,109 @@ static int xgene_enet_probe(struct platform_device *pdev)</div><div class='ctx'> 		goto err;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='add'>+	xgene_enet_check_phy_handle(pdata);</div><div class='add'>+</div><div class='ctx'> 	ret = xgene_enet_init_hw(pdata);</div><div class='ctx'> 	if (ret)</div><div class='del'>-		goto err;</div><div class='add'>+		goto err2;</div><div class='add'>+</div><div class='add'>+	link_state = pdata-&gt;mac_ops-&gt;link_state;</div><div class='add'>+	if (pdata-&gt;phy_mode == PHY_INTERFACE_MODE_XGMII) {</div><div class='add'>+		INIT_DELAYED_WORK(&amp;pdata-&gt;link_work, link_state);</div><div class='add'>+	} else if (!pdata-&gt;mdio_driver) {</div><div class='add'>+		if (phy_interface_mode_is_rgmii(pdata-&gt;phy_mode))</div><div class='add'>+			ret = xgene_enet_mdio_config(pdata);</div><div class='add'>+		else</div><div class='add'>+			INIT_DELAYED_WORK(&amp;pdata-&gt;link_work, link_state);</div><div class='add'>+</div><div class='add'>+		if (ret)</div><div class='add'>+			goto err1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;pdata-&gt;stats_lock);</div><div class='add'>+	ret = xgene_extd_stats_init(pdata);</div><div class='add'>+	if (ret)</div><div class='add'>+		goto err1;</div><div class='ctx'> </div><div class='ctx'> 	xgene_enet_napi_add(pdata);</div><div class='del'>-	mac_ops = pdata-&gt;mac_ops;</div><div class='del'>-	if (pdata-&gt;phy_mode == PHY_INTERFACE_MODE_RGMII)</div><div class='del'>-		ret = xgene_enet_mdio_config(pdata);</div><div class='del'>-	else</div><div class='del'>-		INIT_DELAYED_WORK(&amp;pdata-&gt;link_work, mac_ops-&gt;link_state);</div><div class='add'>+	ret = register_netdev(ndev);</div><div class='add'>+	if (ret) {</div><div class='add'>+		netdev_err(ndev, "Failed to register netdev\n");</div><div class='add'>+		goto err1;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	return ret;</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err1:</div><div class='add'>+	/*</div><div class='add'>+	 * If necessary, free_netdev() will call netif_napi_del() and undo</div><div class='add'>+	 * the effects of xgene_enet_napi_add()'s calls to netif_napi_add().</div><div class='add'>+	 */</div><div class='add'>+</div><div class='add'>+	xgene_enet_delete_desc_rings(pdata);</div><div class='add'>+</div><div class='add'>+err2:</div><div class='add'>+	if (pdata-&gt;mdio_driver)</div><div class='add'>+		xgene_enet_phy_disconnect(pdata);</div><div class='add'>+	else if (phy_interface_mode_is_rgmii(pdata-&gt;phy_mode))</div><div class='add'>+		xgene_enet_mdio_remove(pdata);</div><div class='ctx'> err:</div><div class='del'>-	unregister_netdev(ndev);</div><div class='ctx'> 	free_netdev(ndev);</div><div class='ctx'> 	return ret;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int xgene_enet_remove(struct platform_device *pdev)</div><div class='add'>+static void xgene_enet_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct xgene_enet_pdata *pdata;</div><div class='del'>-	struct xgene_mac_ops *mac_ops;</div><div class='ctx'> 	struct net_device *ndev;</div><div class='ctx'> </div><div class='ctx'> 	pdata = platform_get_drvdata(pdev);</div><div class='del'>-	mac_ops = pdata-&gt;mac_ops;</div><div class='ctx'> 	ndev = pdata-&gt;ndev;</div><div class='ctx'> </div><div class='del'>-	mac_ops-&gt;rx_disable(pdata);</div><div class='del'>-	mac_ops-&gt;tx_disable(pdata);</div><div class='add'>+	rtnl_lock();</div><div class='add'>+	if (netif_running(ndev))</div><div class='add'>+		dev_close(ndev);</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;mdio_driver)</div><div class='add'>+		xgene_enet_phy_disconnect(pdata);</div><div class='add'>+	else if (phy_interface_mode_is_rgmii(pdata-&gt;phy_mode))</div><div class='add'>+		xgene_enet_mdio_remove(pdata);</div><div class='ctx'> </div><div class='del'>-	xgene_enet_napi_del(pdata);</div><div class='del'>-	xgene_enet_mdio_remove(pdata);</div><div class='del'>-	xgene_enet_delete_desc_rings(pdata);</div><div class='ctx'> 	unregister_netdev(ndev);</div><div class='add'>+	xgene_enet_delete_desc_rings(pdata);</div><div class='ctx'> 	pdata-&gt;port_ops-&gt;shutdown(pdata);</div><div class='ctx'> 	free_netdev(ndev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_ACPI</div><div class='del'>-static const struct acpi_device_id xgene_enet_acpi_match[] = {</div><div class='del'>-	{ "APMC0D05", XGENE_ENET1},</div><div class='del'>-	{ "APMC0D30", XGENE_ENET1},</div><div class='del'>-	{ "APMC0D31", XGENE_ENET1},</div><div class='del'>-	{ "APMC0D26", XGENE_ENET2},</div><div class='del'>-	{ "APMC0D25", XGENE_ENET2},</div><div class='del'>-	{ }</div><div class='del'>-};</div><div class='del'>-MODULE_DEVICE_TABLE(acpi, xgene_enet_acpi_match);</div><div class='del'>-#endif</div><div class='add'>+static void xgene_enet_shutdown(struct platform_device *pdev)</div><div class='add'>+{</div><div class='add'>+	struct xgene_enet_pdata *pdata;</div><div class='ctx'> </div><div class='del'>-#ifdef CONFIG_OF</div><div class='del'>-static const struct of_device_id xgene_enet_of_match[] = {</div><div class='del'>-	{.compatible = "apm,xgene-enet",    .data = (void *)XGENE_ENET1},</div><div class='del'>-	{.compatible = "apm,xgene1-sgenet", .data = (void *)XGENE_ENET1},</div><div class='del'>-	{.compatible = "apm,xgene1-xgenet", .data = (void *)XGENE_ENET1},</div><div class='del'>-	{.compatible = "apm,xgene2-sgenet", .data = (void *)XGENE_ENET2},</div><div class='del'>-	{.compatible = "apm,xgene2-xgenet", .data = (void *)XGENE_ENET2},</div><div class='del'>-	{},</div><div class='del'>-};</div><div class='add'>+	pdata = platform_get_drvdata(pdev);</div><div class='add'>+	if (!pdata)</div><div class='add'>+		return;</div><div class='ctx'> </div><div class='del'>-MODULE_DEVICE_TABLE(of, xgene_enet_of_match);</div><div class='del'>-#endif</div><div class='add'>+	if (!pdata-&gt;ndev)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	xgene_enet_remove(pdev);</div><div class='add'>+}</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver xgene_enet_driver = {</div><div class='ctx'> 	.driver = {</div><div class='ctx'> 		   .name = "xgene-enet",</div><div class='del'>-		   .of_match_table = of_match_ptr(xgene_enet_of_match),</div><div class='add'>+		   .of_match_table = xgene_enet_of_match,</div><div class='ctx'> 		   .acpi_match_table = ACPI_PTR(xgene_enet_acpi_match),</div><div class='ctx'> 	},</div><div class='ctx'> 	.probe = xgene_enet_probe,</div><div class='ctx'> 	.remove = xgene_enet_remove,</div><div class='add'>+	.shutdown = xgene_enet_shutdown,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> module_platform_driver(xgene_enet_driver);</div><div class='ctx'> </div><div class='ctx'> MODULE_DESCRIPTION("APM X-Gene SoC Ethernet driver");</div><div class='del'>-MODULE_VERSION(XGENE_DRV_VERSION);</div><div class='ctx'> MODULE_AUTHOR("Iyappan Subramanian &lt;isubramanian@apm.com&gt;");</div><div class='ctx'> MODULE_AUTHOR("Keyur Chudgar &lt;kchudgar@apm.com&gt;");</div><div class='ctx'> MODULE_LICENSE("GPL");</div><div class='head'>diff --git a/drivers/net/ethernet/apm/xgene/xgene_enet_main.h b/drivers/net/ethernet/apm/xgene/xgene_enet_main.h<br/>index 1c85fc87703a..bce2c19e3f22 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene/xgene_enet_main.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene/xgene_enet_main.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene/xgene_enet_main.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apm/xgene/xgene_enet_main.h</a></div><div class='hunk'>@@ -1,22 +1,10 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='ctx'> /* Applied Micro X-Gene SoC Ethernet Driver</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (c) 2014, Applied Micro Circuits Corporation</div><div class='ctx'>  * Authors: Iyappan Subramanian &lt;isubramanian@apm.com&gt;</div><div class='ctx'>  *	    Ravi Patel &lt;rapatel@apm.com&gt;</div><div class='ctx'>  *	    Keyur Chudgar &lt;kchudgar@apm.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute  it and/or modify it</div><div class='del'>- * under  the terms of  the GNU General  Public License as published by the</div><div class='del'>- * Free Software Foundation;  either version 2 of the  License, or (at your</div><div class='del'>- * option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef __XGENE_ENET_MAIN_H__</div><div class='hunk'>@@ -25,23 +13,40 @@</div><div class='ctx'> #include &lt;linux/acpi.h&gt;</div><div class='ctx'> #include &lt;linux/clk.h&gt;</div><div class='ctx'> #include &lt;linux/efi.h&gt;</div><div class='add'>+#include &lt;linux/irq.h&gt;</div><div class='ctx'> #include &lt;linux/io.h&gt;</div><div class='del'>-#include &lt;linux/of_platform.h&gt;</div><div class='add'>+#include &lt;linux/of.h&gt;</div><div class='ctx'> #include &lt;linux/of_net.h&gt;</div><div class='ctx'> #include &lt;linux/of_mdio.h&gt;</div><div class='add'>+#include &lt;linux/platform_device.h&gt;</div><div class='add'>+#include &lt;linux/mdio/mdio-xgene.h&gt;</div><div class='ctx'> #include &lt;linux/module.h&gt;</div><div class='ctx'> #include &lt;net/ip.h&gt;</div><div class='ctx'> #include &lt;linux/prefetch.h&gt;</div><div class='ctx'> #include &lt;linux/if_vlan.h&gt;</div><div class='ctx'> #include &lt;linux/phy.h&gt;</div><div class='ctx'> #include "xgene_enet_hw.h"</div><div class='add'>+#include "xgene_enet_cle.h"</div><div class='ctx'> #include "xgene_enet_ring2.h"</div><div class='ctx'> </div><div class='del'>-#define XGENE_DRV_VERSION	"v1.0"</div><div class='del'>-#define XGENE_ENET_MAX_MTU	1536</div><div class='del'>-#define SKB_BUFFER_SIZE		(XGENE_ENET_MAX_MTU - NET_IP_ALIGN)</div><div class='del'>-#define NUM_PKT_BUF	64</div><div class='add'>+#define ETHER_MIN_PACKET	64</div><div class='add'>+#define ETHER_STD_PACKET	1518</div><div class='add'>+#define XGENE_ENET_STD_MTU	1536</div><div class='add'>+#define XGENE_ENET_MAX_MTU	9600</div><div class='add'>+#define SKB_BUFFER_SIZE		(XGENE_ENET_STD_MTU - NET_IP_ALIGN)</div><div class='add'>+</div><div class='add'>+#define BUFLEN_16K	(16 * 1024)</div><div class='add'>+#define NUM_PKT_BUF	1024</div><div class='ctx'> #define NUM_BUFPOOL	32</div><div class='add'>+#define NUM_NXTBUFPOOL	8</div><div class='add'>+#define MAX_EXP_BUFFS	256</div><div class='add'>+#define NUM_MSS_REG	4</div><div class='add'>+#define XGENE_MIN_ENET_FRAME_SIZE	60</div><div class='add'>+</div><div class='add'>+#define XGENE_MAX_ENET_IRQ	16</div><div class='add'>+#define XGENE_NUM_RX_RING	8</div><div class='add'>+#define XGENE_NUM_TX_RING	8</div><div class='add'>+#define XGENE_NUM_TXC_RING	8</div><div class='ctx'> </div><div class='ctx'> #define START_CPU_BUFNUM_0	0</div><div class='ctx'> #define START_ETH_BUFNUM_0	2</div><div class='hunk'>@@ -52,6 +57,11 @@</div><div class='ctx'> #define START_BP_BUFNUM_1	0x2A</div><div class='ctx'> #define START_RING_NUM_1	264</div><div class='ctx'> </div><div class='add'>+#define XG_START_CPU_BUFNUM_1	12</div><div class='add'>+#define XG_START_ETH_BUFNUM_1	2</div><div class='add'>+#define XG_START_BP_BUFNUM_1	0x22</div><div class='add'>+#define XG_START_RING_NUM_1	264</div><div class='add'>+</div><div class='ctx'> #define X2_START_CPU_BUFNUM_0	0</div><div class='ctx'> #define X2_START_ETH_BUFNUM_0	0</div><div class='ctx'> #define X2_START_BP_BUFNUM_0	0x20</div><div class='hunk'>@@ -62,7 +72,6 @@</div><div class='ctx'> #define X2_START_RING_NUM_1	256</div><div class='ctx'> </div><div class='ctx'> #define IRQ_ID_SIZE		16</div><div class='del'>-#define XGENE_MAX_TXC_RINGS	1</div><div class='ctx'> </div><div class='ctx'> #define PHY_POLL_LINK_ON	(10 * HZ)</div><div class='ctx'> #define PHY_POLL_LINK_OFF	(PHY_POLL_LINK_ON / 5)</div><div class='hunk'>@@ -72,6 +81,12 @@ enum xgene_enet_id {</div><div class='ctx'> 	XGENE_ENET2</div><div class='ctx'> };</div><div class='ctx'> </div><div class='add'>+enum xgene_enet_buf_len {</div><div class='add'>+	SIZE_2K = 2048,</div><div class='add'>+	SIZE_4K = 4096,</div><div class='add'>+	SIZE_16K = 16384</div><div class='add'>+};</div><div class='add'>+</div><div class='ctx'> /* software context of a descriptor ring */</div><div class='ctx'> struct xgene_enet_desc_ring {</div><div class='ctx'> 	struct net_device *ndev;</div><div class='hunk'>@@ -79,6 +94,7 @@ struct xgene_enet_desc_ring {</div><div class='ctx'> 	u16 num;</div><div class='ctx'> 	u16 head;</div><div class='ctx'> 	u16 tail;</div><div class='add'>+	u16 exp_buf_tail;</div><div class='ctx'> 	u16 slots;</div><div class='ctx'> 	u16 irq;</div><div class='ctx'> 	char irq_name[IRQ_ID_SIZE];</div><div class='hunk'>@@ -90,18 +106,37 @@ struct xgene_enet_desc_ring {</div><div class='ctx'> 	dma_addr_t irq_mbox_dma;</div><div class='ctx'> 	void *irq_mbox_addr;</div><div class='ctx'> 	u16 dst_ring_num;</div><div class='del'>-	u8 nbufpool;</div><div class='add'>+	u16 nbufpool;</div><div class='add'>+	int npagepool;</div><div class='add'>+	u8 index;</div><div class='add'>+	u32 flags;</div><div class='ctx'> 	struct sk_buff *(*rx_skb);</div><div class='ctx'> 	struct sk_buff *(*cp_skb);</div><div class='add'>+	dma_addr_t *frag_dma_addr;</div><div class='add'>+	struct page *(*frag_page);</div><div class='ctx'> 	enum xgene_enet_ring_cfgsize cfgsize;</div><div class='ctx'> 	struct xgene_enet_desc_ring *cp_ring;</div><div class='ctx'> 	struct xgene_enet_desc_ring *buf_pool;</div><div class='add'>+	struct xgene_enet_desc_ring *page_pool;</div><div class='ctx'> 	struct napi_struct napi;</div><div class='ctx'> 	union {</div><div class='ctx'> 		void *desc_addr;</div><div class='ctx'> 		struct xgene_enet_raw_desc *raw_desc;</div><div class='ctx'> 		struct xgene_enet_raw_desc16 *raw_desc16;</div><div class='ctx'> 	};</div><div class='add'>+	__le64 *exp_bufs;</div><div class='add'>+	u64 tx_packets;</div><div class='add'>+	u64 tx_bytes;</div><div class='add'>+	u64 tx_dropped;</div><div class='add'>+	u64 tx_errors;</div><div class='add'>+	u64 rx_packets;</div><div class='add'>+	u64 rx_bytes;</div><div class='add'>+	u64 rx_dropped;</div><div class='add'>+	u64 rx_errors;</div><div class='add'>+	u64 rx_length_errors;</div><div class='add'>+	u64 rx_crc_errors;</div><div class='add'>+	u64 rx_frame_errors;</div><div class='add'>+	u64 rx_fifo_errors;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct xgene_mac_ops {</div><div class='hunk'>@@ -111,14 +146,23 @@ struct xgene_mac_ops {</div><div class='ctx'> 	void (*rx_enable)(struct xgene_enet_pdata *pdata);</div><div class='ctx'> 	void (*tx_disable)(struct xgene_enet_pdata *pdata);</div><div class='ctx'> 	void (*rx_disable)(struct xgene_enet_pdata *pdata);</div><div class='add'>+	void (*get_drop_cnt)(struct xgene_enet_pdata *pdata, u32 *rx, u32 *tx);</div><div class='add'>+	void (*set_speed)(struct xgene_enet_pdata *pdata);</div><div class='ctx'> 	void (*set_mac_addr)(struct xgene_enet_pdata *pdata);</div><div class='add'>+	void (*set_framesize)(struct xgene_enet_pdata *pdata, int framesize);</div><div class='add'>+	void (*set_mss)(struct xgene_enet_pdata *pdata, u16 mss, u8 index);</div><div class='ctx'> 	void (*link_state)(struct work_struct *work);</div><div class='add'>+	void (*enable_tx_pause)(struct xgene_enet_pdata *pdata, bool enable);</div><div class='add'>+	void (*flowctl_rx)(struct xgene_enet_pdata *pdata, bool enable);</div><div class='add'>+	void (*flowctl_tx)(struct xgene_enet_pdata *pdata, bool enable);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct xgene_port_ops {</div><div class='ctx'> 	int (*reset)(struct xgene_enet_pdata *pdata);</div><div class='add'>+	void (*clear)(struct xgene_enet_pdata *pdata,</div><div class='add'>+		      struct xgene_enet_desc_ring *ring);</div><div class='ctx'> 	void (*cle_bypass)(struct xgene_enet_pdata *pdata,</div><div class='del'>-			   u32 dst_ring_num, u16 bufpool_id);</div><div class='add'>+			   u32 dst_ring_num, u16 bufpool_id, u16 nxtbufpool_id);</div><div class='ctx'> 	void (*shutdown)(struct xgene_enet_pdata *pdata);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -129,47 +173,71 @@ struct xgene_ring_ops {</div><div class='ctx'> 	void (*clear)(struct xgene_enet_desc_ring *);</div><div class='ctx'> 	void (*wr_cmd)(struct xgene_enet_desc_ring *, int);</div><div class='ctx'> 	u32 (*len)(struct xgene_enet_desc_ring *);</div><div class='add'>+	void (*coalesce)(struct xgene_enet_desc_ring *);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct xgene_cle_ops {</div><div class='add'>+	int (*cle_init)(struct xgene_enet_pdata *pdata);</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* ethernet private data */</div><div class='ctx'> struct xgene_enet_pdata {</div><div class='ctx'> 	struct net_device *ndev;</div><div class='ctx'> 	struct mii_bus *mdio_bus;</div><div class='del'>-	struct phy_device *phy_dev;</div><div class='ctx'> 	int phy_speed;</div><div class='ctx'> 	struct clk *clk;</div><div class='ctx'> 	struct platform_device *pdev;</div><div class='ctx'> 	enum xgene_enet_id enet_id;</div><div class='del'>-	struct xgene_enet_desc_ring *tx_ring;</div><div class='del'>-	struct xgene_enet_desc_ring *rx_ring;</div><div class='add'>+	struct xgene_enet_desc_ring *tx_ring[XGENE_NUM_TX_RING];</div><div class='add'>+	struct xgene_enet_desc_ring *rx_ring[XGENE_NUM_RX_RING];</div><div class='add'>+	u16 tx_level[XGENE_NUM_TX_RING];</div><div class='add'>+	u16 txc_level[XGENE_NUM_TX_RING];</div><div class='ctx'> 	char *dev_name;</div><div class='ctx'> 	u32 rx_buff_cnt;</div><div class='ctx'> 	u32 tx_qcnt_hi;</div><div class='del'>-	u32 cp_qcnt_hi;</div><div class='del'>-	u32 cp_qcnt_low;</div><div class='del'>-	u32 rx_irq;</div><div class='del'>-	u32 txc_irq;</div><div class='add'>+	u32 irqs[XGENE_MAX_ENET_IRQ];</div><div class='add'>+	u8 rxq_cnt;</div><div class='add'>+	u8 txq_cnt;</div><div class='ctx'> 	u8 cq_cnt;</div><div class='ctx'> 	void __iomem *eth_csr_addr;</div><div class='ctx'> 	void __iomem *eth_ring_if_addr;</div><div class='ctx'> 	void __iomem *eth_diag_csr_addr;</div><div class='ctx'> 	void __iomem *mcx_mac_addr;</div><div class='ctx'> 	void __iomem *mcx_mac_csr_addr;</div><div class='add'>+	void __iomem *mcx_stats_addr;</div><div class='ctx'> 	void __iomem *base_addr;</div><div class='add'>+	void __iomem *pcs_addr;</div><div class='ctx'> 	void __iomem *ring_csr_addr;</div><div class='ctx'> 	void __iomem *ring_cmd_addr;</div><div class='ctx'> 	int phy_mode;</div><div class='ctx'> 	enum xgene_enet_rm rm;</div><div class='del'>-	struct rtnl_link_stats64 stats;</div><div class='del'>-	struct xgene_mac_ops *mac_ops;</div><div class='del'>-	struct xgene_port_ops *port_ops;</div><div class='add'>+	struct xgene_enet_cle cle;</div><div class='add'>+	u64 *extd_stats;</div><div class='add'>+	u64 false_rflr;</div><div class='add'>+	u64 vlan_rjbr;</div><div class='add'>+	spinlock_t stats_lock; /* statistics lock */</div><div class='add'>+	const struct xgene_mac_ops *mac_ops;</div><div class='add'>+	spinlock_t mac_lock; /* mac lock */</div><div class='add'>+	const struct xgene_port_ops *port_ops;</div><div class='ctx'> 	struct xgene_ring_ops *ring_ops;</div><div class='add'>+	const struct xgene_cle_ops *cle_ops;</div><div class='ctx'> 	struct delayed_work link_work;</div><div class='ctx'> 	u32 port_id;</div><div class='ctx'> 	u8 cpu_bufnum;</div><div class='ctx'> 	u8 eth_bufnum;</div><div class='ctx'> 	u8 bp_bufnum;</div><div class='ctx'> 	u16 ring_num;</div><div class='add'>+	u32 mss[NUM_MSS_REG];</div><div class='add'>+	u32 mss_refcnt[NUM_MSS_REG];</div><div class='add'>+	spinlock_t mss_lock;  /* mss lock */</div><div class='add'>+	u8 tx_delay;</div><div class='add'>+	u8 rx_delay;</div><div class='add'>+	bool mdio_driver;</div><div class='add'>+	struct gpio_desc *sfp_rdy;</div><div class='add'>+	bool sfp_gpio_en;</div><div class='add'>+	u32 pause_autoneg;</div><div class='add'>+	bool tx_pause;</div><div class='add'>+	bool rx_pause;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> struct xgene_indirect_ctl {</div><div class='hunk'>@@ -179,36 +247,19 @@ struct xgene_indirect_ctl {</div><div class='ctx'> 	void __iomem *cmd_done;</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-/* Set the specified value into a bit-field defined by its starting position</div><div class='del'>- * and length within a single u64.</div><div class='del'>- */</div><div class='del'>-static inline u64 xgene_enet_set_field_value(int pos, int len, u64 val)</div><div class='add'>+static inline struct device *ndev_to_dev(struct net_device *ndev)</div><div class='ctx'> {</div><div class='del'>-	return (val &amp; ((1ULL &lt;&lt; len) - 1)) &lt;&lt; pos;</div><div class='add'>+	return ndev-&gt;dev.parent;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-#define SET_VAL(field, val) \</div><div class='del'>-		xgene_enet_set_field_value(field ## _POS, field ## _LEN, val)</div><div class='del'>-</div><div class='del'>-#define SET_BIT(field) \</div><div class='del'>-		xgene_enet_set_field_value(field ## _POS, 1, 1)</div><div class='del'>-</div><div class='del'>-/* Get the value from a bit-field defined by its starting position</div><div class='del'>- * and length within the specified u64.</div><div class='del'>- */</div><div class='del'>-static inline u64 xgene_enet_get_field_value(int pos, int len, u64 src)</div><div class='add'>+static inline u16 xgene_enet_dst_ring_num(struct xgene_enet_desc_ring *ring)</div><div class='ctx'> {</div><div class='del'>-	return (src &gt;&gt; pos) &amp; ((1ULL &lt;&lt; len) - 1);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-#define GET_VAL(field, src) \</div><div class='del'>-		xgene_enet_get_field_value(field ## _POS, field ## _LEN, src)</div><div class='add'>+	struct xgene_enet_pdata *pdata = netdev_priv(ring-&gt;ndev);</div><div class='ctx'> </div><div class='del'>-static inline struct device *ndev_to_dev(struct net_device *ndev)</div><div class='del'>-{</div><div class='del'>-	return ndev-&gt;dev.parent;</div><div class='add'>+	return ((u16)pdata-&gt;rm &lt;&lt; 10) | ring-&gt;num;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> void xgene_enet_set_ethtool_ops(struct net_device *netdev);</div><div class='add'>+int xgene_extd_stats_init(struct xgene_enet_pdata *pdata);</div><div class='ctx'> </div><div class='ctx'> #endif /* __XGENE_ENET_MAIN_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/apm/xgene/xgene_enet_ring2.c b/drivers/net/ethernet/apm/xgene/xgene_enet_ring2.c<br/>index 0b6896bb351e..02892efdc4dc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene/xgene_enet_ring2.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene/xgene_enet_ring2.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene/xgene_enet_ring2.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apm/xgene/xgene_enet_ring2.c</a></div><div class='hunk'>@@ -1,20 +1,8 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='ctx'> /* Applied Micro X-Gene SoC Ethernet Driver</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (c) 2015, Applied Micro Circuits Corporation</div><div class='ctx'>  * Author: Iyappan Subramanian &lt;isubramanian@apm.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute  it and/or modify it</div><div class='del'>- * under  the terms of  the GNU General  Public License as published by the</div><div class='del'>- * Free Software Foundation;  either version 2 of the  License, or (at your</div><div class='del'>- * option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include "xgene_enet_main.h"</div><div class='hunk'>@@ -30,7 +18,7 @@ static void xgene_enet_ring_init(struct xgene_enet_desc_ring *ring)</div><div class='ctx'> 		ring_cfg[0] |= SET_VAL(X2_INTLINE, ring-&gt;id &amp; RING_BUFNUM_MASK);</div><div class='ctx'> 		ring_cfg[3] |= SET_BIT(X2_DEQINTEN);</div><div class='ctx'> 	}</div><div class='del'>-	ring_cfg[0] |= SET_VAL(X2_CFGCRID, 1);</div><div class='add'>+	ring_cfg[0] |= SET_VAL(X2_CFGCRID, 2);</div><div class='ctx'> </div><div class='ctx'> 	addr &gt;&gt;= 8;</div><div class='ctx'> 	ring_cfg[2] |= QCOHERENT | SET_VAL(RINGADDRL, addr);</div><div class='hunk'>@@ -119,6 +107,7 @@ static void xgene_enet_set_ring_id(struct xgene_enet_desc_ring *ring)</div><div class='ctx'> </div><div class='ctx'> 	ring_id_buf = (ring-&gt;num &lt;&lt; 9) &amp; GENMASK(18, 9);</div><div class='ctx'> 	ring_id_buf |= PREFETCH_BUF_EN;</div><div class='add'>+</div><div class='ctx'> 	if (is_bufpool)</div><div class='ctx'> 		ring_id_buf |= IS_BUFFER_POOL;</div><div class='ctx'> </div><div class='hunk'>@@ -190,6 +179,19 @@ static u32 xgene_enet_ring_len(struct xgene_enet_desc_ring *ring)</div><div class='ctx'> 	return num_msgs;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void xgene_enet_setup_coalescing(struct xgene_enet_desc_ring *ring)</div><div class='add'>+{</div><div class='add'>+	u32 data = 0x77777777;</div><div class='add'>+</div><div class='add'>+	xgene_enet_ring_wr32(ring, CSR_PBM_COAL, 0x8e);</div><div class='add'>+	xgene_enet_ring_wr32(ring, CSR_PBM_CTICK0, data);</div><div class='add'>+	xgene_enet_ring_wr32(ring, CSR_PBM_CTICK1, data);</div><div class='add'>+	xgene_enet_ring_wr32(ring, CSR_PBM_CTICK2, data);</div><div class='add'>+	xgene_enet_ring_wr32(ring, CSR_PBM_CTICK3, data);</div><div class='add'>+	xgene_enet_ring_wr32(ring, CSR_THRESHOLD0_SET1, 0x08);</div><div class='add'>+	xgene_enet_ring_wr32(ring, CSR_THRESHOLD1_SET1, 0x10);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> struct xgene_ring_ops xgene_ring2_ops = {</div><div class='ctx'> 	.num_ring_config = X2_NUM_RING_CONFIG,</div><div class='ctx'> 	.num_ring_id_shift = 13,</div><div class='hunk'>@@ -197,4 +199,5 @@ struct xgene_ring_ops xgene_ring2_ops = {</div><div class='ctx'> 	.clear = xgene_enet_clear_ring,</div><div class='ctx'> 	.wr_cmd = xgene_enet_wr_cmd,</div><div class='ctx'> 	.len = xgene_enet_ring_len,</div><div class='add'>+	.coalesce = xgene_enet_setup_coalescing,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/ethernet/apm/xgene/xgene_enet_ring2.h b/drivers/net/ethernet/apm/xgene/xgene_enet_ring2.h<br/>index 8b235db23c42..4e2edeea54ab 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene/xgene_enet_ring2.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene/xgene_enet_ring2.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene/xgene_enet_ring2.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apm/xgene/xgene_enet_ring2.h</a></div><div class='hunk'>@@ -1,20 +1,8 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='ctx'> /* Applied Micro X-Gene SoC Ethernet Driver</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (c) 2015, Applied Micro Circuits Corporation</div><div class='ctx'>  * Author: Iyappan Subramanian &lt;isubramanian@apm.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute  it and/or modify it</div><div class='del'>- * under  the terms of  the GNU General  Public License as published by the</div><div class='del'>- * Free Software Foundation;  either version 2 of the  License, or (at your</div><div class='del'>- * option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef __XGENE_ENET_RING2_H__</div><div class='head'>diff --git a/drivers/net/ethernet/apm/xgene/xgene_enet_sgmac.c b/drivers/net/ethernet/apm/xgene/xgene_enet_sgmac.c<br/>index 05b817e56fde..72b5e8eb0ec7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene/xgene_enet_sgmac.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene/xgene_enet_sgmac.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene/xgene_enet_sgmac.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apm/xgene/xgene_enet_sgmac.c</a></div><div class='hunk'>@@ -1,21 +1,9 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='ctx'> /* Applied Micro X-Gene SoC Ethernet Driver</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (c) 2014, Applied Micro Circuits Corporation</div><div class='ctx'>  * Authors: Iyappan Subramanian &lt;isubramanian@apm.com&gt;</div><div class='ctx'>  *	    Keyur Chudgar &lt;kchudgar@apm.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute  it and/or modify it</div><div class='del'>- * under  the terms of  the GNU General  Public License as published by the</div><div class='del'>- * Free Software Foundation;  either version 2 of the  License, or (at your</div><div class='del'>- * option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #include "xgene_enet_main.h"</div><div class='hunk'>@@ -28,6 +16,12 @@ static void xgene_enet_wr_csr(struct xgene_enet_pdata *p, u32 offset, u32 val)</div><div class='ctx'> 	iowrite32(val, p-&gt;eth_csr_addr + offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void xgene_enet_wr_clkrst_csr(struct xgene_enet_pdata *p, u32 offset,</div><div class='add'>+				     u32 val)</div><div class='add'>+{</div><div class='add'>+	iowrite32(val, p-&gt;base_addr + offset);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void xgene_enet_wr_ring_if(struct xgene_enet_pdata *p,</div><div class='ctx'> 				  u32 offset, u32 val)</div><div class='ctx'> {</div><div class='hunk'>@@ -48,41 +42,6 @@ static void xgene_enet_wr_mcx_csr(struct xgene_enet_pdata *pdata,</div><div class='ctx'> 	iowrite32(val, addr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static bool xgene_enet_wr_indirect(struct xgene_indirect_ctl *ctl,</div><div class='del'>-				   u32 wr_addr, u32 wr_data)</div><div class='del'>-{</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	iowrite32(wr_addr, ctl-&gt;addr);</div><div class='del'>-	iowrite32(wr_data, ctl-&gt;ctl);</div><div class='del'>-	iowrite32(XGENE_ENET_WR_CMD, ctl-&gt;cmd);</div><div class='del'>-</div><div class='del'>-	/* wait for write command to complete */</div><div class='del'>-	for (i = 0; i &lt; 10; i++) {</div><div class='del'>-		if (ioread32(ctl-&gt;cmd_done)) {</div><div class='del'>-			iowrite32(0, ctl-&gt;cmd);</div><div class='del'>-			return true;</div><div class='del'>-		}</div><div class='del'>-		udelay(1);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	return false;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void xgene_enet_wr_mac(struct xgene_enet_pdata *p,</div><div class='del'>-			      u32 wr_addr, u32 wr_data)</div><div class='del'>-{</div><div class='del'>-	struct xgene_indirect_ctl ctl = {</div><div class='del'>-		.addr = p-&gt;mcx_mac_addr + MAC_ADDR_REG_OFFSET,</div><div class='del'>-		.ctl = p-&gt;mcx_mac_addr + MAC_WRITE_REG_OFFSET,</div><div class='del'>-		.cmd = p-&gt;mcx_mac_addr + MAC_COMMAND_REG_OFFSET,</div><div class='del'>-		.cmd_done = p-&gt;mcx_mac_addr + MAC_COMMAND_DONE_REG_OFFSET</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	if (!xgene_enet_wr_indirect(&amp;ctl, wr_addr, wr_data))</div><div class='del'>-		netdev_err(p-&gt;ndev, "mac write failed, addr: %04x\n", wr_addr);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> static u32 xgene_enet_rd_csr(struct xgene_enet_pdata *p, u32 offset)</div><div class='ctx'> {</div><div class='ctx'> 	return ioread32(p-&gt;eth_csr_addr + offset);</div><div class='hunk'>@@ -93,48 +52,25 @@ static u32 xgene_enet_rd_diag_csr(struct xgene_enet_pdata *p, u32 offset)</div><div class='ctx'> 	return ioread32(p-&gt;eth_diag_csr_addr + offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static u32 xgene_enet_rd_indirect(struct xgene_indirect_ctl *ctl, u32 rd_addr)</div><div class='add'>+static u32 xgene_enet_rd_mcx_csr(struct xgene_enet_pdata *p, u32 offset)</div><div class='ctx'> {</div><div class='del'>-	u32 rd_data;</div><div class='del'>-	int i;</div><div class='del'>-</div><div class='del'>-	iowrite32(rd_addr, ctl-&gt;addr);</div><div class='del'>-	iowrite32(XGENE_ENET_RD_CMD, ctl-&gt;cmd);</div><div class='del'>-</div><div class='del'>-	/* wait for read command to complete */</div><div class='del'>-	for (i = 0; i &lt; 10; i++) {</div><div class='del'>-		if (ioread32(ctl-&gt;cmd_done)) {</div><div class='del'>-			rd_data = ioread32(ctl-&gt;ctl);</div><div class='del'>-			iowrite32(0, ctl-&gt;cmd);</div><div class='del'>-</div><div class='del'>-			return rd_data;</div><div class='del'>-		}</div><div class='del'>-		udelay(1);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	pr_err("%s: mac read failed, addr: %04x\n", __func__, rd_addr);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static u32 xgene_enet_rd_mac(struct xgene_enet_pdata *p, u32 rd_addr)</div><div class='del'>-{</div><div class='del'>-	struct xgene_indirect_ctl ctl = {</div><div class='del'>-		.addr = p-&gt;mcx_mac_addr + MAC_ADDR_REG_OFFSET,</div><div class='del'>-		.ctl = p-&gt;mcx_mac_addr + MAC_READ_REG_OFFSET,</div><div class='del'>-		.cmd = p-&gt;mcx_mac_addr + MAC_COMMAND_REG_OFFSET,</div><div class='del'>-		.cmd_done = p-&gt;mcx_mac_addr + MAC_COMMAND_DONE_REG_OFFSET</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	return xgene_enet_rd_indirect(&amp;ctl, rd_addr);</div><div class='add'>+	return ioread32(p-&gt;mcx_mac_csr_addr + offset);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int xgene_enet_ecc_init(struct xgene_enet_pdata *p)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *ndev = p-&gt;ndev;</div><div class='del'>-	u32 data;</div><div class='add'>+	u32 data, shutdown;</div><div class='ctx'> 	int i = 0;</div><div class='ctx'> </div><div class='add'>+	shutdown = xgene_enet_rd_diag_csr(p, ENET_CFG_MEM_RAM_SHUTDOWN_ADDR);</div><div class='add'>+	data = xgene_enet_rd_diag_csr(p, ENET_BLOCK_MEM_RDY_ADDR);</div><div class='add'>+</div><div class='add'>+	if (!shutdown &amp;&amp; data == ~0U) {</div><div class='add'>+		netdev_dbg(ndev, "+ ecc_init done, skipping\n");</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='ctx'> 	xgene_enet_wr_diag_csr(p, ENET_CFG_MEM_RAM_SHUTDOWN_ADDR, 0);</div><div class='ctx'> 	do {</div><div class='ctx'> 		usleep_range(100, 110);</div><div class='hunk'>@@ -147,6 +83,24 @@ static int xgene_enet_ecc_init(struct xgene_enet_pdata *p)</div><div class='ctx'> 	return -ENODEV;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void xgene_sgmac_get_drop_cnt(struct xgene_enet_pdata *pdata,</div><div class='add'>+				     u32 *rx, u32 *tx)</div><div class='add'>+{</div><div class='add'>+	u32 addr, count;</div><div class='add'>+</div><div class='add'>+	addr = (pdata-&gt;enet_id != XGENE_ENET1) ?</div><div class='add'>+		XG_MCX_ICM_ECM_DROP_COUNT_REG0_ADDR :</div><div class='add'>+		ICM_ECM_DROP_COUNT_REG0_ADDR + pdata-&gt;port_id * OFFSET_4;</div><div class='add'>+	count = xgene_enet_rd_mcx_csr(pdata, addr);</div><div class='add'>+	*rx = ICM_DROP_COUNT(count);</div><div class='add'>+	*tx = ECM_DROP_COUNT(count);</div><div class='add'>+	/* Errata: 10GE_4 - ICM_ECM_DROP_COUNT not clear-on-read */</div><div class='add'>+	addr = (pdata-&gt;enet_id != XGENE_ENET1) ?</div><div class='add'>+		XG_MCX_ECM_CONFIG0_REG_0_ADDR :</div><div class='add'>+		ECM_CONFIG0_REG_0_ADDR + pdata-&gt;port_id * OFFSET_4;</div><div class='add'>+	xgene_enet_rd_mcx_csr(pdata, addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void xgene_enet_config_ring_if_assoc(struct xgene_enet_pdata *p)</div><div class='ctx'> {</div><div class='ctx'> 	u32 val;</div><div class='hunk'>@@ -211,8 +165,8 @@ static void xgene_sgmac_reset(struct xgene_enet_pdata *p)</div><div class='ctx'> </div><div class='ctx'> static void xgene_sgmac_set_mac_addr(struct xgene_enet_pdata *p)</div><div class='ctx'> {</div><div class='add'>+	const u8 *dev_addr = p-&gt;ndev-&gt;dev_addr;</div><div class='ctx'> 	u32 addr0, addr1;</div><div class='del'>-	u8 *dev_addr = p-&gt;ndev-&gt;dev_addr;</div><div class='ctx'> </div><div class='ctx'> 	addr0 = (dev_addr[3] &lt;&lt; 24) | (dev_addr[2] &lt;&lt; 16) |</div><div class='ctx'> 		(dev_addr[1] &lt;&lt; 8) | dev_addr[0];</div><div class='hunk'>@@ -230,21 +184,110 @@ static u32 xgene_enet_link_status(struct xgene_enet_pdata *p)</div><div class='ctx'> 	data = xgene_mii_phy_read(p, INT_PHY_ADDR,</div><div class='ctx'> 				  SGMII_BASE_PAGE_ABILITY_ADDR &gt;&gt; 2);</div><div class='ctx'> </div><div class='add'>+	if (LINK_SPEED(data) == PHY_SPEED_1000)</div><div class='add'>+		p-&gt;phy_speed = SPEED_1000;</div><div class='add'>+	else if (LINK_SPEED(data) == PHY_SPEED_100)</div><div class='add'>+		p-&gt;phy_speed = SPEED_100;</div><div class='add'>+	else</div><div class='add'>+		p-&gt;phy_speed = SPEED_10;</div><div class='add'>+</div><div class='ctx'> 	return data &amp; LINK_UP;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xgene_sgmac_init(struct xgene_enet_pdata *p)</div><div class='add'>+static void xgene_sgmii_configure(struct xgene_enet_pdata *p)</div><div class='ctx'> {</div><div class='del'>-	u32 data, loop = 10;</div><div class='del'>-	u32 offset = p-&gt;port_id * 4;</div><div class='del'>-	u32 enet_spare_cfg_reg, rsif_config_reg;</div><div class='del'>-	u32 cfg_bypass_reg, rx_dv_gate_reg;</div><div class='del'>-</div><div class='del'>-	xgene_sgmac_reset(p);</div><div class='add'>+	xgene_mii_phy_write(p, INT_PHY_ADDR, SGMII_TBI_CONTROL_ADDR &gt;&gt; 2,</div><div class='add'>+			    0x8000);</div><div class='add'>+	xgene_mii_phy_write(p, INT_PHY_ADDR, SGMII_CONTROL_ADDR &gt;&gt; 2, 0x9000);</div><div class='add'>+	xgene_mii_phy_write(p, INT_PHY_ADDR, SGMII_TBI_CONTROL_ADDR &gt;&gt; 2, 0);</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	/* Enable auto-negotiation */</div><div class='del'>-	xgene_mii_phy_write(p, INT_PHY_ADDR, SGMII_CONTROL_ADDR &gt;&gt; 2, 0x1000);</div><div class='add'>+static void xgene_sgmii_tbi_control_reset(struct xgene_enet_pdata *p)</div><div class='add'>+{</div><div class='add'>+	xgene_mii_phy_write(p, INT_PHY_ADDR, SGMII_TBI_CONTROL_ADDR &gt;&gt; 2,</div><div class='add'>+			    0x8000);</div><div class='ctx'> 	xgene_mii_phy_write(p, INT_PHY_ADDR, SGMII_TBI_CONTROL_ADDR &gt;&gt; 2, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgene_sgmii_reset(struct xgene_enet_pdata *p)</div><div class='add'>+{</div><div class='add'>+	u32 value;</div><div class='add'>+</div><div class='add'>+	if (p-&gt;phy_speed == SPEED_UNKNOWN)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	value = xgene_mii_phy_read(p, INT_PHY_ADDR,</div><div class='add'>+				   SGMII_BASE_PAGE_ABILITY_ADDR &gt;&gt; 2);</div><div class='add'>+	if (!(value &amp; LINK_UP))</div><div class='add'>+		xgene_sgmii_tbi_control_reset(p);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgene_sgmac_set_speed(struct xgene_enet_pdata *p)</div><div class='add'>+{</div><div class='add'>+	u32 icm0_addr, icm2_addr, debug_addr;</div><div class='add'>+	u32 icm0, icm2, intf_ctl;</div><div class='add'>+	u32 mc2, value;</div><div class='add'>+</div><div class='add'>+	xgene_sgmii_reset(p);</div><div class='add'>+</div><div class='add'>+	if (p-&gt;enet_id == XGENE_ENET1) {</div><div class='add'>+		icm0_addr = ICM_CONFIG0_REG_0_ADDR + p-&gt;port_id * OFFSET_8;</div><div class='add'>+		icm2_addr = ICM_CONFIG2_REG_0_ADDR + p-&gt;port_id * OFFSET_4;</div><div class='add'>+		debug_addr = DEBUG_REG_ADDR;</div><div class='add'>+	} else {</div><div class='add'>+		icm0_addr = XG_MCX_ICM_CONFIG0_REG_0_ADDR;</div><div class='add'>+		icm2_addr = XG_MCX_ICM_CONFIG2_REG_0_ADDR;</div><div class='add'>+		debug_addr = XG_DEBUG_REG_ADDR;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	icm0 = xgene_enet_rd_mcx_csr(p, icm0_addr);</div><div class='add'>+	icm2 = xgene_enet_rd_mcx_csr(p, icm2_addr);</div><div class='add'>+	mc2 = xgene_enet_rd_mac(p, MAC_CONFIG_2_ADDR);</div><div class='add'>+	intf_ctl = xgene_enet_rd_mac(p, INTERFACE_CONTROL_ADDR);</div><div class='add'>+</div><div class='add'>+	switch (p-&gt;phy_speed) {</div><div class='add'>+	case SPEED_10:</div><div class='add'>+		ENET_INTERFACE_MODE2_SET(&amp;mc2, 1);</div><div class='add'>+		intf_ctl &amp;= ~(ENET_LHD_MODE | ENET_GHD_MODE);</div><div class='add'>+		CFG_MACMODE_SET(&amp;icm0, 0);</div><div class='add'>+		CFG_WAITASYNCRD_SET(&amp;icm2, 500);</div><div class='add'>+		break;</div><div class='add'>+	case SPEED_100:</div><div class='add'>+		ENET_INTERFACE_MODE2_SET(&amp;mc2, 1);</div><div class='add'>+		intf_ctl &amp;= ~ENET_GHD_MODE;</div><div class='add'>+		intf_ctl |= ENET_LHD_MODE;</div><div class='add'>+		CFG_MACMODE_SET(&amp;icm0, 1);</div><div class='add'>+		CFG_WAITASYNCRD_SET(&amp;icm2, 80);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ENET_INTERFACE_MODE2_SET(&amp;mc2, 2);</div><div class='add'>+		intf_ctl &amp;= ~ENET_LHD_MODE;</div><div class='add'>+		intf_ctl |= ENET_GHD_MODE;</div><div class='add'>+		CFG_MACMODE_SET(&amp;icm0, 2);</div><div class='add'>+		CFG_WAITASYNCRD_SET(&amp;icm2, 16);</div><div class='add'>+		value = xgene_enet_rd_csr(p, debug_addr);</div><div class='add'>+		value |= CFG_BYPASS_UNISEC_TX | CFG_BYPASS_UNISEC_RX;</div><div class='add'>+		xgene_enet_wr_csr(p, debug_addr, value);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mc2 |= FULL_DUPLEX2 | PAD_CRC;</div><div class='add'>+	xgene_enet_wr_mac(p, MAC_CONFIG_2_ADDR, mc2);</div><div class='add'>+	xgene_enet_wr_mac(p, INTERFACE_CONTROL_ADDR, intf_ctl);</div><div class='add'>+	xgene_enet_wr_mcx_csr(p, icm0_addr, icm0);</div><div class='add'>+	xgene_enet_wr_mcx_csr(p, icm2_addr, icm2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgene_sgmac_set_frame_size(struct xgene_enet_pdata *pdata, int size)</div><div class='add'>+{</div><div class='add'>+	xgene_enet_wr_mac(pdata, MAX_FRAME_LEN_ADDR, size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgene_sgmii_enable_autoneg(struct xgene_enet_pdata *p)</div><div class='add'>+{</div><div class='add'>+	u32 data, loop = 10;</div><div class='add'>+</div><div class='add'>+	xgene_sgmii_configure(p);</div><div class='ctx'> </div><div class='ctx'> 	while (loop--) {</div><div class='ctx'> 		data = xgene_mii_phy_read(p, INT_PHY_ADDR,</div><div class='hunk'>@@ -255,17 +298,55 @@ static void xgene_sgmac_init(struct xgene_enet_pdata *p)</div><div class='ctx'> 	}</div><div class='ctx'> 	if (!(data &amp; AUTO_NEG_COMPLETE) || !(data &amp; LINK_STATUS))</div><div class='ctx'> 		netdev_err(p-&gt;ndev, "Auto-negotiation failed\n");</div><div class='add'>+}</div><div class='ctx'> </div><div class='del'>-	data = xgene_enet_rd_mac(p, MAC_CONFIG_2_ADDR);</div><div class='del'>-	ENET_INTERFACE_MODE2_SET(&amp;data, 2);</div><div class='del'>-	xgene_enet_wr_mac(p, MAC_CONFIG_2_ADDR, data | FULL_DUPLEX2);</div><div class='del'>-	xgene_enet_wr_mac(p, INTERFACE_CONTROL_ADDR, ENET_GHD_MODE);</div><div class='add'>+static void xgene_sgmac_rxtx(struct xgene_enet_pdata *p, u32 bits, bool set)</div><div class='add'>+{</div><div class='add'>+	u32 data;</div><div class='add'>+</div><div class='add'>+	data = xgene_enet_rd_mac(p, MAC_CONFIG_1_ADDR);</div><div class='add'>+</div><div class='add'>+	if (set)</div><div class='add'>+		data |= bits;</div><div class='add'>+	else</div><div class='add'>+		data &amp;= ~bits;</div><div class='add'>+</div><div class='add'>+	xgene_enet_wr_mac(p, MAC_CONFIG_1_ADDR, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgene_sgmac_flowctl_tx(struct xgene_enet_pdata *p, bool enable)</div><div class='add'>+{</div><div class='add'>+	xgene_sgmac_rxtx(p, TX_FLOW_EN, enable);</div><div class='add'>+</div><div class='add'>+	p-&gt;mac_ops-&gt;enable_tx_pause(p, enable);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgene_sgmac_flowctl_rx(struct xgene_enet_pdata *pdata, bool enable)</div><div class='add'>+{</div><div class='add'>+	xgene_sgmac_rxtx(pdata, RX_FLOW_EN, enable);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgene_sgmac_init(struct xgene_enet_pdata *p)</div><div class='add'>+{</div><div class='add'>+	u32 pause_thres_reg, pause_off_thres_reg;</div><div class='add'>+	u32 enet_spare_cfg_reg, rsif_config_reg;</div><div class='add'>+	u32 cfg_bypass_reg, rx_dv_gate_reg;</div><div class='add'>+	u32 data, data1, data2, offset;</div><div class='add'>+	u32 multi_dpf_reg;</div><div class='add'>+</div><div class='add'>+	if (!(p-&gt;enet_id == XGENE_ENET2 &amp;&amp; p-&gt;mdio_driver))</div><div class='add'>+		xgene_sgmac_reset(p);</div><div class='add'>+</div><div class='add'>+	xgene_sgmii_enable_autoneg(p);</div><div class='add'>+	xgene_sgmac_set_speed(p);</div><div class='add'>+	xgene_sgmac_set_mac_addr(p);</div><div class='ctx'> </div><div class='ctx'> 	if (p-&gt;enet_id == XGENE_ENET1) {</div><div class='ctx'> 		enet_spare_cfg_reg = ENET_SPARE_CFG_REG_ADDR;</div><div class='ctx'> 		rsif_config_reg = RSIF_CONFIG_REG_ADDR;</div><div class='ctx'> 		cfg_bypass_reg = CFG_BYPASS_ADDR;</div><div class='del'>-		rx_dv_gate_reg = SG_RX_DV_GATE_REG_0_ADDR;</div><div class='add'>+		offset = p-&gt;port_id * OFFSET_4;</div><div class='add'>+		rx_dv_gate_reg = SG_RX_DV_GATE_REG_0_ADDR + offset;</div><div class='ctx'> 	} else {</div><div class='ctx'> 		enet_spare_cfg_reg = XG_ENET_SPARE_CFG_REG_ADDR;</div><div class='ctx'> 		rsif_config_reg = XG_RSIF_CONFIG_REG_ADDR;</div><div class='hunk'>@@ -277,8 +358,6 @@ static void xgene_sgmac_init(struct xgene_enet_pdata *p)</div><div class='ctx'> 	data |= MPA_IDLE_WITH_QMI_EMPTY;</div><div class='ctx'> 	xgene_enet_wr_csr(p, enet_spare_cfg_reg, data);</div><div class='ctx'> </div><div class='del'>-	xgene_sgmac_set_mac_addr(p);</div><div class='del'>-</div><div class='ctx'> 	/* Adjust MDC clock frequency */</div><div class='ctx'> 	data = xgene_enet_rd_mac(p, MII_MGMT_CONFIG_ADDR);</div><div class='ctx'> 	MGMT_CLOCK_SEL_SET(&amp;data, 7);</div><div class='hunk'>@@ -289,24 +368,50 @@ static void xgene_sgmac_init(struct xgene_enet_pdata *p)</div><div class='ctx'> 	data |= CFG_RSIF_FPBUFF_TIMEOUT_EN;</div><div class='ctx'> 	xgene_enet_wr_csr(p, rsif_config_reg, data);</div><div class='ctx'> </div><div class='del'>-	/* Bypass traffic gating */</div><div class='del'>-	xgene_enet_wr_csr(p, XG_ENET_SPARE_CFG_REG_1_ADDR, 0x84);</div><div class='del'>-	xgene_enet_wr_csr(p, cfg_bypass_reg, RESUME_TX);</div><div class='del'>-	xgene_enet_wr_mcx_csr(p, rx_dv_gate_reg + offset, RESUME_RX0);</div><div class='del'>-}</div><div class='add'>+	/* Configure HW pause frame generation */</div><div class='add'>+	multi_dpf_reg = (p-&gt;enet_id == XGENE_ENET1) ? CSR_MULTI_DPF0_ADDR :</div><div class='add'>+			 XG_MCX_MULTI_DPF0_ADDR;</div><div class='add'>+	data = xgene_enet_rd_mcx_csr(p, multi_dpf_reg);</div><div class='add'>+	data = (DEF_QUANTA &lt;&lt; 16) | (data &amp; 0xffff);</div><div class='add'>+	xgene_enet_wr_mcx_csr(p, multi_dpf_reg, data);</div><div class='add'>+</div><div class='add'>+	if (p-&gt;enet_id != XGENE_ENET1) {</div><div class='add'>+		data = xgene_enet_rd_mcx_csr(p, XG_MCX_MULTI_DPF1_ADDR);</div><div class='add'>+		data =  (NORM_PAUSE_OPCODE &lt;&lt; 16) | (data &amp; 0xFFFF);</div><div class='add'>+		xgene_enet_wr_mcx_csr(p, XG_MCX_MULTI_DPF1_ADDR, data);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-static void xgene_sgmac_rxtx(struct xgene_enet_pdata *p, u32 bits, bool set)</div><div class='del'>-{</div><div class='del'>-	u32 data;</div><div class='add'>+	pause_thres_reg = (p-&gt;enet_id == XGENE_ENET1) ? RXBUF_PAUSE_THRESH :</div><div class='add'>+			   XG_RXBUF_PAUSE_THRESH;</div><div class='add'>+	pause_off_thres_reg = (p-&gt;enet_id == XGENE_ENET1) ?</div><div class='add'>+			       RXBUF_PAUSE_OFF_THRESH : 0;</div><div class='ctx'> </div><div class='del'>-	data = xgene_enet_rd_mac(p, MAC_CONFIG_1_ADDR);</div><div class='add'>+	if (p-&gt;enet_id == XGENE_ENET1) {</div><div class='add'>+		data1 = xgene_enet_rd_csr(p, pause_thres_reg);</div><div class='add'>+		data2 = xgene_enet_rd_csr(p, pause_off_thres_reg);</div><div class='add'>+</div><div class='add'>+		if (!(p-&gt;port_id % 2)) {</div><div class='add'>+			data1 = (data1 &amp; 0xffff0000) | DEF_PAUSE_THRES;</div><div class='add'>+			data2 = (data2 &amp; 0xffff0000) | DEF_PAUSE_OFF_THRES;</div><div class='add'>+		} else {</div><div class='add'>+			data1 = (data1 &amp; 0xffff) | (DEF_PAUSE_THRES &lt;&lt; 16);</div><div class='add'>+			data2 = (data2 &amp; 0xffff) | (DEF_PAUSE_OFF_THRES &lt;&lt; 16);</div><div class='add'>+		}</div><div class='ctx'> </div><div class='del'>-	if (set)</div><div class='del'>-		data |= bits;</div><div class='del'>-	else</div><div class='del'>-		data &amp;= ~bits;</div><div class='add'>+		xgene_enet_wr_csr(p, pause_thres_reg, data1);</div><div class='add'>+		xgene_enet_wr_csr(p, pause_off_thres_reg, data2);</div><div class='add'>+	} else {</div><div class='add'>+		data = (DEF_PAUSE_OFF_THRES &lt;&lt; 16) | DEF_PAUSE_THRES;</div><div class='add'>+		xgene_enet_wr_csr(p, pause_thres_reg, data);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-	xgene_enet_wr_mac(p, MAC_CONFIG_1_ADDR, data);</div><div class='add'>+	xgene_sgmac_flowctl_tx(p, p-&gt;tx_pause);</div><div class='add'>+	xgene_sgmac_flowctl_rx(p, p-&gt;rx_pause);</div><div class='add'>+</div><div class='add'>+	/* Bypass traffic gating */</div><div class='add'>+	xgene_enet_wr_csr(p, XG_ENET_SPARE_CFG_REG_1_ADDR, 0x84);</div><div class='add'>+	xgene_enet_wr_csr(p, cfg_bypass_reg, RESUME_TX);</div><div class='add'>+	xgene_enet_wr_mcx_csr(p, rx_dv_gate_reg, RESUME_RX0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgene_sgmac_rx_enable(struct xgene_enet_pdata *p)</div><div class='hunk'>@@ -331,27 +436,56 @@ static void xgene_sgmac_tx_disable(struct xgene_enet_pdata *p)</div><div class='ctx'> </div><div class='ctx'> static int xgene_enet_reset(struct xgene_enet_pdata *p)</div><div class='ctx'> {</div><div class='add'>+	struct device *dev = &amp;p-&gt;pdev-&gt;dev;</div><div class='add'>+</div><div class='ctx'> 	if (!xgene_ring_mgr_init(p))</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	if (!IS_ERR(p-&gt;clk)) {</div><div class='del'>-		clk_prepare_enable(p-&gt;clk);</div><div class='del'>-		clk_disable_unprepare(p-&gt;clk);</div><div class='del'>-		clk_prepare_enable(p-&gt;clk);</div><div class='add'>+	if (p-&gt;mdio_driver &amp;&amp; p-&gt;enet_id == XGENE_ENET2) {</div><div class='add'>+		xgene_enet_config_ring_if_assoc(p);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (p-&gt;enet_id == XGENE_ENET2)</div><div class='add'>+		xgene_enet_wr_clkrst_csr(p, XGENET_CONFIG_REG_ADDR, SGMII_EN);</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;of_node) {</div><div class='add'>+		if (!IS_ERR(p-&gt;clk)) {</div><div class='add'>+			clk_prepare_enable(p-&gt;clk);</div><div class='add'>+			udelay(5);</div><div class='add'>+			clk_disable_unprepare(p-&gt;clk);</div><div class='add'>+			udelay(5);</div><div class='add'>+			clk_prepare_enable(p-&gt;clk);</div><div class='add'>+			udelay(5);</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+#ifdef CONFIG_ACPI</div><div class='add'>+		acpi_status status;</div><div class='add'>+</div><div class='add'>+		status = acpi_evaluate_object(ACPI_HANDLE(&amp;p-&gt;pdev-&gt;dev),</div><div class='add'>+					      "_RST", NULL, NULL);</div><div class='add'>+		if (ACPI_FAILURE(status)) {</div><div class='add'>+			acpi_evaluate_object(ACPI_HANDLE(&amp;p-&gt;pdev-&gt;dev),</div><div class='add'>+					     "_INI", NULL, NULL);</div><div class='add'>+		}</div><div class='add'>+#endif</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	xgene_enet_ecc_init(p);</div><div class='del'>-	xgene_enet_config_ring_if_assoc(p);</div><div class='add'>+	if (!p-&gt;port_id) {</div><div class='add'>+		xgene_enet_ecc_init(p);</div><div class='add'>+		xgene_enet_config_ring_if_assoc(p);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgene_enet_cle_bypass(struct xgene_enet_pdata *p,</div><div class='del'>-				  u32 dst_ring_num, u16 bufpool_id)</div><div class='add'>+				  u32 dst_ring_num, u16 bufpool_id,</div><div class='add'>+				  u16 nxtbufpool_id)</div><div class='ctx'> {</div><div class='del'>-	u32 data, fpsel;</div><div class='ctx'> 	u32 cle_bypass_reg0, cle_bypass_reg1;</div><div class='ctx'> 	u32 offset = p-&gt;port_id * MAC_OFFSET;</div><div class='add'>+	u32 data, fpsel, nxtfpsel;</div><div class='ctx'> </div><div class='ctx'> 	if (p-&gt;enet_id == XGENE_ENET1) {</div><div class='ctx'> 		cle_bypass_reg0 = CLE_BYPASS_REG0_0_ADDR;</div><div class='hunk'>@@ -364,15 +498,37 @@ static void xgene_enet_cle_bypass(struct xgene_enet_pdata *p,</div><div class='ctx'> 	data = CFG_CLE_BYPASS_EN0;</div><div class='ctx'> 	xgene_enet_wr_csr(p, cle_bypass_reg0 + offset, data);</div><div class='ctx'> </div><div class='del'>-	fpsel = xgene_enet_ring_bufnum(bufpool_id) - 0x20;</div><div class='del'>-	data = CFG_CLE_DSTQID0(dst_ring_num) | CFG_CLE_FPSEL0(fpsel);</div><div class='add'>+	fpsel = xgene_enet_get_fpsel(bufpool_id);</div><div class='add'>+	nxtfpsel = xgene_enet_get_fpsel(nxtbufpool_id);</div><div class='add'>+	data = CFG_CLE_DSTQID0(dst_ring_num) | CFG_CLE_FPSEL0(fpsel) |</div><div class='add'>+	       CFG_CLE_NXTFPSEL0(nxtfpsel);</div><div class='ctx'> 	xgene_enet_wr_csr(p, cle_bypass_reg1 + offset, data);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void xgene_enet_clear(struct xgene_enet_pdata *pdata,</div><div class='add'>+			     struct xgene_enet_desc_ring *ring)</div><div class='add'>+{</div><div class='add'>+	u32 addr, data;</div><div class='add'>+</div><div class='add'>+	if (xgene_enet_is_bufpool(ring-&gt;id)) {</div><div class='add'>+		addr = ENET_CFGSSQMIFPRESET_ADDR;</div><div class='add'>+		data = BIT(xgene_enet_get_fpsel(ring-&gt;id));</div><div class='add'>+	} else {</div><div class='add'>+		addr = ENET_CFGSSQMIWQRESET_ADDR;</div><div class='add'>+		data = BIT(xgene_enet_ring_bufnum(ring-&gt;id));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	xgene_enet_wr_ring_if(pdata, addr, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void xgene_enet_shutdown(struct xgene_enet_pdata *p)</div><div class='ctx'> {</div><div class='del'>-	if (!IS_ERR(p-&gt;clk))</div><div class='del'>-		clk_disable_unprepare(p-&gt;clk);</div><div class='add'>+	struct device *dev = &amp;p-&gt;pdev-&gt;dev;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;of_node) {</div><div class='add'>+		if (!IS_ERR(p-&gt;clk))</div><div class='add'>+			clk_disable_unprepare(p-&gt;clk);</div><div class='add'>+	}</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgene_enet_link_state(struct work_struct *work)</div><div class='hunk'>@@ -386,10 +542,11 @@ static void xgene_enet_link_state(struct work_struct *work)</div><div class='ctx'> 	if (link) {</div><div class='ctx'> 		if (!netif_carrier_ok(ndev)) {</div><div class='ctx'> 			netif_carrier_on(ndev);</div><div class='del'>-			xgene_sgmac_init(p);</div><div class='add'>+			xgene_sgmac_set_speed(p);</div><div class='ctx'> 			xgene_sgmac_rx_enable(p);</div><div class='ctx'> 			xgene_sgmac_tx_enable(p);</div><div class='del'>-			netdev_info(ndev, "Link is Up - 1Gbps\n");</div><div class='add'>+			netdev_info(ndev, "Link is Up - %dMbps\n",</div><div class='add'>+				    p-&gt;phy_speed);</div><div class='ctx'> 		}</div><div class='ctx'> 		poll_interval = PHY_POLL_LINK_ON;</div><div class='ctx'> 	} else {</div><div class='hunk'>@@ -405,19 +562,45 @@ static void xgene_enet_link_state(struct work_struct *work)</div><div class='ctx'> 	schedule_delayed_work(&amp;p-&gt;link_work, poll_interval);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct xgene_mac_ops xgene_sgmac_ops = {</div><div class='add'>+static void xgene_sgmac_enable_tx_pause(struct xgene_enet_pdata *p, bool enable)</div><div class='add'>+{</div><div class='add'>+	u32 data, ecm_cfg_addr;</div><div class='add'>+</div><div class='add'>+	if (p-&gt;enet_id == XGENE_ENET1) {</div><div class='add'>+		ecm_cfg_addr = (!(p-&gt;port_id % 2)) ? CSR_ECM_CFG_0_ADDR :</div><div class='add'>+				CSR_ECM_CFG_1_ADDR;</div><div class='add'>+	} else {</div><div class='add'>+		ecm_cfg_addr = XG_MCX_ECM_CFG_0_ADDR;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	data = xgene_enet_rd_mcx_csr(p, ecm_cfg_addr);</div><div class='add'>+	if (enable)</div><div class='add'>+		data |= MULTI_DPF_AUTOCTRL | PAUSE_XON_EN;</div><div class='add'>+	else</div><div class='add'>+		data &amp;= ~(MULTI_DPF_AUTOCTRL | PAUSE_XON_EN);</div><div class='add'>+	xgene_enet_wr_mcx_csr(p, ecm_cfg_addr, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct xgene_mac_ops xgene_sgmac_ops = {</div><div class='ctx'> 	.init		= xgene_sgmac_init,</div><div class='ctx'> 	.reset		= xgene_sgmac_reset,</div><div class='ctx'> 	.rx_enable	= xgene_sgmac_rx_enable,</div><div class='ctx'> 	.tx_enable	= xgene_sgmac_tx_enable,</div><div class='ctx'> 	.rx_disable	= xgene_sgmac_rx_disable,</div><div class='ctx'> 	.tx_disable	= xgene_sgmac_tx_disable,</div><div class='add'>+	.get_drop_cnt   = xgene_sgmac_get_drop_cnt,</div><div class='add'>+	.set_speed	= xgene_sgmac_set_speed,</div><div class='ctx'> 	.set_mac_addr	= xgene_sgmac_set_mac_addr,</div><div class='del'>-	.link_state	= xgene_enet_link_state</div><div class='add'>+	.set_framesize  = xgene_sgmac_set_frame_size,</div><div class='add'>+	.link_state	= xgene_enet_link_state,</div><div class='add'>+	.enable_tx_pause = xgene_sgmac_enable_tx_pause,</div><div class='add'>+	.flowctl_tx     = xgene_sgmac_flowctl_tx,</div><div class='add'>+	.flowctl_rx     = xgene_sgmac_flowctl_rx</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct xgene_port_ops xgene_sgport_ops = {</div><div class='add'>+const struct xgene_port_ops xgene_sgport_ops = {</div><div class='ctx'> 	.reset		= xgene_enet_reset,</div><div class='add'>+	.clear		= xgene_enet_clear,</div><div class='ctx'> 	.cle_bypass	= xgene_enet_cle_bypass,</div><div class='ctx'> 	.shutdown	= xgene_enet_shutdown</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/ethernet/apm/xgene/xgene_enet_sgmac.h b/drivers/net/ethernet/apm/xgene/xgene_enet_sgmac.h<br/>index de432465009c..3bba0ce34bb4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene/xgene_enet_sgmac.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene/xgene_enet_sgmac.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene/xgene_enet_sgmac.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apm/xgene/xgene_enet_sgmac.h</a></div><div class='hunk'>@@ -1,21 +1,9 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='ctx'> /* Applied Micro X-Gene SoC Ethernet Driver</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (c) 2014, Applied Micro Circuits Corporation</div><div class='ctx'>  * Authors: Iyappan Subramanian &lt;isubramanian@apm.com&gt;</div><div class='ctx'>  *	    Keyur Chudgar &lt;kchudgar@apm.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute  it and/or modify it</div><div class='del'>- * under  the terms of  the GNU General  Public License as published by the</div><div class='del'>- * Free Software Foundation;  either version 2 of the  License, or (at your</div><div class='del'>- * option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef __XGENE_ENET_SGMAC_H__</div><div class='hunk'>@@ -24,6 +12,7 @@</div><div class='ctx'> #define PHY_ADDR(src)		(((src)&lt;&lt;8) &amp; GENMASK(12, 8))</div><div class='ctx'> #define REG_ADDR(src)		((src) &amp; GENMASK(4, 0))</div><div class='ctx'> #define PHY_CONTROL(src)	((src) &amp; GENMASK(15, 0))</div><div class='add'>+#define LINK_SPEED(src)		(((src) &amp; GENMASK(11, 10)) &gt;&gt; 10)</div><div class='ctx'> #define INT_PHY_ADDR			0x1e</div><div class='ctx'> #define SGMII_TBI_CONTROL_ADDR		0x44</div><div class='ctx'> #define SGMII_CONTROL_ADDR		0x00</div><div class='hunk'>@@ -33,9 +22,16 @@</div><div class='ctx'> #define LINK_STATUS			BIT(2)</div><div class='ctx'> #define LINK_UP				BIT(15)</div><div class='ctx'> #define MPA_IDLE_WITH_QMI_EMPTY		BIT(12)</div><div class='del'>-#define SG_RX_DV_GATE_REG_0_ADDR	0x0dfc</div><div class='add'>+#define SG_RX_DV_GATE_REG_0_ADDR	0x05fc</div><div class='add'>+#define SGMII_EN			0x1</div><div class='add'>+</div><div class='add'>+enum xgene_phy_speed {</div><div class='add'>+	PHY_SPEED_10,</div><div class='add'>+	PHY_SPEED_100,</div><div class='add'>+	PHY_SPEED_1000</div><div class='add'>+};</div><div class='ctx'> </div><div class='del'>-extern struct xgene_mac_ops xgene_sgmac_ops;</div><div class='del'>-extern struct xgene_port_ops xgene_sgport_ops;</div><div class='add'>+extern const struct xgene_mac_ops xgene_sgmac_ops;</div><div class='add'>+extern const struct xgene_port_ops xgene_sgport_ops;</div><div class='ctx'> </div><div class='ctx'> #endif  /* __XGENE_ENET_SGMAC_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c b/drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c<br/>index 05edb847cf26..cc3b1631c905 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c</a></div><div class='hunk'>@@ -1,23 +1,19 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='ctx'> /* Applied Micro X-Gene SoC Ethernet Driver</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (c) 2014, Applied Micro Circuits Corporation</div><div class='ctx'>  * Authors: Iyappan Subramanian &lt;isubramanian@apm.com&gt;</div><div class='ctx'>  *	    Keyur Chudgar &lt;kchudgar@apm.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute  it and/or modify it</div><div class='del'>- * under  the terms of  the GNU General  Public License as published by the</div><div class='del'>- * Free Software Foundation;  either version 2 of the  License, or (at your</div><div class='del'>- * option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='add'>+#include &lt;linux/acpi.h&gt;</div><div class='add'>+#include &lt;linux/clk.h&gt;</div><div class='add'>+#include &lt;linux/err.h&gt;</div><div class='add'>+#include &lt;linux/gpio/consumer.h&gt;</div><div class='add'>+#include &lt;linux/io.h&gt;</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+#include &lt;linux/workqueue.h&gt;</div><div class='add'>+</div><div class='ctx'> #include "xgene_enet_main.h"</div><div class='ctx'> #include "xgene_enet_hw.h"</div><div class='ctx'> #include "xgene_enet_xgmac.h"</div><div class='hunk'>@@ -69,21 +65,29 @@ static bool xgene_enet_wr_indirect(void __iomem *addr, void __iomem *wr,</div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void xgene_enet_wr_mac(struct xgene_enet_pdata *pdata,</div><div class='add'>+static void xgene_enet_wr_pcs(struct xgene_enet_pdata *pdata,</div><div class='ctx'> 			      u32 wr_addr, u32 wr_data)</div><div class='ctx'> {</div><div class='ctx'> 	void __iomem *addr, *wr, *cmd, *cmd_done;</div><div class='ctx'> </div><div class='del'>-	addr = pdata-&gt;mcx_mac_addr + MAC_ADDR_REG_OFFSET;</div><div class='del'>-	wr = pdata-&gt;mcx_mac_addr + MAC_WRITE_REG_OFFSET;</div><div class='del'>-	cmd = pdata-&gt;mcx_mac_addr + MAC_COMMAND_REG_OFFSET;</div><div class='del'>-	cmd_done = pdata-&gt;mcx_mac_addr + MAC_COMMAND_DONE_REG_OFFSET;</div><div class='add'>+	addr = pdata-&gt;pcs_addr + PCS_ADDR_REG_OFFSET;</div><div class='add'>+	wr = pdata-&gt;pcs_addr + PCS_WRITE_REG_OFFSET;</div><div class='add'>+	cmd = pdata-&gt;pcs_addr + PCS_COMMAND_REG_OFFSET;</div><div class='add'>+	cmd_done = pdata-&gt;pcs_addr + PCS_COMMAND_DONE_REG_OFFSET;</div><div class='ctx'> </div><div class='ctx'> 	if (!xgene_enet_wr_indirect(addr, wr, cmd, cmd_done, wr_addr, wr_data))</div><div class='del'>-		netdev_err(pdata-&gt;ndev, "MCX mac write failed, addr: %04x\n",</div><div class='add'>+		netdev_err(pdata-&gt;ndev, "PCS write failed, addr: %04x\n",</div><div class='ctx'> 			   wr_addr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void xgene_enet_wr_axg_csr(struct xgene_enet_pdata *pdata,</div><div class='add'>+				  u32 offset, u32 val)</div><div class='add'>+{</div><div class='add'>+	void __iomem *addr = pdata-&gt;mcx_mac_csr_addr + offset;</div><div class='add'>+</div><div class='add'>+	iowrite32(val, addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void xgene_enet_rd_csr(struct xgene_enet_pdata *pdata,</div><div class='ctx'> 			      u32 offset, u32 *val)</div><div class='ctx'> {</div><div class='hunk'>@@ -122,19 +126,32 @@ static bool xgene_enet_rd_indirect(void __iomem *addr, void __iomem *rd,</div><div class='ctx'> </div><div class='ctx'> 	return true;</div><div class='ctx'> }</div><div class='del'>-static void xgene_enet_rd_mac(struct xgene_enet_pdata *pdata,</div><div class='add'>+</div><div class='add'>+static bool xgene_enet_rd_pcs(struct xgene_enet_pdata *pdata,</div><div class='ctx'> 			      u32 rd_addr, u32 *rd_data)</div><div class='ctx'> {</div><div class='ctx'> 	void __iomem *addr, *rd, *cmd, *cmd_done;</div><div class='add'>+	bool success;</div><div class='ctx'> </div><div class='del'>-	addr = pdata-&gt;mcx_mac_addr + MAC_ADDR_REG_OFFSET;</div><div class='del'>-	rd = pdata-&gt;mcx_mac_addr + MAC_READ_REG_OFFSET;</div><div class='del'>-	cmd = pdata-&gt;mcx_mac_addr + MAC_COMMAND_REG_OFFSET;</div><div class='del'>-	cmd_done = pdata-&gt;mcx_mac_addr + MAC_COMMAND_DONE_REG_OFFSET;</div><div class='add'>+	addr = pdata-&gt;pcs_addr + PCS_ADDR_REG_OFFSET;</div><div class='add'>+	rd = pdata-&gt;pcs_addr + PCS_READ_REG_OFFSET;</div><div class='add'>+	cmd = pdata-&gt;pcs_addr + PCS_COMMAND_REG_OFFSET;</div><div class='add'>+	cmd_done = pdata-&gt;pcs_addr + PCS_COMMAND_DONE_REG_OFFSET;</div><div class='ctx'> </div><div class='del'>-	if (!xgene_enet_rd_indirect(addr, rd, cmd, cmd_done, rd_addr, rd_data))</div><div class='del'>-		netdev_err(pdata-&gt;ndev, "MCX mac read failed, addr: %04x\n",</div><div class='add'>+	success = xgene_enet_rd_indirect(addr, rd, cmd, cmd_done, rd_addr, rd_data);</div><div class='add'>+	if (!success)</div><div class='add'>+		netdev_err(pdata-&gt;ndev, "PCS read failed, addr: %04x\n",</div><div class='ctx'> 			   rd_addr);</div><div class='add'>+</div><div class='add'>+	return success;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgene_enet_rd_axg_csr(struct xgene_enet_pdata *pdata,</div><div class='add'>+				  u32 offset, u32 *val)</div><div class='add'>+{</div><div class='add'>+	void __iomem *addr = pdata-&gt;mcx_mac_csr_addr + offset;</div><div class='add'>+</div><div class='add'>+	*val = ioread32(addr);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int xgene_enet_ecc_init(struct xgene_enet_pdata *pdata)</div><div class='hunk'>@@ -157,6 +174,18 @@ static int xgene_enet_ecc_init(struct xgene_enet_pdata *pdata)</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void xgene_xgmac_get_drop_cnt(struct xgene_enet_pdata *pdata,</div><div class='add'>+				     u32 *rx, u32 *tx)</div><div class='add'>+{</div><div class='add'>+	u32 count;</div><div class='add'>+</div><div class='add'>+	xgene_enet_rd_axg_csr(pdata, XGENET_ICM_ECM_DROP_COUNT_REG0, &amp;count);</div><div class='add'>+	*rx = ICM_DROP_COUNT(count);</div><div class='add'>+	*tx = ECM_DROP_COUNT(count);</div><div class='add'>+	/* Errata: 10GE_4 - ICM_ECM_DROP_COUNT not clear-on-read */</div><div class='add'>+	xgene_enet_rd_axg_csr(pdata, XGENET_ECM_CONFIG0_REG_0, &amp;count);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void xgene_enet_config_ring_if_assoc(struct xgene_enet_pdata *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	xgene_enet_wr_ring_if(pdata, ENET_CFGSSQMIWQASSOC_ADDR, 0);</div><div class='hunk'>@@ -171,10 +200,21 @@ static void xgene_xgmac_reset(struct xgene_enet_pdata *pdata)</div><div class='ctx'> 	xgene_enet_wr_mac(pdata, AXGMAC_CONFIG_0, 0);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void xgene_pcs_reset(struct xgene_enet_pdata *pdata)</div><div class='add'>+{</div><div class='add'>+	u32 data;</div><div class='add'>+</div><div class='add'>+	if (!xgene_enet_rd_pcs(pdata, PCS_CONTROL_1, &amp;data))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	xgene_enet_wr_pcs(pdata, PCS_CONTROL_1, data | PCS_CTRL_PCS_RST);</div><div class='add'>+	xgene_enet_wr_pcs(pdata, PCS_CONTROL_1, data &amp; ~PCS_CTRL_PCS_RST);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void xgene_xgmac_set_mac_addr(struct xgene_enet_pdata *pdata)</div><div class='ctx'> {</div><div class='add'>+	const u8 *dev_addr = pdata-&gt;ndev-&gt;dev_addr;</div><div class='ctx'> 	u32 addr0, addr1;</div><div class='del'>-	u8 *dev_addr = pdata-&gt;ndev-&gt;dev_addr;</div><div class='ctx'> </div><div class='ctx'> 	addr0 = (dev_addr[3] &lt;&lt; 24) | (dev_addr[2] &lt;&lt; 16) |</div><div class='ctx'> 		(dev_addr[1] &lt;&lt; 8) | dev_addr[0];</div><div class='hunk'>@@ -184,6 +224,30 @@ static void xgene_xgmac_set_mac_addr(struct xgene_enet_pdata *pdata)</div><div class='ctx'> 	xgene_enet_wr_mac(pdata, HSTMACADR_MSW_ADDR, addr1);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void xgene_xgmac_set_mss(struct xgene_enet_pdata *pdata,</div><div class='add'>+				u16 mss, u8 index)</div><div class='add'>+{</div><div class='add'>+	u8 offset;</div><div class='add'>+	u32 data;</div><div class='add'>+</div><div class='add'>+	offset = (index &lt; 2) ? 0 : 4;</div><div class='add'>+	xgene_enet_rd_csr(pdata, XG_TSIF_MSS_REG0_ADDR + offset, &amp;data);</div><div class='add'>+</div><div class='add'>+	if (!(index &amp; 0x1))</div><div class='add'>+		data = SET_VAL(TSO_MSS1, data &gt;&gt; TSO_MSS1_POS) |</div><div class='add'>+			SET_VAL(TSO_MSS0, mss);</div><div class='add'>+	else</div><div class='add'>+		data = SET_VAL(TSO_MSS1, mss) | SET_VAL(TSO_MSS0, data);</div><div class='add'>+</div><div class='add'>+	xgene_enet_wr_csr(pdata, XG_TSIF_MSS_REG0_ADDR + offset, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgene_xgmac_set_frame_size(struct xgene_enet_pdata *pdata, int size)</div><div class='add'>+{</div><div class='add'>+	xgene_enet_wr_mac(pdata, HSTMAXFRAME_LENGTH_ADDR,</div><div class='add'>+			  ((((size + 2) &gt;&gt; 2) &lt;&lt; 16) | size));</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static u32 xgene_enet_link_status(struct xgene_enet_pdata *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	u32 data;</div><div class='hunk'>@@ -193,37 +257,105 @@ static u32 xgene_enet_link_status(struct xgene_enet_pdata *pdata)</div><div class='ctx'> 	return data;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='add'>+static void xgene_xgmac_enable_tx_pause(struct xgene_enet_pdata *pdata,</div><div class='add'>+					bool enable)</div><div class='add'>+{</div><div class='add'>+	u32 data;</div><div class='add'>+</div><div class='add'>+	xgene_enet_rd_axg_csr(pdata, XGENET_CSR_ECM_CFG_0_ADDR, &amp;data);</div><div class='add'>+</div><div class='add'>+	if (enable)</div><div class='add'>+		data |= MULTI_DPF_AUTOCTRL | PAUSE_XON_EN;</div><div class='add'>+	else</div><div class='add'>+		data &amp;= ~(MULTI_DPF_AUTOCTRL | PAUSE_XON_EN);</div><div class='add'>+</div><div class='add'>+	xgene_enet_wr_axg_csr(pdata, XGENET_CSR_ECM_CFG_0_ADDR, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgene_xgmac_flowctl_tx(struct xgene_enet_pdata *pdata, bool enable)</div><div class='add'>+{</div><div class='add'>+	u32 data;</div><div class='add'>+</div><div class='add'>+	data = xgene_enet_rd_mac(pdata, AXGMAC_CONFIG_1);</div><div class='add'>+</div><div class='add'>+	if (enable)</div><div class='add'>+		data |= HSTTCTLEN;</div><div class='add'>+	else</div><div class='add'>+		data &amp;= ~HSTTCTLEN;</div><div class='add'>+</div><div class='add'>+	xgene_enet_wr_mac(pdata, AXGMAC_CONFIG_1, data);</div><div class='add'>+</div><div class='add'>+	pdata-&gt;mac_ops-&gt;enable_tx_pause(pdata, enable);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgene_xgmac_flowctl_rx(struct xgene_enet_pdata *pdata, bool enable)</div><div class='add'>+{</div><div class='add'>+	u32 data;</div><div class='add'>+</div><div class='add'>+	data = xgene_enet_rd_mac(pdata, AXGMAC_CONFIG_1);</div><div class='add'>+</div><div class='add'>+	if (enable)</div><div class='add'>+		data |= HSTRCTLEN;</div><div class='add'>+	else</div><div class='add'>+		data &amp;= ~HSTRCTLEN;</div><div class='add'>+</div><div class='add'>+	xgene_enet_wr_mac(pdata, AXGMAC_CONFIG_1, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='ctx'> static void xgene_xgmac_init(struct xgene_enet_pdata *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	u32 data;</div><div class='ctx'> </div><div class='ctx'> 	xgene_xgmac_reset(pdata);</div><div class='ctx'> </div><div class='del'>-	xgene_enet_rd_mac(pdata, AXGMAC_CONFIG_1, &amp;data);</div><div class='add'>+	data = xgene_enet_rd_mac(pdata, AXGMAC_CONFIG_1);</div><div class='ctx'> 	data |= HSTPPEN;</div><div class='ctx'> 	data &amp;= ~HSTLENCHK;</div><div class='ctx'> 	xgene_enet_wr_mac(pdata, AXGMAC_CONFIG_1, data);</div><div class='ctx'> </div><div class='del'>-	xgene_enet_wr_mac(pdata, HSTMAXFRAME_LENGTH_ADDR, 0x06000600);</div><div class='ctx'> 	xgene_xgmac_set_mac_addr(pdata);</div><div class='ctx'> </div><div class='ctx'> 	xgene_enet_rd_csr(pdata, XG_RSIF_CONFIG_REG_ADDR, &amp;data);</div><div class='ctx'> 	data |= CFG_RSIF_FPBUFF_TIMEOUT_EN;</div><div class='add'>+	/* Errata 10GE_1 - FIFO threshold default value incorrect */</div><div class='add'>+	RSIF_CLE_BUFF_THRESH_SET(&amp;data, XG_RSIF_CLE_BUFF_THRESH);</div><div class='ctx'> 	xgene_enet_wr_csr(pdata, XG_RSIF_CONFIG_REG_ADDR, data);</div><div class='ctx'> </div><div class='del'>-	xgene_enet_wr_csr(pdata, XG_CFG_BYPASS_ADDR, RESUME_TX);</div><div class='del'>-	xgene_enet_wr_csr(pdata, XGENET_RX_DV_GATE_REG_0_ADDR, 0);</div><div class='add'>+	/* Errata 10GE_1 - FIFO threshold default value incorrect */</div><div class='add'>+	xgene_enet_rd_csr(pdata, XG_RSIF_CONFIG1_REG_ADDR, &amp;data);</div><div class='add'>+	RSIF_PLC_CLE_BUFF_THRESH_SET(&amp;data, XG_RSIF_PLC_CLE_BUFF_THRESH);</div><div class='add'>+	xgene_enet_wr_csr(pdata, XG_RSIF_CONFIG1_REG_ADDR, data);</div><div class='add'>+</div><div class='ctx'> 	xgene_enet_rd_csr(pdata, XG_ENET_SPARE_CFG_REG_ADDR, &amp;data);</div><div class='ctx'> 	data |= BIT(12);</div><div class='ctx'> 	xgene_enet_wr_csr(pdata, XG_ENET_SPARE_CFG_REG_ADDR, data);</div><div class='ctx'> 	xgene_enet_wr_csr(pdata, XG_ENET_SPARE_CFG_REG_1_ADDR, 0x82);</div><div class='add'>+	xgene_enet_wr_csr(pdata, XGENET_RX_DV_GATE_REG_0_ADDR, 0);</div><div class='add'>+	xgene_enet_wr_csr(pdata, XG_CFG_BYPASS_ADDR, RESUME_TX);</div><div class='add'>+</div><div class='add'>+	/* Configure HW pause frame generation */</div><div class='add'>+	xgene_enet_rd_axg_csr(pdata, XGENET_CSR_MULTI_DPF0_ADDR, &amp;data);</div><div class='add'>+	data = (DEF_QUANTA &lt;&lt; 16) | (data &amp; 0xFFFF);</div><div class='add'>+	xgene_enet_wr_axg_csr(pdata, XGENET_CSR_MULTI_DPF0_ADDR, data);</div><div class='add'>+</div><div class='add'>+	if (pdata-&gt;enet_id != XGENE_ENET1) {</div><div class='add'>+		xgene_enet_rd_axg_csr(pdata, XGENET_CSR_MULTI_DPF1_ADDR, &amp;data);</div><div class='add'>+		data = (NORM_PAUSE_OPCODE &lt;&lt; 16) | (data &amp; 0xFFFF);</div><div class='add'>+		xgene_enet_wr_axg_csr(pdata, XGENET_CSR_MULTI_DPF1_ADDR, data);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	data = (XG_DEF_PAUSE_OFF_THRES &lt;&lt; 16) | XG_DEF_PAUSE_THRES;</div><div class='add'>+	xgene_enet_wr_csr(pdata, XG_RXBUF_PAUSE_THRESH, data);</div><div class='add'>+</div><div class='add'>+	xgene_xgmac_flowctl_tx(pdata, pdata-&gt;tx_pause);</div><div class='add'>+	xgene_xgmac_flowctl_rx(pdata, pdata-&gt;rx_pause);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgene_xgmac_rx_enable(struct xgene_enet_pdata *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	u32 data;</div><div class='ctx'> </div><div class='del'>-	xgene_enet_rd_mac(pdata, AXGMAC_CONFIG_1, &amp;data);</div><div class='add'>+	data = xgene_enet_rd_mac(pdata, AXGMAC_CONFIG_1);</div><div class='ctx'> 	xgene_enet_wr_mac(pdata, AXGMAC_CONFIG_1, data | HSTRFEN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -231,7 +363,7 @@ static void xgene_xgmac_tx_enable(struct xgene_enet_pdata *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	u32 data;</div><div class='ctx'> </div><div class='del'>-	xgene_enet_rd_mac(pdata, AXGMAC_CONFIG_1, &amp;data);</div><div class='add'>+	data = xgene_enet_rd_mac(pdata, AXGMAC_CONFIG_1);</div><div class='ctx'> 	xgene_enet_wr_mac(pdata, AXGMAC_CONFIG_1, data | HSTTFEN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -239,7 +371,7 @@ static void xgene_xgmac_rx_disable(struct xgene_enet_pdata *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	u32 data;</div><div class='ctx'> </div><div class='del'>-	xgene_enet_rd_mac(pdata, AXGMAC_CONFIG_1, &amp;data);</div><div class='add'>+	data = xgene_enet_rd_mac(pdata, AXGMAC_CONFIG_1);</div><div class='ctx'> 	xgene_enet_wr_mac(pdata, AXGMAC_CONFIG_1, data &amp; ~HSTRFEN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -247,19 +379,35 @@ static void xgene_xgmac_tx_disable(struct xgene_enet_pdata *pdata)</div><div class='ctx'> {</div><div class='ctx'> 	u32 data;</div><div class='ctx'> </div><div class='del'>-	xgene_enet_rd_mac(pdata, AXGMAC_CONFIG_1, &amp;data);</div><div class='add'>+	data = xgene_enet_rd_mac(pdata, AXGMAC_CONFIG_1);</div><div class='ctx'> 	xgene_enet_wr_mac(pdata, AXGMAC_CONFIG_1, data &amp; ~HSTTFEN);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static int xgene_enet_reset(struct xgene_enet_pdata *pdata)</div><div class='ctx'> {</div><div class='add'>+	struct device *dev = &amp;pdata-&gt;pdev-&gt;dev;</div><div class='add'>+</div><div class='ctx'> 	if (!xgene_ring_mgr_init(pdata))</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> </div><div class='del'>-	if (!IS_ERR(pdata-&gt;clk)) {</div><div class='add'>+	if (dev-&gt;of_node) {</div><div class='ctx'> 		clk_prepare_enable(pdata-&gt;clk);</div><div class='add'>+		udelay(5);</div><div class='ctx'> 		clk_disable_unprepare(pdata-&gt;clk);</div><div class='add'>+		udelay(5);</div><div class='ctx'> 		clk_prepare_enable(pdata-&gt;clk);</div><div class='add'>+		udelay(5);</div><div class='add'>+	} else {</div><div class='add'>+#ifdef CONFIG_ACPI</div><div class='add'>+		acpi_status status;</div><div class='add'>+</div><div class='add'>+		status = acpi_evaluate_object(ACPI_HANDLE(&amp;pdata-&gt;pdev-&gt;dev),</div><div class='add'>+					      "_RST", NULL, NULL);</div><div class='add'>+		if (ACPI_FAILURE(status)) {</div><div class='add'>+			acpi_evaluate_object(ACPI_HANDLE(&amp;pdata-&gt;pdev-&gt;dev),</div><div class='add'>+					     "_INI", NULL, NULL);</div><div class='add'>+		}</div><div class='add'>+#endif</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	xgene_enet_ecc_init(pdata);</div><div class='hunk'>@@ -269,26 +417,64 @@ static int xgene_enet_reset(struct xgene_enet_pdata *pdata)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgene_enet_xgcle_bypass(struct xgene_enet_pdata *pdata,</div><div class='del'>-				    u32 dst_ring_num, u16 bufpool_id)</div><div class='add'>+				    u32 dst_ring_num, u16 bufpool_id,</div><div class='add'>+				    u16 nxtbufpool_id)</div><div class='ctx'> {</div><div class='del'>-	u32 cb, fpsel;</div><div class='add'>+	u32 cb, fpsel, nxtfpsel;</div><div class='ctx'> </div><div class='ctx'> 	xgene_enet_rd_csr(pdata, XCLE_BYPASS_REG0_ADDR, &amp;cb);</div><div class='ctx'> 	cb |= CFG_CLE_BYPASS_EN0;</div><div class='ctx'> 	CFG_CLE_IP_PROTOCOL0_SET(&amp;cb, 3);</div><div class='ctx'> 	xgene_enet_wr_csr(pdata, XCLE_BYPASS_REG0_ADDR, cb);</div><div class='ctx'> </div><div class='del'>-	fpsel = xgene_enet_ring_bufnum(bufpool_id) - 0x20;</div><div class='add'>+	fpsel = xgene_enet_get_fpsel(bufpool_id);</div><div class='add'>+	nxtfpsel = xgene_enet_get_fpsel(nxtbufpool_id);</div><div class='ctx'> 	xgene_enet_rd_csr(pdata, XCLE_BYPASS_REG1_ADDR, &amp;cb);</div><div class='ctx'> 	CFG_CLE_DSTQID0_SET(&amp;cb, dst_ring_num);</div><div class='ctx'> 	CFG_CLE_FPSEL0_SET(&amp;cb, fpsel);</div><div class='add'>+	CFG_CLE_NXTFPSEL0_SET(&amp;cb, nxtfpsel);</div><div class='ctx'> 	xgene_enet_wr_csr(pdata, XCLE_BYPASS_REG1_ADDR, cb);</div><div class='add'>+	pr_info("+ cle_bypass: fpsel: %d nxtfpsel: %d\n", fpsel, nxtfpsel);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgene_enet_shutdown(struct xgene_enet_pdata *pdata)</div><div class='ctx'> {</div><div class='del'>-	if (!IS_ERR(pdata-&gt;clk))</div><div class='del'>-		clk_disable_unprepare(pdata-&gt;clk);</div><div class='add'>+	struct device *dev = &amp;pdata-&gt;pdev-&gt;dev;</div><div class='add'>+</div><div class='add'>+	if (dev-&gt;of_node) {</div><div class='add'>+		if (!IS_ERR(pdata-&gt;clk))</div><div class='add'>+			clk_disable_unprepare(pdata-&gt;clk);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void xgene_enet_clear(struct xgene_enet_pdata *pdata,</div><div class='add'>+			     struct xgene_enet_desc_ring *ring)</div><div class='add'>+{</div><div class='add'>+	u32 addr, data;</div><div class='add'>+</div><div class='add'>+	if (xgene_enet_is_bufpool(ring-&gt;id)) {</div><div class='add'>+		addr = ENET_CFGSSQMIFPRESET_ADDR;</div><div class='add'>+		data = BIT(xgene_enet_get_fpsel(ring-&gt;id));</div><div class='add'>+	} else {</div><div class='add'>+		addr = ENET_CFGSSQMIWQRESET_ADDR;</div><div class='add'>+		data = BIT(xgene_enet_ring_bufnum(ring-&gt;id));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	xgene_enet_wr_ring_if(pdata, addr, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int xgene_enet_gpio_lookup(struct xgene_enet_pdata *pdata)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = &amp;pdata-&gt;pdev-&gt;dev;</div><div class='add'>+</div><div class='add'>+	pdata-&gt;sfp_rdy = gpiod_get(dev, "rxlos", GPIOD_IN);</div><div class='add'>+	if (IS_ERR(pdata-&gt;sfp_rdy))</div><div class='add'>+		pdata-&gt;sfp_rdy = gpiod_get(dev, "sfp", GPIOD_IN);</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(pdata-&gt;sfp_rdy))</div><div class='add'>+		return -ENODEV;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void xgene_enet_link_state(struct work_struct *work)</div><div class='hunk'>@@ -299,10 +485,14 @@ static void xgene_enet_link_state(struct work_struct *work)</div><div class='ctx'> 	u32 link_status, poll_interval;</div><div class='ctx'> </div><div class='ctx'> 	link_status = xgene_enet_link_status(pdata);</div><div class='add'>+	if (pdata-&gt;sfp_gpio_en &amp;&amp; link_status &amp;&amp;</div><div class='add'>+	    (!IS_ERR(pdata-&gt;sfp_rdy) || !xgene_enet_gpio_lookup(pdata)) &amp;&amp;</div><div class='add'>+	    !gpiod_get_value(pdata-&gt;sfp_rdy))</div><div class='add'>+		link_status = 0;</div><div class='add'>+</div><div class='ctx'> 	if (link_status) {</div><div class='ctx'> 		if (!netif_carrier_ok(ndev)) {</div><div class='ctx'> 			netif_carrier_on(ndev);</div><div class='del'>-			xgene_xgmac_init(pdata);</div><div class='ctx'> 			xgene_xgmac_rx_enable(pdata);</div><div class='ctx'> 			xgene_xgmac_tx_enable(pdata);</div><div class='ctx'> 			netdev_info(ndev, "Link is Up - 10Gbps\n");</div><div class='hunk'>@@ -316,12 +506,14 @@ static void xgene_enet_link_state(struct work_struct *work)</div><div class='ctx'> 			netdev_info(ndev, "Link is Down\n");</div><div class='ctx'> 		}</div><div class='ctx'> 		poll_interval = PHY_POLL_LINK_OFF;</div><div class='add'>+</div><div class='add'>+		xgene_pcs_reset(pdata);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	schedule_delayed_work(&amp;pdata-&gt;link_work, poll_interval);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-struct xgene_mac_ops xgene_xgmac_ops = {</div><div class='add'>+const struct xgene_mac_ops xgene_xgmac_ops = {</div><div class='ctx'> 	.init = xgene_xgmac_init,</div><div class='ctx'> 	.reset = xgene_xgmac_reset,</div><div class='ctx'> 	.rx_enable = xgene_xgmac_rx_enable,</div><div class='hunk'>@@ -329,11 +521,18 @@ struct xgene_mac_ops xgene_xgmac_ops = {</div><div class='ctx'> 	.rx_disable = xgene_xgmac_rx_disable,</div><div class='ctx'> 	.tx_disable = xgene_xgmac_tx_disable,</div><div class='ctx'> 	.set_mac_addr = xgene_xgmac_set_mac_addr,</div><div class='del'>-	.link_state = xgene_enet_link_state</div><div class='add'>+	.set_framesize = xgene_xgmac_set_frame_size,</div><div class='add'>+	.set_mss = xgene_xgmac_set_mss,</div><div class='add'>+	.get_drop_cnt = xgene_xgmac_get_drop_cnt,</div><div class='add'>+	.link_state = xgene_enet_link_state,</div><div class='add'>+	.enable_tx_pause = xgene_xgmac_enable_tx_pause,</div><div class='add'>+	.flowctl_rx = xgene_xgmac_flowctl_rx,</div><div class='add'>+	.flowctl_tx = xgene_xgmac_flowctl_tx</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-struct xgene_port_ops xgene_xgport_ops = {</div><div class='add'>+const struct xgene_port_ops xgene_xgport_ops = {</div><div class='ctx'> 	.reset = xgene_enet_reset,</div><div class='add'>+	.clear = xgene_enet_clear,</div><div class='ctx'> 	.cle_bypass = xgene_enet_xgcle_bypass,</div><div class='ctx'> 	.shutdown = xgene_enet_shutdown,</div><div class='ctx'> };</div><div class='head'>diff --git a/drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.h b/drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.h<br/>index bf0a99435737..98622dcf6c53 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.h</a></div><div class='hunk'>@@ -1,21 +1,9 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='ctx'> /* Applied Micro X-Gene SoC Ethernet Driver</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (c) 2014, Applied Micro Circuits Corporation</div><div class='ctx'>  * Authors: Iyappan Subramanian &lt;isubramanian@apm.com&gt;</div><div class='ctx'>  *	    Keyur Chudgar &lt;kchudgar@apm.com&gt;</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute  it and/or modify it</div><div class='del'>- * under  the terms of  the GNU General  Public License as published by the</div><div class='del'>- * Free Software Foundation;  either version 2 of the  License, or (at your</div><div class='del'>- * option) any later version.</div><div class='del'>- *</div><div class='del'>- * This program is distributed in the hope that it will be useful,</div><div class='del'>- * but WITHOUT ANY WARRANTY; without even the implied warranty of</div><div class='del'>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</div><div class='del'>- * GNU General Public License for more details.</div><div class='del'>- *</div><div class='del'>- * You should have received a copy of the GNU General Public License</div><div class='del'>- * along with this program.  If not, see &lt;http://www.gnu.org/licenses/&gt;.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #ifndef __XGENE_ENET_XGMAC_H__</div><div class='hunk'>@@ -23,7 +11,9 @@</div><div class='ctx'> </div><div class='ctx'> #define X2_BLOCK_ETH_MAC_CSR_OFFSET	0x3000</div><div class='ctx'> #define BLOCK_AXG_MAC_OFFSET		0x0800</div><div class='add'>+#define BLOCK_AXG_STATS_OFFSET		0x0800</div><div class='ctx'> #define BLOCK_AXG_MAC_CSR_OFFSET	0x2000</div><div class='add'>+#define BLOCK_PCS_OFFSET		0x3800</div><div class='ctx'> </div><div class='ctx'> #define XGENET_CONFIG_REG_ADDR		0x20</div><div class='ctx'> #define XGENET_SRST_ADDR		0x00</div><div class='hunk'>@@ -58,16 +48,42 @@</div><div class='ctx'> #define HSTMAXFRAME_LENGTH_ADDR		0x0020</div><div class='ctx'> </div><div class='ctx'> #define XG_MCX_RX_DV_GATE_REG_0_ADDR	0x0004</div><div class='add'>+#define XG_MCX_ECM_CFG_0_ADDR		0x0074</div><div class='add'>+#define XG_MCX_MULTI_DPF0_ADDR		0x007c</div><div class='add'>+#define XG_MCX_MULTI_DPF1_ADDR		0x0080</div><div class='add'>+#define XG_DEF_PAUSE_THRES		0x390</div><div class='add'>+#define XG_DEF_PAUSE_OFF_THRES		0x2c0</div><div class='ctx'> #define XG_RSIF_CONFIG_REG_ADDR		0x00a0</div><div class='add'>+#define XG_RSIF_CLE_BUFF_THRESH                0x3</div><div class='add'>+#define RSIF_CLE_BUFF_THRESH_SET(dst, val)     xgene_set_bits(dst, val, 0, 3)</div><div class='add'>+#define XG_RSIF_CONFIG1_REG_ADDR       0x00b8</div><div class='add'>+#define XG_RSIF_PLC_CLE_BUFF_THRESH    0x1</div><div class='add'>+#define RSIF_PLC_CLE_BUFF_THRESH_SET(dst, val) xgene_set_bits(dst, val, 0, 2)</div><div class='add'>+#define XG_MCX_ECM_CONFIG0_REG_0_ADDR          0x0070</div><div class='add'>+#define XG_MCX_ICM_ECM_DROP_COUNT_REG0_ADDR    0x0124</div><div class='ctx'> #define XCLE_BYPASS_REG0_ADDR           0x0160</div><div class='ctx'> #define XCLE_BYPASS_REG1_ADDR           0x0164</div><div class='ctx'> #define XG_CFG_BYPASS_ADDR		0x0204</div><div class='add'>+#define XG_CFG_LINK_AGGR_RESUME_0_ADDR	0x0214</div><div class='ctx'> #define XG_LINK_STATUS_ADDR		0x0228</div><div class='add'>+#define XG_TSIF_MSS_REG0_ADDR		0x02a4</div><div class='add'>+#define XG_DEBUG_REG_ADDR		0x0400</div><div class='ctx'> #define XG_ENET_SPARE_CFG_REG_ADDR	0x040c</div><div class='ctx'> #define XG_ENET_SPARE_CFG_REG_1_ADDR	0x0410</div><div class='ctx'> #define XGENET_RX_DV_GATE_REG_0_ADDR	0x0804</div><div class='add'>+#define XGENET_ECM_CONFIG0_REG_0	0x0870</div><div class='add'>+#define XGENET_ICM_ECM_DROP_COUNT_REG0	0x0924</div><div class='add'>+#define XGENET_CSR_ECM_CFG_0_ADDR	0x0880</div><div class='add'>+#define XGENET_CSR_MULTI_DPF0_ADDR	0x0888</div><div class='add'>+#define XGENET_CSR_MULTI_DPF1_ADDR	0x088c</div><div class='add'>+#define XG_RXBUF_PAUSE_THRESH		0x0020</div><div class='add'>+#define XG_MCX_ICM_CONFIG0_REG_0_ADDR	0x00e0</div><div class='add'>+#define XG_MCX_ICM_CONFIG2_REG_0_ADDR	0x00e8</div><div class='add'>+</div><div class='add'>+#define PCS_CONTROL_1			0x0000</div><div class='add'>+#define PCS_CTRL_PCS_RST		BIT(15)</div><div class='ctx'> </div><div class='del'>-extern struct xgene_mac_ops xgene_xgmac_ops;</div><div class='del'>-extern struct xgene_port_ops xgene_xgport_ops;</div><div class='add'>+extern const struct xgene_mac_ops xgene_xgmac_ops;</div><div class='add'>+extern const struct xgene_port_ops xgene_xgport_ops;</div><div class='ctx'> </div><div class='ctx'> #endif /* __XGENE_ENET_XGMAC_H__ */</div><div class='head'>diff --git a/drivers/net/ethernet/apple/Kconfig b/drivers/net/ethernet/apple/Kconfig<br/>index d19a41b0c6d2..a4176d2ecec6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apple/Kconfig?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apple/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apple/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apple/Kconfig</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> #</div><div class='ctx'> # Apple device configuration</div><div class='ctx'> #</div><div class='hunk'>@@ -6,12 +7,12 @@ config NET_VENDOR_APPLE</div><div class='ctx'> 	bool "Apple devices"</div><div class='ctx'> 	default y</div><div class='ctx'> 	depends on (PPC_PMAC &amp;&amp; PPC32) || MAC</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  If you have a network (Ethernet) card belonging to this class, say Y.</div><div class='ctx'> </div><div class='ctx'> 	  Note that the answer to this question doesn't directly affect the</div><div class='del'>-	  kernel: saying N will just cause the configurator to skip all</div><div class='del'>-	  the questions about IBM devices. If you say Y, you will be asked for</div><div class='add'>+	  kernel: saying N will just cause the configurator to skip all the</div><div class='add'>+	  questions about Apple devices. If you say Y, you will be asked for</div><div class='ctx'> 	  your specific card in the following questions.</div><div class='ctx'> </div><div class='ctx'> if NET_VENDOR_APPLE</div><div class='hunk'>@@ -20,7 +21,7 @@ config MACE</div><div class='ctx'> 	tristate "MACE (Power Mac ethernet) support"</div><div class='ctx'> 	depends on PPC_PMAC &amp;&amp; PPC32</div><div class='ctx'> 	select CRC32</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  Power Macintoshes and clones with Ethernet built-in on the</div><div class='ctx'> 	  motherboard will usually use a MACE (Medium Access Control for</div><div class='ctx'> 	  Ethernet) interface. Say Y to include support for the MACE chip.</div><div class='hunk'>@@ -31,7 +32,7 @@ config MACE</div><div class='ctx'> config MACE_AAUI_PORT</div><div class='ctx'> 	bool "Use AAUI port instead of TP by default"</div><div class='ctx'> 	depends on MACE</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  Some Apple machines (notably the Apple Network Server) which use the</div><div class='ctx'> 	  MACE ethernet chip have an Apple AUI port (small 15-pin connector),</div><div class='ctx'> 	  instead of an 8-pin RJ45 connector for twisted-pair ethernet.  Say</div><div class='hunk'>@@ -43,7 +44,7 @@ config BMAC</div><div class='ctx'> 	tristate "BMAC (G3 ethernet) support"</div><div class='ctx'> 	depends on PPC_PMAC &amp;&amp; PPC32</div><div class='ctx'> 	select CRC32</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  Say Y for support of BMAC Ethernet interfaces. These are used on G3</div><div class='ctx'> 	  computers.</div><div class='ctx'> </div><div class='hunk'>@@ -51,10 +52,10 @@ config BMAC</div><div class='ctx'> 	  will be called bmac.</div><div class='ctx'> </div><div class='ctx'> config MACMACE</div><div class='del'>-	bool "Macintosh (AV) onboard MACE ethernet"</div><div class='add'>+	tristate "Macintosh (AV) onboard MACE ethernet"</div><div class='ctx'> 	depends on MAC</div><div class='ctx'> 	select CRC32</div><div class='del'>-	---help---</div><div class='add'>+	help</div><div class='ctx'> 	  Support for the onboard AMD 79C940 MACE Ethernet controller used in</div><div class='ctx'> 	  the 660AV and 840AV Macintosh.  If you have one of these Macintoshes</div><div class='ctx'> 	  say Y here.</div><div class='head'>diff --git a/drivers/net/ethernet/apple/Makefile b/drivers/net/ethernet/apple/Makefile<br/>index 86eaa17af0f4..322457027546 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apple/Makefile?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apple/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apple/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apple/Makefile</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> #</div><div class='ctx'> # Makefile for the Apple network device drivers.</div><div class='ctx'> #</div><div class='head'>diff --git a/drivers/net/ethernet/apple/bmac.c b/drivers/net/ethernet/apple/bmac.c<br/>index a65d7a60f116..b3bf8d6f88e8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apple/bmac.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apple/bmac.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apple/bmac.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apple/bmac.c</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='ctx'>  * Network device driver for the BMAC ethernet controller on</div><div class='ctx'>  * Apple Powermacs.  Assumes it's under a DBDMA controller.</div><div class='hunk'>@@ -22,11 +23,10 @@</div><div class='ctx'> #include &lt;linux/bitrev.h&gt;</div><div class='ctx'> #include &lt;linux/ethtool.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;asm/prom.h&gt;</div><div class='add'>+#include &lt;linux/pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/dbdma.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='ctx'> #include &lt;asm/page.h&gt;</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/machdep.h&gt;</div><div class='ctx'> #include &lt;asm/pmac_feature.h&gt;</div><div class='ctx'> #include &lt;asm/macio.h&gt;</div><div class='hunk'>@@ -37,11 +37,6 @@</div><div class='ctx'> #define trunc_page(x)	((void *)(((unsigned long)(x)) &amp; ~((unsigned long)(PAGE_SIZE - 1))))</div><div class='ctx'> #define round_page(x)	trunc_page(((unsigned long)(x)) + ((unsigned long)(PAGE_SIZE - 1)))</div><div class='ctx'> </div><div class='del'>-/*</div><div class='del'>- * CRC polynomial - used in working out multicast filter bits.</div><div class='del'>- */</div><div class='del'>-#define ENET_CRCPOLY 0x04c11db7</div><div class='del'>-</div><div class='ctx'> /* switch to use multicast code lifted from sunhme driver */</div><div class='ctx'> #define SUNHME_MULTICAST</div><div class='ctx'> </div><div class='hunk'>@@ -157,8 +152,8 @@ static irqreturn_t bmac_misc_intr(int irq, void *dev_id);</div><div class='ctx'> static irqreturn_t bmac_txdma_intr(int irq, void *dev_id);</div><div class='ctx'> static irqreturn_t bmac_rxdma_intr(int irq, void *dev_id);</div><div class='ctx'> static void bmac_set_timeout(struct net_device *dev);</div><div class='del'>-static void bmac_tx_timeout(unsigned long data);</div><div class='del'>-static int bmac_output(struct sk_buff *skb, struct net_device *dev);</div><div class='add'>+static void bmac_tx_timeout(struct timer_list *t);</div><div class='add'>+static netdev_tx_t bmac_output(struct sk_buff *skb, struct net_device *dev);</div><div class='ctx'> static void bmac_start(struct net_device *dev);</div><div class='ctx'> </div><div class='ctx'> #define	DBDMA_SET(x)	( ((x) | (x) &lt;&lt; 16) )</div><div class='hunk'>@@ -311,7 +306,7 @@ bmac_init_registers(struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct bmac_data *bp = netdev_priv(dev);</div><div class='ctx'> 	volatile unsigned short regValue;</div><div class='del'>-	unsigned short *pWord16;</div><div class='add'>+	const unsigned short *pWord16;</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	/* XXDEBUG(("bmac: enter init_registers\n")); */</div><div class='hunk'>@@ -374,7 +369,7 @@ bmac_init_registers(struct net_device *dev)</div><div class='ctx'> 	bmwrite(dev, BHASH1, bp-&gt;hash_table_mask[2]); 	/* bits 47 - 32 */</div><div class='ctx'> 	bmwrite(dev, BHASH0, bp-&gt;hash_table_mask[3]); 	/* bits 63 - 48 */</div><div class='ctx'> </div><div class='del'>-	pWord16 = (unsigned short *)dev-&gt;dev_addr;</div><div class='add'>+	pWord16 = (const unsigned short *)dev-&gt;dev_addr;</div><div class='ctx'> 	bmwrite(dev, MADD0, *pWord16++);</div><div class='ctx'> 	bmwrite(dev, MADD1, *pWord16++);</div><div class='ctx'> 	bmwrite(dev, MADD2, *pWord16);</div><div class='hunk'>@@ -465,7 +460,7 @@ static int bmac_suspend(struct macio_dev *mdev, pm_message_t state)</div><div class='ctx'> 	/* prolly should wait for dma to finish &amp; turn off the chip */</div><div class='ctx'> 	spin_lock_irqsave(&amp;bp-&gt;lock, flags);</div><div class='ctx'> 	if (bp-&gt;timeout_active) {</div><div class='del'>-		del_timer(&amp;bp-&gt;tx_timeout);</div><div class='add'>+		timer_delete(&amp;bp-&gt;tx_timeout);</div><div class='ctx'> 		bp-&gt;timeout_active = 0;</div><div class='ctx'> 	}</div><div class='ctx'> 	disable_irq(dev-&gt;irq);</div><div class='hunk'>@@ -480,26 +475,26 @@ static int bmac_suspend(struct macio_dev *mdev, pm_message_t state)</div><div class='ctx'> 		config = bmread(dev, RXCFG);</div><div class='ctx'> 		bmwrite(dev, RXCFG, (config &amp; ~RxMACEnable));</div><div class='ctx'> 		config = bmread(dev, TXCFG);</div><div class='del'>-       		bmwrite(dev, TXCFG, (config &amp; ~TxMACEnable));</div><div class='add'>+		bmwrite(dev, TXCFG, (config &amp; ~TxMACEnable));</div><div class='ctx'> 		bmwrite(dev, INTDISABLE, DisableAll); /* disable all intrs */</div><div class='del'>-       		/* disable rx and tx dma */</div><div class='add'>+		/* disable rx and tx dma */</div><div class='ctx'> 		rd-&gt;control = cpu_to_le32(DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE));	/* clear run bit */</div><div class='ctx'> 		td-&gt;control = cpu_to_le32(DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE));	/* clear run bit */</div><div class='del'>-       		/* free some skb's */</div><div class='del'>-       		for (i=0; i&lt;N_RX_RING; i++) {</div><div class='del'>-       			if (bp-&gt;rx_bufs[i] != NULL) {</div><div class='del'>-       				dev_kfree_skb(bp-&gt;rx_bufs[i]);</div><div class='del'>-       				bp-&gt;rx_bufs[i] = NULL;</div><div class='del'>-       			}</div><div class='del'>-       		}</div><div class='del'>-       		for (i = 0; i&lt;N_TX_RING; i++) {</div><div class='add'>+		/* free some skb's */</div><div class='add'>+		for (i=0; i&lt;N_RX_RING; i++) {</div><div class='add'>+			if (bp-&gt;rx_bufs[i] != NULL) {</div><div class='add'>+				dev_kfree_skb(bp-&gt;rx_bufs[i]);</div><div class='add'>+				bp-&gt;rx_bufs[i] = NULL;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		for (i = 0; i&lt;N_TX_RING; i++) {</div><div class='ctx'> 			if (bp-&gt;tx_bufs[i] != NULL) {</div><div class='ctx'> 		       		dev_kfree_skb(bp-&gt;tx_bufs[i]);</div><div class='ctx'> 	       			bp-&gt;tx_bufs[i] = NULL;</div><div class='ctx'> 		       	}</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='del'>-       	pmac_call_feature(PMAC_FTR_BMAC_ENABLE, macio_get_of_node(bp-&gt;mdev), 0, 0);</div><div class='add'>+	pmac_call_feature(PMAC_FTR_BMAC_ENABLE, macio_get_of_node(bp-&gt;mdev), 0, 0);</div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -513,9 +508,9 @@ static int bmac_resume(struct macio_dev *mdev)</div><div class='ctx'> 		bmac_reset_and_enable(dev);</div><div class='ctx'> </div><div class='ctx'> 	enable_irq(dev-&gt;irq);</div><div class='del'>-       	enable_irq(bp-&gt;tx_dma_intr);</div><div class='del'>-       	enable_irq(bp-&gt;rx_dma_intr);</div><div class='del'>-       	netif_device_attach(dev);</div><div class='add'>+	enable_irq(bp-&gt;tx_dma_intr);</div><div class='add'>+	enable_irq(bp-&gt;rx_dma_intr);</div><div class='add'>+	netif_device_attach(dev);</div><div class='ctx'> </div><div class='ctx'> 	return 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -524,19 +519,16 @@ static int bmac_resume(struct macio_dev *mdev)</div><div class='ctx'> static int bmac_set_address(struct net_device *dev, void *addr)</div><div class='ctx'> {</div><div class='ctx'> 	struct bmac_data *bp = netdev_priv(dev);</div><div class='del'>-	unsigned char *p = addr;</div><div class='del'>-	unsigned short *pWord16;</div><div class='add'>+	const unsigned short *pWord16;</div><div class='ctx'> 	unsigned long flags;</div><div class='del'>-	int i;</div><div class='ctx'> </div><div class='ctx'> 	XXDEBUG(("bmac: enter set_address\n"));</div><div class='ctx'> 	spin_lock_irqsave(&amp;bp-&gt;lock, flags);</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; 6; ++i) {</div><div class='del'>-		dev-&gt;dev_addr[i] = p[i];</div><div class='del'>-	}</div><div class='add'>+	eth_hw_addr_set(dev, addr);</div><div class='add'>+</div><div class='ctx'> 	/* load up the hardware address */</div><div class='del'>-	pWord16  = (unsigned short *)dev-&gt;dev_addr;</div><div class='add'>+	pWord16  = (const unsigned short *)dev-&gt;dev_addr;</div><div class='ctx'> 	bmwrite(dev, MADD0, *pWord16++);</div><div class='ctx'> 	bmwrite(dev, MADD1, *pWord16++);</div><div class='ctx'> 	bmwrite(dev, MADD2, *pWord16);</div><div class='hunk'>@@ -553,10 +545,8 @@ static inline void bmac_set_timeout(struct net_device *dev)</div><div class='ctx'> </div><div class='ctx'> 	spin_lock_irqsave(&amp;bp-&gt;lock, flags);</div><div class='ctx'> 	if (bp-&gt;timeout_active)</div><div class='del'>-		del_timer(&amp;bp-&gt;tx_timeout);</div><div class='add'>+		timer_delete(&amp;bp-&gt;tx_timeout);</div><div class='ctx'> 	bp-&gt;tx_timeout.expires = jiffies + TX_TIMEOUT;</div><div class='del'>-	bp-&gt;tx_timeout.function = bmac_tx_timeout;</div><div class='del'>-	bp-&gt;tx_timeout.data = (unsigned long) dev;</div><div class='ctx'> 	add_timer(&amp;bp-&gt;tx_timeout);</div><div class='ctx'> 	bp-&gt;timeout_active = 1;</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;bp-&gt;lock, flags);</div><div class='hunk'>@@ -764,7 +754,7 @@ static irqreturn_t bmac_txdma_intr(int irq, void *dev_id)</div><div class='ctx'> 		XXDEBUG(("bmac_txdma_intr\n"));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	/*     del_timer(&amp;bp-&gt;tx_timeout); */</div><div class='add'>+	/*     timer_delete(&amp;bp-&gt;tx_timeout); */</div><div class='ctx'> 	/*     bp-&gt;timeout_active = 0; */</div><div class='ctx'> </div><div class='ctx'> 	while (1) {</div><div class='hunk'>@@ -783,7 +773,7 @@ static irqreturn_t bmac_txdma_intr(int irq, void *dev_id)</div><div class='ctx'> </div><div class='ctx'> 		if (bp-&gt;tx_bufs[bp-&gt;tx_empty]) {</div><div class='ctx'> 			++dev-&gt;stats.tx_packets;</div><div class='del'>-			dev_kfree_skb_irq(bp-&gt;tx_bufs[bp-&gt;tx_empty]);</div><div class='add'>+			dev_consume_skb_irq(bp-&gt;tx_bufs[bp-&gt;tx_empty]);</div><div class='ctx'> 		}</div><div class='ctx'> 		bp-&gt;tx_bufs[bp-&gt;tx_empty] = NULL;</div><div class='ctx'> 		bp-&gt;tx_fullup = 0;</div><div class='hunk'>@@ -805,59 +795,6 @@ static irqreturn_t bmac_txdma_intr(int irq, void *dev_id)</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> #ifndef SUNHME_MULTICAST</div><div class='del'>-/* Real fast bit-reversal algorithm, 6-bit values */</div><div class='del'>-static int reverse6[64] = {</div><div class='del'>-	0x0,0x20,0x10,0x30,0x8,0x28,0x18,0x38,</div><div class='del'>-	0x4,0x24,0x14,0x34,0xc,0x2c,0x1c,0x3c,</div><div class='del'>-	0x2,0x22,0x12,0x32,0xa,0x2a,0x1a,0x3a,</div><div class='del'>-	0x6,0x26,0x16,0x36,0xe,0x2e,0x1e,0x3e,</div><div class='del'>-	0x1,0x21,0x11,0x31,0x9,0x29,0x19,0x39,</div><div class='del'>-	0x5,0x25,0x15,0x35,0xd,0x2d,0x1d,0x3d,</div><div class='del'>-	0x3,0x23,0x13,0x33,0xb,0x2b,0x1b,0x3b,</div><div class='del'>-	0x7,0x27,0x17,0x37,0xf,0x2f,0x1f,0x3f</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-static unsigned int</div><div class='del'>-crc416(unsigned int curval, unsigned short nxtval)</div><div class='del'>-{</div><div class='del'>-	register unsigned int counter, cur = curval, next = nxtval;</div><div class='del'>-	register int high_crc_set, low_data_set;</div><div class='del'>-</div><div class='del'>-	/* Swap bytes */</div><div class='del'>-	next = ((next &amp; 0x00FF) &lt;&lt; 8) | (next &gt;&gt; 8);</div><div class='del'>-</div><div class='del'>-	/* Compute bit-by-bit */</div><div class='del'>-	for (counter = 0; counter &lt; 16; ++counter) {</div><div class='del'>-		/* is high CRC bit set? */</div><div class='del'>-		if ((cur &amp; 0x80000000) == 0) high_crc_set = 0;</div><div class='del'>-		else high_crc_set = 1;</div><div class='del'>-</div><div class='del'>-		cur = cur &lt;&lt; 1;</div><div class='del'>-</div><div class='del'>-		if ((next &amp; 0x0001) == 0) low_data_set = 0;</div><div class='del'>-		else low_data_set = 1;</div><div class='del'>-</div><div class='del'>-		next = next &gt;&gt; 1;</div><div class='del'>-</div><div class='del'>-		/* do the XOR */</div><div class='del'>-		if (high_crc_set ^ low_data_set) cur = cur ^ ENET_CRCPOLY;</div><div class='del'>-	}</div><div class='del'>-	return cur;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static unsigned int</div><div class='del'>-bmac_crc(unsigned short *address)</div><div class='del'>-{</div><div class='del'>-	unsigned int newcrc;</div><div class='del'>-</div><div class='del'>-	XXDEBUG(("bmac_crc: addr=%#04x, %#04x, %#04x\n", *address, address[1], address[2]));</div><div class='del'>-	newcrc = crc416(0xffffffff, *address);	/* address bits 47 - 32 */</div><div class='del'>-	newcrc = crc416(newcrc, address[1]);	/* address bits 31 - 16 */</div><div class='del'>-	newcrc = crc416(newcrc, address[2]);	/* address bits 15 - 0  */</div><div class='del'>-</div><div class='del'>-	return(newcrc);</div><div class='del'>-}</div><div class='del'>-</div><div class='ctx'> /*</div><div class='ctx'>  * Add requested mcast addr to BMac's hash table filter.</div><div class='ctx'>  *</div><div class='hunk'>@@ -870,8 +807,7 @@ bmac_addhash(struct bmac_data *bp, unsigned char *addr)</div><div class='ctx'> 	unsigned short	 mask;</div><div class='ctx'> </div><div class='ctx'> 	if (!(*addr)) return;</div><div class='del'>-	crc = bmac_crc((unsigned short *)addr) &amp; 0x3f; /* Big-endian alert! */</div><div class='del'>-	crc = reverse6[crc];	/* Hyperfast bit-reversing algorithm */</div><div class='add'>+	crc = crc32(~0, addr, ETH_ALEN) &gt;&gt; 26;</div><div class='ctx'> 	if (bp-&gt;hash_use_count[crc]++) return; /* This bit is already set */</div><div class='ctx'> 	mask = crc % 16;</div><div class='ctx'> 	mask = (unsigned char)1 &lt;&lt; mask;</div><div class='hunk'>@@ -885,8 +821,7 @@ bmac_removehash(struct bmac_data *bp, unsigned char *addr)</div><div class='ctx'> 	unsigned char mask;</div><div class='ctx'> </div><div class='ctx'> 	/* Now, delete the address from the filter copy, as indicated */</div><div class='del'>-	crc = bmac_crc((unsigned short *)addr) &amp; 0x3f; /* Big-endian alert! */</div><div class='del'>-	crc = reverse6[crc];	/* Hyperfast bit-reversing algorithm */</div><div class='add'>+	crc = crc32(~0, addr, ETH_ALEN) &gt;&gt; 26;</div><div class='ctx'> 	if (bp-&gt;hash_use_count[crc] == 0) return; /* That bit wasn't in use! */</div><div class='ctx'> 	if (--bp-&gt;hash_use_count[crc]) return; /* That bit is still in use */</div><div class='ctx'> 	mask = crc % 16;</div><div class='hunk'>@@ -1187,7 +1122,7 @@ bmac_get_station_address(struct net_device *dev, unsigned char *ea)</div><div class='ctx'> 	int i;</div><div class='ctx'> 	unsigned short data;</div><div class='ctx'> </div><div class='del'>-	for (i = 0; i &lt; 6; i++)</div><div class='add'>+	for (i = 0; i &lt; 3; i++)</div><div class='ctx'> 		{</div><div class='ctx'> 			reset_and_select_srom(dev);</div><div class='ctx'> 			data = read_srom(dev, i + EnetAddressOffset/2, SROMAddressBits);</div><div class='hunk'>@@ -1218,8 +1153,7 @@ static void bmac_reset_and_enable(struct net_device *dev)</div><div class='ctx'> 	 */</div><div class='ctx'> 	skb = netdev_alloc_skb(dev, ETHERMINPACKET);</div><div class='ctx'> 	if (skb != NULL) {</div><div class='del'>-		data = skb_put(skb, ETHERMINPACKET);</div><div class='del'>-		memset(data, 0, ETHERMINPACKET);</div><div class='add'>+		data = skb_put_zero(skb, ETHERMINPACKET);</div><div class='ctx'> 		memcpy(data, dev-&gt;dev_addr, ETH_ALEN);</div><div class='ctx'> 		memcpy(data + ETH_ALEN, dev-&gt;dev_addr, ETH_ALEN);</div><div class='ctx'> 		bmac_transmit_packet(skb, dev);</div><div class='hunk'>@@ -1237,7 +1171,6 @@ static const struct net_device_ops bmac_netdev_ops = {</div><div class='ctx'> 	.ndo_start_xmit		= bmac_output,</div><div class='ctx'> 	.ndo_set_rx_mode	= bmac_set_multicast,</div><div class='ctx'> 	.ndo_set_mac_address	= bmac_set_address,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -1247,6 +1180,7 @@ static int bmac_probe(struct macio_dev *mdev, const struct of_device_id *match)</div><div class='ctx'> 	struct bmac_data *bp;</div><div class='ctx'> 	const unsigned char *prop_addr;</div><div class='ctx'> 	unsigned char addr[6];</div><div class='add'>+	u8 macaddr[6];</div><div class='ctx'> 	struct net_device *dev;</div><div class='ctx'> 	int is_bmac_plus = ((int)match-&gt;data) != 0;</div><div class='ctx'> </div><div class='hunk'>@@ -1294,7 +1228,9 @@ static int bmac_probe(struct macio_dev *mdev, const struct of_device_id *match)</div><div class='ctx'> </div><div class='ctx'> 	rev = addr[0] == 0 &amp;&amp; addr[1] == 0xA0;</div><div class='ctx'> 	for (j = 0; j &lt; 6; ++j)</div><div class='del'>-		dev-&gt;dev_addr[j] = rev ? bitrev8(addr[j]): addr[j];</div><div class='add'>+		macaddr[j] = rev ? bitrev8(addr[j]): addr[j];</div><div class='add'>+</div><div class='add'>+	eth_hw_addr_set(dev, macaddr);</div><div class='ctx'> </div><div class='ctx'> 	/* Enable chip without interrupts for now */</div><div class='ctx'> 	bmac_enable_and_reset_chip(dev);</div><div class='hunk'>@@ -1323,9 +1259,9 @@ static int bmac_probe(struct macio_dev *mdev, const struct of_device_id *match)</div><div class='ctx'> 	bp-&gt;queue = (struct sk_buff_head *)(bp-&gt;rx_cmds + N_RX_RING + 1);</div><div class='ctx'> 	skb_queue_head_init(bp-&gt;queue);</div><div class='ctx'> </div><div class='del'>-	init_timer(&amp;bp-&gt;tx_timeout);</div><div class='add'>+	timer_setup(&amp;bp-&gt;tx_timeout, bmac_tx_timeout, 0);</div><div class='ctx'> </div><div class='del'>-	ret = request_irq(dev-&gt;irq, bmac_misc_intr, 0, "BMAC-misc", dev);</div><div class='add'>+	ret = request_irq(dev-&gt;irq, bmac_misc_intr, IRQF_NO_AUTOEN, "BMAC-misc", dev);</div><div class='ctx'> 	if (ret) {</div><div class='ctx'> 		printk(KERN_ERR "BMAC: can't get irq %d\n", dev-&gt;irq);</div><div class='ctx'> 		goto err_out_iounmap_rx;</div><div class='hunk'>@@ -1344,7 +1280,6 @@ static int bmac_probe(struct macio_dev *mdev, const struct of_device_id *match)</div><div class='ctx'> 	/* Mask chip interrupts and disable chip, will be</div><div class='ctx'> 	 * re-enabled on open()</div><div class='ctx'> 	 */</div><div class='del'>-	disable_irq(dev-&gt;irq);</div><div class='ctx'> 	pmac_call_feature(PMAC_FTR_BMAC_ENABLE, macio_get_of_node(bp-&gt;mdev), 0, 0);</div><div class='ctx'> </div><div class='ctx'> 	if (register_netdev(dev) != 0) {</div><div class='hunk'>@@ -1464,7 +1399,7 @@ bmac_start(struct net_device *dev)</div><div class='ctx'> 	spin_unlock_irqrestore(&amp;bp-&gt;lock, flags);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int</div><div class='add'>+static netdev_tx_t</div><div class='ctx'> bmac_output(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct bmac_data *bp = netdev_priv(dev);</div><div class='hunk'>@@ -1473,10 +1408,10 @@ bmac_output(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> 	return NETDEV_TX_OK;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void bmac_tx_timeout(unsigned long data)</div><div class='add'>+static void bmac_tx_timeout(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-	struct net_device *dev = (struct net_device *) data;</div><div class='del'>-	struct bmac_data *bp = netdev_priv(dev);</div><div class='add'>+	struct bmac_data *bp = timer_container_of(bp, t, tx_timeout);</div><div class='add'>+	struct net_device *dev = macio_get_drvdata(bp-&gt;mdev);</div><div class='ctx'> 	volatile struct dbdma_regs __iomem *td = bp-&gt;tx_dma;</div><div class='ctx'> 	volatile struct dbdma_regs __iomem *rd = bp-&gt;rx_dma;</div><div class='ctx'> 	volatile struct dbdma_cmd *cp;</div><div class='hunk'>@@ -1518,7 +1453,7 @@ static void bmac_tx_timeout(unsigned long data)</div><div class='ctx'> 	i = bp-&gt;tx_empty;</div><div class='ctx'> 	++dev-&gt;stats.tx_errors;</div><div class='ctx'> 	if (i != bp-&gt;tx_fill) {</div><div class='del'>-		dev_kfree_skb(bp-&gt;tx_bufs[i]);</div><div class='add'>+		dev_kfree_skb_irq(bp-&gt;tx_bufs[i]);</div><div class='ctx'> 		bp-&gt;tx_bufs[i] = NULL;</div><div class='ctx'> 		if (++i &gt;= N_TX_RING) i = 0;</div><div class='ctx'> 		bp-&gt;tx_empty = i;</div><div class='hunk'>@@ -1599,14 +1534,14 @@ bmac_proc_info(char *buffer, char **start, off_t offset, int length)</div><div class='ctx'> }</div><div class='ctx'> #endif</div><div class='ctx'> </div><div class='del'>-static int bmac_remove(struct macio_dev *mdev)</div><div class='add'>+static void bmac_remove(struct macio_dev *mdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = macio_get_drvdata(mdev);</div><div class='ctx'> 	struct bmac_data *bp = netdev_priv(dev);</div><div class='ctx'> </div><div class='ctx'> 	unregister_netdev(dev);</div><div class='ctx'> </div><div class='del'>-       	free_irq(dev-&gt;irq, dev);</div><div class='add'>+	free_irq(dev-&gt;irq, dev);</div><div class='ctx'> 	free_irq(bp-&gt;tx_dma_intr, dev);</div><div class='ctx'> 	free_irq(bp-&gt;rx_dma_intr, dev);</div><div class='ctx'> </div><div class='hunk'>@@ -1617,8 +1552,6 @@ static int bmac_remove(struct macio_dev *mdev)</div><div class='ctx'> 	macio_release_resources(mdev);</div><div class='ctx'> </div><div class='ctx'> 	free_netdev(dev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static const struct of_device_id bmac_match[] =</div><div class='head'>diff --git a/drivers/net/ethernet/apple/bmac.h b/drivers/net/ethernet/apple/bmac.h<br/>index a1d19d867ba5..f8826c4ce792 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apple/bmac.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apple/bmac.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apple/bmac.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apple/bmac.h</a></div><div class='hunk'>@@ -1,13 +1,9 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='ctx'> /*</div><div class='ctx'>  * mace.h - definitions for the registers in the "Big Mac"</div><div class='ctx'>  *  Ethernet controller found in PowerMac G3 models.</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 1998 Randy Gobbel.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or</div><div class='del'>- * modify it under the terms of the GNU General Public License</div><div class='del'>- * as published by the Free Software Foundation; either version</div><div class='del'>- * 2 of the License, or (at your option) any later version.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> /* The "Big MAC" appears to have some parts in common with the Sun "Happy Meal"</div><div class='head'>diff --git a/drivers/net/ethernet/apple/mace.c b/drivers/net/ethernet/apple/mace.c<br/>index e58a7c73766e..af26905e44e3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apple/mace.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apple/mace.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apple/mace.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apple/mace.c</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> /*</div><div class='ctx'>  * Network device driver for the MACE ethernet controller on</div><div class='ctx'>  * Apple Powermacs.  Assumes it's under a DBDMA controller.</div><div class='hunk'>@@ -18,10 +19,9 @@</div><div class='ctx'> #include &lt;linux/spinlock.h&gt;</div><div class='ctx'> #include &lt;linux/bitrev.h&gt;</div><div class='ctx'> #include &lt;linux/slab.h&gt;</div><div class='del'>-#include &lt;asm/prom.h&gt;</div><div class='add'>+#include &lt;linux/pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/dbdma.h&gt;</div><div class='ctx'> #include &lt;asm/io.h&gt;</div><div class='del'>-#include &lt;asm/pgtable.h&gt;</div><div class='ctx'> #include &lt;asm/macio.h&gt;</div><div class='ctx'> </div><div class='ctx'> #include "mace.h"</div><div class='hunk'>@@ -78,7 +78,7 @@ struct mace_data {</div><div class='ctx'> </div><div class='ctx'> static int mace_open(struct net_device *dev);</div><div class='ctx'> static int mace_close(struct net_device *dev);</div><div class='del'>-static int mace_xmit_start(struct sk_buff *skb, struct net_device *dev);</div><div class='add'>+static netdev_tx_t mace_xmit_start(struct sk_buff *skb, struct net_device *dev);</div><div class='ctx'> static void mace_set_multicast(struct net_device *dev);</div><div class='ctx'> static void mace_reset(struct net_device *dev);</div><div class='ctx'> static int mace_set_address(struct net_device *dev, void *addr);</div><div class='hunk'>@@ -86,10 +86,10 @@ static irqreturn_t mace_interrupt(int irq, void *dev_id);</div><div class='ctx'> static irqreturn_t mace_txdma_intr(int irq, void *dev_id);</div><div class='ctx'> static irqreturn_t mace_rxdma_intr(int irq, void *dev_id);</div><div class='ctx'> static void mace_set_timeout(struct net_device *dev);</div><div class='del'>-static void mace_tx_timeout(unsigned long data);</div><div class='add'>+static void mace_tx_timeout(struct timer_list *t);</div><div class='ctx'> static inline void dbdma_reset(volatile struct dbdma_regs __iomem *dma);</div><div class='ctx'> static inline void mace_clean_rings(struct mace_data *mp);</div><div class='del'>-static void __mace_set_address(struct net_device *dev, void *addr);</div><div class='add'>+static void __mace_set_address(struct net_device *dev, const void *addr);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * If we can't get a skbuff when we need it, we use this area for DMA.</div><div class='hunk'>@@ -102,7 +102,6 @@ static const struct net_device_ops mace_netdev_ops = {</div><div class='ctx'> 	.ndo_start_xmit		= mace_xmit_start,</div><div class='ctx'> 	.ndo_set_rx_mode	= mace_set_multicast,</div><div class='ctx'> 	.ndo_set_mac_address	= mace_set_address,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -112,11 +111,12 @@ static int mace_probe(struct macio_dev *mdev, const struct of_device_id *match)</div><div class='ctx'> 	struct net_device *dev;</div><div class='ctx'> 	struct mace_data *mp;</div><div class='ctx'> 	const unsigned char *addr;</div><div class='add'>+	u8 macaddr[ETH_ALEN];</div><div class='ctx'> 	int j, rev, rc = -EBUSY;</div><div class='ctx'> </div><div class='ctx'> 	if (macio_resource_count(mdev) != 3 || macio_irq_count(mdev) != 3) {</div><div class='del'>-		printk(KERN_ERR "can't use MACE %s: need 3 addrs and 3 irqs\n",</div><div class='del'>-		       mace-&gt;full_name);</div><div class='add'>+		printk(KERN_ERR "can't use MACE %pOF: need 3 addrs and 3 irqs\n",</div><div class='add'>+		       mace);</div><div class='ctx'> 		return -ENODEV;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -124,8 +124,8 @@ static int mace_probe(struct macio_dev *mdev, const struct of_device_id *match)</div><div class='ctx'> 	if (addr == NULL) {</div><div class='ctx'> 		addr = of_get_property(mace, "local-mac-address", NULL);</div><div class='ctx'> 		if (addr == NULL) {</div><div class='del'>-			printk(KERN_ERR "Can't get mac-address for MACE %s\n",</div><div class='del'>-			       mace-&gt;full_name);</div><div class='add'>+			printk(KERN_ERR "Can't get mac-address for MACE %pOF\n",</div><div class='add'>+			       mace);</div><div class='ctx'> 			return -ENODEV;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='hunk'>@@ -167,8 +167,9 @@ static int mace_probe(struct macio_dev *mdev, const struct of_device_id *match)</div><div class='ctx'> </div><div class='ctx'> 	rev = addr[0] == 0 &amp;&amp; addr[1] == 0xA0;</div><div class='ctx'> 	for (j = 0; j &lt; 6; ++j) {</div><div class='del'>-		dev-&gt;dev_addr[j] = rev ? bitrev8(addr[j]): addr[j];</div><div class='add'>+		macaddr[j] = rev ? bitrev8(addr[j]): addr[j];</div><div class='ctx'> 	}</div><div class='add'>+	eth_hw_addr_set(dev, macaddr);</div><div class='ctx'> 	mp-&gt;chipid = (in_8(&amp;mp-&gt;mace-&gt;chipid_hi) &lt;&lt; 8) |</div><div class='ctx'> 			in_8(&amp;mp-&gt;mace-&gt;chipid_lo);</div><div class='ctx'> </div><div class='hunk'>@@ -197,7 +198,7 @@ static int mace_probe(struct macio_dev *mdev, const struct of_device_id *match)</div><div class='ctx'> </div><div class='ctx'> 	memset((char *) mp-&gt;tx_cmds, 0,</div><div class='ctx'> 	       (NCMDS_TX*N_TX_RING + N_RX_RING + 2) * sizeof(struct dbdma_cmd));</div><div class='del'>-	init_timer(&amp;mp-&gt;tx_timeout);</div><div class='add'>+	timer_setup(&amp;mp-&gt;tx_timeout, mace_tx_timeout, 0);</div><div class='ctx'> 	spin_lock_init(&amp;mp-&gt;lock);</div><div class='ctx'> 	mp-&gt;timeout_active = 0;</div><div class='ctx'> </div><div class='hunk'>@@ -271,7 +272,7 @@ static int mace_probe(struct macio_dev *mdev, const struct of_device_id *match)</div><div class='ctx'> 	return rc;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mace_remove(struct macio_dev *mdev)</div><div class='add'>+static void mace_remove(struct macio_dev *mdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = macio_get_drvdata(mdev);</div><div class='ctx'> 	struct mace_data *mp;</div><div class='hunk'>@@ -295,8 +296,6 @@ static int mace_remove(struct macio_dev *mdev)</div><div class='ctx'> 	free_netdev(dev);</div><div class='ctx'> </div><div class='ctx'> 	macio_release_resources(mdev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static void dbdma_reset(volatile struct dbdma_regs __iomem *dma)</div><div class='hunk'>@@ -364,28 +363,32 @@ static void mace_reset(struct net_device *dev)</div><div class='ctx'> 	out_8(&amp;mb-&gt;iac, 0);</div><div class='ctx'> </div><div class='ctx'>     if (mp-&gt;port_aaui)</div><div class='del'>-    	out_8(&amp;mb-&gt;plscc, PORTSEL_AUI + ENPLSIO);</div><div class='add'>+	out_8(&amp;mb-&gt;plscc, PORTSEL_AUI + ENPLSIO);</div><div class='ctx'>     else</div><div class='del'>-    	out_8(&amp;mb-&gt;plscc, PORTSEL_GPSI + ENPLSIO);</div><div class='add'>+	out_8(&amp;mb-&gt;plscc, PORTSEL_GPSI + ENPLSIO);</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void __mace_set_address(struct net_device *dev, void *addr)</div><div class='add'>+static void __mace_set_address(struct net_device *dev, const void *addr)</div><div class='ctx'> {</div><div class='ctx'>     struct mace_data *mp = netdev_priv(dev);</div><div class='ctx'>     volatile struct mace __iomem *mb = mp-&gt;mace;</div><div class='del'>-    unsigned char *p = addr;</div><div class='add'>+    const unsigned char *p = addr;</div><div class='add'>+    u8 macaddr[ETH_ALEN];</div><div class='ctx'>     int i;</div><div class='ctx'> </div><div class='ctx'>     /* load up the hardware address */</div><div class='ctx'>     if (mp-&gt;chipid == BROKEN_ADDRCHG_REV)</div><div class='del'>-    	out_8(&amp;mb-&gt;iac, PHYADDR);</div><div class='add'>+	out_8(&amp;mb-&gt;iac, PHYADDR);</div><div class='ctx'>     else {</div><div class='del'>-    	out_8(&amp;mb-&gt;iac, ADDRCHG | PHYADDR);</div><div class='add'>+	out_8(&amp;mb-&gt;iac, ADDRCHG | PHYADDR);</div><div class='ctx'> 	while ((in_8(&amp;mb-&gt;iac) &amp; ADDRCHG) != 0)</div><div class='ctx'> 	    ;</div><div class='ctx'>     }</div><div class='ctx'>     for (i = 0; i &lt; 6; ++i)</div><div class='del'>-	out_8(&amp;mb-&gt;padr, dev-&gt;dev_addr[i] = p[i]);</div><div class='add'>+        out_8(&amp;mb-&gt;padr, macaddr[i] = p[i]);</div><div class='add'>+</div><div class='add'>+    eth_hw_addr_set(dev, macaddr);</div><div class='add'>+</div><div class='ctx'>     if (mp-&gt;chipid != BROKEN_ADDRCHG_REV)</div><div class='ctx'>         out_8(&amp;mb-&gt;iac, 0);</div><div class='ctx'> }</div><div class='hunk'>@@ -520,15 +523,13 @@ static inline void mace_set_timeout(struct net_device *dev)</div><div class='ctx'>     struct mace_data *mp = netdev_priv(dev);</div><div class='ctx'> </div><div class='ctx'>     if (mp-&gt;timeout_active)</div><div class='del'>-	del_timer(&amp;mp-&gt;tx_timeout);</div><div class='add'>+	timer_delete(&amp;mp-&gt;tx_timeout);</div><div class='ctx'>     mp-&gt;tx_timeout.expires = jiffies + TX_TIMEOUT;</div><div class='del'>-    mp-&gt;tx_timeout.function = mace_tx_timeout;</div><div class='del'>-    mp-&gt;tx_timeout.data = (unsigned long) dev;</div><div class='ctx'>     add_timer(&amp;mp-&gt;tx_timeout);</div><div class='ctx'>     mp-&gt;timeout_active = 1;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static int mace_xmit_start(struct sk_buff *skb, struct net_device *dev)</div><div class='add'>+static netdev_tx_t mace_xmit_start(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'>     struct mace_data *mp = netdev_priv(dev);</div><div class='ctx'>     volatile struct dbdma_regs __iomem *td = mp-&gt;tx_dma;</div><div class='hunk'>@@ -675,7 +676,7 @@ static irqreturn_t mace_interrupt(int irq, void *dev_id)</div><div class='ctx'> </div><div class='ctx'>     i = mp-&gt;tx_empty;</div><div class='ctx'>     while (in_8(&amp;mb-&gt;pr) &amp; XMTSV) {</div><div class='del'>-	del_timer(&amp;mp-&gt;tx_timeout);</div><div class='add'>+	timer_delete(&amp;mp-&gt;tx_timeout);</div><div class='ctx'> 	mp-&gt;timeout_active = 0;</div><div class='ctx'> 	/*</div><div class='ctx'> 	 * Clear any interrupt indication associated with this status</div><div class='hunk'>@@ -767,7 +768,7 @@ static irqreturn_t mace_interrupt(int irq, void *dev_id)</div><div class='ctx'> 	    dev-&gt;stats.tx_bytes += mp-&gt;tx_bufs[i]-&gt;len;</div><div class='ctx'> 	    ++dev-&gt;stats.tx_packets;</div><div class='ctx'> 	}</div><div class='del'>-	dev_kfree_skb_irq(mp-&gt;tx_bufs[i]);</div><div class='add'>+	dev_consume_skb_irq(mp-&gt;tx_bufs[i]);</div><div class='ctx'> 	--mp-&gt;tx_active;</div><div class='ctx'> 	if (++i &gt;= N_TX_RING)</div><div class='ctx'> 	    i = 0;</div><div class='hunk'>@@ -802,10 +803,10 @@ static irqreturn_t mace_interrupt(int irq, void *dev_id)</div><div class='ctx'>     return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mace_tx_timeout(unsigned long data)</div><div class='add'>+static void mace_tx_timeout(struct timer_list *t)</div><div class='ctx'> {</div><div class='del'>-    struct net_device *dev = (struct net_device *) data;</div><div class='del'>-    struct mace_data *mp = netdev_priv(dev);</div><div class='add'>+    struct mace_data *mp = timer_container_of(mp, t, tx_timeout);</div><div class='add'>+    struct net_device *dev = macio_get_drvdata(mp-&gt;mdev);</div><div class='ctx'>     volatile struct mace __iomem *mb = mp-&gt;mace;</div><div class='ctx'>     volatile struct dbdma_regs __iomem *td = mp-&gt;tx_dma;</div><div class='ctx'>     volatile struct dbdma_regs __iomem *rd = mp-&gt;rx_dma;</div><div class='hunk'>@@ -843,7 +844,7 @@ static void mace_tx_timeout(unsigned long data)</div><div class='ctx'>     if (mp-&gt;tx_bad_runt) {</div><div class='ctx'> 	mp-&gt;tx_bad_runt = 0;</div><div class='ctx'>     } else if (i != mp-&gt;tx_fill) {</div><div class='del'>-	dev_kfree_skb(mp-&gt;tx_bufs[i]);</div><div class='add'>+	dev_kfree_skb_irq(mp-&gt;tx_bufs[i]);</div><div class='ctx'> 	if (++i &gt;= N_TX_RING)</div><div class='ctx'> 	    i = 0;</div><div class='ctx'> 	mp-&gt;tx_empty = i;</div><div class='head'>diff --git a/drivers/net/ethernet/apple/mace.h b/drivers/net/ethernet/apple/mace.h<br/>index 30b7ec0cedb5..697f71cf1937 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apple/mace.h?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apple/mace.h</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apple/mace.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apple/mace.h</a></div><div class='hunk'>@@ -1,13 +1,9 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-or-later */</div><div class='ctx'> /*</div><div class='ctx'>  * mace.h - definitions for the registers in the Am79C940 MACE</div><div class='ctx'>  * (Medium Access Control for Ethernet) controller.</div><div class='ctx'>  *</div><div class='ctx'>  * Copyright (C) 1996 Paul Mackerras.</div><div class='del'>- *</div><div class='del'>- * This program is free software; you can redistribute it and/or</div><div class='del'>- * modify it under the terms of the GNU General Public License</div><div class='del'>- * as published by the Free Software Foundation; either version</div><div class='del'>- * 2 of the License, or (at your option) any later version.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> #define REG(x)	volatile unsigned char x; char x ## _pad[15]</div><div class='head'>diff --git a/drivers/net/ethernet/apple/macmace.c b/drivers/net/ethernet/apple/macmace.c<br/>index 89914ca17a49..8989506e6248 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apple/macmace.c?id=e45fc85a2f371f388ff3804271375a1aedbe3744'>drivers/net/ethernet/apple/macmace.c</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/apple/macmace.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/apple/macmace.c</a></div><div class='hunk'>@@ -1,13 +1,9 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-or-later</div><div class='ctx'> /*</div><div class='ctx'>  *	Driver for the Macintosh 68K onboard MACE controller with PSC</div><div class='ctx'>  *	driven DMA. The MACE driver code is derived from mace.c. The</div><div class='ctx'>  *	Mac68k theory of operation is courtesy of the MacBSD wizards.</div><div class='ctx'>  *</div><div class='del'>- *	This program is free software; you can redistribute it and/or</div><div class='del'>- *	modify it under the terms of the GNU General Public License</div><div class='del'>- *	as published by the Free Software Foundation; either version</div><div class='del'>- *	2 of the License, or (at your option) any later version.</div><div class='del'>- *</div><div class='ctx'>  *	Copyright (C) 1996 Paul Mackerras.</div><div class='ctx'>  *	Copyright (C) 1998 Alan Cox &lt;alan@lxorguk.ukuu.org.uk&gt;</div><div class='ctx'>  *</div><div class='hunk'>@@ -81,7 +77,7 @@ struct mace_frame {</div><div class='ctx'> 	u8	pad4;</div><div class='ctx'> 	u32	pad5;</div><div class='ctx'> 	u32	pad6;</div><div class='del'>-	u8	data[1];</div><div class='add'>+	DECLARE_FLEX_ARRAY(u8, data);</div><div class='ctx'> 	/* And frame continues.. */</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -89,14 +85,14 @@ struct mace_frame {</div><div class='ctx'> </div><div class='ctx'> static int mace_open(struct net_device *dev);</div><div class='ctx'> static int mace_close(struct net_device *dev);</div><div class='del'>-static int mace_xmit_start(struct sk_buff *skb, struct net_device *dev);</div><div class='add'>+static netdev_tx_t mace_xmit_start(struct sk_buff *skb, struct net_device *dev);</div><div class='ctx'> static void mace_set_multicast(struct net_device *dev);</div><div class='ctx'> static int mace_set_address(struct net_device *dev, void *addr);</div><div class='ctx'> static void mace_reset(struct net_device *dev);</div><div class='ctx'> static irqreturn_t mace_interrupt(int irq, void *dev_id);</div><div class='ctx'> static irqreturn_t mace_dma_intr(int irq, void *dev_id);</div><div class='del'>-static void mace_tx_timeout(struct net_device *dev);</div><div class='del'>-static void __mace_set_address(struct net_device *dev, void *addr);</div><div class='add'>+static void mace_tx_timeout(struct net_device *dev, unsigned int txqueue);</div><div class='add'>+static void __mace_set_address(struct net_device *dev, const void *addr);</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='ctx'>  * Load a receive DMA channel with a base address and ring length</div><div class='hunk'>@@ -186,7 +182,6 @@ static const struct net_device_ops mace_netdev_ops = {</div><div class='ctx'> 	.ndo_tx_timeout		= mace_tx_timeout,</div><div class='ctx'> 	.ndo_set_rx_mode	= mace_set_multicast,</div><div class='ctx'> 	.ndo_set_mac_address	= mace_set_address,</div><div class='del'>-	.ndo_change_mtu		= eth_change_mtu,</div><div class='ctx'> 	.ndo_validate_addr	= eth_validate_addr,</div><div class='ctx'> };</div><div class='ctx'> </div><div class='hunk'>@@ -202,6 +197,7 @@ static int mace_probe(struct platform_device *pdev)</div><div class='ctx'> 	unsigned char *addr;</div><div class='ctx'> 	struct net_device *dev;</div><div class='ctx'> 	unsigned char checksum = 0;</div><div class='add'>+	u8 macaddr[ETH_ALEN];</div><div class='ctx'> 	int err;</div><div class='ctx'> </div><div class='ctx'> 	dev = alloc_etherdev(PRIV_BYTES);</div><div class='hunk'>@@ -234,8 +230,9 @@ static int mace_probe(struct platform_device *pdev)</div><div class='ctx'> 	for (j = 0; j &lt; 6; ++j) {</div><div class='ctx'> 		u8 v = bitrev8(addr[j&lt;&lt;4]);</div><div class='ctx'> 		checksum ^= v;</div><div class='del'>-		dev-&gt;dev_addr[j] = v;</div><div class='add'>+		macaddr[j] = v;</div><div class='ctx'> 	}</div><div class='add'>+	eth_hw_addr_set(dev, macaddr);</div><div class='ctx'> 	for (; j &lt; 8; ++j) {</div><div class='ctx'> 		checksum ^= bitrev8(addr[j&lt;&lt;4]);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -248,8 +245,8 @@ static int mace_probe(struct platform_device *pdev)</div><div class='ctx'> 	dev-&gt;netdev_ops		= &amp;mace_netdev_ops;</div><div class='ctx'> 	dev-&gt;watchdog_timeo	= TX_TIMEOUT;</div><div class='ctx'> </div><div class='del'>-	printk(KERN_INFO "%s: 68K MACE, hardware address %pM\n",</div><div class='del'>-	       dev-&gt;name, dev-&gt;dev_addr);</div><div class='add'>+	pr_info("Onboard MACE, hardware address %pM, chip revision 0x%04X\n",</div><div class='add'>+		dev-&gt;dev_addr, mp-&gt;chipid);</div><div class='ctx'> </div><div class='ctx'> 	err = register_netdev(dev);</div><div class='ctx'> 	if (!err)</div><div class='hunk'>@@ -320,11 +317,12 @@ static void mace_reset(struct net_device *dev)</div><div class='ctx'>  * Load the address on a mace controller.</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static void __mace_set_address(struct net_device *dev, void *addr)</div><div class='add'>+static void __mace_set_address(struct net_device *dev, const void *addr)</div><div class='ctx'> {</div><div class='ctx'> 	struct mace_data *mp = netdev_priv(dev);</div><div class='ctx'> 	volatile struct mace *mb = mp-&gt;mace;</div><div class='del'>-	unsigned char *p = addr;</div><div class='add'>+	const unsigned char *p = addr;</div><div class='add'>+	u8 macaddr[ETH_ALEN];</div><div class='ctx'> 	int i;</div><div class='ctx'> </div><div class='ctx'> 	/* load up the hardware address */</div><div class='hunk'>@@ -336,7 +334,8 @@ static void __mace_set_address(struct net_device *dev, void *addr)</div><div class='ctx'> 			;</div><div class='ctx'> 	}</div><div class='ctx'> 	for (i = 0; i &lt; 6; ++i)</div><div class='del'>-		mb-&gt;padr = dev-&gt;dev_addr[i] = p[i];</div><div class='add'>+		mb-&gt;padr = macaddr[i] = p[i];</div><div class='add'>+	eth_hw_addr_set(dev, macaddr);</div><div class='ctx'> 	if (mp-&gt;chipid != BROKEN_ADDRCHG_REV)</div><div class='ctx'> 		mb-&gt;iac = 0;</div><div class='ctx'> }</div><div class='hunk'>@@ -445,7 +444,7 @@ static int mace_close(struct net_device *dev)</div><div class='ctx'>  * Transmit a frame</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='del'>-static int mace_xmit_start(struct sk_buff *skb, struct net_device *dev)</div><div class='add'>+static netdev_tx_t mace_xmit_start(struct sk_buff *skb, struct net_device *dev)</div><div class='ctx'> {</div><div class='ctx'> 	struct mace_data *mp = netdev_priv(dev);</div><div class='ctx'> 	unsigned long flags;</div><div class='hunk'>@@ -590,7 +589,6 @@ static irqreturn_t mace_interrupt(int irq, void *dev_id)</div><div class='ctx'> 			else if (fs &amp; (UFLO|LCOL|RTRY)) {</div><div class='ctx'> 				++dev-&gt;stats.tx_aborted_errors;</div><div class='ctx'> 				if (mb-&gt;xmtfs &amp; UFLO) {</div><div class='del'>-					printk(KERN_ERR "%s: DMA underrun.\n", dev-&gt;name);</div><div class='ctx'> 					dev-&gt;stats.tx_fifo_errors++;</div><div class='ctx'> 					mace_txdma_reset(dev);</div><div class='ctx'> 				}</div><div class='hunk'>@@ -606,7 +604,7 @@ static irqreturn_t mace_interrupt(int irq, void *dev_id)</div><div class='ctx'> 	return IRQ_HANDLED;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='del'>-static void mace_tx_timeout(struct net_device *dev)</div><div class='add'>+static void mace_tx_timeout(struct net_device *dev, unsigned int txqueue)</div><div class='ctx'> {</div><div class='ctx'> 	struct mace_data *mp = netdev_priv(dev);</div><div class='ctx'> 	volatile struct mace *mb = mp-&gt;mace;</div><div class='hunk'>@@ -645,10 +643,8 @@ static void mace_dma_rx_frame(struct net_device *dev, struct mace_frame *mf)</div><div class='ctx'> </div><div class='ctx'> 	if (frame_status &amp; (RS_OFLO | RS_CLSN | RS_FRAMERR | RS_FCSERR)) {</div><div class='ctx'> 		dev-&gt;stats.rx_errors++;</div><div class='del'>-		if (frame_status &amp; RS_OFLO) {</div><div class='del'>-			printk(KERN_DEBUG "%s: fifo overflow.\n", dev-&gt;name);</div><div class='add'>+		if (frame_status &amp; RS_OFLO)</div><div class='ctx'> 			dev-&gt;stats.rx_fifo_errors++;</div><div class='del'>-		}</div><div class='ctx'> 		if (frame_status &amp; RS_CLSN)</div><div class='ctx'> 			dev-&gt;stats.collisions++;</div><div class='ctx'> 		if (frame_status &amp; RS_FRAMERR)</div><div class='hunk'>@@ -664,7 +660,7 @@ static void mace_dma_rx_frame(struct net_device *dev, struct mace_frame *mf)</div><div class='ctx'> 			return;</div><div class='ctx'> 		}</div><div class='ctx'> 		skb_reserve(skb, 2);</div><div class='del'>-		memcpy(skb_put(skb, frame_length), mf-&gt;data, frame_length);</div><div class='add'>+		skb_put_data(skb, mf-&gt;data, frame_length);</div><div class='ctx'> </div><div class='ctx'> 		skb-&gt;protocol = eth_type_trans(skb, dev);</div><div class='ctx'> 		netif_rx(skb);</div><div class='hunk'>@@ -743,7 +739,7 @@ MODULE_LICENSE("GPL");</div><div class='ctx'> MODULE_DESCRIPTION("Macintosh MACE ethernet driver");</div><div class='ctx'> MODULE_ALIAS("platform:macmace");</div><div class='ctx'> </div><div class='del'>-static int mac_mace_device_remove(struct platform_device *pdev)</div><div class='add'>+static void mac_mace_device_remove(struct platform_device *pdev)</div><div class='ctx'> {</div><div class='ctx'> 	struct net_device *dev = platform_get_drvdata(pdev);</div><div class='ctx'> 	struct mace_data *mp = netdev_priv(dev);</div><div class='hunk'>@@ -759,8 +755,6 @@ static int mac_mace_device_remove(struct platform_device *pdev)</div><div class='ctx'> 	                  mp-&gt;tx_ring, mp-&gt;tx_ring_phys);</div><div class='ctx'> </div><div class='ctx'> 	free_netdev(dev);</div><div class='del'>-</div><div class='del'>-	return 0;</div><div class='ctx'> }</div><div class='ctx'> </div><div class='ctx'> static struct platform_driver mac_mace_driver = {</div><div class='hunk'>@@ -771,18 +765,4 @@ static struct platform_driver mac_mace_driver = {</div><div class='ctx'> 	},</div><div class='ctx'> };</div><div class='ctx'> </div><div class='del'>-static int __init mac_mace_init_module(void)</div><div class='del'>-{</div><div class='del'>-	if (!MACH_IS_MAC)</div><div class='del'>-		return -ENODEV;</div><div class='del'>-</div><div class='del'>-	return platform_driver_register(&amp;mac_mace_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-static void __exit mac_mace_cleanup_module(void)</div><div class='del'>-{</div><div class='del'>-	platform_driver_unregister(&amp;mac_mace_driver);</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-module_init(mac_mace_init_module);</div><div class='del'>-module_exit(mac_mace_cleanup_module);</div><div class='add'>+module_platform_driver(mac_mace_driver);</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/Kconfig b/drivers/net/ethernet/aquantia/Kconfig<br/>new file mode 100644<br/>index 000000000000..cec2018c84a9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/Kconfig?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/Kconfig</a></div><div class='hunk'>@@ -0,0 +1,26 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+#</div><div class='add'>+# aQuantia device configuration</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+config NET_VENDOR_AQUANTIA</div><div class='add'>+	bool "aQuantia devices"</div><div class='add'>+	default y</div><div class='add'>+	help</div><div class='add'>+	  Set this to y if you have an Ethernet network cards that uses the aQuantia</div><div class='add'>+	  AQC107/AQC108 chipset.</div><div class='add'>+</div><div class='add'>+	  This option does not build any drivers; it causes the aQuantia</div><div class='add'>+	  drivers that can be built to appear in the list of Ethernet drivers.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+if NET_VENDOR_AQUANTIA</div><div class='add'>+</div><div class='add'>+config AQTION</div><div class='add'>+	tristate "aQuantia AQtion(tm) Support"</div><div class='add'>+	depends on PCI</div><div class='add'>+	depends on MACSEC || MACSEC=n</div><div class='add'>+	help</div><div class='add'>+	  This enables the support for the aQuantia AQtion(tm) Ethernet card.</div><div class='add'>+</div><div class='add'>+endif # NET_VENDOR_AQUANTIA</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/Makefile b/drivers/net/ethernet/aquantia/Makefile<br/>new file mode 100644<br/>index 000000000000..c4e7d01ea650<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/Makefile</a></div><div class='hunk'>@@ -0,0 +1,6 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+#</div><div class='add'>+# Makefile for the aQuantia device drivers.</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_AQTION) += atlantic/</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/Makefile b/drivers/net/ethernet/aquantia/atlantic/Makefile<br/>new file mode 100644<br/>index 000000000000..f6a96931c89a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/Makefile?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/Makefile</a></div><div class='hunk'>@@ -0,0 +1,36 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+################################################################################</div><div class='add'>+#</div><div class='add'>+# aQuantia Ethernet Controller AQtion Linux Driver</div><div class='add'>+# Copyright(c) 2014-2017 aQuantia Corporation.</div><div class='add'>+#</div><div class='add'>+################################################################################</div><div class='add'>+</div><div class='add'>+obj-$(CONFIG_AQTION) += atlantic.o</div><div class='add'>+</div><div class='add'>+ccflags-y += -I$(src)</div><div class='add'>+</div><div class='add'>+atlantic-objs := aq_main.o \</div><div class='add'>+	aq_nic.o \</div><div class='add'>+	aq_pci_func.o \</div><div class='add'>+	aq_vec.o \</div><div class='add'>+	aq_ring.o \</div><div class='add'>+	aq_hw_utils.o \</div><div class='add'>+	aq_ethtool.o \</div><div class='add'>+	aq_drvinfo.o \</div><div class='add'>+	aq_filters.o \</div><div class='add'>+	aq_phy.o \</div><div class='add'>+	hw_atl/hw_atl_a0.o \</div><div class='add'>+	hw_atl/hw_atl_b0.o \</div><div class='add'>+	hw_atl/hw_atl_utils.o \</div><div class='add'>+	hw_atl/hw_atl_utils_fw2x.o \</div><div class='add'>+	hw_atl/hw_atl_llh.o \</div><div class='add'>+	hw_atl2/hw_atl2.o \</div><div class='add'>+	hw_atl2/hw_atl2_utils.o \</div><div class='add'>+	hw_atl2/hw_atl2_utils_fw.o \</div><div class='add'>+	hw_atl2/hw_atl2_llh.o \</div><div class='add'>+	macsec/macsec_api.o</div><div class='add'>+</div><div class='add'>+atlantic-$(CONFIG_MACSEC) += aq_macsec.o</div><div class='add'>+</div><div class='add'>+atlantic-$(CONFIG_PTP_1588_CLOCK) += aq_ptp.o</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_cfg.h b/drivers/net/ethernet/aquantia/atlantic/aq_cfg.h<br/>new file mode 100644<br/>index 000000000000..fc2b325f34e7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_cfg.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_cfg.h</a></div><div class='hunk'>@@ -0,0 +1,86 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*</div><div class='add'>+ * aQuantia Corporation Network Driver</div><div class='add'>+ * Copyright (C) 2014-2019 aQuantia Corporation. All rights reserved</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* File aq_cfg.h: Definition of configuration parameters and constants. */</div><div class='add'>+</div><div class='add'>+#ifndef AQ_CFG_H</div><div class='add'>+#define AQ_CFG_H</div><div class='add'>+</div><div class='add'>+#define AQ_CFG_VECS_DEF   8U</div><div class='add'>+#define AQ_CFG_TCS_DEF    1U</div><div class='add'>+</div><div class='add'>+#define AQ_CFG_TXDS_DEF    4096U</div><div class='add'>+#define AQ_CFG_RXDS_DEF    2048U</div><div class='add'>+</div><div class='add'>+#define AQ_CFG_IS_POLLING_DEF 0U</div><div class='add'>+</div><div class='add'>+#define AQ_CFG_FORCE_INTX	0U</div><div class='add'>+</div><div class='add'>+#define AQ_CFG_INTERRUPT_MODERATION_OFF		0</div><div class='add'>+#define AQ_CFG_INTERRUPT_MODERATION_ON		1</div><div class='add'>+#define AQ_CFG_INTERRUPT_MODERATION_AUTO	0xFFFFU</div><div class='add'>+</div><div class='add'>+#define AQ_CFG_INTERRUPT_MODERATION_USEC_MAX (0x1FF * 2)</div><div class='add'>+</div><div class='add'>+#define AQ_CFG_IRQ_MASK                      0x3FFU</div><div class='add'>+</div><div class='add'>+#define AQ_CFG_VECS_MAX   8U</div><div class='add'>+#define AQ_CFG_TCS_MAX    8U</div><div class='add'>+</div><div class='add'>+#define AQ_CFG_TX_FRAME_MAX  (16U * 1024U)</div><div class='add'>+#define AQ_CFG_RX_FRAME_MAX  (2U * 1024U)</div><div class='add'>+</div><div class='add'>+#define AQ_CFG_TX_CLEAN_BUDGET 256U</div><div class='add'>+</div><div class='add'>+#define AQ_CFG_RX_REFILL_THRES 32U</div><div class='add'>+</div><div class='add'>+#define AQ_CFG_RX_HDR_SIZE 256U</div><div class='add'>+</div><div class='add'>+#define AQ_CFG_RX_PAGEORDER 0U</div><div class='add'>+#define AQ_CFG_XDP_PAGEORDER 2U</div><div class='add'>+</div><div class='add'>+/* LRO */</div><div class='add'>+#define AQ_CFG_IS_LRO_DEF           1U</div><div class='add'>+</div><div class='add'>+/* RSS */</div><div class='add'>+#define AQ_CFG_RSS_INDIRECTION_TABLE_MAX  64U</div><div class='add'>+#define AQ_CFG_RSS_HASHKEY_SIZE           40U</div><div class='add'>+</div><div class='add'>+#define AQ_CFG_IS_RSS_DEF           1U</div><div class='add'>+#define AQ_CFG_NUM_RSS_QUEUES_DEF   AQ_CFG_VECS_DEF</div><div class='add'>+#define AQ_CFG_RSS_BASE_CPU_NUM_DEF 0U</div><div class='add'>+</div><div class='add'>+#define AQ_CFG_PCI_FUNC_MSIX_IRQS   9U</div><div class='add'>+#define AQ_CFG_PCI_FUNC_PORTS       2U</div><div class='add'>+</div><div class='add'>+#define AQ_CFG_SERVICE_TIMER_INTERVAL    (1 * HZ)</div><div class='add'>+#define AQ_CFG_POLLING_TIMER_INTERVAL   ((unsigned int)(2 * HZ))</div><div class='add'>+</div><div class='add'>+#define AQ_CFG_SKB_FRAGS_MAX   32U</div><div class='add'>+</div><div class='add'>+/* Number of descriptors available in one ring to resume this ring queue</div><div class='add'>+ */</div><div class='add'>+#define AQ_CFG_RESTART_DESC_THRES   (AQ_CFG_SKB_FRAGS_MAX * 2)</div><div class='add'>+</div><div class='add'>+/*#define AQ_CFG_MAC_ADDR_PERMANENT {0x30, 0x0E, 0xE3, 0x12, 0x34, 0x56}*/</div><div class='add'>+</div><div class='add'>+#define AQ_CFG_FC_MODE AQ_NIC_FC_FULL</div><div class='add'>+</div><div class='add'>+/* Default WOL modes used on initialization */</div><div class='add'>+#define AQ_CFG_WOL_MODES WAKE_MAGIC</div><div class='add'>+</div><div class='add'>+#define AQ_CFG_SPEED_MSK  0xFFFFU	/* 0xFFFFU==auto_neg */</div><div class='add'>+</div><div class='add'>+#define AQ_CFG_IS_AUTONEG_DEF       1U</div><div class='add'>+#define AQ_CFG_MTU_DEF              1514U</div><div class='add'>+</div><div class='add'>+#define AQ_CFG_LOCK_TRYS   100U</div><div class='add'>+</div><div class='add'>+#define AQ_CFG_DRV_AUTHOR      "Marvell"</div><div class='add'>+#define AQ_CFG_DRV_DESC        "Marvell (Aquantia) Corporation(R) Network Driver"</div><div class='add'>+#define AQ_CFG_DRV_NAME        "atlantic"</div><div class='add'>+</div><div class='add'>+#endif /* AQ_CFG_H */</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_common.h b/drivers/net/ethernet/aquantia/atlantic/aq_common.h<br/>new file mode 100644<br/>index 000000000000..ace691d7cd75<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_common.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_common.h</a></div><div class='hunk'>@@ -0,0 +1,77 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2014-2019 aQuantia Corporation</div><div class='add'>+ * Copyright (C) 2019-2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* File aq_common.h: Basic includes for all files in project. */</div><div class='add'>+</div><div class='add'>+#ifndef AQ_COMMON_H</div><div class='add'>+#define AQ_COMMON_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/pci.h&gt;</div><div class='add'>+#include &lt;linux/if_vlan.h&gt;</div><div class='add'>+#include "aq_cfg.h"</div><div class='add'>+#include "aq_utils.h"</div><div class='add'>+</div><div class='add'>+#define PCI_VENDOR_ID_AQUANTIA  0x1D6A</div><div class='add'>+</div><div class='add'>+#define AQ_DEVICE_ID_0001	0x0001</div><div class='add'>+#define AQ_DEVICE_ID_D100	0xD100</div><div class='add'>+#define AQ_DEVICE_ID_D107	0xD107</div><div class='add'>+#define AQ_DEVICE_ID_D108	0xD108</div><div class='add'>+#define AQ_DEVICE_ID_D109	0xD109</div><div class='add'>+</div><div class='add'>+#define AQ_DEVICE_ID_AQC100	0x00B1</div><div class='add'>+#define AQ_DEVICE_ID_AQC107	0x07B1</div><div class='add'>+#define AQ_DEVICE_ID_AQC108	0x08B1</div><div class='add'>+#define AQ_DEVICE_ID_AQC109	0x09B1</div><div class='add'>+#define AQ_DEVICE_ID_AQC111	0x11B1</div><div class='add'>+#define AQ_DEVICE_ID_AQC112	0x12B1</div><div class='add'>+</div><div class='add'>+#define AQ_DEVICE_ID_AQC100S	0x80B1</div><div class='add'>+#define AQ_DEVICE_ID_AQC107S	0x87B1</div><div class='add'>+#define AQ_DEVICE_ID_AQC108S	0x88B1</div><div class='add'>+#define AQ_DEVICE_ID_AQC109S	0x89B1</div><div class='add'>+#define AQ_DEVICE_ID_AQC111S	0x91B1</div><div class='add'>+#define AQ_DEVICE_ID_AQC112S	0x92B1</div><div class='add'>+</div><div class='add'>+#define AQ_DEVICE_ID_AQC113DEV	0x00C0</div><div class='add'>+#define AQ_DEVICE_ID_AQC113CS	0x94C0</div><div class='add'>+#define AQ_DEVICE_ID_AQC113CA	0x34C0</div><div class='add'>+#define AQ_DEVICE_ID_AQC114CS	0x93C0</div><div class='add'>+#define AQ_DEVICE_ID_AQC113	0x04C0</div><div class='add'>+#define AQ_DEVICE_ID_AQC113C	0x14C0</div><div class='add'>+#define AQ_DEVICE_ID_AQC115C	0x12C0</div><div class='add'>+#define AQ_DEVICE_ID_AQC116C	0x11C0</div><div class='add'>+</div><div class='add'>+#define HW_ATL_NIC_NAME "Marvell (aQuantia) AQtion 10Gbit Network Adapter"</div><div class='add'>+</div><div class='add'>+#define AQ_HWREV_ANY	0</div><div class='add'>+#define AQ_HWREV_1	1</div><div class='add'>+#define AQ_HWREV_2	2</div><div class='add'>+</div><div class='add'>+#define AQ_NIC_RATE_10G		BIT(0)</div><div class='add'>+#define AQ_NIC_RATE_5G		BIT(1)</div><div class='add'>+#define AQ_NIC_RATE_2G5		BIT(2)</div><div class='add'>+#define AQ_NIC_RATE_1G		BIT(3)</div><div class='add'>+#define AQ_NIC_RATE_100M	BIT(4)</div><div class='add'>+#define AQ_NIC_RATE_10M		BIT(5)</div><div class='add'>+#define AQ_NIC_RATE_1G_HALF	BIT(6)</div><div class='add'>+#define AQ_NIC_RATE_100M_HALF	BIT(7)</div><div class='add'>+#define AQ_NIC_RATE_10M_HALF	BIT(8)</div><div class='add'>+</div><div class='add'>+#define AQ_NIC_RATE_EEE_10G	BIT(9)</div><div class='add'>+#define AQ_NIC_RATE_EEE_5G	BIT(10)</div><div class='add'>+#define AQ_NIC_RATE_EEE_2G5	BIT(11)</div><div class='add'>+#define AQ_NIC_RATE_EEE_1G	BIT(12)</div><div class='add'>+#define AQ_NIC_RATE_EEE_100M	BIT(13)</div><div class='add'>+#define AQ_NIC_RATE_EEE_MSK     (AQ_NIC_RATE_EEE_10G |\</div><div class='add'>+				 AQ_NIC_RATE_EEE_5G |\</div><div class='add'>+				 AQ_NIC_RATE_EEE_2G5 |\</div><div class='add'>+				 AQ_NIC_RATE_EEE_1G |\</div><div class='add'>+				 AQ_NIC_RATE_EEE_100M)</div><div class='add'>+</div><div class='add'>+#endif /* AQ_COMMON_H */</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_drvinfo.c b/drivers/net/ethernet/aquantia/atlantic/aq_drvinfo.c<br/>new file mode 100644<br/>index 000000000000..787ea91802e7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_drvinfo.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_drvinfo.c</a></div><div class='hunk'>@@ -0,0 +1,148 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2014-2019 aQuantia Corporation</div><div class='add'>+ * Copyright (C) 2019-2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* File aq_drvinfo.c: Definition of common code for firmware info in sys.*/</div><div class='add'>+</div><div class='add'>+#include &lt;linux/init.h&gt;</div><div class='add'>+#include &lt;linux/kobject.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/stat.h&gt;</div><div class='add'>+#include &lt;linux/string.h&gt;</div><div class='add'>+#include &lt;linux/hwmon.h&gt;</div><div class='add'>+#include &lt;linux/uaccess.h&gt;</div><div class='add'>+</div><div class='add'>+#include "aq_drvinfo.h"</div><div class='add'>+#include "aq_nic.h"</div><div class='add'>+</div><div class='add'>+#if IS_REACHABLE(CONFIG_HWMON)</div><div class='add'>+static const char * const atl_temp_label[] = {</div><div class='add'>+	"PHY Temperature",</div><div class='add'>+	"MAC Temperature",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int aq_hwmon_read(struct device *dev, enum hwmon_sensor_types type,</div><div class='add'>+			 u32 attr, int channel, long *value)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = dev_get_drvdata(dev);</div><div class='add'>+	int err = 0;</div><div class='add'>+	int temp;</div><div class='add'>+</div><div class='add'>+	if (!aq_nic)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	if (type != hwmon_temp || attr != hwmon_temp_input)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	switch (channel) {</div><div class='add'>+	case 0:</div><div class='add'>+		if (!aq_nic-&gt;aq_fw_ops-&gt;get_phy_temp)</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+		err = aq_nic-&gt;aq_fw_ops-&gt;get_phy_temp(aq_nic-&gt;aq_hw, &amp;temp);</div><div class='add'>+		*value = temp;</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		if (!aq_nic-&gt;aq_fw_ops-&gt;get_mac_temp &amp;&amp;</div><div class='add'>+		    !aq_nic-&gt;aq_hw_ops-&gt;hw_get_mac_temp)</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+		if (aq_nic-&gt;aq_fw_ops-&gt;get_mac_temp)</div><div class='add'>+			err = aq_nic-&gt;aq_fw_ops-&gt;get_mac_temp(aq_nic-&gt;aq_hw, &amp;temp);</div><div class='add'>+		else</div><div class='add'>+			err = aq_nic-&gt;aq_hw_ops-&gt;hw_get_mac_temp(aq_nic-&gt;aq_hw, &amp;temp);</div><div class='add'>+		*value = temp;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_hwmon_read_string(struct device *dev,</div><div class='add'>+				enum hwmon_sensor_types type,</div><div class='add'>+				u32 attr, int channel, const char **str)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = dev_get_drvdata(dev);</div><div class='add'>+</div><div class='add'>+	if (!aq_nic)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	if (type != hwmon_temp || attr != hwmon_temp_label)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (channel &lt; ARRAY_SIZE(atl_temp_label))</div><div class='add'>+		*str = atl_temp_label[channel];</div><div class='add'>+	else</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static umode_t aq_hwmon_is_visible(const void *data,</div><div class='add'>+				   enum hwmon_sensor_types type,</div><div class='add'>+				   u32 attr, int channel)</div><div class='add'>+{</div><div class='add'>+	const struct aq_nic_s *nic = data;</div><div class='add'>+</div><div class='add'>+	if (type != hwmon_temp)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (channel == 0 &amp;&amp; !nic-&gt;aq_fw_ops-&gt;get_phy_temp)</div><div class='add'>+		return 0;</div><div class='add'>+	else if (channel == 1 &amp;&amp; !nic-&gt;aq_fw_ops-&gt;get_mac_temp &amp;&amp;</div><div class='add'>+		 !nic-&gt;aq_hw_ops-&gt;hw_get_mac_temp)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	switch (attr) {</div><div class='add'>+	case hwmon_temp_input:</div><div class='add'>+	case hwmon_temp_label:</div><div class='add'>+		return 0444;</div><div class='add'>+	default:</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct hwmon_ops aq_hwmon_ops = {</div><div class='add'>+	.is_visible = aq_hwmon_is_visible,</div><div class='add'>+	.read = aq_hwmon_read,</div><div class='add'>+	.read_string = aq_hwmon_read_string,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct hwmon_channel_info * const aq_hwmon_info[] = {</div><div class='add'>+	HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT | HWMON_T_LABEL,</div><div class='add'>+			   HWMON_T_INPUT | HWMON_T_LABEL),</div><div class='add'>+	NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct hwmon_chip_info aq_hwmon_chip_info = {</div><div class='add'>+	.ops = &amp;aq_hwmon_ops,</div><div class='add'>+	.info = aq_hwmon_info,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int aq_drvinfo_init(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+	struct device *dev = &amp;aq_nic-&gt;pdev-&gt;dev;</div><div class='add'>+	struct device *hwmon_dev;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	hwmon_dev = devm_hwmon_device_register_with_info(dev,</div><div class='add'>+							 ndev-&gt;name,</div><div class='add'>+							 aq_nic,</div><div class='add'>+							 &amp;aq_hwmon_chip_info,</div><div class='add'>+							 NULL);</div><div class='add'>+</div><div class='add'>+	if (IS_ERR(hwmon_dev))</div><div class='add'>+		err = PTR_ERR(hwmon_dev);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+int aq_drvinfo_init(struct net_device *ndev) { return 0; }</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_drvinfo.h b/drivers/net/ethernet/aquantia/atlantic/aq_drvinfo.h<br/>new file mode 100644<br/>index 000000000000..59113a20622a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_drvinfo.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_drvinfo.h</a></div><div class='hunk'>@@ -0,0 +1,17 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2014-2019 aQuantia Corporation</div><div class='add'>+ * Copyright (C) 2019-2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* File aq_drvinfo.h: Declaration of common code for firmware info in sys.*/</div><div class='add'>+</div><div class='add'>+#ifndef AQ_DRVINFO_H</div><div class='add'>+#define AQ_DRVINFO_H</div><div class='add'>+</div><div class='add'>+struct net_device;</div><div class='add'>+</div><div class='add'>+int aq_drvinfo_init(struct net_device *ndev);</div><div class='add'>+</div><div class='add'>+#endif /* AQ_DRVINFO_H */</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_ethtool.c b/drivers/net/ethernet/aquantia/atlantic/aq_ethtool.c<br/>new file mode 100644<br/>index 000000000000..6fef47ba0a59<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_ethtool.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_ethtool.c</a></div><div class='hunk'>@@ -0,0 +1,1090 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2014-2019 aQuantia Corporation</div><div class='add'>+ * Copyright (C) 2019-2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* File aq_ethtool.c: Definition of ethertool related functions. */</div><div class='add'>+</div><div class='add'>+#include "aq_ethtool.h"</div><div class='add'>+#include "aq_nic.h"</div><div class='add'>+#include "aq_vec.h"</div><div class='add'>+#include "aq_ptp.h"</div><div class='add'>+#include "aq_filters.h"</div><div class='add'>+#include "aq_macsec.h"</div><div class='add'>+#include "aq_main.h"</div><div class='add'>+</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;linux/linkmode.h&gt;</div><div class='add'>+#include &lt;linux/ptp_clock_kernel.h&gt;</div><div class='add'>+</div><div class='add'>+static void aq_ethtool_get_regs(struct net_device *ndev,</div><div class='add'>+				struct ethtool_regs *regs, void *p)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+	u32 regs_count;</div><div class='add'>+</div><div class='add'>+	regs_count = aq_nic_get_regs_count(aq_nic);</div><div class='add'>+</div><div class='add'>+	memset(p, 0, regs_count * sizeof(u32));</div><div class='add'>+	aq_nic_get_regs(aq_nic, regs, p);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_ethtool_get_regs_len(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+	u32 regs_count;</div><div class='add'>+</div><div class='add'>+	regs_count = aq_nic_get_regs_count(aq_nic);</div><div class='add'>+</div><div class='add'>+	return regs_count * sizeof(u32);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 aq_ethtool_get_link(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	return ethtool_op_get_link(ndev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_ethtool_get_link_ksettings(struct net_device *ndev,</div><div class='add'>+					 struct ethtool_link_ksettings *cmd)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	aq_nic_get_link_ksettings(aq_nic, cmd);</div><div class='add'>+	cmd-&gt;base.speed = netif_carrier_ok(ndev) ?</div><div class='add'>+				aq_nic_get_link_speed(aq_nic) : 0U;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int</div><div class='add'>+aq_ethtool_set_link_ksettings(struct net_device *ndev,</div><div class='add'>+			      const struct ethtool_link_ksettings *cmd)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	return aq_nic_set_link_ksettings(aq_nic, cmd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const char aq_ethtool_stat_names[][ETH_GSTRING_LEN] = {</div><div class='add'>+	"InPackets",</div><div class='add'>+	"InUCast",</div><div class='add'>+	"InMCast",</div><div class='add'>+	"InBCast",</div><div class='add'>+	"InErrors",</div><div class='add'>+	"OutPackets",</div><div class='add'>+	"OutUCast",</div><div class='add'>+	"OutMCast",</div><div class='add'>+	"OutBCast",</div><div class='add'>+	"InUCastOctets",</div><div class='add'>+	"OutUCastOctets",</div><div class='add'>+	"InMCastOctets",</div><div class='add'>+	"OutMCastOctets",</div><div class='add'>+	"InBCastOctets",</div><div class='add'>+	"OutBCastOctets",</div><div class='add'>+	"InOctets",</div><div class='add'>+	"OutOctets",</div><div class='add'>+	"InPacketsDma",</div><div class='add'>+	"OutPacketsDma",</div><div class='add'>+	"InOctetsDma",</div><div class='add'>+	"OutOctetsDma",</div><div class='add'>+	"InDroppedDma",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char * const aq_ethtool_queue_rx_stat_names[] = {</div><div class='add'>+	"%sQueue[%d] InPackets",</div><div class='add'>+	"%sQueue[%d] InJumboPackets",</div><div class='add'>+	"%sQueue[%d] InLroPackets",</div><div class='add'>+	"%sQueue[%d] InErrors",</div><div class='add'>+	"%sQueue[%d] AllocFails",</div><div class='add'>+	"%sQueue[%d] SkbAllocFails",</div><div class='add'>+	"%sQueue[%d] Polls",</div><div class='add'>+	"%sQueue[%d] PageFlips",</div><div class='add'>+	"%sQueue[%d] PageReuses",</div><div class='add'>+	"%sQueue[%d] PageFrees",</div><div class='add'>+	"%sQueue[%d] XdpAbort",</div><div class='add'>+	"%sQueue[%d] XdpDrop",</div><div class='add'>+	"%sQueue[%d] XdpPass",</div><div class='add'>+	"%sQueue[%d] XdpTx",</div><div class='add'>+	"%sQueue[%d] XdpInvalid",</div><div class='add'>+	"%sQueue[%d] XdpRedirect",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char * const aq_ethtool_queue_tx_stat_names[] = {</div><div class='add'>+	"%sQueue[%d] OutPackets",</div><div class='add'>+	"%sQueue[%d] Restarts",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_MACSEC)</div><div class='add'>+static const char aq_macsec_stat_names[][ETH_GSTRING_LEN] = {</div><div class='add'>+	"MACSec InCtlPackets",</div><div class='add'>+	"MACSec InTaggedMissPackets",</div><div class='add'>+	"MACSec InUntaggedMissPackets",</div><div class='add'>+	"MACSec InNotagPackets",</div><div class='add'>+	"MACSec InUntaggedPackets",</div><div class='add'>+	"MACSec InBadTagPackets",</div><div class='add'>+	"MACSec InNoSciPackets",</div><div class='add'>+	"MACSec InUnknownSciPackets",</div><div class='add'>+	"MACSec InCtrlPortPassPackets",</div><div class='add'>+	"MACSec InUnctrlPortPassPackets",</div><div class='add'>+	"MACSec InCtrlPortFailPackets",</div><div class='add'>+	"MACSec InUnctrlPortFailPackets",</div><div class='add'>+	"MACSec InTooLongPackets",</div><div class='add'>+	"MACSec InIgpocCtlPackets",</div><div class='add'>+	"MACSec InEccErrorPackets",</div><div class='add'>+	"MACSec InUnctrlHitDropRedir",</div><div class='add'>+	"MACSec OutCtlPackets",</div><div class='add'>+	"MACSec OutUnknownSaPackets",</div><div class='add'>+	"MACSec OutUntaggedPackets",</div><div class='add'>+	"MACSec OutTooLong",</div><div class='add'>+	"MACSec OutEccErrorPackets",</div><div class='add'>+	"MACSec OutUnctrlHitDropRedir",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char * const aq_macsec_txsc_stat_names[] = {</div><div class='add'>+	"MACSecTXSC%d ProtectedPkts",</div><div class='add'>+	"MACSecTXSC%d EncryptedPkts",</div><div class='add'>+	"MACSecTXSC%d ProtectedOctets",</div><div class='add'>+	"MACSecTXSC%d EncryptedOctets",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char * const aq_macsec_txsa_stat_names[] = {</div><div class='add'>+	"MACSecTXSC%dSA%d HitDropRedirect",</div><div class='add'>+	"MACSecTXSC%dSA%d Protected2Pkts",</div><div class='add'>+	"MACSecTXSC%dSA%d ProtectedPkts",</div><div class='add'>+	"MACSecTXSC%dSA%d EncryptedPkts",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const char * const aq_macsec_rxsa_stat_names[] = {</div><div class='add'>+	"MACSecRXSC%dSA%d UntaggedHitPkts",</div><div class='add'>+	"MACSecRXSC%dSA%d CtrlHitDrpRedir",</div><div class='add'>+	"MACSecRXSC%dSA%d NotUsingSa",</div><div class='add'>+	"MACSecRXSC%dSA%d UnusedSa",</div><div class='add'>+	"MACSecRXSC%dSA%d NotValidPkts",</div><div class='add'>+	"MACSecRXSC%dSA%d InvalidPkts",</div><div class='add'>+	"MACSecRXSC%dSA%d OkPkts",</div><div class='add'>+	"MACSecRXSC%dSA%d LatePkts",</div><div class='add'>+	"MACSecRXSC%dSA%d DelayedPkts",</div><div class='add'>+	"MACSecRXSC%dSA%d UncheckedPkts",</div><div class='add'>+	"MACSecRXSC%dSA%d ValidatedOctets",</div><div class='add'>+	"MACSecRXSC%dSA%d DecryptedOctets",</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static const char aq_ethtool_priv_flag_names[][ETH_GSTRING_LEN] = {</div><div class='add'>+	"DMASystemLoopback",</div><div class='add'>+	"PKTSystemLoopback",</div><div class='add'>+	"DMANetworkLoopback",</div><div class='add'>+	"PHYInternalLoopback",</div><div class='add'>+	"PHYExternalLoopback",</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static u32 aq_ethtool_n_stats(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	const int rx_stat_cnt = ARRAY_SIZE(aq_ethtool_queue_rx_stat_names);</div><div class='add'>+	const int tx_stat_cnt = ARRAY_SIZE(aq_ethtool_queue_tx_stat_names);</div><div class='add'>+	struct aq_nic_s *nic = netdev_priv(ndev);</div><div class='add'>+	struct aq_nic_cfg_s *cfg = aq_nic_get_cfg(nic);</div><div class='add'>+	u32 n_stats = ARRAY_SIZE(aq_ethtool_stat_names) +</div><div class='add'>+		      (rx_stat_cnt + tx_stat_cnt) * cfg-&gt;vecs * cfg-&gt;tcs;</div><div class='add'>+</div><div class='add'>+#if IS_REACHABLE(CONFIG_PTP_1588_CLOCK)</div><div class='add'>+	n_stats += rx_stat_cnt * aq_ptp_get_ring_cnt(nic, ATL_RING_RX) +</div><div class='add'>+		   tx_stat_cnt * aq_ptp_get_ring_cnt(nic, ATL_RING_TX);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_MACSEC)</div><div class='add'>+	if (nic-&gt;macsec_cfg) {</div><div class='add'>+		n_stats += ARRAY_SIZE(aq_macsec_stat_names) +</div><div class='add'>+			   ARRAY_SIZE(aq_macsec_txsc_stat_names) *</div><div class='add'>+				   aq_macsec_tx_sc_cnt(nic) +</div><div class='add'>+			   ARRAY_SIZE(aq_macsec_txsa_stat_names) *</div><div class='add'>+				   aq_macsec_tx_sa_cnt(nic) +</div><div class='add'>+			   ARRAY_SIZE(aq_macsec_rxsa_stat_names) *</div><div class='add'>+				   aq_macsec_rx_sa_cnt(nic);</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	return n_stats;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aq_ethtool_stats(struct net_device *ndev,</div><div class='add'>+			     struct ethtool_stats *stats, u64 *data)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	memset(data, 0, aq_ethtool_n_stats(ndev) * sizeof(u64));</div><div class='add'>+	data = aq_nic_get_stats(aq_nic, data);</div><div class='add'>+#if IS_REACHABLE(CONFIG_PTP_1588_CLOCK)</div><div class='add'>+	data = aq_ptp_get_stats(aq_nic, data);</div><div class='add'>+#endif</div><div class='add'>+#if IS_ENABLED(CONFIG_MACSEC)</div><div class='add'>+	data = aq_macsec_get_stats(aq_nic, data);</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aq_ethtool_get_drvinfo(struct net_device *ndev,</div><div class='add'>+				   struct ethtool_drvinfo *drvinfo)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = to_pci_dev(ndev-&gt;dev.parent);</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+	u32 firmware_version;</div><div class='add'>+	u32 regs_count;</div><div class='add'>+</div><div class='add'>+	firmware_version = aq_nic_get_fw_version(aq_nic);</div><div class='add'>+	regs_count = aq_nic_get_regs_count(aq_nic);</div><div class='add'>+</div><div class='add'>+	strlcat(drvinfo-&gt;driver, AQ_CFG_DRV_NAME, sizeof(drvinfo-&gt;driver));</div><div class='add'>+</div><div class='add'>+	snprintf(drvinfo-&gt;fw_version, sizeof(drvinfo-&gt;fw_version),</div><div class='add'>+		 "%u.%u.%u", firmware_version &gt;&gt; 24,</div><div class='add'>+		 (firmware_version &gt;&gt; 16) &amp; 0xFFU, firmware_version &amp; 0xFFFFU);</div><div class='add'>+</div><div class='add'>+	strscpy(drvinfo-&gt;bus_info, pdev ? pci_name(pdev) : "",</div><div class='add'>+		sizeof(drvinfo-&gt;bus_info));</div><div class='add'>+	drvinfo-&gt;n_stats = aq_ethtool_n_stats(ndev);</div><div class='add'>+	drvinfo-&gt;testinfo_len = 0;</div><div class='add'>+	drvinfo-&gt;regdump_len = regs_count;</div><div class='add'>+	drvinfo-&gt;eedump_len = 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aq_ethtool_get_strings(struct net_device *ndev,</div><div class='add'>+				   u32 stringset, u8 *data)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *nic = netdev_priv(ndev);</div><div class='add'>+	struct aq_nic_cfg_s *cfg;</div><div class='add'>+	u8 *p = data;</div><div class='add'>+	int i, si;</div><div class='add'>+#if IS_ENABLED(CONFIG_MACSEC)</div><div class='add'>+	int sa;</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	cfg = aq_nic_get_cfg(nic);</div><div class='add'>+</div><div class='add'>+	switch (stringset) {</div><div class='add'>+	case ETH_SS_STATS: {</div><div class='add'>+		const int rx_stat_cnt = ARRAY_SIZE(aq_ethtool_queue_rx_stat_names);</div><div class='add'>+		const int tx_stat_cnt = ARRAY_SIZE(aq_ethtool_queue_tx_stat_names);</div><div class='add'>+		char tc_string[8];</div><div class='add'>+		unsigned int tc;</div><div class='add'>+</div><div class='add'>+		memset(tc_string, 0, sizeof(tc_string));</div><div class='add'>+		memcpy(p, aq_ethtool_stat_names,</div><div class='add'>+		       sizeof(aq_ethtool_stat_names));</div><div class='add'>+		p = p + sizeof(aq_ethtool_stat_names);</div><div class='add'>+</div><div class='add'>+		for (tc = 0; tc &lt; cfg-&gt;tcs; tc++) {</div><div class='add'>+			if (cfg-&gt;is_qos)</div><div class='add'>+				snprintf(tc_string, 8, "TC%u ", tc);</div><div class='add'>+</div><div class='add'>+			for (i = 0; i &lt; cfg-&gt;vecs; i++) {</div><div class='add'>+				for (si = 0; si &lt; rx_stat_cnt; si++) {</div><div class='add'>+					ethtool_sprintf(&amp;p,</div><div class='add'>+					     aq_ethtool_queue_rx_stat_names[si],</div><div class='add'>+					     tc_string,</div><div class='add'>+					     AQ_NIC_CFG_TCVEC2RING(cfg, tc, i));</div><div class='add'>+				}</div><div class='add'>+				for (si = 0; si &lt; tx_stat_cnt; si++) {</div><div class='add'>+					ethtool_sprintf(&amp;p,</div><div class='add'>+					     aq_ethtool_queue_tx_stat_names[si],</div><div class='add'>+					     tc_string,</div><div class='add'>+					     AQ_NIC_CFG_TCVEC2RING(cfg, tc, i));</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+#if IS_REACHABLE(CONFIG_PTP_1588_CLOCK)</div><div class='add'>+		if (nic-&gt;aq_ptp) {</div><div class='add'>+			const int rx_ring_cnt = aq_ptp_get_ring_cnt(nic, ATL_RING_RX);</div><div class='add'>+			const int tx_ring_cnt = aq_ptp_get_ring_cnt(nic, ATL_RING_TX);</div><div class='add'>+			unsigned int ptp_ring_idx =</div><div class='add'>+				aq_ptp_ring_idx(nic-&gt;aq_nic_cfg.tc_mode);</div><div class='add'>+</div><div class='add'>+			snprintf(tc_string, 8, "PTP ");</div><div class='add'>+</div><div class='add'>+			for (i = 0; i &lt; max(rx_ring_cnt, tx_ring_cnt); i++) {</div><div class='add'>+				for (si = 0; si &lt; rx_stat_cnt; si++) {</div><div class='add'>+					ethtool_sprintf(&amp;p,</div><div class='add'>+						 aq_ethtool_queue_rx_stat_names[si],</div><div class='add'>+						 tc_string,</div><div class='add'>+						 i ? PTP_HWST_RING_IDX : ptp_ring_idx);</div><div class='add'>+				}</div><div class='add'>+				if (i &gt;= tx_ring_cnt)</div><div class='add'>+					continue;</div><div class='add'>+				for (si = 0; si &lt; tx_stat_cnt; si++) {</div><div class='add'>+					ethtool_sprintf(&amp;p,</div><div class='add'>+						 aq_ethtool_queue_tx_stat_names[si],</div><div class='add'>+						 tc_string,</div><div class='add'>+						 i ? PTP_HWST_RING_IDX : ptp_ring_idx);</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+#endif</div><div class='add'>+#if IS_ENABLED(CONFIG_MACSEC)</div><div class='add'>+		if (!nic-&gt;macsec_cfg)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		memcpy(p, aq_macsec_stat_names, sizeof(aq_macsec_stat_names));</div><div class='add'>+		p = p + sizeof(aq_macsec_stat_names);</div><div class='add'>+		for (i = 0; i &lt; AQ_MACSEC_MAX_SC; i++) {</div><div class='add'>+			struct aq_macsec_txsc *aq_txsc;</div><div class='add'>+</div><div class='add'>+			if (!(test_bit(i, &amp;nic-&gt;macsec_cfg-&gt;txsc_idx_busy)))</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			for (si = 0;</div><div class='add'>+				si &lt; ARRAY_SIZE(aq_macsec_txsc_stat_names);</div><div class='add'>+				si++) {</div><div class='add'>+				ethtool_sprintf(&amp;p,</div><div class='add'>+					 aq_macsec_txsc_stat_names[si], i);</div><div class='add'>+			}</div><div class='add'>+			aq_txsc = &amp;nic-&gt;macsec_cfg-&gt;aq_txsc[i];</div><div class='add'>+			for (sa = 0; sa &lt; MACSEC_NUM_AN; sa++) {</div><div class='add'>+				if (!(test_bit(sa, &amp;aq_txsc-&gt;tx_sa_idx_busy)))</div><div class='add'>+					continue;</div><div class='add'>+				for (si = 0;</div><div class='add'>+				     si &lt; ARRAY_SIZE(aq_macsec_txsa_stat_names);</div><div class='add'>+				     si++) {</div><div class='add'>+					ethtool_sprintf(&amp;p,</div><div class='add'>+						 aq_macsec_txsa_stat_names[si],</div><div class='add'>+						 i, sa);</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		for (i = 0; i &lt; AQ_MACSEC_MAX_SC; i++) {</div><div class='add'>+			struct aq_macsec_rxsc *aq_rxsc;</div><div class='add'>+</div><div class='add'>+			if (!(test_bit(i, &amp;nic-&gt;macsec_cfg-&gt;rxsc_idx_busy)))</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			aq_rxsc = &amp;nic-&gt;macsec_cfg-&gt;aq_rxsc[i];</div><div class='add'>+			for (sa = 0; sa &lt; MACSEC_NUM_AN; sa++) {</div><div class='add'>+				if (!(test_bit(sa, &amp;aq_rxsc-&gt;rx_sa_idx_busy)))</div><div class='add'>+					continue;</div><div class='add'>+				for (si = 0;</div><div class='add'>+				     si &lt; ARRAY_SIZE(aq_macsec_rxsa_stat_names);</div><div class='add'>+				     si++) {</div><div class='add'>+					ethtool_sprintf(&amp;p,</div><div class='add'>+						 aq_macsec_rxsa_stat_names[si],</div><div class='add'>+						 i, sa);</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+#endif</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	case ETH_SS_PRIV_FLAGS:</div><div class='add'>+		memcpy(p, aq_ethtool_priv_flag_names,</div><div class='add'>+		       sizeof(aq_ethtool_priv_flag_names));</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_ethtool_set_phys_id(struct net_device *ndev,</div><div class='add'>+				  enum ethtool_phys_id_state state)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+	struct aq_hw_s *hw = aq_nic-&gt;aq_hw;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (!aq_nic-&gt;aq_fw_ops-&gt;led_control)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;aq_nic-&gt;fwreq_mutex);</div><div class='add'>+</div><div class='add'>+	switch (state) {</div><div class='add'>+	case ETHTOOL_ID_ACTIVE:</div><div class='add'>+		ret = aq_nic-&gt;aq_fw_ops-&gt;led_control(hw, AQ_HW_LED_BLINK |</div><div class='add'>+				 AQ_HW_LED_BLINK &lt;&lt; 2 | AQ_HW_LED_BLINK &lt;&lt; 4);</div><div class='add'>+		break;</div><div class='add'>+	case ETHTOOL_ID_INACTIVE:</div><div class='add'>+		ret = aq_nic-&gt;aq_fw_ops-&gt;led_control(hw, AQ_HW_LED_DEFAULT);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;aq_nic-&gt;fwreq_mutex);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_ethtool_get_sset_count(struct net_device *ndev, int stringset)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	switch (stringset) {</div><div class='add'>+	case ETH_SS_STATS:</div><div class='add'>+		ret = aq_ethtool_n_stats(ndev);</div><div class='add'>+		break;</div><div class='add'>+	case ETH_SS_PRIV_FLAGS:</div><div class='add'>+		ret = ARRAY_SIZE(aq_ethtool_priv_flag_names);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		ret = -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 aq_ethtool_get_rss_indir_size(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	return AQ_CFG_RSS_INDIRECTION_TABLE_MAX;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 aq_ethtool_get_rss_key_size(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+	struct aq_nic_cfg_s *cfg;</div><div class='add'>+</div><div class='add'>+	cfg = aq_nic_get_cfg(aq_nic);</div><div class='add'>+</div><div class='add'>+	return sizeof(cfg-&gt;aq_rss.hash_secret_key);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_ethtool_get_rss(struct net_device *ndev,</div><div class='add'>+			      struct ethtool_rxfh_param *rxfh)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+	struct aq_nic_cfg_s *cfg;</div><div class='add'>+	unsigned int i = 0U;</div><div class='add'>+</div><div class='add'>+	cfg = aq_nic_get_cfg(aq_nic);</div><div class='add'>+</div><div class='add'>+	rxfh-&gt;hfunc = ETH_RSS_HASH_TOP; /* Toeplitz */</div><div class='add'>+	if (rxfh-&gt;indir) {</div><div class='add'>+		for (i = 0; i &lt; AQ_CFG_RSS_INDIRECTION_TABLE_MAX; i++)</div><div class='add'>+			rxfh-&gt;indir[i] = cfg-&gt;aq_rss.indirection_table[i];</div><div class='add'>+	}</div><div class='add'>+	if (rxfh-&gt;key)</div><div class='add'>+		memcpy(rxfh-&gt;key, cfg-&gt;aq_rss.hash_secret_key,</div><div class='add'>+		       sizeof(cfg-&gt;aq_rss.hash_secret_key));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_ethtool_set_rss(struct net_device *netdev,</div><div class='add'>+			      struct ethtool_rxfh_param *rxfh,</div><div class='add'>+			      struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(netdev);</div><div class='add'>+	struct aq_nic_cfg_s *cfg;</div><div class='add'>+	unsigned int i = 0U;</div><div class='add'>+	u32 rss_entries;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	cfg = aq_nic_get_cfg(aq_nic);</div><div class='add'>+	rss_entries = cfg-&gt;aq_rss.indirection_table_size;</div><div class='add'>+</div><div class='add'>+	/* We do not allow change in unsupported parameters */</div><div class='add'>+	if (rxfh-&gt;hfunc != ETH_RSS_HASH_NO_CHANGE &amp;&amp;</div><div class='add'>+	    rxfh-&gt;hfunc != ETH_RSS_HASH_TOP)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	/* Fill out the redirection table */</div><div class='add'>+	if (rxfh-&gt;indir)</div><div class='add'>+		for (i = 0; i &lt; rss_entries; i++)</div><div class='add'>+			cfg-&gt;aq_rss.indirection_table[i] = rxfh-&gt;indir[i];</div><div class='add'>+</div><div class='add'>+	/* Fill out the rss hash key */</div><div class='add'>+	if (rxfh-&gt;key) {</div><div class='add'>+		memcpy(cfg-&gt;aq_rss.hash_secret_key, rxfh-&gt;key,</div><div class='add'>+		       sizeof(cfg-&gt;aq_rss.hash_secret_key));</div><div class='add'>+		err = aq_nic-&gt;aq_hw_ops-&gt;hw_rss_hash_set(aq_nic-&gt;aq_hw,</div><div class='add'>+			&amp;cfg-&gt;aq_rss);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = aq_nic-&gt;aq_hw_ops-&gt;hw_rss_set(aq_nic-&gt;aq_hw, &amp;cfg-&gt;aq_rss);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_ethtool_get_rxnfc(struct net_device *ndev,</div><div class='add'>+				struct ethtool_rxnfc *cmd,</div><div class='add'>+				u32 *rule_locs)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+	struct aq_nic_cfg_s *cfg;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	cfg = aq_nic_get_cfg(aq_nic);</div><div class='add'>+</div><div class='add'>+	switch (cmd-&gt;cmd) {</div><div class='add'>+	case ETHTOOL_GRXRINGS:</div><div class='add'>+		cmd-&gt;data = cfg-&gt;vecs;</div><div class='add'>+		break;</div><div class='add'>+	case ETHTOOL_GRXCLSRLCNT:</div><div class='add'>+		cmd-&gt;rule_cnt = aq_get_rxnfc_count_all_rules(aq_nic);</div><div class='add'>+		break;</div><div class='add'>+	case ETHTOOL_GRXCLSRULE:</div><div class='add'>+		err = aq_get_rxnfc_rule(aq_nic, cmd);</div><div class='add'>+		break;</div><div class='add'>+	case ETHTOOL_GRXCLSRLALL:</div><div class='add'>+		err = aq_get_rxnfc_all_rules(aq_nic, cmd, rule_locs);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		err = -EOPNOTSUPP;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_ethtool_set_rxnfc(struct net_device *ndev,</div><div class='add'>+				struct ethtool_rxnfc *cmd)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	switch (cmd-&gt;cmd) {</div><div class='add'>+	case ETHTOOL_SRXCLSRLINS:</div><div class='add'>+		err = aq_add_rxnfc_rule(aq_nic, cmd);</div><div class='add'>+		break;</div><div class='add'>+	case ETHTOOL_SRXCLSRLDEL:</div><div class='add'>+		err = aq_del_rxnfc_rule(aq_nic, cmd);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		err = -EOPNOTSUPP;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_ethtool_get_coalesce(struct net_device *ndev,</div><div class='add'>+				   struct ethtool_coalesce *coal,</div><div class='add'>+				   struct kernel_ethtool_coalesce *kernel_coal,</div><div class='add'>+				   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+	struct aq_nic_cfg_s *cfg;</div><div class='add'>+</div><div class='add'>+	cfg = aq_nic_get_cfg(aq_nic);</div><div class='add'>+</div><div class='add'>+	if (cfg-&gt;itr == AQ_CFG_INTERRUPT_MODERATION_ON ||</div><div class='add'>+	    cfg-&gt;itr == AQ_CFG_INTERRUPT_MODERATION_AUTO) {</div><div class='add'>+		coal-&gt;rx_coalesce_usecs = cfg-&gt;rx_itr;</div><div class='add'>+		coal-&gt;tx_coalesce_usecs = cfg-&gt;tx_itr;</div><div class='add'>+		coal-&gt;rx_max_coalesced_frames = 0;</div><div class='add'>+		coal-&gt;tx_max_coalesced_frames = 0;</div><div class='add'>+	} else {</div><div class='add'>+		coal-&gt;rx_coalesce_usecs = 0;</div><div class='add'>+		coal-&gt;tx_coalesce_usecs = 0;</div><div class='add'>+		coal-&gt;rx_max_coalesced_frames = 1;</div><div class='add'>+		coal-&gt;tx_max_coalesced_frames = 1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_ethtool_set_coalesce(struct net_device *ndev,</div><div class='add'>+				   struct ethtool_coalesce *coal,</div><div class='add'>+				   struct kernel_ethtool_coalesce *kernel_coal,</div><div class='add'>+				   struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+	struct aq_nic_cfg_s *cfg;</div><div class='add'>+</div><div class='add'>+	cfg = aq_nic_get_cfg(aq_nic);</div><div class='add'>+</div><div class='add'>+	/* Atlantic only supports timing based coalescing</div><div class='add'>+	 */</div><div class='add'>+	if (coal-&gt;rx_max_coalesced_frames &gt; 1 ||</div><div class='add'>+	    coal-&gt;tx_max_coalesced_frames &gt; 1)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	/* We do not support frame counting. Check this</div><div class='add'>+	 */</div><div class='add'>+	if (!(coal-&gt;rx_max_coalesced_frames == !coal-&gt;rx_coalesce_usecs))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	if (!(coal-&gt;tx_max_coalesced_frames == !coal-&gt;tx_coalesce_usecs))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (coal-&gt;rx_coalesce_usecs &gt; AQ_CFG_INTERRUPT_MODERATION_USEC_MAX ||</div><div class='add'>+	    coal-&gt;tx_coalesce_usecs &gt; AQ_CFG_INTERRUPT_MODERATION_USEC_MAX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	cfg-&gt;itr = AQ_CFG_INTERRUPT_MODERATION_ON;</div><div class='add'>+</div><div class='add'>+	cfg-&gt;rx_itr = coal-&gt;rx_coalesce_usecs;</div><div class='add'>+	cfg-&gt;tx_itr = coal-&gt;tx_coalesce_usecs;</div><div class='add'>+</div><div class='add'>+	return aq_nic_update_interrupt_moderation_settings(aq_nic);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aq_ethtool_get_wol(struct net_device *ndev,</div><div class='add'>+			       struct ethtool_wolinfo *wol)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+	struct aq_nic_cfg_s *cfg;</div><div class='add'>+</div><div class='add'>+	cfg = aq_nic_get_cfg(aq_nic);</div><div class='add'>+</div><div class='add'>+	wol-&gt;supported = AQ_NIC_WOL_MODES;</div><div class='add'>+	wol-&gt;wolopts = cfg-&gt;wol;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_ethtool_set_wol(struct net_device *ndev,</div><div class='add'>+			      struct ethtool_wolinfo *wol)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = to_pci_dev(ndev-&gt;dev.parent);</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+	struct aq_nic_cfg_s *cfg;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	cfg = aq_nic_get_cfg(aq_nic);</div><div class='add'>+</div><div class='add'>+	if (wol-&gt;wolopts &amp; ~AQ_NIC_WOL_MODES)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	cfg-&gt;wol = wol-&gt;wolopts;</div><div class='add'>+</div><div class='add'>+	err = device_set_wakeup_enable(&amp;pdev-&gt;dev, !!cfg-&gt;wol);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_ethtool_get_ts_info(struct net_device *ndev,</div><div class='add'>+				  struct kernel_ethtool_ts_info *info)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	ethtool_op_get_ts_info(ndev, info);</div><div class='add'>+</div><div class='add'>+	if (!aq_nic-&gt;aq_ptp)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	info-&gt;so_timestamping |=</div><div class='add'>+		SOF_TIMESTAMPING_TX_HARDWARE |</div><div class='add'>+		SOF_TIMESTAMPING_RX_HARDWARE |</div><div class='add'>+		SOF_TIMESTAMPING_RAW_HARDWARE;</div><div class='add'>+</div><div class='add'>+	info-&gt;tx_types = BIT(HWTSTAMP_TX_OFF) |</div><div class='add'>+			 BIT(HWTSTAMP_TX_ON);</div><div class='add'>+</div><div class='add'>+	info-&gt;rx_filters = BIT(HWTSTAMP_FILTER_NONE);</div><div class='add'>+</div><div class='add'>+	info-&gt;rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |</div><div class='add'>+			    BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |</div><div class='add'>+			    BIT(HWTSTAMP_FILTER_PTP_V2_EVENT);</div><div class='add'>+</div><div class='add'>+#if IS_REACHABLE(CONFIG_PTP_1588_CLOCK)</div><div class='add'>+	info-&gt;phc_index = ptp_clock_index(aq_ptp_get_ptp_clock(aq_nic-&gt;aq_ptp));</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void eee_mask_to_ethtool_mask(unsigned long *mode, u32 speed)</div><div class='add'>+{</div><div class='add'>+	if (speed &amp; AQ_NIC_RATE_EEE_10G)</div><div class='add'>+		linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, mode);</div><div class='add'>+</div><div class='add'>+	if (speed &amp; AQ_NIC_RATE_EEE_1G)</div><div class='add'>+		linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, mode);</div><div class='add'>+</div><div class='add'>+	if (speed &amp; AQ_NIC_RATE_EEE_100M)</div><div class='add'>+		linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, mode);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_ethtool_get_eee(struct net_device *ndev, struct ethtool_keee *eee)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+	u32 rate, supported_rates;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (!aq_nic-&gt;aq_fw_ops-&gt;get_eee_rate)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;aq_nic-&gt;fwreq_mutex);</div><div class='add'>+	err = aq_nic-&gt;aq_fw_ops-&gt;get_eee_rate(aq_nic-&gt;aq_hw, &amp;rate,</div><div class='add'>+					      &amp;supported_rates);</div><div class='add'>+	mutex_unlock(&amp;aq_nic-&gt;fwreq_mutex);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	eee_mask_to_ethtool_mask(eee-&gt;supported, supported_rates);</div><div class='add'>+</div><div class='add'>+	if (aq_nic-&gt;aq_nic_cfg.eee_speeds)</div><div class='add'>+		linkmode_copy(eee-&gt;advertised, eee-&gt;supported);</div><div class='add'>+</div><div class='add'>+	eee_mask_to_ethtool_mask(eee-&gt;lp_advertised, rate);</div><div class='add'>+</div><div class='add'>+	eee-&gt;eee_enabled = !linkmode_empty(eee-&gt;advertised);</div><div class='add'>+</div><div class='add'>+	eee-&gt;tx_lpi_enabled = eee-&gt;eee_enabled;</div><div class='add'>+	if ((supported_rates &amp; rate) &amp; AQ_NIC_RATE_EEE_MSK)</div><div class='add'>+		eee-&gt;eee_active = true;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_ethtool_set_eee(struct net_device *ndev, struct ethtool_keee *eee)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+	u32 rate, supported_rates;</div><div class='add'>+	struct aq_nic_cfg_s *cfg;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	cfg = aq_nic_get_cfg(aq_nic);</div><div class='add'>+</div><div class='add'>+	if (unlikely(!aq_nic-&gt;aq_fw_ops-&gt;get_eee_rate ||</div><div class='add'>+		     !aq_nic-&gt;aq_fw_ops-&gt;set_eee_rate))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;aq_nic-&gt;fwreq_mutex);</div><div class='add'>+	err = aq_nic-&gt;aq_fw_ops-&gt;get_eee_rate(aq_nic-&gt;aq_hw, &amp;rate,</div><div class='add'>+					      &amp;supported_rates);</div><div class='add'>+	mutex_unlock(&amp;aq_nic-&gt;fwreq_mutex);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (eee-&gt;eee_enabled) {</div><div class='add'>+		rate = supported_rates;</div><div class='add'>+		cfg-&gt;eee_speeds = rate;</div><div class='add'>+	} else {</div><div class='add'>+		rate = 0;</div><div class='add'>+		cfg-&gt;eee_speeds = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;aq_nic-&gt;fwreq_mutex);</div><div class='add'>+	err = aq_nic-&gt;aq_fw_ops-&gt;set_eee_rate(aq_nic-&gt;aq_hw, rate);</div><div class='add'>+	mutex_unlock(&amp;aq_nic-&gt;fwreq_mutex);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_ethtool_nway_reset(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (unlikely(!aq_nic-&gt;aq_fw_ops-&gt;renegotiate))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (netif_running(ndev)) {</div><div class='add'>+		mutex_lock(&amp;aq_nic-&gt;fwreq_mutex);</div><div class='add'>+		err = aq_nic-&gt;aq_fw_ops-&gt;renegotiate(aq_nic-&gt;aq_hw);</div><div class='add'>+		mutex_unlock(&amp;aq_nic-&gt;fwreq_mutex);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aq_ethtool_get_pauseparam(struct net_device *ndev,</div><div class='add'>+				      struct ethtool_pauseparam *pause)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+	int fc = aq_nic-&gt;aq_nic_cfg.fc.req;</div><div class='add'>+</div><div class='add'>+	pause-&gt;autoneg = 0;</div><div class='add'>+</div><div class='add'>+	pause-&gt;rx_pause = !!(fc &amp; AQ_NIC_FC_RX);</div><div class='add'>+	pause-&gt;tx_pause = !!(fc &amp; AQ_NIC_FC_TX);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_ethtool_set_pauseparam(struct net_device *ndev,</div><div class='add'>+				     struct ethtool_pauseparam *pause)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (!aq_nic-&gt;aq_fw_ops-&gt;set_flow_control)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (pause-&gt;autoneg == AUTONEG_ENABLE)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (pause-&gt;rx_pause)</div><div class='add'>+		aq_nic-&gt;aq_hw-&gt;aq_nic_cfg-&gt;fc.req |= AQ_NIC_FC_RX;</div><div class='add'>+	else</div><div class='add'>+		aq_nic-&gt;aq_hw-&gt;aq_nic_cfg-&gt;fc.req &amp;= ~AQ_NIC_FC_RX;</div><div class='add'>+</div><div class='add'>+	if (pause-&gt;tx_pause)</div><div class='add'>+		aq_nic-&gt;aq_hw-&gt;aq_nic_cfg-&gt;fc.req |= AQ_NIC_FC_TX;</div><div class='add'>+	else</div><div class='add'>+		aq_nic-&gt;aq_hw-&gt;aq_nic_cfg-&gt;fc.req &amp;= ~AQ_NIC_FC_TX;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;aq_nic-&gt;fwreq_mutex);</div><div class='add'>+	err = aq_nic-&gt;aq_fw_ops-&gt;set_flow_control(aq_nic-&gt;aq_hw);</div><div class='add'>+	mutex_unlock(&amp;aq_nic-&gt;fwreq_mutex);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aq_get_ringparam(struct net_device *ndev,</div><div class='add'>+			     struct ethtool_ringparam *ring,</div><div class='add'>+			     struct kernel_ethtool_ringparam *kernel_ring,</div><div class='add'>+			     struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+	struct aq_nic_cfg_s *cfg;</div><div class='add'>+</div><div class='add'>+	cfg = aq_nic_get_cfg(aq_nic);</div><div class='add'>+</div><div class='add'>+	ring-&gt;rx_pending = cfg-&gt;rxds;</div><div class='add'>+	ring-&gt;tx_pending = cfg-&gt;txds;</div><div class='add'>+</div><div class='add'>+	ring-&gt;rx_max_pending = cfg-&gt;aq_hw_caps-&gt;rxds_max;</div><div class='add'>+	ring-&gt;tx_max_pending = cfg-&gt;aq_hw_caps-&gt;txds_max;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_set_ringparam(struct net_device *ndev,</div><div class='add'>+			    struct ethtool_ringparam *ring,</div><div class='add'>+			    struct kernel_ethtool_ringparam *kernel_ring,</div><div class='add'>+			    struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+	const struct aq_hw_caps_s *hw_caps;</div><div class='add'>+	bool ndev_running = false;</div><div class='add'>+	struct aq_nic_cfg_s *cfg;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	cfg = aq_nic_get_cfg(aq_nic);</div><div class='add'>+	hw_caps = cfg-&gt;aq_hw_caps;</div><div class='add'>+</div><div class='add'>+	if (ring-&gt;rx_mini_pending || ring-&gt;rx_jumbo_pending) {</div><div class='add'>+		err = -EOPNOTSUPP;</div><div class='add'>+		goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (netif_running(ndev)) {</div><div class='add'>+		ndev_running = true;</div><div class='add'>+		aq_ndev_close(ndev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cfg-&gt;rxds = max(ring-&gt;rx_pending, hw_caps-&gt;rxds_min);</div><div class='add'>+	cfg-&gt;rxds = min(cfg-&gt;rxds, hw_caps-&gt;rxds_max);</div><div class='add'>+	cfg-&gt;rxds = ALIGN(cfg-&gt;rxds, AQ_HW_RXD_MULTIPLE);</div><div class='add'>+</div><div class='add'>+	cfg-&gt;txds = max(ring-&gt;tx_pending, hw_caps-&gt;txds_min);</div><div class='add'>+	cfg-&gt;txds = min(cfg-&gt;txds, hw_caps-&gt;txds_max);</div><div class='add'>+	cfg-&gt;txds = ALIGN(cfg-&gt;txds, AQ_HW_TXD_MULTIPLE);</div><div class='add'>+</div><div class='add'>+	err = aq_nic_realloc_vectors(aq_nic);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	if (ndev_running)</div><div class='add'>+		err = aq_ndev_open(ndev);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 aq_get_msg_level(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	return aq_nic-&gt;msg_enable;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aq_set_msg_level(struct net_device *ndev, u32 data)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	aq_nic-&gt;msg_enable = data;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 aq_ethtool_get_priv_flags(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	return aq_nic-&gt;aq_nic_cfg.priv_flags;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_ethtool_set_priv_flags(struct net_device *ndev, u32 flags)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+	struct aq_nic_cfg_s *cfg;</div><div class='add'>+	u32 priv_flags;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	cfg = aq_nic_get_cfg(aq_nic);</div><div class='add'>+	priv_flags = cfg-&gt;priv_flags;</div><div class='add'>+</div><div class='add'>+	if (flags &amp; ~AQ_PRIV_FLAGS_MASK)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (hweight32((flags | priv_flags) &amp; AQ_HW_LOOPBACK_MASK) &gt; 1) {</div><div class='add'>+		netdev_info(ndev, "Can't enable more than one loopback simultaneously\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cfg-&gt;priv_flags = flags;</div><div class='add'>+</div><div class='add'>+	if ((priv_flags ^ flags) &amp; BIT(AQ_HW_LOOPBACK_DMA_NET)) {</div><div class='add'>+		if (netif_running(ndev)) {</div><div class='add'>+			dev_close(ndev);</div><div class='add'>+</div><div class='add'>+			dev_open(ndev, NULL);</div><div class='add'>+		}</div><div class='add'>+	} else if ((priv_flags ^ flags) &amp; AQ_HW_LOOPBACK_MASK) {</div><div class='add'>+		ret = aq_nic_set_loopback(aq_nic);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_ethtool_get_phy_tunable(struct net_device *ndev,</div><div class='add'>+				      const struct ethtool_tunable *tuna, void *data)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	switch (tuna-&gt;id) {</div><div class='add'>+	case ETHTOOL_PHY_EDPD: {</div><div class='add'>+		u16 *val = data;</div><div class='add'>+</div><div class='add'>+		*val = aq_nic-&gt;aq_nic_cfg.is_media_detect ? AQ_HW_MEDIA_DETECT_CNT : 0;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	case ETHTOOL_PHY_DOWNSHIFT: {</div><div class='add'>+		u8 *val = data;</div><div class='add'>+</div><div class='add'>+		*val = (u8)aq_nic-&gt;aq_nic_cfg.downshift_counter;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_ethtool_set_phy_tunable(struct net_device *ndev,</div><div class='add'>+				      const struct ethtool_tunable *tuna, const void *data)</div><div class='add'>+{</div><div class='add'>+	int err = -EOPNOTSUPP;</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	switch (tuna-&gt;id) {</div><div class='add'>+	case ETHTOOL_PHY_EDPD: {</div><div class='add'>+		const u16 *val = data;</div><div class='add'>+</div><div class='add'>+		err = aq_nic_set_media_detect(aq_nic, *val);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	case ETHTOOL_PHY_DOWNSHIFT: {</div><div class='add'>+		const u8 *val = data;</div><div class='add'>+</div><div class='add'>+		err = aq_nic_set_downshift(aq_nic, *val);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_ethtool_get_module_info(struct net_device *ndev,</div><div class='add'>+				      struct ethtool_modinfo *modinfo)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+	u8 compliance_val, dom_type;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Module EEPROM is only supported for controllers with external PHY */</div><div class='add'>+	if (aq_nic-&gt;aq_nic_cfg.aq_hw_caps-&gt;media_type != AQ_HW_MEDIA_TYPE_FIBRE ||</div><div class='add'>+	    !aq_nic-&gt;aq_hw_ops-&gt;hw_read_module_eeprom)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	err = aq_nic-&gt;aq_hw_ops-&gt;hw_read_module_eeprom(aq_nic-&gt;aq_hw,</div><div class='add'>+		SFF_8472_ID_ADDR, SFF_8472_COMP_ADDR, 1, &amp;compliance_val);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = aq_nic-&gt;aq_hw_ops-&gt;hw_read_module_eeprom(aq_nic-&gt;aq_hw,</div><div class='add'>+		SFF_8472_ID_ADDR, SFF_8472_DOM_TYPE_ADDR, 1, &amp;dom_type);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (dom_type &amp; SFF_8472_ADDRESS_CHANGE_REQ_MASK || compliance_val == 0x00) {</div><div class='add'>+		modinfo-&gt;type = ETH_MODULE_SFF_8079;</div><div class='add'>+		modinfo-&gt;eeprom_len = ETH_MODULE_SFF_8079_LEN;</div><div class='add'>+	} else {</div><div class='add'>+		modinfo-&gt;type = ETH_MODULE_SFF_8472;</div><div class='add'>+		modinfo-&gt;eeprom_len = ETH_MODULE_SFF_8472_LEN;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_ethtool_get_module_eeprom(struct net_device *ndev,</div><div class='add'>+					struct ethtool_eeprom *ee, unsigned char *data)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+	unsigned int first, last, len;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!aq_nic-&gt;aq_hw_ops-&gt;hw_read_module_eeprom)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	first = ee-&gt;offset;</div><div class='add'>+	last = ee-&gt;offset + ee-&gt;len;</div><div class='add'>+</div><div class='add'>+	if (first &lt; ETH_MODULE_SFF_8079_LEN) {</div><div class='add'>+		len = min(last, ETH_MODULE_SFF_8079_LEN);</div><div class='add'>+		len -= first;</div><div class='add'>+</div><div class='add'>+		err = aq_nic-&gt;aq_hw_ops-&gt;hw_read_module_eeprom(aq_nic-&gt;aq_hw,</div><div class='add'>+			SFF_8472_ID_ADDR, first, len, data);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+</div><div class='add'>+		first += len;</div><div class='add'>+		data += len;</div><div class='add'>+	}</div><div class='add'>+	if (first &lt; ETH_MODULE_SFF_8472_LEN &amp;&amp; last &gt; ETH_MODULE_SFF_8079_LEN) {</div><div class='add'>+		len = min(last, ETH_MODULE_SFF_8472_LEN);</div><div class='add'>+		len -= first;</div><div class='add'>+		first -= ETH_MODULE_SFF_8079_LEN;</div><div class='add'>+</div><div class='add'>+		err = aq_nic-&gt;aq_hw_ops-&gt;hw_read_module_eeprom(aq_nic-&gt;aq_hw,</div><div class='add'>+			SFF_8472_DIAGNOSTICS_ADDR, first, len, data);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct ethtool_ops aq_ethtool_ops = {</div><div class='add'>+	.supported_coalesce_params = ETHTOOL_COALESCE_USECS |</div><div class='add'>+				     ETHTOOL_COALESCE_MAX_FRAMES,</div><div class='add'>+	.get_link            = aq_ethtool_get_link,</div><div class='add'>+	.get_regs_len        = aq_ethtool_get_regs_len,</div><div class='add'>+	.get_regs            = aq_ethtool_get_regs,</div><div class='add'>+	.get_drvinfo         = aq_ethtool_get_drvinfo,</div><div class='add'>+	.get_strings         = aq_ethtool_get_strings,</div><div class='add'>+	.set_phys_id         = aq_ethtool_set_phys_id,</div><div class='add'>+	.get_rxfh_indir_size = aq_ethtool_get_rss_indir_size,</div><div class='add'>+	.get_wol             = aq_ethtool_get_wol,</div><div class='add'>+	.set_wol             = aq_ethtool_set_wol,</div><div class='add'>+	.nway_reset          = aq_ethtool_nway_reset,</div><div class='add'>+	.get_ringparam       = aq_get_ringparam,</div><div class='add'>+	.set_ringparam       = aq_set_ringparam,</div><div class='add'>+	.get_eee             = aq_ethtool_get_eee,</div><div class='add'>+	.set_eee             = aq_ethtool_set_eee,</div><div class='add'>+	.get_pauseparam      = aq_ethtool_get_pauseparam,</div><div class='add'>+	.set_pauseparam      = aq_ethtool_set_pauseparam,</div><div class='add'>+	.get_rxfh_key_size   = aq_ethtool_get_rss_key_size,</div><div class='add'>+	.get_rxfh            = aq_ethtool_get_rss,</div><div class='add'>+	.set_rxfh            = aq_ethtool_set_rss,</div><div class='add'>+	.get_rxnfc           = aq_ethtool_get_rxnfc,</div><div class='add'>+	.set_rxnfc           = aq_ethtool_set_rxnfc,</div><div class='add'>+	.get_msglevel        = aq_get_msg_level,</div><div class='add'>+	.set_msglevel        = aq_set_msg_level,</div><div class='add'>+	.get_sset_count      = aq_ethtool_get_sset_count,</div><div class='add'>+	.get_ethtool_stats   = aq_ethtool_stats,</div><div class='add'>+	.get_priv_flags      = aq_ethtool_get_priv_flags,</div><div class='add'>+	.set_priv_flags      = aq_ethtool_set_priv_flags,</div><div class='add'>+	.get_link_ksettings  = aq_ethtool_get_link_ksettings,</div><div class='add'>+	.set_link_ksettings  = aq_ethtool_set_link_ksettings,</div><div class='add'>+	.get_coalesce	     = aq_ethtool_get_coalesce,</div><div class='add'>+	.set_coalesce	     = aq_ethtool_set_coalesce,</div><div class='add'>+	.get_ts_info         = aq_ethtool_get_ts_info,</div><div class='add'>+	.get_phy_tunable     = aq_ethtool_get_phy_tunable,</div><div class='add'>+	.set_phy_tunable     = aq_ethtool_set_phy_tunable,</div><div class='add'>+	.get_module_info     = aq_ethtool_get_module_info,</div><div class='add'>+	.get_module_eeprom   = aq_ethtool_get_module_eeprom,</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_ethtool.h b/drivers/net/ethernet/aquantia/atlantic/aq_ethtool.h<br/>new file mode 100644<br/>index 000000000000..f26fe1a75539<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_ethtool.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_ethtool.h</a></div><div class='hunk'>@@ -0,0 +1,25 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*</div><div class='add'>+ * aQuantia Corporation Network Driver</div><div class='add'>+ * Copyright (C) 2014-2017 aQuantia Corporation. All rights reserved</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* File aq_ethtool.h: Declaration of ethertool related functions. */</div><div class='add'>+</div><div class='add'>+#ifndef AQ_ETHTOOL_H</div><div class='add'>+#define AQ_ETHTOOL_H</div><div class='add'>+</div><div class='add'>+#include "aq_common.h"</div><div class='add'>+</div><div class='add'>+extern const struct ethtool_ops aq_ethtool_ops;</div><div class='add'>+#define AQ_PRIV_FLAGS_MASK   (AQ_HW_LOOPBACK_MASK)</div><div class='add'>+</div><div class='add'>+#define SFF_8472_ID_ADDR 0x50</div><div class='add'>+#define SFF_8472_DIAGNOSTICS_ADDR 0x51</div><div class='add'>+</div><div class='add'>+#define SFF_8472_COMP_ADDR	0x5e</div><div class='add'>+#define SFF_8472_DOM_TYPE_ADDR	0x5c</div><div class='add'>+</div><div class='add'>+#define SFF_8472_ADDRESS_CHANGE_REQ_MASK 0x4</div><div class='add'>+</div><div class='add'>+#endif /* AQ_ETHTOOL_H */</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_filters.c b/drivers/net/ethernet/aquantia/atlantic/aq_filters.c<br/>new file mode 100644<br/>index 000000000000..30a573db02bb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_filters.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_filters.c</a></div><div class='hunk'>@@ -0,0 +1,889 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Copyright (C) 2014-2019 aQuantia Corporation. */</div><div class='add'>+</div><div class='add'>+/* File aq_filters.c: RX filters related functions. */</div><div class='add'>+</div><div class='add'>+#include "aq_filters.h"</div><div class='add'>+</div><div class='add'>+static bool __must_check</div><div class='add'>+aq_rule_is_approve(struct ethtool_rx_flow_spec *fsp)</div><div class='add'>+{</div><div class='add'>+	if (fsp-&gt;flow_type &amp; FLOW_MAC_EXT)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	switch (fsp-&gt;flow_type &amp; ~FLOW_EXT) {</div><div class='add'>+	case ETHER_FLOW:</div><div class='add'>+	case TCP_V4_FLOW:</div><div class='add'>+	case UDP_V4_FLOW:</div><div class='add'>+	case SCTP_V4_FLOW:</div><div class='add'>+	case TCP_V6_FLOW:</div><div class='add'>+	case UDP_V6_FLOW:</div><div class='add'>+	case SCTP_V6_FLOW:</div><div class='add'>+	case IPV4_FLOW:</div><div class='add'>+	case IPV6_FLOW:</div><div class='add'>+		return true;</div><div class='add'>+	case IP_USER_FLOW:</div><div class='add'>+		switch (fsp-&gt;h_u.usr_ip4_spec.proto) {</div><div class='add'>+		case IPPROTO_TCP:</div><div class='add'>+		case IPPROTO_UDP:</div><div class='add'>+		case IPPROTO_SCTP:</div><div class='add'>+		case IPPROTO_IP:</div><div class='add'>+			return true;</div><div class='add'>+		default:</div><div class='add'>+			return false;</div><div class='add'>+			}</div><div class='add'>+	case IPV6_USER_FLOW:</div><div class='add'>+		switch (fsp-&gt;h_u.usr_ip6_spec.l4_proto) {</div><div class='add'>+		case IPPROTO_TCP:</div><div class='add'>+		case IPPROTO_UDP:</div><div class='add'>+		case IPPROTO_SCTP:</div><div class='add'>+		case IPPROTO_IP:</div><div class='add'>+			return true;</div><div class='add'>+		default:</div><div class='add'>+			return false;</div><div class='add'>+			}</div><div class='add'>+	default:</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool __must_check</div><div class='add'>+aq_match_filter(struct ethtool_rx_flow_spec *fsp1,</div><div class='add'>+		struct ethtool_rx_flow_spec *fsp2)</div><div class='add'>+{</div><div class='add'>+	if (fsp1-&gt;flow_type != fsp2-&gt;flow_type ||</div><div class='add'>+	    memcmp(&amp;fsp1-&gt;h_u, &amp;fsp2-&gt;h_u, sizeof(fsp2-&gt;h_u)) ||</div><div class='add'>+	    memcmp(&amp;fsp1-&gt;h_ext, &amp;fsp2-&gt;h_ext, sizeof(fsp2-&gt;h_ext)) ||</div><div class='add'>+	    memcmp(&amp;fsp1-&gt;m_u, &amp;fsp2-&gt;m_u, sizeof(fsp2-&gt;m_u)) ||</div><div class='add'>+	    memcmp(&amp;fsp1-&gt;m_ext, &amp;fsp2-&gt;m_ext, sizeof(fsp2-&gt;m_ext)))</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool __must_check</div><div class='add'>+aq_rule_already_exists(struct aq_nic_s *aq_nic,</div><div class='add'>+		       struct ethtool_rx_flow_spec *fsp)</div><div class='add'>+{</div><div class='add'>+	struct aq_rx_filter *rule;</div><div class='add'>+	struct hlist_node *aq_node2;</div><div class='add'>+	struct aq_hw_rx_fltrs_s *rx_fltrs = aq_get_hw_rx_fltrs(aq_nic);</div><div class='add'>+</div><div class='add'>+	hlist_for_each_entry_safe(rule, aq_node2,</div><div class='add'>+				  &amp;rx_fltrs-&gt;filter_list, aq_node) {</div><div class='add'>+		if (rule-&gt;aq_fsp.location == fsp-&gt;location)</div><div class='add'>+			continue;</div><div class='add'>+		if (aq_match_filter(&amp;rule-&gt;aq_fsp, fsp)) {</div><div class='add'>+			netdev_err(aq_nic-&gt;ndev,</div><div class='add'>+				   "ethtool: This filter is already set\n");</div><div class='add'>+			return true;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_check_approve_fl3l4(struct aq_nic_s *aq_nic,</div><div class='add'>+				  struct aq_hw_rx_fltrs_s *rx_fltrs,</div><div class='add'>+				  struct ethtool_rx_flow_spec *fsp)</div><div class='add'>+{</div><div class='add'>+	u32 last_location = AQ_RX_LAST_LOC_FL3L4 -</div><div class='add'>+			    aq_nic-&gt;aq_hw_rx_fltrs.fl3l4.reserved_count;</div><div class='add'>+</div><div class='add'>+	if (fsp-&gt;location &lt; AQ_RX_FIRST_LOC_FL3L4 ||</div><div class='add'>+	    fsp-&gt;location &gt; last_location) {</div><div class='add'>+		netdev_err(aq_nic-&gt;ndev,</div><div class='add'>+			   "ethtool: location must be in range [%d, %d]",</div><div class='add'>+			   AQ_RX_FIRST_LOC_FL3L4, last_location);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	if (rx_fltrs-&gt;fl3l4.is_ipv6 &amp;&amp; rx_fltrs-&gt;fl3l4.active_ipv4) {</div><div class='add'>+		rx_fltrs-&gt;fl3l4.is_ipv6 = false;</div><div class='add'>+		netdev_err(aq_nic-&gt;ndev,</div><div class='add'>+			   "ethtool: mixing ipv4 and ipv6 is not allowed");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	} else if (!rx_fltrs-&gt;fl3l4.is_ipv6 &amp;&amp; rx_fltrs-&gt;fl3l4.active_ipv6) {</div><div class='add'>+		rx_fltrs-&gt;fl3l4.is_ipv6 = true;</div><div class='add'>+		netdev_err(aq_nic-&gt;ndev,</div><div class='add'>+			   "ethtool: mixing ipv4 and ipv6 is not allowed");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	} else if (rx_fltrs-&gt;fl3l4.is_ipv6		      &amp;&amp;</div><div class='add'>+		   fsp-&gt;location != AQ_RX_FIRST_LOC_FL3L4 + 4 &amp;&amp;</div><div class='add'>+		   fsp-&gt;location != AQ_RX_FIRST_LOC_FL3L4) {</div><div class='add'>+		netdev_err(aq_nic-&gt;ndev,</div><div class='add'>+			   "ethtool: The specified location for ipv6 must be %d or %d",</div><div class='add'>+			   AQ_RX_FIRST_LOC_FL3L4, AQ_RX_FIRST_LOC_FL3L4 + 4);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __must_check</div><div class='add'>+aq_check_approve_fl2(struct aq_nic_s *aq_nic,</div><div class='add'>+		     struct aq_hw_rx_fltrs_s *rx_fltrs,</div><div class='add'>+		     struct ethtool_rx_flow_spec *fsp)</div><div class='add'>+{</div><div class='add'>+	u32 last_location = AQ_RX_LAST_LOC_FETHERT -</div><div class='add'>+			    aq_nic-&gt;aq_hw_rx_fltrs.fet_reserved_count;</div><div class='add'>+</div><div class='add'>+	if (fsp-&gt;location &lt; AQ_RX_FIRST_LOC_FETHERT ||</div><div class='add'>+	    fsp-&gt;location &gt; last_location) {</div><div class='add'>+		netdev_err(aq_nic-&gt;ndev,</div><div class='add'>+			   "ethtool: location must be in range [%d, %d]",</div><div class='add'>+			   AQ_RX_FIRST_LOC_FETHERT,</div><div class='add'>+			   last_location);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (be16_to_cpu(fsp-&gt;m_ext.vlan_tci) == VLAN_PRIO_MASK &amp;&amp;</div><div class='add'>+	    fsp-&gt;m_u.ether_spec.h_proto == 0U) {</div><div class='add'>+		netdev_err(aq_nic-&gt;ndev,</div><div class='add'>+			   "ethtool: proto (ether_type) parameter must be specified");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __must_check</div><div class='add'>+aq_check_approve_fvlan(struct aq_nic_s *aq_nic,</div><div class='add'>+		       struct aq_hw_rx_fltrs_s *rx_fltrs,</div><div class='add'>+		       struct ethtool_rx_flow_spec *fsp)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_cfg_s *cfg = &amp;aq_nic-&gt;aq_nic_cfg;</div><div class='add'>+</div><div class='add'>+	if (fsp-&gt;location &lt; AQ_RX_FIRST_LOC_FVLANID ||</div><div class='add'>+	    fsp-&gt;location &gt; AQ_RX_LAST_LOC_FVLANID) {</div><div class='add'>+		netdev_err(aq_nic-&gt;ndev,</div><div class='add'>+			   "ethtool: location must be in range [%d, %d]",</div><div class='add'>+			   AQ_RX_FIRST_LOC_FVLANID,</div><div class='add'>+			   AQ_RX_LAST_LOC_FVLANID);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((aq_nic-&gt;ndev-&gt;features &amp; NETIF_F_HW_VLAN_CTAG_FILTER) &amp;&amp;</div><div class='add'>+	    (!test_bit(be16_to_cpu(fsp-&gt;h_ext.vlan_tci) &amp; VLAN_VID_MASK,</div><div class='add'>+		       aq_nic-&gt;active_vlans))) {</div><div class='add'>+		netdev_err(aq_nic-&gt;ndev,</div><div class='add'>+			   "ethtool: unknown vlan-id specified");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (fsp-&gt;ring_cookie &gt; cfg-&gt;num_rss_queues * cfg-&gt;tcs) {</div><div class='add'>+		netdev_err(aq_nic-&gt;ndev,</div><div class='add'>+			   "ethtool: queue number must be in range [0, %d]",</div><div class='add'>+			   cfg-&gt;num_rss_queues * cfg-&gt;tcs - 1);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __must_check</div><div class='add'>+aq_check_filter(struct aq_nic_s *aq_nic,</div><div class='add'>+		struct ethtool_rx_flow_spec *fsp)</div><div class='add'>+{</div><div class='add'>+	int err = 0;</div><div class='add'>+	struct aq_hw_rx_fltrs_s *rx_fltrs = aq_get_hw_rx_fltrs(aq_nic);</div><div class='add'>+</div><div class='add'>+	if (fsp-&gt;flow_type &amp; FLOW_EXT) {</div><div class='add'>+		if (be16_to_cpu(fsp-&gt;m_ext.vlan_tci) == VLAN_VID_MASK) {</div><div class='add'>+			err = aq_check_approve_fvlan(aq_nic, rx_fltrs, fsp);</div><div class='add'>+		} else if (be16_to_cpu(fsp-&gt;m_ext.vlan_tci) == VLAN_PRIO_MASK) {</div><div class='add'>+			err = aq_check_approve_fl2(aq_nic, rx_fltrs, fsp);</div><div class='add'>+		} else {</div><div class='add'>+			netdev_err(aq_nic-&gt;ndev,</div><div class='add'>+				   "ethtool: invalid vlan mask 0x%x specified",</div><div class='add'>+				   be16_to_cpu(fsp-&gt;m_ext.vlan_tci));</div><div class='add'>+			err = -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		switch (fsp-&gt;flow_type &amp; ~FLOW_EXT) {</div><div class='add'>+		case ETHER_FLOW:</div><div class='add'>+			err = aq_check_approve_fl2(aq_nic, rx_fltrs, fsp);</div><div class='add'>+			break;</div><div class='add'>+		case TCP_V4_FLOW:</div><div class='add'>+		case UDP_V4_FLOW:</div><div class='add'>+		case SCTP_V4_FLOW:</div><div class='add'>+		case IPV4_FLOW:</div><div class='add'>+		case IP_USER_FLOW:</div><div class='add'>+			rx_fltrs-&gt;fl3l4.is_ipv6 = false;</div><div class='add'>+			err = aq_check_approve_fl3l4(aq_nic, rx_fltrs, fsp);</div><div class='add'>+			break;</div><div class='add'>+		case TCP_V6_FLOW:</div><div class='add'>+		case UDP_V6_FLOW:</div><div class='add'>+		case SCTP_V6_FLOW:</div><div class='add'>+		case IPV6_FLOW:</div><div class='add'>+		case IPV6_USER_FLOW:</div><div class='add'>+			rx_fltrs-&gt;fl3l4.is_ipv6 = true;</div><div class='add'>+			err = aq_check_approve_fl3l4(aq_nic, rx_fltrs, fsp);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			netdev_err(aq_nic-&gt;ndev,</div><div class='add'>+				   "ethtool: unknown flow-type specified");</div><div class='add'>+			err = -EINVAL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool __must_check</div><div class='add'>+aq_rule_is_not_support(struct aq_nic_s *aq_nic,</div><div class='add'>+		       struct ethtool_rx_flow_spec *fsp)</div><div class='add'>+{</div><div class='add'>+	bool rule_is_not_support = false;</div><div class='add'>+</div><div class='add'>+	if (!(aq_nic-&gt;ndev-&gt;features &amp; NETIF_F_NTUPLE)) {</div><div class='add'>+		netdev_err(aq_nic-&gt;ndev,</div><div class='add'>+			   "ethtool: Please, to enable the RX flow control:\n"</div><div class='add'>+			   "ethtool -K %s ntuple on\n", aq_nic-&gt;ndev-&gt;name);</div><div class='add'>+		rule_is_not_support = true;</div><div class='add'>+	} else if (!aq_rule_is_approve(fsp)) {</div><div class='add'>+		netdev_err(aq_nic-&gt;ndev,</div><div class='add'>+			   "ethtool: The specified flow type is not supported\n");</div><div class='add'>+		rule_is_not_support = true;</div><div class='add'>+	} else if ((fsp-&gt;flow_type &amp; ~FLOW_EXT) != ETHER_FLOW &amp;&amp;</div><div class='add'>+		   (fsp-&gt;h_u.tcp_ip4_spec.tos ||</div><div class='add'>+		    fsp-&gt;h_u.tcp_ip6_spec.tclass)) {</div><div class='add'>+		netdev_err(aq_nic-&gt;ndev,</div><div class='add'>+			   "ethtool: The specified tos tclass are not supported\n");</div><div class='add'>+		rule_is_not_support = true;</div><div class='add'>+	} else if (fsp-&gt;flow_type &amp; FLOW_MAC_EXT) {</div><div class='add'>+		netdev_err(aq_nic-&gt;ndev,</div><div class='add'>+			   "ethtool: MAC_EXT is not supported");</div><div class='add'>+		rule_is_not_support = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rule_is_not_support;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool __must_check</div><div class='add'>+aq_rule_is_not_correct(struct aq_nic_s *aq_nic,</div><div class='add'>+		       struct ethtool_rx_flow_spec *fsp)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_cfg_s *cfg = &amp;aq_nic-&gt;aq_nic_cfg;</div><div class='add'>+	bool rule_is_not_correct = false;</div><div class='add'>+</div><div class='add'>+	if (!aq_nic) {</div><div class='add'>+		rule_is_not_correct = true;</div><div class='add'>+	} else if (fsp-&gt;location &gt; AQ_RX_MAX_RXNFC_LOC) {</div><div class='add'>+		netdev_err(aq_nic-&gt;ndev,</div><div class='add'>+			   "ethtool: The specified number %u rule is invalid\n",</div><div class='add'>+			   fsp-&gt;location);</div><div class='add'>+		rule_is_not_correct = true;</div><div class='add'>+	} else if (aq_check_filter(aq_nic, fsp)) {</div><div class='add'>+		rule_is_not_correct = true;</div><div class='add'>+	} else if (fsp-&gt;ring_cookie != RX_CLS_FLOW_DISC) {</div><div class='add'>+		if (fsp-&gt;ring_cookie &gt;= cfg-&gt;num_rss_queues * cfg-&gt;tcs) {</div><div class='add'>+			netdev_err(aq_nic-&gt;ndev,</div><div class='add'>+				   "ethtool: The specified action is invalid.\n"</div><div class='add'>+				   "Maximum allowable value action is %u.\n",</div><div class='add'>+				   cfg-&gt;num_rss_queues * cfg-&gt;tcs - 1);</div><div class='add'>+			rule_is_not_correct = true;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return rule_is_not_correct;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __must_check</div><div class='add'>+aq_check_rule(struct aq_nic_s *aq_nic,</div><div class='add'>+	      struct ethtool_rx_flow_spec *fsp)</div><div class='add'>+{</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (aq_rule_is_not_correct(aq_nic, fsp))</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+	else if (aq_rule_is_not_support(aq_nic, fsp))</div><div class='add'>+		err = -EOPNOTSUPP;</div><div class='add'>+	else if (aq_rule_already_exists(aq_nic, fsp))</div><div class='add'>+		err = -EEXIST;</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aq_set_data_fl2(struct aq_nic_s *aq_nic,</div><div class='add'>+			    struct aq_rx_filter *aq_rx_fltr,</div><div class='add'>+			    struct aq_rx_filter_l2 *data, bool add)</div><div class='add'>+{</div><div class='add'>+	const struct ethtool_rx_flow_spec *fsp = &amp;aq_rx_fltr-&gt;aq_fsp;</div><div class='add'>+</div><div class='add'>+	memset(data, 0, sizeof(*data));</div><div class='add'>+</div><div class='add'>+	data-&gt;location = fsp-&gt;location - AQ_RX_FIRST_LOC_FETHERT;</div><div class='add'>+</div><div class='add'>+	if (fsp-&gt;ring_cookie != RX_CLS_FLOW_DISC)</div><div class='add'>+		data-&gt;queue = fsp-&gt;ring_cookie;</div><div class='add'>+	else</div><div class='add'>+		data-&gt;queue = -1;</div><div class='add'>+</div><div class='add'>+	data-&gt;ethertype = be16_to_cpu(fsp-&gt;h_u.ether_spec.h_proto);</div><div class='add'>+	data-&gt;user_priority_en = be16_to_cpu(fsp-&gt;m_ext.vlan_tci)</div><div class='add'>+				 == VLAN_PRIO_MASK;</div><div class='add'>+	data-&gt;user_priority = (be16_to_cpu(fsp-&gt;h_ext.vlan_tci)</div><div class='add'>+			       &amp; VLAN_PRIO_MASK) &gt;&gt; VLAN_PRIO_SHIFT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_add_del_fether(struct aq_nic_s *aq_nic,</div><div class='add'>+			     struct aq_rx_filter *aq_rx_fltr, bool add)</div><div class='add'>+{</div><div class='add'>+	struct aq_rx_filter_l2 data;</div><div class='add'>+	struct aq_hw_s *aq_hw = aq_nic-&gt;aq_hw;</div><div class='add'>+	const struct aq_hw_ops *aq_hw_ops = aq_nic-&gt;aq_hw_ops;</div><div class='add'>+</div><div class='add'>+	aq_set_data_fl2(aq_nic, aq_rx_fltr, &amp;data, add);</div><div class='add'>+</div><div class='add'>+	if (unlikely(!aq_hw_ops-&gt;hw_filter_l2_set))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	if (unlikely(!aq_hw_ops-&gt;hw_filter_l2_clear))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (add)</div><div class='add'>+		return aq_hw_ops-&gt;hw_filter_l2_set(aq_hw, &amp;data);</div><div class='add'>+	else</div><div class='add'>+		return aq_hw_ops-&gt;hw_filter_l2_clear(aq_hw, &amp;data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool aq_fvlan_is_busy(struct aq_rx_filter_vlan *aq_vlans, int vlan)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; AQ_VLAN_MAX_FILTERS; ++i) {</div><div class='add'>+		if (aq_vlans[i].enable &amp;&amp;</div><div class='add'>+		    aq_vlans[i].queue != AQ_RX_QUEUE_NOT_ASSIGNED &amp;&amp;</div><div class='add'>+		    aq_vlans[i].vlan_id == vlan) {</div><div class='add'>+			return true;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Function rebuilds array of vlan filters so that filters with assigned</div><div class='add'>+ * queue have a precedence over just vlans on the interface.</div><div class='add'>+ */</div><div class='add'>+static void aq_fvlan_rebuild(struct aq_nic_s *aq_nic,</div><div class='add'>+			     unsigned long *active_vlans,</div><div class='add'>+			     struct aq_rx_filter_vlan *aq_vlans)</div><div class='add'>+{</div><div class='add'>+	bool vlan_busy = false;</div><div class='add'>+	int vlan = -1;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; AQ_VLAN_MAX_FILTERS; ++i) {</div><div class='add'>+		if (aq_vlans[i].enable &amp;&amp;</div><div class='add'>+		    aq_vlans[i].queue != AQ_RX_QUEUE_NOT_ASSIGNED)</div><div class='add'>+			continue;</div><div class='add'>+		do {</div><div class='add'>+			vlan = find_next_bit(active_vlans,</div><div class='add'>+					     VLAN_N_VID,</div><div class='add'>+					     vlan + 1);</div><div class='add'>+			if (vlan == VLAN_N_VID) {</div><div class='add'>+				aq_vlans[i].enable = 0U;</div><div class='add'>+				aq_vlans[i].queue = AQ_RX_QUEUE_NOT_ASSIGNED;</div><div class='add'>+				aq_vlans[i].vlan_id = 0;</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			vlan_busy = aq_fvlan_is_busy(aq_vlans, vlan);</div><div class='add'>+			if (!vlan_busy) {</div><div class='add'>+				aq_vlans[i].enable = 1U;</div><div class='add'>+				aq_vlans[i].queue = AQ_RX_QUEUE_NOT_ASSIGNED;</div><div class='add'>+				aq_vlans[i].vlan_id = vlan;</div><div class='add'>+			}</div><div class='add'>+		} while (vlan_busy &amp;&amp; vlan != VLAN_N_VID);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_set_data_fvlan(struct aq_nic_s *aq_nic,</div><div class='add'>+			     struct aq_rx_filter *aq_rx_fltr,</div><div class='add'>+			     struct aq_rx_filter_vlan *aq_vlans, bool add)</div><div class='add'>+{</div><div class='add'>+	const struct ethtool_rx_flow_spec *fsp = &amp;aq_rx_fltr-&gt;aq_fsp;</div><div class='add'>+	int location = fsp-&gt;location - AQ_RX_FIRST_LOC_FVLANID;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	memset(&amp;aq_vlans[location], 0, sizeof(aq_vlans[location]));</div><div class='add'>+</div><div class='add'>+	if (!add)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* remove vlan if it was in table without queue assignment */</div><div class='add'>+	for (i = 0; i &lt; AQ_VLAN_MAX_FILTERS; ++i) {</div><div class='add'>+		if (aq_vlans[i].vlan_id ==</div><div class='add'>+		   (be16_to_cpu(fsp-&gt;h_ext.vlan_tci) &amp; VLAN_VID_MASK)) {</div><div class='add'>+			aq_vlans[i].enable = false;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	aq_vlans[location].location = location;</div><div class='add'>+	aq_vlans[location].vlan_id = be16_to_cpu(fsp-&gt;h_ext.vlan_tci)</div><div class='add'>+				     &amp; VLAN_VID_MASK;</div><div class='add'>+	aq_vlans[location].queue = fsp-&gt;ring_cookie &amp; 0x1FU;</div><div class='add'>+	aq_vlans[location].enable = 1U;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_del_fvlan_by_vlan(struct aq_nic_s *aq_nic, u16 vlan_id)</div><div class='add'>+{</div><div class='add'>+	struct aq_hw_rx_fltrs_s *rx_fltrs = aq_get_hw_rx_fltrs(aq_nic);</div><div class='add'>+	struct aq_rx_filter *rule = NULL;</div><div class='add'>+	struct hlist_node *aq_node2;</div><div class='add'>+</div><div class='add'>+	hlist_for_each_entry_safe(rule, aq_node2,</div><div class='add'>+				  &amp;rx_fltrs-&gt;filter_list, aq_node) {</div><div class='add'>+		if (be16_to_cpu(rule-&gt;aq_fsp.h_ext.vlan_tci) == vlan_id)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+	if (rule &amp;&amp; rule-&gt;type == aq_rx_filter_vlan &amp;&amp;</div><div class='add'>+	    be16_to_cpu(rule-&gt;aq_fsp.h_ext.vlan_tci) == vlan_id) {</div><div class='add'>+		struct ethtool_rxnfc cmd;</div><div class='add'>+</div><div class='add'>+		cmd.fs.location = rule-&gt;aq_fsp.location;</div><div class='add'>+		return aq_del_rxnfc_rule(aq_nic, &amp;cmd);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -ENOENT;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_add_del_fvlan(struct aq_nic_s *aq_nic,</div><div class='add'>+			    struct aq_rx_filter *aq_rx_fltr, bool add)</div><div class='add'>+{</div><div class='add'>+	const struct aq_hw_ops *aq_hw_ops = aq_nic-&gt;aq_hw_ops;</div><div class='add'>+</div><div class='add'>+	if (unlikely(!aq_hw_ops-&gt;hw_filter_vlan_set))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	aq_set_data_fvlan(aq_nic,</div><div class='add'>+			  aq_rx_fltr,</div><div class='add'>+			  aq_nic-&gt;aq_hw_rx_fltrs.fl2.aq_vlans,</div><div class='add'>+			  add);</div><div class='add'>+</div><div class='add'>+	return aq_filters_vlans_update(aq_nic);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_set_data_fl3l4(struct aq_nic_s *aq_nic,</div><div class='add'>+			     struct aq_rx_filter *aq_rx_fltr,</div><div class='add'>+			     struct aq_rx_filter_l3l4 *data, bool add)</div><div class='add'>+{</div><div class='add'>+	struct aq_hw_rx_fltrs_s *rx_fltrs = aq_get_hw_rx_fltrs(aq_nic);</div><div class='add'>+	const struct ethtool_rx_flow_spec *fsp = &amp;aq_rx_fltr-&gt;aq_fsp;</div><div class='add'>+</div><div class='add'>+	memset(data, 0, sizeof(*data));</div><div class='add'>+</div><div class='add'>+	data-&gt;is_ipv6 = rx_fltrs-&gt;fl3l4.is_ipv6;</div><div class='add'>+	data-&gt;location = HW_ATL_GET_REG_LOCATION_FL3L4(fsp-&gt;location);</div><div class='add'>+</div><div class='add'>+	if (!add) {</div><div class='add'>+		if (!data-&gt;is_ipv6)</div><div class='add'>+			rx_fltrs-&gt;fl3l4.active_ipv4 &amp;= ~BIT(data-&gt;location);</div><div class='add'>+		else</div><div class='add'>+			rx_fltrs-&gt;fl3l4.active_ipv6 &amp;=</div><div class='add'>+				~BIT((data-&gt;location) / 4);</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	data-&gt;cmd |= HW_ATL_RX_ENABLE_FLTR_L3L4;</div><div class='add'>+</div><div class='add'>+	switch (fsp-&gt;flow_type) {</div><div class='add'>+	case TCP_V4_FLOW:</div><div class='add'>+	case TCP_V6_FLOW:</div><div class='add'>+		data-&gt;cmd |= HW_ATL_RX_ENABLE_CMP_PROT_L4;</div><div class='add'>+		break;</div><div class='add'>+	case UDP_V4_FLOW:</div><div class='add'>+	case UDP_V6_FLOW:</div><div class='add'>+		data-&gt;cmd |= HW_ATL_RX_UDP;</div><div class='add'>+		data-&gt;cmd |= HW_ATL_RX_ENABLE_CMP_PROT_L4;</div><div class='add'>+		break;</div><div class='add'>+	case SCTP_V4_FLOW:</div><div class='add'>+	case SCTP_V6_FLOW:</div><div class='add'>+		data-&gt;cmd |= HW_ATL_RX_SCTP;</div><div class='add'>+		data-&gt;cmd |= HW_ATL_RX_ENABLE_CMP_PROT_L4;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!data-&gt;is_ipv6) {</div><div class='add'>+		data-&gt;ip_src[0] =</div><div class='add'>+			ntohl(fsp-&gt;h_u.tcp_ip4_spec.ip4src);</div><div class='add'>+		data-&gt;ip_dst[0] =</div><div class='add'>+			ntohl(fsp-&gt;h_u.tcp_ip4_spec.ip4dst);</div><div class='add'>+		rx_fltrs-&gt;fl3l4.active_ipv4 |= BIT(data-&gt;location);</div><div class='add'>+	} else {</div><div class='add'>+		int i;</div><div class='add'>+</div><div class='add'>+		rx_fltrs-&gt;fl3l4.active_ipv6 |= BIT((data-&gt;location) / 4);</div><div class='add'>+		for (i = 0; i &lt; HW_ATL_RX_CNT_REG_ADDR_IPV6; ++i) {</div><div class='add'>+			data-&gt;ip_dst[i] =</div><div class='add'>+				ntohl(fsp-&gt;h_u.tcp_ip6_spec.ip6dst[i]);</div><div class='add'>+			data-&gt;ip_src[i] =</div><div class='add'>+				ntohl(fsp-&gt;h_u.tcp_ip6_spec.ip6src[i]);</div><div class='add'>+		}</div><div class='add'>+		data-&gt;cmd |= HW_ATL_RX_ENABLE_L3_IPV6;</div><div class='add'>+	}</div><div class='add'>+	if (fsp-&gt;flow_type != IP_USER_FLOW &amp;&amp;</div><div class='add'>+	    fsp-&gt;flow_type != IPV6_USER_FLOW) {</div><div class='add'>+		if (!data-&gt;is_ipv6) {</div><div class='add'>+			data-&gt;p_dst =</div><div class='add'>+				ntohs(fsp-&gt;h_u.tcp_ip4_spec.pdst);</div><div class='add'>+			data-&gt;p_src =</div><div class='add'>+				ntohs(fsp-&gt;h_u.tcp_ip4_spec.psrc);</div><div class='add'>+		} else {</div><div class='add'>+			data-&gt;p_dst =</div><div class='add'>+				ntohs(fsp-&gt;h_u.tcp_ip6_spec.pdst);</div><div class='add'>+			data-&gt;p_src =</div><div class='add'>+				ntohs(fsp-&gt;h_u.tcp_ip6_spec.psrc);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	if (data-&gt;ip_src[0] &amp;&amp; !data-&gt;is_ipv6)</div><div class='add'>+		data-&gt;cmd |= HW_ATL_RX_ENABLE_CMP_SRC_ADDR_L3;</div><div class='add'>+	if (data-&gt;ip_dst[0] &amp;&amp; !data-&gt;is_ipv6)</div><div class='add'>+		data-&gt;cmd |= HW_ATL_RX_ENABLE_CMP_DEST_ADDR_L3;</div><div class='add'>+	if (data-&gt;p_dst)</div><div class='add'>+		data-&gt;cmd |= HW_ATL_RX_ENABLE_CMP_DEST_PORT_L4;</div><div class='add'>+	if (data-&gt;p_src)</div><div class='add'>+		data-&gt;cmd |= HW_ATL_RX_ENABLE_CMP_SRC_PORT_L4;</div><div class='add'>+	if (fsp-&gt;ring_cookie != RX_CLS_FLOW_DISC) {</div><div class='add'>+		data-&gt;cmd |= HW_ATL_RX_HOST &lt;&lt; HW_ATL_RX_ACTION_FL3F4_SHIFT;</div><div class='add'>+		data-&gt;cmd |= fsp-&gt;ring_cookie &lt;&lt; HW_ATL_RX_QUEUE_FL3L4_SHIFT;</div><div class='add'>+		data-&gt;cmd |= HW_ATL_RX_ENABLE_QUEUE_L3L4;</div><div class='add'>+	} else {</div><div class='add'>+		data-&gt;cmd |= HW_ATL_RX_DISCARD &lt;&lt; HW_ATL_RX_ACTION_FL3F4_SHIFT;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_set_fl3l4(struct aq_hw_s *aq_hw,</div><div class='add'>+			const struct aq_hw_ops *aq_hw_ops,</div><div class='add'>+			struct aq_rx_filter_l3l4 *data)</div><div class='add'>+{</div><div class='add'>+	if (unlikely(!aq_hw_ops-&gt;hw_filter_l3l4_set))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	return aq_hw_ops-&gt;hw_filter_l3l4_set(aq_hw, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_add_del_fl3l4(struct aq_nic_s *aq_nic,</div><div class='add'>+			    struct aq_rx_filter *aq_rx_fltr, bool add)</div><div class='add'>+{</div><div class='add'>+	const struct aq_hw_ops *aq_hw_ops = aq_nic-&gt;aq_hw_ops;</div><div class='add'>+	struct aq_hw_s *aq_hw = aq_nic-&gt;aq_hw;</div><div class='add'>+	struct aq_rx_filter_l3l4 data;</div><div class='add'>+</div><div class='add'>+	if (unlikely(aq_rx_fltr-&gt;aq_fsp.location &lt; AQ_RX_FIRST_LOC_FL3L4 ||</div><div class='add'>+		     aq_rx_fltr-&gt;aq_fsp.location &gt; AQ_RX_LAST_LOC_FL3L4  ||</div><div class='add'>+		     aq_set_data_fl3l4(aq_nic, aq_rx_fltr, &amp;data, add)))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return aq_set_fl3l4(aq_hw, aq_hw_ops, &amp;data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_add_del_rule(struct aq_nic_s *aq_nic,</div><div class='add'>+			   struct aq_rx_filter *aq_rx_fltr, bool add)</div><div class='add'>+{</div><div class='add'>+	int err = -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (aq_rx_fltr-&gt;aq_fsp.flow_type &amp; FLOW_EXT) {</div><div class='add'>+		if (be16_to_cpu(aq_rx_fltr-&gt;aq_fsp.m_ext.vlan_tci)</div><div class='add'>+		    == VLAN_VID_MASK) {</div><div class='add'>+			aq_rx_fltr-&gt;type = aq_rx_filter_vlan;</div><div class='add'>+			err = aq_add_del_fvlan(aq_nic, aq_rx_fltr, add);</div><div class='add'>+		} else if (be16_to_cpu(aq_rx_fltr-&gt;aq_fsp.m_ext.vlan_tci)</div><div class='add'>+			== VLAN_PRIO_MASK) {</div><div class='add'>+			aq_rx_fltr-&gt;type = aq_rx_filter_ethertype;</div><div class='add'>+			err = aq_add_del_fether(aq_nic, aq_rx_fltr, add);</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		switch (aq_rx_fltr-&gt;aq_fsp.flow_type &amp; ~FLOW_EXT) {</div><div class='add'>+		case ETHER_FLOW:</div><div class='add'>+			aq_rx_fltr-&gt;type = aq_rx_filter_ethertype;</div><div class='add'>+			err = aq_add_del_fether(aq_nic, aq_rx_fltr, add);</div><div class='add'>+			break;</div><div class='add'>+		case TCP_V4_FLOW:</div><div class='add'>+		case UDP_V4_FLOW:</div><div class='add'>+		case SCTP_V4_FLOW:</div><div class='add'>+		case IP_USER_FLOW:</div><div class='add'>+		case TCP_V6_FLOW:</div><div class='add'>+		case UDP_V6_FLOW:</div><div class='add'>+		case SCTP_V6_FLOW:</div><div class='add'>+		case IPV6_USER_FLOW:</div><div class='add'>+			aq_rx_fltr-&gt;type = aq_rx_filter_l3l4;</div><div class='add'>+			err = aq_add_del_fl3l4(aq_nic, aq_rx_fltr, add);</div><div class='add'>+			break;</div><div class='add'>+		default:</div><div class='add'>+			err = -EINVAL;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_update_table_filters(struct aq_nic_s *aq_nic,</div><div class='add'>+				   struct aq_rx_filter *aq_rx_fltr, u16 index,</div><div class='add'>+				   struct ethtool_rxnfc *cmd)</div><div class='add'>+{</div><div class='add'>+	struct aq_hw_rx_fltrs_s *rx_fltrs = aq_get_hw_rx_fltrs(aq_nic);</div><div class='add'>+	struct aq_rx_filter *rule = NULL, *parent = NULL;</div><div class='add'>+	struct hlist_node *aq_node2;</div><div class='add'>+	int err = -EINVAL;</div><div class='add'>+</div><div class='add'>+	hlist_for_each_entry_safe(rule, aq_node2,</div><div class='add'>+				  &amp;rx_fltrs-&gt;filter_list, aq_node) {</div><div class='add'>+		if (rule-&gt;aq_fsp.location &gt;= index)</div><div class='add'>+			break;</div><div class='add'>+		parent = rule;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rule &amp;&amp; rule-&gt;aq_fsp.location == index) {</div><div class='add'>+		err = aq_add_del_rule(aq_nic, rule, false);</div><div class='add'>+		hlist_del(&amp;rule-&gt;aq_node);</div><div class='add'>+		kfree(rule);</div><div class='add'>+		--rx_fltrs-&gt;active_filters;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (unlikely(!aq_rx_fltr))</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	INIT_HLIST_NODE(&amp;aq_rx_fltr-&gt;aq_node);</div><div class='add'>+</div><div class='add'>+	if (parent)</div><div class='add'>+		hlist_add_behind(&amp;aq_rx_fltr-&gt;aq_node, &amp;parent-&gt;aq_node);</div><div class='add'>+	else</div><div class='add'>+		hlist_add_head(&amp;aq_rx_fltr-&gt;aq_node, &amp;rx_fltrs-&gt;filter_list);</div><div class='add'>+</div><div class='add'>+	++rx_fltrs-&gt;active_filters;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u16 aq_get_rxnfc_count_all_rules(struct aq_nic_s *aq_nic)</div><div class='add'>+{</div><div class='add'>+	struct aq_hw_rx_fltrs_s *rx_fltrs = aq_get_hw_rx_fltrs(aq_nic);</div><div class='add'>+</div><div class='add'>+	return rx_fltrs-&gt;active_filters;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct aq_hw_rx_fltrs_s *aq_get_hw_rx_fltrs(struct aq_nic_s *aq_nic)</div><div class='add'>+{</div><div class='add'>+	return &amp;aq_nic-&gt;aq_hw_rx_fltrs;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_add_rxnfc_rule(struct aq_nic_s *aq_nic, const struct ethtool_rxnfc *cmd)</div><div class='add'>+{</div><div class='add'>+	struct aq_hw_rx_fltrs_s *rx_fltrs = aq_get_hw_rx_fltrs(aq_nic);</div><div class='add'>+	struct ethtool_rx_flow_spec *fsp =</div><div class='add'>+		(struct ethtool_rx_flow_spec *)&amp;cmd-&gt;fs;</div><div class='add'>+	struct aq_rx_filter *aq_rx_fltr;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	err = aq_check_rule(aq_nic, fsp);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	aq_rx_fltr = kzalloc(sizeof(*aq_rx_fltr), GFP_KERNEL);</div><div class='add'>+	if (unlikely(!aq_rx_fltr)) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;aq_rx_fltr-&gt;aq_fsp, fsp, sizeof(*fsp));</div><div class='add'>+</div><div class='add'>+	err = aq_update_table_filters(aq_nic, aq_rx_fltr, fsp-&gt;location, NULL);</div><div class='add'>+	if (unlikely(err))</div><div class='add'>+		goto err_free;</div><div class='add'>+</div><div class='add'>+	err = aq_add_del_rule(aq_nic, aq_rx_fltr, true);</div><div class='add'>+	if (unlikely(err)) {</div><div class='add'>+		hlist_del(&amp;aq_rx_fltr-&gt;aq_node);</div><div class='add'>+		--rx_fltrs-&gt;active_filters;</div><div class='add'>+		goto err_free;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_free:</div><div class='add'>+	kfree(aq_rx_fltr);</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_del_rxnfc_rule(struct aq_nic_s *aq_nic, const struct ethtool_rxnfc *cmd)</div><div class='add'>+{</div><div class='add'>+	struct aq_hw_rx_fltrs_s *rx_fltrs = aq_get_hw_rx_fltrs(aq_nic);</div><div class='add'>+	struct aq_rx_filter *rule = NULL;</div><div class='add'>+	struct hlist_node *aq_node2;</div><div class='add'>+	int err = -EINVAL;</div><div class='add'>+</div><div class='add'>+	hlist_for_each_entry_safe(rule, aq_node2,</div><div class='add'>+				  &amp;rx_fltrs-&gt;filter_list, aq_node) {</div><div class='add'>+		if (rule-&gt;aq_fsp.location == cmd-&gt;fs.location)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (rule &amp;&amp; rule-&gt;aq_fsp.location == cmd-&gt;fs.location) {</div><div class='add'>+		err = aq_add_del_rule(aq_nic, rule, false);</div><div class='add'>+		hlist_del(&amp;rule-&gt;aq_node);</div><div class='add'>+		kfree(rule);</div><div class='add'>+		--rx_fltrs-&gt;active_filters;</div><div class='add'>+	}</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_get_rxnfc_rule(struct aq_nic_s *aq_nic, struct ethtool_rxnfc *cmd)</div><div class='add'>+{</div><div class='add'>+	struct aq_hw_rx_fltrs_s *rx_fltrs = aq_get_hw_rx_fltrs(aq_nic);</div><div class='add'>+	struct ethtool_rx_flow_spec *fsp =</div><div class='add'>+			(struct ethtool_rx_flow_spec *)&amp;cmd-&gt;fs;</div><div class='add'>+	struct aq_rx_filter *rule = NULL;</div><div class='add'>+	struct hlist_node *aq_node2;</div><div class='add'>+</div><div class='add'>+	hlist_for_each_entry_safe(rule, aq_node2,</div><div class='add'>+				  &amp;rx_fltrs-&gt;filter_list, aq_node)</div><div class='add'>+		if (fsp-&gt;location &lt;= rule-&gt;aq_fsp.location)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+	if (unlikely(!rule || fsp-&gt;location != rule-&gt;aq_fsp.location))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	memcpy(fsp, &amp;rule-&gt;aq_fsp, sizeof(*fsp));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_get_rxnfc_all_rules(struct aq_nic_s *aq_nic, struct ethtool_rxnfc *cmd,</div><div class='add'>+			   u32 *rule_locs)</div><div class='add'>+{</div><div class='add'>+	struct aq_hw_rx_fltrs_s *rx_fltrs = aq_get_hw_rx_fltrs(aq_nic);</div><div class='add'>+	struct hlist_node *aq_node2;</div><div class='add'>+	struct aq_rx_filter *rule;</div><div class='add'>+	int count = 0;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;data = aq_get_rxnfc_count_all_rules(aq_nic);</div><div class='add'>+</div><div class='add'>+	hlist_for_each_entry_safe(rule, aq_node2,</div><div class='add'>+				  &amp;rx_fltrs-&gt;filter_list, aq_node) {</div><div class='add'>+		if (unlikely(count == cmd-&gt;rule_cnt))</div><div class='add'>+			return -EMSGSIZE;</div><div class='add'>+</div><div class='add'>+		rule_locs[count++] = rule-&gt;aq_fsp.location;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cmd-&gt;rule_cnt = count;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_clear_rxnfc_all_rules(struct aq_nic_s *aq_nic)</div><div class='add'>+{</div><div class='add'>+	struct aq_hw_rx_fltrs_s *rx_fltrs = aq_get_hw_rx_fltrs(aq_nic);</div><div class='add'>+	struct hlist_node *aq_node2;</div><div class='add'>+	struct aq_rx_filter *rule;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	hlist_for_each_entry_safe(rule, aq_node2,</div><div class='add'>+				  &amp;rx_fltrs-&gt;filter_list, aq_node) {</div><div class='add'>+		err = aq_add_del_rule(aq_nic, rule, false);</div><div class='add'>+		if (err)</div><div class='add'>+			goto err_exit;</div><div class='add'>+		hlist_del(&amp;rule-&gt;aq_node);</div><div class='add'>+		kfree(rule);</div><div class='add'>+		--rx_fltrs-&gt;active_filters;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_reapply_rxnfc_all_rules(struct aq_nic_s *aq_nic)</div><div class='add'>+{</div><div class='add'>+	struct aq_hw_rx_fltrs_s *rx_fltrs = aq_get_hw_rx_fltrs(aq_nic);</div><div class='add'>+	struct hlist_node *aq_node2;</div><div class='add'>+	struct aq_rx_filter *rule;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	hlist_for_each_entry_safe(rule, aq_node2,</div><div class='add'>+				  &amp;rx_fltrs-&gt;filter_list, aq_node) {</div><div class='add'>+		err = aq_add_del_rule(aq_nic, rule, true);</div><div class='add'>+		if (err)</div><div class='add'>+			goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_filters_vlans_update(struct aq_nic_s *aq_nic)</div><div class='add'>+{</div><div class='add'>+	const struct aq_hw_ops *aq_hw_ops = aq_nic-&gt;aq_hw_ops;</div><div class='add'>+	struct aq_hw_s *aq_hw = aq_nic-&gt;aq_hw;</div><div class='add'>+	int hweight = 0;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (unlikely(!aq_hw_ops-&gt;hw_filter_vlan_set))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	if (unlikely(!aq_hw_ops-&gt;hw_filter_vlan_ctrl))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	aq_fvlan_rebuild(aq_nic, aq_nic-&gt;active_vlans,</div><div class='add'>+			 aq_nic-&gt;aq_hw_rx_fltrs.fl2.aq_vlans);</div><div class='add'>+</div><div class='add'>+	if (aq_nic-&gt;ndev-&gt;features &amp; NETIF_F_HW_VLAN_CTAG_FILTER) {</div><div class='add'>+		hweight = bitmap_weight(aq_nic-&gt;active_vlans, VLAN_N_VID);</div><div class='add'>+</div><div class='add'>+		err = aq_hw_ops-&gt;hw_filter_vlan_ctrl(aq_hw, false);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = aq_hw_ops-&gt;hw_filter_vlan_set(aq_hw,</div><div class='add'>+					    aq_nic-&gt;aq_hw_rx_fltrs.fl2.aq_vlans</div><div class='add'>+					   );</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (aq_nic-&gt;ndev-&gt;features &amp; NETIF_F_HW_VLAN_CTAG_FILTER) {</div><div class='add'>+		if (hweight &lt;= AQ_VLAN_MAX_FILTERS &amp;&amp; hweight &gt; 0) {</div><div class='add'>+			err = aq_hw_ops-&gt;hw_filter_vlan_ctrl(aq_hw,</div><div class='add'>+				!(aq_nic-&gt;packet_filter &amp; IFF_PROMISC));</div><div class='add'>+			aq_nic-&gt;aq_nic_cfg.is_vlan_force_promisc = false;</div><div class='add'>+		} else {</div><div class='add'>+		/* otherwise left in promiscue mode */</div><div class='add'>+			aq_nic-&gt;aq_nic_cfg.is_vlan_force_promisc = true;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_filters_vlan_offload_off(struct aq_nic_s *aq_nic)</div><div class='add'>+{</div><div class='add'>+	const struct aq_hw_ops *aq_hw_ops = aq_nic-&gt;aq_hw_ops;</div><div class='add'>+	struct aq_hw_s *aq_hw = aq_nic-&gt;aq_hw;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	bitmap_zero(aq_nic-&gt;active_vlans, VLAN_N_VID);</div><div class='add'>+	aq_fvlan_rebuild(aq_nic, aq_nic-&gt;active_vlans,</div><div class='add'>+			 aq_nic-&gt;aq_hw_rx_fltrs.fl2.aq_vlans);</div><div class='add'>+</div><div class='add'>+	if (unlikely(!aq_hw_ops-&gt;hw_filter_vlan_set))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	if (unlikely(!aq_hw_ops-&gt;hw_filter_vlan_ctrl))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	aq_nic-&gt;aq_nic_cfg.is_vlan_force_promisc = true;</div><div class='add'>+	err = aq_hw_ops-&gt;hw_filter_vlan_ctrl(aq_hw, false);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+	err = aq_hw_ops-&gt;hw_filter_vlan_set(aq_hw,</div><div class='add'>+					    aq_nic-&gt;aq_hw_rx_fltrs.fl2.aq_vlans</div><div class='add'>+					   );</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_filters.h b/drivers/net/ethernet/aquantia/atlantic/aq_filters.h<br/>new file mode 100644<br/>index 000000000000..122e06c88a33<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_filters.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_filters.h</a></div><div class='hunk'>@@ -0,0 +1,36 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* Copyright (C) 2014-2017 aQuantia Corporation. */</div><div class='add'>+</div><div class='add'>+/* File aq_filters.h: RX filters related functions. */</div><div class='add'>+</div><div class='add'>+#ifndef AQ_FILTERS_H</div><div class='add'>+#define AQ_FILTERS_H</div><div class='add'>+</div><div class='add'>+#include "aq_nic.h"</div><div class='add'>+</div><div class='add'>+enum aq_rx_filter_type {</div><div class='add'>+	aq_rx_filter_ethertype,</div><div class='add'>+	aq_rx_filter_vlan,</div><div class='add'>+	aq_rx_filter_l3l4</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct aq_rx_filter {</div><div class='add'>+	struct hlist_node aq_node;</div><div class='add'>+	enum aq_rx_filter_type type;</div><div class='add'>+	struct ethtool_rx_flow_spec aq_fsp;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+u16 aq_get_rxnfc_count_all_rules(struct aq_nic_s *aq_nic);</div><div class='add'>+struct aq_hw_rx_fltrs_s *aq_get_hw_rx_fltrs(struct aq_nic_s *aq_nic);</div><div class='add'>+int aq_add_rxnfc_rule(struct aq_nic_s *aq_nic, const struct ethtool_rxnfc *cmd);</div><div class='add'>+int aq_del_rxnfc_rule(struct aq_nic_s *aq_nic, const struct ethtool_rxnfc *cmd);</div><div class='add'>+int aq_get_rxnfc_rule(struct aq_nic_s *aq_nic, struct ethtool_rxnfc *cmd);</div><div class='add'>+int aq_get_rxnfc_all_rules(struct aq_nic_s *aq_nic, struct ethtool_rxnfc *cmd,</div><div class='add'>+			   u32 *rule_locs);</div><div class='add'>+int aq_del_fvlan_by_vlan(struct aq_nic_s *aq_nic, u16 vlan_id);</div><div class='add'>+int aq_clear_rxnfc_all_rules(struct aq_nic_s *aq_nic);</div><div class='add'>+int aq_reapply_rxnfc_all_rules(struct aq_nic_s *aq_nic);</div><div class='add'>+int aq_filters_vlans_update(struct aq_nic_s *aq_nic);</div><div class='add'>+int aq_filters_vlan_offload_off(struct aq_nic_s *aq_nic);</div><div class='add'>+</div><div class='add'>+#endif /* AQ_FILTERS_H */</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_hw.h b/drivers/net/ethernet/aquantia/atlantic/aq_hw.h<br/>new file mode 100644<br/>index 000000000000..4e66fd9b2ab1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_hw.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_hw.h</a></div><div class='hunk'>@@ -0,0 +1,409 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2014-2019 aQuantia Corporation</div><div class='add'>+ * Copyright (C) 2019-2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* File aq_hw.h: Declaration of abstract interface for NIC hardware specific</div><div class='add'>+ * functions.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef AQ_HW_H</div><div class='add'>+#define AQ_HW_H</div><div class='add'>+</div><div class='add'>+#include "aq_common.h"</div><div class='add'>+#include "aq_rss.h"</div><div class='add'>+#include "hw_atl/hw_atl_utils.h"</div><div class='add'>+</div><div class='add'>+#define AQ_HW_MAC_COUNTER_HZ   312500000ll</div><div class='add'>+#define AQ_HW_PHY_COUNTER_HZ   160000000ll</div><div class='add'>+</div><div class='add'>+enum aq_tc_mode {</div><div class='add'>+	AQ_TC_MODE_INVALID = -1,</div><div class='add'>+	AQ_TC_MODE_8TCS,</div><div class='add'>+	AQ_TC_MODE_4TCS,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define AQ_RX_FIRST_LOC_FVLANID     0U</div><div class='add'>+#define AQ_RX_LAST_LOC_FVLANID	   15U</div><div class='add'>+#define AQ_RX_FIRST_LOC_FETHERT    16U</div><div class='add'>+#define AQ_RX_LAST_LOC_FETHERT	   31U</div><div class='add'>+#define AQ_RX_FIRST_LOC_FL3L4	   32U</div><div class='add'>+#define AQ_RX_LAST_LOC_FL3L4	   39U</div><div class='add'>+#define AQ_RX_MAX_RXNFC_LOC	   AQ_RX_LAST_LOC_FL3L4</div><div class='add'>+#define AQ_VLAN_MAX_FILTERS   \</div><div class='add'>+			(AQ_RX_LAST_LOC_FVLANID - AQ_RX_FIRST_LOC_FVLANID + 1U)</div><div class='add'>+#define AQ_RX_QUEUE_NOT_ASSIGNED   0xFFU</div><div class='add'>+</div><div class='add'>+#define AQ_FRAC_PER_NS 0x100000000LL</div><div class='add'>+</div><div class='add'>+/* Used for rate to Mbps conversion */</div><div class='add'>+#define AQ_MBPS_DIVISOR         125000 /* 1000000 / 8 */</div><div class='add'>+</div><div class='add'>+/* NIC H/W capabilities */</div><div class='add'>+struct aq_hw_caps_s {</div><div class='add'>+	u64 hw_features;</div><div class='add'>+	u64 link_speed_msk;</div><div class='add'>+	unsigned int hw_priv_flags;</div><div class='add'>+	u32 media_type;</div><div class='add'>+	u32 rxds_max;</div><div class='add'>+	u32 txds_max;</div><div class='add'>+	u32 rxds_min;</div><div class='add'>+	u32 txds_min;</div><div class='add'>+	u32 txhwb_alignment;</div><div class='add'>+	u32 irq_mask;</div><div class='add'>+	u32 vecs;</div><div class='add'>+	u32 mtu;</div><div class='add'>+	u32 mac_regs_count;</div><div class='add'>+	u32 hw_alive_check_addr;</div><div class='add'>+	u8 msix_irqs;</div><div class='add'>+	u8 tcs_max;</div><div class='add'>+	u8 rxd_alignment;</div><div class='add'>+	u8 rxd_size;</div><div class='add'>+	u8 txd_alignment;</div><div class='add'>+	u8 txd_size;</div><div class='add'>+	u8 tx_rings;</div><div class='add'>+	u8 rx_rings;</div><div class='add'>+	bool flow_control;</div><div class='add'>+	bool is_64_dma;</div><div class='add'>+	bool op64bit;</div><div class='add'>+	u32 quirks;</div><div class='add'>+	u32 priv_data_len;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct aq_hw_link_status_s {</div><div class='add'>+	unsigned int mbps;</div><div class='add'>+	bool full_duplex;</div><div class='add'>+	u32 lp_link_speed_msk;</div><div class='add'>+	u32 lp_flow_control;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct aq_stats_s {</div><div class='add'>+	u64 brc;</div><div class='add'>+	u64 btc;</div><div class='add'>+	u64 uprc;</div><div class='add'>+	u64 mprc;</div><div class='add'>+	u64 bprc;</div><div class='add'>+	u64 erpt;</div><div class='add'>+	u64 uptc;</div><div class='add'>+	u64 mptc;</div><div class='add'>+	u64 bptc;</div><div class='add'>+	u64 erpr;</div><div class='add'>+	u64 mbtc;</div><div class='add'>+	u64 bbtc;</div><div class='add'>+	u64 mbrc;</div><div class='add'>+	u64 bbrc;</div><div class='add'>+	u64 ubrc;</div><div class='add'>+	u64 ubtc;</div><div class='add'>+	u64 dpc;</div><div class='add'>+	u64 dma_pkt_rc;</div><div class='add'>+	u64 dma_pkt_tc;</div><div class='add'>+	u64 dma_oct_rc;</div><div class='add'>+	u64 dma_oct_tc;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define AQ_HW_IRQ_INVALID 0U</div><div class='add'>+#define AQ_HW_IRQ_INTX	  1U</div><div class='add'>+#define AQ_HW_IRQ_MSI     2U</div><div class='add'>+#define AQ_HW_IRQ_MSIX    3U</div><div class='add'>+</div><div class='add'>+#define AQ_HW_SERVICE_IRQS   1U</div><div class='add'>+</div><div class='add'>+#define AQ_HW_POWER_STATE_D0   0U</div><div class='add'>+#define AQ_HW_POWER_STATE_D3   3U</div><div class='add'>+</div><div class='add'>+#define	AQ_FW_WAKE_ON_LINK_RTPM BIT(10)</div><div class='add'>+</div><div class='add'>+#define AQ_HW_FLAG_STARTED     0x00000004U</div><div class='add'>+#define AQ_HW_FLAG_STOPPING    0x00000008U</div><div class='add'>+#define AQ_HW_FLAG_RESETTING   0x00000010U</div><div class='add'>+#define AQ_HW_FLAG_CLOSING     0x00000020U</div><div class='add'>+#define AQ_HW_PTP_AVAILABLE    0x01000000U</div><div class='add'>+#define AQ_HW_LINK_DOWN        0x04000000U</div><div class='add'>+#define AQ_HW_FLAG_ERR_UNPLUG  0x40000000U</div><div class='add'>+#define AQ_HW_FLAG_ERR_HW      0x80000000U</div><div class='add'>+</div><div class='add'>+#define AQ_HW_FLAG_ERRORS      (AQ_HW_FLAG_ERR_HW | AQ_HW_FLAG_ERR_UNPLUG)</div><div class='add'>+</div><div class='add'>+#define AQ_NIC_FLAGS_IS_NOT_READY (AQ_NIC_FLAG_STOPPING | \</div><div class='add'>+			AQ_NIC_FLAG_RESETTING | AQ_NIC_FLAG_CLOSING | \</div><div class='add'>+			AQ_NIC_FLAG_ERR_UNPLUG | AQ_NIC_FLAG_ERR_HW)</div><div class='add'>+</div><div class='add'>+#define AQ_NIC_FLAGS_IS_NOT_TX_READY (AQ_NIC_FLAGS_IS_NOT_READY | \</div><div class='add'>+					AQ_NIC_LINK_DOWN)</div><div class='add'>+</div><div class='add'>+#define AQ_HW_MEDIA_TYPE_TP    1U</div><div class='add'>+#define AQ_HW_MEDIA_TYPE_FIBRE 2U</div><div class='add'>+</div><div class='add'>+#define AQ_HW_TXD_MULTIPLE 8U</div><div class='add'>+#define AQ_HW_RXD_MULTIPLE 8U</div><div class='add'>+</div><div class='add'>+#define AQ_HW_QUEUES_MAX                32U</div><div class='add'>+#define AQ_HW_MULTICAST_ADDRESS_MAX     32U</div><div class='add'>+</div><div class='add'>+#define AQ_HW_PTP_TC                    2U</div><div class='add'>+</div><div class='add'>+#define AQ_HW_LED_BLINK    0x2U</div><div class='add'>+#define AQ_HW_LED_DEFAULT  0x0U</div><div class='add'>+</div><div class='add'>+#define AQ_HW_MEDIA_DETECT_CNT 6000</div><div class='add'>+</div><div class='add'>+enum aq_priv_flags {</div><div class='add'>+	AQ_HW_LOOPBACK_DMA_SYS,</div><div class='add'>+	AQ_HW_LOOPBACK_PKT_SYS,</div><div class='add'>+	AQ_HW_LOOPBACK_DMA_NET,</div><div class='add'>+	AQ_HW_LOOPBACK_PHYINT_SYS,</div><div class='add'>+	AQ_HW_LOOPBACK_PHYEXT_SYS,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define AQ_HW_LOOPBACK_MASK	(BIT(AQ_HW_LOOPBACK_DMA_SYS) |\</div><div class='add'>+				 BIT(AQ_HW_LOOPBACK_PKT_SYS) |\</div><div class='add'>+				 BIT(AQ_HW_LOOPBACK_DMA_NET) |\</div><div class='add'>+				 BIT(AQ_HW_LOOPBACK_PHYINT_SYS) |\</div><div class='add'>+				 BIT(AQ_HW_LOOPBACK_PHYEXT_SYS))</div><div class='add'>+</div><div class='add'>+#define ATL_HW_CHIP_MIPS         0x00000001U</div><div class='add'>+#define ATL_HW_CHIP_TPO2         0x00000002U</div><div class='add'>+#define ATL_HW_CHIP_RPF2         0x00000004U</div><div class='add'>+#define ATL_HW_CHIP_MPI_AQ       0x00000010U</div><div class='add'>+#define ATL_HW_CHIP_ATLANTIC     0x00800000U</div><div class='add'>+#define ATL_HW_CHIP_REVISION_A0  0x01000000U</div><div class='add'>+#define ATL_HW_CHIP_REVISION_B0  0x02000000U</div><div class='add'>+#define ATL_HW_CHIP_REVISION_B1  0x04000000U</div><div class='add'>+#define ATL_HW_CHIP_ANTIGUA      0x08000000U</div><div class='add'>+</div><div class='add'>+#define ATL_HW_IS_CHIP_FEATURE(_HW_, _F_) (!!(ATL_HW_CHIP_##_F_ &amp; \</div><div class='add'>+	(_HW_)-&gt;chip_features))</div><div class='add'>+</div><div class='add'>+struct aq_hw_s {</div><div class='add'>+	atomic_t flags;</div><div class='add'>+	u8 rbl_enabled:1;</div><div class='add'>+	struct aq_nic_cfg_s *aq_nic_cfg;</div><div class='add'>+	const struct aq_fw_ops *aq_fw_ops;</div><div class='add'>+	void __iomem *mmio;</div><div class='add'>+	struct aq_hw_link_status_s aq_link_status;</div><div class='add'>+	struct hw_atl_utils_mbox mbox;</div><div class='add'>+	struct hw_atl_stats_s last_stats;</div><div class='add'>+	struct aq_stats_s curr_stats;</div><div class='add'>+	u64 speed;</div><div class='add'>+	u32 itr_tx;</div><div class='add'>+	u32 itr_rx;</div><div class='add'>+	unsigned int chip_features;</div><div class='add'>+	u32 fw_ver_actual;</div><div class='add'>+	atomic_t dpc;</div><div class='add'>+	u32 mbox_addr;</div><div class='add'>+	u32 rpc_addr;</div><div class='add'>+	u32 settings_addr;</div><div class='add'>+	u32 rpc_tid;</div><div class='add'>+	struct hw_atl_utils_fw_rpc rpc;</div><div class='add'>+	s64 ptp_clk_offset;</div><div class='add'>+	u16 phy_id;</div><div class='add'>+	void *priv;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct aq_ring_s;</div><div class='add'>+struct aq_ring_param_s;</div><div class='add'>+struct sk_buff;</div><div class='add'>+struct aq_rx_filter_l3l4;</div><div class='add'>+</div><div class='add'>+struct aq_hw_ops {</div><div class='add'>+</div><div class='add'>+	int (*hw_ring_tx_xmit)(struct aq_hw_s *self, struct aq_ring_s *aq_ring,</div><div class='add'>+			       unsigned int frags);</div><div class='add'>+</div><div class='add'>+	int (*hw_ring_rx_receive)(struct aq_hw_s *self,</div><div class='add'>+				  struct aq_ring_s *aq_ring);</div><div class='add'>+</div><div class='add'>+	int (*hw_ring_rx_fill)(struct aq_hw_s *self, struct aq_ring_s *aq_ring,</div><div class='add'>+			       unsigned int sw_tail_old);</div><div class='add'>+</div><div class='add'>+	int (*hw_ring_tx_head_update)(struct aq_hw_s *self,</div><div class='add'>+				      struct aq_ring_s *aq_ring);</div><div class='add'>+</div><div class='add'>+	int (*hw_set_mac_address)(struct aq_hw_s *self, const u8 *mac_addr);</div><div class='add'>+</div><div class='add'>+	int (*hw_soft_reset)(struct aq_hw_s *self);</div><div class='add'>+</div><div class='add'>+	int (*hw_prepare)(struct aq_hw_s *self,</div><div class='add'>+			  const struct aq_fw_ops **fw_ops);</div><div class='add'>+</div><div class='add'>+	int (*hw_reset)(struct aq_hw_s *self);</div><div class='add'>+</div><div class='add'>+	int (*hw_init)(struct aq_hw_s *self, const u8 *mac_addr);</div><div class='add'>+</div><div class='add'>+	int (*hw_start)(struct aq_hw_s *self);</div><div class='add'>+</div><div class='add'>+	int (*hw_stop)(struct aq_hw_s *self);</div><div class='add'>+</div><div class='add'>+	int (*hw_ring_tx_init)(struct aq_hw_s *self, struct aq_ring_s *aq_ring,</div><div class='add'>+			       struct aq_ring_param_s *aq_ring_param);</div><div class='add'>+</div><div class='add'>+	int (*hw_ring_tx_start)(struct aq_hw_s *self,</div><div class='add'>+				struct aq_ring_s *aq_ring);</div><div class='add'>+</div><div class='add'>+	int (*hw_ring_tx_stop)(struct aq_hw_s *self,</div><div class='add'>+			       struct aq_ring_s *aq_ring);</div><div class='add'>+</div><div class='add'>+	int (*hw_ring_rx_init)(struct aq_hw_s *self,</div><div class='add'>+			       struct aq_ring_s *aq_ring,</div><div class='add'>+			       struct aq_ring_param_s *aq_ring_param);</div><div class='add'>+</div><div class='add'>+	int (*hw_ring_rx_start)(struct aq_hw_s *self,</div><div class='add'>+				struct aq_ring_s *aq_ring);</div><div class='add'>+</div><div class='add'>+	int (*hw_ring_rx_stop)(struct aq_hw_s *self,</div><div class='add'>+			       struct aq_ring_s *aq_ring);</div><div class='add'>+</div><div class='add'>+	int (*hw_irq_enable)(struct aq_hw_s *self, u64 mask);</div><div class='add'>+</div><div class='add'>+	int (*hw_irq_disable)(struct aq_hw_s *self, u64 mask);</div><div class='add'>+</div><div class='add'>+	int (*hw_irq_read)(struct aq_hw_s *self, u64 *mask);</div><div class='add'>+</div><div class='add'>+	int (*hw_packet_filter_set)(struct aq_hw_s *self,</div><div class='add'>+				    unsigned int packet_filter);</div><div class='add'>+</div><div class='add'>+	int (*hw_filter_l3l4_set)(struct aq_hw_s *self,</div><div class='add'>+				  struct aq_rx_filter_l3l4 *data);</div><div class='add'>+</div><div class='add'>+	int (*hw_filter_l3l4_clear)(struct aq_hw_s *self,</div><div class='add'>+				    struct aq_rx_filter_l3l4 *data);</div><div class='add'>+</div><div class='add'>+	int (*hw_filter_l2_set)(struct aq_hw_s *self,</div><div class='add'>+				struct aq_rx_filter_l2 *data);</div><div class='add'>+</div><div class='add'>+	int (*hw_filter_l2_clear)(struct aq_hw_s *self,</div><div class='add'>+				  struct aq_rx_filter_l2 *data);</div><div class='add'>+</div><div class='add'>+	int (*hw_filter_vlan_set)(struct aq_hw_s *self,</div><div class='add'>+				  struct aq_rx_filter_vlan *aq_vlans);</div><div class='add'>+</div><div class='add'>+	int (*hw_filter_vlan_ctrl)(struct aq_hw_s *self, bool enable);</div><div class='add'>+</div><div class='add'>+	int (*hw_multicast_list_set)(struct aq_hw_s *self,</div><div class='add'>+				     u8 ar_mac[AQ_HW_MULTICAST_ADDRESS_MAX]</div><div class='add'>+				     [ETH_ALEN],</div><div class='add'>+				     u32 count);</div><div class='add'>+</div><div class='add'>+	int (*hw_interrupt_moderation_set)(struct aq_hw_s *self);</div><div class='add'>+</div><div class='add'>+	int (*hw_rss_set)(struct aq_hw_s *self,</div><div class='add'>+			  struct aq_rss_parameters *rss_params);</div><div class='add'>+</div><div class='add'>+	int (*hw_rss_hash_set)(struct aq_hw_s *self,</div><div class='add'>+			       struct aq_rss_parameters *rss_params);</div><div class='add'>+</div><div class='add'>+	int (*hw_tc_rate_limit_set)(struct aq_hw_s *self);</div><div class='add'>+</div><div class='add'>+	int (*hw_get_regs)(struct aq_hw_s *self,</div><div class='add'>+			   const struct aq_hw_caps_s *aq_hw_caps,</div><div class='add'>+			   u32 *regs_buff);</div><div class='add'>+</div><div class='add'>+	struct aq_stats_s *(*hw_get_hw_stats)(struct aq_hw_s *self);</div><div class='add'>+</div><div class='add'>+	u32 (*hw_get_fw_version)(struct aq_hw_s *self);</div><div class='add'>+</div><div class='add'>+	int (*hw_set_offload)(struct aq_hw_s *self,</div><div class='add'>+			      struct aq_nic_cfg_s *aq_nic_cfg);</div><div class='add'>+</div><div class='add'>+	int (*hw_ring_hwts_rx_fill)(struct aq_hw_s *self,</div><div class='add'>+				    struct aq_ring_s *aq_ring);</div><div class='add'>+</div><div class='add'>+	int (*hw_ring_hwts_rx_receive)(struct aq_hw_s *self,</div><div class='add'>+				       struct aq_ring_s *ring);</div><div class='add'>+</div><div class='add'>+	void (*hw_get_ptp_ts)(struct aq_hw_s *self, u64 *stamp);</div><div class='add'>+</div><div class='add'>+	int (*hw_adj_clock_freq)(struct aq_hw_s *self, s32 delta);</div><div class='add'>+</div><div class='add'>+	int (*hw_adj_sys_clock)(struct aq_hw_s *self, s64 delta);</div><div class='add'>+</div><div class='add'>+	int (*hw_set_sys_clock)(struct aq_hw_s *self, u64 time, u64 ts);</div><div class='add'>+</div><div class='add'>+	int (*hw_ts_to_sys_clock)(struct aq_hw_s *self, u64 ts, u64 *time);</div><div class='add'>+</div><div class='add'>+	int (*hw_gpio_pulse)(struct aq_hw_s *self, u32 index, u64 start,</div><div class='add'>+			     u32 period);</div><div class='add'>+</div><div class='add'>+	int (*hw_extts_gpio_enable)(struct aq_hw_s *self, u32 index,</div><div class='add'>+				    u32 enable);</div><div class='add'>+</div><div class='add'>+	int (*hw_get_sync_ts)(struct aq_hw_s *self, u64 *ts);</div><div class='add'>+</div><div class='add'>+	u16 (*rx_extract_ts)(struct aq_hw_s *self, u8 *p, unsigned int len,</div><div class='add'>+			     u64 *timestamp);</div><div class='add'>+</div><div class='add'>+	int (*extract_hwts)(struct aq_hw_s *self, u8 *p, unsigned int len,</div><div class='add'>+			    u64 *timestamp);</div><div class='add'>+</div><div class='add'>+	int (*hw_set_fc)(struct aq_hw_s *self, u32 fc, u32 tc);</div><div class='add'>+</div><div class='add'>+	int (*hw_set_loopback)(struct aq_hw_s *self, u32 mode, bool enable);</div><div class='add'>+</div><div class='add'>+	int (*hw_get_mac_temp)(struct aq_hw_s *self, u32 *temp);</div><div class='add'>+</div><div class='add'>+	int (*hw_read_module_eeprom)(struct aq_hw_s *self, u8 dev_addr,</div><div class='add'>+				     u8 reg_start_addr, int len, u8 *data);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct aq_fw_ops {</div><div class='add'>+	int (*init)(struct aq_hw_s *self);</div><div class='add'>+</div><div class='add'>+	int (*deinit)(struct aq_hw_s *self);</div><div class='add'>+</div><div class='add'>+	int (*reset)(struct aq_hw_s *self);</div><div class='add'>+</div><div class='add'>+	int (*renegotiate)(struct aq_hw_s *self);</div><div class='add'>+</div><div class='add'>+	int (*get_mac_permanent)(struct aq_hw_s *self, u8 *mac);</div><div class='add'>+</div><div class='add'>+	int (*set_link_speed)(struct aq_hw_s *self, u32 speed);</div><div class='add'>+</div><div class='add'>+	int (*set_state)(struct aq_hw_s *self,</div><div class='add'>+			 enum hal_atl_utils_fw_state_e state);</div><div class='add'>+</div><div class='add'>+	int (*update_link_status)(struct aq_hw_s *self);</div><div class='add'>+</div><div class='add'>+	int (*update_stats)(struct aq_hw_s *self);</div><div class='add'>+</div><div class='add'>+	int (*get_mac_temp)(struct aq_hw_s *self, int *temp);</div><div class='add'>+</div><div class='add'>+	int (*get_phy_temp)(struct aq_hw_s *self, int *temp);</div><div class='add'>+</div><div class='add'>+	u32 (*get_flow_control)(struct aq_hw_s *self, u32 *fcmode);</div><div class='add'>+</div><div class='add'>+	int (*set_flow_control)(struct aq_hw_s *self);</div><div class='add'>+</div><div class='add'>+	int (*led_control)(struct aq_hw_s *self, u32 mode);</div><div class='add'>+</div><div class='add'>+	int (*set_phyloopback)(struct aq_hw_s *self, u32 mode, bool enable);</div><div class='add'>+</div><div class='add'>+	int (*set_power)(struct aq_hw_s *self, unsigned int power_state,</div><div class='add'>+			 const u8 *mac);</div><div class='add'>+</div><div class='add'>+	int (*send_fw_request)(struct aq_hw_s *self,</div><div class='add'>+			       const struct hw_fw_request_iface *fw_req,</div><div class='add'>+			       size_t size);</div><div class='add'>+</div><div class='add'>+	void (*enable_ptp)(struct aq_hw_s *self, int enable);</div><div class='add'>+</div><div class='add'>+	void (*adjust_ptp)(struct aq_hw_s *self, uint64_t adj);</div><div class='add'>+</div><div class='add'>+	int (*set_eee_rate)(struct aq_hw_s *self, u32 speed);</div><div class='add'>+</div><div class='add'>+	int (*get_eee_rate)(struct aq_hw_s *self, u32 *rate,</div><div class='add'>+			    u32 *supported_rates);</div><div class='add'>+</div><div class='add'>+	int (*set_downshift)(struct aq_hw_s *self, u32 counter);</div><div class='add'>+</div><div class='add'>+	int (*set_media_detect)(struct aq_hw_s *self, bool enable);</div><div class='add'>+</div><div class='add'>+	u32 (*get_link_capabilities)(struct aq_hw_s *self);</div><div class='add'>+</div><div class='add'>+	int (*send_macsec_req)(struct aq_hw_s *self,</div><div class='add'>+			       struct macsec_msg_fw_request *msg,</div><div class='add'>+			       struct macsec_msg_fw_response *resp);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif /* AQ_HW_H */</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.c b/drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.c<br/>new file mode 100644<br/>index 000000000000..18b08277d2e1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.c</a></div><div class='hunk'>@@ -0,0 +1,147 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2014-2019 aQuantia Corporation</div><div class='add'>+ * Copyright (C) 2019-2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* File aq_hw_utils.c: Definitions of helper functions used across</div><div class='add'>+ * hardware layer.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "aq_hw_utils.h"</div><div class='add'>+</div><div class='add'>+#include &lt;linux/io-64-nonatomic-lo-hi.h&gt;</div><div class='add'>+</div><div class='add'>+#include "aq_hw.h"</div><div class='add'>+#include "aq_nic.h"</div><div class='add'>+#include "hw_atl/hw_atl_llh.h"</div><div class='add'>+</div><div class='add'>+void aq_hw_write_reg_bit(struct aq_hw_s *aq_hw, u32 addr, u32 msk,</div><div class='add'>+			 u32 shift, u32 val)</div><div class='add'>+{</div><div class='add'>+	if (msk ^ ~0) {</div><div class='add'>+		u32 reg_old, reg_new;</div><div class='add'>+</div><div class='add'>+		reg_old = aq_hw_read_reg(aq_hw, addr);</div><div class='add'>+		reg_new = (reg_old &amp; (~msk)) | (val &lt;&lt; shift);</div><div class='add'>+</div><div class='add'>+		if (reg_old != reg_new)</div><div class='add'>+			aq_hw_write_reg(aq_hw, addr, reg_new);</div><div class='add'>+	} else {</div><div class='add'>+		aq_hw_write_reg(aq_hw, addr, val);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 aq_hw_read_reg_bit(struct aq_hw_s *aq_hw, u32 addr, u32 msk, u32 shift)</div><div class='add'>+{</div><div class='add'>+	return ((aq_hw_read_reg(aq_hw, addr) &amp; msk) &gt;&gt; shift);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 aq_hw_read_reg(struct aq_hw_s *hw, u32 reg)</div><div class='add'>+{</div><div class='add'>+	u32 value = readl(hw-&gt;mmio + reg);</div><div class='add'>+</div><div class='add'>+	if (value == U32_MAX &amp;&amp;</div><div class='add'>+	    readl(hw-&gt;mmio + hw-&gt;aq_nic_cfg-&gt;aq_hw_caps-&gt;hw_alive_check_addr) == U32_MAX)</div><div class='add'>+		aq_utils_obj_set(&amp;hw-&gt;flags, AQ_HW_FLAG_ERR_UNPLUG);</div><div class='add'>+</div><div class='add'>+	return value;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void aq_hw_write_reg(struct aq_hw_s *hw, u32 reg, u32 value)</div><div class='add'>+{</div><div class='add'>+	writel(value, hw-&gt;mmio + reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Most of 64-bit registers are in LSW, MSW form.</div><div class='add'>+   Counters are normally implemented by HW as latched pairs:</div><div class='add'>+   reading LSW first locks MSW, to overcome LSW overflow</div><div class='add'>+ */</div><div class='add'>+u64 aq_hw_read_reg64(struct aq_hw_s *hw, u32 reg)</div><div class='add'>+{</div><div class='add'>+	u64 value = U64_MAX;</div><div class='add'>+</div><div class='add'>+	if (hw-&gt;aq_nic_cfg-&gt;aq_hw_caps-&gt;op64bit)</div><div class='add'>+		value = readq(hw-&gt;mmio + reg);</div><div class='add'>+	else</div><div class='add'>+		value = lo_hi_readq(hw-&gt;mmio + reg);</div><div class='add'>+</div><div class='add'>+	if (value == U64_MAX &amp;&amp;</div><div class='add'>+	    readl(hw-&gt;mmio + hw-&gt;aq_nic_cfg-&gt;aq_hw_caps-&gt;hw_alive_check_addr) == U32_MAX)</div><div class='add'>+		aq_utils_obj_set(&amp;hw-&gt;flags, AQ_HW_FLAG_ERR_UNPLUG);</div><div class='add'>+</div><div class='add'>+	return value;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void aq_hw_write_reg64(struct aq_hw_s *hw, u32 reg, u64 value)</div><div class='add'>+{</div><div class='add'>+	if (hw-&gt;aq_nic_cfg-&gt;aq_hw_caps-&gt;op64bit)</div><div class='add'>+		writeq(value, hw-&gt;mmio + reg);</div><div class='add'>+	else</div><div class='add'>+		lo_hi_writeq(value, hw-&gt;mmio + reg);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_hw_invalidate_descriptor_cache(struct aq_hw_s *hw)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	/* Invalidate Descriptor Cache to prevent writing to the cached</div><div class='add'>+	 * descriptors and to the data pointer of those descriptors</div><div class='add'>+	 */</div><div class='add'>+	hw_atl_rdm_rx_dma_desc_cache_init_tgl(hw);</div><div class='add'>+</div><div class='add'>+	err = aq_hw_err_from_flags(hw);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	readx_poll_timeout_atomic(hw_atl_rdm_rx_dma_desc_cache_init_done_get,</div><div class='add'>+				  hw, val, val == 1, 1000U, 10000U);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_hw_err_from_flags(struct aq_hw_s *hw)</div><div class='add'>+{</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (aq_utils_obj_test(&amp;hw-&gt;flags, AQ_HW_FLAG_ERR_UNPLUG)) {</div><div class='add'>+		err = -ENXIO;</div><div class='add'>+		goto err_exit;</div><div class='add'>+	}</div><div class='add'>+	if (aq_utils_obj_test(&amp;hw-&gt;flags, AQ_HW_FLAG_ERR_HW)) {</div><div class='add'>+		err = -EIO;</div><div class='add'>+		goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_hw_num_tcs(struct aq_hw_s *hw)</div><div class='add'>+{</div><div class='add'>+	switch (hw-&gt;aq_nic_cfg-&gt;tc_mode) {</div><div class='add'>+	case AQ_TC_MODE_8TCS:</div><div class='add'>+		return 8;</div><div class='add'>+	case AQ_TC_MODE_4TCS:</div><div class='add'>+		return 4;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_hw_q_per_tc(struct aq_hw_s *hw)</div><div class='add'>+{</div><div class='add'>+	switch (hw-&gt;aq_nic_cfg-&gt;tc_mode) {</div><div class='add'>+	case AQ_TC_MODE_8TCS:</div><div class='add'>+		return 4;</div><div class='add'>+	case AQ_TC_MODE_4TCS:</div><div class='add'>+		return 8;</div><div class='add'>+	default:</div><div class='add'>+		return 4;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.h b/drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.h<br/>new file mode 100644<br/>index 000000000000..d89c63d88e4a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.h</a></div><div class='hunk'>@@ -0,0 +1,43 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2014-2019 aQuantia Corporation</div><div class='add'>+ * Copyright (C) 2019-2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* File aq_hw_utils.h: Declaration of helper functions used across hardware</div><div class='add'>+ * layer.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef AQ_HW_UTILS_H</div><div class='add'>+#define AQ_HW_UTILS_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/iopoll.h&gt;</div><div class='add'>+</div><div class='add'>+#include "aq_common.h"</div><div class='add'>+</div><div class='add'>+#ifndef HIDWORD</div><div class='add'>+#define LODWORD(_qw)    ((u32)(_qw))</div><div class='add'>+#define HIDWORD(_qw)    ((u32)(((_qw) &gt;&gt; 32) &amp; 0xffffffff))</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#define AQ_HW_SLEEP(_US_) mdelay(_US_)</div><div class='add'>+</div><div class='add'>+#define aq_pr_err(...) pr_err(AQ_CFG_DRV_NAME ": " __VA_ARGS__)</div><div class='add'>+#define aq_pr_trace(...) pr_info(AQ_CFG_DRV_NAME ": " __VA_ARGS__)</div><div class='add'>+</div><div class='add'>+struct aq_hw_s;</div><div class='add'>+</div><div class='add'>+void aq_hw_write_reg_bit(struct aq_hw_s *aq_hw, u32 addr, u32 msk,</div><div class='add'>+			 u32 shift, u32 val);</div><div class='add'>+u32 aq_hw_read_reg_bit(struct aq_hw_s *aq_hw, u32 addr, u32 msk, u32 shift);</div><div class='add'>+u32 aq_hw_read_reg(struct aq_hw_s *hw, u32 reg);</div><div class='add'>+void aq_hw_write_reg(struct aq_hw_s *hw, u32 reg, u32 value);</div><div class='add'>+u64 aq_hw_read_reg64(struct aq_hw_s *hw, u32 reg);</div><div class='add'>+void aq_hw_write_reg64(struct aq_hw_s *hw, u32 reg, u64 value);</div><div class='add'>+int aq_hw_invalidate_descriptor_cache(struct aq_hw_s *hw);</div><div class='add'>+int aq_hw_err_from_flags(struct aq_hw_s *hw);</div><div class='add'>+int aq_hw_num_tcs(struct aq_hw_s *hw);</div><div class='add'>+int aq_hw_q_per_tc(struct aq_hw_s *hw);</div><div class='add'>+</div><div class='add'>+#endif /* AQ_HW_UTILS_H */</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_macsec.c b/drivers/net/ethernet/aquantia/atlantic/aq_macsec.c<br/>new file mode 100644<br/>index 000000000000..6afff8af5e86<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_macsec.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_macsec.c</a></div><div class='hunk'>@@ -0,0 +1,1770 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ * Copyright (C) 2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "aq_macsec.h"</div><div class='add'>+#include "aq_nic.h"</div><div class='add'>+#include &lt;linux/rtnetlink.h&gt;</div><div class='add'>+</div><div class='add'>+#include "macsec/macsec_api.h"</div><div class='add'>+#define AQ_MACSEC_KEY_LEN_128_BIT 16</div><div class='add'>+#define AQ_MACSEC_KEY_LEN_192_BIT 24</div><div class='add'>+#define AQ_MACSEC_KEY_LEN_256_BIT 32</div><div class='add'>+</div><div class='add'>+enum aq_clear_type {</div><div class='add'>+	/* update HW configuration */</div><div class='add'>+	AQ_CLEAR_HW = BIT(0),</div><div class='add'>+	/* update SW configuration (busy bits, pointers) */</div><div class='add'>+	AQ_CLEAR_SW = BIT(1),</div><div class='add'>+	/* update both HW and SW configuration */</div><div class='add'>+	AQ_CLEAR_ALL = AQ_CLEAR_HW | AQ_CLEAR_SW,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int aq_clear_txsc(struct aq_nic_s *nic, const int txsc_idx,</div><div class='add'>+			 enum aq_clear_type clear_type);</div><div class='add'>+static int aq_clear_txsa(struct aq_nic_s *nic, struct aq_macsec_txsc *aq_txsc,</div><div class='add'>+			 const int sa_num, enum aq_clear_type clear_type);</div><div class='add'>+static int aq_clear_rxsc(struct aq_nic_s *nic, const int rxsc_idx,</div><div class='add'>+			 enum aq_clear_type clear_type);</div><div class='add'>+static int aq_clear_rxsa(struct aq_nic_s *nic, struct aq_macsec_rxsc *aq_rxsc,</div><div class='add'>+			 const int sa_num, enum aq_clear_type clear_type);</div><div class='add'>+static int aq_clear_secy(struct aq_nic_s *nic, const struct macsec_secy *secy,</div><div class='add'>+			 enum aq_clear_type clear_type);</div><div class='add'>+static int aq_apply_macsec_cfg(struct aq_nic_s *nic);</div><div class='add'>+static int aq_apply_secy_cfg(struct aq_nic_s *nic,</div><div class='add'>+			     const struct macsec_secy *secy);</div><div class='add'>+</div><div class='add'>+static void aq_ether_addr_to_mac(u32 mac[2], const unsigned char *emac)</div><div class='add'>+{</div><div class='add'>+	u32 tmp[2] = { 0 };</div><div class='add'>+</div><div class='add'>+	memcpy(((u8 *)tmp) + 2, emac, ETH_ALEN);</div><div class='add'>+</div><div class='add'>+	mac[0] = swab32(tmp[1]);</div><div class='add'>+	mac[1] = swab32(tmp[0]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* There's a 1:1 mapping between SecY and TX SC */</div><div class='add'>+static int aq_get_txsc_idx_from_secy(struct aq_macsec_cfg *macsec_cfg,</div><div class='add'>+				     const struct macsec_secy *secy)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (unlikely(!secy))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; AQ_MACSEC_MAX_SC; i++) {</div><div class='add'>+		if (macsec_cfg-&gt;aq_txsc[i].sw_secy == secy)</div><div class='add'>+			return i;</div><div class='add'>+	}</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_get_rxsc_idx_from_rxsc(struct aq_macsec_cfg *macsec_cfg,</div><div class='add'>+				     const struct macsec_rx_sc *rxsc)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (unlikely(!rxsc))</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; AQ_MACSEC_MAX_SC; i++) {</div><div class='add'>+		if (macsec_cfg-&gt;aq_rxsc[i].sw_rxsc == rxsc)</div><div class='add'>+			return i;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_get_txsc_idx_from_sc_idx(const enum aq_macsec_sc_sa sc_sa,</div><div class='add'>+				       const int sc_idx)</div><div class='add'>+{</div><div class='add'>+	switch (sc_sa) {</div><div class='add'>+	case aq_macsec_sa_sc_4sa_8sc:</div><div class='add'>+		return sc_idx &gt;&gt; 2;</div><div class='add'>+	case aq_macsec_sa_sc_2sa_16sc:</div><div class='add'>+		return sc_idx &gt;&gt; 1;</div><div class='add'>+	case aq_macsec_sa_sc_1sa_32sc:</div><div class='add'>+		return sc_idx;</div><div class='add'>+	default:</div><div class='add'>+		WARN_ONCE(true, "Invalid sc_sa");</div><div class='add'>+	}</div><div class='add'>+	return -1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Rotate keys u32[8] */</div><div class='add'>+static void aq_rotate_keys(u32 (*key)[8], const int key_len)</div><div class='add'>+{</div><div class='add'>+	u32 tmp[8] = { 0 };</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;tmp, key, sizeof(tmp));</div><div class='add'>+	memset(*key, 0, sizeof(*key));</div><div class='add'>+</div><div class='add'>+	if (key_len == AQ_MACSEC_KEY_LEN_128_BIT) {</div><div class='add'>+		(*key)[0] = swab32(tmp[3]);</div><div class='add'>+		(*key)[1] = swab32(tmp[2]);</div><div class='add'>+		(*key)[2] = swab32(tmp[1]);</div><div class='add'>+		(*key)[3] = swab32(tmp[0]);</div><div class='add'>+	} else if (key_len == AQ_MACSEC_KEY_LEN_192_BIT) {</div><div class='add'>+		(*key)[0] = swab32(tmp[5]);</div><div class='add'>+		(*key)[1] = swab32(tmp[4]);</div><div class='add'>+		(*key)[2] = swab32(tmp[3]);</div><div class='add'>+		(*key)[3] = swab32(tmp[2]);</div><div class='add'>+		(*key)[4] = swab32(tmp[1]);</div><div class='add'>+		(*key)[5] = swab32(tmp[0]);</div><div class='add'>+	} else if (key_len == AQ_MACSEC_KEY_LEN_256_BIT) {</div><div class='add'>+		(*key)[0] = swab32(tmp[7]);</div><div class='add'>+		(*key)[1] = swab32(tmp[6]);</div><div class='add'>+		(*key)[2] = swab32(tmp[5]);</div><div class='add'>+		(*key)[3] = swab32(tmp[4]);</div><div class='add'>+		(*key)[4] = swab32(tmp[3]);</div><div class='add'>+		(*key)[5] = swab32(tmp[2]);</div><div class='add'>+		(*key)[6] = swab32(tmp[1]);</div><div class='add'>+		(*key)[7] = swab32(tmp[0]);</div><div class='add'>+	} else {</div><div class='add'>+		pr_warn("Rotate_keys: invalid key_len\n");</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define STATS_2x32_TO_64(stat_field)                                           \</div><div class='add'>+	(((u64)stat_field[1] &lt;&lt; 32) | stat_field[0])</div><div class='add'>+</div><div class='add'>+static int aq_get_macsec_common_stats(struct aq_hw_s *hw,</div><div class='add'>+				      struct aq_macsec_common_stats *stats)</div><div class='add'>+{</div><div class='add'>+	struct aq_mss_ingress_common_counters ingress_counters;</div><div class='add'>+	struct aq_mss_egress_common_counters egress_counters;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	/* MACSEC counters */</div><div class='add'>+	ret = aq_mss_get_ingress_common_counters(hw, &amp;ingress_counters);</div><div class='add'>+	if (unlikely(ret))</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	stats-&gt;in.ctl_pkts = STATS_2x32_TO_64(ingress_counters.ctl_pkts);</div><div class='add'>+	stats-&gt;in.tagged_miss_pkts =</div><div class='add'>+		STATS_2x32_TO_64(ingress_counters.tagged_miss_pkts);</div><div class='add'>+	stats-&gt;in.untagged_miss_pkts =</div><div class='add'>+		STATS_2x32_TO_64(ingress_counters.untagged_miss_pkts);</div><div class='add'>+	stats-&gt;in.notag_pkts = STATS_2x32_TO_64(ingress_counters.notag_pkts);</div><div class='add'>+	stats-&gt;in.untagged_pkts =</div><div class='add'>+		STATS_2x32_TO_64(ingress_counters.untagged_pkts);</div><div class='add'>+	stats-&gt;in.bad_tag_pkts =</div><div class='add'>+		STATS_2x32_TO_64(ingress_counters.bad_tag_pkts);</div><div class='add'>+	stats-&gt;in.no_sci_pkts = STATS_2x32_TO_64(ingress_counters.no_sci_pkts);</div><div class='add'>+	stats-&gt;in.unknown_sci_pkts =</div><div class='add'>+		STATS_2x32_TO_64(ingress_counters.unknown_sci_pkts);</div><div class='add'>+	stats-&gt;in.ctrl_prt_pass_pkts =</div><div class='add'>+		STATS_2x32_TO_64(ingress_counters.ctrl_prt_pass_pkts);</div><div class='add'>+	stats-&gt;in.unctrl_prt_pass_pkts =</div><div class='add'>+		STATS_2x32_TO_64(ingress_counters.unctrl_prt_pass_pkts);</div><div class='add'>+	stats-&gt;in.ctrl_prt_fail_pkts =</div><div class='add'>+		STATS_2x32_TO_64(ingress_counters.ctrl_prt_fail_pkts);</div><div class='add'>+	stats-&gt;in.unctrl_prt_fail_pkts =</div><div class='add'>+		STATS_2x32_TO_64(ingress_counters.unctrl_prt_fail_pkts);</div><div class='add'>+	stats-&gt;in.too_long_pkts =</div><div class='add'>+		STATS_2x32_TO_64(ingress_counters.too_long_pkts);</div><div class='add'>+	stats-&gt;in.igpoc_ctl_pkts =</div><div class='add'>+		STATS_2x32_TO_64(ingress_counters.igpoc_ctl_pkts);</div><div class='add'>+	stats-&gt;in.ecc_error_pkts =</div><div class='add'>+		STATS_2x32_TO_64(ingress_counters.ecc_error_pkts);</div><div class='add'>+	stats-&gt;in.unctrl_hit_drop_redir =</div><div class='add'>+		STATS_2x32_TO_64(ingress_counters.unctrl_hit_drop_redir);</div><div class='add'>+</div><div class='add'>+	ret = aq_mss_get_egress_common_counters(hw, &amp;egress_counters);</div><div class='add'>+	if (unlikely(ret))</div><div class='add'>+		return ret;</div><div class='add'>+	stats-&gt;out.ctl_pkts = STATS_2x32_TO_64(egress_counters.ctl_pkt);</div><div class='add'>+	stats-&gt;out.unknown_sa_pkts =</div><div class='add'>+		STATS_2x32_TO_64(egress_counters.unknown_sa_pkts);</div><div class='add'>+	stats-&gt;out.untagged_pkts =</div><div class='add'>+		STATS_2x32_TO_64(egress_counters.untagged_pkts);</div><div class='add'>+	stats-&gt;out.too_long = STATS_2x32_TO_64(egress_counters.too_long);</div><div class='add'>+	stats-&gt;out.ecc_error_pkts =</div><div class='add'>+		STATS_2x32_TO_64(egress_counters.ecc_error_pkts);</div><div class='add'>+	stats-&gt;out.unctrl_hit_drop_redir =</div><div class='add'>+		STATS_2x32_TO_64(egress_counters.unctrl_hit_drop_redir);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_get_rxsa_stats(struct aq_hw_s *hw, const int sa_idx,</div><div class='add'>+			     struct aq_macsec_rx_sa_stats *stats)</div><div class='add'>+{</div><div class='add'>+	struct aq_mss_ingress_sa_counters i_sa_counters;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = aq_mss_get_ingress_sa_counters(hw, &amp;i_sa_counters, sa_idx);</div><div class='add'>+	if (unlikely(ret))</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	stats-&gt;untagged_hit_pkts =</div><div class='add'>+		STATS_2x32_TO_64(i_sa_counters.untagged_hit_pkts);</div><div class='add'>+	stats-&gt;ctrl_hit_drop_redir_pkts =</div><div class='add'>+		STATS_2x32_TO_64(i_sa_counters.ctrl_hit_drop_redir_pkts);</div><div class='add'>+	stats-&gt;not_using_sa = STATS_2x32_TO_64(i_sa_counters.not_using_sa);</div><div class='add'>+	stats-&gt;unused_sa = STATS_2x32_TO_64(i_sa_counters.unused_sa);</div><div class='add'>+	stats-&gt;not_valid_pkts = STATS_2x32_TO_64(i_sa_counters.not_valid_pkts);</div><div class='add'>+	stats-&gt;invalid_pkts = STATS_2x32_TO_64(i_sa_counters.invalid_pkts);</div><div class='add'>+	stats-&gt;ok_pkts = STATS_2x32_TO_64(i_sa_counters.ok_pkts);</div><div class='add'>+	stats-&gt;late_pkts = STATS_2x32_TO_64(i_sa_counters.late_pkts);</div><div class='add'>+	stats-&gt;delayed_pkts = STATS_2x32_TO_64(i_sa_counters.delayed_pkts);</div><div class='add'>+	stats-&gt;unchecked_pkts = STATS_2x32_TO_64(i_sa_counters.unchecked_pkts);</div><div class='add'>+	stats-&gt;validated_octets =</div><div class='add'>+		STATS_2x32_TO_64(i_sa_counters.validated_octets);</div><div class='add'>+	stats-&gt;decrypted_octets =</div><div class='add'>+		STATS_2x32_TO_64(i_sa_counters.decrypted_octets);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_get_txsa_stats(struct aq_hw_s *hw, const int sa_idx,</div><div class='add'>+			     struct aq_macsec_tx_sa_stats *stats)</div><div class='add'>+{</div><div class='add'>+	struct aq_mss_egress_sa_counters e_sa_counters;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = aq_mss_get_egress_sa_counters(hw, &amp;e_sa_counters, sa_idx);</div><div class='add'>+	if (unlikely(ret))</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	stats-&gt;sa_hit_drop_redirect =</div><div class='add'>+		STATS_2x32_TO_64(e_sa_counters.sa_hit_drop_redirect);</div><div class='add'>+	stats-&gt;sa_protected2_pkts =</div><div class='add'>+		STATS_2x32_TO_64(e_sa_counters.sa_protected2_pkts);</div><div class='add'>+	stats-&gt;sa_protected_pkts =</div><div class='add'>+		STATS_2x32_TO_64(e_sa_counters.sa_protected_pkts);</div><div class='add'>+	stats-&gt;sa_encrypted_pkts =</div><div class='add'>+		STATS_2x32_TO_64(e_sa_counters.sa_encrypted_pkts);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_get_txsa_next_pn(struct aq_hw_s *hw, const int sa_idx, u32 *pn)</div><div class='add'>+{</div><div class='add'>+	struct aq_mss_egress_sa_record sa_rec;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = aq_mss_get_egress_sa_record(hw, &amp;sa_rec, sa_idx);</div><div class='add'>+	if (likely(!ret))</div><div class='add'>+		*pn = sa_rec.next_pn;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_get_rxsa_next_pn(struct aq_hw_s *hw, const int sa_idx, u32 *pn)</div><div class='add'>+{</div><div class='add'>+	struct aq_mss_ingress_sa_record sa_rec;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = aq_mss_get_ingress_sa_record(hw, &amp;sa_rec, sa_idx);</div><div class='add'>+	if (likely(!ret))</div><div class='add'>+		*pn = (!sa_rec.sat_nextpn) ? sa_rec.next_pn : 0;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_get_txsc_stats(struct aq_hw_s *hw, const int sc_idx,</div><div class='add'>+			     struct aq_macsec_tx_sc_stats *stats)</div><div class='add'>+{</div><div class='add'>+	struct aq_mss_egress_sc_counters e_sc_counters;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	ret = aq_mss_get_egress_sc_counters(hw, &amp;e_sc_counters, sc_idx);</div><div class='add'>+	if (unlikely(ret))</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	stats-&gt;sc_protected_pkts =</div><div class='add'>+		STATS_2x32_TO_64(e_sc_counters.sc_protected_pkts);</div><div class='add'>+	stats-&gt;sc_encrypted_pkts =</div><div class='add'>+		STATS_2x32_TO_64(e_sc_counters.sc_encrypted_pkts);</div><div class='add'>+	stats-&gt;sc_protected_octets =</div><div class='add'>+		STATS_2x32_TO_64(e_sc_counters.sc_protected_octets);</div><div class='add'>+	stats-&gt;sc_encrypted_octets =</div><div class='add'>+		STATS_2x32_TO_64(e_sc_counters.sc_encrypted_octets);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_mdo_dev_open(struct macsec_context *ctx)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *nic = macsec_netdev_priv(ctx-&gt;netdev);</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (netif_carrier_ok(nic-&gt;ndev))</div><div class='add'>+		ret = aq_apply_secy_cfg(nic, ctx-&gt;secy);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_mdo_dev_stop(struct macsec_context *ctx)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *nic = macsec_netdev_priv(ctx-&gt;netdev);</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; AQ_MACSEC_MAX_SC; i++) {</div><div class='add'>+		if (nic-&gt;macsec_cfg-&gt;txsc_idx_busy &amp; BIT(i))</div><div class='add'>+			aq_clear_secy(nic, nic-&gt;macsec_cfg-&gt;aq_txsc[i].sw_secy,</div><div class='add'>+				      AQ_CLEAR_HW);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_set_txsc(struct aq_nic_s *nic, const int txsc_idx)</div><div class='add'>+{</div><div class='add'>+	struct aq_macsec_txsc *aq_txsc = &amp;nic-&gt;macsec_cfg-&gt;aq_txsc[txsc_idx];</div><div class='add'>+	struct aq_mss_egress_class_record tx_class_rec = { 0 };</div><div class='add'>+	const struct macsec_secy *secy = aq_txsc-&gt;sw_secy;</div><div class='add'>+	struct aq_mss_egress_sc_record sc_rec = { 0 };</div><div class='add'>+	unsigned int sc_idx = aq_txsc-&gt;hw_sc_idx;</div><div class='add'>+	struct aq_hw_s *hw = nic-&gt;aq_hw;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	aq_ether_addr_to_mac(tx_class_rec.mac_sa, secy-&gt;netdev-&gt;dev_addr);</div><div class='add'>+</div><div class='add'>+	put_unaligned_be64((__force u64)secy-&gt;sci, tx_class_rec.sci);</div><div class='add'>+	tx_class_rec.sci_mask = 0;</div><div class='add'>+</div><div class='add'>+	tx_class_rec.sa_mask = 0x3f;</div><div class='add'>+</div><div class='add'>+	tx_class_rec.action = 0; /* forward to SA/SC table */</div><div class='add'>+	tx_class_rec.valid = 1;</div><div class='add'>+</div><div class='add'>+	tx_class_rec.sc_idx = sc_idx;</div><div class='add'>+</div><div class='add'>+	tx_class_rec.sc_sa = nic-&gt;macsec_cfg-&gt;sc_sa;</div><div class='add'>+</div><div class='add'>+	ret = aq_mss_set_egress_class_record(hw, &amp;tx_class_rec, txsc_idx);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	sc_rec.protect = secy-&gt;protect_frames;</div><div class='add'>+	if (secy-&gt;tx_sc.encrypt)</div><div class='add'>+		sc_rec.tci |= BIT(1);</div><div class='add'>+	if (secy-&gt;tx_sc.scb)</div><div class='add'>+		sc_rec.tci |= BIT(2);</div><div class='add'>+	if (secy-&gt;tx_sc.send_sci)</div><div class='add'>+		sc_rec.tci |= BIT(3);</div><div class='add'>+	if (secy-&gt;tx_sc.end_station)</div><div class='add'>+		sc_rec.tci |= BIT(4);</div><div class='add'>+	/* The C bit is clear if and only if the Secure Data is</div><div class='add'>+	 * exactly the same as the User Data and the ICV is 16 octets long.</div><div class='add'>+	 */</div><div class='add'>+	if (!(secy-&gt;icv_len == 16 &amp;&amp; !secy-&gt;tx_sc.encrypt))</div><div class='add'>+		sc_rec.tci |= BIT(0);</div><div class='add'>+</div><div class='add'>+	sc_rec.an_roll = 0;</div><div class='add'>+</div><div class='add'>+	switch (secy-&gt;key_len) {</div><div class='add'>+	case AQ_MACSEC_KEY_LEN_128_BIT:</div><div class='add'>+		sc_rec.sak_len = 0;</div><div class='add'>+		break;</div><div class='add'>+	case AQ_MACSEC_KEY_LEN_192_BIT:</div><div class='add'>+		sc_rec.sak_len = 1;</div><div class='add'>+		break;</div><div class='add'>+	case AQ_MACSEC_KEY_LEN_256_BIT:</div><div class='add'>+		sc_rec.sak_len = 2;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		WARN_ONCE(true, "Invalid sc_sa");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	sc_rec.curr_an = secy-&gt;tx_sc.encoding_sa;</div><div class='add'>+	sc_rec.valid = 1;</div><div class='add'>+	sc_rec.fresh = 1;</div><div class='add'>+</div><div class='add'>+	return aq_mss_set_egress_sc_record(hw, &amp;sc_rec, sc_idx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 aq_sc_idx_max(const enum aq_macsec_sc_sa sc_sa)</div><div class='add'>+{</div><div class='add'>+	u32 result = 0;</div><div class='add'>+</div><div class='add'>+	switch (sc_sa) {</div><div class='add'>+	case aq_macsec_sa_sc_4sa_8sc:</div><div class='add'>+		result = 8;</div><div class='add'>+		break;</div><div class='add'>+	case aq_macsec_sa_sc_2sa_16sc:</div><div class='add'>+		result = 16;</div><div class='add'>+		break;</div><div class='add'>+	case aq_macsec_sa_sc_1sa_32sc:</div><div class='add'>+		result = 32;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return result;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 aq_to_hw_sc_idx(const u32 sc_idx, const enum aq_macsec_sc_sa sc_sa)</div><div class='add'>+{</div><div class='add'>+	switch (sc_sa) {</div><div class='add'>+	case aq_macsec_sa_sc_4sa_8sc:</div><div class='add'>+		return sc_idx &lt;&lt; 2;</div><div class='add'>+	case aq_macsec_sa_sc_2sa_16sc:</div><div class='add'>+		return sc_idx &lt;&lt; 1;</div><div class='add'>+	case aq_macsec_sa_sc_1sa_32sc:</div><div class='add'>+		return sc_idx;</div><div class='add'>+	default:</div><div class='add'>+		WARN_ONCE(true, "Invalid sc_sa");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return sc_idx;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum aq_macsec_sc_sa sc_sa_from_num_an(const int num_an)</div><div class='add'>+{</div><div class='add'>+	enum aq_macsec_sc_sa sc_sa = aq_macsec_sa_sc_not_used;</div><div class='add'>+</div><div class='add'>+	switch (num_an) {</div><div class='add'>+	case 4:</div><div class='add'>+		sc_sa = aq_macsec_sa_sc_4sa_8sc;</div><div class='add'>+		break;</div><div class='add'>+	case 2:</div><div class='add'>+		sc_sa = aq_macsec_sa_sc_2sa_16sc;</div><div class='add'>+		break;</div><div class='add'>+	case 1:</div><div class='add'>+		sc_sa = aq_macsec_sa_sc_1sa_32sc;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return sc_sa;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_mdo_add_secy(struct macsec_context *ctx)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *nic = macsec_netdev_priv(ctx-&gt;netdev);</div><div class='add'>+	struct aq_macsec_cfg *cfg = nic-&gt;macsec_cfg;</div><div class='add'>+	const struct macsec_secy *secy = ctx-&gt;secy;</div><div class='add'>+	enum aq_macsec_sc_sa sc_sa;</div><div class='add'>+	u32 txsc_idx;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (secy-&gt;xpn)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	sc_sa = sc_sa_from_num_an(MACSEC_NUM_AN);</div><div class='add'>+	if (sc_sa == aq_macsec_sa_sc_not_used)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (hweight32(cfg-&gt;txsc_idx_busy) &gt;= aq_sc_idx_max(sc_sa))</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+</div><div class='add'>+	txsc_idx = ffz(cfg-&gt;txsc_idx_busy);</div><div class='add'>+	if (txsc_idx == AQ_MACSEC_MAX_SC)</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+</div><div class='add'>+	cfg-&gt;sc_sa = sc_sa;</div><div class='add'>+	cfg-&gt;aq_txsc[txsc_idx].hw_sc_idx = aq_to_hw_sc_idx(txsc_idx, sc_sa);</div><div class='add'>+	cfg-&gt;aq_txsc[txsc_idx].sw_secy = secy;</div><div class='add'>+</div><div class='add'>+	if (netif_carrier_ok(nic-&gt;ndev) &amp;&amp; netif_running(secy-&gt;netdev))</div><div class='add'>+		ret = aq_set_txsc(nic, txsc_idx);</div><div class='add'>+</div><div class='add'>+	set_bit(txsc_idx, &amp;cfg-&gt;txsc_idx_busy);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_mdo_upd_secy(struct macsec_context *ctx)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *nic = macsec_netdev_priv(ctx-&gt;netdev);</div><div class='add'>+	const struct macsec_secy *secy = ctx-&gt;secy;</div><div class='add'>+	int txsc_idx;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	txsc_idx = aq_get_txsc_idx_from_secy(nic-&gt;macsec_cfg, secy);</div><div class='add'>+	if (txsc_idx &lt; 0)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	if (netif_carrier_ok(nic-&gt;ndev) &amp;&amp; netif_running(secy-&gt;netdev))</div><div class='add'>+		ret = aq_set_txsc(nic, txsc_idx);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_clear_txsc(struct aq_nic_s *nic, const int txsc_idx,</div><div class='add'>+			 enum aq_clear_type clear_type)</div><div class='add'>+{</div><div class='add'>+	struct aq_macsec_txsc *tx_sc = &amp;nic-&gt;macsec_cfg-&gt;aq_txsc[txsc_idx];</div><div class='add'>+	struct aq_mss_egress_class_record tx_class_rec = { 0 };</div><div class='add'>+	struct aq_mss_egress_sc_record sc_rec = { 0 };</div><div class='add'>+	struct aq_hw_s *hw = nic-&gt;aq_hw;</div><div class='add'>+	int ret = 0;</div><div class='add'>+	int sa_num;</div><div class='add'>+</div><div class='add'>+	for_each_set_bit (sa_num, &amp;tx_sc-&gt;tx_sa_idx_busy, AQ_MACSEC_MAX_SA) {</div><div class='add'>+		ret = aq_clear_txsa(nic, tx_sc, sa_num, clear_type);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (clear_type &amp; AQ_CLEAR_HW) {</div><div class='add'>+		ret = aq_mss_set_egress_class_record(hw, &amp;tx_class_rec,</div><div class='add'>+						     txsc_idx);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		sc_rec.fresh = 1;</div><div class='add'>+		ret = aq_mss_set_egress_sc_record(hw, &amp;sc_rec,</div><div class='add'>+						  tx_sc-&gt;hw_sc_idx);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (clear_type &amp; AQ_CLEAR_SW) {</div><div class='add'>+		clear_bit(txsc_idx, &amp;nic-&gt;macsec_cfg-&gt;txsc_idx_busy);</div><div class='add'>+		nic-&gt;macsec_cfg-&gt;aq_txsc[txsc_idx].sw_secy = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_mdo_del_secy(struct macsec_context *ctx)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *nic = macsec_netdev_priv(ctx-&gt;netdev);</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (!nic-&gt;macsec_cfg)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ret = aq_clear_secy(nic, ctx-&gt;secy, AQ_CLEAR_ALL);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_update_txsa(struct aq_nic_s *nic, const unsigned int sc_idx,</div><div class='add'>+			  const struct macsec_secy *secy,</div><div class='add'>+			  const struct macsec_tx_sa *tx_sa,</div><div class='add'>+			  const unsigned char *key, const unsigned char an)</div><div class='add'>+{</div><div class='add'>+	const u32 next_pn = tx_sa-&gt;next_pn_halves.lower;</div><div class='add'>+	struct aq_mss_egress_sakey_record key_rec;</div><div class='add'>+	const unsigned int sa_idx = sc_idx | an;</div><div class='add'>+	struct aq_mss_egress_sa_record sa_rec;</div><div class='add'>+	struct aq_hw_s *hw = nic-&gt;aq_hw;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	memset(&amp;sa_rec, 0, sizeof(sa_rec));</div><div class='add'>+	sa_rec.valid = tx_sa-&gt;active;</div><div class='add'>+	sa_rec.fresh = 1;</div><div class='add'>+	sa_rec.next_pn = next_pn;</div><div class='add'>+</div><div class='add'>+	ret = aq_mss_set_egress_sa_record(hw, &amp;sa_rec, sa_idx);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (!key)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	memset(&amp;key_rec, 0, sizeof(key_rec));</div><div class='add'>+	memcpy(&amp;key_rec.key, key, secy-&gt;key_len);</div><div class='add'>+</div><div class='add'>+	aq_rotate_keys(&amp;key_rec.key, secy-&gt;key_len);</div><div class='add'>+</div><div class='add'>+	ret = aq_mss_set_egress_sakey_record(hw, &amp;key_rec, sa_idx);</div><div class='add'>+</div><div class='add'>+	memzero_explicit(&amp;key_rec, sizeof(key_rec));</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_mdo_add_txsa(struct macsec_context *ctx)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *nic = macsec_netdev_priv(ctx-&gt;netdev);</div><div class='add'>+	struct aq_macsec_cfg *cfg = nic-&gt;macsec_cfg;</div><div class='add'>+	const struct macsec_secy *secy = ctx-&gt;secy;</div><div class='add'>+	struct aq_macsec_txsc *aq_txsc;</div><div class='add'>+	int txsc_idx;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	txsc_idx = aq_get_txsc_idx_from_secy(cfg, secy);</div><div class='add'>+	if (txsc_idx &lt; 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	aq_txsc = &amp;cfg-&gt;aq_txsc[txsc_idx];</div><div class='add'>+	set_bit(ctx-&gt;sa.assoc_num, &amp;aq_txsc-&gt;tx_sa_idx_busy);</div><div class='add'>+</div><div class='add'>+	memcpy(aq_txsc-&gt;tx_sa_key[ctx-&gt;sa.assoc_num], ctx-&gt;sa.key,</div><div class='add'>+	       secy-&gt;key_len);</div><div class='add'>+</div><div class='add'>+	if (netif_carrier_ok(nic-&gt;ndev) &amp;&amp; netif_running(secy-&gt;netdev))</div><div class='add'>+		ret = aq_update_txsa(nic, aq_txsc-&gt;hw_sc_idx, secy,</div><div class='add'>+				     ctx-&gt;sa.tx_sa, ctx-&gt;sa.key,</div><div class='add'>+				     ctx-&gt;sa.assoc_num);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_mdo_upd_txsa(struct macsec_context *ctx)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *nic = macsec_netdev_priv(ctx-&gt;netdev);</div><div class='add'>+	struct aq_macsec_cfg *cfg = nic-&gt;macsec_cfg;</div><div class='add'>+	const struct macsec_secy *secy = ctx-&gt;secy;</div><div class='add'>+	struct aq_macsec_txsc *aq_txsc;</div><div class='add'>+	int txsc_idx;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	txsc_idx = aq_get_txsc_idx_from_secy(cfg, secy);</div><div class='add'>+	if (txsc_idx &lt; 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	aq_txsc = &amp;cfg-&gt;aq_txsc[txsc_idx];</div><div class='add'>+	if (netif_carrier_ok(nic-&gt;ndev) &amp;&amp; netif_running(secy-&gt;netdev))</div><div class='add'>+		ret = aq_update_txsa(nic, aq_txsc-&gt;hw_sc_idx, secy,</div><div class='add'>+				     ctx-&gt;sa.tx_sa, NULL, ctx-&gt;sa.assoc_num);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_clear_txsa(struct aq_nic_s *nic, struct aq_macsec_txsc *aq_txsc,</div><div class='add'>+			 const int sa_num, enum aq_clear_type clear_type)</div><div class='add'>+{</div><div class='add'>+	const int sa_idx = aq_txsc-&gt;hw_sc_idx | sa_num;</div><div class='add'>+	struct aq_hw_s *hw = nic-&gt;aq_hw;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (clear_type &amp; AQ_CLEAR_SW)</div><div class='add'>+		clear_bit(sa_num, &amp;aq_txsc-&gt;tx_sa_idx_busy);</div><div class='add'>+</div><div class='add'>+	if ((clear_type &amp; AQ_CLEAR_HW) &amp;&amp; netif_carrier_ok(nic-&gt;ndev)) {</div><div class='add'>+		struct aq_mss_egress_sakey_record key_rec;</div><div class='add'>+		struct aq_mss_egress_sa_record sa_rec;</div><div class='add'>+</div><div class='add'>+		memset(&amp;sa_rec, 0, sizeof(sa_rec));</div><div class='add'>+		sa_rec.fresh = 1;</div><div class='add'>+</div><div class='add'>+		ret = aq_mss_set_egress_sa_record(hw, &amp;sa_rec, sa_idx);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		memset(&amp;key_rec, 0, sizeof(key_rec));</div><div class='add'>+		return aq_mss_set_egress_sakey_record(hw, &amp;key_rec, sa_idx);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_mdo_del_txsa(struct macsec_context *ctx)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *nic = macsec_netdev_priv(ctx-&gt;netdev);</div><div class='add'>+	struct aq_macsec_cfg *cfg = nic-&gt;macsec_cfg;</div><div class='add'>+	int txsc_idx;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	txsc_idx = aq_get_txsc_idx_from_secy(cfg, ctx-&gt;secy);</div><div class='add'>+	if (txsc_idx &lt; 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = aq_clear_txsa(nic, &amp;cfg-&gt;aq_txsc[txsc_idx], ctx-&gt;sa.assoc_num,</div><div class='add'>+			    AQ_CLEAR_ALL);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_rxsc_validate_frames(const enum macsec_validation_type validate)</div><div class='add'>+{</div><div class='add'>+	switch (validate) {</div><div class='add'>+	case MACSEC_VALIDATE_DISABLED:</div><div class='add'>+		return 2;</div><div class='add'>+	case MACSEC_VALIDATE_CHECK:</div><div class='add'>+		return 1;</div><div class='add'>+	case MACSEC_VALIDATE_STRICT:</div><div class='add'>+		return 0;</div><div class='add'>+	default:</div><div class='add'>+		WARN_ONCE(true, "Invalid validation type");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_set_rxsc(struct aq_nic_s *nic, const u32 rxsc_idx)</div><div class='add'>+{</div><div class='add'>+	const struct aq_macsec_rxsc *aq_rxsc =</div><div class='add'>+		&amp;nic-&gt;macsec_cfg-&gt;aq_rxsc[rxsc_idx];</div><div class='add'>+	struct aq_mss_ingress_preclass_record pre_class_record;</div><div class='add'>+	const struct macsec_rx_sc *rx_sc = aq_rxsc-&gt;sw_rxsc;</div><div class='add'>+	const struct macsec_secy *secy = aq_rxsc-&gt;sw_secy;</div><div class='add'>+	const u32 hw_sc_idx = aq_rxsc-&gt;hw_sc_idx;</div><div class='add'>+	struct aq_mss_ingress_sc_record sc_record;</div><div class='add'>+	struct aq_hw_s *hw = nic-&gt;aq_hw;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	memset(&amp;pre_class_record, 0, sizeof(pre_class_record));</div><div class='add'>+	put_unaligned_be64((__force u64)rx_sc-&gt;sci, pre_class_record.sci);</div><div class='add'>+	pre_class_record.sci_mask = 0xff;</div><div class='add'>+	/* match all MACSEC ethertype packets */</div><div class='add'>+	pre_class_record.eth_type = ETH_P_MACSEC;</div><div class='add'>+	pre_class_record.eth_type_mask = 0x3;</div><div class='add'>+</div><div class='add'>+	aq_ether_addr_to_mac(pre_class_record.mac_sa, (char *)&amp;rx_sc-&gt;sci);</div><div class='add'>+	pre_class_record.sa_mask = 0x3f;</div><div class='add'>+</div><div class='add'>+	pre_class_record.an_mask = nic-&gt;macsec_cfg-&gt;sc_sa;</div><div class='add'>+	pre_class_record.sc_idx = hw_sc_idx;</div><div class='add'>+	/* strip SecTAG &amp; forward for decryption */</div><div class='add'>+	pre_class_record.action = 0x0;</div><div class='add'>+	pre_class_record.valid = 1;</div><div class='add'>+</div><div class='add'>+	ret = aq_mss_set_ingress_preclass_record(hw, &amp;pre_class_record,</div><div class='add'>+						 2 * rxsc_idx + 1);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	/* If SCI is absent, then match by SA alone */</div><div class='add'>+	pre_class_record.sci_mask = 0;</div><div class='add'>+	pre_class_record.sci_from_table = 1;</div><div class='add'>+</div><div class='add'>+	ret = aq_mss_set_ingress_preclass_record(hw, &amp;pre_class_record,</div><div class='add'>+						 2 * rxsc_idx);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	memset(&amp;sc_record, 0, sizeof(sc_record));</div><div class='add'>+	sc_record.validate_frames =</div><div class='add'>+		aq_rxsc_validate_frames(secy-&gt;validate_frames);</div><div class='add'>+	if (secy-&gt;replay_protect) {</div><div class='add'>+		sc_record.replay_protect = 1;</div><div class='add'>+		sc_record.anti_replay_window = secy-&gt;replay_window;</div><div class='add'>+	}</div><div class='add'>+	sc_record.valid = 1;</div><div class='add'>+	sc_record.fresh = 1;</div><div class='add'>+</div><div class='add'>+	ret = aq_mss_set_ingress_sc_record(hw, &amp;sc_record, hw_sc_idx);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_mdo_add_rxsc(struct macsec_context *ctx)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *nic = macsec_netdev_priv(ctx-&gt;netdev);</div><div class='add'>+	struct aq_macsec_cfg *cfg = nic-&gt;macsec_cfg;</div><div class='add'>+	const u32 rxsc_idx_max = aq_sc_idx_max(cfg-&gt;sc_sa);</div><div class='add'>+	u32 rxsc_idx;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (hweight32(cfg-&gt;rxsc_idx_busy) &gt;= rxsc_idx_max)</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+</div><div class='add'>+	rxsc_idx = ffz(cfg-&gt;rxsc_idx_busy);</div><div class='add'>+	if (rxsc_idx &gt;= rxsc_idx_max)</div><div class='add'>+		return -ENOSPC;</div><div class='add'>+</div><div class='add'>+	cfg-&gt;aq_rxsc[rxsc_idx].hw_sc_idx = aq_to_hw_sc_idx(rxsc_idx,</div><div class='add'>+							   cfg-&gt;sc_sa);</div><div class='add'>+	cfg-&gt;aq_rxsc[rxsc_idx].sw_secy = ctx-&gt;secy;</div><div class='add'>+	cfg-&gt;aq_rxsc[rxsc_idx].sw_rxsc = ctx-&gt;rx_sc;</div><div class='add'>+</div><div class='add'>+	if (netif_carrier_ok(nic-&gt;ndev) &amp;&amp; netif_running(ctx-&gt;secy-&gt;netdev))</div><div class='add'>+		ret = aq_set_rxsc(nic, rxsc_idx);</div><div class='add'>+</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	set_bit(rxsc_idx, &amp;cfg-&gt;rxsc_idx_busy);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_mdo_upd_rxsc(struct macsec_context *ctx)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *nic = macsec_netdev_priv(ctx-&gt;netdev);</div><div class='add'>+	int rxsc_idx;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	rxsc_idx = aq_get_rxsc_idx_from_rxsc(nic-&gt;macsec_cfg, ctx-&gt;rx_sc);</div><div class='add'>+	if (rxsc_idx &lt; 0)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	if (netif_carrier_ok(nic-&gt;ndev) &amp;&amp; netif_running(ctx-&gt;secy-&gt;netdev))</div><div class='add'>+		ret = aq_set_rxsc(nic, rxsc_idx);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_clear_rxsc(struct aq_nic_s *nic, const int rxsc_idx,</div><div class='add'>+			 enum aq_clear_type clear_type)</div><div class='add'>+{</div><div class='add'>+	struct aq_macsec_rxsc *rx_sc = &amp;nic-&gt;macsec_cfg-&gt;aq_rxsc[rxsc_idx];</div><div class='add'>+	struct aq_hw_s *hw = nic-&gt;aq_hw;</div><div class='add'>+	int ret = 0;</div><div class='add'>+	int sa_num;</div><div class='add'>+</div><div class='add'>+	for_each_set_bit (sa_num, &amp;rx_sc-&gt;rx_sa_idx_busy, AQ_MACSEC_MAX_SA) {</div><div class='add'>+		ret = aq_clear_rxsa(nic, rx_sc, sa_num, clear_type);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (clear_type &amp; AQ_CLEAR_HW) {</div><div class='add'>+		struct aq_mss_ingress_preclass_record pre_class_record;</div><div class='add'>+		struct aq_mss_ingress_sc_record sc_record;</div><div class='add'>+</div><div class='add'>+		memset(&amp;pre_class_record, 0, sizeof(pre_class_record));</div><div class='add'>+		memset(&amp;sc_record, 0, sizeof(sc_record));</div><div class='add'>+</div><div class='add'>+		ret = aq_mss_set_ingress_preclass_record(hw, &amp;pre_class_record,</div><div class='add'>+							 2 * rxsc_idx);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		ret = aq_mss_set_ingress_preclass_record(hw, &amp;pre_class_record,</div><div class='add'>+							 2 * rxsc_idx + 1);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		sc_record.fresh = 1;</div><div class='add'>+		ret = aq_mss_set_ingress_sc_record(hw, &amp;sc_record,</div><div class='add'>+						   rx_sc-&gt;hw_sc_idx);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (clear_type &amp; AQ_CLEAR_SW) {</div><div class='add'>+		clear_bit(rxsc_idx, &amp;nic-&gt;macsec_cfg-&gt;rxsc_idx_busy);</div><div class='add'>+		rx_sc-&gt;sw_secy = NULL;</div><div class='add'>+		rx_sc-&gt;sw_rxsc = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_mdo_del_rxsc(struct macsec_context *ctx)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *nic = macsec_netdev_priv(ctx-&gt;netdev);</div><div class='add'>+	enum aq_clear_type clear_type = AQ_CLEAR_SW;</div><div class='add'>+	int rxsc_idx;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	rxsc_idx = aq_get_rxsc_idx_from_rxsc(nic-&gt;macsec_cfg, ctx-&gt;rx_sc);</div><div class='add'>+	if (rxsc_idx &lt; 0)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	if (netif_carrier_ok(nic-&gt;ndev))</div><div class='add'>+		clear_type = AQ_CLEAR_ALL;</div><div class='add'>+</div><div class='add'>+	ret = aq_clear_rxsc(nic, rxsc_idx, clear_type);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_update_rxsa(struct aq_nic_s *nic, const unsigned int sc_idx,</div><div class='add'>+			  const struct macsec_secy *secy,</div><div class='add'>+			  const struct macsec_rx_sa *rx_sa,</div><div class='add'>+			  const unsigned char *key, const unsigned char an)</div><div class='add'>+{</div><div class='add'>+	struct aq_mss_ingress_sakey_record sa_key_record;</div><div class='add'>+	const u32 next_pn = rx_sa-&gt;next_pn_halves.lower;</div><div class='add'>+	struct aq_mss_ingress_sa_record sa_record;</div><div class='add'>+	struct aq_hw_s *hw = nic-&gt;aq_hw;</div><div class='add'>+	const int sa_idx = sc_idx | an;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	memset(&amp;sa_record, 0, sizeof(sa_record));</div><div class='add'>+	sa_record.valid = rx_sa-&gt;active;</div><div class='add'>+	sa_record.fresh = 1;</div><div class='add'>+	sa_record.next_pn = next_pn;</div><div class='add'>+</div><div class='add'>+	ret = aq_mss_set_ingress_sa_record(hw, &amp;sa_record, sa_idx);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	if (!key)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	memset(&amp;sa_key_record, 0, sizeof(sa_key_record));</div><div class='add'>+	memcpy(&amp;sa_key_record.key, key, secy-&gt;key_len);</div><div class='add'>+</div><div class='add'>+	switch (secy-&gt;key_len) {</div><div class='add'>+	case AQ_MACSEC_KEY_LEN_128_BIT:</div><div class='add'>+		sa_key_record.key_len = 0;</div><div class='add'>+		break;</div><div class='add'>+	case AQ_MACSEC_KEY_LEN_192_BIT:</div><div class='add'>+		sa_key_record.key_len = 1;</div><div class='add'>+		break;</div><div class='add'>+	case AQ_MACSEC_KEY_LEN_256_BIT:</div><div class='add'>+		sa_key_record.key_len = 2;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -1;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	aq_rotate_keys(&amp;sa_key_record.key, secy-&gt;key_len);</div><div class='add'>+</div><div class='add'>+	ret = aq_mss_set_ingress_sakey_record(hw, &amp;sa_key_record, sa_idx);</div><div class='add'>+</div><div class='add'>+	memzero_explicit(&amp;sa_key_record, sizeof(sa_key_record));</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_mdo_add_rxsa(struct macsec_context *ctx)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *nic = macsec_netdev_priv(ctx-&gt;netdev);</div><div class='add'>+	const struct macsec_rx_sc *rx_sc = ctx-&gt;sa.rx_sa-&gt;sc;</div><div class='add'>+	const struct macsec_secy *secy = ctx-&gt;secy;</div><div class='add'>+	struct aq_macsec_rxsc *aq_rxsc;</div><div class='add'>+	int rxsc_idx;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	rxsc_idx = aq_get_rxsc_idx_from_rxsc(nic-&gt;macsec_cfg, rx_sc);</div><div class='add'>+	if (rxsc_idx &lt; 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	aq_rxsc = &amp;nic-&gt;macsec_cfg-&gt;aq_rxsc[rxsc_idx];</div><div class='add'>+	set_bit(ctx-&gt;sa.assoc_num, &amp;aq_rxsc-&gt;rx_sa_idx_busy);</div><div class='add'>+</div><div class='add'>+	memcpy(aq_rxsc-&gt;rx_sa_key[ctx-&gt;sa.assoc_num], ctx-&gt;sa.key,</div><div class='add'>+	       secy-&gt;key_len);</div><div class='add'>+</div><div class='add'>+	if (netif_carrier_ok(nic-&gt;ndev) &amp;&amp; netif_running(secy-&gt;netdev))</div><div class='add'>+		ret = aq_update_rxsa(nic, aq_rxsc-&gt;hw_sc_idx, secy,</div><div class='add'>+				     ctx-&gt;sa.rx_sa, ctx-&gt;sa.key,</div><div class='add'>+				     ctx-&gt;sa.assoc_num);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_mdo_upd_rxsa(struct macsec_context *ctx)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *nic = macsec_netdev_priv(ctx-&gt;netdev);</div><div class='add'>+	const struct macsec_rx_sc *rx_sc = ctx-&gt;sa.rx_sa-&gt;sc;</div><div class='add'>+	struct aq_macsec_cfg *cfg = nic-&gt;macsec_cfg;</div><div class='add'>+	const struct macsec_secy *secy = ctx-&gt;secy;</div><div class='add'>+	int rxsc_idx;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	rxsc_idx = aq_get_rxsc_idx_from_rxsc(cfg, rx_sc);</div><div class='add'>+	if (rxsc_idx &lt; 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (netif_carrier_ok(nic-&gt;ndev) &amp;&amp; netif_running(secy-&gt;netdev))</div><div class='add'>+		ret = aq_update_rxsa(nic, cfg-&gt;aq_rxsc[rxsc_idx].hw_sc_idx,</div><div class='add'>+				     secy, ctx-&gt;sa.rx_sa, NULL,</div><div class='add'>+				     ctx-&gt;sa.assoc_num);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_clear_rxsa(struct aq_nic_s *nic, struct aq_macsec_rxsc *aq_rxsc,</div><div class='add'>+			 const int sa_num, enum aq_clear_type clear_type)</div><div class='add'>+{</div><div class='add'>+	int sa_idx = aq_rxsc-&gt;hw_sc_idx | sa_num;</div><div class='add'>+	struct aq_hw_s *hw = nic-&gt;aq_hw;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	if (clear_type &amp; AQ_CLEAR_SW)</div><div class='add'>+		clear_bit(sa_num, &amp;aq_rxsc-&gt;rx_sa_idx_busy);</div><div class='add'>+</div><div class='add'>+	if ((clear_type &amp; AQ_CLEAR_HW) &amp;&amp; netif_carrier_ok(nic-&gt;ndev)) {</div><div class='add'>+		struct aq_mss_ingress_sakey_record sa_key_record;</div><div class='add'>+		struct aq_mss_ingress_sa_record sa_record;</div><div class='add'>+</div><div class='add'>+		memset(&amp;sa_key_record, 0, sizeof(sa_key_record));</div><div class='add'>+		memset(&amp;sa_record, 0, sizeof(sa_record));</div><div class='add'>+		sa_record.fresh = 1;</div><div class='add'>+		ret = aq_mss_set_ingress_sa_record(hw, &amp;sa_record, sa_idx);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		return aq_mss_set_ingress_sakey_record(hw, &amp;sa_key_record,</div><div class='add'>+						       sa_idx);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_mdo_del_rxsa(struct macsec_context *ctx)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *nic = macsec_netdev_priv(ctx-&gt;netdev);</div><div class='add'>+	const struct macsec_rx_sc *rx_sc = ctx-&gt;sa.rx_sa-&gt;sc;</div><div class='add'>+	struct aq_macsec_cfg *cfg = nic-&gt;macsec_cfg;</div><div class='add'>+	int rxsc_idx;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	rxsc_idx = aq_get_rxsc_idx_from_rxsc(cfg, rx_sc);</div><div class='add'>+	if (rxsc_idx &lt; 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	ret = aq_clear_rxsa(nic, &amp;cfg-&gt;aq_rxsc[rxsc_idx], ctx-&gt;sa.assoc_num,</div><div class='add'>+			    AQ_CLEAR_ALL);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_mdo_get_dev_stats(struct macsec_context *ctx)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *nic = macsec_netdev_priv(ctx-&gt;netdev);</div><div class='add'>+	struct aq_macsec_common_stats *stats = &amp;nic-&gt;macsec_cfg-&gt;stats;</div><div class='add'>+	struct aq_hw_s *hw = nic-&gt;aq_hw;</div><div class='add'>+</div><div class='add'>+	aq_get_macsec_common_stats(hw, stats);</div><div class='add'>+</div><div class='add'>+	ctx-&gt;stats.dev_stats-&gt;OutPktsUntagged = stats-&gt;out.untagged_pkts;</div><div class='add'>+	ctx-&gt;stats.dev_stats-&gt;InPktsUntagged = stats-&gt;in.untagged_pkts;</div><div class='add'>+	ctx-&gt;stats.dev_stats-&gt;OutPktsTooLong = stats-&gt;out.too_long;</div><div class='add'>+	ctx-&gt;stats.dev_stats-&gt;InPktsNoTag = stats-&gt;in.notag_pkts;</div><div class='add'>+	ctx-&gt;stats.dev_stats-&gt;InPktsBadTag = stats-&gt;in.bad_tag_pkts;</div><div class='add'>+	ctx-&gt;stats.dev_stats-&gt;InPktsUnknownSCI = stats-&gt;in.unknown_sci_pkts;</div><div class='add'>+	ctx-&gt;stats.dev_stats-&gt;InPktsNoSCI = stats-&gt;in.no_sci_pkts;</div><div class='add'>+	ctx-&gt;stats.dev_stats-&gt;InPktsOverrun = 0;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_mdo_get_tx_sc_stats(struct macsec_context *ctx)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *nic = macsec_netdev_priv(ctx-&gt;netdev);</div><div class='add'>+	struct aq_macsec_tx_sc_stats *stats;</div><div class='add'>+	struct aq_hw_s *hw = nic-&gt;aq_hw;</div><div class='add'>+	struct aq_macsec_txsc *aq_txsc;</div><div class='add'>+	int txsc_idx;</div><div class='add'>+</div><div class='add'>+	txsc_idx = aq_get_txsc_idx_from_secy(nic-&gt;macsec_cfg, ctx-&gt;secy);</div><div class='add'>+	if (txsc_idx &lt; 0)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	aq_txsc = &amp;nic-&gt;macsec_cfg-&gt;aq_txsc[txsc_idx];</div><div class='add'>+	stats = &amp;aq_txsc-&gt;stats;</div><div class='add'>+	aq_get_txsc_stats(hw, aq_txsc-&gt;hw_sc_idx, stats);</div><div class='add'>+</div><div class='add'>+	ctx-&gt;stats.tx_sc_stats-&gt;OutPktsProtected = stats-&gt;sc_protected_pkts;</div><div class='add'>+	ctx-&gt;stats.tx_sc_stats-&gt;OutPktsEncrypted = stats-&gt;sc_encrypted_pkts;</div><div class='add'>+	ctx-&gt;stats.tx_sc_stats-&gt;OutOctetsProtected = stats-&gt;sc_protected_octets;</div><div class='add'>+	ctx-&gt;stats.tx_sc_stats-&gt;OutOctetsEncrypted = stats-&gt;sc_encrypted_octets;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_mdo_get_tx_sa_stats(struct macsec_context *ctx)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *nic = macsec_netdev_priv(ctx-&gt;netdev);</div><div class='add'>+	struct aq_macsec_cfg *cfg = nic-&gt;macsec_cfg;</div><div class='add'>+	struct aq_macsec_tx_sa_stats *stats;</div><div class='add'>+	struct aq_hw_s *hw = nic-&gt;aq_hw;</div><div class='add'>+	const struct macsec_secy *secy;</div><div class='add'>+	struct aq_macsec_txsc *aq_txsc;</div><div class='add'>+	struct macsec_tx_sa *tx_sa;</div><div class='add'>+	unsigned int sa_idx;</div><div class='add'>+	int txsc_idx;</div><div class='add'>+	u32 next_pn;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	txsc_idx = aq_get_txsc_idx_from_secy(cfg, ctx-&gt;secy);</div><div class='add'>+	if (txsc_idx &lt; 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	aq_txsc = &amp;cfg-&gt;aq_txsc[txsc_idx];</div><div class='add'>+	sa_idx = aq_txsc-&gt;hw_sc_idx | ctx-&gt;sa.assoc_num;</div><div class='add'>+	stats = &amp;aq_txsc-&gt;tx_sa_stats[ctx-&gt;sa.assoc_num];</div><div class='add'>+	ret = aq_get_txsa_stats(hw, sa_idx, stats);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ctx-&gt;stats.tx_sa_stats-&gt;OutPktsProtected = stats-&gt;sa_protected_pkts;</div><div class='add'>+	ctx-&gt;stats.tx_sa_stats-&gt;OutPktsEncrypted = stats-&gt;sa_encrypted_pkts;</div><div class='add'>+</div><div class='add'>+	secy = aq_txsc-&gt;sw_secy;</div><div class='add'>+	tx_sa = rcu_dereference_bh(secy-&gt;tx_sc.sa[ctx-&gt;sa.assoc_num]);</div><div class='add'>+	ret = aq_get_txsa_next_pn(hw, sa_idx, &amp;next_pn);</div><div class='add'>+	if (ret == 0) {</div><div class='add'>+		spin_lock_bh(&amp;tx_sa-&gt;lock);</div><div class='add'>+		tx_sa-&gt;next_pn = next_pn;</div><div class='add'>+		spin_unlock_bh(&amp;tx_sa-&gt;lock);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_mdo_get_rx_sc_stats(struct macsec_context *ctx)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *nic = macsec_netdev_priv(ctx-&gt;netdev);</div><div class='add'>+	struct aq_macsec_cfg *cfg = nic-&gt;macsec_cfg;</div><div class='add'>+	struct aq_macsec_rx_sa_stats *stats;</div><div class='add'>+	struct aq_hw_s *hw = nic-&gt;aq_hw;</div><div class='add'>+	struct aq_macsec_rxsc *aq_rxsc;</div><div class='add'>+	unsigned int sa_idx;</div><div class='add'>+	int rxsc_idx;</div><div class='add'>+	int ret = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	rxsc_idx = aq_get_rxsc_idx_from_rxsc(cfg, ctx-&gt;rx_sc);</div><div class='add'>+	if (rxsc_idx &lt; 0)</div><div class='add'>+		return -ENOENT;</div><div class='add'>+</div><div class='add'>+	aq_rxsc = &amp;cfg-&gt;aq_rxsc[rxsc_idx];</div><div class='add'>+	for (i = 0; i &lt; MACSEC_NUM_AN; i++) {</div><div class='add'>+		if (!test_bit(i, &amp;aq_rxsc-&gt;rx_sa_idx_busy))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		stats = &amp;aq_rxsc-&gt;rx_sa_stats[i];</div><div class='add'>+		sa_idx = aq_rxsc-&gt;hw_sc_idx | i;</div><div class='add'>+		ret = aq_get_rxsa_stats(hw, sa_idx, stats);</div><div class='add'>+		if (ret)</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		ctx-&gt;stats.rx_sc_stats-&gt;InOctetsValidated +=</div><div class='add'>+			stats-&gt;validated_octets;</div><div class='add'>+		ctx-&gt;stats.rx_sc_stats-&gt;InOctetsDecrypted +=</div><div class='add'>+			stats-&gt;decrypted_octets;</div><div class='add'>+		ctx-&gt;stats.rx_sc_stats-&gt;InPktsUnchecked +=</div><div class='add'>+			stats-&gt;unchecked_pkts;</div><div class='add'>+		ctx-&gt;stats.rx_sc_stats-&gt;InPktsDelayed += stats-&gt;delayed_pkts;</div><div class='add'>+		ctx-&gt;stats.rx_sc_stats-&gt;InPktsOK += stats-&gt;ok_pkts;</div><div class='add'>+		ctx-&gt;stats.rx_sc_stats-&gt;InPktsInvalid += stats-&gt;invalid_pkts;</div><div class='add'>+		ctx-&gt;stats.rx_sc_stats-&gt;InPktsLate += stats-&gt;late_pkts;</div><div class='add'>+		ctx-&gt;stats.rx_sc_stats-&gt;InPktsNotValid += stats-&gt;not_valid_pkts;</div><div class='add'>+		ctx-&gt;stats.rx_sc_stats-&gt;InPktsNotUsingSA += stats-&gt;not_using_sa;</div><div class='add'>+		ctx-&gt;stats.rx_sc_stats-&gt;InPktsUnusedSA += stats-&gt;unused_sa;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_mdo_get_rx_sa_stats(struct macsec_context *ctx)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *nic = macsec_netdev_priv(ctx-&gt;netdev);</div><div class='add'>+	struct aq_macsec_cfg *cfg = nic-&gt;macsec_cfg;</div><div class='add'>+	struct aq_macsec_rx_sa_stats *stats;</div><div class='add'>+	struct aq_hw_s *hw = nic-&gt;aq_hw;</div><div class='add'>+	struct aq_macsec_rxsc *aq_rxsc;</div><div class='add'>+	struct macsec_rx_sa *rx_sa;</div><div class='add'>+	unsigned int sa_idx;</div><div class='add'>+	int rxsc_idx;</div><div class='add'>+	u32 next_pn;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	rxsc_idx = aq_get_rxsc_idx_from_rxsc(cfg, ctx-&gt;rx_sc);</div><div class='add'>+	if (rxsc_idx &lt; 0)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	aq_rxsc = &amp;cfg-&gt;aq_rxsc[rxsc_idx];</div><div class='add'>+	stats = &amp;aq_rxsc-&gt;rx_sa_stats[ctx-&gt;sa.assoc_num];</div><div class='add'>+	sa_idx = aq_rxsc-&gt;hw_sc_idx | ctx-&gt;sa.assoc_num;</div><div class='add'>+	ret = aq_get_rxsa_stats(hw, sa_idx, stats);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ctx-&gt;stats.rx_sa_stats-&gt;InPktsOK = stats-&gt;ok_pkts;</div><div class='add'>+	ctx-&gt;stats.rx_sa_stats-&gt;InPktsInvalid = stats-&gt;invalid_pkts;</div><div class='add'>+	ctx-&gt;stats.rx_sa_stats-&gt;InPktsNotValid = stats-&gt;not_valid_pkts;</div><div class='add'>+	ctx-&gt;stats.rx_sa_stats-&gt;InPktsNotUsingSA = stats-&gt;not_using_sa;</div><div class='add'>+	ctx-&gt;stats.rx_sa_stats-&gt;InPktsUnusedSA = stats-&gt;unused_sa;</div><div class='add'>+</div><div class='add'>+	rx_sa = rcu_dereference_bh(aq_rxsc-&gt;sw_rxsc-&gt;sa[ctx-&gt;sa.assoc_num]);</div><div class='add'>+	ret = aq_get_rxsa_next_pn(hw, sa_idx, &amp;next_pn);</div><div class='add'>+	if (ret == 0) {</div><div class='add'>+		spin_lock_bh(&amp;rx_sa-&gt;lock);</div><div class='add'>+		rx_sa-&gt;next_pn = next_pn;</div><div class='add'>+		spin_unlock_bh(&amp;rx_sa-&gt;lock);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int apply_txsc_cfg(struct aq_nic_s *nic, const int txsc_idx)</div><div class='add'>+{</div><div class='add'>+	struct aq_macsec_txsc *aq_txsc = &amp;nic-&gt;macsec_cfg-&gt;aq_txsc[txsc_idx];</div><div class='add'>+	const struct macsec_secy *secy = aq_txsc-&gt;sw_secy;</div><div class='add'>+	struct macsec_tx_sa *tx_sa;</div><div class='add'>+	int ret = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!netif_running(secy-&gt;netdev))</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = aq_set_txsc(nic, txsc_idx);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; MACSEC_NUM_AN; i++) {</div><div class='add'>+		tx_sa = rcu_dereference_bh(secy-&gt;tx_sc.sa[i]);</div><div class='add'>+		if (tx_sa) {</div><div class='add'>+			ret = aq_update_txsa(nic, aq_txsc-&gt;hw_sc_idx, secy,</div><div class='add'>+					     tx_sa, aq_txsc-&gt;tx_sa_key[i], i);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int apply_rxsc_cfg(struct aq_nic_s *nic, const int rxsc_idx)</div><div class='add'>+{</div><div class='add'>+	struct aq_macsec_rxsc *aq_rxsc = &amp;nic-&gt;macsec_cfg-&gt;aq_rxsc[rxsc_idx];</div><div class='add'>+	const struct macsec_secy *secy = aq_rxsc-&gt;sw_secy;</div><div class='add'>+	struct macsec_rx_sa *rx_sa;</div><div class='add'>+	int ret = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (!netif_running(secy-&gt;netdev))</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	ret = aq_set_rxsc(nic, rxsc_idx);</div><div class='add'>+	if (ret)</div><div class='add'>+		return ret;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; MACSEC_NUM_AN; i++) {</div><div class='add'>+		rx_sa = rcu_dereference_bh(aq_rxsc-&gt;sw_rxsc-&gt;sa[i]);</div><div class='add'>+		if (rx_sa) {</div><div class='add'>+			ret = aq_update_rxsa(nic, aq_rxsc-&gt;hw_sc_idx, secy,</div><div class='add'>+					     rx_sa, aq_rxsc-&gt;rx_sa_key[i], i);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_clear_secy(struct aq_nic_s *nic, const struct macsec_secy *secy,</div><div class='add'>+			 enum aq_clear_type clear_type)</div><div class='add'>+{</div><div class='add'>+	struct macsec_rx_sc *rx_sc;</div><div class='add'>+	int txsc_idx;</div><div class='add'>+	int rxsc_idx;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	txsc_idx = aq_get_txsc_idx_from_secy(nic-&gt;macsec_cfg, secy);</div><div class='add'>+	if (txsc_idx &gt;= 0) {</div><div class='add'>+		ret = aq_clear_txsc(nic, txsc_idx, clear_type);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (rx_sc = rcu_dereference_bh(secy-&gt;rx_sc); rx_sc;</div><div class='add'>+	     rx_sc = rcu_dereference_bh(rx_sc-&gt;next)) {</div><div class='add'>+		rxsc_idx = aq_get_rxsc_idx_from_rxsc(nic-&gt;macsec_cfg, rx_sc);</div><div class='add'>+		if (rxsc_idx &lt; 0)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		ret = aq_clear_rxsc(nic, rxsc_idx, clear_type);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_apply_secy_cfg(struct aq_nic_s *nic,</div><div class='add'>+			     const struct macsec_secy *secy)</div><div class='add'>+{</div><div class='add'>+	struct macsec_rx_sc *rx_sc;</div><div class='add'>+	int txsc_idx;</div><div class='add'>+	int rxsc_idx;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	txsc_idx = aq_get_txsc_idx_from_secy(nic-&gt;macsec_cfg, secy);</div><div class='add'>+	if (txsc_idx &gt;= 0)</div><div class='add'>+		apply_txsc_cfg(nic, txsc_idx);</div><div class='add'>+</div><div class='add'>+	for (rx_sc = rcu_dereference_bh(secy-&gt;rx_sc); rx_sc &amp;&amp; rx_sc-&gt;active;</div><div class='add'>+	     rx_sc = rcu_dereference_bh(rx_sc-&gt;next)) {</div><div class='add'>+		rxsc_idx = aq_get_rxsc_idx_from_rxsc(nic-&gt;macsec_cfg, rx_sc);</div><div class='add'>+		if (unlikely(rxsc_idx &lt; 0))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		ret = apply_rxsc_cfg(nic, rxsc_idx);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_apply_macsec_cfg(struct aq_nic_s *nic)</div><div class='add'>+{</div><div class='add'>+	int ret = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; AQ_MACSEC_MAX_SC; i++) {</div><div class='add'>+		if (nic-&gt;macsec_cfg-&gt;txsc_idx_busy &amp; BIT(i)) {</div><div class='add'>+			ret = apply_txsc_cfg(nic, i);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; AQ_MACSEC_MAX_SC; i++) {</div><div class='add'>+		if (nic-&gt;macsec_cfg-&gt;rxsc_idx_busy &amp; BIT(i)) {</div><div class='add'>+			ret = apply_rxsc_cfg(nic, i);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_sa_from_sa_idx(const enum aq_macsec_sc_sa sc_sa, const int sa_idx)</div><div class='add'>+{</div><div class='add'>+	switch (sc_sa) {</div><div class='add'>+	case aq_macsec_sa_sc_4sa_8sc:</div><div class='add'>+		return sa_idx &amp; 3;</div><div class='add'>+	case aq_macsec_sa_sc_2sa_16sc:</div><div class='add'>+		return sa_idx &amp; 1;</div><div class='add'>+	case aq_macsec_sa_sc_1sa_32sc:</div><div class='add'>+		return 0;</div><div class='add'>+	default:</div><div class='add'>+		WARN_ONCE(true, "Invalid sc_sa");</div><div class='add'>+	}</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_sc_idx_from_sa_idx(const enum aq_macsec_sc_sa sc_sa,</div><div class='add'>+				 const int sa_idx)</div><div class='add'>+{</div><div class='add'>+	switch (sc_sa) {</div><div class='add'>+	case aq_macsec_sa_sc_4sa_8sc:</div><div class='add'>+		return sa_idx &amp; ~3;</div><div class='add'>+	case aq_macsec_sa_sc_2sa_16sc:</div><div class='add'>+		return sa_idx &amp; ~1;</div><div class='add'>+	case aq_macsec_sa_sc_1sa_32sc:</div><div class='add'>+		return sa_idx;</div><div class='add'>+	default:</div><div class='add'>+		WARN_ONCE(true, "Invalid sc_sa");</div><div class='add'>+	}</div><div class='add'>+	return -EINVAL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aq_check_txsa_expiration(struct aq_nic_s *nic)</div><div class='add'>+{</div><div class='add'>+	u32 egress_sa_expired, egress_sa_threshold_expired;</div><div class='add'>+	struct aq_macsec_cfg *cfg = nic-&gt;macsec_cfg;</div><div class='add'>+	struct aq_hw_s *hw = nic-&gt;aq_hw;</div><div class='add'>+	struct aq_macsec_txsc *aq_txsc;</div><div class='add'>+	const struct macsec_secy *secy;</div><div class='add'>+	int sc_idx = 0, txsc_idx = 0;</div><div class='add'>+	enum aq_macsec_sc_sa sc_sa;</div><div class='add'>+	struct macsec_tx_sa *tx_sa;</div><div class='add'>+	unsigned char an = 0;</div><div class='add'>+	int ret;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	sc_sa = cfg-&gt;sc_sa;</div><div class='add'>+</div><div class='add'>+	ret = aq_mss_get_egress_sa_expired(hw, &amp;egress_sa_expired);</div><div class='add'>+	if (unlikely(ret))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ret = aq_mss_get_egress_sa_threshold_expired(hw,</div><div class='add'>+		&amp;egress_sa_threshold_expired);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; AQ_MACSEC_MAX_SA; i++) {</div><div class='add'>+		if (egress_sa_expired &amp; BIT(i)) {</div><div class='add'>+			an = aq_sa_from_sa_idx(sc_sa, i);</div><div class='add'>+			sc_idx = aq_sc_idx_from_sa_idx(sc_sa, i);</div><div class='add'>+			txsc_idx = aq_get_txsc_idx_from_sc_idx(sc_sa, sc_idx);</div><div class='add'>+			if (txsc_idx &lt; 0)</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			aq_txsc = &amp;cfg-&gt;aq_txsc[txsc_idx];</div><div class='add'>+			if (!(cfg-&gt;txsc_idx_busy &amp; BIT(txsc_idx))) {</div><div class='add'>+				netdev_warn(nic-&gt;ndev,</div><div class='add'>+					"PN threshold expired on invalid TX SC");</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			secy = aq_txsc-&gt;sw_secy;</div><div class='add'>+			if (!netif_running(secy-&gt;netdev)) {</div><div class='add'>+				netdev_warn(nic-&gt;ndev,</div><div class='add'>+					"PN threshold expired on down TX SC");</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (unlikely(!(aq_txsc-&gt;tx_sa_idx_busy &amp; BIT(an)))) {</div><div class='add'>+				netdev_warn(nic-&gt;ndev,</div><div class='add'>+					"PN threshold expired on invalid TX SA");</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			tx_sa = rcu_dereference_bh(secy-&gt;tx_sc.sa[an]);</div><div class='add'>+			macsec_pn_wrapped((struct macsec_secy *)secy, tx_sa);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	aq_mss_set_egress_sa_expired(hw, egress_sa_expired);</div><div class='add'>+	if (likely(!ret))</div><div class='add'>+		aq_mss_set_egress_sa_threshold_expired(hw,</div><div class='add'>+			egress_sa_threshold_expired);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define AQ_LOCKED_MDO_DEF(mdo)						\</div><div class='add'>+static int aq_locked_mdo_##mdo(struct macsec_context *ctx)		\</div><div class='add'>+{									\</div><div class='add'>+	struct aq_nic_s *nic = macsec_netdev_priv(ctx-&gt;netdev);		\</div><div class='add'>+	int ret;							\</div><div class='add'>+	mutex_lock(&amp;nic-&gt;macsec_mutex);					\</div><div class='add'>+	ret = aq_mdo_##mdo(ctx);					\</div><div class='add'>+	mutex_unlock(&amp;nic-&gt;macsec_mutex);				\</div><div class='add'>+	return ret;							\</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+AQ_LOCKED_MDO_DEF(dev_open)</div><div class='add'>+AQ_LOCKED_MDO_DEF(dev_stop)</div><div class='add'>+AQ_LOCKED_MDO_DEF(add_secy)</div><div class='add'>+AQ_LOCKED_MDO_DEF(upd_secy)</div><div class='add'>+AQ_LOCKED_MDO_DEF(del_secy)</div><div class='add'>+AQ_LOCKED_MDO_DEF(add_rxsc)</div><div class='add'>+AQ_LOCKED_MDO_DEF(upd_rxsc)</div><div class='add'>+AQ_LOCKED_MDO_DEF(del_rxsc)</div><div class='add'>+AQ_LOCKED_MDO_DEF(add_rxsa)</div><div class='add'>+AQ_LOCKED_MDO_DEF(upd_rxsa)</div><div class='add'>+AQ_LOCKED_MDO_DEF(del_rxsa)</div><div class='add'>+AQ_LOCKED_MDO_DEF(add_txsa)</div><div class='add'>+AQ_LOCKED_MDO_DEF(upd_txsa)</div><div class='add'>+AQ_LOCKED_MDO_DEF(del_txsa)</div><div class='add'>+AQ_LOCKED_MDO_DEF(get_dev_stats)</div><div class='add'>+AQ_LOCKED_MDO_DEF(get_tx_sc_stats)</div><div class='add'>+AQ_LOCKED_MDO_DEF(get_tx_sa_stats)</div><div class='add'>+AQ_LOCKED_MDO_DEF(get_rx_sc_stats)</div><div class='add'>+AQ_LOCKED_MDO_DEF(get_rx_sa_stats)</div><div class='add'>+</div><div class='add'>+const struct macsec_ops aq_macsec_ops = {</div><div class='add'>+	.mdo_dev_open = aq_locked_mdo_dev_open,</div><div class='add'>+	.mdo_dev_stop = aq_locked_mdo_dev_stop,</div><div class='add'>+	.mdo_add_secy = aq_locked_mdo_add_secy,</div><div class='add'>+	.mdo_upd_secy = aq_locked_mdo_upd_secy,</div><div class='add'>+	.mdo_del_secy = aq_locked_mdo_del_secy,</div><div class='add'>+	.mdo_add_rxsc = aq_locked_mdo_add_rxsc,</div><div class='add'>+	.mdo_upd_rxsc = aq_locked_mdo_upd_rxsc,</div><div class='add'>+	.mdo_del_rxsc = aq_locked_mdo_del_rxsc,</div><div class='add'>+	.mdo_add_rxsa = aq_locked_mdo_add_rxsa,</div><div class='add'>+	.mdo_upd_rxsa = aq_locked_mdo_upd_rxsa,</div><div class='add'>+	.mdo_del_rxsa = aq_locked_mdo_del_rxsa,</div><div class='add'>+	.mdo_add_txsa = aq_locked_mdo_add_txsa,</div><div class='add'>+	.mdo_upd_txsa = aq_locked_mdo_upd_txsa,</div><div class='add'>+	.mdo_del_txsa = aq_locked_mdo_del_txsa,</div><div class='add'>+	.mdo_get_dev_stats = aq_locked_mdo_get_dev_stats,</div><div class='add'>+	.mdo_get_tx_sc_stats = aq_locked_mdo_get_tx_sc_stats,</div><div class='add'>+	.mdo_get_tx_sa_stats = aq_locked_mdo_get_tx_sa_stats,</div><div class='add'>+	.mdo_get_rx_sc_stats = aq_locked_mdo_get_rx_sc_stats,</div><div class='add'>+	.mdo_get_rx_sa_stats = aq_locked_mdo_get_rx_sa_stats,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int aq_macsec_init(struct aq_nic_s *nic)</div><div class='add'>+{</div><div class='add'>+	struct aq_macsec_cfg *cfg;</div><div class='add'>+	u32 caps_lo;</div><div class='add'>+</div><div class='add'>+	if (!nic-&gt;aq_fw_ops-&gt;get_link_capabilities)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	caps_lo = nic-&gt;aq_fw_ops-&gt;get_link_capabilities(nic-&gt;aq_hw);</div><div class='add'>+</div><div class='add'>+	if (!(caps_lo &amp; BIT(CAPS_LO_MACSEC)))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	nic-&gt;macsec_cfg = kzalloc(sizeof(*cfg), GFP_KERNEL);</div><div class='add'>+	if (!nic-&gt;macsec_cfg)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	nic-&gt;ndev-&gt;features |= NETIF_F_HW_MACSEC;</div><div class='add'>+	nic-&gt;ndev-&gt;macsec_ops = &amp;aq_macsec_ops;</div><div class='add'>+	mutex_init(&amp;nic-&gt;macsec_mutex);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void aq_macsec_free(struct aq_nic_s *nic)</div><div class='add'>+{</div><div class='add'>+	kfree(nic-&gt;macsec_cfg);</div><div class='add'>+	nic-&gt;macsec_cfg = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_macsec_enable(struct aq_nic_s *nic)</div><div class='add'>+{</div><div class='add'>+	u32 ctl_ether_types[1] = { ETH_P_PAE };</div><div class='add'>+	struct macsec_msg_fw_response resp = { 0 };</div><div class='add'>+	struct macsec_msg_fw_request msg = { 0 };</div><div class='add'>+	struct aq_hw_s *hw = nic-&gt;aq_hw;</div><div class='add'>+	int num_ctl_ether_types = 0;</div><div class='add'>+	int index = 0, tbl_idx;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (!nic-&gt;macsec_cfg)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;nic-&gt;macsec_mutex);</div><div class='add'>+</div><div class='add'>+	if (nic-&gt;aq_fw_ops-&gt;send_macsec_req) {</div><div class='add'>+		struct macsec_cfg_request cfg = { 0 };</div><div class='add'>+</div><div class='add'>+		cfg.enabled = 1;</div><div class='add'>+		cfg.egress_threshold = 0xffffffff;</div><div class='add'>+		cfg.ingress_threshold = 0xffffffff;</div><div class='add'>+		cfg.interrupts_enabled = 1;</div><div class='add'>+</div><div class='add'>+		msg.msg_type = macsec_cfg_msg;</div><div class='add'>+		msg.cfg = cfg;</div><div class='add'>+</div><div class='add'>+		ret = nic-&gt;aq_fw_ops-&gt;send_macsec_req(hw, &amp;msg, &amp;resp);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto unlock;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Init Ethertype bypass filters */</div><div class='add'>+	for (index = 0; index &lt; ARRAY_SIZE(ctl_ether_types); index++) {</div><div class='add'>+		struct aq_mss_ingress_prectlf_record rx_prectlf_rec;</div><div class='add'>+		struct aq_mss_egress_ctlf_record tx_ctlf_rec;</div><div class='add'>+</div><div class='add'>+		if (ctl_ether_types[index] == 0)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		memset(&amp;tx_ctlf_rec, 0, sizeof(tx_ctlf_rec));</div><div class='add'>+		tx_ctlf_rec.eth_type = ctl_ether_types[index];</div><div class='add'>+		tx_ctlf_rec.match_type = 4; /* Match eth_type only */</div><div class='add'>+		tx_ctlf_rec.match_mask = 0xf; /* match for eth_type */</div><div class='add'>+		tx_ctlf_rec.action = 0; /* Bypass MACSEC modules */</div><div class='add'>+		tbl_idx = NUMROWS_EGRESSCTLFRECORD - num_ctl_ether_types - 1;</div><div class='add'>+		aq_mss_set_egress_ctlf_record(hw, &amp;tx_ctlf_rec, tbl_idx);</div><div class='add'>+</div><div class='add'>+		memset(&amp;rx_prectlf_rec, 0, sizeof(rx_prectlf_rec));</div><div class='add'>+		rx_prectlf_rec.eth_type = ctl_ether_types[index];</div><div class='add'>+		rx_prectlf_rec.match_type = 4; /* Match eth_type only */</div><div class='add'>+		rx_prectlf_rec.match_mask = 0xf; /* match for eth_type */</div><div class='add'>+		rx_prectlf_rec.action = 0; /* Bypass MACSEC modules */</div><div class='add'>+		tbl_idx =</div><div class='add'>+			NUMROWS_INGRESSPRECTLFRECORD - num_ctl_ether_types - 1;</div><div class='add'>+		aq_mss_set_ingress_prectlf_record(hw, &amp;rx_prectlf_rec, tbl_idx);</div><div class='add'>+</div><div class='add'>+		num_ctl_ether_types++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = aq_apply_macsec_cfg(nic);</div><div class='add'>+</div><div class='add'>+unlock:</div><div class='add'>+	mutex_unlock(&amp;nic-&gt;macsec_mutex);</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void aq_macsec_work(struct aq_nic_s *nic)</div><div class='add'>+{</div><div class='add'>+	if (!nic-&gt;macsec_cfg)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (!netif_carrier_ok(nic-&gt;ndev))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;nic-&gt;macsec_mutex);</div><div class='add'>+	aq_check_txsa_expiration(nic);</div><div class='add'>+	mutex_unlock(&amp;nic-&gt;macsec_mutex);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_macsec_rx_sa_cnt(struct aq_nic_s *nic)</div><div class='add'>+{</div><div class='add'>+	struct aq_macsec_cfg *cfg = nic-&gt;macsec_cfg;</div><div class='add'>+	int i, cnt = 0;</div><div class='add'>+</div><div class='add'>+	if (!cfg)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;nic-&gt;macsec_mutex);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; AQ_MACSEC_MAX_SC; i++) {</div><div class='add'>+		if (!test_bit(i, &amp;cfg-&gt;rxsc_idx_busy))</div><div class='add'>+			continue;</div><div class='add'>+		cnt += hweight_long(cfg-&gt;aq_rxsc[i].rx_sa_idx_busy);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;nic-&gt;macsec_mutex);</div><div class='add'>+	return cnt;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_macsec_tx_sc_cnt(struct aq_nic_s *nic)</div><div class='add'>+{</div><div class='add'>+	int cnt;</div><div class='add'>+</div><div class='add'>+	if (!nic-&gt;macsec_cfg)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;nic-&gt;macsec_mutex);</div><div class='add'>+	cnt = hweight_long(nic-&gt;macsec_cfg-&gt;txsc_idx_busy);</div><div class='add'>+	mutex_unlock(&amp;nic-&gt;macsec_mutex);</div><div class='add'>+</div><div class='add'>+	return cnt;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_macsec_tx_sa_cnt(struct aq_nic_s *nic)</div><div class='add'>+{</div><div class='add'>+	struct aq_macsec_cfg *cfg = nic-&gt;macsec_cfg;</div><div class='add'>+	int i, cnt = 0;</div><div class='add'>+</div><div class='add'>+	if (!cfg)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;nic-&gt;macsec_mutex);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; AQ_MACSEC_MAX_SC; i++) {</div><div class='add'>+		if (!test_bit(i, &amp;cfg-&gt;txsc_idx_busy))</div><div class='add'>+			continue;</div><div class='add'>+		cnt += hweight_long(cfg-&gt;aq_txsc[i].tx_sa_idx_busy);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;nic-&gt;macsec_mutex);</div><div class='add'>+	return cnt;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_macsec_update_stats(struct aq_nic_s *nic)</div><div class='add'>+{</div><div class='add'>+	struct aq_macsec_cfg *cfg = nic-&gt;macsec_cfg;</div><div class='add'>+	struct aq_hw_s *hw = nic-&gt;aq_hw;</div><div class='add'>+	struct aq_macsec_txsc *aq_txsc;</div><div class='add'>+	struct aq_macsec_rxsc *aq_rxsc;</div><div class='add'>+	int i, sa_idx, assoc_num;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	aq_get_macsec_common_stats(hw, &amp;cfg-&gt;stats);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; AQ_MACSEC_MAX_SC; i++) {</div><div class='add'>+		if (!(cfg-&gt;txsc_idx_busy &amp; BIT(i)))</div><div class='add'>+			continue;</div><div class='add'>+		aq_txsc = &amp;cfg-&gt;aq_txsc[i];</div><div class='add'>+</div><div class='add'>+		ret = aq_get_txsc_stats(hw, aq_txsc-&gt;hw_sc_idx,</div><div class='add'>+					&amp;aq_txsc-&gt;stats);</div><div class='add'>+		if (ret)</div><div class='add'>+			return ret;</div><div class='add'>+</div><div class='add'>+		for (assoc_num = 0; assoc_num &lt; MACSEC_NUM_AN; assoc_num++) {</div><div class='add'>+			if (!test_bit(assoc_num, &amp;aq_txsc-&gt;tx_sa_idx_busy))</div><div class='add'>+				continue;</div><div class='add'>+			sa_idx = aq_txsc-&gt;hw_sc_idx | assoc_num;</div><div class='add'>+			ret = aq_get_txsa_stats(hw, sa_idx,</div><div class='add'>+					      &amp;aq_txsc-&gt;tx_sa_stats[assoc_num]);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; AQ_MACSEC_MAX_SC; i++) {</div><div class='add'>+		if (!(test_bit(i, &amp;cfg-&gt;rxsc_idx_busy)))</div><div class='add'>+			continue;</div><div class='add'>+		aq_rxsc = &amp;cfg-&gt;aq_rxsc[i];</div><div class='add'>+</div><div class='add'>+		for (assoc_num = 0; assoc_num &lt; MACSEC_NUM_AN; assoc_num++) {</div><div class='add'>+			if (!test_bit(assoc_num, &amp;aq_rxsc-&gt;rx_sa_idx_busy))</div><div class='add'>+				continue;</div><div class='add'>+			sa_idx = aq_rxsc-&gt;hw_sc_idx | assoc_num;</div><div class='add'>+</div><div class='add'>+			ret = aq_get_rxsa_stats(hw, sa_idx,</div><div class='add'>+					      &amp;aq_rxsc-&gt;rx_sa_stats[assoc_num]);</div><div class='add'>+			if (ret)</div><div class='add'>+				return ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u64 *aq_macsec_get_stats(struct aq_nic_s *nic, u64 *data)</div><div class='add'>+{</div><div class='add'>+	struct aq_macsec_cfg *cfg = nic-&gt;macsec_cfg;</div><div class='add'>+	struct aq_macsec_common_stats *common_stats;</div><div class='add'>+	struct aq_macsec_tx_sc_stats *txsc_stats;</div><div class='add'>+	struct aq_macsec_tx_sa_stats *txsa_stats;</div><div class='add'>+	struct aq_macsec_rx_sa_stats *rxsa_stats;</div><div class='add'>+	struct aq_macsec_txsc *aq_txsc;</div><div class='add'>+	struct aq_macsec_rxsc *aq_rxsc;</div><div class='add'>+	unsigned int assoc_num;</div><div class='add'>+	unsigned int sc_num;</div><div class='add'>+	unsigned int i = 0U;</div><div class='add'>+</div><div class='add'>+	if (!cfg)</div><div class='add'>+		return data;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;nic-&gt;macsec_mutex);</div><div class='add'>+</div><div class='add'>+	aq_macsec_update_stats(nic);</div><div class='add'>+</div><div class='add'>+	common_stats = &amp;cfg-&gt;stats;</div><div class='add'>+	data[i] = common_stats-&gt;in.ctl_pkts;</div><div class='add'>+	data[++i] = common_stats-&gt;in.tagged_miss_pkts;</div><div class='add'>+	data[++i] = common_stats-&gt;in.untagged_miss_pkts;</div><div class='add'>+	data[++i] = common_stats-&gt;in.notag_pkts;</div><div class='add'>+	data[++i] = common_stats-&gt;in.untagged_pkts;</div><div class='add'>+	data[++i] = common_stats-&gt;in.bad_tag_pkts;</div><div class='add'>+	data[++i] = common_stats-&gt;in.no_sci_pkts;</div><div class='add'>+	data[++i] = common_stats-&gt;in.unknown_sci_pkts;</div><div class='add'>+	data[++i] = common_stats-&gt;in.ctrl_prt_pass_pkts;</div><div class='add'>+	data[++i] = common_stats-&gt;in.unctrl_prt_pass_pkts;</div><div class='add'>+	data[++i] = common_stats-&gt;in.ctrl_prt_fail_pkts;</div><div class='add'>+	data[++i] = common_stats-&gt;in.unctrl_prt_fail_pkts;</div><div class='add'>+	data[++i] = common_stats-&gt;in.too_long_pkts;</div><div class='add'>+	data[++i] = common_stats-&gt;in.igpoc_ctl_pkts;</div><div class='add'>+	data[++i] = common_stats-&gt;in.ecc_error_pkts;</div><div class='add'>+	data[++i] = common_stats-&gt;in.unctrl_hit_drop_redir;</div><div class='add'>+	data[++i] = common_stats-&gt;out.ctl_pkts;</div><div class='add'>+	data[++i] = common_stats-&gt;out.unknown_sa_pkts;</div><div class='add'>+	data[++i] = common_stats-&gt;out.untagged_pkts;</div><div class='add'>+	data[++i] = common_stats-&gt;out.too_long;</div><div class='add'>+	data[++i] = common_stats-&gt;out.ecc_error_pkts;</div><div class='add'>+	data[++i] = common_stats-&gt;out.unctrl_hit_drop_redir;</div><div class='add'>+</div><div class='add'>+	for (sc_num = 0; sc_num &lt; AQ_MACSEC_MAX_SC; sc_num++) {</div><div class='add'>+		if (!(test_bit(sc_num, &amp;cfg-&gt;txsc_idx_busy)))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		aq_txsc = &amp;cfg-&gt;aq_txsc[sc_num];</div><div class='add'>+		txsc_stats = &amp;aq_txsc-&gt;stats;</div><div class='add'>+</div><div class='add'>+		data[++i] = txsc_stats-&gt;sc_protected_pkts;</div><div class='add'>+		data[++i] = txsc_stats-&gt;sc_encrypted_pkts;</div><div class='add'>+		data[++i] = txsc_stats-&gt;sc_protected_octets;</div><div class='add'>+		data[++i] = txsc_stats-&gt;sc_encrypted_octets;</div><div class='add'>+</div><div class='add'>+		for (assoc_num = 0; assoc_num &lt; MACSEC_NUM_AN; assoc_num++) {</div><div class='add'>+			if (!test_bit(assoc_num, &amp;aq_txsc-&gt;tx_sa_idx_busy))</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			txsa_stats = &amp;aq_txsc-&gt;tx_sa_stats[assoc_num];</div><div class='add'>+</div><div class='add'>+			data[++i] = txsa_stats-&gt;sa_hit_drop_redirect;</div><div class='add'>+			data[++i] = txsa_stats-&gt;sa_protected2_pkts;</div><div class='add'>+			data[++i] = txsa_stats-&gt;sa_protected_pkts;</div><div class='add'>+			data[++i] = txsa_stats-&gt;sa_encrypted_pkts;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (sc_num = 0; sc_num &lt; AQ_MACSEC_MAX_SC; sc_num++) {</div><div class='add'>+		if (!(test_bit(sc_num, &amp;cfg-&gt;rxsc_idx_busy)))</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		aq_rxsc = &amp;cfg-&gt;aq_rxsc[sc_num];</div><div class='add'>+</div><div class='add'>+		for (assoc_num = 0; assoc_num &lt; MACSEC_NUM_AN; assoc_num++) {</div><div class='add'>+			if (!test_bit(assoc_num, &amp;aq_rxsc-&gt;rx_sa_idx_busy))</div><div class='add'>+				continue;</div><div class='add'>+</div><div class='add'>+			rxsa_stats = &amp;aq_rxsc-&gt;rx_sa_stats[assoc_num];</div><div class='add'>+</div><div class='add'>+			data[++i] = rxsa_stats-&gt;untagged_hit_pkts;</div><div class='add'>+			data[++i] = rxsa_stats-&gt;ctrl_hit_drop_redir_pkts;</div><div class='add'>+			data[++i] = rxsa_stats-&gt;not_using_sa;</div><div class='add'>+			data[++i] = rxsa_stats-&gt;unused_sa;</div><div class='add'>+			data[++i] = rxsa_stats-&gt;not_valid_pkts;</div><div class='add'>+			data[++i] = rxsa_stats-&gt;invalid_pkts;</div><div class='add'>+			data[++i] = rxsa_stats-&gt;ok_pkts;</div><div class='add'>+			data[++i] = rxsa_stats-&gt;late_pkts;</div><div class='add'>+			data[++i] = rxsa_stats-&gt;delayed_pkts;</div><div class='add'>+			data[++i] = rxsa_stats-&gt;unchecked_pkts;</div><div class='add'>+			data[++i] = rxsa_stats-&gt;validated_octets;</div><div class='add'>+			data[++i] = rxsa_stats-&gt;decrypted_octets;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	i++;</div><div class='add'>+</div><div class='add'>+	data += i;</div><div class='add'>+</div><div class='add'>+	mutex_unlock(&amp;nic-&gt;macsec_mutex);</div><div class='add'>+</div><div class='add'>+	return data;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_macsec.h b/drivers/net/ethernet/aquantia/atlantic/aq_macsec.h<br/>new file mode 100644<br/>index 000000000000..a47e2710487e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_macsec.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_macsec.h</a></div><div class='hunk'>@@ -0,0 +1,133 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ * Copyright (C) 2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef AQ_MACSEC_H</div><div class='add'>+#define AQ_MACSEC_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#if IS_ENABLED(CONFIG_MACSEC)</div><div class='add'>+</div><div class='add'>+#include "net/macsec.h"</div><div class='add'>+</div><div class='add'>+struct aq_nic_s;</div><div class='add'>+</div><div class='add'>+#define AQ_MACSEC_MAX_SC 32</div><div class='add'>+#define AQ_MACSEC_MAX_SA 32</div><div class='add'>+</div><div class='add'>+enum aq_macsec_sc_sa {</div><div class='add'>+	aq_macsec_sa_sc_4sa_8sc,</div><div class='add'>+	aq_macsec_sa_sc_not_used,</div><div class='add'>+	aq_macsec_sa_sc_2sa_16sc,</div><div class='add'>+	aq_macsec_sa_sc_1sa_32sc,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct aq_macsec_common_stats {</div><div class='add'>+	/* Ingress Common Counters */</div><div class='add'>+	struct {</div><div class='add'>+		u64 ctl_pkts;</div><div class='add'>+		u64 tagged_miss_pkts;</div><div class='add'>+		u64 untagged_miss_pkts;</div><div class='add'>+		u64 notag_pkts;</div><div class='add'>+		u64 untagged_pkts;</div><div class='add'>+		u64 bad_tag_pkts;</div><div class='add'>+		u64 no_sci_pkts;</div><div class='add'>+		u64 unknown_sci_pkts;</div><div class='add'>+		u64 ctrl_prt_pass_pkts;</div><div class='add'>+		u64 unctrl_prt_pass_pkts;</div><div class='add'>+		u64 ctrl_prt_fail_pkts;</div><div class='add'>+		u64 unctrl_prt_fail_pkts;</div><div class='add'>+		u64 too_long_pkts;</div><div class='add'>+		u64 igpoc_ctl_pkts;</div><div class='add'>+		u64 ecc_error_pkts;</div><div class='add'>+		u64 unctrl_hit_drop_redir;</div><div class='add'>+	} in;</div><div class='add'>+</div><div class='add'>+	/* Egress Common Counters */</div><div class='add'>+	struct {</div><div class='add'>+		u64 ctl_pkts;</div><div class='add'>+		u64 unknown_sa_pkts;</div><div class='add'>+		u64 untagged_pkts;</div><div class='add'>+		u64 too_long;</div><div class='add'>+		u64 ecc_error_pkts;</div><div class='add'>+		u64 unctrl_hit_drop_redir;</div><div class='add'>+	} out;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Ingress SA Counters */</div><div class='add'>+struct aq_macsec_rx_sa_stats {</div><div class='add'>+	u64 untagged_hit_pkts;</div><div class='add'>+	u64 ctrl_hit_drop_redir_pkts;</div><div class='add'>+	u64 not_using_sa;</div><div class='add'>+	u64 unused_sa;</div><div class='add'>+	u64 not_valid_pkts;</div><div class='add'>+	u64 invalid_pkts;</div><div class='add'>+	u64 ok_pkts;</div><div class='add'>+	u64 late_pkts;</div><div class='add'>+	u64 delayed_pkts;</div><div class='add'>+	u64 unchecked_pkts;</div><div class='add'>+	u64 validated_octets;</div><div class='add'>+	u64 decrypted_octets;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Egress SA Counters */</div><div class='add'>+struct aq_macsec_tx_sa_stats {</div><div class='add'>+	u64 sa_hit_drop_redirect;</div><div class='add'>+	u64 sa_protected2_pkts;</div><div class='add'>+	u64 sa_protected_pkts;</div><div class='add'>+	u64 sa_encrypted_pkts;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Egress SC Counters */</div><div class='add'>+struct aq_macsec_tx_sc_stats {</div><div class='add'>+	u64 sc_protected_pkts;</div><div class='add'>+	u64 sc_encrypted_pkts;</div><div class='add'>+	u64 sc_protected_octets;</div><div class='add'>+	u64 sc_encrypted_octets;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct aq_macsec_txsc {</div><div class='add'>+	u32 hw_sc_idx;</div><div class='add'>+	unsigned long tx_sa_idx_busy;</div><div class='add'>+	const struct macsec_secy *sw_secy;</div><div class='add'>+	u8 tx_sa_key[MACSEC_NUM_AN][MACSEC_MAX_KEY_LEN];</div><div class='add'>+	struct aq_macsec_tx_sc_stats stats;</div><div class='add'>+	struct aq_macsec_tx_sa_stats tx_sa_stats[MACSEC_NUM_AN];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct aq_macsec_rxsc {</div><div class='add'>+	u32 hw_sc_idx;</div><div class='add'>+	unsigned long rx_sa_idx_busy;</div><div class='add'>+	const struct macsec_secy *sw_secy;</div><div class='add'>+	const struct macsec_rx_sc *sw_rxsc;</div><div class='add'>+	u8 rx_sa_key[MACSEC_NUM_AN][MACSEC_MAX_KEY_LEN];</div><div class='add'>+	struct aq_macsec_rx_sa_stats rx_sa_stats[MACSEC_NUM_AN];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct aq_macsec_cfg {</div><div class='add'>+	enum aq_macsec_sc_sa sc_sa;</div><div class='add'>+	/* Egress channel configuration */</div><div class='add'>+	unsigned long txsc_idx_busy;</div><div class='add'>+	struct aq_macsec_txsc aq_txsc[AQ_MACSEC_MAX_SC];</div><div class='add'>+	/* Ingress channel configuration */</div><div class='add'>+	unsigned long rxsc_idx_busy;</div><div class='add'>+	struct aq_macsec_rxsc aq_rxsc[AQ_MACSEC_MAX_SC];</div><div class='add'>+	/* Statistics / counters */</div><div class='add'>+	struct aq_macsec_common_stats stats;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+extern const struct macsec_ops aq_macsec_ops;</div><div class='add'>+</div><div class='add'>+int aq_macsec_init(struct aq_nic_s *nic);</div><div class='add'>+void aq_macsec_free(struct aq_nic_s *nic);</div><div class='add'>+int aq_macsec_enable(struct aq_nic_s *nic);</div><div class='add'>+void aq_macsec_work(struct aq_nic_s *nic);</div><div class='add'>+u64 *aq_macsec_get_stats(struct aq_nic_s *nic, u64 *data);</div><div class='add'>+int aq_macsec_rx_sa_cnt(struct aq_nic_s *nic);</div><div class='add'>+int aq_macsec_tx_sc_cnt(struct aq_nic_s *nic);</div><div class='add'>+int aq_macsec_tx_sa_cnt(struct aq_nic_s *nic);</div><div class='add'>+</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif /* AQ_MACSEC_H */</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_main.c b/drivers/net/ethernet/aquantia/atlantic/aq_main.c<br/>new file mode 100644<br/>index 000000000000..4ef4fe64b8ac<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_main.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_main.c</a></div><div class='hunk'>@@ -0,0 +1,505 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2014-2019 aQuantia Corporation</div><div class='add'>+ * Copyright (C) 2019-2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* File aq_main.c: Main file for aQuantia Linux driver. */</div><div class='add'>+</div><div class='add'>+#include "aq_main.h"</div><div class='add'>+#include "aq_nic.h"</div><div class='add'>+#include "aq_pci_func.h"</div><div class='add'>+#include "aq_ethtool.h"</div><div class='add'>+#include "aq_ptp.h"</div><div class='add'>+#include "aq_filters.h"</div><div class='add'>+#include "aq_hw_utils.h"</div><div class='add'>+#include "aq_vec.h"</div><div class='add'>+</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+#include &lt;linux/ip.h&gt;</div><div class='add'>+#include &lt;linux/udp.h&gt;</div><div class='add'>+#include &lt;net/pkt_cls.h&gt;</div><div class='add'>+#include &lt;net/pkt_sched.h&gt;</div><div class='add'>+#include &lt;linux/filter.h&gt;</div><div class='add'>+</div><div class='add'>+MODULE_LICENSE("GPL v2");</div><div class='add'>+MODULE_AUTHOR(AQ_CFG_DRV_AUTHOR);</div><div class='add'>+MODULE_DESCRIPTION(AQ_CFG_DRV_DESC);</div><div class='add'>+</div><div class='add'>+DEFINE_STATIC_KEY_FALSE(aq_xdp_locking_key);</div><div class='add'>+EXPORT_SYMBOL(aq_xdp_locking_key);</div><div class='add'>+</div><div class='add'>+static const char aq_ndev_driver_name[] = AQ_CFG_DRV_NAME;</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops aq_ndev_ops;</div><div class='add'>+</div><div class='add'>+static struct workqueue_struct *aq_ndev_wq;</div><div class='add'>+</div><div class='add'>+void aq_ndev_schedule_work(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	queue_work(aq_ndev_wq, work);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct net_device *aq_ndev_alloc(void)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = NULL;</div><div class='add'>+	struct aq_nic_s *aq_nic = NULL;</div><div class='add'>+</div><div class='add'>+	ndev = alloc_etherdev_mq(sizeof(struct aq_nic_s), AQ_HW_QUEUES_MAX);</div><div class='add'>+	if (!ndev)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	aq_nic = netdev_priv(ndev);</div><div class='add'>+	aq_nic-&gt;ndev = ndev;</div><div class='add'>+	ndev-&gt;netdev_ops = &amp;aq_ndev_ops;</div><div class='add'>+	ndev-&gt;ethtool_ops = &amp;aq_ethtool_ops;</div><div class='add'>+</div><div class='add'>+	return ndev;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_ndev_open(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	err = aq_nic_init(aq_nic);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	err = aq_reapply_rxnfc_all_rules(aq_nic);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	err = aq_filters_vlans_update(aq_nic);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	err = aq_nic_start(aq_nic);</div><div class='add'>+	if (err &lt; 0) {</div><div class='add'>+		aq_nic_stop(aq_nic);</div><div class='add'>+		goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		aq_nic_deinit(aq_nic, true);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_ndev_close(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	err = aq_nic_stop(aq_nic);</div><div class='add'>+	aq_nic_deinit(aq_nic, true);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static netdev_tx_t aq_ndev_start_xmit(struct sk_buff *skb, struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+#if IS_REACHABLE(CONFIG_PTP_1588_CLOCK)</div><div class='add'>+	if (unlikely(aq_utils_obj_test(&amp;aq_nic-&gt;flags, AQ_NIC_PTP_DPATH_UP))) {</div><div class='add'>+		/* Hardware adds the Timestamp for PTPv2 802.AS1</div><div class='add'>+		 * and PTPv2 IPv4 UDP.</div><div class='add'>+		 * We have to push even general 320 port messages to the ptp</div><div class='add'>+		 * queue explicitly. This is a limitation of current firmware</div><div class='add'>+		 * and hardware PTP design of the chip. Otherwise ptp stream</div><div class='add'>+		 * will fail to sync</div><div class='add'>+		 */</div><div class='add'>+		if (unlikely(skb_shinfo(skb)-&gt;tx_flags &amp; SKBTX_HW_TSTAMP) ||</div><div class='add'>+		    unlikely((ip_hdr(skb)-&gt;version == 4) &amp;&amp;</div><div class='add'>+			     (ip_hdr(skb)-&gt;protocol == IPPROTO_UDP) &amp;&amp;</div><div class='add'>+			     ((udp_hdr(skb)-&gt;dest == htons(319)) ||</div><div class='add'>+			      (udp_hdr(skb)-&gt;dest == htons(320)))) ||</div><div class='add'>+		    unlikely(eth_hdr(skb)-&gt;h_proto == htons(ETH_P_1588)))</div><div class='add'>+			return aq_ptp_xmit(aq_nic, skb);</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	return aq_nic_xmit(aq_nic, skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_ndev_change_mtu(struct net_device *ndev, int new_mtu)</div><div class='add'>+{</div><div class='add'>+	int new_frame_size = new_mtu + ETH_HLEN + ETH_FCS_LEN;</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+	struct bpf_prog *prog;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	prog = READ_ONCE(aq_nic-&gt;xdp_prog);</div><div class='add'>+	if (prog &amp;&amp; !prog-&gt;aux-&gt;xdp_has_frags &amp;&amp;</div><div class='add'>+	    new_frame_size &gt; AQ_CFG_RX_FRAME_MAX) {</div><div class='add'>+		netdev_err(ndev, "Illegal MTU %d for XDP prog without frags\n",</div><div class='add'>+			   ndev-&gt;mtu);</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = aq_nic_set_mtu(aq_nic, new_mtu + ETH_HLEN);</div><div class='add'>+</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+	WRITE_ONCE(ndev-&gt;mtu, new_mtu);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_ndev_set_features(struct net_device *ndev,</div><div class='add'>+				netdev_features_t features)</div><div class='add'>+{</div><div class='add'>+	bool is_vlan_tx_insert = !!(features &amp; NETIF_F_HW_VLAN_CTAG_TX);</div><div class='add'>+	bool is_vlan_rx_strip = !!(features &amp; NETIF_F_HW_VLAN_CTAG_RX);</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+	bool need_ndev_restart = false;</div><div class='add'>+	struct aq_nic_cfg_s *aq_cfg;</div><div class='add'>+	bool is_lro = false;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	aq_cfg = aq_nic_get_cfg(aq_nic);</div><div class='add'>+</div><div class='add'>+	if (!(features &amp; NETIF_F_NTUPLE)) {</div><div class='add'>+		if (aq_nic-&gt;ndev-&gt;features &amp; NETIF_F_NTUPLE) {</div><div class='add'>+			err = aq_clear_rxnfc_all_rules(aq_nic);</div><div class='add'>+			if (unlikely(err))</div><div class='add'>+				goto err_exit;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	if (!(features &amp; NETIF_F_HW_VLAN_CTAG_FILTER)) {</div><div class='add'>+		if (aq_nic-&gt;ndev-&gt;features &amp; NETIF_F_HW_VLAN_CTAG_FILTER) {</div><div class='add'>+			err = aq_filters_vlan_offload_off(aq_nic);</div><div class='add'>+			if (unlikely(err))</div><div class='add'>+				goto err_exit;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	aq_cfg-&gt;features = features;</div><div class='add'>+</div><div class='add'>+	if (aq_cfg-&gt;aq_hw_caps-&gt;hw_features &amp; NETIF_F_LRO) {</div><div class='add'>+		is_lro = features &amp; NETIF_F_LRO;</div><div class='add'>+</div><div class='add'>+		if (aq_cfg-&gt;is_lro != is_lro) {</div><div class='add'>+			aq_cfg-&gt;is_lro = is_lro;</div><div class='add'>+			need_ndev_restart = true;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if ((aq_nic-&gt;ndev-&gt;features ^ features) &amp; NETIF_F_RXCSUM) {</div><div class='add'>+		err = aq_nic-&gt;aq_hw_ops-&gt;hw_set_offload(aq_nic-&gt;aq_hw,</div><div class='add'>+							aq_cfg);</div><div class='add'>+</div><div class='add'>+		if (unlikely(err))</div><div class='add'>+			goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (aq_cfg-&gt;is_vlan_rx_strip != is_vlan_rx_strip) {</div><div class='add'>+		aq_cfg-&gt;is_vlan_rx_strip = is_vlan_rx_strip;</div><div class='add'>+		need_ndev_restart = true;</div><div class='add'>+	}</div><div class='add'>+	if (aq_cfg-&gt;is_vlan_tx_insert != is_vlan_tx_insert) {</div><div class='add'>+		aq_cfg-&gt;is_vlan_tx_insert = is_vlan_tx_insert;</div><div class='add'>+		need_ndev_restart = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (need_ndev_restart &amp;&amp; netif_running(ndev)) {</div><div class='add'>+		aq_ndev_close(ndev);</div><div class='add'>+		aq_ndev_open(ndev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static netdev_features_t aq_ndev_fix_features(struct net_device *ndev,</div><div class='add'>+					      netdev_features_t features)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+	struct bpf_prog *prog;</div><div class='add'>+</div><div class='add'>+	if (!(features &amp; NETIF_F_RXCSUM))</div><div class='add'>+		features &amp;= ~NETIF_F_LRO;</div><div class='add'>+</div><div class='add'>+	prog = READ_ONCE(aq_nic-&gt;xdp_prog);</div><div class='add'>+	if (prog &amp;&amp; !prog-&gt;aux-&gt;xdp_has_frags &amp;&amp;</div><div class='add'>+	    aq_nic-&gt;xdp_prog &amp;&amp; features &amp; NETIF_F_LRO) {</div><div class='add'>+		netdev_err(ndev, "LRO is not supported with single buffer XDP, disabling\n");</div><div class='add'>+		features &amp;= ~NETIF_F_LRO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return features;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_ndev_set_mac_address(struct net_device *ndev, void *addr)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	err = eth_mac_addr(ndev, addr);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+	err = aq_nic_set_mac(aq_nic, ndev);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aq_ndev_set_multicast_settings(struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	(void)aq_nic_set_multicast_list(aq_nic, ndev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_ndev_hwtstamp_set(struct net_device *netdev,</div><div class='add'>+				struct kernel_hwtstamp_config *config,</div><div class='add'>+				struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	if (!IS_REACHABLE(CONFIG_PTP_1588_CLOCK) || !aq_nic-&gt;aq_ptp)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	switch (config-&gt;tx_type) {</div><div class='add'>+	case HWTSTAMP_TX_OFF:</div><div class='add'>+	case HWTSTAMP_TX_ON:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	switch (config-&gt;rx_filter) {</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_SYNC:</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:</div><div class='add'>+		config-&gt;rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;</div><div class='add'>+		break;</div><div class='add'>+	case HWTSTAMP_FILTER_PTP_V2_EVENT:</div><div class='add'>+	case HWTSTAMP_FILTER_NONE:</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return aq_ptp_hwtstamp_config_set(aq_nic-&gt;aq_ptp, config);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_ndev_hwtstamp_get(struct net_device *netdev,</div><div class='add'>+				struct kernel_hwtstamp_config *config)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(netdev);</div><div class='add'>+</div><div class='add'>+	if (!aq_nic-&gt;aq_ptp)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	aq_ptp_hwtstamp_config_get(aq_nic-&gt;aq_ptp, config);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_ndo_vlan_rx_add_vid(struct net_device *ndev, __be16 proto,</div><div class='add'>+				  u16 vid)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	if (!aq_nic-&gt;aq_hw_ops-&gt;hw_filter_vlan_set)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	set_bit(vid, aq_nic-&gt;active_vlans);</div><div class='add'>+</div><div class='add'>+	return aq_filters_vlans_update(aq_nic);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_ndo_vlan_rx_kill_vid(struct net_device *ndev, __be16 proto,</div><div class='add'>+				   u16 vid)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+</div><div class='add'>+	if (!aq_nic-&gt;aq_hw_ops-&gt;hw_filter_vlan_set)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	clear_bit(vid, aq_nic-&gt;active_vlans);</div><div class='add'>+</div><div class='add'>+	if (-ENOENT == aq_del_fvlan_by_vlan(aq_nic, vid))</div><div class='add'>+		return aq_filters_vlans_update(aq_nic);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_validate_mqprio_opt(struct aq_nic_s *self,</div><div class='add'>+				  struct tc_mqprio_qopt_offload *mqprio,</div><div class='add'>+				  const unsigned int num_tc)</div><div class='add'>+{</div><div class='add'>+	const bool has_min_rate = !!(mqprio-&gt;flags &amp; TC_MQPRIO_F_MIN_RATE);</div><div class='add'>+	struct aq_nic_cfg_s *aq_nic_cfg = aq_nic_get_cfg(self);</div><div class='add'>+	const unsigned int tcs_max = min_t(u8, aq_nic_cfg-&gt;aq_hw_caps-&gt;tcs_max,</div><div class='add'>+					   AQ_CFG_TCS_MAX);</div><div class='add'>+</div><div class='add'>+	if (num_tc &gt; tcs_max) {</div><div class='add'>+		netdev_err(self-&gt;ndev, "Too many TCs requested\n");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (num_tc != 0 &amp;&amp; !is_power_of_2(num_tc)) {</div><div class='add'>+		netdev_err(self-&gt;ndev, "TC count should be power of 2\n");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (has_min_rate &amp;&amp; !ATL_HW_IS_CHIP_FEATURE(self-&gt;aq_hw, ANTIGUA)) {</div><div class='add'>+		netdev_err(self-&gt;ndev, "Min tx rate is not supported\n");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_ndo_setup_tc(struct net_device *dev, enum tc_setup_type type,</div><div class='add'>+			   void *type_data)</div><div class='add'>+{</div><div class='add'>+	struct tc_mqprio_qopt_offload *mqprio = type_data;</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(dev);</div><div class='add'>+	bool has_min_rate;</div><div class='add'>+	bool has_max_rate;</div><div class='add'>+	int err;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (type != TC_SETUP_QDISC_MQPRIO)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	has_min_rate = !!(mqprio-&gt;flags &amp; TC_MQPRIO_F_MIN_RATE);</div><div class='add'>+	has_max_rate = !!(mqprio-&gt;flags &amp; TC_MQPRIO_F_MAX_RATE);</div><div class='add'>+</div><div class='add'>+	err = aq_validate_mqprio_opt(aq_nic, mqprio, mqprio-&gt;qopt.num_tc);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; mqprio-&gt;qopt.num_tc; i++) {</div><div class='add'>+		if (has_max_rate) {</div><div class='add'>+			u64 max_rate = mqprio-&gt;max_rate[i];</div><div class='add'>+</div><div class='add'>+			do_div(max_rate, AQ_MBPS_DIVISOR);</div><div class='add'>+			aq_nic_setup_tc_max_rate(aq_nic, i, (u32)max_rate);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (has_min_rate) {</div><div class='add'>+			u64 min_rate = mqprio-&gt;min_rate[i];</div><div class='add'>+</div><div class='add'>+			do_div(min_rate, AQ_MBPS_DIVISOR);</div><div class='add'>+			aq_nic_setup_tc_min_rate(aq_nic, i, (u32)min_rate);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return aq_nic_setup_tc_mqprio(aq_nic, mqprio-&gt;qopt.num_tc,</div><div class='add'>+				      mqprio-&gt;qopt.prio_tc_map);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_xdp_setup(struct net_device *ndev, struct bpf_prog *prog,</div><div class='add'>+			struct netlink_ext_ack *extack)</div><div class='add'>+{</div><div class='add'>+	bool need_update, running = netif_running(ndev);</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(ndev);</div><div class='add'>+	struct bpf_prog *old_prog;</div><div class='add'>+</div><div class='add'>+	if (prog &amp;&amp; !prog-&gt;aux-&gt;xdp_has_frags) {</div><div class='add'>+		if (ndev-&gt;mtu &gt; AQ_CFG_RX_FRAME_MAX) {</div><div class='add'>+			NL_SET_ERR_MSG_MOD(extack,</div><div class='add'>+					   "prog does not support XDP frags");</div><div class='add'>+			return -EOPNOTSUPP;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (prog &amp;&amp; ndev-&gt;features &amp; NETIF_F_LRO) {</div><div class='add'>+			netdev_err(ndev,</div><div class='add'>+				   "LRO is not supported with single buffer XDP, disabling\n");</div><div class='add'>+			ndev-&gt;features &amp;= ~NETIF_F_LRO;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	need_update = !!aq_nic-&gt;xdp_prog != !!prog;</div><div class='add'>+	if (running &amp;&amp; need_update)</div><div class='add'>+		aq_ndev_close(ndev);</div><div class='add'>+</div><div class='add'>+	old_prog = xchg(&amp;aq_nic-&gt;xdp_prog, prog);</div><div class='add'>+	if (old_prog)</div><div class='add'>+		bpf_prog_put(old_prog);</div><div class='add'>+</div><div class='add'>+	if (!old_prog &amp;&amp; prog)</div><div class='add'>+		static_branch_inc(&amp;aq_xdp_locking_key);</div><div class='add'>+	else if (old_prog &amp;&amp; !prog)</div><div class='add'>+		static_branch_dec(&amp;aq_xdp_locking_key);</div><div class='add'>+</div><div class='add'>+	if (running &amp;&amp; need_update)</div><div class='add'>+		return aq_ndev_open(ndev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_xdp(struct net_device *dev, struct netdev_bpf *xdp)</div><div class='add'>+{</div><div class='add'>+	switch (xdp-&gt;command) {</div><div class='add'>+	case XDP_SETUP_PROG:</div><div class='add'>+		return aq_xdp_setup(dev, xdp-&gt;prog, xdp-&gt;extack);</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct net_device_ops aq_ndev_ops = {</div><div class='add'>+	.ndo_open = aq_ndev_open,</div><div class='add'>+	.ndo_stop = aq_ndev_close,</div><div class='add'>+	.ndo_start_xmit = aq_ndev_start_xmit,</div><div class='add'>+	.ndo_set_rx_mode = aq_ndev_set_multicast_settings,</div><div class='add'>+	.ndo_change_mtu = aq_ndev_change_mtu,</div><div class='add'>+	.ndo_set_mac_address = aq_ndev_set_mac_address,</div><div class='add'>+	.ndo_set_features = aq_ndev_set_features,</div><div class='add'>+	.ndo_fix_features = aq_ndev_fix_features,</div><div class='add'>+	.ndo_vlan_rx_add_vid = aq_ndo_vlan_rx_add_vid,</div><div class='add'>+	.ndo_vlan_rx_kill_vid = aq_ndo_vlan_rx_kill_vid,</div><div class='add'>+	.ndo_setup_tc = aq_ndo_setup_tc,</div><div class='add'>+	.ndo_bpf = aq_xdp,</div><div class='add'>+	.ndo_xdp_xmit = aq_xdp_xmit,</div><div class='add'>+	.ndo_hwtstamp_get = aq_ndev_hwtstamp_get,</div><div class='add'>+	.ndo_hwtstamp_set = aq_ndev_hwtstamp_set,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int __init aq_ndev_init_module(void)</div><div class='add'>+{</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	aq_ndev_wq = create_singlethread_workqueue(aq_ndev_driver_name);</div><div class='add'>+	if (!aq_ndev_wq) {</div><div class='add'>+		pr_err("Failed to create workqueue\n");</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ret = aq_pci_func_register_driver();</div><div class='add'>+	if (ret) {</div><div class='add'>+		destroy_workqueue(aq_ndev_wq);</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void __exit aq_ndev_exit_module(void)</div><div class='add'>+{</div><div class='add'>+	aq_pci_func_unregister_driver();</div><div class='add'>+</div><div class='add'>+	if (aq_ndev_wq) {</div><div class='add'>+		destroy_workqueue(aq_ndev_wq);</div><div class='add'>+		aq_ndev_wq = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+module_init(aq_ndev_init_module);</div><div class='add'>+module_exit(aq_ndev_exit_module);</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_main.h b/drivers/net/ethernet/aquantia/atlantic/aq_main.h<br/>new file mode 100644<br/>index 000000000000..a78c1a168d8e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_main.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_main.h</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*</div><div class='add'>+ * aQuantia Corporation Network Driver</div><div class='add'>+ * Copyright (C) 2014-2017 aQuantia Corporation. All rights reserved</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* File aq_main.h: Main file for aQuantia Linux driver. */</div><div class='add'>+</div><div class='add'>+#ifndef AQ_MAIN_H</div><div class='add'>+#define AQ_MAIN_H</div><div class='add'>+</div><div class='add'>+#include "aq_common.h"</div><div class='add'>+#include "aq_nic.h"</div><div class='add'>+</div><div class='add'>+DECLARE_STATIC_KEY_FALSE(aq_xdp_locking_key);</div><div class='add'>+</div><div class='add'>+void aq_ndev_schedule_work(struct work_struct *work);</div><div class='add'>+struct net_device *aq_ndev_alloc(void);</div><div class='add'>+int aq_ndev_open(struct net_device *ndev);</div><div class='add'>+int aq_ndev_close(struct net_device *ndev);</div><div class='add'>+</div><div class='add'>+#endif /* AQ_MAIN_H */</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_nic.c b/drivers/net/ethernet/aquantia/atlantic/aq_nic.c<br/>new file mode 100644<br/>index 000000000000..b24eaa5283fa<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_nic.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_nic.c</a></div><div class='hunk'>@@ -0,0 +1,1695 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2014-2019 aQuantia Corporation</div><div class='add'>+ * Copyright (C) 2019-2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* File aq_nic.c: Definition of common code for NIC. */</div><div class='add'>+</div><div class='add'>+#include "aq_nic.h"</div><div class='add'>+#include "aq_ring.h"</div><div class='add'>+#include "aq_vec.h"</div><div class='add'>+#include "aq_hw.h"</div><div class='add'>+#include "aq_pci_func.h"</div><div class='add'>+#include "aq_macsec.h"</div><div class='add'>+#include "aq_main.h"</div><div class='add'>+#include "aq_phy.h"</div><div class='add'>+#include "aq_ptp.h"</div><div class='add'>+#include "aq_filters.h"</div><div class='add'>+</div><div class='add'>+#include &lt;linux/moduleparam.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+#include &lt;linux/timer.h&gt;</div><div class='add'>+#include &lt;linux/cpu.h&gt;</div><div class='add'>+#include &lt;linux/ip.h&gt;</div><div class='add'>+#include &lt;linux/tcp.h&gt;</div><div class='add'>+#include &lt;net/ip.h&gt;</div><div class='add'>+#include &lt;net/pkt_cls.h&gt;</div><div class='add'>+</div><div class='add'>+static unsigned int aq_itr = AQ_CFG_INTERRUPT_MODERATION_AUTO;</div><div class='add'>+module_param_named(aq_itr, aq_itr, uint, 0644);</div><div class='add'>+MODULE_PARM_DESC(aq_itr, "Interrupt throttling mode");</div><div class='add'>+</div><div class='add'>+static unsigned int aq_itr_tx;</div><div class='add'>+module_param_named(aq_itr_tx, aq_itr_tx, uint, 0644);</div><div class='add'>+MODULE_PARM_DESC(aq_itr_tx, "TX interrupt throttle rate");</div><div class='add'>+</div><div class='add'>+static unsigned int aq_itr_rx;</div><div class='add'>+module_param_named(aq_itr_rx, aq_itr_rx, uint, 0644);</div><div class='add'>+MODULE_PARM_DESC(aq_itr_rx, "RX interrupt throttle rate");</div><div class='add'>+</div><div class='add'>+static void aq_nic_update_ndev_stats(struct aq_nic_s *self);</div><div class='add'>+</div><div class='add'>+static void aq_nic_rss_init(struct aq_nic_s *self, unsigned int num_rss_queues)</div><div class='add'>+{</div><div class='add'>+	static u8 rss_key[AQ_CFG_RSS_HASHKEY_SIZE] = {</div><div class='add'>+		0x1e, 0xad, 0x71, 0x87, 0x65, 0xfc, 0x26, 0x7d,</div><div class='add'>+		0x0d, 0x45, 0x67, 0x74, 0xcd, 0x06, 0x1a, 0x18,</div><div class='add'>+		0xb6, 0xc1, 0xf0, 0xc7, 0xbb, 0x18, 0xbe, 0xf8,</div><div class='add'>+		0x19, 0x13, 0x4b, 0xa9, 0xd0, 0x3e, 0xfe, 0x70,</div><div class='add'>+		0x25, 0x03, 0xab, 0x50, 0x6a, 0x8b, 0x82, 0x0c</div><div class='add'>+	};</div><div class='add'>+	struct aq_nic_cfg_s *cfg = &amp;self-&gt;aq_nic_cfg;</div><div class='add'>+	struct aq_rss_parameters *rss_params;</div><div class='add'>+	int i = 0;</div><div class='add'>+</div><div class='add'>+	rss_params = &amp;cfg-&gt;aq_rss;</div><div class='add'>+</div><div class='add'>+	rss_params-&gt;hash_secret_key_size = sizeof(rss_key);</div><div class='add'>+	memcpy(rss_params-&gt;hash_secret_key, rss_key, sizeof(rss_key));</div><div class='add'>+	rss_params-&gt;indirection_table_size = AQ_CFG_RSS_INDIRECTION_TABLE_MAX;</div><div class='add'>+</div><div class='add'>+	for (i = rss_params-&gt;indirection_table_size; i--;)</div><div class='add'>+		rss_params-&gt;indirection_table[i] = i &amp; (num_rss_queues - 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Recalculate the number of vectors */</div><div class='add'>+static void aq_nic_cfg_update_num_vecs(struct aq_nic_s *self)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_cfg_s *cfg = &amp;self-&gt;aq_nic_cfg;</div><div class='add'>+</div><div class='add'>+	cfg-&gt;vecs = min(cfg-&gt;aq_hw_caps-&gt;vecs, AQ_CFG_VECS_DEF);</div><div class='add'>+	cfg-&gt;vecs = min(cfg-&gt;vecs, num_online_cpus());</div><div class='add'>+	if (self-&gt;irqvecs &gt; AQ_HW_SERVICE_IRQS)</div><div class='add'>+		cfg-&gt;vecs = min(cfg-&gt;vecs, self-&gt;irqvecs - AQ_HW_SERVICE_IRQS);</div><div class='add'>+	/* cfg-&gt;vecs should be power of 2 for RSS */</div><div class='add'>+	cfg-&gt;vecs = rounddown_pow_of_two(cfg-&gt;vecs);</div><div class='add'>+</div><div class='add'>+	if (ATL_HW_IS_CHIP_FEATURE(self-&gt;aq_hw, ANTIGUA)) {</div><div class='add'>+		if (cfg-&gt;tcs &gt; 2)</div><div class='add'>+			cfg-&gt;vecs = min(cfg-&gt;vecs, 4U);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cfg-&gt;vecs &lt;= 4)</div><div class='add'>+		cfg-&gt;tc_mode = AQ_TC_MODE_8TCS;</div><div class='add'>+	else</div><div class='add'>+		cfg-&gt;tc_mode = AQ_TC_MODE_4TCS;</div><div class='add'>+</div><div class='add'>+	/*rss rings */</div><div class='add'>+	cfg-&gt;num_rss_queues = min(cfg-&gt;vecs, AQ_CFG_NUM_RSS_QUEUES_DEF);</div><div class='add'>+	aq_nic_rss_init(self, cfg-&gt;num_rss_queues);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Checks hw_caps and 'corrects' aq_nic_cfg in runtime */</div><div class='add'>+void aq_nic_cfg_start(struct aq_nic_s *self)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_cfg_s *cfg = &amp;self-&gt;aq_nic_cfg;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	cfg-&gt;tcs = AQ_CFG_TCS_DEF;</div><div class='add'>+</div><div class='add'>+	cfg-&gt;is_polling = AQ_CFG_IS_POLLING_DEF;</div><div class='add'>+</div><div class='add'>+	cfg-&gt;itr = aq_itr;</div><div class='add'>+	cfg-&gt;tx_itr = aq_itr_tx;</div><div class='add'>+	cfg-&gt;rx_itr = aq_itr_rx;</div><div class='add'>+</div><div class='add'>+	cfg-&gt;rxpageorder = AQ_CFG_RX_PAGEORDER;</div><div class='add'>+	cfg-&gt;is_rss = AQ_CFG_IS_RSS_DEF;</div><div class='add'>+	cfg-&gt;aq_rss.base_cpu_number = AQ_CFG_RSS_BASE_CPU_NUM_DEF;</div><div class='add'>+	cfg-&gt;fc.req = AQ_CFG_FC_MODE;</div><div class='add'>+	cfg-&gt;wol = AQ_CFG_WOL_MODES;</div><div class='add'>+</div><div class='add'>+	cfg-&gt;mtu = AQ_CFG_MTU_DEF;</div><div class='add'>+	cfg-&gt;link_speed_msk = AQ_CFG_SPEED_MSK;</div><div class='add'>+	cfg-&gt;is_autoneg = AQ_CFG_IS_AUTONEG_DEF;</div><div class='add'>+</div><div class='add'>+	cfg-&gt;is_lro = AQ_CFG_IS_LRO_DEF;</div><div class='add'>+	cfg-&gt;is_ptp = true;</div><div class='add'>+</div><div class='add'>+	/*descriptors */</div><div class='add'>+	cfg-&gt;rxds = min(cfg-&gt;aq_hw_caps-&gt;rxds_max, AQ_CFG_RXDS_DEF);</div><div class='add'>+	cfg-&gt;txds = min(cfg-&gt;aq_hw_caps-&gt;txds_max, AQ_CFG_TXDS_DEF);</div><div class='add'>+</div><div class='add'>+	aq_nic_cfg_update_num_vecs(self);</div><div class='add'>+</div><div class='add'>+	cfg-&gt;irq_type = aq_pci_func_get_irq_type(self);</div><div class='add'>+</div><div class='add'>+	if ((cfg-&gt;irq_type == AQ_HW_IRQ_INTX) ||</div><div class='add'>+	    (cfg-&gt;aq_hw_caps-&gt;vecs == 1U) ||</div><div class='add'>+	    (cfg-&gt;vecs == 1U)) {</div><div class='add'>+		cfg-&gt;is_rss = 0U;</div><div class='add'>+		cfg-&gt;vecs = 1U;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Check if we have enough vectors allocated for</div><div class='add'>+	 * link status IRQ. If no - we'll know link state from</div><div class='add'>+	 * slower service task.</div><div class='add'>+	 */</div><div class='add'>+	if (AQ_HW_SERVICE_IRQS &gt; 0 &amp;&amp; cfg-&gt;vecs + 1 &lt;= self-&gt;irqvecs)</div><div class='add'>+		cfg-&gt;link_irq_vec = cfg-&gt;vecs;</div><div class='add'>+	else</div><div class='add'>+		cfg-&gt;link_irq_vec = 0;</div><div class='add'>+</div><div class='add'>+	cfg-&gt;link_speed_msk &amp;= cfg-&gt;aq_hw_caps-&gt;link_speed_msk;</div><div class='add'>+	cfg-&gt;features = cfg-&gt;aq_hw_caps-&gt;hw_features;</div><div class='add'>+	cfg-&gt;is_vlan_rx_strip = !!(cfg-&gt;features &amp; NETIF_F_HW_VLAN_CTAG_RX);</div><div class='add'>+	cfg-&gt;is_vlan_tx_insert = !!(cfg-&gt;features &amp; NETIF_F_HW_VLAN_CTAG_TX);</div><div class='add'>+	cfg-&gt;is_vlan_force_promisc = true;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; sizeof(cfg-&gt;prio_tc_map); i++)</div><div class='add'>+		cfg-&gt;prio_tc_map[i] = cfg-&gt;tcs * i / 8;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_nic_update_link_status(struct aq_nic_s *self)</div><div class='add'>+{</div><div class='add'>+	int err = self-&gt;aq_fw_ops-&gt;update_link_status(self-&gt;aq_hw);</div><div class='add'>+	u32 fc = 0;</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	if (self-&gt;aq_fw_ops-&gt;get_flow_control)</div><div class='add'>+		self-&gt;aq_fw_ops-&gt;get_flow_control(self-&gt;aq_hw, &amp;fc);</div><div class='add'>+	self-&gt;aq_nic_cfg.fc.cur = fc;</div><div class='add'>+</div><div class='add'>+	if (self-&gt;link_status.mbps != self-&gt;aq_hw-&gt;aq_link_status.mbps) {</div><div class='add'>+		netdev_info(self-&gt;ndev, "%s: link change old %d new %d\n",</div><div class='add'>+			    AQ_CFG_DRV_NAME, self-&gt;link_status.mbps,</div><div class='add'>+			    self-&gt;aq_hw-&gt;aq_link_status.mbps);</div><div class='add'>+		aq_nic_update_interrupt_moderation_settings(self);</div><div class='add'>+</div><div class='add'>+		if (self-&gt;aq_ptp) {</div><div class='add'>+			aq_ptp_clock_init(self);</div><div class='add'>+			aq_ptp_tm_offset_set(self,</div><div class='add'>+					     self-&gt;aq_hw-&gt;aq_link_status.mbps);</div><div class='add'>+			aq_ptp_link_change(self);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* Driver has to update flow control settings on RX block</div><div class='add'>+		 * on any link event.</div><div class='add'>+		 * We should query FW whether it negotiated FC.</div><div class='add'>+		 */</div><div class='add'>+		if (self-&gt;aq_hw_ops-&gt;hw_set_fc)</div><div class='add'>+			self-&gt;aq_hw_ops-&gt;hw_set_fc(self-&gt;aq_hw, fc, 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	self-&gt;link_status = self-&gt;aq_hw-&gt;aq_link_status;</div><div class='add'>+	if (!netif_carrier_ok(self-&gt;ndev) &amp;&amp; self-&gt;link_status.mbps) {</div><div class='add'>+		aq_utils_obj_set(&amp;self-&gt;flags,</div><div class='add'>+				 AQ_NIC_FLAG_STARTED);</div><div class='add'>+		aq_utils_obj_clear(&amp;self-&gt;flags,</div><div class='add'>+				   AQ_NIC_LINK_DOWN);</div><div class='add'>+		netif_carrier_on(self-&gt;ndev);</div><div class='add'>+#if IS_ENABLED(CONFIG_MACSEC)</div><div class='add'>+		aq_macsec_enable(self);</div><div class='add'>+#endif</div><div class='add'>+		if (self-&gt;aq_hw_ops-&gt;hw_tc_rate_limit_set)</div><div class='add'>+			self-&gt;aq_hw_ops-&gt;hw_tc_rate_limit_set(self-&gt;aq_hw);</div><div class='add'>+</div><div class='add'>+		netif_tx_wake_all_queues(self-&gt;ndev);</div><div class='add'>+	}</div><div class='add'>+	if (netif_carrier_ok(self-&gt;ndev) &amp;&amp; !self-&gt;link_status.mbps) {</div><div class='add'>+		netif_carrier_off(self-&gt;ndev);</div><div class='add'>+		netif_tx_disable(self-&gt;ndev);</div><div class='add'>+		aq_utils_obj_set(&amp;self-&gt;flags, AQ_NIC_LINK_DOWN);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t aq_linkstate_threaded_isr(int irq, void *private)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *self = private;</div><div class='add'>+</div><div class='add'>+	if (!self)</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+</div><div class='add'>+	aq_nic_update_link_status(self);</div><div class='add'>+</div><div class='add'>+	self-&gt;aq_hw_ops-&gt;hw_irq_enable(self-&gt;aq_hw,</div><div class='add'>+				       BIT(self-&gt;aq_nic_cfg.link_irq_vec));</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aq_nic_service_task(struct work_struct *work)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *self = container_of(work, struct aq_nic_s,</div><div class='add'>+					     service_task);</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	aq_ptp_service_task(self);</div><div class='add'>+</div><div class='add'>+	if (aq_utils_obj_test(&amp;self-&gt;flags, AQ_NIC_FLAGS_IS_NOT_READY))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	err = aq_nic_update_link_status(self);</div><div class='add'>+	if (err)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_MACSEC)</div><div class='add'>+	aq_macsec_work(self);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;self-&gt;fwreq_mutex);</div><div class='add'>+	if (self-&gt;aq_fw_ops-&gt;update_stats)</div><div class='add'>+		self-&gt;aq_fw_ops-&gt;update_stats(self-&gt;aq_hw);</div><div class='add'>+	mutex_unlock(&amp;self-&gt;fwreq_mutex);</div><div class='add'>+</div><div class='add'>+	aq_nic_update_ndev_stats(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aq_nic_service_timer_cb(struct timer_list *t)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *self = timer_container_of(self, t, service_timer);</div><div class='add'>+</div><div class='add'>+	mod_timer(&amp;self-&gt;service_timer,</div><div class='add'>+		  jiffies + AQ_CFG_SERVICE_TIMER_INTERVAL);</div><div class='add'>+</div><div class='add'>+	aq_ndev_schedule_work(&amp;self-&gt;service_task);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aq_nic_polling_timer_cb(struct timer_list *t)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *self = timer_container_of(self, t, polling_timer);</div><div class='add'>+	unsigned int i = 0U;</div><div class='add'>+</div><div class='add'>+	for (i = 0U; self-&gt;aq_vecs &gt; i; ++i)</div><div class='add'>+		aq_vec_isr(i, (void *)self-&gt;aq_vec[i]);</div><div class='add'>+</div><div class='add'>+	mod_timer(&amp;self-&gt;polling_timer, jiffies +</div><div class='add'>+		  AQ_CFG_POLLING_TIMER_INTERVAL);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_nic_hw_prepare(struct aq_nic_s *self)</div><div class='add'>+{</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	err = self-&gt;aq_hw_ops-&gt;hw_soft_reset(self-&gt;aq_hw);</div><div class='add'>+	if (err)</div><div class='add'>+		goto exit;</div><div class='add'>+</div><div class='add'>+	err = self-&gt;aq_hw_ops-&gt;hw_prepare(self-&gt;aq_hw, &amp;self-&gt;aq_fw_ops);</div><div class='add'>+</div><div class='add'>+exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool aq_nic_is_valid_ether_addr(const u8 *addr)</div><div class='add'>+{</div><div class='add'>+	/* Some engineering samples of Aquantia NICs are provisioned with a</div><div class='add'>+	 * partially populated MAC, which is still invalid.</div><div class='add'>+	 */</div><div class='add'>+	return !(addr[0] == 0 &amp;&amp; addr[1] == 0 &amp;&amp; addr[2] == 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_nic_ndev_register(struct aq_nic_s *self)</div><div class='add'>+{</div><div class='add'>+	u8 addr[ETH_ALEN];</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (!self-&gt;ndev) {</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = aq_nic_hw_prepare(self);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_MACSEC)</div><div class='add'>+	aq_macsec_init(self);</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	if (platform_get_ethdev_address(&amp;self-&gt;pdev-&gt;dev, self-&gt;ndev) != 0) {</div><div class='add'>+		// If DT has none or an invalid one, ask device for MAC address</div><div class='add'>+		mutex_lock(&amp;self-&gt;fwreq_mutex);</div><div class='add'>+		err = self-&gt;aq_fw_ops-&gt;get_mac_permanent(self-&gt;aq_hw, addr);</div><div class='add'>+		mutex_unlock(&amp;self-&gt;fwreq_mutex);</div><div class='add'>+</div><div class='add'>+		if (err)</div><div class='add'>+			goto err_exit;</div><div class='add'>+</div><div class='add'>+		if (is_valid_ether_addr(addr) &amp;&amp;</div><div class='add'>+		    aq_nic_is_valid_ether_addr(addr)) {</div><div class='add'>+			eth_hw_addr_set(self-&gt;ndev, addr);</div><div class='add'>+		} else {</div><div class='add'>+			netdev_warn(self-&gt;ndev, "MAC is invalid, will use random.");</div><div class='add'>+			eth_hw_addr_random(self-&gt;ndev);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+#if defined(AQ_CFG_MAC_ADDR_PERMANENT)</div><div class='add'>+	{</div><div class='add'>+		static u8 mac_addr_permanent[] = AQ_CFG_MAC_ADDR_PERMANENT;</div><div class='add'>+</div><div class='add'>+		eth_hw_addr_set(self-&gt;ndev, mac_addr_permanent);</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+	for (self-&gt;aq_vecs = 0; self-&gt;aq_vecs &lt; aq_nic_get_cfg(self)-&gt;vecs;</div><div class='add'>+	     self-&gt;aq_vecs++) {</div><div class='add'>+		self-&gt;aq_vec[self-&gt;aq_vecs] =</div><div class='add'>+		    aq_vec_alloc(self, self-&gt;aq_vecs, aq_nic_get_cfg(self));</div><div class='add'>+		if (!self-&gt;aq_vec[self-&gt;aq_vecs]) {</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto err_exit;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netif_carrier_off(self-&gt;ndev);</div><div class='add'>+</div><div class='add'>+	netif_tx_disable(self-&gt;ndev);</div><div class='add'>+</div><div class='add'>+	err = register_netdev(self-&gt;ndev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+#if IS_ENABLED(CONFIG_MACSEC)</div><div class='add'>+	if (err)</div><div class='add'>+		aq_macsec_free(self);</div><div class='add'>+#endif</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void aq_nic_ndev_init(struct aq_nic_s *self)</div><div class='add'>+{</div><div class='add'>+	const struct aq_hw_caps_s *aq_hw_caps = self-&gt;aq_nic_cfg.aq_hw_caps;</div><div class='add'>+	struct aq_nic_cfg_s *aq_nic_cfg = &amp;self-&gt;aq_nic_cfg;</div><div class='add'>+</div><div class='add'>+	self-&gt;ndev-&gt;hw_features |= aq_hw_caps-&gt;hw_features;</div><div class='add'>+	self-&gt;ndev-&gt;features = aq_hw_caps-&gt;hw_features;</div><div class='add'>+	self-&gt;ndev-&gt;vlan_features |= NETIF_F_HW_CSUM | NETIF_F_RXCSUM |</div><div class='add'>+				     NETIF_F_RXHASH | NETIF_F_SG |</div><div class='add'>+				     NETIF_F_LRO | NETIF_F_TSO | NETIF_F_TSO6;</div><div class='add'>+	self-&gt;ndev-&gt;gso_partial_features = NETIF_F_GSO_UDP_L4;</div><div class='add'>+	self-&gt;ndev-&gt;priv_flags = aq_hw_caps-&gt;hw_priv_flags;</div><div class='add'>+	self-&gt;ndev-&gt;priv_flags |= IFF_LIVE_ADDR_CHANGE;</div><div class='add'>+</div><div class='add'>+	self-&gt;msg_enable = NETIF_MSG_DRV | NETIF_MSG_LINK;</div><div class='add'>+	self-&gt;ndev-&gt;mtu = aq_nic_cfg-&gt;mtu - ETH_HLEN;</div><div class='add'>+	self-&gt;ndev-&gt;max_mtu = aq_hw_caps-&gt;mtu - ETH_FCS_LEN - ETH_HLEN;</div><div class='add'>+</div><div class='add'>+	self-&gt;ndev-&gt;xdp_features = NETDEV_XDP_ACT_BASIC |</div><div class='add'>+				   NETDEV_XDP_ACT_REDIRECT |</div><div class='add'>+				   NETDEV_XDP_ACT_NDO_XMIT |</div><div class='add'>+				   NETDEV_XDP_ACT_RX_SG |</div><div class='add'>+				   NETDEV_XDP_ACT_NDO_XMIT_SG;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void aq_nic_set_tx_ring(struct aq_nic_s *self, unsigned int idx,</div><div class='add'>+			struct aq_ring_s *ring)</div><div class='add'>+{</div><div class='add'>+	self-&gt;aq_ring_tx[idx] = ring;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct net_device *aq_nic_get_ndev(struct aq_nic_s *self)</div><div class='add'>+{</div><div class='add'>+	return self-&gt;ndev;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_nic_init(struct aq_nic_s *self)</div><div class='add'>+{</div><div class='add'>+	struct aq_vec_s *aq_vec = NULL;</div><div class='add'>+	unsigned int i = 0U;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	self-&gt;power_state = AQ_HW_POWER_STATE_D0;</div><div class='add'>+	mutex_lock(&amp;self-&gt;fwreq_mutex);</div><div class='add'>+	err = self-&gt;aq_hw_ops-&gt;hw_reset(self-&gt;aq_hw);</div><div class='add'>+	mutex_unlock(&amp;self-&gt;fwreq_mutex);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+	/* Restore default settings */</div><div class='add'>+	aq_nic_set_downshift(self, self-&gt;aq_nic_cfg.downshift_counter);</div><div class='add'>+	aq_nic_set_media_detect(self, self-&gt;aq_nic_cfg.is_media_detect ?</div><div class='add'>+				AQ_HW_MEDIA_DETECT_CNT : 0);</div><div class='add'>+</div><div class='add'>+	err = self-&gt;aq_hw_ops-&gt;hw_init(self-&gt;aq_hw,</div><div class='add'>+				       aq_nic_get_ndev(self)-&gt;dev_addr);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	if (ATL_HW_IS_CHIP_FEATURE(self-&gt;aq_hw, ATLANTIC) &amp;&amp;</div><div class='add'>+	    self-&gt;aq_nic_cfg.aq_hw_caps-&gt;media_type == AQ_HW_MEDIA_TYPE_TP) {</div><div class='add'>+		self-&gt;aq_hw-&gt;phy_id = HW_ATL_PHY_ID_MAX;</div><div class='add'>+		err = aq_phy_init(self-&gt;aq_hw);</div><div class='add'>+</div><div class='add'>+		/* Disable the PTP on NICs where it's known to cause datapath</div><div class='add'>+		 * problems.</div><div class='add'>+		 * Ideally this should have been done by PHY provisioning, but</div><div class='add'>+		 * many units have been shipped with enabled PTP block already.</div><div class='add'>+		 */</div><div class='add'>+		if (self-&gt;aq_nic_cfg.aq_hw_caps-&gt;quirks &amp; AQ_NIC_QUIRK_BAD_PTP)</div><div class='add'>+			if (self-&gt;aq_hw-&gt;phy_id != HW_ATL_PHY_ID_MAX)</div><div class='add'>+				aq_phy_disable_ptp(self-&gt;aq_hw);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = 0U; i &lt; self-&gt;aq_vecs; i++) {</div><div class='add'>+		aq_vec = self-&gt;aq_vec[i];</div><div class='add'>+		err = aq_vec_ring_alloc(aq_vec, self, i,</div><div class='add'>+					aq_nic_get_cfg(self));</div><div class='add'>+		if (err)</div><div class='add'>+			goto err_exit;</div><div class='add'>+</div><div class='add'>+		aq_vec_init(aq_vec, self-&gt;aq_hw_ops, self-&gt;aq_hw);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (aq_nic_get_cfg(self)-&gt;is_ptp) {</div><div class='add'>+		err = aq_ptp_init(self, self-&gt;irqvecs - 1);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			goto err_exit;</div><div class='add'>+</div><div class='add'>+		err = aq_ptp_ring_alloc(self);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			goto err_exit;</div><div class='add'>+</div><div class='add'>+		err = aq_ptp_ring_init(self);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netif_carrier_off(self-&gt;ndev);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_nic_start(struct aq_nic_s *self)</div><div class='add'>+{</div><div class='add'>+	struct aq_vec_s *aq_vec = NULL;</div><div class='add'>+	struct aq_nic_cfg_s *cfg;</div><div class='add'>+	unsigned int i = 0U;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	cfg = aq_nic_get_cfg(self);</div><div class='add'>+</div><div class='add'>+	err = self-&gt;aq_hw_ops-&gt;hw_multicast_list_set(self-&gt;aq_hw,</div><div class='add'>+						     self-&gt;mc_list.ar,</div><div class='add'>+						     self-&gt;mc_list.count);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	err = self-&gt;aq_hw_ops-&gt;hw_packet_filter_set(self-&gt;aq_hw,</div><div class='add'>+						    self-&gt;packet_filter);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	for (i = 0U; self-&gt;aq_vecs &gt; i; ++i) {</div><div class='add'>+		aq_vec = self-&gt;aq_vec[i];</div><div class='add'>+		err = aq_vec_start(aq_vec);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = aq_ptp_ring_start(self);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	aq_nic_set_loopback(self);</div><div class='add'>+</div><div class='add'>+	err = self-&gt;aq_hw_ops-&gt;hw_start(self-&gt;aq_hw);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	err = aq_nic_update_interrupt_moderation_settings(self);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	INIT_WORK(&amp;self-&gt;service_task, aq_nic_service_task);</div><div class='add'>+</div><div class='add'>+	timer_setup(&amp;self-&gt;service_timer, aq_nic_service_timer_cb, 0);</div><div class='add'>+	aq_nic_service_timer_cb(&amp;self-&gt;service_timer);</div><div class='add'>+</div><div class='add'>+	if (cfg-&gt;is_polling) {</div><div class='add'>+		timer_setup(&amp;self-&gt;polling_timer, aq_nic_polling_timer_cb, 0);</div><div class='add'>+		mod_timer(&amp;self-&gt;polling_timer, jiffies +</div><div class='add'>+			  AQ_CFG_POLLING_TIMER_INTERVAL);</div><div class='add'>+	} else {</div><div class='add'>+		for (i = 0U; self-&gt;aq_vecs &gt; i; ++i) {</div><div class='add'>+			aq_vec = self-&gt;aq_vec[i];</div><div class='add'>+			err = aq_pci_func_alloc_irq(self, i, self-&gt;ndev-&gt;name,</div><div class='add'>+						    aq_vec_isr, aq_vec,</div><div class='add'>+						    aq_vec_get_affinity_mask(aq_vec));</div><div class='add'>+			if (err &lt; 0)</div><div class='add'>+				goto err_exit;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = aq_ptp_irq_alloc(self);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			goto err_exit;</div><div class='add'>+</div><div class='add'>+		if (cfg-&gt;link_irq_vec) {</div><div class='add'>+			int irqvec = pci_irq_vector(self-&gt;pdev,</div><div class='add'>+						    cfg-&gt;link_irq_vec);</div><div class='add'>+			err = request_threaded_irq(irqvec, NULL,</div><div class='add'>+						   aq_linkstate_threaded_isr,</div><div class='add'>+						   IRQF_SHARED | IRQF_ONESHOT,</div><div class='add'>+						   self-&gt;ndev-&gt;name, self);</div><div class='add'>+			if (err &lt; 0)</div><div class='add'>+				goto err_exit;</div><div class='add'>+			self-&gt;msix_entry_mask |= (1 &lt;&lt; cfg-&gt;link_irq_vec);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = self-&gt;aq_hw_ops-&gt;hw_irq_enable(self-&gt;aq_hw,</div><div class='add'>+						     AQ_CFG_IRQ_MASK);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = netif_set_real_num_tx_queues(self-&gt;ndev,</div><div class='add'>+					   self-&gt;aq_vecs * cfg-&gt;tcs);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	err = netif_set_real_num_rx_queues(self-&gt;ndev,</div><div class='add'>+					   self-&gt;aq_vecs * cfg-&gt;tcs);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; cfg-&gt;tcs; i++) {</div><div class='add'>+		u16 offset = self-&gt;aq_vecs * i;</div><div class='add'>+</div><div class='add'>+		netdev_set_tc_queue(self-&gt;ndev, i, self-&gt;aq_vecs, offset);</div><div class='add'>+	}</div><div class='add'>+	netif_tx_start_all_queues(self-&gt;ndev);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int aq_nic_map_xdp(struct aq_nic_s *self,</div><div class='add'>+				   struct xdp_frame *xdpf,</div><div class='add'>+				   struct aq_ring_s *ring)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = aq_nic_get_dev(self);</div><div class='add'>+	struct aq_ring_buff_s *first = NULL;</div><div class='add'>+	unsigned int dx = ring-&gt;sw_tail;</div><div class='add'>+	struct aq_ring_buff_s *dx_buff;</div><div class='add'>+	struct skb_shared_info *sinfo;</div><div class='add'>+	unsigned int frag_count = 0U;</div><div class='add'>+	unsigned int nr_frags = 0U;</div><div class='add'>+	unsigned int ret = 0U;</div><div class='add'>+	u16 total_len;</div><div class='add'>+</div><div class='add'>+	dx_buff = &amp;ring-&gt;buff_ring[dx];</div><div class='add'>+	dx_buff-&gt;flags = 0U;</div><div class='add'>+</div><div class='add'>+	sinfo = xdp_get_shared_info_from_frame(xdpf);</div><div class='add'>+	total_len = xdpf-&gt;len;</div><div class='add'>+	dx_buff-&gt;len = total_len;</div><div class='add'>+	if (xdp_frame_has_frags(xdpf)) {</div><div class='add'>+		nr_frags = sinfo-&gt;nr_frags;</div><div class='add'>+		total_len += sinfo-&gt;xdp_frags_size;</div><div class='add'>+	}</div><div class='add'>+	dx_buff-&gt;pa = dma_map_single(dev, xdpf-&gt;data, dx_buff-&gt;len,</div><div class='add'>+				     DMA_TO_DEVICE);</div><div class='add'>+</div><div class='add'>+	if (unlikely(dma_mapping_error(dev, dx_buff-&gt;pa)))</div><div class='add'>+		goto exit;</div><div class='add'>+</div><div class='add'>+	first = dx_buff;</div><div class='add'>+	dx_buff-&gt;len_pkt = total_len;</div><div class='add'>+	dx_buff-&gt;is_sop = 1U;</div><div class='add'>+	dx_buff-&gt;is_mapped = 1U;</div><div class='add'>+	++ret;</div><div class='add'>+</div><div class='add'>+	for (; nr_frags--; ++frag_count) {</div><div class='add'>+		skb_frag_t *frag = &amp;sinfo-&gt;frags[frag_count];</div><div class='add'>+		unsigned int frag_len = skb_frag_size(frag);</div><div class='add'>+		unsigned int buff_offset = 0U;</div><div class='add'>+		unsigned int buff_size = 0U;</div><div class='add'>+		dma_addr_t frag_pa;</div><div class='add'>+</div><div class='add'>+		while (frag_len) {</div><div class='add'>+			if (frag_len &gt; AQ_CFG_TX_FRAME_MAX)</div><div class='add'>+				buff_size = AQ_CFG_TX_FRAME_MAX;</div><div class='add'>+			else</div><div class='add'>+				buff_size = frag_len;</div><div class='add'>+</div><div class='add'>+			frag_pa = skb_frag_dma_map(dev, frag, buff_offset,</div><div class='add'>+						   buff_size, DMA_TO_DEVICE);</div><div class='add'>+</div><div class='add'>+			if (unlikely(dma_mapping_error(dev, frag_pa)))</div><div class='add'>+				goto mapping_error;</div><div class='add'>+</div><div class='add'>+			dx = aq_ring_next_dx(ring, dx);</div><div class='add'>+			dx_buff = &amp;ring-&gt;buff_ring[dx];</div><div class='add'>+</div><div class='add'>+			dx_buff-&gt;flags = 0U;</div><div class='add'>+			dx_buff-&gt;len = buff_size;</div><div class='add'>+			dx_buff-&gt;pa = frag_pa;</div><div class='add'>+			dx_buff-&gt;is_mapped = 1U;</div><div class='add'>+			dx_buff-&gt;eop_index = 0xffffU;</div><div class='add'>+</div><div class='add'>+			frag_len -= buff_size;</div><div class='add'>+			buff_offset += buff_size;</div><div class='add'>+</div><div class='add'>+			++ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	first-&gt;eop_index = dx;</div><div class='add'>+	dx_buff-&gt;is_eop = 1U;</div><div class='add'>+	dx_buff-&gt;skb = NULL;</div><div class='add'>+	dx_buff-&gt;xdpf = xdpf;</div><div class='add'>+	goto exit;</div><div class='add'>+</div><div class='add'>+mapping_error:</div><div class='add'>+	for (dx = ring-&gt;sw_tail;</div><div class='add'>+	     ret &gt; 0;</div><div class='add'>+	     --ret, dx = aq_ring_next_dx(ring, dx)) {</div><div class='add'>+		dx_buff = &amp;ring-&gt;buff_ring[dx];</div><div class='add'>+</div><div class='add'>+		if (!dx_buff-&gt;pa)</div><div class='add'>+			continue;</div><div class='add'>+		if (unlikely(dx_buff-&gt;is_sop))</div><div class='add'>+			dma_unmap_single(dev, dx_buff-&gt;pa, dx_buff-&gt;len,</div><div class='add'>+					 DMA_TO_DEVICE);</div><div class='add'>+		else</div><div class='add'>+			dma_unmap_page(dev, dx_buff-&gt;pa, dx_buff-&gt;len,</div><div class='add'>+				       DMA_TO_DEVICE);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+exit:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+unsigned int aq_nic_map_skb(struct aq_nic_s *self, struct sk_buff *skb,</div><div class='add'>+			    struct aq_ring_s *ring)</div><div class='add'>+{</div><div class='add'>+	unsigned int nr_frags = skb_shinfo(skb)-&gt;nr_frags;</div><div class='add'>+	struct aq_nic_cfg_s *cfg = aq_nic_get_cfg(self);</div><div class='add'>+	struct device *dev = aq_nic_get_dev(self);</div><div class='add'>+	struct aq_ring_buff_s *first = NULL;</div><div class='add'>+	u8 ipver = ip_hdr(skb)-&gt;version;</div><div class='add'>+	struct aq_ring_buff_s *dx_buff;</div><div class='add'>+	bool need_context_tag = false;</div><div class='add'>+	unsigned int frag_count = 0U;</div><div class='add'>+	unsigned int ret = 0U;</div><div class='add'>+	unsigned int dx;</div><div class='add'>+	u8 l4proto = 0;</div><div class='add'>+</div><div class='add'>+	if (ipver == 4)</div><div class='add'>+		l4proto = ip_hdr(skb)-&gt;protocol;</div><div class='add'>+	else if (ipver == 6)</div><div class='add'>+		l4proto = ipv6_hdr(skb)-&gt;nexthdr;</div><div class='add'>+</div><div class='add'>+	dx = ring-&gt;sw_tail;</div><div class='add'>+	dx_buff = &amp;ring-&gt;buff_ring[dx];</div><div class='add'>+	dx_buff-&gt;flags = 0U;</div><div class='add'>+</div><div class='add'>+	if (unlikely(skb_is_gso(skb))) {</div><div class='add'>+		dx_buff-&gt;mss = skb_shinfo(skb)-&gt;gso_size;</div><div class='add'>+		if (l4proto == IPPROTO_TCP) {</div><div class='add'>+			dx_buff-&gt;is_gso_tcp = 1U;</div><div class='add'>+			dx_buff-&gt;len_l4 = tcp_hdrlen(skb);</div><div class='add'>+		} else if (l4proto == IPPROTO_UDP) {</div><div class='add'>+			dx_buff-&gt;is_gso_udp = 1U;</div><div class='add'>+			dx_buff-&gt;len_l4 = sizeof(struct udphdr);</div><div class='add'>+			/* UDP GSO Hardware does not replace packet length. */</div><div class='add'>+			udp_hdr(skb)-&gt;len = htons(dx_buff-&gt;mss +</div><div class='add'>+						  dx_buff-&gt;len_l4);</div><div class='add'>+		} else {</div><div class='add'>+			WARN_ONCE(true, "Bad GSO mode");</div><div class='add'>+			goto exit;</div><div class='add'>+		}</div><div class='add'>+		dx_buff-&gt;len_pkt = skb-&gt;len;</div><div class='add'>+		dx_buff-&gt;len_l2 = ETH_HLEN;</div><div class='add'>+		dx_buff-&gt;len_l3 = skb_network_header_len(skb);</div><div class='add'>+		dx_buff-&gt;eop_index = 0xffffU;</div><div class='add'>+		dx_buff-&gt;is_ipv6 = (ipver == 6);</div><div class='add'>+		need_context_tag = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cfg-&gt;is_vlan_tx_insert &amp;&amp; skb_vlan_tag_present(skb)) {</div><div class='add'>+		dx_buff-&gt;vlan_tx_tag = skb_vlan_tag_get(skb);</div><div class='add'>+		dx_buff-&gt;len_pkt = skb-&gt;len;</div><div class='add'>+		dx_buff-&gt;is_vlan = 1U;</div><div class='add'>+		need_context_tag = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (need_context_tag) {</div><div class='add'>+		dx = aq_ring_next_dx(ring, dx);</div><div class='add'>+		dx_buff = &amp;ring-&gt;buff_ring[dx];</div><div class='add'>+		dx_buff-&gt;flags = 0U;</div><div class='add'>+		++ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	dx_buff-&gt;len = skb_headlen(skb);</div><div class='add'>+	dx_buff-&gt;pa = dma_map_single(dev,</div><div class='add'>+				     skb-&gt;data,</div><div class='add'>+				     dx_buff-&gt;len,</div><div class='add'>+				     DMA_TO_DEVICE);</div><div class='add'>+</div><div class='add'>+	if (unlikely(dma_mapping_error(dev, dx_buff-&gt;pa))) {</div><div class='add'>+		ret = 0;</div><div class='add'>+		goto exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	first = dx_buff;</div><div class='add'>+	dx_buff-&gt;len_pkt = skb-&gt;len;</div><div class='add'>+	dx_buff-&gt;is_sop = 1U;</div><div class='add'>+	dx_buff-&gt;is_mapped = 1U;</div><div class='add'>+	++ret;</div><div class='add'>+</div><div class='add'>+	if (skb-&gt;ip_summed == CHECKSUM_PARTIAL) {</div><div class='add'>+		dx_buff-&gt;is_ip_cso = (htons(ETH_P_IP) == skb-&gt;protocol);</div><div class='add'>+		dx_buff-&gt;is_tcp_cso = (l4proto == IPPROTO_TCP);</div><div class='add'>+		dx_buff-&gt;is_udp_cso = (l4proto == IPPROTO_UDP);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (; nr_frags--; ++frag_count) {</div><div class='add'>+		unsigned int frag_len = 0U;</div><div class='add'>+		unsigned int buff_offset = 0U;</div><div class='add'>+		unsigned int buff_size = 0U;</div><div class='add'>+		dma_addr_t frag_pa;</div><div class='add'>+		skb_frag_t *frag = &amp;skb_shinfo(skb)-&gt;frags[frag_count];</div><div class='add'>+</div><div class='add'>+		frag_len = skb_frag_size(frag);</div><div class='add'>+</div><div class='add'>+		while (frag_len) {</div><div class='add'>+			if (frag_len &gt; AQ_CFG_TX_FRAME_MAX)</div><div class='add'>+				buff_size = AQ_CFG_TX_FRAME_MAX;</div><div class='add'>+			else</div><div class='add'>+				buff_size = frag_len;</div><div class='add'>+</div><div class='add'>+			frag_pa = skb_frag_dma_map(dev,</div><div class='add'>+						   frag,</div><div class='add'>+						   buff_offset,</div><div class='add'>+						   buff_size,</div><div class='add'>+						   DMA_TO_DEVICE);</div><div class='add'>+</div><div class='add'>+			if (unlikely(dma_mapping_error(dev,</div><div class='add'>+						       frag_pa)))</div><div class='add'>+				goto mapping_error;</div><div class='add'>+</div><div class='add'>+			dx = aq_ring_next_dx(ring, dx);</div><div class='add'>+			dx_buff = &amp;ring-&gt;buff_ring[dx];</div><div class='add'>+</div><div class='add'>+			dx_buff-&gt;flags = 0U;</div><div class='add'>+			dx_buff-&gt;len = buff_size;</div><div class='add'>+			dx_buff-&gt;pa = frag_pa;</div><div class='add'>+			dx_buff-&gt;is_mapped = 1U;</div><div class='add'>+			dx_buff-&gt;eop_index = 0xffffU;</div><div class='add'>+</div><div class='add'>+			frag_len -= buff_size;</div><div class='add'>+			buff_offset += buff_size;</div><div class='add'>+</div><div class='add'>+			++ret;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	first-&gt;eop_index = dx;</div><div class='add'>+	dx_buff-&gt;is_eop = 1U;</div><div class='add'>+	dx_buff-&gt;skb = skb;</div><div class='add'>+	dx_buff-&gt;xdpf = NULL;</div><div class='add'>+	goto exit;</div><div class='add'>+</div><div class='add'>+mapping_error:</div><div class='add'>+	for (dx = ring-&gt;sw_tail;</div><div class='add'>+	     ret &gt; 0;</div><div class='add'>+	     --ret, dx = aq_ring_next_dx(ring, dx)) {</div><div class='add'>+		dx_buff = &amp;ring-&gt;buff_ring[dx];</div><div class='add'>+</div><div class='add'>+		if (!(dx_buff-&gt;is_gso_tcp || dx_buff-&gt;is_gso_udp) &amp;&amp;</div><div class='add'>+		    !dx_buff-&gt;is_vlan &amp;&amp; dx_buff-&gt;pa) {</div><div class='add'>+			if (unlikely(dx_buff-&gt;is_sop)) {</div><div class='add'>+				dma_unmap_single(dev,</div><div class='add'>+						 dx_buff-&gt;pa,</div><div class='add'>+						 dx_buff-&gt;len,</div><div class='add'>+						 DMA_TO_DEVICE);</div><div class='add'>+			} else {</div><div class='add'>+				dma_unmap_page(dev,</div><div class='add'>+					       dx_buff-&gt;pa,</div><div class='add'>+					       dx_buff-&gt;len,</div><div class='add'>+					       DMA_TO_DEVICE);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+exit:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_nic_xmit_xdpf(struct aq_nic_s *aq_nic, struct aq_ring_s *tx_ring,</div><div class='add'>+		     struct xdp_frame *xdpf)</div><div class='add'>+{</div><div class='add'>+	u16 queue_index = AQ_NIC_RING2QMAP(aq_nic, tx_ring-&gt;idx);</div><div class='add'>+	struct net_device *ndev = aq_nic_get_ndev(aq_nic);</div><div class='add'>+	struct skb_shared_info *sinfo;</div><div class='add'>+	int cpu = smp_processor_id();</div><div class='add'>+	int err = NETDEV_TX_BUSY;</div><div class='add'>+	struct netdev_queue *nq;</div><div class='add'>+	unsigned int frags = 1;</div><div class='add'>+</div><div class='add'>+	if (xdp_frame_has_frags(xdpf)) {</div><div class='add'>+		sinfo = xdp_get_shared_info_from_frame(xdpf);</div><div class='add'>+		frags += sinfo-&gt;nr_frags;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (frags &gt; AQ_CFG_SKB_FRAGS_MAX)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	nq = netdev_get_tx_queue(ndev, tx_ring-&gt;idx);</div><div class='add'>+	__netif_tx_lock(nq, cpu);</div><div class='add'>+</div><div class='add'>+	aq_ring_update_queue_state(tx_ring);</div><div class='add'>+</div><div class='add'>+	/* Above status update may stop the queue. Check this. */</div><div class='add'>+	if (__netif_subqueue_stopped(aq_nic_get_ndev(aq_nic), queue_index))</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	frags = aq_nic_map_xdp(aq_nic, xdpf, tx_ring);</div><div class='add'>+	if (likely(frags))</div><div class='add'>+		err = aq_nic-&gt;aq_hw_ops-&gt;hw_ring_tx_xmit(aq_nic-&gt;aq_hw, tx_ring,</div><div class='add'>+							 frags);</div><div class='add'>+out:</div><div class='add'>+	__netif_tx_unlock(nq);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_nic_xmit(struct aq_nic_s *self, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_cfg_s *cfg = aq_nic_get_cfg(self);</div><div class='add'>+	unsigned int vec = skb-&gt;queue_mapping % cfg-&gt;vecs;</div><div class='add'>+	unsigned int tc = skb-&gt;queue_mapping / cfg-&gt;vecs;</div><div class='add'>+	struct aq_ring_s *ring = NULL;</div><div class='add'>+	unsigned int frags = 0U;</div><div class='add'>+	int err = NETDEV_TX_OK;</div><div class='add'>+</div><div class='add'>+	frags = skb_shinfo(skb)-&gt;nr_frags + 1;</div><div class='add'>+</div><div class='add'>+	ring = self-&gt;aq_ring_tx[AQ_NIC_CFG_TCVEC2RING(cfg, tc, vec)];</div><div class='add'>+</div><div class='add'>+	if (frags &gt; AQ_CFG_SKB_FRAGS_MAX) {</div><div class='add'>+		dev_kfree_skb_any(skb);</div><div class='add'>+		goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	aq_ring_update_queue_state(ring);</div><div class='add'>+</div><div class='add'>+	if (cfg-&gt;priv_flags &amp; BIT(AQ_HW_LOOPBACK_DMA_NET)) {</div><div class='add'>+		err = NETDEV_TX_BUSY;</div><div class='add'>+		goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Above status update may stop the queue. Check this. */</div><div class='add'>+	if (__netif_subqueue_stopped(self-&gt;ndev,</div><div class='add'>+				     AQ_NIC_RING2QMAP(self, ring-&gt;idx))) {</div><div class='add'>+		err = NETDEV_TX_BUSY;</div><div class='add'>+		goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	frags = aq_nic_map_skb(self, skb, ring);</div><div class='add'>+</div><div class='add'>+	skb_tx_timestamp(skb);</div><div class='add'>+</div><div class='add'>+	if (likely(frags)) {</div><div class='add'>+		err = self-&gt;aq_hw_ops-&gt;hw_ring_tx_xmit(self-&gt;aq_hw,</div><div class='add'>+						       ring, frags);</div><div class='add'>+	} else {</div><div class='add'>+		err = NETDEV_TX_BUSY;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_nic_update_interrupt_moderation_settings(struct aq_nic_s *self)</div><div class='add'>+{</div><div class='add'>+	return self-&gt;aq_hw_ops-&gt;hw_interrupt_moderation_set(self-&gt;aq_hw);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_nic_set_packet_filter(struct aq_nic_s *self, unsigned int flags)</div><div class='add'>+{</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	err = self-&gt;aq_hw_ops-&gt;hw_packet_filter_set(self-&gt;aq_hw, flags);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	self-&gt;packet_filter = flags;</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_nic_set_multicast_list(struct aq_nic_s *self, struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	const struct aq_hw_ops *hw_ops = self-&gt;aq_hw_ops;</div><div class='add'>+	struct aq_nic_cfg_s *cfg = &amp;self-&gt;aq_nic_cfg;</div><div class='add'>+	unsigned int packet_filter = ndev-&gt;flags;</div><div class='add'>+	struct netdev_hw_addr *ha = NULL;</div><div class='add'>+	unsigned int i = 0U;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	self-&gt;mc_list.count = 0;</div><div class='add'>+	if (netdev_uc_count(ndev) &gt; AQ_HW_MULTICAST_ADDRESS_MAX) {</div><div class='add'>+		packet_filter |= IFF_PROMISC;</div><div class='add'>+	} else {</div><div class='add'>+		netdev_for_each_uc_addr(ha, ndev) {</div><div class='add'>+			ether_addr_copy(self-&gt;mc_list.ar[i++], ha-&gt;addr);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	cfg-&gt;is_mc_list_enabled = !!(packet_filter &amp; IFF_MULTICAST);</div><div class='add'>+	if (cfg-&gt;is_mc_list_enabled) {</div><div class='add'>+		if (i + netdev_mc_count(ndev) &gt; AQ_HW_MULTICAST_ADDRESS_MAX) {</div><div class='add'>+			packet_filter |= IFF_ALLMULTI;</div><div class='add'>+		} else {</div><div class='add'>+			netdev_for_each_mc_addr(ha, ndev) {</div><div class='add'>+				ether_addr_copy(self-&gt;mc_list.ar[i++],</div><div class='add'>+						ha-&gt;addr);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (i &gt; 0 &amp;&amp; i &lt;= AQ_HW_MULTICAST_ADDRESS_MAX) {</div><div class='add'>+		self-&gt;mc_list.count = i;</div><div class='add'>+		err = hw_ops-&gt;hw_multicast_list_set(self-&gt;aq_hw,</div><div class='add'>+						    self-&gt;mc_list.ar,</div><div class='add'>+						    self-&gt;mc_list.count);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return aq_nic_set_packet_filter(self, packet_filter);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_nic_set_mtu(struct aq_nic_s *self, int new_mtu)</div><div class='add'>+{</div><div class='add'>+	self-&gt;aq_nic_cfg.mtu = new_mtu;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_nic_set_mac(struct aq_nic_s *self, struct net_device *ndev)</div><div class='add'>+{</div><div class='add'>+	return self-&gt;aq_hw_ops-&gt;hw_set_mac_address(self-&gt;aq_hw, ndev-&gt;dev_addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+unsigned int aq_nic_get_link_speed(struct aq_nic_s *self)</div><div class='add'>+{</div><div class='add'>+	return self-&gt;link_status.mbps;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_nic_get_regs(struct aq_nic_s *self, struct ethtool_regs *regs, void *p)</div><div class='add'>+{</div><div class='add'>+	u32 *regs_buff = p;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (unlikely(!self-&gt;aq_hw_ops-&gt;hw_get_regs))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	regs-&gt;version = 1;</div><div class='add'>+</div><div class='add'>+	err = self-&gt;aq_hw_ops-&gt;hw_get_regs(self-&gt;aq_hw,</div><div class='add'>+					   self-&gt;aq_nic_cfg.aq_hw_caps,</div><div class='add'>+					   regs_buff);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_nic_get_regs_count(struct aq_nic_s *self)</div><div class='add'>+{</div><div class='add'>+	if (unlikely(!self-&gt;aq_hw_ops-&gt;hw_get_regs))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return self-&gt;aq_nic_cfg.aq_hw_caps-&gt;mac_regs_count;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u64 *aq_nic_get_stats(struct aq_nic_s *self, u64 *data)</div><div class='add'>+{</div><div class='add'>+	struct aq_stats_s *stats;</div><div class='add'>+	unsigned int count = 0U;</div><div class='add'>+	unsigned int i = 0U;</div><div class='add'>+	unsigned int tc;</div><div class='add'>+</div><div class='add'>+	if (self-&gt;aq_fw_ops-&gt;update_stats) {</div><div class='add'>+		mutex_lock(&amp;self-&gt;fwreq_mutex);</div><div class='add'>+		self-&gt;aq_fw_ops-&gt;update_stats(self-&gt;aq_hw);</div><div class='add'>+		mutex_unlock(&amp;self-&gt;fwreq_mutex);</div><div class='add'>+	}</div><div class='add'>+	stats = self-&gt;aq_hw_ops-&gt;hw_get_hw_stats(self-&gt;aq_hw);</div><div class='add'>+</div><div class='add'>+	if (!stats)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	data[i] = stats-&gt;uprc + stats-&gt;mprc + stats-&gt;bprc;</div><div class='add'>+	data[++i] = stats-&gt;uprc;</div><div class='add'>+	data[++i] = stats-&gt;mprc;</div><div class='add'>+	data[++i] = stats-&gt;bprc;</div><div class='add'>+	data[++i] = stats-&gt;erpt;</div><div class='add'>+	data[++i] = stats-&gt;uptc + stats-&gt;mptc + stats-&gt;bptc;</div><div class='add'>+	data[++i] = stats-&gt;uptc;</div><div class='add'>+	data[++i] = stats-&gt;mptc;</div><div class='add'>+	data[++i] = stats-&gt;bptc;</div><div class='add'>+	data[++i] = stats-&gt;ubrc;</div><div class='add'>+	data[++i] = stats-&gt;ubtc;</div><div class='add'>+	data[++i] = stats-&gt;mbrc;</div><div class='add'>+	data[++i] = stats-&gt;mbtc;</div><div class='add'>+	data[++i] = stats-&gt;bbrc;</div><div class='add'>+	data[++i] = stats-&gt;bbtc;</div><div class='add'>+	if (stats-&gt;brc)</div><div class='add'>+		data[++i] = stats-&gt;brc;</div><div class='add'>+	else</div><div class='add'>+		data[++i] = stats-&gt;ubrc + stats-&gt;mbrc + stats-&gt;bbrc;</div><div class='add'>+	if (stats-&gt;btc)</div><div class='add'>+		data[++i] = stats-&gt;btc;</div><div class='add'>+	else</div><div class='add'>+		data[++i] = stats-&gt;ubtc + stats-&gt;mbtc + stats-&gt;bbtc;</div><div class='add'>+	data[++i] = stats-&gt;dma_pkt_rc;</div><div class='add'>+	data[++i] = stats-&gt;dma_pkt_tc;</div><div class='add'>+	data[++i] = stats-&gt;dma_oct_rc;</div><div class='add'>+	data[++i] = stats-&gt;dma_oct_tc;</div><div class='add'>+	data[++i] = stats-&gt;dpc;</div><div class='add'>+</div><div class='add'>+	i++;</div><div class='add'>+</div><div class='add'>+	data += i;</div><div class='add'>+</div><div class='add'>+	for (tc = 0U; tc &lt; self-&gt;aq_nic_cfg.tcs; tc++) {</div><div class='add'>+		for (i = 0U; self-&gt;aq_vecs &gt; i; ++i) {</div><div class='add'>+			if (!self-&gt;aq_vec[i])</div><div class='add'>+				break;</div><div class='add'>+			data += count;</div><div class='add'>+			count = aq_vec_get_sw_stats(self-&gt;aq_vec[i], tc, data);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	data += count;</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return data;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aq_nic_update_ndev_stats(struct aq_nic_s *self)</div><div class='add'>+{</div><div class='add'>+	struct aq_stats_s *stats = self-&gt;aq_hw_ops-&gt;hw_get_hw_stats(self-&gt;aq_hw);</div><div class='add'>+	struct net_device *ndev = self-&gt;ndev;</div><div class='add'>+</div><div class='add'>+	ndev-&gt;stats.rx_packets = stats-&gt;dma_pkt_rc;</div><div class='add'>+	ndev-&gt;stats.rx_bytes = stats-&gt;dma_oct_rc;</div><div class='add'>+	ndev-&gt;stats.rx_errors = stats-&gt;erpr;</div><div class='add'>+	ndev-&gt;stats.rx_dropped = stats-&gt;dpc;</div><div class='add'>+	ndev-&gt;stats.tx_packets = stats-&gt;dma_pkt_tc;</div><div class='add'>+	ndev-&gt;stats.tx_bytes = stats-&gt;dma_oct_tc;</div><div class='add'>+	ndev-&gt;stats.tx_errors = stats-&gt;erpt;</div><div class='add'>+	ndev-&gt;stats.multicast = stats-&gt;mprc;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void aq_nic_get_link_ksettings(struct aq_nic_s *self,</div><div class='add'>+			       struct ethtool_link_ksettings *cmd)</div><div class='add'>+{</div><div class='add'>+	u32 lp_link_speed_msk;</div><div class='add'>+</div><div class='add'>+	if (self-&gt;aq_nic_cfg.aq_hw_caps-&gt;media_type == AQ_HW_MEDIA_TYPE_FIBRE)</div><div class='add'>+		cmd-&gt;base.port = PORT_FIBRE;</div><div class='add'>+	else</div><div class='add'>+		cmd-&gt;base.port = PORT_TP;</div><div class='add'>+</div><div class='add'>+	cmd-&gt;base.duplex = DUPLEX_UNKNOWN;</div><div class='add'>+	if (self-&gt;link_status.mbps)</div><div class='add'>+		cmd-&gt;base.duplex = self-&gt;link_status.full_duplex ?</div><div class='add'>+				   DUPLEX_FULL : DUPLEX_HALF;</div><div class='add'>+	cmd-&gt;base.autoneg = self-&gt;aq_nic_cfg.is_autoneg;</div><div class='add'>+</div><div class='add'>+	ethtool_link_ksettings_zero_link_mode(cmd, supported);</div><div class='add'>+</div><div class='add'>+	if (self-&gt;aq_nic_cfg.aq_hw_caps-&gt;link_speed_msk &amp; AQ_NIC_RATE_10G)</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(cmd, supported,</div><div class='add'>+						     10000baseT_Full);</div><div class='add'>+</div><div class='add'>+	if (self-&gt;aq_nic_cfg.aq_hw_caps-&gt;link_speed_msk &amp; AQ_NIC_RATE_5G)</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(cmd, supported,</div><div class='add'>+						     5000baseT_Full);</div><div class='add'>+</div><div class='add'>+	if (self-&gt;aq_nic_cfg.aq_hw_caps-&gt;link_speed_msk &amp; AQ_NIC_RATE_2G5)</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(cmd, supported,</div><div class='add'>+						     2500baseT_Full);</div><div class='add'>+</div><div class='add'>+	if (self-&gt;aq_nic_cfg.aq_hw_caps-&gt;link_speed_msk &amp; AQ_NIC_RATE_1G)</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(cmd, supported,</div><div class='add'>+						     1000baseT_Full);</div><div class='add'>+</div><div class='add'>+	if (self-&gt;aq_nic_cfg.aq_hw_caps-&gt;link_speed_msk &amp; AQ_NIC_RATE_1G_HALF)</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(cmd, supported,</div><div class='add'>+						     1000baseT_Half);</div><div class='add'>+</div><div class='add'>+	if (self-&gt;aq_nic_cfg.aq_hw_caps-&gt;link_speed_msk &amp; AQ_NIC_RATE_100M)</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(cmd, supported,</div><div class='add'>+						     100baseT_Full);</div><div class='add'>+</div><div class='add'>+	if (self-&gt;aq_nic_cfg.aq_hw_caps-&gt;link_speed_msk &amp; AQ_NIC_RATE_100M_HALF)</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(cmd, supported,</div><div class='add'>+						     100baseT_Half);</div><div class='add'>+</div><div class='add'>+	if (self-&gt;aq_nic_cfg.aq_hw_caps-&gt;link_speed_msk &amp; AQ_NIC_RATE_10M)</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(cmd, supported,</div><div class='add'>+						     10baseT_Full);</div><div class='add'>+</div><div class='add'>+	if (self-&gt;aq_nic_cfg.aq_hw_caps-&gt;link_speed_msk &amp; AQ_NIC_RATE_10M_HALF)</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(cmd, supported,</div><div class='add'>+						     10baseT_Half);</div><div class='add'>+</div><div class='add'>+	if (self-&gt;aq_nic_cfg.aq_hw_caps-&gt;flow_control) {</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(cmd, supported,</div><div class='add'>+						     Pause);</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(cmd, supported,</div><div class='add'>+						     Asym_Pause);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);</div><div class='add'>+</div><div class='add'>+	if (self-&gt;aq_nic_cfg.aq_hw_caps-&gt;media_type == AQ_HW_MEDIA_TYPE_FIBRE)</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);</div><div class='add'>+	else</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(cmd, supported, TP);</div><div class='add'>+</div><div class='add'>+	ethtool_link_ksettings_zero_link_mode(cmd, advertising);</div><div class='add'>+</div><div class='add'>+	if (self-&gt;aq_nic_cfg.is_autoneg)</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);</div><div class='add'>+</div><div class='add'>+	if (self-&gt;aq_nic_cfg.link_speed_msk &amp; AQ_NIC_RATE_10G)</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(cmd, advertising,</div><div class='add'>+						     10000baseT_Full);</div><div class='add'>+</div><div class='add'>+	if (self-&gt;aq_nic_cfg.link_speed_msk &amp; AQ_NIC_RATE_5G)</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(cmd, advertising,</div><div class='add'>+						     5000baseT_Full);</div><div class='add'>+</div><div class='add'>+	if (self-&gt;aq_nic_cfg.link_speed_msk &amp; AQ_NIC_RATE_2G5)</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(cmd, advertising,</div><div class='add'>+						     2500baseT_Full);</div><div class='add'>+</div><div class='add'>+	if (self-&gt;aq_nic_cfg.link_speed_msk &amp; AQ_NIC_RATE_1G)</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(cmd, advertising,</div><div class='add'>+						     1000baseT_Full);</div><div class='add'>+</div><div class='add'>+	if (self-&gt;aq_nic_cfg.link_speed_msk &amp; AQ_NIC_RATE_1G_HALF)</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(cmd, advertising,</div><div class='add'>+						     1000baseT_Half);</div><div class='add'>+</div><div class='add'>+	if (self-&gt;aq_nic_cfg.link_speed_msk &amp; AQ_NIC_RATE_100M)</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(cmd, advertising,</div><div class='add'>+						     100baseT_Full);</div><div class='add'>+</div><div class='add'>+	if (self-&gt;aq_nic_cfg.link_speed_msk &amp; AQ_NIC_RATE_100M_HALF)</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(cmd, advertising,</div><div class='add'>+						     100baseT_Half);</div><div class='add'>+</div><div class='add'>+	if (self-&gt;aq_nic_cfg.link_speed_msk &amp; AQ_NIC_RATE_10M)</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(cmd, advertising,</div><div class='add'>+						     10baseT_Full);</div><div class='add'>+</div><div class='add'>+	if (self-&gt;aq_nic_cfg.link_speed_msk &amp; AQ_NIC_RATE_10M_HALF)</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(cmd, advertising,</div><div class='add'>+						     10baseT_Half);</div><div class='add'>+</div><div class='add'>+	if (self-&gt;aq_nic_cfg.fc.cur &amp; AQ_NIC_FC_RX)</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(cmd, advertising,</div><div class='add'>+						     Pause);</div><div class='add'>+</div><div class='add'>+	/* Asym is when either RX or TX, but not both */</div><div class='add'>+	if (!!(self-&gt;aq_nic_cfg.fc.cur &amp; AQ_NIC_FC_TX) ^</div><div class='add'>+	    !!(self-&gt;aq_nic_cfg.fc.cur &amp; AQ_NIC_FC_RX))</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(cmd, advertising,</div><div class='add'>+						     Asym_Pause);</div><div class='add'>+</div><div class='add'>+	if (self-&gt;aq_nic_cfg.aq_hw_caps-&gt;media_type == AQ_HW_MEDIA_TYPE_FIBRE)</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE);</div><div class='add'>+	else</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);</div><div class='add'>+</div><div class='add'>+	ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising);</div><div class='add'>+	lp_link_speed_msk = self-&gt;aq_hw-&gt;aq_link_status.lp_link_speed_msk;</div><div class='add'>+</div><div class='add'>+	if (lp_link_speed_msk &amp; AQ_NIC_RATE_10G)</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,</div><div class='add'>+						     10000baseT_Full);</div><div class='add'>+</div><div class='add'>+	if (lp_link_speed_msk &amp; AQ_NIC_RATE_5G)</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,</div><div class='add'>+						     5000baseT_Full);</div><div class='add'>+</div><div class='add'>+	if (lp_link_speed_msk &amp; AQ_NIC_RATE_2G5)</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,</div><div class='add'>+						     2500baseT_Full);</div><div class='add'>+</div><div class='add'>+	if (lp_link_speed_msk &amp; AQ_NIC_RATE_1G)</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,</div><div class='add'>+						     1000baseT_Full);</div><div class='add'>+</div><div class='add'>+	if (lp_link_speed_msk &amp; AQ_NIC_RATE_1G_HALF)</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,</div><div class='add'>+						     1000baseT_Half);</div><div class='add'>+</div><div class='add'>+	if (lp_link_speed_msk &amp; AQ_NIC_RATE_100M)</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,</div><div class='add'>+						     100baseT_Full);</div><div class='add'>+</div><div class='add'>+	if (lp_link_speed_msk &amp; AQ_NIC_RATE_100M_HALF)</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,</div><div class='add'>+						     100baseT_Half);</div><div class='add'>+</div><div class='add'>+	if (lp_link_speed_msk &amp; AQ_NIC_RATE_10M)</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,</div><div class='add'>+						     10baseT_Full);</div><div class='add'>+</div><div class='add'>+	if (lp_link_speed_msk &amp; AQ_NIC_RATE_10M_HALF)</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,</div><div class='add'>+						     10baseT_Half);</div><div class='add'>+</div><div class='add'>+	if (self-&gt;aq_hw-&gt;aq_link_status.lp_flow_control &amp; AQ_NIC_FC_RX)</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,</div><div class='add'>+						     Pause);</div><div class='add'>+	if (!!(self-&gt;aq_hw-&gt;aq_link_status.lp_flow_control &amp; AQ_NIC_FC_TX) ^</div><div class='add'>+	    !!(self-&gt;aq_hw-&gt;aq_link_status.lp_flow_control &amp; AQ_NIC_FC_RX))</div><div class='add'>+		ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,</div><div class='add'>+						     Asym_Pause);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_nic_set_link_ksettings(struct aq_nic_s *self,</div><div class='add'>+			      const struct ethtool_link_ksettings *cmd)</div><div class='add'>+{</div><div class='add'>+	int fduplex = (cmd-&gt;base.duplex == DUPLEX_FULL);</div><div class='add'>+	u32 speed = cmd-&gt;base.speed;</div><div class='add'>+	u32 rate = 0U;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (!fduplex &amp;&amp; speed &gt; SPEED_1000) {</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cmd-&gt;base.autoneg == AUTONEG_ENABLE) {</div><div class='add'>+		rate = self-&gt;aq_nic_cfg.aq_hw_caps-&gt;link_speed_msk;</div><div class='add'>+		self-&gt;aq_nic_cfg.is_autoneg = true;</div><div class='add'>+	} else {</div><div class='add'>+		switch (speed) {</div><div class='add'>+		case SPEED_10:</div><div class='add'>+			rate = fduplex ? AQ_NIC_RATE_10M : AQ_NIC_RATE_10M_HALF;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case SPEED_100:</div><div class='add'>+			rate = fduplex ? AQ_NIC_RATE_100M</div><div class='add'>+				       : AQ_NIC_RATE_100M_HALF;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case SPEED_1000:</div><div class='add'>+			rate = fduplex ? AQ_NIC_RATE_1G : AQ_NIC_RATE_1G_HALF;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case SPEED_2500:</div><div class='add'>+			rate = AQ_NIC_RATE_2G5;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case SPEED_5000:</div><div class='add'>+			rate = AQ_NIC_RATE_5G;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case SPEED_10000:</div><div class='add'>+			rate = AQ_NIC_RATE_10G;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		default:</div><div class='add'>+			err = -1;</div><div class='add'>+			goto err_exit;</div><div class='add'>+		}</div><div class='add'>+		if (!(self-&gt;aq_nic_cfg.aq_hw_caps-&gt;link_speed_msk &amp; rate)) {</div><div class='add'>+			err = -1;</div><div class='add'>+			goto err_exit;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		self-&gt;aq_nic_cfg.is_autoneg = false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;self-&gt;fwreq_mutex);</div><div class='add'>+	err = self-&gt;aq_fw_ops-&gt;set_link_speed(self-&gt;aq_hw, rate);</div><div class='add'>+	mutex_unlock(&amp;self-&gt;fwreq_mutex);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	self-&gt;aq_nic_cfg.link_speed_msk = rate;</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct aq_nic_cfg_s *aq_nic_get_cfg(struct aq_nic_s *self)</div><div class='add'>+{</div><div class='add'>+	return &amp;self-&gt;aq_nic_cfg;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 aq_nic_get_fw_version(struct aq_nic_s *self)</div><div class='add'>+{</div><div class='add'>+	return self-&gt;aq_hw_ops-&gt;hw_get_fw_version(self-&gt;aq_hw);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_nic_set_loopback(struct aq_nic_s *self)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_cfg_s *cfg = &amp;self-&gt;aq_nic_cfg;</div><div class='add'>+</div><div class='add'>+	if (!self-&gt;aq_hw_ops-&gt;hw_set_loopback ||</div><div class='add'>+	    !self-&gt;aq_fw_ops-&gt;set_phyloopback)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;self-&gt;fwreq_mutex);</div><div class='add'>+	self-&gt;aq_hw_ops-&gt;hw_set_loopback(self-&gt;aq_hw,</div><div class='add'>+					 AQ_HW_LOOPBACK_DMA_SYS,</div><div class='add'>+					 !!(cfg-&gt;priv_flags &amp;</div><div class='add'>+					    BIT(AQ_HW_LOOPBACK_DMA_SYS)));</div><div class='add'>+</div><div class='add'>+	self-&gt;aq_hw_ops-&gt;hw_set_loopback(self-&gt;aq_hw,</div><div class='add'>+					 AQ_HW_LOOPBACK_PKT_SYS,</div><div class='add'>+					 !!(cfg-&gt;priv_flags &amp;</div><div class='add'>+					    BIT(AQ_HW_LOOPBACK_PKT_SYS)));</div><div class='add'>+</div><div class='add'>+	self-&gt;aq_hw_ops-&gt;hw_set_loopback(self-&gt;aq_hw,</div><div class='add'>+					 AQ_HW_LOOPBACK_DMA_NET,</div><div class='add'>+					 !!(cfg-&gt;priv_flags &amp;</div><div class='add'>+					    BIT(AQ_HW_LOOPBACK_DMA_NET)));</div><div class='add'>+</div><div class='add'>+	self-&gt;aq_fw_ops-&gt;set_phyloopback(self-&gt;aq_hw,</div><div class='add'>+					 AQ_HW_LOOPBACK_PHYINT_SYS,</div><div class='add'>+					 !!(cfg-&gt;priv_flags &amp;</div><div class='add'>+					    BIT(AQ_HW_LOOPBACK_PHYINT_SYS)));</div><div class='add'>+</div><div class='add'>+	self-&gt;aq_fw_ops-&gt;set_phyloopback(self-&gt;aq_hw,</div><div class='add'>+					 AQ_HW_LOOPBACK_PHYEXT_SYS,</div><div class='add'>+					 !!(cfg-&gt;priv_flags &amp;</div><div class='add'>+					    BIT(AQ_HW_LOOPBACK_PHYEXT_SYS)));</div><div class='add'>+	mutex_unlock(&amp;self-&gt;fwreq_mutex);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_nic_stop(struct aq_nic_s *self)</div><div class='add'>+{</div><div class='add'>+	unsigned int i = 0U;</div><div class='add'>+</div><div class='add'>+	netif_tx_disable(self-&gt;ndev);</div><div class='add'>+	netif_carrier_off(self-&gt;ndev);</div><div class='add'>+</div><div class='add'>+	timer_delete_sync(&amp;self-&gt;service_timer);</div><div class='add'>+	cancel_work_sync(&amp;self-&gt;service_task);</div><div class='add'>+</div><div class='add'>+	self-&gt;aq_hw_ops-&gt;hw_irq_disable(self-&gt;aq_hw, AQ_CFG_IRQ_MASK);</div><div class='add'>+</div><div class='add'>+	if (self-&gt;aq_nic_cfg.is_polling)</div><div class='add'>+		timer_delete_sync(&amp;self-&gt;polling_timer);</div><div class='add'>+	else</div><div class='add'>+		aq_pci_func_free_irqs(self);</div><div class='add'>+</div><div class='add'>+	aq_ptp_irq_free(self);</div><div class='add'>+</div><div class='add'>+	for (i = 0U; self-&gt;aq_vecs &gt; i; ++i)</div><div class='add'>+		aq_vec_stop(self-&gt;aq_vec[i]);</div><div class='add'>+</div><div class='add'>+	aq_ptp_ring_stop(self);</div><div class='add'>+</div><div class='add'>+	return self-&gt;aq_hw_ops-&gt;hw_stop(self-&gt;aq_hw);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void aq_nic_set_power(struct aq_nic_s *self)</div><div class='add'>+{</div><div class='add'>+	if (self-&gt;power_state != AQ_HW_POWER_STATE_D0 ||</div><div class='add'>+	    self-&gt;aq_hw-&gt;aq_nic_cfg-&gt;wol)</div><div class='add'>+		if (likely(self-&gt;aq_fw_ops-&gt;set_power)) {</div><div class='add'>+			mutex_lock(&amp;self-&gt;fwreq_mutex);</div><div class='add'>+			self-&gt;aq_fw_ops-&gt;set_power(self-&gt;aq_hw,</div><div class='add'>+						   self-&gt;power_state,</div><div class='add'>+						   self-&gt;ndev-&gt;dev_addr);</div><div class='add'>+			mutex_unlock(&amp;self-&gt;fwreq_mutex);</div><div class='add'>+		}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void aq_nic_deinit(struct aq_nic_s *self, bool link_down)</div><div class='add'>+{</div><div class='add'>+	struct aq_vec_s *aq_vec = NULL;</div><div class='add'>+	unsigned int i = 0U;</div><div class='add'>+</div><div class='add'>+	if (!self)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	for (i = 0U; i &lt; self-&gt;aq_vecs; i++) {</div><div class='add'>+		aq_vec = self-&gt;aq_vec[i];</div><div class='add'>+		aq_vec_deinit(aq_vec);</div><div class='add'>+		aq_vec_ring_free(aq_vec);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	aq_ptp_unregister(self);</div><div class='add'>+	aq_ptp_ring_deinit(self);</div><div class='add'>+	aq_ptp_ring_free(self);</div><div class='add'>+	aq_ptp_free(self);</div><div class='add'>+</div><div class='add'>+	/* May be invoked during hot unplug. */</div><div class='add'>+	if (pci_device_is_present(self-&gt;pdev) &amp;&amp;</div><div class='add'>+	    likely(self-&gt;aq_fw_ops-&gt;deinit) &amp;&amp; link_down) {</div><div class='add'>+		mutex_lock(&amp;self-&gt;fwreq_mutex);</div><div class='add'>+		self-&gt;aq_fw_ops-&gt;deinit(self-&gt;aq_hw);</div><div class='add'>+		mutex_unlock(&amp;self-&gt;fwreq_mutex);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+err_exit:;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void aq_nic_free_vectors(struct aq_nic_s *self)</div><div class='add'>+{</div><div class='add'>+	unsigned int i = 0U;</div><div class='add'>+</div><div class='add'>+	if (!self)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	for (i = ARRAY_SIZE(self-&gt;aq_vec); i--;) {</div><div class='add'>+		if (self-&gt;aq_vec[i]) {</div><div class='add'>+			aq_vec_free(self-&gt;aq_vec[i]);</div><div class='add'>+			self-&gt;aq_vec[i] = NULL;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+err_exit:;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_nic_realloc_vectors(struct aq_nic_s *self)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_cfg_s *cfg = aq_nic_get_cfg(self);</div><div class='add'>+</div><div class='add'>+	aq_nic_free_vectors(self);</div><div class='add'>+</div><div class='add'>+	for (self-&gt;aq_vecs = 0; self-&gt;aq_vecs &lt; cfg-&gt;vecs; self-&gt;aq_vecs++) {</div><div class='add'>+		self-&gt;aq_vec[self-&gt;aq_vecs] = aq_vec_alloc(self, self-&gt;aq_vecs,</div><div class='add'>+							   cfg);</div><div class='add'>+		if (unlikely(!self-&gt;aq_vec[self-&gt;aq_vecs]))</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void aq_nic_shutdown(struct aq_nic_s *self)</div><div class='add'>+{</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (!self-&gt;ndev)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	rtnl_lock();</div><div class='add'>+</div><div class='add'>+	netif_device_detach(self-&gt;ndev);</div><div class='add'>+</div><div class='add'>+	if (netif_running(self-&gt;ndev)) {</div><div class='add'>+		err = aq_nic_stop(self);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			goto err_exit;</div><div class='add'>+	}</div><div class='add'>+	aq_nic_deinit(self, !self-&gt;aq_hw-&gt;aq_nic_cfg-&gt;wol);</div><div class='add'>+	aq_nic_set_power(self);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u8 aq_nic_reserve_filter(struct aq_nic_s *self, enum aq_rx_filter_type type)</div><div class='add'>+{</div><div class='add'>+	u8 location = 0xFF;</div><div class='add'>+	u32 fltr_cnt;</div><div class='add'>+	u32 n_bit;</div><div class='add'>+</div><div class='add'>+	switch (type) {</div><div class='add'>+	case aq_rx_filter_ethertype:</div><div class='add'>+		location = AQ_RX_LAST_LOC_FETHERT - AQ_RX_FIRST_LOC_FETHERT -</div><div class='add'>+			   self-&gt;aq_hw_rx_fltrs.fet_reserved_count;</div><div class='add'>+		self-&gt;aq_hw_rx_fltrs.fet_reserved_count++;</div><div class='add'>+		break;</div><div class='add'>+	case aq_rx_filter_l3l4:</div><div class='add'>+		fltr_cnt = AQ_RX_LAST_LOC_FL3L4 - AQ_RX_FIRST_LOC_FL3L4;</div><div class='add'>+		n_bit = fltr_cnt - self-&gt;aq_hw_rx_fltrs.fl3l4.reserved_count;</div><div class='add'>+</div><div class='add'>+		self-&gt;aq_hw_rx_fltrs.fl3l4.active_ipv4 |= BIT(n_bit);</div><div class='add'>+		self-&gt;aq_hw_rx_fltrs.fl3l4.reserved_count++;</div><div class='add'>+		location = n_bit;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return location;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void aq_nic_release_filter(struct aq_nic_s *self, enum aq_rx_filter_type type,</div><div class='add'>+			   u32 location)</div><div class='add'>+{</div><div class='add'>+	switch (type) {</div><div class='add'>+	case aq_rx_filter_ethertype:</div><div class='add'>+		self-&gt;aq_hw_rx_fltrs.fet_reserved_count--;</div><div class='add'>+		break;</div><div class='add'>+	case aq_rx_filter_l3l4:</div><div class='add'>+		self-&gt;aq_hw_rx_fltrs.fl3l4.reserved_count--;</div><div class='add'>+		self-&gt;aq_hw_rx_fltrs.fl3l4.active_ipv4 &amp;= ~BIT(location);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_nic_set_downshift(struct aq_nic_s *self, int val)</div><div class='add'>+{</div><div class='add'>+	int err = 0;</div><div class='add'>+	struct aq_nic_cfg_s *cfg = &amp;self-&gt;aq_nic_cfg;</div><div class='add'>+</div><div class='add'>+	if (!self-&gt;aq_fw_ops-&gt;set_downshift)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (val &gt; 15) {</div><div class='add'>+		netdev_err(self-&gt;ndev, "downshift counter should be &lt;= 15\n");</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+	cfg-&gt;downshift_counter = val;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;self-&gt;fwreq_mutex);</div><div class='add'>+	err = self-&gt;aq_fw_ops-&gt;set_downshift(self-&gt;aq_hw, cfg-&gt;downshift_counter);</div><div class='add'>+	mutex_unlock(&amp;self-&gt;fwreq_mutex);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_nic_set_media_detect(struct aq_nic_s *self, int val)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_cfg_s *cfg = &amp;self-&gt;aq_nic_cfg;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (!self-&gt;aq_fw_ops-&gt;set_media_detect)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	if (val &gt; 0 &amp;&amp; val != AQ_HW_MEDIA_DETECT_CNT) {</div><div class='add'>+		netdev_err(self-&gt;ndev, "EDPD on this device could have only fixed value of %d\n",</div><div class='add'>+			   AQ_HW_MEDIA_DETECT_CNT);</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;self-&gt;fwreq_mutex);</div><div class='add'>+	err = self-&gt;aq_fw_ops-&gt;set_media_detect(self-&gt;aq_hw, !!val);</div><div class='add'>+	mutex_unlock(&amp;self-&gt;fwreq_mutex);</div><div class='add'>+</div><div class='add'>+	/* msecs plays no role - configuration is always fixed in PHY */</div><div class='add'>+	if (!err)</div><div class='add'>+		cfg-&gt;is_media_detect = !!val;</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_nic_setup_tc_mqprio(struct aq_nic_s *self, u32 tcs, u8 *prio_tc_map)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_cfg_s *cfg = &amp;self-&gt;aq_nic_cfg;</div><div class='add'>+	const unsigned int prev_vecs = cfg-&gt;vecs;</div><div class='add'>+	bool ndev_running;</div><div class='add'>+	int err = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* if already the same configuration or</div><div class='add'>+	 * disable request (tcs is 0) and we already is disabled</div><div class='add'>+	 */</div><div class='add'>+	if (tcs == cfg-&gt;tcs || (tcs == 0 &amp;&amp; !cfg-&gt;is_qos))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	ndev_running = netif_running(self-&gt;ndev);</div><div class='add'>+	if (ndev_running)</div><div class='add'>+		dev_close(self-&gt;ndev);</div><div class='add'>+</div><div class='add'>+	cfg-&gt;tcs = tcs;</div><div class='add'>+	if (cfg-&gt;tcs == 0)</div><div class='add'>+		cfg-&gt;tcs = 1;</div><div class='add'>+	if (prio_tc_map)</div><div class='add'>+		memcpy(cfg-&gt;prio_tc_map, prio_tc_map, sizeof(cfg-&gt;prio_tc_map));</div><div class='add'>+	else</div><div class='add'>+		for (i = 0; i &lt; sizeof(cfg-&gt;prio_tc_map); i++)</div><div class='add'>+			cfg-&gt;prio_tc_map[i] = cfg-&gt;tcs * i / 8;</div><div class='add'>+</div><div class='add'>+	cfg-&gt;is_qos = !!tcs;</div><div class='add'>+	cfg-&gt;is_ptp = (cfg-&gt;tcs &lt;= AQ_HW_PTP_TC);</div><div class='add'>+	if (!cfg-&gt;is_ptp)</div><div class='add'>+		netdev_warn(self-&gt;ndev, "%s\n",</div><div class='add'>+			    "PTP is auto disabled due to requested TC count.");</div><div class='add'>+</div><div class='add'>+	netdev_set_num_tc(self-&gt;ndev, cfg-&gt;tcs);</div><div class='add'>+</div><div class='add'>+	/* Changing the number of TCs might change the number of vectors */</div><div class='add'>+	aq_nic_cfg_update_num_vecs(self);</div><div class='add'>+	if (prev_vecs != cfg-&gt;vecs) {</div><div class='add'>+		err = aq_nic_realloc_vectors(self);</div><div class='add'>+		if (err)</div><div class='add'>+			goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (ndev_running)</div><div class='add'>+		err = dev_open(self-&gt;ndev, NULL);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_nic_setup_tc_max_rate(struct aq_nic_s *self, const unsigned int tc,</div><div class='add'>+			     const u32 max_rate)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_cfg_s *cfg = &amp;self-&gt;aq_nic_cfg;</div><div class='add'>+</div><div class='add'>+	if (tc &gt;= AQ_CFG_TCS_MAX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (max_rate &amp;&amp; max_rate &lt; 10) {</div><div class='add'>+		netdev_warn(self-&gt;ndev,</div><div class='add'>+			"Setting %s to the minimum usable value of %dMbps.\n",</div><div class='add'>+			"max rate", 10);</div><div class='add'>+		cfg-&gt;tc_max_rate[tc] = 10;</div><div class='add'>+	} else {</div><div class='add'>+		cfg-&gt;tc_max_rate[tc] = max_rate;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_nic_setup_tc_min_rate(struct aq_nic_s *self, const unsigned int tc,</div><div class='add'>+			     const u32 min_rate)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_cfg_s *cfg = &amp;self-&gt;aq_nic_cfg;</div><div class='add'>+</div><div class='add'>+	if (tc &gt;= AQ_CFG_TCS_MAX)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	if (min_rate)</div><div class='add'>+		set_bit(tc, &amp;cfg-&gt;tc_min_rate_msk);</div><div class='add'>+	else</div><div class='add'>+		clear_bit(tc, &amp;cfg-&gt;tc_min_rate_msk);</div><div class='add'>+</div><div class='add'>+	if (min_rate &amp;&amp; min_rate &lt; 20) {</div><div class='add'>+		netdev_warn(self-&gt;ndev,</div><div class='add'>+			"Setting %s to the minimum usable value of %dMbps.\n",</div><div class='add'>+			"min rate", 20);</div><div class='add'>+		cfg-&gt;tc_min_rate[tc] = 20;</div><div class='add'>+	} else {</div><div class='add'>+		cfg-&gt;tc_min_rate[tc] = min_rate;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_nic.h b/drivers/net/ethernet/aquantia/atlantic/aq_nic.h<br/>new file mode 100644<br/>index 000000000000..ad33f8586532<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_nic.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_nic.h</a></div><div class='hunk'>@@ -0,0 +1,221 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2014-2019 aQuantia Corporation</div><div class='add'>+ * Copyright (C) 2019-2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* File aq_nic.h: Declaration of common code for NIC. */</div><div class='add'>+</div><div class='add'>+#ifndef AQ_NIC_H</div><div class='add'>+#define AQ_NIC_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/ethtool.h&gt;</div><div class='add'>+#include &lt;net/xdp.h&gt;</div><div class='add'>+#include &lt;linux/bpf.h&gt;</div><div class='add'>+</div><div class='add'>+#include "aq_common.h"</div><div class='add'>+#include "aq_rss.h"</div><div class='add'>+#include "aq_hw.h"</div><div class='add'>+</div><div class='add'>+struct aq_ring_s;</div><div class='add'>+struct aq_hw_ops;</div><div class='add'>+struct aq_fw_s;</div><div class='add'>+struct aq_vec_s;</div><div class='add'>+struct aq_macsec_cfg;</div><div class='add'>+struct aq_ptp_s;</div><div class='add'>+enum aq_rx_filter_type;</div><div class='add'>+</div><div class='add'>+enum aq_fc_mode {</div><div class='add'>+	AQ_NIC_FC_OFF = 0,</div><div class='add'>+	AQ_NIC_FC_TX,</div><div class='add'>+	AQ_NIC_FC_RX,</div><div class='add'>+	AQ_NIC_FC_FULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct aq_fc_info {</div><div class='add'>+	enum aq_fc_mode req;</div><div class='add'>+	enum aq_fc_mode cur;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct aq_nic_cfg_s {</div><div class='add'>+	const struct aq_hw_caps_s *aq_hw_caps;</div><div class='add'>+	u64 features;</div><div class='add'>+	u32 rxds;		/* rx ring size, descriptors # */</div><div class='add'>+	u32 txds;		/* tx ring size, descriptors # */</div><div class='add'>+	u32 vecs;		/* allocated rx/tx vectors */</div><div class='add'>+	u32 link_irq_vec;</div><div class='add'>+	u32 irq_type;</div><div class='add'>+	u32 itr;</div><div class='add'>+	u16 rx_itr;</div><div class='add'>+	u16 tx_itr;</div><div class='add'>+	u32 rxpageorder;</div><div class='add'>+	u32 num_rss_queues;</div><div class='add'>+	u32 mtu;</div><div class='add'>+	struct aq_fc_info fc;</div><div class='add'>+	u32 link_speed_msk;</div><div class='add'>+	u32 wol;</div><div class='add'>+	u8 is_vlan_rx_strip;</div><div class='add'>+	u8 is_vlan_tx_insert;</div><div class='add'>+	bool is_vlan_force_promisc;</div><div class='add'>+	u16 is_mc_list_enabled;</div><div class='add'>+	u16 mc_list_count;</div><div class='add'>+	bool is_autoneg;</div><div class='add'>+	bool is_polling;</div><div class='add'>+	bool is_rss;</div><div class='add'>+	bool is_lro;</div><div class='add'>+	bool is_qos;</div><div class='add'>+	bool is_ptp;</div><div class='add'>+	bool is_media_detect;</div><div class='add'>+	int downshift_counter;</div><div class='add'>+	enum aq_tc_mode tc_mode;</div><div class='add'>+	u32 priv_flags;</div><div class='add'>+	u8  tcs;</div><div class='add'>+	u8 prio_tc_map[8];</div><div class='add'>+	u32 tc_max_rate[AQ_CFG_TCS_MAX];</div><div class='add'>+	unsigned long tc_min_rate_msk;</div><div class='add'>+	u32 tc_min_rate[AQ_CFG_TCS_MAX];</div><div class='add'>+	struct aq_rss_parameters aq_rss;</div><div class='add'>+	u32 eee_speeds;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define AQ_NIC_FLAG_STARTED     0x00000004U</div><div class='add'>+#define AQ_NIC_FLAG_STOPPING    0x00000008U</div><div class='add'>+#define AQ_NIC_FLAG_RESETTING   0x00000010U</div><div class='add'>+#define AQ_NIC_FLAG_CLOSING     0x00000020U</div><div class='add'>+#define AQ_NIC_PTP_DPATH_UP     0x02000000U</div><div class='add'>+#define AQ_NIC_LINK_DOWN        0x04000000U</div><div class='add'>+#define AQ_NIC_FLAG_ERR_UNPLUG  0x40000000U</div><div class='add'>+#define AQ_NIC_FLAG_ERR_HW      0x80000000U</div><div class='add'>+</div><div class='add'>+#define AQ_NIC_QUIRK_BAD_PTP    BIT(0)</div><div class='add'>+</div><div class='add'>+#define AQ_NIC_WOL_MODES        (WAKE_MAGIC |\</div><div class='add'>+				 WAKE_PHY)</div><div class='add'>+</div><div class='add'>+#define AQ_NIC_CFG_RING_PER_TC(_NIC_CFG_) \</div><div class='add'>+	(((_NIC_CFG_)-&gt;tc_mode == AQ_TC_MODE_4TCS) ? 8 : 4)</div><div class='add'>+</div><div class='add'>+#define AQ_NIC_CFG_TCVEC2RING(_NIC_CFG_, _TC_, _VEC_) \</div><div class='add'>+	((_TC_) * AQ_NIC_CFG_RING_PER_TC(_NIC_CFG_) + (_VEC_))</div><div class='add'>+</div><div class='add'>+#define AQ_NIC_RING2QMAP(_NIC_, _ID_) \</div><div class='add'>+	((_ID_) / AQ_NIC_CFG_RING_PER_TC(&amp;(_NIC_)-&gt;aq_nic_cfg) * \</div><div class='add'>+		(_NIC_)-&gt;aq_vecs + \</div><div class='add'>+	((_ID_) % AQ_NIC_CFG_RING_PER_TC(&amp;(_NIC_)-&gt;aq_nic_cfg)))</div><div class='add'>+</div><div class='add'>+struct aq_hw_rx_fl2 {</div><div class='add'>+	struct aq_rx_filter_vlan aq_vlans[AQ_VLAN_MAX_FILTERS];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct aq_hw_rx_fl3l4 {</div><div class='add'>+	u8 active_ipv4;</div><div class='add'>+	u8 active_ipv6:2;</div><div class='add'>+	u8 is_ipv6;</div><div class='add'>+	u8 reserved_count;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct aq_hw_rx_fltrs_s {</div><div class='add'>+	struct hlist_head     filter_list;</div><div class='add'>+	u16                   active_filters;</div><div class='add'>+	struct aq_hw_rx_fl2   fl2;</div><div class='add'>+	struct aq_hw_rx_fl3l4 fl3l4;</div><div class='add'>+	/* filter ether type */</div><div class='add'>+	u8 fet_reserved_count;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct aq_nic_s {</div><div class='add'>+	atomic_t flags;</div><div class='add'>+	u32 msg_enable;</div><div class='add'>+	struct aq_vec_s *aq_vec[AQ_CFG_VECS_MAX];</div><div class='add'>+	struct aq_ring_s *aq_ring_tx[AQ_HW_QUEUES_MAX];</div><div class='add'>+	struct aq_hw_s *aq_hw;</div><div class='add'>+	struct bpf_prog *xdp_prog;</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	unsigned int aq_vecs;</div><div class='add'>+	unsigned int packet_filter;</div><div class='add'>+	unsigned int power_state;</div><div class='add'>+	u8 port;</div><div class='add'>+	const struct aq_hw_ops *aq_hw_ops;</div><div class='add'>+	const struct aq_fw_ops *aq_fw_ops;</div><div class='add'>+	struct aq_nic_cfg_s aq_nic_cfg;</div><div class='add'>+	struct timer_list service_timer;</div><div class='add'>+	struct work_struct service_task;</div><div class='add'>+	struct timer_list polling_timer;</div><div class='add'>+	struct aq_hw_link_status_s link_status;</div><div class='add'>+	struct {</div><div class='add'>+		u32 count;</div><div class='add'>+		u8 ar[AQ_HW_MULTICAST_ADDRESS_MAX][ETH_ALEN];</div><div class='add'>+	} mc_list;</div><div class='add'>+	/* Bitmask of currently assigned vlans from linux */</div><div class='add'>+	unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];</div><div class='add'>+</div><div class='add'>+	struct pci_dev *pdev;</div><div class='add'>+	unsigned int msix_entry_mask;</div><div class='add'>+	u32 irqvecs;</div><div class='add'>+	/* mutex to serialize FW interface access operations */</div><div class='add'>+	struct mutex fwreq_mutex;</div><div class='add'>+#if IS_ENABLED(CONFIG_MACSEC)</div><div class='add'>+	struct aq_macsec_cfg *macsec_cfg;</div><div class='add'>+	/* mutex to protect data in macsec_cfg */</div><div class='add'>+	struct mutex macsec_mutex;</div><div class='add'>+#endif</div><div class='add'>+	/* PTP support */</div><div class='add'>+	struct aq_ptp_s *aq_ptp;</div><div class='add'>+	struct aq_hw_rx_fltrs_s aq_hw_rx_fltrs;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline struct device *aq_nic_get_dev(struct aq_nic_s *self)</div><div class='add'>+{</div><div class='add'>+	return self-&gt;ndev-&gt;dev.parent;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void aq_nic_ndev_init(struct aq_nic_s *self);</div><div class='add'>+struct aq_nic_s *aq_nic_alloc_hot(struct net_device *ndev);</div><div class='add'>+void aq_nic_set_tx_ring(struct aq_nic_s *self, unsigned int idx,</div><div class='add'>+			struct aq_ring_s *ring);</div><div class='add'>+struct net_device *aq_nic_get_ndev(struct aq_nic_s *self);</div><div class='add'>+int aq_nic_init(struct aq_nic_s *self);</div><div class='add'>+void aq_nic_cfg_start(struct aq_nic_s *self);</div><div class='add'>+int aq_nic_ndev_register(struct aq_nic_s *self);</div><div class='add'>+void aq_nic_ndev_free(struct aq_nic_s *self);</div><div class='add'>+int aq_nic_start(struct aq_nic_s *self);</div><div class='add'>+unsigned int aq_nic_map_skb(struct aq_nic_s *self, struct sk_buff *skb,</div><div class='add'>+			    struct aq_ring_s *ring);</div><div class='add'>+int aq_nic_xmit_xdpf(struct aq_nic_s *aq_nic, struct aq_ring_s *tx_ring,</div><div class='add'>+		     struct xdp_frame *xdpf);</div><div class='add'>+int aq_nic_xmit(struct aq_nic_s *self, struct sk_buff *skb);</div><div class='add'>+int aq_nic_get_regs(struct aq_nic_s *self, struct ethtool_regs *regs, void *p);</div><div class='add'>+int aq_nic_get_regs_count(struct aq_nic_s *self);</div><div class='add'>+u64 *aq_nic_get_stats(struct aq_nic_s *self, u64 *data);</div><div class='add'>+int aq_nic_stop(struct aq_nic_s *self);</div><div class='add'>+void aq_nic_deinit(struct aq_nic_s *self, bool link_down);</div><div class='add'>+void aq_nic_set_power(struct aq_nic_s *self);</div><div class='add'>+void aq_nic_free_hot_resources(struct aq_nic_s *self);</div><div class='add'>+void aq_nic_free_vectors(struct aq_nic_s *self);</div><div class='add'>+int aq_nic_realloc_vectors(struct aq_nic_s *self);</div><div class='add'>+int aq_nic_set_mtu(struct aq_nic_s *self, int new_mtu);</div><div class='add'>+int aq_nic_set_mac(struct aq_nic_s *self, struct net_device *ndev);</div><div class='add'>+int aq_nic_set_packet_filter(struct aq_nic_s *self, unsigned int flags);</div><div class='add'>+int aq_nic_set_multicast_list(struct aq_nic_s *self, struct net_device *ndev);</div><div class='add'>+unsigned int aq_nic_get_link_speed(struct aq_nic_s *self);</div><div class='add'>+void aq_nic_get_link_ksettings(struct aq_nic_s *self,</div><div class='add'>+			       struct ethtool_link_ksettings *cmd);</div><div class='add'>+int aq_nic_set_link_ksettings(struct aq_nic_s *self,</div><div class='add'>+			      const struct ethtool_link_ksettings *cmd);</div><div class='add'>+struct aq_nic_cfg_s *aq_nic_get_cfg(struct aq_nic_s *self);</div><div class='add'>+u32 aq_nic_get_fw_version(struct aq_nic_s *self);</div><div class='add'>+int aq_nic_set_loopback(struct aq_nic_s *self);</div><div class='add'>+int aq_nic_set_downshift(struct aq_nic_s *self, int val);</div><div class='add'>+int aq_nic_set_media_detect(struct aq_nic_s *self, int val);</div><div class='add'>+int aq_nic_update_interrupt_moderation_settings(struct aq_nic_s *self);</div><div class='add'>+void aq_nic_shutdown(struct aq_nic_s *self);</div><div class='add'>+u8 aq_nic_reserve_filter(struct aq_nic_s *self, enum aq_rx_filter_type type);</div><div class='add'>+void aq_nic_release_filter(struct aq_nic_s *self, enum aq_rx_filter_type type,</div><div class='add'>+			   u32 location);</div><div class='add'>+int aq_nic_setup_tc_mqprio(struct aq_nic_s *self, u32 tcs, u8 *prio_tc_map);</div><div class='add'>+int aq_nic_setup_tc_max_rate(struct aq_nic_s *self, const unsigned int tc,</div><div class='add'>+			     const u32 max_rate);</div><div class='add'>+int aq_nic_setup_tc_min_rate(struct aq_nic_s *self, const unsigned int tc,</div><div class='add'>+			     const u32 min_rate);</div><div class='add'>+#endif /* AQ_NIC_H */</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_pci_func.c b/drivers/net/ethernet/aquantia/atlantic/aq_pci_func.c<br/>new file mode 100644<br/>index 000000000000..ed5231dece3f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_pci_func.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_pci_func.c</a></div><div class='hunk'>@@ -0,0 +1,486 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2014-2019 aQuantia Corporation</div><div class='add'>+ * Copyright (C) 2019-2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* File aq_pci_func.c: Definition of PCI functions. */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/module.h&gt;</div><div class='add'>+</div><div class='add'>+#include "aq_main.h"</div><div class='add'>+#include "aq_nic.h"</div><div class='add'>+#include "aq_vec.h"</div><div class='add'>+#include "aq_hw.h"</div><div class='add'>+#include "aq_pci_func.h"</div><div class='add'>+#include "hw_atl/hw_atl_a0.h"</div><div class='add'>+#include "hw_atl/hw_atl_b0.h"</div><div class='add'>+#include "hw_atl2/hw_atl2.h"</div><div class='add'>+#include "aq_filters.h"</div><div class='add'>+#include "aq_drvinfo.h"</div><div class='add'>+#include "aq_macsec.h"</div><div class='add'>+</div><div class='add'>+static const struct pci_device_id aq_pci_tbl[] = {</div><div class='add'>+	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_0001), },</div><div class='add'>+	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_D100), },</div><div class='add'>+	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_D107), },</div><div class='add'>+	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_D108), },</div><div class='add'>+	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_D109), },</div><div class='add'>+</div><div class='add'>+	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC100), },</div><div class='add'>+	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC107), },</div><div class='add'>+	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC108), },</div><div class='add'>+	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC109), },</div><div class='add'>+	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC111), },</div><div class='add'>+	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC112), },</div><div class='add'>+</div><div class='add'>+	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC100S), },</div><div class='add'>+	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC107S), },</div><div class='add'>+	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC108S), },</div><div class='add'>+	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC109S), },</div><div class='add'>+	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC111S), },</div><div class='add'>+	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC112S), },</div><div class='add'>+</div><div class='add'>+	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC113DEV), },</div><div class='add'>+	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC113CS), },</div><div class='add'>+	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC114CS), },</div><div class='add'>+	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC113), },</div><div class='add'>+	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC113C), },</div><div class='add'>+	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC115C), },</div><div class='add'>+	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC113CA), },</div><div class='add'>+	{ PCI_VDEVICE(AQUANTIA, AQ_DEVICE_ID_AQC116C), },</div><div class='add'>+</div><div class='add'>+	{}</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static const struct aq_board_revision_s hw_atl_boards[] = {</div><div class='add'>+	{ AQ_DEVICE_ID_0001,	AQ_HWREV_1,	&amp;hw_atl_ops_a0, &amp;hw_atl_a0_caps_aqc107, },</div><div class='add'>+	{ AQ_DEVICE_ID_D100,	AQ_HWREV_1,	&amp;hw_atl_ops_a0, &amp;hw_atl_a0_caps_aqc100, },</div><div class='add'>+	{ AQ_DEVICE_ID_D107,	AQ_HWREV_1,	&amp;hw_atl_ops_a0, &amp;hw_atl_a0_caps_aqc107, },</div><div class='add'>+	{ AQ_DEVICE_ID_D108,	AQ_HWREV_1,	&amp;hw_atl_ops_a0, &amp;hw_atl_a0_caps_aqc108, },</div><div class='add'>+	{ AQ_DEVICE_ID_D109,	AQ_HWREV_1,	&amp;hw_atl_ops_a0, &amp;hw_atl_a0_caps_aqc109, },</div><div class='add'>+</div><div class='add'>+	{ AQ_DEVICE_ID_0001,	AQ_HWREV_2,	&amp;hw_atl_ops_b0, &amp;hw_atl_b0_caps_aqc107, },</div><div class='add'>+	{ AQ_DEVICE_ID_D100,	AQ_HWREV_2,	&amp;hw_atl_ops_b0, &amp;hw_atl_b0_caps_aqc100, },</div><div class='add'>+	{ AQ_DEVICE_ID_D107,	AQ_HWREV_2,	&amp;hw_atl_ops_b0, &amp;hw_atl_b0_caps_aqc107, },</div><div class='add'>+	{ AQ_DEVICE_ID_D108,	AQ_HWREV_2,	&amp;hw_atl_ops_b0, &amp;hw_atl_b0_caps_aqc108, },</div><div class='add'>+	{ AQ_DEVICE_ID_D109,	AQ_HWREV_2,	&amp;hw_atl_ops_b0, &amp;hw_atl_b0_caps_aqc109, },</div><div class='add'>+</div><div class='add'>+	{ AQ_DEVICE_ID_AQC100,	AQ_HWREV_ANY,	&amp;hw_atl_ops_b1, &amp;hw_atl_b0_caps_aqc100, },</div><div class='add'>+	{ AQ_DEVICE_ID_AQC107,	AQ_HWREV_ANY,	&amp;hw_atl_ops_b1, &amp;hw_atl_b0_caps_aqc107, },</div><div class='add'>+	{ AQ_DEVICE_ID_AQC108,	AQ_HWREV_ANY,	&amp;hw_atl_ops_b1, &amp;hw_atl_b0_caps_aqc108, },</div><div class='add'>+	{ AQ_DEVICE_ID_AQC109,	AQ_HWREV_ANY,	&amp;hw_atl_ops_b1, &amp;hw_atl_b0_caps_aqc109, },</div><div class='add'>+	{ AQ_DEVICE_ID_AQC111,	AQ_HWREV_ANY,	&amp;hw_atl_ops_b1, &amp;hw_atl_b0_caps_aqc111, },</div><div class='add'>+	{ AQ_DEVICE_ID_AQC112,	AQ_HWREV_ANY,	&amp;hw_atl_ops_b1, &amp;hw_atl_b0_caps_aqc112, },</div><div class='add'>+</div><div class='add'>+	{ AQ_DEVICE_ID_AQC100S,	AQ_HWREV_ANY,	&amp;hw_atl_ops_b1, &amp;hw_atl_b0_caps_aqc100s, },</div><div class='add'>+	{ AQ_DEVICE_ID_AQC107S,	AQ_HWREV_ANY,	&amp;hw_atl_ops_b1, &amp;hw_atl_b0_caps_aqc107s, },</div><div class='add'>+	{ AQ_DEVICE_ID_AQC108S,	AQ_HWREV_ANY,	&amp;hw_atl_ops_b1, &amp;hw_atl_b0_caps_aqc108s, },</div><div class='add'>+	{ AQ_DEVICE_ID_AQC109S,	AQ_HWREV_ANY,	&amp;hw_atl_ops_b1, &amp;hw_atl_b0_caps_aqc109s, },</div><div class='add'>+	{ AQ_DEVICE_ID_AQC111S,	AQ_HWREV_ANY,	&amp;hw_atl_ops_b1, &amp;hw_atl_b0_caps_aqc111s, },</div><div class='add'>+	{ AQ_DEVICE_ID_AQC112S,	AQ_HWREV_ANY,	&amp;hw_atl_ops_b1, &amp;hw_atl_b0_caps_aqc112s, },</div><div class='add'>+</div><div class='add'>+	{ AQ_DEVICE_ID_AQC113DEV,	AQ_HWREV_ANY,	&amp;hw_atl2_ops, &amp;hw_atl2_caps_aqc113, },</div><div class='add'>+	{ AQ_DEVICE_ID_AQC113,		AQ_HWREV_ANY,	&amp;hw_atl2_ops, &amp;hw_atl2_caps_aqc113, },</div><div class='add'>+	{ AQ_DEVICE_ID_AQC113CS,	AQ_HWREV_ANY,	&amp;hw_atl2_ops, &amp;hw_atl2_caps_aqc113, },</div><div class='add'>+	{ AQ_DEVICE_ID_AQC114CS,	AQ_HWREV_ANY,	&amp;hw_atl2_ops, &amp;hw_atl2_caps_aqc113, },</div><div class='add'>+	{ AQ_DEVICE_ID_AQC113C,		AQ_HWREV_ANY,	&amp;hw_atl2_ops, &amp;hw_atl2_caps_aqc113, },</div><div class='add'>+	{ AQ_DEVICE_ID_AQC115C,		AQ_HWREV_ANY,	&amp;hw_atl2_ops, &amp;hw_atl2_caps_aqc115c, },</div><div class='add'>+	{ AQ_DEVICE_ID_AQC113CA,	AQ_HWREV_ANY,	&amp;hw_atl2_ops, &amp;hw_atl2_caps_aqc113, },</div><div class='add'>+	{ AQ_DEVICE_ID_AQC116C,		AQ_HWREV_ANY,	&amp;hw_atl2_ops, &amp;hw_atl2_caps_aqc116c, },</div><div class='add'>+</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+MODULE_DEVICE_TABLE(pci, aq_pci_tbl);</div><div class='add'>+</div><div class='add'>+static int aq_pci_probe_get_hw_by_id(struct pci_dev *pdev,</div><div class='add'>+				     const struct aq_hw_ops **ops,</div><div class='add'>+				     const struct aq_hw_caps_s **caps)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (pdev-&gt;vendor != PCI_VENDOR_ID_AQUANTIA)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(hw_atl_boards); i++) {</div><div class='add'>+		if (hw_atl_boards[i].devid == pdev-&gt;device &amp;&amp;</div><div class='add'>+		    (hw_atl_boards[i].revision == AQ_HWREV_ANY ||</div><div class='add'>+		     hw_atl_boards[i].revision == pdev-&gt;revision)) {</div><div class='add'>+			*ops = hw_atl_boards[i].ops;</div><div class='add'>+			*caps = hw_atl_boards[i].caps;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (i == ARRAY_SIZE(hw_atl_boards))</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_pci_func_init(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = dma_set_mask_and_coherent(&amp;pdev-&gt;dev, DMA_BIT_MASK(64));</div><div class='add'>+	if (err)</div><div class='add'>+		err = dma_set_mask_and_coherent(&amp;pdev-&gt;dev, DMA_BIT_MASK(32));</div><div class='add'>+	if (err) {</div><div class='add'>+		err = -ENOSR;</div><div class='add'>+		goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = pci_request_regions(pdev, AQ_CFG_DRV_NAME "_mmio");</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	pci_set_master(pdev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_pci_func_alloc_irq(struct aq_nic_s *self, unsigned int i,</div><div class='add'>+			  char *name, irq_handler_t irq_handler,</div><div class='add'>+			  void *irq_arg, cpumask_t *affinity_mask)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = self-&gt;pdev;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (pdev-&gt;msix_enabled || pdev-&gt;msi_enabled)</div><div class='add'>+		err = request_irq(pci_irq_vector(pdev, i), irq_handler, 0,</div><div class='add'>+				  name, irq_arg);</div><div class='add'>+	else</div><div class='add'>+		err = request_irq(pci_irq_vector(pdev, i), aq_vec_isr_legacy,</div><div class='add'>+				  IRQF_SHARED, name, irq_arg);</div><div class='add'>+</div><div class='add'>+	if (err &gt;= 0) {</div><div class='add'>+		self-&gt;msix_entry_mask |= (1 &lt;&lt; i);</div><div class='add'>+</div><div class='add'>+		if (pdev-&gt;msix_enabled &amp;&amp; affinity_mask)</div><div class='add'>+			irq_update_affinity_hint(pci_irq_vector(pdev, i),</div><div class='add'>+						 affinity_mask);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void aq_pci_func_free_irqs(struct aq_nic_s *self)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = self-&gt;pdev;</div><div class='add'>+	unsigned int i;</div><div class='add'>+	void *irq_data;</div><div class='add'>+</div><div class='add'>+	for (i = 32U; i--;) {</div><div class='add'>+		if (!((1U &lt;&lt; i) &amp; self-&gt;msix_entry_mask))</div><div class='add'>+			continue;</div><div class='add'>+		if (self-&gt;aq_nic_cfg.link_irq_vec &amp;&amp;</div><div class='add'>+		    i == self-&gt;aq_nic_cfg.link_irq_vec)</div><div class='add'>+			irq_data = self;</div><div class='add'>+		else if (i &lt; AQ_CFG_VECS_MAX)</div><div class='add'>+			irq_data = self-&gt;aq_vec[i];</div><div class='add'>+		else</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (pdev-&gt;msix_enabled)</div><div class='add'>+			irq_update_affinity_hint(pci_irq_vector(pdev, i), NULL);</div><div class='add'>+		free_irq(pci_irq_vector(pdev, i), irq_data);</div><div class='add'>+		self-&gt;msix_entry_mask &amp;= ~(1U &lt;&lt; i);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+unsigned int aq_pci_func_get_irq_type(struct aq_nic_s *self)</div><div class='add'>+{</div><div class='add'>+	if (self-&gt;pdev-&gt;msix_enabled)</div><div class='add'>+		return AQ_HW_IRQ_MSIX;</div><div class='add'>+	if (self-&gt;pdev-&gt;msi_enabled)</div><div class='add'>+		return AQ_HW_IRQ_MSI;</div><div class='add'>+</div><div class='add'>+	return AQ_HW_IRQ_INTX;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aq_pci_free_irq_vectors(struct aq_nic_s *self)</div><div class='add'>+{</div><div class='add'>+	pci_free_irq_vectors(self-&gt;pdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_pci_probe(struct pci_dev *pdev,</div><div class='add'>+			const struct pci_device_id *pci_id)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev;</div><div class='add'>+	resource_size_t mmio_pa;</div><div class='add'>+	struct aq_nic_s *self;</div><div class='add'>+	u32 numvecs;</div><div class='add'>+	u32 bar;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = pci_enable_device(pdev);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = aq_pci_func_init(pdev);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_pci_func;</div><div class='add'>+</div><div class='add'>+	ndev = aq_ndev_alloc();</div><div class='add'>+	if (!ndev) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto err_ndev;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	self = netdev_priv(ndev);</div><div class='add'>+	self-&gt;pdev = pdev;</div><div class='add'>+	SET_NETDEV_DEV(ndev, &amp;pdev-&gt;dev);</div><div class='add'>+	pci_set_drvdata(pdev, self);</div><div class='add'>+</div><div class='add'>+	mutex_init(&amp;self-&gt;fwreq_mutex);</div><div class='add'>+</div><div class='add'>+	err = aq_pci_probe_get_hw_by_id(pdev, &amp;self-&gt;aq_hw_ops,</div><div class='add'>+					&amp;aq_nic_get_cfg(self)-&gt;aq_hw_caps);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_ioremap;</div><div class='add'>+</div><div class='add'>+	self-&gt;aq_hw = kzalloc(sizeof(*self-&gt;aq_hw), GFP_KERNEL);</div><div class='add'>+	if (!self-&gt;aq_hw) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto err_ioremap;</div><div class='add'>+	}</div><div class='add'>+	self-&gt;aq_hw-&gt;aq_nic_cfg = aq_nic_get_cfg(self);</div><div class='add'>+	if (self-&gt;aq_hw-&gt;aq_nic_cfg-&gt;aq_hw_caps-&gt;priv_data_len) {</div><div class='add'>+		int len = self-&gt;aq_hw-&gt;aq_nic_cfg-&gt;aq_hw_caps-&gt;priv_data_len;</div><div class='add'>+</div><div class='add'>+		self-&gt;aq_hw-&gt;priv = kzalloc(len, GFP_KERNEL);</div><div class='add'>+		if (!self-&gt;aq_hw-&gt;priv) {</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto err_free_aq_hw;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (bar = 0; bar &lt; 4; ++bar) {</div><div class='add'>+		if (IORESOURCE_MEM &amp; pci_resource_flags(pdev, bar)) {</div><div class='add'>+			resource_size_t reg_sz;</div><div class='add'>+</div><div class='add'>+			mmio_pa = pci_resource_start(pdev, bar);</div><div class='add'>+			if (mmio_pa == 0U) {</div><div class='add'>+				err = -EIO;</div><div class='add'>+				goto err_free_aq_hw_priv;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			reg_sz = pci_resource_len(pdev, bar);</div><div class='add'>+			if ((reg_sz &lt;= 24 /*ATL_REGS_SIZE*/)) {</div><div class='add'>+				err = -EIO;</div><div class='add'>+				goto err_free_aq_hw_priv;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			self-&gt;aq_hw-&gt;mmio = ioremap(mmio_pa, reg_sz);</div><div class='add'>+			if (!self-&gt;aq_hw-&gt;mmio) {</div><div class='add'>+				err = -EIO;</div><div class='add'>+				goto err_free_aq_hw_priv;</div><div class='add'>+			}</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (bar == 4) {</div><div class='add'>+		err = -EIO;</div><div class='add'>+		goto err_free_aq_hw_priv;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	numvecs = min((u8)AQ_CFG_VECS_DEF,</div><div class='add'>+		      aq_nic_get_cfg(self)-&gt;aq_hw_caps-&gt;msix_irqs);</div><div class='add'>+	numvecs = min(numvecs, num_online_cpus());</div><div class='add'>+	/* Request IRQ vector for PTP */</div><div class='add'>+	numvecs += 1;</div><div class='add'>+</div><div class='add'>+	numvecs += AQ_HW_SERVICE_IRQS;</div><div class='add'>+	/*enable interrupts */</div><div class='add'>+#if !AQ_CFG_FORCE_INTX</div><div class='add'>+	err = pci_alloc_irq_vectors(self-&gt;pdev, 1, numvecs, PCI_IRQ_ALL_TYPES);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_hwinit;</div><div class='add'>+	numvecs = err;</div><div class='add'>+#endif</div><div class='add'>+	self-&gt;irqvecs = numvecs;</div><div class='add'>+</div><div class='add'>+	/* net device init */</div><div class='add'>+	aq_nic_cfg_start(self);</div><div class='add'>+</div><div class='add'>+	aq_nic_ndev_init(self);</div><div class='add'>+</div><div class='add'>+	err = aq_nic_ndev_register(self);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_register;</div><div class='add'>+</div><div class='add'>+	aq_drvinfo_init(ndev);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_register:</div><div class='add'>+	aq_nic_free_vectors(self);</div><div class='add'>+	aq_pci_free_irq_vectors(self);</div><div class='add'>+err_hwinit:</div><div class='add'>+	iounmap(self-&gt;aq_hw-&gt;mmio);</div><div class='add'>+err_free_aq_hw_priv:</div><div class='add'>+	kfree(self-&gt;aq_hw-&gt;priv);</div><div class='add'>+err_free_aq_hw:</div><div class='add'>+	kfree(self-&gt;aq_hw);</div><div class='add'>+err_ioremap:</div><div class='add'>+	free_netdev(ndev);</div><div class='add'>+err_ndev:</div><div class='add'>+	pci_release_regions(pdev);</div><div class='add'>+err_pci_func:</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aq_pci_remove(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *self = pci_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	if (self-&gt;ndev) {</div><div class='add'>+		aq_clear_rxnfc_all_rules(self);</div><div class='add'>+		if (self-&gt;ndev-&gt;reg_state == NETREG_REGISTERED)</div><div class='add'>+			unregister_netdev(self-&gt;ndev);</div><div class='add'>+</div><div class='add'>+#if IS_ENABLED(CONFIG_MACSEC)</div><div class='add'>+		aq_macsec_free(self);</div><div class='add'>+#endif</div><div class='add'>+		aq_nic_free_vectors(self);</div><div class='add'>+		aq_pci_free_irq_vectors(self);</div><div class='add'>+		iounmap(self-&gt;aq_hw-&gt;mmio);</div><div class='add'>+		kfree(self-&gt;aq_hw-&gt;priv);</div><div class='add'>+		kfree(self-&gt;aq_hw);</div><div class='add'>+		pci_release_regions(pdev);</div><div class='add'>+		free_netdev(self-&gt;ndev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aq_pci_shutdown(struct pci_dev *pdev)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *self = pci_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	aq_nic_shutdown(self);</div><div class='add'>+</div><div class='add'>+	pci_disable_device(pdev);</div><div class='add'>+</div><div class='add'>+	if (system_state == SYSTEM_POWER_OFF) {</div><div class='add'>+		pci_wake_from_d3(pdev, false);</div><div class='add'>+		pci_set_power_state(pdev, PCI_D3hot);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#ifdef CONFIG_PM</div><div class='add'>+static int aq_suspend_common(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *nic = pci_get_drvdata(to_pci_dev(dev));</div><div class='add'>+</div><div class='add'>+	rtnl_lock();</div><div class='add'>+</div><div class='add'>+	nic-&gt;power_state = AQ_HW_POWER_STATE_D3;</div><div class='add'>+	netif_device_detach(nic-&gt;ndev);</div><div class='add'>+	netif_tx_stop_all_queues(nic-&gt;ndev);</div><div class='add'>+</div><div class='add'>+	if (netif_running(nic-&gt;ndev))</div><div class='add'>+		aq_nic_stop(nic);</div><div class='add'>+</div><div class='add'>+	aq_nic_deinit(nic, !nic-&gt;aq_hw-&gt;aq_nic_cfg-&gt;wol);</div><div class='add'>+	aq_nic_set_power(nic);</div><div class='add'>+</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int atl_resume_common(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = to_pci_dev(dev);</div><div class='add'>+	struct aq_nic_s *nic;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	nic = pci_get_drvdata(pdev);</div><div class='add'>+</div><div class='add'>+	rtnl_lock();</div><div class='add'>+</div><div class='add'>+	pci_set_power_state(pdev, PCI_D0);</div><div class='add'>+	pci_restore_state(pdev);</div><div class='add'>+</div><div class='add'>+	if (netif_running(nic-&gt;ndev)) {</div><div class='add'>+		ret = aq_nic_init(nic);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto err_exit;</div><div class='add'>+</div><div class='add'>+		ret = aq_nic_start(nic);</div><div class='add'>+		if (ret)</div><div class='add'>+			goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	netif_device_attach(nic-&gt;ndev);</div><div class='add'>+	netif_tx_start_all_queues(nic-&gt;ndev);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	if (ret &lt; 0)</div><div class='add'>+		aq_nic_deinit(nic, true);</div><div class='add'>+</div><div class='add'>+	rtnl_unlock();</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_pm_freeze(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	return aq_suspend_common(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_pm_suspend_poweroff(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	return aq_suspend_common(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_pm_thaw(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	return atl_resume_common(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_pm_resume_restore(struct device *dev)</div><div class='add'>+{</div><div class='add'>+	return atl_resume_common(dev);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const struct dev_pm_ops aq_pm_ops = {</div><div class='add'>+	.suspend = aq_pm_suspend_poweroff,</div><div class='add'>+	.poweroff = aq_pm_suspend_poweroff,</div><div class='add'>+	.freeze = aq_pm_freeze,</div><div class='add'>+	.resume = aq_pm_resume_restore,</div><div class='add'>+	.restore = aq_pm_resume_restore,</div><div class='add'>+	.thaw = aq_pm_thaw,</div><div class='add'>+};</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+static struct pci_driver aq_pci_driver = {</div><div class='add'>+	.name = AQ_CFG_DRV_NAME,</div><div class='add'>+	.id_table = aq_pci_tbl,</div><div class='add'>+	.probe = aq_pci_probe,</div><div class='add'>+	.remove = aq_pci_remove,</div><div class='add'>+	.shutdown = aq_pci_shutdown,</div><div class='add'>+#ifdef CONFIG_PM</div><div class='add'>+	.driver.pm = &amp;aq_pm_ops,</div><div class='add'>+#endif</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int aq_pci_func_register_driver(void)</div><div class='add'>+{</div><div class='add'>+	return pci_register_driver(&amp;aq_pci_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void aq_pci_func_unregister_driver(void)</div><div class='add'>+{</div><div class='add'>+	pci_unregister_driver(&amp;aq_pci_driver);</div><div class='add'>+}</div><div class='add'>+</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_pci_func.h b/drivers/net/ethernet/aquantia/atlantic/aq_pci_func.h<br/>new file mode 100644<br/>index 000000000000..3fa5f7a73680<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_pci_func.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_pci_func.h</a></div><div class='hunk'>@@ -0,0 +1,32 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2014-2019 aQuantia Corporation</div><div class='add'>+ * Copyright (C) 2019-2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* File aq_pci_func.h: Declaration of PCI functions. */</div><div class='add'>+</div><div class='add'>+#ifndef AQ_PCI_FUNC_H</div><div class='add'>+#define AQ_PCI_FUNC_H</div><div class='add'>+</div><div class='add'>+#include "aq_common.h"</div><div class='add'>+#include "aq_nic.h"</div><div class='add'>+</div><div class='add'>+struct aq_board_revision_s {</div><div class='add'>+	unsigned short devid;</div><div class='add'>+	unsigned short revision;</div><div class='add'>+	const struct aq_hw_ops *ops;</div><div class='add'>+	const struct aq_hw_caps_s *caps;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int aq_pci_func_alloc_irq(struct aq_nic_s *self, unsigned int i,</div><div class='add'>+			  char *name, irq_handler_t irq_handler,</div><div class='add'>+			  void *irq_arg, cpumask_t *affinity_mask);</div><div class='add'>+void aq_pci_func_free_irqs(struct aq_nic_s *self);</div><div class='add'>+unsigned int aq_pci_func_get_irq_type(struct aq_nic_s *self);</div><div class='add'>+</div><div class='add'>+int aq_pci_func_register_driver(void);</div><div class='add'>+void aq_pci_func_unregister_driver(void);</div><div class='add'>+</div><div class='add'>+#endif /* AQ_PCI_FUNC_H */</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_phy.c b/drivers/net/ethernet/aquantia/atlantic/aq_phy.c<br/>new file mode 100644<br/>index 000000000000..949ac2351701<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_phy.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_phy.c</a></div><div class='hunk'>@@ -0,0 +1,172 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2018-2019 aQuantia Corporation</div><div class='add'>+ * Copyright (C) 2019-2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "aq_phy.h"</div><div class='add'>+</div><div class='add'>+#define HW_ATL_PTP_DISABLE_MSK	BIT(10)</div><div class='add'>+</div><div class='add'>+bool aq_mdio_busy_wait(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	int err = 0;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	err = readx_poll_timeout_atomic(hw_atl_mdio_busy_get, aq_hw,</div><div class='add'>+					val, val == 0U, 10U, 100000U);</div><div class='add'>+</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u16 aq_mdio_read_word(struct aq_hw_s *aq_hw, u16 mmd, u16 addr)</div><div class='add'>+{</div><div class='add'>+	u16 phy_addr = aq_hw-&gt;phy_id &lt;&lt; 5 | mmd;</div><div class='add'>+</div><div class='add'>+	/* Set Address register. */</div><div class='add'>+	hw_atl_glb_mdio_iface4_set(aq_hw, (addr &amp; HW_ATL_MDIO_ADDRESS_MSK) &lt;&lt;</div><div class='add'>+				   HW_ATL_MDIO_ADDRESS_SHIFT);</div><div class='add'>+	/* Send Address command. */</div><div class='add'>+	hw_atl_glb_mdio_iface2_set(aq_hw, HW_ATL_MDIO_EXECUTE_OPERATION_MSK |</div><div class='add'>+				   (3 &lt;&lt; HW_ATL_MDIO_OP_MODE_SHIFT) |</div><div class='add'>+				   ((phy_addr &amp; HW_ATL_MDIO_PHY_ADDRESS_MSK) &lt;&lt;</div><div class='add'>+				    HW_ATL_MDIO_PHY_ADDRESS_SHIFT));</div><div class='add'>+</div><div class='add'>+	aq_mdio_busy_wait(aq_hw);</div><div class='add'>+</div><div class='add'>+	/* Send Read command. */</div><div class='add'>+	hw_atl_glb_mdio_iface2_set(aq_hw, HW_ATL_MDIO_EXECUTE_OPERATION_MSK |</div><div class='add'>+				   (1 &lt;&lt; HW_ATL_MDIO_OP_MODE_SHIFT) |</div><div class='add'>+				   ((phy_addr &amp; HW_ATL_MDIO_PHY_ADDRESS_MSK) &lt;&lt;</div><div class='add'>+				    HW_ATL_MDIO_PHY_ADDRESS_SHIFT));</div><div class='add'>+	/* Read result. */</div><div class='add'>+	aq_mdio_busy_wait(aq_hw);</div><div class='add'>+</div><div class='add'>+	return (u16)hw_atl_glb_mdio_iface5_get(aq_hw);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void aq_mdio_write_word(struct aq_hw_s *aq_hw, u16 mmd, u16 addr, u16 data)</div><div class='add'>+{</div><div class='add'>+	u16 phy_addr = aq_hw-&gt;phy_id &lt;&lt; 5 | mmd;</div><div class='add'>+</div><div class='add'>+	/* Set Address register. */</div><div class='add'>+	hw_atl_glb_mdio_iface4_set(aq_hw, (addr &amp; HW_ATL_MDIO_ADDRESS_MSK) &lt;&lt;</div><div class='add'>+				   HW_ATL_MDIO_ADDRESS_SHIFT);</div><div class='add'>+	/* Send Address command. */</div><div class='add'>+	hw_atl_glb_mdio_iface2_set(aq_hw, HW_ATL_MDIO_EXECUTE_OPERATION_MSK |</div><div class='add'>+				   (3 &lt;&lt; HW_ATL_MDIO_OP_MODE_SHIFT) |</div><div class='add'>+				   ((phy_addr &amp; HW_ATL_MDIO_PHY_ADDRESS_MSK) &lt;&lt;</div><div class='add'>+				    HW_ATL_MDIO_PHY_ADDRESS_SHIFT));</div><div class='add'>+</div><div class='add'>+	aq_mdio_busy_wait(aq_hw);</div><div class='add'>+</div><div class='add'>+	hw_atl_glb_mdio_iface3_set(aq_hw, (data &amp; HW_ATL_MDIO_WRITE_DATA_MSK) &lt;&lt;</div><div class='add'>+				   HW_ATL_MDIO_WRITE_DATA_SHIFT);</div><div class='add'>+	/* Send Write command. */</div><div class='add'>+	hw_atl_glb_mdio_iface2_set(aq_hw, HW_ATL_MDIO_EXECUTE_OPERATION_MSK |</div><div class='add'>+				   (2 &lt;&lt; HW_ATL_MDIO_OP_MODE_SHIFT) |</div><div class='add'>+				   ((phy_addr &amp; HW_ATL_MDIO_PHY_ADDRESS_MSK) &lt;&lt;</div><div class='add'>+				    HW_ATL_MDIO_PHY_ADDRESS_SHIFT));</div><div class='add'>+</div><div class='add'>+	aq_mdio_busy_wait(aq_hw);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u16 aq_phy_read_reg(struct aq_hw_s *aq_hw, u16 mmd, u16 address)</div><div class='add'>+{</div><div class='add'>+	int err = 0;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	err = readx_poll_timeout_atomic(hw_atl_sem_mdio_get, aq_hw,</div><div class='add'>+					val, val == 1U, 10U, 100000U);</div><div class='add'>+</div><div class='add'>+	if (err &lt; 0) {</div><div class='add'>+		err = 0xffff;</div><div class='add'>+		goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = aq_mdio_read_word(aq_hw, mmd, address);</div><div class='add'>+</div><div class='add'>+	hw_atl_reg_glb_cpu_sem_set(aq_hw, 1U, HW_ATL_FW_SM_MDIO);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void aq_phy_write_reg(struct aq_hw_s *aq_hw, u16 mmd, u16 address, u16 data)</div><div class='add'>+{</div><div class='add'>+	int err = 0;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	err = readx_poll_timeout_atomic(hw_atl_sem_mdio_get, aq_hw,</div><div class='add'>+					val, val == 1U, 10U, 100000U);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	aq_mdio_write_word(aq_hw, mmd, address, data);</div><div class='add'>+	hw_atl_reg_glb_cpu_sem_set(aq_hw, 1U, HW_ATL_FW_SM_MDIO);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool aq_phy_init_phy_id(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	u16 val;</div><div class='add'>+</div><div class='add'>+	for (aq_hw-&gt;phy_id = 0; aq_hw-&gt;phy_id &lt; HW_ATL_PHY_ID_MAX;</div><div class='add'>+	     ++aq_hw-&gt;phy_id) {</div><div class='add'>+		/* PMA Standard Device Identifier 2: Address 1.3 */</div><div class='add'>+		val = aq_phy_read_reg(aq_hw, MDIO_MMD_PMAPMD, 3);</div><div class='add'>+</div><div class='add'>+		if (val != 0xffff)</div><div class='add'>+			return true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool aq_phy_init(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	u32 dev_id;</div><div class='add'>+</div><div class='add'>+	if (aq_hw-&gt;phy_id == HW_ATL_PHY_ID_MAX)</div><div class='add'>+		if (!aq_phy_init_phy_id(aq_hw))</div><div class='add'>+			return false;</div><div class='add'>+</div><div class='add'>+	/* PMA Standard Device Identifier:</div><div class='add'>+	 * Address 1.2 = MSW,</div><div class='add'>+	 * Address 1.3 = LSW</div><div class='add'>+	 */</div><div class='add'>+	dev_id = aq_phy_read_reg(aq_hw, MDIO_MMD_PMAPMD, 2);</div><div class='add'>+	dev_id &lt;&lt;= 16;</div><div class='add'>+	dev_id |= aq_phy_read_reg(aq_hw, MDIO_MMD_PMAPMD, 3);</div><div class='add'>+</div><div class='add'>+	if (dev_id == 0xffffffff) {</div><div class='add'>+		aq_hw-&gt;phy_id = HW_ATL_PHY_ID_MAX;</div><div class='add'>+		return false;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return true;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void aq_phy_disable_ptp(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	static const u16 ptp_registers[] = {</div><div class='add'>+		0x031e,</div><div class='add'>+		0x031d,</div><div class='add'>+		0x031c,</div><div class='add'>+		0x031b,</div><div class='add'>+	};</div><div class='add'>+	u16 val;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(ptp_registers); i++) {</div><div class='add'>+		val = aq_phy_read_reg(aq_hw, MDIO_MMD_VEND1,</div><div class='add'>+				      ptp_registers[i]);</div><div class='add'>+</div><div class='add'>+		aq_phy_write_reg(aq_hw, MDIO_MMD_VEND1,</div><div class='add'>+				 ptp_registers[i],</div><div class='add'>+				 val &amp; ~HW_ATL_PTP_DISABLE_MSK);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_phy.h b/drivers/net/ethernet/aquantia/atlantic/aq_phy.h<br/>new file mode 100644<br/>index 000000000000..86cc1ee836e2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_phy.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_phy.h</a></div><div class='hunk'>@@ -0,0 +1,36 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2018-2019 aQuantia Corporation</div><div class='add'>+ * Copyright (C) 2019-2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef AQ_PHY_H</div><div class='add'>+#define AQ_PHY_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/mdio.h&gt;</div><div class='add'>+</div><div class='add'>+#include "hw_atl/hw_atl_llh.h"</div><div class='add'>+#include "hw_atl/hw_atl_llh_internal.h"</div><div class='add'>+#include "aq_hw_utils.h"</div><div class='add'>+#include "aq_hw.h"</div><div class='add'>+</div><div class='add'>+#define HW_ATL_PHY_ID_MAX 32U</div><div class='add'>+</div><div class='add'>+bool aq_mdio_busy_wait(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+u16 aq_mdio_read_word(struct aq_hw_s *aq_hw, u16 mmd, u16 addr);</div><div class='add'>+</div><div class='add'>+void aq_mdio_write_word(struct aq_hw_s *aq_hw, u16 mmd, u16 addr, u16 data);</div><div class='add'>+</div><div class='add'>+u16 aq_phy_read_reg(struct aq_hw_s *aq_hw, u16 mmd, u16 address);</div><div class='add'>+</div><div class='add'>+void aq_phy_write_reg(struct aq_hw_s *aq_hw, u16 mmd, u16 address, u16 data);</div><div class='add'>+</div><div class='add'>+bool aq_phy_init_phy_id(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+bool aq_phy_init(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+void aq_phy_disable_ptp(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+#endif /* AQ_PHY_H */</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_ptp.c b/drivers/net/ethernet/aquantia/atlantic/aq_ptp.c<br/>new file mode 100644<br/>index 000000000000..0fa0f891c0e0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_ptp.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_ptp.c</a></div><div class='hunk'>@@ -0,0 +1,1415 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2014-2019 aQuantia Corporation</div><div class='add'>+ * Copyright (C) 2019-2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* File aq_ptp.c:</div><div class='add'>+ * Definition of functions for Linux PTP support.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/ptp_clock_kernel.h&gt;</div><div class='add'>+#include &lt;linux/ptp_classify.h&gt;</div><div class='add'>+#include &lt;linux/interrupt.h&gt;</div><div class='add'>+#include &lt;linux/clocksource.h&gt;</div><div class='add'>+</div><div class='add'>+#include "aq_nic.h"</div><div class='add'>+#include "aq_ptp.h"</div><div class='add'>+#include "aq_ring.h"</div><div class='add'>+#include "aq_phy.h"</div><div class='add'>+#include "aq_filters.h"</div><div class='add'>+</div><div class='add'>+#if IS_REACHABLE(CONFIG_PTP_1588_CLOCK)</div><div class='add'>+</div><div class='add'>+#define AQ_PTP_TX_TIMEOUT        (HZ *  10)</div><div class='add'>+</div><div class='add'>+#define POLL_SYNC_TIMER_MS 15</div><div class='add'>+</div><div class='add'>+enum ptp_speed_offsets {</div><div class='add'>+	ptp_offset_idx_10 = 0,</div><div class='add'>+	ptp_offset_idx_100,</div><div class='add'>+	ptp_offset_idx_1000,</div><div class='add'>+	ptp_offset_idx_2500,</div><div class='add'>+	ptp_offset_idx_5000,</div><div class='add'>+	ptp_offset_idx_10000,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ptp_skb_ring {</div><div class='add'>+	struct sk_buff **buff;</div><div class='add'>+	spinlock_t lock;</div><div class='add'>+	unsigned int size;</div><div class='add'>+	unsigned int head;</div><div class='add'>+	unsigned int tail;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ptp_tx_timeout {</div><div class='add'>+	spinlock_t lock;</div><div class='add'>+	bool active;</div><div class='add'>+	unsigned long tx_start;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct aq_ptp_s {</div><div class='add'>+	struct aq_nic_s *aq_nic;</div><div class='add'>+	struct kernel_hwtstamp_config hwtstamp_config;</div><div class='add'>+	spinlock_t ptp_lock;</div><div class='add'>+	spinlock_t ptp_ring_lock;</div><div class='add'>+	struct ptp_clock *ptp_clock;</div><div class='add'>+	struct ptp_clock_info ptp_info;</div><div class='add'>+</div><div class='add'>+	atomic_t offset_egress;</div><div class='add'>+	atomic_t offset_ingress;</div><div class='add'>+</div><div class='add'>+	struct aq_ring_param_s ptp_ring_param;</div><div class='add'>+</div><div class='add'>+	struct ptp_tx_timeout ptp_tx_timeout;</div><div class='add'>+</div><div class='add'>+	unsigned int idx_vector;</div><div class='add'>+	struct napi_struct napi;</div><div class='add'>+</div><div class='add'>+	struct aq_ring_s ptp_tx;</div><div class='add'>+	struct aq_ring_s ptp_rx;</div><div class='add'>+	struct aq_ring_s hwts_rx;</div><div class='add'>+</div><div class='add'>+	struct ptp_skb_ring skb_ring;</div><div class='add'>+</div><div class='add'>+	struct aq_rx_filter_l3l4 udp_filter;</div><div class='add'>+	struct aq_rx_filter_l2 eth_type_filter;</div><div class='add'>+</div><div class='add'>+	struct delayed_work poll_sync;</div><div class='add'>+	u32 poll_timeout_ms;</div><div class='add'>+</div><div class='add'>+	bool extts_pin_enabled;</div><div class='add'>+	u64 last_sync1588_ts;</div><div class='add'>+</div><div class='add'>+	bool a1_ptp;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct ptp_tm_offset {</div><div class='add'>+	unsigned int mbps;</div><div class='add'>+	int egress;</div><div class='add'>+	int ingress;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static struct ptp_tm_offset ptp_offset[6];</div><div class='add'>+</div><div class='add'>+void aq_ptp_tm_offset_set(struct aq_nic_s *aq_nic, unsigned int mbps)</div><div class='add'>+{</div><div class='add'>+	struct aq_ptp_s *aq_ptp = aq_nic-&gt;aq_ptp;</div><div class='add'>+	int i, egress, ingress;</div><div class='add'>+</div><div class='add'>+	if (!aq_ptp)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	egress = 0;</div><div class='add'>+	ingress = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(ptp_offset); i++) {</div><div class='add'>+		if (mbps == ptp_offset[i].mbps) {</div><div class='add'>+			egress = ptp_offset[i].egress;</div><div class='add'>+			ingress = ptp_offset[i].ingress;</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	atomic_set(&amp;aq_ptp-&gt;offset_egress, egress);</div><div class='add'>+	atomic_set(&amp;aq_ptp-&gt;offset_ingress, ingress);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __aq_ptp_skb_put(struct ptp_skb_ring *ring, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	unsigned int next_head = (ring-&gt;head + 1) % ring-&gt;size;</div><div class='add'>+</div><div class='add'>+	if (next_head == ring-&gt;tail)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	ring-&gt;buff[ring-&gt;head] = skb_get(skb);</div><div class='add'>+	ring-&gt;head = next_head;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_ptp_skb_put(struct ptp_skb_ring *ring, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;ring-&gt;lock, flags);</div><div class='add'>+	ret = __aq_ptp_skb_put(ring, skb);</div><div class='add'>+	spin_unlock_irqrestore(&amp;ring-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct sk_buff *__aq_ptp_skb_get(struct ptp_skb_ring *ring)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	if (ring-&gt;tail == ring-&gt;head)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	skb = ring-&gt;buff[ring-&gt;tail];</div><div class='add'>+	ring-&gt;tail = (ring-&gt;tail + 1) % ring-&gt;size;</div><div class='add'>+</div><div class='add'>+	return skb;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct sk_buff *aq_ptp_skb_get(struct ptp_skb_ring *ring)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;ring-&gt;lock, flags);</div><div class='add'>+	skb = __aq_ptp_skb_get(ring);</div><div class='add'>+	spin_unlock_irqrestore(&amp;ring-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return skb;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static unsigned int aq_ptp_skb_buf_len(struct ptp_skb_ring *ring)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	unsigned int len;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;ring-&gt;lock, flags);</div><div class='add'>+	len = (ring-&gt;head &gt;= ring-&gt;tail) ?</div><div class='add'>+	ring-&gt;head - ring-&gt;tail :</div><div class='add'>+	ring-&gt;size - ring-&gt;tail + ring-&gt;head;</div><div class='add'>+	spin_unlock_irqrestore(&amp;ring-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	return len;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_ptp_skb_ring_init(struct ptp_skb_ring *ring, unsigned int size)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff **buff = kmalloc(sizeof(*buff) * size, GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	if (!buff)</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;ring-&gt;lock);</div><div class='add'>+</div><div class='add'>+	ring-&gt;buff = buff;</div><div class='add'>+	ring-&gt;size = size;</div><div class='add'>+	ring-&gt;head = 0;</div><div class='add'>+	ring-&gt;tail = 0;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aq_ptp_skb_ring_clean(struct ptp_skb_ring *ring)</div><div class='add'>+{</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	while ((skb = aq_ptp_skb_get(ring)) != NULL)</div><div class='add'>+		dev_kfree_skb_any(skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aq_ptp_skb_ring_release(struct ptp_skb_ring *ring)</div><div class='add'>+{</div><div class='add'>+	if (ring-&gt;buff) {</div><div class='add'>+		aq_ptp_skb_ring_clean(ring);</div><div class='add'>+		kfree(ring-&gt;buff);</div><div class='add'>+		ring-&gt;buff = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aq_ptp_tx_timeout_init(struct ptp_tx_timeout *timeout)</div><div class='add'>+{</div><div class='add'>+	spin_lock_init(&amp;timeout-&gt;lock);</div><div class='add'>+	timeout-&gt;active = false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aq_ptp_tx_timeout_start(struct aq_ptp_s *aq_ptp)</div><div class='add'>+{</div><div class='add'>+	struct ptp_tx_timeout *timeout = &amp;aq_ptp-&gt;ptp_tx_timeout;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;timeout-&gt;lock, flags);</div><div class='add'>+	timeout-&gt;active = true;</div><div class='add'>+	timeout-&gt;tx_start = jiffies;</div><div class='add'>+	spin_unlock_irqrestore(&amp;timeout-&gt;lock, flags);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aq_ptp_tx_timeout_update(struct aq_ptp_s *aq_ptp)</div><div class='add'>+{</div><div class='add'>+	if (!aq_ptp_skb_buf_len(&amp;aq_ptp-&gt;skb_ring)) {</div><div class='add'>+		struct ptp_tx_timeout *timeout = &amp;aq_ptp-&gt;ptp_tx_timeout;</div><div class='add'>+		unsigned long flags;</div><div class='add'>+</div><div class='add'>+		spin_lock_irqsave(&amp;timeout-&gt;lock, flags);</div><div class='add'>+		timeout-&gt;active = false;</div><div class='add'>+		spin_unlock_irqrestore(&amp;timeout-&gt;lock, flags);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aq_ptp_tx_timeout_check(struct aq_ptp_s *aq_ptp)</div><div class='add'>+{</div><div class='add'>+	struct ptp_tx_timeout *timeout = &amp;aq_ptp-&gt;ptp_tx_timeout;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	bool timeout_flag;</div><div class='add'>+</div><div class='add'>+	timeout_flag = false;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;timeout-&gt;lock, flags);</div><div class='add'>+	if (timeout-&gt;active) {</div><div class='add'>+		timeout_flag = time_is_before_jiffies(timeout-&gt;tx_start +</div><div class='add'>+						      AQ_PTP_TX_TIMEOUT);</div><div class='add'>+		/* reset active flag if timeout detected */</div><div class='add'>+		if (timeout_flag)</div><div class='add'>+			timeout-&gt;active = false;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;timeout-&gt;lock, flags);</div><div class='add'>+</div><div class='add'>+	if (timeout_flag) {</div><div class='add'>+		aq_ptp_skb_ring_clean(&amp;aq_ptp-&gt;skb_ring);</div><div class='add'>+		netdev_err(aq_ptp-&gt;aq_nic-&gt;ndev,</div><div class='add'>+			   "PTP Timeout. Clearing Tx Timestamp SKBs\n");</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* aq_ptp_adjfine</div><div class='add'>+ * @ptp: the ptp clock structure</div><div class='add'>+ * @ppb: parts per billion adjustment from base</div><div class='add'>+ *</div><div class='add'>+ * adjust the frequency of the ptp cycle counter by the</div><div class='add'>+ * indicated ppb from the base frequency.</div><div class='add'>+ */</div><div class='add'>+static int aq_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)</div><div class='add'>+{</div><div class='add'>+	struct aq_ptp_s *aq_ptp = container_of(ptp, struct aq_ptp_s, ptp_info);</div><div class='add'>+	struct aq_nic_s *aq_nic = aq_ptp-&gt;aq_nic;</div><div class='add'>+</div><div class='add'>+	mutex_lock(&amp;aq_nic-&gt;fwreq_mutex);</div><div class='add'>+	aq_nic-&gt;aq_hw_ops-&gt;hw_adj_clock_freq(aq_nic-&gt;aq_hw,</div><div class='add'>+					     scaled_ppm_to_ppb(scaled_ppm));</div><div class='add'>+	mutex_unlock(&amp;aq_nic-&gt;fwreq_mutex);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* aq_ptp_adjtime</div><div class='add'>+ * @ptp: the ptp clock structure</div><div class='add'>+ * @delta: offset to adjust the cycle counter by</div><div class='add'>+ *</div><div class='add'>+ * adjust the timer by resetting the timecounter structure.</div><div class='add'>+ */</div><div class='add'>+static int aq_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)</div><div class='add'>+{</div><div class='add'>+	struct aq_ptp_s *aq_ptp = container_of(ptp, struct aq_ptp_s, ptp_info);</div><div class='add'>+	struct aq_nic_s *aq_nic = aq_ptp-&gt;aq_nic;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;aq_ptp-&gt;ptp_lock, flags);</div><div class='add'>+	aq_nic-&gt;aq_hw_ops-&gt;hw_adj_sys_clock(aq_nic-&gt;aq_hw, delta);</div><div class='add'>+	spin_unlock_irqrestore(&amp;aq_ptp-&gt;ptp_lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* aq_ptp_gettime</div><div class='add'>+ * @ptp: the ptp clock structure</div><div class='add'>+ * @ts: timespec structure to hold the current time value</div><div class='add'>+ *</div><div class='add'>+ * read the timecounter and return the correct value on ns,</div><div class='add'>+ * after converting it into a struct timespec.</div><div class='add'>+ */</div><div class='add'>+static int aq_ptp_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)</div><div class='add'>+{</div><div class='add'>+	struct aq_ptp_s *aq_ptp = container_of(ptp, struct aq_ptp_s, ptp_info);</div><div class='add'>+	struct aq_nic_s *aq_nic = aq_ptp-&gt;aq_nic;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u64 ns;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;aq_ptp-&gt;ptp_lock, flags);</div><div class='add'>+	aq_nic-&gt;aq_hw_ops-&gt;hw_get_ptp_ts(aq_nic-&gt;aq_hw, &amp;ns);</div><div class='add'>+	spin_unlock_irqrestore(&amp;aq_ptp-&gt;ptp_lock, flags);</div><div class='add'>+</div><div class='add'>+	*ts = ns_to_timespec64(ns);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* aq_ptp_settime</div><div class='add'>+ * @ptp: the ptp clock structure</div><div class='add'>+ * @ts: the timespec containing the new time for the cycle counter</div><div class='add'>+ *</div><div class='add'>+ * reset the timecounter to use a new base value instead of the kernel</div><div class='add'>+ * wall timer value.</div><div class='add'>+ */</div><div class='add'>+static int aq_ptp_settime(struct ptp_clock_info *ptp,</div><div class='add'>+			  const struct timespec64 *ts)</div><div class='add'>+{</div><div class='add'>+	struct aq_ptp_s *aq_ptp = container_of(ptp, struct aq_ptp_s, ptp_info);</div><div class='add'>+	struct aq_nic_s *aq_nic = aq_ptp-&gt;aq_nic;</div><div class='add'>+	unsigned long flags;</div><div class='add'>+	u64 ns = timespec64_to_ns(ts);</div><div class='add'>+	u64 now;</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;aq_ptp-&gt;ptp_lock, flags);</div><div class='add'>+	aq_nic-&gt;aq_hw_ops-&gt;hw_get_ptp_ts(aq_nic-&gt;aq_hw, &amp;now);</div><div class='add'>+	aq_nic-&gt;aq_hw_ops-&gt;hw_adj_sys_clock(aq_nic-&gt;aq_hw, (s64)ns - (s64)now);</div><div class='add'>+</div><div class='add'>+	spin_unlock_irqrestore(&amp;aq_ptp-&gt;ptp_lock, flags);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aq_ptp_convert_to_hwtstamp(struct aq_ptp_s *aq_ptp,</div><div class='add'>+				       struct skb_shared_hwtstamps *hwtstamp,</div><div class='add'>+				       u64 timestamp)</div><div class='add'>+{</div><div class='add'>+	memset(hwtstamp, 0, sizeof(*hwtstamp));</div><div class='add'>+	hwtstamp-&gt;hwtstamp = ns_to_ktime(timestamp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_ptp_hw_pin_conf(struct aq_nic_s *aq_nic, u32 pin_index, u64 start,</div><div class='add'>+			      u64 period)</div><div class='add'>+{</div><div class='add'>+	if (period)</div><div class='add'>+		netdev_dbg(aq_nic-&gt;ndev,</div><div class='add'>+			   "Enable GPIO %d pulsing, start time %llu, period %u\n",</div><div class='add'>+			   pin_index, start, (u32)period);</div><div class='add'>+	else</div><div class='add'>+		netdev_dbg(aq_nic-&gt;ndev,</div><div class='add'>+			   "Disable GPIO %d pulsing, start time %llu, period %u\n",</div><div class='add'>+			   pin_index, start, (u32)period);</div><div class='add'>+</div><div class='add'>+	/* Notify hardware of request to being sending pulses.</div><div class='add'>+	 * If period is ZERO then pulsen is disabled.</div><div class='add'>+	 */</div><div class='add'>+	mutex_lock(&amp;aq_nic-&gt;fwreq_mutex);</div><div class='add'>+	aq_nic-&gt;aq_hw_ops-&gt;hw_gpio_pulse(aq_nic-&gt;aq_hw, pin_index,</div><div class='add'>+					 start, (u32)period);</div><div class='add'>+	mutex_unlock(&amp;aq_nic-&gt;fwreq_mutex);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_ptp_perout_pin_configure(struct ptp_clock_info *ptp,</div><div class='add'>+				       struct ptp_clock_request *rq, int on)</div><div class='add'>+{</div><div class='add'>+	struct aq_ptp_s *aq_ptp = container_of(ptp, struct aq_ptp_s, ptp_info);</div><div class='add'>+	struct ptp_clock_time *t = &amp;rq-&gt;perout.period;</div><div class='add'>+	struct ptp_clock_time *s = &amp;rq-&gt;perout.start;</div><div class='add'>+	struct aq_nic_s *aq_nic = aq_ptp-&gt;aq_nic;</div><div class='add'>+	u64 start, period;</div><div class='add'>+	u32 pin_index = rq-&gt;perout.index;</div><div class='add'>+</div><div class='add'>+	/* verify the request channel is there */</div><div class='add'>+	if (pin_index &gt;= ptp-&gt;n_per_out)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* we cannot support periods greater</div><div class='add'>+	 * than 4 seconds due to reg limit</div><div class='add'>+	 */</div><div class='add'>+	if (t-&gt;sec &gt; 4 || t-&gt;sec &lt; 0)</div><div class='add'>+		return -ERANGE;</div><div class='add'>+</div><div class='add'>+	/* convert to unsigned 64b ns,</div><div class='add'>+	 * verify we can put it in a 32b register</div><div class='add'>+	 */</div><div class='add'>+	period = on ? t-&gt;sec * NSEC_PER_SEC + t-&gt;nsec : 0;</div><div class='add'>+</div><div class='add'>+	/* verify the value is in range supported by hardware */</div><div class='add'>+	if (period &gt; U32_MAX)</div><div class='add'>+		return -ERANGE;</div><div class='add'>+	/* convert to unsigned 64b ns */</div><div class='add'>+	/* TODO convert to AQ time */</div><div class='add'>+	start = on ? s-&gt;sec * NSEC_PER_SEC + s-&gt;nsec : 0;</div><div class='add'>+</div><div class='add'>+	aq_ptp_hw_pin_conf(aq_nic, pin_index, start, period);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_ptp_pps_pin_configure(struct ptp_clock_info *ptp,</div><div class='add'>+				    struct ptp_clock_request *rq, int on)</div><div class='add'>+{</div><div class='add'>+	struct aq_ptp_s *aq_ptp = container_of(ptp, struct aq_ptp_s, ptp_info);</div><div class='add'>+	struct aq_nic_s *aq_nic = aq_ptp-&gt;aq_nic;</div><div class='add'>+	u64 start, period;</div><div class='add'>+	u32 pin_index = 0;</div><div class='add'>+	u32 rest = 0;</div><div class='add'>+</div><div class='add'>+	/* verify the request channel is there */</div><div class='add'>+	if (pin_index &gt;= ptp-&gt;n_per_out)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	aq_nic-&gt;aq_hw_ops-&gt;hw_get_ptp_ts(aq_nic-&gt;aq_hw, &amp;start);</div><div class='add'>+	div_u64_rem(start, NSEC_PER_SEC, &amp;rest);</div><div class='add'>+	period = on ? NSEC_PER_SEC : 0; /* PPS - pulse per second */</div><div class='add'>+	start = on ? start - rest + NSEC_PER_SEC *</div><div class='add'>+		(rest &gt; 990000000LL ? 2 : 1) : 0;</div><div class='add'>+</div><div class='add'>+	aq_ptp_hw_pin_conf(aq_nic, pin_index, start, period);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aq_ptp_extts_pin_ctrl(struct aq_ptp_s *aq_ptp)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = aq_ptp-&gt;aq_nic;</div><div class='add'>+	u32 enable = aq_ptp-&gt;extts_pin_enabled;</div><div class='add'>+</div><div class='add'>+	if (aq_nic-&gt;aq_hw_ops-&gt;hw_extts_gpio_enable)</div><div class='add'>+		aq_nic-&gt;aq_hw_ops-&gt;hw_extts_gpio_enable(aq_nic-&gt;aq_hw, 0,</div><div class='add'>+							enable);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_ptp_extts_pin_configure(struct ptp_clock_info *ptp,</div><div class='add'>+				      struct ptp_clock_request *rq, int on)</div><div class='add'>+{</div><div class='add'>+	struct aq_ptp_s *aq_ptp = container_of(ptp, struct aq_ptp_s, ptp_info);</div><div class='add'>+</div><div class='add'>+	u32 pin_index = rq-&gt;extts.index;</div><div class='add'>+</div><div class='add'>+	if (pin_index &gt;= ptp-&gt;n_ext_ts)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	aq_ptp-&gt;extts_pin_enabled = !!on;</div><div class='add'>+	if (on) {</div><div class='add'>+		aq_ptp-&gt;poll_timeout_ms = POLL_SYNC_TIMER_MS;</div><div class='add'>+		cancel_delayed_work_sync(&amp;aq_ptp-&gt;poll_sync);</div><div class='add'>+		schedule_delayed_work(&amp;aq_ptp-&gt;poll_sync,</div><div class='add'>+				      msecs_to_jiffies(aq_ptp-&gt;poll_timeout_ms));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	aq_ptp_extts_pin_ctrl(aq_ptp);</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* aq_ptp_gpio_feature_enable</div><div class='add'>+ * @ptp: the ptp clock structure</div><div class='add'>+ * @rq: the requested feature to change</div><div class='add'>+ * @on: whether to enable or disable the feature</div><div class='add'>+ */</div><div class='add'>+static int aq_ptp_gpio_feature_enable(struct ptp_clock_info *ptp,</div><div class='add'>+				      struct ptp_clock_request *rq, int on)</div><div class='add'>+{</div><div class='add'>+	switch (rq-&gt;type) {</div><div class='add'>+	case PTP_CLK_REQ_EXTTS:</div><div class='add'>+		return aq_ptp_extts_pin_configure(ptp, rq, on);</div><div class='add'>+	case PTP_CLK_REQ_PEROUT:</div><div class='add'>+		return aq_ptp_perout_pin_configure(ptp, rq, on);</div><div class='add'>+	case PTP_CLK_REQ_PPS:</div><div class='add'>+		return aq_ptp_pps_pin_configure(ptp, rq, on);</div><div class='add'>+	default:</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* aq_ptp_verify</div><div class='add'>+ * @ptp: the ptp clock structure</div><div class='add'>+ * @pin: index of the pin in question</div><div class='add'>+ * @func: the desired function to use</div><div class='add'>+ * @chan: the function channel index to use</div><div class='add'>+ */</div><div class='add'>+static int aq_ptp_verify(struct ptp_clock_info *ptp, unsigned int pin,</div><div class='add'>+			 enum ptp_pin_function func, unsigned int chan)</div><div class='add'>+{</div><div class='add'>+	/* verify the requested pin is there */</div><div class='add'>+	if (!ptp-&gt;pin_config || pin &gt;= ptp-&gt;n_pins)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* enforce locked channels, no changing them */</div><div class='add'>+	if (chan != ptp-&gt;pin_config[pin].chan)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	/* we want to keep the functions locked as well */</div><div class='add'>+	if (func != ptp-&gt;pin_config[pin].func)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* aq_ptp_tx_hwtstamp - utility function which checks for TX time stamp</div><div class='add'>+ * @adapter: the private adapter struct</div><div class='add'>+ *</div><div class='add'>+ * if the timestamp is valid, we convert it into the timecounter ns</div><div class='add'>+ * value, then store that result into the hwtstamps structure which</div><div class='add'>+ * is passed up the network stack</div><div class='add'>+ */</div><div class='add'>+void aq_ptp_tx_hwtstamp(struct aq_nic_s *aq_nic, u64 timestamp)</div><div class='add'>+{</div><div class='add'>+	struct aq_ptp_s *aq_ptp = aq_nic-&gt;aq_ptp;</div><div class='add'>+	struct sk_buff *skb = aq_ptp_skb_get(&amp;aq_ptp-&gt;skb_ring);</div><div class='add'>+	struct skb_shared_hwtstamps hwtstamp;</div><div class='add'>+</div><div class='add'>+	if (!skb) {</div><div class='add'>+		netdev_err(aq_nic-&gt;ndev, "have timestamp but tx_queues empty\n");</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	timestamp += atomic_read(&amp;aq_ptp-&gt;offset_egress);</div><div class='add'>+	aq_ptp_convert_to_hwtstamp(aq_ptp, &amp;hwtstamp, timestamp);</div><div class='add'>+	skb_tstamp_tx(skb, &amp;hwtstamp);</div><div class='add'>+	dev_kfree_skb_any(skb);</div><div class='add'>+</div><div class='add'>+	aq_ptp_tx_timeout_update(aq_ptp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* aq_ptp_rx_hwtstamp - utility function which checks for RX time stamp</div><div class='add'>+ * @adapter: pointer to adapter struct</div><div class='add'>+ * @shhwtstamps: particular skb_shared_hwtstamps to save timestamp</div><div class='add'>+ *</div><div class='add'>+ * if the timestamp is valid, we convert it into the timecounter ns</div><div class='add'>+ * value, then store that result into the hwtstamps structure which</div><div class='add'>+ * is passed up the network stack</div><div class='add'>+ */</div><div class='add'>+static void aq_ptp_rx_hwtstamp(struct aq_ptp_s *aq_ptp, struct skb_shared_hwtstamps *shhwtstamps,</div><div class='add'>+			       u64 timestamp)</div><div class='add'>+{</div><div class='add'>+	timestamp -= atomic_read(&amp;aq_ptp-&gt;offset_ingress);</div><div class='add'>+	aq_ptp_convert_to_hwtstamp(aq_ptp, shhwtstamps, timestamp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void aq_ptp_hwtstamp_config_get(struct aq_ptp_s *aq_ptp,</div><div class='add'>+				struct kernel_hwtstamp_config *config)</div><div class='add'>+{</div><div class='add'>+	*config = aq_ptp-&gt;hwtstamp_config;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aq_ptp_prepare_filters(struct aq_ptp_s *aq_ptp)</div><div class='add'>+{</div><div class='add'>+	aq_ptp-&gt;udp_filter.cmd = HW_ATL_RX_ENABLE_FLTR_L3L4 |</div><div class='add'>+			       HW_ATL_RX_ENABLE_CMP_PROT_L4 |</div><div class='add'>+			       HW_ATL_RX_UDP |</div><div class='add'>+			       HW_ATL_RX_ENABLE_CMP_DEST_PORT_L4 |</div><div class='add'>+			       HW_ATL_RX_HOST &lt;&lt; HW_ATL_RX_ACTION_FL3F4_SHIFT |</div><div class='add'>+			       HW_ATL_RX_ENABLE_QUEUE_L3L4 |</div><div class='add'>+			       aq_ptp-&gt;ptp_rx.idx &lt;&lt; HW_ATL_RX_QUEUE_FL3L4_SHIFT;</div><div class='add'>+	aq_ptp-&gt;udp_filter.p_dst = PTP_EV_PORT;</div><div class='add'>+</div><div class='add'>+	aq_ptp-&gt;eth_type_filter.ethertype = ETH_P_1588;</div><div class='add'>+	aq_ptp-&gt;eth_type_filter.queue = aq_ptp-&gt;ptp_rx.idx;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_ptp_hwtstamp_config_set(struct aq_ptp_s *aq_ptp,</div><div class='add'>+			       struct kernel_hwtstamp_config *config)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = aq_ptp-&gt;aq_nic;</div><div class='add'>+	const struct aq_hw_ops *hw_ops;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	hw_ops = aq_nic-&gt;aq_hw_ops;</div><div class='add'>+	if (config-&gt;tx_type == HWTSTAMP_TX_ON ||</div><div class='add'>+	    config-&gt;rx_filter == HWTSTAMP_FILTER_PTP_V2_EVENT) {</div><div class='add'>+		aq_ptp_prepare_filters(aq_ptp);</div><div class='add'>+		if (hw_ops-&gt;hw_filter_l3l4_set) {</div><div class='add'>+			err = hw_ops-&gt;hw_filter_l3l4_set(aq_nic-&gt;aq_hw,</div><div class='add'>+							 &amp;aq_ptp-&gt;udp_filter);</div><div class='add'>+		}</div><div class='add'>+		if (!err &amp;&amp; hw_ops-&gt;hw_filter_l2_set) {</div><div class='add'>+			err = hw_ops-&gt;hw_filter_l2_set(aq_nic-&gt;aq_hw,</div><div class='add'>+						       &amp;aq_ptp-&gt;eth_type_filter);</div><div class='add'>+		}</div><div class='add'>+		aq_utils_obj_set(&amp;aq_nic-&gt;flags, AQ_NIC_PTP_DPATH_UP);</div><div class='add'>+	} else {</div><div class='add'>+		aq_ptp-&gt;udp_filter.cmd &amp;= ~HW_ATL_RX_ENABLE_FLTR_L3L4;</div><div class='add'>+		if (hw_ops-&gt;hw_filter_l3l4_set) {</div><div class='add'>+			err = hw_ops-&gt;hw_filter_l3l4_set(aq_nic-&gt;aq_hw,</div><div class='add'>+							 &amp;aq_ptp-&gt;udp_filter);</div><div class='add'>+		}</div><div class='add'>+		if (!err &amp;&amp; hw_ops-&gt;hw_filter_l2_clear) {</div><div class='add'>+			err = hw_ops-&gt;hw_filter_l2_clear(aq_nic-&gt;aq_hw,</div><div class='add'>+							&amp;aq_ptp-&gt;eth_type_filter);</div><div class='add'>+		}</div><div class='add'>+		aq_utils_obj_clear(&amp;aq_nic-&gt;flags, AQ_NIC_PTP_DPATH_UP);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		return -EREMOTEIO;</div><div class='add'>+</div><div class='add'>+	aq_ptp-&gt;hwtstamp_config = *config;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool aq_ptp_ring(struct aq_nic_s *aq_nic, struct aq_ring_s *ring)</div><div class='add'>+{</div><div class='add'>+	struct aq_ptp_s *aq_ptp = aq_nic-&gt;aq_ptp;</div><div class='add'>+</div><div class='add'>+	if (!aq_ptp)</div><div class='add'>+		return false;</div><div class='add'>+</div><div class='add'>+	return &amp;aq_ptp-&gt;ptp_tx == ring ||</div><div class='add'>+	       &amp;aq_ptp-&gt;ptp_rx == ring || &amp;aq_ptp-&gt;hwts_rx == ring;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u16 aq_ptp_extract_ts(struct aq_nic_s *aq_nic, struct skb_shared_hwtstamps *shhwtstamps, u8 *p,</div><div class='add'>+		      unsigned int len)</div><div class='add'>+{</div><div class='add'>+	struct aq_ptp_s *aq_ptp = aq_nic-&gt;aq_ptp;</div><div class='add'>+	u64 timestamp = 0;</div><div class='add'>+	u16 ret = aq_nic-&gt;aq_hw_ops-&gt;rx_extract_ts(aq_nic-&gt;aq_hw,</div><div class='add'>+						   p, len, &amp;timestamp);</div><div class='add'>+</div><div class='add'>+	if (ret &gt; 0)</div><div class='add'>+		aq_ptp_rx_hwtstamp(aq_ptp, shhwtstamps, timestamp);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_ptp_poll(struct napi_struct *napi, int budget)</div><div class='add'>+{</div><div class='add'>+	struct aq_ptp_s *aq_ptp = container_of(napi, struct aq_ptp_s, napi);</div><div class='add'>+	struct aq_nic_s *aq_nic = aq_ptp-&gt;aq_nic;</div><div class='add'>+	bool was_cleaned = false;</div><div class='add'>+	int work_done = 0;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	/* Processing PTP TX traffic */</div><div class='add'>+	err = aq_nic-&gt;aq_hw_ops-&gt;hw_ring_tx_head_update(aq_nic-&gt;aq_hw,</div><div class='add'>+							&amp;aq_ptp-&gt;ptp_tx);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	if (aq_ptp-&gt;ptp_tx.sw_head != aq_ptp-&gt;ptp_tx.hw_head) {</div><div class='add'>+		aq_ring_tx_clean(&amp;aq_ptp-&gt;ptp_tx);</div><div class='add'>+</div><div class='add'>+		was_cleaned = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Processing HW_TIMESTAMP RX traffic */</div><div class='add'>+	err = aq_nic-&gt;aq_hw_ops-&gt;hw_ring_hwts_rx_receive(aq_nic-&gt;aq_hw,</div><div class='add'>+							 &amp;aq_ptp-&gt;hwts_rx);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	if (aq_ptp-&gt;hwts_rx.sw_head != aq_ptp-&gt;hwts_rx.hw_head) {</div><div class='add'>+		aq_ring_hwts_rx_clean(&amp;aq_ptp-&gt;hwts_rx, aq_nic);</div><div class='add'>+</div><div class='add'>+		err = aq_nic-&gt;aq_hw_ops-&gt;hw_ring_hwts_rx_fill(aq_nic-&gt;aq_hw,</div><div class='add'>+							      &amp;aq_ptp-&gt;hwts_rx);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			goto err_exit;</div><div class='add'>+</div><div class='add'>+		was_cleaned = true;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Processing PTP RX traffic */</div><div class='add'>+	err = aq_nic-&gt;aq_hw_ops-&gt;hw_ring_rx_receive(aq_nic-&gt;aq_hw,</div><div class='add'>+						    &amp;aq_ptp-&gt;ptp_rx);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	if (aq_ptp-&gt;ptp_rx.sw_head != aq_ptp-&gt;ptp_rx.hw_head) {</div><div class='add'>+		unsigned int sw_tail_old;</div><div class='add'>+</div><div class='add'>+		err = aq_ring_rx_clean(&amp;aq_ptp-&gt;ptp_rx, napi, &amp;work_done, budget);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			goto err_exit;</div><div class='add'>+</div><div class='add'>+		sw_tail_old = aq_ptp-&gt;ptp_rx.sw_tail;</div><div class='add'>+		err = aq_ring_rx_fill(&amp;aq_ptp-&gt;ptp_rx);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			goto err_exit;</div><div class='add'>+</div><div class='add'>+		err = aq_nic-&gt;aq_hw_ops-&gt;hw_ring_rx_fill(aq_nic-&gt;aq_hw,</div><div class='add'>+							 &amp;aq_ptp-&gt;ptp_rx,</div><div class='add'>+							 sw_tail_old);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (was_cleaned)</div><div class='add'>+		work_done = budget;</div><div class='add'>+</div><div class='add'>+	if (work_done &lt; budget) {</div><div class='add'>+		napi_complete_done(napi, work_done);</div><div class='add'>+		aq_nic-&gt;aq_hw_ops-&gt;hw_irq_enable(aq_nic-&gt;aq_hw,</div><div class='add'>+					BIT_ULL(aq_ptp-&gt;ptp_ring_param.vec_idx));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return work_done;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static irqreturn_t aq_ptp_isr(int irq, void *private)</div><div class='add'>+{</div><div class='add'>+	struct aq_ptp_s *aq_ptp = private;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (!aq_ptp) {</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto err_exit;</div><div class='add'>+	}</div><div class='add'>+	napi_schedule(&amp;aq_ptp-&gt;napi);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err &gt;= 0 ? IRQ_HANDLED : IRQ_NONE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_ptp_xmit(struct aq_nic_s *aq_nic, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	struct aq_ptp_s *aq_ptp = aq_nic-&gt;aq_ptp;</div><div class='add'>+	struct aq_ring_s *ring = &amp;aq_ptp-&gt;ptp_tx;</div><div class='add'>+	unsigned long irq_flags;</div><div class='add'>+	int err = NETDEV_TX_OK;</div><div class='add'>+	unsigned int frags;</div><div class='add'>+</div><div class='add'>+	if (skb-&gt;len &lt;= 0) {</div><div class='add'>+		dev_kfree_skb_any(skb);</div><div class='add'>+		goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	frags = skb_shinfo(skb)-&gt;nr_frags + 1;</div><div class='add'>+	/* Frags cannot be bigger 16KB</div><div class='add'>+	 * because PTP usually works</div><div class='add'>+	 * without Jumbo even in a background</div><div class='add'>+	 */</div><div class='add'>+	if (frags &gt; AQ_CFG_SKB_FRAGS_MAX || frags &gt; aq_ring_avail_dx(ring)) {</div><div class='add'>+		/* Drop packet because it doesn't make sence to delay it */</div><div class='add'>+		dev_kfree_skb_any(skb);</div><div class='add'>+		goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = aq_ptp_skb_put(&amp;aq_ptp-&gt;skb_ring, skb);</div><div class='add'>+	if (err) {</div><div class='add'>+		netdev_err(aq_nic-&gt;ndev, "SKB Ring is overflow (%u)!\n",</div><div class='add'>+			   ring-&gt;size);</div><div class='add'>+		return NETDEV_TX_BUSY;</div><div class='add'>+	}</div><div class='add'>+	skb_shinfo(skb)-&gt;tx_flags |= SKBTX_IN_PROGRESS;</div><div class='add'>+	aq_ptp_tx_timeout_start(aq_ptp);</div><div class='add'>+	skb_tx_timestamp(skb);</div><div class='add'>+</div><div class='add'>+	spin_lock_irqsave(&amp;aq_nic-&gt;aq_ptp-&gt;ptp_ring_lock, irq_flags);</div><div class='add'>+	frags = aq_nic_map_skb(aq_nic, skb, ring);</div><div class='add'>+</div><div class='add'>+	if (likely(frags)) {</div><div class='add'>+		err = aq_nic-&gt;aq_hw_ops-&gt;hw_ring_tx_xmit(aq_nic-&gt;aq_hw,</div><div class='add'>+						       ring, frags);</div><div class='add'>+		if (err &gt;= 0) {</div><div class='add'>+			u64_stats_update_begin(&amp;ring-&gt;stats.tx.syncp);</div><div class='add'>+			++ring-&gt;stats.tx.packets;</div><div class='add'>+			ring-&gt;stats.tx.bytes += skb-&gt;len;</div><div class='add'>+			u64_stats_update_end(&amp;ring-&gt;stats.tx.syncp);</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		err = NETDEV_TX_BUSY;</div><div class='add'>+	}</div><div class='add'>+	spin_unlock_irqrestore(&amp;aq_nic-&gt;aq_ptp-&gt;ptp_ring_lock, irq_flags);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void aq_ptp_service_task(struct aq_nic_s *aq_nic)</div><div class='add'>+{</div><div class='add'>+	struct aq_ptp_s *aq_ptp = aq_nic-&gt;aq_ptp;</div><div class='add'>+</div><div class='add'>+	if (!aq_ptp)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	aq_ptp_tx_timeout_check(aq_ptp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_ptp_irq_alloc(struct aq_nic_s *aq_nic)</div><div class='add'>+{</div><div class='add'>+	struct pci_dev *pdev = aq_nic-&gt;pdev;</div><div class='add'>+	struct aq_ptp_s *aq_ptp = aq_nic-&gt;aq_ptp;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (!aq_ptp)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (pdev-&gt;msix_enabled || pdev-&gt;msi_enabled) {</div><div class='add'>+		err = request_irq(pci_irq_vector(pdev, aq_ptp-&gt;idx_vector),</div><div class='add'>+				  aq_ptp_isr, 0, aq_nic-&gt;ndev-&gt;name, aq_ptp);</div><div class='add'>+	} else {</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void aq_ptp_irq_free(struct aq_nic_s *aq_nic)</div><div class='add'>+{</div><div class='add'>+	struct aq_ptp_s *aq_ptp = aq_nic-&gt;aq_ptp;</div><div class='add'>+	struct pci_dev *pdev = aq_nic-&gt;pdev;</div><div class='add'>+</div><div class='add'>+	if (!aq_ptp)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	free_irq(pci_irq_vector(pdev, aq_ptp-&gt;idx_vector), aq_ptp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_ptp_ring_init(struct aq_nic_s *aq_nic)</div><div class='add'>+{</div><div class='add'>+	struct aq_ptp_s *aq_ptp = aq_nic-&gt;aq_ptp;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (!aq_ptp)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	err = aq_ring_init(&amp;aq_ptp-&gt;ptp_tx, ATL_RING_TX);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+	err = aq_nic-&gt;aq_hw_ops-&gt;hw_ring_tx_init(aq_nic-&gt;aq_hw,</div><div class='add'>+						 &amp;aq_ptp-&gt;ptp_tx,</div><div class='add'>+						 &amp;aq_ptp-&gt;ptp_ring_param);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	err = aq_ring_init(&amp;aq_ptp-&gt;ptp_rx, ATL_RING_RX);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+	err = aq_nic-&gt;aq_hw_ops-&gt;hw_ring_rx_init(aq_nic-&gt;aq_hw,</div><div class='add'>+						 &amp;aq_ptp-&gt;ptp_rx,</div><div class='add'>+						 &amp;aq_ptp-&gt;ptp_ring_param);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	err = aq_ring_rx_fill(&amp;aq_ptp-&gt;ptp_rx);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_rx_free;</div><div class='add'>+	err = aq_nic-&gt;aq_hw_ops-&gt;hw_ring_rx_fill(aq_nic-&gt;aq_hw,</div><div class='add'>+						 &amp;aq_ptp-&gt;ptp_rx,</div><div class='add'>+						 0U);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_rx_free;</div><div class='add'>+</div><div class='add'>+	err = aq_ring_init(&amp;aq_ptp-&gt;hwts_rx, ATL_RING_RX);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_rx_free;</div><div class='add'>+	err = aq_nic-&gt;aq_hw_ops-&gt;hw_ring_rx_init(aq_nic-&gt;aq_hw,</div><div class='add'>+						 &amp;aq_ptp-&gt;hwts_rx,</div><div class='add'>+						 &amp;aq_ptp-&gt;ptp_ring_param);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+	err = aq_nic-&gt;aq_hw_ops-&gt;hw_ring_hwts_rx_fill(aq_nic-&gt;aq_hw,</div><div class='add'>+						      &amp;aq_ptp-&gt;hwts_rx);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+</div><div class='add'>+err_rx_free:</div><div class='add'>+	aq_ring_rx_deinit(&amp;aq_ptp-&gt;ptp_rx);</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_ptp_ring_start(struct aq_nic_s *aq_nic)</div><div class='add'>+{</div><div class='add'>+	struct aq_ptp_s *aq_ptp = aq_nic-&gt;aq_ptp;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (!aq_ptp)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	err = aq_nic-&gt;aq_hw_ops-&gt;hw_ring_tx_start(aq_nic-&gt;aq_hw, &amp;aq_ptp-&gt;ptp_tx);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	err = aq_nic-&gt;aq_hw_ops-&gt;hw_ring_rx_start(aq_nic-&gt;aq_hw, &amp;aq_ptp-&gt;ptp_rx);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	err = aq_nic-&gt;aq_hw_ops-&gt;hw_ring_rx_start(aq_nic-&gt;aq_hw,</div><div class='add'>+						  &amp;aq_ptp-&gt;hwts_rx);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	napi_enable(&amp;aq_ptp-&gt;napi);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void aq_ptp_ring_stop(struct aq_nic_s *aq_nic)</div><div class='add'>+{</div><div class='add'>+	struct aq_ptp_s *aq_ptp = aq_nic-&gt;aq_ptp;</div><div class='add'>+</div><div class='add'>+	if (!aq_ptp)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	aq_nic-&gt;aq_hw_ops-&gt;hw_ring_tx_stop(aq_nic-&gt;aq_hw, &amp;aq_ptp-&gt;ptp_tx);</div><div class='add'>+	aq_nic-&gt;aq_hw_ops-&gt;hw_ring_rx_stop(aq_nic-&gt;aq_hw, &amp;aq_ptp-&gt;ptp_rx);</div><div class='add'>+</div><div class='add'>+	aq_nic-&gt;aq_hw_ops-&gt;hw_ring_rx_stop(aq_nic-&gt;aq_hw, &amp;aq_ptp-&gt;hwts_rx);</div><div class='add'>+</div><div class='add'>+	napi_disable(&amp;aq_ptp-&gt;napi);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void aq_ptp_ring_deinit(struct aq_nic_s *aq_nic)</div><div class='add'>+{</div><div class='add'>+	struct aq_ptp_s *aq_ptp = aq_nic-&gt;aq_ptp;</div><div class='add'>+</div><div class='add'>+	if (!aq_ptp || !aq_ptp-&gt;ptp_tx.aq_nic || !aq_ptp-&gt;ptp_rx.aq_nic)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	aq_ring_tx_clean(&amp;aq_ptp-&gt;ptp_tx);</div><div class='add'>+	aq_ring_rx_deinit(&amp;aq_ptp-&gt;ptp_rx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_ptp_ring_alloc(struct aq_nic_s *aq_nic)</div><div class='add'>+{</div><div class='add'>+	struct aq_ptp_s *aq_ptp = aq_nic-&gt;aq_ptp;</div><div class='add'>+	unsigned int tx_ring_idx, rx_ring_idx;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!aq_ptp)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	tx_ring_idx = aq_ptp_ring_idx(aq_nic-&gt;aq_nic_cfg.tc_mode);</div><div class='add'>+</div><div class='add'>+	err = aq_ring_tx_alloc(&amp;aq_ptp-&gt;ptp_tx, aq_nic,</div><div class='add'>+			       tx_ring_idx, &amp;aq_nic-&gt;aq_nic_cfg);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	rx_ring_idx = aq_ptp_ring_idx(aq_nic-&gt;aq_nic_cfg.tc_mode);</div><div class='add'>+</div><div class='add'>+	err = aq_ring_rx_alloc(&amp;aq_ptp-&gt;ptp_rx, aq_nic,</div><div class='add'>+			       rx_ring_idx, &amp;aq_nic-&gt;aq_nic_cfg);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_exit_ptp_tx;</div><div class='add'>+</div><div class='add'>+	err = aq_ring_hwts_rx_alloc(&amp;aq_ptp-&gt;hwts_rx, aq_nic, PTP_HWST_RING_IDX,</div><div class='add'>+				    aq_nic-&gt;aq_nic_cfg.rxds,</div><div class='add'>+				    aq_nic-&gt;aq_nic_cfg.aq_hw_caps-&gt;rxd_size);</div><div class='add'>+	if (err)</div><div class='add'>+		goto err_exit_ptp_rx;</div><div class='add'>+</div><div class='add'>+	err = aq_ptp_skb_ring_init(&amp;aq_ptp-&gt;skb_ring, aq_nic-&gt;aq_nic_cfg.rxds);</div><div class='add'>+	if (err != 0) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto err_exit_hwts_rx;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	aq_ptp-&gt;ptp_ring_param.vec_idx = aq_ptp-&gt;idx_vector;</div><div class='add'>+	aq_ptp-&gt;ptp_ring_param.cpu = aq_ptp-&gt;ptp_ring_param.vec_idx +</div><div class='add'>+			aq_nic_get_cfg(aq_nic)-&gt;aq_rss.base_cpu_number;</div><div class='add'>+	cpumask_set_cpu(aq_ptp-&gt;ptp_ring_param.cpu,</div><div class='add'>+			&amp;aq_ptp-&gt;ptp_ring_param.affinity_mask);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_exit_hwts_rx:</div><div class='add'>+	aq_ring_hwts_rx_free(&amp;aq_ptp-&gt;hwts_rx);</div><div class='add'>+err_exit_ptp_rx:</div><div class='add'>+	aq_ring_free(&amp;aq_ptp-&gt;ptp_rx);</div><div class='add'>+err_exit_ptp_tx:</div><div class='add'>+	aq_ring_free(&amp;aq_ptp-&gt;ptp_tx);</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void aq_ptp_ring_free(struct aq_nic_s *aq_nic)</div><div class='add'>+{</div><div class='add'>+	struct aq_ptp_s *aq_ptp = aq_nic-&gt;aq_ptp;</div><div class='add'>+</div><div class='add'>+	if (!aq_ptp)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	aq_ring_free(&amp;aq_ptp-&gt;ptp_tx);</div><div class='add'>+	aq_ring_free(&amp;aq_ptp-&gt;ptp_rx);</div><div class='add'>+	aq_ring_hwts_rx_free(&amp;aq_ptp-&gt;hwts_rx);</div><div class='add'>+</div><div class='add'>+	aq_ptp_skb_ring_release(&amp;aq_ptp-&gt;skb_ring);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define MAX_PTP_GPIO_COUNT 4</div><div class='add'>+</div><div class='add'>+static struct ptp_clock_info aq_ptp_clock = {</div><div class='add'>+	.owner		= THIS_MODULE,</div><div class='add'>+	.name		= "atlantic ptp",</div><div class='add'>+	.max_adj	= 999999999,</div><div class='add'>+	.n_ext_ts	= 0,</div><div class='add'>+	.pps		= 0,</div><div class='add'>+	.adjfine	= aq_ptp_adjfine,</div><div class='add'>+	.adjtime	= aq_ptp_adjtime,</div><div class='add'>+	.gettime64	= aq_ptp_gettime,</div><div class='add'>+	.settime64	= aq_ptp_settime,</div><div class='add'>+	.n_per_out	= 0,</div><div class='add'>+	.enable		= aq_ptp_gpio_feature_enable,</div><div class='add'>+	.n_pins		= 0,</div><div class='add'>+	.verify		= aq_ptp_verify,</div><div class='add'>+	.pin_config	= NULL,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define ptp_offset_init(__idx, __mbps, __egress, __ingress)   do { \</div><div class='add'>+		ptp_offset[__idx].mbps = (__mbps); \</div><div class='add'>+		ptp_offset[__idx].egress = (__egress); \</div><div class='add'>+		ptp_offset[__idx].ingress = (__ingress); } \</div><div class='add'>+		while (0)</div><div class='add'>+</div><div class='add'>+static void aq_ptp_offset_init_from_fw(const struct hw_atl_ptp_offset *offsets)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Load offsets for PTP */</div><div class='add'>+	for (i = 0; i &lt; ARRAY_SIZE(ptp_offset); i++) {</div><div class='add'>+		switch (i) {</div><div class='add'>+		/* 100M */</div><div class='add'>+		case ptp_offset_idx_100:</div><div class='add'>+			ptp_offset_init(i, 100,</div><div class='add'>+					offsets-&gt;egress_100,</div><div class='add'>+					offsets-&gt;ingress_100);</div><div class='add'>+			break;</div><div class='add'>+		/* 1G */</div><div class='add'>+		case ptp_offset_idx_1000:</div><div class='add'>+			ptp_offset_init(i, 1000,</div><div class='add'>+					offsets-&gt;egress_1000,</div><div class='add'>+					offsets-&gt;ingress_1000);</div><div class='add'>+			break;</div><div class='add'>+		/* 2.5G */</div><div class='add'>+		case ptp_offset_idx_2500:</div><div class='add'>+			ptp_offset_init(i, 2500,</div><div class='add'>+					offsets-&gt;egress_2500,</div><div class='add'>+					offsets-&gt;ingress_2500);</div><div class='add'>+			break;</div><div class='add'>+		/* 5G */</div><div class='add'>+		case ptp_offset_idx_5000:</div><div class='add'>+			ptp_offset_init(i, 5000,</div><div class='add'>+					offsets-&gt;egress_5000,</div><div class='add'>+					offsets-&gt;ingress_5000);</div><div class='add'>+			break;</div><div class='add'>+		/* 10G */</div><div class='add'>+		case ptp_offset_idx_10000:</div><div class='add'>+			ptp_offset_init(i, 10000,</div><div class='add'>+					offsets-&gt;egress_10000,</div><div class='add'>+					offsets-&gt;ingress_10000);</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aq_ptp_offset_init(const struct hw_atl_ptp_offset *offsets)</div><div class='add'>+{</div><div class='add'>+	memset(ptp_offset, 0, sizeof(ptp_offset));</div><div class='add'>+</div><div class='add'>+	aq_ptp_offset_init_from_fw(offsets);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aq_ptp_gpio_init(struct ptp_clock_info *info,</div><div class='add'>+			     struct hw_atl_info *hw_info)</div><div class='add'>+{</div><div class='add'>+	struct ptp_pin_desc pin_desc[MAX_PTP_GPIO_COUNT];</div><div class='add'>+	u32 extts_pin_cnt = 0;</div><div class='add'>+	u32 out_pin_cnt = 0;</div><div class='add'>+	u32 i;</div><div class='add'>+</div><div class='add'>+	memset(pin_desc, 0, sizeof(pin_desc));</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; MAX_PTP_GPIO_COUNT - 1; i++) {</div><div class='add'>+		if (hw_info-&gt;gpio_pin[i] ==</div><div class='add'>+		    (GPIO_PIN_FUNCTION_PTP0 + out_pin_cnt)) {</div><div class='add'>+			snprintf(pin_desc[out_pin_cnt].name,</div><div class='add'>+				 sizeof(pin_desc[out_pin_cnt].name),</div><div class='add'>+				 "AQ_GPIO%d", i);</div><div class='add'>+			pin_desc[out_pin_cnt].index = out_pin_cnt;</div><div class='add'>+			pin_desc[out_pin_cnt].chan = out_pin_cnt;</div><div class='add'>+			pin_desc[out_pin_cnt++].func = PTP_PF_PEROUT;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	info-&gt;n_per_out = out_pin_cnt;</div><div class='add'>+</div><div class='add'>+	if (hw_info-&gt;caps_ex &amp; BIT(CAPS_EX_PHY_CTRL_TS_PIN)) {</div><div class='add'>+		extts_pin_cnt += 1;</div><div class='add'>+</div><div class='add'>+		snprintf(pin_desc[out_pin_cnt].name,</div><div class='add'>+			 sizeof(pin_desc[out_pin_cnt].name),</div><div class='add'>+			  "AQ_GPIO%d", out_pin_cnt);</div><div class='add'>+		pin_desc[out_pin_cnt].index = out_pin_cnt;</div><div class='add'>+		pin_desc[out_pin_cnt].chan = 0;</div><div class='add'>+		pin_desc[out_pin_cnt].func = PTP_PF_EXTTS;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	info-&gt;n_pins = out_pin_cnt + extts_pin_cnt;</div><div class='add'>+	info-&gt;n_ext_ts = extts_pin_cnt;</div><div class='add'>+</div><div class='add'>+	if (!info-&gt;n_pins)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	info-&gt;pin_config = kcalloc(info-&gt;n_pins, sizeof(struct ptp_pin_desc),</div><div class='add'>+				   GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	if (!info-&gt;pin_config)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	memcpy(info-&gt;pin_config, &amp;pin_desc,</div><div class='add'>+	       sizeof(struct ptp_pin_desc) * info-&gt;n_pins);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void aq_ptp_clock_init(struct aq_nic_s *aq_nic)</div><div class='add'>+{</div><div class='add'>+	struct aq_ptp_s *aq_ptp = aq_nic-&gt;aq_ptp;</div><div class='add'>+	struct timespec64 ts;</div><div class='add'>+</div><div class='add'>+	ktime_get_real_ts64(&amp;ts);</div><div class='add'>+	aq_ptp_settime(&amp;aq_ptp-&gt;ptp_info, &amp;ts);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aq_ptp_poll_sync_work_cb(struct work_struct *w);</div><div class='add'>+</div><div class='add'>+int aq_ptp_init(struct aq_nic_s *aq_nic, unsigned int idx_vec)</div><div class='add'>+{</div><div class='add'>+	bool a1_ptp = ATL_HW_IS_CHIP_FEATURE(aq_nic-&gt;aq_hw, ATLANTIC);</div><div class='add'>+	struct hw_atl_utils_mbox mbox;</div><div class='add'>+	struct ptp_clock *clock;</div><div class='add'>+	struct aq_ptp_s *aq_ptp;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (!a1_ptp) {</div><div class='add'>+		aq_nic-&gt;aq_ptp = NULL;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!aq_nic-&gt;aq_hw_ops-&gt;hw_get_ptp_ts) {</div><div class='add'>+		aq_nic-&gt;aq_ptp = NULL;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!aq_nic-&gt;aq_fw_ops-&gt;enable_ptp) {</div><div class='add'>+		aq_nic-&gt;aq_ptp = NULL;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hw_atl_utils_mpi_read_stats(aq_nic-&gt;aq_hw, &amp;mbox);</div><div class='add'>+</div><div class='add'>+	if (!(mbox.info.caps_ex &amp; BIT(CAPS_EX_PHY_PTP_EN))) {</div><div class='add'>+		aq_nic-&gt;aq_ptp = NULL;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	aq_ptp_offset_init(&amp;mbox.info.ptp_offset);</div><div class='add'>+</div><div class='add'>+	aq_ptp = kzalloc(sizeof(*aq_ptp), GFP_KERNEL);</div><div class='add'>+	if (!aq_ptp) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	aq_ptp-&gt;aq_nic = aq_nic;</div><div class='add'>+	aq_ptp-&gt;a1_ptp = a1_ptp;</div><div class='add'>+</div><div class='add'>+	spin_lock_init(&amp;aq_ptp-&gt;ptp_lock);</div><div class='add'>+	spin_lock_init(&amp;aq_ptp-&gt;ptp_ring_lock);</div><div class='add'>+</div><div class='add'>+	aq_ptp-&gt;ptp_info = aq_ptp_clock;</div><div class='add'>+	aq_ptp_gpio_init(&amp;aq_ptp-&gt;ptp_info, &amp;mbox.info);</div><div class='add'>+	clock = ptp_clock_register(&amp;aq_ptp-&gt;ptp_info, &amp;aq_nic-&gt;ndev-&gt;dev);</div><div class='add'>+	if (IS_ERR(clock)) {</div><div class='add'>+		netdev_err(aq_nic-&gt;ndev, "ptp_clock_register failed\n");</div><div class='add'>+		err = PTR_ERR(clock);</div><div class='add'>+		goto err_exit;</div><div class='add'>+	}</div><div class='add'>+	aq_ptp-&gt;ptp_clock = clock;</div><div class='add'>+	aq_ptp_tx_timeout_init(&amp;aq_ptp-&gt;ptp_tx_timeout);</div><div class='add'>+</div><div class='add'>+	atomic_set(&amp;aq_ptp-&gt;offset_egress, 0);</div><div class='add'>+	atomic_set(&amp;aq_ptp-&gt;offset_ingress, 0);</div><div class='add'>+</div><div class='add'>+	netif_napi_add(aq_nic_get_ndev(aq_nic), &amp;aq_ptp-&gt;napi, aq_ptp_poll);</div><div class='add'>+</div><div class='add'>+	aq_ptp-&gt;idx_vector = idx_vec;</div><div class='add'>+</div><div class='add'>+	aq_nic-&gt;aq_ptp = aq_ptp;</div><div class='add'>+</div><div class='add'>+	/* enable ptp counter */</div><div class='add'>+	aq_utils_obj_set(&amp;aq_nic-&gt;aq_hw-&gt;flags, AQ_HW_PTP_AVAILABLE);</div><div class='add'>+	mutex_lock(&amp;aq_nic-&gt;fwreq_mutex);</div><div class='add'>+	aq_nic-&gt;aq_fw_ops-&gt;enable_ptp(aq_nic-&gt;aq_hw, 1);</div><div class='add'>+	aq_ptp_clock_init(aq_nic);</div><div class='add'>+	mutex_unlock(&amp;aq_nic-&gt;fwreq_mutex);</div><div class='add'>+</div><div class='add'>+	INIT_DELAYED_WORK(&amp;aq_ptp-&gt;poll_sync, &amp;aq_ptp_poll_sync_work_cb);</div><div class='add'>+	aq_ptp-&gt;eth_type_filter.location =</div><div class='add'>+			aq_nic_reserve_filter(aq_nic, aq_rx_filter_ethertype);</div><div class='add'>+	aq_ptp-&gt;udp_filter.location =</div><div class='add'>+			aq_nic_reserve_filter(aq_nic, aq_rx_filter_l3l4);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	if (aq_ptp)</div><div class='add'>+		kfree(aq_ptp-&gt;ptp_info.pin_config);</div><div class='add'>+	kfree(aq_ptp);</div><div class='add'>+	aq_nic-&gt;aq_ptp = NULL;</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void aq_ptp_unregister(struct aq_nic_s *aq_nic)</div><div class='add'>+{</div><div class='add'>+	struct aq_ptp_s *aq_ptp = aq_nic-&gt;aq_ptp;</div><div class='add'>+</div><div class='add'>+	if (!aq_ptp)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	ptp_clock_unregister(aq_ptp-&gt;ptp_clock);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void aq_ptp_free(struct aq_nic_s *aq_nic)</div><div class='add'>+{</div><div class='add'>+	struct aq_ptp_s *aq_ptp = aq_nic-&gt;aq_ptp;</div><div class='add'>+</div><div class='add'>+	if (!aq_ptp)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	aq_nic_release_filter(aq_nic, aq_rx_filter_ethertype,</div><div class='add'>+			      aq_ptp-&gt;eth_type_filter.location);</div><div class='add'>+	aq_nic_release_filter(aq_nic, aq_rx_filter_l3l4,</div><div class='add'>+			      aq_ptp-&gt;udp_filter.location);</div><div class='add'>+	cancel_delayed_work_sync(&amp;aq_ptp-&gt;poll_sync);</div><div class='add'>+	/* disable ptp */</div><div class='add'>+	mutex_lock(&amp;aq_nic-&gt;fwreq_mutex);</div><div class='add'>+	aq_nic-&gt;aq_fw_ops-&gt;enable_ptp(aq_nic-&gt;aq_hw, 0);</div><div class='add'>+	mutex_unlock(&amp;aq_nic-&gt;fwreq_mutex);</div><div class='add'>+</div><div class='add'>+	kfree(aq_ptp-&gt;ptp_info.pin_config);</div><div class='add'>+</div><div class='add'>+	netif_napi_del(&amp;aq_ptp-&gt;napi);</div><div class='add'>+	kfree(aq_ptp);</div><div class='add'>+	aq_nic-&gt;aq_ptp = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct ptp_clock *aq_ptp_get_ptp_clock(struct aq_ptp_s *aq_ptp)</div><div class='add'>+{</div><div class='add'>+	return aq_ptp-&gt;ptp_clock;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* PTP external GPIO nanoseconds count */</div><div class='add'>+static uint64_t aq_ptp_get_sync1588_ts(struct aq_nic_s *aq_nic)</div><div class='add'>+{</div><div class='add'>+	u64 ts = 0;</div><div class='add'>+</div><div class='add'>+	if (aq_nic-&gt;aq_hw_ops-&gt;hw_get_sync_ts)</div><div class='add'>+		aq_nic-&gt;aq_hw_ops-&gt;hw_get_sync_ts(aq_nic-&gt;aq_hw, &amp;ts);</div><div class='add'>+</div><div class='add'>+	return ts;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aq_ptp_start_work(struct aq_ptp_s *aq_ptp)</div><div class='add'>+{</div><div class='add'>+	if (aq_ptp-&gt;extts_pin_enabled) {</div><div class='add'>+		aq_ptp-&gt;poll_timeout_ms = POLL_SYNC_TIMER_MS;</div><div class='add'>+		aq_ptp-&gt;last_sync1588_ts =</div><div class='add'>+				aq_ptp_get_sync1588_ts(aq_ptp-&gt;aq_nic);</div><div class='add'>+		schedule_delayed_work(&amp;aq_ptp-&gt;poll_sync,</div><div class='add'>+				      msecs_to_jiffies(aq_ptp-&gt;poll_timeout_ms));</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_ptp_link_change(struct aq_nic_s *aq_nic)</div><div class='add'>+{</div><div class='add'>+	struct aq_ptp_s *aq_ptp = aq_nic-&gt;aq_ptp;</div><div class='add'>+</div><div class='add'>+	if (!aq_ptp)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	if (aq_nic-&gt;aq_hw-&gt;aq_link_status.mbps)</div><div class='add'>+		aq_ptp_start_work(aq_ptp);</div><div class='add'>+	else</div><div class='add'>+		cancel_delayed_work_sync(&amp;aq_ptp-&gt;poll_sync);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool aq_ptp_sync_ts_updated(struct aq_ptp_s *aq_ptp, u64 *new_ts)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = aq_ptp-&gt;aq_nic;</div><div class='add'>+	u64 sync_ts2;</div><div class='add'>+	u64 sync_ts;</div><div class='add'>+</div><div class='add'>+	sync_ts = aq_ptp_get_sync1588_ts(aq_nic);</div><div class='add'>+</div><div class='add'>+	if (sync_ts != aq_ptp-&gt;last_sync1588_ts) {</div><div class='add'>+		sync_ts2 = aq_ptp_get_sync1588_ts(aq_nic);</div><div class='add'>+		if (sync_ts != sync_ts2) {</div><div class='add'>+			sync_ts = sync_ts2;</div><div class='add'>+			sync_ts2 = aq_ptp_get_sync1588_ts(aq_nic);</div><div class='add'>+			if (sync_ts != sync_ts2) {</div><div class='add'>+				netdev_err(aq_nic-&gt;ndev,</div><div class='add'>+					   "%s: Unable to get correct GPIO TS",</div><div class='add'>+					   __func__);</div><div class='add'>+				sync_ts = 0;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		*new_ts = sync_ts;</div><div class='add'>+		return true;</div><div class='add'>+	}</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_ptp_check_sync1588(struct aq_ptp_s *aq_ptp)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = aq_ptp-&gt;aq_nic;</div><div class='add'>+	u64 sync_ts;</div><div class='add'>+</div><div class='add'>+	 /* Sync1588 pin was triggered */</div><div class='add'>+	if (aq_ptp_sync_ts_updated(aq_ptp, &amp;sync_ts)) {</div><div class='add'>+		if (aq_ptp-&gt;extts_pin_enabled) {</div><div class='add'>+			struct ptp_clock_event ptp_event;</div><div class='add'>+			u64 time = 0;</div><div class='add'>+</div><div class='add'>+			aq_nic-&gt;aq_hw_ops-&gt;hw_ts_to_sys_clock(aq_nic-&gt;aq_hw,</div><div class='add'>+							      sync_ts, &amp;time);</div><div class='add'>+			ptp_event.index = aq_ptp-&gt;ptp_info.n_pins - 1;</div><div class='add'>+			ptp_event.timestamp = time;</div><div class='add'>+</div><div class='add'>+			ptp_event.type = PTP_CLOCK_EXTTS;</div><div class='add'>+			ptp_clock_event(aq_ptp-&gt;ptp_clock, &amp;ptp_event);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		aq_ptp-&gt;last_sync1588_ts = sync_ts;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aq_ptp_poll_sync_work_cb(struct work_struct *w)</div><div class='add'>+{</div><div class='add'>+	struct delayed_work *dw = to_delayed_work(w);</div><div class='add'>+	struct aq_ptp_s *aq_ptp = container_of(dw, struct aq_ptp_s, poll_sync);</div><div class='add'>+</div><div class='add'>+	aq_ptp_check_sync1588(aq_ptp);</div><div class='add'>+</div><div class='add'>+	if (aq_ptp-&gt;extts_pin_enabled) {</div><div class='add'>+		unsigned long timeout = msecs_to_jiffies(aq_ptp-&gt;poll_timeout_ms);</div><div class='add'>+</div><div class='add'>+		schedule_delayed_work(&amp;aq_ptp-&gt;poll_sync, timeout);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_ptp_get_ring_cnt(struct aq_nic_s *aq_nic, const enum atl_ring_type ring_type)</div><div class='add'>+{</div><div class='add'>+	if (!aq_nic-&gt;aq_ptp)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* Additional RX ring is allocated for PTP HWTS on A1 */</div><div class='add'>+	return (aq_nic-&gt;aq_ptp-&gt;a1_ptp &amp;&amp; ring_type == ATL_RING_RX) ? 2 : 1;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u64 *aq_ptp_get_stats(struct aq_nic_s *aq_nic, u64 *data)</div><div class='add'>+{</div><div class='add'>+	struct aq_ptp_s *aq_ptp = aq_nic-&gt;aq_ptp;</div><div class='add'>+	unsigned int count = 0U;</div><div class='add'>+</div><div class='add'>+	if (!aq_ptp)</div><div class='add'>+		return data;</div><div class='add'>+</div><div class='add'>+	count = aq_ring_fill_stats_data(&amp;aq_ptp-&gt;ptp_rx, data);</div><div class='add'>+	data += count;</div><div class='add'>+	count = aq_ring_fill_stats_data(&amp;aq_ptp-&gt;ptp_tx, data);</div><div class='add'>+	data += count;</div><div class='add'>+</div><div class='add'>+	if (aq_ptp-&gt;a1_ptp) {</div><div class='add'>+		/* Only Receive ring for HWTS */</div><div class='add'>+		count = aq_ring_fill_stats_data(&amp;aq_ptp-&gt;hwts_rx, data);</div><div class='add'>+		data += count;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return data;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_ptp.h b/drivers/net/ethernet/aquantia/atlantic/aq_ptp.h<br/>new file mode 100644<br/>index 000000000000..5e643ec7cc06<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_ptp.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_ptp.h</a></div><div class='hunk'>@@ -0,0 +1,163 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2014-2019 aQuantia Corporation</div><div class='add'>+ * Copyright (C) 2019-2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* File aq_ptp.h: Declaration of PTP functions.</div><div class='add'>+ */</div><div class='add'>+#ifndef AQ_PTP_H</div><div class='add'>+#define AQ_PTP_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/net_tstamp.h&gt;</div><div class='add'>+</div><div class='add'>+#include "aq_ring.h"</div><div class='add'>+</div><div class='add'>+#define PTP_8TC_RING_IDX             8</div><div class='add'>+#define PTP_4TC_RING_IDX            16</div><div class='add'>+#define PTP_HWST_RING_IDX           31</div><div class='add'>+</div><div class='add'>+/* Index must to be 8 (8 TCs) or 16 (4 TCs).</div><div class='add'>+ * It depends from Traffic Class mode.</div><div class='add'>+ */</div><div class='add'>+static inline unsigned int aq_ptp_ring_idx(const enum aq_tc_mode tc_mode)</div><div class='add'>+{</div><div class='add'>+	if (tc_mode == AQ_TC_MODE_8TCS)</div><div class='add'>+		return PTP_8TC_RING_IDX;</div><div class='add'>+</div><div class='add'>+	return PTP_4TC_RING_IDX;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#if IS_REACHABLE(CONFIG_PTP_1588_CLOCK)</div><div class='add'>+</div><div class='add'>+/* Common functions */</div><div class='add'>+int aq_ptp_init(struct aq_nic_s *aq_nic, unsigned int idx_vec);</div><div class='add'>+</div><div class='add'>+void aq_ptp_unregister(struct aq_nic_s *aq_nic);</div><div class='add'>+void aq_ptp_free(struct aq_nic_s *aq_nic);</div><div class='add'>+</div><div class='add'>+int aq_ptp_irq_alloc(struct aq_nic_s *aq_nic);</div><div class='add'>+void aq_ptp_irq_free(struct aq_nic_s *aq_nic);</div><div class='add'>+</div><div class='add'>+int aq_ptp_ring_alloc(struct aq_nic_s *aq_nic);</div><div class='add'>+void aq_ptp_ring_free(struct aq_nic_s *aq_nic);</div><div class='add'>+</div><div class='add'>+int aq_ptp_ring_init(struct aq_nic_s *aq_nic);</div><div class='add'>+int aq_ptp_ring_start(struct aq_nic_s *aq_nic);</div><div class='add'>+void aq_ptp_ring_stop(struct aq_nic_s *aq_nic);</div><div class='add'>+void aq_ptp_ring_deinit(struct aq_nic_s *aq_nic);</div><div class='add'>+</div><div class='add'>+void aq_ptp_service_task(struct aq_nic_s *aq_nic);</div><div class='add'>+</div><div class='add'>+void aq_ptp_tm_offset_set(struct aq_nic_s *aq_nic, unsigned int mbps);</div><div class='add'>+</div><div class='add'>+void aq_ptp_clock_init(struct aq_nic_s *aq_nic);</div><div class='add'>+</div><div class='add'>+/* Traffic processing functions */</div><div class='add'>+int aq_ptp_xmit(struct aq_nic_s *aq_nic, struct sk_buff *skb);</div><div class='add'>+void aq_ptp_tx_hwtstamp(struct aq_nic_s *aq_nic, u64 timestamp);</div><div class='add'>+</div><div class='add'>+/* Must be to check available of PTP before call */</div><div class='add'>+void aq_ptp_hwtstamp_config_get(struct aq_ptp_s *aq_ptp,</div><div class='add'>+				struct kernel_hwtstamp_config *config);</div><div class='add'>+int aq_ptp_hwtstamp_config_set(struct aq_ptp_s *aq_ptp,</div><div class='add'>+			       struct kernel_hwtstamp_config *config);</div><div class='add'>+</div><div class='add'>+/* Return either ring is belong to PTP or not*/</div><div class='add'>+bool aq_ptp_ring(struct aq_nic_s *aq_nic, struct aq_ring_s *ring);</div><div class='add'>+</div><div class='add'>+u16 aq_ptp_extract_ts(struct aq_nic_s *aq_nic, struct skb_shared_hwtstamps *shhwtstamps, u8 *p,</div><div class='add'>+		      unsigned int len);</div><div class='add'>+</div><div class='add'>+struct ptp_clock *aq_ptp_get_ptp_clock(struct aq_ptp_s *aq_ptp);</div><div class='add'>+</div><div class='add'>+int aq_ptp_link_change(struct aq_nic_s *aq_nic);</div><div class='add'>+</div><div class='add'>+/* PTP ring statistics */</div><div class='add'>+int aq_ptp_get_ring_cnt(struct aq_nic_s *aq_nic, const enum atl_ring_type ring_type);</div><div class='add'>+u64 *aq_ptp_get_stats(struct aq_nic_s *aq_nic, u64 *data);</div><div class='add'>+</div><div class='add'>+#else</div><div class='add'>+</div><div class='add'>+static inline int aq_ptp_init(struct aq_nic_s *aq_nic, unsigned int idx_vec)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void aq_ptp_unregister(struct aq_nic_s *aq_nic) {}</div><div class='add'>+</div><div class='add'>+static inline void aq_ptp_free(struct aq_nic_s *aq_nic)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int aq_ptp_irq_alloc(struct aq_nic_s *aq_nic)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void aq_ptp_irq_free(struct aq_nic_s *aq_nic)</div><div class='add'>+{</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int aq_ptp_ring_alloc(struct aq_nic_s *aq_nic)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void aq_ptp_ring_free(struct aq_nic_s *aq_nic) {}</div><div class='add'>+</div><div class='add'>+static inline int aq_ptp_ring_init(struct aq_nic_s *aq_nic)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int aq_ptp_ring_start(struct aq_nic_s *aq_nic)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void aq_ptp_ring_stop(struct aq_nic_s *aq_nic) {}</div><div class='add'>+static inline void aq_ptp_ring_deinit(struct aq_nic_s *aq_nic) {}</div><div class='add'>+static inline void aq_ptp_service_task(struct aq_nic_s *aq_nic) {}</div><div class='add'>+static inline void aq_ptp_tm_offset_set(struct aq_nic_s *aq_nic,</div><div class='add'>+					unsigned int mbps) {}</div><div class='add'>+static inline void aq_ptp_clock_init(struct aq_nic_s *aq_nic) {}</div><div class='add'>+static inline int aq_ptp_xmit(struct aq_nic_s *aq_nic, struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	return -EOPNOTSUPP;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void aq_ptp_tx_hwtstamp(struct aq_nic_s *aq_nic, u64 timestamp) {}</div><div class='add'>+static inline void aq_ptp_hwtstamp_config_get(struct aq_ptp_s *aq_ptp,</div><div class='add'>+					      struct kernel_hwtstamp_config *config) {}</div><div class='add'>+static inline int aq_ptp_hwtstamp_config_set(struct aq_ptp_s *aq_ptp,</div><div class='add'>+					     struct kernel_hwtstamp_config *config)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool aq_ptp_ring(struct aq_nic_s *aq_nic, struct aq_ring_s *ring)</div><div class='add'>+{</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline u16 aq_ptp_extract_ts(struct aq_nic_s *aq_nic,</div><div class='add'>+				    struct skb_shared_hwtstamps *shhwtstamps, u8 *p,</div><div class='add'>+				    unsigned int len)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline struct ptp_clock *aq_ptp_get_ptp_clock(struct aq_ptp_s *aq_ptp)</div><div class='add'>+{</div><div class='add'>+	return NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline int aq_ptp_link_change(struct aq_nic_s *aq_nic)</div><div class='add'>+{</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+#endif</div><div class='add'>+</div><div class='add'>+#endif /* AQ_PTP_H */</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_ring.c b/drivers/net/ethernet/aquantia/atlantic/aq_ring.c<br/>new file mode 100644<br/>index 000000000000..d23d23bed39f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_ring.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_ring.c</a></div><div class='hunk'>@@ -0,0 +1,978 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2014-2019 aQuantia Corporation</div><div class='add'>+ * Copyright (C) 2019-2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* File aq_ring.c: Definition of functions for Rx/Tx rings. */</div><div class='add'>+</div><div class='add'>+#include "aq_nic.h"</div><div class='add'>+#include "aq_hw.h"</div><div class='add'>+#include "aq_hw_utils.h"</div><div class='add'>+#include "aq_ptp.h"</div><div class='add'>+#include "aq_vec.h"</div><div class='add'>+#include "aq_main.h"</div><div class='add'>+</div><div class='add'>+#include &lt;net/xdp.h&gt;</div><div class='add'>+#include &lt;linux/filter.h&gt;</div><div class='add'>+#include &lt;linux/bpf_trace.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+#include &lt;linux/etherdevice.h&gt;</div><div class='add'>+</div><div class='add'>+static void aq_get_rxpages_xdp(struct aq_ring_buff_s *buff,</div><div class='add'>+			       struct xdp_buff *xdp)</div><div class='add'>+{</div><div class='add'>+	struct skb_shared_info *sinfo;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	if (xdp_buff_has_frags(xdp)) {</div><div class='add'>+		sinfo = xdp_get_shared_info_from_buff(xdp);</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; sinfo-&gt;nr_frags; i++) {</div><div class='add'>+			skb_frag_t *frag = &amp;sinfo-&gt;frags[i];</div><div class='add'>+</div><div class='add'>+			page_ref_inc(skb_frag_page(frag));</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	page_ref_inc(buff-&gt;rxdata.page);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void aq_free_rxpage(struct aq_rxpage *rxpage, struct device *dev)</div><div class='add'>+{</div><div class='add'>+	unsigned int len = PAGE_SIZE &lt;&lt; rxpage-&gt;order;</div><div class='add'>+</div><div class='add'>+	dma_unmap_page(dev, rxpage-&gt;daddr, len, DMA_FROM_DEVICE);</div><div class='add'>+</div><div class='add'>+	/* Drop the ref for being in the ring. */</div><div class='add'>+	__free_pages(rxpage-&gt;page, rxpage-&gt;order);</div><div class='add'>+	rxpage-&gt;page = NULL;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_alloc_rxpages(struct aq_rxpage *rxpage, struct aq_ring_s *rx_ring)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = aq_nic_get_dev(rx_ring-&gt;aq_nic);</div><div class='add'>+	unsigned int order = rx_ring-&gt;page_order;</div><div class='add'>+	struct page *page;</div><div class='add'>+	int ret = -ENOMEM;</div><div class='add'>+	dma_addr_t daddr;</div><div class='add'>+</div><div class='add'>+	page = dev_alloc_pages(order);</div><div class='add'>+	if (unlikely(!page))</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	daddr = dma_map_page(dev, page, 0, PAGE_SIZE &lt;&lt; order,</div><div class='add'>+			     DMA_FROM_DEVICE);</div><div class='add'>+</div><div class='add'>+	if (unlikely(dma_mapping_error(dev, daddr)))</div><div class='add'>+		goto free_page;</div><div class='add'>+</div><div class='add'>+	rxpage-&gt;page = page;</div><div class='add'>+	rxpage-&gt;daddr = daddr;</div><div class='add'>+	rxpage-&gt;order = order;</div><div class='add'>+	rxpage-&gt;pg_off = rx_ring-&gt;page_offset;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+</div><div class='add'>+free_page:</div><div class='add'>+	__free_pages(page, order);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_get_rxpages(struct aq_ring_s *self, struct aq_ring_buff_s *rxbuf)</div><div class='add'>+{</div><div class='add'>+	unsigned int order = self-&gt;page_order;</div><div class='add'>+	u16 page_offset = self-&gt;page_offset;</div><div class='add'>+	u16 frame_max = self-&gt;frame_max;</div><div class='add'>+	u16 tail_size = self-&gt;tail_size;</div><div class='add'>+	int ret;</div><div class='add'>+</div><div class='add'>+	if (rxbuf-&gt;rxdata.page) {</div><div class='add'>+		/* One means ring is the only user and can reuse */</div><div class='add'>+		if (page_ref_count(rxbuf-&gt;rxdata.page) &gt; 1) {</div><div class='add'>+			/* Try reuse buffer */</div><div class='add'>+			rxbuf-&gt;rxdata.pg_off += frame_max + page_offset +</div><div class='add'>+						tail_size;</div><div class='add'>+			if (rxbuf-&gt;rxdata.pg_off + frame_max + tail_size &lt;=</div><div class='add'>+			    (PAGE_SIZE &lt;&lt; order)) {</div><div class='add'>+				u64_stats_update_begin(&amp;self-&gt;stats.rx.syncp);</div><div class='add'>+				self-&gt;stats.rx.pg_flips++;</div><div class='add'>+				u64_stats_update_end(&amp;self-&gt;stats.rx.syncp);</div><div class='add'>+</div><div class='add'>+			} else {</div><div class='add'>+				/* Buffer exhausted. We have other users and</div><div class='add'>+				 * should release this page and realloc</div><div class='add'>+				 */</div><div class='add'>+				aq_free_rxpage(&amp;rxbuf-&gt;rxdata,</div><div class='add'>+					       aq_nic_get_dev(self-&gt;aq_nic));</div><div class='add'>+				u64_stats_update_begin(&amp;self-&gt;stats.rx.syncp);</div><div class='add'>+				self-&gt;stats.rx.pg_losts++;</div><div class='add'>+				u64_stats_update_end(&amp;self-&gt;stats.rx.syncp);</div><div class='add'>+			}</div><div class='add'>+		} else {</div><div class='add'>+			rxbuf-&gt;rxdata.pg_off = page_offset;</div><div class='add'>+			u64_stats_update_begin(&amp;self-&gt;stats.rx.syncp);</div><div class='add'>+			self-&gt;stats.rx.pg_reuses++;</div><div class='add'>+			u64_stats_update_end(&amp;self-&gt;stats.rx.syncp);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (!rxbuf-&gt;rxdata.page) {</div><div class='add'>+		ret = aq_alloc_rxpages(&amp;rxbuf-&gt;rxdata, self);</div><div class='add'>+		if (ret) {</div><div class='add'>+			u64_stats_update_begin(&amp;self-&gt;stats.rx.syncp);</div><div class='add'>+			self-&gt;stats.rx.alloc_fails++;</div><div class='add'>+			u64_stats_update_end(&amp;self-&gt;stats.rx.syncp);</div><div class='add'>+		}</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_ring_alloc(struct aq_ring_s *self,</div><div class='add'>+			 struct aq_nic_s *aq_nic)</div><div class='add'>+{</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	self-&gt;buff_ring =</div><div class='add'>+		kcalloc(self-&gt;size, sizeof(struct aq_ring_buff_s), GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+	if (!self-&gt;buff_ring) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	self-&gt;dx_ring = dma_alloc_coherent(aq_nic_get_dev(aq_nic),</div><div class='add'>+					   self-&gt;size * self-&gt;dx_size,</div><div class='add'>+					   &amp;self-&gt;dx_ring_pa, GFP_KERNEL);</div><div class='add'>+	if (!self-&gt;dx_ring) {</div><div class='add'>+		err = -ENOMEM;</div><div class='add'>+		goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	if (err &lt; 0) {</div><div class='add'>+		aq_ring_free(self);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_ring_tx_alloc(struct aq_ring_s *self,</div><div class='add'>+		     struct aq_nic_s *aq_nic,</div><div class='add'>+		     unsigned int idx,</div><div class='add'>+		     struct aq_nic_cfg_s *aq_nic_cfg)</div><div class='add'>+{</div><div class='add'>+	self-&gt;aq_nic = aq_nic;</div><div class='add'>+	self-&gt;idx = idx;</div><div class='add'>+	self-&gt;size = aq_nic_cfg-&gt;txds;</div><div class='add'>+	self-&gt;dx_size = aq_nic_cfg-&gt;aq_hw_caps-&gt;txd_size;</div><div class='add'>+</div><div class='add'>+	return aq_ring_alloc(self, aq_nic);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_ring_rx_alloc(struct aq_ring_s *self,</div><div class='add'>+		     struct aq_nic_s *aq_nic,</div><div class='add'>+		     unsigned int idx,</div><div class='add'>+		     struct aq_nic_cfg_s *aq_nic_cfg)</div><div class='add'>+{</div><div class='add'>+	self-&gt;aq_nic = aq_nic;</div><div class='add'>+	self-&gt;idx = idx;</div><div class='add'>+	self-&gt;size = aq_nic_cfg-&gt;rxds;</div><div class='add'>+	self-&gt;dx_size = aq_nic_cfg-&gt;aq_hw_caps-&gt;rxd_size;</div><div class='add'>+	self-&gt;xdp_prog = aq_nic-&gt;xdp_prog;</div><div class='add'>+	self-&gt;frame_max = AQ_CFG_RX_FRAME_MAX;</div><div class='add'>+</div><div class='add'>+	/* Only order-2 is allowed if XDP is enabled */</div><div class='add'>+	if (READ_ONCE(self-&gt;xdp_prog)) {</div><div class='add'>+		self-&gt;page_offset = AQ_XDP_HEADROOM;</div><div class='add'>+		self-&gt;page_order = AQ_CFG_XDP_PAGEORDER;</div><div class='add'>+		self-&gt;tail_size = AQ_XDP_TAILROOM;</div><div class='add'>+	} else {</div><div class='add'>+		self-&gt;page_offset = 0;</div><div class='add'>+		self-&gt;page_order = fls(self-&gt;frame_max / PAGE_SIZE +</div><div class='add'>+				       (self-&gt;frame_max % PAGE_SIZE ? 1 : 0)) - 1;</div><div class='add'>+		if (aq_nic_cfg-&gt;rxpageorder &gt; self-&gt;page_order)</div><div class='add'>+			self-&gt;page_order = aq_nic_cfg-&gt;rxpageorder;</div><div class='add'>+		self-&gt;tail_size = 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return aq_ring_alloc(self, aq_nic);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int</div><div class='add'>+aq_ring_hwts_rx_alloc(struct aq_ring_s *self, struct aq_nic_s *aq_nic,</div><div class='add'>+		      unsigned int idx, unsigned int size, unsigned int dx_size)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = aq_nic_get_dev(aq_nic);</div><div class='add'>+	size_t sz = size * dx_size + AQ_CFG_RXDS_DEF;</div><div class='add'>+</div><div class='add'>+	memset(self, 0, sizeof(*self));</div><div class='add'>+</div><div class='add'>+	self-&gt;aq_nic = aq_nic;</div><div class='add'>+	self-&gt;idx = idx;</div><div class='add'>+	self-&gt;size = size;</div><div class='add'>+	self-&gt;dx_size = dx_size;</div><div class='add'>+</div><div class='add'>+	self-&gt;dx_ring = dma_alloc_coherent(dev, sz, &amp;self-&gt;dx_ring_pa,</div><div class='add'>+					   GFP_KERNEL);</div><div class='add'>+	if (!self-&gt;dx_ring) {</div><div class='add'>+		aq_ring_free(self);</div><div class='add'>+		return -ENOMEM;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_ring_init(struct aq_ring_s *self, const enum atl_ring_type ring_type)</div><div class='add'>+{</div><div class='add'>+	self-&gt;hw_head = 0;</div><div class='add'>+	self-&gt;sw_head = 0;</div><div class='add'>+	self-&gt;sw_tail = 0;</div><div class='add'>+	self-&gt;ring_type = ring_type;</div><div class='add'>+</div><div class='add'>+	if (self-&gt;ring_type == ATL_RING_RX)</div><div class='add'>+		u64_stats_init(&amp;self-&gt;stats.rx.syncp);</div><div class='add'>+	else</div><div class='add'>+		u64_stats_init(&amp;self-&gt;stats.tx.syncp);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool aq_ring_dx_in_range(unsigned int h, unsigned int i,</div><div class='add'>+				       unsigned int t)</div><div class='add'>+{</div><div class='add'>+	return (h &lt; t) ? ((h &lt; i) &amp;&amp; (i &lt; t)) : ((h &lt; i) || (i &lt; t));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void aq_ring_update_queue_state(struct aq_ring_s *ring)</div><div class='add'>+{</div><div class='add'>+	if (aq_ring_avail_dx(ring) &lt;= AQ_CFG_SKB_FRAGS_MAX)</div><div class='add'>+		aq_ring_queue_stop(ring);</div><div class='add'>+	else if (aq_ring_avail_dx(ring) &gt; AQ_CFG_RESTART_DESC_THRES)</div><div class='add'>+		aq_ring_queue_wake(ring);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void aq_ring_queue_wake(struct aq_ring_s *ring)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = aq_nic_get_ndev(ring-&gt;aq_nic);</div><div class='add'>+</div><div class='add'>+	if (__netif_subqueue_stopped(ndev,</div><div class='add'>+				     AQ_NIC_RING2QMAP(ring-&gt;aq_nic,</div><div class='add'>+						      ring-&gt;idx))) {</div><div class='add'>+		netif_wake_subqueue(ndev,</div><div class='add'>+				    AQ_NIC_RING2QMAP(ring-&gt;aq_nic, ring-&gt;idx));</div><div class='add'>+		u64_stats_update_begin(&amp;ring-&gt;stats.tx.syncp);</div><div class='add'>+		ring-&gt;stats.tx.queue_restarts++;</div><div class='add'>+		u64_stats_update_end(&amp;ring-&gt;stats.tx.syncp);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void aq_ring_queue_stop(struct aq_ring_s *ring)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = aq_nic_get_ndev(ring-&gt;aq_nic);</div><div class='add'>+</div><div class='add'>+	if (!__netif_subqueue_stopped(ndev,</div><div class='add'>+				      AQ_NIC_RING2QMAP(ring-&gt;aq_nic,</div><div class='add'>+						       ring-&gt;idx)))</div><div class='add'>+		netif_stop_subqueue(ndev,</div><div class='add'>+				    AQ_NIC_RING2QMAP(ring-&gt;aq_nic, ring-&gt;idx));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool aq_ring_tx_clean(struct aq_ring_s *self)</div><div class='add'>+{</div><div class='add'>+	struct device *dev = aq_nic_get_dev(self-&gt;aq_nic);</div><div class='add'>+	unsigned int budget;</div><div class='add'>+</div><div class='add'>+	for (budget = AQ_CFG_TX_CLEAN_BUDGET;</div><div class='add'>+	     budget &amp;&amp; self-&gt;sw_head != self-&gt;hw_head; budget--) {</div><div class='add'>+		struct aq_ring_buff_s *buff = &amp;self-&gt;buff_ring[self-&gt;sw_head];</div><div class='add'>+</div><div class='add'>+		if (likely(buff-&gt;is_mapped)) {</div><div class='add'>+			if (unlikely(buff-&gt;is_sop)) {</div><div class='add'>+				if (!buff-&gt;is_eop &amp;&amp;</div><div class='add'>+				    buff-&gt;eop_index != 0xffffU &amp;&amp;</div><div class='add'>+				    (!aq_ring_dx_in_range(self-&gt;sw_head,</div><div class='add'>+						buff-&gt;eop_index,</div><div class='add'>+						self-&gt;hw_head)))</div><div class='add'>+					break;</div><div class='add'>+</div><div class='add'>+				dma_unmap_single(dev, buff-&gt;pa, buff-&gt;len,</div><div class='add'>+						 DMA_TO_DEVICE);</div><div class='add'>+			} else {</div><div class='add'>+				dma_unmap_page(dev, buff-&gt;pa, buff-&gt;len,</div><div class='add'>+					       DMA_TO_DEVICE);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (likely(!buff-&gt;is_eop))</div><div class='add'>+			goto out;</div><div class='add'>+</div><div class='add'>+		if (buff-&gt;skb) {</div><div class='add'>+			u64_stats_update_begin(&amp;self-&gt;stats.tx.syncp);</div><div class='add'>+			++self-&gt;stats.tx.packets;</div><div class='add'>+			self-&gt;stats.tx.bytes += buff-&gt;skb-&gt;len;</div><div class='add'>+			u64_stats_update_end(&amp;self-&gt;stats.tx.syncp);</div><div class='add'>+			dev_kfree_skb_any(buff-&gt;skb);</div><div class='add'>+		} else if (buff-&gt;xdpf) {</div><div class='add'>+			u64_stats_update_begin(&amp;self-&gt;stats.tx.syncp);</div><div class='add'>+			++self-&gt;stats.tx.packets;</div><div class='add'>+			self-&gt;stats.tx.bytes += xdp_get_frame_len(buff-&gt;xdpf);</div><div class='add'>+			u64_stats_update_end(&amp;self-&gt;stats.tx.syncp);</div><div class='add'>+			xdp_return_frame_rx_napi(buff-&gt;xdpf);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+		buff-&gt;skb = NULL;</div><div class='add'>+		buff-&gt;xdpf = NULL;</div><div class='add'>+		buff-&gt;pa = 0U;</div><div class='add'>+		buff-&gt;eop_index = 0xffffU;</div><div class='add'>+		self-&gt;sw_head = aq_ring_next_dx(self, self-&gt;sw_head);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return !!budget;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aq_rx_checksum(struct aq_ring_s *self,</div><div class='add'>+			   struct aq_ring_buff_s *buff,</div><div class='add'>+			   struct sk_buff *skb)</div><div class='add'>+{</div><div class='add'>+	if (!(self-&gt;aq_nic-&gt;ndev-&gt;features &amp; NETIF_F_RXCSUM))</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (unlikely(buff-&gt;is_cso_err)) {</div><div class='add'>+		u64_stats_update_begin(&amp;self-&gt;stats.rx.syncp);</div><div class='add'>+		++self-&gt;stats.rx.errors;</div><div class='add'>+		u64_stats_update_end(&amp;self-&gt;stats.rx.syncp);</div><div class='add'>+		skb-&gt;ip_summed = CHECKSUM_NONE;</div><div class='add'>+		return;</div><div class='add'>+	}</div><div class='add'>+	if (buff-&gt;is_ip_cso) {</div><div class='add'>+		__skb_incr_checksum_unnecessary(skb);</div><div class='add'>+	} else {</div><div class='add'>+		skb-&gt;ip_summed = CHECKSUM_NONE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (buff-&gt;is_udp_cso || buff-&gt;is_tcp_cso)</div><div class='add'>+		__skb_incr_checksum_unnecessary(skb);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_xdp_xmit(struct net_device *dev, int num_frames,</div><div class='add'>+		struct xdp_frame **frames, u32 flags)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_s *aq_nic = netdev_priv(dev);</div><div class='add'>+	unsigned int vec, i, drop = 0;</div><div class='add'>+	int cpu = smp_processor_id();</div><div class='add'>+	struct aq_nic_cfg_s *aq_cfg;</div><div class='add'>+	struct aq_ring_s *ring;</div><div class='add'>+</div><div class='add'>+	aq_cfg = aq_nic_get_cfg(aq_nic);</div><div class='add'>+	vec = cpu % aq_cfg-&gt;vecs;</div><div class='add'>+	ring = aq_nic-&gt;aq_ring_tx[AQ_NIC_CFG_TCVEC2RING(aq_cfg, 0, vec)];</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; num_frames; i++) {</div><div class='add'>+		struct xdp_frame *xdpf = frames[i];</div><div class='add'>+</div><div class='add'>+		if (aq_nic_xmit_xdpf(aq_nic, ring, xdpf) == NETDEV_TX_BUSY)</div><div class='add'>+			drop++;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return num_frames - drop;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct sk_buff *aq_xdp_build_skb(struct xdp_buff *xdp,</div><div class='add'>+					struct net_device *dev,</div><div class='add'>+					struct aq_ring_buff_s *buff)</div><div class='add'>+{</div><div class='add'>+	struct xdp_frame *xdpf;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	xdpf = xdp_convert_buff_to_frame(xdp);</div><div class='add'>+	if (unlikely(!xdpf))</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	skb = xdp_build_skb_from_frame(xdpf, dev);</div><div class='add'>+	if (!skb)</div><div class='add'>+		return NULL;</div><div class='add'>+</div><div class='add'>+	aq_get_rxpages_xdp(buff, xdp);</div><div class='add'>+	return skb;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct sk_buff *aq_xdp_run_prog(struct aq_nic_s *aq_nic,</div><div class='add'>+				       struct xdp_buff *xdp,</div><div class='add'>+				       struct aq_ring_s *rx_ring,</div><div class='add'>+				       struct aq_ring_buff_s *buff)</div><div class='add'>+{</div><div class='add'>+	int result = NETDEV_TX_BUSY;</div><div class='add'>+	struct aq_ring_s *tx_ring;</div><div class='add'>+	struct xdp_frame *xdpf;</div><div class='add'>+	struct bpf_prog *prog;</div><div class='add'>+	u32 act = XDP_ABORTED;</div><div class='add'>+	struct sk_buff *skb;</div><div class='add'>+</div><div class='add'>+	u64_stats_update_begin(&amp;rx_ring-&gt;stats.rx.syncp);</div><div class='add'>+	++rx_ring-&gt;stats.rx.packets;</div><div class='add'>+	rx_ring-&gt;stats.rx.bytes += xdp_get_buff_len(xdp);</div><div class='add'>+	u64_stats_update_end(&amp;rx_ring-&gt;stats.rx.syncp);</div><div class='add'>+</div><div class='add'>+	prog = READ_ONCE(rx_ring-&gt;xdp_prog);</div><div class='add'>+	if (!prog)</div><div class='add'>+		return aq_xdp_build_skb(xdp, aq_nic-&gt;ndev, buff);</div><div class='add'>+</div><div class='add'>+	prefetchw(xdp-&gt;data_hard_start); /* xdp_frame write */</div><div class='add'>+</div><div class='add'>+	/* single buffer XDP program, but packet is multi buffer, aborted */</div><div class='add'>+	if (xdp_buff_has_frags(xdp) &amp;&amp; !prog-&gt;aux-&gt;xdp_has_frags)</div><div class='add'>+		goto out_aborted;</div><div class='add'>+</div><div class='add'>+	act = bpf_prog_run_xdp(prog, xdp);</div><div class='add'>+	switch (act) {</div><div class='add'>+	case XDP_PASS:</div><div class='add'>+		skb = aq_xdp_build_skb(xdp, aq_nic-&gt;ndev, buff);</div><div class='add'>+		if (!skb)</div><div class='add'>+			goto out_aborted;</div><div class='add'>+		u64_stats_update_begin(&amp;rx_ring-&gt;stats.rx.syncp);</div><div class='add'>+		++rx_ring-&gt;stats.rx.xdp_pass;</div><div class='add'>+		u64_stats_update_end(&amp;rx_ring-&gt;stats.rx.syncp);</div><div class='add'>+		return skb;</div><div class='add'>+	case XDP_TX:</div><div class='add'>+		xdpf = xdp_convert_buff_to_frame(xdp);</div><div class='add'>+		if (unlikely(!xdpf))</div><div class='add'>+			goto out_aborted;</div><div class='add'>+		tx_ring = aq_nic-&gt;aq_ring_tx[rx_ring-&gt;idx];</div><div class='add'>+		result = aq_nic_xmit_xdpf(aq_nic, tx_ring, xdpf);</div><div class='add'>+		if (result == NETDEV_TX_BUSY)</div><div class='add'>+			goto out_aborted;</div><div class='add'>+		u64_stats_update_begin(&amp;rx_ring-&gt;stats.rx.syncp);</div><div class='add'>+		++rx_ring-&gt;stats.rx.xdp_tx;</div><div class='add'>+		u64_stats_update_end(&amp;rx_ring-&gt;stats.rx.syncp);</div><div class='add'>+		aq_get_rxpages_xdp(buff, xdp);</div><div class='add'>+		break;</div><div class='add'>+	case XDP_REDIRECT:</div><div class='add'>+		if (xdp_do_redirect(aq_nic-&gt;ndev, xdp, prog) &lt; 0)</div><div class='add'>+			goto out_aborted;</div><div class='add'>+		xdp_do_flush();</div><div class='add'>+		u64_stats_update_begin(&amp;rx_ring-&gt;stats.rx.syncp);</div><div class='add'>+		++rx_ring-&gt;stats.rx.xdp_redirect;</div><div class='add'>+		u64_stats_update_end(&amp;rx_ring-&gt;stats.rx.syncp);</div><div class='add'>+		aq_get_rxpages_xdp(buff, xdp);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		fallthrough;</div><div class='add'>+	case XDP_ABORTED:</div><div class='add'>+out_aborted:</div><div class='add'>+		u64_stats_update_begin(&amp;rx_ring-&gt;stats.rx.syncp);</div><div class='add'>+		++rx_ring-&gt;stats.rx.xdp_aborted;</div><div class='add'>+		u64_stats_update_end(&amp;rx_ring-&gt;stats.rx.syncp);</div><div class='add'>+		trace_xdp_exception(aq_nic-&gt;ndev, prog, act);</div><div class='add'>+		bpf_warn_invalid_xdp_action(aq_nic-&gt;ndev, prog, act);</div><div class='add'>+		break;</div><div class='add'>+	case XDP_DROP:</div><div class='add'>+		u64_stats_update_begin(&amp;rx_ring-&gt;stats.rx.syncp);</div><div class='add'>+		++rx_ring-&gt;stats.rx.xdp_drop;</div><div class='add'>+		u64_stats_update_end(&amp;rx_ring-&gt;stats.rx.syncp);</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ERR_PTR(-result);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool aq_add_rx_fragment(struct device *dev,</div><div class='add'>+			       struct aq_ring_s *ring,</div><div class='add'>+			       struct aq_ring_buff_s *buff,</div><div class='add'>+			       struct xdp_buff *xdp)</div><div class='add'>+{</div><div class='add'>+	struct skb_shared_info *sinfo = xdp_get_shared_info_from_buff(xdp);</div><div class='add'>+	struct aq_ring_buff_s *buff_ = buff;</div><div class='add'>+</div><div class='add'>+	memset(sinfo, 0, sizeof(*sinfo));</div><div class='add'>+	do {</div><div class='add'>+		skb_frag_t *frag;</div><div class='add'>+</div><div class='add'>+		if (unlikely(sinfo-&gt;nr_frags &gt;= MAX_SKB_FRAGS))</div><div class='add'>+			return true;</div><div class='add'>+</div><div class='add'>+		frag = &amp;sinfo-&gt;frags[sinfo-&gt;nr_frags++];</div><div class='add'>+		buff_ = &amp;ring-&gt;buff_ring[buff_-&gt;next];</div><div class='add'>+		dma_sync_single_range_for_cpu(dev,</div><div class='add'>+					      buff_-&gt;rxdata.daddr,</div><div class='add'>+					      buff_-&gt;rxdata.pg_off,</div><div class='add'>+					      buff_-&gt;len,</div><div class='add'>+					      DMA_FROM_DEVICE);</div><div class='add'>+		sinfo-&gt;xdp_frags_size += buff_-&gt;len;</div><div class='add'>+		skb_frag_fill_page_desc(frag, buff_-&gt;rxdata.page,</div><div class='add'>+					buff_-&gt;rxdata.pg_off,</div><div class='add'>+					buff_-&gt;len);</div><div class='add'>+</div><div class='add'>+		buff_-&gt;is_cleaned = 1;</div><div class='add'>+</div><div class='add'>+		buff-&gt;is_ip_cso &amp;= buff_-&gt;is_ip_cso;</div><div class='add'>+		buff-&gt;is_udp_cso &amp;= buff_-&gt;is_udp_cso;</div><div class='add'>+		buff-&gt;is_tcp_cso &amp;= buff_-&gt;is_tcp_cso;</div><div class='add'>+		buff-&gt;is_cso_err |= buff_-&gt;is_cso_err;</div><div class='add'>+</div><div class='add'>+		if (page_is_pfmemalloc(buff_-&gt;rxdata.page))</div><div class='add'>+			xdp_buff_set_frag_pfmemalloc(xdp);</div><div class='add'>+</div><div class='add'>+	} while (!buff_-&gt;is_eop);</div><div class='add'>+</div><div class='add'>+	xdp_buff_set_frags_flag(xdp);</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __aq_ring_rx_clean(struct aq_ring_s *self, struct napi_struct *napi,</div><div class='add'>+			      int *work_done, int budget)</div><div class='add'>+{</div><div class='add'>+	struct net_device *ndev = aq_nic_get_ndev(self-&gt;aq_nic);</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	for (; (self-&gt;sw_head != self-&gt;hw_head) &amp;&amp; budget;</div><div class='add'>+		self-&gt;sw_head = aq_ring_next_dx(self, self-&gt;sw_head),</div><div class='add'>+		--budget, ++(*work_done)) {</div><div class='add'>+		struct aq_ring_buff_s *buff = &amp;self-&gt;buff_ring[self-&gt;sw_head];</div><div class='add'>+		bool is_ptp_ring = aq_ptp_ring(self-&gt;aq_nic, self);</div><div class='add'>+		struct aq_ring_buff_s *buff_ = NULL;</div><div class='add'>+		struct sk_buff *skb = NULL;</div><div class='add'>+		unsigned int next_ = 0U;</div><div class='add'>+		unsigned int i = 0U;</div><div class='add'>+		u16 hdr_len;</div><div class='add'>+</div><div class='add'>+		if (buff-&gt;is_cleaned)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (!buff-&gt;is_eop) {</div><div class='add'>+			unsigned int frag_cnt = 0U;</div><div class='add'>+</div><div class='add'>+			/* There will be an extra fragment */</div><div class='add'>+			if (buff-&gt;len &gt; AQ_CFG_RX_HDR_SIZE)</div><div class='add'>+				frag_cnt++;</div><div class='add'>+</div><div class='add'>+			buff_ = buff;</div><div class='add'>+			do {</div><div class='add'>+				bool is_rsc_completed = true;</div><div class='add'>+</div><div class='add'>+				if (buff_-&gt;next &gt;= self-&gt;size) {</div><div class='add'>+					err = -EIO;</div><div class='add'>+					goto err_exit;</div><div class='add'>+				}</div><div class='add'>+</div><div class='add'>+				frag_cnt++;</div><div class='add'>+				next_ = buff_-&gt;next;</div><div class='add'>+				buff_ = &amp;self-&gt;buff_ring[next_];</div><div class='add'>+				is_rsc_completed =</div><div class='add'>+					aq_ring_dx_in_range(self-&gt;sw_head,</div><div class='add'>+							    next_,</div><div class='add'>+							    self-&gt;hw_head);</div><div class='add'>+</div><div class='add'>+				if (unlikely(!is_rsc_completed) ||</div><div class='add'>+						frag_cnt &gt; MAX_SKB_FRAGS) {</div><div class='add'>+					err = 0;</div><div class='add'>+					goto err_exit;</div><div class='add'>+				}</div><div class='add'>+</div><div class='add'>+				buff-&gt;is_error |= buff_-&gt;is_error;</div><div class='add'>+				buff-&gt;is_cso_err |= buff_-&gt;is_cso_err;</div><div class='add'>+</div><div class='add'>+			} while (!buff_-&gt;is_eop);</div><div class='add'>+</div><div class='add'>+			if (buff-&gt;is_error ||</div><div class='add'>+			    (buff-&gt;is_lro &amp;&amp; buff-&gt;is_cso_err)) {</div><div class='add'>+				buff_ = buff;</div><div class='add'>+				do {</div><div class='add'>+					if (buff_-&gt;next &gt;= self-&gt;size) {</div><div class='add'>+						err = -EIO;</div><div class='add'>+						goto err_exit;</div><div class='add'>+					}</div><div class='add'>+					next_ = buff_-&gt;next;</div><div class='add'>+					buff_ = &amp;self-&gt;buff_ring[next_];</div><div class='add'>+</div><div class='add'>+					buff_-&gt;is_cleaned = true;</div><div class='add'>+				} while (!buff_-&gt;is_eop);</div><div class='add'>+</div><div class='add'>+				u64_stats_update_begin(&amp;self-&gt;stats.rx.syncp);</div><div class='add'>+				++self-&gt;stats.rx.errors;</div><div class='add'>+				u64_stats_update_end(&amp;self-&gt;stats.rx.syncp);</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (buff-&gt;is_error) {</div><div class='add'>+			u64_stats_update_begin(&amp;self-&gt;stats.rx.syncp);</div><div class='add'>+			++self-&gt;stats.rx.errors;</div><div class='add'>+			u64_stats_update_end(&amp;self-&gt;stats.rx.syncp);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		dma_sync_single_range_for_cpu(aq_nic_get_dev(self-&gt;aq_nic),</div><div class='add'>+					      buff-&gt;rxdata.daddr,</div><div class='add'>+					      buff-&gt;rxdata.pg_off,</div><div class='add'>+					      buff-&gt;len, DMA_FROM_DEVICE);</div><div class='add'>+</div><div class='add'>+		skb = napi_alloc_skb(napi, AQ_CFG_RX_HDR_SIZE);</div><div class='add'>+		if (unlikely(!skb)) {</div><div class='add'>+			u64_stats_update_begin(&amp;self-&gt;stats.rx.syncp);</div><div class='add'>+			self-&gt;stats.rx.skb_alloc_fails++;</div><div class='add'>+			u64_stats_update_end(&amp;self-&gt;stats.rx.syncp);</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto err_exit;</div><div class='add'>+		}</div><div class='add'>+		if (is_ptp_ring)</div><div class='add'>+			buff-&gt;len -=</div><div class='add'>+				aq_ptp_extract_ts(self-&gt;aq_nic, skb_hwtstamps(skb),</div><div class='add'>+						  aq_buf_vaddr(&amp;buff-&gt;rxdata),</div><div class='add'>+						  buff-&gt;len);</div><div class='add'>+</div><div class='add'>+		hdr_len = buff-&gt;len;</div><div class='add'>+		if (hdr_len &gt; AQ_CFG_RX_HDR_SIZE)</div><div class='add'>+			hdr_len = eth_get_headlen(skb-&gt;dev,</div><div class='add'>+						  aq_buf_vaddr(&amp;buff-&gt;rxdata),</div><div class='add'>+						  AQ_CFG_RX_HDR_SIZE);</div><div class='add'>+</div><div class='add'>+		memcpy(__skb_put(skb, hdr_len), aq_buf_vaddr(&amp;buff-&gt;rxdata),</div><div class='add'>+		       ALIGN(hdr_len, sizeof(long)));</div><div class='add'>+</div><div class='add'>+		if (buff-&gt;len - hdr_len &gt; 0) {</div><div class='add'>+			skb_add_rx_frag(skb, i++, buff-&gt;rxdata.page,</div><div class='add'>+					buff-&gt;rxdata.pg_off + hdr_len,</div><div class='add'>+					buff-&gt;len - hdr_len,</div><div class='add'>+					self-&gt;frame_max);</div><div class='add'>+			page_ref_inc(buff-&gt;rxdata.page);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (!buff-&gt;is_eop) {</div><div class='add'>+			buff_ = buff;</div><div class='add'>+			do {</div><div class='add'>+				next_ = buff_-&gt;next;</div><div class='add'>+				buff_ = &amp;self-&gt;buff_ring[next_];</div><div class='add'>+</div><div class='add'>+				dma_sync_single_range_for_cpu(aq_nic_get_dev(self-&gt;aq_nic),</div><div class='add'>+							      buff_-&gt;rxdata.daddr,</div><div class='add'>+							      buff_-&gt;rxdata.pg_off,</div><div class='add'>+							      buff_-&gt;len,</div><div class='add'>+							      DMA_FROM_DEVICE);</div><div class='add'>+				skb_add_rx_frag(skb, i++,</div><div class='add'>+						buff_-&gt;rxdata.page,</div><div class='add'>+						buff_-&gt;rxdata.pg_off,</div><div class='add'>+						buff_-&gt;len,</div><div class='add'>+						self-&gt;frame_max);</div><div class='add'>+				page_ref_inc(buff_-&gt;rxdata.page);</div><div class='add'>+				buff_-&gt;is_cleaned = 1;</div><div class='add'>+</div><div class='add'>+				buff-&gt;is_ip_cso &amp;= buff_-&gt;is_ip_cso;</div><div class='add'>+				buff-&gt;is_udp_cso &amp;= buff_-&gt;is_udp_cso;</div><div class='add'>+				buff-&gt;is_tcp_cso &amp;= buff_-&gt;is_tcp_cso;</div><div class='add'>+				buff-&gt;is_cso_err |= buff_-&gt;is_cso_err;</div><div class='add'>+</div><div class='add'>+			} while (!buff_-&gt;is_eop);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (buff-&gt;is_vlan)</div><div class='add'>+			__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),</div><div class='add'>+					       buff-&gt;vlan_rx_tag);</div><div class='add'>+</div><div class='add'>+		skb-&gt;protocol = eth_type_trans(skb, ndev);</div><div class='add'>+</div><div class='add'>+		aq_rx_checksum(self, buff, skb);</div><div class='add'>+</div><div class='add'>+		skb_set_hash(skb, buff-&gt;rss_hash,</div><div class='add'>+			     buff-&gt;is_hash_l4 ? PKT_HASH_TYPE_L4 :</div><div class='add'>+			     PKT_HASH_TYPE_NONE);</div><div class='add'>+		/* Send all PTP traffic to 0 queue */</div><div class='add'>+		skb_record_rx_queue(skb,</div><div class='add'>+				    is_ptp_ring ? 0</div><div class='add'>+						: AQ_NIC_RING2QMAP(self-&gt;aq_nic,</div><div class='add'>+								   self-&gt;idx));</div><div class='add'>+</div><div class='add'>+		u64_stats_update_begin(&amp;self-&gt;stats.rx.syncp);</div><div class='add'>+		++self-&gt;stats.rx.packets;</div><div class='add'>+		self-&gt;stats.rx.bytes += skb-&gt;len;</div><div class='add'>+		u64_stats_update_end(&amp;self-&gt;stats.rx.syncp);</div><div class='add'>+</div><div class='add'>+		napi_gro_receive(napi, skb);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int __aq_ring_xdp_clean(struct aq_ring_s *rx_ring,</div><div class='add'>+			       struct napi_struct *napi, int *work_done,</div><div class='add'>+			       int budget)</div><div class='add'>+{</div><div class='add'>+	int frame_sz = rx_ring-&gt;page_offset + rx_ring-&gt;frame_max +</div><div class='add'>+		       rx_ring-&gt;tail_size;</div><div class='add'>+	struct aq_nic_s *aq_nic = rx_ring-&gt;aq_nic;</div><div class='add'>+	bool is_rsc_completed = true;</div><div class='add'>+	struct device *dev;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	dev = aq_nic_get_dev(aq_nic);</div><div class='add'>+	for (; (rx_ring-&gt;sw_head != rx_ring-&gt;hw_head) &amp;&amp; budget;</div><div class='add'>+		rx_ring-&gt;sw_head = aq_ring_next_dx(rx_ring, rx_ring-&gt;sw_head),</div><div class='add'>+		--budget, ++(*work_done)) {</div><div class='add'>+		struct aq_ring_buff_s *buff = &amp;rx_ring-&gt;buff_ring[rx_ring-&gt;sw_head];</div><div class='add'>+		bool is_ptp_ring = aq_ptp_ring(rx_ring-&gt;aq_nic, rx_ring);</div><div class='add'>+		struct aq_ring_buff_s *buff_ = NULL;</div><div class='add'>+		u16 ptp_hwtstamp_len = 0;</div><div class='add'>+		struct skb_shared_hwtstamps shhwtstamps;</div><div class='add'>+		struct sk_buff *skb = NULL;</div><div class='add'>+		unsigned int next_ = 0U;</div><div class='add'>+		struct xdp_buff xdp;</div><div class='add'>+		void *hard_start;</div><div class='add'>+</div><div class='add'>+		if (buff-&gt;is_cleaned)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (!buff-&gt;is_eop) {</div><div class='add'>+			buff_ = buff;</div><div class='add'>+			do {</div><div class='add'>+				if (buff_-&gt;next &gt;= rx_ring-&gt;size) {</div><div class='add'>+					err = -EIO;</div><div class='add'>+					goto err_exit;</div><div class='add'>+				}</div><div class='add'>+				next_ = buff_-&gt;next;</div><div class='add'>+				buff_ = &amp;rx_ring-&gt;buff_ring[next_];</div><div class='add'>+				is_rsc_completed =</div><div class='add'>+					aq_ring_dx_in_range(rx_ring-&gt;sw_head,</div><div class='add'>+							    next_,</div><div class='add'>+							    rx_ring-&gt;hw_head);</div><div class='add'>+</div><div class='add'>+				if (unlikely(!is_rsc_completed))</div><div class='add'>+					break;</div><div class='add'>+</div><div class='add'>+				buff-&gt;is_error |= buff_-&gt;is_error;</div><div class='add'>+				buff-&gt;is_cso_err |= buff_-&gt;is_cso_err;</div><div class='add'>+			} while (!buff_-&gt;is_eop);</div><div class='add'>+</div><div class='add'>+			if (!is_rsc_completed) {</div><div class='add'>+				err = 0;</div><div class='add'>+				goto err_exit;</div><div class='add'>+			}</div><div class='add'>+			if (buff-&gt;is_error ||</div><div class='add'>+			    (buff-&gt;is_lro &amp;&amp; buff-&gt;is_cso_err)) {</div><div class='add'>+				buff_ = buff;</div><div class='add'>+				do {</div><div class='add'>+					if (buff_-&gt;next &gt;= rx_ring-&gt;size) {</div><div class='add'>+						err = -EIO;</div><div class='add'>+						goto err_exit;</div><div class='add'>+					}</div><div class='add'>+					next_ = buff_-&gt;next;</div><div class='add'>+					buff_ = &amp;rx_ring-&gt;buff_ring[next_];</div><div class='add'>+</div><div class='add'>+					buff_-&gt;is_cleaned = true;</div><div class='add'>+				} while (!buff_-&gt;is_eop);</div><div class='add'>+</div><div class='add'>+				u64_stats_update_begin(&amp;rx_ring-&gt;stats.rx.syncp);</div><div class='add'>+				++rx_ring-&gt;stats.rx.errors;</div><div class='add'>+				u64_stats_update_end(&amp;rx_ring-&gt;stats.rx.syncp);</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (buff-&gt;is_error) {</div><div class='add'>+			u64_stats_update_begin(&amp;rx_ring-&gt;stats.rx.syncp);</div><div class='add'>+			++rx_ring-&gt;stats.rx.errors;</div><div class='add'>+			u64_stats_update_end(&amp;rx_ring-&gt;stats.rx.syncp);</div><div class='add'>+			continue;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		dma_sync_single_range_for_cpu(dev,</div><div class='add'>+					      buff-&gt;rxdata.daddr,</div><div class='add'>+					      buff-&gt;rxdata.pg_off,</div><div class='add'>+					      buff-&gt;len, DMA_FROM_DEVICE);</div><div class='add'>+		hard_start = page_address(buff-&gt;rxdata.page) +</div><div class='add'>+			     buff-&gt;rxdata.pg_off - rx_ring-&gt;page_offset;</div><div class='add'>+</div><div class='add'>+		if (is_ptp_ring) {</div><div class='add'>+			ptp_hwtstamp_len = aq_ptp_extract_ts(rx_ring-&gt;aq_nic, &amp;shhwtstamps,</div><div class='add'>+							     aq_buf_vaddr(&amp;buff-&gt;rxdata),</div><div class='add'>+							     buff-&gt;len);</div><div class='add'>+			buff-&gt;len -= ptp_hwtstamp_len;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		xdp_init_buff(&amp;xdp, frame_sz, &amp;rx_ring-&gt;xdp_rxq);</div><div class='add'>+		xdp_prepare_buff(&amp;xdp, hard_start, rx_ring-&gt;page_offset,</div><div class='add'>+				 buff-&gt;len, false);</div><div class='add'>+		if (!buff-&gt;is_eop) {</div><div class='add'>+			if (aq_add_rx_fragment(dev, rx_ring, buff, &amp;xdp)) {</div><div class='add'>+				u64_stats_update_begin(&amp;rx_ring-&gt;stats.rx.syncp);</div><div class='add'>+				++rx_ring-&gt;stats.rx.packets;</div><div class='add'>+				rx_ring-&gt;stats.rx.bytes += xdp_get_buff_len(&amp;xdp);</div><div class='add'>+				++rx_ring-&gt;stats.rx.xdp_aborted;</div><div class='add'>+				u64_stats_update_end(&amp;rx_ring-&gt;stats.rx.syncp);</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		skb = aq_xdp_run_prog(aq_nic, &amp;xdp, rx_ring, buff);</div><div class='add'>+		if (IS_ERR(skb) || !skb)</div><div class='add'>+			continue;</div><div class='add'>+</div><div class='add'>+		if (ptp_hwtstamp_len &gt; 0)</div><div class='add'>+			*skb_hwtstamps(skb) = shhwtstamps;</div><div class='add'>+</div><div class='add'>+		if (buff-&gt;is_vlan)</div><div class='add'>+			__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),</div><div class='add'>+					       buff-&gt;vlan_rx_tag);</div><div class='add'>+</div><div class='add'>+		aq_rx_checksum(rx_ring, buff, skb);</div><div class='add'>+</div><div class='add'>+		skb_set_hash(skb, buff-&gt;rss_hash,</div><div class='add'>+			     buff-&gt;is_hash_l4 ? PKT_HASH_TYPE_L4 :</div><div class='add'>+			     PKT_HASH_TYPE_NONE);</div><div class='add'>+		/* Send all PTP traffic to 0 queue */</div><div class='add'>+		skb_record_rx_queue(skb,</div><div class='add'>+				    is_ptp_ring ? 0</div><div class='add'>+						: AQ_NIC_RING2QMAP(rx_ring-&gt;aq_nic,</div><div class='add'>+								   rx_ring-&gt;idx));</div><div class='add'>+</div><div class='add'>+		napi_gro_receive(napi, skb);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_ring_rx_clean(struct aq_ring_s *self,</div><div class='add'>+		     struct napi_struct *napi,</div><div class='add'>+		     int *work_done,</div><div class='add'>+		     int budget)</div><div class='add'>+{</div><div class='add'>+	if (static_branch_unlikely(&amp;aq_xdp_locking_key))</div><div class='add'>+		return __aq_ring_xdp_clean(self, napi, work_done, budget);</div><div class='add'>+	else</div><div class='add'>+		return __aq_ring_rx_clean(self, napi, work_done, budget);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void aq_ring_hwts_rx_clean(struct aq_ring_s *self, struct aq_nic_s *aq_nic)</div><div class='add'>+{</div><div class='add'>+#if IS_REACHABLE(CONFIG_PTP_1588_CLOCK)</div><div class='add'>+	while (self-&gt;sw_head != self-&gt;hw_head) {</div><div class='add'>+		u64 ns;</div><div class='add'>+</div><div class='add'>+		aq_nic-&gt;aq_hw_ops-&gt;extract_hwts(aq_nic-&gt;aq_hw,</div><div class='add'>+						self-&gt;dx_ring +</div><div class='add'>+						(self-&gt;sw_head * self-&gt;dx_size),</div><div class='add'>+						self-&gt;dx_size, &amp;ns);</div><div class='add'>+		aq_ptp_tx_hwtstamp(aq_nic, ns);</div><div class='add'>+</div><div class='add'>+		self-&gt;sw_head = aq_ring_next_dx(self, self-&gt;sw_head);</div><div class='add'>+	}</div><div class='add'>+#endif</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_ring_rx_fill(struct aq_ring_s *self)</div><div class='add'>+{</div><div class='add'>+	struct aq_ring_buff_s *buff = NULL;</div><div class='add'>+	int err = 0;</div><div class='add'>+	int i = 0;</div><div class='add'>+</div><div class='add'>+	if (aq_ring_avail_dx(self) &lt; min_t(unsigned int, AQ_CFG_RX_REFILL_THRES,</div><div class='add'>+					   self-&gt;size / 2))</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	for (i = aq_ring_avail_dx(self); i--;</div><div class='add'>+		self-&gt;sw_tail = aq_ring_next_dx(self, self-&gt;sw_tail)) {</div><div class='add'>+		buff = &amp;self-&gt;buff_ring[self-&gt;sw_tail];</div><div class='add'>+</div><div class='add'>+		buff-&gt;flags = 0U;</div><div class='add'>+		buff-&gt;len = self-&gt;frame_max;</div><div class='add'>+</div><div class='add'>+		err = aq_get_rxpages(self, buff);</div><div class='add'>+		if (err)</div><div class='add'>+			goto err_exit;</div><div class='add'>+</div><div class='add'>+		buff-&gt;pa = aq_buf_daddr(&amp;buff-&gt;rxdata);</div><div class='add'>+		buff = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void aq_ring_rx_deinit(struct aq_ring_s *self)</div><div class='add'>+{</div><div class='add'>+	if (!self)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	for (; self-&gt;sw_head != self-&gt;sw_tail;</div><div class='add'>+		self-&gt;sw_head = aq_ring_next_dx(self, self-&gt;sw_head)) {</div><div class='add'>+		struct aq_ring_buff_s *buff = &amp;self-&gt;buff_ring[self-&gt;sw_head];</div><div class='add'>+</div><div class='add'>+		aq_free_rxpage(&amp;buff-&gt;rxdata, aq_nic_get_dev(self-&gt;aq_nic));</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void aq_ring_free(struct aq_ring_s *self)</div><div class='add'>+{</div><div class='add'>+	if (!self)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	kfree(self-&gt;buff_ring);</div><div class='add'>+	self-&gt;buff_ring = NULL;</div><div class='add'>+</div><div class='add'>+	if (self-&gt;dx_ring) {</div><div class='add'>+		dma_free_coherent(aq_nic_get_dev(self-&gt;aq_nic),</div><div class='add'>+				  self-&gt;size * self-&gt;dx_size, self-&gt;dx_ring,</div><div class='add'>+				  self-&gt;dx_ring_pa);</div><div class='add'>+		self-&gt;dx_ring = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void aq_ring_hwts_rx_free(struct aq_ring_s *self)</div><div class='add'>+{</div><div class='add'>+	if (!self)</div><div class='add'>+		return;</div><div class='add'>+</div><div class='add'>+	if (self-&gt;dx_ring) {</div><div class='add'>+		dma_free_coherent(aq_nic_get_dev(self-&gt;aq_nic),</div><div class='add'>+				  self-&gt;size * self-&gt;dx_size + AQ_CFG_RXDS_DEF,</div><div class='add'>+				  self-&gt;dx_ring, self-&gt;dx_ring_pa);</div><div class='add'>+		self-&gt;dx_ring = NULL;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+unsigned int aq_ring_fill_stats_data(struct aq_ring_s *self, u64 *data)</div><div class='add'>+{</div><div class='add'>+	unsigned int count;</div><div class='add'>+	unsigned int start;</div><div class='add'>+</div><div class='add'>+	if (self-&gt;ring_type == ATL_RING_RX) {</div><div class='add'>+		/* This data should mimic aq_ethtool_queue_rx_stat_names structure */</div><div class='add'>+		do {</div><div class='add'>+			count = 0;</div><div class='add'>+			start = u64_stats_fetch_begin(&amp;self-&gt;stats.rx.syncp);</div><div class='add'>+			data[count] = self-&gt;stats.rx.packets;</div><div class='add'>+			data[++count] = self-&gt;stats.rx.jumbo_packets;</div><div class='add'>+			data[++count] = self-&gt;stats.rx.lro_packets;</div><div class='add'>+			data[++count] = self-&gt;stats.rx.errors;</div><div class='add'>+			data[++count] = self-&gt;stats.rx.alloc_fails;</div><div class='add'>+			data[++count] = self-&gt;stats.rx.skb_alloc_fails;</div><div class='add'>+			data[++count] = self-&gt;stats.rx.polls;</div><div class='add'>+			data[++count] = self-&gt;stats.rx.pg_flips;</div><div class='add'>+			data[++count] = self-&gt;stats.rx.pg_reuses;</div><div class='add'>+			data[++count] = self-&gt;stats.rx.pg_losts;</div><div class='add'>+			data[++count] = self-&gt;stats.rx.xdp_aborted;</div><div class='add'>+			data[++count] = self-&gt;stats.rx.xdp_drop;</div><div class='add'>+			data[++count] = self-&gt;stats.rx.xdp_pass;</div><div class='add'>+			data[++count] = self-&gt;stats.rx.xdp_tx;</div><div class='add'>+			data[++count] = self-&gt;stats.rx.xdp_invalid;</div><div class='add'>+			data[++count] = self-&gt;stats.rx.xdp_redirect;</div><div class='add'>+		} while (u64_stats_fetch_retry(&amp;self-&gt;stats.rx.syncp, start));</div><div class='add'>+	} else {</div><div class='add'>+		/* This data should mimic aq_ethtool_queue_tx_stat_names structure */</div><div class='add'>+		do {</div><div class='add'>+			count = 0;</div><div class='add'>+			start = u64_stats_fetch_begin(&amp;self-&gt;stats.tx.syncp);</div><div class='add'>+			data[count] = self-&gt;stats.tx.packets;</div><div class='add'>+			data[++count] = self-&gt;stats.tx.queue_restarts;</div><div class='add'>+		} while (u64_stats_fetch_retry(&amp;self-&gt;stats.tx.syncp, start));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ++count;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_ring.h b/drivers/net/ethernet/aquantia/atlantic/aq_ring.h<br/>new file mode 100644<br/>index 000000000000..d627ace850ff<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_ring.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_ring.h</a></div><div class='hunk'>@@ -0,0 +1,218 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2014-2019 aQuantia Corporation</div><div class='add'>+ * Copyright (C) 2019-2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* File aq_ring.h: Declaration of functions for Rx/Tx rings. */</div><div class='add'>+</div><div class='add'>+#ifndef AQ_RING_H</div><div class='add'>+#define AQ_RING_H</div><div class='add'>+</div><div class='add'>+#include "aq_common.h"</div><div class='add'>+#include "aq_vec.h"</div><div class='add'>+</div><div class='add'>+#define AQ_XDP_HEADROOM		ALIGN(max(NET_SKB_PAD, XDP_PACKET_HEADROOM), 8)</div><div class='add'>+#define AQ_XDP_TAILROOM		SKB_DATA_ALIGN(sizeof(struct skb_shared_info))</div><div class='add'>+</div><div class='add'>+struct page;</div><div class='add'>+struct aq_nic_cfg_s;</div><div class='add'>+</div><div class='add'>+struct aq_rxpage {</div><div class='add'>+	struct page *page;</div><div class='add'>+	dma_addr_t daddr;</div><div class='add'>+	unsigned int order;</div><div class='add'>+	unsigned int pg_off;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/*           TxC       SOP        DX         EOP</div><div class='add'>+ *         +----------+----------+----------+-----------</div><div class='add'>+ *   8bytes|len l3,l4 | pa       | pa       | pa</div><div class='add'>+ *         +----------+----------+----------+-----------</div><div class='add'>+ * 4/8bytes|len pkt   |len pkt   |          | skb</div><div class='add'>+ *         +----------+----------+----------+-----------</div><div class='add'>+ * 4/8bytes|is_gso    |len,flags |len       |len,is_eop</div><div class='add'>+ *         +----------+----------+----------+-----------</div><div class='add'>+ *</div><div class='add'>+ *  This aq_ring_buff_s doesn't have endianness dependency.</div><div class='add'>+ *  It is __packed for cache line optimizations.</div><div class='add'>+ */</div><div class='add'>+struct __packed aq_ring_buff_s {</div><div class='add'>+	union {</div><div class='add'>+		/* RX/TX */</div><div class='add'>+		dma_addr_t pa;</div><div class='add'>+		/* RX */</div><div class='add'>+		struct {</div><div class='add'>+			u32 rss_hash;</div><div class='add'>+			u16 next;</div><div class='add'>+			u8 is_hash_l4;</div><div class='add'>+			u8 rsvd1;</div><div class='add'>+			struct aq_rxpage rxdata;</div><div class='add'>+			u16 vlan_rx_tag;</div><div class='add'>+		};</div><div class='add'>+		/* EOP */</div><div class='add'>+		struct {</div><div class='add'>+			dma_addr_t pa_eop;</div><div class='add'>+			struct sk_buff *skb;</div><div class='add'>+			struct xdp_frame *xdpf;</div><div class='add'>+		};</div><div class='add'>+		/* TxC */</div><div class='add'>+		struct {</div><div class='add'>+			u32 mss;</div><div class='add'>+			u8 len_l2;</div><div class='add'>+			u8 len_l3;</div><div class='add'>+			u8 len_l4;</div><div class='add'>+			u8 is_ipv6:1;</div><div class='add'>+			u8 rsvd2:7;</div><div class='add'>+			u32 len_pkt;</div><div class='add'>+			u16 vlan_tx_tag;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+	union {</div><div class='add'>+		struct {</div><div class='add'>+			u32 len:16;</div><div class='add'>+			u32 is_ip_cso:1;</div><div class='add'>+			u32 is_udp_cso:1;</div><div class='add'>+			u32 is_tcp_cso:1;</div><div class='add'>+			u32 is_cso_err:1;</div><div class='add'>+			u32 is_sop:1;</div><div class='add'>+			u32 is_eop:1;</div><div class='add'>+			u32 is_gso_tcp:1;</div><div class='add'>+			u32 is_gso_udp:1;</div><div class='add'>+			u32 is_mapped:1;</div><div class='add'>+			u32 is_cleaned:1;</div><div class='add'>+			u32 is_error:1;</div><div class='add'>+			u32 is_vlan:1;</div><div class='add'>+			u32 is_lro:1;</div><div class='add'>+			u32 rsvd3:3;</div><div class='add'>+			u16 eop_index;</div><div class='add'>+			u16 rsvd4;</div><div class='add'>+		};</div><div class='add'>+		u64 flags;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct aq_ring_stats_rx_s {</div><div class='add'>+	struct u64_stats_sync syncp;	/* must be first */</div><div class='add'>+	u64 errors;</div><div class='add'>+	u64 packets;</div><div class='add'>+	u64 bytes;</div><div class='add'>+	u64 lro_packets;</div><div class='add'>+	u64 jumbo_packets;</div><div class='add'>+	u64 alloc_fails;</div><div class='add'>+	u64 skb_alloc_fails;</div><div class='add'>+	u64 polls;</div><div class='add'>+	u64 pg_losts;</div><div class='add'>+	u64 pg_flips;</div><div class='add'>+	u64 pg_reuses;</div><div class='add'>+	u64 xdp_aborted;</div><div class='add'>+	u64 xdp_drop;</div><div class='add'>+	u64 xdp_pass;</div><div class='add'>+	u64 xdp_tx;</div><div class='add'>+	u64 xdp_invalid;</div><div class='add'>+	u64 xdp_redirect;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct aq_ring_stats_tx_s {</div><div class='add'>+	struct u64_stats_sync syncp;	/* must be first */</div><div class='add'>+	u64 errors;</div><div class='add'>+	u64 packets;</div><div class='add'>+	u64 bytes;</div><div class='add'>+	u64 queue_restarts;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+union aq_ring_stats_s {</div><div class='add'>+	struct aq_ring_stats_rx_s rx;</div><div class='add'>+	struct aq_ring_stats_tx_s tx;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum atl_ring_type {</div><div class='add'>+	ATL_RING_TX,</div><div class='add'>+	ATL_RING_RX,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct aq_ring_s {</div><div class='add'>+	struct aq_ring_buff_s *buff_ring;</div><div class='add'>+	u8 *dx_ring;		/* descriptors ring, dma shared mem */</div><div class='add'>+	struct aq_nic_s *aq_nic;</div><div class='add'>+	unsigned int idx;	/* for HW layer registers operations */</div><div class='add'>+	unsigned int hw_head;</div><div class='add'>+	unsigned int sw_head;</div><div class='add'>+	unsigned int sw_tail;</div><div class='add'>+	unsigned int size;	/* descriptors number */</div><div class='add'>+	unsigned int dx_size;	/* TX or RX descriptor size,  */</div><div class='add'>+				/* stored here for fater math */</div><div class='add'>+	u16 page_order;</div><div class='add'>+	u16 page_offset;</div><div class='add'>+	u16 frame_max;</div><div class='add'>+	u16 tail_size;</div><div class='add'>+	union aq_ring_stats_s stats;</div><div class='add'>+	dma_addr_t dx_ring_pa;</div><div class='add'>+	struct bpf_prog *xdp_prog;</div><div class='add'>+	enum atl_ring_type ring_type;</div><div class='add'>+	struct xdp_rxq_info xdp_rxq;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct aq_ring_param_s {</div><div class='add'>+	unsigned int vec_idx;</div><div class='add'>+	unsigned int cpu;</div><div class='add'>+	cpumask_t affinity_mask;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static inline void *aq_buf_vaddr(struct aq_rxpage *rxpage)</div><div class='add'>+{</div><div class='add'>+	return page_to_virt(rxpage-&gt;page) + rxpage-&gt;pg_off;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline dma_addr_t aq_buf_daddr(struct aq_rxpage *rxpage)</div><div class='add'>+{</div><div class='add'>+	return rxpage-&gt;daddr + rxpage-&gt;pg_off;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int aq_ring_next_dx(struct aq_ring_s *self,</div><div class='add'>+					   unsigned int dx)</div><div class='add'>+{</div><div class='add'>+	return (++dx &gt;= self-&gt;size) ? 0U : dx;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline unsigned int aq_ring_avail_dx(struct aq_ring_s *self)</div><div class='add'>+{</div><div class='add'>+	return (((self-&gt;sw_tail &gt;= self-&gt;sw_head)) ?</div><div class='add'>+		(self-&gt;size - 1) - self-&gt;sw_tail + self-&gt;sw_head :</div><div class='add'>+		self-&gt;sw_head - self-&gt;sw_tail - 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_ring_tx_alloc(struct aq_ring_s *self,</div><div class='add'>+		     struct aq_nic_s *aq_nic,</div><div class='add'>+		     unsigned int idx,</div><div class='add'>+		     struct aq_nic_cfg_s *aq_nic_cfg);</div><div class='add'>+int aq_ring_rx_alloc(struct aq_ring_s *self,</div><div class='add'>+		     struct aq_nic_s *aq_nic,</div><div class='add'>+		     unsigned int idx,</div><div class='add'>+		     struct aq_nic_cfg_s *aq_nic_cfg);</div><div class='add'>+</div><div class='add'>+int aq_ring_init(struct aq_ring_s *self, const enum atl_ring_type ring_type);</div><div class='add'>+void aq_ring_rx_deinit(struct aq_ring_s *self);</div><div class='add'>+void aq_ring_free(struct aq_ring_s *self);</div><div class='add'>+void aq_ring_update_queue_state(struct aq_ring_s *ring);</div><div class='add'>+void aq_ring_queue_wake(struct aq_ring_s *ring);</div><div class='add'>+void aq_ring_queue_stop(struct aq_ring_s *ring);</div><div class='add'>+bool aq_ring_tx_clean(struct aq_ring_s *self);</div><div class='add'>+int aq_xdp_xmit(struct net_device *dev, int num_frames,</div><div class='add'>+		struct xdp_frame **frames, u32 flags);</div><div class='add'>+int aq_ring_rx_clean(struct aq_ring_s *self,</div><div class='add'>+		     struct napi_struct *napi,</div><div class='add'>+		     int *work_done,</div><div class='add'>+		     int budget);</div><div class='add'>+int aq_ring_rx_fill(struct aq_ring_s *self);</div><div class='add'>+</div><div class='add'>+int aq_ring_hwts_rx_alloc(struct aq_ring_s *self,</div><div class='add'>+			  struct aq_nic_s *aq_nic, unsigned int idx,</div><div class='add'>+			  unsigned int size, unsigned int dx_size);</div><div class='add'>+void aq_ring_hwts_rx_free(struct aq_ring_s *self);</div><div class='add'>+void aq_ring_hwts_rx_clean(struct aq_ring_s *self, struct aq_nic_s *aq_nic);</div><div class='add'>+</div><div class='add'>+unsigned int aq_ring_fill_stats_data(struct aq_ring_s *self, u64 *data);</div><div class='add'>+</div><div class='add'>+#endif /* AQ_RING_H */</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_rss.h b/drivers/net/ethernet/aquantia/atlantic/aq_rss.h<br/>new file mode 100644<br/>index 000000000000..39b1f43c8ad7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_rss.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_rss.h</a></div><div class='hunk'>@@ -0,0 +1,23 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*</div><div class='add'>+ * aQuantia Corporation Network Driver</div><div class='add'>+ * Copyright (C) 2014-2017 aQuantia Corporation. All rights reserved</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* File aq_rss.h: Receive Side Scaling definitions. */</div><div class='add'>+</div><div class='add'>+#ifndef AQ_RSS_H</div><div class='add'>+#define AQ_RSS_H</div><div class='add'>+</div><div class='add'>+#include "aq_common.h"</div><div class='add'>+#include "aq_cfg.h"</div><div class='add'>+</div><div class='add'>+struct aq_rss_parameters {</div><div class='add'>+	u16 base_cpu_number;</div><div class='add'>+	u16 indirection_table_size;</div><div class='add'>+	u16 hash_secret_key_size;</div><div class='add'>+	u32 hash_secret_key[AQ_CFG_RSS_HASHKEY_SIZE / sizeof(u32)];</div><div class='add'>+	u8 indirection_table[AQ_CFG_RSS_INDIRECTION_TABLE_MAX];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif /* AQ_RSS_H */</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_utils.h b/drivers/net/ethernet/aquantia/atlantic/aq_utils.h<br/>new file mode 100644<br/>index 000000000000..d3a0b2ec0279<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_utils.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_utils.h</a></div><div class='hunk'>@@ -0,0 +1,39 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*</div><div class='add'>+ * aQuantia Corporation Network Driver</div><div class='add'>+ * Copyright (C) 2014-2017 aQuantia Corporation. All rights reserved</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* File aq_utils.h: Useful macro and structures used in all layers of driver. */</div><div class='add'>+</div><div class='add'>+#ifndef AQ_UTILS_H</div><div class='add'>+#define AQ_UTILS_H</div><div class='add'>+</div><div class='add'>+#include "aq_common.h"</div><div class='add'>+</div><div class='add'>+static inline void aq_utils_obj_set(atomic_t *flags, u32 mask)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags_old, flags_new;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		flags_old = atomic_read(flags);</div><div class='add'>+		flags_new = flags_old | (mask);</div><div class='add'>+	} while (atomic_cmpxchg(flags, flags_old, flags_new) != flags_old);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline void aq_utils_obj_clear(atomic_t *flags, u32 mask)</div><div class='add'>+{</div><div class='add'>+	unsigned long flags_old, flags_new;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		flags_old = atomic_read(flags);</div><div class='add'>+		flags_new = flags_old &amp; ~(mask);</div><div class='add'>+	} while (atomic_cmpxchg(flags, flags_old, flags_new) != flags_old);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static inline bool aq_utils_obj_test(atomic_t *flags, u32 mask)</div><div class='add'>+{</div><div class='add'>+	return atomic_read(flags) &amp; mask;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#endif /* AQ_UTILS_H */</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_vec.c b/drivers/net/ethernet/aquantia/atlantic/aq_vec.c<br/>new file mode 100644<br/>index 000000000000..9769ab4f9bef<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_vec.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_vec.c</a></div><div class='hunk'>@@ -0,0 +1,379 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2014-2019 aQuantia Corporation</div><div class='add'>+ * Copyright (C) 2019-2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* File aq_vec.c: Definition of common structure for vector of Rx and Tx rings.</div><div class='add'>+ * Definition of functions for Rx and Tx rings. Friendly module for aq_nic.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "aq_vec.h"</div><div class='add'>+</div><div class='add'>+struct aq_vec_s {</div><div class='add'>+	const struct aq_hw_ops *aq_hw_ops;</div><div class='add'>+	struct aq_hw_s *aq_hw;</div><div class='add'>+	struct aq_nic_s *aq_nic;</div><div class='add'>+	unsigned int tx_rings;</div><div class='add'>+	unsigned int rx_rings;</div><div class='add'>+	struct aq_ring_param_s aq_ring_param;</div><div class='add'>+	struct napi_struct napi;</div><div class='add'>+	struct aq_ring_s ring[AQ_CFG_TCS_MAX][2];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define AQ_VEC_TX_ID 0</div><div class='add'>+#define AQ_VEC_RX_ID 1</div><div class='add'>+</div><div class='add'>+static int aq_vec_poll(struct napi_struct *napi, int budget)</div><div class='add'>+{</div><div class='add'>+	struct aq_vec_s *self = container_of(napi, struct aq_vec_s, napi);</div><div class='add'>+	unsigned int sw_tail_old = 0U;</div><div class='add'>+	struct aq_ring_s *ring = NULL;</div><div class='add'>+	bool was_tx_cleaned = true;</div><div class='add'>+	unsigned int i = 0U;</div><div class='add'>+	int work_done = 0;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (!self) {</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+	} else {</div><div class='add'>+		for (i = 0U; self-&gt;tx_rings &gt; i; ++i) {</div><div class='add'>+			ring = self-&gt;ring[i];</div><div class='add'>+			u64_stats_update_begin(&amp;ring[AQ_VEC_RX_ID].stats.rx.syncp);</div><div class='add'>+			ring[AQ_VEC_RX_ID].stats.rx.polls++;</div><div class='add'>+			u64_stats_update_end(&amp;ring[AQ_VEC_RX_ID].stats.rx.syncp);</div><div class='add'>+			if (self-&gt;aq_hw_ops-&gt;hw_ring_tx_head_update) {</div><div class='add'>+				err = self-&gt;aq_hw_ops-&gt;hw_ring_tx_head_update(</div><div class='add'>+							self-&gt;aq_hw,</div><div class='add'>+							&amp;ring[AQ_VEC_TX_ID]);</div><div class='add'>+				if (err &lt; 0)</div><div class='add'>+					goto err_exit;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (ring[AQ_VEC_TX_ID].sw_head !=</div><div class='add'>+			    ring[AQ_VEC_TX_ID].hw_head) {</div><div class='add'>+				was_tx_cleaned = aq_ring_tx_clean(&amp;ring[AQ_VEC_TX_ID]);</div><div class='add'>+				aq_ring_update_queue_state(&amp;ring[AQ_VEC_TX_ID]);</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			err = self-&gt;aq_hw_ops-&gt;hw_ring_rx_receive(self-&gt;aq_hw,</div><div class='add'>+					    &amp;ring[AQ_VEC_RX_ID]);</div><div class='add'>+			if (err &lt; 0)</div><div class='add'>+				goto err_exit;</div><div class='add'>+</div><div class='add'>+			if (ring[AQ_VEC_RX_ID].sw_head !=</div><div class='add'>+				ring[AQ_VEC_RX_ID].hw_head) {</div><div class='add'>+				err = aq_ring_rx_clean(&amp;ring[AQ_VEC_RX_ID],</div><div class='add'>+						       napi,</div><div class='add'>+						       &amp;work_done,</div><div class='add'>+						       budget - work_done);</div><div class='add'>+				if (err &lt; 0)</div><div class='add'>+					goto err_exit;</div><div class='add'>+</div><div class='add'>+				sw_tail_old = ring[AQ_VEC_RX_ID].sw_tail;</div><div class='add'>+</div><div class='add'>+				err = aq_ring_rx_fill(&amp;ring[AQ_VEC_RX_ID]);</div><div class='add'>+				if (err &lt; 0)</div><div class='add'>+					goto err_exit;</div><div class='add'>+</div><div class='add'>+				err = self-&gt;aq_hw_ops-&gt;hw_ring_rx_fill(</div><div class='add'>+					self-&gt;aq_hw,</div><div class='add'>+					&amp;ring[AQ_VEC_RX_ID], sw_tail_old);</div><div class='add'>+				if (err &lt; 0)</div><div class='add'>+					goto err_exit;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+		if (!was_tx_cleaned)</div><div class='add'>+			work_done = budget;</div><div class='add'>+</div><div class='add'>+		if (work_done &lt; budget) {</div><div class='add'>+			napi_complete_done(napi, work_done);</div><div class='add'>+			self-&gt;aq_hw_ops-&gt;hw_irq_enable(self-&gt;aq_hw,</div><div class='add'>+					1U &lt;&lt; self-&gt;aq_ring_param.vec_idx);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return work_done;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct aq_vec_s *aq_vec_alloc(struct aq_nic_s *aq_nic, unsigned int idx,</div><div class='add'>+			      struct aq_nic_cfg_s *aq_nic_cfg)</div><div class='add'>+{</div><div class='add'>+	struct aq_vec_s *self = NULL;</div><div class='add'>+</div><div class='add'>+	self = kzalloc(sizeof(*self), GFP_KERNEL);</div><div class='add'>+	if (!self)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	self-&gt;aq_nic = aq_nic;</div><div class='add'>+	self-&gt;aq_ring_param.vec_idx = idx;</div><div class='add'>+	self-&gt;aq_ring_param.cpu =</div><div class='add'>+		idx + aq_nic_cfg-&gt;aq_rss.base_cpu_number;</div><div class='add'>+</div><div class='add'>+	cpumask_set_cpu(self-&gt;aq_ring_param.cpu,</div><div class='add'>+			&amp;self-&gt;aq_ring_param.affinity_mask);</div><div class='add'>+</div><div class='add'>+	self-&gt;tx_rings = 0;</div><div class='add'>+	self-&gt;rx_rings = 0;</div><div class='add'>+</div><div class='add'>+	netif_napi_add(aq_nic_get_ndev(aq_nic), &amp;self-&gt;napi, aq_vec_poll);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return self;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_vec_ring_alloc(struct aq_vec_s *self, struct aq_nic_s *aq_nic,</div><div class='add'>+		      unsigned int idx, struct aq_nic_cfg_s *aq_nic_cfg)</div><div class='add'>+{</div><div class='add'>+	struct aq_ring_s *ring = NULL;</div><div class='add'>+	unsigned int i = 0U;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; aq_nic_cfg-&gt;tcs; ++i) {</div><div class='add'>+		const unsigned int idx_ring = AQ_NIC_CFG_TCVEC2RING(aq_nic_cfg,</div><div class='add'>+								    i, idx);</div><div class='add'>+</div><div class='add'>+		ring = &amp;self-&gt;ring[i][AQ_VEC_TX_ID];</div><div class='add'>+		err = aq_ring_tx_alloc(ring, aq_nic, idx_ring, aq_nic_cfg);</div><div class='add'>+		if (err)</div><div class='add'>+			goto err_exit;</div><div class='add'>+</div><div class='add'>+		++self-&gt;tx_rings;</div><div class='add'>+</div><div class='add'>+		aq_nic_set_tx_ring(aq_nic, idx_ring, ring);</div><div class='add'>+</div><div class='add'>+		ring = &amp;self-&gt;ring[i][AQ_VEC_RX_ID];</div><div class='add'>+		if (xdp_rxq_info_reg(&amp;ring-&gt;xdp_rxq,</div><div class='add'>+				     aq_nic-&gt;ndev, idx,</div><div class='add'>+				     self-&gt;napi.napi_id) &lt; 0) {</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto err_exit;</div><div class='add'>+		}</div><div class='add'>+		if (xdp_rxq_info_reg_mem_model(&amp;ring-&gt;xdp_rxq,</div><div class='add'>+					       MEM_TYPE_PAGE_SHARED, NULL) &lt; 0) {</div><div class='add'>+			xdp_rxq_info_unreg(&amp;ring-&gt;xdp_rxq);</div><div class='add'>+			err = -ENOMEM;</div><div class='add'>+			goto err_exit;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = aq_ring_rx_alloc(ring, aq_nic, idx_ring, aq_nic_cfg);</div><div class='add'>+		if (err) {</div><div class='add'>+			xdp_rxq_info_unreg(&amp;ring-&gt;xdp_rxq);</div><div class='add'>+			goto err_exit;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		++self-&gt;rx_rings;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	if (err &lt; 0) {</div><div class='add'>+		aq_vec_ring_free(self);</div><div class='add'>+		self = NULL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_vec_init(struct aq_vec_s *self, const struct aq_hw_ops *aq_hw_ops,</div><div class='add'>+		struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	struct aq_ring_s *ring = NULL;</div><div class='add'>+	unsigned int i = 0U;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	self-&gt;aq_hw_ops = aq_hw_ops;</div><div class='add'>+	self-&gt;aq_hw = aq_hw;</div><div class='add'>+</div><div class='add'>+	for (i = 0U; self-&gt;tx_rings &gt; i; ++i) {</div><div class='add'>+		ring = self-&gt;ring[i];</div><div class='add'>+		err = aq_ring_init(&amp;ring[AQ_VEC_TX_ID], ATL_RING_TX);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			goto err_exit;</div><div class='add'>+</div><div class='add'>+		err = self-&gt;aq_hw_ops-&gt;hw_ring_tx_init(self-&gt;aq_hw,</div><div class='add'>+						       &amp;ring[AQ_VEC_TX_ID],</div><div class='add'>+						       &amp;self-&gt;aq_ring_param);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			goto err_exit;</div><div class='add'>+</div><div class='add'>+		err = aq_ring_init(&amp;ring[AQ_VEC_RX_ID], ATL_RING_RX);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			goto err_exit;</div><div class='add'>+</div><div class='add'>+		err = self-&gt;aq_hw_ops-&gt;hw_ring_rx_init(self-&gt;aq_hw,</div><div class='add'>+						       &amp;ring[AQ_VEC_RX_ID],</div><div class='add'>+						       &amp;self-&gt;aq_ring_param);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			goto err_exit;</div><div class='add'>+</div><div class='add'>+		err = aq_ring_rx_fill(&amp;ring[AQ_VEC_RX_ID]);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			goto err_exit;</div><div class='add'>+</div><div class='add'>+		err = self-&gt;aq_hw_ops-&gt;hw_ring_rx_fill(self-&gt;aq_hw,</div><div class='add'>+						       &amp;ring[AQ_VEC_RX_ID], 0U);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int aq_vec_start(struct aq_vec_s *self)</div><div class='add'>+{</div><div class='add'>+	struct aq_ring_s *ring = NULL;</div><div class='add'>+	unsigned int i = 0U;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	for (i = 0U; self-&gt;tx_rings &gt; i; ++i) {</div><div class='add'>+		ring = self-&gt;ring[i];</div><div class='add'>+		err = self-&gt;aq_hw_ops-&gt;hw_ring_tx_start(self-&gt;aq_hw,</div><div class='add'>+							&amp;ring[AQ_VEC_TX_ID]);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			goto err_exit;</div><div class='add'>+</div><div class='add'>+		err = self-&gt;aq_hw_ops-&gt;hw_ring_rx_start(self-&gt;aq_hw,</div><div class='add'>+							&amp;ring[AQ_VEC_RX_ID]);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	napi_enable(&amp;self-&gt;napi);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void aq_vec_stop(struct aq_vec_s *self)</div><div class='add'>+{</div><div class='add'>+	struct aq_ring_s *ring = NULL;</div><div class='add'>+	unsigned int i = 0U;</div><div class='add'>+</div><div class='add'>+	for (i = 0U; self-&gt;tx_rings &gt; i; ++i) {</div><div class='add'>+		ring = self-&gt;ring[i];</div><div class='add'>+		self-&gt;aq_hw_ops-&gt;hw_ring_tx_stop(self-&gt;aq_hw,</div><div class='add'>+						 &amp;ring[AQ_VEC_TX_ID]);</div><div class='add'>+</div><div class='add'>+		self-&gt;aq_hw_ops-&gt;hw_ring_rx_stop(self-&gt;aq_hw,</div><div class='add'>+						 &amp;ring[AQ_VEC_RX_ID]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	napi_disable(&amp;self-&gt;napi);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void aq_vec_deinit(struct aq_vec_s *self)</div><div class='add'>+{</div><div class='add'>+	struct aq_ring_s *ring = NULL;</div><div class='add'>+	unsigned int i = 0U;</div><div class='add'>+</div><div class='add'>+	if (!self)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	for (i = 0U; self-&gt;tx_rings &gt; i; ++i) {</div><div class='add'>+		ring = self-&gt;ring[i];</div><div class='add'>+		aq_ring_tx_clean(&amp;ring[AQ_VEC_TX_ID]);</div><div class='add'>+		aq_ring_rx_deinit(&amp;ring[AQ_VEC_RX_ID]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+err_exit:;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void aq_vec_free(struct aq_vec_s *self)</div><div class='add'>+{</div><div class='add'>+	if (!self)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	netif_napi_del(&amp;self-&gt;napi);</div><div class='add'>+</div><div class='add'>+	kfree(self);</div><div class='add'>+</div><div class='add'>+err_exit:;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void aq_vec_ring_free(struct aq_vec_s *self)</div><div class='add'>+{</div><div class='add'>+	struct aq_ring_s *ring = NULL;</div><div class='add'>+	unsigned int i = 0U;</div><div class='add'>+</div><div class='add'>+	if (!self)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	for (i = 0U; self-&gt;tx_rings &gt; i; ++i) {</div><div class='add'>+		ring = self-&gt;ring[i];</div><div class='add'>+		aq_ring_free(&amp;ring[AQ_VEC_TX_ID]);</div><div class='add'>+		if (i &lt; self-&gt;rx_rings) {</div><div class='add'>+			xdp_rxq_info_unreg(&amp;ring[AQ_VEC_RX_ID].xdp_rxq);</div><div class='add'>+			aq_ring_free(&amp;ring[AQ_VEC_RX_ID]);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	self-&gt;tx_rings = 0;</div><div class='add'>+	self-&gt;rx_rings = 0;</div><div class='add'>+err_exit:;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+irqreturn_t aq_vec_isr(int irq, void *private)</div><div class='add'>+{</div><div class='add'>+	struct aq_vec_s *self = private;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (!self) {</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto err_exit;</div><div class='add'>+	}</div><div class='add'>+	napi_schedule(&amp;self-&gt;napi);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err &gt;= 0 ? IRQ_HANDLED : IRQ_NONE;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+irqreturn_t aq_vec_isr_legacy(int irq, void *private)</div><div class='add'>+{</div><div class='add'>+	struct aq_vec_s *self = private;</div><div class='add'>+	u64 irq_mask = 0U;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!self)</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+	err = self-&gt;aq_hw_ops-&gt;hw_irq_read(self-&gt;aq_hw, &amp;irq_mask);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+</div><div class='add'>+	if (irq_mask) {</div><div class='add'>+		self-&gt;aq_hw_ops-&gt;hw_irq_disable(self-&gt;aq_hw,</div><div class='add'>+			      1U &lt;&lt; self-&gt;aq_ring_param.vec_idx);</div><div class='add'>+		napi_schedule(&amp;self-&gt;napi);</div><div class='add'>+	} else {</div><div class='add'>+		self-&gt;aq_hw_ops-&gt;hw_irq_enable(self-&gt;aq_hw, 1U);</div><div class='add'>+		return IRQ_NONE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return IRQ_HANDLED;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+cpumask_t *aq_vec_get_affinity_mask(struct aq_vec_s *self)</div><div class='add'>+{</div><div class='add'>+	return &amp;self-&gt;aq_ring_param.affinity_mask;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool aq_vec_is_valid_tc(struct aq_vec_s *self, const unsigned int tc)</div><div class='add'>+{</div><div class='add'>+	return tc &lt; self-&gt;rx_rings &amp;&amp; tc &lt; self-&gt;tx_rings;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+unsigned int aq_vec_get_sw_stats(struct aq_vec_s *self, const unsigned int tc, u64 *data)</div><div class='add'>+{</div><div class='add'>+	unsigned int count;</div><div class='add'>+</div><div class='add'>+	if (!aq_vec_is_valid_tc(self, tc))</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	count = aq_ring_fill_stats_data(&amp;self-&gt;ring[tc][AQ_VEC_RX_ID], data);</div><div class='add'>+	count += aq_ring_fill_stats_data(&amp;self-&gt;ring[tc][AQ_VEC_TX_ID], data + count);</div><div class='add'>+</div><div class='add'>+	return count;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_vec.h b/drivers/net/ethernet/aquantia/atlantic/aq_vec.h<br/>new file mode 100644<br/>index 000000000000..78fac609b71d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/aq_vec.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/aq_vec.h</a></div><div class='hunk'>@@ -0,0 +1,48 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2014-2019 aQuantia Corporation</div><div class='add'>+ * Copyright (C) 2019-2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* File aq_vec.h: Definition of common structures for vector of Rx and Tx rings.</div><div class='add'>+ * Declaration of functions for Rx and Tx rings.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef AQ_VEC_H</div><div class='add'>+#define AQ_VEC_H</div><div class='add'>+</div><div class='add'>+#include "aq_common.h"</div><div class='add'>+#include "aq_nic.h"</div><div class='add'>+#include "aq_ring.h"</div><div class='add'>+#include "aq_hw.h"</div><div class='add'>+</div><div class='add'>+#include &lt;linux/irqreturn.h&gt;</div><div class='add'>+#include &lt;linux/filter.h&gt;</div><div class='add'>+#include &lt;linux/netdevice.h&gt;</div><div class='add'>+</div><div class='add'>+struct aq_hw_s;</div><div class='add'>+struct aq_hw_ops;</div><div class='add'>+struct aq_nic_s;</div><div class='add'>+struct aq_nic_cfg_s;</div><div class='add'>+struct aq_ring_stats_rx_s;</div><div class='add'>+struct aq_ring_stats_tx_s;</div><div class='add'>+</div><div class='add'>+irqreturn_t aq_vec_isr(int irq, void *private);</div><div class='add'>+irqreturn_t aq_vec_isr_legacy(int irq, void *private);</div><div class='add'>+struct aq_vec_s *aq_vec_alloc(struct aq_nic_s *aq_nic, unsigned int idx,</div><div class='add'>+			      struct aq_nic_cfg_s *aq_nic_cfg);</div><div class='add'>+int aq_vec_ring_alloc(struct aq_vec_s *self, struct aq_nic_s *aq_nic,</div><div class='add'>+		      unsigned int idx, struct aq_nic_cfg_s *aq_nic_cfg);</div><div class='add'>+int aq_vec_init(struct aq_vec_s *self, const struct aq_hw_ops *aq_hw_ops,</div><div class='add'>+		struct aq_hw_s *aq_hw);</div><div class='add'>+void aq_vec_deinit(struct aq_vec_s *self);</div><div class='add'>+void aq_vec_free(struct aq_vec_s *self);</div><div class='add'>+void aq_vec_ring_free(struct aq_vec_s *self);</div><div class='add'>+int aq_vec_start(struct aq_vec_s *self);</div><div class='add'>+void aq_vec_stop(struct aq_vec_s *self);</div><div class='add'>+cpumask_t *aq_vec_get_affinity_mask(struct aq_vec_s *self);</div><div class='add'>+bool aq_vec_is_valid_tc(struct aq_vec_s *self, const unsigned int tc);</div><div class='add'>+unsigned int aq_vec_get_sw_stats(struct aq_vec_s *self, const unsigned int tc, u64 *data);</div><div class='add'>+</div><div class='add'>+#endif /* AQ_VEC_H */</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_a0.c b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_a0.c<br/>new file mode 100644<br/>index 000000000000..8de2cdd09213<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_a0.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_a0.c</a></div><div class='hunk'>@@ -0,0 +1,981 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2014-2019 aQuantia Corporation</div><div class='add'>+ * Copyright (C) 2019-2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* File hw_atl_a0.c: Definition of Atlantic hardware specific functions. */</div><div class='add'>+</div><div class='add'>+#include "../aq_hw.h"</div><div class='add'>+#include "../aq_hw_utils.h"</div><div class='add'>+#include "../aq_ring.h"</div><div class='add'>+#include "../aq_nic.h"</div><div class='add'>+#include "hw_atl_a0.h"</div><div class='add'>+#include "hw_atl_utils.h"</div><div class='add'>+#include "hw_atl_llh.h"</div><div class='add'>+#include "hw_atl_a0_internal.h"</div><div class='add'>+</div><div class='add'>+#define DEFAULT_A0_BOARD_BASIC_CAPABILITIES	     \</div><div class='add'>+	.is_64_dma = true,			     \</div><div class='add'>+	.op64bit = false,			     \</div><div class='add'>+	.msix_irqs = 4U,			     \</div><div class='add'>+	.irq_mask = ~0U,			     \</div><div class='add'>+	.vecs = HW_ATL_A0_RSS_MAX,		     \</div><div class='add'>+	.tcs_max = HW_ATL_A0_TC_MAX,		     \</div><div class='add'>+	.rxd_alignment = 1U,			     \</div><div class='add'>+	.rxd_size = HW_ATL_A0_RXD_SIZE,		     \</div><div class='add'>+	.rxds_max = HW_ATL_A0_MAX_RXD,		     \</div><div class='add'>+	.rxds_min = HW_ATL_A0_MIN_RXD,		     \</div><div class='add'>+	.txd_alignment = 1U,			     \</div><div class='add'>+	.txd_size = HW_ATL_A0_TXD_SIZE,		     \</div><div class='add'>+	.txds_max = HW_ATL_A0_MAX_TXD,		     \</div><div class='add'>+	.txds_min = HW_ATL_A0_MIN_RXD,		     \</div><div class='add'>+	.txhwb_alignment = 4096U,		     \</div><div class='add'>+	.tx_rings = HW_ATL_A0_TX_RINGS,		     \</div><div class='add'>+	.rx_rings = HW_ATL_A0_RX_RINGS,		     \</div><div class='add'>+	.hw_features = NETIF_F_HW_CSUM |	     \</div><div class='add'>+			NETIF_F_RXHASH |	     \</div><div class='add'>+			NETIF_F_RXCSUM |	     \</div><div class='add'>+			NETIF_F_SG |		     \</div><div class='add'>+			NETIF_F_TSO |		     \</div><div class='add'>+			NETIF_F_NTUPLE |	     \</div><div class='add'>+			NETIF_F_HW_VLAN_CTAG_FILTER, \</div><div class='add'>+	.hw_priv_flags = IFF_UNICAST_FLT,	     \</div><div class='add'>+	.flow_control = true,			     \</div><div class='add'>+	.mtu = HW_ATL_A0_MTU_JUMBO,		     \</div><div class='add'>+	.mac_regs_count = 88,			     \</div><div class='add'>+	.hw_alive_check_addr = 0x10U</div><div class='add'>+</div><div class='add'>+const struct aq_hw_caps_s hw_atl_a0_caps_aqc100 = {</div><div class='add'>+	DEFAULT_A0_BOARD_BASIC_CAPABILITIES,</div><div class='add'>+	.media_type = AQ_HW_MEDIA_TYPE_FIBRE,</div><div class='add'>+	.link_speed_msk = AQ_NIC_RATE_5G |</div><div class='add'>+			  AQ_NIC_RATE_2G5 |</div><div class='add'>+			  AQ_NIC_RATE_1G |</div><div class='add'>+			  AQ_NIC_RATE_100M,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct aq_hw_caps_s hw_atl_a0_caps_aqc107 = {</div><div class='add'>+	DEFAULT_A0_BOARD_BASIC_CAPABILITIES,</div><div class='add'>+	.media_type = AQ_HW_MEDIA_TYPE_TP,</div><div class='add'>+	.link_speed_msk = AQ_NIC_RATE_10G |</div><div class='add'>+			  AQ_NIC_RATE_5G |</div><div class='add'>+			  AQ_NIC_RATE_2G5 |</div><div class='add'>+			  AQ_NIC_RATE_1G |</div><div class='add'>+			  AQ_NIC_RATE_100M,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct aq_hw_caps_s hw_atl_a0_caps_aqc108 = {</div><div class='add'>+	DEFAULT_A0_BOARD_BASIC_CAPABILITIES,</div><div class='add'>+	.media_type = AQ_HW_MEDIA_TYPE_TP,</div><div class='add'>+	.link_speed_msk = AQ_NIC_RATE_5G |</div><div class='add'>+			  AQ_NIC_RATE_2G5 |</div><div class='add'>+			  AQ_NIC_RATE_1G |</div><div class='add'>+			  AQ_NIC_RATE_100M,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct aq_hw_caps_s hw_atl_a0_caps_aqc109 = {</div><div class='add'>+	DEFAULT_A0_BOARD_BASIC_CAPABILITIES,</div><div class='add'>+	.media_type = AQ_HW_MEDIA_TYPE_TP,</div><div class='add'>+	.link_speed_msk = AQ_NIC_RATE_2G5 |</div><div class='add'>+			  AQ_NIC_RATE_1G |</div><div class='add'>+			  AQ_NIC_RATE_100M,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int hw_atl_a0_hw_reset(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	int err = 0;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	hw_atl_glb_glb_reg_res_dis_set(self, 1U);</div><div class='add'>+	hw_atl_pci_pci_reg_res_dis_set(self, 0U);</div><div class='add'>+	hw_atl_rx_rx_reg_res_dis_set(self, 0U);</div><div class='add'>+	hw_atl_tx_tx_reg_res_dis_set(self, 0U);</div><div class='add'>+</div><div class='add'>+	HW_ATL_FLUSH();</div><div class='add'>+	hw_atl_glb_soft_res_set(self, 1);</div><div class='add'>+</div><div class='add'>+	/* check 10 times by 1ms */</div><div class='add'>+	err = readx_poll_timeout_atomic(hw_atl_glb_soft_res_get,</div><div class='add'>+					self, val, val == 0,</div><div class='add'>+					1000U, 10000U);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	hw_atl_itr_irq_reg_res_dis_set(self, 0U);</div><div class='add'>+	hw_atl_itr_res_irq_set(self, 1U);</div><div class='add'>+</div><div class='add'>+	/* check 10 times by 1ms */</div><div class='add'>+	err = readx_poll_timeout_atomic(hw_atl_itr_res_irq_get,</div><div class='add'>+					self, val, val == 0,</div><div class='add'>+					1000U, 10000U);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	self-&gt;aq_fw_ops-&gt;set_state(self, MPI_RESET);</div><div class='add'>+</div><div class='add'>+	err = aq_hw_err_from_flags(self);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_a0_hw_qos_set(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	bool is_rx_flow_control = false;</div><div class='add'>+	unsigned int i_priority = 0U;</div><div class='add'>+	u32 buff_size = 0U;</div><div class='add'>+	u32 tc = 0U;</div><div class='add'>+</div><div class='add'>+	/* TPS Descriptor rate init */</div><div class='add'>+	hw_atl_tps_tx_pkt_shed_desc_rate_curr_time_res_set(self, 0x0U);</div><div class='add'>+	hw_atl_tps_tx_pkt_shed_desc_rate_lim_set(self, 0xA);</div><div class='add'>+</div><div class='add'>+	/* TPS VM init */</div><div class='add'>+	hw_atl_tps_tx_pkt_shed_desc_vm_arb_mode_set(self, 0U);</div><div class='add'>+</div><div class='add'>+	/* TPS TC credits init */</div><div class='add'>+	hw_atl_tps_tx_pkt_shed_desc_tc_arb_mode_set(self, 0U);</div><div class='add'>+	hw_atl_tps_tx_pkt_shed_data_arb_mode_set(self, 0U);</div><div class='add'>+</div><div class='add'>+	hw_atl_tps_tx_pkt_shed_tc_data_max_credit_set(self, 0U, 0xFFF);</div><div class='add'>+	hw_atl_tps_tx_pkt_shed_tc_data_weight_set(self, 0U, 0x64);</div><div class='add'>+	hw_atl_tps_tx_pkt_shed_desc_tc_max_credit_set(self, 0U, 0x50);</div><div class='add'>+	hw_atl_tps_tx_pkt_shed_desc_tc_weight_set(self, 0U, 0x1E);</div><div class='add'>+</div><div class='add'>+	/* Tx buf size */</div><div class='add'>+	buff_size = HW_ATL_A0_TXBUF_MAX;</div><div class='add'>+</div><div class='add'>+	hw_atl_tpb_tx_pkt_buff_size_per_tc_set(self, buff_size, tc);</div><div class='add'>+	hw_atl_tpb_tx_buff_hi_threshold_per_tc_set(self,</div><div class='add'>+						   (buff_size *</div><div class='add'>+						   (1024 / 32U) * 66U) /</div><div class='add'>+						   100U, tc);</div><div class='add'>+	hw_atl_tpb_tx_buff_lo_threshold_per_tc_set(self,</div><div class='add'>+						   (buff_size *</div><div class='add'>+						   (1024 / 32U) * 50U) /</div><div class='add'>+						   100U, tc);</div><div class='add'>+</div><div class='add'>+	/* QoS Rx buf size per TC */</div><div class='add'>+	tc = 0;</div><div class='add'>+	is_rx_flow_control = (AQ_NIC_FC_RX &amp; self-&gt;aq_nic_cfg-&gt;fc.req);</div><div class='add'>+	buff_size = HW_ATL_A0_RXBUF_MAX;</div><div class='add'>+</div><div class='add'>+	hw_atl_rpb_rx_pkt_buff_size_per_tc_set(self, buff_size, tc);</div><div class='add'>+	hw_atl_rpb_rx_buff_hi_threshold_per_tc_set(self,</div><div class='add'>+						   (buff_size *</div><div class='add'>+						   (1024U / 32U) * 66U) /</div><div class='add'>+						   100U, tc);</div><div class='add'>+	hw_atl_rpb_rx_buff_lo_threshold_per_tc_set(self,</div><div class='add'>+						   (buff_size *</div><div class='add'>+						   (1024U / 32U) * 50U) /</div><div class='add'>+						   100U, tc);</div><div class='add'>+	hw_atl_rpb_rx_xoff_en_per_tc_set(self, is_rx_flow_control ? 1U : 0U, tc);</div><div class='add'>+</div><div class='add'>+	/* QoS 802.1p priority -&gt; TC mapping */</div><div class='add'>+	for (i_priority = 8U; i_priority--;)</div><div class='add'>+		hw_atl_rpf_rpb_user_priority_tc_map_set(self, i_priority, 0U);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_a0_hw_rss_hash_set(struct aq_hw_s *self,</div><div class='add'>+				     struct aq_rss_parameters *rss_params)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_cfg_s *cfg = self-&gt;aq_nic_cfg;</div><div class='add'>+	unsigned int addr = 0U;</div><div class='add'>+	unsigned int i = 0U;</div><div class='add'>+	int err = 0;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	for (i = 10, addr = 0U; i--; ++addr) {</div><div class='add'>+		u32 key_data = cfg-&gt;is_rss ?</div><div class='add'>+			__swab32(rss_params-&gt;hash_secret_key[i]) : 0U;</div><div class='add'>+		hw_atl_rpf_rss_key_wr_data_set(self, key_data);</div><div class='add'>+		hw_atl_rpf_rss_key_addr_set(self, addr);</div><div class='add'>+		hw_atl_rpf_rss_key_wr_en_set(self, 1U);</div><div class='add'>+		err = readx_poll_timeout_atomic(hw_atl_rpf_rss_key_wr_en_get,</div><div class='add'>+						self, val, val == 0,</div><div class='add'>+						1000U, 10000U);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = aq_hw_err_from_flags(self);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_a0_hw_rss_set(struct aq_hw_s *self,</div><div class='add'>+				struct aq_rss_parameters *rss_params)</div><div class='add'>+{</div><div class='add'>+	u32 num_rss_queues = max(1U, self-&gt;aq_nic_cfg-&gt;num_rss_queues);</div><div class='add'>+	u8 *indirection_table =	rss_params-&gt;indirection_table;</div><div class='add'>+	u16 bitary[1 + (HW_ATL_A0_RSS_REDIRECTION_MAX *</div><div class='add'>+		   HW_ATL_A0_RSS_REDIRECTION_BITS / 16U)];</div><div class='add'>+	int err = 0;</div><div class='add'>+	u32 i = 0U;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	memset(bitary, 0, sizeof(bitary));</div><div class='add'>+</div><div class='add'>+	for (i = HW_ATL_A0_RSS_REDIRECTION_MAX; i--; ) {</div><div class='add'>+		(*(u32 *)(bitary + ((i * 3U) / 16U))) |=</div><div class='add'>+			((indirection_table[i] % num_rss_queues) &lt;&lt;</div><div class='add'>+			((i * 3U) &amp; 0xFU));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = ARRAY_SIZE(bitary); i--;) {</div><div class='add'>+		hw_atl_rpf_rss_redir_tbl_wr_data_set(self, bitary[i]);</div><div class='add'>+		hw_atl_rpf_rss_redir_tbl_addr_set(self, i);</div><div class='add'>+		hw_atl_rpf_rss_redir_wr_en_set(self, 1U);</div><div class='add'>+		err = readx_poll_timeout_atomic(hw_atl_rpf_rss_redir_wr_en_get,</div><div class='add'>+						self, val, val == 0,</div><div class='add'>+						1000U, 10000U);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = aq_hw_err_from_flags(self);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_a0_hw_offload_set(struct aq_hw_s *self,</div><div class='add'>+				    struct aq_nic_cfg_s *aq_nic_cfg)</div><div class='add'>+{</div><div class='add'>+	/* TX checksums offloads*/</div><div class='add'>+	hw_atl_tpo_ipv4header_crc_offload_en_set(self, 1);</div><div class='add'>+	hw_atl_tpo_tcp_udp_crc_offload_en_set(self, 1);</div><div class='add'>+</div><div class='add'>+	/* RX checksums offloads*/</div><div class='add'>+	hw_atl_rpo_ipv4header_crc_offload_en_set(self, 1);</div><div class='add'>+	hw_atl_rpo_tcp_udp_crc_offload_en_set(self, 1);</div><div class='add'>+</div><div class='add'>+	/* LSO offloads*/</div><div class='add'>+	hw_atl_tdm_large_send_offload_en_set(self, 0xFFFFFFFFU);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_a0_hw_init_tx_path(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	hw_atl_thm_lso_tcp_flag_of_first_pkt_set(self, 0x0FF6U);</div><div class='add'>+	hw_atl_thm_lso_tcp_flag_of_middle_pkt_set(self, 0x0FF6U);</div><div class='add'>+	hw_atl_thm_lso_tcp_flag_of_last_pkt_set(self, 0x0F7FU);</div><div class='add'>+</div><div class='add'>+	/* Tx interrupts */</div><div class='add'>+	hw_atl_tdm_tx_desc_wr_wb_irq_en_set(self, 1U);</div><div class='add'>+</div><div class='add'>+	/* misc */</div><div class='add'>+	aq_hw_write_reg(self, 0x00007040U, 0x00000000U);</div><div class='add'>+	hw_atl_tdm_tx_dca_en_set(self, 0U);</div><div class='add'>+	hw_atl_tdm_tx_dca_mode_set(self, 0U);</div><div class='add'>+</div><div class='add'>+	hw_atl_tpb_tx_path_scp_ins_en_set(self, 1U);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_a0_hw_init_rx_path(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_cfg_s *cfg = self-&gt;aq_nic_cfg;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Rx TC/RSS number config */</div><div class='add'>+	hw_atl_rpb_rpf_rx_traf_class_mode_set(self, 1U);</div><div class='add'>+</div><div class='add'>+	/* Rx flow control */</div><div class='add'>+	hw_atl_rpb_rx_flow_ctl_mode_set(self, 1U);</div><div class='add'>+</div><div class='add'>+	/* RSS Ring selection */</div><div class='add'>+	hw_atl_reg_rx_flr_rss_control1set(self, cfg-&gt;is_rss ?</div><div class='add'>+					  0xB3333333U : 0x00000000U);</div><div class='add'>+</div><div class='add'>+	/* Multicast filters */</div><div class='add'>+	for (i = HW_ATL_A0_MAC_MAX; i--;) {</div><div class='add'>+		hw_atl_rpfl2_uc_flr_en_set(self, (i == 0U) ? 1U : 0U, i);</div><div class='add'>+		hw_atl_rpfl2unicast_flr_act_set(self, 1U, i);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hw_atl_reg_rx_flr_mcst_flr_msk_set(self, 0x00000000U);</div><div class='add'>+	hw_atl_reg_rx_flr_mcst_flr_set(self, 0x00010FFFU, 0U);</div><div class='add'>+</div><div class='add'>+	/* Vlan filters */</div><div class='add'>+	hw_atl_rpf_vlan_outer_etht_set(self, 0x88A8U);</div><div class='add'>+	hw_atl_rpf_vlan_inner_etht_set(self, 0x8100U);</div><div class='add'>+	hw_atl_rpf_vlan_prom_mode_en_set(self, 1);</div><div class='add'>+</div><div class='add'>+	/* Rx Interrupts */</div><div class='add'>+	hw_atl_rdm_rx_desc_wr_wb_irq_en_set(self, 1U);</div><div class='add'>+</div><div class='add'>+	/* misc */</div><div class='add'>+	hw_atl_rpfl2broadcast_flr_act_set(self, 1U);</div><div class='add'>+	hw_atl_rpfl2broadcast_count_threshold_set(self, 0xFFFFU &amp; (~0U / 256U));</div><div class='add'>+</div><div class='add'>+	hw_atl_rdm_rx_dca_en_set(self, 0U);</div><div class='add'>+	hw_atl_rdm_rx_dca_mode_set(self, 0U);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_a0_hw_mac_addr_set(struct aq_hw_s *self, const u8 *mac_addr)</div><div class='add'>+{</div><div class='add'>+	unsigned int h = 0U;</div><div class='add'>+	unsigned int l = 0U;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (!mac_addr) {</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	h = (mac_addr[0] &lt;&lt; 8) | (mac_addr[1]);</div><div class='add'>+	l = (mac_addr[2] &lt;&lt; 24) | (mac_addr[3] &lt;&lt; 16) |</div><div class='add'>+	    (mac_addr[4] &lt;&lt; 8) | mac_addr[5];</div><div class='add'>+</div><div class='add'>+	hw_atl_rpfl2_uc_flr_en_set(self, 0U, HW_ATL_A0_MAC);</div><div class='add'>+	hw_atl_rpfl2unicast_dest_addresslsw_set(self, l, HW_ATL_A0_MAC);</div><div class='add'>+	hw_atl_rpfl2unicast_dest_addressmsw_set(self, h, HW_ATL_A0_MAC);</div><div class='add'>+	hw_atl_rpfl2_uc_flr_en_set(self, 1U, HW_ATL_A0_MAC);</div><div class='add'>+</div><div class='add'>+	err = aq_hw_err_from_flags(self);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_a0_hw_init(struct aq_hw_s *self, const u8 *mac_addr)</div><div class='add'>+{</div><div class='add'>+	static u32 aq_hw_atl_igcr_table_[4][2] = {</div><div class='add'>+		[AQ_HW_IRQ_INVALID] = { 0x20000000U, 0x20000000U },</div><div class='add'>+		[AQ_HW_IRQ_INTX]    = { 0x20000080U, 0x20000080U },</div><div class='add'>+		[AQ_HW_IRQ_MSI]     = { 0x20000021U, 0x20000025U },</div><div class='add'>+		[AQ_HW_IRQ_MSIX]    = { 0x20000022U, 0x20000026U },</div><div class='add'>+	};</div><div class='add'>+	struct aq_nic_cfg_s *aq_nic_cfg = self-&gt;aq_nic_cfg;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	hw_atl_a0_hw_init_tx_path(self);</div><div class='add'>+	hw_atl_a0_hw_init_rx_path(self);</div><div class='add'>+</div><div class='add'>+	hw_atl_a0_hw_mac_addr_set(self, mac_addr);</div><div class='add'>+</div><div class='add'>+	self-&gt;aq_fw_ops-&gt;set_link_speed(self, aq_nic_cfg-&gt;link_speed_msk);</div><div class='add'>+	self-&gt;aq_fw_ops-&gt;set_state(self, MPI_INIT);</div><div class='add'>+</div><div class='add'>+	hw_atl_reg_tx_dma_debug_ctl_set(self, 0x800000b8U);</div><div class='add'>+	hw_atl_reg_tx_dma_debug_ctl_set(self, 0x000000b8U);</div><div class='add'>+</div><div class='add'>+	hw_atl_a0_hw_qos_set(self);</div><div class='add'>+	hw_atl_a0_hw_rss_set(self, &amp;aq_nic_cfg-&gt;aq_rss);</div><div class='add'>+	hw_atl_a0_hw_rss_hash_set(self, &amp;aq_nic_cfg-&gt;aq_rss);</div><div class='add'>+</div><div class='add'>+	/* Reset link status and read out initial hardware counters */</div><div class='add'>+	self-&gt;aq_link_status.mbps = 0;</div><div class='add'>+	self-&gt;aq_fw_ops-&gt;update_stats(self);</div><div class='add'>+</div><div class='add'>+	err = aq_hw_err_from_flags(self);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	/* Interrupts */</div><div class='add'>+	hw_atl_reg_irq_glb_ctl_set(self,</div><div class='add'>+				   aq_hw_atl_igcr_table_[aq_nic_cfg-&gt;irq_type]</div><div class='add'>+					[(aq_nic_cfg-&gt;vecs &gt; 1U) ? 1 : 0]);</div><div class='add'>+</div><div class='add'>+	hw_atl_itr_irq_auto_masklsw_set(self, aq_nic_cfg-&gt;aq_hw_caps-&gt;irq_mask);</div><div class='add'>+</div><div class='add'>+	/* Interrupts */</div><div class='add'>+	hw_atl_reg_gen_irq_map_set(self,</div><div class='add'>+				   ((HW_ATL_A0_ERR_INT &lt;&lt; 0x18) | (1U &lt;&lt; 0x1F)) |</div><div class='add'>+				   ((HW_ATL_A0_ERR_INT &lt;&lt; 0x10) | (1U &lt;&lt; 0x17)) |</div><div class='add'>+				   ((HW_ATL_A0_ERR_INT &lt;&lt; 8) | (1U &lt;&lt; 0xF)) |</div><div class='add'>+				   ((HW_ATL_A0_ERR_INT) | (1U &lt;&lt; 0x7)), 0U);</div><div class='add'>+</div><div class='add'>+	hw_atl_a0_hw_offload_set(self, aq_nic_cfg);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_a0_hw_ring_tx_start(struct aq_hw_s *self,</div><div class='add'>+				      struct aq_ring_s *ring)</div><div class='add'>+{</div><div class='add'>+	hw_atl_tdm_tx_desc_en_set(self, 1, ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_a0_hw_ring_rx_start(struct aq_hw_s *self,</div><div class='add'>+				      struct aq_ring_s *ring)</div><div class='add'>+{</div><div class='add'>+	hw_atl_rdm_rx_desc_en_set(self, 1, ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_a0_hw_start(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	hw_atl_tpb_tx_buff_en_set(self, 1);</div><div class='add'>+	hw_atl_rpb_rx_buff_en_set(self, 1);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_a0_hw_tx_ring_tail_update(struct aq_hw_s *self,</div><div class='add'>+					    struct aq_ring_s *ring)</div><div class='add'>+{</div><div class='add'>+	hw_atl_reg_tx_dma_desc_tail_ptr_set(self, ring-&gt;sw_tail, ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_a0_hw_ring_tx_xmit(struct aq_hw_s *self,</div><div class='add'>+				     struct aq_ring_s *ring,</div><div class='add'>+				     unsigned int frags)</div><div class='add'>+{</div><div class='add'>+	struct aq_ring_buff_s *buff = NULL;</div><div class='add'>+	struct hw_atl_txd_s *txd = NULL;</div><div class='add'>+	unsigned int buff_pa_len = 0U;</div><div class='add'>+	unsigned int frag_count = 0U;</div><div class='add'>+	unsigned int pkt_len = 0U;</div><div class='add'>+	bool is_gso = false;</div><div class='add'>+</div><div class='add'>+	buff = &amp;ring-&gt;buff_ring[ring-&gt;sw_tail];</div><div class='add'>+	pkt_len = (buff-&gt;is_eop &amp;&amp; buff-&gt;is_sop) ? buff-&gt;len : buff-&gt;len_pkt;</div><div class='add'>+</div><div class='add'>+	for (frag_count = 0; frag_count &lt; frags; frag_count++) {</div><div class='add'>+		txd = (struct hw_atl_txd_s *)&amp;ring-&gt;dx_ring[ring-&gt;sw_tail *</div><div class='add'>+						HW_ATL_A0_TXD_SIZE];</div><div class='add'>+		txd-&gt;ctl = 0;</div><div class='add'>+		txd-&gt;ctl2 = 0;</div><div class='add'>+		txd-&gt;buf_addr = 0;</div><div class='add'>+</div><div class='add'>+		buff = &amp;ring-&gt;buff_ring[ring-&gt;sw_tail];</div><div class='add'>+</div><div class='add'>+		if (buff-&gt;is_gso_tcp) {</div><div class='add'>+			txd-&gt;ctl |= (buff-&gt;len_l3 &lt;&lt; 31) |</div><div class='add'>+				(buff-&gt;len_l2 &lt;&lt; 24) |</div><div class='add'>+				HW_ATL_A0_TXD_CTL_CMD_TCP |</div><div class='add'>+				HW_ATL_A0_TXD_CTL_DESC_TYPE_TXC;</div><div class='add'>+			txd-&gt;ctl2 |= (buff-&gt;mss &lt;&lt; 16) |</div><div class='add'>+				(buff-&gt;len_l4 &lt;&lt; 8) |</div><div class='add'>+				(buff-&gt;len_l3 &gt;&gt; 1);</div><div class='add'>+</div><div class='add'>+			pkt_len -= (buff-&gt;len_l4 +</div><div class='add'>+				    buff-&gt;len_l3 +</div><div class='add'>+				    buff-&gt;len_l2);</div><div class='add'>+			is_gso = true;</div><div class='add'>+</div><div class='add'>+			if (buff-&gt;is_ipv6)</div><div class='add'>+				txd-&gt;ctl |= HW_ATL_A0_TXD_CTL_CMD_IPV6;</div><div class='add'>+		} else {</div><div class='add'>+			buff_pa_len = buff-&gt;len;</div><div class='add'>+</div><div class='add'>+			txd-&gt;buf_addr = buff-&gt;pa;</div><div class='add'>+			txd-&gt;ctl |= (HW_ATL_A0_TXD_CTL_BLEN &amp;</div><div class='add'>+						((u32)buff_pa_len &lt;&lt; 4));</div><div class='add'>+			txd-&gt;ctl |= HW_ATL_A0_TXD_CTL_DESC_TYPE_TXD;</div><div class='add'>+			/* PAY_LEN */</div><div class='add'>+			txd-&gt;ctl2 |= HW_ATL_A0_TXD_CTL2_LEN &amp; (pkt_len &lt;&lt; 14);</div><div class='add'>+</div><div class='add'>+			if (is_gso) {</div><div class='add'>+				txd-&gt;ctl |= HW_ATL_A0_TXD_CTL_CMD_LSO;</div><div class='add'>+				txd-&gt;ctl2 |= HW_ATL_A0_TXD_CTL2_CTX_EN;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			/* Tx checksum offloads */</div><div class='add'>+			if (buff-&gt;is_ip_cso)</div><div class='add'>+				txd-&gt;ctl |= HW_ATL_A0_TXD_CTL_CMD_IPCSO;</div><div class='add'>+</div><div class='add'>+			if (buff-&gt;is_udp_cso || buff-&gt;is_tcp_cso)</div><div class='add'>+				txd-&gt;ctl |= HW_ATL_A0_TXD_CTL_CMD_TUCSO;</div><div class='add'>+</div><div class='add'>+			if (unlikely(buff-&gt;is_eop)) {</div><div class='add'>+				txd-&gt;ctl |= HW_ATL_A0_TXD_CTL_EOP;</div><div class='add'>+				txd-&gt;ctl |= HW_ATL_A0_TXD_CTL_CMD_WB;</div><div class='add'>+				is_gso = false;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		ring-&gt;sw_tail = aq_ring_next_dx(ring, ring-&gt;sw_tail);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hw_atl_a0_hw_tx_ring_tail_update(self, ring);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_a0_hw_ring_rx_init(struct aq_hw_s *self,</div><div class='add'>+				     struct aq_ring_s *aq_ring,</div><div class='add'>+				     struct aq_ring_param_s *aq_ring_param)</div><div class='add'>+{</div><div class='add'>+	u32 dma_desc_addr_msw = (u32)(((u64)aq_ring-&gt;dx_ring_pa) &gt;&gt; 32);</div><div class='add'>+	u32 dma_desc_addr_lsw = (u32)aq_ring-&gt;dx_ring_pa;</div><div class='add'>+</div><div class='add'>+	hw_atl_rdm_rx_desc_en_set(self, false, aq_ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	hw_atl_rdm_rx_desc_head_splitting_set(self, 0U, aq_ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	hw_atl_reg_rx_dma_desc_base_addresslswset(self, dma_desc_addr_lsw,</div><div class='add'>+						  aq_ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	hw_atl_reg_rx_dma_desc_base_addressmswset(self,</div><div class='add'>+						  dma_desc_addr_msw,</div><div class='add'>+						  aq_ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	hw_atl_rdm_rx_desc_len_set(self, aq_ring-&gt;size / 8U, aq_ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	hw_atl_rdm_rx_desc_data_buff_size_set(self,</div><div class='add'>+					      aq_ring-&gt;frame_max / 1024U,</div><div class='add'>+					      aq_ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	hw_atl_rdm_rx_desc_head_buff_size_set(self, 0U, aq_ring-&gt;idx);</div><div class='add'>+	hw_atl_rdm_rx_desc_head_splitting_set(self, 0U, aq_ring-&gt;idx);</div><div class='add'>+	hw_atl_rpo_rx_desc_vlan_stripping_set(self, 0U, aq_ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	/* Rx ring set mode */</div><div class='add'>+</div><div class='add'>+	/* Mapping interrupt vector */</div><div class='add'>+	hw_atl_itr_irq_map_rx_set(self, aq_ring_param-&gt;vec_idx, aq_ring-&gt;idx);</div><div class='add'>+	hw_atl_itr_irq_map_en_rx_set(self, true, aq_ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	hw_atl_rdm_cpu_id_set(self, aq_ring_param-&gt;cpu, aq_ring-&gt;idx);</div><div class='add'>+	hw_atl_rdm_rx_desc_dca_en_set(self, 0U, aq_ring-&gt;idx);</div><div class='add'>+	hw_atl_rdm_rx_head_dca_en_set(self, 0U, aq_ring-&gt;idx);</div><div class='add'>+	hw_atl_rdm_rx_pld_dca_en_set(self, 0U, aq_ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_a0_hw_ring_tx_init(struct aq_hw_s *self,</div><div class='add'>+				     struct aq_ring_s *aq_ring,</div><div class='add'>+				     struct aq_ring_param_s *aq_ring_param)</div><div class='add'>+{</div><div class='add'>+	u32 dma_desc_msw_addr = (u32)(((u64)aq_ring-&gt;dx_ring_pa) &gt;&gt; 32);</div><div class='add'>+	u32 dma_desc_lsw_addr = (u32)aq_ring-&gt;dx_ring_pa;</div><div class='add'>+</div><div class='add'>+	hw_atl_reg_tx_dma_desc_base_addresslswset(self, dma_desc_lsw_addr,</div><div class='add'>+						  aq_ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	hw_atl_reg_tx_dma_desc_base_addressmswset(self, dma_desc_msw_addr,</div><div class='add'>+						  aq_ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	hw_atl_tdm_tx_desc_len_set(self, aq_ring-&gt;size / 8U, aq_ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	hw_atl_a0_hw_tx_ring_tail_update(self, aq_ring);</div><div class='add'>+</div><div class='add'>+	/* Set Tx threshold */</div><div class='add'>+	hw_atl_tdm_tx_desc_wr_wb_threshold_set(self, 0U, aq_ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	/* Mapping interrupt vector */</div><div class='add'>+	hw_atl_itr_irq_map_tx_set(self, aq_ring_param-&gt;vec_idx, aq_ring-&gt;idx);</div><div class='add'>+	hw_atl_itr_irq_map_en_tx_set(self, true, aq_ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	hw_atl_tdm_cpu_id_set(self, aq_ring_param-&gt;cpu, aq_ring-&gt;idx);</div><div class='add'>+	hw_atl_tdm_tx_desc_dca_en_set(self, 0U, aq_ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_a0_hw_ring_rx_fill(struct aq_hw_s *self,</div><div class='add'>+				     struct aq_ring_s *ring,</div><div class='add'>+				     unsigned int sw_tail_old)</div><div class='add'>+{</div><div class='add'>+	for (; sw_tail_old != ring-&gt;sw_tail;</div><div class='add'>+		sw_tail_old = aq_ring_next_dx(ring, sw_tail_old)) {</div><div class='add'>+		struct hw_atl_rxd_s *rxd =</div><div class='add'>+			(struct hw_atl_rxd_s *)&amp;ring-&gt;dx_ring[sw_tail_old *</div><div class='add'>+							HW_ATL_A0_RXD_SIZE];</div><div class='add'>+</div><div class='add'>+		struct aq_ring_buff_s *buff = &amp;ring-&gt;buff_ring[sw_tail_old];</div><div class='add'>+</div><div class='add'>+		rxd-&gt;buf_addr = buff-&gt;pa;</div><div class='add'>+		rxd-&gt;hdr_addr = 0U;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hw_atl_reg_rx_dma_desc_tail_ptr_set(self, sw_tail_old, ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_a0_hw_ring_tx_head_update(struct aq_hw_s *self,</div><div class='add'>+					    struct aq_ring_s *ring)</div><div class='add'>+{</div><div class='add'>+	unsigned int hw_head = hw_atl_tdm_tx_desc_head_ptr_get(self, ring-&gt;idx);</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (aq_utils_obj_test(&amp;self-&gt;flags, AQ_HW_FLAG_ERR_UNPLUG)) {</div><div class='add'>+		err = -ENXIO;</div><div class='add'>+		goto err_exit;</div><div class='add'>+	}</div><div class='add'>+	ring-&gt;hw_head = hw_head;</div><div class='add'>+	err = aq_hw_err_from_flags(self);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_a0_hw_ring_rx_receive(struct aq_hw_s *self,</div><div class='add'>+					struct aq_ring_s *ring)</div><div class='add'>+{</div><div class='add'>+	for (; ring-&gt;hw_head != ring-&gt;sw_tail;</div><div class='add'>+		ring-&gt;hw_head = aq_ring_next_dx(ring, ring-&gt;hw_head)) {</div><div class='add'>+		struct aq_ring_buff_s *buff = NULL;</div><div class='add'>+		struct hw_atl_rxd_wb_s *rxd_wb = (struct hw_atl_rxd_wb_s *)</div><div class='add'>+			&amp;ring-&gt;dx_ring[ring-&gt;hw_head * HW_ATL_A0_RXD_SIZE];</div><div class='add'>+</div><div class='add'>+		unsigned int is_err = 1U;</div><div class='add'>+		unsigned int is_rx_check_sum_enabled = 0U;</div><div class='add'>+		unsigned int pkt_type = 0U;</div><div class='add'>+</div><div class='add'>+		if (!(rxd_wb-&gt;status &amp; 0x5U)) { /* RxD is not done */</div><div class='add'>+			if ((1U &lt;&lt; 4) &amp;</div><div class='add'>+			hw_atl_reg_rx_dma_desc_status_get(self, ring-&gt;idx)) {</div><div class='add'>+				hw_atl_rdm_rx_desc_en_set(self, false, ring-&gt;idx);</div><div class='add'>+				hw_atl_rdm_rx_desc_res_set(self, true, ring-&gt;idx);</div><div class='add'>+				hw_atl_rdm_rx_desc_res_set(self, false, ring-&gt;idx);</div><div class='add'>+				hw_atl_rdm_rx_desc_en_set(self, true, ring-&gt;idx);</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (ring-&gt;hw_head ||</div><div class='add'>+			    (hw_atl_rdm_rx_desc_head_ptr_get(self,</div><div class='add'>+							     ring-&gt;idx) &lt; 2U)) {</div><div class='add'>+				break;</div><div class='add'>+			} else if (!(rxd_wb-&gt;status &amp; 0x1U)) {</div><div class='add'>+				struct hw_atl_rxd_wb_s *rxd_wb1 =</div><div class='add'>+					(struct hw_atl_rxd_wb_s *)</div><div class='add'>+					(&amp;ring-&gt;dx_ring[(1U) *</div><div class='add'>+						HW_ATL_A0_RXD_SIZE]);</div><div class='add'>+</div><div class='add'>+				if ((rxd_wb1-&gt;status &amp; 0x1U)) {</div><div class='add'>+					rxd_wb-&gt;pkt_len = 1514U;</div><div class='add'>+					rxd_wb-&gt;status = 3U;</div><div class='add'>+				} else {</div><div class='add'>+					break;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		buff = &amp;ring-&gt;buff_ring[ring-&gt;hw_head];</div><div class='add'>+</div><div class='add'>+		if (0x3U != (rxd_wb-&gt;status &amp; 0x3U))</div><div class='add'>+			rxd_wb-&gt;status |= 4;</div><div class='add'>+</div><div class='add'>+		is_err = (0x0000001CU &amp; rxd_wb-&gt;status);</div><div class='add'>+		is_rx_check_sum_enabled = (rxd_wb-&gt;type) &amp; (0x3U &lt;&lt; 19);</div><div class='add'>+		pkt_type = 0xFFU &amp; (rxd_wb-&gt;type &gt;&gt; 4);</div><div class='add'>+</div><div class='add'>+		if (is_rx_check_sum_enabled) {</div><div class='add'>+			if (0x0U == (pkt_type &amp; 0x3U))</div><div class='add'>+				buff-&gt;is_ip_cso = (is_err &amp; 0x08U) ? 0 : 1;</div><div class='add'>+</div><div class='add'>+			if (0x4U == (pkt_type &amp; 0x1CU))</div><div class='add'>+				buff-&gt;is_udp_cso = (is_err &amp; 0x10U) ? 0 : 1;</div><div class='add'>+			else if (0x0U == (pkt_type &amp; 0x1CU))</div><div class='add'>+				buff-&gt;is_tcp_cso = (is_err &amp; 0x10U) ? 0 : 1;</div><div class='add'>+</div><div class='add'>+			/* Checksum offload workaround for small packets */</div><div class='add'>+			if (rxd_wb-&gt;pkt_len &lt;= 60) {</div><div class='add'>+				buff-&gt;is_ip_cso = 0U;</div><div class='add'>+				buff-&gt;is_cso_err = 0U;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		is_err &amp;= ~0x18U;</div><div class='add'>+		is_err &amp;= ~0x04U;</div><div class='add'>+</div><div class='add'>+		if (is_err || rxd_wb-&gt;type &amp; 0x1000U) {</div><div class='add'>+			/* status error or DMA error */</div><div class='add'>+			buff-&gt;is_error = 1U;</div><div class='add'>+		} else {</div><div class='add'>+			if (self-&gt;aq_nic_cfg-&gt;is_rss) {</div><div class='add'>+				/* last 4 byte */</div><div class='add'>+				u16 rss_type = rxd_wb-&gt;type &amp; 0xFU;</div><div class='add'>+</div><div class='add'>+				if (rss_type &amp;&amp; rss_type &lt; 0x8U) {</div><div class='add'>+					buff-&gt;is_hash_l4 = (rss_type == 0x4 ||</div><div class='add'>+							rss_type == 0x5);</div><div class='add'>+					buff-&gt;rss_hash = rxd_wb-&gt;rss_hash;</div><div class='add'>+				}</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			if (HW_ATL_A0_RXD_WB_STAT2_EOP &amp; rxd_wb-&gt;status) {</div><div class='add'>+				buff-&gt;len = rxd_wb-&gt;pkt_len %</div><div class='add'>+					    ring-&gt;frame_max;</div><div class='add'>+				buff-&gt;len = buff-&gt;len ?</div><div class='add'>+					buff-&gt;len : ring-&gt;frame_max;</div><div class='add'>+				buff-&gt;next = 0U;</div><div class='add'>+				buff-&gt;is_eop = 1U;</div><div class='add'>+			} else {</div><div class='add'>+				/* jumbo */</div><div class='add'>+				buff-&gt;next = aq_ring_next_dx(ring,</div><div class='add'>+							     ring-&gt;hw_head);</div><div class='add'>+				++ring-&gt;stats.rx.jumbo_packets;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_a0_hw_irq_enable(struct aq_hw_s *self, u64 mask)</div><div class='add'>+{</div><div class='add'>+	hw_atl_itr_irq_msk_setlsw_set(self, LODWORD(mask) |</div><div class='add'>+			       (1U &lt;&lt; HW_ATL_A0_ERR_INT));</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_a0_hw_irq_disable(struct aq_hw_s *self, u64 mask)</div><div class='add'>+{</div><div class='add'>+	hw_atl_itr_irq_msk_clearlsw_set(self, LODWORD(mask));</div><div class='add'>+	hw_atl_itr_irq_status_clearlsw_set(self, LODWORD(mask));</div><div class='add'>+</div><div class='add'>+	if ((1U &lt;&lt; 16) &amp; hw_atl_reg_gen_irq_status_get(self))</div><div class='add'>+		atomic_inc(&amp;self-&gt;dpc);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_a0_hw_irq_read(struct aq_hw_s *self, u64 *mask)</div><div class='add'>+{</div><div class='add'>+	*mask = hw_atl_itr_irq_statuslsw_get(self);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define IS_FILTER_ENABLED(_F_) ((packet_filter &amp; (_F_)) ? 1U : 0U)</div><div class='add'>+</div><div class='add'>+static int hw_atl_a0_hw_packet_filter_set(struct aq_hw_s *self,</div><div class='add'>+					  unsigned int packet_filter)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_cfg_s *cfg = self-&gt;aq_nic_cfg;</div><div class='add'>+	unsigned int i = 0U;</div><div class='add'>+</div><div class='add'>+	hw_atl_rpfl2promiscuous_mode_en_set(self,</div><div class='add'>+					    IS_FILTER_ENABLED(IFF_PROMISC));</div><div class='add'>+	hw_atl_rpfl2multicast_flr_en_set(self,</div><div class='add'>+					 IS_FILTER_ENABLED(IFF_MULTICAST), 0);</div><div class='add'>+	hw_atl_rpfl2broadcast_en_set(self, IS_FILTER_ENABLED(IFF_BROADCAST));</div><div class='add'>+</div><div class='add'>+	cfg-&gt;is_mc_list_enabled = IS_FILTER_ENABLED(IFF_MULTICAST);</div><div class='add'>+</div><div class='add'>+	for (i = HW_ATL_A0_MAC_MIN; i &lt; HW_ATL_A0_MAC_MAX; ++i)</div><div class='add'>+		hw_atl_rpfl2_uc_flr_en_set(self,</div><div class='add'>+					   (cfg-&gt;is_mc_list_enabled &amp;&amp;</div><div class='add'>+					    (i &lt;= cfg-&gt;mc_list_count)) ? 1U : 0U,</div><div class='add'>+					   i);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#undef IS_FILTER_ENABLED</div><div class='add'>+</div><div class='add'>+static int hw_atl_a0_hw_multicast_list_set(struct aq_hw_s *self,</div><div class='add'>+					   u8 ar_mac</div><div class='add'>+					   [AQ_HW_MULTICAST_ADDRESS_MAX]</div><div class='add'>+					   [ETH_ALEN],</div><div class='add'>+					   u32 count)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_cfg_s *cfg = self-&gt;aq_nic_cfg;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (count &gt; (HW_ATL_A0_MAC_MAX - HW_ATL_A0_MAC_MIN)) {</div><div class='add'>+		err = -EBADRQC;</div><div class='add'>+		goto err_exit;</div><div class='add'>+	}</div><div class='add'>+	for (cfg-&gt;mc_list_count = 0U; cfg-&gt;mc_list_count &lt; count; ++cfg-&gt;mc_list_count) {</div><div class='add'>+		u32 i = cfg-&gt;mc_list_count;</div><div class='add'>+		u32 h = (ar_mac[i][0] &lt;&lt; 8) | (ar_mac[i][1]);</div><div class='add'>+		u32 l = (ar_mac[i][2] &lt;&lt; 24) | (ar_mac[i][3] &lt;&lt; 16) |</div><div class='add'>+			(ar_mac[i][4] &lt;&lt; 8) | ar_mac[i][5];</div><div class='add'>+</div><div class='add'>+		hw_atl_rpfl2_uc_flr_en_set(self, 0U, HW_ATL_A0_MAC_MIN + i);</div><div class='add'>+</div><div class='add'>+		hw_atl_rpfl2unicast_dest_addresslsw_set(self,</div><div class='add'>+							l,</div><div class='add'>+							HW_ATL_A0_MAC_MIN + i);</div><div class='add'>+</div><div class='add'>+		hw_atl_rpfl2unicast_dest_addressmsw_set(self,</div><div class='add'>+							h,</div><div class='add'>+							HW_ATL_A0_MAC_MIN + i);</div><div class='add'>+</div><div class='add'>+		hw_atl_rpfl2_uc_flr_en_set(self,</div><div class='add'>+					   (cfg-&gt;is_mc_list_enabled),</div><div class='add'>+					   HW_ATL_A0_MAC_MIN + i);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = aq_hw_err_from_flags(self);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_a0_hw_interrupt_moderation_set(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	unsigned int i = 0U;</div><div class='add'>+	u32 itr_rx;</div><div class='add'>+</div><div class='add'>+	if (self-&gt;aq_nic_cfg-&gt;itr) {</div><div class='add'>+		if (self-&gt;aq_nic_cfg-&gt;itr != AQ_CFG_INTERRUPT_MODERATION_AUTO) {</div><div class='add'>+			u32 itr_ = (self-&gt;aq_nic_cfg-&gt;itr &gt;&gt; 1);</div><div class='add'>+</div><div class='add'>+			itr_ = min(AQ_CFG_IRQ_MASK, itr_);</div><div class='add'>+</div><div class='add'>+			itr_rx = 0x80000000U | (itr_ &lt;&lt; 0x10);</div><div class='add'>+		} else  {</div><div class='add'>+			u32 n = 0xFFFFU &amp; aq_hw_read_reg(self, 0x00002A00U);</div><div class='add'>+</div><div class='add'>+			if (n &lt; self-&gt;aq_link_status.mbps) {</div><div class='add'>+				itr_rx = 0U;</div><div class='add'>+			} else {</div><div class='add'>+				static unsigned int hw_timers_tbl_[] = {</div><div class='add'>+					0x01CU, /* 10Gbit */</div><div class='add'>+					0x039U, /* 5Gbit */</div><div class='add'>+					0x039U, /* 5Gbit 5GS */</div><div class='add'>+					0x073U, /* 2.5Gbit */</div><div class='add'>+					0x120U, /* 1Gbit */</div><div class='add'>+					0x1FFU, /* 100Mbit */</div><div class='add'>+				};</div><div class='add'>+</div><div class='add'>+				unsigned int speed_index =</div><div class='add'>+					hw_atl_utils_mbps_2_speed_index(</div><div class='add'>+						self-&gt;aq_link_status.mbps);</div><div class='add'>+</div><div class='add'>+				itr_rx = 0x80000000U |</div><div class='add'>+					(hw_timers_tbl_[speed_index] &lt;&lt; 0x10U);</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			aq_hw_write_reg(self, 0x00002A00U, 0x40000000U);</div><div class='add'>+			aq_hw_write_reg(self, 0x00002A00U, 0x8D000000U);</div><div class='add'>+		}</div><div class='add'>+	} else {</div><div class='add'>+		itr_rx = 0U;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = HW_ATL_A0_RINGS_MAX; i--;)</div><div class='add'>+		hw_atl_reg_irq_thr_set(self, itr_rx, i);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_a0_hw_stop(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	hw_atl_a0_hw_irq_disable(self, HW_ATL_A0_INT_MASK);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_a0_hw_ring_tx_stop(struct aq_hw_s *self,</div><div class='add'>+				     struct aq_ring_s *ring)</div><div class='add'>+{</div><div class='add'>+	hw_atl_tdm_tx_desc_en_set(self, 0U, ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_a0_hw_ring_rx_stop(struct aq_hw_s *self,</div><div class='add'>+				     struct aq_ring_s *ring)</div><div class='add'>+{</div><div class='add'>+	hw_atl_rdm_rx_desc_en_set(self, 0U, ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_a0_hw_fl3l4_clear(struct aq_hw_s *self,</div><div class='add'>+				    struct aq_rx_filter_l3l4 *data)</div><div class='add'>+{</div><div class='add'>+	u8 location = data-&gt;location;</div><div class='add'>+</div><div class='add'>+	if (!data-&gt;is_ipv6) {</div><div class='add'>+		hw_atl_rpfl3l4_cmd_clear(self, location);</div><div class='add'>+		hw_atl_rpf_l4_spd_set(self, 0U, location);</div><div class='add'>+		hw_atl_rpf_l4_dpd_set(self, 0U, location);</div><div class='add'>+		hw_atl_rpfl3l4_ipv4_src_addr_clear(self, location);</div><div class='add'>+		hw_atl_rpfl3l4_ipv4_dest_addr_clear(self, location);</div><div class='add'>+	} else {</div><div class='add'>+		int i;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; HW_ATL_RX_CNT_REG_ADDR_IPV6; ++i) {</div><div class='add'>+			hw_atl_rpfl3l4_cmd_clear(self, location + i);</div><div class='add'>+			hw_atl_rpf_l4_spd_set(self, 0U, location + i);</div><div class='add'>+			hw_atl_rpf_l4_dpd_set(self, 0U, location + i);</div><div class='add'>+		}</div><div class='add'>+		hw_atl_rpfl3l4_ipv6_src_addr_clear(self, location);</div><div class='add'>+		hw_atl_rpfl3l4_ipv6_dest_addr_clear(self, location);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_a0_hw_fl3l4_set(struct aq_hw_s *self,</div><div class='add'>+				  struct aq_rx_filter_l3l4 *data)</div><div class='add'>+{</div><div class='add'>+	u8 location = data-&gt;location;</div><div class='add'>+</div><div class='add'>+	hw_atl_a0_hw_fl3l4_clear(self, data);</div><div class='add'>+</div><div class='add'>+	if (data-&gt;cmd) {</div><div class='add'>+		if (!data-&gt;is_ipv6) {</div><div class='add'>+			hw_atl_rpfl3l4_ipv4_dest_addr_set(self,</div><div class='add'>+							  location,</div><div class='add'>+							  data-&gt;ip_dst[0]);</div><div class='add'>+			hw_atl_rpfl3l4_ipv4_src_addr_set(self,</div><div class='add'>+							 location,</div><div class='add'>+							 data-&gt;ip_src[0]);</div><div class='add'>+		} else {</div><div class='add'>+			hw_atl_rpfl3l4_ipv6_dest_addr_set(self,</div><div class='add'>+							  location,</div><div class='add'>+							  data-&gt;ip_dst);</div><div class='add'>+			hw_atl_rpfl3l4_ipv6_src_addr_set(self,</div><div class='add'>+							 location,</div><div class='add'>+							 data-&gt;ip_src);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	hw_atl_rpf_l4_dpd_set(self, data-&gt;p_dst, location);</div><div class='add'>+	hw_atl_rpf_l4_spd_set(self, data-&gt;p_src, location);</div><div class='add'>+	hw_atl_rpfl3l4_cmd_set(self, location, data-&gt;cmd);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct aq_hw_ops hw_atl_ops_a0 = {</div><div class='add'>+	.hw_soft_reset        = hw_atl_utils_soft_reset,</div><div class='add'>+	.hw_prepare           = hw_atl_utils_initfw,</div><div class='add'>+	.hw_set_mac_address   = hw_atl_a0_hw_mac_addr_set,</div><div class='add'>+	.hw_init              = hw_atl_a0_hw_init,</div><div class='add'>+	.hw_reset             = hw_atl_a0_hw_reset,</div><div class='add'>+	.hw_start             = hw_atl_a0_hw_start,</div><div class='add'>+	.hw_ring_tx_start     = hw_atl_a0_hw_ring_tx_start,</div><div class='add'>+	.hw_ring_tx_stop      = hw_atl_a0_hw_ring_tx_stop,</div><div class='add'>+	.hw_ring_rx_start     = hw_atl_a0_hw_ring_rx_start,</div><div class='add'>+	.hw_ring_rx_stop      = hw_atl_a0_hw_ring_rx_stop,</div><div class='add'>+	.hw_stop              = hw_atl_a0_hw_stop,</div><div class='add'>+</div><div class='add'>+	.hw_ring_tx_xmit         = hw_atl_a0_hw_ring_tx_xmit,</div><div class='add'>+	.hw_ring_tx_head_update  = hw_atl_a0_hw_ring_tx_head_update,</div><div class='add'>+</div><div class='add'>+	.hw_ring_rx_receive      = hw_atl_a0_hw_ring_rx_receive,</div><div class='add'>+	.hw_ring_rx_fill         = hw_atl_a0_hw_ring_rx_fill,</div><div class='add'>+</div><div class='add'>+	.hw_irq_enable           = hw_atl_a0_hw_irq_enable,</div><div class='add'>+	.hw_irq_disable          = hw_atl_a0_hw_irq_disable,</div><div class='add'>+	.hw_irq_read             = hw_atl_a0_hw_irq_read,</div><div class='add'>+</div><div class='add'>+	.hw_ring_rx_init             = hw_atl_a0_hw_ring_rx_init,</div><div class='add'>+	.hw_ring_tx_init             = hw_atl_a0_hw_ring_tx_init,</div><div class='add'>+	.hw_packet_filter_set        = hw_atl_a0_hw_packet_filter_set,</div><div class='add'>+	.hw_filter_l3l4_set          = hw_atl_a0_hw_fl3l4_set,</div><div class='add'>+	.hw_multicast_list_set       = hw_atl_a0_hw_multicast_list_set,</div><div class='add'>+	.hw_interrupt_moderation_set = hw_atl_a0_hw_interrupt_moderation_set,</div><div class='add'>+	.hw_rss_set                  = hw_atl_a0_hw_rss_set,</div><div class='add'>+	.hw_rss_hash_set             = hw_atl_a0_hw_rss_hash_set,</div><div class='add'>+	.hw_get_regs                 = hw_atl_utils_hw_get_regs,</div><div class='add'>+	.hw_get_hw_stats             = hw_atl_utils_get_hw_stats,</div><div class='add'>+	.hw_get_fw_version           = hw_atl_utils_get_fw_version,</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_a0.h b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_a0.h<br/>new file mode 100644<br/>index 000000000000..1a294ad4d17d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_a0.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_a0.h</a></div><div class='hunk'>@@ -0,0 +1,23 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*</div><div class='add'>+ * aQuantia Corporation Network Driver</div><div class='add'>+ * Copyright (C) 2014-2017 aQuantia Corporation. All rights reserved</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* File hw_atl_a0.h: Declaration of abstract interface for Atlantic hardware</div><div class='add'>+ * specific functions.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef HW_ATL_A0_H</div><div class='add'>+#define HW_ATL_A0_H</div><div class='add'>+</div><div class='add'>+#include "../aq_common.h"</div><div class='add'>+</div><div class='add'>+extern const struct aq_hw_caps_s hw_atl_a0_caps_aqc100;</div><div class='add'>+extern const struct aq_hw_caps_s hw_atl_a0_caps_aqc107;</div><div class='add'>+extern const struct aq_hw_caps_s hw_atl_a0_caps_aqc108;</div><div class='add'>+extern const struct aq_hw_caps_s hw_atl_a0_caps_aqc109;</div><div class='add'>+</div><div class='add'>+extern const struct aq_hw_ops hw_atl_ops_a0;</div><div class='add'>+</div><div class='add'>+#endif /* HW_ATL_A0_H */</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_a0_internal.h b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_a0_internal.h<br/>new file mode 100644<br/>index 000000000000..1b9b2e5601ed<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_a0_internal.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_a0_internal.h</a></div><div class='hunk'>@@ -0,0 +1,90 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*</div><div class='add'>+ * aQuantia Corporation Network Driver</div><div class='add'>+ * Copyright (C) 2014-2017 aQuantia Corporation. All rights reserved</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* File hw_atl_a0_internal.h: Definition of Atlantic A0 chip specific</div><div class='add'>+ * constants.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef HW_ATL_A0_INTERNAL_H</div><div class='add'>+#define HW_ATL_A0_INTERNAL_H</div><div class='add'>+</div><div class='add'>+#include "../aq_common.h"</div><div class='add'>+</div><div class='add'>+#define HW_ATL_A0_MTU_JUMBO 9014U</div><div class='add'>+</div><div class='add'>+#define HW_ATL_A0_TX_RINGS 4U</div><div class='add'>+#define HW_ATL_A0_RX_RINGS 4U</div><div class='add'>+</div><div class='add'>+#define HW_ATL_A0_RINGS_MAX 32U</div><div class='add'>+#define HW_ATL_A0_TXD_SIZE  16U</div><div class='add'>+#define HW_ATL_A0_RXD_SIZE  16U</div><div class='add'>+</div><div class='add'>+#define HW_ATL_A0_MAC      0U</div><div class='add'>+#define HW_ATL_A0_MAC_MIN  1U</div><div class='add'>+#define HW_ATL_A0_MAC_MAX  33U</div><div class='add'>+</div><div class='add'>+/* interrupts */</div><div class='add'>+#define HW_ATL_A0_ERR_INT 8U</div><div class='add'>+#define HW_ATL_A0_INT_MASK  0xFFFFFFFFU</div><div class='add'>+</div><div class='add'>+#define HW_ATL_A0_TXD_CTL2_LEN        0xFFFFC000U</div><div class='add'>+#define HW_ATL_A0_TXD_CTL2_CTX_EN     0x00002000U</div><div class='add'>+#define HW_ATL_A0_TXD_CTL2_CTX_IDX    0x00001000U</div><div class='add'>+</div><div class='add'>+#define HW_ATL_A0_TXD_CTL_DESC_TYPE_TXD   0x00000001U</div><div class='add'>+#define HW_ATL_A0_TXD_CTL_DESC_TYPE_TXC   0x00000002U</div><div class='add'>+#define HW_ATL_A0_TXD_CTL_BLEN        0x000FFFF0U</div><div class='add'>+#define HW_ATL_A0_TXD_CTL_DD          0x00100000U</div><div class='add'>+#define HW_ATL_A0_TXD_CTL_EOP         0x00200000U</div><div class='add'>+</div><div class='add'>+#define HW_ATL_A0_TXD_CTL_CMD_X       0x3FC00000U</div><div class='add'>+</div><div class='add'>+#define HW_ATL_A0_TXD_CTL_CMD_VLAN    BIT(22)</div><div class='add'>+#define HW_ATL_A0_TXD_CTL_CMD_FCS     BIT(23)</div><div class='add'>+#define HW_ATL_A0_TXD_CTL_CMD_IPCSO   BIT(24)</div><div class='add'>+#define HW_ATL_A0_TXD_CTL_CMD_TUCSO   BIT(25)</div><div class='add'>+#define HW_ATL_A0_TXD_CTL_CMD_LSO     BIT(26)</div><div class='add'>+#define HW_ATL_A0_TXD_CTL_CMD_WB      BIT(27)</div><div class='add'>+#define HW_ATL_A0_TXD_CTL_CMD_VXLAN   BIT(28)</div><div class='add'>+</div><div class='add'>+#define HW_ATL_A0_TXD_CTL_CMD_IPV6    BIT(21)</div><div class='add'>+#define HW_ATL_A0_TXD_CTL_CMD_TCP     BIT(22)</div><div class='add'>+</div><div class='add'>+#define HW_ATL_A0_MPI_CONTROL_ADR     0x0368U</div><div class='add'>+#define HW_ATL_A0_MPI_STATE_ADR       0x036CU</div><div class='add'>+</div><div class='add'>+#define HW_ATL_A0_MPI_SPEED_MSK       0xFFFFU</div><div class='add'>+#define HW_ATL_A0_MPI_SPEED_SHIFT     16U</div><div class='add'>+</div><div class='add'>+#define HW_ATL_A0_TXBUF_MAX 160U</div><div class='add'>+#define HW_ATL_A0_RXBUF_MAX 320U</div><div class='add'>+</div><div class='add'>+#define HW_ATL_A0_RSS_REDIRECTION_MAX 64U</div><div class='add'>+#define HW_ATL_A0_RSS_REDIRECTION_BITS 3U</div><div class='add'>+</div><div class='add'>+#define HW_ATL_A0_TC_MAX 1U</div><div class='add'>+#define HW_ATL_A0_RSS_MAX 8U</div><div class='add'>+</div><div class='add'>+#define HW_ATL_A0_FW_SEMA_RAM           0x2U</div><div class='add'>+</div><div class='add'>+#define HW_ATL_A0_RXD_DD    0x1U</div><div class='add'>+#define HW_ATL_A0_RXD_NCEA0 0x1U</div><div class='add'>+</div><div class='add'>+#define HW_ATL_A0_RXD_WB_STAT2_EOP     0x0002U</div><div class='add'>+</div><div class='add'>+#define HW_ATL_A0_UCP_0X370_REG  0x370U</div><div class='add'>+</div><div class='add'>+#define HW_ATL_A0_FW_VER_EXPECTED 0x01050006U</div><div class='add'>+</div><div class='add'>+#define HW_ATL_A0_MIN_RXD \</div><div class='add'>+	(ALIGN(AQ_CFG_SKB_FRAGS_MAX + 1U, AQ_HW_RXD_MULTIPLE))</div><div class='add'>+#define HW_ATL_A0_MIN_TXD \</div><div class='add'>+	(ALIGN(AQ_CFG_SKB_FRAGS_MAX + 1U, AQ_HW_TXD_MULTIPLE))</div><div class='add'>+</div><div class='add'>+#define HW_ATL_A0_MAX_RXD 8184U</div><div class='add'>+#define HW_ATL_A0_MAX_TXD 8184U</div><div class='add'>+</div><div class='add'>+#endif /* HW_ATL_A0_INTERNAL_H */</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c<br/>new file mode 100644<br/>index 000000000000..c7895bfb2ecf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c</a></div><div class='hunk'>@@ -0,0 +1,1830 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2014-2019 aQuantia Corporation</div><div class='add'>+ * Copyright (C) 2019-2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* File hw_atl_b0.c: Definition of Atlantic hardware specific functions. */</div><div class='add'>+</div><div class='add'>+#include "../aq_hw.h"</div><div class='add'>+#include "../aq_hw_utils.h"</div><div class='add'>+#include "../aq_ring.h"</div><div class='add'>+#include "../aq_nic.h"</div><div class='add'>+#include "../aq_phy.h"</div><div class='add'>+#include "hw_atl_b0.h"</div><div class='add'>+#include "hw_atl_utils.h"</div><div class='add'>+#include "hw_atl_llh.h"</div><div class='add'>+#include "hw_atl_b0_internal.h"</div><div class='add'>+#include "hw_atl_llh_internal.h"</div><div class='add'>+</div><div class='add'>+#define DEFAULT_B0_BOARD_BASIC_CAPABILITIES \</div><div class='add'>+	.is_64_dma = true,		  \</div><div class='add'>+	.op64bit = false,		  \</div><div class='add'>+	.msix_irqs = 8U,		  \</div><div class='add'>+	.irq_mask = ~0U,		  \</div><div class='add'>+	.vecs = HW_ATL_B0_RSS_MAX,	  \</div><div class='add'>+	.tcs_max = HW_ATL_B0_TC_MAX,	  \</div><div class='add'>+	.rxd_alignment = 1U,		  \</div><div class='add'>+	.rxd_size = HW_ATL_B0_RXD_SIZE,   \</div><div class='add'>+	.rxds_max = HW_ATL_B0_MAX_RXD,    \</div><div class='add'>+	.rxds_min = HW_ATL_B0_MIN_RXD,    \</div><div class='add'>+	.txd_alignment = 1U,		  \</div><div class='add'>+	.txd_size = HW_ATL_B0_TXD_SIZE,   \</div><div class='add'>+	.txds_max = HW_ATL_B0_MAX_TXD,    \</div><div class='add'>+	.txds_min = HW_ATL_B0_MIN_TXD,    \</div><div class='add'>+	.txhwb_alignment = 4096U,	  \</div><div class='add'>+	.tx_rings = HW_ATL_B0_TX_RINGS,   \</div><div class='add'>+	.rx_rings = HW_ATL_B0_RX_RINGS,   \</div><div class='add'>+	.hw_features = NETIF_F_HW_CSUM |  \</div><div class='add'>+			NETIF_F_RXCSUM |  \</div><div class='add'>+			NETIF_F_RXHASH |  \</div><div class='add'>+			NETIF_F_SG |      \</div><div class='add'>+			NETIF_F_TSO |     \</div><div class='add'>+			NETIF_F_TSO6 |    \</div><div class='add'>+			NETIF_F_LRO |     \</div><div class='add'>+			NETIF_F_NTUPLE |  \</div><div class='add'>+			NETIF_F_HW_VLAN_CTAG_FILTER | \</div><div class='add'>+			NETIF_F_HW_VLAN_CTAG_RX |     \</div><div class='add'>+			NETIF_F_HW_VLAN_CTAG_TX |     \</div><div class='add'>+			NETIF_F_GSO_UDP_L4      |     \</div><div class='add'>+			NETIF_F_GSO_PARTIAL |         \</div><div class='add'>+			NETIF_F_HW_TC,                \</div><div class='add'>+	.hw_priv_flags = IFF_UNICAST_FLT, \</div><div class='add'>+	.flow_control = true,		  \</div><div class='add'>+	.mtu = HW_ATL_B0_MTU_JUMBO,	  \</div><div class='add'>+	.mac_regs_count = 88,		  \</div><div class='add'>+	.hw_alive_check_addr = 0x10U</div><div class='add'>+</div><div class='add'>+const struct aq_hw_caps_s hw_atl_b0_caps_aqc100 = {</div><div class='add'>+	DEFAULT_B0_BOARD_BASIC_CAPABILITIES,</div><div class='add'>+	.media_type = AQ_HW_MEDIA_TYPE_FIBRE,</div><div class='add'>+	.link_speed_msk = AQ_NIC_RATE_10G |</div><div class='add'>+			  AQ_NIC_RATE_5G |</div><div class='add'>+			  AQ_NIC_RATE_2G5 |</div><div class='add'>+			  AQ_NIC_RATE_1G |</div><div class='add'>+			  AQ_NIC_RATE_100M,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct aq_hw_caps_s hw_atl_b0_caps_aqc107 = {</div><div class='add'>+	DEFAULT_B0_BOARD_BASIC_CAPABILITIES,</div><div class='add'>+	.media_type = AQ_HW_MEDIA_TYPE_TP,</div><div class='add'>+	.link_speed_msk = AQ_NIC_RATE_10G |</div><div class='add'>+			  AQ_NIC_RATE_5G |</div><div class='add'>+			  AQ_NIC_RATE_2G5 |</div><div class='add'>+			  AQ_NIC_RATE_1G |</div><div class='add'>+			  AQ_NIC_RATE_100M,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct aq_hw_caps_s hw_atl_b0_caps_aqc108 = {</div><div class='add'>+	DEFAULT_B0_BOARD_BASIC_CAPABILITIES,</div><div class='add'>+	.media_type = AQ_HW_MEDIA_TYPE_TP,</div><div class='add'>+	.link_speed_msk = AQ_NIC_RATE_5G |</div><div class='add'>+			  AQ_NIC_RATE_2G5 |</div><div class='add'>+			  AQ_NIC_RATE_1G |</div><div class='add'>+			  AQ_NIC_RATE_100M,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct aq_hw_caps_s hw_atl_b0_caps_aqc109 = {</div><div class='add'>+	DEFAULT_B0_BOARD_BASIC_CAPABILITIES,</div><div class='add'>+	.media_type = AQ_HW_MEDIA_TYPE_TP,</div><div class='add'>+	.link_speed_msk = AQ_NIC_RATE_2G5 |</div><div class='add'>+			  AQ_NIC_RATE_1G |</div><div class='add'>+			  AQ_NIC_RATE_100M,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct aq_hw_caps_s hw_atl_b0_caps_aqc111 = {</div><div class='add'>+	DEFAULT_B0_BOARD_BASIC_CAPABILITIES,</div><div class='add'>+	.media_type = AQ_HW_MEDIA_TYPE_TP,</div><div class='add'>+	.link_speed_msk = AQ_NIC_RATE_5G |</div><div class='add'>+			  AQ_NIC_RATE_2G5 |</div><div class='add'>+			  AQ_NIC_RATE_1G |</div><div class='add'>+			  AQ_NIC_RATE_100M,</div><div class='add'>+	.quirks = AQ_NIC_QUIRK_BAD_PTP,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct aq_hw_caps_s hw_atl_b0_caps_aqc112 = {</div><div class='add'>+	DEFAULT_B0_BOARD_BASIC_CAPABILITIES,</div><div class='add'>+	.media_type = AQ_HW_MEDIA_TYPE_TP,</div><div class='add'>+	.link_speed_msk = AQ_NIC_RATE_2G5 |</div><div class='add'>+			  AQ_NIC_RATE_1G  |</div><div class='add'>+			  AQ_NIC_RATE_100M,</div><div class='add'>+	.quirks = AQ_NIC_QUIRK_BAD_PTP,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int hw_atl_b0_hw_reset(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	err = hw_atl_utils_soft_reset(self);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	self-&gt;aq_fw_ops-&gt;set_state(self, MPI_RESET);</div><div class='add'>+</div><div class='add'>+	err = aq_hw_err_from_flags(self);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hw_atl_b0_set_fc(struct aq_hw_s *self, u32 fc, u32 tc)</div><div class='add'>+{</div><div class='add'>+	hw_atl_rpb_rx_xoff_en_per_tc_set(self, !!(fc &amp; AQ_NIC_FC_RX), tc);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_b0_tc_ptp_set(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	/* Init TC2 for PTP_TX */</div><div class='add'>+	hw_atl_tpb_tx_pkt_buff_size_per_tc_set(self, HW_ATL_B0_PTP_TXBUF_SIZE,</div><div class='add'>+					       AQ_HW_PTP_TC);</div><div class='add'>+</div><div class='add'>+	/* Init TC2 for PTP_RX */</div><div class='add'>+	hw_atl_rpb_rx_pkt_buff_size_per_tc_set(self, HW_ATL_B0_PTP_RXBUF_SIZE,</div><div class='add'>+					       AQ_HW_PTP_TC);</div><div class='add'>+	/* No flow control for PTP */</div><div class='add'>+	hw_atl_rpb_rx_xoff_en_per_tc_set(self, 0U, AQ_HW_PTP_TC);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_b0_hw_qos_set(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_cfg_s *cfg = self-&gt;aq_nic_cfg;</div><div class='add'>+	u32 tx_buff_size = HW_ATL_B0_TXBUF_MAX;</div><div class='add'>+	u32 rx_buff_size = HW_ATL_B0_RXBUF_MAX;</div><div class='add'>+	unsigned int prio = 0U;</div><div class='add'>+	u32 tc = 0U;</div><div class='add'>+</div><div class='add'>+	if (cfg-&gt;is_ptp) {</div><div class='add'>+		tx_buff_size -= HW_ATL_B0_PTP_TXBUF_SIZE;</div><div class='add'>+		rx_buff_size -= HW_ATL_B0_PTP_RXBUF_SIZE;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* TPS Descriptor rate init */</div><div class='add'>+	hw_atl_tps_tx_pkt_shed_desc_rate_curr_time_res_set(self, 0x0U);</div><div class='add'>+	hw_atl_tps_tx_pkt_shed_desc_rate_lim_set(self, 0xA);</div><div class='add'>+</div><div class='add'>+	/* TPS VM init */</div><div class='add'>+	hw_atl_tps_tx_pkt_shed_desc_vm_arb_mode_set(self, 0U);</div><div class='add'>+</div><div class='add'>+	tx_buff_size /= cfg-&gt;tcs;</div><div class='add'>+	rx_buff_size /= cfg-&gt;tcs;</div><div class='add'>+	for (tc = 0; tc &lt; cfg-&gt;tcs; tc++) {</div><div class='add'>+		u32 threshold = 0U;</div><div class='add'>+</div><div class='add'>+		/* Tx buf size TC0 */</div><div class='add'>+		hw_atl_tpb_tx_pkt_buff_size_per_tc_set(self, tx_buff_size, tc);</div><div class='add'>+</div><div class='add'>+		threshold = (tx_buff_size * (1024 / 32U) * 66U) / 100U;</div><div class='add'>+		hw_atl_tpb_tx_buff_hi_threshold_per_tc_set(self, threshold, tc);</div><div class='add'>+</div><div class='add'>+		threshold = (tx_buff_size * (1024 / 32U) * 50U) / 100U;</div><div class='add'>+		hw_atl_tpb_tx_buff_lo_threshold_per_tc_set(self, threshold, tc);</div><div class='add'>+</div><div class='add'>+		/* QoS Rx buf size per TC */</div><div class='add'>+		hw_atl_rpb_rx_pkt_buff_size_per_tc_set(self, rx_buff_size, tc);</div><div class='add'>+</div><div class='add'>+		threshold = (rx_buff_size * (1024U / 32U) * 66U) / 100U;</div><div class='add'>+		hw_atl_rpb_rx_buff_hi_threshold_per_tc_set(self, threshold, tc);</div><div class='add'>+</div><div class='add'>+		threshold = (rx_buff_size * (1024U / 32U) * 50U) / 100U;</div><div class='add'>+		hw_atl_rpb_rx_buff_lo_threshold_per_tc_set(self, threshold, tc);</div><div class='add'>+</div><div class='add'>+		hw_atl_b0_set_fc(self, self-&gt;aq_nic_cfg-&gt;fc.req, tc);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (cfg-&gt;is_ptp)</div><div class='add'>+		hw_atl_b0_tc_ptp_set(self);</div><div class='add'>+</div><div class='add'>+	/* QoS 802.1p priority -&gt; TC mapping */</div><div class='add'>+	for (prio = 0; prio &lt; 8; ++prio)</div><div class='add'>+		hw_atl_rpf_rpb_user_priority_tc_map_set(self, prio,</div><div class='add'>+							cfg-&gt;prio_tc_map[prio]);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hw_atl_b0_hw_rss_hash_set(struct aq_hw_s *self,</div><div class='add'>+			      struct aq_rss_parameters *rss_params)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_cfg_s *cfg = self-&gt;aq_nic_cfg;</div><div class='add'>+	unsigned int addr = 0U;</div><div class='add'>+	unsigned int i = 0U;</div><div class='add'>+	int err = 0;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	for (i = 10, addr = 0U; i--; ++addr) {</div><div class='add'>+		u32 key_data = cfg-&gt;is_rss ?</div><div class='add'>+			__swab32(rss_params-&gt;hash_secret_key[i]) : 0U;</div><div class='add'>+		hw_atl_rpf_rss_key_wr_data_set(self, key_data);</div><div class='add'>+		hw_atl_rpf_rss_key_addr_set(self, addr);</div><div class='add'>+		hw_atl_rpf_rss_key_wr_en_set(self, 1U);</div><div class='add'>+		err = readx_poll_timeout_atomic(hw_atl_rpf_rss_key_wr_en_get,</div><div class='add'>+						self, val, val == 0,</div><div class='add'>+						1000U, 10000U);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = aq_hw_err_from_flags(self);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_b0_hw_rss_set(struct aq_hw_s *self,</div><div class='add'>+				struct aq_rss_parameters *rss_params)</div><div class='add'>+{</div><div class='add'>+	u32 num_rss_queues = max(1U, self-&gt;aq_nic_cfg-&gt;num_rss_queues);</div><div class='add'>+	u8 *indirection_table =	rss_params-&gt;indirection_table;</div><div class='add'>+	u16 bitary[1 + (HW_ATL_B0_RSS_REDIRECTION_MAX *</div><div class='add'>+		   HW_ATL_B0_RSS_REDIRECTION_BITS / 16U)];</div><div class='add'>+	int err = 0;</div><div class='add'>+	u32 i = 0U;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	memset(bitary, 0, sizeof(bitary));</div><div class='add'>+</div><div class='add'>+	for (i = HW_ATL_B0_RSS_REDIRECTION_MAX; i--;) {</div><div class='add'>+		(*(u32 *)(bitary + ((i * 3U) / 16U))) |=</div><div class='add'>+			((indirection_table[i] % num_rss_queues) &lt;&lt;</div><div class='add'>+			((i * 3U) &amp; 0xFU));</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = ARRAY_SIZE(bitary); i--;) {</div><div class='add'>+		hw_atl_rpf_rss_redir_tbl_wr_data_set(self, bitary[i]);</div><div class='add'>+		hw_atl_rpf_rss_redir_tbl_addr_set(self, i);</div><div class='add'>+		hw_atl_rpf_rss_redir_wr_en_set(self, 1U);</div><div class='add'>+		err = readx_poll_timeout_atomic(hw_atl_rpf_rss_redir_wr_en_get,</div><div class='add'>+						self, val, val == 0,</div><div class='add'>+						1000U, 10000U);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = aq_hw_err_from_flags(self);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hw_atl_b0_hw_offload_set(struct aq_hw_s *self,</div><div class='add'>+			     struct aq_nic_cfg_s *aq_nic_cfg)</div><div class='add'>+{</div><div class='add'>+	u64 rxcsum = !!(aq_nic_cfg-&gt;features &amp; NETIF_F_RXCSUM);</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	/* TX checksums offloads*/</div><div class='add'>+	hw_atl_tpo_ipv4header_crc_offload_en_set(self, 1);</div><div class='add'>+	hw_atl_tpo_tcp_udp_crc_offload_en_set(self, 1);</div><div class='add'>+</div><div class='add'>+	/* RX checksums offloads*/</div><div class='add'>+	hw_atl_rpo_ipv4header_crc_offload_en_set(self, rxcsum);</div><div class='add'>+	hw_atl_rpo_tcp_udp_crc_offload_en_set(self, rxcsum);</div><div class='add'>+</div><div class='add'>+	/* LSO offloads*/</div><div class='add'>+	hw_atl_tdm_large_send_offload_en_set(self, 0xFFFFFFFFU);</div><div class='add'>+</div><div class='add'>+	/* Outer VLAN tag offload */</div><div class='add'>+	hw_atl_rpo_outer_vlan_tag_mode_set(self, 1U);</div><div class='add'>+</div><div class='add'>+	/* LRO offloads */</div><div class='add'>+	{</div><div class='add'>+		unsigned int val = (8U &lt; HW_ATL_B0_LRO_RXD_MAX) ? 0x3U :</div><div class='add'>+			((4U &lt; HW_ATL_B0_LRO_RXD_MAX) ? 0x2U :</div><div class='add'>+			((2U &lt; HW_ATL_B0_LRO_RXD_MAX) ? 0x1U : 0x0));</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; HW_ATL_B0_RINGS_MAX; i++)</div><div class='add'>+			hw_atl_rpo_lro_max_num_of_descriptors_set(self, val, i);</div><div class='add'>+</div><div class='add'>+		hw_atl_rpo_lro_time_base_divider_set(self, 0x61AU);</div><div class='add'>+		hw_atl_rpo_lro_inactive_interval_set(self, 0);</div><div class='add'>+		/* the LRO timebase divider is 5 uS (0x61a),</div><div class='add'>+		 * which is multiplied by 50(0x32)</div><div class='add'>+		 * to get a maximum coalescing interval of 250 uS,</div><div class='add'>+		 * which is the default value</div><div class='add'>+		 */</div><div class='add'>+		hw_atl_rpo_lro_max_coalescing_interval_set(self, 50);</div><div class='add'>+</div><div class='add'>+		hw_atl_rpo_lro_qsessions_lim_set(self, 1U);</div><div class='add'>+</div><div class='add'>+		hw_atl_rpo_lro_total_desc_lim_set(self, 2U);</div><div class='add'>+</div><div class='add'>+		hw_atl_rpo_lro_patch_optimization_en_set(self, 1U);</div><div class='add'>+</div><div class='add'>+		hw_atl_rpo_lro_min_pay_of_first_pkt_set(self, 10U);</div><div class='add'>+</div><div class='add'>+		hw_atl_rpo_lro_pkt_lim_set(self, 1U);</div><div class='add'>+</div><div class='add'>+		hw_atl_rpo_lro_en_set(self,</div><div class='add'>+				      aq_nic_cfg-&gt;is_lro ? 0xFFFFFFFFU : 0U);</div><div class='add'>+		hw_atl_itr_rsc_en_set(self,</div><div class='add'>+				      aq_nic_cfg-&gt;is_lro ? 0xFFFFFFFFU : 0U);</div><div class='add'>+</div><div class='add'>+		hw_atl_itr_rsc_delay_set(self, 1U);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_b0_hw_init_tx_tc_rate_limit(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	static const u32 max_weight = BIT(HW_ATL_TPS_DATA_TCTWEIGHT_WIDTH) - 1;</div><div class='add'>+	/* Scale factor is based on the number of bits in fractional portion */</div><div class='add'>+	static const u32 scale = BIT(HW_ATL_TPS_DESC_RATE_Y_WIDTH);</div><div class='add'>+	static const u32 frac_msk = HW_ATL_TPS_DESC_RATE_Y_MSK &gt;&gt;</div><div class='add'>+				    HW_ATL_TPS_DESC_RATE_Y_SHIFT;</div><div class='add'>+	const u32 link_speed = self-&gt;aq_link_status.mbps;</div><div class='add'>+	struct aq_nic_cfg_s *nic_cfg = self-&gt;aq_nic_cfg;</div><div class='add'>+	unsigned long num_min_rated_tcs = 0;</div><div class='add'>+	u32 tc_weight[AQ_CFG_TCS_MAX];</div><div class='add'>+	u32 fixed_max_credit;</div><div class='add'>+	u8 min_rate_msk = 0;</div><div class='add'>+	u32 sum_weight = 0;</div><div class='add'>+	int tc;</div><div class='add'>+</div><div class='add'>+	/* By default max_credit is based upon MTU (in unit of 64b) */</div><div class='add'>+	fixed_max_credit = nic_cfg-&gt;aq_hw_caps-&gt;mtu / 64;</div><div class='add'>+</div><div class='add'>+	if (link_speed) {</div><div class='add'>+		min_rate_msk = nic_cfg-&gt;tc_min_rate_msk &amp;</div><div class='add'>+			       (BIT(nic_cfg-&gt;tcs) - 1);</div><div class='add'>+		num_min_rated_tcs = hweight8(min_rate_msk);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* First, calculate weights where min_rate is specified */</div><div class='add'>+	if (num_min_rated_tcs) {</div><div class='add'>+		for (tc = 0; tc != nic_cfg-&gt;tcs; tc++) {</div><div class='add'>+			if (!nic_cfg-&gt;tc_min_rate[tc]) {</div><div class='add'>+				tc_weight[tc] = 0;</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			tc_weight[tc] = (-1L + link_speed +</div><div class='add'>+					 nic_cfg-&gt;tc_min_rate[tc] *</div><div class='add'>+					 max_weight) /</div><div class='add'>+					link_speed;</div><div class='add'>+			tc_weight[tc] = min(tc_weight[tc], max_weight);</div><div class='add'>+			sum_weight += tc_weight[tc];</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* WSP, if min_rate is set for at least one TC.</div><div class='add'>+	 * RR otherwise.</div><div class='add'>+	 *</div><div class='add'>+	 * NB! MAC FW sets arb mode itself if PTP is enabled. We shouldn't</div><div class='add'>+	 * overwrite it here in that case.</div><div class='add'>+	 */</div><div class='add'>+	if (!nic_cfg-&gt;is_ptp)</div><div class='add'>+		hw_atl_tps_tx_pkt_shed_data_arb_mode_set(self, min_rate_msk ? 1U : 0U);</div><div class='add'>+</div><div class='add'>+	/* Data TC Arbiter takes precedence over Descriptor TC Arbiter,</div><div class='add'>+	 * leave Descriptor TC Arbiter as RR.</div><div class='add'>+	 */</div><div class='add'>+	hw_atl_tps_tx_pkt_shed_desc_tc_arb_mode_set(self, 0U);</div><div class='add'>+</div><div class='add'>+	hw_atl_tps_tx_desc_rate_mode_set(self, nic_cfg-&gt;is_qos ? 1U : 0U);</div><div class='add'>+</div><div class='add'>+	for (tc = 0; tc != nic_cfg-&gt;tcs; tc++) {</div><div class='add'>+		const u32 en = (nic_cfg-&gt;tc_max_rate[tc] != 0) ? 1U : 0U;</div><div class='add'>+		const u32 desc = AQ_NIC_CFG_TCVEC2RING(nic_cfg, tc, 0);</div><div class='add'>+		u32 weight, max_credit;</div><div class='add'>+</div><div class='add'>+		hw_atl_tps_tx_pkt_shed_desc_tc_max_credit_set(self, tc,</div><div class='add'>+							      fixed_max_credit);</div><div class='add'>+		hw_atl_tps_tx_pkt_shed_desc_tc_weight_set(self, tc, 0x1E);</div><div class='add'>+</div><div class='add'>+		if (num_min_rated_tcs) {</div><div class='add'>+			weight = tc_weight[tc];</div><div class='add'>+</div><div class='add'>+			if (!weight &amp;&amp; sum_weight &lt; max_weight)</div><div class='add'>+				weight = (max_weight - sum_weight) /</div><div class='add'>+					 (nic_cfg-&gt;tcs - num_min_rated_tcs);</div><div class='add'>+			else if (!weight)</div><div class='add'>+				weight = 0x64;</div><div class='add'>+</div><div class='add'>+			max_credit = max(8 * weight, fixed_max_credit);</div><div class='add'>+		} else {</div><div class='add'>+			weight = 0x64;</div><div class='add'>+			max_credit = 0xFFF;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		hw_atl_tps_tx_pkt_shed_tc_data_weight_set(self, tc, weight);</div><div class='add'>+		hw_atl_tps_tx_pkt_shed_tc_data_max_credit_set(self, tc,</div><div class='add'>+							      max_credit);</div><div class='add'>+</div><div class='add'>+		hw_atl_tps_tx_desc_rate_en_set(self, desc, en);</div><div class='add'>+</div><div class='add'>+		if (en) {</div><div class='add'>+			/* Nominal rate is always 10G */</div><div class='add'>+			const u32 rate = 10000U * scale /</div><div class='add'>+					 nic_cfg-&gt;tc_max_rate[tc];</div><div class='add'>+			const u32 rate_int = rate &gt;&gt;</div><div class='add'>+					     HW_ATL_TPS_DESC_RATE_Y_WIDTH;</div><div class='add'>+			const u32 rate_frac = rate &amp; frac_msk;</div><div class='add'>+</div><div class='add'>+			hw_atl_tps_tx_desc_rate_x_set(self, desc, rate_int);</div><div class='add'>+			hw_atl_tps_tx_desc_rate_y_set(self, desc, rate_frac);</div><div class='add'>+		} else {</div><div class='add'>+			/* A value of 1 indicates the queue is not</div><div class='add'>+			 * rate controlled.</div><div class='add'>+			 */</div><div class='add'>+			hw_atl_tps_tx_desc_rate_x_set(self, desc, 1U);</div><div class='add'>+			hw_atl_tps_tx_desc_rate_y_set(self, desc, 0U);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	for (tc = nic_cfg-&gt;tcs; tc != AQ_CFG_TCS_MAX; tc++) {</div><div class='add'>+		const u32 desc = AQ_NIC_CFG_TCVEC2RING(nic_cfg, tc, 0);</div><div class='add'>+</div><div class='add'>+		hw_atl_tps_tx_desc_rate_en_set(self, desc, 0U);</div><div class='add'>+		hw_atl_tps_tx_desc_rate_x_set(self, desc, 1U);</div><div class='add'>+		hw_atl_tps_tx_desc_rate_y_set(self, desc, 0U);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_b0_hw_init_tx_path(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_cfg_s *nic_cfg = self-&gt;aq_nic_cfg;</div><div class='add'>+</div><div class='add'>+	/* Tx TC/Queue number config */</div><div class='add'>+	hw_atl_tpb_tps_tx_tc_mode_set(self, nic_cfg-&gt;tc_mode);</div><div class='add'>+</div><div class='add'>+	hw_atl_thm_lso_tcp_flag_of_first_pkt_set(self, 0x0FF6U);</div><div class='add'>+	hw_atl_thm_lso_tcp_flag_of_middle_pkt_set(self, 0x0FF6U);</div><div class='add'>+	hw_atl_thm_lso_tcp_flag_of_last_pkt_set(self, 0x0F7FU);</div><div class='add'>+</div><div class='add'>+	/* Tx interrupts */</div><div class='add'>+	hw_atl_tdm_tx_desc_wr_wb_irq_en_set(self, 1U);</div><div class='add'>+</div><div class='add'>+	/* misc */</div><div class='add'>+	aq_hw_write_reg(self, 0x00007040U, ATL_HW_IS_CHIP_FEATURE(self, TPO2) ?</div><div class='add'>+			0x00010000U : 0x00000000U);</div><div class='add'>+	hw_atl_tdm_tx_dca_en_set(self, 0U);</div><div class='add'>+	hw_atl_tdm_tx_dca_mode_set(self, 0U);</div><div class='add'>+</div><div class='add'>+	hw_atl_tpb_tx_path_scp_ins_en_set(self, 1U);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_b0_hw_init_rx_rss_ctrl1(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_cfg_s *cfg = self-&gt;aq_nic_cfg;</div><div class='add'>+	u32 rss_ctrl1 = HW_ATL_RSS_DISABLED;</div><div class='add'>+</div><div class='add'>+	if (cfg-&gt;is_rss)</div><div class='add'>+		rss_ctrl1 = (cfg-&gt;tc_mode == AQ_TC_MODE_8TCS) ?</div><div class='add'>+			    HW_ATL_RSS_ENABLED_8TCS_2INDEX_BITS :</div><div class='add'>+			    HW_ATL_RSS_ENABLED_4TCS_3INDEX_BITS;</div><div class='add'>+</div><div class='add'>+	hw_atl_reg_rx_flr_rss_control1set(self, rss_ctrl1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_b0_hw_init_rx_path(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_cfg_s *cfg = self-&gt;aq_nic_cfg;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Rx TC/RSS number config */</div><div class='add'>+	hw_atl_rpb_rpf_rx_traf_class_mode_set(self, cfg-&gt;tc_mode);</div><div class='add'>+</div><div class='add'>+	/* Rx flow control */</div><div class='add'>+	hw_atl_rpb_rx_flow_ctl_mode_set(self, 1U);</div><div class='add'>+</div><div class='add'>+	/* RSS Ring selection */</div><div class='add'>+	hw_atl_b0_hw_init_rx_rss_ctrl1(self);</div><div class='add'>+</div><div class='add'>+	/* Multicast filters */</div><div class='add'>+	for (i = HW_ATL_B0_MAC_MAX; i--;) {</div><div class='add'>+		hw_atl_rpfl2_uc_flr_en_set(self, (i == 0U) ? 1U : 0U, i);</div><div class='add'>+		hw_atl_rpfl2unicast_flr_act_set(self, 1U, i);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hw_atl_reg_rx_flr_mcst_flr_msk_set(self, 0x00000000U);</div><div class='add'>+	hw_atl_reg_rx_flr_mcst_flr_set(self, 0x00010FFFU, 0U);</div><div class='add'>+</div><div class='add'>+	/* Vlan filters */</div><div class='add'>+	hw_atl_rpf_vlan_outer_etht_set(self, 0x88A8U);</div><div class='add'>+	hw_atl_rpf_vlan_inner_etht_set(self, 0x8100U);</div><div class='add'>+</div><div class='add'>+	hw_atl_rpf_vlan_prom_mode_en_set(self, 1);</div><div class='add'>+</div><div class='add'>+	// Always accept untagged packets</div><div class='add'>+	hw_atl_rpf_vlan_accept_untagged_packets_set(self, 1U);</div><div class='add'>+	hw_atl_rpf_vlan_untagged_act_set(self, 1U);</div><div class='add'>+</div><div class='add'>+	/* Rx Interrupts */</div><div class='add'>+	hw_atl_rdm_rx_desc_wr_wb_irq_en_set(self, 1U);</div><div class='add'>+</div><div class='add'>+	/* misc */</div><div class='add'>+	aq_hw_write_reg(self, 0x00005040U, ATL_HW_IS_CHIP_FEATURE(self, RPF2) ?</div><div class='add'>+			0x000F0000U : 0x00000000U);</div><div class='add'>+</div><div class='add'>+	hw_atl_rpfl2broadcast_flr_act_set(self, 1U);</div><div class='add'>+	hw_atl_rpfl2broadcast_count_threshold_set(self, 0xFFFFU &amp; (~0U / 256U));</div><div class='add'>+</div><div class='add'>+	hw_atl_rdm_rx_dca_en_set(self, 0U);</div><div class='add'>+	hw_atl_rdm_rx_dca_mode_set(self, 0U);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hw_atl_b0_hw_mac_addr_set(struct aq_hw_s *self, const u8 *mac_addr)</div><div class='add'>+{</div><div class='add'>+	unsigned int h = 0U;</div><div class='add'>+	unsigned int l = 0U;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (!mac_addr) {</div><div class='add'>+		err = -EINVAL;</div><div class='add'>+		goto err_exit;</div><div class='add'>+	}</div><div class='add'>+	h = (mac_addr[0] &lt;&lt; 8) | (mac_addr[1]);</div><div class='add'>+	l = (mac_addr[2] &lt;&lt; 24) | (mac_addr[3] &lt;&lt; 16) |</div><div class='add'>+		(mac_addr[4] &lt;&lt; 8) | mac_addr[5];</div><div class='add'>+</div><div class='add'>+	hw_atl_rpfl2_uc_flr_en_set(self, 0U, HW_ATL_B0_MAC);</div><div class='add'>+	hw_atl_rpfl2unicast_dest_addresslsw_set(self, l, HW_ATL_B0_MAC);</div><div class='add'>+	hw_atl_rpfl2unicast_dest_addressmsw_set(self, h, HW_ATL_B0_MAC);</div><div class='add'>+	hw_atl_rpfl2_uc_flr_en_set(self, 1U, HW_ATL_B0_MAC);</div><div class='add'>+</div><div class='add'>+	err = aq_hw_err_from_flags(self);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_b0_hw_init(struct aq_hw_s *self, const u8 *mac_addr)</div><div class='add'>+{</div><div class='add'>+	static u32 aq_hw_atl_igcr_table_[4][2] = {</div><div class='add'>+		[AQ_HW_IRQ_INVALID] = { 0x20000000U, 0x20000000U },</div><div class='add'>+		[AQ_HW_IRQ_INTX]    = { 0x20000080U, 0x20000080U },</div><div class='add'>+		[AQ_HW_IRQ_MSI]     = { 0x20000021U, 0x20000025U },</div><div class='add'>+		[AQ_HW_IRQ_MSIX]    = { 0x20000022U, 0x20000026U },</div><div class='add'>+	};</div><div class='add'>+	struct aq_nic_cfg_s *aq_nic_cfg = self-&gt;aq_nic_cfg;</div><div class='add'>+	int err = 0;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	hw_atl_b0_hw_init_tx_path(self);</div><div class='add'>+	hw_atl_b0_hw_init_rx_path(self);</div><div class='add'>+</div><div class='add'>+	hw_atl_b0_hw_mac_addr_set(self, mac_addr);</div><div class='add'>+</div><div class='add'>+	self-&gt;aq_fw_ops-&gt;set_link_speed(self, aq_nic_cfg-&gt;link_speed_msk);</div><div class='add'>+	self-&gt;aq_fw_ops-&gt;set_state(self, MPI_INIT);</div><div class='add'>+</div><div class='add'>+	hw_atl_b0_hw_qos_set(self);</div><div class='add'>+	hw_atl_b0_hw_rss_set(self, &amp;aq_nic_cfg-&gt;aq_rss);</div><div class='add'>+	hw_atl_b0_hw_rss_hash_set(self, &amp;aq_nic_cfg-&gt;aq_rss);</div><div class='add'>+</div><div class='add'>+	/* Force limit MRRS on RDM/TDM to 2K */</div><div class='add'>+	val = aq_hw_read_reg(self, HW_ATL_PCI_REG_CONTROL6_ADR);</div><div class='add'>+	aq_hw_write_reg(self, HW_ATL_PCI_REG_CONTROL6_ADR,</div><div class='add'>+			(val &amp; ~0x707) | 0x404);</div><div class='add'>+</div><div class='add'>+	/* TX DMA total request limit. B0 hardware is not capable to</div><div class='add'>+	 * handle more than (8K-MRRS) incoming DMA data.</div><div class='add'>+	 * Value 24 in 256byte units</div><div class='add'>+	 */</div><div class='add'>+	aq_hw_write_reg(self, HW_ATL_TX_DMA_TOTAL_REQ_LIMIT_ADR, 24);</div><div class='add'>+</div><div class='add'>+	/* Reset link status and read out initial hardware counters */</div><div class='add'>+	self-&gt;aq_link_status.mbps = 0;</div><div class='add'>+	self-&gt;aq_fw_ops-&gt;update_stats(self);</div><div class='add'>+</div><div class='add'>+	err = aq_hw_err_from_flags(self);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	/* Interrupts */</div><div class='add'>+	hw_atl_reg_irq_glb_ctl_set(self,</div><div class='add'>+				   aq_hw_atl_igcr_table_[aq_nic_cfg-&gt;irq_type]</div><div class='add'>+						 [(aq_nic_cfg-&gt;vecs &gt; 1U) ?</div><div class='add'>+						 1 : 0]);</div><div class='add'>+</div><div class='add'>+	hw_atl_itr_irq_auto_masklsw_set(self, aq_nic_cfg-&gt;aq_hw_caps-&gt;irq_mask);</div><div class='add'>+</div><div class='add'>+	/* Interrupts */</div><div class='add'>+	hw_atl_reg_gen_irq_map_set(self,</div><div class='add'>+				   ((HW_ATL_B0_ERR_INT &lt;&lt; 0x18) |</div><div class='add'>+				    (1U &lt;&lt; 0x1F)) |</div><div class='add'>+				   ((HW_ATL_B0_ERR_INT &lt;&lt; 0x10) |</div><div class='add'>+				    (1U &lt;&lt; 0x17)), 0U);</div><div class='add'>+</div><div class='add'>+	/* Enable link interrupt */</div><div class='add'>+	if (aq_nic_cfg-&gt;link_irq_vec)</div><div class='add'>+		hw_atl_reg_gen_irq_map_set(self, BIT(7) |</div><div class='add'>+					   aq_nic_cfg-&gt;link_irq_vec, 3U);</div><div class='add'>+</div><div class='add'>+	hw_atl_b0_hw_offload_set(self, aq_nic_cfg);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hw_atl_b0_hw_ring_tx_start(struct aq_hw_s *self, struct aq_ring_s *ring)</div><div class='add'>+{</div><div class='add'>+	hw_atl_tdm_tx_desc_en_set(self, 1, ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hw_atl_b0_hw_ring_rx_start(struct aq_hw_s *self, struct aq_ring_s *ring)</div><div class='add'>+{</div><div class='add'>+	hw_atl_rdm_rx_desc_en_set(self, 1, ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hw_atl_b0_hw_start(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	hw_atl_tpb_tx_buff_en_set(self, 1);</div><div class='add'>+	hw_atl_rpb_rx_buff_en_set(self, 1);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_b0_hw_tx_ring_tail_update(struct aq_hw_s *self,</div><div class='add'>+					    struct aq_ring_s *ring)</div><div class='add'>+{</div><div class='add'>+	hw_atl_reg_tx_dma_desc_tail_ptr_set(self, ring-&gt;sw_tail, ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hw_atl_b0_hw_ring_tx_xmit(struct aq_hw_s *self, struct aq_ring_s *ring,</div><div class='add'>+			      unsigned int frags)</div><div class='add'>+{</div><div class='add'>+	struct aq_ring_buff_s *buff = NULL;</div><div class='add'>+	struct hw_atl_txd_s *txd = NULL;</div><div class='add'>+	unsigned int buff_pa_len = 0U;</div><div class='add'>+	unsigned int frag_count = 0U;</div><div class='add'>+	unsigned int pkt_len = 0U;</div><div class='add'>+	bool is_vlan = false;</div><div class='add'>+	bool is_gso = false;</div><div class='add'>+</div><div class='add'>+	buff = &amp;ring-&gt;buff_ring[ring-&gt;sw_tail];</div><div class='add'>+	pkt_len = (buff-&gt;is_eop &amp;&amp; buff-&gt;is_sop) ? buff-&gt;len : buff-&gt;len_pkt;</div><div class='add'>+</div><div class='add'>+	for (frag_count = 0; frag_count &lt; frags; frag_count++) {</div><div class='add'>+		txd = (struct hw_atl_txd_s *)&amp;ring-&gt;dx_ring[ring-&gt;sw_tail *</div><div class='add'>+						HW_ATL_B0_TXD_SIZE];</div><div class='add'>+		txd-&gt;ctl = 0;</div><div class='add'>+		txd-&gt;ctl2 = 0;</div><div class='add'>+		txd-&gt;buf_addr = 0;</div><div class='add'>+</div><div class='add'>+		buff = &amp;ring-&gt;buff_ring[ring-&gt;sw_tail];</div><div class='add'>+</div><div class='add'>+		if (buff-&gt;is_gso_tcp || buff-&gt;is_gso_udp) {</div><div class='add'>+			if (buff-&gt;is_gso_tcp)</div><div class='add'>+				txd-&gt;ctl |= HW_ATL_B0_TXD_CTL_CMD_TCP;</div><div class='add'>+			txd-&gt;ctl |= HW_ATL_B0_TXD_CTL_DESC_TYPE_TXC;</div><div class='add'>+			txd-&gt;ctl |= (buff-&gt;len_l3 &lt;&lt; 31) |</div><div class='add'>+				    (buff-&gt;len_l2 &lt;&lt; 24);</div><div class='add'>+			txd-&gt;ctl2 |= (buff-&gt;mss &lt;&lt; 16);</div><div class='add'>+			is_gso = true;</div><div class='add'>+</div><div class='add'>+			pkt_len -= (buff-&gt;len_l4 +</div><div class='add'>+				    buff-&gt;len_l3 +</div><div class='add'>+				    buff-&gt;len_l2);</div><div class='add'>+			if (buff-&gt;is_ipv6)</div><div class='add'>+				txd-&gt;ctl |= HW_ATL_B0_TXD_CTL_CMD_IPV6;</div><div class='add'>+			txd-&gt;ctl2 |= (buff-&gt;len_l4 &lt;&lt; 8) |</div><div class='add'>+				     (buff-&gt;len_l3 &gt;&gt; 1);</div><div class='add'>+		}</div><div class='add'>+		if (buff-&gt;is_vlan) {</div><div class='add'>+			txd-&gt;ctl |= HW_ATL_B0_TXD_CTL_DESC_TYPE_TXC;</div><div class='add'>+			txd-&gt;ctl |= buff-&gt;vlan_tx_tag &lt;&lt; 4;</div><div class='add'>+			is_vlan = true;</div><div class='add'>+		}</div><div class='add'>+		if (!buff-&gt;is_gso_tcp &amp;&amp; !buff-&gt;is_gso_udp &amp;&amp; !buff-&gt;is_vlan) {</div><div class='add'>+			buff_pa_len = buff-&gt;len;</div><div class='add'>+</div><div class='add'>+			txd-&gt;buf_addr = buff-&gt;pa;</div><div class='add'>+			txd-&gt;ctl |= (HW_ATL_B0_TXD_CTL_BLEN &amp;</div><div class='add'>+						((u32)buff_pa_len &lt;&lt; 4));</div><div class='add'>+			txd-&gt;ctl |= HW_ATL_B0_TXD_CTL_DESC_TYPE_TXD;</div><div class='add'>+</div><div class='add'>+			/* PAY_LEN */</div><div class='add'>+			txd-&gt;ctl2 |= HW_ATL_B0_TXD_CTL2_LEN &amp; (pkt_len &lt;&lt; 14);</div><div class='add'>+</div><div class='add'>+			if (is_gso || is_vlan) {</div><div class='add'>+				/* enable tx context */</div><div class='add'>+				txd-&gt;ctl2 |= HW_ATL_B0_TXD_CTL2_CTX_EN;</div><div class='add'>+			}</div><div class='add'>+			if (is_gso)</div><div class='add'>+				txd-&gt;ctl |= HW_ATL_B0_TXD_CTL_CMD_LSO;</div><div class='add'>+</div><div class='add'>+			/* Tx checksum offloads */</div><div class='add'>+			if (buff-&gt;is_ip_cso)</div><div class='add'>+				txd-&gt;ctl |= HW_ATL_B0_TXD_CTL_CMD_IPCSO;</div><div class='add'>+</div><div class='add'>+			if (buff-&gt;is_udp_cso || buff-&gt;is_tcp_cso)</div><div class='add'>+				txd-&gt;ctl |= HW_ATL_B0_TXD_CTL_CMD_TUCSO;</div><div class='add'>+</div><div class='add'>+			if (is_vlan)</div><div class='add'>+				txd-&gt;ctl |= HW_ATL_B0_TXD_CTL_CMD_VLAN;</div><div class='add'>+</div><div class='add'>+			if (unlikely(buff-&gt;is_eop)) {</div><div class='add'>+				txd-&gt;ctl |= HW_ATL_B0_TXD_CTL_EOP;</div><div class='add'>+				txd-&gt;ctl |= HW_ATL_B0_TXD_CTL_CMD_WB;</div><div class='add'>+				is_gso = false;</div><div class='add'>+				is_vlan = false;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+		ring-&gt;sw_tail = aq_ring_next_dx(ring, ring-&gt;sw_tail);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hw_atl_b0_hw_tx_ring_tail_update(self, ring);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hw_atl_b0_hw_ring_rx_init(struct aq_hw_s *self, struct aq_ring_s *aq_ring,</div><div class='add'>+			      struct aq_ring_param_s *aq_ring_param)</div><div class='add'>+{</div><div class='add'>+	u32 dma_desc_addr_msw = (u32)(((u64)aq_ring-&gt;dx_ring_pa) &gt;&gt; 32);</div><div class='add'>+	u32 vlan_rx_stripping = self-&gt;aq_nic_cfg-&gt;is_vlan_rx_strip;</div><div class='add'>+	u32 dma_desc_addr_lsw = (u32)aq_ring-&gt;dx_ring_pa;</div><div class='add'>+</div><div class='add'>+	hw_atl_rdm_rx_desc_en_set(self, false, aq_ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	hw_atl_rdm_rx_desc_head_splitting_set(self, 0U, aq_ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	hw_atl_reg_rx_dma_desc_base_addresslswset(self, dma_desc_addr_lsw,</div><div class='add'>+						  aq_ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	hw_atl_reg_rx_dma_desc_base_addressmswset(self,</div><div class='add'>+						  dma_desc_addr_msw, aq_ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	hw_atl_rdm_rx_desc_len_set(self, aq_ring-&gt;size / 8U, aq_ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	hw_atl_rdm_rx_desc_data_buff_size_set(self,</div><div class='add'>+					      aq_ring-&gt;frame_max / 1024U,</div><div class='add'>+				       aq_ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	hw_atl_rdm_rx_desc_head_buff_size_set(self, 0U, aq_ring-&gt;idx);</div><div class='add'>+	hw_atl_rdm_rx_desc_head_splitting_set(self, 0U, aq_ring-&gt;idx);</div><div class='add'>+	hw_atl_rpo_rx_desc_vlan_stripping_set(self, !!vlan_rx_stripping,</div><div class='add'>+					      aq_ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	/* Rx ring set mode */</div><div class='add'>+</div><div class='add'>+	/* Mapping interrupt vector */</div><div class='add'>+	hw_atl_itr_irq_map_rx_set(self, aq_ring_param-&gt;vec_idx, aq_ring-&gt;idx);</div><div class='add'>+	hw_atl_itr_irq_map_en_rx_set(self, true, aq_ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	hw_atl_rdm_cpu_id_set(self, aq_ring_param-&gt;cpu, aq_ring-&gt;idx);</div><div class='add'>+	hw_atl_rdm_rx_desc_dca_en_set(self, 0U, aq_ring-&gt;idx);</div><div class='add'>+	hw_atl_rdm_rx_head_dca_en_set(self, 0U, aq_ring-&gt;idx);</div><div class='add'>+	hw_atl_rdm_rx_pld_dca_en_set(self, 0U, aq_ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hw_atl_b0_hw_ring_tx_init(struct aq_hw_s *self, struct aq_ring_s *aq_ring,</div><div class='add'>+			      struct aq_ring_param_s *aq_ring_param)</div><div class='add'>+{</div><div class='add'>+	u32 dma_desc_msw_addr = (u32)(((u64)aq_ring-&gt;dx_ring_pa) &gt;&gt; 32);</div><div class='add'>+	u32 dma_desc_lsw_addr = (u32)aq_ring-&gt;dx_ring_pa;</div><div class='add'>+</div><div class='add'>+	hw_atl_reg_tx_dma_desc_base_addresslswset(self, dma_desc_lsw_addr,</div><div class='add'>+						  aq_ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	hw_atl_reg_tx_dma_desc_base_addressmswset(self, dma_desc_msw_addr,</div><div class='add'>+						  aq_ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	hw_atl_tdm_tx_desc_len_set(self, aq_ring-&gt;size / 8U, aq_ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	hw_atl_b0_hw_tx_ring_tail_update(self, aq_ring);</div><div class='add'>+</div><div class='add'>+	/* Set Tx threshold */</div><div class='add'>+	hw_atl_tdm_tx_desc_wr_wb_threshold_set(self, 0U, aq_ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	/* Mapping interrupt vector */</div><div class='add'>+	hw_atl_itr_irq_map_tx_set(self, aq_ring_param-&gt;vec_idx, aq_ring-&gt;idx);</div><div class='add'>+	hw_atl_itr_irq_map_en_tx_set(self, true, aq_ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	hw_atl_tdm_cpu_id_set(self, aq_ring_param-&gt;cpu, aq_ring-&gt;idx);</div><div class='add'>+	hw_atl_tdm_tx_desc_dca_en_set(self, 0U, aq_ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hw_atl_b0_hw_ring_rx_fill(struct aq_hw_s *self, struct aq_ring_s *ring,</div><div class='add'>+			      unsigned int sw_tail_old)</div><div class='add'>+{</div><div class='add'>+	for (; sw_tail_old != ring-&gt;sw_tail;</div><div class='add'>+		sw_tail_old = aq_ring_next_dx(ring, sw_tail_old)) {</div><div class='add'>+		struct hw_atl_rxd_s *rxd =</div><div class='add'>+			(struct hw_atl_rxd_s *)&amp;ring-&gt;dx_ring[sw_tail_old *</div><div class='add'>+							HW_ATL_B0_RXD_SIZE];</div><div class='add'>+</div><div class='add'>+		struct aq_ring_buff_s *buff = &amp;ring-&gt;buff_ring[sw_tail_old];</div><div class='add'>+</div><div class='add'>+		rxd-&gt;buf_addr = buff-&gt;pa;</div><div class='add'>+		rxd-&gt;hdr_addr = 0U;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hw_atl_reg_rx_dma_desc_tail_ptr_set(self, sw_tail_old, ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_b0_hw_ring_hwts_rx_fill(struct aq_hw_s *self,</div><div class='add'>+					  struct aq_ring_s *ring)</div><div class='add'>+{</div><div class='add'>+	unsigned int i;</div><div class='add'>+</div><div class='add'>+	for (i = aq_ring_avail_dx(ring); i--;</div><div class='add'>+			ring-&gt;sw_tail = aq_ring_next_dx(ring, ring-&gt;sw_tail)) {</div><div class='add'>+		struct hw_atl_rxd_s *rxd =</div><div class='add'>+			(struct hw_atl_rxd_s *)</div><div class='add'>+			&amp;ring-&gt;dx_ring[ring-&gt;sw_tail * HW_ATL_B0_RXD_SIZE];</div><div class='add'>+</div><div class='add'>+		rxd-&gt;buf_addr = ring-&gt;dx_ring_pa + ring-&gt;size * ring-&gt;dx_size;</div><div class='add'>+		rxd-&gt;hdr_addr = 0U;</div><div class='add'>+	}</div><div class='add'>+	/* Make sure descriptors are updated before bump tail*/</div><div class='add'>+	wmb();</div><div class='add'>+</div><div class='add'>+	hw_atl_reg_rx_dma_desc_tail_ptr_set(self, ring-&gt;sw_tail, ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_b0_hw_ring_hwts_rx_receive(struct aq_hw_s *self,</div><div class='add'>+					     struct aq_ring_s *ring)</div><div class='add'>+{</div><div class='add'>+	while (ring-&gt;hw_head != ring-&gt;sw_tail) {</div><div class='add'>+		struct hw_atl_rxd_hwts_wb_s *hwts_wb =</div><div class='add'>+			(struct hw_atl_rxd_hwts_wb_s *)</div><div class='add'>+			(ring-&gt;dx_ring + (ring-&gt;hw_head * HW_ATL_B0_RXD_SIZE));</div><div class='add'>+</div><div class='add'>+		/* RxD is not done */</div><div class='add'>+		if (!(hwts_wb-&gt;sec_lw0 &amp; 0x1U))</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		ring-&gt;hw_head = aq_ring_next_dx(ring, ring-&gt;hw_head);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hw_atl_b0_hw_ring_tx_head_update(struct aq_hw_s *self,</div><div class='add'>+				     struct aq_ring_s *ring)</div><div class='add'>+{</div><div class='add'>+	unsigned int hw_head_;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	hw_head_ = hw_atl_tdm_tx_desc_head_ptr_get(self, ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	if (aq_utils_obj_test(&amp;self-&gt;flags, AQ_HW_FLAG_ERR_UNPLUG)) {</div><div class='add'>+		err = -ENXIO;</div><div class='add'>+		goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Validate that the new hw_head_ is reasonable. */</div><div class='add'>+	if (hw_head_ &gt;= ring-&gt;size) {</div><div class='add'>+		err = -ENXIO;</div><div class='add'>+		goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ring-&gt;hw_head = hw_head_;</div><div class='add'>+	err = aq_hw_err_from_flags(self);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hw_atl_b0_hw_ring_rx_receive(struct aq_hw_s *self, struct aq_ring_s *ring)</div><div class='add'>+{</div><div class='add'>+	for (; ring-&gt;hw_head != ring-&gt;sw_tail;</div><div class='add'>+		ring-&gt;hw_head = aq_ring_next_dx(ring, ring-&gt;hw_head)) {</div><div class='add'>+		struct aq_ring_buff_s *buff = NULL;</div><div class='add'>+		struct hw_atl_rxd_wb_s *rxd_wb = (struct hw_atl_rxd_wb_s *)</div><div class='add'>+			&amp;ring-&gt;dx_ring[ring-&gt;hw_head * HW_ATL_B0_RXD_SIZE];</div><div class='add'>+</div><div class='add'>+		unsigned int is_rx_check_sum_enabled = 0U;</div><div class='add'>+		unsigned int pkt_type = 0U;</div><div class='add'>+		u8 rx_stat = 0U;</div><div class='add'>+</div><div class='add'>+		if (!(rxd_wb-&gt;status &amp; 0x1U)) { /* RxD is not done */</div><div class='add'>+			break;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		buff = &amp;ring-&gt;buff_ring[ring-&gt;hw_head];</div><div class='add'>+</div><div class='add'>+		buff-&gt;flags = 0U;</div><div class='add'>+		buff-&gt;is_hash_l4 = 0U;</div><div class='add'>+</div><div class='add'>+		rx_stat = (0x0000003CU &amp; rxd_wb-&gt;status) &gt;&gt; 2;</div><div class='add'>+</div><div class='add'>+		is_rx_check_sum_enabled = (rxd_wb-&gt;type &gt;&gt; 19) &amp; 0x3U;</div><div class='add'>+</div><div class='add'>+		pkt_type = (rxd_wb-&gt;type &amp; HW_ATL_B0_RXD_WB_STAT_PKTTYPE) &gt;&gt;</div><div class='add'>+			   HW_ATL_B0_RXD_WB_STAT_PKTTYPE_SHIFT;</div><div class='add'>+</div><div class='add'>+		if (is_rx_check_sum_enabled &amp; BIT(0) &amp;&amp;</div><div class='add'>+		    (0x0U == (pkt_type &amp; 0x3U)))</div><div class='add'>+			buff-&gt;is_ip_cso = (rx_stat &amp; BIT(1)) ? 0U : 1U;</div><div class='add'>+</div><div class='add'>+		if (is_rx_check_sum_enabled &amp; BIT(1)) {</div><div class='add'>+			if (0x4U == (pkt_type &amp; 0x1CU))</div><div class='add'>+				buff-&gt;is_udp_cso = (rx_stat &amp; BIT(2)) ? 0U :</div><div class='add'>+						   !!(rx_stat &amp; BIT(3));</div><div class='add'>+			else if (0x0U == (pkt_type &amp; 0x1CU))</div><div class='add'>+				buff-&gt;is_tcp_cso = (rx_stat &amp; BIT(2)) ? 0U :</div><div class='add'>+						   !!(rx_stat &amp; BIT(3));</div><div class='add'>+		}</div><div class='add'>+		buff-&gt;is_cso_err = !!(rx_stat &amp; 0x6);</div><div class='add'>+		/* Checksum offload workaround for small packets */</div><div class='add'>+		if (unlikely(rxd_wb-&gt;pkt_len &lt;= 60)) {</div><div class='add'>+			buff-&gt;is_ip_cso = 0U;</div><div class='add'>+			buff-&gt;is_cso_err = 0U;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if (self-&gt;aq_nic_cfg-&gt;is_vlan_rx_strip &amp;&amp;</div><div class='add'>+		    ((pkt_type &amp; HW_ATL_B0_RXD_WB_PKTTYPE_VLAN) ||</div><div class='add'>+		     (pkt_type &amp; HW_ATL_B0_RXD_WB_PKTTYPE_VLAN_DOUBLE))) {</div><div class='add'>+			buff-&gt;is_vlan = 1;</div><div class='add'>+			buff-&gt;vlan_rx_tag = le16_to_cpu(rxd_wb-&gt;vlan);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		if ((rx_stat &amp; BIT(0)) || rxd_wb-&gt;type &amp; 0x1000U) {</div><div class='add'>+			/* MAC error or DMA error */</div><div class='add'>+			buff-&gt;is_error = 1U;</div><div class='add'>+		}</div><div class='add'>+		if (self-&gt;aq_nic_cfg-&gt;is_rss) {</div><div class='add'>+			/* last 4 byte */</div><div class='add'>+			u16 rss_type = rxd_wb-&gt;type &amp; 0xFU;</div><div class='add'>+</div><div class='add'>+			if (rss_type &amp;&amp; rss_type &lt; 0x8U) {</div><div class='add'>+				buff-&gt;is_hash_l4 = (rss_type == 0x4 ||</div><div class='add'>+				rss_type == 0x5);</div><div class='add'>+				buff-&gt;rss_hash = rxd_wb-&gt;rss_hash;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		buff-&gt;is_lro = !!(HW_ATL_B0_RXD_WB_STAT2_RSCCNT &amp;</div><div class='add'>+				  rxd_wb-&gt;status);</div><div class='add'>+		if (HW_ATL_B0_RXD_WB_STAT2_EOP &amp; rxd_wb-&gt;status) {</div><div class='add'>+			buff-&gt;len = rxd_wb-&gt;pkt_len %</div><div class='add'>+				ring-&gt;frame_max;</div><div class='add'>+			buff-&gt;len = buff-&gt;len ?</div><div class='add'>+				buff-&gt;len : ring-&gt;frame_max;</div><div class='add'>+			buff-&gt;next = 0U;</div><div class='add'>+			buff-&gt;is_eop = 1U;</div><div class='add'>+		} else {</div><div class='add'>+			buff-&gt;len =</div><div class='add'>+				rxd_wb-&gt;pkt_len &gt; ring-&gt;frame_max ?</div><div class='add'>+				ring-&gt;frame_max : rxd_wb-&gt;pkt_len;</div><div class='add'>+</div><div class='add'>+			if (buff-&gt;is_lro) {</div><div class='add'>+				/* LRO */</div><div class='add'>+				buff-&gt;next = rxd_wb-&gt;next_desc_ptr;</div><div class='add'>+				++ring-&gt;stats.rx.lro_packets;</div><div class='add'>+			} else {</div><div class='add'>+				/* jumbo */</div><div class='add'>+				buff-&gt;next =</div><div class='add'>+					aq_ring_next_dx(ring,</div><div class='add'>+							ring-&gt;hw_head);</div><div class='add'>+				++ring-&gt;stats.rx.jumbo_packets;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hw_atl_b0_hw_irq_enable(struct aq_hw_s *self, u64 mask)</div><div class='add'>+{</div><div class='add'>+	hw_atl_itr_irq_msk_setlsw_set(self, LODWORD(mask));</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hw_atl_b0_hw_irq_disable(struct aq_hw_s *self, u64 mask)</div><div class='add'>+{</div><div class='add'>+	hw_atl_itr_irq_msk_clearlsw_set(self, LODWORD(mask));</div><div class='add'>+	hw_atl_itr_irq_status_clearlsw_set(self, LODWORD(mask));</div><div class='add'>+</div><div class='add'>+	atomic_inc(&amp;self-&gt;dpc);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hw_atl_b0_hw_irq_read(struct aq_hw_s *self, u64 *mask)</div><div class='add'>+{</div><div class='add'>+	*mask = hw_atl_itr_irq_statuslsw_get(self);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define IS_FILTER_ENABLED(_F_) ((packet_filter &amp; (_F_)) ? 1U : 0U)</div><div class='add'>+</div><div class='add'>+int hw_atl_b0_hw_packet_filter_set(struct aq_hw_s *self,</div><div class='add'>+				   unsigned int packet_filter)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_cfg_s *cfg = self-&gt;aq_nic_cfg;</div><div class='add'>+	unsigned int i = 0U;</div><div class='add'>+	u32 vlan_promisc;</div><div class='add'>+	u32 l2_promisc;</div><div class='add'>+</div><div class='add'>+	l2_promisc = IS_FILTER_ENABLED(IFF_PROMISC) ||</div><div class='add'>+		     !!(cfg-&gt;priv_flags &amp; BIT(AQ_HW_LOOPBACK_DMA_NET));</div><div class='add'>+	vlan_promisc = l2_promisc || cfg-&gt;is_vlan_force_promisc;</div><div class='add'>+</div><div class='add'>+	hw_atl_rpfl2promiscuous_mode_en_set(self, l2_promisc);</div><div class='add'>+</div><div class='add'>+	hw_atl_rpf_vlan_prom_mode_en_set(self, vlan_promisc);</div><div class='add'>+</div><div class='add'>+	hw_atl_rpfl2multicast_flr_en_set(self,</div><div class='add'>+					 IS_FILTER_ENABLED(IFF_ALLMULTI) &amp;&amp;</div><div class='add'>+					 IS_FILTER_ENABLED(IFF_MULTICAST), 0);</div><div class='add'>+</div><div class='add'>+	hw_atl_rpfl2_accept_all_mc_packets_set(self,</div><div class='add'>+					      IS_FILTER_ENABLED(IFF_ALLMULTI) &amp;&amp;</div><div class='add'>+					      IS_FILTER_ENABLED(IFF_MULTICAST));</div><div class='add'>+</div><div class='add'>+	hw_atl_rpfl2broadcast_en_set(self, IS_FILTER_ENABLED(IFF_BROADCAST));</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	for (i = HW_ATL_B0_MAC_MIN; i &lt; HW_ATL_B0_MAC_MAX; ++i)</div><div class='add'>+		hw_atl_rpfl2_uc_flr_en_set(self,</div><div class='add'>+					   (cfg-&gt;is_mc_list_enabled &amp;&amp;</div><div class='add'>+					    (i &lt;= cfg-&gt;mc_list_count)) ?</div><div class='add'>+					   1U : 0U, i);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#undef IS_FILTER_ENABLED</div><div class='add'>+</div><div class='add'>+static int hw_atl_b0_hw_multicast_list_set(struct aq_hw_s *self,</div><div class='add'>+					   u8 ar_mac</div><div class='add'>+					   [AQ_HW_MULTICAST_ADDRESS_MAX]</div><div class='add'>+					   [ETH_ALEN],</div><div class='add'>+					   u32 count)</div><div class='add'>+{</div><div class='add'>+	int err = 0;</div><div class='add'>+	struct aq_nic_cfg_s *cfg = self-&gt;aq_nic_cfg;</div><div class='add'>+</div><div class='add'>+	if (count &gt; (HW_ATL_B0_MAC_MAX - HW_ATL_B0_MAC_MIN)) {</div><div class='add'>+		err = -EBADRQC;</div><div class='add'>+		goto err_exit;</div><div class='add'>+	}</div><div class='add'>+	for (cfg-&gt;mc_list_count = 0U;</div><div class='add'>+			cfg-&gt;mc_list_count &lt; count;</div><div class='add'>+			++cfg-&gt;mc_list_count) {</div><div class='add'>+		u32 i = cfg-&gt;mc_list_count;</div><div class='add'>+		u32 h = (ar_mac[i][0] &lt;&lt; 8) | (ar_mac[i][1]);</div><div class='add'>+		u32 l = (ar_mac[i][2] &lt;&lt; 24) | (ar_mac[i][3] &lt;&lt; 16) |</div><div class='add'>+					(ar_mac[i][4] &lt;&lt; 8) | ar_mac[i][5];</div><div class='add'>+</div><div class='add'>+		hw_atl_rpfl2_uc_flr_en_set(self, 0U, HW_ATL_B0_MAC_MIN + i);</div><div class='add'>+</div><div class='add'>+		hw_atl_rpfl2unicast_dest_addresslsw_set(self, l,</div><div class='add'>+							HW_ATL_B0_MAC_MIN + i);</div><div class='add'>+</div><div class='add'>+		hw_atl_rpfl2unicast_dest_addressmsw_set(self, h,</div><div class='add'>+							HW_ATL_B0_MAC_MIN + i);</div><div class='add'>+</div><div class='add'>+		hw_atl_rpfl2_uc_flr_en_set(self,</div><div class='add'>+					   (cfg-&gt;is_mc_list_enabled),</div><div class='add'>+					   HW_ATL_B0_MAC_MIN + i);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = aq_hw_err_from_flags(self);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_b0_hw_interrupt_moderation_set(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	unsigned int i = 0U;</div><div class='add'>+	u32 itr_tx = 2U;</div><div class='add'>+	u32 itr_rx = 2U;</div><div class='add'>+</div><div class='add'>+	switch (self-&gt;aq_nic_cfg-&gt;itr) {</div><div class='add'>+	case  AQ_CFG_INTERRUPT_MODERATION_ON:</div><div class='add'>+	case  AQ_CFG_INTERRUPT_MODERATION_AUTO:</div><div class='add'>+		hw_atl_tdm_tx_desc_wr_wb_irq_en_set(self, 0U);</div><div class='add'>+		hw_atl_tdm_tdm_intr_moder_en_set(self, 1U);</div><div class='add'>+		hw_atl_rdm_rx_desc_wr_wb_irq_en_set(self, 0U);</div><div class='add'>+		hw_atl_rdm_rdm_intr_moder_en_set(self, 1U);</div><div class='add'>+</div><div class='add'>+		if (self-&gt;aq_nic_cfg-&gt;itr == AQ_CFG_INTERRUPT_MODERATION_ON) {</div><div class='add'>+			/* HW timers are in 2us units */</div><div class='add'>+			int tx_max_timer = self-&gt;aq_nic_cfg-&gt;tx_itr / 2;</div><div class='add'>+			int tx_min_timer = tx_max_timer / 2;</div><div class='add'>+</div><div class='add'>+			int rx_max_timer = self-&gt;aq_nic_cfg-&gt;rx_itr / 2;</div><div class='add'>+			int rx_min_timer = rx_max_timer / 2;</div><div class='add'>+</div><div class='add'>+			tx_max_timer = min(HW_ATL_INTR_MODER_MAX, tx_max_timer);</div><div class='add'>+			tx_min_timer = min(HW_ATL_INTR_MODER_MIN, tx_min_timer);</div><div class='add'>+			rx_max_timer = min(HW_ATL_INTR_MODER_MAX, rx_max_timer);</div><div class='add'>+			rx_min_timer = min(HW_ATL_INTR_MODER_MIN, rx_min_timer);</div><div class='add'>+</div><div class='add'>+			itr_tx |= tx_min_timer &lt;&lt; 0x8U;</div><div class='add'>+			itr_tx |= tx_max_timer &lt;&lt; 0x10U;</div><div class='add'>+			itr_rx |= rx_min_timer &lt;&lt; 0x8U;</div><div class='add'>+			itr_rx |= rx_max_timer &lt;&lt; 0x10U;</div><div class='add'>+		} else {</div><div class='add'>+			static unsigned int hw_atl_b0_timers_table_tx_[][2] = {</div><div class='add'>+				{0xfU, 0xffU}, /* 10Gbit */</div><div class='add'>+				{0xfU, 0x1ffU}, /* 5Gbit */</div><div class='add'>+				{0xfU, 0x1ffU}, /* 5Gbit 5GS */</div><div class='add'>+				{0xfU, 0x1ffU}, /* 2.5Gbit */</div><div class='add'>+				{0xfU, 0x1ffU}, /* 1Gbit */</div><div class='add'>+				{0xfU, 0x1ffU}, /* 100Mbit */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			static unsigned int hw_atl_b0_timers_table_rx_[][2] = {</div><div class='add'>+				{0x6U, 0x38U},/* 10Gbit */</div><div class='add'>+				{0xCU, 0x70U},/* 5Gbit */</div><div class='add'>+				{0xCU, 0x70U},/* 5Gbit 5GS */</div><div class='add'>+				{0x18U, 0xE0U},/* 2.5Gbit */</div><div class='add'>+				{0x30U, 0x80U},/* 1Gbit */</div><div class='add'>+				{0x4U, 0x50U},/* 100Mbit */</div><div class='add'>+			};</div><div class='add'>+</div><div class='add'>+			unsigned int speed_index =</div><div class='add'>+					hw_atl_utils_mbps_2_speed_index(</div><div class='add'>+						self-&gt;aq_link_status.mbps);</div><div class='add'>+</div><div class='add'>+			/* Update user visible ITR settings */</div><div class='add'>+			self-&gt;aq_nic_cfg-&gt;tx_itr = hw_atl_b0_timers_table_tx_</div><div class='add'>+							[speed_index][1] * 2;</div><div class='add'>+			self-&gt;aq_nic_cfg-&gt;rx_itr = hw_atl_b0_timers_table_rx_</div><div class='add'>+							[speed_index][1] * 2;</div><div class='add'>+</div><div class='add'>+			itr_tx |= hw_atl_b0_timers_table_tx_</div><div class='add'>+						[speed_index][0] &lt;&lt; 0x8U;</div><div class='add'>+			itr_tx |= hw_atl_b0_timers_table_tx_</div><div class='add'>+						[speed_index][1] &lt;&lt; 0x10U;</div><div class='add'>+</div><div class='add'>+			itr_rx |= hw_atl_b0_timers_table_rx_</div><div class='add'>+						[speed_index][0] &lt;&lt; 0x8U;</div><div class='add'>+			itr_rx |= hw_atl_b0_timers_table_rx_</div><div class='add'>+						[speed_index][1] &lt;&lt; 0x10U;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case AQ_CFG_INTERRUPT_MODERATION_OFF:</div><div class='add'>+		hw_atl_tdm_tx_desc_wr_wb_irq_en_set(self, 1U);</div><div class='add'>+		hw_atl_tdm_tdm_intr_moder_en_set(self, 0U);</div><div class='add'>+		hw_atl_rdm_rx_desc_wr_wb_irq_en_set(self, 1U);</div><div class='add'>+		hw_atl_rdm_rdm_intr_moder_en_set(self, 0U);</div><div class='add'>+		itr_tx = 0U;</div><div class='add'>+		itr_rx = 0U;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = HW_ATL_B0_RINGS_MAX; i--;) {</div><div class='add'>+		hw_atl_reg_tx_intr_moder_ctrl_set(self, itr_tx, i);</div><div class='add'>+		hw_atl_reg_rx_intr_moder_ctrl_set(self, itr_rx, i);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_b0_hw_stop(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	hw_atl_b0_hw_irq_disable(self, HW_ATL_B0_INT_MASK);</div><div class='add'>+</div><div class='add'>+	return aq_hw_invalidate_descriptor_cache(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hw_atl_b0_hw_ring_tx_stop(struct aq_hw_s *self, struct aq_ring_s *ring)</div><div class='add'>+{</div><div class='add'>+	hw_atl_tdm_tx_desc_en_set(self, 0U, ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hw_atl_b0_hw_ring_rx_stop(struct aq_hw_s *self, struct aq_ring_s *ring)</div><div class='add'>+{</div><div class='add'>+	hw_atl_rdm_rx_desc_en_set(self, 0U, ring-&gt;idx);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define get_ptp_ts_val_u64(self, indx) \</div><div class='add'>+	((u64)(hw_atl_pcs_ptp_clock_get(self, indx) &amp; 0xffff))</div><div class='add'>+</div><div class='add'>+static void hw_atl_b0_get_ptp_ts(struct aq_hw_s *self, u64 *stamp)</div><div class='add'>+{</div><div class='add'>+	u64 ns;</div><div class='add'>+</div><div class='add'>+	hw_atl_pcs_ptp_clock_read_enable(self, 1);</div><div class='add'>+	hw_atl_pcs_ptp_clock_read_enable(self, 0);</div><div class='add'>+	ns = (get_ptp_ts_val_u64(self, 0) +</div><div class='add'>+	      (get_ptp_ts_val_u64(self, 1) &lt;&lt; 16)) * NSEC_PER_SEC +</div><div class='add'>+	     (get_ptp_ts_val_u64(self, 3) +</div><div class='add'>+	      (get_ptp_ts_val_u64(self, 4) &lt;&lt; 16));</div><div class='add'>+</div><div class='add'>+	*stamp = ns + self-&gt;ptp_clk_offset;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hw_atl_b0_adj_params_get(u64 freq, s64 adj, u32 *ns, u32 *fns)</div><div class='add'>+{</div><div class='add'>+	/* For accuracy, the digit is extended */</div><div class='add'>+	s64 base_ns = ((adj + NSEC_PER_SEC) * NSEC_PER_SEC);</div><div class='add'>+	u64 nsi_frac = 0;</div><div class='add'>+	u64 nsi;</div><div class='add'>+</div><div class='add'>+	base_ns = div64_s64(base_ns, freq);</div><div class='add'>+	nsi = div64_u64(base_ns, NSEC_PER_SEC);</div><div class='add'>+</div><div class='add'>+	if (base_ns != nsi * NSEC_PER_SEC) {</div><div class='add'>+		s64 divisor = div64_s64((s64)NSEC_PER_SEC * NSEC_PER_SEC,</div><div class='add'>+					base_ns - nsi * NSEC_PER_SEC);</div><div class='add'>+		nsi_frac = div64_s64(AQ_FRAC_PER_NS * NSEC_PER_SEC, divisor);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*ns = (u32)nsi;</div><div class='add'>+	*fns = (u32)nsi_frac;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void</div><div class='add'>+hw_atl_b0_mac_adj_param_calc(struct hw_fw_request_ptp_adj_freq *ptp_adj_freq,</div><div class='add'>+			     u64 phyfreq, u64 macfreq)</div><div class='add'>+{</div><div class='add'>+	s64 adj_fns_val;</div><div class='add'>+	s64 fns_in_sec_phy = phyfreq * (ptp_adj_freq-&gt;fns_phy +</div><div class='add'>+					AQ_FRAC_PER_NS * ptp_adj_freq-&gt;ns_phy);</div><div class='add'>+	s64 fns_in_sec_mac = macfreq * (ptp_adj_freq-&gt;fns_mac +</div><div class='add'>+					AQ_FRAC_PER_NS * ptp_adj_freq-&gt;ns_mac);</div><div class='add'>+	s64 fault_in_sec_phy = AQ_FRAC_PER_NS * NSEC_PER_SEC - fns_in_sec_phy;</div><div class='add'>+	s64 fault_in_sec_mac = AQ_FRAC_PER_NS * NSEC_PER_SEC - fns_in_sec_mac;</div><div class='add'>+	/* MAC MCP counter freq is macfreq / 4 */</div><div class='add'>+	s64 diff_in_mcp_overflow = (fault_in_sec_mac - fault_in_sec_phy) *</div><div class='add'>+				   4 * AQ_FRAC_PER_NS;</div><div class='add'>+</div><div class='add'>+	diff_in_mcp_overflow = div64_s64(diff_in_mcp_overflow,</div><div class='add'>+					 AQ_HW_MAC_COUNTER_HZ);</div><div class='add'>+	adj_fns_val = (ptp_adj_freq-&gt;fns_mac + AQ_FRAC_PER_NS *</div><div class='add'>+		       ptp_adj_freq-&gt;ns_mac) + diff_in_mcp_overflow;</div><div class='add'>+</div><div class='add'>+	ptp_adj_freq-&gt;mac_ns_adj = div64_s64(adj_fns_val, AQ_FRAC_PER_NS);</div><div class='add'>+	ptp_adj_freq-&gt;mac_fns_adj = adj_fns_val - ptp_adj_freq-&gt;mac_ns_adj *</div><div class='add'>+				    AQ_FRAC_PER_NS;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_b0_adj_sys_clock(struct aq_hw_s *self, s64 delta)</div><div class='add'>+{</div><div class='add'>+	self-&gt;ptp_clk_offset += delta;</div><div class='add'>+</div><div class='add'>+	self-&gt;aq_fw_ops-&gt;adjust_ptp(self, self-&gt;ptp_clk_offset);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_b0_set_sys_clock(struct aq_hw_s *self, u64 time, u64 ts)</div><div class='add'>+{</div><div class='add'>+	s64 delta = time - (self-&gt;ptp_clk_offset + ts);</div><div class='add'>+</div><div class='add'>+	return hw_atl_b0_adj_sys_clock(self, delta);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_b0_ts_to_sys_clock(struct aq_hw_s *self, u64 ts, u64 *time)</div><div class='add'>+{</div><div class='add'>+	*time = self-&gt;ptp_clk_offset + ts;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_b0_adj_clock_freq(struct aq_hw_s *self, s32 ppb)</div><div class='add'>+{</div><div class='add'>+	struct hw_fw_request_iface fwreq;</div><div class='add'>+	size_t size;</div><div class='add'>+</div><div class='add'>+	memset(&amp;fwreq, 0, sizeof(fwreq));</div><div class='add'>+</div><div class='add'>+	fwreq.msg_id = HW_AQ_FW_REQUEST_PTP_ADJ_FREQ;</div><div class='add'>+	hw_atl_b0_adj_params_get(AQ_HW_MAC_COUNTER_HZ, ppb,</div><div class='add'>+				 &amp;fwreq.ptp_adj_freq.ns_mac,</div><div class='add'>+				 &amp;fwreq.ptp_adj_freq.fns_mac);</div><div class='add'>+	hw_atl_b0_adj_params_get(AQ_HW_PHY_COUNTER_HZ, ppb,</div><div class='add'>+				 &amp;fwreq.ptp_adj_freq.ns_phy,</div><div class='add'>+				 &amp;fwreq.ptp_adj_freq.fns_phy);</div><div class='add'>+	hw_atl_b0_mac_adj_param_calc(&amp;fwreq.ptp_adj_freq,</div><div class='add'>+				     AQ_HW_PHY_COUNTER_HZ,</div><div class='add'>+				     AQ_HW_MAC_COUNTER_HZ);</div><div class='add'>+</div><div class='add'>+	size = sizeof(fwreq.msg_id) + sizeof(fwreq.ptp_adj_freq);</div><div class='add'>+	return self-&gt;aq_fw_ops-&gt;send_fw_request(self, &amp;fwreq, size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_b0_gpio_pulse(struct aq_hw_s *self, u32 index,</div><div class='add'>+				u64 start, u32 period)</div><div class='add'>+{</div><div class='add'>+	struct hw_fw_request_iface fwreq;</div><div class='add'>+	size_t size;</div><div class='add'>+</div><div class='add'>+	memset(&amp;fwreq, 0, sizeof(fwreq));</div><div class='add'>+</div><div class='add'>+	fwreq.msg_id = HW_AQ_FW_REQUEST_PTP_GPIO_CTRL;</div><div class='add'>+	fwreq.ptp_gpio_ctrl.index = index;</div><div class='add'>+	fwreq.ptp_gpio_ctrl.period = period;</div><div class='add'>+	/* Apply time offset */</div><div class='add'>+	fwreq.ptp_gpio_ctrl.start = start;</div><div class='add'>+</div><div class='add'>+	size = sizeof(fwreq.msg_id) + sizeof(fwreq.ptp_gpio_ctrl);</div><div class='add'>+	return self-&gt;aq_fw_ops-&gt;send_fw_request(self, &amp;fwreq, size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_b0_extts_gpio_enable(struct aq_hw_s *self, u32 index,</div><div class='add'>+				       u32 enable)</div><div class='add'>+{</div><div class='add'>+	/* Enable/disable Sync1588 GPIO Timestamping */</div><div class='add'>+	aq_phy_write_reg(self, MDIO_MMD_PCS, 0xc611, enable ? 0x71 : 0);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_b0_get_sync_ts(struct aq_hw_s *self, u64 *ts)</div><div class='add'>+{</div><div class='add'>+	u64 sec_l;</div><div class='add'>+	u64 sec_h;</div><div class='add'>+	u64 nsec_l;</div><div class='add'>+	u64 nsec_h;</div><div class='add'>+</div><div class='add'>+	if (!ts)</div><div class='add'>+		return -1;</div><div class='add'>+</div><div class='add'>+	/* PTP external GPIO clock seconds count 15:0 */</div><div class='add'>+	sec_l = aq_phy_read_reg(self, MDIO_MMD_PCS, 0xc914);</div><div class='add'>+	/* PTP external GPIO clock seconds count 31:16 */</div><div class='add'>+	sec_h = aq_phy_read_reg(self, MDIO_MMD_PCS, 0xc915);</div><div class='add'>+	/* PTP external GPIO clock nanoseconds count 15:0 */</div><div class='add'>+	nsec_l = aq_phy_read_reg(self, MDIO_MMD_PCS, 0xc916);</div><div class='add'>+	/* PTP external GPIO clock nanoseconds count 31:16 */</div><div class='add'>+	nsec_h = aq_phy_read_reg(self, MDIO_MMD_PCS, 0xc917);</div><div class='add'>+</div><div class='add'>+	*ts = (nsec_h &lt;&lt; 16) + nsec_l + ((sec_h &lt;&lt; 16) + sec_l) * NSEC_PER_SEC;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u16 hw_atl_b0_rx_extract_ts(struct aq_hw_s *self, u8 *p,</div><div class='add'>+				   unsigned int len, u64 *timestamp)</div><div class='add'>+{</div><div class='add'>+	unsigned int offset = 14;</div><div class='add'>+	struct ethhdr *eth;</div><div class='add'>+	__be64 sec;</div><div class='add'>+	__be32 ns;</div><div class='add'>+	u8 *ptr;</div><div class='add'>+</div><div class='add'>+	if (len &lt;= offset || !timestamp)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	/* The TIMESTAMP in the end of package has following format:</div><div class='add'>+	 * (big-endian)</div><div class='add'>+	 *   struct {</div><div class='add'>+	 *     uint64_t sec;</div><div class='add'>+	 *     uint32_t ns;</div><div class='add'>+	 *     uint16_t stream_id;</div><div class='add'>+	 *   };</div><div class='add'>+	 */</div><div class='add'>+	ptr = p + (len - offset);</div><div class='add'>+	memcpy(&amp;sec, ptr, sizeof(sec));</div><div class='add'>+	ptr += sizeof(sec);</div><div class='add'>+	memcpy(&amp;ns, ptr, sizeof(ns));</div><div class='add'>+</div><div class='add'>+	*timestamp = (be64_to_cpu(sec) &amp; 0xffffffffffffllu) * NSEC_PER_SEC +</div><div class='add'>+		     be32_to_cpu(ns) + self-&gt;ptp_clk_offset;</div><div class='add'>+</div><div class='add'>+	eth = (struct ethhdr *)p;</div><div class='add'>+</div><div class='add'>+	return (eth-&gt;h_proto == htons(ETH_P_1588)) ? 12 : 14;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_b0_extract_hwts(struct aq_hw_s *self, u8 *p, unsigned int len,</div><div class='add'>+				  u64 *timestamp)</div><div class='add'>+{</div><div class='add'>+	struct hw_atl_rxd_hwts_wb_s *hwts_wb = (struct hw_atl_rxd_hwts_wb_s *)p;</div><div class='add'>+	u64 tmp, sec, ns;</div><div class='add'>+</div><div class='add'>+	sec = 0;</div><div class='add'>+	tmp = (hwts_wb-&gt;sec_lw0 &gt;&gt; 2) &amp; 0x3ff;</div><div class='add'>+	sec += tmp;</div><div class='add'>+	tmp = (u64)((hwts_wb-&gt;sec_lw1 &gt;&gt; 16) &amp; 0xffff) &lt;&lt; 10;</div><div class='add'>+	sec += tmp;</div><div class='add'>+	tmp = (u64)(hwts_wb-&gt;sec_hw &amp; 0xfff) &lt;&lt; 26;</div><div class='add'>+	sec += tmp;</div><div class='add'>+	tmp = (u64)((hwts_wb-&gt;sec_hw &gt;&gt; 22) &amp; 0x3ff) &lt;&lt; 38;</div><div class='add'>+	sec += tmp;</div><div class='add'>+	ns = sec * NSEC_PER_SEC + hwts_wb-&gt;ns;</div><div class='add'>+	if (timestamp)</div><div class='add'>+		*timestamp = ns + self-&gt;ptp_clk_offset;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_b0_hw_fl3l4_clear(struct aq_hw_s *self,</div><div class='add'>+				    struct aq_rx_filter_l3l4 *data)</div><div class='add'>+{</div><div class='add'>+	u8 location = data-&gt;location;</div><div class='add'>+</div><div class='add'>+	if (!data-&gt;is_ipv6) {</div><div class='add'>+		hw_atl_rpfl3l4_cmd_clear(self, location);</div><div class='add'>+		hw_atl_rpf_l4_spd_set(self, 0U, location);</div><div class='add'>+		hw_atl_rpf_l4_dpd_set(self, 0U, location);</div><div class='add'>+		hw_atl_rpfl3l4_ipv4_src_addr_clear(self, location);</div><div class='add'>+		hw_atl_rpfl3l4_ipv4_dest_addr_clear(self, location);</div><div class='add'>+	} else {</div><div class='add'>+		int i;</div><div class='add'>+</div><div class='add'>+		for (i = 0; i &lt; HW_ATL_RX_CNT_REG_ADDR_IPV6; ++i) {</div><div class='add'>+			hw_atl_rpfl3l4_cmd_clear(self, location + i);</div><div class='add'>+			hw_atl_rpf_l4_spd_set(self, 0U, location + i);</div><div class='add'>+			hw_atl_rpf_l4_dpd_set(self, 0U, location + i);</div><div class='add'>+		}</div><div class='add'>+		hw_atl_rpfl3l4_ipv6_src_addr_clear(self, location);</div><div class='add'>+		hw_atl_rpfl3l4_ipv6_dest_addr_clear(self, location);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_b0_hw_fl3l4_set(struct aq_hw_s *self,</div><div class='add'>+				  struct aq_rx_filter_l3l4 *data)</div><div class='add'>+{</div><div class='add'>+	u8 location = data-&gt;location;</div><div class='add'>+</div><div class='add'>+	hw_atl_b0_hw_fl3l4_clear(self, data);</div><div class='add'>+</div><div class='add'>+	if (data-&gt;cmd &amp; (HW_ATL_RX_ENABLE_CMP_DEST_ADDR_L3 |</div><div class='add'>+			 HW_ATL_RX_ENABLE_CMP_SRC_ADDR_L3)) {</div><div class='add'>+		if (!data-&gt;is_ipv6) {</div><div class='add'>+			hw_atl_rpfl3l4_ipv4_dest_addr_set(self,</div><div class='add'>+							  location,</div><div class='add'>+							  data-&gt;ip_dst[0]);</div><div class='add'>+			hw_atl_rpfl3l4_ipv4_src_addr_set(self,</div><div class='add'>+							 location,</div><div class='add'>+							 data-&gt;ip_src[0]);</div><div class='add'>+		} else {</div><div class='add'>+			hw_atl_rpfl3l4_ipv6_dest_addr_set(self,</div><div class='add'>+							  location,</div><div class='add'>+							  data-&gt;ip_dst);</div><div class='add'>+			hw_atl_rpfl3l4_ipv6_src_addr_set(self,</div><div class='add'>+							 location,</div><div class='add'>+							 data-&gt;ip_src);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (data-&gt;cmd &amp; (HW_ATL_RX_ENABLE_CMP_DEST_PORT_L4 |</div><div class='add'>+			 HW_ATL_RX_ENABLE_CMP_SRC_PORT_L4)) {</div><div class='add'>+		hw_atl_rpf_l4_dpd_set(self, data-&gt;p_dst, location);</div><div class='add'>+		hw_atl_rpf_l4_spd_set(self, data-&gt;p_src, location);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hw_atl_rpfl3l4_cmd_set(self, location, data-&gt;cmd);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_b0_hw_fl2_set(struct aq_hw_s *self,</div><div class='add'>+				struct aq_rx_filter_l2 *data)</div><div class='add'>+{</div><div class='add'>+	hw_atl_rpf_etht_flr_en_set(self, 1U, data-&gt;location);</div><div class='add'>+	hw_atl_rpf_etht_flr_set(self, data-&gt;ethertype, data-&gt;location);</div><div class='add'>+	hw_atl_rpf_etht_user_priority_en_set(self,</div><div class='add'>+					     !!data-&gt;user_priority_en,</div><div class='add'>+					     data-&gt;location);</div><div class='add'>+	if (data-&gt;user_priority_en)</div><div class='add'>+		hw_atl_rpf_etht_user_priority_set(self,</div><div class='add'>+						  data-&gt;user_priority,</div><div class='add'>+						  data-&gt;location);</div><div class='add'>+</div><div class='add'>+	if (data-&gt;queue &lt; 0) {</div><div class='add'>+		hw_atl_rpf_etht_flr_act_set(self, 0U, data-&gt;location);</div><div class='add'>+		hw_atl_rpf_etht_rx_queue_en_set(self, 0U, data-&gt;location);</div><div class='add'>+	} else {</div><div class='add'>+		hw_atl_rpf_etht_flr_act_set(self, 1U, data-&gt;location);</div><div class='add'>+		hw_atl_rpf_etht_rx_queue_en_set(self, 1U, data-&gt;location);</div><div class='add'>+		hw_atl_rpf_etht_rx_queue_set(self, data-&gt;queue, data-&gt;location);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_b0_hw_fl2_clear(struct aq_hw_s *self,</div><div class='add'>+				  struct aq_rx_filter_l2 *data)</div><div class='add'>+{</div><div class='add'>+	hw_atl_rpf_etht_flr_en_set(self, 0U, data-&gt;location);</div><div class='add'>+	hw_atl_rpf_etht_flr_set(self, 0U, data-&gt;location);</div><div class='add'>+	hw_atl_rpf_etht_user_priority_en_set(self, 0U, data-&gt;location);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/*</div><div class='add'>+ * @brief Set VLAN filter table</div><div class='add'>+ * @details Configure VLAN filter table to accept (and assign the queue) traffic</div><div class='add'>+ *  for the particular vlan ids.</div><div class='add'>+ * Note: use this function under vlan promisc mode not to lost the traffic</div><div class='add'>+ *</div><div class='add'>+ * @param aq_hw_s</div><div class='add'>+ * @param aq_rx_filter_vlan VLAN filter configuration</div><div class='add'>+ * @return 0 - OK, &lt;0 - error</div><div class='add'>+ */</div><div class='add'>+static int hw_atl_b0_hw_vlan_set(struct aq_hw_s *self,</div><div class='add'>+				 struct aq_rx_filter_vlan *aq_vlans)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; AQ_VLAN_MAX_FILTERS; i++) {</div><div class='add'>+		hw_atl_rpf_vlan_flr_en_set(self, 0U, i);</div><div class='add'>+		hw_atl_rpf_vlan_rxq_en_flr_set(self, 0U, i);</div><div class='add'>+		if (aq_vlans[i].enable) {</div><div class='add'>+			hw_atl_rpf_vlan_id_flr_set(self,</div><div class='add'>+						   aq_vlans[i].vlan_id,</div><div class='add'>+						   i);</div><div class='add'>+			hw_atl_rpf_vlan_flr_act_set(self, 1U, i);</div><div class='add'>+			hw_atl_rpf_vlan_flr_en_set(self, 1U, i);</div><div class='add'>+			if (aq_vlans[i].queue != 0xFF) {</div><div class='add'>+				hw_atl_rpf_vlan_rxq_flr_set(self,</div><div class='add'>+							    aq_vlans[i].queue,</div><div class='add'>+							    i);</div><div class='add'>+				hw_atl_rpf_vlan_rxq_en_flr_set(self, 1U, i);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_b0_hw_vlan_ctrl(struct aq_hw_s *self, bool enable)</div><div class='add'>+{</div><div class='add'>+	/* set promisc in case of disabing the vland filter */</div><div class='add'>+	hw_atl_rpf_vlan_prom_mode_en_set(self, !enable);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hw_atl_b0_set_loopback(struct aq_hw_s *self, u32 mode, bool enable)</div><div class='add'>+{</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case AQ_HW_LOOPBACK_DMA_SYS:</div><div class='add'>+		hw_atl_tpb_tx_dma_sys_lbk_en_set(self, enable);</div><div class='add'>+		hw_atl_rpb_dma_sys_lbk_set(self, enable);</div><div class='add'>+		break;</div><div class='add'>+	case AQ_HW_LOOPBACK_PKT_SYS:</div><div class='add'>+		hw_atl_tpo_tx_pkt_sys_lbk_en_set(self, enable);</div><div class='add'>+		hw_atl_rpf_tpo_to_rpf_sys_lbk_set(self, enable);</div><div class='add'>+		break;</div><div class='add'>+	case AQ_HW_LOOPBACK_DMA_NET:</div><div class='add'>+		hw_atl_rpf_vlan_prom_mode_en_set(self, enable);</div><div class='add'>+		hw_atl_rpfl2promiscuous_mode_en_set(self, enable);</div><div class='add'>+		hw_atl_tpb_tx_tx_clk_gate_en_set(self, !enable);</div><div class='add'>+		hw_atl_tpb_tx_dma_net_lbk_en_set(self, enable);</div><div class='add'>+		hw_atl_rpb_dma_net_lbk_set(self, enable);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 hw_atl_b0_ts_ready_and_latch_high_get(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	if (hw_atl_ts_ready_get(self) &amp;&amp; hw_atl_ts_ready_latch_high_get(self))</div><div class='add'>+		return 1;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_b0_get_mac_temp(struct aq_hw_s *self, u32 *temp)</div><div class='add'>+{</div><div class='add'>+	bool ts_disabled;</div><div class='add'>+	int err;</div><div class='add'>+	u32 val;</div><div class='add'>+	u32 ts;</div><div class='add'>+</div><div class='add'>+	ts_disabled = (hw_atl_ts_power_down_get(self) == 1U);</div><div class='add'>+</div><div class='add'>+	if (ts_disabled) {</div><div class='add'>+		// Set AFE Temperature Sensor to on (off by default)</div><div class='add'>+		hw_atl_ts_power_down_set(self, 0U);</div><div class='add'>+</div><div class='add'>+		// Reset internal capacitors, biasing, and counters</div><div class='add'>+		hw_atl_ts_reset_set(self, 1);</div><div class='add'>+		hw_atl_ts_reset_set(self, 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = readx_poll_timeout(hw_atl_b0_ts_ready_and_latch_high_get, self,</div><div class='add'>+				 val, val == 1, 10000U, 500000U);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	ts = hw_atl_ts_data_get(self);</div><div class='add'>+	*temp = ts * ts * 16 / 100000 + 60 * ts - 83410;</div><div class='add'>+</div><div class='add'>+	if (ts_disabled) {</div><div class='add'>+		// Set AFE Temperature Sensor back to off</div><div class='add'>+		hw_atl_ts_power_down_set(self, 1U);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define START_TRANSMIT 0x5001</div><div class='add'>+#define START_READ_TRANSMIT 0x5101</div><div class='add'>+#define STOP_TRANSMIT 0x3001</div><div class='add'>+#define REPEAT_TRANSMIT 0x1001</div><div class='add'>+#define REPEAT_NACK_TRANSMIT 0x1011</div><div class='add'>+</div><div class='add'>+static int hw_atl_b0_smb0_wait_result(struct aq_hw_s *self, bool expect_ack)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	err = readx_poll_timeout(hw_atl_smb0_byte_transfer_complete_get,</div><div class='add'>+				 self, val, val == 1, 100U, 10000U);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+	if (hw_atl_smb0_receive_acknowledged_get(self) != expect_ack)</div><div class='add'>+		return -EIO;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Starts an I2C/SMBUS write to a given address. addr is in 7-bit format,</div><div class='add'>+ * the read/write bit is not part of it.</div><div class='add'>+ */</div><div class='add'>+static int hw_atl_b0_smb0_start_write(struct aq_hw_s *self, u32 addr)</div><div class='add'>+{</div><div class='add'>+	hw_atl_smb0_tx_data_set(self, (addr &lt;&lt; 1) | 0);</div><div class='add'>+	hw_atl_smb0_provisioning2_set(self, START_TRANSMIT);</div><div class='add'>+	return hw_atl_b0_smb0_wait_result(self, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Writes a single byte as part of an ongoing write started by start_write. */</div><div class='add'>+static int hw_atl_b0_smb0_write_byte(struct aq_hw_s *self, u32 data)</div><div class='add'>+{</div><div class='add'>+	hw_atl_smb0_tx_data_set(self, data);</div><div class='add'>+	hw_atl_smb0_provisioning2_set(self, REPEAT_TRANSMIT);</div><div class='add'>+	return hw_atl_b0_smb0_wait_result(self, 0);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Starts an I2C/SMBUS read to a given address. addr is in 7-bit format,</div><div class='add'>+ * the read/write bit is not part of it.</div><div class='add'>+ */</div><div class='add'>+static int hw_atl_b0_smb0_start_read(struct aq_hw_s *self, u32 addr)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	hw_atl_smb0_tx_data_set(self, (addr &lt;&lt; 1) | 1);</div><div class='add'>+	hw_atl_smb0_provisioning2_set(self, START_READ_TRANSMIT);</div><div class='add'>+	err = hw_atl_b0_smb0_wait_result(self, 0);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+	if (hw_atl_smb0_repeated_start_detect_get(self) == 0)</div><div class='add'>+		return -EIO;</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Reads a single byte as part of an ongoing read started by start_read. */</div><div class='add'>+static int hw_atl_b0_smb0_read_byte(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	hw_atl_smb0_provisioning2_set(self, REPEAT_TRANSMIT);</div><div class='add'>+	err = hw_atl_b0_smb0_wait_result(self, 0);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+	return hw_atl_smb0_rx_data_get(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Reads the last byte of an ongoing read. */</div><div class='add'>+static int hw_atl_b0_smb0_read_byte_nack(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	hw_atl_smb0_provisioning2_set(self, REPEAT_NACK_TRANSMIT);</div><div class='add'>+	err = hw_atl_b0_smb0_wait_result(self, 1);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+	return hw_atl_smb0_rx_data_get(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* Sends a stop condition and ends a transfer. */</div><div class='add'>+static void hw_atl_b0_smb0_stop(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	hw_atl_smb0_provisioning2_set(self, STOP_TRANSMIT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_b0_read_module_eeprom(struct aq_hw_s *self, u8 dev_addr,</div><div class='add'>+					u8 reg_start_addr, int len, u8 *data)</div><div class='add'>+{</div><div class='add'>+	int i, b;</div><div class='add'>+	int err;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	/* Wait for SMBUS0 to be idle */</div><div class='add'>+	err = readx_poll_timeout(hw_atl_smb0_bus_busy_get, self,</div><div class='add'>+				 val, val == 0, 100U, 10000U);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	err = hw_atl_b0_smb0_start_write(self, dev_addr);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	err = hw_atl_b0_smb0_write_byte(self, reg_start_addr);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	err = hw_atl_b0_smb0_start_read(self, dev_addr);</div><div class='add'>+	if (err)</div><div class='add'>+		goto out;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; len - 1; i++) {</div><div class='add'>+		b = hw_atl_b0_smb0_read_byte(self);</div><div class='add'>+		if (b &lt; 0) {</div><div class='add'>+			err = b;</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+		data[i] = (u8)b;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	b = hw_atl_b0_smb0_read_byte_nack(self);</div><div class='add'>+	if (b &lt; 0) {</div><div class='add'>+		err = b;</div><div class='add'>+		goto out;</div><div class='add'>+	}</div><div class='add'>+	data[i] = (u8)b;</div><div class='add'>+</div><div class='add'>+out:</div><div class='add'>+	hw_atl_b0_smb0_stop(self);</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct aq_hw_ops hw_atl_ops_b0 = {</div><div class='add'>+	.hw_soft_reset        = hw_atl_utils_soft_reset,</div><div class='add'>+	.hw_prepare           = hw_atl_utils_initfw,</div><div class='add'>+	.hw_set_mac_address   = hw_atl_b0_hw_mac_addr_set,</div><div class='add'>+	.hw_init              = hw_atl_b0_hw_init,</div><div class='add'>+	.hw_reset             = hw_atl_b0_hw_reset,</div><div class='add'>+	.hw_start             = hw_atl_b0_hw_start,</div><div class='add'>+	.hw_ring_tx_start     = hw_atl_b0_hw_ring_tx_start,</div><div class='add'>+	.hw_ring_tx_stop      = hw_atl_b0_hw_ring_tx_stop,</div><div class='add'>+	.hw_ring_rx_start     = hw_atl_b0_hw_ring_rx_start,</div><div class='add'>+	.hw_ring_rx_stop      = hw_atl_b0_hw_ring_rx_stop,</div><div class='add'>+	.hw_stop              = hw_atl_b0_hw_stop,</div><div class='add'>+</div><div class='add'>+	.hw_ring_tx_xmit         = hw_atl_b0_hw_ring_tx_xmit,</div><div class='add'>+	.hw_ring_tx_head_update  = hw_atl_b0_hw_ring_tx_head_update,</div><div class='add'>+</div><div class='add'>+	.hw_ring_rx_receive      = hw_atl_b0_hw_ring_rx_receive,</div><div class='add'>+	.hw_ring_rx_fill         = hw_atl_b0_hw_ring_rx_fill,</div><div class='add'>+</div><div class='add'>+	.hw_irq_enable           = hw_atl_b0_hw_irq_enable,</div><div class='add'>+	.hw_irq_disable          = hw_atl_b0_hw_irq_disable,</div><div class='add'>+	.hw_irq_read             = hw_atl_b0_hw_irq_read,</div><div class='add'>+</div><div class='add'>+	.hw_ring_rx_init             = hw_atl_b0_hw_ring_rx_init,</div><div class='add'>+	.hw_ring_tx_init             = hw_atl_b0_hw_ring_tx_init,</div><div class='add'>+	.hw_packet_filter_set        = hw_atl_b0_hw_packet_filter_set,</div><div class='add'>+	.hw_filter_l2_set            = hw_atl_b0_hw_fl2_set,</div><div class='add'>+	.hw_filter_l2_clear          = hw_atl_b0_hw_fl2_clear,</div><div class='add'>+	.hw_filter_l3l4_set          = hw_atl_b0_hw_fl3l4_set,</div><div class='add'>+	.hw_filter_vlan_set          = hw_atl_b0_hw_vlan_set,</div><div class='add'>+	.hw_filter_vlan_ctrl         = hw_atl_b0_hw_vlan_ctrl,</div><div class='add'>+	.hw_multicast_list_set       = hw_atl_b0_hw_multicast_list_set,</div><div class='add'>+	.hw_interrupt_moderation_set = hw_atl_b0_hw_interrupt_moderation_set,</div><div class='add'>+	.hw_rss_set                  = hw_atl_b0_hw_rss_set,</div><div class='add'>+	.hw_rss_hash_set             = hw_atl_b0_hw_rss_hash_set,</div><div class='add'>+	.hw_tc_rate_limit_set        = hw_atl_b0_hw_init_tx_tc_rate_limit,</div><div class='add'>+	.hw_get_regs                 = hw_atl_utils_hw_get_regs,</div><div class='add'>+	.hw_get_hw_stats             = hw_atl_utils_get_hw_stats,</div><div class='add'>+	.hw_get_fw_version           = hw_atl_utils_get_fw_version,</div><div class='add'>+</div><div class='add'>+	.hw_ring_hwts_rx_fill        = hw_atl_b0_hw_ring_hwts_rx_fill,</div><div class='add'>+	.hw_ring_hwts_rx_receive     = hw_atl_b0_hw_ring_hwts_rx_receive,</div><div class='add'>+</div><div class='add'>+	.hw_get_ptp_ts           = hw_atl_b0_get_ptp_ts,</div><div class='add'>+	.hw_adj_sys_clock        = hw_atl_b0_adj_sys_clock,</div><div class='add'>+	.hw_set_sys_clock        = hw_atl_b0_set_sys_clock,</div><div class='add'>+	.hw_ts_to_sys_clock      = hw_atl_b0_ts_to_sys_clock,</div><div class='add'>+	.hw_adj_clock_freq       = hw_atl_b0_adj_clock_freq,</div><div class='add'>+	.hw_gpio_pulse           = hw_atl_b0_gpio_pulse,</div><div class='add'>+	.hw_extts_gpio_enable    = hw_atl_b0_extts_gpio_enable,</div><div class='add'>+	.hw_get_sync_ts          = hw_atl_b0_get_sync_ts,</div><div class='add'>+	.rx_extract_ts           = hw_atl_b0_rx_extract_ts,</div><div class='add'>+	.extract_hwts            = hw_atl_b0_extract_hwts,</div><div class='add'>+	.hw_set_offload          = hw_atl_b0_hw_offload_set,</div><div class='add'>+	.hw_set_loopback         = hw_atl_b0_set_loopback,</div><div class='add'>+	.hw_set_fc               = hw_atl_b0_set_fc,</div><div class='add'>+</div><div class='add'>+	.hw_get_mac_temp         = hw_atl_b0_get_mac_temp,</div><div class='add'>+	.hw_read_module_eeprom   = hw_atl_b0_read_module_eeprom,</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.h b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.h<br/>new file mode 100644<br/>index 000000000000..5298846dd9f7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.h</a></div><div class='hunk'>@@ -0,0 +1,75 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2014-2019 aQuantia Corporation</div><div class='add'>+ * Copyright (C) 2019-2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* File hw_atl_b0.h: Declaration of abstract interface for Atlantic hardware</div><div class='add'>+ * specific functions.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef HW_ATL_B0_H</div><div class='add'>+#define HW_ATL_B0_H</div><div class='add'>+</div><div class='add'>+#include "../aq_common.h"</div><div class='add'>+</div><div class='add'>+extern const struct aq_hw_caps_s hw_atl_b0_caps_aqc100;</div><div class='add'>+extern const struct aq_hw_caps_s hw_atl_b0_caps_aqc107;</div><div class='add'>+extern const struct aq_hw_caps_s hw_atl_b0_caps_aqc108;</div><div class='add'>+extern const struct aq_hw_caps_s hw_atl_b0_caps_aqc109;</div><div class='add'>+extern const struct aq_hw_caps_s hw_atl_b0_caps_aqc111;</div><div class='add'>+extern const struct aq_hw_caps_s hw_atl_b0_caps_aqc112;</div><div class='add'>+</div><div class='add'>+#define hw_atl_b0_caps_aqc100s hw_atl_b0_caps_aqc100</div><div class='add'>+#define hw_atl_b0_caps_aqc107s hw_atl_b0_caps_aqc107</div><div class='add'>+#define hw_atl_b0_caps_aqc108s hw_atl_b0_caps_aqc108</div><div class='add'>+#define hw_atl_b0_caps_aqc109s hw_atl_b0_caps_aqc109</div><div class='add'>+#define hw_atl_b0_caps_aqc111s hw_atl_b0_caps_aqc111</div><div class='add'>+#define hw_atl_b0_caps_aqc112s hw_atl_b0_caps_aqc112</div><div class='add'>+</div><div class='add'>+extern const struct aq_hw_ops hw_atl_ops_b0;</div><div class='add'>+</div><div class='add'>+#define hw_atl_ops_b1 hw_atl_ops_b0</div><div class='add'>+</div><div class='add'>+int hw_atl_b0_hw_rss_hash_set(struct aq_hw_s *self,</div><div class='add'>+			      struct aq_rss_parameters *rss_params);</div><div class='add'>+int hw_atl_b0_hw_offload_set(struct aq_hw_s *self,</div><div class='add'>+			     struct aq_nic_cfg_s *aq_nic_cfg);</div><div class='add'>+</div><div class='add'>+int hw_atl_b0_hw_ring_tx_start(struct aq_hw_s *self, struct aq_ring_s *ring);</div><div class='add'>+int hw_atl_b0_hw_ring_rx_start(struct aq_hw_s *self, struct aq_ring_s *ring);</div><div class='add'>+</div><div class='add'>+int hw_atl_b0_hw_ring_rx_init(struct aq_hw_s *self, struct aq_ring_s *aq_ring,</div><div class='add'>+			      struct aq_ring_param_s *aq_ring_param);</div><div class='add'>+int hw_atl_b0_hw_ring_rx_fill(struct aq_hw_s *self, struct aq_ring_s *ring,</div><div class='add'>+			      unsigned int sw_tail_old);</div><div class='add'>+int hw_atl_b0_hw_ring_rx_receive(struct aq_hw_s *self, struct aq_ring_s *ring);</div><div class='add'>+</div><div class='add'>+int hw_atl_b0_hw_ring_tx_init(struct aq_hw_s *self, struct aq_ring_s *aq_ring,</div><div class='add'>+			      struct aq_ring_param_s *aq_ring_param);</div><div class='add'>+int hw_atl_b0_hw_ring_tx_xmit(struct aq_hw_s *self, struct aq_ring_s *ring,</div><div class='add'>+			      unsigned int frags);</div><div class='add'>+int hw_atl_b0_hw_ring_tx_head_update(struct aq_hw_s *self,</div><div class='add'>+				     struct aq_ring_s *ring);</div><div class='add'>+</div><div class='add'>+int hw_atl_b0_hw_ring_tx_stop(struct aq_hw_s *self, struct aq_ring_s *ring);</div><div class='add'>+int hw_atl_b0_hw_ring_rx_stop(struct aq_hw_s *self, struct aq_ring_s *ring);</div><div class='add'>+</div><div class='add'>+void hw_atl_b0_hw_init_rx_rss_ctrl1(struct aq_hw_s *self);</div><div class='add'>+</div><div class='add'>+int hw_atl_b0_hw_mac_addr_set(struct aq_hw_s *self, const u8 *mac_addr);</div><div class='add'>+</div><div class='add'>+int hw_atl_b0_set_fc(struct aq_hw_s *self, u32 fc, u32 tc);</div><div class='add'>+int hw_atl_b0_set_loopback(struct aq_hw_s *self, u32 mode, bool enable);</div><div class='add'>+</div><div class='add'>+int hw_atl_b0_hw_start(struct aq_hw_s *self);</div><div class='add'>+</div><div class='add'>+int hw_atl_b0_hw_irq_enable(struct aq_hw_s *self, u64 mask);</div><div class='add'>+int hw_atl_b0_hw_irq_disable(struct aq_hw_s *self, u64 mask);</div><div class='add'>+int hw_atl_b0_hw_irq_read(struct aq_hw_s *self, u64 *mask);</div><div class='add'>+</div><div class='add'>+int hw_atl_b0_hw_packet_filter_set(struct aq_hw_s *self,</div><div class='add'>+				   unsigned int packet_filter);</div><div class='add'>+</div><div class='add'>+#endif /* HW_ATL_B0_H */</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0_internal.h b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0_internal.h<br/>new file mode 100644<br/>index 000000000000..cf460d61a45e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0_internal.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0_internal.h</a></div><div class='hunk'>@@ -0,0 +1,160 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/*</div><div class='add'>+ * aQuantia Corporation Network Driver</div><div class='add'>+ * Copyright (C) 2014-2019 aQuantia Corporation. All rights reserved</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* File hw_atl_b0_internal.h: Definition of Atlantic B0 chip specific</div><div class='add'>+ * constants.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef HW_ATL_B0_INTERNAL_H</div><div class='add'>+#define HW_ATL_B0_INTERNAL_H</div><div class='add'>+</div><div class='add'>+#include "../aq_common.h"</div><div class='add'>+</div><div class='add'>+#define HW_ATL_B0_MTU_JUMBO  16352U</div><div class='add'>+#define HW_ATL_B0_MTU        1514U</div><div class='add'>+</div><div class='add'>+#define HW_ATL_B0_TX_RINGS 4U</div><div class='add'>+#define HW_ATL_B0_RX_RINGS 4U</div><div class='add'>+</div><div class='add'>+#define HW_ATL_B0_RINGS_MAX 32U</div><div class='add'>+#define HW_ATL_B0_TXD_SIZE       (16U)</div><div class='add'>+#define HW_ATL_B0_RXD_SIZE       (16U)</div><div class='add'>+</div><div class='add'>+#define HW_ATL_B0_MAC      0U</div><div class='add'>+#define HW_ATL_B0_MAC_MIN  1U</div><div class='add'>+#define HW_ATL_B0_MAC_MAX  33U</div><div class='add'>+</div><div class='add'>+/* UCAST/MCAST filters */</div><div class='add'>+#define HW_ATL_B0_UCAST_FILTERS_MAX 38</div><div class='add'>+#define HW_ATL_B0_MCAST_FILTERS_MAX 8</div><div class='add'>+</div><div class='add'>+/* interrupts */</div><div class='add'>+#define HW_ATL_B0_ERR_INT 8U</div><div class='add'>+#define HW_ATL_B0_INT_MASK  (0xFFFFFFFFU)</div><div class='add'>+</div><div class='add'>+#define HW_ATL_B0_TXD_CTL2_LEN        (0xFFFFC000)</div><div class='add'>+#define HW_ATL_B0_TXD_CTL2_CTX_EN     (0x00002000)</div><div class='add'>+#define HW_ATL_B0_TXD_CTL2_CTX_IDX    (0x00001000)</div><div class='add'>+</div><div class='add'>+#define HW_ATL_B0_TXD_CTL_DESC_TYPE_TXD   (0x00000001)</div><div class='add'>+#define HW_ATL_B0_TXD_CTL_DESC_TYPE_TXC   (0x00000002)</div><div class='add'>+#define HW_ATL_B0_TXD_CTL_BLEN        (0x000FFFF0)</div><div class='add'>+#define HW_ATL_B0_TXD_CTL_DD          (0x00100000)</div><div class='add'>+#define HW_ATL_B0_TXD_CTL_EOP         (0x00200000)</div><div class='add'>+</div><div class='add'>+#define HW_ATL_B0_TXD_CTL_CMD_X       (0x3FC00000)</div><div class='add'>+</div><div class='add'>+#define HW_ATL_B0_TXD_CTL_CMD_VLAN    BIT(22)</div><div class='add'>+#define HW_ATL_B0_TXD_CTL_CMD_FCS     BIT(23)</div><div class='add'>+#define HW_ATL_B0_TXD_CTL_CMD_IPCSO   BIT(24)</div><div class='add'>+#define HW_ATL_B0_TXD_CTL_CMD_TUCSO   BIT(25)</div><div class='add'>+#define HW_ATL_B0_TXD_CTL_CMD_LSO     BIT(26)</div><div class='add'>+#define HW_ATL_B0_TXD_CTL_CMD_WB      BIT(27)</div><div class='add'>+#define HW_ATL_B0_TXD_CTL_CMD_VXLAN   BIT(28)</div><div class='add'>+</div><div class='add'>+#define HW_ATL_B0_TXD_CTL_CMD_IPV6    BIT(21)</div><div class='add'>+#define HW_ATL_B0_TXD_CTL_CMD_TCP     BIT(22)</div><div class='add'>+</div><div class='add'>+#define HW_ATL_B0_MPI_CONTROL_ADR       0x0368U</div><div class='add'>+#define HW_ATL_B0_MPI_STATE_ADR         0x036CU</div><div class='add'>+</div><div class='add'>+#define HW_ATL_B0_MPI_SPEED_MSK         0xFFFFU</div><div class='add'>+#define HW_ATL_B0_MPI_SPEED_SHIFT       16U</div><div class='add'>+</div><div class='add'>+#define HW_ATL_B0_TXBUF_MAX              160U</div><div class='add'>+#define HW_ATL_B0_PTP_TXBUF_SIZE           8U</div><div class='add'>+</div><div class='add'>+#define HW_ATL_B0_RXBUF_MAX              320U</div><div class='add'>+#define HW_ATL_B0_PTP_RXBUF_SIZE          16U</div><div class='add'>+</div><div class='add'>+#define HW_ATL_B0_RSS_REDIRECTION_MAX 64U</div><div class='add'>+#define HW_ATL_B0_RSS_REDIRECTION_BITS 3U</div><div class='add'>+#define HW_ATL_B0_RSS_HASHKEY_BITS 320U</div><div class='add'>+</div><div class='add'>+#define HW_ATL_B0_TCRSS_4_8  1</div><div class='add'>+#define HW_ATL_B0_TC_MAX 8U</div><div class='add'>+#define HW_ATL_B0_RSS_MAX 8U</div><div class='add'>+</div><div class='add'>+#define HW_ATL_B0_LRO_RXD_MAX 16U</div><div class='add'>+#define HW_ATL_B0_RS_SLIP_ENABLED  0U</div><div class='add'>+</div><div class='add'>+/* (256k -1(max pay_len) - 54(header)) */</div><div class='add'>+#define HAL_ATL_B0_LSO_MAX_SEGMENT_SIZE 262089U</div><div class='add'>+</div><div class='add'>+/* (256k -1(max pay_len) - 74(header)) */</div><div class='add'>+#define HAL_ATL_B0_LSO_IPV6_MAX_SEGMENT_SIZE 262069U</div><div class='add'>+</div><div class='add'>+#define HW_ATL_B0_CHIP_REVISION_B0      0xA0U</div><div class='add'>+#define HW_ATL_B0_CHIP_REVISION_UNKNOWN 0xFFU</div><div class='add'>+</div><div class='add'>+#define HW_ATL_B0_FW_SEMA_RAM           0x2U</div><div class='add'>+</div><div class='add'>+#define HW_ATL_B0_TXC_LEN_TUNLEN    (0x0000FF00)</div><div class='add'>+#define HW_ATL_B0_TXC_LEN_OUTLEN    (0xFFFF0000)</div><div class='add'>+</div><div class='add'>+#define HW_ATL_B0_TXC_CTL_DESC_TYPE (0x00000007)</div><div class='add'>+#define HW_ATL_B0_TXC_CTL_CTX_ID    (0x00000008)</div><div class='add'>+#define HW_ATL_B0_TXC_CTL_VLAN      (0x000FFFF0)</div><div class='add'>+#define HW_ATL_B0_TXC_CTL_CMD       (0x00F00000)</div><div class='add'>+#define HW_ATL_B0_TXC_CTL_L2LEN     (0x7F000000)</div><div class='add'>+</div><div class='add'>+#define HW_ATL_B0_TXC_CTL_L3LEN     (0x80000000)	/* L3LEN lsb */</div><div class='add'>+#define HW_ATL_B0_TXC_LEN2_L3LEN    (0x000000FF)	/* L3LE upper bits */</div><div class='add'>+#define HW_ATL_B0_TXC_LEN2_L4LEN    (0x0000FF00)</div><div class='add'>+#define HW_ATL_B0_TXC_LEN2_MSSLEN   (0xFFFF0000)</div><div class='add'>+</div><div class='add'>+#define HW_ATL_B0_RXD_DD    (0x1)</div><div class='add'>+#define HW_ATL_B0_RXD_NCEA0 (0x1)</div><div class='add'>+</div><div class='add'>+#define HW_ATL_B0_RXD_WB_STAT_RSSTYPE (0x0000000F)</div><div class='add'>+#define HW_ATL_B0_RXD_WB_STAT_RSSTYPE_SHIFT (0x0)</div><div class='add'>+#define HW_ATL_B0_RXD_WB_STAT_PKTTYPE (0x00000FF0)</div><div class='add'>+#define HW_ATL_B0_RXD_WB_STAT_PKTTYPE_SHIFT (0x4)</div><div class='add'>+#define HW_ATL_B0_RXD_WB_STAT_RXCTRL  (0x00180000)</div><div class='add'>+#define HW_ATL_B0_RXD_WB_STAT_RXCTRL_SHIFT (0x13)</div><div class='add'>+#define HW_ATL_B0_RXD_WB_STAT_SPLHDR  (0x00200000)</div><div class='add'>+#define HW_ATL_B0_RXD_WB_STAT_HDRLEN  (0xFFC00000)</div><div class='add'>+#define HW_ATL_B0_RXD_WB_STAT_HDRLEN_SHIFT (0x16)</div><div class='add'>+</div><div class='add'>+#define HW_ATL_B0_RXD_WB_PKTTYPE_VLAN          BIT(5)</div><div class='add'>+#define HW_ATL_B0_RXD_WB_PKTTYPE_VLAN_DOUBLE   BIT(6)</div><div class='add'>+</div><div class='add'>+#define HW_ATL_B0_RXD_WB_STAT2_DD      (0x0001)</div><div class='add'>+#define HW_ATL_B0_RXD_WB_STAT2_EOP     (0x0002)</div><div class='add'>+#define HW_ATL_B0_RXD_WB_STAT2_RXSTAT  (0x003C)</div><div class='add'>+#define HW_ATL_B0_RXD_WB_STAT2_MACERR  (0x0004)</div><div class='add'>+#define HW_ATL_B0_RXD_WB_STAT2_IP4ERR  (0x0008)</div><div class='add'>+#define HW_ATL_B0_RXD_WB_STAT2_TCPUPDERR  (0x0010)</div><div class='add'>+#define HW_ATL_B0_RXD_WB_STAT2_RXESTAT (0x0FC0)</div><div class='add'>+#define HW_ATL_B0_RXD_WB_STAT2_RSCCNT  (0xF000)</div><div class='add'>+</div><div class='add'>+#define L2_FILTER_ACTION_DISCARD (0x0)</div><div class='add'>+#define L2_FILTER_ACTION_HOST    (0x1)</div><div class='add'>+</div><div class='add'>+#define HW_ATL_B0_UCP_0X370_REG  (0x370)</div><div class='add'>+</div><div class='add'>+#define HW_ATL_B0_FLUSH() AQ_HW_READ_REG(self, 0x10)</div><div class='add'>+</div><div class='add'>+#define HW_ATL_B0_FW_VER_EXPECTED 0x01050006U</div><div class='add'>+</div><div class='add'>+#define HW_ATL_INTR_MODER_MAX  0x1FF</div><div class='add'>+#define HW_ATL_INTR_MODER_MIN  0xFF</div><div class='add'>+</div><div class='add'>+#define HW_ATL_B0_MIN_RXD \</div><div class='add'>+	(ALIGN(AQ_CFG_SKB_FRAGS_MAX + 1U, AQ_HW_RXD_MULTIPLE))</div><div class='add'>+#define HW_ATL_B0_MIN_TXD \</div><div class='add'>+	(ALIGN(AQ_CFG_SKB_FRAGS_MAX + 1U, AQ_HW_TXD_MULTIPLE))</div><div class='add'>+</div><div class='add'>+#define HW_ATL_B0_MAX_RXD 8184U</div><div class='add'>+#define HW_ATL_B0_MAX_TXD 8184U</div><div class='add'>+</div><div class='add'>+#define HW_ATL_RSS_DISABLED 0x00000000U</div><div class='add'>+#define HW_ATL_RSS_ENABLED_8TCS_2INDEX_BITS 0xA2222222U</div><div class='add'>+#define HW_ATL_RSS_ENABLED_4TCS_3INDEX_BITS 0x80003333U</div><div class='add'>+</div><div class='add'>+/* HW layer capabilities */</div><div class='add'>+</div><div class='add'>+#endif /* HW_ATL_B0_INTERNAL_H */</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh.c b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh.c<br/>new file mode 100644<br/>index 000000000000..d07af1271d59<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh.c</a></div><div class='hunk'>@@ -0,0 +1,1896 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2014-2019 aQuantia Corporation</div><div class='add'>+ * Copyright (C) 2019-2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* File hw_atl_llh.c: Definitions of bitfield and register access functions for</div><div class='add'>+ * Atlantic registers.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "hw_atl_llh.h"</div><div class='add'>+#include "hw_atl_llh_internal.h"</div><div class='add'>+#include "../aq_hw_utils.h"</div><div class='add'>+</div><div class='add'>+void hw_atl_ts_reset_set(struct aq_hw_s *aq_hw, u32 val)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_TS_RESET_ADR,</div><div class='add'>+			    HW_ATL_TS_RESET_MSK,</div><div class='add'>+			    HW_ATL_TS_RESET_SHIFT,</div><div class='add'>+			    val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_ts_power_down_set(struct aq_hw_s *aq_hw, u32 val)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_TS_POWER_DOWN_ADR,</div><div class='add'>+			    HW_ATL_TS_POWER_DOWN_MSK,</div><div class='add'>+			    HW_ATL_TS_POWER_DOWN_SHIFT,</div><div class='add'>+			    val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_ts_power_down_get(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg_bit(aq_hw, HW_ATL_TS_POWER_DOWN_ADR,</div><div class='add'>+				  HW_ATL_TS_POWER_DOWN_MSK,</div><div class='add'>+				  HW_ATL_TS_POWER_DOWN_SHIFT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_ts_ready_get(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg_bit(aq_hw, HW_ATL_TS_READY_ADR,</div><div class='add'>+				  HW_ATL_TS_READY_MSK,</div><div class='add'>+				  HW_ATL_TS_READY_SHIFT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_ts_ready_latch_high_get(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg_bit(aq_hw, HW_ATL_TS_READY_LATCH_HIGH_ADR,</div><div class='add'>+				  HW_ATL_TS_READY_LATCH_HIGH_MSK,</div><div class='add'>+				  HW_ATL_TS_READY_LATCH_HIGH_SHIFT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_ts_data_get(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg_bit(aq_hw, HW_ATL_TS_DATA_OUT_ADR,</div><div class='add'>+				  HW_ATL_TS_DATA_OUT_MSK,</div><div class='add'>+				  HW_ATL_TS_DATA_OUT_SHIFT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_smb0_bus_busy_get(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg_bit(aq_hw, HW_ATL_SMB0_BUS_BUSY_ADR,</div><div class='add'>+				HW_ATL_SMB0_BUS_BUSY_MSK,</div><div class='add'>+				HW_ATL_SMB0_BUS_BUSY_SHIFT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_smb0_byte_transfer_complete_get(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg_bit(aq_hw, HW_ATL_SMB0_BYTE_TRANSFER_COMPLETE_ADR,</div><div class='add'>+				HW_ATL_SMB0_BYTE_TRANSFER_COMPLETE_MSK,</div><div class='add'>+				HW_ATL_SMB0_BYTE_TRANSFER_COMPLETE_SHIFT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_smb0_receive_acknowledged_get(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg_bit(aq_hw, HW_ATL_SMB0_RX_ACKNOWLEDGED_ADR,</div><div class='add'>+				HW_ATL_SMB0_RX_ACKNOWLEDGED_MSK,</div><div class='add'>+				HW_ATL_SMB0_RX_ACKNOWLEDGED_SHIFT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_smb0_repeated_start_detect_get(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg_bit(aq_hw, HW_ATL_SMB0_REPEATED_START_DETECT_ADR,</div><div class='add'>+				HW_ATL_SMB0_REPEATED_START_DETECT_MSK,</div><div class='add'>+				HW_ATL_SMB0_REPEATED_START_DETECT_SHIFT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_smb0_rx_data_get(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg(aq_hw, HW_ATL_SMB0_RECEIVED_DATA_ADR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_smb0_tx_data_set(struct aq_hw_s *aq_hw, u32 data)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_write_reg(aq_hw, HW_ATL_SMB0_TRANSMITTED_DATA_ADR, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_smb0_provisioning2_set(struct aq_hw_s *aq_hw, u32 data)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_write_reg(aq_hw, HW_ATL_SMB0_PROVISIONING2_ADR, data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* global */</div><div class='add'>+void hw_atl_reg_glb_cpu_sem_set(struct aq_hw_s *aq_hw, u32 glb_cpu_sem,</div><div class='add'>+				u32 semaphore)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_GLB_CPU_SEM_ADR(semaphore), glb_cpu_sem);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_reg_glb_cpu_sem_get(struct aq_hw_s *aq_hw, u32 semaphore)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg(aq_hw, HW_ATL_GLB_CPU_SEM_ADR(semaphore));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_glb_glb_reg_res_dis_set(struct aq_hw_s *aq_hw, u32 glb_reg_res_dis)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_GLB_REG_RES_DIS_ADR,</div><div class='add'>+			    HW_ATL_GLB_REG_RES_DIS_MSK,</div><div class='add'>+			    HW_ATL_GLB_REG_RES_DIS_SHIFT,</div><div class='add'>+			    glb_reg_res_dis);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_glb_soft_res_set(struct aq_hw_s *aq_hw, u32 soft_res)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_GLB_SOFT_RES_ADR,</div><div class='add'>+			    HW_ATL_GLB_SOFT_RES_MSK,</div><div class='add'>+			    HW_ATL_GLB_SOFT_RES_SHIFT, soft_res);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_glb_soft_res_get(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg_bit(aq_hw, HW_ATL_GLB_SOFT_RES_ADR,</div><div class='add'>+				  HW_ATL_GLB_SOFT_RES_MSK,</div><div class='add'>+				  HW_ATL_GLB_SOFT_RES_SHIFT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_reg_glb_mif_id_get(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg(aq_hw, HW_ATL_GLB_MIF_ID_ADR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* stats */</div><div class='add'>+u32 hw_atl_rpb_rx_dma_drop_pkt_cnt_get(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg(aq_hw, HW_ATL_RPB_RX_DMA_DROP_PKT_CNT_ADR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u64 hw_atl_stats_rx_dma_good_octet_counter_get(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg64(aq_hw, HW_ATL_STATS_RX_DMA_GOOD_OCTET_COUNTERLSW);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u64 hw_atl_stats_rx_dma_good_pkt_counter_get(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg64(aq_hw, HW_ATL_STATS_RX_DMA_GOOD_PKT_COUNTERLSW);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u64 hw_atl_stats_tx_dma_good_octet_counter_get(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg64(aq_hw, HW_ATL_STATS_TX_DMA_GOOD_OCTET_COUNTERLSW);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u64 hw_atl_stats_tx_dma_good_pkt_counter_get(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg64(aq_hw, HW_ATL_STATS_TX_DMA_GOOD_PKT_COUNTERLSW);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* interrupt */</div><div class='add'>+void hw_atl_itr_irq_auto_masklsw_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				     u32 irq_auto_masklsw)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_ITR_IAMRLSW_ADR, irq_auto_masklsw);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_itr_irq_map_en_rx_set(struct aq_hw_s *aq_hw, u32 irq_map_en_rx,</div><div class='add'>+				  u32 rx)</div><div class='add'>+{</div><div class='add'>+/* register address for bitfield imr_rx{r}_en */</div><div class='add'>+	static u32 itr_imr_rxren_adr[32] = {</div><div class='add'>+			0x00002100U, 0x00002100U, 0x00002104U, 0x00002104U,</div><div class='add'>+			0x00002108U, 0x00002108U, 0x0000210CU, 0x0000210CU,</div><div class='add'>+			0x00002110U, 0x00002110U, 0x00002114U, 0x00002114U,</div><div class='add'>+			0x00002118U, 0x00002118U, 0x0000211CU, 0x0000211CU,</div><div class='add'>+			0x00002120U, 0x00002120U, 0x00002124U, 0x00002124U,</div><div class='add'>+			0x00002128U, 0x00002128U, 0x0000212CU, 0x0000212CU,</div><div class='add'>+			0x00002130U, 0x00002130U, 0x00002134U, 0x00002134U,</div><div class='add'>+			0x00002138U, 0x00002138U, 0x0000213CU, 0x0000213CU</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+/* bitmask for bitfield imr_rx{r}_en */</div><div class='add'>+	static u32 itr_imr_rxren_msk[32] = {</div><div class='add'>+			0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U,</div><div class='add'>+			0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U,</div><div class='add'>+			0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U,</div><div class='add'>+			0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U,</div><div class='add'>+			0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U,</div><div class='add'>+			0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U,</div><div class='add'>+			0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U,</div><div class='add'>+			0x00008000U, 0x00000080U, 0x00008000U, 0x00000080U</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+/* lower bit position of bitfield imr_rx{r}_en */</div><div class='add'>+	static u32 itr_imr_rxren_shift[32] = {</div><div class='add'>+			15U, 7U, 15U, 7U, 15U, 7U, 15U, 7U,</div><div class='add'>+			15U, 7U, 15U, 7U, 15U, 7U, 15U, 7U,</div><div class='add'>+			15U, 7U, 15U, 7U, 15U, 7U, 15U, 7U,</div><div class='add'>+			15U, 7U, 15U, 7U, 15U, 7U, 15U, 7U</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, itr_imr_rxren_adr[rx],</div><div class='add'>+			    itr_imr_rxren_msk[rx],</div><div class='add'>+			    itr_imr_rxren_shift[rx],</div><div class='add'>+			    irq_map_en_rx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_itr_irq_map_en_tx_set(struct aq_hw_s *aq_hw, u32 irq_map_en_tx,</div><div class='add'>+				  u32 tx)</div><div class='add'>+{</div><div class='add'>+/* register address for bitfield imr_tx{t}_en */</div><div class='add'>+	static u32 itr_imr_txten_adr[32] = {</div><div class='add'>+			0x00002100U, 0x00002100U, 0x00002104U, 0x00002104U,</div><div class='add'>+			0x00002108U, 0x00002108U, 0x0000210CU, 0x0000210CU,</div><div class='add'>+			0x00002110U, 0x00002110U, 0x00002114U, 0x00002114U,</div><div class='add'>+			0x00002118U, 0x00002118U, 0x0000211CU, 0x0000211CU,</div><div class='add'>+			0x00002120U, 0x00002120U, 0x00002124U, 0x00002124U,</div><div class='add'>+			0x00002128U, 0x00002128U, 0x0000212CU, 0x0000212CU,</div><div class='add'>+			0x00002130U, 0x00002130U, 0x00002134U, 0x00002134U,</div><div class='add'>+			0x00002138U, 0x00002138U, 0x0000213CU, 0x0000213CU</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+/* bitmask for bitfield imr_tx{t}_en */</div><div class='add'>+	static u32 itr_imr_txten_msk[32] = {</div><div class='add'>+			0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U,</div><div class='add'>+			0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U,</div><div class='add'>+			0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U,</div><div class='add'>+			0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U,</div><div class='add'>+			0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U,</div><div class='add'>+			0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U,</div><div class='add'>+			0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U,</div><div class='add'>+			0x80000000U, 0x00800000U, 0x80000000U, 0x00800000U</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+/* lower bit position of bitfield imr_tx{t}_en */</div><div class='add'>+	static u32 itr_imr_txten_shift[32] = {</div><div class='add'>+			31U, 23U, 31U, 23U, 31U, 23U, 31U, 23U,</div><div class='add'>+			31U, 23U, 31U, 23U, 31U, 23U, 31U, 23U,</div><div class='add'>+			31U, 23U, 31U, 23U, 31U, 23U, 31U, 23U,</div><div class='add'>+			31U, 23U, 31U, 23U, 31U, 23U, 31U, 23U</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, itr_imr_txten_adr[tx],</div><div class='add'>+			    itr_imr_txten_msk[tx],</div><div class='add'>+			    itr_imr_txten_shift[tx],</div><div class='add'>+			    irq_map_en_tx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_itr_irq_map_rx_set(struct aq_hw_s *aq_hw, u32 irq_map_rx, u32 rx)</div><div class='add'>+{</div><div class='add'>+/* register address for bitfield imr_rx{r}[4:0] */</div><div class='add'>+	static u32 itr_imr_rxr_adr[32] = {</div><div class='add'>+			0x00002100U, 0x00002100U, 0x00002104U, 0x00002104U,</div><div class='add'>+			0x00002108U, 0x00002108U, 0x0000210CU, 0x0000210CU,</div><div class='add'>+			0x00002110U, 0x00002110U, 0x00002114U, 0x00002114U,</div><div class='add'>+			0x00002118U, 0x00002118U, 0x0000211CU, 0x0000211CU,</div><div class='add'>+			0x00002120U, 0x00002120U, 0x00002124U, 0x00002124U,</div><div class='add'>+			0x00002128U, 0x00002128U, 0x0000212CU, 0x0000212CU,</div><div class='add'>+			0x00002130U, 0x00002130U, 0x00002134U, 0x00002134U,</div><div class='add'>+			0x00002138U, 0x00002138U, 0x0000213CU, 0x0000213CU</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+/* bitmask for bitfield imr_rx{r}[4:0] */</div><div class='add'>+	static u32 itr_imr_rxr_msk[32] = {</div><div class='add'>+			0x00001f00U, 0x0000001FU, 0x00001F00U, 0x0000001FU,</div><div class='add'>+			0x00001f00U, 0x0000001FU, 0x00001F00U, 0x0000001FU,</div><div class='add'>+			0x00001f00U, 0x0000001FU, 0x00001F00U, 0x0000001FU,</div><div class='add'>+			0x00001f00U, 0x0000001FU, 0x00001F00U, 0x0000001FU,</div><div class='add'>+			0x00001f00U, 0x0000001FU, 0x00001F00U, 0x0000001FU,</div><div class='add'>+			0x00001f00U, 0x0000001FU, 0x00001F00U, 0x0000001FU,</div><div class='add'>+			0x00001f00U, 0x0000001FU, 0x00001F00U, 0x0000001FU,</div><div class='add'>+			0x00001f00U, 0x0000001FU, 0x00001F00U, 0x0000001FU</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+/* lower bit position of bitfield imr_rx{r}[4:0] */</div><div class='add'>+	static u32 itr_imr_rxr_shift[32] = {</div><div class='add'>+			8U, 0U, 8U, 0U, 8U, 0U, 8U, 0U,</div><div class='add'>+			8U, 0U, 8U, 0U, 8U, 0U, 8U, 0U,</div><div class='add'>+			8U, 0U, 8U, 0U, 8U, 0U, 8U, 0U,</div><div class='add'>+			8U, 0U, 8U, 0U, 8U, 0U, 8U, 0U</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, itr_imr_rxr_adr[rx],</div><div class='add'>+			    itr_imr_rxr_msk[rx],</div><div class='add'>+			    itr_imr_rxr_shift[rx],</div><div class='add'>+			    irq_map_rx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_itr_irq_map_tx_set(struct aq_hw_s *aq_hw, u32 irq_map_tx, u32 tx)</div><div class='add'>+{</div><div class='add'>+/* register address for bitfield imr_tx{t}[4:0] */</div><div class='add'>+	static u32 itr_imr_txt_adr[32] = {</div><div class='add'>+			0x00002100U, 0x00002100U, 0x00002104U, 0x00002104U,</div><div class='add'>+			0x00002108U, 0x00002108U, 0x0000210CU, 0x0000210CU,</div><div class='add'>+			0x00002110U, 0x00002110U, 0x00002114U, 0x00002114U,</div><div class='add'>+			0x00002118U, 0x00002118U, 0x0000211CU, 0x0000211CU,</div><div class='add'>+			0x00002120U, 0x00002120U, 0x00002124U, 0x00002124U,</div><div class='add'>+			0x00002128U, 0x00002128U, 0x0000212CU, 0x0000212CU,</div><div class='add'>+			0x00002130U, 0x00002130U, 0x00002134U, 0x00002134U,</div><div class='add'>+			0x00002138U, 0x00002138U, 0x0000213CU, 0x0000213CU</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+/* bitmask for bitfield imr_tx{t}[4:0] */</div><div class='add'>+	static u32 itr_imr_txt_msk[32] = {</div><div class='add'>+			0x1f000000U, 0x001F0000U, 0x1F000000U, 0x001F0000U,</div><div class='add'>+			0x1f000000U, 0x001F0000U, 0x1F000000U, 0x001F0000U,</div><div class='add'>+			0x1f000000U, 0x001F0000U, 0x1F000000U, 0x001F0000U,</div><div class='add'>+			0x1f000000U, 0x001F0000U, 0x1F000000U, 0x001F0000U,</div><div class='add'>+			0x1f000000U, 0x001F0000U, 0x1F000000U, 0x001F0000U,</div><div class='add'>+			0x1f000000U, 0x001F0000U, 0x1F000000U, 0x001F0000U,</div><div class='add'>+			0x1f000000U, 0x001F0000U, 0x1F000000U, 0x001F0000U,</div><div class='add'>+			0x1f000000U, 0x001F0000U, 0x1F000000U, 0x001F0000U</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+/* lower bit position of bitfield imr_tx{t}[4:0] */</div><div class='add'>+	static u32 itr_imr_txt_shift[32] = {</div><div class='add'>+			24U, 16U, 24U, 16U, 24U, 16U, 24U, 16U,</div><div class='add'>+			24U, 16U, 24U, 16U, 24U, 16U, 24U, 16U,</div><div class='add'>+			24U, 16U, 24U, 16U, 24U, 16U, 24U, 16U,</div><div class='add'>+			24U, 16U, 24U, 16U, 24U, 16U, 24U, 16U</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, itr_imr_txt_adr[tx],</div><div class='add'>+			    itr_imr_txt_msk[tx],</div><div class='add'>+			    itr_imr_txt_shift[tx],</div><div class='add'>+			    irq_map_tx);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_itr_irq_msk_clearlsw_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				     u32 irq_msk_clearlsw)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_ITR_IMCRLSW_ADR, irq_msk_clearlsw);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_itr_irq_msk_setlsw_set(struct aq_hw_s *aq_hw, u32 irq_msk_setlsw)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_ITR_IMSRLSW_ADR, irq_msk_setlsw);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_itr_irq_reg_res_dis_set(struct aq_hw_s *aq_hw, u32 irq_reg_res_dis)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_ITR_REG_RES_DSBL_ADR,</div><div class='add'>+			    HW_ATL_ITR_REG_RES_DSBL_MSK,</div><div class='add'>+			    HW_ATL_ITR_REG_RES_DSBL_SHIFT, irq_reg_res_dis);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_itr_irq_status_clearlsw_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					u32 irq_status_clearlsw)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_ITR_ISCRLSW_ADR, irq_status_clearlsw);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_itr_irq_statuslsw_get(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg(aq_hw, HW_ATL_ITR_ISRLSW_ADR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_itr_res_irq_get(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg_bit(aq_hw, HW_ATL_ITR_RES_ADR, HW_ATL_ITR_RES_MSK,</div><div class='add'>+				  HW_ATL_ITR_RES_SHIFT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_itr_res_irq_set(struct aq_hw_s *aq_hw, u32 res_irq)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_ITR_RES_ADR, HW_ATL_ITR_RES_MSK,</div><div class='add'>+			    HW_ATL_ITR_RES_SHIFT, res_irq);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* set RSC interrupt */</div><div class='add'>+void hw_atl_itr_rsc_en_set(struct aq_hw_s *aq_hw, u32 enable)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_ITR_RSC_EN_ADR, enable);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* set RSC delay */</div><div class='add'>+void hw_atl_itr_rsc_delay_set(struct aq_hw_s *aq_hw, u32 delay)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_ITR_RSC_DELAY_ADR,</div><div class='add'>+			    HW_ATL_ITR_RSC_DELAY_MSK,</div><div class='add'>+			    HW_ATL_ITR_RSC_DELAY_SHIFT,</div><div class='add'>+			    delay);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* rdm */</div><div class='add'>+void hw_atl_rdm_cpu_id_set(struct aq_hw_s *aq_hw, u32 cpuid, u32 dca)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RDM_DCADCPUID_ADR(dca),</div><div class='add'>+			    HW_ATL_RDM_DCADCPUID_MSK,</div><div class='add'>+			    HW_ATL_RDM_DCADCPUID_SHIFT, cpuid);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rdm_rx_dca_en_set(struct aq_hw_s *aq_hw, u32 rx_dca_en)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RDM_DCA_EN_ADR, HW_ATL_RDM_DCA_EN_MSK,</div><div class='add'>+			    HW_ATL_RDM_DCA_EN_SHIFT, rx_dca_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rdm_rx_dca_mode_set(struct aq_hw_s *aq_hw, u32 rx_dca_mode)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RDM_DCA_MODE_ADR,</div><div class='add'>+			    HW_ATL_RDM_DCA_MODE_MSK,</div><div class='add'>+			    HW_ATL_RDM_DCA_MODE_SHIFT, rx_dca_mode);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rdm_rx_desc_data_buff_size_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					   u32 rx_desc_data_buff_size,</div><div class='add'>+					   u32 descriptor)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RDM_DESCDDATA_SIZE_ADR(descriptor),</div><div class='add'>+			    HW_ATL_RDM_DESCDDATA_SIZE_MSK,</div><div class='add'>+			    HW_ATL_RDM_DESCDDATA_SIZE_SHIFT,</div><div class='add'>+			    rx_desc_data_buff_size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rdm_rx_desc_dca_en_set(struct aq_hw_s *aq_hw, u32 rx_desc_dca_en,</div><div class='add'>+				   u32 dca)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RDM_DCADDESC_EN_ADR(dca),</div><div class='add'>+			    HW_ATL_RDM_DCADDESC_EN_MSK,</div><div class='add'>+			    HW_ATL_RDM_DCADDESC_EN_SHIFT,</div><div class='add'>+			    rx_desc_dca_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rdm_rx_desc_en_set(struct aq_hw_s *aq_hw, u32 rx_desc_en,</div><div class='add'>+			       u32 descriptor)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RDM_DESCDEN_ADR(descriptor),</div><div class='add'>+			    HW_ATL_RDM_DESCDEN_MSK,</div><div class='add'>+			    HW_ATL_RDM_DESCDEN_SHIFT,</div><div class='add'>+			    rx_desc_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rdm_rx_desc_head_buff_size_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					   u32 rx_desc_head_buff_size,</div><div class='add'>+					   u32 descriptor)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RDM_DESCDHDR_SIZE_ADR(descriptor),</div><div class='add'>+			    HW_ATL_RDM_DESCDHDR_SIZE_MSK,</div><div class='add'>+			    HW_ATL_RDM_DESCDHDR_SIZE_SHIFT,</div><div class='add'>+			    rx_desc_head_buff_size);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rdm_rx_desc_head_splitting_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					   u32 rx_desc_head_splitting,</div><div class='add'>+					   u32 descriptor)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RDM_DESCDHDR_SPLIT_ADR(descriptor),</div><div class='add'>+			    HW_ATL_RDM_DESCDHDR_SPLIT_MSK,</div><div class='add'>+			    HW_ATL_RDM_DESCDHDR_SPLIT_SHIFT,</div><div class='add'>+			    rx_desc_head_splitting);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_rdm_rx_desc_head_ptr_get(struct aq_hw_s *aq_hw, u32 descriptor)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg_bit(aq_hw, HW_ATL_RDM_DESCDHD_ADR(descriptor),</div><div class='add'>+				  HW_ATL_RDM_DESCDHD_MSK,</div><div class='add'>+				  HW_ATL_RDM_DESCDHD_SHIFT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rdm_rx_desc_len_set(struct aq_hw_s *aq_hw, u32 rx_desc_len,</div><div class='add'>+				u32 descriptor)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RDM_DESCDLEN_ADR(descriptor),</div><div class='add'>+			    HW_ATL_RDM_DESCDLEN_MSK, HW_ATL_RDM_DESCDLEN_SHIFT,</div><div class='add'>+			    rx_desc_len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rdm_rx_desc_res_set(struct aq_hw_s *aq_hw, u32 rx_desc_res,</div><div class='add'>+				u32 descriptor)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RDM_DESCDRESET_ADR(descriptor),</div><div class='add'>+			    HW_ATL_RDM_DESCDRESET_MSK,</div><div class='add'>+			    HW_ATL_RDM_DESCDRESET_SHIFT,</div><div class='add'>+			    rx_desc_res);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rdm_rx_desc_wr_wb_irq_en_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					 u32 rx_desc_wr_wb_irq_en)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RDM_INT_DESC_WRB_EN_ADR,</div><div class='add'>+			    HW_ATL_RDM_INT_DESC_WRB_EN_MSK,</div><div class='add'>+			    HW_ATL_RDM_INT_DESC_WRB_EN_SHIFT,</div><div class='add'>+			    rx_desc_wr_wb_irq_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rdm_rx_head_dca_en_set(struct aq_hw_s *aq_hw, u32 rx_head_dca_en,</div><div class='add'>+				   u32 dca)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RDM_DCADHDR_EN_ADR(dca),</div><div class='add'>+			    HW_ATL_RDM_DCADHDR_EN_MSK,</div><div class='add'>+			    HW_ATL_RDM_DCADHDR_EN_SHIFT,</div><div class='add'>+			    rx_head_dca_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rdm_rx_pld_dca_en_set(struct aq_hw_s *aq_hw, u32 rx_pld_dca_en,</div><div class='add'>+				  u32 dca)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RDM_DCADPAY_EN_ADR(dca),</div><div class='add'>+			    HW_ATL_RDM_DCADPAY_EN_MSK,</div><div class='add'>+			    HW_ATL_RDM_DCADPAY_EN_SHIFT,</div><div class='add'>+			    rx_pld_dca_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rdm_rdm_intr_moder_en_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				      u32 rdm_intr_moder_en)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RDM_INT_RIM_EN_ADR,</div><div class='add'>+			    HW_ATL_RDM_INT_RIM_EN_MSK,</div><div class='add'>+			    HW_ATL_RDM_INT_RIM_EN_SHIFT,</div><div class='add'>+			    rdm_intr_moder_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* reg */</div><div class='add'>+void hw_atl_reg_gen_irq_map_set(struct aq_hw_s *aq_hw, u32 gen_intr_map,</div><div class='add'>+				u32 regidx)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_GEN_INTR_MAP_ADR(regidx), gen_intr_map);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_reg_gen_irq_status_get(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg(aq_hw, HW_ATL_GEN_INTR_STAT_ADR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_reg_irq_glb_ctl_set(struct aq_hw_s *aq_hw, u32 intr_glb_ctl)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_INTR_GLB_CTL_ADR, intr_glb_ctl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_reg_irq_thr_set(struct aq_hw_s *aq_hw, u32 intr_thr, u32 throttle)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_INTR_THR_ADR(throttle), intr_thr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_reg_rx_dma_desc_base_addresslswset(struct aq_hw_s *aq_hw,</div><div class='add'>+					       u32 rx_dma_desc_base_addrlsw,</div><div class='add'>+					       u32 descriptor)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_RX_DMA_DESC_BASE_ADDRLSW_ADR(descriptor),</div><div class='add'>+			rx_dma_desc_base_addrlsw);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_reg_rx_dma_desc_base_addressmswset(struct aq_hw_s *aq_hw,</div><div class='add'>+					       u32 rx_dma_desc_base_addrmsw,</div><div class='add'>+					       u32 descriptor)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_RX_DMA_DESC_BASE_ADDRMSW_ADR(descriptor),</div><div class='add'>+			rx_dma_desc_base_addrmsw);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_reg_rx_dma_desc_status_get(struct aq_hw_s *aq_hw, u32 descriptor)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg(aq_hw, HW_ATL_RX_DMA_DESC_STAT_ADR(descriptor));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_reg_rx_dma_desc_tail_ptr_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					 u32 rx_dma_desc_tail_ptr,</div><div class='add'>+					 u32 descriptor)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_RX_DMA_DESC_TAIL_PTR_ADR(descriptor),</div><div class='add'>+			rx_dma_desc_tail_ptr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_reg_rx_flr_mcst_flr_msk_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					u32 rx_flr_mcst_flr_msk)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_RX_FLR_MCST_FLR_MSK_ADR,</div><div class='add'>+			rx_flr_mcst_flr_msk);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_reg_rx_flr_mcst_flr_set(struct aq_hw_s *aq_hw, u32 rx_flr_mcst_flr,</div><div class='add'>+				    u32 filter)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_RX_FLR_MCST_FLR_ADR(filter),</div><div class='add'>+			rx_flr_mcst_flr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_reg_rx_flr_rss_control1set(struct aq_hw_s *aq_hw,</div><div class='add'>+				       u32 rx_flr_rss_control1)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_RX_FLR_RSS_CONTROL1_ADR,</div><div class='add'>+			rx_flr_rss_control1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_reg_rx_flr_control2_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				    u32 rx_filter_control2)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_RX_FLR_CONTROL2_ADR, rx_filter_control2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_reg_rx_intr_moder_ctrl_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				       u32 rx_intr_moderation_ctl,</div><div class='add'>+				       u32 queue)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_RX_INTR_MODERATION_CTL_ADR(queue),</div><div class='add'>+			rx_intr_moderation_ctl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_reg_tx_dma_debug_ctl_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				     u32 tx_dma_debug_ctl)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_TX_DMA_DEBUG_CTL_ADR, tx_dma_debug_ctl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_reg_tx_dma_desc_base_addresslswset(struct aq_hw_s *aq_hw,</div><div class='add'>+					       u32 tx_dma_desc_base_addrlsw,</div><div class='add'>+					       u32 descriptor)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_TX_DMA_DESC_BASE_ADDRLSW_ADR(descriptor),</div><div class='add'>+			tx_dma_desc_base_addrlsw);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_reg_tx_dma_desc_base_addressmswset(struct aq_hw_s *aq_hw,</div><div class='add'>+					       u32 tx_dma_desc_base_addrmsw,</div><div class='add'>+					       u32 descriptor)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_TX_DMA_DESC_BASE_ADDRMSW_ADR(descriptor),</div><div class='add'>+			tx_dma_desc_base_addrmsw);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_reg_tx_dma_desc_tail_ptr_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					 u32 tx_dma_desc_tail_ptr,</div><div class='add'>+					 u32 descriptor)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_TX_DMA_DESC_TAIL_PTR_ADR(descriptor),</div><div class='add'>+			tx_dma_desc_tail_ptr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_reg_tx_intr_moder_ctrl_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				       u32 tx_intr_moderation_ctl,</div><div class='add'>+				       u32 queue)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_TX_INTR_MODERATION_CTL_ADR(queue),</div><div class='add'>+			tx_intr_moderation_ctl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* RPB: rx packet buffer */</div><div class='add'>+void hw_atl_rpb_dma_sys_lbk_set(struct aq_hw_s *aq_hw, u32 dma_sys_lbk)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPB_DMA_SYS_LBK_ADR,</div><div class='add'>+			    HW_ATL_RPB_DMA_SYS_LBK_MSK,</div><div class='add'>+			    HW_ATL_RPB_DMA_SYS_LBK_SHIFT, dma_sys_lbk);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpb_dma_net_lbk_set(struct aq_hw_s *aq_hw, u32 dma_net_lbk)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPB_DMA_NET_LBK_ADR,</div><div class='add'>+			    HW_ATL_RPB_DMA_NET_LBK_MSK,</div><div class='add'>+			    HW_ATL_RPB_DMA_NET_LBK_SHIFT, dma_net_lbk);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpb_rpf_rx_traf_class_mode_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					   u32 rx_traf_class_mode)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPB_RPF_RX_TC_MODE_ADR,</div><div class='add'>+			    HW_ATL_RPB_RPF_RX_TC_MODE_MSK,</div><div class='add'>+			    HW_ATL_RPB_RPF_RX_TC_MODE_SHIFT,</div><div class='add'>+			    rx_traf_class_mode);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_rpb_rpf_rx_traf_class_mode_get(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg_bit(aq_hw, HW_ATL_RPB_RPF_RX_TC_MODE_ADR,</div><div class='add'>+			HW_ATL_RPB_RPF_RX_TC_MODE_MSK,</div><div class='add'>+			HW_ATL_RPB_RPF_RX_TC_MODE_SHIFT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpb_rx_buff_en_set(struct aq_hw_s *aq_hw, u32 rx_buff_en)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPB_RX_BUF_EN_ADR,</div><div class='add'>+			    HW_ATL_RPB_RX_BUF_EN_MSK,</div><div class='add'>+			    HW_ATL_RPB_RX_BUF_EN_SHIFT, rx_buff_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpb_rx_buff_hi_threshold_per_tc_set(struct aq_hw_s *aq_hw,</div><div class='add'>+						u32 rx_buff_hi_threshold_per_tc,</div><div class='add'>+						u32 buffer)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPB_RXBHI_THRESH_ADR(buffer),</div><div class='add'>+			    HW_ATL_RPB_RXBHI_THRESH_MSK,</div><div class='add'>+			    HW_ATL_RPB_RXBHI_THRESH_SHIFT,</div><div class='add'>+			    rx_buff_hi_threshold_per_tc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpb_rx_buff_lo_threshold_per_tc_set(struct aq_hw_s *aq_hw,</div><div class='add'>+						u32 rx_buff_lo_threshold_per_tc,</div><div class='add'>+						u32 buffer)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPB_RXBLO_THRESH_ADR(buffer),</div><div class='add'>+			    HW_ATL_RPB_RXBLO_THRESH_MSK,</div><div class='add'>+			    HW_ATL_RPB_RXBLO_THRESH_SHIFT,</div><div class='add'>+			    rx_buff_lo_threshold_per_tc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpb_rx_flow_ctl_mode_set(struct aq_hw_s *aq_hw, u32 rx_flow_ctl_mode)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPB_RX_FC_MODE_ADR,</div><div class='add'>+			    HW_ATL_RPB_RX_FC_MODE_MSK,</div><div class='add'>+			    HW_ATL_RPB_RX_FC_MODE_SHIFT, rx_flow_ctl_mode);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rdm_rx_dma_desc_cache_init_tgl(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	val = aq_hw_read_reg_bit(aq_hw, HW_ATL_RDM_RX_DMA_DESC_CACHE_INIT_ADR,</div><div class='add'>+				 HW_ATL_RDM_RX_DMA_DESC_CACHE_INIT_MSK,</div><div class='add'>+				 HW_ATL_RDM_RX_DMA_DESC_CACHE_INIT_SHIFT);</div><div class='add'>+</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RDM_RX_DMA_DESC_CACHE_INIT_ADR,</div><div class='add'>+			    HW_ATL_RDM_RX_DMA_DESC_CACHE_INIT_MSK,</div><div class='add'>+			    HW_ATL_RDM_RX_DMA_DESC_CACHE_INIT_SHIFT,</div><div class='add'>+			    val ^ 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_rdm_rx_dma_desc_cache_init_done_get(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg_bit(aq_hw, RDM_RX_DMA_DESC_CACHE_INIT_DONE_ADR,</div><div class='add'>+				  RDM_RX_DMA_DESC_CACHE_INIT_DONE_MSK,</div><div class='add'>+				  RDM_RX_DMA_DESC_CACHE_INIT_DONE_SHIFT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpb_rx_pkt_buff_size_per_tc_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					    u32 rx_pkt_buff_size_per_tc, u32 buffer)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPB_RXBBUF_SIZE_ADR(buffer),</div><div class='add'>+			    HW_ATL_RPB_RXBBUF_SIZE_MSK,</div><div class='add'>+			    HW_ATL_RPB_RXBBUF_SIZE_SHIFT,</div><div class='add'>+			    rx_pkt_buff_size_per_tc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpb_rx_xoff_en_per_tc_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				      u32 rx_xoff_en_per_tc, u32 buffer)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPB_RXBXOFF_EN_ADR(buffer),</div><div class='add'>+			    HW_ATL_RPB_RXBXOFF_EN_MSK,</div><div class='add'>+			    HW_ATL_RPB_RXBXOFF_EN_SHIFT,</div><div class='add'>+			    rx_xoff_en_per_tc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* rpf */</div><div class='add'>+</div><div class='add'>+void hw_atl_rpfl2broadcast_count_threshold_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					       u32 l2broadcast_count_threshold)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPFL2BC_THRESH_ADR,</div><div class='add'>+			    HW_ATL_RPFL2BC_THRESH_MSK,</div><div class='add'>+			    HW_ATL_RPFL2BC_THRESH_SHIFT,</div><div class='add'>+			    l2broadcast_count_threshold);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpfl2broadcast_en_set(struct aq_hw_s *aq_hw, u32 l2broadcast_en)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPFL2BC_EN_ADR, HW_ATL_RPFL2BC_EN_MSK,</div><div class='add'>+			    HW_ATL_RPFL2BC_EN_SHIFT, l2broadcast_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpfl2broadcast_flr_act_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				       u32 l2broadcast_flr_act)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPFL2BC_ACT_ADR,</div><div class='add'>+			    HW_ATL_RPFL2BC_ACT_MSK,</div><div class='add'>+			    HW_ATL_RPFL2BC_ACT_SHIFT, l2broadcast_flr_act);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpfl2multicast_flr_en_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				      u32 l2multicast_flr_en,</div><div class='add'>+				      u32 filter)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPFL2MC_ENF_ADR(filter),</div><div class='add'>+			    HW_ATL_RPFL2MC_ENF_MSK,</div><div class='add'>+			    HW_ATL_RPFL2MC_ENF_SHIFT, l2multicast_flr_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_rpfl2promiscuous_mode_en_get(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg_bit(aq_hw, HW_ATL_RPFL2PROMIS_MODE_ADR,</div><div class='add'>+				  HW_ATL_RPFL2PROMIS_MODE_MSK,</div><div class='add'>+				  HW_ATL_RPFL2PROMIS_MODE_SHIFT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpfl2promiscuous_mode_en_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					 u32 l2promiscuous_mode_en)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPFL2PROMIS_MODE_ADR,</div><div class='add'>+			    HW_ATL_RPFL2PROMIS_MODE_MSK,</div><div class='add'>+			    HW_ATL_RPFL2PROMIS_MODE_SHIFT,</div><div class='add'>+			    l2promiscuous_mode_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpfl2unicast_flr_act_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				     u32 l2unicast_flr_act,</div><div class='add'>+				     u32 filter)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPFL2UC_ACTF_ADR(filter),</div><div class='add'>+			    HW_ATL_RPFL2UC_ACTF_MSK, HW_ATL_RPFL2UC_ACTF_SHIFT,</div><div class='add'>+			    l2unicast_flr_act);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpfl2_uc_flr_en_set(struct aq_hw_s *aq_hw, u32 l2unicast_flr_en,</div><div class='add'>+				u32 filter)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPFL2UC_ENF_ADR(filter),</div><div class='add'>+			    HW_ATL_RPFL2UC_ENF_MSK,</div><div class='add'>+			    HW_ATL_RPFL2UC_ENF_SHIFT, l2unicast_flr_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpfl2unicast_dest_addresslsw_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					     u32 l2unicast_dest_addresslsw,</div><div class='add'>+					     u32 filter)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_RPFL2UC_DAFLSW_ADR(filter),</div><div class='add'>+			l2unicast_dest_addresslsw);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpfl2unicast_dest_addressmsw_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					     u32 l2unicast_dest_addressmsw,</div><div class='add'>+					     u32 filter)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPFL2UC_DAFMSW_ADR(filter),</div><div class='add'>+			    HW_ATL_RPFL2UC_DAFMSW_MSK,</div><div class='add'>+			    HW_ATL_RPFL2UC_DAFMSW_SHIFT,</div><div class='add'>+			    l2unicast_dest_addressmsw);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpfl2_accept_all_mc_packets_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					    u32 l2_accept_all_mc_packets)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPFL2MC_ACCEPT_ALL_ADR,</div><div class='add'>+			    HW_ATL_RPFL2MC_ACCEPT_ALL_MSK,</div><div class='add'>+			    HW_ATL_RPFL2MC_ACCEPT_ALL_SHIFT,</div><div class='add'>+			    l2_accept_all_mc_packets);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpf_rpb_user_priority_tc_map_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					     u32 user_priority, u32 tc)</div><div class='add'>+{</div><div class='add'>+/* register address for bitfield rx_tc_up{t}[2:0] */</div><div class='add'>+	static u32 rpf_rpb_rx_tc_upt_adr[8] = {</div><div class='add'>+			0x000054c4U, 0x000054C4U, 0x000054C4U, 0x000054C4U,</div><div class='add'>+			0x000054c4U, 0x000054C4U, 0x000054C4U, 0x000054C4U</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+/* bitmask for bitfield rx_tc_up{t}[2:0] */</div><div class='add'>+	static u32 rpf_rpb_rx_tc_upt_msk[8] = {</div><div class='add'>+			0x00000007U, 0x00000070U, 0x00000700U, 0x00007000U,</div><div class='add'>+			0x00070000U, 0x00700000U, 0x07000000U, 0x70000000U</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+/* lower bit position of bitfield rx_tc_up{t}[2:0] */</div><div class='add'>+	static u32 rpf_rpb_rx_tc_upt_shft[8] = {</div><div class='add'>+			0U, 4U, 8U, 12U, 16U, 20U, 24U, 28U</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, rpf_rpb_rx_tc_upt_adr[user_priority],</div><div class='add'>+			    rpf_rpb_rx_tc_upt_msk[user_priority],</div><div class='add'>+			    rpf_rpb_rx_tc_upt_shft[user_priority], tc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpf_rss_key_addr_set(struct aq_hw_s *aq_hw, u32 rss_key_addr)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_RSS_KEY_ADDR_ADR,</div><div class='add'>+			    HW_ATL_RPF_RSS_KEY_ADDR_MSK,</div><div class='add'>+			    HW_ATL_RPF_RSS_KEY_ADDR_SHIFT,</div><div class='add'>+			    rss_key_addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpf_rss_key_wr_data_set(struct aq_hw_s *aq_hw, u32 rss_key_wr_data)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_RPF_RSS_KEY_WR_DATA_ADR,</div><div class='add'>+			rss_key_wr_data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_rpf_rss_key_wr_en_get(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg_bit(aq_hw, HW_ATL_RPF_RSS_KEY_WR_ENI_ADR,</div><div class='add'>+				  HW_ATL_RPF_RSS_KEY_WR_ENI_MSK,</div><div class='add'>+				  HW_ATL_RPF_RSS_KEY_WR_ENI_SHIFT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpf_rss_key_wr_en_set(struct aq_hw_s *aq_hw, u32 rss_key_wr_en)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_RSS_KEY_WR_ENI_ADR,</div><div class='add'>+			    HW_ATL_RPF_RSS_KEY_WR_ENI_MSK,</div><div class='add'>+			    HW_ATL_RPF_RSS_KEY_WR_ENI_SHIFT,</div><div class='add'>+			    rss_key_wr_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpf_rss_redir_tbl_addr_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				       u32 rss_redir_tbl_addr)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_RSS_REDIR_ADDR_ADR,</div><div class='add'>+			    HW_ATL_RPF_RSS_REDIR_ADDR_MSK,</div><div class='add'>+			    HW_ATL_RPF_RSS_REDIR_ADDR_SHIFT,</div><div class='add'>+			    rss_redir_tbl_addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpf_rss_redir_tbl_wr_data_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					  u32 rss_redir_tbl_wr_data)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_RSS_REDIR_WR_DATA_ADR,</div><div class='add'>+			    HW_ATL_RPF_RSS_REDIR_WR_DATA_MSK,</div><div class='add'>+			    HW_ATL_RPF_RSS_REDIR_WR_DATA_SHIFT,</div><div class='add'>+			    rss_redir_tbl_wr_data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_rpf_rss_redir_wr_en_get(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg_bit(aq_hw, HW_ATL_RPF_RSS_REDIR_WR_ENI_ADR,</div><div class='add'>+				  HW_ATL_RPF_RSS_REDIR_WR_ENI_MSK,</div><div class='add'>+				  HW_ATL_RPF_RSS_REDIR_WR_ENI_SHIFT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpf_rss_redir_wr_en_set(struct aq_hw_s *aq_hw, u32 rss_redir_wr_en)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_RSS_REDIR_WR_ENI_ADR,</div><div class='add'>+			    HW_ATL_RPF_RSS_REDIR_WR_ENI_MSK,</div><div class='add'>+			    HW_ATL_RPF_RSS_REDIR_WR_ENI_SHIFT, rss_redir_wr_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpf_tpo_to_rpf_sys_lbk_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				       u32 tpo_to_rpf_sys_lbk)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_TPO_RPF_SYS_LBK_ADR,</div><div class='add'>+			    HW_ATL_RPF_TPO_RPF_SYS_LBK_MSK,</div><div class='add'>+			    HW_ATL_RPF_TPO_RPF_SYS_LBK_SHIFT,</div><div class='add'>+			    tpo_to_rpf_sys_lbk);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpf_vlan_inner_etht_set(struct aq_hw_s *aq_hw, u32 vlan_inner_etht)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_INNER_TPID_ADR,</div><div class='add'>+			    HW_ATL_RPF_VL_INNER_TPID_MSK,</div><div class='add'>+			    HW_ATL_RPF_VL_INNER_TPID_SHIFT,</div><div class='add'>+			    vlan_inner_etht);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpf_vlan_outer_etht_set(struct aq_hw_s *aq_hw, u32 vlan_outer_etht)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_OUTER_TPID_ADR,</div><div class='add'>+			    HW_ATL_RPF_VL_OUTER_TPID_MSK,</div><div class='add'>+			    HW_ATL_RPF_VL_OUTER_TPID_SHIFT,</div><div class='add'>+			    vlan_outer_etht);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpf_vlan_prom_mode_en_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				      u32 vlan_prom_mode_en)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_PROMIS_MODE_ADR,</div><div class='add'>+			    HW_ATL_RPF_VL_PROMIS_MODE_MSK,</div><div class='add'>+			    HW_ATL_RPF_VL_PROMIS_MODE_SHIFT,</div><div class='add'>+			    vlan_prom_mode_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_rpf_vlan_prom_mode_en_get(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg_bit(aq_hw, HW_ATL_RPF_VL_PROMIS_MODE_ADR,</div><div class='add'>+				  HW_ATL_RPF_VL_PROMIS_MODE_MSK,</div><div class='add'>+				  HW_ATL_RPF_VL_PROMIS_MODE_SHIFT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpf_vlan_accept_untagged_packets_set(struct aq_hw_s *aq_hw,</div><div class='add'>+						 u32 vlan_acc_untagged_packets)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_ACCEPT_UNTAGGED_MODE_ADR,</div><div class='add'>+			    HW_ATL_RPF_VL_ACCEPT_UNTAGGED_MODE_MSK,</div><div class='add'>+			    HW_ATL_RPF_VL_ACCEPT_UNTAGGED_MODE_SHIFT,</div><div class='add'>+			    vlan_acc_untagged_packets);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpf_vlan_untagged_act_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				      u32 vlan_untagged_act)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_UNTAGGED_ACT_ADR,</div><div class='add'>+			    HW_ATL_RPF_VL_UNTAGGED_ACT_MSK,</div><div class='add'>+			    HW_ATL_RPF_VL_UNTAGGED_ACT_SHIFT,</div><div class='add'>+			    vlan_untagged_act);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpf_vlan_flr_en_set(struct aq_hw_s *aq_hw, u32 vlan_flr_en,</div><div class='add'>+				u32 filter)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_EN_F_ADR(filter),</div><div class='add'>+			    HW_ATL_RPF_VL_EN_F_MSK,</div><div class='add'>+			    HW_ATL_RPF_VL_EN_F_SHIFT,</div><div class='add'>+			    vlan_flr_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpf_vlan_flr_act_set(struct aq_hw_s *aq_hw, u32 vlan_flr_act,</div><div class='add'>+				 u32 filter)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_ACT_F_ADR(filter),</div><div class='add'>+			    HW_ATL_RPF_VL_ACT_F_MSK,</div><div class='add'>+			    HW_ATL_RPF_VL_ACT_F_SHIFT,</div><div class='add'>+			    vlan_flr_act);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpf_vlan_id_flr_set(struct aq_hw_s *aq_hw, u32 vlan_id_flr,</div><div class='add'>+				u32 filter)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_ID_F_ADR(filter),</div><div class='add'>+			    HW_ATL_RPF_VL_ID_F_MSK,</div><div class='add'>+			    HW_ATL_RPF_VL_ID_F_SHIFT,</div><div class='add'>+			    vlan_id_flr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpf_vlan_rxq_en_flr_set(struct aq_hw_s *aq_hw, u32 vlan_rxq_en,</div><div class='add'>+				    u32 filter)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_RXQ_EN_F_ADR(filter),</div><div class='add'>+			    HW_ATL_RPF_VL_RXQ_EN_F_MSK,</div><div class='add'>+			    HW_ATL_RPF_VL_RXQ_EN_F_SHIFT,</div><div class='add'>+			    vlan_rxq_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpf_vlan_rxq_flr_set(struct aq_hw_s *aq_hw, u32 vlan_rxq,</div><div class='add'>+				 u32 filter)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_VL_RXQ_F_ADR(filter),</div><div class='add'>+			    HW_ATL_RPF_VL_RXQ_F_MSK,</div><div class='add'>+			    HW_ATL_RPF_VL_RXQ_F_SHIFT,</div><div class='add'>+			    vlan_rxq);</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+void hw_atl_rpf_etht_flr_en_set(struct aq_hw_s *aq_hw, u32 etht_flr_en,</div><div class='add'>+				u32 filter)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_ET_ENF_ADR(filter),</div><div class='add'>+			    HW_ATL_RPF_ET_ENF_MSK,</div><div class='add'>+			    HW_ATL_RPF_ET_ENF_SHIFT, etht_flr_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpf_etht_user_priority_en_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					  u32 etht_user_priority_en, u32 filter)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_ET_UPFEN_ADR(filter),</div><div class='add'>+			    HW_ATL_RPF_ET_UPFEN_MSK, HW_ATL_RPF_ET_UPFEN_SHIFT,</div><div class='add'>+			    etht_user_priority_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpf_etht_rx_queue_en_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				     u32 etht_rx_queue_en,</div><div class='add'>+				     u32 filter)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_ET_RXQFEN_ADR(filter),</div><div class='add'>+			    HW_ATL_RPF_ET_RXQFEN_MSK,</div><div class='add'>+			    HW_ATL_RPF_ET_RXQFEN_SHIFT,</div><div class='add'>+			    etht_rx_queue_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpf_etht_user_priority_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				       u32 etht_user_priority,</div><div class='add'>+				       u32 filter)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_ET_UPF_ADR(filter),</div><div class='add'>+			    HW_ATL_RPF_ET_UPF_MSK,</div><div class='add'>+			    HW_ATL_RPF_ET_UPF_SHIFT, etht_user_priority);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpf_etht_rx_queue_set(struct aq_hw_s *aq_hw, u32 etht_rx_queue,</div><div class='add'>+				  u32 filter)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_ET_RXQF_ADR(filter),</div><div class='add'>+			    HW_ATL_RPF_ET_RXQF_MSK,</div><div class='add'>+			    HW_ATL_RPF_ET_RXQF_SHIFT, etht_rx_queue);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpf_etht_mgt_queue_set(struct aq_hw_s *aq_hw, u32 etht_mgt_queue,</div><div class='add'>+				   u32 filter)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_ET_MNG_RXQF_ADR(filter),</div><div class='add'>+			    HW_ATL_RPF_ET_MNG_RXQF_MSK,</div><div class='add'>+			    HW_ATL_RPF_ET_MNG_RXQF_SHIFT,</div><div class='add'>+			    etht_mgt_queue);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpf_etht_flr_act_set(struct aq_hw_s *aq_hw, u32 etht_flr_act,</div><div class='add'>+				 u32 filter)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_ET_ACTF_ADR(filter),</div><div class='add'>+			    HW_ATL_RPF_ET_ACTF_MSK,</div><div class='add'>+			    HW_ATL_RPF_ET_ACTF_SHIFT, etht_flr_act);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpf_etht_flr_set(struct aq_hw_s *aq_hw, u32 etht_flr, u32 filter)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_ET_VALF_ADR(filter),</div><div class='add'>+			    HW_ATL_RPF_ET_VALF_MSK,</div><div class='add'>+			    HW_ATL_RPF_ET_VALF_SHIFT, etht_flr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpf_l4_spd_set(struct aq_hw_s *aq_hw, u32 val, u32 filter)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L4_SPD_ADR(filter),</div><div class='add'>+			    HW_ATL_RPF_L4_SPD_MSK,</div><div class='add'>+			    HW_ATL_RPF_L4_SPD_SHIFT, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpf_l4_dpd_set(struct aq_hw_s *aq_hw, u32 val, u32 filter)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPF_L4_DPD_ADR(filter),</div><div class='add'>+			    HW_ATL_RPF_L4_DPD_MSK,</div><div class='add'>+			    HW_ATL_RPF_L4_DPD_SHIFT, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* RPO: rx packet offload */</div><div class='add'>+void hw_atl_rpo_ipv4header_crc_offload_en_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					      u32 ipv4header_crc_offload_en)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPO_IPV4CHK_EN_ADR,</div><div class='add'>+			    HW_ATL_RPO_IPV4CHK_EN_MSK,</div><div class='add'>+			    HW_ATL_RPO_IPV4CHK_EN_SHIFT,</div><div class='add'>+			    ipv4header_crc_offload_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpo_rx_desc_vlan_stripping_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					   u32 rx_desc_vlan_stripping,</div><div class='add'>+					   u32 descriptor)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPO_DESCDVL_STRIP_ADR(descriptor),</div><div class='add'>+			    HW_ATL_RPO_DESCDVL_STRIP_MSK,</div><div class='add'>+			    HW_ATL_RPO_DESCDVL_STRIP_SHIFT,</div><div class='add'>+			    rx_desc_vlan_stripping);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpo_outer_vlan_tag_mode_set(void *context,</div><div class='add'>+					u32 outervlantagmode)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(context, HW_ATL_RPO_OUTER_VL_INS_MODE_ADR,</div><div class='add'>+			    HW_ATL_RPO_OUTER_VL_INS_MODE_MSK,</div><div class='add'>+			    HW_ATL_RPO_OUTER_VL_INS_MODE_SHIFT,</div><div class='add'>+			    outervlantagmode);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_rpo_outer_vlan_tag_mode_get(void *context)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg_bit(context, HW_ATL_RPO_OUTER_VL_INS_MODE_ADR,</div><div class='add'>+				  HW_ATL_RPO_OUTER_VL_INS_MODE_MSK,</div><div class='add'>+				  HW_ATL_RPO_OUTER_VL_INS_MODE_SHIFT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpo_tcp_udp_crc_offload_en_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					   u32 tcp_udp_crc_offload_en)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPOL4CHK_EN_ADR,</div><div class='add'>+			    HW_ATL_RPOL4CHK_EN_MSK,</div><div class='add'>+			    HW_ATL_RPOL4CHK_EN_SHIFT, tcp_udp_crc_offload_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpo_lro_en_set(struct aq_hw_s *aq_hw, u32 lro_en)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_RPO_LRO_EN_ADR, lro_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpo_lro_patch_optimization_en_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					      u32 lro_patch_optimization_en)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPO_LRO_PTOPT_EN_ADR,</div><div class='add'>+			    HW_ATL_RPO_LRO_PTOPT_EN_MSK,</div><div class='add'>+			    HW_ATL_RPO_LRO_PTOPT_EN_SHIFT,</div><div class='add'>+			    lro_patch_optimization_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpo_lro_qsessions_lim_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				      u32 lro_qsessions_lim)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPO_LRO_QSES_LMT_ADR,</div><div class='add'>+			    HW_ATL_RPO_LRO_QSES_LMT_MSK,</div><div class='add'>+			    HW_ATL_RPO_LRO_QSES_LMT_SHIFT,</div><div class='add'>+			    lro_qsessions_lim);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpo_lro_total_desc_lim_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				       u32 lro_total_desc_lim)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPO_LRO_TOT_DSC_LMT_ADR,</div><div class='add'>+			    HW_ATL_RPO_LRO_TOT_DSC_LMT_MSK,</div><div class='add'>+			    HW_ATL_RPO_LRO_TOT_DSC_LMT_SHIFT,</div><div class='add'>+			    lro_total_desc_lim);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpo_lro_min_pay_of_first_pkt_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					     u32 lro_min_pld_of_first_pkt)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPO_LRO_PKT_MIN_ADR,</div><div class='add'>+			    HW_ATL_RPO_LRO_PKT_MIN_MSK,</div><div class='add'>+			    HW_ATL_RPO_LRO_PKT_MIN_SHIFT,</div><div class='add'>+			    lro_min_pld_of_first_pkt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpo_lro_pkt_lim_set(struct aq_hw_s *aq_hw, u32 lro_pkt_lim)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_RPO_LRO_RSC_MAX_ADR, lro_pkt_lim);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpo_lro_max_num_of_descriptors_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					       u32 lro_max_number_of_descriptors,</div><div class='add'>+					       u32 lro)</div><div class='add'>+{</div><div class='add'>+/* Register address for bitfield lro{L}_des_max[1:0] */</div><div class='add'>+	static u32 rpo_lro_ldes_max_adr[32] = {</div><div class='add'>+			0x000055A0U, 0x000055A0U, 0x000055A0U, 0x000055A0U,</div><div class='add'>+			0x000055A0U, 0x000055A0U, 0x000055A0U, 0x000055A0U,</div><div class='add'>+			0x000055A4U, 0x000055A4U, 0x000055A4U, 0x000055A4U,</div><div class='add'>+			0x000055A4U, 0x000055A4U, 0x000055A4U, 0x000055A4U,</div><div class='add'>+			0x000055A8U, 0x000055A8U, 0x000055A8U, 0x000055A8U,</div><div class='add'>+			0x000055A8U, 0x000055A8U, 0x000055A8U, 0x000055A8U,</div><div class='add'>+			0x000055ACU, 0x000055ACU, 0x000055ACU, 0x000055ACU,</div><div class='add'>+			0x000055ACU, 0x000055ACU, 0x000055ACU, 0x000055ACU</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+/* Bitmask for bitfield lro{L}_des_max[1:0] */</div><div class='add'>+	static u32 rpo_lro_ldes_max_msk[32] = {</div><div class='add'>+			0x00000003U, 0x00000030U, 0x00000300U, 0x00003000U,</div><div class='add'>+			0x00030000U, 0x00300000U, 0x03000000U, 0x30000000U,</div><div class='add'>+			0x00000003U, 0x00000030U, 0x00000300U, 0x00003000U,</div><div class='add'>+			0x00030000U, 0x00300000U, 0x03000000U, 0x30000000U,</div><div class='add'>+			0x00000003U, 0x00000030U, 0x00000300U, 0x00003000U,</div><div class='add'>+			0x00030000U, 0x00300000U, 0x03000000U, 0x30000000U,</div><div class='add'>+			0x00000003U, 0x00000030U, 0x00000300U, 0x00003000U,</div><div class='add'>+			0x00030000U, 0x00300000U, 0x03000000U, 0x30000000U</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+/* Lower bit position of bitfield lro{L}_des_max[1:0] */</div><div class='add'>+	static u32 rpo_lro_ldes_max_shift[32] = {</div><div class='add'>+			0U, 4U, 8U, 12U, 16U, 20U, 24U, 28U,</div><div class='add'>+			0U, 4U, 8U, 12U, 16U, 20U, 24U, 28U,</div><div class='add'>+			0U, 4U, 8U, 12U, 16U, 20U, 24U, 28U,</div><div class='add'>+			0U, 4U, 8U, 12U, 16U, 20U, 24U, 28U</div><div class='add'>+		};</div><div class='add'>+</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, rpo_lro_ldes_max_adr[lro],</div><div class='add'>+			    rpo_lro_ldes_max_msk[lro],</div><div class='add'>+			    rpo_lro_ldes_max_shift[lro],</div><div class='add'>+			    lro_max_number_of_descriptors);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpo_lro_time_base_divider_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					  u32 lro_time_base_divider)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPO_LRO_TB_DIV_ADR,</div><div class='add'>+			    HW_ATL_RPO_LRO_TB_DIV_MSK,</div><div class='add'>+			    HW_ATL_RPO_LRO_TB_DIV_SHIFT,</div><div class='add'>+			    lro_time_base_divider);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpo_lro_inactive_interval_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					  u32 lro_inactive_interval)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPO_LRO_INA_IVAL_ADR,</div><div class='add'>+			    HW_ATL_RPO_LRO_INA_IVAL_MSK,</div><div class='add'>+			    HW_ATL_RPO_LRO_INA_IVAL_SHIFT,</div><div class='add'>+			    lro_inactive_interval);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpo_lro_max_coalescing_interval_set(struct aq_hw_s *aq_hw,</div><div class='add'>+						u32 lro_max_coal_interval)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RPO_LRO_MAX_IVAL_ADR,</div><div class='add'>+			    HW_ATL_RPO_LRO_MAX_IVAL_MSK,</div><div class='add'>+			    HW_ATL_RPO_LRO_MAX_IVAL_SHIFT,</div><div class='add'>+			    lro_max_coal_interval);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* rx */</div><div class='add'>+void hw_atl_rx_rx_reg_res_dis_set(struct aq_hw_s *aq_hw, u32 rx_reg_res_dis)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_RX_REG_RES_DSBL_ADR,</div><div class='add'>+			    HW_ATL_RX_REG_RES_DSBL_MSK,</div><div class='add'>+			    HW_ATL_RX_REG_RES_DSBL_SHIFT,</div><div class='add'>+			    rx_reg_res_dis);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* tdm */</div><div class='add'>+void hw_atl_tdm_cpu_id_set(struct aq_hw_s *aq_hw, u32 cpuid, u32 dca)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_TDM_DCADCPUID_ADR(dca),</div><div class='add'>+			    HW_ATL_TDM_DCADCPUID_MSK,</div><div class='add'>+			    HW_ATL_TDM_DCADCPUID_SHIFT, cpuid);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_tdm_large_send_offload_en_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					  u32 large_send_offload_en)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_TDM_LSO_EN_ADR, large_send_offload_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_tdm_tx_dca_en_set(struct aq_hw_s *aq_hw, u32 tx_dca_en)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_TDM_DCA_EN_ADR, HW_ATL_TDM_DCA_EN_MSK,</div><div class='add'>+			    HW_ATL_TDM_DCA_EN_SHIFT, tx_dca_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_tdm_tx_dca_mode_set(struct aq_hw_s *aq_hw, u32 tx_dca_mode)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_TDM_DCA_MODE_ADR,</div><div class='add'>+			    HW_ATL_TDM_DCA_MODE_MSK,</div><div class='add'>+			    HW_ATL_TDM_DCA_MODE_SHIFT, tx_dca_mode);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_tdm_tx_desc_dca_en_set(struct aq_hw_s *aq_hw, u32 tx_desc_dca_en,</div><div class='add'>+				   u32 dca)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_TDM_DCADDESC_EN_ADR(dca),</div><div class='add'>+			    HW_ATL_TDM_DCADDESC_EN_MSK,</div><div class='add'>+			    HW_ATL_TDM_DCADDESC_EN_SHIFT,</div><div class='add'>+			    tx_desc_dca_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_tdm_tx_desc_en_set(struct aq_hw_s *aq_hw, u32 tx_desc_en,</div><div class='add'>+			       u32 descriptor)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_TDM_DESCDEN_ADR(descriptor),</div><div class='add'>+			    HW_ATL_TDM_DESCDEN_MSK,</div><div class='add'>+			    HW_ATL_TDM_DESCDEN_SHIFT,</div><div class='add'>+			    tx_desc_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_tdm_tx_desc_head_ptr_get(struct aq_hw_s *aq_hw, u32 descriptor)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg_bit(aq_hw, HW_ATL_TDM_DESCDHD_ADR(descriptor),</div><div class='add'>+				  HW_ATL_TDM_DESCDHD_MSK,</div><div class='add'>+				  HW_ATL_TDM_DESCDHD_SHIFT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_tdm_tx_desc_len_set(struct aq_hw_s *aq_hw, u32 tx_desc_len,</div><div class='add'>+				u32 descriptor)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_TDM_DESCDLEN_ADR(descriptor),</div><div class='add'>+			    HW_ATL_TDM_DESCDLEN_MSK,</div><div class='add'>+			    HW_ATL_TDM_DESCDLEN_SHIFT,</div><div class='add'>+			    tx_desc_len);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_tdm_tx_desc_wr_wb_irq_en_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					 u32 tx_desc_wr_wb_irq_en)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_TDM_INT_DESC_WRB_EN_ADR,</div><div class='add'>+			    HW_ATL_TDM_INT_DESC_WRB_EN_MSK,</div><div class='add'>+			    HW_ATL_TDM_INT_DESC_WRB_EN_SHIFT,</div><div class='add'>+			    tx_desc_wr_wb_irq_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_tdm_tx_desc_wr_wb_threshold_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					    u32 tx_desc_wr_wb_threshold,</div><div class='add'>+					    u32 descriptor)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_TDM_DESCDWRB_THRESH_ADR(descriptor),</div><div class='add'>+			    HW_ATL_TDM_DESCDWRB_THRESH_MSK,</div><div class='add'>+			    HW_ATL_TDM_DESCDWRB_THRESH_SHIFT,</div><div class='add'>+			    tx_desc_wr_wb_threshold);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_tdm_tdm_intr_moder_en_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				      u32 tdm_irq_moderation_en)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_TDM_INT_MOD_EN_ADR,</div><div class='add'>+			    HW_ATL_TDM_INT_MOD_EN_MSK,</div><div class='add'>+			    HW_ATL_TDM_INT_MOD_EN_SHIFT,</div><div class='add'>+			    tdm_irq_moderation_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* thm */</div><div class='add'>+void hw_atl_thm_lso_tcp_flag_of_first_pkt_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					      u32 lso_tcp_flag_of_first_pkt)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_THM_LSO_TCP_FLAG_FIRST_ADR,</div><div class='add'>+			    HW_ATL_THM_LSO_TCP_FLAG_FIRST_MSK,</div><div class='add'>+			    HW_ATL_THM_LSO_TCP_FLAG_FIRST_SHIFT,</div><div class='add'>+			    lso_tcp_flag_of_first_pkt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_thm_lso_tcp_flag_of_last_pkt_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					     u32 lso_tcp_flag_of_last_pkt)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_THM_LSO_TCP_FLAG_LAST_ADR,</div><div class='add'>+			    HW_ATL_THM_LSO_TCP_FLAG_LAST_MSK,</div><div class='add'>+			    HW_ATL_THM_LSO_TCP_FLAG_LAST_SHIFT,</div><div class='add'>+			    lso_tcp_flag_of_last_pkt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_thm_lso_tcp_flag_of_middle_pkt_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					       u32 lso_tcp_flag_of_middle_pkt)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_THM_LSO_TCP_FLAG_MID_ADR,</div><div class='add'>+			    HW_ATL_THM_LSO_TCP_FLAG_MID_MSK,</div><div class='add'>+			    HW_ATL_THM_LSO_TCP_FLAG_MID_SHIFT,</div><div class='add'>+			    lso_tcp_flag_of_middle_pkt);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* TPB: tx packet buffer */</div><div class='add'>+void hw_atl_tpb_tx_buff_en_set(struct aq_hw_s *aq_hw, u32 tx_buff_en)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_TPB_TX_BUF_EN_ADR,</div><div class='add'>+			    HW_ATL_TPB_TX_BUF_EN_MSK,</div><div class='add'>+			    HW_ATL_TPB_TX_BUF_EN_SHIFT, tx_buff_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_tpb_tps_tx_tc_mode_get(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg_bit(aq_hw, HW_ATL_TPB_TX_TC_MODE_ADDR,</div><div class='add'>+			HW_ATL_TPB_TX_TC_MODE_MSK,</div><div class='add'>+			HW_ATL_TPB_TX_TC_MODE_SHIFT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_tpb_tps_tx_tc_mode_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				   u32 tx_traf_class_mode)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_TPB_TX_TC_MODE_ADDR,</div><div class='add'>+			HW_ATL_TPB_TX_TC_MODE_MSK,</div><div class='add'>+			HW_ATL_TPB_TX_TC_MODE_SHIFT,</div><div class='add'>+			tx_traf_class_mode);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_tpb_tx_buff_hi_threshold_per_tc_set(struct aq_hw_s *aq_hw,</div><div class='add'>+						u32 tx_buff_hi_threshold_per_tc,</div><div class='add'>+					 u32 buffer)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_TPB_TXBHI_THRESH_ADR(buffer),</div><div class='add'>+			    HW_ATL_TPB_TXBHI_THRESH_MSK,</div><div class='add'>+			    HW_ATL_TPB_TXBHI_THRESH_SHIFT,</div><div class='add'>+			    tx_buff_hi_threshold_per_tc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_tpb_tx_buff_lo_threshold_per_tc_set(struct aq_hw_s *aq_hw,</div><div class='add'>+						u32 tx_buff_lo_threshold_per_tc,</div><div class='add'>+					 u32 buffer)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_TPB_TXBLO_THRESH_ADR(buffer),</div><div class='add'>+			    HW_ATL_TPB_TXBLO_THRESH_MSK,</div><div class='add'>+			    HW_ATL_TPB_TXBLO_THRESH_SHIFT,</div><div class='add'>+			    tx_buff_lo_threshold_per_tc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_tpb_tx_dma_sys_lbk_en_set(struct aq_hw_s *aq_hw, u32 tx_dma_sys_lbk_en)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_TPB_DMA_SYS_LBK_ADR,</div><div class='add'>+			    HW_ATL_TPB_DMA_SYS_LBK_MSK,</div><div class='add'>+			    HW_ATL_TPB_DMA_SYS_LBK_SHIFT,</div><div class='add'>+			    tx_dma_sys_lbk_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_tpb_tx_dma_net_lbk_en_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				      u32 tx_dma_net_lbk_en)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_TPB_DMA_NET_LBK_ADR,</div><div class='add'>+			    HW_ATL_TPB_DMA_NET_LBK_MSK,</div><div class='add'>+			    HW_ATL_TPB_DMA_NET_LBK_SHIFT,</div><div class='add'>+			    tx_dma_net_lbk_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_tpb_tx_tx_clk_gate_en_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				      u32 tx_clk_gate_en)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_TPB_TX_CLK_GATE_EN_ADR,</div><div class='add'>+			    HW_ATL_TPB_TX_CLK_GATE_EN_MSK,</div><div class='add'>+			    HW_ATL_TPB_TX_CLK_GATE_EN_SHIFT,</div><div class='add'>+			    tx_clk_gate_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_tpb_tx_pkt_buff_size_per_tc_set(struct aq_hw_s *aq_hw,</div><div class='add'>+</div><div class='add'>+					    u32 tx_pkt_buff_size_per_tc, u32 buffer)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_TPB_TXBBUF_SIZE_ADR(buffer),</div><div class='add'>+			    HW_ATL_TPB_TXBBUF_SIZE_MSK,</div><div class='add'>+			    HW_ATL_TPB_TXBBUF_SIZE_SHIFT,</div><div class='add'>+			    tx_pkt_buff_size_per_tc);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_tpb_tx_path_scp_ins_en_set(struct aq_hw_s *aq_hw, u32 tx_path_scp_ins_en)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_TPB_TX_SCP_INS_EN_ADR,</div><div class='add'>+			    HW_ATL_TPB_TX_SCP_INS_EN_MSK,</div><div class='add'>+			    HW_ATL_TPB_TX_SCP_INS_EN_SHIFT,</div><div class='add'>+			    tx_path_scp_ins_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* TPO: tx packet offload */</div><div class='add'>+void hw_atl_tpo_ipv4header_crc_offload_en_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					      u32 ipv4header_crc_offload_en)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_TPO_IPV4CHK_EN_ADR,</div><div class='add'>+			    HW_ATL_TPO_IPV4CHK_EN_MSK,</div><div class='add'>+			    HW_ATL_TPO_IPV4CHK_EN_SHIFT,</div><div class='add'>+			    ipv4header_crc_offload_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_tpo_tcp_udp_crc_offload_en_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					   u32 tcp_udp_crc_offload_en)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_TPOL4CHK_EN_ADR,</div><div class='add'>+			    HW_ATL_TPOL4CHK_EN_MSK,</div><div class='add'>+			    HW_ATL_TPOL4CHK_EN_SHIFT,</div><div class='add'>+			    tcp_udp_crc_offload_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_tpo_tx_pkt_sys_lbk_en_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				      u32 tx_pkt_sys_lbk_en)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_TPO_PKT_SYS_LBK_ADR,</div><div class='add'>+			    HW_ATL_TPO_PKT_SYS_LBK_MSK,</div><div class='add'>+			    HW_ATL_TPO_PKT_SYS_LBK_SHIFT,</div><div class='add'>+			    tx_pkt_sys_lbk_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* TPS: tx packet scheduler */</div><div class='add'>+void hw_atl_tps_tx_pkt_shed_data_arb_mode_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					      u32 tx_pkt_shed_data_arb_mode)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_TPS_DATA_TC_ARB_MODE_ADR,</div><div class='add'>+			    HW_ATL_TPS_DATA_TC_ARB_MODE_MSK,</div><div class='add'>+			    HW_ATL_TPS_DATA_TC_ARB_MODE_SHIFT,</div><div class='add'>+			    tx_pkt_shed_data_arb_mode);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_tps_tx_pkt_shed_desc_rate_curr_time_res_set(struct aq_hw_s *aq_hw,</div><div class='add'>+							u32 curr_time_res)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_TPS_DESC_RATE_TA_RST_ADR,</div><div class='add'>+			    HW_ATL_TPS_DESC_RATE_TA_RST_MSK,</div><div class='add'>+			    HW_ATL_TPS_DESC_RATE_TA_RST_SHIFT,</div><div class='add'>+			    curr_time_res);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_tps_tx_pkt_shed_desc_rate_lim_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					      u32 tx_pkt_shed_desc_rate_lim)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_TPS_DESC_RATE_LIM_ADR,</div><div class='add'>+			    HW_ATL_TPS_DESC_RATE_LIM_MSK,</div><div class='add'>+			    HW_ATL_TPS_DESC_RATE_LIM_SHIFT,</div><div class='add'>+			    tx_pkt_shed_desc_rate_lim);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_tps_tx_pkt_shed_desc_tc_arb_mode_set(struct aq_hw_s *aq_hw,</div><div class='add'>+						 u32 arb_mode)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_TPS_DESC_TC_ARB_MODE_ADR,</div><div class='add'>+			    HW_ATL_TPS_DESC_TC_ARB_MODE_MSK,</div><div class='add'>+			    HW_ATL_TPS_DESC_TC_ARB_MODE_SHIFT,</div><div class='add'>+			    arb_mode);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_tps_tx_pkt_shed_desc_tc_max_credit_set(struct aq_hw_s *aq_hw,</div><div class='add'>+						   const u32 tc,</div><div class='add'>+						   const u32 max_credit)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_TPS_DESC_TCTCREDIT_MAX_ADR(tc),</div><div class='add'>+			    HW_ATL_TPS_DESC_TCTCREDIT_MAX_MSK,</div><div class='add'>+			    HW_ATL_TPS_DESC_TCTCREDIT_MAX_SHIFT,</div><div class='add'>+			    max_credit);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_tps_tx_pkt_shed_desc_tc_weight_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					       const u32 tc,</div><div class='add'>+					       const u32 weight)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_TPS_DESC_TCTWEIGHT_ADR(tc),</div><div class='add'>+			    HW_ATL_TPS_DESC_TCTWEIGHT_MSK,</div><div class='add'>+			    HW_ATL_TPS_DESC_TCTWEIGHT_SHIFT,</div><div class='add'>+			    weight);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_tps_tx_pkt_shed_desc_vm_arb_mode_set(struct aq_hw_s *aq_hw,</div><div class='add'>+						 u32 arb_mode)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_TPS_DESC_VM_ARB_MODE_ADR,</div><div class='add'>+			    HW_ATL_TPS_DESC_VM_ARB_MODE_MSK,</div><div class='add'>+			    HW_ATL_TPS_DESC_VM_ARB_MODE_SHIFT,</div><div class='add'>+			    arb_mode);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_tps_tx_pkt_shed_tc_data_max_credit_set(struct aq_hw_s *aq_hw,</div><div class='add'>+						   const u32 tc,</div><div class='add'>+						   const u32 max_credit)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_TPS_DATA_TCTCREDIT_MAX_ADR(tc),</div><div class='add'>+			    HW_ATL_TPS_DATA_TCTCREDIT_MAX_MSK,</div><div class='add'>+			    HW_ATL_TPS_DATA_TCTCREDIT_MAX_SHIFT,</div><div class='add'>+			    max_credit);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_tps_tx_pkt_shed_tc_data_weight_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					       const u32 tc,</div><div class='add'>+					       const u32 weight)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_TPS_DATA_TCTWEIGHT_ADR(tc),</div><div class='add'>+			    HW_ATL_TPS_DATA_TCTWEIGHT_MSK,</div><div class='add'>+			    HW_ATL_TPS_DATA_TCTWEIGHT_SHIFT,</div><div class='add'>+			    weight);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_tps_tx_desc_rate_mode_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				      const u32 rate_mode)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_TPS_TX_DESC_RATE_MODE_ADR,</div><div class='add'>+			    HW_ATL_TPS_TX_DESC_RATE_MODE_MSK,</div><div class='add'>+			    HW_ATL_TPS_TX_DESC_RATE_MODE_SHIFT,</div><div class='add'>+			    rate_mode);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_tps_tx_desc_rate_en_set(struct aq_hw_s *aq_hw, const u32 desc,</div><div class='add'>+				    const u32 enable)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_TPS_DESC_RATE_EN_ADR(desc),</div><div class='add'>+			    HW_ATL_TPS_DESC_RATE_EN_MSK,</div><div class='add'>+			    HW_ATL_TPS_DESC_RATE_EN_SHIFT,</div><div class='add'>+			    enable);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_tps_tx_desc_rate_x_set(struct aq_hw_s *aq_hw, const u32 desc,</div><div class='add'>+				   const u32 rate_int)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_TPS_DESC_RATE_X_ADR(desc),</div><div class='add'>+			    HW_ATL_TPS_DESC_RATE_X_MSK,</div><div class='add'>+			    HW_ATL_TPS_DESC_RATE_X_SHIFT,</div><div class='add'>+			    rate_int);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_tps_tx_desc_rate_y_set(struct aq_hw_s *aq_hw, const u32 desc,</div><div class='add'>+				   const u32 rate_frac)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_TPS_DESC_RATE_Y_ADR(desc),</div><div class='add'>+			    HW_ATL_TPS_DESC_RATE_Y_MSK,</div><div class='add'>+			    HW_ATL_TPS_DESC_RATE_Y_SHIFT,</div><div class='add'>+			    rate_frac);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* tx */</div><div class='add'>+void hw_atl_tx_tx_reg_res_dis_set(struct aq_hw_s *aq_hw, u32 tx_reg_res_dis)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_TX_REG_RES_DSBL_ADR,</div><div class='add'>+			    HW_ATL_TX_REG_RES_DSBL_MSK,</div><div class='add'>+			    HW_ATL_TX_REG_RES_DSBL_SHIFT, tx_reg_res_dis);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* msm */</div><div class='add'>+u32 hw_atl_msm_reg_access_status_get(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg_bit(aq_hw, HW_ATL_MSM_REG_ACCESS_BUSY_ADR,</div><div class='add'>+				  HW_ATL_MSM_REG_ACCESS_BUSY_MSK,</div><div class='add'>+				  HW_ATL_MSM_REG_ACCESS_BUSY_SHIFT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_msm_reg_addr_for_indirect_addr_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					       u32 reg_addr_for_indirect_addr)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_MSM_REG_ADDR_ADR,</div><div class='add'>+			    HW_ATL_MSM_REG_ADDR_MSK,</div><div class='add'>+			    HW_ATL_MSM_REG_ADDR_SHIFT,</div><div class='add'>+			    reg_addr_for_indirect_addr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_msm_reg_rd_strobe_set(struct aq_hw_s *aq_hw, u32 reg_rd_strobe)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_MSM_REG_RD_STROBE_ADR,</div><div class='add'>+			    HW_ATL_MSM_REG_RD_STROBE_MSK,</div><div class='add'>+			    HW_ATL_MSM_REG_RD_STROBE_SHIFT,</div><div class='add'>+			    reg_rd_strobe);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_msm_reg_rd_data_get(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg(aq_hw, HW_ATL_MSM_REG_RD_DATA_ADR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_msm_reg_wr_data_set(struct aq_hw_s *aq_hw, u32 reg_wr_data)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_MSM_REG_WR_DATA_ADR, reg_wr_data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_msm_reg_wr_strobe_set(struct aq_hw_s *aq_hw, u32 reg_wr_strobe)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_MSM_REG_WR_STROBE_ADR,</div><div class='add'>+			    HW_ATL_MSM_REG_WR_STROBE_MSK,</div><div class='add'>+			    HW_ATL_MSM_REG_WR_STROBE_SHIFT,</div><div class='add'>+			    reg_wr_strobe);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* pci */</div><div class='add'>+void hw_atl_pci_pci_reg_res_dis_set(struct aq_hw_s *aq_hw, u32 pci_reg_res_dis)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_PCI_REG_RES_DSBL_ADR,</div><div class='add'>+			    HW_ATL_PCI_REG_RES_DSBL_MSK,</div><div class='add'>+			    HW_ATL_PCI_REG_RES_DSBL_SHIFT,</div><div class='add'>+			    pci_reg_res_dis);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_reg_glb_cpu_scratch_scp_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					u32 glb_cpu_scratch_scp,</div><div class='add'>+					u32 scratch_scp)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_GLB_CPU_SCRATCH_SCP_ADR(scratch_scp),</div><div class='add'>+			glb_cpu_scratch_scp);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_pcs_ptp_clock_read_enable(struct aq_hw_s *aq_hw,</div><div class='add'>+				      u32 ptp_clock_read_enable)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_PCS_PTP_CLOCK_READ_ENABLE_ADR,</div><div class='add'>+			    HW_ATL_PCS_PTP_CLOCK_READ_ENABLE_MSK,</div><div class='add'>+			    HW_ATL_PCS_PTP_CLOCK_READ_ENABLE_SHIFT,</div><div class='add'>+			    ptp_clock_read_enable);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_pcs_ptp_clock_get(struct aq_hw_s *aq_hw, u32 index)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg(aq_hw, HW_ATL_PCS_PTP_TS_VAL_ADDR(index));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_mcp_up_force_intr_set(struct aq_hw_s *aq_hw, u32 up_force_intr)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL_MCP_UP_FORCE_INTERRUPT_ADR,</div><div class='add'>+			    HW_ATL_MCP_UP_FORCE_INTERRUPT_MSK,</div><div class='add'>+			    HW_ATL_MCP_UP_FORCE_INTERRUPT_SHIFT,</div><div class='add'>+			    up_force_intr);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpfl3l4_ipv4_dest_addr_clear(struct aq_hw_s *aq_hw, u8 location)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_RPF_L3_DSTA_ADR(location), 0U);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpfl3l4_ipv4_src_addr_clear(struct aq_hw_s *aq_hw, u8 location)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_RPF_L3_SRCA_ADR(location), 0U);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpfl3l4_cmd_clear(struct aq_hw_s *aq_hw, u8 location)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_RPF_L3_REG_CTRL_ADR(location), 0U);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpfl3l4_ipv6_dest_addr_clear(struct aq_hw_s *aq_hw, u8 location)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 4; ++i)</div><div class='add'>+		aq_hw_write_reg(aq_hw,</div><div class='add'>+				HW_ATL_RPF_L3_DSTA_ADR(location + i),</div><div class='add'>+				0U);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpfl3l4_ipv6_src_addr_clear(struct aq_hw_s *aq_hw, u8 location)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 4; ++i)</div><div class='add'>+		aq_hw_write_reg(aq_hw,</div><div class='add'>+				HW_ATL_RPF_L3_SRCA_ADR(location + i),</div><div class='add'>+				0U);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpfl3l4_ipv4_dest_addr_set(struct aq_hw_s *aq_hw, u8 location,</div><div class='add'>+				       u32 ipv4_dest)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_RPF_L3_DSTA_ADR(location),</div><div class='add'>+			ipv4_dest);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpfl3l4_ipv4_src_addr_set(struct aq_hw_s *aq_hw, u8 location,</div><div class='add'>+				      u32 ipv4_src)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw,</div><div class='add'>+			HW_ATL_RPF_L3_SRCA_ADR(location),</div><div class='add'>+			ipv4_src);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpfl3l4_cmd_set(struct aq_hw_s *aq_hw, u8 location, u32 cmd)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_RPF_L3_REG_CTRL_ADR(location), cmd);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpfl3l4_ipv6_src_addr_set(struct aq_hw_s *aq_hw, u8 location,</div><div class='add'>+				      u32 *ipv6_src)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 4; ++i)</div><div class='add'>+		aq_hw_write_reg(aq_hw,</div><div class='add'>+				HW_ATL_RPF_L3_SRCA_ADR(location + i),</div><div class='add'>+				ipv6_src[3 - i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_rpfl3l4_ipv6_dest_addr_set(struct aq_hw_s *aq_hw, u8 location,</div><div class='add'>+				       u32 *ipv6_dest)</div><div class='add'>+{</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; 4; ++i)</div><div class='add'>+		aq_hw_write_reg(aq_hw,</div><div class='add'>+				HW_ATL_RPF_L3_DSTA_ADR(location + i),</div><div class='add'>+				ipv6_dest[3 - i]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_sem_ram_get(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	return hw_atl_reg_glb_cpu_sem_get(self, HW_ATL_FW_SM_RAM);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_sem_mdio_get(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	return hw_atl_reg_glb_cpu_sem_get(self, HW_ATL_FW_SM_MDIO);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_sem_reset1_get(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	return hw_atl_reg_glb_cpu_sem_get(self, HW_ATL_FW_SM_RESET1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_sem_reset2_get(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	return hw_atl_reg_glb_cpu_sem_get(self, HW_ATL_FW_SM_RESET2);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_scrpad_get(struct aq_hw_s *aq_hw, u32 scratch_scp)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg(aq_hw,</div><div class='add'>+			      HW_ATL_GLB_CPU_SCRATCH_SCP_ADR(scratch_scp));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_scrpad12_get(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	return  hw_atl_scrpad_get(self, 0xB);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_scrpad25_get(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	return hw_atl_scrpad_get(self, 0x18);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_glb_mdio_iface1_set(struct aq_hw_s *aq_hw, u32 value)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_GLB_MDIO_IFACE_N_ADR(1), value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_glb_mdio_iface1_get(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg(aq_hw, HW_ATL_GLB_MDIO_IFACE_N_ADR(1));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_glb_mdio_iface2_set(struct aq_hw_s *aq_hw, u32 value)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_GLB_MDIO_IFACE_N_ADR(2), value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_glb_mdio_iface2_get(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg(aq_hw, HW_ATL_GLB_MDIO_IFACE_N_ADR(2));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_glb_mdio_iface3_set(struct aq_hw_s *aq_hw, u32 value)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_GLB_MDIO_IFACE_N_ADR(3), value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_glb_mdio_iface3_get(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg(aq_hw, HW_ATL_GLB_MDIO_IFACE_N_ADR(3));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_glb_mdio_iface4_set(struct aq_hw_s *aq_hw, u32 value)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_GLB_MDIO_IFACE_N_ADR(4), value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_glb_mdio_iface4_get(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg(aq_hw, HW_ATL_GLB_MDIO_IFACE_N_ADR(4));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_glb_mdio_iface5_set(struct aq_hw_s *aq_hw, u32 value)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL_GLB_MDIO_IFACE_N_ADR(5), value);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_glb_mdio_iface5_get(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg(aq_hw, HW_ATL_GLB_MDIO_IFACE_N_ADR(5));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_mdio_busy_get(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg_bit(aq_hw, HW_ATL_MDIO_BUSY_ADR,</div><div class='add'>+				  HW_ATL_MDIO_BUSY_MSK,</div><div class='add'>+				  HW_ATL_MDIO_BUSY_SHIFT);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh.h b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh.h<br/>new file mode 100644<br/>index 000000000000..5fd506acacb5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh.h</a></div><div class='hunk'>@@ -0,0 +1,893 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2014-2019 aQuantia Corporation</div><div class='add'>+ * Copyright (C) 2019-2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* File hw_atl_llh.h: Declarations of bitfield and register access functions for</div><div class='add'>+ * Atlantic registers.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef HW_ATL_LLH_H</div><div class='add'>+#define HW_ATL_LLH_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+struct aq_hw_s;</div><div class='add'>+</div><div class='add'>+/* set temperature sense reset */</div><div class='add'>+void hw_atl_ts_reset_set(struct aq_hw_s *aq_hw, u32 val);</div><div class='add'>+</div><div class='add'>+/* set temperature sense power down */</div><div class='add'>+void hw_atl_ts_power_down_set(struct aq_hw_s *aq_hw, u32 val);</div><div class='add'>+</div><div class='add'>+/* get temperature sense power down */</div><div class='add'>+u32 hw_atl_ts_power_down_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* get temperature sense ready */</div><div class='add'>+u32 hw_atl_ts_ready_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* get temperature sense ready latch high */</div><div class='add'>+u32 hw_atl_ts_ready_latch_high_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* get temperature sense data */</div><div class='add'>+u32 hw_atl_ts_data_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* SMBUS0 bus busy */</div><div class='add'>+u32 hw_atl_smb0_bus_busy_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* SMBUS0 byte transfer complete */</div><div class='add'>+u32 hw_atl_smb0_byte_transfer_complete_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* SMBUS0 receive acknowledged */</div><div class='add'>+u32 hw_atl_smb0_receive_acknowledged_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* SMBUS0 set transmitted data (only leftmost byte of data valid) */</div><div class='add'>+void hw_atl_smb0_tx_data_set(struct aq_hw_s *aq_hw, u32 data);</div><div class='add'>+</div><div class='add'>+/* SMBUS0 provisioning2 command register */</div><div class='add'>+void hw_atl_smb0_provisioning2_set(struct aq_hw_s *aq_hw, u32 data);</div><div class='add'>+</div><div class='add'>+/* SMBUS0 repeated start detect */</div><div class='add'>+u32 hw_atl_smb0_repeated_start_detect_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* SMBUS0 received data register */</div><div class='add'>+u32 hw_atl_smb0_rx_data_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* global */</div><div class='add'>+</div><div class='add'>+/* set global microprocessor semaphore */</div><div class='add'>+void hw_atl_reg_glb_cpu_sem_set(struct aq_hw_s *aq_hw,	u32 glb_cpu_sem,</div><div class='add'>+				u32 semaphore);</div><div class='add'>+</div><div class='add'>+/* get global microprocessor semaphore */</div><div class='add'>+u32 hw_atl_reg_glb_cpu_sem_get(struct aq_hw_s *aq_hw, u32 semaphore);</div><div class='add'>+</div><div class='add'>+/* set global register reset disable */</div><div class='add'>+void hw_atl_glb_glb_reg_res_dis_set(struct aq_hw_s *aq_hw, u32 glb_reg_res_dis);</div><div class='add'>+</div><div class='add'>+/* set soft reset */</div><div class='add'>+void hw_atl_glb_soft_res_set(struct aq_hw_s *aq_hw, u32 soft_res);</div><div class='add'>+</div><div class='add'>+/* get soft reset */</div><div class='add'>+u32 hw_atl_glb_soft_res_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* stats */</div><div class='add'>+</div><div class='add'>+u32 hw_atl_rpb_rx_dma_drop_pkt_cnt_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* get rx dma good octet counter */</div><div class='add'>+u64 hw_atl_stats_rx_dma_good_octet_counter_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* get rx dma good packet counter */</div><div class='add'>+u64 hw_atl_stats_rx_dma_good_pkt_counter_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* get tx dma good octet counter */</div><div class='add'>+u64 hw_atl_stats_tx_dma_good_octet_counter_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* get tx dma good packet counter */</div><div class='add'>+u64 hw_atl_stats_tx_dma_good_pkt_counter_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* get msm rx errors counter register */</div><div class='add'>+u32 hw_atl_reg_mac_msm_rx_errs_cnt_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* get msm rx unicast frames counter register */</div><div class='add'>+u32 hw_atl_reg_mac_msm_rx_ucst_frm_cnt_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* get msm rx multicast frames counter register */</div><div class='add'>+u32 hw_atl_reg_mac_msm_rx_mcst_frm_cnt_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* get msm rx broadcast frames counter register */</div><div class='add'>+u32 hw_atl_reg_mac_msm_rx_bcst_frm_cnt_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* get msm rx broadcast octets counter register 1 */</div><div class='add'>+u32 hw_atl_reg_mac_msm_rx_bcst_octets_counter1get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* get msm rx unicast octets counter register 0 */</div><div class='add'>+u32 hw_atl_reg_mac_msm_rx_ucst_octets_counter0get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* get msm tx errors counter register */</div><div class='add'>+u32 hw_atl_reg_mac_msm_tx_errs_cnt_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* get msm tx unicast frames counter register */</div><div class='add'>+u32 hw_atl_reg_mac_msm_tx_ucst_frm_cnt_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* get msm tx multicast frames counter register */</div><div class='add'>+u32 hw_atl_reg_mac_msm_tx_mcst_frm_cnt_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* get msm tx broadcast frames counter register */</div><div class='add'>+u32 hw_atl_reg_mac_msm_tx_bcst_frm_cnt_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* get msm tx multicast octets counter register 1 */</div><div class='add'>+u32 hw_atl_reg_mac_msm_tx_mcst_octets_counter1get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* get msm tx broadcast octets counter register 1 */</div><div class='add'>+u32 hw_atl_reg_mac_msm_tx_bcst_octets_counter1get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* get msm tx unicast octets counter register 0 */</div><div class='add'>+u32 hw_atl_reg_mac_msm_tx_ucst_octets_counter0get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* get global mif identification */</div><div class='add'>+u32 hw_atl_reg_glb_mif_id_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* interrupt */</div><div class='add'>+</div><div class='add'>+/* set interrupt auto mask lsw */</div><div class='add'>+void hw_atl_itr_irq_auto_masklsw_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				     u32 irq_auto_masklsw);</div><div class='add'>+</div><div class='add'>+/* set interrupt mapping enable rx */</div><div class='add'>+void hw_atl_itr_irq_map_en_rx_set(struct aq_hw_s *aq_hw, u32 irq_map_en_rx,</div><div class='add'>+				  u32 rx);</div><div class='add'>+</div><div class='add'>+/* set interrupt mapping enable tx */</div><div class='add'>+void hw_atl_itr_irq_map_en_tx_set(struct aq_hw_s *aq_hw, u32 irq_map_en_tx,</div><div class='add'>+				  u32 tx);</div><div class='add'>+</div><div class='add'>+/* set interrupt mapping rx */</div><div class='add'>+void hw_atl_itr_irq_map_rx_set(struct aq_hw_s *aq_hw, u32 irq_map_rx, u32 rx);</div><div class='add'>+</div><div class='add'>+/* set interrupt mapping tx */</div><div class='add'>+void hw_atl_itr_irq_map_tx_set(struct aq_hw_s *aq_hw, u32 irq_map_tx, u32 tx);</div><div class='add'>+</div><div class='add'>+/* set interrupt mask clear lsw */</div><div class='add'>+void hw_atl_itr_irq_msk_clearlsw_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				     u32 irq_msk_clearlsw);</div><div class='add'>+</div><div class='add'>+/* set interrupt mask set lsw */</div><div class='add'>+void hw_atl_itr_irq_msk_setlsw_set(struct aq_hw_s *aq_hw, u32 irq_msk_setlsw);</div><div class='add'>+</div><div class='add'>+/* set interrupt register reset disable */</div><div class='add'>+void hw_atl_itr_irq_reg_res_dis_set(struct aq_hw_s *aq_hw, u32 irq_reg_res_dis);</div><div class='add'>+</div><div class='add'>+/* set interrupt status clear lsw */</div><div class='add'>+void hw_atl_itr_irq_status_clearlsw_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					u32 irq_status_clearlsw);</div><div class='add'>+</div><div class='add'>+/* get interrupt status lsw */</div><div class='add'>+u32 hw_atl_itr_irq_statuslsw_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* get reset interrupt */</div><div class='add'>+u32 hw_atl_itr_res_irq_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* set reset interrupt */</div><div class='add'>+void hw_atl_itr_res_irq_set(struct aq_hw_s *aq_hw, u32 res_irq);</div><div class='add'>+</div><div class='add'>+/* set RSC interrupt */</div><div class='add'>+void hw_atl_itr_rsc_en_set(struct aq_hw_s *aq_hw, u32 enable);</div><div class='add'>+</div><div class='add'>+/* set RSC delay */</div><div class='add'>+void hw_atl_itr_rsc_delay_set(struct aq_hw_s *aq_hw, u32 delay);</div><div class='add'>+</div><div class='add'>+/* rdm */</div><div class='add'>+</div><div class='add'>+/* set cpu id */</div><div class='add'>+void hw_atl_rdm_cpu_id_set(struct aq_hw_s *aq_hw, u32 cpuid, u32 dca);</div><div class='add'>+</div><div class='add'>+/* set rx dca enable */</div><div class='add'>+void hw_atl_rdm_rx_dca_en_set(struct aq_hw_s *aq_hw, u32 rx_dca_en);</div><div class='add'>+</div><div class='add'>+/* set rx dca mode */</div><div class='add'>+void hw_atl_rdm_rx_dca_mode_set(struct aq_hw_s *aq_hw, u32 rx_dca_mode);</div><div class='add'>+</div><div class='add'>+/* set rx descriptor data buffer size */</div><div class='add'>+void hw_atl_rdm_rx_desc_data_buff_size_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					   u32 rx_desc_data_buff_size,</div><div class='add'>+				    u32 descriptor);</div><div class='add'>+</div><div class='add'>+/* set rx descriptor dca enable */</div><div class='add'>+void hw_atl_rdm_rx_desc_dca_en_set(struct aq_hw_s *aq_hw, u32 rx_desc_dca_en,</div><div class='add'>+				   u32 dca);</div><div class='add'>+</div><div class='add'>+/* set rx descriptor enable */</div><div class='add'>+void hw_atl_rdm_rx_desc_en_set(struct aq_hw_s *aq_hw, u32 rx_desc_en,</div><div class='add'>+			       u32 descriptor);</div><div class='add'>+</div><div class='add'>+/* set rx descriptor header splitting */</div><div class='add'>+void hw_atl_rdm_rx_desc_head_splitting_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					   u32 rx_desc_head_splitting,</div><div class='add'>+				    u32 descriptor);</div><div class='add'>+</div><div class='add'>+/* get rx descriptor head pointer */</div><div class='add'>+u32 hw_atl_rdm_rx_desc_head_ptr_get(struct aq_hw_s *aq_hw, u32 descriptor);</div><div class='add'>+</div><div class='add'>+/* set rx descriptor length */</div><div class='add'>+void hw_atl_rdm_rx_desc_len_set(struct aq_hw_s *aq_hw, u32 rx_desc_len,</div><div class='add'>+				u32 descriptor);</div><div class='add'>+</div><div class='add'>+/* set rx descriptor write-back interrupt enable */</div><div class='add'>+void hw_atl_rdm_rx_desc_wr_wb_irq_en_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					 u32 rx_desc_wr_wb_irq_en);</div><div class='add'>+</div><div class='add'>+/* set rx header dca enable */</div><div class='add'>+void hw_atl_rdm_rx_head_dca_en_set(struct aq_hw_s *aq_hw, u32 rx_head_dca_en,</div><div class='add'>+				   u32 dca);</div><div class='add'>+</div><div class='add'>+/* set rx payload dca enable */</div><div class='add'>+void hw_atl_rdm_rx_pld_dca_en_set(struct aq_hw_s *aq_hw, u32 rx_pld_dca_en,</div><div class='add'>+				  u32 dca);</div><div class='add'>+</div><div class='add'>+/* set rx descriptor header buffer size */</div><div class='add'>+void hw_atl_rdm_rx_desc_head_buff_size_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					   u32 rx_desc_head_buff_size,</div><div class='add'>+					   u32 descriptor);</div><div class='add'>+</div><div class='add'>+/* set rx descriptor reset */</div><div class='add'>+void hw_atl_rdm_rx_desc_res_set(struct aq_hw_s *aq_hw, u32 rx_desc_res,</div><div class='add'>+				u32 descriptor);</div><div class='add'>+</div><div class='add'>+/* Set RDM Interrupt Moderation Enable */</div><div class='add'>+void hw_atl_rdm_rdm_intr_moder_en_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				      u32 rdm_intr_moder_en);</div><div class='add'>+</div><div class='add'>+/* reg */</div><div class='add'>+</div><div class='add'>+/* set general interrupt mapping register */</div><div class='add'>+void hw_atl_reg_gen_irq_map_set(struct aq_hw_s *aq_hw, u32 gen_intr_map,</div><div class='add'>+				u32 regidx);</div><div class='add'>+</div><div class='add'>+/* get general interrupt status register */</div><div class='add'>+u32 hw_atl_reg_gen_irq_status_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* set interrupt global control register */</div><div class='add'>+void hw_atl_reg_irq_glb_ctl_set(struct aq_hw_s *aq_hw, u32 intr_glb_ctl);</div><div class='add'>+</div><div class='add'>+/* set interrupt throttle register */</div><div class='add'>+void hw_atl_reg_irq_thr_set(struct aq_hw_s *aq_hw, u32 intr_thr, u32 throttle);</div><div class='add'>+</div><div class='add'>+/* set rx dma descriptor base address lsw */</div><div class='add'>+void hw_atl_reg_rx_dma_desc_base_addresslswset(struct aq_hw_s *aq_hw,</div><div class='add'>+					       u32 rx_dma_desc_base_addrlsw,</div><div class='add'>+					u32 descriptor);</div><div class='add'>+</div><div class='add'>+/* set rx dma descriptor base address msw */</div><div class='add'>+void hw_atl_reg_rx_dma_desc_base_addressmswset(struct aq_hw_s *aq_hw,</div><div class='add'>+					       u32 rx_dma_desc_base_addrmsw,</div><div class='add'>+					u32 descriptor);</div><div class='add'>+</div><div class='add'>+/* get rx dma descriptor status register */</div><div class='add'>+u32 hw_atl_reg_rx_dma_desc_status_get(struct aq_hw_s *aq_hw, u32 descriptor);</div><div class='add'>+</div><div class='add'>+/* set rx dma descriptor tail pointer register */</div><div class='add'>+void hw_atl_reg_rx_dma_desc_tail_ptr_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					 u32 rx_dma_desc_tail_ptr,</div><div class='add'>+				  u32 descriptor);</div><div class='add'>+</div><div class='add'>+/* set rx filter multicast filter mask register */</div><div class='add'>+void hw_atl_reg_rx_flr_mcst_flr_msk_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					u32 rx_flr_mcst_flr_msk);</div><div class='add'>+</div><div class='add'>+/* set rx filter multicast filter register */</div><div class='add'>+void hw_atl_reg_rx_flr_mcst_flr_set(struct aq_hw_s *aq_hw, u32 rx_flr_mcst_flr,</div><div class='add'>+				    u32 filter);</div><div class='add'>+</div><div class='add'>+/* set rx filter rss control register 1 */</div><div class='add'>+void hw_atl_reg_rx_flr_rss_control1set(struct aq_hw_s *aq_hw,</div><div class='add'>+				       u32 rx_flr_rss_control1);</div><div class='add'>+</div><div class='add'>+/* Set RX Filter Control Register 2 */</div><div class='add'>+void hw_atl_reg_rx_flr_control2_set(struct aq_hw_s *aq_hw, u32 rx_flr_control2);</div><div class='add'>+</div><div class='add'>+/* Set RX Interrupt Moderation Control Register */</div><div class='add'>+void hw_atl_reg_rx_intr_moder_ctrl_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				       u32 rx_intr_moderation_ctl,</div><div class='add'>+				u32 queue);</div><div class='add'>+</div><div class='add'>+/* set tx dma debug control */</div><div class='add'>+void hw_atl_reg_tx_dma_debug_ctl_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				     u32 tx_dma_debug_ctl);</div><div class='add'>+</div><div class='add'>+/* set tx dma descriptor base address lsw */</div><div class='add'>+void hw_atl_reg_tx_dma_desc_base_addresslswset(struct aq_hw_s *aq_hw,</div><div class='add'>+					       u32 tx_dma_desc_base_addrlsw,</div><div class='add'>+					u32 descriptor);</div><div class='add'>+</div><div class='add'>+/* set tx dma descriptor base address msw */</div><div class='add'>+void hw_atl_reg_tx_dma_desc_base_addressmswset(struct aq_hw_s *aq_hw,</div><div class='add'>+					       u32 tx_dma_desc_base_addrmsw,</div><div class='add'>+					u32 descriptor);</div><div class='add'>+</div><div class='add'>+/* set tx dma descriptor tail pointer register */</div><div class='add'>+void hw_atl_reg_tx_dma_desc_tail_ptr_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					 u32 tx_dma_desc_tail_ptr,</div><div class='add'>+					 u32 descriptor);</div><div class='add'>+</div><div class='add'>+/* Set TX Interrupt Moderation Control Register */</div><div class='add'>+void hw_atl_reg_tx_intr_moder_ctrl_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				       u32 tx_intr_moderation_ctl,</div><div class='add'>+				       u32 queue);</div><div class='add'>+</div><div class='add'>+/* set global microprocessor scratch pad */</div><div class='add'>+void hw_atl_reg_glb_cpu_scratch_scp_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					u32 glb_cpu_scratch_scp,</div><div class='add'>+					u32 scratch_scp);</div><div class='add'>+</div><div class='add'>+/* rpb */</div><div class='add'>+</div><div class='add'>+/* set dma system loopback */</div><div class='add'>+void hw_atl_rpb_dma_sys_lbk_set(struct aq_hw_s *aq_hw, u32 dma_sys_lbk);</div><div class='add'>+</div><div class='add'>+/* set dma network loopback */</div><div class='add'>+void hw_atl_rpb_dma_net_lbk_set(struct aq_hw_s *aq_hw, u32 dma_net_lbk);</div><div class='add'>+</div><div class='add'>+/* set rx traffic class mode */</div><div class='add'>+void hw_atl_rpb_rpf_rx_traf_class_mode_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					   u32 rx_traf_class_mode);</div><div class='add'>+</div><div class='add'>+/* get rx traffic class mode */</div><div class='add'>+u32 hw_atl_rpb_rpf_rx_traf_class_mode_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* set rx buffer enable */</div><div class='add'>+void hw_atl_rpb_rx_buff_en_set(struct aq_hw_s *aq_hw, u32 rx_buff_en);</div><div class='add'>+</div><div class='add'>+/* set rx buffer high threshold (per tc) */</div><div class='add'>+void hw_atl_rpb_rx_buff_hi_threshold_per_tc_set(struct aq_hw_s *aq_hw,</div><div class='add'>+						u32 rx_buff_hi_threshold_per_tc,</div><div class='add'>+						u32 buffer);</div><div class='add'>+</div><div class='add'>+/* set rx buffer low threshold (per tc) */</div><div class='add'>+void hw_atl_rpb_rx_buff_lo_threshold_per_tc_set(struct aq_hw_s *aq_hw,</div><div class='add'>+						u32 rx_buff_lo_threshold_per_tc,</div><div class='add'>+					 u32 buffer);</div><div class='add'>+</div><div class='add'>+/* set rx flow control mode */</div><div class='add'>+void hw_atl_rpb_rx_flow_ctl_mode_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				     u32 rx_flow_ctl_mode);</div><div class='add'>+</div><div class='add'>+/* set rx packet buffer size (per tc) */</div><div class='add'>+void hw_atl_rpb_rx_pkt_buff_size_per_tc_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					    u32 rx_pkt_buff_size_per_tc,</div><div class='add'>+					    u32 buffer);</div><div class='add'>+</div><div class='add'>+/* toggle rdm rx dma descriptor cache init */</div><div class='add'>+void hw_atl_rdm_rx_dma_desc_cache_init_tgl(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* get rdm rx dma descriptor cache init done */</div><div class='add'>+u32 hw_atl_rdm_rx_dma_desc_cache_init_done_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* set rx xoff enable (per tc) */</div><div class='add'>+void hw_atl_rpb_rx_xoff_en_per_tc_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				      u32 rx_xoff_en_per_tc,</div><div class='add'>+				      u32 buffer);</div><div class='add'>+</div><div class='add'>+/* rpf */</div><div class='add'>+</div><div class='add'>+/* set l2 broadcast count threshold */</div><div class='add'>+void hw_atl_rpfl2broadcast_count_threshold_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					       u32 l2broadcast_count_threshold);</div><div class='add'>+</div><div class='add'>+/* set l2 broadcast enable */</div><div class='add'>+void hw_atl_rpfl2broadcast_en_set(struct aq_hw_s *aq_hw, u32 l2broadcast_en);</div><div class='add'>+</div><div class='add'>+/* set l2 broadcast filter action */</div><div class='add'>+void hw_atl_rpfl2broadcast_flr_act_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				       u32 l2broadcast_flr_act);</div><div class='add'>+</div><div class='add'>+/* set l2 multicast filter enable */</div><div class='add'>+void hw_atl_rpfl2multicast_flr_en_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				      u32 l2multicast_flr_en,</div><div class='add'>+				      u32 filter);</div><div class='add'>+</div><div class='add'>+/* get l2 promiscuous mode enable */</div><div class='add'>+u32 hw_atl_rpfl2promiscuous_mode_en_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* set l2 promiscuous mode enable */</div><div class='add'>+void hw_atl_rpfl2promiscuous_mode_en_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					 u32 l2promiscuous_mode_en);</div><div class='add'>+</div><div class='add'>+/* set l2 unicast filter action */</div><div class='add'>+void hw_atl_rpfl2unicast_flr_act_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				     u32 l2unicast_flr_act,</div><div class='add'>+				     u32 filter);</div><div class='add'>+</div><div class='add'>+/* set l2 unicast filter enable */</div><div class='add'>+void hw_atl_rpfl2_uc_flr_en_set(struct aq_hw_s *aq_hw, u32 l2unicast_flr_en,</div><div class='add'>+				u32 filter);</div><div class='add'>+</div><div class='add'>+/* set l2 unicast destination address lsw */</div><div class='add'>+void hw_atl_rpfl2unicast_dest_addresslsw_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					     u32 l2unicast_dest_addresslsw,</div><div class='add'>+				      u32 filter);</div><div class='add'>+</div><div class='add'>+/* set l2 unicast destination address msw */</div><div class='add'>+void hw_atl_rpfl2unicast_dest_addressmsw_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					     u32 l2unicast_dest_addressmsw,</div><div class='add'>+				      u32 filter);</div><div class='add'>+</div><div class='add'>+/* Set L2 Accept all Multicast packets */</div><div class='add'>+void hw_atl_rpfl2_accept_all_mc_packets_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					    u32 l2_accept_all_mc_packets);</div><div class='add'>+</div><div class='add'>+/* set user-priority tc mapping */</div><div class='add'>+void hw_atl_rpf_rpb_user_priority_tc_map_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					     u32 user_priority_tc_map, u32 tc);</div><div class='add'>+</div><div class='add'>+/* set rss key address */</div><div class='add'>+void hw_atl_rpf_rss_key_addr_set(struct aq_hw_s *aq_hw, u32 rss_key_addr);</div><div class='add'>+</div><div class='add'>+/* set rss key write data */</div><div class='add'>+void hw_atl_rpf_rss_key_wr_data_set(struct aq_hw_s *aq_hw, u32 rss_key_wr_data);</div><div class='add'>+</div><div class='add'>+/* get rss key write enable */</div><div class='add'>+u32 hw_atl_rpf_rss_key_wr_en_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* set rss key write enable */</div><div class='add'>+void hw_atl_rpf_rss_key_wr_en_set(struct aq_hw_s *aq_hw, u32 rss_key_wr_en);</div><div class='add'>+</div><div class='add'>+/* set rss redirection table address */</div><div class='add'>+void hw_atl_rpf_rss_redir_tbl_addr_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				       u32 rss_redir_tbl_addr);</div><div class='add'>+</div><div class='add'>+/* set rss redirection table write data */</div><div class='add'>+void hw_atl_rpf_rss_redir_tbl_wr_data_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					  u32 rss_redir_tbl_wr_data);</div><div class='add'>+</div><div class='add'>+/* get rss redirection write enable */</div><div class='add'>+u32 hw_atl_rpf_rss_redir_wr_en_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* set rss redirection write enable */</div><div class='add'>+void hw_atl_rpf_rss_redir_wr_en_set(struct aq_hw_s *aq_hw, u32 rss_redir_wr_en);</div><div class='add'>+</div><div class='add'>+/* set tpo to rpf system loopback */</div><div class='add'>+void hw_atl_rpf_tpo_to_rpf_sys_lbk_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				       u32 tpo_to_rpf_sys_lbk);</div><div class='add'>+</div><div class='add'>+/* set vlan inner ethertype */</div><div class='add'>+void hw_atl_rpf_vlan_inner_etht_set(struct aq_hw_s *aq_hw, u32 vlan_inner_etht);</div><div class='add'>+</div><div class='add'>+/* set vlan outer ethertype */</div><div class='add'>+void hw_atl_rpf_vlan_outer_etht_set(struct aq_hw_s *aq_hw, u32 vlan_outer_etht);</div><div class='add'>+</div><div class='add'>+/* set vlan promiscuous mode enable */</div><div class='add'>+void hw_atl_rpf_vlan_prom_mode_en_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				      u32 vlan_prom_mode_en);</div><div class='add'>+</div><div class='add'>+/* Get VLAN promiscuous mode enable */</div><div class='add'>+u32 hw_atl_rpf_vlan_prom_mode_en_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* Set VLAN untagged action */</div><div class='add'>+void hw_atl_rpf_vlan_untagged_act_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				      u32 vlan_untagged_act);</div><div class='add'>+</div><div class='add'>+/* Set VLAN accept untagged packets */</div><div class='add'>+void hw_atl_rpf_vlan_accept_untagged_packets_set(struct aq_hw_s *aq_hw,</div><div class='add'>+						 u32 vlan_acc_untagged_packets);</div><div class='add'>+</div><div class='add'>+/* Set VLAN filter enable */</div><div class='add'>+void hw_atl_rpf_vlan_flr_en_set(struct aq_hw_s *aq_hw, u32 vlan_flr_en,</div><div class='add'>+				u32 filter);</div><div class='add'>+</div><div class='add'>+/* Set VLAN Filter Action */</div><div class='add'>+void hw_atl_rpf_vlan_flr_act_set(struct aq_hw_s *aq_hw, u32 vlan_filter_act,</div><div class='add'>+				 u32 filter);</div><div class='add'>+</div><div class='add'>+/* Set VLAN ID Filter */</div><div class='add'>+void hw_atl_rpf_vlan_id_flr_set(struct aq_hw_s *aq_hw, u32 vlan_id_flr,</div><div class='add'>+				u32 filter);</div><div class='add'>+</div><div class='add'>+/* Set VLAN RX queue assignment enable */</div><div class='add'>+void hw_atl_rpf_vlan_rxq_en_flr_set(struct aq_hw_s *aq_hw, u32 vlan_rxq_en,</div><div class='add'>+				    u32 filter);</div><div class='add'>+</div><div class='add'>+/* Set VLAN RX queue */</div><div class='add'>+void hw_atl_rpf_vlan_rxq_flr_set(struct aq_hw_s *aq_hw, u32 vlan_rxq,</div><div class='add'>+				 u32 filter);</div><div class='add'>+</div><div class='add'>+/* set ethertype filter enable */</div><div class='add'>+void hw_atl_rpf_etht_flr_en_set(struct aq_hw_s *aq_hw, u32 etht_flr_en,</div><div class='add'>+				u32 filter);</div><div class='add'>+</div><div class='add'>+/* set  ethertype user-priority enable */</div><div class='add'>+void hw_atl_rpf_etht_user_priority_en_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					  u32 etht_user_priority_en,</div><div class='add'>+					  u32 filter);</div><div class='add'>+</div><div class='add'>+/* set  ethertype rx queue enable */</div><div class='add'>+void hw_atl_rpf_etht_rx_queue_en_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				     u32 etht_rx_queue_en,</div><div class='add'>+				     u32 filter);</div><div class='add'>+</div><div class='add'>+/* set ethertype rx queue */</div><div class='add'>+void hw_atl_rpf_etht_rx_queue_set(struct aq_hw_s *aq_hw, u32 etht_rx_queue,</div><div class='add'>+				  u32 filter);</div><div class='add'>+</div><div class='add'>+/* set ethertype user-priority */</div><div class='add'>+void hw_atl_rpf_etht_user_priority_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				       u32 etht_user_priority,</div><div class='add'>+				       u32 filter);</div><div class='add'>+</div><div class='add'>+/* set ethertype management queue */</div><div class='add'>+void hw_atl_rpf_etht_mgt_queue_set(struct aq_hw_s *aq_hw, u32 etht_mgt_queue,</div><div class='add'>+				   u32 filter);</div><div class='add'>+</div><div class='add'>+/* set ethertype filter action */</div><div class='add'>+void hw_atl_rpf_etht_flr_act_set(struct aq_hw_s *aq_hw, u32 etht_flr_act,</div><div class='add'>+				 u32 filter);</div><div class='add'>+</div><div class='add'>+/* set ethertype filter */</div><div class='add'>+void hw_atl_rpf_etht_flr_set(struct aq_hw_s *aq_hw, u32 etht_flr, u32 filter);</div><div class='add'>+</div><div class='add'>+/* set L4 source port */</div><div class='add'>+void hw_atl_rpf_l4_spd_set(struct aq_hw_s *aq_hw, u32 val, u32 filter);</div><div class='add'>+</div><div class='add'>+/* set L4 destination port */</div><div class='add'>+void hw_atl_rpf_l4_dpd_set(struct aq_hw_s *aq_hw, u32 val, u32 filter);</div><div class='add'>+</div><div class='add'>+/* rpo */</div><div class='add'>+</div><div class='add'>+/* set ipv4 header checksum offload enable */</div><div class='add'>+void hw_atl_rpo_ipv4header_crc_offload_en_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					      u32 ipv4header_crc_offload_en);</div><div class='add'>+</div><div class='add'>+/* set rx descriptor vlan stripping */</div><div class='add'>+void hw_atl_rpo_rx_desc_vlan_stripping_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					   u32 rx_desc_vlan_stripping,</div><div class='add'>+					   u32 descriptor);</div><div class='add'>+</div><div class='add'>+void hw_atl_rpo_outer_vlan_tag_mode_set(void *context,</div><div class='add'>+					u32 outervlantagmode);</div><div class='add'>+</div><div class='add'>+u32 hw_atl_rpo_outer_vlan_tag_mode_get(void *context);</div><div class='add'>+</div><div class='add'>+/* set tcp/udp checksum offload enable */</div><div class='add'>+void hw_atl_rpo_tcp_udp_crc_offload_en_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					   u32 tcp_udp_crc_offload_en);</div><div class='add'>+</div><div class='add'>+/* Set LRO Patch Optimization Enable. */</div><div class='add'>+void hw_atl_rpo_lro_patch_optimization_en_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					      u32 lro_patch_optimization_en);</div><div class='add'>+</div><div class='add'>+/* Set Large Receive Offload Enable */</div><div class='add'>+void hw_atl_rpo_lro_en_set(struct aq_hw_s *aq_hw, u32 lro_en);</div><div class='add'>+</div><div class='add'>+/* Set LRO Q Sessions Limit */</div><div class='add'>+void hw_atl_rpo_lro_qsessions_lim_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				      u32 lro_qsessions_lim);</div><div class='add'>+</div><div class='add'>+/* Set LRO Total Descriptor Limit */</div><div class='add'>+void hw_atl_rpo_lro_total_desc_lim_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				       u32 lro_total_desc_lim);</div><div class='add'>+</div><div class='add'>+/* Set LRO Min Payload of First Packet */</div><div class='add'>+void hw_atl_rpo_lro_min_pay_of_first_pkt_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					     u32 lro_min_pld_of_first_pkt);</div><div class='add'>+</div><div class='add'>+/* Set LRO Packet Limit */</div><div class='add'>+void hw_atl_rpo_lro_pkt_lim_set(struct aq_hw_s *aq_hw, u32 lro_packet_lim);</div><div class='add'>+</div><div class='add'>+/* Set LRO Max Number of Descriptors */</div><div class='add'>+void hw_atl_rpo_lro_max_num_of_descriptors_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					       u32 lro_max_desc_num, u32 lro);</div><div class='add'>+</div><div class='add'>+/* Set LRO Time Base Divider */</div><div class='add'>+void hw_atl_rpo_lro_time_base_divider_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					  u32 lro_time_base_divider);</div><div class='add'>+</div><div class='add'>+/*Set LRO Inactive Interval */</div><div class='add'>+void hw_atl_rpo_lro_inactive_interval_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					  u32 lro_inactive_interval);</div><div class='add'>+</div><div class='add'>+/*Set LRO Max Coalescing Interval */</div><div class='add'>+void hw_atl_rpo_lro_max_coalescing_interval_set(struct aq_hw_s *aq_hw,</div><div class='add'>+						u32 lro_max_coal_interval);</div><div class='add'>+</div><div class='add'>+/* rx */</div><div class='add'>+</div><div class='add'>+/* set rx register reset disable */</div><div class='add'>+void hw_atl_rx_rx_reg_res_dis_set(struct aq_hw_s *aq_hw, u32 rx_reg_res_dis);</div><div class='add'>+</div><div class='add'>+/* tdm */</div><div class='add'>+</div><div class='add'>+/* set cpu id */</div><div class='add'>+void hw_atl_tdm_cpu_id_set(struct aq_hw_s *aq_hw, u32 cpuid, u32 dca);</div><div class='add'>+</div><div class='add'>+/* set large send offload enable */</div><div class='add'>+void hw_atl_tdm_large_send_offload_en_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					  u32 large_send_offload_en);</div><div class='add'>+</div><div class='add'>+/* set tx descriptor enable */</div><div class='add'>+void hw_atl_tdm_tx_desc_en_set(struct aq_hw_s *aq_hw, u32 tx_desc_en,</div><div class='add'>+			       u32 descriptor);</div><div class='add'>+</div><div class='add'>+/* set tx dca enable */</div><div class='add'>+void hw_atl_tdm_tx_dca_en_set(struct aq_hw_s *aq_hw, u32 tx_dca_en);</div><div class='add'>+</div><div class='add'>+/* set tx dca mode */</div><div class='add'>+void hw_atl_tdm_tx_dca_mode_set(struct aq_hw_s *aq_hw, u32 tx_dca_mode);</div><div class='add'>+</div><div class='add'>+/* set tx descriptor dca enable */</div><div class='add'>+void hw_atl_tdm_tx_desc_dca_en_set(struct aq_hw_s *aq_hw, u32 tx_desc_dca_en,</div><div class='add'>+				   u32 dca);</div><div class='add'>+</div><div class='add'>+/* get tx descriptor head pointer */</div><div class='add'>+u32 hw_atl_tdm_tx_desc_head_ptr_get(struct aq_hw_s *aq_hw, u32 descriptor);</div><div class='add'>+</div><div class='add'>+/* set tx descriptor length */</div><div class='add'>+void hw_atl_tdm_tx_desc_len_set(struct aq_hw_s *aq_hw, u32 tx_desc_len,</div><div class='add'>+				u32 descriptor);</div><div class='add'>+</div><div class='add'>+/* set tx descriptor write-back interrupt enable */</div><div class='add'>+void hw_atl_tdm_tx_desc_wr_wb_irq_en_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					 u32 tx_desc_wr_wb_irq_en);</div><div class='add'>+</div><div class='add'>+/* set tx descriptor write-back threshold */</div><div class='add'>+void hw_atl_tdm_tx_desc_wr_wb_threshold_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					    u32 tx_desc_wr_wb_threshold,</div><div class='add'>+				     u32 descriptor);</div><div class='add'>+</div><div class='add'>+/* Set TDM Interrupt Moderation Enable */</div><div class='add'>+void hw_atl_tdm_tdm_intr_moder_en_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				      u32 tdm_irq_moderation_en);</div><div class='add'>+/* thm */</div><div class='add'>+</div><div class='add'>+/* set lso tcp flag of first packet */</div><div class='add'>+void hw_atl_thm_lso_tcp_flag_of_first_pkt_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					      u32 lso_tcp_flag_of_first_pkt);</div><div class='add'>+</div><div class='add'>+/* set lso tcp flag of last packet */</div><div class='add'>+void hw_atl_thm_lso_tcp_flag_of_last_pkt_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					     u32 lso_tcp_flag_of_last_pkt);</div><div class='add'>+</div><div class='add'>+/* set lso tcp flag of middle packet */</div><div class='add'>+void hw_atl_thm_lso_tcp_flag_of_middle_pkt_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					       u32 lso_tcp_flag_of_middle_pkt);</div><div class='add'>+</div><div class='add'>+/* tpb */</div><div class='add'>+</div><div class='add'>+/* set TX Traffic Class Mode */</div><div class='add'>+void hw_atl_tpb_tps_tx_tc_mode_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				   u32 tx_traf_class_mode);</div><div class='add'>+</div><div class='add'>+/* get TX Traffic Class Mode */</div><div class='add'>+u32 hw_atl_tpb_tps_tx_tc_mode_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* set tx buffer enable */</div><div class='add'>+void hw_atl_tpb_tx_buff_en_set(struct aq_hw_s *aq_hw, u32 tx_buff_en);</div><div class='add'>+</div><div class='add'>+/* set tx buffer high threshold (per tc) */</div><div class='add'>+void hw_atl_tpb_tx_buff_hi_threshold_per_tc_set(struct aq_hw_s *aq_hw,</div><div class='add'>+						u32 tx_buff_hi_threshold_per_tc,</div><div class='add'>+					 u32 buffer);</div><div class='add'>+</div><div class='add'>+/* set tx buffer low threshold (per tc) */</div><div class='add'>+void hw_atl_tpb_tx_buff_lo_threshold_per_tc_set(struct aq_hw_s *aq_hw,</div><div class='add'>+						u32 tx_buff_lo_threshold_per_tc,</div><div class='add'>+					 u32 buffer);</div><div class='add'>+</div><div class='add'>+/* set tx dma system loopback enable */</div><div class='add'>+void hw_atl_tpb_tx_dma_sys_lbk_en_set(struct aq_hw_s *aq_hw, u32 tx_dma_sys_lbk_en);</div><div class='add'>+</div><div class='add'>+/* set tx dma network loopback enable */</div><div class='add'>+void hw_atl_tpb_tx_dma_net_lbk_en_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				      u32 tx_dma_net_lbk_en);</div><div class='add'>+</div><div class='add'>+/* set tx clock gating enable */</div><div class='add'>+void hw_atl_tpb_tx_tx_clk_gate_en_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				      u32 tx_clk_gate_en);</div><div class='add'>+</div><div class='add'>+/* set tx packet buffer size (per tc) */</div><div class='add'>+void hw_atl_tpb_tx_pkt_buff_size_per_tc_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					    u32 tx_pkt_buff_size_per_tc,</div><div class='add'>+					    u32 buffer);</div><div class='add'>+</div><div class='add'>+/* set tx path pad insert enable */</div><div class='add'>+void hw_atl_tpb_tx_path_scp_ins_en_set(struct aq_hw_s *aq_hw, u32 tx_path_scp_ins_en);</div><div class='add'>+</div><div class='add'>+/* tpo */</div><div class='add'>+</div><div class='add'>+/* set ipv4 header checksum offload enable */</div><div class='add'>+void hw_atl_tpo_ipv4header_crc_offload_en_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					      u32 ipv4header_crc_offload_en);</div><div class='add'>+</div><div class='add'>+/* set tcp/udp checksum offload enable */</div><div class='add'>+void hw_atl_tpo_tcp_udp_crc_offload_en_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					   u32 tcp_udp_crc_offload_en);</div><div class='add'>+</div><div class='add'>+/* set tx pkt system loopback enable */</div><div class='add'>+void hw_atl_tpo_tx_pkt_sys_lbk_en_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				      u32 tx_pkt_sys_lbk_en);</div><div class='add'>+</div><div class='add'>+/* tps */</div><div class='add'>+</div><div class='add'>+/* set tx packet scheduler data arbitration mode */</div><div class='add'>+void hw_atl_tps_tx_pkt_shed_data_arb_mode_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					      u32 tx_pkt_shed_data_arb_mode);</div><div class='add'>+</div><div class='add'>+/* set tx packet scheduler descriptor rate current time reset */</div><div class='add'>+void hw_atl_tps_tx_pkt_shed_desc_rate_curr_time_res_set(struct aq_hw_s *aq_hw,</div><div class='add'>+							u32 curr_time_res);</div><div class='add'>+</div><div class='add'>+/* set tx packet scheduler descriptor rate limit */</div><div class='add'>+void hw_atl_tps_tx_pkt_shed_desc_rate_lim_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					      u32 tx_pkt_shed_desc_rate_lim);</div><div class='add'>+</div><div class='add'>+/* set tx packet scheduler descriptor tc arbitration mode */</div><div class='add'>+void hw_atl_tps_tx_pkt_shed_desc_tc_arb_mode_set(struct aq_hw_s *aq_hw,</div><div class='add'>+						 u32 arb_mode);</div><div class='add'>+</div><div class='add'>+/* set tx packet scheduler descriptor tc max credit */</div><div class='add'>+void hw_atl_tps_tx_pkt_shed_desc_tc_max_credit_set(struct aq_hw_s *aq_hw,</div><div class='add'>+						   const u32 tc,</div><div class='add'>+						   const u32 max_credit);</div><div class='add'>+</div><div class='add'>+/* set tx packet scheduler descriptor tc weight */</div><div class='add'>+void hw_atl_tps_tx_pkt_shed_desc_tc_weight_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					       const u32 tc,</div><div class='add'>+					       const u32 weight);</div><div class='add'>+</div><div class='add'>+/* set tx packet scheduler descriptor vm arbitration mode */</div><div class='add'>+void hw_atl_tps_tx_pkt_shed_desc_vm_arb_mode_set(struct aq_hw_s *aq_hw,</div><div class='add'>+						 u32 arb_mode);</div><div class='add'>+</div><div class='add'>+/* set tx packet scheduler tc data max credit */</div><div class='add'>+void hw_atl_tps_tx_pkt_shed_tc_data_max_credit_set(struct aq_hw_s *aq_hw,</div><div class='add'>+						   const u32 tc,</div><div class='add'>+						   const u32 max_credit);</div><div class='add'>+</div><div class='add'>+/* set tx packet scheduler tc data weight */</div><div class='add'>+void hw_atl_tps_tx_pkt_shed_tc_data_weight_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					       const u32 tc,</div><div class='add'>+					       const u32 weight);</div><div class='add'>+</div><div class='add'>+/* set tx descriptor rate mode */</div><div class='add'>+void hw_atl_tps_tx_desc_rate_mode_set(struct aq_hw_s *aq_hw,</div><div class='add'>+				      const u32 rate_mode);</div><div class='add'>+</div><div class='add'>+/* set tx packet scheduler descriptor rate enable */</div><div class='add'>+void hw_atl_tps_tx_desc_rate_en_set(struct aq_hw_s *aq_hw, const u32 desc,</div><div class='add'>+				    const u32 enable);</div><div class='add'>+</div><div class='add'>+/* set tx packet scheduler descriptor rate integral value */</div><div class='add'>+void hw_atl_tps_tx_desc_rate_x_set(struct aq_hw_s *aq_hw, const u32 desc,</div><div class='add'>+				   const u32 rate_int);</div><div class='add'>+</div><div class='add'>+/* set tx packet scheduler descriptor rate fractional value */</div><div class='add'>+void hw_atl_tps_tx_desc_rate_y_set(struct aq_hw_s *aq_hw, const u32 desc,</div><div class='add'>+				   const u32 rate_frac);</div><div class='add'>+</div><div class='add'>+/* tx */</div><div class='add'>+</div><div class='add'>+/* set tx register reset disable */</div><div class='add'>+void hw_atl_tx_tx_reg_res_dis_set(struct aq_hw_s *aq_hw, u32 tx_reg_res_dis);</div><div class='add'>+</div><div class='add'>+/* msm */</div><div class='add'>+</div><div class='add'>+/* get register access status */</div><div class='add'>+u32 hw_atl_msm_reg_access_status_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* set  register address for indirect address */</div><div class='add'>+void hw_atl_msm_reg_addr_for_indirect_addr_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					       u32 reg_addr_for_indirect_addr);</div><div class='add'>+</div><div class='add'>+/* set register read strobe */</div><div class='add'>+void hw_atl_msm_reg_rd_strobe_set(struct aq_hw_s *aq_hw, u32 reg_rd_strobe);</div><div class='add'>+</div><div class='add'>+/* get  register read data */</div><div class='add'>+u32 hw_atl_msm_reg_rd_data_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* set  register write data */</div><div class='add'>+void hw_atl_msm_reg_wr_data_set(struct aq_hw_s *aq_hw, u32 reg_wr_data);</div><div class='add'>+</div><div class='add'>+/* set register write strobe */</div><div class='add'>+void hw_atl_msm_reg_wr_strobe_set(struct aq_hw_s *aq_hw, u32 reg_wr_strobe);</div><div class='add'>+</div><div class='add'>+/* pci */</div><div class='add'>+</div><div class='add'>+/* set pci register reset disable */</div><div class='add'>+void hw_atl_pci_pci_reg_res_dis_set(struct aq_hw_s *aq_hw, u32 pci_reg_res_dis);</div><div class='add'>+</div><div class='add'>+/* pcs */</div><div class='add'>+void hw_atl_pcs_ptp_clock_read_enable(struct aq_hw_s *aq_hw,</div><div class='add'>+				      u32 ptp_clock_read_enable);</div><div class='add'>+</div><div class='add'>+u32 hw_atl_pcs_ptp_clock_get(struct aq_hw_s *aq_hw, u32 index);</div><div class='add'>+</div><div class='add'>+/* set uP Force Interrupt */</div><div class='add'>+void hw_atl_mcp_up_force_intr_set(struct aq_hw_s *aq_hw, u32 up_force_intr);</div><div class='add'>+</div><div class='add'>+/* clear ipv4 filter destination address */</div><div class='add'>+void hw_atl_rpfl3l4_ipv4_dest_addr_clear(struct aq_hw_s *aq_hw, u8 location);</div><div class='add'>+</div><div class='add'>+/* clear ipv4 filter source address */</div><div class='add'>+void hw_atl_rpfl3l4_ipv4_src_addr_clear(struct aq_hw_s *aq_hw, u8 location);</div><div class='add'>+</div><div class='add'>+/* clear command for filter l3-l4 */</div><div class='add'>+void hw_atl_rpfl3l4_cmd_clear(struct aq_hw_s *aq_hw, u8 location);</div><div class='add'>+</div><div class='add'>+/* clear ipv6 filter destination address */</div><div class='add'>+void hw_atl_rpfl3l4_ipv6_dest_addr_clear(struct aq_hw_s *aq_hw, u8 location);</div><div class='add'>+</div><div class='add'>+/* clear ipv6 filter source address */</div><div class='add'>+void hw_atl_rpfl3l4_ipv6_src_addr_clear(struct aq_hw_s *aq_hw, u8 location);</div><div class='add'>+</div><div class='add'>+/* set ipv4 filter destination address */</div><div class='add'>+void hw_atl_rpfl3l4_ipv4_dest_addr_set(struct aq_hw_s *aq_hw, u8 location,</div><div class='add'>+				       u32 ipv4_dest);</div><div class='add'>+</div><div class='add'>+/* set ipv4 filter source address */</div><div class='add'>+void hw_atl_rpfl3l4_ipv4_src_addr_set(struct aq_hw_s *aq_hw, u8 location,</div><div class='add'>+				      u32 ipv4_src);</div><div class='add'>+</div><div class='add'>+/* set command for filter l3-l4 */</div><div class='add'>+void hw_atl_rpfl3l4_cmd_set(struct aq_hw_s *aq_hw, u8 location, u32 cmd);</div><div class='add'>+</div><div class='add'>+/* set ipv6 filter source address */</div><div class='add'>+void hw_atl_rpfl3l4_ipv6_src_addr_set(struct aq_hw_s *aq_hw, u8 location,</div><div class='add'>+				      u32 *ipv6_src);</div><div class='add'>+</div><div class='add'>+/* set ipv6 filter destination address */</div><div class='add'>+void hw_atl_rpfl3l4_ipv6_dest_addr_set(struct aq_hw_s *aq_hw, u8 location,</div><div class='add'>+				       u32 *ipv6_dest);</div><div class='add'>+</div><div class='add'>+/* set Global MDIO Interface 1 */</div><div class='add'>+void hw_atl_glb_mdio_iface1_set(struct aq_hw_s *hw, u32 value);</div><div class='add'>+</div><div class='add'>+/* get Global MDIO Interface 1 */</div><div class='add'>+u32 hw_atl_glb_mdio_iface1_get(struct aq_hw_s *hw);</div><div class='add'>+</div><div class='add'>+/* set Global MDIO Interface 2 */</div><div class='add'>+void hw_atl_glb_mdio_iface2_set(struct aq_hw_s *hw, u32 value);</div><div class='add'>+</div><div class='add'>+/* get Global MDIO Interface 2 */</div><div class='add'>+u32 hw_atl_glb_mdio_iface2_get(struct aq_hw_s *hw);</div><div class='add'>+</div><div class='add'>+/* set Global MDIO Interface 3 */</div><div class='add'>+void hw_atl_glb_mdio_iface3_set(struct aq_hw_s *hw, u32 value);</div><div class='add'>+</div><div class='add'>+/* get Global MDIO Interface 3 */</div><div class='add'>+u32 hw_atl_glb_mdio_iface3_get(struct aq_hw_s *hw);</div><div class='add'>+</div><div class='add'>+/* set Global MDIO Interface 4 */</div><div class='add'>+void hw_atl_glb_mdio_iface4_set(struct aq_hw_s *hw, u32 value);</div><div class='add'>+</div><div class='add'>+/* get Global MDIO Interface 4 */</div><div class='add'>+u32 hw_atl_glb_mdio_iface4_get(struct aq_hw_s *hw);</div><div class='add'>+</div><div class='add'>+/* set Global MDIO Interface 5 */</div><div class='add'>+void hw_atl_glb_mdio_iface5_set(struct aq_hw_s *hw, u32 value);</div><div class='add'>+</div><div class='add'>+/* get Global MDIO Interface 5 */</div><div class='add'>+u32 hw_atl_glb_mdio_iface5_get(struct aq_hw_s *hw);</div><div class='add'>+</div><div class='add'>+u32 hw_atl_mdio_busy_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* get global microprocessor ram semaphore */</div><div class='add'>+u32 hw_atl_sem_ram_get(struct aq_hw_s *self);</div><div class='add'>+</div><div class='add'>+/* get global microprocessor mdio semaphore */</div><div class='add'>+u32 hw_atl_sem_mdio_get(struct aq_hw_s *self);</div><div class='add'>+</div><div class='add'>+u32 hw_atl_sem_reset1_get(struct aq_hw_s *self);</div><div class='add'>+u32 hw_atl_sem_reset2_get(struct aq_hw_s *self);</div><div class='add'>+</div><div class='add'>+/* get global microprocessor scratch pad register */</div><div class='add'>+u32 hw_atl_scrpad_get(struct aq_hw_s *aq_hw, u32 scratch_scp);</div><div class='add'>+</div><div class='add'>+/* get global microprocessor scratch pad 12 register */</div><div class='add'>+u32 hw_atl_scrpad12_get(struct aq_hw_s *self);</div><div class='add'>+</div><div class='add'>+/* get global microprocessor scratch pad 25 register */</div><div class='add'>+u32 hw_atl_scrpad25_get(struct aq_hw_s *self);</div><div class='add'>+</div><div class='add'>+#endif /* HW_ATL_LLH_H */</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh_internal.h b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh_internal.h<br/>new file mode 100644<br/>index 000000000000..fce30d90b6cb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh_internal.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh_internal.h</a></div><div class='hunk'>@@ -0,0 +1,2910 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2014-2019 aQuantia Corporation</div><div class='add'>+ * Copyright (C) 2019-2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* File hw_atl_llh_internal.h: Preprocessor definitions</div><div class='add'>+ * for Atlantic registers.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef HW_ATL_LLH_INTERNAL_H</div><div class='add'>+#define HW_ATL_LLH_INTERNAL_H</div><div class='add'>+</div><div class='add'>+/* COM Temperature Sense Reset Bitfield Definitions */</div><div class='add'>+#define HW_ATL_TS_RESET_ADR 0x00003100</div><div class='add'>+#define HW_ATL_TS_RESET_MSK 0x00000004</div><div class='add'>+#define HW_ATL_TS_RESET_SHIFT 2</div><div class='add'>+#define HW_ATL_TS_RESET_WIDTH 1</div><div class='add'>+</div><div class='add'>+/* COM Temperature Sense Power Down Bitfield Definitions */</div><div class='add'>+#define HW_ATL_TS_POWER_DOWN_ADR 0x00003100</div><div class='add'>+#define HW_ATL_TS_POWER_DOWN_MSK 0x00000001</div><div class='add'>+#define HW_ATL_TS_POWER_DOWN_SHIFT 0</div><div class='add'>+#define HW_ATL_TS_POWER_DOWN_WIDTH 1</div><div class='add'>+</div><div class='add'>+/* COM Temperature Sense Ready Bitfield Definitions */</div><div class='add'>+#define HW_ATL_TS_READY_ADR 0x00003120</div><div class='add'>+#define HW_ATL_TS_READY_MSK 0x80000000</div><div class='add'>+#define HW_ATL_TS_READY_SHIFT 31</div><div class='add'>+#define HW_ATL_TS_READY_WIDTH 1</div><div class='add'>+</div><div class='add'>+/*  COM Temperature Sense Ready Latch High Bitfield Definitions */</div><div class='add'>+#define HW_ATL_TS_READY_LATCH_HIGH_ADR 0x00003120</div><div class='add'>+#define HW_ATL_TS_READY_LATCH_HIGH_MSK 0x40000000</div><div class='add'>+#define HW_ATL_TS_READY_LATCH_HIGH_SHIFT 30</div><div class='add'>+#define HW_ATL_TS_READY_LATCH_HIGH_WIDTH 1</div><div class='add'>+</div><div class='add'>+/* COM Temperature Sense Data Out [B:0] Bitfield Definitions */</div><div class='add'>+#define HW_ATL_TS_DATA_OUT_ADR 0x00003120</div><div class='add'>+#define HW_ATL_TS_DATA_OUT_MSK 0x00000FFF</div><div class='add'>+#define HW_ATL_TS_DATA_OUT_SHIFT 0</div><div class='add'>+#define HW_ATL_TS_DATA_OUT_WIDTH 12</div><div class='add'>+</div><div class='add'>+/* SMBUS0 Received Data register */</div><div class='add'>+#define HW_ATL_SMB0_RECEIVED_DATA_ADR 0x00000748</div><div class='add'>+/* SMBUS0 Transmitted Data register */</div><div class='add'>+#define HW_ATL_SMB0_TRANSMITTED_DATA_ADR 0x00000608</div><div class='add'>+</div><div class='add'>+/* SMBUS0 Global Provisioning 2 register */</div><div class='add'>+#define HW_ATL_SMB0_PROVISIONING2_ADR 0x00000604</div><div class='add'>+</div><div class='add'>+/* SMBUS0 Bus Busy Bitfield Definitions */</div><div class='add'>+#define HW_ATL_SMB0_BUS_BUSY_ADR 0x00000744</div><div class='add'>+#define HW_ATL_SMB0_BUS_BUSY_MSK 0x00000080</div><div class='add'>+#define HW_ATL_SMB0_BUS_BUSY_SHIFT 7</div><div class='add'>+#define HW_ATL_SMB0_BUS_BUSY_WIDTH 1</div><div class='add'>+</div><div class='add'>+/* SMBUS0 Byte Transfer Complete Bitfield Definitions */</div><div class='add'>+#define HW_ATL_SMB0_BYTE_TRANSFER_COMPLETE_ADR 0x00000744</div><div class='add'>+#define HW_ATL_SMB0_BYTE_TRANSFER_COMPLETE_MSK 0x00000002</div><div class='add'>+#define HW_ATL_SMB0_BYTE_TRANSFER_COMPLETE_SHIFT 1</div><div class='add'>+#define HW_ATL_SMB0_BYTE_TRANSFER_COMPLETE_WIDTH 1</div><div class='add'>+</div><div class='add'>+/* SMBUS0 Receive Acknowledge Bitfield Definitions */</div><div class='add'>+#define HW_ATL_SMB0_RX_ACKNOWLEDGED_ADR 0x00000744</div><div class='add'>+#define HW_ATL_SMB0_RX_ACKNOWLEDGED_MSK 0x00000100</div><div class='add'>+#define HW_ATL_SMB0_RX_ACKNOWLEDGED_SHIFT 8</div><div class='add'>+#define HW_ATL_SMB0_RX_ACKNOWLEDGED_WIDTH 1</div><div class='add'>+</div><div class='add'>+/* SMBUS0 Repeated Start Detect Bitfield Definitions */</div><div class='add'>+#define HW_ATL_SMB0_REPEATED_START_DETECT_ADR 0x00000744</div><div class='add'>+#define HW_ATL_SMB0_REPEATED_START_DETECT_MSK 0x00000004</div><div class='add'>+#define HW_ATL_SMB0_REPEATED_START_DETECT_SHIFT 2</div><div class='add'>+#define HW_ATL_SMB0_REPEATED_START_DETECT_WIDTH 1</div><div class='add'>+</div><div class='add'>+/* global microprocessor semaphore  definitions</div><div class='add'>+ * base address: 0x000003a0</div><div class='add'>+ * parameter: semaphore {s} | stride size 0x4 | range [0, 15]</div><div class='add'>+ */</div><div class='add'>+#define HW_ATL_GLB_CPU_SEM_ADR(semaphore)  (0x000003a0u + (semaphore) * 0x4)</div><div class='add'>+/* register address for bitfield rx dma good octet counter lsw [1f:0] */</div><div class='add'>+#define HW_ATL_STATS_RX_DMA_GOOD_OCTET_COUNTERLSW 0x00006808</div><div class='add'>+/* register address for bitfield rx dma good packet counter lsw [1f:0] */</div><div class='add'>+#define HW_ATL_STATS_RX_DMA_GOOD_PKT_COUNTERLSW 0x00006800</div><div class='add'>+/* register address for bitfield tx dma good octet counter lsw [1f:0] */</div><div class='add'>+#define HW_ATL_STATS_TX_DMA_GOOD_OCTET_COUNTERLSW 0x00008808</div><div class='add'>+/* register address for bitfield tx dma good packet counter lsw [1f:0] */</div><div class='add'>+#define HW_ATL_STATS_TX_DMA_GOOD_PKT_COUNTERLSW 0x00008800</div><div class='add'>+</div><div class='add'>+/* register address for bitfield rx dma good octet counter msw [3f:20] */</div><div class='add'>+#define HW_ATL_STATS_RX_DMA_GOOD_OCTET_COUNTERMSW 0x0000680c</div><div class='add'>+/* register address for bitfield rx dma good packet counter msw [3f:20] */</div><div class='add'>+#define HW_ATL_STATS_RX_DMA_GOOD_PKT_COUNTERMSW 0x00006804</div><div class='add'>+/* register address for bitfield tx dma good octet counter msw [3f:20] */</div><div class='add'>+#define HW_ATL_STATS_TX_DMA_GOOD_OCTET_COUNTERMSW 0x0000880c</div><div class='add'>+/* register address for bitfield tx dma good packet counter msw [3f:20] */</div><div class='add'>+#define HW_ATL_STATS_TX_DMA_GOOD_PKT_COUNTERMSW 0x00008804</div><div class='add'>+</div><div class='add'>+/* preprocessor definitions for msm rx errors counter register */</div><div class='add'>+#define HW_ATL_MAC_MSM_RX_ERRS_CNT_ADR 0x00000120u</div><div class='add'>+</div><div class='add'>+/* preprocessor definitions for msm rx unicast frames counter register */</div><div class='add'>+#define HW_ATL_MAC_MSM_RX_UCST_FRM_CNT_ADR 0x000000e0u</div><div class='add'>+</div><div class='add'>+/* preprocessor definitions for msm rx multicast frames counter register */</div><div class='add'>+#define HW_ATL_MAC_MSM_RX_MCST_FRM_CNT_ADR 0x000000e8u</div><div class='add'>+</div><div class='add'>+/* preprocessor definitions for msm rx broadcast frames counter register */</div><div class='add'>+#define HW_ATL_MAC_MSM_RX_BCST_FRM_CNT_ADR 0x000000f0u</div><div class='add'>+</div><div class='add'>+/* preprocessor definitions for msm rx broadcast octets counter register 1 */</div><div class='add'>+#define HW_ATL_MAC_MSM_RX_BCST_OCTETS_COUNTER1_ADR 0x000001b0u</div><div class='add'>+</div><div class='add'>+/* preprocessor definitions for msm rx broadcast octets counter register 2 */</div><div class='add'>+#define HW_ATL_MAC_MSM_RX_BCST_OCTETS_COUNTER2_ADR 0x000001b4u</div><div class='add'>+</div><div class='add'>+/* preprocessor definitions for msm rx unicast octets counter register 0 */</div><div class='add'>+#define HW_ATL_MAC_MSM_RX_UCST_OCTETS_COUNTER0_ADR 0x000001b8u</div><div class='add'>+</div><div class='add'>+/* preprocessor definitions for msm tx unicast frames counter register */</div><div class='add'>+#define HW_ATL_MAC_MSM_TX_UCST_FRM_CNT_ADR 0x00000108u</div><div class='add'>+</div><div class='add'>+/* preprocessor definitions for msm tx multicast frames counter register */</div><div class='add'>+#define HW_ATL_MAC_MSM_TX_MCST_FRM_CNT_ADR 0x00000110u</div><div class='add'>+</div><div class='add'>+/* preprocessor definitions for global mif identification */</div><div class='add'>+#define HW_ATL_GLB_MIF_ID_ADR 0x0000001cu</div><div class='add'>+</div><div class='add'>+/* register address for bitfield iamr_lsw[1f:0] */</div><div class='add'>+#define HW_ATL_ITR_IAMRLSW_ADR 0x00002090</div><div class='add'>+/* register address for bitfield rx dma drop packet counter [1f:0] */</div><div class='add'>+#define HW_ATL_RPB_RX_DMA_DROP_PKT_CNT_ADR 0x00006818</div><div class='add'>+</div><div class='add'>+/* register address for bitfield imcr_lsw[1f:0] */</div><div class='add'>+#define HW_ATL_ITR_IMCRLSW_ADR 0x00002070</div><div class='add'>+/* register address for bitfield imsr_lsw[1f:0] */</div><div class='add'>+#define HW_ATL_ITR_IMSRLSW_ADR 0x00002060</div><div class='add'>+/* register address for bitfield itr_reg_res_dsbl */</div><div class='add'>+#define HW_ATL_ITR_REG_RES_DSBL_ADR 0x00002300</div><div class='add'>+/* bitmask for bitfield itr_reg_res_dsbl */</div><div class='add'>+#define HW_ATL_ITR_REG_RES_DSBL_MSK 0x20000000</div><div class='add'>+/* lower bit position of bitfield itr_reg_res_dsbl */</div><div class='add'>+#define HW_ATL_ITR_REG_RES_DSBL_SHIFT 29</div><div class='add'>+/* register address for bitfield iscr_lsw[1f:0] */</div><div class='add'>+#define HW_ATL_ITR_ISCRLSW_ADR 0x00002050</div><div class='add'>+/* register address for bitfield isr_lsw[1f:0] */</div><div class='add'>+#define HW_ATL_ITR_ISRLSW_ADR 0x00002000</div><div class='add'>+/* register address for bitfield itr_reset */</div><div class='add'>+#define HW_ATL_ITR_RES_ADR 0x00002300</div><div class='add'>+/* bitmask for bitfield itr_reset */</div><div class='add'>+#define HW_ATL_ITR_RES_MSK 0x80000000</div><div class='add'>+/* lower bit position of bitfield itr_reset */</div><div class='add'>+#define HW_ATL_ITR_RES_SHIFT 31</div><div class='add'>+</div><div class='add'>+/* register address for bitfield  rsc_en */</div><div class='add'>+#define HW_ATL_ITR_RSC_EN_ADR 0x00002200</div><div class='add'>+</div><div class='add'>+/* register address for bitfield  rsc_delay */</div><div class='add'>+#define HW_ATL_ITR_RSC_DELAY_ADR 0x00002204</div><div class='add'>+/* bitmask for bitfield  rsc_delay */</div><div class='add'>+#define HW_ATL_ITR_RSC_DELAY_MSK 0x0000000f</div><div class='add'>+/* width of bitfield  rsc_delay */</div><div class='add'>+#define HW_ATL_ITR_RSC_DELAY_WIDTH 4</div><div class='add'>+/* lower bit position of bitfield  rsc_delay */</div><div class='add'>+#define HW_ATL_ITR_RSC_DELAY_SHIFT 0</div><div class='add'>+</div><div class='add'>+/* register address for bitfield dca{d}_cpuid[7:0] */</div><div class='add'>+#define HW_ATL_RDM_DCADCPUID_ADR(dca) (0x00006100 + (dca) * 0x4)</div><div class='add'>+/* bitmask for bitfield dca{d}_cpuid[7:0] */</div><div class='add'>+#define HW_ATL_RDM_DCADCPUID_MSK 0x000000ff</div><div class='add'>+/* lower bit position of bitfield dca{d}_cpuid[7:0] */</div><div class='add'>+#define HW_ATL_RDM_DCADCPUID_SHIFT 0</div><div class='add'>+/* register address for bitfield dca_en */</div><div class='add'>+#define HW_ATL_RDM_DCA_EN_ADR 0x00006180</div><div class='add'>+</div><div class='add'>+/* rx dca_en bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "dca_en".</div><div class='add'>+ * port="pif_rdm_dca_en_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield dca_en */</div><div class='add'>+#define HW_ATL_RDM_DCA_EN_ADR 0x00006180</div><div class='add'>+/* bitmask for bitfield dca_en */</div><div class='add'>+#define HW_ATL_RDM_DCA_EN_MSK 0x80000000</div><div class='add'>+/* inverted bitmask for bitfield dca_en */</div><div class='add'>+#define HW_ATL_RDM_DCA_EN_MSKN 0x7fffffff</div><div class='add'>+/* lower bit position of bitfield dca_en */</div><div class='add'>+#define HW_ATL_RDM_DCA_EN_SHIFT 31</div><div class='add'>+/* width of bitfield dca_en */</div><div class='add'>+#define HW_ATL_RDM_DCA_EN_WIDTH 1</div><div class='add'>+/* default value of bitfield dca_en */</div><div class='add'>+#define HW_ATL_RDM_DCA_EN_DEFAULT 0x1</div><div class='add'>+</div><div class='add'>+/* rx dca_mode[3:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "dca_mode[3:0]".</div><div class='add'>+ * port="pif_rdm_dca_mode_i[3:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield dca_mode[3:0] */</div><div class='add'>+#define HW_ATL_RDM_DCA_MODE_ADR 0x00006180</div><div class='add'>+/* bitmask for bitfield dca_mode[3:0] */</div><div class='add'>+#define HW_ATL_RDM_DCA_MODE_MSK 0x0000000f</div><div class='add'>+/* inverted bitmask for bitfield dca_mode[3:0] */</div><div class='add'>+#define HW_ATL_RDM_DCA_MODE_MSKN 0xfffffff0</div><div class='add'>+/* lower bit position of bitfield dca_mode[3:0] */</div><div class='add'>+#define HW_ATL_RDM_DCA_MODE_SHIFT 0</div><div class='add'>+/* width of bitfield dca_mode[3:0] */</div><div class='add'>+#define HW_ATL_RDM_DCA_MODE_WIDTH 4</div><div class='add'>+/* default value of bitfield dca_mode[3:0] */</div><div class='add'>+#define HW_ATL_RDM_DCA_MODE_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx desc{d}_data_size[4:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "desc{d}_data_size[4:0]".</div><div class='add'>+ * parameter: descriptor {d} | stride size 0x20 | range [0, 31]</div><div class='add'>+ * port="pif_rdm_desc0_data_size_i[4:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield desc{d}_data_size[4:0] */</div><div class='add'>+#define HW_ATL_RDM_DESCDDATA_SIZE_ADR(descriptor) \</div><div class='add'>+	(0x00005b18 + (descriptor) * 0x20)</div><div class='add'>+/* bitmask for bitfield desc{d}_data_size[4:0] */</div><div class='add'>+#define HW_ATL_RDM_DESCDDATA_SIZE_MSK 0x0000001f</div><div class='add'>+/* inverted bitmask for bitfield desc{d}_data_size[4:0] */</div><div class='add'>+#define HW_ATL_RDM_DESCDDATA_SIZE_MSKN 0xffffffe0</div><div class='add'>+/* lower bit position of bitfield desc{d}_data_size[4:0] */</div><div class='add'>+#define HW_ATL_RDM_DESCDDATA_SIZE_SHIFT 0</div><div class='add'>+/* width of bitfield desc{d}_data_size[4:0] */</div><div class='add'>+#define HW_ATL_RDM_DESCDDATA_SIZE_WIDTH 5</div><div class='add'>+/* default value of bitfield desc{d}_data_size[4:0] */</div><div class='add'>+#define HW_ATL_RDM_DESCDDATA_SIZE_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx dca{d}_desc_en bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "dca{d}_desc_en".</div><div class='add'>+ * parameter: dca {d} | stride size 0x4 | range [0, 31]</div><div class='add'>+ * port="pif_rdm_dca_desc_en_i[0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield dca{d}_desc_en */</div><div class='add'>+#define HW_ATL_RDM_DCADDESC_EN_ADR(dca) (0x00006100 + (dca) * 0x4)</div><div class='add'>+/* bitmask for bitfield dca{d}_desc_en */</div><div class='add'>+#define HW_ATL_RDM_DCADDESC_EN_MSK 0x80000000</div><div class='add'>+/* inverted bitmask for bitfield dca{d}_desc_en */</div><div class='add'>+#define HW_ATL_RDM_DCADDESC_EN_MSKN 0x7fffffff</div><div class='add'>+/* lower bit position of bitfield dca{d}_desc_en */</div><div class='add'>+#define HW_ATL_RDM_DCADDESC_EN_SHIFT 31</div><div class='add'>+/* width of bitfield dca{d}_desc_en */</div><div class='add'>+#define HW_ATL_RDM_DCADDESC_EN_WIDTH 1</div><div class='add'>+/* default value of bitfield dca{d}_desc_en */</div><div class='add'>+#define HW_ATL_RDM_DCADDESC_EN_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx desc{d}_en bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "desc{d}_en".</div><div class='add'>+ * parameter: descriptor {d} | stride size 0x20 | range [0, 31]</div><div class='add'>+ * port="pif_rdm_desc_en_i[0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield desc{d}_en */</div><div class='add'>+#define HW_ATL_RDM_DESCDEN_ADR(descriptor) (0x00005b08 + (descriptor) * 0x20)</div><div class='add'>+/* bitmask for bitfield desc{d}_en */</div><div class='add'>+#define HW_ATL_RDM_DESCDEN_MSK 0x80000000</div><div class='add'>+/* inverted bitmask for bitfield desc{d}_en */</div><div class='add'>+#define HW_ATL_RDM_DESCDEN_MSKN 0x7fffffff</div><div class='add'>+/* lower bit position of bitfield desc{d}_en */</div><div class='add'>+#define HW_ATL_RDM_DESCDEN_SHIFT 31</div><div class='add'>+/* width of bitfield desc{d}_en */</div><div class='add'>+#define HW_ATL_RDM_DESCDEN_WIDTH 1</div><div class='add'>+/* default value of bitfield desc{d}_en */</div><div class='add'>+#define HW_ATL_RDM_DESCDEN_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx desc{d}_hdr_size[4:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "desc{d}_hdr_size[4:0]".</div><div class='add'>+ * parameter: descriptor {d} | stride size 0x20 | range [0, 31]</div><div class='add'>+ * port="pif_rdm_desc0_hdr_size_i[4:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield desc{d}_hdr_size[4:0] */</div><div class='add'>+#define HW_ATL_RDM_DESCDHDR_SIZE_ADR(descriptor) \</div><div class='add'>+	(0x00005b18 + (descriptor) * 0x20)</div><div class='add'>+/* bitmask for bitfield desc{d}_hdr_size[4:0] */</div><div class='add'>+#define HW_ATL_RDM_DESCDHDR_SIZE_MSK 0x00001f00</div><div class='add'>+/* inverted bitmask for bitfield desc{d}_hdr_size[4:0] */</div><div class='add'>+#define HW_ATL_RDM_DESCDHDR_SIZE_MSKN 0xffffe0ff</div><div class='add'>+/* lower bit position of bitfield desc{d}_hdr_size[4:0] */</div><div class='add'>+#define HW_ATL_RDM_DESCDHDR_SIZE_SHIFT 8</div><div class='add'>+/* width of bitfield desc{d}_hdr_size[4:0] */</div><div class='add'>+#define HW_ATL_RDM_DESCDHDR_SIZE_WIDTH 5</div><div class='add'>+/* default value of bitfield desc{d}_hdr_size[4:0] */</div><div class='add'>+#define HW_ATL_RDM_DESCDHDR_SIZE_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx desc{d}_hdr_split bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "desc{d}_hdr_split".</div><div class='add'>+ * parameter: descriptor {d} | stride size 0x20 | range [0, 31]</div><div class='add'>+ * port="pif_rdm_desc_hdr_split_i[0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield desc{d}_hdr_split */</div><div class='add'>+#define HW_ATL_RDM_DESCDHDR_SPLIT_ADR(descriptor) \</div><div class='add'>+	(0x00005b08 + (descriptor) * 0x20)</div><div class='add'>+/* bitmask for bitfield desc{d}_hdr_split */</div><div class='add'>+#define HW_ATL_RDM_DESCDHDR_SPLIT_MSK 0x10000000</div><div class='add'>+/* inverted bitmask for bitfield desc{d}_hdr_split */</div><div class='add'>+#define HW_ATL_RDM_DESCDHDR_SPLIT_MSKN 0xefffffff</div><div class='add'>+/* lower bit position of bitfield desc{d}_hdr_split */</div><div class='add'>+#define HW_ATL_RDM_DESCDHDR_SPLIT_SHIFT 28</div><div class='add'>+/* width of bitfield desc{d}_hdr_split */</div><div class='add'>+#define HW_ATL_RDM_DESCDHDR_SPLIT_WIDTH 1</div><div class='add'>+/* default value of bitfield desc{d}_hdr_split */</div><div class='add'>+#define HW_ATL_RDM_DESCDHDR_SPLIT_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx desc{d}_hd[c:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "desc{d}_hd[c:0]".</div><div class='add'>+ * parameter: descriptor {d} | stride size 0x20 | range [0, 31]</div><div class='add'>+ * port="rdm_pif_desc0_hd_o[12:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield desc{d}_hd[c:0] */</div><div class='add'>+#define HW_ATL_RDM_DESCDHD_ADR(descriptor) (0x00005b0c + (descriptor) * 0x20)</div><div class='add'>+/* bitmask for bitfield desc{d}_hd[c:0] */</div><div class='add'>+#define HW_ATL_RDM_DESCDHD_MSK 0x00001fff</div><div class='add'>+/* inverted bitmask for bitfield desc{d}_hd[c:0] */</div><div class='add'>+#define HW_ATL_RDM_DESCDHD_MSKN 0xffffe000</div><div class='add'>+/* lower bit position of bitfield desc{d}_hd[c:0] */</div><div class='add'>+#define HW_ATL_RDM_DESCDHD_SHIFT 0</div><div class='add'>+/* width of bitfield desc{d}_hd[c:0] */</div><div class='add'>+#define HW_ATL_RDM_DESCDHD_WIDTH 13</div><div class='add'>+</div><div class='add'>+/* rx desc{d}_len[9:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "desc{d}_len[9:0]".</div><div class='add'>+ * parameter: descriptor {d} | stride size 0x20 | range [0, 31]</div><div class='add'>+ * port="pif_rdm_desc0_len_i[9:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield desc{d}_len[9:0] */</div><div class='add'>+#define HW_ATL_RDM_DESCDLEN_ADR(descriptor) (0x00005b08 + (descriptor) * 0x20)</div><div class='add'>+/* bitmask for bitfield desc{d}_len[9:0] */</div><div class='add'>+#define HW_ATL_RDM_DESCDLEN_MSK 0x00001ff8</div><div class='add'>+/* inverted bitmask for bitfield desc{d}_len[9:0] */</div><div class='add'>+#define HW_ATL_RDM_DESCDLEN_MSKN 0xffffe007</div><div class='add'>+/* lower bit position of bitfield desc{d}_len[9:0] */</div><div class='add'>+#define HW_ATL_RDM_DESCDLEN_SHIFT 3</div><div class='add'>+/* width of bitfield desc{d}_len[9:0] */</div><div class='add'>+#define HW_ATL_RDM_DESCDLEN_WIDTH 10</div><div class='add'>+/* default value of bitfield desc{d}_len[9:0] */</div><div class='add'>+#define HW_ATL_RDM_DESCDLEN_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx desc{d}_reset bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "desc{d}_reset".</div><div class='add'>+ * parameter: descriptor {d} | stride size 0x20 | range [0, 31]</div><div class='add'>+ * port="pif_rdm_q_pf_res_i[0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield desc{d}_reset */</div><div class='add'>+#define HW_ATL_RDM_DESCDRESET_ADR(descriptor) (0x00005b08 + (descriptor) * 0x20)</div><div class='add'>+/* bitmask for bitfield desc{d}_reset */</div><div class='add'>+#define HW_ATL_RDM_DESCDRESET_MSK 0x02000000</div><div class='add'>+/* inverted bitmask for bitfield desc{d}_reset */</div><div class='add'>+#define HW_ATL_RDM_DESCDRESET_MSKN 0xfdffffff</div><div class='add'>+/* lower bit position of bitfield desc{d}_reset */</div><div class='add'>+#define HW_ATL_RDM_DESCDRESET_SHIFT 25</div><div class='add'>+/* width of bitfield desc{d}_reset */</div><div class='add'>+#define HW_ATL_RDM_DESCDRESET_WIDTH 1</div><div class='add'>+/* default value of bitfield desc{d}_reset */</div><div class='add'>+#define HW_ATL_RDM_DESCDRESET_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rdm_desc_init_i bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield rdm_desc_init_i.</div><div class='add'>+ * port="pif_rdm_desc_init_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield rdm_desc_init_i */</div><div class='add'>+#define HW_ATL_RDM_RX_DMA_DESC_CACHE_INIT_ADR 0x00005a00</div><div class='add'>+/* bitmask for bitfield rdm_desc_init_i */</div><div class='add'>+#define HW_ATL_RDM_RX_DMA_DESC_CACHE_INIT_MSK 0xffffffff</div><div class='add'>+/* inverted bitmask for bitfield rdm_desc_init_i */</div><div class='add'>+#define HW_ATL_RDM_RX_DMA_DESC_CACHE_INIT_MSKN 0x00000000</div><div class='add'>+/* lower bit position of bitfield  rdm_desc_init_i */</div><div class='add'>+#define HW_ATL_RDM_RX_DMA_DESC_CACHE_INIT_SHIFT 0</div><div class='add'>+/* width of bitfield rdm_desc_init_i */</div><div class='add'>+#define HW_ATL_RDM_RX_DMA_DESC_CACHE_INIT_WIDTH 32</div><div class='add'>+/* default value of bitfield rdm_desc_init_i */</div><div class='add'>+#define HW_ATL_RDM_RX_DMA_DESC_CACHE_INIT_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rdm_desc_init_done_i bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield rdm_desc_init_done_i.</div><div class='add'>+ * port="pif_rdm_desc_init_done_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield rdm_desc_init_done_i */</div><div class='add'>+#define RDM_RX_DMA_DESC_CACHE_INIT_DONE_ADR 0x00005a10</div><div class='add'>+/* bitmask for bitfield rdm_desc_init_done_i */</div><div class='add'>+#define RDM_RX_DMA_DESC_CACHE_INIT_DONE_MSK 0x00000001U</div><div class='add'>+/* inverted bitmask for bitfield rdm_desc_init_done_i */</div><div class='add'>+#define RDM_RX_DMA_DESC_CACHE_INIT_DONE_MSKN 0xfffffffe</div><div class='add'>+/* lower bit position of bitfield  rdm_desc_init_done_i */</div><div class='add'>+#define RDM_RX_DMA_DESC_CACHE_INIT_DONE_SHIFT 0U</div><div class='add'>+/* width of bitfield rdm_desc_init_done_i */</div><div class='add'>+#define RDM_RX_DMA_DESC_CACHE_INIT_DONE_WIDTH 1</div><div class='add'>+/* default value of bitfield rdm_desc_init_done_i */</div><div class='add'>+#define RDM_RX_DMA_DESC_CACHE_INIT_DONE_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+/* rx int_desc_wrb_en bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "int_desc_wrb_en".</div><div class='add'>+ * port="pif_rdm_int_desc_wrb_en_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield int_desc_wrb_en */</div><div class='add'>+#define HW_ATL_RDM_INT_DESC_WRB_EN_ADR 0x00005a30</div><div class='add'>+/* bitmask for bitfield int_desc_wrb_en */</div><div class='add'>+#define HW_ATL_RDM_INT_DESC_WRB_EN_MSK 0x00000004</div><div class='add'>+/* inverted bitmask for bitfield int_desc_wrb_en */</div><div class='add'>+#define HW_ATL_RDM_INT_DESC_WRB_EN_MSKN 0xfffffffb</div><div class='add'>+/* lower bit position of bitfield int_desc_wrb_en */</div><div class='add'>+#define HW_ATL_RDM_INT_DESC_WRB_EN_SHIFT 2</div><div class='add'>+/* width of bitfield int_desc_wrb_en */</div><div class='add'>+#define HW_ATL_RDM_INT_DESC_WRB_EN_WIDTH 1</div><div class='add'>+/* default value of bitfield int_desc_wrb_en */</div><div class='add'>+#define HW_ATL_RDM_INT_DESC_WRB_EN_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx dca{d}_hdr_en bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "dca{d}_hdr_en".</div><div class='add'>+ * parameter: dca {d} | stride size 0x4 | range [0, 31]</div><div class='add'>+ * port="pif_rdm_dca_hdr_en_i[0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield dca{d}_hdr_en */</div><div class='add'>+#define HW_ATL_RDM_DCADHDR_EN_ADR(dca) (0x00006100 + (dca) * 0x4)</div><div class='add'>+/* bitmask for bitfield dca{d}_hdr_en */</div><div class='add'>+#define HW_ATL_RDM_DCADHDR_EN_MSK 0x40000000</div><div class='add'>+/* inverted bitmask for bitfield dca{d}_hdr_en */</div><div class='add'>+#define HW_ATL_RDM_DCADHDR_EN_MSKN 0xbfffffff</div><div class='add'>+/* lower bit position of bitfield dca{d}_hdr_en */</div><div class='add'>+#define HW_ATL_RDM_DCADHDR_EN_SHIFT 30</div><div class='add'>+/* width of bitfield dca{d}_hdr_en */</div><div class='add'>+#define HW_ATL_RDM_DCADHDR_EN_WIDTH 1</div><div class='add'>+/* default value of bitfield dca{d}_hdr_en */</div><div class='add'>+#define HW_ATL_RDM_DCADHDR_EN_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx dca{d}_pay_en bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "dca{d}_pay_en".</div><div class='add'>+ * parameter: dca {d} | stride size 0x4 | range [0, 31]</div><div class='add'>+ * port="pif_rdm_dca_pay_en_i[0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield dca{d}_pay_en */</div><div class='add'>+#define HW_ATL_RDM_DCADPAY_EN_ADR(dca) (0x00006100 + (dca) * 0x4)</div><div class='add'>+/* bitmask for bitfield dca{d}_pay_en */</div><div class='add'>+#define HW_ATL_RDM_DCADPAY_EN_MSK 0x20000000</div><div class='add'>+/* inverted bitmask for bitfield dca{d}_pay_en */</div><div class='add'>+#define HW_ATL_RDM_DCADPAY_EN_MSKN 0xdfffffff</div><div class='add'>+/* lower bit position of bitfield dca{d}_pay_en */</div><div class='add'>+#define HW_ATL_RDM_DCADPAY_EN_SHIFT 29</div><div class='add'>+/* width of bitfield dca{d}_pay_en */</div><div class='add'>+#define HW_ATL_RDM_DCADPAY_EN_WIDTH 1</div><div class='add'>+/* default value of bitfield dca{d}_pay_en */</div><div class='add'>+#define HW_ATL_RDM_DCADPAY_EN_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* RX rdm_int_rim_en Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "rdm_int_rim_en".</div><div class='add'>+ * PORT="pif_rdm_int_rim_en_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield rdm_int_rim_en */</div><div class='add'>+#define HW_ATL_RDM_INT_RIM_EN_ADR 0x00005A30</div><div class='add'>+/* Bitmask for bitfield rdm_int_rim_en */</div><div class='add'>+#define HW_ATL_RDM_INT_RIM_EN_MSK 0x00000008</div><div class='add'>+/* Inverted bitmask for bitfield rdm_int_rim_en */</div><div class='add'>+#define HW_ATL_RDM_INT_RIM_EN_MSKN 0xFFFFFFF7</div><div class='add'>+/* Lower bit position of bitfield rdm_int_rim_en */</div><div class='add'>+#define HW_ATL_RDM_INT_RIM_EN_SHIFT 3</div><div class='add'>+/* Width of bitfield rdm_int_rim_en */</div><div class='add'>+#define HW_ATL_RDM_INT_RIM_EN_WIDTH 1</div><div class='add'>+/* Default value of bitfield rdm_int_rim_en */</div><div class='add'>+#define HW_ATL_RDM_INT_RIM_EN_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* general interrupt mapping register definitions</div><div class='add'>+ * preprocessor definitions for general interrupt mapping register</div><div class='add'>+ * base address: 0x00002180</div><div class='add'>+ * parameter: regidx {f} | stride size 0x4 | range [0, 3]</div><div class='add'>+ */</div><div class='add'>+#define HW_ATL_GEN_INTR_MAP_ADR(regidx) (0x00002180u + (regidx) * 0x4)</div><div class='add'>+</div><div class='add'>+/* general interrupt status register definitions</div><div class='add'>+ * preprocessor definitions for general interrupt status register</div><div class='add'>+ * address: 0x000021A0</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define HW_ATL_GEN_INTR_STAT_ADR 0x000021A4U</div><div class='add'>+</div><div class='add'>+/* interrupt global control register  definitions</div><div class='add'>+ * preprocessor definitions for interrupt global control register</div><div class='add'>+ * address: 0x00002300</div><div class='add'>+ */</div><div class='add'>+#define HW_ATL_INTR_GLB_CTL_ADR 0x00002300u</div><div class='add'>+</div><div class='add'>+/* interrupt throttle register definitions</div><div class='add'>+ * preprocessor definitions for interrupt throttle register</div><div class='add'>+ * base address: 0x00002800</div><div class='add'>+ * parameter: throttle {t} | stride size 0x4 | range [0, 31]</div><div class='add'>+ */</div><div class='add'>+#define HW_ATL_INTR_THR_ADR(throttle) (0x00002800u + (throttle) * 0x4)</div><div class='add'>+</div><div class='add'>+/* rx dma descriptor base address lsw definitions</div><div class='add'>+ * preprocessor definitions for rx dma descriptor base address lsw</div><div class='add'>+ * base address: 0x00005b00</div><div class='add'>+ * parameter: descriptor {d} | stride size 0x20 | range [0, 31]</div><div class='add'>+ */</div><div class='add'>+#define HW_ATL_RX_DMA_DESC_BASE_ADDRLSW_ADR(descriptor) \</div><div class='add'>+(0x00005b00u + (descriptor) * 0x20)</div><div class='add'>+</div><div class='add'>+/* rx dma descriptor base address msw definitions</div><div class='add'>+ * preprocessor definitions for rx dma descriptor base address msw</div><div class='add'>+ * base address: 0x00005b04</div><div class='add'>+ * parameter: descriptor {d} | stride size 0x20 | range [0, 31]</div><div class='add'>+ */</div><div class='add'>+#define HW_ATL_RX_DMA_DESC_BASE_ADDRMSW_ADR(descriptor) \</div><div class='add'>+(0x00005b04u + (descriptor) * 0x20)</div><div class='add'>+</div><div class='add'>+/* rx dma descriptor status register definitions</div><div class='add'>+ * preprocessor definitions for rx dma descriptor status register</div><div class='add'>+ * base address: 0x00005b14</div><div class='add'>+ * parameter: descriptor {d} | stride size 0x20 | range [0, 31]</div><div class='add'>+ */</div><div class='add'>+#define HW_ATL_RX_DMA_DESC_STAT_ADR(descriptor) \</div><div class='add'>+	(0x00005b14u + (descriptor) * 0x20)</div><div class='add'>+</div><div class='add'>+/* rx dma descriptor tail pointer register definitions</div><div class='add'>+ * preprocessor definitions for rx dma descriptor tail pointer register</div><div class='add'>+ * base address: 0x00005b10</div><div class='add'>+ * parameter: descriptor {d} | stride size 0x20 | range [0, 31]</div><div class='add'>+ */</div><div class='add'>+#define HW_ATL_RX_DMA_DESC_TAIL_PTR_ADR(descriptor) \</div><div class='add'>+	(0x00005b10u + (descriptor) * 0x20)</div><div class='add'>+</div><div class='add'>+/* rx interrupt moderation control register definitions</div><div class='add'>+ * Preprocessor definitions for RX Interrupt Moderation Control Register</div><div class='add'>+ * Base Address: 0x00005A40</div><div class='add'>+ * Parameter: RIM {R} | stride size 0x4 | range [0, 31]</div><div class='add'>+ */</div><div class='add'>+#define HW_ATL_RX_INTR_MODERATION_CTL_ADR(rim) (0x00005A40u + (rim) * 0x4)</div><div class='add'>+</div><div class='add'>+/* rx filter multicast filter mask register definitions</div><div class='add'>+ * preprocessor definitions for rx filter multicast filter mask register</div><div class='add'>+ * address: 0x00005270</div><div class='add'>+ */</div><div class='add'>+#define HW_ATL_RX_FLR_MCST_FLR_MSK_ADR 0x00005270u</div><div class='add'>+</div><div class='add'>+/* rx filter multicast filter register definitions</div><div class='add'>+ * preprocessor definitions for rx filter multicast filter register</div><div class='add'>+ * base address: 0x00005250</div><div class='add'>+ * parameter: filter {f} | stride size 0x4 | range [0, 7]</div><div class='add'>+ */</div><div class='add'>+#define HW_ATL_RX_FLR_MCST_FLR_ADR(filter) (0x00005250u + (filter) * 0x4)</div><div class='add'>+</div><div class='add'>+/* RX Filter RSS Control Register 1 Definitions</div><div class='add'>+ * Preprocessor definitions for RX Filter RSS Control Register 1</div><div class='add'>+ * Address: 0x000054C0</div><div class='add'>+ */</div><div class='add'>+#define HW_ATL_RX_FLR_RSS_CONTROL1_ADR 0x000054C0u</div><div class='add'>+</div><div class='add'>+/* RX Filter Control Register 2 Definitions</div><div class='add'>+ * Preprocessor definitions for RX Filter Control Register 2</div><div class='add'>+ * Address: 0x00005104</div><div class='add'>+ */</div><div class='add'>+#define HW_ATL_RX_FLR_CONTROL2_ADR 0x00005104u</div><div class='add'>+</div><div class='add'>+/* tx tx dma debug control [1f:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "tx dma debug control [1f:0]".</div><div class='add'>+ * port="pif_tdm_debug_cntl_i[31:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield tx dma debug control [1f:0] */</div><div class='add'>+#define HW_ATL_TDM_TX_DMA_DEBUG_CTL_ADR 0x00008920</div><div class='add'>+/* bitmask for bitfield tx dma debug control [1f:0] */</div><div class='add'>+#define HW_ATL_TDM_TX_DMA_DEBUG_CTL_MSK 0xffffffff</div><div class='add'>+/* inverted bitmask for bitfield tx dma debug control [1f:0] */</div><div class='add'>+#define HW_ATL_TDM_TX_DMA_DEBUG_CTL_MSKN 0x00000000</div><div class='add'>+/* lower bit position of bitfield tx dma debug control [1f:0] */</div><div class='add'>+#define HW_ATL_TDM_TX_DMA_DEBUG_CTL_SHIFT 0</div><div class='add'>+/* width of bitfield tx dma debug control [1f:0] */</div><div class='add'>+#define HW_ATL_TDM_TX_DMA_DEBUG_CTL_WIDTH 32</div><div class='add'>+/* default value of bitfield tx dma debug control [1f:0] */</div><div class='add'>+#define HW_ATL_TDM_TX_DMA_DEBUG_CTL_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx dma descriptor base address lsw definitions</div><div class='add'>+ * preprocessor definitions for tx dma descriptor base address lsw</div><div class='add'>+ * base address: 0x00007c00</div><div class='add'>+ * parameter: descriptor {d} | stride size 0x40 | range [0, 31]</div><div class='add'>+ */</div><div class='add'>+#define HW_ATL_TX_DMA_DESC_BASE_ADDRLSW_ADR(descriptor) \</div><div class='add'>+	(0x00007c00u + (descriptor) * 0x40)</div><div class='add'>+</div><div class='add'>+/* tx dma descriptor tail pointer register definitions</div><div class='add'>+ * preprocessor definitions for tx dma descriptor tail pointer register</div><div class='add'>+ * base address: 0x00007c10</div><div class='add'>+ *  parameter: descriptor {d} | stride size 0x40 | range [0, 31]</div><div class='add'>+ */</div><div class='add'>+#define HW_ATL_TX_DMA_DESC_TAIL_PTR_ADR(descriptor) \</div><div class='add'>+	(0x00007c10u + (descriptor) * 0x40)</div><div class='add'>+</div><div class='add'>+/* rx dma_sys_loopback bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "dma_sys_loopback".</div><div class='add'>+ * port="pif_rpb_dma_sys_lbk_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield dma_sys_loopback */</div><div class='add'>+#define HW_ATL_RPB_DMA_SYS_LBK_ADR 0x00005000</div><div class='add'>+/* bitmask for bitfield dma_sys_loopback */</div><div class='add'>+#define HW_ATL_RPB_DMA_SYS_LBK_MSK 0x00000040</div><div class='add'>+/* inverted bitmask for bitfield dma_sys_loopback */</div><div class='add'>+#define HW_ATL_RPB_DMA_SYS_LBK_MSKN 0xffffffbf</div><div class='add'>+/* lower bit position of bitfield dma_sys_loopback */</div><div class='add'>+#define HW_ATL_RPB_DMA_SYS_LBK_SHIFT 6</div><div class='add'>+/* width of bitfield dma_sys_loopback */</div><div class='add'>+#define HW_ATL_RPB_DMA_SYS_LBK_WIDTH 1</div><div class='add'>+/* default value of bitfield dma_sys_loopback */</div><div class='add'>+#define HW_ATL_RPB_DMA_SYS_LBK_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx dma_net_loopback bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "dma_net_loopback".</div><div class='add'>+ * port="pif_rpb_dma_net_lbk_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield dma_net_loopback */</div><div class='add'>+#define HW_ATL_RPB_DMA_NET_LBK_ADR 0x00005000</div><div class='add'>+/* bitmask for bitfield dma_net_loopback */</div><div class='add'>+#define HW_ATL_RPB_DMA_NET_LBK_MSK 0x00000010</div><div class='add'>+/* inverted bitmask for bitfield dma_net_loopback */</div><div class='add'>+#define HW_ATL_RPB_DMA_NET_LBK_MSKN 0xffffffef</div><div class='add'>+/* lower bit position of bitfield dma_net_loopback */</div><div class='add'>+#define HW_ATL_RPB_DMA_NET_LBK_SHIFT 4</div><div class='add'>+/* width of bitfield dma_net_loopback */</div><div class='add'>+#define HW_ATL_RPB_DMA_NET_LBK_WIDTH 1</div><div class='add'>+/* default value of bitfield dma_net_loopback */</div><div class='add'>+#define HW_ATL_RPB_DMA_NET_LBK_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx rx_tc_mode bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "rx_tc_mode".</div><div class='add'>+ * port="pif_rpb_rx_tc_mode_i,pif_rpf_rx_tc_mode_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield rx_tc_mode */</div><div class='add'>+#define HW_ATL_RPB_RPF_RX_TC_MODE_ADR 0x00005700</div><div class='add'>+/* bitmask for bitfield rx_tc_mode */</div><div class='add'>+#define HW_ATL_RPB_RPF_RX_TC_MODE_MSK 0x00000100</div><div class='add'>+/* inverted bitmask for bitfield rx_tc_mode */</div><div class='add'>+#define HW_ATL_RPB_RPF_RX_TC_MODE_MSKN 0xfffffeff</div><div class='add'>+/* lower bit position of bitfield rx_tc_mode */</div><div class='add'>+#define HW_ATL_RPB_RPF_RX_TC_MODE_SHIFT 8</div><div class='add'>+/* width of bitfield rx_tc_mode */</div><div class='add'>+#define HW_ATL_RPB_RPF_RX_TC_MODE_WIDTH 1</div><div class='add'>+/* default value of bitfield rx_tc_mode */</div><div class='add'>+#define HW_ATL_RPB_RPF_RX_TC_MODE_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx rx_buf_en bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "rx_buf_en".</div><div class='add'>+ * port="pif_rpb_rx_buf_en_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield rx_buf_en */</div><div class='add'>+#define HW_ATL_RPB_RX_BUF_EN_ADR 0x00005700</div><div class='add'>+/* bitmask for bitfield rx_buf_en */</div><div class='add'>+#define HW_ATL_RPB_RX_BUF_EN_MSK 0x00000001</div><div class='add'>+/* inverted bitmask for bitfield rx_buf_en */</div><div class='add'>+#define HW_ATL_RPB_RX_BUF_EN_MSKN 0xfffffffe</div><div class='add'>+/* lower bit position of bitfield rx_buf_en */</div><div class='add'>+#define HW_ATL_RPB_RX_BUF_EN_SHIFT 0</div><div class='add'>+/* width of bitfield rx_buf_en */</div><div class='add'>+#define HW_ATL_RPB_RX_BUF_EN_WIDTH 1</div><div class='add'>+/* default value of bitfield rx_buf_en */</div><div class='add'>+#define HW_ATL_RPB_RX_BUF_EN_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx rx{b}_hi_thresh[d:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "rx{b}_hi_thresh[d:0]".</div><div class='add'>+ * parameter: buffer {b} | stride size 0x10 | range [0, 7]</div><div class='add'>+ * port="pif_rpb_rx0_hi_thresh_i[13:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield rx{b}_hi_thresh[d:0] */</div><div class='add'>+#define HW_ATL_RPB_RXBHI_THRESH_ADR(buffer) (0x00005714 + (buffer) * 0x10)</div><div class='add'>+/* bitmask for bitfield rx{b}_hi_thresh[d:0] */</div><div class='add'>+#define HW_ATL_RPB_RXBHI_THRESH_MSK 0x3fff0000</div><div class='add'>+/* inverted bitmask for bitfield rx{b}_hi_thresh[d:0] */</div><div class='add'>+#define HW_ATL_RPB_RXBHI_THRESH_MSKN 0xc000ffff</div><div class='add'>+/* lower bit position of bitfield rx{b}_hi_thresh[d:0] */</div><div class='add'>+#define HW_ATL_RPB_RXBHI_THRESH_SHIFT 16</div><div class='add'>+/* width of bitfield rx{b}_hi_thresh[d:0] */</div><div class='add'>+#define HW_ATL_RPB_RXBHI_THRESH_WIDTH 14</div><div class='add'>+/* default value of bitfield rx{b}_hi_thresh[d:0] */</div><div class='add'>+#define HW_ATL_RPB_RXBHI_THRESH_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx rx{b}_lo_thresh[d:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "rx{b}_lo_thresh[d:0]".</div><div class='add'>+ * parameter: buffer {b} | stride size 0x10 | range [0, 7]</div><div class='add'>+ * port="pif_rpb_rx0_lo_thresh_i[13:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield rx{b}_lo_thresh[d:0] */</div><div class='add'>+#define HW_ATL_RPB_RXBLO_THRESH_ADR(buffer) (0x00005714 + (buffer) * 0x10)</div><div class='add'>+/* bitmask for bitfield rx{b}_lo_thresh[d:0] */</div><div class='add'>+#define HW_ATL_RPB_RXBLO_THRESH_MSK 0x00003fff</div><div class='add'>+/* inverted bitmask for bitfield rx{b}_lo_thresh[d:0] */</div><div class='add'>+#define HW_ATL_RPB_RXBLO_THRESH_MSKN 0xffffc000</div><div class='add'>+/* lower bit position of bitfield rx{b}_lo_thresh[d:0] */</div><div class='add'>+#define HW_ATL_RPB_RXBLO_THRESH_SHIFT 0</div><div class='add'>+/* width of bitfield rx{b}_lo_thresh[d:0] */</div><div class='add'>+#define HW_ATL_RPB_RXBLO_THRESH_WIDTH 14</div><div class='add'>+/* default value of bitfield rx{b}_lo_thresh[d:0] */</div><div class='add'>+#define HW_ATL_RPB_RXBLO_THRESH_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx rx_fc_mode[1:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "rx_fc_mode[1:0]".</div><div class='add'>+ * port="pif_rpb_rx_fc_mode_i[1:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield rx_fc_mode[1:0] */</div><div class='add'>+#define HW_ATL_RPB_RX_FC_MODE_ADR 0x00005700</div><div class='add'>+/* bitmask for bitfield rx_fc_mode[1:0] */</div><div class='add'>+#define HW_ATL_RPB_RX_FC_MODE_MSK 0x00000030</div><div class='add'>+/* inverted bitmask for bitfield rx_fc_mode[1:0] */</div><div class='add'>+#define HW_ATL_RPB_RX_FC_MODE_MSKN 0xffffffcf</div><div class='add'>+/* lower bit position of bitfield rx_fc_mode[1:0] */</div><div class='add'>+#define HW_ATL_RPB_RX_FC_MODE_SHIFT 4</div><div class='add'>+/* width of bitfield rx_fc_mode[1:0] */</div><div class='add'>+#define HW_ATL_RPB_RX_FC_MODE_WIDTH 2</div><div class='add'>+/* default value of bitfield rx_fc_mode[1:0] */</div><div class='add'>+#define HW_ATL_RPB_RX_FC_MODE_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx rx{b}_buf_size[8:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "rx{b}_buf_size[8:0]".</div><div class='add'>+ * parameter: buffer {b} | stride size 0x10 | range [0, 7]</div><div class='add'>+ * port="pif_rpb_rx0_buf_size_i[8:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield rx{b}_buf_size[8:0] */</div><div class='add'>+#define HW_ATL_RPB_RXBBUF_SIZE_ADR(buffer) (0x00005710 + (buffer) * 0x10)</div><div class='add'>+/* bitmask for bitfield rx{b}_buf_size[8:0] */</div><div class='add'>+#define HW_ATL_RPB_RXBBUF_SIZE_MSK 0x000001ff</div><div class='add'>+/* inverted bitmask for bitfield rx{b}_buf_size[8:0] */</div><div class='add'>+#define HW_ATL_RPB_RXBBUF_SIZE_MSKN 0xfffffe00</div><div class='add'>+/* lower bit position of bitfield rx{b}_buf_size[8:0] */</div><div class='add'>+#define HW_ATL_RPB_RXBBUF_SIZE_SHIFT 0</div><div class='add'>+/* width of bitfield rx{b}_buf_size[8:0] */</div><div class='add'>+#define HW_ATL_RPB_RXBBUF_SIZE_WIDTH 9</div><div class='add'>+/* default value of bitfield rx{b}_buf_size[8:0] */</div><div class='add'>+#define HW_ATL_RPB_RXBBUF_SIZE_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx rx{b}_xoff_en bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "rx{b}_xoff_en".</div><div class='add'>+ * parameter: buffer {b} | stride size 0x10 | range [0, 7]</div><div class='add'>+ * port="pif_rpb_rx_xoff_en_i[0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield rx{b}_xoff_en */</div><div class='add'>+#define HW_ATL_RPB_RXBXOFF_EN_ADR(buffer) (0x00005714 + (buffer) * 0x10)</div><div class='add'>+/* bitmask for bitfield rx{b}_xoff_en */</div><div class='add'>+#define HW_ATL_RPB_RXBXOFF_EN_MSK 0x80000000</div><div class='add'>+/* inverted bitmask for bitfield rx{b}_xoff_en */</div><div class='add'>+#define HW_ATL_RPB_RXBXOFF_EN_MSKN 0x7fffffff</div><div class='add'>+/* lower bit position of bitfield rx{b}_xoff_en */</div><div class='add'>+#define HW_ATL_RPB_RXBXOFF_EN_SHIFT 31</div><div class='add'>+/* width of bitfield rx{b}_xoff_en */</div><div class='add'>+#define HW_ATL_RPB_RXBXOFF_EN_WIDTH 1</div><div class='add'>+/* default value of bitfield rx{b}_xoff_en */</div><div class='add'>+#define HW_ATL_RPB_RXBXOFF_EN_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx l2_bc_thresh[f:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "l2_bc_thresh[f:0]".</div><div class='add'>+ * port="pif_rpf_l2_bc_thresh_i[15:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield l2_bc_thresh[f:0] */</div><div class='add'>+#define HW_ATL_RPFL2BC_THRESH_ADR 0x00005100</div><div class='add'>+/* bitmask for bitfield l2_bc_thresh[f:0] */</div><div class='add'>+#define HW_ATL_RPFL2BC_THRESH_MSK 0xffff0000</div><div class='add'>+/* inverted bitmask for bitfield l2_bc_thresh[f:0] */</div><div class='add'>+#define HW_ATL_RPFL2BC_THRESH_MSKN 0x0000ffff</div><div class='add'>+/* lower bit position of bitfield l2_bc_thresh[f:0] */</div><div class='add'>+#define HW_ATL_RPFL2BC_THRESH_SHIFT 16</div><div class='add'>+/* width of bitfield l2_bc_thresh[f:0] */</div><div class='add'>+#define HW_ATL_RPFL2BC_THRESH_WIDTH 16</div><div class='add'>+/* default value of bitfield l2_bc_thresh[f:0] */</div><div class='add'>+#define HW_ATL_RPFL2BC_THRESH_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx l2_bc_en bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "l2_bc_en".</div><div class='add'>+ * port="pif_rpf_l2_bc_en_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield l2_bc_en */</div><div class='add'>+#define HW_ATL_RPFL2BC_EN_ADR 0x00005100</div><div class='add'>+/* bitmask for bitfield l2_bc_en */</div><div class='add'>+#define HW_ATL_RPFL2BC_EN_MSK 0x00000001</div><div class='add'>+/* inverted bitmask for bitfield l2_bc_en */</div><div class='add'>+#define HW_ATL_RPFL2BC_EN_MSKN 0xfffffffe</div><div class='add'>+/* lower bit position of bitfield l2_bc_en */</div><div class='add'>+#define HW_ATL_RPFL2BC_EN_SHIFT 0</div><div class='add'>+/* width of bitfield l2_bc_en */</div><div class='add'>+#define HW_ATL_RPFL2BC_EN_WIDTH 1</div><div class='add'>+/* default value of bitfield l2_bc_en */</div><div class='add'>+#define HW_ATL_RPFL2BC_EN_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx l2_bc_act[2:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "l2_bc_act[2:0]".</div><div class='add'>+ * port="pif_rpf_l2_bc_act_i[2:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield l2_bc_act[2:0] */</div><div class='add'>+#define HW_ATL_RPFL2BC_ACT_ADR 0x00005100</div><div class='add'>+/* bitmask for bitfield l2_bc_act[2:0] */</div><div class='add'>+#define HW_ATL_RPFL2BC_ACT_MSK 0x00007000</div><div class='add'>+/* inverted bitmask for bitfield l2_bc_act[2:0] */</div><div class='add'>+#define HW_ATL_RPFL2BC_ACT_MSKN 0xffff8fff</div><div class='add'>+/* lower bit position of bitfield l2_bc_act[2:0] */</div><div class='add'>+#define HW_ATL_RPFL2BC_ACT_SHIFT 12</div><div class='add'>+/* width of bitfield l2_bc_act[2:0] */</div><div class='add'>+#define HW_ATL_RPFL2BC_ACT_WIDTH 3</div><div class='add'>+/* default value of bitfield l2_bc_act[2:0] */</div><div class='add'>+#define HW_ATL_RPFL2BC_ACT_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx l2_mc_en{f} bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "l2_mc_en{f}".</div><div class='add'>+ * parameter: filter {f} | stride size 0x4 | range [0, 7]</div><div class='add'>+ * port="pif_rpf_l2_mc_en_i[0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield l2_mc_en{f} */</div><div class='add'>+#define HW_ATL_RPFL2MC_ENF_ADR(filter) (0x00005250 + (filter) * 0x4)</div><div class='add'>+/* bitmask for bitfield l2_mc_en{f} */</div><div class='add'>+#define HW_ATL_RPFL2MC_ENF_MSK 0x80000000</div><div class='add'>+/* inverted bitmask for bitfield l2_mc_en{f} */</div><div class='add'>+#define HW_ATL_RPFL2MC_ENF_MSKN 0x7fffffff</div><div class='add'>+/* lower bit position of bitfield l2_mc_en{f} */</div><div class='add'>+#define HW_ATL_RPFL2MC_ENF_SHIFT 31</div><div class='add'>+/* width of bitfield l2_mc_en{f} */</div><div class='add'>+#define HW_ATL_RPFL2MC_ENF_WIDTH 1</div><div class='add'>+/* default value of bitfield l2_mc_en{f} */</div><div class='add'>+#define HW_ATL_RPFL2MC_ENF_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx l2_promis_mode bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "l2_promis_mode".</div><div class='add'>+ * port="pif_rpf_l2_promis_mode_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield l2_promis_mode */</div><div class='add'>+#define HW_ATL_RPFL2PROMIS_MODE_ADR 0x00005100</div><div class='add'>+/* bitmask for bitfield l2_promis_mode */</div><div class='add'>+#define HW_ATL_RPFL2PROMIS_MODE_MSK 0x00000008</div><div class='add'>+/* inverted bitmask for bitfield l2_promis_mode */</div><div class='add'>+#define HW_ATL_RPFL2PROMIS_MODE_MSKN 0xfffffff7</div><div class='add'>+/* lower bit position of bitfield l2_promis_mode */</div><div class='add'>+#define HW_ATL_RPFL2PROMIS_MODE_SHIFT 3</div><div class='add'>+/* width of bitfield l2_promis_mode */</div><div class='add'>+#define HW_ATL_RPFL2PROMIS_MODE_WIDTH 1</div><div class='add'>+/* default value of bitfield l2_promis_mode */</div><div class='add'>+#define HW_ATL_RPFL2PROMIS_MODE_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx l2_uc_act{f}[2:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "l2_uc_act{f}[2:0]".</div><div class='add'>+ * parameter: filter {f} | stride size 0x8 | range [0, 37]</div><div class='add'>+ * port="pif_rpf_l2_uc_act0_i[2:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield l2_uc_act{f}[2:0] */</div><div class='add'>+#define HW_ATL_RPFL2UC_ACTF_ADR(filter) (0x00005114 + (filter) * 0x8)</div><div class='add'>+/* bitmask for bitfield l2_uc_act{f}[2:0] */</div><div class='add'>+#define HW_ATL_RPFL2UC_ACTF_MSK 0x00070000</div><div class='add'>+/* inverted bitmask for bitfield l2_uc_act{f}[2:0] */</div><div class='add'>+#define HW_ATL_RPFL2UC_ACTF_MSKN 0xfff8ffff</div><div class='add'>+/* lower bit position of bitfield l2_uc_act{f}[2:0] */</div><div class='add'>+#define HW_ATL_RPFL2UC_ACTF_SHIFT 16</div><div class='add'>+/* width of bitfield l2_uc_act{f}[2:0] */</div><div class='add'>+#define HW_ATL_RPFL2UC_ACTF_WIDTH 3</div><div class='add'>+/* default value of bitfield l2_uc_act{f}[2:0] */</div><div class='add'>+#define HW_ATL_RPFL2UC_ACTF_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx l2_uc_en{f} bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "l2_uc_en{f}".</div><div class='add'>+ * parameter: filter {f} | stride size 0x8 | range [0, 37]</div><div class='add'>+ * port="pif_rpf_l2_uc_en_i[0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield l2_uc_en{f} */</div><div class='add'>+#define HW_ATL_RPFL2UC_ENF_ADR(filter) (0x00005114 + (filter) * 0x8)</div><div class='add'>+/* bitmask for bitfield l2_uc_en{f} */</div><div class='add'>+#define HW_ATL_RPFL2UC_ENF_MSK 0x80000000</div><div class='add'>+/* inverted bitmask for bitfield l2_uc_en{f} */</div><div class='add'>+#define HW_ATL_RPFL2UC_ENF_MSKN 0x7fffffff</div><div class='add'>+/* lower bit position of bitfield l2_uc_en{f} */</div><div class='add'>+#define HW_ATL_RPFL2UC_ENF_SHIFT 31</div><div class='add'>+/* width of bitfield l2_uc_en{f} */</div><div class='add'>+#define HW_ATL_RPFL2UC_ENF_WIDTH 1</div><div class='add'>+/* default value of bitfield l2_uc_en{f} */</div><div class='add'>+#define HW_ATL_RPFL2UC_ENF_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* register address for bitfield l2_uc_da{f}_lsw[1f:0] */</div><div class='add'>+#define HW_ATL_RPFL2UC_DAFLSW_ADR(filter) (0x00005110 + (filter) * 0x8)</div><div class='add'>+/* register address for bitfield l2_uc_da{f}_msw[f:0] */</div><div class='add'>+#define HW_ATL_RPFL2UC_DAFMSW_ADR(filter) (0x00005114 + (filter) * 0x8)</div><div class='add'>+/* bitmask for bitfield l2_uc_da{f}_msw[f:0] */</div><div class='add'>+#define HW_ATL_RPFL2UC_DAFMSW_MSK 0x0000ffff</div><div class='add'>+/* lower bit position of bitfield l2_uc_da{f}_msw[f:0] */</div><div class='add'>+#define HW_ATL_RPFL2UC_DAFMSW_SHIFT 0</div><div class='add'>+</div><div class='add'>+/* rx l2_mc_accept_all bitfield definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "l2_mc_accept_all".</div><div class='add'>+ * PORT="pif_rpf_l2_mc_all_accept_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield l2_mc_accept_all */</div><div class='add'>+#define HW_ATL_RPFL2MC_ACCEPT_ALL_ADR 0x00005270</div><div class='add'>+/* Bitmask for bitfield l2_mc_accept_all */</div><div class='add'>+#define HW_ATL_RPFL2MC_ACCEPT_ALL_MSK 0x00004000</div><div class='add'>+/* Inverted bitmask for bitfield l2_mc_accept_all */</div><div class='add'>+#define HW_ATL_RPFL2MC_ACCEPT_ALL_MSKN 0xFFFFBFFF</div><div class='add'>+/* Lower bit position of bitfield l2_mc_accept_all */</div><div class='add'>+#define HW_ATL_RPFL2MC_ACCEPT_ALL_SHIFT 14</div><div class='add'>+/* Width of bitfield l2_mc_accept_all */</div><div class='add'>+#define HW_ATL_RPFL2MC_ACCEPT_ALL_WIDTH 1</div><div class='add'>+/* Default value of bitfield l2_mc_accept_all */</div><div class='add'>+#define HW_ATL_RPFL2MC_ACCEPT_ALL_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* width of bitfield rx_tc_up{t}[2:0] */</div><div class='add'>+#define HW_ATL_RPF_RPB_RX_TC_UPT_WIDTH 3</div><div class='add'>+/* default value of bitfield rx_tc_up{t}[2:0] */</div><div class='add'>+#define HW_ATL_RPF_RPB_RX_TC_UPT_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx rss_key_addr[4:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "rss_key_addr[4:0]".</div><div class='add'>+ * port="pif_rpf_rss_key_addr_i[4:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield rss_key_addr[4:0] */</div><div class='add'>+#define HW_ATL_RPF_RSS_KEY_ADDR_ADR 0x000054d0</div><div class='add'>+/* bitmask for bitfield rss_key_addr[4:0] */</div><div class='add'>+#define HW_ATL_RPF_RSS_KEY_ADDR_MSK 0x0000001f</div><div class='add'>+/* inverted bitmask for bitfield rss_key_addr[4:0] */</div><div class='add'>+#define HW_ATL_RPF_RSS_KEY_ADDR_MSKN 0xffffffe0</div><div class='add'>+/* lower bit position of bitfield rss_key_addr[4:0] */</div><div class='add'>+#define HW_ATL_RPF_RSS_KEY_ADDR_SHIFT 0</div><div class='add'>+/* width of bitfield rss_key_addr[4:0] */</div><div class='add'>+#define HW_ATL_RPF_RSS_KEY_ADDR_WIDTH 5</div><div class='add'>+/* default value of bitfield rss_key_addr[4:0] */</div><div class='add'>+#define HW_ATL_RPF_RSS_KEY_ADDR_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx rss_key_wr_data[1f:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "rss_key_wr_data[1f:0]".</div><div class='add'>+ * port="pif_rpf_rss_key_wr_data_i[31:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield rss_key_wr_data[1f:0] */</div><div class='add'>+#define HW_ATL_RPF_RSS_KEY_WR_DATA_ADR 0x000054d4</div><div class='add'>+/* bitmask for bitfield rss_key_wr_data[1f:0] */</div><div class='add'>+#define HW_ATL_RPF_RSS_KEY_WR_DATA_MSK 0xffffffff</div><div class='add'>+/* inverted bitmask for bitfield rss_key_wr_data[1f:0] */</div><div class='add'>+#define HW_ATL_RPF_RSS_KEY_WR_DATA_MSKN 0x00000000</div><div class='add'>+/* lower bit position of bitfield rss_key_wr_data[1f:0] */</div><div class='add'>+#define HW_ATL_RPF_RSS_KEY_WR_DATA_SHIFT 0</div><div class='add'>+/* width of bitfield rss_key_wr_data[1f:0] */</div><div class='add'>+#define HW_ATL_RPF_RSS_KEY_WR_DATA_WIDTH 32</div><div class='add'>+/* default value of bitfield rss_key_wr_data[1f:0] */</div><div class='add'>+#define HW_ATL_RPF_RSS_KEY_WR_DATA_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx rss_key_wr_en_i bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "rss_key_wr_en_i".</div><div class='add'>+ * port="pif_rpf_rss_key_wr_en_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield rss_key_wr_en_i */</div><div class='add'>+#define HW_ATL_RPF_RSS_KEY_WR_ENI_ADR 0x000054d0</div><div class='add'>+/* bitmask for bitfield rss_key_wr_en_i */</div><div class='add'>+#define HW_ATL_RPF_RSS_KEY_WR_ENI_MSK 0x00000020</div><div class='add'>+/* inverted bitmask for bitfield rss_key_wr_en_i */</div><div class='add'>+#define HW_ATL_RPF_RSS_KEY_WR_ENI_MSKN 0xffffffdf</div><div class='add'>+/* lower bit position of bitfield rss_key_wr_en_i */</div><div class='add'>+#define HW_ATL_RPF_RSS_KEY_WR_ENI_SHIFT 5</div><div class='add'>+/* width of bitfield rss_key_wr_en_i */</div><div class='add'>+#define HW_ATL_RPF_RSS_KEY_WR_ENI_WIDTH 1</div><div class='add'>+/* default value of bitfield rss_key_wr_en_i */</div><div class='add'>+#define HW_ATL_RPF_RSS_KEY_WR_ENI_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx rss_redir_addr[3:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "rss_redir_addr[3:0]".</div><div class='add'>+ * port="pif_rpf_rss_redir_addr_i[3:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield rss_redir_addr[3:0] */</div><div class='add'>+#define HW_ATL_RPF_RSS_REDIR_ADDR_ADR 0x000054e0</div><div class='add'>+/* bitmask for bitfield rss_redir_addr[3:0] */</div><div class='add'>+#define HW_ATL_RPF_RSS_REDIR_ADDR_MSK 0x0000000f</div><div class='add'>+/* inverted bitmask for bitfield rss_redir_addr[3:0] */</div><div class='add'>+#define HW_ATL_RPF_RSS_REDIR_ADDR_MSKN 0xfffffff0</div><div class='add'>+/* lower bit position of bitfield rss_redir_addr[3:0] */</div><div class='add'>+#define HW_ATL_RPF_RSS_REDIR_ADDR_SHIFT 0</div><div class='add'>+/* width of bitfield rss_redir_addr[3:0] */</div><div class='add'>+#define HW_ATL_RPF_RSS_REDIR_ADDR_WIDTH 4</div><div class='add'>+/* default value of bitfield rss_redir_addr[3:0] */</div><div class='add'>+#define HW_ATL_RPF_RSS_REDIR_ADDR_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx rss_redir_wr_data[f:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "rss_redir_wr_data[f:0]".</div><div class='add'>+ * port="pif_rpf_rss_redir_wr_data_i[15:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield rss_redir_wr_data[f:0] */</div><div class='add'>+#define HW_ATL_RPF_RSS_REDIR_WR_DATA_ADR 0x000054e4</div><div class='add'>+/* bitmask for bitfield rss_redir_wr_data[f:0] */</div><div class='add'>+#define HW_ATL_RPF_RSS_REDIR_WR_DATA_MSK 0x0000ffff</div><div class='add'>+/* inverted bitmask for bitfield rss_redir_wr_data[f:0] */</div><div class='add'>+#define HW_ATL_RPF_RSS_REDIR_WR_DATA_MSKN 0xffff0000</div><div class='add'>+/* lower bit position of bitfield rss_redir_wr_data[f:0] */</div><div class='add'>+#define HW_ATL_RPF_RSS_REDIR_WR_DATA_SHIFT 0</div><div class='add'>+/* width of bitfield rss_redir_wr_data[f:0] */</div><div class='add'>+#define HW_ATL_RPF_RSS_REDIR_WR_DATA_WIDTH 16</div><div class='add'>+/* default value of bitfield rss_redir_wr_data[f:0] */</div><div class='add'>+#define HW_ATL_RPF_RSS_REDIR_WR_DATA_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx rss_redir_wr_en_i bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "rss_redir_wr_en_i".</div><div class='add'>+ * port="pif_rpf_rss_redir_wr_en_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield rss_redir_wr_en_i */</div><div class='add'>+#define HW_ATL_RPF_RSS_REDIR_WR_ENI_ADR 0x000054e0</div><div class='add'>+/* bitmask for bitfield rss_redir_wr_en_i */</div><div class='add'>+#define HW_ATL_RPF_RSS_REDIR_WR_ENI_MSK 0x00000010</div><div class='add'>+/* inverted bitmask for bitfield rss_redir_wr_en_i */</div><div class='add'>+#define HW_ATL_RPF_RSS_REDIR_WR_ENI_MSKN 0xffffffef</div><div class='add'>+/* lower bit position of bitfield rss_redir_wr_en_i */</div><div class='add'>+#define HW_ATL_RPF_RSS_REDIR_WR_ENI_SHIFT 4</div><div class='add'>+/* width of bitfield rss_redir_wr_en_i */</div><div class='add'>+#define HW_ATL_RPF_RSS_REDIR_WR_ENI_WIDTH 1</div><div class='add'>+/* default value of bitfield rss_redir_wr_en_i */</div><div class='add'>+#define HW_ATL_RPF_RSS_REDIR_WR_ENI_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx tpo_rpf_sys_loopback bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "tpo_rpf_sys_loopback".</div><div class='add'>+ * port="pif_rpf_tpo_pkt_sys_lbk_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield tpo_rpf_sys_loopback */</div><div class='add'>+#define HW_ATL_RPF_TPO_RPF_SYS_LBK_ADR 0x00005000</div><div class='add'>+/* bitmask for bitfield tpo_rpf_sys_loopback */</div><div class='add'>+#define HW_ATL_RPF_TPO_RPF_SYS_LBK_MSK 0x00000100</div><div class='add'>+/* inverted bitmask for bitfield tpo_rpf_sys_loopback */</div><div class='add'>+#define HW_ATL_RPF_TPO_RPF_SYS_LBK_MSKN 0xfffffeff</div><div class='add'>+/* lower bit position of bitfield tpo_rpf_sys_loopback */</div><div class='add'>+#define HW_ATL_RPF_TPO_RPF_SYS_LBK_SHIFT 8</div><div class='add'>+/* width of bitfield tpo_rpf_sys_loopback */</div><div class='add'>+#define HW_ATL_RPF_TPO_RPF_SYS_LBK_WIDTH 1</div><div class='add'>+/* default value of bitfield tpo_rpf_sys_loopback */</div><div class='add'>+#define HW_ATL_RPF_TPO_RPF_SYS_LBK_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx vl_inner_tpid[f:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "vl_inner_tpid[f:0]".</div><div class='add'>+ * port="pif_rpf_vl_inner_tpid_i[15:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield vl_inner_tpid[f:0] */</div><div class='add'>+#define HW_ATL_RPF_VL_INNER_TPID_ADR 0x00005284</div><div class='add'>+/* bitmask for bitfield vl_inner_tpid[f:0] */</div><div class='add'>+#define HW_ATL_RPF_VL_INNER_TPID_MSK 0x0000ffff</div><div class='add'>+/* inverted bitmask for bitfield vl_inner_tpid[f:0] */</div><div class='add'>+#define HW_ATL_RPF_VL_INNER_TPID_MSKN 0xffff0000</div><div class='add'>+/* lower bit position of bitfield vl_inner_tpid[f:0] */</div><div class='add'>+#define HW_ATL_RPF_VL_INNER_TPID_SHIFT 0</div><div class='add'>+/* width of bitfield vl_inner_tpid[f:0] */</div><div class='add'>+#define HW_ATL_RPF_VL_INNER_TPID_WIDTH 16</div><div class='add'>+/* default value of bitfield vl_inner_tpid[f:0] */</div><div class='add'>+#define HW_ATL_RPF_VL_INNER_TPID_DEFAULT 0x8100</div><div class='add'>+</div><div class='add'>+/* rx vl_outer_tpid[f:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "vl_outer_tpid[f:0]".</div><div class='add'>+ * port="pif_rpf_vl_outer_tpid_i[15:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield vl_outer_tpid[f:0] */</div><div class='add'>+#define HW_ATL_RPF_VL_OUTER_TPID_ADR 0x00005284</div><div class='add'>+/* bitmask for bitfield vl_outer_tpid[f:0] */</div><div class='add'>+#define HW_ATL_RPF_VL_OUTER_TPID_MSK 0xffff0000</div><div class='add'>+/* inverted bitmask for bitfield vl_outer_tpid[f:0] */</div><div class='add'>+#define HW_ATL_RPF_VL_OUTER_TPID_MSKN 0x0000ffff</div><div class='add'>+/* lower bit position of bitfield vl_outer_tpid[f:0] */</div><div class='add'>+#define HW_ATL_RPF_VL_OUTER_TPID_SHIFT 16</div><div class='add'>+/* width of bitfield vl_outer_tpid[f:0] */</div><div class='add'>+#define HW_ATL_RPF_VL_OUTER_TPID_WIDTH 16</div><div class='add'>+/* default value of bitfield vl_outer_tpid[f:0] */</div><div class='add'>+#define HW_ATL_RPF_VL_OUTER_TPID_DEFAULT 0x88a8</div><div class='add'>+</div><div class='add'>+/* rx vl_promis_mode bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "vl_promis_mode".</div><div class='add'>+ * port="pif_rpf_vl_promis_mode_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield vl_promis_mode */</div><div class='add'>+#define HW_ATL_RPF_VL_PROMIS_MODE_ADR 0x00005280</div><div class='add'>+/* bitmask for bitfield vl_promis_mode */</div><div class='add'>+#define HW_ATL_RPF_VL_PROMIS_MODE_MSK 0x00000002</div><div class='add'>+/* inverted bitmask for bitfield vl_promis_mode */</div><div class='add'>+#define HW_ATL_RPF_VL_PROMIS_MODE_MSKN 0xfffffffd</div><div class='add'>+/* lower bit position of bitfield vl_promis_mode */</div><div class='add'>+#define HW_ATL_RPF_VL_PROMIS_MODE_SHIFT 1</div><div class='add'>+/* width of bitfield vl_promis_mode */</div><div class='add'>+#define HW_ATL_RPF_VL_PROMIS_MODE_WIDTH 1</div><div class='add'>+/* default value of bitfield vl_promis_mode */</div><div class='add'>+#define HW_ATL_RPF_VL_PROMIS_MODE_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* RX vl_accept_untagged_mode Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "vl_accept_untagged_mode".</div><div class='add'>+ * PORT="pif_rpf_vl_accept_untagged_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield vl_accept_untagged_mode */</div><div class='add'>+#define HW_ATL_RPF_VL_ACCEPT_UNTAGGED_MODE_ADR 0x00005280</div><div class='add'>+/* Bitmask for bitfield vl_accept_untagged_mode */</div><div class='add'>+#define HW_ATL_RPF_VL_ACCEPT_UNTAGGED_MODE_MSK 0x00000004</div><div class='add'>+/* Inverted bitmask for bitfield vl_accept_untagged_mode */</div><div class='add'>+#define HW_ATL_RPF_VL_ACCEPT_UNTAGGED_MODE_MSKN 0xFFFFFFFB</div><div class='add'>+/* Lower bit position of bitfield vl_accept_untagged_mode */</div><div class='add'>+#define HW_ATL_RPF_VL_ACCEPT_UNTAGGED_MODE_SHIFT 2</div><div class='add'>+/* Width of bitfield vl_accept_untagged_mode */</div><div class='add'>+#define HW_ATL_RPF_VL_ACCEPT_UNTAGGED_MODE_WIDTH 1</div><div class='add'>+/* Default value of bitfield vl_accept_untagged_mode */</div><div class='add'>+#define HW_ATL_RPF_VL_ACCEPT_UNTAGGED_MODE_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rX vl_untagged_act[2:0] Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "vl_untagged_act[2:0]".</div><div class='add'>+ * PORT="pif_rpf_vl_untagged_act_i[2:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield vl_untagged_act[2:0] */</div><div class='add'>+#define HW_ATL_RPF_VL_UNTAGGED_ACT_ADR 0x00005280</div><div class='add'>+/* Bitmask for bitfield vl_untagged_act[2:0] */</div><div class='add'>+#define HW_ATL_RPF_VL_UNTAGGED_ACT_MSK 0x00000038</div><div class='add'>+/* Inverted bitmask for bitfield vl_untagged_act[2:0] */</div><div class='add'>+#define HW_ATL_RPF_VL_UNTAGGED_ACT_MSKN 0xFFFFFFC7</div><div class='add'>+/* Lower bit position of bitfield vl_untagged_act[2:0] */</div><div class='add'>+#define HW_ATL_RPF_VL_UNTAGGED_ACT_SHIFT 3</div><div class='add'>+/* Width of bitfield vl_untagged_act[2:0] */</div><div class='add'>+#define HW_ATL_RPF_VL_UNTAGGED_ACT_WIDTH 3</div><div class='add'>+/* Default value of bitfield vl_untagged_act[2:0] */</div><div class='add'>+#define HW_ATL_RPF_VL_UNTAGGED_ACT_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* RX vl_en{F} Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "vl_en{F}".</div><div class='add'>+ * Parameter: filter {F} | stride size 0x4 | range [0, 15]</div><div class='add'>+ * PORT="pif_rpf_vl_en_i[0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield vl_en{F} */</div><div class='add'>+#define HW_ATL_RPF_VL_EN_F_ADR(filter) (0x00005290 + (filter) * 0x4)</div><div class='add'>+/* Bitmask for bitfield vl_en{F} */</div><div class='add'>+#define HW_ATL_RPF_VL_EN_F_MSK 0x80000000</div><div class='add'>+/* Inverted bitmask for bitfield vl_en{F} */</div><div class='add'>+#define HW_ATL_RPF_VL_EN_F_MSKN 0x7FFFFFFF</div><div class='add'>+/* Lower bit position of bitfield vl_en{F} */</div><div class='add'>+#define HW_ATL_RPF_VL_EN_F_SHIFT 31</div><div class='add'>+/* Width of bitfield vl_en{F} */</div><div class='add'>+#define HW_ATL_RPF_VL_EN_F_WIDTH 1</div><div class='add'>+/* Default value of bitfield vl_en{F} */</div><div class='add'>+#define HW_ATL_RPF_VL_EN_F_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* RX vl_act{F}[2:0] Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "vl_act{F}[2:0]".</div><div class='add'>+ * Parameter: filter {F} | stride size 0x4 | range [0, 15]</div><div class='add'>+ * PORT="pif_rpf_vl_act0_i[2:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield vl_act{F}[2:0] */</div><div class='add'>+#define HW_ATL_RPF_VL_ACT_F_ADR(filter) (0x00005290 + (filter) * 0x4)</div><div class='add'>+/* Bitmask for bitfield vl_act{F}[2:0] */</div><div class='add'>+#define HW_ATL_RPF_VL_ACT_F_MSK 0x00070000</div><div class='add'>+/* Inverted bitmask for bitfield vl_act{F}[2:0] */</div><div class='add'>+#define HW_ATL_RPF_VL_ACT_F_MSKN 0xFFF8FFFF</div><div class='add'>+/* Lower bit position of bitfield vl_act{F}[2:0] */</div><div class='add'>+#define HW_ATL_RPF_VL_ACT_F_SHIFT 16</div><div class='add'>+/* Width of bitfield vl_act{F}[2:0] */</div><div class='add'>+#define HW_ATL_RPF_VL_ACT_F_WIDTH 3</div><div class='add'>+/* Default value of bitfield vl_act{F}[2:0] */</div><div class='add'>+#define HW_ATL_RPF_VL_ACT_F_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* RX vl_id{F}[B:0] Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "vl_id{F}[B:0]".</div><div class='add'>+ * Parameter: filter {F} | stride size 0x4 | range [0, 15]</div><div class='add'>+ * PORT="pif_rpf_vl_id0_i[11:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield vl_id{F}[B:0] */</div><div class='add'>+#define HW_ATL_RPF_VL_ID_F_ADR(filter) (0x00005290 + (filter) * 0x4)</div><div class='add'>+/* Bitmask for bitfield vl_id{F}[B:0] */</div><div class='add'>+#define HW_ATL_RPF_VL_ID_F_MSK 0x00000FFF</div><div class='add'>+/* Inverted bitmask for bitfield vl_id{F}[B:0] */</div><div class='add'>+#define HW_ATL_RPF_VL_ID_F_MSKN 0xFFFFF000</div><div class='add'>+/* Lower bit position of bitfield vl_id{F}[B:0] */</div><div class='add'>+#define HW_ATL_RPF_VL_ID_F_SHIFT 0</div><div class='add'>+/* Width of bitfield vl_id{F}[B:0] */</div><div class='add'>+#define HW_ATL_RPF_VL_ID_F_WIDTH 12</div><div class='add'>+/* Default value of bitfield vl_id{F}[B:0] */</div><div class='add'>+#define HW_ATL_RPF_VL_ID_F_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* RX vl_rxq_en{F} Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "vl_rxq{F}".</div><div class='add'>+ * Parameter: filter {F} | stride size 0x4 | range [0, 15]</div><div class='add'>+ * PORT="pif_rpf_vl_rxq_en_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield vl_rxq_en{F} */</div><div class='add'>+#define HW_ATL_RPF_VL_RXQ_EN_F_ADR(filter) (0x00005290 + (filter) * 0x4)</div><div class='add'>+/* Bitmask for bitfield vl_rxq_en{F} */</div><div class='add'>+#define HW_ATL_RPF_VL_RXQ_EN_F_MSK 0x10000000</div><div class='add'>+/* Inverted bitmask for bitfield vl_rxq_en{F}[ */</div><div class='add'>+#define HW_ATL_RPF_VL_RXQ_EN_F_MSKN 0xEFFFFFFF</div><div class='add'>+/* Lower bit position of bitfield vl_rxq_en{F} */</div><div class='add'>+#define HW_ATL_RPF_VL_RXQ_EN_F_SHIFT 28</div><div class='add'>+/* Width of bitfield vl_rxq_en{F} */</div><div class='add'>+#define HW_ATL_RPF_VL_RXQ_EN_F_WIDTH 1</div><div class='add'>+/* Default value of bitfield vl_rxq_en{F} */</div><div class='add'>+#define HW_ATL_RPF_VL_RXQ_EN_F_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* RX vl_rxq{F}[4:0] Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "vl_rxq{F}[4:0]".</div><div class='add'>+ * Parameter: filter {F} | stride size 0x4 | range [0, 15]</div><div class='add'>+ * PORT="pif_rpf_vl_rxq0_i[4:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield vl_rxq{F}[4:0] */</div><div class='add'>+#define HW_ATL_RPF_VL_RXQ_F_ADR(filter) (0x00005290 + (filter) * 0x4)</div><div class='add'>+/* Bitmask for bitfield vl_rxq{F}[4:0] */</div><div class='add'>+#define HW_ATL_RPF_VL_RXQ_F_MSK 0x01F00000</div><div class='add'>+/* Inverted bitmask for bitfield vl_rxq{F}[4:0] */</div><div class='add'>+#define HW_ATL_RPF_VL_RXQ_F_MSKN 0xFE0FFFFF</div><div class='add'>+/* Lower bit position of bitfield vl_rxq{F}[4:0] */</div><div class='add'>+#define HW_ATL_RPF_VL_RXQ_F_SHIFT 20</div><div class='add'>+/* Width of bitfield vl_rxw{F}[4:0] */</div><div class='add'>+#define HW_ATL_RPF_VL_RXQ_F_WIDTH 5</div><div class='add'>+/* Default value of bitfield vl_rxq{F}[4:0] */</div><div class='add'>+#define HW_ATL_RPF_VL_RXQ_F_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx et_en{f} bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "et_en{f}".</div><div class='add'>+ * parameter: filter {f} | stride size 0x4 | range [0, 15]</div><div class='add'>+ * port="pif_rpf_et_en_i[0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield et_en{f} */</div><div class='add'>+#define HW_ATL_RPF_ET_ENF_ADR(filter) (0x00005300 + (filter) * 0x4)</div><div class='add'>+/* bitmask for bitfield et_en{f} */</div><div class='add'>+#define HW_ATL_RPF_ET_ENF_MSK 0x80000000</div><div class='add'>+/* inverted bitmask for bitfield et_en{f} */</div><div class='add'>+#define HW_ATL_RPF_ET_ENF_MSKN 0x7fffffff</div><div class='add'>+/* lower bit position of bitfield et_en{f} */</div><div class='add'>+#define HW_ATL_RPF_ET_ENF_SHIFT 31</div><div class='add'>+/* width of bitfield et_en{f} */</div><div class='add'>+#define HW_ATL_RPF_ET_ENF_WIDTH 1</div><div class='add'>+/* default value of bitfield et_en{f} */</div><div class='add'>+#define HW_ATL_RPF_ET_ENF_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx et_up{f}_en bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "et_up{f}_en".</div><div class='add'>+ * parameter: filter {f} | stride size 0x4 | range [0, 15]</div><div class='add'>+ * port="pif_rpf_et_up_en_i[0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield et_up{f}_en */</div><div class='add'>+#define HW_ATL_RPF_ET_UPFEN_ADR(filter) (0x00005300 + (filter) * 0x4)</div><div class='add'>+/* bitmask for bitfield et_up{f}_en */</div><div class='add'>+#define HW_ATL_RPF_ET_UPFEN_MSK 0x40000000</div><div class='add'>+/* inverted bitmask for bitfield et_up{f}_en */</div><div class='add'>+#define HW_ATL_RPF_ET_UPFEN_MSKN 0xbfffffff</div><div class='add'>+/* lower bit position of bitfield et_up{f}_en */</div><div class='add'>+#define HW_ATL_RPF_ET_UPFEN_SHIFT 30</div><div class='add'>+/* width of bitfield et_up{f}_en */</div><div class='add'>+#define HW_ATL_RPF_ET_UPFEN_WIDTH 1</div><div class='add'>+/* default value of bitfield et_up{f}_en */</div><div class='add'>+#define HW_ATL_RPF_ET_UPFEN_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx et_rxq{f}_en bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "et_rxq{f}_en".</div><div class='add'>+ * parameter: filter {f} | stride size 0x4 | range [0, 15]</div><div class='add'>+ * port="pif_rpf_et_rxq_en_i[0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield et_rxq{f}_en */</div><div class='add'>+#define HW_ATL_RPF_ET_RXQFEN_ADR(filter) (0x00005300 + (filter) * 0x4)</div><div class='add'>+/* bitmask for bitfield et_rxq{f}_en */</div><div class='add'>+#define HW_ATL_RPF_ET_RXQFEN_MSK 0x20000000</div><div class='add'>+/* inverted bitmask for bitfield et_rxq{f}_en */</div><div class='add'>+#define HW_ATL_RPF_ET_RXQFEN_MSKN 0xdfffffff</div><div class='add'>+/* lower bit position of bitfield et_rxq{f}_en */</div><div class='add'>+#define HW_ATL_RPF_ET_RXQFEN_SHIFT 29</div><div class='add'>+/* width of bitfield et_rxq{f}_en */</div><div class='add'>+#define HW_ATL_RPF_ET_RXQFEN_WIDTH 1</div><div class='add'>+/* default value of bitfield et_rxq{f}_en */</div><div class='add'>+#define HW_ATL_RPF_ET_RXQFEN_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx et_up{f}[2:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "et_up{f}[2:0]".</div><div class='add'>+ * parameter: filter {f} | stride size 0x4 | range [0, 15]</div><div class='add'>+ * port="pif_rpf_et_up0_i[2:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield et_up{f}[2:0] */</div><div class='add'>+#define HW_ATL_RPF_ET_UPF_ADR(filter) (0x00005300 + (filter) * 0x4)</div><div class='add'>+/* bitmask for bitfield et_up{f}[2:0] */</div><div class='add'>+#define HW_ATL_RPF_ET_UPF_MSK 0x1c000000</div><div class='add'>+/* inverted bitmask for bitfield et_up{f}[2:0] */</div><div class='add'>+#define HW_ATL_RPF_ET_UPF_MSKN 0xe3ffffff</div><div class='add'>+/* lower bit position of bitfield et_up{f}[2:0] */</div><div class='add'>+#define HW_ATL_RPF_ET_UPF_SHIFT 26</div><div class='add'>+/* width of bitfield et_up{f}[2:0] */</div><div class='add'>+#define HW_ATL_RPF_ET_UPF_WIDTH 3</div><div class='add'>+/* default value of bitfield et_up{f}[2:0] */</div><div class='add'>+#define HW_ATL_RPF_ET_UPF_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx et_rxq{f}[4:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "et_rxq{f}[4:0]".</div><div class='add'>+ * parameter: filter {f} | stride size 0x4 | range [0, 15]</div><div class='add'>+ * port="pif_rpf_et_rxq0_i[4:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield et_rxq{f}[4:0] */</div><div class='add'>+#define HW_ATL_RPF_ET_RXQF_ADR(filter) (0x00005300 + (filter) * 0x4)</div><div class='add'>+/* bitmask for bitfield et_rxq{f}[4:0] */</div><div class='add'>+#define HW_ATL_RPF_ET_RXQF_MSK 0x01f00000</div><div class='add'>+/* inverted bitmask for bitfield et_rxq{f}[4:0] */</div><div class='add'>+#define HW_ATL_RPF_ET_RXQF_MSKN 0xfe0fffff</div><div class='add'>+/* lower bit position of bitfield et_rxq{f}[4:0] */</div><div class='add'>+#define HW_ATL_RPF_ET_RXQF_SHIFT 20</div><div class='add'>+/* width of bitfield et_rxq{f}[4:0] */</div><div class='add'>+#define HW_ATL_RPF_ET_RXQF_WIDTH 5</div><div class='add'>+/* default value of bitfield et_rxq{f}[4:0] */</div><div class='add'>+#define HW_ATL_RPF_ET_RXQF_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx et_mng_rxq{f} bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "et_mng_rxq{f}".</div><div class='add'>+ * parameter: filter {f} | stride size 0x4 | range [0, 15]</div><div class='add'>+ * port="pif_rpf_et_mng_rxq_i[0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield et_mng_rxq{f} */</div><div class='add'>+#define HW_ATL_RPF_ET_MNG_RXQF_ADR(filter) (0x00005300 + (filter) * 0x4)</div><div class='add'>+/* bitmask for bitfield et_mng_rxq{f} */</div><div class='add'>+#define HW_ATL_RPF_ET_MNG_RXQF_MSK 0x00080000</div><div class='add'>+/* inverted bitmask for bitfield et_mng_rxq{f} */</div><div class='add'>+#define HW_ATL_RPF_ET_MNG_RXQF_MSKN 0xfff7ffff</div><div class='add'>+/* lower bit position of bitfield et_mng_rxq{f} */</div><div class='add'>+#define HW_ATL_RPF_ET_MNG_RXQF_SHIFT 19</div><div class='add'>+/* width of bitfield et_mng_rxq{f} */</div><div class='add'>+#define HW_ATL_RPF_ET_MNG_RXQF_WIDTH 1</div><div class='add'>+/* default value of bitfield et_mng_rxq{f} */</div><div class='add'>+#define HW_ATL_RPF_ET_MNG_RXQF_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx et_act{f}[2:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "et_act{f}[2:0]".</div><div class='add'>+ * parameter: filter {f} | stride size 0x4 | range [0, 15]</div><div class='add'>+ * port="pif_rpf_et_act0_i[2:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield et_act{f}[2:0] */</div><div class='add'>+#define HW_ATL_RPF_ET_ACTF_ADR(filter) (0x00005300 + (filter) * 0x4)</div><div class='add'>+/* bitmask for bitfield et_act{f}[2:0] */</div><div class='add'>+#define HW_ATL_RPF_ET_ACTF_MSK 0x00070000</div><div class='add'>+/* inverted bitmask for bitfield et_act{f}[2:0] */</div><div class='add'>+#define HW_ATL_RPF_ET_ACTF_MSKN 0xfff8ffff</div><div class='add'>+/* lower bit position of bitfield et_act{f}[2:0] */</div><div class='add'>+#define HW_ATL_RPF_ET_ACTF_SHIFT 16</div><div class='add'>+/* width of bitfield et_act{f}[2:0] */</div><div class='add'>+#define HW_ATL_RPF_ET_ACTF_WIDTH 3</div><div class='add'>+/* default value of bitfield et_act{f}[2:0] */</div><div class='add'>+#define HW_ATL_RPF_ET_ACTF_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx et_val{f}[f:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "et_val{f}[f:0]".</div><div class='add'>+ * parameter: filter {f} | stride size 0x4 | range [0, 15]</div><div class='add'>+ * port="pif_rpf_et_val0_i[15:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield et_val{f}[f:0] */</div><div class='add'>+#define HW_ATL_RPF_ET_VALF_ADR(filter) (0x00005300 + (filter) * 0x4)</div><div class='add'>+/* bitmask for bitfield et_val{f}[f:0] */</div><div class='add'>+#define HW_ATL_RPF_ET_VALF_MSK 0x0000ffff</div><div class='add'>+/* inverted bitmask for bitfield et_val{f}[f:0] */</div><div class='add'>+#define HW_ATL_RPF_ET_VALF_MSKN 0xffff0000</div><div class='add'>+/* lower bit position of bitfield et_val{f}[f:0] */</div><div class='add'>+#define HW_ATL_RPF_ET_VALF_SHIFT 0</div><div class='add'>+/* width of bitfield et_val{f}[f:0] */</div><div class='add'>+#define HW_ATL_RPF_ET_VALF_WIDTH 16</div><div class='add'>+/* default value of bitfield et_val{f}[f:0] */</div><div class='add'>+#define HW_ATL_RPF_ET_VALF_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* RX l3_l4_en{F} Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "l3_l4_en{F}".</div><div class='add'>+ * Parameter: filter {F} | stride size 0x4 | range [0, 7]</div><div class='add'>+ * PORT="pif_rpf_l3_l4_en_i[0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define HW_ATL_RPF_L3_REG_CTRL_ADR(filter) (0x00005380 + (filter) * 0x4)</div><div class='add'>+</div><div class='add'>+/* RX rpf_l3_sa{D}[1F:0] Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "l3_sa{D}[1F:0]".</div><div class='add'>+ * Parameter: location {D} | stride size 0x4 | range [0, 7]</div><div class='add'>+ * PORT="pif_rpf_l3_sa0_i[31:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield pif_rpf_l3_sa0_i[31:0] */</div><div class='add'>+#define HW_ATL_RPF_L3_SRCA_ADR(filter) (0x000053B0 + (filter) * 0x4)</div><div class='add'>+/* Bitmask for bitfield l3_sa0[1F:0] */</div><div class='add'>+#define HW_ATL_RPF_L3_SRCA_MSK 0xFFFFFFFFu</div><div class='add'>+/* Inverted bitmask for bitfield l3_sa0[1F:0] */</div><div class='add'>+#define HW_ATL_RPF_L3_SRCA_MSKN 0xFFFFFFFFu</div><div class='add'>+/* Lower bit position of bitfield l3_sa0[1F:0] */</div><div class='add'>+#define HW_ATL_RPF_L3_SRCA_SHIFT 0</div><div class='add'>+/* Width of bitfield l3_sa0[1F:0] */</div><div class='add'>+#define HW_ATL_RPF_L3_SRCA_WIDTH 32</div><div class='add'>+/* Default value of bitfield l3_sa0[1F:0] */</div><div class='add'>+#define HW_ATL_RPF_L3_SRCA_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* RX rpf_l3_da{D}[1F:0] Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "l3_da{D}[1F:0]".</div><div class='add'>+ * Parameter: location {D} | stride size 0x4 | range [0, 7]</div><div class='add'>+ * PORT="pif_rpf_l3_da0_i[31:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+ /* Register address for bitfield pif_rpf_l3_da0_i[31:0] */</div><div class='add'>+#define HW_ATL_RPF_L3_DSTA_ADR(filter) (0x000053D0 + (filter) * 0x4)</div><div class='add'>+/* Bitmask for bitfield l3_da0[1F:0] */</div><div class='add'>+#define HW_ATL_RPF_L3_DSTA_MSK 0xFFFFFFFFu</div><div class='add'>+/* Inverted bitmask for bitfield l3_da0[1F:0] */</div><div class='add'>+#define HW_ATL_RPF_L3_DSTA_MSKN 0xFFFFFFFFu</div><div class='add'>+/* Lower bit position of bitfield l3_da0[1F:0] */</div><div class='add'>+#define HW_ATL_RPF_L3_DSTA_SHIFT 0</div><div class='add'>+/* Width of bitfield l3_da0[1F:0] */</div><div class='add'>+#define HW_ATL_RPF_L3_DSTA_WIDTH 32</div><div class='add'>+/* Default value of bitfield l3_da0[1F:0] */</div><div class='add'>+#define HW_ATL_RPF_L3_DSTA_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* RX l4_sp{D}[F:0] Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "l4_sp{D}[F:0]".</div><div class='add'>+ * Parameter: srcport {D} | stride size 0x4 | range [0, 7]</div><div class='add'>+ * PORT="pif_rpf_l4_sp0_i[15:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield l4_sp{D}[F:0] */</div><div class='add'>+#define HW_ATL_RPF_L4_SPD_ADR(srcport) (0x00005400u + (srcport) * 0x4)</div><div class='add'>+/* Bitmask for bitfield l4_sp{D}[F:0] */</div><div class='add'>+#define HW_ATL_RPF_L4_SPD_MSK 0x0000FFFFu</div><div class='add'>+/* Inverted bitmask for bitfield l4_sp{D}[F:0] */</div><div class='add'>+#define HW_ATL_RPF_L4_SPD_MSKN 0xFFFF0000u</div><div class='add'>+/* Lower bit position of bitfield l4_sp{D}[F:0] */</div><div class='add'>+#define HW_ATL_RPF_L4_SPD_SHIFT 0</div><div class='add'>+/* Width of bitfield l4_sp{D}[F:0] */</div><div class='add'>+#define HW_ATL_RPF_L4_SPD_WIDTH 16</div><div class='add'>+/* Default value of bitfield l4_sp{D}[F:0] */</div><div class='add'>+#define HW_ATL_RPF_L4_SPD_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* RX l4_dp{D}[F:0] Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "l4_dp{D}[F:0]".</div><div class='add'>+ * Parameter: destport {D} | stride size 0x4 | range [0, 7]</div><div class='add'>+ * PORT="pif_rpf_l4_dp0_i[15:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield l4_dp{D}[F:0] */</div><div class='add'>+#define HW_ATL_RPF_L4_DPD_ADR(destport) (0x00005420u + (destport) * 0x4)</div><div class='add'>+/* Bitmask for bitfield l4_dp{D}[F:0] */</div><div class='add'>+#define HW_ATL_RPF_L4_DPD_MSK 0x0000FFFFu</div><div class='add'>+/* Inverted bitmask for bitfield l4_dp{D}[F:0] */</div><div class='add'>+#define HW_ATL_RPF_L4_DPD_MSKN 0xFFFF0000u</div><div class='add'>+/* Lower bit position of bitfield l4_dp{D}[F:0] */</div><div class='add'>+#define HW_ATL_RPF_L4_DPD_SHIFT 0</div><div class='add'>+/* Width of bitfield l4_dp{D}[F:0] */</div><div class='add'>+#define HW_ATL_RPF_L4_DPD_WIDTH 16</div><div class='add'>+/* Default value of bitfield l4_dp{D}[F:0] */</div><div class='add'>+#define HW_ATL_RPF_L4_DPD_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx ipv4_chk_en bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "ipv4_chk_en".</div><div class='add'>+ * port="pif_rpo_ipv4_chk_en_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield ipv4_chk_en */</div><div class='add'>+#define HW_ATL_RPO_IPV4CHK_EN_ADR 0x00005580</div><div class='add'>+/* bitmask for bitfield ipv4_chk_en */</div><div class='add'>+#define HW_ATL_RPO_IPV4CHK_EN_MSK 0x00000002</div><div class='add'>+/* inverted bitmask for bitfield ipv4_chk_en */</div><div class='add'>+#define HW_ATL_RPO_IPV4CHK_EN_MSKN 0xfffffffd</div><div class='add'>+/* lower bit position of bitfield ipv4_chk_en */</div><div class='add'>+#define HW_ATL_RPO_IPV4CHK_EN_SHIFT 1</div><div class='add'>+/* width of bitfield ipv4_chk_en */</div><div class='add'>+#define HW_ATL_RPO_IPV4CHK_EN_WIDTH 1</div><div class='add'>+/* default value of bitfield ipv4_chk_en */</div><div class='add'>+#define HW_ATL_RPO_IPV4CHK_EN_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx desc{d}_vl_strip bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "desc{d}_vl_strip".</div><div class='add'>+ * parameter: descriptor {d} | stride size 0x20 | range [0, 31]</div><div class='add'>+ * port="pif_rpo_desc_vl_strip_i[0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield desc{d}_vl_strip */</div><div class='add'>+#define HW_ATL_RPO_DESCDVL_STRIP_ADR(descriptor) \</div><div class='add'>+	(0x00005b08 + (descriptor) * 0x20)</div><div class='add'>+/* bitmask for bitfield desc{d}_vl_strip */</div><div class='add'>+#define HW_ATL_RPO_DESCDVL_STRIP_MSK 0x20000000</div><div class='add'>+/* inverted bitmask for bitfield desc{d}_vl_strip */</div><div class='add'>+#define HW_ATL_RPO_DESCDVL_STRIP_MSKN 0xdfffffff</div><div class='add'>+/* lower bit position of bitfield desc{d}_vl_strip */</div><div class='add'>+#define HW_ATL_RPO_DESCDVL_STRIP_SHIFT 29</div><div class='add'>+/* width of bitfield desc{d}_vl_strip */</div><div class='add'>+#define HW_ATL_RPO_DESCDVL_STRIP_WIDTH 1</div><div class='add'>+/* default value of bitfield desc{d}_vl_strip */</div><div class='add'>+#define HW_ATL_RPO_DESCDVL_STRIP_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx l4_chk_en bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "l4_chk_en".</div><div class='add'>+ * port="pif_rpo_l4_chk_en_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield l4_chk_en */</div><div class='add'>+#define HW_ATL_RPOL4CHK_EN_ADR 0x00005580</div><div class='add'>+/* bitmask for bitfield l4_chk_en */</div><div class='add'>+#define HW_ATL_RPOL4CHK_EN_MSK 0x00000001</div><div class='add'>+/* inverted bitmask for bitfield l4_chk_en */</div><div class='add'>+#define HW_ATL_RPOL4CHK_EN_MSKN 0xfffffffe</div><div class='add'>+/* lower bit position of bitfield l4_chk_en */</div><div class='add'>+#define HW_ATL_RPOL4CHK_EN_SHIFT 0</div><div class='add'>+/* width of bitfield l4_chk_en */</div><div class='add'>+#define HW_ATL_RPOL4CHK_EN_WIDTH 1</div><div class='add'>+/* default value of bitfield l4_chk_en */</div><div class='add'>+#define HW_ATL_RPOL4CHK_EN_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* RX outer_vl_ins_mode Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "outer_vl_ins_mode".</div><div class='add'>+ * PORT="pif_rpo_outer_vl_mode_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield outer_vl_ins_mode */</div><div class='add'>+#define HW_ATL_RPO_OUTER_VL_INS_MODE_ADR 0x00005580</div><div class='add'>+/* Bitmask for bitfield outer_vl_ins_mode */</div><div class='add'>+#define HW_ATL_RPO_OUTER_VL_INS_MODE_MSK 0x00000004</div><div class='add'>+/* Inverted bitmask for bitfield outer_vl_ins_mode */</div><div class='add'>+#define HW_ATL_RPO_OUTER_VL_INS_MODE_MSKN 0xFFFFFFFB</div><div class='add'>+/* Lower bit position of bitfield outer_vl_ins_mode */</div><div class='add'>+#define HW_ATL_RPO_OUTER_VL_INS_MODE_SHIFT 2</div><div class='add'>+/* Width of bitfield outer_vl_ins_mode */</div><div class='add'>+#define HW_ATL_RPO_OUTER_VL_INS_MODE_WIDTH 1</div><div class='add'>+/* Default value of bitfield outer_vl_ins_mode */</div><div class='add'>+#define HW_ATL_RPO_OUTER_VL_INS_MODE_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx reg_res_dsbl bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "reg_res_dsbl".</div><div class='add'>+ * port="pif_rx_reg_res_dsbl_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield reg_res_dsbl */</div><div class='add'>+#define HW_ATL_RX_REG_RES_DSBL_ADR 0x00005000</div><div class='add'>+/* bitmask for bitfield reg_res_dsbl */</div><div class='add'>+#define HW_ATL_RX_REG_RES_DSBL_MSK 0x20000000</div><div class='add'>+/* inverted bitmask for bitfield reg_res_dsbl */</div><div class='add'>+#define HW_ATL_RX_REG_RES_DSBL_MSKN 0xdfffffff</div><div class='add'>+/* lower bit position of bitfield reg_res_dsbl */</div><div class='add'>+#define HW_ATL_RX_REG_RES_DSBL_SHIFT 29</div><div class='add'>+/* width of bitfield reg_res_dsbl */</div><div class='add'>+#define HW_ATL_RX_REG_RES_DSBL_WIDTH 1</div><div class='add'>+/* default value of bitfield reg_res_dsbl */</div><div class='add'>+#define HW_ATL_RX_REG_RES_DSBL_DEFAULT 0x1</div><div class='add'>+</div><div class='add'>+/* tx dca{d}_cpuid[7:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "dca{d}_cpuid[7:0]".</div><div class='add'>+ * parameter: dca {d} | stride size 0x4 | range [0, 31]</div><div class='add'>+ * port="pif_tdm_dca0_cpuid_i[7:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield dca{d}_cpuid[7:0] */</div><div class='add'>+#define HW_ATL_TDM_DCADCPUID_ADR(dca) (0x00008400 + (dca) * 0x4)</div><div class='add'>+/* bitmask for bitfield dca{d}_cpuid[7:0] */</div><div class='add'>+#define HW_ATL_TDM_DCADCPUID_MSK 0x000000ff</div><div class='add'>+/* inverted bitmask for bitfield dca{d}_cpuid[7:0] */</div><div class='add'>+#define HW_ATL_TDM_DCADCPUID_MSKN 0xffffff00</div><div class='add'>+/* lower bit position of bitfield dca{d}_cpuid[7:0] */</div><div class='add'>+#define HW_ATL_TDM_DCADCPUID_SHIFT 0</div><div class='add'>+/* width of bitfield dca{d}_cpuid[7:0] */</div><div class='add'>+#define HW_ATL_TDM_DCADCPUID_WIDTH 8</div><div class='add'>+/* default value of bitfield dca{d}_cpuid[7:0] */</div><div class='add'>+#define HW_ATL_TDM_DCADCPUID_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx lso_en[1f:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "lso_en[1f:0]".</div><div class='add'>+ * port="pif_tdm_lso_en_i[31:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield lso_en[1f:0] */</div><div class='add'>+#define HW_ATL_TDM_LSO_EN_ADR 0x00007810</div><div class='add'>+/* bitmask for bitfield lso_en[1f:0] */</div><div class='add'>+#define HW_ATL_TDM_LSO_EN_MSK 0xffffffff</div><div class='add'>+/* inverted bitmask for bitfield lso_en[1f:0] */</div><div class='add'>+#define HW_ATL_TDM_LSO_EN_MSKN 0x00000000</div><div class='add'>+/* lower bit position of bitfield lso_en[1f:0] */</div><div class='add'>+#define HW_ATL_TDM_LSO_EN_SHIFT 0</div><div class='add'>+/* width of bitfield lso_en[1f:0] */</div><div class='add'>+#define HW_ATL_TDM_LSO_EN_WIDTH 32</div><div class='add'>+/* default value of bitfield lso_en[1f:0] */</div><div class='add'>+#define HW_ATL_TDM_LSO_EN_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx dca_en bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "dca_en".</div><div class='add'>+ * port="pif_tdm_dca_en_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield dca_en */</div><div class='add'>+#define HW_ATL_TDM_DCA_EN_ADR 0x00008480</div><div class='add'>+/* bitmask for bitfield dca_en */</div><div class='add'>+#define HW_ATL_TDM_DCA_EN_MSK 0x80000000</div><div class='add'>+/* inverted bitmask for bitfield dca_en */</div><div class='add'>+#define HW_ATL_TDM_DCA_EN_MSKN 0x7fffffff</div><div class='add'>+/* lower bit position of bitfield dca_en */</div><div class='add'>+#define HW_ATL_TDM_DCA_EN_SHIFT 31</div><div class='add'>+/* width of bitfield dca_en */</div><div class='add'>+#define HW_ATL_TDM_DCA_EN_WIDTH 1</div><div class='add'>+/* default value of bitfield dca_en */</div><div class='add'>+#define HW_ATL_TDM_DCA_EN_DEFAULT 0x1</div><div class='add'>+</div><div class='add'>+/* tx dca_mode[3:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "dca_mode[3:0]".</div><div class='add'>+ * port="pif_tdm_dca_mode_i[3:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield dca_mode[3:0] */</div><div class='add'>+#define HW_ATL_TDM_DCA_MODE_ADR 0x00008480</div><div class='add'>+/* bitmask for bitfield dca_mode[3:0] */</div><div class='add'>+#define HW_ATL_TDM_DCA_MODE_MSK 0x0000000f</div><div class='add'>+/* inverted bitmask for bitfield dca_mode[3:0] */</div><div class='add'>+#define HW_ATL_TDM_DCA_MODE_MSKN 0xfffffff0</div><div class='add'>+/* lower bit position of bitfield dca_mode[3:0] */</div><div class='add'>+#define HW_ATL_TDM_DCA_MODE_SHIFT 0</div><div class='add'>+/* width of bitfield dca_mode[3:0] */</div><div class='add'>+#define HW_ATL_TDM_DCA_MODE_WIDTH 4</div><div class='add'>+/* default value of bitfield dca_mode[3:0] */</div><div class='add'>+#define HW_ATL_TDM_DCA_MODE_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx dca{d}_desc_en bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "dca{d}_desc_en".</div><div class='add'>+ * parameter: dca {d} | stride size 0x4 | range [0, 31]</div><div class='add'>+ * port="pif_tdm_dca_desc_en_i[0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield dca{d}_desc_en */</div><div class='add'>+#define HW_ATL_TDM_DCADDESC_EN_ADR(dca) (0x00008400 + (dca) * 0x4)</div><div class='add'>+/* bitmask for bitfield dca{d}_desc_en */</div><div class='add'>+#define HW_ATL_TDM_DCADDESC_EN_MSK 0x80000000</div><div class='add'>+/* inverted bitmask for bitfield dca{d}_desc_en */</div><div class='add'>+#define HW_ATL_TDM_DCADDESC_EN_MSKN 0x7fffffff</div><div class='add'>+/* lower bit position of bitfield dca{d}_desc_en */</div><div class='add'>+#define HW_ATL_TDM_DCADDESC_EN_SHIFT 31</div><div class='add'>+/* width of bitfield dca{d}_desc_en */</div><div class='add'>+#define HW_ATL_TDM_DCADDESC_EN_WIDTH 1</div><div class='add'>+/* default value of bitfield dca{d}_desc_en */</div><div class='add'>+#define HW_ATL_TDM_DCADDESC_EN_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx desc{d}_en bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "desc{d}_en".</div><div class='add'>+ * parameter: descriptor {d} | stride size 0x40 | range [0, 31]</div><div class='add'>+ * port="pif_tdm_desc_en_i[0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield desc{d}_en */</div><div class='add'>+#define HW_ATL_TDM_DESCDEN_ADR(descriptor) (0x00007c08 + (descriptor) * 0x40)</div><div class='add'>+/* bitmask for bitfield desc{d}_en */</div><div class='add'>+#define HW_ATL_TDM_DESCDEN_MSK 0x80000000</div><div class='add'>+/* inverted bitmask for bitfield desc{d}_en */</div><div class='add'>+#define HW_ATL_TDM_DESCDEN_MSKN 0x7fffffff</div><div class='add'>+/* lower bit position of bitfield desc{d}_en */</div><div class='add'>+#define HW_ATL_TDM_DESCDEN_SHIFT 31</div><div class='add'>+/* width of bitfield desc{d}_en */</div><div class='add'>+#define HW_ATL_TDM_DESCDEN_WIDTH 1</div><div class='add'>+/* default value of bitfield desc{d}_en */</div><div class='add'>+#define HW_ATL_TDM_DESCDEN_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx desc{d}_hd[c:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "desc{d}_hd[c:0]".</div><div class='add'>+ * parameter: descriptor {d} | stride size 0x40 | range [0, 31]</div><div class='add'>+ * port="tdm_pif_desc0_hd_o[12:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield desc{d}_hd[c:0] */</div><div class='add'>+#define HW_ATL_TDM_DESCDHD_ADR(descriptor) (0x00007c0c + (descriptor) * 0x40)</div><div class='add'>+/* bitmask for bitfield desc{d}_hd[c:0] */</div><div class='add'>+#define HW_ATL_TDM_DESCDHD_MSK 0x00001fff</div><div class='add'>+/* inverted bitmask for bitfield desc{d}_hd[c:0] */</div><div class='add'>+#define HW_ATL_TDM_DESCDHD_MSKN 0xffffe000</div><div class='add'>+/* lower bit position of bitfield desc{d}_hd[c:0] */</div><div class='add'>+#define HW_ATL_TDM_DESCDHD_SHIFT 0</div><div class='add'>+/* width of bitfield desc{d}_hd[c:0] */</div><div class='add'>+#define HW_ATL_TDM_DESCDHD_WIDTH 13</div><div class='add'>+</div><div class='add'>+/* tx desc{d}_len[9:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "desc{d}_len[9:0]".</div><div class='add'>+ * parameter: descriptor {d} | stride size 0x40 | range [0, 31]</div><div class='add'>+ * port="pif_tdm_desc0_len_i[9:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield desc{d}_len[9:0] */</div><div class='add'>+#define HW_ATL_TDM_DESCDLEN_ADR(descriptor) (0x00007c08 + (descriptor) * 0x40)</div><div class='add'>+/* bitmask for bitfield desc{d}_len[9:0] */</div><div class='add'>+#define HW_ATL_TDM_DESCDLEN_MSK 0x00001ff8</div><div class='add'>+/* inverted bitmask for bitfield desc{d}_len[9:0] */</div><div class='add'>+#define HW_ATL_TDM_DESCDLEN_MSKN 0xffffe007</div><div class='add'>+/* lower bit position of bitfield desc{d}_len[9:0] */</div><div class='add'>+#define HW_ATL_TDM_DESCDLEN_SHIFT 3</div><div class='add'>+/* width of bitfield desc{d}_len[9:0] */</div><div class='add'>+#define HW_ATL_TDM_DESCDLEN_WIDTH 10</div><div class='add'>+/* default value of bitfield desc{d}_len[9:0] */</div><div class='add'>+#define HW_ATL_TDM_DESCDLEN_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx int_desc_wrb_en bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "int_desc_wrb_en".</div><div class='add'>+ * port="pif_tdm_int_desc_wrb_en_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield int_desc_wrb_en */</div><div class='add'>+#define HW_ATL_TDM_INT_DESC_WRB_EN_ADR 0x00007b40</div><div class='add'>+/* bitmask for bitfield int_desc_wrb_en */</div><div class='add'>+#define HW_ATL_TDM_INT_DESC_WRB_EN_MSK 0x00000002</div><div class='add'>+/* inverted bitmask for bitfield int_desc_wrb_en */</div><div class='add'>+#define HW_ATL_TDM_INT_DESC_WRB_EN_MSKN 0xfffffffd</div><div class='add'>+/* lower bit position of bitfield int_desc_wrb_en */</div><div class='add'>+#define HW_ATL_TDM_INT_DESC_WRB_EN_SHIFT 1</div><div class='add'>+/* width of bitfield int_desc_wrb_en */</div><div class='add'>+#define HW_ATL_TDM_INT_DESC_WRB_EN_WIDTH 1</div><div class='add'>+/* default value of bitfield int_desc_wrb_en */</div><div class='add'>+#define HW_ATL_TDM_INT_DESC_WRB_EN_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx desc{d}_wrb_thresh[6:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "desc{d}_wrb_thresh[6:0]".</div><div class='add'>+ * parameter: descriptor {d} | stride size 0x40 | range [0, 31]</div><div class='add'>+ * port="pif_tdm_desc0_wrb_thresh_i[6:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield desc{d}_wrb_thresh[6:0] */</div><div class='add'>+#define HW_ATL_TDM_DESCDWRB_THRESH_ADR(descriptor) \</div><div class='add'>+	(0x00007c18 + (descriptor) * 0x40)</div><div class='add'>+/* bitmask for bitfield desc{d}_wrb_thresh[6:0] */</div><div class='add'>+#define HW_ATL_TDM_DESCDWRB_THRESH_MSK 0x00007f00</div><div class='add'>+/* inverted bitmask for bitfield desc{d}_wrb_thresh[6:0] */</div><div class='add'>+#define HW_ATL_TDM_DESCDWRB_THRESH_MSKN 0xffff80ff</div><div class='add'>+/* lower bit position of bitfield desc{d}_wrb_thresh[6:0] */</div><div class='add'>+#define HW_ATL_TDM_DESCDWRB_THRESH_SHIFT 8</div><div class='add'>+/* width of bitfield desc{d}_wrb_thresh[6:0] */</div><div class='add'>+#define HW_ATL_TDM_DESCDWRB_THRESH_WIDTH 7</div><div class='add'>+/* default value of bitfield desc{d}_wrb_thresh[6:0] */</div><div class='add'>+#define HW_ATL_TDM_DESCDWRB_THRESH_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx lso_tcp_flag_first[b:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "lso_tcp_flag_first[b:0]".</div><div class='add'>+ * port="pif_thm_lso_tcp_flag_first_i[11:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield lso_tcp_flag_first[b:0] */</div><div class='add'>+#define HW_ATL_THM_LSO_TCP_FLAG_FIRST_ADR 0x00007820</div><div class='add'>+/* bitmask for bitfield lso_tcp_flag_first[b:0] */</div><div class='add'>+#define HW_ATL_THM_LSO_TCP_FLAG_FIRST_MSK 0x00000fff</div><div class='add'>+/* inverted bitmask for bitfield lso_tcp_flag_first[b:0] */</div><div class='add'>+#define HW_ATL_THM_LSO_TCP_FLAG_FIRST_MSKN 0xfffff000</div><div class='add'>+/* lower bit position of bitfield lso_tcp_flag_first[b:0] */</div><div class='add'>+#define HW_ATL_THM_LSO_TCP_FLAG_FIRST_SHIFT 0</div><div class='add'>+/* width of bitfield lso_tcp_flag_first[b:0] */</div><div class='add'>+#define HW_ATL_THM_LSO_TCP_FLAG_FIRST_WIDTH 12</div><div class='add'>+/* default value of bitfield lso_tcp_flag_first[b:0] */</div><div class='add'>+#define HW_ATL_THM_LSO_TCP_FLAG_FIRST_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx lso_tcp_flag_last[b:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "lso_tcp_flag_last[b:0]".</div><div class='add'>+ * port="pif_thm_lso_tcp_flag_last_i[11:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield lso_tcp_flag_last[b:0] */</div><div class='add'>+#define HW_ATL_THM_LSO_TCP_FLAG_LAST_ADR 0x00007824</div><div class='add'>+/* bitmask for bitfield lso_tcp_flag_last[b:0] */</div><div class='add'>+#define HW_ATL_THM_LSO_TCP_FLAG_LAST_MSK 0x00000fff</div><div class='add'>+/* inverted bitmask for bitfield lso_tcp_flag_last[b:0] */</div><div class='add'>+#define HW_ATL_THM_LSO_TCP_FLAG_LAST_MSKN 0xfffff000</div><div class='add'>+/* lower bit position of bitfield lso_tcp_flag_last[b:0] */</div><div class='add'>+#define HW_ATL_THM_LSO_TCP_FLAG_LAST_SHIFT 0</div><div class='add'>+/* width of bitfield lso_tcp_flag_last[b:0] */</div><div class='add'>+#define HW_ATL_THM_LSO_TCP_FLAG_LAST_WIDTH 12</div><div class='add'>+/* default value of bitfield lso_tcp_flag_last[b:0] */</div><div class='add'>+#define HW_ATL_THM_LSO_TCP_FLAG_LAST_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx lso_tcp_flag_mid[b:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "lso_tcp_flag_mid[b:0]".</div><div class='add'>+ * port="pif_thm_lso_tcp_flag_mid_i[11:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield lro_rsc_max[1F:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_RSC_MAX_ADR 0x00005598</div><div class='add'>+/* Bitmask for bitfield lro_rsc_max[1F:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_RSC_MAX_MSK 0xFFFFFFFF</div><div class='add'>+/* Inverted bitmask for bitfield lro_rsc_max[1F:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_RSC_MAX_MSKN 0x00000000</div><div class='add'>+/* Lower bit position of bitfield lro_rsc_max[1F:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_RSC_MAX_SHIFT 0</div><div class='add'>+/* Width of bitfield lro_rsc_max[1F:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_RSC_MAX_WIDTH 32</div><div class='add'>+/* Default value of bitfield lro_rsc_max[1F:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_RSC_MAX_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* RX lro_en[1F:0] Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "lro_en[1F:0]".</div><div class='add'>+ * PORT="pif_rpo_lro_en_i[31:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield lro_en[1F:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_EN_ADR 0x00005590</div><div class='add'>+/* Bitmask for bitfield lro_en[1F:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_EN_MSK 0xFFFFFFFF</div><div class='add'>+/* Inverted bitmask for bitfield lro_en[1F:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_EN_MSKN 0x00000000</div><div class='add'>+/* Lower bit position of bitfield lro_en[1F:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_EN_SHIFT 0</div><div class='add'>+/* Width of bitfield lro_en[1F:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_EN_WIDTH 32</div><div class='add'>+/* Default value of bitfield lro_en[1F:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_EN_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* RX lro_ptopt_en Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "lro_ptopt_en".</div><div class='add'>+ * PORT="pif_rpo_lro_ptopt_en_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield lro_ptopt_en */</div><div class='add'>+#define HW_ATL_RPO_LRO_PTOPT_EN_ADR 0x00005594</div><div class='add'>+/* Bitmask for bitfield lro_ptopt_en */</div><div class='add'>+#define HW_ATL_RPO_LRO_PTOPT_EN_MSK 0x00008000</div><div class='add'>+/* Inverted bitmask for bitfield lro_ptopt_en */</div><div class='add'>+#define HW_ATL_RPO_LRO_PTOPT_EN_MSKN 0xFFFF7FFF</div><div class='add'>+/* Lower bit position of bitfield lro_ptopt_en */</div><div class='add'>+#define HW_ATL_RPO_LRO_PTOPT_EN_SHIFT 15</div><div class='add'>+/* Width of bitfield lro_ptopt_en */</div><div class='add'>+#define HW_ATL_RPO_LRO_PTOPT_EN_WIDTH 1</div><div class='add'>+/* Default value of bitfield lro_ptopt_en */</div><div class='add'>+#define HW_ATL_RPO_LRO_PTOPT_EN_DEFALT 0x1</div><div class='add'>+</div><div class='add'>+/* RX lro_q_ses_lmt Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "lro_q_ses_lmt".</div><div class='add'>+ * PORT="pif_rpo_lro_q_ses_lmt_i[1:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield lro_q_ses_lmt */</div><div class='add'>+#define HW_ATL_RPO_LRO_QSES_LMT_ADR 0x00005594</div><div class='add'>+/* Bitmask for bitfield lro_q_ses_lmt */</div><div class='add'>+#define HW_ATL_RPO_LRO_QSES_LMT_MSK 0x00003000</div><div class='add'>+/* Inverted bitmask for bitfield lro_q_ses_lmt */</div><div class='add'>+#define HW_ATL_RPO_LRO_QSES_LMT_MSKN 0xFFFFCFFF</div><div class='add'>+/* Lower bit position of bitfield lro_q_ses_lmt */</div><div class='add'>+#define HW_ATL_RPO_LRO_QSES_LMT_SHIFT 12</div><div class='add'>+/* Width of bitfield lro_q_ses_lmt */</div><div class='add'>+#define HW_ATL_RPO_LRO_QSES_LMT_WIDTH 2</div><div class='add'>+/* Default value of bitfield lro_q_ses_lmt */</div><div class='add'>+#define HW_ATL_RPO_LRO_QSES_LMT_DEFAULT 0x1</div><div class='add'>+</div><div class='add'>+/* RX lro_tot_dsc_lmt[1:0] Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "lro_tot_dsc_lmt[1:0]".</div><div class='add'>+ * PORT="pif_rpo_lro_tot_dsc_lmt_i[1:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield lro_tot_dsc_lmt[1:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_TOT_DSC_LMT_ADR 0x00005594</div><div class='add'>+/* Bitmask for bitfield lro_tot_dsc_lmt[1:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_TOT_DSC_LMT_MSK 0x00000060</div><div class='add'>+/* Inverted bitmask for bitfield lro_tot_dsc_lmt[1:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_TOT_DSC_LMT_MSKN 0xFFFFFF9F</div><div class='add'>+/* Lower bit position of bitfield lro_tot_dsc_lmt[1:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_TOT_DSC_LMT_SHIFT 5</div><div class='add'>+/* Width of bitfield lro_tot_dsc_lmt[1:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_TOT_DSC_LMT_WIDTH 2</div><div class='add'>+/* Default value of bitfield lro_tot_dsc_lmt[1:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_TOT_DSC_LMT_DEFALT 0x1</div><div class='add'>+</div><div class='add'>+/* RX lro_pkt_min[4:0] Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "lro_pkt_min[4:0]".</div><div class='add'>+ * PORT="pif_rpo_lro_pkt_min_i[4:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield lro_pkt_min[4:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_PKT_MIN_ADR 0x00005594</div><div class='add'>+/* Bitmask for bitfield lro_pkt_min[4:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_PKT_MIN_MSK 0x0000001F</div><div class='add'>+/* Inverted bitmask for bitfield lro_pkt_min[4:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_PKT_MIN_MSKN 0xFFFFFFE0</div><div class='add'>+/* Lower bit position of bitfield lro_pkt_min[4:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_PKT_MIN_SHIFT 0</div><div class='add'>+/* Width of bitfield lro_pkt_min[4:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_PKT_MIN_WIDTH 5</div><div class='add'>+/* Default value of bitfield lro_pkt_min[4:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_PKT_MIN_DEFAULT 0x8</div><div class='add'>+</div><div class='add'>+/* Width of bitfield lro{L}_des_max[1:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_LDES_MAX_WIDTH 2</div><div class='add'>+/* Default value of bitfield lro{L}_des_max[1:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_LDES_MAX_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* RX lro_tb_div[11:0] Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "lro_tb_div[11:0]".</div><div class='add'>+ * PORT="pif_rpo_lro_tb_div_i[11:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield lro_tb_div[11:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_TB_DIV_ADR 0x00005620</div><div class='add'>+/* Bitmask for bitfield lro_tb_div[11:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_TB_DIV_MSK 0xFFF00000</div><div class='add'>+/* Inverted bitmask for bitfield lro_tb_div[11:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_TB_DIV_MSKN 0x000FFFFF</div><div class='add'>+/* Lower bit position of bitfield lro_tb_div[11:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_TB_DIV_SHIFT 20</div><div class='add'>+/* Width of bitfield lro_tb_div[11:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_TB_DIV_WIDTH 12</div><div class='add'>+/* Default value of bitfield lro_tb_div[11:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_TB_DIV_DEFAULT 0xC35</div><div class='add'>+</div><div class='add'>+/* RX lro_ina_ival[9:0] Bitfield Definitions</div><div class='add'>+ *   Preprocessor definitions for the bitfield "lro_ina_ival[9:0]".</div><div class='add'>+ *   PORT="pif_rpo_lro_ina_ival_i[9:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield lro_ina_ival[9:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_INA_IVAL_ADR 0x00005620</div><div class='add'>+/* Bitmask for bitfield lro_ina_ival[9:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_INA_IVAL_MSK 0x000FFC00</div><div class='add'>+/* Inverted bitmask for bitfield lro_ina_ival[9:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_INA_IVAL_MSKN 0xFFF003FF</div><div class='add'>+/* Lower bit position of bitfield lro_ina_ival[9:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_INA_IVAL_SHIFT 10</div><div class='add'>+/* Width of bitfield lro_ina_ival[9:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_INA_IVAL_WIDTH 10</div><div class='add'>+/* Default value of bitfield lro_ina_ival[9:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_INA_IVAL_DEFAULT 0xA</div><div class='add'>+</div><div class='add'>+/* RX lro_max_ival[9:0] Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "lro_max_ival[9:0]".</div><div class='add'>+ * PORT="pif_rpo_lro_max_ival_i[9:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield lro_max_ival[9:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_MAX_IVAL_ADR 0x00005620</div><div class='add'>+/* Bitmask for bitfield lro_max_ival[9:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_MAX_IVAL_MSK 0x000003FF</div><div class='add'>+/* Inverted bitmask for bitfield lro_max_ival[9:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_MAX_IVAL_MSKN 0xFFFFFC00</div><div class='add'>+/* Lower bit position of bitfield lro_max_ival[9:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_MAX_IVAL_SHIFT 0</div><div class='add'>+/* Width of bitfield lro_max_ival[9:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_MAX_IVAL_WIDTH 10</div><div class='add'>+/* Default value of bitfield lro_max_ival[9:0] */</div><div class='add'>+#define HW_ATL_RPO_LRO_MAX_IVAL_DEFAULT 0x19</div><div class='add'>+</div><div class='add'>+/* TX dca{D}_cpuid[7:0] Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "dca{D}_cpuid[7:0]".</div><div class='add'>+ * Parameter: DCA {D} | stride size 0x4 | range [0, 31]</div><div class='add'>+ * PORT="pif_tdm_dca0_cpuid_i[7:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield dca{D}_cpuid[7:0] */</div><div class='add'>+#define HW_ATL_TDM_DCA_DCPUID_ADR(dca) (0x00008400 + (dca) * 0x4)</div><div class='add'>+/* Bitmask for bitfield dca{D}_cpuid[7:0] */</div><div class='add'>+#define HW_ATL_TDM_DCA_DCPUID_MSK 0x000000FF</div><div class='add'>+/* Inverted bitmask for bitfield dca{D}_cpuid[7:0] */</div><div class='add'>+#define HW_ATL_TDM_DCA_DCPUID_MSKN 0xFFFFFF00</div><div class='add'>+/* Lower bit position of bitfield dca{D}_cpuid[7:0] */</div><div class='add'>+#define HW_ATL_TDM_DCA_DCPUID_SHIFT 0</div><div class='add'>+/* Width of bitfield dca{D}_cpuid[7:0] */</div><div class='add'>+#define HW_ATL_TDM_DCA_DCPUID_WIDTH 8</div><div class='add'>+/* Default value of bitfield dca{D}_cpuid[7:0] */</div><div class='add'>+#define HW_ATL_TDM_DCA_DCPUID_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* TX dca{D}_desc_en Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "dca{D}_desc_en".</div><div class='add'>+ * Parameter: DCA {D} | stride size 0x4 | range [0, 31]</div><div class='add'>+ * PORT="pif_tdm_dca_desc_en_i[0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield dca{D}_desc_en */</div><div class='add'>+#define HW_ATL_TDM_DCA_DDESC_EN_ADR(dca) (0x00008400 + (dca) * 0x4)</div><div class='add'>+/* Bitmask for bitfield dca{D}_desc_en */</div><div class='add'>+#define HW_ATL_TDM_DCA_DDESC_EN_MSK 0x80000000</div><div class='add'>+/* Inverted bitmask for bitfield dca{D}_desc_en */</div><div class='add'>+#define HW_ATL_TDM_DCA_DDESC_EN_MSKN 0x7FFFFFFF</div><div class='add'>+/* Lower bit position of bitfield dca{D}_desc_en */</div><div class='add'>+#define HW_ATL_TDM_DCA_DDESC_EN_SHIFT 31</div><div class='add'>+/* Width of bitfield dca{D}_desc_en */</div><div class='add'>+#define HW_ATL_TDM_DCA_DDESC_EN_WIDTH 1</div><div class='add'>+/* Default value of bitfield dca{D}_desc_en */</div><div class='add'>+#define HW_ATL_TDM_DCA_DDESC_EN_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* TX desc{D}_en Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "desc{D}_en".</div><div class='add'>+ * Parameter: descriptor {D} | stride size 0x40 | range [0, 31]</div><div class='add'>+ * PORT="pif_tdm_desc_en_i[0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield desc{D}_en */</div><div class='add'>+#define HW_ATL_TDM_DESC_DEN_ADR(descriptor) (0x00007C08 + (descriptor) * 0x40)</div><div class='add'>+/* Bitmask for bitfield desc{D}_en */</div><div class='add'>+#define HW_ATL_TDM_DESC_DEN_MSK 0x80000000</div><div class='add'>+/* Inverted bitmask for bitfield desc{D}_en */</div><div class='add'>+#define HW_ATL_TDM_DESC_DEN_MSKN 0x7FFFFFFF</div><div class='add'>+/* Lower bit position of bitfield desc{D}_en */</div><div class='add'>+#define HW_ATL_TDM_DESC_DEN_SHIFT 31</div><div class='add'>+/* Width of bitfield desc{D}_en */</div><div class='add'>+#define HW_ATL_TDM_DESC_DEN_WIDTH 1</div><div class='add'>+/* Default value of bitfield desc{D}_en */</div><div class='add'>+#define HW_ATL_TDM_DESC_DEN_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* TX desc{D}_hd[C:0] Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "desc{D}_hd[C:0]".</div><div class='add'>+ * Parameter: descriptor {D} | stride size 0x40 | range [0, 31]</div><div class='add'>+ * PORT="tdm_pif_desc0_hd_o[12:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield desc{D}_hd[C:0] */</div><div class='add'>+#define HW_ATL_TDM_DESC_DHD_ADR(descriptor) (0x00007C0C + (descriptor) * 0x40)</div><div class='add'>+/* Bitmask for bitfield desc{D}_hd[C:0] */</div><div class='add'>+#define HW_ATL_TDM_DESC_DHD_MSK 0x00001FFF</div><div class='add'>+/* Inverted bitmask for bitfield desc{D}_hd[C:0] */</div><div class='add'>+#define HW_ATL_TDM_DESC_DHD_MSKN 0xFFFFE000</div><div class='add'>+/* Lower bit position of bitfield desc{D}_hd[C:0] */</div><div class='add'>+#define HW_ATL_TDM_DESC_DHD_SHIFT 0</div><div class='add'>+/* Width of bitfield desc{D}_hd[C:0] */</div><div class='add'>+#define HW_ATL_TDM_DESC_DHD_WIDTH 13</div><div class='add'>+</div><div class='add'>+/* TX desc{D}_len[9:0] Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "desc{D}_len[9:0]".</div><div class='add'>+ * Parameter: descriptor {D} | stride size 0x40 | range [0, 31]</div><div class='add'>+ * PORT="pif_tdm_desc0_len_i[9:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield desc{D}_len[9:0] */</div><div class='add'>+#define HW_ATL_TDM_DESC_DLEN_ADR(descriptor) (0x00007C08 + (descriptor) * 0x40)</div><div class='add'>+/* Bitmask for bitfield desc{D}_len[9:0] */</div><div class='add'>+#define HW_ATL_TDM_DESC_DLEN_MSK 0x00001FF8</div><div class='add'>+/* Inverted bitmask for bitfield desc{D}_len[9:0] */</div><div class='add'>+#define HW_ATL_TDM_DESC_DLEN_MSKN 0xFFFFE007</div><div class='add'>+/* Lower bit position of bitfield desc{D}_len[9:0] */</div><div class='add'>+#define HW_ATL_TDM_DESC_DLEN_SHIFT 3</div><div class='add'>+/* Width of bitfield desc{D}_len[9:0] */</div><div class='add'>+#define HW_ATL_TDM_DESC_DLEN_WIDTH 10</div><div class='add'>+/* Default value of bitfield desc{D}_len[9:0] */</div><div class='add'>+#define HW_ATL_TDM_DESC_DLEN_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* TX desc{D}_wrb_thresh[6:0] Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "desc{D}_wrb_thresh[6:0]".</div><div class='add'>+ * Parameter: descriptor {D} | stride size 0x40 | range [0, 31]</div><div class='add'>+ * PORT="pif_tdm_desc0_wrb_thresh_i[6:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield desc{D}_wrb_thresh[6:0] */</div><div class='add'>+#define HW_ATL_TDM_DESC_DWRB_THRESH_ADR(descriptor) \</div><div class='add'>+	(0x00007C18 + (descriptor) * 0x40)</div><div class='add'>+/* Bitmask for bitfield desc{D}_wrb_thresh[6:0] */</div><div class='add'>+#define HW_ATL_TDM_DESC_DWRB_THRESH_MSK 0x00007F00</div><div class='add'>+/* Inverted bitmask for bitfield desc{D}_wrb_thresh[6:0] */</div><div class='add'>+#define HW_ATL_TDM_DESC_DWRB_THRESH_MSKN 0xFFFF80FF</div><div class='add'>+/* Lower bit position of bitfield desc{D}_wrb_thresh[6:0] */</div><div class='add'>+#define HW_ATL_TDM_DESC_DWRB_THRESH_SHIFT 8</div><div class='add'>+/* Width of bitfield desc{D}_wrb_thresh[6:0] */</div><div class='add'>+#define HW_ATL_TDM_DESC_DWRB_THRESH_WIDTH 7</div><div class='add'>+/* Default value of bitfield desc{D}_wrb_thresh[6:0] */</div><div class='add'>+#define HW_ATL_TDM_DESC_DWRB_THRESH_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* TX tdm_int_mod_en Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "tdm_int_mod_en".</div><div class='add'>+ * PORT="pif_tdm_int_mod_en_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield tdm_int_mod_en */</div><div class='add'>+#define HW_ATL_TDM_INT_MOD_EN_ADR 0x00007B40</div><div class='add'>+/* Bitmask for bitfield tdm_int_mod_en */</div><div class='add'>+#define HW_ATL_TDM_INT_MOD_EN_MSK 0x00000010</div><div class='add'>+/* Inverted bitmask for bitfield tdm_int_mod_en */</div><div class='add'>+#define HW_ATL_TDM_INT_MOD_EN_MSKN 0xFFFFFFEF</div><div class='add'>+/* Lower bit position of bitfield tdm_int_mod_en */</div><div class='add'>+#define HW_ATL_TDM_INT_MOD_EN_SHIFT 4</div><div class='add'>+/* Width of bitfield tdm_int_mod_en */</div><div class='add'>+#define HW_ATL_TDM_INT_MOD_EN_WIDTH 1</div><div class='add'>+/* Default value of bitfield tdm_int_mod_en */</div><div class='add'>+#define HW_ATL_TDM_INT_MOD_EN_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* TX lso_tcp_flag_mid[B:0] Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "lso_tcp_flag_mid[B:0]".</div><div class='add'>+ * PORT="pif_thm_lso_tcp_flag_mid_i[11:0]"</div><div class='add'>+ */</div><div class='add'>+/* register address for bitfield lso_tcp_flag_mid[b:0] */</div><div class='add'>+#define HW_ATL_THM_LSO_TCP_FLAG_MID_ADR 0x00007820</div><div class='add'>+/* bitmask for bitfield lso_tcp_flag_mid[b:0] */</div><div class='add'>+#define HW_ATL_THM_LSO_TCP_FLAG_MID_MSK 0x0fff0000</div><div class='add'>+/* inverted bitmask for bitfield lso_tcp_flag_mid[b:0] */</div><div class='add'>+#define HW_ATL_THM_LSO_TCP_FLAG_MID_MSKN 0xf000ffff</div><div class='add'>+/* lower bit position of bitfield lso_tcp_flag_mid[b:0] */</div><div class='add'>+#define HW_ATL_THM_LSO_TCP_FLAG_MID_SHIFT 16</div><div class='add'>+/* width of bitfield lso_tcp_flag_mid[b:0] */</div><div class='add'>+#define HW_ATL_THM_LSO_TCP_FLAG_MID_WIDTH 12</div><div class='add'>+/* default value of bitfield lso_tcp_flag_mid[b:0] */</div><div class='add'>+#define HW_ATL_THM_LSO_TCP_FLAG_MID_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx tx_tc_mode bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "tx_tc_mode".</div><div class='add'>+ * port="pif_tpb_tx_tc_mode_i,pif_tps_tx_tc_mode_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield tx_tc_mode */</div><div class='add'>+#define HW_ATL_TPB_TX_TC_MODE_ADDR 0x00007900</div><div class='add'>+/* bitmask for bitfield tx_tc_mode */</div><div class='add'>+#define HW_ATL_TPB_TX_TC_MODE_MSK 0x00000100</div><div class='add'>+/* inverted bitmask for bitfield tx_tc_mode */</div><div class='add'>+#define HW_ATL_TPB_TX_TC_MODE_MSKN 0xFFFFFEFF</div><div class='add'>+/* lower bit position of bitfield tx_tc_mode */</div><div class='add'>+#define HW_ATL_TPB_TX_TC_MODE_SHIFT 8</div><div class='add'>+/* width of bitfield tx_tc_mode */</div><div class='add'>+#define HW_ATL_TPB_TX_TC_MODE_WIDTH 1</div><div class='add'>+/* default value of bitfield tx_tc_mode */</div><div class='add'>+#define HW_ATL_TPB_TX_TC_MODE_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx tx_desc_rate_mode bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "tx_desc_rate_mode".</div><div class='add'>+ * port="pif_tps_desc_rate_mode_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield tx_desc_rate_mode */</div><div class='add'>+#define HW_ATL_TPS_TX_DESC_RATE_MODE_ADR 0x00007900</div><div class='add'>+/* bitmask for bitfield tx_desc_rate_mode */</div><div class='add'>+#define HW_ATL_TPS_TX_DESC_RATE_MODE_MSK 0x00000080</div><div class='add'>+/* inverted bitmask for bitfield tx_desc_rate_mode */</div><div class='add'>+#define HW_ATL_TPS_TX_DESC_RATE_MODE_MSKN 0xFFFFFF7F</div><div class='add'>+/* lower bit position of bitfield tx_desc_rate_mode */</div><div class='add'>+#define HW_ATL_TPS_TX_DESC_RATE_MODE_SHIFT 7</div><div class='add'>+/* width of bitfield tx_desc_rate_mode */</div><div class='add'>+#define HW_ATL_TPS_TX_DESC_RATE_MODE_WIDTH 1</div><div class='add'>+/* default value of bitfield tx_desc_rate_mode */</div><div class='add'>+#define HW_ATL_TPS_TX_DESC_RATE_MODE_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx tx_buf_en bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "tx_buf_en".</div><div class='add'>+ * port="pif_tpb_tx_buf_en_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield tx_buf_en */</div><div class='add'>+#define HW_ATL_TPB_TX_BUF_EN_ADR 0x00007900</div><div class='add'>+/* bitmask for bitfield tx_buf_en */</div><div class='add'>+#define HW_ATL_TPB_TX_BUF_EN_MSK 0x00000001</div><div class='add'>+/* inverted bitmask for bitfield tx_buf_en */</div><div class='add'>+#define HW_ATL_TPB_TX_BUF_EN_MSKN 0xfffffffe</div><div class='add'>+/* lower bit position of bitfield tx_buf_en */</div><div class='add'>+#define HW_ATL_TPB_TX_BUF_EN_SHIFT 0</div><div class='add'>+/* width of bitfield tx_buf_en */</div><div class='add'>+#define HW_ATL_TPB_TX_BUF_EN_WIDTH 1</div><div class='add'>+/* default value of bitfield tx_buf_en */</div><div class='add'>+#define HW_ATL_TPB_TX_BUF_EN_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx tx{b}_hi_thresh[c:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "tx{b}_hi_thresh[c:0]".</div><div class='add'>+ * parameter: buffer {b} | stride size 0x10 | range [0, 7]</div><div class='add'>+ * port="pif_tpb_tx0_hi_thresh_i[12:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield tx{b}_hi_thresh[c:0] */</div><div class='add'>+#define HW_ATL_TPB_TXBHI_THRESH_ADR(buffer) (0x00007914 + (buffer) * 0x10)</div><div class='add'>+/* bitmask for bitfield tx{b}_hi_thresh[c:0] */</div><div class='add'>+#define HW_ATL_TPB_TXBHI_THRESH_MSK 0x1fff0000</div><div class='add'>+/* inverted bitmask for bitfield tx{b}_hi_thresh[c:0] */</div><div class='add'>+#define HW_ATL_TPB_TXBHI_THRESH_MSKN 0xe000ffff</div><div class='add'>+/* lower bit position of bitfield tx{b}_hi_thresh[c:0] */</div><div class='add'>+#define HW_ATL_TPB_TXBHI_THRESH_SHIFT 16</div><div class='add'>+/* width of bitfield tx{b}_hi_thresh[c:0] */</div><div class='add'>+#define HW_ATL_TPB_TXBHI_THRESH_WIDTH 13</div><div class='add'>+/* default value of bitfield tx{b}_hi_thresh[c:0] */</div><div class='add'>+#define HW_ATL_TPB_TXBHI_THRESH_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx tx{b}_lo_thresh[c:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "tx{b}_lo_thresh[c:0]".</div><div class='add'>+ * parameter: buffer {b} | stride size 0x10 | range [0, 7]</div><div class='add'>+ * port="pif_tpb_tx0_lo_thresh_i[12:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield tx{b}_lo_thresh[c:0] */</div><div class='add'>+#define HW_ATL_TPB_TXBLO_THRESH_ADR(buffer) (0x00007914 + (buffer) * 0x10)</div><div class='add'>+/* bitmask for bitfield tx{b}_lo_thresh[c:0] */</div><div class='add'>+#define HW_ATL_TPB_TXBLO_THRESH_MSK 0x00001fff</div><div class='add'>+/* inverted bitmask for bitfield tx{b}_lo_thresh[c:0] */</div><div class='add'>+#define HW_ATL_TPB_TXBLO_THRESH_MSKN 0xffffe000</div><div class='add'>+/* lower bit position of bitfield tx{b}_lo_thresh[c:0] */</div><div class='add'>+#define HW_ATL_TPB_TXBLO_THRESH_SHIFT 0</div><div class='add'>+/* width of bitfield tx{b}_lo_thresh[c:0] */</div><div class='add'>+#define HW_ATL_TPB_TXBLO_THRESH_WIDTH 13</div><div class='add'>+/* default value of bitfield tx{b}_lo_thresh[c:0] */</div><div class='add'>+#define HW_ATL_TPB_TXBLO_THRESH_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx dma_sys_loopback bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "dma_sys_loopback".</div><div class='add'>+ * port="pif_tpb_dma_sys_lbk_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield dma_sys_loopback */</div><div class='add'>+#define HW_ATL_TPB_DMA_SYS_LBK_ADR 0x00007000</div><div class='add'>+/* bitmask for bitfield dma_sys_loopback */</div><div class='add'>+#define HW_ATL_TPB_DMA_SYS_LBK_MSK 0x00000040</div><div class='add'>+/* inverted bitmask for bitfield dma_sys_loopback */</div><div class='add'>+#define HW_ATL_TPB_DMA_SYS_LBK_MSKN 0xffffffbf</div><div class='add'>+/* lower bit position of bitfield dma_sys_loopback */</div><div class='add'>+#define HW_ATL_TPB_DMA_SYS_LBK_SHIFT 6</div><div class='add'>+/* width of bitfield dma_sys_loopback */</div><div class='add'>+#define HW_ATL_TPB_DMA_SYS_LBK_WIDTH 1</div><div class='add'>+/* default value of bitfield dma_sys_loopback */</div><div class='add'>+#define HW_ATL_TPB_DMA_SYS_LBK_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx dma_net_loopback bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "dma_net_loopback".</div><div class='add'>+ * port="pif_tpb_dma_net_lbk_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield dma_net_loopback */</div><div class='add'>+#define HW_ATL_TPB_DMA_NET_LBK_ADR 0x00007000</div><div class='add'>+/* bitmask for bitfield dma_net_loopback */</div><div class='add'>+#define HW_ATL_TPB_DMA_NET_LBK_MSK 0x00000010</div><div class='add'>+/* inverted bitmask for bitfield dma_net_loopback */</div><div class='add'>+#define HW_ATL_TPB_DMA_NET_LBK_MSKN 0xffffffef</div><div class='add'>+/* lower bit position of bitfield dma_net_loopback */</div><div class='add'>+#define HW_ATL_TPB_DMA_NET_LBK_SHIFT 4</div><div class='add'>+/* width of bitfield dma_net_loopback */</div><div class='add'>+#define HW_ATL_TPB_DMA_NET_LBK_WIDTH 1</div><div class='add'>+/* default value of bitfield dma_net_loopback */</div><div class='add'>+#define HW_ATL_TPB_DMA_NET_LBK_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx tx{b}_buf_size[7:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "tx{b}_buf_size[7:0]".</div><div class='add'>+ * parameter: buffer {b} | stride size 0x10 | range [0, 7]</div><div class='add'>+ * port="pif_tpb_tx0_buf_size_i[7:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield tx{b}_buf_size[7:0] */</div><div class='add'>+#define HW_ATL_TPB_TXBBUF_SIZE_ADR(buffer) (0x00007910 + (buffer) * 0x10)</div><div class='add'>+/* bitmask for bitfield tx{b}_buf_size[7:0] */</div><div class='add'>+#define HW_ATL_TPB_TXBBUF_SIZE_MSK 0x000000ff</div><div class='add'>+/* inverted bitmask for bitfield tx{b}_buf_size[7:0] */</div><div class='add'>+#define HW_ATL_TPB_TXBBUF_SIZE_MSKN 0xffffff00</div><div class='add'>+/* lower bit position of bitfield tx{b}_buf_size[7:0] */</div><div class='add'>+#define HW_ATL_TPB_TXBBUF_SIZE_SHIFT 0</div><div class='add'>+/* width of bitfield tx{b}_buf_size[7:0] */</div><div class='add'>+#define HW_ATL_TPB_TXBBUF_SIZE_WIDTH 8</div><div class='add'>+/* default value of bitfield tx{b}_buf_size[7:0] */</div><div class='add'>+#define HW_ATL_TPB_TXBBUF_SIZE_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx tx_scp_ins_en bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "tx_scp_ins_en".</div><div class='add'>+ * port="pif_tpb_scp_ins_en_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield tx_scp_ins_en */</div><div class='add'>+#define HW_ATL_TPB_TX_SCP_INS_EN_ADR 0x00007900</div><div class='add'>+/* bitmask for bitfield tx_scp_ins_en */</div><div class='add'>+#define HW_ATL_TPB_TX_SCP_INS_EN_MSK 0x00000004</div><div class='add'>+/* inverted bitmask for bitfield tx_scp_ins_en */</div><div class='add'>+#define HW_ATL_TPB_TX_SCP_INS_EN_MSKN 0xfffffffb</div><div class='add'>+/* lower bit position of bitfield tx_scp_ins_en */</div><div class='add'>+#define HW_ATL_TPB_TX_SCP_INS_EN_SHIFT 2</div><div class='add'>+/* width of bitfield tx_scp_ins_en */</div><div class='add'>+#define HW_ATL_TPB_TX_SCP_INS_EN_WIDTH 1</div><div class='add'>+/* default value of bitfield tx_scp_ins_en */</div><div class='add'>+#define HW_ATL_TPB_TX_SCP_INS_EN_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx tx_clk_gate_en bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "tx_clk_gate_en".</div><div class='add'>+ * port="pif_tpb_clk_gate_en_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield tx_clk_gate_en */</div><div class='add'>+#define HW_ATL_TPB_TX_CLK_GATE_EN_ADR 0x00007900</div><div class='add'>+/* bitmask for bitfield tx_clk_gate_en */</div><div class='add'>+#define HW_ATL_TPB_TX_CLK_GATE_EN_MSK 0x00000010</div><div class='add'>+/* inverted bitmask for bitfield tx_clk_gate_en */</div><div class='add'>+#define HW_ATL_TPB_TX_CLK_GATE_EN_MSKN 0xffffffef</div><div class='add'>+/* lower bit position of bitfield tx_clk_gate_en */</div><div class='add'>+#define HW_ATL_TPB_TX_CLK_GATE_EN_SHIFT 4</div><div class='add'>+/* width of bitfield tx_clk_gate_en */</div><div class='add'>+#define HW_ATL_TPB_TX_CLK_GATE_EN_WIDTH 1</div><div class='add'>+/* default value of bitfield tx_clk_gate_en */</div><div class='add'>+#define HW_ATL_TPB_TX_CLK_GATE_EN_DEFAULT 0x1</div><div class='add'>+</div><div class='add'>+/* tx ipv4_chk_en bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "ipv4_chk_en".</div><div class='add'>+ * port="pif_tpo_ipv4_chk_en_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield ipv4_chk_en */</div><div class='add'>+#define HW_ATL_TPO_IPV4CHK_EN_ADR 0x00007800</div><div class='add'>+/* bitmask for bitfield ipv4_chk_en */</div><div class='add'>+#define HW_ATL_TPO_IPV4CHK_EN_MSK 0x00000002</div><div class='add'>+/* inverted bitmask for bitfield ipv4_chk_en */</div><div class='add'>+#define HW_ATL_TPO_IPV4CHK_EN_MSKN 0xfffffffd</div><div class='add'>+/* lower bit position of bitfield ipv4_chk_en */</div><div class='add'>+#define HW_ATL_TPO_IPV4CHK_EN_SHIFT 1</div><div class='add'>+/* width of bitfield ipv4_chk_en */</div><div class='add'>+#define HW_ATL_TPO_IPV4CHK_EN_WIDTH 1</div><div class='add'>+/* default value of bitfield ipv4_chk_en */</div><div class='add'>+#define HW_ATL_TPO_IPV4CHK_EN_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx l4_chk_en bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "l4_chk_en".</div><div class='add'>+ * port="pif_tpo_l4_chk_en_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield l4_chk_en */</div><div class='add'>+#define HW_ATL_TPOL4CHK_EN_ADR 0x00007800</div><div class='add'>+/* bitmask for bitfield l4_chk_en */</div><div class='add'>+#define HW_ATL_TPOL4CHK_EN_MSK 0x00000001</div><div class='add'>+/* inverted bitmask for bitfield l4_chk_en */</div><div class='add'>+#define HW_ATL_TPOL4CHK_EN_MSKN 0xfffffffe</div><div class='add'>+/* lower bit position of bitfield l4_chk_en */</div><div class='add'>+#define HW_ATL_TPOL4CHK_EN_SHIFT 0</div><div class='add'>+/* width of bitfield l4_chk_en */</div><div class='add'>+#define HW_ATL_TPOL4CHK_EN_WIDTH 1</div><div class='add'>+/* default value of bitfield l4_chk_en */</div><div class='add'>+#define HW_ATL_TPOL4CHK_EN_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx pkt_sys_loopback bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "pkt_sys_loopback".</div><div class='add'>+ * port="pif_tpo_pkt_sys_lbk_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield pkt_sys_loopback */</div><div class='add'>+#define HW_ATL_TPO_PKT_SYS_LBK_ADR 0x00007000</div><div class='add'>+/* bitmask for bitfield pkt_sys_loopback */</div><div class='add'>+#define HW_ATL_TPO_PKT_SYS_LBK_MSK 0x00000080</div><div class='add'>+/* inverted bitmask for bitfield pkt_sys_loopback */</div><div class='add'>+#define HW_ATL_TPO_PKT_SYS_LBK_MSKN 0xffffff7f</div><div class='add'>+/* lower bit position of bitfield pkt_sys_loopback */</div><div class='add'>+#define HW_ATL_TPO_PKT_SYS_LBK_SHIFT 7</div><div class='add'>+/* width of bitfield pkt_sys_loopback */</div><div class='add'>+#define HW_ATL_TPO_PKT_SYS_LBK_WIDTH 1</div><div class='add'>+/* default value of bitfield pkt_sys_loopback */</div><div class='add'>+#define HW_ATL_TPO_PKT_SYS_LBK_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx data_tc_arb_mode bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "data_tc_arb_mode".</div><div class='add'>+ * port="pif_tps_data_tc_arb_mode_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield data_tc_arb_mode */</div><div class='add'>+#define HW_ATL_TPS_DATA_TC_ARB_MODE_ADR 0x00007100</div><div class='add'>+/* bitmask for bitfield data_tc_arb_mode */</div><div class='add'>+#define HW_ATL_TPS_DATA_TC_ARB_MODE_MSK 0x00000001</div><div class='add'>+/* inverted bitmask for bitfield data_tc_arb_mode */</div><div class='add'>+#define HW_ATL_TPS_DATA_TC_ARB_MODE_MSKN 0xfffffffe</div><div class='add'>+/* lower bit position of bitfield data_tc_arb_mode */</div><div class='add'>+#define HW_ATL_TPS_DATA_TC_ARB_MODE_SHIFT 0</div><div class='add'>+/* width of bitfield data_tc_arb_mode */</div><div class='add'>+#define HW_ATL_TPS_DATA_TC_ARB_MODE_WIDTH 1</div><div class='add'>+/* default value of bitfield data_tc_arb_mode */</div><div class='add'>+#define HW_ATL_TPS_DATA_TC_ARB_MODE_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx desc{r}_rate_en bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "desc{r}_rate_en".</div><div class='add'>+ * port="pif_tps_desc_rate_en_i[0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield desc{r}_rate_en */</div><div class='add'>+#define HW_ATL_TPS_DESC_RATE_EN_ADR(desc) (0x00007408 + (desc) * 0x10)</div><div class='add'>+/* bitmask for bitfield desc{r}_rate_en */</div><div class='add'>+#define HW_ATL_TPS_DESC_RATE_EN_MSK 0x80000000</div><div class='add'>+/* inverted bitmask for bitfield desc{r}_rate_en */</div><div class='add'>+#define HW_ATL_TPS_DESC_RATE_EN_MSKN 0x7FFFFFFF</div><div class='add'>+/* lower bit position of bitfield desc{r}_rate_en */</div><div class='add'>+#define HW_ATL_TPS_DESC_RATE_EN_SHIFT 31</div><div class='add'>+/* width of bitfield desc{r}_rate_en */</div><div class='add'>+#define HW_ATL_TPS_DESC_RATE_EN_WIDTH 1</div><div class='add'>+/* default value of bitfield desc{r}_rate_en */</div><div class='add'>+#define HW_ATL_TPS_DESC_RATE_EN_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx desc{r}_rate_x bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "desc{r}_rate_x".</div><div class='add'>+ * port="pif_tps_desc0_rate_x"</div><div class='add'>+ */</div><div class='add'>+/* register address for bitfield desc{r}_rate_x */</div><div class='add'>+#define HW_ATL_TPS_DESC_RATE_X_ADR(desc) (0x00007408 + (desc) * 0x10)</div><div class='add'>+/* bitmask for bitfield desc{r}_rate_x */</div><div class='add'>+#define HW_ATL_TPS_DESC_RATE_X_MSK 0x03FF0000</div><div class='add'>+/* inverted bitmask for bitfield desc{r}_rate_x */</div><div class='add'>+#define HW_ATL_TPS_DESC_RATE_X_MSKN 0xFC00FFFF</div><div class='add'>+/* lower bit position of bitfield desc{r}_rate_x */</div><div class='add'>+#define HW_ATL_TPS_DESC_RATE_X_SHIFT 16</div><div class='add'>+/* width of bitfield desc{r}_rate_x */</div><div class='add'>+#define HW_ATL_TPS_DESC_RATE_X_WIDTH 10</div><div class='add'>+/* default value of bitfield desc{r}_rate_x */</div><div class='add'>+#define HW_ATL_TPS_DESC_RATE_X_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx desc{r}_rate_y bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "desc{r}_rate_y".</div><div class='add'>+ * port="pif_tps_desc0_rate_y"</div><div class='add'>+ */</div><div class='add'>+/* register address for bitfield desc{r}_rate_y */</div><div class='add'>+#define HW_ATL_TPS_DESC_RATE_Y_ADR(desc) (0x00007408 + (desc) * 0x10)</div><div class='add'>+/* bitmask for bitfield desc{r}_rate_y */</div><div class='add'>+#define HW_ATL_TPS_DESC_RATE_Y_MSK 0x00003FFF</div><div class='add'>+/* inverted bitmask for bitfield desc{r}_rate_y */</div><div class='add'>+#define HW_ATL_TPS_DESC_RATE_Y_MSKN 0xFFFFC000</div><div class='add'>+/* lower bit position of bitfield desc{r}_rate_y */</div><div class='add'>+#define HW_ATL_TPS_DESC_RATE_Y_SHIFT 0</div><div class='add'>+/* width of bitfield desc{r}_rate_y */</div><div class='add'>+#define HW_ATL_TPS_DESC_RATE_Y_WIDTH 14</div><div class='add'>+/* default value of bitfield desc{r}_rate_y */</div><div class='add'>+#define HW_ATL_TPS_DESC_RATE_Y_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx desc_rate_ta_rst bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "desc_rate_ta_rst".</div><div class='add'>+ * port="pif_tps_desc_rate_ta_rst_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield desc_rate_ta_rst */</div><div class='add'>+#define HW_ATL_TPS_DESC_RATE_TA_RST_ADR 0x00007310</div><div class='add'>+/* bitmask for bitfield desc_rate_ta_rst */</div><div class='add'>+#define HW_ATL_TPS_DESC_RATE_TA_RST_MSK 0x80000000</div><div class='add'>+/* inverted bitmask for bitfield desc_rate_ta_rst */</div><div class='add'>+#define HW_ATL_TPS_DESC_RATE_TA_RST_MSKN 0x7fffffff</div><div class='add'>+/* lower bit position of bitfield desc_rate_ta_rst */</div><div class='add'>+#define HW_ATL_TPS_DESC_RATE_TA_RST_SHIFT 31</div><div class='add'>+/* width of bitfield desc_rate_ta_rst */</div><div class='add'>+#define HW_ATL_TPS_DESC_RATE_TA_RST_WIDTH 1</div><div class='add'>+/* default value of bitfield desc_rate_ta_rst */</div><div class='add'>+#define HW_ATL_TPS_DESC_RATE_TA_RST_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx desc_rate_limit[a:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "desc_rate_limit[a:0]".</div><div class='add'>+ * port="pif_tps_desc_rate_lim_i[10:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield desc_rate_limit[a:0] */</div><div class='add'>+#define HW_ATL_TPS_DESC_RATE_LIM_ADR 0x00007310</div><div class='add'>+/* bitmask for bitfield desc_rate_limit[a:0] */</div><div class='add'>+#define HW_ATL_TPS_DESC_RATE_LIM_MSK 0x000007ff</div><div class='add'>+/* inverted bitmask for bitfield desc_rate_limit[a:0] */</div><div class='add'>+#define HW_ATL_TPS_DESC_RATE_LIM_MSKN 0xfffff800</div><div class='add'>+/* lower bit position of bitfield desc_rate_limit[a:0] */</div><div class='add'>+#define HW_ATL_TPS_DESC_RATE_LIM_SHIFT 0</div><div class='add'>+/* width of bitfield desc_rate_limit[a:0] */</div><div class='add'>+#define HW_ATL_TPS_DESC_RATE_LIM_WIDTH 11</div><div class='add'>+/* default value of bitfield desc_rate_limit[a:0] */</div><div class='add'>+#define HW_ATL_TPS_DESC_RATE_LIM_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx desc_tc_arb_mode[1:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "desc_tc_arb_mode[1:0]".</div><div class='add'>+ * port="pif_tps_desc_tc_arb_mode_i[1:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield desc_tc_arb_mode[1:0] */</div><div class='add'>+#define HW_ATL_TPS_DESC_TC_ARB_MODE_ADR 0x00007200</div><div class='add'>+/* bitmask for bitfield desc_tc_arb_mode[1:0] */</div><div class='add'>+#define HW_ATL_TPS_DESC_TC_ARB_MODE_MSK 0x00000003</div><div class='add'>+/* inverted bitmask for bitfield desc_tc_arb_mode[1:0] */</div><div class='add'>+#define HW_ATL_TPS_DESC_TC_ARB_MODE_MSKN 0xfffffffc</div><div class='add'>+/* lower bit position of bitfield desc_tc_arb_mode[1:0] */</div><div class='add'>+#define HW_ATL_TPS_DESC_TC_ARB_MODE_SHIFT 0</div><div class='add'>+/* width of bitfield desc_tc_arb_mode[1:0] */</div><div class='add'>+#define HW_ATL_TPS_DESC_TC_ARB_MODE_WIDTH 2</div><div class='add'>+/* default value of bitfield desc_tc_arb_mode[1:0] */</div><div class='add'>+#define HW_ATL_TPS_DESC_TC_ARB_MODE_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx desc_tc{t}_credit_max[b:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "desc_tc{t}_credit_max[b:0]".</div><div class='add'>+ * parameter: tc {t} | stride size 0x4 | range [0, 7]</div><div class='add'>+ * port="pif_tps_desc_tc0_credit_max_i[11:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield desc_tc{t}_credit_max[b:0] */</div><div class='add'>+#define HW_ATL_TPS_DESC_TCTCREDIT_MAX_ADR(tc) (0x00007210 + (tc) * 0x4)</div><div class='add'>+/* bitmask for bitfield desc_tc{t}_credit_max[b:0] */</div><div class='add'>+#define HW_ATL_TPS_DESC_TCTCREDIT_MAX_MSK 0x0fff0000</div><div class='add'>+/* inverted bitmask for bitfield desc_tc{t}_credit_max[b:0] */</div><div class='add'>+#define HW_ATL_TPS_DESC_TCTCREDIT_MAX_MSKN 0xf000ffff</div><div class='add'>+/* lower bit position of bitfield desc_tc{t}_credit_max[b:0] */</div><div class='add'>+#define HW_ATL_TPS_DESC_TCTCREDIT_MAX_SHIFT 16</div><div class='add'>+/* width of bitfield desc_tc{t}_credit_max[b:0] */</div><div class='add'>+#define HW_ATL_TPS_DESC_TCTCREDIT_MAX_WIDTH 12</div><div class='add'>+/* default value of bitfield desc_tc{t}_credit_max[b:0] */</div><div class='add'>+#define HW_ATL_TPS_DESC_TCTCREDIT_MAX_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx desc_tc{t}_weight[8:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "desc_tc{t}_weight[8:0]".</div><div class='add'>+ * parameter: tc {t} | stride size 0x4 | range [0, 7]</div><div class='add'>+ * port="pif_tps_desc_tc0_weight_i[8:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield desc_tc{t}_weight[8:0] */</div><div class='add'>+#define HW_ATL_TPS_DESC_TCTWEIGHT_ADR(tc) (0x00007210 + (tc) * 0x4)</div><div class='add'>+/* bitmask for bitfield desc_tc{t}_weight[8:0] */</div><div class='add'>+#define HW_ATL_TPS_DESC_TCTWEIGHT_MSK 0x000001ff</div><div class='add'>+/* inverted bitmask for bitfield desc_tc{t}_weight[8:0] */</div><div class='add'>+#define HW_ATL_TPS_DESC_TCTWEIGHT_MSKN 0xfffffe00</div><div class='add'>+/* lower bit position of bitfield desc_tc{t}_weight[8:0] */</div><div class='add'>+#define HW_ATL_TPS_DESC_TCTWEIGHT_SHIFT 0</div><div class='add'>+/* width of bitfield desc_tc{t}_weight[8:0] */</div><div class='add'>+#define HW_ATL_TPS_DESC_TCTWEIGHT_WIDTH 9</div><div class='add'>+/* default value of bitfield desc_tc{t}_weight[8:0] */</div><div class='add'>+#define HW_ATL_TPS_DESC_TCTWEIGHT_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx desc_vm_arb_mode bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "desc_vm_arb_mode".</div><div class='add'>+ * port="pif_tps_desc_vm_arb_mode_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield desc_vm_arb_mode */</div><div class='add'>+#define HW_ATL_TPS_DESC_VM_ARB_MODE_ADR 0x00007300</div><div class='add'>+/* bitmask for bitfield desc_vm_arb_mode */</div><div class='add'>+#define HW_ATL_TPS_DESC_VM_ARB_MODE_MSK 0x00000001</div><div class='add'>+/* inverted bitmask for bitfield desc_vm_arb_mode */</div><div class='add'>+#define HW_ATL_TPS_DESC_VM_ARB_MODE_MSKN 0xfffffffe</div><div class='add'>+/* lower bit position of bitfield desc_vm_arb_mode */</div><div class='add'>+#define HW_ATL_TPS_DESC_VM_ARB_MODE_SHIFT 0</div><div class='add'>+/* width of bitfield desc_vm_arb_mode */</div><div class='add'>+#define HW_ATL_TPS_DESC_VM_ARB_MODE_WIDTH 1</div><div class='add'>+/* default value of bitfield desc_vm_arb_mode */</div><div class='add'>+#define HW_ATL_TPS_DESC_VM_ARB_MODE_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx data_tc{t}_credit_max[b:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "data_tc{t}_credit_max[b:0]".</div><div class='add'>+ * parameter: tc {t} | stride size 0x4 | range [0, 7]</div><div class='add'>+ * port="pif_tps_data_tc0_credit_max_i[11:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield data_tc{t}_credit_max[b:0] */</div><div class='add'>+#define HW_ATL_TPS_DATA_TCTCREDIT_MAX_ADR(tc) (0x00007110 + (tc) * 0x4)</div><div class='add'>+/* bitmask for bitfield data_tc{t}_credit_max[b:0] */</div><div class='add'>+#define HW_ATL_TPS_DATA_TCTCREDIT_MAX_MSK 0x0fff0000</div><div class='add'>+/* inverted bitmask for bitfield data_tc{t}_credit_max[b:0] */</div><div class='add'>+#define HW_ATL_TPS_DATA_TCTCREDIT_MAX_MSKN 0xf000ffff</div><div class='add'>+/* lower bit position of bitfield data_tc{t}_credit_max[b:0] */</div><div class='add'>+#define HW_ATL_TPS_DATA_TCTCREDIT_MAX_SHIFT 16</div><div class='add'>+/* width of bitfield data_tc{t}_credit_max[b:0] */</div><div class='add'>+#define HW_ATL_TPS_DATA_TCTCREDIT_MAX_WIDTH 12</div><div class='add'>+/* default value of bitfield data_tc{t}_credit_max[b:0] */</div><div class='add'>+#define HW_ATL_TPS_DATA_TCTCREDIT_MAX_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx data_tc{t}_weight[8:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "data_tc{t}_weight[8:0]".</div><div class='add'>+ * parameter: tc {t} | stride size 0x4 | range [0, 7]</div><div class='add'>+ * port="pif_tps_data_tc0_weight_i[8:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield data_tc{t}_weight[8:0] */</div><div class='add'>+#define HW_ATL_TPS_DATA_TCTWEIGHT_ADR(tc) (0x00007110 + (tc) * 0x4)</div><div class='add'>+/* bitmask for bitfield data_tc{t}_weight[8:0] */</div><div class='add'>+#define HW_ATL_TPS_DATA_TCTWEIGHT_MSK 0x000001ff</div><div class='add'>+/* inverted bitmask for bitfield data_tc{t}_weight[8:0] */</div><div class='add'>+#define HW_ATL_TPS_DATA_TCTWEIGHT_MSKN 0xfffffe00</div><div class='add'>+/* lower bit position of bitfield data_tc{t}_weight[8:0] */</div><div class='add'>+#define HW_ATL_TPS_DATA_TCTWEIGHT_SHIFT 0</div><div class='add'>+/* width of bitfield data_tc{t}_weight[8:0] */</div><div class='add'>+#define HW_ATL_TPS_DATA_TCTWEIGHT_WIDTH 9</div><div class='add'>+/* default value of bitfield data_tc{t}_weight[8:0] */</div><div class='add'>+#define HW_ATL_TPS_DATA_TCTWEIGHT_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx reg_res_dsbl bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "reg_res_dsbl".</div><div class='add'>+ * port="pif_tx_reg_res_dsbl_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield reg_res_dsbl */</div><div class='add'>+#define HW_ATL_TX_REG_RES_DSBL_ADR 0x00007000</div><div class='add'>+/* bitmask for bitfield reg_res_dsbl */</div><div class='add'>+#define HW_ATL_TX_REG_RES_DSBL_MSK 0x20000000</div><div class='add'>+/* inverted bitmask for bitfield reg_res_dsbl */</div><div class='add'>+#define HW_ATL_TX_REG_RES_DSBL_MSKN 0xdfffffff</div><div class='add'>+/* lower bit position of bitfield reg_res_dsbl */</div><div class='add'>+#define HW_ATL_TX_REG_RES_DSBL_SHIFT 29</div><div class='add'>+/* width of bitfield reg_res_dsbl */</div><div class='add'>+#define HW_ATL_TX_REG_RES_DSBL_WIDTH 1</div><div class='add'>+/* default value of bitfield reg_res_dsbl */</div><div class='add'>+#define HW_ATL_TX_REG_RES_DSBL_DEFAULT 0x1</div><div class='add'>+</div><div class='add'>+/* mac_phy register access busy bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "register access busy".</div><div class='add'>+ * port="msm_pif_reg_busy_o"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield register access busy */</div><div class='add'>+#define HW_ATL_MSM_REG_ACCESS_BUSY_ADR 0x00004400</div><div class='add'>+/* bitmask for bitfield register access busy */</div><div class='add'>+#define HW_ATL_MSM_REG_ACCESS_BUSY_MSK 0x00001000</div><div class='add'>+/* inverted bitmask for bitfield register access busy */</div><div class='add'>+#define HW_ATL_MSM_REG_ACCESS_BUSY_MSKN 0xffffefff</div><div class='add'>+/* lower bit position of bitfield register access busy */</div><div class='add'>+#define HW_ATL_MSM_REG_ACCESS_BUSY_SHIFT 12</div><div class='add'>+/* width of bitfield register access busy */</div><div class='add'>+#define HW_ATL_MSM_REG_ACCESS_BUSY_WIDTH 1</div><div class='add'>+</div><div class='add'>+/* mac_phy msm register address[7:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "msm register address[7:0]".</div><div class='add'>+ * port="pif_msm_reg_addr_i[7:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield msm register address[7:0] */</div><div class='add'>+#define HW_ATL_MSM_REG_ADDR_ADR 0x00004400</div><div class='add'>+/* bitmask for bitfield msm register address[7:0] */</div><div class='add'>+#define HW_ATL_MSM_REG_ADDR_MSK 0x000000ff</div><div class='add'>+/* inverted bitmask for bitfield msm register address[7:0] */</div><div class='add'>+#define HW_ATL_MSM_REG_ADDR_MSKN 0xffffff00</div><div class='add'>+/* lower bit position of bitfield msm register address[7:0] */</div><div class='add'>+#define HW_ATL_MSM_REG_ADDR_SHIFT 0</div><div class='add'>+/* width of bitfield msm register address[7:0] */</div><div class='add'>+#define HW_ATL_MSM_REG_ADDR_WIDTH 8</div><div class='add'>+/* default value of bitfield msm register address[7:0] */</div><div class='add'>+#define HW_ATL_MSM_REG_ADDR_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* mac_phy register read strobe bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "register read strobe".</div><div class='add'>+ * port="pif_msm_reg_rden_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield register read strobe */</div><div class='add'>+#define HW_ATL_MSM_REG_RD_STROBE_ADR 0x00004400</div><div class='add'>+/* bitmask for bitfield register read strobe */</div><div class='add'>+#define HW_ATL_MSM_REG_RD_STROBE_MSK 0x00000200</div><div class='add'>+/* inverted bitmask for bitfield register read strobe */</div><div class='add'>+#define HW_ATL_MSM_REG_RD_STROBE_MSKN 0xfffffdff</div><div class='add'>+/* lower bit position of bitfield register read strobe */</div><div class='add'>+#define HW_ATL_MSM_REG_RD_STROBE_SHIFT 9</div><div class='add'>+/* width of bitfield register read strobe */</div><div class='add'>+#define HW_ATL_MSM_REG_RD_STROBE_WIDTH 1</div><div class='add'>+/* default value of bitfield register read strobe */</div><div class='add'>+#define HW_ATL_MSM_REG_RD_STROBE_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* mac_phy msm register read data[31:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "msm register read data[31:0]".</div><div class='add'>+ * port="msm_pif_reg_rd_data_o[31:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield msm register read data[31:0] */</div><div class='add'>+#define HW_ATL_MSM_REG_RD_DATA_ADR 0x00004408</div><div class='add'>+/* bitmask for bitfield msm register read data[31:0] */</div><div class='add'>+#define HW_ATL_MSM_REG_RD_DATA_MSK 0xffffffff</div><div class='add'>+/* inverted bitmask for bitfield msm register read data[31:0] */</div><div class='add'>+#define HW_ATL_MSM_REG_RD_DATA_MSKN 0x00000000</div><div class='add'>+/* lower bit position of bitfield msm register read data[31:0] */</div><div class='add'>+#define HW_ATL_MSM_REG_RD_DATA_SHIFT 0</div><div class='add'>+/* width of bitfield msm register read data[31:0] */</div><div class='add'>+#define HW_ATL_MSM_REG_RD_DATA_WIDTH 32</div><div class='add'>+</div><div class='add'>+/* mac_phy msm register write data[31:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "msm register write data[31:0]".</div><div class='add'>+ * port="pif_msm_reg_wr_data_i[31:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield msm register write data[31:0] */</div><div class='add'>+#define HW_ATL_MSM_REG_WR_DATA_ADR 0x00004404</div><div class='add'>+/* bitmask for bitfield msm register write data[31:0] */</div><div class='add'>+#define HW_ATL_MSM_REG_WR_DATA_MSK 0xffffffff</div><div class='add'>+/* inverted bitmask for bitfield msm register write data[31:0] */</div><div class='add'>+#define HW_ATL_MSM_REG_WR_DATA_MSKN 0x00000000</div><div class='add'>+/* lower bit position of bitfield msm register write data[31:0] */</div><div class='add'>+#define HW_ATL_MSM_REG_WR_DATA_SHIFT 0</div><div class='add'>+/* width of bitfield msm register write data[31:0] */</div><div class='add'>+#define HW_ATL_MSM_REG_WR_DATA_WIDTH 32</div><div class='add'>+/* default value of bitfield msm register write data[31:0] */</div><div class='add'>+#define HW_ATL_MSM_REG_WR_DATA_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* mac_phy register write strobe bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "register write strobe".</div><div class='add'>+ * port="pif_msm_reg_wren_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield register write strobe */</div><div class='add'>+#define HW_ATL_MSM_REG_WR_STROBE_ADR 0x00004400</div><div class='add'>+/* bitmask for bitfield register write strobe */</div><div class='add'>+#define HW_ATL_MSM_REG_WR_STROBE_MSK 0x00000100</div><div class='add'>+/* inverted bitmask for bitfield register write strobe */</div><div class='add'>+#define HW_ATL_MSM_REG_WR_STROBE_MSKN 0xfffffeff</div><div class='add'>+/* lower bit position of bitfield register write strobe */</div><div class='add'>+#define HW_ATL_MSM_REG_WR_STROBE_SHIFT 8</div><div class='add'>+/* width of bitfield register write strobe */</div><div class='add'>+#define HW_ATL_MSM_REG_WR_STROBE_WIDTH 1</div><div class='add'>+/* default value of bitfield register write strobe */</div><div class='add'>+#define HW_ATL_MSM_REG_WR_STROBE_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* register address for bitfield PTP Digital Clock Read Enable */</div><div class='add'>+#define HW_ATL_PCS_PTP_CLOCK_READ_ENABLE_ADR 0x00004628</div><div class='add'>+/* bitmask for bitfield PTP Digital Clock Read Enable */</div><div class='add'>+#define HW_ATL_PCS_PTP_CLOCK_READ_ENABLE_MSK 0x00000010</div><div class='add'>+/* inverted bitmask for bitfield PTP Digital Clock Read Enable */</div><div class='add'>+#define HW_ATL_PCS_PTP_CLOCK_READ_ENABLE_MSKN 0xFFFFFFEF</div><div class='add'>+/* lower bit position of bitfield PTP Digital Clock Read Enable */</div><div class='add'>+#define HW_ATL_PCS_PTP_CLOCK_READ_ENABLE_SHIFT 4</div><div class='add'>+/* width of bitfield PTP Digital Clock Read Enable */</div><div class='add'>+#define HW_ATL_PCS_PTP_CLOCK_READ_ENABLE_WIDTH 1</div><div class='add'>+/* default value of bitfield PTP Digital Clock Read Enable */</div><div class='add'>+#define HW_ATL_PCS_PTP_CLOCK_READ_ENABLE_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* register address for ptp counter reading */</div><div class='add'>+#define HW_ATL_PCS_PTP_TS_VAL_ADDR(index) (0x00004900 + (index) * 0x4)</div><div class='add'>+</div><div class='add'>+/* mif soft reset bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "soft reset".</div><div class='add'>+ * port="pif_glb_res_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield soft reset */</div><div class='add'>+#define HW_ATL_GLB_SOFT_RES_ADR 0x00000000</div><div class='add'>+/* bitmask for bitfield soft reset */</div><div class='add'>+#define HW_ATL_GLB_SOFT_RES_MSK 0x00008000</div><div class='add'>+/* inverted bitmask for bitfield soft reset */</div><div class='add'>+#define HW_ATL_GLB_SOFT_RES_MSKN 0xffff7fff</div><div class='add'>+/* lower bit position of bitfield soft reset */</div><div class='add'>+#define HW_ATL_GLB_SOFT_RES_SHIFT 15</div><div class='add'>+/* width of bitfield soft reset */</div><div class='add'>+#define HW_ATL_GLB_SOFT_RES_WIDTH 1</div><div class='add'>+/* default value of bitfield soft reset */</div><div class='add'>+#define HW_ATL_GLB_SOFT_RES_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* mif register reset disable bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "register reset disable".</div><div class='add'>+ * port="pif_glb_reg_res_dsbl_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield register reset disable */</div><div class='add'>+#define HW_ATL_GLB_REG_RES_DIS_ADR 0x00000000</div><div class='add'>+/* bitmask for bitfield register reset disable */</div><div class='add'>+#define HW_ATL_GLB_REG_RES_DIS_MSK 0x00004000</div><div class='add'>+/* inverted bitmask for bitfield register reset disable */</div><div class='add'>+#define HW_ATL_GLB_REG_RES_DIS_MSKN 0xffffbfff</div><div class='add'>+/* lower bit position of bitfield register reset disable */</div><div class='add'>+#define HW_ATL_GLB_REG_RES_DIS_SHIFT 14</div><div class='add'>+/* width of bitfield register reset disable */</div><div class='add'>+#define HW_ATL_GLB_REG_RES_DIS_WIDTH 1</div><div class='add'>+/* default value of bitfield register reset disable */</div><div class='add'>+#define HW_ATL_GLB_REG_RES_DIS_DEFAULT 0x1</div><div class='add'>+</div><div class='add'>+/* tx dma debug control definitions */</div><div class='add'>+#define HW_ATL_TX_DMA_DEBUG_CTL_ADR 0x00008920u</div><div class='add'>+</div><div class='add'>+/* tx dma descriptor base address msw definitions */</div><div class='add'>+#define HW_ATL_TX_DMA_DESC_BASE_ADDRMSW_ADR(descriptor) \</div><div class='add'>+			(0x00007c04u + (descriptor) * 0x40)</div><div class='add'>+</div><div class='add'>+/* tx dma total request limit */</div><div class='add'>+#define HW_ATL_TX_DMA_TOTAL_REQ_LIMIT_ADR 0x00007b20u</div><div class='add'>+</div><div class='add'>+/* tx interrupt moderation control register definitions</div><div class='add'>+ * Preprocessor definitions for TX Interrupt Moderation Control Register</div><div class='add'>+ * Base Address: 0x00008980</div><div class='add'>+ * Parameter: queue {Q} | stride size 0x4 | range [0, 31]</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define HW_ATL_TX_INTR_MODERATION_CTL_ADR(queue) (0x00008980u + (queue) * 0x4)</div><div class='add'>+</div><div class='add'>+/* pcie reg_res_dsbl bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "reg_res_dsbl".</div><div class='add'>+ * port="pif_pci_reg_res_dsbl_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield reg_res_dsbl */</div><div class='add'>+#define HW_ATL_PCI_REG_RES_DSBL_ADR 0x00001000</div><div class='add'>+/* bitmask for bitfield reg_res_dsbl */</div><div class='add'>+#define HW_ATL_PCI_REG_RES_DSBL_MSK 0x20000000</div><div class='add'>+/* inverted bitmask for bitfield reg_res_dsbl */</div><div class='add'>+#define HW_ATL_PCI_REG_RES_DSBL_MSKN 0xdfffffff</div><div class='add'>+/* lower bit position of bitfield reg_res_dsbl */</div><div class='add'>+#define HW_ATL_PCI_REG_RES_DSBL_SHIFT 29</div><div class='add'>+/* width of bitfield reg_res_dsbl */</div><div class='add'>+#define HW_ATL_PCI_REG_RES_DSBL_WIDTH 1</div><div class='add'>+/* default value of bitfield reg_res_dsbl */</div><div class='add'>+#define HW_ATL_PCI_REG_RES_DSBL_DEFAULT 0x1</div><div class='add'>+</div><div class='add'>+/* PCI core control register */</div><div class='add'>+#define HW_ATL_PCI_REG_CONTROL6_ADR 0x1014u</div><div class='add'>+</div><div class='add'>+/* global microprocessor scratch pad definitions */</div><div class='add'>+#define HW_ATL_GLB_CPU_SCRATCH_SCP_ADR(scratch_scp) \</div><div class='add'>+	(0x00000300u + (scratch_scp) * 0x4)</div><div class='add'>+</div><div class='add'>+/* register address for bitfield uP Force Interrupt */</div><div class='add'>+#define HW_ATL_MCP_UP_FORCE_INTERRUPT_ADR 0x00000404</div><div class='add'>+/* bitmask for bitfield uP Force Interrupt */</div><div class='add'>+#define HW_ATL_MCP_UP_FORCE_INTERRUPT_MSK 0x00000002</div><div class='add'>+/* inverted bitmask for bitfield uP Force Interrupt */</div><div class='add'>+#define HW_ATL_MCP_UP_FORCE_INTERRUPT_MSKN 0xFFFFFFFD</div><div class='add'>+/* lower bit position of bitfield uP Force Interrupt */</div><div class='add'>+#define HW_ATL_MCP_UP_FORCE_INTERRUPT_SHIFT 1</div><div class='add'>+/* width of bitfield uP Force Interrupt */</div><div class='add'>+#define HW_ATL_MCP_UP_FORCE_INTERRUPT_WIDTH 1</div><div class='add'>+/* default value of bitfield uP Force Interrupt */</div><div class='add'>+#define HW_ATL_MCP_UP_FORCE_INTERRUPT_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* Preprocessor definitions for Global MDIO Interfaces</div><div class='add'>+ * Address: 0x00000280 + 0x4 * Number of interface</div><div class='add'>+ */</div><div class='add'>+#define HW_ATL_GLB_MDIO_IFACE_ADDR_BEGIN   0x00000280u</div><div class='add'>+</div><div class='add'>+#define HW_ATL_GLB_MDIO_IFACE_N_ADR(number) \</div><div class='add'>+	(HW_ATL_GLB_MDIO_IFACE_ADDR_BEGIN + (((number) - 1) * 0x4))</div><div class='add'>+</div><div class='add'>+/* MIF MDIO Busy Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "MDIO Busy".</div><div class='add'>+ * PORT="mdio_pif_busy_o"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield MDIO Busy */</div><div class='add'>+#define HW_ATL_MDIO_BUSY_ADR 0x00000284</div><div class='add'>+/* Bitmask for bitfield MDIO Busy */</div><div class='add'>+#define HW_ATL_MDIO_BUSY_MSK 0x80000000</div><div class='add'>+/* Inverted bitmask for bitfield MDIO Busy */</div><div class='add'>+#define HW_ATL_MDIO_BUSY_MSKN 0x7FFFFFFF</div><div class='add'>+/* Lower bit position of bitfield MDIO Busy */</div><div class='add'>+#define HW_ATL_MDIO_BUSY_SHIFT 31</div><div class='add'>+/* Width of bitfield MDIO Busy */</div><div class='add'>+#define HW_ATL_MDIO_BUSY_WIDTH 1</div><div class='add'>+</div><div class='add'>+/* MIF MDIO Execute Operation Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "MDIO Execute Operation".</div><div class='add'>+ * PORT="pif_mdio_op_start_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield MDIO Execute Operation */</div><div class='add'>+#define HW_ATL_MDIO_EXECUTE_OPERATION_ADR 0x00000284</div><div class='add'>+/* Bitmask for bitfield MDIO Execute Operation */</div><div class='add'>+#define HW_ATL_MDIO_EXECUTE_OPERATION_MSK 0x00008000</div><div class='add'>+/* Inverted bitmask for bitfield MDIO Execute Operation */</div><div class='add'>+#define HW_ATL_MDIO_EXECUTE_OPERATION_MSKN 0xFFFF7FFF</div><div class='add'>+/* Lower bit position of bitfield MDIO Execute Operation */</div><div class='add'>+#define HW_ATL_MDIO_EXECUTE_OPERATION_SHIFT 15</div><div class='add'>+/* Width of bitfield MDIO Execute Operation */</div><div class='add'>+#define HW_ATL_MDIO_EXECUTE_OPERATION_WIDTH 1</div><div class='add'>+/* Default value of bitfield MDIO Execute Operation */</div><div class='add'>+#define HW_ATL_MDIO_EXECUTE_OPERATION_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* MIF Op Mode [1:0] Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "Op Mode [1:0]".</div><div class='add'>+ * PORT="pif_mdio_mode_i[1:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield Op Mode [1:0] */</div><div class='add'>+#define HW_ATL_MDIO_OP_MODE_ADR 0x00000284</div><div class='add'>+/* Bitmask for bitfield Op Mode [1:0] */</div><div class='add'>+#define HW_ATL_MDIO_OP_MODE_MSK 0x00003000</div><div class='add'>+/* Inverted bitmask for bitfield Op Mode [1:0] */</div><div class='add'>+#define HW_ATL_MDIO_OP_MODE_MSKN 0xFFFFCFFF</div><div class='add'>+/* Lower bit position of bitfield Op Mode [1:0] */</div><div class='add'>+#define HW_ATL_MDIO_OP_MODE_SHIFT 12</div><div class='add'>+/* Width of bitfield Op Mode [1:0] */</div><div class='add'>+#define HW_ATL_MDIO_OP_MODE_WIDTH 2</div><div class='add'>+/* Default value of bitfield Op Mode [1:0] */</div><div class='add'>+#define HW_ATL_MDIO_OP_MODE_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* MIF PHY address Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "PHY address".</div><div class='add'>+ * PORT="pif_mdio_phy_addr_i[9:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield PHY address */</div><div class='add'>+#define HW_ATL_MDIO_PHY_ADDRESS_ADR 0x00000284</div><div class='add'>+/* Bitmask for bitfield PHY address */</div><div class='add'>+#define HW_ATL_MDIO_PHY_ADDRESS_MSK 0x000003FF</div><div class='add'>+/* Inverted bitmask for bitfield PHY address */</div><div class='add'>+#define HW_ATL_MDIO_PHY_ADDRESS_MSKN 0xFFFFFC00</div><div class='add'>+/* Lower bit position of bitfield PHY address */</div><div class='add'>+#define HW_ATL_MDIO_PHY_ADDRESS_SHIFT 0</div><div class='add'>+/* Width of bitfield PHY address */</div><div class='add'>+#define HW_ATL_MDIO_PHY_ADDRESS_WIDTH 10</div><div class='add'>+/* Default value of bitfield PHY address */</div><div class='add'>+#define HW_ATL_MDIO_PHY_ADDRESS_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* MIF MDIO WriteData [F:0] Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "MDIO WriteData [F:0]".</div><div class='add'>+ * PORT="pif_mdio_wdata_i[15:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield MDIO WriteData [F:0] */</div><div class='add'>+#define HW_ATL_MDIO_WRITE_DATA_ADR 0x00000288</div><div class='add'>+/* Bitmask for bitfield MDIO WriteData [F:0] */</div><div class='add'>+#define HW_ATL_MDIO_WRITE_DATA_MSK 0x0000FFFF</div><div class='add'>+/* Inverted bitmask for bitfield MDIO WriteData [F:0] */</div><div class='add'>+#define HW_ATL_MDIO_WRITE_DATA_MSKN 0xFFFF0000</div><div class='add'>+/* Lower bit position of bitfield MDIO WriteData [F:0] */</div><div class='add'>+#define HW_ATL_MDIO_WRITE_DATA_SHIFT 0</div><div class='add'>+/* Width of bitfield MDIO WriteData [F:0] */</div><div class='add'>+#define HW_ATL_MDIO_WRITE_DATA_WIDTH 16</div><div class='add'>+/* Default value of bitfield MDIO WriteData [F:0] */</div><div class='add'>+#define HW_ATL_MDIO_WRITE_DATA_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* MIF MDIO Address [F:0] Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "MDIO Address [F:0]".</div><div class='add'>+ * PORT="pif_mdio_addr_i[15:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield MDIO Address [F:0] */</div><div class='add'>+#define HW_ATL_MDIO_ADDRESS_ADR 0x0000028C</div><div class='add'>+/* Bitmask for bitfield MDIO Address [F:0] */</div><div class='add'>+#define HW_ATL_MDIO_ADDRESS_MSK 0x0000FFFF</div><div class='add'>+/* Inverted bitmask for bitfield MDIO Address [F:0] */</div><div class='add'>+#define HW_ATL_MDIO_ADDRESS_MSKN 0xFFFF0000</div><div class='add'>+/* Lower bit position of bitfield MDIO Address [F:0] */</div><div class='add'>+#define HW_ATL_MDIO_ADDRESS_SHIFT 0</div><div class='add'>+/* Width of bitfield MDIO Address [F:0] */</div><div class='add'>+#define HW_ATL_MDIO_ADDRESS_WIDTH 16</div><div class='add'>+/* Default value of bitfield MDIO Address [F:0] */</div><div class='add'>+#define HW_ATL_MDIO_ADDRESS_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+#define HW_ATL_MIF_RESET_TIMEOUT_ADR 0x00000348</div><div class='add'>+</div><div class='add'>+#define HW_ATL_FW_SM_MDIO       0x0U</div><div class='add'>+#define HW_ATL_FW_SM_RAM        0x2U</div><div class='add'>+#define HW_ATL_FW_SM_RESET1     0x3U</div><div class='add'>+#define HW_ATL_FW_SM_RESET2     0x4U</div><div class='add'>+</div><div class='add'>+#endif /* HW_ATL_LLH_INTERNAL_H */</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.c b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.c<br/>new file mode 100644<br/>index 000000000000..7e88d7234b14<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.c</a></div><div class='hunk'>@@ -0,0 +1,1099 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2014-2019 aQuantia Corporation</div><div class='add'>+ * Copyright (C) 2019-2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* File hw_atl_utils.c: Definition of common functions for Atlantic hardware</div><div class='add'>+ * abstraction layer.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "../aq_nic.h"</div><div class='add'>+#include "../aq_hw_utils.h"</div><div class='add'>+#include "hw_atl_utils.h"</div><div class='add'>+#include "hw_atl_llh.h"</div><div class='add'>+#include "hw_atl_llh_internal.h"</div><div class='add'>+</div><div class='add'>+#include &lt;linux/random.h&gt;</div><div class='add'>+</div><div class='add'>+#define HW_ATL_UCP_0X370_REG    0x0370U</div><div class='add'>+</div><div class='add'>+#define HW_ATL_MIF_CMD          0x0200U</div><div class='add'>+#define HW_ATL_MIF_ADDR         0x0208U</div><div class='add'>+#define HW_ATL_MIF_VAL          0x020CU</div><div class='add'>+</div><div class='add'>+#define HW_ATL_MPI_RPC_ADDR     0x0334U</div><div class='add'>+#define HW_ATL_RPC_CONTROL_ADR  0x0338U</div><div class='add'>+#define HW_ATL_RPC_STATE_ADR    0x033CU</div><div class='add'>+</div><div class='add'>+#define HW_ATL_MPI_FW_VERSION	0x18</div><div class='add'>+#define HW_ATL_MPI_CONTROL_ADR  0x0368U</div><div class='add'>+#define HW_ATL_MPI_STATE_ADR    0x036CU</div><div class='add'>+</div><div class='add'>+#define HW_ATL_MPI_STATE_MSK      0x00FFU</div><div class='add'>+#define HW_ATL_MPI_STATE_SHIFT    0U</div><div class='add'>+#define HW_ATL_MPI_SPEED_MSK      0x00FF0000U</div><div class='add'>+#define HW_ATL_MPI_SPEED_SHIFT    16U</div><div class='add'>+#define HW_ATL_MPI_DIRTY_WAKE_MSK 0x02000000U</div><div class='add'>+</div><div class='add'>+#define HW_ATL_MPI_DAISY_CHAIN_STATUS	0x704</div><div class='add'>+#define HW_ATL_MPI_BOOT_EXIT_CODE	0x388</div><div class='add'>+</div><div class='add'>+#define HW_ATL_MAC_PHY_CONTROL	0x4000</div><div class='add'>+#define HW_ATL_MAC_PHY_MPI_RESET_BIT 0x1D</div><div class='add'>+</div><div class='add'>+#define HW_ATL_FW_VER_1X 0x01050006U</div><div class='add'>+#define HW_ATL_FW_VER_2X 0x02000000U</div><div class='add'>+#define HW_ATL_FW_VER_3X 0x03000000U</div><div class='add'>+#define HW_ATL_FW_VER_4X 0x04000000U</div><div class='add'>+</div><div class='add'>+#define FORCE_FLASHLESS 0</div><div class='add'>+</div><div class='add'>+enum mcp_area {</div><div class='add'>+	MCP_AREA_CONFIG = 0x80000000,</div><div class='add'>+	MCP_AREA_SETTINGS = 0x20000000,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int hw_atl_utils_mpi_set_state(struct aq_hw_s *self,</div><div class='add'>+				      enum hal_atl_utils_fw_state_e state);</div><div class='add'>+static u32 hw_atl_utils_get_mpi_mbox_tid(struct aq_hw_s *self);</div><div class='add'>+static u32 hw_atl_utils_mpi_get_state(struct aq_hw_s *self);</div><div class='add'>+static u32 hw_atl_utils_mif_cmd_get(struct aq_hw_s *self);</div><div class='add'>+static u32 hw_atl_utils_mif_addr_get(struct aq_hw_s *self);</div><div class='add'>+static u32 hw_atl_utils_rpc_state_get(struct aq_hw_s *self);</div><div class='add'>+static u32 aq_fw1x_rpc_get(struct aq_hw_s *self);</div><div class='add'>+</div><div class='add'>+int hw_atl_utils_initfw(struct aq_hw_s *self, const struct aq_fw_ops **fw_ops)</div><div class='add'>+{</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	hw_atl_utils_hw_chip_features_init(self,</div><div class='add'>+					   &amp;self-&gt;chip_features);</div><div class='add'>+</div><div class='add'>+	self-&gt;fw_ver_actual = hw_atl_utils_get_fw_version(self);</div><div class='add'>+</div><div class='add'>+	if (hw_atl_utils_ver_match(HW_ATL_FW_VER_1X, self-&gt;fw_ver_actual)) {</div><div class='add'>+		*fw_ops = &amp;aq_fw_1x_ops;</div><div class='add'>+	} else if (hw_atl_utils_ver_match(HW_ATL_FW_VER_2X, self-&gt;fw_ver_actual)) {</div><div class='add'>+		*fw_ops = &amp;aq_fw_2x_ops;</div><div class='add'>+	} else if (hw_atl_utils_ver_match(HW_ATL_FW_VER_3X, self-&gt;fw_ver_actual)) {</div><div class='add'>+		*fw_ops = &amp;aq_fw_2x_ops;</div><div class='add'>+	} else if (hw_atl_utils_ver_match(HW_ATL_FW_VER_4X, self-&gt;fw_ver_actual)) {</div><div class='add'>+		*fw_ops = &amp;aq_fw_2x_ops;</div><div class='add'>+	} else {</div><div class='add'>+		aq_pr_err("Bad FW version detected: %x\n",</div><div class='add'>+			  self-&gt;fw_ver_actual);</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+	self-&gt;aq_fw_ops = *fw_ops;</div><div class='add'>+	err = self-&gt;aq_fw_ops-&gt;init(self);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_utils_soft_reset_flb(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	u32 gsr, val;</div><div class='add'>+	int k = 0;</div><div class='add'>+</div><div class='add'>+	aq_hw_write_reg(self, 0x404, 0x40e1);</div><div class='add'>+	AQ_HW_SLEEP(50);</div><div class='add'>+</div><div class='add'>+	/* Cleanup SPI */</div><div class='add'>+	val = aq_hw_read_reg(self, 0x53C);</div><div class='add'>+	aq_hw_write_reg(self, 0x53C, val | 0x10);</div><div class='add'>+</div><div class='add'>+	gsr = aq_hw_read_reg(self, HW_ATL_GLB_SOFT_RES_ADR);</div><div class='add'>+	aq_hw_write_reg(self, HW_ATL_GLB_SOFT_RES_ADR, (gsr &amp; 0xBFFF) | 0x8000);</div><div class='add'>+</div><div class='add'>+	/* Kickstart MAC */</div><div class='add'>+	aq_hw_write_reg(self, 0x404, 0x80e0);</div><div class='add'>+	aq_hw_write_reg(self, 0x32a8, 0x0);</div><div class='add'>+	aq_hw_write_reg(self, 0x520, 0x1);</div><div class='add'>+</div><div class='add'>+	/* Reset SPI again because of possible interrupted SPI burst */</div><div class='add'>+	val = aq_hw_read_reg(self, 0x53C);</div><div class='add'>+	aq_hw_write_reg(self, 0x53C, val | 0x10);</div><div class='add'>+	AQ_HW_SLEEP(10);</div><div class='add'>+	/* Clear SPI reset state */</div><div class='add'>+	aq_hw_write_reg(self, 0x53C, val &amp; ~0x10);</div><div class='add'>+</div><div class='add'>+	aq_hw_write_reg(self, 0x404, 0x180e0);</div><div class='add'>+</div><div class='add'>+	for (k = 0; k &lt; 1000; k++) {</div><div class='add'>+		u32 flb_status = aq_hw_read_reg(self,</div><div class='add'>+						HW_ATL_MPI_DAISY_CHAIN_STATUS);</div><div class='add'>+</div><div class='add'>+		flb_status = flb_status &amp; 0x10;</div><div class='add'>+		if (flb_status)</div><div class='add'>+			break;</div><div class='add'>+		AQ_HW_SLEEP(10);</div><div class='add'>+	}</div><div class='add'>+	if (k == 1000) {</div><div class='add'>+		aq_pr_err("MAC kickstart failed\n");</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* FW reset */</div><div class='add'>+	aq_hw_write_reg(self, 0x404, 0x80e0);</div><div class='add'>+	AQ_HW_SLEEP(50);</div><div class='add'>+	aq_hw_write_reg(self, 0x3a0, 0x1);</div><div class='add'>+</div><div class='add'>+	/* Kickstart PHY - skipped */</div><div class='add'>+</div><div class='add'>+	/* Global software reset*/</div><div class='add'>+	hw_atl_rx_rx_reg_res_dis_set(self, 0U);</div><div class='add'>+	hw_atl_tx_tx_reg_res_dis_set(self, 0U);</div><div class='add'>+	aq_hw_write_reg_bit(self, HW_ATL_MAC_PHY_CONTROL,</div><div class='add'>+			    BIT(HW_ATL_MAC_PHY_MPI_RESET_BIT),</div><div class='add'>+			    HW_ATL_MAC_PHY_MPI_RESET_BIT, 0x0);</div><div class='add'>+	gsr = aq_hw_read_reg(self, HW_ATL_GLB_SOFT_RES_ADR);</div><div class='add'>+	aq_hw_write_reg(self, HW_ATL_GLB_SOFT_RES_ADR, (gsr &amp; 0xBFFF) | 0x8000);</div><div class='add'>+</div><div class='add'>+	for (k = 0; k &lt; 1000; k++) {</div><div class='add'>+		u32 fw_state = aq_hw_read_reg(self, HW_ATL_MPI_FW_VERSION);</div><div class='add'>+</div><div class='add'>+		if (fw_state)</div><div class='add'>+			break;</div><div class='add'>+		AQ_HW_SLEEP(10);</div><div class='add'>+	}</div><div class='add'>+	if (k == 1000) {</div><div class='add'>+		aq_pr_err("FW kickstart failed\n");</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+	/* Old FW requires fixed delay after init */</div><div class='add'>+	AQ_HW_SLEEP(15);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_utils_soft_reset_rbl(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	u32 gsr, val, rbl_status;</div><div class='add'>+	int k;</div><div class='add'>+</div><div class='add'>+	aq_hw_write_reg(self, 0x404, 0x40e1);</div><div class='add'>+	aq_hw_write_reg(self, 0x3a0, 0x1);</div><div class='add'>+	aq_hw_write_reg(self, 0x32a8, 0x0);</div><div class='add'>+</div><div class='add'>+	/* Alter RBL status */</div><div class='add'>+	aq_hw_write_reg(self, 0x388, 0xDEAD);</div><div class='add'>+</div><div class='add'>+	/* Cleanup SPI */</div><div class='add'>+	val = aq_hw_read_reg(self, 0x53C);</div><div class='add'>+	aq_hw_write_reg(self, 0x53C, val | 0x10);</div><div class='add'>+</div><div class='add'>+	/* Global software reset*/</div><div class='add'>+	hw_atl_rx_rx_reg_res_dis_set(self, 0U);</div><div class='add'>+	hw_atl_tx_tx_reg_res_dis_set(self, 0U);</div><div class='add'>+	aq_hw_write_reg_bit(self, HW_ATL_MAC_PHY_CONTROL,</div><div class='add'>+			    BIT(HW_ATL_MAC_PHY_MPI_RESET_BIT),</div><div class='add'>+			    HW_ATL_MAC_PHY_MPI_RESET_BIT, 0x0);</div><div class='add'>+	gsr = aq_hw_read_reg(self, HW_ATL_GLB_SOFT_RES_ADR);</div><div class='add'>+	aq_hw_write_reg(self, HW_ATL_GLB_SOFT_RES_ADR,</div><div class='add'>+			(gsr &amp; 0xFFFFBFFF) | 0x8000);</div><div class='add'>+</div><div class='add'>+	if (FORCE_FLASHLESS)</div><div class='add'>+		aq_hw_write_reg(self, 0x534, 0x0);</div><div class='add'>+</div><div class='add'>+	aq_hw_write_reg(self, 0x404, 0x40e0);</div><div class='add'>+</div><div class='add'>+	/* Wait for RBL boot */</div><div class='add'>+	for (k = 0; k &lt; 1000; k++) {</div><div class='add'>+		rbl_status = aq_hw_read_reg(self, 0x388) &amp; 0xFFFF;</div><div class='add'>+		if (rbl_status &amp;&amp; rbl_status != 0xDEAD)</div><div class='add'>+			break;</div><div class='add'>+		AQ_HW_SLEEP(10);</div><div class='add'>+	}</div><div class='add'>+	if (!rbl_status || rbl_status == 0xDEAD) {</div><div class='add'>+		aq_pr_err("RBL Restart failed");</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* Restore NVR */</div><div class='add'>+	if (FORCE_FLASHLESS)</div><div class='add'>+		aq_hw_write_reg(self, 0x534, 0xA0);</div><div class='add'>+</div><div class='add'>+	if (rbl_status == 0xF1A7) {</div><div class='add'>+		aq_pr_err("No FW detected. Dynamic FW load not implemented\n");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (k = 0; k &lt; 1000; k++) {</div><div class='add'>+		u32 fw_state = aq_hw_read_reg(self, HW_ATL_MPI_FW_VERSION);</div><div class='add'>+</div><div class='add'>+		if (fw_state)</div><div class='add'>+			break;</div><div class='add'>+		AQ_HW_SLEEP(10);</div><div class='add'>+	}</div><div class='add'>+	if (k == 1000) {</div><div class='add'>+		aq_pr_err("FW kickstart failed\n");</div><div class='add'>+		return -EIO;</div><div class='add'>+	}</div><div class='add'>+	/* Old FW requires fixed delay after init */</div><div class='add'>+	AQ_HW_SLEEP(15);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hw_atl_utils_soft_reset(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	int ver = hw_atl_utils_get_fw_version(self);</div><div class='add'>+	u32 boot_exit_code = 0;</div><div class='add'>+	u32 val;</div><div class='add'>+	int k;</div><div class='add'>+</div><div class='add'>+	for (k = 0; k &lt; 1000; ++k) {</div><div class='add'>+		u32 flb_status = aq_hw_read_reg(self,</div><div class='add'>+						HW_ATL_MPI_DAISY_CHAIN_STATUS);</div><div class='add'>+		boot_exit_code = aq_hw_read_reg(self,</div><div class='add'>+						HW_ATL_MPI_BOOT_EXIT_CODE);</div><div class='add'>+		if (flb_status != 0x06000000 || boot_exit_code != 0)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (k == 1000) {</div><div class='add'>+		aq_pr_err("Neither RBL nor FLB firmware started\n");</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	self-&gt;rbl_enabled = (boot_exit_code != 0);</div><div class='add'>+</div><div class='add'>+	if (hw_atl_utils_ver_match(HW_ATL_FW_VER_1X, ver)) {</div><div class='add'>+		int err = 0;</div><div class='add'>+</div><div class='add'>+		/* FW 1.x may bootup in an invalid POWER state (WOL feature).</div><div class='add'>+		 * We should work around this by forcing its state back to DEINIT</div><div class='add'>+		 */</div><div class='add'>+		hw_atl_utils_mpi_set_state(self, MPI_DEINIT);</div><div class='add'>+		err = readx_poll_timeout_atomic(hw_atl_utils_mpi_get_state,</div><div class='add'>+						self, val,</div><div class='add'>+						(val &amp; HW_ATL_MPI_STATE_MSK) ==</div><div class='add'>+						 MPI_DEINIT,</div><div class='add'>+						10, 10000U);</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+	} else if (hw_atl_utils_ver_match(HW_ATL_FW_VER_4X, ver)) {</div><div class='add'>+		u64 sem_timeout = aq_hw_read_reg(self, HW_ATL_MIF_RESET_TIMEOUT_ADR);</div><div class='add'>+</div><div class='add'>+		/* Acquire 2 semaphores before issuing reset for FW 4.x */</div><div class='add'>+		if (sem_timeout &gt; 3000)</div><div class='add'>+			sem_timeout = 3000;</div><div class='add'>+		sem_timeout = sem_timeout * 1000;</div><div class='add'>+</div><div class='add'>+		if (sem_timeout != 0) {</div><div class='add'>+			int err;</div><div class='add'>+</div><div class='add'>+			err = readx_poll_timeout_atomic(hw_atl_sem_reset1_get, self, val,</div><div class='add'>+							val == 1U, 1U, sem_timeout);</div><div class='add'>+			if (err)</div><div class='add'>+				aq_pr_err("reset sema1 timeout");</div><div class='add'>+</div><div class='add'>+			err = readx_poll_timeout_atomic(hw_atl_sem_reset2_get, self, val,</div><div class='add'>+							val == 1U, 1U, sem_timeout);</div><div class='add'>+			if (err)</div><div class='add'>+				aq_pr_err("reset sema2 timeout");</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (self-&gt;rbl_enabled)</div><div class='add'>+		return hw_atl_utils_soft_reset_rbl(self);</div><div class='add'>+	else</div><div class='add'>+		return hw_atl_utils_soft_reset_flb(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hw_atl_utils_fw_downld_dwords(struct aq_hw_s *self, u32 a,</div><div class='add'>+				  u32 *p, u32 cnt)</div><div class='add'>+{</div><div class='add'>+	int err = 0;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	err = readx_poll_timeout_atomic(hw_atl_sem_ram_get,</div><div class='add'>+					self, val, val == 1U,</div><div class='add'>+					1U, 10000U);</div><div class='add'>+</div><div class='add'>+	if (err &lt; 0) {</div><div class='add'>+		bool is_locked;</div><div class='add'>+</div><div class='add'>+		hw_atl_reg_glb_cpu_sem_set(self, 1U, HW_ATL_FW_SM_RAM);</div><div class='add'>+		is_locked = hw_atl_sem_ram_get(self);</div><div class='add'>+		if (!is_locked) {</div><div class='add'>+			err = -ETIME;</div><div class='add'>+			goto err_exit;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	aq_hw_write_reg(self, HW_ATL_MIF_ADDR, a);</div><div class='add'>+</div><div class='add'>+	for (++cnt; --cnt &amp;&amp; !err;) {</div><div class='add'>+		aq_hw_write_reg(self, HW_ATL_MIF_CMD, 0x00008000U);</div><div class='add'>+</div><div class='add'>+		if (ATL_HW_IS_CHIP_FEATURE(self, REVISION_B1))</div><div class='add'>+			err = readx_poll_timeout_atomic(hw_atl_utils_mif_addr_get,</div><div class='add'>+							self, val, val != a,</div><div class='add'>+							1U, 1000U);</div><div class='add'>+		else</div><div class='add'>+			err = readx_poll_timeout_atomic(hw_atl_utils_mif_cmd_get,</div><div class='add'>+							self, val,</div><div class='add'>+							!(val &amp; 0x100),</div><div class='add'>+							1U, 1000U);</div><div class='add'>+</div><div class='add'>+		*(p++) = aq_hw_read_reg(self, HW_ATL_MIF_VAL);</div><div class='add'>+		a += 4;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hw_atl_reg_glb_cpu_sem_set(self, 1U, HW_ATL_FW_SM_RAM);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_utils_write_b1_mbox(struct aq_hw_s *self, u32 addr,</div><div class='add'>+				      u32 *p, u32 cnt, enum mcp_area area)</div><div class='add'>+{</div><div class='add'>+	u32 data_offset = 0;</div><div class='add'>+	u32 offset = addr;</div><div class='add'>+	int err = 0;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	switch (area) {</div><div class='add'>+	case MCP_AREA_CONFIG:</div><div class='add'>+		offset -= self-&gt;rpc_addr;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case MCP_AREA_SETTINGS:</div><div class='add'>+		offset -= self-&gt;settings_addr;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	offset = offset / sizeof(u32);</div><div class='add'>+</div><div class='add'>+	for (; data_offset &lt; cnt; ++data_offset, ++offset) {</div><div class='add'>+		aq_hw_write_reg(self, 0x328, p[data_offset]);</div><div class='add'>+		aq_hw_write_reg(self, 0x32C,</div><div class='add'>+				(area | (0xFFFF &amp; (offset * 4))));</div><div class='add'>+		hw_atl_mcp_up_force_intr_set(self, 1);</div><div class='add'>+		/* 1000 times by 10us = 10ms */</div><div class='add'>+		err = readx_poll_timeout_atomic(hw_atl_scrpad12_get,</div><div class='add'>+						self, val,</div><div class='add'>+						(val &amp; 0xF0000000) !=</div><div class='add'>+						area,</div><div class='add'>+						10U, 10000U);</div><div class='add'>+</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_utils_write_b0_mbox(struct aq_hw_s *self, u32 addr,</div><div class='add'>+				      u32 *p, u32 cnt)</div><div class='add'>+{</div><div class='add'>+	u32 offset = 0;</div><div class='add'>+	int err = 0;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	aq_hw_write_reg(self, 0x208, addr);</div><div class='add'>+</div><div class='add'>+	for (; offset &lt; cnt; ++offset) {</div><div class='add'>+		aq_hw_write_reg(self, 0x20C, p[offset]);</div><div class='add'>+		aq_hw_write_reg(self, 0x200, 0xC000);</div><div class='add'>+</div><div class='add'>+		err = readx_poll_timeout_atomic(hw_atl_utils_mif_cmd_get,</div><div class='add'>+						self, val,</div><div class='add'>+						(val &amp; 0x100) == 0U,</div><div class='add'>+						10U, 10000U);</div><div class='add'>+</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_utils_fw_upload_dwords(struct aq_hw_s *self, u32 addr, u32 *p,</div><div class='add'>+					 u32 cnt, enum mcp_area area)</div><div class='add'>+{</div><div class='add'>+	int err = 0;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	err = readx_poll_timeout_atomic(hw_atl_sem_ram_get, self,</div><div class='add'>+					val, val == 1U,</div><div class='add'>+					10U, 100000U);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	if (ATL_HW_IS_CHIP_FEATURE(self, REVISION_B1))</div><div class='add'>+		err = hw_atl_utils_write_b1_mbox(self, addr, p, cnt, area);</div><div class='add'>+	else</div><div class='add'>+		err = hw_atl_utils_write_b0_mbox(self, addr, p, cnt);</div><div class='add'>+</div><div class='add'>+	hw_atl_reg_glb_cpu_sem_set(self, 1U, HW_ATL_FW_SM_RAM);</div><div class='add'>+</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	err = aq_hw_err_from_flags(self);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hw_atl_write_fwcfg_dwords(struct aq_hw_s *self, u32 *p, u32 cnt)</div><div class='add'>+{</div><div class='add'>+	return hw_atl_utils_fw_upload_dwords(self, self-&gt;rpc_addr, p,</div><div class='add'>+					     cnt, MCP_AREA_CONFIG);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hw_atl_write_fwsettings_dwords(struct aq_hw_s *self, u32 offset, u32 *p,</div><div class='add'>+				   u32 cnt)</div><div class='add'>+{</div><div class='add'>+	return hw_atl_utils_fw_upload_dwords(self, self-&gt;settings_addr + offset,</div><div class='add'>+					     p, cnt, MCP_AREA_SETTINGS);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+bool hw_atl_utils_ver_match(u32 ver_expected, u32 ver_actual)</div><div class='add'>+{</div><div class='add'>+	const u32 dw_major_mask = 0xff000000U;</div><div class='add'>+	const u32 dw_minor_mask = 0x00ffffffU;</div><div class='add'>+	bool ver_match;</div><div class='add'>+</div><div class='add'>+	ver_match = (dw_major_mask &amp; (ver_expected ^ ver_actual)) ? false : true;</div><div class='add'>+	if (!ver_match)</div><div class='add'>+		goto err_exit;</div><div class='add'>+	ver_match = ((dw_minor_mask &amp; ver_expected) &gt; (dw_minor_mask &amp; ver_actual)) ?</div><div class='add'>+		false : true;</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return ver_match;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_utils_init_ucp(struct aq_hw_s *self,</div><div class='add'>+				 const struct aq_hw_caps_s *aq_hw_caps)</div><div class='add'>+{</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (!aq_hw_read_reg(self, 0x370U)) {</div><div class='add'>+		unsigned int rnd = 0U;</div><div class='add'>+		unsigned int ucp_0x370 = 0U;</div><div class='add'>+</div><div class='add'>+		get_random_bytes(&amp;rnd, sizeof(unsigned int));</div><div class='add'>+</div><div class='add'>+		ucp_0x370 = 0x02020202U | (0xFEFEFEFEU &amp; rnd);</div><div class='add'>+		aq_hw_write_reg(self, HW_ATL_UCP_0X370_REG, ucp_0x370);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hw_atl_reg_glb_cpu_scratch_scp_set(self, 0x00000000U, 25U);</div><div class='add'>+</div><div class='add'>+	/* check 10 times by 1ms */</div><div class='add'>+	err = readx_poll_timeout_atomic(hw_atl_scrpad25_get,</div><div class='add'>+					self, self-&gt;mbox_addr,</div><div class='add'>+					self-&gt;mbox_addr != 0U,</div><div class='add'>+					1000U, 10000U);</div><div class='add'>+	err = readx_poll_timeout_atomic(aq_fw1x_rpc_get, self,</div><div class='add'>+					self-&gt;rpc_addr,</div><div class='add'>+					self-&gt;rpc_addr != 0U,</div><div class='add'>+					1000U, 100000U);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct aq_hw_atl_utils_fw_rpc_tid_s {</div><div class='add'>+	union {</div><div class='add'>+		u32 val;</div><div class='add'>+		struct {</div><div class='add'>+			u16 tid;</div><div class='add'>+			u16 len;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define hw_atl_utils_fw_rpc_init(_H_) hw_atl_utils_fw_rpc_wait(_H_, NULL)</div><div class='add'>+</div><div class='add'>+int hw_atl_utils_fw_rpc_call(struct aq_hw_s *self, unsigned int rpc_size)</div><div class='add'>+{</div><div class='add'>+	struct aq_hw_atl_utils_fw_rpc_tid_s sw;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (!ATL_HW_IS_CHIP_FEATURE(self, MIPS)) {</div><div class='add'>+		err = -1;</div><div class='add'>+		goto err_exit;</div><div class='add'>+	}</div><div class='add'>+	err = hw_atl_write_fwcfg_dwords(self, (u32 *)(void *)&amp;self-&gt;rpc,</div><div class='add'>+					(rpc_size + sizeof(u32) -</div><div class='add'>+					 sizeof(u8)) / sizeof(u32));</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	sw.tid = 0xFFFFU &amp; (++self-&gt;rpc_tid);</div><div class='add'>+	sw.len = (u16)rpc_size;</div><div class='add'>+	aq_hw_write_reg(self, HW_ATL_RPC_CONTROL_ADR, sw.val);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hw_atl_utils_fw_rpc_wait(struct aq_hw_s *self,</div><div class='add'>+			     struct hw_atl_utils_fw_rpc **rpc)</div><div class='add'>+{</div><div class='add'>+	struct aq_hw_atl_utils_fw_rpc_tid_s sw;</div><div class='add'>+	struct aq_hw_atl_utils_fw_rpc_tid_s fw;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	do {</div><div class='add'>+		sw.val = aq_hw_read_reg(self, HW_ATL_RPC_CONTROL_ADR);</div><div class='add'>+</div><div class='add'>+		self-&gt;rpc_tid = sw.tid;</div><div class='add'>+</div><div class='add'>+		err = readx_poll_timeout_atomic(hw_atl_utils_rpc_state_get,</div><div class='add'>+						self, fw.val,</div><div class='add'>+						sw.tid == fw.tid,</div><div class='add'>+						1000U, 100000U);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			goto err_exit;</div><div class='add'>+</div><div class='add'>+		err = aq_hw_err_from_flags(self);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			goto err_exit;</div><div class='add'>+</div><div class='add'>+		if (fw.len == 0xFFFFU) {</div><div class='add'>+			if (sw.len &gt; sizeof(self-&gt;rpc)) {</div><div class='add'>+				printk(KERN_INFO "Invalid sw len: %x\n", sw.len);</div><div class='add'>+				err = -EINVAL;</div><div class='add'>+				goto err_exit;</div><div class='add'>+			}</div><div class='add'>+			err = hw_atl_utils_fw_rpc_call(self, sw.len);</div><div class='add'>+			if (err &lt; 0)</div><div class='add'>+				goto err_exit;</div><div class='add'>+		}</div><div class='add'>+	} while (sw.tid != fw.tid || 0xFFFFU == fw.len);</div><div class='add'>+</div><div class='add'>+	if (rpc) {</div><div class='add'>+		if (fw.len) {</div><div class='add'>+			if (fw.len &gt; sizeof(self-&gt;rpc)) {</div><div class='add'>+				printk(KERN_INFO "Invalid fw len: %x\n", fw.len);</div><div class='add'>+				err = -EINVAL;</div><div class='add'>+				goto err_exit;</div><div class='add'>+			}</div><div class='add'>+			err =</div><div class='add'>+			hw_atl_utils_fw_downld_dwords(self,</div><div class='add'>+						      self-&gt;rpc_addr,</div><div class='add'>+						      (u32 *)(void *)</div><div class='add'>+						      &amp;self-&gt;rpc,</div><div class='add'>+						      (fw.len + sizeof(u32) -</div><div class='add'>+						       sizeof(u8)) /</div><div class='add'>+						      sizeof(u32));</div><div class='add'>+			if (err &lt; 0)</div><div class='add'>+				goto err_exit;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		*rpc = &amp;self-&gt;rpc;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_utils_mpi_create(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	err = hw_atl_utils_init_ucp(self, self-&gt;aq_nic_cfg-&gt;aq_hw_caps);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	err = hw_atl_utils_fw_rpc_init(self);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hw_atl_utils_mpi_read_mbox(struct aq_hw_s *self,</div><div class='add'>+			       struct hw_atl_utils_mbox_header *pmbox)</div><div class='add'>+{</div><div class='add'>+	return hw_atl_utils_fw_downld_dwords(self,</div><div class='add'>+					     self-&gt;mbox_addr,</div><div class='add'>+					     (u32 *)(void *)pmbox,</div><div class='add'>+					     sizeof(*pmbox) / sizeof(u32));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_utils_mpi_read_stats(struct aq_hw_s *self,</div><div class='add'>+				 struct hw_atl_utils_mbox *pmbox)</div><div class='add'>+{</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	err = hw_atl_utils_fw_downld_dwords(self,</div><div class='add'>+					    self-&gt;mbox_addr,</div><div class='add'>+					    (u32 *)(void *)pmbox,</div><div class='add'>+					    sizeof(*pmbox) / sizeof(u32));</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	if (ATL_HW_IS_CHIP_FEATURE(self, REVISION_A0)) {</div><div class='add'>+		unsigned int mtu = self-&gt;aq_nic_cfg ?</div><div class='add'>+					self-&gt;aq_nic_cfg-&gt;mtu : 1514U;</div><div class='add'>+		pmbox-&gt;stats.ubrc = pmbox-&gt;stats.uprc * mtu;</div><div class='add'>+		pmbox-&gt;stats.ubtc = pmbox-&gt;stats.uptc * mtu;</div><div class='add'>+		pmbox-&gt;stats.dpc = atomic_read(&amp;self-&gt;dpc);</div><div class='add'>+	} else {</div><div class='add'>+		pmbox-&gt;stats.dpc = hw_atl_rpb_rx_dma_drop_pkt_cnt_get(self);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+err_exit:;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_utils_mpi_set_speed(struct aq_hw_s *self, u32 speed)</div><div class='add'>+{</div><div class='add'>+	u32 val = aq_hw_read_reg(self, HW_ATL_MPI_CONTROL_ADR);</div><div class='add'>+</div><div class='add'>+	val = val &amp; ~HW_ATL_MPI_SPEED_MSK;</div><div class='add'>+	val |= speed &lt;&lt; HW_ATL_MPI_SPEED_SHIFT;</div><div class='add'>+	aq_hw_write_reg(self, HW_ATL_MPI_CONTROL_ADR, val);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_utils_mpi_set_state(struct aq_hw_s *self,</div><div class='add'>+				      enum hal_atl_utils_fw_state_e state)</div><div class='add'>+{</div><div class='add'>+	u32 val = aq_hw_read_reg(self, HW_ATL_MPI_CONTROL_ADR);</div><div class='add'>+	struct hw_atl_utils_mbox_header mbox;</div><div class='add'>+	u32 transaction_id = 0;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (state == MPI_RESET) {</div><div class='add'>+		hw_atl_utils_mpi_read_mbox(self, &amp;mbox);</div><div class='add'>+</div><div class='add'>+		transaction_id = mbox.transaction_id;</div><div class='add'>+</div><div class='add'>+		err = readx_poll_timeout_atomic(hw_atl_utils_get_mpi_mbox_tid,</div><div class='add'>+						self, mbox.transaction_id,</div><div class='add'>+						transaction_id !=</div><div class='add'>+						mbox.transaction_id,</div><div class='add'>+						1000U, 100000U);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			goto err_exit;</div><div class='add'>+	}</div><div class='add'>+	/* On interface DEINIT we disable DW (raise bit)</div><div class='add'>+	 * Otherwise enable DW (clear bit)</div><div class='add'>+	 */</div><div class='add'>+	if (state == MPI_DEINIT || state == MPI_POWER)</div><div class='add'>+		val |= HW_ATL_MPI_DIRTY_WAKE_MSK;</div><div class='add'>+	else</div><div class='add'>+		val &amp;= ~HW_ATL_MPI_DIRTY_WAKE_MSK;</div><div class='add'>+</div><div class='add'>+	/* Set new state bits */</div><div class='add'>+	val = val &amp; ~HW_ATL_MPI_STATE_MSK;</div><div class='add'>+	val |= state &amp; HW_ATL_MPI_STATE_MSK;</div><div class='add'>+</div><div class='add'>+	aq_hw_write_reg(self, HW_ATL_MPI_CONTROL_ADR, val);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hw_atl_utils_mpi_get_link_status(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	struct aq_hw_link_status_s *link_status = &amp;self-&gt;aq_link_status;</div><div class='add'>+	u32 mpi_state;</div><div class='add'>+	u32 speed;</div><div class='add'>+</div><div class='add'>+	mpi_state = hw_atl_utils_mpi_get_state(self);</div><div class='add'>+	speed = mpi_state &gt;&gt; HW_ATL_MPI_SPEED_SHIFT;</div><div class='add'>+</div><div class='add'>+	if (!speed) {</div><div class='add'>+		link_status-&gt;mbps = 0U;</div><div class='add'>+	} else {</div><div class='add'>+		switch (speed) {</div><div class='add'>+		case HAL_ATLANTIC_RATE_10G:</div><div class='add'>+			link_status-&gt;mbps = 10000U;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case HAL_ATLANTIC_RATE_5G:</div><div class='add'>+		case HAL_ATLANTIC_RATE_5GSR:</div><div class='add'>+			link_status-&gt;mbps = 5000U;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case HAL_ATLANTIC_RATE_2G5:</div><div class='add'>+			link_status-&gt;mbps = 2500U;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case HAL_ATLANTIC_RATE_1G:</div><div class='add'>+			link_status-&gt;mbps = 1000U;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		case HAL_ATLANTIC_RATE_100M:</div><div class='add'>+			link_status-&gt;mbps = 100U;</div><div class='add'>+			break;</div><div class='add'>+</div><div class='add'>+		default:</div><div class='add'>+			return -EBUSY;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	link_status-&gt;full_duplex = true;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hw_atl_utils_get_mac_permanent(struct aq_hw_s *self,</div><div class='add'>+				   u8 *mac)</div><div class='add'>+{</div><div class='add'>+	u32 mac_addr[2];</div><div class='add'>+	u32 efuse_addr;</div><div class='add'>+	int err = 0;</div><div class='add'>+	u32 h = 0U;</div><div class='add'>+	u32 l = 0U;</div><div class='add'>+</div><div class='add'>+	if (!aq_hw_read_reg(self, HW_ATL_UCP_0X370_REG)) {</div><div class='add'>+		unsigned int ucp_0x370 = 0;</div><div class='add'>+		unsigned int rnd = 0;</div><div class='add'>+</div><div class='add'>+		get_random_bytes(&amp;rnd, sizeof(unsigned int));</div><div class='add'>+</div><div class='add'>+		ucp_0x370 = 0x02020202 | (0xFEFEFEFE &amp; rnd);</div><div class='add'>+		aq_hw_write_reg(self, HW_ATL_UCP_0X370_REG, ucp_0x370);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	efuse_addr = aq_hw_read_reg(self, 0x00000374U);</div><div class='add'>+</div><div class='add'>+	err = hw_atl_utils_fw_downld_dwords(self, efuse_addr + (40U * 4U),</div><div class='add'>+					    mac_addr, ARRAY_SIZE(mac_addr));</div><div class='add'>+	if (err &lt; 0) {</div><div class='add'>+		mac_addr[0] = 0U;</div><div class='add'>+		mac_addr[1] = 0U;</div><div class='add'>+		err = 0;</div><div class='add'>+	} else {</div><div class='add'>+		mac_addr[0] = __swab32(mac_addr[0]);</div><div class='add'>+		mac_addr[1] = __swab32(mac_addr[1]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ether_addr_copy(mac, (u8 *)mac_addr);</div><div class='add'>+</div><div class='add'>+	if ((mac[0] &amp; 0x01U) || ((mac[0] | mac[1] | mac[2]) == 0x00U)) {</div><div class='add'>+		/* chip revision */</div><div class='add'>+		l = 0xE3000000U |</div><div class='add'>+		    (0xFFFFU &amp; aq_hw_read_reg(self, HW_ATL_UCP_0X370_REG)) |</div><div class='add'>+		    (0x00 &lt;&lt; 16);</div><div class='add'>+		h = 0x8001300EU;</div><div class='add'>+</div><div class='add'>+		mac[5] = (u8)(0xFFU &amp; l);</div><div class='add'>+		l &gt;&gt;= 8;</div><div class='add'>+		mac[4] = (u8)(0xFFU &amp; l);</div><div class='add'>+		l &gt;&gt;= 8;</div><div class='add'>+		mac[3] = (u8)(0xFFU &amp; l);</div><div class='add'>+		l &gt;&gt;= 8;</div><div class='add'>+		mac[2] = (u8)(0xFFU &amp; l);</div><div class='add'>+		mac[1] = (u8)(0xFFU &amp; h);</div><div class='add'>+		h &gt;&gt;= 8;</div><div class='add'>+		mac[0] = (u8)(0xFFU &amp; h);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+unsigned int hw_atl_utils_mbps_2_speed_index(unsigned int mbps)</div><div class='add'>+{</div><div class='add'>+	unsigned int ret = 0U;</div><div class='add'>+</div><div class='add'>+	switch (mbps) {</div><div class='add'>+	case 100U:</div><div class='add'>+		ret = 5U;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case 1000U:</div><div class='add'>+		ret = 4U;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case 2500U:</div><div class='add'>+		ret = 3U;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case 5000U:</div><div class='add'>+		ret = 1U;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	case 10000U:</div><div class='add'>+		ret = 0U;</div><div class='add'>+		break;</div><div class='add'>+</div><div class='add'>+	default:</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl_utils_hw_chip_features_init(struct aq_hw_s *self, u32 *p)</div><div class='add'>+{</div><div class='add'>+	u32 val = hw_atl_reg_glb_mif_id_get(self);</div><div class='add'>+	u32 mif_rev = val &amp; 0xFFU;</div><div class='add'>+	u32 chip_features = 0U;</div><div class='add'>+</div><div class='add'>+	chip_features |= ATL_HW_CHIP_ATLANTIC;</div><div class='add'>+</div><div class='add'>+	if ((0xFU &amp; mif_rev) == 1U) {</div><div class='add'>+		chip_features |= ATL_HW_CHIP_REVISION_A0 |</div><div class='add'>+			ATL_HW_CHIP_MPI_AQ |</div><div class='add'>+			ATL_HW_CHIP_MIPS;</div><div class='add'>+	} else if ((0xFU &amp; mif_rev) == 2U) {</div><div class='add'>+		chip_features |= ATL_HW_CHIP_REVISION_B0 |</div><div class='add'>+			ATL_HW_CHIP_MPI_AQ |</div><div class='add'>+			ATL_HW_CHIP_MIPS |</div><div class='add'>+			ATL_HW_CHIP_TPO2 |</div><div class='add'>+			ATL_HW_CHIP_RPF2;</div><div class='add'>+	} else if ((0xFU &amp; mif_rev) == 0xAU) {</div><div class='add'>+		chip_features |= ATL_HW_CHIP_REVISION_B1 |</div><div class='add'>+			ATL_HW_CHIP_MPI_AQ |</div><div class='add'>+			ATL_HW_CHIP_MIPS |</div><div class='add'>+			ATL_HW_CHIP_TPO2 |</div><div class='add'>+			ATL_HW_CHIP_RPF2;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	*p = chip_features;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl_fw1x_deinit(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	hw_atl_utils_mpi_set_speed(self, 0);</div><div class='add'>+	hw_atl_utils_mpi_set_state(self, MPI_DEINIT);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hw_atl_utils_update_stats(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	struct aq_stats_s *cs = &amp;self-&gt;curr_stats;</div><div class='add'>+	struct aq_stats_s curr_stats = *cs;</div><div class='add'>+	struct hw_atl_utils_mbox mbox;</div><div class='add'>+	bool corrupted_stats = false;</div><div class='add'>+</div><div class='add'>+	hw_atl_utils_mpi_read_stats(self, &amp;mbox);</div><div class='add'>+</div><div class='add'>+#define AQ_SDELTA(_N_)  \</div><div class='add'>+do { \</div><div class='add'>+	if (!corrupted_stats &amp;&amp; \</div><div class='add'>+	    ((s64)(mbox.stats._N_ - self-&gt;last_stats._N_)) &gt;= 0) \</div><div class='add'>+		curr_stats._N_ += mbox.stats._N_ - self-&gt;last_stats._N_; \</div><div class='add'>+	else \</div><div class='add'>+		corrupted_stats = true; \</div><div class='add'>+} while (0)</div><div class='add'>+</div><div class='add'>+	if (self-&gt;aq_link_status.mbps) {</div><div class='add'>+		AQ_SDELTA(uprc);</div><div class='add'>+		AQ_SDELTA(mprc);</div><div class='add'>+		AQ_SDELTA(bprc);</div><div class='add'>+		AQ_SDELTA(erpt);</div><div class='add'>+</div><div class='add'>+		AQ_SDELTA(uptc);</div><div class='add'>+		AQ_SDELTA(mptc);</div><div class='add'>+		AQ_SDELTA(bptc);</div><div class='add'>+		AQ_SDELTA(erpr);</div><div class='add'>+</div><div class='add'>+		AQ_SDELTA(ubrc);</div><div class='add'>+		AQ_SDELTA(ubtc);</div><div class='add'>+		AQ_SDELTA(mbrc);</div><div class='add'>+		AQ_SDELTA(mbtc);</div><div class='add'>+		AQ_SDELTA(bbrc);</div><div class='add'>+		AQ_SDELTA(bbtc);</div><div class='add'>+		AQ_SDELTA(dpc);</div><div class='add'>+</div><div class='add'>+		if (!corrupted_stats)</div><div class='add'>+			*cs = curr_stats;</div><div class='add'>+	}</div><div class='add'>+#undef AQ_SDELTA</div><div class='add'>+</div><div class='add'>+	cs-&gt;dma_pkt_rc = hw_atl_stats_rx_dma_good_pkt_counter_get(self);</div><div class='add'>+	cs-&gt;dma_pkt_tc = hw_atl_stats_tx_dma_good_pkt_counter_get(self);</div><div class='add'>+	cs-&gt;dma_oct_rc = hw_atl_stats_rx_dma_good_octet_counter_get(self);</div><div class='add'>+	cs-&gt;dma_oct_tc = hw_atl_stats_tx_dma_good_octet_counter_get(self);</div><div class='add'>+</div><div class='add'>+	memcpy(&amp;self-&gt;last_stats, &amp;mbox.stats, sizeof(mbox.stats));</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+struct aq_stats_s *hw_atl_utils_get_hw_stats(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	return &amp;self-&gt;curr_stats;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static const u32 hw_atl_utils_hw_mac_regs[] = {</div><div class='add'>+	0x00005580U, 0x00005590U, 0x000055B0U, 0x000055B4U,</div><div class='add'>+	0x000055C0U, 0x00005B00U, 0x00005B04U, 0x00005B08U,</div><div class='add'>+	0x00005B0CU, 0x00005B10U, 0x00005B14U, 0x00005B18U,</div><div class='add'>+	0x00005B1CU, 0x00005B20U, 0x00005B24U, 0x00005B28U,</div><div class='add'>+	0x00005B2CU, 0x00005B30U, 0x00005B34U, 0x00005B38U,</div><div class='add'>+	0x00005B3CU, 0x00005B40U, 0x00005B44U, 0x00005B48U,</div><div class='add'>+	0x00005B4CU, 0x00005B50U, 0x00005B54U, 0x00005B58U,</div><div class='add'>+	0x00005B5CU, 0x00005B60U, 0x00005B64U, 0x00005B68U,</div><div class='add'>+	0x00005B6CU, 0x00005B70U, 0x00005B74U, 0x00005B78U,</div><div class='add'>+	0x00005B7CU, 0x00007C00U, 0x00007C04U, 0x00007C08U,</div><div class='add'>+	0x00007C0CU, 0x00007C10U, 0x00007C14U, 0x00007C18U,</div><div class='add'>+	0x00007C1CU, 0x00007C20U, 0x00007C40U, 0x00007C44U,</div><div class='add'>+	0x00007C48U, 0x00007C4CU, 0x00007C50U, 0x00007C54U,</div><div class='add'>+	0x00007C58U, 0x00007C5CU, 0x00007C60U, 0x00007C80U,</div><div class='add'>+	0x00007C84U, 0x00007C88U, 0x00007C8CU, 0x00007C90U,</div><div class='add'>+	0x00007C94U, 0x00007C98U, 0x00007C9CU, 0x00007CA0U,</div><div class='add'>+	0x00007CC0U, 0x00007CC4U, 0x00007CC8U, 0x00007CCCU,</div><div class='add'>+	0x00007CD0U, 0x00007CD4U, 0x00007CD8U, 0x00007CDCU,</div><div class='add'>+	0x00007CE0U, 0x00000300U, 0x00000304U, 0x00000308U,</div><div class='add'>+	0x0000030cU, 0x00000310U, 0x00000314U, 0x00000318U,</div><div class='add'>+	0x0000031cU, 0x00000360U, 0x00000364U, 0x00000368U,</div><div class='add'>+	0x0000036cU, 0x00000370U, 0x00000374U, 0x00006900U,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+int hw_atl_utils_hw_get_regs(struct aq_hw_s *self,</div><div class='add'>+			     const struct aq_hw_caps_s *aq_hw_caps,</div><div class='add'>+			     u32 *regs_buff)</div><div class='add'>+{</div><div class='add'>+	unsigned int i = 0U;</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; aq_hw_caps-&gt;mac_regs_count; i++)</div><div class='add'>+		regs_buff[i] = aq_hw_read_reg(self,</div><div class='add'>+					      hw_atl_utils_hw_mac_regs[i]);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl_utils_get_fw_version(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg(self, HW_ATL_MPI_FW_VERSION);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_fw1x_set_wake_magic(struct aq_hw_s *self, bool wol_enabled,</div><div class='add'>+				  const u8 *mac)</div><div class='add'>+{</div><div class='add'>+	struct hw_atl_utils_fw_rpc *prpc = NULL;</div><div class='add'>+	unsigned int rpc_size = 0U;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	err = hw_atl_utils_fw_rpc_wait(self, &amp;prpc);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	memset(prpc, 0, sizeof(*prpc));</div><div class='add'>+</div><div class='add'>+	if (wol_enabled) {</div><div class='add'>+		rpc_size = offsetof(struct hw_atl_utils_fw_rpc, msg_wol_add) +</div><div class='add'>+			   sizeof(prpc-&gt;msg_wol_add);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+		prpc-&gt;msg_id = HAL_ATLANTIC_UTILS_FW_MSG_WOL_ADD;</div><div class='add'>+		prpc-&gt;msg_wol_add.priority =</div><div class='add'>+				HAL_ATLANTIC_UTILS_FW_MSG_WOL_PRIOR;</div><div class='add'>+		prpc-&gt;msg_wol_add.pattern_id =</div><div class='add'>+				HAL_ATLANTIC_UTILS_FW_MSG_WOL_PATTERN;</div><div class='add'>+		prpc-&gt;msg_wol_add.packet_type =</div><div class='add'>+				HAL_ATLANTIC_UTILS_FW_MSG_WOL_MAG_PKT;</div><div class='add'>+</div><div class='add'>+		ether_addr_copy((u8 *)&amp;prpc-&gt;msg_wol_add.magic_packet_pattern,</div><div class='add'>+				mac);</div><div class='add'>+	} else {</div><div class='add'>+		rpc_size = sizeof(prpc-&gt;msg_wol_remove) +</div><div class='add'>+			   offsetof(struct hw_atl_utils_fw_rpc, msg_wol_remove);</div><div class='add'>+</div><div class='add'>+		prpc-&gt;msg_id = HAL_ATLANTIC_UTILS_FW_MSG_WOL_DEL;</div><div class='add'>+		prpc-&gt;msg_wol_add.pattern_id =</div><div class='add'>+				HAL_ATLANTIC_UTILS_FW_MSG_WOL_PATTERN;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = hw_atl_utils_fw_rpc_call(self, rpc_size);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_fw1x_set_power(struct aq_hw_s *self, unsigned int power_state,</div><div class='add'>+			     const u8 *mac)</div><div class='add'>+{</div><div class='add'>+	struct hw_atl_utils_fw_rpc *prpc = NULL;</div><div class='add'>+	unsigned int rpc_size = 0U;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (self-&gt;aq_nic_cfg-&gt;wol &amp; WAKE_MAGIC) {</div><div class='add'>+		err = aq_fw1x_set_wake_magic(self, 1, mac);</div><div class='add'>+</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			goto err_exit;</div><div class='add'>+</div><div class='add'>+		rpc_size = sizeof(prpc-&gt;msg_id) +</div><div class='add'>+			   sizeof(prpc-&gt;msg_enable_wakeup);</div><div class='add'>+</div><div class='add'>+		err = hw_atl_utils_fw_rpc_wait(self, &amp;prpc);</div><div class='add'>+</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			goto err_exit;</div><div class='add'>+</div><div class='add'>+		memset(prpc, 0, rpc_size);</div><div class='add'>+</div><div class='add'>+		prpc-&gt;msg_id = HAL_ATLANTIC_UTILS_FW_MSG_ENABLE_WAKEUP;</div><div class='add'>+		prpc-&gt;msg_enable_wakeup.pattern_mask = 0x00000002;</div><div class='add'>+</div><div class='add'>+		err = hw_atl_utils_fw_rpc_call(self, rpc_size);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			goto err_exit;</div><div class='add'>+	}</div><div class='add'>+	hw_atl_utils_mpi_set_speed(self, 0);</div><div class='add'>+	hw_atl_utils_mpi_set_state(self, MPI_POWER);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 hw_atl_utils_get_mpi_mbox_tid(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	struct hw_atl_utils_mbox_header mbox;</div><div class='add'>+</div><div class='add'>+	hw_atl_utils_mpi_read_mbox(self, &amp;mbox);</div><div class='add'>+</div><div class='add'>+	return mbox.transaction_id;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 hw_atl_utils_mpi_get_state(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg(self, HW_ATL_MPI_STATE_ADR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 hw_atl_utils_mif_cmd_get(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg(self, HW_ATL_MIF_CMD);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 hw_atl_utils_mif_addr_get(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg(self, HW_ATL_MIF_ADDR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 hw_atl_utils_rpc_state_get(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg(self, HW_ATL_RPC_STATE_ADR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 aq_fw1x_rpc_get(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg(self, HW_ATL_MPI_RPC_ADDR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct aq_fw_ops aq_fw_1x_ops = {</div><div class='add'>+	.init = hw_atl_utils_mpi_create,</div><div class='add'>+	.deinit = hw_atl_fw1x_deinit,</div><div class='add'>+	.reset = NULL,</div><div class='add'>+	.get_mac_permanent = hw_atl_utils_get_mac_permanent,</div><div class='add'>+	.set_link_speed = hw_atl_utils_mpi_set_speed,</div><div class='add'>+	.set_state = hw_atl_utils_mpi_set_state,</div><div class='add'>+	.update_link_status = hw_atl_utils_mpi_get_link_status,</div><div class='add'>+	.update_stats = hw_atl_utils_update_stats,</div><div class='add'>+	.get_mac_temp = NULL,</div><div class='add'>+	.get_phy_temp = NULL,</div><div class='add'>+	.set_power = aq_fw1x_set_power,</div><div class='add'>+	.set_eee_rate = NULL,</div><div class='add'>+	.get_eee_rate = NULL,</div><div class='add'>+	.set_flow_control = NULL,</div><div class='add'>+	.send_fw_request = NULL,</div><div class='add'>+	.enable_ptp = NULL,</div><div class='add'>+	.led_control = NULL,</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.h b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.h<br/>new file mode 100644<br/>index 000000000000..f6b990b7f5b4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.h</a></div><div class='hunk'>@@ -0,0 +1,642 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2014-2019 aQuantia Corporation</div><div class='add'>+ * Copyright (C) 2019-2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* File hw_atl_utils.h: Declaration of common functions for Atlantic hardware</div><div class='add'>+ * abstraction layer.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef HW_ATL_UTILS_H</div><div class='add'>+#define HW_ATL_UTILS_H</div><div class='add'>+</div><div class='add'>+#define HW_ATL_FLUSH() { (void)aq_hw_read_reg(self, 0x10); }</div><div class='add'>+</div><div class='add'>+/* Hardware tx descriptor */</div><div class='add'>+struct __packed hw_atl_txd_s {</div><div class='add'>+	u64 buf_addr;</div><div class='add'>+	u32 ctl;</div><div class='add'>+	u32 ctl2; /* 63..46 - payload length, 45 - ctx enable, 44 - ctx index */</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Hardware tx context descriptor */</div><div class='add'>+struct __packed hw_atl_txc_s {</div><div class='add'>+	u32 rsvd;</div><div class='add'>+	u32 len;</div><div class='add'>+	u32 ctl;</div><div class='add'>+	u32 len2;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Hardware rx descriptor */</div><div class='add'>+struct __packed hw_atl_rxd_s {</div><div class='add'>+	u64 buf_addr;</div><div class='add'>+	u64 hdr_addr;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Hardware rx descriptor writeback */</div><div class='add'>+struct __packed hw_atl_rxd_wb_s {</div><div class='add'>+	u32 type;</div><div class='add'>+	u32 rss_hash;</div><div class='add'>+	u16 status;</div><div class='add'>+	u16 pkt_len;</div><div class='add'>+	u16 next_desc_ptr;</div><div class='add'>+	__le16 vlan;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Hardware rx HW TIMESTAMP writeback */</div><div class='add'>+struct __packed hw_atl_rxd_hwts_wb_s {</div><div class='add'>+	u32 sec_hw;</div><div class='add'>+	u32 ns;</div><div class='add'>+	u32 sec_lw0;</div><div class='add'>+	u32 sec_lw1;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed hw_atl_stats_s {</div><div class='add'>+	u32 uprc;</div><div class='add'>+	u32 mprc;</div><div class='add'>+	u32 bprc;</div><div class='add'>+	u32 erpt;</div><div class='add'>+	u32 uptc;</div><div class='add'>+	u32 mptc;</div><div class='add'>+	u32 bptc;</div><div class='add'>+	u32 erpr;</div><div class='add'>+	u32 mbtc;</div><div class='add'>+	u32 bbtc;</div><div class='add'>+	u32 mbrc;</div><div class='add'>+	u32 bbrc;</div><div class='add'>+	u32 ubrc;</div><div class='add'>+	u32 ubtc;</div><div class='add'>+	u32 dpc;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed drv_msg_enable_wakeup {</div><div class='add'>+	union {</div><div class='add'>+		u32 pattern_mask;</div><div class='add'>+</div><div class='add'>+		struct {</div><div class='add'>+			u32 reason_arp_v4_pkt : 1;</div><div class='add'>+			u32 reason_ipv4_ping_pkt : 1;</div><div class='add'>+			u32 reason_ipv6_ns_pkt : 1;</div><div class='add'>+			u32 reason_ipv6_ping_pkt : 1;</div><div class='add'>+			u32 reason_link_up : 1;</div><div class='add'>+			u32 reason_link_down : 1;</div><div class='add'>+			u32 reason_maximum : 1;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	union {</div><div class='add'>+		u32 offload_mask;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed magic_packet_pattern_s {</div><div class='add'>+	u8 mac_addr[ETH_ALEN];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed drv_msg_wol_add {</div><div class='add'>+	u32 priority;</div><div class='add'>+	u32 packet_type;</div><div class='add'>+	u32 pattern_id;</div><div class='add'>+	u32 next_pattern_offset;</div><div class='add'>+</div><div class='add'>+	struct magic_packet_pattern_s magic_packet_pattern;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed drv_msg_wol_remove {</div><div class='add'>+	u32 id;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed hw_atl_utils_mbox_header {</div><div class='add'>+	u32 version;</div><div class='add'>+	u32 transaction_id;</div><div class='add'>+	u32 error;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed hw_atl_ptp_offset {</div><div class='add'>+	u16 ingress_100;</div><div class='add'>+	u16 egress_100;</div><div class='add'>+	u16 ingress_1000;</div><div class='add'>+	u16 egress_1000;</div><div class='add'>+	u16 ingress_2500;</div><div class='add'>+	u16 egress_2500;</div><div class='add'>+	u16 ingress_5000;</div><div class='add'>+	u16 egress_5000;</div><div class='add'>+	u16 ingress_10000;</div><div class='add'>+	u16 egress_10000;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed hw_atl_cable_diag {</div><div class='add'>+	u8 fault;</div><div class='add'>+	u8 distance;</div><div class='add'>+	u8 far_distance;</div><div class='add'>+	u8 reserved;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum gpio_pin_function {</div><div class='add'>+	GPIO_PIN_FUNCTION_NC,</div><div class='add'>+	GPIO_PIN_FUNCTION_VAUX_ENABLE,</div><div class='add'>+	GPIO_PIN_FUNCTION_EFUSE_BURN_ENABLE,</div><div class='add'>+	GPIO_PIN_FUNCTION_SFP_PLUS_DETECT,</div><div class='add'>+	GPIO_PIN_FUNCTION_TX_DISABLE,</div><div class='add'>+	GPIO_PIN_FUNCTION_RATE_SEL_0,</div><div class='add'>+	GPIO_PIN_FUNCTION_RATE_SEL_1,</div><div class='add'>+	GPIO_PIN_FUNCTION_TX_FAULT,</div><div class='add'>+	GPIO_PIN_FUNCTION_PTP0,</div><div class='add'>+	GPIO_PIN_FUNCTION_PTP1,</div><div class='add'>+	GPIO_PIN_FUNCTION_PTP2,</div><div class='add'>+	GPIO_PIN_FUNCTION_SIZE</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed hw_atl_info {</div><div class='add'>+	u8 reserved[6];</div><div class='add'>+	u16 phy_fault_code;</div><div class='add'>+	u16 phy_temperature;</div><div class='add'>+	u8 cable_len;</div><div class='add'>+	u8 reserved1;</div><div class='add'>+	struct hw_atl_cable_diag cable_diag_data[4];</div><div class='add'>+	struct hw_atl_ptp_offset ptp_offset;</div><div class='add'>+	u8 reserved2[12];</div><div class='add'>+	u32 caps_lo;</div><div class='add'>+	u32 caps_hi;</div><div class='add'>+	u32 reserved_datapath;</div><div class='add'>+	u32 reserved3[7];</div><div class='add'>+	u32 reserved_simpleresp[3];</div><div class='add'>+	u32 reserved_linkstat[7];</div><div class='add'>+	u32 reserved_wakes_count;</div><div class='add'>+	u32 reserved_eee_stat[12];</div><div class='add'>+	u32 tx_stuck_cnt;</div><div class='add'>+	u32 setting_address;</div><div class='add'>+	u32 setting_length;</div><div class='add'>+	u32 caps_ex;</div><div class='add'>+	enum gpio_pin_function gpio_pin[3];</div><div class='add'>+	u32 pcie_aer_dump[18];</div><div class='add'>+	u16 snr_margin[4];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed hw_atl_utils_mbox {</div><div class='add'>+	struct hw_atl_utils_mbox_header header;</div><div class='add'>+	struct hw_atl_stats_s stats;</div><div class='add'>+	struct hw_atl_info info;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed offload_ip_info {</div><div class='add'>+	u8 v4_local_addr_count;</div><div class='add'>+	u8 v4_addr_count;</div><div class='add'>+	u8 v6_local_addr_count;</div><div class='add'>+	u8 v6_addr_count;</div><div class='add'>+	u32 v4_addr;</div><div class='add'>+	u32 v4_prefix;</div><div class='add'>+	u32 v6_addr;</div><div class='add'>+	u32 v6_prefix;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed offload_port_info {</div><div class='add'>+	u16 udp_port_count;</div><div class='add'>+	u16 tcp_port_count;</div><div class='add'>+	u32 udp_port;</div><div class='add'>+	u32 tcp_port;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed offload_ka_info {</div><div class='add'>+	u16 v4_ka_count;</div><div class='add'>+	u16 v6_ka_count;</div><div class='add'>+	u32 retry_count;</div><div class='add'>+	u32 retry_interval;</div><div class='add'>+	u32 v4_ka;</div><div class='add'>+	u32 v6_ka;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed offload_rr_info {</div><div class='add'>+	u32 rr_count;</div><div class='add'>+	u32 rr_buf_len;</div><div class='add'>+	u32 rr_id_x;</div><div class='add'>+	u32 rr_buf;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed offload_info {</div><div class='add'>+	u32 version;</div><div class='add'>+	u32 len;</div><div class='add'>+	u8 mac_addr[ETH_ALEN];</div><div class='add'>+</div><div class='add'>+	u8 reserved[2];</div><div class='add'>+</div><div class='add'>+	struct offload_ip_info ips;</div><div class='add'>+	struct offload_port_info ports;</div><div class='add'>+	struct offload_ka_info kas;</div><div class='add'>+	struct offload_rr_info rrs;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed hw_atl_utils_fw_rpc {</div><div class='add'>+	u32 msg_id;</div><div class='add'>+</div><div class='add'>+	union {</div><div class='add'>+		/* fw1x structures */</div><div class='add'>+		struct drv_msg_wol_add msg_wol_add;</div><div class='add'>+		struct drv_msg_wol_remove msg_wol_remove;</div><div class='add'>+		struct drv_msg_enable_wakeup msg_enable_wakeup;</div><div class='add'>+		/* fw2x structures */</div><div class='add'>+		struct offload_info fw2x_offloads;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* Mailbox FW Request interface */</div><div class='add'>+struct __packed hw_fw_request_ptp_gpio_ctrl {</div><div class='add'>+	u32 index;</div><div class='add'>+	u32 period;</div><div class='add'>+	u64 start;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed hw_fw_request_ptp_adj_freq {</div><div class='add'>+	u32 ns_mac;</div><div class='add'>+	u32 fns_mac;</div><div class='add'>+	u32 ns_phy;</div><div class='add'>+	u32 fns_phy;</div><div class='add'>+	u32 mac_ns_adj;</div><div class='add'>+	u32 mac_fns_adj;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed hw_fw_request_ptp_adj_clock {</div><div class='add'>+	u32 ns;</div><div class='add'>+	u32 sec;</div><div class='add'>+	int sign;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define HW_AQ_FW_REQUEST_PTP_GPIO_CTRL	         0x11</div><div class='add'>+#define HW_AQ_FW_REQUEST_PTP_ADJ_FREQ	         0x12</div><div class='add'>+#define HW_AQ_FW_REQUEST_PTP_ADJ_CLOCK	         0x13</div><div class='add'>+</div><div class='add'>+struct __packed hw_fw_request_iface {</div><div class='add'>+	u32 msg_id;</div><div class='add'>+	union {</div><div class='add'>+		/* PTP FW Request */</div><div class='add'>+		struct hw_fw_request_ptp_gpio_ctrl ptp_gpio_ctrl;</div><div class='add'>+		struct hw_fw_request_ptp_adj_freq ptp_adj_freq;</div><div class='add'>+		struct hw_fw_request_ptp_adj_clock ptp_adj_clock;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed hw_atl_utils_settings {</div><div class='add'>+	u32 mtu;</div><div class='add'>+	u32 downshift_retry_count;</div><div class='add'>+	u32 link_pause_frame_quanta_100m;</div><div class='add'>+	u32 link_pause_frame_threshold_100m;</div><div class='add'>+	u32 link_pause_frame_quanta_1g;</div><div class='add'>+	u32 link_pause_frame_threshold_1g;</div><div class='add'>+	u32 link_pause_frame_quanta_2p5g;</div><div class='add'>+	u32 link_pause_frame_threshold_2p5g;</div><div class='add'>+	u32 link_pause_frame_quanta_5g;</div><div class='add'>+	u32 link_pause_frame_threshold_5g;</div><div class='add'>+	u32 link_pause_frame_quanta_10g;</div><div class='add'>+	u32 link_pause_frame_threshold_10g;</div><div class='add'>+	u32 pfc_quanta_class_0;</div><div class='add'>+	u32 pfc_threshold_class_0;</div><div class='add'>+	u32 pfc_quanta_class_1;</div><div class='add'>+	u32 pfc_threshold_class_1;</div><div class='add'>+	u32 pfc_quanta_class_2;</div><div class='add'>+	u32 pfc_threshold_class_2;</div><div class='add'>+	u32 pfc_quanta_class_3;</div><div class='add'>+	u32 pfc_threshold_class_3;</div><div class='add'>+	u32 pfc_quanta_class_4;</div><div class='add'>+	u32 pfc_threshold_class_4;</div><div class='add'>+	u32 pfc_quanta_class_5;</div><div class='add'>+	u32 pfc_threshold_class_5;</div><div class='add'>+	u32 pfc_quanta_class_6;</div><div class='add'>+	u32 pfc_threshold_class_6;</div><div class='add'>+	u32 pfc_quanta_class_7;</div><div class='add'>+	u32 pfc_threshold_class_7;</div><div class='add'>+	u32 eee_link_down_timeout;</div><div class='add'>+	u32 eee_link_up_timeout;</div><div class='add'>+	u32 eee_max_link_drops;</div><div class='add'>+	u32 eee_rates_mask;</div><div class='add'>+	u32 wake_timer;</div><div class='add'>+	u32 thermal_shutdown_off_temp;</div><div class='add'>+	u32 thermal_shutdown_warning_temp;</div><div class='add'>+	u32 thermal_shutdown_cold_temp;</div><div class='add'>+	u32 msm_options;</div><div class='add'>+	u32 dac_cable_serdes_modes;</div><div class='add'>+	u32 media_detect;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum macsec_msg_type {</div><div class='add'>+	macsec_cfg_msg = 0,</div><div class='add'>+	macsec_add_rx_sc_msg,</div><div class='add'>+	macsec_add_tx_sc_msg,</div><div class='add'>+	macsec_add_rx_sa_msg,</div><div class='add'>+	macsec_add_tx_sa_msg,</div><div class='add'>+	macsec_get_stats_msg,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed macsec_cfg_request {</div><div class='add'>+	u32 enabled;</div><div class='add'>+	u32 egress_threshold;</div><div class='add'>+	u32 ingress_threshold;</div><div class='add'>+	u32 interrupts_enabled;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed macsec_msg_fw_request {</div><div class='add'>+	u32 msg_id; /* not used */</div><div class='add'>+	u32 msg_type;</div><div class='add'>+	struct macsec_cfg_request cfg;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed macsec_msg_fw_response {</div><div class='add'>+	u32 result;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum hw_atl_rx_action_with_traffic {</div><div class='add'>+	HW_ATL_RX_DISCARD,</div><div class='add'>+	HW_ATL_RX_HOST,</div><div class='add'>+	HW_ATL_RX_MNGMNT,</div><div class='add'>+	HW_ATL_RX_HOST_AND_MNGMNT,</div><div class='add'>+	HW_ATL_RX_WOL</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct aq_rx_filter_vlan {</div><div class='add'>+	u8 enable;</div><div class='add'>+	u8 location;</div><div class='add'>+	u16 vlan_id;</div><div class='add'>+	u8 queue;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define HW_ATL_VLAN_MAX_FILTERS         16U</div><div class='add'>+</div><div class='add'>+struct aq_rx_filter_l2 {</div><div class='add'>+	s8 queue;</div><div class='add'>+	u8 location;</div><div class='add'>+	u8 user_priority_en;</div><div class='add'>+	u8 user_priority;</div><div class='add'>+	u16 ethertype;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct aq_rx_filter_l3l4 {</div><div class='add'>+	u32 cmd;</div><div class='add'>+	u8 location;</div><div class='add'>+	u32 ip_dst[4];</div><div class='add'>+	u32 ip_src[4];</div><div class='add'>+	u16 p_dst;</div><div class='add'>+	u16 p_src;</div><div class='add'>+	u8 is_ipv6;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum hw_atl_rx_protocol_value_l3l4 {</div><div class='add'>+	HW_ATL_RX_TCP,</div><div class='add'>+	HW_ATL_RX_UDP,</div><div class='add'>+	HW_ATL_RX_SCTP,</div><div class='add'>+	HW_ATL_RX_ICMP</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum hw_atl_rx_ctrl_registers_l3l4 {</div><div class='add'>+	HW_ATL_RX_ENABLE_MNGMNT_QUEUE_L3L4 = BIT(22),</div><div class='add'>+	HW_ATL_RX_ENABLE_QUEUE_L3L4        = BIT(23),</div><div class='add'>+	HW_ATL_RX_ENABLE_ARP_FLTR_L3       = BIT(24),</div><div class='add'>+	HW_ATL_RX_ENABLE_CMP_PROT_L4       = BIT(25),</div><div class='add'>+	HW_ATL_RX_ENABLE_CMP_DEST_PORT_L4  = BIT(26),</div><div class='add'>+	HW_ATL_RX_ENABLE_CMP_SRC_PORT_L4   = BIT(27),</div><div class='add'>+	HW_ATL_RX_ENABLE_CMP_DEST_ADDR_L3  = BIT(28),</div><div class='add'>+	HW_ATL_RX_ENABLE_CMP_SRC_ADDR_L3   = BIT(29),</div><div class='add'>+	HW_ATL_RX_ENABLE_L3_IPV6           = BIT(30),</div><div class='add'>+	HW_ATL_RX_ENABLE_FLTR_L3L4         = BIT(31)</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define HW_ATL_RX_QUEUE_FL3L4_SHIFT       8U</div><div class='add'>+#define HW_ATL_RX_ACTION_FL3F4_SHIFT      16U</div><div class='add'>+</div><div class='add'>+#define HW_ATL_RX_CNT_REG_ADDR_IPV6       4U</div><div class='add'>+</div><div class='add'>+#define HW_ATL_GET_REG_LOCATION_FL3L4(location) \</div><div class='add'>+	((location) - AQ_RX_FIRST_LOC_FL3L4)</div><div class='add'>+</div><div class='add'>+enum hal_atl_utils_fw_state_e {</div><div class='add'>+	MPI_DEINIT = 0,</div><div class='add'>+	MPI_RESET = 1,</div><div class='add'>+	MPI_INIT = 2,</div><div class='add'>+	MPI_POWER = 4,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define HAL_ATLANTIC_RATE_10G        BIT(0)</div><div class='add'>+#define HAL_ATLANTIC_RATE_5G         BIT(1)</div><div class='add'>+#define HAL_ATLANTIC_RATE_5GSR       BIT(2)</div><div class='add'>+#define HAL_ATLANTIC_RATE_2G5        BIT(3)</div><div class='add'>+#define HAL_ATLANTIC_RATE_1G         BIT(4)</div><div class='add'>+#define HAL_ATLANTIC_RATE_100M       BIT(5)</div><div class='add'>+#define HAL_ATLANTIC_RATE_INVALID    BIT(6)</div><div class='add'>+</div><div class='add'>+#define HAL_ATLANTIC_UTILS_FW_MSG_WOL_ADD       0x4U</div><div class='add'>+#define HAL_ATLANTIC_UTILS_FW_MSG_WOL_PRIOR     0x10000000U</div><div class='add'>+#define HAL_ATLANTIC_UTILS_FW_MSG_WOL_PATTERN   0x1U</div><div class='add'>+#define HAL_ATLANTIC_UTILS_FW_MSG_WOL_MAG_PKT   0x2U</div><div class='add'>+#define HAL_ATLANTIC_UTILS_FW_MSG_WOL_DEL       0x5U</div><div class='add'>+#define HAL_ATLANTIC_UTILS_FW_MSG_ENABLE_WAKEUP 0x6U</div><div class='add'>+</div><div class='add'>+enum hw_atl_fw2x_rate {</div><div class='add'>+	FW2X_RATE_100M    = 0x20,</div><div class='add'>+	FW2X_RATE_1G      = 0x100,</div><div class='add'>+	FW2X_RATE_2G5     = 0x200,</div><div class='add'>+	FW2X_RATE_5G      = 0x400,</div><div class='add'>+	FW2X_RATE_10G     = 0x800,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* 0x370</div><div class='add'>+ * Link capabilities resolution register</div><div class='add'>+ */</div><div class='add'>+enum hw_atl_fw2x_caps_lo {</div><div class='add'>+	CAPS_LO_10BASET_HD        = 0,</div><div class='add'>+	CAPS_LO_10BASET_FD,</div><div class='add'>+	CAPS_LO_100BASETX_HD,</div><div class='add'>+	CAPS_LO_100BASET4_HD,</div><div class='add'>+	CAPS_LO_100BASET2_HD,</div><div class='add'>+	CAPS_LO_100BASETX_FD      = 5,</div><div class='add'>+	CAPS_LO_100BASET2_FD,</div><div class='add'>+	CAPS_LO_1000BASET_HD,</div><div class='add'>+	CAPS_LO_1000BASET_FD,</div><div class='add'>+	CAPS_LO_2P5GBASET_FD,</div><div class='add'>+	CAPS_LO_5GBASET_FD        = 10,</div><div class='add'>+	CAPS_LO_10GBASET_FD,</div><div class='add'>+	CAPS_LO_AUTONEG,</div><div class='add'>+	CAPS_LO_SMBUS_READ,</div><div class='add'>+	CAPS_LO_SMBUS_WRITE,</div><div class='add'>+	CAPS_LO_MACSEC            = 15,</div><div class='add'>+	CAPS_LO_RESERVED1,</div><div class='add'>+	CAPS_LO_WAKE_ON_LINK_FORCED,</div><div class='add'>+	CAPS_LO_HIGH_TEMP_WARNING = 29,</div><div class='add'>+	CAPS_LO_DRIVER_SCRATCHPAD = 30,</div><div class='add'>+	CAPS_LO_GLOBAL_FAULT      = 31</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* 0x374</div><div class='add'>+ * Status register</div><div class='add'>+ */</div><div class='add'>+enum hw_atl_fw2x_caps_hi {</div><div class='add'>+	CAPS_HI_TPO2EN            = 0,</div><div class='add'>+	CAPS_HI_10BASET_EEE,</div><div class='add'>+	CAPS_HI_RESERVED2,</div><div class='add'>+	CAPS_HI_PAUSE,</div><div class='add'>+	CAPS_HI_ASYMMETRIC_PAUSE,</div><div class='add'>+	CAPS_HI_100BASETX_EEE     = 5,</div><div class='add'>+	CAPS_HI_PHY_BUF_SEND,</div><div class='add'>+	CAPS_HI_PHY_BUF_RECV,</div><div class='add'>+	CAPS_HI_1000BASET_FD_EEE,</div><div class='add'>+	CAPS_HI_2P5GBASET_FD_EEE,</div><div class='add'>+	CAPS_HI_5GBASET_FD_EEE    = 10,</div><div class='add'>+	CAPS_HI_10GBASET_FD_EEE,</div><div class='add'>+	CAPS_HI_FW_REQUEST,</div><div class='add'>+	CAPS_HI_PHY_LOG,</div><div class='add'>+	CAPS_HI_EEE_AUTO_DISABLE_SETTINGS,</div><div class='add'>+	CAPS_HI_PFC               = 15,</div><div class='add'>+	CAPS_HI_WAKE_ON_LINK,</div><div class='add'>+	CAPS_HI_CABLE_DIAG,</div><div class='add'>+	CAPS_HI_TEMPERATURE,</div><div class='add'>+	CAPS_HI_DOWNSHIFT,</div><div class='add'>+	CAPS_HI_PTP_AVB_EN_FW2X   = 20,</div><div class='add'>+	CAPS_HI_THERMAL_SHUTDOWN,</div><div class='add'>+	CAPS_HI_LINK_DROP,</div><div class='add'>+	CAPS_HI_SLEEP_PROXY,</div><div class='add'>+	CAPS_HI_WOL,</div><div class='add'>+	CAPS_HI_MAC_STOP          = 25,</div><div class='add'>+	CAPS_HI_EXT_LOOPBACK,</div><div class='add'>+	CAPS_HI_INT_LOOPBACK,</div><div class='add'>+	CAPS_HI_EFUSE_AGENT,</div><div class='add'>+	CAPS_HI_WOL_TIMER,</div><div class='add'>+	CAPS_HI_STATISTICS        = 30,</div><div class='add'>+	CAPS_HI_TRANSACTION_ID,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/* 0x36C</div><div class='add'>+ * Control register</div><div class='add'>+ */</div><div class='add'>+enum hw_atl_fw2x_ctrl {</div><div class='add'>+	CTRL_RESERVED1            = 0,</div><div class='add'>+	CTRL_RESERVED2,</div><div class='add'>+	CTRL_RESERVED3,</div><div class='add'>+	CTRL_PAUSE,</div><div class='add'>+	CTRL_ASYMMETRIC_PAUSE,</div><div class='add'>+	CTRL_RESERVED4            = 5,</div><div class='add'>+	CTRL_RESERVED5,</div><div class='add'>+	CTRL_RESERVED6,</div><div class='add'>+	CTRL_1GBASET_FD_EEE,</div><div class='add'>+	CTRL_2P5GBASET_FD_EEE,</div><div class='add'>+	CTRL_5GBASET_FD_EEE       = 10,</div><div class='add'>+	CTRL_10GBASET_FD_EEE,</div><div class='add'>+	CTRL_THERMAL_SHUTDOWN,</div><div class='add'>+	CTRL_PHY_LOGS,</div><div class='add'>+	CTRL_EEE_AUTO_DISABLE,</div><div class='add'>+	CTRL_PFC                  = 15,</div><div class='add'>+	CTRL_WAKE_ON_LINK,</div><div class='add'>+	CTRL_CABLE_DIAG,</div><div class='add'>+	CTRL_TEMPERATURE,</div><div class='add'>+	CTRL_DOWNSHIFT,</div><div class='add'>+	CTRL_PTP_AVB              = 20,</div><div class='add'>+	CTRL_RESERVED7,</div><div class='add'>+	CTRL_LINK_DROP,</div><div class='add'>+	CTRL_SLEEP_PROXY,</div><div class='add'>+	CTRL_WOL,</div><div class='add'>+	CTRL_MAC_STOP             = 25,</div><div class='add'>+	CTRL_EXT_LOOPBACK,</div><div class='add'>+	CTRL_INT_LOOPBACK,</div><div class='add'>+	CTRL_RESERVED8,</div><div class='add'>+	CTRL_WOL_TIMER,</div><div class='add'>+	CTRL_STATISTICS           = 30,</div><div class='add'>+	CTRL_FORCE_RECONNECT,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+enum hw_atl_caps_ex {</div><div class='add'>+	CAPS_EX_LED_CONTROL       =  0,</div><div class='add'>+	CAPS_EX_LED0_MODE_LO,</div><div class='add'>+	CAPS_EX_LED0_MODE_HI,</div><div class='add'>+	CAPS_EX_LED1_MODE_LO,</div><div class='add'>+	CAPS_EX_LED1_MODE_HI,</div><div class='add'>+	CAPS_EX_LED2_MODE_LO      =  5,</div><div class='add'>+	CAPS_EX_LED2_MODE_HI,</div><div class='add'>+	CAPS_EX_RESERVED07,</div><div class='add'>+	CAPS_EX_RESERVED08,</div><div class='add'>+	CAPS_EX_RESERVED09,</div><div class='add'>+	CAPS_EX_RESERVED10        = 10,</div><div class='add'>+	CAPS_EX_RESERVED11,</div><div class='add'>+	CAPS_EX_RESERVED12,</div><div class='add'>+	CAPS_EX_RESERVED13,</div><div class='add'>+	CAPS_EX_RESERVED14,</div><div class='add'>+	CAPS_EX_RESERVED15        = 15,</div><div class='add'>+	CAPS_EX_PHY_PTP_EN,</div><div class='add'>+	CAPS_EX_MAC_PTP_EN,</div><div class='add'>+	CAPS_EX_EXT_CLK_EN,</div><div class='add'>+	CAPS_EX_SCHED_DMA_EN,</div><div class='add'>+	CAPS_EX_PTP_GPIO_EN       = 20,</div><div class='add'>+	CAPS_EX_UPDATE_SETTINGS,</div><div class='add'>+	CAPS_EX_PHY_CTRL_TS_PIN,</div><div class='add'>+	CAPS_EX_SNR_OPERATING_MARGIN,</div><div class='add'>+	CAPS_EX_RESERVED24,</div><div class='add'>+	CAPS_EX_RESERVED25        = 25,</div><div class='add'>+	CAPS_EX_RESERVED26,</div><div class='add'>+	CAPS_EX_RESERVED27,</div><div class='add'>+	CAPS_EX_RESERVED28,</div><div class='add'>+	CAPS_EX_RESERVED29,</div><div class='add'>+	CAPS_EX_RESERVED30        = 30,</div><div class='add'>+	CAPS_EX_RESERVED31</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct aq_hw_s;</div><div class='add'>+struct aq_fw_ops;</div><div class='add'>+struct aq_hw_caps_s;</div><div class='add'>+struct aq_hw_link_status_s;</div><div class='add'>+</div><div class='add'>+int hw_atl_utils_initfw(struct aq_hw_s *self, const struct aq_fw_ops **fw_ops);</div><div class='add'>+</div><div class='add'>+int hw_atl_utils_soft_reset(struct aq_hw_s *self);</div><div class='add'>+</div><div class='add'>+void hw_atl_utils_hw_chip_features_init(struct aq_hw_s *self, u32 *p);</div><div class='add'>+</div><div class='add'>+int hw_atl_utils_mpi_read_mbox(struct aq_hw_s *self,</div><div class='add'>+			       struct hw_atl_utils_mbox_header *pmbox);</div><div class='add'>+</div><div class='add'>+void hw_atl_utils_mpi_read_stats(struct aq_hw_s *self,</div><div class='add'>+				 struct hw_atl_utils_mbox *pmbox);</div><div class='add'>+</div><div class='add'>+void hw_atl_utils_mpi_set(struct aq_hw_s *self,</div><div class='add'>+			  enum hal_atl_utils_fw_state_e state,</div><div class='add'>+			  u32 speed);</div><div class='add'>+</div><div class='add'>+int hw_atl_utils_mpi_get_link_status(struct aq_hw_s *self);</div><div class='add'>+</div><div class='add'>+int hw_atl_utils_get_mac_permanent(struct aq_hw_s *self,</div><div class='add'>+				   u8 *mac);</div><div class='add'>+</div><div class='add'>+unsigned int hw_atl_utils_mbps_2_speed_index(unsigned int mbps);</div><div class='add'>+</div><div class='add'>+int hw_atl_utils_hw_get_regs(struct aq_hw_s *self,</div><div class='add'>+			     const struct aq_hw_caps_s *aq_hw_caps,</div><div class='add'>+			     u32 *regs_buff);</div><div class='add'>+</div><div class='add'>+int hw_atl_utils_hw_set_power(struct aq_hw_s *self,</div><div class='add'>+			      unsigned int power_state);</div><div class='add'>+</div><div class='add'>+int hw_atl_utils_hw_deinit(struct aq_hw_s *self);</div><div class='add'>+</div><div class='add'>+u32 hw_atl_utils_get_fw_version(struct aq_hw_s *self);</div><div class='add'>+</div><div class='add'>+int hw_atl_utils_update_stats(struct aq_hw_s *self);</div><div class='add'>+</div><div class='add'>+struct aq_stats_s *hw_atl_utils_get_hw_stats(struct aq_hw_s *self);</div><div class='add'>+</div><div class='add'>+int hw_atl_utils_fw_downld_dwords(struct aq_hw_s *self, u32 a,</div><div class='add'>+				  u32 *p, u32 cnt);</div><div class='add'>+</div><div class='add'>+int hw_atl_write_fwcfg_dwords(struct aq_hw_s *self, u32 *p, u32 cnt);</div><div class='add'>+</div><div class='add'>+int hw_atl_write_fwsettings_dwords(struct aq_hw_s *self, u32 offset, u32 *p,</div><div class='add'>+				   u32 cnt);</div><div class='add'>+</div><div class='add'>+int hw_atl_utils_fw_set_wol(struct aq_hw_s *self, bool wol_enabled, u8 *mac);</div><div class='add'>+</div><div class='add'>+int hw_atl_utils_fw_rpc_call(struct aq_hw_s *self, unsigned int rpc_size);</div><div class='add'>+</div><div class='add'>+int hw_atl_utils_fw_rpc_wait(struct aq_hw_s *self,</div><div class='add'>+			     struct hw_atl_utils_fw_rpc **rpc);</div><div class='add'>+</div><div class='add'>+bool hw_atl_utils_ver_match(u32 ver_expected, u32 ver_actual);</div><div class='add'>+</div><div class='add'>+extern const struct aq_fw_ops aq_fw_1x_ops;</div><div class='add'>+extern const struct aq_fw_ops aq_fw_2x_ops;</div><div class='add'>+</div><div class='add'>+#endif /* HW_ATL_UTILS_H */</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils_fw2x.c b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils_fw2x.c<br/>new file mode 100644<br/>index 000000000000..4d4cfbc91e19<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils_fw2x.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils_fw2x.c</a></div><div class='hunk'>@@ -0,0 +1,732 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ *</div><div class='add'>+ * Copyright (C) 2014-2019 aQuantia Corporation</div><div class='add'>+ * Copyright (C) 2019-2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* File hw_atl_utils_fw2x.c: Definition of firmware 2.x functions for</div><div class='add'>+ * Atlantic hardware abstraction layer.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "../aq_hw.h"</div><div class='add'>+#include "../aq_hw_utils.h"</div><div class='add'>+#include "../aq_pci_func.h"</div><div class='add'>+#include "../aq_ring.h"</div><div class='add'>+#include "../aq_vec.h"</div><div class='add'>+#include "../aq_nic.h"</div><div class='add'>+#include "hw_atl_utils.h"</div><div class='add'>+#include "hw_atl_llh.h"</div><div class='add'>+</div><div class='add'>+#define HW_ATL_FW2X_MPI_LED_ADDR         0x31c</div><div class='add'>+#define HW_ATL_FW2X_MPI_RPC_ADDR         0x334</div><div class='add'>+</div><div class='add'>+#define HW_ATL_FW2X_MPI_MBOX_ADDR        0x360</div><div class='add'>+#define HW_ATL_FW2X_MPI_EFUSE_ADDR       0x364</div><div class='add'>+#define HW_ATL_FW2X_MPI_CONTROL_ADDR     0x368</div><div class='add'>+#define HW_ATL_FW2X_MPI_CONTROL2_ADDR    0x36C</div><div class='add'>+#define HW_ATL_FW2X_MPI_STATE_ADDR       0x370</div><div class='add'>+#define HW_ATL_FW2X_MPI_STATE2_ADDR      0x374</div><div class='add'>+</div><div class='add'>+#define HW_ATL_FW3X_EXT_CONTROL_ADDR     0x378</div><div class='add'>+#define HW_ATL_FW3X_EXT_STATE_ADDR       0x37c</div><div class='add'>+</div><div class='add'>+#define HW_ATL_FW3X_PTP_ADJ_LSW_ADDR	 0x50a0</div><div class='add'>+#define HW_ATL_FW3X_PTP_ADJ_MSW_ADDR	 0x50a4</div><div class='add'>+</div><div class='add'>+#define HW_ATL_FW2X_CAP_PAUSE            BIT(CAPS_HI_PAUSE)</div><div class='add'>+#define HW_ATL_FW2X_CAP_ASYM_PAUSE       BIT(CAPS_HI_ASYMMETRIC_PAUSE)</div><div class='add'>+#define HW_ATL_FW2X_CAP_SLEEP_PROXY      BIT(CAPS_HI_SLEEP_PROXY)</div><div class='add'>+#define HW_ATL_FW2X_CAP_WOL              BIT(CAPS_HI_WOL)</div><div class='add'>+</div><div class='add'>+#define HW_ATL_FW2X_CTRL_WAKE_ON_LINK     BIT(CTRL_WAKE_ON_LINK)</div><div class='add'>+#define HW_ATL_FW2X_CTRL_SLEEP_PROXY      BIT(CTRL_SLEEP_PROXY)</div><div class='add'>+#define HW_ATL_FW2X_CTRL_WOL              BIT(CTRL_WOL)</div><div class='add'>+#define HW_ATL_FW2X_CTRL_LINK_DROP        BIT(CTRL_LINK_DROP)</div><div class='add'>+#define HW_ATL_FW2X_CTRL_PAUSE            BIT(CTRL_PAUSE)</div><div class='add'>+#define HW_ATL_FW2X_CTRL_TEMPERATURE      BIT(CTRL_TEMPERATURE)</div><div class='add'>+#define HW_ATL_FW2X_CTRL_ASYMMETRIC_PAUSE BIT(CTRL_ASYMMETRIC_PAUSE)</div><div class='add'>+#define HW_ATL_FW2X_CTRL_INT_LOOPBACK     BIT(CTRL_INT_LOOPBACK)</div><div class='add'>+#define HW_ATL_FW2X_CTRL_EXT_LOOPBACK     BIT(CTRL_EXT_LOOPBACK)</div><div class='add'>+#define HW_ATL_FW2X_CTRL_DOWNSHIFT        BIT(CTRL_DOWNSHIFT)</div><div class='add'>+#define HW_ATL_FW2X_CTRL_FORCE_RECONNECT  BIT(CTRL_FORCE_RECONNECT)</div><div class='add'>+</div><div class='add'>+#define HW_ATL_FW2X_CAP_EEE_1G_MASK      BIT(CAPS_HI_1000BASET_FD_EEE)</div><div class='add'>+#define HW_ATL_FW2X_CAP_EEE_2G5_MASK     BIT(CAPS_HI_2P5GBASET_FD_EEE)</div><div class='add'>+#define HW_ATL_FW2X_CAP_EEE_5G_MASK      BIT(CAPS_HI_5GBASET_FD_EEE)</div><div class='add'>+#define HW_ATL_FW2X_CAP_EEE_10G_MASK     BIT(CAPS_HI_10GBASET_FD_EEE)</div><div class='add'>+</div><div class='add'>+#define HW_ATL_FW2X_CAP_MACSEC           BIT(CAPS_LO_MACSEC)</div><div class='add'>+</div><div class='add'>+#define HAL_ATLANTIC_WOL_FILTERS_COUNT   8</div><div class='add'>+#define HAL_ATLANTIC_UTILS_FW2X_MSG_WOL  0x0E</div><div class='add'>+</div><div class='add'>+#define HW_ATL_FW_VER_LED                0x03010026U</div><div class='add'>+#define HW_ATL_FW_VER_MEDIA_CONTROL      0x0301005aU</div><div class='add'>+</div><div class='add'>+struct __packed fw2x_msg_wol_pattern {</div><div class='add'>+	u8 mask[16];</div><div class='add'>+	u32 crc;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed fw2x_msg_wol {</div><div class='add'>+	u32 msg_id;</div><div class='add'>+	u8 hw_addr[ETH_ALEN];</div><div class='add'>+	u8 magic_packet_enabled;</div><div class='add'>+	u8 filter_count;</div><div class='add'>+	struct fw2x_msg_wol_pattern filter[HAL_ATLANTIC_WOL_FILTERS_COUNT];</div><div class='add'>+	u8 link_up_enabled;</div><div class='add'>+	u8 link_down_enabled;</div><div class='add'>+	u16 reserved;</div><div class='add'>+	u32 link_up_timeout;</div><div class='add'>+	u32 link_down_timeout;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static int aq_fw2x_set_link_speed(struct aq_hw_s *self, u32 speed);</div><div class='add'>+static int aq_fw2x_set_state(struct aq_hw_s *self,</div><div class='add'>+			     enum hal_atl_utils_fw_state_e state);</div><div class='add'>+</div><div class='add'>+static u32 aq_fw2x_mbox_get(struct aq_hw_s *self);</div><div class='add'>+static u32 aq_fw2x_rpc_get(struct aq_hw_s *self);</div><div class='add'>+static int aq_fw2x_settings_get(struct aq_hw_s *self, u32 *addr);</div><div class='add'>+static u32 aq_fw2x_state_get(struct aq_hw_s *self);</div><div class='add'>+static u32 aq_fw2x_state2_get(struct aq_hw_s *self);</div><div class='add'>+</div><div class='add'>+static int aq_fw2x_init(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	/* check 10 times by 1ms */</div><div class='add'>+	err = readx_poll_timeout_atomic(aq_fw2x_mbox_get,</div><div class='add'>+					self, self-&gt;mbox_addr,</div><div class='add'>+					self-&gt;mbox_addr != 0U,</div><div class='add'>+					1000U, 10000U);</div><div class='add'>+</div><div class='add'>+	err = readx_poll_timeout_atomic(aq_fw2x_rpc_get,</div><div class='add'>+					self, self-&gt;rpc_addr,</div><div class='add'>+					self-&gt;rpc_addr != 0U,</div><div class='add'>+					1000U, 100000U);</div><div class='add'>+</div><div class='add'>+	err = aq_fw2x_settings_get(self, &amp;self-&gt;settings_addr);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_fw2x_deinit(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	int err = aq_fw2x_set_link_speed(self, 0);</div><div class='add'>+</div><div class='add'>+	if (!err)</div><div class='add'>+		err = aq_fw2x_set_state(self, MPI_DEINIT);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static enum hw_atl_fw2x_rate link_speed_mask_2fw2x_ratemask(u32 speed)</div><div class='add'>+{</div><div class='add'>+	enum hw_atl_fw2x_rate rate = 0;</div><div class='add'>+</div><div class='add'>+	if (speed &amp; AQ_NIC_RATE_10G)</div><div class='add'>+		rate |= FW2X_RATE_10G;</div><div class='add'>+</div><div class='add'>+	if (speed &amp; AQ_NIC_RATE_5G)</div><div class='add'>+		rate |= FW2X_RATE_5G;</div><div class='add'>+</div><div class='add'>+	if (speed &amp; AQ_NIC_RATE_2G5)</div><div class='add'>+		rate |= FW2X_RATE_2G5;</div><div class='add'>+</div><div class='add'>+	if (speed &amp; AQ_NIC_RATE_1G)</div><div class='add'>+		rate |= FW2X_RATE_1G;</div><div class='add'>+</div><div class='add'>+	if (speed &amp; AQ_NIC_RATE_100M)</div><div class='add'>+		rate |= FW2X_RATE_100M;</div><div class='add'>+</div><div class='add'>+	return rate;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 fw2x_to_eee_mask(u32 speed)</div><div class='add'>+{</div><div class='add'>+	u32 rate = 0;</div><div class='add'>+</div><div class='add'>+	if (speed &amp; HW_ATL_FW2X_CAP_EEE_10G_MASK)</div><div class='add'>+		rate |= AQ_NIC_RATE_EEE_10G;</div><div class='add'>+	if (speed &amp; HW_ATL_FW2X_CAP_EEE_5G_MASK)</div><div class='add'>+		rate |= AQ_NIC_RATE_EEE_5G;</div><div class='add'>+	if (speed &amp; HW_ATL_FW2X_CAP_EEE_2G5_MASK)</div><div class='add'>+		rate |= AQ_NIC_RATE_EEE_2G5;</div><div class='add'>+	if (speed &amp; HW_ATL_FW2X_CAP_EEE_1G_MASK)</div><div class='add'>+		rate |= AQ_NIC_RATE_EEE_1G;</div><div class='add'>+</div><div class='add'>+	return rate;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 eee_mask_to_fw2x(u32 speed)</div><div class='add'>+{</div><div class='add'>+	u32 rate = 0;</div><div class='add'>+</div><div class='add'>+	if (speed &amp; AQ_NIC_RATE_EEE_10G)</div><div class='add'>+		rate |= HW_ATL_FW2X_CAP_EEE_10G_MASK;</div><div class='add'>+	if (speed &amp; AQ_NIC_RATE_EEE_5G)</div><div class='add'>+		rate |= HW_ATL_FW2X_CAP_EEE_5G_MASK;</div><div class='add'>+	if (speed &amp; AQ_NIC_RATE_EEE_2G5)</div><div class='add'>+		rate |= HW_ATL_FW2X_CAP_EEE_2G5_MASK;</div><div class='add'>+	if (speed &amp; AQ_NIC_RATE_EEE_1G)</div><div class='add'>+		rate |= HW_ATL_FW2X_CAP_EEE_1G_MASK;</div><div class='add'>+</div><div class='add'>+	return rate;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_fw2x_set_link_speed(struct aq_hw_s *self, u32 speed)</div><div class='add'>+{</div><div class='add'>+	u32 val = link_speed_mask_2fw2x_ratemask(speed);</div><div class='add'>+</div><div class='add'>+	aq_hw_write_reg(self, HW_ATL_FW2X_MPI_CONTROL_ADDR, val);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aq_fw2x_upd_flow_control_bits(struct aq_hw_s *self,</div><div class='add'>+					  u32 *mpi_state, u32 fc)</div><div class='add'>+{</div><div class='add'>+	*mpi_state &amp;= ~(HW_ATL_FW2X_CTRL_PAUSE |</div><div class='add'>+			HW_ATL_FW2X_CTRL_ASYMMETRIC_PAUSE);</div><div class='add'>+</div><div class='add'>+	switch (fc) {</div><div class='add'>+	/* There is not explicit mode of RX only pause frames,</div><div class='add'>+	 * thus, we join this mode with FC full.</div><div class='add'>+	 * FC full is either Rx, either Tx, or both.</div><div class='add'>+	 */</div><div class='add'>+	case AQ_NIC_FC_FULL:</div><div class='add'>+	case AQ_NIC_FC_RX:</div><div class='add'>+		*mpi_state |= HW_ATL_FW2X_CTRL_PAUSE |</div><div class='add'>+			      HW_ATL_FW2X_CTRL_ASYMMETRIC_PAUSE;</div><div class='add'>+		break;</div><div class='add'>+	case AQ_NIC_FC_TX:</div><div class='add'>+		*mpi_state |= HW_ATL_FW2X_CTRL_ASYMMETRIC_PAUSE;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aq_fw2x_upd_eee_rate_bits(struct aq_hw_s *self, u32 *mpi_opts,</div><div class='add'>+				      u32 eee_speeds)</div><div class='add'>+{</div><div class='add'>+	*mpi_opts &amp;= ~(HW_ATL_FW2X_CAP_EEE_1G_MASK |</div><div class='add'>+		       HW_ATL_FW2X_CAP_EEE_2G5_MASK |</div><div class='add'>+		       HW_ATL_FW2X_CAP_EEE_5G_MASK |</div><div class='add'>+		       HW_ATL_FW2X_CAP_EEE_10G_MASK);</div><div class='add'>+</div><div class='add'>+	*mpi_opts |= eee_mask_to_fw2x(eee_speeds);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_fw2x_set_state(struct aq_hw_s *self,</div><div class='add'>+			     enum hal_atl_utils_fw_state_e state)</div><div class='add'>+{</div><div class='add'>+	u32 mpi_state = aq_hw_read_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR);</div><div class='add'>+	struct aq_nic_cfg_s *cfg = self-&gt;aq_nic_cfg;</div><div class='add'>+</div><div class='add'>+	switch (state) {</div><div class='add'>+	case MPI_INIT:</div><div class='add'>+		mpi_state &amp;= ~BIT(CAPS_HI_LINK_DROP);</div><div class='add'>+		aq_fw2x_upd_eee_rate_bits(self, &amp;mpi_state, cfg-&gt;eee_speeds);</div><div class='add'>+		aq_fw2x_upd_flow_control_bits(self, &amp;mpi_state,</div><div class='add'>+					      self-&gt;aq_nic_cfg-&gt;fc.req);</div><div class='add'>+		break;</div><div class='add'>+	case MPI_DEINIT:</div><div class='add'>+		mpi_state |= BIT(CAPS_HI_LINK_DROP);</div><div class='add'>+		break;</div><div class='add'>+	case MPI_RESET:</div><div class='add'>+	case MPI_POWER:</div><div class='add'>+		/* No actions */</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+	aq_hw_write_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR, mpi_state);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_fw2x_update_link_status(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	struct aq_hw_link_status_s *link_status = &amp;self-&gt;aq_link_status;</div><div class='add'>+	u32 mpi_state;</div><div class='add'>+	u32 speed;</div><div class='add'>+</div><div class='add'>+	mpi_state = aq_hw_read_reg(self, HW_ATL_FW2X_MPI_STATE_ADDR);</div><div class='add'>+	speed = mpi_state &amp; (FW2X_RATE_100M | FW2X_RATE_1G |</div><div class='add'>+			     FW2X_RATE_2G5 | FW2X_RATE_5G |</div><div class='add'>+			     FW2X_RATE_10G);</div><div class='add'>+</div><div class='add'>+	if (speed) {</div><div class='add'>+		if (speed &amp; FW2X_RATE_10G)</div><div class='add'>+			link_status-&gt;mbps = 10000;</div><div class='add'>+		else if (speed &amp; FW2X_RATE_5G)</div><div class='add'>+			link_status-&gt;mbps = 5000;</div><div class='add'>+		else if (speed &amp; FW2X_RATE_2G5)</div><div class='add'>+			link_status-&gt;mbps = 2500;</div><div class='add'>+		else if (speed &amp; FW2X_RATE_1G)</div><div class='add'>+			link_status-&gt;mbps = 1000;</div><div class='add'>+		else if (speed &amp; FW2X_RATE_100M)</div><div class='add'>+			link_status-&gt;mbps = 100;</div><div class='add'>+		else</div><div class='add'>+			link_status-&gt;mbps = 10000;</div><div class='add'>+	} else {</div><div class='add'>+		link_status-&gt;mbps = 0;</div><div class='add'>+	}</div><div class='add'>+	link_status-&gt;full_duplex = true;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_fw2x_get_mac_permanent(struct aq_hw_s *self, u8 *mac)</div><div class='add'>+{</div><div class='add'>+	u32 efuse_addr = aq_hw_read_reg(self, HW_ATL_FW2X_MPI_EFUSE_ADDR);</div><div class='add'>+	u32 mac_addr[2] = { 0 };</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (efuse_addr != 0) {</div><div class='add'>+		err = hw_atl_utils_fw_downld_dwords(self,</div><div class='add'>+						    efuse_addr + (40U * 4U),</div><div class='add'>+						    mac_addr,</div><div class='add'>+						    ARRAY_SIZE(mac_addr));</div><div class='add'>+		if (err)</div><div class='add'>+			return err;</div><div class='add'>+		mac_addr[0] = __swab32(mac_addr[0]);</div><div class='add'>+		mac_addr[1] = __swab32(mac_addr[1]);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	ether_addr_copy(mac, (u8 *)mac_addr);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_fw2x_update_stats(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	u32 mpi_opts = aq_hw_read_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR);</div><div class='add'>+	u32 orig_stats_val = mpi_opts &amp; BIT(CAPS_HI_STATISTICS);</div><div class='add'>+	u32 stats_val;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	/* Toggle statistics bit for FW to update */</div><div class='add'>+	mpi_opts = mpi_opts ^ BIT(CAPS_HI_STATISTICS);</div><div class='add'>+	aq_hw_write_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR, mpi_opts);</div><div class='add'>+</div><div class='add'>+	/* Wait FW to report back */</div><div class='add'>+	err = readx_poll_timeout_atomic(aq_fw2x_state2_get,</div><div class='add'>+					self, stats_val,</div><div class='add'>+					orig_stats_val != (stats_val &amp;</div><div class='add'>+					BIT(CAPS_HI_STATISTICS)),</div><div class='add'>+					1U, 10000U);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return hw_atl_utils_update_stats(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_fw2x_get_phy_temp(struct aq_hw_s *self, int *temp)</div><div class='add'>+{</div><div class='add'>+	u32 mpi_opts = aq_hw_read_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR);</div><div class='add'>+	u32 temp_val = mpi_opts &amp; HW_ATL_FW2X_CTRL_TEMPERATURE;</div><div class='add'>+	u32 phy_temp_offset;</div><div class='add'>+	u32 temp_res;</div><div class='add'>+	int err = 0;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	phy_temp_offset = self-&gt;mbox_addr + offsetof(struct hw_atl_utils_mbox,</div><div class='add'>+						     info.phy_temperature);</div><div class='add'>+</div><div class='add'>+	/* Toggle statistics bit for FW to 0x36C.18 (CTRL_TEMPERATURE) */</div><div class='add'>+	mpi_opts = mpi_opts ^ HW_ATL_FW2X_CTRL_TEMPERATURE;</div><div class='add'>+	aq_hw_write_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR, mpi_opts);</div><div class='add'>+	/* Wait FW to report back */</div><div class='add'>+	err = readx_poll_timeout_atomic(aq_fw2x_state2_get, self, val,</div><div class='add'>+					temp_val !=</div><div class='add'>+					(val &amp; HW_ATL_FW2X_CTRL_TEMPERATURE),</div><div class='add'>+					1U, 10000U);</div><div class='add'>+	err = hw_atl_utils_fw_downld_dwords(self, phy_temp_offset,</div><div class='add'>+					    &amp;temp_res, 1);</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Convert PHY temperature from 1/256 degree Celsius</div><div class='add'>+	 * to 1/1000 degree Celsius.</div><div class='add'>+	 */</div><div class='add'>+	*temp = (int16_t)(temp_res &amp; 0xFFFF) * 1000 / 256;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_fw2x_set_wol(struct aq_hw_s *self, const u8 *mac)</div><div class='add'>+{</div><div class='add'>+	struct hw_atl_utils_fw_rpc *rpc = NULL;</div><div class='add'>+	struct offload_info *info = NULL;</div><div class='add'>+	u32 wol_bits = 0;</div><div class='add'>+	u32 rpc_size;</div><div class='add'>+	int err = 0;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	if (self-&gt;aq_nic_cfg-&gt;wol &amp; WAKE_PHY) {</div><div class='add'>+		aq_hw_write_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR,</div><div class='add'>+				HW_ATL_FW2X_CTRL_LINK_DROP);</div><div class='add'>+		readx_poll_timeout_atomic(aq_fw2x_state2_get, self, val,</div><div class='add'>+					  (val &amp;</div><div class='add'>+					   HW_ATL_FW2X_CTRL_LINK_DROP) != 0,</div><div class='add'>+					  1000, 100000);</div><div class='add'>+		wol_bits |= HW_ATL_FW2X_CTRL_WAKE_ON_LINK;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (self-&gt;aq_nic_cfg-&gt;wol &amp; WAKE_MAGIC) {</div><div class='add'>+		wol_bits |= HW_ATL_FW2X_CTRL_SLEEP_PROXY |</div><div class='add'>+			    HW_ATL_FW2X_CTRL_WOL;</div><div class='add'>+</div><div class='add'>+		err = hw_atl_utils_fw_rpc_wait(self, &amp;rpc);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			goto err_exit;</div><div class='add'>+</div><div class='add'>+		rpc_size = sizeof(*info) +</div><div class='add'>+			   offsetof(struct hw_atl_utils_fw_rpc, fw2x_offloads);</div><div class='add'>+		memset(rpc, 0, rpc_size);</div><div class='add'>+		info = &amp;rpc-&gt;fw2x_offloads;</div><div class='add'>+		memcpy(info-&gt;mac_addr, mac, ETH_ALEN);</div><div class='add'>+		info-&gt;len = sizeof(*info);</div><div class='add'>+</div><div class='add'>+		err = hw_atl_utils_fw_rpc_call(self, rpc_size);</div><div class='add'>+		if (err &lt; 0)</div><div class='add'>+			goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	aq_hw_write_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR, wol_bits);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_fw2x_set_power(struct aq_hw_s *self, unsigned int power_state,</div><div class='add'>+			     const u8 *mac)</div><div class='add'>+{</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (self-&gt;aq_nic_cfg-&gt;wol)</div><div class='add'>+		err = aq_fw2x_set_wol(self, mac);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_fw2x_send_fw_request(struct aq_hw_s *self,</div><div class='add'>+				   const struct hw_fw_request_iface *fw_req,</div><div class='add'>+				   size_t size)</div><div class='add'>+{</div><div class='add'>+	u32 ctrl2, orig_ctrl2;</div><div class='add'>+	u32 dword_cnt;</div><div class='add'>+	int err = 0;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	/* Write data to drvIface Mailbox */</div><div class='add'>+	dword_cnt = size / sizeof(u32);</div><div class='add'>+	if (size % sizeof(u32))</div><div class='add'>+		dword_cnt++;</div><div class='add'>+	err = hw_atl_write_fwcfg_dwords(self, (void *)fw_req, dword_cnt);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	/* Toggle statistics bit for FW to update */</div><div class='add'>+	ctrl2 = aq_hw_read_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR);</div><div class='add'>+	orig_ctrl2 = ctrl2 &amp; BIT(CAPS_HI_FW_REQUEST);</div><div class='add'>+	ctrl2 = ctrl2 ^ BIT(CAPS_HI_FW_REQUEST);</div><div class='add'>+	aq_hw_write_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR, ctrl2);</div><div class='add'>+</div><div class='add'>+	/* Wait FW to report back */</div><div class='add'>+	err = readx_poll_timeout_atomic(aq_fw2x_state2_get, self, val,</div><div class='add'>+					orig_ctrl2 != (val &amp;</div><div class='add'>+						       BIT(CAPS_HI_FW_REQUEST)),</div><div class='add'>+					1U, 10000U);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aq_fw3x_enable_ptp(struct aq_hw_s *self, int enable)</div><div class='add'>+{</div><div class='add'>+	u32 ptp_opts = aq_hw_read_reg(self, HW_ATL_FW3X_EXT_STATE_ADDR);</div><div class='add'>+	u32 all_ptp_features = BIT(CAPS_EX_PHY_PTP_EN) |</div><div class='add'>+						   BIT(CAPS_EX_PTP_GPIO_EN);</div><div class='add'>+</div><div class='add'>+	if (enable)</div><div class='add'>+		ptp_opts |= all_ptp_features;</div><div class='add'>+	else</div><div class='add'>+		ptp_opts &amp;= ~all_ptp_features;</div><div class='add'>+</div><div class='add'>+	aq_hw_write_reg(self, HW_ATL_FW3X_EXT_CONTROL_ADDR, ptp_opts);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void aq_fw3x_adjust_ptp(struct aq_hw_s *self, uint64_t adj)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(self, HW_ATL_FW3X_PTP_ADJ_LSW_ADDR,</div><div class='add'>+			(adj &gt;&gt;  0) &amp; 0xffffffff);</div><div class='add'>+	aq_hw_write_reg(self, HW_ATL_FW3X_PTP_ADJ_MSW_ADDR,</div><div class='add'>+			(adj &gt;&gt; 32) &amp; 0xffffffff);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_fw2x_led_control(struct aq_hw_s *self, u32 mode)</div><div class='add'>+{</div><div class='add'>+	if (self-&gt;fw_ver_actual &lt; HW_ATL_FW_VER_LED)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	aq_hw_write_reg(self, HW_ATL_FW2X_MPI_LED_ADDR, mode);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_fw2x_set_eee_rate(struct aq_hw_s *self, u32 speed)</div><div class='add'>+{</div><div class='add'>+	u32 mpi_opts = aq_hw_read_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR);</div><div class='add'>+</div><div class='add'>+	aq_fw2x_upd_eee_rate_bits(self, &amp;mpi_opts, speed);</div><div class='add'>+</div><div class='add'>+	aq_hw_write_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR, mpi_opts);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_fw2x_get_eee_rate(struct aq_hw_s *self, u32 *rate,</div><div class='add'>+				u32 *supported_rates)</div><div class='add'>+{</div><div class='add'>+	u32 mpi_state;</div><div class='add'>+	u32 caps_hi;</div><div class='add'>+	int err = 0;</div><div class='add'>+	u32 offset;</div><div class='add'>+</div><div class='add'>+	offset = self-&gt;mbox_addr + offsetof(struct hw_atl_utils_mbox,</div><div class='add'>+					    info.caps_hi);</div><div class='add'>+</div><div class='add'>+	err = hw_atl_utils_fw_downld_dwords(self, offset, &amp;caps_hi, 1);</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	*supported_rates = fw2x_to_eee_mask(caps_hi);</div><div class='add'>+</div><div class='add'>+	mpi_state = aq_fw2x_state2_get(self);</div><div class='add'>+	*rate = fw2x_to_eee_mask(mpi_state);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_fw2x_renegotiate(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	u32 mpi_opts = aq_hw_read_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR);</div><div class='add'>+</div><div class='add'>+	mpi_opts |= BIT(CTRL_FORCE_RECONNECT);</div><div class='add'>+</div><div class='add'>+	aq_hw_write_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR, mpi_opts);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_fw2x_set_flow_control(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	u32 mpi_state = aq_hw_read_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR);</div><div class='add'>+</div><div class='add'>+	aq_fw2x_upd_flow_control_bits(self, &amp;mpi_state,</div><div class='add'>+				      self-&gt;aq_nic_cfg-&gt;fc.req);</div><div class='add'>+</div><div class='add'>+	aq_hw_write_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR, mpi_state);</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 aq_fw2x_get_flow_control(struct aq_hw_s *self, u32 *fcmode)</div><div class='add'>+{</div><div class='add'>+	u32 mpi_state = aq_fw2x_state2_get(self);</div><div class='add'>+	*fcmode = 0;</div><div class='add'>+</div><div class='add'>+	if (mpi_state &amp; HW_ATL_FW2X_CAP_PAUSE)</div><div class='add'>+		*fcmode |= AQ_NIC_FC_RX;</div><div class='add'>+</div><div class='add'>+	if (mpi_state &amp; HW_ATL_FW2X_CAP_ASYM_PAUSE)</div><div class='add'>+		*fcmode |= AQ_NIC_FC_TX;</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_fw2x_set_phyloopback(struct aq_hw_s *self, u32 mode, bool enable)</div><div class='add'>+{</div><div class='add'>+	u32 mpi_opts;</div><div class='add'>+</div><div class='add'>+	switch (mode) {</div><div class='add'>+	case AQ_HW_LOOPBACK_PHYINT_SYS:</div><div class='add'>+		mpi_opts = aq_hw_read_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR);</div><div class='add'>+		if (enable)</div><div class='add'>+			mpi_opts |= HW_ATL_FW2X_CTRL_INT_LOOPBACK;</div><div class='add'>+		else</div><div class='add'>+			mpi_opts &amp;= ~HW_ATL_FW2X_CTRL_INT_LOOPBACK;</div><div class='add'>+		aq_hw_write_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR, mpi_opts);</div><div class='add'>+		break;</div><div class='add'>+	case AQ_HW_LOOPBACK_PHYEXT_SYS:</div><div class='add'>+		mpi_opts = aq_hw_read_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR);</div><div class='add'>+		if (enable)</div><div class='add'>+			mpi_opts |= HW_ATL_FW2X_CTRL_EXT_LOOPBACK;</div><div class='add'>+		else</div><div class='add'>+			mpi_opts &amp;= ~HW_ATL_FW2X_CTRL_EXT_LOOPBACK;</div><div class='add'>+		aq_hw_write_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR, mpi_opts);</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 aq_fw2x_mbox_get(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg(self, HW_ATL_FW2X_MPI_MBOX_ADDR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 aq_fw2x_rpc_get(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg(self, HW_ATL_FW2X_MPI_RPC_ADDR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_fw2x_settings_get(struct aq_hw_s *self, u32 *addr)</div><div class='add'>+{</div><div class='add'>+	int err = 0;</div><div class='add'>+	u32 offset;</div><div class='add'>+</div><div class='add'>+	offset = self-&gt;mbox_addr + offsetof(struct hw_atl_utils_mbox,</div><div class='add'>+					    info.setting_address);</div><div class='add'>+</div><div class='add'>+	err = hw_atl_utils_fw_downld_dwords(self, offset, addr, 1);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 aq_fw2x_state_get(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg(self, HW_ATL_FW2X_MPI_STATE_ADDR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 aq_fw2x_state2_get(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg(self, HW_ATL_FW2X_MPI_STATE2_ADDR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_fw2x_set_downshift(struct aq_hw_s *self, u32 counter)</div><div class='add'>+{</div><div class='add'>+	int err = 0;</div><div class='add'>+	u32 mpi_opts;</div><div class='add'>+	u32 offset;</div><div class='add'>+</div><div class='add'>+	offset = offsetof(struct hw_atl_utils_settings, downshift_retry_count);</div><div class='add'>+	err = hw_atl_write_fwsettings_dwords(self, offset, &amp;counter, 1);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	mpi_opts = aq_hw_read_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR);</div><div class='add'>+	if (counter)</div><div class='add'>+		mpi_opts |= HW_ATL_FW2X_CTRL_DOWNSHIFT;</div><div class='add'>+	else</div><div class='add'>+		mpi_opts &amp;= ~HW_ATL_FW2X_CTRL_DOWNSHIFT;</div><div class='add'>+	aq_hw_write_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR, mpi_opts);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_fw2x_set_media_detect(struct aq_hw_s *self, bool on)</div><div class='add'>+{</div><div class='add'>+	u32 enable;</div><div class='add'>+	u32 offset;</div><div class='add'>+</div><div class='add'>+	if (self-&gt;fw_ver_actual &lt; HW_ATL_FW_VER_MEDIA_CONTROL)</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	offset = offsetof(struct hw_atl_utils_settings, media_detect);</div><div class='add'>+	enable = on;</div><div class='add'>+</div><div class='add'>+	return hw_atl_write_fwsettings_dwords(self, offset, &amp;enable, 1);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static u32 aq_fw2x_get_link_capabilities(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	int err = 0;</div><div class='add'>+	u32 offset;</div><div class='add'>+	u32 val;</div><div class='add'>+</div><div class='add'>+	offset = self-&gt;mbox_addr +</div><div class='add'>+		 offsetof(struct hw_atl_utils_mbox, info.caps_lo);</div><div class='add'>+</div><div class='add'>+	err = hw_atl_utils_fw_downld_dwords(self, offset, &amp;val, 1);</div><div class='add'>+</div><div class='add'>+	if (err)</div><div class='add'>+		return 0;</div><div class='add'>+</div><div class='add'>+	return val;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int aq_fw2x_send_macsec_req(struct aq_hw_s *hw,</div><div class='add'>+				   struct macsec_msg_fw_request *req,</div><div class='add'>+				   struct macsec_msg_fw_response *response)</div><div class='add'>+{</div><div class='add'>+	u32 low_status, low_req = 0;</div><div class='add'>+	u32 dword_cnt;</div><div class='add'>+	u32 caps_lo;</div><div class='add'>+	u32 offset;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	if (!req || !response)</div><div class='add'>+		return -EINVAL;</div><div class='add'>+</div><div class='add'>+	caps_lo = aq_fw2x_get_link_capabilities(hw);</div><div class='add'>+	if (!(caps_lo &amp; BIT(CAPS_LO_MACSEC)))</div><div class='add'>+		return -EOPNOTSUPP;</div><div class='add'>+</div><div class='add'>+	/* Write macsec request to cfg memory */</div><div class='add'>+	dword_cnt = (sizeof(*req) + sizeof(u32) - 1) / sizeof(u32);</div><div class='add'>+	err = hw_atl_write_fwcfg_dwords(hw, (void *)req, dword_cnt);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	/* Toggle 0x368.CAPS_LO_MACSEC bit */</div><div class='add'>+	low_req = aq_hw_read_reg(hw, HW_ATL_FW2X_MPI_CONTROL_ADDR);</div><div class='add'>+	low_req ^= HW_ATL_FW2X_CAP_MACSEC;</div><div class='add'>+	aq_hw_write_reg(hw, HW_ATL_FW2X_MPI_CONTROL_ADDR, low_req);</div><div class='add'>+</div><div class='add'>+	/* Wait FW to report back */</div><div class='add'>+	err = readx_poll_timeout_atomic(aq_fw2x_state_get, hw, low_status,</div><div class='add'>+		low_req != (low_status &amp; BIT(CAPS_LO_MACSEC)), 1U, 10000U);</div><div class='add'>+	if (err)</div><div class='add'>+		return -EIO;</div><div class='add'>+</div><div class='add'>+	/* Read status of write operation */</div><div class='add'>+	offset = hw-&gt;rpc_addr + sizeof(u32);</div><div class='add'>+	err = hw_atl_utils_fw_downld_dwords(hw, offset, (u32 *)(void *)response,</div><div class='add'>+					    sizeof(*response) / sizeof(u32));</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct aq_fw_ops aq_fw_2x_ops = {</div><div class='add'>+	.init               = aq_fw2x_init,</div><div class='add'>+	.deinit             = aq_fw2x_deinit,</div><div class='add'>+	.reset              = NULL,</div><div class='add'>+	.renegotiate        = aq_fw2x_renegotiate,</div><div class='add'>+	.get_mac_permanent  = aq_fw2x_get_mac_permanent,</div><div class='add'>+	.set_link_speed     = aq_fw2x_set_link_speed,</div><div class='add'>+	.set_state          = aq_fw2x_set_state,</div><div class='add'>+	.update_link_status = aq_fw2x_update_link_status,</div><div class='add'>+	.update_stats       = aq_fw2x_update_stats,</div><div class='add'>+	.get_mac_temp       = NULL,</div><div class='add'>+	.get_phy_temp       = aq_fw2x_get_phy_temp,</div><div class='add'>+	.set_power          = aq_fw2x_set_power,</div><div class='add'>+	.set_eee_rate       = aq_fw2x_set_eee_rate,</div><div class='add'>+	.get_eee_rate       = aq_fw2x_get_eee_rate,</div><div class='add'>+	.set_flow_control   = aq_fw2x_set_flow_control,</div><div class='add'>+	.get_flow_control   = aq_fw2x_get_flow_control,</div><div class='add'>+	.send_fw_request    = aq_fw2x_send_fw_request,</div><div class='add'>+	.enable_ptp         = aq_fw3x_enable_ptp,</div><div class='add'>+	.led_control        = aq_fw2x_led_control,</div><div class='add'>+	.set_phyloopback    = aq_fw2x_set_phyloopback,</div><div class='add'>+	.set_downshift      = aq_fw2x_set_downshift,</div><div class='add'>+	.set_media_detect   = aq_fw2x_set_media_detect,</div><div class='add'>+	.adjust_ptp         = aq_fw3x_adjust_ptp,</div><div class='add'>+	.get_link_capabilities = aq_fw2x_get_link_capabilities,</div><div class='add'>+	.send_macsec_req    = aq_fw2x_send_macsec_req,</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2.c b/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2.c<br/>new file mode 100644<br/>index 000000000000..0ce9caae8799<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2.c</a></div><div class='hunk'>@@ -0,0 +1,863 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ * Copyright (C) 2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "aq_hw.h"</div><div class='add'>+#include "aq_hw_utils.h"</div><div class='add'>+#include "aq_ring.h"</div><div class='add'>+#include "aq_nic.h"</div><div class='add'>+#include "hw_atl/hw_atl_b0.h"</div><div class='add'>+#include "hw_atl/hw_atl_utils.h"</div><div class='add'>+#include "hw_atl/hw_atl_llh.h"</div><div class='add'>+#include "hw_atl/hw_atl_llh_internal.h"</div><div class='add'>+#include "hw_atl2_utils.h"</div><div class='add'>+#include "hw_atl2_llh.h"</div><div class='add'>+#include "hw_atl2_internal.h"</div><div class='add'>+#include "hw_atl2_llh_internal.h"</div><div class='add'>+</div><div class='add'>+static int hw_atl2_act_rslvr_table_set(struct aq_hw_s *self, u8 location,</div><div class='add'>+				       u32 tag, u32 mask, u32 action);</div><div class='add'>+</div><div class='add'>+#define DEFAULT_BOARD_BASIC_CAPABILITIES \</div><div class='add'>+	.is_64_dma = true,		  \</div><div class='add'>+	.op64bit = true,		  \</div><div class='add'>+	.msix_irqs = 8U,		  \</div><div class='add'>+	.irq_mask = ~0U,		  \</div><div class='add'>+	.vecs = HW_ATL2_RSS_MAX,	  \</div><div class='add'>+	.tcs_max = HW_ATL2_TC_MAX,	  \</div><div class='add'>+	.rxd_alignment = 1U,		  \</div><div class='add'>+	.rxd_size = HW_ATL2_RXD_SIZE,   \</div><div class='add'>+	.rxds_max = HW_ATL2_MAX_RXD,    \</div><div class='add'>+	.rxds_min = HW_ATL2_MIN_RXD,    \</div><div class='add'>+	.txd_alignment = 1U,		  \</div><div class='add'>+	.txd_size = HW_ATL2_TXD_SIZE,   \</div><div class='add'>+	.txds_max = HW_ATL2_MAX_TXD,    \</div><div class='add'>+	.txds_min = HW_ATL2_MIN_TXD,    \</div><div class='add'>+	.txhwb_alignment = 4096U,	  \</div><div class='add'>+	.tx_rings = HW_ATL2_TX_RINGS,   \</div><div class='add'>+	.rx_rings = HW_ATL2_RX_RINGS,   \</div><div class='add'>+	.hw_features = NETIF_F_HW_CSUM |  \</div><div class='add'>+			NETIF_F_RXCSUM |  \</div><div class='add'>+			NETIF_F_RXHASH |  \</div><div class='add'>+			NETIF_F_SG |      \</div><div class='add'>+			NETIF_F_TSO |     \</div><div class='add'>+			NETIF_F_TSO6 |    \</div><div class='add'>+			NETIF_F_LRO |     \</div><div class='add'>+			NETIF_F_NTUPLE |  \</div><div class='add'>+			NETIF_F_HW_VLAN_CTAG_FILTER | \</div><div class='add'>+			NETIF_F_HW_VLAN_CTAG_RX |     \</div><div class='add'>+			NETIF_F_HW_VLAN_CTAG_TX |     \</div><div class='add'>+			NETIF_F_GSO_UDP_L4      |     \</div><div class='add'>+			NETIF_F_GSO_PARTIAL     |     \</div><div class='add'>+			NETIF_F_HW_TC,                \</div><div class='add'>+	.hw_priv_flags = IFF_UNICAST_FLT, \</div><div class='add'>+	.flow_control = true,		  \</div><div class='add'>+	.mtu = HW_ATL2_MTU_JUMBO,	  \</div><div class='add'>+	.mac_regs_count = 72,		  \</div><div class='add'>+	.hw_alive_check_addr = 0x10U,     \</div><div class='add'>+	.priv_data_len = sizeof(struct hw_atl2_priv)</div><div class='add'>+</div><div class='add'>+const struct aq_hw_caps_s hw_atl2_caps_aqc113 = {</div><div class='add'>+	DEFAULT_BOARD_BASIC_CAPABILITIES,</div><div class='add'>+	.media_type = AQ_HW_MEDIA_TYPE_TP,</div><div class='add'>+	.link_speed_msk = AQ_NIC_RATE_10G |</div><div class='add'>+			  AQ_NIC_RATE_5G  |</div><div class='add'>+			  AQ_NIC_RATE_2G5 |</div><div class='add'>+			  AQ_NIC_RATE_1G  |</div><div class='add'>+			  AQ_NIC_RATE_100M      |</div><div class='add'>+			  AQ_NIC_RATE_10M,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct aq_hw_caps_s hw_atl2_caps_aqc115c = {</div><div class='add'>+	DEFAULT_BOARD_BASIC_CAPABILITIES,</div><div class='add'>+	.media_type = AQ_HW_MEDIA_TYPE_TP,</div><div class='add'>+	.link_speed_msk = AQ_NIC_RATE_2G5 |</div><div class='add'>+			  AQ_NIC_RATE_1G  |</div><div class='add'>+			  AQ_NIC_RATE_100M      |</div><div class='add'>+			  AQ_NIC_RATE_10M,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+const struct aq_hw_caps_s hw_atl2_caps_aqc116c = {</div><div class='add'>+	DEFAULT_BOARD_BASIC_CAPABILITIES,</div><div class='add'>+	.media_type = AQ_HW_MEDIA_TYPE_TP,</div><div class='add'>+	.link_speed_msk = AQ_NIC_RATE_1G  |</div><div class='add'>+			  AQ_NIC_RATE_100M      |</div><div class='add'>+			  AQ_NIC_RATE_10M,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+static u32 hw_atl2_sem_act_rslvr_get(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	return hw_atl_reg_glb_cpu_sem_get(self, HW_ATL2_FW_SM_ACT_RSLVR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl2_hw_reset(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	struct hw_atl2_priv *priv = self-&gt;priv;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = hw_atl2_utils_soft_reset(self);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	memset(priv, 0, sizeof(*priv));</div><div class='add'>+</div><div class='add'>+	self-&gt;aq_fw_ops-&gt;set_state(self, MPI_RESET);</div><div class='add'>+</div><div class='add'>+	err = aq_hw_err_from_flags(self);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl2_hw_queue_to_tc_map_set(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_cfg_s *cfg = self-&gt;aq_nic_cfg;</div><div class='add'>+	unsigned int tcs, q_per_tc;</div><div class='add'>+	unsigned int tc, q;</div><div class='add'>+	u32 rx_map = 0;</div><div class='add'>+	u32 tx_map = 0;</div><div class='add'>+</div><div class='add'>+	hw_atl2_tpb_tx_tc_q_rand_map_en_set(self, 1U);</div><div class='add'>+</div><div class='add'>+	switch (cfg-&gt;tc_mode) {</div><div class='add'>+	case AQ_TC_MODE_8TCS:</div><div class='add'>+		tcs = 8;</div><div class='add'>+		q_per_tc = 4;</div><div class='add'>+		break;</div><div class='add'>+	case AQ_TC_MODE_4TCS:</div><div class='add'>+		tcs = 4;</div><div class='add'>+		q_per_tc = 8;</div><div class='add'>+		break;</div><div class='add'>+	default:</div><div class='add'>+		return -EINVAL;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (tc = 0; tc != tcs; tc++) {</div><div class='add'>+		unsigned int tc_q_offset = tc * q_per_tc;</div><div class='add'>+</div><div class='add'>+		for (q = tc_q_offset; q != tc_q_offset + q_per_tc; q++) {</div><div class='add'>+			rx_map |= tc &lt;&lt; HW_ATL2_RX_Q_TC_MAP_SHIFT(q);</div><div class='add'>+			if (HW_ATL2_RX_Q_TC_MAP_ADR(q) !=</div><div class='add'>+			    HW_ATL2_RX_Q_TC_MAP_ADR(q + 1)) {</div><div class='add'>+				aq_hw_write_reg(self,</div><div class='add'>+						HW_ATL2_RX_Q_TC_MAP_ADR(q),</div><div class='add'>+						rx_map);</div><div class='add'>+				rx_map = 0;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			tx_map |= tc &lt;&lt; HW_ATL2_TX_Q_TC_MAP_SHIFT(q);</div><div class='add'>+			if (HW_ATL2_TX_Q_TC_MAP_ADR(q) !=</div><div class='add'>+			    HW_ATL2_TX_Q_TC_MAP_ADR(q + 1)) {</div><div class='add'>+				aq_hw_write_reg(self,</div><div class='add'>+						HW_ATL2_TX_Q_TC_MAP_ADR(q),</div><div class='add'>+						tx_map);</div><div class='add'>+				tx_map = 0;</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl2_hw_qos_set(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_cfg_s *cfg = self-&gt;aq_nic_cfg;</div><div class='add'>+	u32 tx_buff_size = HW_ATL2_TXBUF_MAX;</div><div class='add'>+	u32 rx_buff_size = HW_ATL2_RXBUF_MAX;</div><div class='add'>+	unsigned int prio = 0U;</div><div class='add'>+	u32 tc = 0U;</div><div class='add'>+</div><div class='add'>+	/* TPS Descriptor rate init */</div><div class='add'>+	hw_atl_tps_tx_pkt_shed_desc_rate_curr_time_res_set(self, 0x0U);</div><div class='add'>+	hw_atl_tps_tx_pkt_shed_desc_rate_lim_set(self, 0xA);</div><div class='add'>+</div><div class='add'>+	/* TPS VM init */</div><div class='add'>+	hw_atl_tps_tx_pkt_shed_desc_vm_arb_mode_set(self, 0U);</div><div class='add'>+</div><div class='add'>+	tx_buff_size /= cfg-&gt;tcs;</div><div class='add'>+	rx_buff_size /= cfg-&gt;tcs;</div><div class='add'>+	for (tc = 0; tc &lt; cfg-&gt;tcs; tc++) {</div><div class='add'>+		u32 threshold = 0U;</div><div class='add'>+</div><div class='add'>+		/* Tx buf size TC0 */</div><div class='add'>+		hw_atl_tpb_tx_pkt_buff_size_per_tc_set(self, tx_buff_size, tc);</div><div class='add'>+</div><div class='add'>+		threshold = (tx_buff_size * (1024 / 32U) * 66U) / 100U;</div><div class='add'>+		hw_atl_tpb_tx_buff_hi_threshold_per_tc_set(self, threshold, tc);</div><div class='add'>+</div><div class='add'>+		threshold = (tx_buff_size * (1024 / 32U) * 50U) / 100U;</div><div class='add'>+		hw_atl_tpb_tx_buff_lo_threshold_per_tc_set(self, threshold, tc);</div><div class='add'>+</div><div class='add'>+		/* QoS Rx buf size per TC */</div><div class='add'>+		hw_atl_rpb_rx_pkt_buff_size_per_tc_set(self, rx_buff_size, tc);</div><div class='add'>+</div><div class='add'>+		threshold = (rx_buff_size * (1024U / 32U) * 66U) / 100U;</div><div class='add'>+		hw_atl_rpb_rx_buff_hi_threshold_per_tc_set(self, threshold, tc);</div><div class='add'>+</div><div class='add'>+		threshold = (rx_buff_size * (1024U / 32U) * 50U) / 100U;</div><div class='add'>+		hw_atl_rpb_rx_buff_lo_threshold_per_tc_set(self, threshold, tc);</div><div class='add'>+</div><div class='add'>+		hw_atl_b0_set_fc(self, self-&gt;aq_nic_cfg-&gt;fc.req, tc);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* QoS 802.1p priority -&gt; TC mapping */</div><div class='add'>+	for (prio = 0; prio &lt; 8; ++prio)</div><div class='add'>+		hw_atl_rpf_rpb_user_priority_tc_map_set(self, prio,</div><div class='add'>+							cfg-&gt;prio_tc_map[prio]);</div><div class='add'>+</div><div class='add'>+	/* ATL2 Apply ring to TC mapping */</div><div class='add'>+	hw_atl2_hw_queue_to_tc_map_set(self);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl2_hw_rss_set(struct aq_hw_s *self,</div><div class='add'>+			      struct aq_rss_parameters *rss_params)</div><div class='add'>+{</div><div class='add'>+	u8 *indirection_table = rss_params-&gt;indirection_table;</div><div class='add'>+	const u32 num_tcs = aq_hw_num_tcs(self);</div><div class='add'>+	u32 rpf_redir2_enable;</div><div class='add'>+	int tc;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	rpf_redir2_enable = num_tcs &gt; 4 ? 1 : 0;</div><div class='add'>+</div><div class='add'>+	hw_atl2_rpf_redirection_table2_select_set(self, rpf_redir2_enable);</div><div class='add'>+</div><div class='add'>+	for (i = HW_ATL2_RSS_REDIRECTION_MAX; i--;) {</div><div class='add'>+		for (tc = 0; tc != num_tcs; tc++) {</div><div class='add'>+			hw_atl2_new_rpf_rss_redir_set(self, tc, i,</div><div class='add'>+						      tc *</div><div class='add'>+						      aq_hw_q_per_tc(self) +</div><div class='add'>+						      indirection_table[i]);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl2_hw_init_tx_tc_rate_limit(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	static const u32 max_weight = BIT(HW_ATL2_TPS_DATA_TCTWEIGHT_WIDTH) - 1;</div><div class='add'>+	/* Scale factor is based on the number of bits in fractional portion */</div><div class='add'>+	static const u32 scale = BIT(HW_ATL_TPS_DESC_RATE_Y_WIDTH);</div><div class='add'>+	static const u32 frac_msk = HW_ATL_TPS_DESC_RATE_Y_MSK &gt;&gt;</div><div class='add'>+				    HW_ATL_TPS_DESC_RATE_Y_SHIFT;</div><div class='add'>+	const u32 link_speed = self-&gt;aq_link_status.mbps;</div><div class='add'>+	struct aq_nic_cfg_s *nic_cfg = self-&gt;aq_nic_cfg;</div><div class='add'>+	unsigned long num_min_rated_tcs = 0;</div><div class='add'>+	u32 tc_weight[AQ_CFG_TCS_MAX];</div><div class='add'>+	u32 fixed_max_credit_4b;</div><div class='add'>+	u32 fixed_max_credit;</div><div class='add'>+	u8 min_rate_msk = 0;</div><div class='add'>+	u32 sum_weight = 0;</div><div class='add'>+	int tc;</div><div class='add'>+</div><div class='add'>+	/* By default max_credit is based upon MTU (in unit of 64b) */</div><div class='add'>+	fixed_max_credit = nic_cfg-&gt;aq_hw_caps-&gt;mtu / 64;</div><div class='add'>+	/* in unit of 4b */</div><div class='add'>+	fixed_max_credit_4b = nic_cfg-&gt;aq_hw_caps-&gt;mtu / 4;</div><div class='add'>+</div><div class='add'>+	if (link_speed) {</div><div class='add'>+		min_rate_msk = nic_cfg-&gt;tc_min_rate_msk &amp;</div><div class='add'>+			       (BIT(nic_cfg-&gt;tcs) - 1);</div><div class='add'>+		num_min_rated_tcs = hweight8(min_rate_msk);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* First, calculate weights where min_rate is specified */</div><div class='add'>+	if (num_min_rated_tcs) {</div><div class='add'>+		for (tc = 0; tc != nic_cfg-&gt;tcs; tc++) {</div><div class='add'>+			if (!nic_cfg-&gt;tc_min_rate[tc]) {</div><div class='add'>+				tc_weight[tc] = 0;</div><div class='add'>+				continue;</div><div class='add'>+			}</div><div class='add'>+</div><div class='add'>+			tc_weight[tc] = (-1L + link_speed +</div><div class='add'>+					 nic_cfg-&gt;tc_min_rate[tc] *</div><div class='add'>+					 max_weight) /</div><div class='add'>+					link_speed;</div><div class='add'>+			tc_weight[tc] = min(tc_weight[tc], max_weight);</div><div class='add'>+			sum_weight += tc_weight[tc];</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* WSP, if min_rate is set for at least one TC.</div><div class='add'>+	 * RR otherwise.</div><div class='add'>+	 */</div><div class='add'>+	hw_atl2_tps_tx_pkt_shed_data_arb_mode_set(self, min_rate_msk ? 1U : 0U);</div><div class='add'>+	/* Data TC Arbiter takes precedence over Descriptor TC Arbiter,</div><div class='add'>+	 * leave Descriptor TC Arbiter as RR.</div><div class='add'>+	 */</div><div class='add'>+	hw_atl_tps_tx_pkt_shed_desc_tc_arb_mode_set(self, 0U);</div><div class='add'>+</div><div class='add'>+	hw_atl_tps_tx_desc_rate_mode_set(self, nic_cfg-&gt;is_qos ? 1U : 0U);</div><div class='add'>+</div><div class='add'>+	for (tc = 0; tc != nic_cfg-&gt;tcs; tc++) {</div><div class='add'>+		const u32 en = (nic_cfg-&gt;tc_max_rate[tc] != 0) ? 1U : 0U;</div><div class='add'>+		const u32 desc = AQ_NIC_CFG_TCVEC2RING(nic_cfg, tc, 0);</div><div class='add'>+		u32 weight, max_credit;</div><div class='add'>+</div><div class='add'>+		hw_atl_tps_tx_pkt_shed_desc_tc_max_credit_set(self, tc,</div><div class='add'>+							      fixed_max_credit);</div><div class='add'>+		hw_atl_tps_tx_pkt_shed_desc_tc_weight_set(self, tc, 0x1E);</div><div class='add'>+</div><div class='add'>+		if (num_min_rated_tcs) {</div><div class='add'>+			weight = tc_weight[tc];</div><div class='add'>+</div><div class='add'>+			if (!weight &amp;&amp; sum_weight &lt; max_weight)</div><div class='add'>+				weight = (max_weight - sum_weight) /</div><div class='add'>+					 (nic_cfg-&gt;tcs - num_min_rated_tcs);</div><div class='add'>+			else if (!weight)</div><div class='add'>+				weight = 0x640;</div><div class='add'>+</div><div class='add'>+			max_credit = max(2 * weight, fixed_max_credit_4b);</div><div class='add'>+		} else {</div><div class='add'>+			weight = 0x640;</div><div class='add'>+			max_credit = 0xFFF0;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		hw_atl2_tps_tx_pkt_shed_tc_data_weight_set(self, tc, weight);</div><div class='add'>+		hw_atl2_tps_tx_pkt_shed_tc_data_max_credit_set(self, tc,</div><div class='add'>+							       max_credit);</div><div class='add'>+</div><div class='add'>+		hw_atl_tps_tx_desc_rate_en_set(self, desc, en);</div><div class='add'>+</div><div class='add'>+		if (en) {</div><div class='add'>+			/* Nominal rate is always 10G */</div><div class='add'>+			const u32 rate = 10000U * scale /</div><div class='add'>+					 nic_cfg-&gt;tc_max_rate[tc];</div><div class='add'>+			const u32 rate_int = rate &gt;&gt;</div><div class='add'>+					     HW_ATL_TPS_DESC_RATE_Y_WIDTH;</div><div class='add'>+			const u32 rate_frac = rate &amp; frac_msk;</div><div class='add'>+</div><div class='add'>+			hw_atl_tps_tx_desc_rate_x_set(self, desc, rate_int);</div><div class='add'>+			hw_atl_tps_tx_desc_rate_y_set(self, desc, rate_frac);</div><div class='add'>+		} else {</div><div class='add'>+			/* A value of 1 indicates the queue is not</div><div class='add'>+			 * rate controlled.</div><div class='add'>+			 */</div><div class='add'>+			hw_atl_tps_tx_desc_rate_x_set(self, desc, 1U);</div><div class='add'>+			hw_atl_tps_tx_desc_rate_y_set(self, desc, 0U);</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+	for (tc = nic_cfg-&gt;tcs; tc != AQ_CFG_TCS_MAX; tc++) {</div><div class='add'>+		const u32 desc = AQ_NIC_CFG_TCVEC2RING(nic_cfg, tc, 0);</div><div class='add'>+</div><div class='add'>+		hw_atl_tps_tx_desc_rate_en_set(self, desc, 0U);</div><div class='add'>+		hw_atl_tps_tx_desc_rate_x_set(self, desc, 1U);</div><div class='add'>+		hw_atl_tps_tx_desc_rate_y_set(self, desc, 0U);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl2_hw_init_tx_path(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_cfg_s *nic_cfg = self-&gt;aq_nic_cfg;</div><div class='add'>+</div><div class='add'>+	/* Tx TC/RSS number config */</div><div class='add'>+	hw_atl_tpb_tps_tx_tc_mode_set(self, nic_cfg-&gt;tc_mode);</div><div class='add'>+</div><div class='add'>+	hw_atl_thm_lso_tcp_flag_of_first_pkt_set(self, 0x0FF6U);</div><div class='add'>+	hw_atl_thm_lso_tcp_flag_of_middle_pkt_set(self, 0x0FF6U);</div><div class='add'>+	hw_atl_thm_lso_tcp_flag_of_last_pkt_set(self, 0x0F7FU);</div><div class='add'>+</div><div class='add'>+	/* Tx interrupts */</div><div class='add'>+	hw_atl_tdm_tx_desc_wr_wb_irq_en_set(self, 1U);</div><div class='add'>+</div><div class='add'>+	/* misc */</div><div class='add'>+	hw_atl_tdm_tx_dca_en_set(self, 0U);</div><div class='add'>+	hw_atl_tdm_tx_dca_mode_set(self, 0U);</div><div class='add'>+</div><div class='add'>+	hw_atl_tpb_tx_path_scp_ins_en_set(self, 1U);</div><div class='add'>+</div><div class='add'>+	hw_atl2_tpb_tx_buf_clk_gate_en_set(self, 0U);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hw_atl2_hw_init_new_rx_filters(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	u8 *prio_tc_map = self-&gt;aq_nic_cfg-&gt;prio_tc_map;</div><div class='add'>+	struct hw_atl2_priv *priv = self-&gt;priv;</div><div class='add'>+	u16 action;</div><div class='add'>+	u8 index;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Action Resolver Table (ART) is used by RPF to decide which action</div><div class='add'>+	 * to take with a packet based upon input tag and tag mask, where:</div><div class='add'>+	 *  - input tag is a combination of 3-bit VLan Prio (PTP) and</div><div class='add'>+	 *    29-bit concatenation of all tags from filter block;</div><div class='add'>+	 *  - tag mask is a mask used for matching against input tag.</div><div class='add'>+	 * The input_tag is compared with the all the Requested_tags in the</div><div class='add'>+	 * Record table to find a match. Action field of the selected matched</div><div class='add'>+	 * REC entry is used for further processing. If multiple entries match,</div><div class='add'>+	 * the lowest REC entry, Action field will be selected.</div><div class='add'>+	 */</div><div class='add'>+	hw_atl2_rpf_act_rslvr_section_en_set(self, 0xFFFF);</div><div class='add'>+	hw_atl2_rpfl2_uc_flr_tag_set(self, HW_ATL2_RPF_TAG_BASE_UC,</div><div class='add'>+				     HW_ATL2_MAC_UC);</div><div class='add'>+	hw_atl2_rpfl2_bc_flr_tag_set(self, HW_ATL2_RPF_TAG_BASE_UC);</div><div class='add'>+</div><div class='add'>+	/* FW reserves the beginning of ART, thus all driver entries must</div><div class='add'>+	 * start from the offset specified in FW caps.</div><div class='add'>+	 */</div><div class='add'>+	index = priv-&gt;art_base_index + HW_ATL2_RPF_L2_PROMISC_OFF_INDEX;</div><div class='add'>+	hw_atl2_act_rslvr_table_set(self, index, 0,</div><div class='add'>+				    HW_ATL2_RPF_TAG_UC_MASK |</div><div class='add'>+					HW_ATL2_RPF_TAG_ALLMC_MASK,</div><div class='add'>+				    HW_ATL2_ACTION_DROP);</div><div class='add'>+</div><div class='add'>+	index = priv-&gt;art_base_index + HW_ATL2_RPF_VLAN_PROMISC_OFF_INDEX;</div><div class='add'>+	hw_atl2_act_rslvr_table_set(self, index, 0,</div><div class='add'>+				    HW_ATL2_RPF_TAG_VLAN_MASK |</div><div class='add'>+					HW_ATL2_RPF_TAG_UNTAG_MASK,</div><div class='add'>+				    HW_ATL2_ACTION_DROP);</div><div class='add'>+</div><div class='add'>+	/* Configure ART to map given VLan Prio (PCP) to the TC index for</div><div class='add'>+	 * RSS redirection table.</div><div class='add'>+	 */</div><div class='add'>+	for (i = 0; i &lt; 8; i++) {</div><div class='add'>+		action = HW_ATL2_ACTION_ASSIGN_TC(prio_tc_map[i]);</div><div class='add'>+</div><div class='add'>+		index = priv-&gt;art_base_index + HW_ATL2_RPF_PCP_TO_TC_INDEX + i;</div><div class='add'>+		hw_atl2_act_rslvr_table_set(self, index,</div><div class='add'>+					    i &lt;&lt; HW_ATL2_RPF_TAG_PCP_OFFSET,</div><div class='add'>+					    HW_ATL2_RPF_TAG_PCP_MASK, action);</div><div class='add'>+	}</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hw_atl2_hw_new_rx_filter_vlan_promisc(struct aq_hw_s *self,</div><div class='add'>+						  bool promisc)</div><div class='add'>+{</div><div class='add'>+	u16 off_action = (!promisc &amp;&amp;</div><div class='add'>+			  !hw_atl_rpfl2promiscuous_mode_en_get(self)) ?</div><div class='add'>+				HW_ATL2_ACTION_DROP : HW_ATL2_ACTION_DISABLE;</div><div class='add'>+	struct hw_atl2_priv *priv = self-&gt;priv;</div><div class='add'>+	u8 index;</div><div class='add'>+</div><div class='add'>+	index = priv-&gt;art_base_index + HW_ATL2_RPF_VLAN_PROMISC_OFF_INDEX;</div><div class='add'>+	hw_atl2_act_rslvr_table_set(self, index, 0,</div><div class='add'>+				    HW_ATL2_RPF_TAG_VLAN_MASK |</div><div class='add'>+				    HW_ATL2_RPF_TAG_UNTAG_MASK, off_action);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static void hw_atl2_hw_new_rx_filter_promisc(struct aq_hw_s *self, bool promisc)</div><div class='add'>+{</div><div class='add'>+	u16 off_action = promisc ? HW_ATL2_ACTION_DISABLE : HW_ATL2_ACTION_DROP;</div><div class='add'>+	struct hw_atl2_priv *priv = self-&gt;priv;</div><div class='add'>+	bool vlan_promisc_enable;</div><div class='add'>+	u8 index;</div><div class='add'>+</div><div class='add'>+	index = priv-&gt;art_base_index + HW_ATL2_RPF_L2_PROMISC_OFF_INDEX;</div><div class='add'>+	hw_atl2_act_rslvr_table_set(self, index, 0,</div><div class='add'>+				    HW_ATL2_RPF_TAG_UC_MASK |</div><div class='add'>+				    HW_ATL2_RPF_TAG_ALLMC_MASK,</div><div class='add'>+				    off_action);</div><div class='add'>+</div><div class='add'>+	/* turn VLAN promisc mode too */</div><div class='add'>+	vlan_promisc_enable = hw_atl_rpf_vlan_prom_mode_en_get(self);</div><div class='add'>+	hw_atl2_hw_new_rx_filter_vlan_promisc(self, promisc |</div><div class='add'>+					      vlan_promisc_enable);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl2_act_rslvr_table_set(struct aq_hw_s *self, u8 location,</div><div class='add'>+				       u32 tag, u32 mask, u32 action)</div><div class='add'>+{</div><div class='add'>+	u32 val;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = readx_poll_timeout_atomic(hw_atl2_sem_act_rslvr_get,</div><div class='add'>+					self, val, val == 1,</div><div class='add'>+					1, 10000U);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	hw_atl2_rpf_act_rslvr_record_set(self, location, tag, mask,</div><div class='add'>+					 action);</div><div class='add'>+</div><div class='add'>+	hw_atl_reg_glb_cpu_sem_set(self, 1, HW_ATL2_FW_SM_ACT_RSLVR);</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl2_hw_init_rx_path(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_cfg_s *cfg = self-&gt;aq_nic_cfg;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	/* Rx TC/RSS number config */</div><div class='add'>+	hw_atl_rpb_rpf_rx_traf_class_mode_set(self, cfg-&gt;tc_mode);</div><div class='add'>+</div><div class='add'>+	/* Rx flow control */</div><div class='add'>+	hw_atl_rpb_rx_flow_ctl_mode_set(self, 1U);</div><div class='add'>+</div><div class='add'>+	hw_atl2_rpf_rss_hash_type_set(self, HW_ATL2_RPF_RSS_HASH_TYPE_ALL);</div><div class='add'>+</div><div class='add'>+	/* RSS Ring selection */</div><div class='add'>+	hw_atl_b0_hw_init_rx_rss_ctrl1(self);</div><div class='add'>+</div><div class='add'>+	/* Multicast filters */</div><div class='add'>+	for (i = HW_ATL2_MAC_MAX; i--;) {</div><div class='add'>+		hw_atl_rpfl2_uc_flr_en_set(self, (i == 0U) ? 1U : 0U, i);</div><div class='add'>+		hw_atl_rpfl2unicast_flr_act_set(self, 1U, i);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	hw_atl_reg_rx_flr_mcst_flr_msk_set(self, 0x00000000U);</div><div class='add'>+	hw_atl_reg_rx_flr_mcst_flr_set(self, HW_ATL_MCAST_FLT_ANY_TO_HOST, 0U);</div><div class='add'>+</div><div class='add'>+	/* Vlan filters */</div><div class='add'>+	hw_atl_rpf_vlan_outer_etht_set(self, ETH_P_8021AD);</div><div class='add'>+	hw_atl_rpf_vlan_inner_etht_set(self, ETH_P_8021Q);</div><div class='add'>+</div><div class='add'>+	hw_atl_rpf_vlan_prom_mode_en_set(self, 1);</div><div class='add'>+</div><div class='add'>+	/* Always accept untagged packets */</div><div class='add'>+	hw_atl_rpf_vlan_accept_untagged_packets_set(self, 1U);</div><div class='add'>+	hw_atl_rpf_vlan_untagged_act_set(self, 1U);</div><div class='add'>+</div><div class='add'>+	hw_atl2_hw_init_new_rx_filters(self);</div><div class='add'>+</div><div class='add'>+	/* Rx Interrupts */</div><div class='add'>+	hw_atl_rdm_rx_desc_wr_wb_irq_en_set(self, 1U);</div><div class='add'>+</div><div class='add'>+	hw_atl_rpfl2broadcast_flr_act_set(self, 1U);</div><div class='add'>+	hw_atl_rpfl2broadcast_count_threshold_set(self, 0xFFFFU &amp; (~0U / 256U));</div><div class='add'>+</div><div class='add'>+	hw_atl_rdm_rx_dca_en_set(self, 0U);</div><div class='add'>+	hw_atl_rdm_rx_dca_mode_set(self, 0U);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl2_hw_init(struct aq_hw_s *self, const u8 *mac_addr)</div><div class='add'>+{</div><div class='add'>+	static u32 aq_hw_atl2_igcr_table_[4][2] = {</div><div class='add'>+		[AQ_HW_IRQ_INVALID] = { 0x20000000U, 0x20000000U },</div><div class='add'>+		[AQ_HW_IRQ_INTX]    = { 0x20000080U, 0x20000080U },</div><div class='add'>+		[AQ_HW_IRQ_MSI]     = { 0x20000021U, 0x20000025U },</div><div class='add'>+		[AQ_HW_IRQ_MSIX]    = { 0x20000022U, 0x20000026U },</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	struct aq_nic_cfg_s *aq_nic_cfg = self-&gt;aq_nic_cfg;</div><div class='add'>+	struct hw_atl2_priv *priv = self-&gt;priv;</div><div class='add'>+	u8 base_index, count;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	err = hw_atl2_utils_get_action_resolve_table_caps(self, &amp;base_index,</div><div class='add'>+							  &amp;count);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	priv-&gt;art_base_index = 8 * base_index;</div><div class='add'>+</div><div class='add'>+	hw_atl2_init_launchtime(self);</div><div class='add'>+</div><div class='add'>+	hw_atl2_hw_init_tx_path(self);</div><div class='add'>+	hw_atl2_hw_init_rx_path(self);</div><div class='add'>+</div><div class='add'>+	hw_atl_b0_hw_mac_addr_set(self, mac_addr);</div><div class='add'>+</div><div class='add'>+	self-&gt;aq_fw_ops-&gt;set_link_speed(self, aq_nic_cfg-&gt;link_speed_msk);</div><div class='add'>+	self-&gt;aq_fw_ops-&gt;set_state(self, MPI_INIT);</div><div class='add'>+</div><div class='add'>+	hw_atl2_hw_qos_set(self);</div><div class='add'>+	hw_atl2_hw_rss_set(self, &amp;aq_nic_cfg-&gt;aq_rss);</div><div class='add'>+	hw_atl_b0_hw_rss_hash_set(self, &amp;aq_nic_cfg-&gt;aq_rss);</div><div class='add'>+</div><div class='add'>+	hw_atl2_rpf_new_enable_set(self, 1);</div><div class='add'>+</div><div class='add'>+	/* Reset link status and read out initial hardware counters */</div><div class='add'>+	self-&gt;aq_link_status.mbps = 0;</div><div class='add'>+	self-&gt;aq_fw_ops-&gt;update_stats(self);</div><div class='add'>+</div><div class='add'>+	err = aq_hw_err_from_flags(self);</div><div class='add'>+	if (err &lt; 0)</div><div class='add'>+		goto err_exit;</div><div class='add'>+</div><div class='add'>+	/* Interrupts */</div><div class='add'>+	hw_atl_reg_irq_glb_ctl_set(self,</div><div class='add'>+				   aq_hw_atl2_igcr_table_[aq_nic_cfg-&gt;irq_type]</div><div class='add'>+						 [(aq_nic_cfg-&gt;vecs &gt; 1U) ?</div><div class='add'>+						  1 : 0]);</div><div class='add'>+</div><div class='add'>+	hw_atl_itr_irq_auto_masklsw_set(self, aq_nic_cfg-&gt;aq_hw_caps-&gt;irq_mask);</div><div class='add'>+</div><div class='add'>+	/* Interrupts */</div><div class='add'>+	hw_atl_reg_gen_irq_map_set(self,</div><div class='add'>+				   ((HW_ATL2_ERR_INT &lt;&lt; 0x18) |</div><div class='add'>+				    (1U &lt;&lt; 0x1F)) |</div><div class='add'>+				   ((HW_ATL2_ERR_INT &lt;&lt; 0x10) |</div><div class='add'>+				    (1U &lt;&lt; 0x17)), 0U);</div><div class='add'>+</div><div class='add'>+	hw_atl_b0_hw_offload_set(self, aq_nic_cfg);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl2_hw_ring_rx_init(struct aq_hw_s *self,</div><div class='add'>+				   struct aq_ring_s *aq_ring,</div><div class='add'>+				   struct aq_ring_param_s *aq_ring_param)</div><div class='add'>+{</div><div class='add'>+	return hw_atl_b0_hw_ring_rx_init(self, aq_ring, aq_ring_param);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl2_hw_ring_tx_init(struct aq_hw_s *self,</div><div class='add'>+				   struct aq_ring_s *aq_ring,</div><div class='add'>+				   struct aq_ring_param_s *aq_ring_param)</div><div class='add'>+{</div><div class='add'>+	return hw_atl_b0_hw_ring_tx_init(self, aq_ring, aq_ring_param);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#define IS_FILTER_ENABLED(_F_) ((packet_filter &amp; (_F_)) ? 1U : 0U)</div><div class='add'>+</div><div class='add'>+static int hw_atl2_hw_packet_filter_set(struct aq_hw_s *self,</div><div class='add'>+					unsigned int packet_filter)</div><div class='add'>+{</div><div class='add'>+	hw_atl2_hw_new_rx_filter_promisc(self, IS_FILTER_ENABLED(IFF_PROMISC));</div><div class='add'>+</div><div class='add'>+	return hw_atl_b0_hw_packet_filter_set(self, packet_filter);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+#undef IS_FILTER_ENABLED</div><div class='add'>+</div><div class='add'>+static int hw_atl2_hw_multicast_list_set(struct aq_hw_s *self,</div><div class='add'>+					 u8 ar_mac</div><div class='add'>+					 [AQ_HW_MULTICAST_ADDRESS_MAX]</div><div class='add'>+					 [ETH_ALEN],</div><div class='add'>+					 u32 count)</div><div class='add'>+{</div><div class='add'>+	struct aq_nic_cfg_s *cfg = self-&gt;aq_nic_cfg;</div><div class='add'>+	int err = 0;</div><div class='add'>+</div><div class='add'>+	if (count &gt; (HW_ATL2_MAC_MAX - HW_ATL2_MAC_MIN)) {</div><div class='add'>+		err = -EBADRQC;</div><div class='add'>+		goto err_exit;</div><div class='add'>+	}</div><div class='add'>+	for (cfg-&gt;mc_list_count = 0U;</div><div class='add'>+			cfg-&gt;mc_list_count &lt; count;</div><div class='add'>+			++cfg-&gt;mc_list_count) {</div><div class='add'>+		u32 i = cfg-&gt;mc_list_count;</div><div class='add'>+		u32 h = (ar_mac[i][0] &lt;&lt; 8) | (ar_mac[i][1]);</div><div class='add'>+		u32 l = (ar_mac[i][2] &lt;&lt; 24) | (ar_mac[i][3] &lt;&lt; 16) |</div><div class='add'>+					(ar_mac[i][4] &lt;&lt; 8) | ar_mac[i][5];</div><div class='add'>+</div><div class='add'>+		hw_atl_rpfl2_uc_flr_en_set(self, 0U, HW_ATL2_MAC_MIN + i);</div><div class='add'>+</div><div class='add'>+		hw_atl_rpfl2unicast_dest_addresslsw_set(self, l,</div><div class='add'>+							HW_ATL2_MAC_MIN + i);</div><div class='add'>+</div><div class='add'>+		hw_atl_rpfl2unicast_dest_addressmsw_set(self, h,</div><div class='add'>+							HW_ATL2_MAC_MIN + i);</div><div class='add'>+</div><div class='add'>+		hw_atl2_rpfl2_uc_flr_tag_set(self, 1, HW_ATL2_MAC_MIN + i);</div><div class='add'>+</div><div class='add'>+		hw_atl_rpfl2_uc_flr_en_set(self, (cfg-&gt;is_mc_list_enabled),</div><div class='add'>+					   HW_ATL2_MAC_MIN + i);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = aq_hw_err_from_flags(self);</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl2_hw_interrupt_moderation_set(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	unsigned int i = 0U;</div><div class='add'>+	u32 itr_tx = 2U;</div><div class='add'>+	u32 itr_rx = 2U;</div><div class='add'>+</div><div class='add'>+	switch (self-&gt;aq_nic_cfg-&gt;itr) {</div><div class='add'>+	case  AQ_CFG_INTERRUPT_MODERATION_ON:</div><div class='add'>+	case  AQ_CFG_INTERRUPT_MODERATION_AUTO:</div><div class='add'>+		hw_atl_tdm_tx_desc_wr_wb_irq_en_set(self, 0U);</div><div class='add'>+		hw_atl_tdm_tdm_intr_moder_en_set(self, 1U);</div><div class='add'>+		hw_atl_rdm_rx_desc_wr_wb_irq_en_set(self, 0U);</div><div class='add'>+		hw_atl_rdm_rdm_intr_moder_en_set(self, 1U);</div><div class='add'>+</div><div class='add'>+		if (self-&gt;aq_nic_cfg-&gt;itr == AQ_CFG_INTERRUPT_MODERATION_ON) {</div><div class='add'>+			/* HW timers are in 2us units */</div><div class='add'>+			int tx_max_timer = self-&gt;aq_nic_cfg-&gt;tx_itr / 2;</div><div class='add'>+			int tx_min_timer = tx_max_timer / 2;</div><div class='add'>+</div><div class='add'>+			int rx_max_timer = self-&gt;aq_nic_cfg-&gt;rx_itr / 2;</div><div class='add'>+			int rx_min_timer = rx_max_timer / 2;</div><div class='add'>+</div><div class='add'>+			tx_max_timer = min(HW_ATL2_INTR_MODER_MAX,</div><div class='add'>+					   tx_max_timer);</div><div class='add'>+			tx_min_timer = min(HW_ATL2_INTR_MODER_MIN,</div><div class='add'>+					   tx_min_timer);</div><div class='add'>+			rx_max_timer = min(HW_ATL2_INTR_MODER_MAX,</div><div class='add'>+					   rx_max_timer);</div><div class='add'>+			rx_min_timer = min(HW_ATL2_INTR_MODER_MIN,</div><div class='add'>+					   rx_min_timer);</div><div class='add'>+</div><div class='add'>+			itr_tx |= tx_min_timer &lt;&lt; 0x8U;</div><div class='add'>+			itr_tx |= tx_max_timer &lt;&lt; 0x10U;</div><div class='add'>+			itr_rx |= rx_min_timer &lt;&lt; 0x8U;</div><div class='add'>+			itr_rx |= rx_max_timer &lt;&lt; 0x10U;</div><div class='add'>+		} else {</div><div class='add'>+			static unsigned int hw_atl2_timers_table_tx_[][2] = {</div><div class='add'>+				{0xfU, 0xffU}, /* 10Gbit */</div><div class='add'>+				{0xfU, 0x1ffU}, /* 5Gbit */</div><div class='add'>+				{0xfU, 0x1ffU}, /* 5Gbit 5GS */</div><div class='add'>+				{0xfU, 0x1ffU}, /* 2.5Gbit */</div><div class='add'>+				{0xfU, 0x1ffU}, /* 1Gbit */</div><div class='add'>+				{0xfU, 0x1ffU}, /* 100Mbit */</div><div class='add'>+			};</div><div class='add'>+			static unsigned int hw_atl2_timers_table_rx_[][2] = {</div><div class='add'>+				{0x6U, 0x38U},/* 10Gbit */</div><div class='add'>+				{0xCU, 0x70U},/* 5Gbit */</div><div class='add'>+				{0xCU, 0x70U},/* 5Gbit 5GS */</div><div class='add'>+				{0x18U, 0xE0U},/* 2.5Gbit */</div><div class='add'>+				{0x30U, 0x80U},/* 1Gbit */</div><div class='add'>+				{0x4U, 0x50U},/* 100Mbit */</div><div class='add'>+			};</div><div class='add'>+			unsigned int mbps = self-&gt;aq_link_status.mbps;</div><div class='add'>+			unsigned int speed_index;</div><div class='add'>+</div><div class='add'>+			speed_index = hw_atl_utils_mbps_2_speed_index(mbps);</div><div class='add'>+</div><div class='add'>+			/* Update user visible ITR settings */</div><div class='add'>+			self-&gt;aq_nic_cfg-&gt;tx_itr = hw_atl2_timers_table_tx_</div><div class='add'>+							[speed_index][1] * 2;</div><div class='add'>+			self-&gt;aq_nic_cfg-&gt;rx_itr = hw_atl2_timers_table_rx_</div><div class='add'>+							[speed_index][1] * 2;</div><div class='add'>+</div><div class='add'>+			itr_tx |= hw_atl2_timers_table_tx_</div><div class='add'>+						[speed_index][0] &lt;&lt; 0x8U;</div><div class='add'>+			itr_tx |= hw_atl2_timers_table_tx_</div><div class='add'>+						[speed_index][1] &lt;&lt; 0x10U;</div><div class='add'>+</div><div class='add'>+			itr_rx |= hw_atl2_timers_table_rx_</div><div class='add'>+						[speed_index][0] &lt;&lt; 0x8U;</div><div class='add'>+			itr_rx |= hw_atl2_timers_table_rx_</div><div class='add'>+						[speed_index][1] &lt;&lt; 0x10U;</div><div class='add'>+		}</div><div class='add'>+		break;</div><div class='add'>+	case AQ_CFG_INTERRUPT_MODERATION_OFF:</div><div class='add'>+		hw_atl_tdm_tx_desc_wr_wb_irq_en_set(self, 1U);</div><div class='add'>+		hw_atl_tdm_tdm_intr_moder_en_set(self, 0U);</div><div class='add'>+		hw_atl_rdm_rx_desc_wr_wb_irq_en_set(self, 1U);</div><div class='add'>+		hw_atl_rdm_rdm_intr_moder_en_set(self, 0U);</div><div class='add'>+		itr_tx = 0U;</div><div class='add'>+		itr_rx = 0U;</div><div class='add'>+		break;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	for (i = HW_ATL2_RINGS_MAX; i--;) {</div><div class='add'>+		hw_atl2_reg_tx_intr_moder_ctrl_set(self, itr_tx, i);</div><div class='add'>+		hw_atl_reg_rx_intr_moder_ctrl_set(self, itr_rx, i);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl2_hw_stop(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	hw_atl_b0_hw_irq_disable(self, HW_ATL2_INT_MASK);</div><div class='add'>+</div><div class='add'>+	return aq_hw_invalidate_descriptor_cache(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static struct aq_stats_s *hw_atl2_utils_get_hw_stats(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	return &amp;self-&gt;curr_stats;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl2_hw_vlan_set(struct aq_hw_s *self,</div><div class='add'>+			       struct aq_rx_filter_vlan *aq_vlans)</div><div class='add'>+{</div><div class='add'>+	struct hw_atl2_priv *priv = self-&gt;priv;</div><div class='add'>+	u32 queue;</div><div class='add'>+	u8 index;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	hw_atl_rpf_vlan_prom_mode_en_set(self, 1U);</div><div class='add'>+</div><div class='add'>+	for (i = 0; i &lt; HW_ATL_VLAN_MAX_FILTERS; i++) {</div><div class='add'>+		queue = HW_ATL2_ACTION_ASSIGN_QUEUE(aq_vlans[i].queue);</div><div class='add'>+</div><div class='add'>+		hw_atl_rpf_vlan_flr_en_set(self, 0U, i);</div><div class='add'>+		hw_atl_rpf_vlan_rxq_en_flr_set(self, 0U, i);</div><div class='add'>+		index = priv-&gt;art_base_index + HW_ATL2_RPF_VLAN_USER_INDEX + i;</div><div class='add'>+		hw_atl2_act_rslvr_table_set(self, index, 0, 0,</div><div class='add'>+					    HW_ATL2_ACTION_DISABLE);</div><div class='add'>+		if (aq_vlans[i].enable) {</div><div class='add'>+			hw_atl_rpf_vlan_id_flr_set(self,</div><div class='add'>+						   aq_vlans[i].vlan_id, i);</div><div class='add'>+			hw_atl_rpf_vlan_flr_act_set(self, 1U, i);</div><div class='add'>+			hw_atl_rpf_vlan_flr_en_set(self, 1U, i);</div><div class='add'>+</div><div class='add'>+			if (aq_vlans[i].queue != 0xFF) {</div><div class='add'>+				hw_atl_rpf_vlan_rxq_flr_set(self,</div><div class='add'>+							    aq_vlans[i].queue,</div><div class='add'>+							    i);</div><div class='add'>+				hw_atl_rpf_vlan_rxq_en_flr_set(self, 1U, i);</div><div class='add'>+</div><div class='add'>+				hw_atl2_rpf_vlan_flr_tag_set(self, i + 2, i);</div><div class='add'>+</div><div class='add'>+				index = priv-&gt;art_base_index +</div><div class='add'>+					HW_ATL2_RPF_VLAN_USER_INDEX + i;</div><div class='add'>+				hw_atl2_act_rslvr_table_set(self, index,</div><div class='add'>+					(i + 2) &lt;&lt; HW_ATL2_RPF_TAG_VLAN_OFFSET,</div><div class='add'>+					HW_ATL2_RPF_TAG_VLAN_MASK, queue);</div><div class='add'>+			} else {</div><div class='add'>+				hw_atl2_rpf_vlan_flr_tag_set(self, 1, i);</div><div class='add'>+			}</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static int hw_atl2_hw_vlan_ctrl(struct aq_hw_s *self, bool enable)</div><div class='add'>+{</div><div class='add'>+	/* set promisc in case of disabing the vlan filter */</div><div class='add'>+	hw_atl_rpf_vlan_prom_mode_en_set(self, !enable);</div><div class='add'>+	hw_atl2_hw_new_rx_filter_vlan_promisc(self, !enable);</div><div class='add'>+</div><div class='add'>+	return aq_hw_err_from_flags(self);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+const struct aq_hw_ops hw_atl2_ops = {</div><div class='add'>+	.hw_soft_reset        = hw_atl2_utils_soft_reset,</div><div class='add'>+	.hw_prepare           = hw_atl2_utils_initfw,</div><div class='add'>+	.hw_set_mac_address   = hw_atl_b0_hw_mac_addr_set,</div><div class='add'>+	.hw_init              = hw_atl2_hw_init,</div><div class='add'>+	.hw_reset             = hw_atl2_hw_reset,</div><div class='add'>+	.hw_start             = hw_atl_b0_hw_start,</div><div class='add'>+	.hw_ring_tx_start     = hw_atl_b0_hw_ring_tx_start,</div><div class='add'>+	.hw_ring_tx_stop      = hw_atl_b0_hw_ring_tx_stop,</div><div class='add'>+	.hw_ring_rx_start     = hw_atl_b0_hw_ring_rx_start,</div><div class='add'>+	.hw_ring_rx_stop      = hw_atl_b0_hw_ring_rx_stop,</div><div class='add'>+	.hw_stop              = hw_atl2_hw_stop,</div><div class='add'>+</div><div class='add'>+	.hw_ring_tx_xmit         = hw_atl_b0_hw_ring_tx_xmit,</div><div class='add'>+	.hw_ring_tx_head_update  = hw_atl_b0_hw_ring_tx_head_update,</div><div class='add'>+</div><div class='add'>+	.hw_ring_rx_receive      = hw_atl_b0_hw_ring_rx_receive,</div><div class='add'>+	.hw_ring_rx_fill         = hw_atl_b0_hw_ring_rx_fill,</div><div class='add'>+</div><div class='add'>+	.hw_irq_enable           = hw_atl_b0_hw_irq_enable,</div><div class='add'>+	.hw_irq_disable          = hw_atl_b0_hw_irq_disable,</div><div class='add'>+	.hw_irq_read             = hw_atl_b0_hw_irq_read,</div><div class='add'>+</div><div class='add'>+	.hw_ring_rx_init             = hw_atl2_hw_ring_rx_init,</div><div class='add'>+	.hw_ring_tx_init             = hw_atl2_hw_ring_tx_init,</div><div class='add'>+	.hw_packet_filter_set        = hw_atl2_hw_packet_filter_set,</div><div class='add'>+	.hw_filter_vlan_set          = hw_atl2_hw_vlan_set,</div><div class='add'>+	.hw_filter_vlan_ctrl         = hw_atl2_hw_vlan_ctrl,</div><div class='add'>+	.hw_multicast_list_set       = hw_atl2_hw_multicast_list_set,</div><div class='add'>+	.hw_interrupt_moderation_set = hw_atl2_hw_interrupt_moderation_set,</div><div class='add'>+	.hw_rss_set                  = hw_atl2_hw_rss_set,</div><div class='add'>+	.hw_rss_hash_set             = hw_atl_b0_hw_rss_hash_set,</div><div class='add'>+	.hw_tc_rate_limit_set        = hw_atl2_hw_init_tx_tc_rate_limit,</div><div class='add'>+	.hw_get_hw_stats             = hw_atl2_utils_get_hw_stats,</div><div class='add'>+	.hw_get_fw_version           = hw_atl2_utils_get_fw_version,</div><div class='add'>+	.hw_set_offload              = hw_atl_b0_hw_offload_set,</div><div class='add'>+	.hw_set_loopback             = hw_atl_b0_set_loopback,</div><div class='add'>+	.hw_set_fc                   = hw_atl_b0_set_fc,</div><div class='add'>+};</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2.h b/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2.h<br/>new file mode 100644<br/>index 000000000000..346f0dc9912e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2.h</a></div><div class='hunk'>@@ -0,0 +1,16 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ * Copyright (C) 2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef HW_ATL2_H</div><div class='add'>+#define HW_ATL2_H</div><div class='add'>+</div><div class='add'>+#include "aq_common.h"</div><div class='add'>+</div><div class='add'>+extern const struct aq_hw_caps_s hw_atl2_caps_aqc113;</div><div class='add'>+extern const struct aq_hw_caps_s hw_atl2_caps_aqc115c;</div><div class='add'>+extern const struct aq_hw_caps_s hw_atl2_caps_aqc116c;</div><div class='add'>+extern const struct aq_hw_ops hw_atl2_ops;</div><div class='add'>+</div><div class='add'>+#endif /* HW_ATL2_H */</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_internal.h b/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_internal.h<br/>new file mode 100644<br/>index 000000000000..5a89bb8722f9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_internal.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_internal.h</a></div><div class='hunk'>@@ -0,0 +1,127 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ * Copyright (C) 2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef HW_ATL2_INTERNAL_H</div><div class='add'>+#define HW_ATL2_INTERNAL_H</div><div class='add'>+</div><div class='add'>+#include "hw_atl2_utils.h"</div><div class='add'>+</div><div class='add'>+#define HW_ATL2_MTU_JUMBO  16352U</div><div class='add'>+#define HW_ATL2_MTU        1514U</div><div class='add'>+</div><div class='add'>+#define HW_ATL2_TX_RINGS 4U</div><div class='add'>+#define HW_ATL2_RX_RINGS 4U</div><div class='add'>+</div><div class='add'>+#define HW_ATL2_RINGS_MAX 32U</div><div class='add'>+#define HW_ATL2_TXD_SIZE       (16U)</div><div class='add'>+#define HW_ATL2_RXD_SIZE       (16U)</div><div class='add'>+</div><div class='add'>+#define HW_ATL2_MAC_UC   0U</div><div class='add'>+#define HW_ATL2_MAC_MIN  1U</div><div class='add'>+#define HW_ATL2_MAC_MAX  38U</div><div class='add'>+</div><div class='add'>+/* interrupts */</div><div class='add'>+#define HW_ATL2_ERR_INT 8U</div><div class='add'>+#define HW_ATL2_INT_MASK  (0xFFFFFFFFU)</div><div class='add'>+</div><div class='add'>+#define HW_ATL2_TXBUF_MAX              128U</div><div class='add'>+#define HW_ATL2_RXBUF_MAX              192U</div><div class='add'>+</div><div class='add'>+#define HW_ATL2_RSS_REDIRECTION_MAX 64U</div><div class='add'>+</div><div class='add'>+#define HW_ATL2_TC_MAX 8U</div><div class='add'>+#define HW_ATL2_RSS_MAX 8U</div><div class='add'>+</div><div class='add'>+#define HW_ATL2_INTR_MODER_MAX  0x1FF</div><div class='add'>+#define HW_ATL2_INTR_MODER_MIN  0xFF</div><div class='add'>+</div><div class='add'>+#define HW_ATL2_MIN_RXD \</div><div class='add'>+	(ALIGN(AQ_CFG_SKB_FRAGS_MAX + 1U, AQ_HW_RXD_MULTIPLE))</div><div class='add'>+#define HW_ATL2_MIN_TXD \</div><div class='add'>+	(ALIGN(AQ_CFG_SKB_FRAGS_MAX + 1U, AQ_HW_TXD_MULTIPLE))</div><div class='add'>+</div><div class='add'>+#define HW_ATL2_MAX_RXD 8184U</div><div class='add'>+#define HW_ATL2_MAX_TXD 8184U</div><div class='add'>+</div><div class='add'>+#define HW_ATL2_FW_SM_ACT_RSLVR  0x3U</div><div class='add'>+</div><div class='add'>+#define HW_ATL2_RPF_TAG_UC_OFFSET      0x0</div><div class='add'>+#define HW_ATL2_RPF_TAG_ALLMC_OFFSET   0x6</div><div class='add'>+#define HW_ATL2_RPF_TAG_ET_OFFSET      0x7</div><div class='add'>+#define HW_ATL2_RPF_TAG_VLAN_OFFSET    0xA</div><div class='add'>+#define HW_ATL2_RPF_TAG_UNTAG_OFFSET   0xE</div><div class='add'>+#define HW_ATL2_RPF_TAG_L3_V4_OFFSET   0xF</div><div class='add'>+#define HW_ATL2_RPF_TAG_L3_V6_OFFSET   0x12</div><div class='add'>+#define HW_ATL2_RPF_TAG_L4_OFFSET      0x15</div><div class='add'>+#define HW_ATL2_RPF_TAG_L4_FLEX_OFFSET 0x18</div><div class='add'>+#define HW_ATL2_RPF_TAG_FLEX_OFFSET    0x1B</div><div class='add'>+#define HW_ATL2_RPF_TAG_PCP_OFFSET     0x1D</div><div class='add'>+</div><div class='add'>+#define HW_ATL2_RPF_TAG_UC_MASK    (0x0000003F &lt;&lt; HW_ATL2_RPF_TAG_UC_OFFSET)</div><div class='add'>+#define HW_ATL2_RPF_TAG_ALLMC_MASK (0x00000001 &lt;&lt; HW_ATL2_RPF_TAG_ALLMC_OFFSET)</div><div class='add'>+#define HW_ATL2_RPF_TAG_UNTAG_MASK (0x00000001 &lt;&lt; HW_ATL2_RPF_TAG_UNTAG_OFFSET)</div><div class='add'>+#define HW_ATL2_RPF_TAG_VLAN_MASK  (0x0000000F &lt;&lt; HW_ATL2_RPF_TAG_VLAN_OFFSET)</div><div class='add'>+#define HW_ATL2_RPF_TAG_ET_MASK    (0x00000007 &lt;&lt; HW_ATL2_RPF_TAG_ET_OFFSET)</div><div class='add'>+#define HW_ATL2_RPF_TAG_L3_V4_MASK (0x00000007 &lt;&lt; HW_ATL2_RPF_TAG_L3_V4_OFFSET)</div><div class='add'>+#define HW_ATL2_RPF_TAG_L3_V6_MASK (0x00000007 &lt;&lt; HW_ATL2_RPF_TAG_L3_V6_OFFSET)</div><div class='add'>+#define HW_ATL2_RPF_TAG_L4_MASK    (0x00000007 &lt;&lt; HW_ATL2_RPF_TAG_L4_OFFSET)</div><div class='add'>+#define HW_ATL2_RPF_TAG_PCP_MASK   (0x00000007 &lt;&lt; HW_ATL2_RPF_TAG_PCP_OFFSET)</div><div class='add'>+</div><div class='add'>+#define HW_ATL2_RPF_TAG_BASE_UC    BIT(HW_ATL2_RPF_TAG_UC_OFFSET)</div><div class='add'>+#define HW_ATL2_RPF_TAG_BASE_ALLMC BIT(HW_ATL2_RPF_TAG_ALLMC_OFFSET)</div><div class='add'>+#define HW_ATL2_RPF_TAG_BASE_UNTAG BIT(HW_ATL2_RPF_TAG_UNTAG_OFFSET)</div><div class='add'>+#define HW_ATL2_RPF_TAG_BASE_VLAN  BIT(HW_ATL2_RPF_TAG_VLAN_OFFSET)</div><div class='add'>+</div><div class='add'>+enum HW_ATL2_RPF_ART_INDEX {</div><div class='add'>+	HW_ATL2_RPF_L2_PROMISC_OFF_INDEX,</div><div class='add'>+	HW_ATL2_RPF_VLAN_PROMISC_OFF_INDEX,</div><div class='add'>+	HW_ATL2_RPF_L3L4_USER_INDEX	= 8,</div><div class='add'>+	HW_ATL2_RPF_ET_PCP_USER_INDEX	= HW_ATL2_RPF_L3L4_USER_INDEX + 16,</div><div class='add'>+	HW_ATL2_RPF_VLAN_USER_INDEX	= HW_ATL2_RPF_ET_PCP_USER_INDEX + 16,</div><div class='add'>+	HW_ATL2_RPF_PCP_TO_TC_INDEX	= HW_ATL2_RPF_VLAN_USER_INDEX +</div><div class='add'>+					  HW_ATL_VLAN_MAX_FILTERS,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define HW_ATL2_ACTION(ACTION, RSS, INDEX, VALID) \</div><div class='add'>+	((((ACTION) &amp; 0x3U) &lt;&lt; 8) | \</div><div class='add'>+	(((RSS) &amp; 0x1U) &lt;&lt; 7) | \</div><div class='add'>+	(((INDEX) &amp; 0x3FU) &lt;&lt; 2) | \</div><div class='add'>+	(((VALID) &amp; 0x1U) &lt;&lt; 0))</div><div class='add'>+</div><div class='add'>+#define HW_ATL2_ACTION_DROP HW_ATL2_ACTION(0, 0, 0, 1)</div><div class='add'>+#define HW_ATL2_ACTION_DISABLE HW_ATL2_ACTION(0, 0, 0, 0)</div><div class='add'>+#define HW_ATL2_ACTION_ASSIGN_QUEUE(QUEUE) HW_ATL2_ACTION(1, 0, (QUEUE), 1)</div><div class='add'>+#define HW_ATL2_ACTION_ASSIGN_TC(TC) HW_ATL2_ACTION(1, 1, (TC), 1)</div><div class='add'>+</div><div class='add'>+enum HW_ATL2_RPF_RSS_HASH_TYPE {</div><div class='add'>+	HW_ATL2_RPF_RSS_HASH_TYPE_NONE = 0,</div><div class='add'>+	HW_ATL2_RPF_RSS_HASH_TYPE_IPV4 = BIT(0),</div><div class='add'>+	HW_ATL2_RPF_RSS_HASH_TYPE_IPV4_TCP = BIT(1),</div><div class='add'>+	HW_ATL2_RPF_RSS_HASH_TYPE_IPV4_UDP = BIT(2),</div><div class='add'>+	HW_ATL2_RPF_RSS_HASH_TYPE_IPV6 = BIT(3),</div><div class='add'>+	HW_ATL2_RPF_RSS_HASH_TYPE_IPV6_TCP = BIT(4),</div><div class='add'>+	HW_ATL2_RPF_RSS_HASH_TYPE_IPV6_UDP = BIT(5),</div><div class='add'>+	HW_ATL2_RPF_RSS_HASH_TYPE_IPV6_EX = BIT(6),</div><div class='add'>+	HW_ATL2_RPF_RSS_HASH_TYPE_IPV6_EX_TCP = BIT(7),</div><div class='add'>+	HW_ATL2_RPF_RSS_HASH_TYPE_IPV6_EX_UDP = BIT(8),</div><div class='add'>+	HW_ATL2_RPF_RSS_HASH_TYPE_ALL = HW_ATL2_RPF_RSS_HASH_TYPE_IPV4 |</div><div class='add'>+					HW_ATL2_RPF_RSS_HASH_TYPE_IPV4_TCP |</div><div class='add'>+					HW_ATL2_RPF_RSS_HASH_TYPE_IPV4_UDP |</div><div class='add'>+					HW_ATL2_RPF_RSS_HASH_TYPE_IPV6 |</div><div class='add'>+					HW_ATL2_RPF_RSS_HASH_TYPE_IPV6_TCP |</div><div class='add'>+					HW_ATL2_RPF_RSS_HASH_TYPE_IPV6_UDP |</div><div class='add'>+					HW_ATL2_RPF_RSS_HASH_TYPE_IPV6_EX |</div><div class='add'>+					HW_ATL2_RPF_RSS_HASH_TYPE_IPV6_EX_TCP |</div><div class='add'>+					HW_ATL2_RPF_RSS_HASH_TYPE_IPV6_EX_UDP,</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#define HW_ATL_MCAST_FLT_ANY_TO_HOST 0x00010FFFU</div><div class='add'>+</div><div class='add'>+struct hw_atl2_priv {</div><div class='add'>+	struct statistics_s last_stats;</div><div class='add'>+	unsigned int art_base_index;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+#endif /* HW_ATL2_INTERNAL_H */</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_llh.c b/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_llh.c<br/>new file mode 100644<br/>index 000000000000..cd954b11d24a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_llh.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_llh.c</a></div><div class='hunk'>@@ -0,0 +1,234 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ * Copyright (C) 2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include "hw_atl2_llh.h"</div><div class='add'>+#include "hw_atl2_llh_internal.h"</div><div class='add'>+#include "aq_hw_utils.h"</div><div class='add'>+</div><div class='add'>+void hw_atl2_rpf_redirection_table2_select_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					       u32 select)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL2_RPF_PIF_RPF_REDIR2_ENI_ADR,</div><div class='add'>+			    HW_ATL2_RPF_PIF_RPF_REDIR2_ENI_MSK,</div><div class='add'>+			    HW_ATL2_RPF_PIF_RPF_REDIR2_ENI_SHIFT, select);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl2_rpf_rss_hash_type_set(struct aq_hw_s *aq_hw, u32 rss_hash_type)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL2_RPF_PIF_RPF_RSS_HASH_TYPEI_ADR,</div><div class='add'>+			    HW_ATL2_RPF_PIF_RPF_RSS_HASH_TYPEI_MSK,</div><div class='add'>+			    HW_ATL2_RPF_PIF_RPF_RSS_HASH_TYPEI_SHIFT,</div><div class='add'>+			    rss_hash_type);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* rpf */</div><div class='add'>+</div><div class='add'>+void hw_atl2_rpf_new_enable_set(struct aq_hw_s *aq_hw, u32 enable)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL2_RPF_NEW_EN_ADR,</div><div class='add'>+			    HW_ATL2_RPF_NEW_EN_MSK,</div><div class='add'>+			    HW_ATL2_RPF_NEW_EN_SHIFT,</div><div class='add'>+			    enable);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl2_rpfl2_uc_flr_tag_set(struct aq_hw_s *aq_hw, u32 tag, u32 filter)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL2_RPFL2UC_TAG_ADR(filter),</div><div class='add'>+			    HW_ATL2_RPFL2UC_TAG_MSK,</div><div class='add'>+			    HW_ATL2_RPFL2UC_TAG_SHIFT,</div><div class='add'>+			    tag);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl2_rpfl2_bc_flr_tag_set(struct aq_hw_s *aq_hw, u32 tag)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL2_RPF_L2_BC_TAG_ADR,</div><div class='add'>+			    HW_ATL2_RPF_L2_BC_TAG_MSK,</div><div class='add'>+			    HW_ATL2_RPF_L2_BC_TAG_SHIFT,</div><div class='add'>+			    tag);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl2_new_rpf_rss_redir_set(struct aq_hw_s *aq_hw, u32 tc, u32 index,</div><div class='add'>+				   u32 queue)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL2_RPF_RSS_REDIR_ADR(tc, index),</div><div class='add'>+			    HW_ATL2_RPF_RSS_REDIR_MSK(tc),</div><div class='add'>+			    HW_ATL2_RPF_RSS_REDIR_SHIFT(tc),</div><div class='add'>+			    queue);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl2_rpf_vlan_flr_tag_set(struct aq_hw_s *aq_hw, u32 tag, u32 filter)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL2_RPF_VL_TAG_ADR(filter),</div><div class='add'>+			    HW_ATL2_RPF_VL_TAG_MSK,</div><div class='add'>+			    HW_ATL2_RPF_VL_TAG_SHIFT,</div><div class='add'>+			    tag);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* TX */</div><div class='add'>+</div><div class='add'>+void hw_atl2_tpb_tx_tc_q_rand_map_en_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					 const u32 tc_q_rand_map_en)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL2_TPB_TX_TC_Q_RAND_MAP_EN_ADR,</div><div class='add'>+			    HW_ATL2_TPB_TX_TC_Q_RAND_MAP_EN_MSK,</div><div class='add'>+			    HW_ATL2_TPB_TX_TC_Q_RAND_MAP_EN_SHIFT,</div><div class='add'>+			    tc_q_rand_map_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl2_tpb_tx_buf_clk_gate_en_set(struct aq_hw_s *aq_hw, u32 clk_gate_en)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL2_TPB_TX_BUF_CLK_GATE_EN_ADR,</div><div class='add'>+			    HW_ATL2_TPB_TX_BUF_CLK_GATE_EN_MSK,</div><div class='add'>+			    HW_ATL2_TPB_TX_BUF_CLK_GATE_EN_SHIFT,</div><div class='add'>+			    clk_gate_en);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl2_reg_tx_intr_moder_ctrl_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					u32 tx_intr_moderation_ctl,</div><div class='add'>+					u32 queue)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw, HW_ATL2_TX_INTR_MODERATION_CTL_ADR(queue),</div><div class='add'>+			tx_intr_moderation_ctl);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl2_tps_tx_pkt_shed_data_arb_mode_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					       const u32 data_arb_mode)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL2_TPS_DATA_TC_ARB_MODE_ADR,</div><div class='add'>+			    HW_ATL2_TPS_DATA_TC_ARB_MODE_MSK,</div><div class='add'>+			    HW_ATL2_TPS_DATA_TC_ARB_MODE_SHIFT,</div><div class='add'>+			    data_arb_mode);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl2_tps_tx_pkt_shed_tc_data_max_credit_set(struct aq_hw_s *aq_hw,</div><div class='add'>+						    const u32 tc,</div><div class='add'>+						    const u32 max_credit)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL2_TPS_DATA_TCTCREDIT_MAX_ADR(tc),</div><div class='add'>+			    HW_ATL2_TPS_DATA_TCTCREDIT_MAX_MSK,</div><div class='add'>+			    HW_ATL2_TPS_DATA_TCTCREDIT_MAX_SHIFT,</div><div class='add'>+			    max_credit);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl2_tps_tx_pkt_shed_tc_data_weight_set(struct aq_hw_s *aq_hw,</div><div class='add'>+						const u32 tc,</div><div class='add'>+						const u32 weight)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL2_TPS_DATA_TCTWEIGHT_ADR(tc),</div><div class='add'>+			    HW_ATL2_TPS_DATA_TCTWEIGHT_MSK,</div><div class='add'>+			    HW_ATL2_TPS_DATA_TCTWEIGHT_SHIFT,</div><div class='add'>+			    weight);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl2_get_hw_version(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg(aq_hw, HW_ATL2_FPGA_VER_ADR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl2_init_launchtime(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	u32 hw_ver = hw_atl2_get_hw_version(aq_hw);</div><div class='add'>+</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL2_LT_CTRL_ADR,</div><div class='add'>+			    HW_ATL2_LT_CTRL_CLK_RATIO_MSK,</div><div class='add'>+			    HW_ATL2_LT_CTRL_CLK_RATIO_SHIFT,</div><div class='add'>+			    hw_ver  &lt; HW_ATL2_FPGA_VER_U32(1, 0, 0, 0) ?</div><div class='add'>+			    HW_ATL2_LT_CTRL_CLK_RATIO_FULL_SPEED :</div><div class='add'>+			    hw_ver &gt;= HW_ATL2_FPGA_VER_U32(1, 0, 85, 2) ?</div><div class='add'>+			    HW_ATL2_LT_CTRL_CLK_RATIO_HALF_SPEED :</div><div class='add'>+			    HW_ATL2_LT_CTRL_CLK_RATIO_QUATER_SPEED);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+/* set action resolver record */</div><div class='add'>+void hw_atl2_rpf_act_rslvr_record_set(struct aq_hw_s *aq_hw, u8 location,</div><div class='add'>+				      u32 tag, u32 mask, u32 action)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg(aq_hw,</div><div class='add'>+			HW_ATL2_RPF_ACT_RSLVR_REQ_TAG_ADR(location),</div><div class='add'>+			tag);</div><div class='add'>+	aq_hw_write_reg(aq_hw,</div><div class='add'>+			HW_ATL2_RPF_ACT_RSLVR_TAG_MASK_ADR(location),</div><div class='add'>+			mask);</div><div class='add'>+	aq_hw_write_reg(aq_hw,</div><div class='add'>+			HW_ATL2_RPF_ACT_RSLVR_ACTN_ADR(location),</div><div class='add'>+			action);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl2_rpf_act_rslvr_section_en_set(struct aq_hw_s *aq_hw, u32 sections)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL2_RPF_REC_TAB_EN_ADR,</div><div class='add'>+			    HW_ATL2_RPF_REC_TAB_EN_MSK,</div><div class='add'>+			    HW_ATL2_RPF_REC_TAB_EN_SHIFT,</div><div class='add'>+			    sections);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl2_mif_shared_buf_get(struct aq_hw_s *aq_hw, int offset, u32 *data,</div><div class='add'>+				int len)</div><div class='add'>+{</div><div class='add'>+	int j = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = offset; i &lt; offset + len; i++, j++)</div><div class='add'>+		data[j] = aq_hw_read_reg(aq_hw,</div><div class='add'>+					 HW_ATL2_MIF_SHARED_BUFFER_IN_ADR(i));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl2_mif_shared_buf_write(struct aq_hw_s *aq_hw, int offset, u32 *data,</div><div class='add'>+				  int len)</div><div class='add'>+{</div><div class='add'>+	int j = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = offset; i &lt; offset + len; i++, j++)</div><div class='add'>+		aq_hw_write_reg(aq_hw, HW_ATL2_MIF_SHARED_BUFFER_IN_ADR(i),</div><div class='add'>+				data[j]);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl2_mif_shared_buf_read(struct aq_hw_s *aq_hw, int offset, u32 *data,</div><div class='add'>+				 int len)</div><div class='add'>+{</div><div class='add'>+	int j = 0;</div><div class='add'>+	int i;</div><div class='add'>+</div><div class='add'>+	for (i = offset; i &lt; offset + len; i++, j++)</div><div class='add'>+		data[j] = aq_hw_read_reg(aq_hw,</div><div class='add'>+					 HW_ATL2_MIF_SHARED_BUFFER_OUT_ADR(i));</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl2_mif_host_finished_write_set(struct aq_hw_s *aq_hw, u32 finish)</div><div class='add'>+{</div><div class='add'>+	aq_hw_write_reg_bit(aq_hw, HW_ATL2_MIF_HOST_FINISHED_WRITE_ADR,</div><div class='add'>+			    HW_ATL2_MIF_HOST_FINISHED_WRITE_MSK,</div><div class='add'>+			    HW_ATL2_MIF_HOST_FINISHED_WRITE_SHIFT,</div><div class='add'>+			    finish);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl2_mif_mcp_finished_read_get(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg_bit(aq_hw, HW_ATL2_MIF_MCP_FINISHED_READ_ADR,</div><div class='add'>+				  HW_ATL2_MIF_MCP_FINISHED_READ_MSK,</div><div class='add'>+				  HW_ATL2_MIF_MCP_FINISHED_READ_SHIFT);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl2_mif_mcp_boot_reg_get(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg(aq_hw, HW_ATL2_MIF_BOOT_REG_ADR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl2_mif_mcp_boot_reg_set(struct aq_hw_s *aq_hw, u32 val)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_write_reg(aq_hw, HW_ATL2_MIF_BOOT_REG_ADR, val);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+u32 hw_atl2_mif_host_req_int_get(struct aq_hw_s *aq_hw)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_read_reg(aq_hw, HW_ATL2_MCP_HOST_REQ_INT_ADR);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+void hw_atl2_mif_host_req_int_clr(struct aq_hw_s *aq_hw, u32 val)</div><div class='add'>+{</div><div class='add'>+	return aq_hw_write_reg(aq_hw, HW_ATL2_MCP_HOST_REQ_INT_CLR_ADR,</div><div class='add'>+			       val);</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_llh.h b/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_llh.h<br/>new file mode 100644<br/>index 000000000000..98c7a4621297<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_llh.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_llh.h</a></div><div class='hunk'>@@ -0,0 +1,102 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ * Copyright (C) 2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef HW_ATL2_LLH_H</div><div class='add'>+#define HW_ATL2_LLH_H</div><div class='add'>+</div><div class='add'>+#include &lt;linux/types.h&gt;</div><div class='add'>+</div><div class='add'>+struct aq_hw_s;</div><div class='add'>+</div><div class='add'>+/* Set TX Interrupt Moderation Control Register */</div><div class='add'>+void hw_atl2_reg_tx_intr_moder_ctrl_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					u32 tx_intr_moderation_ctl,</div><div class='add'>+					u32 queue);</div><div class='add'>+</div><div class='add'>+/* Set Redirection Table 2 Select */</div><div class='add'>+void hw_atl2_rpf_redirection_table2_select_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					       u32 select);</div><div class='add'>+</div><div class='add'>+/** Set RSS HASH type */</div><div class='add'>+void hw_atl2_rpf_rss_hash_type_set(struct aq_hw_s *aq_hw, u32 rss_hash_type);</div><div class='add'>+</div><div class='add'>+/* set new RPF enable */</div><div class='add'>+void hw_atl2_rpf_new_enable_set(struct aq_hw_s *aq_hw, u32 enable);</div><div class='add'>+</div><div class='add'>+/* set l2 unicast filter tag */</div><div class='add'>+void hw_atl2_rpfl2_uc_flr_tag_set(struct aq_hw_s *aq_hw, u32 tag, u32 filter);</div><div class='add'>+</div><div class='add'>+/* set l2 broadcast filter tag */</div><div class='add'>+void hw_atl2_rpfl2_bc_flr_tag_set(struct aq_hw_s *aq_hw, u32 tag);</div><div class='add'>+</div><div class='add'>+/* set new rss redirection table */</div><div class='add'>+void hw_atl2_new_rpf_rss_redir_set(struct aq_hw_s *aq_hw, u32 tc, u32 index,</div><div class='add'>+				   u32 queue);</div><div class='add'>+</div><div class='add'>+/* Set VLAN filter tag */</div><div class='add'>+void hw_atl2_rpf_vlan_flr_tag_set(struct aq_hw_s *aq_hw, u32 tag, u32 filter);</div><div class='add'>+</div><div class='add'>+/* set tx random TC-queue mapping enable bit */</div><div class='add'>+void hw_atl2_tpb_tx_tc_q_rand_map_en_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					 const u32 tc_q_rand_map_en);</div><div class='add'>+</div><div class='add'>+/* set tx buffer clock gate enable */</div><div class='add'>+void hw_atl2_tpb_tx_buf_clk_gate_en_set(struct aq_hw_s *aq_hw, u32 clk_gate_en);</div><div class='add'>+</div><div class='add'>+void hw_atl2_tps_tx_pkt_shed_data_arb_mode_set(struct aq_hw_s *aq_hw,</div><div class='add'>+					       const u32 data_arb_mode);</div><div class='add'>+</div><div class='add'>+/* set tx packet scheduler tc data max credit */</div><div class='add'>+void hw_atl2_tps_tx_pkt_shed_tc_data_max_credit_set(struct aq_hw_s *aq_hw,</div><div class='add'>+						    const u32 tc,</div><div class='add'>+						    const u32 max_credit);</div><div class='add'>+</div><div class='add'>+/* set tx packet scheduler tc data weight */</div><div class='add'>+void hw_atl2_tps_tx_pkt_shed_tc_data_weight_set(struct aq_hw_s *aq_hw,</div><div class='add'>+						const u32 tc,</div><div class='add'>+						const u32 weight);</div><div class='add'>+</div><div class='add'>+u32 hw_atl2_get_hw_version(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+void hw_atl2_init_launchtime(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* set action resolver record */</div><div class='add'>+void hw_atl2_rpf_act_rslvr_record_set(struct aq_hw_s *aq_hw, u8 location,</div><div class='add'>+				      u32 tag, u32 mask, u32 action);</div><div class='add'>+</div><div class='add'>+/* set enable action resolver section */</div><div class='add'>+void hw_atl2_rpf_act_rslvr_section_en_set(struct aq_hw_s *aq_hw, u32 sections);</div><div class='add'>+</div><div class='add'>+/* get data from firmware shared input buffer */</div><div class='add'>+void hw_atl2_mif_shared_buf_get(struct aq_hw_s *aq_hw, int offset, u32 *data,</div><div class='add'>+				int len);</div><div class='add'>+</div><div class='add'>+/* set data into firmware shared input buffer */</div><div class='add'>+void hw_atl2_mif_shared_buf_write(struct aq_hw_s *aq_hw, int offset, u32 *data,</div><div class='add'>+				  int len);</div><div class='add'>+</div><div class='add'>+/* get data from firmware shared output buffer */</div><div class='add'>+void hw_atl2_mif_shared_buf_read(struct aq_hw_s *aq_hw, int offset, u32 *data,</div><div class='add'>+				 int len);</div><div class='add'>+</div><div class='add'>+/* set host finished write shared buffer indication */</div><div class='add'>+void hw_atl2_mif_host_finished_write_set(struct aq_hw_s *aq_hw, u32 finish);</div><div class='add'>+</div><div class='add'>+/* get mcp finished read shared buffer indication */</div><div class='add'>+u32 hw_atl2_mif_mcp_finished_read_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* get mcp boot register */</div><div class='add'>+u32 hw_atl2_mif_mcp_boot_reg_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* set mcp boot register */</div><div class='add'>+void hw_atl2_mif_mcp_boot_reg_set(struct aq_hw_s *aq_hw, u32 val);</div><div class='add'>+</div><div class='add'>+/* get host interrupt request */</div><div class='add'>+u32 hw_atl2_mif_host_req_int_get(struct aq_hw_s *aq_hw);</div><div class='add'>+</div><div class='add'>+/* clear host interrupt request */</div><div class='add'>+void hw_atl2_mif_host_req_int_clr(struct aq_hw_s *aq_hw, u32 val);</div><div class='add'>+</div><div class='add'>+#endif /* HW_ATL2_LLH_H */</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_llh_internal.h b/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_llh_internal.h<br/>new file mode 100644<br/>index 000000000000..e34c5cda061e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_llh_internal.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_llh_internal.h</a></div><div class='hunk'>@@ -0,0 +1,391 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ * Copyright (C) 2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef HW_ATL2_LLH_INTERNAL_H</div><div class='add'>+#define HW_ATL2_LLH_INTERNAL_H</div><div class='add'>+</div><div class='add'>+/* RX pif_rpf_redir_2_en_i Bitfield Definitions</div><div class='add'>+ * PORT="pif_rpf_redir_2_en_i"</div><div class='add'>+ */</div><div class='add'>+#define HW_ATL2_RPF_PIF_RPF_REDIR2_ENI_ADR 0x000054C8</div><div class='add'>+#define HW_ATL2_RPF_PIF_RPF_REDIR2_ENI_MSK 0x00001000</div><div class='add'>+#define HW_ATL2_RPF_PIF_RPF_REDIR2_ENI_MSKN 0xFFFFEFFF</div><div class='add'>+#define HW_ATL2_RPF_PIF_RPF_REDIR2_ENI_SHIFT 12</div><div class='add'>+#define HW_ATL2_RPF_PIF_RPF_REDIR2_ENI_WIDTH 1</div><div class='add'>+#define HW_ATL2_RPF_PIF_RPF_REDIR2_ENI_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* RX pif_rpf_rss_hash_type_i Bitfield Definitions</div><div class='add'>+ */</div><div class='add'>+#define HW_ATL2_RPF_PIF_RPF_RSS_HASH_TYPEI_ADR 0x000054C8</div><div class='add'>+#define HW_ATL2_RPF_PIF_RPF_RSS_HASH_TYPEI_MSK 0x000001FF</div><div class='add'>+#define HW_ATL2_RPF_PIF_RPF_RSS_HASH_TYPEI_MSKN 0xFFFFFE00</div><div class='add'>+#define HW_ATL2_RPF_PIF_RPF_RSS_HASH_TYPEI_SHIFT 0</div><div class='add'>+#define HW_ATL2_RPF_PIF_RPF_RSS_HASH_TYPEI_WIDTH 9</div><div class='add'>+</div><div class='add'>+/* rx rpf_new_rpf_en bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "rpf_new_rpf_en_i".</div><div class='add'>+ * port="pif_rpf_new_rpf_en_i</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield rpf_new_rpf_en */</div><div class='add'>+#define HW_ATL2_RPF_NEW_EN_ADR 0x00005104</div><div class='add'>+/* bitmask for bitfield rpf_new_rpf_en */</div><div class='add'>+#define HW_ATL2_RPF_NEW_EN_MSK 0x00000800</div><div class='add'>+/* inverted bitmask for bitfield rpf_new_rpf_en */</div><div class='add'>+#define HW_ATL2_RPF_NEW_EN_MSKN 0xfffff7ff</div><div class='add'>+/* lower bit position of bitfield rpf_new_rpf_en */</div><div class='add'>+#define HW_ATL2_RPF_NEW_EN_SHIFT 11</div><div class='add'>+/* width of bitfield rpf_new_rpf_en */</div><div class='add'>+#define HW_ATL2_RPF_NEW_EN_WIDTH 1</div><div class='add'>+/* default value of bitfield rpf_new_rpf_en */</div><div class='add'>+#define HW_ATL2_RPF_NEW_EN_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx l2_uc_req_tag0{f}[5:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "l2_uc_req_tag0{f}[7:0]".</div><div class='add'>+ * parameter: filter {f} | stride size 0x8 | range [0, 37]</div><div class='add'>+ * port="pif_rpf_l2_uc_req_tag0[5:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield l2_uc_req_tag0{f}[2:0] */</div><div class='add'>+#define HW_ATL2_RPFL2UC_TAG_ADR(filter) (0x00005114 + (filter) * 0x8)</div><div class='add'>+/* bitmask for bitfield l2_uc_req_tag0{f}[2:0] */</div><div class='add'>+#define HW_ATL2_RPFL2UC_TAG_MSK 0x0FC00000</div><div class='add'>+/* inverted bitmask for bitfield l2_uc_req_tag0{f}[2:0] */</div><div class='add'>+#define HW_ATL2_RPFL2UC_TAG_MSKN 0xF03FFFFF</div><div class='add'>+/* lower bit position of bitfield l2_uc_req_tag0{f}[2:0] */</div><div class='add'>+#define HW_ATL2_RPFL2UC_TAG_SHIFT 22</div><div class='add'>+/* width of bitfield l2_uc_req_tag0{f}[2:0] */</div><div class='add'>+#define HW_ATL2_RPFL2UC_TAG_WIDTH 6</div><div class='add'>+/* default value of bitfield l2_uc_req_tag0{f}[2:0] */</div><div class='add'>+#define HW_ATL2_RPFL2UC_TAG_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rpf_l2_bc_req_tag[5:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "rpf_l2_bc_req_tag[5:0]".</div><div class='add'>+ * port="pifrpf_l2_bc_req_tag_i[5:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield rpf_l2_bc_req_tag */</div><div class='add'>+#define HW_ATL2_RPF_L2_BC_TAG_ADR 0x000050F0</div><div class='add'>+/* bitmask for bitfield rpf_l2_bc_req_tag */</div><div class='add'>+#define HW_ATL2_RPF_L2_BC_TAG_MSK 0x0000003F</div><div class='add'>+/* inverted bitmask for bitfield rpf_l2_bc_req_tag */</div><div class='add'>+#define HW_ATL2_RPF_L2_BC_TAG_MSKN 0xffffffc0</div><div class='add'>+/* lower bit position of bitfield rpf_l2_bc_req_tag */</div><div class='add'>+#define HW_ATL2_RPF_L2_BC_TAG_SHIFT 0</div><div class='add'>+/* width of bitfield rpf_l2_bc_req_tag */</div><div class='add'>+#define HW_ATL2_RPF_L2_BC_TAG_WIDTH 6</div><div class='add'>+/* default value of bitfield rpf_l2_bc_req_tag */</div><div class='add'>+#define HW_ATL2_RPF_L2_BC_TAG_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx rpf_rss_red1_data_[4:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "rpf_rss_red1_data[4:0]".</div><div class='add'>+ * port="pif_rpf_rss_red1_data_i[4:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield rpf_rss_red1_data[4:0] */</div><div class='add'>+#define HW_ATL2_RPF_RSS_REDIR_ADR(TC, INDEX) (0x00006200 + \</div><div class='add'>+					(0x100 * !!((TC) &gt; 3)) + (INDEX) * 4)</div><div class='add'>+/* bitmask for bitfield rpf_rss_red1_data[4:0] */</div><div class='add'>+#define HW_ATL2_RPF_RSS_REDIR_MSK(TC)  (0x00000001F &lt;&lt; (5 * ((TC) % 4)))</div><div class='add'>+/* lower bit position of bitfield rpf_rss_red1_data[4:0] */</div><div class='add'>+#define HW_ATL2_RPF_RSS_REDIR_SHIFT(TC) (5 * ((TC) % 4))</div><div class='add'>+/* width of bitfield rpf_rss_red1_data[4:0] */</div><div class='add'>+#define HW_ATL2_RPF_RSS_REDIR_WIDTH 5</div><div class='add'>+/* default value of bitfield rpf_rss_red1_data[4:0] */</div><div class='add'>+#define HW_ATL2_RPF_RSS_REDIR_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rx vlan_req_tag0{f}[3:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "vlan_req_tag0{f}[3:0]".</div><div class='add'>+ * parameter: filter {f} | stride size 0x4 | range [0, 15]</div><div class='add'>+ * port="pif_rpf_vlan_req_tag0[3:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield vlan_req_tag0{f}[3:0] */</div><div class='add'>+#define HW_ATL2_RPF_VL_TAG_ADR(filter) (0x00005290 + (filter) * 0x4)</div><div class='add'>+/* bitmask for bitfield vlan_req_tag0{f}[3:0] */</div><div class='add'>+#define HW_ATL2_RPF_VL_TAG_MSK 0x0000F000</div><div class='add'>+/* inverted bitmask for bitfield vlan_req_tag0{f}[3:0] */</div><div class='add'>+#define HW_ATL2_RPF_VL_TAG_MSKN 0xFFFF0FFF</div><div class='add'>+/* lower bit position of bitfield vlan_req_tag0{f}[3:0] */</div><div class='add'>+#define HW_ATL2_RPF_VL_TAG_SHIFT 12</div><div class='add'>+/* width of bitfield vlan_req_tag0{f}[3:0] */</div><div class='add'>+#define HW_ATL2_RPF_VL_TAG_WIDTH 4</div><div class='add'>+/* default value of bitfield vlan_req_tag0{f}[3:0] */</div><div class='add'>+#define HW_ATL2_RPF_VL_TAG_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* RX rx_q{Q}_tc_map[2:0] Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "rx_q{Q}_tc_map[2:0]".</div><div class='add'>+ * Parameter: Queue {Q} | bit-level stride | range [0, 31]</div><div class='add'>+ * PORT="pif_rx_q0_tc_map_i[2:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield rx_q{Q}_tc_map[2:0] */</div><div class='add'>+#define HW_ATL2_RX_Q_TC_MAP_ADR(queue) \</div><div class='add'>+	(((queue) &lt; 32) ? 0x00005900 + ((queue) / 8) * 4 : 0)</div><div class='add'>+/* Lower bit position of bitfield rx_q{Q}_tc_map[2:0] */</div><div class='add'>+#define HW_ATL2_RX_Q_TC_MAP_SHIFT(queue) \</div><div class='add'>+	(((queue) &lt; 32) ? ((queue) * 4) % 32 : 0)</div><div class='add'>+/* Width of bitfield rx_q{Q}_tc_map[2:0] */</div><div class='add'>+#define HW_ATL2_RX_Q_TC_MAP_WIDTH 3</div><div class='add'>+/* Default value of bitfield rx_q{Q}_tc_map[2:0] */</div><div class='add'>+#define HW_ATL2_RX_Q_TC_MAP_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx tx_tc_q_rand_map_en bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "tx_tc_q_rand_map_en".</div><div class='add'>+ * port="pif_tpb_tx_tc_q_rand_map_en_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield tx_tc_q_rand_map_en */</div><div class='add'>+#define HW_ATL2_TPB_TX_TC_Q_RAND_MAP_EN_ADR 0x00007900</div><div class='add'>+/* bitmask for bitfield tx_tc_q_rand_map_en */</div><div class='add'>+#define HW_ATL2_TPB_TX_TC_Q_RAND_MAP_EN_MSK 0x00000200</div><div class='add'>+/* inverted bitmask for bitfield tx_tc_q_rand_map_en */</div><div class='add'>+#define HW_ATL2_TPB_TX_TC_Q_RAND_MAP_EN_MSKN 0xFFFFFDFF</div><div class='add'>+/* lower bit position of bitfield tx_tc_q_rand_map_en */</div><div class='add'>+#define HW_ATL2_TPB_TX_TC_Q_RAND_MAP_EN_SHIFT 9</div><div class='add'>+/* width of bitfield tx_tc_q_rand_map_en */</div><div class='add'>+#define HW_ATL2_TPB_TX_TC_Q_RAND_MAP_EN_WIDTH 1</div><div class='add'>+/* default value of bitfield tx_tc_q_rand_map_en */</div><div class='add'>+#define HW_ATL2_TPB_TX_TC_Q_RAND_MAP_EN_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx tx_buffer_clk_gate_en bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "tx_buffer_clk_gate_en".</div><div class='add'>+ * port="pif_tpb_tx_buffer_clk_gate_en_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield tx_buffer_clk_gate_en */</div><div class='add'>+#define HW_ATL2_TPB_TX_BUF_CLK_GATE_EN_ADR 0x00007900</div><div class='add'>+/* bitmask for bitfield tx_buffer_clk_gate_en */</div><div class='add'>+#define HW_ATL2_TPB_TX_BUF_CLK_GATE_EN_MSK 0x00000020</div><div class='add'>+/* inverted bitmask for bitfield tx_buffer_clk_gate_en */</div><div class='add'>+#define HW_ATL2_TPB_TX_BUF_CLK_GATE_EN_MSKN 0xffffffdf</div><div class='add'>+/* lower bit position of bitfield tx_buffer_clk_gate_en */</div><div class='add'>+#define HW_ATL2_TPB_TX_BUF_CLK_GATE_EN_SHIFT 5</div><div class='add'>+/* width of bitfield tx_buffer_clk_gate_en */</div><div class='add'>+#define HW_ATL2_TPB_TX_BUF_CLK_GATE_EN_WIDTH 1</div><div class='add'>+/* default value of bitfield tx_buffer_clk_gate_en */</div><div class='add'>+#define HW_ATL2_TPB_TX_BUF_CLK_GATE_EN_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx tx_q_tc_map{q} bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "tx_q_tc_map{q}".</div><div class='add'>+ * parameter: queue {q} | bit-level stride | range [0, 31]</div><div class='add'>+ * port="pif_tpb_tx_q_tc_map0_i[2:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield tx_q_tc_map{q} */</div><div class='add'>+#define HW_ATL2_TX_Q_TC_MAP_ADR(queue) \</div><div class='add'>+	(((queue) &lt; 32) ? 0x0000799C + ((queue) / 4) * 4 : 0)</div><div class='add'>+/* lower bit position of bitfield tx_q_tc_map{q} */</div><div class='add'>+#define HW_ATL2_TX_Q_TC_MAP_SHIFT(queue) \</div><div class='add'>+	(((queue) &lt; 32) ? ((queue) * 8) % 32 : 0)</div><div class='add'>+/* width of bitfield tx_q_tc_map{q} */</div><div class='add'>+#define HW_ATL2_TX_Q_TC_MAP_WIDTH 3</div><div class='add'>+/* default value of bitfield tx_q_tc_map{q} */</div><div class='add'>+#define HW_ATL2_TX_Q_TC_MAP_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx data_tc_arb_mode bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "data_tc_arb_mode".</div><div class='add'>+ * port="pif_tps_data_tc_arb_mode_i"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield data_tc_arb_mode */</div><div class='add'>+#define HW_ATL2_TPS_DATA_TC_ARB_MODE_ADR 0x00007100</div><div class='add'>+/* bitmask for bitfield data_tc_arb_mode */</div><div class='add'>+#define HW_ATL2_TPS_DATA_TC_ARB_MODE_MSK 0x00000003</div><div class='add'>+/* inverted bitmask for bitfield data_tc_arb_mode */</div><div class='add'>+#define HW_ATL2_TPS_DATA_TC_ARB_MODE_MSKN 0xfffffffc</div><div class='add'>+/* lower bit position of bitfield data_tc_arb_mode */</div><div class='add'>+#define HW_ATL2_TPS_DATA_TC_ARB_MODE_SHIFT 0</div><div class='add'>+/* width of bitfield data_tc_arb_mode */</div><div class='add'>+#define HW_ATL2_TPS_DATA_TC_ARB_MODE_WIDTH 2</div><div class='add'>+/* default value of bitfield data_tc_arb_mode */</div><div class='add'>+#define HW_ATL2_TPS_DATA_TC_ARB_MODE_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx data_tc{t}_credit_max[f:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "data_tc{t}_credit_max[f:0]".</div><div class='add'>+ * parameter: tc {t} | stride size 0x4 | range [0, 7]</div><div class='add'>+ * port="pif_tps_data_tc0_credit_max_i[15:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield data_tc{t}_credit_max[f:0] */</div><div class='add'>+#define HW_ATL2_TPS_DATA_TCTCREDIT_MAX_ADR(tc) (0x00007110 + (tc) * 0x4)</div><div class='add'>+/* bitmask for bitfield data_tc{t}_credit_max[f:0] */</div><div class='add'>+#define HW_ATL2_TPS_DATA_TCTCREDIT_MAX_MSK 0xffff0000</div><div class='add'>+/* inverted bitmask for bitfield data_tc{t}_credit_max[f:0] */</div><div class='add'>+#define HW_ATL2_TPS_DATA_TCTCREDIT_MAX_MSKN 0x0000ffff</div><div class='add'>+/* lower bit position of bitfield data_tc{t}_credit_max[f:0] */</div><div class='add'>+#define HW_ATL2_TPS_DATA_TCTCREDIT_MAX_SHIFT 16</div><div class='add'>+/* width of bitfield data_tc{t}_credit_max[f:0] */</div><div class='add'>+#define HW_ATL2_TPS_DATA_TCTCREDIT_MAX_WIDTH 16</div><div class='add'>+/* default value of bitfield data_tc{t}_credit_max[f:0] */</div><div class='add'>+#define HW_ATL2_TPS_DATA_TCTCREDIT_MAX_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx data_tc{t}_weight[e:0] bitfield definitions</div><div class='add'>+ * preprocessor definitions for the bitfield "data_tc{t}_weight[e:0]".</div><div class='add'>+ * parameter: tc {t} | stride size 0x4 | range [0, 7]</div><div class='add'>+ * port="pif_tps_data_tc0_weight_i[14:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* register address for bitfield data_tc{t}_weight[e:0] */</div><div class='add'>+#define HW_ATL2_TPS_DATA_TCTWEIGHT_ADR(tc) (0x00007110 + (tc) * 0x4)</div><div class='add'>+/* bitmask for bitfield data_tc{t}_weight[e:0] */</div><div class='add'>+#define HW_ATL2_TPS_DATA_TCTWEIGHT_MSK 0x00007fff</div><div class='add'>+/* inverted bitmask for bitfield data_tc{t}_weight[e:0] */</div><div class='add'>+#define HW_ATL2_TPS_DATA_TCTWEIGHT_MSKN 0xffff8000</div><div class='add'>+/* lower bit position of bitfield data_tc{t}_weight[e:0] */</div><div class='add'>+#define HW_ATL2_TPS_DATA_TCTWEIGHT_SHIFT 0</div><div class='add'>+/* width of bitfield data_tc{t}_weight[e:0] */</div><div class='add'>+#define HW_ATL2_TPS_DATA_TCTWEIGHT_WIDTH 15</div><div class='add'>+/* default value of bitfield data_tc{t}_weight[e:0] */</div><div class='add'>+#define HW_ATL2_TPS_DATA_TCTWEIGHT_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* tx interrupt moderation control register definitions</div><div class='add'>+ * Preprocessor definitions for TX Interrupt Moderation Control Register</div><div class='add'>+ * Base Address: 0x00007c28</div><div class='add'>+ * Parameter: queue {Q} | stride size 0x4 | range [0, 31]</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#define HW_ATL2_TX_INTR_MODERATION_CTL_ADR(queue) (0x00007c28u + (queue) * 0x40)</div><div class='add'>+</div><div class='add'>+/* Launch time control register */</div><div class='add'>+#define HW_ATL2_LT_CTRL_ADR 0x00007a1c</div><div class='add'>+</div><div class='add'>+#define HW_ATL2_LT_CTRL_AVB_LEN_CMP_TRSHLD_MSK 0xFFFF0000</div><div class='add'>+#define HW_ATL2_LT_CTRL_AVB_LEN_CMP_TRSHLD_SHIFT 16</div><div class='add'>+</div><div class='add'>+#define HW_ATL2_LT_CTRL_CLK_RATIO_MSK 0x0000FF00</div><div class='add'>+#define HW_ATL2_LT_CTRL_CLK_RATIO_SHIFT 8</div><div class='add'>+#define HW_ATL2_LT_CTRL_CLK_RATIO_QUATER_SPEED 4</div><div class='add'>+#define HW_ATL2_LT_CTRL_CLK_RATIO_HALF_SPEED 2</div><div class='add'>+#define HW_ATL2_LT_CTRL_CLK_RATIO_FULL_SPEED 1</div><div class='add'>+</div><div class='add'>+#define HW_ATL2_LT_CTRL_25G_MODE_SUPPORT_MSK 0x00000008</div><div class='add'>+#define HW_ATL2_LT_CTRL_25G_MODE_SUPPORT_SHIFT 3</div><div class='add'>+</div><div class='add'>+#define HW_ATL2_LT_CTRL_LINK_SPEED_MSK 0x00000007</div><div class='add'>+#define HW_ATL2_LT_CTRL_LINK_SPEED_SHIFT 0</div><div class='add'>+</div><div class='add'>+/* FPGA VER register */</div><div class='add'>+#define HW_ATL2_FPGA_VER_ADR 0x000000f4</div><div class='add'>+#define HW_ATL2_FPGA_VER_U32(mj, mi, bl, rv) \</div><div class='add'>+	((((mj) &amp; 0xff) &lt;&lt; 24) | \</div><div class='add'>+	 (((mi) &amp; 0xff) &lt;&lt; 16) | \</div><div class='add'>+	 (((bl) &amp; 0xff) &lt;&lt; 8) | \</div><div class='add'>+	 (((rv) &amp; 0xff) &lt;&lt; 0))</div><div class='add'>+</div><div class='add'>+/* ahb_mem_addr{f}[31:0] Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "ahb_mem_addr{f}[31:0]".</div><div class='add'>+ * Parameter: filter {f} | stride size 0x10 | range [0, 127]</div><div class='add'>+ * PORT="ahb_mem_addr{f}[31:0]"</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield ahb_mem_addr{f}[31:0] */</div><div class='add'>+#define HW_ATL2_RPF_ACT_RSLVR_REQ_TAG_ADR(filter) \</div><div class='add'>+	(0x00014000u + (filter) * 0x10)</div><div class='add'>+/* Bitmask for bitfield ahb_mem_addr{f}[31:0] */</div><div class='add'>+#define HW_ATL2_RPF_ACT_RSLVR_REQ_TAG_MSK 0xFFFFFFFFu</div><div class='add'>+/* Inverted bitmask for bitfield ahb_mem_addr{f}[31:0] */</div><div class='add'>+#define HW_ATL2_RPF_ACT_RSLVR_REQ_TAG_MSKN 0x00000000u</div><div class='add'>+/* Lower bit position of bitfield ahb_mem_addr{f}[31:0] */</div><div class='add'>+#define HW_ATL2_RPF_ACT_RSLVR_REQ_TAG_SHIFT 0</div><div class='add'>+/* Width of bitfield ahb_mem_addr{f}[31:0] */</div><div class='add'>+#define HW_ATL2_RPF_ACT_RSLVR_REQ_TAG_WIDTH 31</div><div class='add'>+/* Default value of bitfield ahb_mem_addr{f}[31:0] */</div><div class='add'>+#define HW_ATL2_RPF_ACT_RSLVR_REQ_TAG_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield ahb_mem_addr{f}[31:0] */</div><div class='add'>+#define HW_ATL2_RPF_ACT_RSLVR_TAG_MASK_ADR(filter) \</div><div class='add'>+	(0x00014004u + (filter) * 0x10)</div><div class='add'>+/* Bitmask for bitfield ahb_mem_addr{f}[31:0] */</div><div class='add'>+#define HW_ATL2_RPF_ACT_RSLVR_TAG_MASK_MSK 0xFFFFFFFFu</div><div class='add'>+/* Inverted bitmask for bitfield ahb_mem_addr{f}[31:0] */</div><div class='add'>+#define HW_ATL2_RPF_ACT_RSLVR_TAG_MASK_MSKN 0x00000000u</div><div class='add'>+/* Lower bit position of bitfield ahb_mem_addr{f}[31:0] */</div><div class='add'>+#define HW_ATL2_RPF_ACT_RSLVR_TAG_MASK_SHIFT 0</div><div class='add'>+/* Width of bitfield ahb_mem_addr{f}[31:0] */</div><div class='add'>+#define HW_ATL2_RPF_ACT_RSLVR_TAG_MASK_WIDTH 31</div><div class='add'>+/* Default value of bitfield ahb_mem_addr{f}[31:0] */</div><div class='add'>+#define HW_ATL2_RPF_ACT_RSLVR_TAG_MASK_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield ahb_mem_addr{f}[31:0] */</div><div class='add'>+#define HW_ATL2_RPF_ACT_RSLVR_ACTN_ADR(filter) \</div><div class='add'>+	(0x00014008u + (filter) * 0x10)</div><div class='add'>+/* Bitmask for bitfield ahb_mem_addr{f}[31:0] */</div><div class='add'>+#define HW_ATL2_RPF_ACT_RSLVR_ACTN_MSK 0x000007FFu</div><div class='add'>+/* Inverted bitmask for bitfield ahb_mem_addr{f}[31:0] */</div><div class='add'>+#define HW_ATL2_RPF_ACT_RSLVR_ACTN_MSKN 0xFFFFF800u</div><div class='add'>+/* Lower bit position of bitfield ahb_mem_addr{f}[31:0] */</div><div class='add'>+#define HW_ATL2_RPF_ACT_RSLVR_ACTN_SHIFT 0</div><div class='add'>+/* Width of bitfield ahb_mem_addr{f}[31:0] */</div><div class='add'>+#define HW_ATL2_RPF_ACT_RSLVR_ACTN_WIDTH 10</div><div class='add'>+/* Default value of bitfield ahb_mem_addr{f}[31:0] */</div><div class='add'>+#define HW_ATL2_RPF_ACT_RSLVR_ACTN_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* rpf_rec_tab_en[15:0] Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "rpf_rec_tab_en[15:0]".</div><div class='add'>+ * PORT="pif_rpf_rec_tab_en[15:0]"</div><div class='add'>+ */</div><div class='add'>+/* Register address for bitfield rpf_rec_tab_en[15:0] */</div><div class='add'>+#define HW_ATL2_RPF_REC_TAB_EN_ADR 0x00006ff0u</div><div class='add'>+/* Bitmask for bitfield rpf_rec_tab_en[15:0] */</div><div class='add'>+#define HW_ATL2_RPF_REC_TAB_EN_MSK 0x0000FFFFu</div><div class='add'>+/* Inverted bitmask for bitfield rpf_rec_tab_en[15:0] */</div><div class='add'>+#define HW_ATL2_RPF_REC_TAB_EN_MSKN 0xFFFF0000u</div><div class='add'>+/* Lower bit position of bitfield rpf_rec_tab_en[15:0] */</div><div class='add'>+#define HW_ATL2_RPF_REC_TAB_EN_SHIFT 0</div><div class='add'>+/* Width of bitfield rpf_rec_tab_en[15:0] */</div><div class='add'>+#define HW_ATL2_RPF_REC_TAB_EN_WIDTH 16</div><div class='add'>+/* Default value of bitfield rpf_rec_tab_en[15:0] */</div><div class='add'>+#define HW_ATL2_RPF_REC_TAB_EN_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* Register address for firmware shared input buffer */</div><div class='add'>+#define HW_ATL2_MIF_SHARED_BUFFER_IN_ADR(dword) (0x00012000U + (dword) * 0x4U)</div><div class='add'>+/* Register address for firmware shared output buffer */</div><div class='add'>+#define HW_ATL2_MIF_SHARED_BUFFER_OUT_ADR(dword) (0x00013000U + (dword) * 0x4U)</div><div class='add'>+</div><div class='add'>+/* pif_host_finished_buf_wr_i Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "pif_host_finished_buf_wr_i".</div><div class='add'>+ * PORT="pif_host_finished_buf_wr_i"</div><div class='add'>+ */</div><div class='add'>+/* Register address for bitfield rpif_host_finished_buf_wr_i */</div><div class='add'>+#define HW_ATL2_MIF_HOST_FINISHED_WRITE_ADR 0x00000e00u</div><div class='add'>+/* Bitmask for bitfield pif_host_finished_buf_wr_i */</div><div class='add'>+#define HW_ATL2_MIF_HOST_FINISHED_WRITE_MSK 0x00000001u</div><div class='add'>+/* Inverted bitmask for bitfield pif_host_finished_buf_wr_i */</div><div class='add'>+#define HW_ATL2_MIF_HOST_FINISHED_WRITE_MSKN 0xFFFFFFFEu</div><div class='add'>+/* Lower bit position of bitfield pif_host_finished_buf_wr_i */</div><div class='add'>+#define HW_ATL2_MIF_HOST_FINISHED_WRITE_SHIFT 0</div><div class='add'>+/* Width of bitfield pif_host_finished_buf_wr_i */</div><div class='add'>+#define HW_ATL2_MIF_HOST_FINISHED_WRITE_WIDTH 1</div><div class='add'>+/* Default value of bitfield pif_host_finished_buf_wr_i */</div><div class='add'>+#define HW_ATL2_MIF_HOST_FINISHED_WRITE_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* pif_mcp_finished_buf_rd_i Bitfield Definitions</div><div class='add'>+ * Preprocessor definitions for the bitfield "pif_mcp_finished_buf_rd_i".</div><div class='add'>+ * PORT="pif_mcp_finished_buf_rd_i"</div><div class='add'>+ */</div><div class='add'>+/* Register address for bitfield pif_mcp_finished_buf_rd_i */</div><div class='add'>+#define HW_ATL2_MIF_MCP_FINISHED_READ_ADR 0x00000e04u</div><div class='add'>+/* Bitmask for bitfield pif_mcp_finished_buf_rd_i */</div><div class='add'>+#define HW_ATL2_MIF_MCP_FINISHED_READ_MSK 0x00000001u</div><div class='add'>+/* Inverted bitmask for bitfield pif_mcp_finished_buf_rd_i */</div><div class='add'>+#define HW_ATL2_MIF_MCP_FINISHED_READ_MSKN 0xFFFFFFFEu</div><div class='add'>+/* Lower bit position of bitfield pif_mcp_finished_buf_rd_i */</div><div class='add'>+#define HW_ATL2_MIF_MCP_FINISHED_READ_SHIFT 0</div><div class='add'>+/* Width of bitfield pif_mcp_finished_buf_rd_i */</div><div class='add'>+#define HW_ATL2_MIF_MCP_FINISHED_READ_WIDTH 1</div><div class='add'>+/* Default value of bitfield pif_mcp_finished_buf_rd_i */</div><div class='add'>+#define HW_ATL2_MIF_MCP_FINISHED_READ_DEFAULT 0x0</div><div class='add'>+</div><div class='add'>+/* Register address for bitfield pif_mcp_boot_reg */</div><div class='add'>+#define HW_ATL2_MIF_BOOT_REG_ADR 0x00003040u</div><div class='add'>+</div><div class='add'>+#define HW_ATL2_MCP_HOST_REQ_INT_READY BIT(0)</div><div class='add'>+</div><div class='add'>+#define HW_ATL2_MCP_HOST_REQ_INT_ADR 0x00000F00u</div><div class='add'>+#define HW_ATL2_MCP_HOST_REQ_INT_SET_ADR 0x00000F04u</div><div class='add'>+#define HW_ATL2_MCP_HOST_REQ_INT_CLR_ADR 0x00000F08u</div><div class='add'>+</div><div class='add'>+#endif /* HW_ATL2_LLH_INTERNAL_H */</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_utils.c b/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_utils.c<br/>new file mode 100644<br/>index 000000000000..0fe6257d9c08<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_utils.c?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_utils.c</a></div><div class='hunk'>@@ -0,0 +1,130 @@</div><div class='add'>+// SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ * Copyright (C) 2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#include &lt;linux/iopoll.h&gt;</div><div class='add'>+</div><div class='add'>+#include "aq_hw_utils.h"</div><div class='add'>+#include "hw_atl/hw_atl_utils.h"</div><div class='add'>+#include "hw_atl2_utils.h"</div><div class='add'>+#include "hw_atl2_llh.h"</div><div class='add'>+#include "hw_atl2_llh_internal.h"</div><div class='add'>+</div><div class='add'>+#define HW_ATL2_FW_VER_1X          0x01000000U</div><div class='add'>+</div><div class='add'>+#define AQ_A2_BOOT_STARTED         BIT(0x18)</div><div class='add'>+#define AQ_A2_CRASH_INIT           BIT(0x1B)</div><div class='add'>+#define AQ_A2_BOOT_CODE_FAILED     BIT(0x1C)</div><div class='add'>+#define AQ_A2_FW_INIT_FAILED       BIT(0x1D)</div><div class='add'>+#define AQ_A2_FW_INIT_COMP_SUCCESS BIT(0x1F)</div><div class='add'>+</div><div class='add'>+#define AQ_A2_FW_BOOT_FAILED_MASK (AQ_A2_CRASH_INIT | \</div><div class='add'>+				   AQ_A2_BOOT_CODE_FAILED | \</div><div class='add'>+				   AQ_A2_FW_INIT_FAILED)</div><div class='add'>+#define AQ_A2_FW_BOOT_COMPLETE_MASK (AQ_A2_FW_BOOT_FAILED_MASK | \</div><div class='add'>+				     AQ_A2_FW_INIT_COMP_SUCCESS)</div><div class='add'>+</div><div class='add'>+#define AQ_A2_FW_BOOT_REQ_REBOOT        BIT(0x0)</div><div class='add'>+#define AQ_A2_FW_BOOT_REQ_HOST_BOOT     BIT(0x8)</div><div class='add'>+#define AQ_A2_FW_BOOT_REQ_MAC_FAST_BOOT BIT(0xA)</div><div class='add'>+#define AQ_A2_FW_BOOT_REQ_PHY_FAST_BOOT BIT(0xB)</div><div class='add'>+</div><div class='add'>+int hw_atl2_utils_initfw(struct aq_hw_s *self, const struct aq_fw_ops **fw_ops)</div><div class='add'>+{</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	self-&gt;fw_ver_actual = hw_atl2_utils_get_fw_version(self);</div><div class='add'>+</div><div class='add'>+	if (hw_atl_utils_ver_match(HW_ATL2_FW_VER_1X, self-&gt;fw_ver_actual)) {</div><div class='add'>+		*fw_ops = &amp;aq_a2_fw_ops;</div><div class='add'>+	} else {</div><div class='add'>+		aq_pr_err("Bad FW version detected: %x, but continue\n",</div><div class='add'>+			  self-&gt;fw_ver_actual);</div><div class='add'>+		*fw_ops = &amp;aq_a2_fw_ops;</div><div class='add'>+	}</div><div class='add'>+	aq_pr_trace("Detect ATL2FW %x\n", self-&gt;fw_ver_actual);</div><div class='add'>+	self-&gt;aq_fw_ops = *fw_ops;</div><div class='add'>+	err = self-&gt;aq_fw_ops-&gt;init(self);</div><div class='add'>+</div><div class='add'>+	self-&gt;chip_features |= ATL_HW_CHIP_ANTIGUA;</div><div class='add'>+</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+static bool hw_atl2_mcp_boot_complete(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	u32 rbl_status;</div><div class='add'>+</div><div class='add'>+	rbl_status = hw_atl2_mif_mcp_boot_reg_get(self);</div><div class='add'>+	if (rbl_status &amp; AQ_A2_FW_BOOT_COMPLETE_MASK)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	/* Host boot requested */</div><div class='add'>+	if (hw_atl2_mif_host_req_int_get(self) &amp; HW_ATL2_MCP_HOST_REQ_INT_READY)</div><div class='add'>+		return true;</div><div class='add'>+</div><div class='add'>+	return false;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+int hw_atl2_utils_soft_reset(struct aq_hw_s *self)</div><div class='add'>+{</div><div class='add'>+	bool rbl_complete = false;</div><div class='add'>+	u32 rbl_status = 0;</div><div class='add'>+	u32 rbl_request;</div><div class='add'>+	int err;</div><div class='add'>+</div><div class='add'>+	hw_atl2_mif_host_req_int_clr(self, 0x01);</div><div class='add'>+	rbl_request = AQ_A2_FW_BOOT_REQ_REBOOT;</div><div class='add'>+#ifdef AQ_CFG_FAST_START</div><div class='add'>+	rbl_request |= AQ_A2_FW_BOOT_REQ_MAC_FAST_BOOT;</div><div class='add'>+#endif</div><div class='add'>+	hw_atl2_mif_mcp_boot_reg_set(self, rbl_request);</div><div class='add'>+</div><div class='add'>+	/* Wait for RBL boot */</div><div class='add'>+	err = readx_poll_timeout_atomic(hw_atl2_mif_mcp_boot_reg_get, self,</div><div class='add'>+				rbl_status,</div><div class='add'>+				((rbl_status &amp; AQ_A2_BOOT_STARTED) &amp;&amp;</div><div class='add'>+				 (rbl_status != 0xFFFFFFFFu)),</div><div class='add'>+				10, 200000);</div><div class='add'>+	if (err) {</div><div class='add'>+		aq_pr_err("Boot code hanged");</div><div class='add'>+		goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	err = readx_poll_timeout_atomic(hw_atl2_mcp_boot_complete, self,</div><div class='add'>+					rbl_complete,</div><div class='add'>+					rbl_complete,</div><div class='add'>+					10, 2000000);</div><div class='add'>+</div><div class='add'>+	if (err) {</div><div class='add'>+		aq_pr_err("FW Restart timed out");</div><div class='add'>+		goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	rbl_status = hw_atl2_mif_mcp_boot_reg_get(self);</div><div class='add'>+</div><div class='add'>+	if (rbl_status &amp; AQ_A2_FW_BOOT_FAILED_MASK) {</div><div class='add'>+		err = -EIO;</div><div class='add'>+		aq_pr_err("FW Restart failed");</div><div class='add'>+		goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (hw_atl2_mif_host_req_int_get(self) &amp;</div><div class='add'>+	    HW_ATL2_MCP_HOST_REQ_INT_READY) {</div><div class='add'>+		err = -EIO;</div><div class='add'>+		aq_pr_err("No FW detected. Dynamic FW load not implemented");</div><div class='add'>+		goto err_exit;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	if (self-&gt;aq_fw_ops) {</div><div class='add'>+		err = self-&gt;aq_fw_ops-&gt;init(self);</div><div class='add'>+		if (err) {</div><div class='add'>+			aq_pr_err("FW Init failed");</div><div class='add'>+			goto err_exit;</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+err_exit:</div><div class='add'>+	return err;</div><div class='add'>+}</div><div class='head'>diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_utils.h b/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_utils.h<br/>new file mode 100644<br/>index 000000000000..6bad64c77b87<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_utils.h?id=c9b47175e9131118e6f221cc8fb81397d62e7c91'>drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_utils.h</a></div><div class='hunk'>@@ -0,0 +1,636 @@</div><div class='add'>+/* SPDX-License-Identifier: GPL-2.0-only */</div><div class='add'>+/* Atlantic Network Driver</div><div class='add'>+ * Copyright (C) 2020 Marvell International Ltd.</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+#ifndef HW_ATL2_UTILS_H</div><div class='add'>+#define HW_ATL2_UTILS_H</div><div class='add'>+</div><div class='add'>+#include "aq_hw.h"</div><div class='add'>+</div><div class='add'>+/* F W    A P I */</div><div class='add'>+</div><div class='add'>+struct link_options_s {</div><div class='add'>+	u8 link_up:1;</div><div class='add'>+	u8 link_renegotiate:1;</div><div class='add'>+	u8 minimal_link_speed:1;</div><div class='add'>+	u8 internal_loopback:1;</div><div class='add'>+	u8 external_loopback:1;</div><div class='add'>+	u8 rate_10M_hd:1;</div><div class='add'>+	u8 rate_100M_hd:1;</div><div class='add'>+	u8 rate_1G_hd:1;</div><div class='add'>+</div><div class='add'>+	u8 rate_10M:1;</div><div class='add'>+	u8 rate_100M:1;</div><div class='add'>+	u8 rate_1G:1;</div><div class='add'>+	u8 rate_2P5G:1;</div><div class='add'>+	u8 rate_N2P5G:1;</div><div class='add'>+	u8 rate_5G:1;</div><div class='add'>+	u8 rate_N5G:1;</div><div class='add'>+	u8 rate_10G:1;</div><div class='add'>+</div><div class='add'>+	u8 eee_100M:1;</div><div class='add'>+	u8 eee_1G:1;</div><div class='add'>+	u8 eee_2P5G:1;</div><div class='add'>+	u8 eee_5G:1;</div><div class='add'>+	u8 eee_10G:1;</div><div class='add'>+	u8 rsvd3:3;</div><div class='add'>+</div><div class='add'>+	u8 pause_rx:1;</div><div class='add'>+	u8 pause_tx:1;</div><div class='add'>+	u8 rsvd4:1;</div><div class='add'>+	u8 downshift:1;</div><div class='add'>+	u8 downshift_retry:4;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct link_control_s {</div><div class='add'>+	u8 mode:4;</div><div class='add'>+	u8 disable_crc_corruption:1;</div><div class='add'>+	u8 discard_short_frames:1;</div><div class='add'>+	u8 flow_control_mode:1;</div><div class='add'>+	u8 disable_length_check:1;</div><div class='add'>+</div><div class='add'>+	u8 discard_errored_frames:1;</div><div class='add'>+	u8 control_frame_enable:1;</div><div class='add'>+	u8 enable_tx_padding:1;</div><div class='add'>+	u8 enable_crc_forwarding:1;</div><div class='add'>+	u8 enable_frame_padding_removal_rx: 1;</div><div class='add'>+	u8 promiscuous_mode: 1;</div><div class='add'>+	u8 rsvd:2;</div><div class='add'>+</div><div class='add'>+	u16 rsvd2;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct thermal_shutdown_s {</div><div class='add'>+	u8 enable:1;</div><div class='add'>+	u8 warning_enable:1;</div><div class='add'>+	u8 rsvd:6;</div><div class='add'>+</div><div class='add'>+	u8 shutdown_temperature;</div><div class='add'>+	u8 cold_temperature;</div><div class='add'>+	u8 warning_temperature;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mac_address_s {</div><div class='add'>+	u8 mac_address[6];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mac_address_aligned_s {</div><div class='add'>+	struct mac_address_s aligned;</div><div class='add'>+	u16 rsvd;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sleep_proxy_s {</div><div class='add'>+	struct wake_on_lan_s {</div><div class='add'>+		u8 wake_on_magic_packet:1;</div><div class='add'>+		u8 wake_on_pattern:1;</div><div class='add'>+		u8 wake_on_link_up:1;</div><div class='add'>+		u8 wake_on_link_down:1;</div><div class='add'>+		u8 wake_on_ping:1;</div><div class='add'>+		u8 wake_on_timer:1;</div><div class='add'>+		u8 rsvd:2;</div><div class='add'>+</div><div class='add'>+		u8 rsvd2;</div><div class='add'>+		u16 rsvd3;</div><div class='add'>+</div><div class='add'>+		u32 link_up_timeout;</div><div class='add'>+		u32 link_down_timeout;</div><div class='add'>+		u32 timer;</div><div class='add'>+	} wake_on_lan;</div><div class='add'>+</div><div class='add'>+	struct {</div><div class='add'>+		u32 mask[4];</div><div class='add'>+		u32 crc32;</div><div class='add'>+	} wake_up_pattern[8];</div><div class='add'>+</div><div class='add'>+	struct __packed {</div><div class='add'>+		u8 arp_responder:1;</div><div class='add'>+		u8 echo_responder:1;</div><div class='add'>+		u8 igmp_client:1;</div><div class='add'>+		u8 echo_truncate:1;</div><div class='add'>+		u8 address_guard:1;</div><div class='add'>+		u8 ignore_fragmented:1;</div><div class='add'>+		u8 rsvd:2;</div><div class='add'>+</div><div class='add'>+		u16 echo_max_len;</div><div class='add'>+		u8 rsvd2;</div><div class='add'>+	} ipv4_offload;</div><div class='add'>+</div><div class='add'>+	u32 ipv4_offload_addr[8];</div><div class='add'>+	u32 reserved[8];</div><div class='add'>+</div><div class='add'>+	struct __packed {</div><div class='add'>+		u8 ns_responder:1;</div><div class='add'>+		u8 echo_responder:1;</div><div class='add'>+		u8 mld_client:1;</div><div class='add'>+		u8 echo_truncate:1;</div><div class='add'>+		u8 address_guard:1;</div><div class='add'>+		u8 rsvd:3;</div><div class='add'>+</div><div class='add'>+		u16 echo_max_len;</div><div class='add'>+		u8 rsvd2;</div><div class='add'>+	} ipv6_offload;</div><div class='add'>+</div><div class='add'>+	u32 ipv6_offload_addr[16][4];</div><div class='add'>+</div><div class='add'>+	struct {</div><div class='add'>+		u16 port[16];</div><div class='add'>+	} tcp_port_offload;</div><div class='add'>+</div><div class='add'>+	struct {</div><div class='add'>+		u16 port[16];</div><div class='add'>+	} udp_port_offload;</div><div class='add'>+</div><div class='add'>+	struct {</div><div class='add'>+		u32 retry_count;</div><div class='add'>+		u32 retry_interval;</div><div class='add'>+	} ka4_offload;</div><div class='add'>+</div><div class='add'>+	struct {</div><div class='add'>+		u32 timeout;</div><div class='add'>+		u16 local_port;</div><div class='add'>+		u16 remote_port;</div><div class='add'>+		u8 remote_mac_addr[6];</div><div class='add'>+		u16 rsvd;</div><div class='add'>+		u32 rsvd2;</div><div class='add'>+		u32 rsvd3;</div><div class='add'>+		u16 rsvd4;</div><div class='add'>+		u16 win_size;</div><div class='add'>+		u32 seq_num;</div><div class='add'>+		u32 ack_num;</div><div class='add'>+		u32 local_ip;</div><div class='add'>+		u32 remote_ip;</div><div class='add'>+	} ka4_connection[16];</div><div class='add'>+</div><div class='add'>+	struct {</div><div class='add'>+		u32 retry_count;</div><div class='add'>+		u32 retry_interval;</div><div class='add'>+	} ka6_offload;</div><div class='add'>+</div><div class='add'>+	struct {</div><div class='add'>+		u32 timeout;</div><div class='add'>+		u16 local_port;</div><div class='add'>+		u16 remote_port;</div><div class='add'>+		u8 remote_mac_addr[6];</div><div class='add'>+		u16 rsvd;</div><div class='add'>+		u32 rsvd2;</div><div class='add'>+		u32 rsvd3;</div><div class='add'>+		u16 rsvd4;</div><div class='add'>+		u16 win_size;</div><div class='add'>+		u32 seq_num;</div><div class='add'>+		u32 ack_num;</div><div class='add'>+		u32 local_ip[4];</div><div class='add'>+		u32 remote_ip[4];</div><div class='add'>+	} ka6_connection[16];</div><div class='add'>+</div><div class='add'>+	struct {</div><div class='add'>+		u32 rr_count;</div><div class='add'>+		u32 rr_buf_len;</div><div class='add'>+		u32 idx_offset;</div><div class='add'>+		u32 rr__offset;</div><div class='add'>+	} mdns_offload;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct pause_quanta_s {</div><div class='add'>+	u16 quanta_10M;</div><div class='add'>+	u16 threshold_10M;</div><div class='add'>+	u16 quanta_100M;</div><div class='add'>+	u16 threshold_100M;</div><div class='add'>+	u16 quanta_1G;</div><div class='add'>+	u16 threshold_1G;</div><div class='add'>+	u16 quanta_2P5G;</div><div class='add'>+	u16 threshold_2P5G;</div><div class='add'>+	u16 quanta_5G;</div><div class='add'>+	u16 threshold_5G;</div><div class='add'>+	u16 quanta_10G;</div><div class='add'>+	u16 threshold_10G;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct data_buffer_status_s {</div><div class='add'>+	u32 data_offset;</div><div class='add'>+	u32 data_length;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct device_caps_s {</div><div class='add'>+	u8 finite_flashless:1;</div><div class='add'>+	u8 cable_diag:1;</div><div class='add'>+	u8 ncsi:1;</div><div class='add'>+	u8 avb:1;</div><div class='add'>+	u8 rsvd:4;</div><div class='add'>+</div><div class='add'>+	u8 rsvd2;</div><div class='add'>+	u16 rsvd3;</div><div class='add'>+	u32 rsvd4;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct version_s {</div><div class='add'>+	struct bundle_version_t {</div><div class='add'>+		u8 major;</div><div class='add'>+		u8 minor;</div><div class='add'>+		u16 build;</div><div class='add'>+	} bundle;</div><div class='add'>+	struct mac_version_t {</div><div class='add'>+		u8 major;</div><div class='add'>+		u8 minor;</div><div class='add'>+		u16 build;</div><div class='add'>+	} mac;</div><div class='add'>+	struct phy_version_t {</div><div class='add'>+		u8 major;</div><div class='add'>+		u8 minor;</div><div class='add'>+		u16 build;</div><div class='add'>+	} phy;</div><div class='add'>+	u32 drv_iface_ver:4;</div><div class='add'>+	u32 rsvd:28;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct link_status_s {</div><div class='add'>+	u8 link_state:4;</div><div class='add'>+	u8 link_rate:4;</div><div class='add'>+</div><div class='add'>+	u8 pause_tx:1;</div><div class='add'>+	u8 pause_rx:1;</div><div class='add'>+	u8 eee:1;</div><div class='add'>+	u8 duplex:1;</div><div class='add'>+	u8 rsvd:4;</div><div class='add'>+</div><div class='add'>+	u16 rsvd2;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct wol_status_s {</div><div class='add'>+	u8 wake_count;</div><div class='add'>+	u8 wake_reason;</div><div class='add'>+</div><div class='add'>+	u16 wake_up_packet_length :12;</div><div class='add'>+	u16 wake_up_pattern_number :3;</div><div class='add'>+	u16 rsvd:1;</div><div class='add'>+</div><div class='add'>+	u32 wake_up_packet[379];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct mac_health_monitor_s {</div><div class='add'>+	u8 mac_ready:1;</div><div class='add'>+	u8 mac_fault:1;</div><div class='add'>+	u8 mac_flashless_finished:1;</div><div class='add'>+	u8 rsvd:5;</div><div class='add'>+</div><div class='add'>+	u8 mac_temperature;</div><div class='add'>+	u16 mac_heart_beat;</div><div class='add'>+	u16 mac_fault_code;</div><div class='add'>+	u16 rsvd2;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct phy_health_monitor_s {</div><div class='add'>+	u8 phy_ready:1;</div><div class='add'>+	u8 phy_fault:1;</div><div class='add'>+	u8 phy_hot_warning:1;</div><div class='add'>+	u8 rsvd:5;</div><div class='add'>+</div><div class='add'>+	u8 phy_temperature;</div><div class='add'>+	u16 phy_heart_beat;</div><div class='add'>+	u16 phy_fault_code;</div><div class='add'>+	u16 rsvd2;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct device_link_caps_s {</div><div class='add'>+	u8 rsvd:3;</div><div class='add'>+	u8 internal_loopback:1;</div><div class='add'>+	u8 external_loopback:1;</div><div class='add'>+	u8 rate_10M_hd:1;</div><div class='add'>+	u8 rate_100M_hd:1;</div><div class='add'>+	u8 rate_1G_hd:1;</div><div class='add'>+</div><div class='add'>+	u8 rate_10M:1;</div><div class='add'>+	u8 rate_100M:1;</div><div class='add'>+	u8 rate_1G:1;</div><div class='add'>+	u8 rate_2P5G:1;</div><div class='add'>+	u8 rate_N2P5G:1;</div><div class='add'>+	u8 rate_5G:1;</div><div class='add'>+	u8 rate_N5G:1;</div><div class='add'>+	u8 rate_10G:1;</div><div class='add'>+</div><div class='add'>+	u8 rsvd3:1;</div><div class='add'>+	u8 eee_100M:1;</div><div class='add'>+	u8 eee_1G:1;</div><div class='add'>+	u8 eee_2P5G:1;</div><div class='add'>+	u8 rsvd4:1;</div><div class='add'>+	u8 eee_5G:1;</div><div class='add'>+	u8 rsvd5:1;</div><div class='add'>+	u8 eee_10G:1;</div><div class='add'>+</div><div class='add'>+	u8 pause_rx:1;</div><div class='add'>+	u8 pause_tx:1;</div><div class='add'>+	u8 pfc:1;</div><div class='add'>+	u8 downshift:1;</div><div class='add'>+	u8 downshift_retry:4;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct sleep_proxy_caps_s {</div><div class='add'>+	u8 ipv4_offload:1;</div><div class='add'>+	u8 ipv6_offload:1;</div><div class='add'>+	u8 tcp_port_offload:1;</div><div class='add'>+	u8 udp_port_offload:1;</div><div class='add'>+	u8 ka4_offload:1;</div><div class='add'>+	u8 ka6_offload:1;</div><div class='add'>+	u8 mdns_offload:1;</div><div class='add'>+	u8 wake_on_ping:1;</div><div class='add'>+</div><div class='add'>+	u8 wake_on_magic_packet:1;</div><div class='add'>+	u8 wake_on_pattern:1;</div><div class='add'>+	u8 wake_on_timer:1;</div><div class='add'>+	u8 wake_on_link:1;</div><div class='add'>+	u8 wake_patterns_count:4;</div><div class='add'>+</div><div class='add'>+	u8 ipv4_count;</div><div class='add'>+	u8 ipv6_count;</div><div class='add'>+</div><div class='add'>+	u8 tcp_port_offload_count;</div><div class='add'>+	u8 udp_port_offload_count;</div><div class='add'>+</div><div class='add'>+	u8 tcp4_ka_count;</div><div class='add'>+	u8 tcp6_ka_count;</div><div class='add'>+</div><div class='add'>+	u8 igmp_offload:1;</div><div class='add'>+	u8 mld_offload:1;</div><div class='add'>+	u8 rsvd:6;</div><div class='add'>+</div><div class='add'>+	u8 rsvd2;</div><div class='add'>+	u16 rsvd3;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct lkp_link_caps_s {</div><div class='add'>+	u8 rsvd:5;</div><div class='add'>+	u8 rate_10M_hd:1;</div><div class='add'>+	u8 rate_100M_hd:1;</div><div class='add'>+	u8 rate_1G_hd:1;</div><div class='add'>+</div><div class='add'>+	u8 rate_10M:1;</div><div class='add'>+	u8 rate_100M:1;</div><div class='add'>+	u8 rate_1G:1;</div><div class='add'>+	u8 rate_2P5G:1;</div><div class='add'>+	u8 rate_N2P5G:1;</div><div class='add'>+	u8 rate_5G:1;</div><div class='add'>+	u8 rate_N5G:1;</div><div class='add'>+	u8 rate_10G:1;</div><div class='add'>+</div><div class='add'>+	u8 rsvd2:1;</div><div class='add'>+	u8 eee_100M:1;</div><div class='add'>+	u8 eee_1G:1;</div><div class='add'>+	u8 eee_2P5G:1;</div><div class='add'>+	u8 rsvd3:1;</div><div class='add'>+	u8 eee_5G:1;</div><div class='add'>+	u8 rsvd4:1;</div><div class='add'>+	u8 eee_10G:1;</div><div class='add'>+</div><div class='add'>+	u8 pause_rx:1;</div><div class='add'>+	u8 pause_tx:1;</div><div class='add'>+	u8 rsvd5:6;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct core_dump_s {</div><div class='add'>+	u32 reg0;</div><div class='add'>+	u32 reg1;</div><div class='add'>+	u32 reg2;</div><div class='add'>+</div><div class='add'>+	u32 hi;</div><div class='add'>+	u32 lo;</div><div class='add'>+</div><div class='add'>+	u32 regs[32];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct trace_s {</div><div class='add'>+	u32 sync_counter;</div><div class='add'>+	u32 mem_buffer[0x1ff];</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct cable_diag_control_s {</div><div class='add'>+	u8 toggle :1;</div><div class='add'>+	u8 rsvd:7;</div><div class='add'>+</div><div class='add'>+	u8 wait_timeout_sec;</div><div class='add'>+	u16 rsvd2;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct cable_diag_lane_data_s {</div><div class='add'>+	u8 result_code;</div><div class='add'>+	u8 dist;</div><div class='add'>+	u8 far_dist;</div><div class='add'>+	u8 rsvd;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct cable_diag_status_s {</div><div class='add'>+	struct cable_diag_lane_data_s lane_data[4];</div><div class='add'>+	u8 transact_id;</div><div class='add'>+	u8 status:4;</div><div class='add'>+	u8 rsvd:4;</div><div class='add'>+	u16 rsvd2;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct statistics_a0_s {</div><div class='add'>+	struct {</div><div class='add'>+		u32 link_up;</div><div class='add'>+		u32 link_down;</div><div class='add'>+	} link;</div><div class='add'>+</div><div class='add'>+	struct {</div><div class='add'>+		u64 tx_unicast_octets;</div><div class='add'>+		u64 tx_multicast_octets;</div><div class='add'>+		u64 tx_broadcast_octets;</div><div class='add'>+		u64 rx_unicast_octets;</div><div class='add'>+		u64 rx_multicast_octets;</div><div class='add'>+		u64 rx_broadcast_octets;</div><div class='add'>+</div><div class='add'>+		u32 tx_unicast_frames;</div><div class='add'>+		u32 tx_multicast_frames;</div><div class='add'>+		u32 tx_broadcast_frames;</div><div class='add'>+		u32 tx_errors;</div><div class='add'>+</div><div class='add'>+		u32 rx_unicast_frames;</div><div class='add'>+		u32 rx_multicast_frames;</div><div class='add'>+		u32 rx_broadcast_frames;</div><div class='add'>+		u32 rx_dropped_frames;</div><div class='add'>+		u32 rx_error_frames;</div><div class='add'>+</div><div class='add'>+		u32 tx_good_frames;</div><div class='add'>+		u32 rx_good_frames;</div><div class='add'>+		u32 reserve_fw_gap;</div><div class='add'>+	} msm;</div><div class='add'>+	u32 main_loop_cycles;</div><div class='add'>+	u32 reserve_fw_gap;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed statistics_b0_s {</div><div class='add'>+	u64 rx_good_octets;</div><div class='add'>+	u64 rx_pause_frames;</div><div class='add'>+	u64 rx_good_frames;</div><div class='add'>+	u64 rx_errors;</div><div class='add'>+	u64 rx_unicast_frames;</div><div class='add'>+	u64 rx_multicast_frames;</div><div class='add'>+	u64 rx_broadcast_frames;</div><div class='add'>+</div><div class='add'>+	u64 tx_good_octets;</div><div class='add'>+	u64 tx_pause_frames;</div><div class='add'>+	u64 tx_good_frames;</div><div class='add'>+	u64 tx_errors;</div><div class='add'>+	u64 tx_unicast_frames;</div><div class='add'>+	u64 tx_multicast_frames;</div><div class='add'>+	u64 tx_broadcast_frames;</div><div class='add'>+</div><div class='add'>+	u32 main_loop_cycles;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct __packed statistics_s {</div><div class='add'>+	union __packed {</div><div class='add'>+		struct statistics_a0_s a0;</div><div class='add'>+		struct statistics_b0_s b0;</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct filter_caps_s {</div><div class='add'>+	u8 l2_filters_base_index:6;</div><div class='add'>+	u8 flexible_filter_mask:2;</div><div class='add'>+	u8 l2_filter_count;</div><div class='add'>+	u8 ethertype_filter_base_index;</div><div class='add'>+	u8 ethertype_filter_count;</div><div class='add'>+</div><div class='add'>+	u8 vlan_filter_base_index;</div><div class='add'>+	u8 vlan_filter_count;</div><div class='add'>+	u8 l3_ip4_filter_base_index:4;</div><div class='add'>+	u8 l3_ip4_filter_count:4;</div><div class='add'>+	u8 l3_ip6_filter_base_index:4;</div><div class='add'>+	u8 l3_ip6_filter_count:4;</div><div class='add'>+</div><div class='add'>+	u8 l4_filter_base_index:4;</div><div class='add'>+	u8 l4_filter_count:4;</div><div class='add'>+	u8 l4_flex_filter_base_index:4;</div><div class='add'>+	u8 l4_flex_filter_count:4;</div><div class='add'>+	u8 rslv_tbl_base_index;</div><div class='add'>+	u8 rslv_tbl_count;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+struct request_policy_s {</div><div class='add'>+	struct {</div><div class='add'>+		u8 all:1;</div><div class='add'>+		u8 mcast:1;</div><div class='add'>+		u8 rx_queue_tc_index:5;</div><div class='add'>+		u8 queue_or_tc:1;</div><div class='add'>+	} promisc;</div><div class='add'>+</div><div class='add'>+	struct {</div><div class='add'>+		u8 accept:1;</div><div class='add'>+		u8 rsvd:1;</div><div class='add'>+		u8 rx_queue_tc_index:5;</div><div class='add'>+		u8 queue_or_tc:1;</div><div class='add'>+	} bcast;</div><div class='add'>+</div><div class='add'>+	struct {</div>